diff --git a/README b/README
new file mode 100644
index 00000000..3016ccea
--- /dev/null
+++ b/README
@@ -0,0 +1,63 @@
+This contains the TinyOS 2.0 source code as of
+
+$Date: 2007-07-30 07:18:52 $
+
+This tree includes the TinyOS 2.0 documentation in tinyos-2.x/doc; 
+you can also find the documentation online at:
+http://www.tinyos.net/tinyos-2.x/doc/
+
+Please note that RPM releases do not include the doc/ or tools/
+directories. They do not include the former because of the above URL,
+where corrections can be applied quickly. They do not include the
+latter because that compiled versions of its code are installed in
+the tinyos-tools RPM.
+
+The basic directory structure is as follows:
+
+apps: Sample TinyOS applications.
+  tests: Sample TinyOS applications which test a part of the system.
+
+doc: Documentation
+  index.html: Index file to all documentation
+  txt: Text files (TEPs)
+  html: HTML files (TEPs, installation)
+    tutorial: Tutorials
+  pdf: PDFs of larger documents, such as the TinyOS Programming Manual
+
+support: Non-nesC code for using TinyOS nodes
+  make: TinyOS make system
+  sdk: Standard developers kit: serial communication, etc.
+    c: C SDK (fully supported, but not exhaustively tested yet)
+    java: Java SDK (fully supported, heavily tested and used)
+    python: Python SDK (limited, not fully supported)
+
+tools: TinyOS-specific tools and scripts
+  platforms: Platform-specific tools
+  release: Scripts and configurations for packaging release RPMs
+  tinyos: TinyOS scripts
+    java: Native support for TinyOS JNI libraries (serial and env)
+    misc: Assorted utility scripts, begininning with tos-
+    ncc: The scripts that invoke the nesC compiler: ncc, mig, ncg
+    
+tos: TinyOS source code (nesC, C)
+  chips: Chip-specific code
+  interfaces: Core system interfaces
+  lib: Extensions and larger common subsystems
+    byte_radio: General radio stack for byte-level radios
+    net: Network (multihop protocols)
+      ctp: Collection tree protocol
+      le: Link estimator
+      lqi: LQI-based collection for CC2420 platforms
+    power: Power management component library
+    printf: Printing small text messages to serial port
+    serial: Serial communication
+    timer: Timer component library
+    tossim: TOSSIM simulator
+  platforms: Platform-specific code
+  sensorboards: Sensorboard drivers
+  system: Core system components
+  types: Core system data types (header files)
+
+You can find documentation for the 2.0.1 release online at:
+http://www.tinyos.net/tinyos-2.x/doc/
+
diff --git a/apps/AntiTheft/Nodes/AntiTheftAppC.nc b/apps/AntiTheft/Nodes/AntiTheftAppC.nc
new file mode 100644
index 00000000..618e0f45
--- /dev/null
+++ b/apps/AntiTheft/Nodes/AntiTheftAppC.nc
@@ -0,0 +1,71 @@
+// $Id: AntiTheftAppC.nc,v 1.5 2008-04-24 21:15:50 mmaroti Exp $
+/*
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Top-level configuration for node code for the AntiTheft demo app.
+ * Instantiates the sensors, dissemination and collection services, and
+ * does all the necessary wiring.
+ *
+ * @author David Gay
+ */
+#include "antitheft.h"
+
+configuration AntiTheftAppC { }
+implementation
+{
+  /* First wire the low-level services (booting, serial port, radio).
+     There is no standard name for the actual radio component, so we use
+     #ifdef to get the right one for the current platform. */
+  components AntiTheftC, ActiveMessageC, MainC, LedsC,
+    new TimerMilliC() as MyTimer;
+#if defined(PLATFORM_MICA2)
+  components CC1000CsmaRadioC as Radio;
+#elif defined(PLATFORM_MICAZ)
+  components CC2420ActiveMessageC as Radio;
+#elif defined(PLATFORM_IRIS)
+  components ActiveMessageC as Radio;
+#else
+#error "The AntiTheft application is only supported for mica2, micaz and iris nodes"
+#endif
+
+  AntiTheftC.Boot -> MainC.Boot;
+  AntiTheftC.Check -> MyTimer;
+  AntiTheftC.Leds -> LedsC;
+  AntiTheftC.RadioControl -> ActiveMessageC;
+  AntiTheftC.LowPowerListening -> Radio;
+
+  /* Instaniate, wire MTS300 sensor board components. */
+  components new PhotoC(), new AccelXStreamC(), SounderC;
+
+  AntiTheftC.Read -> PhotoC;
+  AntiTheftC.ReadStream -> AccelXStreamC;
+  AntiTheftC.Mts300Sounder -> SounderC;
+
+  components DisseminationC;
+  AntiTheftC.DisseminationControl -> DisseminationC;
+
+  /* Instantiate and wire our settings dissemination service */
+  components new DisseminatorC(settings_t, DIS_SETTINGS);
+  AntiTheftC.SettingsValue -> DisseminatorC;
+
+  /* Instantiate and wire our collection service for theft alerts */
+  components CollectionC, new CollectionSenderC(COL_ALERTS) as AlertSender;
+
+  AntiTheftC.AlertRoot -> AlertSender;
+  AntiTheftC.CollectionControl -> CollectionC;
+
+  /* Instantiate and wire our local radio-broadcast theft alert and 
+     reception services */
+  components new AMSenderC(AM_THEFT) as SendTheft, 
+    new AMReceiverC(AM_THEFT) as ReceiveTheft;
+
+  AntiTheftC.TheftSend -> SendTheft;
+  AntiTheftC.TheftReceive -> ReceiveTheft;
+}
diff --git a/apps/AntiTheft/Nodes/AntiTheftC.nc b/apps/AntiTheft/Nodes/AntiTheftC.nc
new file mode 100644
index 00000000..fce28e05
--- /dev/null
+++ b/apps/AntiTheft/Nodes/AntiTheftC.nc
@@ -0,0 +1,224 @@
+// $Id: AntiTheftC.nc,v 1.7 2009-10-28 19:11:15 razvanm Exp $
+/*
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Main code for the anti theft demo application.
+ *
+ * @author David Gay
+ */
+#include "antitheft.h"
+
+module AntiTheftC
+{
+  uses {
+    interface Timer<TMilli> as Check;
+    interface Read<uint16_t>;
+    interface ReadStream<uint16_t>;
+    interface Leds;
+    interface Boot;
+    interface Mts300Sounder;
+    interface DisseminationValue<settings_t> as SettingsValue;
+    interface Send as AlertRoot;
+    interface StdControl as CollectionControl;
+    interface StdControl as DisseminationControl;
+    interface SplitControl as RadioControl;
+    interface LowPowerListening;
+    interface AMSend as TheftSend;
+    interface Receive as TheftReceive;
+  }
+}
+implementation
+{
+  enum {
+    /* Threshold for considering mote in a dark place */
+    DARK_THRESHOLD = 600, 
+
+    /* Amount of time warning leds should stay on (in checkInterval counts) */
+    WARNING_TIME = 3,
+
+    /* Number of acceleration samples to collect */
+    ACCEL_SAMPLES = 10,
+
+    /* Interval between acceleration samples (us) */
+    ACCEL_INTERVAL = 10000
+  };
+
+  settings_t settings;
+  message_t alertMsg, theftMsg;
+  uint16_t ledTime; /* Time left until leds switched off */
+  uint16_t accelSamples[ACCEL_SAMPLES];
+
+  /********* LED handling **********/
+
+  /* Warn that some error occurred */
+  void errorLed() {
+    ledTime = WARNING_TIME;
+    call Leds.led2On();
+  }
+
+  /* Notify user that settings changed */
+  void settingsLed() {
+    ledTime = WARNING_TIME;
+    call Leds.led1On();
+  }
+
+  /* Turn on bright red light! (LED) */
+  void theftLed() {
+    ledTime = WARNING_TIME;
+    call Leds.led0On();
+  }
+
+  /* Time-out leds. Called every checkInterval */
+  void updateLeds() {
+    if (ledTime && !--ledTime)
+      {
+	call Leds.led0Off();
+	call Leds.led1Off();
+	call Leds.led2Off();
+      }
+  }
+
+  /* Check result code and report error if a problem occurred */
+  void check(error_t ok) {
+    if (ok != SUCCESS)
+      errorLed();
+  }
+
+  /* Report theft, based on current settings */
+  void theft() {
+    if (settings.alert & ALERT_LEDS)
+      theftLed();
+    if (settings.alert & ALERT_SOUND)
+      call Mts300Sounder.beep(100);
+    if (settings.alert & ALERT_RADIO)
+      /* A local broadcast with no payload */
+      check(call TheftSend.send(AM_BROADCAST_ADDR, &theftMsg, 0));
+    if (settings.alert & ALERT_ROOT)
+      {
+	/* Report the identity of this node, using the collection protocol */
+
+	/* Get the payload part of alertMsg and fill in our data */
+	alert_t *newAlert = call AlertRoot.getPayload(&alertMsg, sizeof(alert_t));
+	if (newAlert != NULL) {
+	  newAlert->stolenId = TOS_NODE_ID;
+	  /* and send it... */
+	  check(call AlertRoot.send(&alertMsg, sizeof *newAlert));
+	}
+      }
+  }
+
+  /* We have nothing to do after messages are sent */
+  event void AlertRoot.sendDone(message_t *msg, error_t ok) { }
+  event void TheftSend.sendDone(message_t *msg, error_t ok) { }
+
+  /* We've received a theft alert from a neighbour. Turn on the theft warning
+     light! */
+  event message_t *TheftReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    theftLed();
+    /* We don't need to hold on to the message buffer, so just return the
+       received buffer */
+    return msg;
+  }
+  
+  /* At boot time, start the periodic timer and the radio */
+  event void Boot.booted() {
+    errorLed();
+    settings.alert = DEFAULT_ALERT;
+    settings.detect = DEFAULT_DETECT;
+
+    call Check.startPeriodic(DEFAULT_CHECK_INTERVAL);
+    call RadioControl.start();
+  }
+
+  /* Radio started. Now start the collection protocol and set the
+     wakeup interval for low-power-listening wakeup to half a second. */
+  event void RadioControl.startDone(error_t ok) {
+    if (ok == SUCCESS)
+      {
+	call DisseminationControl.start();
+	call CollectionControl.start();
+	call LowPowerListening.setLocalWakeupInterval(512);
+      }
+    else
+      errorLed();
+  }
+
+  event void RadioControl.stopDone(error_t ok) { }
+
+  /* New settings received, update our local copy */
+  event void SettingsValue.changed() {
+    const settings_t *newSettings = call SettingsValue.get();
+
+    settingsLed();
+    settings = *newSettings;
+    /* Switch to the new check interval */
+    call Check.startPeriodic(newSettings->checkInterval);
+  }
+
+  /* Every check interval: update leds, check for theft based on current
+     settings */
+  event void Check.fired() {
+    updateLeds();
+
+    if (settings.detect & DETECT_DARK)
+      call Read.read(); /* Initiate light sensor read */
+    if (settings.detect & DETECT_ACCEL)
+      {
+	/* To sample acceleration, we first register our buffer
+	   (postBuffer). Then we trigger sampling at the desired
+	   interval (read) */
+	call ReadStream.postBuffer(accelSamples, ACCEL_SAMPLES);
+	call ReadStream.read(ACCEL_INTERVAL);
+      }
+  }
+
+  /* Light sample completed. Check if it indicates theft */
+  event void Read.readDone(error_t ok, uint16_t val) {
+    if (ok == SUCCESS && val < DARK_THRESHOLD)
+      theft(); /* ALERT! ALERT! */
+  }
+
+  /* A deferred task to check the acceleration data and detect theft. */
+  task void checkAcceleration() {
+    uint8_t i;
+    uint16_t avg;
+    uint32_t var;
+
+    /* We check for theft by checking whether the variance of the sample
+       (in mysterious acceleration units) is > 4 */
+
+    for (avg = 0, i = 0; i < ACCEL_SAMPLES; i++)
+      avg += accelSamples[i];
+    avg /= ACCEL_SAMPLES;
+
+    for (var = 0, i = 0; i < ACCEL_SAMPLES; i++)
+      {
+	int16_t diff = accelSamples[i] - avg;
+	var += diff * diff;
+      }
+
+    if (var > 4 * ACCEL_SAMPLES)
+      theft(); /* ALERT! ALERT! */
+  }
+
+  /* The acceleration read completed. Post the task that will check for
+     theft. We defer this somewhat cpu-intensive computation to avoid
+     having the current task run for too long. */
+  event void ReadStream.readDone(error_t ok, uint32_t usActualPeriod) {
+    if (ok == SUCCESS)
+      post checkAcceleration();
+    else
+      errorLed();
+  }
+
+  /* The current sampling buffer is full. If we were using several buffers,
+     we would switch between them here. */
+  event void ReadStream.bufferDone(error_t ok, uint16_t *buf, uint16_t count) { }
+}
diff --git a/apps/AntiTheft/Nodes/Makefile b/apps/AntiTheft/Nodes/Makefile
new file mode 100644
index 00000000..f05ae3be
--- /dev/null
+++ b/apps/AntiTheft/Nodes/Makefile
@@ -0,0 +1,11 @@
+SENSORBOARD=mts300
+PFLAGS += -I%T/lib/net/ctp -I%T/lib/net -I%T/lib/net/4bitle -I%T/lib/net/drip
+COMPONENT=AntiTheftAppC
+
+#CFLAGS += -DLOW_POWER_LISTENING
+#CFLAGS += -DLPL_DEF_LOCAL_WAKEUP=512
+#CFLAGS += -DLPL_DEF_REMOTE_WAKEUP=512
+#CFLAGS += -DDELAY_AFTER_RECEIVE=20
+
+include $(MAKERULES)
+
diff --git a/apps/AntiTheft/Nodes/antitheft.h b/apps/AntiTheft/Nodes/antitheft.h
new file mode 100644
index 00000000..b1757a8a
--- /dev/null
+++ b/apps/AntiTheft/Nodes/antitheft.h
@@ -0,0 +1,47 @@
+// $Id: antitheft.h,v 1.3 2007-04-04 22:06:22 idgay Exp $
+/*
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ *
+ * @author David Gay
+ */
+#ifndef ANTITHEFT_H
+#define ANTITHEFT_H
+
+enum {
+  ALERT_LEDS = 1,
+  ALERT_SOUND = 2,
+  ALERT_RADIO = 4,
+  ALERT_ROOT = 8,
+
+  DETECT_DARK = 1,
+  DETECT_ACCEL = 2,
+
+  AM_SETTINGS = 54,
+  AM_THEFT = 99,
+  AM_ALERT = 22,
+  DIS_SETTINGS = 42,
+  COL_ALERTS = 11,
+
+  DEFAULT_ALERT = ALERT_LEDS,
+  DEFAULT_DETECT = DETECT_DARK,
+  DEFAULT_CHECK_INTERVAL = 1000
+};
+
+typedef nx_struct settings {
+  nx_uint8_t alert, detect;
+  nx_uint16_t checkInterval;
+} settings_t;
+
+typedef nx_struct alert {
+  nx_uint16_t stolenId;
+} alert_t;
+
+#endif
diff --git a/apps/AntiTheft/README.txt b/apps/AntiTheft/README.txt
new file mode 100644
index 00000000..ad468bc4
--- /dev/null
+++ b/apps/AntiTheft/README.txt
@@ -0,0 +1,100 @@
+README for AntiTheft
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+AntiTheft is a demo "antitheft" application. The accompanying
+tutorial-slides.ppt Powerpoint file is a tutorial for TinyOS that uses
+AntiTheft to introduce various aspects of TinyOS and its services.
+The slides are also available in PDF format in tutorial-slides.pdf
+(but with animation missing).
+
+AntiTheft can detect theft by:
+- light level (a dark mote is a mote that has been stolen and placed in
+  a concealed dark place, e.g., a pocket!)
+- acceleration (you have to move a mote to steal it...)
+
+It can report theft by:
+- turning on an alert light (a red LED)
+- beeping a sounder
+- reporting the theft to nodes within broadcast radio range (nodes
+  receiving this message turn on their red LED)
+- reporting the theft to a central node via multihop (collection) routing
+
+The antitheft detection and reporting choices are remotely controllable
+using the java GUI found in the java subdirectory.
+
+Nodes blink their yellow LED when turned on or when an internal error
+occurs, and blink their green LED when new settings are received.
+
+This demo is written for mica2, micaz or iris motes using the mts300
+sensor board.
+
+The code in the Nodes directory should be installed on the motes
+detecting theft. Each mote should have a separate id, and a mts31n0 or
+mts300 sensor board.  The code in the Root directory should be installed
+on a mote connected to the PC using a programming board. It talks to the
+java GUI, forwarding settings from the PC to the sensor network, and
+forwarding theft alerts from the sensor network to the PC. See below for
+detailed usage instructions.
+
+Tools:
+
+The java directory contains a control GUI for the antitheft demo app.
+
+Usage:
+
+The following instructions will get you started with the AntiTheft demo
+(the instructions are for mica2 motes, replace mica2 with micaz or iris
+if using either of those motes)
+
+1. Compile the root and node code for the antitheft application for your
+   platform (mica2, micaz or iris):
+
+    $ (cd Nodes; make mica2)
+    $ (cd Root; make mica2)
+
+2. Install the root code on a mote with a distinct identifier (e.g., 0):
+
+    $ (cd Root; make mica2 reinstall.0 <your usual installation options>)
+    # For instance: (cd Root; make mica2 reinstall.0 mib510,/dev/ttyUSB0)
+
+3. Install the node code on some number of mica2 motes, giving each mote
+   a distinct id.
+
+    $ (cd Nodes; make mica2 reinstall.N <your usual installation options>)
+    # For instance: (cd Nodes; make mica2 reinstall.22 mib510,/dev/ttyUSB0)
+
+4. Put some mts310 sensor boards on the non-root mica2 motes. You can use
+   mts300 boards instead, but then the acceleration detection will not work.
+
+5. Connect the root mica2 mote to your PC and switch on all motes.
+
+6. Compile and run the java application. The text below assumes your 
+   serial port is /dev/ttyS0, replace with the actual port you are using
+   (e.g., COM3 on Windows or /dev/ttyUSB0 on Linux)
+
+   $ cd java
+   $ make # Unecessary if antitheft.jar exists
+   $ java net.tinyos.sf.SerialForwarder -comm serial@/dev/ttyS0:mica2
+   $ ./run # start the graphical user interface
+
+7. The buttons and text field on the right allow you to change the theft
+   detection and reporting settings. The interval text box changes the
+   interval at which motes check for theft (default is every
+   second). Changes are only sent to the mote network when you press the
+   Update button. Finally, if you've selected the Server theft report
+   option, the message area will report received theft messages.
+
+Known bugs/limitations:
+
+- A newly turned on mote may not send theft reports (when the "Server"
+  theft report option is chosen), as:
+  o It takes a little while after motes turn on for them to join the multihop
+    collection network. 
+  o It can take a little while for motes to receive the current settings.
+
+None.
+
+
+$Id: README.txt,v 1.6 2007-11-19 17:21:20 sallai Exp $
diff --git a/apps/AntiTheft/Root/AntiTheftRootAppC.nc b/apps/AntiTheft/Root/AntiTheftRootAppC.nc
new file mode 100644
index 00000000..4b990801
--- /dev/null
+++ b/apps/AntiTheft/Root/AntiTheftRootAppC.nc
@@ -0,0 +1,62 @@
+// $Id: AntiTheftRootAppC.nc,v 1.6 2008-04-24 21:15:51 mmaroti Exp $
+/*
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Top-level configuration for root-node code for the AntiTheft demo app.
+ * Instantiates the dissemination and collection services, and does all
+ * the necessary wiring.
+ *
+ * @author David Gay
+ */
+#include "../Nodes/antitheft.h"
+
+configuration AntiTheftRootAppC { }
+implementation
+{
+  /* First wire the low-level services (booting, serial port, radio).
+     There is no standard name for the actual radio component, so we use
+     #ifdef to get the right one for the current platform. */
+  components AntiTheftRootC, MainC, LedsC, ActiveMessageC, SerialActiveMessageC;
+#if defined(PLATFORM_MICA2)
+  components CC1000CsmaRadioC as Radio;
+#elif defined(PLATFORM_MICAZ)
+  components CC2420ActiveMessageC as Radio;
+#elif defined(PLATFORM_IRIS)
+  components ActiveMessageC as Radio;
+#else
+#error "The AntiTheft application is only supported for mica2, micaz and iris nodes"
+#endif
+
+  AntiTheftRootC.Boot -> MainC;
+  AntiTheftRootC.SerialControl -> SerialActiveMessageC;
+  AntiTheftRootC.RadioControl -> ActiveMessageC;
+  AntiTheftRootC.LowPowerListening -> Radio;
+  AntiTheftRootC.Leds -> LedsC;
+
+  components DisseminationC;
+  AntiTheftRootC.DisseminationControl -> DisseminationC;
+  /* Next, instantiate and wire a disseminator (to send settings) and a
+     serial receiver (to receive settings from the PC) */
+  components new DisseminatorC(settings_t, DIS_SETTINGS),
+    new SerialAMReceiverC(AM_SETTINGS) as SettingsReceiver;
+
+  AntiTheftRootC.SettingsReceive -> SettingsReceiver;
+  AntiTheftRootC.SettingsUpdate -> DisseminatorC;
+
+  /* Finally, instantiate and wire a collector (to receive theft alerts) and
+     a serial sender (to send the alerts to the PC) */
+  components CollectionC, new SerialAMSenderC(AM_ALERT) as AlertsForwarder;
+
+  AntiTheftRootC.CollectionControl -> CollectionC;
+  AntiTheftRootC.RootControl -> CollectionC;
+  AntiTheftRootC.AlertsReceive -> CollectionC.Receive[COL_ALERTS];
+  AntiTheftRootC.AlertsForward -> AlertsForwarder;
+
+}
diff --git a/apps/AntiTheft/Root/AntiTheftRootC.nc b/apps/AntiTheft/Root/AntiTheftRootC.nc
new file mode 100644
index 00000000..86f6cdc9
--- /dev/null
+++ b/apps/AntiTheft/Root/AntiTheftRootC.nc
@@ -0,0 +1,111 @@
+// $Id: AntiTheftRootC.nc,v 1.5 2009-10-28 19:11:15 razvanm Exp $
+/*
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Root node code for the antitheft demo app, just acts as a bridge with the PC:
+ * - disseminates settings received from the PC
+ * - acts as a root forthe theft alert collection tree
+ * - forwards theft alerts received from the collection tree to the PC
+ *
+ * @author David Gay
+ */
+module AntiTheftRootC
+{
+  uses
+  {
+    interface Boot;
+    interface SplitControl as SerialControl;
+    interface SplitControl as RadioControl;
+    interface LowPowerListening;
+
+    interface DisseminationUpdate<settings_t> as SettingsUpdate;
+    interface Receive as SettingsReceive;
+
+    interface StdControl as CollectionControl;
+    interface StdControl as DisseminationControl;
+    interface RootControl;
+    interface Receive as AlertsReceive;
+    interface AMSend as AlertsForward;
+
+    interface Leds;
+  }
+}
+implementation
+{
+  /* Start the radio and serial ports when booting */
+  event void Boot.booted()
+  {
+    call SerialControl.start();
+    call RadioControl.start();
+  }
+
+  event void SerialControl.startDone(error_t error) { }
+  event void SerialControl.stopDone(error_t error) { }
+  event void RadioControl.startDone(error_t error) {
+    /* Once the radio has started, we can setup low-power listening, and
+       start the collection and dissemination services. Additionally, we
+       set ourselves as the (sole) root for the theft alert dissemination
+       tree */
+    if (error == SUCCESS)
+      {
+	call LowPowerListening.setLocalWakeupInterval(512);
+	call DisseminationControl.start();
+	call CollectionControl.start();
+	call RootControl.setRoot();
+      }
+  }
+  event void RadioControl.stopDone(error_t error) { }
+
+  /* When we receive new settings from the serial port, we disseminate
+     them by calling the change command */
+  event message_t *SettingsReceive.receive(message_t* msg, void* payload, uint8_t len)
+  {
+    settings_t *newSettings = payload;
+
+    if (len == sizeof(*newSettings))
+      {
+	call Leds.led2Toggle();
+	call SettingsUpdate.change(newSettings);
+      }
+    return msg;
+  }
+
+  message_t fwdMsg;
+  bool fwdBusy;
+
+  /* When we (as root of the collection tree) receive a new theft alert,
+     we forward it to the PC via the serial port */
+  event message_t *AlertsReceive.receive(message_t* msg, void* payload, 
+					 uint8_t len)
+  {
+    alert_t *newAlert = payload;
+
+    call Leds.led0Toggle();
+
+    if (len == sizeof(*newAlert) && !fwdBusy)
+      {
+	/* Copy payload (newAlert) from collection system to our serial
+	   message buffer (fwdAlert), then send our serial message */
+	alert_t *fwdAlert = call AlertsForward.getPayload(&fwdMsg, sizeof(alert_t));
+	if (fwdAlert != NULL) {
+	  *fwdAlert = *newAlert;
+	  if (call AlertsForward.send(AM_BROADCAST_ADDR, &fwdMsg, sizeof *fwdAlert) == SUCCESS)
+	    fwdBusy = TRUE;
+	}
+      }
+    return msg;
+  }
+
+  event void AlertsForward.sendDone(message_t *msg, error_t error) {
+    if (msg == &fwdMsg)
+      fwdBusy = FALSE;
+  }
+
+}
diff --git a/apps/AntiTheft/Root/Makefile b/apps/AntiTheft/Root/Makefile
new file mode 100644
index 00000000..4719dcfc
--- /dev/null
+++ b/apps/AntiTheft/Root/Makefile
@@ -0,0 +1,10 @@
+PFLAGS += -I%T/lib/net/ctp -I%T/lib/net -I%T/lib/net/4bitle -I%T/lib/net/drip
+COMPONENT=AntiTheftRootAppC
+
+#CFLAGS += -DLOW_POWER_LISTENING
+#CFLAGS += -DLPL_DEF_LOCAL_WAKEUP=512
+#CFLAGS += -DLPL_DEF_REMOTE_WAKEUP=512
+#CFLAGS += -DDELAY_AFTER_RECEIVE=20
+
+include $(MAKERULES)
+
diff --git a/apps/AntiTheft/java/.cvsignore b/apps/AntiTheft/java/.cvsignore
new file mode 100644
index 00000000..c6dc0624
--- /dev/null
+++ b/apps/AntiTheft/java/.cvsignore
@@ -0,0 +1,4 @@
+AlertMsg.java
+Constants.java
+SettingsMsg.java
+antitheft.jar
diff --git a/apps/AntiTheft/java/AntiTheftGui.java b/apps/AntiTheft/java/AntiTheftGui.java
new file mode 100644
index 00000000..4d3e5163
--- /dev/null
+++ b/apps/AntiTheft/java/AntiTheftGui.java
@@ -0,0 +1,236 @@
+// $Id: AntiTheftGui.java,v 1.5 2010-06-29 22:07:13 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * Description:
+ * The GUI for the AntiTheft application.
+ *
+ * @author Bret Hull
+ * @author David Gay
+ */
+
+import javax.swing.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.io.*;
+import net.tinyos.message.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+public class AntiTheftGui implements MessageListener, Messenger {
+    MoteIF mote; 		// For talking to the antitheft root node
+
+    /* Various swing components we need to use after initialisation */
+    JFrame frame;		// The whole frame
+    JTextArea mssgArea;		// The message area
+    JTextField fieldInterval;	// The requested check interval
+
+    /* The checkboxes for the requested settings */
+    JCheckBox detDarkCb, detAccelCb, repLedCb, repSirenCb, repServerCb,
+	repNeighboursCb;
+
+    public AntiTheftGui() {
+	try {
+	    guiInit();
+	    /* Setup communication with the mote and request a messageReceived
+	       callback when an AlertMsg is received */
+	    mote = new MoteIF(this);
+	    mote.registerListener(new AlertMsg(), this);
+	}
+	catch(Exception e) {
+	    e.printStackTrace();
+	    System.exit(2);
+	}
+    }
+
+    /* Build up the GUI using Swing magic. Nothing very exciting here - the
+       BagPanel class makes the code a bit cleaner/easier to read. */
+    private void guiInit() throws Exception {
+	JPanel mainPanel = new JPanel(new BorderLayout());
+	mainPanel.setMinimumSize(new Dimension(500, 250));
+	mainPanel.setPreferredSize(new Dimension(500, 300));
+
+	/* The message area */
+	JScrollPane mssgPanel = new JScrollPane();
+	mssgPanel.setVerticalScrollBarPolicy(JScrollPane.VERTICAL_SCROLLBAR_ALWAYS);
+	mssgPanel.setAutoscrolls(true);
+	mssgArea = new JTextArea();
+	mssgArea.setFont(new java.awt.Font("Monospaced", Font.PLAIN, 20));
+	mainPanel.add(mssgPanel, BorderLayout.CENTER);
+	mssgPanel.getViewport().add(mssgArea, null);
+	
+	/* The button area */
+	BagPanel buttonPanel = new BagPanel();
+	GridBagConstraints c = buttonPanel.c;
+
+	c.fill = GridBagConstraints.HORIZONTAL;
+	c.gridwidth = GridBagConstraints.REMAINDER;
+
+	buttonPanel.makeLabel("Detection", JLabel.CENTER);
+	c.gridwidth = GridBagConstraints.RELATIVE;
+	detDarkCb = buttonPanel.makeCheckBox("Dark", true);
+	c.gridwidth = GridBagConstraints.REMAINDER;
+	detAccelCb = buttonPanel.makeCheckBox("Movement", false);
+	buttonPanel.makeSeparator(SwingConstants.HORIZONTAL);
+
+
+	buttonPanel.makeLabel("Theft Reports", JLabel.CENTER);
+	c.gridwidth = GridBagConstraints.RELATIVE;
+	repLedCb = buttonPanel.makeCheckBox("LED", true);
+	c.gridwidth = GridBagConstraints.REMAINDER;
+	repSirenCb = buttonPanel.makeCheckBox("Siren", false);
+	c.gridwidth = GridBagConstraints.RELATIVE;
+	repServerCb = buttonPanel.makeCheckBox("Server", false);
+	c.gridwidth = GridBagConstraints.REMAINDER;
+	repNeighboursCb = buttonPanel.makeCheckBox("Neighbours", false);
+	buttonPanel.makeSeparator(SwingConstants.HORIZONTAL);
+
+	buttonPanel.makeLabel("Interval", JLabel.CENTER);
+	fieldInterval = buttonPanel.makeTextField(10, null);
+	fieldInterval.setText(Integer.toString(Constants.DEFAULT_CHECK_INTERVAL));
+
+	ActionListener settingsAction = new ActionListener() {
+		public void actionPerformed(ActionEvent e) {
+		    updateSettings();
+		}
+	    };
+	buttonPanel.makeButton("Update", settingsAction);
+
+	mainPanel.add(buttonPanel, BorderLayout.EAST);
+
+	/* The frame part */
+	frame = new JFrame("AntiTheft");
+	frame.setSize(mainPanel.getPreferredSize());
+	frame.getContentPane().add(mainPanel);
+	frame.setVisible(true);
+	frame.addWindowListener(new WindowAdapter() {
+		public void windowClosing(WindowEvent e) { System.exit(0); }
+	    });
+    }
+
+    /* Add a message to the message area, auto-scroll to end */
+    public synchronized void message(String s) {
+	mssgArea.append(s + "\n");
+	mssgArea.setCaretPosition(mssgArea.getDocument().getLength());
+    }
+
+    /* Popup an error message */
+    void error(String msg) {
+	JOptionPane.showMessageDialog(frame, msg, "Error",
+				      JOptionPane.ERROR_MESSAGE);
+    }
+
+    /* User pressed the "Update" button. Read the GUI fields and
+       send a SettingsMsg with the requested values. When the
+       requested settings are bad, we silently update them to sane
+       values. */
+    public void updateSettings() { 
+	SettingsMsg smsg = new SettingsMsg();
+	short alert = 0;
+	short detect = 0;
+	int checkInterval = Constants.DEFAULT_CHECK_INTERVAL;
+
+	/* Extract current interval value, fixing bad values */
+	String intervalS = fieldInterval.getText().trim();
+	try {
+	    int newInterval = Integer.parseInt(intervalS);
+	    if (newInterval < 10) throw new NumberFormatException();
+	    checkInterval = newInterval;
+	}
+	catch (NumberFormatException e) { 
+	    /* Reset field when value is bad */
+	    fieldInterval.setText("" + checkInterval);
+	}
+
+	/* Extract alert settings */
+	if (repLedCb.isSelected())
+	    alert |= Constants.ALERT_LEDS;
+	if (repSirenCb.isSelected())
+	    alert |= Constants.ALERT_SOUND;
+	if (repNeighboursCb.isSelected())
+	    alert |= Constants.ALERT_RADIO;
+	if (repServerCb.isSelected())
+	    alert |= Constants.ALERT_ROOT;
+	if (alert == 0) {
+	    /* If nothing select, force-select LEDs */
+	    alert = Constants.ALERT_LEDS;
+	    repLedCb.setSelected(true);
+	}
+
+	/* Extract detection settings */
+	if (detDarkCb.isSelected())
+	    detect |= Constants.DETECT_DARK;
+	if (detAccelCb.isSelected())
+	    detect |= Constants.DETECT_ACCEL;
+	if (detect == 0) {
+	    /* If no detection selected, force-select dark */
+	    detect = Constants.DETECT_DARK;
+	    detDarkCb.setSelected(true);
+	}
+
+	/* Build and send settings message */
+	smsg.set_alert(alert);
+	smsg.set_detect(detect);
+	smsg.set_checkInterval(checkInterval);
+	try {
+	    mote.send(MoteIF.TOS_BCAST_ADDR, smsg);
+	}
+	catch (IOException e) {
+	    error("Cannot send message to mote");
+	}
+    }
+
+    /* Message received from mote network. Update message area if it's
+       a theft message. */
+    public void messageReceived(int dest_addr, Message msg) {
+	if (msg instanceof AlertMsg) {
+	    AlertMsg alertMsg = (AlertMsg)msg;
+	    message("Theft of " + alertMsg.get_stolenId());
+	}
+    }
+
+    /* Just start the app... */
+    public static void main(String[] args) {
+	AntiTheftGui me = new AntiTheftGui();
+    }
+}
diff --git a/apps/AntiTheft/java/BagPanel.java b/apps/AntiTheft/java/BagPanel.java
new file mode 100644
index 00000000..9e9bf0b3
--- /dev/null
+++ b/apps/AntiTheft/java/BagPanel.java
@@ -0,0 +1,88 @@
+// $Id: BagPanel.java,v 1.2 2007-04-04 22:29:29 idgay Exp $
+
+/*									tab:4
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+import javax.swing.*;
+import java.awt.*;
+import java.awt.event.*;
+
+/**
+ * A GridBagLayout based panel with convenience methods for 
+ * making various swing items. These methods also ensure a
+ * consistent appearance.
+ *
+ * @author David Gay
+ */
+public class BagPanel extends JPanel {
+    Font boldFont = new Font("Dialog", Font.BOLD, 12);
+    Font normalFont = new Font("Dialog", Font.PLAIN, 12);
+
+    GridBagLayout bag;
+    GridBagConstraints c;
+
+    /* Create a panel with a bag layout. Create some constraints are
+       users can modify prior to creating widgets - the current constraints
+       will be applied to all widgets created with makeXXX */
+    public BagPanel() {
+	bag = new GridBagLayout();
+	setLayout(bag);
+	c = new GridBagConstraints();
+    }
+
+    /* The makeXXX methods create XXX widgets, apply the current constraints
+       to them, and add them to this panel. The widget is returned in case
+       the creator needs to hang on to it. */
+
+    public JButton makeButton(String label, ActionListener action) {
+	JButton button = new JButton();
+        button.setText(label);
+        button.setFont(boldFont);
+	button.addActionListener(action);
+	bag.setConstraints(button, c);
+	add(button);
+	return button;
+    }
+
+    public JCheckBox makeCheckBox(String label, boolean selected) {
+	JCheckBox box = new JCheckBox(label, selected);
+	box.setFont(normalFont);
+	bag.setConstraints(box, c);
+	add(box);
+	return box;
+    }
+
+    public JLabel makeLabel(String txt, int alignment) {
+	JLabel label = new JLabel(txt, alignment);
+	label.setFont(boldFont);
+	bag.setConstraints(label, c);
+	add(label);
+	return label;
+    }
+
+    public JTextField makeTextField(int columns, ActionListener action) {
+	JTextField tf = new JTextField(columns);
+	tf.setFont(normalFont);
+	tf.setMaximumSize(tf.getPreferredSize());
+	tf.addActionListener(action);
+	bag.setConstraints(tf, c);
+	add(tf);
+	return tf;
+    }
+
+    public JSeparator makeSeparator(int axis) {
+	JSeparator sep = new JSeparator(axis);
+	bag.setConstraints(sep, c);
+	add(sep);
+	return sep;
+    }
+
+}
diff --git a/apps/AntiTheft/java/Makefile b/apps/AntiTheft/java/Makefile
new file mode 100644
index 00000000..00cb3dd9
--- /dev/null
+++ b/apps/AntiTheft/java/Makefile
@@ -0,0 +1,26 @@
+GEN=SettingsMsg.java AlertMsg.java Constants.java
+
+ANTITHEFT_H=../Nodes/antitheft.h
+
+all: antitheft.jar
+
+antitheft.jar: AntiTheftGui.class
+	jar cf $@ *.class
+
+SettingsMsg.java: $(ANTITHEFT_H)
+	mig -target=null -java-classname=SettingsMsg java $(ANTITHEFT_H) settings -o $@
+
+AlertMsg.java: $(ANTITHEFT_H)
+	mig -target=null -java-classname=AlertMsg java $(ANTITHEFT_H) alert -o $@
+
+Constants.java: $(ANTITHEFT_H)
+	ncg -target=null -java-classname=Constants java $(ANTITHEFT_H) antitheft.h -o $@
+
+AntiTheftGui.class: $(wildcard *.java) $(GEN)
+	javac *.java
+
+clean:
+	rm -f *.class $(GEN)
+
+veryclean: clean
+	rm antitheft.jar
diff --git a/apps/AntiTheft/java/antitheft.jar b/apps/AntiTheft/java/antitheft.jar
new file mode 100644
index 00000000..42a2e464
Binary files /dev/null and b/apps/AntiTheft/java/antitheft.jar differ
diff --git a/apps/AntiTheft/java/build.xml b/apps/AntiTheft/java/build.xml
new file mode 100644
index 00000000..e8fa088b
--- /dev/null
+++ b/apps/AntiTheft/java/build.xml
@@ -0,0 +1,19 @@
+<project name="tinyos-2.x app multihoposcilloscope" default="all">
+
+	<target name="all" >
+		<exec executable="make" failonerror="true">
+			<arg line="all" />
+		</exec>
+	</target>
+
+	<target name="java" depends="all">
+	</target>
+
+	<target name="javadoc" >
+		<echo message = "Building javadoc" />
+		<exec executable="make" failonerror="true">
+			<arg line="javadoc" />
+		</exec>
+	</target>
+	
+</project>
diff --git a/apps/AntiTheft/java/run b/apps/AntiTheft/java/run
new file mode 100755
index 00000000..a60c2538
--- /dev/null
+++ b/apps/AntiTheft/java/run
@@ -0,0 +1,7 @@
+#!/bin/sh
+if cygpath -w / >/dev/null 2>/dev/null; then
+  CLASSPATH="antitheft.jar;$CLASSPATH"
+else
+  CLASSPATH="antitheft.jar:$CLASSPATH"
+fi
+java AntiTheftGui
diff --git a/apps/AntiTheft/tutorial-slides.pdf b/apps/AntiTheft/tutorial-slides.pdf
new file mode 100644
index 00000000..fb9e7e42
Binary files /dev/null and b/apps/AntiTheft/tutorial-slides.pdf differ
diff --git a/apps/AntiTheft/tutorial-slides.ppt b/apps/AntiTheft/tutorial-slides.ppt
new file mode 100644
index 00000000..72560692
Binary files /dev/null and b/apps/AntiTheft/tutorial-slides.ppt differ
diff --git a/apps/BaseStation/BaseStationC.nc b/apps/BaseStation/BaseStationC.nc
new file mode 100644
index 00000000..03cf9928
--- /dev/null
+++ b/apps/BaseStation/BaseStationC.nc
@@ -0,0 +1,101 @@
+// $Id: BaseStationC.nc,v 1.7 2010-06-29 22:07:13 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * The TinyOS 2.x base station that forwards packets between the UART
+ * and radio.It replaces the GenericBase of TinyOS 1.0 and the
+ * TOSBase of TinyOS 1.1.
+ *
+ * <p>On the serial link, BaseStation sends and receives simple active
+ * messages (not particular radio packets): on the radio link, it
+ * sends radio active messages, whose format depends on the network
+ * stack being used. BaseStation will copy its compiled-in group ID to
+ * messages moving from the serial link to the radio, and will filter
+ * out incoming radio messages that do not contain that group ID.</p>
+ *
+ * <p>BaseStation includes queues in both directions, with a guarantee
+ * that once a message enters a queue, it will eventually leave on the
+ * other interface. The queues allow the BaseStation to handle load
+ * spikes.</p>
+ *
+ * <p>BaseStation acknowledges a message arriving over the serial link
+ * only if that message was successfully enqueued for delivery to the
+ * radio link.</p>
+ *
+ * <p>The LEDS are programmed to toggle as follows:</p>
+ * <ul>
+ * <li><b>RED Toggle:</b>: Message bridged from serial to radio</li>
+ * <li><b>GREEN Toggle:</b> Message bridged from radio to serial</li>
+ * <li><b>YELLOW/BLUE Toggle:</b> Dropped message due to queue overflow in either direction</li>
+ * </ul>
+ *
+ * @author Phil Buonadonna
+ * @author Gilman Tolle
+ * @author David Gay
+ * @author Philip Levis
+ * @date August 10 2005
+ */
+
+configuration BaseStationC {
+}
+implementation {
+  components MainC, BaseStationP, LedsC;
+  components ActiveMessageC as Radio, SerialActiveMessageC as Serial;
+  
+  MainC.Boot <- BaseStationP;
+
+  BaseStationP.RadioControl -> Radio;
+  BaseStationP.SerialControl -> Serial;
+  
+  BaseStationP.UartSend -> Serial;
+  BaseStationP.UartReceive -> Serial.Receive;
+  BaseStationP.UartPacket -> Serial;
+  BaseStationP.UartAMPacket -> Serial;
+  
+  BaseStationP.RadioSend -> Radio;
+  BaseStationP.RadioReceive -> Radio.Receive;
+  BaseStationP.RadioSnoop -> Radio.Snoop;
+  BaseStationP.RadioPacket -> Radio;
+  BaseStationP.RadioAMPacket -> Radio;
+  
+  BaseStationP.Leds -> LedsC;
+}
diff --git a/apps/BaseStation/BaseStationP.nc b/apps/BaseStation/BaseStationP.nc
new file mode 100644
index 00000000..90968bf7
--- /dev/null
+++ b/apps/BaseStation/BaseStationP.nc
@@ -0,0 +1,314 @@
+// $Id: BaseStationP.nc,v 1.12 2010-06-29 22:07:14 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * @author Phil Buonadonna
+ * @author Gilman Tolle
+ * @author David Gay
+ * Revision:	$Id: BaseStationP.nc,v 1.12 2010-06-29 22:07:14 scipio Exp $
+ */
+  
+/* 
+ * BaseStationP bridges packets between a serial channel and the radio.
+ * Messages moving from serial to radio will be tagged with the group
+ * ID compiled into the BaseStation, and messages moving from radio to
+ * serial will be filtered by that same group id.
+ */
+
+#include "AM.h"
+#include "Serial.h"
+
+module BaseStationP @safe() {
+  uses {
+    interface Boot;
+    interface SplitControl as SerialControl;
+    interface SplitControl as RadioControl;
+
+    interface AMSend as UartSend[am_id_t id];
+    interface Receive as UartReceive[am_id_t id];
+    interface Packet as UartPacket;
+    interface AMPacket as UartAMPacket;
+    
+    interface AMSend as RadioSend[am_id_t id];
+    interface Receive as RadioReceive[am_id_t id];
+    interface Receive as RadioSnoop[am_id_t id];
+    interface Packet as RadioPacket;
+    interface AMPacket as RadioAMPacket;
+
+    interface Leds;
+  }
+}
+
+implementation
+{
+  enum {
+    UART_QUEUE_LEN = 12,
+    RADIO_QUEUE_LEN = 12,
+  };
+
+  message_t  uartQueueBufs[UART_QUEUE_LEN];
+  message_t  * ONE_NOK uartQueue[UART_QUEUE_LEN];
+  uint8_t    uartIn, uartOut;
+  bool       uartBusy, uartFull;
+
+  message_t  radioQueueBufs[RADIO_QUEUE_LEN];
+  message_t  * ONE_NOK radioQueue[RADIO_QUEUE_LEN];
+  uint8_t    radioIn, radioOut;
+  bool       radioBusy, radioFull;
+
+  task void uartSendTask();
+  task void radioSendTask();
+
+  void dropBlink() {
+    call Leds.led2Toggle();
+  }
+
+  void failBlink() {
+    call Leds.led2Toggle();
+  }
+
+  event void Boot.booted() {
+    uint8_t i;
+
+    for (i = 0; i < UART_QUEUE_LEN; i++)
+      uartQueue[i] = &uartQueueBufs[i];
+    uartIn = uartOut = 0;
+    uartBusy = FALSE;
+    uartFull = TRUE;
+
+    for (i = 0; i < RADIO_QUEUE_LEN; i++)
+      radioQueue[i] = &radioQueueBufs[i];
+    radioIn = radioOut = 0;
+    radioBusy = FALSE;
+    radioFull = TRUE;
+
+    call RadioControl.start();
+    call SerialControl.start();
+  }
+
+  event void RadioControl.startDone(error_t error) {
+    if (error == SUCCESS) {
+      radioFull = FALSE;
+    }
+  }
+
+  event void SerialControl.startDone(error_t error) {
+    if (error == SUCCESS) {
+      uartFull = FALSE;
+    }
+  }
+
+  event void SerialControl.stopDone(error_t error) {}
+  event void RadioControl.stopDone(error_t error) {}
+
+  uint8_t count = 0;
+
+  message_t* ONE receive(message_t* ONE msg, void* payload, uint8_t len);
+  
+  event message_t *RadioSnoop.receive[am_id_t id](message_t *msg,
+						    void *payload,
+						    uint8_t len) {
+    return receive(msg, payload, len);
+  }
+  
+  event message_t *RadioReceive.receive[am_id_t id](message_t *msg,
+						    void *payload,
+						    uint8_t len) {
+    return receive(msg, payload, len);
+  }
+
+  message_t* receive(message_t *msg, void *payload, uint8_t len) {
+    message_t *ret = msg;
+
+    atomic {
+      if (!uartFull)
+	{
+	  ret = uartQueue[uartIn];
+	  uartQueue[uartIn] = msg;
+
+	  uartIn = (uartIn + 1) % UART_QUEUE_LEN;
+	
+	  if (uartIn == uartOut)
+	    uartFull = TRUE;
+
+	  if (!uartBusy)
+	    {
+	      post uartSendTask();
+	      uartBusy = TRUE;
+	    }
+	}
+      else
+	dropBlink();
+    }
+    
+    return ret;
+  }
+
+  uint8_t tmpLen;
+  
+  task void uartSendTask() {
+    uint8_t len;
+    am_id_t id;
+    am_addr_t addr, src;
+    message_t* msg;
+    am_group_t grp;
+    atomic
+      if (uartIn == uartOut && !uartFull)
+	{
+	  uartBusy = FALSE;
+	  return;
+	}
+
+    msg = uartQueue[uartOut];
+    tmpLen = len = call RadioPacket.payloadLength(msg);
+    id = call RadioAMPacket.type(msg);
+    addr = call RadioAMPacket.destination(msg);
+    src = call RadioAMPacket.source(msg);
+    grp = call RadioAMPacket.group(msg);
+    call UartPacket.clear(msg);
+    call UartAMPacket.setSource(msg, src);
+    call UartAMPacket.setGroup(msg, grp);
+
+    if (call UartSend.send[id](addr, uartQueue[uartOut], len) == SUCCESS)
+      call Leds.led1Toggle();
+    else
+      {
+	failBlink();
+	post uartSendTask();
+      }
+  }
+
+  event void UartSend.sendDone[am_id_t id](message_t* msg, error_t error) {
+    if (error != SUCCESS)
+      failBlink();
+    else
+      atomic
+	if (msg == uartQueue[uartOut])
+	  {
+	    if (++uartOut >= UART_QUEUE_LEN)
+	      uartOut = 0;
+	    if (uartFull)
+	      uartFull = FALSE;
+	  }
+    post uartSendTask();
+  }
+
+  event message_t *UartReceive.receive[am_id_t id](message_t *msg,
+						   void *payload,
+						   uint8_t len) {
+    message_t *ret = msg;
+    bool reflectToken = FALSE;
+
+    atomic
+      if (!radioFull)
+	{
+	  reflectToken = TRUE;
+	  ret = radioQueue[radioIn];
+	  radioQueue[radioIn] = msg;
+	  if (++radioIn >= RADIO_QUEUE_LEN)
+	    radioIn = 0;
+	  if (radioIn == radioOut)
+	    radioFull = TRUE;
+
+	  if (!radioBusy)
+	    {
+	      post radioSendTask();
+	      radioBusy = TRUE;
+	    }
+	}
+      else
+	dropBlink();
+
+    if (reflectToken) {
+      //call UartTokenReceive.ReflectToken(Token);
+    }
+    
+    return ret;
+  }
+
+  task void radioSendTask() {
+    uint8_t len;
+    am_id_t id;
+    am_addr_t addr,source;
+    message_t* msg;
+    
+    atomic
+      if (radioIn == radioOut && !radioFull)
+	{
+	  radioBusy = FALSE;
+	  return;
+	}
+
+    msg = radioQueue[radioOut];
+    len = call UartPacket.payloadLength(msg);
+    addr = call UartAMPacket.destination(msg);
+    source = call UartAMPacket.source(msg);
+    id = call UartAMPacket.type(msg);
+
+    call RadioPacket.clear(msg);
+    call RadioAMPacket.setSource(msg, source);
+    
+    if (call RadioSend.send[id](addr, msg, len) == SUCCESS)
+      call Leds.led0Toggle();
+    else
+      {
+	failBlink();
+	post radioSendTask();
+      }
+  }
+
+  event void RadioSend.sendDone[am_id_t id](message_t* msg, error_t error) {
+    if (error != SUCCESS)
+      failBlink();
+    else
+      atomic
+	if (msg == radioQueue[radioOut])
+	  {
+	    if (++radioOut >= RADIO_QUEUE_LEN)
+	      radioOut = 0;
+	    if (radioFull)
+	      radioFull = FALSE;
+	  }
+    
+    post radioSendTask();
+  }
+}  
diff --git a/apps/BaseStation/Makefile b/apps/BaseStation/Makefile
new file mode 100644
index 00000000..98109ed5
--- /dev/null
+++ b/apps/BaseStation/Makefile
@@ -0,0 +1,7 @@
+COMPONENT=BaseStationC
+CFLAGS += -DCC2420_NO_ACKNOWLEDGEMENTS
+CFLAGS += -DCC2420_NO_ADDRESS_RECOGNITION
+CFLAGS += -DTASKLET_IS_TASK
+
+include $(MAKERULES)
+
diff --git a/apps/BaseStation/README.txt b/apps/BaseStation/README.txt
new file mode 100644
index 00000000..110eb04d
--- /dev/null
+++ b/apps/BaseStation/README.txt
@@ -0,0 +1,58 @@
+README for BaseStation
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+BaseStation is an application that acts as a simple Active Message
+bridge between the serial and radio links. It replaces the GenericBase
+of TinyOS 1.0 and the TOSBase of TinyOS 1.1.
+
+On the serial link, BaseStation sends and receives simple active
+messages (not particular radio packets): on the radio link, it sends
+radio active messages, whose format depends on the network stack being
+used. BaseStation will copy its compiled-in group ID to messages
+moving from the serial link to the radio, and will filter out incoming
+radio messages that do not contain that group ID.
+
+BaseStation includes queues in both directions, with a guarantee that
+once a message enters a queue, it will eventually leave on the other
+interface. The queues allow the BaseStation to handle load spikes more
+gracefully.
+
+BaseStation acknowledges a message arriving over the serial link only if
+that message was successfully enqueued for delivery to the radio link.
+
+The LEDS are programmed to toggle as follows:
+
+RED Toggle         - Message bridged from serial to radio
+GREEN Toggle       - Message bridged from radio to serial
+YELLOW/BLUE Toggle - Dropped message due to queue overflow 
+                     in either direction
+
+When using a CC2420 radio, several default preprocessor configurations
+are defined in the Makefile:
+  * CC2420_NO_ACKNOWLEDGEMENTS
+    - Prevents the base station from falsly acknowledging packets
+  * CC2420_NO_ADDRESS_RECOGNITION
+    - Allows the base station to sniff packets from any transmitter
+
+Other combinations can be defined to meet your application's needs:
+  * CC2420_NO_ADDRESS_RECOGNITION only
+    - Sniff all packets, but acknowledge packets only if they
+      are sent to the base station's address
+
+  * Removing all preprocessor definitions in the Makefile
+    - Only accept packets destined for the base station's address,
+      and acknowledge those packets
+
+
+Tools:
+
+support/sdk/java/net/tinyos/sf/SerialForwarder  
+
+See the TinyOS Tutorial on Mote-PC serial communication and
+SerialForwarder on docs.tinyos.net for more details.
+
+Known bugs/limitations:
+
+
diff --git a/apps/BaseStation15.4/BaseStationC.nc b/apps/BaseStation15.4/BaseStationC.nc
new file mode 100644
index 00000000..33893a99
--- /dev/null
+++ b/apps/BaseStation15.4/BaseStationC.nc
@@ -0,0 +1,98 @@
+// $Id: BaseStationC.nc,v 1.2 2010-06-29 22:07:14 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * The TinyOS 2.x base station that forwards packets between the UART
+ * and radio.It replaces the GenericBase of TinyOS 1.0 and the
+ * TOSBase of TinyOS 1.1.
+ *
+ * <p>On the serial link, BaseStation sends and receives simple active
+ * messages (not particular radio packets): on the radio link, it
+ * sends radio active messages, whose format depends on the network
+ * stack being used. BaseStation will copy its compiled-in group ID to
+ * messages moving from the serial link to the radio, and will filter
+ * out incoming radio messages that do not contain that group ID.</p>
+ *
+ * <p>BaseStation includes queues in both directions, with a guarantee
+ * that once a message enters a queue, it will eventually leave on the
+ * other interface. The queues allow the BaseStation to handle load
+ * spikes.</p>
+ *
+ * <p>BaseStation acknowledges a message arriving over the serial link
+ * only if that message was successfully enqueued for delivery to the
+ * radio link.</p>
+ *
+ * <p>The LEDS are programmed to toggle as follows:</p>
+ * <ul>
+ * <li><b>RED Toggle:</b>: Message bridged from serial to radio</li>
+ * <li><b>GREEN Toggle:</b> Message bridged from radio to serial</li>
+ * <li><b>YELLOW/BLUE Toggle:</b> Dropped message due to queue overflow in either direction</li>
+ * </ul>
+ *
+ * @author Phil Buonadonna
+ * @author Gilman Tolle
+ * @author David Gay
+ * @author Philip Levis
+ * @date August 10 2005
+ */
+
+configuration BaseStationC {
+}
+implementation {
+  components MainC, BaseStationP, LedsC;
+  components ActiveMessageC as Radio;
+  components Serial802_15_4C as Serial;
+  
+  MainC.Boot <- BaseStationP;
+
+  BaseStationP.RadioControl -> Radio;
+  BaseStationP.SerialControl -> Serial;
+  
+  BaseStationP.UartSend -> Serial;
+  
+  BaseStationP.RadioReceive -> Radio.Receive;
+  BaseStationP.RadioSnoop -> Radio.Snoop;
+  BaseStationP.RadioPacket -> Radio;
+  BaseStationP.RadioAMPacket -> Radio;
+  
+  BaseStationP.Leds -> LedsC;
+}
diff --git a/apps/BaseStation15.4/BaseStationP.nc b/apps/BaseStation15.4/BaseStationP.nc
new file mode 100644
index 00000000..cb4d1cef
--- /dev/null
+++ b/apps/BaseStation15.4/BaseStationP.nc
@@ -0,0 +1,207 @@
+// $Id: BaseStationP.nc,v 1.2 2010-06-29 22:07:14 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * @author Phil Buonadonna
+ * @author Gilman Tolle
+ * @author David Gay
+ * Revision:	$Id: BaseStationP.nc,v 1.2 2010-06-29 22:07:14 scipio Exp $
+ */
+  
+/* 
+ * BaseStationP bridges packets between a serial channel and the radio.
+ * Messages moving from serial to radio will be tagged with the group
+ * ID compiled into the TOSBase, and messages moving from radio to
+ * serial will be filtered by that same group id.
+ */
+
+#include "AM.h"
+#include "Serial.h"
+
+module BaseStationP {
+  uses {
+    interface Boot;
+    interface SplitControl as SerialControl;
+    interface SplitControl as RadioControl;
+
+    interface Send as UartSend;
+    
+    interface Receive as RadioReceive[am_id_t id];
+    interface Receive as RadioSnoop[am_id_t id];
+    interface Packet as RadioPacket;
+    interface AMPacket as RadioAMPacket;
+
+    interface Leds;
+  }
+}
+
+implementation
+{
+  enum {
+    UART_QUEUE_LEN = 12,
+    RADIO_QUEUE_LEN = 12,
+  };
+
+  message_t  uartQueueBufs[UART_QUEUE_LEN];
+  message_t  * ONE_NOK uartQueue[UART_QUEUE_LEN];
+  uint8_t    uartIn, uartOut;
+  bool       uartBusy, uartFull;
+
+  task void uartSendTask();
+
+  void dropBlink() {
+    call Leds.led2Toggle();
+  }
+
+  void failBlink() {
+    call Leds.led2Toggle();
+  }
+
+  event void Boot.booted() {
+    uint8_t i;
+
+    for (i = 0; i < UART_QUEUE_LEN; i++)
+      uartQueue[i] = &uartQueueBufs[i];
+    uartIn = uartOut = 0;
+    uartBusy = FALSE;
+    uartFull = TRUE;
+
+    call RadioControl.start();
+    call SerialControl.start();
+  }
+
+  event void RadioControl.startDone(error_t error) {
+  }
+
+  event void SerialControl.startDone(error_t error) {
+    if (error == SUCCESS) {
+      uartFull = FALSE;
+    }
+  }
+
+  event void SerialControl.stopDone(error_t error) {}
+  event void RadioControl.stopDone(error_t error) {}
+
+  uint8_t count = 0;
+
+  message_t* ONE receive(message_t* ONE msg, void* payload, uint8_t len);
+  
+  event message_t *RadioSnoop.receive[am_id_t id](message_t *msg,
+						    void *payload,
+						    uint8_t len) {
+    return receive(msg, payload, len);
+  }
+  
+  event message_t *RadioReceive.receive[am_id_t id](message_t *msg,
+						    void *payload,
+						    uint8_t len) {
+    return receive(msg, payload, len);
+  }
+
+  message_t* receive(message_t *msg, void *payload, uint8_t len) {
+    message_t *ret = msg;
+
+    atomic {
+      if (!uartFull)
+	{
+	  ret = uartQueue[uartIn];
+	  uartQueue[uartIn] = msg;
+
+	  uartIn = (uartIn + 1) % UART_QUEUE_LEN;
+	
+	  if (uartIn == uartOut)
+	    uartFull = TRUE;
+
+	  if (!uartBusy)
+	    {
+	      post uartSendTask();
+	      uartBusy = TRUE;
+	    }
+	}
+      else
+	dropBlink();
+    }
+    
+    return ret;
+  }
+
+  uint8_t tmpLen;
+  
+  task void uartSendTask() {
+    uint8_t len;
+    message_t* msg;
+
+    atomic {
+      if (uartIn == uartOut && !uartFull) {
+	uartBusy = FALSE;
+	return;
+      }
+    }
+
+    msg = uartQueue[uartOut];
+    tmpLen = len = call RadioPacket.payloadLength(msg);
+
+    if (call UartSend.send(uartQueue[uartOut], len) == SUCCESS) {
+      call Leds.led1Toggle();
+    }
+    else  {
+      failBlink();
+      post uartSendTask();
+    }
+  }
+
+  event void UartSend.sendDone(message_t* msg, error_t error) {
+    if (error != SUCCESS)
+      failBlink();
+    else
+      atomic
+	if (msg == uartQueue[uartOut])
+	  {
+	    if (++uartOut >= UART_QUEUE_LEN)
+	      uartOut = 0;
+	    if (uartFull)
+	      uartFull = FALSE;
+	  }
+    post uartSendTask();
+  }
+
+}  
diff --git a/apps/BaseStation15.4/Makefile b/apps/BaseStation15.4/Makefile
new file mode 100644
index 00000000..c58ce521
--- /dev/null
+++ b/apps/BaseStation15.4/Makefile
@@ -0,0 +1,14 @@
+COMPONENT=BaseStationC
+CFLAGS += -DCC2420_NO_ACKNOWLEDGEMENTS
+CFLAGS += -DCC2420_NO_ADDRESS_RECOGNITION
+
+BUILD_EXTRA_DEPS += seriallisten15-4
+CLEAN_EXTRA = seriallisten15-4.o seriallisten15-4
+
+seriallisten15-4: seriallisten15-4.o
+	gcc -o $@ $< $(TOSDIR)/../support/sdk/c/sf/libmote.a
+
+seriallisten15-4.o: seriallisten15-4.c
+	gcc -c -o $@ -I$(TOSDIR)/../support/sdk/c/sf -I$(TOSDIR)/lib/serial -I$(TOSDIR)/types $<
+
+include $(MAKERULES)
diff --git a/apps/BaseStation15.4/seriallisten15-4.c b/apps/BaseStation15.4/seriallisten15-4.c
new file mode 100644
index 00000000..e84272a3
--- /dev/null
+++ b/apps/BaseStation15.4/seriallisten15-4.c
@@ -0,0 +1,200 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "serialsource.h"
+
+static char *msgs[] = {
+  "unknown_packet_type",
+  "ack_timeout"	,
+  "sync"	,
+  "too_long"	,
+  "too_short"	,
+  "bad_sync"	,
+  "bad_crc"	,
+  "closed"	,
+  "no_memory"	,
+  "unix_error"
+};
+
+void stderr_msg(serial_source_msg problem)
+{
+  fprintf(stderr, "Note: %s\n", msgs[problem]);
+}
+
+enum {
+  TOS_SERIAL_802_15_4_ID = 2,
+};
+
+int main(int argc, char **argv)
+{
+  serial_source src;
+  int iframes = 0;
+  if (argc != 4) {
+    fprintf(stderr, "Usage: %s <iframe|tframe> <device> <rate> - dump packets from a serial port\n", argv[0]);
+    exit(2);
+  }
+
+  if (strncmp(argv[1], "tframe", strlen("tframe")) == 0) {
+    iframes = 0;
+  }
+  else if (strncmp(argv[1], "iframe", strlen("iframe")) == 0) {
+    iframes = 1;
+  }
+  else {
+    fprintf(stderr, "Usage: %s <iframe|tframe> <device> <rate> - dump packets from a serial port\n", argv[0]);
+    exit(3);
+  }
+
+  src = open_serial_source(argv[2], platform_baud_rate(argv[3]), 0, stderr_msg);
+
+  if (!src) {
+    fprintf(stderr, "Couldn't open serial port at %s:%s\n",
+	    argv[2], argv[3]);
+    exit(1);
+  }
+	      
+  for (;;)
+    {
+      int len, i, plen;
+      short fcf;
+      const unsigned char *packet = read_serial_packet(src, &len);
+      int intraPan = 0;
+      
+      if (!packet)
+	exit(0);
+      else if (packet[0] != TOS_SERIAL_802_15_4_ID) {
+	printf("bad packet (serial type is %02x, not %02x)\n", packet[0], TOS_SERIAL_802_15_4_ID);
+      }
+
+      plen = packet[1];
+      printf("Received packet of length %i: \n", plen);
+      if (plen != len) {
+	printf("Packet format error: read packet length (%hhx) is different than expected from frame (%hhx).\n", plen, len);
+      }
+      
+      i = 2;
+      // Read in FCF and i+=2
+      fcf = packet[i+1] << 8 | packet[i];
+      i += 2;
+      
+
+      {
+	if ((fcf & 0x7) == 0x01) {
+	  printf("  Frame type: data\n");
+	}
+	else if ((fcf & 0x7) == 0x02) {
+	  printf("  Frame type: acknowledgement\n");
+	}
+	else {
+	  printf("  Frame type: other\n");
+	}
+
+	printf("  Security: %s\n", (fcf & (1 << 3)) ? "enabled":"disabled");
+	printf("  Frame pending: %s\n", (fcf & (1 << 4)) ? "yes":"no");
+	printf("  Ack request: %s\n", (fcf & (1 << 5)) ? "yes":"no");
+	printf("  Intra-PAN: %s\n", (fcf & (1 << 6)) ? "yes":"no");
+	intraPan = (fcf & (1 << 6));
+      }
+
+
+      {
+	char seqno = packet[i++];
+	printf("  Sequence number: 0x%hhx\n", seqno);
+      }
+      
+      {
+	char addrLen = (fcf >> 10) & 0x3;
+	short saddr = 0;
+	long long laddr = 0;
+
+	// 16- and 64-bit destinations have a PAN ID
+	if (addrLen == 2 || addrLen == 3) { 
+	  short destPan = packet[i++] << 8 | packet[i++];
+	  printf("  Destination PAN: 0x%02hx\n", destPan);
+	}
+	
+	switch (addrLen) {
+	case 0:
+	  printf("  Destination address: none\n");
+	  break;
+	case 1:
+	  printf("  Destination address: invalid? (0x01)\n");
+	  break;
+	case 2:
+	  saddr =  (packet[i] << 8 | packet[i+1]);
+	  i += 2;
+	  printf("  Destination address: 0x%04hx\n", saddr);
+	  break;
+	case 3: {
+	  int j;
+	  for (j = 0; j < 8; j++) {
+	    laddr = laddr << 8;
+	    laddr |= packet[i++];
+	  }
+	  printf("  Destination address: 0x%016llx\n", laddr);
+	  break;
+	}
+	default:
+	  printf("  Destination address: parse serror\n");
+	}
+      }
+
+      
+      {
+	char addrLen = (fcf >> 14) & 0x3;
+	short saddr = 0;
+	long long laddr = 0;
+
+	if (!intraPan) { // Intra-PAN packet
+	  short srcPan = packet[i] << 8 | packet[i+1];
+	  i += 2;
+	  printf("  Source PAN: 0x%02hx\n", srcPan);
+	}
+	
+	switch (addrLen) {
+	case 0:
+	  printf("  Source address: none\n");
+	  break;
+	case 1:
+	  printf("  Source address: invalid? (0x01)\n");
+	  break;
+	case 2:
+	  saddr =  (packet[i] << 8 | packet[i + 1]);
+	  i += 2;
+	  printf("  Source address: 0x%04hx\n", saddr);
+	  break;
+	case 3: {
+	  int j;
+	  for (j = 0; j < 8; j++) {
+	    laddr = laddr << 8;
+	    laddr |= packet[i++];
+	  }
+	  printf("  Source address: 0x%016llx\n", laddr);
+	  break;
+	}
+	default:
+	  printf("  Source address: parse serror\n");
+	}
+      }
+
+      if (iframes) {
+	printf("  I-Frame: %s\n", (packet[i++] == 0x3f)? "yes":"no");
+      }
+      
+      printf("  AM type: 0x%02hhx\n", packet[i++]);
+
+      if (i >= plen) {
+	printf("Packet format error: read packet is shorter than expected.\n");
+      }
+      else {
+	printf("  Payload: ");
+	for (; i < plen; i++) {
+	  printf("0x%02hhx ", packet[i]);
+	}
+	printf("\n\n");
+	putchar('\n');
+      }
+      free((void *)packet);
+    }
+}
diff --git a/apps/Blink/BlinkAppC.nc b/apps/Blink/BlinkAppC.nc
new file mode 100644
index 00000000..5bce23a7
--- /dev/null
+++ b/apps/Blink/BlinkAppC.nc
@@ -0,0 +1,69 @@
+// $Id: BlinkAppC.nc,v 1.6 2010-06-29 22:07:14 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Blink is a basic application that toggles a mote's LED periodically.
+ * It does so by starting a Timer that fires every second. It uses the
+ * OSKI TimerMilli service to achieve this goal.
+ *
+ * @author tinyos-help@millennium.berkeley.edu
+ **/
+
+configuration BlinkAppC
+{
+}
+implementation
+{
+  components MainC, BlinkC, LedsC;
+  components new TimerMilliC() as Timer0;
+  components new TimerMilliC() as Timer1;
+  components new TimerMilliC() as Timer2;
+
+
+  BlinkC -> MainC.Boot;
+
+  BlinkC.Timer0 -> Timer0;
+  BlinkC.Timer1 -> Timer1;
+  BlinkC.Timer2 -> Timer2;
+  BlinkC.Leds -> LedsC;
+}
+
diff --git a/apps/Blink/BlinkC.nc b/apps/Blink/BlinkC.nc
new file mode 100644
index 00000000..ba60fb13
--- /dev/null
+++ b/apps/Blink/BlinkC.nc
@@ -0,0 +1,85 @@
+// $Id: BlinkC.nc,v 1.6 2010-06-29 22:07:16 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Implementation for Blink application.  Toggle the red LED when a
+ * Timer fires.
+ **/
+
+#include "Timer.h"
+
+module BlinkC @safe()
+{
+  uses interface Timer<TMilli> as Timer0;
+  uses interface Timer<TMilli> as Timer1;
+  uses interface Timer<TMilli> as Timer2;
+  uses interface Leds;
+  uses interface Boot;
+}
+implementation
+{
+  event void Boot.booted()
+  {
+    call Timer0.startPeriodic( 250 );
+    call Timer1.startPeriodic( 500 );
+    call Timer2.startPeriodic( 1000 );
+  }
+
+  event void Timer0.fired()
+  {
+    dbg("BlinkC", "Timer 0 fired @ %s.\n", sim_time_string());
+    call Leds.led0Toggle();
+  }
+  
+  event void Timer1.fired()
+  {
+    dbg("BlinkC", "Timer 1 fired @ %s \n", sim_time_string());
+    call Leds.led1Toggle();
+  }
+  
+  event void Timer2.fired()
+  {
+    dbg("BlinkC", "Timer 2 fired @ %s.\n", sim_time_string());
+    call Leds.led2Toggle();
+  }
+}
+
diff --git a/apps/Blink/Makefile b/apps/Blink/Makefile
new file mode 100644
index 00000000..1fd72f16
--- /dev/null
+++ b/apps/Blink/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=BlinkAppC
+include $(MAKERULES)
+
diff --git a/apps/Blink/README.txt b/apps/Blink/README.txt
new file mode 100644
index 00000000..a71b68aa
--- /dev/null
+++ b/apps/Blink/README.txt
@@ -0,0 +1,22 @@
+README for Blink
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+Blink is a simple application that blinks the 3 mote LEDs. It tests
+that the boot sequence and millisecond timers are working properly.
+The three LEDs blink at 1Hz, 2Hz, and 4Hz. Because each is driven by
+an independent timer, visual inspection can determine whether there are
+bugs in the timer system that are causing drift. Note that this 
+method is different than RadioCountToLeds, which fires a single timer
+at a steady rate and uses the bottom three bits of a counter to display
+on the LEDs.
+
+Tools:
+
+Known bugs/limitations:
+
+None.
+
+
+$Id: README.txt,v 1.4 2006-12-12 18:22:48 vlahan Exp $
diff --git a/apps/MViz/.cvsignore b/apps/MViz/.cvsignore
new file mode 100644
index 00000000..31ca81c8
--- /dev/null
+++ b/apps/MViz/.cvsignore
@@ -0,0 +1,4 @@
+build .*.swp
+build
+MVizMsg.class
+MVizMsg.java
diff --git a/apps/MViz/MViz.h b/apps/MViz/MViz.h
new file mode 100644
index 00000000..82b60d2e
--- /dev/null
+++ b/apps/MViz/MViz.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * @author David Gay
+ * @author Kyle Jamieson
+ * @author Phil Levis
+ */
+
+#ifndef MVIZ_H
+#define MVIZ_H
+
+#include "AM.h"
+
+enum {
+  /* Default sampling period. */
+  DEFAULT_INTERVAL = 1024,
+  AM_MVIZ_MSG = 0x93
+};
+
+typedef nx_struct mviz_msg {
+  nx_uint16_t version; /* Version of the interval. */
+  nx_uint16_t interval; /* Samping period. */
+  nx_uint16_t origin; /* Mote id of sending mote. */
+  nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */
+  nx_uint16_t reading;
+  nx_uint16_t etx;
+  nx_uint16_t link_route_value;
+  nx_am_addr_t link_route_addr;
+} mviz_msg_t;
+
+#endif
diff --git a/apps/MViz/MVizAppC.nc b/apps/MViz/MVizAppC.nc
new file mode 100644
index 00000000..56847e21
--- /dev/null
+++ b/apps/MViz/MVizAppC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * MViz demo application using the collection layer. 
+ * See README.txt file in this directory and TEP 119: Collection.
+ *
+ * @author David Gay
+ * @author Kyle Jamieson
+ * @author Philip Levis
+ */
+
+#include <MViz.h>
+
+configuration MVizAppC { }
+implementation {
+  components MainC, MVizC, LedsC, new TimerMilliC(), 
+    new MVizSensorC() as Sensor, RandomC;
+
+  //MainC.SoftwareInit -> Sensor;
+  
+  MVizC.Boot -> MainC;
+  MVizC.Timer -> TimerMilliC;
+  MVizC.Read -> Sensor;
+  MVizC.Leds -> LedsC;
+  MVizC.Random -> RandomC;
+  //
+  // Communication components.  These are documented in TEP 113:
+  // Serial Communication, and TEP 119: Collection.
+  //
+  components CollectionC as Collector,  // Collection layer
+    ActiveMessageC,                         // AM layer
+    new CollectionSenderC(AM_MVIZ_MSG), // Sends multihop RF
+    SerialActiveMessageC,                   // Serial messaging
+    new SerialAMSenderC(AM_MVIZ_MSG);   // Sends to the serial port
+
+  components CtpP as Ctp;
+  
+  MVizC.RadioControl -> ActiveMessageC;
+  MVizC.SerialControl -> SerialActiveMessageC;
+  MVizC.RoutingControl -> Collector;
+
+  MVizC.Send -> CollectionSenderC;
+  MVizC.SerialSend -> SerialAMSenderC.AMSend;
+  MVizC.Snoop -> Collector.Snoop[AM_MVIZ_MSG];
+  MVizC.Receive -> Collector.Receive[AM_MVIZ_MSG];
+  MVizC.RootControl -> Collector;
+  MVizC.CtpInfo -> Ctp;
+  MVizC.LinkEstimator -> Ctp;
+
+}
diff --git a/apps/MViz/MVizC.nc b/apps/MViz/MVizC.nc
new file mode 100644
index 00000000..f62a26cb
--- /dev/null
+++ b/apps/MViz/MVizC.nc
@@ -0,0 +1,243 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * MViz demo application using the collection layer. 
+ * See README.txt file in this directory and TEP 119: Collection.
+ *
+ * @author David Gay
+ * @author Kyle Jamieson
+ * @author Philip Levis
+ */
+
+#include "MViz.h"
+
+module MVizC @safe(){
+  uses {
+    // Interfaces for initialization:
+    interface Boot;
+    interface SplitControl as RadioControl;
+    interface SplitControl as SerialControl;
+    interface StdControl as RoutingControl;
+    
+    // Interfaces for communication, multihop and serial:
+    interface Send;
+    interface Receive as Snoop;
+    interface Receive;
+    interface AMSend as SerialSend;
+    interface CollectionPacket;
+    interface RootControl;
+
+    // Miscalleny:
+    interface Timer<TMilli>;
+    interface Read<uint16_t>;
+    interface Leds;
+    interface CtpInfo;
+    interface LinkEstimator;
+    interface Random;
+  }
+}
+
+implementation {
+  task void uartSendTask();
+  static void startTimer();
+  static void fatal_problem();
+  static void report_problem();
+  static void report_sent();
+  static void report_received();
+
+  uint8_t uartlen;
+  message_t sendbuf;
+  message_t uartbuf;
+  bool sendbusy=FALSE, uartbusy=FALSE;
+
+  /* Current local state - interval, version and accumulated readings */
+  mviz_msg_t local;
+
+  uint8_t reading; /* 0 to NREADINGS */
+
+  /* When we head an Oscilloscope message, we check it's sample count. If
+     it's ahead of ours, we "jump" forwards (set our count to the received
+     count). However, we must then suppress our next count increment. This
+     is a very simple form of "time" synchronization (for an abstract
+     notion of time). */
+  bool suppress_count_change;
+
+  // 
+  // On bootup, initialize radio and serial communications, and our
+  // own state variables.
+  //
+  event void Boot.booted() {
+    local.interval = DEFAULT_INTERVAL;
+    local.origin = TOS_NODE_ID;
+
+    // Beginning our initialization phases:
+    if (call RadioControl.start() != SUCCESS)
+      fatal_problem();
+
+    if (call RoutingControl.start() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void RadioControl.startDone(error_t error) {
+    if (error != SUCCESS)
+      fatal_problem();
+
+    if (sizeof(local) > call Send.maxPayloadLength())
+      fatal_problem();
+
+    if (call SerialControl.start() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void SerialControl.startDone(error_t error) {
+    if (error != SUCCESS)
+      fatal_problem();
+
+    // This is how to set yourself as a root to the collection layer:
+    if (local.origin % 500 == 0)
+      call RootControl.setRoot();
+
+    startTimer();
+  }
+
+  static void startTimer() {
+    call Timer.startPeriodic(local.interval);
+    reading = 0;
+  }
+
+  event void RadioControl.stopDone(error_t error) { }
+  event void SerialControl.stopDone(error_t error) { }
+
+  //
+  // Only the root will receive messages from this interface; its job
+  // is to forward them to the serial uart for processing on the pc
+  // connected to the sensor network.
+  //
+  event message_t*
+  Receive.receive(message_t* msg, void *payload, uint8_t len) {
+    if (uartbusy == FALSE) {
+      mviz_msg_t* in = (mviz_msg_t*)payload;
+      mviz_msg_t* out = (mviz_msg_t*)call SerialSend.getPayload(&uartbuf, sizeof(mviz_msg_t));
+      if (out == NULL) {
+	return msg;
+      }
+      else {
+	memcpy(out, in, sizeof(mviz_msg_t));
+      }
+      uartbusy = TRUE;
+      uartlen = sizeof(mviz_msg_t);
+      post uartSendTask();
+    }
+
+    return msg;
+  }
+
+  task void uartSendTask() {
+    if (call SerialSend.send(0xffff, &uartbuf, uartlen) != SUCCESS) {
+      uartbusy = FALSE;
+    }
+  }
+  //
+  // Overhearing other traffic in the network.
+  //
+  event message_t* 
+  Snoop.receive(message_t* msg, void* payload, uint8_t len) {
+    mviz_msg_t *omsg = payload;
+
+    report_received();
+
+    // If we receive a newer version, update our interval. 
+    if (omsg->version > local.version) {
+      local.version = omsg->version;
+      local.interval = omsg->interval;
+      startTimer();
+    }
+
+    // If we hear from a future count, jump ahead but suppress our own
+    // change.
+    if (omsg->count > local.count) {
+      local.count = omsg->count;
+      suppress_count_change = TRUE;
+    }
+
+    return msg;
+  }
+
+  /* At each sample period:
+     - if local sample buffer is full, send accumulated samples
+     - read next sample
+  */
+  event void Timer.fired() {
+    if (!sendbusy) {
+      mviz_msg_t *o = (mviz_msg_t *)call Send.getPayload(&sendbuf, sizeof(mviz_msg_t));
+      if (o == NULL) {
+	fatal_problem();
+	return;
+      }
+      memcpy(o, &local, sizeof(local));
+      if (call Send.send(&sendbuf, sizeof(local)) == SUCCESS)
+	sendbusy = TRUE;
+      else
+	report_problem();
+    }
+    
+    reading = 0;
+    /* Part 2 of cheap "time sync": increment our count if we didn't
+       jump ahead. */
+    if (!suppress_count_change)
+      local.count++;
+    suppress_count_change = FALSE;
+    call Timer.stop();
+    call Timer.startPeriodic(local.interval);    
+    if (call Read.read() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void Send.sendDone(message_t* msg, error_t error) {
+    if (error == SUCCESS)
+      report_sent();
+    else
+      report_problem();
+
+    sendbusy = FALSE;
+  }
+
+  event void Read.readDone(error_t result, uint16_t data) {
+    uint16_t val;
+    if (result != SUCCESS) {
+      data = 0xffff;
+      report_problem();
+    }
+    local.reading = data;
+    call CtpInfo.getEtx(&val);
+    local.etx = val;
+    call CtpInfo.getParent(&val);
+    local.link_route_addr = val;
+    local.link_route_value = call LinkEstimator.getLinkQuality(local.link_route_addr);
+  }
+  event void LinkEstimator.evicted(am_addr_t addr){}
+  
+  event void SerialSend.sendDone(message_t *msg, error_t error) {
+    uartbusy = FALSE;
+  }
+
+  // Use LEDs to report various status issues.
+  static void fatal_problem() { 
+    call Leds.led0On(); 
+    call Leds.led1On();
+    call Leds.led2On();
+    call Timer.stop();
+  }
+
+  static void report_problem() { call Leds.led0Toggle(); }
+  static void report_sent() { call Leds.led1Toggle(); }
+  static void report_received() { call Leds.led2Toggle(); }
+}
diff --git a/apps/MViz/MVizSensorC.nc b/apps/MViz/MVizSensorC.nc
new file mode 100644
index 00000000..10e96c3a
--- /dev/null
+++ b/apps/MViz/MVizSensorC.nc
@@ -0,0 +1,16 @@
+/**
+ * The default sensor for MViz is a simple sine wave.
+ *
+ * @author Philip Levis
+ */
+
+generic configuration MVizSensorC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation
+{
+  components new SineSensorC() as DemoChannel;
+
+  Read = DemoChannel;
+}
diff --git a/apps/MViz/Makefile b/apps/MViz/Makefile
new file mode 100644
index 00000000..47a26305
--- /dev/null
+++ b/apps/MViz/Makefile
@@ -0,0 +1,11 @@
+COMPONENT=MVizAppC
+CFLAGS += -I$(TOSDIR)/lib/net/ -I$(TOSDIR)/lib/net/ctp -I$(TOSDIR)/lib/net/4bitle -I.
+BUILD_EXTRA_DEPS = MVizMsg.class
+
+MVizMsg.java: MViz.h
+	mig -target=null -java-classname=MVizMsg java MViz.h mviz_msg -o $@
+
+MVizMsg.class: MVizMsg.java
+	javac MVizMsg.java
+
+include $(MAKERULES)
diff --git a/apps/MViz/README.txt b/apps/MViz/README.txt
new file mode 100644
index 00000000..a9df8794
--- /dev/null
+++ b/apps/MViz/README.txt
@@ -0,0 +1,41 @@
+README for MViz
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+MViz is a sample application for the MViz network visualization tool. The MViz
+application is a multihop collection network. Nodes whose (ID % 500) == 0 are
+collection roots. The application samples a platform's DemoSensorC and routes
+those values to the collection roots. The roots send the packets to the serial
+port, which the MViz java application then visualizes.
+
+To run this application, install the TinyOS application on several nodes, one
+of whom is a root. Then run the tos-mviz script with MVizMsg as a parameter:
+
+tos-mviz [-comm source] MVizMsg
+
+This will cause the MViz java tool to parse the fields of MVizMsg and make
+them displayable. As nodes send readings to the base station, they will be
+displayed in the GUI. 
+
+By default, the TinyOS program uses an artificial demonstration sensor that
+just generates a sine wave (MVizSensorC). To change the sensor that
+the MViz application uses, change the wiring in MVizAppC to your sensor
+of choice.
+
+Tools:
+
+The Java application lives in support/sdk/java/net/tinyos/mviz. It is
+invoked by the tos-mviz script, which is part of a TinyOS tools  distribution.
+The top-level Java class is net.tinyos.mviz.DDocument. To display a mote image,
+the tool looks for a mote.gif in either the local directory (default) or a 
+directory specified with the -dir parameter.
+
+Known bugs/limitations:
+
+Under Ubuntu Linux, the MViz Java visualization can be painfully slow.
+
+Notes:
+
+MViz configures a mote whose TOS_NODE_ID modulo 500 is zero to be a
+collection root. 
diff --git a/apps/MViz/mote.gif b/apps/MViz/mote.gif
new file mode 100644
index 00000000..bfb252dc
Binary files /dev/null and b/apps/MViz/mote.gif differ
diff --git a/apps/Makefile b/apps/Makefile
new file mode 100644
index 00000000..23fad055
--- /dev/null
+++ b/apps/Makefile
@@ -0,0 +1,50 @@
+#-*-makefile-*-
+######################################################################
+# 
+# Makes the entire suite of TinyOS applications for a given platform.
+#
+# Author: 	Martin Turon
+# Date:		August 18, 2005
+#
+######################################################################
+# $Id: Makefile,v 1.4 2006-12-12 18:22:48 vlahan Exp $
+
+# MAKECMDGOALS is the way to get the arguments passed into a Makefile ...
+TARGET=$(MAKECMDGOALS)
+NESDOC_TARGET=$(filter-out nesdoc,$(TARGET))
+
+# Here is a way to get the list of subdirectories in a Makefile ...
+ROOT=.
+SUBDIRS := $(shell find * -type d)
+
+# Okay, match any target, and recurse the subdirectories
+%: 
+	@for i in $(SUBDIRS); do \
+	  HERE=$$PWD; \
+	  if [ -f $$i/Makefile ]; then \
+	      echo Building ... $(PWD)/$$i; \
+	      echo make $(TARGET); \
+	      cd $$i; \
+	      $(MAKE) $(TARGET); \
+	      cd $$HERE; \
+	  fi; \
+	done
+
+BASEDIR = $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' )
+# The output directory for generated documentation
+DOCDIR = $(BASEDIR)/doc/nesdoc
+
+nesdoc:
+	@echo This target rebuilds documentation for all known platforms.
+	@echo It DOES NOT overwrite any existing documentation, thus, it 
+	@echo is best run after deleting all old documentation.
+	@echo
+	@echo To delete all old documentation, delete the contents of the
+	@echo $(DOCDIR) directory.
+	@echo
+	@echo Press Enter to continue, or ^C to abort.
+	@read
+	for platform in `ncc -print-platforms`; do \
+	  $(MAKE) $$platform docs.nohtml.preserve; \
+	  nesdoc -o $(DOCDIR) -html -target=$$platform; \
+	done
diff --git a/apps/MultihopOscilloscope/Makefile b/apps/MultihopOscilloscope/Makefile
new file mode 100644
index 00000000..68ec2cb2
--- /dev/null
+++ b/apps/MultihopOscilloscope/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=MultihopOscilloscopeAppC
+CFLAGS += -I$(TOSDIR)/lib/net/ -I$(TOSDIR)/lib/net/ctp  -I$(TOSDIR)/lib/net/4bitle
+
+include $(MAKERULES)
diff --git a/apps/MultihopOscilloscope/MultihopOscilloscope.h b/apps/MultihopOscilloscope/MultihopOscilloscope.h
new file mode 100644
index 00000000..5f040539
--- /dev/null
+++ b/apps/MultihopOscilloscope/MultihopOscilloscope.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+#ifndef MULTIHOP_OSCILLOSCOPE_H
+#define MULTIHOP_OSCILLOSCOPE_H
+
+enum {
+  /* Number of readings per message. If you increase this, you may have to
+     increase the message_t size. */
+  NREADINGS = 5,
+  /* Default sampling period. */
+  DEFAULT_INTERVAL = 1024,
+  AM_OSCILLOSCOPE = 0x93
+};
+
+typedef nx_struct oscilloscope {
+  nx_uint16_t version; /* Version of the interval. */
+  nx_uint16_t interval; /* Samping period. */
+  nx_uint16_t id; /* Mote id of sending mote. */
+  nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */
+  nx_uint16_t readings[NREADINGS];
+} oscilloscope_t;
+
+#endif
diff --git a/apps/MultihopOscilloscope/MultihopOscilloscopeAppC.nc b/apps/MultihopOscilloscope/MultihopOscilloscopeAppC.nc
new file mode 100644
index 00000000..f6fd2eff
--- /dev/null
+++ b/apps/MultihopOscilloscope/MultihopOscilloscopeAppC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * MultihopOscilloscope demo application using the collection layer. 
+ * See README.txt file in this directory and TEP 119: Collection.
+ *
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+configuration MultihopOscilloscopeAppC { }
+implementation {
+  components MainC, MultihopOscilloscopeC, LedsC, new TimerMilliC(), 
+    new DemoSensorC() as Sensor;
+
+  //MainC.SoftwareInit -> Sensor;
+  
+  MultihopOscilloscopeC.Boot -> MainC;
+  MultihopOscilloscopeC.Timer -> TimerMilliC;
+  MultihopOscilloscopeC.Read -> Sensor;
+  MultihopOscilloscopeC.Leds -> LedsC;
+
+  //
+  // Communication components.  These are documented in TEP 113:
+  // Serial Communication, and TEP 119: Collection.
+  //
+  components CollectionC as Collector,  // Collection layer
+    ActiveMessageC,                         // AM layer
+    new CollectionSenderC(AM_OSCILLOSCOPE), // Sends multihop RF
+    SerialActiveMessageC,                   // Serial messaging
+    new SerialAMSenderC(AM_OSCILLOSCOPE);   // Sends to the serial port
+
+  MultihopOscilloscopeC.RadioControl -> ActiveMessageC;
+  MultihopOscilloscopeC.SerialControl -> SerialActiveMessageC;
+  MultihopOscilloscopeC.RoutingControl -> Collector;
+
+  MultihopOscilloscopeC.Send -> CollectionSenderC;
+  MultihopOscilloscopeC.SerialSend -> SerialAMSenderC.AMSend;
+  MultihopOscilloscopeC.Snoop -> Collector.Snoop[AM_OSCILLOSCOPE];
+  MultihopOscilloscopeC.Receive -> Collector.Receive[AM_OSCILLOSCOPE];
+  MultihopOscilloscopeC.RootControl -> Collector;
+
+  components new PoolC(message_t, 10) as UARTMessagePoolP,
+    new QueueC(message_t*, 10) as UARTQueueP;
+
+  MultihopOscilloscopeC.UARTMessagePool -> UARTMessagePoolP;
+  MultihopOscilloscopeC.UARTQueue -> UARTQueueP;
+  
+  components new PoolC(message_t, 20) as DebugMessagePool,
+    new QueueC(message_t*, 20) as DebugSendQueue,
+    new SerialAMSenderC(AM_CTP_DEBUG) as DebugSerialSender,
+    UARTDebugSenderP as DebugSender;
+
+  DebugSender.Boot -> MainC;
+  DebugSender.UARTSend -> DebugSerialSender;
+  DebugSender.MessagePool -> DebugMessagePool;
+  DebugSender.SendQueue -> DebugSendQueue;
+  Collector.CollectionDebug -> DebugSender;
+
+}
diff --git a/apps/MultihopOscilloscope/MultihopOscilloscopeC.nc b/apps/MultihopOscilloscope/MultihopOscilloscopeC.nc
new file mode 100644
index 00000000..a7f39ca6
--- /dev/null
+++ b/apps/MultihopOscilloscope/MultihopOscilloscopeC.nc
@@ -0,0 +1,284 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * MultihopOscilloscope demo application using the collection layer. 
+ * See README.txt file in this directory and TEP 119: Collection.
+ *
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+#include "Timer.h"
+#include "MultihopOscilloscope.h"
+
+module MultihopOscilloscopeC @safe(){
+  uses {
+    // Interfaces for initialization:
+    interface Boot;
+    interface SplitControl as RadioControl;
+    interface SplitControl as SerialControl;
+    interface StdControl as RoutingControl;
+    
+    // Interfaces for communication, multihop and serial:
+    interface Send;
+    interface Receive as Snoop;
+    interface Receive;
+    interface AMSend as SerialSend;
+    interface CollectionPacket;
+    interface RootControl;
+
+    interface Queue<message_t *> as UARTQueue;
+    interface Pool<message_t> as UARTMessagePool;
+
+    // Miscalleny:
+    interface Timer<TMilli>;
+    interface Read<uint16_t>;
+    interface Leds;
+  }
+}
+
+implementation {
+  task void uartSendTask();
+  static void startTimer();
+  static void fatal_problem();
+  static void report_problem();
+  static void report_sent();
+  static void report_received();
+
+  uint8_t uartlen;
+  message_t sendbuf;
+  message_t uartbuf;
+  bool sendbusy=FALSE, uartbusy=FALSE;
+
+  /* Current local state - interval, version and accumulated readings */
+  oscilloscope_t local;
+
+  uint8_t reading; /* 0 to NREADINGS */
+
+  /* When we head an Oscilloscope message, we check it's sample count. If
+     it's ahead of ours, we "jump" forwards (set our count to the received
+     count). However, we must then suppress our next count increment. This
+     is a very simple form of "time" synchronization (for an abstract
+     notion of time). */
+  bool suppress_count_change;
+
+  // 
+  // On bootup, initialize radio and serial communications, and our
+  // own state variables.
+  //
+  event void Boot.booted() {
+    local.interval = DEFAULT_INTERVAL;
+    local.id = TOS_NODE_ID;
+    local.version = 0;
+
+    // Beginning our initialization phases:
+    if (call RadioControl.start() != SUCCESS)
+      fatal_problem();
+
+    if (call RoutingControl.start() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void RadioControl.startDone(error_t error) {
+    if (error != SUCCESS)
+      fatal_problem();
+
+    if (sizeof(local) > call Send.maxPayloadLength())
+      fatal_problem();
+
+    if (call SerialControl.start() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void SerialControl.startDone(error_t error) {
+    if (error != SUCCESS)
+      fatal_problem();
+
+    // This is how to set yourself as a root to the collection layer:
+    if (local.id % 500 == 0)
+      call RootControl.setRoot();
+
+    startTimer();
+  }
+
+  static void startTimer() {
+    if (call Timer.isRunning()) call Timer.stop();
+    call Timer.startPeriodic(local.interval);
+    reading = 0;
+  }
+
+  event void RadioControl.stopDone(error_t error) { }
+  event void SerialControl.stopDone(error_t error) { }
+
+  //
+  // Only the root will receive messages from this interface; its job
+  // is to forward them to the serial uart for processing on the pc
+  // connected to the sensor network.
+  //
+  event message_t*
+  Receive.receive(message_t* msg, void *payload, uint8_t len) {
+    oscilloscope_t* in = (oscilloscope_t*)payload;
+    oscilloscope_t* out;
+    if (uartbusy == FALSE) {
+      out = (oscilloscope_t*)call SerialSend.getPayload(&uartbuf, sizeof(oscilloscope_t));
+      if (len != sizeof(oscilloscope_t) || out == NULL) {
+	return msg;
+      }
+      else {
+	memcpy(out, in, sizeof(oscilloscope_t));
+      }
+      uartlen = sizeof(oscilloscope_t);
+      post uartSendTask();
+    } else {
+      // The UART is busy; queue up messages and service them when the
+      // UART becomes free.
+      message_t *newmsg = call UARTMessagePool.get();
+      if (newmsg == NULL) {
+        // drop the message on the floor if we run out of queue space.
+        report_problem();
+        return msg;
+      }
+
+      //Serial port busy, so enqueue.
+      out = (oscilloscope_t*)call SerialSend.getPayload(newmsg, sizeof(oscilloscope_t));
+      if (out == NULL) {
+	return msg;
+      }
+      memcpy(out, in, sizeof(oscilloscope_t));
+
+      if (call UARTQueue.enqueue(newmsg) != SUCCESS) {
+        // drop the message on the floor and hang if we run out of
+        // queue space without running out of queue space first (this
+        // should not occur).
+        call UARTMessagePool.put(newmsg);
+        fatal_problem();
+        return msg;
+      }
+    }
+
+    return msg;
+  }
+
+  task void uartSendTask() {
+    if (call SerialSend.send(0xffff, &uartbuf, uartlen) != SUCCESS) {
+      report_problem();
+    } else {
+      uartbusy = TRUE;
+    }
+  }
+
+  event void SerialSend.sendDone(message_t *msg, error_t error) {
+    uartbusy = FALSE;
+    if (call UARTQueue.empty() == FALSE) {
+      // We just finished a UART send, and the uart queue is
+      // non-empty.  Let's start a new one.
+      message_t *queuemsg = call UARTQueue.dequeue();
+      if (queuemsg == NULL) {
+        fatal_problem();
+        return;
+      }
+      memcpy(&uartbuf, queuemsg, sizeof(message_t));
+      if (call UARTMessagePool.put(queuemsg) != SUCCESS) {
+        fatal_problem();
+        return;
+      }
+      post uartSendTask();
+    }
+  }
+
+  //
+  // Overhearing other traffic in the network.
+  //
+  event message_t* 
+  Snoop.receive(message_t* msg, void* payload, uint8_t len) {
+    oscilloscope_t *omsg = payload;
+
+    report_received();
+
+    // If we receive a newer version, update our interval. 
+    if (omsg->version > local.version) {
+      local.version = omsg->version;
+      local.interval = omsg->interval;
+      startTimer();
+    }
+
+    // If we hear from a future count, jump ahead but suppress our own
+    // change.
+    if (omsg->count > local.count) {
+      local.count = omsg->count;
+      suppress_count_change = TRUE;
+    }
+
+    return msg;
+  }
+
+  /* At each sample period:
+     - if local sample buffer is full, send accumulated samples
+     - read next sample
+  */
+  event void Timer.fired() {
+    if (reading == NREADINGS) {
+      if (!sendbusy) {
+	oscilloscope_t *o = (oscilloscope_t *)call Send.getPayload(&sendbuf, sizeof(oscilloscope_t));
+	if (o == NULL) {
+	  fatal_problem();
+	  return;
+	}
+	memcpy(o, &local, sizeof(local));
+	if (call Send.send(&sendbuf, sizeof(local)) == SUCCESS)
+	  sendbusy = TRUE;
+        else
+          report_problem();
+      }
+      
+      reading = 0;
+      /* Part 2 of cheap "time sync": increment our count if we didn't
+         jump ahead. */
+      if (!suppress_count_change)
+        local.count++;
+      suppress_count_change = FALSE;
+    }
+
+    if (call Read.read() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void Send.sendDone(message_t* msg, error_t error) {
+    if (error == SUCCESS)
+      report_sent();
+    else
+      report_problem();
+
+    sendbusy = FALSE;
+  }
+
+  event void Read.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS) {
+      data = 0xffff;
+      report_problem();
+    }
+    if (reading < NREADINGS)
+      local.readings[reading++] = data;
+  }
+
+
+  // Use LEDs to report various status issues.
+  static void fatal_problem() { 
+    call Leds.led0On(); 
+    call Leds.led1On();
+    call Leds.led2On();
+    call Timer.stop();
+  }
+
+  static void report_problem() { call Leds.led0Toggle(); }
+  static void report_sent() { call Leds.led1Toggle(); }
+  static void report_received() { call Leds.led2Toggle(); }
+}
diff --git a/apps/MultihopOscilloscope/README.txt b/apps/MultihopOscilloscope/README.txt
new file mode 100644
index 00000000..05f0d20f
--- /dev/null
+++ b/apps/MultihopOscilloscope/README.txt
@@ -0,0 +1,46 @@
+README for MultihopOscilloscope
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+MultihopOscilloscope is a simple data-collection demo. It periodically samples
+the default sensor and broadcasts a message every few readings. These readings
+can be displayed by the Java "Oscilloscope" application found in the
+TOSROOT/apps/Oscilloscope/java subdirectory. The sampling rate starts at 4Hz,
+but can be changed from the Java application.
+
+You can compile MultihopOscilloscope with a sensor board's default sensor by
+compiling as follows:
+
+  SENSORBOARD=<sensorboard name> make <mote>
+
+You can change the sensor used by editing MultihopOscilloscopeAppC.nc.
+
+Tools:
+
+The Java application displays readings it receives from motes running the
+MultihopOscilloscope demo via a serial forwarder. To run it, change to the
+TOSROOT/apps/Oscilloscope/java subdirectory and type:
+
+  make
+  java net.tinyos.sf.SerialForwarder -comm serial@<serial port>:<mote>
+  # e.g., java net.tinyps.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2
+  # or java net.tinyps.sf.SerialForwarder -comm serial@COM2:telosb
+  ./run
+
+The controls at the bootom of the screen allow yoy to zoom in or out the X
+axis, change the range of the Y axis, and clear all received data. You can
+change the color used to display a mote by clicking on its color in the
+mote table.
+
+Known bugs/limitations:
+
+None.
+
+See also:
+TEP 113: Serial Communications, TEP 119: Collection.
+
+Notes:
+
+MultihopOscilloscope configures a mote whose TOS_NODE_ID modulo 500 is zero 
+to be a collection root.
diff --git a/apps/MultihopOscilloscope/java/ColorCellEditor.java b/apps/MultihopOscilloscope/java/ColorCellEditor.java
new file mode 100644
index 00000000..133fd2fa
--- /dev/null
+++ b/apps/MultihopOscilloscope/java/ColorCellEditor.java
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import javax.swing.table.*;
+import java.awt.*;
+import java.awt.event.*;
+
+/* Editor for table cells representing colors. Popup a color chooser. */
+public class ColorCellEditor extends AbstractCellEditor
+    implements TableCellEditor {
+    private Color color;
+    private JButton button;
+
+    public ColorCellEditor(String title) {
+    button = new JButton();
+    final JColorChooser chooser = new JColorChooser();
+    final JDialog dialog = JColorChooser.createDialog
+        (button, title, true, chooser,
+         new ActionListener() {
+         public void actionPerformed(ActionEvent e) {
+             color = chooser.getColor();
+         } },
+         null);
+
+    button.setBorderPainted(false);
+    button.addActionListener
+        (new ActionListener () {
+            public void actionPerformed(ActionEvent e) {
+            button.setBackground(color);
+            chooser.setColor(color);
+            dialog.setVisible(true);
+            fireEditingStopped();
+            } } );
+    
+    }
+
+    public Object getCellEditorValue() { return color; }
+    public Component getTableCellEditorComponent(JTable table,
+                                                 Object value,
+                                                 boolean isSelected,
+                                                 int row,
+                                                 int column) {
+        color = (Color)value;
+        return button;
+    }
+}
+
diff --git a/apps/MultihopOscilloscope/java/Data.java b/apps/MultihopOscilloscope/java/Data.java
new file mode 100644
index 00000000..7e6ff50a
--- /dev/null
+++ b/apps/MultihopOscilloscope/java/Data.java
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import java.util.*;
+
+/* Hold all data received from motes */
+class Data {
+    /* The mote data is stored in a flat array indexed by a mote's identifier.
+       A null value indicates no mote with that identifier. */
+    private Node[] nodes = new Node[256];
+    private Oscilloscope parent;
+
+    Data(Oscilloscope parent) {
+    this.parent = parent;
+    }
+
+    /* Data received from mote nodeId containing NREADINGS samples from
+       messageId * NREADINGS onwards. Tell parent if this is a new node. */
+    void update(int nodeId, int messageId, int readings[]) {
+    if (nodeId >= nodes.length) {
+        int newLength = nodes.length * 2;
+        if (nodeId >= newLength)
+        newLength = nodeId + 1;
+
+        Node newNodes[] = new Node[newLength];
+        System.arraycopy(nodes, 0, newNodes, 0, nodes.length);
+        nodes = newNodes;
+    }
+    Node node = nodes[nodeId];
+    if (node == null) {
+        nodes[nodeId] = node = new Node(nodeId);
+        parent.newNode(nodeId);
+    }
+    node.update(messageId, readings);
+    }
+
+    /* Return value of sample x for mote nodeId, or -1 for missing data */
+    int getData(int nodeId, int x) {
+    if (nodeId >= nodes.length || nodes[nodeId] == null)
+        return -1;
+    return nodes[nodeId].getData(x);
+    }
+
+    /* Return number of last known sample on mote nodeId. Returns 0 for
+       unknown motes. */
+    int maxX(int nodeId) {
+    if (nodeId >= nodes.length || nodes[nodeId] == null)
+        return 0;
+    return nodes[nodeId].maxX();
+    }
+
+    /* Return number of largest known sample on all motes (0 if there are no
+       motes) */
+    int maxX() {
+    int max = 0;
+
+    for (int i = 0; i < nodes.length; i++)
+        if (nodes[i] != null) {
+        int nmax = nodes[i].maxX();
+
+        if (nmax > max)
+            max = nmax;
+        }
+
+    return max;
+    }
+}
diff --git a/apps/MultihopOscilloscope/java/Graph.java b/apps/MultihopOscilloscope/java/Graph.java
new file mode 100644
index 00000000..8072f8f2
--- /dev/null
+++ b/apps/MultihopOscilloscope/java/Graph.java
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.awt.font.*;
+import java.awt.geom.*;
+import java.util.*;
+
+/* Panel for drawing mote-data graphs */
+class Graph extends JPanel
+{
+    final static int BORDER_LEFT = 40;
+    final static int BORDER_RIGHT = 0;
+    final static int BORDER_TOP = 10;
+    final static int BORDER_BOTTOM = 10;
+
+    final static int TICK_SPACING = 40;
+    final static int MAX_TICKS = 16;
+    final static int TICK_WIDTH = 10;
+
+    final static int MIN_WIDTH = 50;
+
+    int gx0, gx1, gy0, gy1; // graph bounds
+    int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale
+    Window parent;
+
+    /* Graph to screen coordinate conversion support */
+    int height, width;
+    double xscale, yscale;
+
+    void updateConversion() {
+    height = getHeight() - BORDER_TOP - BORDER_BOTTOM;
+    width = getWidth() - BORDER_LEFT - BORDER_RIGHT;
+    if (height < 1) 
+        height = 1;
+    if (width < 1)
+        width = 1;
+    xscale = (double)width / (gx1 - gx0 + 1);
+    yscale = (double)height / (gy1 - gy0 + 1);
+    }
+
+    Graphics makeClip(Graphics g) {
+    return g.create(BORDER_LEFT, BORDER_TOP, width, height);
+    }
+
+    // Note that these do not include the border offset!
+    int screenX(int gx) {
+    return (int)(xscale * (gx - gx0) + 0.5);
+    }
+
+    int screenY(int gy) {
+    return (int)(height - yscale * (gy - gy0));
+    }
+
+    int graphX(int sx) {
+    return (int)(sx / xscale + gx0 + 0.5);
+    }
+
+    Graph(Window parent) {
+    this.parent = parent;
+    gy0 = 0; gy1 = 0xffff;
+    gx0 = 0; gx1 = MIN_WIDTH << scale;
+    }
+
+    void rightDrawString(Graphics2D g, String s, int x, int y) {
+    TextLayout layout =
+        new TextLayout(s, parent.smallFont, g.getFontRenderContext());
+    Rectangle2D bounds = layout.getBounds();
+    layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2);
+    }
+
+    protected void paintComponent(Graphics g) {
+    Graphics2D g2d = (Graphics2D)g;
+
+    /* Repaint. Synchronize on Oscilloscope to avoid data changing.
+       Simply clear panel, draw Y axis and all the mote graphs. */
+    synchronized (parent.parent) {
+        updateConversion();
+        g2d.setColor(Color.BLACK);
+        g2d.fillRect(0, 0, getWidth(), getHeight());
+        drawYAxis(g2d);
+
+        Graphics clipped = makeClip(g2d);
+        int count = parent.moteListModel.size();
+        for (int i = 0; i < count; i++) {
+        clipped.setColor(parent.moteListModel.getColor(i));
+        drawGraph(clipped, parent.moteListModel.get(i));
+        }
+    }
+    }
+
+    /* Draw the Y-axis */
+    protected void drawYAxis(Graphics2D g) {
+    int axis_x = BORDER_LEFT - 1;
+    int height = getHeight() - BORDER_BOTTOM - BORDER_TOP;
+
+    g.setColor(Color.WHITE);
+    g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1);
+
+    /* Draw a reasonable set of tick marks */
+    int nTicks = height / TICK_SPACING;
+    if (nTicks > MAX_TICKS)
+        nTicks = MAX_TICKS;
+
+    int tickInterval = (gy1 - gy0 + 1) / nTicks;
+    if (tickInterval == 0)
+        tickInterval = 1;
+
+    /* Tick interval should be of the family A * 10^B,
+       where A = 1, 2 * or 5. We tend more to rounding A up, to reduce
+       rather than increase the number of ticks. */
+    int B = (int)(Math.log(tickInterval) / Math.log(10));
+    int A = (int)(tickInterval / Math.pow(10, B) + 0.5);
+    if (A > 2) A = 5;
+    else if (A > 5) A = 10;
+
+    tickInterval = A * (int)Math.pow(10, B);
+
+    /* Ticks are printed at multiples of tickInterval */
+    int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval;
+    while (tick <= gy1) {
+        int stick = screenY(tick) + BORDER_TOP;
+        rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick);
+        g.drawLine(axis_x - TICK_WIDTH / 2, stick,
+               axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick);
+        tick += tickInterval;
+    }
+    
+    }
+
+    /* Draw graph for mote nodeId */
+    protected void drawGraph(Graphics g, int nodeId) {
+    SingleGraph sg = new SingleGraph(g, nodeId);
+
+    if (gx1 - gx0 >= width) // More points than pixels-iterate by pixel
+        for (int sx = 0; sx < width; sx++)
+        sg.nextPoint(g, graphX(sx), sx);
+    else // Less points than pixel-iterate by points
+        for (int gx = gx0; gx <= gx1; gx++)
+        sg.nextPoint(g, gx, screenX(gx));
+    }
+
+    /* Inner class to simplify drawing a graph. Simplify initialise it, then
+       feed it the X screen and graph coordinates, from left to right. */
+    private class SingleGraph {
+    int lastsx, lastsy, nodeId;
+
+    /* Start drawing the graph mote id */
+    SingleGraph(Graphics g, int id) {
+        nodeId = id;
+        lastsx = -1;
+        lastsy = -1;
+    }
+
+    /* Next point in mote's graph is at x value gx, screen coordinate sx */
+    void nextPoint(Graphics g, int gx, int sx) {
+        int gy = parent.parent.data.getData(nodeId, gx);
+        int sy = -1;
+
+        if (gy >= 0) { // Ignore missing values
+        double rsy = height - yscale * (gy - gy0);
+
+        // Ignore problem values
+        if (rsy >= -1e6 && rsy <= 1e6)
+            sy = (int)(rsy + 0.5);
+
+        if (lastsy >= 0 && sy >= 0)
+            g.drawLine(lastsx, lastsy, sx, sy);
+        }
+        lastsx = sx;
+        lastsy = sy;
+    }
+    }
+
+    /* Update X-axis range in GUI */
+    void updateXLabel() {
+    parent.xLabel.setText("X: " + gx0 + " - " + gx1);
+    }
+
+    /* Ensure that graph is nicely positioned on screen. max is the largest 
+       sample number received from any mote. */
+    private void recenter(int max) {
+    // New data will show up at the 3/4 point
+    // The 2nd term ensures that gx1 will be >= max
+    int scrollby = ((gx1 - gx0) >> 2) + (max - gx1);
+    gx0 += scrollby;
+    gx1 += scrollby;
+    if (gx0 < 0) { // don't bother showing negative sample numbers
+        gx1 -= gx0;
+        gx0 = 0;
+    }
+    updateXLabel();
+    }
+
+    /* New data received. Redraw graph, scrolling if necessary */
+    void newData() {
+    int max = parent.parent.data.maxX();
+
+    if (max > gx1 || max < gx0) // time to scroll
+        recenter(max);
+    repaint();
+    }
+
+    /* User set the X-axis scale to newScale */
+    void setScale(int newScale) {
+    gx1 = gx0 + (MIN_WIDTH << newScale);
+    scale = newScale;
+    recenter(parent.parent.data.maxX());
+    repaint();
+    }
+
+    /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus
+       values (return false), or accept, redraw and return true. */
+    boolean setYAxis(int newy0, int newy1) {
+    if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 ||
+        newy1 < 0 || newy1 > 65535)
+        return false;
+    gy0 = newy0;
+    gy1 = newy1;
+    repaint();
+    return true;
+    }
+}
diff --git a/apps/MultihopOscilloscope/java/Makefile b/apps/MultihopOscilloscope/java/Makefile
new file mode 100644
index 00000000..55c2605b
--- /dev/null
+++ b/apps/MultihopOscilloscope/java/Makefile
@@ -0,0 +1,21 @@
+GEN=OscilloscopeMsg.java Constants.java
+
+all: oscilloscope.jar
+
+oscilloscope.jar: Oscilloscope.class
+	jar cf $@ *.class
+
+OscilloscopeMsg.java: ../MultihopOscilloscope.h
+	mig -target=null -java-classname=OscilloscopeMsg java ../MultihopOscilloscope.h oscilloscope -o $@
+
+Constants.java: ../MultihopOscilloscope.h
+	ncg -target=null -java-classname=Constants java ../MultihopOscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@
+
+Oscilloscope.class: $(wildcard *.java) $(GEN)
+	javac *.java
+
+clean:
+	rm -f *.class $(GEN)
+
+veryclean: clean
+	rm oscilloscope.jar
diff --git a/apps/MultihopOscilloscope/java/Node.java b/apps/MultihopOscilloscope/java/Node.java
new file mode 100644
index 00000000..1d434946
--- /dev/null
+++ b/apps/MultihopOscilloscope/java/Node.java
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Class holding all data received from a mote.
+ */
+class Node {
+    /* Data is hold in an array whose size is a multiple of INCREMENT, and
+       INCREMENT itself must be a multiple of Constant.NREADINGS. This
+       simplifies handling the extension and clipping of old data
+       (see setEnd) */
+    final static int INCREMENT = 100 * Constants.NREADINGS;
+    final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT
+
+    /* The mote's identifier */
+    int id;
+
+    /* Data received from the mote. data[0] is the dataStart'th sample
+       Indexes 0 through dataEnd - dataStart - 1 hold data.
+       Samples are 16-bit unsigned numbers, -1 indicates missing data. */
+    int[] data;
+    int dataStart, dataEnd;
+
+    Node(int _id) {
+    id = _id;
+    }
+
+    /* Update data to hold received samples newDataIndex .. newEnd.
+       If we receive data with a lower index, we discard newer data
+       (we assume the mote rebooted). */
+    private void setEnd(int newDataIndex, int newEnd) {
+    if (newDataIndex < dataStart || data == null) {
+        /* New data is before the start of what we have. Just throw it
+           all away and start again */
+        dataStart = newDataIndex;
+        data = new int[INCREMENT];
+    }
+    if (newEnd > dataStart + data.length) {
+        /* Try extending first */
+        if (data.length < MAX_SIZE) {
+        int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT;
+        if (newLength >= MAX_SIZE)
+            newLength = MAX_SIZE;
+
+        int[] newData = new int[newLength];
+        System.arraycopy(data, 0, newData, 0, data.length);
+        data = newData;
+
+        }
+        if (newEnd > dataStart + data.length) {
+        /* Still doesn't fit. Squish.
+           We assume INCREMENT >= (newEnd - newDataIndex), and ensure
+           that dataStart + data.length - INCREMENT = newDataIndex */
+        int newStart = newDataIndex + INCREMENT - data.length;
+
+        if (dataStart + data.length > newStart)
+            System.arraycopy(data, newStart - dataStart, data, 0,
+                     data.length - (newStart - dataStart));
+        dataStart = newStart;
+        }
+    }
+    /* Mark any missing data as invalid */
+    for (int i = dataEnd < dataStart ? dataStart : dataEnd;
+         i < newDataIndex; i++)
+        data[i - dataStart] = -1;
+
+    /* If we receive a count less than the old count, we assume the old
+       data is invalid */
+    dataEnd = newEnd;
+
+    }
+
+    /* Data received containing NREADINGS samples from messageId * NREADINGS 
+       onwards */
+    void update(int messageId, int readings[]) {
+    int start = messageId * Constants.NREADINGS;
+    setEnd(start, start + Constants.NREADINGS);
+    for (int i = 0; i < readings.length; i++)
+        data[start - dataStart + i] = readings[i];
+    }
+
+    /* Return value of sample x, or -1 for missing data */
+    int getData(int x) {
+    if (x < dataStart || x >= dataEnd)
+        return -1;
+    else
+        return data[x - dataStart];
+    }
+
+    /* Return number of last known sample */
+    int maxX() {
+    return dataEnd - 1;
+    }
+}
diff --git a/apps/MultihopOscilloscope/java/Oscilloscope.java b/apps/MultihopOscilloscope/java/Oscilloscope.java
new file mode 100644
index 00000000..fc898a92
--- /dev/null
+++ b/apps/MultihopOscilloscope/java/Oscilloscope.java
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import net.tinyos.message.*;
+import net.tinyos.util.*;
+import java.io.*;
+
+/* The "Oscilloscope" demo app. Displays graphs showing data received from
+   the Oscilloscope mote application, and allows the user to:
+   - zoom in or out on the X axis
+   - set the scale on the Y axis
+   - change the sampling period
+   - change the color of each mote's graph
+   - clear all data
+
+   This application is in three parts:
+   - the Node and Data objects store data received from the motes and support
+     simple queries
+   - the Window and Graph and miscellaneous support objects implement the
+     GUI and graph drawing
+   - the Oscilloscope object talks to the motes and coordinates the other
+     objects
+
+   Synchronization is handled through the Oscilloscope object. Any operation
+   that reads or writes the mote data must be synchronized on Oscilloscope.
+   Note that the messageReceived method below is synchronized, so no further
+   synchronization is needed when updating state based on received messages.
+*/
+public class Oscilloscope implements MessageListener
+{
+    MoteIF mote;
+    Data data;
+    Window window;
+
+    /* The current sampling period. If we receive a message from a mote
+       with a newer version, we update our interval. If we receive a message
+       with an older version, we broadcast a message with the current interval
+       and version. If the user changes the interval, we increment the
+       version and broadcast the new interval and version. */
+    int interval = Constants.DEFAULT_INTERVAL;
+    int version = -1;
+
+    /* Main entry point */
+    void run() {
+    data = new Data(this);
+    window = new Window(this);
+    window.setup();
+    mote = new MoteIF(PrintStreamMessenger.err);
+    mote.registerListener(new OscilloscopeMsg(), this);
+    }
+
+    /* The data object has informed us that nodeId is a previously unknown
+       mote. Update the GUI. */
+    void newNode(int nodeId) {
+    window.newNode(nodeId);
+    }
+
+    synchronized public void messageReceived(int dest_addr, Message msg) {
+    if (msg instanceof OscilloscopeMsg) {
+        OscilloscopeMsg omsg = (OscilloscopeMsg)msg;
+
+        /* Update interval and mote data */
+        periodUpdate(omsg.get_version(), omsg.get_interval());
+        data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings());
+
+        /* Inform the GUI that new data showed up */
+        window.newData();
+    }
+    }
+
+    /* A potentially new version and interval has been received from the
+       mote */
+    void periodUpdate(int moteVersion, int moteInterval) {
+    if (moteVersion > version) {
+        /* It's new. Update our vision of the interval. */
+        version = moteVersion;
+        interval = moteInterval;
+        window.updateSamplePeriod();
+    }
+    else if (moteVersion < version) {
+        /* It's old. Update the mote's vision of the interval. */
+        sendInterval();
+    }
+    }
+
+    /* The user wants to set the interval to newPeriod. Refuse bogus values
+       and return false, or accept the change, broadcast it, and return
+       true */
+    synchronized boolean setInterval(int newPeriod) {
+    if (newPeriod < 1 || newPeriod > 65535)
+        return false;
+    interval = newPeriod;
+    version++;
+    sendInterval();
+    return true;
+    }
+
+    /* Broadcast a version+interval message. */
+    void sendInterval() {
+    OscilloscopeMsg omsg = new OscilloscopeMsg();
+
+    omsg.set_version(version);
+    omsg.set_interval(interval);
+    try {
+        mote.send(MoteIF.TOS_BCAST_ADDR, omsg);
+    }
+    catch (IOException e) {
+        window.error("Cannot send message to mote");
+    }
+    }
+
+    /* User wants to clear all data. */
+    void clear() {
+    data = new Data(this);
+    }
+
+    public static void main(String[] args) {
+    Oscilloscope me = new Oscilloscope();
+    me.run();
+    }
+}
diff --git a/apps/MultihopOscilloscope/java/Window.java b/apps/MultihopOscilloscope/java/Window.java
new file mode 100644
index 00000000..8ece96c9
--- /dev/null
+++ b/apps/MultihopOscilloscope/java/Window.java
@@ -0,0 +1,299 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import javax.swing.table.*;
+import javax.swing.event.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.util.*;
+
+/* The main GUI object. Build the GUI and coordinate all user activities */
+class Window
+{
+    Oscilloscope parent;
+    Graph graph;
+
+    Font smallFont = new Font("Dialog", Font.PLAIN, 8);
+    Font boldFont = new Font("Dialog", Font.BOLD, 12);
+    Font normalFont = new Font("Dialog", Font.PLAIN, 12);
+    MoteTableModel moteListModel; // GUI view of mote list
+    JLabel xLabel; // Label displaying X axis range
+    JTextField sampleText, yText; // inputs for sample period and Y axis range
+    JFrame frame;
+
+    Window(Oscilloscope parent) {
+    this.parent = parent;
+    }
+
+    /* A model for the mote table, and general utility operations on the mote
+       list */
+    class MoteTableModel extends AbstractTableModel {
+    private ArrayList motes = new ArrayList();
+    private ArrayList colors = new ArrayList();
+
+    /* Initial mote colors cycle through this list. Add more colors if
+       you want. */
+    private Color[] cycle = {
+        Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA,
+        Color.YELLOW, Color.GRAY, Color.YELLOW
+    };
+    int cycleIndex;
+
+    /* TableModel methods for achieving our table appearance */
+    public String getColumnName(int col) {
+        if (col == 0) {
+        return "Mote";
+        }
+        else {
+        return "Color";
+        }
+    }
+    public int getColumnCount() { return 2; }
+    public synchronized int getRowCount() { return motes.size(); }
+    public synchronized Object getValueAt(int row, int col) {
+        if (col == 0) {
+        return motes.get(row);
+        }
+        else {
+        return colors.get(row);
+        }
+    }
+        public Class getColumnClass(int col) {
+            return getValueAt(0, col).getClass();
+        }
+    public boolean isCellEditable(int row, int col) { return col == 1; }
+        public synchronized void setValueAt(Object value, int row, int col) {
+        colors.set(row, value);
+            fireTableCellUpdated(row, col);
+        graph.repaint();
+        }
+
+    /* Return mote id of i'th mote */
+    int get(int i) { return ((Integer)motes.get(i)).intValue(); }
+    
+    /* Return color of i'th mote */
+    Color getColor(int i)  { return (Color)colors.get(i); }
+
+    /* Return number of motes */
+    int size() { return motes.size(); }
+
+    /* Add a new mote */
+    synchronized void newNode(int nodeId) {
+        /* Shock, horror. No binary search. */
+        int i, len = motes.size();
+
+        for (i = 0; ; i++)
+        if (i == len || nodeId < get(i)) {
+            motes.add(i, new Integer(nodeId));
+            // Cycle through a set of initial colors
+            colors.add(i, cycle[cycleIndex++ % cycle.length]);
+            break;
+        }
+        fireTableRowsInserted(i, i);
+    }
+
+    /* Remove all motes */
+    void clear() {
+        motes = new ArrayList();
+        colors = new ArrayList();
+        fireTableDataChanged();
+    }
+    }
+
+    /* A simple full-color cell */
+    static class MoteColor extends JLabel implements TableCellRenderer {
+    public MoteColor() { setOpaque(true); }
+    public Component getTableCellRendererComponent
+        (JTable table, Object color,
+         boolean isSelected, boolean hasFocus, int row, int column) {
+        setBackground((Color)color);
+        return this;
+    }
+    }
+
+    /* Convenience methods for making buttons, labels and textfields.
+       Simplifies code and ensures a consistent style. */
+
+    JButton makeButton(String label, ActionListener action) {
+    JButton button = new JButton();
+        button.setText(label);
+        button.setFont(boldFont);
+    button.addActionListener(action);
+    return button;
+    }
+
+    JLabel makeLabel(String txt, int alignment) {
+    JLabel label = new JLabel(txt, alignment);
+    label.setFont(boldFont);
+    return label;
+    }
+
+    JLabel makeSmallLabel(String txt, int alignment) {
+    JLabel label = new JLabel(txt, alignment);
+    label.setFont(smallFont);
+    return label;
+    }
+
+    JTextField makeTextField(int columns, ActionListener action) {
+    JTextField tf = new JTextField(columns);
+    tf.setFont(normalFont);
+    tf.setMaximumSize(tf.getPreferredSize());
+    tf.addActionListener(action);
+    return tf;
+    }
+
+    /* Build the GUI */
+    void setup() {
+    JPanel main = new JPanel(new BorderLayout());
+
+    main.setMinimumSize(new Dimension(500, 250));
+    main.setPreferredSize(new Dimension(800, 400));
+
+    // Three panels: mote list, graph, controls
+    moteListModel = new  MoteTableModel();
+    JTable moteList = new JTable(moteListModel);
+    moteList.setDefaultRenderer(Color.class, new MoteColor());
+    moteList.setDefaultEditor(Color.class, new ColorCellEditor("Pick Mote Color"));
+    moteList.setPreferredScrollableViewportSize(new Dimension(100, 400));
+    JScrollPane motePanel = new JScrollPane();
+    motePanel.getViewport().add(moteList, null);
+    main.add(motePanel, BorderLayout.WEST);
+
+    graph = new Graph(this);
+    main.add(graph, BorderLayout.CENTER);
+
+    // Controls. Organised using box layouts.
+
+    // Sample period.
+    JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT);
+    sampleText = makeTextField(6, new ActionListener() {
+        public void actionPerformed(ActionEvent e) { setSamplePeriod(); }
+        } );
+    updateSamplePeriod();
+
+    // Clear data.
+    JButton clearButton = makeButton("Clear data", new ActionListener() {
+        public void actionPerformed(ActionEvent e) { clearData(); }
+        } );
+
+    // Adjust X-axis zoom.
+    Box xControl = new Box(BoxLayout.Y_AXIS);
+    xLabel = makeLabel("", JLabel.CENTER);
+    final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale);
+    Hashtable xTable = new Hashtable();
+    for (int i = 0; i <= 8; i += 2)
+        xTable.put(new Integer(i),
+               makeSmallLabel("" + (Graph.MIN_WIDTH << i),
+                      JLabel.CENTER));
+    xSlider.setLabelTable(xTable);
+    xSlider.setPaintLabels(true);
+    graph.updateXLabel();
+    graph.setScale(graph.scale);
+    xSlider.addChangeListener(new ChangeListener() {
+        public void stateChanged(ChangeEvent e) {
+            //if (!xSlider.getValueIsAdjusting())
+            graph.setScale((int)xSlider.getValue());
+        }
+        });
+    xControl.add(xLabel);
+    xControl.add(xSlider);
+
+    // Adjust Y-axis range.
+    JLabel yLabel = makeLabel("Y:", JLabel.RIGHT);
+    yText = makeTextField(12, new ActionListener() {
+        public void actionPerformed(ActionEvent e) { setYAxis(); }
+        } );
+    yText.setText(graph.gy0 + " - " + graph.gy1);
+
+    Box controls = new Box(BoxLayout.X_AXIS);
+    controls.add(clearButton);
+    controls.add(Box.createHorizontalGlue());
+    controls.add(Box.createRigidArea(new Dimension(20, 0)));
+    controls.add(sampleLabel);
+    controls.add(sampleText);
+    controls.add(Box.createHorizontalGlue());
+    controls.add(Box.createRigidArea(new Dimension(20, 0)));
+    controls.add(xControl);
+    controls.add(yLabel);
+    controls.add(yText);
+    main.add(controls, BorderLayout.SOUTH);
+
+    // The frame part
+    frame = new JFrame("Oscilloscope");
+    frame.setSize(main.getPreferredSize());
+    frame.getContentPane().add(main);
+    frame.setVisible(true);
+    frame.addWindowListener(new WindowAdapter() {
+        public void windowClosing(WindowEvent e) { System.exit(0); }
+        });
+    }
+
+    /* User operation: clear data */
+    void clearData() {
+    synchronized (parent) {
+        moteListModel.clear();
+        parent.clear();
+        graph.newData();
+    }
+    }
+
+    /* User operation: set Y-axis range. */
+    void setYAxis() {
+    String val = yText.getText();
+
+    try {
+        int dash = val.indexOf('-');
+        if (dash >= 0) {
+        String min = val.substring(0, dash).trim();
+        String max = val.substring(dash + 1).trim();
+
+        if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max)))
+            error("Invalid range " + min + " - " + max + " (expected values between 0 and 65535)");
+        return;
+        }
+    }
+    catch (NumberFormatException e) { }
+    error("Invalid range " + val + " (expected NN-MM)");
+    }
+
+    /* User operation: set sample period. */
+    void setSamplePeriod() {
+    String periodS = sampleText.getText().trim();
+    try {
+        int newPeriod = Integer.parseInt(periodS);
+        if (parent.setInterval(newPeriod)) {
+        return;
+        }
+    }
+    catch (NumberFormatException e) { }
+    error("Invalid sample period " + periodS);
+    }
+
+    /* Notification: sample period changed. */
+    void updateSamplePeriod() {
+    sampleText.setText("" + parent.interval);
+    }
+
+    /* Notification: new node. */
+    void newNode(int nodeId) {
+    moteListModel.newNode(nodeId);
+    }
+
+    /* Notification: new data. */
+    void newData() {
+    graph.newData();
+    }
+
+    void error(String msg) {
+    JOptionPane.showMessageDialog(frame, msg, "Error",
+                      JOptionPane.ERROR_MESSAGE);
+    }
+}
diff --git a/apps/MultihopOscilloscope/java/build.xml b/apps/MultihopOscilloscope/java/build.xml
new file mode 100644
index 00000000..e8fa088b
--- /dev/null
+++ b/apps/MultihopOscilloscope/java/build.xml
@@ -0,0 +1,19 @@
+<project name="tinyos-2.x app multihoposcilloscope" default="all">
+
+	<target name="all" >
+		<exec executable="make" failonerror="true">
+			<arg line="all" />
+		</exec>
+	</target>
+
+	<target name="java" depends="all">
+	</target>
+
+	<target name="javadoc" >
+		<echo message = "Building javadoc" />
+		<exec executable="make" failonerror="true">
+			<arg line="javadoc" />
+		</exec>
+	</target>
+	
+</project>
diff --git a/apps/MultihopOscilloscope/java/oscilloscope.jar b/apps/MultihopOscilloscope/java/oscilloscope.jar
new file mode 100644
index 00000000..fdbc7ada
Binary files /dev/null and b/apps/MultihopOscilloscope/java/oscilloscope.jar differ
diff --git a/apps/MultihopOscilloscope/java/run b/apps/MultihopOscilloscope/java/run
new file mode 100755
index 00000000..5b5df76f
--- /dev/null
+++ b/apps/MultihopOscilloscope/java/run
@@ -0,0 +1,7 @@
+#!/bin/sh
+if cygpath -w / >/dev/null 2>/dev/null; then
+  CLASSPATH="oscilloscope.jar;$CLASSPATH"
+else
+  CLASSPATH="oscilloscope.jar:$CLASSPATH"
+fi
+java Oscilloscope
diff --git a/apps/MultihopOscilloscope/oscilloscope.py b/apps/MultihopOscilloscope/oscilloscope.py
new file mode 100644
index 00000000..de29c89d
--- /dev/null
+++ b/apps/MultihopOscilloscope/oscilloscope.py
@@ -0,0 +1,30 @@
+#!/usr/bin/env python
+
+import sys
+import tos
+
+AM_OSCILLOSCOPE = 0x93
+
+class OscilloscopeMsg(tos.Packet):
+    def __init__(self, packet = None):
+        tos.Packet.__init__(self,
+                            [('version',  'int', 2),
+                             ('interval', 'int', 2),
+                             ('id',       'int', 2),
+                             ('count',    'int', 2),
+                             ('readings', 'blob', None)],
+                            packet)
+
+if '-h' in sys.argv:
+    print "Usage:", sys.argv[0], "serial@/dev/ttyUSB0:57600"
+    sys.exit()
+
+am = tos.AM()
+
+while True:
+    p = am.read()
+    if p and p.type == AM_OSCILLOSCOPE:
+        msg = OscilloscopeMsg(p.data)
+        print msg.id, msg.count, [i<<8 | j for (i,j) in zip(msg.readings[::2], msg.readings[1::2])]
+        #print msg
+
diff --git a/apps/MultihopOscilloscopeLqi/Makefile b/apps/MultihopOscilloscopeLqi/Makefile
new file mode 100644
index 00000000..64913b5b
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=MultihopOscilloscopeAppC
+CFLAGS += -I$(TOSDIR)/lib/net/ -I$(TOSDIR)/lib/net/lqi
+
+include $(MAKERULES)
diff --git a/apps/MultihopOscilloscopeLqi/MultihopOscilloscope.h b/apps/MultihopOscilloscopeLqi/MultihopOscilloscope.h
new file mode 100644
index 00000000..5f040539
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/MultihopOscilloscope.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+#ifndef MULTIHOP_OSCILLOSCOPE_H
+#define MULTIHOP_OSCILLOSCOPE_H
+
+enum {
+  /* Number of readings per message. If you increase this, you may have to
+     increase the message_t size. */
+  NREADINGS = 5,
+  /* Default sampling period. */
+  DEFAULT_INTERVAL = 1024,
+  AM_OSCILLOSCOPE = 0x93
+};
+
+typedef nx_struct oscilloscope {
+  nx_uint16_t version; /* Version of the interval. */
+  nx_uint16_t interval; /* Samping period. */
+  nx_uint16_t id; /* Mote id of sending mote. */
+  nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */
+  nx_uint16_t readings[NREADINGS];
+} oscilloscope_t;
+
+#endif
diff --git a/apps/MultihopOscilloscopeLqi/MultihopOscilloscopeAppC.nc b/apps/MultihopOscilloscopeLqi/MultihopOscilloscopeAppC.nc
new file mode 100644
index 00000000..cefe6747
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/MultihopOscilloscopeAppC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * MultihopOscilloscope demo application using the collection layer. 
+ * See README.txt file in this directory and TEP 119: Collection.
+ *
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+configuration MultihopOscilloscopeAppC { }
+implementation {
+  components MainC, MultihopOscilloscopeC, LedsC, new TimerMilliC(), 
+    new DemoSensorC() as Sensor;
+
+  //MainC.SoftwareInit -> Sensor;
+  
+  MultihopOscilloscopeC.Boot -> MainC;
+  MultihopOscilloscopeC.Timer -> TimerMilliC;
+  MultihopOscilloscopeC.Read -> Sensor;
+  MultihopOscilloscopeC.Leds -> LedsC;
+
+  //
+  // Communication components.  These are documented in TEP 113:
+  // Serial Communication, and TEP 119: Collection.
+  //
+  components CollectionC as Collector,  // Collection layer
+    ActiveMessageC,                         // AM layer
+    new CollectionSenderC(AM_OSCILLOSCOPE), // Sends multihop RF
+    SerialActiveMessageC,                   // Serial messaging
+    new SerialAMSenderC(AM_OSCILLOSCOPE);   // Sends to the serial port
+
+  MultihopOscilloscopeC.RadioControl -> ActiveMessageC;
+  MultihopOscilloscopeC.SerialControl -> SerialActiveMessageC;
+  MultihopOscilloscopeC.RoutingControl -> Collector;
+
+  MultihopOscilloscopeC.Send -> CollectionSenderC;
+  MultihopOscilloscopeC.SerialSend -> SerialAMSenderC.AMSend;
+  MultihopOscilloscopeC.Snoop -> Collector.Snoop[AM_OSCILLOSCOPE];
+  MultihopOscilloscopeC.Receive -> Collector.Receive[AM_OSCILLOSCOPE];
+  MultihopOscilloscopeC.RootControl -> Collector;
+
+  components new PoolC(message_t, 10) as UARTMessagePoolP,
+    new QueueC(message_t*, 10) as UARTQueueP;
+
+  MultihopOscilloscopeC.UARTMessagePool -> UARTMessagePoolP;
+  MultihopOscilloscopeC.UARTQueue -> UARTQueueP;
+  
+  components new PoolC(message_t, 20) as DebugMessagePool,
+    new QueueC(message_t*, 20) as DebugSendQueue,
+    new SerialAMSenderC(AM_LQI_DEBUG) as DebugSerialSender,
+    UARTDebugSenderP as DebugSender;
+
+  DebugSender.Boot -> MainC;
+  DebugSender.UARTSend -> DebugSerialSender;
+  DebugSender.MessagePool -> DebugMessagePool;
+  DebugSender.SendQueue -> DebugSendQueue;
+  Collector.CollectionDebug -> DebugSender;
+
+}
diff --git a/apps/MultihopOscilloscopeLqi/MultihopOscilloscopeC.nc b/apps/MultihopOscilloscopeLqi/MultihopOscilloscopeC.nc
new file mode 100644
index 00000000..52354462
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/MultihopOscilloscopeC.nc
@@ -0,0 +1,286 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * MultihopOscilloscope demo application using the collection layer. 
+ * See README.txt file in this directory and TEP 119: Collection.
+ *
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+#include "Timer.h"
+#include "MultihopOscilloscope.h"
+
+module MultihopOscilloscopeC {
+  uses {
+    // Interfaces for initialization:
+    interface Boot;
+    interface SplitControl as RadioControl;
+    interface SplitControl as SerialControl;
+    interface StdControl as RoutingControl;
+    
+    // Interfaces for communication, multihop and serial:
+    interface Send;
+    interface Receive as Snoop;
+    interface Receive;
+    interface AMSend as SerialSend;
+    interface CollectionPacket;
+    interface RootControl;
+
+    interface Queue<message_t *> as UARTQueue;
+    interface Pool<message_t> as UARTMessagePool;
+
+    // Miscalleny:
+    interface Timer<TMilli>;
+    interface Read<uint16_t>;
+    interface Leds;
+  }
+}
+
+implementation {
+  task void uartSendTask();
+  static void startTimer();
+  static void fatal_problem();
+  static void report_problem();
+  static void report_sent();
+  static void report_received();
+
+  uint8_t uartlen;
+  message_t sendbuf;
+  message_t uartbuf;
+  bool sendbusy=FALSE, uartbusy=FALSE;
+
+  /* Current local state - interval, version and accumulated readings */
+  oscilloscope_t local;
+
+  uint8_t reading; /* 0 to NREADINGS */
+
+  /* When we head an Oscilloscope message, we check it's sample count. If
+     it's ahead of ours, we "jump" forwards (set our count to the received
+     count). However, we must then suppress our next count increment. This
+     is a very simple form of "time" synchronization (for an abstract
+     notion of time). */
+  bool suppress_count_change;
+
+  // 
+  // On bootup, initialize radio and serial communications, and our
+  // own state variables.
+  //
+  event void Boot.booted() {
+    local.interval = DEFAULT_INTERVAL;
+    local.id = TOS_NODE_ID;
+    local.version = 0;
+
+    // Beginning our initialization phases:
+    if (call RadioControl.start() != SUCCESS)
+      fatal_problem();
+
+    if (call RoutingControl.start() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void RadioControl.startDone(error_t error) {
+    if (error != SUCCESS)
+      fatal_problem();
+
+    if (sizeof(local) > call Send.maxPayloadLength())
+      fatal_problem();
+
+    if (call SerialControl.start() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void SerialControl.startDone(error_t error) {
+    if (error != SUCCESS)
+      fatal_problem();
+
+    // This is how to set yourself as a root to the collection layer:
+    if (local.id % 500 == 0)
+      call RootControl.setRoot();
+
+    startTimer();
+  }
+
+  static void startTimer() {
+    if (call Timer.isRunning()) call Timer.stop();
+    call Timer.startPeriodic(local.interval);
+    reading = 0;
+  }
+
+  event void RadioControl.stopDone(error_t error) { }
+  event void SerialControl.stopDone(error_t error) { }
+
+  //
+  // Only the root will receive messages from this interface; its job
+  // is to forward them to the serial uart for processing on the pc
+  // connected to the sensor network.
+  //
+  event message_t*
+  Receive.receive(message_t* msg, void *payload, uint8_t len) {
+    oscilloscope_t* in = (oscilloscope_t*)payload;
+    oscilloscope_t* out;
+    if (uartbusy == FALSE) {
+      out = (oscilloscope_t*)call SerialSend.getPayload(&uartbuf, sizeof(oscilloscope_t));
+      if (out == NULL) {
+	fatal_problem();
+	return msg;
+      }
+      else {
+	memcpy(out, in, sizeof(oscilloscope_t));
+      }
+      uartlen = sizeof(oscilloscope_t);
+      post uartSendTask();
+    } else {
+      // The UART is busy; queue up messages and service them when the
+      // UART becomes free.
+      message_t *newmsg = call UARTMessagePool.get();
+      if (newmsg == NULL) {
+        // drop the message on the floor if we run out of queue space.
+        report_problem();
+        return msg;
+      }
+
+      //Prepare message to be sent over the uart
+      out = (oscilloscope_t*)call SerialSend.getPayload(newmsg, sizeof(oscilloscope_t));
+      if (out == NULL) {
+	fatal_problem();
+	return msg;
+      }
+      memcpy(out, in, sizeof(oscilloscope_t));
+
+      if (call UARTQueue.enqueue(newmsg) != SUCCESS) {
+        // drop the message on the floor and hang if we run out of
+        // queue space without running out of queue space first (this
+        // should not occur).
+        call UARTMessagePool.put(newmsg);
+        fatal_problem();
+        return msg;
+      }
+    }
+
+    return msg;
+  }
+
+  task void uartSendTask() {
+    if (call SerialSend.send(0xffff, &uartbuf, uartlen) != SUCCESS) {
+      report_problem();
+    } else {
+      uartbusy = TRUE;
+    }
+  }
+
+  event void SerialSend.sendDone(message_t *msg, error_t error) {
+    uartbusy = FALSE;
+    if (call UARTQueue.empty() == FALSE) {
+      // We just finished a UART send, and the uart queue is
+      // non-empty.  Let's start a new one.
+      message_t *queuemsg = call UARTQueue.dequeue();
+      if (queuemsg == NULL) {
+        fatal_problem();
+        return;
+      }
+      memcpy(&uartbuf, queuemsg, sizeof(message_t));
+      if (call UARTMessagePool.put(queuemsg) != SUCCESS) {
+        fatal_problem();
+        return;
+      }
+      post uartSendTask();
+    }
+  }
+
+  //
+  // Overhearing other traffic in the network.
+  //
+  event message_t* 
+  Snoop.receive(message_t* msg, void* payload, uint8_t len) {
+    oscilloscope_t *omsg = payload;
+
+    report_received();
+
+    // If we receive a newer version, update our interval. 
+    if (omsg->version > local.version) {
+      local.version = omsg->version;
+      local.interval = omsg->interval;
+      startTimer();
+    }
+
+    // If we hear from a future count, jump ahead but suppress our own
+    // change.
+    if (omsg->count > local.count) {
+      local.count = omsg->count;
+      suppress_count_change = TRUE;
+    }
+
+    return msg;
+  }
+
+  /* At each sample period:
+     - if local sample buffer is full, send accumulated samples
+     - read next sample
+  */
+  event void Timer.fired() {
+    if (reading == NREADINGS) {
+      if (!sendbusy) {
+	oscilloscope_t *o = (oscilloscope_t *)call Send.getPayload(&sendbuf, sizeof(oscilloscope_t));
+	if (o == NULL) {
+	  fatal_problem();
+	  return;
+	}
+	memcpy(o, &local, sizeof(local));
+	if (call Send.send(&sendbuf, sizeof(local)) == SUCCESS)
+	  sendbusy = TRUE;
+        else
+          report_problem();
+      }
+      
+      reading = 0;
+      /* Part 2 of cheap "time sync": increment our count if we didn't
+         jump ahead. */
+      if (!suppress_count_change)
+        local.count++;
+      suppress_count_change = FALSE;
+    }
+
+    if (call Read.read() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void Send.sendDone(message_t* msg, error_t error) {
+    if (error == SUCCESS)
+      report_sent();
+    else
+      report_problem();
+
+    sendbusy = FALSE;
+  }
+
+  event void Read.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS) {
+      data = 0xffff;
+      report_problem();
+    }
+    if (reading < NREADINGS)
+      local.readings[reading++] = data;
+  }
+
+
+  // Use LEDs to report various status issues.
+  static void fatal_problem() { 
+    call Leds.led0On(); 
+    call Leds.led1On();
+    call Leds.led2On();
+    call Timer.stop();
+  }
+
+  static void report_problem() { call Leds.led0Toggle(); }
+  static void report_sent() { call Leds.led1Toggle(); }
+  static void report_received() { call Leds.led2Toggle(); }
+}
diff --git a/apps/MultihopOscilloscopeLqi/README.txt b/apps/MultihopOscilloscopeLqi/README.txt
new file mode 100644
index 00000000..e89f6743
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/README.txt
@@ -0,0 +1,51 @@
+README for MultihopOscilloscopeLqi
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+MultihopOscilloscope is a simple data-collection demo. This variant,
+MultihopOscilloscopeLqi, works only on platforms that have the CC2420.
+Rather than use CTP, it uses MultihopLqi (lib/net/lqi), which is 
+much lighter weight but not quite as efficient or reliable. 
+
+The application periodically samples
+the default sensor and broadcasts a message every few readings. These readings
+can be displayed by the Java "Oscilloscope" application found in the
+TOSROOT/apps/Oscilloscope/java subdirectory. The sampling rate starts at 4Hz,
+but can be changed from the Java application.
+
+You can compile MultihopOscilloscope with a sensor board's default sensor by
+compiling as follows:
+
+  SENSORBOARD=<sensorboard name> make <mote>
+
+You can change the sensor used by editing MultihopOscilloscopeAppC.nc.
+
+Tools:
+
+The Java application displays readings it receives from motes running the
+MultihopOscilloscope demo via a serial forwarder. To run it, change to the
+TOSROOT/apps/Oscilloscope/java subdirectory and type:
+
+  make
+  java net.tinyos.sf.SerialForwarder -comm serial@<serial port>:<mote>
+  # e.g., java net.tinyps.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2
+  # or java net.tinyps.sf.SerialForwarder -comm serial@COM2:telosb
+  ./run
+
+The controls at the bottom of the screen allow you to zoom in or out the X
+axis, change the range of the Y axis, and clear all received data. You can
+change the color used to display a mote by clicking on its color in the
+mote table.
+
+Known bugs/limitations:
+
+None.
+
+See also:
+TEP 113: Serial Communications, TEP 119: Collection.
+
+Notes:
+
+MultihopOscilloscope configures a mote whose TOS_NODE_ID modulo 500 is zero 
+to be a collection root.
diff --git a/apps/MultihopOscilloscopeLqi/java/ColorCellEditor.java b/apps/MultihopOscilloscopeLqi/java/ColorCellEditor.java
new file mode 100644
index 00000000..f88b0b6f
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/java/ColorCellEditor.java
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import javax.swing.table.*;
+import java.awt.*;
+import java.awt.event.*;
+
+/* Editor for table cells representing colors. Popup a color chooser. */
+public class ColorCellEditor extends AbstractCellEditor
+    implements TableCellEditor {
+    private Color color;
+    private JButton button;
+
+    public ColorCellEditor(String title) {
+	button = new JButton();
+	final JColorChooser chooser = new JColorChooser();
+	final JDialog dialog = JColorChooser.createDialog
+	    (button, title, true, chooser,
+	     new ActionListener() {
+		 public void actionPerformed(ActionEvent e) {
+		     color = chooser.getColor();
+		 } },
+	     null);
+
+	button.setBorderPainted(false);
+	button.addActionListener
+	    (new ActionListener () {
+		    public void actionPerformed(ActionEvent e) {
+			button.setBackground(color);
+			chooser.setColor(color);
+			dialog.setVisible(true);
+			fireEditingStopped();
+		    } } );
+	
+    }
+
+    public Object getCellEditorValue() { return color; }
+    public Component getTableCellEditorComponent(JTable table,
+                                                 Object value,
+                                                 boolean isSelected,
+                                                 int row,
+                                                 int column) {
+        color = (Color)value;
+        return button;
+    }
+}
+
diff --git a/apps/MultihopOscilloscopeLqi/java/Data.java b/apps/MultihopOscilloscopeLqi/java/Data.java
new file mode 100644
index 00000000..ac35aa72
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/java/Data.java
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import java.util.*;
+
+/* Hold all data received from motes */
+class Data {
+    /* The mote data is stored in a flat array indexed by a mote's identifier.
+       A null value indicates no mote with that identifier. */
+    private Node[] nodes = new Node[256];
+    private Oscilloscope parent;
+
+    Data(Oscilloscope parent) {
+	this.parent = parent;
+    }
+
+    /* Data received from mote nodeId containing NREADINGS samples from
+       messageId * NREADINGS onwards. Tell parent if this is a new node. */
+    void update(int nodeId, int messageId, int readings[]) {
+	if (nodeId >= nodes.length) {
+	    int newLength = nodes.length * 2;
+	    if (nodeId >= newLength)
+		newLength = nodeId + 1;
+
+	    Node newNodes[] = new Node[newLength];
+	    System.arraycopy(nodes, 0, newNodes, 0, nodes.length);
+	    nodes = newNodes;
+	}
+	Node node = nodes[nodeId];
+	if (node == null) {
+	    nodes[nodeId] = node = new Node(nodeId);
+	    parent.newNode(nodeId);
+	}
+	node.update(messageId, readings);
+    }
+
+    /* Return value of sample x for mote nodeId, or -1 for missing data */
+    int getData(int nodeId, int x) {
+	if (nodeId >= nodes.length || nodes[nodeId] == null)
+	    return -1;
+	return nodes[nodeId].getData(x);
+    }
+
+    /* Return number of last known sample on mote nodeId. Returns 0 for
+       unknown motes. */
+    int maxX(int nodeId) {
+	if (nodeId >= nodes.length || nodes[nodeId] == null)
+	    return 0;
+	return nodes[nodeId].maxX();
+    }
+
+    /* Return number of largest known sample on all motes (0 if there are no
+       motes) */
+    int maxX() {
+	int max = 0;
+
+	for (int i = 0; i < nodes.length; i++)
+	    if (nodes[i] != null) {
+		int nmax = nodes[i].maxX();
+
+		if (nmax > max)
+		    max = nmax;
+	    }
+
+	return max;
+    }
+}
diff --git a/apps/MultihopOscilloscopeLqi/java/Graph.java b/apps/MultihopOscilloscopeLqi/java/Graph.java
new file mode 100644
index 00000000..9a42c1c8
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/java/Graph.java
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.awt.font.*;
+import java.awt.geom.*;
+import java.util.*;
+
+/* Panel for drawing mote-data graphs */
+class Graph extends JPanel
+{
+    final static int BORDER_LEFT = 40;
+    final static int BORDER_RIGHT = 0;
+    final static int BORDER_TOP = 10;
+    final static int BORDER_BOTTOM = 10;
+
+    final static int TICK_SPACING = 40;
+    final static int MAX_TICKS = 16;
+    final static int TICK_WIDTH = 10;
+
+    final static int MIN_WIDTH = 50;
+
+    int gx0, gx1, gy0, gy1; // graph bounds
+    int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale
+    Window parent;
+
+    /* Graph to screen coordinate conversion support */
+    int height, width;
+    double xscale, yscale;
+
+    void updateConversion() {
+	height = getHeight() - BORDER_TOP - BORDER_BOTTOM;
+	width = getWidth() - BORDER_LEFT - BORDER_RIGHT;
+	if (height < 1) 
+	    height = 1;
+	if (width < 1)
+	    width = 1;
+	xscale = (double)width / (gx1 - gx0 + 1);
+	yscale = (double)height / (gy1 - gy0 + 1);
+    }
+
+    Graphics makeClip(Graphics g) {
+	return g.create(BORDER_LEFT, BORDER_TOP, width, height);
+    }
+
+    // Note that these do not include the border offset!
+    int screenX(int gx) {
+	return (int)(xscale * (gx - gx0) + 0.5);
+    }
+
+    int screenY(int gy) {
+	return (int)(height - yscale * (gy - gy0));
+    }
+
+    int graphX(int sx) {
+	return (int)(sx / xscale + gx0 + 0.5);
+    }
+
+    Graph(Window parent) {
+	this.parent = parent;
+	gy0 = 0; gy1 = 0xffff;
+	gx0 = 0; gx1 = MIN_WIDTH << scale;
+    }
+
+    void rightDrawString(Graphics2D g, String s, int x, int y) {
+	TextLayout layout =
+	    new TextLayout(s, parent.smallFont, g.getFontRenderContext());
+	Rectangle2D bounds = layout.getBounds();
+	layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2);
+    }
+
+    protected void paintComponent(Graphics g) {
+	Graphics2D g2d = (Graphics2D)g;
+
+	/* Repaint. Synchronize on Oscilloscope to avoid data changing.
+	   Simply clear panel, draw Y axis and all the mote graphs. */
+	synchronized (parent.parent) {
+	    updateConversion();
+	    g2d.setColor(Color.BLACK);
+	    g2d.fillRect(0, 0, getWidth(), getHeight());
+	    drawYAxis(g2d);
+
+	    Graphics clipped = makeClip(g2d);
+	    int count = parent.moteListModel.size();
+	    for (int i = 0; i < count; i++) {
+		clipped.setColor(parent.moteListModel.getColor(i));
+		drawGraph(clipped, parent.moteListModel.get(i));
+	    }
+	}
+    }
+
+    /* Draw the Y-axis */
+    protected void drawYAxis(Graphics2D g) {
+	int axis_x = BORDER_LEFT - 1;
+	int height = getHeight() - BORDER_BOTTOM - BORDER_TOP;
+
+	g.setColor(Color.WHITE);
+	g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1);
+
+	/* Draw a reasonable set of tick marks */
+	int nTicks = height / TICK_SPACING;
+	if (nTicks > MAX_TICKS)
+	    nTicks = MAX_TICKS;
+
+	int tickInterval = (gy1 - gy0 + 1) / nTicks;
+	if (tickInterval == 0)
+	    tickInterval = 1;
+
+	/* Tick interval should be of the family A * 10^B,
+	   where A = 1, 2 * or 5. We tend more to rounding A up, to reduce
+	   rather than increase the number of ticks. */
+	int B = (int)(Math.log(tickInterval) / Math.log(10));
+	int A = (int)(tickInterval / Math.pow(10, B) + 0.5);
+	if (A > 2) A = 5;
+	else if (A > 5) A = 10;
+
+	tickInterval = A * (int)Math.pow(10, B);
+
+	/* Ticks are printed at multiples of tickInterval */
+	int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval;
+	while (tick <= gy1) {
+	    int stick = screenY(tick) + BORDER_TOP;
+	    rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick);
+	    g.drawLine(axis_x - TICK_WIDTH / 2, stick,
+		       axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick);
+	    tick += tickInterval;
+	}
+	
+    }
+
+    /* Draw graph for mote nodeId */
+    protected void drawGraph(Graphics g, int nodeId) {
+	SingleGraph sg = new SingleGraph(g, nodeId);
+
+	if (gx1 - gx0 >= width) // More points than pixels-iterate by pixel
+	    for (int sx = 0; sx < width; sx++)
+		sg.nextPoint(g, graphX(sx), sx);
+	else // Less points than pixel-iterate by points
+	    for (int gx = gx0; gx <= gx1; gx++)
+		sg.nextPoint(g, gx, screenX(gx));
+    }
+
+    /* Inner class to simplify drawing a graph. Simplify initialise it, then
+       feed it the X screen and graph coordinates, from left to right. */
+    private class SingleGraph {
+	int lastsx, lastsy, nodeId;
+
+	/* Start drawing the graph mote id */
+	SingleGraph(Graphics g, int id) {
+	    nodeId = id;
+	    lastsx = -1;
+	    lastsy = -1;
+	}
+
+	/* Next point in mote's graph is at x value gx, screen coordinate sx */
+	void nextPoint(Graphics g, int gx, int sx) {
+	    int gy = parent.parent.data.getData(nodeId, gx);
+	    int sy = -1;
+
+	    if (gy >= 0) { // Ignore missing values
+		double rsy = height - yscale * (gy - gy0);
+
+		// Ignore problem values
+		if (rsy >= -1e6 && rsy <= 1e6)
+		    sy = (int)(rsy + 0.5);
+
+		if (lastsy >= 0 && sy >= 0)
+		    g.drawLine(lastsx, lastsy, sx, sy);
+	    }
+	    lastsx = sx;
+	    lastsy = sy;
+	}
+    }
+
+    /* Update X-axis range in GUI */
+    void updateXLabel() {
+	parent.xLabel.setText("X: " + gx0 + " - " + gx1);
+    }
+
+    /* Ensure that graph is nicely positioned on screen. max is the largest 
+       sample number received from any mote. */
+    private void recenter(int max) {
+	// New data will show up at the 3/4 point
+	// The 2nd term ensures that gx1 will be >= max
+	int scrollby = ((gx1 - gx0) >> 2) + (max - gx1);
+	gx0 += scrollby;
+	gx1 += scrollby;
+	if (gx0 < 0) { // don't bother showing negative sample numbers
+	    gx1 -= gx0;
+	    gx0 = 0;
+	}
+	updateXLabel();
+    }
+
+    /* New data received. Redraw graph, scrolling if necessary */
+    void newData() {
+	int max = parent.parent.data.maxX();
+
+	if (max > gx1 || max < gx0) // time to scroll
+	    recenter(max);
+	repaint();
+    }
+
+    /* User set the X-axis scale to newScale */
+    void setScale(int newScale) {
+	gx1 = gx0 + (MIN_WIDTH << newScale);
+	scale = newScale;
+	recenter(parent.parent.data.maxX());
+	repaint();
+    }
+
+    /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus
+       values (return false), or accept, redraw and return true. */
+    boolean setYAxis(int newy0, int newy1) {
+	if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 ||
+	    newy1 < 0 || newy1 > 65535)
+	    return false;
+	gy0 = newy0;
+	gy1 = newy1;
+	repaint();
+	return true;
+    }
+}
diff --git a/apps/MultihopOscilloscopeLqi/java/Makefile b/apps/MultihopOscilloscopeLqi/java/Makefile
new file mode 100644
index 00000000..55c2605b
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/java/Makefile
@@ -0,0 +1,21 @@
+GEN=OscilloscopeMsg.java Constants.java
+
+all: oscilloscope.jar
+
+oscilloscope.jar: Oscilloscope.class
+	jar cf $@ *.class
+
+OscilloscopeMsg.java: ../MultihopOscilloscope.h
+	mig -target=null -java-classname=OscilloscopeMsg java ../MultihopOscilloscope.h oscilloscope -o $@
+
+Constants.java: ../MultihopOscilloscope.h
+	ncg -target=null -java-classname=Constants java ../MultihopOscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@
+
+Oscilloscope.class: $(wildcard *.java) $(GEN)
+	javac *.java
+
+clean:
+	rm -f *.class $(GEN)
+
+veryclean: clean
+	rm oscilloscope.jar
diff --git a/apps/MultihopOscilloscopeLqi/java/Node.java b/apps/MultihopOscilloscopeLqi/java/Node.java
new file mode 100644
index 00000000..cfe8db9e
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/java/Node.java
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Class holding all data received from a mote.
+ */
+class Node {
+    /* Data is hold in an array whose size is a multiple of INCREMENT, and
+       INCREMENT itself must be a multiple of Constant.NREADINGS. This
+       simplifies handling the extension and clipping of old data
+       (see setEnd) */
+    final static int INCREMENT = 100 * Constants.NREADINGS;
+    final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT
+
+    /* The mote's identifier */
+    int id;
+
+    /* Data received from the mote. data[0] is the dataStart'th sample
+       Indexes 0 through dataEnd - dataStart - 1 hold data.
+       Samples are 16-bit unsigned numbers, -1 indicates missing data. */
+    int[] data;
+    int dataStart, dataEnd;
+
+    Node(int _id) {
+	id = _id;
+    }
+
+    /* Update data to hold received samples newDataIndex .. newEnd.
+       If we receive data with a lower index, we discard newer data
+       (we assume the mote rebooted). */
+    private void setEnd(int newDataIndex, int newEnd) {
+	if (newDataIndex < dataStart || data == null) {
+	    /* New data is before the start of what we have. Just throw it
+	       all away and start again */
+	    dataStart = newDataIndex;
+	    data = new int[INCREMENT];
+	}
+	if (newEnd > dataStart + data.length) {
+	    /* Try extending first */
+	    if (data.length < MAX_SIZE) {
+		int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT;
+		if (newLength >= MAX_SIZE)
+		    newLength = MAX_SIZE;
+
+		int[] newData = new int[newLength];
+		System.arraycopy(data, 0, newData, 0, data.length);
+		data = newData;
+
+	    }
+	    if (newEnd > dataStart + data.length) {
+		/* Still doesn't fit. Squish.
+		   We assume INCREMENT >= (newEnd - newDataIndex), and ensure
+		   that dataStart + data.length - INCREMENT = newDataIndex */
+		int newStart = newDataIndex + INCREMENT - data.length;
+
+		if (dataStart + data.length > newStart)
+		    System.arraycopy(data, newStart - dataStart, data, 0,
+				     data.length - (newStart - dataStart));
+		dataStart = newStart;
+	    }
+	}
+	/* Mark any missing data as invalid */
+	for (int i = dataEnd < dataStart ? dataStart : dataEnd;
+	     i < newDataIndex; i++)
+	    data[i - dataStart] = -1;
+
+	/* If we receive a count less than the old count, we assume the old
+	   data is invalid */
+	dataEnd = newEnd;
+
+    }
+
+    /* Data received containing NREADINGS samples from messageId * NREADINGS 
+       onwards */
+    void update(int messageId, int readings[]) {
+	int start = messageId * Constants.NREADINGS;
+	setEnd(start, start + Constants.NREADINGS);
+	for (int i = 0; i < readings.length; i++)
+	    data[start - dataStart + i] = readings[i];
+    }
+
+    /* Return value of sample x, or -1 for missing data */
+    int getData(int x) {
+	if (x < dataStart || x >= dataEnd)
+	    return -1;
+	else
+	    return data[x - dataStart];
+    }
+
+    /* Return number of last known sample */
+    int maxX() {
+	return dataEnd - 1;
+    }
+}
diff --git a/apps/MultihopOscilloscopeLqi/java/Oscilloscope.java b/apps/MultihopOscilloscopeLqi/java/Oscilloscope.java
new file mode 100644
index 00000000..3db3741f
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/java/Oscilloscope.java
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import net.tinyos.message.*;
+import net.tinyos.util.*;
+import java.io.*;
+
+/* The "Oscilloscope" demo app. Displays graphs showing data received from
+   the Oscilloscope mote application, and allows the user to:
+   - zoom in or out on the X axis
+   - set the scale on the Y axis
+   - change the sampling period
+   - change the color of each mote's graph
+   - clear all data
+
+   This application is in three parts:
+   - the Node and Data objects store data received from the motes and support
+     simple queries
+   - the Window and Graph and miscellaneous support objects implement the
+     GUI and graph drawing
+   - the Oscilloscope object talks to the motes and coordinates the other
+     objects
+
+   Synchronization is handled through the Oscilloscope object. Any operation
+   that reads or writes the mote data must be synchronized on Oscilloscope.
+   Note that the messageReceived method below is synchronized, so no further
+   synchronization is needed when updating state based on received messages.
+*/
+public class Oscilloscope implements MessageListener
+{
+    MoteIF mote;
+    Data data;
+    Window window;
+
+    /* The current sampling period. If we receive a message from a mote
+       with a newer version, we update our interval. If we receive a message
+       with an older version, we broadcast a message with the current interval
+       and version. If the user changes the interval, we increment the
+       version and broadcast the new interval and version. */
+    int interval = Constants.DEFAULT_INTERVAL;
+    int version = -1;
+
+    /* Main entry point */
+    void run() {
+	data = new Data(this);
+	window = new Window(this);
+	window.setup();
+	mote = new MoteIF(PrintStreamMessenger.err);
+	mote.registerListener(new OscilloscopeMsg(), this);
+    }
+
+    /* The data object has informed us that nodeId is a previously unknown
+       mote. Update the GUI. */
+    void newNode(int nodeId) {
+	window.newNode(nodeId);
+    }
+
+    synchronized public void messageReceived(int dest_addr, Message msg) {
+	if (msg instanceof OscilloscopeMsg) {
+	    OscilloscopeMsg omsg = (OscilloscopeMsg)msg;
+
+	    /* Update interval and mote data */
+	    periodUpdate(omsg.get_version(), omsg.get_interval());
+	    data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings());
+
+	    /* Inform the GUI that new data showed up */
+	    window.newData();
+	}
+    }
+
+    /* A potentially new version and interval has been received from the
+       mote */
+    void periodUpdate(int moteVersion, int moteInterval) {
+	if (moteVersion > version) {
+	    /* It's new. Update our vision of the interval. */
+	    version = moteVersion;
+	    interval = moteInterval;
+	    window.updateSamplePeriod();
+	}
+	else if (moteVersion < version) {
+	    /* It's old. Update the mote's vision of the interval. */
+	    sendInterval();
+	}
+    }
+
+    /* The user wants to set the interval to newPeriod. Refuse bogus values
+       and return false, or accept the change, broadcast it, and return
+       true */
+    synchronized boolean setInterval(int newPeriod) {
+	if (newPeriod < 1 || newPeriod > 65535)
+	    return false;
+	interval = newPeriod;
+	version++;
+	sendInterval();
+	return true;
+    }
+
+    /* Broadcast a version+interval message. */
+    void sendInterval() {
+	OscilloscopeMsg omsg = new OscilloscopeMsg();
+
+	omsg.set_version(version);
+	omsg.set_interval(interval);
+	try {
+	    mote.send(MoteIF.TOS_BCAST_ADDR, omsg);
+	}
+	catch (IOException e) {
+	    window.error("Cannot send message to mote");
+	}
+    }
+
+    /* User wants to clear all data. */
+    void clear() {
+	data = new Data(this);
+    }
+
+    public static void main(String[] args) {
+	Oscilloscope me = new Oscilloscope();
+	me.run();
+    }
+}
diff --git a/apps/MultihopOscilloscopeLqi/java/Window.java b/apps/MultihopOscilloscopeLqi/java/Window.java
new file mode 100644
index 00000000..d7979bf9
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/java/Window.java
@@ -0,0 +1,294 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import javax.swing.table.*;
+import javax.swing.event.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.util.*;
+
+/* The main GUI object. Build the GUI and coordinate all user activities */
+class Window
+{
+    Oscilloscope parent;
+    Graph graph;
+
+    Font smallFont = new Font("Dialog", Font.PLAIN, 8);
+    Font boldFont = new Font("Dialog", Font.BOLD, 12);
+    Font normalFont = new Font("Dialog", Font.PLAIN, 12);
+    MoteTableModel moteListModel; // GUI view of mote list
+    JLabel xLabel; // Label displaying X axis range
+    JTextField sampleText, yText; // inputs for sample period and Y axis range
+    JFrame frame;
+
+    Window(Oscilloscope parent) {
+	this.parent = parent;
+    }
+
+    /* A model for the mote table, and general utility operations on the mote
+       list */
+    class MoteTableModel extends AbstractTableModel {
+	private ArrayList motes = new ArrayList();
+	private ArrayList colors = new ArrayList();
+
+	/* Initial mote colors cycle through this list. Add more colors if
+	   you want. */
+	private Color[] cycle = {
+	    Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA,
+	    Color.YELLOW, Color.GRAY, Color.YELLOW
+	};
+	int cycleIndex;
+
+	/* TableModel methods for achieving our table appearance */
+	public String getColumnName(int col) {
+	    if (col == 0)
+		return "Mote";
+	    else
+		return "Color";
+	}
+	public int getColumnCount() { return 2; }
+	public synchronized int getRowCount() { return motes.size(); }
+	public synchronized Object getValueAt(int row, int col) {
+	    if (col == 0)
+		return motes.get(row);
+	    else
+		return colors.get(row);
+	}
+        public Class getColumnClass(int col) {
+            return getValueAt(0, col).getClass();
+        }
+	public boolean isCellEditable(int row, int col) { return col == 1; }
+        public synchronized void setValueAt(Object value, int row, int col) {
+	    colors.set(row, value);
+            fireTableCellUpdated(row, col);
+	    graph.repaint();
+        }
+
+	/* Return mote id of i'th mote */
+	int get(int i) { return ((Integer)motes.get(i)).intValue(); }
+	
+	/* Return color of i'th mote */
+	Color getColor(int i)  { return (Color)colors.get(i); }
+
+	/* Return number of motes */
+	int size() { return motes.size(); }
+
+	/* Add a new mote */
+	synchronized void newNode(int nodeId) {
+	    /* Shock, horror. No binary search. */
+	    int i, len = motes.size();
+
+	    for (i = 0; ; i++)
+		if (i == len || nodeId < get(i)) {
+		    motes.add(i, new Integer(nodeId));
+		    // Cycle through a set of initial colors
+		    colors.add(i, cycle[cycleIndex++ % cycle.length]);
+		    break;
+		}
+	    fireTableRowsInserted(i, i);
+	}
+
+	/* Remove all motes */
+	void clear() {
+	    motes = new ArrayList();
+	    colors = new ArrayList();
+	    fireTableDataChanged();
+	}
+    }
+
+    /* A simple full-color cell */
+    static class MoteColor extends JLabel implements TableCellRenderer {
+	public MoteColor() { setOpaque(true); }
+	public Component getTableCellRendererComponent
+	    (JTable table, Object color,
+	     boolean isSelected, boolean hasFocus, int row, int column) {
+	    setBackground((Color)color);
+	    return this;
+	}
+    }
+
+    /* Convenience methods for making buttons, labels and textfields.
+       Simplifies code and ensures a consistent style. */
+
+    JButton makeButton(String label, ActionListener action) {
+	JButton button = new JButton();
+        button.setText(label);
+        button.setFont(boldFont);
+	button.addActionListener(action);
+	return button;
+    }
+
+    JLabel makeLabel(String txt, int alignment) {
+	JLabel label = new JLabel(txt, alignment);
+	label.setFont(boldFont);
+	return label;
+    }
+
+    JLabel makeSmallLabel(String txt, int alignment) {
+	JLabel label = new JLabel(txt, alignment);
+	label.setFont(smallFont);
+	return label;
+    }
+
+    JTextField makeTextField(int columns, ActionListener action) {
+	JTextField tf = new JTextField(columns);
+	tf.setFont(normalFont);
+	tf.setMaximumSize(tf.getPreferredSize());
+	tf.addActionListener(action);
+	return tf;
+    }
+
+    /* Build the GUI */
+    void setup() {
+	JPanel main = new JPanel(new BorderLayout());
+
+	main.setMinimumSize(new Dimension(500, 250));
+	main.setPreferredSize(new Dimension(800, 400));
+
+	// Three panels: mote list, graph, controls
+	moteListModel = new  MoteTableModel();
+	JTable moteList = new JTable(moteListModel);
+	moteList.setDefaultRenderer(Color.class, new MoteColor());
+	moteList.setDefaultEditor(Color.class, new ColorCellEditor("Pick Mote Color"));
+	moteList.setPreferredScrollableViewportSize(new Dimension(100, 400));
+	JScrollPane motePanel = new JScrollPane();
+	motePanel.getViewport().add(moteList, null);
+	main.add(motePanel, BorderLayout.WEST);
+
+	graph = new Graph(this);
+	main.add(graph, BorderLayout.CENTER);
+
+	// Controls. Organised using box layouts.
+
+	// Sample period.
+	JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT);
+	sampleText = makeTextField(6, new ActionListener() {
+		public void actionPerformed(ActionEvent e) { setSamplePeriod(); }
+	    } );
+	updateSamplePeriod();
+
+	// Clear data.
+	JButton clearButton = makeButton("Clear data", new ActionListener() {
+		public void actionPerformed(ActionEvent e) { clearData(); }
+	    } );
+
+	// Adjust X-axis zoom.
+	Box xControl = new Box(BoxLayout.Y_AXIS);
+	xLabel = makeLabel("", JLabel.CENTER);
+	final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale);
+	Hashtable xTable = new Hashtable();
+	for (int i = 0; i <= 8; i += 2)
+	    xTable.put(new Integer(i),
+		       makeSmallLabel("" + (Graph.MIN_WIDTH << i),
+				      JLabel.CENTER));
+	xSlider.setLabelTable(xTable);
+	xSlider.setPaintLabels(true);
+	graph.updateXLabel();
+	graph.setScale(graph.scale);
+	xSlider.addChangeListener(new ChangeListener() {
+		public void stateChanged(ChangeEvent e) {
+		    //if (!xSlider.getValueIsAdjusting())
+			graph.setScale((int)xSlider.getValue());
+		}
+	    });
+	xControl.add(xLabel);
+	xControl.add(xSlider);
+
+	// Adjust Y-axis range.
+	JLabel yLabel = makeLabel("Y:", JLabel.RIGHT);
+	yText = makeTextField(12, new ActionListener() {
+		public void actionPerformed(ActionEvent e) { setYAxis(); }
+	    } );
+	yText.setText(graph.gy0 + " - " + graph.gy1);
+
+	Box controls = new Box(BoxLayout.X_AXIS);
+	controls.add(clearButton);
+	controls.add(Box.createHorizontalGlue());
+	controls.add(Box.createRigidArea(new Dimension(20, 0)));
+	controls.add(sampleLabel);
+	controls.add(sampleText);
+	controls.add(Box.createHorizontalGlue());
+	controls.add(Box.createRigidArea(new Dimension(20, 0)));
+	controls.add(xControl);
+	controls.add(yLabel);
+	controls.add(yText);
+	main.add(controls, BorderLayout.SOUTH);
+
+	// The frame part
+	frame = new JFrame("Oscilloscope");
+	frame.setSize(main.getPreferredSize());
+	frame.getContentPane().add(main);
+	frame.setVisible(true);
+	frame.addWindowListener(new WindowAdapter() {
+		public void windowClosing(WindowEvent e) { System.exit(0); }
+	    });
+    }
+
+    /* User operation: clear data */
+    void clearData() {
+	synchronized (parent) {
+	    moteListModel.clear();
+	    parent.clear();
+	    graph.newData();
+	}
+    }
+
+    /* User operation: set Y-axis range. */
+    void setYAxis() {
+	String val = yText.getText();
+
+	try {
+	    int dash = val.indexOf('-');
+	    if (dash >= 0) {
+		String min = val.substring(0, dash).trim();
+		String max = val.substring(dash + 1).trim();
+
+		if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max)))
+		    error("Invalid range " + min + " - " + max + " (expected values between 0 and 65535)");
+		return;
+	    }
+	}
+	catch (NumberFormatException e) { }
+	error("Invalid range " + val + " (expected NN-MM)");
+    }
+
+    /* User operation: set sample period. */
+    void setSamplePeriod() {
+	String periodS = sampleText.getText().trim();
+	try {
+	    int newPeriod = Integer.parseInt(periodS);
+	    if (parent.setInterval(newPeriod))
+		return;
+	}
+	catch (NumberFormatException e) { }
+	error("Invalid sample period " + periodS);
+    }
+
+    /* Notification: sample period changed. */
+    void updateSamplePeriod() {
+	sampleText.setText("" + parent.interval);
+    }
+
+    /* Notification: new node. */
+    void newNode(int nodeId) {
+	moteListModel.newNode(nodeId);
+    }
+
+    /* Notification: new data. */
+    void newData() {
+	graph.newData();
+    }
+
+    void error(String msg) {
+	JOptionPane.showMessageDialog(frame, msg, "Error",
+				      JOptionPane.ERROR_MESSAGE);
+    }
+}
diff --git a/apps/MultihopOscilloscopeLqi/java/build.xml b/apps/MultihopOscilloscopeLqi/java/build.xml
new file mode 100644
index 00000000..e8fa088b
--- /dev/null
+++ b/apps/MultihopOscilloscopeLqi/java/build.xml
@@ -0,0 +1,19 @@
+<project name="tinyos-2.x app multihoposcilloscope" default="all">
+
+	<target name="all" >
+		<exec executable="make" failonerror="true">
+			<arg line="all" />
+		</exec>
+	</target>
+
+	<target name="java" depends="all">
+	</target>
+
+	<target name="javadoc" >
+		<echo message = "Building javadoc" />
+		<exec executable="make" failonerror="true">
+			<arg line="javadoc" />
+		</exec>
+	</target>
+	
+</project>
diff --git a/apps/MultihopOscilloscopeLqi/java/oscilloscope.jar b/apps/MultihopOscilloscopeLqi/java/oscilloscope.jar
new file mode 100644
index 00000000..28eb3b4e
Binary files /dev/null and b/apps/MultihopOscilloscopeLqi/java/oscilloscope.jar differ
diff --git a/apps/Null/Makefile b/apps/Null/Makefile
new file mode 100644
index 00000000..dc4b4d37
--- /dev/null
+++ b/apps/Null/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=NullAppC
+include $(MAKERULES)
+
diff --git a/apps/Null/NullAppC.nc b/apps/Null/NullAppC.nc
new file mode 100644
index 00000000..a03be09c
--- /dev/null
+++ b/apps/Null/NullAppC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Null is an empty skeleton application.  It is useful to test that the
+ * build environment is functional in its most minimal sense, i.e., you
+ * can correctly compile an application. It is also useful to test the
+ * minimum power consumption of a node when it has absolutely no 
+ * interrupts or resources active.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @date February 4, 2006
+ */
+
+configuration NullAppC{}
+implementation {
+  components MainC, NullC;
+
+  MainC.Boot <- NullC;
+}
+
diff --git a/apps/Null/NullC.nc b/apps/Null/NullC.nc
new file mode 100644
index 00000000..197e6202
--- /dev/null
+++ b/apps/Null/NullC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Null is an empty skeleton application.  It is useful to test that the
+ * build environment is functional in its most minimal sense, i.e., you
+ * can correctly compile an application. It is also useful to test the
+ * minimum power consumption of a node when it has absolutely no 
+ * interrupts or resources active.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @date February 4, 2006
+ */
+module NullC @safe()
+{
+  uses interface Boot;
+}
+implementation
+{
+  event void Boot.booted() {
+    // Do nothing.
+  }
+}
+
diff --git a/apps/Null/README.txt b/apps/Null/README.txt
new file mode 100644
index 00000000..01847fcb
--- /dev/null
+++ b/apps/Null/README.txt
@@ -0,0 +1,22 @@
+$Id: README.txt,v 1.4 2006-12-12 18:22:48 vlahan Exp $
+
+README for Null
+Author/Contact: tinyos-help@millennium.berkeley.edu
+@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+Description:
+
+Null is an empty skeleton application.  It is useful to test that the
+build environment is functional in its most minimal sense, i.e., you
+can correctly compile an application. It is also useful to test the
+minimum power consumption of a node when it has absolutely no 
+interrupts or resources active.
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+Hahaha. Seriously.
+
diff --git a/apps/Oscilloscope/Makefile b/apps/Oscilloscope/Makefile
new file mode 100644
index 00000000..53febb82
--- /dev/null
+++ b/apps/Oscilloscope/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=OscilloscopeAppC
+
+include $(MAKERULES)
diff --git a/apps/Oscilloscope/Oscilloscope.h b/apps/Oscilloscope/Oscilloscope.h
new file mode 100644
index 00000000..1e6af206
--- /dev/null
+++ b/apps/Oscilloscope/Oscilloscope.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+// @author David Gay
+
+#ifndef OSCILLOSCOPE_H
+#define OSCILLOSCOPE_H
+
+enum {
+  /* Number of readings per message. If you increase this, you may have to
+     increase the message_t size. */
+  NREADINGS = 10,
+
+  /* Default sampling period. */
+  DEFAULT_INTERVAL = 256,
+
+  AM_OSCILLOSCOPE = 0x93
+};
+
+typedef nx_struct oscilloscope {
+  nx_uint16_t version; /* Version of the interval. */
+  nx_uint16_t interval; /* Samping period. */
+  nx_uint16_t id; /* Mote id of sending mote. */
+  nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */
+  nx_uint16_t readings[NREADINGS];
+} oscilloscope_t;
+
+#endif
diff --git a/apps/Oscilloscope/OscilloscopeAppC.nc b/apps/Oscilloscope/OscilloscopeAppC.nc
new file mode 100644
index 00000000..33409bed
--- /dev/null
+++ b/apps/Oscilloscope/OscilloscopeAppC.nc
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Oscilloscope demo application. Uses the demo sensor - change the
+ * new DemoSensorC() instantiation if you want something else.
+ *
+ * See README.txt file in this directory for usage instructions.
+ *
+ * @author David Gay
+ */
+configuration OscilloscopeAppC { }
+implementation
+{
+  components OscilloscopeC, MainC, ActiveMessageC, LedsC,
+    new TimerMilliC(), new DemoSensorC() as Sensor, 
+    new AMSenderC(AM_OSCILLOSCOPE), new AMReceiverC(AM_OSCILLOSCOPE);
+
+  OscilloscopeC.Boot -> MainC;
+  OscilloscopeC.RadioControl -> ActiveMessageC;
+  OscilloscopeC.AMSend -> AMSenderC;
+  OscilloscopeC.Receive -> AMReceiverC;
+  OscilloscopeC.Timer -> TimerMilliC;
+  OscilloscopeC.Read -> Sensor;
+  OscilloscopeC.Leds -> LedsC;
+
+  
+}
diff --git a/apps/Oscilloscope/OscilloscopeC.nc b/apps/Oscilloscope/OscilloscopeC.nc
new file mode 100644
index 00000000..3003b594
--- /dev/null
+++ b/apps/Oscilloscope/OscilloscopeC.nc
@@ -0,0 +1,142 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Oscilloscope demo application. See README.txt file in this directory.
+ *
+ * @author David Gay
+ */
+#include "Timer.h"
+#include "Oscilloscope.h"
+
+module OscilloscopeC @safe()
+{
+  uses {
+    interface Boot;
+    interface SplitControl as RadioControl;
+    interface AMSend;
+    interface Receive;
+    interface Timer<TMilli>;
+    interface Read<uint16_t>;
+    interface Leds;
+  }
+}
+implementation
+{
+  message_t sendBuf;
+  bool sendBusy;
+
+  /* Current local state - interval, version and accumulated readings */
+  oscilloscope_t local;
+
+  uint8_t reading; /* 0 to NREADINGS */
+
+  /* When we head an Oscilloscope message, we check it's sample count. If
+     it's ahead of ours, we "jump" forwards (set our count to the received
+     count). However, we must then suppress our next count increment. This
+     is a very simple form of "time" synchronization (for an abstract
+     notion of time). */
+  bool suppressCountChange;
+
+  // Use LEDs to report various status issues.
+  void report_problem() { call Leds.led0Toggle(); }
+  void report_sent() { call Leds.led1Toggle(); }
+  void report_received() { call Leds.led2Toggle(); }
+
+  event void Boot.booted() {
+    local.interval = DEFAULT_INTERVAL;
+    local.id = TOS_NODE_ID;
+    if (call RadioControl.start() != SUCCESS)
+      report_problem();
+  }
+
+  void startTimer() {
+    call Timer.startPeriodic(local.interval);
+    reading = 0;
+  }
+
+  event void RadioControl.startDone(error_t error) {
+    startTimer();
+  }
+
+  event void RadioControl.stopDone(error_t error) {
+  }
+
+  event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    oscilloscope_t *omsg = payload;
+
+    report_received();
+
+    /* If we receive a newer version, update our interval. 
+       If we hear from a future count, jump ahead but suppress our own change
+    */
+    if (omsg->version > local.version)
+      {
+	local.version = omsg->version;
+	local.interval = omsg->interval;
+	startTimer();
+      }
+    if (omsg->count > local.count)
+      {
+	local.count = omsg->count;
+	suppressCountChange = TRUE;
+      }
+
+    return msg;
+  }
+
+  /* At each sample period:
+     - if local sample buffer is full, send accumulated samples
+     - read next sample
+  */
+  event void Timer.fired() {
+    if (reading == NREADINGS)
+      {
+	if (!sendBusy && sizeof local <= call AMSend.maxPayloadLength())
+	  {
+	    // Don't need to check for null because we've already checked length
+	    // above
+	    memcpy(call AMSend.getPayload(&sendBuf, sizeof(local)), &local, sizeof local);
+	    if (call AMSend.send(AM_BROADCAST_ADDR, &sendBuf, sizeof local) == SUCCESS)
+	      sendBusy = TRUE;
+	  }
+	if (!sendBusy)
+	  report_problem();
+
+	reading = 0;
+	/* Part 2 of cheap "time sync": increment our count if we didn't
+	   jump ahead. */
+	if (!suppressCountChange)
+	  local.count++;
+	suppressCountChange = FALSE;
+      }
+    if (call Read.read() != SUCCESS)
+      report_problem();
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t error) {
+    if (error == SUCCESS)
+      report_sent();
+    else
+      report_problem();
+
+    sendBusy = FALSE;
+  }
+
+  event void Read.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS)
+      {
+	data = 0xffff;
+	report_problem();
+      }
+    if (reading < NREADINGS) 
+      local.readings[reading++] = data;
+  }
+}
diff --git a/apps/Oscilloscope/README.txt b/apps/Oscilloscope/README.txt
new file mode 100644
index 00000000..39d3af2a
--- /dev/null
+++ b/apps/Oscilloscope/README.txt
@@ -0,0 +1,42 @@
+README for Oscilloscope
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+Oscilloscope is a simple data-collection demo. It periodically samples
+the default sensor and broadcasts a message over the radio every 10
+readings. These readings can be received by a BaseStation mote and
+displayed by the Java "Oscilloscope" application found in the java
+subdirectory. The sampling rate starts at 4Hz, but can be changed from
+the Java application.
+
+You can compile Oscilloscope with a sensor board's default sensor by compiling
+as follows:
+  SENSORBOARD=<sensorboard name> make <mote>
+
+You can change the sensor used by editing OscilloscopeAppC.nc.
+
+Tools:
+
+To display the readings from Oscilloscope motes, install the BaseStation
+application on a mote connected to your PC's serial port. Then run the 
+Oscilloscope display application found in the java subdirectory, as
+follows:
+  cd java
+  make
+  java net.tinyos.sf.SerialForwarder -comm serial@<serial port>:<mote>
+  # e.g., java net.tinyos.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2
+  # or java net.tinyos.sf.SerialForwarder -comm serial@COM2:telosb
+  ./run
+
+The controls at the bottom of the screen allow you to zoom in or out the X
+axis, change the range of the Y axis, and clear all received data. You can
+change the color used to display a mote by clicking on its color in the
+mote table.
+
+Known bugs/limitations:
+
+None.
+
+
+$Id: README.txt,v 1.6 2008-07-25 03:01:45 regehr Exp $
diff --git a/apps/Oscilloscope/java/.cvsignore b/apps/Oscilloscope/java/.cvsignore
new file mode 100644
index 00000000..3c8789ae
--- /dev/null
+++ b/apps/Oscilloscope/java/.cvsignore
@@ -0,0 +1,5 @@
+Constants.java
+OscilloscopeMsg.java
+oscilloscope.jar
+
+*.class
diff --git a/apps/Oscilloscope/java/ColorCellEditor.java b/apps/Oscilloscope/java/ColorCellEditor.java
new file mode 100644
index 00000000..133fd2fa
--- /dev/null
+++ b/apps/Oscilloscope/java/ColorCellEditor.java
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import javax.swing.table.*;
+import java.awt.*;
+import java.awt.event.*;
+
+/* Editor for table cells representing colors. Popup a color chooser. */
+public class ColorCellEditor extends AbstractCellEditor
+    implements TableCellEditor {
+    private Color color;
+    private JButton button;
+
+    public ColorCellEditor(String title) {
+    button = new JButton();
+    final JColorChooser chooser = new JColorChooser();
+    final JDialog dialog = JColorChooser.createDialog
+        (button, title, true, chooser,
+         new ActionListener() {
+         public void actionPerformed(ActionEvent e) {
+             color = chooser.getColor();
+         } },
+         null);
+
+    button.setBorderPainted(false);
+    button.addActionListener
+        (new ActionListener () {
+            public void actionPerformed(ActionEvent e) {
+            button.setBackground(color);
+            chooser.setColor(color);
+            dialog.setVisible(true);
+            fireEditingStopped();
+            } } );
+    
+    }
+
+    public Object getCellEditorValue() { return color; }
+    public Component getTableCellEditorComponent(JTable table,
+                                                 Object value,
+                                                 boolean isSelected,
+                                                 int row,
+                                                 int column) {
+        color = (Color)value;
+        return button;
+    }
+}
+
diff --git a/apps/Oscilloscope/java/Data.java b/apps/Oscilloscope/java/Data.java
new file mode 100644
index 00000000..1cacee2c
--- /dev/null
+++ b/apps/Oscilloscope/java/Data.java
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import java.util.*;
+
+/* Hold all data received from motes */
+class Data {
+    /* The mote data is stored in a flat array indexed by a mote's identifier.
+       A null value indicates no mote with that identifier. */
+    private Node[] nodes = new Node[256];
+    private Oscilloscope parent;
+
+    Data(Oscilloscope parent) {
+    this.parent = parent;
+    }
+
+    /* Data received from mote nodeId containing NREADINGS samples from
+       messageId * NREADINGS onwards. Tell parent if this is a new node. */
+    void update(int nodeId, int messageId, int readings[]) {
+    if (nodeId >= nodes.length) {
+        int newLength = nodes.length * 2;
+        if (nodeId >= newLength) {
+            newLength = nodeId + 1;
+        }
+
+        Node newNodes[] = new Node[newLength];
+        System.arraycopy(nodes, 0, newNodes, 0, nodes.length);
+        nodes = newNodes;
+    }
+    Node node = nodes[nodeId];
+    if (node == null) {
+        nodes[nodeId] = node = new Node(nodeId);
+        parent.newNode(nodeId);
+    }
+    node.update(messageId, readings);
+    }
+
+    /* Return value of sample x for mote nodeId, or -1 for missing data */
+    int getData(int nodeId, int x) {
+    if (nodeId >= nodes.length || nodes[nodeId] == null)
+        return -1;
+    return nodes[nodeId].getData(x);
+    }
+
+    /* Return number of last known sample on mote nodeId. Returns 0 for
+       unknown motes. */
+    int maxX(int nodeId) {
+    if (nodeId >= nodes.length || nodes[nodeId] == null)
+        return 0;
+    return nodes[nodeId].maxX();
+    }
+
+    /* Return number of largest known sample on all motes (0 if there are no
+       motes) */
+    int maxX() {
+    int max = 0;
+
+    for (int i = 0; i < nodes.length; i++) {
+        if (nodes[i] != null) {
+        int nmax = nodes[i].maxX();
+
+        if (nmax > max)
+            max = nmax;
+        }
+    }
+
+    return max;
+    }
+}
diff --git a/apps/Oscilloscope/java/Graph.java b/apps/Oscilloscope/java/Graph.java
new file mode 100644
index 00000000..a0088c31
--- /dev/null
+++ b/apps/Oscilloscope/java/Graph.java
@@ -0,0 +1,248 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.awt.font.*;
+import java.awt.geom.*;
+import java.util.*;
+
+/* Panel for drawing mote-data graphs */
+class Graph extends JPanel
+{
+    final static int BORDER_LEFT = 40;
+    final static int BORDER_RIGHT = 0;
+    final static int BORDER_TOP = 10;
+    final static int BORDER_BOTTOM = 10;
+
+    final static int TICK_SPACING = 40;
+    final static int MAX_TICKS = 16;
+    final static int TICK_WIDTH = 10;
+
+    final static int MIN_WIDTH = 50;
+
+    int gx0, gx1, gy0, gy1; // graph bounds
+    int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale
+    Window parent;
+
+    /* Graph to screen coordinate conversion support */
+    int height, width;
+    double xscale, yscale;
+
+    void updateConversion() {
+    height = getHeight() - BORDER_TOP - BORDER_BOTTOM;
+    width = getWidth() - BORDER_LEFT - BORDER_RIGHT;
+    if (height < 1) {
+        height = 1;
+    }
+    if (width < 1) {
+        width = 1;
+    }
+    xscale = (double)width / (gx1 - gx0 + 1);
+    yscale = (double)height / (gy1 - gy0 + 1);
+    }
+
+    Graphics makeClip(Graphics g) {
+    return g.create(BORDER_LEFT, BORDER_TOP, width, height);
+    }
+
+    // Note that these do not include the border offset!
+    int screenX(int gx) {
+    return (int)(xscale * (gx - gx0) + 0.5);
+    }
+
+    int screenY(int gy) {
+    return (int)(height - yscale * (gy - gy0));
+    }
+
+    int graphX(int sx) {
+    return (int)(sx / xscale + gx0 + 0.5);
+    }
+
+    Graph(Window parent) {
+    this.parent = parent;
+    gy0 = 0; gy1 = 0xffff;
+    gx0 = 0; gx1 = MIN_WIDTH << scale;
+    }
+
+    void rightDrawString(
+            Graphics2D g, 
+            String s, 
+            int x, 
+            int y) {
+    TextLayout layout =
+        new TextLayout(s, parent.smallFont, g.getFontRenderContext());
+    Rectangle2D bounds = layout.getBounds();
+    layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2);
+    }
+
+    protected void paintComponent(Graphics g) {
+    Graphics2D g2d = (Graphics2D)g;
+
+    /* Repaint. Synchronize on Oscilloscope to avoid data changing.
+       Simply clear panel, draw Y axis and all the mote graphs. */
+    synchronized (parent.parent) {
+        updateConversion();
+        g2d.setColor(Color.BLACK);
+        g2d.fillRect(0, 0, getWidth(), getHeight());
+        drawYAxis(g2d);
+
+        Graphics clipped = makeClip(g2d);
+        int count = parent.moteListModel.size();
+        for (int i = 0; i < count; i++) {
+        clipped.setColor(parent.moteListModel.getColor(i));
+        drawGraph(clipped, parent.moteListModel.get(i));
+        }
+    }
+    }
+
+    /* Draw the Y-axis */
+    protected void drawYAxis(Graphics2D g) {
+    int axis_x = BORDER_LEFT - 1;
+    int height = getHeight() - BORDER_BOTTOM - BORDER_TOP;
+
+    g.setColor(Color.WHITE);
+    g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1);
+
+    /* Draw a reasonable set of tick marks */
+    int nTicks = height / TICK_SPACING;
+    if (nTicks > MAX_TICKS) {
+        nTicks = MAX_TICKS;
+    }
+
+    int tickInterval = (gy1 - gy0 + 1) / nTicks;
+    if (tickInterval == 0) {
+        tickInterval = 1;
+    }
+
+    /* Tick interval should be of the family A * 10^B,
+       where A = 1, 2 * or 5. We tend more to rounding A up, to reduce
+       rather than increase the number of ticks. */
+    int B = (int)(Math.log(tickInterval) / Math.log(10));
+    int A = (int)(tickInterval / Math.pow(10, B) + 0.5);
+    if (A > 2) {
+        A = 5;
+    } else if (A > 5) {
+        A = 10;
+    }
+
+    tickInterval = A * (int)Math.pow(10, B);
+
+    /* Ticks are printed at multiples of tickInterval */
+    int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval;
+    while (tick <= gy1) {
+        int stick = screenY(tick) + BORDER_TOP;
+        rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick);
+        g.drawLine(axis_x - TICK_WIDTH / 2, stick,
+               axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick);
+        tick += tickInterval;
+    }
+    
+    }
+
+    /* Draw graph for mote nodeId */
+    protected void drawGraph(Graphics g, int nodeId) {
+    SingleGraph sg = new SingleGraph(g, nodeId);
+
+    if (gx1 - gx0 >= width) {
+        for (int sx = 0; sx < width; sx++)
+        sg.nextPoint(g, graphX(sx), sx);
+    } else {
+        for (int gx = gx0; gx <= gx1; gx++)
+        sg.nextPoint(g, gx, screenX(gx));
+    }
+    }
+
+    /* Inner class to simplify drawing a graph. Simplify initialise it, then
+       feed it the X screen and graph coordinates, from left to right. */
+    private class SingleGraph {
+    int lastsx, lastsy, nodeId;
+
+    /* Start drawing the graph mote id */
+    SingleGraph(Graphics g, int id) {
+        nodeId = id;
+        lastsx = -1;
+        lastsy = -1;
+    }
+
+    /* Next point in mote's graph is at x value gx, screen coordinate sx */
+    void nextPoint(Graphics g, int gx, int sx) {
+        int gy = parent.parent.data.getData(nodeId, gx);
+        int sy = -1;
+
+        if (gy >= 0) { // Ignore missing values
+        double rsy = height - yscale * (gy - gy0);
+
+        // Ignore problem values
+        if (rsy >= -1e6 && rsy <= 1e6) {
+            sy = (int)(rsy + 0.5);
+        }
+
+        if (lastsy >= 0 && sy >= 0) {
+            g.drawLine(lastsx, lastsy, sx, sy);
+        }
+        }
+        lastsx = sx;
+        lastsy = sy;
+    }
+    }
+
+    /* Update X-axis range in GUI */
+    void updateXLabel() {
+    parent.xLabel.setText("X: " + gx0 + " - " + gx1);
+    }
+
+    /* Ensure that graph is nicely positioned on screen. max is the largest 
+       sample number received from any mote. */
+    private void recenter(int max) {
+    // New data will show up at the 3/4 point
+    // The 2nd term ensures that gx1 will be >= max
+    int scrollby = ((gx1 - gx0) >> 2) + (max - gx1);
+    gx0 += scrollby;
+    gx1 += scrollby;
+    if (gx0 < 0) { // don't bother showing negative sample numbers
+        gx1 -= gx0;
+        gx0 = 0;
+    }
+    updateXLabel();
+    }
+
+    /* New data received. Redraw graph, scrolling if necessary */
+    void newData() {
+    int max = parent.parent.data.maxX();
+
+    if (max > gx1 || max < gx0) {
+        recenter(max);
+    }
+    repaint();
+    }
+
+    /* User set the X-axis scale to newScale */
+    void setScale(int newScale) {
+    gx1 = gx0 + (MIN_WIDTH << newScale);
+    scale = newScale;
+    recenter(parent.parent.data.maxX());
+    repaint();
+    }
+
+    /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus
+       values (return false), or accept, redraw and return true. */
+    boolean setYAxis(int newy0, int newy1) {
+    if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 ||
+        newy1 < 0 || newy1 > 65535) {
+        return false;
+    }
+    gy0 = newy0;
+    gy1 = newy1;
+    repaint();
+    return true;
+    }
+}
diff --git a/apps/Oscilloscope/java/Makefile b/apps/Oscilloscope/java/Makefile
new file mode 100644
index 00000000..94fe64d0
--- /dev/null
+++ b/apps/Oscilloscope/java/Makefile
@@ -0,0 +1,21 @@
+GEN=OscilloscopeMsg.java Constants.java
+
+all: oscilloscope.jar
+
+oscilloscope.jar: Oscilloscope.class
+	jar cf $@ *.class
+
+OscilloscopeMsg.java: ../Oscilloscope.h
+	mig -target=null -java-classname=OscilloscopeMsg java ../Oscilloscope.h oscilloscope -o $@
+
+Constants.java: ../Oscilloscope.h
+	ncg -target=null -java-classname=Constants java ../Oscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@
+
+Oscilloscope.class: $(wildcard *.java) $(GEN)
+	javac *.java
+
+clean:
+	rm -f *.class $(GEN)
+
+veryclean: clean
+	rm oscilloscope.jar
diff --git a/apps/Oscilloscope/java/Node.java b/apps/Oscilloscope/java/Node.java
new file mode 100644
index 00000000..da37d78e
--- /dev/null
+++ b/apps/Oscilloscope/java/Node.java
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Class holding all data received from a mote.
+ */
+class Node {
+    /* Data is hold in an array whose size is a multiple of INCREMENT, and
+       INCREMENT itself must be a multiple of Constant.NREADINGS. This
+       simplifies handling the extension and clipping of old data
+       (see setEnd) */
+    final static int INCREMENT = 100 * Constants.NREADINGS;
+    final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT
+
+    /* The mote's identifier */
+    int id;
+
+    /* Data received from the mote. data[0] is the dataStart'th sample
+       Indexes 0 through dataEnd - dataStart - 1 hold data.
+       Samples are 16-bit unsigned numbers, -1 indicates missing data. */
+    int[] data;
+    int dataStart, dataEnd;
+
+    Node(int _id) {
+    id = _id;
+    }
+
+    /* Update data to hold received samples newDataIndex .. newEnd.
+       If we receive data with a lower index, we discard newer data
+       (we assume the mote rebooted). */
+    private void setEnd(int newDataIndex, int newEnd) {
+    if (newDataIndex < dataStart || data == null) {
+        /* New data is before the start of what we have. Just throw it
+           all away and start again */
+        dataStart = newDataIndex;
+        data = new int[INCREMENT];
+    }
+    if (newEnd > dataStart + data.length) {
+        /* Try extending first */
+        if (data.length < MAX_SIZE) {
+        int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT;
+        if (newLength >= MAX_SIZE) {
+            newLength = MAX_SIZE;
+        }
+
+        int[] newData = new int[newLength];
+        System.arraycopy(data, 0, newData, 0, data.length);
+        data = newData;
+
+        }
+        if (newEnd > dataStart + data.length) {
+        /* Still doesn't fit. Squish.
+           We assume INCREMENT >= (newEnd - newDataIndex), and ensure
+           that dataStart + data.length - INCREMENT = newDataIndex */
+        int newStart = newDataIndex + INCREMENT - data.length;
+
+        if (dataStart + data.length > newStart) {
+            System.arraycopy(data, newStart - dataStart, data, 0,
+                     data.length - (newStart - dataStart));
+        }
+        dataStart = newStart;
+        }
+    }
+    /* Mark any missing data as invalid */
+    for (int i = dataEnd < dataStart ? dataStart : dataEnd;
+         i < newDataIndex; i++) {
+        data[i - dataStart] = -1;
+    }
+
+    /* If we receive a count less than the old count, we assume the old
+       data is invalid */
+    dataEnd = newEnd;
+
+    }
+
+    /* Data received containing NREADINGS samples from messageId * NREADINGS 
+       onwards */
+    void update(int messageId, int[] readings) {
+    int start = messageId * Constants.NREADINGS;
+    setEnd(start, start + Constants.NREADINGS);
+    for (int i = 0; i < readings.length; i++) {
+        data[start - dataStart + i] = readings[i];
+    }
+    }
+
+    /* Return value of sample x, or -1 for missing data */
+    int getData(int x) {
+    if (x < dataStart || x >= dataEnd) {
+        return -1;
+    } else {
+        return data[x - dataStart];
+    }
+    }
+
+    /* Return number of last known sample */
+    int maxX() {
+    return dataEnd - 1;
+    }
+}
diff --git a/apps/Oscilloscope/java/Oscilloscope.java b/apps/Oscilloscope/java/Oscilloscope.java
new file mode 100644
index 00000000..40e6863a
--- /dev/null
+++ b/apps/Oscilloscope/java/Oscilloscope.java
@@ -0,0 +1,130 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import net.tinyos.message.*;
+import net.tinyos.util.*;
+import java.io.*;
+
+/* The "Oscilloscope" demo app. Displays graphs showing data received from
+   the Oscilloscope mote application, and allows the user to:
+   - zoom in or out on the X axis
+   - set the scale on the Y axis
+   - change the sampling period
+   - change the color of each mote's graph
+   - clear all data
+
+   This application is in three parts:
+   - the Node and Data objects store data received from the motes and support
+     simple queries
+   - the Window and Graph and miscellaneous support objects implement the
+     GUI and graph drawing
+   - the Oscilloscope object talks to the motes and coordinates the other
+     objects
+
+   Synchronization is handled through the Oscilloscope object. Any operation
+   that reads or writes the mote data must be synchronized on Oscilloscope.
+   Note that the messageReceived method below is synchronized, so no further
+   synchronization is needed when updating state based on received messages.
+*/
+public class Oscilloscope implements MessageListener
+{
+    MoteIF mote;
+    Data data;
+    Window window;
+
+    /* The current sampling period. If we receive a message from a mote
+       with a newer version, we update our interval. If we receive a message
+       with an older version, we broadcast a message with the current interval
+       and version. If the user changes the interval, we increment the
+       version and broadcast the new interval and version. */
+    int interval = Constants.DEFAULT_INTERVAL;
+    int version = -1;
+
+    /* Main entry point */
+    void run() {
+    data = new Data(this);
+    window = new Window(this);
+    window.setup();
+    mote = new MoteIF(PrintStreamMessenger.err);
+    mote.registerListener(new OscilloscopeMsg(), this);
+    }
+
+    /* The data object has informed us that nodeId is a previously unknown
+       mote. Update the GUI. */
+    void newNode(int nodeId) {
+    window.newNode(nodeId);
+    }
+
+    public synchronized void messageReceived(int dest_addr, 
+            Message msg) {
+    if (msg instanceof OscilloscopeMsg) {
+        OscilloscopeMsg omsg = (OscilloscopeMsg)msg;
+
+        /* Update interval and mote data */
+        periodUpdate(omsg.get_version(), omsg.get_interval());
+        data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings());
+
+        /* Inform the GUI that new data showed up */
+        window.newData();
+    }
+    }
+
+    /* A potentially new version and interval has been received from the
+       mote */
+    void periodUpdate(int moteVersion, int moteInterval) {
+    if (moteVersion > version) {
+        /* It's new. Update our vision of the interval. */
+        version = moteVersion;
+        interval = moteInterval;
+        window.updateSamplePeriod();
+    }
+    else if (moteVersion < version) {
+        /* It's old. Update the mote's vision of the interval. */
+        sendInterval();
+    }
+    }
+
+    /* The user wants to set the interval to newPeriod. Refuse bogus values
+       and return false, or accept the change, broadcast it, and return
+       true */
+    synchronized boolean setInterval(int newPeriod) {
+    if (newPeriod < 1 || newPeriod > 65535) {
+        return false;
+    }
+    interval = newPeriod;
+    version++;
+    sendInterval();
+    return true;
+    }
+
+    /* Broadcast a version+interval message. */
+    void sendInterval() {
+    OscilloscopeMsg omsg = new OscilloscopeMsg();
+
+    omsg.set_version(version);
+    omsg.set_interval(interval);
+    try {
+        mote.send(MoteIF.TOS_BCAST_ADDR, omsg);
+    }
+    catch (IOException e) {
+        window.error("Cannot send message to mote");
+    }
+    }
+
+    /* User wants to clear all data. */
+    void clear() {
+    data = new Data(this);
+    }
+
+    public static void main(String[] args) {
+    Oscilloscope me = new Oscilloscope();
+    me.run();
+    }
+}
diff --git a/apps/Oscilloscope/java/Window.java b/apps/Oscilloscope/java/Window.java
new file mode 100644
index 00000000..df26ebaf
--- /dev/null
+++ b/apps/Oscilloscope/java/Window.java
@@ -0,0 +1,313 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import javax.swing.table.*;
+import javax.swing.event.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.util.*;
+
+/* The main GUI object. Build the GUI and coordinate all user activities */
+class Window {
+    Oscilloscope parent;
+    Graph graph;
+    
+    Font smallFont = new Font("Dialog", Font.PLAIN, 8);
+    Font boldFont = new Font("Dialog", Font.BOLD, 12);
+    Font normalFont = new Font("Dialog", Font.PLAIN, 12);
+    MoteTableModel moteListModel; // GUI view of mote list
+    JLabel xLabel; // Label displaying X axis range
+    JTextField sampleText, yText; // inputs for sample period and Y axis range
+    JFrame frame;
+
+    Window(Oscilloscope parent) {
+	this.parent = parent;
+    }
+
+    /* A model for the mote table, and general utility operations on the mote
+       list */
+    class MoteTableModel extends AbstractTableModel {
+	private ArrayList<Integer> motes = new ArrayList<Integer>();
+	private ArrayList<Color> colors = new ArrayList<Color>();
+
+	/* Initial mote colors cycle through this list. Add more colors if
+	   you want. */
+	private Color[] cycle = {
+	    Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA,
+	    Color.YELLOW, Color.GRAY, Color.YELLOW
+	};
+	int cycleIndex;
+	
+	/* TableModel methods for achieving our table appearance */
+	public String getColumnName(int col) {
+	    if (col == 0) {
+		return "Mote";
+	    } else {
+		return "Color";
+	    }
+	}
+
+	public int getColumnCount() { return 2; }
+
+	public synchronized int getRowCount() { return motes.size(); }
+	
+	public synchronized Object getValueAt(int row, int col) {
+	    if (col == 0) {
+		return motes.get(row);
+	    } else {
+		return colors.get(row);
+	    }
+	}
+
+        public Class getColumnClass(int col) {
+            return getValueAt(0, col).getClass();
+        }
+
+	public boolean isCellEditable(int row, int col) {
+	    return col == 1;
+	}
+
+	public synchronized void setValueAt(Object value, int row, int col) {
+	    colors.set(row, (Color)value);
+            fireTableCellUpdated(row, col);
+	    graph.repaint();
+        }
+
+	/* Return mote id of i'th mote */
+	int get(int i) { return (motes.get(i)).intValue(); }
+	
+	/* Return color of i'th mote */
+	Color getColor(int i)  { return colors.get(i); }
+	
+	/* Return number of motes */
+	int size() { return motes.size(); }
+	
+	/* Add a new mote */
+	synchronized void newNode(int nodeId) {
+	    /* Shock, horror. No binary search. */
+	    int i, len = motes.size();
+	    
+	    for (i = 0; ; i++) {
+		if (i == len || nodeId < get(i)) {
+		    motes.add(i, new Integer(nodeId));
+		    // Cycle through a set of initial colors
+		    colors.add(i, cycle[cycleIndex++ % cycle.length]);
+		    break;
+		}
+	    }
+	    fireTableRowsInserted(i, i);
+	}
+	
+	/* Remove all motes */
+	void clear() {
+	    motes = new ArrayList<Integer>();
+	    colors = new ArrayList<Color>();
+	    fireTableDataChanged();
+	}
+    } /* End of MoteTableModel */
+
+    /* A simple full-color cell */
+    static class MoteColor extends JLabel implements TableCellRenderer {
+	public MoteColor() { setOpaque(true); }
+	public Component getTableCellRendererComponent
+	    (JTable table, Object color,
+	     boolean isSelected, boolean hasFocus, 
+	     int row, int column) {
+	    setBackground((Color)color);
+	    return this;
+	}
+    }
+
+    /* Convenience methods for making buttons, labels and textfields.
+       Simplifies code and ensures a consistent style. */
+
+    JButton makeButton(String label, ActionListener action) {
+	JButton button = new JButton();
+        button.setText(label);
+        button.setFont(boldFont);
+	button.addActionListener(action);
+	return button;
+    }
+
+    JLabel makeLabel(String txt, int alignment) {
+	JLabel label = new JLabel(txt, alignment);
+	label.setFont(boldFont);
+	return label;
+    }
+    
+    JLabel makeSmallLabel(String txt, int alignment) {
+	JLabel label = new JLabel(txt, alignment);
+	label.setFont(smallFont);
+	return label;
+    }
+    
+    JTextField makeTextField(int columns, ActionListener action) {
+	JTextField tf = new JTextField(columns);
+	tf.setFont(normalFont);
+	tf.setMaximumSize(tf.getPreferredSize());
+	tf.addActionListener(action);
+	return tf;
+    }
+
+    /* Build the GUI */
+    void setup() {
+	JPanel main = new JPanel(new BorderLayout());
+
+	main.setMinimumSize(new Dimension(500, 250));
+	main.setPreferredSize(new Dimension(800, 400));
+	
+	// Three panels: mote list, graph, controls
+	moteListModel = new  MoteTableModel();
+	JTable moteList = new JTable(moteListModel);
+	moteList.setDefaultRenderer(Color.class, new MoteColor());
+	moteList.setDefaultEditor(Color.class, 
+				  new ColorCellEditor("Pick Mote Color"));
+	moteList.setPreferredScrollableViewportSize(new Dimension(100, 400));
+	JScrollPane motePanel = new JScrollPane();
+	motePanel.getViewport().add(moteList, null);
+	main.add(motePanel, BorderLayout.WEST);
+	
+	graph = new Graph(this);
+	main.add(graph, BorderLayout.CENTER);
+	
+	// Controls. Organised using box layouts.
+	
+	// Sample period.
+	JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT);
+	sampleText = makeTextField(6, new ActionListener() {
+		public void actionPerformed(ActionEvent e) { setSamplePeriod(); }
+	    } );
+	updateSamplePeriod();
+	
+	// Clear data.
+	JButton clearButton = makeButton("Clear data", new ActionListener() {
+		public void actionPerformed(ActionEvent e) { clearData(); }
+	    } );
+	
+	// Adjust X-axis zoom.
+	Box xControl = new Box(BoxLayout.Y_AXIS);
+	xLabel = makeLabel("", JLabel.CENTER);
+	final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale);
+	Hashtable<Integer, JLabel> xTable = new Hashtable<Integer, JLabel>();
+	for (int i = 0; i <= 8; i += 2) {
+	    xTable.put(new Integer(i),
+		       makeSmallLabel("" + (Graph.MIN_WIDTH << i),
+				      JLabel.CENTER));
+	}
+	xSlider.setLabelTable(xTable);
+	xSlider.setPaintLabels(true);
+	graph.updateXLabel();
+	graph.setScale(graph.scale);
+	xSlider.addChangeListener(new ChangeListener() {
+		public void stateChanged(ChangeEvent e) {
+		    //if (!xSlider.getValueIsAdjusting())
+		    graph.setScale((int)xSlider.getValue());
+		}
+	    });
+	xControl.add(xLabel);
+	xControl.add(xSlider);
+	
+	// Adjust Y-axis range.
+	JLabel yLabel = makeLabel("Y:", JLabel.RIGHT);
+	yText = makeTextField(12, new ActionListener() {
+		public void actionPerformed(ActionEvent e) { setYAxis(); }
+	    } );
+	yText.setText(graph.gy0 + " - " + graph.gy1);
+	
+	Box controls = new Box(BoxLayout.X_AXIS);
+	controls.add(clearButton);
+	controls.add(Box.createHorizontalGlue());
+	controls.add(Box.createRigidArea(new Dimension(20, 0)));
+	controls.add(sampleLabel);
+	controls.add(sampleText);
+	controls.add(Box.createHorizontalGlue());
+	controls.add(Box.createRigidArea(new Dimension(20, 0)));
+	controls.add(xControl);
+	controls.add(yLabel);
+	controls.add(yText);
+	main.add(controls, BorderLayout.SOUTH);
+
+	// The frame part
+	frame = new JFrame("Oscilloscope");
+	frame.setSize(main.getPreferredSize());
+	frame.getContentPane().add(main);
+	frame.setVisible(true);
+	frame.addWindowListener(new WindowAdapter() {
+		public void windowClosing(WindowEvent e) { System.exit(0); }
+	    });
+    }
+
+    /* User operation: clear data */
+    void clearData() {
+	synchronized (parent) {
+	    moteListModel.clear();
+	    parent.clear();
+	    graph.newData();
+	}
+    }
+
+    /* User operation: set Y-axis range. */
+    void setYAxis() {
+	String val = yText.getText();
+
+	try {
+	    int dash = val.indexOf('-');
+	    if (dash >= 0) {
+		String min = val.substring(0, dash).trim();
+		String max = val.substring(dash + 1).trim();
+
+		if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max))) {
+		    error("Invalid range " 
+			  + min 
+			  + " - " 
+			  + max 
+			  + " (expected values between 0 and 65535)");
+		}
+		return;
+	    }
+	}
+	catch (NumberFormatException e) { }
+	error("Invalid range " + val + " (expected NN-MM)");
+    }
+
+    /* User operation: set sample period. */
+    void setSamplePeriod() {
+	String periodS = sampleText.getText().trim();
+	try {
+	    int newPeriod = Integer.parseInt(periodS);
+	    if (parent.setInterval(newPeriod)) {
+		return;
+	    }
+	}
+	catch (NumberFormatException e) { }
+	error("Invalid sample period " + periodS);
+    }
+
+    /* Notification: sample period changed. */
+    void updateSamplePeriod() {
+	sampleText.setText("" + parent.interval);
+    }
+
+    /* Notification: new node. */
+    void newNode(int nodeId) {
+	moteListModel.newNode(nodeId);
+    }
+
+    /* Notification: new data. */
+    void newData() {
+	graph.newData();
+    }
+
+    void error(String msg) {
+	JOptionPane.showMessageDialog(frame, msg, "Error",
+				      JOptionPane.ERROR_MESSAGE);
+    }
+}
diff --git a/apps/Oscilloscope/java/build.xml b/apps/Oscilloscope/java/build.xml
new file mode 100644
index 00000000..e5a3eab3
--- /dev/null
+++ b/apps/Oscilloscope/java/build.xml
@@ -0,0 +1,19 @@
+<project name="tinyos-2.x app oscilloscope" default="all">
+
+	<target name="all" >
+		<exec executable="make" failonerror="true">
+			<arg line="all" />
+		</exec>
+	</target>
+
+	<target name="java" depends="all">
+	</target>
+
+	<target name="javadoc" >
+		<echo message = "Building javadoc" />
+		<exec executable="make" failonerror="true">
+			<arg line="javadoc" />
+		</exec>
+	</target>
+	
+</project>
diff --git a/apps/Oscilloscope/java/oscilloscope.jar b/apps/Oscilloscope/java/oscilloscope.jar
new file mode 100644
index 00000000..1ac1bd60
Binary files /dev/null and b/apps/Oscilloscope/java/oscilloscope.jar differ
diff --git a/apps/Oscilloscope/java/run b/apps/Oscilloscope/java/run
new file mode 100755
index 00000000..5b5df76f
--- /dev/null
+++ b/apps/Oscilloscope/java/run
@@ -0,0 +1,7 @@
+#!/bin/sh
+if cygpath -w / >/dev/null 2>/dev/null; then
+  CLASSPATH="oscilloscope.jar;$CLASSPATH"
+else
+  CLASSPATH="oscilloscope.jar:$CLASSPATH"
+fi
+java Oscilloscope
diff --git a/apps/Oscilloscope/oscilloscope.py b/apps/Oscilloscope/oscilloscope.py
new file mode 100644
index 00000000..3b881add
--- /dev/null
+++ b/apps/Oscilloscope/oscilloscope.py
@@ -0,0 +1,29 @@
+#!/usr/bin/env python
+
+import sys
+import tos
+
+AM_OSCILLOSCOPE = 0x93
+
+class OscilloscopeMsg(tos.Packet):
+    def __init__(self, packet = None):
+        tos.Packet.__init__(self,
+                            [('version',  'int', 2),
+                             ('interval', 'int', 2),
+                             ('id',       'int', 2),
+                             ('count',    'int', 2),
+                             ('readings', 'blob', None)],
+                            packet)
+if '-h' in sys.argv:
+    print "Usage:", sys.argv[0], "serial@/dev/ttyUSB0:57600"
+    sys.exit()
+
+am = tos.AM()
+
+while True:
+    p = am.read()
+    if p and p.type == AM_OSCILLOSCOPE:
+        msg = OscilloscopeMsg(p.data)
+        print msg.id, msg.count, [i<<8 | j for (i,j) in zip(msg.readings[::2], msg.readings[1::2])]
+        #print msg
+
diff --git a/apps/Powerup/Makefile b/apps/Powerup/Makefile
new file mode 100644
index 00000000..bfe92d41
--- /dev/null
+++ b/apps/Powerup/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=PowerupAppC
+include $(MAKERULES)
+
diff --git a/apps/Powerup/PowerupAppC.nc b/apps/Powerup/PowerupAppC.nc
new file mode 100644
index 00000000..6d65720a
--- /dev/null
+++ b/apps/Powerup/PowerupAppC.nc
@@ -0,0 +1,58 @@
+// $Id: PowerupAppC.nc,v 1.5 2010-06-29 22:07:17 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Configuration for the PowerUp application.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+configuration PowerupAppC{}
+implementation {
+  components MainC, PowerupC, LedsC;
+
+  MainC.Boot <- PowerupC;
+  
+  
+  PowerupC -> LedsC.Leds;
+}
+
diff --git a/apps/Powerup/PowerupC.nc b/apps/Powerup/PowerupC.nc
new file mode 100644
index 00000000..921512c5
--- /dev/null
+++ b/apps/Powerup/PowerupC.nc
@@ -0,0 +1,59 @@
+// $Id: PowerupC.nc,v 1.6 2010-06-29 22:07:17 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+  * This module turns on Led0 when the system boots.
+  *
+  * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+  */
+module PowerupC @safe()
+{
+  uses interface Boot;
+  uses interface Leds;
+}
+implementation
+{
+  event void Boot.booted()  {
+    call Leds.led0On();
+  }
+}
+
diff --git a/apps/Powerup/README.txt b/apps/Powerup/README.txt
new file mode 100644
index 00000000..eb6ab7a4
--- /dev/null
+++ b/apps/Powerup/README.txt
@@ -0,0 +1,20 @@
+$Id: README.txt,v 1.4 2006-12-12 18:22:48 vlahan Exp $
+
+README for Powerup
+Author/Contact: tinyos-help@millennium.berkeley.edu
+@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+Description:
+
+Powerup turns on the red LED on powerup.  It is useful to test that the
+build environment is functional and that an application correctly installs
+on a piece of hardware.
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
+
diff --git a/apps/RadioCountToLeds/.cvsignore b/apps/RadioCountToLeds/.cvsignore
new file mode 100644
index 00000000..b9e9f3e2
--- /dev/null
+++ b/apps/RadioCountToLeds/.cvsignore
@@ -0,0 +1,4 @@
+RadioCountMsg.py
+RadioCountMsg.java
+RadioCountMsg.class
+build
diff --git a/apps/RadioCountToLeds/Makefile b/apps/RadioCountToLeds/Makefile
new file mode 100644
index 00000000..5cab01d6
--- /dev/null
+++ b/apps/RadioCountToLeds/Makefile
@@ -0,0 +1,16 @@
+COMPONENT=RadioCountToLedsAppC
+BUILD_EXTRA_DEPS = RadioCountMsg.py RadioCountMsg.class
+CLEAN_EXTRA = RadioCountMsg.py RadioCountMsg.class RadioCountMsg.java
+
+RadioCountMsg.py: RadioCountToLeds.h
+	mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=RadioCountMsg RadioCountToLeds.h radio_count_msg -o $@
+
+RadioCountMsg.class: RadioCountMsg.java
+	javac RadioCountMsg.java
+
+RadioCountMsg.java: RadioCountToLeds.h
+	mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=RadioCountMsg RadioCountToLeds.h radio_count_msg -o $@
+
+
+include $(MAKERULES)
+
diff --git a/apps/RadioCountToLeds/README.txt b/apps/RadioCountToLeds/README.txt
new file mode 100644
index 00000000..854101e4
--- /dev/null
+++ b/apps/RadioCountToLeds/README.txt
@@ -0,0 +1,24 @@
+README for RadioCountToLeds
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+RadioCountToLeds maintains a 4Hz counter, broadcasting its value in 
+an AM packet every time it gets updated. A RadioCountToLeds node that 
+hears a counter displays the bottom three bits on its LEDs. This 
+application is a useful test to show that basic AM communication and 
+timers work.
+
+Tools:
+
+After compiling, RadioCountMsg.java and RadioCountMsg.py files will be
+created.  RadioCountMsg.java is a Java class representing the message that
+this application sends.  RadioCountMsg.py is a Python class representing
+the message that this application sends.
+
+Known bugs/limitations:
+
+None.
+
+
+$Id: README.txt,v 1.5 2007-07-10 20:01:58 klueska Exp $
diff --git a/apps/RadioCountToLeds/RadioCountToLeds.h b/apps/RadioCountToLeds/RadioCountToLeds.h
new file mode 100644
index 00000000..68411dba
--- /dev/null
+++ b/apps/RadioCountToLeds/RadioCountToLeds.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef RADIO_COUNT_TO_LEDS_H
+#define RADIO_COUNT_TO_LEDS_H
+
+typedef nx_struct radio_count_msg {
+  nx_uint16_t counter;
+} radio_count_msg_t;
+
+enum {
+  AM_RADIO_COUNT_MSG = 6,
+};
+
+#endif
diff --git a/apps/RadioCountToLeds/RadioCountToLedsAppC.nc b/apps/RadioCountToLeds/RadioCountToLedsAppC.nc
new file mode 100644
index 00000000..77f27d1c
--- /dev/null
+++ b/apps/RadioCountToLeds/RadioCountToLedsAppC.nc
@@ -0,0 +1,74 @@
+// $Id: RadioCountToLedsAppC.nc,v 1.5 2010-06-29 22:07:17 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "RadioCountToLeds.h"
+
+/**
+ * Configuration for the RadioCountToLeds application. RadioCountToLeds 
+ * maintains a 4Hz counter, broadcasting its value in an AM packet 
+ * every time it gets updated. A RadioCountToLeds node that hears a counter 
+ * displays the bottom three bits on its LEDs. This application is a useful 
+ * test to show that basic AM communication and timers work.
+ *
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+configuration RadioCountToLedsAppC {}
+implementation {
+  components MainC, RadioCountToLedsC as App, LedsC;
+  components new AMSenderC(AM_RADIO_COUNT_MSG);
+  components new AMReceiverC(AM_RADIO_COUNT_MSG);
+  components new TimerMilliC();
+  components ActiveMessageC;
+  
+  App.Boot -> MainC.Boot;
+  
+  App.Receive -> AMReceiverC;
+  App.AMSend -> AMSenderC;
+  App.AMControl -> ActiveMessageC;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  App.Packet -> AMSenderC;
+}
+
+
diff --git a/apps/RadioCountToLeds/RadioCountToLedsC.nc b/apps/RadioCountToLeds/RadioCountToLedsC.nc
new file mode 100644
index 00000000..2aed2ea0
--- /dev/null
+++ b/apps/RadioCountToLeds/RadioCountToLedsC.nc
@@ -0,0 +1,150 @@
+// $Id: RadioCountToLedsC.nc,v 1.7 2010-06-29 22:07:17 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "Timer.h"
+#include "RadioCountToLeds.h"
+ 
+/**
+ * Implementation of the RadioCountToLeds application. RadioCountToLeds 
+ * maintains a 4Hz counter, broadcasting its value in an AM packet 
+ * every time it gets updated. A RadioCountToLeds node that hears a counter 
+ * displays the bottom three bits on its LEDs. This application is a useful 
+ * test to show that basic AM communication and timers work.
+ *
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+module RadioCountToLedsC @safe() {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface SplitControl as AMControl;
+    interface Packet;
+  }
+}
+implementation {
+
+  message_t packet;
+
+  bool locked;
+  uint16_t counter = 0;
+  
+  event void Boot.booted() {
+    call AMControl.start();
+  }
+
+  event void AMControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+      call MilliTimer.startPeriodic(250);
+    }
+    else {
+      call AMControl.start();
+    }
+  }
+
+  event void AMControl.stopDone(error_t err) {
+    // do nothing
+  }
+  
+  event void MilliTimer.fired() {
+    counter++;
+    dbg("RadioCountToLedsC", "RadioCountToLedsC: timer fired, counter is %hu.\n", counter);
+    if (locked) {
+      return;
+    }
+    else {
+      radio_count_msg_t* rcm = (radio_count_msg_t*)call Packet.getPayload(&packet, sizeof(radio_count_msg_t));
+      if (rcm == NULL) {
+	return;
+      }
+
+      rcm->counter = counter;
+      if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(radio_count_msg_t)) == SUCCESS) {
+	dbg("RadioCountToLedsC", "RadioCountToLedsC: packet sent.\n", counter);	
+	locked = TRUE;
+      }
+    }
+  }
+
+  event message_t* Receive.receive(message_t* bufPtr, 
+				   void* payload, uint8_t len) {
+    dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len);
+    if (len != sizeof(radio_count_msg_t)) {return bufPtr;}
+    else {
+      radio_count_msg_t* rcm = (radio_count_msg_t*)payload;
+      if (rcm->counter & 0x1) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if (rcm->counter & 0x2) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if (rcm->counter & 0x4) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led2Off();
+      }
+      return bufPtr;
+    }
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr) {
+      locked = FALSE;
+    }
+  }
+
+}
+
+
+
+
diff --git a/apps/RadioSenseToLeds/.cvsignore b/apps/RadioSenseToLeds/.cvsignore
new file mode 100644
index 00000000..f67e9445
--- /dev/null
+++ b/apps/RadioSenseToLeds/.cvsignore
@@ -0,0 +1,4 @@
+RadioSenseMsg.java
+RadioSenseMsg.py
+build
+RadioSenseMsg.class
diff --git a/apps/RadioSenseToLeds/Makefile b/apps/RadioSenseToLeds/Makefile
new file mode 100644
index 00000000..1efb97b7
--- /dev/null
+++ b/apps/RadioSenseToLeds/Makefile
@@ -0,0 +1,15 @@
+COMPONENT=RadioSenseToLedsAppC
+BUILD_EXTRA_DEPS = RadioSenseMsg.py RadioSenseMsg.class
+
+RadioSenseMsg.py: RadioSenseToLeds.h
+	mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=RadioSenseMsg RadioSenseToLeds.h radio_sense_msg -o $@
+
+RadioSenseMsg.class: RadioSenseMsg.java
+	javac RadioSenseMsg.java
+
+RadioSenseMsg.java: RadioSenseToLeds.h
+	mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=RadioSenseMsg RadioSenseToLeds.h radio_sense_msg -o $@
+
+
+include $(MAKERULES)
+
diff --git a/apps/RadioSenseToLeds/README.txt b/apps/RadioSenseToLeds/README.txt
new file mode 100644
index 00000000..94bcb7bc
--- /dev/null
+++ b/apps/RadioSenseToLeds/README.txt
@@ -0,0 +1,24 @@
+README for RadioSenseToLeds
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+RadioSenseToLeds samples a platform's default sensor at 4Hz and broadcasts
+this value in an AM packet. A RadioSenseToLeds node that hears a broadcast 
+displays the bottom three bits of the value it has received. This application 
+is a useful test to show that basic AM communication, timers, and the default 
+sensor work.
+
+Tools:
+
+After compiling, RadioSenseMsg.java and RadioSenseMsg.py files will be
+created.  RadioSenseMsg.java is a Java class representing the message that
+this application sends.  RadioSenseMsg.py is a Python class representing
+the message that this application sends.
+
+Known bugs/limitations:
+
+None.
+
+
+$Id: README.txt,v 1.5 2007-07-10 20:03:30 klueska Exp $
diff --git a/apps/RadioSenseToLeds/RadioSenseToLeds.h b/apps/RadioSenseToLeds/RadioSenseToLeds.h
new file mode 100644
index 00000000..560cc51b
--- /dev/null
+++ b/apps/RadioSenseToLeds/RadioSenseToLeds.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef RADIO_SENSE_TO_LEDS_H
+#define RADIO_SENSE_TO_LEDS_H
+
+typedef nx_struct radio_sense_msg {
+  nx_uint16_t error;
+  nx_uint16_t data;
+} radio_sense_msg_t;
+
+enum {
+  AM_RADIO_SENSE_MSG = 7,
+};
+
+#endif
diff --git a/apps/RadioSenseToLeds/RadioSenseToLedsAppC.nc b/apps/RadioSenseToLeds/RadioSenseToLedsAppC.nc
new file mode 100644
index 00000000..7439f8a3
--- /dev/null
+++ b/apps/RadioSenseToLeds/RadioSenseToLedsAppC.nc
@@ -0,0 +1,73 @@
+// $Id: RadioSenseToLedsAppC.nc,v 1.5 2010-06-29 22:07:17 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "RadioSenseToLeds.h"
+
+/**
+ * Configuration for the RadioSenseToLeds application.  RadioSenseToLeds samples 
+ * a platform's default sensor at 4Hz and broadcasts this value in an AM packet. 
+ * A RadioSenseToLeds node that hears a broadcast displays the bottom three bits 
+ * of the value it has received. This application is a useful test to show that 
+ * basic AM communication, timers, and the default sensor work.
+ * 
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+configuration RadioSenseToLedsAppC {}
+implementation {
+  components MainC, RadioSenseToLedsC as App, LedsC, new DemoSensorC();
+  components ActiveMessageC;
+  components new AMSenderC(AM_RADIO_SENSE_MSG);
+  components new AMReceiverC(AM_RADIO_SENSE_MSG);
+  components new TimerMilliC();
+  
+  App.Boot -> MainC.Boot;
+  
+  App.Receive -> AMReceiverC;
+  App.AMSend -> AMSenderC;
+  App.RadioControl -> ActiveMessageC;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  App.Packet -> AMSenderC;
+  App.Read -> DemoSensorC;
+}
diff --git a/apps/RadioSenseToLeds/RadioSenseToLedsC.nc b/apps/RadioSenseToLeds/RadioSenseToLedsC.nc
new file mode 100644
index 00000000..f4254b51
--- /dev/null
+++ b/apps/RadioSenseToLeds/RadioSenseToLedsC.nc
@@ -0,0 +1,137 @@
+// $Id: RadioSenseToLedsC.nc,v 1.7 2010-06-29 22:07:17 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "Timer.h"
+#include "RadioSenseToLeds.h"
+
+/**
+ * Implementation of the RadioSenseToLeds application.  RadioSenseToLeds samples 
+ * a platform's default sensor at 4Hz and broadcasts this value in an AM packet. 
+ * A RadioSenseToLeds node that hears a broadcast displays the bottom three bits 
+ * of the value it has received. This application is a useful test to show that 
+ * basic AM communication, timers, and the default sensor work.
+ * 
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+module RadioSenseToLedsC @safe(){
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface Packet;
+    interface Read<uint16_t>;
+    interface SplitControl as RadioControl;
+  }
+}
+implementation {
+
+  message_t packet;
+  bool locked = FALSE;
+   
+  event void Boot.booted() {
+    call RadioControl.start();
+  }
+
+  event void RadioControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+      call MilliTimer.startPeriodic(250);
+    }
+  }
+  event void RadioControl.stopDone(error_t err) {}
+  
+  event void MilliTimer.fired() {
+    call Read.read();
+  }
+
+  event void Read.readDone(error_t result, uint16_t data) {
+    if (locked) {
+      return;
+    }
+    else {
+      radio_sense_msg_t* rsm;
+
+      rsm = (radio_sense_msg_t*)call Packet.getPayload(&packet, sizeof(radio_sense_msg_t));
+      if (rsm == NULL) {
+	return;
+      }
+      rsm->error = result;
+      rsm->data = data;
+      if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(radio_sense_msg_t)) == SUCCESS) {
+	locked = TRUE;
+      }
+    }
+  }
+
+  event message_t* Receive.receive(message_t* bufPtr, 
+				   void* payload, uint8_t len) {
+    call Leds.led1Toggle();
+    if (len != sizeof(radio_sense_msg_t)) {return bufPtr;}
+    else {
+      radio_sense_msg_t* rsm = (radio_sense_msg_t*)payload;
+      uint16_t val = rsm->data;
+      if (val & 0x0004)
+        call Leds.led2On();
+      else
+        call Leds.led2Off();
+      if (val & 0x0002)
+        call Leds.led1On();
+      else
+        call Leds.led1Off();
+      if (val & 0x0001)
+        call Leds.led0On();
+      else
+        call Leds.led0Off();
+      return bufPtr;
+    }
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr) {
+      locked = FALSE;
+    }
+  }
+
+}
diff --git a/apps/Sense/Makefile b/apps/Sense/Makefile
new file mode 100644
index 00000000..0b746763
--- /dev/null
+++ b/apps/Sense/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=SenseAppC
+
+include $(MAKERULES)
diff --git a/apps/Sense/README.txt b/apps/Sense/README.txt
new file mode 100644
index 00000000..f68e5b94
--- /dev/null
+++ b/apps/Sense/README.txt
@@ -0,0 +1,20 @@
+README for Sense 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+Sense is a simple sensing demo application. It periodically samples the
+default sensor and displays the bottom bits of the readings on the leds of the
+node. Have a look at tinyos-2.x/doc/html/tutorial/lesson5.html for a general
+tutorial on sensing in TinyOS.
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
+
+
+$Id: README.txt,v 1.4 2006-12-12 18:22:49 vlahan Exp $
diff --git a/apps/Sense/SenseAppC.nc b/apps/Sense/SenseAppC.nc
new file mode 100644
index 00000000..9210ee42
--- /dev/null
+++ b/apps/Sense/SenseAppC.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:22:49 $
+ * @author: Jan Hauer
+ * ========================================================================
+ */
+
+/**
+ * 
+ * Sensing demo application. See README.txt file in this directory for usage
+ * instructions and have a look at tinyos-2.x/doc/html/tutorial/lesson5.html
+ * for a general tutorial on sensing in TinyOS.
+ * 
+ * @author Jan Hauer
+ */
+
+configuration SenseAppC 
+{ 
+} 
+implementation { 
+  
+  components SenseC, MainC, LedsC, new TimerMilliC(), new DemoSensorC() as Sensor;
+
+  SenseC.Boot -> MainC;
+  SenseC.Leds -> LedsC;
+  SenseC.Timer -> TimerMilliC;
+  SenseC.Read -> Sensor;
+}
diff --git a/apps/Sense/SenseC.nc b/apps/Sense/SenseC.nc
new file mode 100644
index 00000000..ffdf254f
--- /dev/null
+++ b/apps/Sense/SenseC.nc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:22:49 $
+ * @author: Jan Hauer
+ * ========================================================================
+ */
+
+/**
+ * 
+ * Sensing demo application. See README.txt file in this directory for usage
+ * instructions and have a look at tinyos-2.x/doc/html/tutorial/lesson5.html
+ * for a general tutorial on sensing in TinyOS.
+ *
+ * @author Jan Hauer
+ */
+
+#include "Timer.h"
+
+module SenseC
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface Timer<TMilli>;
+    interface Read<uint16_t>;
+  }
+}
+implementation
+{
+  // sampling frequency in binary milliseconds
+  #define SAMPLING_FREQUENCY 100
+  
+  event void Boot.booted() {
+    call Timer.startPeriodic(SAMPLING_FREQUENCY);
+  }
+
+  event void Timer.fired() 
+  {
+    call Read.read();
+  }
+
+  event void Read.readDone(error_t result, uint16_t data) 
+  {
+    if (result == SUCCESS){
+      if (data & 0x0004)
+        call Leds.led2On();
+      else
+        call Leds.led2Off();
+      if (data & 0x0002)
+        call Leds.led1On();
+      else
+        call Leds.led1Off();
+      if (data & 0x0001)
+        call Leds.led0On();
+      else
+        call Leds.led0Off();
+    }
+  }
+}
diff --git a/apps/TCPEcho/HttpdP.nc b/apps/TCPEcho/HttpdP.nc
new file mode 100644
index 00000000..26b1046a
--- /dev/null
+++ b/apps/TCPEcho/HttpdP.nc
@@ -0,0 +1,152 @@
+
+module HttpdP {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Tcp;
+  }
+} implementation {
+
+  static char *http_okay = "HTTP/1.0 200 OK\r\n\r\n";
+  static int http_okay_len = 19;
+
+  enum {
+    S_IDLE,
+    S_CONNECTED,
+    S_REQUEST_PRE,
+    S_REQUEST,
+    S_HEADER,
+    S_BODY,
+  };
+
+  enum {
+    HTTP_GET,
+    HTTP_POST,
+  };
+
+  void process_request(int verb, char *request, int len) {
+    char reply[24];
+    memcpy(reply, "led0: 0 led1: 0 led2: 0\n", 24);
+
+    printfUART("request: '%s'\n", request);
+
+    if (len >= 10 &&
+        request[0] == '/' &&
+        request[1] == 'r' &&
+        request[2] == 'e' &&
+        request[3] == 'a' &&
+        request[4] == 'd' &&
+        request[5] == '/') {
+      if (request[6] == 'l' &&
+          request[7] == 'e' &&
+          request[8] == 'd' &&
+          request[9] == 's') {
+        uint8_t bitmap = call Leds.get();
+        call Tcp.send(http_okay, http_okay_len);
+        if (bitmap & 1) reply[6] = '1';
+        if (bitmap & 2) reply[14] = '1';
+        if (bitmap & 4) reply[22] = '1';
+        call Tcp.send(reply, 24);
+      }
+    }
+    call Tcp.close();
+  }
+
+  int http_state;
+  int req_verb;
+  char request_buf[150], *request;
+  char tcp_buf[100];
+
+  event void Boot.booted() {
+    http_state = S_IDLE;
+    call Tcp.bind(80);
+  }
+
+  event bool Tcp.accept(struct sockaddr_in6 *from, 
+                            void **tx_buf, int *tx_buf_len) {
+    if (http_state == S_IDLE) {
+      http_state = S_CONNECTED;
+      *tx_buf = tcp_buf;
+      *tx_buf_len = 100;
+      return TRUE;
+    }
+    printfUART("rejecting connection\n");
+    return FALSE;
+  }
+  event void Tcp.connectDone(error_t e) {
+    
+  }
+  event void Tcp.recv(void *payload, uint16_t len) {
+    static int crlf_pos;
+    char *msg = payload;
+    switch (http_state) {
+    case S_CONNECTED:
+      crlf_pos = 0;
+      request = request_buf;
+      if (len < 3) {
+        call Tcp.close();
+        return;
+      }
+      if (msg[0] == 'G') {
+        req_verb = HTTP_GET;
+        msg += 3;
+        len -= 3;
+      }
+      http_state = S_REQUEST_PRE;
+    case S_REQUEST_PRE:
+      while (len > 0 && *msg == ' ') {
+        len--; msg++;
+      }
+      if (len == 0) break;
+      http_state = S_REQUEST;
+    case S_REQUEST:
+      while (len > 0 && *msg != ' ') {
+        *request++ = *msg++;
+        len--;
+      }
+      if (len == 0) break;
+      *request++ = '\0';
+      http_state = S_HEADER;
+    case S_HEADER:
+      while (len > 0) {
+        switch (crlf_pos) {
+        case 0:
+        case 2:
+          if (*msg == '\r') crlf_pos ++;
+          else if (*msg == '\n') crlf_pos += 2;
+          else crlf_pos = 0;
+          break;
+        case 1:
+        case 3:
+          if (*msg == '\n') crlf_pos ++;
+          else crlf_pos = 0;
+          break;
+        }
+        len--; msg++;
+        // if crlf == 2, we just finished a header line.  you know.  fyi.
+        if (crlf_pos == 4) {
+          http_state = S_BODY;
+          process_request(req_verb, request_buf, request - request_buf - 1);
+          break;
+        } 
+      }
+    if (crlf_pos < 4) break;
+
+    case S_BODY:
+      // len might be zero here... just a note.
+    default:
+      call Tcp.close();
+    }
+  }
+
+  event void Tcp.closed(error_t e) {
+    call Leds.led2Toggle();
+
+    call Tcp.bind(80);
+    http_state = S_IDLE;
+  }
+
+  event void Tcp.acked() {
+
+  }
+}
diff --git a/apps/TCPEcho/Makefile b/apps/TCPEcho/Makefile
new file mode 100644
index 00000000..8d60e1ca
--- /dev/null
+++ b/apps/TCPEcho/Makefile
@@ -0,0 +1,26 @@
+COMPONENT=TCPEchoC
+
+# uncomment this for network programming support
+# BOOTLOADER=tosboot
+
+# radio opts
+CFLAGS += -DCC2420_DEF_CHANNEL=15
+# CFLAGS += -DCC2420_DEF_RFPOWER=4
+
+
+# CFLAGS += -DNO_LIB6LOWPAN_ASCII
+
+# if this is set, motes will send debugging information to the address
+# listed.
+# CFLAGS += -DREPORT_DEST=\"2001:470:1f04:56d::64\"
+
+# sim/test harness
+# CFLAGS += -I../IPBaseStation
+# CFLAGS += -DDBG_TRACK_FLOWS -DDBG_FLOWS_REPORT
+
+# printf debugs.  works only on telosb/tmote sky
+# CFLAGS += -DPRINTFUART_ENABLED
+PFLAGS += -DIN6_PREFIX=\"fec0:1::\"
+
+include $(MAKERULES)
+
diff --git a/apps/TCPEcho/README b/apps/TCPEcho/README
new file mode 100644
index 00000000..4d6e1d68
--- /dev/null
+++ b/apps/TCPEcho/README
@@ -0,0 +1,15 @@
+
+A simple application which verifies the 6loWPAN stack is functioning
+correctly.  A mote running this will respond to ICMP Echo requests
+(0x80), and provide a UDP echo service on port 7 (a la rfc862).
+
+It also provides a TCP echo service on port 7, and a simple HTTP
+server on port 80.  The only resource supported is '/read/leds'.  This
+functionality can be used to verify that the TCP stack is functional.
+
+To build, use the 'blip' make target extra.  IE, 
+
+$ make <platform> blip ...
+
+For more information on setting up an IPv6 network, please see the tutorial:
+http://docs.tinyos.net/index.php/BLIP_Tutorial
diff --git a/apps/TCPEcho/TCPEchoC.nc b/apps/TCPEcho/TCPEchoC.nc
new file mode 100644
index 00000000..d4b90b8e
--- /dev/null
+++ b/apps/TCPEcho/TCPEchoC.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <6lowpan.h>
+
+configuration TCPEchoC {
+
+} implementation {
+  components MainC, LedsC;
+  components TCPEchoP;
+
+  TCPEchoP.Boot -> MainC;
+  TCPEchoP.Leds -> LedsC;
+
+  components new TimerMilliC();
+  components IPStackC, IPDispatchC;
+
+  TCPEchoP.RadioControl -> IPStackC;
+  components new UdpSocketC() as Echo,
+    new UdpSocketC() as Status;
+  TCPEchoP.Echo -> Echo;
+
+  components new TcpSocketC() as TcpEcho;
+  TCPEchoP.TcpEcho -> TcpEcho;
+
+  components new TcpSocketC() as TcpWeb, HttpdP;
+  HttpdP.Boot -> MainC;
+  HttpdP.Leds -> LedsC;
+  HttpdP.Tcp -> TcpWeb;
+
+  TCPEchoP.Status -> Status;
+
+  TCPEchoP.StatusTimer -> TimerMilliC;
+
+  components UdpC;
+
+  TCPEchoP.IPStats -> IPDispatchC;
+
+  components RandomC;
+  TCPEchoP.Random -> RandomC;
+
+  components UDPShellC;
+}
diff --git a/apps/TCPEcho/TCPEchoP.nc b/apps/TCPEcho/TCPEchoP.nc
new file mode 100644
index 00000000..62cebfea
--- /dev/null
+++ b/apps/TCPEcho/TCPEchoP.nc
@@ -0,0 +1,162 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <IPDispatch.h>
+#include <lib6lowpan.h>
+#include <ip.h>
+#include <lib6lowpan.h>
+#include <ip.h>
+
+#include "UDPReport.h"
+#include "PrintfUART.h"
+
+#define REPORT_PERIOD 75L
+
+module TCPEchoP {
+  uses {
+    interface Boot;
+    interface SplitControl as RadioControl;
+
+    interface UDP as Echo;
+    interface UDP as Status;
+    interface Tcp as TcpEcho;
+
+    interface Leds;
+    
+    interface Timer<TMilli> as StatusTimer;
+   
+    interface BlipStatistics<ip_statistics_t> as IPStats;
+
+    interface Random;
+
+  }
+
+} implementation {
+
+  bool timerStarted;
+  nx_struct udp_report stats;
+  struct sockaddr_in6 route_dest;
+
+#ifndef SIM
+#define CHECK_NODE_ID
+#else
+#define CHECK_NODE_ID if (TOS_NODE_ID == BASESTATION_ID) return
+#endif
+
+  event void Boot.booted() {
+    CHECK_NODE_ID;
+    call RadioControl.start();
+    timerStarted = FALSE;
+
+    call IPStats.clear();
+    printfUART_init();
+
+
+#ifdef REPORT_DEST
+    route_dest.sin6_port = hton16(7000);
+    inet_pton6(REPORT_DEST, &route_dest.sin6_addr);
+    call StatusTimer.startOneShot(call Random.rand16() % (1024 * REPORT_PERIOD));
+#endif
+
+    dbg("Boot", "booted: %i\n", TOS_NODE_ID);
+    call Echo.bind(7);
+    call TcpEcho.bind(7);
+    call Status.bind(7001);
+  }
+
+  event void RadioControl.startDone(error_t e) {
+
+  }
+
+  event void RadioControl.stopDone(error_t e) {
+
+  }
+
+  event void Status.recvfrom(struct sockaddr_in6 *from, void *data, 
+                             uint16_t len, struct ip6_metadata *meta) {
+
+  }
+
+  event void Echo.recvfrom(struct sockaddr_in6 *from, void *data, 
+                           uint16_t len, struct ip6_metadata *meta) {
+    CHECK_NODE_ID;
+    call Echo.sendto(from, data, len);
+  }
+
+  enum {
+    STATUS_SIZE = sizeof(ip_statistics_t),
+  };
+
+
+  event void StatusTimer.fired() {
+
+    if (!timerStarted) {
+      call StatusTimer.startPeriodic(1024 * REPORT_PERIOD);
+      timerStarted = TRUE;
+    }
+
+    stats.seqno++;
+    stats.sender = TOS_NODE_ID;
+
+    call IPStats.get(&stats.ip);
+
+    call Status.sendto(&route_dest, &stats, sizeof(stats));
+  }
+
+  /* 
+   * Example code for setting up a TCP echo socket.
+   */
+
+  bool sock_connected = FALSE;
+  char tcp_buf[150];
+
+  event bool TcpEcho.accept(struct sockaddr_in6 *from,
+                            void **tx_buf, int *tx_buf_len) {
+    *tx_buf = tcp_buf;
+    *tx_buf_len = 150;
+    return TRUE;
+  }
+  event void TcpEcho.connectDone(error_t e) {
+    
+  }
+  event void TcpEcho.recv(void *payload, uint16_t len) {
+    if (call TcpEcho.send(payload,len) != SUCCESS)
+      call Leds.led2Toggle();
+  }
+  event void TcpEcho.closed(error_t e) {
+    call Leds.led0Toggle();
+    call TcpEcho.bind(7);
+  }
+  event void TcpEcho.acked() {}
+
+}
diff --git a/apps/TCPEcho/UDPReport.h b/apps/TCPEcho/UDPReport.h
new file mode 100644
index 00000000..7b3ad987
--- /dev/null
+++ b/apps/TCPEcho/UDPReport.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef _UDPREPORT_H
+#define _UDPREPORT_H
+
+#include <Statistics.h>
+
+nx_struct udp_report {
+  nx_uint16_t seqno;
+  nx_uint16_t sender;
+  ip_statistics_t    ip;
+  udp_statistics_t   udp;
+  icmp_statistics_t  icmp;
+  route_statistics_t route;
+} ;
+
+#endif
diff --git a/apps/UDPEcho/Makefile b/apps/UDPEcho/Makefile
new file mode 100644
index 00000000..30f39c86
--- /dev/null
+++ b/apps/UDPEcho/Makefile
@@ -0,0 +1,35 @@
+COMPONENT=UDPEchoC
+# uncomment this for network programming support
+# BOOTLOADER=tosboot
+
+# CFLAGS += -DCC2420_DEF_CHANNEL=26
+# CFLAGS += -DRF230_DEF_CHANNEL=26
+# CFLAGS += -DCC2420_DEF_RFPOWER=4 -DENABLE_SPI0_DMA
+PFLAGS += -DENABLE_SPI0_DMA
+
+# disables support for the AM stack, which somewhat reduces code size
+# and compresses packet formats.  If you want to use other tinyos
+# protocols which are AM-based, you should not include this.
+# CFLAGS += -DIEEE154FRAMES_ENABLED
+
+# lib6lowpan contains inet_ntop6 and inet_pton6 to process ascii
+# representations of IPv6 addresses.  You can remove them to save some
+# code if you don't use them
+# CFLAGS += -DNO_LIB6LOWPAN_ASCII
+
+# you can compile with or without a routing protocol... of course,
+# without it, you will only be able to use link-local communication
+PFLAGS += -DRPL_ROUTING -DRPL_STORING_MODE -I$(LOWPAN_ROOT)/tos/lib/net/rpl
+PFLAGS += -DBLIP_L2_RETRIES # -DLIB6LOWPAN_HC_VERSION=-1
+
+# if this is set, motes will send debugging information to the address
+# listed.
+# CFLAGS += -DREPORT_DEST=\"2001:470:1f04:56d::64\"
+# CFLAGS += -DREPORT_DEST=\"fe80::22:ff:fe00:1\"
+# CFLAGS += -DREPORT_DEST=\"fec0::1\"
+
+# printf debugs.  works only on telosb/tmote sky
+# PFLAGS += -DPRINTFUART_ENABLED
+# PFLAGS += -DIN6_PREFIX=\"fec0::\"                                                                                                                       
+include $(MAKERULES)
+
diff --git a/apps/UDPEcho/Makefile.local b/apps/UDPEcho/Makefile.local
new file mode 100644
index 00000000..a911f108
--- /dev/null
+++ b/apps/UDPEcho/Makefile.local
@@ -0,0 +1,32 @@
+# -*- makefile -*-
+
+SOURCES=$(LOWPAN_ROOT)/support/sdk/c/lib6lowpan/lib6lowpan.c  \
+	$(LOWPAN_ROOT)/support/sdk/c/lib6lowpan/lib6lowpanIP.c \
+	$(LOWPAN_ROOT)/support/sdk/c/lib6lowpan/lib6lowpanFrag.c \
+	$(LOWPAN_ROOT)/support/sdk/c/lib6lowpan/in_cksum.c \
+	$(LOWPAN_ROOT)/support/sdk/c/lib6lowpan/ip_malloc.c \
+	$(LOWPAN_ROOT)/tos/lib/net/b6lowpan/table.c
+OBJS=$(SOURCES:%.c=%.o)
+
+remake: $(OBJS)
+	make micaz sim-sf lowpan
+	g++ -shared -fPIC  simbuild/micaz/pytossim.o simbuild/micaz/sim.o simbuild/micaz/tossim.o simbuild/micaz/c-support.o simbuild/micaz/c-sf.o simbuild/micaz/sf.o simbuild/micaz/throttle.o $(OBJS) -lstdc++  -lm -o _TOSSIMmodule.so
+	make -f Makefile.local cppdriver
+
+cppdriver:
+	g++ -g -c -o sim/Driver.o sim/Driver.c -I$(TOSROOT)/tos/lib/tossim/
+	g++ -o sim/Driver sim/Driver.o simbuild/micaz/tossim.o simbuild/micaz/sim.o simbuild/micaz/c-support.o simbuild/micaz/c-sf.o simbuild/micaz/sf.o simbuild/micaz/throttle.o $(OBJS)
+# simbuild/micaz/c-sf.o       simbuild/micaz/pytossim.o  simbuild/micaz/sim.o       simbuild/micaz/tossim.o
+# simbuild/micaz/c-support.o  simbuild/micaz/sf.o        simbuild/micaz/throttle.o
+
+
+
+clean:
+	rm $(OBJS)
+
+%.o: %.c
+	$(CC) -c -fPIC -o $@ $<
+
+msg:	
+	mig -DMIG -I$(LOWPAN_ROOT)/tos/lib/net/blip -I$(TOSROOT)/tos/chips/cc2420 -I$(LOWPAN_ROOT)/support/sdk/c/blip/include  python -python-classname=UdpReport UDPReport.h udp_report -o util/UdpReport.py
+	mig -DMIG -I$(LOWPAN_ROOT)/tos/lib/net/blip -I$(TOSROOT)/tos/chips/cc2420 -I$(LOWPAN_ROOT)/support/sdk/c/blip/include  python -python-classname=TestDriverMsg TestDriver.h testdriver_msg -o util/TestDriverMsg.py
diff --git a/apps/UDPEcho/NodeConnectivity/NodeConnectivity.nc b/apps/UDPEcho/NodeConnectivity/NodeConnectivity.nc
new file mode 100644
index 00000000..9833a8f8
--- /dev/null
+++ b/apps/UDPEcho/NodeConnectivity/NodeConnectivity.nc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+// For conversion of topology from .nss to motelab
+// See NodeConnectivityM.nc 
+
+interface NodeConnectivity {
+  command int8_t mapping(uint16_t moteid);
+  command bool connected(uint16_t srcnode, uint16_t dstnode);
+}
diff --git a/apps/UDPEcho/NodeConnectivity/TestbedConnectivityM.nc b/apps/UDPEcho/NodeConnectivity/TestbedConnectivityM.nc
new file mode 100644
index 00000000..62e3e367
--- /dev/null
+++ b/apps/UDPEcho/NodeConnectivity/TestbedConnectivityM.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+// Filename: NodeConnectivityM.nc
+// Generated on Wed Jun 11 19:54:54 UTC 2008
+
+// Created by createMotelabTopology.pl
+
+module TestbedConnectivityM {
+  provides {
+    interface NodeConnectivity;
+  }
+} implementation {
+  uint8_t connectivity[8][8] =
+  {
+    { 1, 1, 0, 0, 0, 0, 0, 0 },
+    { 1, 1, 1, 0, 0, 0, 0, 0 },
+    { 0, 1, 1, 1, 0, 0, 0, 0 },
+    { 0, 0, 1, 1, 1, 0, 0, 0 },
+    { 0, 0, 0, 1, 1, 1, 0, 0 },
+    { 0, 0, 0, 0, 1, 1, 1, 0 },
+    { 0, 0, 0, 0, 0, 1, 1, 1 },
+    { 0, 0, 0, 0, 0, 0, 1, 1 }
+  };
+  uint16_t mapping[8] = { 100, 101, 102, 37, 35, 33, 32, 106 };
+  
+  command int8_t NodeConnectivity.mapping(uint16_t moteid) {
+    uint8_t i;
+    for (i = 0; i < 8; i++) {
+      if (mapping[i] == moteid) {
+        return i;
+      }
+    }
+    return -1;
+  }
+
+  command bool NodeConnectivity.connected(uint16_t srcnode, uint16_t dstnode) {
+    int8_t src = call NodeConnectivity.mapping(srcnode);
+    int8_t dst = call NodeConnectivity.mapping(dstnode);
+
+    if ((src == -1) ||
+        (dst == -1)) {
+      return FALSE;
+    }
+
+    if (connectivity[src][dst] == 1) {
+      return TRUE;
+    } else {
+      return FALSE;
+    }
+  }
+}
diff --git a/apps/UDPEcho/NodeConnectivity/createNodeConnectivityM.pl b/apps/UDPEcho/NodeConnectivity/createNodeConnectivityM.pl
new file mode 100644
index 00000000..fdf9e16e
--- /dev/null
+++ b/apps/UDPEcho/NodeConnectivity/createNodeConnectivityM.pl
@@ -0,0 +1,167 @@
+#!/usr/bin/perl
+
+# FileName:    createMotelabTopology.pl 
+# Date:        December 31, 2004
+#
+# Description: Converts a TOSSIM .nss (topology) file into Motelab format
+# Usage:  ./createMotelabTopology.pl  .nssfile     
+
+# Input:  A TOSSIM .nss topology file
+# Output: A nesc file containing a 2D array that represents 
+#         the latency for each node and a func that returns true or false
+#         as to whether that node can communicate with other nodes
+
+
+use strict;
+
+######################
+#                    #
+#  Parse Parameters  #
+#                    #
+######################
+
+if ( 2 > @ARGV ) {
+    die "Usage: ./createMotelabTopology <mapfile(see exampleMap.txt as a sample)>  <.nss file> ";
+}
+
+#######################
+#                     #
+#  Open file handles  #
+#                     #
+#######################
+
+open(INPUT_MAP,  "$ARGV[0]")
+    or die "Unable to open input file $ARGV[0] ($!)";
+
+open(INPUT_NSS,  "$ARGV[1]")
+    or die "Unable to open input file $ARGV[1] ($!)";
+
+#########################
+#                       #
+#  Parse and store file #
+#  outputs              #
+#                       #
+#########################
+
+my @mappingArray;
+while (my @input = split(/\s+/, <INPUT_MAP>)) {
+  $mappingArray[$input[0]] = $input[1];
+}
+
+my %probHash;
+my $maxI = 0;
+my $maxJ = 0;
+
+while (my @input = split(/:/, <INPUT_NSS>)) {
+
+  # 09 Jan 2005 : GWA : Yikes, not sure about ordering here.  Also what the
+  #               .nss file includes is the bit error probability,
+  #               essentially the inverse of what we want.
+
+  $probHash{"$input[0]x$input[1]"} = (1 - $input[2]);
+  
+  if ($input[0] > $maxI) {
+    $maxI = $input[0];
+  }
+  if ($input[1] > $maxJ) {
+    $maxJ = $input[1];
+  }
+}
+
+#############################
+#                           #
+#  Write out the nesC code  #
+#                           #
+#############################
+
+my $dateString = `date`;
+print <<TOP;
+// Filename: NodeConnectivityM.nc
+// Generated on $dateString
+// Created by createMotelabTopology.pl
+
+module NodeConnectivityM {
+  provides {
+    interface NodeConnectivity;
+  }
+} implementation {
+TOP
+
+my $arrayWidth = $maxI + 1;
+my $arrayHeight = $maxJ + 1;
+my $connectivityString = <<START;
+  uint8_t connectivity[$arrayWidth][$arrayHeight] =
+  {
+START
+$connectivityString .= "    ";
+for (my $i = 0; $i <= $maxI; $i++) {
+  $connectivityString .= "{ ";
+  for (my $j = 0; $j <= $maxJ; $j++) {
+    if ($i == $j) {
+      $connectivityString .= "1";
+    } elsif (!defined($probHash{"$i" . "x" . "$j"})) {
+      $connectivityString .= "0";
+    } else {
+      $connectivityString .= $probHash{"$i" . "x" . "$j"};
+    }
+    if ($j != $maxJ) {
+      $connectivityString .= ", ";
+    }
+  }
+  $connectivityString .= " }";
+  if ($i != $maxI) {
+    $connectivityString .= ",";
+  }
+  $connectivityString .= "\n";
+  if ($i != $maxI) {
+    $connectivityString .= "    ";
+  }
+}
+$connectivityString .= <<END;
+  };
+END
+print "$connectivityString";
+
+my $mappingString = "{ ";
+my $mappingSize = @mappingArray;
+for (my $i = 0; $i < @mappingArray; $i++) {
+  $mappingString .= $mappingArray[$i];
+  if ($i != (@mappingArray - 1)) {
+    $mappingString .= ", ";
+  }
+}
+$mappingString .= " };";
+
+print <<MAPPING;
+  uint16_t mapping[$mappingSize] = $mappingString
+MAPPING
+
+print <<REALEND;
+  
+  command int8_t NodeConnectivity.mapping(uint16_t moteid) {
+    uint8_t i;
+    for (i = 0; i < $mappingSize; i++) {
+      if (mapping[i] == moteid) {
+        return i;
+      }
+    }
+    return -1;
+  }
+
+  command bool NodeConnectivity.connected(uint16_t srcnode, uint16_t dstnode) {
+    int8_t src = call NodeConnectivity.mapping(srcnode);
+    int8_t dst = call NodeConnectivity.mapping(dstnode);
+
+    if ((src == -1) ||
+        (dst == -1)) {
+      return FALSE;
+    }
+
+    if (connectivity[src][dst] == 1) {
+      return TRUE;
+    } else {
+      return FALSE;
+    }
+  }
+}
+REALEND
diff --git a/apps/UDPEcho/NodeConnectivity/exampleMap.txt b/apps/UDPEcho/NodeConnectivity/exampleMap.txt
new file mode 100644
index 00000000..ba16bfda
--- /dev/null
+++ b/apps/UDPEcho/NodeConnectivity/exampleMap.txt
@@ -0,0 +1,16 @@
+0 12
+1 30
+2 24
+3 7
+4 18
+5 4
+6 28
+7 2
+8 16
+9 1
+10 22
+11 13
+12 23
+13 25
+14 26
+15 5
diff --git a/apps/UDPEcho/NodeConnectivity/testBed.nss b/apps/UDPEcho/NodeConnectivity/testBed.nss
new file mode 100644
index 00000000..b304f8b1
--- /dev/null
+++ b/apps/UDPEcho/NodeConnectivity/testBed.nss
@@ -0,0 +1,63 @@
+0:1:0.0
+0:2:1.0
+0:3:1.0
+0:4:1.0
+0:5:1.0
+0:6:1.0
+0:7:1.0
+
+1:0:0.0
+1:2:0.0
+1:3:1.0
+1:4:1.0
+1:5:1.0
+1:6:1.0
+1:7:1.0
+
+2:0:1.0
+2:1:0.0
+2:3:0.0
+2:4:1.0
+2:5:1.0
+2:6:1.0
+2:7:1.0
+
+3:0:1.0
+3:1:1.0
+3:2:0.0
+3:4:0.0
+3:5:1.0
+3:6:1.0
+3:7:1.0
+
+4:0:1.0
+4:1:1.0
+4:2:1.0
+4:3:0.0
+4:5:0.0
+4:6:1.0
+4:7:1.0
+
+5:0:1.0
+5:1:1.0
+5:2:1.0
+5:3:1.0
+5:4:0.0
+5:6:0.0
+5:7:1.0
+
+6:0:1.0
+6:1:1.0
+6:2:1.0
+6:3:1.0
+6:4:1.0
+6:5:0.0
+6:7:0.0
+
+7:0:1.0
+7:1:1.0
+7:2:1.0
+7:3:1.0
+7:4:1.0
+7:6:0.0
+
diff --git a/apps/UDPEcho/NodeConnectivity/testBedMap.txt b/apps/UDPEcho/NodeConnectivity/testBedMap.txt
new file mode 100644
index 00000000..66d6cdf1
--- /dev/null
+++ b/apps/UDPEcho/NodeConnectivity/testBedMap.txt
@@ -0,0 +1,8 @@
+0 100
+1 101
+2 102
+3 103
+4 104
+5 105
+6 106
+7 107
diff --git a/apps/UDPEcho/README b/apps/UDPEcho/README
new file mode 100644
index 00000000..efeeae76
--- /dev/null
+++ b/apps/UDPEcho/README
@@ -0,0 +1,11 @@
+
+A simple application which verifies the 6loWPAN stack is functioning
+correctly.  A mote running this will respond to ICMP Echo requests
+(0x80), and provide a UDP echo service on port 7 (a la rfc862).
+
+To build, use the 'blip' make target extra.  IE, 
+
+$ make <platform> blip ...
+
+For more information on setting up an IPv6 network, please see the tutorial:
+http://docs.tinyos.net/index.php/BLIP_Tutorial
diff --git a/apps/UDPEcho/UDPEchoC.nc b/apps/UDPEcho/UDPEchoC.nc
new file mode 100644
index 00000000..99cd80be
--- /dev/null
+++ b/apps/UDPEcho/UDPEchoC.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <lib6lowpan/6lowpan.h>
+
+configuration UDPEchoC {
+
+} implementation {
+  components MainC, LedsC;
+  components UDPEchoP;
+
+  UDPEchoP.Boot -> MainC;
+  UDPEchoP.Leds -> LedsC;
+
+  components new TimerMilliC();
+  components IPStackC;
+
+  UDPEchoP.RadioControl ->  IPStackC;
+  components new UdpSocketC() as Echo,
+    new UdpSocketC() as Status;
+  UDPEchoP.Echo -> Echo;
+
+  UDPEchoP.Status -> Status;
+
+  UDPEchoP.StatusTimer -> TimerMilliC;
+
+  components UdpC, IPDispatchC;
+  UDPEchoP.IPStats -> IPDispatchC;
+  UDPEchoP.UDPStats -> UdpC;
+
+#ifdef RPL_ROUTING
+  components RPLRoutingC;
+#endif
+
+  components RandomC;
+  UDPEchoP.Random -> RandomC;
+
+  // UDP shell on port 2000
+  components UDPShellC;
+
+  // prints the routing table
+  components RouteCmdC;
+#ifndef  IN6_PREFIX
+  components DhcpCmdC;
+#endif
+}
diff --git a/apps/UDPEcho/UDPEchoP.nc b/apps/UDPEcho/UDPEchoP.nc
new file mode 100644
index 00000000..0662c25e
--- /dev/null
+++ b/apps/UDPEcho/UDPEchoP.nc
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <IPDispatch.h>
+#include <lib6lowpan/lib6lowpan.h>
+#include <lib6lowpan/ip.h>
+#include <lib6lowpan/ip.h>
+
+#include "UDPReport.h"
+#include "PrintfUART.h"
+
+#define REPORT_PERIOD 10L
+
+module UDPEchoP {
+  uses {
+    interface Boot;
+    interface SplitControl as RadioControl;
+
+    interface UDP as Echo;
+    interface UDP as Status;
+
+    interface Leds;
+    
+    interface Timer<TMilli> as StatusTimer;
+   
+    interface BlipStatistics<ip_statistics_t> as IPStats;
+    interface BlipStatistics<udp_statistics_t> as UDPStats;
+
+    interface Random;
+  }
+
+} implementation {
+
+  bool timerStarted;
+  nx_struct udp_report stats;
+  struct sockaddr_in6 route_dest;
+
+  event void Boot.booted() {
+    call RadioControl.start();
+    timerStarted = FALSE;
+
+    call IPStats.clear();
+    printfUART_init();
+
+#ifdef REPORT_DEST
+    route_dest.sin6_port = htons(7000);
+    inet_pton6(REPORT_DEST, &route_dest.sin6_addr);
+    call StatusTimer.startOneShot(call Random.rand16() % (1024 * REPORT_PERIOD));
+#endif
+
+    dbg("Boot", "booted: %i\n", TOS_NODE_ID);
+    call Echo.bind(7);
+    call Status.bind(7001);
+
+  }
+
+  event void RadioControl.startDone(error_t e) {
+  }
+
+  event void RadioControl.stopDone(error_t e) {
+
+  }
+
+  event void Status.recvfrom(struct sockaddr_in6 *from, void *data, 
+                             uint16_t len, struct ip6_metadata *meta) {
+
+  }
+
+  event void Echo.recvfrom(struct sockaddr_in6 *from, void *data, 
+                           uint16_t len, struct ip6_metadata *meta) {
+#ifdef PRINTFUART_ENABLED
+    int i;
+    uint8_t *cur = data;
+    call Leds.led0Toggle();
+    printfUART("Echo recv [%i]: ", len);
+    for (i = 0; i < len; i++) {
+      printfUART("%02x ", cur[i]);
+    }
+    printfUART("\n");
+#endif
+    call Echo.sendto(from, data, len);
+  }
+
+  event void StatusTimer.fired() {
+    if (!timerStarted) {
+      call StatusTimer.startPeriodic(1024 * REPORT_PERIOD);
+      timerStarted = TRUE;
+    }
+
+    stats.seqno++;
+    stats.sender = TOS_NODE_ID;
+
+    call IPStats.get(&stats.ip);
+    call UDPStats.get(&stats.udp);
+    call Leds.led1Toggle();
+    call Status.sendto(&route_dest, &stats, sizeof(stats));
+  }
+}
diff --git a/apps/UDPEcho/UDPReport.h b/apps/UDPEcho/UDPReport.h
new file mode 100644
index 00000000..3ab70e39
--- /dev/null
+++ b/apps/UDPEcho/UDPReport.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef _UDPREPORT_H
+#define _UDPREPORT_H
+
+#include <BlipStatistics.h>
+
+nx_struct udp_report {
+  nx_uint16_t seqno;
+  nx_uint16_t sender;
+  ip_statistics_t    ip;
+  udp_statistics_t   udp;
+  icmp_statistics_t  icmp;
+  route_statistics_t route;
+} ;
+
+#endif
diff --git a/apps/UDPEcho/tests/echotest.pl b/apps/UDPEcho/tests/echotest.pl
new file mode 100644
index 00000000..30ae0d50
--- /dev/null
+++ b/apps/UDPEcho/tests/echotest.pl
@@ -0,0 +1,46 @@
+#!/usr/bin/perl
+
+use strict;
+use warnings;
+use FileHandle;
+use IPC::Open2;
+
+if (@ARGV != 1) {
+    print "Usage: echotest.pl <target ipv6>\n";
+    exit(1);
+}
+
+my $alpha = "abcdefghijklmnopqrstuvwxyz1234567890ABCDEFGHIJKLMNOPQRSTUVWXYZ";
+my $testbuf = "";
+while (length($testbuf) < 1280 - 40 - 8) {
+    $testbuf .= $alpha;
+}
+
+open2(*READER, *WRITER, "nc6 -u $ARGV[0] 7");
+
+my $trials = 0;
+while (1) {
+    my $len = int(rand(1000));
+    print $len . "\n";
+    print WRITER substr($testbuf, 0, $len) . "\n";
+
+    my $rin = '';
+    vec($rin,fileno(READER),1) = 1;
+    my $found = select($rin, undef, undef, "6");
+    if ($found == 1) {
+        my $foo;
+        sysread READER, $foo, 1280;
+        if ($foo eq $testbuf) {
+            print "WARNING: payload mismatch\n";
+        }
+    } else {
+        print "FAILURE: len: $len\n";
+    }
+
+    $trials++;
+    print "TRIAL: $trials\n";
+    sleep(.05);
+}
+# need to kill off the nc6 process
+print WRITER eof;
+
diff --git a/apps/UDPEcho/tests/seqtest.pl b/apps/UDPEcho/tests/seqtest.pl
new file mode 100755
index 00000000..b3b170a0
--- /dev/null
+++ b/apps/UDPEcho/tests/seqtest.pl
@@ -0,0 +1,50 @@
+#!/usr/bin/perl
+
+# make sure we don't break on any length boundaries
+
+use strict;
+use warnings;
+use FileHandle;
+use IPC::Open2;
+
+if (@ARGV != 1) {
+    print "Usage: seqtest.pl <target ipv6>\n";
+    exit(1);
+}
+
+my $alpha = "abcdefghijklmnopqrstuvwxyz1234567890ABCDEFGHIJKLMNOPQRSTUVWXYZ";
+my $testbuf = "";
+while (length($testbuf) < 1280 - 40 - 8) {
+    $testbuf .= $alpha;
+}
+
+open2(*READER, *WRITER, "nc6 -u $ARGV[0] 7");
+
+my $trials = 0;
+while (1) {
+    my $len;
+    for ($len = 1; $len < 1000; $len++) {
+        print $len . "\n";
+        print WRITER substr($testbuf, 0, $len) . "\n";
+        
+        my $rin = '';
+        vec($rin,fileno(READER),1) = 1;
+        my $found = select($rin, undef, undef, "6");
+        if ($found == 1) {
+            my $foo;
+            sysread READER, $foo, 1280;
+            if ($foo eq $testbuf) {
+                print "WARNING: payload mismatch\n";
+            }
+        } else {
+            print "FAILURE: len: $len\n";
+        }
+        
+        $trials++;
+        print "TRIAL: $trials\n";
+        sleep(.05);
+    }
+}
+# need to kill off the nc6 process
+print WRITER eof;
+
diff --git a/apps/UDPEcho/util/Listener.py b/apps/UDPEcho/util/Listener.py
new file mode 100644
index 00000000..cfe1206d
--- /dev/null
+++ b/apps/UDPEcho/util/Listener.py
@@ -0,0 +1,22 @@
+
+import socket
+import UdpReport
+import re
+import sys
+
+port = 7000
+
+if __name__ == '__main__':
+
+    s = socket.socket(socket.AF_INET6, socket.SOCK_DGRAM)
+    s.bind(('', port))
+
+    while True:
+        data, addr = s.recvfrom(1024)
+        if (len(data) > 0):
+
+            rpt = UdpReport.UdpReport(data=data, data_length=len(data))
+
+            print addr
+            print rpt
+
diff --git a/apps/UDPEcho/util/MySQLListener.py b/apps/UDPEcho/util/MySQLListener.py
new file mode 100644
index 00000000..4a240cf4
--- /dev/null
+++ b/apps/UDPEcho/util/MySQLListener.py
@@ -0,0 +1,90 @@
+
+import socket
+import UdpReport
+import re
+import sys
+import MySQLdb
+
+port = 7000
+
+if __name__ == '__main__':
+    conn = MySQLdb.connect (host = "localhost",
+                            user = "b6lowpan",
+                            db = "b6lowpan")
+    cursor = conn.cursor()
+    s = socket.socket(socket.AF_INET6, socket.SOCK_DGRAM)
+    s.bind(('', port))
+    if len(sys.argv) < 2:
+        print "\tListener.py <tablename>"
+        sys.exit(1)
+
+    try:
+        drop = "DROP TABLE " + str(sys.argv[1])
+        cursor.execute(drop)
+    except:
+        print "Drop failed... continuing"
+
+    methods = []
+    create_table = "CREATE TABLE " + str(sys.argv[1]) + " ("
+    create_table += "ts TIMESTAMP, origin INT(4), "
+    insert = "INSERT INTO " + sys.argv[1] + " (origin, "
+
+
+    re = re.compile('^get_(.*)')
+    for method in dir(UdpReport.UdpReport):
+        result = re.search(method)
+        if result != None:
+            create_table += str(result.group(1)) + " INT(4), "
+            insert += str(result.group(1)) + ", "
+            methods.append(str(result.group(1)))
+
+    create_table = create_table[0:len(create_table) - 2]
+    insert = insert[0:len(insert) - 2]
+    create_table += ")"
+    insert += ") VALUES ("
+    print insert
+    print create_table
+
+    cursor.execute(create_table)
+
+    while True:
+        data, addr = s.recvfrom(1024)
+        if (len(data) > 0):
+
+
+            print
+            print str(len(data)) + ":", 
+            for i in data:
+                print "0x%x" % ord(i),
+ 
+            print
+            rpt = UdpReport.UdpReport(data=data, data_length=len(data))
+            addr = addr[0]
+            AA = addr.split(":")
+            print addr
+            print rpt
+
+
+            thisInsert = insert
+            thisInsert += "0x" + AA[-1] + ", "
+
+            
+
+            for m in methods:
+                try:
+                    getter = getattr(rpt, 'get_' + m, None)
+                    val = getter()
+                except:
+                    val = 0
+                if (isinstance(val, list)):
+                    val = val[0]
+                thisInsert += str(val) + ", "
+            thisInsert = thisInsert[0:len(thisInsert) - 2]
+            thisInsert += ")"
+
+            print thisInsert
+
+            cursor.execute(thisInsert)
+
+    conn.close()
+
diff --git a/apps/UDPEcho/util/UdpReport.py b/apps/UDPEcho/util/UdpReport.py
new file mode 100644
index 00000000..c42f8174
--- /dev/null
+++ b/apps/UDPEcho/util/UdpReport.py
@@ -0,0 +1,1452 @@
+#
+# This class is automatically generated by mig. DO NOT EDIT THIS FILE.
+# This class implements a Python interface to the 'UdpReport'
+# message type.
+#
+
+import tinyos.message.Message
+
+# The default size of this message type in bytes.
+DEFAULT_MESSAGE_SIZE = 35
+
+# The Active Message type associated with this message.
+AM_TYPE = -1
+
+class UdpReport(tinyos.message.Message.Message):
+    # Create a new UdpReport of size 35.
+    def __init__(self, data="", addr=None, gid=None, base_offset=0, data_length=35):
+        tinyos.message.Message.Message.__init__(self, data, addr, gid, base_offset, data_length)
+        self.amTypeSet(AM_TYPE)
+    
+    # Get AM_TYPE
+    def get_amType(cls):
+        return AM_TYPE
+    
+    get_amType = classmethod(get_amType)
+    
+    #
+    # Return a String representation of this message. Includes the
+    # message type name and the non-indexed field values.
+    #
+    def __str__(self):
+        s = "Message <UdpReport> \n"
+        try:
+            s += "  [ip.sent=0x%x]\n" % (self.get_ip_sent())
+        except:
+            pass
+        try:
+            s += "  [ip.forwarded=0x%x]\n" % (self.get_ip_forwarded())
+        except:
+            pass
+        try:
+            s += "  [ip.rx_drop=0x%x]\n" % (self.get_ip_rx_drop())
+        except:
+            pass
+        try:
+            s += "  [ip.tx_drop=0x%x]\n" % (self.get_ip_tx_drop())
+        except:
+            pass
+        try:
+            s += "  [ip.fw_drop=0x%x]\n" % (self.get_ip_fw_drop())
+        except:
+            pass
+        try:
+            s += "  [ip.rx_total=0x%x]\n" % (self.get_ip_rx_total())
+        except:
+            pass
+        try:
+            s += "  [ip.real_drop=0x%x]\n" % (self.get_ip_real_drop())
+        except:
+            pass
+        try:
+            s += "  [ip.hlim_drop=0x%x]\n" % (self.get_ip_hlim_drop())
+        except:
+            pass
+        try:
+            s += "  [ip.senddone_el=0x%x]\n" % (self.get_ip_senddone_el())
+        except:
+            pass
+        try:
+            s += "  [ip.fragpool=0x%x]\n" % (self.get_ip_fragpool())
+        except:
+            pass
+        try:
+            s += "  [ip.sendinfo=0x%x]\n" % (self.get_ip_sendinfo())
+        except:
+            pass
+        try:
+            s += "  [ip.sendentry=0x%x]\n" % (self.get_ip_sendentry())
+        except:
+            pass
+        try:
+            s += "  [ip.sndqueue=0x%x]\n" % (self.get_ip_sndqueue())
+        except:
+            pass
+        try:
+            s += "  [ip.encfail=0x%x]\n" % (self.get_ip_encfail())
+        except:
+            pass
+        try:
+            s += "  [ip.heapfree=0x%x]\n" % (self.get_ip_heapfree())
+        except:
+            pass
+        try:
+            s += "  [udp.total=0x%x]\n" % (self.get_udp_total())
+        except:
+            pass
+        try:
+            s += "  [udp.failed=0x%x]\n" % (self.get_udp_failed())
+        except:
+            pass
+        try:
+            s += "  [udp.seqno=0x%x]\n" % (self.get_udp_seqno())
+        except:
+            pass
+        try:
+            s += "  [udp.sender=0x%x]\n" % (self.get_udp_sender())
+        except:
+            pass
+        try:
+            s += "  [icmp.rx=0x%x]\n" % (self.get_icmp_rx())
+        except:
+            pass
+        try:
+            s += "  [route.hop_limit=0x%x]\n" % (self.get_route_hop_limit())
+        except:
+            pass
+        try:
+            s += "  [route.parent=0x%x]\n" % (self.get_route_parent())
+        except:
+            pass
+        try:
+            s += "  [route.parent_metric=0x%x]\n" % (self.get_route_parent_metric())
+        except:
+            pass
+        try:
+            s += "  [route.parent_etx=0x%x]\n" % (self.get_route_parent_etx())
+        except:
+            pass
+        return s
+
+    # Message-type-specific access methods appear below.
+
+    #
+    # Accessor methods for field: ip.sent
+    #   Field type: int
+    #   Offset (bits): 0
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'ip.sent' is signed (False).
+    #
+    def isSigned_ip_sent(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.sent' is an array (False).
+    #
+    def isArray_ip_sent(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.sent'
+    #
+    def offset_ip_sent(self):
+        return (0 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.sent'
+    #
+    def offsetBits_ip_sent(self):
+        return 0
+    
+    #
+    # Return the value (as a int) of the field 'ip.sent'
+    #
+    def get_ip_sent(self):
+        return self.getUIntElement(self.offsetBits_ip_sent(), 16, 1)
+    
+    #
+    # Set the value of the field 'ip.sent'
+    #
+    def set_ip_sent(self, value):
+        self.setUIntElement(self.offsetBits_ip_sent(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.sent'
+    #
+    def size_ip_sent(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.sent'
+    #
+    def sizeBits_ip_sent(self):
+        return 16
+    
+    #
+    # Accessor methods for field: ip.forwarded
+    #   Field type: int
+    #   Offset (bits): 16
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'ip.forwarded' is signed (False).
+    #
+    def isSigned_ip_forwarded(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.forwarded' is an array (False).
+    #
+    def isArray_ip_forwarded(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.forwarded'
+    #
+    def offset_ip_forwarded(self):
+        return (16 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.forwarded'
+    #
+    def offsetBits_ip_forwarded(self):
+        return 16
+    
+    #
+    # Return the value (as a int) of the field 'ip.forwarded'
+    #
+    def get_ip_forwarded(self):
+        return self.getUIntElement(self.offsetBits_ip_forwarded(), 16, 1)
+    
+    #
+    # Set the value of the field 'ip.forwarded'
+    #
+    def set_ip_forwarded(self, value):
+        self.setUIntElement(self.offsetBits_ip_forwarded(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.forwarded'
+    #
+    def size_ip_forwarded(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.forwarded'
+    #
+    def sizeBits_ip_forwarded(self):
+        return 16
+    
+    #
+    # Accessor methods for field: ip.rx_drop
+    #   Field type: short
+    #   Offset (bits): 32
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ip.rx_drop' is signed (False).
+    #
+    def isSigned_ip_rx_drop(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.rx_drop' is an array (False).
+    #
+    def isArray_ip_rx_drop(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.rx_drop'
+    #
+    def offset_ip_rx_drop(self):
+        return (32 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.rx_drop'
+    #
+    def offsetBits_ip_rx_drop(self):
+        return 32
+    
+    #
+    # Return the value (as a short) of the field 'ip.rx_drop'
+    #
+    def get_ip_rx_drop(self):
+        return self.getUIntElement(self.offsetBits_ip_rx_drop(), 8, 1)
+    
+    #
+    # Set the value of the field 'ip.rx_drop'
+    #
+    def set_ip_rx_drop(self, value):
+        self.setUIntElement(self.offsetBits_ip_rx_drop(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.rx_drop'
+    #
+    def size_ip_rx_drop(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.rx_drop'
+    #
+    def sizeBits_ip_rx_drop(self):
+        return 8
+    
+    #
+    # Accessor methods for field: ip.tx_drop
+    #   Field type: short
+    #   Offset (bits): 40
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ip.tx_drop' is signed (False).
+    #
+    def isSigned_ip_tx_drop(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.tx_drop' is an array (False).
+    #
+    def isArray_ip_tx_drop(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.tx_drop'
+    #
+    def offset_ip_tx_drop(self):
+        return (40 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.tx_drop'
+    #
+    def offsetBits_ip_tx_drop(self):
+        return 40
+    
+    #
+    # Return the value (as a short) of the field 'ip.tx_drop'
+    #
+    def get_ip_tx_drop(self):
+        return self.getUIntElement(self.offsetBits_ip_tx_drop(), 8, 1)
+    
+    #
+    # Set the value of the field 'ip.tx_drop'
+    #
+    def set_ip_tx_drop(self, value):
+        self.setUIntElement(self.offsetBits_ip_tx_drop(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.tx_drop'
+    #
+    def size_ip_tx_drop(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.tx_drop'
+    #
+    def sizeBits_ip_tx_drop(self):
+        return 8
+    
+    #
+    # Accessor methods for field: ip.fw_drop
+    #   Field type: short
+    #   Offset (bits): 48
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ip.fw_drop' is signed (False).
+    #
+    def isSigned_ip_fw_drop(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.fw_drop' is an array (False).
+    #
+    def isArray_ip_fw_drop(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.fw_drop'
+    #
+    def offset_ip_fw_drop(self):
+        return (48 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.fw_drop'
+    #
+    def offsetBits_ip_fw_drop(self):
+        return 48
+    
+    #
+    # Return the value (as a short) of the field 'ip.fw_drop'
+    #
+    def get_ip_fw_drop(self):
+        return self.getUIntElement(self.offsetBits_ip_fw_drop(), 8, 1)
+    
+    #
+    # Set the value of the field 'ip.fw_drop'
+    #
+    def set_ip_fw_drop(self, value):
+        self.setUIntElement(self.offsetBits_ip_fw_drop(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.fw_drop'
+    #
+    def size_ip_fw_drop(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.fw_drop'
+    #
+    def sizeBits_ip_fw_drop(self):
+        return 8
+    
+    #
+    # Accessor methods for field: ip.rx_total
+    #   Field type: short
+    #   Offset (bits): 56
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ip.rx_total' is signed (False).
+    #
+    def isSigned_ip_rx_total(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.rx_total' is an array (False).
+    #
+    def isArray_ip_rx_total(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.rx_total'
+    #
+    def offset_ip_rx_total(self):
+        return (56 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.rx_total'
+    #
+    def offsetBits_ip_rx_total(self):
+        return 56
+    
+    #
+    # Return the value (as a short) of the field 'ip.rx_total'
+    #
+    def get_ip_rx_total(self):
+        return self.getUIntElement(self.offsetBits_ip_rx_total(), 8, 1)
+    
+    #
+    # Set the value of the field 'ip.rx_total'
+    #
+    def set_ip_rx_total(self, value):
+        self.setUIntElement(self.offsetBits_ip_rx_total(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.rx_total'
+    #
+    def size_ip_rx_total(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.rx_total'
+    #
+    def sizeBits_ip_rx_total(self):
+        return 8
+    
+    #
+    # Accessor methods for field: ip.real_drop
+    #   Field type: short
+    #   Offset (bits): 64
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ip.real_drop' is signed (False).
+    #
+    def isSigned_ip_real_drop(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.real_drop' is an array (False).
+    #
+    def isArray_ip_real_drop(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.real_drop'
+    #
+    def offset_ip_real_drop(self):
+        return (64 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.real_drop'
+    #
+    def offsetBits_ip_real_drop(self):
+        return 64
+    
+    #
+    # Return the value (as a short) of the field 'ip.real_drop'
+    #
+    def get_ip_real_drop(self):
+        return self.getUIntElement(self.offsetBits_ip_real_drop(), 8, 1)
+    
+    #
+    # Set the value of the field 'ip.real_drop'
+    #
+    def set_ip_real_drop(self, value):
+        self.setUIntElement(self.offsetBits_ip_real_drop(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.real_drop'
+    #
+    def size_ip_real_drop(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.real_drop'
+    #
+    def sizeBits_ip_real_drop(self):
+        return 8
+    
+    #
+    # Accessor methods for field: ip.hlim_drop
+    #   Field type: short
+    #   Offset (bits): 72
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ip.hlim_drop' is signed (False).
+    #
+    def isSigned_ip_hlim_drop(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.hlim_drop' is an array (False).
+    #
+    def isArray_ip_hlim_drop(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.hlim_drop'
+    #
+    def offset_ip_hlim_drop(self):
+        return (72 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.hlim_drop'
+    #
+    def offsetBits_ip_hlim_drop(self):
+        return 72
+    
+    #
+    # Return the value (as a short) of the field 'ip.hlim_drop'
+    #
+    def get_ip_hlim_drop(self):
+        return self.getUIntElement(self.offsetBits_ip_hlim_drop(), 8, 1)
+    
+    #
+    # Set the value of the field 'ip.hlim_drop'
+    #
+    def set_ip_hlim_drop(self, value):
+        self.setUIntElement(self.offsetBits_ip_hlim_drop(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.hlim_drop'
+    #
+    def size_ip_hlim_drop(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.hlim_drop'
+    #
+    def sizeBits_ip_hlim_drop(self):
+        return 8
+    
+    #
+    # Accessor methods for field: ip.senddone_el
+    #   Field type: short
+    #   Offset (bits): 80
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ip.senddone_el' is signed (False).
+    #
+    def isSigned_ip_senddone_el(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.senddone_el' is an array (False).
+    #
+    def isArray_ip_senddone_el(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.senddone_el'
+    #
+    def offset_ip_senddone_el(self):
+        return (80 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.senddone_el'
+    #
+    def offsetBits_ip_senddone_el(self):
+        return 80
+    
+    #
+    # Return the value (as a short) of the field 'ip.senddone_el'
+    #
+    def get_ip_senddone_el(self):
+        return self.getUIntElement(self.offsetBits_ip_senddone_el(), 8, 1)
+    
+    #
+    # Set the value of the field 'ip.senddone_el'
+    #
+    def set_ip_senddone_el(self, value):
+        self.setUIntElement(self.offsetBits_ip_senddone_el(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.senddone_el'
+    #
+    def size_ip_senddone_el(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.senddone_el'
+    #
+    def sizeBits_ip_senddone_el(self):
+        return 8
+    
+    #
+    # Accessor methods for field: ip.fragpool
+    #   Field type: short
+    #   Offset (bits): 88
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ip.fragpool' is signed (False).
+    #
+    def isSigned_ip_fragpool(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.fragpool' is an array (False).
+    #
+    def isArray_ip_fragpool(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.fragpool'
+    #
+    def offset_ip_fragpool(self):
+        return (88 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.fragpool'
+    #
+    def offsetBits_ip_fragpool(self):
+        return 88
+    
+    #
+    # Return the value (as a short) of the field 'ip.fragpool'
+    #
+    def get_ip_fragpool(self):
+        return self.getUIntElement(self.offsetBits_ip_fragpool(), 8, 1)
+    
+    #
+    # Set the value of the field 'ip.fragpool'
+    #
+    def set_ip_fragpool(self, value):
+        self.setUIntElement(self.offsetBits_ip_fragpool(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.fragpool'
+    #
+    def size_ip_fragpool(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.fragpool'
+    #
+    def sizeBits_ip_fragpool(self):
+        return 8
+    
+    #
+    # Accessor methods for field: ip.sendinfo
+    #   Field type: short
+    #   Offset (bits): 96
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ip.sendinfo' is signed (False).
+    #
+    def isSigned_ip_sendinfo(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.sendinfo' is an array (False).
+    #
+    def isArray_ip_sendinfo(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.sendinfo'
+    #
+    def offset_ip_sendinfo(self):
+        return (96 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.sendinfo'
+    #
+    def offsetBits_ip_sendinfo(self):
+        return 96
+    
+    #
+    # Return the value (as a short) of the field 'ip.sendinfo'
+    #
+    def get_ip_sendinfo(self):
+        return self.getUIntElement(self.offsetBits_ip_sendinfo(), 8, 1)
+    
+    #
+    # Set the value of the field 'ip.sendinfo'
+    #
+    def set_ip_sendinfo(self, value):
+        self.setUIntElement(self.offsetBits_ip_sendinfo(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.sendinfo'
+    #
+    def size_ip_sendinfo(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.sendinfo'
+    #
+    def sizeBits_ip_sendinfo(self):
+        return 8
+    
+    #
+    # Accessor methods for field: ip.sendentry
+    #   Field type: short
+    #   Offset (bits): 104
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ip.sendentry' is signed (False).
+    #
+    def isSigned_ip_sendentry(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.sendentry' is an array (False).
+    #
+    def isArray_ip_sendentry(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.sendentry'
+    #
+    def offset_ip_sendentry(self):
+        return (104 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.sendentry'
+    #
+    def offsetBits_ip_sendentry(self):
+        return 104
+    
+    #
+    # Return the value (as a short) of the field 'ip.sendentry'
+    #
+    def get_ip_sendentry(self):
+        return self.getUIntElement(self.offsetBits_ip_sendentry(), 8, 1)
+    
+    #
+    # Set the value of the field 'ip.sendentry'
+    #
+    def set_ip_sendentry(self, value):
+        self.setUIntElement(self.offsetBits_ip_sendentry(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.sendentry'
+    #
+    def size_ip_sendentry(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.sendentry'
+    #
+    def sizeBits_ip_sendentry(self):
+        return 8
+    
+    #
+    # Accessor methods for field: ip.sndqueue
+    #   Field type: short
+    #   Offset (bits): 112
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ip.sndqueue' is signed (False).
+    #
+    def isSigned_ip_sndqueue(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.sndqueue' is an array (False).
+    #
+    def isArray_ip_sndqueue(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.sndqueue'
+    #
+    def offset_ip_sndqueue(self):
+        return (112 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.sndqueue'
+    #
+    def offsetBits_ip_sndqueue(self):
+        return 112
+    
+    #
+    # Return the value (as a short) of the field 'ip.sndqueue'
+    #
+    def get_ip_sndqueue(self):
+        return self.getUIntElement(self.offsetBits_ip_sndqueue(), 8, 1)
+    
+    #
+    # Set the value of the field 'ip.sndqueue'
+    #
+    def set_ip_sndqueue(self, value):
+        self.setUIntElement(self.offsetBits_ip_sndqueue(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.sndqueue'
+    #
+    def size_ip_sndqueue(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.sndqueue'
+    #
+    def sizeBits_ip_sndqueue(self):
+        return 8
+    
+    #
+    # Accessor methods for field: ip.encfail
+    #   Field type: short
+    #   Offset (bits): 120
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ip.encfail' is signed (False).
+    #
+    def isSigned_ip_encfail(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.encfail' is an array (False).
+    #
+    def isArray_ip_encfail(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.encfail'
+    #
+    def offset_ip_encfail(self):
+        return (120 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.encfail'
+    #
+    def offsetBits_ip_encfail(self):
+        return 120
+    
+    #
+    # Return the value (as a short) of the field 'ip.encfail'
+    #
+    def get_ip_encfail(self):
+        return self.getUIntElement(self.offsetBits_ip_encfail(), 8, 1)
+    
+    #
+    # Set the value of the field 'ip.encfail'
+    #
+    def set_ip_encfail(self, value):
+        self.setUIntElement(self.offsetBits_ip_encfail(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.encfail'
+    #
+    def size_ip_encfail(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.encfail'
+    #
+    def sizeBits_ip_encfail(self):
+        return 8
+    
+    #
+    # Accessor methods for field: ip.heapfree
+    #   Field type: int
+    #   Offset (bits): 128
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'ip.heapfree' is signed (False).
+    #
+    def isSigned_ip_heapfree(self):
+        return False
+    
+    #
+    # Return whether the field 'ip.heapfree' is an array (False).
+    #
+    def isArray_ip_heapfree(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'ip.heapfree'
+    #
+    def offset_ip_heapfree(self):
+        return (128 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'ip.heapfree'
+    #
+    def offsetBits_ip_heapfree(self):
+        return 128
+    
+    #
+    # Return the value (as a int) of the field 'ip.heapfree'
+    #
+    def get_ip_heapfree(self):
+        return self.getUIntElement(self.offsetBits_ip_heapfree(), 16, 1)
+    
+    #
+    # Set the value of the field 'ip.heapfree'
+    #
+    def set_ip_heapfree(self, value):
+        self.setUIntElement(self.offsetBits_ip_heapfree(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'ip.heapfree'
+    #
+    def size_ip_heapfree(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'ip.heapfree'
+    #
+    def sizeBits_ip_heapfree(self):
+        return 16
+    
+    #
+    # Accessor methods for field: udp.total
+    #   Field type: int
+    #   Offset (bits): 144
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'udp.total' is signed (False).
+    #
+    def isSigned_udp_total(self):
+        return False
+    
+    #
+    # Return whether the field 'udp.total' is an array (False).
+    #
+    def isArray_udp_total(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'udp.total'
+    #
+    def offset_udp_total(self):
+        return (144 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'udp.total'
+    #
+    def offsetBits_udp_total(self):
+        return 144
+    
+    #
+    # Return the value (as a int) of the field 'udp.total'
+    #
+    def get_udp_total(self):
+        return self.getUIntElement(self.offsetBits_udp_total(), 16, 1)
+    
+    #
+    # Set the value of the field 'udp.total'
+    #
+    def set_udp_total(self, value):
+        self.setUIntElement(self.offsetBits_udp_total(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'udp.total'
+    #
+    def size_udp_total(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'udp.total'
+    #
+    def sizeBits_udp_total(self):
+        return 16
+    
+    #
+    # Accessor methods for field: udp.failed
+    #   Field type: int
+    #   Offset (bits): 160
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'udp.failed' is signed (False).
+    #
+    def isSigned_udp_failed(self):
+        return False
+    
+    #
+    # Return whether the field 'udp.failed' is an array (False).
+    #
+    def isArray_udp_failed(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'udp.failed'
+    #
+    def offset_udp_failed(self):
+        return (160 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'udp.failed'
+    #
+    def offsetBits_udp_failed(self):
+        return 160
+    
+    #
+    # Return the value (as a int) of the field 'udp.failed'
+    #
+    def get_udp_failed(self):
+        return self.getUIntElement(self.offsetBits_udp_failed(), 16, 1)
+    
+    #
+    # Set the value of the field 'udp.failed'
+    #
+    def set_udp_failed(self, value):
+        self.setUIntElement(self.offsetBits_udp_failed(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'udp.failed'
+    #
+    def size_udp_failed(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'udp.failed'
+    #
+    def sizeBits_udp_failed(self):
+        return 16
+    
+    #
+    # Accessor methods for field: udp.seqno
+    #   Field type: int
+    #   Offset (bits): 176
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'udp.seqno' is signed (False).
+    #
+    def isSigned_udp_seqno(self):
+        return False
+    
+    #
+    # Return whether the field 'udp.seqno' is an array (False).
+    #
+    def isArray_udp_seqno(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'udp.seqno'
+    #
+    def offset_udp_seqno(self):
+        return (176 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'udp.seqno'
+    #
+    def offsetBits_udp_seqno(self):
+        return 176
+    
+    #
+    # Return the value (as a int) of the field 'udp.seqno'
+    #
+    def get_udp_seqno(self):
+        return self.getUIntElement(self.offsetBits_udp_seqno(), 16, 1)
+    
+    #
+    # Set the value of the field 'udp.seqno'
+    #
+    def set_udp_seqno(self, value):
+        self.setUIntElement(self.offsetBits_udp_seqno(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'udp.seqno'
+    #
+    def size_udp_seqno(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'udp.seqno'
+    #
+    def sizeBits_udp_seqno(self):
+        return 16
+    
+    #
+    # Accessor methods for field: udp.sender
+    #   Field type: int
+    #   Offset (bits): 192
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'udp.sender' is signed (False).
+    #
+    def isSigned_udp_sender(self):
+        return False
+    
+    #
+    # Return whether the field 'udp.sender' is an array (False).
+    #
+    def isArray_udp_sender(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'udp.sender'
+    #
+    def offset_udp_sender(self):
+        return (192 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'udp.sender'
+    #
+    def offsetBits_udp_sender(self):
+        return 192
+    
+    #
+    # Return the value (as a int) of the field 'udp.sender'
+    #
+    def get_udp_sender(self):
+        return self.getUIntElement(self.offsetBits_udp_sender(), 16, 1)
+    
+    #
+    # Set the value of the field 'udp.sender'
+    #
+    def set_udp_sender(self, value):
+        self.setUIntElement(self.offsetBits_udp_sender(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'udp.sender'
+    #
+    def size_udp_sender(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'udp.sender'
+    #
+    def sizeBits_udp_sender(self):
+        return 16
+    
+    #
+    # Accessor methods for field: icmp.rx
+    #   Field type: int
+    #   Offset (bits): 208
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'icmp.rx' is signed (False).
+    #
+    def isSigned_icmp_rx(self):
+        return False
+    
+    #
+    # Return whether the field 'icmp.rx' is an array (False).
+    #
+    def isArray_icmp_rx(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'icmp.rx'
+    #
+    def offset_icmp_rx(self):
+        return (208 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'icmp.rx'
+    #
+    def offsetBits_icmp_rx(self):
+        return 208
+    
+    #
+    # Return the value (as a int) of the field 'icmp.rx'
+    #
+    def get_icmp_rx(self):
+        return self.getUIntElement(self.offsetBits_icmp_rx(), 16, 1)
+    
+    #
+    # Set the value of the field 'icmp.rx'
+    #
+    def set_icmp_rx(self, value):
+        self.setUIntElement(self.offsetBits_icmp_rx(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'icmp.rx'
+    #
+    def size_icmp_rx(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'icmp.rx'
+    #
+    def sizeBits_icmp_rx(self):
+        return 16
+    
+    #
+    # Accessor methods for field: route.hop_limit
+    #   Field type: short
+    #   Offset (bits): 224
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'route.hop_limit' is signed (False).
+    #
+    def isSigned_route_hop_limit(self):
+        return False
+    
+    #
+    # Return whether the field 'route.hop_limit' is an array (False).
+    #
+    def isArray_route_hop_limit(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'route.hop_limit'
+    #
+    def offset_route_hop_limit(self):
+        return (224 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'route.hop_limit'
+    #
+    def offsetBits_route_hop_limit(self):
+        return 224
+    
+    #
+    # Return the value (as a short) of the field 'route.hop_limit'
+    #
+    def get_route_hop_limit(self):
+        return self.getUIntElement(self.offsetBits_route_hop_limit(), 8, 1)
+    
+    #
+    # Set the value of the field 'route.hop_limit'
+    #
+    def set_route_hop_limit(self, value):
+        self.setUIntElement(self.offsetBits_route_hop_limit(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'route.hop_limit'
+    #
+    def size_route_hop_limit(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'route.hop_limit'
+    #
+    def sizeBits_route_hop_limit(self):
+        return 8
+    
+    #
+    # Accessor methods for field: route.parent
+    #   Field type: int
+    #   Offset (bits): 232
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'route.parent' is signed (False).
+    #
+    def isSigned_route_parent(self):
+        return False
+    
+    #
+    # Return whether the field 'route.parent' is an array (False).
+    #
+    def isArray_route_parent(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'route.parent'
+    #
+    def offset_route_parent(self):
+        return (232 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'route.parent'
+    #
+    def offsetBits_route_parent(self):
+        return 232
+    
+    #
+    # Return the value (as a int) of the field 'route.parent'
+    #
+    def get_route_parent(self):
+        return self.getUIntElement(self.offsetBits_route_parent(), 16, 1)
+    
+    #
+    # Set the value of the field 'route.parent'
+    #
+    def set_route_parent(self, value):
+        self.setUIntElement(self.offsetBits_route_parent(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'route.parent'
+    #
+    def size_route_parent(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'route.parent'
+    #
+    def sizeBits_route_parent(self):
+        return 16
+    
+    #
+    # Accessor methods for field: route.parent_metric
+    #   Field type: int
+    #   Offset (bits): 248
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'route.parent_metric' is signed (False).
+    #
+    def isSigned_route_parent_metric(self):
+        return False
+    
+    #
+    # Return whether the field 'route.parent_metric' is an array (False).
+    #
+    def isArray_route_parent_metric(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'route.parent_metric'
+    #
+    def offset_route_parent_metric(self):
+        return (248 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'route.parent_metric'
+    #
+    def offsetBits_route_parent_metric(self):
+        return 248
+    
+    #
+    # Return the value (as a int) of the field 'route.parent_metric'
+    #
+    def get_route_parent_metric(self):
+        return self.getUIntElement(self.offsetBits_route_parent_metric(), 16, 1)
+    
+    #
+    # Set the value of the field 'route.parent_metric'
+    #
+    def set_route_parent_metric(self, value):
+        self.setUIntElement(self.offsetBits_route_parent_metric(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'route.parent_metric'
+    #
+    def size_route_parent_metric(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'route.parent_metric'
+    #
+    def sizeBits_route_parent_metric(self):
+        return 16
+    
+    #
+    # Accessor methods for field: route.parent_etx
+    #   Field type: int
+    #   Offset (bits): 264
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'route.parent_etx' is signed (False).
+    #
+    def isSigned_route_parent_etx(self):
+        return False
+    
+    #
+    # Return whether the field 'route.parent_etx' is an array (False).
+    #
+    def isArray_route_parent_etx(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'route.parent_etx'
+    #
+    def offset_route_parent_etx(self):
+        return (264 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'route.parent_etx'
+    #
+    def offsetBits_route_parent_etx(self):
+        return 264
+    
+    #
+    # Return the value (as a int) of the field 'route.parent_etx'
+    #
+    def get_route_parent_etx(self):
+        return self.getUIntElement(self.offsetBits_route_parent_etx(), 16, 1)
+    
+    #
+    # Set the value of the field 'route.parent_etx'
+    #
+    def set_route_parent_etx(self, value):
+        self.setUIntElement(self.offsetBits_route_parent_etx(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'route.parent_etx'
+    #
+    def size_route_parent_etx(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'route.parent_etx'
+    #
+    def sizeBits_route_parent_etx(self):
+        return 16
+    
diff --git a/apps/UDPEcho/volumes-at45db.xml b/apps/UDPEcho/volumes-at45db.xml
new file mode 100644
index 00000000..8b22ebe4
--- /dev/null
+++ b/apps/UDPEcho/volumes-at45db.xml
@@ -0,0 +1,6 @@
+<volume_table>
+  <volume name="GOLDENIMAGE" size="65536" base="0" />
+  <volume name="DELUGE1" size="65536"/>
+  <volume name="DELUGE2" size="65536"/>
+  <volume name="DELUGE3" size="65536"/>
+</volume_table>
\ No newline at end of file
diff --git a/apps/UDPEcho/volumes-stm25p.xml b/apps/UDPEcho/volumes-stm25p.xml
new file mode 100644
index 00000000..4210f08a
--- /dev/null
+++ b/apps/UDPEcho/volumes-stm25p.xml
@@ -0,0 +1,6 @@
+<volume_table>
+  <volume name="GOLDENIMAGE" size="65536" base="983040" />
+  <volume name="DELUGE1" size="65536"/>
+  <volume name="DELUGE2" size="65536"/>
+  <volume name="DELUGE3" size="65536"/>
+</volume_table>
\ No newline at end of file
diff --git a/apps/tests/NxFloat/.cvsignore b/apps/tests/NxFloat/.cvsignore
new file mode 100644
index 00000000..5abf7886
--- /dev/null
+++ b/apps/tests/NxFloat/.cvsignore
@@ -0,0 +1,4 @@
+TestSerialMsg.java
+TestSerialMsg.class
+TestSerial.class
+build
diff --git a/apps/tests/NxFloat/Makefile b/apps/tests/NxFloat/Makefile
new file mode 100644
index 00000000..daf594a9
--- /dev/null
+++ b/apps/tests/NxFloat/Makefile
@@ -0,0 +1,15 @@
+COMPONENT=TestSerialAppC
+BUILD_EXTRA_DEPS += TestSerial.class
+CLEAN_EXTRA = *.class TestSerialMsg.java
+
+CFLAGS += -I$(TOSDIR)/lib/T2Hack
+
+TestSerial.class: $(wildcard *.java) TestSerialMsg.java
+	javac -target 1.4 -source 1.4 *.java
+
+TestSerialMsg.java:
+	mig java -target=null $(CFLAGS) -java-classname=TestSerialMsg TestSerial.h test_serial_msg -o $@
+
+
+include $(MAKERULES)
+
diff --git a/apps/tests/NxFloat/README.txt b/apps/tests/NxFloat/README.txt
new file mode 100644
index 00000000..1b16c979
--- /dev/null
+++ b/apps/tests/NxFloat/README.txt
@@ -0,0 +1,29 @@
+README for NxFloat
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+NxFloat is a version of the TestSerial application modified to use
+floating point numbers. It tests communication over the serial port
+and nx_float support. The java application sends packets to the serial
+port at 1Hz: the packet contains an incrementing counter. When the
+mote application receives a counter packet, it displays the bottom
+three bits on its LEDs. (This application is similar to
+RadioCountToLeds, except that it operates over the serial port.)
+Likewise, the mote also sends packets to the serial port at 1Hz, these
+packets contain a sequence number multiplied by 3.2. Upon reception of
+a packet, the java application prints the counter's value to standard
+out.
+
+Java Application Usage:
+  java TestSerial [-comm <packetsource>]
+
+  If not specified, the <packetsource> defaults to sf@localhost:9002 or
+  to your MOTECOM environment variable (if defined).
+
+Tools:
+
+Known bugs/limitations:
+
+None.
+
diff --git a/apps/tests/NxFloat/TestSerial.h b/apps/tests/NxFloat/TestSerial.h
new file mode 100644
index 00000000..6e0af1a1
--- /dev/null
+++ b/apps/tests/NxFloat/TestSerial.h
@@ -0,0 +1,13 @@
+
+#ifndef TEST_SERIAL_H
+#define TEST_SERIAL_H
+
+typedef nx_struct test_serial_msg {
+  nx_float counter;
+} test_serial_msg_t;
+
+enum {
+  AM_TEST_SERIAL_MSG = 0x89,
+};
+
+#endif
diff --git a/apps/tests/NxFloat/TestSerial.java b/apps/tests/NxFloat/TestSerial.java
new file mode 100644
index 00000000..238bb013
--- /dev/null
+++ b/apps/tests/NxFloat/TestSerial.java
@@ -0,0 +1,115 @@
+/*									tab:4
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Java-side application for testing serial port communication.
+ * 
+ *
+ * @author Phil Levis <pal@cs.berkeley.edu>
+ * @date August 12 2005
+ */
+
+import java.io.IOException;
+
+import net.tinyos.message.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+public class TestSerial implements MessageListener {
+
+  private MoteIF moteIF;
+  
+  public TestSerial(MoteIF moteIF) {
+    this.moteIF = moteIF;
+    this.moteIF.registerListener(new TestSerialMsg(), this);
+  }
+
+  public void sendPackets() {
+    int counter = 0;
+    TestSerialMsg payload = new TestSerialMsg();
+    
+    try {
+      while (true) {
+	System.out.println("Sending packet " + counter);
+	payload.set_counter(counter);
+	moteIF.send(0, payload);
+	counter++;
+	try {Thread.sleep(1000);}
+	catch (InterruptedException exception) {}
+      }
+    }
+    catch (IOException exception) {
+      System.err.println("Exception thrown when sending packets. Exiting.");
+      System.err.println(exception);
+    }
+  }
+
+  public void messageReceived(int to, Message message) {
+    TestSerialMsg msg = (TestSerialMsg)message;
+    System.out.println("Received packet sequence number " + msg.get_counter());
+  }
+  
+  private static void usage() {
+    System.err.println("usage: TestSerial [-comm <source>]");
+  }
+  
+  public static void main(String[] args) throws Exception {
+    String source = null;
+    if (args.length == 2) {
+      if (!args[0].equals("-comm")) {
+	usage();
+	System.exit(1);
+      }
+      source = args[1];
+    }
+    else if (args.length != 0) {
+      usage();
+      System.exit(1);
+    }
+    
+    PhoenixSource phoenix;
+    
+    if (source == null) {
+      phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err);
+    }
+    else {
+      phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err);
+    }
+
+    MoteIF mif = new MoteIF(phoenix);
+    TestSerial serial = new TestSerial(mif);
+    serial.sendPackets();
+  }
+
+
+}
diff --git a/apps/tests/NxFloat/TestSerialAppC.nc b/apps/tests/NxFloat/TestSerialAppC.nc
new file mode 100644
index 00000000..28a76e98
--- /dev/null
+++ b/apps/tests/NxFloat/TestSerialAppC.nc
@@ -0,0 +1,78 @@
+// $Id: TestSerialAppC.nc,v 1.2 2010-06-29 22:07:20 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Application to test that the TinyOS java toolchain can communicate
+ * with motes over the serial port. The application sends packets to
+ * the serial port at 1Hz: the packet contains an incrementing
+ * counter. When the application receives a counter packet, it
+ * displays the bottom three bits on its LEDs. This application is
+ * very similar to RadioCountToLeds, except that it operates over the
+ * serial port. There is Java application for testing the mote
+ * application: run TestSerial to print out the received packets and
+ * send packets to the mote.
+ *
+ *  @author Gilman Tolle
+ *  @author Philip Levis
+ *  
+ *  @date   Aug 12 2005
+ *
+ **/
+
+#include "TestSerial.h"
+
+configuration TestSerialAppC {}
+implementation {
+  components TestSerialC as App, LedsC, MainC;
+  components SerialActiveMessageC as AM;
+  components new TimerMilliC();
+
+  App.Boot -> MainC.Boot;
+  App.Control -> AM;
+  App.Receive -> AM.Receive[AM_TEST_SERIAL_MSG];
+  App.AMSend -> AM.AMSend[AM_TEST_SERIAL_MSG];
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  App.Packet -> AM;
+}
+
+
diff --git a/apps/tests/NxFloat/TestSerialC.nc b/apps/tests/NxFloat/TestSerialC.nc
new file mode 100644
index 00000000..4da0441d
--- /dev/null
+++ b/apps/tests/NxFloat/TestSerialC.nc
@@ -0,0 +1,141 @@
+// $Id: TestSerialC.nc,v 1.2 2010-06-29 22:07:20 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Application to test that the TinyOS java toolchain can communicate
+ * with motes over the serial port. 
+ *
+ *  @author Gilman Tolle
+ *  @author Philip Levis
+ *  
+ *  @date   Aug 12 2005
+ *
+ **/
+
+#include "Timer.h"
+#include "TestSerial.h"
+
+module TestSerialC {
+  uses {
+    interface SplitControl as Control;
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface Packet;
+  }
+}
+implementation {
+
+  message_t packet;
+
+  bool locked = FALSE;
+  uint16_t counter = 0;
+  
+  event void Boot.booted() {
+    call Control.start();
+  }
+  
+  event void MilliTimer.fired() {
+    counter++;
+    if (locked) {
+      return;
+    }
+    else {
+      test_serial_msg_t* rcm = (test_serial_msg_t*)call Packet.getPayload(&packet, sizeof(test_serial_msg_t));
+      if (rcm == NULL) {return;}
+      if (call Packet.maxPayloadLength() < sizeof(test_serial_msg_t)) {
+	return;
+      }
+
+      rcm->counter = counter * 3.2;
+      if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(test_serial_msg_t)) == SUCCESS) {
+	locked = TRUE;
+      }
+    }
+  }
+
+  event message_t* Receive.receive(message_t* bufPtr, 
+				   void* payload, uint8_t len) {
+    if (len != sizeof(test_serial_msg_t)) {return bufPtr;}
+    else {
+      test_serial_msg_t* rcm = (test_serial_msg_t*)payload;
+      if ((int)rcm->counter & 0x1) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if ((int)rcm->counter & 0x2) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if ((int)rcm->counter & 0x4) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led2Off();
+      }
+      return bufPtr;
+    }
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr) {
+      locked = FALSE;
+    }
+  }
+
+  event void Control.startDone(error_t err) {
+    if (err == SUCCESS) {
+      call MilliTimer.startPeriodic(1000);
+    }
+  }
+  event void Control.stopDone(error_t err) {}
+}
+
+
+
+
diff --git a/apps/tests/RadioStress/Makefile b/apps/tests/RadioStress/Makefile
new file mode 100644
index 00000000..2d48e166
--- /dev/null
+++ b/apps/tests/RadioStress/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=RadioStressAppC
+#PFLAGS += -g
+include $(MAKERULES)
+
diff --git a/apps/tests/RadioStress/RadioStress.h b/apps/tests/RadioStress/RadioStress.h
new file mode 100644
index 00000000..ec034290
--- /dev/null
+++ b/apps/tests/RadioStress/RadioStress.h
@@ -0,0 +1,12 @@
+#ifndef RADIO_COUNT_MSG_H
+#define RADIO_COUNT_MSG_H
+
+typedef nx_struct RadioCountMsg {
+  nx_uint16_t counter;
+} RadioCountMsg;
+
+enum {
+  AM_RADIOCOUNTMSG = 6,
+};
+
+#endif
diff --git a/apps/tests/RadioStress/RadioStressAppC.nc b/apps/tests/RadioStress/RadioStressAppC.nc
new file mode 100644
index 00000000..dbf7cabe
--- /dev/null
+++ b/apps/tests/RadioStress/RadioStressAppC.nc
@@ -0,0 +1,74 @@
+// $Id: RadioStressAppC.nc,v 1.5 2010-06-29 22:07:20 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * This application sends OSKI broadcasts at 1Hz and blinks LED 0 when
+ * it receives a broadcast.
+ *
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+#include "RadioStress.h"
+
+configuration RadioStressAppC {}
+implementation {
+  components MainC, RadioStressC as App, LedsC;
+  components new AMSenderC(AM_RADIOCOUNTMSG);
+  components new AMReceiverC(AM_RADIOCOUNTMSG);
+  components new TimerMilliC();
+  components ActiveMessageC;
+  
+  
+  
+  App.Boot -> MainC.Boot;
+  
+  App.Receive -> AMReceiverC;
+  App.AMSend -> AMSenderC;
+  App.RadioControl -> ActiveMessageC;
+  App.Leds -> LedsC;
+  App.Packet -> AMSenderC;
+  App.Acks -> AMSenderC;
+  App.Timer -> TimerMilliC;
+}
+
+
diff --git a/apps/tests/RadioStress/RadioStressC.nc b/apps/tests/RadioStress/RadioStressC.nc
new file mode 100644
index 00000000..395711b5
--- /dev/null
+++ b/apps/tests/RadioStress/RadioStressC.nc
@@ -0,0 +1,161 @@
+// $Id: RadioStressC.nc,v 1.6 2010-06-29 22:07:20 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *  Implementation of the OSKI RadioCountToLeds application. This
+ *  application periodically broadcasts a 16-bit counter, and displays
+ *  broadcasts it hears on its LEDs.
+ *
+ *  @author Philip Levis
+ *  @date   June 6 2005
+ *
+ **/
+
+#include "Timer.h"
+#include "RadioStress.h"
+
+module RadioStressC {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface SplitControl as RadioControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+implementation {
+
+  message_t packet;
+
+  bool locked;
+  bool resourceHeld;
+  uint32_t txCounter = 0;
+  uint32_t ackCounter = 0;
+  uint32_t rxCounter = 0;
+  int16_t timerCounter = -1;
+  uint16_t taskCounter = 0;
+  uint16_t errorCounter = 0;
+  
+  event void Boot.booted() {
+    call Leds.led0On();
+    call RadioControl.start();
+  }
+
+  task void sendTask();
+
+  void sendPacket() {
+    RadioCountMsg* rcm = (RadioCountMsg*)call Packet.getPayload(&packet, sizeof(RadioCountMsg));
+    if (locked) {return;}
+    rcm->counter = txCounter;
+    if (call AMSend.send(AM_BROADCAST_ADDR, &packet, 2) == SUCCESS) {
+      locked = TRUE;
+    }
+    else {
+      post sendTask();
+    }
+  }
+
+  task void sendTask() {
+    taskCounter++;
+    sendPacket();
+  }
+  
+  event void RadioControl.startDone(error_t err) {
+    if (err != SUCCESS) {
+      call RadioControl.start();
+    }
+    else {
+      call Leds.led1On();
+      call Timer.startPeriodic(1000);
+      //call Acks.enable();
+    }
+  }
+
+  event void RadioControl.stopDone(error_t err) {
+
+  }
+
+
+  event message_t* Receive.receive(message_t* bufPtr, 
+				   void* payload, uint8_t len) {
+    rxCounter++;
+    if ((rxCounter % 32) == 0) {
+      call Leds.led0Toggle();
+    }
+    return bufPtr;
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    if (error != SUCCESS) {
+      errorCounter++;
+    }
+    txCounter++;
+    if (txCounter % 32 == 0) {
+      call Leds.led1Toggle();
+    }
+    if (call Acks.wasAcked(bufPtr)) {
+      ackCounter++;
+      if (ackCounter % 32 == 0) {
+	call Leds.led2Toggle();
+      }
+    }
+    locked = FALSE;
+    sendPacket();
+  }
+
+  event void Timer.fired() {
+    call Leds.led2Toggle();
+    timerCounter++;
+    if (!locked) {
+      sendPacket();
+    }
+	
+  }
+
+}
+
+
+
+
diff --git a/apps/tests/RadioStress/gdb-file b/apps/tests/RadioStress/gdb-file
new file mode 100644
index 00000000..fc9318f8
--- /dev/null
+++ b/apps/tests/RadioStress/gdb-file
@@ -0,0 +1,24 @@
+define printTxPps 
+  print RadioStressC$txCounter / RadioStressC$timerCounter 
+  end
+
+define printAckPps 
+  print RadioStressC$ackCounter / RadioStressC$timerCounter 
+  end
+
+define printAckPercent
+  print (double)RadioStressC$ackCounter / (double)RadioStressC$txCounter
+  end
+
+define printErrorRate
+  print (double)RadioStressC$errorCounter / (double)RadioStressC$txCounter
+  end
+
+define printErrorPps
+  print RadioStressC$error / RadioStressC$timerCounter 
+  end
+
+define printRxPps 
+  print RadioStressC$rxCounter / RadioStressC$timerCounter
+  end
+
diff --git a/apps/tests/TestAM/Makefile b/apps/tests/TestAM/Makefile
new file mode 100644
index 00000000..b4c988e7
--- /dev/null
+++ b/apps/tests/TestAM/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestAMAppC
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestAM/README.txt b/apps/tests/TestAM/README.txt
new file mode 100644
index 00000000..7faff847
--- /dev/null
+++ b/apps/tests/TestAM/README.txt
@@ -0,0 +1,19 @@
+README for TestAM
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+TestAM sends active message broadcasts at 1Hz and briefly flickers LED 0 
+whenever it has sucessfully sent a broadcast. Whenever it receives one of 
+these broadcasts from another node, it toggles LED 1.  It uses the radio HIL 
+component ActiveMessageC, and its packets are AM type 240.  This application 
+is useful for testing AM communication and the ActiveMessageC component.
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
+
diff --git a/apps/tests/TestAM/TestAMAppC.nc b/apps/tests/TestAM/TestAMAppC.nc
new file mode 100644
index 00000000..4e2cee7a
--- /dev/null
+++ b/apps/tests/TestAM/TestAMAppC.nc
@@ -0,0 +1,70 @@
+// $Id: TestAMAppC.nc,v 1.5 2010-06-29 22:07:20 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Configuration for the TestAM application.  TestAM sends active message 
+ * broadcasts at 1Hz and blinks LED 0 whenever it has sucessfully sent a 
+ * broadcast. Whenever it receives one of these broadcasts from another 
+ * node, it blinks LED 1.  It uses the radio HIL component <tt>ActiveMessageC</tt>, 
+ * and its packets are AM type 240.  This application is useful for testing 
+ * AM communication and the ActiveMessageC component.
+ *
+ * @author Philip Levis
+ * @date   May 16 2005
+ */
+
+configuration TestAMAppC {}
+implementation {
+  components MainC, TestAMC as App, LedsC;
+  components ActiveMessageC;
+  components new TimerMilliC();
+    
+  App.Boot -> MainC.Boot;
+
+  App.Receive -> ActiveMessageC.Receive[240];
+  App.AMSend -> ActiveMessageC.AMSend[240];
+  App.SplitControl -> ActiveMessageC;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+}
+
+
diff --git a/apps/tests/TestAM/TestAMC.nc b/apps/tests/TestAM/TestAMC.nc
new file mode 100644
index 00000000..1b5796bf
--- /dev/null
+++ b/apps/tests/TestAM/TestAMC.nc
@@ -0,0 +1,113 @@
+// $Id: TestAMC.nc,v 1.5 2010-06-29 22:07:20 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "Timer.h"
+
+/**
+ * Implementation of the TestAM application.  TestAM sends active message 
+ * broadcasts at 1Hz and blinks LED 0 whenever it has sucessfully sent a 
+ * broadcast. Whenever it receives one of these broadcasts from another 
+ * node, it blinks LED 1.  It uses the radio HIL component <tt>ActiveMessageC</tt>, 
+ * and its packets are AM type 240.  This application is useful for testing 
+ * AM communication and the ActiveMessageC component.
+ *
+ * @author Philip Levis
+ * @date   May 16 2005
+ */
+
+module TestAMC {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface SplitControl;
+  }
+}
+implementation {
+
+  message_t packet;
+
+  bool locked;
+  uint8_t counter = 0;
+  
+  event void Boot.booted() {
+    call SplitControl.start();
+  }
+  
+  event void MilliTimer.fired() {
+    counter++;
+    if (locked) {
+      return;
+     }
+    else if (call AMSend.send(AM_BROADCAST_ADDR, &packet, 0) == SUCCESS) {
+      call Leds.led0On();
+      locked = TRUE;
+    }
+  }
+
+  event message_t* Receive.receive(message_t* bufPtr, 
+				   void* payload, uint8_t len) {
+    call Leds.led1Toggle();
+    return bufPtr;
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr) {
+      locked = FALSE;
+      call Leds.led0Off();
+    }
+  }
+
+  event void SplitControl.startDone(error_t err) {
+    call MilliTimer.startPeriodic(1000);
+  }
+
+  event void SplitControl.stopDone(error_t err) {
+  }
+
+}
+
+
+
+
diff --git a/apps/tests/TestAMOnOff/Makefile b/apps/tests/TestAMOnOff/Makefile
new file mode 100644
index 00000000..3e6b2f9d
--- /dev/null
+++ b/apps/tests/TestAMOnOff/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestAMOnOffAppC
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestAMOnOff/README b/apps/tests/TestAMOnOff/README
new file mode 100644
index 00000000..1b4ddcc3
--- /dev/null
+++ b/apps/tests/TestAMOnOff/README
@@ -0,0 +1,27 @@
+TestAMOnOff
+
+This application has two different versions, slave and master. The
+version compiled is determined by a compile-time flag (SERVICE_MASTER
+or SERVICE_SLAVE). 
+
+To compile a master:
+  CFLAGS=-DSERVICE_MASTER make <platform> <other options>
+
+To compile a slave:
+  CFLAGS=-DSERVICE_SLAVE make <platform> <other options>
+
+A master is always on. A master broadcasts a packet every second. Four of
+the five packets are data packets; every fifth packet is a control packet.
+It toggles Led0 when it sends a data packet and Led1 when it sends a
+control packet.
+
+When a slave hears a data packet, it toggles Led0. When a slave
+hears a control packet, it turns off its radio for a short
+period of time. Led1 indicates whether the slave's radio is on.
+
+If you install a slave and a master, you should see the slave blink
+Led0 a few times, then when the master blinks Led1, the slave stops
+for a little while, then resumes blinking Led0.
+
+Philip Levis, 8/7/2005
+
diff --git a/apps/tests/TestAMOnOff/TestAMOnOffAppC.nc b/apps/tests/TestAMOnOff/TestAMOnOffAppC.nc
new file mode 100644
index 00000000..b94ba5dd
--- /dev/null
+++ b/apps/tests/TestAMOnOff/TestAMOnOffAppC.nc
@@ -0,0 +1,84 @@
+// $Id: TestAMOnOffAppC.nc,v 1.5 2010-06-29 22:07:20 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *  This OSKI test application tests whether OSKI can turn the active
+ *  message service on and off. It has two versions: slave and master,
+ *  which are set by a command line -D: SERVICE_SLAVE or
+ *  SERVICE_MASTER. A master is always on, and transmits data packets
+ *  at 1Hz. Every 5s, it transmits a power message. When a slave hears
+ *  a data message, it toggles its red led; when it hears a power
+ *  message, it turns off its radio, which it turns back on in a few
+ *  seconds. This essentially tests whether ActiveMessageC is turning
+ *  the radio off appropriately. It uses AM types 240 (power messages)
+ *  and 241 (data messages).
+ *
+ * @author Philip Levis
+ * @date   June 19 2005
+ */
+
+configuration TestAMOnOffAppC {}
+implementation {
+  components MainC, TestAMOnOffC as App, LedsC;
+  components new AMSenderC(240) as PowerSend;
+  components new AMReceiverC(240) as PowerReceive;
+  components new AMSenderC(241) as DataSend;
+  components new AMReceiverC(241) as DataReceive;
+  components new TimerMilliC();
+  components ActiveMessageC;
+  
+  
+  
+  App.Boot -> MainC.Boot;
+  
+  App.PowerReceive -> PowerReceive;
+  App.PowerSend -> PowerSend;
+  App.DataReceive -> DataReceive;
+  App.DataSend -> DataSend;
+
+  App.RadioControl -> ActiveMessageC;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  
+}
+
+
diff --git a/apps/tests/TestAMOnOff/TestAMOnOffC.nc b/apps/tests/TestAMOnOff/TestAMOnOffC.nc
new file mode 100644
index 00000000..b1c3686d
--- /dev/null
+++ b/apps/tests/TestAMOnOff/TestAMOnOffC.nc
@@ -0,0 +1,173 @@
+// $Id: TestAMOnOffC.nc,v 1.5 2010-06-29 22:07:20 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *  Implementation of the OSKI TestAMOnOff application. This
+ *  application has two versions: slave and master. A master is always
+ *  on, and transmits data packets at 1Hz. Every 5s, it transmits a
+ *  power message. When a slave hears a data message, it toggles its
+ *  red led; when it hears a power message, it turns off its radio,
+ *  which it turns back on in a few seconds. This essentially tests
+ *  whether ActiveMessageC is turning the radio off appropriately.
+ *
+ *  @author Philip Levis
+ *  @date   June 19 2005
+ *
+ **/
+
+#include "Timer.h"
+
+#if !(defined(SERVICE_SLAVE) || defined(SERVICE_MASTER)) || (defined(SERVICE_SLAVE) && defined(SERVICE_MASTER))
+#error "You must compile with either -DSERVICE_SLAVE or -DSERVICE_MASTER"
+#endif
+
+module TestAMOnOffC {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive as PowerReceive;
+    interface AMSend as PowerSend;
+    interface Receive as DataReceive;
+    interface AMSend as DataSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface SplitControl as RadioControl;
+  }
+}
+implementation {
+
+  message_t packet;
+
+  bool locked;
+  uint8_t counter = 0;
+  bool on = FALSE;
+  event void Boot.booted() {
+    call RadioControl.start();
+    call MilliTimer.startPeriodic(1000);
+  }
+  
+  event void MilliTimer.fired() {
+    call Leds.led2Toggle();
+    counter++;
+#ifdef SERVICE_SLAVE
+    if ((counter % 7) == 0) {
+      if (!on) {
+        call RadioControl.start();
+      }
+    }
+#endif
+#ifdef SERVICE_MASTER
+    if (locked) {
+      return;
+    }
+    if (counter % 5) {
+      if (call DataSend.send(AM_BROADCAST_ADDR, &packet, 0) == SUCCESS) {
+        call Leds.led0Toggle();
+        locked = TRUE;
+      }
+    }
+    else {
+      if (call PowerSend.send(AM_BROADCAST_ADDR, &packet, 0) == SUCCESS) {
+        call Leds.led1Toggle();
+        locked = TRUE;
+      }
+    }
+#endif
+  }
+
+  event message_t* DataReceive.receive(message_t* bufPtr, 
+	   			       void* payload, uint8_t len) {
+#ifdef SERVICE_SLAVE 
+    call Leds.led0Toggle();
+#endif
+    return bufPtr;
+  }
+
+  event message_t* PowerReceive.receive(message_t* bufPtr, 
+	   			        void* payload, uint8_t len) {
+#ifdef SERVICE_SLAVE 
+    if (on) {
+      call RadioControl.stop();
+    }
+#endif
+    return bufPtr;
+  }
+  
+  event void PowerSend.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr) {
+      locked = FALSE;
+    }
+  }
+
+  event void DataSend.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr) {
+      locked = FALSE;
+    }
+  }
+
+  event void RadioControl.startDone(error_t err) {
+    if (err != SUCCESS) {
+      call RadioControl.start();
+    }
+    else {
+      on = TRUE;
+#ifdef SERVICE_SLAVE
+    call Leds.led1On();
+#endif
+    }
+  }
+
+  event void RadioControl.stopDone(error_t err) {
+    if (err != SUCCESS) {
+      call RadioControl.stop();
+    }
+    else {
+      on = FALSE;
+#ifdef SERVICE_SLAVE
+    call Leds.led1Off();
+#endif
+    }
+  }
+}
+
+
+
+
diff --git a/apps/tests/TestAMService/Makefile b/apps/tests/TestAMService/Makefile
new file mode 100644
index 00000000..c5338ef5
--- /dev/null
+++ b/apps/tests/TestAMService/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestAMServiceAppC
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestAMService/TestAMServiceAppC.nc b/apps/tests/TestAMService/TestAMServiceAppC.nc
new file mode 100644
index 00000000..2682862f
--- /dev/null
+++ b/apps/tests/TestAMService/TestAMServiceAppC.nc
@@ -0,0 +1,74 @@
+// $Id: TestAMServiceAppC.nc,v 1.5 2010-06-29 22:07:20 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * This OSKI test application sends active message broadcasts at 1Hz
+ * and blinks LED 0 when it receives a broadcast, using active message
+ * ID 240. It is compatible with the TestAM application, but rather
+ * than use the ActiveMessageC component, it uses OSKI active message
+ * services.
+ *
+ * @author Philip Levis
+ * @date   May 16 2005
+ */
+
+configuration TestAMServiceAppC {}
+implementation {
+  components MainC, TestAMServiceC as App, LedsC;
+  components new AMSenderC(240);
+  components new AMReceiverC(240);
+  components new TimerMilliC();
+  components new AMServiceC();
+  
+  
+  
+  App.Boot -> MainC.Boot;
+  
+  App.Receive -> AMReceiverC;
+  App.AMSend -> AMSenderC;
+  App.Service -> AMServiceC;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  
+}
+
+
diff --git a/apps/tests/TestAMService/TestAMServiceC.nc b/apps/tests/TestAMService/TestAMServiceC.nc
new file mode 100644
index 00000000..6c538b72
--- /dev/null
+++ b/apps/tests/TestAMService/TestAMServiceC.nc
@@ -0,0 +1,104 @@
+// $Id: TestAMServiceC.nc,v 1.5 2010-06-29 22:07:20 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *  Implementation of the OSKI TestAMService application.
+ *
+ *  @author Philip Levis
+ *  @date   May 24 2005
+ *
+ **/
+
+#include "Timer.h"
+
+module TestAMServiceC {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface Service;
+    //interface ServiceNotify;
+  }
+}
+implementation {
+
+  message_t packet;
+
+  bool locked;
+  uint8_t counter = 0;
+  
+  event void Boot.booted() {
+    call Service.start();
+    call MilliTimer.startPeriodic(1000);
+  }
+  
+  event void MilliTimer.fired() {
+    counter++;
+    if (locked) {
+      return;
+     }
+    else if (call AMSend.send(AM_BROADCAST_ADDR, &packet, 0) == SUCCESS) {
+      call Leds.led0On();
+      locked = TRUE;
+    }
+  }
+
+  event message_t* Receive.receive(message_t* bufPtr, 
+				   void* payload, uint8_t len) {
+    call Leds.led1Toggle();
+    return bufPtr;
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr) {
+      locked = FALSE;
+      call Leds.led0Off();
+    }
+  }
+
+}
+
+
+
+
diff --git a/apps/tests/TestAdc/Makefile b/apps/tests/TestAdc/Makefile
new file mode 100644
index 00000000..644689ba
--- /dev/null
+++ b/apps/tests/TestAdc/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=TestAdcAppC
+include $(MAKERULES)
diff --git a/apps/tests/TestAdc/README.txt b/apps/tests/TestAdc/README.txt
new file mode 100644
index 00000000..41c09c9b
--- /dev/null
+++ b/apps/tests/TestAdc/README.txt
@@ -0,0 +1,18 @@
+README for TestAdc
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+TestAdc is an application for testing the ADC subsystem. It requires a generic
+platform dependent DemoSensorC, DemoSensorNowC and DemoSensorStreamC components
+that provide the following interfaces: Read<uint16_t> (DemoSensorC),
+ReadStream<uint16_t> (DemoSensorStreamC) and ReadNow<uint16_t> and Resource (DemoSensorNowC).
+It requests data via the three data collection interfaces and switches on
+leds 0, 1 and 2 when the conversion results are signalled from the ADC subsystem:
+
+ LED0 denotes a successful Read operation,
+ LED1 denotes a successful ReadNow operation,
+ LED2 denotes a successful ReadStream operation.
+
+Please refer to TEP 101 for more information on the ADC abstraction.
+
diff --git a/apps/tests/TestAdc/TestAdcAppC.nc b/apps/tests/TestAdc/TestAdcAppC.nc
new file mode 100644
index 00000000..9a146cee
--- /dev/null
+++ b/apps/tests/TestAdc/TestAdcAppC.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:22:49 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * Tests the AdcC subsystem and switches on leds 0, 1 and 2
+ * if the test is successful:
+ * LED0 denotes a successful Read operation,
+ * LED1 denotes a successful ReadNow operation,
+ * LED2 denotes a successful ReadStream operation.
+ *
+ * Requires a platform-specific DemoSensorC component that provides
+ * Read<uint16_t>, a platform-specific DemoSensorStreamC component that provides
+ * ReadStream<uint16_t> and a platform-specific DemoSensorNowC component that provides
+ * ReadNow<uint16_t> and Resource
+ *
+ * @author Jan Hauer
+ */
+configuration TestAdcAppC {
+}
+implementation
+{
+  components MainC,
+             TestAdcC,
+             new DemoSensorC() as Sensor,
+             new DemoSensorNowC() as SensorNow,
+             new DemoSensorStreamC() as SensorStream,
+             LedsC;
+
+  TestAdcC -> MainC.Boot;
+  
+  TestAdcC.Leds -> LedsC;
+  TestAdcC.Read -> Sensor;
+  TestAdcC.ReadNow -> SensorNow;
+  TestAdcC.ReadNowResource -> SensorNow;
+  TestAdcC.ReadStream -> SensorStream;
+}
+
diff --git a/apps/tests/TestAdc/TestAdcC.nc b/apps/tests/TestAdc/TestAdcC.nc
new file mode 100644
index 00000000..216cb54c
--- /dev/null
+++ b/apps/tests/TestAdc/TestAdcC.nc
@@ -0,0 +1,99 @@
+/* 
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2008-05-20 18:16:15 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * Tests the AdcC subsystem and switches on leds 0, 1 and 2.
+ * if the test is successful:
+ *   LED0 denotes a successful Read operation,
+ *   LED1 denotes a successful ReadNow operation,
+ *   LED2 denotes a successful ReadStream operation.
+ *
+ * @author Jan Hauer 
+ */
+module TestAdcC
+{
+  uses interface Read<uint16_t> as Read;
+  uses interface ReadNow<uint16_t> as ReadNow;
+  uses interface Resource as ReadNowResource;
+  uses interface ReadStream<uint16_t> as ReadStream;
+  uses interface Boot;
+  uses interface Leds;
+}
+implementation
+{
+#define BUF_SIZE 100
+  uint16_t buf[BUF_SIZE];
+  bool streamSuccess;
+  
+  event void Boot.booted()
+  {
+    streamSuccess = FALSE;
+    call Read.read();
+    call ReadStream.postBuffer(buf, BUF_SIZE);
+    call ReadStream.read(10000);
+    call ReadNowResource.request();
+  }
+  
+  event void Read.readDone(error_t result, uint16_t data)
+  {
+    if (result == SUCCESS)
+      call Leds.led0On();
+  }
+
+  event void ReadNowResource.granted()
+  {
+    call ReadNow.read();
+  }
+  
+  async event void ReadNow.readDone(error_t result, uint16_t data)
+  {
+    if (result == SUCCESS)
+      call Leds.led1On();
+    call ReadNowResource.release();
+  }
+
+  event void ReadStream.bufferDone( error_t result, 
+			 uint16_t* buffer, uint16_t count )
+  {
+    streamSuccess = TRUE;
+  }
+
+  event void ReadStream.readDone(error_t result, uint32_t actualPeriod)
+  {
+    if (result == SUCCESS && streamSuccess)
+      call Leds.led2On();
+  }
+}
+
diff --git a/apps/tests/TestAlarm/BlinkC.nc b/apps/tests/TestAlarm/BlinkC.nc
new file mode 100644
index 00000000..d28cee44
--- /dev/null
+++ b/apps/tests/TestAlarm/BlinkC.nc
@@ -0,0 +1,15 @@
+// $Id: BlinkC.nc,v 1.4 2006-12-12 18:22:49 vlahan Exp $
+
+configuration BlinkC
+{
+}
+implementation
+{
+  components MainC, BlinkM, LedsC, new AlarmMilliC() as AlarmC;
+  BlinkM.Boot -> MainC;
+  
+  MainC.SoftwareInit -> AlarmC;
+  BlinkM.Leds -> LedsC;
+  BlinkM.Alarm -> AlarmC;
+}
+
diff --git a/apps/tests/TestAlarm/BlinkM.nc b/apps/tests/TestAlarm/BlinkM.nc
new file mode 100644
index 00000000..ec416369
--- /dev/null
+++ b/apps/tests/TestAlarm/BlinkM.nc
@@ -0,0 +1,34 @@
+// $Id: BlinkM.nc,v 1.4 2006-12-12 18:22:49 vlahan Exp $
+
+#include "Timer.h"
+
+module BlinkM
+{
+  uses interface Boot;
+  uses interface Leds;
+  uses interface Alarm<TMilli,uint32_t> as Alarm;
+}
+implementation
+{
+  enum { DELAY_MILLI = 512 };
+
+  event void Boot.booted()
+  {
+    atomic
+    {
+      call Leds.led1On();
+      call Alarm.start( DELAY_MILLI );
+    }
+  }
+
+  async event void Alarm.fired()
+  {
+    atomic
+    {
+      // this usage produces a periodic alarm with no frequency skew
+      call Alarm.startAt( call Alarm.getAlarm(), DELAY_MILLI );
+      call Leds.led0Toggle();
+    }
+  }
+}
+
diff --git a/apps/tests/TestAlarm/Makefile b/apps/tests/TestAlarm/Makefile
new file mode 100644
index 00000000..57038bd6
--- /dev/null
+++ b/apps/tests/TestAlarm/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=BlinkC
+include $(MAKERULES)
+
diff --git a/apps/tests/TestBroadcast/Makefile b/apps/tests/TestBroadcast/Makefile
new file mode 100644
index 00000000..2cc4cc16
--- /dev/null
+++ b/apps/tests/TestBroadcast/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestBroadcastAppC
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestBroadcast/TestBroadcastAppC.nc b/apps/tests/TestBroadcast/TestBroadcastAppC.nc
new file mode 100644
index 00000000..5e3aa551
--- /dev/null
+++ b/apps/tests/TestBroadcast/TestBroadcastAppC.nc
@@ -0,0 +1,72 @@
+// $Id: TestBroadcastAppC.nc,v 1.5 2010-06-29 22:07:20 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * This OSKI test application sends broadcasts at 1Hz and blinks
+ * LED 0 when it receives a broadcast. It uses the OSKI broadcast
+ * service with broadcast ID 240: it does not interoperate with
+ * the TestAM or TestAMService applications.
+ *
+ * @author Philip Levis
+ * @date   May 16 2005
+ */
+
+configuration TestBroadcastAppC {}
+implementation {
+  components MainC, TestBroadcastC as App, LedsC;
+  components new BroadcastSenderC(240) as Sender;
+  components new BroadcastReceiverC(240) as Receiver;
+  components new BroadcastServiceC();
+  components new TimerMilliC();
+  
+  
+  
+  App.Boot -> MainC.Boot;
+
+  App.Receive -> Receiver;
+  App.Send -> Sender;
+  App.Service -> BroadcastServiceC.Service;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+}
+
+
diff --git a/apps/tests/TestBroadcast/TestBroadcastC.nc b/apps/tests/TestBroadcast/TestBroadcastC.nc
new file mode 100644
index 00000000..67cc9fc3
--- /dev/null
+++ b/apps/tests/TestBroadcast/TestBroadcastC.nc
@@ -0,0 +1,99 @@
+// $Id: TestBroadcastC.nc,v 1.5 2010-06-29 22:07:22 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *  Implementation of the OSKI TestBroadcast application.
+ *
+ *  @author Philip Levis
+ *  @date   May 16 2005
+ *
+ **/
+
+#include "Timer.h"
+
+module TestBroadcastC {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface Send;
+    interface Timer<TMilli> as MilliTimer;
+    interface Service;
+  }
+}
+implementation {
+
+  message_t packet;
+  bool locked;
+  
+  event void Boot.booted() {
+    call Service.start();
+    call MilliTimer.startPeriodic(1000);
+  }
+
+  event void MilliTimer.fired() {
+    if (locked) {
+      return;
+    }
+    else if (call Send.send(&packet, 6) == SUCCESS) {
+      call Leds.led0On();
+      locked = TRUE;
+    }
+  }
+  
+  event message_t* Receive.receive(message_t* bufPtr, 
+				   void* payload, uint8_t len) {
+     call Leds.led1Toggle();
+     return bufPtr;
+  }
+
+  event void Send.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr) {
+      call Leds.led0Off();
+      locked = FALSE;
+    }
+  }
+}
+
+
+
+
diff --git a/apps/tests/TestDhv/DhvInject.java b/apps/tests/TestDhv/DhvInject.java
new file mode 100644
index 00000000..5867b925
--- /dev/null
+++ b/apps/tests/TestDhv/DhvInject.java
@@ -0,0 +1,71 @@
+
+import java.io.*;
+import net.tinyos.message.*;
+import net.tinyos.util.*;
+
+public class DhvInject implements MessageListener
+{
+    MoteIF mote;
+
+    DhvInject(DhvMsg dhvmsg) {
+        mote = new MoteIF(PrintStreamMessenger.err);
+        mote.registerListener(dhvmsg, this);
+    }
+
+    public synchronized void messageReceived(int dest_addr, Message message)
+    {
+	// do nothing for now
+    }
+
+    void sendDhvDataMsg(int key, long version, short[] data) {
+	int totalsize = DhvMsg.DEFAULT_MESSAGE_SIZE +
+	    DhvDataMsg.DEFAULT_MESSAGE_SIZE +
+	    DhvData.DEFAULT_MESSAGE_SIZE;
+	DhvMsg dm = new DhvMsg(totalsize);
+	dm.set_type((short)3);
+
+	DhvDataMsg ddm = new DhvDataMsg(dm, DhvMsg.DEFAULT_MESSAGE_SIZE);
+	ddm.set_key(key);
+        ddm.set_version(version << 16);
+        ddm.set_size((short)data.length);
+
+        DhvData dd = new DhvData(ddm, DhvDataMsg.DEFAULT_MESSAGE_SIZE); 
+        dd.set_data(data);
+
+        try {
+	    mote.send(MoteIF.TOS_BCAST_ADDR, dd);
+	}
+        catch(IOException e) {
+	    System.err.println("Cannot send message");
+	}
+    }
+
+    public static void main(String args[]) {
+	int i;
+
+        System.out.println("Usage: java DhvInject [key] [version] [hex data delimit space in quotes]");
+        int k = Integer.parseInt(args[0], 16);
+        long v = Long.parseLong(args[1]);
+        String hexdata[] = args[2].split(" ");
+	short d[];
+
+        if(hexdata.length > 16) {
+            System.err.println("Data too long, keep it <= 16 bytes please");
+	}
+
+	d = new short[hexdata.length];
+        for(i = 0; i < d.length; i++)
+            d[i] = Short.parseShort(hexdata[i], 16);
+
+        System.out.println("Key: " + k);
+        System.out.println("Version: " + v);
+        System.out.print("Data: ");
+        for(i = 0; i < d.length; i++) {
+            System.out.print(d[i] + " ");
+	}
+        System.out.println();
+
+        DhvInject dhvinject = new DhvInject(new DhvMsg());
+        dhvinject.sendDhvDataMsg(k, v, d);
+    }
+}
diff --git a/apps/tests/TestDhv/Makefile b/apps/tests/TestDhv/Makefile
new file mode 100644
index 00000000..7a8241c2
--- /dev/null
+++ b/apps/tests/TestDhv/Makefile
@@ -0,0 +1,53 @@
+COMPONENT=TestDhvC
+BUILD_EXTRA_DEPS = DhvMsg.py DhvDataMsg.py DhvMsg.class DhvDataMsg.class DhvData.class DhvInject.class DhvTestMsg.class
+CFLAGS += -I$(TOSDIR)/lib/net
+#CFLAGS += -DLOW_POWER_LISTENING
+#CFLAGS += -DLPL_DEF_LOCAL_SLEEP=512
+#CFLAGS += -DLPL_DEF_RX_SLEEP=512
+#CFLAGS += -DDELAY_AFTER_RECEIVE=20
+CFLAGS += -I$(TOSDIR)/lib/net/dhv -I$(TOSDIR)/lib/net/dhv/interfaces
+#CFLAGS += -I$(TOSDIR)/lib/net/dhv -I$(TOSDIR)/lib/net/dhv/interfaces
+#CFLAGS += -I$(TOSDIR)/lib/net/drip
+
+CONSTANTS += -DTOSH_DATA_LENGTH=32
+CFLAGS += $(CONSTANTS)
+
+CLEAN_EXTRA += DhvMsg.py DhvDataMsg.py DhvData.py DhvMsg.java DhvDataMsg.java DhvData.java DhvMsg.class DhvDataMsg.class DhvData.class DhvInject.class DhvTestMsg.class DhvTestMsg.java
+
+DhvMsg.py:
+	mig python -target=$(PLATFORM) -python-classname=DhvMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_msg -o $@
+
+DhvDataMsg.py:
+	mig python -target=$(PLATFORM) -python-classname=DhvDataMsg -python-extends=DhvMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_data_msg -o $@
+
+DhvData.py:
+	mig python -target=$(PLATFORM) -python-classname=DhvData -python-extends=DhvDataMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_data -o $@
+
+DhvTestMsg.class: DhvTestMsg.java
+	javac DhvTestMsg.java
+
+DhvMsg.class: DhvMsg.java
+	javac  DhvMsg.java
+
+DhvDataMsg.class: DhvDataMsg.java
+	javac  DhvDataMsg.java
+
+DhvData.class: DhvData.java
+	javac  DhvData.java
+
+DhvTestMsg.java:
+	mig java -target=null -java-classname=DhvTestMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_test_msg -o $@
+
+DhvMsg.java:
+	mig java -target=null -java-classname=DhvMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_msg -o $@
+
+DhvDataMsg.java:
+	mig java -target=null -java-classname=DhvDataMsg -java-extends=DhvMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_data_msg -o $@
+
+DhvData.java:
+	mig java -target=null -java-classname=DhvData -java-extends=DhvDataMsg $(CFLAGS) $(TOSDIR)/lib/net/dhv/Dhv.h dhv_data -o $@
+
+DhvInject.class:
+	javac  DhvInject.java
+
+include $(MAKERULES)
diff --git a/apps/tests/TestDhv/README b/apps/tests/TestDhv/README
new file mode 100644
index 00000000..a1542d8c
--- /dev/null
+++ b/apps/tests/TestDhv/README
@@ -0,0 +1,59 @@
+
+Title: TestDhv Application
+Author: Thanh Dang, Sweungweon Park 
+adopted from TestDip
+
+1. SETTING UP THE TEST
+
+You need to first generate the code for compilation. The gentest.py
+script reads in the Master files and creates TestDhvC.nc (the
+configuration) and TestDhvP.nc (the module). It takes two parameters,
+the total number of items and the number of new items. The items that
+are random are chosen randomly.
+
+If you want 128 total items in the dissemination set, where 96 of
+those 128 items are new, you would type:
+
+python gentest.py 128 96
+
+After the configuration and module have been generated, you can use
+the normal compilation method (e.g. make telosb).
+
+2, READING THE LEDS
+
+When an node receives a new item, it toggles LED0. When a node
+completes all items, it turns all LEDs on.
+
+3. SERIAL MESSAGES
+
+typedef nx_struct dhv_test_msg_t {
+  nx_am_addr_t id;
+  nx_uint8_t count;
+  nx_uint8_t isOk;
+} dhv_test_msg_t;
+
+When a node receives a new item, it sends a dhv_test_msg_t through the
+serial interface.
+
+id is the node id
+count is how many new items it has received so far
+isOk will be true if the data value was as expected
+
+4. PACKET INJECTOR
+
+You can also use the injector to send data packets via a
+basestation. The syntax to do that is:
+
+java DhvInject [key] [version] [data in quotes delimited by space]
+
+key is the data key in hexadecimal
+version is the version number in decimal
+data is the actual data in quotes delimited by space
+
+For example, if you want to send key 10, version 2, and data "ab cd
+ef". You would type:
+
+java DipInject 0a 2 "ab cd ef"
+
+For this specific test application, your data needs to be "ef be". You
+will need a SerialForwarder running for this work.
diff --git a/apps/tests/TestDhv/TestDhv.h b/apps/tests/TestDhv/TestDhv.h
new file mode 100644
index 00000000..05535879
--- /dev/null
+++ b/apps/tests/TestDhv/TestDhv.h
@@ -0,0 +1,8 @@
+#ifndef __TESTDHV_H__
+#define __TESTDHV_H__
+
+/*enum {
+  AM_DHV_TEST_MSG = 0xAB
+};*/
+
+#endif
diff --git a/apps/tests/TestDhv/TestDhvC-Master.nc b/apps/tests/TestDhv/TestDhvC-Master.nc
new file mode 100644
index 00000000..7d2c8021
--- /dev/null
+++ b/apps/tests/TestDhv/TestDhvC-Master.nc
@@ -0,0 +1,32 @@
+#include "TestDhv.h"
+
+configuration TestDhvC {
+
+}
+
+implementation {
+  components TestDhvP;
+  components LedsC as LedsC;
+  TestDhvP.Leds -> LedsC;
+
+  components DisseminationC;
+  TestDhvP.StdControl -> DisseminationC;
+  /*
+  components new DisseminatorC(uint32_t, 0x1) as Dissem1;
+  TestDhvP.DisseminationValue1 -> Dissem1;
+  TestDhvP.DisseminationUpdate1 -> Dissem1;
+  */
+
+  // ... DISSEMINATORS
+
+  components MainC;
+  TestDhvP.Boot -> MainC;
+
+  components SerialActiveMessageC;
+  components new SerialAMSenderC(AM_DHV_TEST_MSG);
+  TestDhvP.SerialSend -> SerialAMSenderC;
+  TestDhvP.SerialControl -> SerialActiveMessageC;
+
+  components ActiveMessageC;
+  TestDhvP.AMControl -> ActiveMessageC;
+}
diff --git a/apps/tests/TestDhv/TestDhvC.nc b/apps/tests/TestDhv/TestDhvC.nc
new file mode 100644
index 00000000..44ee2bc3
--- /dev/null
+++ b/apps/tests/TestDhv/TestDhvC.nc
@@ -0,0 +1,284 @@
+#include "TestDhv.h"
+
+configuration TestDhvC {
+
+}
+
+implementation {
+  components TestDhvP;
+  components LedsC as LedsC;
+  TestDhvP.Leds -> LedsC;
+
+  components DisseminationC;
+  TestDhvP.StdControl -> DisseminationC;
+  /*
+  components new DisseminatorC(uint32_t, 0x1) as Dissem1;
+  TestDhvP.DisseminationValue1 -> Dissem1;
+  TestDhvP.DisseminationUpdate1 -> Dissem1;
+  */
+
+  components new DisseminatorC(uint16_t, 1) as Dissem1;
+  TestDhvP.DisseminationUpdate1 -> Dissem1;
+  TestDhvP.DisseminationValue1 -> Dissem1;
+
+  components new DisseminatorC(uint16_t, 2) as Dissem2;
+  TestDhvP.DisseminationUpdate2 -> Dissem2;
+  TestDhvP.DisseminationValue2 -> Dissem2;
+
+  components new DisseminatorC(uint16_t, 3) as Dissem3;
+  TestDhvP.DisseminationUpdate3 -> Dissem3;
+  TestDhvP.DisseminationValue3 -> Dissem3;
+
+  components new DisseminatorC(uint16_t, 4) as Dissem4;
+  TestDhvP.DisseminationUpdate4 -> Dissem4;
+  TestDhvP.DisseminationValue4 -> Dissem4;
+
+  components new DisseminatorC(uint16_t, 5) as Dissem5;
+  TestDhvP.DisseminationUpdate5 -> Dissem5;
+  TestDhvP.DisseminationValue5 -> Dissem5;
+
+  components new DisseminatorC(uint16_t, 6) as Dissem6;
+  TestDhvP.DisseminationUpdate6 -> Dissem6;
+  TestDhvP.DisseminationValue6 -> Dissem6;
+
+  components new DisseminatorC(uint16_t, 7) as Dissem7;
+  TestDhvP.DisseminationUpdate7 -> Dissem7;
+  TestDhvP.DisseminationValue7 -> Dissem7;
+
+  components new DisseminatorC(uint16_t, 8) as Dissem8;
+  TestDhvP.DisseminationUpdate8 -> Dissem8;
+  TestDhvP.DisseminationValue8 -> Dissem8;
+
+  components new DisseminatorC(uint16_t, 9) as Dissem9;
+  TestDhvP.DisseminationUpdate9 -> Dissem9;
+  TestDhvP.DisseminationValue9 -> Dissem9;
+
+  components new DisseminatorC(uint16_t, 10) as Dissem10;
+  TestDhvP.DisseminationUpdate10 -> Dissem10;
+  TestDhvP.DisseminationValue10 -> Dissem10;
+
+  components new DisseminatorC(uint16_t, 11) as Dissem11;
+  TestDhvP.DisseminationUpdate11 -> Dissem11;
+  TestDhvP.DisseminationValue11 -> Dissem11;
+
+  components new DisseminatorC(uint16_t, 12) as Dissem12;
+  TestDhvP.DisseminationUpdate12 -> Dissem12;
+  TestDhvP.DisseminationValue12 -> Dissem12;
+
+  components new DisseminatorC(uint16_t, 13) as Dissem13;
+  TestDhvP.DisseminationUpdate13 -> Dissem13;
+  TestDhvP.DisseminationValue13 -> Dissem13;
+
+  components new DisseminatorC(uint16_t, 14) as Dissem14;
+  TestDhvP.DisseminationUpdate14 -> Dissem14;
+  TestDhvP.DisseminationValue14 -> Dissem14;
+
+  components new DisseminatorC(uint16_t, 15) as Dissem15;
+  TestDhvP.DisseminationUpdate15 -> Dissem15;
+  TestDhvP.DisseminationValue15 -> Dissem15;
+
+  components new DisseminatorC(uint16_t, 16) as Dissem16;
+  TestDhvP.DisseminationUpdate16 -> Dissem16;
+  TestDhvP.DisseminationValue16 -> Dissem16;
+
+  components new DisseminatorC(uint16_t, 17) as Dissem17;
+  TestDhvP.DisseminationUpdate17 -> Dissem17;
+  TestDhvP.DisseminationValue17 -> Dissem17;
+
+  components new DisseminatorC(uint16_t, 18) as Dissem18;
+  TestDhvP.DisseminationUpdate18 -> Dissem18;
+  TestDhvP.DisseminationValue18 -> Dissem18;
+
+  components new DisseminatorC(uint16_t, 19) as Dissem19;
+  TestDhvP.DisseminationUpdate19 -> Dissem19;
+  TestDhvP.DisseminationValue19 -> Dissem19;
+
+  components new DisseminatorC(uint16_t, 20) as Dissem20;
+  TestDhvP.DisseminationUpdate20 -> Dissem20;
+  TestDhvP.DisseminationValue20 -> Dissem20;
+
+  components new DisseminatorC(uint16_t, 21) as Dissem21;
+  TestDhvP.DisseminationUpdate21 -> Dissem21;
+  TestDhvP.DisseminationValue21 -> Dissem21;
+
+  components new DisseminatorC(uint16_t, 22) as Dissem22;
+  TestDhvP.DisseminationUpdate22 -> Dissem22;
+  TestDhvP.DisseminationValue22 -> Dissem22;
+
+  components new DisseminatorC(uint16_t, 23) as Dissem23;
+  TestDhvP.DisseminationUpdate23 -> Dissem23;
+  TestDhvP.DisseminationValue23 -> Dissem23;
+
+  components new DisseminatorC(uint16_t, 24) as Dissem24;
+  TestDhvP.DisseminationUpdate24 -> Dissem24;
+  TestDhvP.DisseminationValue24 -> Dissem24;
+
+  components new DisseminatorC(uint16_t, 25) as Dissem25;
+  TestDhvP.DisseminationUpdate25 -> Dissem25;
+  TestDhvP.DisseminationValue25 -> Dissem25;
+
+  components new DisseminatorC(uint16_t, 26) as Dissem26;
+  TestDhvP.DisseminationUpdate26 -> Dissem26;
+  TestDhvP.DisseminationValue26 -> Dissem26;
+
+  components new DisseminatorC(uint16_t, 27) as Dissem27;
+  TestDhvP.DisseminationUpdate27 -> Dissem27;
+  TestDhvP.DisseminationValue27 -> Dissem27;
+
+  components new DisseminatorC(uint16_t, 28) as Dissem28;
+  TestDhvP.DisseminationUpdate28 -> Dissem28;
+  TestDhvP.DisseminationValue28 -> Dissem28;
+
+  components new DisseminatorC(uint16_t, 29) as Dissem29;
+  TestDhvP.DisseminationUpdate29 -> Dissem29;
+  TestDhvP.DisseminationValue29 -> Dissem29;
+
+  components new DisseminatorC(uint16_t, 30) as Dissem30;
+  TestDhvP.DisseminationUpdate30 -> Dissem30;
+  TestDhvP.DisseminationValue30 -> Dissem30;
+
+  components new DisseminatorC(uint16_t, 31) as Dissem31;
+  TestDhvP.DisseminationUpdate31 -> Dissem31;
+  TestDhvP.DisseminationValue31 -> Dissem31;
+
+  components new DisseminatorC(uint16_t, 32) as Dissem32;
+  TestDhvP.DisseminationUpdate32 -> Dissem32;
+  TestDhvP.DisseminationValue32 -> Dissem32;
+
+  components new DisseminatorC(uint16_t, 33) as Dissem33;
+  TestDhvP.DisseminationUpdate33 -> Dissem33;
+  TestDhvP.DisseminationValue33 -> Dissem33;
+
+  components new DisseminatorC(uint16_t, 34) as Dissem34;
+  TestDhvP.DisseminationUpdate34 -> Dissem34;
+  TestDhvP.DisseminationValue34 -> Dissem34;
+
+  components new DisseminatorC(uint16_t, 35) as Dissem35;
+  TestDhvP.DisseminationUpdate35 -> Dissem35;
+  TestDhvP.DisseminationValue35 -> Dissem35;
+
+  components new DisseminatorC(uint16_t, 36) as Dissem36;
+  TestDhvP.DisseminationUpdate36 -> Dissem36;
+  TestDhvP.DisseminationValue36 -> Dissem36;
+
+  components new DisseminatorC(uint16_t, 37) as Dissem37;
+  TestDhvP.DisseminationUpdate37 -> Dissem37;
+  TestDhvP.DisseminationValue37 -> Dissem37;
+
+  components new DisseminatorC(uint16_t, 38) as Dissem38;
+  TestDhvP.DisseminationUpdate38 -> Dissem38;
+  TestDhvP.DisseminationValue38 -> Dissem38;
+
+  components new DisseminatorC(uint16_t, 39) as Dissem39;
+  TestDhvP.DisseminationUpdate39 -> Dissem39;
+  TestDhvP.DisseminationValue39 -> Dissem39;
+
+  components new DisseminatorC(uint16_t, 40) as Dissem40;
+  TestDhvP.DisseminationUpdate40 -> Dissem40;
+  TestDhvP.DisseminationValue40 -> Dissem40;
+
+  components new DisseminatorC(uint16_t, 41) as Dissem41;
+  TestDhvP.DisseminationUpdate41 -> Dissem41;
+  TestDhvP.DisseminationValue41 -> Dissem41;
+
+  components new DisseminatorC(uint16_t, 42) as Dissem42;
+  TestDhvP.DisseminationUpdate42 -> Dissem42;
+  TestDhvP.DisseminationValue42 -> Dissem42;
+
+  components new DisseminatorC(uint16_t, 43) as Dissem43;
+  TestDhvP.DisseminationUpdate43 -> Dissem43;
+  TestDhvP.DisseminationValue43 -> Dissem43;
+
+  components new DisseminatorC(uint16_t, 44) as Dissem44;
+  TestDhvP.DisseminationUpdate44 -> Dissem44;
+  TestDhvP.DisseminationValue44 -> Dissem44;
+
+  components new DisseminatorC(uint16_t, 45) as Dissem45;
+  TestDhvP.DisseminationUpdate45 -> Dissem45;
+  TestDhvP.DisseminationValue45 -> Dissem45;
+
+  components new DisseminatorC(uint16_t, 46) as Dissem46;
+  TestDhvP.DisseminationUpdate46 -> Dissem46;
+  TestDhvP.DisseminationValue46 -> Dissem46;
+
+  components new DisseminatorC(uint16_t, 47) as Dissem47;
+  TestDhvP.DisseminationUpdate47 -> Dissem47;
+  TestDhvP.DisseminationValue47 -> Dissem47;
+
+  components new DisseminatorC(uint16_t, 48) as Dissem48;
+  TestDhvP.DisseminationUpdate48 -> Dissem48;
+  TestDhvP.DisseminationValue48 -> Dissem48;
+
+  components new DisseminatorC(uint16_t, 49) as Dissem49;
+  TestDhvP.DisseminationUpdate49 -> Dissem49;
+  TestDhvP.DisseminationValue49 -> Dissem49;
+
+  components new DisseminatorC(uint16_t, 50) as Dissem50;
+  TestDhvP.DisseminationUpdate50 -> Dissem50;
+  TestDhvP.DisseminationValue50 -> Dissem50;
+
+  components new DisseminatorC(uint16_t, 51) as Dissem51;
+  TestDhvP.DisseminationUpdate51 -> Dissem51;
+  TestDhvP.DisseminationValue51 -> Dissem51;
+
+  components new DisseminatorC(uint16_t, 52) as Dissem52;
+  TestDhvP.DisseminationUpdate52 -> Dissem52;
+  TestDhvP.DisseminationValue52 -> Dissem52;
+
+  components new DisseminatorC(uint16_t, 53) as Dissem53;
+  TestDhvP.DisseminationUpdate53 -> Dissem53;
+  TestDhvP.DisseminationValue53 -> Dissem53;
+
+  components new DisseminatorC(uint16_t, 54) as Dissem54;
+  TestDhvP.DisseminationUpdate54 -> Dissem54;
+  TestDhvP.DisseminationValue54 -> Dissem54;
+
+  components new DisseminatorC(uint16_t, 55) as Dissem55;
+  TestDhvP.DisseminationUpdate55 -> Dissem55;
+  TestDhvP.DisseminationValue55 -> Dissem55;
+
+  components new DisseminatorC(uint16_t, 56) as Dissem56;
+  TestDhvP.DisseminationUpdate56 -> Dissem56;
+  TestDhvP.DisseminationValue56 -> Dissem56;
+
+  components new DisseminatorC(uint16_t, 57) as Dissem57;
+  TestDhvP.DisseminationUpdate57 -> Dissem57;
+  TestDhvP.DisseminationValue57 -> Dissem57;
+
+  components new DisseminatorC(uint16_t, 58) as Dissem58;
+  TestDhvP.DisseminationUpdate58 -> Dissem58;
+  TestDhvP.DisseminationValue58 -> Dissem58;
+
+  components new DisseminatorC(uint16_t, 59) as Dissem59;
+  TestDhvP.DisseminationUpdate59 -> Dissem59;
+  TestDhvP.DisseminationValue59 -> Dissem59;
+
+  components new DisseminatorC(uint16_t, 60) as Dissem60;
+  TestDhvP.DisseminationUpdate60 -> Dissem60;
+  TestDhvP.DisseminationValue60 -> Dissem60;
+
+  components new DisseminatorC(uint16_t, 61) as Dissem61;
+  TestDhvP.DisseminationUpdate61 -> Dissem61;
+  TestDhvP.DisseminationValue61 -> Dissem61;
+
+  components new DisseminatorC(uint16_t, 62) as Dissem62;
+  TestDhvP.DisseminationUpdate62 -> Dissem62;
+  TestDhvP.DisseminationValue62 -> Dissem62;
+
+  components new DisseminatorC(uint16_t, 63) as Dissem63;
+  TestDhvP.DisseminationUpdate63 -> Dissem63;
+  TestDhvP.DisseminationValue63 -> Dissem63;
+
+  components new DisseminatorC(uint16_t, 64) as Dissem64;
+  TestDhvP.DisseminationUpdate64 -> Dissem64;
+  TestDhvP.DisseminationValue64 -> Dissem64;
+
+
+  components MainC;
+  TestDhvP.Boot -> MainC;
+
+  components SerialActiveMessageC;
+  components new SerialAMSenderC(AM_DHV_TEST_MSG);
+  TestDhvP.SerialSend -> SerialAMSenderC;
+  TestDhvP.SerialControl -> SerialActiveMessageC;
+}
diff --git a/apps/tests/TestDhv/TestDhvP-Master.nc b/apps/tests/TestDhv/TestDhvP-Master.nc
new file mode 100644
index 00000000..f19c10f4
--- /dev/null
+++ b/apps/tests/TestDhv/TestDhvP-Master.nc
@@ -0,0 +1,107 @@
+
+module TestDhvP {
+  uses interface Leds;
+  uses interface StdControl;
+
+  /*
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate1;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue1;
+  */
+
+  // ... INTERFACES
+
+  uses interface Boot;
+  uses interface AMSend as SerialSend;
+  uses interface SplitControl as SerialControl;
+  uses interface SplitControl as AMControl;
+}
+
+implementation {
+  typedef nx_struct dhv_test_msg_t {
+    nx_am_addr_t id;
+    nx_uint8_t count;
+    nx_uint8_t isOk;
+  } dhv_test_msg_t;
+
+  message_t testMsg;
+
+  uint8_t okBit = 1;
+  uint16_t data;
+  uint8_t count = 0;
+  /*
+  uint8_t newCount = N;
+  */
+  // ... NEWCOUNT
+
+  void bookkeep();
+
+  event void SerialControl.startDone(error_t err) {
+    if(err != SUCCESS){
+      call SerialControl.start();
+      return;
+    }
+    call AMControl.start();
+  }
+  
+  event void AMControl.startDone(error_t err) {
+    if(err != SUCCESS){
+      call AMControl.start();
+      return;
+    }
+    
+    call StdControl.start();
+    if(TOS_NODE_ID == 1) {
+      data = 0xBEEF;
+      dbg("TestDhvP","Updating data items\n");
+      /*
+      call DisseminationUpdate1.change(&data);
+      */
+      // ... CHANGES
+    }
+  }
+
+
+  event void SerialControl.stopDone(error_t err) { }
+  event void AMControl.stopDone(error_t err) {}
+
+  event void Boot.booted() {
+    call SerialControl.start();
+    dbg("TestDhvP", "Booted at %s\n", sim_time_string());
+  }
+  /*
+  event void DisseminationValue1.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue1.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+  */
+
+  // ... EVENTS
+
+  void bookkeep() {
+    dhv_test_msg_t* dhvTestMsgPtr;
+
+    if(count < newCount) {
+      count++;
+    }
+    dbg("TestDhvP", "Got an update, %u complete now at %s\n", count, sim_time_string());
+    call Leds.led0Toggle();
+
+    dhvTestMsgPtr = (dhv_test_msg_t*) call SerialSend.getPayload(&testMsg, 0);
+    dhvTestMsgPtr->id = TOS_NODE_ID;
+    dhvTestMsgPtr->count = count;
+    dhvTestMsgPtr->isOk = okBit;
+    call SerialSend.send(0, &testMsg, sizeof(dhv_test_msg_t));
+    
+
+    if(newCount == count) {
+      dbg("TestDhvP","Dissemination COMPLETE!\n");
+      call Leds.set(7);
+    }
+    
+  }
+
+  event void SerialSend.sendDone(message_t* message, error_t err) {
+
+  }
+}
diff --git a/apps/tests/TestDhv/TestDhvP.nc b/apps/tests/TestDhv/TestDhvP.nc
new file mode 100644
index 00000000..5c75d2f9
--- /dev/null
+++ b/apps/tests/TestDhv/TestDhvP.nc
@@ -0,0 +1,674 @@
+
+module TestDhvP {
+  uses interface Leds;
+  uses interface StdControl;
+
+  /*
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate1;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue1;
+  */
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate1;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue1;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate2;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue2;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate3;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue3;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate4;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue4;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate5;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue5;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate6;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue6;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate7;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue7;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate8;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue8;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate9;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue9;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate10;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue10;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate11;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue11;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate12;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue12;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate13;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue13;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate14;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue14;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate15;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue15;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate16;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue16;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate17;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue17;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate18;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue18;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate19;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue19;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate20;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue20;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate21;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue21;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate22;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue22;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate23;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue23;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate24;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue24;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate25;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue25;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate26;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue26;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate27;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue27;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate28;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue28;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate29;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue29;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate30;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue30;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate31;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue31;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate32;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue32;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate33;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue33;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate34;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue34;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate35;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue35;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate36;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue36;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate37;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue37;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate38;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue38;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate39;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue39;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate40;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue40;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate41;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue41;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate42;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue42;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate43;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue43;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate44;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue44;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate45;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue45;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate46;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue46;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate47;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue47;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate48;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue48;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate49;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue49;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate50;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue50;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate51;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue51;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate52;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue52;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate53;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue53;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate54;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue54;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate55;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue55;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate56;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue56;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate57;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue57;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate58;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue58;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate59;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue59;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate60;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue60;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate61;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue61;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate62;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue62;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate63;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue63;
+
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate64;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue64;
+
+
+  uses interface Boot;
+  uses interface AMSend as SerialSend;
+  uses interface SplitControl as SerialControl;
+}
+
+implementation {
+  typedef nx_struct dhv_test_msg_t {
+    nx_am_addr_t id;
+    nx_uint8_t count;
+    nx_uint8_t isOk;
+  } dhv_test_msg_t;
+
+  message_t testMsg;
+
+  uint8_t okBit = 1;
+  uint16_t data;
+  uint8_t count = 0;
+  /*
+  uint8_t newCount = N;
+  */
+  uint8_t newCount = 8;
+
+  void bookkeep();
+
+  event void SerialControl.startDone(error_t err) {
+    call StdControl.start();
+    if(TOS_NODE_ID == 1) {
+      data = 0xBEEF;
+      dbg("TestDhvP","Updating data items\n");
+      /*
+      call DisseminationUpdate1.change(&data);
+      */
+      call DisseminationUpdate18.change(&data);
+      call DisseminationUpdate61.change(&data);
+      call DisseminationUpdate21.change(&data);
+      call DisseminationUpdate53.change(&data);
+      call DisseminationUpdate17.change(&data);
+      call DisseminationUpdate19.change(&data);
+      call DisseminationUpdate11.change(&data);
+      call DisseminationUpdate36.change(&data);
+    }
+  }
+  
+  event void SerialControl.stopDone(error_t err) {
+    
+  }
+
+  event void Boot.booted() {
+    call SerialControl.start();
+    dbg("TestDhvP", "Booted at %s\n", sim_time_string());
+  }
+  /*
+  event void DisseminationValue1.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue1.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+  */
+
+  event void DisseminationValue1.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue1.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue2.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue2.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue3.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue3.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue4.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue4.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue5.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue5.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue6.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue6.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue7.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue7.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue8.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue8.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue9.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue9.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue10.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue10.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue11.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue11.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue12.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue12.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue13.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue13.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue14.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue14.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue15.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue15.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue16.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue16.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue17.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue17.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue18.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue18.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue19.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue19.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue20.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue20.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue21.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue21.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue22.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue22.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue23.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue23.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue24.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue24.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue25.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue25.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue26.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue26.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue27.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue27.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue28.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue28.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue29.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue29.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue30.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue30.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue31.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue31.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue32.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue32.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue33.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue33.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue34.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue34.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue35.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue35.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue36.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue36.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue37.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue37.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue38.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue38.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue39.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue39.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue40.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue40.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue41.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue41.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue42.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue42.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue43.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue43.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue44.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue44.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue45.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue45.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue46.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue46.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue47.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue47.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue48.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue48.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue49.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue49.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue50.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue50.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue51.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue51.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue52.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue52.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue53.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue53.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue54.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue54.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue55.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue55.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue56.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue56.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue57.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue57.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue58.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue58.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue59.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue59.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue60.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue60.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue61.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue61.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue62.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue62.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue63.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue63.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+  event void DisseminationValue64.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue64.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+
+
+  void bookkeep() {
+    dhv_test_msg_t* dhvTestMsgPtr;
+
+    if(count < newCount) {
+      count++;
+    }
+    dbg("TestDhvP", "Got an update, %u complete now at %s\n", count, sim_time_string());
+    call Leds.led0Toggle();
+
+    dhvTestMsgPtr = (dhv_test_msg_t*) call SerialSend.getPayload(&testMsg, 0);
+    dhvTestMsgPtr->id = TOS_NODE_ID;
+    dhvTestMsgPtr->count = count;
+    dhvTestMsgPtr->isOk = okBit;
+    call SerialSend.send(0, &testMsg, sizeof(dhv_test_msg_t));
+    
+
+    if(newCount == count) {
+      dbg("TestDhvP","Dissemination COMPLETE!\n");
+      call Leds.set(7);
+    }
+    
+  }
+
+  event void SerialSend.sendDone(message_t* message, error_t err) {
+
+  }
+}
diff --git a/apps/tests/TestDhv/gentest.py b/apps/tests/TestDhv/gentest.py
new file mode 100644
index 00000000..ff3e2172
--- /dev/null
+++ b/apps/tests/TestDhv/gentest.py
@@ -0,0 +1,61 @@
+#!/usr/bin/python
+
+import sys
+import re
+import os
+import random
+
+print "Usage: python gentest.py [numitems] [newitems]"
+
+items = sys.argv[1]
+newitems = sys.argv[2]
+
+print "Generating Configurations"
+
+fin = open("TestDhvC-Master.nc", "r")
+fout = open("TestDhvC.nc", "w")
+lines = fin.readlines()
+for line in lines:
+    if(line.find("... DISSEMINATORS") != -1):
+        for i in range(1, int(items)+1):
+            fout.write("  components new DisseminatorC(uint16_t, ")
+            fout.write(str(i))
+            fout.write(") as Dissem" + str(i) + ";\n")
+            fout.write("  TestDhvP.DisseminationUpdate" + str(i))
+            fout.write(" -> Dissem" + str(i) + ";\n")
+            fout.write("  TestDhvP.DisseminationValue" + str(i))
+            fout.write(" -> Dissem" + str(i) + ";\n\n")
+    else:
+        fout.write(line)
+
+fin.close()
+fout.close()
+
+print "Generating Modules"
+
+fin = open("TestDhvP-Master.nc", "r")
+fout = open("TestDhvP.nc", "w")
+lines = fin.readlines()
+for line in lines:
+    if(line.find("... INTERFACES") != -1):
+        for i in range(1, int(items)+1):
+            fout.write("  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate")
+            fout.write(str(i) + ";\n")
+            fout.write("  uses interface DisseminationValue<uint16_t> as DisseminationValue")
+            fout.write(str(i) + ";\n\n")
+    elif(line.find("... NEWCOUNT") != -1):
+        fout.write("  uint8_t newCount = " + str(newitems) + ";\n")
+    elif(line.find("... CHANGES") != -1):
+        for i in random.sample(range(1, int(items)+1), int(newitems)):
+            fout.write("      call DisseminationUpdate" + str(i) + ".change(&data);\n")
+    elif(line.find("... EVENTS") != -1):
+        for i in range(1, int(items)+1):
+            fout.write("  event void DisseminationValue" + str(i))
+            fout.write(".changed() {\n")
+            fout.write("    uint16_t val = *(uint16_t*) call DisseminationValue" + str(i) + ".get();\n")
+            fout.write("    if(val != 0xBEEF) { return; }\n")
+            fout.write("    bookkeep();\n")
+            fout.write("  }\n\n")
+    else:
+        fout.write(line)
+
diff --git a/apps/tests/TestDip/DipInject.java b/apps/tests/TestDip/DipInject.java
new file mode 100644
index 00000000..a7fffa5b
--- /dev/null
+++ b/apps/tests/TestDip/DipInject.java
@@ -0,0 +1,71 @@
+
+import java.io.*;
+import net.tinyos.message.*;
+import net.tinyos.util.*;
+
+public class DipInject implements MessageListener
+{
+    MoteIF mote;
+
+    DipInject(DipMsg dipmsg) {
+        mote = new MoteIF(PrintStreamMessenger.err);
+        mote.registerListener(dipmsg, this);
+    }
+
+    public synchronized void messageReceived(int dest_addr, Message message)
+    {
+	// do nothing for now
+    }
+
+    void sendDipDataMsg(int key, long version, short[] data) {
+	int totalsize = DipMsg.DEFAULT_MESSAGE_SIZE +
+	    DipDataMsg.DEFAULT_MESSAGE_SIZE +
+	    DipData.DEFAULT_MESSAGE_SIZE;
+	DipMsg dm = new DipMsg(totalsize);
+	dm.set_type((short)3);
+
+	DipDataMsg ddm = new DipDataMsg(dm, DipMsg.DEFAULT_MESSAGE_SIZE);
+	ddm.set_key(key);
+        ddm.set_version(version << 16);
+        ddm.set_size((short)data.length);
+
+        DipData dd = new DipData(ddm, DipDataMsg.DEFAULT_MESSAGE_SIZE); 
+        dd.set_data(data);
+
+        try {
+	    mote.send(MoteIF.TOS_BCAST_ADDR, dd);
+	}
+        catch(IOException e) {
+	    System.err.println("Cannot send message");
+	}
+    }
+
+    public static void main(String args[]) {
+	int i;
+
+        System.out.println("Usage: java DipInject [key] [version] [hex data delimit space in quotes]");
+        int k = Integer.parseInt(args[0], 16);
+        long v = Long.parseLong(args[1]);
+        String hexdata[] = args[2].split(" ");
+	short d[];
+
+        if(hexdata.length > 16) {
+            System.err.println("Data too long, keep it <= 16 bytes please");
+	}
+
+	d = new short[hexdata.length];
+        for(i = 0; i < d.length; i++)
+            d[i] = Short.parseShort(hexdata[i], 16);
+
+        System.out.println("Key: " + k);
+        System.out.println("Version: " + v);
+        System.out.print("Data: ");
+        for(i = 0; i < d.length; i++) {
+            System.out.print(d[i] + " ");
+	}
+        System.out.println();
+
+        DipInject dipinject = new DipInject(new DipMsg());
+        dipinject.sendDipDataMsg(k, v, d);
+    }
+}
\ No newline at end of file
diff --git a/apps/tests/TestDip/Makefile b/apps/tests/TestDip/Makefile
new file mode 100644
index 00000000..1576ee72
--- /dev/null
+++ b/apps/tests/TestDip/Makefile
@@ -0,0 +1,50 @@
+COMPONENT=TestDipC
+BUILD_EXTRA_DEPS = DipMsg.py DipDataMsg.py DipMsg.class DipDataMsg.class DipData.class DipInject.class
+CFLAGS += -I$(TOSDIR)/lib/net
+CFLAGS += -I$(TOSDIR)/lib/net/dip -I$(TOSDIR)/lib/net/dip/interfaces
+#CFLAGS += -I$(TOSDIR)/lib/net/drip
+
+CONSTANTS += -DTOSH_DATA_LENGTH=32
+#CONSTANTS += -DDIP_JOINTEST
+CFLAGS += $(CONSTANTS)
+
+# LPL FLAGS
+#CFLAGS += -DLOW_POWER_LISTENING
+#CFLAGS += -DLPL_DEF_LOCAL_WAKEUP=512
+#CFLAGS += -DLPL_DEF_REMOTE_WAKEUP=512
+#CFLAGS += -DDELAY_AFTER_RECEIVE=20
+
+CLEAN_EXTRA += DipMsg.py DipDataMsg.py DipData.py DipMsg.java DipDataMsg.java DipData.java DipMsg.class DipDataMsg.class DipData.class DipInject.class
+
+DipMsg.py:
+	mig python -target=$(PLATFORM) -python-classname=DipMsg $(CFLAGS) $(TOSDIR)/lib/net/dip/Dip.h dip_msg -o $@
+
+DipDataMsg.py:
+	mig python -target=$(PLATFORM) -python-classname=DipDataMsg -python-extends=DipMsg $(CFLAGS) $(TOSDIR)/lib/net/dip/Dip.h dip_data_msg -o $@
+
+DipData.py:
+	mig python -target=$(PLATFORM) -python-classname=DipData -python-extends=DipDataMsg $(CFLAGS) $(TOSDIR)/lib/net/dip/Dip.h dip_data -o $@
+
+
+DipMsg.class: DipMsg.java
+	javac -target 1.4 -source 1.4 DipMsg.java
+
+DipDataMsg.class: DipDataMsg.java
+	javac -target 1.4 -source 1.4 DipDataMsg.java
+
+DipData.class: DipData.java
+	javac -target 1.4 -source 1.4 DipData.java
+
+DipMsg.java:
+	mig java -target=$(PLATFORM) -java-classname=DipMsg $(CFLAGS) $(TOSDIR)/lib/net/dip/Dip.h dip_msg -o $@
+
+DipDataMsg.java:
+	mig java -target=$(PLATFORM) -java-classname=DipDataMsg -java-extends=DipMsg $(CFLAGS) $(TOSDIR)/lib/net/dip/Dip.h dip_data_msg -o $@
+
+DipData.java:
+	mig java -target=$(PLATFORM) -java-classname=DipData -java-extends=DipDataMsg $(CFLAGS) $(TOSDIR)/lib/net/dip/Dip.h dip_data -o $@
+
+DipInject.class:
+	javac -target 1.4 -source 1.4 DipInject.java
+
+include $(MAKERULES)
diff --git a/apps/tests/TestDip/README b/apps/tests/TestDip/README
new file mode 100644
index 00000000..d01236a6
--- /dev/null
+++ b/apps/tests/TestDip/README
@@ -0,0 +1,82 @@
+
+Title: TestDip Application
+Author: Kaisen Lin (kaisenl@cs.ucsd.edu)
+
+1. SETTING UP THE TEST
+
+You need to first generate the code for compilation. The gentest.py
+script reads in the Master files and creates TestDipC.nc (the
+configuration) and TestDipP.nc (the module). It takes two parameters,
+the total number of items and the number of new items. The items that
+are random are chosen randomly.
+
+If you want 128 total items in the dissemination set, where 96 of
+those 128 items are new, you would type:
+
+python gentest.py 128 96
+
+After the configuration and module have been generated, you can use
+the normal compilation method (e.g. make telosb).
+
+2, READING THE LEDS
+
+When an node receives a new item, it toggles LED0. When a node
+completes all items, it turns all LEDs on.
+
+3. SERIAL MESSAGES
+
+typedef nx_struct dip_test_msg_t {
+  nx_am_addr_t id;
+  nx_uint8_t count;
+  nx_uint8_t isOk;
+} dip_test_msg_t;
+
+When a node receives a new item, it sends a dip_test_msg_t through the
+serial interface.
+
+id is the node id
+count is how many new items it has received so far
+isOk will be true if the data value was as expected
+
+4. PACKET INJECTOR
+
+You can also use the injector to send data packets via a
+basestation. The syntax to do that is:
+
+java DipInject [key] [version] [data in quotes delimited by space]
+
+key is the data key in hexadecimal
+version is the version number in decimal
+data is the actual data in quotes delimited by space
+
+For example, if you want to send key 10, version 2, and data "ab cd
+ef". You would type:
+
+java DipInject 0a 2 "ab cd ef"
+
+For this specific test application, your data needs to be "ef be". You
+will need a SerialForwarder running for this work.
+
+5. TIMING
+
+With a single sender and single receiver on a table using TelosB
+nodes, it takes approximately:
+
+3.5 minutes for a node to receive 128 out of 128 items. 
+4.0 minutes for a node to receive 240 out of 240 items.
+
+With a single sender and two receivers on Mirage MicaZ nodes, it takes
+approximately:
+
+2 minutes for both nodes to receive 96 out of 96 items.
+With 128 items or more, MicaZ nodes don't receive anything. Memory limitation?
+
+6. BASESTATION
+
+If you are using the Basestation application to sniff what packets are
+being sent in the air, you will need to adjust the packet size to match
+the test application. You can add the following to your Makefile:
+
+CFLAGS += -DTOSH_DATA_LENGTH=XX
+
+where XX is your payload size
diff --git a/apps/tests/TestDip/TestDip.h b/apps/tests/TestDip/TestDip.h
new file mode 100644
index 00000000..7c7d120e
--- /dev/null
+++ b/apps/tests/TestDip/TestDip.h
@@ -0,0 +1,8 @@
+#ifndef __TESTDIP_H__
+#define __TESTDIP_H__
+
+enum {
+  AM_TESTDIP = 0xAB
+};
+
+#endif
diff --git a/apps/tests/TestDip/TestDipC-Master.nc b/apps/tests/TestDip/TestDipC-Master.nc
new file mode 100644
index 00000000..45119ee7
--- /dev/null
+++ b/apps/tests/TestDip/TestDipC-Master.nc
@@ -0,0 +1,32 @@
+#include "TestDip.h"
+
+configuration TestDipC {
+
+}
+
+implementation {
+  components TestDipP;
+  components LedsC as LedsC;
+  TestDipP.Leds -> LedsC;
+
+  components DisseminationC;
+  TestDipP.StdControl -> DisseminationC;
+  /*
+  components new DisseminatorC(uint32_t, 0x1) as Dissem1;
+  TestDipP.DisseminationValue1 -> Dissem1;
+  TestDipP.DisseminationUpdate1 -> Dissem1;
+  */
+
+  // ... DISSEMINATORS
+
+  components MainC;
+  TestDipP.Boot -> MainC;
+
+  components SerialActiveMessageC;
+  components new SerialAMSenderC(AM_TESTDIP);
+  TestDipP.SerialSend -> SerialAMSenderC;
+  TestDipP.SerialControl -> SerialActiveMessageC;
+
+  components ActiveMessageC;
+  TestDipP.AMControl -> ActiveMessageC;
+}
diff --git a/apps/tests/TestDip/TestDipP-Master.nc b/apps/tests/TestDip/TestDipP-Master.nc
new file mode 100644
index 00000000..ec3d7beb
--- /dev/null
+++ b/apps/tests/TestDip/TestDipP-Master.nc
@@ -0,0 +1,106 @@
+
+module TestDipP {
+  uses interface Leds;
+  uses interface StdControl;
+
+  /*
+  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate1;
+  uses interface DisseminationValue<uint16_t> as DisseminationValue1;
+  */
+
+  // ... INTERFACES
+
+  uses interface Boot;
+  uses interface AMSend as SerialSend;
+  uses interface SplitControl as SerialControl;
+  uses interface SplitControl as AMControl;
+}
+
+implementation {
+  typedef nx_struct dip_test_msg_t {
+    nx_am_addr_t id;
+    nx_uint8_t count;
+    nx_uint8_t isOk;
+  } dip_test_msg_t;
+
+  message_t testMsg;
+
+  uint8_t okBit = 1;
+  uint16_t data;
+  uint8_t count = 0;
+  /*
+  uint8_t newCount = N;
+  */
+  // ... NEWCOUNT
+
+  void bookkeep();
+
+  event void SerialControl.startDone(error_t err) {
+    if(err != SUCCESS) {
+      call SerialControl.start();
+      return;
+    }
+    call AMControl.start();
+  }
+
+  event void AMControl.startDone(error_t err) {
+    if(err != SUCCESS) {
+      call AMControl.start();
+      return;
+    }
+    call StdControl.start();
+    if(TOS_NODE_ID == 1) {
+      data = 0xBEEF;
+      dbg("TestDipP","Updating data items\n");
+      /*
+      call DisseminationUpdate1.change(&data);
+      */
+      // ... CHANGES
+    }
+  }
+  
+  event void SerialControl.stopDone(error_t err) { }
+  event void AMControl.stopDone(error_t err) { }
+
+  event void Boot.booted() {
+    call SerialControl.start();
+    dbg("TestDipP", "Booted at %s\n", sim_time_string());
+  }
+
+  /*
+  event void DisseminationValue1.changed() {
+    uint16_t val = *(uint16_t*) call DisseminationValue1.get();
+    if(val != 0xBEEF) { return; }
+    bookkeep();
+  }
+  */
+
+  // ... EVENTS
+
+  void bookkeep() {
+    dip_test_msg_t* dipTestMsgPtr;
+
+    if(count < newCount) {
+      count++;
+    }
+    dbg("TestDipP", "Got an update, %u complete now at %s\n", count, sim_time_string());
+    call Leds.led0Toggle();
+
+    dipTestMsgPtr = (dip_test_msg_t*) call SerialSend.getPayload(&testMsg, 0);
+    dipTestMsgPtr->id = TOS_NODE_ID;
+    dipTestMsgPtr->count = count;
+    dipTestMsgPtr->isOk = okBit;
+    call SerialSend.send(0, &testMsg, sizeof(dip_test_msg_t));
+    
+
+    if(newCount == count) {
+      dbg("TestDipP","Dissemination COMPLETE!\n");
+      call Leds.set(7);
+    }
+    
+  }
+
+  event void SerialSend.sendDone(message_t* message, error_t err) {
+
+  }
+}
diff --git a/apps/tests/TestDip/gentest.py b/apps/tests/TestDip/gentest.py
new file mode 100644
index 00000000..c586fde4
--- /dev/null
+++ b/apps/tests/TestDip/gentest.py
@@ -0,0 +1,61 @@
+#!/usr/bin/python
+
+import sys
+import re
+import os
+import random
+
+print "Usage: python gentest.py [numitems] [newitems]"
+
+items = sys.argv[1]
+newitems = sys.argv[2]
+
+print "Generating Configurations"
+
+fin = open("TestDipC-Master.nc", "r")
+fout = open("TestDipC.nc", "w")
+lines = fin.readlines()
+for line in lines:
+    if(line.find("... DISSEMINATORS") != -1):
+        for i in range(1, int(items)+1):
+            fout.write("  components new DisseminatorC(uint16_t, ")
+            fout.write(str(i))
+            fout.write(") as Dissem" + str(i) + ";\n")
+            fout.write("  TestDipP.DisseminationUpdate" + str(i))
+            fout.write(" -> Dissem" + str(i) + ";\n")
+            fout.write("  TestDipP.DisseminationValue" + str(i))
+            fout.write(" -> Dissem" + str(i) + ";\n\n")
+    else:
+        fout.write(line)
+
+fin.close()
+fout.close()
+
+print "Generating Modules"
+
+fin = open("TestDipP-Master.nc", "r")
+fout = open("TestDipP.nc", "w")
+lines = fin.readlines()
+for line in lines:
+    if(line.find("... INTERFACES") != -1):
+        for i in range(1, int(items)+1):
+            fout.write("  uses interface DisseminationUpdate<uint16_t> as DisseminationUpdate")
+            fout.write(str(i) + ";\n")
+            fout.write("  uses interface DisseminationValue<uint16_t> as DisseminationValue")
+            fout.write(str(i) + ";\n\n")
+    elif(line.find("... NEWCOUNT") != -1):
+        fout.write("  uint8_t newCount = " + str(newitems) + ";\n")
+    elif(line.find("... CHANGES") != -1):
+        for i in random.sample(range(1, int(items)+1), int(newitems)):
+            fout.write("      call DisseminationUpdate" + str(i) + ".change(&data);\n")
+    elif(line.find("... EVENTS") != -1):
+        for i in range(1, int(items)+1):
+            fout.write("  event void DisseminationValue" + str(i))
+            fout.write(".changed() {\n")
+            fout.write("    uint16_t val = *(uint16_t*) call DisseminationValue" + str(i) + ".get();\n")
+            fout.write("    if(val != 0xBEEF) { return; }\n")
+            fout.write("    bookkeep();\n")
+            fout.write("  }\n\n")
+    else:
+        fout.write(line)
+
diff --git a/apps/tests/TestDissemination/Makefile b/apps/tests/TestDissemination/Makefile
new file mode 100644
index 00000000..a2d78af8
--- /dev/null
+++ b/apps/tests/TestDissemination/Makefile
@@ -0,0 +1,13 @@
+COMPONENT=TestDisseminationAppC
+
+### For Drip:
+CFLAGS += -I$(TOSDIR)/lib/net -I%T/lib/net/drip
+
+### For DIP:
+#CFLAGS += -I$(TOSDIR)/lib/net -I%T/lib/net/dip -I%T/lib/net/dip/interfaces
+
+### For Dhv
+#CFLAGS += -I$(TOSDIR)/lib/net -I%T/lib/net/dhv -I%T/lib/net/dhv/interfaces
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestDissemination/README.txt b/apps/tests/TestDissemination/README.txt
new file mode 100644
index 00000000..2cca7c79
--- /dev/null
+++ b/apps/tests/TestDissemination/README.txt
@@ -0,0 +1,20 @@
+README for TestDisseminationAppC
+
+This application will disseminate 2 constant data objects to all nodes
+every 20 seconds. Nodes whose TOS_NODE_ID mod 4 equals 1 will act as
+disseminators, and all others will act as receivers. 
+
+Every 20 seconds:
+* The disseminator toggles its led0 and led1.
+  Sim debugging msg: Timer fired.
+
+* The disseminator sends a new 32-bit value and a new 16-bit value.
+
+* When a receiver receives the correct 32-bit value, it toggles led0.
+  Sim debugging msg: Received new correct 32-bit value
+
+* When a receiver receives the correct 16-bit value, it toggles led1.
+  Sim debugging msg: Received new correct 16-bit value
+
+Thus, in a successful test, you should see all nodes toggling both
+led0 and led1 roughly in unison.
diff --git a/apps/tests/TestDissemination/TestDisseminationAppC.nc b/apps/tests/TestDissemination/TestDisseminationAppC.nc
new file mode 100644
index 00000000..a646333b
--- /dev/null
+++ b/apps/tests/TestDissemination/TestDisseminationAppC.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * TestDisseminationAppC exercises the dissemination layer, by causing
+ * the node with ID 1 to inject 2 new values into the network every 4
+ * seconds. For the 32-bit object with key 0x1234, node 1 toggles LED
+ * 0 when it sends, and every other node toggles LED 0 when it
+ * receives the correct value. For the 16-bit object with key 0x2345,
+ * node 1 toggles LED 1 when it sends, and every other node toggles
+ * LED 1 when it receives the correct value.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @author Gilman Tolle <gtolle@archedrock.com>
+ * @version $Revision: 1.6 $ $Date: 2007-04-18 04:02:06 $
+ */
+
+configuration TestDisseminationAppC {}
+implementation {
+  components TestDisseminationC;
+
+  components MainC;
+  TestDisseminationC.Boot -> MainC;
+
+  components ActiveMessageC;
+  TestDisseminationC.RadioControl -> ActiveMessageC;
+
+  components DisseminationC;
+  TestDisseminationC.DisseminationControl -> DisseminationC;
+
+  components new DisseminatorC(uint32_t, 0x1234) as Object32C;
+  TestDisseminationC.Value32 -> Object32C;
+  TestDisseminationC.Update32 -> Object32C;
+
+  components new DisseminatorC(uint16_t, 0x2345) as Object16C;
+  TestDisseminationC.Value16 -> Object16C;
+  TestDisseminationC.Update16 -> Object16C;
+
+  components LedsC;
+  TestDisseminationC.Leds -> LedsC;
+
+  components new TimerMilliC();
+  TestDisseminationC.Timer -> TimerMilliC;
+}
+
diff --git a/apps/tests/TestDissemination/TestDisseminationC.nc b/apps/tests/TestDissemination/TestDisseminationC.nc
new file mode 100644
index 00000000..aaebda00
--- /dev/null
+++ b/apps/tests/TestDissemination/TestDisseminationC.nc
@@ -0,0 +1,137 @@
+#include <Timer.h>
+
+/*
+ * Copyright (c) 2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * TestDisseminationC exercises the dissemination layer, by causing
+ * the node with ID 1 to inject 2 new values into the network every 4
+ * seconds. For the 32-bit object with key 0x1234, node 1 toggles LED
+ * 0 when it sends, and every other node toggles LED 0 when it
+ * receives the correct value. For the 16-bit object with key 0x2345,
+ * node 1 toggles LED 1 when it sends, and every other node toggles
+ * LED 1 when it receives the correct value.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @author Gilman Tolle <gtolle@archedrock.com>
+ * @version $Revision: 1.6 $ $Date: 2007-04-18 04:02:06 $
+ */
+
+module TestDisseminationC {
+  uses interface Boot;
+
+  uses interface SplitControl as RadioControl;
+
+  uses interface StdControl as DisseminationControl;
+
+  uses interface DisseminationValue<uint32_t> as Value32;
+  uses interface DisseminationUpdate<uint32_t> as Update32;
+
+  uses interface DisseminationValue<uint16_t> as Value16;
+  uses interface DisseminationUpdate<uint16_t> as Update16;
+
+  uses interface Leds;
+
+  uses interface Timer<TMilli>;
+}
+implementation {
+  event void Boot.booted() {
+    uint32_t initialVal32 = 123456;
+    uint16_t initialVal16 = 1234;
+
+    call Value32.set( &initialVal32 ); 
+    call Value16.set( &initialVal16 ); 
+
+    call RadioControl.start();
+  }
+
+  event void RadioControl.startDone( error_t result ) {
+    
+    if ( result != SUCCESS ) {
+
+      call RadioControl.start();
+
+    } else {
+
+      call DisseminationControl.start();
+      
+      if ( TOS_NODE_ID % 4 == 1 ) {
+	call Timer.startPeriodic( 1024 * 20 );
+      } else {
+	call Timer.startPeriodic( 1024 );
+      }
+    }
+  }
+
+  event void RadioControl.stopDone( error_t result ) { }
+
+  event void Timer.fired() {
+    uint32_t newVal32 = 0xDEADBEEF;
+    uint16_t newVal16 = 0xABCD;
+
+    if ( TOS_NODE_ID % 4 == 1 ) {
+      call Leds.led0Toggle();
+      call Leds.led1Toggle();
+      call Update32.change( &newVal32 );
+      call Update16.change( &newVal16 );
+      dbg("TestDisseminationC", "TestDisseminationC: Timer fired.\n");
+    } else {
+      const uint32_t* newVal = call Value32.get();
+      if ( *newVal == 123456 ) {
+	call Leds.led2Toggle();
+      }
+    }
+  }
+
+  event void Value32.changed() {
+    const uint32_t* newVal = call Value32.get();
+    if ( *newVal == 0xDEADBEEF ) {
+      call Leds.led0Toggle();
+      dbg("TestDisseminationC", "Received new correct 32-bit value @ %s.\n", sim_time_string());
+    }
+    else {
+      dbg("TestDisseminationC", "Received new incorrect 32-bit value.\n");
+    }
+  }
+
+  event void Value16.changed() {
+    const uint16_t* newVal = call Value16.get();
+    if ( *newVal == 0xABCD ) {
+      call Leds.led1Toggle();
+      dbg("TestDisseminationC", "Received new correct 16-bit value @ %s.\n", sim_time_string());
+    }
+    else {
+      dbg("TestDisseminationC", "Received new incorrect 16-bit value: 0x%hx\n", *newVal);
+    }
+  }
+}
diff --git a/apps/tests/TestDissemination/test.py b/apps/tests/TestDissemination/test.py
new file mode 100644
index 00000000..4aa400d6
--- /dev/null
+++ b/apps/tests/TestDissemination/test.py
@@ -0,0 +1,44 @@
+# This script is a simple TOSSIM test of dissemination.
+# It builds a 15x15 grid of nodes and has nodes start
+# disseminating two values (based on the TinyOS app).
+# It prints out when nodes receive new values, including
+# the dissemination key and sequence number. You should
+# be able to see how the implementation can resolve
+# multiple concurrent changes within the network as
+# well as more than one value being updated at a time.
+
+import TOSSIM
+import sys
+
+t = TOSSIM.Tossim([])
+m = t.mac();
+r = t.radio();
+t.init()
+
+#t.addChannel("LedsC", sys.stdout);
+#t.addChannel("AM", sys.stdout);
+#t.addChannel("TestDisseminationC", sys.stdout);
+t.addChannel("Dissemination", sys.stdout)
+t.addChannel("TestDisseminationC", sys.stdout)
+#t.addChannel("Gain", sys.stdout);
+#t.addChannel("TossimPacketModelC", sys.stdout);
+
+print (dir(TOSSIM.Tossim))
+
+f = open("topo.txt", "r")
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain"):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+
+for i in range(0, 225):
+  m = t.getNode(i);
+  for j in range (0, 100):
+    m.addNoiseTraceReading(-105)
+  m.createNoiseModel()
+  m.bootAtTime((t.ticksPerSecond() / 50) * i + 43);
+ 
+while (t.time() / t.ticksPerSecond() < 600):
+  t.runNextEvent()
diff --git a/apps/tests/TestDissemination/topo.txt b/apps/tests/TestDissemination/topo.txt
new file mode 100644
index 00000000..0a236481
--- /dev/null
+++ b/apps/tests/TestDissemination/topo.txt
@@ -0,0 +1,50625 @@
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diff --git a/apps/tests/TestEui/Makefile b/apps/tests/TestEui/Makefile
new file mode 100644
index 00000000..174baa21
--- /dev/null
+++ b/apps/tests/TestEui/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestEuiAppC
+CFLAGS += -I$(TOSDIR)/lib/printf
+include $(MAKERULES)
+
diff --git a/apps/tests/TestEui/README.txt b/apps/tests/TestEui/README.txt
new file mode 100644
index 00000000..e8b5fa8b
--- /dev/null
+++ b/apps/tests/TestEui/README.txt
@@ -0,0 +1,23 @@
+$Id: README.txt,v 1.1 2008-10-31 17:01:31 sallai Exp $
+
+README for TestEui
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+The TestEui application prints out the IEEE EUI64 of the device periodically
+using printf. Currently supported platforms: iris.
+
+Tools:
+
+net.tinyos.tools.PrintfClient is a Java application that displays the output on
+the PC.
+
+Usage:
+
+java net.tinyos.tools.PrintfClient -comm serial@<serial port>:<mote>
+
+Known bugs/limitations:
+
+None.
+ 
\ No newline at end of file
diff --git a/apps/tests/TestEui/TestEuiAppC.nc b/apps/tests/TestEui/TestEuiAppC.nc
new file mode 100644
index 00000000..e7426a8b
--- /dev/null
+++ b/apps/tests/TestEui/TestEuiAppC.nc
@@ -0,0 +1,54 @@
+// $Id: TestEuiAppC.nc,v 1.2 2010-06-29 22:07:22 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */
+
+#include "printf.h"
+
+/**
+ * This application reads the 64-bit EUI of the device at initialization time
+ * and then periodically prints it out using printf.
+ *
+ */
+configuration TestEuiAppC{}
+implementation {
+  components MainC, TestEuiC, LedsC, LocalIeeeEui64C, new TimerMilliC();
+
+  MainC.Boot <- TestEuiC;
+  TestEuiC.Timer -> TimerMilliC;
+
+  TestEuiC -> LedsC.Leds;
+
+  TestEuiC.LocalIeeeEui64 -> LocalIeeeEui64C;
+}
+
diff --git a/apps/tests/TestEui/TestEuiC.nc b/apps/tests/TestEui/TestEuiC.nc
new file mode 100644
index 00000000..b707ea9f
--- /dev/null
+++ b/apps/tests/TestEui/TestEuiC.nc
@@ -0,0 +1,74 @@
+// $Id: TestEuiC.nc,v 1.2 2010-06-29 22:07:23 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */
+
+/**
+ * This application reads the 64-bit EUI of the device at initialization time
+ * and then periodically, and prints it out using printf.
+ *
+ */
+module TestEuiC
+{
+  uses interface Boot;
+  uses interface Timer<TMilli>;
+  uses interface Leds;
+  uses interface LocalIeeeEui64;
+}
+implementation
+{
+  void print() {
+  }
+
+  event void Boot.booted()  {
+    call Timer.startPeriodic(1000);
+  }
+
+  event void Timer.fired() {
+    int i;
+    ieee_eui64_t id;
+
+    call Leds.led0Toggle();
+
+    id = call LocalIeeeEui64.getId();
+
+    printf("IEEE 64-bit UID: ");
+    for(i=0;i<8;i++) {
+      printf("%d ", id.data[i]);
+    }
+    printf("\n");
+  	printfflush();
+
+  }
+}
+
diff --git a/apps/tests/TestFtsp/Ftsp/FtspDataAnalyzer.m b/apps/tests/TestFtsp/Ftsp/FtspDataAnalyzer.m
new file mode 100755
index 00000000..94dda15f
--- /dev/null
+++ b/apps/tests/TestFtsp/Ftsp/FtspDataAnalyzer.m
@@ -0,0 +1,60 @@
+%load file written out by FtspDataLogger.java class
+%arg0 - filename, e.g. '1205543689171.report'
+function FTSPDataAnalyzer(file, varargin)
+[c1 c2 c3 c4 c5]= textread(file, '%u %u %u %u %u', 'commentstyle', 'shell');
+data = [c2 c3 c4 c5]; %skipping the first column (java time)
+data1 = sortrows(sortrows(data,1),2);
+newdata = [];
+
+row=1;
+newrow=1;
+unsynced=0;
+while (row<=size(data1,1))
+
+    seqnum=data1(row,2);
+
+    data2=[];
+    row2=1;
+    tmprow1=row;
+    while (row <= size(data1,1) && data1(row,2)==seqnum)
+        if (data1(row,4)==0)
+            data2(row2,1)=data1(row,3);
+            row2= row2+ 1;
+        else
+            unsynced=unsynced+1;
+        end
+        row = row + 1;
+    end
+    
+    if (row2>1)
+        row2size=row2-1;
+        rcvdsize=row-tmprow1;
+        newdata(newrow,1) = seqnum;
+        newdata(newrow,2) = mad(data2(1:row2size,1));
+        newdata(newrow,3) = mean(data2(1:row2size,1));
+        newdata(newrow,4) = row2size/rcvdsize;
+        newrow = newrow + 1;
+    end
+end
+
+if (length(newdata)==0)
+    disp('no data found (at least one data point from a synchronized mote is required)!');
+else
+    newsize=newrow-1;
+    subplot(3,1,1);
+    plot(newdata(1:newsize,1),newdata(1:newsize,2));
+    title(sprintf('TimeSync Errors'));
+    subplot(3,1,2);
+    plot(newdata(1:newsize,1),newdata(1:newsize,3));
+    title(sprintf('Avg Glob Time'));
+    subplot(3,1,3);
+    plot(newdata(1:newsize,1),newdata(1:newsize,4),'b-');
+    title(sprintf('%% Synced Motes'));
+
+    disp(sprintf('total unsycned num %d (all %d)',unsynced,newsize));
+    disp(sprintf('avg %0.3f',mean(newdata(1:newsize,2))));
+    disp(sprintf('max %d',max(newdata(1:newsize,2))));
+    savedata = newdata(1:newsize,:);
+    save data.out savedata -ASCII;
+end
+    
\ No newline at end of file
diff --git a/apps/tests/TestFtsp/Ftsp/FtspDataLogger.java b/apps/tests/TestFtsp/Ftsp/FtspDataLogger.java
new file mode 100755
index 00000000..9b35e562
--- /dev/null
+++ b/apps/tests/TestFtsp/Ftsp/FtspDataLogger.java
@@ -0,0 +1,131 @@
+/*                  tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * @author Brano Kusy
+ */
+
+import java.io.FileOutputStream;
+import java.io.PrintStream;
+import net.tinyos.message.*;
+import net.tinyos.util.*;
+
+public class FtspDataLogger implements MessageListener {
+        public class RunWhenShuttingDown extends Thread {
+                public void run()
+                {
+                        System.out.println("Control-C caught. Shutting down...");
+                        if (outReport!=null)
+                        outReport.close();
+                }
+        }
+
+  MoteIF mote;    // For talking to the antitheft root node
+
+        void connect()
+        {
+                try {
+                        mote = new MoteIF(PrintStreamMessenger.err);
+                        mote.registerListener(new TestFtspMsg(), this);
+                        System.out.println("Connection ok!");
+                }
+                catch(Exception e) {
+                        e.printStackTrace();
+                        System.exit(2);
+                }
+        }
+        PrintStream outReport = null;
+
+        public FtspDataLogger() {
+                connect();
+                Runtime.getRuntime().addShutdownHook(new RunWhenShuttingDown());
+                String name=""+System.currentTimeMillis();
+                try
+                {
+                        outReport = new PrintStream(new FileOutputStream(name+".report"));
+                        outReport.println("#[JAVA_TIME] [NODE_ID] [SEQ_NUM] [GLOB_TIME] [IS_TIME_VALID]");
+                }
+                catch (Exception e)
+                {
+                        System.out.println("FtspDataLogger.FtspDataLogger(): "+e.toString());
+                }
+        }
+
+        public void writeReprot(TestFtspMsg tspr)
+        {
+                String foo = (System.currentTimeMillis()
+                		+" "+tspr.get_src_addr()+" "+tspr.get_counter()
+                        +" "+tspr.get_global_rx_timestamp()+" "+tspr.get_is_synced());
+                outReport.println(foo);
+                System.out.println(foo);
+                outReport.flush();
+        }
+
+        public void writeFullReprot(TestFtspMsg tspr)
+        {
+                String foo = (System.currentTimeMillis()
+                		+" "+tspr.get_src_addr()
+                        +" "+tspr.get_counter()
+                        +" "+tspr.get_local_rx_timestamp()
+                        +" "+tspr.get_global_rx_timestamp()
+                        +" "+tspr.get_skew_times_1000000()
+                        +" "+tspr.get_is_synced()
+                        +" "+tspr.get_ftsp_root_addr()
+                        +" "+tspr.get_ftsp_seq()
+                        +" "+tspr.get_ftsp_table_entries());
+                outReport.println(foo);
+                System.out.println(foo);
+                outReport.flush();
+        }
+
+        public void messageReceived(int dest_addr, Message msg)
+        {
+                if (msg instanceof TestFtspMsg)
+                        //writeFullReprot((TestFtspMsg)msg);
+                        writeReprot((TestFtspMsg)msg);
+        }
+
+        /* Just start the app... */
+        public static void main(String[] args)
+        {
+                new FtspDataLogger();
+        }
+}
\ No newline at end of file
diff --git a/apps/tests/TestFtsp/Ftsp/FtspDataLogger.py b/apps/tests/TestFtsp/Ftsp/FtspDataLogger.py
new file mode 100755
index 00000000..0c5687b4
--- /dev/null
+++ b/apps/tests/TestFtsp/Ftsp/FtspDataLogger.py
@@ -0,0 +1,33 @@
+#!/usr/bin/env python
+
+import sys, time
+import tos
+
+AM_TEST_FTSP_MSG = 137
+
+class FtspMsg(tos.Packet):
+    def __init__(self, packet = None):
+        tos.Packet.__init__(self,
+                            [('src_addr',            'int', 2),
+                             ('counter',             'int', 2),
+                             ('local_rx_timestamp',  'int', 4),
+                             ('global_rx_timestamp', 'int', 4),
+                             ('skew_times_1000000',  'int', 4),
+                             ('is_synced',           'int', 1),
+                             ('ftsp_root_addr',      'int', 2),
+                             ('ftsp_seq',            'int', 1),
+                             ('ftsp_table_entries',  'int', 2)],
+                            packet)
+
+if '-h' in sys.argv:
+    print "Usage:", sys.argv[0], "serial@/dev/ttyUSB0:57600"
+    sys.exit()
+
+am = tos.AM()
+
+while True:
+    p = am.read()
+    if p and p.type == AM_TEST_FTSP_MSG:
+        msg = FtspMsg(p.data)
+        print int(time.time()), msg.src_addr, msg.counter, msg.global_rx_timestamp, msg.is_synced
+        #print msg
diff --git a/apps/tests/TestFtsp/Ftsp/Makefile b/apps/tests/TestFtsp/Ftsp/Makefile
new file mode 100755
index 00000000..25cb7202
--- /dev/null
+++ b/apps/tests/TestFtsp/Ftsp/Makefile
@@ -0,0 +1,17 @@
+BUILD_EXTRA_DEPS = FtspDataLogger.class
+CLEAN_EXTRA = *.class TestFtspMsg.java
+
+FtspDataLogger.class: TestFtspMsg.java
+	javac *.java
+
+TestFtspMsg.java: TestFtsp.h
+	mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=TestFtspMsg TestFtsp.h test_ftsp_msg -o $@
+
+COMPONENT=TestFtspAppC
+
+PFLAGS += -DTIMESYNC_RATE=3
+#PFLAGS += -DTIMESYNC_DEBUG
+
+PFLAGS += -I$(TOSDIR)/lib/ftsp -I$(TOSDIR)/../apps/RadioCountToLeds
+
+include $(MAKERULES)
diff --git a/apps/tests/TestFtsp/Ftsp/README.MATLAB.txt b/apps/tests/TestFtsp/Ftsp/README.MATLAB.txt
new file mode 100755
index 00000000..0535549a
--- /dev/null
+++ b/apps/tests/TestFtsp/Ftsp/README.MATLAB.txt
@@ -0,0 +1,46 @@
+FtspDataAnalyzer.m
+
+-------------------------------------------------------------------------------
+Author/Contact:
+---------------
+ Brano Kusy: branislav.kusy@gmail.com
+
+-------------------------------------------------------------------------------
+DESCRIPTION:
+------------
+
+FtspDataAnalyzer.m works with data logs collected by FtspDataLogger.java and
+calculates the maximum and average timesync error over time.
+
+-------------------------------------------------------------------------------
+STEP BY STEP GUIDE TO RUN OUR TEST SCENARIO:
+--------------------------------------------
+1. program and start motes as described in ./README.txt
+2. start SerialForwarder and FtspDataLogger.java as described in ./README.txt
+3. 'current_time.report' file (where current_time is a number) is created in ./
+   this file is updated with data in the real time
+4. let the experiment run for some time
+5. start matlab and enter (assuming your current_time was 1206126224593)
+    FTSPDataAnalyzer('1206126224593.report')
+    this will plot the mean absolute timesync error, global time, and number of
+    synced motes; this can be done while experiment is running
+6. Matlab also creates data.out file which contains data in the following format
+    #seqNum mean_abs_error global_time num_synced_motes
+    mean_abs_error is calculated as mean absolute deviation from the mean (mad)
+
+Simulating multi-hop:
+1. define TIMESYNC_DEBUG in the Makefile
+2. recompile and upload TestFTSP app to n motes with special NODE_IDs:
+     using 'make micaz reinstall.0xAB', nodes 0xAB and 0xCD can communicate
+     iff 2D grid coordinates (A,B) and (C,D) are neighbors in a 2D grid
+ 
+-------------------------------------------------------------------------------
+EVALUATION:
+--------------------------------------------
+ - deployment setup: 11 nodes in a 5x3 grid using simulated multi-hop (4 points
+   were vacant as we only used 11 nodes). the max number of hops was 5.
+ - parameters: sync period 10sec, polling period 3 sec
+ - experiment length: 100 minutes
+ - results (1 jiffy is ~30.5 us)
+    1.53 jiffy avg error (~50us)
+    3.5 jiffy max error (~100us)
\ No newline at end of file
diff --git a/apps/tests/TestFtsp/Ftsp/README.txt b/apps/tests/TestFtsp/Ftsp/README.txt
new file mode 100755
index 00000000..b011bc39
--- /dev/null
+++ b/apps/tests/TestFtsp/Ftsp/README.txt
@@ -0,0 +1,93 @@
+TestFtsp
+
+-------------------------------------------------------------------------------
+Author/Contact:
+---------------
+ Brano Kusy: branislav.kusy@gmail.com
+ Janos Sallai: janos.sallai@vanderbilt.edu
+ Miklos Maroti: mmaroti@gmail.com
+
+-------------------------------------------------------------------------------
+DESCRIPTION:
+------------
+ The TestFtsp application tests the Flooding Time Synchronization Protocol
+ (FTSP) implementation. A network of motes programmed with TestFtsp run the
+ FTSP protocol to time synchronize, and sends to the base station the global
+ reception timestamps of messages broadcast by a dedicated beacon mote
+ programmed with RadioCountToLeds. Ideally, the global reception timestamps of
+ the same RadioCountToLeds message should agree for all TestFtsp motes (with a
+ small synchronization error).
+
+-------------------------------------------------------------------------------
+SUPPORTED PLATFORMS:
+--------------------------------------------
+ The supported platforms are micaz, telosb and iris.
+
+-------------------------------------------------------------------------------
+STEP BY STEP GUIDE TO RUN OUR TEST SCENARIO:
+--------------------------------------------
+ - program one mote with apps/RadioCountToLeds
+ - program multiple motes with TestFtsp
+ - program a mote with apps/BaseStation, leave it on the programming board
+ - turn on all the motes
+ - start the FtspDataLogger java application (type "java FtspDataLogger")
+
+-------------------------------------------------------------------------------
+REPORTED DATA:
+--------------
+ The most important reported data is the global time of arrival of the beacons.
+ The beacon msg arrives to all clients at the same time instant, thus reported
+ global times should be the same for all clients for the same sequence number.
+
+ Each message contains:
+ - the time of message reception by the java app [JAVA_TIME]
+ - the node ID of the mote that is sending this report [NODE_ID]
+ - the  sequence number of the RadioCountToLeds message that is increased
+   for each new polling msg [SEQ_NUM]
+ - the global time when the polling message arrived [GLOB_TIME]
+ - a result_t value indicating if the timestamp is valid [IS_TIME_VALID]
+   (a result_t of 0 denotes a valid timestamp)
+
+If the application is running correctly, then the output should show
+reports from the different FTSP nodes with valid timestamps and similar
+global time values. For example, this is a trace with two FTSP nodes,
+with IDs 1 and 5:
+
+1214516486569 1 10916 433709 0
+1214516486569 5 10916 433709 0
+1214516486809 5 10917 433964 0
+1214516486809 1 10917 433963 0
+1214516487045 5 10918 434210 0
+1214516487053 1 10918 434210 0
+1214516487285 1 10919 434454 0
+1214516487293 5 10919 434455 0
+
+One way to test if FTSP is operating correctly is to turn off one of
+the FTSP nodes. For a short time, that node's global times will differ
+significantly and its valid flag will not be 0. For example, this
+is what it looks like when node 1 in the earlier trace is reset:
+
+1214516490953 5 10934 438208 0
+1214516491201 5 10935 438460 0
+1214516491441 5 10936 438712 0
+1214516491685 5 10937 438964 0
+1214516492169 5 10939 439455 0
+1214516492417 1 10940 243 1
+1214516492421 5 10940 439706 0
+1214516492665 5 10941 439960 0
+1214516492669 1 10941 497 1
+1214516492905 5 10942 440213 0
+...
+1214516497541 1 10961 5495 1
+1214516497549 5 10961 444958 0
+1214516497793 1 10962 5747 1
+1214516498025 1 10963 445456 0
+1214516498033 5 10963 445455 0
+1214516498277 5 10964 445705 0
+1214516498285 1 10964 445707 0
+1214516498521 1 10965 445964 0
+
+This output is also saved in a file named 'current_timestamp.report'.
+'.report' files can be used with the FtspDataAnalyzer.m Matlab
+application. Mean absolute timesync error, global time, and % of
+synced motes will be plotted.
diff --git a/apps/tests/TestFtsp/Ftsp/TestFtsp.h b/apps/tests/TestFtsp/Ftsp/TestFtsp.h
new file mode 100755
index 00000000..72f1c27e
--- /dev/null
+++ b/apps/tests/TestFtsp/Ftsp/TestFtsp.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu)
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ */
+
+#ifndef TEST_FTSP_H
+#define TEST_FTSP_H
+
+typedef nx_struct test_ftsp_msg
+{
+  nx_uint16_t    src_addr;
+  nx_uint16_t    counter;
+  nx_uint32_t    local_rx_timestamp;
+  nx_uint32_t    global_rx_timestamp;
+  nx_int32_t     skew_times_1000000;
+  nx_uint8_t     is_synced;
+  nx_uint16_t    ftsp_root_addr;
+  nx_uint8_t     ftsp_seq;
+  nx_uint8_t     ftsp_table_entries;
+} test_ftsp_msg_t;
+
+enum
+{
+	AM_TEST_FTSP_MSG = 137
+};
+
+#endif
diff --git a/apps/tests/TestFtsp/Ftsp/TestFtspAppC.nc b/apps/tests/TestFtsp/Ftsp/TestFtspAppC.nc
new file mode 100755
index 00000000..080e48be
--- /dev/null
+++ b/apps/tests/TestFtsp/Ftsp/TestFtspAppC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu)
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ */
+
+#include "TestFtsp.h"
+#include "RadioCountToLeds.h"
+
+configuration TestFtspAppC {
+}
+
+implementation {
+  components MainC, TimeSyncC;
+
+  MainC.SoftwareInit -> TimeSyncC;
+  TimeSyncC.Boot -> MainC;
+
+  components TestFtspC as App;
+  App.Boot -> MainC;
+
+  components ActiveMessageC;
+  App.RadioControl -> ActiveMessageC;
+  App.Receive -> ActiveMessageC.Receive[AM_RADIO_COUNT_MSG];
+  App.AMSend -> ActiveMessageC.AMSend[AM_TEST_FTSP_MSG];
+  App.Packet -> ActiveMessageC;
+  App.PacketTimeStamp -> ActiveMessageC;
+
+  components LedsC;
+
+  App.GlobalTime -> TimeSyncC;
+  App.TimeSyncInfo -> TimeSyncC;
+  App.Leds -> LedsC;
+
+}
diff --git a/apps/tests/TestFtsp/Ftsp/TestFtspC.nc b/apps/tests/TestFtsp/Ftsp/TestFtspC.nc
new file mode 100755
index 00000000..43caa563
--- /dev/null
+++ b/apps/tests/TestFtsp/Ftsp/TestFtspC.nc
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu)
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ */
+
+#include "TestFtsp.h"
+#include "RadioCountToLeds.h"
+
+module TestFtspC
+{
+    uses
+    {
+        interface GlobalTime<TMilli>;
+        interface TimeSyncInfo;
+        interface Receive;
+        interface AMSend;
+        interface Packet;
+        interface Leds;
+        interface PacketTimeStamp<TMilli,uint32_t>;
+        interface Boot;
+        interface SplitControl as RadioControl;
+    }
+}
+
+implementation
+{
+    message_t msg;
+    bool locked = FALSE;
+
+    event void Boot.booted() {
+        call RadioControl.start();
+    }
+
+    event message_t* Receive.receive(message_t* msgPtr, void* payload, uint8_t len)
+    {
+        call Leds.led0Toggle();
+        if (!locked && call PacketTimeStamp.isValid(msgPtr)) {
+            radio_count_msg_t* rcm = (radio_count_msg_t*)call Packet.getPayload(msgPtr, sizeof(radio_count_msg_t));
+            test_ftsp_msg_t* report = (test_ftsp_msg_t*)call Packet.getPayload(&msg, sizeof(test_ftsp_msg_t));
+
+            uint32_t rxTimestamp = call PacketTimeStamp.timestamp(msgPtr);
+
+            report->src_addr = TOS_NODE_ID;
+            report->counter = rcm->counter;
+            report->local_rx_timestamp = rxTimestamp;
+            report->is_synced = call GlobalTime.local2Global(&rxTimestamp);
+            report->global_rx_timestamp = rxTimestamp;
+            report->skew_times_1000000 = (uint32_t)call TimeSyncInfo.getSkew()*1000000UL;
+            report->ftsp_root_addr = call TimeSyncInfo.getRootID();
+            report->ftsp_seq = call TimeSyncInfo.getSeqNum();
+            report->ftsp_table_entries = call TimeSyncInfo.getNumEntries();
+
+            if (call AMSend.send(AM_BROADCAST_ADDR, &msg, sizeof(test_ftsp_msg_t)) == SUCCESS) {
+              locked = TRUE;
+            }
+        }
+
+        return msgPtr;
+    }
+
+    event void AMSend.sendDone(message_t* ptr, error_t success) {
+        locked = FALSE;
+        return;
+    }
+
+    event void RadioControl.startDone(error_t err) {}
+    event void RadioControl.stopDone(error_t error){}
+}
diff --git a/apps/tests/TestFtsp/FtspLpl/FtspDataLogger.py b/apps/tests/TestFtsp/FtspLpl/FtspDataLogger.py
new file mode 100755
index 00000000..0c5687b4
--- /dev/null
+++ b/apps/tests/TestFtsp/FtspLpl/FtspDataLogger.py
@@ -0,0 +1,33 @@
+#!/usr/bin/env python
+
+import sys, time
+import tos
+
+AM_TEST_FTSP_MSG = 137
+
+class FtspMsg(tos.Packet):
+    def __init__(self, packet = None):
+        tos.Packet.__init__(self,
+                            [('src_addr',            'int', 2),
+                             ('counter',             'int', 2),
+                             ('local_rx_timestamp',  'int', 4),
+                             ('global_rx_timestamp', 'int', 4),
+                             ('skew_times_1000000',  'int', 4),
+                             ('is_synced',           'int', 1),
+                             ('ftsp_root_addr',      'int', 2),
+                             ('ftsp_seq',            'int', 1),
+                             ('ftsp_table_entries',  'int', 2)],
+                            packet)
+
+if '-h' in sys.argv:
+    print "Usage:", sys.argv[0], "serial@/dev/ttyUSB0:57600"
+    sys.exit()
+
+am = tos.AM()
+
+while True:
+    p = am.read()
+    if p and p.type == AM_TEST_FTSP_MSG:
+        msg = FtspMsg(p.data)
+        print int(time.time()), msg.src_addr, msg.counter, msg.global_rx_timestamp, msg.is_synced
+        #print msg
diff --git a/apps/tests/TestFtsp/FtspLpl/Makefile b/apps/tests/TestFtsp/FtspLpl/Makefile
new file mode 100755
index 00000000..99629881
--- /dev/null
+++ b/apps/tests/TestFtsp/FtspLpl/Makefile
@@ -0,0 +1,16 @@
+SENSORBOARD=quantoplus
+
+COMPONENT=TestFtspAppC
+
+PFLAGS += -DTIMESYNC_RATE=10
+#PFLAGS += -DTIMESYNC_DEBUG
+#PFLAGS += -DCC2420_CHANNEL=26
+CFLAGS += -DTOSH_DATA_LENGTH=50
+#CFLAGS += -DCOUNT_LOG
+
+PFLAGS += -I$(TOSDIR)/lib/ftsp -I$(TOSDIR)/../apps/RadioCountToLeds -I$(TOSDIR)/lib/printf
+
+CFLAGS += -DLPL_INTERVAL=200
+CFLAGS += -DLOW_POWER_LISTENING
+
+include $(MAKERULES)
diff --git a/apps/tests/TestFtsp/FtspLpl/README b/apps/tests/TestFtsp/FtspLpl/README
new file mode 100755
index 00000000..24c080c7
--- /dev/null
+++ b/apps/tests/TestFtsp/FtspLpl/README
@@ -0,0 +1,31 @@
+First, program several nodes with this TestFtsp application. In addition,
+you will need one TinyOS Basestation that listens for messages, and one
+beacon node. Program the beacon node with the RadioCountToLed application
+from the TestFtsp32kLplBeaconer directory. This is a special modification of
+the RadioCountToLed code which allows to evaluate a duty-cycled ftsp
+network. The regular RadioCountToLed code doesn't work, since a LPL
+broadcast message gets transmitted more than just once. Thus, there is a
+disambiguity in which precise broadcast message was actually timestamped by
+the TestFtsp application. The modifications take care of this by using the
+TimeSyncAMSend interface and setting an arbitrary event time. Thus, on
+reception, the TestFtsp code can account for this delayed send.
+
+To evaluate the synchronization precision, use the FtspDataLogger.py
+application. First, you will need a serial forwarder that connects to the
+BaseStation node. Then, run the python application like this:
+python FtspDataLogger.py sf@localhost:9002
+
+You should now see messages coming in, one per line. The first value is the
+current time as a unix timestamp. The last line is a binary value indicating
+if there was some missed data, and thus the values are not good (indicated
+by a 1), or if all the nodes are synchronized and we received a value for
+each and every one of them (indicated by a 0).
+
+Note!!!!!
+- the basestation should also define
+    CFLAGS += -DTOSH_DATA_LENGTH=50
+    in the makefile. Else, the reports will not fit into 1 tinyos message, and
+    they will get silently dropped.
+- 32k timesync only works for certain platforms (those that provide 32khz
+    counter), if your platform does not support the counter, LPL still works,
+    but you need to use TMilli timesync
diff --git a/apps/tests/TestFtsp/FtspLpl/TestFtsp.h b/apps/tests/TestFtsp/FtspLpl/TestFtsp.h
new file mode 100755
index 00000000..a59e12fe
--- /dev/null
+++ b/apps/tests/TestFtsp/FtspLpl/TestFtsp.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu)
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ */
+
+#ifndef TEST_FTSP_H
+#define TEST_FTSP_H
+
+typedef nx_struct test_ftsp_msg
+{
+  nx_uint16_t    src_addr;
+  nx_uint16_t    counter;
+  nx_uint32_t    local_rx_timestamp;
+  nx_uint32_t    global_rx_timestamp;
+  nx_int32_t     skew_times_1000000;
+  nx_float       skew;
+  nx_uint8_t     is_synced;
+  nx_uint16_t    ftsp_root_addr;
+  nx_uint8_t     ftsp_seq;
+  nx_uint8_t     ftsp_table_entries;
+  nx_uint32_t    localAverage;
+  nx_int32_t     offsetAverage;
+} test_ftsp_msg_t;
+
+enum
+{
+	AM_TEST_FTSP_MSG = 137
+};
+
+#endif
diff --git a/apps/tests/TestFtsp/FtspLpl/TestFtspAppC.nc b/apps/tests/TestFtsp/FtspLpl/TestFtspAppC.nc
new file mode 100755
index 00000000..8788bf72
--- /dev/null
+++ b/apps/tests/TestFtsp/FtspLpl/TestFtspAppC.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu)
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ * Adapted for LPL: 6/16/09 by Thomas Schmid (thomas.schmid@ucla.edu)
+ */
+
+#include "TestFtsp.h"
+#include "RadioCountToLeds.h"
+
+configuration TestFtspAppC {
+}
+
+implementation {
+  components MainC, TestFtspC as App;
+  App.Boot -> MainC;
+
+  components ActiveMessageC;
+  components TimeSyncMessageC;
+  App.RadioControl -> ActiveMessageC;
+  App.Receive -> TimeSyncMessageC.Receive[AM_RADIO_COUNT_MSG];
+  App.TimeSyncPacket -> TimeSyncMessageC;
+  App.AMSend -> ActiveMessageC.AMSend[AM_TEST_FTSP_MSG];
+  App.Packet -> ActiveMessageC;
+  App.PacketTimeStamp -> ActiveMessageC;
+  App.LowPowerListening -> ActiveMessageC;
+
+
+  components RandomC;
+  App.Random -> RandomC;
+
+  components new TimerMilliC() as Timer0;
+  App.RandomTimer -> Timer0;
+
+  components LedsC;
+
+#if defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB)
+  components TimeSync32kC;
+  MainC.SoftwareInit -> TimeSync32kC;
+  TimeSync32kC.Boot -> MainC;
+  App.GlobalTime -> TimeSync32kC;
+  App.TimeSyncInfo -> TimeSync32kC;
+#else
+#error "LPL timesync is not available for your platform"
+#endif
+  App.Leds -> LedsC;
+  
+}
diff --git a/apps/tests/TestFtsp/FtspLpl/TestFtspC.nc b/apps/tests/TestFtsp/FtspLpl/TestFtspC.nc
new file mode 100755
index 00000000..e1f74767
--- /dev/null
+++ b/apps/tests/TestFtsp/FtspLpl/TestFtspC.nc
@@ -0,0 +1,131 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu)
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ * Ported for LPL: Thomas Schmid (thomas.schmid@ucla.edu)
+ */
+
+#include "TestFtsp.h"
+#include "RadioCountToLeds.h"
+
+module TestFtspC
+{
+    uses
+    {
+        interface GlobalTime<T32khz>;
+        interface TimeSyncInfo;
+        interface Receive;
+        interface AMSend;
+        interface Packet;
+        interface Leds;
+        interface PacketTimeStamp<T32khz,uint32_t>;
+        interface Boot;
+        interface SplitControl as RadioControl;
+        interface Timer<TMilli> as RandomTimer;
+        interface Random;
+
+        interface TimeSyncPacket<T32khz,uint32_t>;
+
+        interface LowPowerListening;
+
+    }
+}
+
+implementation
+{
+    enum {
+        ACT_TESTFTSP = 0x11,
+    };
+
+    message_t msg;
+    bool locked = FALSE;
+    test_ftsp_msg_t* report;
+
+    event void Boot.booted() {
+        call RadioControl.start();
+    }
+
+    event message_t* Receive.receive(message_t* msgPtr, void* payload, uint8_t len)
+    {
+        if (!(call PacketTimeStamp.isValid(msgPtr))){
+            call Leds.led1Toggle();
+        }
+        if (!locked && call PacketTimeStamp.isValid(msgPtr)) {
+            radio_count_msg_t* rcm = (radio_count_msg_t*)call Packet.getPayload(msgPtr, sizeof(radio_count_msg_t));
+            if(call TimeSyncPacket.isValid(msgPtr)) {
+                uint32_t rxTimestamp = call TimeSyncPacket.eventTime(msgPtr);
+                report = (test_ftsp_msg_t*)call Packet.getPayload(&msg, sizeof(test_ftsp_msg_t));
+
+                report->src_addr = TOS_NODE_ID;
+                report->counter = rcm->counter;
+                report->local_rx_timestamp = rxTimestamp;
+                report->is_synced = call GlobalTime.local2Global(&rxTimestamp);
+                report->global_rx_timestamp = rxTimestamp;
+                report->skew_times_1000000 = (uint32_t)call TimeSyncInfo.getSkew()*1000000UL;
+                report->skew = call TimeSyncInfo.getSkew();
+                report->ftsp_root_addr = call TimeSyncInfo.getRootID();
+                report->ftsp_seq = call TimeSyncInfo.getSeqNum();
+                report->ftsp_table_entries = call TimeSyncInfo.getNumEntries();
+                report->localAverage = call TimeSyncInfo.getSyncPoint();
+                report->offsetAverage = call TimeSyncInfo.getOffset();
+
+                locked = TRUE;
+                call RandomTimer.startOneShot(call Random.rand16() % (64));
+            }
+        }
+
+        return msgPtr;
+    }
+
+    event void RandomTimer.fired()
+    {
+#ifdef LOW_POWER_LISTENING
+        call LowPowerListening.setRemoteWakeupInterval(&msg, LPL_INTERVAL);
+#endif
+        if(locked && (call AMSend.send(4000, &msg, sizeof(test_ftsp_msg_t)) == SUCCESS)){
+            call Leds.led2On();
+        } else {
+            locked = FALSE;
+        }
+    }
+
+    event void AMSend.sendDone(message_t* ptr, error_t success) {
+        locked = FALSE;
+        call Leds.led2Off();
+        return;
+    }
+
+    event void RadioControl.startDone(error_t err) {
+        call LowPowerListening.setLocalWakeupInterval(LPL_INTERVAL);
+    }
+    event void RadioControl.stopDone(error_t error){}
+}
diff --git a/apps/tests/TestFtsp/FtspLpl/TestFtspMsg.py b/apps/tests/TestFtsp/FtspLpl/TestFtspMsg.py
new file mode 100755
index 00000000..0223c4d3
--- /dev/null
+++ b/apps/tests/TestFtsp/FtspLpl/TestFtspMsg.py
@@ -0,0 +1,744 @@
+#
+# This class is automatically generated by mig. DO NOT EDIT THIS FILE.
+# This class implements a Python interface to the 'TestFtspMsg'
+# message type.
+#
+
+import tinyos.message.Message
+
+# The default size of this message type in bytes.
+DEFAULT_MESSAGE_SIZE = 33
+
+# The Active Message type associated with this message.
+AM_TYPE = 137
+
+class TestFtspMsg(tinyos.message.Message.Message):
+    # Create a new TestFtspMsg of size 33.
+    def __init__(self, data="", addr=None, gid=None, base_offset=0, data_length=33):
+        tinyos.message.Message.Message.__init__(self, data, addr, gid, base_offset, data_length)
+        self.amTypeSet(AM_TYPE)
+
+    # Get AM_TYPE
+    def get_amType(cls):
+        return AM_TYPE
+
+    get_amType = classmethod(get_amType)
+
+    #
+    # Return a String representation of this message. Includes the
+    # message type name and the non-indexed field values.
+    #
+    def __str__(self):
+        s = "Message <TestFtspMsg> \n"
+        try:
+            s += "  [src_addr=0x%x]\n" % (self.get_src_addr())
+        except:
+            pass
+        try:
+            s += "  [counter=0x%x]\n" % (self.get_counter())
+        except:
+            pass
+        try:
+            s += "  [local_rx_timestamp=0x%x]\n" % (self.get_local_rx_timestamp())
+        except:
+            pass
+        try:
+            s += "  [global_rx_timestamp=0x%x]\n" % (self.get_global_rx_timestamp())
+        except:
+            pass
+        try:
+            s += "  [skew_times_1000000=0x%x]\n" % (self.get_skew_times_1000000())
+        except:
+            pass
+        try:
+            s += "  [skew=0x%x]\n" % (self.get_skew())
+        except:
+            pass
+        try:
+            s += "  [is_synced=0x%x]\n" % (self.get_is_synced())
+        except:
+            pass
+        try:
+            s += "  [ftsp_root_addr=0x%x]\n" % (self.get_ftsp_root_addr())
+        except:
+            pass
+        try:
+            s += "  [ftsp_seq=0x%x]\n" % (self.get_ftsp_seq())
+        except:
+            pass
+        try:
+            s += "  [ftsp_table_entries=0x%x]\n" % (self.get_ftsp_table_entries())
+        except:
+            pass
+        try:
+            s += "  [localAverage=0x%x]\n" % (self.get_localAverage())
+        except:
+            pass
+        try:
+            s += "  [offsetAverage=0x%x]\n" % (self.get_offsetAverage())
+        except:
+            pass
+        return s
+
+    # Message-type-specific access methods appear below.
+
+    #
+    # Accessor methods for field: src_addr
+    #   Field type: int
+    #   Offset (bits): 0
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'src_addr' is signed (False).
+    #
+    def isSigned_src_addr(self):
+        return False
+
+    #
+    # Return whether the field 'src_addr' is an array (False).
+    #
+    def isArray_src_addr(self):
+        return False
+
+    #
+    # Return the offset (in bytes) of the field 'src_addr'
+    #
+    def offset_src_addr(self):
+        return (0 / 8)
+
+    #
+    # Return the offset (in bits) of the field 'src_addr'
+    #
+    def offsetBits_src_addr(self):
+        return 0
+
+    #
+    # Return the value (as a int) of the field 'src_addr'
+    #
+    def get_src_addr(self):
+        return self.getUIntElement(self.offsetBits_src_addr(), 16, 1)
+
+    #
+    # Set the value of the field 'src_addr'
+    #
+    def set_src_addr(self, value):
+        self.setUIntElement(self.offsetBits_src_addr(), 16, value, 1)
+
+    #
+    # Return the size, in bytes, of the field 'src_addr'
+    #
+    def size_src_addr(self):
+        return (16 / 8)
+
+    #
+    # Return the size, in bits, of the field 'src_addr'
+    #
+    def sizeBits_src_addr(self):
+        return 16
+
+    #
+    # Accessor methods for field: counter
+    #   Field type: int
+    #   Offset (bits): 16
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'counter' is signed (False).
+    #
+    def isSigned_counter(self):
+        return False
+
+    #
+    # Return whether the field 'counter' is an array (False).
+    #
+    def isArray_counter(self):
+        return False
+
+    #
+    # Return the offset (in bytes) of the field 'counter'
+    #
+    def offset_counter(self):
+        return (16 / 8)
+
+    #
+    # Return the offset (in bits) of the field 'counter'
+    #
+    def offsetBits_counter(self):
+        return 16
+
+    #
+    # Return the value (as a int) of the field 'counter'
+    #
+    def get_counter(self):
+        return self.getUIntElement(self.offsetBits_counter(), 16, 1)
+
+    #
+    # Set the value of the field 'counter'
+    #
+    def set_counter(self, value):
+        self.setUIntElement(self.offsetBits_counter(), 16, value, 1)
+
+    #
+    # Return the size, in bytes, of the field 'counter'
+    #
+    def size_counter(self):
+        return (16 / 8)
+
+    #
+    # Return the size, in bits, of the field 'counter'
+    #
+    def sizeBits_counter(self):
+        return 16
+
+    #
+    # Accessor methods for field: local_rx_timestamp
+    #   Field type: long
+    #   Offset (bits): 32
+    #   Size (bits): 32
+    #
+
+    #
+    # Return whether the field 'local_rx_timestamp' is signed (False).
+    #
+    def isSigned_local_rx_timestamp(self):
+        return False
+
+    #
+    # Return whether the field 'local_rx_timestamp' is an array (False).
+    #
+    def isArray_local_rx_timestamp(self):
+        return False
+
+    #
+    # Return the offset (in bytes) of the field 'local_rx_timestamp'
+    #
+    def offset_local_rx_timestamp(self):
+        return (32 / 8)
+
+    #
+    # Return the offset (in bits) of the field 'local_rx_timestamp'
+    #
+    def offsetBits_local_rx_timestamp(self):
+        return 32
+
+    #
+    # Return the value (as a long) of the field 'local_rx_timestamp'
+    #
+    def get_local_rx_timestamp(self):
+        return self.getUIntElement(self.offsetBits_local_rx_timestamp(), 32, 1)
+
+    #
+    # Set the value of the field 'local_rx_timestamp'
+    #
+    def set_local_rx_timestamp(self, value):
+        self.setUIntElement(self.offsetBits_local_rx_timestamp(), 32, value, 1)
+
+    #
+    # Return the size, in bytes, of the field 'local_rx_timestamp'
+    #
+    def size_local_rx_timestamp(self):
+        return (32 / 8)
+
+    #
+    # Return the size, in bits, of the field 'local_rx_timestamp'
+    #
+    def sizeBits_local_rx_timestamp(self):
+        return 32
+
+    #
+    # Accessor methods for field: global_rx_timestamp
+    #   Field type: long
+    #   Offset (bits): 64
+    #   Size (bits): 32
+    #
+
+    #
+    # Return whether the field 'global_rx_timestamp' is signed (False).
+    #
+    def isSigned_global_rx_timestamp(self):
+        return False
+
+    #
+    # Return whether the field 'global_rx_timestamp' is an array (False).
+    #
+    def isArray_global_rx_timestamp(self):
+        return False
+
+    #
+    # Return the offset (in bytes) of the field 'global_rx_timestamp'
+    #
+    def offset_global_rx_timestamp(self):
+        return (64 / 8)
+
+    #
+    # Return the offset (in bits) of the field 'global_rx_timestamp'
+    #
+    def offsetBits_global_rx_timestamp(self):
+        return 64
+
+    #
+    # Return the value (as a long) of the field 'global_rx_timestamp'
+    #
+    def get_global_rx_timestamp(self):
+        return self.getUIntElement(self.offsetBits_global_rx_timestamp(), 32, 1)
+
+    #
+    # Set the value of the field 'global_rx_timestamp'
+    #
+    def set_global_rx_timestamp(self, value):
+        self.setUIntElement(self.offsetBits_global_rx_timestamp(), 32, value, 1)
+
+    #
+    # Return the size, in bytes, of the field 'global_rx_timestamp'
+    #
+    def size_global_rx_timestamp(self):
+        return (32 / 8)
+
+    #
+    # Return the size, in bits, of the field 'global_rx_timestamp'
+    #
+    def sizeBits_global_rx_timestamp(self):
+        return 32
+
+    #
+    # Accessor methods for field: skew_times_1000000
+    #   Field type: int
+    #   Offset (bits): 96
+    #   Size (bits): 32
+    #
+
+    #
+    # Return whether the field 'skew_times_1000000' is signed (False).
+    #
+    def isSigned_skew_times_1000000(self):
+        return False
+
+    #
+    # Return whether the field 'skew_times_1000000' is an array (False).
+    #
+    def isArray_skew_times_1000000(self):
+        return False
+
+    #
+    # Return the offset (in bytes) of the field 'skew_times_1000000'
+    #
+    def offset_skew_times_1000000(self):
+        return (96 / 8)
+
+    #
+    # Return the offset (in bits) of the field 'skew_times_1000000'
+    #
+    def offsetBits_skew_times_1000000(self):
+        return 96
+
+    #
+    # Return the value (as a int) of the field 'skew_times_1000000'
+    #
+    def get_skew_times_1000000(self):
+        return self.getSIntElement(self.offsetBits_skew_times_1000000(), 32, 1)
+
+    #
+    # Set the value of the field 'skew_times_1000000'
+    #
+    def set_skew_times_1000000(self, value):
+        self.setSIntElement(self.offsetBits_skew_times_1000000(), 32, value, 1)
+
+    #
+    # Return the size, in bytes, of the field 'skew_times_1000000'
+    #
+    def size_skew_times_1000000(self):
+        return (32 / 8)
+
+    #
+    # Return the size, in bits, of the field 'skew_times_1000000'
+    #
+    def sizeBits_skew_times_1000000(self):
+        return 32
+
+    #
+    # Accessor methods for field: skew
+    #   Field type: int
+    #   Offset (bits): 128
+    #   Size (bits): 32
+    #
+
+    #
+    # Return whether the field 'skew' is signed (False).
+    #
+    def isSigned_skew(self):
+        return False
+
+    #
+    # Return whether the field 'skew' is an array (False).
+    #
+    def isArray_skew(self):
+        return False
+
+    #
+    # Return the offset (in bytes) of the field 'skew'
+    #
+    def offset_skew(self):
+        return (128 / 8)
+
+    #
+    # Return the offset (in bits) of the field 'skew'
+    #
+    def offsetBits_skew(self):
+        return 128
+
+    #
+    # Return the value (as a int) of the field 'skew'
+    #
+    def get_skew(self):
+        return self.getFloatElement(self.offsetBits_skew(), 32, 0)
+
+    #
+    # Set the value of the field 'skew'
+    #
+    def set_skew(self, value):
+        self.setSIntElement(self.offsetBits_skew(), 32, value, 1)
+
+    #
+    # Return the size, in bytes, of the field 'skew'
+    #
+    def size_skew(self):
+        return (32 / 8)
+
+    #
+    # Return the size, in bits, of the field 'skew'
+    #
+    def sizeBits_skew(self):
+        return 32
+
+    #
+    # Accessor methods for field: is_synced
+    #   Field type: short
+    #   Offset (bits): 160
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'is_synced' is signed (False).
+    #
+    def isSigned_is_synced(self):
+        return False
+
+    #
+    # Return whether the field 'is_synced' is an array (False).
+    #
+    def isArray_is_synced(self):
+        return False
+
+    #
+    # Return the offset (in bytes) of the field 'is_synced'
+    #
+    def offset_is_synced(self):
+        return (160 / 8)
+
+    #
+    # Return the offset (in bits) of the field 'is_synced'
+    #
+    def offsetBits_is_synced(self):
+        return 160
+
+    #
+    # Return the value (as a short) of the field 'is_synced'
+    #
+    def get_is_synced(self):
+        return self.getUIntElement(self.offsetBits_is_synced(), 8, 1)
+
+    #
+    # Set the value of the field 'is_synced'
+    #
+    def set_is_synced(self, value):
+        self.setUIntElement(self.offsetBits_is_synced(), 8, value, 1)
+
+    #
+    # Return the size, in bytes, of the field 'is_synced'
+    #
+    def size_is_synced(self):
+        return (8 / 8)
+
+    #
+    # Return the size, in bits, of the field 'is_synced'
+    #
+    def sizeBits_is_synced(self):
+        return 8
+
+    #
+    # Accessor methods for field: ftsp_root_addr
+    #   Field type: int
+    #   Offset (bits): 168
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'ftsp_root_addr' is signed (False).
+    #
+    def isSigned_ftsp_root_addr(self):
+        return False
+
+    #
+    # Return whether the field 'ftsp_root_addr' is an array (False).
+    #
+    def isArray_ftsp_root_addr(self):
+        return False
+
+    #
+    # Return the offset (in bytes) of the field 'ftsp_root_addr'
+    #
+    def offset_ftsp_root_addr(self):
+        return (168 / 8)
+
+    #
+    # Return the offset (in bits) of the field 'ftsp_root_addr'
+    #
+    def offsetBits_ftsp_root_addr(self):
+        return 168
+
+    #
+    # Return the value (as a int) of the field 'ftsp_root_addr'
+    #
+    def get_ftsp_root_addr(self):
+        return self.getUIntElement(self.offsetBits_ftsp_root_addr(), 16, 1)
+
+    #
+    # Set the value of the field 'ftsp_root_addr'
+    #
+    def set_ftsp_root_addr(self, value):
+        self.setUIntElement(self.offsetBits_ftsp_root_addr(), 16, value, 1)
+
+    #
+    # Return the size, in bytes, of the field 'ftsp_root_addr'
+    #
+    def size_ftsp_root_addr(self):
+        return (16 / 8)
+
+    #
+    # Return the size, in bits, of the field 'ftsp_root_addr'
+    #
+    def sizeBits_ftsp_root_addr(self):
+        return 16
+
+    #
+    # Accessor methods for field: ftsp_seq
+    #   Field type: short
+    #   Offset (bits): 184
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ftsp_seq' is signed (False).
+    #
+    def isSigned_ftsp_seq(self):
+        return False
+
+    #
+    # Return whether the field 'ftsp_seq' is an array (False).
+    #
+    def isArray_ftsp_seq(self):
+        return False
+
+    #
+    # Return the offset (in bytes) of the field 'ftsp_seq'
+    #
+    def offset_ftsp_seq(self):
+        return (184 / 8)
+
+    #
+    # Return the offset (in bits) of the field 'ftsp_seq'
+    #
+    def offsetBits_ftsp_seq(self):
+        return 184
+
+    #
+    # Return the value (as a short) of the field 'ftsp_seq'
+    #
+    def get_ftsp_seq(self):
+        return self.getUIntElement(self.offsetBits_ftsp_seq(), 8, 1)
+
+    #
+    # Set the value of the field 'ftsp_seq'
+    #
+    def set_ftsp_seq(self, value):
+        self.setUIntElement(self.offsetBits_ftsp_seq(), 8, value, 1)
+
+    #
+    # Return the size, in bytes, of the field 'ftsp_seq'
+    #
+    def size_ftsp_seq(self):
+        return (8 / 8)
+
+    #
+    # Return the size, in bits, of the field 'ftsp_seq'
+    #
+    def sizeBits_ftsp_seq(self):
+        return 8
+
+    #
+    # Accessor methods for field: ftsp_table_entries
+    #   Field type: short
+    #   Offset (bits): 192
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'ftsp_table_entries' is signed (False).
+    #
+    def isSigned_ftsp_table_entries(self):
+        return False
+
+    #
+    # Return whether the field 'ftsp_table_entries' is an array (False).
+    #
+    def isArray_ftsp_table_entries(self):
+        return False
+
+    #
+    # Return the offset (in bytes) of the field 'ftsp_table_entries'
+    #
+    def offset_ftsp_table_entries(self):
+        return (192 / 8)
+
+    #
+    # Return the offset (in bits) of the field 'ftsp_table_entries'
+    #
+    def offsetBits_ftsp_table_entries(self):
+        return 192
+
+    #
+    # Return the value (as a short) of the field 'ftsp_table_entries'
+    #
+    def get_ftsp_table_entries(self):
+        return self.getUIntElement(self.offsetBits_ftsp_table_entries(), 8, 1)
+
+    #
+    # Set the value of the field 'ftsp_table_entries'
+    #
+    def set_ftsp_table_entries(self, value):
+        self.setUIntElement(self.offsetBits_ftsp_table_entries(), 8, value, 1)
+
+    #
+    # Return the size, in bytes, of the field 'ftsp_table_entries'
+    #
+    def size_ftsp_table_entries(self):
+        return (8 / 8)
+
+    #
+    # Return the size, in bits, of the field 'ftsp_table_entries'
+    #
+    def sizeBits_ftsp_table_entries(self):
+        return 8
+
+    #
+    # Accessor methods for field: localAverage
+    #   Field type: long
+    #   Offset (bits): 200
+    #   Size (bits): 32
+    #
+
+    #
+    # Return whether the field 'localAverage' is signed (False).
+    #
+    def isSigned_localAverage(self):
+        return False
+
+    #
+    # Return whether the field 'localAverage' is an array (False).
+    #
+    def isArray_localAverage(self):
+        return False
+
+    #
+    # Return the offset (in bytes) of the field 'localAverage'
+    #
+    def offset_localAverage(self):
+        return (200 / 8)
+
+    #
+    # Return the offset (in bits) of the field 'localAverage'
+    #
+    def offsetBits_localAverage(self):
+        return 200
+
+    #
+    # Return the value (as a long) of the field 'localAverage'
+    #
+    def get_localAverage(self):
+        return self.getUIntElement(self.offsetBits_localAverage(), 32, 1)
+
+    #
+    # Set the value of the field 'localAverage'
+    #
+    def set_localAverage(self, value):
+        self.setUIntElement(self.offsetBits_localAverage(), 32, value, 1)
+
+    #
+    # Return the size, in bytes, of the field 'localAverage'
+    #
+    def size_localAverage(self):
+        return (32 / 8)
+
+    #
+    # Return the size, in bits, of the field 'localAverage'
+    #
+    def sizeBits_localAverage(self):
+        return 32
+
+    #
+    # Accessor methods for field: offsetAverage
+    #   Field type: int
+    #   Offset (bits): 232
+    #   Size (bits): 32
+    #
+
+    #
+    # Return whether the field 'offsetAverage' is signed (False).
+    #
+    def isSigned_offsetAverage(self):
+        return False
+
+    #
+    # Return whether the field 'offsetAverage' is an array (False).
+    #
+    def isArray_offsetAverage(self):
+        return False
+
+    #
+    # Return the offset (in bytes) of the field 'offsetAverage'
+    #
+    def offset_offsetAverage(self):
+        return (232 / 8)
+
+    #
+    # Return the offset (in bits) of the field 'offsetAverage'
+    #
+    def offsetBits_offsetAverage(self):
+        return 232
+
+    #
+    # Return the value (as a int) of the field 'offsetAverage'
+    #
+    def get_offsetAverage(self):
+        return self.getSIntElement(self.offsetBits_offsetAverage(), 32, 1)
+
+    #
+    # Set the value of the field 'offsetAverage'
+    #
+    def set_offsetAverage(self, value):
+        self.setSIntElement(self.offsetBits_offsetAverage(), 32, value, 1)
+
+    #
+    # Return the size, in bytes, of the field 'offsetAverage'
+    #
+    def size_offsetAverage(self):
+        return (32 / 8)
+
+    #
+    # Return the size, in bits, of the field 'offsetAverage'
+    #
+    def sizeBits_offsetAverage(self):
+        return 32
+
diff --git a/apps/tests/TestFtsp/FtspLplBeaconer/Makefile b/apps/tests/TestFtsp/FtspLplBeaconer/Makefile
new file mode 100755
index 00000000..a935c01e
--- /dev/null
+++ b/apps/tests/TestFtsp/FtspLplBeaconer/Makefile
@@ -0,0 +1,7 @@
+COMPONENT=RadioCountToLedsAppC
+
+CFLAGS += -DLPL_INTERVAL=200
+CFLAGS += -DLOW_POWER_LISTENING
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestFtsp/FtspLplBeaconer/RadioCountToLeds.h b/apps/tests/TestFtsp/FtspLplBeaconer/RadioCountToLeds.h
new file mode 100755
index 00000000..68411dba
--- /dev/null
+++ b/apps/tests/TestFtsp/FtspLplBeaconer/RadioCountToLeds.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef RADIO_COUNT_TO_LEDS_H
+#define RADIO_COUNT_TO_LEDS_H
+
+typedef nx_struct radio_count_msg {
+  nx_uint16_t counter;
+} radio_count_msg_t;
+
+enum {
+  AM_RADIO_COUNT_MSG = 6,
+};
+
+#endif
diff --git a/apps/tests/TestFtsp/FtspLplBeaconer/RadioCountToLedsAppC.nc b/apps/tests/TestFtsp/FtspLplBeaconer/RadioCountToLedsAppC.nc
new file mode 100755
index 00000000..f895f1d8
--- /dev/null
+++ b/apps/tests/TestFtsp/FtspLplBeaconer/RadioCountToLedsAppC.nc
@@ -0,0 +1,85 @@
+// $Id: RadioCountToLedsAppC.nc,v 1.2 2010-06-29 22:07:24 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "RadioCountToLeds.h"
+#include "Timer.h"
+
+/**
+ * Configuration for the RadioCountToLeds application. RadioCountToLeds 
+ * maintains a 4Hz counter, broadcasting its value in an AM packet 
+ * every time it gets updated. A RadioCountToLeds node that hears a counter 
+ * displays the bottom three bits on its LEDs. This application is a useful 
+ * test to show that basic AM communication and timers work.
+ *
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+configuration RadioCountToLedsAppC {}
+implementation {
+  components MainC, new RadioCountToLedsC(T32khz) as App, LedsC;
+  components new AMReceiverC(AM_RADIO_COUNT_MSG);
+  components new TimerMilliC();
+  components TimeSyncMessageC as ActiveMessageC;
+  
+  App.Boot -> MainC.Boot;
+  
+  App.Receive -> AMReceiverC;
+  App.AMSend -> ActiveMessageC.TimeSyncAMSend32khz[AM_RADIO_COUNT_MSG];
+  App.AMControl -> ActiveMessageC;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  App.Packet -> ActiveMessageC;
+
+  components Counter32khz32C, new CounterToLocalTimeC(T32khz) as LocalTime32khzC;
+  LocalTime32khzC.Counter -> Counter32khz32C;
+  App.LocalTime     -> LocalTime32khzC;
+
+
+#ifdef LOW_POWER_LISTENING
+  components CC2420ActiveMessageC;
+  App.LowPowerListening -> CC2420ActiveMessageC;
+#endif
+
+}
+
+
diff --git a/apps/tests/TestFtsp/FtspLplBeaconer/RadioCountToLedsC.nc b/apps/tests/TestFtsp/FtspLplBeaconer/RadioCountToLedsC.nc
new file mode 100755
index 00000000..6341f044
--- /dev/null
+++ b/apps/tests/TestFtsp/FtspLplBeaconer/RadioCountToLedsC.nc
@@ -0,0 +1,159 @@
+// $Id: RadioCountToLedsC.nc,v 1.3 2010-06-29 22:07:24 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "Timer.h"
+#include "RadioCountToLeds.h"
+ 
+/**
+ * Implementation of the RadioCountToLeds application. RadioCountToLeds 
+ * maintains a 4Hz counter, broadcasting its value in an AM packet 
+ * every time it gets updated. A RadioCountToLeds node that hears a counter 
+ * displays the bottom three bits on its LEDs. This application is a useful 
+ * test to show that basic AM communication and timers work.
+ *
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+generic module RadioCountToLedsC(typedef precision_tag) @safe() {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface TimeSyncAMSend<precision_tag,uint32_t> as AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface SplitControl as AMControl;
+    interface Packet;
+
+    interface LocalTime<precision_tag> as LocalTime;
+
+
+#ifdef LOW_POWER_LISTENING
+    interface LowPowerListening;
+#endif
+
+  }
+}
+implementation {
+
+  message_t packet;
+
+  bool locked;
+  uint16_t counter = 0;
+  
+  event void Boot.booted() {
+    call AMControl.start();
+  }
+
+  event void AMControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+      call MilliTimer.startPeriodic(2*1024);
+    }
+    else {
+      call AMControl.start();
+    }
+  }
+
+  event void AMControl.stopDone(error_t err) {
+    // do nothing
+  }
+  
+  event void MilliTimer.fired() {
+      uint32_t time = call LocalTime.get();
+    counter++;
+    dbg("RadioCountToLedsC", "RadioCountToLedsC: timer fired, counter is %hu.\n", counter);
+    if (locked) {
+      return;
+    }
+    else {
+      radio_count_msg_t* rcm = (radio_count_msg_t*)call Packet.getPayload(&packet, sizeof(radio_count_msg_t));
+      if (rcm == NULL) {
+	return;
+      }
+
+      rcm->counter = counter;
+#ifdef LOW_POWER_LISTENING
+      call LowPowerListening.setRemoteWakeupInterval(&packet, LPL_INTERVAL);
+#endif
+      
+      if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(radio_count_msg_t), time) == SUCCESS) {
+	dbg("RadioCountToLedsC", "RadioCountToLedsC: packet sent.\n", counter);	
+	locked = TRUE;
+      }
+    }
+  }
+
+  event message_t* Receive.receive(message_t* bufPtr, 
+				   void* payload, uint8_t len) {
+    dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len);
+    if (len != sizeof(radio_count_msg_t)) {return bufPtr;}
+    else {
+      radio_count_msg_t* rcm = (radio_count_msg_t*)payload;
+      if (rcm->counter & 0x1) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if (rcm->counter & 0x2) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if (rcm->counter & 0x4) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led2Off();
+      }
+      return bufPtr;
+    }
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr) {
+      locked = FALSE;
+    }
+  }
+
+}
diff --git a/apps/tests/TestLocalTime/Makefile b/apps/tests/TestLocalTime/Makefile
new file mode 100644
index 00000000..97f8bea7
--- /dev/null
+++ b/apps/tests/TestLocalTime/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestLocalTimeAppC
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestLocalTime/README.txt b/apps/tests/TestLocalTime/README.txt
new file mode 100644
index 00000000..825967f4
--- /dev/null
+++ b/apps/tests/TestLocalTime/README.txt
@@ -0,0 +1,19 @@
+README for TestLocalTime
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+TestLocalTime is a simple application that tests the LocalTimeMilliC component
+by sending the current time over the serial port once per second.
+
+dump.py is a Python script that can be used to read and format the values from
+the serial port.
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
+
diff --git a/apps/tests/TestLocalTime/TestLocalTime.h b/apps/tests/TestLocalTime/TestLocalTime.h
new file mode 100644
index 00000000..9ea8fd24
--- /dev/null
+++ b/apps/tests/TestLocalTime/TestLocalTime.h
@@ -0,0 +1,13 @@
+
+#ifndef TEST_SERIAL_H
+#define TEST_SERIAL_H
+
+typedef nx_struct test_localtime_msg {
+  nx_uint32_t time;
+} test_localtime_msg_t;
+
+enum {
+  AM_TEST_LOCALTIME_MSG = 88,
+};
+
+#endif
diff --git a/apps/tests/TestLocalTime/TestLocalTimeAppC.nc b/apps/tests/TestLocalTime/TestLocalTimeAppC.nc
new file mode 100644
index 00000000..dbb58392
--- /dev/null
+++ b/apps/tests/TestLocalTime/TestLocalTimeAppC.nc
@@ -0,0 +1,72 @@
+// $Id: TestLocalTimeAppC.nc,v 1.2 2010-06-29 22:07:24 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * TestLocalTime is a simple application that tests the LocalTimeMilliC
+ * componentby sending the current time over the serial port once per
+ * second.
+ *
+ *  @author David Gay
+ *  @author Gilman Tolle
+ *  @author Philip Levis
+ *  
+ *  @date   May 24 2007
+ *
+ **/
+
+#include "TestLocalTime.h"
+
+configuration TestLocalTimeAppC {}
+implementation {
+  components TestLocalTimeC as App, LedsC, MainC;
+  components SerialActiveMessageC as AM;
+  components new TimerMilliC(), LocalTimeMilliC;
+
+  App.Boot -> MainC.Boot;
+  App.Control -> AM;
+  App.AMSend -> AM.AMSend[AM_TEST_LOCALTIME_MSG];
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  App.LocalTime -> LocalTimeMilliC;
+}
+
+
diff --git a/apps/tests/TestLocalTime/TestLocalTimeC.nc b/apps/tests/TestLocalTime/TestLocalTimeC.nc
new file mode 100644
index 00000000..75bc8708
--- /dev/null
+++ b/apps/tests/TestLocalTime/TestLocalTimeC.nc
@@ -0,0 +1,109 @@
+// $Id: TestLocalTimeC.nc,v 1.3 2010-06-29 22:07:24 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * TestLocalTime is a simple application that tests the LocalTimeMilliC
+ * componentby sending the current time over the serial port once per
+ * second.
+ *
+ *  @author David Gay
+ *  @author Gilman Tolle
+ *  @author Philip Levis
+ *  
+ *  @date   May 24 2007
+ *
+ **/
+
+#include "Timer.h"
+#include "TestLocalTime.h"
+
+module TestLocalTimeC {
+  uses {
+    interface SplitControl as Control;
+    interface Leds;
+    interface Boot;
+    interface AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface LocalTime<TMilli>;
+  }
+}
+implementation {
+  message_t packet;
+  bool locked = FALSE;
+  
+  event void Boot.booted() {
+    call Control.start();
+  }
+  
+  event void Control.startDone(error_t err) {
+    if (err == SUCCESS)
+      call MilliTimer.startPeriodic(1024);
+  }
+
+  event void Control.stopDone(error_t err) { }
+
+  event void MilliTimer.fired() {
+    if (!locked)
+      {
+	test_localtime_msg_t* rcm = (test_localtime_msg_t*)call AMSend.getPayload(&packet, sizeof(test_localtime_msg_t));
+	if (call AMSend.maxPayloadLength() < sizeof(test_localtime_msg_t))
+	  return;
+
+	rcm->time = call LocalTime.get();
+	if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(test_localtime_msg_t)) == SUCCESS)
+	  {
+	    locked = TRUE;
+	    call Leds.led0Toggle();
+	  }
+    }
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr)
+      locked = FALSE;
+  }
+
+}
+
+
+
+
diff --git a/apps/tests/TestLocalTime/dump.py b/apps/tests/TestLocalTime/dump.py
new file mode 100644
index 00000000..e8dea05f
--- /dev/null
+++ b/apps/tests/TestLocalTime/dump.py
@@ -0,0 +1,22 @@
+#!/usr/bin/env python
+
+import sys
+import tos
+
+class Localtime(tos.Packet):
+    def __init__(self, packet = None):
+        tos.Packet.__init__(self,
+                            [('time', 'int', 4)],
+                            packet)
+
+if '-h' in sys.argv:
+    print "Usage:", sys.argv[0], "serial@/dev/ttyUSB0:57600"
+    sys.exit()
+
+am = tos.AM()
+
+while True:
+    p = am.read()
+    if p:
+        msg = Localtime(p.data)
+        print msg
diff --git a/apps/tests/TestLpl/Makefile b/apps/tests/TestLpl/Makefile
new file mode 100644
index 00000000..1c579628
--- /dev/null
+++ b/apps/tests/TestLpl/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestLplAppC
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestLpl/README.txt b/apps/tests/TestLpl/README.txt
new file mode 100644
index 00000000..d0092953
--- /dev/null
+++ b/apps/tests/TestLpl/README.txt
@@ -0,0 +1,51 @@
+README for TestLPL
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+A simple low-power-listening test app, which cycles through different
+low-power-listening settings every ~32s, repeating every ~192s. 
+
+This application currently runs on motes using the CC1000, CC2420 and
+RF230 radios. To compile for motes with CC2420 or RF230 radios, you
+must do:
+  env CFLAGS="-DLOW_POWER_LISTENING" make <platform>
+
+This application blinks LED 0 every time it sends a message, and toggles
+LED 1 every time it receives a message. If this application is
+working correctly (see caveat about timing below), you should see 
+both nodes toggling LED 1.
+
+Its low-power-listening settings are as follows (repeating every 256s):
+
+0-32s:     receive: fully on
+           send: every second, to fully on listener
+
+32-64s:    receive: fully on
+	   send: every second, to low-power-listeners with 100ms interval
+
+64-96s:    receive: low-power-listening with 250ms interval
+	   send: every second, to low-power-listeners with 250ms interval
+
+96-128s:   receive: low-power-listening with 250ms interval
+	   send: every second, to fully on listener
+
+128-160s:  receive: low-power-listening with 10ms interval
+	   send: every second, to low-power-listeners with 10ms interval
+
+160-192s:  receive: low-power-listening with 2000ms interval
+	   send: every 7 seconds, to low-power-listeners with 2000ms interval
+
+Whether two motes running TestLPL can receive each others messages depends
+on their current send and receive low-power-listening settings. If you reset
+two such motes at the same time, they will be able to receive each other's
+messages in the following intervals: 0-96s and 128-192s.
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
+
diff --git a/apps/tests/TestLpl/TestLplAppC.nc b/apps/tests/TestLpl/TestLplAppC.nc
new file mode 100644
index 00000000..9ab08978
--- /dev/null
+++ b/apps/tests/TestLpl/TestLplAppC.nc
@@ -0,0 +1,68 @@
+// $Id: TestLplAppC.nc,v 1.5 2010-01-14 15:46:26 klueska Exp $
+
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Simple test code for low-power-listening. Sends a sequence of packets,
+ * changing the low-power-listening settings every ~32s. See README.txt
+ * for more details.
+ *
+ *  @author Philip Levis, David Gay
+ *  @date   Oct 27 2006
+ */
+
+configuration TestLplAppC {}
+implementation {
+  components MainC, TestLplC as App, LedsC;
+  components ActiveMessageC;
+  components new TimerMilliC();
+#if defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+  components CC1000CsmaRadioC as LplRadio;
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB) || defined(PLATFORM_SHIMMER) || defined(PLATFORM_SHIMMER2) || defined(PLATFORM_INTELMOTE2) || defined(PLATFORM_EPIC)
+  components CC2420ActiveMessageC as LplRadio;
+#elif defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE)
+  components RF230ActiveMessageC as LplRadio;
+#elif defined(PLATFORM_EYESIFXV1) || defined(PLATFORM_EYESIFXV2)
+  components LplC as LplRadio;
+#else
+#error "LPL testing not supported on this platform"
+#endif
+    
+  App.Boot -> MainC.Boot;
+
+  App.Receive -> ActiveMessageC.Receive[240];
+  App.AMSend -> ActiveMessageC.AMSend[240];
+  App.SplitControl -> ActiveMessageC;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  App.LowPowerListening -> LplRadio;
+}
+
+
diff --git a/apps/tests/TestLpl/TestLplC.nc b/apps/tests/TestLpl/TestLplC.nc
new file mode 100644
index 00000000..f1db49f7
--- /dev/null
+++ b/apps/tests/TestLpl/TestLplC.nc
@@ -0,0 +1,138 @@
+// $Id: TestLplC.nc,v 1.2 2009-10-21 19:11:51 razvanm Exp $
+
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "Timer.h"
+
+/**
+ * Simple test code for low-power-listening. Sends a sequence of packets,
+ * changing the low-power-listening settings every ~32s. See README.txt
+ * for more details.
+ *
+ *  @author Philip Levis, David Gay
+ *  @date   Oct 27 2006
+ */
+
+module TestLplC {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface SplitControl;
+    interface LowPowerListening;
+  }
+}
+implementation 
+{
+  message_t packet;
+  bool locked;
+  uint8_t counter = 0, sendSkip;
+  int16_t sendInterval;
+
+  event void Boot.booted() {
+    call SplitControl.start();
+  }
+
+  void nextLplState()
+  {
+    switch (counter >> 5) {
+    case 0:
+      sendSkip = 0;
+      sendInterval = 0;
+      call LowPowerListening.setLocalWakeupInterval(0);
+      break;
+    case 1:
+      sendInterval = 100; /* Send to sleepy listener */
+      break;
+    case 2:
+      sendInterval = -1; /* Send to listener like us */
+      call LowPowerListening.setLocalWakeupInterval(250);
+      break;
+    case 3:
+      sendInterval = 0; /* Send to awake listener */
+      break;
+    case 4:
+      sendInterval = -1; /* Send to listener like us */
+      call LowPowerListening.setLocalWakeupInterval(10);
+      break;
+    case 5:
+      sendSkip = 7; /* Send every 7s */
+      call LowPowerListening.setLocalWakeupInterval(2000);
+      break;
+    }
+  }
+  
+  event void MilliTimer.fired()
+  {
+    counter++;
+    if (!(counter & 31))
+      nextLplState();
+
+    if (!locked && ((counter & sendSkip) == sendSkip))
+      {
+	if (sendInterval >= 0)
+	  call LowPowerListening.setRemoteWakeupInterval(&packet, sendInterval);
+	if (call AMSend.send(AM_BROADCAST_ADDR, &packet, 0) == SUCCESS)
+	  {
+	    call Leds.led0On();
+	    locked = TRUE;
+	  }
+      }
+  }
+
+  event message_t* Receive.receive(message_t* bufPtr, 
+				   void* payload, uint8_t len)
+  {
+    call Leds.led1Toggle();
+    return bufPtr;
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error)
+  {
+    if (&packet == bufPtr)
+      {
+	locked = FALSE;
+	call Leds.led0Off();
+      }
+  }
+
+  event void SplitControl.startDone(error_t err)
+  {
+    call MilliTimer.startPeriodic(1000);
+  }
+
+  event void SplitControl.stopDone(error_t err) { }
+}
+
+
+
+
diff --git a/apps/tests/TestMultihopLqi/15-15-medium-mica2-grid.txt b/apps/tests/TestMultihopLqi/15-15-medium-mica2-grid.txt
new file mode 100644
index 00000000..dc5c7939
--- /dev/null
+++ b/apps/tests/TestMultihopLqi/15-15-medium-mica2-grid.txt
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diff --git a/apps/tests/TestMultihopLqi/15-15-tight-mica2-grid.txt b/apps/tests/TestMultihopLqi/15-15-tight-mica2-grid.txt
new file mode 100644
index 00000000..0a236481
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+gain	221	218	-75.64
+gain	218	222	-81.93
+gain	222	218	-79.99
+gain	218	223	-82.86
+gain	223	218	-84.15
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+gain	219	220	-67.29
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+gain	219	221	-73.60
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+gain	219	222	-74.44
+gain	222	219	-72.01
+gain	219	223	-82.32
+gain	223	219	-83.13
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+gain	224	219	-87.98
+gain	220	221	-59.96
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+gain	220	223	-76.21
+gain	223	220	-80.94
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+gain	224	220	-81.24
+gain	221	222	-63.61
+gain	222	221	-59.42
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+gain	223	221	-76.49
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+gain	224	221	-80.10
+gain	222	223	-59.59
+gain	223	222	-62.83
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+gain	223	224	-64.23
+gain	224	223	-64.70
+noise	0	-107.96	4.00
+noise	1	-102.14	4.00
+noise	2	-103.55	4.00
+noise	3	-107.94	4.00
+noise	4	-106.61	4.00
+noise	5	-108.81	4.00
+noise	6	-105.00	4.00
+noise	7	-106.59	4.00
+noise	8	-105.74	4.00
+noise	9	-104.51	4.00
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+noise	11	-102.63	4.00
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+noise	13	-103.67	4.00
+noise	14	-101.83	4.00
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+noise	17	-105.36	4.00
+noise	18	-104.31	4.00
+noise	19	-106.05	4.00
+noise	20	-104.29	4.00
+noise	21	-102.17	4.00
+noise	22	-105.89	4.00
+noise	23	-106.49	4.00
+noise	24	-105.15	4.00
+noise	25	-103.49	4.00
+noise	26	-103.27	4.00
+noise	27	-103.05	4.00
+noise	28	-109.83	4.00
+noise	29	-105.45	4.00
+noise	30	-103.30	4.00
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+noise	37	-103.81	4.00
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+noise	45	-103.04	4.00
+noise	46	-101.71	4.00
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+noise	51	-104.39	4.00
+noise	52	-105.50	4.00
+noise	53	-104.76	4.00
+noise	54	-103.87	4.00
+noise	55	-107.94	4.00
+noise	56	-106.21	4.00
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+noise	60	-101.09	4.00
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+noise	78	-105.30	4.00
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+noise	81	-106.69	4.00
+noise	82	-104.25	4.00
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+noise	84	-105.81	4.00
+noise	85	-105.35	4.00
+noise	86	-101.90	4.00
+noise	87	-105.91	4.00
+noise	88	-105.17	4.00
+noise	89	-102.68	4.00
+noise	90	-103.33	4.00
+noise	91	-102.72	4.00
+noise	92	-102.19	4.00
+noise	93	-104.62	4.00
+noise	94	-107.11	4.00
+noise	95	-105.85	4.00
+noise	96	-102.73	4.00
+noise	97	-106.00	4.00
+noise	98	-106.23	4.00
+noise	99	-109.34	4.00
+noise	100	-104.19	4.00
+noise	101	-105.56	4.00
+noise	102	-106.47	4.00
+noise	103	-104.93	4.00
+noise	104	-102.02	4.00
+noise	105	-103.98	4.00
+noise	106	-106.92	4.00
+noise	107	-104.94	4.00
+noise	108	-105.32	4.00
+noise	109	-106.48	4.00
+noise	110	-103.62	4.00
+noise	111	-107.14	4.00
+noise	112	-105.69	4.00
+noise	113	-103.91	4.00
+noise	114	-106.58	4.00
+noise	115	-104.76	4.00
+noise	116	-105.81	4.00
+noise	117	-107.57	4.00
+noise	118	-105.61	4.00
+noise	119	-104.80	4.00
+noise	120	-105.56	4.00
+noise	121	-101.83	4.00
+noise	122	-104.75	4.00
+noise	123	-104.33	4.00
+noise	124	-105.18	4.00
+noise	125	-103.77	4.00
+noise	126	-102.99	4.00
+noise	127	-105.24	4.00
+noise	128	-104.70	4.00
+noise	129	-106.44	4.00
+noise	130	-105.71	4.00
+noise	131	-105.68	4.00
+noise	132	-109.54	4.00
+noise	133	-103.21	4.00
+noise	134	-104.70	4.00
+noise	135	-104.87	4.00
+noise	136	-105.16	4.00
+noise	137	-100.10	4.00
+noise	138	-107.09	4.00
+noise	139	-106.97	4.00
+noise	140	-105.97	4.00
+noise	141	-110.76	4.00
+noise	142	-104.63	4.00
+noise	143	-103.05	4.00
+noise	144	-104.72	4.00
+noise	145	-102.08	4.00
+noise	146	-104.29	4.00
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+noise	148	-106.26	4.00
+noise	149	-107.66	4.00
+noise	150	-104.62	4.00
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+noise	154	-104.05	4.00
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+noise	156	-106.50	4.00
+noise	157	-107.23	4.00
+noise	158	-104.61	4.00
+noise	159	-102.21	4.00
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+noise	161	-102.77	4.00
+noise	162	-104.82	4.00
+noise	163	-103.61	4.00
+noise	164	-105.32	4.00
+noise	165	-105.68	4.00
+noise	166	-107.07	4.00
+noise	167	-103.66	4.00
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diff --git a/apps/tests/TestMultihopLqi/CC2420ActiveMessageC.nc b/apps/tests/TestMultihopLqi/CC2420ActiveMessageC.nc
new file mode 100644
index 00000000..6758006d
--- /dev/null
+++ b/apps/tests/TestMultihopLqi/CC2420ActiveMessageC.nc
@@ -0,0 +1,66 @@
+#include <sim_gain.h>
+#include <sim_tossim.h>
+#include <AM.h>
+
+module CC2420ActiveMessageC {
+  provides interface CC2420Packet as Packet;
+  uses interface AMPacket as SubPacket;
+}
+implementation {
+
+  typedef struct cc2420_header {
+
+  } cc2420_header_t;
+  /**
+   * Get transmission power setting for current packet.
+   *
+   * @param the message
+   */
+  async command uint8_t Packet.getPower( message_t* p_msg ) {
+    return 1;
+  }
+
+  /**
+   * Set transmission power for a given packet. Valid ranges are
+   * between 0 and 31.
+   *
+   * @param p_msg the message.
+   * @param power transmission power.
+   */
+  async command void Packet.setPower( message_t* p_msg, uint8_t power ) {
+    return;
+  }
+  
+  /**
+   * Get rssi value for a given packet. For received packets, it is
+   * the received signal strength when receiving that packet. For sent
+   * packets, it is the received signal strength of the ack if an ack
+   * was received.
+   */
+  
+  async command int8_t Packet.getRssi( message_t* p_msg ) {
+    uint16_t src = call SubPacket.source(p_msg);
+    return (int)sim_gain_value(src, TOS_NODE_ID);
+  }
+
+  /**
+   * Get lqi value for a given packet. For received packets, it is the
+   * link quality indicator value when receiving that packet. For sent
+   * packets, it is the link quality indicator value of the ack if an
+   * ack was received.
+   */
+  
+  async command uint8_t Packet.getLqi( message_t* p_msg ) {
+    uint16_t src = call SubPacket.source(p_msg);
+    int sig = (int)sim_gain_value(src, TOS_NODE_ID);
+    if (sig > -60) {
+      sig = 110;
+    }
+    else {
+      sig = 230 + (sig * 2);
+      sig += (sim_random() % 10);
+    }
+    
+    return (uint8_t)sig;
+  }
+}
diff --git a/apps/tests/TestMultihopLqi/Makefile b/apps/tests/TestMultihopLqi/Makefile
new file mode 100644
index 00000000..5b6ef2b1
--- /dev/null
+++ b/apps/tests/TestMultihopLqi/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=MultihopOscilloscopeAppC
+CFLAGS += -I$(TOSDIR)/lib/net/ -I$(TOSDIR)/lib/net/lqi -I$(TOSDIR)/chips/cc2420/interfaces
+
+include $(MAKERULES)
diff --git a/apps/tests/TestMultihopLqi/MultihopOscilloscope.h b/apps/tests/TestMultihopLqi/MultihopOscilloscope.h
new file mode 100644
index 00000000..5f040539
--- /dev/null
+++ b/apps/tests/TestMultihopLqi/MultihopOscilloscope.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+#ifndef MULTIHOP_OSCILLOSCOPE_H
+#define MULTIHOP_OSCILLOSCOPE_H
+
+enum {
+  /* Number of readings per message. If you increase this, you may have to
+     increase the message_t size. */
+  NREADINGS = 5,
+  /* Default sampling period. */
+  DEFAULT_INTERVAL = 1024,
+  AM_OSCILLOSCOPE = 0x93
+};
+
+typedef nx_struct oscilloscope {
+  nx_uint16_t version; /* Version of the interval. */
+  nx_uint16_t interval; /* Samping period. */
+  nx_uint16_t id; /* Mote id of sending mote. */
+  nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */
+  nx_uint16_t readings[NREADINGS];
+} oscilloscope_t;
+
+#endif
diff --git a/apps/tests/TestMultihopLqi/MultihopOscilloscopeAppC.nc b/apps/tests/TestMultihopLqi/MultihopOscilloscopeAppC.nc
new file mode 100644
index 00000000..1f591c9e
--- /dev/null
+++ b/apps/tests/TestMultihopLqi/MultihopOscilloscopeAppC.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * MultihopOscilloscope demo application using the collection layer. 
+ * See README.txt file in this directory and TEP 119: Collection.
+ *
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+configuration MultihopOscilloscopeAppC { }
+implementation {
+  components MainC, MultihopOscilloscopeC, LedsC, new TimerMilliC(),
+    new TimerMilliC() as OnOffTimer, new DemoSensorC() as Sensor;
+
+  //MainC.SoftwareInit -> Sensor;
+  
+  MultihopOscilloscopeC.Boot -> MainC;
+  MultihopOscilloscopeC.Timer -> TimerMilliC;
+  MultihopOscilloscopeC.Read -> Sensor;
+  MultihopOscilloscopeC.Leds -> LedsC;
+  MultihopOscilloscopeC.OnOffTimer -> OnOffTimer;
+  //
+  // Communication components.  These are documented in TEP 113:
+  // Serial Communication, and TEP 119: Collection.
+  //
+  components CollectionC as Collector,  // Collection layer
+    ActiveMessageC,                         // AM layer
+    new CollectionSenderC(AM_OSCILLOSCOPE), // Sends multihop RF
+    SerialActiveMessageC,                   // Serial messaging
+    new SerialAMSenderC(AM_OSCILLOSCOPE);   // Sends to the serial port
+  components RandomC;
+
+  MultihopOscilloscopeC.RadioControl -> ActiveMessageC;
+  MultihopOscilloscopeC.SerialControl -> SerialActiveMessageC;
+  MultihopOscilloscopeC.RoutingControl -> Collector;
+
+  MultihopOscilloscopeC.Send -> CollectionSenderC;
+  MultihopOscilloscopeC.SerialSend -> SerialAMSenderC.AMSend;
+  MultihopOscilloscopeC.Snoop -> Collector.Snoop[AM_OSCILLOSCOPE];
+  MultihopOscilloscopeC.Receive -> Collector.Receive[AM_OSCILLOSCOPE];
+  MultihopOscilloscopeC.RootControl -> Collector;
+  MultihopOscilloscopeC.Random -> RandomC;
+  
+  components new PoolC(message_t, 10) as UARTMessagePoolP,
+    new QueueC(message_t*, 10) as UARTQueueP;
+
+  MultihopOscilloscopeC.UARTMessagePool -> UARTMessagePoolP;
+  MultihopOscilloscopeC.UARTQueue -> UARTQueueP;
+  
+  components new PoolC(message_t, 20) as DebugMessagePool,
+    new QueueC(message_t*, 20) as DebugSendQueue,
+    new SerialAMSenderC(AM_LQI_DEBUG) as DebugSerialSender,
+    UARTDebugSenderP as DebugSender;
+
+  DebugSender.Boot -> MainC;
+  DebugSender.UARTSend -> DebugSerialSender;
+  DebugSender.MessagePool -> DebugMessagePool;
+  DebugSender.SendQueue -> DebugSendQueue;
+  Collector.CollectionDebug -> DebugSender;
+
+  components CC2420ActiveMessageC;
+  CC2420ActiveMessageC.SubPacket -> ActiveMessageC;
+
+}
diff --git a/apps/tests/TestMultihopLqi/MultihopOscilloscopeC.nc b/apps/tests/TestMultihopLqi/MultihopOscilloscopeC.nc
new file mode 100644
index 00000000..a13236e3
--- /dev/null
+++ b/apps/tests/TestMultihopLqi/MultihopOscilloscopeC.nc
@@ -0,0 +1,314 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * MultihopOscilloscope demo application using the collection layer. 
+ * See README.txt file in this directory and TEP 119: Collection.
+ *
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+#include "Timer.h"
+#include "MultihopOscilloscope.h"
+
+module MultihopOscilloscopeC {
+  uses {
+    // Interfaces for initialization:
+    interface Boot;
+    interface SplitControl as RadioControl;
+    interface SplitControl as SerialControl;
+    interface StdControl as RoutingControl;
+    
+    // Interfaces for communication, multihop and serial:
+    interface Send;
+    interface Receive as Snoop;
+    interface Receive;
+    interface AMSend as SerialSend;
+    interface CollectionPacket;
+    interface RootControl;
+
+    interface Queue<message_t *> as UARTQueue;
+    interface Pool<message_t> as UARTMessagePool;
+
+    // Miscalleny:
+    interface Timer<TMilli>;
+    interface Timer<TMilli> as OnOffTimer;
+    interface Read<uint16_t>;
+    interface Leds;
+    interface Random;
+  }
+}
+
+implementation {
+  task void uartSendTask();
+  static void startTimer();
+  static void fatal_problem();
+  static void report_problem();
+  static void report_sent();
+  static void report_received();
+
+  uint8_t uartlen;
+  message_t sendbuf;
+  message_t uartbuf;
+  bool sendbusy=FALSE, uartbusy=FALSE;
+
+  /* Current local state - interval, version and accumulated readings */
+  oscilloscope_t local;
+
+  uint8_t reading; /* 0 to NREADINGS */
+
+  /* When we head an Oscilloscope message, we check it's sample count. If
+     it's ahead of ours, we "jump" forwards (set our count to the received
+     count). However, we must then suppress our next count increment. This
+     is a very simple form of "time" synchronization (for an abstract
+     notion of time). */
+  bool suppress_count_change;
+  bool running = FALSE;
+  // 
+  // On bootup, initialize radio and serial communications, and our
+  // own state variables.
+  //
+  event void Boot.booted() {
+    local.interval = DEFAULT_INTERVAL;
+    local.id = TOS_NODE_ID;
+    local.version = 0;
+
+    // Beginning our initialization phases:
+    if (call RadioControl.start() != SUCCESS)
+      fatal_problem();
+
+    if (call RoutingControl.start() != SUCCESS)
+      fatal_problem();
+
+    startTimer();
+  }
+
+  event void RadioControl.startDone(error_t error) {
+    //dbg("App", "Radio control start done.\n");
+    if (error != SUCCESS)
+      fatal_problem();
+
+    if (sizeof(local) > call Send.maxPayloadLength())
+      fatal_problem();
+
+    if (call SerialControl.start() != SUCCESS)
+      fatal_problem();
+
+    running = TRUE;
+    call OnOffTimer.startOneShot(19 + (call Random.rand32() % 173));
+  }
+
+  event void SerialControl.startDone(error_t error) {
+    if (error != SUCCESS)
+      fatal_problem();
+
+    // This is how to set yourself as a root to the collection layer:
+    if (local.id % 500 == 0)
+      call RootControl.setRoot();
+    
+
+  }
+
+
+  event void OnOffTimer.fired() {
+    if (running) {
+      call RadioControl.stop();
+    }
+    else {
+      call RadioControl.start();
+    }
+    
+  }
+  
+  static void startTimer() {
+    dbg("App", "Starting timer.\n");
+    if (call Timer.isRunning()) call Timer.stop();
+    call Timer.startPeriodic(local.interval);
+    reading = 0;
+  }
+
+  event void RadioControl.stopDone(error_t error) {
+    //dbg("App", "Radio control stop done.\n");
+    running = FALSE;
+    call OnOffTimer.startOneShot(3);
+  }
+  event void SerialControl.stopDone(error_t error) { }
+
+  //
+  // Only the root will receive messages from this interface; its job
+  // is to forward them to the serial uart for processing on the pc
+  // connected to the sensor network.
+  //
+  event message_t*
+  Receive.receive(message_t* msg, void *payload, uint8_t len) {
+    oscilloscope_t* in = (oscilloscope_t*)payload;
+    oscilloscope_t* out;
+    if (uartbusy == FALSE) {
+      out = (oscilloscope_t*)call SerialSend.getPayload(&uartbuf, sizeof(oscilloscope_t));
+      if (out == NULL) {
+	fatal_problem();
+	return msg;
+      }
+      else {
+	memcpy(out, in, sizeof(oscilloscope_t));
+      }
+      uartlen = sizeof(oscilloscope_t);
+      post uartSendTask();
+    } else {
+      // The UART is busy; queue up messages and service them when the
+      // UART becomes free.
+      message_t *newmsg = call UARTMessagePool.get();
+      if (newmsg == NULL) {
+        // drop the message on the floor if we run out of queue space.
+        report_problem();
+        return msg;
+      }
+
+      //Prepare message to be sent over the uart
+      out = (oscilloscope_t*)call SerialSend.getPayload(newmsg, sizeof(oscilloscope_t));
+      if (out == NULL) {
+	fatal_problem();
+	return msg;
+      }
+      memcpy(out, in, sizeof(oscilloscope_t));
+
+      if (call UARTQueue.enqueue(newmsg) != SUCCESS) {
+        // drop the message on the floor and hang if we run out of
+        // queue space without running out of queue space first (this
+        // should not occur).
+        call UARTMessagePool.put(newmsg);
+        fatal_problem();
+        return msg;
+      }
+    }
+
+    return msg;
+  }
+
+  task void uartSendTask() {
+    if (call SerialSend.send(0xffff, &uartbuf, uartlen) != SUCCESS) {
+      report_problem();
+    } else {
+      uartbusy = TRUE;
+    }
+  }
+
+  event void SerialSend.sendDone(message_t *msg, error_t error) {
+    uartbusy = FALSE;
+    if (call UARTQueue.empty() == FALSE) {
+      // We just finished a UART send, and the uart queue is
+      // non-empty.  Let's start a new one.
+      message_t *queuemsg = call UARTQueue.dequeue();
+      if (queuemsg == NULL) {
+        fatal_problem();
+        return;
+      }
+      memcpy(&uartbuf, queuemsg, sizeof(message_t));
+      if (call UARTMessagePool.put(queuemsg) != SUCCESS) {
+        fatal_problem();
+        return;
+      }
+      post uartSendTask();
+    }
+  }
+
+  //
+  // Overhearing other traffic in the network.
+  //
+  event message_t* 
+  Snoop.receive(message_t* msg, void* payload, uint8_t len) {
+    oscilloscope_t *omsg = payload;
+
+    report_received();
+
+    // If we receive a newer version, update our interval. 
+    if (omsg->version > local.version) {
+      local.version = omsg->version;
+      local.interval = omsg->interval;
+      startTimer();
+    }
+
+    // If we hear from a future count, jump ahead but suppress our own
+    // change.
+    if (omsg->count > local.count) {
+      local.count = omsg->count;
+      suppress_count_change = TRUE;
+    }
+
+    return msg;
+  }
+
+  /* At each sample period:
+     - if local sample buffer is full, send accumulated samples
+     - read next sample
+  */
+  event void Timer.fired() {
+    if (reading == NREADINGS) {
+      if (!sendbusy) {
+	oscilloscope_t *o = (oscilloscope_t *)call Send.getPayload(&sendbuf, sizeof(oscilloscope_t));
+	if (o == NULL) {
+	  fatal_problem();
+	  return;
+	}
+	memcpy(o, &local, sizeof(local));
+	if (call Send.send(&sendbuf, sizeof(local)) == SUCCESS) {
+	  sendbusy = TRUE;
+	  dbg("App", "Sending data packet.\n");
+	}
+        else {
+	  dbg("App", "Data packet send failed.\n");
+          report_problem();
+	}
+      }
+      
+      reading = 0;
+      /* Part 2 of cheap "time sync": increment our count if we didn't
+         jump ahead. */
+      if (!suppress_count_change)
+        local.count++;
+      suppress_count_change = FALSE;
+    }
+
+    if (call Read.read() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void Send.sendDone(message_t* msg, error_t error) {
+    dbg("App", "App-level send done.\n");
+    if (error == SUCCESS)
+      report_sent();
+    else
+      report_problem();
+
+    sendbusy = FALSE;
+  }
+
+  event void Read.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS) {
+      data = 0xffff;
+      report_problem();
+    }
+    local.readings[reading++] = data;
+  }
+
+
+  // Use LEDs to report various status issues.
+  static void fatal_problem() { 
+    call Leds.led0On(); 
+    call Leds.led1On();
+    call Leds.led2On();
+    call Timer.stop();
+  }
+
+  static void report_problem() { call Leds.led0Toggle(); }
+  static void report_sent() { call Leds.led1Toggle(); }
+  static void report_received() { call Leds.led2Toggle(); }
+}
diff --git a/apps/tests/TestMultihopLqi/README.txt b/apps/tests/TestMultihopLqi/README.txt
new file mode 100644
index 00000000..0fb66ca9
--- /dev/null
+++ b/apps/tests/TestMultihopLqi/README.txt
@@ -0,0 +1,24 @@
+README for TestMultihopLqi
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+TestMultihopLqi is a hacked-up version of MultihopOscilloscope whose purpose
+is to test the LQI code in lib/net/lqi. It achieves this by creating a 
+CC2420ActiveMessageC component that generates synthetic LQI values. These
+values have no resemblance to those found in the real world, and so are of
+no use whatsoever when evaluating the effectiveness of a protocol that uses
+them. They can be, however, useful for testing code, which is exactly
+what this application does.
+
+Known bugs/limitations:
+
+This application is solely intended as a mechanism to test code paths
+in lib/net/lqi. It is therefore of no predictive or quantitative value.
+
+Notes:
+
+TestMultihopLqi configures a mote whose TOS_NODE_ID modulo 500 is zero 
+to be a collection root. The TOSSIM script "script.py" is a sample
+driver program.
+
diff --git a/apps/tests/TestMultihopLqi/log.txt b/apps/tests/TestMultihopLqi/log.txt
new file mode 100644
index 00000000..f2c67bc0
--- /dev/null
+++ b/apps/tests/TestMultihopLqi/log.txt
@@ -0,0 +1,47196 @@
+time:  0.242393016815
+Inserting first element.
+Inserting first element.
+Inserting first element.
+Inserting first element.
+Inserting first element.
+Inserting first element.
+Inserting first element.
+time:  -0.152559995651
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:0:6.006975455
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:0:6.006975455
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:6.006975455
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:0:6.006975455
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:6.009454572
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:0:6.009454572
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:0:6.009454572
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:0:6.009454572
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:0:6.010101149
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:0:6.011827604
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:0:6.011827604
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:6.013940630
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:0:6.013940630
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:0:6.013940630
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:0:6.013940630
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:0:6.016046331
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:6.016046331
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:0:6.016847716
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:0:6.016847716
+DEBUG (0): LQI Root is receiving packet from node 6 @0:0:6.022454985
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:0:6.022454985
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:0:6.023446800
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:0:6.024873792
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:0:6.024873792
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:6.024873792
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:0:6.024873792
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:0:6.025835090
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:0:6.025835090
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:0:6.028413811
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:0:6.028413811
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:6.028413811
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:0:6.028413811
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:0:6.028413811
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:0:6.028413811
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:0:6.031343481
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:0:6.031343481
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:0:6.031343481
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:6.031343481
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:0:6.031343481
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:0:6.034013754
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:0:6.034013754
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:6.034013754
+DEBUG (0): LQI Root is receiving packet from node 6 @0:0:6.034395221
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:0:6.036043161
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:0:6.036043161
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:0:6.036043161
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:0:6.037584289
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:0:6.037584289
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:0:6.042116123
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:6.042116123
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:0:6.042116123
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:0:6.042116123
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:0:6.044053978
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:0:6.044053978
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:0:6.044053978
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:6.044053978
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:6.044542257
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:0:6.048936762
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:0:6.048936762
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:0:6.048936762
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:6.048936762
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:6.048936762
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:0:6.048936762
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:0:6.058534484
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:6.058534484
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:0:6.058534484
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:6.058534484
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:0:6.058534484
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:0:6.058534484
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:0:11.006671824
+DEBUG (0): LQI Root is receiving packet from node 4 @0:0:11.006671824
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:0:11.006671824
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:0:11.007662097
+DEBUG (0): LQI Root is receiving packet from node 6 @0:0:11.008638535
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:0:11.008638535
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:0:11.008638535
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:0:11.009195174
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:0:11.011690394
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:0:11.011690394
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:11.011690394
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:0:11.011690394
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:0:11.011690394
+DEBUG (0): LQI Root is receiving packet from node 6 @0:0:11.014848826
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:0:11.015588570
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:0:11.016809266
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:11.016809266
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:0:11.016809266
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:0:11.019701093
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:0:11.019701093
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:11.019701093
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:0:11.021903781
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:11.021903781
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:0:11.021903781
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:0:11.021903781
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:0:11.021903781
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:0:11.023507835
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:11.025827157
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:0:11.025827157
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:0:11.025827157
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:0:11.025827157
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:0:11.029426320
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:0:11.029426320
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:11.029426320
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:0:11.029426320
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:0:11.029426320
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:0:11.031602879
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:11.031602879
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:0:11.031602879
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:0:11.031602879
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:0:11.032739348
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:0:11.032739348
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:0:11.035041522
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:0:11.035041522
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:0:11.035041522
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:11.035041522
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:0:11.035041522
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:0:11.038749386
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:11.038749386
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:0:11.038749386
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:0:11.038749386
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:0:11.047448735
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:0:11.047448735
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:0:11.047448735
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:11.047448735
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:0:11.047448735
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:0:11.047448735
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:16.008041225
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:16.008041225
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:0:16.008041225
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:0:16.008203359
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:0:16.010883226
+DEBUG (0): LQI Root is receiving packet from node 4 @0:0:16.010883226
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:0:16.010883226
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:0:16.010883226
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:0:16.011497347
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:16.016544203
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:0:16.016544203
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:0:16.016544203
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:0:16.017427665
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:0:16.019019887
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:16.019019887
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:0:16.019019887
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:0:16.019565426
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:0:16.019565426
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:0:16.023929414
+DEBUG (0): LQI Root is receiving packet from node 4 @0:0:16.023929414
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:0:16.023929414
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:0:16.023929414
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:16.026035115
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:0:16.026035115
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:0:16.026035115
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:0:16.028129330
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:16.028129330
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:0:16.028129330
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:16.028129330
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:0:16.028129330
+DEBUG (0): LQI Root is receiving packet from node 4 @0:0:16.032355990
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:0:16.032355990
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:16.034351106
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:0:16.034351106
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:0:16.034351106
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:0:16.034351106
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:0:16.034671539
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:0:16.041690541
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:0:16.041690541
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:16.041690541
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:0:16.042316148
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:0:16.049838687
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:0:16.049838687
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:16.049838687
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:0:16.049838687
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:0:16.049838687
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 2457.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 2457.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 108 that advertises 2457.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 165 and my cost to 2457.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 2457.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 2457.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 2457.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 2837.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 2837.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 2837.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 2837.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 165 and my cost to 2457.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:0:21.007524650
+DEBUG (0): LQI Root is receiving packet from node 4 @0:0:21.012225991
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:21.014505202
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:0:21.018684195
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:21.020906648
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:21.031219190
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:21.045341144
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:21.057895280
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:21.062762806
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:0:26.011400360
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:0:26.015312022
+DEBUG (0): LQI Root is receiving packet from node 4 @0:0:26.018237919
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:26.028777798
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:26.040849769
+DEBUG (0): LQI Root is receiving packet from node 6 @0:0:26.057361226
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:26.061450557
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:26.069268676
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:26.073693699
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:31.006936887
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:0:31.007545344
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:31.011125822
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:0:31.015062448
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:31.024284138
+DEBUG (0): LQI Root is receiving packet from node 6 @0:0:31.026965895
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:31.028091157
+DEBUG (0): LQI Root is receiving packet from node 4 @0:0:31.034641021
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:31.045093231
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 273.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 2457.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 273.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 165 and my cost to 2457.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 273.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 273.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 273.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 1456.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 2457.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 1456.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 165 and my cost to 2457.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1456.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 2622.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 2457.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2622.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 2622.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 77 that advertises 2622.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 2622.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 273.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:36.015123601
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:0:36.018045220
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:0:36.020210065
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:36.023284666
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:0:36.025443799
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:36.030511578
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:0:36.035281887
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:36.038812311
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:36.046701059
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:0:36.054155238
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:0:36.057559589
+DEBUG (0): LQI Root is receiving packet from node 4 @0:0:36.070468449
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:0:36.079242202
+DEBUG (0): LQI Root is receiving packet from node 6 @0:0:36.087771815
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:0:41.009464166
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:41.011794865
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:0:41.024514909
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:0:41.028037778
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:0:41.034354880
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:0:41.036622991
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:41.038881397
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:0:41.040191306
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:41.043733664
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:0:41.045455557
+DEBUG (0): LQI Root is receiving packet from node 6 @0:0:41.057725892
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:41.066728525
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:41.072343726
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:0:46.006967404
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:0:46.009422164
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:46.011110563
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:0:46.012910971
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:0:46.015434092
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:0:46.022083111
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:46.024706065
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:0:46.026630204
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:46.029937459
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:46.036028020
+DEBUG (0): LQI Root is receiving packet from node 6 @0:0:46.041719515
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:0:46.044753657
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:46.052703440
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 2457.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 300.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 2457.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 300.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 300.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 300.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 300.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 300.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 885.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 885.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 885.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 125 and my cost to 885.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 885.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 300.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 885.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 885.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1554.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 125 and my cost to 885.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 1554.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 1554.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 300.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 1554.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 1554.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:51.006685540
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:0:51.008310170
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:51.015456953
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:0:51.022739235
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:0:51.023856894
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:51.028253291
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:0:51.032108077
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:51.037027043
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:0:51.041129743
+DEBUG (0): LQI Root is receiving packet from node 4 @0:0:51.044442771
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:51.050973495
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:0:51.055009725
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:0:51.062074503
+DEBUG (0): LQI Root is receiving packet from node 6 @0:0:51.083390907
+DEBUG (0): LQI Root is receiving packet from node 1 @0:0:56.006639764
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:0:56.010736303
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:0:56.012412869
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:0:56.012801939
+DEBUG (0): LQI Root is receiving packet from node 2 @0:0:56.016473574
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:0:56.016986706
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:0:56.019395919
+DEBUG (0): LQI Root is receiving packet from node 4 @0:0:56.023914155
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:0:56.026889602
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:0:56.029578907
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:0:56.031589281
+DEBUG (0): LQI Root is receiving packet from node 5 @0:0:56.035251369
+DEBUG (0): LQI Root is receiving packet from node 3 @0:0:56.041339591
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:1.008196151
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:1:1.009317244
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:1.013923481
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:1.016328920
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:1.019464279
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:1:1.020999744
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:1:1.022910855
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:1.030383844
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:1:1.031039968
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:1.036407148
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:1.042178819
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:1:1.043182011
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:1.051166194
+DEBUG (0): LQI Root is receiving packet from node 5 @0:1:1.058261489
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 144.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 125 and my cost to 885.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 144.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 144.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 300.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 144.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 144.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 425.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 885.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 425.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 125 and my cost to 885.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 425.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 144.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:6.006820529
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:6.017290337
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:1:6.022098370
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:1:6.032235811
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:6.034166341
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:6.041343365
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:1:6.045581509
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:6.047855056
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:1:6.055747577
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:1:6.070773623
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:6.079684704
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:6.088702596
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:6.094882369
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 1010.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 885.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1010.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 1010.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 300.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 1010.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 1010.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 144.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:1:11.009509943
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:11.010864084
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:1:11.014983933
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:11.017265136
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:11.018373704
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:1:11.022424467
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:11.025804573
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:11.028413929
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:1:11.030702616
+DEBUG (0): LQI Root is receiving packet from node 5 @0:1:11.035677070
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:11.040315715
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:1:11.046823128
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:11.055444294
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:16.006706116
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:16.018556690
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:16.027785983
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:16.029222640
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:1:16.035144559
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:16.039645875
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:1:16.045098895
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:16.050942977
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:1:16.051456109
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:1:16.055429035
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:16.058124161
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:1:16.058658215
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:1:16.065097387
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:1:16.065097387
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:1:16.065097387
+DEBUG (0): LQI Root is receiving packet from node 5 @0:1:16.065097387
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:16.065097387
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:1:16.065097387
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:1:16.068713699
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:1:16.072284234
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:16.075519079
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:16.083545155
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 125 and my cost to 885.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:21.006509643
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:21.010408663
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:21.012531165
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:21.016450990
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:21.020698344
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:21.028999076
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:21.034059530
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:21.036315596
+DEBUG (0): LQI Root is receiving packet from node 5 @0:1:21.057036911
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 885.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 125 and my cost to 885.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 1728.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 2, my link to 790 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 1728.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 2, my link to 64 and my cost to 1728.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 2518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 64 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 2518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 84 that advertises 2518.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 62 that advertises 2518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:26.010332369
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:26.018710939
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:26.021249547
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:26.024522842
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:26.025504834
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:26.027557102
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:26.030662275
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:26.038698174
+DEBUG (0): LQI Root is receiving packet from node 5 @0:1:26.068010137
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:31.007051749
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:31.011066330
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:31.013116660
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:31.016555579
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:31.019950667
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:31.024207845
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:31.027132080
+DEBUG (0): LQI Root is receiving packet from node 5 @0:1:31.030944534
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:31.038528107
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:36.006914302
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:36.009921927
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:36.012178672
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:36.015435983
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:36.025317956
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:36.026069406
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:36.028594694
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:36.033591945
+DEBUG (0): LQI Root is receiving packet from node 5 @0:1:36.038802764
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 65 that advertises 273.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 790 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 273.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 64 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 273.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 74 that advertises 273.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 1456.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 64 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 1456.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 273.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1456.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 1792.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 790 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1792.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 1792.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 1792.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 1792.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:41.009554176
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:41.016336246
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:41.018676539
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:41.021354468
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:1:41.024326140
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:41.027335878
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:41.037065494
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:41.039401736
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:1:41.050159119
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:1:41.054599401
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:1:41.058642957
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:41.058642957
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:41.058642957
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:1:41.058642957
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:1:41.058642957
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:41.064685402
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:1:41.067599813
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:41.076663481
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:46.006793894
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:1:46.006793894
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:1:46.006793894
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:1:46.006793894
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:1:46.007295888
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:1:46.009918045
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:1:46.010812596
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:1:46.013521438
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:1:46.013521438
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:1:46.013521438
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:1:46.015029709
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:1:46.017602718
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:1:46.017602718
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:1:46.017602718
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:1:46.017602718
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:46.024850600
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:1:46.024850600
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:1:46.024850600
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:46.026842283
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:1:46.026842283
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:1:46.026842283
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:1:46.026842283
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:1:46.026842283
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:1:46.027422113
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:1:46.035646553
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:1:46.035646553
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:1:46.035646553
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:46.035646553
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:1:46.039766283
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:46.042853976
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:1:46.048494260
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:1:46.051353072
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:1:46.051353072
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:46.051353072
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:1:46.051353072
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:1:46.052833166
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:1:46.052833166
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:46.052833166
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:1:46.052833166
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:1:46.052833166
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:1:46.055742142
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:46.057700691
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:46.057700691
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:1:46.057700691
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:1:46.057700691
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:1:46.058448367
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:1:46.060340446
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:46.060340446
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:1:46.060340446
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:46.060340446
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:1:46.060340446
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:1:46.060340446
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:46.064948574
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:1:46.064948574
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:46.064948574
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:1:46.064948574
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:1:46.064948574
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:46.067145826
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:1:46.067145826
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:46.067145826
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:1:46.067145826
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:1:46.067145826
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:1:46.068442816
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:1:51.006553529
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:1:51.006553529
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:1:51.006553529
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:1:51.006553529
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:1:51.009124593
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:51.010469698
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:1:51.011232514
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:1:51.011478315
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:1:51.012780969
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:1:51.016985044
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:51.016985044
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:51.016985044
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:51.019214476
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:1:51.019214476
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:1:51.019214476
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:1:51.019214476
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:51.024722866
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:1:51.024722866
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:1:51.026233478
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:51.027023048
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:1:51.027023048
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:1:51.027023048
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:1:51.027023048
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:1:51.027576243
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:1:51.032291182
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:51.032291182
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:1:51.032291182
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:1:51.033752134
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:1:51.034393000
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:51.034393000
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:1:51.034393000
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:1:51.034393000
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:1:51.035587061
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:1:51.039920532
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:1:51.039920532
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:51.039920532
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:1:51.039920532
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:1:51.039920532
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:1:51.041156486
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:1:51.043380374
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:1:51.043380374
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:51.043380374
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:1:51.043380374
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:1:51.043380374
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:1:51.043872535
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:1:51.053771549
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:1:51.053771549
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:1:51.053771549
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:51.053771549
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:1:51.053771549
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:1:51.053771549
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 1241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 1241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1241.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 1241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 98 that advertises 2197.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 2197.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 2197.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 2197.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 2197.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 3545.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 3545.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 5 @0:1:56.007629240
+DEBUG (0): LQI Root is receiving packet from node 3 @0:1:56.009757856
+DEBUG (0): LQI Root is receiving packet from node 6 @0:1:56.015672796
+DEBUG (0): LQI Root is receiving packet from node 4 @0:1:56.018009038
+DEBUG (0): LQI Root is receiving packet from node 1 @0:1:56.020097937
+DEBUG (0): LQI Root is receiving packet from node 2 @0:1:56.041360514
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:1.006029416
+DEBUG (0): LQI Root is receiving packet from node 3 @0:2:1.008186210
+DEBUG (0): LQI Root is receiving packet from node 4 @0:2:1.013706085
+DEBUG (0): LQI Root is receiving packet from node 6 @0:2:1.016710388
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:1.018762379
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:1.022720094
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:6.007135250
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:6.020174231
+DEBUG (0): LQI Root is receiving packet from node 4 @0:2:6.023334325
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:6.029479698
+DEBUG (0): LQI Root is receiving packet from node 6 @0:2:6.032823575
+DEBUG (0): LQI Root is receiving packet from node 3 @0:2:6.037772829
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 61 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 1621.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 1621.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 1621.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 1621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 111 that advertises 1837.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 106 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1837.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 1837.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1837.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:11.011186857
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:11.011415619
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:2:11.011712860
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:11.027841306
+DEBUG (0): LQI Root is receiving packet from node 6 @0:2:11.032745060
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:11.035266628
+DEBUG (0): LQI Root is receiving packet from node 3 @0:2:11.041389141
+DEBUG (0): LQI Root is receiving packet from node 4 @0:2:11.043430033
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:11.049285491
+DEBUG (0): LQI Root is receiving packet from node 3 @0:2:16.007026548
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:16.011459174
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:16.013780717
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:16.015369283
+DEBUG (0): LQI Root is receiving packet from node 6 @0:2:16.017366512
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:2:16.031839085
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:16.036562075
+DEBUG (0): LQI Root is receiving packet from node 4 @0:2:16.041826326
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:16.050783183
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:21.007707873
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:21.008913192
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:21.010745897
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:2:21.013147178
+DEBUG (0): LQI Root is receiving packet from node 4 @0:2:21.020191033
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:21.025272180
+DEBUG (0): LQI Root is receiving packet from node 3 @0:2:21.037162481
+DEBUG (0): LQI Root is receiving packet from node 6 @0:2:21.039230008
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:21.046950910
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 145.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 106 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 145.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1423 and my cost to 145.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 145.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 145.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 145.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 145.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 125.
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:2:26.011886417
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:26.014009716
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:2:26.014673048
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:2:26.020440836
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:26.022356107
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:2:26.029029594
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:26.031589281
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:26.035394362
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:2:26.039405510
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:2:26.040697064
+DEBUG (0): LQI Root is receiving packet from node 4 @0:2:26.042382847
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:2:26.046174937
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:26.050057973
+DEBUG (0): LQI Root is receiving packet from node 6 @0:2:26.056756542
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 1051.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 106 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 1051.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 1051.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 1051.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 145.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 1051.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 90 that advertises 1051.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 1943.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 1051.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 1943.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 1943.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 145.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 1943.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 1943.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:31.007829824
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:2:31.013437093
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:2:31.016341958
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:31.022022077
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:2:31.024192586
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:31.032625330
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:2:31.033256254
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:31.039995282
+DEBUG (0): LQI Root is receiving packet from node 4 @0:2:31.047075319
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:2:31.053348188
+DEBUG (0): LQI Root is receiving packet from node 3 @0:2:31.055849071
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:2:31.058562781
+DEBUG (0): LQI Root is receiving packet from node 6 @0:2:31.068880001
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:2:31.070495084
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:31.076522270
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:36.007585803
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:2:36.012672267
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:2:36.019592061
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:2:36.021615756
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:2:36.027398803
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:36.030427959
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:2:36.039308522
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:36.043033306
+DEBUG (0): LQI Root is receiving packet from node 3 @0:2:36.047097785
+DEBUG (0): LQI Root is receiving packet from node 3 @0:2:36.051089900
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:36.055718951
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:2:36.058032609
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:2:36.073174903
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:2:36.073174903
+DEBUG (0): LQI Root is receiving packet from node 4 @0:2:36.073174903
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:2:36.073174903
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:2:36.073174903
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:2:36.078036764
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:2:36.081643482
+DEBUG (0): LQI Root is receiving packet from node 6 @0:2:36.083316274
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:2:36.083316274
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:2:36.088250499
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:36.089068804
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:36.091088617
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:2:36.095589934
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:36.101214730
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:36.110446243
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 69 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 65534.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 0, my link to 465 and my cost to 65534.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 145.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:41.006229322
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:2:41.007705533
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:41.008745465
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:2:41.008745465
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:2:41.008745465
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:41.011529755
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:2:41.011529755
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:2:41.014391184
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:41.014391184
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:2:41.014391184
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:2:41.014391184
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:41.016832457
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:2:41.017320854
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:2:41.017320854
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:2:41.020354996
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:2:41.020967683
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:2:41.023012349
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:41.023012349
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:2:41.023012349
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:2:41.023012349
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:2:41.023012349
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:2:41.025459058
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:41.028413929
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:2:41.028413929
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:2:41.029214589
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:2:41.031684608
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:41.037133854
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:41.037133854
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:2:41.037133854
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:2:41.037133854
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:2:41.037133854
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:2:41.037133854
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:41.039491627
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:2:41.039491627
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:41.042749056
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:2:41.042749056
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:2:41.042749056
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:41.042749056
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:2:41.043557767
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:2:41.043557767
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:2:41.046708992
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:2:41.047599432
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:41.051363014
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:41.051363014
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:2:41.051363014
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:2:41.053811613
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:41.053811613
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:2:41.053811613
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:2:41.053811613
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:2:41.055635331
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:2:41.059091123
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:2:41.059091123
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:2:41.062852815
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:2:41.065742026
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:2:41.072755593
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:2:41.072755593
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:41.072755593
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:2:41.073829137
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:41.079820371
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:2:41.081193654
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 270.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 1518 and my cost to 270.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 270.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 1241 and my cost to 270.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 270.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 76 and my cost to 270.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 270.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 4, my link to 1728 and my cost to 270.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 270.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 1511.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 1518 and my cost to 270.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1511.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 76 and my cost to 270.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 1511.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 145.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 77 that advertises 1511.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 4, my link to 1728 and my cost to 270.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 1511.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 5, my link to 790 and my cost to 1511.
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:2:46.009490801
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:2:46.011798748
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:2:46.016242803
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:2:46.017107114
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:46.020364543
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:2:46.027015445
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:2:46.027581908
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:2:46.030099593
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:2:46.034402547
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:2:46.036964118
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:2:46.040002490
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:2:46.044395105
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:2:46.048608396
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:2:46.056130935
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:2:46.058656672
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:2:46.065538346
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:2:46.065538346
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:46.065538346
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:2:46.065538346
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:2:46.067086682
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:2:46.073884855
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:2:46.085344139
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:46.092751815
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:2:46.110917720
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:2:51.009803632
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:2:51.011415737
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:2:51.012176333
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:2:51.013628130
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:2:51.017503958
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:51.017503958
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:2:51.017503958
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:2:51.017503958
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:2:51.022340966
+DEBUG (0): LQI Root is receiving packet from node 6 @0:2:51.024919687
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:51.024919687
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:2:51.024919687
+DEBUG (0): LQI Root is receiving packet from node 6 @0:2:51.029329451
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:2:51.029329451
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:2:51.029329451
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:2:51.029329451
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:2:51.029329451
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:2:51.032123336
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:2:51.035387155
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:2:51.042026232
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:2:51.042026232
+DEBUG (0): LQI Root is receiving packet from node 6 @0:2:51.042026232
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:51.042026232
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:2:51.044259667
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:2:51.050515734
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:2:51.050515734
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:2:51.050515734
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:2:51.052720920
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:2:51.052720920
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:2:51.052720920
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:51.056581371
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:2:51.056581371
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:2:51.056581371
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:2:51.058290345
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:51.058587586
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:2:51.059426815
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:2:51.061113205
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:2:51.061113205
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:2:51.069261351
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:2:51.069261351
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:51.069261351
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:2:51.069261351
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:2:51.069261351
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:2:51.073716891
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:2:51.073716891
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:51.073716891
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:51.073716891
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:2:51.074968104
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:51.076646561
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:2:51.076646561
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:2:51.076646561
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:2:51.076646561
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:51.076646561
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:51.079942441
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:2:51.079942441
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:51.079942441
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:2:51.084138583
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:2:51.084138583
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:2:51.084138583
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:2:51.084138583
+DEBUG (0): LQI Root is receiving packet from node 2 @0:2:51.084138583
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:2:51.084138583
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:2:51.089524904
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:2:51.095353728
+DEBUG (0): LQI Root is receiving packet from node 4 @0:2:56.007144844
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:2:56.007144844
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:56.007144844
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:2:56.007144844
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:2:56.007144844
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:56.010317111
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:2:56.010317111
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:2:56.010317111
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:2:56.011535467
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:56.017626028
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:2:56.017626028
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:2:56.017626028
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:2:56.018350394
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:2:56.019721787
+DEBUG (0): LQI Root is receiving packet from node 4 @0:2:56.019721787
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:2:56.019721787
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:2:56.020235266
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:2:56.020507583
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:56.024863969
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:2:56.024863969
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:2:56.024863969
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:2:56.025445690
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:2:56.027831759
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:56.027831759
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:2:56.027831759
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:2:56.027831759
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:2:56.027831759
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:2:56.031242105
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:56.031242105
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:2:56.031242105
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:2:56.031242105
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:2:56.033446960
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:56.033446960
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:56.034280477
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:2:56.034280477
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:2:56.036208785
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:2:56.036208785
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:2:56.036208785
+DEBUG (0): LQI Root is receiving packet from node 1 @0:2:56.036208785
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:2:56.036208785
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:2:56.036208785
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:2:56.041145002
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:56.041145002
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:2:56.041145002
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:2:56.045066487
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:2:56.045066487
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:56.045066487
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:2:56.045066487
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:2:56.045066487
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:56.048295897
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:2:56.048295897
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:2:56.048295897
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:2:56.048295897
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:2:56.052446263
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:2:56.052446263
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:2:56.052446263
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:2:56.052446263
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:2:56.053163422
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:56.055650590
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:2:56.055650590
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:2:56.055650590
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:2:56.058442932
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:2:56.058442932
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:2:56.058442932
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:2:56.058442932
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:2:56.063264681
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:2:56.063264681
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:2:56.063264681
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:56.063264681
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:2:56.063264681
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:2:56.063264681
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:2:56.070253166
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:2:56.070253166
+DEBUG (0): LQI Root is receiving packet from node 5 @0:2:56.070253166
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:2:56.070253166
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:2:56.070253166
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:2:56.078813297
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:2:56.078813297
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:56.078813297
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:2:56.078813297
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:2:56.078813297
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:2:56.086717303
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:2:56.086717303
+DEBUG (0): LQI Root is receiving packet from node 4 @0:2:56.086717303
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:2:56.086717303
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 61 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 5131 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 1241.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 1241.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1241.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 1241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 5131 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 1241.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1241.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 2031.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 2031.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 2031.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1241.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 2031.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 2031.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 2031.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 2760.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 1241.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 2760.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 78 that advertises 2760.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 2760.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:3:1.006570678
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:3:1.009979080
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:3:1.012132778
+DEBUG (0): LQI Root is receiving packet from node 1 @0:3:1.024370373
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:3:1.027377880
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:3:1.035037748
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:3:1.044028896
+DEBUG (0): LQI Root is receiving packet from node 4 @0:3:1.047698586
+DEBUG (0): LQI Root is receiving packet from node 6 @0:3:1.066237907
+DEBUG (0): LQI Root is receiving packet from node 3 @0:3:1.094115552
+DEBUG (0): LQI Root is receiving packet from node 1 @0:3:6.007509510
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:3:6.011264693
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:3:6.013933304
+DEBUG (0): LQI Root is receiving packet from node 2 @0:3:6.017099181
+DEBUG (0): LQI Root is receiving packet from node 4 @0:3:6.023736715
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:3:6.026458476
+DEBUG (0): LQI Root is receiving packet from node 5 @0:3:6.032043160
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:3:6.034440997
+DEBUG (0): LQI Root is receiving packet from node 6 @0:3:6.051500224
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:3:6.052421181
+DEBUG (0): LQI Root is receiving packet from node 3 @0:3:6.058570437
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:3:11.007953555
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:3:11.010240699
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:3:11.014457535
+DEBUG (0): LQI Root is receiving packet from node 1 @0:3:11.018541550
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:3:11.021349033
+DEBUG (0): LQI Root is receiving packet from node 2 @0:3:11.028863639
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:3:11.030791947
+DEBUG (0): LQI Root is receiving packet from node 5 @0:3:11.071526964
+DEBUG (0): LQI Root is receiving packet from node 3 @0:3:11.079034244
+DEBUG (0): LQI Root is receiving packet from node 6 @0:3:11.087014544
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 243.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 243.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 76 that advertises 243.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 243.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 1366.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 2031.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 1366.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 1366.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 1366.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1366.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 2759.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 2031.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2759.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 2759.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 2759.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 2759.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 243.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:3:16.006609247
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:3:16.009632012
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:3:16.010469579
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:3:16.011880705
+DEBUG (0): LQI Root is receiving packet from node 4 @0:3:16.014682642
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:3:16.022127226
+DEBUG (0): LQI Root is receiving packet from node 2 @0:3:16.025195886
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:3:16.027328222
+DEBUG (0): LQI Root is receiving packet from node 6 @0:3:16.034702056
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:3:16.049003232
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:3:16.052337231
+DEBUG (0): LQI Root is receiving packet from node 5 @0:3:16.058410194
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:3:16.061492451
+DEBUG (0): LQI Root is receiving packet from node 3 @0:3:16.069625338
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:3:21.007694157
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:3:21.016479286
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:3:21.020647132
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:3:21.026145699
+DEBUG (0): LQI Root is receiving packet from node 4 @0:3:21.038240532
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:3:21.041429482
+DEBUG (0): LQI Root is receiving packet from node 1 @0:3:21.047151612
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:3:21.051126082
+DEBUG (0): LQI Root is receiving packet from node 6 @0:3:21.058320981
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:3:21.062112346
+DEBUG (0): LQI Root is receiving packet from node 2 @0:3:21.067415166
+DEBUG (0): LQI Root is receiving packet from node 5 @0:3:21.075349690
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:3:21.082604780
+DEBUG (0): LQI Root is receiving packet from node 3 @0:3:21.088097912
+DEBUG (0): LQI Root is receiving packet from node 1 @0:3:26.009996678
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:3:26.014337356
+DEBUG (0): LQI Root is receiving packet from node 2 @0:3:26.022821193
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:3:26.031348916
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:3:26.034469293
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:3:26.036857307
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:3:26.042487767
+DEBUG (0): LQI Root is receiving packet from node 3 @0:3:26.045447955
+DEBUG (0): LQI Root is receiving packet from node 5 @0:3:26.049506769
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:3:26.051866433
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:3:26.055636993
+DEBUG (0): LQI Root is receiving packet from node 4 @0:3:26.060855468
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:3:26.064059795
+DEBUG (0): LQI Root is receiving packet from node 6 @0:3:26.070224310
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 277.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 277.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 277.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 277.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 1076 and my cost to 277.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 277.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 277.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 2031.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 1169.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1169.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 1169.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1076 and my cost to 277.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 1169.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 277.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 90 that advertises 1169.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 1959.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1076 and my cost to 277.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 1959.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 1959.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 277.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 1959.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:3:31.008354055
+DEBUG (0): LQI Root is receiving packet from node 1 @0:3:31.011202115
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:3:31.014591090
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:3:31.021837311
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:3:31.024057148
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:3:31.026750612
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:3:31.030221663
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:3:31.032226264
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:3:31.038848540
+DEBUG (0): LQI Root is receiving packet from node 6 @0:3:31.042621322
+DEBUG (0): LQI Root is receiving packet from node 2 @0:3:31.049243597
+DEBUG (0): LQI Root is receiving packet from node 5 @0:3:31.057895280
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:3:36.007999331
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:3:36.011140962
+DEBUG (0): LQI Root is receiving packet from node 1 @0:3:36.011842981
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:3:36.020942483
+DEBUG (0): LQI Root is receiving packet from node 4 @0:3:36.026933835
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:3:36.030252180
+DEBUG (0): LQI Root is receiving packet from node 3 @0:3:36.036508247
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:3:36.037004459
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:3:36.038604401
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:3:36.044854756
+DEBUG (0): LQI Root is receiving packet from node 6 @0:3:36.048921503
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:3:36.053536956
+DEBUG (0): LQI Root is receiving packet from node 2 @0:3:36.058351380
+DEBUG (0): LQI Root is receiving packet from node 5 @0:3:36.063249423
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:3:41.009010179
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:3:41.015399801
+DEBUG (0): LQI Root is receiving packet from node 1 @0:3:41.018724654
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:3:41.022981713
+DEBUG (0): LQI Root is receiving packet from node 4 @0:3:41.023287006
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:3:41.029123036
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:3:41.031679172
+DEBUG (0): LQI Root is receiving packet from node 2 @0:3:41.035745312
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:3:41.043069488
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:3:41.044433224
+DEBUG (0): LQI Root is receiving packet from node 6 @0:3:41.046243298
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:3:41.062057023
+DEBUG (0): LQI Root is receiving packet from node 3 @0:3:41.065606588
+DEBUG (0): LQI Root is receiving packet from node 5 @0:3:41.072625590
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 63 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1169.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1076 and my cost to 277.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 125.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 277.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 125.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 402.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 926 and my cost to 402.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 402.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1076 and my cost to 277.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 402.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 402.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 402.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 402.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:3:46.020660170
+DEBUG (0): LQI Root is receiving packet from node 1 @0:3:46.024889169
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:3:46.027139405
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:3:46.028877007
+DEBUG (0): LQI Root is receiving packet from node 2 @0:3:46.034784014
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:3:46.039613696
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:3:46.042941754
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:3:46.047769168
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:3:46.053155489
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:3:46.056169386
+DEBUG (0): LQI Root is receiving packet from node 5 @0:3:46.060327078
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:3:46.064241238
+DEBUG (0): LQI Root is receiving packet from node 3 @0:3:46.069940059
+DEBUG (0): LQI Root is receiving packet from node 6 @0:3:46.077966135
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:3:46.082704265
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:3:46.092408798
+DEBUG (0): LQI Root is receiving packet from node 4 @0:3:46.100312805
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 1353.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 926 and my cost to 402.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1353.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 402.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 1353.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 277.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 1353.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 1353.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:3:51.010515356
+DEBUG (0): LQI Root is receiving packet from node 1 @0:3:51.012453329
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:3:51.014322097
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:3:51.015579023
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:3:51.021686385
+DEBUG (0): LQI Root is receiving packet from node 2 @0:3:51.027398803
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:3:51.032516180
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:3:51.038749386
+DEBUG (0): LQI Root is receiving packet from node 5 @0:3:51.046126940
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:3:51.047690984
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:3:51.051047898
+DEBUG (0): LQI Root is receiving packet from node 3 @0:3:51.057166637
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:3:51.061515366
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:3:51.066565996
+DEBUG (0): LQI Root is receiving packet from node 6 @0:3:51.090064394
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:3:51.098899181
+DEBUG (0): LQI Root is receiving packet from node 4 @0:3:51.102805408
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:3:56.007114327
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:3:56.009179916
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:3:56.010154582
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:3:56.011537688
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:3:56.013351252
+DEBUG (0): LQI Root is receiving packet from node 2 @0:3:56.035219309
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:3:56.037543948
+DEBUG (0): LQI Root is receiving packet from node 1 @0:3:56.042924953
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:3:56.046058303
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:3:56.048408143
+DEBUG (0): LQI Root is receiving packet from node 3 @0:3:56.056688300
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:3:56.062415629
+DEBUG (0): LQI Root is receiving packet from node 5 @0:3:56.065278948
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:3:56.069068423
+DEBUG (0): LQI Root is receiving packet from node 4 @0:3:56.071275617
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:3:56.073096719
+DEBUG (0): LQI Root is receiving packet from node 6 @0:3:56.078833991
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 68 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 926 and my cost to 402.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 402.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 277.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:1.006944938
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:4:1.018914966
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:4:1.021791535
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:4:1.028030122
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:1.036569282
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:4:1.039722169
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:4:1.044540035
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:4:1.052726355
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:4:1.059760616
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:4:1.061728988
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:4:1.075560972
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:4:1.080176756
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:4:1.081382193
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:1.084685675
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:4:1.086158167
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:1.091887781
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:1.096740048
+DEBUG (0): LQI Root is receiving packet from node 4 @0:4:1.102858787
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 215.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 926 and my cost to 402.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 215.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 1331 and my cost to 215.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 215.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 402.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 215.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 215.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 215.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 492.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 5, my link to 380 and my cost to 492.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 492.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 5, my link to 42 and my cost to 492.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 492.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 215.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 492.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 492.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 872.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 42 and my cost to 492.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 872.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 402.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 58 that advertises 872.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:6.007372063
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:6.009966161
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:4:6.018691797
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:4:6.023334325
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:4:6.026099923
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:4:6.034232810
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:4:6.038760870
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:4:6.050128602
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:4:6.052692064
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:4:6.055123861
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:6.060784839
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:4:6.068658328
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:4:6.086978362
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:6.094079322
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:4:6.095437347
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:4:6.101220394
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:4:6.106133695
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:4:6.108926037
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:4:6.108926037
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:4:6.108926037
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:4:6.108926037
+DEBUG (0): LQI Root is receiving packet from node 4 @0:4:6.108926037
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:4:6.116906338
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:4:6.121010928
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:4:6.127984154
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:4:11.005969924
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:11.007814566
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:11.009361129
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:4:11.009361129
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:4:11.010171731
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:4:11.010171731
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:4:11.011278409
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:4:11.011278409
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:11.011278409
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:4:11.011278409
+DEBUG (0): LQI Root is receiving packet from node 4 @0:4:11.014991590
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:4:11.014991590
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:4:11.014991590
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:4:11.014991590
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:11.023536462
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:4:11.023536462
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:4:11.023536462
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:4:11.023536462
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:4:11.027147339
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:11.027147339
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:4:11.027147339
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:4:11.027147339
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:4:11.027147339
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:4:11.028098813
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:4:11.029685718
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:4:11.029685718
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:11.029685718
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:4:11.033347806
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:4:11.034171776
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:4:11.034171776
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:4:11.037065494
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:4:11.050132376
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:4:11.057603704
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:4:11.058509402
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:4:11.064576930
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:4:11.065871698
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:4:11.070556119
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:4:11.070556119
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:4:11.070556119
+DEBUG (0): LQI Root is receiving packet from node 5 @0:4:11.070556119
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:4:11.070556119
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:4:11.072786110
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:4:11.072786110
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:11.072786110
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:4:11.072786110
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:4:11.072786110
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:4:11.072786110
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:4:11.075896664
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:4:11.075896664
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:11.075896664
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:4:11.075896664
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:4:11.077788743
+DEBUG (0): LQI Root is receiving packet from node 5 @0:4:11.079268836
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:4:11.079268836
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:4:11.079268836
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:4:11.079268836
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:4:11.081679711
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:4:11.081679711
+DEBUG (0): LQI Root is receiving packet from node 5 @0:4:11.081679711
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:4:11.087416982
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:4:11.087416982
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:4:11.087416982
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:4:11.089797339
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:4:11.097655570
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:4:11.106963377
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:16.007723132
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:4:16.009164657
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:4:16.009164657
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:4:16.009164657
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:4:16.010072853
+DEBUG (0): LQI Root is receiving packet from node 4 @0:4:16.010623828
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:4:16.010623828
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:4:16.013282615
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:4:16.013282615
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:16.013282615
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:4:16.013282615
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:4:16.013282615
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:4:16.016183659
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:4:16.016183659
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:16.016183659
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:4:16.016183659
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:4:16.017458064
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:4:16.020026961
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:4:16.020026961
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:16.020730751
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:4:16.024049822
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:4:16.024049822
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:4:16.024049822
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:16.027612425
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:4:16.027612425
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:4:16.027612425
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:16.027612425
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:4:16.029605650
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:4:16.029605650
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:4:16.033555993
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:4:16.033555993
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:4:16.033555993
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:4:16.033555993
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:4:16.033555993
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:16.037204483
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:4:16.037204483
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:4:16.037204483
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:4:16.037204483
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:4:16.037889463
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:4:16.040956462
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:4:16.040956462
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:4:16.040956462
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:16.040956462
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:4:16.046174937
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:16.046174937
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:4:16.046174937
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:16.046174937
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:4:16.046174937
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:4:16.046174937
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:4:16.052537815
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:16.052537815
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:4:16.052537815
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:16.052537815
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:4:16.052537815
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 65 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:4:21.009660987
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:21.009660987
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:4:21.009660987
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:4:21.009660987
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:4:21.015413516
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:4:21.015413516
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:4:21.015413516
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:4:21.017580252
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:4:21.017580252
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:4:21.017580252
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:4:21.017580252
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:4:21.021089753
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:4:21.021089753
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:4:21.021089753
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:4:21.022981832
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:4:21.022981832
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:4:21.022981832
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:4:21.031709808
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:21.031709808
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:4:21.040041058
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:4:21.040041058
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:4:21.040041058
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:21.040041058
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:4:26.006263613
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:4:26.006263613
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:4:26.006263613
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:4:26.006263613
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:4:26.006792233
+DEBUG (0): LQI Root is receiving packet from node 4 @0:4:26.010471241
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:4:26.010471241
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:4:26.010471241
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:4:26.011667084
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:4:26.012695128
+DEBUG (0): LQI Root is receiving packet from node 5 @0:4:26.012695128
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:4:26.012695128
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:4:26.012695128
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:4:26.012695128
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:4:26.015688055
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:26.015688055
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:4:26.015688055
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:26.017656545
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:4:26.017656545
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:4:26.018747120
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:4:26.018747120
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:4:26.021060778
+DEBUG (0): LQI Root is receiving packet from node 5 @0:4:26.021060778
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:4:26.021060778
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:4:26.022707057
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:4:26.023675681
+DEBUG (0): LQI Root is receiving packet from node 5 @0:4:26.023675681
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:4:26.023675681
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:26.025741317
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:4:26.025741317
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:4:26.025741317
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:26.025741317
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:4:26.026735472
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:4:26.029344591
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:4:26.029344591
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:26.029344591
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:4:26.029344591
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:4:26.030672216
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:4:26.033008341
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:4:26.033008341
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:4:26.033008341
+DEBUG (0): LQI Root is receiving packet from node 4 @0:4:26.033327230
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:26.037463881
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:4:26.037463881
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:4:26.037463881
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:4:26.037463881
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:4:26.041579847
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:26.041579847
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:4:26.041579847
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:4:26.041579847
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:4:26.047851173
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:4:26.047851173
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:4:26.047851173
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:26.047851173
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:26.048263158
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:4:31.005943181
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:4:31.005943181
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:4:31.005943181
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:31.005943181
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:4:31.005943181
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:4:31.005943181
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:31.009240950
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:4:31.009240950
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:4:31.011491912
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:31.011491912
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:4:31.011491912
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:31.011491912
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:4:31.011491912
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:31.016565126
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:4:31.016565126
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:4:31.016565126
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:4:31.019106122
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:4:31.019106122
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:31.019106122
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:4:31.019106122
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:4:31.019106122
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:4:31.020923450
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:4:31.023324730
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:4:31.023324730
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:31.023324730
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:31.023324730
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:4:31.023324730
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:4:31.023324730
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:4:31.026864749
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:31.026864749
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:4:31.026864749
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:4:31.027942452
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:4:31.029260365
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:4:31.029260365
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:31.029260365
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:31.029260365
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:4:31.029260365
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:4:31.032617279
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:4:31.032617279
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:4:31.032617279
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:4:31.032617279
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:31.032617279
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:4:31.032617279
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:4:31.037240665
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:31.037240665
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:4:31.037240665
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:4:31.037240665
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 68 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3720 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 72 that advertises 1076.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3720 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 1076.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 1076.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 1837.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 1837.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 1837.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 1837.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 1837.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 104 that advertises 2217.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 2217.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 77 that advertises 2217.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 58 that advertises 2217.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:4:36.006900705
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:36.007707755
+DEBUG (0): LQI Root is receiving packet from node 5 @0:4:36.009872269
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:36.012275541
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:36.015627020
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:36.021554721
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:36.031099460
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:41.006822868
+DEBUG (0): LQI Root is receiving packet from node 4 @0:4:41.010105032
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:41.012412869
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:41.018518240
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:41.027589841
+DEBUG (0): LQI Root is receiving packet from node 5 @0:4:41.032302558
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:41.039140677
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:46.009071214
+DEBUG (0): LQI Root is receiving packet from node 5 @0:4:46.015075486
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:46.018678878
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:46.021035925
+DEBUG (0): LQI Root is receiving packet from node 4 @0:4:46.025058558
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:46.028841054
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:46.039964647
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 243.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 243.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 243.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 1518.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1518.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 2071.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2071.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 2071.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 2071.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 2071.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 243.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:4:51.006244581
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:51.007784048
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:51.010866424
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:4:51.011880705
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:51.026193366
+DEBUG (0): LQI Root is receiving packet from node 5 @0:4:51.031081862
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:51.046561840
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:51.053605924
+DEBUG (0): LQI Root is receiving packet from node 1 @0:4:56.007143301
+DEBUG (0): LQI Root is receiving packet from node 3 @0:4:56.009620527
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:4:56.020669717
+DEBUG (0): LQI Root is receiving packet from node 5 @0:4:56.025634506
+DEBUG (0): LQI Root is receiving packet from node 2 @0:4:56.028054927
+DEBUG (0): LQI Root is receiving packet from node 4 @0:4:56.034381624
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:4:56.038072568
+DEBUG (0): LQI Root is receiving packet from node 6 @0:4:56.042528108
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:1.006858703
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:1.011217374
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:5:1.018502981
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:1.024261223
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:1.034829790
+DEBUG (0): LQI Root is receiving packet from node 4 @0:5:1.045718838
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:5:1.067247202
+DEBUG (0): LQI Root is receiving packet from node 6 @0:5:1.076600785
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 68 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 111 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 333.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1518 and my cost to 333.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 333.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 380 and my cost to 333.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 333.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 333.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 333.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:5:6.005761967
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:5:6.008605797
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:6.010545991
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:6.021639066
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:5:6.025928304
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:5:6.026979493
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:5:6.028976161
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:5:6.031877536
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:6.039123197
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:5:6.043914429
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:6.045936233
+DEBUG (0): LQI Root is receiving packet from node 4 @0:5:6.048507297
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:5:6.052337231
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:5:6.080733672
+DEBUG (0): LQI Root is receiving packet from node 6 @0:5:6.085021366
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:6.093322099
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 2217.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1518 and my cost to 333.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 2217.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 380 and my cost to 333.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 2217.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 333.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 2217.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 243.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:5:11.006944820
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:5:11.009301985
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:5:11.009830375
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:11.012306059
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:11.014101268
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:5:11.022311992
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:5:11.039600099
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:5:11.041688998
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:5:11.047870314
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:11.050172835
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:5:11.055129573
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:5:11.058795544
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:11.072725194
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:5:11.083865588
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:11.087770272
+DEBUG (0): LQI Root is receiving packet from node 4 @0:5:11.097474805
+DEBUG (0): LQI Root is receiving packet from node 6 @0:5:11.107118303
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:5:16.006601195
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:16.009239060
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:5:16.016025407
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:16.019319744
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:16.021217139
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:5:16.023424216
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:16.028261342
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:5:16.031600658
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:5:16.034151082
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:5:16.037650759
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:16.040931380
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:5:16.043540617
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:5:16.061088122
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:5:16.068503851
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:5:16.068503851
+DEBUG (0): LQI Root is receiving packet from node 4 @0:5:16.068503851
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:5:16.074729400
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 66 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1518 and my cost to 333.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 380 and my cost to 333.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 333.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:21.007394648
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:5:21.007394648
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:5:21.009569434
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:21.009569434
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:5:21.009569434
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:5:21.009569434
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:5:21.015535586
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:21.015535586
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:5:21.015535586
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:5:21.015535586
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:5:21.015535586
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:5:21.018600245
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:5:21.020281042
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:5:21.021629124
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:5:21.031760901
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:5:21.033157045
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:5:21.033157045
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:5:21.033157045
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:5:21.038013194
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:5:21.040147751
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:5:21.042937872
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:5:21.042937872
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:5:21.042937872
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:5:21.042937872
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:5:21.042937872
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:5:21.047900832
+DEBUG (0): LQI Root is receiving packet from node 4 @0:5:21.049544889
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:5:21.050109461
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:5:21.050109461
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:5:21.050109461
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:5:21.052108350
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:21.052108350
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:5:21.052108350
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:5:21.052108350
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:21.056947580
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:5:21.058669591
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:5:21.060111566
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:5:21.060111566
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:5:21.066577481
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:21.066577481
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:5:21.070285345
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:5:21.073106543
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:5:21.073106543
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:21.073106543
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:5:21.073106543
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:5:21.073106543
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:5:21.073106543
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:5:21.079108647
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:5:21.080720634
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:5:21.082093917
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:21.082093917
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:5:21.082093917
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:5:21.082093917
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:5:21.082093917
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:21.088624641
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:5:21.088624641
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:5:21.088624641
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:5:21.088624641
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:5:21.088624641
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:5:26.007140962
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:26.007140962
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:5:26.007140962
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:5:26.008441834
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:5:26.008441834
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:26.009073105
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:26.009073105
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:5:26.010368204
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:26.010368204
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:26.011156339
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:5:26.011156339
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:5:26.011156339
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:26.014459426
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:5:26.014459426
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:5:26.014976331
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:5:26.016822634
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:26.016822634
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:5:26.016822634
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:5:26.016822634
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:5:26.016822634
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:5:26.019685834
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:26.019685834
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:5:26.019685834
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:5:26.019685834
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:26.022342509
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:26.022342509
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:5:26.023643273
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:26.024446549
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:5:26.024446549
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:26.024446549
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:5:26.025581128
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:26.027393139
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:5:26.027393139
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:5:26.027393139
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:5:26.027765012
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:5:26.027765012
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:5:26.031654090
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:26.031654090
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:26.031654090
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:5:26.031654090
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:5:26.031654090
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:5:26.031654090
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:5:26.034295736
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:26.034295736
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:5:26.034295736
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:5:26.034827900
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:5:26.036050486
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:26.036277476
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:5:26.036868792
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:5:26.036868792
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:5:26.041709573
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:5:26.041709573
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:26.041709573
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:5:26.041709573
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:5:26.045419328
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:5:26.045419328
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:26.045419328
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:5:26.045419328
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:5:26.045917201
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:5:26.050515734
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:5:26.050515734
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:5:26.050515734
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:26.050515734
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:5:26.050515734
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:26.050515734
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:5:31.008249135
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:5:31.008249135
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:31.008249135
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:31.008249135
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:31.010230875
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:31.010230875
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:5:31.010806932
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:5:31.010806932
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:5:31.017398690
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:5:31.017398690
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:5:31.017398690
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:5:31.017974639
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:5:31.019904891
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:5:31.019904891
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:31.019904891
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:5:31.019904891
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:5:31.022037335
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:31.022037335
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:5:31.022037335
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:5:31.022037335
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:5:31.022037335
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:31.022707175
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:5:31.024581656
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:5:31.024581656
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:5:31.026008371
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:5:31.026008371
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:31.026008371
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:5:31.027580017
+DEBUG (0): LQI Root is receiving packet from node 4 @0:5:31.027915709
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:5:31.028445989
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:31.033057891
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:5:31.033057891
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:5:31.034061191
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:31.035300919
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:5:31.035300919
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:31.035300919
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:5:31.039344475
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:5:31.039344475
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:31.039344475
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:5:31.039344475
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:31.039344475
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:5:36.007913443
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:36.007913443
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:5:36.007913443
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:5:36.011100621
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:36.011100621
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:5:36.011100621
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:36.011100621
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:5:36.011100621
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:36.015474433
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:5:36.015474433
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:36.015474433
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:5:36.016349614
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:5:36.017524534
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:36.017524534
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:5:36.017524534
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:36.017524534
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:36.020866189
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:5:36.020866189
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:5:36.020866189
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:5:36.024436725
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:5:36.024436725
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:5:36.024436725
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:36.024436725
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:36.024436725
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:5:36.026588202
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:36.026588202
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:36.026588202
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:5:36.026588202
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:5:36.026588202
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:5:36.029395803
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:5:36.029395803
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:5:36.029395803
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:5:36.029395803
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:36.029395803
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:5:36.029395803
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:5:36.033073149
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:5:36.033073149
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:5:36.033073149
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:36.033073149
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:36.033073149
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:5:36.033073149
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:5:36.039878529
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:5:36.039878529
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:5:36.039878529
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:36.039878529
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:5:36.039878529
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:5:36.039878529
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 67 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3906 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 1076.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3906 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 1076.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 1076.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 1728.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 790 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 1728.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 107 that advertises 2518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 2518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 2518.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 72 that advertises 2518.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 2518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:41.008270105
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:41.011911223
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:41.015525644
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:41.021888522
+DEBUG (0): LQI Root is receiving packet from node 4 @0:5:41.028201850
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:41.030962132
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:5:41.043825098
+DEBUG (0): LQI Root is receiving packet from node 6 @0:5:41.053071870
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:5:46.006105591
+DEBUG (0): LQI Root is receiving packet from node 4 @0:5:46.008747008
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:46.010963293
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:46.014184769
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:46.017717580
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:46.021981965
+DEBUG (0): LQI Root is receiving packet from node 6 @0:5:46.029163148
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:46.033187562
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:51.008706896
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:51.011634676
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:51.017722897
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:5:51.026552249
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:51.027435033
+DEBUG (0): LQI Root is receiving packet from node 4 @0:5:51.029590392
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:51.034959911
+DEBUG (0): LQI Root is receiving packet from node 6 @0:5:51.044498142
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 62 that advertises 243.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 790 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 243.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 243.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 243.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 1201.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 790 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 1201.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 1201.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1201.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 2071.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 790 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2071.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 2071.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 2071.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 2071.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 243.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:5:56.007577752
+DEBUG (0): LQI Root is receiving packet from node 5 @0:5:56.010665721
+DEBUG (0): LQI Root is receiving packet from node 2 @0:5:56.018968794
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:5:56.022569729
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:5:56.025306471
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:5:56.028873233
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:5:56.031318399
+DEBUG (0): LQI Root is receiving packet from node 1 @0:5:56.034196976
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:5:56.038745612
+DEBUG (0): LQI Root is receiving packet from node 4 @0:5:56.052064914
+DEBUG (0): LQI Root is receiving packet from node 3 @0:5:56.058046324
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:1.007265371
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:6:1.009431988
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:1.013385652
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:6:1.016351505
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:6:1.019962152
+DEBUG (0): LQI Root is receiving packet from node 4 @0:6:1.027881417
+DEBUG (0): LQI Root is receiving packet from node 2 @0:6:1.037982677
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:1.040511738
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:1.045142781
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:1.055289816
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:1.061500107
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:6.006698459
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:6.009834149
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:6.015581362
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:6.024606461
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:6:6.027299926
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:6.031512988
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:6.038095152
+DEBUG (0): LQI Root is receiving packet from node 4 @0:6:6.044854756
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:6:6.050180042
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:6:6.052325855
+DEBUG (0): LQI Root is receiving packet from node 2 @0:6:6.056191970
+DEBUG (0): LQI Root is receiving packet from node 6 @0:6:6.066522110
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 790 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 349.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 349.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 349.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 972.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 972.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 972.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 972.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 972.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 972.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 972.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1701.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 972.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 1701.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 1701.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 1701.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 58 that advertises 1701.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:11.014343068
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:11.022117403
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:6:11.023990449
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:11.035493966
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:11.036868792
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:6:11.040422408
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:11.043703146
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:6:11.044549582
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:11.066445817
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:6:11.074922328
+DEBUG (0): LQI Root is receiving packet from node 6 @0:6:11.082155070
+DEBUG (0): LQI Root is receiving packet from node 2 @0:6:11.090150629
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:11.094270478
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:6:16.007119991
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:16.009844091
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:16.016395390
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:16.019138182
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:6:16.029008900
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:16.033134184
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:16.035493966
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:16.048418085
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:6:16.050142199
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:16.051162311
+DEBUG (0): LQI Root is receiving packet from node 4 @0:6:16.054719928
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:6:16.056304493
+DEBUG (0): LQI Root is receiving packet from node 6 @0:6:16.063035919
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:16.070894150
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:21.005846312
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:6:21.007898185
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:21.010848826
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:21.014484279
+DEBUG (0): LQI Root is receiving packet from node 2 @0:6:21.017923151
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:6:21.023380101
+DEBUG (0): LQI Root is receiving packet from node 4 @0:6:21.025872933
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:6:21.030992531
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:21.039422659
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:6:21.043275784
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:21.049049008
+DEBUG (0): LQI Root is receiving packet from node 6 @0:6:21.051011945
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:21.056037493
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:21.064414519
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 972.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 972.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 216.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 1201.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 972.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 1201.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 972.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 1201.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 1201.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1201.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:26.006950255
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:26.008058823
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:6:26.009309918
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:26.011783489
+DEBUG (0): LQI Root is receiving packet from node 4 @0:6:26.016620497
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:6:26.019611202
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:26.027084082
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:6:26.031524364
+DEBUG (0): LQI Root is receiving packet from node 6 @0:6:26.034778350
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:6:26.040963788
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:26.044223485
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:26.053552215
+DEBUG (0): LQI Root is receiving packet from node 2 @0:6:26.057269674
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:26.062228751
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1014.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 243 and my cost to 1014.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1014.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 1014.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 1014.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:6:31.007173700
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:6:31.008004996
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:31.008567677
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:31.010391065
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:31.015827044
+DEBUG (0): LQI Root is receiving packet from node 2 @0:6:31.019060346
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:6:31.020477065
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:6:31.024997523
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:31.028871690
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:6:31.040683467
+DEBUG (0): LQI Root is receiving packet from node 4 @0:6:31.043596335
+DEBUG (0): LQI Root is receiving packet from node 6 @0:6:31.048540154
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:31.052253335
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:31.057405459
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:31.064439720
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:6:36.005807743
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:36.008346399
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:36.010871741
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:6:36.012956748
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:6:36.021135411
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:36.026115182
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:36.029620909
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:36.032701624
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:36.040468302
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:36.047702469
+DEBUG (0): LQI Root is receiving packet from node 4 @0:6:36.060213060
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:36.062244010
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:36.064866963
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:6:36.069842842
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:6:36.079944102
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:6:36.079944102
+DEBUG (0): LQI Root is receiving packet from node 6 @0:6:36.079944102
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:6:36.079944102
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:6:36.079944102
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:6:36.090243724
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:6:36.095187543
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:6:36.101565680
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:6:41.005359576
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:6:41.005359576
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:41.005359576
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:6:41.011156221
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:41.011308926
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:41.013435202
+DEBUG (0): LQI Root is receiving packet from node 2 @0:6:41.015817450
+DEBUG (0): LQI Root is receiving packet from node 4 @0:6:41.018050932
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:6:41.019594282
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:41.021997224
+DEBUG (0): LQI Root is receiving packet from node 4 @0:6:41.024706065
+DEBUG (0): LQI Root is receiving packet from node 6 @0:6:41.035155935
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:6:41.039718286
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:41.039718286
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:41.039718286
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:6:41.039718286
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:6:41.039718286
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:6:41.043105717
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:6:41.044387448
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:6:41.045440299
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:6:41.053756290
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:41.053756290
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:41.053756290
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:6:41.053756290
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:6:41.055755180
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:6:41.055755180
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:41.055755180
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:6:41.055755180
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:41.055755180
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:41.060897362
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:6:41.062911510
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:6:41.062911510
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:6:41.062911510
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:41.062911510
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:41.062911510
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:6:41.062911510
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 62 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 6 @0:6:46.006853268
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:6:46.006853268
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:6:46.006853268
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:6:46.008064140
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:6:46.010049661
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:6:46.010049661
+DEBUG (0): LQI Root is receiving packet from node 2 @0:6:46.010049661
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:6:46.010049661
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:6:46.010049661
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:6:46.012878233
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:46.012878233
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:46.012878233
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:6:46.012878233
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:6:46.015207102
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:6:46.015207102
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:6:46.015207102
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:6:46.015786933
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:6:46.018457205
+DEBUG (0): LQI Root is receiving packet from node 2 @0:6:46.018457205
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:6:46.018457205
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:6:46.018457205
+DEBUG (0): LQI Root is receiving packet from node 6 @0:6:46.020349284
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:6:46.020349284
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:6:46.020349284
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:6:46.021278174
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:6:46.022247075
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:46.022247075
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:6:46.022247075
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:6:46.022247075
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:46.026086555
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:6:46.026086555
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:46.026086555
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:6:46.026086555
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:6:46.026681644
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:6:46.029098231
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:6:46.029098231
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:46.029098231
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:6:46.029098231
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:6:46.029098231
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:6:46.030318927
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:6:46.031945896
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:46.031945896
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:6:46.031945896
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:46.031945896
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:6:46.031945896
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:46.035806347
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:46.035806347
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:6:46.035806347
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:6:46.035806347
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:6:46.036386178
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:6:46.038604401
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:6:46.038604401
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:6:46.038604401
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:46.038604401
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:46.038604401
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:6:46.038604401
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:6:46.049758511
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:6:46.049758511
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:46.049758511
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:6:46.049758511
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:6:46.049758511
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:51.006126285
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:51.006126285
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:6:51.006126285
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:6:51.009081156
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:51.009081156
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:6:51.009081156
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:51.010654345
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:51.013887646
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:51.013887646
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:6:51.013887646
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:51.016039123
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:6:51.016039123
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:6:51.016039123
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:6:51.017276621
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:51.019006518
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:6:51.019006518
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:6:51.019006518
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:6:51.019006518
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:6:51.021501738
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:6:51.021501738
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:6:51.021501738
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:6:51.021501738
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:51.021501738
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:51.024026631
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:6:51.024026631
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:51.026201417
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:6:51.026201417
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:6:51.026201417
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:51.027957711
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:6:51.027957711
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:6:51.027957711
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:6:51.032198086
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:6:51.032198086
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:6:51.032198086
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:51.032198086
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:6:51.040544595
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:6:51.040544595
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:51.040544595
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:6:51.040544595
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:6:51.040544595
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:51.042163561
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:6:51.045198499
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:6:51.045198499
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:6:51.045198499
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:51.045198499
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:6:51.045198499
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:6:51.045198499
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:56.008201468
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:6:56.008201468
+DEBUG (0): LQI Root is receiving packet from node 5 @0:6:56.009445025
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:6:56.010471241
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:6:56.010471241
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:6:56.011217374
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:6:56.011217374
+DEBUG (0): LQI Root is receiving packet from node 6 @0:6:56.012056484
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:56.015535586
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:56.015535586
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:6:56.015535586
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:6:56.016879895
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:6:56.018373704
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:6:56.018373704
+DEBUG (0): LQI Root is receiving packet from node 1 @0:6:56.018373704
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:6:56.018373704
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:6:56.019489132
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:56.021167589
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:6:56.021167589
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:6:56.021167589
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:6:56.021167589
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:56.024919687
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:6:56.024919687
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:6:56.024919687
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:56.024919687
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:6:56.028568059
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:56.028568059
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:56.028568059
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:6:56.028568059
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:6:56.029498840
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:6:56.029498840
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:56.031007908
+DEBUG (0): LQI Root is receiving packet from node 4 @0:6:56.031007908
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:6:56.031007908
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:6:56.031007908
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:6:56.033830767
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:6:56.033830767
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:6:56.033830767
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:6:56.033830767
+DEBUG (0): LQI Root is receiving packet from node 4 @0:6:56.033830767
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:56.034427400
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:6:56.038013194
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:6:56.038013194
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:6:56.038013194
+DEBUG (0): LQI Root is receiving packet from node 3 @0:6:56.038013194
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:6:56.038013194
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:6:56.040330974
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:6:56.040330974
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:6:56.040330974
+DEBUG (0): LQI Root is receiving packet from node 4 @0:6:56.040330974
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:6:56.040330974
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:6:56.040330974
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 72 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 93 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:7:1.008966294
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:1.008966294
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:7:1.010867967
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:7:1.010867967
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:7:1.012727985
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:7:1.012727985
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:7:1.017290337
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:1.017290337
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:7:1.017290337
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:7:1.017290337
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:7:1.017290337
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:7:1.018161625
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:1.019899574
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:7:1.021076037
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:7:1.021076037
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:7:1.021076037
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:7:1.023912612
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:7:1.023912612
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:7:1.025028040
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:7:1.026950637
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:7:1.026950637
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:7:1.026950637
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:7:1.026950637
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:7:1.027666253
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:7:1.030855321
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:7:1.030872123
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:7:1.033006798
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:7:1.033006798
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:7:1.033006798
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:1.033006798
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:7:1.033006798
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:7:1.033006798
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:7:1.036546816
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:7:1.036546816
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:7:1.036546816
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:1.036546816
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:7:1.036546816
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:7:1.036546816
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:7:6.008165634
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:7:6.008453210
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:6.008615344
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:7:6.010242360
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:7:6.010242360
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:7:6.010612343
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:7:6.015949114
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:7:6.015949114
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:7:6.015949114
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:7:6.018831347
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:7:6.018831347
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:7:6.018831347
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:7:6.020927224
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:7:6.020927224
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:7:6.020927224
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:7:6.022281474
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:6.022281474
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:7:6.022281474
+DEBUG (0): LQI Root is receiving packet from node 5 @0:7:6.024583877
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:7:6.024583877
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:7:6.024583877
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:7:6.024583877
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:7:6.024583877
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:7:6.025240001
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:7:6.027168032
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:7:6.027168032
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:6.027168032
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:7:6.027168032
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:7:6.028449763
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:7:6.031223073
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:7:6.031223073
+DEBUG (0): LQI Root is receiving packet from node 5 @0:7:6.031223073
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:7:6.031223073
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:7:6.031223073
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:7:6.033357629
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:7:6.033357629
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:6.033357629
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:7:6.033357629
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:7:6.034227375
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:6.037433364
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:7:6.037433364
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:7:6.037433364
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:7:6.037981016
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:7:6.042177158
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:7:6.042177158
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:7:6.042177158
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:6.042177158
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:7:6.042177158
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:7:6.046622875
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:7:6.046622875
+DEBUG (0): LQI Root is receiving packet from node 5 @0:7:6.046622875
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:7:6.046622875
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:7:6.051881691
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:7:6.051881691
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:6.051881691
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:7:6.051881691
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:7:6.051881691
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:7:6.052665320
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:7:11.006029416
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:7:11.006029416
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:7:11.006029416
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:11.006029416
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:7:11.006029416
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:7:11.007434759
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:11.009386212
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:7:11.009386212
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:11.009386212
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:11.011773895
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:7:11.011773895
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:7:11.011773895
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:7:11.011773895
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:11.014026518
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:7:11.014026518
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:7:11.014026518
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:7:11.014026518
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:7:11.015596503
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:7:11.018236258
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:11.018236258
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:7:11.018236258
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:7:11.018236258
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:7:11.019265916
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:7:11.022250957
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:11.022250957
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:11.022250957
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:7:11.022250957
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:7:11.022475955
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:11.024835342
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:7:11.024835342
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:7:11.024835342
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:7:11.025774056
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:7:11.025774056
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:11.028215448
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:7:11.028215448
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:7:11.028215448
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:7:11.028564176
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:7:11.032127110
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:7:11.032127110
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:11.032388398
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:7:11.035509106
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:7:11.035509106
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:11.035509106
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:7:11.035509106
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:7:11.040376631
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:11.040376631
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:11.040376631
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:7:11.040376631
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:7:11.041467325
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:7:11.046456920
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:11.046456920
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:7:11.046456920
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:7:11.046456920
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 64 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4488 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 1518.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 1518.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1518.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 2308.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 2308.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 2308.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 2308.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 2308.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 2308.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 2688.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 2688.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 1518.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 2688.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 2688.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:16.006487177
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:16.009439313
+DEBUG (0): LQI Root is receiving packet from node 5 @0:7:16.012145815
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:7:16.017566536
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:16.019487471
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:16.022556131
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:7:16.031221411
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:16.039583179
+DEBUG (0): LQI Root is receiving packet from node 3 @0:7:16.041541728
+DEBUG (0): LQI Root is receiving packet from node 3 @0:7:21.006584046
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:21.010011937
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:21.015634346
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:21.019365402
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:7:21.026004597
+DEBUG (0): LQI Root is receiving packet from node 5 @0:7:21.029021937
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:21.031024710
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:7:21.038593025
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:21.047275225
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:7:26.008151918
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:26.010683201
+DEBUG (0): LQI Root is receiving packet from node 3 @0:7:26.015815560
+DEBUG (0): LQI Root is receiving packet from node 5 @0:7:26.018478176
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:7:26.020753943
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:26.032350673
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:26.043130523
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:26.054238857
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:26.060189750
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:26.067742806
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 66 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 2308.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 216.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 216.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 2308.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1331.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 2598.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 2308.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2598.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 2598.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 2598.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 2598.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 216.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:31.019365520
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:31.024126116
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:7:31.026767532
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:31.030460138
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:7:31.038781794
+DEBUG (0): LQI Root is receiving packet from node 3 @0:7:31.041419658
+DEBUG (0): LQI Root is receiving packet from node 5 @0:7:31.043853394
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:31.047601322
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:7:31.048221264
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:31.056583032
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:36.005708983
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:36.010561132
+DEBUG (0): LQI Root is receiving packet from node 3 @0:7:36.014427018
+DEBUG (0): LQI Root is receiving packet from node 5 @0:7:36.016937047
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:7:36.026757938
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:36.030969339
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:7:36.035449733
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:36.048587473
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:7:36.050799985
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:36.057361226
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:41.007097407
+DEBUG (0): LQI Root is receiving packet from node 3 @0:7:41.009971477
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:7:41.014718824
+DEBUG (0): LQI Root is receiving packet from node 5 @0:7:41.017211704
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:41.019396037
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:7:41.020496207
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:41.025835209
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:7:41.030185481
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:41.034990429
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:41.045946175
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 67 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 2308.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 250.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 250.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 250.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 250.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:46.007478992
+DEBUG (0): LQI Root is receiving packet from node 5 @0:7:46.009658647
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:7:46.012824854
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:7:46.018014703
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:46.021089635
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:7:46.023996113
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:46.027246216
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:7:46.029041079
+DEBUG (0): LQI Root is receiving packet from node 3 @0:7:46.033761681
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:46.050119008
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:7:46.053027755
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:46.063190049
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 728.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 728.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 728.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 728.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 1457.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 728.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 1457.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1457.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 1457.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 1457.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:7:51.007135250
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:7:51.019080921
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:7:51.024429069
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:51.025453741
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:7:51.026328804
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:51.038530329
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:7:51.049136786
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:51.051256203
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:51.067476201
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:7:51.069644479
+DEBUG (0): LQI Root is receiving packet from node 3 @0:7:51.077379097
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:7:51.080905400
+DEBUG (0): LQI Root is receiving packet from node 5 @0:7:51.085542502
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:51.094423065
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:7:56.007423275
+DEBUG (0): LQI Root is receiving packet from node 1 @0:7:56.012071861
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:7:56.020730751
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:7:56.028337517
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:7:56.030425738
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:7:56.038064635
+DEBUG (0): LQI Root is receiving packet from node 3 @0:7:56.051446515
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:7:56.052386890
+DEBUG (0): LQI Root is receiving packet from node 2 @0:7:56.060250784
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:7:56.060794433
+DEBUG (0): LQI Root is receiving packet from node 4 @0:7:56.067513926
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:7:56.068057574
+DEBUG (0): LQI Root is receiving packet from node 6 @0:7:56.077325270
+DEBUG (0): LQI Root is receiving packet from node 5 @0:7:56.086419455
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 61 that advertises 165.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 728.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 165.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 82 that advertises 165.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:8:1.009536577
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:8:1.030206404
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:1.030641581
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:8:1.040866571
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:1.045798905
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:1.048845328
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:8:1.053977568
+DEBUG (0): LQI Root is receiving packet from node 1 @0:8:1.058855035
+DEBUG (0): LQI Root is receiving packet from node 4 @0:8:1.063341093
+DEBUG (0): LQI Root is receiving packet from node 4 @0:8:1.067401450
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:1.074418909
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:1.076632964
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:8:1.085467751
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:8:1.093112360
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:8:1.100665416
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:1.100665416
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:8:1.100665416
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:8:1.100665416
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:1.100665416
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:8:1.110614089
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:8:1.115145923
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:1.124316401
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 375.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 728.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 375.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 728.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 375.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 375.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 375.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 4, my link to 2457 and my cost to 375.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 375.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 103 that advertises 804.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 804.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 375.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 804.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 804.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 4, my link to 2457 and my cost to 375.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 804.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 4, my link to 926 and my cost to 804.
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:8:6.011087253
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:8:6.016589979
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:6.021761017
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:8:6.026292970
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:8:6.034614278
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:8:6.038148861
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:8:6.049834804
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:8:6.055900164
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:8:6.059508820
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:8:6.063170908
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:8:6.074981142
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:6.077964245
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:8:6.079665563
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:8:6.085379973
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:8:6.087951037
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:6.097968400
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:6.102820667
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:6.107596640
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:6.115561681
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:8:6.116278840
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:8:6.121649903
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:8:6.121649903
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:6.121649903
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:6.121649903
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:8:6.121649903
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:6.126196995
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:6.133963674
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:6.133963674
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:8:6.133963674
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:8:6.133963674
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:8:6.133963674
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:6.134787643
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:8:6.145941753
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:6.152487735
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:8:6.152487735
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:8:6.152487735
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:8:6.152487735
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:8:6.154303521
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:8:6.157156898
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:8:6.159079494
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:8:6.161719249
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:8:6.161719249
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:8:6.161719249
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:6.167822729
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:8:6.167822729
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:8:6.167822729
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:6.167822729
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:8:6.174704403
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:6.174704403
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:8:6.174704403
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:6.174704403
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:8:6.183035653
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:6.183035653
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:8:6.183035653
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:6.183035653
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:6.183035653
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:8:6.184653075
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:8:6.192221390
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:8:6.201941182
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:8:6.201941182
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:6.201941182
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:6.201941182
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:8:6.201941182
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:8:11.007516717
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:11.007516717
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:11.008506642
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:11.008506642
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:8:11.009506060
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:8:11.010301852
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:8:11.010545873
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:11.017295653
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:11.017295653
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:8:11.017295653
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:8:11.017763356
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:11.020999744
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:8:11.020999744
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:8:11.020999744
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:8:11.020999744
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:8:11.023521203
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:11.023521203
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:11.023521203
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:8:11.023521203
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:11.023521203
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:11.026950637
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:11.026950637
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:8:11.026950637
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:11.026950637
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:8:11.036668886
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:8:11.036668886
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:11.036668886
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:11.036668886
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:11.036668886
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:8:11.036668886
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:8:11.043733664
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:8:11.043733664
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:8:11.043733664
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:11.043733664
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:11.043733664
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:11.043733664
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:16.005777225
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:8:16.005777225
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:8:16.005777225
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:8:16.005777225
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:8:16.005777225
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:16.007926812
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:16.007926812
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:8:16.007926812
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:8:16.008470690
+DEBUG (0): LQI Root is receiving packet from node 1 @0:8:16.010011937
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:8:16.010011937
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:8:16.010011937
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:8:16.010787791
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:8:16.010787791
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:8:16.012363319
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:16.012363319
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:8:16.012363319
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:8:16.013114770
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:16.013114770
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:16.014497994
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:8:16.014497994
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:8:16.014497994
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:8:16.014497994
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:16.017595392
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:8:16.017595392
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:8:16.017595392
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:16.017595392
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:8:16.018694019
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:16.020026961
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:16.020026961
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:8:16.020026961
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:8:16.020026961
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:8:16.021331553
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:8:16.023170253
+DEBUG (0): LQI Root is receiving packet from node 1 @0:8:16.023170253
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:8:16.023170253
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:8:16.023668355
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:8:16.023668355
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:8:16.023668355
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:16.026382182
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:16.026382182
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:8:16.027168032
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:8:16.027168032
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:8:16.027940791
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:16.029960374
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:8:16.029960374
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:8:16.029960374
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:8:16.036638250
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:16.036638250
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:8:16.036638250
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:8:16.036638250
+DEBUG (0): LQI Root is receiving packet from node 5 @0:8:16.040244738
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:8:16.040244738
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:8:16.040244738
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:8:16.040244738
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:8:16.042680695
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:16.042680695
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:8:16.042680695
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:8:16.042680695
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:16.042680695
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:16.045783646
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:16.045783646
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:8:16.045783646
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:8:16.045783646
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:8:16.046500805
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:8:16.051591776
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:16.051591776
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:16.051591776
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:8:16.051591776
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:8:16.052772131
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:8:16.059190609
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:16.059190609
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:8:16.059190609
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:8:16.059190609
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:8:16.059190609
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 1076.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 1076.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 1076.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 2071.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 2071.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 2071.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 2071.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 2071.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 2926.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 2926.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 2926.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:8:21.010240817
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:21.012331141
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:21.016258062
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:21.019021777
+DEBUG (0): LQI Root is receiving packet from node 5 @0:8:21.033263856
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:21.039859497
+DEBUG (0): LQI Root is receiving packet from node 4 @0:8:21.045428922
+DEBUG (0): LQI Root is receiving packet from node 1 @0:8:26.006014157
+DEBUG (0): LQI Root is receiving packet from node 4 @0:8:26.009708306
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:26.014274431
+DEBUG (0): LQI Root is receiving packet from node 5 @0:8:26.016311440
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:26.021303256
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:26.033258144
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:26.040834392
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:31.006187320
+DEBUG (0): LQI Root is receiving packet from node 1 @0:8:31.008348738
+DEBUG (0): LQI Root is receiving packet from node 5 @0:8:31.010680980
+DEBUG (0): LQI Root is receiving packet from node 4 @0:8:31.015338766
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:31.021593172
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:31.037164371
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:31.048005981
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 307.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 307.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1331.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 1728.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 125 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1728.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:8:36.005487310
+DEBUG (0): LQI Root is receiving packet from node 1 @0:8:36.011049528
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:8:36.013370394
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:36.016227544
+DEBUG (0): LQI Root is receiving packet from node 5 @0:8:36.021850348
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:8:36.022661281
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:36.023927871
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:36.028429069
+DEBUG (0): LQI Root is receiving packet from node 4 @0:8:36.032915245
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:41.006980772
+DEBUG (0): LQI Root is receiving packet from node 5 @0:8:41.010101149
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:8:41.011461395
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:8:41.015451241
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:41.019899456
+DEBUG (0): LQI Root is receiving packet from node 1 @0:8:41.022508812
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:41.028200307
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:8:41.037723279
+DEBUG (0): LQI Root is receiving packet from node 4 @0:8:41.042529769
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:8:46.005319464
+DEBUG (0): LQI Root is receiving packet from node 1 @0:8:46.009615210
+DEBUG (0): LQI Root is receiving packet from node 5 @0:8:46.016998082
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:8:46.023851459
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:46.026221993
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:46.032442107
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:46.034532668
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:8:46.035312404
+DEBUG (0): LQI Root is receiving packet from node 4 @0:8:46.044360813
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 125 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 349.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 125 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 349.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 349.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 380 and my cost to 349.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 349.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 349.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 729.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 125 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 729.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 125 and my cost to 729.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 729.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 729.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 729.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 1853.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 125 and my cost to 729.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 1853.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 380 and my cost to 349.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 1853.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 1853.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:51.010063030
+DEBUG (0): LQI Root is receiving packet from node 1 @0:8:51.012743244
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:8:51.014459426
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:8:51.020480948
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:8:51.024551138
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:51.025537242
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:8:51.028863639
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:8:51.031249708
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:8:51.037614807
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:51.037728943
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:51.042741730
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:8:51.049020381
+DEBUG (0): LQI Root is receiving packet from node 4 @0:8:51.056726025
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:8:51.057809392
+DEBUG (0): LQI Root is receiving packet from node 5 @0:8:51.061044237
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:8:51.064546412
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:8:51.071061877
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:51.079377869
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:8:56.008472351
+DEBUG (0): LQI Root is receiving packet from node 1 @0:8:56.011278409
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:8:56.018594533
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:8:56.028304778
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:8:56.028886830
+DEBUG (0): LQI Root is receiving packet from node 4 @0:8:56.032357881
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:8:56.035278004
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:8:56.037477478
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:8:56.043336819
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:8:56.056146194
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:8:56.058845094
+DEBUG (0): LQI Root is receiving packet from node 2 @0:8:56.064889429
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:8:56.065515036
+DEBUG (0): LQI Root is receiving packet from node 5 @0:8:56.073785251
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:8:56.075616295
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:8:56.080956840
+DEBUG (0): LQI Root is receiving packet from node 3 @0:8:56.084695222
+DEBUG (0): LQI Root is receiving packet from node 6 @0:8:56.089822145
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:1.006912081
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:1.010286593
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:1.015703314
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:1.020786122
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:1.024065081
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:9:1.032447543
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:1.041116375
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:1.043811500
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:1.046105970
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:9:1.050195301
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:1.052753098
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:9:1.056359816
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:1.060281302
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:1.061059496
+DEBUG (0): LQI Root is receiving packet from node 3 @0:9:1.069451781
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:1.079720886
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 144.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 125 and my cost to 729.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 144.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 380 and my cost to 349.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 144.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 474.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 125 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 474.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 125 and my cost to 729.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 474.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 474.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 474.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:6.006853268
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:6.011871159
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:6.017806793
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:9:6.018882558
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:6.020158972
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:9:6.021936189
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:6.026096149
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:9:6.034158407
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:6.045282000
+DEBUG (0): LQI Root is receiving packet from node 3 @0:9:6.058984312
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:6.063464706
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:6.069720773
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:6.080600226
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:6.087787074
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:9:6.091220281
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:6.094195728
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:9:6.102145510
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:6.102969480
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:6.108950890
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:6.111407541
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:6.122653203
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 103 that advertises 854.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 5, my link to 307 and my cost to 854.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 854.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 854.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 854.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:11.006685422
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:9:11.009418390
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:11.018249295
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:11.022857423
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:11.031036086
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:11.035646553
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:11.039428371
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:9:11.042335180
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:9:11.046090711
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:11.049399958
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:11.058875611
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:11.064492703
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:9:11.065133568
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:11.068442816
+DEBUG (0): LQI Root is receiving packet from node 3 @0:9:11.071999983
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:11.073693699
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:11.082955730
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:9:11.083733924
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:11.089501712
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:16.007448357
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:9:16.012138213
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:9:16.028070186
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:16.032732141
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:9:16.036645576
+DEBUG (0): LQI Root is receiving packet from node 3 @0:9:16.043260644
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:16.047729104
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:9:16.050174378
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:16.052095431
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:16.054595519
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:16.057834245
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:16.075015542
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:16.076220979
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:16.083072135
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:16.085605079
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:16.089190874
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:9:16.090915107
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:16.094043141
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:16.100894297
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:16.105380355
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:16.115359544
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 125 and my cost to 729.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:21.006456660
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:9:21.009561383
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:21.012979332
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:9:21.015674457
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:21.017608430
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:21.020647132
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:21.023315184
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:21.027549500
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:21.029863387
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:21.033134184
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:21.035844798
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:9:21.038627316
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:21.041862160
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:9:21.047019601
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:21.049247371
+DEBUG (0): LQI Root is receiving packet from node 3 @0:9:21.052604285
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:21.055244040
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:21.059012939
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:21.063041236
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:9:21.079368045
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:21.084678073
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 164.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 307 and my cost to 854.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 164.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 125 and my cost to 729.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 164.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 474.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 164.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 164.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 526.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 307 and my cost to 854.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 526.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 5, my link to 106 and my cost to 526.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 526.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 526.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 526.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 1161.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 106 and my cost to 526.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 1161.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 474.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1161.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 65 that advertises 1161.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:26.007158560
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:9:26.017169810
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:9:26.021676791
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:26.023698872
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:26.025336988
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:26.029504504
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:26.030280807
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:9:26.033744532
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:26.043235443
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:9:26.044120448
+DEBUG (0): LQI Root is receiving packet from node 3 @0:9:26.048820128
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:26.051467485
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:26.060515894
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:26.061477192
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:26.065871698
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:26.069579562
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:9:26.079589269
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:26.095748232
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:26.102538354
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:26.116789980
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:26.123396997
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:31.006182003
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:9:31.006952145
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:9:31.016700564
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:31.019592061
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:9:31.022800270
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:31.025056897
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:31.029636168
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:31.032062301
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:31.032418916
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:31.038242075
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:31.041948278
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:31.050340563
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:31.058631472
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:31.060411305
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:31.065223230
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:31.067389966
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:31.082892805
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:9:31.083655740
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:31.090033876
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:9:36.006523011
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:9:36.010202248
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:36.010332251
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:9:36.012775304
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:36.015334883
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:36.020511465
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:36.025743656
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:36.031816619
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:36.037774719
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:36.041152604
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:36.041930798
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:36.044442771
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:36.049270232
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:36.057366890
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:36.061883465
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:36.066995130
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:36.068572488
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:36.082991959
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:36.096230799
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:36.103301289
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:36.111098485
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:9:36.119750168
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:36.127364259
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:36.127364259
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:36.127364259
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:36.127364259
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:36.127364259
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 62 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 307 and my cost to 854.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 307 and my cost to 854.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 0, my link to 125 and my cost to 65534.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:9:41.007486200
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:9:41.007486200
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:41.008315881
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:41.008486067
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:9:41.009921927
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:41.009921927
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:9:41.009921927
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:9:41.009921927
+DEBUG (0): LQI Root is receiving packet from node 3 @0:9:41.013480978
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:9:41.013480978
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:9:41.013480978
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:9:41.018558352
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:9:41.018558352
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:41.018558352
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:41.018558352
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:9:41.019229734
+DEBUG (0): LQI Root is receiving packet from node 3 @0:9:41.023242773
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:9:41.023242773
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:9:41.023242773
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:9:41.023820942
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:9:41.025901560
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:9:41.025901560
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:41.027637278
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:9:41.028110298
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:9:41.028110298
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:9:41.028110298
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:9:41.028110298
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:9:41.032371249
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:41.032371249
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:41.032371249
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:9:41.034961454
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:9:41.034961454
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:9:41.034961454
+DEBUG (0): LQI Root is receiving packet from node 3 @0:9:41.034961454
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:9:41.034961454
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:9:41.034961454
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:41.038393000
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:9:41.038393000
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:9:41.038393000
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:9:41.038393000
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:9:41.039909047
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:41.040534654
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:41.040534654
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:9:41.040534654
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:9:41.041114484
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:9:41.045823987
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:9:41.045823987
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:9:41.045823987
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:41.045823987
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:9:41.045823987
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:41.047029425
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:9:41.050025565
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:9:41.050025565
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:9:41.050025565
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:9:41.050025565
+DEBUG (0): LQI Root is receiving packet from node 3 @0:9:41.050025565
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:9:41.050025565
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:41.053407561
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:9:41.053407561
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:41.053407561
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:41.053407561
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:41.053407561
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:9:41.055269123
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:41.058183534
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:41.058183534
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:41.058183534
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:41.058183534
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:9:41.058183534
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:41.062272866
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:41.062272866
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:41.062272866
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:46.007446136
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:46.007446136
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:46.007446136
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:46.008424914
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:46.009088363
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:46.010410206
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:9:46.010410206
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:9:46.010410206
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:9:46.011293667
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:46.015506612
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:46.015506612
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:46.015506612
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:9:46.016696790
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:9:46.018634645
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:9:46.018634645
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:9:46.018634645
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:46.019869057
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:9:46.021274400
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:9:46.021274400
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:9:46.021274400
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:9:46.021274400
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:46.022800270
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:46.022800270
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:46.025743538
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:46.025743538
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:9:46.025743538
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:46.025743538
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:9:46.026279254
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:9:46.029102113
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:9:46.029102113
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:9:46.029102113
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:46.029102113
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:9:46.029102113
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:9:46.030933157
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:46.034732574
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:9:46.034732574
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:9:46.034732574
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:9:46.034732574
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:9:46.039828979
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:9:46.039828979
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:46.039828979
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:46.039828979
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:9:46.039828979
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:9:46.045047455
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:9:46.045047455
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:9:46.045047455
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:46.045047455
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:9:46.045047455
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:9:46.049075752
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:9:46.049075752
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:46.049075752
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:46.049075752
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:9:46.049075752
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:46.049075752
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:51.007018892
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:9:51.007018892
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:9:51.008201468
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:51.009296321
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:51.009296321
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:9:51.009296321
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:51.010667943
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:51.014133329
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:9:51.014133329
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:51.014133329
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:9:51.014133329
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:9:51.015968147
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:51.016269547
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:9:51.016269547
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:9:51.016269547
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:51.018115849
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:51.018907641
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:51.018907641
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:9:51.018907641
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:51.018907641
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:51.023109218
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:51.023109218
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:51.023109218
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:9:51.024568618
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:51.026796388
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:51.026796388
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:9:51.026796388
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:9:51.026796388
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:51.028190365
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:9:51.029136405
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:51.029136405
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:51.029136405
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:9:51.029136405
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:51.029639942
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:9:51.032569612
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:51.032569612
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:51.032569612
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:51.034488434
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:51.034488434
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:9:51.034488434
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:9:51.034488434
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:9:51.036658944
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:9:51.036658944
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:51.036658944
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:51.036658944
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:51.037894898
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:51.041797352
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:51.041797352
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:9:51.041797352
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:9:51.041797352
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:9:51.043903052
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:51.043903052
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:51.043903052
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:51.043903052
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:9:51.044181483
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:9:51.048316591
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:9:51.048316591
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:9:51.048316591
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:51.048316591
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 64 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4488 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 1241.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1423 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 1241.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 1241.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1241.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 2096.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 2096.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 2096.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1423 and my cost to 1241.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 2096.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 2096.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 2096.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 2765.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1423 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 2765.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 1241.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 84 that advertises 2765.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 2765.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:9:56.006136227
+DEBUG (0): LQI Root is receiving packet from node 3 @0:9:56.020515239
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:9:56.023238890
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:9:56.026811647
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:9:56.033344032
+DEBUG (0): LQI Root is receiving packet from node 5 @0:9:56.036523506
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:9:56.058322524
+DEBUG (0): LQI Root is receiving packet from node 4 @0:9:56.062280192
+DEBUG (0): LQI Root is receiving packet from node 2 @0:9:56.071038685
+DEBUG (0): LQI Root is receiving packet from node 6 @0:9:56.076043539
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:10:1.010713719
+DEBUG (0): LQI Root is receiving packet from node 1 @0:10:1.015245671
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:10:1.018863526
+DEBUG (0): LQI Root is receiving packet from node 3 @0:10:1.028663385
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:10:1.030990310
+DEBUG (0): LQI Root is receiving packet from node 2 @0:10:1.037393252
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:10:1.038730353
+DEBUG (0): LQI Root is receiving packet from node 4 @0:10:1.042489658
+DEBUG (0): LQI Root is receiving packet from node 4 @0:10:1.047204596
+DEBUG (0): LQI Root is receiving packet from node 5 @0:10:1.054177822
+DEBUG (0): LQI Root is receiving packet from node 3 @0:10:6.006690857
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:10:6.009386212
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:10:6.011565985
+DEBUG (0): LQI Root is receiving packet from node 2 @0:10:6.014428908
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:10:6.017429208
+DEBUG (0): LQI Root is receiving packet from node 1 @0:10:6.021501738
+DEBUG (0): LQI Root is receiving packet from node 5 @0:10:6.029473987
+DEBUG (0): LQI Root is receiving packet from node 4 @0:10:6.034631427
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:10:6.036166891
+DEBUG (0): LQI Root is receiving packet from node 6 @0:10:6.044025122
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 72 that advertises 189.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1423 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 189.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 189.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 1518.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 2096.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1423 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1518.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 2664.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 2096.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2664.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 2664.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 2664.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 2664.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 189.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:10:11.007760856
+DEBUG (0): LQI Root is receiving packet from node 3 @0:10:11.010444497
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:10:11.015685834
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:10:11.019182297
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:10:11.022907081
+DEBUG (0): LQI Root is receiving packet from node 1 @0:10:11.027116939
+DEBUG (0): LQI Root is receiving packet from node 2 @0:10:11.032564295
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:10:11.040343893
+DEBUG (0): LQI Root is receiving packet from node 4 @0:10:11.043169092
+DEBUG (0): LQI Root is receiving packet from node 5 @0:10:11.048753776
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:10:11.057849504
+DEBUG (0): LQI Root is receiving packet from node 6 @0:10:11.062289786
+DEBUG (0): LQI Root is receiving packet from node 1 @0:10:16.006761834
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:10:16.013019444
+DEBUG (0): LQI Root is receiving packet from node 4 @0:10:16.018237919
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:10:16.020906530
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:10:16.023187402
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:10:16.024001825
+DEBUG (0): LQI Root is receiving packet from node 2 @0:10:16.028115962
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:10:16.029527696
+DEBUG (0): LQI Root is receiving packet from node 6 @0:10:16.037691100
+DEBUG (0): LQI Root is receiving packet from node 3 @0:10:16.048347108
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:10:16.053924136
+DEBUG (0): LQI Root is receiving packet from node 5 @0:10:16.062682630
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:10:21.015044968
+DEBUG (0): LQI Root is receiving packet from node 3 @0:10:21.018226434
+DEBUG (0): LQI Root is receiving packet from node 1 @0:10:21.034395339
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:10:21.037500063
+DEBUG (0): LQI Root is receiving packet from node 2 @0:10:21.046609507
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:10:21.051225567
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:10:21.054019570
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:10:21.057549995
+DEBUG (0): LQI Root is receiving packet from node 4 @0:10:21.060901244
+DEBUG (0): LQI Root is receiving packet from node 5 @0:10:21.068927320
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:10:21.076602446
+DEBUG (0): LQI Root is receiving packet from node 6 @0:10:21.080859624
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 64 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 2096.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1423 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 265.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 2096.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 265.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 265.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 265.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 265.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 265.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 265.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:10:26.007541570
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:10:26.012018034
+DEBUG (0): LQI Root is receiving packet from node 1 @0:10:26.014848945
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:10:26.017503840
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:10:26.019584458
+DEBUG (0): LQI Root is receiving packet from node 4 @0:10:26.024553478
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:10:26.026588202
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:10:26.028197968
+DEBUG (0): LQI Root is receiving packet from node 2 @0:10:26.035310861
+DEBUG (0): LQI Root is receiving packet from node 3 @0:10:26.040483561
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:10:26.041595106
+DEBUG (0): LQI Root is receiving packet from node 5 @0:10:26.050826620
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:10:26.051637552
+DEBUG (0): LQI Root is receiving packet from node 6 @0:10:26.058015689
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 654.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 654.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 654.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 654.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 654.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 265.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 654.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 654.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 1266.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 654.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 1266.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 1266.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 265.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 1266.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 189.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:10:31.005953122
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:10:31.018716603
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:10:31.022895596
+DEBUG (0): LQI Root is receiving packet from node 2 @0:10:31.027627684
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:10:31.032676423
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:10:31.036147750
+DEBUG (0): LQI Root is receiving packet from node 3 @0:10:31.037467655
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:10:31.040332517
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:10:31.043840356
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:10:31.056430445
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:10:31.061877801
+DEBUG (0): LQI Root is receiving packet from node 6 @0:10:31.066501187
+DEBUG (0): LQI Root is receiving packet from node 6 @0:10:31.073916915
+DEBUG (0): LQI Root is receiving packet from node 5 @0:10:31.081256350
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:10:36.007491912
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:10:36.014108476
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:10:36.016700564
+DEBUG (0): LQI Root is receiving packet from node 1 @0:10:36.019304485
+DEBUG (0): LQI Root is receiving packet from node 2 @0:10:36.023470110
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:10:36.025043299
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:10:36.030612725
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:10:36.038393000
+DEBUG (0): LQI Root is receiving packet from node 4 @0:10:36.045016937
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:10:36.047258305
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:10:36.078849249
+DEBUG (0): LQI Root is receiving packet from node 5 @0:10:36.085238871
+DEBUG (0): LQI Root is receiving packet from node 3 @0:10:36.091159246
+DEBUG (0): LQI Root is receiving packet from node 6 @0:10:36.099887223
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 654.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 125.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 125.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:10:41.007417958
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:10:41.010791673
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:10:41.014016923
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:10:41.014976331
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:10:41.024032342
+DEBUG (0): LQI Root is receiving packet from node 4 @0:10:41.027454174
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:10:41.030891155
+DEBUG (0): LQI Root is receiving packet from node 2 @0:10:41.033435584
+DEBUG (0): LQI Root is receiving packet from node 3 @0:10:41.040256223
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:10:41.041045793
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:10:41.046449594
+DEBUG (0): LQI Root is receiving packet from node 5 @0:10:41.048781954
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:10:41.061754070
+DEBUG (0): LQI Root is receiving packet from node 6 @0:10:41.081300465
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 390.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 654.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 390.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 654.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 390.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 390.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 706.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 144 and my cost to 706.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 706.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 706.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 265.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 706.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 125.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:10:46.008705005
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:10:46.012119180
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:10:46.018630763
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:10:46.026414921
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:10:46.028823574
+DEBUG (0): LQI Root is receiving packet from node 4 @0:10:46.038377860
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:10:46.039483694
+DEBUG (0): LQI Root is receiving packet from node 1 @0:10:46.042375639
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:10:46.050813582
+DEBUG (0): LQI Root is receiving packet from node 5 @0:10:46.055818554
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:10:46.058038273
+DEBUG (0): LQI Root is receiving packet from node 3 @0:10:46.065095844
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:10:46.068437381
+DEBUG (0): LQI Root is receiving packet from node 2 @0:10:46.071824930
+DEBUG (0): LQI Root is receiving packet from node 6 @0:10:46.080278250
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:10:51.005817337
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:10:51.018121514
+DEBUG (0): LQI Root is receiving packet from node 4 @0:10:51.021394927
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:10:51.024635088
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:10:51.027696652
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:10:51.030822464
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:10:51.042121558
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:10:51.044784174
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:10:51.047225566
+DEBUG (0): LQI Root is receiving packet from node 2 @0:10:51.051103616
+DEBUG (0): LQI Root is receiving packet from node 1 @0:10:51.056184763
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:10:51.073195874
+DEBUG (0): LQI Root is receiving packet from node 3 @0:10:51.075654864
+DEBUG (0): LQI Root is receiving packet from node 6 @0:10:51.083223179
+DEBUG (0): LQI Root is receiving packet from node 5 @0:10:51.092500469
+DEBUG (0): LQI Root is receiving packet from node 1 @0:10:56.007875719
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:10:56.009036923
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:10:56.010683201
+DEBUG (0): LQI Root is receiving packet from node 4 @0:10:56.016498427
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:10:56.021751194
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:10:56.023864497
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:10:56.034356771
+DEBUG (0): LQI Root is receiving packet from node 2 @0:10:56.038385067
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:10:56.040811201
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:10:56.043136235
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:10:56.046310044
+DEBUG (0): LQI Root is receiving packet from node 3 @0:10:56.056283522
+DEBUG (0): LQI Root is receiving packet from node 6 @0:10:56.062341226
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:10:56.064330569
+DEBUG (0): LQI Root is receiving packet from node 5 @0:10:56.069762666
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 144 and my cost to 706.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 654.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 265.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 68 that advertises 167.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 144 and my cost to 706.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 167.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 654.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 167.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 167.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 167.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 167.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 686.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 144 and my cost to 706.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 686.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 686.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 686.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 167.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 686.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 850.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 686.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 850.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 850.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 167.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 850.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 59 that advertises 850.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:11:1.007501459
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:11:1.008155692
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:1.010057713
+DEBUG (0): LQI Root is receiving packet from node 2 @0:11:1.017442924
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:11:1.020385513
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:11:1.024970780
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:1.027177856
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:1.037279115
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:1.041721058
+DEBUG (0): LQI Root is receiving packet from node 3 @0:11:1.046867014
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:11:1.054126381
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:1.060782948
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:11:1.061603144
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:11:1.066791102
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:1.066791102
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:11:1.066791102
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:1.066791102
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:1.066791102
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:11:1.066791102
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:1.071033021
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:11:1.073337085
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:11:1.076648223
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:11:6.006210181
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:11:6.006210181
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:6.006210181
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:6.006275098
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:11:6.009851298
+DEBUG (0): LQI Root is receiving packet from node 2 @0:11:6.009851298
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:11:6.009851298
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:11:6.012245024
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:6.019823281
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:11:6.019823281
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:6.019823281
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:11:6.019823281
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:11:6.023217920
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:11:6.023217920
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:6.026231935
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:6.026231935
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:11:6.026231935
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:11:6.033212368
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:6.033212368
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:6.033212368
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:11:6.033212368
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:11:6.033212368
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:11:6.036424628
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:11:6.038339291
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:6.038339291
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:6.038339291
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:6.038339291
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:11:6.038339291
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:6.043550441
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:11:6.043550441
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:11:6.047721501
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:11:6.047721501
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:6.047721501
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:6.047721501
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:11:6.047721501
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:11:6.051317119
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:11:6.051317119
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:11:6.051317119
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:6.051317119
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:11:6.051423930
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:11:6.054221707
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:11:6.054221707
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:6.054221707
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:6.054221707
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:11:6.054221707
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:11:6.056647841
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:11:6.060569327
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:11:6.060569327
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:11:6.060569327
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:11:6.060569327
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:6.060569327
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:11:6.060569327
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:11:6.065162195
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:6.065162195
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:11:6.065162195
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:11:6.065416158
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:11:6.069825922
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:6.069825922
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:11:6.069825922
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:6.069825922
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:6.069825922
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:11:6.069825922
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:11:6.074266204
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:6.074266204
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:11:6.075578452
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:11:6.082475385
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:11:6.082475385
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:6.082475385
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:6.082475385
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:11:6.082475385
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:6.083833409
+DEBUG (0): LQI Root is receiving packet from node 2 @0:11:11.008691637
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:11:11.011003752
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:11.011003752
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:11:11.011003752
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:11:11.011003752
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:11:11.011003752
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:11:11.016084899
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:11:11.016084899
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:11:11.016084899
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:11:11.016084899
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:11:11.018266893
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:11:11.018266893
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:11:11.018266893
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:11:11.019533365
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:11:11.022951314
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:11:11.022951314
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:11.022951314
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:11:11.022951314
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:11:11.024110975
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:11:11.027650994
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:11.027650994
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:11:11.027650994
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:11:11.027650994
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:11:11.032076017
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:11:11.032076017
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:11.032076017
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:11:11.032076017
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:11:11.032076017
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 76 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:11:16.006395625
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:11:16.006395625
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:11:16.006395625
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:16.006395625
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:11:16.006395625
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:16.010242360
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:11:16.010242360
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:11:16.012834678
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:16.012834678
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:16.012834678
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:16.015201438
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:16.015201438
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:11:16.016574721
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:11:16.016574721
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:11:16.016574721
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:11:16.017150669
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:11:16.018777638
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:11:16.018777638
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:11:16.019599717
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:11:16.019599717
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:16.021501620
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:11:16.021501620
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:11:16.021501620
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:11:16.021501620
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:16.022266216
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:11:16.025903451
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:11:16.025903451
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:11:16.025943562
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:16.026382182
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:11:16.029436144
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:16.029436144
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:11:16.029436144
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:11:16.029436144
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:11:16.030221663
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:11:16.032030123
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:11:16.032030123
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:11:16.032382734
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:16.032382734
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:16.034183260
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:16.034183260
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:11:16.034183260
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:16.036758098
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:16.036758098
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:16.036758098
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:11:16.036758098
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:16.038026792
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:16.040073119
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:16.040073119
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:11:16.040073119
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:11:16.040073119
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:11:16.040073119
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:11:16.042239854
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:11:16.042239854
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:16.042239854
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:16.042239854
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:16.042239854
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:11:16.042239854
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:16.047000568
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:11:16.047000568
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:11:16.047000568
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:11:16.047992384
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:16.047992384
+DEBUG (0): LQI Root is receiving packet from node 3 @0:11:21.007133359
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:11:21.007133359
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:21.009342097
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:21.009342097
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:11:21.009342097
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:11:21.009342097
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:21.010072853
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:11:21.012775304
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:21.012775304
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:11:21.012775304
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:21.012775304
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:21.015186179
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:21.015186179
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:11:21.015186179
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:11:21.015186179
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:21.015186179
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:21.015932194
+DEBUG (0): LQI Root is receiving packet from node 3 @0:11:21.018022636
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:11:21.018022636
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:11:21.018022636
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:21.020448769
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:21.020448769
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:11:21.020448769
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:11:21.020448769
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:11:21.020448769
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:11:21.022600246
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:21.022600246
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:21.022600246
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:11:21.023592061
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:11:21.029329333
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:11:21.029329333
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:21.029329333
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:11:21.029329333
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:11:21.030214337
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:11:21.034578325
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:21.034578325
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:21.034578325
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:11:21.034578325
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:21.034578325
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:11:21.037263857
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:11:21.037263857
+DEBUG (0): LQI Root is receiving packet from node 3 @0:11:21.037263857
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:11:21.037263857
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:11:21.042375521
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:21.042375521
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:11:21.042375521
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:21.042375521
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:21.046388559
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:11:21.046388559
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:21.046388559
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:11:21.047441410
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:21.056215162
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:21.056215162
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:21.056215162
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:11:21.056215162
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:11:21.056215162
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:11:26.006896822
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:11:26.006896822
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:11:26.006896822
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:11:26.006896822
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:26.006896822
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:11:26.006896822
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:26.010530614
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:11:26.010530614
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:26.018953417
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:11:26.018953417
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:26.020876131
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:11:26.020876131
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:11:26.021640609
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:11:26.024461926
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:11:26.024461926
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:11:26.024461926
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:11:26.024461926
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:11:26.024461926
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 67 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3906 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 926.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3906 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 926.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 926.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 1950.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1950.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 1950.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 1950.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 1950.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 1950.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 2619.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 2619.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 90 that advertises 2619.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 2619.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:11:31.008140433
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:31.018388845
+DEBUG (0): LQI Root is receiving packet from node 3 @0:11:31.020913856
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:31.023605099
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:31.026004597
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:31.029222640
+DEBUG (0): LQI Root is receiving packet from node 2 @0:11:31.035089188
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:31.038196299
+DEBUG (0): LQI Root is receiving packet from node 2 @0:11:36.006387573
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:36.009538917
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:11:36.017509275
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:36.022356107
+DEBUG (0): LQI Root is receiving packet from node 3 @0:11:36.037177740
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:36.040775019
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:36.046481773
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:36.051696366
+DEBUG (0): LQI Root is receiving packet from node 2 @0:11:41.006631713
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:11:41.007682672
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:41.009081038
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:41.012346518
+DEBUG (0): LQI Root is receiving packet from node 3 @0:11:41.014945814
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:41.017291880
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:41.035114041
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:41.038375520
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 216.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 216.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 1051.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1950.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 1051.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1051.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 1051.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 1051.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:46.006517694
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:11:46.015924261
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:11:46.018165399
+DEBUG (0): LQI Root is receiving packet from node 2 @0:11:46.024286029
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:11:46.027702087
+DEBUG (0): LQI Root is receiving packet from node 3 @0:11:46.036307994
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:46.042634919
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:46.045932459
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:46.051177570
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:46.055270784
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:11:46.055774321
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:46.060367190
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 2197.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1950.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2197.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 2197.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 2197.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 2197.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:11:51.011817780
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:51.020801381
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:51.024400891
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:51.028001826
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:51.038818023
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:11:51.041810949
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:51.044771255
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:51.051195168
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:11:51.059014830
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:11:51.072045760
+DEBUG (0): LQI Root is receiving packet from node 2 @0:11:51.075921469
+DEBUG (0): LQI Root is receiving packet from node 3 @0:11:51.082375899
+DEBUG (0): LQI Root is receiving packet from node 1 @0:11:56.007356923
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:11:56.011797086
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:11:56.014428908
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:11:56.020194806
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:11:56.026874343
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:11:56.033054117
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:56.036172556
+DEBUG (0): LQI Root is receiving packet from node 5 @0:11:56.043151494
+DEBUG (0): LQI Root is receiving packet from node 6 @0:11:56.056573438
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:11:56.060294670
+DEBUG (0): LQI Root is receiving packet from node 4 @0:11:56.063256748
+DEBUG (0): LQI Root is receiving packet from node 3 @0:11:56.070245233
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 62 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1950.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:1.006761834
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:1.007343207
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:1.008743125
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:12:1.011324067
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:12:1.013953998
+DEBUG (0): LQI Root is receiving packet from node 4 @0:12:1.016925671
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:12:1.017663753
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:12:1.026292851
+DEBUG (0): LQI Root is receiving packet from node 2 @0:12:1.028985708
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:12:1.030633648
+DEBUG (0): LQI Root is receiving packet from node 6 @0:12:1.037500063
+DEBUG (0): LQI Root is receiving packet from node 3 @0:12:1.042749056
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 322.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1950.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 322.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 322.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 512 and my cost to 322.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 322.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 322.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 834.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 669 and my cost to 834.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 834.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 76 and my cost to 834.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 834.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 834.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 834.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 107 that advertises 1503.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 76 and my cost to 834.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 84 that advertises 1503.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 1503.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:6.007143301
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:6.009399249
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:12:6.010644751
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:12:6.011497347
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:6.016605238
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:12:6.018022636
+DEBUG (0): LQI Root is receiving packet from node 2 @0:12:6.019265916
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:12:6.020271100
+DEBUG (0): LQI Root is receiving packet from node 3 @0:12:6.025520093
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:6.030418135
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:6.032626873
+DEBUG (0): LQI Root is receiving packet from node 4 @0:12:6.037116705
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:6.039111821
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:12:6.039783203
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:6.046451255
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:12:6.053592327
+DEBUG (0): LQI Root is receiving packet from node 6 @0:12:6.060596070
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:12:11.008966294
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:12:11.010825965
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:12:11.013185628
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:12:11.018623160
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:12:11.025119593
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:11.027358739
+DEBUG (0): LQI Root is receiving packet from node 2 @0:12:11.027498407
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:12:11.031055227
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:11.032474286
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:11.036638368
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:11.041309073
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:11.045718838
+DEBUG (0): LQI Root is receiving packet from node 3 @0:12:11.051881809
+DEBUG (0): LQI Root is receiving packet from node 6 @0:12:11.063768337
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:11.066409635
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:11.071918026
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:16.007509510
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:16.016162736
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:16.019820941
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:12:16.020990149
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:16.023254149
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:12:16.025611645
+DEBUG (0): LQI Root is receiving packet from node 2 @0:12:16.029367176
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:12:16.035402295
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:16.037942565
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:12:16.039583179
+DEBUG (0): LQI Root is receiving packet from node 4 @0:12:16.044381736
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:16.046426402
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:16.050942977
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:12:16.053262300
+DEBUG (0): LQI Root is receiving packet from node 6 @0:12:16.059197934
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 273.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 76 and my cost to 834.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 273.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 512 and my cost to 322.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 273.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 447.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 669 and my cost to 834.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 447.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 76 and my cost to 834.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 447.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 447.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 447.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 447.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 910.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 5, my link to 165 and my cost to 910.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 910.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 447.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 910.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 910.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 910.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 273.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:12:21.007882926
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:12:21.010795447
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:21.011736170
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:21.015090744
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:12:21.016985044
+DEBUG (0): LQI Root is receiving packet from node 2 @0:12:21.019228191
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:12:21.020454204
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:12:21.021579574
+DEBUG (0): LQI Root is receiving packet from node 3 @0:12:21.027976743
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:21.037296035
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:12:21.038013194
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:12:21.040117234
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:21.044696505
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:12:21.047288823
+DEBUG (0): LQI Root is receiving packet from node 4 @0:12:21.050632139
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:21.060580811
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:21.066592739
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:12:21.068072833
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:21.071643369
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:12:21.074939248
+DEBUG (0): LQI Root is receiving packet from node 6 @0:12:21.084567488
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:12:26.006128176
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:12:26.010459756
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:12:26.017322397
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:26.022445438
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:12:26.023607320
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:12:26.038743951
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:12:26.047767277
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:26.050265930
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:26.053758630
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:26.061311686
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:26.065108763
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:12:26.071090173
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:26.076846586
+DEBUG (0): LQI Root is receiving packet from node 4 @0:12:26.085237328
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:12:26.090621309
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:12:26.091933557
+DEBUG (0): LQI Root is receiving packet from node 3 @0:12:26.093797458
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:12:26.097014705
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:12:26.100890414
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:26.105864751
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:12:26.116881532
+DEBUG (0): LQI Root is receiving packet from node 6 @0:12:26.124297260
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:12:31.006723265
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:12:31.007785709
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:31.009185627
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:12:31.012748561
+DEBUG (0): LQI Root is receiving packet from node 2 @0:12:31.016039123
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:12:31.031059001
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:12:31.033189784
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:31.035255143
+DEBUG (0): LQI Root is receiving packet from node 3 @0:12:31.051118874
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:31.056627265
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:31.057929572
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:12:31.067092394
+DEBUG (0): LQI Root is receiving packet from node 4 @0:12:31.067649363
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:12:31.069917475
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:31.074263983
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:12:31.078065620
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:31.082381611
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:12:31.083879185
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:12:31.097062702
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:31.101363434
+DEBUG (0): LQI Root is receiving packet from node 6 @0:12:31.107543208
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 76 and my cost to 834.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 447.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 379.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 165 and my cost to 910.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 379.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 76 and my cost to 834.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 379.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 447.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 379.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 379.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 379.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 591.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 165 and my cost to 910.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 591.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 5, my link to 125 and my cost to 591.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 591.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 379.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 591.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 591.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 1075.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 125 and my cost to 591.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 1075.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 379.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:36.006545872
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:12:36.011438203
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:36.016710506
+DEBUG (0): LQI Root is receiving packet from node 2 @0:12:36.026399780
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:12:36.029315735
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:12:36.032294956
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:12:36.033801793
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:12:36.036134713
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:12:36.039741201
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:12:36.042695954
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:36.050910570
+DEBUG (0): LQI Root is receiving packet from node 3 @0:12:36.062827614
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:12:36.070054803
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:36.072440595
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:36.076301046
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:12:36.079017095
+DEBUG (0): LQI Root is receiving packet from node 4 @0:12:36.081427970
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:36.084479710
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:12:36.090491637
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:36.093543377
+DEBUG (0): LQI Root is receiving packet from node 6 @0:12:36.103904035
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:41.006075192
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:12:41.008243470
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:41.008926229
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:12:41.010156472
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:12:41.011695711
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:12:41.023363181
+DEBUG (0): LQI Root is receiving packet from node 2 @0:12:41.025323620
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:12:41.028429069
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:12:41.031562538
+DEBUG (0): LQI Root is receiving packet from node 3 @0:12:41.036201183
+DEBUG (0): LQI Root is receiving packet from node 3 @0:12:41.040374410
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:41.043479583
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:12:41.046340562
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:12:41.058074502
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:41.067985055
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:41.070174651
+DEBUG (0): LQI Root is receiving packet from node 4 @0:12:41.073508704
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:41.079329871
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:12:41.084349984
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:12:41.089461648
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:12:41.089461648
+DEBUG (0): LQI Root is receiving packet from node 6 @0:12:41.089461648
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:12:41.089461648
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:12:41.089461648
+DEBUG (0): LQI Root is receiving packet from node 6 @0:12:41.097655570
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:46.006304073
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:46.006778635
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:12:46.008928451
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:12:46.010614233
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:12:46.015230294
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:12:46.015230294
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:12:46.015230294
+DEBUG (0): LQI Root is receiving packet from node 6 @0:12:46.015230294
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:12:46.015230294
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:12:46.018152031
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:46.019357468
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:12:46.019357468
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:12:46.022462918
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:12:46.022462918
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:12:46.023424216
+DEBUG (0): LQI Root is receiving packet from node 2 @0:12:46.025766122
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:12:46.025766122
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:12:46.025766122
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:12:46.025766122
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:12:46.027307251
+DEBUG (0): LQI Root is receiving packet from node 4 @0:12:46.028344843
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:12:46.030069076
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:12:46.032785124
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:12:46.032785124
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:12:46.032785124
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:12:46.032785124
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:12:46.032785124
+DEBUG (0): LQI Root is receiving packet from node 2 @0:12:46.032785124
+DEBUG (0): LQI Root is receiving packet from node 6 @0:12:46.037347476
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:12:46.039163261
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:12:46.039163261
+DEBUG (0): LQI Root is receiving packet from node 2 @0:12:46.044549582
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:12:46.046136487
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:12:46.050973495
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:12:46.050973495
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:46.050973495
+DEBUG (0): LQI Root is receiving packet from node 4 @0:12:46.050973495
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:12:46.050973495
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:46.050973495
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:12:46.058450258
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:12:46.058450258
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:12:46.058450258
+DEBUG (0): LQI Root is receiving packet from node 4 @0:12:46.058450258
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:12:46.058450258
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:12:46.059686213
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 69 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:51.008653912
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:12:51.012527283
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:51.012527283
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:51.012527283
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:51.012527283
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:12:51.012527283
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:51.012527283
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:12:51.016143595
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:51.016143595
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:12:51.016143595
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:12:51.016143595
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:51.016143595
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:12:51.018295071
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:51.018295071
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:51.018295071
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:51.018295071
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:12:51.018295071
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:51.020004046
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:51.020736463
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:51.020736463
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:12:51.020736463
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:12:51.021453622
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:51.022063970
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:12:51.029739096
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:51.029739096
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:51.029739096
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:51.029739096
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:12:51.029739096
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:51.029739096
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:12:56.008905259
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:12:56.008905259
+DEBUG (0): LQI Root is receiving packet from node 1 @0:12:56.009203226
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:12:56.011993228
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:56.011993228
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:56.011993228
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:56.011993228
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:56.016021525
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:56.016021525
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:56.016021525
+DEBUG (0): LQI Root is receiving packet from node 2 @0:12:56.018295071
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:12:56.018295071
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:12:56.020812757
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:12:56.020812757
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:56.020812757
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:56.020812757
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:56.026214337
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:56.026214337
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:12:56.026214337
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:12:56.028533659
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:56.028533659
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:56.028533659
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:56.028533659
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:56.028533659
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:12:56.028533659
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:12:56.030959792
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:56.030959792
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:56.030959792
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:56.030959792
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:12:56.030959792
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:56.030959792
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:12:56.041503554
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:12:56.041503554
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:12:56.041503554
+DEBUG (0): LQI Root is receiving packet from node 5 @0:12:56.041503554
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:12:56.041503554
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:12:56.041503554
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:13:1.006853386
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:1.006853386
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:13:1.006853386
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:13:1.008079399
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:13:1.010623828
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:13:1.010623828
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:13:1.016437392
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:13:1.017267027
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:1.017267027
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:13:1.017267027
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:13:1.019397580
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:1.019397580
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:13:1.019397580
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:13:1.019397580
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:13:1.019397580
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:13:1.019397580
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:13:1.024621720
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:13:1.024621720
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:1.024621720
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:13:1.024621720
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:13:1.024621720
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:1.026523393
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:13:1.026523393
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:13:1.026523393
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:13:1.026523393
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:13:1.027627684
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:13:1.029041079
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:13:1.029041079
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:1.029041079
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:13:1.029041079
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:13:1.029041079
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:13:1.035333327
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:1.035333327
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:13:1.035333327
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:13:1.036487324
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:13:1.036487324
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:13:1.041864051
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:13:1.041864051
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:13:1.041864051
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:1.041864051
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:13:1.041864051
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:13:1.041864051
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:13:1.049478142
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:13:1.049478142
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:1.049478142
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:13:1.049478142
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 790.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 2744 and my cost to 790.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 790.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 790.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 790.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 790.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 790.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:6.006982663
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:6.009554176
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:13:6.015384542
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:13:6.017425325
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:6.028144589
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:6.031986008
+DEBUG (0): LQI Root is receiving packet from node 5 @0:13:6.036563618
+DEBUG (0): LQI Root is receiving packet from node 3 @0:13:6.044727022
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:13:6.048540036
+DEBUG (0): LQI Root is receiving packet from node 6 @0:13:6.056367749
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 1402.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1402.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 1402.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 1402.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 1402.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 2131.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 790.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 2131.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 2131.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:13:11.006870187
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:13:11.009981301
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:13:11.013870048
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:13:11.015840642
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:11.019350261
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:11.024101034
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:11.028253291
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:11.033685388
+DEBUG (0): LQI Root is receiving packet from node 5 @0:13:11.039651539
+DEBUG (0): LQI Root is receiving packet from node 3 @0:13:11.045632950
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:13:16.010316992
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:13:16.013763237
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:16.018434739
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:16.022544646
+DEBUG (0): LQI Root is receiving packet from node 5 @0:13:16.026559575
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:16.032785124
+DEBUG (0): LQI Root is receiving packet from node 3 @0:13:16.043466214
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:13:16.050708433
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:13:16.063403671
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:16.066791102
+DEBUG (0): LQI Root is receiving packet from node 6 @0:13:16.070971986
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 60 that advertises 165.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1402.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 165.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 790.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 165.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 74 that advertises 165.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 165.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 165.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:21.006517694
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:13:21.008645861
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:13:21.013889189
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:13:21.015792644
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:21.017814449
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:13:21.023332664
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:13:21.038650177
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:21.048272705
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:13:21.056060354
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:13:21.068910400
+DEBUG (0): LQI Root is receiving packet from node 6 @0:13:21.084084874
+DEBUG (0): LQI Root is receiving packet from node 3 @0:13:21.092950179
+DEBUG (0): LQI Root is receiving packet from node 5 @0:13:21.100793150
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 915.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1402.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 915.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 790.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 915.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 165.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 915.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 165.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 1580.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1402.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1580.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 1580.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 1580.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 1580.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 165.
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:13:26.009872269
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:26.013582472
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:13:26.017419614
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:13:26.020679311
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:26.024314655
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:26.033273403
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:13:26.040383957
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:13:26.043321561
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:13:26.050195301
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:26.054071011
+DEBUG (0): LQI Root is receiving packet from node 3 @0:13:26.064889429
+DEBUG (0): LQI Root is receiving packet from node 5 @0:13:26.068704104
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:13:26.072206280
+DEBUG (0): LQI Root is receiving packet from node 6 @0:13:26.078447088
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:31.008165634
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:13:31.008731749
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:31.010490273
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:31.019336545
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:13:31.022447659
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:13:31.026628543
+DEBUG (0): LQI Root is receiving packet from node 6 @0:13:31.031511327
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:13:31.039392142
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:13:31.041106828
+DEBUG (0): LQI Root is receiving packet from node 3 @0:13:31.044000269
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:13:31.047494511
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:13:31.063272007
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:31.066934095
+DEBUG (0): LQI Root is receiving packet from node 5 @0:13:31.075356897
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:13:36.007593011
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:13:36.010667943
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:36.013704542
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:13:36.016616614
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:36.030107645
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:13:36.030658501
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:13:36.035373439
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:36.040500362
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:36.044120448
+DEBUG (0): LQI Root is receiving packet from node 6 @0:13:36.062270645
+DEBUG (0): LQI Root is receiving packet from node 6 @0:13:36.065173680
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:13:36.067092394
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:13:36.077544603
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:13:36.086043699
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:13:36.086043699
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:36.086043699
+DEBUG (0): LQI Root is receiving packet from node 3 @0:13:36.086043699
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:13:36.086043699
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:13:36.086043699
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:36.090438205
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:36.092788045
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:13:36.104583020
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:13:36.111922454
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 67 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1402.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 111 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 1000.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1402.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 1000.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 2, my link to 1423 and my cost to 1000.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 1000.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 1000.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1000.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 1728.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 1728.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 42 and my cost to 1728.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 2289.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 42 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 2289.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 2289.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 72 that advertises 2289.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 2289.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:13:41.011596502
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:41.015688173
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:41.024299397
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:13:41.033082973
+DEBUG (0): LQI Root is receiving packet from node 3 @0:13:41.040261887
+DEBUG (0): LQI Root is receiving packet from node 3 @0:13:41.044589694
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:41.051385480
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:41.054095864
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:41.060580811
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:41.066958948
+DEBUG (0): LQI Root is receiving packet from node 6 @0:13:41.071353454
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:46.006004215
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:13:46.016723425
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:13:46.025117931
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:46.027162715
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:46.039193778
+DEBUG (0): LQI Root is receiving packet from node 5 @0:13:46.044727022
+DEBUG (0): LQI Root is receiving packet from node 3 @0:13:46.050820908
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:46.053409222
+DEBUG (0): LQI Root is receiving packet from node 6 @0:13:46.059726324
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:51.018146367
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:51.022752951
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:13:51.026079230
+DEBUG (0): LQI Root is receiving packet from node 6 @0:13:51.035799021
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:13:51.040374410
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:51.043573025
+DEBUG (0): LQI Root is receiving packet from node 5 @0:13:51.046203234
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:51.052253335
+DEBUG (0): LQI Root is receiving packet from node 3 @0:13:51.061667953
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 106.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 42 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 106.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 106.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 106.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 106.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 106.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 1125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 1125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 42 and my cost to 1728.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1125.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 106.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 1125.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 1125.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 106.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 1770.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1770.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 106.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 1770.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1770.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 106.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:13:56.009292438
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:13:56.015047189
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:13:56.016275211
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:13:56.021888522
+DEBUG (0): LQI Root is receiving packet from node 2 @0:13:56.027208492
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:13:56.028678644
+DEBUG (0): LQI Root is receiving packet from node 1 @0:13:56.033403524
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:13:56.036182150
+DEBUG (0): LQI Root is receiving packet from node 3 @0:13:56.049730333
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:13:56.050815243
+DEBUG (0): LQI Root is receiving packet from node 4 @0:13:56.056612006
+DEBUG (0): LQI Root is receiving packet from node 5 @0:13:56.062059362
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:13:56.064532815
+DEBUG (0): LQI Root is receiving packet from node 6 @0:13:56.072421563
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:1.009795975
+DEBUG (0): LQI Root is receiving packet from node 1 @0:14:1.017915943
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:1.021919040
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:14:1.024987929
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:1.026979493
+DEBUG (0): LQI Root is receiving packet from node 2 @0:14:1.029031484
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:14:1.031259254
+DEBUG (0): LQI Root is receiving packet from node 2 @0:14:1.036548359
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:1.041589394
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:1.050159119
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:14:1.055652251
+DEBUG (0): LQI Root is receiving packet from node 4 @0:14:1.060275637
+DEBUG (0): LQI Root is receiving packet from node 4 @0:14:1.064395486
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:14:1.073352343
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:14:1.080584967
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:14:1.085009990
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:14:1.085009990
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:14:1.085009990
+DEBUG (0): LQI Root is receiving packet from node 6 @0:14:1.085009990
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:1.085009990
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:14:1.085009990
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:14:1.091815370
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:14:1.094684006
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:1.098864890
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:1.101962406
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:14:6.009004862
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:6.011543124
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:14:6.013492463
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:14:6.013492463
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:14:6.013492463
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:14:6.017684723
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:14:6.020179548
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:6.020179548
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:14:6.020179548
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:14:6.021396470
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:14:6.023990449
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:6.025102673
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:14:6.028205624
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:14:6.028205624
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:14:6.028205624
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:14:6.028205624
+DEBUG (0): LQI Root is receiving packet from node 4 @0:14:6.028205624
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:14:6.041045793
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:6.048949800
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:14:6.056090871
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:6.063811773
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:6.073165356
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:6.080977811
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 64 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 790.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 790.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 790.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 790.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 98 that advertises 1837.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 1837.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 2, my link to 34 and my cost to 1837.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 1837.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 1837.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1837.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 2349.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 34 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 2349.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 62 that advertises 2349.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 90 that advertises 2349.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 2349.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:14:11.006197262
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:11.017860225
+DEBUG (0): LQI Root is receiving packet from node 4 @0:14:11.021655868
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:11.023103783
+DEBUG (0): LQI Root is receiving packet from node 6 @0:14:11.028642691
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:11.032052707
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:11.034591363
+DEBUG (0): LQI Root is receiving packet from node 2 @0:14:11.037789978
+DEBUG (0): LQI Root is receiving packet from node 5 @0:14:11.040771136
+DEBUG (0): LQI Root is receiving packet from node 1 @0:14:16.007295888
+DEBUG (0): LQI Root is receiving packet from node 4 @0:14:16.009891410
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:16.010942599
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:16.019363180
+DEBUG (0): LQI Root is receiving packet from node 2 @0:14:16.025216809
+DEBUG (0): LQI Root is receiving packet from node 2 @0:14:16.028764761
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:16.031059001
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:16.037538513
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:16.040534654
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:16.046174937
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:16.052217383
+DEBUG (0): LQI Root is receiving packet from node 5 @0:14:16.061921916
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:21.006645081
+DEBUG (0): LQI Root is receiving packet from node 1 @0:14:21.016939386
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:21.019014451
+DEBUG (0): LQI Root is receiving packet from node 2 @0:14:21.026437505
+DEBUG (0): LQI Root is receiving packet from node 6 @0:14:21.031574023
+DEBUG (0): LQI Root is receiving packet from node 4 @0:14:21.036884050
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:21.041314738
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:21.047347636
+DEBUG (0): LQI Root is receiving packet from node 5 @0:14:21.052810251
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 61 that advertises 165.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 165.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 34 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 165.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 165.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 165.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 165.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 915.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1837.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 915.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 915.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 915.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 34 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 915.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 165.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:26.011825382
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:14:26.011956999
+DEBUG (0): LQI Root is receiving packet from node 1 @0:14:26.016542660
+DEBUG (0): LQI Root is receiving packet from node 2 @0:14:26.028749620
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:14:26.035983787
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:26.037782652
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:26.038032227
+DEBUG (0): LQI Root is receiving packet from node 5 @0:14:26.041675282
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:14:26.045001679
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:14:26.050544361
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:14:26.054843540
+DEBUG (0): LQI Root is receiving packet from node 6 @0:14:26.060443483
+DEBUG (0): LQI Root is receiving packet from node 6 @0:14:26.066699550
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:26.074847696
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 1871.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1871.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 1871.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 1871.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1871.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 165.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:31.007661979
+DEBUG (0): LQI Root is receiving packet from node 1 @0:14:31.015779725
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:31.023101562
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:14:31.030750053
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:31.034660054
+DEBUG (0): LQI Root is receiving packet from node 6 @0:14:31.035358180
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:14:31.037179630
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:14:31.040576656
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:14:31.049045234
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:14:31.055078085
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:31.070672477
+DEBUG (0): LQI Root is receiving packet from node 4 @0:14:31.079095279
+DEBUG (0): LQI Root is receiving packet from node 5 @0:14:31.090234130
+DEBUG (0): LQI Root is receiving packet from node 1 @0:14:36.006914421
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:36.009071214
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:14:36.011096847
+DEBUG (0): LQI Root is receiving packet from node 4 @0:14:36.016208512
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:36.017715241
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:14:36.020150921
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:14:36.022231816
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:36.026452764
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:36.034776689
+DEBUG (0): LQI Root is receiving packet from node 5 @0:14:36.037179630
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:14:36.040193527
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:14:36.043130523
+DEBUG (0): LQI Root is receiving packet from node 6 @0:14:36.045518813
+DEBUG (0): LQI Root is receiving packet from node 2 @0:14:36.055086018
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 61 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 34 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 165.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 88 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:14:41.006227779
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:14:41.008844224
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:41.010459756
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:41.013902787
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:41.022277592
+DEBUG (0): LQI Root is receiving packet from node 2 @0:14:41.024224994
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:14:41.025440025
+DEBUG (0): LQI Root is receiving packet from node 6 @0:14:41.031665575
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:14:41.033115151
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:14:41.040393551
+DEBUG (0): LQI Root is receiving packet from node 4 @0:14:41.043628396
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:14:41.047248482
+DEBUG (0): LQI Root is receiving packet from node 5 @0:14:41.051150935
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:41.059894170
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 192.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 34 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 192.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 192.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 192.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 192.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 677.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 677.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 108 that advertises 677.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 677.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 677.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 192.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 677.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 677.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1057.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 677.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 1057.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 1057.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 192.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 1057.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 65 that advertises 1057.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:14:46.006548212
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:46.012733302
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:46.015502729
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:14:46.018634645
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:46.024232927
+DEBUG (0): LQI Root is receiving packet from node 4 @0:14:46.026782791
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:14:46.030801493
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:14:46.034213778
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:14:46.050052308
+DEBUG (0): LQI Root is receiving packet from node 2 @0:14:46.059213193
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:14:46.063043127
+DEBUG (0): LQI Root is receiving packet from node 5 @0:14:46.069390746
+DEBUG (0): LQI Root is receiving packet from node 6 @0:14:46.077279494
+DEBUG (0): LQI Root is receiving packet from node 1 @0:14:51.007997788
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:51.010133888
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:14:51.016483168
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:51.018630763
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:14:51.023013892
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:51.026618719
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:14:51.029473987
+DEBUG (0): LQI Root is receiving packet from node 4 @0:14:51.036456807
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:14:51.040378293
+DEBUG (0): LQI Root is receiving packet from node 2 @0:14:51.044086157
+DEBUG (0): LQI Root is receiving packet from node 6 @0:14:51.047992384
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:14:51.050042714
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:51.056527662
+DEBUG (0): LQI Root is receiving packet from node 1 @0:14:56.011019011
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:14:56.011676678
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:14:56.015762127
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:14:56.018028071
+DEBUG (0): LQI Root is receiving packet from node 4 @0:14:56.020297843
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:14:56.021590950
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:14:56.028230706
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:14:56.031915379
+DEBUG (0): LQI Root is receiving packet from node 5 @0:14:56.034560845
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:14:56.036592474
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:14:56.043771388
+DEBUG (0): LQI Root is receiving packet from node 3 @0:14:56.047134014
+DEBUG (0): LQI Root is receiving packet from node 2 @0:14:56.055144832
+DEBUG (0): LQI Root is receiving packet from node 6 @0:14:56.059112094
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 72 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 677.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 216.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 76 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 192.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 216.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 317.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 677.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 317.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 677.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 317.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 317.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 317.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 317.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 842.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 677.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 842.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 317.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 93 that advertises 842.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 192.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 842.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 842.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 216.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:15:1.019836200
+DEBUG (0): LQI Root is receiving packet from node 1 @0:15:1.025972537
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:15:1.026681644
+DEBUG (0): LQI Root is receiving packet from node 2 @0:15:1.039117485
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:15:1.047080636
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:15:1.051990163
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:1.052553074
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:15:1.054923608
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:15:1.057971574
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:15:1.059939946
+DEBUG (0): LQI Root is receiving packet from node 3 @0:15:1.063361669
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:15:1.067325157
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:1.074420452
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:15:1.076358307
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:15:1.084781110
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:15:1.090136913
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:15:1.090136913
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:1.090136913
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:1.090136913
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:15:1.090136913
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:1.096392980
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:15:1.099200581
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:1.112658755
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:1.116442912
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:6.007602605
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:15:6.007602605
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:15:6.009948562
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:15:6.014205740
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:15:6.014205740
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:15:6.014205740
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:6.016405332
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:6.018678760
+DEBUG (0): LQI Root is receiving packet from node 1 @0:15:6.021776394
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:15:6.023965596
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:15:6.024886830
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:15:6.027620358
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:15:6.027620358
+DEBUG (0): LQI Root is receiving packet from node 2 @0:15:6.031457618
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:15:6.034362482
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:15:6.037719396
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:15:6.039033866
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:6.043044683
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:15:6.050017909
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:15:6.053544890
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:6.058043985
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:6.060792772
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:6.069246092
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:15:11.006934996
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:15:11.006934996
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:15:11.006934996
+DEBUG (0): LQI Root is receiving packet from node 3 @0:15:11.006934996
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:15:11.010898484
+DEBUG (0): LQI Root is receiving packet from node 1 @0:15:11.011919274
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:11.015627020
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:15:11.017129698
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:15:11.018005156
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:15:11.021365952
+DEBUG (0): LQI Root is receiving packet from node 3 @0:15:11.021365952
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:15:11.021365952
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:15:11.021365952
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:15:11.029041079
+DEBUG (0): LQI Root is receiving packet from node 3 @0:15:11.030191145
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:15:11.031528247
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:15:11.031528247
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:15:11.034499811
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:15:11.034499811
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:11.034499811
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:15:11.034499811
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:11.037357070
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:15:11.038598689
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:11.043136235
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:15:11.043136235
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:15:11.045730214
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:11.050109461
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:15:11.050109461
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:15:11.050109461
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:11.052383007
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:15:11.052383007
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:15:11.057056052
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:15:11.057056052
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:15:11.057056052
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:15:11.057056052
+DEBUG (0): LQI Root is receiving packet from node 2 @0:15:11.058358706
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:11.060174491
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:15:11.060174491
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:15:11.060174491
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:15:11.060174491
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:15:11.060174491
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:15:11.063449447
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:15:11.063449447
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:11.063449447
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:15:11.063449447
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:15:11.063449447
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:15:11.065484519
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:15:11.065484519
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:15:11.065484519
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:15:11.065484519
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:11.065484519
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:15:11.068362748
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:15:11.068362748
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:15:11.068362748
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:15:11.068362748
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:15:11.072284234
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:15:11.072284234
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:15:11.072284234
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:15:11.072284234
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:11.072284234
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:15:11.072284234
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:15:11.079141055
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:15:11.079745739
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:15:11.085305570
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 62 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4913 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 1518.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4913 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 1518.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 1518.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1518.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 2130.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 2130.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 2130.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 2130.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 2130.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 2130.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 2920.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 58 that advertises 2920.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 2920.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 2920.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 1518.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:16.006838009
+DEBUG (0): LQI Root is receiving packet from node 1 @0:15:16.008775982
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:16.012649352
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:15:16.016010149
+DEBUG (0): LQI Root is receiving packet from node 2 @0:15:16.018747120
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:15:16.027896676
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:16.031411841
+DEBUG (0): LQI Root is receiving packet from node 3 @0:15:16.035026263
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:16.040734907
+DEBUG (0): LQI Root is receiving packet from node 3 @0:15:21.009864667
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:15:21.012149698
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:21.015154000
+DEBUG (0): LQI Root is receiving packet from node 2 @0:15:21.018090996
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:21.026376470
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:15:21.032579436
+DEBUG (0): LQI Root is receiving packet from node 1 @0:15:21.034669996
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:21.041749914
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:21.045165642
+DEBUG (0): LQI Root is receiving packet from node 3 @0:15:26.007194394
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:26.009508281
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:26.016341958
+DEBUG (0): LQI Root is receiving packet from node 1 @0:15:26.018343187
+DEBUG (0): LQI Root is receiving packet from node 2 @0:15:26.022378691
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:15:26.025073817
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:26.032413251
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:15:26.040576656
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:26.048343334
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 59 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 2130.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 216.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 216.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 1728.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 2130.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 1728.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 1728.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 2325.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 2130.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2325.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 2325.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 2325.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 2325.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:31.009264142
+DEBUG (0): LQI Root is receiving packet from node 1 @0:15:31.009950902
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:15:31.012103922
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:31.015598164
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:15:31.018731862
+DEBUG (0): LQI Root is receiving packet from node 3 @0:15:31.029060111
+DEBUG (0): LQI Root is receiving packet from node 2 @0:15:31.033715905
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:15:31.038577766
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:31.041076310
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:31.047748245
+DEBUG (0): LQI Root is receiving packet from node 1 @0:15:36.008547101
+DEBUG (0): LQI Root is receiving packet from node 3 @0:15:36.015861336
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:15:36.016635755
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:15:36.019372727
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:36.022723977
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:36.024963123
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:36.031999605
+DEBUG (0): LQI Root is receiving packet from node 2 @0:15:36.046924275
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:15:36.048112792
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:36.053071870
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:41.009033040
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:15:41.011239840
+DEBUG (0): LQI Root is receiving packet from node 3 @0:15:41.019355578
+DEBUG (0): LQI Root is receiving packet from node 2 @0:15:41.029146346
+DEBUG (0): LQI Root is receiving packet from node 1 @0:15:41.035127757
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:15:41.039691651
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:41.041246377
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:41.048068677
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:15:41.048631588
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:41.058351380
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 65 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 2130.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 111 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 72 that advertises 243.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 2130.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 243.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 243.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 243.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 243.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 243.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:15:46.008304505
+DEBUG (0): LQI Root is receiving packet from node 1 @0:15:46.011019011
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:46.013048300
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:15:46.013330282
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:46.016204629
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:15:46.018724536
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:46.026094606
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:15:46.029197439
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:46.031725067
+DEBUG (0): LQI Root is receiving packet from node 2 @0:15:46.045671519
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:15:46.046516064
+DEBUG (0): LQI Root is receiving packet from node 3 @0:15:46.055930682
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 1006.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1006.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 108 that advertises 1006.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 1006.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 1006.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 1006.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 1426.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 1006.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 1426.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 1426.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 1426.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 1426.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:15:51.012941607
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:15:51.017150669
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:15:51.021112219
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:15:51.026069406
+DEBUG (0): LQI Root is receiving packet from node 2 @0:15:51.028512688
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:15:51.035785424
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:51.040652949
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:15:51.043246928
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:15:51.047752019
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:51.050020130
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:51.053393964
+DEBUG (0): LQI Root is receiving packet from node 3 @0:15:51.061725214
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:15:51.071412827
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:51.079423645
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:15:56.006555419
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:15:56.007331722
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:15:56.009368732
+DEBUG (0): LQI Root is receiving packet from node 1 @0:15:56.010530732
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:15:56.012087002
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:15:56.021796970
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:15:56.029483581
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:56.032793176
+DEBUG (0): LQI Root is receiving packet from node 4 @0:15:56.045503673
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:15:56.054507849
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:15:56.063296860
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:56.065324724
+DEBUG (0): LQI Root is receiving packet from node 6 @0:15:56.072358985
+DEBUG (0): LQI Root is receiving packet from node 5 @0:15:56.079271176
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 59 that advertises 106.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1006.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 72 that advertises 106.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 1006.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 106.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 106.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 106.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 106.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:1.008592878
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:16:1.023578464
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:16:1.032912906
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:1.036462471
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:16:1.039573355
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:16:1.045676835
+DEBUG (0): LQI Root is receiving packet from node 3 @0:16:1.048572215
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:16:1.050582480
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:1.051835915
+DEBUG (0): LQI Root is receiving packet from node 3 @0:16:1.053531292
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:1.057969913
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:1.062030388
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:1.071673886
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 368.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1006.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 368.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 1006.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 368.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 106.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 368.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 368.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 368.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 103 that advertises 1171.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1006.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1171.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 368.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 1171.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 1171.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 106.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:6.008089340
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:16:6.010024856
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:16:6.014301174
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:16:6.017432982
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:6.020272990
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:16:6.026681644
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:6.028932606
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:16:6.033988671
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:6.039224296
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:16:6.045596768
+DEBUG (0): LQI Root is receiving packet from node 3 @0:16:6.049417107
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:16:6.050971604
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:16:6.055575958
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:16:6.060260379
+DEBUG (0): LQI Root is receiving packet from node 4 @0:16:6.080939691
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:6.081714111
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:16:6.087054656
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:6.093203912
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:6.097186433
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:16:6.097186433
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:6.097186433
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:16:11.006341797
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:11.006341797
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:11.006341797
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:16:11.006341797
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:16:11.007713190
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:11.008852157
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:16:11.010088230
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:16:11.012153472
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:11.017932745
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:16:11.017932745
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:16:11.017932745
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:16:11.023715792
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:11.025455284
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:11.025455284
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:16:11.025455284
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:16:11.025455284
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:16:11.025455284
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:16:11.028719103
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:11.031223073
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:16:11.031223073
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:11.031223073
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:11.033511878
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:11.033511878
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:16:11.033511878
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:11.033511878
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:16:11.034168002
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:11.037340268
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:16:11.037340268
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:16:11.037340268
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:16:11.037340268
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:11.039156054
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:11.039397853
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:11.039397853
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:16:11.039397853
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:16:11.040805536
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:11.044511857
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:16:11.044511857
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:16:11.044511857
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:16:11.044511857
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:16:11.045824106
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:16:11.047639891
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:16:11.050998348
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:16:11.050998348
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:11.050998348
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:16:11.050998348
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:16:11.050998348
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:16:11.053316127
+DEBUG (0): LQI Root is receiving packet from node 3 @0:16:11.053316127
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:16:11.053316127
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:16:11.053316127
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:11.054153016
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:16:11.058078385
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:11.058078385
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:16:11.058078385
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:16:11.058990024
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:16:11.063125132
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:16:11.063125132
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:16:11.063125132
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:11.063125132
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:16:11.063125132
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:16:11.066176872
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:16:11.066176872
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:11.066176872
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:16:11.066176872
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:16:11.066176872
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:16:11.067859211
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:16:11.070647671
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:16:11.070647671
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:16:11.070647671
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:11.070647671
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:16:11.070647671
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:16:11.073790963
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:16:11.073790963
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:16:11.075774594
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:16:11.075774594
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:16:11.075774594
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:16:11.075774594
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:16:11.080031771
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:11.080031771
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:16:11.080031771
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:16:11.082625750
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:16:11.082625750
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:16:11.082625750
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:16:11.082625750
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:16:11.091689418
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:16:11.091689418
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:11.091689418
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:16:11.091689418
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:16:11.091689418
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:16:16.006738524
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:16:16.006738524
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:16:16.006738524
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:16:16.009693047
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:16:16.009693047
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:16:16.009693047
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:16:16.011659758
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:16.011659758
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:16.011659758
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:16:16.012466248
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:16.012466248
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:16:16.012466248
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:16:16.014972557
+DEBUG (0): LQI Root is receiving packet from node 4 @0:16:16.014972557
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:16:16.014972557
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:16:16.014972557
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:16:16.015521870
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:16.019029710
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:16.019029710
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:16:16.019029710
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:16:16.019534908
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:16:16.023242773
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:16.023242773
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:16:16.023242773
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:16.023242773
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:16:16.023242773
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:16.025346812
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:16.025346812
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:16:16.025346812
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:16:16.025346812
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:16:16.026002936
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:16:16.028079780
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:16.028079780
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:16:16.028079780
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:16:16.028079780
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:16:16.028976161
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:16:16.032487884
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:16:16.032487884
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:16.032487884
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:16.032487884
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:16:16.032487884
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:16:16.037248598
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:16.037248598
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:16:16.037248598
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:16.037248598
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:16.039339040
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:16:16.039339040
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:16:16.039339040
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:16.039339040
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:16:16.042940093
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:16:16.042940093
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:16.042940093
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:16:16.042940093
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:16:16.051134015
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:16.051134015
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:16:16.051134015
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:16:16.051134015
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 88 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1155 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 1155.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 2457 and my cost to 1155.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 1155.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 1155.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 1155.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 1155.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 1155.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1155.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 1945.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1945.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 1945.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 1945.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1155 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 1945.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 1945.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 1155.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 2557.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 1155.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 2557.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 1155.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 2557.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 2557.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 2557.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1155 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:16:21.007739933
+DEBUG (0): LQI Root is receiving packet from node 3 @0:16:21.010581825
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:16:21.016921788
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:21.020006385
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:21.024797499
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:16:21.029726059
+DEBUG (0): LQI Root is receiving packet from node 4 @0:16:21.035272293
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:21.049447625
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:21.055001792
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:21.064462186
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:26.007440424
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:16:26.009418390
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:16:26.011413398
+DEBUG (0): LQI Root is receiving packet from node 4 @0:16:26.015430318
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:26.018221117
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:26.020692908
+DEBUG (0): LQI Root is receiving packet from node 3 @0:16:26.024192586
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:16:26.027467771
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:26.034991972
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:26.042728132
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:31.007143183
+DEBUG (0): LQI Root is receiving packet from node 3 @0:16:31.010520791
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:16:31.014987816
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:31.018243583
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:16:31.022094488
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:31.024248304
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:16:31.035068265
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:31.037606874
+DEBUG (0): LQI Root is receiving packet from node 4 @0:16:31.045755019
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:31.054101528
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 1155.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 343.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 343.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 343.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1945.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1331.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 2010.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1945.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2010.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 2010.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 2010.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:16:36.008457092
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:36.011056736
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:36.016634212
+DEBUG (0): LQI Root is receiving packet from node 3 @0:16:36.019447130
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:16:36.022048711
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:36.025621469
+DEBUG (0): LQI Root is receiving packet from node 4 @0:16:36.027010128
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:36.031953947
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:36.034822465
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:36.040117234
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:16:36.044463742
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:36.051284381
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:41.012407434
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:41.018441946
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:41.023363299
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:41.029436262
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:16:41.033801793
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:41.038074229
+DEBUG (0): LQI Root is receiving packet from node 4 @0:16:41.040912347
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:16:41.044402707
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:41.048892647
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:16:41.051406450
+DEBUG (0): LQI Root is receiving packet from node 3 @0:16:41.055610249
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:41.061568744
+DEBUG (0): LQI Root is receiving packet from node 3 @0:16:46.005622748
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:46.015825501
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:46.020837562
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:16:46.021896124
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:46.024599136
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:46.028573723
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:16:46.030318927
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:46.034518952
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:46.040313375
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:16:46.041324332
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:46.048476780
+DEBUG (0): LQI Root is receiving packet from node 4 @0:16:46.054641295
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1945.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 1155.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 343.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 68 that advertises 385.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1945.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 385.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 1331 and my cost to 385.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 385.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 385.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 385.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 1133.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1133.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 1133.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1133.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 1133.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 1133.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 1133.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 385.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 1862.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1133.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 1862.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 343.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 78 that advertises 1862.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 62 that advertises 1862.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:16:51.006866305
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:16:51.010837449
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:51.015001532
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:16:51.017581795
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:51.026582767
+DEBUG (0): LQI Root is receiving packet from node 4 @0:16:51.031343599
+DEBUG (0): LQI Root is receiving packet from node 5 @0:16:51.039415452
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:51.043862941
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:16:51.046393994
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:16:51.053916533
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:51.057794134
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:51.058610778
+DEBUG (0): LQI Root is receiving packet from node 3 @0:16:51.066461075
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:51.071664292
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:16:56.010822191
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:16:56.013192954
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:16:56.017082032
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:16:56.020263444
+DEBUG (0): LQI Root is receiving packet from node 4 @0:16:56.025484258
+DEBUG (0): LQI Root is receiving packet from node 1 @0:16:56.034013872
+DEBUG (0): LQI Root is receiving packet from node 2 @0:16:56.038866138
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:16:56.041206036
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:56.043199491
+DEBUG (0): LQI Root is receiving packet from node 3 @0:16:56.056449478
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:16:56.073272167
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:56.081267726
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:16:56.086730341
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:56.086730341
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:16:56.086730341
+DEBUG (0): LQI Root is receiving packet from node 6 @0:16:56.086730341
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:16:56.091597866
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:16:56.095183661
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:16:56.099959634
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:1.008081289
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:17:1.010532275
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:17:1.011766687
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:17:1.014085891
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:1.017961719
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:17:1.017961719
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:1.017961719
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:17:1.017961719
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:17:1.018663620
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:17:1.020347393
+DEBUG (0): LQI Root is receiving packet from node 6 @0:17:1.022600246
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:1.022600246
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:17:1.022600246
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:1.023180195
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:17:1.035834974
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:17:1.038177157
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:17:1.044486657
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:1.051383589
+DEBUG (0): LQI Root is receiving packet from node 6 @0:17:1.051383589
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:17:1.051383589
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:1.054420071
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:17:1.058890870
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:17:1.058890870
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:17:1.058890870
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:1.058890870
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:17:1.058890870
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:17:1.061446675
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:17:1.063407445
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:17:1.064826504
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:17:1.064902797
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:17:1.064902797
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:1.067939279
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:17:1.067939279
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:1.067939279
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:1.067939279
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:17:1.070319636
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:17:1.072646561
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:1.072646561
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:17:1.072646561
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:17:1.072646561
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:17:1.078635627
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:17:1.078635627
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:17:1.078635627
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:17:1.078635627
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:1.078635627
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:6.006593870
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:17:6.006593870
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:17:6.006593870
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:17:6.007524769
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:6.007524769
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:17:6.008987264
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:17:6.010354835
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:6.010354835
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:17:6.015093084
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:17:6.015093084
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:17:6.017211704
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:17:6.017211704
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:17:6.019433762
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:17:6.019433762
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:17:6.019433762
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:17:6.019433762
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:17:6.022722434
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:6.022722434
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:17:6.022722434
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:17:6.022722434
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:6.026664495
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:17:6.026664495
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:17:6.026664495
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:17:6.026664495
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:17:6.026956301
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:6.029184071
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:17:6.029184071
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:17:6.029184071
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:17:6.029184071
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:17:6.030763769
+DEBUG (0): LQI Root is receiving packet from node 6 @0:17:6.032088936
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:6.032088936
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:17:6.032088936
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:6.033836084
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:17:6.034585651
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:6.034585651
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:6.034585651
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:17:6.034585651
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:17:6.034585651
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:6.037316958
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:17:6.037316958
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:17:6.037316958
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:6.037316958
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:17:6.037316958
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:17:6.038347343
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:17:6.040313375
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:17:6.040313375
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:17:6.040313375
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:6.040313375
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:17:6.045098895
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:17:6.045098895
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:6.045098895
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:6.045098895
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:6.045098895
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:17:6.047868771
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:17:6.047868771
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:17:6.047868771
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:6.047868771
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:17:6.047868771
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:17:6.047868771
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:17:6.051635331
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:6.051635331
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:6.051635331
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:17:6.051635331
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:17:6.051635331
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:17:6.057738811
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:17:6.057738811
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:6.057738811
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:17:6.062514784
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:6.062514784
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:6.062514784
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:17:6.062514784
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:6.062514784
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:17:11.006891111
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:11.006891111
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:11.006891111
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:11.006891111
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:11.009540460
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:17:11.009540460
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:11.009540460
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:17:11.009540460
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:17:11.013934966
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:11.013934966
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:11.013934966
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:17:11.013934966
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:17:11.013934966
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:17:11.013934966
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:11.016422134
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:17:11.016422134
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:11.018541550
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:11.018541550
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:17:11.018541550
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:17:11.018541550
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:11.021457505
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:11.021457505
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:17:11.021457505
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:11.021457505
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:17:11.021457505
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:17:11.022846046
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:17:11.024921230
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:11.024921230
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:11.024921230
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:17:11.024921230
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:17:11.024921230
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:11.026202960
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:17:11.029407287
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:17:11.029407287
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:17:11.029407287
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:11.029407287
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:17:11.029407287
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:17:11.031589281
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:17:11.031589281
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:11.031589281
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:11.031589281
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:17:11.031589281
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:17:11.031589281
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:17:11.034564728
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:17:11.034564728
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:17:11.034564728
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:17:11.034564728
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:17:11.039066044
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:17:11.039066044
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:17:11.039066044
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:11.039066044
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:17:11.039066044
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:11.039066044
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:17:11.045489957
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:17:11.045489957
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:17:11.045489957
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:17:11.045489957
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:11.045489957
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:17:16.007540027
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:16.007540027
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:17:16.007540027
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:17:16.008910971
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:17:16.009754082
+DEBUG (0): LQI Root is receiving packet from node 3 @0:17:16.010749671
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:17:16.011415619
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:17:16.015662973
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:17:16.015662973
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:17:16.015662973
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:17:16.015662973
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:17:16.018007377
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:17:16.018007377
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:17:16.018007377
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:17:16.019195335
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:17:16.021903781
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:17:16.021903781
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:17:16.021903781
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:17:16.021903781
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:17:16.025153884
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:17:16.025153884
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:17:16.025153884
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:17:16.025153884
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:17:16.025153884
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:17:16.027957711
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:17:16.027957711
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:17:16.027957711
+DEBUG (0): LQI Root is receiving packet from node 6 @0:17:16.028030122
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:17:16.037307411
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:17:16.037307411
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:16.037307411
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:17:16.037307411
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:17:16.037307411
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:21.005907346
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:21.008304505
+DEBUG (0): LQI Root is receiving packet from node 6 @0:17:21.011369843
+DEBUG (0): LQI Root is receiving packet from node 3 @0:17:21.015495127
+DEBUG (0): LQI Root is receiving packet from node 5 @0:17:21.017669465
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:21.026712162
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 855.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 855.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 855.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 855.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 1235.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1235.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 1235.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 1235.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1235.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1235.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 2090.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 2090.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:26.009554176
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:26.011758636
+DEBUG (0): LQI Root is receiving packet from node 5 @0:17:26.017562654
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:17:26.019843856
+DEBUG (0): LQI Root is receiving packet from node 3 @0:17:26.024863969
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:26.031726610
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:17:26.035631176
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:26.039371218
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:26.041887243
+DEBUG (0): LQI Root is receiving packet from node 6 @0:17:26.049608145
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:31.007097525
+DEBUG (0): LQI Root is receiving packet from node 5 @0:17:31.013625909
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:31.019229734
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:17:31.026725530
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:17:31.027162597
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:31.051683328
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:31.054803429
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:31.061547774
+DEBUG (0): LQI Root is receiving packet from node 3 @0:17:31.069543333
+DEBUG (0): LQI Root is receiving packet from node 6 @0:17:31.085320829
+DEBUG (0): LQI Root is receiving packet from node 5 @0:17:36.006576390
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:17:36.008979662
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:36.012544881
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:36.015802191
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:36.020068963
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:17:36.022173002
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:36.027803463
+DEBUG (0): LQI Root is receiving packet from node 3 @0:17:36.033090298
+DEBUG (0): LQI Root is receiving packet from node 6 @0:17:36.054513513
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:36.060418630
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 72 that advertises 243.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 243.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 243.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 980.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1235.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 980.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 980.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 980.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 980.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 855.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 111 that advertises 1621.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1235.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1621.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 1621.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 77 that advertises 1621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 243.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:41.007318354
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:17:41.010352945
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:41.012622717
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:41.012712727
+DEBUG (0): LQI Root is receiving packet from node 5 @0:17:41.015395918
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:41.018800948
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:17:41.023378440
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:17:41.026618719
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:41.029115711
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:17:41.033851343
+DEBUG (0): LQI Root is receiving packet from node 3 @0:17:41.036597909
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:17:41.039100336
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:41.045920975
+DEBUG (0): LQI Root is receiving packet from node 6 @0:17:41.051704022
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:46.011232633
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:17:46.012270106
+DEBUG (0): LQI Root is receiving packet from node 5 @0:17:46.017333773
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:46.018441946
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:46.020862415
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:46.027078371
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:17:46.028018746
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:46.030322809
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:46.036685687
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:17:46.041400626
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:17:46.042869235
+DEBUG (0): LQI Root is receiving packet from node 6 @0:17:46.046069788
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:17:46.049384700
+DEBUG (0): LQI Root is receiving packet from node 3 @0:17:46.056144304
+DEBUG (0): LQI Root is receiving packet from node 5 @0:17:51.005935524
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:17:51.009004744
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:51.011598841
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:51.018152031
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:51.025516319
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:51.035312404
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:17:51.038715094
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:17:51.045249592
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:17:51.047656693
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:51.054071011
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:17:51.056247341
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:51.059457332
+DEBUG (0): LQI Root is receiving packet from node 3 @0:17:51.069894283
+DEBUG (0): LQI Root is receiving packet from node 6 @0:17:51.074471893
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 277.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1235.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 277.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 277.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 3, my link to 855 and my cost to 277.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 277.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 277.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 277.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 1132.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 380 and my cost to 1132.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 1132.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 1132.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 277.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 1132.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 1132.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 243.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 1512.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 1512.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 855 and my cost to 277.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 90 that advertises 1512.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 277.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 78 that advertises 1512.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 243.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:17:56.007257319
+DEBUG (0): LQI Root is receiving packet from node 1 @0:17:56.011186857
+DEBUG (0): LQI Root is receiving packet from node 5 @0:17:56.014129446
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:17:56.016298403
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:17:56.020210065
+DEBUG (0): LQI Root is receiving packet from node 2 @0:17:56.022142603
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:17:56.029380544
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:17:56.031894455
+DEBUG (0): LQI Root is receiving packet from node 3 @0:17:56.044334070
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:17:56.047107379
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:17:56.051349298
+DEBUG (0): LQI Root is receiving packet from node 6 @0:17:56.055011386
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:17:56.061359005
+DEBUG (0): LQI Root is receiving packet from node 4 @0:17:56.068362748
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:18:1.019946893
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:1.023210712
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:1.024950086
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:18:1.027658201
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:18:1.033456507
+DEBUG (0): LQI Root is receiving packet from node 2 @0:18:1.036492989
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:18:1.040305773
+DEBUG (0): LQI Root is receiving packet from node 4 @0:18:1.045663467
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:1.048034278
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:18:1.055375934
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:18:1.058204228
+DEBUG (0): LQI Root is receiving packet from node 3 @0:18:1.064826504
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:18:1.066138752
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:1.075065092
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:6.006990714
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:18:6.010644751
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:6.012743126
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:18:6.016013923
+DEBUG (0): LQI Root is receiving packet from node 2 @0:18:6.016244694
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:18:6.024310882
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:18:6.027656311
+DEBUG (0): LQI Root is receiving packet from node 3 @0:18:6.036033337
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:6.039138455
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:18:6.042487767
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:18:6.046786947
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:6.053367220
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:18:6.056048978
+DEBUG (0): LQI Root is receiving packet from node 4 @0:18:6.063281601
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 60 that advertises 307.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 380 and my cost to 1132.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 277.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 307.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 307.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 402.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 380 and my cost to 1132.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 402.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 402.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 307.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 402.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 402.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 1621.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 380 and my cost to 1132.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1621.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 402.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 1621.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 277.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 1621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 307.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:11.007387440
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:11.009780717
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:11.016389955
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:18:11.022575164
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:18:11.033832310
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:18:11.036142038
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:18:11.043124859
+DEBUG (0): LQI Root is receiving packet from node 3 @0:18:11.045251482
+DEBUG (0): LQI Root is receiving packet from node 3 @0:18:11.048999458
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:18:11.058282412
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:18:11.062671253
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:18:11.068805251
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:18:11.071414488
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:18:11.083819812
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:18:11.089837404
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:18:11.089837404
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:18:11.089837404
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:18:11.089837404
+DEBUG (0): LQI Root is receiving packet from node 2 @0:18:11.089837404
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:18:11.094003029
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:18:11.102395314
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:18:11.102502125
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:18:11.108849744
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:18:11.118340655
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:16.009142191
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:18:16.009142191
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:18:16.009142191
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:18:16.011554608
+DEBUG (0): LQI Root is receiving packet from node 4 @0:18:16.011554608
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:18:16.011554608
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:18:16.011554608
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:18:16.011554608
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:18:16.014932445
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:18:16.015891853
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:18:16.016849377
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:18:16.016849377
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:18:16.016849377
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:18:16.020282585
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:18:16.020282585
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:18:16.020282585
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:18:16.020282585
+DEBUG (0): LQI Root is receiving packet from node 2 @0:18:16.025399914
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:18:16.025399914
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:18:16.025399914
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:18:16.026294513
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:18:16.029529357
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:18:16.032434174
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:18:16.032434174
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:18:16.032434174
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:18:16.032434174
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:18:16.032434174
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:18:16.034906084
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:18:16.034906084
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:18:16.034906084
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:18:16.037955933
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:18:16.037955933
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:18:16.037955933
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:18:16.037955933
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:18:16.039819385
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:18:16.041574136
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:18:16.041656141
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:18:16.043922085
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:18:16.044732687
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:16.047027203
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:18:16.047027203
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:18:16.047027203
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:18:16.047027203
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:18:16.047027203
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:18:16.049644097
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:18:16.050902913
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:18:16.050902913
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:16.052932320
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:18:16.052932320
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:18:16.052932320
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:18:16.052932320
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:18:16.054214051
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:18:16.055993607
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:18:16.057502328
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:18:16.057502328
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:18:16.057502328
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:16.058455970
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:18:16.058455970
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:18:16.058455970
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:18:16.060403371
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:18:16.062316421
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:18:16.062316421
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:16.062316421
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:18:16.062316421
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:18:16.062316421
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:18:16.067651254
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:18:16.067651254
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:18:16.067651254
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:16.067651254
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:18:16.067651254
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:18:16.069411716
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:21.006609247
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:18:21.006609247
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:18:21.009065779
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:21.009065779
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:18:21.009065779
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:18:21.009065779
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:21.009065779
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:18:21.013933304
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:21.013933304
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:18:21.014909861
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:21.016313662
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:18:21.016313662
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:18:21.016313662
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:18:21.017229184
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:18:21.017229184
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:18:21.020952306
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:18:21.020952306
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:18:21.020952306
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:21.020952306
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:18:21.020952306
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:18:21.024217668
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:18:21.024217668
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:18:21.024217668
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:18:21.024217668
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:21.024217668
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:21.024217668
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:18:21.030702616
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:21.030702616
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:18:21.030702616
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:18:21.030702616
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:18:21.030702616
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:18:21.037233339
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:21.037233339
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:18:21.037233339
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:21.037233339
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:18:21.037233339
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:18:21.037233339
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 1518.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 3545 and my cost to 1518.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1518.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:18:26.006128176
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:18:26.007585803
+DEBUG (0): LQI Root is receiving packet from node 3 @0:18:26.010063030
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:26.012008487
+DEBUG (0): LQI Root is receiving packet from node 4 @0:18:26.015109885
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:26.017885426
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:18:26.021425326
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:26.027727169
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 2598.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2598.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 2598.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 2598.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 2598.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 3327.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 3327.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 3327.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 3, my link to 5131 and my cost to 3327.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 3327.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 3327.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:18:31.006717600
+DEBUG (0): LQI Root is receiving packet from node 2 @0:18:31.024469133
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:31.027803463
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:31.032213227
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:18:31.034196976
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:31.037276894
+DEBUG (0): LQI Root is receiving packet from node 3 @0:18:31.039695425
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:18:31.044130390
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:31.050600079
+DEBUG (0): LQI Root is receiving packet from node 2 @0:18:36.005990847
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:36.008241809
+DEBUG (0): LQI Root is receiving packet from node 3 @0:18:36.016639529
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:36.019805683
+DEBUG (0): LQI Root is receiving packet from node 4 @0:18:36.023685275
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:36.033664465
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:18:36.036592592
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:18:36.043474266
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:36.066652231
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 64 that advertises 8458.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2598.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 8458.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 8458.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 8458.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:41.006303954
+DEBUG (0): LQI Root is receiving packet from node 2 @0:18:41.010003885
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:41.012023746
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:18:41.038438895
+DEBUG (0): LQI Root is receiving packet from node 3 @0:18:41.043876309
+DEBUG (0): LQI Root is receiving packet from node 4 @0:18:41.051135676
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:18:41.052400605
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:41.059405892
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:41.065463595
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2598.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1331.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 1331.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 2, my link to 2744 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 1331.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 165 and my cost to 1331.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 103 that advertises 2457.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2598.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2457.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 165 and my cost to 1331.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 2457.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 2457.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 2, my link to 2744 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 2457.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:46.008193812
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:18:46.014574288
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:18:46.016773084
+DEBUG (0): LQI Root is receiving packet from node 3 @0:18:46.020927224
+DEBUG (0): LQI Root is receiving packet from node 2 @0:18:46.025476207
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:46.030997966
+DEBUG (0): LQI Root is receiving packet from node 4 @0:18:46.036933600
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:46.044206565
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:18:46.051988502
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:46.069612301
+DEBUG (0): LQI Root is receiving packet from node 3 @0:18:51.007575862
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:18:51.009647271
+DEBUG (0): LQI Root is receiving packet from node 2 @0:18:51.010934666
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:51.017730499
+DEBUG (0): LQI Root is receiving packet from node 4 @0:18:51.025089075
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:18:51.026750731
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:51.034731031
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:51.035539624
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:18:51.040483442
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:51.045671400
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:18:56.008579162
+DEBUG (0): LQI Root is receiving packet from node 5 @0:18:56.015991008
+DEBUG (0): LQI Root is receiving packet from node 3 @0:18:56.018424797
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:18:56.020921789
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:18:56.023622697
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:18:56.025758797
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:56.028617609
+DEBUG (0): LQI Root is receiving packet from node 6 @0:18:56.033378323
+DEBUG (0): LQI Root is receiving packet from node 1 @0:18:56.039207147
+DEBUG (0): LQI Root is receiving packet from node 2 @0:18:56.044763204
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2598.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 165 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 1241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2598.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 1241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 1241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 165 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1241.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 1496.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 1496.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1496.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 1496.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 1496.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1496.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 2225.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 2225.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 165 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 64 that advertises 2225.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 2225.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 79 that advertises 2225.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:19:1.006717600
+DEBUG (0): LQI Root is receiving packet from node 5 @0:19:1.008437951
+DEBUG (0): LQI Root is receiving packet from node 3 @0:19:1.011482089
+DEBUG (0): LQI Root is receiving packet from node 2 @0:19:1.014123734
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:1.018785689
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:19:1.020998082
+DEBUG (0): LQI Root is receiving packet from node 4 @0:19:1.027198550
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:19:1.027940791
+DEBUG (0): LQI Root is receiving packet from node 6 @0:19:1.048005981
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:19:6.007327948
+DEBUG (0): LQI Root is receiving packet from node 3 @0:19:6.012534939
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:19:6.014787792
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:6.017839650
+DEBUG (0): LQI Root is receiving packet from node 5 @0:19:6.020385513
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:19:6.023164818
+DEBUG (0): LQI Root is receiving packet from node 4 @0:19:6.028281917
+DEBUG (0): LQI Root is receiving packet from node 2 @0:19:6.034204184
+DEBUG (0): LQI Root is receiving packet from node 6 @0:19:6.037757570
+DEBUG (0): LQI Root is receiving packet from node 2 @0:19:11.010049661
+DEBUG (0): LQI Root is receiving packet from node 5 @0:19:11.014129446
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:11.019167157
+DEBUG (0): LQI Root is receiving packet from node 3 @0:19:11.028022520
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:19:11.040363034
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:19:11.043458889
+DEBUG (0): LQI Root is receiving packet from node 4 @0:19:11.063129014
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:19:11.067247202
+DEBUG (0): LQI Root is receiving packet from node 6 @0:19:11.072374125
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 61 that advertises 343.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1496.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 343.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 343.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 343.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1496.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1331.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 110 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1728.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1496.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1728.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:19:16.007175361
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:19:16.010545873
+DEBUG (0): LQI Root is receiving packet from node 4 @0:19:16.019380778
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:19:16.021051184
+DEBUG (0): LQI Root is receiving packet from node 3 @0:19:16.022117403
+DEBUG (0): LQI Root is receiving packet from node 2 @0:19:16.038911914
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:19:16.042177158
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:16.046526006
+DEBUG (0): LQI Root is receiving packet from node 6 @0:19:16.054445271
+DEBUG (0): LQI Root is receiving packet from node 5 @0:19:16.058425452
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:21.011598841
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:19:21.021203771
+DEBUG (0): LQI Root is receiving packet from node 3 @0:19:21.024863969
+DEBUG (0): LQI Root is receiving packet from node 2 @0:19:21.028482171
+DEBUG (0): LQI Root is receiving packet from node 5 @0:19:21.033813169
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:19:21.036500922
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:19:21.051089900
+DEBUG (0): LQI Root is receiving packet from node 6 @0:19:21.064624367
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:19:21.067233605
+DEBUG (0): LQI Root is receiving packet from node 4 @0:19:21.074115278
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:19:26.006534496
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:26.009233743
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:19:26.011590790
+DEBUG (0): LQI Root is receiving packet from node 3 @0:19:26.014579605
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:19:26.018144706
+DEBUG (0): LQI Root is receiving packet from node 5 @0:19:26.020217667
+DEBUG (0): LQI Root is receiving packet from node 4 @0:19:26.034654737
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:19:26.035478589
+DEBUG (0): LQI Root is receiving packet from node 2 @0:19:26.043748922
+DEBUG (0): LQI Root is receiving packet from node 6 @0:19:26.048891104
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 385.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 385.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 385.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 385.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 385.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 1012.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1012.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 1012.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1012.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 1012.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 385.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1012.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 1012.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 1477.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1012.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 1477.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 59 that advertises 1477.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 1477.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 385.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 79 that advertises 1477.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:19:31.010581825
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:31.016603695
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:19:31.019183964
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:19:31.021425326
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:19:31.028764761
+DEBUG (0): LQI Root is receiving packet from node 4 @0:19:31.036533106
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:19:31.044341672
+DEBUG (0): LQI Root is receiving packet from node 6 @0:19:31.047626181
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:19:31.053536956
+DEBUG (0): LQI Root is receiving packet from node 3 @0:19:31.057275338
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:19:31.059569855
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:19:31.062844763
+DEBUG (0): LQI Root is receiving packet from node 5 @0:19:31.067351792
+DEBUG (0): LQI Root is receiving packet from node 2 @0:19:31.074477605
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:19:36.010423803
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:36.018755172
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:19:36.023048183
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:19:36.028253291
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:19:36.030154964
+DEBUG (0): LQI Root is receiving packet from node 2 @0:19:36.034433064
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:19:36.036996526
+DEBUG (0): LQI Root is receiving packet from node 4 @0:19:36.041925086
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:19:36.045337370
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:19:36.048888765
+DEBUG (0): LQI Root is receiving packet from node 3 @0:19:36.054101528
+DEBUG (0): LQI Root is receiving packet from node 6 @0:19:36.059136899
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:19:36.065017211
+DEBUG (0): LQI Root is receiving packet from node 5 @0:19:36.071670004
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:19:41.008926229
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:19:41.013574421
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:19:41.017122373
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:41.019136639
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:19:41.019870600
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:19:41.022056368
+DEBUG (0): LQI Root is receiving packet from node 2 @0:19:41.027239009
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:19:41.028186591
+DEBUG (0): LQI Root is receiving packet from node 5 @0:19:41.033113608
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:19:41.037387587
+DEBUG (0): LQI Root is receiving packet from node 4 @0:19:41.039812178
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:19:41.040305773
+DEBUG (0): LQI Root is receiving packet from node 6 @0:19:41.046785404
+DEBUG (0): LQI Root is receiving packet from node 3 @0:19:41.055528639
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 63 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1012.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 125.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 82 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 385.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 125.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 510.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1012.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 510.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1012.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 510.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 510.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 510.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 510.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:46.007723132
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:19:46.008798448
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:19:46.010881564
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:19:46.013122372
+DEBUG (0): LQI Root is receiving packet from node 2 @0:19:46.016855042
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:19:46.021293433
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:19:46.027976743
+DEBUG (0): LQI Root is receiving packet from node 3 @0:19:46.036674202
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:19:46.042377182
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:19:46.048419628
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:19:46.053760173
+DEBUG (0): LQI Root is receiving packet from node 4 @0:19:46.058383559
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:19:46.064944800
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:19:46.073535448
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:19:46.074405194
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:19:46.077167018
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:19:46.085254129
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:19:46.091052435
+DEBUG (0): LQI Root is receiving packet from node 6 @0:19:46.094241504
+DEBUG (0): LQI Root is receiving packet from node 5 @0:19:46.103213619
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1076.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1012.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1076.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 510.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 1076.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 385.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 1076.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:51.008150375
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:19:51.012603576
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:19:51.016565126
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:19:51.022346283
+DEBUG (0): LQI Root is receiving packet from node 2 @0:19:51.025888192
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:19:51.027152774
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:19:51.029132631
+DEBUG (0): LQI Root is receiving packet from node 3 @0:19:51.033637721
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:19:51.035815941
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:19:51.037431702
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:19:51.038654060
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:19:51.044192968
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:19:51.047641434
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:19:51.051942726
+DEBUG (0): LQI Root is receiving packet from node 4 @0:19:51.054355262
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:19:51.060062016
+DEBUG (0): LQI Root is receiving packet from node 5 @0:19:51.065021093
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:19:51.071519638
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:19:51.079194764
+DEBUG (0): LQI Root is receiving packet from node 6 @0:19:51.086427388
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:19:56.007713190
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:19:56.011507171
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:19:56.012185879
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:19:56.017246103
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:19:56.017745758
+DEBUG (0): LQI Root is receiving packet from node 2 @0:19:56.037736995
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:19:56.040607173
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:19:56.044559176
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:56.051668188
+DEBUG (0): LQI Root is receiving packet from node 1 @0:19:56.055017050
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:19:56.056918723
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:19:56.060565553
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:19:56.063699251
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:19:56.067111535
+DEBUG (0): LQI Root is receiving packet from node 6 @0:19:56.069146607
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:19:56.069955318
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:19:56.077783031
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:19:56.083947546
+DEBUG (0): LQI Root is receiving packet from node 5 @0:19:56.083947546
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:19:56.086907733
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:19:56.095315277
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:19:56.095315277
+DEBUG (0): LQI Root is receiving packet from node 4 @0:19:56.095315277
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:19:56.095315277
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:19:56.095315277
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:19:56.108453018
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:19:56.115624607
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:19:56.124062668
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1012.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 510.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1012.
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:1.006473461
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:1.009050520
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:1.016374815
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:20:1.018495656
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:1.021157995
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:1.027946226
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:1.035209367
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:20:1.039458888
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:1.045463214
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:20:1.047561258
+DEBUG (0): LQI Root is receiving packet from node 5 @0:20:1.054244568
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 1000.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1012.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 1000.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1012.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 1000.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 510.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 1000.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1000.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 574.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 5, my link to 669 and my cost to 574.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 574.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 5, my link to 106 and my cost to 574.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 574.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 574.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 574.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 1243.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 106 and my cost to 574.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 1243.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 510.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 90 that advertises 1243.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 77 that advertises 1243.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:6.008081289
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:20:6.013664083
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:6.015779607
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:20:6.018493434
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:6.021015002
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:6.023597497
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:6.025089075
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:6.027223750
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:20:6.029681944
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:6.032642132
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:20:6.054080605
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:6.067142052
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:20:6.072513115
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:20:6.082309200
+DEBUG (0): LQI Root is receiving packet from node 5 @0:20:6.088717854
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:11.006792351
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:11.008920518
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:20:11.009864667
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:20:11.014526172
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:11.018634645
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:11.031221411
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:20:11.049197821
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:11.054420071
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:20:11.062884875
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:20:11.063998760
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:20:11.070834658
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:20:11.078402973
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:20:11.088015954
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:20:11.088015954
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:11.088015954
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:11.088015954
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:20:11.088015954
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:11.093936330
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:11.103076291
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:16.005815794
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:16.007760856
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:20:16.007760856
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:20:16.007760856
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:20:16.007760856
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:20:16.012119180
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:20:16.012119180
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:16.016778748
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:20:16.016778748
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:20:16.022393950
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:20:16.022393950
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:20:16.022393950
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:16.023959931
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:20:16.024459586
+DEBUG (0): LQI Root is receiving packet from node 5 @0:20:16.031524364
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:16.039216970
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:20:16.044908465
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:20:16.044908465
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:20:16.045427261
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:16.048524777
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:20:16.053863101
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:20:16.054399377
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:20:16.060119168
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:20:16.065139280
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:20:16.065139280
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:16.065139280
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:20:16.065139280
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:16.065139280
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:16.068969214
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:20:16.070281462
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:20:16.074004585
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:20:16.074004585
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:16.074004585
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:20:16.074004585
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:16.074004585
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:20:16.074004585
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:16.078505901
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:20:16.078505901
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:16.078505901
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:20:16.078505901
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:16.078505901
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:20:16.079329871
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:20:16.086104734
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:20:16.086104734
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:16.086104734
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:16.086104734
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:16.086104734
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:21.007316464
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:20:21.007316464
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:20:21.007316464
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:20:21.007316464
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:20:21.007316464
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:20:21.008401722
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:21.009889867
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:20:21.009889867
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:20:21.009889867
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:20:21.012613123
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:21.012613123
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:20:21.012613123
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:20:21.012613123
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:20:21.012613123
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:20:21.015369283
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:21.015369283
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:20:21.015369283
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:20:21.015369283
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:20:21.015369283
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:20:21.016405332
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:21.018968794
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:20:21.018968794
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:21.023853121
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:20:21.023853121
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:20:21.023853121
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:20:21.023853121
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:20:21.026567626
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:20:21.026567626
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:20:21.026567626
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:21.026567626
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:20:21.026567626
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:20:21.030397442
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:20:21.030397442
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:20:21.030397442
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:21.030397442
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:20:21.030917899
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:20:21.034013872
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:20:21.034013872
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:21.034013872
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:20:21.034013872
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:21.036134713
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:20:21.036134713
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:20:21.036134713
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:20:21.036134713
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:20:21.036775578
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:20:21.041154825
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:20:21.041154825
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:20:21.041154825
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:21.041154825
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:20:21.041154825
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:20:21.041154825
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:20:21.048173827
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:20:21.048173827
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:21.048173827
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:20:21.048173827
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:20:21.048173827
+DEBUG (0): LQI Root is receiving packet from node 5 @0:20:26.006957857
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:20:26.006957857
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:20:26.006957857
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:20:26.006957857
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:20:26.006957857
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:26.009248883
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:20:26.009248883
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:20:26.009248883
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:26.011157882
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:20:26.011157882
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:26.011157882
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:20:26.012987383
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:20:26.012987383
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:20:26.015901677
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:20:26.015901677
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:20:26.015901677
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:26.015901677
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:20:26.017295653
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:26.019121381
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:20:26.019121381
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:20:26.019121381
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:20:26.019716470
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:20:26.021936189
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:20:26.021936189
+DEBUG (0): LQI Root is receiving packet from node 5 @0:20:26.021936189
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:20:26.021936189
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:20:26.022834562
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:26.022834562
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:26.024705947
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:26.026445557
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:20:26.026752274
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:26.028062979
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:20:26.029823046
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:20:26.029823046
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:20:26.029823046
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:26.030358991
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:26.030358991
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:20:26.032411708
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:20:26.032411708
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:20:26.032411708
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:20:26.032411708
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:20:26.034248069
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:26.034248069
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:20:26.037660701
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:26.037660701
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:20:26.037660701
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:26.039568039
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:26.039568039
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:20:26.039568039
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:20:26.040361491
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:20:26.040361491
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:20:26.042039948
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:26.042100983
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:31.007021231
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:20:31.007021231
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:20:31.007648381
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:20:31.012611233
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:20:31.012611233
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:20:31.012611233
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:31.012611233
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:20:31.012611233
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:20:31.012611233
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:31.016620497
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:31.016620497
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:20:31.016620497
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:31.016620497
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:20:31.017295653
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:31.019630235
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:20:31.019630235
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:20:31.024299397
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:31.024299397
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:20:31.024299397
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:31.024299397
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:20:31.024299397
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:20:31.024299397
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:31.027274843
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:20:31.027274843
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:31.027274843
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:20:31.027274843
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:20:31.027763122
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:31.031425210
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:20:31.031425210
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:31.031425210
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:31.031425210
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:20:31.039970082
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:20:31.039970082
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:31.039970082
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 68 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3720 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 1423.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3720 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 1423.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 1423.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 1423.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 1423.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 2278.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 2278.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 2278.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 2278.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 2278.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 2278.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 2743.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 2743.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 1423.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 2743.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 2743.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:36.009897074
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:36.012071861
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:36.014284254
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:36.018695680
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:36.023368616
+DEBUG (0): LQI Root is receiving packet from node 5 @0:20:36.033294373
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:36.049808169
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:20:36.050799985
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:36.058185196
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:41.010135549
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:41.012880572
+DEBUG (0): LQI Root is receiving packet from node 5 @0:20:41.015929973
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:41.023225853
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:41.026740789
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:20:41.029527696
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:41.032846159
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:41.041162151
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:41.047769168
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:46.011407686
+DEBUG (0): LQI Root is receiving packet from node 5 @0:20:46.016586097
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:20:46.022113629
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:46.024446549
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:46.027042189
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:46.030784344
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:20:46.034044271
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:46.036699403
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:46.042528108
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 67 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 2278.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 216.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 216.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 2278.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1331.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 2325.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 2278.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2325.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 2325.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 2325.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 216.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:51.005724242
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:51.008089222
+DEBUG (0): LQI Root is receiving packet from node 5 @0:20:51.010177443
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:51.016059699
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:20:51.020196697
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:51.025079481
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:20:51.027560985
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:51.033481360
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:20:51.037952159
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:51.045886683
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:20:56.006366650
+DEBUG (0): LQI Root is receiving packet from node 3 @0:20:56.012153472
+DEBUG (0): LQI Root is receiving packet from node 4 @0:20:56.014757392
+DEBUG (0): LQI Root is receiving packet from node 5 @0:20:56.017898345
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:20:56.022378691
+DEBUG (0): LQI Root is receiving packet from node 1 @0:20:56.025057015
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:20:56.031023048
+DEBUG (0): LQI Root is receiving packet from node 2 @0:20:56.037431821
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:20:56.045076311
+DEBUG (0): LQI Root is receiving packet from node 6 @0:20:56.052736178
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:1.006961740
+DEBUG (0): LQI Root is receiving packet from node 1 @0:21:1.010072971
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:1.015762127
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:1.018007377
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:1.018266893
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:21:1.023195335
+DEBUG (0): LQI Root is receiving packet from node 6 @0:21:1.028535880
+DEBUG (0): LQI Root is receiving packet from node 3 @0:21:1.038337401
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:21:1.038522396
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:1.042840608
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 72 that advertises 306.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 2278.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 306.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1155 and my cost to 306.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 306.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 306.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 306.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 306.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:21:6.007723132
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:21:6.010690527
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:6.015441694
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:21:6.022918457
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:21:6.026023630
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:6.029481920
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:21:6.031776160
+DEBUG (0): LQI Root is receiving packet from node 3 @0:21:6.036935491
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:21:6.042880719
+DEBUG (0): LQI Root is receiving packet from node 3 @0:21:6.046655283
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:6.053928018
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:6.057611029
+DEBUG (0): LQI Root is receiving packet from node 6 @0:21:6.065133568
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 1006.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1006.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 108 that advertises 1006.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1155 and my cost to 306.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 1006.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 306.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 1006.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 1006.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 216.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1861.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1155 and my cost to 306.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 1861.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 306.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 58 that advertises 1861.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 1861.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 216.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:21:11.008669171
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:21:11.012048551
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:11.014388844
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:11.017282285
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:11.022296733
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:11.026216558
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:11.031558764
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:21:11.035448071
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:21:11.038177157
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:21:11.039207147
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:21:11.043555876
+DEBUG (0): LQI Root is receiving packet from node 6 @0:21:11.051820656
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:11.060518115
+DEBUG (0): LQI Root is receiving packet from node 3 @0:21:11.069322385
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:16.006275098
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:21:16.013557272
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:16.018175341
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:16.026046491
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:16.028032343
+DEBUG (0): LQI Root is receiving packet from node 1 @0:21:16.031740325
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:21:16.035005569
+DEBUG (0): LQI Root is receiving packet from node 6 @0:21:16.052980318
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:21:16.059594660
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:16.075356897
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:21:16.083230387
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:21:16.089623782
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:21:16.097390460
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:21:16.097390460
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:16.097390460
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:16.097390460
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:21:16.097390460
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:21:16.097390460
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:16.100838926
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:21:16.103005662
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:21:16.104562049
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:16.114495463
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 69 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1155 and my cost to 306.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 306.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:21:21.006294131
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:21:21.008106142
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:21.014327809
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:21.017351253
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:21:21.018457205
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:21:21.018457205
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:21.022540872
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:21:21.025064222
+DEBUG (0): LQI Root is receiving packet from node 3 @0:21:21.025064222
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:21:21.025064222
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:21:21.025064222
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:21:21.027993893
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:21:21.027993893
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:21.027993893
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:21:21.027993893
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:21:21.027993893
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:21:21.030877787
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:21.034051597
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:21.034051597
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:21:21.034051597
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:21:21.034051597
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:21:21.037164371
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:21.037164371
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:21.038079893
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:21:21.041787757
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:21:21.043405180
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:21:21.043862941
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:21:21.047875979
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:21:21.052133156
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:21.052133156
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:21.052133156
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:21:21.052133156
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:21.052133156
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:21.054757652
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:21.060052421
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:21:21.066018573
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:21:21.070138422
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:21.075738365
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:21.080087094
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1006.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1155 and my cost to 306.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 1461.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1006.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1461.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 125 and my cost to 1461.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 1461.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 4, my link to 669 and my cost to 1461.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 1461.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 4, my link to 3045 and my cost to 1461.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1461.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:21:26.009386330
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:21:26.009881816
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:26.012496765
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:21:26.015708749
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:21:26.019592061
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:26.019592061
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:26.022005157
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:21:26.024169671
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:21:26.028350555
+DEBUG (0): LQI Root is receiving packet from node 1 @0:21:26.028350555
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:21:26.028350555
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:21:26.028350555
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:21:26.034743950
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:21:26.040267599
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:21:26.042941754
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:26.046172716
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:21:26.048526438
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:21:26.049026093
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:21:26.053268012
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:26.053268012
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:26.053268012
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:26.053268012
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:21:26.053268012
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:21:26.056970164
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:21:26.060119168
+DEBUG (0): LQI Root is receiving packet from node 6 @0:21:26.060119168
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:21:26.060119168
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:26.060500635
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:21:26.063231943
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:21:26.069777925
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:21:26.072036213
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:21:26.074008467
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:21:26.074593962
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:26.086638789
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:21:26.089435013
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:21:26.093844777
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:21:26.093844777
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:21:26.093844777
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:21:26.093844777
+DEBUG (0): LQI Root is receiving packet from node 3 @0:21:26.093844777
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:21:26.093844777
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:21:26.098742820
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:21:26.099276875
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:21:26.103717156
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:26.103717156
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:26.103717156
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:21:26.103717156
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:21:26.103717156
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:21:26.107806488
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:21:26.111346506
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:21:26.111346506
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:21:26.111346506
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:26.111346506
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:26.111346506
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:26.111346506
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:21:26.115252734
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:21:26.115252734
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:21:26.115252734
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:21:26.115252734
+DEBUG (0): LQI Root is receiving packet from node 3 @0:21:26.115252734
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:31.006524902
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:21:31.006524902
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:21:31.006524902
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:21:31.007097407
+DEBUG (0): LQI Root is receiving packet from node 1 @0:21:31.009004862
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:21:31.009004862
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:21:31.009004862
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:21:31.009004862
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:31.015197555
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:21:31.015197555
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:21:31.015367622
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:21:31.018007495
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:21:31.018007495
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:31.018007495
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:21:31.018007495
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:21:31.018007495
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:21:31.018007495
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:21:31.022475955
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:21:31.022475955
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:31.023607438
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:21:31.023607438
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:21:31.023607438
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:21:31.025835090
+DEBUG (0): LQI Root is receiving packet from node 1 @0:21:31.025835090
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:21:31.025835090
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:21:31.027528924
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:31.027528924
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:21:31.031419775
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:21:31.031419775
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:21:31.035524365
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:21:31.035524365
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:31.035524365
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:21:31.035524365
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:21:31.035524365
+DEBUG (0): LQI Root is receiving packet from node 6 @0:21:36.007600944
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:21:36.007600944
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:21:36.007600944
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:21:36.008167177
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:36.009546124
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:21:36.009546124
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:21:36.009546124
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:21:36.009546124
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:21:36.012191591
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:36.012191591
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:21:36.012191591
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:21:36.012191591
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:21:36.015186179
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:36.015186179
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:21:36.015186179
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:21:36.015186179
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:21:36.016570838
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:21:36.018371365
+DEBUG (0): LQI Root is receiving packet from node 6 @0:21:36.018371365
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:21:36.018371365
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:21:36.019876264
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:21:36.019876264
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:21:36.020744120
+DEBUG (0): LQI Root is receiving packet from node 6 @0:21:36.020744120
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:36.020744120
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:21:36.024062860
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:36.024062860
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:36.024600797
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:21:36.026084665
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:21:36.026084665
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:36.026519511
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:36.026519511
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:21:36.030160628
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:21:36.030160628
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:36.030160628
+DEBUG (0): LQI Root is receiving packet from node 6 @0:21:36.031417553
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:21:36.033034975
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:36.033034975
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:21:36.033034975
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:21:36.033034975
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:36.034692462
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:36.034692462
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:21:36.038171446
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:21:36.038171446
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:21:36.038171446
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:21:36.039758350
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:36.042703279
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:36.042703279
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:21:36.042703279
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:21:36.042703279
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:36.044213891
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:21:36.046121228
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:36.046121228
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:36.046121228
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:36.046121228
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:21:36.046121228
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:21:36.047753909
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:36.049279779
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:21:36.049279779
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:36.049279779
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:21:36.049279779
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:21:36.049279779
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 68 that advertises 1000.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 1000.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 1000.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 1000.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 1000.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 1000.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 2, my link to 90 and my cost to 1000.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1000.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 1465.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1465.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 1465.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 1465.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 1465.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1465.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 2, my link to 90 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 1465.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 2194.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 1465.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 2194.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 1000.
+DEBUG (0): LQI Root is receiving packet from node 3 @0:21:41.010886999
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:21:41.018844384
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:41.027118482
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:21:41.031984465
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:41.044772798
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:41.048364257
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:41.052614109
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:41.059625178
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:21:41.060273976
+DEBUG (0): LQI Root is receiving packet from node 1 @0:21:41.075478967
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:41.084420565
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:21:46.006990714
+DEBUG (0): LQI Root is receiving packet from node 3 @0:21:46.009437423
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:46.011529755
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:21:46.026946754
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:46.034442658
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:46.037248598
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:46.045505216
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:46.049813834
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:21:46.053928018
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:46.057366890
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:46.066476334
+DEBUG (0): LQI Root is receiving packet from node 6 @0:21:46.074258271
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:51.006997921
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:21:51.010576509
+DEBUG (0): LQI Root is receiving packet from node 3 @0:21:51.012611233
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:51.022234037
+DEBUG (0): LQI Root is receiving packet from node 1 @0:21:51.025118050
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:51.043491067
+DEBUG (0): LQI Root is receiving packet from node 4 @0:21:51.049457219
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:21:51.054355262
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:21:51.059707183
+DEBUG (0): LQI Root is receiving packet from node 6 @0:21:51.063540999
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:51.068526712
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:51.077804001
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 1090.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 1465.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 1090.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 1000.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 1090.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 1090.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1465.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 1465.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 1000.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 2, my link to 90 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1331.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 1555.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1465.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1555.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 1000.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 93 that advertises 1555.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 1555.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 2, my link to 90 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 1555.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:21:56.009826493
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:21:56.013582354
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:21:56.019533365
+DEBUG (0): LQI Root is receiving packet from node 3 @0:21:56.022025850
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:21:56.027560985
+DEBUG (0): LQI Root is receiving packet from node 2 @0:21:56.039743092
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:21:56.057178121
+DEBUG (0): LQI Root is receiving packet from node 1 @0:21:56.064294340
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:21:56.065585665
+DEBUG (0): LQI Root is receiving packet from node 6 @0:21:56.070870840
+DEBUG (0): LQI Root is receiving packet from node 5 @0:21:56.078957951
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:1.008020254
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:1.008670714
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:22:1.011003752
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:1.018852041
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:1.024477066
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:1.026996413
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:22:1.033937460
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:22:1.039764062
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:1.060367190
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:22:1.061278829
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:1.071521299
+DEBUG (0): LQI Root is receiving packet from node 5 @0:22:1.077105984
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:22:6.015825501
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:6.020664052
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:6.022956631
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:22:6.027084082
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:6.030770976
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:22:6.033858945
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:6.035951608
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:6.039621022
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:22:6.041261636
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:6.047372442
+DEBUG (0): LQI Root is receiving packet from node 5 @0:22:6.056817577
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 68 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1465.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 1465.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 1000.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 68 that advertises 1241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1465.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 1241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 1465.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 1241.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 1241.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1241.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 1910.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1910.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 1910.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 1910.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 1910.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 90 that advertises 1910.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 1910.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 107 that advertises 2700.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 1910.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 2700.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 1241.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 2700.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 65 that advertises 2700.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 2700.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:11.005695268
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:22:11.006805270
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:22:11.012878233
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:11.018075738
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:11.020418370
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:11.023836201
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:11.027061221
+DEBUG (0): LQI Root is receiving packet from node 5 @0:22:11.032418916
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:22:11.033510216
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:11.042062414
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:11.058358706
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:11.066735732
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:16.006891111
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:16.009021664
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:16.012758384
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:16.015779725
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:22:16.029830648
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:16.042106300
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:16.045810390
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:16.048814693
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:16.053088790
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:16.055360675
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:16.063981840
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:22:16.072618265
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:22:16.080888480
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:22:16.080888480
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:22:16.080888480
+DEBUG (0): LQI Root is receiving packet from node 5 @0:22:16.086991960
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:22:16.097291582
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:22:21.006936887
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:22:21.006936887
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:21.008674488
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:21.010088112
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:21.017432982
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:22:21.017432982
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:22:21.017432982
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:22:21.019701093
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:21.019701093
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:22:21.019701093
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:22:21.020372476
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:22:21.022582766
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:21.024965463
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:21.029985457
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:22:21.029985457
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:22:21.029985457
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:22:21.029985457
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:22:21.031282564
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:21.036224044
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:22:21.042558626
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:22:21.045015276
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:22:21.047484964
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:22:21.049934013
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:22:21.051958103
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:22:21.056335010
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:21.061235393
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:22:21.064315310
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:21.070329578
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:21.078940801
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:21.081743085
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:22:21.083777809
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:21.085710347
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:22:21.092093801
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:22:21.092093801
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:22:21.092093801
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:21.092093801
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:22:21.092093801
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:22:21.092093801
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:22:26.007181026
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:22:26.007181026
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:22:26.007181026
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:22:26.007181026
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:26.007892520
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:22:26.010179782
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:26.010179782
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:22:26.010179782
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:22:26.013492463
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:26.013492463
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:22:26.013492463
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:22:26.013492463
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:22:26.015184518
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:22:26.015426436
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:26.015426436
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:22:26.016893610
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:26.019656978
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:22:26.019656978
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:22:26.019656978
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:22:26.019656978
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:22:26.022325708
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:26.022325708
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:22:26.022325708
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:22:26.022325708
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:22:26.025108108
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:26.025108108
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:22:26.025108108
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:22:26.025108108
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:22:26.025108108
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:22:26.026019856
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:22:26.027911935
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:26.027911935
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:22:26.027911935
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:22:26.027911935
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:22:26.031955490
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:26.031955490
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:22:26.031955490
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:22:26.032462801
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:26.032462801
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:22:26.034751606
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:26.034751606
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:26.034751606
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:22:26.034751606
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:22:26.036380513
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:26.037859064
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:22:26.037859064
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:22:26.037859064
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:22:26.037859064
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:22:26.037859064
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:22:26.044791831
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:22:26.044791831
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:22:26.044791831
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:26.044791831
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:22:26.044791831
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:26.044791831
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 111 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:22:31.005405352
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:22:31.005405352
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:31.005405352
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:31.005405352
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:22:31.005405352
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:22:31.005405352
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:22:31.008125175
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:22:31.008125175
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:31.008125175
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:22:31.008125175
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:22:31.008125175
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:31.010698460
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:31.010698460
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:22:31.010698460
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:31.014818309
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:31.014818309
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:22:31.014818309
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:22:31.014818309
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:31.017829708
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:22:31.017829708
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:22:31.017829708
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:22:31.017829708
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:22:31.017829708
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:22:31.019113329
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:31.020815096
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:31.020815096
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:22:31.020815096
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:22:31.021346811
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:22:31.023429651
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:31.023429651
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:22:31.023429651
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:22:31.024965344
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:31.025499517
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:22:31.027366395
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:22:31.027572361
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:22:31.027572361
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:22:31.029639942
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:22:31.029639942
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:31.029639942
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:22:31.029639942
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:22:31.031715125
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:31.031715125
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:31.031715125
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:22:31.031715125
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:22:31.033446960
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:31.035255143
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:22:31.035255143
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:22:31.035255143
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:22:31.037666018
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:22:31.037666018
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:31.037666018
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:22:31.037666018
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:22:31.043357513
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:31.043357513
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:31.043357513
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:22:31.043357513
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:22:31.043357513
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:22:36.006059933
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:22:36.006059933
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:36.006059933
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:22:36.008289247
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:22:36.008289247
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:22:36.008289247
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:22:36.009775005
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:22:36.010665721
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:22:36.010665721
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:22:36.011278291
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:36.013584015
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:36.013584015
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:22:36.013584015
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:22:36.013584015
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:22:36.013584015
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:36.017541683
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:22:36.017541683
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:22:36.017541683
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:22:36.017541683
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:22:36.018684195
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:36.020677650
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:36.020677650
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:22:36.020677650
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:22:36.020677650
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:22:36.026284918
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:22:36.026284918
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:22:36.026284918
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:22:36.026925784
+DEBUG (0): LQI Root is receiving packet from node 5 @0:22:36.026925784
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:22:36.028247626
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:22:36.028247626
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:22:36.030181599
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:36.030181599
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:22:36.030181599
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:36.030181599
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:22:36.030181599
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:36.032693572
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:22:36.032693572
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:22:36.032693572
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:22:36.032693572
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:36.033715905
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:36.035388698
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:22:36.035388698
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:22:36.035388698
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:22:36.036147750
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:22:36.040918012
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:22:36.040918012
+DEBUG (0): LQI Root is receiving packet from node 5 @0:22:36.040918012
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:22:36.040918012
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:22:36.042413364
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:22:36.042413364
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:22:36.044177709
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:22:36.044177709
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:36.044177709
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:22:36.044177709
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:36.047738650
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:22:36.047738650
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:36.047738650
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:22:36.048822018
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:22:36.056039383
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:22:36.056039383
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:22:36.056039383
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:36.057672064
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:41.006792351
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:41.008781299
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:41.011919156
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:22:41.011919156
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:41.011919156
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:22:41.011919156
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:41.015123483
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:41.018609792
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:22:41.021165928
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:22:41.021165928
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:41.021165928
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:22:41.021165928
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:22:41.025484140
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:22:41.025484140
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:41.025484140
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:41.025484140
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:41.042787506
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:22:41.046920392
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:22:41.046920392
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:22:41.046920392
+DEBUG (0): LQI Root is receiving packet from node 5 @0:22:41.046920392
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:22:41.046920392
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:22:41.046920392
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:41.051147052
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:22:41.051147052
+DEBUG (0): LQI Root is receiving packet from node 5 @0:22:41.053481633
+DEBUG (0): LQI Root is receiving packet from node 5 @0:22:41.062179092
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 1423.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1423.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 1423.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 1423.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1423.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 1423.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 1935.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1935.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 1935.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1935.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 1935.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 1935.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 1935.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 107 that advertises 2547.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1935.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 2547.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 1423.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 2547.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:46.008050772
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:46.008655455
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:46.011079927
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:46.014148587
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:46.019294543
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:22:46.027101562
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:46.028673327
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:22:46.033691100
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:46.035072039
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:46.041419658
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:22:46.046493149
+DEBUG (0): LQI Root is receiving packet from node 5 @0:22:46.053100166
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:51.008180893
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:51.013864336
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:22:51.020736463
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:51.024692349
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:51.030021409
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:51.030412700
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:51.035480250
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:51.044330296
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:22:51.049731876
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:22:51.058841320
+DEBUG (0): LQI Root is receiving packet from node 5 @0:22:51.062747547
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:51.071475523
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:22:56.011934415
+DEBUG (0): LQI Root is receiving packet from node 2 @0:22:56.015512276
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:22:56.016177994
+DEBUG (0): LQI Root is receiving packet from node 1 @0:22:56.017931202
+DEBUG (0): LQI Root is receiving packet from node 4 @0:22:56.020358878
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:22:56.022235698
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:22:56.024825795
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:22:56.039657251
+DEBUG (0): LQI Root is receiving packet from node 6 @0:22:56.045962977
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:22:56.048209780
+DEBUG (0): LQI Root is receiving packet from node 5 @0:22:56.053729655
+DEBUG (0): LQI Root is receiving packet from node 3 @0:22:56.061877801
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 60 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1935.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1935.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 216.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 1548.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1935.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 1548.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1935.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1548.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 77 that advertises 1548.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 1548.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 1423.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 2011.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1935.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2011.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 1423.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 2011.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 2011.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:1.008224329
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:23:1.013063558
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:1.019828598
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:1.022449320
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:23:1.027215699
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:1.029041079
+DEBUG (0): LQI Root is receiving packet from node 1 @0:23:1.030946873
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:23:1.034412141
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:1.037133854
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:1.040712441
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:23:1.041375773
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:1.050172835
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:1.059297538
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:23:6.014299513
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:23:6.017419614
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:6.017997554
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:6.021716903
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:6.026221993
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:6.029115829
+DEBUG (0): LQI Root is receiving packet from node 1 @0:23:6.033022056
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:6.040773476
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:23:6.043628396
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:6.046081164
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:23:6.048286073
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:6.051070759
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:6.067847727
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:23:6.068931094
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:6.075080350
+DEBUG (0): LQI Root is receiving packet from node 6 @0:23:6.078238901
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:6.084662814
+DEBUG (0): LQI Root is receiving packet from node 1 @0:23:11.007036490
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:23:11.009065779
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:23:11.011133029
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:11.014911522
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:11.016402992
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:11.017173584
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:11.019799971
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:23:11.022479838
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:23:11.025302697
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:11.030215998
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:11.033862828
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:11.039722169
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:11.041690541
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:11.049518254
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:11.060947020
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1935.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 1423.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 88 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 243.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1935.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 243.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 243.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 243.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 3, my link to 465 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 243.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 243.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 708.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 855 and my cost to 708.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 708.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 42 and my cost to 708.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 708.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 708.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 708.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 1563.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 42 and my cost to 708.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 1563.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 465 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 1563.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 64 that advertises 1563.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 1563.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 243.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:23:16.007234853
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:16.009940960
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:16.020538100
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:23:16.027520873
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:23:16.037843687
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:16.048364257
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:16.050775132
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:16.055408112
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:16.066903578
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:23:16.068423783
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:16.074389935
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:16.081668335
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:23:16.093112360
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:23:16.097476348
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:23:16.097476348
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:23:16.097476348
+DEBUG (0): LQI Root is receiving packet from node 6 @0:23:16.097476348
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:23:16.097476348
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:23:16.097476348
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:23:16.101870854
+DEBUG (0): LQI Root is receiving packet from node 6 @0:23:16.109256064
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:23:16.112307804
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:23:16.119052150
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:23:21.007440424
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:21.010929002
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:23:21.010929002
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:23:21.010929002
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:23:21.010929002
+DEBUG (0): LQI Root is receiving packet from node 1 @0:23:21.015581362
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:23:21.018587208
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:23:21.019626461
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:21.023332782
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:23:21.027895015
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:23:21.028657950
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:21.028657950
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:23:21.028657950
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:23:21.037681277
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:23:21.043166752
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:23:21.047080636
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:23:21.047080636
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:21.047080636
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:23:21.047080636
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:21.050605396
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:21.050605396
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:21.050605396
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:21.050605396
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:21.060134427
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:21.063331151
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:21.063331151
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:21.063331151
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:21.066863513
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:21.068427557
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:21.071570849
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:21.071570849
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:23:21.071570849
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:21.073455272
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:21.077598036
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:21.079566408
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:21.079566408
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:21.079566408
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:21.079566408
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:23:21.081725487
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:21.081725487
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:21.081725487
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:21.081725487
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:21.081725487
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:21.081725487
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:21.087020256
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:21.087020256
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:21.087020256
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:21.087020256
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:23:21.087874743
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:21.090972259
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:21.090972259
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:21.090972259
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:21.090972259
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:21.094039258
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:21.094039258
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:21.094039258
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:21.094039258
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:21.094039258
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:21.094039258
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:26.007175361
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:26.007175361
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:23:26.007175361
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:23:26.007175361
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:26.007987846
+DEBUG (0): LQI Root is receiving packet from node 6 @0:23:26.009218366
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:23:26.009218366
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:26.009765458
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:23:26.011955108
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:26.011955108
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:26.011955108
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:26.011955108
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:26.011955108
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:26.011955108
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:26.018218778
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:26.018218778
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:23:26.020937166
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:23:26.020937166
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:26.020937166
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:26.020937166
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:23:26.020937166
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:23:26.020937166
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:26.024902088
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:26.024902088
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:26.024902088
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:26.024902088
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:26.026473734
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:26.028518400
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:26.028518400
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:26.028518400
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:23:26.028518400
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:26.028518400
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:26.031374117
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:26.031374117
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:26.031374117
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:26.031374117
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:23:26.033372888
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:26.033372888
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:23:26.033372888
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:26.033372888
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:23:26.033372888
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:23:26.035567920
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:26.035567920
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:23:26.035567920
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:26.035567920
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:26.037597327
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:26.037597327
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:26.037597327
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:26.037597327
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:23:26.038164238
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:26.038164238
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:23:26.040239303
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:26.040239303
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:26.040239303
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:26.040239303
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:26.040239303
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:26.042449593
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:26.042449593
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:26.042449593
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:26.042449593
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:26.042449593
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:23:26.042449593
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:26.046358160
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:26.046358160
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:26.046358160
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:26.046358160
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:26.046358160
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:26.046358160
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:26.054307943
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:26.054307943
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:26.054307943
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:26.054307943
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:26.054307943
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 74 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:31.007003633
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:31.007003633
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:31.007003633
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:31.007003633
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:31.007003633
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:23:31.007555286
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:31.009437423
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:31.009437423
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:31.009437423
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:23:31.009477764
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:31.012332802
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:31.012332802
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:23:31.012332802
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:23:31.012332802
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:23:31.012332802
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:31.014671157
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:23:31.014671157
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:31.014671157
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:31.014671157
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:23:31.017168149
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:31.017168149
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:31.017168149
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:31.017168149
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:31.019885859
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:31.019885859
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:31.019885859
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:31.019885859
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:23:31.020494664
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:23:31.022356107
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:23:31.022356107
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:31.022356107
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:31.022356107
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:31.026292851
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:31.026292851
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:31.026292851
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:23:31.028247626
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:31.028247626
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:31.028247626
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:31.033481360
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:23:31.033481360
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:31.033481360
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:31.033481360
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:31.035480250
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:31.035480250
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:31.036287418
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:31.037448622
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:31.037448622
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:31.037448622
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:31.037448622
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:31.045335827
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:31.045335827
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:31.045335827
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:31.045335827
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:31.045335827
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:31.046466514
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:36.007209653
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:36.007209653
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:36.007209653
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:23:36.008020254
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:23:36.009340436
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:23:36.009340436
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:23:36.010089773
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:23:36.010089773
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:36.011413398
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:36.011413398
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:36.011413398
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:36.011413398
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:23:36.013574421
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:36.013574421
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:23:36.013574421
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:23:36.013574421
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:23:36.015794866
+DEBUG (0): LQI Root is receiving packet from node 6 @0:23:36.015794866
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:23:36.015794866
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:23:36.016483168
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:36.018218778
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:36.018218778
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:36.018218778
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:23:36.020723426
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:36.020723426
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:36.020723426
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:36.021005408
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:36.024291740
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:36.024444327
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:36.026735354
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:36.026735354
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:36.026735354
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:36.026735354
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:36.027681393
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:36.027681393
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:36.032243744
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:36.032243744
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:36.032243744
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:36.032243744
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:36.035081863
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:36.035081863
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:36.035081863
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:23:36.035081863
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:36.035081863
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:36.042604402
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:36.042604402
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:36.042604402
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:36.042604402
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:36.042604402
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:23:36.043397854
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:36.051301861
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:36.051301861
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:36.051301861
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:36.051301861
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:36.051301861
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:36.051301861
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:23:41.006646971
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:23:41.006646971
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:41.006646971
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:23:41.006646971
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:41.009513716
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:41.009513716
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:41.010177443
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:41.011463056
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:23:41.011463056
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:41.011463056
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:23:41.011463056
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:41.015083142
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:23:41.015083142
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:41.015083142
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:23:41.016847834
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:23:41.018256952
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:41.018256952
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:23:41.018256952
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:23:41.019660752
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:41.019660752
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:41.021364409
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:23:41.021364409
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:23:41.023002407
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:23:41.023002407
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:41.025924421
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:41.025924421
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:23:41.025924421
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:23:41.026832341
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:23:41.026832341
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:41.028144589
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:41.028144589
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:41.028144589
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:23:41.031669349
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:23:41.031669349
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:23:41.031669349
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:41.031669349
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:23:41.032714543
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:23:41.036536874
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:41.036536874
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:41.036536874
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:23:41.036536874
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:23:41.036536874
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:41.037528690
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:41.041473037
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:41.041473037
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:41.041473037
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:41.041473037
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:23:41.041473037
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:41.042472508
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:41.044852866
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:23:41.044852866
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:41.044852866
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:41.044852866
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:41.044852866
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:41.044852866
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:41.049270232
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:41.049270232
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:41.049270232
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:41.049270232
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:41.050803759
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:23:41.053313788
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:23:41.053313788
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:23:41.053313788
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:23:41.053313788
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:23:41.053313788
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:41.061538227
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:41.061538227
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:41.061538227
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:23:41.061538227
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:41.061538227
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:23:41.069396458
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:41.069396458
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:23:41.069396458
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:41.069396458
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:23:41.071151208
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:23:41.071151208
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 790.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 790.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 790.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 790.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:46.012653235
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:46.016197027
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:46.024667496
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:46.031335548
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:46.038827570
+DEBUG (0): LQI Root is receiving packet from node 1 @0:23:46.040956580
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:46.046676253
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 1351.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1351.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 1351.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 1351.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 1351.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 1351.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 2080.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 2080.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 2080.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 2080.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:23:51.010057713
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:51.016269547
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:51.018188260
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:51.021096960
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:51.026834231
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:23:51.030931496
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:51.033149443
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:23:51.036363593
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:51.043098115
+DEBUG (0): LQI Root is receiving packet from node 6 @0:23:51.051307296
+DEBUG (0): LQI Root is receiving packet from node 1 @0:23:56.008669171
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:23:56.014665722
+DEBUG (0): LQI Root is receiving packet from node 5 @0:23:56.017303256
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:23:56.019325061
+DEBUG (0): LQI Root is receiving packet from node 2 @0:23:56.023874044
+DEBUG (0): LQI Root is receiving packet from node 3 @0:23:56.030587872
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:23:56.034717315
+DEBUG (0): LQI Root is receiving packet from node 4 @0:23:56.038913457
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:23:56.045627285
+DEBUG (0): LQI Root is receiving packet from node 6 @0:23:56.055286043
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 66 that advertises 343.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1351.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 343.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 343.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 343.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 343.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:1.009464166
+DEBUG (0): LQI Root is receiving packet from node 1 @0:24:1.012651692
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:24:1.013604939
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:1.015098401
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:1.018999193
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:1.022216557
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:1.025590951
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:1.029580797
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:24:1.035241775
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:1.037957824
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:1.048333740
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:24:1.061456222
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:1.064538479
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:1.069421263
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 915.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1351.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 915.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 915.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 915.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 1728.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1351.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1728.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 343.
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:6.007110444
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:6.012702785
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:24:6.018396170
+DEBUG (0): LQI Root is receiving packet from node 1 @0:24:6.021211822
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:24:6.025506725
+DEBUG (0): LQI Root is receiving packet from node 2 @0:24:6.028719103
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:6.035127757
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:6.037158707
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:6.042041491
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:6.044847431
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:6.049167304
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:6.054948690
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:24:6.059633111
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:6.065522969
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:11.010063030
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:11.012422693
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:24:11.013528645
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:11.015262472
+DEBUG (0): LQI Root is receiving packet from node 1 @0:24:11.021425444
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:11.027404515
+DEBUG (0): LQI Root is receiving packet from node 2 @0:24:11.029787212
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:24:11.041543618
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:11.045556656
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:11.047448735
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:11.053445404
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:11.061908318
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:24:11.069949653
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:11.075107094
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:16.012498987
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:16.020622050
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:16.027175635
+DEBUG (0): LQI Root is receiving packet from node 1 @0:24:16.029146346
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:24:16.030664165
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:16.033435584
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:24:16.036187815
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:16.037189224
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:16.039056450
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:24:16.040094042
+DEBUG (0): LQI Root is receiving packet from node 2 @0:24:16.052133156
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:16.062249674
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:16.066689956
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:16.071969466
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1351.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 790.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 433.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1351.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 433.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 433.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 3, my link to 790 and my cost to 433.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 433.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 433.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 433.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 1223.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 465 and my cost to 1223.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 1223.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 64 and my cost to 1223.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 1223.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 433.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1223.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 1223.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 343.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 1688.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 64 and my cost to 1223.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 1688.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 790 and my cost to 433.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 1688.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 59 that advertises 1688.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:21.009696821
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:21.014419361
+DEBUG (0): LQI Root is receiving packet from node 1 @0:24:21.016893610
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:24:21.023706198
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:21.028140815
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:21.031213478
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:21.033540734
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:24:21.057138010
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:21.058963389
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:21.077395899
+DEBUG (0): LQI Root is receiving packet from node 2 @0:24:21.080254940
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:21.085381863
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:21.093499492
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:24:21.100701598
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:21.106866113
+DEBUG (0): LQI Root is receiving packet from node 1 @0:24:26.007280629
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:24:26.015603828
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:26.016883669
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:26.020034563
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:26.023090186
+DEBUG (0): LQI Root is receiving packet from node 2 @0:24:26.025766122
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:24:26.026908634
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:26.028368035
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:26.032367475
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:26.034064965
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:26.036475839
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:26.039691651
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:26.051673505
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:24:26.053077305
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:26.057303965
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:24:26.062507182
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:26.066718583
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:31.008262503
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:24:31.010904149
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:31.017211704
+DEBUG (0): LQI Root is receiving packet from node 2 @0:24:31.021257599
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:31.028612174
+DEBUG (0): LQI Root is receiving packet from node 1 @0:24:31.035066722
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:24:31.042077673
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:31.051309186
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:31.059115976
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:31.076129427
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:31.082248165
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:24:31.084720075
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:24:31.084720075
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:24:31.084720075
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:31.084720075
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:31.084720075
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:24:31.084720075
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:31.089084063
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:31.091876405
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:24:31.091876405
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:31.091876405
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:24:31.091876405
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:31.093768484
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:31.098941183
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:24:31.101062143
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:31.101062143
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:31.101062143
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:24:31.101062143
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:24:31.101062143
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:31.104998887
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:31.104998887
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:24:31.104998887
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:31.107287692
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:24:31.110125810
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:31.110125810
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:31.110125810
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:31.110125810
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:24:31.114093072
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:31.118106110
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:24:31.121478283
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:24:31.121478283
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:31.121478283
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:31.121478283
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:31.121478283
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 62 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:36.006305616
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:24:36.006305616
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:24:36.006305616
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:24:36.006305616
+DEBUG (0): LQI Root is receiving packet from node 2 @0:24:36.007043698
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:24:36.007043698
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:36.008910971
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:24:36.008949145
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:36.008949145
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:24:36.013238730
+DEBUG (0): LQI Root is receiving packet from node 2 @0:24:36.013238730
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:24:36.013238730
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:24:36.013238730
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:24:36.015273849
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:36.015273849
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:24:36.015273849
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:24:36.015273849
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:36.017412288
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:36.017412288
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:36.022826905
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:36.022826905
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:24:36.023805801
+DEBUG (0): LQI Root is receiving packet from node 2 @0:24:36.024772416
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:24:36.024772416
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:24:36.024772416
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:36.024980603
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:24:36.031524364
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:36.031524364
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:24:36.031524364
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:36.031524364
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:24:36.031524364
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:24:36.032884728
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:36.034804985
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:24:36.034804985
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:36.036437666
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:24:36.036437666
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:24:36.040557515
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:36.040557515
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:36.040557515
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:36.040557515
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:24:36.043471926
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:36.043471926
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:36.043471926
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:24:36.043471926
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:36.043471926
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:24:36.051253863
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:36.051253863
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:24:36.051253863
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:36.051253863
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:41.007392757
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:24:41.007392757
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:24:41.011169258
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:41.011169258
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:41.011169258
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:24:41.013033159
+DEBUG (0): LQI Root is receiving packet from node 1 @0:24:41.013033159
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:41.018249295
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:24:41.018249295
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:24:41.019289226
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:41.023561662
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:41.023561662
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:24:41.023561662
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:24:41.024169671
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:24:41.024169671
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:24:41.026839943
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:24:41.026839943
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:41.026839943
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:24:41.026839943
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:24:41.029342370
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:41.029342370
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:24:41.029342370
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:41.029342370
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:41.029342370
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:24:41.029342370
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:24:41.034319046
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:24:41.034319046
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:41.034319046
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:24:41.034319046
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:41.034319046
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:24:41.039430710
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:24:41.039430710
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:41.039430710
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:24:41.040071576
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:41.041948396
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:24:41.041948396
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:24:41.043474266
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:41.043474266
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:24:41.043474266
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:24:41.043474266
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:24:41.048158687
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:24:41.048158687
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:24:41.048158687
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:41.048158687
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:24:41.048158687
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:41.048158687
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:24:41.053743371
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:24:41.053743371
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:24:41.053743371
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:41.053743371
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:24:41.053743371
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:41.053743371
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:46.005882146
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:24:46.005882146
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:24:46.005882146
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:24:46.005882146
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:24:46.006448608
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:24:46.008226551
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:46.008226551
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:46.008226551
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:24:46.008226551
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:46.008226551
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:46.011035813
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:24:46.011035813
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:24:46.011035813
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:46.011581243
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:46.013002524
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:24:46.013002524
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:24:46.013002524
+DEBUG (0): LQI Root is receiving packet from node 2 @0:24:46.014978222
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:24:46.014978222
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:24:46.014978222
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:24:46.014978222
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:24:46.014978222
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:24:46.016940929
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:46.016940929
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:46.016940929
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:24:46.016940929
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:24:46.017474984
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:24:46.023654757
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:46.023654757
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:24:46.023654757
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:24:46.023654757
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:24:46.023654757
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:24:46.027513666
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:24:46.027513666
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:46.027513666
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:46.027513666
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:46.027513666
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:46.030288409
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:46.030288409
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:24:46.030288409
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:24:46.030902640
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:24:46.032230147
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:24:46.032230147
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:46.032230147
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:24:46.032815642
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:24:46.032815642
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:24:46.038400326
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:46.038400326
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:24:46.038400326
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:24:46.038400326
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:24:46.039554323
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:24:46.044381736
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:24:46.044381736
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:46.044381736
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:46.044381736
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:24:46.044595358
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:46.048831612
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:24:46.048831612
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:46.048831612
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 88 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1155 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 1155.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 1155.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1331 and my cost to 1155.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 1155.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 1155.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 1155.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1155.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1155.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 1620.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1620.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 1620.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1620.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 1620.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1155.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1620.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 1620.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1155 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 2349.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1620.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 2349.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 1155.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 2349.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 2349.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1155.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:24:51.006426142
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:51.012941489
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:51.017692380
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:51.019912493
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:51.023624240
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:51.031757127
+DEBUG (0): LQI Root is receiving packet from node 2 @0:24:51.036828680
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:51.039645875
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:51.051400738
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:51.060815356
+DEBUG (0): LQI Root is receiving packet from node 6 @0:24:51.074593962
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:24:56.008163294
+DEBUG (0): LQI Root is receiving packet from node 1 @0:24:56.010820648
+DEBUG (0): LQI Root is receiving packet from node 2 @0:24:56.018518240
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:24:56.024238362
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:24:56.038850761
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:24:56.042926496
+DEBUG (0): LQI Root is receiving packet from node 3 @0:24:56.047645208
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:24:56.049274115
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:24:56.053592327
+DEBUG (0): LQI Root is receiving packet from node 4 @0:24:56.056708876
+DEBUG (0): LQI Root is receiving packet from node 5 @0:24:56.060889759
+DEBUG (0): LQI Root is receiving packet from node 2 @0:25:1.006448608
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:25:1.006996031
+DEBUG (0): LQI Root is receiving packet from node 1 @0:25:1.009004862
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:25:1.020540321
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:25:1.027404515
+DEBUG (0): LQI Root is receiving packet from node 3 @0:25:1.030936931
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:25:1.032520062
+DEBUG (0): LQI Root is receiving packet from node 6 @0:25:1.037448622
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:25:1.040363034
+DEBUG (0): LQI Root is receiving packet from node 4 @0:25:1.046100305
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:25:1.047321001
+DEBUG (0): LQI Root is receiving packet from node 5 @0:25:1.056918723
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 165.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1620.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 165.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 165.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1155.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 165.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 165.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 1280.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1620.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 1280.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 165.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1280.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 1280.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:25:6.006091994
+DEBUG (0): LQI Root is receiving packet from node 1 @0:25:6.010835906
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:25:6.011446136
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:25:6.017343320
+DEBUG (0): LQI Root is receiving packet from node 4 @0:25:6.019975868
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:25:6.022147920
+DEBUG (0): LQI Root is receiving packet from node 2 @0:25:6.026094606
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:25:6.028526057
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:25:6.032149971
+DEBUG (0): LQI Root is receiving packet from node 3 @0:25:6.034751606
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:25:6.042467073
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:25:6.047365116
+DEBUG (0): LQI Root is receiving packet from node 6 @0:25:6.050569443
+DEBUG (0): LQI Root is receiving packet from node 5 @0:25:6.057969913
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 1654.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1620.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1654.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 1654.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1155.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 1654.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 165.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:25:11.007082266
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:25:11.007572088
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:25:11.009401470
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:25:11.013055625
+DEBUG (0): LQI Root is receiving packet from node 4 @0:25:11.016589979
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:25:11.019044969
+DEBUG (0): LQI Root is receiving packet from node 2 @0:25:11.024936488
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:25:11.027908052
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:25:11.035285661
+DEBUG (0): LQI Root is receiving packet from node 6 @0:25:11.041125969
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:25:11.042815802
+DEBUG (0): LQI Root is receiving packet from node 5 @0:25:11.049438078
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:25:11.053214633
+DEBUG (0): LQI Root is receiving packet from node 3 @0:25:11.066916946
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:25:16.009849408
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:25:16.022567507
+DEBUG (0): LQI Root is receiving packet from node 1 @0:25:16.027391596
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:25:16.033487025
+DEBUG (0): LQI Root is receiving packet from node 2 @0:25:16.040628096
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:25:16.041650429
+DEBUG (0): LQI Root is receiving packet from node 3 @0:25:16.046167004
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:25:16.052171607
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:25:16.054889316
+DEBUG (0): LQI Root is receiving packet from node 5 @0:25:16.075747959
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:25:16.077212794
+DEBUG (0): LQI Root is receiving packet from node 4 @0:25:16.081897215
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:25:16.083896105
+DEBUG (0): LQI Root is receiving packet from node 6 @0:25:16.090762520
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1620.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 165.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1155.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:25:21.006095768
+DEBUG (0): LQI Root is receiving packet from node 1 @0:25:21.009172708
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:25:21.012374696
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:25:21.014850488
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:25:21.015504950
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:25:21.019464279
+DEBUG (0): LQI Root is receiving packet from node 4 @0:25:21.023105444
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:25:21.039539064
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:25:21.047885573
+DEBUG (0): LQI Root is receiving packet from node 2 @0:25:21.051242487
+DEBUG (0): LQI Root is receiving packet from node 6 @0:25:21.058459852
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:25:21.059381039
+DEBUG (0): LQI Root is receiving packet from node 5 @0:25:21.065417819
+DEBUG (0): LQI Root is receiving packet from node 3 @0:25:21.072711478
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 199.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 199.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 199.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 199.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 199.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 199.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 834.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 199.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 834.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 199.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 834.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 834.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 165.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 104 that advertises 2349.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 199.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 2349.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 165.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 2349.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 2349.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 2349.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 199.
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:25:26.007964931
+DEBUG (0): LQI Root is receiving packet from node 1 @0:25:26.015703432
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:25:26.018617725
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:25:26.020852821
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:25:26.024818193
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:25:26.025134851
+DEBUG (0): LQI Root is receiving packet from node 5 @0:25:26.028207514
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:25:26.032703167
+DEBUG (0): LQI Root is receiving packet from node 4 @0:25:26.036157297
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:25:26.036645576
+DEBUG (0): LQI Root is receiving packet from node 6 @0:25:26.053674285
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:25:26.066537369
+DEBUG (0): LQI Root is receiving packet from node 3 @0:25:26.071679551
+DEBUG (0): LQI Root is receiving packet from node 2 @0:25:26.081765551
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:25:31.006217837
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:25:31.009231403
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:25:31.012155362
+DEBUG (0): LQI Root is receiving packet from node 1 @0:25:31.016466367
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:25:31.018976001
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:25:31.023820942
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:25:31.027047853
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:25:31.029742979
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:25:31.034229037
+DEBUG (0): LQI Root is receiving packet from node 6 @0:25:31.048601189
+DEBUG (0): LQI Root is receiving packet from node 3 @0:25:31.052415864
+DEBUG (0): LQI Root is receiving packet from node 5 @0:25:31.060243577
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:25:36.007425165
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:25:36.012420472
+DEBUG (0): LQI Root is receiving packet from node 2 @0:25:36.015825501
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:25:36.024665606
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:25:36.027618137
+DEBUG (0): LQI Root is receiving packet from node 1 @0:25:36.032564295
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:25:36.036806096
+DEBUG (0): LQI Root is receiving packet from node 5 @0:25:36.046831180
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:25:36.048221264
+DEBUG (0): LQI Root is receiving packet from node 6 @0:25:36.054736729
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:25:36.057178121
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:25:36.075225281
+DEBUG (0): LQI Root is receiving packet from node 4 @0:25:36.079532117
+DEBUG (0): LQI Root is receiving packet from node 3 @0:25:36.096026772
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 64 that advertises 343.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1620.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 199.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 343.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 343.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 199.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 343.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 324.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 1331 and my cost to 324.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 324.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 199.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 110 that advertises 324.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 125 and my cost to 324.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 324.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 324.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 989.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 989.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 989.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 125 and my cost to 324.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 989.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 199.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 989.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 989.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:25:41.007967271
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:25:41.009357356
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:25:41.011629241
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:25:41.014184769
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:25:41.015907112
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:25:41.018127226
+DEBUG (0): LQI Root is receiving packet from node 2 @0:25:41.023935078
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:25:41.026160958
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:25:41.035064383
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:25:41.049445734
+DEBUG (0): LQI Root is receiving packet from node 6 @0:25:41.056449478
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:25:41.058982422
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:25:41.067771433
+DEBUG (0): LQI Root is receiving packet from node 5 @0:25:41.087348345
+DEBUG (0): LQI Root is receiving packet from node 4 @0:25:41.094870884
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:25:46.005924148
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:25:46.009554057
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:25:46.012702785
+DEBUG (0): LQI Root is receiving packet from node 1 @0:25:46.018572067
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:25:46.023416283
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:25:46.026374580
+DEBUG (0): LQI Root is receiving packet from node 3 @0:25:46.039453176
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:25:46.042367588
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:25:46.044433224
+DEBUG (0): LQI Root is receiving packet from node 2 @0:25:46.048806759
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:25:46.050942977
+DEBUG (0): LQI Root is receiving packet from node 4 @0:25:46.059548884
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:25:46.064767360
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:25:46.067962140
+DEBUG (0): LQI Root is receiving packet from node 5 @0:25:46.073403784
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:25:46.075271057
+DEBUG (0): LQI Root is receiving packet from node 6 @0:25:46.091933557
+DEBUG (0): LQI Root is receiving packet from node 1 @0:25:51.011034270
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:25:51.016746340
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:25:51.018741456
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:25:51.021883087
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:25:51.025857675
+DEBUG (0): LQI Root is receiving packet from node 3 @0:25:51.034753497
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:25:51.036370919
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:25:51.040801654
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:25:51.052367748
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:25:51.062640736
+DEBUG (0): LQI Root is receiving packet from node 2 @0:25:51.069177124
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:25:51.074233465
+DEBUG (0): LQI Root is receiving packet from node 4 @0:25:51.080520050
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:25:51.083098770
+DEBUG (0): LQI Root is receiving packet from node 6 @0:25:51.091506314
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 199.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 385.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 1331 and my cost to 385.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 385.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 125 and my cost to 324.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 385.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 385.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 385.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 449.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 5, my link to 76 and my cost to 449.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 449.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 385.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 449.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 1114.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 76 and my cost to 449.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 1114.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 125 and my cost to 324.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 1114.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 1114.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 385.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:25:56.007400359
+DEBUG (0): LQI Root is receiving packet from node 1 @0:25:56.010286593
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:25:56.010425465
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:25:56.010561132
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:25:56.015586679
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:25:56.025255260
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:25:56.027789865
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:25:56.031486244
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:25:56.032428510
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:25:56.035134964
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:25:56.036719979
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:25:56.044746055
+DEBUG (0): LQI Root is receiving packet from node 2 @0:25:56.045709243
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:25:56.051889017
+DEBUG (0): LQI Root is receiving packet from node 5 @0:25:56.057565253
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:25:56.058557069
+DEBUG (0): LQI Root is receiving packet from node 4 @0:25:56.070931874
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:25:56.072305157
+DEBUG (0): LQI Root is receiving packet from node 6 @0:25:56.082482710
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:1.007745598
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:1.010393404
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:1.015342540
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:26:1.015979631
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:26:1.018020415
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:1.019106122
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:1.022907081
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:26:1.026046491
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:1.028108637
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:26:1.035148332
+DEBUG (0): LQI Root is receiving packet from node 3 @0:26:1.039298699
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:26:1.042892096
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:1.045640883
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:26:1.048865904
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:1.054755762
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:26:1.058250004
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:26:1.061876140
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:26:1.067781257
+DEBUG (0): LQI Root is receiving packet from node 5 @0:26:1.076468892
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:26:1.084230135
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:1.087968517
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:6.007082266
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:6.010522681
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:6.014961072
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:26:6.017688606
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:26:6.023071044
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:6.023714131
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:6.027383545
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:26:6.030433394
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:6.032825236
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:6.039964647
+DEBUG (0): LQI Root is receiving packet from node 3 @0:26:6.043067598
+DEBUG (0): LQI Root is receiving packet from node 3 @0:26:6.045150383
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:26:6.048083936
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:26:6.053725773
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:6.058765026
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:6.061751849
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:26:6.071654745
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:26:6.080977811
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:26:6.088408798
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:6.088408798
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:26:6.088408798
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:26:6.088408798
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:6.096190735
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:6.104323622
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:26:6.106734496
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 62 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 989.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 125 and my cost to 324.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 65534.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 0, my link to 64 and my cost to 65534.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 989.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 65534.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 0, my link to 165 and my cost to 65534.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 0, my link to 64 and my cost to 65534.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 65534.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 0, my link to 243 and my cost to 65534.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 0, my link to 165 and my cost to 65534.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 0, my link to 64 and my cost to 65534.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:11.005876829
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:26:11.005876829
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:26:11.006656566
+DEBUG (0): LQI Root is receiving packet from node 5 @0:26:11.008910971
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:26:11.008910971
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:26:11.008910971
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:26:11.008910971
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:26:11.008910971
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:11.009889749
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:11.011407686
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:26:11.012801939
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:26:11.014434620
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:26:11.014434620
+DEBUG (0): LQI Root is receiving packet from node 5 @0:26:11.014434620
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:26:11.016029181
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:26:11.018182549
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:26:11.021217139
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:11.021217139
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:26:11.021217139
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:11.021217139
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:26:11.021217139
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:26:11.023996113
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:11.028632868
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:26:11.028632868
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:11.028632868
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:26:11.031060891
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:26:11.036264108
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:11.036264108
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:26:11.036264108
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:11.036264108
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:26:11.043502444
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:26:11.043502444
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:26:11.043502444
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:26:11.044595358
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:11.044595358
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:26:11.048278417
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:26:11.048278417
+DEBUG (0): LQI Root is receiving packet from node 5 @0:26:11.048278417
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:26:11.048278417
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:26:11.048278417
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:26:11.048278417
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:26:11.051971022
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:16.007745598
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:16.007745598
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:16.007745598
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:26:16.008277762
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:16.008277762
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:26:16.010347628
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:16.010347628
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:26:16.010347628
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:26:16.010347628
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:26:16.015250988
+DEBUG (0): LQI Root is receiving packet from node 3 @0:26:16.015250988
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:26:16.015250988
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:26:16.015250988
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:26:16.015276188
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:26:16.018114188
+DEBUG (0): LQI Root is receiving packet from node 3 @0:26:16.018114188
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:26:16.018114188
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:16.018114188
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:26:16.018907759
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:16.020263444
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:16.020263444
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:26:16.020982942
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:16.022269990
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:26:16.022269990
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:26:16.022269990
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:26:16.022269990
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:16.024004165
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:26:16.024004165
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:26:16.025758797
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:16.026613402
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:26:16.026613402
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:26:16.030580546
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:26:16.030580546
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:26:16.030580546
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:26:16.030580546
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:16.030580546
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:16.033202821
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:26:16.033202821
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:26:16.033202821
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:26:16.033202821
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:16.034059530
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:26:16.036867249
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:26:16.036867249
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:26:16.036867249
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:16.036867249
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:26:16.036867249
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:26:16.036867249
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:26:16.041933137
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:26:16.041933137
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:26:16.041933137
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:26:16.041933137
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:26:16.041933137
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:26:21.007189077
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:21.007189077
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:26:21.008018364
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:26:21.008651573
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:21.010690527
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:26:21.010690527
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:21.010690527
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:21.010690527
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:21.010690527
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:26:21.013696491
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:21.013696491
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:21.013696491
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:21.013696491
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:26:21.016069522
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:21.016069522
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:21.016069522
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:26:21.016069522
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:26:21.017785822
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:21.017785822
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:21.020219889
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:26:21.020219889
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:21.020219889
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:26:21.022254731
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:21.022254731
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:26:21.022254731
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:21.022254731
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:21.022254731
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:21.026086555
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:26:21.026086555
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:21.026086555
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:21.028291741
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:26:21.028291741
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:21.028291741
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:26:21.028291741
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:26:21.030938822
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:26:21.030938822
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:21.030938822
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:21.030938822
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:21.030938822
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:21.030938822
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:26:21.035424880
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:21.035424880
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:21.035424880
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:21.035424880
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:21.035424880
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:26:21.035424880
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4698 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 926.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4698 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 926.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 926.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:26.007585803
+DEBUG (0): LQI Root is receiving packet from node 5 @0:26:26.009567095
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:26.029498840
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:26.032266329
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:26.042741730
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:26.046945198
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:26.049460993
+DEBUG (0): LQI Root is receiving packet from node 3 @0:26:26.058341556
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 1306.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1306.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 1306.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1306.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 1306.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 1306.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 1306.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 1918.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1306.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 1918.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 78 that advertises 1918.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 1918.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 1918.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:31.015367740
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:31.023561544
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:31.028003487
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:31.040002490
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:26:31.044727022
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:26:31.052489818
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:26:31.056273976
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:31.068551517
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:31.069129457
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:31.077004837
+DEBUG (0): LQI Root is receiving packet from node 5 @0:26:31.084954620
+DEBUG (0): LQI Root is receiving packet from node 3 @0:26:31.093819924
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:36.006082399
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:36.011949792
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:36.015323507
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:36.020374137
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:26:36.030318927
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:36.036277476
+DEBUG (0): LQI Root is receiving packet from node 3 @0:26:36.040641464
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:26:36.045074090
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:36.046693733
+DEBUG (0): LQI Root is receiving packet from node 5 @0:26:36.057540448
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:26:36.063966582
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:36.072007917
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 144.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 144.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 144.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:41.006355166
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:41.011981852
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:26:41.013839531
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:41.014726875
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:41.027269408
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:26:41.047372442
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:41.049102387
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:41.054635583
+DEBUG (0): LQI Root is receiving packet from node 3 @0:26:41.057504218
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:41.070489372
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:26:41.075906211
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:41.090295165
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:41.091689418
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:41.097029963
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:26:41.103743791
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:26:41.111891937
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:41.111891937
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:41.111891937
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:26:41.111891937
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:26:41.111891937
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:41.111891937
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:41.117507139
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:41.119216113
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:41.120482585
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:26:41.122954495
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 1051.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1306.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 1051.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1306.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 1051.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 76 and my cost to 1051.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 1051.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1051.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 1340.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1306.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1340.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 76 and my cost to 1051.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 1340.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 1340.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 4, my link to 729 and my cost to 1340.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:46.009081156
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:46.013567096
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:46.016320987
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:46.016975221
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:26:46.019241111
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:26:46.023475427
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:46.027557102
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:26:46.030078670
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:26:46.039127079
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:26:46.057326826
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:26:46.061206418
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:26:46.078509784
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:26:46.081744628
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:26:46.088305869
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:26:46.094241504
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:46.106265359
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:26:46.115557908
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:26:46.122500616
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:46.124606317
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:26:46.130953936
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:26:46.130953936
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:46.130953936
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:26:46.130953936
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:46.130953936
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:26:46.130953936
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:26:46.136981122
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:46.143527105
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:26:46.145525994
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:46.145525994
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:46.145525994
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:26:46.145525994
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:26:46.145525994
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:26:51.007943961
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:51.007943961
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:51.007943961
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:26:51.007943961
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:51.010211843
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:51.010211843
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:26:51.010211843
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:26:51.012621056
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:51.012621056
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:51.012621056
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:26:51.012621056
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:26:51.012621056
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:51.012621056
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:51.016315323
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:26:51.016315323
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:26:51.017066773
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:51.024294080
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:26:51.024294080
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:51.024294080
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:51.024294080
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:51.027702087
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:26:51.027702087
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:26:51.027702087
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:51.027702087
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:51.027702087
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:26:51.028215448
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:51.032703167
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:51.032703167
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:51.032703167
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:51.032703167
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:26:51.032703167
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:26:51.035707469
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:26:51.035707469
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:26:51.035707469
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:51.035707469
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:26:51.035707469
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:26:51.038181040
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:51.038181040
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:51.038181040
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:26:51.038181040
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:26:51.038181040
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:51.038181040
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:26:51.040790278
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:51.040790278
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:51.040790278
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:26:51.040790278
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:26:51.040790278
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:26:51.042650178
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:26:51.044589694
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:51.044589694
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:26:51.044589694
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:51.044589694
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:26:51.044589694
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:26:51.045839246
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:51.047610916
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:51.047610916
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:51.047610916
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:26:51.047610916
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:26:51.050067567
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:26:51.050067567
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:51.050067567
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:26:51.050067567
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:51.050067567
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:26:51.050067567
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:26:51.056003201
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:26:51.056003201
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:51.056003201
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:51.056003201
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:51.056003201
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:51.056003201
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:26:51.058627698
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:26:51.058627698
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:26:51.058627698
+DEBUG (0): LQI Root is receiving packet from node 4 @0:26:51.058627698
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:26:51.058627698
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:26:51.058627698
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:26:56.006296021
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:56.006296021
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:56.006296021
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:26:56.006296021
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:56.007209653
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:26:56.008943709
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:56.008943709
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:26:56.009139851
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:26:56.011339444
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:56.011339444
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:26:56.011339444
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:26:56.011339444
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:26:56.011339444
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:26:56.014732192
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:26:56.014732192
+DEBUG (0): LQI Root is receiving packet from node 3 @0:26:56.014732192
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:26:56.014732192
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:26:56.014732192
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:26:56.014732192
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:26:56.017397029
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:56.017397029
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:26:56.017397029
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:26:56.019624918
+DEBUG (0): LQI Root is receiving packet from node 2 @0:26:56.019624918
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:26:56.019624918
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:26:56.021796970
+DEBUG (0): LQI Root is receiving packet from node 3 @0:26:56.021796970
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:26:56.021989898
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:26:56.022681975
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:56.024398551
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:26:56.024398551
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:26:56.024398551
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:26:56.024398551
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:26:56.024934945
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:56.028098813
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:56.028098813
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:26:56.028098813
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:26:56.028098813
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:56.028098813
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:56.030351784
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:26:56.030351784
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:26:56.030351784
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:26:56.030351784
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:26:56.030351784
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:26:56.032233921
+DEBUG (0): LQI Root is receiving packet from node 5 @0:26:56.033115151
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:26:56.033115151
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:26:56.033115151
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:26:56.033115151
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:26:56.033660582
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:26:56.035499283
+DEBUG (0): LQI Root is receiving packet from node 1 @0:26:56.035499283
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:26:56.035499283
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:26:56.035499283
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:56.038413694
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:56.038413694
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:26:56.038898199
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:26:56.040607173
+DEBUG (0): LQI Root is receiving packet from node 5 @0:26:56.040607173
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:26:56.041724832
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:26:56.042602180
+DEBUG (0): LQI Root is receiving packet from node 6 @0:26:56.042602180
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:26:56.042602180
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:26:56.042602180
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:26:56.043693204
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:26:56.043693204
+DEBUG (0): LQI Root is receiving packet from node 5 @0:26:56.045356403
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:26:56.045356403
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:26:56.046298668
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:56.046298668
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:26:56.046298668
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:26:56.046298668
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:26:56.052081716
+DEBUG (0): LQI Root is receiving packet from node 3 @0:26:56.052081716
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:26:56.052081716
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:26:56.052924718
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:26:56.052924718
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4698 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4698 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 1331.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 1331.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 2325.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 2325.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 2325.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 2325.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 2886.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 2886.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 2886.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:1.014650581
+DEBUG (0): LQI Root is receiving packet from node 2 @0:27:1.018976001
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:27:1.024291740
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:27:1.031638831
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:1.039260525
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:1.041749914
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:1.051227228
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:1.055114314
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:1.057361226
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:1.062118058
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:1.069991547
+DEBUG (0): LQI Root is receiving packet from node 3 @0:27:1.076552788
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:6.012148036
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:6.014253855
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:27:6.017738156
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:6.031894455
+DEBUG (0): LQI Root is receiving packet from node 3 @0:27:6.034005820
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:6.037372329
+DEBUG (0): LQI Root is receiving packet from node 2 @0:27:6.039575246
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:27:6.045425040
+DEBUG (0): LQI Root is receiving packet from node 5 @0:27:6.055617851
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:27:11.007118101
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:11.009220027
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:27:11.016845495
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:11.017214043
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:11.020174113
+DEBUG (0): LQI Root is receiving packet from node 2 @0:27:11.030969339
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:11.052049537
+DEBUG (0): LQI Root is receiving packet from node 3 @0:27:11.056588696
+DEBUG (0): LQI Root is receiving packet from node 5 @0:27:11.066613662
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 60 that advertises 189.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 189.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 189.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 189.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 189.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 1456.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 1456.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 1456.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 1456.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1456.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2572.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 2572.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 2572.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:27:16.006812927
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:27:16.024478727
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:16.027666134
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:27:16.034517291
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:27:16.036636029
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:27:16.040429733
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.048051876
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.049966421
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.057298648
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.059884576
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.066484385
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.069375487
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.074273530
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.077974186
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.081063651
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.088014411
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.092782333
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.097604082
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:27:16.102212209
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:16.109101934
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:27:16.112405021
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:16.116716026
+DEBUG (0): LQI Root is receiving packet from node 2 @0:27:16.121995536
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:21.006792351
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:27:21.007928702
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:27:21.010619945
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:27:21.013233065
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:21.014360548
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:27:21.018417141
+DEBUG (0): LQI Root is receiving packet from node 5 @0:27:21.020471354
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:27:21.022218778
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:27:21.026984928
+DEBUG (0): LQI Root is receiving packet from node 5 @0:27:21.034280477
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:27:21.045814164
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:21.049325555
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:21.060220267
+DEBUG (0): LQI Root is receiving packet from node 3 @0:27:21.070504631
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:27:26.006580272
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:26.009233743
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:26.012834796
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:26.017015562
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:27:26.024795277
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:27:26.032981597
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:27:26.033632286
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:26.036973941
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:27:26.040490768
+DEBUG (0): LQI Root is receiving packet from node 5 @0:27:26.048242188
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:27:26.049600212
+DEBUG (0): LQI Root is receiving packet from node 2 @0:27:26.059197934
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:27:26.067849617
+DEBUG (0): LQI Root is receiving packet from node 3 @0:27:26.076165609
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 111 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 241.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 1189.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 1189.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 1189.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1189.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 1189.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 1189.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 1189.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 1569.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 1569.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 1569.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:27:31.009317244
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:27:31.011199776
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:27:31.014274431
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:31.017305477
+DEBUG (0): LQI Root is receiving packet from node 2 @0:27:31.023698991
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:27:31.026401323
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:27:31.034641021
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:31.037401303
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:31.044069355
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:27:31.047629949
+DEBUG (0): LQI Root is receiving packet from node 5 @0:27:31.052965177
+DEBUG (0): LQI Root is receiving packet from node 3 @0:27:31.059617970
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:27:31.061435299
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:31.068866286
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:27:36.008386463
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:27:36.013908222
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:27:36.018707056
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:27:36.021457505
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:36.025102673
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:36.029817729
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:27:36.031558764
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:27:36.036567392
+DEBUG (0): LQI Root is receiving packet from node 5 @0:27:36.045671519
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:27:36.047153155
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:36.052766814
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:36.059404349
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:41.008516466
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:41.016939386
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:27:41.019729389
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:27:41.022912746
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:27:41.023826377
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:27:41.033298256
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:27:41.038886714
+DEBUG (0): LQI Root is receiving packet from node 3 @0:27:41.047402959
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:27:41.050220154
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:41.052728245
+DEBUG (0): LQI Root is receiving packet from node 5 @0:27:41.061074754
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:27:41.066897913
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:41.070895693
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 60 that advertises 106.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 1189.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 106.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1189.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 106.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 106.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 106.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 366.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1189.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 366.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 366.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 366.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:27:46.006341797
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:46.011888639
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:27:46.015628681
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:27:46.018897817
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:27:46.021808455
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:46.026354004
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:27:46.030097703
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:27:46.036269820
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:46.042238311
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:27:46.045562368
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:27:46.051154709
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:27:46.057258189
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:27:46.061530625
+DEBUG (0): LQI Root is receiving packet from node 3 @0:27:46.064195580
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:27:46.066321857
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:46.074922446
+DEBUG (0): LQI Root is receiving packet from node 5 @0:27:46.081041185
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:27:46.083197979
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:27:46.091788627
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:46.096793480
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 1253.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 1189.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1253.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 366.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 1253.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 1253.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1253.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 106.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:27:51.007110444
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:27:51.009269577
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:27:51.010837449
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:51.011202115
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:27:51.015435983
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:27:51.016391616
+DEBUG (0): LQI Root is receiving packet from node 2 @0:27:51.018838673
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:27:51.019992669
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:51.020876013
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:27:51.022668606
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:27:51.027194776
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:27:51.030427959
+DEBUG (0): LQI Root is receiving packet from node 3 @0:27:51.031930637
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:27:51.045282000
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:27:51.058404482
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:27:51.060060354
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:51.061624067
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:27:51.068223759
+DEBUG (0): LQI Root is receiving packet from node 5 @0:27:51.073663182
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:51.079980284
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:27:56.008869077
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:27:56.010881564
+DEBUG (0): LQI Root is receiving packet from node 1 @0:27:56.011278409
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:27:56.014428908
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:27:56.020525063
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:27:56.027770724
+DEBUG (0): LQI Root is receiving packet from node 2 @0:27:56.038324033
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:27:56.055991717
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:27:56.057113204
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:27:56.064277191
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:27:56.066718583
+DEBUG (0): LQI Root is receiving packet from node 4 @0:27:56.070640069
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:27:56.080909174
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:27:56.085364714
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:27:56.091422418
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:27:56.095069247
+DEBUG (0): LQI Root is receiving packet from node 3 @0:27:56.099417977
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:27:56.102469717
+DEBUG (0): LQI Root is receiving packet from node 6 @0:27:56.104880591
+DEBUG (0): LQI Root is receiving packet from node 5 @0:27:56.113425463
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 65 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 1189.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1189.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 106.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 366.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:1.010500097
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:1.014285916
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:28:1.017181186
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:1.025453741
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:28:1.029163148
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:1.052665320
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:28:1.055636993
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:1.060203118
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:1.066888319
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:28:1.074866729
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:28:1.080909174
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:28:1.084159277
+DEBUG (0): LQI Root is receiving packet from node 3 @0:28:1.086158167
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:28:1.098868664
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:28:1.100653932
+DEBUG (0): LQI Root is receiving packet from node 5 @0:28:1.115012368
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:28:1.122321286
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:1.128333213
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 231.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1189.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 231.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 366.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 231.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 231.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 456.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 5, my link to 465 and my cost to 456.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 456.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 456.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 106.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 456.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 921.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1189.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 921.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 366.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 921.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 106.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 921.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 921.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:6.009599834
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:6.011606049
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:6.016573178
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:6.033662922
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:28:6.044814692
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:28:6.048621765
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:6.050372741
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:28:6.057666400
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:28:6.061988386
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:28:6.064761695
+DEBUG (0): LQI Root is receiving packet from node 3 @0:28:6.070350153
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:6.072772513
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:6.076697773
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:6.079654186
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:6.082141355
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:6.089602859
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:28:6.095828408
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:28:6.102465943
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:28:6.102465943
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:28:6.102465943
+DEBUG (0): LQI Root is receiving packet from node 5 @0:28:6.102465943
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:28:6.102465943
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:28:6.102465943
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:28:6.107196140
+DEBUG (0): LQI Root is receiving packet from node 5 @0:28:6.110934521
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:28:6.119494652
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:28:6.121585094
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:28:11.006137770
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:28:11.006137770
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:11.006137770
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:11.006137770
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:28:11.008025966
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:11.008608136
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:28:11.008608136
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:28:11.008608136
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:11.011209323
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:28:11.012397611
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:28:11.014037894
+DEBUG (0): LQI Root is receiving packet from node 5 @0:28:11.014037894
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:28:11.014037894
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:28:11.014037894
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:28:11.014037894
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:28:11.016145816
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:11.019874374
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:28:11.019874374
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:28:11.019874374
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:11.021798860
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:11.023973529
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:28:11.023973529
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:11.026094606
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:11.026094606
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:28:11.026094606
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:28:11.026094606
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:28:11.028261224
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:28:11.029870713
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:28:11.031953829
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:28:11.031953829
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:11.031953829
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:11.031953829
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:11.031953829
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:11.035829539
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:28:11.037421879
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:11.037851013
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:28:11.040687241
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:11.040687241
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:28:11.040687241
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:11.040687241
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:28:11.044755997
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:28:11.048784175
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:28:11.048784175
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:28:11.048784175
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:28:11.048784175
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:11.048784175
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:28:11.048784175
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:28:11.055498003
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:11.057298530
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:28:11.057298530
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:28:11.057298530
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:11.057298530
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:28:11.063646149
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:28:11.063646149
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:11.063646149
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:28:11.063646149
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:11.069017330
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:11.074861412
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:28:11.082887488
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:28:16.007074215
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:16.007074215
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:16.007646838
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:28:16.010471241
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:28:16.010471241
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:16.010471241
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:16.010471241
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:16.015964373
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:28:16.015964373
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:16.015964373
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:28:16.015964373
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:16.018955078
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:16.018955078
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:28:16.018955078
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:28:16.026584428
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:16.026584428
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:28:16.031375660
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:28:16.031375660
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:16.031375660
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:16.031375660
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:16.031375660
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:28:16.035846459
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:16.035846459
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:28:16.035846459
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:16.035846459
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:28:16.039020268
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:28:16.039020268
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:16.039020268
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:16.039020268
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:16.043933570
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:28:16.043933570
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:16.043933570
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:16.045501333
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:28:16.045501333
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:28:16.045501333
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:28:16.049976015
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:16.049976015
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:16.049976015
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:28:16.049976015
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:16.049976015
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:28:16.054370521
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:16.054370521
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:16.054370521
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:28:16.054370521
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:16.054370521
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:21.008134998
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:28:21.008134998
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:21.009187967
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:21.009897074
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:28:21.010566567
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:28:21.010566567
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:28:21.010566567
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:21.011356245
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:28:21.014840893
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:21.014840893
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:28:21.014840893
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:28:21.017078258
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:21.017078258
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:28:21.017078258
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:28:21.017078258
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:28:21.017738156
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:28:21.020938709
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:21.020938709
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:28:21.020938709
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:28:21.020938709
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:21.020938709
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:21.023563205
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:28:21.023563205
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:28:21.023563205
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:28:21.023563205
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:28:21.023563205
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:28:21.026511908
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:21.026511908
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:21.026511908
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:28:21.026511908
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:28:21.026511908
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:21.030494429
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:21.030494429
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:28:21.030494429
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:21.030494429
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:28:21.031593055
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:21.032981597
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:21.032981597
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:28:21.032981597
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:28:21.032981597
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:28:21.032981597
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:28:21.035667128
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:21.035667128
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:28:21.035667128
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:21.035667128
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:28:21.035667128
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:28:21.042136817
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:21.042136817
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:21.042136817
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:28:21.042136817
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:21.042136817
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:28:21.043189667
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:28:21.051444624
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:28:21.051444624
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:21.051444624
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:21.051444624
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:21.051444624
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:28:21.051444624
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:26.007724675
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:28:26.007724675
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:28:26.007724675
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:28:26.008544762
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:26.009973368
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:26.009973368
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:28:26.009973368
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:28:26.010322428
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:26.013658648
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:28:26.013658648
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:28:26.013658648
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:28:26.013658648
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:28:26.014175222
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:28:26.015832709
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:26.015832709
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:26.015832709
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:26.016578495
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:26.020555580
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:28:26.020555580
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:28:26.025445690
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:28:26.025445690
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:26.025445690
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:28:26.025445690
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:26.025445690
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:28:26.026689578
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:28:26.028780019
+DEBUG (0): LQI Root is receiving packet from node 3 @0:28:26.028780019
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:28:26.028780019
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:28:26.028780019
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:28:26.028780019
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:28:26.029351917
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:28:26.033037197
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:26.033037197
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:28:26.033037197
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:28:26.035310743
+DEBUG (0): LQI Root is receiving packet from node 3 @0:28:26.035310743
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:28:26.035310743
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:28:26.035310743
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:28:26.035310743
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:28:26.037187563
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:28:26.038552913
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:28:26.038552913
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:28:26.038552913
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:28:26.041673621
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:28:26.041673621
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:26.041673621
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:28:26.044603291
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:28:26.044603291
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:28:26.044603291
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:28:26.044603291
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:31.006936887
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:28:31.006936887
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:28:31.006936887
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:28:31.006936887
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:31.006936887
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:28:31.009279519
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:31.009279519
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:28:31.009279519
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:31.010791673
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:28:31.011611761
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:28:31.011611761
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:28:31.016008606
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:28:31.016008606
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:28:31.016008606
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:28:31.016817199
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:31.016879895
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:31.019874374
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:31.019874374
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:28:31.019874374
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:28:31.019874374
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:28:31.022340848
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:31.022340848
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:28:31.022340848
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:28:31.022340848
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:28:31.027694430
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:31.027694430
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:28:31.027694430
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:28:31.027694430
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:28:31.028220883
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:31.030595923
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:28:31.030595923
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:28:31.030595923
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:31.030595923
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:28:31.030595923
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:28:31.032321699
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:28:31.040912347
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:28:31.040912347
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:31.040912347
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:28:31.040912347
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:28:31.040912347
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:28:31.047534623
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:28:31.047534623
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:31.047534623
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:28:31.047534623
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:28:31.047534623
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 1331.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 2197.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 2197.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 1331.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 2197.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 2197.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 2197.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 3052.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 3052.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 3052.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 3052.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 3052.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:36.007524769
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:28:36.010864084
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:36.014550978
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:36.020496207
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:28:36.024650347
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:36.032808316
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:36.043420438
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:36.045823987
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:36.051934793
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:36.058785949
+DEBUG (0): LQI Root is receiving packet from node 3 @0:28:36.068215826
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:28:41.006141544
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:41.006960197
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:41.009706644
+DEBUG (0): LQI Root is receiving packet from node 3 @0:28:41.014596754
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:28:41.021011120
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:41.024728531
+DEBUG (0): LQI Root is receiving packet from node 5 @0:28:41.029321400
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:41.033054117
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:41.037784314
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:46.009860893
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:46.011972258
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:28:46.015840642
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:28:46.016120734
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:46.026491333
+DEBUG (0): LQI Root is receiving packet from node 3 @0:28:46.031043742
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:28:46.033324891
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:46.038881279
+DEBUG (0): LQI Root is receiving packet from node 5 @0:28:46.045837025
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 243.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 243.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 243.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 243.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 1456.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 1456.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 1456.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1456.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 2121.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 125 and my cost to 2121.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 2121.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:28:51.006431459
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:28:51.011016671
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:51.013094194
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:28:51.016084781
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:51.019290769
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:51.023874044
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:28:51.024400773
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:28:51.030191145
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:51.034885161
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:28:51.037881530
+DEBUG (0): LQI Root is receiving packet from node 3 @0:28:51.040332517
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:51.048923165
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:28:51.052880832
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:51.061486739
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:28:56.008197694
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:28:56.015899455
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:28:56.019579023
+DEBUG (0): LQI Root is receiving packet from node 4 @0:28:56.021501738
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:28:56.025628794
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:28:56.027732604
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:28:56.031381324
+DEBUG (0): LQI Root is receiving packet from node 5 @0:28:56.037065612
+DEBUG (0): LQI Root is receiving packet from node 1 @0:28:56.044023579
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:28:56.045007343
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:28:56.046647957
+DEBUG (0): LQI Root is receiving packet from node 2 @0:28:56.049959213
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:28:56.059861991
+DEBUG (0): LQI Root is receiving packet from node 3 @0:28:56.065767226
+DEBUG (0): LQI Root is receiving packet from node 6 @0:28:56.073533905
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:1.006381909
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:1.008493274
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:1.009513716
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:1.011428656
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:29:1.013353474
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:1.017946461
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:1.019309802
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:1.020265665
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:1.026735472
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:29:1.027595276
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:1.031648773
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:1.037630184
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:29:1.040900862
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:1.045554766
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 319.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 125 and my cost to 2121.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 319.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 319.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 319.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 319.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 319.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 319.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:6.007196285
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:6.010536049
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:6.020647251
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:6.026598144
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:29:6.031831759
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:6.033057891
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:6.038932490
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:6.043380374
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:6.046588584
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:6.055499664
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:29:6.057097945
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:6.072295611
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:6.077773484
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:29:6.082366353
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:6.088637678
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 1169.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 125 and my cost to 2121.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 1169.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 319.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 1169.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 1169.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 2246.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 319.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 2246.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 2246.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 66 that advertises 2246.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 2246.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 319.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:11.007295888
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:11.010064920
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:29:11.013246663
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:11.017663753
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:11.020110857
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:11.024223103
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:11.024371916
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:11.029708579
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:11.033557654
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:11.042403817
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:11.049254974
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:29:11.054656553
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:11.058272865
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:29:11.058272865
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:11.058272865
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:29:11.058272865
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:11.058272865
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:11.064986693
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:11.066985583
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:29:11.068496194
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:29:11.068496194
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:11.071731039
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:11.077742966
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:29:11.077788743
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:11.081679711
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:29:16.006799558
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:16.006799558
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:29:16.006799558
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:16.009544234
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:16.015510386
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:16.015510386
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:29:16.019515767
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:29:16.023277064
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:29:16.027541843
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:29:16.027541843
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:29:16.030412700
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:16.035598437
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:29:16.035598437
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:16.035598437
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:16.035598437
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:29:16.035598437
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:29:16.043563478
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:29:16.043563478
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:16.043563478
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:16.043563478
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:29:16.049102387
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:16.049102387
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:29:16.049102387
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:16.049102387
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:16.053756290
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:16.053756290
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:29:16.053756290
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:16.057845622
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:16.057845622
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:29:16.057845622
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:16.057845622
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:29:16.062774182
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:16.063205308
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:16.066436270
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:29:16.066436270
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:29:16.066436270
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:16.066436270
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:16.067309898
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:29:16.067309898
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:29:16.070067840
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:29:16.070067840
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:16.070067840
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:16.071231384
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:16.071231384
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:16.074813296
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:16.074813296
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:29:16.074813296
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:16.074813296
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:16.074813296
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:29:16.076796927
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:16.076796927
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:29:16.076796927
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:29:16.076796927
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:29:16.076796927
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:16.077773484
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:16.080356087
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:16.080356087
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:16.080356087
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:16.080356087
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:29:16.081817039
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:16.082702044
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:16.082702044
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:29:16.082702044
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:29:16.082702044
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:29:16.083968516
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:29:16.087645863
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:29:16.087645863
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:29:16.087645863
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:16.087645863
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:29:16.087645863
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:29:16.089816481
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:16.089816481
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:29:16.089816481
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:16.089816481
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:29:16.089816481
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:29:16.091948816
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:29:16.091948816
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:16.091948816
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:29:16.091948816
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:16.091948816
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:29:16.092635458
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:29:16.096511167
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:29:16.096511167
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:16.096511167
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:16.096511167
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:29:16.096511167
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:29:16.098101955
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:29:16.100222914
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:29:16.100222914
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:29:16.100222914
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:16.100222914
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:16.100222914
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:29:16.100222914
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:29:16.104537244
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:16.104537244
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:29:16.104537244
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:16.104537244
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:29:16.104537244
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:29:16.105975444
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:29:16.107394503
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:16.107394503
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:16.107394503
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:29:16.107394503
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:29:16.112151335
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:29:16.112151335
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:29:16.112151335
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:29:16.112151335
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:16.112151335
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:16.112151335
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:29:16.117888606
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:29:16.117888606
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:29:16.117888606
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:29:16.117888606
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:16.117888606
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:16.117888606
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:21.007326405
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:29:21.007326405
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:29:21.007326405
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:21.007816227
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:29:21.007816227
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:21.009676127
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:29:21.009676127
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:21.010246134
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:21.010246134
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:21.016944703
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:21.016944703
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:21.019014451
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:29:21.019014451
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:29:21.019014451
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:21.019014451
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:29:21.019805683
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:29:21.019805683
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:29:21.024812757
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:21.024812757
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:29:21.024812757
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:21.028320037
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:21.028320037
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:21.028320037
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:29:21.028320037
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:21.028320037
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:29:21.030181599
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:29:21.033511878
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:29:21.033511878
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:21.033511878
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:29:21.033511878
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:21.033511878
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:21.037093790
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:29:21.037093790
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:21.037093790
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:21.037093790
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:21.037933018
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:21.041595106
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:21.041595106
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:21.041595106
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:21.041595106
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:29:21.041595106
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:21.046340562
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:21.046340562
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:21.046340562
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:29:21.046340562
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:29:26.006136227
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:26.006136227
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:29:26.006136227
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:29:26.006942598
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:26.007099068
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:26.010093547
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:29:26.010093547
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:26.010093547
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:29:26.011781828
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:29:26.011781828
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:29:26.012384243
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:26.012384243
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:26.012384243
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:29:26.012384243
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:26.017246103
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:29:26.019365402
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:26.019365402
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:29:26.019365402
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:26.024314655
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:29:26.024314655
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:29:26.024314655
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:26.026094488
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:26.026817082
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:26.026817082
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:29:26.026817082
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:29:26.026817082
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:26.032020299
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:29:26.032020299
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:29:26.032020299
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:29:26.037208257
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:26.037208257
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:29:26.037208257
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:26.037208257
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:29:26.037208257
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:29:26.042747165
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:26.042747165
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:26.042747165
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:26.043571135
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:29:26.044913900
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:29:26.044913900
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:29:26.044913900
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:29:26.044913900
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:29:26.047752019
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:29:26.047752019
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:26.047752019
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:29:26.047752019
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:26.049689874
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:29:26.049689874
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:26.049689874
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:26.049689874
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:29:26.049689874
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:29:26.049689874
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:29:26.053351962
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:29:26.053351962
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:26.053351962
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:29:26.053351962
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:26.053351962
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:29:26.053351962
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:29:26.060386222
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:26.060386222
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:26.060386222
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:26.060386222
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:29:26.060386222
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:31.006687083
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:29:31.006687083
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:29:31.006687083
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:29:31.008257068
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:31.008813707
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:31.008813707
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:29:31.008813707
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:29:31.008813707
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:31.009803632
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:29:31.011751428
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:31.011751428
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:29:31.011751428
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:29:31.014459426
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:29:31.014459426
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:31.016756282
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:31.016756282
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:29:31.017860225
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:29:31.018966454
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:29:31.018966454
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:29:31.021486361
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:29:31.021486361
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:29:31.021486361
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:31.021486361
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:29:31.021486361
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:29:31.021486361
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:31.024680864
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:29:31.024680864
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:29:31.024680864
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:29:31.024680864
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:31.028838833
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:29:31.028838833
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:31.028838833
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:29:31.031312964
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:31.031770725
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:29:31.036287300
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:31.036287300
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:29:31.036287300
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:31.036287300
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:29:31.038268710
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:29:31.038268710
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:29:31.038268710
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:29:31.039842577
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:29:31.040168445
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:29:31.040168445
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:31.040849651
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:29:31.040849651
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:29:31.045747694
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:29:31.045747694
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:31.045747694
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:29:31.045747694
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:29:31.045747694
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:29:31.050025565
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:31.050025565
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:31.050025565
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:31.050025565
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:29:31.050025565
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:29:36.007478992
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:36.007478992
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:29:36.007478992
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:29:36.007478992
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:36.008767931
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:36.009418390
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:29:36.009418390
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:29:36.009418390
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:29:36.009963821
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:29:36.010713719
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:36.012580715
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:29:36.012580715
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:36.012580715
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:36.012580715
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:29:36.014449879
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:29:36.014612013
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:29:36.014612013
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:29:36.014612013
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:36.017764899
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:29:36.017764899
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:29:36.017764899
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:29:36.021165928
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:29:36.021165928
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:29:36.021165928
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:29:36.022586648
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:36.022866969
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:29:36.023551720
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:36.023551720
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:29:36.023551720
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:36.026443217
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:36.026443217
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:36.026443217
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:29:36.026443217
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:29:36.028894156
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:36.028894156
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:29:36.028894156
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:29:36.028894156
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:29:36.028894156
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:36.031814279
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:36.031814279
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:36.031814279
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:36.031814279
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:29:36.031814279
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:29:36.032836612
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:36.034286189
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:29:36.034286189
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:36.035623243
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:36.036546698
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:29:36.036546698
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:36.036546698
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:29:36.036546698
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:29:36.039474147
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:29:36.039474147
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:29:36.039474147
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:36.039474147
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:36.039474147
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:29:36.039474147
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:29:36.043456668
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:36.043456668
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:36.043456668
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:36.043456668
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:29:36.043456668
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:29:36.043456668
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:29:36.047866432
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:29:36.047866432
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:36.047866432
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:36.047866432
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:29:36.047866432
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:29:36.047866432
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 855.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 2744 and my cost to 855.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 855.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 855.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 855.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 855.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 2071.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 2744 and my cost to 855.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 2071.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 2071.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 2071.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 2071.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 3599.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 3599.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 72 that advertises 3599.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 3599.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:41.006549755
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:41.009231403
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:41.012499105
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:41.018897817
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:41.023996113
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:41.030633648
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:41.043733545
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:41.046792611
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:41.053033419
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:46.006915964
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:46.010125955
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:46.010665721
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:46.013033159
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:46.027053565
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:46.033881860
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:46.071595932
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:46.076850360
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:46.081687367
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:51.007194394
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:51.008211410
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:51.014087553
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:51.019180076
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:51.022088776
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:51.024141375
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:51.027658201
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:51.033487025
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:51.040994305
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 273.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 273.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 273.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 980.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 1518 and my cost to 980.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 980.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 980.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 980.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 980.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1781.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 1518 and my cost to 980.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1781.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 1781.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 1781.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 1781.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 273.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:29:56.010195041
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:29:56.011707195
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:29:56.012267885
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:29:56.014947704
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:29:56.016700564
+DEBUG (0): LQI Root is receiving packet from node 4 @0:29:56.017429208
+DEBUG (0): LQI Root is receiving packet from node 2 @0:29:56.024158295
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:29:56.034784014
+DEBUG (0): LQI Root is receiving packet from node 5 @0:29:56.040750166
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:29:56.043481473
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:29:56.048067016
+DEBUG (0): LQI Root is receiving packet from node 3 @0:29:56.050103749
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:29:56.052232641
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:29:56.057725773
+DEBUG (0): LQI Root is receiving packet from node 6 @0:29:56.062776403
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:30:1.006570678
+DEBUG (0): LQI Root is receiving packet from node 1 @0:30:1.010851165
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:1.017763356
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:30:1.019807904
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:1.023231288
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:1.025913045
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:1.031562538
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:1.032439886
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:30:1.036582650
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:1.063170908
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:1.065875580
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:30:1.069671114
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:1.074435711
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:1.081942991
+DEBUG (0): LQI Root is receiving packet from node 1 @0:30:6.006258296
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:30:6.006769041
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:6.008781299
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:6.011163547
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:6.018287469
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:6.026611063
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:6.031558764
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:30:6.034013754
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:6.034141258
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:6.045730214
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:30:6.046693733
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:6.049811943
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:6.056891980
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:30:6.065736591
+DEBUG (0): LQI Root is receiving packet from node 6 @0:30:6.076616044
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 61 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 1518 and my cost to 980.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 273.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 315.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 1518 and my cost to 980.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 315.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 1331 and my cost to 315.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 315.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 315.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 315.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 315.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 834.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 834.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 834.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 834.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 834.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 315.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 834.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 834.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 273.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 1563.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 834.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 1563.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 273.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 1563.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 1563.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 1563.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 315.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:11.005950783
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:11.008186210
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:11.010118629
+DEBUG (0): LQI Root is receiving packet from node 1 @0:30:11.016161193
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:30:11.022577054
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:11.027459838
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:11.030343732
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:11.034549469
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:11.040109300
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:11.043246928
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:11.049234003
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:11.082940471
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:30:11.084781110
+DEBUG (0): LQI Root is receiving packet from node 6 @0:30:11.093646414
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:30:16.015756415
+DEBUG (0): LQI Root is receiving packet from node 1 @0:30:16.018495774
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:16.023332782
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:16.024936488
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:16.025499399
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:16.028323920
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:16.037574466
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:16.043952602
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:16.046660995
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:16.056708876
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:16.062425453
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:16.070497305
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:16.082963663
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:16.090364133
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:30:16.090364133
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:16.090364133
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:16.090364133
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:16.090364133
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:30:16.090364133
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:16.095002777
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:16.096910115
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:16.098954781
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:16.107362324
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:30:21.008655455
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:21.010637425
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:30:21.016161075
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:30:21.016161075
+DEBUG (0): LQI Root is receiving packet from node 6 @0:30:21.016161075
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:30:21.016161075
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:21.016860753
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:21.021041637
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:21.021041637
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:30:21.021041637
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:21.021041637
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:30:21.024612173
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:30:21.025407847
+DEBUG (0): LQI Root is receiving packet from node 6 @0:30:21.025407847
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:30:21.025407847
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:30:21.025407847
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:21.028800713
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:21.030931496
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:21.030931496
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:21.030931496
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:21.033906943
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:21.033906943
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:30:21.033906943
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:30:21.033906943
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:30:21.034469293
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:21.036211006
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:30:21.039771719
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:30:21.042512849
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:30:21.042512849
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:30:21.042512849
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:21.042512849
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:21.042512849
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:21.042512849
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:21.045364005
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:30:21.045364005
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:30:21.045364005
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:21.047487186
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:21.047487186
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:21.049852284
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:30:21.049852284
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:30:21.049852284
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:21.051734539
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:21.056627147
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:21.056627147
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:30:21.056627147
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:30:21.059236385
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:21.065467369
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:30:21.067888068
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:30:21.076692337
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:21.076692337
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:21.082183248
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:21.087172843
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 315.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 440.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 834.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 440.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 729 and my cost to 440.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 440.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 440.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 440.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 4, my link to 1728 and my cost to 440.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 440.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:26.007814566
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:30:26.009872269
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:26.011798748
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:26.033729273
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:30:26.043021822
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:30:26.057847961
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:30:26.062533925
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:30:26.074836211
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:30:26.080634517
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:30:26.080634517
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:30:26.080634517
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:26.080634517
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:26.082068835
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:26.085242645
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:30:26.102286612
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:30:26.105506198
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:30:26.108054401
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:30:26.112830374
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:30:26.112830374
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:30:26.112830374
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:26.112830374
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:26.112830374
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:30:26.118231954
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:26.118231954
+DEBUG (0): LQI Root is receiving packet from node 6 @0:30:26.119162735
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:26.119162735
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:30:26.119162735
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:26.121482057
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:30:26.124213364
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:30:26.128485800
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:30:26.128485800
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:26.128485800
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:30:26.128485800
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:30:26.128485800
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:26.128485800
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:30:26.131400212
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:30:26.131400212
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:26.131400212
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:30:26.131400212
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:30:26.142844237
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:30:26.142844237
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:26.142844237
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:30:26.142844237
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:26.142844237
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:30:31.006487177
+DEBUG (0): LQI Root is receiving packet from node 1 @0:30:31.006487177
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:30:31.006487177
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:30:31.006854929
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:30:31.008498986
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:31.008498986
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:31.008498986
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:31.008498986
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:30:31.011117770
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:30:31.011117770
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:31.011117770
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:30:31.011117770
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:31.015533247
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:31.015533247
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:31.015533247
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:30:31.015533247
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:30:31.016412539
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:31.018380912
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:30:31.018380912
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:30:31.018380912
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:31.019029710
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:31.019029710
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:30:31.021112219
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:31.021112219
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:31.021112219
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:30:31.021112219
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:30:31.021804572
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:31.025247327
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:31.025247327
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:31.025247327
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:30:31.030587872
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:31.030587872
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:30:31.030587872
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:30:31.030587872
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:30:31.031121926
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:30:31.034827900
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:31.034827900
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:30:31.034827900
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:30:31.034827900
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:31.034827900
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:30:31.039071709
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:31.039071709
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:30:31.039071709
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:30:31.045709243
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:30:31.045709243
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:31.045709243
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:31.045709243
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:30:31.045709243
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:31.045709243
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:30:31.049844351
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:30:31.049844351
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:31.049844351
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:31.049844351
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:31.049844351
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:30:31.051461773
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:30:31.058892760
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:30:31.058892760
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:31.058892760
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:31.058892760
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:30:31.058892760
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:30:36.006702342
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:36.006702342
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:30:36.006702342
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:36.008598194
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:30:36.008598194
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:36.008598194
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:30:36.008598194
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:30:36.010370094
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:36.011642278
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:36.011642278
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:36.011642278
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:36.011642278
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:36.011642278
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:36.014594864
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:36.014594864
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:36.014594864
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:30:36.015329172
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:36.017404355
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:36.017404355
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:36.017404355
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:30:36.017404355
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:30:36.017404355
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:36.020507583
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:36.022439726
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:30:36.022439726
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:30:36.027282446
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:36.027282446
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:36.027282446
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:36.027953828
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:30:36.027953828
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:36.033446960
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:36.033446960
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:36.033446960
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:30:36.033446960
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:30:36.035918870
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:36.035918870
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:36.035918870
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:30:36.035918870
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:36.037307411
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:36.045470816
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:30:36.045470816
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:36.045470816
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:36.045470816
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:36.045470816
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:36.051528520
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:36.051528520
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:36.051528520
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:30:36.051528520
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:36.051528520
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 111 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:41.008270105
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:41.008270105
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:41.008270105
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:41.009391647
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:41.010898484
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:41.010898484
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:30:41.011949673
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:41.015094627
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:41.015094627
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:41.015094627
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:41.015094627
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:30:41.015094627
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:30:41.018495656
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:30:41.018495656
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:41.018495656
+DEBUG (0): LQI Root is receiving packet from node 1 @0:30:41.019975868
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:41.025789314
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:41.025789314
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:41.025789314
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:41.029619366
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:41.034082114
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:41.034082114
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:41.034082114
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:41.034082114
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:30:41.034082114
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:41.035556543
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:41.038820362
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:41.039346365
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:41.039346365
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:30:41.044030786
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:30:41.044030786
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:30:41.044030786
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:41.044030786
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:30:41.044030786
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:41.048740060
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:30:41.049737540
+DEBUG (0): LQI Root is receiving packet from node 6 @0:30:41.051889017
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:30:41.051889017
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:41.051889017
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:30:41.051889017
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:30:41.052377295
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:41.057941056
+DEBUG (0): LQI Root is receiving packet from node 6 @0:30:41.063113756
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 66 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:46.007484309
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:30:46.007484309
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:46.008014590
+DEBUG (0): LQI Root is receiving packet from node 1 @0:30:46.008074082
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:30:46.012773643
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:30:46.012773643
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:30:46.012773643
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:30:46.012773643
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:46.012773643
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:30:46.015435983
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:30:46.015435983
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:46.015435983
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:30:46.015435983
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:30:46.015435983
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:30:46.016574721
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:30:46.020509804
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:46.022005157
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:46.022508694
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:30:46.027711910
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:30:46.027711910
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:30:46.027711910
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:30:46.027711910
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:30:46.027711910
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:30:46.030244855
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:30:46.030244855
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:46.030397442
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:30:46.031671239
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:30:46.035371778
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:30:46.035371778
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:46.035371778
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:30:46.035371778
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:30:46.035371778
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:30:46.035371778
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:30:46.039979905
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:46.039979905
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:46.039979905
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:30:46.039979905
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:30:46.041635170
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:30:46.043634060
+DEBUG (0): LQI Root is receiving packet from node 6 @0:30:46.043634060
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:46.043634060
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:30:46.043634060
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:30:46.043634060
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:30:46.045473037
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:46.047349857
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:46.047349857
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:46.047349857
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:30:46.048730466
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:30:46.048730466
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:46.049302971
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:46.049302971
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:46.049302971
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:46.049302971
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:30:51.006822868
+DEBUG (0): LQI Root is receiving packet from node 1 @0:30:51.006822868
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:30:51.006822868
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:30:51.008104481
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:30:51.008579162
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:51.009979080
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:51.009979080
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:51.009979080
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:51.011222691
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:51.011222691
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:30:51.011926482
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:30:51.011926482
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:30:51.011926482
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:51.014800829
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:51.014800829
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:51.014800829
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:51.014800829
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:30:51.016532718
+DEBUG (0): LQI Root is receiving packet from node 1 @0:30:51.017104893
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:30:51.017104893
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:51.022058258
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:51.022058258
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:30:51.022058258
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:51.022058258
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:51.024478727
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:30:51.024478727
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:51.024478727
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:30:51.025283556
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:51.029514098
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:51.029514098
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:51.029514098
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:30:51.029514098
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:30:51.030780570
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:51.030780570
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:51.032230147
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:30:51.032230147
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:51.033507995
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:51.033507995
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:51.035236111
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:51.035236111
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:30:51.035766283
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:30:51.035766283
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:30:51.035766283
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:30:51.038211557
+DEBUG (0): LQI Root is receiving packet from node 2 @0:30:51.038211557
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:30:51.038211557
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:30:51.038211557
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:30:51.038211557
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:30:51.038211557
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:51.041091569
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:51.041091569
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:30:51.041091569
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:51.041091569
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:51.041656141
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:30:51.044631587
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:30:51.044631587
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:30:51.045139007
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:51.047271343
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:30:51.047271343
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:51.047271343
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:51.047271343
+DEBUG (0): LQI Root is receiving packet from node 5 @0:30:56.008193812
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:56.008193812
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:56.008842334
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:30:56.010257619
+DEBUG (0): LQI Root is receiving packet from node 4 @0:30:56.010257619
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:30:56.010257619
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:30:56.010896823
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:56.010896823
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:56.014320207
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:56.014320207
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:30:56.014320207
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:30:56.014320207
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:56.014320207
+DEBUG (0): LQI Root is receiving packet from node 6 @0:30:56.016328920
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:30:56.016328920
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:30:56.016328920
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:56.017244442
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:30:56.019355578
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:30:56.019355578
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:56.019355578
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:30:56.019355578
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:56.023454733
+DEBUG (0): LQI Root is receiving packet from node 3 @0:30:56.023454733
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:30:56.023454733
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:56.023454733
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:30:56.024370255
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:30:56.024370255
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:30:56.027198550
+DEBUG (0): LQI Root is receiving packet from node 6 @0:30:56.027198550
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:30:56.027198550
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:56.027728830
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:56.033481360
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:30:56.033481360
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:30:56.033481360
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:30:56.034213778
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:30:56.037599548
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:30:56.037599548
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:30:56.037599548
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:30:56.038287851
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 65 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:31:1.006517694
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:31:1.006517694
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:31:1.006517694
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:1.006517694
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:31:1.007758966
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:31:1.007758966
+DEBUG (0): LQI Root is receiving packet from node 4 @0:31:1.009235286
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:31:1.009235286
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:31:1.011413398
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:1.011413398
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:31:1.011413398
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:1.011858121
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:31:1.015231955
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:1.015231955
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:31:1.015231955
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:31:1.015231955
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:31:1.015231955
+DEBUG (0): LQI Root is receiving packet from node 3 @0:31:1.017335994
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:31:1.017335994
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:31:1.017335994
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:31:1.021198107
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:31:1.021198107
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:1.021198107
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:31:1.021198107
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:31:1.021198107
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:31:1.021198107
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:31:1.024478727
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:31:1.024478727
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:1.024478727
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:31:1.024478727
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:1.024478727
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:31:1.028497430
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:1.028497430
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:31:1.028497430
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:31:1.029300476
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:31:1.031101003
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:31:1.031101003
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:1.031101003
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:31:1.031101003
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:31:1.033725499
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:1.033725499
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:31:1.033725499
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:31:1.033725499
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:31:1.035556543
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:1.035913158
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:1.035913158
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:31:1.035913158
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:1.035913158
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:31:1.039081303
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:31:1.039081303
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:1.039081303
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:31:1.039081303
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:31:1.039706910
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:31:1.039706910
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:31:1.043262187
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:31:1.043262187
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:1.043262187
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:1.043262187
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:31:1.043262187
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:31:1.046771688
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:1.046771688
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:31:1.046771688
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:31:1.048251782
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:31:1.048755319
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:1.048755319
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:31:1.048755319
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:31:1.057056052
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:1.057056052
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:1.057056052
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:31:1.057056052
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:1.057056052
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:31:6.008264394
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:31:6.008264394
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:31:6.008264394
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:6.009116990
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:31:6.010970895
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:31:6.010970895
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:31:6.011493574
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:31:6.011493574
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:6.012102379
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:6.015456953
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:31:6.015456953
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:31:6.015456953
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:31:6.015456953
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:31:6.016494545
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:31:6.018038013
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:6.018038013
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:31:6.018038013
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:31:6.018038013
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:31:6.018038013
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:31:6.020568618
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:6.020568618
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:31:6.020568618
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:31:6.020568618
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:31:6.021594833
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:6.023437253
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:31:6.023437253
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:31:6.024848710
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:6.025909163
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:31:6.025909163
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:31:6.025909163
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:31:6.025909163
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:31:6.031268849
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:6.031268849
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:31:6.031268849
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:31:6.032203403
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:6.033271512
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:31:6.033271512
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:31:6.033271512
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:31:6.033271512
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:31:6.034560845
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:31:6.034560845
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:31:6.037391361
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:31:6.037391361
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:31:6.037391361
+DEBUG (0): LQI Root is receiving packet from node 4 @0:31:6.037391361
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:31:6.037391361
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:31:6.042998907
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:31:6.042998907
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:31:6.042998907
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:6.042998907
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:31:6.042998907
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:31:6.046882273
+DEBUG (0): LQI Root is receiving packet from node 4 @0:31:6.046882273
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:31:6.046882273
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:31:6.046882273
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:31:6.047881691
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:31:6.054450588
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:31:6.054450588
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:31:6.054450588
+DEBUG (0): LQI Root is receiving packet from node 4 @0:31:6.054450588
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:31:6.054450588
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:31:6.054450588
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:31:11.007923038
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:11.009004744
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:11.009004744
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:11.010459756
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:31:11.010459756
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:31:11.010459756
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:11.014192702
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:31:11.014192702
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:31:11.019248767
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:31:11.019248767
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:11.019248767
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:31:11.019248767
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:11.023759907
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:31:11.023759907
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:31:11.023759907
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:11.023759907
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:11.024726640
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:31:11.024726640
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:31:11.027076480
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:31:11.027076480
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:11.027076480
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:31:11.027076480
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:31:11.030372359
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:11.030372359
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:31:11.030372359
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:11.031999605
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:31:11.031999605
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:31:11.034522726
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:11.034522726
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:31:11.034522726
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:11.034522726
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:31:11.034522726
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:31:11.036033337
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:31:11.038596799
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:11.038596799
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:11.038596799
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:11.038596799
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:31:11.038596799
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:31:11.041633280
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:31:11.041633280
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:11.041633280
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:31:11.041633280
+DEBUG (0): LQI Root is receiving packet from node 3 @0:31:11.041633280
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:31:11.041633280
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:31:11.047065377
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:11.047065377
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:11.047065377
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:31:11.047065377
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:11.047065377
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 1076.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 1076.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 1076.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 1076.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 1456.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1456.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 1456.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 1076.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 1456.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 1456.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 2125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 1076.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 2125.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 2125.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 65 that advertises 2125.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 90 that advertises 2125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:16.007011290
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:16.011354702
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:16.018938158
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:31:16.021056896
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:16.025277844
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:31:16.026813308
+DEBUG (0): LQI Root is receiving packet from node 4 @0:31:16.032235811
+DEBUG (0): LQI Root is receiving packet from node 4 @0:31:16.036950750
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:31:16.039844238
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:16.043008453
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:16.048089601
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:31:21.011184517
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:21.011476654
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:21.015296764
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:21.016298521
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:21.018976001
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:31:21.024677090
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:21.029062002
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:31:21.031223073
+DEBUG (0): LQI Root is receiving packet from node 3 @0:31:21.036966008
+DEBUG (0): LQI Root is receiving packet from node 4 @0:31:21.042230260
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:31:26.005268024
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:26.006456541
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:26.011110563
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:31:26.012956748
+DEBUG (0): LQI Root is receiving packet from node 4 @0:31:26.018182549
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:26.020118513
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:26.023248437
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:26.028024410
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:31:26.030044270
+DEBUG (0): LQI Root is receiving packet from node 3 @0:31:26.034234701
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:26.043054230
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 63 that advertises 243.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1456.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 243.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 74 that advertises 243.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 243.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 1201.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1456.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 1201.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 1076.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 1201.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 1201.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1201.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 1931.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1456.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1931.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 1931.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 1931.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 1931.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 243.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:31:31.007114327
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:31.009081038
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:31.014787792
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:31:31.025771834
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:31.026918576
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:31:31.040017748
+DEBUG (0): LQI Root is receiving packet from node 4 @0:31:31.042467192
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:31:31.046350109
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:31.051851292
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:31.056978215
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:31.067008498
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:31:31.076453633
+DEBUG (0): LQI Root is receiving packet from node 3 @0:31:31.085013764
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:31:36.009765458
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:31:36.012287026
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:31:36.014230545
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:36.017229184
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:36.021867947
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:36.030382183
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:31:36.033960044
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:36.035758680
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:31:36.042091041
+DEBUG (0): LQI Root is receiving packet from node 3 @0:31:36.055910106
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:36.064271874
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:36.069581901
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:31:41.014001665
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:31:41.015903338
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:41.018678878
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:41.026389839
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:31:41.031730384
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:41.035188792
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:31:41.037582068
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:41.043825098
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:31:41.045501333
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:41.048692623
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:41.063402128
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:41.073427094
+DEBUG (0): LQI Root is receiving packet from node 3 @0:31:41.079530574
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 1076.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 243.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 263.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 263.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 263.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 263.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 263.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:46.006980772
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:46.010042454
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:31:46.017190733
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:31:46.026782791
+DEBUG (0): LQI Root is receiving packet from node 3 @0:31:46.030862528
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:31:46.031457618
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:46.036607733
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:46.041353188
+DEBUG (0): LQI Root is receiving packet from node 4 @0:31:46.045526139
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:31:46.049682217
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:46.059182675
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:31:46.062224869
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:46.067208752
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:46.074777067
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 755.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 755.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 755.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 263.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 755.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 263.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 755.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 755.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 243.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 1367.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 263.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 1367.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 84 that advertises 1367.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 263.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:31:51.007633122
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:51.011466830
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:51.013719683
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:31:51.020080339
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:51.023561544
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:51.029817729
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:31:51.031076150
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:51.033769733
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:31:51.038842828
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:51.043031763
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:31:51.047082526
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:51.053941734
+DEBUG (0): LQI Root is receiving packet from node 3 @0:31:51.069047847
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:31:56.013152889
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:31:56.015201438
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:31:56.017305477
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:31:56.039209037
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:31:56.041389141
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:31:56.047509770
+DEBUG (0): LQI Root is receiving packet from node 2 @0:31:56.050172835
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:31:56.057573186
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:31:56.066995130
+DEBUG (0): LQI Root is receiving packet from node 1 @0:31:56.070176991
+DEBUG (0): LQI Root is receiving packet from node 3 @0:31:56.083345249
+DEBUG (0): LQI Root is receiving packet from node 5 @0:31:56.088914674
+DEBUG (0): LQI Root is receiving packet from node 6 @0:31:56.097657909
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 63 that advertises 144.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 755.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 144.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 263.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 144.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 144.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 144.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 144.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:1.022279931
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:32:1.024574053
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:32:1.032764201
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:32:1.042199742
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:32:1.044313376
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:1.049401849
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:1.052005422
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:32:1.053010835
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:1.055789580
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:1.060794433
+DEBUG (0): LQI Root is receiving packet from node 6 @0:32:1.070392156
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:32:1.075118470
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:32:1.084929814
+DEBUG (0): LQI Root is receiving packet from node 5 @0:32:1.092757527
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 388.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 755.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 388.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 263.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 388.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 106 and my cost to 388.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 388.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 388.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 144.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 1118.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 755.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1118.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 106 and my cost to 388.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 1118.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 263.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 1118.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 1118.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 144.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:6.006700799
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:32:6.011382880
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:32:6.019197556
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:32:6.022790676
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:32:6.025928304
+DEBUG (0): LQI Root is receiving packet from node 5 @0:32:6.026788455
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:32:6.038232480
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:6.055749468
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:32:6.058673474
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:32:6.066504961
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:32:6.075461818
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:32:6.076972429
+DEBUG (0): LQI Root is receiving packet from node 4 @0:32:6.081977283
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:6.085883510
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:32:6.088187574
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:32:6.092887253
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:6.106330168
+DEBUG (0): LQI Root is receiving packet from node 6 @0:32:6.112647270
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:32:11.005975589
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:32:11.007921377
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:32:11.014205740
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:11.017076715
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:32:11.020370254
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:11.024950204
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:32:11.031497729
+DEBUG (0): LQI Root is receiving packet from node 5 @0:32:11.033754474
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:32:11.038226816
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:32:11.040702499
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:32:11.048301332
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:32:11.050498585
+DEBUG (0): LQI Root is receiving packet from node 4 @0:32:11.053229892
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:32:11.056403702
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:11.060828725
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:11.067939279
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:32:11.076011131
+DEBUG (0): LQI Root is receiving packet from node 6 @0:32:11.083716775
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:16.006639764
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:32:16.007333613
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:32:16.008552418
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:32:16.010593310
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:16.013009849
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:16.013969257
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:32:16.019672237
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:32:16.024156633
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:16.029487355
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:32:16.032899868
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:32:16.043079083
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:32:16.048356932
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:32:16.051131794
+DEBUG (0): LQI Root is receiving packet from node 4 @0:32:16.055469147
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:32:16.064225980
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:32:16.072465678
+DEBUG (0): LQI Root is receiving packet from node 6 @0:32:16.077089064
+DEBUG (0): LQI Root is receiving packet from node 5 @0:32:16.085267727
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 755.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 106 and my cost to 388.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 263.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 88 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 144.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 186.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 186.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 186.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 106 and my cost to 388.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 186.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 186.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 186.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 494.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 5, my link to 790 and my cost to 494.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 494.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 5, my link to 106 and my cost to 494.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 494.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 186.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 494.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 494.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 144.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 1284.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 106 and my cost to 494.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 1284.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 106 and my cost to 388.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 1284.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 90 that advertises 1284.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 186.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:32:21.007133359
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:21.010378145
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:32:21.015415059
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:21.018258842
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:32:21.019931635
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:21.024484392
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:32:21.025476207
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:21.033502283
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:32:21.039697316
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:32:21.041597327
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:32:21.043670289
+DEBUG (0): LQI Root is receiving packet from node 4 @0:32:21.044717428
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:32:21.048555295
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:32:21.060792772
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:32:21.064439601
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:32:21.075532676
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:32:21.076829666
+DEBUG (0): LQI Root is receiving packet from node 6 @0:32:21.083940220
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:32:21.088243173
+DEBUG (0): LQI Root is receiving packet from node 5 @0:32:21.095628384
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:26.007784166
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:32:26.011619417
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:32:26.014789453
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:32:26.018358327
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:26.022302398
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:26.029992782
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:32:26.031986008
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:32:26.037431702
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:32:26.040673872
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:32:26.045226677
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:32:26.051681107
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:26.061937175
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:26.067086682
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:32:26.071877914
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:32:26.086198508
+DEBUG (0): LQI Root is receiving packet from node 4 @0:32:26.088357310
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:32:26.091004998
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:32:26.101090999
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:32:26.101090999
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:32:26.101090999
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:32:26.101090999
+DEBUG (0): LQI Root is receiving packet from node 5 @0:32:26.110353030
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:32:26.117753499
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:31.006584046
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:31.006584046
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:32:31.006584046
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:32:31.006584046
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:32:31.007257319
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:31.009249002
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:32:31.011962711
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:31.014116527
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:32:31.014200028
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:32:31.018142484
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:32:31.022447659
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:32:31.025667245
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:32:31.025667245
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:32:31.025667245
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:31.025667245
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:31.025667245
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:32:31.025667245
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:32:31.027862276
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:31.027862276
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:32:31.027862276
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:32:31.027862276
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:31.027862276
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:32:31.027862276
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:32:31.030962014
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:32:31.032365814
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:32:31.033693321
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:31.033693321
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:32:31.033693321
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:31.033693321
+DEBUG (0): LQI Root is receiving packet from node 6 @0:32:31.036790837
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:32:31.036790837
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:32:31.036790837
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:32:31.036790837
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:32:31.037843687
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:31.043443630
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:32:31.043443630
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:32:31.048448484
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:32:31.048448484
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:32:31.048448484
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:31.048448484
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:32:31.048448484
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:32:31.048448484
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:32:31.051650589
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:32:31.051650589
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:32:31.051650589
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:32:31.051650589
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:31.051650589
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:32:31.054857138
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:32:31.054857138
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:32:31.054857138
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:31.054857138
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:32:31.054857138
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:32:31.056169386
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:32:31.058730626
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:32:31.058730626
+DEBUG (0): LQI Root is receiving packet from node 6 @0:32:31.058730626
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:32:31.058730626
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:32:31.058730626
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:32:31.059480524
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:32:31.065536006
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:32:31.065536006
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:32:31.066896252
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:32:31.066896252
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 59 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:36.007280629
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:32:36.007280629
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:32:36.007280629
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:32:36.007881036
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:32:36.010665721
+DEBUG (0): LQI Root is receiving packet from node 5 @0:32:36.010665721
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:32:36.010665721
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:32:36.011667084
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:32:36.014175222
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:32:36.014175222
+DEBUG (0): LQI Root is receiving packet from node 5 @0:32:36.014175222
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:32:36.014175222
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:32:36.014175222
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:36.017259701
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:32:36.017259701
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:32:36.018060479
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:36.019332663
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:36.019332663
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:32:36.019332663
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:32:36.019332663
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:32:36.023256370
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:32:36.023256370
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:32:36.023256370
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:32:36.023256370
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:36.023256370
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:32:36.023256370
+DEBUG (0): LQI Root is receiving packet from node 5 @0:32:36.027475097
+DEBUG (0): LQI Root is receiving packet from node 5 @0:32:36.029367176
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:36.029695541
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:32:36.029695541
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:32:36.029695541
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:32:36.030702616
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:32:36.035415333
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:36.035415333
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:32:36.035415333
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:32:36.035415333
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:32:36.039621022
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:32:36.039621022
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:32:36.039621022
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:36.039621022
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:36.039621022
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:32:36.039621022
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:32:36.045030535
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:32:36.045030535
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:32:36.045030535
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:36.045030535
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:32:36.045030535
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:32:36.046716318
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:41.007028439
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:32:41.009081156
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:41.009081156
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:32:41.009081156
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:32:41.009081156
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:32:41.014436960
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:41.014436960
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:32:41.014436960
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:32:41.014436960
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:32:41.015688173
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:32:41.019182415
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:32:41.019182415
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:32:41.019182415
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:41.019182415
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:32:41.019182415
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:32:41.020937166
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:32:41.024461926
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:32:41.024461926
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:32:41.024461926
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:41.024461926
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:32:41.024461926
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:32:41.024461926
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:32:41.033784991
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:32:41.033784991
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:41.033784991
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:32:41.033784991
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:32:41.033784991
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:46.009208542
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 73 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 2197.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 790 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 2197.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 34 and my cost to 2197.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 2197.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 2197.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 2197.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 561 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 2987.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 34 and my cost to 2197.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 2987.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 2987.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:51.006807610
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:32:51.010332251
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:32:51.019561543
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:32:51.023217920
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:51.026878117
+DEBUG (0): LQI Root is receiving packet from node 4 @0:32:51.043109600
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:51.058765026
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:51.065494113
+DEBUG (0): LQI Root is receiving packet from node 5 @0:32:51.073337085
+DEBUG (0): LQI Root is receiving packet from node 1 @0:32:56.006593988
+DEBUG (0): LQI Root is receiving packet from node 3 @0:32:56.010307169
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:32:56.015390206
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:32:56.019685834
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:32:56.023696651
+DEBUG (0): LQI Root is receiving packet from node 2 @0:32:56.026675980
+DEBUG (0): LQI Root is receiving packet from node 4 @0:32:56.034305330
+DEBUG (0): LQI Root is receiving packet from node 6 @0:32:56.040652949
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:33:1.006891111
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:1.011306587
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:1.013831929
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:1.016940929
+DEBUG (0): LQI Root is receiving packet from node 2 @0:33:1.022571390
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:1.027544183
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:1.031680834
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:1.034029012
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:1.039110159
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 273.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 34 and my cost to 2197.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 273.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 273.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 273.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 1518.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 790 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 34 and my cost to 2197.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1518.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 273.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:6.009538917
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:6.012743126
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:6.015445577
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:33:6.019952558
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:6.026229595
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:6.028857974
+DEBUG (0): LQI Root is receiving packet from node 2 @0:33:6.034045932
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:6.058036382
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:6.067523520
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:6.076236238
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:6.078296162
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:6.087253019
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 103 that advertises 2231.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 790 and my cost to 2197.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2231.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 2231.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 2231.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 2231.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 273.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:11.008943828
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:11.011024328
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:33:11.015756415
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:11.018312551
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:11.027511326
+DEBUG (0): LQI Root is receiving packet from node 2 @0:33:11.032342622
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:11.037921642
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:11.042560287
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:33:11.050632139
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:11.055179232
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:11.058230972
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:11.064059795
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:16.007952012
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:16.010347510
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:16.012885889
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:33:16.018380912
+DEBUG (0): LQI Root is receiving packet from node 2 @0:33:16.026468023
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:16.032275923
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:16.033126528
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:33:16.036548359
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:16.041873645
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:16.042697615
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:16.050876278
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:16.060138309
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 273.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:21.007524769
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:21.010362769
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:21.012420472
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:21.018852041
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:33:21.023746310
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:33:21.026468023
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:21.029666685
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:21.032901530
+DEBUG (0): LQI Root is receiving packet from node 2 @0:33:21.035449733
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:21.037921642
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:21.045825649
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:21.054889316
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 293.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 790 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 293.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 34 and my cost to 2197.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 293.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 293.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 293.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 293.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 942.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 942.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 942.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 942.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 942.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 293.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 942.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 942.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 273.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 1611.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 942.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 1611.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 62 that advertises 1611.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 1611.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 273.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:26.006320874
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:26.010362887
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:33:26.017938409
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:33:26.018455315
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:26.019853680
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:26.020784579
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:26.024284138
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:26.027618137
+DEBUG (0): LQI Root is receiving packet from node 2 @0:33:26.041139685
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:33:26.042772247
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:26.049135243
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:26.050828841
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:26.057084908
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:26.057084908
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:26.057084908
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:33:26.057084908
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:26.057084908
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:26.063325716
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:26.065751850
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:26.074861293
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:33:26.074861293
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:26.074861293
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:26.074861293
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:26.074861293
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:33:26.074861293
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:26.082246504
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:31.009738823
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:33:31.009738823
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:31.009738823
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:33:31.012382352
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:31.012382352
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:33:31.012382352
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:33:31.012382352
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:31.012382352
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:33:31.016862975
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:31.016862975
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:33:31.017951778
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:31.019317404
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:31.021873263
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:33:31.021873263
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:31.021873263
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:31.021873263
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:33:31.021873263
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:33:31.022926114
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:31.026000715
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:33:31.026000715
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:31.026000715
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:33:31.031966866
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:31.033195219
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:31.033195219
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:33:31.033195219
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:33:31.033195219
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:33:31.036315596
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:31.040778793
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:31.040778793
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:31.040778793
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:31.040778793
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:31.040778793
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:33:31.045676835
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:31.045676835
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:31.046149855
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:31.056090871
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:33:31.056090871
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:31.056090871
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:31.056090871
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:33:31.056090871
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:33:31.056090871
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:33:31.059829253
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:33:31.059829253
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:31.059829253
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:31.059829253
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:33:31.059829253
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:31.065383419
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:33:31.065383419
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:31.065383419
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:33:31.065383419
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:33:31.065383419
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:31.078673747
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:33:31.078673747
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:31.078673747
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:31.078673747
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:33:31.078673747
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:33:31.078673747
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:33:36.008567677
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:36.009708306
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:33:36.009708306
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:33:36.011598723
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:33:36.011598723
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:36.011598723
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:36.012529622
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:33:36.012529622
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:33:36.018373586
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:36.019962152
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:33:36.020357217
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:36.020357217
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:33:36.022356107
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:36.022356107
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:33:36.022356107
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:33:36.022356107
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:33:36.022875021
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:33:36.024522842
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:36.024522842
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:33:36.024522842
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:33:36.026630204
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:36.026630204
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:33:36.026630204
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:33:36.026630204
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:33:36.026630204
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:33:36.028703844
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:36.028703844
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:36.028703844
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:33:36.028703844
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:36.030015974
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:33:36.033266077
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:36.033266077
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:33:36.033266077
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:33:36.033266077
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:36.034198519
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:36.035173533
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:33:36.035173533
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:36.036868792
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:33:36.036868792
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:36.037355409
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:36.037355409
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:33:36.041995715
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:36.041995715
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:33:36.041995715
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:36.043185893
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:33:36.043185893
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:33:36.047992384
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:33:36.047992384
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:36.047992384
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:33:36.047992384
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:36.047992384
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:33:36.049976015
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:33:36.049976015
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:36.049976015
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:33:36.049976015
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:33:36.049976015
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 62 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 93 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:33:41.006532835
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:33:41.006532835
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:33:41.006532835
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:41.008487610
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:41.008487610
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:33:41.008487610
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:33:41.008487610
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:41.009597612
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:33:41.010454439
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:41.010454439
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:33:41.010454439
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:33:41.011039586
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:41.011039586
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:41.014362209
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:33:41.014362209
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:41.015243331
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:41.015415059
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:33:41.016631873
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:41.016631873
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:41.018678878
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:33:41.018678878
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:33:41.020999744
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:41.020999744
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:33:41.020999744
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:41.020999744
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:33:41.020999744
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:41.024482501
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:41.024482501
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:41.024482501
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:41.025008899
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:33:41.026933835
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:33:41.026933835
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:33:41.026933835
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:41.026933835
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:41.030444879
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:41.030444879
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:33:41.030444879
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:33:41.032350673
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:41.032350673
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:33:41.032350673
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:33:41.034853100
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:41.034853100
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:33:41.034853100
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:41.034853100
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:33:41.034853100
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:41.036455264
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:41.039049243
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:41.039049243
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:33:41.039049243
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:33:41.039049243
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:41.039598556
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:41.042009431
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:33:41.042009431
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:41.042009431
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:41.042009431
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:41.042009431
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:41.043916768
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:41.043916768
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:41.043916768
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:33:41.043916768
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:41.043916768
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:41.049119985
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:41.049119985
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:41.049119985
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:33:41.049119985
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:41.049119985
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:41.049882920
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:41.055788037
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:41.055788037
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:41.055788037
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:41.055788037
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:46.005851628
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:33:46.005851628
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:33:46.005851628
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:33:46.005851628
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:33:46.008150375
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:46.008150375
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:33:46.008150375
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:46.008960629
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:33:46.008960629
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:33:46.008960629
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:46.010866306
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:46.010866306
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:33:46.010866306
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:46.012115298
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:33:46.012115298
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:46.015032049
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:46.015032049
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:33:46.015032049
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:33:46.015032049
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:33:46.015032049
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:33:46.016406875
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:46.017413949
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:46.017413949
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:33:46.017413949
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:46.017413949
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:33:46.018314212
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:33:46.020311559
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:46.020311559
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:46.020311559
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:33:46.020311559
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:46.022861305
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:46.022861305
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:33:46.022861305
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:46.022861305
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:46.022861305
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:33:46.024431408
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:46.026628661
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:46.026628661
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:33:46.026628661
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:33:46.027576243
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:33:46.027576243
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:46.032167451
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:33:46.032167451
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:46.033220419
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:46.034946195
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:46.034946195
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:33:46.034946195
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:33:46.034946195
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:46.034946195
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:33:46.038745612
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:46.038745612
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:33:46.038745612
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:46.038745612
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:33:46.038745612
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:33:46.042009312
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:46.042422958
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:33:46.043918311
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:46.043918311
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:33:46.043918311
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:33:46.049608145
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:46.049608145
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:33:46.050571104
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:33:46.050571104
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:46.052905685
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:33:46.052905685
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:46.052905685
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:33:46.052905685
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:33:46.052905685
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:33:46.058932872
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:33:46.058932872
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:33:46.058932872
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:46.058932872
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:46.058932872
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:33:46.058932872
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:33:46.063205308
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:33:46.063205308
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:33:46.063205308
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:46.063205308
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:33:46.063205308
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:46.063205308
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:33:51.006189210
+DEBUG (0): LQI Root is receiving packet from node 2 @0:33:51.006189210
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:33:51.006189210
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:51.007358466
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:33:51.007358466
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:33:51.008409773
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:51.008409773
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:33:51.008409773
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:51.010637425
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:33:51.010637425
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:51.010637425
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:33:51.011466830
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:51.012695128
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:51.012695128
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:51.012695128
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:33:51.012695128
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:51.015154000
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:33:51.015154000
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:33:51.015154000
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:33:51.015245671
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:51.017625910
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:33:51.017625910
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:33:51.017625910
+DEBUG (0): LQI Root is receiving packet from node 2 @0:33:51.017738156
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:33:51.019731610
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:51.019731610
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:33:51.019731610
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:33:51.019731610
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:33:51.021394927
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:51.022340848
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:51.022340848
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:33:51.022340848
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:33:51.022340848
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:51.025240001
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:33:51.025240001
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:51.025240001
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:51.025240001
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:51.025240001
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:51.030077127
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:33:51.030077127
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:51.030077127
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:33:51.032564177
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:33:51.032564177
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:51.032564177
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:33:51.032564177
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:51.032564177
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:33:51.033286771
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:33:51.035463448
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:51.035463448
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:33:51.035463448
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:33:51.035463448
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:51.035463448
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:33:51.035463448
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:51.038146640
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:51.038146640
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:33:51.038146640
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:33:51.038146640
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:33:51.039628955
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:33:51.041048132
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:51.041048132
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:33:51.041048132
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:33:51.041048132
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:33:51.041048132
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:33:51.043616911
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:33:51.043616911
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:33:51.043616911
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:51.043616911
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:33:51.043616911
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:33:51.045473155
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:51.046386338
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:33:51.046386338
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:33:51.047716066
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:33:51.047716066
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:33:51.047736760
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:51.050155237
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:51.050155237
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:51.050155237
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:51.050155237
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:33:51.052314370
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:33:51.052314370
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:33:51.052314370
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:51.052314370
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:33:51.052314370
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:51.058761144
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:51.058761144
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:51.058761144
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:51.058761144
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:33:51.058761144
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:51.065886957
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:51.065886957
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:51.065886957
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:51.065886957
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:33:51.065886957
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:51.065886957
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:51.071319054
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:33:51.071319054
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:51.071319054
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:51.071319054
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:51.071319054
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:51.071319054
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:33:51.081191433
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:33:51.081191433
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:33:51.081191433
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:51.081191433
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:33:51.081191433
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:33:51.081191433
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 1076.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 1076.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 1728.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 1728.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 2340.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 2340.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:33:56.007236396
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:33:56.009294660
+DEBUG (0): LQI Root is receiving packet from node 6 @0:33:56.012697350
+DEBUG (0): LQI Root is receiving packet from node 3 @0:33:56.015724007
+DEBUG (0): LQI Root is receiving packet from node 5 @0:33:56.018462917
+DEBUG (0): LQI Root is receiving packet from node 2 @0:33:56.024789566
+DEBUG (0): LQI Root is receiving packet from node 1 @0:33:56.038759327
+DEBUG (0): LQI Root is receiving packet from node 1 @0:34:1.006182003
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:34:1.009615092
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:1.011855900
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:1.015933855
+DEBUG (0): LQI Root is receiving packet from node 2 @0:34:1.018167290
+DEBUG (0): LQI Root is receiving packet from node 3 @0:34:1.026313545
+DEBUG (0): LQI Root is receiving packet from node 6 @0:34:1.035907494
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:34:6.011644499
+DEBUG (0): LQI Root is receiving packet from node 1 @0:34:6.016695247
+DEBUG (0): LQI Root is receiving packet from node 2 @0:34:6.019281175
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:6.029082972
+DEBUG (0): LQI Root is receiving packet from node 3 @0:34:6.037009894
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:6.045322111
+DEBUG (0): LQI Root is receiving packet from node 6 @0:34:6.059863653
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 343.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 343.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 343.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 1241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 1241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 1241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1241.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 2197.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2197.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 2197.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 2197.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 343.
+DEBUG (0): LQI Root is receiving packet from node 3 @0:34:11.005943181
+DEBUG (0): LQI Root is receiving packet from node 1 @0:34:11.010774872
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:11.016189371
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:34:11.018197807
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:34:11.030109188
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:34:11.032350555
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:34:11.039949388
+DEBUG (0): LQI Root is receiving packet from node 6 @0:34:11.042092931
+DEBUG (0): LQI Root is receiving packet from node 6 @0:34:11.051553325
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:11.059091123
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:16.007552946
+DEBUG (0): LQI Root is receiving packet from node 3 @0:34:16.009574751
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:34:16.010415870
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:34:16.015260811
+DEBUG (0): LQI Root is receiving packet from node 1 @0:34:16.017229302
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:34:16.019702754
+DEBUG (0): LQI Root is receiving packet from node 2 @0:34:16.026506591
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:34:16.028995302
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:16.031465669
+DEBUG (0): LQI Root is receiving packet from node 6 @0:34:16.036760438
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:34:21.005603715
+DEBUG (0): LQI Root is receiving packet from node 1 @0:34:21.008196151
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:21.012969785
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:34:21.016595644
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:21.019273968
+DEBUG (0): LQI Root is receiving packet from node 2 @0:34:21.023348040
+DEBUG (0): LQI Root is receiving packet from node 3 @0:34:21.025260695
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:34:21.034349445
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:34:21.041246377
+DEBUG (0): LQI Root is receiving packet from node 6 @0:34:21.050676254
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 370.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 370.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 370.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 370.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 370.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 370.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 370.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:34:26.007968814
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:34:26.015352363
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:34:26.016067301
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:26.020830355
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:26.025230177
+DEBUG (0): LQI Root is receiving packet from node 1 @0:34:26.026735472
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:34:26.029237780
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:34:26.032724090
+DEBUG (0): LQI Root is receiving packet from node 6 @0:34:26.039384816
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:34:26.041253703
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:26.048540036
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:34:26.049844351
+DEBUG (0): LQI Root is receiving packet from node 2 @0:34:26.054521446
+DEBUG (0): LQI Root is receiving packet from node 3 @0:34:26.064531154
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 98 that advertises 1072.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 1072.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1072.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 370.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 1072.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 370.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 1072.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 1072.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 343.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 104 that advertises 1584.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 370.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 1584.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 343.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 72 that advertises 1584.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 1584.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 1584.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 370.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:34:31.005639897
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:31.006431459
+DEBUG (0): LQI Root is receiving packet from node 1 @0:34:31.008745465
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:34:31.009921927
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:34:31.011766569
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:34:31.015739266
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:34:31.017669465
+DEBUG (0): LQI Root is receiving packet from node 2 @0:34:31.024751841
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:31.028734362
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:34:31.031295484
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:31.037398964
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:34:31.038393000
+DEBUG (0): LQI Root is receiving packet from node 6 @0:34:31.047059942
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:34:36.008498986
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:34:36.015628681
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:34:36.016603577
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:36.027457948
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:36.034685255
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:34:36.036828680
+DEBUG (0): LQI Root is receiving packet from node 1 @0:34:36.043367455
+DEBUG (0): LQI Root is receiving packet from node 1 @0:34:36.046640024
+DEBUG (0): LQI Root is receiving packet from node 2 @0:34:36.051851292
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:34:36.054643516
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:34:36.056954905
+DEBUG (0): LQI Root is receiving packet from node 6 @0:34:36.064210721
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:34:36.065591329
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:34:36.072778177
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:34:36.080331234
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:34:36.080331234
+DEBUG (0): LQI Root is receiving packet from node 3 @0:34:36.080331234
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:34:36.080331234
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:36.080331234
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:34:36.084939361
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:34:36.087273942
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:36.095666227
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 67 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 1072.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 370.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:34:41.007128042
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:34:41.008483727
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:34:41.009830375
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:34:41.016021525
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:34:41.016021525
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:41.016021525
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:34:41.016021525
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:34:41.019075486
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:34:41.021095070
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:34:41.024001825
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:34:41.024902088
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:34:41.033446960
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:34:41.033446960
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:34:41.033446960
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:34:41.035491626
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:34:41.038055088
+DEBUG (0): LQI Root is receiving packet from node 6 @0:34:41.038055088
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:34:41.038055088
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:41.046943308
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:34:41.053351962
+DEBUG (0): LQI Root is receiving packet from node 3 @0:34:41.053351962
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:34:41.053351962
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:34:41.053351962
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:34:41.053351962
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:34:41.053351962
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:34:41.055877249
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:34:41.061561142
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:41.061561142
+DEBUG (0): LQI Root is receiving packet from node 3 @0:34:41.061561142
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:34:41.061561142
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:34:41.063025977
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:34:41.068107124
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:34:41.071906541
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:41.075339748
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:41.078200727
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:41.084037207
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:41.100074101
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:34:41.110816226
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:41.114646159
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 495.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 1155 and my cost to 495.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 495.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 370.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 495.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 495.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 495.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 4, my link to 2457 and my cost to 495.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 495.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 1370.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 1155 and my cost to 495.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1370.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 495.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 1370.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 370.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 1370.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 4, my link to 2457 and my cost to 495.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 1370.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:34:46.006341797
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:46.007087583
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:34:46.009096296
+DEBUG (0): LQI Root is receiving packet from node 3 @0:34:46.010734412
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:34:46.013431428
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:34:46.017046079
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:34:46.020357335
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:34:46.025377329
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:34:46.029739096
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:34:46.034013754
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:34:46.038070346
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:34:46.040834392
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:34:46.040834392
+DEBUG (0): LQI Root is receiving packet from node 2 @0:34:46.040834392
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:34:46.040834392
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:34:46.040834392
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:34:46.047120977
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:34:46.050981428
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:34:46.050981428
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:34:46.053331268
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:34:46.061693035
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:34:46.061693035
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:34:46.061693035
+DEBUG (0): LQI Root is receiving packet from node 2 @0:34:46.061693035
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:34:46.061693035
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:34:46.061693035
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:34:46.064225980
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:34:46.066896252
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:34:46.073793184
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:34:46.079866147
+DEBUG (0): LQI Root is receiving packet from node 2 @0:34:46.079866147
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:34:46.079866147
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:34:46.079866147
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:34:46.080415460
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:34:46.090760859
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:34:46.090760859
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:34:46.090760859
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:46.090760859
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:34:46.090760859
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:34:46.090760859
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:34:46.099076850
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:34:46.099076850
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:34:46.099076850
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:34:46.099076850
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:34:46.100480651
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:34:46.108903453
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:34:46.108903453
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:34:46.108903453
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:34:46.108903453
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:34:46.108903453
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:46.108903453
+DEBUG (0): LQI Root is receiving packet from node 1 @0:34:51.006822868
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:34:51.006822868
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:34:51.008117518
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:51.009006405
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:34:51.009006405
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:34:51.010032512
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:34:51.010032512
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:51.014205740
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:34:51.015113659
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:34:51.015113659
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:51.016254288
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:34:51.016254288
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:34:51.016254288
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:34:51.021041637
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:51.021041637
+DEBUG (0): LQI Root is receiving packet from node 3 @0:34:51.021041637
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:34:51.021041637
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:34:51.022239472
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:34:51.025378991
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:34:51.025378991
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:34:51.025378991
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:34:51.025378991
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:51.025378991
+DEBUG (0): LQI Root is receiving packet from node 3 @0:34:51.030151081
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:34:51.030151081
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:34:51.030151081
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:34:51.030746170
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:34:51.032336958
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:51.032336958
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:34:51.032336958
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:34:51.032336958
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:34:51.032336958
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:34:51.034747832
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:34:51.034747832
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:34:51.034747832
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:51.034747832
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:34:51.034747832
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:34:51.037398964
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:34:51.037398964
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:34:51.037398964
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:51.037398964
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:34:51.037398964
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:34:51.039931908
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:34:51.039931908
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:34:51.039931908
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:34:51.041919421
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:34:51.041919421
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:51.041919421
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:34:51.041919421
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:34:51.041919421
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:34:51.041919421
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:34:51.045364005
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:34:51.045364005
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:34:51.045364005
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:34:51.045364005
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:34:51.046371079
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:34:51.048324193
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:34:51.048324193
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:34:51.048324193
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:34:51.048324193
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:34:51.048324193
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:34:51.051757400
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:34:51.051757400
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:34:51.051757400
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:34:51.051757400
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:34:51.059051059
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:34:51.059051059
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:34:51.059051059
+DEBUG (0): LQI Root is receiving packet from node 4 @0:34:51.059051059
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:34:51.059051059
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:34:51.059051059
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:34:56.006622166
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:34:56.006622166
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:34:56.006622166
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:34:56.006622166
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:34:56.006622166
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:34:56.009081038
+DEBUG (0): LQI Root is receiving packet from node 1 @0:34:56.009477882
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:56.016624271
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:34:56.017434872
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:34:56.018831347
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:34:56.018831347
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:34:56.018831347
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:34:56.023927753
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:34:56.023927753
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:34:56.023927753
+DEBUG (0): LQI Root is receiving packet from node 5 @0:34:56.023927753
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:34:56.023927753
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:34:56.023927753
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 61 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 5131 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 790.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 2598 and my cost to 790.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 790.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 790.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 790.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 790.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 790.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 1402.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1402.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 1402.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 1402.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 1402.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 1402.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 2257.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 2257.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 2257.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 77 that advertises 2257.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:35:1.008416981
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:1.009528975
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:35:1.011569867
+DEBUG (0): LQI Root is receiving packet from node 1 @0:35:1.016313780
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:35:1.019365402
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:35:1.022689577
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:1.034400656
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:35:1.036378852
+DEBUG (0): LQI Root is receiving packet from node 5 @0:35:1.043616911
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:1.052253335
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:6.006065250
+DEBUG (0): LQI Root is receiving packet from node 1 @0:35:6.008425032
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:35:6.014892381
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:35:6.017168149
+DEBUG (0): LQI Root is receiving packet from node 2 @0:35:6.022104034
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:35:6.025119593
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:6.028787345
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:35:6.038913457
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:6.075280604
+DEBUG (0): LQI Root is receiving packet from node 5 @0:35:6.084222202
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:6.089669558
+DEBUG (0): LQI Root is receiving packet from node 2 @0:35:11.007287837
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:35:11.014604687
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:11.018623160
+DEBUG (0): LQI Root is receiving packet from node 1 @0:35:11.021196564
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:11.023353357
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:35:11.028110298
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:35:11.031402295
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:11.040759760
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:35:11.043277446
+DEBUG (0): LQI Root is receiving packet from node 5 @0:35:11.046985310
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:11.051684989
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 189.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 189.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 189.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 189.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 189.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 790.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 915.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1402.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 915.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 790.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 915.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 915.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 915.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 1580.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1402.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1580.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 1580.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 1580.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 189.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:35:16.005832596
+DEBUG (0): LQI Root is receiving packet from node 1 @0:35:16.010149265
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:16.012870630
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:35:16.016015813
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:16.019945350
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:35:16.024202409
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:35:16.026162849
+DEBUG (0): LQI Root is receiving packet from node 2 @0:35:16.028780138
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:16.040697182
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:35:16.048110571
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:35:16.053130683
+DEBUG (0): LQI Root is receiving packet from node 5 @0:35:16.062774182
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:35:16.064805810
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:16.074220428
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:21.010322428
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:35:21.014896264
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:35:21.020479287
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:21.026491333
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:35:21.038766535
+DEBUG (0): LQI Root is receiving packet from node 1 @0:35:21.041917878
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:35:21.042695954
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:35:21.051070759
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:35:21.053643767
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:21.056108469
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:35:21.073724217
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:21.078416689
+DEBUG (0): LQI Root is receiving packet from node 5 @0:35:21.083558871
+DEBUG (0): LQI Root is receiving packet from node 2 @0:35:21.092469951
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:26.008720264
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:35:26.013406575
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:35:26.016540321
+DEBUG (0): LQI Root is receiving packet from node 1 @0:35:26.018831465
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:35:26.022256621
+DEBUG (0): LQI Root is receiving packet from node 2 @0:35:26.024843393
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:35:26.025796640
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:35:26.032243744
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:26.034120683
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:35:26.034946195
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:35:26.064197123
+DEBUG (0): LQI Root is receiving packet from node 5 @0:35:26.068742673
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:26.075349690
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:26.085435691
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 65 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1402.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 216.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 1241 and my cost to 216.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 216.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 216.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 216.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 701.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 701.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 701.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 701.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 701.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 701.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 701.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 189.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 1430.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 701.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 1430.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 189.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 1430.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 189.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:35:31.006793894
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:35:31.011324067
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:31.014320207
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:31.019029828
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:35:31.022768092
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:35:31.033172304
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:31.035112498
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:35:31.043847682
+DEBUG (0): LQI Root is receiving packet from node 1 @0:35:31.047090578
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:35:31.050857137
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:35:31.054055752
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:31.057237613
+DEBUG (0): LQI Root is receiving packet from node 5 @0:35:31.067109992
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:35:36.008148036
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:36.016578495
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:35:36.021518539
+DEBUG (0): LQI Root is receiving packet from node 5 @0:35:36.030916356
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:35:36.034204184
+DEBUG (0): LQI Root is receiving packet from node 1 @0:35:36.039201830
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:35:36.041170084
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:35:36.049050899
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:36.052492157
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:35:36.062549184
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:35:36.092105286
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:36.094163667
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:36.102555952
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:36.110353148
+DEBUG (0): LQI Root is receiving packet from node 1 @0:35:41.007204336
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:35:41.011575531
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:41.017661862
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:35:41.022890161
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:35:41.027591502
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:35:41.029601768
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:35:41.035236111
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:41.040933270
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:41.044732687
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:35:41.054340003
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:41.084786774
+DEBUG (0): LQI Root is receiving packet from node 5 @0:35:41.093743631
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:35:41.094672521
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:41.102713856
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 144.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 701.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 144.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 144.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 144.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 341.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 701.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 341.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 216 and my cost to 341.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 341.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 341.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:35:46.007051749
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:35:46.009097958
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:35:46.009857010
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:35:46.013994339
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:35:46.016502201
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:35:46.017425325
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:35:46.020364543
+DEBUG (0): LQI Root is receiving packet from node 2 @0:35:46.027368286
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:35:46.029275623
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:46.036340402
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:35:46.047340034
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:35:46.048980317
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:46.051597211
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:35:46.057075084
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:35:46.058906128
+DEBUG (0): LQI Root is receiving packet from node 5 @0:35:46.061667953
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:35:46.067115309
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:46.075904320
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:35:46.081931507
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:46.087012654
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 103 that advertises 735.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 307 and my cost to 735.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 735.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 216 and my cost to 341.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 735.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 77 that advertises 735.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 735.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:35:51.007165767
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:35:51.009967704
+DEBUG (0): LQI Root is receiving packet from node 1 @0:35:51.011385220
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:35:51.012529504
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:51.014594864
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:35:51.018218778
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:35:51.025787093
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:35:51.026740789
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:35:51.029746753
+DEBUG (0): LQI Root is receiving packet from node 2 @0:35:51.046770145
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:35:51.047324775
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:51.050920511
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:51.055910106
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:35:51.072295611
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:35:51.083175064
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:51.087325430
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:35:51.095778750
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:35:51.103881120
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:35:51.103881120
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:51.103881120
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:35:51.103881120
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:35:51.103881120
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:35:51.103881120
+DEBUG (0): LQI Root is receiving packet from node 6 @0:35:51.111556246
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:35:51.120177411
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:56.006244581
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:35:56.006244581
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:35:56.006244581
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:35:56.006942598
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:35:56.006942598
+DEBUG (0): LQI Root is receiving packet from node 2 @0:35:56.008996811
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:35:56.008996811
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:35:56.008996811
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:35:56.008996811
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:35:56.008996811
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:56.009712080
+DEBUG (0): LQI Root is receiving packet from node 1 @0:35:56.012514363
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:35:56.014358327
+DEBUG (0): LQI Root is receiving packet from node 5 @0:35:56.015449351
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:35:56.015449351
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:35:56.015449351
+DEBUG (0): LQI Root is receiving packet from node 2 @0:35:56.017511166
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:35:56.017511166
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:35:56.017511166
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:35:56.021822052
+DEBUG (0): LQI Root is receiving packet from node 2 @0:35:56.023330442
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:35:56.023330442
+DEBUG (0): LQI Root is receiving packet from node 4 @0:35:56.025652104
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:35:56.028024410
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:56.028024410
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:35:56.028024410
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:35:56.028024410
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:35:56.032479950
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:56.032479950
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:35:56.032479950
+DEBUG (0): LQI Root is receiving packet from node 2 @0:35:56.035875433
+DEBUG (0): LQI Root is receiving packet from node 3 @0:35:56.040834511
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:1.009158992
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:1.011446136
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:1.014635323
+DEBUG (0): LQI Root is receiving packet from node 5 @0:36:1.019210593
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:1.022088776
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 926.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 926.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 1538.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1538.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 1538.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1538.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 1538.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 1538.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 2150.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1538.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 2150.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 2150.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 2150.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 2150.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:6.008209071
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:6.016252745
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:6.019265916
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:36:6.021640609
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:36:6.025825267
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:6.033191445
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:6.033906943
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:36:6.040834392
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:6.057437519
+DEBUG (0): LQI Root is receiving packet from node 3 @0:36:6.062167716
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:6.072406304
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:36:11.009055955
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:11.009813574
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:11.012760046
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:11.018022636
+DEBUG (0): LQI Root is receiving packet from node 3 @0:36:11.020013593
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:36:11.024843275
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:11.025588730
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:11.027917599
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:36:11.032134712
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:11.040307664
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:11.045724502
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:16.010973235
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:16.016298403
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:16.024993641
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:16.033435584
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:36:16.043368998
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:16.046777352
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:36:16.049659356
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:36:16.052188526
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:16.059213193
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:16.075143276
+DEBUG (0): LQI Root is receiving packet from node 3 @0:36:16.079659851
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 63 that advertises 165.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1538.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 165.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1538.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 165.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 165.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 165.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 165.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 1051.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1538.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 1051.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1538.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 1051.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 165.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1051.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 165.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1602.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1538.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1602.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 1602.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1602.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 165.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:21.006807610
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:36:21.008197694
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:36:21.011010960
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:21.013078817
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:36:21.018974110
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:36:21.020998082
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:21.024509245
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:21.026519511
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:21.030414362
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:36:21.032066075
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:36:21.036391889
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:21.048190747
+DEBUG (0): LQI Root is receiving packet from node 3 @0:36:21.053958536
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:36:26.005823002
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:36:26.008415090
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:26.013259700
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:26.016252627
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:36:26.025760458
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:26.031938689
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:36:26.032966338
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:36:26.036075339
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:26.039110278
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:36:26.043109600
+DEBUG (0): LQI Root is receiving packet from node 5 @0:36:26.046205573
+DEBUG (0): LQI Root is receiving packet from node 3 @0:36:26.050432233
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:31.011598841
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:36:31.017429208
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:36:31.021140846
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:31.023181738
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:36:31.023828268
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:31.025939680
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:31.033617027
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:36:31.036544476
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:31.039743092
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:36:31.041238444
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:36:31.043960205
+DEBUG (0): LQI Root is receiving packet from node 5 @0:36:31.047860720
+DEBUG (0): LQI Root is receiving packet from node 3 @0:36:31.052499365
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1538.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1538.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 165.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 1538.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 241.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 380 and my cost to 241.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 241.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 621.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 855 and my cost to 621.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 621.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 4, my link to 90 and my cost to 621.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 621.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 90 that advertises 621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 165.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 1476.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 380 and my cost to 241.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 1476.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 165.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:36.007297431
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:36:36.014793227
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:36.016878352
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:36:36.021676791
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:36.024993641
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:36.028497430
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:36:36.029611315
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:36:36.031493847
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:36.035089188
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:36:36.037988341
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:36.046174937
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:36:36.052987643
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:36:36.054612999
+DEBUG (0): LQI Root is receiving packet from node 3 @0:36:36.058190860
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:36:36.058976987
+DEBUG (0): LQI Root is receiving packet from node 5 @0:36:36.066430558
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:36.075341639
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:36:41.008262503
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:41.010303395
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:41.011110445
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:36:41.015252878
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:36:41.036950750
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:41.039031645
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:36:41.041528360
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:36:41.042451815
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:41.045244275
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:41.054872515
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:36:41.055925247
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:36:41.058702330
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:36:41.063340975
+DEBUG (0): LQI Root is receiving packet from node 5 @0:36:41.078645569
+DEBUG (0): LQI Root is receiving packet from node 3 @0:36:41.084565945
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:41.091905380
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:46.006609128
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:36:46.009376388
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:46.014223338
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:36:46.016885559
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:46.026900978
+DEBUG (0): LQI Root is receiving packet from node 3 @0:36:46.036081004
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:36:46.039651539
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:46.042560287
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:46.045175189
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:36:46.047946608
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:36:46.050464293
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:46.055652251
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:36:46.064303934
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:36:46.068622146
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:36:46.068622146
+DEBUG (0): LQI Root is receiving packet from node 5 @0:36:46.068622146
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:36:46.068622146
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:46.068622146
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:46.073825363
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:36:46.078326680
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:46.081790404
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:46.085925512
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 90 and my cost to 621.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 343.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 366.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 855 and my cost to 621.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 366.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 90 and my cost to 621.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 366.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 366.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 366.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 366.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 711.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 5, my link to 343 and my cost to 711.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 711.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 366.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 711.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 711.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 5, my link to 561 and my cost to 711.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:36:51.006683201
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:36:51.008257068
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:51.018419480
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:36:51.029849790
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:36:51.033334438
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:36:51.035300919
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:36:51.044008202
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:36:51.058717589
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:36:51.070773623
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:36:51.074988798
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:36:51.078376230
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:36:51.081595815
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:36:51.082215987
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:36:51.086229025
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:36:51.090552672
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:36:51.094071997
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:36:51.094071997
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:36:51.094071997
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:36:51.094071997
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:36:51.094071997
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:36:51.096803304
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:36:51.097358052
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:36:51.100999447
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:36:51.104661535
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:51.104661535
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:36:51.104661535
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:36:51.104661535
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:36:51.104661535
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:51.107047327
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:51.109590095
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:36:51.109590095
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:36:51.109590095
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:36:51.109590095
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:36:51.109590095
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:36:51.112016228
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:36:51.112016228
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:51.112016228
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:36:51.112016228
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:36:51.112016228
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:36:51.114564431
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:51.114564431
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:36:51.114564431
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:36:51.114564431
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:36:51.114564431
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:36:51.117707723
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:36:51.117707723
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:51.117707723
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:36:51.117707723
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:51.120973085
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:36:51.120973085
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:36:51.120973085
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:36:51.120973085
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:36:51.122071711
+DEBUG (0): LQI Root is receiving packet from node 2 @0:36:51.122865164
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:36:51.124864053
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:51.124864053
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:36:51.124864053
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:36:51.124864053
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:51.124864053
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:36:51.125779575
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:36:51.130891240
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:36:51.130891240
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:51.130891240
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:36:51.130891240
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:51.130891240
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:36:51.139649734
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:36:51.139649734
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:51.139649734
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:36:51.139649734
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:51.139649734
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:36:51.139649734
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:36:51.148225123
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:36:51.148225123
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:51.148225123
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:51.148225123
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:36:51.154511707
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:36:51.154511707
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:36:51.154511707
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:51.154511707
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:36:51.154511707
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:36:51.154511707
+DEBUG (0): LQI Root is receiving packet from node 4 @0:36:56.007709416
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:56.008577501
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:36:56.009737280
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:56.009737280
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:36:56.009737280
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:36:56.009737280
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:36:56.013811353
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:36:56.013811353
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:56.013811353
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:36:56.015444034
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:56.016145816
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:36:56.016145816
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:36:56.016145816
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:36:56.016466367
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:56.020402993
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:36:56.020402993
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:36:56.020402993
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:56.020402993
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:36:56.020402993
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:36:56.021928981
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:36:56.025270637
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:56.025270637
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:36:56.025270637
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:36:56.025270637
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:36:56.025270637
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:36:56.025819832
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:36:56.027849239
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:56.027849239
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:36:56.027849239
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:56.027849239
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:36:56.027849239
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:36:56.029100570
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:36:56.030992649
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:56.030992649
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:36:56.030992649
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:36:56.030992649
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:36:56.030992649
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:36:56.032640589
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:36:56.036241524
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:56.036241524
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:36:56.036241524
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:56.036241524
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:36:56.036241524
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:36:56.039995282
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:36:56.039995282
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:36:56.039995282
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:36:56.039995282
+DEBUG (0): LQI Root is receiving packet from node 1 @0:36:56.039995282
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:36:56.039995282
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:36:56.045076311
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:36:56.045076311
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:36:56.045076311
+DEBUG (0): LQI Root is receiving packet from node 6 @0:36:56.045076311
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:36:56.045076311
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:36:56.045076311
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:1.009187849
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:37:1.009187849
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:37:1.012443387
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:1.012443387
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:37:1.012443387
+DEBUG (0): LQI Root is receiving packet from node 3 @0:37:1.012443387
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:37:1.012443387
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:37:1.012443387
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:1.016975221
+DEBUG (0): LQI Root is receiving packet from node 3 @0:37:1.016975221
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:37:1.016975221
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:37:1.016975221
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:37:1.018806265
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:1.018913076
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:37:1.018913076
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:37:1.018913076
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:37:1.018913076
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:37:1.021613866
+DEBUG (0): LQI Root is receiving packet from node 3 @0:37:1.021613866
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:37:1.021613866
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:37:1.022788785
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:37:1.026649237
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:37:1.026649237
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:37:1.026649237
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:37:1.028312435
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:37:1.031547279
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:37:1.031547279
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:37:1.031547279
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:37:1.031547279
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:37:1.031547279
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:37:1.038535764
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:37:1.038535764
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:37:1.038535764
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:37:1.038535764
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:37:1.039649649
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 5355 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 1423.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 2325 and my cost to 1423.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 1423.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 1423.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 1423.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1423.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:37:6.006656566
+DEBUG (0): LQI Root is receiving packet from node 2 @0:37:6.008600085
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:6.011695711
+DEBUG (0): LQI Root is receiving packet from node 1 @0:37:6.013704542
+DEBUG (0): LQI Root is receiving packet from node 5 @0:37:6.018493434
+DEBUG (0): LQI Root is receiving packet from node 3 @0:37:6.028526057
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:37:6.041948278
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:6.047746584
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 2325.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 2325.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 2325.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 2325.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 2325.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 2790.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 2790.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 2790.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:11.013419944
+DEBUG (0): LQI Root is receiving packet from node 1 @0:37:11.015398258
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:37:11.019823163
+DEBUG (0): LQI Root is receiving packet from node 3 @0:37:11.022149811
+DEBUG (0): LQI Root is receiving packet from node 4 @0:37:11.039066044
+DEBUG (0): LQI Root is receiving packet from node 2 @0:37:11.044122339
+DEBUG (0): LQI Root is receiving packet from node 5 @0:37:11.046432114
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:11.055942167
+DEBUG (0): LQI Root is receiving packet from node 2 @0:37:16.007654046
+DEBUG (0): LQI Root is receiving packet from node 1 @0:37:16.011720911
+DEBUG (0): LQI Root is receiving packet from node 4 @0:37:16.018527834
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:37:16.023424216
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:16.025718456
+DEBUG (0): LQI Root is receiving packet from node 3 @0:37:16.032539095
+DEBUG (0): LQI Root is receiving packet from node 5 @0:37:16.034438776
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:16.037309633
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 60 that advertises 144.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 2325.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 144.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 144.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 144.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 144.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:21.010246134
+DEBUG (0): LQI Root is receiving packet from node 1 @0:37:21.016618954
+DEBUG (0): LQI Root is receiving packet from node 5 @0:37:21.020217667
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:37:21.024423357
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:37:21.028810537
+DEBUG (0): LQI Root is receiving packet from node 3 @0:37:21.037484804
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:37:21.040805536
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:21.047107379
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:37:21.049874868
+DEBUG (0): LQI Root is receiving packet from node 2 @0:37:21.054788170
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:37:21.060321414
+DEBUG (0): LQI Root is receiving packet from node 4 @0:37:21.064181865
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 1548.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 1548.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 1548.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 1548.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1548.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 144.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 2325.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 2325.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2325.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 2325.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 2325.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 2325.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 144.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:37:26.006685540
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:37:26.008548644
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:37:26.015130809
+DEBUG (0): LQI Root is receiving packet from node 5 @0:37:26.017440584
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:37:26.021196446
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:26.022498870
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:37:26.035219191
+DEBUG (0): LQI Root is receiving packet from node 4 @0:37:26.037616468
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:37:26.040076893
+DEBUG (0): LQI Root is receiving packet from node 2 @0:37:26.043780983
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:26.051440850
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:37:31.010471241
+DEBUG (0): LQI Root is receiving packet from node 1 @0:37:31.013582472
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:37:31.016839783
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:31.017829708
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:37:31.020387734
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:37:31.026414921
+DEBUG (0): LQI Root is receiving packet from node 4 @0:37:31.029161605
+DEBUG (0): LQI Root is receiving packet from node 5 @0:37:31.033553771
+DEBUG (0): LQI Root is receiving packet from node 2 @0:37:31.036424746
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:37:31.039756460
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:31.046434454
+DEBUG (0): LQI Root is receiving packet from node 3 @0:37:31.056184763
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:36.008140433
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:37:36.011163547
+DEBUG (0): LQI Root is receiving packet from node 1 @0:37:36.015627138
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:37:36.018375247
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:37:36.020776528
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:37:36.022005157
+DEBUG (0): LQI Root is receiving packet from node 2 @0:37:36.024843393
+DEBUG (0): LQI Root is receiving packet from node 4 @0:37:36.030489112
+DEBUG (0): LQI Root is receiving packet from node 5 @0:37:36.043395633
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:37:36.046266490
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:36.061357344
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 64 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 2325.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 250.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 250.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 250.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 873.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 873.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 108 that advertises 873.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 873.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 873.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 873.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 873.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 144.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 1728.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 873.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 1728.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 144.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:37:41.006761834
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:37:41.009891410
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:37:41.014070633
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:37:41.028551139
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:37:41.034631427
+DEBUG (0): LQI Root is receiving packet from node 2 @0:37:41.039035527
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:41.043189667
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:37:41.046493149
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:37:41.050773241
+DEBUG (0): LQI Root is receiving packet from node 2 @0:37:41.057986832
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:37:41.060241238
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:41.062900134
+DEBUG (0): LQI Root is receiving packet from node 3 @0:37:41.068805251
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:37:46.006759494
+DEBUG (0): LQI Root is receiving packet from node 1 @0:37:46.006883903
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:37:46.009240950
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:46.015022107
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:37:46.025352247
+DEBUG (0): LQI Root is receiving packet from node 2 @0:37:46.028802604
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:37:46.030368585
+DEBUG (0): LQI Root is receiving packet from node 3 @0:37:46.036279367
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:37:46.038347224
+DEBUG (0): LQI Root is receiving packet from node 5 @0:37:46.042398105
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:37:46.044269261
+DEBUG (0): LQI Root is receiving packet from node 4 @0:37:46.047702469
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:37:46.054141640
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:46.061252194
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:37:51.006921628
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:37:51.007690275
+DEBUG (0): LQI Root is receiving packet from node 1 @0:37:51.009386330
+DEBUG (0): LQI Root is receiving packet from node 2 @0:37:51.013948681
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:37:51.016971447
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:37:51.022386624
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:51.029090629
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:37:51.032214888
+DEBUG (0): LQI Root is receiving packet from node 5 @0:37:51.035251369
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:37:51.037681277
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:51.040454586
+DEBUG (0): LQI Root is receiving packet from node 3 @0:37:51.047015827
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:37:51.048831612
+DEBUG (0): LQI Root is receiving packet from node 4 @0:37:51.057223897
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 67 that advertises 343.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 873.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 69 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 873.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 343.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 343.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 343.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 375.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 873.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 375.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 873.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 375.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 76 and my cost to 375.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 375.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 375.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 1038.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 216 and my cost to 1038.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1038.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 76 and my cost to 375.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 1038.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 1038.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 343.
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:37:56.006198805
+DEBUG (0): LQI Root is receiving packet from node 1 @0:37:56.008623395
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:37:56.009286726
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:37:56.010627602
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:37:56.021964816
+DEBUG (0): LQI Root is receiving packet from node 2 @0:37:56.025842416
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:37:56.031898229
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:37:56.037139566
+DEBUG (0): LQI Root is receiving packet from node 6 @0:37:56.037757570
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:37:56.040407149
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:37:56.040626206
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:37:56.045900281
+DEBUG (0): LQI Root is receiving packet from node 4 @0:37:56.050590137
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:37:56.050948689
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:37:56.061065207
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:37:56.065551265
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:37:56.073668894
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:37:56.075194764
+DEBUG (0): LQI Root is receiving packet from node 5 @0:37:56.097853933
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:37:56.100264808
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:38:1.012102260
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:38:1.016330581
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:1.020866189
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:1.025262585
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:1.033212368
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:38:1.033212368
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:38:1.033212368
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:38:1.038415585
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:1.040870345
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:38:1.047683327
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:1.058639074
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:38:1.061873918
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:38:1.071542222
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:38:1.074950624
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:38:1.081323049
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:1.081323049
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:38:1.081323049
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:38:1.091256463
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:1.094153725
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:38:1.095361053
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:1.097100545
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:38:1.097100545
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:1.097100545
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:38:1.097100545
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:38:1.097100545
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:1.099768927
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:38:1.103600751
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:38:1.106896630
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:38:1.108102068
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:1.109795783
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:38:1.109795783
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:1.109795783
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:38:1.109795783
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:38:1.109795783
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:38:1.112725454
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:38:1.115639865
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:38:1.115639865
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:38:1.115639865
+DEBUG (0): LQI Root is receiving packet from node 5 @0:38:1.115639865
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:38:1.118966262
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:38:1.118966262
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:38:1.118966262
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:1.118966262
+DEBUG (0): LQI Root is receiving packet from node 5 @0:38:1.118966262
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:38:1.122719902
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:38:1.131859864
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:38:1.138497398
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:38:1.138497398
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:1.138497398
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:38:1.138497398
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:38:1.138497398
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:38:1.146676061
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:38:1.146676061
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:1.146676061
+DEBUG (0): LQI Root is receiving packet from node 5 @0:38:1.146676061
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:38:1.146676061
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:38:1.155816023
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:38:1.155816023
+DEBUG (0): LQI Root is receiving packet from node 5 @0:38:1.155816023
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:38:1.155816023
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:1.155816023
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:38:1.155816023
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:38:6.007684563
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:38:6.007684563
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:6.007684563
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:6.007684563
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:38:6.007684563
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:38:6.010150808
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:38:6.010150808
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:6.010150808
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:6.010150808
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:6.010652684
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:38:6.012850055
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:6.012850055
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:38:6.012850055
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:38:6.012850055
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:38:6.012850055
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:38:6.012850055
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:6.015506612
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:38:6.015506612
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:38:6.015506612
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:38:6.015506612
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:38:6.017825934
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:6.017825934
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:38:6.017825934
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:38:6.018800830
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:6.020423687
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:38:6.020423687
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:6.020423687
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:38:6.020423687
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:38:6.020423687
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:6.023546285
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:38:6.023546285
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:38:6.023546285
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:6.025485801
+DEBUG (0): LQI Root is receiving packet from node 6 @0:38:6.025485801
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:38:6.025485801
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:38:6.025485801
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:38:6.026832341
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:38:6.026832341
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:6.029182181
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:38:6.029182181
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:38:6.029182181
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:38:6.029182181
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:38:6.033725499
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:38:6.033725499
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:6.033725499
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:38:6.033725499
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:6.033725499
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:38:6.039096562
+DEBUG (0): LQI Root is receiving packet from node 6 @0:38:6.039096562
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:6.039096562
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:38:6.039096562
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:38:6.044437107
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:38:6.044437107
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:38:6.044437107
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:38:6.044437107
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:38:6.051608696
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:38:6.051608696
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:38:6.051608696
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:6.051608696
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 855.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 855.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 855.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 855.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 1320.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1320.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 1320.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 1320.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 1320.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 1320.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 1740.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 1740.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 1740.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 1740.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1740.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:11.005807743
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:11.009246662
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:11.011171598
+DEBUG (0): LQI Root is receiving packet from node 5 @0:38:11.015594281
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:11.018150141
+DEBUG (0): LQI Root is receiving packet from node 3 @0:38:11.026191476
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:11.031101003
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:11.034090047
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:11.034579987
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:11.042573884
+DEBUG (0): LQI Root is receiving packet from node 6 @0:38:11.050157458
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:16.014001665
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:16.017776275
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:16.028932606
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:16.032062301
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:16.034242752
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:16.036624652
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:16.040443101
+DEBUG (0): LQI Root is receiving packet from node 6 @0:38:16.044372190
+DEBUG (0): LQI Root is receiving packet from node 6 @0:38:16.063521858
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:16.070846034
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:21.005663207
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:21.015435983
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:21.017448240
+DEBUG (0): LQI Root is receiving packet from node 3 @0:38:21.025413282
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:21.028091157
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:21.031039968
+DEBUG (0): LQI Root is receiving packet from node 5 @0:38:21.045074090
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:21.053377044
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:21.060760033
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:21.069093505
+DEBUG (0): LQI Root is receiving packet from node 6 @0:38:21.075959920
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 307.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 307.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 980.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1320.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 980.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 110 that advertises 980.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 980.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:26.009996678
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:26.015390206
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:26.018264554
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:26.022134552
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:38:26.024444327
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:26.025108108
+DEBUG (0): LQI Root is receiving packet from node 5 @0:38:26.029220300
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:26.036348335
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:38:26.037849122
+DEBUG (0): LQI Root is receiving packet from node 3 @0:38:26.042945528
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:26.050510069
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:38:26.056949241
+DEBUG (0): LQI Root is receiving packet from node 6 @0:38:26.061847284
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:26.069186718
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:38:26.074771402
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:26.083301016
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 111 that advertises 1781.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1320.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1781.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 1781.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 1781.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 1781.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:31.010238478
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:31.014391184
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:31.015771674
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:31.016757825
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:31.022043000
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:38:31.025583018
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:31.028434504
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:31.031450292
+DEBUG (0): LQI Root is receiving packet from node 5 @0:38:31.032678314
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:38:31.034494099
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:31.044091821
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:31.050584702
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:38:31.056436109
+DEBUG (0): LQI Root is receiving packet from node 3 @0:38:31.062402261
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:38:31.070702994
+DEBUG (0): LQI Root is receiving packet from node 6 @0:38:31.077218459
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:36.007713190
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:36.015901795
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:36.020814978
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:36.026437505
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:38:36.030542096
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:36.031055227
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:36.039386477
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:36.046538925
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:36.046578989
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:38:36.058917613
+DEBUG (0): LQI Root is receiving packet from node 3 @0:38:36.061471480
+DEBUG (0): LQI Root is receiving packet from node 5 @0:38:36.066674697
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:38:36.073398119
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:36.077807884
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1320.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:41.006141544
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:41.009515607
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:41.024782358
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:41.027650876
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:38:41.028939932
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:41.029647544
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:38:41.033691100
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:41.036151633
+DEBUG (0): LQI Root is receiving packet from node 3 @0:38:41.060045214
+DEBUG (0): LQI Root is receiving packet from node 5 @0:38:41.071123030
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:38:41.078753923
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:41.082492305
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:41.084489651
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:38:41.115542649
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:41.120439149
+DEBUG (0): LQI Root is receiving packet from node 6 @0:38:41.125382967
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 349.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1320.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 349.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 1076 and my cost to 349.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 349.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 3, my link to 465 and my cost to 349.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 349.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 349.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 814.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 380 and my cost to 814.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 814.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 144 and my cost to 814.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 814.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 814.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 1194.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 144 and my cost to 814.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 1194.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 465 and my cost to 349.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 1194.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 1194.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 84 that advertises 1194.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:46.012102379
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:46.022081450
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:38:46.026763650
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:46.035684277
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:46.037376103
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:46.042667098
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:46.045953383
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:38:46.046836497
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:46.048160230
+DEBUG (0): LQI Root is receiving packet from node 3 @0:38:46.061606918
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:38:46.066947463
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:38:46.079581667
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:46.082126096
+DEBUG (0): LQI Root is receiving packet from node 4 @0:38:46.091224055
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:38:46.097628935
+DEBUG (0): LQI Root is receiving packet from node 6 @0:38:46.100165653
+DEBUG (0): LQI Root is receiving packet from node 5 @0:38:46.108435869
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:51.006822750
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:51.010103489
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:51.018197807
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:38:51.023162597
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:51.025775717
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:51.033485134
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:51.034900419
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:51.040338181
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:51.042117784
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:51.050449035
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:38:51.074069502
+DEBUG (0): LQI Root is receiving packet from node 3 @0:38:51.078647112
+DEBUG (0): LQI Root is receiving packet from node 3 @0:38:51.081363161
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:38:51.095980995
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:51.098239283
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:38:51.100985849
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:51.105334579
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:38:51.113375913
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:38:51.113375913
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:38:51.113375913
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:38:51.113375913
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:38:51.113375913
+DEBUG (0): LQI Root is receiving packet from node 5 @0:38:51.113375913
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:38:51.119662498
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:38:51.122286994
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:38:51.125277699
+DEBUG (0): LQI Root is receiving packet from node 1 @0:38:56.006075192
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:38:56.006075192
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:38:56.006075192
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:56.008249135
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:38:56.008249135
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:38:56.012546424
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:38:56.012546424
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:38:56.012546424
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:56.013940630
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:38:56.013940630
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:38:56.017566536
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:38:56.017566536
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:38:56.022033453
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:38:56.025775717
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:38:56.025775717
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:38:56.025775717
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:38:56.025775717
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:38:56.038886714
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:38:56.046386338
+DEBUG (0): LQI Root is receiving packet from node 6 @0:38:56.048540036
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:56.048540036
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:56.048540036
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:38:56.048540036
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:38:56.048540036
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:38:56.048540036
+DEBUG (0): LQI Root is receiving packet from node 6 @0:38:56.053682218
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:38:56.053682218
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:38:56.053682218
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:56.054353601
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:38:56.057603704
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:38:56.057603704
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:56.057603704
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:56.057603704
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:38:56.057603704
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:38:56.058097417
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:38:56.063964360
+DEBUG (0): LQI Root is receiving packet from node 2 @0:38:56.066011247
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:56.066011247
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:38:56.066011247
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:56.069716890
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:56.071128347
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:38:56.075166467
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:38:56.075166467
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:38:56.075166467
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:38:56.075166467
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:38:56.075166467
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:38:56.080420895
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:38:56.085563077
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:38:56.085563077
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:38:56.085563077
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:38:56.085563077
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:38:56.085563077
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 65 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 76 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:39:1.006921628
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:39:1.006921628
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:1.006921628
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:39:1.006921628
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:39:1.006921628
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:39:1.008808042
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:1.009752421
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:39:1.009752421
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:39:1.009752421
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:39:1.010566567
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:39:1.010942717
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:39:1.012985044
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:39:1.012985044
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:39:1.012985044
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:1.012985044
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:39:1.012985044
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:39:1.012985044
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:1.015937629
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:39:1.015937629
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:39:1.015937629
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:39:1.015937629
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:39:1.017352914
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:39:1.018205740
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:1.018205740
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:39:1.018205740
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:39:1.019075486
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:1.020357335
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:39:1.020357335
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:39:1.020357335
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:39:1.022651457
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:39:1.022651457
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:39:1.022651457
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:39:1.022651457
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:1.024828016
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:39:1.024828016
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:39:1.024828016
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:39:1.024828016
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:1.029024277
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:39:1.029024277
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:39:1.029024277
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:39:1.029024277
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:39:1.031211588
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:1.031211588
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:1.031211588
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:39:1.031211588
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:39:1.035510767
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:39:1.035510767
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:1.035510767
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:39:1.035510767
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:39:1.035510767
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:39:1.036185924
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:39:1.038711212
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:1.038711212
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:39:1.038711212
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:39:1.038711212
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:39:1.038711212
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:39:1.038711212
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:39:1.042072008
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:1.042072008
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:39:1.042072008
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:39:1.042072008
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:39:1.049041352
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:39:1.049041352
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:1.049041352
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:1.049041352
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:39:1.049041352
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:39:1.049041352
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:39:1.054702329
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:39:1.054702329
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:39:1.054702329
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:1.054702329
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:1.054702329
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:39:1.058990024
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:39:1.058990024
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:39:1.058990024
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:39:1.058990024
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:39:1.059798735
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:39:6.005988957
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:39:6.005988957
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:39:6.005988957
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:39:6.005988957
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:39:6.005988957
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:6.008623277
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:39:6.008623277
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:39:6.008623277
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:39:6.010227101
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:6.010766820
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:39:6.010766820
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:39:6.010766820
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:39:6.011520208
+DEBUG (0): LQI Root is receiving packet from node 1 @0:39:6.012712727
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:39:6.012712727
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:39:6.012712727
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:39:6.012712727
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:6.015215035
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:39:6.015215035
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:39:6.015215035
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:39:6.015506612
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:39:6.020998082
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:6.020998082
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:39:6.020998082
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:39:6.024828016
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:39:6.024828016
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:6.024828016
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:39:6.024828016
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:39:6.026574834
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:39:6.026574834
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:6.027498289
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:39:6.027498289
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:39:6.027498289
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:39:6.028899868
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:39:6.028899868
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:6.031961155
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:39:6.031961155
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:39:6.031961155
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:39:6.034066855
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:39:6.034066855
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:6.034066855
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:6.034066855
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:39:6.034066855
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:39:6.034066855
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:39:6.036699285
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:39:6.036699285
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:6.037719396
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:39:6.037719396
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:39:6.039498952
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:39:6.039498952
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:39:6.041887243
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:6.041887243
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:39:6.042398105
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:6.043878199
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:6.043878199
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:39:6.043878199
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:39:6.043878199
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:39:6.046014417
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:39:6.046014417
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:39:6.046014417
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:6.046014417
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:39:6.046014417
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:39:6.054757652
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:6.054757652
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:39:6.054757652
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:39:6.054757652
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:6.055861991
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:39:6.055861991
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:39:6.060555958
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:39:6.060555958
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:39:6.060555958
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:6.060555958
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:39:6.060555958
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:39:6.060555958
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:39:11.008136660
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:11.008136660
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:39:11.008136660
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:39:11.008537160
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:39:11.010912082
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:39:11.010912082
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:39:11.010912082
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:11.016320987
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:11.016320987
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:39:11.016344179
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:39:11.020052043
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:39:11.020052043
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:11.020052043
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:39:11.020052043
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:39:11.020052043
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:11.027010010
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:39:11.027010010
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:39:11.027010010
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:39:11.030077009
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:39:11.030077009
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:39:11.030077009
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:11.030077009
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:11.030077009
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:39:11.030077009
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:39:11.035738105
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:11.035738105
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:39:11.035738105
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:11.037584289
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 1518.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 2457 and my cost to 1518.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1518.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 2598.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 2457 and my cost to 1518.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 2598.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 2598.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 90 that advertises 2598.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 2598.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 3975.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 3975.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 3975.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @0:39:16.009696821
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:16.012786681
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:16.017877375
+DEBUG (0): LQI Root is receiving packet from node 1 @0:39:16.021410186
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:16.028125557
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:39:16.034532549
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:16.039262746
+DEBUG (0): LQI Root is receiving packet from node 3 @0:39:21.005790594
+DEBUG (0): LQI Root is receiving packet from node 1 @0:39:21.008501325
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:21.014245804
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:21.017089634
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:39:21.017503840
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:21.023134300
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:21.032947306
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:26.006412426
+DEBUG (0): LQI Root is receiving packet from node 1 @0:39:26.009279519
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:26.012216397
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:39:26.014772533
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:26.019469991
+DEBUG (0): LQI Root is receiving packet from node 3 @0:39:26.024574053
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:26.027269408
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 189.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 189.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 189.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 189.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 1423.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 1423 and my cost to 1423.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 1423.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 1423.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 1423.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1423.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 103 that advertises 2325.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 1423 and my cost to 1423.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2325.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 2325.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 2325.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 2325.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 189.
+DEBUG (0): LQI Root is receiving packet from node 3 @0:39:31.009818890
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:31.012851598
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:39:31.017076597
+DEBUG (0): LQI Root is receiving packet from node 1 @0:39:31.017656545
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:39:31.022393950
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:31.024551138
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:31.027406855
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:31.041582069
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:31.055376052
+DEBUG (0): LQI Root is receiving packet from node 3 @0:39:36.010276651
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:39:36.010980442
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:36.021560433
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:36.023607438
+DEBUG (0): LQI Root is receiving packet from node 1 @0:39:36.028368153
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:36.028964785
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:39:36.032106416
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:36.035373439
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:36.037553772
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:41.005435870
+DEBUG (0): LQI Root is receiving packet from node 1 @0:39:41.008104599
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:39:41.012651574
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:41.015474551
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:39:41.019235399
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:41.021774055
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:41.026422247
+DEBUG (0): LQI Root is receiving packet from node 3 @0:39:41.033347806
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:41.059714839
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 67 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 1423 and my cost to 1423.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 314.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 1423 and my cost to 1423.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 314.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 314.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 314.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 314.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 314.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 314.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:39:46.005731449
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:39:46.010673378
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:39:46.014434620
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:39:46.019309802
+DEBUG (0): LQI Root is receiving packet from node 1 @0:39:46.022936056
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:46.024875453
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:39:46.027702087
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:46.031236788
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:39:46.037981016
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:39:46.043703028
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:46.047929806
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:39:46.049821767
+DEBUG (0): LQI Root is receiving packet from node 3 @0:39:46.056398385
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:46.064332909
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 858.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 858.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 858.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 314.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 858.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 314.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 858.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 858.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 189.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1470.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 314.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 1470.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 189.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 1470.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 1470.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:39:51.008157583
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:39:51.010194923
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:39:51.010680980
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:51.014133329
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:39:51.017074375
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:51.020113196
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:39:51.020740346
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:39:51.027137515
+DEBUG (0): LQI Root is receiving packet from node 1 @0:39:51.029375227
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:39:51.035331437
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:51.038438895
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:51.043687888
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:39:56.006370424
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:39:56.008640197
+DEBUG (0): LQI Root is receiving packet from node 1 @0:39:56.011293667
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:39:56.012148036
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:39:56.017312803
+DEBUG (0): LQI Root is receiving packet from node 4 @0:39:56.027254268
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:39:56.030260113
+DEBUG (0): LQI Root is receiving packet from node 3 @0:39:56.037309751
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:39:56.057061716
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:39:56.060821068
+DEBUG (0): LQI Root is receiving packet from node 6 @0:39:56.074540979
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:39:56.078750041
+DEBUG (0): LQI Root is receiving packet from node 2 @0:39:56.082933264
+DEBUG (0): LQI Root is receiving packet from node 5 @0:39:56.089753903
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 60 that advertises 189.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 858.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 189.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 314.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 189.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 79 that advertises 189.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 314.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 189.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:40:1.007591120
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:40:1.009521319
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:40:1.015018333
+DEBUG (0): LQI Root is receiving packet from node 1 @0:40:1.017458182
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:40:1.018045220
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:40:1.023119042
+DEBUG (0): LQI Root is receiving packet from node 4 @0:40:1.034090165
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:40:1.038201963
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:1.043352196
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:40:1.049676505
+DEBUG (0): LQI Root is receiving packet from node 5 @0:40:1.053407679
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:40:1.054674033
+DEBUG (0): LQI Root is receiving packet from node 2 @0:40:1.059282279
+DEBUG (0): LQI Root is receiving packet from node 6 @0:40:1.068452758
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 439.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 858.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 439.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 314.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 439.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 76 and my cost to 439.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 439.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 439.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 1314.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 858.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1314.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 76 and my cost to 439.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 1314.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 314.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 77 that advertises 1314.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 1314.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:40:6.006753782
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:40:6.018676539
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:40:6.022113629
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:40:6.023881977
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:40:6.026733132
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:40:6.031312964
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:40:6.037589724
+DEBUG (0): LQI Root is receiving packet from node 1 @0:40:6.039918989
+DEBUG (0): LQI Root is receiving packet from node 2 @0:40:6.047655150
+DEBUG (0): LQI Root is receiving packet from node 5 @0:40:6.052812590
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:40:6.056861463
+DEBUG (0): LQI Root is receiving packet from node 4 @0:40:6.065024867
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:40:6.068992129
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:40:6.076392599
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:40:6.078284677
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:40:6.086341271
+DEBUG (0): LQI Root is receiving packet from node 6 @0:40:6.092917771
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:6.100074101
+DEBUG (0): LQI Root is receiving packet from node 1 @0:40:11.018190600
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:40:11.024108636
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:40:11.026666386
+DEBUG (0): LQI Root is receiving packet from node 2 @0:40:11.033776940
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:40:11.036584541
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:40:11.043094341
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:40:11.046989084
+DEBUG (0): LQI Root is receiving packet from node 5 @0:40:11.050378406
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:40:11.051002122
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:40:11.053727994
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:40:11.056327408
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:11.066031941
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:40:11.070914725
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:40:11.074678189
+DEBUG (0): LQI Root is receiving packet from node 4 @0:40:11.078956060
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:40:11.081422534
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:40:11.086564716
+DEBUG (0): LQI Root is receiving packet from node 6 @0:40:11.092317246
+DEBUG (0): LQI Root is receiving packet from node 1 @0:40:16.008257186
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:40:16.010713719
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:40:16.012201138
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:40:16.017196445
+DEBUG (0): LQI Root is receiving packet from node 2 @0:40:16.020532388
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:40:16.022002935
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:40:16.030154964
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:40:16.033271512
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:40:16.038593025
+DEBUG (0): LQI Root is receiving packet from node 5 @0:40:16.039367336
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:40:16.042289404
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:40:16.047767277
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:40:16.056830945
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:16.063163306
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:40:16.081336417
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:40:16.089316717
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:40:16.097464863
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:40:16.097464863
+DEBUG (0): LQI Root is receiving packet from node 6 @0:40:16.097464863
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:40:16.097464863
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:40:16.097464863
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:40:16.102973254
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 65534.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 0, my link to 1331 and my cost to 65534.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 2744.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2744.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 2744.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 64 and my cost to 2744.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 2744.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 465 and my cost to 2744.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 2744.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 3473.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 64 and my cost to 2744.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 3473.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 3473.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 3473.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:40:21.009754082
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:21.015464609
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:40:21.018417141
+DEBUG (0): LQI Root is receiving packet from node 1 @0:40:21.020220007
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:40:21.032037448
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:40:21.040590253
+DEBUG (0): LQI Root is receiving packet from node 6 @0:40:21.055038021
+DEBUG (0): LQI Root is receiving packet from node 2 @0:40:21.061217794
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:26.005805852
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:40:26.013704424
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:40:26.016015813
+DEBUG (0): LQI Root is receiving packet from node 1 @0:40:26.034975170
+DEBUG (0): LQI Root is receiving packet from node 6 @0:40:26.039828979
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:40:26.040496480
+DEBUG (0): LQI Root is receiving packet from node 4 @0:40:26.047824538
+DEBUG (0): LQI Root is receiving packet from node 2 @0:40:26.057086569
+DEBUG (0): LQI Root is receiving packet from node 5 @0:40:26.061664179
+DEBUG (0): LQI Root is receiving packet from node 1 @0:40:31.007295888
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:40:31.014917187
+DEBUG (0): LQI Root is receiving packet from node 4 @0:40:31.018329471
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:40:31.019228073
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:31.020499980
+DEBUG (0): LQI Root is receiving packet from node 2 @0:40:31.024738125
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:40:31.027023048
+DEBUG (0): LQI Root is receiving packet from node 6 @0:40:31.031268849
+DEBUG (0): LQI Root is receiving packet from node 5 @0:40:31.040561397
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 243.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 64 and my cost to 2744.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 243.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 243.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 1423.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 926 and my cost to 1423.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 1423.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 64 and my cost to 2744.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 1423.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1423.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 2808.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 926 and my cost to 1423.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2808.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 2808.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 2808.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:36.006339907
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:40:36.008470690
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:40:36.011585126
+DEBUG (0): LQI Root is receiving packet from node 6 @0:40:36.015108224
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:40:36.018249295
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:40:36.021615756
+DEBUG (0): LQI Root is receiving packet from node 4 @0:40:36.024614513
+DEBUG (0): LQI Root is receiving packet from node 1 @0:40:36.030809545
+DEBUG (0): LQI Root is receiving packet from node 2 @0:40:36.045999159
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:40:36.050201013
+DEBUG (0): LQI Root is receiving packet from node 5 @0:40:36.055511041
+DEBUG (0): LQI Root is receiving packet from node 1 @0:40:41.008302962
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:40:41.010852708
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:40:41.012972006
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:40:41.016189371
+DEBUG (0): LQI Root is receiving packet from node 6 @0:40:41.023734825
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:40:41.026351665
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:40:41.029367176
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:41.038531990
+DEBUG (0): LQI Root is receiving packet from node 2 @0:40:41.042472508
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:41.049136786
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:41.051963420
+DEBUG (0): LQI Root is receiving packet from node 5 @0:40:41.056552515
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:40:46.006515355
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:46.008323538
+DEBUG (0): LQI Root is receiving packet from node 1 @0:40:46.011980309
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:40:46.014560572
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:40:46.017381771
+DEBUG (0): LQI Root is receiving packet from node 5 @0:40:46.027301587
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:40:46.030536431
+DEBUG (0): LQI Root is receiving packet from node 6 @0:40:46.032701505
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:40:46.037118595
+DEBUG (0): LQI Root is receiving packet from node 4 @0:40:46.044604953
+DEBUG (0): LQI Root is receiving packet from node 2 @0:40:46.059701471
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 926 and my cost to 1423.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 111 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 1548.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 1548.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1548.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 1548.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 98 that advertises 972.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 972.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 972.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 972.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 972.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 90 that advertises 972.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 972.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 1484.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 972.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 1484.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 1484.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1484.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:40:51.006153029
+DEBUG (0): LQI Root is receiving packet from node 1 @0:40:51.009371071
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:40:51.011672795
+DEBUG (0): LQI Root is receiving packet from node 4 @0:40:51.014467477
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:40:51.018129447
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:40:51.020629652
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:51.022681975
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:40:51.026977272
+DEBUG (0): LQI Root is receiving packet from node 5 @0:40:51.030059529
+DEBUG (0): LQI Root is receiving packet from node 6 @0:40:51.037978794
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:40:51.038049376
+DEBUG (0): LQI Root is receiving packet from node 2 @0:40:51.043954493
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:40:56.005975589
+DEBUG (0): LQI Root is receiving packet from node 1 @0:40:56.009950902
+DEBUG (0): LQI Root is receiving packet from node 2 @0:40:56.018333245
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:40:56.023317405
+DEBUG (0): LQI Root is receiving packet from node 3 @0:40:56.027549500
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:40:56.031863938
+DEBUG (0): LQI Root is receiving packet from node 4 @0:40:56.042346665
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:40:56.045764614
+DEBUG (0): LQI Root is receiving packet from node 6 @0:40:56.055652251
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:40:56.064925658
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:40:56.070189910
+DEBUG (0): LQI Root is receiving packet from node 5 @0:40:56.076690116
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:1.010192702
+DEBUG (0): LQI Root is receiving packet from node 3 @0:41:1.013358909
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:1.016863093
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:1.022418803
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:1.025636727
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:41:1.030664165
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:1.035403956
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:1.038003600
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:41:1.041446402
+DEBUG (0): LQI Root is receiving packet from node 6 @0:41:1.048633249
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:1.053607586
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:1.070407414
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 69 that advertises 106.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 972.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 106.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 106.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 76 that advertises 106.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 106.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 106.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 1423.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 972.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 1423.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 972.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 1423.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 106.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 1423.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1423.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 106.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:6.007862003
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:6.011980191
+DEBUG (0): LQI Root is receiving packet from node 3 @0:41:6.014930555
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:6.026628661
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:6.028314325
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:6.032533778
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:6.040803993
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:41:6.044191306
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:6.046386338
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:6.049529630
+DEBUG (0): LQI Root is receiving packet from node 6 @0:41:6.052629368
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:6.059144832
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 103 that advertises 1078.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 972.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1078.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 106.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 1078.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 1078.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 1078.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 106.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:11.006792351
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:11.007831486
+DEBUG (0): LQI Root is receiving packet from node 3 @0:41:11.010063030
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:11.011956999
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:11.015291329
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:11.015628681
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:11.019687495
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:41:11.020601356
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:11.021804572
+DEBUG (0): LQI Root is receiving packet from node 6 @0:41:11.034837723
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:11.040023460
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:11.044356931
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:16.007646838
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:16.010248025
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:16.015766010
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:16.018533499
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:16.024660170
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:16.027780271
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:41:16.031618138
+DEBUG (0): LQI Root is receiving packet from node 3 @0:41:16.039100336
+DEBUG (0): LQI Root is receiving packet from node 6 @0:41:16.048158568
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:16.050963948
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:16.056792771
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:16.066298941
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 61 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 972.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 106.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 111 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 106.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:21.008045107
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:21.012222109
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:21.016603695
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:21.019044969
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:21.022737692
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:21.024657949
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:21.026880008
+DEBUG (0): LQI Root is receiving packet from node 3 @0:41:21.030235031
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:21.037276894
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:41:21.061584003
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:21.067168687
+DEBUG (0): LQI Root is receiving packet from node 6 @0:41:21.077804001
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 158.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 972.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 158.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 512 and my cost to 158.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 158.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 158.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 158.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 670.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 669 and my cost to 670.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 670.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 4, my link to 76 and my cost to 670.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 670.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 158.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 670.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 670.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 106.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 104 that advertises 1339.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 76 and my cost to 670.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 1339.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 512 and my cost to 158.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 78 that advertises 1339.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 106.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 1339.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 1339.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 158.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:26.006774753
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:41:26.010822191
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:26.012605797
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:26.020496207
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:26.025674570
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:41:26.029288992
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:26.033502283
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:41:26.035739648
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:26.040590371
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:26.042932160
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:26.047014284
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:41:26.052377295
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:26.056734076
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:26.064668600
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:31.006777092
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:31.012542541
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:41:31.024986038
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:31.027101562
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:31.043048565
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:31.085870142
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:41:31.097934109
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:31.100304872
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:41:31.121203627
+DEBUG (0): LQI Root is receiving packet from node 6 @0:41:31.131310550
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:31.133660390
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:31.139123005
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:31.142022158
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:31.145073898
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:31.145073898
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:31.145073898
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:41:31.148949608
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:41:31.159386558
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:41:31.159386558
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:41:31.159386558
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:41:31.159386558
+DEBUG (0): LQI Root is receiving packet from node 6 @0:41:31.159386558
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:31.164284601
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:41:31.167382117
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:31.180046838
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:41:36.007850518
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:41:36.008516584
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:36.009876151
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:36.009876151
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:41:36.009876151
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:41:36.011148288
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:41:36.011148288
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:36.017413949
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:41:36.017413949
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:41:36.017556942
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:36.020052043
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:41:36.024294080
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:41:36.026491214
+DEBUG (0): LQI Root is receiving packet from node 6 @0:41:36.026491214
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:41:36.026491214
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:41:36.026491214
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:41:36.026491214
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:41:36.027010010
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:41:36.030306008
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:41:36.032884728
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:36.032884728
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:41:36.032884728
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:41:36.032884728
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:41:36.034273151
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:41:36.036699285
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:41:36.036699285
+DEBUG (0): LQI Root is receiving packet from node 6 @0:41:36.036699285
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:36.036699285
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:41:36.039962425
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:41:36.039962425
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:41:36.040575113
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:41:36.042070465
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:41:36.042909694
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:41:36.046647957
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:36.046647957
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:41:36.046647957
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:41:36.046647957
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:41:36.048308934
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:36.049453337
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:41:36.052202242
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:36.058059243
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:41:36.058059243
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:36.058059243
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:41:36.060380905
+DEBUG (0): LQI Root is receiving packet from node 6 @0:41:36.060380905
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:41:36.060380905
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:41:36.060380905
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:36.060380905
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:41:36.060380905
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:36.064116947
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:36.064116947
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:41:36.064116947
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:41:36.064116947
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:36.067367050
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:41:36.067946881
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:36.067946881
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:36.069701632
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:36.071975178
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:41:36.071975178
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:36.071975178
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:36.071975178
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:41:36.071975178
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:41:36.071975178
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:41:36.075408385
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:36.075408385
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:36.075408385
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:36.075408385
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:41:36.075408385
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:36.075408385
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:41:36.083541272
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:41:41.006248355
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:41:41.006248355
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:41:41.006248355
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:41:41.006248355
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:41.008089340
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:41.010105032
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:41.010105032
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:41:41.010105032
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:41.012161074
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:41.012161074
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:41:41.012161074
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:41.012161074
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:41:41.012161074
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:41.015415059
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:41:41.015415059
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:41:41.017305477
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:41:41.017305477
+DEBUG (0): LQI Root is receiving packet from node 3 @0:41:41.017617977
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:41:41.018695680
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:41.019595943
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:41:41.019595943
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:41:41.019595943
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:41:41.019836200
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:41:41.022525614
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:41.022525614
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:41.022525614
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:41:41.022525614
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:41:41.023599387
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:41.023599387
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:41.026063971
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:41.026063971
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:41:41.026063971
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:41.026063971
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:41:41.027683054
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:41.028400213
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:41.028400213
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:41.028400213
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:41:41.028400213
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:41.031137185
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:41.031137185
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:41.031137185
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:41:41.031137185
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:41.033054117
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:41.033054117
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:41:41.033054117
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:41.033054117
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:41.033054117
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:41:41.034044271
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:41:41.037662244
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:41:41.037662244
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:41:41.037662244
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:41.037662244
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:41.037662244
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:41:41.037662244
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:41:41.041598989
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:41:41.041598989
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:41.041598989
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:41.041598989
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:41:41.041598989
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:41:41.041598989
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:41:41.044023461
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:41:41.044023461
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:41:41.044023461
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:41.044023461
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:41:41.044023461
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:41:41.048404369
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:41:41.048404369
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:41.048404369
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:41:41.048404369
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:41:41.048404369
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:41:41.057117087
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:41:41.057117087
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:41.057117087
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:41:41.057117087
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:41:41.057117087
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:46.007531976
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:41:46.007531976
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:46.009432106
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:41:46.009432106
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:41:46.010303395
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:41:46.011400360
+DEBUG (0): LQI Root is receiving packet from node 6 @0:41:46.011400360
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:46.011400360
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:41:46.014545314
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:41:46.014545314
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:41:46.014545314
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:41:46.014545314
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:46.014545314
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:46.014545314
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:41:46.018314212
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:46.018314212
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:46.018314212
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:41:46.018314212
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:41:46.018314212
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:41:46.019045087
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:46.020816639
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:46.020816639
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:41:46.020816639
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:41:46.020816639
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:41:46.024127777
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:46.024127777
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:41:46.024204071
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:46.029285218
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:41:46.029285218
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:41:46.029285218
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:41:46.029285218
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:46.031284107
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:41:46.031284107
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:41:46.033618689
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:46.033618689
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:46.033618689
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:41:46.033618689
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:41:46.033618689
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:41:46.033618689
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:41:46.037494398
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:41:46.037494398
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:41:46.037494398
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:46.037494398
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:41:46.037494398
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:41:46.042177276
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:41:46.042177276
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:46.042177276
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:46.042177276
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:41:46.042177276
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:41:46.043246928
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:41:46.046313927
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:41:46.046313927
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:41:46.046313927
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:46.046313927
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:41:46.046313927
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:41:46.046313927
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:41:46.053989053
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:41:46.053989053
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:41:46.053989053
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:46.053989053
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:41:46.053989053
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:41:46.053989053
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:41:46.056567773
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:41:46.056567773
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:46.056567773
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:46.056567773
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:41:46.056567773
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:41:46.056567773
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:41:51.007234853
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:41:51.007234853
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:51.007234853
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:41:51.007234853
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:41:51.007852409
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:51.007852409
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:41:51.010532275
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:41:51.010532275
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:51.011138741
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:41:51.014398391
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:51.014398391
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:41:51.014398391
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:41:51.016086442
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:41:51.016086442
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:51.018890161
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:41:51.018890161
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:51.020898597
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:41:51.020898597
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:41:51.022830788
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:51.022830788
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:41:51.022830788
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:41:51.022830788
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:51.022830788
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:51.025911384
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:41:51.025911384
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:51.027591502
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:51.028848380
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:41:51.028848380
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:41:51.028848380
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:41:51.031268849
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:51.031268849
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:51.031268849
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:41:51.031268849
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:41:51.031268849
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:41:51.033876425
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:51.033876425
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:51.033876425
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:51.033876425
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:41:51.033876425
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:51.036197409
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:41:51.036197409
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:51.036197409
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:41:51.038531990
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:51.038531990
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:41:51.038531990
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:41:51.038531990
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:51.038531990
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:41:51.038531990
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:41:51.043519924
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:51.043519924
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:51.043519924
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:51.043519924
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:51.043519924
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:41:51.043519924
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:41:51.046512290
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:41:51.046512290
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:41:51.046512290
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:51.046512290
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:41:51.046512290
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:41:51.052156348
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:41:51.052156348
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:51.052156348
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:51.052156348
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:41:51.052156348
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:41:51.053332929
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 1076.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 1076.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 1076.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 1456.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1456.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 1456.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 1456.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1456.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 1456.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 1456.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 2017.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1456.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 2017.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 2017.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 64 that advertises 2017.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 2017.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:41:56.012552088
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:41:56.015245553
+DEBUG (0): LQI Root is receiving packet from node 1 @0:41:56.020097937
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:41:56.025516319
+DEBUG (0): LQI Root is receiving packet from node 6 @0:41:56.030933157
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:41:56.037582068
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:41:56.040027343
+DEBUG (0): LQI Root is receiving packet from node 3 @0:41:56.045356403
+DEBUG (0): LQI Root is receiving packet from node 4 @0:41:56.048450145
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:41:56.050601622
+DEBUG (0): LQI Root is receiving packet from node 5 @0:41:56.060535035
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:1.007591120
+DEBUG (0): LQI Root is receiving packet from node 1 @0:42:1.009920384
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:42:1.012178554
+DEBUG (0): LQI Root is receiving packet from node 2 @0:42:1.018441946
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:42:1.022128887
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:1.032291182
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:1.036559735
+DEBUG (0): LQI Root is receiving packet from node 6 @0:42:1.044818574
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:42:1.072829665
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:1.075274940
+DEBUG (0): LQI Root is receiving packet from node 5 @0:42:1.083667225
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:6.010001995
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:42:6.012087002
+DEBUG (0): LQI Root is receiving packet from node 2 @0:42:6.017999444
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:42:6.022876564
+DEBUG (0): LQI Root is receiving packet from node 1 @0:42:6.025407965
+DEBUG (0): LQI Root is receiving packet from node 6 @0:42:6.031421436
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:6.033904721
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:42:6.041629506
+DEBUG (0): LQI Root is receiving packet from node 5 @0:42:6.047366777
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:6.050861020
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:6.071368712
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 62 that advertises 307.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1456.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1456.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 307.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 1076.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 307.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 1728.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1456.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 1728.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1456.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 1728.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1490.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1456.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1490.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 1076.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 1490.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 1490.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:11.016181768
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:42:11.018236258
+DEBUG (0): LQI Root is receiving packet from node 1 @0:42:11.021150788
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:42:11.028369696
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:42:11.037927306
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:11.043674172
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:11.045928577
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:42:11.053521698
+DEBUG (0): LQI Root is receiving packet from node 6 @0:42:11.057046457
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:11.067986945
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:11.075875693
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:42:11.081267726
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:42:11.084746710
+DEBUG (0): LQI Root is receiving packet from node 2 @0:42:11.092751815
+DEBUG (0): LQI Root is receiving packet from node 5 @0:42:11.102349538
+DEBUG (0): LQI Root is receiving packet from node 1 @0:42:16.006395625
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:16.009067440
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:16.010795447
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:16.016336246
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:42:16.018251516
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:42:16.026887941
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:16.027663913
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:42:16.029336658
+DEBUG (0): LQI Root is receiving packet from node 2 @0:42:16.032907194
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:42:16.036035228
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:16.040979046
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:42:16.044860468
+DEBUG (0): LQI Root is receiving packet from node 6 @0:42:16.049554436
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:42:16.058684850
+DEBUG (0): LQI Root is receiving packet from node 5 @0:42:16.064696778
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:21.014938157
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:21.016029181
+DEBUG (0): LQI Root is receiving packet from node 1 @0:42:21.018083789
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:42:21.023592061
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:21.034600910
+DEBUG (0): LQI Root is receiving packet from node 2 @0:42:21.045434587
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:42:21.055179232
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:21.059848394
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:42:21.063830915
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:42:21.064441263
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:42:21.080020395
+DEBUG (0): LQI Root is receiving packet from node 5 @0:42:21.082995842
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:42:21.087405606
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:21.092700375
+DEBUG (0): LQI Root is receiving packet from node 6 @0:42:21.097949368
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1456.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 1076.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 68 that advertises 349.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1456.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 349.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 1456.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 349.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 3, my link to 561 and my cost to 349.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 349.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 349.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:42:26.010515474
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:42:26.017829708
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:42:26.020036784
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:26.021463169
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:26.022678201
+DEBUG (0): LQI Root is receiving packet from node 2 @0:42:26.030267439
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:42:26.033069375
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:42:26.039407400
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:26.043618801
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:42:26.044824239
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:26.052865574
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:42:26.054879722
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:26.057647259
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:42:26.063949102
+DEBUG (0): LQI Root is receiving packet from node 6 @0:42:26.068780398
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:42:26.074126655
+DEBUG (0): LQI Root is receiving packet from node 5 @0:42:26.080047030
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 910.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 729 and my cost to 910.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 910.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 910.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 4, my link to 106 and my cost to 910.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 910.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 910.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 1639.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 106 and my cost to 910.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 1639.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 561 and my cost to 349.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 1639.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:42:31.011049410
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:31.014724535
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:31.018253178
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:31.021173254
+DEBUG (0): LQI Root is receiving packet from node 1 @0:42:31.026491333
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:42:31.028373470
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:42:31.032199629
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:42:31.041400626
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:42:31.046044935
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:42:31.056054642
+DEBUG (0): LQI Root is receiving packet from node 5 @0:42:31.058595637
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:42:31.065194603
+DEBUG (0): LQI Root is receiving packet from node 5 @0:42:31.068513792
+DEBUG (0): LQI Root is receiving packet from node 6 @0:42:31.075487018
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:31.081147996
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:42:36.007072324
+DEBUG (0): LQI Root is receiving packet from node 1 @0:42:36.010957976
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:42:36.011629241
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:36.023391477
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:42:36.026462358
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:42:36.033151333
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:36.036258444
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:42:36.043399515
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:36.046121228
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:42:36.047402959
+DEBUG (0): LQI Root is receiving packet from node 6 @0:42:36.054162563
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:42:36.064950464
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:36.072549297
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:36.073251197
+DEBUG (0): LQI Root is receiving packet from node 2 @0:42:36.085122465
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 64 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 729 and my cost to 910.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 125.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 561 and my cost to 349.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 125.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:41.012622717
+DEBUG (0): LQI Root is receiving packet from node 1 @0:42:41.014894721
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:41.016168400
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:42:41.017860225
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:42:41.020387734
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:42:41.032022189
+DEBUG (0): LQI Root is receiving packet from node 2 @0:42:41.036355660
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:42:41.045747694
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:41.049026093
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:41.059609919
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:42:41.061639326
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:42:41.062438490
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:41.092492418
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:42:41.096749595
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:42:41.109719490
+DEBUG (0): LQI Root is receiving packet from node 6 @0:42:41.114083478
+DEBUG (0): LQI Root is receiving packet from node 5 @0:42:41.121728087
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 474.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 729 and my cost to 910.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 474.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 106 and my cost to 910.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 474.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 76 and my cost to 474.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 474.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 474.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 1016.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 729 and my cost to 910.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1016.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 76 and my cost to 474.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 1016.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 1016.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1016.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:42:46.006217837
+DEBUG (0): LQI Root is receiving packet from node 1 @0:42:46.008486067
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:42:46.011079927
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:42:46.015659199
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:46.017730499
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:42:46.027017336
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:46.029804014
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:42:46.033756017
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:46.036431954
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:46.039468435
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:42:46.043094341
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:42:46.045434587
+DEBUG (0): LQI Root is receiving packet from node 2 @0:42:46.050042714
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:42:46.052005422
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:46.056085159
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:42:46.065295750
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:42:46.068011798
+DEBUG (0): LQI Root is receiving packet from node 6 @0:42:46.071933284
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:42:46.076282014
+DEBUG (0): LQI Root is receiving packet from node 5 @0:42:46.084826886
+DEBUG (0): LQI Root is receiving packet from node 1 @0:42:51.007967271
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:42:51.017152890
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:51.022989039
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:51.028594694
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:42:51.028892265
+DEBUG (0): LQI Root is receiving packet from node 2 @0:42:51.031594946
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:42:51.037727053
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:42:51.039905273
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:51.045402179
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:42:51.050189637
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:51.058139419
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:51.064731178
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:51.067370933
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:42:51.070178534
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:51.077853660
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:51.084445418
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:51.087848108
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:42:51.095279095
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:42:51.101779301
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:42:51.106738379
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:51.106738379
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:42:51.106738379
+DEBUG (0): LQI Root is receiving packet from node 5 @0:42:51.106738379
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:51.113330137
+DEBUG (0): LQI Root is receiving packet from node 5 @0:42:51.115985151
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:42:56.007205879
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:56.007205879
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:42:56.007205879
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:42:56.009467940
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:56.009467940
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:42:56.009467940
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:42:56.009467940
+DEBUG (0): LQI Root is receiving packet from node 1 @0:42:56.011507289
+DEBUG (0): LQI Root is receiving packet from node 4 @0:42:56.016206969
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:42:56.018882558
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:42:56.018882558
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:42:56.018882558
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:42:56.018882558
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:42:56.018882558
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:42:56.023134300
+DEBUG (0): LQI Root is receiving packet from node 3 @0:42:56.026496650
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:42:56.027488465
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:42:56.028581656
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:56.032622991
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:42:56.034799273
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:42:56.038377742
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:42:56.038377742
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:42:56.038377742
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:42:56.038377742
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:42:56.038377742
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:42:56.040923723
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:42:56.040923723
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:42:56.040923723
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:42:56.040923723
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:42:56.041643104
+DEBUG (0): LQI Root is receiving packet from node 6 @0:42:56.047072979
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:42:56.047072979
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:42:56.047072979
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:42:56.047072979
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:42:56.049783316
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:56.059548884
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:42:56.066461075
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:42:56.066461075
+DEBUG (0): LQI Root is receiving packet from node 2 @0:42:56.066461075
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:42:56.066461075
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:42:56.066461075
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:42:56.069222900
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:42:56.071771103
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:42:56.071771103
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:42:56.071771103
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:56.071771103
+DEBUG (0): LQI Root is receiving packet from node 2 @0:42:56.075143276
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:56.075143276
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:42:56.075143276
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:42:56.076135091
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:56.077096389
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:42:56.077096389
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:42:56.077096389
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:42:56.081139945
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:42:56.087960584
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 5355 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 201.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 3545 and my cost to 201.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 201.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 201.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 201.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 512 and my cost to 201.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 201.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 201.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 201.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 713.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 561 and my cost to 713.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 713.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 713.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 201.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 713.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 201.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 713.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 1274.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 201.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 1274.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 512 and my cost to 201.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 72 that advertises 1274.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 59 that advertises 1274.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 1274.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 201.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:1.011020554
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:43:1.015222361
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:1.017747979
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:1.018282152
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:1.022943263
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:1.026756047
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:1.032670988
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:43:1.036338511
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:43:1.037627844
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:1.039873213
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:43:1.040717758
+DEBUG (0): LQI Root is receiving packet from node 3 @0:43:1.061586343
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:43:1.092398975
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:1.095552209
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:1.102876385
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:43:6.007501459
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:6.008167177
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:6.012529622
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:6.019538682
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:6.022035792
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:43:6.027435033
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:43:6.032092819
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:6.036592474
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:6.039691651
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:43:6.045642544
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:6.048295897
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:43:6.054980869
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:43:6.059497444
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:6.059497444
+DEBUG (0): LQI Root is receiving packet from node 3 @0:43:6.059497444
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:43:6.059497444
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:43:6.064380228
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:43:6.069873360
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:6.069873360
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:6.079165908
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:6.085025249
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:6.092624081
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:43:11.005746708
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:11.005746708
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:43:11.005746708
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:43:11.005746708
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:11.010410206
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:11.019718013
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:43:11.020755604
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:11.022966455
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:43:11.024993641
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:43:11.028690128
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:43:11.031547279
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:43:11.031547279
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:43:11.031547279
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:43:11.031547279
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:43:11.031547279
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:43:11.036929826
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:11.037858946
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:43:11.040900862
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:43:11.044746055
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:43:11.046176599
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:43:11.050407032
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:43:11.050407032
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:11.050407032
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:43:11.050407032
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:43:11.054950351
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:43:11.054950351
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:43:11.054950351
+DEBUG (0): LQI Root is receiving packet from node 6 @0:43:11.054950351
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:11.054950351
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:43:11.057471811
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:43:11.058814576
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:11.063052721
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:43:11.063052721
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:43:11.064490813
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:43:11.066535478
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:43:11.066535478
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:11.066535478
+DEBUG (0): LQI Root is receiving packet from node 6 @0:43:11.066535478
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:11.066535478
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:11.069541442
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:11.069541442
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:43:11.069541442
+DEBUG (0): LQI Root is receiving packet from node 6 @0:43:11.069541442
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:43:11.069541442
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:11.071387745
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:11.072883098
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:43:11.072883098
+DEBUG (0): LQI Root is receiving packet from node 3 @0:43:11.072883098
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:43:11.072883098
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:43:11.072883098
+DEBUG (0): LQI Root is receiving packet from node 3 @0:43:11.078849249
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:43:11.078849249
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:43:11.078849249
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:43:11.078849249
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:43:11.080588741
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:43:11.083014874
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:11.083014874
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:43:11.083014874
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:43:11.083014874
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:43:11.084937471
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:43:11.084937471
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:11.084937471
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:43:11.084937471
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:43:11.084937471
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:43:11.089591374
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:43:11.089591374
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:43:11.089591374
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:43:11.089591374
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:11.089591374
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:43:11.096320461
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:43:11.096320461
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:11.096320461
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:43:11.096320461
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:16.006412426
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:16.006412426
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:43:16.006412426
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:16.006412426
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:43:16.008819419
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:16.008819419
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:43:16.008819419
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:43:16.008819419
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:43:16.013000302
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:43:16.013000302
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:43:16.013000302
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:16.013000302
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:43:16.013000302
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:43:16.016494545
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:16.016494545
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:43:16.018096708
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:16.018844384
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:16.018844384
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:16.018844384
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:43:16.018844384
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:43:16.023818721
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:16.023818721
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:43:16.023818721
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:43:16.023818721
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:16.023818721
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:43:16.024706065
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:16.026763650
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:16.026763650
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:43:16.026763650
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:16.026763650
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:43:16.026763650
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:43:16.029464440
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:43:16.029464440
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:43:16.029464440
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:16.029464440
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:43:16.029464440
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:43:16.031661692
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:16.031661692
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:16.031661692
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:43:16.031661692
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:43:16.036300337
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:43:16.036300337
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:16.036300337
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:16.036300337
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:16.036300337
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:16.036300337
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:43:16.041259415
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:43:16.041259415
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:16.041259415
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:16.041259415
+DEBUG (0): LQI Root is receiving packet from node 3 @0:43:21.006248355
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:43:21.006248355
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:43:21.007265371
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:21.008287585
+DEBUG (0): LQI Root is receiving packet from node 6 @0:43:21.008287585
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:43:21.008287585
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:21.008287585
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:43:21.012850055
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:21.012850055
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:43:21.012850055
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:43:21.012850055
+DEBUG (0): LQI Root is receiving packet from node 6 @0:43:21.017366512
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:43:21.017366512
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:21.017366512
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:43:21.018938276
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:43:21.019380778
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:43:21.021532137
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:43:21.021532137
+DEBUG (0): LQI Root is receiving packet from node 6 @0:43:21.021532137
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:43:21.021532137
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:21.021532137
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:21.021532137
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:43:21.025072155
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:43:21.025072155
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:21.025072155
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:43:21.025072155
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:43:21.025072155
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:43:21.025836752
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:43:21.028108755
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:21.028108755
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:43:21.028108755
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:43:21.028108755
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:43:21.028108755
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:21.029817611
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:43:21.031129859
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:43:21.031129859
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:43:21.031129859
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:21.031129859
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:43:21.033601769
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:43:21.033601769
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:43:21.033601769
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:21.033601769
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:43:21.033601769
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:43:21.036973941
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:43:21.036973941
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:43:21.036973941
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:21.036973941
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:43:21.040727582
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:43:21.040727582
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:21.040727582
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:43:21.040727582
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:43:21.042314605
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:43:21.042314605
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:43:21.053026212
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:43:21.053026212
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:43:21.053026212
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:21.053026212
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:43:21.053026212
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:43:21.053026212
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:26.006692747
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:43:26.006692747
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:43:26.006692747
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:43:26.006692747
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:26.007743707
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:26.008899595
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:26.008899595
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:43:26.008899595
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:43:26.011108224
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:43:26.011108224
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:43:26.011108224
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:43:26.012102260
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:26.012102260
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:43:26.017051514
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:26.017612312
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:26.019151898
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:43:26.019151898
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:43:26.019151898
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:43:26.023654757
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:43:26.023654757
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:43:26.023654757
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:26.024904310
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:26.026903318
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:26.032951080
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:26.032951080
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:26.032951080
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:43:26.032951080
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:43:26.040275256
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:26.040275256
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:43:26.040275256
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:26.040275256
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:43:26.044822348
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:26.044822348
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:26.044822348
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:26.044822348
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:43:26.044822348
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:26.044822348
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:43:26.047492621
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:43:26.047492621
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:26.047492621
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:26.047492621
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:26.047492621
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:43:26.053123081
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:43:26.053123081
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:26.053123081
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:26.053123081
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:43:26.053123081
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:26.053123081
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 67 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3906 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 790.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3906 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 790.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 790.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 790.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 790.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 1255.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1255.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 1255.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 108 that advertises 1255.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 1255.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 1255.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 104 that advertises 1720.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 1720.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 1720.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 62 that advertises 1720.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 1720.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:31.006271216
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:31.009265803
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:31.013429767
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:31.021944240
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:31.025642162
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:31.028131221
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:31.033441249
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:31.035173415
+DEBUG (0): LQI Root is receiving packet from node 3 @0:43:31.040246629
+DEBUG (0): LQI Root is receiving packet from node 6 @0:43:31.055642657
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:36.010240817
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:36.013772784
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:36.016300064
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:36.018630763
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:36.021823713
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:36.027488465
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:36.029802352
+DEBUG (0): LQI Root is receiving packet from node 3 @0:43:36.042274145
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:36.050187976
+DEBUG (0): LQI Root is receiving packet from node 6 @0:43:36.055391192
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:43:41.005206989
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:41.007814684
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:41.009081038
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:41.010370094
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:43:41.014070633
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:41.018396170
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:41.021598607
+DEBUG (0): LQI Root is receiving packet from node 6 @0:43:41.025369396
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:41.032897647
+DEBUG (0): LQI Root is receiving packet from node 3 @0:43:41.035226516
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 72 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 216.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 216.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 79 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 915.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1255.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 915.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 915.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 77 that advertises 915.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 915.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 216.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:46.009187967
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:46.014194363
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:46.018386623
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:46.025621469
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:43:46.032411590
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:43:46.036920232
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:46.038459470
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:46.041614247
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:43:46.045600542
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:46.050021791
+DEBUG (0): LQI Root is receiving packet from node 6 @0:43:46.057254415
+DEBUG (0): LQI Root is receiving packet from node 3 @0:43:46.067203087
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 1837.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1255.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1837.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 1837.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 1837.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 1837.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 216.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:51.008257068
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:51.011354702
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:43:51.019855341
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:51.022216557
+DEBUG (0): LQI Root is receiving packet from node 6 @0:43:51.026523393
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:51.027240552
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:51.033893345
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:43:51.039621022
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:51.042670872
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:51.046456920
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:43:51.050254445
+DEBUG (0): LQI Root is receiving packet from node 3 @0:43:51.057532845
+DEBUG (0): LQI Root is receiving packet from node 5 @0:43:56.007354583
+DEBUG (0): LQI Root is receiving packet from node 1 @0:43:56.009294778
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:43:56.010196584
+DEBUG (0): LQI Root is receiving packet from node 4 @0:43:56.015338766
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:43:56.026437505
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:43:56.029314074
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:43:56.031425210
+DEBUG (0): LQI Root is receiving packet from node 2 @0:43:56.033105557
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:43:56.037391361
+DEBUG (0): LQI Root is receiving packet from node 3 @0:43:56.042182593
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:43:56.046693733
+DEBUG (0): LQI Root is receiving packet from node 6 @0:43:56.055345416
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1255.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:44:1.006656566
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:1.010195041
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:1.013366511
+DEBUG (0): LQI Root is receiving packet from node 4 @0:44:1.017778615
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:44:1.019159105
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:44:1.021705418
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:44:1.024065081
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:44:1.031425210
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:44:1.042070347
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:1.048059083
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:1.055322224
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:1.064660549
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 280.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1255.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 280.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 280.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 280.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 380 and my cost to 280.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 280.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 280.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 280.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 660.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 420 and my cost to 660.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 660.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 52 and my cost to 660.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 660.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 280.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 660.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 1080.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 52 and my cost to 660.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 1080.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 380 and my cost to 280.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 78 that advertises 1080.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1080.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 280.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:44:6.014261063
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:6.016710506
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:44:6.018802491
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:44:6.020616615
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:44:6.021095070
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:44:6.025668906
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:44:6.033754474
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:44:6.037248598
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:6.038957691
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:6.041350967
+DEBUG (0): LQI Root is receiving packet from node 4 @0:44:6.049181020
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:6.055755180
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:44:6.060763916
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:44:6.065600924
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:6.070376897
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:44:6.074008467
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:6.079547376
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:6.088778889
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:44:11.006004215
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:11.012374696
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:11.016496884
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:44:11.019540573
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:11.022495096
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:44:11.025613535
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:11.028436395
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:44:11.033557654
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:44:11.036226265
+DEBUG (0): LQI Root is receiving packet from node 2 @0:44:11.038217222
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:44:11.039483694
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:44:11.044435446
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:44:11.047204596
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:11.053903165
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:44:11.059365780
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:44:11.068444706
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:44:11.074059908
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:44:11.074059908
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:44:11.074059908
+DEBUG (0): LQI Root is receiving packet from node 4 @0:44:11.074059908
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:44:11.074059908
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:44:11.074059908
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:44:11.079919249
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:44:11.080834771
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:44:11.089455936
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:44:11.097161580
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:44:11.099908146
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:44:11.102959886
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:44:16.007234853
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:16.007234853
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:44:16.010505532
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:44:16.012788902
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:44:16.015937629
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:44:16.015937629
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:44:16.015937629
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:16.015937629
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:44:16.015937629
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:44:16.017719123
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:44:16.022357768
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:44:16.024635088
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:44:16.030143479
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:44:16.033969639
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:16.038436555
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:16.052184644
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:44:16.056243458
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:44:16.056243458
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:44:16.056243458
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:16.056243458
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:16.056243458
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:16.058295780
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:44:16.062102799
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:44:16.062102799
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:16.062102799
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:16.062102799
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:16.062102799
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:44:16.067534896
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:16.075393127
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:44:16.075393127
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:16.075393127
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:44:16.075393127
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:16.075393127
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:44:16.077186051
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:16.079146767
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:44:16.080184358
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:16.081557641
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:44:16.081557641
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:44:16.083571790
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:44:16.083571790
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:44:16.083571790
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:16.083571790
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:16.085585938
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:16.087493276
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:44:16.087493276
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:16.087493276
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:44:16.094680123
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:16.094680123
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:16.094680123
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:16.094680123
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:44:16.094680123
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:44:16.096656152
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:44:16.096656152
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:16.096656152
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:16.096656152
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:16.096656152
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:16.103644637
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:44:16.103644637
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:16.103644637
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:44:16.103644637
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:16.103644637
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 63 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:44:21.007738272
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:44:21.007738272
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:44:21.007738272
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:44:21.009235286
+DEBUG (0): LQI Root is receiving packet from node 4 @0:44:21.009235286
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:44:21.010215617
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:44:21.010215617
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:44:21.012054263
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:21.012054263
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:44:21.012054263
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:21.013750318
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:44:21.014091326
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:21.014091326
+DEBUG (0): LQI Root is receiving packet from node 4 @0:44:21.017398690
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:44:21.017398690
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:44:21.017398690
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:44:21.018432400
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:44:21.020835672
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:21.020835672
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:44:21.020835672
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:44:21.020835672
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:44:21.023339989
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:44:21.023339989
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:21.023339989
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:44:21.023339989
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:44:21.023339989
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:44:21.023339989
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:44:21.028034004
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:21.028034004
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:44:21.028034004
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:21.028034004
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:44:21.032174776
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:44:21.032174776
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:21.032174776
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:44:21.032174776
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:44:21.035800683
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:21.035800683
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:44:21.035800683
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:44:21.035800683
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:44:21.035800683
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:21.037698426
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:44:21.037698426
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:21.037698426
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:21.037698426
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:44:21.037698426
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:21.040668208
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:44:21.040668208
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:44:21.040668208
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:44:21.040668208
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:44:21.040668208
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:44:21.042062414
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:44:21.043206817
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:44:21.043206817
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:21.043206817
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:21.043206817
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:21.043206817
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:44:21.046182263
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:44:21.046182263
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:44:21.046182263
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:21.046182263
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:21.046182263
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:44:21.046182263
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:44:21.055108603
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:21.055108603
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:44:21.055108603
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:21.055108603
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:44:21.055108603
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:21.055108603
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:44:26.005897405
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:44:26.005897405
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:26.005897405
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:44:26.005897405
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:26.007110444
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:44:26.007110444
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:26.008440291
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:26.008440291
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:44:26.010593310
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:44:26.010593310
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:44:26.010593310
+DEBUG (0): LQI Root is receiving packet from node 2 @0:44:26.011804412
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:44:26.011804412
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:44:26.013580133
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:26.013580133
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:26.015444034
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:44:26.015444034
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:26.017749641
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:44:26.017749641
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:44:26.020715493
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:44:26.020715493
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:44:26.020715493
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:44:26.023074927
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:44:26.023074927
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:26.023456394
+DEBUG (0): LQI Root is receiving packet from node 4 @0:44:26.024782358
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:44:26.027755465
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:44:26.027755465
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:44:26.029260365
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:26.031635058
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:44:26.031635058
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:44:26.031635058
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:44:26.031635058
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:44:26.033492736
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:44:26.036684144
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:26.036684144
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:44:26.036684144
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:44:26.037612585
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:44:26.037612585
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:44:26.037612585
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:44:26.040193645
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:44:26.040193645
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:26.040193645
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:44:26.040193645
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:44:26.040193645
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:44:26.040795942
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:26.044374529
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:26.044374529
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:26.044374529
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:44:26.044374529
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:26.047179790
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:44:26.047179790
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:44:26.047179790
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:44:26.047179790
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:44:26.047179790
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:44:26.052904142
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:26.052904142
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:44:26.052904142
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:26.052904142
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:44:26.052904142
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:44:26.052904142
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:44:26.055556817
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:26.055556817
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:26.055556817
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:26.055556817
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:44:26.055556817
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:44:26.060899701
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:26.060899701
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:26.060899701
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:26.060899701
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:44:26.063417387
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:44:26.063417387
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:26.063417387
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:44:26.063417387
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:26.063417387
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:44:26.068559569
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:44:26.068559569
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:26.068559569
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:26.068559569
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:26.068559569
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:44:26.068559569
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:26.079362728
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:26.079362728
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:26.079362728
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:44:31.007265371
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:44:31.007265371
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:31.007265371
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:31.007265371
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:44:31.007265371
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:44:31.010248025
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:44:31.010248025
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:31.010276651
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:44:31.014673048
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:44:31.014673048
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:44:31.014673048
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:44:31.014673048
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:31.016588318
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:31.016588318
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:44:31.016588318
+DEBUG (0): LQI Root is receiving packet from node 2 @0:44:31.017862116
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:31.018714713
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:44:31.019698872
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:44:31.020761269
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:44:31.020761269
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:31.020761269
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:44:31.024400773
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:44:31.024400773
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:44:31.025094740
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:44:31.026336406
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:44:31.026336406
+DEBUG (0): LQI Root is receiving packet from node 2 @0:44:31.026496650
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:44:31.026496650
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:44:31.030389509
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:44:31.030389509
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:31.030389509
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:31.030389509
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:31.030389509
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:44:31.032470404
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:44:31.032470404
+DEBUG (0): LQI Root is receiving packet from node 2 @0:44:31.032470404
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:44:31.032470404
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:44:31.032470404
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:44:31.035064383
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:44:31.035064383
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:44:31.035064383
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:44:31.035064383
+DEBUG (0): LQI Root is receiving packet from node 2 @0:44:31.035064383
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:44:31.035064383
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:44:31.038827570
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:44:31.038827570
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:44:31.038827570
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:44:31.038827570
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:31.038827570
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:44:31.038827570
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:44:31.043456668
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:44:31.043456668
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:44:31.043456668
+DEBUG (0): LQI Root is receiving packet from node 2 @0:44:31.043456668
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:44:31.043456668
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:44:31.043456668
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 1518.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 2744 and my cost to 1518.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 1518.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 1518.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1518.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 2130.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 2130.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 2130.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 2130.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 2130.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 2985.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 2985.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 1518.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 72 that advertises 2985.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 2985.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:36.005907346
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:36.008315881
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:44:36.019260252
+DEBUG (0): LQI Root is receiving packet from node 2 @0:44:36.022073517
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:36.033683497
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:44:36.040834392
+DEBUG (0): LQI Root is receiving packet from node 4 @0:44:36.044351219
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:44:36.051622293
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:36.056627147
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:41.009803632
+DEBUG (0): LQI Root is receiving packet from node 2 @0:44:41.012002775
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:41.016145934
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:44:41.019228073
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:41.021163707
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:44:41.026752274
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:44:41.033221962
+DEBUG (0): LQI Root is receiving packet from node 4 @0:44:41.044620211
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:41.048526438
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:44:46.010271216
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:46.013521438
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:46.016570838
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:46.022315766
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:44:46.026187702
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:44:46.043948828
+DEBUG (0): LQI Root is receiving packet from node 2 @0:44:46.049066157
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:46.056832836
+DEBUG (0): LQI Root is receiving packet from node 4 @0:44:46.060876391
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 64 that advertises 307.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 2130.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 307.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 307.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 82 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 1241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 1241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1241.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 2457.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 2130.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2457.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 2457.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 2457.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 307.
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:51.008270105
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:51.011451571
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:44:51.023576803
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:51.026247193
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:44:51.028482171
+DEBUG (0): LQI Root is receiving packet from node 2 @0:44:51.035958934
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:44:51.040317258
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:51.053195601
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:44:51.056094754
+DEBUG (0): LQI Root is receiving packet from node 4 @0:44:51.062564442
+DEBUG (0): LQI Root is receiving packet from node 1 @0:44:56.007158560
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:44:56.011919156
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:44:56.012216397
+DEBUG (0): LQI Root is receiving packet from node 2 @0:44:56.019662642
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:44:56.024555021
+DEBUG (0): LQI Root is receiving packet from node 5 @0:44:56.027938570
+DEBUG (0): LQI Root is receiving packet from node 3 @0:44:56.038398436
+DEBUG (0): LQI Root is receiving packet from node 6 @0:44:56.044620211
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:44:56.048740060
+DEBUG (0): LQI Root is receiving packet from node 4 @0:44:56.055255525
+DEBUG (0): LQI Root is receiving packet from node 3 @0:45:1.008827075
+DEBUG (0): LQI Root is receiving packet from node 5 @0:45:1.013473322
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:1.015048851
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:1.018724536
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:1.033159385
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:1.035112380
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:1.041750033
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:1.059282279
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:1.061379928
+DEBUG (0): LQI Root is receiving packet from node 2 @0:45:1.069299194
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 62 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 2130.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 334.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 334.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 334.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 334.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 334.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 334.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:6.005863113
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:45:6.008201468
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:6.010744354
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:45:6.013824272
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:6.019487471
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:6.026521850
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:6.028612174
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:6.041643104
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:45:6.043771388
+DEBUG (0): LQI Root is receiving packet from node 3 @0:45:6.052026345
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:6.053994717
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:45:6.064355375
+DEBUG (0): LQI Root is receiving packet from node 2 @0:45:6.069421263
+DEBUG (0): LQI Root is receiving packet from node 5 @0:45:6.075280604
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 1036.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 1036.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 334.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 1036.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 334.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 1036.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1036.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1501.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 334.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 1501.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 1501.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 1501.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 334.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:45:11.006431459
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:11.010835906
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:11.013416170
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:11.018327810
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:11.022205181
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:11.024156633
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:11.028650017
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:45:11.031509105
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:45:11.033944786
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:11.051301861
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:45:11.055612140
+DEBUG (0): LQI Root is receiving packet from node 3 @0:45:11.059953544
+DEBUG (0): LQI Root is receiving packet from node 2 @0:45:11.066804700
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:45:16.007659757
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:16.009645728
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:16.011773895
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:16.014438503
+DEBUG (0): LQI Root is receiving packet from node 2 @0:45:16.019235399
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:16.021822052
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:45:16.025550610
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:16.027673460
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:45:16.029138295
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:16.031236670
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:45:16.035211258
+DEBUG (0): LQI Root is receiving packet from node 5 @0:45:16.039056450
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:16.047143561
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 65 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1036.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 334.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 125.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 125.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 334.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:45:21.016059699
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:21.018846724
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:21.025285777
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:21.027927193
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:21.034183260
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:21.035913158
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:45:21.036452924
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:45:21.041375773
+DEBUG (0): LQI Root is receiving packet from node 2 @0:45:21.044000269
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:21.045367888
+DEBUG (0): LQI Root is receiving packet from node 3 @0:45:21.051782206
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:45:21.055276448
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:21.061913983
+DEBUG (0): LQI Root is receiving packet from node 5 @0:45:21.076928544
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 459.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1036.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 459.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 334.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 459.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 459.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 1124.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1036.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1124.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 459.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 1124.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 334.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 1124.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 1124.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 125.
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:45:26.005832596
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:26.014001665
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:45:26.016219888
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:26.018114306
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:45:26.021392587
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:26.023714131
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:45:26.027412172
+DEBUG (0): LQI Root is receiving packet from node 2 @0:45:26.029466779
+DEBUG (0): LQI Root is receiving packet from node 5 @0:45:26.042894435
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:45:26.046159679
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:45:26.049857719
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:45:26.056113786
+DEBUG (0): LQI Root is receiving packet from node 3 @0:45:26.058845094
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:26.061210192
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:45:26.064643400
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:26.065696250
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:26.072928874
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:26.081489004
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:31.007555286
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:31.008188100
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:31.015840642
+DEBUG (0): LQI Root is receiving packet from node 2 @0:45:31.017282285
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:45:31.020881448
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:45:31.025642162
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:45:31.027866159
+DEBUG (0): LQI Root is receiving packet from node 3 @0:45:31.035026263
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:45:31.040958123
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:45:31.044635470
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:45:31.047591775
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:31.051746024
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:31.059299081
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:45:31.061343746
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:45:31.067721883
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:31.073688035
+DEBUG (0): LQI Root is receiving packet from node 5 @0:45:31.076846586
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:31.087222502
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:36.012315882
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:36.016145934
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:36.017511166
+DEBUG (0): LQI Root is receiving packet from node 2 @0:45:36.023278954
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:45:36.029197439
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:45:36.030048153
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:45:36.034187034
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:45:36.044860468
+DEBUG (0): LQI Root is receiving packet from node 3 @0:45:36.050941087
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:45:36.056243458
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:45:36.057605365
+DEBUG (0): LQI Root is receiving packet from node 5 @0:45:36.061934953
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:36.065204198
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:45:36.069659738
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:45:36.074618815
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:36.081424196
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:36.083255240
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:36.090274242
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 334.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 459.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 334.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 152.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1036.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 152.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 1331 and my cost to 152.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 152.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 459.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 152.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 152.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 152.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 511.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 5, my link to 380 and my cost to 511.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 511.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 511.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 5, my link to 52 and my cost to 511.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 511.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 152.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 511.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 125.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 891.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 52 and my cost to 511.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 891.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 459.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 64 that advertises 891.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 891.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 125.
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:45:41.017871710
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:41.018938158
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:45:41.021384985
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:45:41.029853564
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:41.039445969
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:41.044564841
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:45:41.046752547
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:45:41.052110572
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:45:41.055581622
+DEBUG (0): LQI Root is receiving packet from node 2 @0:45:41.059075865
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:45:41.062608557
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:45:41.064912621
+DEBUG (0): LQI Root is receiving packet from node 3 @0:45:41.069451781
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:41.072427227
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:45:41.076677079
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:41.084084874
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:41.087487564
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:41.092156726
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:45:41.093911477
+DEBUG (0): LQI Root is receiving packet from node 5 @0:45:41.102532642
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:46.008608136
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:45:46.009906669
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:45:46.010772532
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:46.015710639
+DEBUG (0): LQI Root is receiving packet from node 2 @0:45:46.022424467
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:46.028261224
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:45:46.033378323
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:45:46.038428953
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:45:46.050330739
+DEBUG (0): LQI Root is receiving packet from node 3 @0:45:46.053733429
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:46.059363889
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:45:46.061507710
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:46.066733841
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:45:46.069091284
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:45:46.077468310
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:45:46.077468310
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:46.077468310
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:46.077468310
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:46.077468310
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:45:46.077468310
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:46.083159805
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:46.085753784
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:46.092864338
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:46.099639201
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:51.009021664
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:45:51.009021664
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:45:51.009021664
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:45:51.011047189
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:45:51.013658766
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:45:51.015212814
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:45:51.017871710
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:51.017871710
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:45:51.023881977
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:45:51.029146228
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:45:51.029146228
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:45:51.029146228
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:51.029146228
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:51.031480809
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:45:51.033967977
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:45:51.036346113
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:51.036346113
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:45:51.036346113
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:45:51.039323781
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:45:51.039323781
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:45:51.039323781
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:51.039323781
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:45:51.039323781
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:45:51.044351219
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:51.046449594
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:45:51.047029425
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:51.048570553
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:45:51.048570553
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:45:51.048936762
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:45:51.051049788
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:45:51.051049788
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:51.051049788
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:45:51.051049788
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:51.055482744
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:45:51.055482744
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:45:51.055482744
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:51.056420851
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:45:51.057107492
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:45:51.058297671
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:45:51.058297671
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:45:51.058297671
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:45:51.061074754
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:45:51.061074754
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:45:51.061074754
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:51.061074754
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:45:51.061761396
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:51.061761396
+DEBUG (0): LQI Root is receiving packet from node 2 @0:45:51.065370382
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:45:51.066201677
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:45:51.066201677
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:45:51.066201677
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:45:51.071160755
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:51.071160755
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:45:51.071160755
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:45:51.071160755
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:45:51.071160755
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:45:51.074609221
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:45:51.074609221
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:45:51.074609221
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:51.074868619
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:45:51.077279494
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:45:51.077279494
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:45:51.077279494
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:45:51.077279494
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:51.077279494
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:45:51.077279494
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:45:51.083520302
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:45:51.083520302
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:51.083520302
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:45:51.083520302
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:45:51.083520302
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:45:51.088708260
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:45:51.088708260
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:51.088708260
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:45:51.088708260
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:45:51.088708260
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 111 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 93 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:45:56.006030959
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:56.006030959
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:45:56.006030959
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:45:56.006030959
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:45:56.007119991
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:56.009706644
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:56.009706644
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:56.009706644
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:45:56.009706644
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:45:56.009706644
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:45:56.011504950
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:45:56.012193931
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:56.012193931
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:45:56.012193931
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:45:56.012193931
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:45:56.012193931
+DEBUG (0): LQI Root is receiving packet from node 2 @0:45:56.015680122
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:45:56.015680122
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:45:56.015680122
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:45:56.018999311
+DEBUG (0): LQI Root is receiving packet from node 4 @0:45:56.018999311
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:45:56.018999311
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:45:56.019469991
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:56.021173254
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:45:56.021173254
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:45:56.021173254
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:45:56.022539211
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:45:56.024461926
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:45:56.024461926
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:56.024461926
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:56.024461926
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:45:56.029754355
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:56.029754355
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:45:56.029754355
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:45:56.029754355
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:45:56.029754355
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:45:56.032640471
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:56.032640471
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:45:56.032640471
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:45:56.032640471
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:45:56.032640471
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:45:56.033388147
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:56.035384815
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:45:56.035384815
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:45:56.035384815
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:45:56.036529218
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:56.038116123
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:45:56.038116123
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:45:56.038116123
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:45:56.038116123
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:45:56.038116123
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:45:56.046874616
+DEBUG (0): LQI Root is receiving packet from node 1 @0:45:56.046874616
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:45:56.046874616
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:45:56.046874616
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:45:56.049041352
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:45:56.049041352
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:45:56.049041352
+DEBUG (0): LQI Root is receiving packet from node 6 @0:45:56.049041352
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:45:56.049041352
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:45:56.049041352
+DEBUG (0): LQI Root is receiving packet from node 4 @0:46:1.006168287
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:46:1.006168287
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:1.008155692
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:46:1.008155692
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:1.009447247
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:46:1.015128918
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:1.015128918
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:1.015128918
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:46:1.015886418
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:46:1.015886418
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:1.019614976
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:46:1.019614976
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:46:1.019614976
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:1.019614976
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:46:1.019614976
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:46:1.020937048
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:46:1.023012231
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:1.023012231
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:46:1.023012231
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:1.023012231
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:46:1.029472096
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:1.029472096
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:46:1.029472096
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:46:1.029472096
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:1.030427959
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:46:1.031928747
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:1.031928747
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:1.031928747
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:1.031928747
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:46:1.031928747
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:46:1.036857307
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:46:1.036857307
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:1.036857307
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:1.036857307
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:46:1.036857307
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:1.036857307
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:46:6.007463616
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:6.007463616
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:46:6.009265803
+DEBUG (0): LQI Root is receiving packet from node 2 @0:46:6.009744487
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:46:6.009744487
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:46:6.010683319
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:46:6.011489691
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:46:6.011489691
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:6.012275541
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:46:6.012275541
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:46:6.012275541
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:46:6.016357216
+DEBUG (0): LQI Root is receiving packet from node 5 @0:46:6.016357216
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:46:6.016357216
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:46:6.016357216
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:46:6.017432982
+DEBUG (0): LQI Root is receiving packet from node 4 @0:46:6.019061889
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:46:6.019061889
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:46:6.019061889
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:46:6.019061889
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:46:6.021415502
+DEBUG (0): LQI Root is receiving packet from node 2 @0:46:6.021415502
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:46:6.021415502
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:46:6.021415502
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:46:6.022598025
+DEBUG (0): LQI Root is receiving packet from node 5 @0:46:6.024768643
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:46:6.024768643
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:46:6.024768643
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:46:6.024768643
+DEBUG (0): LQI Root is receiving packet from node 2 @0:46:6.026908634
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:46:6.026908634
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:46:6.026908634
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:46:6.028854092
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:6.028854092
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:46:6.029681944
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:46:6.030036668
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:46:6.034133602
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:46:6.034133602
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:46:6.034133602
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:46:6.034133602
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:46:6.036018078
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:46:6.036933600
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:46:6.036933600
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:6.037597327
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:46:6.042220713
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:6.042220713
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:46:6.042220713
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:46:6.042953130
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:46:6.051116535
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:6.051116535
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:46:6.051116535
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:46:6.051116535
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:46:6.057769328
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:46:6.057769328
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:46:6.057769328
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:6.057769328
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 1076.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 1076.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 1076.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 1745.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1745.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 1745.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 1745.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 1745.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 1745.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 2306.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 2306.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 2306.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 2306.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 2306.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:46:11.006792351
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:11.009798197
+DEBUG (0): LQI Root is receiving packet from node 2 @0:46:11.012430019
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:11.013236839
+DEBUG (0): LQI Root is receiving packet from node 5 @0:46:11.023086303
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:46:11.026355547
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:11.030158738
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:46:11.030765312
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:11.038581540
+DEBUG (0): LQI Root is receiving packet from node 4 @0:46:11.044135707
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:46:16.007923038
+DEBUG (0): LQI Root is receiving packet from node 1 @0:46:16.016542660
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:16.018587208
+DEBUG (0): LQI Root is receiving packet from node 5 @0:46:16.022170781
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:16.032081334
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:46:16.036272041
+DEBUG (0): LQI Root is receiving packet from node 2 @0:46:16.041055340
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:16.051690654
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:16.061074754
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:16.068231085
+DEBUG (0): LQI Root is receiving packet from node 2 @0:46:21.013101401
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:21.014152361
+DEBUG (0): LQI Root is receiving packet from node 1 @0:46:21.015276188
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:21.017992119
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:21.021308692
+DEBUG (0): LQI Root is receiving packet from node 5 @0:46:21.029540733
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:46:21.038806647
+DEBUG (0): LQI Root is receiving packet from node 4 @0:46:21.045627285
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:46:21.049716617
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:21.056125271
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 307.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 307.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 307.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 1201.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1745.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 1201.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 1201.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 1201.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1201.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 307.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:26.007784048
+DEBUG (0): LQI Root is receiving packet from node 1 @0:46:26.016268004
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:46:26.016931335
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:46:26.019702754
+DEBUG (0): LQI Root is receiving packet from node 2 @0:46:26.023324730
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:46:26.026386065
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:26.030847270
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:26.039756460
+DEBUG (0): LQI Root is receiving packet from node 5 @0:46:26.043944946
+DEBUG (0): LQI Root is receiving packet from node 4 @0:46:26.048883053
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:26.058524661
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:26.064994350
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1621.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1745.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1621.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 1621.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 1621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 307.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:46:31.005594121
+DEBUG (0): LQI Root is receiving packet from node 5 @0:46:31.008895712
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:31.017555051
+DEBUG (0): LQI Root is receiving packet from node 2 @0:46:31.020281042
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:31.025657421
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:31.036089055
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:46:31.036685687
+DEBUG (0): LQI Root is receiving packet from node 1 @0:46:31.041460117
+DEBUG (0): LQI Root is receiving packet from node 4 @0:46:31.049486194
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:31.055894729
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:46:31.062028727
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:31.068727296
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:36.006950255
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:46:36.009494684
+DEBUG (0): LQI Root is receiving packet from node 5 @0:46:36.012969785
+DEBUG (0): LQI Root is receiving packet from node 1 @0:46:36.015932312
+DEBUG (0): LQI Root is receiving packet from node 4 @0:46:36.022768210
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:46:36.023751974
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:36.025590951
+DEBUG (0): LQI Root is receiving packet from node 2 @0:46:36.030130111
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:36.032373140
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:46:36.036409369
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:36.041345255
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:36.051614360
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 307.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:46:41.007829943
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:46:41.010562793
+DEBUG (0): LQI Root is receiving packet from node 5 @0:46:41.014983933
+DEBUG (0): LQI Root is receiving packet from node 4 @0:46:41.018482058
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:41.021247657
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:46:41.025720346
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:41.028474845
+DEBUG (0): LQI Root is receiving packet from node 2 @0:46:41.033532801
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:41.039498952
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:46:41.041521034
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:41.045678726
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:41.055062826
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 68 that advertises 359.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1745.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 359.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 359.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 359.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 359.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 359.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 1036.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1036.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 1036.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 108 that advertises 1036.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 1036.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 1036.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 359.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 1036.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 307.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 104 that advertises 1765.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 1036.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 1765.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 1765.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 1765.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 1765.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 359.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:46:46.006609247
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:46:46.009281062
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:46:46.011194064
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:46:46.017486360
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:46.022310331
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:46.023628014
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:46.028831231
+DEBUG (0): LQI Root is receiving packet from node 4 @0:46:46.047534623
+DEBUG (0): LQI Root is receiving packet from node 2 @0:46:46.060092533
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:46.075213905
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:46:46.083251357
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:46:46.096373839
+DEBUG (0): LQI Root is receiving packet from node 5 @0:46:46.098754196
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:46.105864751
+DEBUG (0): LQI Root is receiving packet from node 1 @0:46:51.007128042
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:51.014345289
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:46:51.023294213
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:46:51.025897786
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:46:51.028472624
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:51.030997966
+DEBUG (0): LQI Root is receiving packet from node 2 @0:46:51.045007343
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:46:51.046024012
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:46:51.050601622
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:51.054528772
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:51.063178564
+DEBUG (0): LQI Root is receiving packet from node 4 @0:46:51.066247454
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:51.073068092
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:46:56.009239060
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:46:56.013635456
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:46:56.033311853
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:46:56.035216970
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:46:56.040088377
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:46:56.044503806
+DEBUG (0): LQI Root is receiving packet from node 3 @0:46:56.048845328
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:46:56.050449035
+DEBUG (0): LQI Root is receiving packet from node 1 @0:46:56.056016917
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:46:56.059619513
+DEBUG (0): LQI Root is receiving packet from node 5 @0:46:56.073015109
+DEBUG (0): LQI Root is receiving packet from node 6 @0:46:56.082414468
+DEBUG (0): LQI Root is receiving packet from node 4 @0:46:56.088289068
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 66 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1036.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 216.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 359.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 216.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 484.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1036.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 484.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 484.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 484.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 484.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 1201.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1036.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1201.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 484.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 1201.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 359.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 1201.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 1201.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 216.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:1.011001413
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:47:1.011682342
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:1.013816670
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:1.016679989
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:1.018466799
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:1.023759907
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:47:1.026878117
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:1.029955058
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:1.033694982
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:1.034946195
+DEBUG (0): LQI Root is receiving packet from node 3 @0:47:1.037523373
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:1.040393551
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:1.041766834
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:1.046237633
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:47:1.049075752
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:47:1.059207528
+DEBUG (0): LQI Root is receiving packet from node 5 @0:47:1.066348600
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:47:1.081363161
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:47:1.090640450
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:1.094317797
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:6.013201005
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:6.015323507
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:6.016542542
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:6.019973528
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:47:6.022668606
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:6.032495209
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:6.038016968
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:47:6.039827318
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:47:6.042182593
+DEBUG (0): LQI Root is receiving packet from node 3 @0:47:6.048575988
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:6.049440299
+DEBUG (0): LQI Root is receiving packet from node 3 @0:47:6.057029308
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:6.065513145
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:47:6.074424226
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:47:6.075675440
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:47:6.083640481
+DEBUG (0): LQI Root is receiving packet from node 5 @0:47:6.088431713
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:6.093009323
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:47:11.015924261
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:11.017875484
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:11.018741456
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:11.021837429
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:47:11.028678644
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:11.032076017
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:11.038257333
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:11.049254974
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:11.054507849
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:11.057006393
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:11.063691925
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:47:11.068437381
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:11.071959919
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:47:11.075957699
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:47:11.081435572
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:47:11.087813708
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:11.100953789
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:11.108522104
+DEBUG (0): LQI Root is receiving packet from node 5 @0:47:11.114747653
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 65 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1036.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 484.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 359.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 250.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1036.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 250.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 1036.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 250.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 484.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 250.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 250.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 548.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 5, my link to 380 and my cost to 548.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 548.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 548.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 5, my link to 125 and my cost to 548.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 548.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 548.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 216.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 928.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 125 and my cost to 548.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 928.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 484.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 928.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 66 that advertises 928.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 928.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:16.007041807
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:16.009155110
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:47:16.017465390
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:16.020891390
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:47:16.024209735
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:16.027377880
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:16.031221411
+DEBUG (0): LQI Root is receiving packet from node 3 @0:47:16.034700513
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:16.040605630
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:16.042697615
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:16.054538366
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:16.059817876
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:16.063296860
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:47:16.065936615
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:16.069308788
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:47:16.074222089
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:47:16.074222089
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:47:16.074222089
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:16.074222089
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:16.074222089
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:47:16.074222089
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:16.078235127
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:16.079547376
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:47:16.082171872
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:16.086856293
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:47:21.007158560
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:21.009754082
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:47:21.013559162
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:21.016771423
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:47:21.016977111
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:47:21.019479538
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:47:21.025140516
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:21.025140516
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:47:21.025140516
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:47:21.025140516
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:47:21.028619499
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:21.030929275
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:47:21.034143149
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:47:21.034143149
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:47:21.034143149
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:47:21.034143149
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:21.034143149
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:21.039123197
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:21.039123197
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:21.039766283
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:47:21.043593996
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:47:21.043593996
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:21.043593996
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:47:21.043593996
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:47:21.043593996
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:47:21.045348746
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:21.046569442
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:47:21.046569442
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:47:21.046569442
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:21.047240825
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:47:21.047240825
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:47:21.049318230
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:47:21.054122499
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:21.054122499
+DEBUG (0): LQI Root is receiving packet from node 5 @0:47:21.054122499
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:21.054122499
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:21.055343195
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:47:21.060943138
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:21.060943138
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:47:21.060943138
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:21.060943138
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:21.060943138
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:47:21.063994878
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:21.063994878
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:47:21.063994878
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:21.063994878
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:21.063994878
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:47:21.066939807
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:21.066939807
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:21.066939807
+DEBUG (0): LQI Root is receiving packet from node 5 @0:47:21.066939807
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:21.066939807
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:21.073684152
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:21.073684152
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:21.073684152
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:21.073684152
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:21.073684152
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:21.078887369
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:21.078887369
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:21.078887369
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:21.078887369
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:21.078887369
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:21.081664452
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:21.081664452
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:21.081664452
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:21.081664452
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:21.081664452
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:21.082717303
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:21.084136362
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:21.084136362
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:21.084136362
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:21.084136362
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:21.088775007
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:21.088775007
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:21.088775007
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:21.088775007
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:21.088775007
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:21.093016925
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:21.093016925
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:21.093016925
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:21.093016925
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:26.006700681
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:47:26.006700681
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:26.009158992
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:26.009158992
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:26.009158992
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:26.009158992
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:47:26.010032512
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:26.013812896
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:26.013812896
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:26.013812896
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:26.015231955
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:47:26.017906001
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:47:26.017906001
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:26.017906001
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:47:26.017906001
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:47:26.023734825
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:26.023734825
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:26.023734825
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:47:26.023734825
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:47:26.025108108
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:26.027198550
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:26.027198550
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:26.027198550
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:47:26.028079780
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:47:26.034595245
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:47:26.034595245
+DEBUG (0): LQI Root is receiving packet from node 3 @0:47:26.034595245
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:47:26.034595245
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:26.034595245
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:47:26.042606063
+DEBUG (0): LQI Root is receiving packet from node 3 @0:47:26.042606063
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:47:26.042606063
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:47:26.043780983
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:47:26.043780983
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:47:26.049808169
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:26.049808169
+DEBUG (0): LQI Root is receiving packet from node 3 @0:47:26.049808169
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:47:26.049808169
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 63 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 77 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 111 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:47:31.005563604
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:47:31.005563604
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:31.005563604
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:47:31.005563604
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:31.007723132
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:47:31.007723132
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:31.009006405
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:31.009006405
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:31.009935525
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:31.009935525
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:47:31.013259700
+DEBUG (0): LQI Root is receiving packet from node 5 @0:47:31.013259700
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:31.013259700
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:31.013259700
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:47:31.014533829
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:47:31.016344297
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:47:31.017413949
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:47:31.017413949
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:31.019061889
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:47:31.020583876
+DEBUG (0): LQI Root is receiving packet from node 5 @0:47:31.022279931
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:47:31.022279931
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:31.022279931
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:47:31.023088643
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:47:31.023088643
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:47:31.023088643
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:31.024856312
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:31.024856312
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:47:31.027240552
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:47:31.027240552
+DEBUG (0): LQI Root is receiving packet from node 5 @0:47:31.029327111
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:47:31.029327111
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:31.029327111
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:31.030944534
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:31.030944534
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:31.031633515
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:47:31.031633515
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:47:31.031633515
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:31.035129300
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:31.035129300
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:31.035129300
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:31.035129300
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:31.035129300
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:47:31.036407148
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:47:31.038131381
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:31.038131381
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:47:31.038131381
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:47:31.038131381
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:47:31.039092679
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:31.039092679
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:31.041671400
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:31.041671400
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:31.041671400
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:31.042560287
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:47:31.044009863
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:31.044009863
+DEBUG (0): LQI Root is receiving packet from node 5 @0:47:31.044009863
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:31.044009863
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:31.045608144
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:47:31.047622293
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:47:31.047622293
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:47:31.047622293
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:31.047622293
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:47:31.047622293
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:47:31.047622293
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:47:31.050674033
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:31.050674033
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:47:31.050674033
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:47:31.050674033
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:47:31.056609667
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:31.056609667
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:31.056609667
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:31.056609667
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:47:31.056609667
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:47:36.006364989
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:36.006364989
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:47:36.006364989
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:36.006364989
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:47:36.008547101
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:36.008547101
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:47:36.008547101
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:47:36.009017782
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:36.010410206
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:36.011911223
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:47:36.011911223
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:47:36.011911223
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:47:36.011911223
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:47:36.014007377
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:36.014007377
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:47:36.014007377
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:47:36.014007377
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:36.014007377
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:47:36.014007377
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:47:36.017867828
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:47:36.018480515
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:36.019943011
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:36.021707308
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:47:36.021707308
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:36.026949094
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:47:36.026949094
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:47:36.028594694
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:36.029031484
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:47:36.029031484
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:47:36.033052574
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:47:36.033052574
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:47:36.033052574
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:47:36.033052574
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:47:36.033052574
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:36.033052574
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:36.036333194
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:36.036333194
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:36.036333194
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:36.036333194
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:36.036333194
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:47:36.038222933
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:36.040285197
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:36.040285197
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:36.040285197
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:36.040285197
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:36.045274792
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:36.045274792
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:36.045274792
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:47:36.047729104
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:47:36.047729104
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:47:36.047729104
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:47:36.047729104
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:36.050249129
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:36.050249129
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:36.050249129
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:36.050249129
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:36.050249129
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:36.050249129
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:36.054763364
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:36.054763364
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:36.055543897
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:36.059389090
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:36.059389090
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:36.059389090
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:36.059389090
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:36.059389090
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:36.059389090
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:41.006646971
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:47:41.006646971
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:47:41.006646971
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:47:41.006646971
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:41.007530085
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:41.009294660
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:47:41.009294660
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:47:41.009294660
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:41.010013480
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:41.010013480
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:47:41.013963822
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:41.013963822
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:47:41.014970896
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:47:41.019748530
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:47:41.019748530
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:41.020052161
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:41.021883087
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:41.021883087
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:41.021883087
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:41.024616056
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:47:41.024616056
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:47:41.024616056
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:41.031512988
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:41.031512988
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:41.031512988
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:41.031512988
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:41.031512988
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:41.034900419
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:47:41.034900419
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:47:41.034900419
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:47:41.034900419
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:47:41.034900419
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:47:41.034900419
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:41.037875866
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:41.037875866
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:41.037875866
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:41.037875866
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:41.037875866
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:41.038562507
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:41.047794021
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:41.047794021
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:41.047794021
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:41.047794021
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:41.047794021
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:41.047794021
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 65 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4290 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 72 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4290 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 1331.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:46.006273555
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:46.013034702
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:46.021156105
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:46.025903451
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:46.030382183
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:46.034784014
+DEBUG (0): LQI Root is receiving packet from node 3 @0:47:46.044671652
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 2121.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 2121.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 2121.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 2121.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 2121.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 2121.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 2121.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 2501.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 2121.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 2501.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 59 that advertises 2501.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 2501.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:47:51.007028439
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:51.009004744
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:51.016435849
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:51.021636727
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:51.025775717
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:51.031055227
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:51.031986008
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:51.033973413
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:51.038089488
+DEBUG (0): LQI Root is receiving packet from node 3 @0:47:51.041827869
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:51.045001679
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:51.054141640
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:47:51.060947020
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:51.060947020
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:51.060947020
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:47:51.060947020
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:51.066287565
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:51.068332231
+DEBUG (0): LQI Root is receiving packet from node 5 @0:47:51.076816068
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:56.005786820
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:56.005786820
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:56.005786820
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:56.005786820
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:56.005786820
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:56.009643388
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:47:56.012926230
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:56.014091326
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:56.015548505
+DEBUG (0): LQI Root is receiving packet from node 5 @0:47:56.018279813
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:47:56.018279813
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:47:56.018279813
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:56.018279813
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:47:56.018279813
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:56.020547647
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:56.020547647
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:56.020547647
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:56.020547647
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:47:56.026000715
+DEBUG (0): LQI Root is receiving packet from node 6 @0:47:56.026000715
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:47:56.028634758
+DEBUG (0): LQI Root is receiving packet from node 3 @0:47:56.028634758
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:47:56.028634758
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:47:56.028634758
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:47:56.028634758
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:47:56.032867130
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:56.033904721
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:47:56.036407148
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:56.038299227
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:56.040193527
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:47:56.042205454
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:47:56.042205454
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:47:56.042205454
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:56.046258557
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:47:56.046258557
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:56.047014166
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:56.053100166
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:47:56.053796354
+DEBUG (0): LQI Root is receiving packet from node 1 @0:47:56.056001658
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:47:56.059495783
+DEBUG (0): LQI Root is receiving packet from node 3 @0:47:56.061967810
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:47:56.064912621
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:47:56.064912621
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:47:56.064912621
+DEBUG (0): LQI Root is receiving packet from node 4 @0:47:56.064912621
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:47:56.064912621
+DEBUG (0): LQI Root is receiving packet from node 5 @0:47:56.070817856
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:47:56.080262873
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:47:56.086747821
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 64 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 2121.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:1.008157583
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:48:1.008157583
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:48:1.008157583
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:48:1.009277180
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:1.010108806
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:48:1.010108806
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:48:1.011157882
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:1.012529504
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:48:1.013900566
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:48:1.013900566
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:48:1.025928304
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:48:1.025928304
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:48:1.025928304
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:48:1.025928304
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:48:1.025928304
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:48:1.029147889
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:48:1.029147889
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:48:1.029147889
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:1.031116262
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:48:1.031116262
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:1.031116262
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:48:1.031116262
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:1.033008341
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:48:1.033008341
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:48:1.033008341
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:48:1.034702056
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:48:1.034702056
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:48:1.035678613
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:48:1.035678613
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:48:1.036960344
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:1.036960344
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:48:1.036960344
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:48:1.039186453
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:1.039186453
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:48:1.039186453
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:48:1.039186453
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:48:1.039186453
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:48:1.041919421
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:48:1.041919421
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:1.041919421
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:48:1.041919421
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:48:1.041919421
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:48:1.044192968
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:48:1.044192968
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:1.044192968
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:48:1.044192968
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:48:1.044192968
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:48:1.044192968
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:48:1.046892096
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:48:1.050861020
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:48:1.050861020
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:48:1.050861020
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:48:1.050861020
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:1.055650590
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:48:1.056293117
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:48:1.056293117
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:48:1.058595519
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:48:1.058595519
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:48:1.058595519
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:48:1.058595519
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:48:1.062930651
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:1.063402010
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:48:1.067811774
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:48:1.067811774
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:1.067811774
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:48:1.074876552
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:48:1.074876552
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:48:1.074876552
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:48:1.074876552
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:48:1.074876552
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:1.074876552
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:48:1.082414350
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:48:1.082414350
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:48:1.082414350
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:1.082414350
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:48:1.089433352
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:48:1.089433352
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:48:1.089433352
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:48:1.089433352
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:1.089433352
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:48:1.089433352
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:6.009546124
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:48:6.011766687
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:48:6.011766687
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:6.011766687
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:48:6.011766687
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:48:6.011766687
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:48:6.016481625
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:48:6.016481625
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:48:6.016481625
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:48:6.017214043
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:48:6.017214043
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:6.020754061
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:48:6.020754061
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:48:6.020754061
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:48:6.020754061
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:48:6.020754061
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:48:6.021455962
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:48:6.024309339
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:48:6.024309339
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:6.024309339
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:48:6.024309339
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:48:6.024309339
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:48:6.025911502
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:48:6.034868359
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:48:6.034868359
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:48:6.034868359
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:6.034868359
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:48:6.034868359
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:48:6.034868359
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:48:6.039064501
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:48:6.039064501
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:48:6.039064501
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:6.039064501
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:48:6.039064501
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:48:6.039064501
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:48:11.008104481
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:11.008104481
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:48:11.011865447
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:48:11.011865447
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:11.011865447
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:48:11.011865447
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:48:11.012515906
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:48:11.015008739
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:48:11.015008739
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:11.015008739
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:48:11.015008739
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:48:11.015008739
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:48:11.015008739
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:48:11.018029962
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:11.018029962
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:48:11.018029962
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:48:11.018029962
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:48:11.019738936
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:11.020959632
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:11.020959632
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:48:11.020959632
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:48:11.020959632
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:48:11.020959632
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:11.024341399
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:48:11.024341399
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:48:11.024341399
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:48:11.026361212
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:11.026361212
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:11.026361212
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:48:11.026361212
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:48:11.026361212
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:48:11.026361212
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:48:11.028848380
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:48:11.028848380
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:48:11.028848380
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:11.028848380
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:48:11.028848380
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:48:11.029641832
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:48:11.033014005
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:11.033014005
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:11.033014005
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:48:11.033014005
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:48:11.035226516
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:11.035226516
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:48:11.035226516
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:48:11.035226516
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:48:11.035226516
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:11.037652650
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:48:11.037652650
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:48:11.037881530
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:48:11.039819385
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:11.039819385
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:48:11.039819385
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:48:11.039819385
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:11.039819385
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:48:11.041482583
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:48:11.046670541
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:48:11.046670541
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:48:11.046670541
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:11.046670541
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:48:11.046670541
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:48:11.049783316
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:11.049783316
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:48:11.049783316
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:48:11.049783316
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:48:11.049783316
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:48:11.058358706
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:48:11.058358706
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:48:11.058358706
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:11.058358706
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:48:11.058358706
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:48:11.058358706
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:48:11.066995130
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:48:11.066995130
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:48:11.066995130
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:11.066995130
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:48:11.066995130
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:48:11.066995130
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:16.007850518
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:48:16.007850518
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:48:16.007850518
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:48:16.007850518
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:48:16.011245552
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:48:16.011245552
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:16.011245552
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:48:16.011245552
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:48:16.017562654
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:16.017562654
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:48:16.017562654
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:48:16.017562654
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:16.020053704
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:48:16.020053704
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:48:16.020053704
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:48:16.020053704
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:16.025150110
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:48:16.025150110
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:48:16.025150110
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:48:16.027438915
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:16.027438915
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:48:16.027438915
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:48:16.027438915
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:48:16.028991420
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:48:16.030489112
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:16.030489112
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:48:16.030489112
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:48:16.030489112
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:48:16.035158274
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:48:16.035158274
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:16.035158274
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:48:16.035158274
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:48:16.035158274
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 65 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4290 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 1423.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1423.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 1423.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4290 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 4290.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 4290.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 4290.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 79 that advertises 4290.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 59 that advertises 4290.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 90 that advertises 4290.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:48:21.007709416
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:21.009966161
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:21.012216397
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:21.016525062
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:21.018816088
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:48:21.025718456
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:21.033057891
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:21.036012643
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:26.007791374
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:26.011385101
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:26.019973528
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:26.021974757
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:48:26.029193666
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:48:26.031669349
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:26.034366365
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:26.036353770
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:48:31.005988957
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:31.010957976
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:48:31.015842303
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:31.019464279
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:31.023772945
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:31.032960903
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:31.041955603
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:31.081102102
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 125.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 1548.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1548.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 1548.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 2598.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 125 and my cost to 2598.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2598.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 2598.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1423.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 2598.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 2598.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:36.006532953
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:48:36.010324318
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:48:36.012809596
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:48:36.015445577
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:36.019653096
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:48:36.023698872
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:36.028360101
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:36.041963536
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:36.044152856
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:48:36.044929159
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:36.048835386
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:41.006136227
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:48:41.007266914
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:41.008163294
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:41.011188400
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:48:41.019004628
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:48:41.026513799
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:41.029977524
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:48:41.038499811
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:48:41.041406290
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:41.047685549
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:41.049996938
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:48:46.005241280
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:48:46.006900705
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:46.007507170
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:48:46.016161075
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:48:46.018167290
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:46.023515768
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:46.033311972
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:46.038408377
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:48:46.040063524
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:46.046999025
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:46.054719928
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:46.064851704
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 64 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 125 and my cost to 2598.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 231.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 125 and my cost to 2598.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 231.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 231.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 231.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 590.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 590.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 108 that advertises 590.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 590.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 590.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 590.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 970.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 590.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 970.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 79 that advertises 970.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 84 that advertises 970.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:48:51.012344178
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:48:51.018848267
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:48:51.025089075
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:51.033006798
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:51.037752253
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:51.042482332
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:48:51.046624765
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:51.049181020
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:48:51.049898060
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:48:51.052207559
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:51.057207096
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:48:51.060599844
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:51.067323614
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:51.072725194
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:48:56.007005855
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:48:56.009616753
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:48:56.014148587
+DEBUG (0): LQI Root is receiving packet from node 1 @0:48:56.017381889
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:48:56.019538682
+DEBUG (0): LQI Root is receiving packet from node 4 @0:48:56.026537109
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:48:56.039483694
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:48:56.044402707
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:48:56.047448735
+DEBUG (0): LQI Root is receiving packet from node 6 @0:48:56.050310163
+DEBUG (0): LQI Root is receiving packet from node 2 @0:48:56.055330276
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:48:56.058242348
+DEBUG (0): LQI Root is receiving packet from node 3 @0:48:56.063341093
+DEBUG (0): LQI Root is receiving packet from node 5 @0:48:56.072709935
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:1.008013047
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:49:1.008415090
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:1.011108224
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:49:1.013628130
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:49:1.019387986
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:1.026422247
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:1.028482171
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:1.049722281
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:49:1.052295337
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:1.058826061
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:49:1.064609108
+DEBUG (0): LQI Root is receiving packet from node 6 @0:49:1.071429747
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:49:1.072864065
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:1.082171872
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 343.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 590.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 590.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 343.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 343.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 343.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 82 that advertises 343.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 356.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 590.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 356.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 165 and my cost to 590.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 356.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 216 and my cost to 356.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 356.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 343.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:6.006509643
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:49:6.007652155
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:6.009157449
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:49:6.013282615
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:6.020248185
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:6.027025387
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:6.031970749
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:6.032961021
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:6.040851312
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:49:6.047212529
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:49:6.050189637
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:49:6.052585253
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:6.057361226
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:49:6.067752400
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:49:6.070941469
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:49:6.077655297
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:6.083255240
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:49:6.085193095
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:49:6.091296575
+DEBUG (0): LQI Root is receiving packet from node 6 @0:49:6.099658342
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 755.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 590.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 755.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 216 and my cost to 356.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 755.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 755.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 755.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 343.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:11.005807743
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:49:11.008867416
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:49:11.009712080
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:11.011675135
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:49:11.013629792
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:11.018953535
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:49:11.020953968
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:49:11.023334325
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:49:11.027484691
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:11.031112379
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:11.035583178
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:11.045760731
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:49:11.049674615
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:49:11.065482628
+DEBUG (0): LQI Root is receiving packet from node 6 @0:49:11.070517999
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:11.099112803
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:49:11.102988513
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:11.111960628
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:16.006059933
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:16.009530866
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:49:16.012071743
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:16.013482869
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:49:16.021579574
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:16.024261223
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:49:16.026725530
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:49:16.027972970
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:16.032245406
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:49:16.036109631
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:49:16.041175519
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:16.045371661
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:49:16.047446845
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:49:16.055549214
+DEBUG (0): LQI Root is receiving packet from node 6 @0:49:16.060401481
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:49:16.062751321
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:16.071677660
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 216 and my cost to 356.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:21.009142191
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:49:21.014482618
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:49:21.022132661
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:49:21.023303807
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:21.026254401
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:21.031732274
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:49:21.033008341
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:49:21.038262998
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:49:21.050830502
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:21.058776402
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:21.064406863
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:21.074542522
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:49:21.076455524
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:21.077914695
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:21.082482710
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:21.087146208
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:21.090081543
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:21.094537083
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:21.099511420
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:21.104922594
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:49:21.114321953
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:21.123660277
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:49:21.130374105
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:49:21.130374105
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:21.130374105
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:21.130374105
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:49:21.130374105
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:21.135348441
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:21.137530436
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:21.145114009
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 590.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 65534.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 0, my link to 855 and my cost to 65534.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 65534.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 0, my link to 76 and my cost to 65534.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 853.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 243 and my cost to 853.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 853.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 78 that advertises 853.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 2197 and my cost to 853.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 853.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 853.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 853.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:49:26.008212953
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:49:26.012374696
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:26.018297411
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:26.026460697
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:49:26.027961485
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:26.034196858
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:49:26.034196858
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:26.034196858
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:49:26.034196858
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:49:26.035280226
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:49:26.038881279
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:26.041429482
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:49:26.051134015
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:49:26.051134015
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:49:26.051134015
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:49:26.051889017
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:49:26.058557069
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:49:26.060136648
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:49:26.060136648
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:26.060350270
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:26.063134679
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:49:26.065080467
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:26.071374377
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:49:26.071374377
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:26.071374377
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:49:26.076188800
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:26.078668035
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:26.078668035
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:26.078668035
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:26.078668035
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:26.078668035
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:26.080895806
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:26.080895806
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:26.080895806
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:26.080895806
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:26.081231497
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:26.085687037
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:26.092278796
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:26.092278796
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:26.092278796
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:26.092278796
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:49:26.092278796
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:26.097192097
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:26.097192097
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:26.097192097
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:26.097192097
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:26.097192097
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:49:31.007430877
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:31.007430877
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:31.007430877
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:31.007430877
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:49:31.008594421
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:31.010581825
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:49:31.010581825
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:49:31.010581825
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:31.011270357
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:31.011270357
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:31.015556162
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:49:31.015556162
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:49:31.016809266
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:49:31.016809266
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:31.016809266
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:31.020280924
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:31.020280924
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:31.020280924
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:31.020927224
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:49:31.027315184
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:31.027315184
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:31.027315184
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:31.029212698
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:31.029212698
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:49:31.030765312
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:49:31.030765312
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:31.037799572
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:49:31.037799572
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:31.037799572
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:31.037799572
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:31.037799572
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:49:31.038989751
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:49:36.007219595
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:36.007219595
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:49:36.007219595
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:49:36.007219595
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:49:36.008318103
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:36.009742597
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:49:36.009742597
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:36.011209323
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:49:36.013261922
+DEBUG (0): LQI Root is receiving packet from node 6 @0:49:36.013261922
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:49:36.013261922
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:49:36.013261922
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:49:36.013261922
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:49:36.015083142
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:49:36.015716351
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:49:36.015716351
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:49:36.015716351
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:36.015716351
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:49:36.015716351
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:36.019204881
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:36.019204881
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:36.019204881
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:49:36.019204881
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:49:36.020755604
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:49:36.022979492
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:49:36.022979492
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:49:36.023628014
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:49:36.024963123
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:49:36.024963123
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:49:36.024963123
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:49:36.025537242
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:36.025537242
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:49:36.025537242
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:49:36.027703977
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:49:36.027703977
+DEBUG (0): LQI Root is receiving packet from node 6 @0:49:36.027703977
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:49:36.027703977
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:49:36.027703977
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:49:36.031425210
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:36.031425210
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:36.031425210
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:36.031425210
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:36.031425210
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:36.031425210
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:36.034408258
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:36.034408258
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:36.034408258
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:36.034408258
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:49:36.034997636
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:49:36.037179630
+DEBUG (0): LQI Root is receiving packet from node 6 @0:49:36.037179630
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:49:36.037179630
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:49:36.037179630
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:36.039374992
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:36.039374992
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:36.039374992
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:36.039374992
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:36.039374992
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:36.040063524
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:36.042123449
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:49:36.042123449
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:36.042123449
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:36.042123449
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:36.042123449
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:36.052560400
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:36.052560400
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:36.052560400
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:36.052560400
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 72 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:41.007209653
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:49:41.007209653
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:41.008935776
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:41.009231403
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:49:41.017831598
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:41.017831598
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:41.017831598
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:41.017831598
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:49:41.018390506
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:49:41.022785012
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:41.022785012
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:49:41.022785012
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:41.025430431
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:49:41.025430431
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:41.025430431
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:41.025430431
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:41.025430431
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:41.025430431
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:41.029763902
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:41.029763902
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:49:41.029763902
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:41.029763902
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:41.030358991
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:41.032464692
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:41.032464692
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:41.032464692
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:41.032464692
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:41.032464692
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:49:41.033609094
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:41.037912048
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:41.037912048
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:41.037912048
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:41.037912048
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:41.037912048
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:41.037912048
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:49:41.046868905
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:49:41.046868905
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:49:41.046868905
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:41.046868905
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:49:41.046868905
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:49:41.046868905
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:49:41.050897201
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:49:41.050897201
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:49:41.050897201
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:41.050897201
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:49:41.054544031
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:49:41.054544031
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:41.054544031
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:49:41.054544031
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:49:41.054544031
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:49:41.055612140
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:49:41.060205008
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:49:41.060205008
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:49:41.060205008
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:41.060205008
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:49:41.060205008
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:49:41.068566776
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:49:41.068566776
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:49:41.068566776
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:41.068566776
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:49:41.068566776
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:49:41.068566776
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:46.006265504
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:46.006265504
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:46.006265504
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:46.008117518
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:49:46.008117518
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:46.009452682
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:49:46.009452682
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:49:46.011173141
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:49:46.011173141
+DEBUG (0): LQI Root is receiving packet from node 6 @0:49:46.011613982
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:49:46.011613982
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:46.013984516
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:46.013984516
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:46.013984516
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:46.017259701
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:46.018192143
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:49:46.018192143
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:46.019228191
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:46.019228191
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:46.019228191
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:46.019228191
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:49:46.021781711
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:46.021781711
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:49:46.021781711
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:49:46.021781711
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:49:46.021781711
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:46.022922340
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:49:46.024169671
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:46.024169671
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:49:46.024169671
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:49:46.024169671
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:49:46.024169671
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:46.026878117
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:46.026878117
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:49:46.026878117
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:46.026878117
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:46.029952718
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:49:46.029952718
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:46.029952718
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:46.029952718
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:46.029952718
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:46.033424099
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:49:46.033424099
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:46.033424099
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:46.033424099
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:46.033424099
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:49:46.036674202
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:49:46.036674202
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:46.036674202
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:49:46.036674202
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:49:46.036674202
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:46.037452396
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:49:46.041434917
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:49:46.041434917
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:49:46.041434917
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:46.041434917
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:49:46.041434917
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:49:46.041434917
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:49:46.047782536
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:49:46.047782536
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:46.047782536
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:49:46.047782536
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:49:46.047782536
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:49:51.006473461
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:49:51.006473461
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:49:51.006473461
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:49:51.007112784
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:51.008493274
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:51.008493274
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:49:51.008493274
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:49:51.009055955
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:49:51.009055955
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:49:51.009055955
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:49:51.011430878
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:49:51.011430878
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:49:51.012603576
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:51.012603576
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:51.014427018
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:49:51.014427018
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:49:51.014427018
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:49:51.015586679
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:49:51.015586679
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:49:51.016084899
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:49:51.017129698
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:51.017129698
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:49:51.017608430
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:49:51.020347393
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:49:51.020347393
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:49:51.020347393
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:49:51.020347393
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:51.021522313
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:49:51.023309472
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:51.023309472
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:51.025367506
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:49:51.025367506
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:49:51.025367506
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:49:51.025367506
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:51.027412172
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:49:51.027412172
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:49:51.027412172
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:49:51.027412172
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:49:51.027412172
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:49:51.027932858
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:49:51.030168679
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:51.030168679
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:49:51.030168679
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:49:51.030168679
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:49:51.033607204
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:51.033607204
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:51.033607204
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:49:51.033607204
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:49:51.033607204
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:49:51.035163591
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:49:51.038881279
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:49:51.038881279
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:49:51.038881279
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:51.039672510
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:49:51.039672510
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:49:51.041480693
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:49:51.041480693
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:51.041587504
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:49:51.041587504
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:51.047532962
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:51.047532962
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:51.047532962
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:49:51.047532962
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:49:51.048835386
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:51.050612998
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:51.050612998
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:51.050612998
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:51.050612998
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:49:51.053560148
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:49:51.053560148
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:49:51.053560148
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:49:51.053560148
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:51.053560148
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:49:51.053560148
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:49:51.059936064
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:51.059936064
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:51.059936064
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:49:51.059936064
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:49:51.059936064
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:49:51.061738811
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 926.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 926.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 926.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 1621.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1621.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 1621.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 104 that advertises 2182.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 2182.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 64 that advertises 2182.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 2182.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:49:56.006814817
+DEBUG (0): LQI Root is receiving packet from node 3 @0:49:56.010215617
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:49:56.011537688
+DEBUG (0): LQI Root is receiving packet from node 4 @0:49:56.015827044
+DEBUG (0): LQI Root is receiving packet from node 1 @0:49:56.017961719
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:49:56.021911383
+DEBUG (0): LQI Root is receiving packet from node 6 @0:49:56.025928304
+DEBUG (0): LQI Root is receiving packet from node 5 @0:49:56.028121674
+DEBUG (0): LQI Root is receiving packet from node 4 @0:50:1.006549755
+DEBUG (0): LQI Root is receiving packet from node 1 @0:50:1.012529622
+DEBUG (0): LQI Root is receiving packet from node 3 @0:50:1.014533829
+DEBUG (0): LQI Root is receiving packet from node 2 @0:50:1.016443057
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:50:1.019592061
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:1.023101562
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:50:1.031831759
+DEBUG (0): LQI Root is receiving packet from node 6 @0:50:1.036363593
+DEBUG (0): LQI Root is receiving packet from node 2 @0:50:6.007181026
+DEBUG (0): LQI Root is receiving packet from node 1 @0:50:6.010164524
+DEBUG (0): LQI Root is receiving packet from node 4 @0:50:6.013706085
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:50:6.018478176
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:50:6.020570839
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:6.025253038
+DEBUG (0): LQI Root is receiving packet from node 6 @0:50:6.027147339
+DEBUG (0): LQI Root is receiving packet from node 3 @0:50:6.034263328
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 60 that advertises 343.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 343.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 343.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 1518.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1518.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 2167.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1621.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2167.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 2167.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 2167.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 2167.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:50:11.015505069
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:50:11.018665163
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:50:11.021654207
+DEBUG (0): LQI Root is receiving packet from node 2 @0:50:11.025964486
+DEBUG (0): LQI Root is receiving packet from node 3 @0:50:11.034278587
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:50:11.037475257
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:50:11.039796801
+DEBUG (0): LQI Root is receiving packet from node 4 @0:50:11.042529769
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:11.045959094
+DEBUG (0): LQI Root is receiving packet from node 6 @0:50:11.052051198
+DEBUG (0): LQI Root is receiving packet from node 2 @0:50:16.008279652
+DEBUG (0): LQI Root is receiving packet from node 3 @0:50:16.015373057
+DEBUG (0): LQI Root is receiving packet from node 1 @0:50:16.018190600
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:50:16.021575692
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:16.026504252
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:50:16.028490104
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:50:16.031039968
+DEBUG (0): LQI Root is receiving packet from node 4 @0:50:16.038104746
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:50:16.041568471
+DEBUG (0): LQI Root is receiving packet from node 6 @0:50:16.045123748
+DEBUG (0): LQI Root is receiving packet from node 1 @0:50:21.010179782
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:50:21.014330031
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:50:21.017383432
+DEBUG (0): LQI Root is receiving packet from node 2 @0:50:21.017938409
+DEBUG (0): LQI Root is receiving packet from node 3 @0:50:21.023689049
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:50:21.026275371
+DEBUG (0): LQI Root is receiving packet from node 4 @0:50:21.034534211
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:21.036864909
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:50:21.040515621
+DEBUG (0): LQI Root is receiving packet from node 6 @0:50:21.049853945
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 343.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 1518.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 1518.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 1518.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1518.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @0:50:26.005287057
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:50:26.006839670
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:50:26.008025966
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:50:26.011095186
+DEBUG (0): LQI Root is receiving packet from node 4 @0:50:26.016786799
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:26.018960742
+DEBUG (0): LQI Root is receiving packet from node 1 @0:50:26.024507702
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:50:26.031709690
+DEBUG (0): LQI Root is receiving packet from node 6 @0:50:26.037233339
+DEBUG (0): LQI Root is receiving packet from node 2 @0:50:26.039285331
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 855.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 855.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 855.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 855.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 216 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 855.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 1275.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 1275.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 343.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 1275.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1275.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 216 and my cost to 855.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:50:31.009508400
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:50:31.014392727
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:50:31.015106003
+DEBUG (0): LQI Root is receiving packet from node 4 @0:50:31.019351804
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:50:31.021957159
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:50:31.025270518
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:31.033218080
+DEBUG (0): LQI Root is receiving packet from node 2 @0:50:31.035165482
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:50:31.044349329
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:50:31.047258305
+DEBUG (0): LQI Root is receiving packet from node 6 @0:50:31.055070760
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:50:31.056627147
+DEBUG (0): LQI Root is receiving packet from node 3 @0:50:31.062593299
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:50:36.008636314
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:50:36.011081589
+DEBUG (0): LQI Root is receiving packet from node 1 @0:50:36.014513253
+DEBUG (0): LQI Root is receiving packet from node 2 @0:50:36.018197807
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:50:36.022600246
+DEBUG (0): LQI Root is receiving packet from node 4 @0:50:36.027971427
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:50:36.038242075
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:50:36.040137927
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:36.047534623
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:50:36.048114454
+DEBUG (0): LQI Root is receiving packet from node 6 @0:50:36.052524218
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:50:36.057651141
+DEBUG (0): LQI Root is receiving packet from node 3 @0:50:36.066531704
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 165.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 165.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 165.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 165.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 165.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 216 and my cost to 855.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:50:41.008859483
+DEBUG (0): LQI Root is receiving packet from node 1 @0:50:41.011522548
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:50:41.015106003
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:50:41.019031371
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:50:41.020957741
+DEBUG (0): LQI Root is receiving packet from node 2 @0:50:41.022920797
+DEBUG (0): LQI Root is receiving packet from node 4 @0:50:41.027620476
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:50:41.031541844
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:50:41.035739648
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:41.043353739
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:50:41.052585253
+DEBUG (0): LQI Root is receiving packet from node 3 @0:50:41.056995017
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:50:41.062442373
+DEBUG (0): LQI Root is receiving packet from node 6 @0:50:41.069949653
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 1071.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 855.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 1071.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 110 that advertises 1071.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 1071.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1071.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 165.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 897.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 897.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 216 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 897.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 897.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 165.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:50:46.010925119
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:50:46.019609541
+DEBUG (0): LQI Root is receiving packet from node 1 @0:50:46.022264673
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:50:46.025256921
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:50:46.026267769
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:50:46.032382734
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:46.036304220
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:50:46.037515321
+DEBUG (0): LQI Root is receiving packet from node 4 @0:50:46.042590804
+DEBUG (0): LQI Root is receiving packet from node 2 @0:50:46.050006532
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:50:46.057056052
+DEBUG (0): LQI Root is receiving packet from node 6 @0:50:46.063220567
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:50:46.064242899
+DEBUG (0): LQI Root is receiving packet from node 3 @0:50:46.070575260
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:50:51.007707755
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:50:51.022271880
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:50:51.027885191
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:50:51.031295484
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:50:51.037219742
+DEBUG (0): LQI Root is receiving packet from node 1 @0:50:51.041109167
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:50:51.046207116
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:51.050203352
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:50:51.052859909
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:51.058824518
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:50:51.061847284
+DEBUG (0): LQI Root is receiving packet from node 4 @0:50:51.065202655
+DEBUG (0): LQI Root is receiving packet from node 3 @0:50:51.073320283
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:50:56.007820001
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:50:56.010867967
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:50:56.012557800
+DEBUG (0): LQI Root is receiving packet from node 1 @0:50:56.013307816
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:50:56.014528394
+DEBUG (0): LQI Root is receiving packet from node 4 @0:50:56.035432931
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:50:56.036685687
+DEBUG (0): LQI Root is receiving packet from node 3 @0:50:56.044238744
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:50:56.044732687
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:50:56.051318781
+DEBUG (0): LQI Root is receiving packet from node 2 @0:50:56.054071011
+DEBUG (0): LQI Root is receiving packet from node 5 @0:50:56.060632252
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 216 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 271.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 855.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 271.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 271.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 271.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 271.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 271.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 894.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 894.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 894.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 894.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 894.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 271.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 894.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 894.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 104 that advertises 1274.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 894.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 1274.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 271.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 1274.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 1274.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 165.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:1.005770018
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:51:1.008197694
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:1.020906530
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:1.025718456
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:51:1.034166341
+DEBUG (0): LQI Root is receiving packet from node 4 @0:51:1.037173966
+DEBUG (0): LQI Root is receiving packet from node 6 @0:51:1.047870314
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:1.053268012
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:1.056008866
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:51:1.058745885
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:1.062814246
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:51:1.063928131
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:1.071557481
+DEBUG (0): LQI Root is receiving packet from node 2 @0:51:1.079278383
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:6.006746575
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:51:6.008874742
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:51:6.017230845
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:6.021972418
+DEBUG (0): LQI Root is receiving packet from node 2 @0:51:6.023233178
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:6.027213808
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:6.029588731
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:51:6.034743950
+DEBUG (0): LQI Root is receiving packet from node 4 @0:51:6.059960869
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:51:6.062316421
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:6.069024537
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:6.070395929
+DEBUG (0): LQI Root is receiving packet from node 6 @0:51:6.076638628
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:6.083260904
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:51:11.007501459
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:11.010179782
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:51:11.016589979
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:11.018007377
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:11.019935409
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:51:11.025240001
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:11.027435033
+DEBUG (0): LQI Root is receiving packet from node 2 @0:51:11.042558744
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:11.043845791
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:51:11.054320862
+DEBUG (0): LQI Root is receiving packet from node 4 @0:51:11.056810370
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:11.061662636
+DEBUG (0): LQI Root is receiving packet from node 6 @0:51:11.068330688
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 69 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 894.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 343.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 343.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 343.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 396.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 894.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 396.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 894.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 396.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 396.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 396.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 396.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 946.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 894.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 946.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 396.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 946.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 271.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 77 that advertises 946.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 946.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 343.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:16.007143301
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:51:16.009301985
+DEBUG (0): LQI Root is receiving packet from node 2 @0:51:16.014718824
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:16.018584987
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:51:16.023258031
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:16.031120036
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:51:16.033481360
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:16.035829539
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:16.054328518
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:51:16.058448367
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:51:16.068910400
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:51:16.080985467
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:16.089194648
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:16.105780855
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:51:16.113013479
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:51:16.117697899
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:51:16.123160514
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:16.126654756
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:51:16.126654756
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:51:16.126654756
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:51:16.126654756
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:16.126654756
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:51:16.126654756
+DEBUG (0): LQI Root is receiving packet from node 6 @0:51:16.132849789
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:51:16.132849789
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:51:16.132849789
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:51:16.132849789
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:16.132849789
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:16.134955489
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:16.143515620
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:16.149603841
+DEBUG (0): LQI Root is receiving packet from node 2 @0:51:21.007211543
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:51:21.007211543
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:51:21.007211543
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:51:21.008714947
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:51:21.010471241
+DEBUG (0): LQI Root is receiving packet from node 4 @0:51:21.010471241
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:51:21.010471241
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:51:21.011085363
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:51:21.013124711
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:51:21.013124711
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:51:21.013124711
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:21.013124711
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:51:21.013124711
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:51:21.013124711
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:51:21.019870600
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:51:21.019870600
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:51:21.019870600
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:51:21.023772945
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:51:21.025668906
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:51:21.025668906
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:51:21.027301587
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:21.027301587
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:51:21.028079780
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:21.033862828
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:51:21.033862828
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:51:21.034198519
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:51:21.038253451
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:51:21.042010974
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:51:21.042010974
+DEBUG (0): LQI Root is receiving packet from node 4 @0:51:21.042010974
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:51:21.042010974
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:21.046355821
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:51:21.050368859
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:51:21.050368859
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:21.050368859
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:51:21.050368859
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:21.056228199
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:51:21.056228199
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:51:21.056228199
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:21.056228199
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:51:21.056228199
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:51:21.058455970
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:21.058455970
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:21.058455970
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:51:21.058455970
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:51:21.063628669
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:51:21.063628669
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:21.063628669
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:21.063628669
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:51:21.070268425
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:51:21.076631303
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:21.076631303
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:21.076631303
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:21.076631303
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:51:21.076631303
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:51:21.076631303
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:21.079454162
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:21.084611603
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:21.084611603
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:51:21.084611603
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:51:21.087709119
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:51:21.087709119
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:51:21.087709119
+DEBUG (0): LQI Root is receiving packet from node 6 @0:51:21.087709119
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:51:21.087709119
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:51:21.087709119
+DEBUG (0): LQI Root is receiving packet from node 6 @0:51:21.092424057
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:51:21.092424057
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:51:21.092424057
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:21.092424057
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:51:21.094895967
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:21.094895967
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:51:21.098085035
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:51:21.098085035
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:21.098085035
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:51:21.099214179
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:51:21.099214179
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:21.108003190
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:21.114747535
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:26.007163877
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:26.007163877
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:26.007163877
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:51:26.007163877
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:51:26.007163877
+DEBUG (0): LQI Root is receiving packet from node 4 @0:51:26.009647271
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:51:26.009647271
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:26.010650463
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:51:26.010650463
+DEBUG (0): LQI Root is receiving packet from node 2 @0:51:26.011606049
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:51:26.011606049
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:51:26.015277731
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:26.017549734
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:26.017549734
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:51:26.017549734
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:51:26.017549734
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:51:26.018401882
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:26.019988787
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:51:26.019988787
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:51:26.019988787
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:51:26.019988787
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:51:26.021722567
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:26.021722567
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:51:26.023166479
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:26.023166479
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:51:26.023166479
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:26.025514658
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:26.025726058
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:51:26.027606761
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:26.028228485
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:26.028228485
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:51:26.029619248
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:51:26.037919981
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:51:26.046861579
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:51:26.046861579
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:26.046861579
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:26.046861579
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:51:26.046861579
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:26.046861579
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:51:26.052629368
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:26.052629368
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:26.052629368
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 68 that advertises 1000.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 1000.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 1000.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 1000.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 420 and my cost to 1000.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 1000.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1000.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 1420.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1420.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 1420.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 1420.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 1420.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 1420.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 1420.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 104 that advertises 2089.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 1420.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 2089.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 420 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 2089.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 66 that advertises 2089.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 2089.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:31.011003634
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:31.015382999
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:51:31.019550167
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:31.021766453
+DEBUG (0): LQI Root is receiving packet from node 2 @0:51:31.024911635
+DEBUG (0): LQI Root is receiving packet from node 4 @0:51:31.030542096
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:51:31.032642132
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:31.036050486
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:31.042388559
+DEBUG (0): LQI Root is receiving packet from node 6 @0:51:31.044290184
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:51:31.049880580
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:31.056701219
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:51:36.009143734
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:36.012672267
+DEBUG (0): LQI Root is receiving packet from node 2 @0:51:36.015100291
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:36.018099048
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:36.023528805
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:51:36.032333075
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:36.035341260
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:51:36.059419489
+DEBUG (0): LQI Root is receiving packet from node 6 @0:51:36.070291009
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:36.075128017
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:36.081750293
+DEBUG (0): LQI Root is receiving packet from node 2 @0:51:41.007272578
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:41.009559493
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:41.012283143
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:41.015586679
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:41.020418252
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:51:41.025165369
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:41.027940909
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:41.033542395
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:51:41.034763091
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:51:41.049289373
+DEBUG (0): LQI Root is receiving packet from node 4 @0:51:41.056125271
+DEBUG (0): LQI Root is receiving packet from node 6 @0:51:41.060779175
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 1420.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 1125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1420.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 1125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 1420.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 1125.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 1125.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1125.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:51:46.005100178
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:46.009429767
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:46.011980191
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:51:46.014831346
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:46.017051514
+DEBUG (0): LQI Root is receiving packet from node 4 @0:51:46.018038013
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:51:46.019500509
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:51:46.021447910
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:46.047868771
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:46.049142451
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:46.054582599
+DEBUG (0): LQI Root is receiving packet from node 6 @0:51:46.079240659
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:46.085786641
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 1510.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1420.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1510.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 1510.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 1510.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 1510.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:51.006151486
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:51:51.007495794
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:51.009264142
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:51:51.018190482
+DEBUG (0): LQI Root is receiving packet from node 4 @0:51:51.021030261
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:51:51.025430431
+DEBUG (0): LQI Root is receiving packet from node 6 @0:51:51.031116262
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:51.033919980
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:51.036262218
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:51:51.037353188
+DEBUG (0): LQI Root is receiving packet from node 2 @0:51:51.040561397
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:51.041526469
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:51.047565140
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:51.058658215
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:51:56.006570678
+DEBUG (0): LQI Root is receiving packet from node 1 @0:51:56.011507289
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:51:56.014533829
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:51:56.016817199
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:51:56.019477648
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:51:56.022048711
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:51:56.024753384
+DEBUG (0): LQI Root is receiving packet from node 4 @0:51:56.027208492
+DEBUG (0): LQI Root is receiving packet from node 4 @0:51:56.031465669
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:51:56.034000156
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:51:56.044955903
+DEBUG (0): LQI Root is receiving packet from node 3 @0:51:56.049501452
+DEBUG (0): LQI Root is receiving packet from node 5 @0:51:56.058137876
+DEBUG (0): LQI Root is receiving packet from node 6 @0:51:56.062532382
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:1.007247772
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:52:1.009757856
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:52:1.010257619
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:52:1.012384243
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:1.016741023
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:1.019655317
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:1.026447100
+DEBUG (0): LQI Root is receiving packet from node 4 @0:52:1.034013872
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:52:1.039010674
+DEBUG (0): LQI Root is receiving packet from node 2 @0:52:1.042207794
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:1.056016917
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:52:1.059222787
+DEBUG (0): LQI Root is receiving packet from node 6 @0:52:1.063098497
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 201.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1420.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 201.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 1420.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 201.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 201.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 201.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 201.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 637.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 637.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 637.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 201.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 637.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 637.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 2089.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 637.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 2089.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 2089.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 2089.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 201.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:52:6.010186990
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:6.014314890
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:52:6.016010149
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:52:6.017402464
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:6.024004046
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:6.028503142
+DEBUG (0): LQI Root is receiving packet from node 2 @0:52:6.031953947
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:52:6.033067714
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:52:6.035407730
+DEBUG (0): LQI Root is receiving packet from node 4 @0:52:6.040086834
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:6.041841467
+DEBUG (0): LQI Root is receiving packet from node 6 @0:52:6.045808847
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:6.050111800
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:52:11.012245024
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:11.014528394
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:11.017610769
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:52:11.024453874
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:11.029052455
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:11.040887494
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:52:11.046680136
+DEBUG (0): LQI Root is receiving packet from node 4 @0:52:11.053134566
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:52:11.060571217
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:52:11.063922467
+DEBUG (0): LQI Root is receiving packet from node 2 @0:52:11.068200567
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:52:11.075610631
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:11.084094468
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:52:11.089023028
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:11.089023028
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:11.089023028
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:52:11.089023028
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:52:11.089023028
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:11.093356499
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:52:11.094897628
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:11.095309613
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:52:16.005770018
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:16.005770018
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:52:16.005770018
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:16.005770018
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:52:16.005770018
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:52:16.007547235
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:52:16.009357356
+DEBUG (0): LQI Root is receiving packet from node 4 @0:52:16.009357356
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:52:16.009357356
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:16.012025967
+DEBUG (0): LQI Root is receiving packet from node 4 @0:52:16.016315323
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:52:16.016315323
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:52:16.017154551
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:52:16.017707638
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:52:16.019555832
+DEBUG (0): LQI Root is receiving packet from node 2 @0:52:16.019555832
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:52:16.022556131
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:52:16.022556131
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:52:16.022556131
+DEBUG (0): LQI Root is receiving packet from node 6 @0:52:16.022556131
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:16.027566649
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:52:16.027566649
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:52:16.027566649
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:52:16.027566649
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:16.027566649
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:52:16.030341842
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:16.032272040
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:52:16.034677203
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:16.034677203
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:52:16.034677203
+DEBUG (0): LQI Root is receiving packet from node 6 @0:52:16.034677203
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:52:16.034677203
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:16.037353188
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:16.037353188
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:52:16.037353188
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:52:16.037353188
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:16.039369557
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:52:16.040000599
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:52:16.040000599
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:52:16.042968389
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:16.042968389
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:52:16.042968389
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:16.042968389
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:52:16.046302442
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:52:16.046302442
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:52:16.046302442
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:52:16.046302442
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:16.047729104
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:52:16.049964530
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:16.049964530
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:52:16.053679997
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:16.053679997
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:16.053679997
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:52:16.053679997
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:16.053679997
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:52:16.056184645
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:52:16.056184645
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:52:16.056184645
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:52:16.058600954
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:52:16.058600954
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:52:16.058600954
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:52:16.058600954
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:52:16.063521858
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:52:16.063521858
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:16.065040126
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:52:16.066611772
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:52:16.066611772
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:52:16.066611772
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:52:16.069228612
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:52:16.069228612
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:52:16.069228612
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:52:16.070115838
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:52:16.072074386
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:52:16.072074386
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:52:16.072074386
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:52:16.072074386
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:52:16.077063981
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:16.077063981
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:16.077063981
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:52:16.077063981
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:16.077063981
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:52:16.078004586
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:52:16.079978393
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:52:16.079978393
+DEBUG (0): LQI Root is receiving packet from node 4 @0:52:16.079978393
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:52:16.079978393
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:52:16.079978393
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:52:16.081397452
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:52:16.086722738
+DEBUG (0): LQI Root is receiving packet from node 4 @0:52:16.086722738
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:52:16.086722738
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:52:16.087668778
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:16.087668778
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:52:16.093741740
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:52:16.093741740
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:52:16.093741740
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:16.093741740
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 61 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:52:21.005729559
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:52:21.005729559
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:21.005729559
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:52:21.005729559
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:52:21.005729559
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:21.008880453
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:21.008880453
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:52:21.008880453
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:21.008880453
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:52:21.012407553
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:52:21.012407553
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:21.012407553
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:21.012407553
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:52:21.012407553
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:21.014846605
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:21.014846605
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:52:21.014846605
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:52:21.014846605
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:21.014846605
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:21.017394808
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:21.017394808
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:52:21.017394808
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:52:21.017394808
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:21.022020534
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:52:21.022020534
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:52:21.022020534
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:52:21.022020534
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:52:21.023101562
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:52:21.024766981
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:52:21.024766981
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:52:21.024766981
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:21.024766981
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:21.028259002
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:52:21.028259002
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:52:21.028259002
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:52:21.028259002
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:21.028612292
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:52:21.031908171
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:21.031908171
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:52:21.031908171
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:52:21.031908171
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:52:21.032418916
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:52:21.037398964
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:52:21.037398964
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:52:21.037398964
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:52:21.037398964
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:52:26.010912200
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:26.010912200
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:52:26.010912200
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:52:26.010912200
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:26.010912200
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:52:26.011665193
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:52:26.015901795
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:52:26.015901795
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:52:26.015901795
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:52:26.017168267
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:26.017168267
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:52:26.018602585
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:52:26.018602585
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:26.018602585
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:26.020362652
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:52:26.020362652
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:52:26.020362652
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:52:26.024110975
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:26.024110975
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:52:26.024110975
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:52:26.024110975
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:52:26.024110975
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:52:26.029380544
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:26.029380544
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:52:26.029380544
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:26.029380544
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:52:26.030631757
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:52:26.038551023
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:26.038551023
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:52:26.038551023
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:26.038551023
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:52:26.038551023
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:52:26.038551023
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:52:31.005744818
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:52:31.005744818
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:52:31.005744818
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:52:31.005744818
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:52:31.009973368
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:52:31.009973368
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:52:31.010576509
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:52:31.012069522
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:31.012069522
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:31.012069522
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:52:31.012865195
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:52:31.012865195
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:52:31.016025407
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:31.016025407
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:52:31.016025407
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:52:31.016580385
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:31.018035673
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:52:31.018035673
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:52:31.019586349
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:52:31.019586349
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:31.020583876
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:52:31.020583876
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:52:31.021615756
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:52:31.021615756
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:31.021615756
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:31.025338879
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:31.025338879
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:52:31.025338879
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:52:31.026538652
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:31.028716763
+DEBUG (0): LQI Root is receiving packet from node 6 @0:52:31.028716763
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:52:31.028716763
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:52:31.028716763
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:52:31.028716763
+DEBUG (0): LQI Root is receiving packet from node 2 @0:52:31.031175635
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:52:31.031175635
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:52:31.032434174
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:52:31.032434174
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:52:31.034087826
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:31.034087826
+DEBUG (0): LQI Root is receiving packet from node 6 @0:52:31.034087826
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:52:31.035216970
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:52:31.035216970
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:31.035216970
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:52:31.038324033
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:31.038324033
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:52:31.038324033
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:52:31.038324033
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:31.038324033
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:52:31.038324033
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:31.041536293
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:52:31.041536293
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:52:31.041536293
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:52:31.042184484
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:52:31.046142199
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:52:31.046142199
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:52:31.046142199
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:52:31.046142199
+DEBUG (0): LQI Root is receiving packet from node 2 @0:52:31.046142199
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:52:31.048511180
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:31.048511180
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:52:31.048511180
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:52:31.048511180
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:52:31.048511180
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:52:31.050401597
+DEBUG (0): LQI Root is receiving packet from node 2 @0:52:31.054366638
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:52:31.054366638
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:52:31.054366638
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:52:31.054366638
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:52:31.059587335
+DEBUG (0): LQI Root is receiving packet from node 6 @0:52:31.059587335
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:31.059587335
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:52:31.059587335
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 1241.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 3545 and my cost to 1241.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 1241.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 1241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1241.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 2325.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 2325.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 1241.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 2325.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 2325.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 2325.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 3054.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 3054.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 3054.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 3054.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 3054.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:36.008491384
+DEBUG (0): LQI Root is receiving packet from node 2 @0:52:36.011545014
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:36.016145934
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:52:36.018478176
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:36.036208785
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:36.040895427
+DEBUG (0): LQI Root is receiving packet from node 4 @0:52:36.050754209
+DEBUG (0): LQI Root is receiving packet from node 6 @0:52:36.055469147
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:41.017702321
+DEBUG (0): LQI Root is receiving packet from node 2 @0:52:41.022683865
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:41.025352247
+DEBUG (0): LQI Root is receiving packet from node 4 @0:52:41.031711351
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:52:41.034301448
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:41.036943424
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:41.039672510
+DEBUG (0): LQI Root is receiving packet from node 6 @0:52:41.044023461
+DEBUG (0): LQI Root is receiving packet from node 4 @0:52:46.010013480
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:46.012605797
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:46.015205212
+DEBUG (0): LQI Root is receiving packet from node 6 @0:52:46.019258591
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:52:46.023650875
+DEBUG (0): LQI Root is receiving packet from node 2 @0:52:46.027429321
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:46.032838952
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:46.036431954
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 61 that advertises 243.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 243.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 1241.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 243.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 243.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 1621.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 1621.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 1621.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 2482.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2325.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2482.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 2482.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 2482.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:51.006212520
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:52:51.009433649
+DEBUG (0): LQI Root is receiving packet from node 2 @0:52:51.012170621
+DEBUG (0): LQI Root is receiving packet from node 4 @0:52:51.017444467
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:51.023164818
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:52:51.027724948
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:51.037780431
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:52:51.049364006
+DEBUG (0): LQI Root is receiving packet from node 6 @0:52:51.053438079
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:51.059546994
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:52:56.012542541
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:52:56.016313662
+DEBUG (0): LQI Root is receiving packet from node 1 @0:52:56.016664730
+DEBUG (0): LQI Root is receiving packet from node 2 @0:52:56.018594533
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:52:56.020877674
+DEBUG (0): LQI Root is receiving packet from node 3 @0:52:56.023017666
+DEBUG (0): LQI Root is receiving packet from node 5 @0:52:56.025445690
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:52:56.042361924
+DEBUG (0): LQI Root is receiving packet from node 4 @0:52:56.045291594
+DEBUG (0): LQI Root is receiving packet from node 6 @0:52:56.055438630
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:1.021812229
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:53:1.034074788
+DEBUG (0): LQI Root is receiving packet from node 1 @0:53:1.039186571
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:53:1.046588584
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:1.051034530
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:53:1.059432526
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:53:1.065097387
+DEBUG (0): LQI Root is receiving packet from node 6 @0:53:1.069293529
+DEBUG (0): LQI Root is receiving packet from node 5 @0:53:1.073562083
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:1.080874882
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 65 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 1423.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 729 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 1423.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 1423.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 1423.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 1423.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1423.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:6.007226802
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:53:6.010240699
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:53:6.013599274
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:53:6.015945231
+DEBUG (0): LQI Root is receiving packet from node 1 @0:53:6.029588849
+DEBUG (0): LQI Root is receiving packet from node 5 @0:53:6.036117233
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:53:6.043887794
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:6.045249592
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:6.048051876
+DEBUG (0): LQI Root is receiving packet from node 6 @0:53:6.053667077
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 755.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 755.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 755.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 755.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 755.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 165 and my cost to 755.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 755.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 755.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 107 that advertises 1135.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 755.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 1135.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 59 that advertises 1135.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1135.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 165 and my cost to 755.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:53:11.010318654
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:53:11.014360548
+DEBUG (0): LQI Root is receiving packet from node 1 @0:53:11.018038013
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:11.025260695
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:53:11.028487883
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:11.036226383
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:53:11.044450704
+DEBUG (0): LQI Root is receiving packet from node 5 @0:53:11.050142199
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:53:11.052171607
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:11.054833946
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:11.061021653
+DEBUG (0): LQI Root is receiving packet from node 1 @0:53:16.006365107
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:16.008933886
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:53:16.010879343
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:16.011194064
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:53:16.013355135
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:53:16.014482618
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:16.023532688
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:53:16.032459027
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:53:16.037616468
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:16.042606063
+DEBUG (0): LQI Root is receiving packet from node 5 @0:53:16.050464293
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 64 that advertises 273.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 755.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 273.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 755.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 273.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 273.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 273.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 273.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:53:21.010894602
+DEBUG (0): LQI Root is receiving packet from node 1 @0:53:21.018129565
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:21.024162068
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:53:21.026691239
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:53:21.028139154
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:21.033939121
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:53:21.035297146
+DEBUG (0): LQI Root is receiving packet from node 6 @0:53:21.039401736
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:53:21.042504916
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:53:21.045749355
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:21.048287964
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:53:21.049808169
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:53:21.058780285
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:53:21.058780285
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:21.058780285
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:53:21.058780285
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:53:21.058780285
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:21.058780285
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:21.063251084
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:21.065311008
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:21.067737142
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:53:21.074893472
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 920.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 755.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 920.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 755.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 920.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 4, my link to 1950 and my cost to 920.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 920.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 807.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 755.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 807.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 807.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 807.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 4, my link to 1950 and my cost to 920.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:53:26.015016672
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:26.017768673
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:53:26.021379550
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:53:26.021379550
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:53:26.025545175
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:26.029466661
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:53:26.029466661
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:53:26.029466661
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:53:26.029466661
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:53:26.035714795
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:26.037706359
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:53:26.042022350
+DEBUG (0): LQI Root is receiving packet from node 5 @0:53:26.046081164
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:53:26.046081164
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:53:26.046081164
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:53:26.046081164
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:53:26.047439188
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:53:26.048333740
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:53:26.053420599
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:26.064559450
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:53:26.082015402
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:53:26.087922859
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:53:26.103364663
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:53:26.108293223
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:53:26.108293223
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:53:26.108293223
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:53:26.108293223
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:53:26.108293223
+DEBUG (0): LQI Root is receiving packet from node 1 @0:53:26.108293223
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:53:26.111390739
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:53:26.116395593
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:53:26.118775950
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:26.118775950
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:53:26.118775950
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:53:26.118775950
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:53:26.118775950
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:53:26.126939355
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:53:26.130281010
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:53:26.133424302
+DEBUG (0): LQI Root is receiving packet from node 1 @0:53:26.133424302
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:53:26.133424302
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:53:26.133424302
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:53:26.133424302
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:53:26.133424302
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:53:26.135941988
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:53:26.139054763
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:53:26.143678149
+DEBUG (0): LQI Root is receiving packet from node 1 @0:53:26.143678149
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:53:26.143678149
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:53:26.143678149
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:53:26.143678149
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:53:26.145677038
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:53:26.145677038
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:53:26.145677038
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:53:26.145677038
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:53:26.151948364
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:31.008170951
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:31.008170951
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:53:31.010415870
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:53:31.010415870
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:31.010415870
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:53:31.010415870
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:53:31.011188400
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:53:31.014520461
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:53:31.014520461
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:31.014520461
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:53:31.018833008
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:31.018833008
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:53:31.018833008
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:53:31.018833008
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:53:31.019784712
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:53:31.019784712
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:53:31.023044409
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:31.023044409
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:53:31.023044409
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:53:31.023044409
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:31.025226404
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:53:31.025226404
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:53:31.025226404
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:53:31.025592612
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:53:31.030292292
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:31.030292292
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:53:31.030292292
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:53:31.030292292
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:53:31.030292292
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:31.032214888
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:53:31.032214888
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:53:31.032214888
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:53:31.033532801
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:53:31.033532801
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:31.034137484
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:53:31.034137484
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:53:31.034137484
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:53:31.034137484
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:53:31.041019158
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:53:31.041019158
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:53:31.041019158
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:53:31.041019158
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:53:31.043481473
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:53:31.043481473
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:53:31.043481473
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:31.043481473
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:53:31.043481473
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:53:31.043481473
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:36.009498458
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:53:36.018058588
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:53:36.018058588
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:53:36.018058588
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:53:36.018058588
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:53:36.018058588
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:53:36.023139736
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:36.023139736
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:36.023139736
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:53:36.023658531
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:53:36.025428541
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:36.025428541
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:53:36.025428541
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:36.025428541
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:53:36.027106998
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:53:36.027106998
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:53:36.034660054
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:53:36.034660054
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:36.034660054
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:53:36.034660054
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:53:36.034660054
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 73 that advertises 1518.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1518.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 1837.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 1837.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 1837.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 1837.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 1837.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 2302.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 2302.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 77 that advertises 2302.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 62 that advertises 2302.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 2302.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:53:41.005617431
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:41.007669304
+DEBUG (0): LQI Root is receiving packet from node 5 @0:53:41.018356106
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:41.022479838
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:53:41.031557103
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:41.034553243
+DEBUG (0): LQI Root is receiving packet from node 6 @0:53:41.040101975
+DEBUG (0): LQI Root is receiving packet from node 1 @0:53:46.006212520
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:46.008935776
+DEBUG (0): LQI Root is receiving packet from node 5 @0:53:46.015075486
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:46.019523424
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:46.023273290
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:53:46.026277593
+DEBUG (0): LQI Root is receiving packet from node 6 @0:53:46.033555993
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:51.005884036
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:51.011375278
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:53:51.015825383
+DEBUG (0): LQI Root is receiving packet from node 1 @0:53:51.022127344
+DEBUG (0): LQI Root is receiving packet from node 5 @0:53:51.036468183
+DEBUG (0): LQI Root is receiving packet from node 6 @0:53:51.041431143
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:51.050906796
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 307.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 307.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 82 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 1423.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 1423.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 1423.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1423.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1837.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 1837.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 1837.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 1837.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:53:56.006311280
+DEBUG (0): LQI Root is receiving packet from node 3 @0:53:56.008399831
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:53:56.010530614
+DEBUG (0): LQI Root is receiving packet from node 5 @0:53:56.018447658
+DEBUG (0): LQI Root is receiving packet from node 1 @0:53:56.023485369
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:53:56.024219329
+DEBUG (0): LQI Root is receiving packet from node 2 @0:53:56.029665142
+DEBUG (0): LQI Root is receiving packet from node 6 @0:53:56.035585518
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:53:56.050693174
+DEBUG (0): LQI Root is receiving packet from node 4 @0:53:56.056125271
+DEBUG (0): LQI Root is receiving packet from node 1 @0:54:1.006334590
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:54:1.007709416
+DEBUG (0): LQI Root is receiving packet from node 3 @0:54:1.008323538
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:54:1.010186990
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:54:1.015138742
+DEBUG (0): LQI Root is receiving packet from node 5 @0:54:1.017394808
+DEBUG (0): LQI Root is receiving packet from node 4 @0:54:1.035373439
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:54:1.037813170
+DEBUG (0): LQI Root is receiving packet from node 2 @0:54:1.040256223
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:1.047839797
+DEBUG (0): LQI Root is receiving packet from node 3 @0:54:6.006385683
+DEBUG (0): LQI Root is receiving packet from node 1 @0:54:6.014620064
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:54:6.020023187
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:54:6.023477317
+DEBUG (0): LQI Root is receiving packet from node 4 @0:54:6.025897786
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:54:6.029237780
+DEBUG (0): LQI Root is receiving packet from node 2 @0:54:6.035709130
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:54:6.046297007
+DEBUG (0): LQI Root is receiving packet from node 5 @0:54:6.054061464
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:6.060884324
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 62 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 432.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 432.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1076 and my cost to 432.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 432.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 432.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 432.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 1097.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1097.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1097.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1076 and my cost to 432.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 1097.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 1097.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 1097.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 1826.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1076 and my cost to 432.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 1826.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 1826.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1826.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:54:11.008212953
+DEBUG (0): LQI Root is receiving packet from node 1 @0:54:11.011003752
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:54:11.013101401
+DEBUG (0): LQI Root is receiving packet from node 4 @0:54:11.018312669
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:54:11.020927224
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:54:11.027650876
+DEBUG (0): LQI Root is receiving packet from node 2 @0:54:11.034395339
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:54:11.036002820
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:54:11.040267599
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:54:11.047561258
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:54:11.051347637
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:11.053947051
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:11.062842873
+DEBUG (0): LQI Root is receiving packet from node 5 @0:54:11.069114199
+DEBUG (0): LQI Root is receiving packet from node 1 @0:54:16.010866424
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:54:16.011371504
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:54:16.012840113
+DEBUG (0): LQI Root is receiving packet from node 4 @0:54:16.015048851
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:54:16.024461807
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:54:16.030664165
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:54:16.044954241
+DEBUG (0): LQI Root is receiving packet from node 2 @0:54:16.048333740
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:54:16.050399376
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:16.053613250
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:54:16.055673174
+DEBUG (0): LQI Root is receiving packet from node 3 @0:54:16.060403371
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:54:16.064782618
+DEBUG (0): LQI Root is receiving packet from node 5 @0:54:16.074120943
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:54:21.006656566
+DEBUG (0): LQI Root is receiving packet from node 1 @0:54:21.009126932
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:54:21.011453462
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:54:21.012542541
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:54:21.015123483
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:54:21.020860754
+DEBUG (0): LQI Root is receiving packet from node 4 @0:54:21.027864616
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:54:21.032378851
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:54:21.033103667
+DEBUG (0): LQI Root is receiving packet from node 2 @0:54:21.038118462
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:21.049699815
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:54:21.053168857
+DEBUG (0): LQI Root is receiving packet from node 3 @0:54:21.058112676
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 144.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1097.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 144.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 144.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 144.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 557.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1097.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 557.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1076 and my cost to 432.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 557.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 557.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:54:26.006212520
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:54:26.008783189
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:54:26.012489163
+DEBUG (0): LQI Root is receiving packet from node 2 @0:54:26.014184769
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:54:26.015582905
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:54:26.016801940
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:54:26.019706528
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:54:26.033144008
+DEBUG (0): LQI Root is receiving packet from node 4 @0:54:26.036060081
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:54:26.044219603
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:26.046680136
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:54:26.050506187
+DEBUG (0): LQI Root is receiving packet from node 3 @0:54:26.054080605
+DEBUG (0): LQI Root is receiving packet from node 5 @0:54:26.063739362
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 111 that advertises 1508.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1097.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 1508.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 1508.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:54:31.008293020
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:54:31.009906669
+DEBUG (0): LQI Root is receiving packet from node 1 @0:54:31.017503958
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:54:31.019937299
+DEBUG (0): LQI Root is receiving packet from node 4 @0:54:31.024324597
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:54:31.036424628
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:54:31.042916901
+DEBUG (0): LQI Root is receiving packet from node 3 @0:54:31.045793588
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:54:31.048982538
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:54:31.054671812
+DEBUG (0): LQI Root is receiving packet from node 2 @0:54:31.056978215
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:31.070421130
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:54:31.071746297
+DEBUG (0): LQI Root is receiving packet from node 5 @0:54:31.077300464
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:54:36.009097958
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:54:36.012224330
+DEBUG (0): LQI Root is receiving packet from node 4 @0:54:36.021623807
+DEBUG (0): LQI Root is receiving packet from node 1 @0:54:36.028383411
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:54:36.033364955
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:54:36.037780431
+DEBUG (0): LQI Root is receiving packet from node 2 @0:54:36.041406290
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:54:36.043578737
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:54:36.046190196
+DEBUG (0): LQI Root is receiving packet from node 5 @0:54:36.052383007
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:54:36.059287596
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:36.069518527
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:54:36.071631884
+DEBUG (0): LQI Root is receiving packet from node 3 @0:54:36.080344602
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1097.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1076 and my cost to 432.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:54:41.013925371
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:54:41.015037366
+DEBUG (0): LQI Root is receiving packet from node 1 @0:54:41.017717580
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:54:41.023963705
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:54:41.026092267
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:54:41.028369696
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:54:41.029100452
+DEBUG (0): LQI Root is receiving packet from node 2 @0:54:41.031908171
+DEBUG (0): LQI Root is receiving packet from node 4 @0:54:41.036272159
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:54:41.038406038
+DEBUG (0): LQI Root is receiving packet from node 3 @0:54:41.041887361
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:54:41.045930798
+DEBUG (0): LQI Root is receiving packet from node 5 @0:54:41.049821885
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:41.058031066
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 73 that advertises 164.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1097.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 164.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 1076 and my cost to 164.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 164.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 164.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 164.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 609.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 609.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 609.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 609.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 609.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 609.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 609.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 1170.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 609.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 1170.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 66 that advertises 1170.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 90 that advertises 1170.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:54:46.016466249
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:54:46.018243583
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:54:46.018493434
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:54:46.026420356
+DEBUG (0): LQI Root is receiving packet from node 2 @0:54:46.032213345
+DEBUG (0): LQI Root is receiving packet from node 1 @0:54:46.042985987
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:54:46.049258856
+DEBUG (0): LQI Root is receiving packet from node 4 @0:54:46.055133456
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:54:46.056953015
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:54:46.070132758
+DEBUG (0): LQI Root is receiving packet from node 3 @0:54:46.073218789
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:54:46.074923989
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:46.082175646
+DEBUG (0): LQI Root is receiving packet from node 5 @0:54:46.093085616
+DEBUG (0): LQI Root is receiving packet from node 1 @0:54:51.007494251
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:54:51.010940378
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:54:51.020089886
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:54:51.026283028
+DEBUG (0): LQI Root is receiving packet from node 2 @0:54:51.032464692
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:54:51.036470404
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:54:51.039222405
+DEBUG (0): LQI Root is receiving packet from node 3 @0:54:51.044425622
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:54:51.046573325
+DEBUG (0): LQI Root is receiving packet from node 4 @0:54:51.054706212
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:54:51.061587886
+DEBUG (0): LQI Root is receiving packet from node 5 @0:54:51.065875580
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:54:51.070025947
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:51.076983914
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:54:56.013690826
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:54:56.014739794
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:54:56.016137883
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:54:56.016771423
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:54:56.017371947
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:54:56.019286887
+DEBUG (0): LQI Root is receiving packet from node 1 @0:54:56.021822170
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:54:56.023399133
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:54:56.034118343
+DEBUG (0): LQI Root is receiving packet from node 4 @0:54:56.040178387
+DEBUG (0): LQI Root is receiving packet from node 2 @0:54:56.045076429
+DEBUG (0): LQI Root is receiving packet from node 6 @0:54:56.049531970
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 66 that advertises 165.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 609.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 165.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 165.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 165.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 165.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 289.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 609.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 289.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 106 and my cost to 289.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 289.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 289.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 165.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 643.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 165 and my cost to 643.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 643.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 106 and my cost to 289.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 643.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 643.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 165.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:1.009676245
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:55:1.015374948
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:55:1.017082032
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:55:1.017627571
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:55:1.020377911
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:1.024020966
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:1.030717874
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:1.036025681
+DEBUG (0): LQI Root is receiving packet from node 2 @0:55:1.040612838
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:55:1.042800543
+DEBUG (0): LQI Root is receiving packet from node 3 @0:55:1.046365367
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:55:1.049060493
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:1.050017909
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:1.051513261
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:55:1.057387861
+DEBUG (0): LQI Root is receiving packet from node 4 @0:55:1.070010688
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:1.075622007
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:1.079360389
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:1.083785412
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:1.087539052
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:1.096389098
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:55:6.008109916
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:6.012331259
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:6.016740905
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:55:6.016900818
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:55:6.020419913
+DEBUG (0): LQI Root is receiving packet from node 3 @0:55:6.021585239
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:55:6.025094740
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:6.028064522
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:6.031524364
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:55:6.040237082
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:55:6.043399515
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:6.046722029
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:6.049651700
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:55:6.054748106
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:6.059615631
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:6.062011247
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:6.071206531
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:6.072280352
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:6.076836991
+DEBUG (0): LQI Root is receiving packet from node 4 @0:55:6.084206943
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:6.091637930
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:55:11.007074215
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:11.009462623
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:11.011794865
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:55:11.014686416
+DEBUG (0): LQI Root is receiving packet from node 2 @0:55:11.016817317
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:11.021440585
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:11.026079230
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:55:11.028846489
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:55:11.032184371
+DEBUG (0): LQI Root is receiving packet from node 3 @0:55:11.034843158
+DEBUG (0): LQI Root is receiving packet from node 3 @0:55:11.040744501
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:11.045200042
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:11.047824538
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:55:11.051318781
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:11.052753098
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:55:11.058627698
+DEBUG (0): LQI Root is receiving packet from node 4 @0:55:11.065280491
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:55:11.076266755
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:55:11.085208353
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:11.085208353
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:11.085208353
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:11.085208353
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:11.085208353
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:11.085208353
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:11.091098211
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:11.094836593
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:11.096209876
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 61 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 165 and my cost to 643.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 271.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 271.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 271.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 380 and my cost to 271.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 271.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 271.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 271.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 651.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 165 and my cost to 643.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 651.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 271.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 651.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 651.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 808.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 271.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 808.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 165.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 808.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 380 and my cost to 271.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 808.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 271.
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:16.009826493
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:16.012895713
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:16.016695129
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:16.021533798
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:16.023348040
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:16.024209735
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:55:16.027229067
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:16.029748643
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:55:16.033914268
+DEBUG (0): LQI Root is receiving packet from node 2 @0:55:16.038430843
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:16.041604653
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:16.046075452
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:55:16.047784427
+DEBUG (0): LQI Root is receiving packet from node 3 @0:55:16.056710766
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:21.014087553
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:21.023254149
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:21.024049822
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:55:21.026818973
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:55:21.027595276
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:21.031190894
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:21.032716882
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:55:21.033349696
+DEBUG (0): LQI Root is receiving packet from node 2 @0:55:21.038911914
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:55:21.039605763
+DEBUG (0): LQI Root is receiving packet from node 3 @0:55:21.044298236
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:21.048562620
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:55:21.052636693
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:55:21.052636693
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:21.052636693
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:21.052636693
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:21.052636693
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:55:21.052636693
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:21.056771801
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:21.059442073
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:21.079141055
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:55:21.082681073
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:21.088143688
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:26.006792351
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:55:26.006792351
+DEBUG (0): LQI Root is receiving packet from node 2 @0:55:26.009164657
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:55:26.009164657
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:55:26.009164657
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:55:26.009164657
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:55:26.009164657
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:55:26.011207432
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:55:26.023698872
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:26.026981154
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:26.029403405
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:55:26.033115151
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:55:26.033115151
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:55:26.038379403
+DEBUG (0): LQI Root is receiving packet from node 4 @0:55:26.039066044
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:55:26.039779321
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:55:26.039779321
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:55:26.042194078
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:55:26.046691512
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:55:26.046691512
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:55:26.046691512
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:55:26.054519225
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:26.054519225
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:55:26.054519225
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:55:26.054519225
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:26.055362336
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:55:26.056733958
+DEBUG (0): LQI Root is receiving packet from node 2 @0:55:26.059283822
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:55:26.059283822
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:55:26.059283822
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:55:26.059875029
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:26.065413937
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:26.065413937
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:26.065413937
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:26.065413937
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:55:26.065413937
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:55:26.067569296
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:55:26.070311980
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:26.070311980
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:55:26.070311980
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:26.070311980
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:26.070311980
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:26.072068951
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:26.074920107
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:55:26.074920107
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:26.074920107
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:55:26.075839511
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:26.077010549
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:26.077010549
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:55:26.077010549
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:26.077010549
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:26.079560973
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:26.079560973
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:26.079560973
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:55:26.079560973
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:55:26.079560973
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:26.084642120
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:26.084642120
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:26.084642120
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:55:26.084642120
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:26.087632825
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:55:26.087632825
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:26.087632825
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:26.087632825
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:26.087632825
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:55:26.091048553
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:26.091048553
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:26.091048553
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:26.091048553
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:26.091048553
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:26.091048553
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:55:26.094209325
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:26.094209325
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:26.094209325
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:26.094209325
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:26.094209325
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:26.095368986
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:26.100646275
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:26.103318769
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:26.103318769
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:26.103318769
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:26.103318769
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:26.103318769
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 63 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 74 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:31.007311029
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:55:31.008119858
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:55:31.008119858
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:55:31.011478315
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:55:31.011478315
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:31.011478315
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:55:31.011478315
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:31.013427546
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:55:31.013427546
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:31.013427546
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:55:31.013427546
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:55:31.016313780
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:55:31.016452651
+DEBUG (0): LQI Root is receiving packet from node 4 @0:55:31.016452651
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:31.021060778
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:31.021060778
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:31.023151220
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:31.023151220
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:31.023151220
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:55:31.023151220
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:55:31.023151220
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:55:31.026920119
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:31.026920119
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:31.026920119
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:31.026920119
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:31.030231257
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:31.030292292
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:31.030292292
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:55:31.041614247
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:31.041614247
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:31.041614247
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:55:31.041614247
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:31.041614247
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:31.041614247
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:55:36.010240699
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:55:36.018892382
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:36.018892382
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:36.018892382
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:36.018892382
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:36.024828016
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:36.024828016
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:55:36.024828016
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:36.026857423
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:36.026857423
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:36.026857423
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:55:36.026857423
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:36.027895015
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:36.029069935
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:36.029069935
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:36.029069935
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:36.029069935
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:55:36.033418664
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:36.033418664
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:36.033418664
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:36.033418664
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:36.036470404
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:36.036470404
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:36.036470404
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:36.036470404
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:55:36.036470404
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:36.036470404
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:55:36.044053978
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:36.044053978
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:55:36.044053978
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:36.044053978
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:55:36.044053978
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:36.044053978
+DEBUG (0): LQI Root is receiving packet from node 4 @0:55:41.006000442
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:55:41.006000442
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:41.006000442
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:55:41.006000442
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:55:41.006000442
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:55:41.007499568
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:41.008437951
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:55:41.008437951
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:41.008437951
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:55:41.009218484
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:41.010500097
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:41.010500097
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:55:41.010904149
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:55:41.012222109
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:41.012222109
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:55:41.012977441
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:55:41.012977441
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:55:41.012977441
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:41.015319625
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:55:41.015319625
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:55:41.015319625
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:55:41.016618836
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:41.017656545
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:55:41.017656545
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:55:41.020318767
+DEBUG (0): LQI Root is receiving packet from node 4 @0:55:41.020318767
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:55:41.020318767
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:55:41.021140846
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:41.022506472
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:55:41.022506472
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:55:41.022506472
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:55:41.022506472
+DEBUG (0): LQI Root is receiving packet from node 2 @0:55:41.025209602
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:55:41.025209602
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:55:41.026018195
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:41.026254401
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:55:41.028953300
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:55:41.028953300
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:41.028953300
+DEBUG (0): LQI Root is receiving packet from node 4 @0:55:41.030112961
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:55:41.034944534
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:41.035341379
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:55:41.038428953
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:55:41.038428953
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:55:41.038428953
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:55:41.038428953
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:55:41.041917878
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:55:41.041917878
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:41.041917878
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:41.041917878
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:41.041917878
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:55:41.044150965
+DEBUG (0): LQI Root is receiving packet from node 3 @0:55:41.044150965
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:55:41.044150965
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:55:41.044150965
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:55:41.044150965
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:41.046744944
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:55:41.046744944
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:55:41.046744944
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:41.049043691
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:41.049043691
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:55:41.049043691
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:55:41.049043691
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:41.049043691
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:41.049043691
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:55:41.052009196
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:55:41.052009196
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:55:41.052009196
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:41.052009196
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:55:41.052009196
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:55:41.055213523
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:55:41.055213523
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:41.055213523
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:55:41.055213523
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:41.055213523
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:55:41.064353484
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:41.064353484
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:55:41.064353484
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:41.064353484
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:55:41.064353484
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:41.064353484
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 68 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3720 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 1076.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3720 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 1076.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 1076.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:55:46.005563604
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:55:46.009666303
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:46.016344297
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:46.020141374
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:46.026475956
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:46.037524916
+DEBUG (0): LQI Root is receiving packet from node 3 @0:55:46.042853976
+DEBUG (0): LQI Root is receiving packet from node 4 @0:55:46.052756872
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 1541.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1541.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1541.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1541.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 1541.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 1541.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1541.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 2102.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 1076.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 2102.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 66 that advertises 2102.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:51.009357356
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:51.010973117
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:51.011430996
+DEBUG (0): LQI Root is receiving packet from node 2 @0:55:51.014840893
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:51.016145816
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:55:51.023216029
+DEBUG (0): LQI Root is receiving packet from node 4 @0:55:51.028405878
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:51.032775578
+DEBUG (0): LQI Root is receiving packet from node 3 @0:55:51.043801906
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:51.050811361
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:51.053353852
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:51.058679138
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:55:56.006641307
+DEBUG (0): LQI Root is receiving packet from node 1 @0:55:56.009996678
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:55:56.012245024
+DEBUG (0): LQI Root is receiving packet from node 4 @0:55:56.016580385
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:55:56.018983934
+DEBUG (0): LQI Root is receiving packet from node 2 @0:55:56.023111109
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:55:56.023698872
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:55:56.031982125
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:55:56.038863799
+DEBUG (0): LQI Root is receiving packet from node 3 @0:55:56.042749056
+DEBUG (0): LQI Root is receiving packet from node 5 @0:55:56.073876804
+DEBUG (0): LQI Root is receiving packet from node 6 @0:55:56.082238571
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 72 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1541.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 79 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:1.007158442
+DEBUG (0): LQI Root is receiving packet from node 1 @0:56:1.009737280
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:56:1.015842303
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:1.018859643
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:1.025367506
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:56:1.027637278
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:56:1.032703167
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:56:1.035623243
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:1.039035527
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:1.049274115
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:56:1.053369111
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:1.056872947
+DEBUG (0): LQI Root is receiving packet from node 2 @0:56:1.064273417
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 1201.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1541.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 1201.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1541.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 1201.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1201.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 1593.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1541.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1593.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 1593.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 1593.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 1593.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:56:6.010896941
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:56:6.014901928
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:6.019988787
+DEBUG (0): LQI Root is receiving packet from node 2 @0:56:6.028909415
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:56:6.032565838
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:6.038486214
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:6.046663216
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:6.050376515
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:56:6.059150268
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:56:6.061496333
+DEBUG (0): LQI Root is receiving packet from node 3 @0:56:6.064322967
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:56:6.070987245
+DEBUG (0): LQI Root is receiving packet from node 6 @0:56:6.073768102
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:6.082221422
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:56:11.006183546
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:11.013841870
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:56:11.016580385
+DEBUG (0): LQI Root is receiving packet from node 1 @0:56:11.019640176
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:11.021064552
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:11.022813868
+DEBUG (0): LQI Root is receiving packet from node 2 @0:56:11.025652104
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:56:11.026567508
+DEBUG (0): LQI Root is receiving packet from node 6 @0:56:11.030519511
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:56:11.033225736
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:11.036163009
+DEBUG (0): LQI Root is receiving packet from node 3 @0:56:11.043433807
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:56:11.046996686
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:11.050109461
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:56:16.007129585
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:16.009467940
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:16.016039005
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:16.018739913
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:16.020812757
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:56:16.023271629
+DEBUG (0): LQI Root is receiving packet from node 1 @0:56:16.027971427
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:56:16.033258144
+DEBUG (0): LQI Root is receiving packet from node 6 @0:56:16.036104314
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:56:16.038812311
+DEBUG (0): LQI Root is receiving packet from node 2 @0:56:16.044801773
+DEBUG (0): LQI Root is receiving packet from node 3 @0:56:16.050630596
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:56:16.064790551
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:16.075532676
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 68 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1541.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1541.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 167.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1541.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 167.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 926 and my cost to 167.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 167.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 420 and my cost to 167.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 167.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 167.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 167.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 587.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 612 and my cost to 587.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 587.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 90 and my cost to 587.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 587.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 167.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 587.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 90 that advertises 587.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1199.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 90 and my cost to 587.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 1199.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 420 and my cost to 167.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 1199.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 167.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 1199.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 125.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:56:21.008508533
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:21.009651045
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:21.014175222
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:21.016420472
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:56:21.019016113
+DEBUG (0): LQI Root is receiving packet from node 1 @0:56:21.030265548
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:56:21.033466102
+DEBUG (0): LQI Root is receiving packet from node 2 @0:56:21.035509224
+DEBUG (0): LQI Root is receiving packet from node 1 @0:56:21.043214868
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:56:21.058143193
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:56:21.062640736
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:21.067161085
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:56:21.077643812
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:56:21.084906953
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:21.088279126
+DEBUG (0): LQI Root is receiving packet from node 6 @0:56:21.097815813
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:56:26.007943961
+DEBUG (0): LQI Root is receiving packet from node 1 @0:56:26.011003752
+DEBUG (0): LQI Root is receiving packet from node 2 @0:56:26.015733949
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:56:26.026843826
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:26.029716235
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:26.034273151
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:56:26.036716205
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:56:26.038072568
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:56:26.042728132
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:26.046344444
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:26.049407561
+DEBUG (0): LQI Root is receiving packet from node 3 @0:56:26.053851725
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:56:26.056720360
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:56:26.059737700
+DEBUG (0): LQI Root is receiving packet from node 6 @0:56:26.070880434
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:56:26.072936476
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:26.081282985
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:56:31.006204469
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:56:31.010272878
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:31.012801939
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:56:31.020923450
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:56:31.021713020
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:31.023851459
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:56:31.027389256
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:31.032142369
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:31.035143016
+DEBUG (0): LQI Root is receiving packet from node 1 @0:56:31.041277013
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:56:31.053254974
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:31.063737819
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:31.066688065
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:31.073152437
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:31.076224753
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:56:31.081672109
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:56:31.086737997
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:56:31.091132503
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:31.091132503
+DEBUG (0): LQI Root is receiving packet from node 6 @0:56:31.091132503
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:56:31.091132503
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:31.099265390
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 62 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 612 and my cost to 587.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 90 and my cost to 587.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 167.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 292.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 612 and my cost to 587.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 292.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 90 and my cost to 587.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 292.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 76 and my cost to 292.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 292.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 677.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 5, my link to 144 and my cost to 677.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 677.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 76 and my cost to 292.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 677.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 167.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 677.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 5, my link to 3208 and my cost to 677.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 677.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 5, my link to 669 and my cost to 677.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:36.006080509
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:56:36.009235286
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:36.012573059
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:56:36.018678878
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:56:36.030963675
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:56:36.033507995
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:56:36.034761548
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:56:36.035653760
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:56:36.039962425
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:56:36.047746702
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:56:36.049691764
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:56:36.057191837
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:56:36.058053532
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:56:36.059129574
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:56:36.062127605
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:36.081254689
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:36.092614487
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:56:36.101045223
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:56:36.102189625
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:56:36.103051438
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:56:36.107118185
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:56:36.111726313
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:56:36.117898153
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:56:36.121400328
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:56:36.127526393
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:56:36.137658170
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:56:36.147011753
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:56:36.147011753
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:56:36.147011753
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:56:36.147011753
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:36.147011753
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:36.147011753
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:56:36.150414443
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:56:36.152337039
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:56:36.157509738
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:36.157509738
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:56:36.157509738
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:36.157509738
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:56:36.157509738
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:56:36.157509738
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:56:36.163308044
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:56:36.169640405
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:36.169640405
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:36.169640405
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:56:36.169640405
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:56:36.169640405
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:56:41.007480535
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:41.007480535
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:56:41.007480535
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:56:41.007480535
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:41.009264142
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:41.009612871
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:56:41.011970367
+DEBUG (0): LQI Root is receiving packet from node 3 @0:56:41.011970367
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:56:41.011970367
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:56:41.011970367
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:41.011970367
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:56:41.011970367
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:56:41.017356688
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:41.017356688
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:56:41.017356688
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:56:41.018022754
+DEBUG (0): LQI Root is receiving packet from node 3 @0:56:41.020194806
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:56:41.020194806
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:56:41.020194806
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:56:41.020194806
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:56:41.020684975
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:56:41.023531145
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:56:41.023531145
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:41.023531145
+DEBUG (0): LQI Root is receiving packet from node 3 @0:56:41.023531145
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:56:41.023531145
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:56:41.027045963
+DEBUG (0): LQI Root is receiving packet from node 3 @0:56:41.027045963
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:56:41.027045963
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:56:41.028100704
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:56:41.028100704
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:56:41.032554353
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:56:41.032554353
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:56:41.032554353
+DEBUG (0): LQI Root is receiving packet from node 3 @0:56:41.032554353
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:56:41.032554353
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:41.032554353
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:56:41.037559207
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:56:41.037559207
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:56:41.037559207
+DEBUG (0): LQI Root is receiving packet from node 3 @0:56:41.037559207
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:56:41.037559207
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:41.037559207
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:56:46.009126814
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:56:46.013030820
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:46.013030820
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:56:46.013030820
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:46.013030820
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:56:46.013030820
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:56:46.013030820
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:56:46.017791534
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:46.017791534
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:56:46.017791534
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:56:46.017791534
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:46.017791534
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:56:46.020126115
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:46.020126115
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:56:46.026061750
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:56:46.026061750
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:56:46.026061750
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:46.026061750
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:56:46.026061750
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:56:46.026061750
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 65 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4290 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 855.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 855.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 855.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 855.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 1621.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1621.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 1621.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 1621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:51.005756302
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 2476.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 66 that advertises 2476.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 2476.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:56:51.010690527
+DEBUG (0): LQI Root is receiving packet from node 1 @0:56:51.012850055
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:51.015098401
+DEBUG (0): LQI Root is receiving packet from node 3 @0:56:51.020606791
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:56:51.024047601
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:51.030440996
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:51.039598445
+DEBUG (0): LQI Root is receiving packet from node 6 @0:56:51.066072289
+DEBUG (0): LQI Root is receiving packet from node 1 @0:56:56.008714947
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:56:56.011100621
+DEBUG (0): LQI Root is receiving packet from node 4 @0:56:56.015552388
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:56:56.016298403
+DEBUG (0): LQI Root is receiving packet from node 2 @0:56:56.021341099
+DEBUG (0): LQI Root is receiving packet from node 6 @0:56:56.024889051
+DEBUG (0): LQI Root is receiving packet from node 3 @0:56:56.030603130
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:56:56.031234449
+DEBUG (0): LQI Root is receiving packet from node 5 @0:56:56.034972830
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:1.009418390
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:1.013648824
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:1.016855042
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:1.020141374
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:1.022157744
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:1.024110975
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:1.026376470
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:1.030000715
+DEBUG (0): LQI Root is receiving packet from node 5 @0:57:1.034539875
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 63 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 69 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 980.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 980.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 980.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 77 that advertises 980.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 980.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:57:6.016427798
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:6.024184929
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:57:6.028552800
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:6.032213345
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:6.037925416
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:6.040788735
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:6.048143310
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:6.050201013
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:57:6.053468596
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:6.056016917
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:57:6.057357343
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:6.074128994
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:6.078643230
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:6.088820783
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:6.093950045
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:57:6.104186294
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:57:6.113463583
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:57:6.119155078
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:57:6.119155078
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:57:6.119155078
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:57:6.119155078
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:6.119155078
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:6.119155078
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:6.127516846
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:57:6.132872650
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:57:6.134215415
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:6.135008868
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 2010.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 1621.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2010.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 125 and my cost to 2010.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 2010.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 2010.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 3, my link to 2197 and my cost to 2010.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 2010.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:57:11.011829265
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:11.014983933
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:11.017112549
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:57:11.020797498
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:57:11.023559323
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:57:11.023559323
+DEBUG (0): LQI Root is receiving packet from node 5 @0:57:11.023559323
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:57:11.023559323
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:57:11.023559323
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:57:11.027770724
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:57:11.033342489
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:11.038634918
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:57:11.041597327
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:57:11.046035388
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:11.050737289
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:11.053023872
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:57:11.056947580
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:57:11.056947580
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:57:11.056947580
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:11.056947580
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:57:11.056947580
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:57:11.056947580
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:57:11.061568744
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:11.064271756
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:57:11.066102800
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:57:11.071931623
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:57:11.071931623
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:57:11.071931623
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:57:11.073182836
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:11.076949514
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:57:11.082078659
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:11.086335836
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:11.088624641
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:57:11.091874744
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:57:11.098924263
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:57:11.098924263
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:11.098924263
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:11.098924263
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:57:11.106828270
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:57:11.130586066
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:16.006519237
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:57:16.006519237
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:57:16.006519237
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:57:16.006519237
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:57:16.006519237
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:57:16.007226802
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:16.009279401
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:57:16.011268467
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:16.011268467
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:57:16.011268467
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:16.011268467
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:57:16.011977969
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:57:16.011977969
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:57:16.015237619
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:57:16.015237619
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:16.015237619
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:57:16.015237619
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:57:16.015237619
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:57:16.015237619
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:57:16.017793755
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:57:16.020660170
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:57:16.020660170
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:16.020660170
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:57:16.020660170
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:16.023628014
+DEBUG (0): LQI Root is receiving packet from node 5 @0:57:16.023628014
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:57:16.023628014
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:57:16.023628014
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:57:16.023628014
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:57:16.023628014
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:16.026443217
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:57:16.026443217
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:57:16.026443217
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:57:16.029428210
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:57:16.029428210
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:57:16.029428210
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:57:16.029428210
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:57:16.031219190
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:57:16.032091157
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:16.032091157
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:57:16.032091157
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:16.035140676
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:57:16.035140676
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:57:16.035850233
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:16.037133854
+DEBUG (0): LQI Root is receiving packet from node 5 @0:57:16.037133854
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:57:16.037133854
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:57:16.040865028
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:57:16.043494841
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:57:16.043494841
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:57:16.044051757
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:57:16.045915658
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:57:16.045915658
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:57:16.052141207
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:57:16.052141207
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:57:16.053039131
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:16.053039131
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:57:16.054185873
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:57:16.054185873
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:57:16.054185873
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:57:16.055543897
+DEBUG (0): LQI Root is receiving packet from node 5 @0:57:16.055543897
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:57:16.055543897
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:57:16.058137876
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:57:16.058137876
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:16.058137876
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:57:16.058137876
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:57:16.058137876
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:57:16.060548751
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:57:16.060548751
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:57:16.060548751
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:16.060548751
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:57:16.060548751
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:57:16.060548751
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:57:16.063753078
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:57:16.063753078
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:57:16.063753078
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:16.063753078
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:57:16.063753078
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:57:16.063753078
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:57:16.072786228
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:57:16.082353433
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:16.082353433
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:16.082353433
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:57:16.082353433
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:57:16.082353433
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:57:16.087434580
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:16.087434580
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:57:16.087434580
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:16.087434580
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:16.089586057
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:16.089586057
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:57:16.089586057
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:57:16.089586057
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:57:16.090547355
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:57:16.090547355
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:57:16.099290590
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:16.099290590
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:57:16.099290590
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:16.099290590
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:57:16.101152152
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 64 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4488 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:21.006509643
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:21.010352945
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:21.012393837
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:21.016862975
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:21.021593290
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 926.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4488 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 926.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1331 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 926.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 1595.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1595.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 1595.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1331 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 1595.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 1595.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 1595.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 2450.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1331 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 2450.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 2450.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 2450.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:26.006311280
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:26.013274959
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:57:26.015292990
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:26.020555580
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:57:26.025880866
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:26.028963242
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:26.032172886
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:26.043380374
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:26.050307824
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:26.059402009
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:31.006242920
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:31.009218484
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:57:31.017307138
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:31.019469991
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:31.027427430
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:31.030023300
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:31.035745312
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:57:31.047656693
+DEBUG (0): LQI Root is receiving packet from node 5 @0:57:31.064874171
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:31.071359118
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:36.008287704
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:36.022254731
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:36.039901390
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:36.043252593
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:36.048455809
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:36.056146194
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:57:36.059619513
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:36.061235274
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:36.064233305
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:57:36.066318083
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:36.072396710
+DEBUG (0): LQI Root is receiving packet from node 5 @0:57:36.095147431
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:36.100564270
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 243.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1331 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 243.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 243.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 1051.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1595.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 1051.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1331 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 1051.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 1051.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1051.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 2257.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1595.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2257.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 2257.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 2257.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 2257.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 243.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:41.006868644
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:41.010124064
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:41.012071743
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:57:41.016183659
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:41.017150669
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:41.020730751
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:57:41.023074927
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:57:41.029107778
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:41.044971161
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:57:41.045602432
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:57:41.060794433
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:41.063785138
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:41.073962691
+DEBUG (0): LQI Root is receiving packet from node 5 @0:57:41.080874882
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:57:46.006204469
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:46.009065897
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:57:46.010455982
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:46.011253208
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:46.019853680
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:46.020095598
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:46.028535998
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:46.030906414
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:46.033128867
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:57:46.038850761
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:46.045061052
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:57:46.058326298
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:57:46.064979091
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:57:46.074012241
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:57:46.074012241
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:46.074012241
+DEBUG (0): LQI Root is receiving packet from node 5 @0:57:46.074012241
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:57:46.074012241
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:57:46.074012241
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:46.077857434
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:57:46.081641591
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:57:46.085700406
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:46.089438787
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:57:51.006610790
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:57:51.006610790
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:51.006610790
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:57:51.008447498
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:57:51.008447498
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:51.008949145
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:51.012438070
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:57:51.012438070
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:57:51.012438070
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:57:51.012438070
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:57:51.015250988
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:57:51.015250988
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:51.015250988
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:57:51.015250988
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:57:51.015250988
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:57:51.015250988
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:57:51.019029828
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:51.019029828
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:57:51.019029828
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:51.024538219
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:57:51.024538219
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:57:51.025733715
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:51.026491214
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:57:51.031801242
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:57:51.033981015
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:57:51.043014165
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:51.050597739
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:57:51.050597739
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:57:51.050597739
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:57:51.052492157
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:57:51.055907767
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:51.066344718
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:57:51.069945771
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:51.073259248
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:51.075761557
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:57:51.085313503
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:57:51.089753785
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:57:51.099015816
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:57:51.099015816
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:57:51.099015816
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:57:51.099015816
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:51.105409211
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:57:51.105409211
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:57:51.105409211
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:57:51.105409211
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:57:51.114289774
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:51.116410734
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 64 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1595.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1595.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 1331.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 1331.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 2, my link to 42 and my cost to 1331.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 1621.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 1621.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 106 and my cost to 1621.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 1621.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 1621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 2, my link to 42 and my cost to 1331.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 2290.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 106 and my cost to 1621.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 2290.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 2290.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 62 that advertises 2290.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 2, my link to 42 and my cost to 1331.
+DEBUG (0): LQI Root is receiving packet from node 2 @0:57:56.006479126
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:57:56.008972006
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:57:56.011446254
+DEBUG (0): LQI Root is receiving packet from node 4 @0:57:56.014743677
+DEBUG (0): LQI Root is receiving packet from node 1 @0:57:56.016649471
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:57:56.030723309
+DEBUG (0): LQI Root is receiving packet from node 5 @0:57:56.032977823
+DEBUG (0): LQI Root is receiving packet from node 3 @0:57:56.037009894
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:57:56.039400075
+DEBUG (0): LQI Root is receiving packet from node 6 @0:57:56.069963251
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:58:1.010986154
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:58:1.016359438
+DEBUG (0): LQI Root is receiving packet from node 2 @0:58:1.021585239
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:58:1.022254731
+DEBUG (0): LQI Root is receiving packet from node 5 @0:58:1.024799160
+DEBUG (0): LQI Root is receiving packet from node 3 @0:58:1.032462801
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:58:1.038133721
+DEBUG (0): LQI Root is receiving packet from node 6 @0:58:1.040729243
+DEBUG (0): LQI Root is receiving packet from node 1 @0:58:1.044313494
+DEBUG (0): LQI Root is receiving packet from node 4 @0:58:1.050006532
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:58:6.007575862
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:58:6.012743126
+DEBUG (0): LQI Root is receiving packet from node 2 @0:58:6.015191843
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:58:6.016527402
+DEBUG (0): LQI Root is receiving packet from node 3 @0:58:6.021280065
+DEBUG (0): LQI Root is receiving packet from node 6 @0:58:6.024814419
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:58:6.026687356
+DEBUG (0): LQI Root is receiving packet from node 1 @0:58:6.028787345
+DEBUG (0): LQI Root is receiving packet from node 4 @0:58:6.032993082
+DEBUG (0): LQI Root is receiving packet from node 5 @0:58:6.043216411
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 66 that advertises 1373.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 1373.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 106 and my cost to 1621.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 1373.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 1373.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 1456.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 106 and my cost to 1621.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 1456.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 1456.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 2, my link to 42 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1456.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1727.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 1727.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 1727.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 2, my link to 42 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 1727.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:58:11.009830375
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:58:11.014665722
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:58:11.016723425
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:58:11.022910855
+DEBUG (0): LQI Root is receiving packet from node 6 @0:58:11.025819832
+DEBUG (0): LQI Root is receiving packet from node 2 @0:58:11.028131221
+DEBUG (0): LQI Root is receiving packet from node 3 @0:58:11.037072819
+DEBUG (0): LQI Root is receiving packet from node 5 @0:58:11.060808031
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:58:11.063234282
+DEBUG (0): LQI Root is receiving packet from node 1 @0:58:11.071977517
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:58:16.008270105
+DEBUG (0): LQI Root is receiving packet from node 4 @0:58:16.010669604
+DEBUG (0): LQI Root is receiving packet from node 5 @0:58:16.016437392
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:58:16.017702203
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:58:16.019014570
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:58:16.021873263
+DEBUG (0): LQI Root is receiving packet from node 2 @0:58:16.024698013
+DEBUG (0): LQI Root is receiving packet from node 1 @0:58:16.044229149
+DEBUG (0): LQI Root is receiving packet from node 6 @0:58:16.051011945
+DEBUG (0): LQI Root is receiving packet from node 3 @0:58:16.059548884
+DEBUG (0): LQI Root is receiving packet from node 2 @0:58:21.007928702
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:58:21.010301734
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:58:21.010688636
+DEBUG (0): LQI Root is receiving packet from node 6 @0:58:21.020847157
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:58:21.022979492
+DEBUG (0): LQI Root is receiving packet from node 4 @0:58:21.025882528
+DEBUG (0): LQI Root is receiving packet from node 3 @0:58:21.028602350
+DEBUG (0): LQI Root is receiving packet from node 5 @0:58:21.031558764
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:58:21.038515188
+DEBUG (0): LQI Root is receiving packet from node 1 @0:58:21.051012064
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 68 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1621.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 106 and my cost to 1621.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:58:26.006792351
+DEBUG (0): LQI Root is receiving packet from node 2 @0:58:26.009424055
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:58:26.012878233
+DEBUG (0): LQI Root is receiving packet from node 4 @0:58:26.016910412
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:58:26.018449880
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:58:26.022147920
+DEBUG (0): LQI Root is receiving packet from node 5 @0:58:26.024692349
+DEBUG (0): LQI Root is receiving packet from node 6 @0:58:26.030689018
+DEBUG (0): LQI Root is receiving packet from node 3 @0:58:26.042411474
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 2325.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 2325.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 2, my link to 90 and my cost to 2325.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 2325.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 2325.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 2325.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 2886.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 90 and my cost to 2325.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 2886.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 2886.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 2886.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 62 that advertises 2886.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:58:31.005998899
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:58:31.010362769
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:58:31.012183989
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:58:31.014968675
+DEBUG (0): LQI Root is receiving packet from node 2 @0:58:31.021203771
+DEBUG (0): LQI Root is receiving packet from node 6 @0:58:31.026813308
+DEBUG (0): LQI Root is receiving packet from node 4 @0:58:31.033740758
+DEBUG (0): LQI Root is receiving packet from node 3 @0:58:31.038446102
+DEBUG (0): LQI Root is receiving packet from node 5 @0:58:31.043414774
+DEBUG (0): LQI Root is receiving packet from node 4 @0:58:36.006732859
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:58:36.009338214
+DEBUG (0): LQI Root is receiving packet from node 2 @0:58:36.017892633
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:58:36.020576274
+DEBUG (0): LQI Root is receiving packet from node 1 @0:58:36.023454851
+DEBUG (0): LQI Root is receiving packet from node 5 @0:58:36.028732022
+DEBUG (0): LQI Root is receiving packet from node 3 @0:58:36.034278587
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:58:36.036302559
+DEBUG (0): LQI Root is receiving packet from node 6 @0:58:36.044496480
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 59 that advertises 165.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 165.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 165.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 165.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 165.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:58:41.006049992
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:58:41.008853818
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:58:41.016204629
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:58:41.021264806
+DEBUG (0): LQI Root is receiving packet from node 1 @0:58:41.025087532
+DEBUG (0): LQI Root is receiving packet from node 4 @0:58:41.031313082
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:58:41.037103337
+DEBUG (0): LQI Root is receiving packet from node 3 @0:58:41.041002356
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:58:41.043929687
+DEBUG (0): LQI Root is receiving packet from node 2 @0:58:41.046983767
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:58:41.049165643
+DEBUG (0): LQI Root is receiving packet from node 5 @0:58:41.052553192
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:58:41.053850064
+DEBUG (0): LQI Root is receiving packet from node 6 @0:58:41.066484267
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 1456.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 1456.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 90 and my cost to 2325.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 1456.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 1456.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1456.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 165.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 2415.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2415.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 2415.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 77 that advertises 2415.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 2415.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 165.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:58:46.009103622
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:58:46.010566567
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:58:46.013248324
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:58:46.015815560
+DEBUG (0): LQI Root is receiving packet from node 2 @0:58:46.018663620
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:58:46.024583877
+DEBUG (0): LQI Root is receiving packet from node 1 @0:58:46.026430298
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:58:46.027587620
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:58:46.031038307
+DEBUG (0): LQI Root is receiving packet from node 4 @0:58:46.033647663
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:58:46.036760320
+DEBUG (0): LQI Root is receiving packet from node 6 @0:58:46.041139685
+DEBUG (0): LQI Root is receiving packet from node 5 @0:58:46.047578856
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:58:51.007079927
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:58:51.011905558
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:58:51.014320207
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:58:51.017825934
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:58:51.018663501
+DEBUG (0): LQI Root is receiving packet from node 4 @0:58:51.021684842
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:58:51.023622579
+DEBUG (0): LQI Root is receiving packet from node 1 @0:58:51.028124014
+DEBUG (0): LQI Root is receiving packet from node 5 @0:58:51.038728810
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:58:51.039224296
+DEBUG (0): LQI Root is receiving packet from node 6 @0:58:51.044572892
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:58:51.045144671
+DEBUG (0): LQI Root is receiving packet from node 3 @0:58:51.049470935
+DEBUG (0): LQI Root is receiving packet from node 2 @0:58:51.054628375
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:58:56.012109586
+DEBUG (0): LQI Root is receiving packet from node 1 @0:58:56.018099048
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:58:56.023109218
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:58:56.026839943
+DEBUG (0): LQI Root is receiving packet from node 2 @0:58:56.028810655
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:58:56.031162038
+DEBUG (0): LQI Root is receiving packet from node 4 @0:58:56.035983787
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:58:56.037006120
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:58:56.041312847
+DEBUG (0): LQI Root is receiving packet from node 5 @0:58:56.043903052
+DEBUG (0): LQI Root is receiving packet from node 3 @0:58:56.052524218
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:58:56.060365528
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:58:56.076966994
+DEBUG (0): LQI Root is receiving packet from node 6 @0:58:56.082704265
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 90 and my cost to 2325.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 165.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 73 that advertises 217.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 217.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1423 and my cost to 217.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 217.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 217.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 217.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 1091.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1091.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 1091.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 1091.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 1091.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 217.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 1091.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 107 that advertises 1760.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 1091.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 1760.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 1760.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 217.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 1760.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:1.011422944
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:1.015306706
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:59:1.015823162
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:59:1.027106998
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:1.029237899
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:59:1.031379434
+DEBUG (0): LQI Root is receiving packet from node 3 @0:59:1.045203816
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:59:1.047992384
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:1.051562920
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:59:1.053956874
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:59:1.057178121
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:1.064197123
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:59:1.065188939
+DEBUG (0): LQI Root is receiving packet from node 6 @0:59:1.077731590
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:6.006021365
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:59:6.009483199
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:6.011827722
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:59:6.014243913
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:6.017641287
+DEBUG (0): LQI Root is receiving packet from node 3 @0:59:6.023210712
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:59:6.025317956
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:59:6.028261224
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:59:6.039825097
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:6.055484406
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:6.059144832
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:59:6.066148576
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:59:6.078065620
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:59:6.086610492
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:6.086610492
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:59:6.086610492
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:6.086610492
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:59:6.091157585
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:59:6.093568460
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:59:11.007953555
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:59:11.008605797
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:11.010729096
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:59:11.010729096
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:11.016427798
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:11.017120151
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:59:11.018495656
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:59:11.020149030
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:59:11.024667496
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:11.024667496
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:11.024667496
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:59:11.028176997
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:59:11.029647544
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:59:11.032424627
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:11.032424627
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:59:11.032424627
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:59:11.032424627
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:59:11.038772247
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:11.038772247
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:59:11.038772247
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:11.038772247
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:11.038772247
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:59:11.046310044
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:59:11.046310044
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:11.046310044
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:59:11.046310044
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:59:11.048333740
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:11.048333740
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:11.048333740
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:59:11.048333740
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:59:11.048333740
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:59:11.051072980
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:11.055770438
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:59:11.059358454
+DEBUG (6): LQI fwd is forwarding packet from node 6 @0:59:11.063020542
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:59:11.063020542
+DEBUG (0): LQI Root is receiving packet from node 6 @0:59:11.063020542
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:59:11.063020542
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:59:11.063020542
+DEBUG (0): LQI Root is receiving packet from node 6 @0:59:11.068071172
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:59:11.068071172
+DEBUG (2): LQI fwd is forwarding packet from node 6 @0:59:11.068071172
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:59:11.069169798
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:59:11.072860182
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:59:11.078292280
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 62 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 65534.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 0, my link to 106 and my cost to 65534.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 0, my link to 106 and my cost to 65534.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 0, my link to 106 and my cost to 65534.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:16.006320874
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:59:16.006320874
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:59:16.006320874
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:59:16.006320874
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:59:16.006320874
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:59:16.007356923
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:59:16.009300095
+DEBUG (0): LQI Root is receiving packet from node 3 @0:59:16.009300095
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:16.011428656
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:16.011428656
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:59:16.011428656
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:59:16.011428656
+DEBUG (4): LQI fwd is forwarding packet from node 4 @0:59:16.017107114
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:16.017107114
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:59:16.017249877
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:59:16.020120403
+DEBUG (5): LQI fwd is forwarding packet from node 4 @0:59:16.024889051
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:16.024889051
+DEBUG (3): LQI fwd is forwarding packet from node 4 @0:59:16.024889051
+DEBUG (2): LQI fwd is forwarding packet from node 4 @0:59:16.024889051
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:59:16.024889051
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:59:16.026109747
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:59:16.027534241
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:16.027534241
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:16.027534241
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:59:16.027534241
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:59:16.032035558
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:16.032035558
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:16.032813751
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:59:16.032838834
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:16.034171776
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:59:16.034171776
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:59:16.039514211
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:59:16.047784427
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:16.047784427
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:16.047784427
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:59:16.047784427
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:16.047784427
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:59:16.052056863
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:16.052056863
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:59:16.052056863
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:16.052056863
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:59:16.052056863
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:16.053323335
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:59:16.055963090
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:16.055963090
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:59:16.055963090
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:16.055963090
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:59:16.061791913
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:59:16.061791913
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:16.061791913
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:16.061791913
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:59:16.061791913
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:16.061791913
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:59:16.068551517
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:16.068551517
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:16.068551517
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:16.068551517
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:59:21.007240170
+DEBUG (0): LQI Root is receiving packet from node 3 @0:59:21.007240170
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:59:21.007240170
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:59:21.007240170
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:21.009859350
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:59:21.009859350
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:21.012033292
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:59:21.012033292
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:21.012033292
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:21.012033292
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:59:21.012033292
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:59:21.014894721
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:59:21.014894721
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:59:21.014894721
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:21.014894721
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:59:21.014894721
+DEBUG (3): LQI fwd is forwarding packet from node 3 @0:59:21.016969904
+DEBUG (0): LQI Root is receiving packet from node 3 @0:59:21.016969904
+DEBUG (2): LQI fwd is forwarding packet from node 3 @0:59:21.016969904
+DEBUG (6): LQI fwd is forwarding packet from node 3 @0:59:21.016969904
+DEBUG (5): LQI fwd is forwarding packet from node 3 @0:59:21.016969904
+DEBUG (4): LQI fwd is forwarding packet from node 3 @0:59:21.016969904
+DEBUG (0): LQI Root is receiving packet from node 3 @0:59:21.019500509
+DEBUG (1): LQI fwd is forwarding packet from node 3 @0:59:21.019500509
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:21.023927871
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:21.023927871
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:59:21.023927871
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:59:21.027108888
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:21.027108888
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:59:21.027108888
+DEBUG (1): LQI fwd is forwarding packet from node 1 @0:59:21.027108888
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:59:21.034967119
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:59:21.034967119
+DEBUG (2): LQI fwd is forwarding packet from node 1 @0:59:21.034967119
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:21.034967119
+DEBUG (4): LQI fwd is forwarding packet from node 1 @0:59:21.034967119
+DEBUG (3): LQI fwd is forwarding packet from node 1 @0:59:21.034967119
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:59:26.006515355
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:26.006515355
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:26.006515355
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:59:26.006515355
+DEBUG (5): LQI fwd is forwarding packet from node 1 @0:59:26.007082266
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:26.009561383
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:59:26.009561383
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:26.009561383
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:26.009561383
+DEBUG (6): LQI fwd is forwarding packet from node 4 @0:59:26.009799858
+DEBUG (0): LQI Root is receiving packet from node 6 @0:59:26.012926230
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:59:26.012926230
+DEBUG (3): LQI fwd is forwarding packet from node 6 @0:59:26.012926230
+DEBUG (6): LQI fwd is forwarding packet from node 1 @0:59:26.013887646
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:59:26.015069774
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:59:26.015069774
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:26.015069774
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:59:26.017413949
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:26.017413949
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:59:26.017413949
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:26.017413949
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:59:26.018991260
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:26.022264673
+DEBUG (6): LQI fwd is forwarding packet from node 2 @0:59:26.022264673
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:26.022264673
+DEBUG (2): LQI fwd is forwarding packet from node 2 @0:59:26.022264673
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:59:26.022785012
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:59:26.026727421
+DEBUG (0): LQI Root is receiving packet from node 6 @0:59:26.026727421
+DEBUG (5): LQI fwd is forwarding packet from node 6 @0:59:26.026727421
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:59:26.026727421
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:26.027788322
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:26.030550147
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:59:26.030550147
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:26.030550147
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:59:26.030550147
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:59:26.032047042
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:59:26.035326120
+DEBUG (5): LQI fwd is forwarding packet from node 5 @0:59:26.035326120
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:26.035326120
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:59:26.035326120
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:26.035326120
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:59:26.038179497
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:26.038179497
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:26.038179497
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:59:26.038179497
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:59:26.038179497
+DEBUG (5): LQI fwd is forwarding packet from node 2 @0:59:26.041521034
+DEBUG (4): LQI fwd is forwarding packet from node 2 @0:59:26.041521034
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:26.041521034
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:26.041521034
+DEBUG (3): LQI fwd is forwarding packet from node 2 @0:59:26.041521034
+DEBUG (6): LQI fwd is forwarding packet from node 5 @0:59:26.047334717
+DEBUG (4): LQI fwd is forwarding packet from node 5 @0:59:26.047334717
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:26.047334717
+DEBUG (3): LQI fwd is forwarding packet from node 5 @0:59:26.047334717
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:26.047334717
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 5355 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 1076.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 2457 and my cost to 1076.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 1076.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1076.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 1076.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 2071.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 2071.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1076.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 2071.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 2071.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 2071.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:31.006259839
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:31.008523791
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:31.011202115
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:31.012740904
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 2632.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1076.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 2632.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 2632.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @0:59:31.020057478
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:59:31.025285777
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:31.029967977
+DEBUG (0): LQI Root is receiving packet from node 6 @0:59:31.034685136
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:36.006365107
+DEBUG (0): LQI Root is receiving packet from node 3 @0:59:36.011298984
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:36.013522981
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:36.015741157
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:36.018981713
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:59:36.021928863
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:36.026229595
+DEBUG (0): LQI Root is receiving packet from node 6 @0:59:36.030351666
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:41.006153029
+DEBUG (0): LQI Root is receiving packet from node 3 @0:59:41.008994921
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:41.012481507
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:41.014742134
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:41.018167290
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:59:41.023912494
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:41.027337769
+DEBUG (0): LQI Root is receiving packet from node 6 @0:59:41.031984346
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 189.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1076.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 189.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 189.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 189.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 1423.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 1423.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1076.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 1423.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 1423.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1423.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:59:46.007373725
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:59:46.008424914
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:46.014001665
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:46.018007495
+DEBUG (0): LQI Root is receiving packet from node 3 @0:59:46.019996443
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:46.023742427
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:46.026125124
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:59:46.027742428
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:59:46.032256782
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:46.044511857
+DEBUG (0): LQI Root is receiving packet from node 6 @0:59:46.052278536
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 111 that advertises 2594.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2071.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2594.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 2594.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 2594.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 2594.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:51.006166744
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:51.010751562
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:59:51.013460285
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:59:51.019443356
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:51.025237780
+DEBUG (0): LQI Root is receiving packet from node 3 @0:59:51.034202293
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:59:51.036224044
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:51.041757240
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:59:51.043796241
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:51.047784427
+DEBUG (0): LQI Root is receiving packet from node 6 @0:59:51.052560400
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:51.060754322
+DEBUG (1): LQI fwd is forwarding packet from node 4 @0:59:56.006534496
+DEBUG (4): LQI fwd is forwarding packet from node 6 @0:59:56.008608018
+DEBUG (2): LQI fwd is forwarding packet from node 5 @0:59:56.008697349
+DEBUG (0): LQI Root is receiving packet from node 1 @0:59:56.012071861
+DEBUG (1): LQI fwd is forwarding packet from node 2 @0:59:56.014993480
+DEBUG (0): LQI Root is receiving packet from node 4 @0:59:56.019365520
+DEBUG (1): LQI fwd is forwarding packet from node 6 @0:59:56.026323369
+DEBUG (1): LQI fwd is forwarding packet from node 5 @0:59:56.036828680
+DEBUG (0): LQI Root is receiving packet from node 3 @0:59:56.039436027
+DEBUG (0): LQI Root is receiving packet from node 2 @0:59:56.049104726
+DEBUG (0): LQI Root is receiving packet from node 6 @0:59:56.058702448
+DEBUG (0): LQI Root is receiving packet from node 5 @0:59:56.067293096
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 67 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1518 and my cost to 1076.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:1.011573641
+DEBUG (0): LQI Root is receiving packet from node 1 @1:0:1.015932312
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:0:1.017703864
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:1.018571949
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:0:1.028352776
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:0:1.030837723
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:0:1.043008453
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:1.047305742
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:0:1.050729356
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:1.055972684
+DEBUG (0): LQI Root is receiving packet from node 6 @1:0:1.063678328
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:1.068820509
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 72 that advertises 241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 241.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 1518 and my cost to 241.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 241.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 654.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 654.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 654.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 654.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 654.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 654.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 654.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 1074.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 654.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 1074.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 1074.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 58 that advertises 1074.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:0:6.005451128
+DEBUG (0): LQI Root is receiving packet from node 1 @1:0:6.008074082
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:0:6.009897074
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:6.011222691
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:0:6.013641168
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:0:6.023292323
+DEBUG (0): LQI Root is receiving packet from node 4 @1:0:6.026064089
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:6.029054676
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:6.035341379
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:0:6.037215859
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:6.053148282
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:6.058320981
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:0:6.059890287
+DEBUG (0): LQI Root is receiving packet from node 6 @1:0:6.065947991
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:0:11.006891111
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:11.010246134
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:11.014482618
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:11.016542660
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:0:11.019443356
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:0:11.033145669
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:0:11.035094900
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:0:11.042678474
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:0:11.046287183
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:11.048997915
+DEBUG (0): LQI Root is receiving packet from node 1 @1:0:11.055086136
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:11.059770557
+DEBUG (0): LQI Root is receiving packet from node 6 @1:0:11.064699117
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:16.005500678
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:0:16.007858120
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:16.009935525
+DEBUG (0): LQI Root is receiving packet from node 1 @1:0:16.015978088
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:0:16.017022887
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:0:16.027576243
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:16.030465802
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:0:16.032632537
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:16.037515321
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:0:16.040240964
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:16.044595358
+DEBUG (0): LQI Root is receiving packet from node 6 @1:0:16.059121641
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:0:16.060611329
+DEBUG (0): LQI Root is receiving packet from node 4 @1:0:16.067645590
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 654.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 343.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 343.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 343.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 343.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 343.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 366.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 654.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 366.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 366.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 366.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 688.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 654.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 688.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 366.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 688.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 241.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 688.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 688.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 343.
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:0:21.010517017
+DEBUG (0): LQI Root is receiving packet from node 1 @1:0:21.013155229
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:0:21.016458315
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:0:21.018249295
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:21.021936189
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:21.024629653
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:21.029121146
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:0:21.034095482
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:0:21.036689461
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:0:21.039687769
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:0:21.049949271
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:21.054687071
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:21.062003644
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:21.071288536
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:21.079154423
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:0:21.080535309
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:0:21.084990849
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:21.088057848
+DEBUG (0): LQI Root is receiving packet from node 6 @1:0:21.097586933
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:0:21.104796642
+DEBUG (0): LQI Root is receiving packet from node 4 @1:0:21.107505088
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:0:21.113372031
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:21.113372031
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:0:21.113372031
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:0:21.113372031
+DEBUG (0): LQI Root is receiving packet from node 6 @1:0:21.113372031
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:21.122038973
+DEBUG (0): LQI Root is receiving packet from node 6 @1:0:21.128584955
+DEBUG (0): LQI Root is receiving packet from node 1 @1:0:26.008287704
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:0:26.011514497
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:0:26.011514497
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:26.011514497
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:0:26.011514497
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:0:26.011514497
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:26.012122954
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:0:26.017175474
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:26.018104365
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:0:26.018104365
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:0:26.018104365
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:26.020440836
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:26.023475427
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:0:26.023475427
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:26.023475427
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:0:26.023475427
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:0:26.026893376
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:26.026893376
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:0:26.026893376
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:26.026893376
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:0:26.026893376
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:0:26.029952718
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:26.033220301
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:0:26.036552133
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:26.036552133
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:26.036552133
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:0:26.038772247
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:0:26.038772247
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:26.038772247
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:0:26.038772247
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:0:26.038772247
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:0:26.038772247
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:0:26.041810949
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:26.043388030
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:0:26.043388030
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:26.044143309
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:0:26.044143309
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:0:26.044143309
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:26.045760731
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:0:26.045760731
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:0:26.045760731
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:0:26.045760731
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:0:26.045760731
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:0:26.047820656
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:26.047820656
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:0:26.047820656
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:0:26.047820656
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:0:26.052736178
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:0:26.054046205
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:0:26.058656554
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:0:26.064818848
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:0:26.064818848
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:0:26.064818848
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:0:26.064818848
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:0:26.064818848
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:0:31.008350281
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:0:31.008350281
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:0:31.008350281
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:0:31.008979662
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:31.010934666
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:0:31.010934666
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:0:31.010934666
+DEBUG (0): LQI Root is receiving packet from node 1 @1:0:31.012972124
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:0:31.012972124
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:31.013343650
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:0:31.013343650
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:0:31.013343650
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:0:31.016046331
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:0:31.016046331
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:0:31.016046331
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:0:31.016046331
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:0:31.019647384
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:0:31.020364543
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:0:31.021583348
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:0:31.021583348
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:31.021583348
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:0:31.021583348
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:0:31.023599387
+DEBUG (0): LQI Root is receiving packet from node 4 @1:0:31.023599387
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:0:31.023599387
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:0:31.025270518
+DEBUG (0): LQI Root is receiving packet from node 4 @1:0:31.025764232
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:0:31.025764232
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:0:31.025764232
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:0:31.027917599
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:31.027917599
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:31.027917599
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:0:31.027917599
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:0:31.027917599
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:0:31.027917599
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:31.031409951
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:0:31.031409951
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:0:31.031409951
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:31.033388147
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:0:31.033388147
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:0:31.033388147
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:0:31.033388147
+DEBUG (0): LQI Root is receiving packet from node 4 @1:0:31.035333327
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:0:31.035333327
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:0:31.035333327
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:0:31.035333327
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:0:31.035333327
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:0:31.037048014
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:0:31.040300338
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:0:31.040300338
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:31.040300338
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:0:31.041213639
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:0:31.041213639
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:0:31.043939234
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:0:31.043939234
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:0:31.043939234
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:0:31.043939234
+DEBUG (0): LQI Root is receiving packet from node 4 @1:0:31.043939234
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:0:31.043939234
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:0:31.048356932
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:0:31.048356932
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:0:31.048356932
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:31.048356932
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:0:31.048356932
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:0:31.048356932
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:0:31.058168276
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:0:31.058168276
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:31.058168276
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:0:31.058168276
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:0:31.058168276
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 1423.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 1423.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 1423.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1423.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 1423.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 98 that advertises 1935.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 1935.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 1935.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 1935.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 1935.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 1935.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 2447.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 2447.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 1423.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 2447.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 2447.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:36.007865777
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:36.014352615
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:36.017335994
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:36.020461807
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:0:36.023380101
+DEBUG (0): LQI Root is receiving packet from node 1 @1:0:36.029100570
+DEBUG (0): LQI Root is receiving packet from node 4 @1:0:36.032123336
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:0:36.033023599
+DEBUG (0): LQI Root is receiving packet from node 6 @1:0:36.047870314
+DEBUG (0): LQI Root is receiving packet from node 1 @1:0:41.005983640
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:41.008806381
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:41.011504950
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:41.015130809
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:0:41.016635755
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:41.022041109
+DEBUG (0): LQI Root is receiving packet from node 4 @1:0:41.025821493
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:0:41.031619799
+DEBUG (0): LQI Root is receiving packet from node 6 @1:0:41.039340701
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:46.006614563
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:46.008783189
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:46.016799719
+DEBUG (0): LQI Root is receiving packet from node 1 @1:0:46.019075604
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:0:46.040393551
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:46.042985869
+DEBUG (0): LQI Root is receiving packet from node 4 @1:0:46.048816354
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:0:46.049714956
+DEBUG (0): LQI Root is receiving packet from node 6 @1:0:46.058412415
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 67 that advertises 165.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 1935.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 165.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 165.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 165.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 165.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 165.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 165.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 1518.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 1935.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 111 that advertises 2325.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 1935.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2325.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 2325.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 2325.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 165.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:0:51.010484956
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:51.012847715
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:0:51.015094627
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:51.018745230
+DEBUG (0): LQI Root is receiving packet from node 4 @1:0:51.020648794
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:0:51.024652237
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:51.028474845
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:51.031594946
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:0:51.037309633
+DEBUG (0): LQI Root is receiving packet from node 6 @1:0:51.044679585
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:0:56.006357056
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:0:56.009981301
+DEBUG (0): LQI Root is receiving packet from node 3 @1:0:56.011985626
+DEBUG (0): LQI Root is receiving packet from node 2 @1:0:56.018144824
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:0:56.021900007
+DEBUG (0): LQI Root is receiving packet from node 1 @1:0:56.024965463
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:0:56.025684165
+DEBUG (0): LQI Root is receiving packet from node 5 @1:0:56.028564176
+DEBUG (0): LQI Root is receiving packet from node 6 @1:0:56.033022056
+DEBUG (0): LQI Root is receiving packet from node 4 @1:0:56.040483561
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:1:1.011598723
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:1:1.014154252
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:1.019119041
+DEBUG (0): LQI Root is receiving packet from node 2 @1:1:1.026827024
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:1.034456374
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:1.036258444
+DEBUG (0): LQI Root is receiving packet from node 3 @1:1:1.040900862
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:1.049716617
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:1:1.053424481
+DEBUG (0): LQI Root is receiving packet from node 6 @1:1:1.062762806
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 165.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 199.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 1935.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 199.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 199.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 199.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 199.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 199.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 199.
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:6.007110444
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:6.009294778
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:6.010623828
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:6.017127808
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:6.020440836
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:6.023868379
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:1:6.027246216
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:6.030307551
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:1:6.039995164
+DEBUG (0): LQI Root is receiving packet from node 2 @1:1:6.042712874
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:1:6.044335960
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:1:6.047029425
+DEBUG (0): LQI Root is receiving packet from node 3 @1:1:6.052468847
+DEBUG (0): LQI Root is receiving packet from node 6 @1:1:6.056878612
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 98 that advertises 1091.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 1091.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 1091.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 199.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 1091.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 199.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 1091.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1091.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1603.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 199.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 1603.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 84 that advertises 1603.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 199.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 1603.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 165.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 59 that advertises 1603.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:1:11.005685673
+DEBUG (0): LQI Root is receiving packet from node 2 @1:1:11.014360666
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:11.018192143
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:1:11.022340848
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:11.024329914
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:11.032104195
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:1:11.040590253
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:11.044801773
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:11.051734539
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:11.055452345
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:11.062186749
+DEBUG (0): LQI Root is receiving packet from node 6 @1:1:11.071280934
+DEBUG (0): LQI Root is receiving packet from node 6 @1:1:11.077104441
+DEBUG (0): LQI Root is receiving packet from node 6 @1:1:11.078895025
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:1:11.086249719
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:11.092749925
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:1:11.097510639
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:1:11.097510639
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:11.097510639
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:11.097510639
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:11.097510639
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:11.101813593
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:11.111624937
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:11.114691936
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:16.006626048
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:16.006626048
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:1:16.006626048
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:16.006626048
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:1:16.010805271
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:16.015123601
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:1:16.015123601
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:16.016290470
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:16.017440584
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:1:16.020509804
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:1:16.023711910
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:1:16.023711910
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:16.023711910
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:1:16.023711910
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:16.023711910
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:16.023711910
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:1:16.027635617
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:16.027635617
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:16.027635617
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:16.027635617
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:1:16.031280225
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:16.031280225
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:16.032890045
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:16.035003348
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:1:16.035875315
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:16.040122669
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:1:16.044349329
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:1:16.044349329
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:1:16.044349329
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:1:16.044349329
+DEBUG (0): LQI Root is receiving packet from node 3 @1:1:16.044349329
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:1:16.044349329
+DEBUG (0): LQI Root is receiving packet from node 3 @1:1:16.050239187
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:1:16.050239187
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:16.050239187
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:16.054801538
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:16.057677776
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:16.059760616
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:16.065444454
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:16.070205169
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:16.076796927
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:16.084487312
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 65 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 199.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 199.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:21.007478992
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:1:21.007478992
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:1:21.007478992
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:1:21.007478992
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:1:21.007478992
+DEBUG (0): LQI Root is receiving packet from node 6 @1:1:21.009981301
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:1:21.009981301
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:1:21.015237619
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:1:21.015237619
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:1:21.015237619
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:21.015237619
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:21.017226962
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:21.019321287
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:1:21.019321287
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:1:21.019321287
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:1:21.019321287
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:1:21.019321287
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:1:21.020570839
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:21.023078701
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:1:21.025527695
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:1:21.025527695
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:21.025527695
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:21.025527695
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:21.025527695
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:1:21.030547807
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:1:21.035720507
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:21.035720507
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:21.035720507
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:1:21.035720507
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:21.035720507
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:21.038156187
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:21.038156187
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:1:21.038156187
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:21.038156187
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:1:21.044150965
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:21.044150965
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:21.044150965
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:21.044150965
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:1:21.045119866
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:21.046142199
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:1:21.049621182
+DEBUG (0): LQI Root is receiving packet from node 6 @1:1:21.049621182
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:1:21.049621182
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:1:21.049621182
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:1:21.049621182
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:1:21.051833694
+DEBUG (0): LQI Root is receiving packet from node 6 @1:1:21.054305603
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:1:21.054305603
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:1:21.054305603
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:1:21.054305603
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:1:21.054915951
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:1:26.007104732
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:1:26.007104732
+DEBUG (0): LQI Root is receiving packet from node 2 @1:1:26.007104732
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:1:26.007104732
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:1:26.007104732
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:26.009570977
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:1:26.009570977
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:26.009570977
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:1:26.009570977
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:1:26.010728977
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:26.012550198
+DEBUG (0): LQI Root is receiving packet from node 3 @1:1:26.012550198
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:1:26.012550198
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:1:26.014192820
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:1:26.014757274
+DEBUG (0): LQI Root is receiving packet from node 2 @1:1:26.014757274
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:1:26.014757274
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:1:26.015338766
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:1:26.015338766
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:26.018237919
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:1:26.018237919
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:1:26.018237919
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:1:26.018237919
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:1:26.021669583
+DEBUG (0): LQI Root is receiving packet from node 2 @1:1:26.021669583
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:1:26.021812229
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:1:26.023120703
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:1:26.023120703
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:1:26.026889602
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:1:26.026889602
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:1:26.029899340
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:1:26.029899340
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:26.029899340
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:26.029899340
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:1:26.029899340
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:1:26.033191445
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:1:26.033191445
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:1:26.033191445
+DEBUG (0): LQI Root is receiving packet from node 6 @1:1:26.034843158
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:1:26.034843158
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:1:26.035331437
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:1:26.037376103
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:1:26.037376103
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:1:26.037376103
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:26.037376103
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:26.037376103
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:1:26.041797352
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:1:26.041797352
+DEBUG (0): LQI Root is receiving packet from node 2 @1:1:26.041797352
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:1:26.041797352
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:1:26.041797352
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:1:31.008399831
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:1:31.009006405
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:31.009477882
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:31.011871159
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:1:31.011871159
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:31.011871159
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:1:31.011871159
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:31.011871159
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:31.015140403
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:1:31.015140403
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:1:31.015140403
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:1:31.015823162
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:31.015823162
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:31.017257480
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:31.017898345
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:31.017898345
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:1:31.017898345
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:1:31.018966454
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:31.019820941
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:1:31.019820941
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:31.019820941
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:31.019820941
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:1:31.019820941
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:31.024688467
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:31.024688467
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:1:31.024688467
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:31.027023048
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:31.027023048
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:1:31.027023048
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:1:31.028030122
+DEBUG (0): LQI Root is receiving packet from node 3 @1:1:31.028030122
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:1:31.029205042
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:31.029205042
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:1:31.029205042
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:31.035400074
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:1:31.035400074
+DEBUG (0): LQI Root is receiving packet from node 3 @1:1:31.035400074
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:1:31.035400074
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:1:31.037810949
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:1:31.037810949
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:31.037810949
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:1:31.037810949
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:1:31.037810949
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:1:31.039718286
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:1:31.039718286
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:1:31.039718286
+DEBUG (0): LQI Root is receiving packet from node 3 @1:1:31.039718286
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:1:31.039718286
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:1:31.039718286
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:31.044234861
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:31.044234861
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:1:31.044234861
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:1:31.044234861
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:36.008350281
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:36.008350281
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:36.008350281
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:1:36.008350281
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:1:36.008350281
+DEBUG (0): LQI Root is receiving packet from node 3 @1:1:36.010444497
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:1:36.010444497
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:1:36.011245552
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:36.012346518
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:1:36.012346518
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:36.016128336
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:36.018325589
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:36.018325589
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:36.018325589
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:1:36.018325589
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:1:36.018325589
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:1:36.021410186
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:36.021410186
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:36.021410186
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:1:36.021598607
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:1:36.021598607
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:36.025176745
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:36.025176745
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:1:36.025176745
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:1:36.026336406
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:1:36.028259002
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:36.028259002
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:36.028259002
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:36.028259002
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:36.028259002
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:36.030189255
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:1:36.030189255
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:1:36.030189255
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:1:36.030189255
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:1:36.030906414
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:1:36.030906414
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:1:36.036979376
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:36.036979376
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:1:36.037086187
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:1:36.046111681
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:1:36.046111681
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:36.046111681
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:1:36.046111681
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:36.046111681
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 65 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4290 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 111 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 926.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4290 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 926.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 926.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 1487.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1487.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1487.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 1487.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 1487.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1487.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 2156.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 2156.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 2156.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 2156.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 65 that advertises 2156.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:1:41.014040115
+DEBUG (0): LQI Root is receiving packet from node 2 @1:1:41.023019556
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:1:41.025073817
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:41.032417025
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:41.035827318
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:41.050464293
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:41.054751988
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:41.061311686
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:41.069171460
+DEBUG (0): LQI Root is receiving packet from node 3 @1:1:41.080844365
+DEBUG (0): LQI Root is receiving packet from node 2 @1:1:46.008569568
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:46.011413398
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:46.014488053
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:46.020631992
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:1:46.029420885
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:46.039703027
+DEBUG (0): LQI Root is receiving packet from node 3 @1:1:46.047744362
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:1:46.054675695
+DEBUG (0): LQI Root is receiving packet from node 6 @1:1:46.058887096
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:46.062457632
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:46.081942991
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:1:51.011934415
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:51.013610650
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:51.014116527
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:1:51.016895153
+DEBUG (0): LQI Root is receiving packet from node 2 @1:1:51.019601608
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:51.025565869
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:51.029000967
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:1:51.035144559
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:51.038156187
+DEBUG (0): LQI Root is receiving packet from node 6 @1:1:51.045770278
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 106.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 106.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 106.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 106.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 106.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 1051.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1487.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 1051.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 1051.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 106.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1051.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 106.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 1781.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1487.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1781.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 106.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 1781.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 1781.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 1781.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 106.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:1:56.007402699
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:1:56.014663501
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:1:56.019107665
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:1:56.020036784
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:1:56.022102144
+DEBUG (0): LQI Root is receiving packet from node 4 @1:1:56.031650316
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:1:56.034914017
+DEBUG (0): LQI Root is receiving packet from node 6 @1:1:56.039293264
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:1:56.044076562
+DEBUG (0): LQI Root is receiving packet from node 5 @1:1:56.047799685
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:1:56.053506439
+DEBUG (0): LQI Root is receiving packet from node 2 @1:1:56.062295450
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:1:56.063455111
+DEBUG (0): LQI Root is receiving packet from node 3 @1:1:56.072854471
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:1.011140962
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:2:1.019012230
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:2:1.032108077
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:1.036477730
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:1.039445969
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:2:1.048652282
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:1.050815243
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:1.058778742
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:2:1.059915093
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:1.068010255
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:2:1.069741696
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:1.072618383
+DEBUG (0): LQI Root is receiving packet from node 3 @1:2:1.081132737
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:6.006854929
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:6.010225440
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:2:6.013679342
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:6.015886536
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:2:6.019517989
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:6.025148567
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:2:6.025827157
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:6.030824803
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:6.035852123
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:2:6.036346113
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:2:6.045898060
+DEBUG (0): LQI Root is receiving packet from node 3 @1:2:6.050691631
+DEBUG (0): LQI Root is receiving packet from node 5 @1:2:6.057359683
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:6.066621714
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 106.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 148.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1487.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 148.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 148.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 148.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 106.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 148.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 148.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 148.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 571.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 571.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 571.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 571.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 571.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 148.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 571.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 106.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 571.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:11.007204218
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:11.009355813
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:11.010186990
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:2:11.017097290
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:2:11.024879227
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:11.037286441
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:11.040435445
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:11.043628396
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:11.048516844
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:11.053180342
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:11.068246343
+DEBUG (0): LQI Root is receiving packet from node 3 @1:2:11.084634187
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:2:11.099871964
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:2:11.115908858
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:2:11.126238998
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:2:11.126238998
+DEBUG (0): LQI Root is receiving packet from node 5 @1:2:11.126238998
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:11.126238998
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:2:11.126238998
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:2:11.126238998
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:11.133380069
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:11.139941310
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:2:11.150576624
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:2:11.154284488
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:16.007723132
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:2:16.007723132
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:2:16.007723132
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:2:16.007723132
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:2:16.007723132
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:16.009820781
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:16.009820781
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:16.010318654
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:16.011871159
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:16.015155662
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:2:16.015155662
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:16.015155662
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:2:16.015155662
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:2:16.017120151
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:2:16.018104365
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:2:16.019029710
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:2:16.021900007
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:2:16.021900007
+DEBUG (0): LQI Root is receiving packet from node 5 @1:2:16.021900007
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:2:16.021900007
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:2:16.021900007
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:16.024757158
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:2:16.024757158
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:2:16.024757158
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:2:16.024757158
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:2:16.025048964
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:16.027957711
+DEBUG (0): LQI Root is receiving packet from node 5 @1:2:16.031701757
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:16.032952970
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:2:16.034660054
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:2:16.038383177
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:2:16.038383177
+DEBUG (0): LQI Root is receiving packet from node 3 @1:2:16.038383177
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:2:16.038383177
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:16.039252923
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:2:16.042609837
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:2:16.042609837
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:2:16.042609837
+DEBUG (0): LQI Root is receiving packet from node 3 @1:2:16.043357513
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:2:16.048011417
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:2:16.048011417
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:2:16.048621765
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:2:16.050981428
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:2:16.050981428
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:2:16.050981428
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:2:16.056129045
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:2:16.056129045
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:2:16.056129045
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:2:16.056129045
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:2:16.064261932
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:2:16.064261932
+DEBUG (0): LQI Root is receiving packet from node 3 @1:2:16.064261932
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:2:16.064261932
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:2:16.064261932
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:16.070161614
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:2:16.075868368
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:16.080445978
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:2:16.088838263
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:16.093370097
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:2:21.006519237
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:21.006519237
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:2:21.006519237
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:2:21.006519237
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:21.007516717
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:21.009645728
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:2:21.009645728
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:2:21.009645728
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:21.013818560
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:2:21.013818560
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:2:21.013818560
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:21.013818560
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:2:21.014635323
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:21.014635323
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:2:21.016954645
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:21.016954645
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:2:21.016954645
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:21.019462389
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:2:21.019462389
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:21.019462389
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:2:21.020538100
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:21.021569980
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:2:21.021569980
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:2:21.021569980
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:2:21.021569980
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:21.023149559
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:2:21.024126234
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:21.024126234
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:21.026183819
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:21.026183819
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:21.026183819
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:21.026183819
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:21.028495539
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:2:21.028495539
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:2:21.028495539
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:2:21.030809427
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:2:21.032958682
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:21.032958682
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:2:21.032958682
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:2:21.032958682
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:2:21.032958682
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:2:21.032958682
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:21.035348586
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:2:21.035348586
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:2:21.035348586
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:21.036552133
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:2:21.038268710
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:21.038268710
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:2:21.038268710
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:2:21.038268710
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:21.038652398
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:2:21.041961315
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:2:21.041961315
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:2:21.041961315
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:21.041961315
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:2:21.042169225
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:2:21.046525888
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:2:21.046525888
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:2:21.046525888
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:21.046525888
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:21.048812471
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:2:21.048812471
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:21.048812471
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:2:21.048812471
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:2:21.048812471
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:2:21.051864211
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:21.051864211
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:2:21.051864211
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:2:21.051864211
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:21.051864211
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:21.054595519
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:2:21.054595519
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:2:21.054595519
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:21.054595519
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:2:21.054595519
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:2:21.058242348
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:2:21.058242348
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:2:21.058242348
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:21.058242348
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:21.058242348
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:2:21.061141501
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:2:21.061141501
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:21.061141501
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:2:21.061141501
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:2:21.067763777
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:21.067763777
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:2:21.067763777
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 59 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:26.006931222
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:26.006931222
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:2:26.006931222
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:2:26.008094657
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:26.008844224
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:26.008844224
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:2:26.010240817
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:2:26.014062700
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:26.014062700
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:2:26.014062700
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:26.014062700
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:2:26.014062700
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:26.016557919
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:26.016557919
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:2:26.016557919
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:2:26.016557919
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:2:26.016557919
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:26.021059117
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:26.025179084
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:26.025179084
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:2:26.025179084
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:26.025179084
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:2:26.025179084
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:26.027887082
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:2:26.027887082
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:2:26.027887082
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:26.029809678
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:2:26.029809678
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:2:26.029809678
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:2:26.029853564
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:2:26.036445322
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:26.036445322
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:26.036445322
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:2:26.036445322
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:2:26.036445322
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:2:26.042260777
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:26.042260777
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:26.042260777
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:26.042260777
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:26.042260777
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:2:26.049340814
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:2:26.049340814
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:26.049340814
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:26.049340814
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:26.049340814
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:26.049340814
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:31.006809153
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:31.006809153
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:2:31.006809153
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:2:31.006809153
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:2:31.006809153
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:31.008767931
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:31.008767931
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:31.010118629
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:2:31.010118629
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:31.010881683
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:2:31.010881683
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:2:31.015276070
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:31.015276070
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:2:31.015276070
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:31.015565985
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:2:31.020296182
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:2:31.020296182
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:31.020316876
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:2:31.025514658
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:31.025514658
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:2:31.025514658
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:31.025514658
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:2:31.029510216
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:31.029510216
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:2:31.029510216
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:2:31.031470986
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:31.031470986
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:31.031470986
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:2:31.031470986
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:2:31.035567920
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:2:31.035567920
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:2:31.035819715
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:2:31.038070346
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:2:31.038070346
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:31.038070346
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:2:31.038070346
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:2:31.038070346
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:2:31.038070346
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:2:31.042007091
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:31.042007091
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:31.042007091
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:31.042007091
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:2:31.042739509
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:31.043960205
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:31.043960205
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:31.043960205
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:2:31.045623403
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:2:31.045623403
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:2:31.045852283
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:31.045852283
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:31.046676253
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:2:31.046676253
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:2:31.048354710
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:31.048354710
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:2:31.048354710
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:2:31.051208087
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:31.051208087
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:31.051208087
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:31.051208087
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:2:31.058349159
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:31.058349159
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:31.058349159
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:31.058349159
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:36.008760605
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:36.008760605
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:2:36.010766820
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:36.010766820
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:36.010766820
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:2:36.011524091
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:36.011524091
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:36.014535719
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:36.014535719
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:36.014535719
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:36.015933855
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:36.016635755
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:2:36.016635755
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:2:36.017261362
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:36.018609792
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:36.018609792
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:36.018609792
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:2:36.018609792
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:2:36.019952558
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:36.019952558
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:2:36.023013892
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:2:36.023013892
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:36.023013892
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:2:36.023013892
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:36.023013892
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:36.025607871
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:2:36.025607871
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:2:36.025607871
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:2:36.026843826
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:36.027871823
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:2:36.027871823
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:2:36.027871823
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:2:36.030826346
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:36.030826346
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:36.030826346
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:2:36.031253590
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:2:36.031253590
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:2:36.033771276
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:2:36.033771276
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:36.033771276
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:2:36.033771276
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:2:36.033771276
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:2:36.033771276
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:2:36.036777239
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:36.036777239
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:2:36.036777239
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:36.036777239
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:36.036777239
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:2:36.036777239
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:36.039615358
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:36.039615358
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:2:36.039615358
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:36.043063824
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:36.043063824
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:2:36.043063824
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:2:36.045276335
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:2:36.045276335
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:36.045276335
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:2:36.045276335
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:36.045276335
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:41.007058956
+DEBUG (0): LQI Root is receiving packet from node 3 @1:2:41.009254319
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:41.012071861
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:41.017458064
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:41.030307551
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 1241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 1241.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 1241.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 420 and my cost to 1241.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1241.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 1661.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1661.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 1661.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1661.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 1661.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 1661.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 1661.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 2330.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1661.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 2330.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 420 and my cost to 1241.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 2330.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 2330.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 58 that advertises 2330.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:46.006219728
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:46.007099068
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:46.009401589
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:46.017608430
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:46.020128337
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:46.030109188
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:2:46.042388559
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:2:46.049178680
+DEBUG (0): LQI Root is receiving packet from node 5 @1:2:46.052260937
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:2:46.052848424
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:46.057281050
+DEBUG (0): LQI Root is receiving packet from node 3 @1:2:46.063888067
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:51.011629359
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:51.014589428
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:51.017709529
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:51.020435172
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:2:51.033088408
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:51.035831200
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:2:51.041202262
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:51.042571663
+DEBUG (0): LQI Root is receiving packet from node 3 @1:2:51.044131933
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:2:51.046584701
+DEBUG (0): LQI Root is receiving packet from node 6 @1:2:51.050204895
+DEBUG (0): LQI Root is receiving packet from node 5 @1:2:51.056506739
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:2:56.007982411
+DEBUG (0): LQI Root is receiving packet from node 1 @1:2:56.011019011
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:56.020187150
+DEBUG (0): LQI Root is receiving packet from node 2 @1:2:56.022973780
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:2:56.023551720
+DEBUG (0): LQI Root is receiving packet from node 3 @1:2:56.033893345
+DEBUG (0): LQI Root is receiving packet from node 3 @1:2:56.039756460
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:56.042880719
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:56.047687210
+DEBUG (0): LQI Root is receiving packet from node 4 @1:2:56.050372741
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:2:56.057086569
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:2:56.063876691
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:2:56.072528374
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:2:56.072528374
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:2:56.072528374
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:56.072528374
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:2:56.072528374
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:2:56.076831327
+DEBUG (0): LQI Root is receiving packet from node 5 @1:2:56.080615485
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:56.095538493
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:2:56.101123177
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 273.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1661.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 273.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 273.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 273.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 79 that advertises 273.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 1366.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1661.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 1366.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1661.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 1366.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 77 that advertises 1366.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1366.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 1737.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1661.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 1737.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 77 that advertises 1737.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 1737.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 273.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:1.006397168
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:1.007247772
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:1.008386463
+DEBUG (0): LQI Root is receiving packet from node 1 @1:3:1.010881683
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:1.016433510
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:1.022356225
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:1.030168679
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:1.033235560
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:1.038255790
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:3:1.038291625
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:3:1.047019601
+DEBUG (0): LQI Root is receiving packet from node 3 @1:3:1.056159562
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:3:1.058336121
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:1.063432527
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:6.007572088
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:6.016039005
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:3:6.018256952
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:3:6.029855454
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:6.036544476
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:6.038644465
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:3:6.040788616
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:6.043977803
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:6.045366226
+DEBUG (0): LQI Root is receiving packet from node 1 @1:3:6.052812590
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:6.061189616
+DEBUG (0): LQI Root is receiving packet from node 3 @1:3:6.069246210
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:6.075837968
+DEBUG (0): LQI Root is receiving packet from node 1 @1:3:11.008501325
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:11.009591900
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:3:11.020240583
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:11.027713572
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:11.029726059
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:3:11.038581540
+DEBUG (0): LQI Root is receiving packet from node 3 @1:3:11.040902753
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:3:11.043275784
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:11.049544889
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:11.056838547
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:11.064691066
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:11.074807584
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:11.079278383
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 61 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1661.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1241.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 349.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1661.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 349.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1661.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 349.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 349.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 349.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 1128.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1128.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 1128.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1128.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 1128.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 1128.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 1128.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 1857.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 1857.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 1857.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 273.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:3:16.009050639
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:16.011453462
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:16.013370394
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:3:16.014716933
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:16.019540573
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:16.023790425
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:16.032821354
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:3:16.040346114
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:3:16.047914429
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:16.052758763
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:3:16.053544890
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:16.058793882
+DEBUG (0): LQI Root is receiving packet from node 3 @1:3:16.063607698
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:3:16.067161085
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:3:16.071938949
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:3:16.071938949
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:16.071938949
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:16.071938949
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:3:16.071938949
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:16.081109427
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:3:16.089074469
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:16.093667337
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:16.100259096
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:21.006381909
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:21.006381909
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:21.006381909
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:3:21.006381909
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:21.009185627
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:3:21.015556162
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:21.016542542
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:3:21.019182415
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:21.019182415
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:3:21.019182415
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:21.020517130
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:21.021730500
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:3:21.021730500
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:3:21.021730500
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:3:21.021730500
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:3:21.023376218
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:21.034090165
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:21.037950498
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:3:21.041261754
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:21.043794580
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:21.046762094
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:3:21.051919534
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:3:21.051919534
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:3:21.051919534
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:3:21.051919534
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:21.051919534
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:3:21.051919534
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:3:21.055139120
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:3:21.057321114
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:21.060586476
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:21.060586476
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:3:21.062142863
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:3:21.062142863
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:3:21.064507962
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:3:21.064507962
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:3:21.066705215
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:3:21.069772213
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:3:21.077218459
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:21.077218459
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:3:21.077218459
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:21.077218459
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:3:21.079507264
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:21.083627113
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:3:21.083627113
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:3:21.083627113
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:3:21.084374789
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:21.085915918
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:3:21.089837404
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:3:21.093056989
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:3:21.093056989
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:3:21.093056989
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:21.093056989
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:26.007369842
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:3:26.007369842
+DEBUG (0): LQI Root is receiving packet from node 1 @1:3:26.007768908
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:3:26.011402021
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:26.011402021
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:26.011402021
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:26.011402021
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:3:26.011402021
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:3:26.012214506
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:3:26.017246103
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:3:26.017246103
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:3:26.017886969
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:26.020374137
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:3:26.020374137
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:26.020374137
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:3:26.020374137
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:3:26.020374137
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:26.022285248
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:26.022285248
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:3:26.022285248
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:3:26.022285248
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:26.022285248
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:3:26.023822603
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:3:26.024753384
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:26.024753384
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:3:26.024753384
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:3:26.027992002
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:26.027992002
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:26.027992002
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:26.027992002
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:3:26.029315735
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:3:26.036048596
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:26.036048596
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:26.036048596
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:26.036048596
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:3:26.036048596
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:3:26.038287851
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:3:26.038287851
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:26.038287851
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:26.038287851
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:26.038287851
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:3:26.038287851
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 76 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 103 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:3:31.007072324
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:3:31.007072324
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:3:31.007072324
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:3:31.009235286
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:31.009615092
+DEBUG (0): LQI Root is receiving packet from node 1 @1:3:31.011553065
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:3:31.011553065
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:3:31.011553065
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:3:31.011553065
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:3:31.015733831
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:3:31.015733831
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:3:31.015733831
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:31.017978521
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:3:31.017978521
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:3:31.017978521
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:31.017978521
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:3:31.018691797
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:3:31.022859644
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:3:31.022859644
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:31.024204071
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:3:31.024204071
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:3:31.026437505
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:3:31.026437505
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:3:31.026437505
+DEBUG (0): LQI Root is receiving packet from node 3 @1:3:31.026437505
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:3:31.026437505
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:31.027528806
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:3:31.029161487
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:3:31.029161487
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:31.029161487
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:3:31.032235811
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:3:31.032235811
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:3:31.032235811
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:31.035051345
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:31.035051345
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:3:31.035051345
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:3:31.035051345
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:3:31.038980157
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:3:31.038980157
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:3:31.038980157
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:31.038980157
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:3:31.038980157
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:3:31.043092680
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:3:31.043092680
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:31.043092680
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:3:31.043092680
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:31.043092680
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:3:31.048128051
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:31.048128051
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:31.048128051
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:3:31.048128051
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:3:31.048128051
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:31.048128051
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:3:36.005802078
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:3:36.005802078
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:3:36.005802078
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:36.005802078
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:36.005802078
+DEBUG (0): LQI Root is receiving packet from node 1 @1:3:36.010225558
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:3:36.010225558
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:36.011422944
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:3:36.012161074
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:36.012161074
+DEBUG (0): LQI Root is receiving packet from node 1 @1:3:36.014391184
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:3:36.014391184
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:3:36.014391184
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:3:36.014391184
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:3:36.014391184
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:3:36.014391184
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:3:36.017122491
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:36.017122491
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:36.017122491
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:3:36.020715493
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:36.020715493
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:36.020715493
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:3:36.020715493
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:36.023470110
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:3:36.023470110
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:3:36.023470110
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:3:36.027361079
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:3:36.027361079
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:36.027361079
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:3:36.029794419
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:36.029794419
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:36.029794419
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:3:36.029794419
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:3:36.030306008
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:3:36.030306008
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:3:36.035661811
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:3:36.035661811
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:36.035661811
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:36.037210147
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:36.038217222
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:3:36.038217222
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:3:36.038217222
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:3:36.038797052
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:3:36.039788868
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:36.041215978
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:36.041215978
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:3:36.041803016
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:3:36.041803016
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:3:36.042596469
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:36.043222075
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:36.043222075
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:3:36.043222075
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:3:36.048708000
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:36.048708000
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:36.048708000
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:36.048708000
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:3:36.048708000
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:3:36.056337350
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:36.056337350
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:36.056337350
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:36.056337350
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:3:36.056337350
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:3:36.056337350
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:41.007577752
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:41.007577752
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:3:41.007577752
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:41.009874490
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:3:41.009874490
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:3:41.010469698
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:3:41.010469698
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:41.012222109
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:3:41.012222109
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:41.012222109
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:3:41.012222109
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:41.016802058
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:3:41.016802058
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:3:41.016802058
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:41.018938158
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:41.018938158
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:3:41.018938158
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:3:41.018938158
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:3:41.020919568
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:41.020919568
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:41.020919568
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:3:41.020919568
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:3:41.020919568
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:3:41.022292851
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:3:41.023515768
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:41.023515768
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:41.023515768
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:3:41.023515768
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:41.025529916
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:3:41.025529916
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:3:41.025529916
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:41.025529916
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:3:41.025529916
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:3:41.026354004
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:3:41.027971308
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:41.027971308
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:3:41.027971308
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:3:41.029098231
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:3:41.031190894
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:3:41.031190894
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:41.031190894
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:41.031190894
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:3:41.031190894
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:3:41.031190894
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:3:41.033678062
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:41.033678062
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:3:41.033678062
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:3:41.033678062
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:3:41.035463448
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:3:41.035812059
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:41.035812059
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:41.036346113
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:3:41.039232229
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:3:41.039232229
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:41.039232229
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:3:41.039232229
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:3:41.039232229
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:3:41.040422408
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4698 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 1331.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:3:46.009834149
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:46.012262173
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:46.015735492
+DEBUG (0): LQI Root is receiving packet from node 1 @1:3:46.018129565
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:46.021562654
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:3:46.025451402
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:46.034698174
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 2197.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 2197.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 1331.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 2197.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 2197.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 2197.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 3052.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 3052.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 3052.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 3052.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 58 that advertises 3052.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:51.007923038
+DEBUG (0): LQI Root is receiving packet from node 1 @1:3:51.013124711
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:51.015542793
+DEBUG (0): LQI Root is receiving packet from node 3 @1:3:51.021003518
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:51.024736464
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:3:51.027984346
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:51.030488994
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:51.034957572
+DEBUG (0): LQI Root is receiving packet from node 3 @1:3:56.006278872
+DEBUG (0): LQI Root is receiving packet from node 1 @1:3:56.015123601
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:3:56.015777386
+DEBUG (0): LQI Root is receiving packet from node 2 @1:3:56.018976001
+DEBUG (0): LQI Root is receiving packet from node 5 @1:3:56.024743790
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:3:56.035539624
+DEBUG (0): LQI Root is receiving packet from node 4 @1:3:56.042331406
+DEBUG (0): LQI Root is receiving packet from node 6 @1:3:56.058047867
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 1331.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 82 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 307.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 307.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:1.008089222
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:4:1.010898484
+DEBUG (0): LQI Root is receiving packet from node 1 @1:4:1.017015680
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:4:1.021015002
+DEBUG (0): LQI Root is receiving packet from node 3 @1:4:1.021293433
+DEBUG (0): LQI Root is receiving packet from node 4 @1:4:1.026094606
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:1.037017496
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:1.047067268
+DEBUG (0): LQI Root is receiving packet from node 6 @1:4:1.051256203
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:4:1.064172270
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:1.066911629
+DEBUG (0): LQI Root is receiving packet from node 2 @1:4:1.076249953
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 1423.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 1423.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 1423.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1423.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 2331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 2197.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 2331.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 2331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 2331.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:4:6.006004215
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:4:6.008518127
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:6.013795976
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:4:6.018014703
+DEBUG (0): LQI Root is receiving packet from node 4 @1:4:6.022920797
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:4:6.024309220
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:6.029128748
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:6.033630065
+DEBUG (0): LQI Root is receiving packet from node 2 @1:4:6.036699403
+DEBUG (0): LQI Root is receiving packet from node 1 @1:4:6.044206683
+DEBUG (0): LQI Root is receiving packet from node 6 @1:4:6.050523785
+DEBUG (0): LQI Root is receiving packet from node 1 @1:4:11.006761834
+DEBUG (0): LQI Root is receiving packet from node 3 @1:4:11.009147508
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:4:11.011728118
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:11.023895014
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:4:11.029208924
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:11.030336407
+DEBUG (0): LQI Root is receiving packet from node 2 @1:4:11.031991672
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:11.037719396
+DEBUG (0): LQI Root is receiving packet from node 4 @1:4:11.040475509
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:11.049401849
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:4:11.054094203
+DEBUG (0): LQI Root is receiving packet from node 6 @1:4:11.062837438
+DEBUG (0): LQI Root is receiving packet from node 3 @1:4:16.006172061
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:16.012102260
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:16.015792644
+DEBUG (0): LQI Root is receiving packet from node 1 @1:4:16.017870167
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:4:16.022510355
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:16.024804824
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:4:16.032540985
+DEBUG (0): LQI Root is receiving packet from node 6 @1:4:16.040408810
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:4:16.043185893
+DEBUG (0): LQI Root is receiving packet from node 2 @1:4:16.049853945
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:16.059146494
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 65 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 1331.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 72 that advertises 432.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 855 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 432.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 1155 and my cost to 432.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 432.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 432.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 432.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 1036.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 1036.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 1036.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 1036.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 1036.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 1036.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 1036.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 1416.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 1036.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 1416.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 1416.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 1416.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:4:21.007219595
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:4:21.009317244
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:21.011504950
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:4:21.016761599
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:21.019809565
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:21.021669465
+DEBUG (0): LQI Root is receiving packet from node 2 @1:4:21.022424467
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:4:21.025272180
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:21.031259254
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:4:21.033389808
+DEBUG (0): LQI Root is receiving packet from node 4 @1:4:21.037698426
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:4:21.040061634
+DEBUG (0): LQI Root is receiving packet from node 6 @1:4:21.048654172
+DEBUG (0): LQI Root is receiving packet from node 3 @1:4:21.056985423
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:4:26.008003105
+DEBUG (0): LQI Root is receiving packet from node 1 @1:4:26.009294778
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:4:26.011264693
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:4:26.015527535
+DEBUG (0): LQI Root is receiving packet from node 4 @1:4:26.020435172
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:4:26.021066443
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:26.023897235
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:26.025939680
+DEBUG (0): LQI Root is receiving packet from node 2 @1:4:26.043430033
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:4:26.047136236
+DEBUG (0): LQI Root is receiving packet from node 3 @1:4:26.049747134
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:26.068544192
+DEBUG (0): LQI Root is receiving packet from node 6 @1:4:26.072055354
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:26.081271609
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:4:31.008066030
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:4:31.010810706
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:4:31.016166510
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:31.018495656
+DEBUG (0): LQI Root is receiving packet from node 2 @1:4:31.021578031
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:4:31.023364842
+DEBUG (0): LQI Root is receiving packet from node 1 @1:4:31.029268416
+DEBUG (0): LQI Root is receiving packet from node 3 @1:4:31.039690108
+DEBUG (0): LQI Root is receiving packet from node 4 @1:4:31.045015394
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:4:31.049914980
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:31.051208087
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:31.063292978
+DEBUG (0): LQI Root is receiving packet from node 6 @1:4:31.066470670
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:31.075641148
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 189.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 1036.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 189.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 1036.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 189.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 189.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 189.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 557.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 1036.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 557.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 1036.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 557.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 557.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 557.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 557.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 1142.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 1036.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1142.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 557.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 1142.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 1142.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 1142.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 189.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:4:36.010078288
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:36.012315882
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:4:36.017810675
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:4:36.020562906
+DEBUG (0): LQI Root is receiving packet from node 1 @1:4:36.023210712
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:4:36.028537541
+DEBUG (0): LQI Root is receiving packet from node 3 @1:4:36.029543073
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:36.036300337
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:4:36.041314738
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:4:36.047992384
+DEBUG (0): LQI Root is receiving packet from node 2 @1:4:36.048944088
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:4:36.051223346
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:4:36.063617293
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:4:36.066958948
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:36.069095166
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:4:36.076129427
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:4:36.081683594
+DEBUG (0): LQI Root is receiving packet from node 6 @1:4:36.081683594
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:36.081683594
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:36.086093358
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:36.091693301
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:4:36.097079622
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:4:36.097079622
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:36.097079622
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:36.097079622
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:36.097079622
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:4:36.097079622
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:36.101077401
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:36.104998887
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:41.017656427
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:4:41.026659060
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:4:41.026659060
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:4:41.026659060
+DEBUG (0): LQI Root is receiving packet from node 6 @1:4:41.026659060
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:4:41.026659060
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:4:41.033006679
+DEBUG (0): LQI Root is receiving packet from node 6 @1:4:41.033006679
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:41.033006679
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:4:41.033006679
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:4:41.034349445
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:41.035079641
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:4:41.036806096
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:4:41.036806096
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:41.037294374
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:4:41.042571663
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:4:41.042571663
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:41.042571663
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:41.042571663
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:41.042571663
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:4:41.042571663
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:41.046310044
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:4:41.046310044
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:41.046310044
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:41.048690402
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:41.048690402
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:4:41.048690402
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:41.050109461
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:41.050109461
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:41.051576517
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:41.054534484
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:41.058137758
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:41.065429196
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:41.072020954
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:4:46.007684563
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:4:46.007684563
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:4:46.007684563
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:4:46.009696821
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:4:46.010318654
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:4:46.015548505
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:4:46.018314212
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:4:46.018314212
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:4:46.018314212
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:4:46.019731729
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:4:46.023990449
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:4:46.023990449
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:4:46.023990449
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:4:46.023990449
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:4:46.027133741
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:4:46.027133741
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:46.029314074
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:4:46.034072567
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:46.034072567
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:46.034072567
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:46.034072567
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:4:46.034072567
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:46.034072567
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:46.039138455
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:46.039138455
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:4:46.040389669
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:4:46.040389669
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:46.040389669
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:46.041518813
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:46.041518813
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:4:46.044267600
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:4:46.044267600
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:46.044267600
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:46.044267600
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:4:46.048156347
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:4:46.048156347
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:46.048156347
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:46.048156347
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:46.048156347
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:46.048156347
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:4:46.050599960
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:46.050599960
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:46.050599960
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:46.050599960
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:4:46.050599960
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:46.051118756
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:46.056991134
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:46.056991134
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:46.056991134
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:46.056991134
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:4:46.056991134
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:4:46.059083798
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:4:46.063155649
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:4:46.063155649
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:4:46.063155649
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:46.063155649
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:4:46.063155649
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:46.063155649
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 68 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3720 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 790.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 790.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 790.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 420 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 790.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 790.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 1210.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1210.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1210.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 1210.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1210.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:51.012634094
+DEBUG (0): LQI Root is receiving packet from node 1 @1:4:51.024172010
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:4:51.030612725
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:4:51.033240995
+DEBUG (0): LQI Root is receiving packet from node 2 @1:4:51.036569282
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:51.045412002
+DEBUG (0): LQI Root is receiving packet from node 3 @1:4:51.052590917
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:4:51.053666959
+DEBUG (0): LQI Root is receiving packet from node 4 @1:4:51.056970164
+DEBUG (0): LQI Root is receiving packet from node 6 @1:4:51.064050201
+DEBUG (0): LQI Root is receiving packet from node 2 @1:4:56.007791374
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:4:56.008468468
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:4:56.011934415
+DEBUG (0): LQI Root is receiving packet from node 5 @1:4:56.014922899
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:4:56.016319097
+DEBUG (0): LQI Root is receiving packet from node 3 @1:4:56.020881448
+DEBUG (0): LQI Root is receiving packet from node 1 @1:4:56.026109865
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:4:56.029315735
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:4:56.045840907
+DEBUG (0): LQI Root is receiving packet from node 6 @1:4:56.051273004
+DEBUG (0): LQI Root is receiving packet from node 4 @1:4:56.057742693
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:1.007311147
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:1.010568457
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:5:1.015125144
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:1.018907641
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:1.021133189
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:5:1.026430180
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:1.030326583
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:1.051135676
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:1.060062016
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:1.069232494
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 59 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1210.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 915.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1210.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 915.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 790.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 915.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 915.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 915.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 125.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:6.005668524
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:6.007845201
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:6.015596503
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:6.018264554
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:5:6.018268436
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:5:6.020868080
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:6.023959931
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:5:6.027271069
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:6.030170222
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:5:6.035165482
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:6.039416995
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:6.043634060
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:6.049365667
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:6.055102938
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 111 that advertises 1645.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1210.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1645.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 93 that advertises 1645.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 1645.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 1645.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:11.008913310
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:11.010955637
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:11.015998664
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:5:11.018085332
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:5:11.022073517
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:11.025317956
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:11.028726310
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:11.031284107
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:5:11.034417805
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:11.038026792
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:11.039294925
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:5:11.043092680
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:11.047000568
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:11.054248451
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:16.007072324
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:16.014513253
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:16.017000303
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:5:16.027728830
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:16.033130410
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:5:16.038211557
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:16.045852283
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:16.048760983
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:16.054904575
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:16.058755432
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:16.063266343
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:5:16.063943390
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:5:16.073663182
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:5:16.079018985
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:5:16.079018985
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:16.079018985
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:16.079018985
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:16.079018985
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:16.084634187
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:5:16.086633077
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:16.087197649
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1210.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 855 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:5:21.006296021
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:21.006296021
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:5:21.006296021
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:5:21.006296021
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:21.009750199
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:21.013033041
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:5:21.017595392
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:5:21.021471102
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:5:21.025606210
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:21.025606210
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:21.025606210
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:5:21.025606210
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:21.028307118
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:5:21.030647016
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:5:21.032775578
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:5:21.035829539
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:21.035829539
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:5:21.035829539
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:5:21.035829539
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:21.037996392
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:5:21.041320450
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:5:21.041320450
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:5:21.041320450
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:21.041320450
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:21.041320450
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:5:21.041320450
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:5:21.050307824
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:21.054587916
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:5:21.054587916
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:21.054587916
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:21.054587916
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:21.054587916
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:5:21.056718699
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:21.056718699
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:21.056718699
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:5:21.056718699
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:5:21.056718699
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:21.059073974
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:21.059073974
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:5:21.059073974
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:21.059073974
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:5:21.059073974
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:21.059073974
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:21.061927351
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:21.061927351
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:21.064094086
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:21.064094086
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:21.064094086
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:21.064094086
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:21.064094086
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:21.071000842
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:21.071000842
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:21.071000842
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:5:21.071000842
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:5:21.071000842
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:21.077592601
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:21.077592601
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:21.077592601
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:21.077592601
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:5:21.077592601
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 108 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 59 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:5:26.007816227
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:5:26.007816227
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:5:26.008539050
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:26.008539050
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:26.010871741
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:26.010871741
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:26.010871741
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:5:26.012924009
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:26.012924009
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:5:26.012924009
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:26.012924009
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:5:26.015893744
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:5:26.015893744
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:26.017051514
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:5:26.017051514
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:26.017371947
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:26.020820413
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:26.021430761
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:26.021430761
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:26.021430761
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:26.024711382
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:5:26.024711382
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:5:26.024711382
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:5:26.025155774
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:5:26.028312435
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:26.028312435
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:5:26.032676423
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:5:26.032676423
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:26.032676423
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:26.032676423
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:5:26.039573355
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:5:26.039573355
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:26.039573355
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:26.039573355
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:5:26.039573355
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:26.039573355
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:5:26.042663215
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:26.042663215
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:26.042663215
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:5:26.042663215
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:26.042663215
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:5:26.052749216
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:26.052749216
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:5:26.052749216
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:26.052749216
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:5:26.052749216
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:26.052749216
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:31.007692614
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:5:31.007692614
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:5:31.008302844
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:5:31.010242360
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:31.010242360
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:5:31.010242360
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:5:31.010242360
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:5:31.010242360
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:5:31.012758384
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:31.012758384
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:5:31.012758384
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:31.012758384
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:5:31.015338766
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:31.015338766
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:5:31.015338766
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:5:31.015338766
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:5:31.015338766
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:31.017551277
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:5:31.017551277
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:5:31.017551277
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:5:31.017551277
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:5:31.019016113
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:5:31.021030261
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:31.021030261
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:5:31.021030261
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:5:31.021030261
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:5:31.025592612
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:31.025592612
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:5:31.025592612
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:5:31.025592612
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:5:31.026111408
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:31.028278144
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:31.028278144
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:5:31.028278144
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:5:31.029315735
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:31.032320038
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:5:31.032320038
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:5:31.032320038
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:5:31.034671539
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:31.034671539
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:5:31.034671539
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:5:31.035938011
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:5:31.035938011
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:5:31.039905273
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:5:31.039905273
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:5:31.039905273
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:31.039905273
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:5:31.039905273
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:5:31.042819685
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:5:31.042819685
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:31.042819685
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:5:31.042819685
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:5:31.042819685
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:5:31.049731876
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:5:31.049731876
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:5:31.049731876
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:31.049731876
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:5:31.049731876
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:5:31.049731876
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:5:31.053973794
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:5:31.053973794
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:5:31.053973794
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:31.053973794
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:5:31.053973794
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:5:31.053973794
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:36.007697931
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:36.007697931
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:36.007697931
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:36.007697931
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:5:36.008363879
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:36.009813574
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:5:36.010684862
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:5:36.010684862
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:5:36.010684862
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:36.015704975
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:5:36.015704975
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:36.015704975
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:5:36.016834119
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:36.019912493
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:5:36.019912493
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:36.019912493
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:36.019912493
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:5:36.024248186
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:5:36.024248186
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:36.024248186
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:5:36.024248186
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:36.026199078
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:5:36.026199078
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:5:36.028474845
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:5:36.028474845
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:36.028474845
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:5:36.028474845
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:5:36.028474845
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:36.029514098
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:5:36.033021938
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:36.033021938
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:5:36.033021938
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:36.033647545
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:5:36.033784873
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:36.041444740
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:36.041444740
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:36.041444740
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:36.041444740
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:5:36.042970610
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:5:36.042970610
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 66 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 76 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:41.006805270
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:5:41.006805270
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:41.006805270
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:41.006805270
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:41.008872851
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:41.008872851
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:41.008872851
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:5:41.009371071
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:41.010064920
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:5:41.010944260
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:41.010944260
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:5:41.010944260
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:5:41.010944260
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:41.013750200
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:5:41.013750200
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:41.013750200
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:5:41.013750200
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:41.016547977
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:41.016547977
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:41.016547977
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:41.016547977
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:41.019326951
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:5:41.019326951
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:5:41.019326951
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:5:41.019326951
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:41.020448769
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:41.023927871
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:5:41.023927871
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:5:41.023927871
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:41.023927871
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:5:41.024553360
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:41.026584428
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:5:41.026584428
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:5:41.026584428
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:5:41.026584428
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:41.027551390
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:5:41.030534888
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:41.030534888
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:5:41.030534888
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:41.030534888
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:5:41.031879197
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:5:41.032937711
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:41.032937711
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:41.034843158
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:5:41.034843158
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:5:41.034843158
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:41.037652650
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:5:41.037652650
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:41.037652650
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:41.039980023
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:41.039980023
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:5:41.039980023
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:41.039980023
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:41.039980023
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:5:41.042899752
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:5:41.042899752
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:5:41.042899752
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:41.045091688
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:41.045091688
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:41.045198499
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:5:41.048347108
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:41.048347108
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:5:41.048347108
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:5:41.048347108
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:5:46.005411017
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:46.005411017
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:46.005411017
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:46.007224911
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:46.009246662
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:5:46.009246662
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:46.009246662
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:46.011217374
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:5:46.011217374
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:5:46.011217374
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:46.017188843
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:5:46.017188843
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:46.017188843
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:46.018539210
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:46.019533365
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:5:46.019533365
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:46.020038446
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:5:46.025741317
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:46.025741317
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:5:46.025741317
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:46.028474964
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:5:46.028474964
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:5:46.028474964
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:5:46.035341379
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:5:46.035341379
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:5:46.035341379
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:5:46.041887361
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:5:46.041887361
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:5:46.041887361
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:46.041887361
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:5:46.041887361
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:5:46.043321679
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:5:46.049531970
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:5:46.049531970
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:5:46.049531970
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:46.049531970
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:5:46.049531970
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:5:46.049531970
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:51.007400359
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:51.007400359
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:51.008750781
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:5:51.009355694
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:51.010179782
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:5:51.011148288
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:51.013816670
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:51.013816670
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:51.017692380
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:5:51.017692380
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:51.017692380
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:51.019326951
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:5:51.019326951
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:5:51.019326951
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:5:51.023338099
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:51.023338099
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:5:51.023889302
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:51.025550610
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:5:51.025550610
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:51.025550610
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:5:51.025550610
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:5:51.028833121
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:51.028833121
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:51.028833121
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:51.028833121
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:5:51.028833121
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:5:51.030357101
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:51.032127110
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:5:51.032127110
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:5:51.032127110
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:51.032127110
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:5:51.032127110
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:5:51.035455397
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:51.035455397
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:51.035455397
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:5:51.035455397
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:5:51.035455397
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:5:51.040475509
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:5:51.040475509
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:5:51.040475509
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:51.040475509
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:5:51.040475509
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:5:51.042977936
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:5:51.042977936
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:51.042977936
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:5:51.043618801
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:51.043618801
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:5:51.046441661
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:51.046441661
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:5:51.046441661
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:5:51.046441661
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:5:51.047189337
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:5:51.058450258
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:5:51.058450258
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:51.058450258
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:5:51.058450258
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:5:51.058450258
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 68 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3720 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 68 that advertises 926.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3720 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 926.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 926.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 1595.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1595.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 1595.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1595.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 1595.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 1595.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 1595.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 2264.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1595.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 2264.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 2264.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 77 that advertises 2264.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:5:56.006549755
+DEBUG (0): LQI Root is receiving packet from node 1 @1:5:56.008592878
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:5:56.012061919
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:5:56.019197556
+DEBUG (0): LQI Root is receiving packet from node 4 @1:5:56.021127478
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:5:56.027681393
+DEBUG (0): LQI Root is receiving packet from node 2 @1:5:56.030648906
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:5:56.036178268
+DEBUG (0): LQI Root is receiving packet from node 3 @1:5:56.038919122
+DEBUG (0): LQI Root is receiving packet from node 6 @1:5:56.056405592
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:5:56.061202536
+DEBUG (0): LQI Root is receiving packet from node 5 @1:5:56.070113616
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:1.014602466
+DEBUG (0): LQI Root is receiving packet from node 1 @1:6:1.022554588
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:1.024705947
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:6:1.032932047
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:6:1.037757570
+DEBUG (0): LQI Root is receiving packet from node 2 @1:6:1.048074342
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:1.057275338
+DEBUG (0): LQI Root is receiving packet from node 3 @1:6:1.063088903
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:1.063830915
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:1.068408525
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:6:1.074527263
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:1.081714111
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:6:6.006717600
+DEBUG (0): LQI Root is receiving packet from node 2 @1:6:6.009363020
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:6:6.011360019
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:6.017473323
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:6.021270518
+DEBUG (0): LQI Root is receiving packet from node 1 @1:6:6.023592180
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:6.028344843
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:6:6.029466661
+DEBUG (0): LQI Root is receiving packet from node 3 @1:6:6.035180740
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:6.038148861
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:6.045709243
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:6.052423071
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 64 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1595.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1595.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 1051.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1595.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 1051.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1595.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 1051.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 1051.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1051.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 1739.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1595.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1739.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 1739.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 1739.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 1739.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:6:11.006412426
+DEBUG (0): LQI Root is receiving packet from node 1 @1:6:11.008959086
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:11.011962711
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:11.017198666
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:11.020418370
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:11.021514657
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:6:11.022666716
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:6:11.031259254
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:11.036895427
+DEBUG (0): LQI Root is receiving packet from node 2 @1:6:11.044738398
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:6:11.046599960
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:11.052260937
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:6:11.057107492
+DEBUG (0): LQI Root is receiving packet from node 3 @1:6:11.065667623
+DEBUG (0): LQI Root is receiving packet from node 1 @1:6:16.010134006
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:6:16.011941740
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:6:16.016559462
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:16.017104893
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:6:16.020149030
+DEBUG (0): LQI Root is receiving packet from node 2 @1:6:16.025308361
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:16.026504252
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:6:16.028815972
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:16.031724949
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:6:16.035768504
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:16.041009564
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:16.051004012
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:16.059793023
+DEBUG (0): LQI Root is receiving packet from node 1 @1:6:21.006990714
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:6:21.010043997
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:21.017623688
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:21.019685834
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:21.022113629
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:21.023879755
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:6:21.024619829
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:6:21.027047853
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:6:21.028960903
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:21.031539623
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:6:21.033425990
+DEBUG (0): LQI Root is receiving packet from node 2 @1:6:21.039245266
+DEBUG (0): LQI Root is receiving packet from node 3 @1:6:21.047118756
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1595.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 111 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 68 that advertises 215.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1595.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 215.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 215.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 215.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 215.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 215.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 215.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:26.007417839
+DEBUG (0): LQI Root is receiving packet from node 1 @1:6:26.008226669
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:6:26.008460866
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:6:26.010934666
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:6:26.019809565
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:26.024001825
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:6:26.029239442
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:26.042916901
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:6:26.044305443
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:26.048760983
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:26.051995828
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:6:26.060739063
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:26.060739063
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:26.060739063
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:26.060739063
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:6:26.060739063
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:26.066354264
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:26.072503521
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:26.083520302
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 590.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 590.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 590.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 590.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 590.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 3, my link to 669 and my cost to 590.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 590.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 590.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 215.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 1151.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 590.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 1151.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 1151.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 3, my link to 669 and my cost to 590.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 1151.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 4, my link to 5355 and my cost to 1151.
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:6:31.023095850
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:31.025194225
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:6:31.032767975
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:6:31.035022489
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:6:31.038042169
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:6:31.046409253
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:6:31.049609806
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:6:31.052186983
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:6:31.066607998
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:31.067367050
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:31.078738664
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:6:31.086200169
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:6:31.087251476
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:6:31.095567468
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:31.097001785
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:6:31.104386996
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:31.107789686
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:6:31.110505735
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:6:31.115251191
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:31.125444002
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:6:31.125444002
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:6:31.130937134
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:6:36.005968381
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:6:36.009235286
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:6:36.009235286
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:6:36.019151780
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:6:36.019151780
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:6:36.019151780
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:6:36.019151780
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:6:36.022689577
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:6:36.027544065
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:6:36.027544065
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:6:36.027544065
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:6:36.027544065
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:6:36.030296066
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:6:36.033746423
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:6:36.037218081
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:6:36.037218081
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:6:36.037218081
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:6:36.037218081
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:6:36.037218081
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:36.042222934
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:6:36.042222934
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:6:36.042222934
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:6:36.042222934
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:36.044875727
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:36.044875727
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:36.044875727
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:36.044875727
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:36.044875727
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:6:36.046012527
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:6:36.047593997
+DEBUG (0): LQI Root is receiving packet from node 2 @1:6:36.047593997
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:6:36.047593997
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:6:36.047593997
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:6:36.049625065
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:6:36.052489818
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:36.052489818
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:36.052489818
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:36.052489818
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:6:36.053901275
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:36.053901275
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:6:36.056871286
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:36.056871286
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:6:36.056871286
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:6:36.056871286
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:6:36.056871286
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:6:36.056871286
+DEBUG (0): LQI Root is receiving packet from node 3 @1:6:36.059325716
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:6:36.059325716
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:6:36.059325716
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:6:36.060386222
+DEBUG (0): LQI Root is receiving packet from node 2 @1:6:36.062453749
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:6:36.062453749
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:6:36.062453749
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:6:36.062453749
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:36.064818848
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:36.064818848
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:6:36.064818848
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:36.064818848
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:6:36.065660297
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:6:36.066766249
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:36.066766249
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:6:36.066766249
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:6:36.066766249
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:6:36.066766249
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:6:36.069304905
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:6:36.069304905
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:6:36.069304905
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:6:36.071526964
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:6:36.071526964
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:6:36.071526964
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:6:36.071526964
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:6:36.073256909
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:36.074065620
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:36.074065620
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:6:36.074065620
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:6:36.075059657
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:6:36.078078658
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:6:36.078078658
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:6:36.078078658
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:6:36.078942692
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:6:36.080901517
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:6:36.080901517
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:6:36.080901517
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:6:36.083001506
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:6:36.083001506
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:6:36.083001506
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:6:36.086501460
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:6:36.086501460
+DEBUG (0): LQI Root is receiving packet from node 3 @1:6:36.086501460
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:6:36.086501460
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:6:36.086501460
+DEBUG (0): LQI Root is receiving packet from node 3 @1:6:36.088958111
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:6:36.088958111
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:36.089202250
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:6:36.091307951
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:6:36.091307951
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:6:36.091307951
+DEBUG (0): LQI Root is receiving packet from node 3 @1:6:36.091307951
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:6:36.091307951
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:6:36.098311694
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:6:36.098311694
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:6:36.098311694
+DEBUG (0): LQI Root is receiving packet from node 3 @1:6:36.098311694
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 63 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 69 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 74 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:6:41.005953122
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:6:41.005953122
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:6:41.005953122
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:6:41.005953122
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:6:41.005953122
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:6:41.008441834
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:41.008441834
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:41.010332251
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:6:41.010368204
+DEBUG (0): LQI Root is receiving packet from node 3 @1:6:41.010368204
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:6:41.014545314
+DEBUG (0): LQI Root is receiving packet from node 1 @1:6:41.014545314
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:6:41.014545314
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:6:41.014545314
+DEBUG (0): LQI Root is receiving packet from node 1 @1:6:41.016761599
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:6:41.016761599
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:6:41.016761599
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:6:41.016761599
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:6:41.017673347
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:6:41.020425577
+DEBUG (0): LQI Root is receiving packet from node 1 @1:6:41.020425577
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:6:41.020425577
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:6:41.020425577
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:6:41.020425577
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:6:41.021182848
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:6:41.023776827
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:6:41.023776827
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:6:41.023776827
+DEBUG (0): LQI Root is receiving packet from node 3 @1:6:41.024265105
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:6:41.029926083
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:41.029926083
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:6:41.029926083
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:6:41.035571802
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:6:41.035571802
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:41.035571802
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:6:41.035571802
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:41.035571802
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:6:41.037204483
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:6:41.038867681
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:6:41.038867681
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:6:41.038867681
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:41.038867681
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:6:41.042163561
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:6:41.042163561
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:6:41.042163561
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:41.042163561
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:41.042163561
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:6:41.042163561
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:41.045169524
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:41.045169524
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:6:41.045169524
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:6:41.045169524
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:6:41.045169524
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:6:41.046512290
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:6:41.051364557
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:41.051364557
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:6:41.051364557
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:6:41.051364557
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:6:41.051364557
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:41.051364557
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:6:46.007770451
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:46.007770451
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:6:46.007770451
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:6:46.007770451
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:6:46.007770451
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:46.010543652
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:6:46.010543652
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:46.010543652
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:46.015121262
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:46.015121262
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:6:46.015121262
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:46.015121262
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:6:46.019792645
+DEBUG (0): LQI Root is receiving packet from node 4 @1:6:46.019792645
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:6:46.020095598
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:46.025069934
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:46.025069934
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:46.025069934
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:6:46.026536991
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:46.027315184
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:46.027315184
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:46.027315184
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:6:46.027315184
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:46.033446960
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:6:46.033446960
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:46.033446960
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:46.033446960
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:46.033446960
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:6:46.033446960
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:46.038573884
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:46.038573884
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:46.038573884
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:46.038573884
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:46.038573884
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:6:46.038573884
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:6:46.041152604
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:46.041152604
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:46.041152604
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:46.041152604
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:6:46.041152604
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:46.050506187
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:46.050506187
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:46.050506187
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:46.050506187
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:6:46.050506187
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:46.050506187
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:6:51.006609247
+DEBUG (0): LQI Root is receiving packet from node 1 @1:6:51.006609247
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:51.008102260
+DEBUG (0): LQI Root is receiving packet from node 3 @1:6:51.008613453
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:6:51.008613453
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:6:51.008613453
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:6:51.008613453
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:6:51.011270357
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:6:51.011270357
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:6:51.011270357
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:6:51.011270357
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:6:51.013435202
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:6:51.013435202
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:6:51.013435202
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:6:51.013435202
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:6:51.015472212
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:51.015472212
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:51.015472212
+DEBUG (0): LQI Root is receiving packet from node 2 @1:6:51.019311692
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:6:51.019311692
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:6:51.019311692
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:6:51.020028851
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:6:51.022735353
+DEBUG (0): LQI Root is receiving packet from node 2 @1:6:51.022735353
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:6:51.022735353
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:6:51.023078701
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:6:51.024270770
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:6:51.026651127
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:6:51.026651127
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:6:51.027368286
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:6:51.027368286
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:6:51.028894156
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:6:51.028894156
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:6:51.031305031
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:6:51.031305031
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:6:51.038751276
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:6:51.038751276
+DEBUG (0): LQI Root is receiving packet from node 2 @1:6:51.038751276
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:6:51.038751276
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:6:51.038751276
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:56.007888638
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:56.007888638
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:56.007888638
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:56.010652684
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:6:56.010652684
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:56.010652684
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:6:56.010652684
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:6:56.010888890
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:6:56.015611761
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:56.015611761
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:6:56.015611761
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:56.016115298
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:56.017999444
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:56.017999444
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:6:56.017999444
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:56.017999444
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:6:56.019014451
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:56.019014451
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:56.021875154
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:6:56.021875154
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:56.021875154
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:56.021875154
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:6:56.023660422
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:6:56.023943012
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:56.023943012
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:56.023943012
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:6:56.023943012
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:56.028161738
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:6:56.028161738
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:6:56.028161738
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:56.028161738
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:56.030526837
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:6:56.030526837
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:6:56.030526837
+DEBUG (0): LQI Root is receiving packet from node 6 @1:6:56.030526837
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:6:56.030526837
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:6:56.035699536
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:6:56.035699536
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:6:56.035699536
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:6:56.035699536
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:6:56.036706610
+DEBUG (0): LQI Root is receiving packet from node 5 @1:6:56.036706610
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 72 that advertises 855.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 3045 and my cost to 855.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 855.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 855.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 855.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 855.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 1467.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1467.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 108 that advertises 1467.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 1467.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 1467.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 1467.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 107 that advertises 2196.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 2196.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 2196.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:7:1.006173952
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:1.008486067
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:7:1.015720233
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:1.017761017
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:1.021196446
+DEBUG (0): LQI Root is receiving packet from node 4 @1:7:1.023685275
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:7:1.030077009
+DEBUG (0): LQI Root is receiving packet from node 5 @1:7:1.033160928
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:1.039142338
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:1.044135707
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:6.008562360
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:6.009813455
+DEBUG (0): LQI Root is receiving packet from node 2 @1:7:6.015481759
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:7:6.021640609
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:6.023551720
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:6.040225706
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:6.041198380
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:7:6.043368998
+DEBUG (0): LQI Root is receiving packet from node 5 @1:7:6.054915951
+DEBUG (0): LQI Root is receiving packet from node 4 @1:7:6.061431416
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:11.020494664
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:7:11.022723977
+DEBUG (0): LQI Root is receiving packet from node 2 @1:7:11.025827157
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:11.029176746
+DEBUG (0): LQI Root is receiving packet from node 4 @1:7:11.043023712
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:7:11.046235972
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:11.053270233
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:11.056655443
+DEBUG (0): LQI Root is receiving packet from node 5 @1:7:11.060424342
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:11.064078828
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 1241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1467.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 1241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 1241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1241.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 1645.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1467.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1645.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 1645.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 1645.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 1645.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:16.006233096
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:16.010757273
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:7:16.015298654
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:16.018526291
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:7:16.024499650
+DEBUG (0): LQI Root is receiving packet from node 2 @1:7:16.028429188
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:7:16.031162038
+DEBUG (0): LQI Root is receiving packet from node 5 @1:7:16.035081981
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:16.039354299
+DEBUG (0): LQI Root is receiving packet from node 4 @1:7:16.045137464
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:7:16.049638662
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:16.055299640
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:21.007295888
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:7:21.010440723
+DEBUG (0): LQI Root is receiving packet from node 4 @1:7:21.015170920
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:21.018142484
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:21.021211704
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:7:21.023690939
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:21.027137515
+DEBUG (0): LQI Root is receiving packet from node 2 @1:7:21.029092519
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:7:21.031847018
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:21.037370668
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:7:21.041894568
+DEBUG (0): LQI Root is receiving packet from node 5 @1:7:21.047067268
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:26.009355694
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:26.014549087
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:26.017211704
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:26.022737692
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:7:26.024621720
+DEBUG (0): LQI Root is receiving packet from node 2 @1:7:26.029992782
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:7:26.031381324
+DEBUG (0): LQI Root is receiving packet from node 5 @1:7:26.037744202
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:7:26.045535733
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:26.057437519
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:7:26.061374264
+DEBUG (0): LQI Root is receiving packet from node 4 @1:7:26.067996540
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1467.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 790 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 189.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1467.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 189.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 189.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 189.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 189.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 189.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 915.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 915.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 915.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 915.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 915.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 915.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:31.006059933
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:31.013061337
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:7:31.016010149
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:31.016939268
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:7:31.019571090
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:7:31.021125587
+DEBUG (0): LQI Root is receiving packet from node 4 @1:7:31.022128887
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 1705.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 189.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 1705.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 125.
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:7:31.030321148
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:7:31.033944786
+DEBUG (0): LQI Root is receiving packet from node 2 @1:7:31.036502583
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:7:31.049157710
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:31.052783616
+DEBUG (0): LQI Root is receiving packet from node 5 @1:7:31.061954094
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:31.071811215
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:36.011659758
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:36.016603695
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:36.021804572
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:7:36.023826377
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:7:36.029193666
+DEBUG (0): LQI Root is receiving packet from node 4 @1:7:36.034991972
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:7:36.035953270
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:7:36.039300589
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:36.047275225
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:7:36.048455809
+DEBUG (0): LQI Root is receiving packet from node 5 @1:7:36.062884875
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:7:36.066613662
+DEBUG (0): LQI Root is receiving packet from node 2 @1:7:36.070651553
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:36.077212794
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:41.008010707
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:7:41.009906669
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:41.013872270
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:41.016664730
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:7:41.025949227
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:7:41.028251400
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:7:41.033609094
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:7:41.038583430
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:7:41.041673621
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:41.051012064
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:41.059602712
+DEBUG (0): LQI Root is receiving packet from node 5 @1:7:41.070176991
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 216.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 216.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 314.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 915.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 314.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 855 and my cost to 189.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 314.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 165 and my cost to 314.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 314.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 314.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:7:46.007196285
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:7:46.008750781
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:46.010667943
+DEBUG (0): LQI Root is receiving packet from node 2 @1:7:46.019075604
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:7:46.019306028
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:7:46.032905304
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:46.035356637
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:46.037673620
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:7:46.045337370
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:7:46.046542807
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:46.048112911
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:46.050643515
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:7:46.051532402
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:7:46.064437380
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:46.073104322
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:7:46.073760446
+DEBUG (0): LQI Root is receiving packet from node 4 @1:7:46.079619787
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 1044.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 216 and my cost to 1044.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1044.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 165 and my cost to 314.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 1044.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 1044.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 1044.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 216.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:7:51.005761967
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:7:51.008872851
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:51.010652802
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:7:51.015720233
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:7:51.022952857
+DEBUG (0): LQI Root is receiving packet from node 2 @1:7:51.025301154
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:51.029922201
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:7:51.032493319
+DEBUG (0): LQI Root is receiving packet from node 5 @1:7:51.037543948
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:7:51.039451286
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:7:51.040498701
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:7:51.046912790
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:7:51.052466957
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:7:51.052466957
+DEBUG (0): LQI Root is receiving packet from node 4 @1:7:51.052466957
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:7:51.052466957
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:7:51.052466957
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:7:51.054994466
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:7:51.058509402
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:7:51.062303383
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:7:51.062303383
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:51.062303383
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:7:51.067277720
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:7:51.072343608
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:7:51.072343608
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:7:51.072343608
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:51.072343608
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:51.072343608
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:7:51.079210023
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:7:51.089570680
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:7:51.097566239
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:7:51.097566239
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:51.097566239
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:51.097566239
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:7:51.097566239
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:7:56.005968381
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:7:56.005968381
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:7:56.005968381
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:56.005968381
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:7:56.005968381
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:7:56.009536577
+DEBUG (0): LQI Root is receiving packet from node 5 @1:7:56.009536577
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:7:56.011833039
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:56.011833039
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:7:56.011833039
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:7:56.011833039
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:7:56.011833039
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:7:56.011833039
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:56.016177994
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:7:56.016177994
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:7:56.016177994
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:7:56.016177994
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:7:56.017770564
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:56.018508693
+DEBUG (0): LQI Root is receiving packet from node 5 @1:7:56.018508693
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:7:56.018508693
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:7:56.019874374
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:7:56.019874374
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:56.021034035
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:7:56.021034035
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:7:56.021844637
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:7:56.021844637
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:7:56.021844637
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:7:56.026050373
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:7:56.027213808
+DEBUG (0): LQI Root is receiving packet from node 1 @1:7:56.027213808
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:7:56.027213808
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:7:56.028922783
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:7:56.028922783
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:7:56.033098232
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:7:56.035575576
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:7:56.035575576
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:7:56.035575576
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:7:56.035575576
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:7:56.037543948
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:56.037543948
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:7:56.037543948
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:7:56.039186453
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:7:56.041831643
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:7:56.041831643
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:7:56.041831643
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:7:56.041831643
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:7:56.049013056
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:56.049013056
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:56.049013056
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:7:56.049013056
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:56.054216272
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:7:56.054216272
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:7:56.056581371
+DEBUG (0): LQI Root is receiving packet from node 6 @1:7:56.056581371
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:7:56.056581371
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:7:56.063310458
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:7:56.063310458
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:7:56.063310458
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:56.063310458
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:7:56.063310458
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:7:56.063310458
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:7:56.071000842
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:7:56.071000842
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:7:56.071000842
+DEBUG (0): LQI Root is receiving packet from node 3 @1:7:56.071000842
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:7:56.071000842
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:7:56.071000842
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 62 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4913 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 5 @1:8:1.008437951
+DEBUG (0): LQI Root is receiving packet from node 2 @1:8:1.011178805
+DEBUG (0): LQI Root is receiving packet from node 1 @1:8:1.016939386
+DEBUG (0): LQI Root is receiving packet from node 4 @1:8:1.021732161
+DEBUG (0): LQI Root is receiving packet from node 3 @1:8:1.047202705
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:1.051301861
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 2744.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 2744.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 2744.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 2744.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 2744.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 2744.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 3124.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 3124.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 84 that advertises 3124.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 72 that advertises 3124.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 64 that advertises 3124.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:8:6.006777092
+DEBUG (0): LQI Root is receiving packet from node 2 @1:8:6.009363020
+DEBUG (0): LQI Root is receiving packet from node 4 @1:8:6.016849377
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:8:6.019853680
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:6.028657950
+DEBUG (0): LQI Root is receiving packet from node 3 @1:8:6.034049706
+DEBUG (0): LQI Root is receiving packet from node 5 @1:8:6.036010422
+DEBUG (0): LQI Root is receiving packet from node 4 @1:8:11.008029849
+DEBUG (0): LQI Root is receiving packet from node 5 @1:8:11.009948562
+DEBUG (0): LQI Root is receiving packet from node 1 @1:8:11.016237486
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:8:11.022600246
+DEBUG (0): LQI Root is receiving packet from node 3 @1:8:11.024268879
+DEBUG (0): LQI Root is receiving packet from node 2 @1:8:11.047143561
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:11.058732848
+DEBUG (0): LQI Root is receiving packet from node 3 @1:8:16.007728449
+DEBUG (0): LQI Root is receiving packet from node 2 @1:8:16.009775005
+DEBUG (0): LQI Root is receiving packet from node 5 @1:8:16.011947452
+DEBUG (0): LQI Root is receiving packet from node 4 @1:8:16.014438503
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:8:16.017244442
+DEBUG (0): LQI Root is receiving packet from node 1 @1:8:16.023760025
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:16.030336407
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 67 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 2744.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 1621.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 380 and my cost to 2744.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 1621.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 1621.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 1621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1621.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 243 and my cost to 1621.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1621.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 1621.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 1621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:8:21.010974778
+DEBUG (0): LQI Root is receiving packet from node 4 @1:8:21.023668473
+DEBUG (0): LQI Root is receiving packet from node 3 @1:8:21.026160958
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:8:21.030397442
+DEBUG (0): LQI Root is receiving packet from node 5 @1:8:21.033065493
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:8:21.039163261
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:21.041198380
+DEBUG (0): LQI Root is receiving packet from node 2 @1:8:21.047349976
+DEBUG (0): LQI Root is receiving packet from node 1 @1:8:21.053438197
+DEBUG (0): LQI Root is receiving packet from node 1 @1:8:26.007189077
+DEBUG (0): LQI Root is receiving packet from node 5 @1:8:26.010604686
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:8:26.013841752
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:8:26.017444467
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:8:26.019449021
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:26.021364291
+DEBUG (0): LQI Root is receiving packet from node 4 @1:8:26.024951747
+DEBUG (0): LQI Root is receiving packet from node 3 @1:8:26.029212698
+DEBUG (0): LQI Root is receiving packet from node 2 @1:8:26.032382734
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:8:31.010583716
+DEBUG (0): LQI Root is receiving packet from node 3 @1:8:31.016334355
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:8:31.018770312
+DEBUG (0): LQI Root is receiving packet from node 5 @1:8:31.026351665
+DEBUG (0): LQI Root is receiving packet from node 2 @1:8:31.037309751
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:8:31.040546138
+DEBUG (0): LQI Root is receiving packet from node 1 @1:8:31.046068245
+DEBUG (0): LQI Root is receiving packet from node 4 @1:8:31.053346645
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:31.059691924
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 243 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 68 that advertises 250.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 243 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 250.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 926 and my cost to 250.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 250.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 250.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 1125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 243 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 1125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 926 and my cost to 250.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 1125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 1125.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 1125.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 1864.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 926 and my cost to 250.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 1864.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 1864.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 1864.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:8:36.007530085
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:8:36.010009597
+DEBUG (0): LQI Root is receiving packet from node 1 @1:8:36.014742134
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:8:36.015430318
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:8:36.021883087
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:8:36.025979744
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:8:36.029756576
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:8:36.034417805
+DEBUG (0): LQI Root is receiving packet from node 2 @1:8:36.047885573
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:8:36.053460663
+DEBUG (0): LQI Root is receiving packet from node 5 @1:8:36.057574848
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:36.066928431
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:8:41.008416981
+DEBUG (0): LQI Root is receiving packet from node 1 @1:8:41.015459293
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:8:41.018388845
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:8:41.021957159
+DEBUG (0): LQI Root is receiving packet from node 2 @1:8:41.025224861
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:8:41.028701505
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:8:41.029540733
+DEBUG (0): LQI Root is receiving packet from node 3 @1:8:41.032691682
+DEBUG (0): LQI Root is receiving packet from node 5 @1:8:41.036971720
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:8:41.037708020
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:8:41.044173826
+DEBUG (0): LQI Root is receiving packet from node 4 @1:8:41.047092121
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:41.056766136
+DEBUG (0): LQI Root is receiving packet from node 3 @1:8:46.005317574
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:8:46.008209071
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:8:46.009065779
+DEBUG (0): LQI Root is receiving packet from node 1 @1:8:46.015810243
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:8:46.018085332
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:8:46.020501871
+DEBUG (0): LQI Root is receiving packet from node 4 @1:8:46.028156074
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:8:46.033425990
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:8:46.034288410
+DEBUG (0): LQI Root is receiving packet from node 5 @1:8:46.038058970
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:8:46.039110159
+DEBUG (0): LQI Root is receiving packet from node 2 @1:8:46.044269261
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:46.049197821
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 60 that advertises 144.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 243 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 69 that advertises 144.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 926 and my cost to 250.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 74 that advertises 144.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 144.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 144.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 144.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 1518.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 243 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 926 and my cost to 250.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1518.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 1176.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 1176.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1176.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 1176.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 1176.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 1176.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 144.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:8:51.006761834
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:8:51.008615344
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:8:51.013170369
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:8:51.023715792
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:8:51.026733132
+DEBUG (0): LQI Root is receiving packet from node 3 @1:8:51.029548390
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:8:51.031478588
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:8:51.034499811
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:51.036859197
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:8:51.041167863
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:51.044168115
+DEBUG (0): LQI Root is receiving packet from node 4 @1:8:51.049645988
+DEBUG (0): LQI Root is receiving packet from node 5 @1:8:51.058831725
+DEBUG (0): LQI Root is receiving packet from node 3 @1:8:56.006095768
+DEBUG (0): LQI Root is receiving packet from node 1 @1:8:56.009264260
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:8:56.009891410
+DEBUG (0): LQI Root is receiving packet from node 4 @1:8:56.014758935
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:8:56.017205992
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:8:56.019866717
+DEBUG (0): LQI Root is receiving packet from node 2 @1:8:56.022989039
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:8:56.025850349
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:8:56.028899868
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:8:56.033250819
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:8:56.037706359
+DEBUG (0): LQI Root is receiving packet from node 5 @1:8:56.041137345
+DEBUG (0): LQI Root is receiving packet from node 6 @1:8:56.050063685
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:1.007011290
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:1.014526172
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:1.021135411
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:9:1.027744089
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:1.033739097
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:9:1.037179630
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:1.040208904
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:9:1.058175601
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:1.062257725
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:1.066743783
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:9:1.069909542
+DEBUG (0): LQI Root is receiving packet from node 2 @1:9:1.073396576
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:1.080949633
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 196.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 1176.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 196.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 196.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 196.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 196.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:6.006487177
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:9:6.007959220
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:6.009477764
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:9:6.010318654
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:6.011962711
+DEBUG (0): LQI Root is receiving packet from node 2 @1:9:6.016900818
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:9:6.022872681
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:6.026849490
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:6.032066075
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:6.034515069
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:6.036843939
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:6.037940675
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:6.065345300
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:9:6.066230304
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:6.075416042
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 609.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 1176.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 609.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 609.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 609.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 196.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 609.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 609.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 144.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 1301.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 609.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 1301.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1301.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 196.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 58 that advertises 1301.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:11.007204336
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:9:11.009363020
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:11.010154582
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:9:11.012267885
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:11.016740905
+DEBUG (0): LQI Root is receiving packet from node 2 @1:9:11.024057148
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:11.025031814
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:9:11.029132631
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:11.029893905
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:11.039802236
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:11.043399515
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:11.047645208
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:11.052844651
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:9:11.065448337
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:9:11.074481487
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:9:11.081439454
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:11.081439454
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:11.081439454
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:11.081439454
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:11.081439454
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:9:11.081439454
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:11.087237760
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:11.089328202
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:9:11.095767374
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:9:16.005878372
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:9:16.005878372
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:9:16.005878372
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:9:16.005878372
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:9:16.005878372
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:16.008394514
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:9:16.008394514
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:9:16.008394514
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:16.010658119
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:16.013244442
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:16.013244442
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:9:16.013244442
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:9:16.014879462
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:16.017999444
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:9:16.017999444
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:9:16.017999444
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:9:16.017999444
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:9:16.018813867
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:9:16.022666716
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:9:16.023828268
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:9:16.023828268
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:16.025933968
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:9:16.025933968
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:16.025933968
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:16.025933968
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:16.029716235
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:16.032022189
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:16.032022189
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:16.032022189
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:16.032022189
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:9:16.032022189
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:16.032022189
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:16.034524616
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:16.034524616
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:16.035712904
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:9:16.036521615
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:16.036521615
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:9:16.036521615
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:16.041360514
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:16.043815274
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:16.043815274
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:16.043815274
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:16.043815274
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:16.043815274
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:9:16.050714097
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:9:16.050714097
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:16.050714097
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:16.050714097
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:9:16.055352742
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:16.055352742
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:16.055352742
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:9:16.055352742
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:9:16.056298781
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:16.060762255
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:9:16.060762255
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:16.060762255
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:16.060762255
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:9:16.060762255
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:9:16.064500636
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:16.064500636
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:9:16.064500636
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:16.065278830
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:16.069993768
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:16.069993768
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:9:16.069993768
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:16.069993768
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:16.069993768
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:9:16.074174652
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:16.074174652
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:16.074174652
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:16.074174652
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:9:16.074174652
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:16.079133729
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:16.079133729
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:16.079133729
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:16.079133729
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:9:16.079133729
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:9:16.084367464
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:16.084367464
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:16.084367464
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:9:16.084367464
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:9:16.084367464
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:16.086839373
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:16.086839373
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:16.086839373
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:16.086839373
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:16.086839373
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:16.091722157
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:16.091722157
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:9:16.091722157
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:9:16.092347764
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:21.006461976
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:21.006461976
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:21.006461976
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:21.006461976
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:21.006461976
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:9:21.007272578
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:21.008899595
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:9:21.008899595
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:9:21.008899595
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:9:21.009582354
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:9:21.009582354
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:21.011369843
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:9:21.011369843
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:9:21.013828155
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:21.013828155
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:9:21.013828155
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:9:21.013828155
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:21.016097818
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:21.016097818
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:21.016097818
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:21.018100591
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:9:21.018100591
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:21.018100591
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:21.018221117
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:21.021270518
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:21.021270518
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:9:21.021270518
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:21.021270518
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:21.023546404
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:21.023546404
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:21.023546404
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:9:21.023742427
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:9:21.023742427
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:9:21.026260113
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:21.026260113
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:9:21.026260113
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:21.028444446
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:21.028444446
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:21.028444446
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:9:21.028444446
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:9:21.028444446
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:9:21.028444446
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:21.030852981
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:21.030852981
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:9:21.030852981
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:9:21.031312964
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:9:21.031312964
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:9:21.034438776
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:21.034438776
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:9:21.034438776
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:21.034438776
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:21.036254561
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:21.036760320
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:9:21.036760320
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:21.036760320
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:21.036760320
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:21.044046045
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:21.044046045
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:21.044046045
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:9:21.044936761
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:9:21.044936761
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:9:21.050246789
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:9:21.050246789
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:9:21.050246789
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:21.050246789
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:9:21.050246789
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:9:21.059752959
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:9:21.059752959
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:9:21.059752959
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:9:21.059752959
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:9:21.059752959
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:9:21.065551265
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:9:21.065551265
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:9:21.065551265
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:21.065551265
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:9:21.065551265
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:9:21.070327238
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:9:21.070327238
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:9:21.070327238
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:9:21.070327238
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:9:21.070327238
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:9:26.006839670
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:26.006839670
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:9:26.006839670
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:9:26.006839670
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:9:26.006839670
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:26.008758384
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:9:26.008758384
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:9:26.008758384
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:9:26.009905126
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:26.011726228
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:26.011726228
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:26.011726228
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:26.011726228
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:26.013992118
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:26.013992118
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:9:26.013992118
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:9:26.013992118
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:9:26.013992118
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:26.018175341
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:9:26.018175341
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:9:26.018327928
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:9:26.021028600
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:9:26.021028600
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:26.021028600
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:9:26.021028600
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:26.024026631
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:26.024026631
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:9:26.024026631
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:26.024980721
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:26.026536991
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:9:26.026536991
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:26.026536991
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:26.026536991
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:26.026536991
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:26.029075370
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:9:26.029075370
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:26.029075370
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:9:26.029075370
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:26.031793309
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:26.031793309
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:9:26.031793309
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:26.033952837
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:9:26.033952837
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:9:26.033952837
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:9:26.033952837
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:26.037757570
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:26.037757570
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:26.037757570
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:26.037757570
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:26.037757570
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:26.039888471
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:26.039888471
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:26.039888471
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:26.039888471
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:26.039888471
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:9:26.042894435
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:26.042894435
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:9:26.042894435
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:26.043510100
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:9:26.051836033
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:9:26.051836033
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:9:26.051836033
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:9:26.051836033
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:9:31.008013047
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:31.008013047
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:31.008567677
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:9:31.009109334
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:9:31.010431129
+DEBUG (0): LQI Root is receiving packet from node 2 @1:9:31.010431129
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:9:31.010431129
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:9:31.010431129
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:31.015222361
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:9:31.015222361
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:9:31.015222361
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:31.016609012
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:31.017242221
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:9:31.017242221
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:31.022437835
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:31.022437835
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:31.022437835
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:9:31.022437835
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:9:31.022989039
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:9:31.025506725
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:9:31.025506725
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:9:31.025506725
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:9:31.025506725
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:9:31.025506725
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:31.025506725
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:31.030433394
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:31.030433394
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:31.030433394
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:31.030433394
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:31.030433394
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:31.032998746
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:31.032998746
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:31.032998746
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:9:31.032998746
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:31.032998746
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:31.035012895
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:9:31.035012895
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:9:31.035012895
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:9:31.035012895
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:9:31.037101446
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:9:31.037101446
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:31.037101446
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:9:31.037101446
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:31.037635501
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:9:31.039374992
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:31.039374992
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:9:31.039374992
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:9:31.039374992
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:9:31.039374992
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:9:31.045631059
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:9:31.045631059
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:9:31.045631059
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:31.045631059
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:9:31.045631059
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:9:31.049522028
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:31.049522028
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:9:31.049522028
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:9:36.006448608
+DEBUG (0): LQI Root is receiving packet from node 2 @1:9:36.006448608
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:9:36.006448608
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:9:36.007694157
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:36.009116990
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:36.009116990
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:9:36.009116990
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:36.009116990
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:9:36.010652684
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:36.011539350
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:9:36.011539350
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:36.012565456
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:36.012565456
+DEBUG (0): LQI Root is receiving packet from node 2 @1:9:36.014411759
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:9:36.014411759
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:9:36.014411759
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:9:36.014411759
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:9:36.015718572
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:9:36.015718572
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:36.017753414
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:36.017753414
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:9:36.017753414
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:9:36.017753414
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:9:36.018394280
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:36.020942483
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:36.020942483
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:36.020942483
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:36.023042748
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:9:36.023042748
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:9:36.023042748
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:36.027000187
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:9:36.027000187
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:9:36.027000187
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:9:36.028983818
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:9:36.028983818
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:9:36.028983818
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:9:36.028983818
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:9:36.032279697
+DEBUG (0): LQI Root is receiving packet from node 2 @1:9:36.032279697
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:9:36.032279697
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:9:36.032279697
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:9:36.032279697
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:9:36.032279697
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:36.035148332
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:36.035148332
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:36.038123779
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:9:36.038123779
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:9:36.038123779
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:9:36.038123779
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:9:36.038123779
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:9:36.044868124
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:9:36.044868124
+DEBUG (0): LQI Root is receiving packet from node 2 @1:9:36.044868124
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:9:36.044868124
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:9:36.044868124
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4698 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 2325.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 2325.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 2325.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 2325.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 2325.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 2886.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 2886.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 2886.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 79 that advertises 2886.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 2886.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:9:41.006219728
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:41.009218484
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:41.011466830
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:41.016715823
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:41.025317956
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:41.027376219
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:41.045882801
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:41.050996687
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:46.011507289
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:46.015373057
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:46.037490516
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:46.039630616
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:46.042375521
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:46.048540036
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:46.060678028
+DEBUG (0): LQI Root is receiving packet from node 2 @1:9:46.066308488
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:51.008196151
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:51.013511496
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:51.016738684
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:51.023471653
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:9:51.025758797
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:51.030504253
+DEBUG (0): LQI Root is receiving packet from node 2 @1:9:51.032479950
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:51.041131633
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 216.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 216.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 79 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 1456.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2325.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 1456.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 110 that advertises 1456.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1456.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 1456.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1621.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 243 and my cost to 1621.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1621.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 1621.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 216.
+DEBUG (0): LQI Root is receiving packet from node 5 @1:9:56.007018892
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:9:56.010942599
+DEBUG (0): LQI Root is receiving packet from node 1 @1:9:56.013094194
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:9:56.015689716
+DEBUG (0): LQI Root is receiving packet from node 6 @1:9:56.018022636
+DEBUG (0): LQI Root is receiving packet from node 4 @1:9:56.022449320
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:9:56.040933270
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:9:56.048347108
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:9:56.053412996
+DEBUG (0): LQI Root is receiving packet from node 2 @1:9:56.056039383
+DEBUG (0): LQI Root is receiving packet from node 3 @1:9:56.065194603
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:10:1.006891111
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:10:1.008003105
+DEBUG (0): LQI Root is receiving packet from node 1 @1:10:1.009630469
+DEBUG (0): LQI Root is receiving packet from node 5 @1:10:1.012527283
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:10:1.013338215
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:10:1.015048851
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:1.017610651
+DEBUG (0): LQI Root is receiving packet from node 2 @1:10:1.026750731
+DEBUG (0): LQI Root is receiving packet from node 4 @1:10:1.034059648
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:10:1.040198962
+DEBUG (0): LQI Root is receiving packet from node 3 @1:10:1.045020711
+DEBUG (0): LQI Root is receiving packet from node 1 @1:10:6.009844091
+DEBUG (0): LQI Root is receiving packet from node 5 @1:10:6.012420472
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:10:6.015811786
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:10:6.017793755
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:10:6.020316876
+DEBUG (0): LQI Root is receiving packet from node 4 @1:10:6.021625350
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:10:6.025308361
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:10:6.032540985
+DEBUG (0): LQI Root is receiving packet from node 2 @1:10:6.035089188
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:6.042619660
+DEBUG (0): LQI Root is receiving packet from node 3 @1:10:6.048944088
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 61 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 243 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 292.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 292.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 292.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 292.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 681.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 681.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 681.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 681.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 681.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 292.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 90 that advertises 681.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 681.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 216.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:10:11.006442944
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:10:11.010291910
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:11.011629241
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:10:11.017679011
+DEBUG (0): LQI Root is receiving packet from node 4 @1:10:11.021684842
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:10:11.029130970
+DEBUG (0): LQI Root is receiving packet from node 2 @1:10:11.032564295
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 1061.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 681.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 1061.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 90 that advertises 1061.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 292.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:10:11.046142199
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:11.048418085
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:10:11.051452226
+DEBUG (0): LQI Root is receiving packet from node 1 @1:10:11.058534603
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:10:11.060678028
+DEBUG (0): LQI Root is receiving packet from node 5 @1:10:11.064104028
+DEBUG (0): LQI Root is receiving packet from node 3 @1:10:11.073961148
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:10:16.006431459
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:10:16.009979080
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:10:16.011422944
+DEBUG (0): LQI Root is receiving packet from node 1 @1:10:16.015337223
+DEBUG (0): LQI Root is receiving packet from node 2 @1:10:16.021745877
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:10:16.027377880
+DEBUG (0): LQI Root is receiving packet from node 5 @1:10:16.036472065
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:10:16.039575246
+DEBUG (0): LQI Root is receiving packet from node 3 @1:10:16.051110823
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:10:16.053104048
+DEBUG (0): LQI Root is receiving packet from node 4 @1:10:16.059894170
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:16.069673335
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:10:16.080293391
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:16.088044810
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:10:21.009113216
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:10:21.010009597
+DEBUG (0): LQI Root is receiving packet from node 4 @1:10:21.028062979
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:10:21.032104195
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:10:21.038980157
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:10:21.043388030
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:21.046815803
+DEBUG (0): LQI Root is receiving packet from node 1 @1:10:21.049638781
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:10:21.052293676
+DEBUG (0): LQI Root is receiving packet from node 5 @1:10:21.056505196
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:10:21.058723024
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:21.061265910
+DEBUG (0): LQI Root is receiving packet from node 2 @1:10:21.068056031
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 62 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 681.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 216.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 926 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 417.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 681.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 417.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 681.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 417.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 417.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 417.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 417.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:10:26.006896822
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:10:26.010059256
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:10:26.017154551
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:26.019701093
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:10:26.020761269
+DEBUG (0): LQI Root is receiving packet from node 1 @1:10:26.023943130
+DEBUG (0): LQI Root is receiving packet from node 2 @1:10:26.035829657
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:10:26.039069818
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:10:26.047553656
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:10:26.051108933
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:10:26.051988502
+DEBUG (0): LQI Root is receiving packet from node 4 @1:10:26.056357925
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:10:26.057181895
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:10:26.064094086
+DEBUG (0): LQI Root is receiving packet from node 5 @1:10:26.070777397
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:10:26.086387047
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:10:26.092521044
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:26.095328645
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:10:26.098166763
+DEBUG (0): LQI Root is receiving packet from node 3 @1:10:26.103553085
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 715.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 681.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 715.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 417.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 715.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 292.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 715.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 715.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 216.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:31.012224330
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:10:31.014938157
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:10:31.026069406
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:10:31.029651427
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:10:31.034738238
+DEBUG (0): LQI Root is receiving packet from node 1 @1:10:31.039461228
+DEBUG (0): LQI Root is receiving packet from node 2 @1:10:31.058992364
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:10:31.065707735
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:10:31.077752513
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:10:31.080127206
+DEBUG (0): LQI Root is receiving packet from node 3 @1:10:31.084802033
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:10:31.088031213
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:10:31.089846998
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:10:31.092822445
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:10:31.098315577
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:31.101229988
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:10:31.109256064
+DEBUG (0): LQI Root is receiving packet from node 4 @1:10:31.111300730
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:10:31.115267992
+DEBUG (0): LQI Root is receiving packet from node 5 @1:10:31.124011227
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:10:36.010223219
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:10:36.015247214
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:10:36.018379021
+DEBUG (0): LQI Root is receiving packet from node 1 @1:10:36.020326818
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:10:36.020959632
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:10:36.024219329
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:10:36.027702087
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:36.030580546
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:10:36.033332547
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:10:36.036836613
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:10:36.041513101
+DEBUG (0): LQI Root is receiving packet from node 2 @1:10:36.044259667
+DEBUG (0): LQI Root is receiving packet from node 5 @1:10:36.049203486
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:10:36.051675395
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:10:36.055421710
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:10:36.058480775
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:10:36.065026758
+DEBUG (0): LQI Root is receiving packet from node 4 @1:10:36.065026758
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:10:36.065026758
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:10:36.065026758
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:10:36.067407115
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:10:36.071252307
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:10:36.073998873
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:10:36.075997763
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:10:36.075997763
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:10:36.075997763
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:36.075997763
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:10:36.075997763
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:36.075997763
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:10:36.082787884
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:36.084115391
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:36.090112060
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 681.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @1:10:41.006320874
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:10:41.007400359
+DEBUG (0): LQI Root is receiving packet from node 3 @1:10:41.015067883
+DEBUG (0): LQI Root is receiving packet from node 5 @1:10:41.017440584
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:41.018190482
+DEBUG (0): LQI Root is receiving packet from node 2 @1:10:41.021981965
+DEBUG (0): LQI Root is receiving packet from node 1 @1:10:41.027177974
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:41.032320038
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 855.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 681.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 855.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 681.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 855.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 855.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 855.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 1645.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1645.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 1645.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 1645.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 1645.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 1645.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 1645.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 2065.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 1645.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 2065.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 78 that advertises 2065.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 2065.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:10:46.005409126
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:10:46.007999331
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:46.009416729
+DEBUG (0): LQI Root is receiving packet from node 1 @1:10:46.011598841
+DEBUG (0): LQI Root is receiving packet from node 3 @1:10:46.017083922
+DEBUG (0): LQI Root is receiving packet from node 2 @1:10:46.026971560
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:10:46.029085193
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:10:46.031188673
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:10:46.039687769
+DEBUG (0): LQI Root is receiving packet from node 4 @1:10:46.055383259
+DEBUG (0): LQI Root is receiving packet from node 5 @1:10:46.064248564
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:46.074838102
+DEBUG (0): LQI Root is receiving packet from node 2 @1:10:51.017297544
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:10:51.020347393
+DEBUG (0): LQI Root is receiving packet from node 1 @1:10:51.022279931
+DEBUG (0): LQI Root is receiving packet from node 3 @1:10:51.025886302
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:10:51.028686246
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:10:51.031619799
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:10:51.038913457
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:51.041368447
+DEBUG (0): LQI Root is receiving packet from node 4 @1:10:51.043048565
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:10:51.045946057
+DEBUG (0): LQI Root is receiving packet from node 5 @1:10:51.049091010
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:51.055881132
+DEBUG (0): LQI Root is receiving packet from node 1 @1:10:56.007265371
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:10:56.010593310
+DEBUG (0): LQI Root is receiving packet from node 2 @1:10:56.015252878
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:10:56.024879227
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:10:56.029359850
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:10:56.033769614
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:10:56.034728691
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:56.036294625
+DEBUG (0): LQI Root is receiving packet from node 6 @1:10:56.048455809
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:10:56.049178680
+DEBUG (0): LQI Root is receiving packet from node 3 @1:10:56.055825761
+DEBUG (0): LQI Root is receiving packet from node 5 @1:10:56.064279081
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 189.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1645.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 189.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 1645.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 189.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 189.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 189.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 189.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 980.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1645.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 980.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 1645.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 980.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 980.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 1751.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1645.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1751.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 1751.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 1751.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 1751.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 189.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:11:1.007318354
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:11:1.009445025
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:11:1.013645050
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:11:1.015901677
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:1.018099048
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:11:1.020252067
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:11:1.025810008
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:1.026476074
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:11:1.028384954
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:1.031984465
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:11:1.038352659
+DEBUG (0): LQI Root is receiving packet from node 5 @1:11:1.042436674
+DEBUG (0): LQI Root is receiving packet from node 3 @1:11:1.051225685
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:11:6.007011290
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:11:6.009859231
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:11:6.012393837
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:6.016985163
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:11:6.018222660
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:11:6.025054675
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:11:6.028131221
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:6.040895545
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:11:6.060775292
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:6.063829372
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:11:6.068780398
+DEBUG (0): LQI Root is receiving packet from node 5 @1:11:6.071962259
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:6.076066849
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:11:11.006784300
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:11:11.015292990
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:11:11.017234619
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:11.022569847
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:11:11.026550028
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:11.030916356
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:11:11.034103084
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:11.037920099
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:11:11.048723140
+DEBUG (0): LQI Root is receiving packet from node 5 @1:11:11.051500342
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:11:11.053565583
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:11:11.056398266
+DEBUG (0): LQI Root is receiving packet from node 3 @1:11:11.063102271
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:11.069755064
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1645.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 1645.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 73 that advertises 231.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1645.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 231.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 1645.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 231.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 231.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 231.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 654.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 654.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 654.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 654.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 654.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 654.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 189.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 1074.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 654.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 1074.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 1074.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 1074.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 65 that advertises 1074.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:11:16.007272578
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:11:16.009193284
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:16.009844091
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:11:16.015581244
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:16.016451108
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:11:16.035667128
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:11:16.037967418
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:11:16.038955351
+DEBUG (0): LQI Root is receiving packet from node 3 @1:11:16.041373882
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:16.046897531
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:11:16.052127492
+DEBUG (0): LQI Root is receiving packet from node 5 @1:11:16.056949241
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:11:16.058673474
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:16.063937725
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:11:21.013202548
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:11:21.021133189
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:21.036378970
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:11:21.037200601
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:11:21.040636029
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:11:21.042884493
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:21.046510747
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:11:21.047807618
+DEBUG (0): LQI Root is receiving packet from node 5 @1:11:21.064210839
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:21.070329578
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:11:21.074395599
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:11:21.079720886
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:21.083398232
+DEBUG (0): LQI Root is receiving packet from node 3 @1:11:21.089211797
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:26.007890977
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:11:26.008884336
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:11:26.014892381
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:26.021838972
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:11:26.023238890
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:11:26.026115182
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:11:26.028894156
+DEBUG (0): LQI Root is receiving packet from node 5 @1:11:26.031890573
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:11:26.034807206
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:11:26.043389921
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:11:26.054506188
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:26.056914841
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:26.063369271
+DEBUG (0): LQI Root is receiving packet from node 3 @1:11:26.072905959
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 654.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 76 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 307.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 307.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 307.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 307.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 356.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 654.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 356.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 654.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 356.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 356.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 356.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 356.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 760.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 654.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 760.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 356.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 760.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 760.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 307.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:11:31.006400942
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:11:31.007114327
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:11:31.009355694
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:11:31.015720233
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:11:31.016832457
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:11:31.021270518
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:11:31.023912494
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:11:31.025848128
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:31.040636148
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:11:31.057412666
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:11:31.060149685
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:11:31.076928544
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:11:31.087243425
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:11:31.087243425
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:31.087243425
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:11:31.087243425
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:11:31.087243425
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:11:31.087243425
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:11:31.092217761
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:11:31.098565380
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:11:31.109505868
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:11:31.112099847
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:11:31.119301953
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:11:31.124154220
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:11:31.126107334
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:11:31.131447879
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:11:31.131447879
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:31.131447879
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:11:31.131447879
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:11:31.137948085
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:11:31.143181819
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:11:31.145592694
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:11:31.152535402
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:11:31.152535402
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:11:31.152535402
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:11:31.152535402
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:11:31.159417076
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:11:31.159417076
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:11:31.159417076
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:31.159417076
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:11:31.159417076
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:11:31.159417076
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:11:36.006975337
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:36.006975337
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:11:36.006975337
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:36.009416847
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:11:36.009416847
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:11:36.009416847
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:11:36.015215153
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:36.015215153
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:11:36.015215153
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:11:36.015215153
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:11:36.015215153
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:11:36.016252745
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:11:36.019143847
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:11:36.019143847
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:36.019143847
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:11:36.019143847
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:11:36.020210065
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:36.022744900
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:11:36.022744900
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:11:36.022744900
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:11:36.023607438
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:36.024713272
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:11:36.024713272
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:11:36.024713272
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:11:36.024713272
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:11:36.028665275
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:11:36.028665275
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:11:36.028665275
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:11:36.029365285
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:11:36.032243863
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:11:36.032243863
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:36.032243863
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:11:36.032243863
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:11:36.032243863
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:11:36.033975303
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:11:41.005716191
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:41.005716191
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:11:41.005716191
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:11:41.005716191
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:11:41.006534496
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:11:41.008491384
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:11:41.008491384
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:11:41.008491384
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:11:41.008491384
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:11:41.009918045
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:11:41.011232633
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:11:41.011232633
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:11:41.013267357
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:11:41.013267357
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:11:41.015277731
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:41.015277731
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:11:41.015277731
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:11:41.015277731
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:11:41.016649471
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:11:41.016649471
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:41.018302728
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:11:41.018302728
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:11:41.019714130
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:11:41.019714130
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:11:41.019714130
+DEBUG (0): LQI Root is receiving packet from node 3 @1:11:41.022844503
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:11:41.022844503
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:11:41.023500627
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:11:41.027251928
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:11:41.027251928
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:11:41.029208924
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:11:41.029208924
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:41.029208924
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:11:41.029208924
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:11:41.029208924
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:11:41.031921090
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:11:41.031921090
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:41.031921090
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:11:41.031921090
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:11:41.033586510
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:11:41.034324363
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:11:41.034324363
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:11:41.034324363
+DEBUG (0): LQI Root is receiving packet from node 3 @1:11:41.034324363
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:11:41.034324363
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:11:41.038957572
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:41.038957572
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:11:41.038957572
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:11:41.038957572
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:11:41.040595688
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:41.040900862
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:11:41.040900862
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:11:41.041396743
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:11:41.046508408
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:41.046508408
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:11:41.046508408
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:11:41.046508408
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:11:41.049369441
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:11:41.049369441
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:11:41.049369441
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:11:41.049369441
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:41.049369441
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:11:41.053870757
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:41.053870757
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:11:41.053870757
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:11:41.054305603
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:41.055831473
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:11:41.055831473
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:11:41.055831473
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:11:41.060607446
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:11:41.060607446
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:11:41.060607446
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:41.060607446
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:11:41.060607446
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:11:41.060607446
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:11:41.065520748
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:11:41.065520748
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:11:41.065520748
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:41.065520748
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:11:41.065520748
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:11:41.065520748
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 1331.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 3375 and my cost to 1331.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 5 @1:11:46.010223219
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:46.016656679
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:46.023683732
+DEBUG (0): LQI Root is receiving packet from node 3 @1:11:46.026450873
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:46.029056337
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:11:46.035219191
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:46.045412002
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 1728.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 1728.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 106 and my cost to 1728.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 2397.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 106 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 2397.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 2397.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 77 that advertises 2397.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:11:51.010703895
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:11:51.016143595
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:51.021578031
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:11:51.024065081
+DEBUG (0): LQI Root is receiving packet from node 5 @1:11:51.028873233
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:51.030877787
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:51.037341811
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:51.060489259
+DEBUG (0): LQI Root is receiving packet from node 3 @1:11:56.005592231
+DEBUG (0): LQI Root is receiving packet from node 1 @1:11:56.007707873
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:11:56.009979080
+DEBUG (0): LQI Root is receiving packet from node 4 @1:11:56.018329471
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:11:56.023088524
+DEBUG (0): LQI Root is receiving packet from node 5 @1:11:56.046786947
+DEBUG (0): LQI Root is receiving packet from node 2 @1:11:56.053552215
+DEBUG (0): LQI Root is receiving packet from node 6 @1:11:56.057666400
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 60 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 106 and my cost to 1728.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 125.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:1.006900705
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:1.019090863
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:1.022729641
+DEBUG (0): LQI Root is receiving packet from node 1 @1:12:1.025179084
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:12:1.028548918
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:1.037574466
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:1.048952139
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:1.061128463
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:12:1.064864624
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:12:1.070586636
+DEBUG (0): LQI Root is receiving packet from node 5 @1:12:1.075530455
+DEBUG (0): LQI Root is receiving packet from node 6 @1:12:1.082686785
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 1241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 1241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 106 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 1241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1241.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 1834.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1834.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 1834.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 1834.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1834.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:12:6.006777092
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:6.007654046
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:6.010379688
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:6.011400360
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:6.013772784
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:12:6.016176333
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:6.018869190
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:6.023597497
+DEBUG (0): LQI Root is receiving packet from node 6 @1:12:6.027124147
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:12:6.030395220
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:12:6.036163009
+DEBUG (0): LQI Root is receiving packet from node 5 @1:12:6.042831061
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:11.007028439
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:11.015611880
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:11.019853680
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:12:11.033034975
+DEBUG (0): LQI Root is receiving packet from node 1 @1:12:11.034578444
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:12:11.035999046
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:11.037299809
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:12:11.048068677
+DEBUG (0): LQI Root is receiving packet from node 6 @1:12:11.053043014
+DEBUG (0): LQI Root is receiving packet from node 5 @1:12:11.057620624
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:11.066577481
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:11.073611741
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:16.016254288
+DEBUG (0): LQI Root is receiving packet from node 1 @1:12:16.019014570
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:16.024034682
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:16.027747863
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:16.031969088
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:16.033578577
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:12:16.033874204
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:12:16.047777101
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:16.051095564
+DEBUG (0): LQI Root is receiving packet from node 6 @1:12:16.057916203
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:12:16.065416158
+DEBUG (0): LQI Root is receiving packet from node 5 @1:12:16.072541971
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 61 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 125.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 159.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1155 and my cost to 159.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 159.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 159.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 159.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 159.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 854.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 854.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 854.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 854.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 854.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 159.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 854.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 854.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 125.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 1274.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 854.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 1274.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 1274.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 159.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 1274.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:12:21.009371071
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:21.011752971
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:21.018640310
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:12:21.019576802
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:12:21.026038889
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:21.028629094
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:12:21.030494429
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:21.034045932
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:21.045808729
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:21.058536146
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:21.060637964
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:12:21.067611190
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:12:21.073150098
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:12:21.081572900
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:12:21.081572900
+DEBUG (0): LQI Root is receiving packet from node 6 @1:12:21.081572900
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:21.081572900
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:12:21.081572900
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:21.088179917
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:21.090163548
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:12:21.096679013
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:12:26.007270688
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:12:26.008045107
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:12:26.009460284
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:12:26.016387734
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:12:26.016387734
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:12:26.016387734
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:12:26.016387734
+DEBUG (0): LQI Root is receiving packet from node 5 @1:12:26.020156633
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:12:26.023208373
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:12:26.027895015
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:26.034959793
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:12:26.038577766
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:26.042001379
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:12:26.043550441
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:26.047418218
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:12:26.047418218
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:26.047418218
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:26.047418218
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:26.047418218
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:26.050744614
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:26.050744614
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:26.050744614
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:26.050744614
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:12:26.054269374
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:26.054269374
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:26.054269374
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:12:26.054269374
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:26.054269374
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:26.058221377
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:26.060754322
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:12:26.064919947
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:12:26.070168939
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:12:26.070168939
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:12:26.075402674
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:26.075402674
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:26.075402674
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:12:26.075402674
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:12:26.081918138
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:12:26.081918138
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:26.081918138
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:12:26.081918138
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:26.084664704
+DEBUG (0): LQI Root is receiving packet from node 5 @1:12:26.085076689
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:12:26.091698965
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:26.094598118
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:12:26.097848221
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:12:26.097848221
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:26.097848221
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:12:26.097848221
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:12:26.097848221
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:12:31.007402699
+DEBUG (0): LQI Root is receiving packet from node 1 @1:12:31.007402699
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:12:31.007402699
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:12:31.007402699
+DEBUG (0): LQI Root is receiving packet from node 6 @1:12:31.009523540
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:12:31.009523540
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:12:31.009523540
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:12:31.009523540
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:12:31.010944260
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:12:31.012512024
+DEBUG (0): LQI Root is receiving packet from node 5 @1:12:31.012512024
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:12:31.012512024
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:12:31.012512024
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:12:31.012512024
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:31.014957298
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:12:31.014957298
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:12:31.014957298
+DEBUG (0): LQI Root is receiving packet from node 1 @1:12:31.016925671
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:12:31.016925671
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:12:31.019273849
+DEBUG (0): LQI Root is receiving packet from node 6 @1:12:31.019273849
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:12:31.019273849
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:12:31.019273849
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:12:31.019273849
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:31.032260664
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:12:31.032260664
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:12:31.033805567
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:12:31.033805567
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:12:31.040179930
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:12:31.040179930
+DEBUG (0): LQI Root is receiving packet from node 6 @1:12:31.040179930
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:12:31.040179930
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:12:31.040179930
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 61 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:12:36.008119858
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:12:36.008735523
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:12:36.008735523
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:36.010675268
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:36.010675268
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:36.010675268
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:36.010675268
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:36.015970037
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:12:36.015970037
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:12:36.016128336
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:12:36.018480397
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:12:36.018480397
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:12:36.018480397
+DEBUG (0): LQI Root is receiving packet from node 1 @1:12:36.018914966
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:12:36.020456095
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:36.020456095
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:36.020456095
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:36.020456095
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:36.025796640
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:12:36.025796640
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:12:36.027452513
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:12:36.030786235
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:36.030786235
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:12:36.030786235
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:12:36.030786235
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:36.032830901
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:36.032830901
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:36.032830901
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:36.032830901
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:36.032830901
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:12:36.036996526
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:12:36.036996526
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:12:36.036996526
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:36.036996526
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:12:36.036996526
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:41.006387573
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:41.006387573
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:12:41.007433216
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:41.008293020
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:12:41.008293020
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:12:41.010103371
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:12:41.010379688
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:41.010379688
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:41.010379688
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:12:41.013953998
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:41.013953998
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:12:41.015766010
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:41.015766010
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:41.018390506
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:41.018390506
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:41.018390506
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:12:41.018390506
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:12:41.020713602
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:41.020713602
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:12:41.020713602
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:12:41.020713602
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:41.021732161
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:12:41.021732161
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:12:41.025148567
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:12:41.025148567
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:12:41.026721756
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:41.027072706
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:12:41.027072706
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:41.028049263
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:41.028049263
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:12:41.029558331
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:41.029558331
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:12:41.030841605
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:12:41.033388265
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:41.033388265
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:41.033388265
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:41.033388265
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:12:41.035281887
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:12:41.035281887
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:12:41.035281887
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:41.036409488
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:12:41.036409488
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:41.036409488
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:12:41.037799572
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:41.039813721
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:41.039813721
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:41.040407267
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:12:41.044727022
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:12:41.044727022
+DEBUG (0): LQI Root is receiving packet from node 6 @1:12:41.044727022
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:41.044727022
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:12:41.046907473
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:41.046907473
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:41.046907473
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:41.046907473
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:41.046907473
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:41.046907473
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:41.053378705
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:12:41.053378705
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:12:41.053378705
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:46.005897405
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:12:46.005897405
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:12:46.005897405
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:12:46.005897405
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:12:46.008991147
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:12:46.008991147
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:12:46.008991147
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:46.008991147
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:46.008991147
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:46.012887780
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:46.012887780
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:46.012887780
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:46.012887780
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:12:46.014270657
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:46.014865746
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:12:46.014865746
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:12:46.014865746
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:46.017017223
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:12:46.017017223
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:12:46.017825934
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:12:46.017825934
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:12:46.017825934
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:12:46.017825934
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:46.020786122
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:12:46.020786122
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:12:46.020786122
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:12:46.020786122
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:46.022998633
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:46.022998633
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:46.022998633
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:12:46.025115710
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:46.025115710
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:46.025115710
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:12:46.025115710
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:46.026843826
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:46.028293402
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:12:46.028293402
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:12:46.028293402
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:46.032195747
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:12:46.032195747
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:46.032195747
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:46.032195747
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:46.034549469
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:46.034549469
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:12:46.034549469
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:46.034549469
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:12:46.034549469
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:12:46.038018859
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:46.038018859
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:46.038018859
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:46.038018859
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:46.038018859
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:12:46.046334850
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:12:46.046334850
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:12:46.046334850
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:12:46.046334850
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:12:46.046334850
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 926.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 3375 and my cost to 926.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 926.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 926.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 1306.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1306.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 1306.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 1306.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 1306.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 1306.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:12:51.007652155
+DEBUG (0): LQI Root is receiving packet from node 1 @1:12:51.010774872
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:51.013353474
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:12:51.017978521
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:51.021569980
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:51.028451654
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:12:51.031619799
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 1771.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @1:12:51.039148002
+DEBUG (0): LQI Root is receiving packet from node 5 @1:12:51.047851173
+DEBUG (0): LQI Root is receiving packet from node 6 @1:12:51.057870427
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:12:56.006824411
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:12:56.008943709
+DEBUG (0): LQI Root is receiving packet from node 5 @1:12:56.009338214
+DEBUG (0): LQI Root is receiving packet from node 1 @1:12:56.012499105
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:12:56.021095070
+DEBUG (0): LQI Root is receiving packet from node 2 @1:12:56.027108888
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:12:56.028154413
+DEBUG (0): LQI Root is receiving packet from node 6 @1:12:56.032602020
+DEBUG (0): LQI Root is receiving packet from node 6 @1:12:56.037698426
+DEBUG (0): LQI Root is receiving packet from node 3 @1:12:56.046319591
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:13:1.011630902
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:1.016390073
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:13:1.022249296
+DEBUG (0): LQI Root is receiving packet from node 5 @1:13:1.024352775
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:13:1.027854674
+DEBUG (0): LQI Root is receiving packet from node 4 @1:13:1.039086968
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:13:1.040254562
+DEBUG (0): LQI Root is receiving packet from node 2 @1:13:1.044870015
+DEBUG (0): LQI Root is receiving packet from node 3 @1:13:1.054254115
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:1.065896503
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 189.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 82 that advertises 189.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 189.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 189.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 189.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 1051.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1306.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 1051.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 1051.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1051.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 1051.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:6.007799425
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:13:6.012056484
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:13:6.017663753
+DEBUG (0): LQI Root is receiving packet from node 5 @1:13:6.021804572
+DEBUG (0): LQI Root is receiving packet from node 2 @1:13:6.025903451
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:13:6.026416582
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:13:6.029212698
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:13:6.036796272
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:6.040454586
+DEBUG (0): LQI Root is receiving packet from node 3 @1:13:6.045871425
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:13:6.047794021
+DEBUG (0): LQI Root is receiving packet from node 4 @1:13:6.054584142
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 1728.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1306.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1728.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 189.
+DEBUG (0): LQI Root is receiving packet from node 5 @1:13:11.012649352
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:13:11.015298654
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:13:11.016837892
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:11.018266893
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:13:11.021247657
+DEBUG (0): LQI Root is receiving packet from node 2 @1:13:11.025926761
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:13:11.028413811
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:13:11.033099893
+DEBUG (0): LQI Root is receiving packet from node 3 @1:13:11.035555000
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:13:11.040103636
+DEBUG (0): LQI Root is receiving packet from node 4 @1:13:11.045595225
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:11.054307943
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:13:16.006584046
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:16.007753649
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:13:16.011659758
+DEBUG (0): LQI Root is receiving packet from node 5 @1:13:16.015014451
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:13:16.017383432
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:13:16.021259142
+DEBUG (0): LQI Root is receiving packet from node 4 @1:13:16.023761568
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:13:16.024682755
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:16.033832310
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:13:16.039819385
+DEBUG (0): LQI Root is receiving packet from node 2 @1:13:16.042361924
+DEBUG (0): LQI Root is receiving packet from node 3 @1:13:16.048160230
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1306.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:13:21.013933304
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:13:21.016519350
+DEBUG (0): LQI Root is receiving packet from node 5 @1:13:21.022811646
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:13:21.026431841
+DEBUG (0): LQI Root is receiving packet from node 2 @1:13:21.030306008
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:21.035371896
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:21.043153833
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:13:21.044589694
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:13:21.045783646
+DEBUG (0): LQI Root is receiving packet from node 4 @1:13:21.049441960
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:13:21.051597211
+DEBUG (0): LQI Root is receiving packet from node 3 @1:13:21.061759505
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 231.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 465 and my cost to 1306.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 231.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 231.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 231.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 231.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 654.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 654.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 654.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 654.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 654.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 654.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 654.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 189.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 1323.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 654.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 1323.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 1323.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 78 that advertises 1323.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 189.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:13:26.006067141
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:13:26.011970367
+DEBUG (0): LQI Root is receiving packet from node 2 @1:13:26.018739913
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:26.024538219
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:13:26.025184401
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:13:26.032472625
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:13:26.034530328
+DEBUG (0): LQI Root is receiving packet from node 3 @1:13:26.037284550
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:13:26.043109600
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:13:26.057880022
+DEBUG (0): LQI Root is receiving packet from node 4 @1:13:26.061084349
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:13:26.062549184
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:26.075732701
+DEBUG (0): LQI Root is receiving packet from node 5 @1:13:26.083117911
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:13:31.005680009
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:13:31.011947452
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:13:31.020799719
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:13:31.021615756
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:13:31.024665606
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:13:31.039970082
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:31.044494259
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:31.053285610
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:13:31.054229310
+DEBUG (0): LQI Root is receiving packet from node 3 @1:13:31.058412533
+DEBUG (0): LQI Root is receiving packet from node 2 @1:13:31.063936182
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:31.071855448
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:13:31.076171320
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:31.086379391
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:36.007250112
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:13:36.007745598
+DEBUG (0): LQI Root is receiving packet from node 2 @1:13:36.011682342
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:13:36.020446548
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:13:36.026325030
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:13:36.027452513
+DEBUG (0): LQI Root is receiving packet from node 4 @1:13:36.033145669
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:13:36.036212668
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:13:36.043098115
+DEBUG (0): LQI Root is receiving packet from node 5 @1:13:36.046466514
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:13:36.047351519
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:13:36.050269704
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:36.054919834
+DEBUG (0): LQI Root is receiving packet from node 3 @1:13:36.059909429
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 65 that advertises 343.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 654.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 654.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 343.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 343.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 343.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 356.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 654.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 356.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 654.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 356.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 356.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 356.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 356.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 688.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 688.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 688.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 356.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 688.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 688.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 688.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 343.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:13:41.007104732
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:13:41.012865195
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:13:41.015693490
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:13:41.018386623
+DEBUG (0): LQI Root is receiving packet from node 2 @1:13:41.019808022
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:13:41.023990449
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:13:41.024856312
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:41.029054794
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:13:41.031696092
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:13:41.035239885
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:13:41.036304220
+DEBUG (0): LQI Root is receiving packet from node 3 @1:13:41.050147635
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:13:41.061038572
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:13:41.065021093
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:13:41.067645590
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:13:41.071460265
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:13:41.076159944
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:13:41.078433490
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:41.085132060
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:13:41.085818701
+DEBUG (0): LQI Root is receiving packet from node 5 @1:13:41.092273131
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:41.102938963
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:46.009310036
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:13:46.011751310
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:13:46.015207102
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:13:46.017318514
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:13:46.020988259
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:13:46.029746753
+DEBUG (0): LQI Root is receiving packet from node 2 @1:13:46.033776940
+DEBUG (0): LQI Root is receiving packet from node 3 @1:13:46.042916901
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:13:46.047427812
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:13:46.050597739
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:13:46.052661546
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:13:46.058276748
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:13:46.064105571
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:13:46.065616182
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:13:46.068347490
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:13:46.071246643
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:13:46.081897215
+DEBUG (0): LQI Root is receiving packet from node 5 @1:13:46.085360940
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:46.090426829
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:13:46.093875295
+DEBUG (0): LQI Root is receiving packet from node 4 @1:13:46.100436536
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:13:51.006626048
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:13:51.012880454
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:13:51.017785822
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:51.022402001
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:13:51.024329914
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:13:51.026397441
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:13:51.029762011
+DEBUG (0): LQI Root is receiving packet from node 2 @1:13:51.032991539
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:13:51.034957572
+DEBUG (0): LQI Root is receiving packet from node 3 @1:13:51.038683034
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:13:51.039527579
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:13:51.041030534
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:13:51.047126412
+DEBUG (0): LQI Root is receiving packet from node 4 @1:13:51.060706655
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:13:51.063415047
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:13:51.068252055
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:51.073302685
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:13:51.083587049
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:13:51.092894856
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:13:51.101973782
+DEBUG (0): LQI Root is receiving packet from node 5 @1:13:51.105620611
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 688.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 231.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 407.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 688.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 407.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 654.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 407.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 356.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 407.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 407.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 407.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 408.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 688.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 408.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 5, my link to 76 and my cost to 408.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 408.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 408.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 343.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 813.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 76 and my cost to 408.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 813.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 356.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 813.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 407.
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:13:56.008243470
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:13:56.009231403
+DEBUG (0): LQI Root is receiving packet from node 1 @1:13:56.011324185
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:13:56.014367874
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:13:56.015083142
+DEBUG (0): LQI Root is receiving packet from node 2 @1:13:56.019647384
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:13:56.020667826
+DEBUG (0): LQI Root is receiving packet from node 4 @1:13:56.026008371
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:13:56.031389257
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:13:56.039985340
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:13:56.045936233
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:13:56.048311155
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:13:56.050780844
+DEBUG (0): LQI Root is receiving packet from node 3 @1:13:56.056479995
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:13:56.059432526
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:13:56.063903326
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:13:56.066329459
+DEBUG (0): LQI Root is receiving packet from node 5 @1:13:56.069503268
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:13:56.072081989
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:13:56.080901517
+DEBUG (0): LQI Root is receiving packet from node 6 @1:13:56.086440425
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:14:1.006812927
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:14:1.010156472
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:14:1.012285365
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:14:1.014764600
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:14:1.018497317
+DEBUG (0): LQI Root is receiving packet from node 2 @1:14:1.022890279
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:14:1.025378991
+DEBUG (0): LQI Root is receiving packet from node 1 @1:14:1.028154531
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:14:1.030505914
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:14:1.033324891
+DEBUG (0): LQI Root is receiving packet from node 3 @1:14:1.036089055
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:1.038970610
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:14:1.042144419
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:1.047960324
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:14:1.050368859
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:14:1.053725773
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:14:1.066710926
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:14:1.069716890
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:14:1.083571790
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:1.087218619
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:1.094161328
+DEBUG (0): LQI Root is receiving packet from node 1 @1:14:6.008257186
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:14:6.017448240
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:14:6.018115849
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:14:6.022857423
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:14:6.037637391
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:14:6.038409920
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:14:6.041643104
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:14:6.045877089
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:14:6.049468595
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:6.051607035
+DEBUG (0): LQI Root is receiving packet from node 2 @1:14:6.055657916
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:14:6.056268264
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:14:6.058501746
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:14:6.059114315
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:6.061654585
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:14:6.065255638
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:14:6.067354013
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:6.070062129
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:14:6.071038685
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:14:6.078866398
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:14:6.084466341
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:6.084466341
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:6.084466341
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:14:6.084466341
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 62 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 688.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 76 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 407.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 532.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 688.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 532.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 532.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 532.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 532.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 4, my link to 1621 and my cost to 532.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 65534.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 0, my link to 343 and my cost to 65534.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 532.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 407.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 4, my link to 1621 and my cost to 532.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:14:11.007415618
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:14:11.007415618
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:14:11.010293801
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:14:11.010293801
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:14:11.015222361
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:14:11.018167290
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:14:11.023393698
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:14:11.025775717
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:14:11.028159848
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:14:11.033846026
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:14:11.034660054
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:14:11.038749386
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:14:11.044313376
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:14:11.046760203
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:14:11.051561259
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:11.051561259
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:14:11.051561259
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:11.051561259
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:14:11.053870757
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:11.053870757
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:14:11.053870757
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:14:11.053870757
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:14:11.058503967
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:14:11.060548633
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:14:11.062791780
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:14:11.068574709
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:14:11.068574709
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:14:11.068574709
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:11.068574709
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:14:11.068574709
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:14:11.069673335
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:14:11.073335423
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:14:11.075151209
+DEBUG (0): LQI Root is receiving packet from node 3 @1:14:11.075151209
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:14:11.075975297
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:14:11.080018852
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:14:11.080018852
+DEBUG (0): LQI Root is receiving packet from node 1 @1:14:11.080018852
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:14:11.080018852
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:14:11.082826335
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:14:11.085054223
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:14:11.085054223
+DEBUG (0): LQI Root is receiving packet from node 1 @1:14:11.085054223
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:14:11.085054223
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:14:11.085054223
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:14:11.089067261
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:14:11.092790384
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:14:11.092790384
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:14:11.092790384
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:14:11.093431250
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:14:11.097505204
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:14:11.102784714
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:14:11.102784714
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:14:11.102784714
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:14:11.102784714
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:14:11.102784714
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:14:11.107774309
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:14:11.109040781
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:14:11.109498542
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:16.009185627
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:14:16.009185627
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:14:16.009185627
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:14:16.009185627
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:14:16.010766820
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:14:16.012241250
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:16.012241250
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:14:16.012241250
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:14:16.017719123
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:16.017719123
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:14:16.017719123
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:14:16.017719123
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:14:16.019000854
+DEBUG (0): LQI Root is receiving packet from node 2 @1:14:16.019922040
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:14:16.019922040
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:14:16.021396470
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:14:16.023959931
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:16.023959931
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:14:16.023959931
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:14:16.023959931
+DEBUG (0): LQI Root is receiving packet from node 2 @1:14:16.025857675
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:14:16.025857675
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:14:16.025857675
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:14:16.025857675
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:14:16.029361511
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:14:16.029361511
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:14:16.029361511
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:16.029361511
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:14:16.029361511
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:14:16.030893046
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:14:16.033649206
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:16.033649206
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:14:16.033649206
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:14:16.033649206
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:14:16.034702056
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:14:16.042880719
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:14:16.042880719
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:14:16.042880719
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:14:16.042880719
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:14:16.044864350
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:14:16.044864350
+DEBUG (0): LQI Root is receiving packet from node 2 @1:14:16.044864350
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:14:16.044864350
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:14:21.009372614
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:21.009372614
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:14:21.009372614
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:21.011858121
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:21.011858121
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:14:21.011858121
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:14:21.011858121
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:14:21.012765710
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:14:21.017183407
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:21.017183407
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:14:21.017183407
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:14:21.017183407
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:21.017183407
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:21.019548506
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:14:21.019548506
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:14:21.019991008
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:14:21.021661532
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:21.021661532
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:14:21.021661532
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:14:21.024370255
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:21.024370255
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:21.024370255
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:14:21.024370255
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:14:21.024370255
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:14:21.028146480
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:14:21.028146480
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:14:21.029771835
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:14:21.030481061
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:21.030481061
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:14:21.030481061
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:14:21.030481061
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:14:21.034799273
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:14:21.034799273
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:14:21.034799273
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:14:21.034799273
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:14:21.038964898
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:21.038964898
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:14:21.038964898
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:14:21.038964898
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 5355 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 1518.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 5355 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1518.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:26.007873379
+DEBUG (0): LQI Root is receiving packet from node 2 @1:14:26.009958109
+DEBUG (0): LQI Root is receiving packet from node 3 @1:14:26.015205212
+DEBUG (0): LQI Root is receiving packet from node 1 @1:14:26.021471220
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:26.024829677
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:26.046113903
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 2071.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 2071.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 2071.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 2071.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 2071.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 2632.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 2632.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 2632.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 77 that advertises 2632.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:14:31.014198137
+DEBUG (0): LQI Root is receiving packet from node 1 @1:14:31.018648361
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:31.021285776
+DEBUG (0): LQI Root is receiving packet from node 2 @1:14:31.026681644
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:31.032932047
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:31.036363593
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:31.041871984
+DEBUG (0): LQI Root is receiving packet from node 1 @1:14:36.011904015
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:36.016727308
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:36.022262333
+DEBUG (0): LQI Root is receiving packet from node 3 @1:14:36.025901560
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:36.028871572
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:36.034852982
+DEBUG (0): LQI Root is receiving packet from node 2 @1:14:36.043252593
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 216.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:14:41.007913443
+DEBUG (0): LQI Root is receiving packet from node 1 @1:14:41.009859350
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:41.012557800
+DEBUG (0): LQI Root is receiving packet from node 3 @1:14:41.014472794
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:14:41.016040666
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:41.018495656
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:41.026065632
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:14:41.030107526
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:41.035936350
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 1950.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 1950.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 1950.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1950.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 77 that advertises 1950.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1950.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2071.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1950.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 1950.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 1950.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:14:46.009615210
+DEBUG (0): LQI Root is receiving packet from node 3 @1:14:46.014137103
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:14:46.016345840
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:46.017900566
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:46.021545174
+DEBUG (0): LQI Root is receiving packet from node 2 @1:14:46.024377581
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:46.028323920
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:14:46.043168974
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:46.051912209
+DEBUG (0): LQI Root is receiving packet from node 3 @1:14:51.006996031
+DEBUG (0): LQI Root is receiving packet from node 1 @1:14:51.009584693
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:51.019716352
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:14:51.023593723
+DEBUG (0): LQI Root is receiving packet from node 2 @1:14:51.026895266
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:14:51.028934268
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:51.031448071
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:51.042041491
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:51.048740060
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:14:56.006442944
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:14:56.010728977
+DEBUG (0): LQI Root is receiving packet from node 1 @1:14:56.011568324
+DEBUG (0): LQI Root is receiving packet from node 2 @1:14:56.015039256
+DEBUG (0): LQI Root is receiving packet from node 3 @1:14:56.018028071
+DEBUG (0): LQI Root is receiving packet from node 4 @1:14:56.020677768
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:14:56.021226963
+DEBUG (0): LQI Root is receiving packet from node 6 @1:14:56.029222522
+DEBUG (0): LQI Root is receiving packet from node 5 @1:14:56.033782652
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 111 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 790.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 790.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 790.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 790.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 790.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 790.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 777.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 777.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 777.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 777.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 777.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 777.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 777.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 1567.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 777.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 1567.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 1567.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 1567.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 62 that advertises 1567.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:15:1.011934415
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:1.016610902
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:1.021194224
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:1.028022520
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:15:1.031497729
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:1.034166459
+DEBUG (0): LQI Root is receiving packet from node 4 @1:15:1.040727700
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:15:1.041843128
+DEBUG (0): LQI Root is receiving packet from node 6 @1:15:1.047931349
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:1.048495921
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:1.054584142
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:1.060996570
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:6.009208542
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:15:6.010378027
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:6.012725646
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:6.020791786
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:6.027261475
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:6.031786102
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:15:6.032962564
+DEBUG (0): LQI Root is receiving packet from node 4 @1:15:6.039127079
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:15:6.045886683
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:6.057071310
+DEBUG (0): LQI Root is receiving packet from node 6 @1:15:6.064822730
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:6.071689145
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:11.011614100
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:15:11.015428657
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:11.028877007
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:11.033761681
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:15:11.042560287
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:11.047357183
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:15:11.063129014
+DEBUG (0): LQI Root is receiving packet from node 6 @1:15:11.066241789
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:11.069991547
+DEBUG (0): LQI Root is receiving packet from node 4 @1:15:11.075366492
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:11.076247614
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:11.081023587
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 106.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 777.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 74 that advertises 106.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 106.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 106.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 106.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 106.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 915.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 777.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 915.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 777.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 915.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 106.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 915.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 106.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 841.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 243 and my cost to 841.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 841.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 106.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 841.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 841.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 106.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:15:16.006336133
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:16.010011937
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:16.011611761
+DEBUG (0): LQI Root is receiving packet from node 4 @1:15:16.016176451
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:16.017150669
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:15:16.023629904
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:15:16.027284667
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:16.030029012
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:15:16.035509106
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:16.044761313
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:15:16.053611359
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:16.056396045
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:15:16.059221126
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:16.062209610
+DEBUG (0): LQI Root is receiving packet from node 6 @1:15:16.068862403
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:21.008501325
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:21.013999774
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:15:21.019121262
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:15:21.022912746
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:15:21.025867269
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:21.028878897
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:15:21.031768503
+DEBUG (0): LQI Root is receiving packet from node 4 @1:15:21.036554023
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:15:21.039336819
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:15:21.043435697
+DEBUG (0): LQI Root is receiving packet from node 6 @1:15:21.048492039
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:21.053786807
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:21.071517417
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:21.072066730
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:21.081023587
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:26.009422164
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:26.011690394
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:15:26.015649604
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:15:26.022348174
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:26.025384655
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:15:26.029041079
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:26.033670129
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:15:26.038713433
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:26.041778211
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:15:26.047271343
+DEBUG (0): LQI Root is receiving packet from node 4 @1:15:26.048196411
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:26.049941615
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:26.058105020
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:15:26.060134427
+DEBUG (0): LQI Root is receiving packet from node 6 @1:15:26.068603005
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 777.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 106.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 170.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 243 and my cost to 841.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 170.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 777.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 170.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 512 and my cost to 170.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 170.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 170.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 170.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 682.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 243 and my cost to 841.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 108 that advertises 682.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 4, my link to 165 and my cost to 682.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 682.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 170.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 682.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 682.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 106.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:31.008033623
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:15:31.015779607
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:15:31.016824524
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:15:31.023233178
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:15:31.026733132
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:15:31.030002377
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:31.030837723
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:31.032411708
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:31.041338048
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:15:31.044070898
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:31.046861697
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:15:31.049823428
+DEBUG (0): LQI Root is receiving packet from node 4 @1:15:31.055101395
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:15:31.056750878
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:15:31.058581922
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:31.066272307
+DEBUG (0): LQI Root is receiving packet from node 6 @1:15:31.069720773
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:31.078677630
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:36.005647948
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:15:36.008791122
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:36.016647132
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:36.019950667
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:15:36.025079481
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:36.030450543
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:15:36.032754607
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:15:36.039764062
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:15:36.045383146
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:36.049432366
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:15:36.052264820
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:15:36.054141640
+DEBUG (0): LQI Root is receiving packet from node 4 @1:15:36.062289786
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:15:36.072497856
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:15:36.080172982
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:15:36.089435013
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:15:36.089435013
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:15:36.089435013
+DEBUG (0): LQI Root is receiving packet from node 6 @1:15:36.089435013
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:15:36.089435013
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:15:36.089435013
+DEBUG (0): LQI Root is receiving packet from node 6 @1:15:36.095157026
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:15:36.098895407
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:15:36.104220693
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:15:41.007135250
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:15:41.007135250
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:41.007135250
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:15:41.007135250
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:15:41.007135250
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:15:41.011199776
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:41.011199776
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:15:41.011875041
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:41.013292557
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:15:41.019592061
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:15:41.019592061
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:15:41.019592061
+DEBUG (0): LQI Root is receiving packet from node 4 @1:15:41.019592061
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:15:41.019592061
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:15:41.019592061
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:41.022910855
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:15:41.025192004
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:15:41.025192004
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:15:41.025192004
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:15:41.025192004
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:15:41.029174524
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:15:41.029174524
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:15:41.029174524
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:41.031541962
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:15:41.034700395
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:15:41.036422407
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:15:41.037398964
+DEBUG (0): LQI Root is receiving packet from node 4 @1:15:41.038316825
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:15:41.043281220
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:15:41.043428371
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:15:41.050651172
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:15:46.009052182
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:15:46.009905126
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:15:46.011504950
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:46.011504950
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:15:46.011504950
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:15:46.016898927
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:15:46.016898927
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:46.016898927
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:15:46.016898927
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:15:46.018190600
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:46.019302145
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:46.019302145
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:15:46.019454732
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:15:46.020110857
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:46.022178437
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:46.022178437
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:15:46.022178437
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:46.022178437
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:15:46.022178437
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:15:46.023925532
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:46.024581656
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:15:46.024581656
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:15:46.024970780
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:15:46.026015973
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:15:46.026015973
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:46.028228485
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:15:46.028228485
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:15:46.028228485
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:46.028228485
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:15:46.028228485
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:15:46.028228485
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:15:46.030997966
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:15:46.030997966
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:15:46.030997966
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:46.030997966
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:46.033279115
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:46.033279115
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:15:46.033279115
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:15:46.033279115
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:15:46.033279115
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:46.033279115
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:46.035957044
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:15:46.035957044
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:15:46.036506357
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:46.036506357
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:46.038741729
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:15:46.038741729
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:46.038741729
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:15:46.038741729
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:15:46.038741729
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:15:46.044051757
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:46.044051757
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:46.044051757
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:15:46.044051757
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:15:46.044051757
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:15:46.047744362
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:15:46.047744362
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:15:46.047744362
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:46.047744362
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:46.047744362
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:51.007394648
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:15:51.007394648
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:15:51.008365540
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:15:51.009734941
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:51.009734941
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:51.009734941
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:15:51.012714270
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:15:51.012714270
+DEBUG (0): LQI Root is receiving packet from node 4 @1:15:51.012714270
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:15:51.012714270
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:15:51.012714270
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:15:51.015701092
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:15:51.015701092
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:51.015701092
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:51.015701092
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:15:51.015701092
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:15:51.019244993
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:15:51.019244993
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:15:51.020156633
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:15:51.021209483
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:51.021209483
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:51.021209483
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:15:51.022388285
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:15:51.022388285
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:15:51.024230706
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:15:51.024230706
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:15:51.026094606
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:15:51.026094606
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:51.027240552
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:15:51.027240552
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:15:51.028686246
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:15:51.028686246
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:15:51.028686246
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:15:51.031709808
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:51.031709808
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:15:51.031709808
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:15:51.031709808
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:15:51.035966985
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:51.035966985
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:51.035966985
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:15:51.035966985
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:15:51.035966985
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:15:51.035966985
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:15:51.038650177
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:15:51.038650177
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:15:51.038650177
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:15:51.038650177
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:51.039903730
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:15:51.039903730
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:15:51.042453476
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:15:51.042453476
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:15:51.042453476
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:15:51.042453476
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:51.042453476
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:51.042453476
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:15:51.045592886
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:15:51.045592886
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:15:51.045592886
+DEBUG (0): LQI Root is receiving packet from node 4 @1:15:51.045592886
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:15:51.046111681
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:15:51.046111681
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:15:51.052219044
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:15:51.052219044
+DEBUG (0): LQI Root is receiving packet from node 5 @1:15:51.052219044
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:15:51.052219044
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:15:51.052219044
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:15:56.006936887
+DEBUG (0): LQI Root is receiving packet from node 2 @1:15:56.006936887
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:15:56.006936887
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:15:56.010017254
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:56.010017254
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:56.010017254
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:15:56.010017254
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:15:56.010017254
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:56.011995568
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:15:56.011995568
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:15:56.011995568
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:15:56.015479868
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:15:56.015479868
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:15:56.015479868
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:15:56.015479868
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:56.017860225
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:15:56.017860225
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:15:56.017860225
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:15:56.022361542
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:15:56.022361542
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:15:56.022361542
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:56.022361542
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:15:56.022361542
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:15:56.025535351
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:56.025535351
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:15:56.025535351
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:15:56.025535351
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:15:56.026908634
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:15:56.026908634
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:15:56.029131088
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:15:56.029131088
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:15:56.029131088
+DEBUG (0): LQI Root is receiving packet from node 3 @1:15:56.029131088
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:15:56.036546816
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:15:56.036546816
+DEBUG (0): LQI Root is receiving packet from node 1 @1:15:56.036546816
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:15:56.036546816
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:15:56.036546816
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 5355 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:1.007478992
+DEBUG (0): LQI Root is receiving packet from node 2 @1:16:1.009561383
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:1.018282034
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:1.023994223
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 926.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 5355 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 926.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1423 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 926.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 1391.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1391.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 1391.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1391.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 1391.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 1391.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 1391.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 104 that advertises 2181.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1391.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 2181.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 2181.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:6.008104599
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:16:6.014514796
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:16:6.017320736
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:16:6.021059117
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:6.025420884
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:16:6.029845907
+DEBUG (0): LQI Root is receiving packet from node 2 @1:16:6.047753909
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:16:6.053412996
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:6.063577181
+DEBUG (0): LQI Root is receiving packet from node 5 @1:16:6.070870840
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:6.094765964
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:16:11.007448357
+DEBUG (0): LQI Root is receiving packet from node 2 @1:16:11.017541683
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:16:11.025352247
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:11.028106415
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:16:11.030536431
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:11.035738105
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:11.040076893
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:11.044425622
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:16:11.047336260
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:16:11.055331819
+DEBUG (0): LQI Root is receiving packet from node 5 @1:16:11.069217236
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:11.076388825
+DEBUG (0): LQI Root is receiving packet from node 2 @1:16:16.008554309
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:16:16.013507722
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:16.018053272
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:16.019973528
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:16.022113629
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:16:16.023238890
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:16:16.024080340
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:16:16.027137515
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:16:16.040620771
+DEBUG (0): LQI Root is receiving packet from node 5 @1:16:16.047698586
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:16.051833694
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:16.058227089
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 69 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1391.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 307.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 307.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 76 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 1051.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1391.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 1051.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1391.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 1051.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1051.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 1051.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 1535.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1391.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1535.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 1535.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 78 that advertises 1535.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1535.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 307.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:16:21.007699822
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:16:21.012544763
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:16:21.016456425
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:16:21.022758268
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:21.026933835
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:21.030334186
+DEBUG (0): LQI Root is receiving packet from node 5 @1:16:21.038988208
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:21.044176166
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:21.052035939
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:16:21.059222787
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:21.064227641
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:21.066501187
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:16:21.073108204
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:16:21.078799699
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:21.084720075
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:16:21.084720075
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:16:21.084720075
+DEBUG (0): LQI Root is receiving packet from node 5 @1:16:21.084720075
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:16:21.093615897
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:16:21.094302538
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:16:26.007806633
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:26.011461513
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:16:26.011461513
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:16:26.015159435
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:16:26.021339209
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:16:26.021339209
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:26.021339209
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:16:26.021339209
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:16:26.025072155
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:16:26.027717346
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:26.030418135
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:16:26.030418135
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:16:26.030418135
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:26.034074788
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:16:26.034074788
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:16:26.034074788
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:16:26.034074788
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:16:26.035422989
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:16:26.039064383
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:26.039064383
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:16:26.039064383
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:16:26.039064383
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:16:26.039064383
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:16:26.042238193
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:16:26.045045794
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:26.045045794
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:16:26.045045794
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:16:26.045045794
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:16:26.047395633
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:16:26.052308935
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:16:26.052308935
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:16:26.052308935
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:16:26.052308935
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:16:26.052308935
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:16:26.055208088
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:16:26.055208088
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:26.057527410
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:16:26.057527410
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:16:26.057527410
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:16:26.057527410
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:16:26.058915952
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:16:26.063643928
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:26.063643928
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:16:26.064287014
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:16:26.064287014
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:16:26.067369272
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:16:26.067369272
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:16:26.067369272
+DEBUG (0): LQI Root is receiving packet from node 2 @1:16:26.067369272
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:16:26.070434049
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:16:26.070434049
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:16:26.070434049
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:16:26.075364831
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:16:26.075364831
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:16:26.075364831
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:16:26.075364831
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:16:26.075364831
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:16:26.078523381
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:26.078523381
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:16:26.078566936
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:16:26.080796928
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:16:26.080796928
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:26.080796928
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:16:26.082473163
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:16:26.082473163
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:26.083924961
+DEBUG (0): LQI Root is receiving packet from node 5 @1:16:26.083924961
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:16:26.083924961
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:16:26.087539052
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:16:26.087539052
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:26.087539052
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:16:26.087539052
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:16:26.087539052
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:16:26.088408798
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:16:26.096358580
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:16:26.096358580
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:16:26.096358580
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:26.096358580
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:16:26.096358580
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:16:26.096358580
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:16:31.007219595
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:16:31.007219595
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:31.007219595
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:16:31.007219595
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:16:31.007219595
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:16:31.007219595
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:16:31.009658647
+DEBUG (0): LQI Root is receiving packet from node 5 @1:16:31.009658647
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:16:31.010272878
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:31.011919156
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:16:31.011919156
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:16:31.011919156
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:16:31.011919156
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:16:31.011919156
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:31.014972557
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:16:31.014972557
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:16:31.014972557
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:16:31.016128336
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:31.016959962
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:16:31.016959962
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:16:31.016959962
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:31.021944122
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:16:31.021944122
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:16:31.021944122
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:16:31.025222521
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:31.025222521
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:16:31.025222521
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:16:31.025222521
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:16:31.030578325
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:16:31.030578325
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:16:31.030578325
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:31.030578325
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:16:31.030578325
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:16:31.033279115
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:16:31.033279115
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:16:31.033279115
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:31.033279115
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:16:31.035720507
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:31.035720507
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:16:31.035720507
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:16:31.037261635
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:16:31.037261635
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:16:31.041335708
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:16:31.041335708
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:16:31.041335708
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:31.041335708
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:16:31.041335708
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:16:31.042205454
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 926.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 926.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 926.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 420 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 1346.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1346.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 1346.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 1346.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 1346.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 3545.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1346.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 3545.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 420 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 3545.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 59 that advertises 3545.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:36.006233096
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:36.014879462
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:36.017318514
+DEBUG (0): LQI Root is receiving packet from node 2 @1:16:36.019891523
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:16:36.020664052
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:36.022920679
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:16:36.028217109
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:36.030902640
+DEBUG (0): LQI Root is receiving packet from node 5 @1:16:36.041721058
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:41.017870049
+DEBUG (0): LQI Root is receiving packet from node 2 @1:16:41.020410319
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:41.029436262
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:41.031615916
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:41.035712904
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:16:41.045871425
+DEBUG (0): LQI Root is receiving packet from node 5 @1:16:41.060046757
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:16:41.062671253
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:41.068576370
+DEBUG (0): LQI Root is receiving packet from node 2 @1:16:46.006418091
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:46.022981832
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:16:46.037921642
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:46.045856166
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:46.048141088
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:46.057212413
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:46.059678887
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:16:46.066848255
+DEBUG (0): LQI Root is receiving packet from node 5 @1:16:46.072875441
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 59 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1346.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1346.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1331.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 1422.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 1422.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1422.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 1422.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 1422.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 1422.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:16:51.010257619
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:51.015258590
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:16:51.025362071
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:51.030290749
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:16:51.034103084
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:51.039588614
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:16:51.042222934
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:16:51.050554184
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:16:51.053857389
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:51.058778742
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:51.067933962
+DEBUG (0): LQI Root is receiving packet from node 5 @1:16:51.076951854
+DEBUG (0): LQI Root is receiving packet from node 1 @1:16:56.007234853
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:16:56.009652935
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:16:56.012788902
+DEBUG (0): LQI Root is receiving packet from node 2 @1:16:56.019387986
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:16:56.025440025
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:16:56.026977272
+DEBUG (0): LQI Root is receiving packet from node 3 @1:16:56.027808898
+DEBUG (0): LQI Root is receiving packet from node 4 @1:16:56.031085744
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:16:56.033889463
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:16:56.042708991
+DEBUG (0): LQI Root is receiving packet from node 6 @1:16:56.048125830
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:16:56.055724662
+DEBUG (0): LQI Root is receiving packet from node 5 @1:16:56.060531153
+DEBUG (0): LQI Root is receiving packet from node 3 @1:17:1.006400942
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:1.010973235
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:1.018739795
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:1.021163707
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:17:1.033740758
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:1.035155935
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:1.045520475
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:17:1.053088790
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:1.055947831
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:1.060016240
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:1.065738252
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:17:1.066745326
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:1.075992098
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 1422.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 111 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 250.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1346.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 250.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 250.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 250.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:17:6.009082699
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:6.011352363
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:6.017503958
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:6.023805683
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:6.030290631
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:17:6.032882388
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:6.037477597
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:6.039102226
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:6.044074672
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:6.044603410
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:17:6.048080054
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:17:6.050132376
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:6.054643634
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:6.064653341
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 637.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 125 and my cost to 1422.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 637.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 637.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 637.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 637.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 96 that advertises 637.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 125.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 1547.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 637.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 1547.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 1547.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 250.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 66 that advertises 1547.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:11.008165516
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:11.010195041
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:11.014749341
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:11.023034815
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:11.027389256
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:17:11.030078670
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:11.038390779
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:11.040729243
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:11.043204926
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:11.043765724
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:17:11.051078415
+DEBUG (0): LQI Root is receiving packet from node 3 @1:17:11.058570437
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:17:11.061038572
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:17:11.069064649
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:11.073733811
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:11.073733811
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:11.073733811
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:11.073733811
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:17:11.073733811
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:11.079074356
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:17:11.084338607
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:17:16.007631579
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:17:16.007631579
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:16.007631579
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:17:16.007631579
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:17:16.010028738
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:17:16.010028738
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:16.012672267
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:17:16.017572201
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:17:16.018100591
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:17:16.022912746
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:17:16.022912746
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:17:16.022912746
+DEBUG (0): LQI Root is receiving packet from node 3 @1:17:16.022912746
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:17:16.022912746
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:17:16.023643273
+DEBUG (0): LQI Root is receiving packet from node 3 @1:17:16.027551390
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:17:16.029062002
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:16.029062002
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:17:16.033197109
+DEBUG (0): LQI Root is receiving packet from node 3 @1:17:16.033197109
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:17:16.033197109
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:17:16.033197109
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:17:16.033836084
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:17:16.042670872
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:16.047899171
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:17:16.053529631
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:16.053529631
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:17:16.053529631
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:16.053529631
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:17:16.053529631
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:16.057181895
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:17:16.058610778
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:16.061448896
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:17:16.061448896
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:17:16.061448896
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:16.061448896
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:17:16.062684851
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:16.063905547
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:16.063905547
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:16.063905547
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:16.065238489
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:16.071067312
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:16.073106543
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:17:16.073106543
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:16.073106543
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:16.073106543
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:17:16.073106543
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 67 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 69 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 82 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:21.006685422
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:21.006685422
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:21.006685422
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:17:21.008884336
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:17:21.008884336
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:17:21.008884336
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:17:21.008884336
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:17:21.011840641
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:17:21.011840641
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:21.011840641
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:17:21.016601356
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:17:21.016601356
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:17:21.016601356
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:17:21.017200327
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:21.017200327
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:17:21.018640310
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:17:21.018640310
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:21.018640310
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:17:21.019531026
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:21.019531026
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:17:21.021728279
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:17:21.021728279
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:21.021728279
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:21.021728279
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:17:21.022903199
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:21.022903199
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:21.025623130
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:17:21.025623130
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:17:21.026340289
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:17:21.026340289
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:17:21.027978634
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:21.027978634
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:17:21.027978634
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:21.029617027
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:21.030475396
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:17:21.030475396
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:17:21.031142897
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:21.032001266
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:17:21.032001266
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:21.035247487
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:21.035247487
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:21.035247487
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:17:21.035247487
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:17:21.036462471
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:21.037814831
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:21.037814831
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:17:21.039016386
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:17:21.039016386
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:17:21.040454586
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:21.040454586
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:17:21.040454586
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:17:21.040454586
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:21.045520475
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:21.045520475
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:21.045520475
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 77 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:17:26.007890977
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:26.007890977
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:26.009973368
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:17:26.009973368
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:26.012359437
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:26.012359437
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:17:26.012359437
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:17:26.012359437
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:17:26.012359437
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:17:26.012359437
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:17:26.017287997
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:17:26.017287997
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:26.017287997
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:26.017287997
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:17:26.018005156
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:17:26.020599135
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:26.020599135
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:17:26.020599135
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:17:26.020599135
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:17:26.023345701
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:26.023345701
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:26.023345701
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:17:26.023345701
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:17:26.023345701
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:17:26.023345701
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:17:26.028579435
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:26.028579435
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:17:26.028579435
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:26.028579435
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:17:26.028579435
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:26.029800131
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:17:26.031633396
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:26.031633396
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:17:26.031633396
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:26.035278004
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:17:26.035278004
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:26.035278004
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:17:26.035278004
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:26.036452924
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:17:26.037856725
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:17:26.037856725
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:26.037856725
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:17:26.037856725
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:26.037856725
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:17:26.041673621
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:17:26.041673621
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:26.041673621
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:26.041673621
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:17:26.041673621
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:17:26.045623403
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:26.045623403
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:26.045623403
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:26.045623403
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:17:26.045623403
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:17:26.053771549
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:17:26.053771549
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:26.053771549
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:26.053771549
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:26.053771549
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:17:26.053771549
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:17:31.007028439
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:17:31.007524769
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:31.007524769
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:17:31.009269577
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:17:31.009269577
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:17:31.009269577
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:31.012788902
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:31.012788902
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:17:31.012788902
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:17:31.016105475
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:17:31.016105475
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:17:31.016105475
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:17:31.016105475
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:17:31.017076715
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:31.018892382
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:17:31.018892382
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:17:31.019973528
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:17:31.022142485
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:31.022142485
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:17:31.022142485
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:17:31.022142485
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:17:31.024614513
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:31.024614513
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:17:31.025148449
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:31.025148449
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:17:31.026809426
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:17:31.028251400
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:17:31.028251400
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:17:31.028251400
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:17:31.029405626
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:31.029405626
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:31.032503260
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:31.032503260
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:31.032503260
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:17:31.032503260
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:17:31.032503260
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:17:31.033052574
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:17:31.035509106
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:31.035509106
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:31.035509106
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:17:31.035509106
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:31.035509106
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:17:31.037070929
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:31.039827436
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:31.041841585
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:17:31.041841585
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:17:31.041841585
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:17:31.041841585
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:31.044878066
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:17:31.044878066
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:17:31.044878066
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:31.044878066
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:17:31.044878066
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:17:31.047670290
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:17:31.047670290
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:31.047670290
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:17:31.047670290
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:17:31.047670290
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:17:31.050981546
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:31.050981546
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:17:31.050981546
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:17:31.050981546
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:17:31.054872515
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:17:31.054872515
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:31.054872515
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:31.054872515
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:31.054872515
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:36.006534496
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:17:36.006534496
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:17:36.006534496
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:36.007333613
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:36.008445607
+DEBUG (0): LQI Root is receiving packet from node 3 @1:17:36.008445607
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:17:36.008445607
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:17:36.009264142
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:36.009264142
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:17:36.011520208
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:36.011520208
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:36.011520208
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:17:36.011520208
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:17:36.012641750
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:17:36.012641750
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:17:36.014093217
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:36.014093217
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:17:36.015123483
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:17:36.015123483
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:36.016389955
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:36.016389955
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:17:36.016389955
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:17:36.020309220
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:36.020309220
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:17:36.020309220
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:17:36.020309220
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:17:36.020957741
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:36.022973780
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:36.022973780
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:17:36.022973780
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:17:36.023805683
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:17:36.026656839
+DEBUG (0): LQI Root is receiving packet from node 3 @1:17:36.026656839
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:17:36.026656839
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:17:36.026656839
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:36.026656839
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:17:36.029473987
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:36.029473987
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:17:36.029473987
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:17:36.029473987
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:17:36.029473987
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:36.031862277
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:17:36.031862277
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:36.031862277
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:17:36.031862277
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:36.032060640
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:17:36.034890825
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:36.034890825
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:17:36.034890825
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:17:36.034890825
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:36.035918870
+DEBUG (0): LQI Root is receiving packet from node 3 @1:17:36.037767394
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:17:36.037767394
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:17:36.038003600
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:17:36.044091821
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:36.044091821
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:36.044091821
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:17:36.044885274
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:17:36.044885274
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:17:36.044885274
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:36.046838387
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:17:36.046838387
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:17:36.046838387
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:17:36.046838387
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:17:36.046838387
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:17:36.049163421
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:36.049163421
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:17:36.049163421
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:36.049163421
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:17:36.050851425
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:17:36.056924388
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:36.056924388
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:36.056924388
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:36.056924388
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:17:36.056924388
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:36.057570965
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:17:36.063821320
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:36.063821320
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:36.063821320
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:36.063821320
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:17:36.063821320
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:17:36.069009278
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:17:36.069009278
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:36.069009278
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 62 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4913 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 68 that advertises 790.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4913 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 790.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 790.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 790.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 790.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 1519.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1519.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 1519.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1519.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 1519.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 1519.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 1519.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 2309.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1519.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 2309.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 2309.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 73 that advertises 2309.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:41.006616454
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:41.009233743
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:41.011581243
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:17:41.014377468
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:41.018037895
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:41.023242773
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:41.029243216
+DEBUG (0): LQI Root is receiving packet from node 3 @1:17:41.033820826
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:17:41.042361924
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:41.050708433
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:41.051196711
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:41.061481075
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:17:46.007068551
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:46.008575279
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:17:46.014480396
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:46.018655568
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:46.024324597
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:46.026574834
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:46.028236141
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:46.033128749
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:46.041375773
+DEBUG (0): LQI Root is receiving packet from node 3 @1:17:46.049768058
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:46.052934542
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:46.062013468
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:51.007524650
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:51.009790264
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:51.012496765
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:17:51.015430318
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:51.015978088
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:51.017936519
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:17:51.021289659
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:17:51.030200740
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:51.034961454
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:51.040393551
+DEBUG (0): LQI Root is receiving packet from node 3 @1:17:51.044025122
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1519.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 915.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1519.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 915.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1519.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 915.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 915.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 915.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 1663.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1519.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1663.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 1663.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 1663.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 1663.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:17:56.007311147
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:17:56.010181325
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:17:56.015313913
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:17:56.018256952
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:17:56.021440585
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:17:56.024566397
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:17:56.029359850
+DEBUG (0): LQI Root is receiving packet from node 4 @1:17:56.042056750
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:17:56.045417438
+DEBUG (0): LQI Root is receiving packet from node 2 @1:17:56.048190747
+DEBUG (0): LQI Root is receiving packet from node 6 @1:17:56.061526851
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:17:56.062974766
+DEBUG (0): LQI Root is receiving packet from node 5 @1:17:56.071855330
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:18:1.005725785
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:1.009767679
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:18:1.011764348
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:1.017137750
+DEBUG (0): LQI Root is receiving packet from node 1 @1:18:1.024675547
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:18:1.030358991
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:1.042197852
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:18:1.043886132
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:1.046914681
+DEBUG (0): LQI Root is receiving packet from node 6 @1:18:1.057000681
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:1.059470700
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:18:1.082170211
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:1.084861177
+DEBUG (0): LQI Root is receiving packet from node 5 @1:18:1.093756999
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:6.005363350
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:18:6.008819419
+DEBUG (0): LQI Root is receiving packet from node 1 @1:18:6.011339444
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:18:6.021884748
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:18:6.024621720
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:6.031007790
+DEBUG (0): LQI Root is receiving packet from node 5 @1:18:6.035648096
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:18:6.037280777
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:6.039483694
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:6.052173268
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:18:6.072284234
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:6.076861844
+DEBUG (0): LQI Root is receiving packet from node 6 @1:18:6.092471494
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1519.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1519.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 215.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1519.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 215.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 215.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 215.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 215.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 737.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 737.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 737.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 737.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 737.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 215.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 737.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 737.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:11.009757856
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:18:11.013498128
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:18:11.015643940
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:11.016695129
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:18:11.021684724
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:18:11.022475955
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:18:11.030685136
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:11.040918012
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 1406.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 737.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:18:11.050355939
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:11.060533492
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:11.069032588
+DEBUG (0): LQI Root is receiving packet from node 5 @1:18:11.074251064
+DEBUG (0): LQI Root is receiving packet from node 1 @1:18:16.008074082
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:16.010795447
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:18:16.013229183
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:16.015169259
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:18:16.018863526
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:16.021814119
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:16.026035115
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:16.033374549
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:18:16.034518952
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:18:16.040195188
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:18:16.043908717
+DEBUG (0): LQI Root is receiving packet from node 5 @1:18:16.051715507
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:16.057269674
+DEBUG (0): LQI Root is receiving packet from node 6 @1:18:16.064471780
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:18:21.006906369
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:21.007545344
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:18:21.011386763
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:21.015464609
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:21.018632984
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:18:21.022552249
+DEBUG (0): LQI Root is receiving packet from node 1 @1:18:21.028078237
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:21.033617146
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:18:21.037950498
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:21.042085724
+DEBUG (0): LQI Root is receiving packet from node 6 @1:18:21.046388677
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:18:21.055620073
+DEBUG (0): LQI Root is receiving packet from node 5 @1:18:21.064668482
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 67 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 737.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 737.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 215.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 216.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 216.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 216.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 340.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 737.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 340.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 737.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 340.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 340.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 340.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 77 that advertises 340.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:26.006614563
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:18:26.007221138
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:18:26.009368732
+DEBUG (0): LQI Root is receiving packet from node 1 @1:18:26.018205859
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:26.019784712
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:18:26.021884748
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:18:26.026763650
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:26.031557103
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:26.034555134
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:18:26.035799021
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:18:26.039865161
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:18:26.042220713
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:26.047082526
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:26.050719809
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:18:26.052651952
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:26.066115837
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:26.071908431
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:18:26.080184358
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:18:26.085128177
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:18:26.089156474
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:26.089156474
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:18:26.089156474
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:18:26.089156474
+DEBUG (0): LQI Root is receiving packet from node 6 @1:18:26.094466502
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:26.098449022
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 111 that advertises 827.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 106 and my cost to 827.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 827.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 827.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 4, my link to 926 and my cost to 827.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 827.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 827.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 4, my link to 729 and my cost to 827.
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:18:31.006731198
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:18:31.008914853
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:31.008914853
+DEBUG (0): LQI Root is receiving packet from node 1 @1:18:31.015993347
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:31.018676539
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:18:31.019250658
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:18:31.027251928
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:18:31.027251928
+DEBUG (0): LQI Root is receiving packet from node 6 @1:18:31.027251928
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:18:31.027251928
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:18:31.041778211
+DEBUG (0): LQI Root is receiving packet from node 6 @1:18:31.047545999
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:18:31.053817325
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:18:31.057769328
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:18:31.058242348
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:31.066573598
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:18:31.071799730
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:18:31.079581667
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:18:31.079581667
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:31.079581667
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:18:31.079581667
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:18:31.079581667
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:18:31.085196868
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:18:31.085196868
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:18:31.085196868
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:18:31.088309643
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:18:31.093161910
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:31.093161910
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:31.093161910
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:18:31.093161910
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:18:31.093161910
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:18:31.095984769
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:18:31.099326425
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:18:31.099326425
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:18:31.099326425
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:31.099326425
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:18:31.101798334
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:31.101798334
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:18:31.101798334
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:31.101798334
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:18:31.102469717
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:31.104789039
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:18:31.106467496
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:18:31.108374834
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:31.108374834
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:18:31.108374834
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:31.108374834
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:31.108374834
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:31.111762265
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:18:31.118338765
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:18:31.118338765
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:31.118338765
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:31.118338765
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:31.118338765
+DEBUG (0): LQI Root is receiving packet from node 1 @1:18:36.006304073
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:18:36.006304073
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:18:36.006875852
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:18:36.011142623
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:18:36.011142623
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:18:36.011142623
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:18:36.011142623
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:18:36.013955889
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:36.013955889
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:18:36.013955889
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:18:36.013955889
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:18:36.013955889
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:18:36.016712049
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:18:36.016712049
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:18:36.016712049
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:18:36.016712049
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:18:36.017490243
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:36.020862415
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:18:36.020862415
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:18:36.021875154
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:18:36.021875154
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:36.023166479
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:18:36.023166479
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:18:36.023166479
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:18:36.024392839
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:18:36.024392839
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:18:36.026935378
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:36.026935378
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:18:36.026935378
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:18:36.026935378
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:18:36.027612425
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:18:36.031991672
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:18:36.031991672
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:18:36.031991672
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:18:36.031991672
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:36.031991672
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:18:36.031991672
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:18:36.036838274
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:18:36.036838274
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:18:36.036838274
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:18:36.038034117
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:18:36.038034117
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:41.006431459
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:41.008432239
+DEBUG (0): LQI Root is receiving packet from node 1 @1:18:41.010469698
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:41.016223771
+DEBUG (0): LQI Root is receiving packet from node 5 @1:18:41.020370254
+DEBUG (0): LQI Root is receiving packet from node 6 @1:18:41.024629653
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 1000.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 1000.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1000.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 1000.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 1855.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1855.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1855.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1855.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 1855.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 1855.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 2467.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1855.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 2467.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 1000.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 2467.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 2467.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 2467.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:46.006158693
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:18:46.009937186
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:18:46.012695128
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:46.016956188
+DEBUG (0): LQI Root is receiving packet from node 1 @1:18:46.019258709
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:18:46.020507583
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:46.023780601
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:46.034883499
+DEBUG (0): LQI Root is receiving packet from node 5 @1:18:46.038833281
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:18:46.042131382
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:46.044692622
+DEBUG (0): LQI Root is receiving packet from node 6 @1:18:46.050490928
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:51.009912333
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:18:51.011855900
+DEBUG (0): LQI Root is receiving packet from node 1 @1:18:51.015840760
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:51.017982295
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:51.025636727
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:18:51.034412141
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:51.042499252
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:51.046622875
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:51.048862130
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:18:51.058261489
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:18:51.062003644
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:18:51.062003644
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:18:51.062003644
+DEBUG (0): LQI Root is receiving packet from node 6 @1:18:51.062003644
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:51.062003644
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:18:51.062003644
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:51.066413409
+DEBUG (0): LQI Root is receiving packet from node 4 @1:18:51.068564885
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:18:51.070792656
+DEBUG (0): LQI Root is receiving packet from node 6 @1:18:51.075507594
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:51.086142908
+DEBUG (0): LQI Root is receiving packet from node 1 @1:18:56.007540027
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:18:56.011300875
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:18:56.011300875
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:56.012987265
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:56.014152361
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:18:56.019197556
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:18:56.019197556
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:18:56.019197556
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:18:56.020980602
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:18:56.021384985
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:56.021384985
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:56.021384985
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:56.026397441
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:18:56.026397441
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:18:56.026397441
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:56.028718985
+DEBUG (0): LQI Root is receiving packet from node 2 @1:18:56.031554882
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:18:56.031554882
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:18:56.031554882
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:18:56.032579436
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:18:56.036712322
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:18:56.036712322
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:18:56.036712322
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:18:56.036712322
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:56.040277146
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:18:56.042863800
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:56.042863800
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:18:56.042863800
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:18:56.042863800
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:18:56.045608144
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:18:56.049775991
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:56.049775991
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:18:56.049775991
+DEBUG (0): LQI Root is receiving packet from node 6 @1:18:56.050256336
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:18:56.051744363
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:18:56.051744363
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:18:56.051744363
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:18:56.051744363
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:56.054704551
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:56.054704551
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:18:56.054704551
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:18:56.060289235
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:18:56.060289235
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:56.060289235
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:56.061751849
+DEBUG (0): LQI Root is receiving packet from node 5 @1:18:56.061937175
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:18:56.065080467
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:56.065080467
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:56.065080467
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:18:56.065080467
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:18:56.074495085
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:18:56.074495085
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:18:56.074495085
+DEBUG (0): LQI Root is receiving packet from node 5 @1:18:56.074495085
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:18:56.074495085
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:18:56.074495085
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:18:56.076934255
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:18:56.079820371
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:18:56.079820371
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:18:56.079820371
+DEBUG (0): LQI Root is receiving packet from node 3 @1:18:56.079820371
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:18:56.082154952
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:18:56.082154952
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:18:56.082154952
+DEBUG (0): LQI Root is receiving packet from node 5 @1:18:56.082154952
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:18:56.082154952
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:18:56.089400613
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 82 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:19:1.006320874
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:19:1.006320874
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:19:1.006320874
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:19:1.006320874
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:1.006320874
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:1.006320874
+DEBUG (0): LQI Root is receiving packet from node 3 @1:19:1.010139323
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:19:1.010139323
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:19:1.010894602
+DEBUG (0): LQI Root is receiving packet from node 1 @1:19:1.012102379
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:19:1.012102379
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:1.016174112
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:1.016174112
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:19:1.016174112
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:19:1.016975221
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:19:1.019355578
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:19:1.019355578
+DEBUG (0): LQI Root is receiving packet from node 3 @1:19:1.019355578
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:19:1.019355578
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:19:1.019355578
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:19:1.019355578
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:19:1.022096827
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:19:1.022096827
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:1.022096827
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:19:1.022096827
+DEBUG (0): LQI Root is receiving packet from node 3 @1:19:1.025077590
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:19:1.025077590
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:19:1.025077590
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:19:1.025077590
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:19:1.025077590
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:19:1.026160958
+DEBUG (0): LQI Root is receiving packet from node 5 @1:19:1.027503724
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:19:1.027503724
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:19:1.030433394
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:19:1.030433394
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:19:1.030433394
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:1.030433394
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:1.030433394
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:19:1.030433394
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:19:1.034003930
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:19:1.034003930
+DEBUG (0): LQI Root is receiving packet from node 3 @1:19:1.034003930
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:19:1.034003930
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:19:1.034812641
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:19:1.041343365
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:19:1.041343365
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:19:1.041343365
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:19:1.041343365
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:19:1.041343365
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:19:1.046165114
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:19:1.046165114
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:19:1.050468067
+DEBUG (0): LQI Root is receiving packet from node 1 @1:19:1.050468067
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:19:1.050468067
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:19:1.050468067
+DEBUG (0): LQI Root is receiving packet from node 5 @1:19:6.007583464
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:19:6.007583464
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:19:6.007583464
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:19:6.007583464
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:19:6.008075625
+DEBUG (0): LQI Root is receiving packet from node 1 @1:19:6.010454439
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:19:6.010454439
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:19:6.010454439
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:19:6.011895964
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:19:6.011895964
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:19:6.016834119
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:19:6.017740046
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:19:6.018449880
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:19:6.018449880
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:19:6.021854231
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:19:6.021854231
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:6.021854231
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:19:6.021854231
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:19:6.024066742
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:19:6.024066742
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:19:6.024066742
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:6.024721323
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:19:6.024951747
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:19:6.029773496
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:6.029773496
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:19:6.029773496
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:6.030795829
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:19:6.032031784
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:19:6.032031784
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:6.033006798
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:19:6.033006798
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:19:6.034244295
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:19:6.034244295
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:6.035480250
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:19:6.035480250
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:19:6.039386477
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:6.039386477
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:6.039386477
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:19:6.039386477
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:19:6.039386477
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:19:6.039966308
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:19:6.050128602
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:19:6.050128602
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:19:6.050128602
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:6.050128602
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:19:6.050128602
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:19:6.050128602
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:19:6.058948131
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:19:6.058948131
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:19:6.058948131
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:6.058948131
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:19:6.058948131
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:19:6.058948131
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:19:11.006316992
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:19:11.006316992
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:19:11.006316992
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:11.008546983
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:19:11.008546983
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:19:11.015733831
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:11.015733831
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:19:11.015733831
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:19:11.015733831
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:19:11.018914966
+DEBUG (0): LQI Root is receiving packet from node 5 @1:19:11.018914966
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:19:11.018914966
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:19:11.018914966
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:19:11.022020415
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:11.022020415
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:19:11.022020415
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:11.022020415
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:19:11.023805683
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:11.024005708
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:11.024005708
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:19:11.024005708
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:19:11.024005708
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:11.028375360
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:19:11.028375360
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:19:11.028375360
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:19:11.030763650
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:11.030763650
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:19:11.030763650
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:11.030763650
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:19:11.030763650
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:19:11.030763650
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:19:11.035524365
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:19:11.035524365
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:19:11.035524365
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:11.035524365
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:19:11.035524365
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:11.035524365
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 5355 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 1076.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 2744 and my cost to 1076.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 1076.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 1076.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 1837.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 1837.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 1837.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 1837.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 3820.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 3820.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 3820.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 3820.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 5 @1:19:16.006942598
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:16.009027329
+DEBUG (0): LQI Root is receiving packet from node 1 @1:19:16.016344297
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:19:16.027885191
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:16.030597466
+DEBUG (0): LQI Root is receiving packet from node 3 @1:19:16.035148332
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:16.039918870
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:16.052507298
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:21.007755192
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:19:21.011726228
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:21.017373837
+DEBUG (0): LQI Root is receiving packet from node 5 @1:19:21.023330442
+DEBUG (0): LQI Root is receiving packet from node 3 @1:19:21.025857675
+DEBUG (0): LQI Root is receiving packet from node 1 @1:19:21.041429600
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:21.051317119
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:21.055177570
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:19:26.008445607
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:26.011051071
+DEBUG (0): LQI Root is receiving packet from node 3 @1:19:26.016748231
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:26.024278703
+DEBUG (0): LQI Root is receiving packet from node 1 @1:19:26.027086422
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:26.031335548
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:26.037576356
+DEBUG (0): LQI Root is receiving packet from node 5 @1:19:26.062682630
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 165.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 165.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 165.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 165.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 165.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 1201.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 1331 and my cost to 1201.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 1201.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 165.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1201.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 165.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 1950.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 1331 and my cost to 1201.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1950.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 1950.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 1950.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 1950.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 165.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:19:31.006738524
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:31.017519217
+DEBUG (0): LQI Root is receiving packet from node 5 @1:19:31.024459586
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:19:31.029365285
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:19:31.030626322
+DEBUG (0): LQI Root is receiving packet from node 1 @1:19:31.033266195
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:19:31.035178850
+DEBUG (0): LQI Root is receiving packet from node 3 @1:19:31.039268181
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:31.046449594
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:19:31.054872396
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:31.060289235
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:31.061832025
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:31.071200867
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:19:36.006646971
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:19:36.011766569
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:36.015856019
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:36.017124034
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:19:36.018211175
+DEBUG (0): LQI Root is receiving packet from node 1 @1:19:36.023668473
+DEBUG (0): LQI Root is receiving packet from node 5 @1:19:36.026015973
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:36.030336525
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:19:36.034003930
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:36.036155407
+DEBUG (0): LQI Root is receiving packet from node 3 @1:19:36.043494841
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:19:36.050330739
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:36.056830945
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:41.008304505
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:19:41.020026961
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:19:41.030397442
+DEBUG (0): LQI Root is receiving packet from node 1 @1:19:41.031129977
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:19:41.037149113
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:41.040880287
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:41.048509637
+DEBUG (0): LQI Root is receiving packet from node 5 @1:19:41.054885434
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:19:41.065957538
+DEBUG (0): LQI Root is receiving packet from node 3 @1:19:41.071694809
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:41.074128876
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:19:41.089006108
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:41.095536832
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 165.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 165.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 68 that advertises 207.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 1331 and my cost to 1201.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 207.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 790 and my cost to 207.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 207.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 465 and my cost to 207.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 207.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 207.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 207.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:19:46.007119991
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:19:46.009780717
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:19:46.011781828
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:19:46.015792644
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:19:46.017860225
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:46.022432518
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:19:46.023734825
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:19:46.025180627
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:46.027656311
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:46.032321699
+DEBUG (0): LQI Root is receiving packet from node 5 @1:19:46.035143016
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:19:46.038348886
+DEBUG (0): LQI Root is receiving packet from node 1 @1:19:46.041048132
+DEBUG (0): LQI Root is receiving packet from node 3 @1:19:46.050127059
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:46.056795111
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 98 that advertises 672.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 512 and my cost to 672.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 672.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 42 and my cost to 672.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 672.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 207.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 672.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 672.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 165.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1184.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 42 and my cost to 672.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 1184.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 465 and my cost to 207.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1184.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 207.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 77 that advertises 1184.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 165.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:19:51.008516466
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:19:51.011649934
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:19:51.014184769
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:19:51.015125144
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:51.034502150
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:51.038562507
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:19:51.042977936
+DEBUG (0): LQI Root is receiving packet from node 1 @1:19:51.049394641
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:19:51.051574296
+DEBUG (0): LQI Root is receiving packet from node 3 @1:19:51.055345534
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:51.059793023
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:19:51.072396710
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:19:51.074950624
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:51.116128144
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:19:51.116744204
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:51.125161294
+DEBUG (0): LQI Root is receiving packet from node 5 @1:19:51.133278923
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:19:56.011035813
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:19:56.016692908
+DEBUG (0): LQI Root is receiving packet from node 1 @1:19:56.019060346
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:19:56.020120403
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:19:56.020998082
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:19:56.023643273
+DEBUG (0): LQI Root is receiving packet from node 2 @1:19:56.031381324
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:56.035134964
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:19:56.036513959
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:56.044784174
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:56.055459553
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:56.064935205
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:56.068994020
+DEBUG (0): LQI Root is receiving packet from node 4 @1:19:56.071710068
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:19:56.079537781
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:19:56.089410160
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:19:56.095300018
+DEBUG (0): LQI Root is receiving packet from node 5 @1:19:56.095300018
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:19:56.095300018
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:19:56.095300018
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:19:56.098794261
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:19:56.102654712
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:19:56.109338022
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:19:56.109338022
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:19:56.109338022
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:19:56.109338022
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:56.109338022
+DEBUG (0): LQI Root is receiving packet from node 6 @1:19:56.109338022
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:19:56.113702011
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:19:56.117562462
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:19:56.121575500
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 65 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 512 and my cost to 672.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 42 and my cost to 672.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:1.008209071
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:20:1.009393537
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:1.010806932
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:20:1.010806932
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:20:1.010806932
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:1.015231955
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:20:1.015231955
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:1.015231955
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:20:1.015231955
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:20:1.015231955
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:20:1.015863226
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:20:1.017856451
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:1.017856451
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:20:1.017856451
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:20:1.017856451
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:20:1.019920150
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:1.023975190
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:20:1.023975190
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:20:1.023975190
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:1.026063971
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:20:1.030856864
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:1.030856864
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:20:1.030856864
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:20:1.031390918
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:20:1.033456507
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:20:1.033456507
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:20:1.035876976
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:1.039905273
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:20:1.041391031
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:20:1.041391031
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:1.043964087
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:20:1.044990194
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:20:1.044990194
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:1.044990194
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:1.046647957
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:20:1.050073232
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:20:1.050073232
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:20:1.055017050
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:20:1.055017050
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:20:1.055017050
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:20:1.055017050
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:1.061791913
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:20:1.061791913
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:20:1.061791913
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:1.061791913
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:20:1.063943390
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:1.063943390
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:20:1.063943390
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:1.063943390
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:20:1.063943390
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:20:1.064904688
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:20:1.068856691
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:20:1.068856691
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:20:1.068856691
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:20:1.068856691
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:1.070992909
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:1.075143276
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:1.079766662
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 512 and my cost to 672.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 111 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 512 and my cost to 672.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:20:6.005889748
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:6.005889748
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:6.005889748
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:20:6.005889748
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:20:6.006601195
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:20:6.008563903
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:20:6.008563903
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:20:6.009406906
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:6.009584693
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:20:6.012643640
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:20:6.012643640
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:20:6.012643640
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:20:6.016563236
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:6.016563236
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:20:6.016563236
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:6.018556809
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:20:6.018556809
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:6.018556809
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:6.020938709
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:20:6.020938709
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:20:6.020938709
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:20:6.020938709
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:20:6.023294213
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:6.023294213
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:20:6.023294213
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:20:6.023294213
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:20:6.025653647
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:6.025653647
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:20:6.025653647
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:20:6.025653647
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:20:6.027605218
+DEBUG (0): LQI Root is receiving packet from node 2 @1:20:6.027605218
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:20:6.027605218
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:20:6.027605218
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:6.028201850
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:20:6.031884861
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:6.031884861
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:6.031884861
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:20:6.031884861
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:20:6.031884861
+DEBUG (0): LQI Root is receiving packet from node 2 @1:20:6.035280344
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:20:6.036019969
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:6.037280777
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:20:6.037280777
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:20:6.037280777
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:20:6.044786396
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:6.044786396
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:6.044786396
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:20:6.044786396
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:20:6.044786396
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:20:6.051515482
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:6.051515482
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:6.051515482
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:6.051515482
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:20:6.051515482
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:20:6.058976987
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:6.066194352
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:20:6.072694558
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:20:6.072694558
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:20:6.077653636
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:20:6.081086843
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:20:6.081086843
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:6.081086843
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:6.082261763
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:6.085832299
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:20:6.089921630
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:20:6.089921630
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:6.089921630
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:6.089921630
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:20:6.089921630
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:20:6.093492166
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:6.093492166
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:6.093492166
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:20:6.093492166
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:6.098664865
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:6.107499653
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:11.007263031
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:11.007263031
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:20:11.010669604
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:20:11.010669604
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:20:11.010669604
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:20:11.010669604
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:11.012392294
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:20:11.012392294
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:11.016376358
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:11.016376358
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:20:11.016376358
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:20:11.019763789
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:20:11.019763789
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:11.022296733
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:20:11.022296733
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:20:11.022296733
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:20:11.024585538
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:20:11.024585538
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:20:11.024585538
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:20:11.024585538
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:20:11.024585538
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:11.027896676
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:20:11.027896676
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:11.027896676
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:11.028568059
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:11.031390918
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:20:11.031390918
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:20:11.031390918
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:11.033937460
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:20:11.034137484
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:20:11.034137484
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:20:11.034137484
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:20:11.037677503
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:20:11.037677503
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:11.037677503
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:20:11.037677503
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:20:11.038760870
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:11.045320450
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:11.054979207
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:20:11.061784588
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:20:11.066285904
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:11.070741444
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:20:16.008777525
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:20:16.010833567
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:16.010833567
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:20:16.010833567
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:16.010833567
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:20:16.010833567
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:20:16.016097818
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:16.016433510
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:16.016433510
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:20:16.016433510
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:20:16.016433510
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:16.020065080
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:20:16.020065080
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:16.020065080
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:20:16.020797498
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:20:16.022201298
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:20:16.022201298
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:16.022201298
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:16.022201298
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:20:16.031814279
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:16.031814279
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:16.031814279
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:20:16.031814279
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:20:16.040742840
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:20:16.047593997
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:16.047593997
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:16.054155238
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:16.064149686
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:20:16.070649892
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:20:16.070649892
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:20:16.070649892
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:16.070649892
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:20:16.070649892
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:20:16.070649892
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:16.077043288
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:20:16.077043288
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:16.077043288
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:16.079072695
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:20:16.079072695
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:16.079072695
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:20:16.080369684
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:20:16.085191433
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:16.085191433
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:20:16.085191433
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:16.085191433
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 64 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4488 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4488 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 1837.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 1837.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 125 and my cost to 1837.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 1837.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 1837.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 93 that advertises 1837.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 790 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 2449.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 125 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 2449.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 90 that advertises 2449.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 2449.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 790 and my cost to 1837.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:21.006456541
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:21.010988493
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:20:21.014291580
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:21.017536019
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:21.021518539
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:21.023696651
+DEBUG (0): LQI Root is receiving packet from node 2 @1:20:21.026340289
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:21.033088408
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:21.056201565
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:26.007018892
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:20:26.014917187
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:26.017992237
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:26.024705947
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:26.033344032
+DEBUG (0): LQI Root is receiving packet from node 2 @1:20:26.057117087
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:26.061957868
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:26.067218346
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:26.077136501
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:31.006044675
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:20:31.007943961
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:31.012514245
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:31.016208512
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:31.020721205
+DEBUG (0): LQI Root is receiving packet from node 2 @1:20:31.023868379
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:31.031635058
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:31.040916121
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 125 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 343.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 343.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 343.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 343.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 1621.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 1621.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 125 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 1621.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 343.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 1621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 1962.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1962.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 1962.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 1962.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1962.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 343.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:36.012115298
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:20:36.016910412
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:20:36.019861006
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:36.022844503
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:36.024463469
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:36.026176217
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:36.029939681
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:36.032365932
+DEBUG (0): LQI Root is receiving packet from node 2 @1:20:36.038469412
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:20:36.039735766
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:36.055589555
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:41.009643388
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:41.011675135
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:20:41.014993480
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:41.022373027
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:41.027513547
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:41.034005820
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:41.043891568
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:41.045755019
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:20:41.049533513
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:41.055642657
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:20:41.056750878
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:41.064980981
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:41.070992909
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:41.082177536
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:46.007079927
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:46.009467940
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:46.019899456
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:20:46.023309472
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:46.037248716
+DEBUG (0): LQI Root is receiving packet from node 2 @1:20:46.043886251
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:20:46.047183673
+DEBUG (0): LQI Root is receiving packet from node 2 @1:20:46.053210859
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:46.055865873
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:46.059207528
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:20:46.063891949
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:20:46.074649333
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:20:46.079410047
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:20:46.079410047
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:20:46.079410047
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:46.079410047
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:46.079410047
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:20:46.084964214
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:46.089816481
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:46.099383686
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 125 and my cost to 1837.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 343.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 468.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 612 and my cost to 468.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 468.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 468.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 468.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 1080.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 420 and my cost to 1080.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 1080.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 4, my link to 106 and my cost to 1080.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 1080.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 468.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 1080.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 1080.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 343.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:20:51.008090883
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:51.022157862
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:51.026778908
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:51.033769614
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:20:51.035804457
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:20:51.038201963
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1500.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 106 and my cost to 1080.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 1500.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 612 and my cost to 468.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 1500.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 468.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 1500.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 58 that advertises 1500.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:20:51.054742394
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:20:51.071984725
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:20:51.074035102
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:51.080026060
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:51.083526014
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:20:51.089278544
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:20:51.093108477
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:51.098769455
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:51.105956303
+DEBUG (0): LQI Root is receiving packet from node 1 @1:20:56.007326405
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:20:56.010522681
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:20:56.015159435
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:20:56.024141375
+DEBUG (0): LQI Root is receiving packet from node 2 @1:20:56.026208625
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:20:56.035850233
+DEBUG (0): LQI Root is receiving packet from node 3 @1:20:56.045585283
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:20:56.049167304
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:20:56.050033167
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:20:56.053744914
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:20:56.056995017
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:20:56.069842842
+DEBUG (0): LQI Root is receiving packet from node 6 @1:20:56.075564855
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:20:56.078464008
+DEBUG (0): LQI Root is receiving packet from node 4 @1:20:56.086886810
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:20:56.094394091
+DEBUG (0): LQI Root is receiving packet from node 5 @1:20:56.104480091
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:21:1.006585937
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:1.009569434
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:1.014591090
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:21:1.017341430
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:21:1.020797498
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:1.023347922
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:1.026263995
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:21:1.028899868
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:21:1.032579554
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:21:1.039722169
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:21:1.043014165
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:1.049119985
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:21:1.050281189
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:1.053499232
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:1.059373831
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:1.061282712
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:1.066501187
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 66 that advertises 273.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 420 and my cost to 1080.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 273.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 106 and my cost to 1080.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 74 that advertises 273.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 468.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 273.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 273.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 273.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 612 and my cost to 468.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 593.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 420 and my cost to 1080.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 593.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 52 and my cost to 593.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 593.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 593.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:21:6.006799558
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:6.008974227
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:6.011492031
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:21:6.015151779
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:6.019441813
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:6.022571390
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:21:6.025733715
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:6.026263995
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:21:6.047889347
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:21:6.051093674
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:6.055381369
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:21:6.057254415
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:6.062018903
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:6.067618846
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:21:6.071586108
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:6.081580557
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:21:6.082278683
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:6.087302569
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:6.087302569
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:21:6.094378832
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:21:6.103305171
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:6.103305171
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:21:6.103305171
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:21:6.103305171
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:21:6.103305171
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:21:6.118411284
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:6.130744088
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:6.130744088
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:6.130744088
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:6.130744088
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:6.130744088
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:6.130744088
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:21:6.133853089
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:6.139716204
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:6.142474254
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:6.147757538
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:6.147757538
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:6.147757538
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:6.147757538
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:6.147757538
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:6.153525327
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:6.153525327
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:6.153525327
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:6.153525327
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:6.153525327
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:6.153525327
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:21:11.006891111
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:11.006891111
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:21:11.006891111
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:21:11.006891111
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:21:11.006891111
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:21:11.008247244
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:11.010591649
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:11.010591649
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:21:11.010591649
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:11.011676678
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:11.013793755
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:21:11.013793755
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:21:11.013793755
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:21:11.013793755
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:21:11.014381242
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:11.017702203
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:11.017702203
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:21:11.017702203
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:11.017702203
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:11.019733272
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:21:11.019733272
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:21:11.019733272
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:21:11.025317956
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:11.026262334
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:21:11.027239009
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:11.027239009
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:21:11.027239009
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:21:11.030992531
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:21:11.032808434
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:21:11.032808434
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:16.005908889
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:16.005908889
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:16.005908889
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:16.005908889
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:21:16.007591120
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:21:16.008081289
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:16.008081289
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:21:16.008081289
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:21:16.010360547
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:16.010360547
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:21:16.010360547
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:21:16.010360547
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:16.012514245
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:16.012514245
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:16.012514245
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:16.012514245
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:21:16.015098401
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:16.015098401
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:21:16.015098401
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:21:16.015098401
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:21:16.016427798
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:16.018707056
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:16.018707056
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:16.018707056
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:16.018707056
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:16.018707056
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:16.018707056
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:16.021219030
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:21:16.021219030
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:21:16.021219030
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:16.025741317
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:16.025741317
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:21:16.025741317
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:21:16.025741317
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:21:16.028429069
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:21:16.028429069
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:21:16.028429069
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:16.029105887
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:16.029105887
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:21:16.031127638
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:16.031127638
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:21:16.031127638
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:21:16.031127638
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:21:16.031127638
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:16.033021938
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:16.033021938
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:16.033021938
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:16.033021938
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:16.034858417
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:21:16.035567920
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:16.035567920
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:21:16.036750496
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:21:16.036750496
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:16.036750496
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:21:16.038253451
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:21:16.038253451
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:21:16.038253451
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:16.043830533
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:21:16.043830533
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:16.043830533
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:21:16.048255556
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:21:16.048255556
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:21:16.048255556
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:16.050345998
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:21:16.050345998
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:16.050345998
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:16.050345998
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:16.050345998
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:21.006202579
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:21.008422692
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:21.009052182
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:21.010423922
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:21.012926230
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:21.012926230
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:21.012926230
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:21.018343069
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:21:21.022554470
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:21.022554470
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:21.022554470
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:21.022554470
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:21.027437254
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:21.027437254
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:21.035297146
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:21.035297146
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:21.035297146
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:21.035297146
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:21.036439887
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:21.043368998
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:21.043368998
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:21.046853646
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:21.050632139
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:21.050632139
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:21.050632139
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:21.050632139
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:21.050632139
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:21.052081716
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:21.055291707
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:21.060382448
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:21.060382448
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:21.060382448
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:21.060382448
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:21.060382448
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:21.060382448
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 90 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 90 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 71 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:26.007846744
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:26.007846744
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:26.007846744
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:26.007846744
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:26.010835906
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:21:26.010835906
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:21:26.010835906
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:21:26.011712860
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:21:26.017656545
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:21:26.017656545
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:21:26.017656545
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:26.019060346
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:26.020669717
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:26.020669717
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:26.020669717
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:21:26.021745877
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:21:26.025430431
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:26.027086422
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:31.006906369
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:21:31.006906369
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:21:31.006996031
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:21:31.009050639
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:21:31.009050639
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:31.009050639
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:21:31.009050639
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:31.010837449
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:31.013597731
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:21:31.013597731
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:21:31.014986273
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:21:31.016879895
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:31.016879895
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:21:31.016879895
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:21:31.016879895
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:21:31.016879895
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:21:31.016879895
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:31.020525181
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:21:31.020525181
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:21:31.020525181
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:21:31.020525181
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:21:31.020525181
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:31.022464579
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:21:31.022464579
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:21:31.022464579
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:21:31.022464579
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:21:31.023227514
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:21:31.025516319
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:31.025516319
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:21:31.025516319
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:21:31.025516319
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:21:31.027422113
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:21:31.027422113
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:31.027422113
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:21:31.027422113
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:31.034029012
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:31.034029012
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:31.034029012
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:31.035587061
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:31.039171194
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:31.039171194
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:31.039171194
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:31.040193527
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:31.040193527
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:21:31.041141228
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:31.041141228
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:21:31.041141228
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:21:31.042619660
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:21:31.042619660
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:21:31.042619660
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:31.044221824
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:31.044221824
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:31.044221824
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:31.046388559
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:21:31.046388559
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:21:31.046388559
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:31.049684438
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:31.049684438
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:31.049684438
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:31.049684438
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:31.049684438
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:31.049684438
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:31.055650590
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:31.055650590
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:31.055650590
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:31.055650590
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:31.055650590
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:31.055650590
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:31.065416158
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:31.065416158
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:31.065416158
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:31.065416158
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:31.065416158
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:31.065416158
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:21:36.005966042
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:21:36.005966042
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:36.005966042
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:21:36.005966042
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:21:36.005966042
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:21:36.006584046
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:21:36.008684430
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:36.008684430
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:21:36.008684430
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:36.010776415
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:36.010776415
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:36.010776415
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:36.013063677
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:21:36.013063677
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:21:36.013557272
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:21:36.013557272
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:36.016191710
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:21:36.016191710
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:36.018165399
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:36.023515768
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:36.023515768
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:36.023515768
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:21:36.023822603
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:36.025705088
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:36.025705088
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:36.025705088
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:36.025705088
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:36.028978383
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:36.028978383
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:36.028978383
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:36.033593836
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:36.033593836
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:36.033593836
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:36.033593836
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:36.033593836
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:36.033593836
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:36.038995415
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:36.038995415
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:36.038995415
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:36.041879310
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:36.041879310
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:36.041879310
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:36.041879310
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:36.041879310
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:36.041879310
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:36.050027455
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:36.050027455
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:36.050027455
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:36.050027455
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:36.050027455
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:36.050027455
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 63 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 74 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:41.007936635
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:21:41.008613453
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:41.011630902
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:41.011630902
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:41.011630902
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:41.011630902
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:41.011630902
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:41.015018333
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:41.015018333
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:41.015018333
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:21:41.018192143
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:41.018192143
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:41.018192143
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:21:41.018192143
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:41.018192143
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:41.023502170
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:41.023502170
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:21:41.024863969
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:41.027469432
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:21:41.027469432
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:21:41.027469432
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:41.027469432
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:41.027469432
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:41.032844269
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:41.032844269
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:21:41.033740758
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:21:41.033740758
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:21:41.033740758
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:21:41.039512321
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:41.039512321
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:41.039512321
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:41.039512321
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:21:41.039512321
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:41.045051229
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:41.045051229
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:41.045051229
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:41.045051229
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:41.045051229
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:21:41.045051229
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:46.007545344
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:21:46.007545344
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:21:46.011080046
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:21:46.011080046
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:21:46.011080046
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:46.011080046
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:21:46.011080046
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:46.017168267
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:21:46.017168267
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:21:46.017168267
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:21:46.018053272
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:46.019136639
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:21:46.019136639
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:21:46.019136639
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:21:46.019136639
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:21:46.019838539
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:21:46.023103901
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:21:46.023103901
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:46.023103901
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:21:46.023103901
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:21:46.023103901
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:21:46.024522960
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:21:46.026735472
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:21:46.026735472
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:21:46.026735472
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:21:46.029436262
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:46.029436262
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:21:46.029436262
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:21:46.029436262
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:21:46.029436262
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:21:46.034990429
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:46.034990429
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:21:46.034990429
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:21:46.034990429
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:21:46.037294492
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:21:46.037294492
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:21:46.037294492
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:21:46.037294492
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:21:46.037294492
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:21:46.044023579
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:21:46.044023579
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:21:46.044023579
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:21:46.044023579
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:21:46.044023579
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:51.005897405
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:21:51.005897405
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:21:51.005897405
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:21:51.005897405
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:21:51.006891111
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:51.007997788
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:21:51.007997788
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:51.009737162
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:51.009737162
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:51.009737162
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:21:51.012542541
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:21:51.012542541
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:21:51.012542541
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:51.012542541
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:21:51.012542541
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:21:51.012542541
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:51.015199895
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:21:51.015199895
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:21:51.015199895
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:21:51.015924261
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:21:51.015924261
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:21:51.019534908
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:51.019534908
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:21:51.019534908
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:51.021835090
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:21:51.021835090
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:21:51.021835090
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:21:51.021835090
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:21:51.023943130
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:51.023943130
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:21:51.023943130
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:21:51.023943130
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:51.026931495
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:21:51.026931495
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:21:51.026931495
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:21:51.026931495
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:21:51.028034004
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:51.031737986
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:51.031737986
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:51.031737986
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:21:51.031737986
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:51.036440005
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:21:51.036440005
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:21:51.036440005
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:21:51.036440005
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:51.040023460
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:21:51.040023460
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:51.040023460
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:21:51.041000017
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:21:51.046981427
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:51.046981427
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:21:51.046981427
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:51.046981427
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:51.046981427
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:51.046981427
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:21:51.056258717
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:51.056258717
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:51.056258717
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:21:51.056258717
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:21:51.056258717
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 790.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 790.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 790.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 790.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 790.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 98 that advertises 1728.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 1728.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 2240.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 790.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 2240.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 2240.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 2240.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:21:56.008119858
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:21:56.010284254
+DEBUG (0): LQI Root is receiving packet from node 4 @1:21:56.014224881
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:21:56.018495656
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:21:56.019264026
+DEBUG (0): LQI Root is receiving packet from node 5 @1:21:56.025674570
+DEBUG (0): LQI Root is receiving packet from node 6 @1:21:56.029100452
+DEBUG (0): LQI Root is receiving packet from node 2 @1:21:56.034372029
+DEBUG (0): LQI Root is receiving packet from node 3 @1:21:56.040979046
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:1.008462757
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:1.012544763
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:1.015365401
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:1.025817610
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:1.030733251
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:1.042590804
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:22:1.047568914
+DEBUG (0): LQI Root is receiving packet from node 4 @1:22:1.053424481
+DEBUG (0): LQI Root is receiving packet from node 3 @1:22:1.055625508
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:22:6.006919737
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:6.009851298
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:6.012115298
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:6.016191592
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:6.016649471
+DEBUG (0): LQI Root is receiving packet from node 3 @1:22:6.030816752
+DEBUG (0): LQI Root is receiving packet from node 4 @1:22:6.033054117
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:6.038140928
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:6.049350408
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 65 that advertises 343.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 343.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 74 that advertises 343.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 343.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 343.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 343.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 91 that advertises 915.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 915.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 790.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 915.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 343.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 915.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 1790.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1790.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 343.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 1790.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 77 that advertises 1790.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 1790.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 343.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:11.008455549
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:22:11.009607159
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:22:11.016410649
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:11.018953417
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:11.033593836
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:22:11.037433364
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:11.040511738
+DEBUG (0): LQI Root is receiving packet from node 4 @1:22:11.042422958
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:22:11.045932459
+DEBUG (0): LQI Root is receiving packet from node 4 @1:22:11.047385810
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:11.052188526
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:22:11.053519807
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:22:11.059852168
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:22:11.068046090
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:22:11.068046090
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:22:11.068046090
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:11.068046090
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:11.077399673
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:22:11.093100875
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:22:11.094992954
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:22:16.006950255
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:22:16.007434759
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:22:16.007434759
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:16.010240699
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:16.010660009
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:22:16.015398258
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:22:16.019456954
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:22:16.019456954
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:22:16.019456954
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:22:16.019456954
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:22:16.019456954
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:16.023574581
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:16.025621469
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:22:16.025621469
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:22:16.025621469
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:16.025621469
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:22:16.028261224
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:22:16.028261224
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:16.029665024
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:22:16.029665024
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:22:16.029665024
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:22:16.031844797
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:16.031844797
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:16.031844797
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:22:16.031844797
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:22:16.031844797
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:22:16.031844797
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:22:16.033739097
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:22:16.033739097
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:16.033739097
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:16.033739097
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:22:16.033739097
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:22:16.033739097
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:16.037309633
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:22:16.037889463
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:22:16.039735766
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:22:16.039735766
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:22:16.039735766
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:22:16.039735766
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:16.045669179
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:16.045669179
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:22:16.045669179
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:22:16.045669179
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:22:16.046937872
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:22:16.049745473
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:22:16.049745473
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:22:16.049745473
+DEBUG (0): LQI Root is receiving packet from node 4 @1:22:16.049745473
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:22:16.049745473
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:22:16.049745473
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:22:16.051652811
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:22:16.051652811
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:22:16.051652811
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:22:16.051652811
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:22:16.058641295
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:22:16.058641295
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:22:16.067033580
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:22:16.075151209
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:22:16.075151209
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:22:16.081407276
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:22:16.081407276
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:22:16.081407276
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:16.081407276
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:22:16.081407276
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:16.081407276
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:22:16.085405055
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:16.085405055
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:16.085405055
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:22:16.085405055
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:16.087922741
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:22:16.087922741
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:22:16.087922741
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:16.087922741
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:22:16.087922741
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:22:16.090409909
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:22:16.090409909
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:16.090409909
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:22:16.090409909
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:16.090409909
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:22:16.097718826
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:22:16.097718826
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:22:16.097718826
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:16.097718826
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:22:16.097718826
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:16.097718826
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:22:21.006036623
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:21.006036623
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:22:21.006036623
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:22:21.006036623
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:22:21.006036623
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:22:21.007652155
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:21.009887528
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:21.009887528
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:22:21.009887528
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:22:21.009887528
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:21.011995568
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:22:21.011995568
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:22:21.011995568
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:21.014678759
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:22:21.014678759
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:22:21.014678759
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:22:21.016135992
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:22:21.016135992
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:21.016940929
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:22:21.016940929
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:22:21.016940929
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:22:21.018386623
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:22:21.018386623
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:21.019838421
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:22:21.020648794
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:22:21.020648794
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:22:21.020648794
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:22:21.020648794
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:22:21.020648794
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:22:21.023119160
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:21.023119160
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:22:21.023119160
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:22:21.023119160
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:22:21.023119160
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:22:21.025668906
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:21.025668906
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:22:21.025668906
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:22:21.025668906
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:22:21.025668906
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:22:21.027541843
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:21.028429188
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:22:21.028429188
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:22:21.028429188
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:21.028993759
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:22:21.032447543
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:21.032447543
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:21.032447543
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:22:21.032447543
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:22:21.032447543
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:22:21.032447543
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:21.035464991
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:22:21.035464991
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:22:21.035464991
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:22:21.037919981
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:22:21.037919981
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:21.037919981
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:22:21.037919981
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:22:21.037919981
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:22:21.042792941
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:22:21.042792941
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:22:21.042792941
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:21.042792941
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:22:21.042792941
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:22:21.047426151
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:22:21.047426151
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:21.047426151
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:22:21.047426151
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:22:21.047426151
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:22:21.050315480
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:22:21.050315480
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:22:21.050315480
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:22:21.050315480
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:22:21.050315480
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4698 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1518.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:22:26.006034733
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:26.008333480
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:26.014444167
+DEBUG (0): LQI Root is receiving packet from node 4 @1:22:26.018054815
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:26.041459999
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:26.049499113
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 98 that advertises 1728.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 1728.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 2240.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 2240.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 2240.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 66 that advertises 2240.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @1:22:31.008167177
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:31.010253736
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:31.013376058
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:31.017961719
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:31.020647132
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:31.029298815
+DEBUG (0): LQI Root is receiving packet from node 3 @1:22:31.034354880
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:36.006530614
+DEBUG (0): LQI Root is receiving packet from node 3 @1:22:36.009132249
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:36.013864336
+DEBUG (0): LQI Root is receiving packet from node 4 @1:22:36.017413949
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:36.020982942
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:36.025362071
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:36.052125830
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 63 that advertises 307.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 307.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 307.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 307.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:41.007417958
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:22:41.009836040
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:41.013322956
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:41.016000554
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:22:41.016635755
+DEBUG (0): LQI Root is receiving packet from node 4 @1:22:41.020358878
+DEBUG (0): LQI Root is receiving packet from node 3 @1:22:41.026008371
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:41.028732022
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:22:41.034534211
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:41.041690541
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 1621.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 1621.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 1621.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 1621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 1621.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1621.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 1621.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 1621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:46.010134006
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:22:46.016513686
+DEBUG (0): LQI Root is receiving packet from node 3 @1:22:46.017524534
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:22:46.018792897
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:46.021377329
+DEBUG (0): LQI Root is receiving packet from node 4 @1:22:46.025028040
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:46.037462220
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:46.040988641
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:22:46.044771137
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:46.048967280
+DEBUG (0): LQI Root is receiving packet from node 3 @1:22:51.005943181
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:22:51.009937186
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:51.011171480
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:51.018053272
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:51.023559323
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:22:51.024133442
+DEBUG (0): LQI Root is receiving packet from node 4 @1:22:51.036409488
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:51.043428490
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:22:51.053117646
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:51.058641295
+DEBUG (0): LQI Root is receiving packet from node 5 @1:22:56.006576390
+DEBUG (0): LQI Root is receiving packet from node 3 @1:22:56.019126697
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:22:56.020852821
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:22:56.027727169
+DEBUG (0): LQI Root is receiving packet from node 1 @1:22:56.028612292
+DEBUG (0): LQI Root is receiving packet from node 2 @1:22:56.034090165
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:22:56.036334737
+DEBUG (0): LQI Root is receiving packet from node 4 @1:22:56.047671951
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:22:56.050174378
+DEBUG (0): LQI Root is receiving packet from node 6 @1:22:56.057452778
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 68 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 432.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 432.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 432.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 432.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 919.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 919.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 919.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 919.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 919.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 919.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1531.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 919.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 1531.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 1531.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 62 that advertises 1531.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:23:1.008333480
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:23:1.011001413
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:1.016528945
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:1.020831898
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:23:1.021631015
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:23:1.024585538
+DEBUG (0): LQI Root is receiving packet from node 2 @1:23:1.029351917
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:1.032279697
+DEBUG (0): LQI Root is receiving packet from node 5 @1:23:1.034555134
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:23:1.038398436
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:23:1.046037609
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:23:1.049837025
+DEBUG (0): LQI Root is receiving packet from node 3 @1:23:1.056159562
+DEBUG (0): LQI Root is receiving packet from node 6 @1:23:1.066123493
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:23:6.010726756
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:23:6.022264555
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:23:6.026635868
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:6.029456837
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:23:6.034126000
+DEBUG (0): LQI Root is receiving packet from node 2 @1:23:6.041109167
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:23:6.046344444
+DEBUG (0): LQI Root is receiving packet from node 1 @1:23:6.051164651
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:6.052951461
+DEBUG (0): LQI Root is receiving packet from node 3 @1:23:6.060655562
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:23:6.066989465
+DEBUG (0): LQI Root is receiving packet from node 5 @1:23:6.070726304
+DEBUG (0): LQI Root is receiving packet from node 6 @1:23:6.079713678
+DEBUG (0): LQI Root is receiving packet from node 1 @1:23:11.010011937
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:11.015861336
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:11.018924560
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:23:11.022241363
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:11.025546836
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:23:11.030260113
+DEBUG (0): LQI Root is receiving packet from node 2 @1:23:11.034717315
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:23:11.036706610
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:23:11.039003348
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:23:11.039809838
+DEBUG (0): LQI Root is receiving packet from node 3 @1:23:11.044107080
+DEBUG (0): LQI Root is receiving packet from node 6 @1:23:11.049493401
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:23:11.057143721
+DEBUG (0): LQI Root is receiving packet from node 5 @1:23:11.063201425
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 307.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 919.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 919.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 307.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 307.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 307.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 307.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 557.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 919.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 557.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 919.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 557.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 557.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 557.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 961.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 144 and my cost to 961.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 961.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 961.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 961.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 961.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 307.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:23:16.008462757
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:16.012229765
+DEBUG (0): LQI Root is receiving packet from node 1 @1:23:16.014147044
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:23:16.017844967
+DEBUG (0): LQI Root is receiving packet from node 2 @1:23:16.020525181
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:16.031526585
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:16.034061191
+DEBUG (0): LQI Root is receiving packet from node 3 @1:23:16.040636148
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:16.044618668
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:23:16.050338341
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:23:16.058745885
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:23:16.061309347
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:23:16.066787220
+DEBUG (0): LQI Root is receiving packet from node 6 @1:23:16.076674857
+DEBUG (0): LQI Root is receiving packet from node 5 @1:23:16.083983775
+DEBUG (0): LQI Root is receiving packet from node 1 @1:23:21.007311147
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:21.008823301
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:21.013904448
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:23:21.016372475
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:23:21.020410319
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:21.024238362
+DEBUG (0): LQI Root is receiving packet from node 2 @1:23:21.026620610
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:23:21.027633396
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:21.032350555
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:23:21.037050235
+DEBUG (0): LQI Root is receiving packet from node 5 @1:23:21.039611475
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:23:21.043077421
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:23:21.067801950
+DEBUG (0): LQI Root is receiving packet from node 6 @1:23:21.070359977
+DEBUG (0): LQI Root is receiving packet from node 3 @1:23:21.078782779
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:26.012178554
+DEBUG (0): LQI Root is receiving packet from node 1 @1:23:26.022615623
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:23:26.032388398
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:23:26.035369557
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:26.047950382
+DEBUG (0): LQI Root is receiving packet from node 2 @1:23:26.050530993
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:23:26.055030419
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:23:26.062331679
+DEBUG (0): LQI Root is receiving packet from node 3 @1:23:26.064658658
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:26.076709257
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:26.089419754
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:26.091723818
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:26.098376611
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:26.104113883
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:23:26.108020110
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:26.117800936
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:23:26.117800936
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:23:26.117800936
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:23:26.117800936
+DEBUG (0): LQI Root is receiving packet from node 6 @1:23:26.117800936
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:23:26.121096816
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:23:26.122256477
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 432.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 1000.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 144 and my cost to 961.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 88 that advertises 1000.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 1000.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 1000.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 1000.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 1000.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1000.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 1669.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1669.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 1669.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 1669.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 144 and my cost to 961.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 1669.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 1000.
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:31.010713719
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:31.013084252
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:23:31.019382321
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:23:31.025390367
+DEBUG (0): LQI Root is receiving packet from node 1 @1:23:31.027483148
+DEBUG (0): LQI Root is receiving packet from node 2 @1:23:31.033105557
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:23:31.045364005
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 1105.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 1000.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 1105.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 1000.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 1105.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:23:31.059655695
+DEBUG (0): LQI Root is receiving packet from node 5 @1:23:31.065118310
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:31.084405307
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:23:36.009220027
+DEBUG (0): LQI Root is receiving packet from node 1 @1:23:36.012499105
+DEBUG (0): LQI Root is receiving packet from node 2 @1:23:36.015344430
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:36.017082032
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:23:36.019408956
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:36.021822052
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:36.028833121
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:23:36.029527696
+DEBUG (0): LQI Root is receiving packet from node 3 @1:23:36.037591615
+DEBUG (0): LQI Root is receiving packet from node 6 @1:23:36.043115264
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:23:41.006137770
+DEBUG (0): LQI Root is receiving packet from node 1 @1:23:41.012987383
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:41.019250658
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:41.022025850
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:41.031877536
+DEBUG (0): LQI Root is receiving packet from node 2 @1:23:41.041894568
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:23:41.042586922
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:23:41.046645736
+DEBUG (0): LQI Root is receiving packet from node 5 @1:23:41.049813834
+DEBUG (0): LQI Root is receiving packet from node 5 @1:23:41.059899834
+DEBUG (0): LQI Root is receiving packet from node 6 @1:23:41.064401151
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 273.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 1000.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 273.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 273.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 273.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 273.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 1125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 144 and my cost to 961.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 1125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1155 and my cost to 1000.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 1125.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 273.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1125.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 1125.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:23:46.017312803
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:23:46.020446548
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:46.022296733
+DEBUG (0): LQI Root is receiving packet from node 1 @1:23:46.025606328
+DEBUG (0): LQI Root is receiving packet from node 2 @1:23:46.031786102
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:46.040880169
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:23:46.045900281
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:46.048418085
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:46.051711624
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:46.054191190
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:23:46.058623815
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:23:46.070769741
+DEBUG (0): LQI Root is receiving packet from node 3 @1:23:46.073501048
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:23:46.075377868
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:23:46.084624640
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:46.084624640
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:23:46.084624640
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:23:46.084624640
+DEBUG (0): LQI Root is receiving packet from node 6 @1:23:46.084624640
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:23:46.092376060
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:46.101424469
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 65534.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 0, my link to 343 and my cost to 65534.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 92 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 5 @1:23:51.007537688
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:23:51.007537688
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:23:51.007537688
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:51.008226551
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:23:51.010980442
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:51.012195474
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:23:51.019763789
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:51.026633978
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:23:51.032935821
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:23:51.036079113
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:23:51.036079113
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:23:51.036079113
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:23:51.036079113
+DEBUG (0): LQI Root is receiving packet from node 3 @1:23:51.036079113
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:23:51.036079113
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:23:51.041007673
+DEBUG (0): LQI Root is receiving packet from node 3 @1:23:51.043311737
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:23:51.043311737
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:51.043311737
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:23:51.059104491
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:23:51.067069533
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:23:51.069205751
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:23:51.073981724
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:51.073981724
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:51.073981724
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:23:51.073981724
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:23:51.073981724
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:23:51.075950096
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:23:51.080161497
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:23:51.080161497
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:51.080161497
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:23:51.080161497
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:23:51.092521044
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:23:51.092521044
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:51.092521044
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:23:51.092521044
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:51.097037620
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:23:56.005800535
+DEBUG (0): LQI Root is receiving packet from node 1 @1:23:56.005800535
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:23:56.009187849
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:23:56.014604687
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:23:56.014604687
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:23:56.014604687
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:23:56.014604687
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:23:56.014604687
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:56.018466799
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:23:56.019929973
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:23:56.022325589
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:23:56.022325589
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:23:56.022325589
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:23:56.022325589
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:23:56.023195335
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:23:56.025333214
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:23:56.032915127
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:23:56.032915127
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:56.032915127
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:23:56.032915127
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:23:56.032915127
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:23:56.035510767
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:23:56.037096011
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:23:56.040925945
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:23:56.040925945
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:23:56.040925945
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:56.040925945
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:23:56.040925945
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:56.042802765
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:56.043307963
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:23:56.046007092
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:23:56.046007092
+DEBUG (0): LQI Root is receiving packet from node 4 @1:23:56.046007092
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:23:56.046007092
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:23:56.046007092
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:56.046007092
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:23:56.049074090
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:23:56.049074090
+DEBUG (0): LQI Root is receiving packet from node 6 @1:23:56.049074090
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:23:56.049074090
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:23:56.049074090
+DEBUG (0): LQI Root is receiving packet from node 1 @1:23:56.051378154
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:23:56.051378154
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:23:56.051378154
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:56.052676805
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:23:56.054887655
+DEBUG (0): LQI Root is receiving packet from node 6 @1:23:56.054887655
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:23:56.054887655
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:23:56.054887655
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:23:56.055986282
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:23:56.059238046
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4096 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:1.007434759
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:1.009386330
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:1.029311853
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:1.035165482
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:1.046068127
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 855.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 855.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 855.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 855.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 1728.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1728.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 2340.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 2340.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 2340.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 2340.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 2340.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:24:6.007148618
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:6.013307816
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:6.016330581
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:24:6.017366512
+DEBUG (0): LQI Root is receiving packet from node 3 @1:24:6.018274101
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:6.020644911
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:6.023797750
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:6.031701757
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:6.041429482
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:24:11.006629822
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:11.006868644
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:11.009109334
+DEBUG (0): LQI Root is receiving packet from node 3 @1:24:11.018594533
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:11.025058558
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:24:11.033815390
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:11.039880420
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:11.050767806
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:11.055062826
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:16.006593988
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:16.010822191
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:24:16.016761599
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:16.019546285
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:16.022851711
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:24:16.025392588
+DEBUG (0): LQI Root is receiving packet from node 3 @1:24:16.029443469
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:16.034410480
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:16.038842828
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 64 that advertises 189.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 76 that advertises 189.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 82 that advertises 189.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 189.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 189.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 95 that advertises 189.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 980.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 980.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 1000 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 980.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 189.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 980.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 1855.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1855.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 1855.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 1855.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 1855.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 189.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:24:21.007272578
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:24:21.007942070
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:21.017638947
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:24:21.022575164
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:21.027437372
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:24:21.032523836
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:21.033647663
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:24:21.044299779
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:21.052005422
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:24:21.054002651
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:24:21.067462485
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:21.074206831
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:24:21.074759918
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:24:21.083686257
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:24:21.088965767
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:24:21.088965767
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:21.088965767
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:24:21.088965767
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:21.088965767
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:24:21.093756999
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:21.096793480
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:21.108588456
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:24:26.007409906
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:26.007409906
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:24:26.007409906
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:24:26.007409906
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:24:26.008913310
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:24:26.013918046
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:24:26.016773084
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:24:26.021705418
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:26.024875453
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:24:26.024875453
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:24:26.027671569
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:24:26.031101003
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:24:26.034869902
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:26.037963536
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:24:26.042636580
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:24:26.042636580
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:24:26.042636580
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:26.042636580
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:24:26.044650729
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:24:26.047423930
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:24:26.047423930
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:24:26.047423930
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:24:26.047423930
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:24:26.049884463
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:26.053466375
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:24:26.053679997
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:24:26.053679997
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:26.058215713
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:24:26.060454859
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:24:26.066237907
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:24:26.066237907
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:24:26.066237907
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:26.066237907
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:24:26.066237907
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:24:26.071399230
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:24:26.071399230
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:24:26.071399230
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:26.071399230
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:24:26.080325569
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:24:26.080325569
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:26.080325569
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:24:26.080325569
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:24:26.080325569
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:24:26.090869331
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:24:26.090869331
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:26.090869331
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:24:26.098956442
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:24:26.098956442
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:26.098956442
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:24:26.098956442
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:26.098956442
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:24:31.007204336
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:24:31.007204336
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:31.007204336
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:24:31.007204336
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:24:31.008272327
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:24:31.009479425
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:31.009479425
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:24:31.009479425
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:24:31.009479425
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:24:31.009479425
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:31.011880705
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:24:31.011880705
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:24:31.011880705
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:24:31.012679870
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:31.016589979
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:24:31.016589979
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:24:31.016589979
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:24:31.016589979
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:31.018976001
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:24:31.018976001
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:24:31.018976001
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:24:31.018976001
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:24:31.020210065
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:24:31.020210065
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:31.022857423
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:24:31.022857423
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:24:31.022857423
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:24:31.022857423
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:31.024783901
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:24:31.024783901
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:24:31.024783901
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:24:31.026696903
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:31.026696903
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:24:31.026696903
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:24:31.026696903
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:24:31.027457948
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:24:31.027457948
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:31.031310742
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:24:31.031310742
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:24:31.032342622
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:31.033266077
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:24:31.033266077
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:24:31.035041522
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:31.035628954
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:24:31.035628954
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:24:31.035628954
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:24:31.037713685
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:24:31.037713685
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:24:31.037713685
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:24:31.037713685
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:31.038896538
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:24:31.038896538
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:24:31.044219603
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:24:31.044219603
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:24:31.044219603
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:31.045961316
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:31.045961316
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:24:31.046449594
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:24:31.046449594
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:24:31.046449594
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:24:31.046449594
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:24:31.051833694
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:24:31.051833694
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:24:31.051833694
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:24:31.051833694
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:31.051833694
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:24:31.057403119
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:24:31.057403119
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:24:31.057403119
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:24:31.057403119
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:31.057403119
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:24:31.060851586
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:24:31.060851586
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:24:31.060851586
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:24:31.060851586
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:31.060851586
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 62 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4913 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 926.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4913 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 926.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 926.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 2197.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 2197.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 2197.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 2197.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 2866.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 2866.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 2866.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 72 that advertises 2866.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 2866.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:36.010089773
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:36.015502729
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:24:36.020896707
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:36.024011372
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:24:36.029176746
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:36.033235678
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:36.035753245
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:36.040246629
+DEBUG (0): LQI Root is receiving packet from node 3 @1:24:36.050042714
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:41.005359576
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:41.008531843
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:24:41.010957858
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:41.014245804
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:24:41.014991590
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:41.018571949
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:41.020629652
+DEBUG (0): LQI Root is receiving packet from node 3 @1:24:41.023170253
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:41.056861463
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:46.005283283
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:24:46.007417839
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:46.010019144
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:46.014971014
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:46.017549616
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:46.019927752
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:46.034530328
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:24:46.046973825
+DEBUG (0): LQI Root is receiving packet from node 3 @1:24:46.055183006
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 66 that advertises 243.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 2197.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 243.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 243.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 243.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 1051.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 669 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 1051.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 1051.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1051.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 1051.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 1852.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 189 and my cost to 1852.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1852.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 1852.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 1852.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 1852.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 243.
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:51.007247772
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:24:51.009912333
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:24:51.013496237
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:51.016573178
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:24:51.017749641
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:24:51.021676791
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:51.025484258
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:24:51.030908304
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:51.035356637
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:24:51.039354299
+DEBUG (0): LQI Root is receiving packet from node 3 @1:24:51.041780550
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:24:51.045091570
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:24:51.050371080
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:51.057557928
+DEBUG (0): LQI Root is receiving packet from node 1 @1:24:56.009645728
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:24:56.010766820
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:24:56.014137103
+DEBUG (0): LQI Root is receiving packet from node 2 @1:24:56.017022887
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:24:56.024574053
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:24:56.025192004
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:24:56.031282446
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:24:56.033660582
+DEBUG (0): LQI Root is receiving packet from node 3 @1:24:56.037192998
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:24:56.045198381
+DEBUG (0): LQI Root is receiving packet from node 5 @1:24:56.051704022
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:24:56.053346526
+DEBUG (0): LQI Root is receiving packet from node 6 @1:24:56.060090872
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:24:56.063235825
+DEBUG (0): LQI Root is receiving packet from node 4 @1:24:56.067981281
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:1.006614563
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:1.011019011
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:1.015985296
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:25:1.018939819
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:1.023416283
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:1.024011372
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:1.025726058
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:1.028985708
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:25:1.030578325
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:25:1.033357629
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:25:1.038774468
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:25:1.042116123
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:1.049188227
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:1.056085159
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:1.061364670
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 61 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 189 and my cost to 1852.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 926.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 73 that advertises 295.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 189 and my cost to 1852.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 295.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 1000 and my cost to 295.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 295.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 512 and my cost to 295.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 295.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 295.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 295.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:6.010759613
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:6.016412539
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:6.017536019
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:6.024528277
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:25:6.027988228
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:6.031203931
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:25:6.040727582
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:6.048776242
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:6.050128602
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:25:6.050828841
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:6.054452478
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:25:6.060092533
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:6.062737953
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:25:6.066867396
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:6.070626700
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:6.077096389
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 807.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 465 and my cost to 807.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 807.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 42 and my cost to 807.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 807.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 807.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 1272.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 42 and my cost to 807.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 1272.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 512 and my cost to 295.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 1272.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 295.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 1272.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 243.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:11.024890712
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:11.028017203
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:11.028863639
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:11.031287881
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:25:11.033342371
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:25:11.038034117
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:25:11.040529218
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:25:11.046065905
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:11.051965310
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:11.052581370
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:11.057000681
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:25:11.057961979
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:11.063287266
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:11.067040906
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:25:11.071618516
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:11.074792326
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:11.106026884
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:16.007730339
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:16.009113216
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:16.011080046
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:25:16.014375807
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:25:16.016280923
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:16.019904891
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:25:16.023393698
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:16.026048830
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:25:16.029559874
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:16.030977272
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:16.039828979
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:16.043048565
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:16.045261077
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:25:16.054050088
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:16.060290896
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:25:16.072955617
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:25:16.078601336
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:25:16.078601336
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:16.078601336
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:25:16.078601336
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:16.078601336
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:16.083072135
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:25:16.087558193
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 66 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 465 and my cost to 807.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 42 and my cost to 807.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 295.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:21.007387440
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:25:21.007387440
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:25:21.007387440
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:25:21.007387440
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:21.009713970
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:25:21.009713970
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:25:21.009713970
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:25:21.012561683
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:25:21.015932194
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:25:21.018440056
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:21.021838972
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:25:21.021838972
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:25:21.021838972
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:25:21.021838972
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:25:21.023622579
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:21.026920119
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:25:21.026920119
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:25:21.030368585
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:21.030368585
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:21.030368585
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:25:21.030368585
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:25:21.030368585
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:21.033740758
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:25:21.033740758
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:21.033740758
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:25:21.036670429
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:21.036670429
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:25:21.036670429
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:25:21.036670429
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:21.040713984
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:21.040713984
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:25:21.040713984
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:25:21.042831061
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:25:21.042831061
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:25:21.042831061
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:21.042831061
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:21.047210308
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:25:21.047210308
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:25:21.047210308
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:25:21.047210308
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:25:21.049491510
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:25:21.050460411
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:25:21.052367748
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:25:21.052367748
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:21.052367748
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:21.052367748
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:25:21.055961199
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:25:21.055961199
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:21.055961199
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:21.055961199
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:25:21.055961199
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:25:21.058204228
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:21.058204228
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:25:21.058204228
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:21.058204228
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:25:21.059951322
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:25:21.062827614
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:25:21.062827614
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:25:21.062827614
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:21.063102271
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:25:21.065925130
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:21.065925130
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:25:21.065925130
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:25:21.065925130
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:25:21.068641179
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:21.068641179
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:21.068641179
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:25:21.068641179
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:25:21.070037323
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:25:21.074866729
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:21.074866729
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:25:21.074866729
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:21.074866729
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:21.074866729
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:25:21.076995290
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:25:21.076995290
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:21.076995290
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:25:21.076995290
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:25:21.079802891
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:21.079802891
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:25:21.079802891
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:25:21.079802891
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:21.081809437
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:21.081809437
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:25:21.081809437
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:25:21.081809437
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:25:21.083251357
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:25:21.087401724
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:21.087401724
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:25:21.087401724
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:25:21.087401724
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:25:21.087401724
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:25:21.090613707
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:25:21.090613707
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:25:21.090613707
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:21.090613707
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:21.090613707
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:21.090613707
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:25:21.094542795
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:25:21.094542795
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:25:21.094542795
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:21.094542795
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:25:21.094542795
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:25:21.098517714
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:25:21.098517714
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:21.098517714
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:25:21.098517714
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:21.098517714
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:25:21.098517714
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:25:21.106879481
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:25:21.106879481
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:25:21.106879481
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:21.106879481
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:21.106879481
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:25:21.106879481
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 77 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:26.006671824
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:25:26.007644499
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:25:26.008577501
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:26.008577501
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:25:26.008577501
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:25:26.011810124
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:26.011810124
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:25:26.011810124
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:26.011810124
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:25:26.011810124
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:25:26.014131667
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:26.014131667
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:25:26.014131667
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:25:26.014131667
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:25:26.014131667
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:26.016176333
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:25:26.016176333
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:25:26.016176333
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:25:26.017562654
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:25:26.018419362
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:26.018419362
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:25:26.018419362
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:25:26.018419362
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:25:26.018419362
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:25:26.021545174
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:25:26.021545174
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:26.021545174
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:26.021545174
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:25:26.022035674
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:25:26.026412700
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:26.026412700
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:25:26.026412700
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:25:26.026412700
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:26.028472624
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:26.028472624
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:25:26.028472624
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:25:26.028472624
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:25:26.030809427
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:26.030809427
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:25:26.030809427
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:26.030809427
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:25:26.030809427
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:25:26.030809427
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:31.007587346
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:25:31.007587346
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:25:31.007587346
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:25:31.009142073
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:31.009561383
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:31.009561383
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:25:31.009561383
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:25:31.012499105
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:25:31.012499105
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:25:31.012499105
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:25:31.012499105
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:31.012499105
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:31.018297411
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:25:31.018297411
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:25:31.021791653
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:25:31.021791653
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:31.021791653
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:25:31.021791653
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:25:31.023973647
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:31.023973647
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:25:31.023973647
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:25:31.023973647
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:25:31.028396331
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:31.028396331
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:25:31.028396331
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:31.028673327
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:25:31.031951608
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:25:31.031951608
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:31.031951608
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:25:31.031951608
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:25:31.033205161
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:25:31.038634918
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:25:31.038634918
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:31.038634918
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:31.038634918
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:25:31.038634918
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:25:31.041640882
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:25:31.041640882
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:31.041640882
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:31.041640882
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:25:31.041640882
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:25:31.041640882
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:25:31.051833694
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:25:31.051833694
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:31.051833694
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:25:31.051833694
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:25:31.051833694
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:36.008003105
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:36.008003105
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:25:36.008003105
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:25:36.008003105
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:25:36.008003105
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:25:36.010806932
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:36.010806932
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:25:36.011385101
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:36.017444467
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:25:36.017444467
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:25:36.017444467
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:25:36.017444467
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:25:36.019685834
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:25:36.023241111
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:36.023241111
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:25:36.023241111
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:25:36.023241111
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:36.023241111
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:36.028869350
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:36.028869350
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:25:36.028869350
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:25:36.028869350
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:25:36.030292292
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:36.031923312
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:25:36.031923312
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:36.031923312
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:25:36.031923312
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:25:36.036928165
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:36.036928165
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:36.036928165
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:36.036928165
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:25:36.036928165
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:25:36.038318368
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:36.040145530
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:25:36.040145530
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:36.040145530
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:25:36.040145530
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:25:36.040145530
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:25:36.043593996
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:25:36.043593996
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:36.043593996
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:25:36.043593996
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:36.043593996
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:25:36.043593996
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:25:36.048999458
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:25:36.048999458
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:25:36.048999458
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:25:36.048999458
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:25:36.053577068
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:25:36.053577068
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:25:36.053577068
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:25:36.054523108
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:25:36.054523108
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:25:36.059177011
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:36.059177011
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:25:36.059177011
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:25:36.064731178
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:25:36.064731178
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:25:36.064731178
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:36.064731178
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:25:36.071231384
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:25:36.071231384
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:25:36.071231384
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:36.071231384
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:25:36.071231384
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 5355 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 855.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 855.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 855.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 855.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 1235.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 1235.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 1235.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 104 that advertises 5355.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 5355.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 855.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 5355.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 5355.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 58 that advertises 5355.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:41.007476653
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:41.016013923
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:41.026659060
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:41.034105424
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:41.037967418
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:41.040811201
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:41.050119008
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:41.060494924
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:41.068612552
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:46.005746708
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:46.007829824
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:46.010378145
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:46.013141513
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:46.018302728
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:46.020953968
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:46.022262333
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:46.030368585
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:46.047443071
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:51.007324066
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:51.013735059
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:51.015932194
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:51.021674900
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:51.026086555
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:51.032495209
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:25:51.034747832
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:51.037820495
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:51.058663880
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 980.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 1241 and my cost to 980.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 980.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 980.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 980.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 980.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 1781.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 1241 and my cost to 980.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1781.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 1781.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 1781.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:25:56.006853386
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:25:56.007623528
+DEBUG (0): LQI Root is receiving packet from node 2 @1:25:56.013177695
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:25:56.015525644
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:25:56.018756715
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:25:56.022346283
+DEBUG (0): LQI Root is receiving packet from node 4 @1:25:56.026431841
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:25:56.034746171
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:25:56.037719396
+DEBUG (0): LQI Root is receiving packet from node 3 @1:25:56.052905685
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:25:56.054198792
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:25:56.059694146
+DEBUG (0): LQI Root is receiving packet from node 5 @1:25:56.063064097
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:25:56.065706073
+DEBUG (0): LQI Root is receiving packet from node 6 @1:25:56.074922328
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:26:1.006173952
+DEBUG (0): LQI Root is receiving packet from node 1 @1:26:1.010545991
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:26:1.013065220
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:26:1.018165399
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:26:1.019487471
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:26:1.029594166
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:26:1.031676951
+DEBUG (0): LQI Root is receiving packet from node 2 @1:26:1.036638368
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:26:1.038682916
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:1.064439720
+DEBUG (0): LQI Root is receiving packet from node 3 @1:26:1.071290876
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:1.072661819
+DEBUG (0): LQI Root is receiving packet from node 5 @1:26:1.080901517
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:1.087020256
+DEBUG (0): LQI Root is receiving packet from node 6 @1:26:1.094222362
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:26:6.006889220
+DEBUG (0): LQI Root is receiving packet from node 1 @1:26:6.016756282
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:26:6.019748530
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:26:6.024545426
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:26:6.026656839
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:6.029804014
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:26:6.035310743
+DEBUG (0): LQI Root is receiving packet from node 2 @1:26:6.036838274
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:26:6.039934129
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:6.046289074
+DEBUG (0): LQI Root is receiving packet from node 6 @1:26:6.050729356
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:6.054086270
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:6.064492703
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:26:6.071618516
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:26:6.071618516
+DEBUG (0): LQI Root is receiving packet from node 5 @1:26:6.071618516
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:26:6.071618516
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:26:6.071618516
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:26:6.075387415
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:26:6.077767772
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:6.080361751
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 1241 and my cost to 980.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 926 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 65534.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 0, my link to 1000 and my cost to 65534.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 854.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 854.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 854.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 854.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 854.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 854.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 3, my link to 669 and my cost to 854.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 854.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:26:11.008623395
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:26:11.010271216
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:26:11.016162736
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:11.023715792
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:11.028751163
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:26:11.029327111
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:26:11.031778050
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:11.037795690
+DEBUG (0): LQI Root is receiving packet from node 6 @1:26:11.040363034
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:26:11.046950910
+DEBUG (0): LQI Root is receiving packet from node 5 @1:26:11.050311706
+DEBUG (0): LQI Root is receiving packet from node 3 @1:26:11.055305075
+DEBUG (0): LQI Root is receiving packet from node 2 @1:26:11.057956315
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 107 that advertises 1415.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 854.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 1415.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 1415.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 3, my link to 669 and my cost to 854.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:26:16.010883226
+DEBUG (0): LQI Root is receiving packet from node 3 @1:26:16.017036256
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:26:16.019029710
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:26:16.024469133
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:26:16.031524364
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:16.045503673
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:16.047639773
+DEBUG (0): LQI Root is receiving packet from node 1 @1:26:16.053331386
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:26:16.054979207
+DEBUG (0): LQI Root is receiving packet from node 6 @1:26:16.069581901
+DEBUG (0): LQI Root is receiving packet from node 2 @1:26:16.073686492
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:16.079484680
+DEBUG (0): LQI Root is receiving packet from node 5 @1:26:16.082994181
+DEBUG (0): LQI Root is receiving packet from node 3 @1:26:21.007377498
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:26:21.009826493
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:26:21.016664612
+DEBUG (0): LQI Root is receiving packet from node 1 @1:26:21.021608549
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:26:21.029437805
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:21.044025122
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:26:21.046609507
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:21.051623955
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:26:21.058490370
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:21.067126794
+DEBUG (0): LQI Root is receiving packet from node 5 @1:26:21.073306567
+DEBUG (0): LQI Root is receiving packet from node 6 @1:26:21.080737554
+DEBUG (0): LQI Root is receiving packet from node 2 @1:26:21.089938550
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 854.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 307.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 307.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 1241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 854.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 1241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1241.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:26:26.007423275
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:26:26.010284254
+DEBUG (0): LQI Root is receiving packet from node 1 @1:26:26.017732839
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:26:26.021325841
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:26.023929414
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:26:26.035280226
+DEBUG (0): LQI Root is receiving packet from node 2 @1:26:26.040597579
+DEBUG (0): LQI Root is receiving packet from node 5 @1:26:26.045816054
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:26.047351519
+DEBUG (0): LQI Root is receiving packet from node 6 @1:26:26.054996127
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:26:26.066562222
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:26.070453190
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 888.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 165 and my cost to 888.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 888.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 888.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 888.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 888.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:26:31.006380366
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:26:31.008167177
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:26:31.011901676
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:26:31.014436841
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:26:31.021936189
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:31.026065632
+DEBUG (0): LQI Root is receiving packet from node 3 @1:26:31.032645906
+DEBUG (0): LQI Root is receiving packet from node 2 @1:26:31.035068265
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:31.040984758
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:26:31.047639773
+DEBUG (0): LQI Root is receiving packet from node 5 @1:26:31.052535594
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:31.055513262
+DEBUG (0): LQI Root is receiving packet from node 6 @1:26:31.062669592
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:26:36.013033041
+DEBUG (0): LQI Root is receiving packet from node 1 @1:26:36.019533365
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:26:36.025298815
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:26:36.027383545
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:26:36.030154964
+DEBUG (0): LQI Root is receiving packet from node 3 @1:26:36.032844269
+DEBUG (0): LQI Root is receiving packet from node 2 @1:26:36.036462471
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:36.040902753
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:26:36.043548220
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:36.047565140
+DEBUG (0): LQI Root is receiving packet from node 6 @1:26:36.054477331
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:36.057117087
+DEBUG (0): LQI Root is receiving packet from node 5 @1:26:36.064822730
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 68 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 165 and my cost to 888.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 854.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:26:41.008592878
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:26:41.011321845
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:26:41.018771973
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:26:41.021249547
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:41.023532688
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:41.027560985
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:26:41.032686247
+DEBUG (0): LQI Root is receiving packet from node 3 @1:26:41.035728163
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:26:41.039659473
+DEBUG (0): LQI Root is receiving packet from node 2 @1:26:41.045718838
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:41.048768916
+DEBUG (0): LQI Root is receiving packet from node 6 @1:26:41.058503967
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 72 that advertises 349.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 165 and my cost to 888.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 349.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 854.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 349.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 349.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 349.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 819.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 165 and my cost to 888.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 819.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 819.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 819.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 819.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1053.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 819.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 1053.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 1053.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 72 that advertises 1053.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 1053.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:26:46.007812344
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:26:46.008943709
+DEBUG (0): LQI Root is receiving packet from node 1 @1:26:46.009798315
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:26:46.017694270
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:46.028720646
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:26:46.032981597
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:26:46.036380513
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:26:46.037996274
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:26:46.040565171
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:46.043038971
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:46.046754768
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:46.049584953
+DEBUG (0): LQI Root is receiving packet from node 6 @1:26:46.057687323
+DEBUG (0): LQI Root is receiving packet from node 5 @1:26:46.066598404
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:26:51.007005855
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:26:51.016296182
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:26:51.019174364
+DEBUG (0): LQI Root is receiving packet from node 1 @1:26:51.025469000
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:51.026798050
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:26:51.028472624
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:26:51.031165812
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:26:51.035648096
+DEBUG (0): LQI Root is receiving packet from node 2 @1:26:51.041811067
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:51.051805516
+DEBUG (0): LQI Root is receiving packet from node 6 @1:26:51.058305722
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:26:51.060142083
+DEBUG (0): LQI Root is receiving packet from node 3 @1:26:51.064322967
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:51.072711478
+DEBUG (0): LQI Root is receiving packet from node 5 @1:26:51.080417121
+DEBUG (0): LQI Root is receiving packet from node 1 @1:26:56.009615210
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:26:56.016010149
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:26:56.019622578
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:26:56.026994752
+DEBUG (0): LQI Root is receiving packet from node 4 @1:26:56.030231257
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:26:56.032907194
+DEBUG (0): LQI Root is receiving packet from node 2 @1:26:56.037927306
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:26:56.040015858
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:26:56.045356403
+DEBUG (0): LQI Root is receiving packet from node 3 @1:26:56.051383589
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:26:56.057403119
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:26:56.058473450
+DEBUG (0): LQI Root is receiving packet from node 5 @1:26:56.064681519
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:26:56.067613411
+DEBUG (0): LQI Root is receiving packet from node 6 @1:26:56.076448198
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 819.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 216.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 216.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 474.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 165 and my cost to 888.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 474.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 106 and my cost to 819.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 474.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 474.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 474.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 474.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 103 that advertises 925.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 307 and my cost to 925.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 925.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 474.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 925.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 349.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 925.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 925.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 216.
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:27:1.011217256
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:27:1.016214176
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:27:1.016803601
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:27:1.018768091
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:27:1.022323368
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:1.023544064
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:1.024889169
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:27:1.036010422
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:27:1.039024042
+DEBUG (0): LQI Root is receiving packet from node 2 @1:27:1.040346232
+DEBUG (0): LQI Root is receiving packet from node 2 @1:27:1.046775462
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:27:1.050956346
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:27:1.053580842
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:1.058173711
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:27:1.059943720
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:27:1.064307708
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:27:1.070441706
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:27:1.077582777
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:27:1.077582777
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:27:1.077582777
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:1.077582777
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:27:1.077582777
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:27:1.077582777
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:27:1.081000726
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:27:1.085273162
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:27:1.086600669
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:1.091864920
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:1.099219614
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:27:1.101538936
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:27:1.109336132
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:27:6.007907779
+DEBUG (0): LQI Root is receiving packet from node 4 @1:27:6.007907779
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:27:6.007907779
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:6.009910443
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:27:6.009910443
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:27:6.009910443
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:27:6.009910443
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:6.014671157
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:27:6.014671157
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:27:6.014671157
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:27:6.014671157
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:27:6.014671157
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:27:6.017745758
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:6.019676011
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:27:6.019676011
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:27:6.019676011
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:27:6.019676011
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:27:6.020561015
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:27:6.020561015
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:27:6.026946754
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:6.027742546
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:27:6.029594166
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:27:6.029594166
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:27:6.031051344
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:27:6.034791947
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:6.037233457
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:27:6.038848540
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:27:6.038848540
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:27:6.039171194
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:6.039171194
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:6.039171194
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:27:6.042083385
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:27:6.042083385
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:6.042083385
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:27:6.043609255
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:27:6.045000018
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:6.045000018
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:27:6.045000018
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:27:6.045000018
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:27:6.047149273
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:6.047149273
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:27:6.047149273
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:27:6.048234862
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:27:6.048234862
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:6.052629368
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:6.052629368
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:6.054582481
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:27:6.054582481
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:27:6.055177570
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:27:6.055177570
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:27:6.057191719
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:27:6.057191719
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:6.057191719
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:6.057191719
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:27:6.058961728
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:27:6.064470119
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:6.064470119
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:27:6.064470119
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:27:11.007343207
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:27:11.007343207
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:27:11.009269577
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:27:11.009269577
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:27:11.009935643
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:11.009935643
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:27:11.010690527
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:27:11.012239589
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:11.012239589
+DEBUG (0): LQI Root is receiving packet from node 2 @1:27:11.016687196
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:27:11.016687196
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:27:11.017519099
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:27:11.017519099
+DEBUG (0): LQI Root is receiving packet from node 4 @1:27:11.018762379
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:27:11.018762379
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:27:11.018762379
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:27:11.019640176
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:27:11.019640176
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:27:11.019640176
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:27:11.022874903
+DEBUG (0): LQI Root is receiving packet from node 4 @1:27:11.022874903
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:27:11.022874903
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:27:11.022874903
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:11.025545293
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:27:11.025545293
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:27:11.025545293
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:27:11.025545293
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:11.027467771
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:27:11.027467771
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:27:11.027467771
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:11.029405626
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:27:11.029405626
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:27:11.029405626
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:27:11.029405626
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:27:11.032121793
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:27:11.032121793
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:27:11.032121793
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:11.034242634
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:27:11.034242634
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:27:11.034242634
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:27:11.034242634
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:11.034685136
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:27:11.038673092
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:11.038673092
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:27:11.038673092
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:27:11.038673092
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:27:11.038673092
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:27:11.040193527
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:27:11.041521152
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:27:11.041521152
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:27:11.041521152
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:11.041521152
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:11.044710102
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:27:11.044710102
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:27:11.044710102
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:27:11.044710102
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:27:11.047365234
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:27:11.047365234
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:11.047365234
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:27:11.051500342
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:27:11.051500342
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:27:11.051500342
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:27:11.051500342
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:27:11.056581489
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:27:11.056581489
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:27:11.057466375
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:11.057715950
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 1076.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 1728.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 108 that advertises 1728.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 2340.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 2340.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 2340.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:16.008638535
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:16.012664611
+DEBUG (0): LQI Root is receiving packet from node 4 @1:27:16.014667383
+DEBUG (0): LQI Root is receiving packet from node 2 @1:27:16.019037036
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:16.020952425
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:16.040412584
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:16.042606063
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:21.006151486
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:21.017000303
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:21.022712492
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:21.027267187
+DEBUG (0): LQI Root is receiving packet from node 4 @1:27:21.029437805
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:21.035861717
+DEBUG (0): LQI Root is receiving packet from node 2 @1:27:21.039163261
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:26.006812927
+DEBUG (0): LQI Root is receiving packet from node 2 @1:27:26.010675268
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:26.015733949
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:26.044633809
+DEBUG (0): LQI Root is receiving packet from node 4 @1:27:26.048190747
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:26.053500775
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:26.061538227
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 64 that advertises 144.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 69 that advertises 144.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 79 that advertises 144.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 144.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 144.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 144.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 144.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 110 that advertises 1331.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 144.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1331.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 2071.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2071.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 93 that advertises 2071.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 2071.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 2071.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 144.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:27:31.009881816
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:31.013429885
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:31.017394808
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:31.021034035
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:27:31.024051484
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:31.027437254
+DEBUG (0): LQI Root is receiving packet from node 2 @1:27:31.029466779
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:27:31.043153715
+DEBUG (0): LQI Root is receiving packet from node 4 @1:27:31.049150502
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:31.057451235
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:36.009081156
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:27:36.011554608
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:36.015154000
+DEBUG (0): LQI Root is receiving packet from node 4 @1:27:36.018405765
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:27:36.019853680
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:36.024843275
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:27:36.025903451
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:36.031882971
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:36.034347224
+DEBUG (0): LQI Root is receiving packet from node 2 @1:27:36.045053119
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:41.009582354
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:41.013719801
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:27:41.014896264
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:41.016029181
+DEBUG (0): LQI Root is receiving packet from node 4 @1:27:41.020938709
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:27:41.024179218
+DEBUG (0): LQI Root is receiving packet from node 2 @1:27:41.029885971
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:41.033494958
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:27:41.038759209
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:41.043367337
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 65 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 269.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 612 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 269.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1331 and my cost to 269.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 269.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 269.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 269.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 269.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:27:46.006082399
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:27:46.010429238
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:46.011324067
+DEBUG (0): LQI Root is receiving packet from node 2 @1:27:46.014711616
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:27:46.017627571
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:27:46.023071044
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:27:46.023425877
+DEBUG (0): LQI Root is receiving packet from node 4 @1:27:46.026277711
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:27:46.028358211
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:46.033037315
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:27:46.044120448
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:46.047700926
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:46.057481752
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:46.066759042
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 101 that advertises 756.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 756.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 756.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 756.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 756.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 756.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 269.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 756.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 144.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 1136.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 756.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 1136.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1136.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 269.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:27:51.005578862
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:27:51.006873961
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:51.008989486
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:51.009203226
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:27:51.011360019
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:27:51.015685834
+DEBUG (0): LQI Root is receiving packet from node 2 @1:27:51.018312669
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:27:51.020419913
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:51.024858652
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:27:51.027820383
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:51.031664032
+DEBUG (0): LQI Root is receiving packet from node 4 @1:27:51.038927173
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:27:51.041110710
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:51.046771688
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:27:56.006976998
+DEBUG (0): LQI Root is receiving packet from node 1 @1:27:56.009401589
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:27:56.010064920
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:27:56.012100039
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:27:56.017928862
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:27:56.020891272
+DEBUG (0): LQI Root is receiving packet from node 4 @1:27:56.028017203
+DEBUG (0): LQI Root is receiving packet from node 5 @1:27:56.035661811
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:27:56.038337401
+DEBUG (0): LQI Root is receiving packet from node 2 @1:27:56.042375639
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:27:56.044425622
+DEBUG (0): LQI Root is receiving packet from node 3 @1:27:56.049064267
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:27:56.054063685
+DEBUG (0): LQI Root is receiving packet from node 6 @1:27:56.061937175
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 756.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 756.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 76 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 269.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 216.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 216.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 216.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:28:1.006168287
+DEBUG (0): LQI Root is receiving packet from node 1 @1:28:1.010561250
+DEBUG (0): LQI Root is receiving packet from node 4 @1:28:1.015382999
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:1.018539210
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:28:1.028045381
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:1.030794168
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:1.033553771
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:28:1.037498172
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:28:1.039583179
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:1.045045794
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:28:1.050912460
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:28:1.061944500
+DEBUG (0): LQI Root is receiving packet from node 3 @1:28:1.064828394
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:1.073602147
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 394.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 756.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 92 that advertises 394.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 756.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 394.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 394.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 394.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 394.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 103 that advertises 846.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 380 and my cost to 756.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 846.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 144 and my cost to 394.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 846.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 269.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 75 that advertises 846.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 846.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:28:6.012514363
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:6.015947453
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:28:6.016809266
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:28:6.018497317
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:6.019836200
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:6.022866969
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:28:6.025840525
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:28:6.027972970
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:28:6.030814862
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:28:6.034797382
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:6.035514541
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:28:6.037540174
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:28:6.042380956
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:28:6.044788057
+DEBUG (0): LQI Root is receiving packet from node 3 @1:28:6.047034860
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:28:6.047538397
+DEBUG (0): LQI Root is receiving packet from node 4 @1:28:6.051276778
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:28:6.054587916
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:6.057792243
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:6.072989908
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:28:11.014365983
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:11.016708166
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:11.023378440
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:28:11.026263995
+DEBUG (0): LQI Root is receiving packet from node 1 @1:28:11.029680401
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:28:11.031787645
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:28:11.034188925
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:28:11.040469845
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:11.044198632
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:28:11.064172270
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:11.072345269
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:28:11.073611741
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:28:11.075799400
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:28:11.079318495
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:11.089578006
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:11.091729483
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:28:11.096917441
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:28:11.105706452
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:28:11.113625717
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:28:11.123009818
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:28:11.129525282
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:28:11.129525282
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:28:11.129525282
+DEBUG (0): LQI Root is receiving packet from node 4 @1:28:11.129525282
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:28:11.129525282
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:28:11.145379072
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:28:11.150048234
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:28:11.158028534
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:28:16.007486200
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:16.007486200
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:28:16.007486200
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:28:16.007486200
+DEBUG (0): LQI Root is receiving packet from node 1 @1:28:16.009737280
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:28:16.011951335
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:28:16.019548506
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:16.029817611
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:28:16.032901530
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:28:16.032901530
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:28:16.032901530
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:28:16.032901530
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:28:16.036456807
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:28:16.036456807
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:28:16.036456807
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:28:16.036456807
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:28:16.040103636
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:16.040103636
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:28:16.040103636
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:28:16.041034417
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:28:16.041034417
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:28:16.045760731
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:28:16.047290484
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:16.050521446
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:28:16.055678886
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:28:16.055678886
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:28:16.055678886
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:28:16.055678886
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:16.055678886
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:28:16.055678886
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:16.060210720
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:16.062484266
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:28:16.062484266
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:16.062484266
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:28:16.063521858
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:28:16.063521858
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:28:16.065612300
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:16.065612300
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:16.065612300
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:28:16.065612300
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:28:16.065612300
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:28:16.065612300
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:28:16.070327238
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:16.070327238
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:28:16.070327238
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:16.070327238
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:28:16.070327238
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:28:16.070327238
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:28:16.075210022
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:16.075210022
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:28:16.075210022
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:16.075210022
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:28:16.075210022
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:28:16.075210022
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 73 that advertises 926.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 2892 and my cost to 926.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 926.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 926.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 1391.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1391.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 1391.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 1391.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 1391.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 1391.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 1391.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 2120.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 1391.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 2120.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 84 that advertises 2120.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 77 that advertises 2120.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 64 that advertises 2120.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:28:21.009142191
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:21.011705534
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:21.016885559
+DEBUG (0): LQI Root is receiving packet from node 3 @1:28:21.018867300
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:21.021468881
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:21.026752274
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:21.060535035
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:28:21.070773623
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:28:21.075290198
+DEBUG (0): LQI Root is receiving packet from node 4 @1:28:21.084353866
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:21.098452905
+DEBUG (0): LQI Root is receiving packet from node 1 @1:28:26.008379256
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:26.016809266
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:26.022704836
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:28:26.035785424
+DEBUG (0): LQI Root is receiving packet from node 3 @1:28:26.042518285
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:26.048923165
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:28:26.054935092
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:26.055894729
+DEBUG (0): LQI Root is receiving packet from node 4 @1:28:26.069797066
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:26.072313091
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:26.080857963
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:31.007593011
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:28:31.010639086
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:31.015929973
+DEBUG (0): LQI Root is receiving packet from node 4 @1:28:31.017841193
+DEBUG (0): LQI Root is receiving packet from node 1 @1:28:31.022615623
+DEBUG (0): LQI Root is receiving packet from node 3 @1:28:31.026710271
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:31.031129859
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:28:31.033950497
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:31.039107938
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:31.042602180
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:31.046111681
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 72 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 1391.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 216.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 216.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 79 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 1241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1391.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 1241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 1391.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 1241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1241.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 103 that advertises 1433.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 1391.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1433.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 1433.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 1433.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 216.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:36.006014039
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:28:36.009012070
+DEBUG (0): LQI Root is receiving packet from node 3 @1:28:36.015067883
+DEBUG (0): LQI Root is receiving packet from node 1 @1:28:36.028001944
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:36.033233339
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:28:36.058581922
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:36.063692043
+DEBUG (0): LQI Root is receiving packet from node 4 @1:28:36.067506718
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:28:36.077914695
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:28:36.086505343
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:28:36.094073658
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:28:36.094073658
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:28:36.094073658
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:36.094073658
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:36.094073658
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:28:36.094073658
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:36.100695934
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:36.103488276
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:28:36.108218473
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:36.129641688
+DEBUG (0): LQI Root is receiving packet from node 4 @1:28:41.010410206
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:28:41.010410206
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:28:41.017480648
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:41.022607572
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:28:41.022607572
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:28:41.022607572
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:28:41.022607572
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:28:41.022607572
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:28:41.024825795
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:28:41.028451654
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:28:41.035379103
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:41.036964118
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:41.041946056
+DEBUG (0): LQI Root is receiving packet from node 3 @1:28:41.046668651
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:28:41.048705660
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:28:41.048705660
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:28:41.048705660
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:41.048705660
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:28:41.048705660
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:28:41.048705660
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:28:41.052690402
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:41.055022762
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:28:41.055877249
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:28:41.063582893
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:41.066346939
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:41.072740334
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:28:41.080384943
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:28:41.080384943
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:28:41.080384943
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:41.080384943
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:28:41.080384943
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:41.080384943
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:41.085344020
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:41.085344020
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:41.085344020
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:41.087663343
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:28:41.087663343
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:28:41.088609382
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:41.092408798
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:41.102601610
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:46.007150508
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:28:46.007150508
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:28:46.007936753
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:46.009078816
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:28:46.009078816
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:28:46.009876151
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:46.011537688
+DEBUG (0): LQI Root is receiving packet from node 1 @1:28:46.013277298
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:28:46.013277298
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:28:46.017841193
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:46.017841193
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:28:46.017841193
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:28:46.017841193
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:28:46.017841193
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:28:46.018434621
+DEBUG (0): LQI Root is receiving packet from node 4 @1:28:46.022508812
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:28:46.022508812
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:28:46.022508812
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:28:46.027057448
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:46.027057448
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:28:46.027057448
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:28:46.027057448
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:28:46.028429188
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:46.028429188
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:28:46.029680401
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:28:46.029680401
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:28:46.031772386
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:28:46.031772386
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:46.031772386
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:28:46.031772386
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:28:46.034534211
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:46.034534211
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:46.034534211
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:28:46.034534211
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:28:46.040103636
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:46.040103636
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:28:46.040103636
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:46.040103636
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:28:46.040103636
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:28:46.042848659
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:46.042848659
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:28:46.042848659
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:46.042848659
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:28:46.042848659
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:46.042848659
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:46.052370088
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:46.061983069
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 90 that advertises 790.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 790.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 512 and my cost to 790.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 790.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 790.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 1302.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1302.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 1302.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 90 that advertises 1302.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 1302.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 1302.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 790 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:28:51.012168730
+DEBUG (0): LQI Root is receiving packet from node 1 @1:28:51.015001532
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:28:51.022815529
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:51.027124147
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:51.032312105
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:51.034972830
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:51.038842828
+DEBUG (0): LQI Root is receiving packet from node 4 @1:28:51.048394775
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:51.052308935
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:51.060289235
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:51.063691925
+DEBUG (0): LQI Root is receiving packet from node 5 @1:28:56.007598723
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:28:56.012718043
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:28:56.017597054
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:28:56.018694019
+DEBUG (0): LQI Root is receiving packet from node 1 @1:28:56.021486479
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:28:56.031709690
+DEBUG (0): LQI Root is receiving packet from node 2 @1:28:56.035821606
+DEBUG (0): LQI Root is receiving packet from node 3 @1:28:56.046151746
+DEBUG (0): LQI Root is receiving packet from node 4 @1:28:56.056222488
+DEBUG (0): LQI Root is receiving packet from node 6 @1:28:56.063714509
+DEBUG (0): LQI Root is receiving packet from node 2 @1:29:1.008111807
+DEBUG (0): LQI Root is receiving packet from node 1 @1:29:1.010729096
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:1.013185628
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:1.016151251
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:1.021392587
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:1.027824156
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:29:1.035297146
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:29:1.040393551
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:1.051089900
+DEBUG (0): LQI Root is receiving packet from node 6 @1:29:1.070895693
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 65 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1302.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 216.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 216.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 216.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 915.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1302.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 915.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 915.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 915.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 915.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:29:6.005655156
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:6.006812927
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:6.014162185
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:6.016082560
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:29:6.018329471
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:6.028907524
+DEBUG (0): LQI Root is receiving packet from node 1 @1:29:6.037447079
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:29:6.041461660
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:6.045717295
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:6.062211949
+DEBUG (0): LQI Root is receiving packet from node 6 @1:29:6.071412945
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 1728.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1302.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1728.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 94 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 216.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:11.005454902
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:29:11.009103622
+DEBUG (0): LQI Root is receiving packet from node 1 @1:29:11.012239707
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:29:11.013324618
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:11.017144957
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:11.019195335
+DEBUG (0): LQI Root is receiving packet from node 2 @1:29:11.025148567
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:11.027284667
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:11.034059648
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:29:11.039415333
+DEBUG (0): LQI Root is receiving packet from node 6 @1:29:11.043565700
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:16.025087414
+DEBUG (0): LQI Root is receiving packet from node 1 @1:29:16.031602997
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:29:16.037097672
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:16.040771136
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:29:16.044467624
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:29:16.056634473
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:16.061149157
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:16.066321857
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:16.074115278
+DEBUG (0): LQI Root is receiving packet from node 2 @1:29:16.083575672
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:16.092242614
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 855 and my cost to 1302.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 790.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 88 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 216.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:29:21.008562360
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:21.011413398
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:29:21.013431428
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:29:21.016107365
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:21.019122924
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:21.025657421
+DEBUG (0): LQI Root is receiving packet from node 2 @1:29:21.041171745
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:21.049760732
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:21.057563363
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:21.064094086
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:29:21.066346939
+DEBUG (0): LQI Root is receiving packet from node 6 @1:29:21.073365941
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 280.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 280.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 280.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 280.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 280.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 828.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 828.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 828.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 828.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 828.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 828.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 280.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 828.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 216.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 109 that advertises 1497.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 828.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 1497.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 1497.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 280.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 1497.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:29:26.009783056
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:29:26.014983933
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:29:26.020700234
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:26.022743009
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:29:26.027332104
+DEBUG (0): LQI Root is receiving packet from node 2 @1:29:26.030343732
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:26.030952190
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:29:26.042468735
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:26.043870874
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:26.045678726
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:29:26.048326414
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:26.053842130
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:26.063317783
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:31.006395507
+DEBUG (0): LQI Root is receiving packet from node 1 @1:29:31.016344297
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:29:31.019550167
+DEBUG (0): LQI Root is receiving packet from node 6 @1:29:31.025668906
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:29:31.033990562
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:31.042823459
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:29:31.045394522
+DEBUG (0): LQI Root is receiving packet from node 2 @1:29:31.048272705
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:29:31.048892647
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:29:31.053363446
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:31.058703991
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:31.064624367
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:31.072532147
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:31.081077019
+DEBUG (0): LQI Root is receiving packet from node 1 @1:29:36.006731316
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:29:36.011352363
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:36.013740376
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:29:36.018329471
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:29:36.028934268
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:36.031375660
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:36.032159518
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:36.033632286
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:29:36.037454287
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:29:36.041765173
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:36.047916090
+DEBUG (0): LQI Root is receiving packet from node 6 @1:29:36.055347077
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:36.061587886
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 60 that advertises 307.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 828.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 307.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 307.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 77 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 280.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 405.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 828.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 405.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 90 and my cost to 828.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 405.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 405.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 405.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 77 that advertises 405.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 918.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 165 and my cost to 918.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 918.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 405.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 918.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 280.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 918.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 96 that advertises 918.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 307.
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:29:41.009921927
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:41.014564346
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:29:41.016311440
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:29:41.018640310
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:29:41.019365402
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:29:41.023208373
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:41.028495539
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:41.035913158
+DEBUG (0): LQI Root is receiving packet from node 1 @1:29:41.041078650
+DEBUG (0): LQI Root is receiving packet from node 2 @1:29:41.049303089
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:29:41.058097417
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:41.058473568
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:29:41.066031941
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:41.074464567
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:29:41.080156062
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:29:41.083518411
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:29:41.090369568
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:29:41.091483453
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:29:41.097953142
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:29:41.097953142
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:41.097953142
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:29:41.097953142
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:29:41.097953142
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:29:41.101065916
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:29:41.103858259
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:29:41.110663639
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:41.110663639
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:29:41.110663639
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:29:41.110663639
+DEBUG (0): LQI Root is receiving packet from node 6 @1:29:41.110663639
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:29:46.008777525
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:29:46.008777525
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:29:46.012542541
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:29:46.012542541
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:29:46.016189371
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:29:46.016189371
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:29:46.016189371
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:29:46.016189371
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:46.016189371
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:46.019744648
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:29:46.019744648
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:29:46.019744648
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:29:46.019744648
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:29:46.021362070
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:29:46.022247075
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:29:46.022247075
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:29:46.022247075
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:29:46.024001825
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:29:46.024001825
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:29:46.030761429
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:29:46.038238192
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:46.038238192
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:29:46.039764062
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:29:46.039764062
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:29:46.039764062
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:29:46.039764062
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:29:46.042955352
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:46.042955352
+DEBUG (0): LQI Root is receiving packet from node 6 @1:29:46.042955352
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:29:46.042955352
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:29:46.042955352
+DEBUG (0): LQI Root is receiving packet from node 6 @1:29:46.049013056
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:29:46.049013056
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:46.051683328
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:29:46.051683328
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:29:46.051683328
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:29:46.051683328
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:29:46.057329047
+DEBUG (0): LQI Root is receiving packet from node 6 @1:29:46.057329047
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:29:46.057329047
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:29:46.057954654
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:29:46.057954654
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:29:46.061281050
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:29:46.065782367
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:29:46.065782367
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:29:46.065782367
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:46.065782367
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:29:46.065782367
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:29:46.070329460
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:46.070329460
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:29:46.070329460
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:29:46.070329460
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:29:51.005287057
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:51.005287057
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:51.005287057
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:29:51.005287057
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:29:51.006021365
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:29:51.009082699
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:29:51.009082699
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:51.009082699
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:29:51.009082699
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:29:51.009082699
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:29:51.011245552
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:51.011245552
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:29:51.011245552
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:51.015720233
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:51.015720233
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:29:51.015720233
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:29:51.015720233
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:29:51.016527283
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:29:51.018451541
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:51.018451541
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:29:51.018451541
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:29:51.018451541
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:51.020370254
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:29:51.020370254
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:29:51.020370254
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:29:51.020370254
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:51.022340966
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:29:51.022340966
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:29:51.023166479
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:51.025460948
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:51.025460948
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:29:51.025460948
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:51.025460948
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:29:51.025460948
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:51.031320289
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:29:51.031320289
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:29:51.031320289
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:29:51.031320289
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:29:51.031320289
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:29:51.032520062
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:29:51.034356771
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:51.034356771
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:51.034356771
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:29:51.034356771
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:29:51.034854643
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:29:51.034854643
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:29:51.041207927
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:29:51.041207927
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:29:51.041207927
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:29:51.041207927
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:51.041207927
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 64 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4488 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 1076.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4488 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 1076.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 1076.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 1837.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1837.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 96 that advertises 1837.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 1837.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 1837.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 2302.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 2302.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 2302.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:29:56.005754759
+DEBUG (0): LQI Root is receiving packet from node 2 @1:29:56.012033292
+DEBUG (0): LQI Root is receiving packet from node 5 @1:29:56.015487470
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:29:56.018668936
+DEBUG (0): LQI Root is receiving packet from node 4 @1:29:56.023303807
+DEBUG (0): LQI Root is receiving packet from node 3 @1:29:56.027656311
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:29:56.030748392
+DEBUG (0): LQI Root is receiving packet from node 6 @1:29:56.039674731
+DEBUG (0): LQI Root is receiving packet from node 5 @1:30:1.007980190
+DEBUG (0): LQI Root is receiving packet from node 1 @1:30:1.010607026
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:30:1.022025850
+DEBUG (0): LQI Root is receiving packet from node 2 @1:30:1.025521983
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:30:1.030092268
+DEBUG (0): LQI Root is receiving packet from node 6 @1:30:1.039630616
+DEBUG (0): LQI Root is receiving packet from node 3 @1:30:1.044488547
+DEBUG (0): LQI Root is receiving packet from node 4 @1:30:1.051349298
+DEBUG (0): LQI Root is receiving packet from node 4 @1:30:6.007724675
+DEBUG (0): LQI Root is receiving packet from node 1 @1:30:6.011110563
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:30:6.013536578
+DEBUG (0): LQI Root is receiving packet from node 6 @1:30:6.018617725
+DEBUG (0): LQI Root is receiving packet from node 5 @1:30:6.022536990
+DEBUG (0): LQI Root is receiving packet from node 2 @1:30:6.024865859
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:30:6.028358211
+DEBUG (0): LQI Root is receiving packet from node 3 @1:30:6.036552133
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 61 that advertises 273.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 273.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 79 that advertises 273.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 273.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 273.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 273.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 1201.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 1201.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1837 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 1201.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 273.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1201.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 75 that advertises 1201.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1837.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 1837.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1837.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 1837.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 1837.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 1837.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 273.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:30:11.007021231
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:30:11.016300064
+DEBUG (0): LQI Root is receiving packet from node 5 @1:30:11.023238890
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:30:11.028154413
+DEBUG (0): LQI Root is receiving packet from node 4 @1:30:11.032672649
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:30:11.042299228
+DEBUG (0): LQI Root is receiving packet from node 6 @1:30:11.047334599
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:30:11.054009976
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:30:11.059363889
+DEBUG (0): LQI Root is receiving packet from node 2 @1:30:11.061593550
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:30:11.065238489
+DEBUG (0): LQI Root is receiving packet from node 3 @1:30:11.070945243
+DEBUG (0): LQI Root is receiving packet from node 1 @1:30:16.006319331
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:30:16.010932776
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:30:16.014138993
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:30:16.016666273
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:30:16.017625910
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:30:16.020150921
+DEBUG (0): LQI Root is receiving packet from node 2 @1:30:16.024163959
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:30:16.024904310
+DEBUG (0): LQI Root is receiving packet from node 5 @1:30:16.027633396
+DEBUG (0): LQI Root is receiving packet from node 4 @1:30:16.033792199
+DEBUG (0): LQI Root is receiving packet from node 6 @1:30:16.042718538
+DEBUG (0): LQI Root is receiving packet from node 1 @1:30:21.010729096
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:30:21.017190733
+DEBUG (0): LQI Root is receiving packet from node 2 @1:30:21.027459838
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:30:21.029146228
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:30:21.030799603
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:30:21.034351106
+DEBUG (0): LQI Root is receiving packet from node 4 @1:30:21.039722169
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:30:21.040870345
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:30:21.043002789
+DEBUG (0): LQI Root is receiving packet from node 5 @1:30:21.046432114
+DEBUG (0): LQI Root is receiving packet from node 3 @1:30:21.051810833
+DEBUG (0): LQI Root is receiving packet from node 6 @1:30:21.060370964
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 273.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 325.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 465 and my cost to 1837.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 325.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 325.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 325.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 325.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 325.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:30:26.011904015
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:30:26.015374948
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:30:26.017814449
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:30:26.020236809
+DEBUG (0): LQI Root is receiving packet from node 2 @1:30:26.022958522
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:30:26.023658531
+DEBUG (0): LQI Root is receiving packet from node 5 @1:30:26.025878645
+DEBUG (0): LQI Root is receiving packet from node 4 @1:30:26.031243996
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:30:26.035371778
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:30:26.039949388
+DEBUG (0): LQI Root is receiving packet from node 3 @1:30:26.047662357
+DEBUG (0): LQI Root is receiving packet from node 6 @1:30:26.052362037
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 1063.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1063.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1063.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1063.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 1063.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 1063.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 1624.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1063.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 1624.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 273.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 89 that advertises 1624.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 325.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 1624.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 65 that advertises 1624.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:30:31.006397168
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:30:31.007265252
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:30:31.008340687
+DEBUG (0): LQI Root is receiving packet from node 1 @1:30:31.010790130
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:30:31.011491912
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:30:31.015052625
+DEBUG (0): LQI Root is receiving packet from node 4 @1:30:31.022554588
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:30:31.023444910
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:30:31.027587620
+DEBUG (0): LQI Root is receiving packet from node 2 @1:30:31.031145236
+DEBUG (0): LQI Root is receiving packet from node 3 @1:30:31.037721736
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:30:31.038711212
+DEBUG (0): LQI Root is receiving packet from node 5 @1:30:31.042190195
+DEBUG (0): LQI Root is receiving packet from node 1 @1:30:36.007082266
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:30:36.014419361
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:30:36.014962963
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:30:36.018421023
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:30:36.023460168
+DEBUG (0): LQI Root is receiving packet from node 2 @1:30:36.024286029
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:30:36.027452513
+DEBUG (0): LQI Root is receiving packet from node 4 @1:30:36.032693572
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:30:36.033206704
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:30:36.039020268
+DEBUG (0): LQI Root is receiving packet from node 5 @1:30:36.041827869
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:30:36.043189667
+DEBUG (0): LQI Root is receiving packet from node 6 @1:30:36.050647398
+DEBUG (0): LQI Root is receiving packet from node 3 @1:30:36.056598291
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 67 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1063.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 125.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 125.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 325.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:30:41.010055373
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:30:41.012580715
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:30:41.019685834
+DEBUG (0): LQI Root is receiving packet from node 1 @1:30:41.024126224
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:30:41.029102113
+DEBUG (0): LQI Root is receiving packet from node 4 @1:30:41.044696505
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:30:41.049172968
+DEBUG (0): LQI Root is receiving packet from node 2 @1:30:41.058557069
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:30:41.059527961
+DEBUG (0): LQI Root is receiving packet from node 5 @1:30:41.064624367
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:30:41.066043426
+DEBUG (0): LQI Root is receiving packet from node 6 @1:30:41.071658628
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:30:41.077660961
+DEBUG (0): LQI Root is receiving packet from node 3 @1:30:41.082162278
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 450.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1063.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 450.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1063.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 450.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 450.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 450.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 1115.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1063.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1115.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 96 that advertises 1115.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 325.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 71 that advertises 1115.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 88 that advertises 1115.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:30:46.008501207
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:30:46.011895964
+DEBUG (0): LQI Root is receiving packet from node 2 @1:30:46.022188379
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:30:46.025867269
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:30:46.029525474
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:30:46.032214888
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:30:46.035773939
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:30:46.039680166
+DEBUG (0): LQI Root is receiving packet from node 1 @1:30:46.044618668
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:30:46.048480662
+DEBUG (0): LQI Root is receiving packet from node 5 @1:30:46.062501865
+DEBUG (0): LQI Root is receiving packet from node 6 @1:30:46.072542089
+DEBUG (0): LQI Root is receiving packet from node 3 @1:30:46.080995409
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:30:51.006828185
+DEBUG (0): LQI Root is receiving packet from node 1 @1:30:51.017656545
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:30:51.021117931
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:30:51.026147590
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:30:51.031360401
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:30:51.032060640
+DEBUG (0): LQI Root is receiving packet from node 2 @1:30:51.039117485
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:30:51.040185594
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:30:51.054080605
+DEBUG (0): LQI Root is receiving packet from node 5 @1:30:51.057199044
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:30:51.060779175
+DEBUG (0): LQI Root is receiving packet from node 4 @1:30:51.063775544
+DEBUG (0): LQI Root is receiving packet from node 3 @1:30:51.073205421
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:30:56.005576972
+DEBUG (0): LQI Root is receiving packet from node 1 @1:30:56.007067008
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:30:56.008325428
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:30:56.010925119
+DEBUG (0): LQI Root is receiving packet from node 2 @1:30:56.013223471
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:30:56.015659199
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:30:56.029771835
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:30:56.030206404
+DEBUG (0): LQI Root is receiving packet from node 4 @1:30:56.034366365
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:30:56.035770165
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:30:56.040897088
+DEBUG (0): LQI Root is receiving packet from node 3 @1:30:56.043460550
+DEBUG (0): LQI Root is receiving packet from node 5 @1:30:56.052234303
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1063.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 325.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 73 that advertises 201.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 561 and my cost to 1063.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 201.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1063.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 201.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 201.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 201.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 201.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 686.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 686.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 686.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 686.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 686.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 686.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 686.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 201.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 1298.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 34 and my cost to 686.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 1298.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 1298.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 201.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 1298.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 125.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:1.011232514
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:31:1.012031402
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:1.013751861
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:31:1.017837310
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:1.020021644
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:31:1.020831898
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:31:1.027301587
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:1.031282564
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:31:1.034463581
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:31:1.047265631
+DEBUG (0): LQI Root is receiving packet from node 5 @1:31:1.049760850
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:1.066423351
+DEBUG (0): LQI Root is receiving packet from node 3 @1:31:1.074556238
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:31:6.008004996
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:6.012422693
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:31:6.014510914
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:6.016679989
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:6.019229734
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:31:6.030708051
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:31:6.040290514
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:6.051408790
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:31:6.052600511
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:6.056428902
+DEBUG (0): LQI Root is receiving packet from node 3 @1:31:6.061265910
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:31:6.061755731
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:6.066362316
+DEBUG (0): LQI Root is receiving packet from node 5 @1:31:6.071535015
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:31:11.005945071
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:31:11.008376916
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:31:11.009742597
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:11.010591767
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:11.013706085
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:11.023393698
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:11.028062979
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:11.034593702
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:31:11.037574466
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:31:11.039584840
+DEBUG (0): LQI Root is receiving packet from node 3 @1:31:11.045463214
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:31:11.046207116
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:31:11.055438630
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:31:11.062793323
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:31:11.062793323
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:31:11.062793323
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:11.062793323
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:11.062793323
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:31:11.062793323
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:31:11.067248863
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:11.069186718
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:31:11.075702183
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:31:11.075702183
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:11.075702183
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:11.075702183
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:31:11.075702183
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:11.084277573
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 61 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 686.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 686.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 686.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:16.007867667
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:16.018556690
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:31:16.022935937
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:31:16.022935937
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:31:16.022935937
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:16.022935937
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:31:16.022935937
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:31:16.022935937
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:16.028474845
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:31:16.031480809
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:31:16.031480809
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:16.031480809
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:31:16.031480809
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:16.031480809
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:21.006641307
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:21.006641307
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:31:21.006641307
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:31:21.007560603
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:21.008584826
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:31:21.008584826
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:31:21.008584826
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:31:21.009124593
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:31:21.012209189
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:21.012209189
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:31:21.012209189
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:31:21.013313133
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:21.014330031
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:21.016519350
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:31:21.016519350
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:31:21.016519350
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:31:21.016519350
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:31:21.019304485
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:21.019304485
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:31:21.019304485
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:31:21.019304485
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:31:21.023515886
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:21.023515886
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:31:21.023515886
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:31:21.023515886
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:31:21.024591203
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:31:21.024591203
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:31:21.026031232
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:21.026031232
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:31:21.026031232
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:31:21.026031232
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:31:21.032037448
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:21.032037448
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:31:21.032037448
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:21.033416443
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:31:21.036996526
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:21.038179497
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:31:21.040506027
+DEBUG (0): LQI Root is receiving packet from node 3 @1:31:26.009422164
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:31:26.009422164
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:31:26.009422164
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:31:26.010207960
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:31:26.011737713
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:26.011737713
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:31:26.011737713
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:31:26.012132896
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:31:26.017398690
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:31:26.017398690
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:31:26.019029828
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:31:26.019977411
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:26.019977411
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:31:26.019977411
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:31:26.023334325
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:31:26.023334325
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:31:26.023882095
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:31:26.023882095
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:31:26.024905971
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:31:26.028320037
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:31:26.028320037
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:31:26.028320037
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:31:26.028320037
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:31:26.029909281
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:26.030702616
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:31:26.033324891
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:26.033324891
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:31:26.033324891
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:31:26.033832310
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:26.033832310
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:31:26.035689989
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:31:26.035689989
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:26.035689989
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:31:26.039550440
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:31:26.039550440
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:26.039550440
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:26.039550440
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:31:26.039550440
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:31:26.039550440
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:31:26.047561258
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:31:26.047561258
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:31:26.047561258
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:31:26.047561258
+DEBUG (0): LQI Root is receiving packet from node 3 @1:31:26.047561258
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:31:26.050067567
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:31:26.050067567
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:31:26.050067567
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:26.050067567
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:31:26.050067567
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:31:26.050067567
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:31:26.053041352
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:31:26.053041352
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:31:26.053041352
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:31:26.053041352
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:31:26.053041352
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:26.053041352
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:31:26.057284932
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:31:26.057284932
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:26.057284932
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:31:26.057284932
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:31:26.057284932
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:31:26.060411305
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:31:26.061175901
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:31:26.066575819
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:31:26.066575819
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:26.066575819
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:26.066575819
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:31:26.066575819
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:31:26.066575819
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 1000.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 3208 and my cost to 1000.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 86 that advertises 1000.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 1000.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 1000.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 109 that advertises 1000.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1000.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 96 that advertises 1790.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1790.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 1790.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 1790.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 1790.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 1790.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 1790.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:31.007669304
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:31.010439062
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:31:31.012481507
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:31.013460403
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:31:31.017169810
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:31:31.022712492
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:31.025409508
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:31:31.026431841
+DEBUG (0): LQI Root is receiving packet from node 3 @1:31:31.035861717
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:31.044955903
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:31:31.047336260
+DEBUG (0): LQI Root is receiving packet from node 5 @1:31:31.056445704
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 2402.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 1000.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 84 that advertises 2402.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 79 that advertises 2402.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1000 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 2402.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:36.005541138
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:36.007646720
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:31:36.022269990
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:31:36.025970197
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:31:36.031268849
+DEBUG (0): LQI Root is receiving packet from node 3 @1:31:36.038552913
+DEBUG (0): LQI Root is receiving packet from node 3 @1:31:36.040683467
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:36.044213891
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:36.051980569
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:31:36.053012496
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:36.057681658
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:31:36.059161752
+DEBUG (0): LQI Root is receiving packet from node 5 @1:31:36.071597593
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:41.006708006
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:41.009172708
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:31:41.010394947
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:31:41.014907640
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:31:41.020438946
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:41.026202960
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:41.031833421
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:41.038301448
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:41.042575545
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:41.049213080
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:41.054980869
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:41.062778064
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:41.071536558
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:41.076053133
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:41.079604528
+DEBUG (0): LQI Root is receiving packet from node 3 @1:31:41.083407827
+DEBUG (0): LQI Root is receiving packet from node 3 @1:31:41.086898186
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:31:41.096755307
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:31:41.103102926
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:31:41.109740460
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:41.109740460
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:31:41.109740460
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:31:41.109740460
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:41.109740460
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:41.116667910
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:41.117125671
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:31:41.119658615
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 144.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 1790.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 144.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 144.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 1125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1790.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 1125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 42 and my cost to 1790.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 1125.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1125.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 1125.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:46.006976998
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:46.008081289
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:31:46.008081289
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:46.010088112
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:31:46.015403575
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:31:46.018197807
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:46.027254268
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:31:46.032907194
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:31:46.036834392
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:46.040529337
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:46.054094321
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:31:46.054763364
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:46.060808149
+DEBUG (0): LQI Root is receiving packet from node 5 @1:31:46.070482165
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 1832.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 612 and my cost to 1790.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1832.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 1832.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 1832.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 1832.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 4, my link to 669 and my cost to 1832.
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:31:51.007058956
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:51.010364430
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:51.014787792
+DEBUG (0): LQI Root is receiving packet from node 1 @1:31:51.018053272
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:31:51.020509804
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:31:51.022865079
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:31:51.025756576
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:51.026415039
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:31:51.030601240
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:31:51.034042050
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:31:51.042205454
+DEBUG (0): LQI Root is receiving packet from node 6 @1:31:51.044878066
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:31:51.045745473
+DEBUG (0): LQI Root is receiving packet from node 3 @1:31:51.054305603
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:31:51.060683740
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:31:51.067489120
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:31:51.075164246
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:31:51.075164246
+DEBUG (0): LQI Root is receiving packet from node 2 @1:31:51.075164246
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:31:51.075164246
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:31:51.075164246
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:31:51.083388685
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:31:51.092116662
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:31:51.100112221
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:31:56.007860342
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:31:56.010476905
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:31:56.011524091
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:56.011524091
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:31:56.012626491
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:31:56.014932445
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:31:56.014932445
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:31:56.014932445
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:31:56.014932445
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:31:56.017185069
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:56.017185069
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:31:56.017185069
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:56.022601907
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:56.022601907
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:31:56.022601907
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:31:56.026080891
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:31:56.026080891
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:31:56.026080891
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:31:56.027887082
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:31:56.033450843
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:31:56.036212668
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:31:56.036212668
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:56.036212668
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:31:56.041095452
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:31:56.042106300
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:31:56.043643654
+DEBUG (0): LQI Root is receiving packet from node 4 @1:31:56.043643654
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:31:56.043643654
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:31:56.043643654
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:31:56.055320334
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:31:56.056756542
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:31:56.063544773
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:31:56.069816099
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1000.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:1.006509643
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:1.009538917
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:1.012149698
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:1.014480396
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:1.017326171
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:1.023759907
+DEBUG (0): LQI Root is receiving packet from node 3 @1:32:1.032767975
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 75 that advertises 1076.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3545 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 1076.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 1076.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 108 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 1805.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1805.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 1805.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 1805.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 88 that advertises 1805.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 1805.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 2225.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 2225.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 1076.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 2225.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 72 that advertises 2225.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 2225.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:32:6.007877262
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:6.010873631
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:6.013887528
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:6.017761017
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:32:6.022081450
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:6.024513019
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:6.028719103
+DEBUG (0): LQI Root is receiving packet from node 3 @1:32:6.039346365
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:6.046594248
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:11.007143301
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:11.009462505
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:11.011178805
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:32:11.015415059
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:11.018028071
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:11.031238331
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:32:11.034824126
+DEBUG (0): LQI Root is receiving packet from node 3 @1:32:11.040363034
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:11.048129712
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:11.050658774
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:16.006517694
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:16.021034035
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:32:16.029895566
+DEBUG (0): LQI Root is receiving packet from node 3 @1:32:16.033288662
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:16.040969499
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:16.043100006
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:16.050469958
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:16.058839658
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:32:16.065873919
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:16.090760859
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 62 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1805.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 1201.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1805.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 1201.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 1201.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1201.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 79 that advertises 1201.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 2457.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1805.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2457.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 2457.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 2457.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 2457.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:32:21.006549755
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:21.012756163
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:32:21.016229435
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:21.017555051
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:21.018770312
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:21.021776394
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:32:21.024538101
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:21.027834098
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:32:21.031638831
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:21.036760438
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:21.045106947
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:26.006500096
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:32:26.008035513
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:26.015327281
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:26.021379550
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:32:26.026645463
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:26.029054794
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:32:26.030627983
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:26.035051463
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:32:26.045432696
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:26.049348865
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:26.054262167
+DEBUG (0): LQI Root is receiving packet from node 3 @1:32:26.063508939
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:31.011903897
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:31.020540440
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:31.024902088
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:32:31.027210035
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:32:31.034982377
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:31.039935790
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:32:31.044437107
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:31.046332960
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:31.049091010
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:31.058948131
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:32:31.061149157
+DEBUG (0): LQI Root is receiving packet from node 3 @1:32:31.066627031
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2598 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1076.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 215.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 420 and my cost to 1805.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 215.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 926 and my cost to 215.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 215.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 420 and my cost to 215.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 215.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 215.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 215.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 635.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 855 and my cost to 635.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 111 that advertises 635.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 106 and my cost to 635.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 635.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 635.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 215.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 1490.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 106 and my cost to 635.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 1490.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 420 and my cost to 215.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 1490.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 215.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:36.009462623
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:32:36.013253988
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:32:36.015350142
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:36.017005738
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:32:36.019458615
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:36.028718985
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:32:36.032764201
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:36.041772499
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:32:36.045341144
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:32:36.051063157
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:32:36.054813023
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:36.057961979
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:32:36.060092533
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:36.065804951
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:32:36.071704404
+DEBUG (0): LQI Root is receiving packet from node 3 @1:32:36.074273530
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:32:36.079287978
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:32:36.079287978
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:36.079287978
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:36.079287978
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:32:36.079287978
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:32:36.079287978
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:36.083819812
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:32:36.088626302
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:36.091372868
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:36.095874185
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:41.005892088
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:32:41.010623828
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:41.010623828
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:32:41.010623828
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:41.013002524
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:41.018205740
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:32:41.018205740
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:32:41.018205740
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:32:41.019286887
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:41.024082001
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:32:41.025954939
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:32:41.025954939
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:32:41.026475956
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:41.026475956
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:32:41.026475956
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:41.028861748
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:41.032790836
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:41.034929276
+DEBUG (0): LQI Root is receiving packet from node 3 @1:32:41.036246959
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:32:41.036246959
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:32:41.036246959
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:41.038764644
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:41.041902501
+DEBUG (0): LQI Root is receiving packet from node 3 @1:32:41.042533543
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:32:41.044059413
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:32:41.048209780
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:32:41.052070231
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:32:41.056220597
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:32:41.061815105
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:32:41.065528404
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:41.070975760
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:32:41.075980614
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:32:41.086259542
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:32:41.100129701
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:32:46.006036623
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:46.006036623
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:32:46.006036623
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:32:46.006036623
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:46.009203226
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:32:46.012225991
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:46.012225991
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:32:46.012225991
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:46.017978521
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:32:46.017978521
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:32:46.017978521
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:32:46.018726197
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:32:46.018726197
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:46.021852688
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:32:46.031776160
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:46.034440997
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:32:46.042177158
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:32:46.047609255
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:32:46.055205867
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:32:46.060546412
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:32:46.063369271
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:32:46.063369271
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:32:46.063369271
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:46.063369271
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:32:46.063369271
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:32:46.063369271
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:32:46.070525601
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:46.070525601
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:32:46.071410606
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:32:46.071410606
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:32:46.071410606
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:32:46.076690116
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:46.076690116
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:32:46.076690116
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:32:46.076690116
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:32:46.084121103
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:32:46.084121103
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:46.084121103
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:32:46.084121103
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:32:46.084121103
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:32:46.090056737
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:32:46.090056737
+DEBUG (0): LQI Root is receiving packet from node 5 @1:32:46.090056737
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:32:46.090056737
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:32:46.090056737
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 79 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:32:51.006234986
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:51.006234986
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:32:51.006234986
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:32:51.006234986
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:32:51.007522429
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:51.009187967
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:32:51.009187967
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:51.009773114
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:32:51.009773114
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:51.014365983
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:32:51.014365983
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:32:51.014365983
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:32:51.014365983
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:32:51.014365983
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:51.016939386
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:32:51.016939386
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:32:51.016939386
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:32:51.016939386
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:32:51.020175774
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:32:51.020175774
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:32:51.023241230
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:32:51.023241230
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:51.023241230
+DEBUG (0): LQI Root is receiving packet from node 3 @1:32:51.023241230
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:32:51.023241230
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:32:51.027328222
+DEBUG (0): LQI Root is receiving packet from node 3 @1:32:51.027328222
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:32:51.027328222
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:32:51.027328222
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:51.028429188
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:32:51.029649884
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:32:51.029649884
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:51.031173414
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:32:51.031173414
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:32:51.033159385
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:51.033159385
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:32:51.033159385
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:32:51.033159385
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:32:51.033159385
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:32:51.037536292
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:32:51.037536292
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:32:51.037536292
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:51.037536292
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:32:51.046004870
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:32:51.046004870
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:32:51.046004870
+DEBUG (0): LQI Root is receiving packet from node 3 @1:32:51.046004870
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:32:51.046004870
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:32:51.046004870
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:32:56.006839670
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:56.006839670
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:32:56.007667414
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:32:56.010439180
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:56.010439180
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:32:56.011087253
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:32:56.011087253
+DEBUG (0): LQI Root is receiving packet from node 6 @1:32:56.012407434
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:32:56.012407434
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:32:56.012407434
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:32:56.012916407
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:32:56.016837892
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:32:56.016837892
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:56.017747979
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:32:56.019372727
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:32:56.019372727
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:32:56.019372727
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:56.021242222
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:32:56.021242222
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:32:56.022203520
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:32:56.022203520
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:32:56.022203520
+DEBUG (0): LQI Root is receiving packet from node 2 @1:32:56.024545426
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:32:56.024545426
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:32:56.024545426
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:32:56.024545426
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:32:56.024545426
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:32:56.027864497
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:56.027864497
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:32:56.027864497
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:32:56.027864497
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:56.030099593
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:32:56.030099593
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:32:56.030099593
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:32:56.033670129
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:32:56.033670129
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:32:56.033670129
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:32:56.033670129
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:32:56.035753245
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:32:56.035753245
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:32:56.035753245
+DEBUG (0): LQI Root is receiving packet from node 4 @1:32:56.037469545
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:32:56.037469545
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:32:56.039956713
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:32:56.039956713
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:32:56.039956713
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:32:56.039956713
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:56.039956713
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:32:56.039956713
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:32:56.043176299
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:32:56.043176299
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:56.044061304
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:32:56.045282000
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:32:56.045282000
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:32:56.045282000
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:32:56.045282000
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:32:56.049508660
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:32:56.049508660
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:32:56.049508660
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:32:56.049508660
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:32:56.053842130
+DEBUG (0): LQI Root is receiving packet from node 1 @1:32:56.053842130
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:32:56.053842130
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:33:1.005258430
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:33:1.005258430
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:1.005258430
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:33:1.005258430
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:33:1.005258430
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:33:1.005258430
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:33:1.007644499
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:1.007644499
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:33:1.007644499
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:33:1.007644499
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:33:1.008974227
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:1.010042454
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:33:1.010042454
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:33:1.010042454
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:33:1.010042454
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:33:1.011558382
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:33:1.011558382
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:1.015731610
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:1.017959380
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:33:1.017959380
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:33:1.017959380
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:33:1.017959380
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:33:1.017959380
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:1.022264673
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:33:1.022264673
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:33:1.022264673
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:33:1.022264673
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:33:1.023483029
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:1.024432951
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:33:1.024432951
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:33:1.025222521
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:33:1.026018195
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:33:1.026359321
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:1.026359321
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:33:1.026359321
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:33:1.029800131
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:1.029800131
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:33:1.029800131
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:33:1.029800131
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:1.031908053
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:33:1.031908053
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:33:1.031908053
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:33:1.031908053
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:33:1.033435584
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:33:1.039352077
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:33:1.039352077
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:33:1.039352077
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:33:1.039352077
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:1.040649067
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:33:1.044662105
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:33:1.044662105
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:1.044662105
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:33:1.044662105
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:33:1.044662105
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:33:1.048446262
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:33:1.048446262
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:33:1.048446262
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:33:1.048446262
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:33:1.048446262
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:33:1.051421709
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:33:1.051421709
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:1.051421709
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:33:1.051421709
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:33:1.051421709
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 64 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4488 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 89 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 1076.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 4488 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 1076.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 1076.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:6.008203359
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:6.010955637
+DEBUG (0): LQI Root is receiving packet from node 6 @1:33:6.015962711
+DEBUG (0): LQI Root is receiving packet from node 3 @1:33:6.017936519
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:6.020509922
+DEBUG (0): LQI Root is receiving packet from node 4 @1:33:6.026752274
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 1950.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1950.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 1950.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 1950.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 1950.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 1950.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 2511.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 95 that advertises 2511.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 2511.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 2511.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 64 that advertises 2511.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @1:33:11.006610790
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:11.009981419
+DEBUG (0): LQI Root is receiving packet from node 3 @1:33:11.018684195
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:11.020852821
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:33:11.023943012
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:11.025359849
+DEBUG (0): LQI Root is receiving packet from node 6 @1:33:11.033311853
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:16.008117518
+DEBUG (0): LQI Root is receiving packet from node 4 @1:33:16.011386763
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:16.015054515
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:16.018038013
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:33:16.024385514
+DEBUG (0): LQI Root is receiving packet from node 3 @1:33:16.027885191
+DEBUG (0): LQI Root is receiving packet from node 6 @1:33:16.038255672
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:21.014269133
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:33:21.016893492
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:21.020364543
+DEBUG (0): LQI Root is receiving packet from node 3 @1:33:21.022880338
+DEBUG (0): LQI Root is receiving packet from node 6 @1:33:21.031436694
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:21.034637139
+DEBUG (0): LQI Root is receiving packet from node 4 @1:33:21.041965197
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 87 that advertises 1241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 1950.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 1241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 1241.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 76 and my cost to 1241.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1241.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1621.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 243 and my cost to 1621.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1621.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 76 and my cost to 1241.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 1621.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 1621.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:26.008401722
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:26.010362887
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:33:26.012300623
+DEBUG (0): LQI Root is receiving packet from node 3 @1:33:26.015403575
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:33:26.018695680
+DEBUG (0): LQI Root is receiving packet from node 6 @1:33:26.025161486
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:26.032500921
+DEBUG (0): LQI Root is receiving packet from node 4 @1:33:26.039020268
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:31.009429767
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:33:31.012056484
+DEBUG (0): LQI Root is receiving packet from node 3 @1:33:31.014121844
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:31.019762246
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:33:31.022586648
+DEBUG (0): LQI Root is receiving packet from node 6 @1:33:31.024660170
+DEBUG (0): LQI Root is receiving packet from node 4 @1:33:31.030673759
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:31.037820495
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:33:36.006061476
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:33:36.008165516
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:36.010057713
+DEBUG (0): LQI Root is receiving packet from node 3 @1:33:36.024116292
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:36.026748391
+DEBUG (0): LQI Root is receiving packet from node 4 @1:33:36.033668239
+DEBUG (0): LQI Root is receiving packet from node 6 @1:33:36.038390779
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:36.050317371
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 66 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 243 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 76 and my cost to 1241.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 1076.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 1076.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 76 and my cost to 1241.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1076.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 116 that advertises 1076.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 1317.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 243 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 1317.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 1317.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 1317.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 1317.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1864.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 1864.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 76 and my cost to 1241.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 1864.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 1864.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1076 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 62 that advertises 1864.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:33:41.006595531
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:33:41.014436841
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:41.015001532
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:41.019073265
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:41.023401024
+DEBUG (0): LQI Root is receiving packet from node 3 @1:33:41.028312435
+DEBUG (0): LQI Root is receiving packet from node 6 @1:33:41.033141786
+DEBUG (0): LQI Root is receiving packet from node 4 @1:33:41.039527579
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:46.007250112
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:33:46.009920266
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:33:46.017825934
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:46.025476207
+DEBUG (0): LQI Root is receiving packet from node 4 @1:33:46.030418135
+DEBUG (0): LQI Root is receiving packet from node 6 @1:33:46.033096010
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:46.039382595
+DEBUG (0): LQI Root is receiving packet from node 3 @1:33:46.045646318
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:33:51.005878372
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:33:51.010759495
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:51.011720911
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:51.014251516
+DEBUG (0): LQI Root is receiving packet from node 4 @1:33:51.030036668
+DEBUG (0): LQI Root is receiving packet from node 6 @1:33:51.041076310
+DEBUG (0): LQI Root is receiving packet from node 3 @1:33:51.043815274
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:51.051385480
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 93 that advertises 125.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 125.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 83 that advertises 125.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 125.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 1241.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 243 and my cost to 1621.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 87 that advertises 1241.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 1241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1241.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 74 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 1728.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 2, my link to 144 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1728.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 91 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:33:56.007158560
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:33:56.011630902
+DEBUG (0): LQI Root is receiving packet from node 5 @1:33:56.015258590
+DEBUG (0): LQI Root is receiving packet from node 3 @1:33:56.017616086
+DEBUG (0): LQI Root is receiving packet from node 4 @1:33:56.026737015
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:33:56.027597166
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:33:56.033235560
+DEBUG (0): LQI Root is receiving packet from node 2 @1:33:56.036081004
+DEBUG (0): LQI Root is receiving packet from node 6 @1:33:56.041368447
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:1.010439062
+DEBUG (0): LQI Root is receiving packet from node 1 @1:34:1.013078935
+DEBUG (0): LQI Root is receiving packet from node 3 @1:34:1.015907112
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:34:1.017978521
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:34:1.022073517
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:1.025237780
+DEBUG (0): LQI Root is receiving packet from node 4 @1:34:1.033435584
+DEBUG (0): LQI Root is receiving packet from node 2 @1:34:1.047580399
+DEBUG (0): LQI Root is receiving packet from node 5 @1:34:1.062499525
+DEBUG (0): LQI Root is receiving packet from node 3 @1:34:6.005485420
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:34:6.013650715
+DEBUG (0): LQI Root is receiving packet from node 1 @1:34:6.017458182
+DEBUG (0): LQI Root is receiving packet from node 2 @1:34:6.025591069
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:34:6.028919009
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:6.041063273
+DEBUG (0): LQI Root is receiving packet from node 4 @1:34:6.042667098
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:6.053573186
+DEBUG (0): LQI Root is receiving packet from node 5 @1:34:6.058974765
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 125.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 110 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 71 that advertises 145.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 144 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 145.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 926 and my cost to 145.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 145.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 465 and my cost to 145.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 145.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 145.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 145.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 610.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 144 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 610.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 52 and my cost to 610.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 610.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 610.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 610.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 145.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:34:11.006889220
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:34:11.008880453
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:34:11.010919407
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:34:11.012592200
+DEBUG (0): LQI Root is receiving packet from node 1 @1:34:11.018617843
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:34:11.021631015
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:34:11.028705387
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:11.036104195
+DEBUG (0): LQI Root is receiving packet from node 2 @1:34:11.038835621
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:34:11.041719397
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:34:11.041879310
+DEBUG (0): LQI Root is receiving packet from node 3 @1:34:11.045610484
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:34:11.047982790
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:34:11.050599960
+DEBUG (0): LQI Root is receiving packet from node 4 @1:34:11.060441940
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 1872.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 52 and my cost to 610.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 1872.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 465 and my cost to 145.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 1872.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 145.
+DEBUG (0): LQI Root is receiving packet from node 5 @1:34:11.076906077
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:34:11.083207802
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:11.092607162
+DEBUG (0): LQI Root is receiving packet from node 1 @1:34:16.007494251
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:34:16.009536577
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:16.010301734
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:34:16.013736602
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:34:16.022220440
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:34:16.024156633
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:34:16.027948117
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:34:16.030015974
+DEBUG (0): LQI Root is receiving packet from node 4 @1:34:16.033899010
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:34:16.046744944
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:34:16.049249262
+DEBUG (0): LQI Root is receiving packet from node 5 @1:34:16.053887907
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:34:16.055932572
+DEBUG (0): LQI Root is receiving packet from node 2 @1:34:16.060449148
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:34:16.061624067
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:16.069711178
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:34:21.006082399
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:21.009706644
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:34:21.014789453
+DEBUG (0): LQI Root is receiving packet from node 2 @1:34:21.020662509
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:34:21.023395360
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:34:21.027396913
+DEBUG (0): LQI Root is receiving packet from node 4 @1:34:21.037492855
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:34:21.043456668
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:34:21.043693204
+DEBUG (0): LQI Root is receiving packet from node 1 @1:34:21.046480230
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:34:21.050841878
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:34:21.055861991
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:34:21.067748518
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:34:21.072051471
+DEBUG (0): LQI Root is receiving packet from node 3 @1:34:21.081483687
+DEBUG (0): LQI Root is receiving packet from node 5 @1:34:21.090440544
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:34:21.094710641
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:21.098311694
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 61 that advertises 125.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 144 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 125.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 52 and my cost to 610.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 91 that advertises 125.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 465 and my cost to 145.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 125.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 125.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 270.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 144 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 270.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 52 and my cost to 610.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 270.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 465 and my cost to 145.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 270.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 270.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:34:26.005525879
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:34:26.010867967
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:34:26.018340847
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:34:26.023706198
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:34:26.028091157
+DEBUG (0): LQI Root is receiving packet from node 4 @1:34:26.032556244
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:26.038896538
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:34:26.045152605
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:34:26.048043824
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:34:26.048789610
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:34:26.051759622
+DEBUG (0): LQI Root is receiving packet from node 2 @1:34:26.067391856
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:34:26.077950876
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:34:26.092690781
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:26.097756669
+DEBUG (0): LQI Root is receiving packet from node 3 @1:34:26.106377835
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 662.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 5, my link to 343 and my cost to 662.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 662.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 465 and my cost to 145.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 95 that advertises 662.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 145.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 662.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 125 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 92 that advertises 662.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 125.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:34:31.006973116
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:34:31.009347761
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:31.009813455
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:34:31.011741487
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:34:31.017246103
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:34:31.020113078
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:34:31.025779491
+DEBUG (0): LQI Root is receiving packet from node 1 @1:34:31.028642809
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:34:31.030250290
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:34:31.032428510
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:34:31.041705800
+DEBUG (0): LQI Root is receiving packet from node 5 @1:34:31.043901509
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:34:31.046039270
+DEBUG (0): LQI Root is receiving packet from node 3 @1:34:31.053026212
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:34:31.053760173
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:31.061357462
+DEBUG (0): LQI Root is receiving packet from node 4 @1:34:31.067247320
+DEBUG (0): LQI Root is receiving packet from node 1 @1:34:36.006807610
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:34:36.012290800
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:36.015901677
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:34:36.019159105
+DEBUG (0): LQI Root is receiving packet from node 2 @1:34:36.024133442
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:34:36.029830648
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:34:36.034951860
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:34:36.037708020
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:34:36.047946608
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:34:36.050628257
+DEBUG (0): LQI Root is receiving packet from node 3 @1:34:36.052972385
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:34:36.058276748
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:34:36.060058133
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:34:36.071277160
+DEBUG (0): LQI Root is receiving packet from node 4 @1:34:36.076343049
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:34:36.080218758
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:36.085666114
+DEBUG (0): LQI Root is receiving packet from node 5 @1:34:36.092700375
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 67 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 343 and my cost to 662.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 52 and my cost to 610.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 465 and my cost to 145.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 88 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 145.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:34:41.009509943
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:34:41.012664611
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:41.014955637
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:34:41.018218778
+DEBUG (0): LQI Root is receiving packet from node 1 @1:34:41.019228191
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:34:41.023820942
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:34:41.024804824
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:34:41.034431174
+DEBUG (0): LQI Root is receiving packet from node 4 @1:34:41.035669019
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:34:41.044511739
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:34:41.049859610
+DEBUG (0): LQI Root is receiving packet from node 2 @1:34:41.055779985
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:34:41.069207641
+DEBUG (0): LQI Root is receiving packet from node 5 @1:34:41.075936728
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:34:41.076745439
+DEBUG (0): LQI Root is receiving packet from node 3 @1:34:41.084084874
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:34:41.084649446
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:41.092797592
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 159.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 3, my link to 790 and my cost to 159.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 159.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 159.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 115 that advertises 159.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 949.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 343 and my cost to 662.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 949.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 4, my link to 125 and my cost to 949.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 949.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 34 and my cost to 125.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 949.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 949.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 159.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 107 that advertises 1005.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 125 and my cost to 949.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 101 that advertises 1005.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 790 and my cost to 159.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 1005.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 159.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 67 that advertises 1005.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:34:46.007699822
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:34:46.012546424
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:34:46.015563764
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:34:46.026492876
+DEBUG (0): LQI Root is receiving packet from node 1 @1:34:46.029100570
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:34:46.031905832
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:46.033845908
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:34:46.038072686
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:34:46.043733545
+DEBUG (0): LQI Root is receiving packet from node 5 @1:34:46.046098762
+DEBUG (0): LQI Root is receiving packet from node 4 @1:34:46.055986400
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:34:46.058242348
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:34:46.060533374
+DEBUG (0): LQI Root is receiving packet from node 5 @1:34:46.064834106
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:34:46.080186580
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:34:46.081061761
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:34:46.086600669
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:46.092927594
+DEBUG (0): LQI Root is receiving packet from node 3 @1:34:46.100083925
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:34:51.006660340
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:34:51.011199776
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:51.015825383
+DEBUG (0): LQI Root is receiving packet from node 1 @1:34:51.020403111
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:34:51.021493686
+DEBUG (0): LQI Root is receiving packet from node 2 @1:34:51.025232068
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:34:51.028299067
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:34:51.031589281
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:34:51.034669878
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:34:51.041492178
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:34:51.045901942
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:34:51.049136786
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:34:51.055514923
+DEBUG (0): LQI Root is receiving packet from node 5 @1:34:51.059503108
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:34:51.062121940
+DEBUG (0): LQI Root is receiving packet from node 5 @1:34:51.069558591
+DEBUG (0): LQI Root is receiving packet from node 4 @1:34:51.078072946
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:51.087884290
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:34:56.010192702
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:34:56.015006848
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:34:56.017572201
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:56.020265665
+DEBUG (0): LQI Root is receiving packet from node 1 @1:34:56.023424334
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:34:56.024163959
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:34:56.027406736
+DEBUG (0): LQI Root is receiving packet from node 2 @1:34:56.027422113
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:34:56.032062301
+DEBUG (0): LQI Root is receiving packet from node 3 @1:34:56.036775696
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:34:56.038287851
+DEBUG (0): LQI Root is receiving packet from node 3 @1:34:56.040820795
+DEBUG (0): LQI Root is receiving packet from node 4 @1:34:56.045627285
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:34:56.052249561
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:34:56.059527961
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:34:56.067660848
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:34:56.067660848
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:56.067660848
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:34:56.067660848
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:34:56.067660848
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:34:56.074450970
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:34:56.076510894
+DEBUG (0): LQI Root is receiving packet from node 6 @1:34:56.088275352
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 70 that advertises 144.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 3375 and my cost to 144.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 144.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 144.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 78 that advertises 144.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 159.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 110 that advertises 144.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 144.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 284.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 343 and my cost to 662.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 284.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 1155 and my cost to 284.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 114 that advertises 284.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 284.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 284.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 144.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 1439.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 5, my link to 189 and my cost to 1439.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1439.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 284.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 93 that advertises 1439.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 159.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 1439.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 144.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:1.013847187
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:35:1.014785570
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:35:1.017526424
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:35:1.021133189
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:35:1.025171033
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:1.028659611
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:1.032106534
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:35:1.034509358
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:1.037584408
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:35:1.041688880
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:1.046663334
+DEBUG (0): LQI Root is receiving packet from node 5 @1:35:1.054155356
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:1.057284932
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:35:1.063722442
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:1.065188939
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:35:1.069017211
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:1.074939248
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:35:1.076417681
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:1.083574011
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:35:6.006105591
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:6.008363997
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:35:6.009012070
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:6.015023998
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:6.017490243
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:6.020026961
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:35:6.022704836
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:35:6.038734127
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:35:6.042358041
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:6.044959677
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:6.045386920
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:6.053611359
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:6.059104491
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:35:6.062430888
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:35:6.069175233
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:35:6.070929984
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:6.073554480
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:35:6.085578336
+DEBUG (0): LQI Root is receiving packet from node 5 @1:35:6.094306312
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:11.014650581
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:11.023109218
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:35:11.026183819
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:35:11.027971308
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:35:11.029870713
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:11.036950750
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:35:11.042916901
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:11.051059383
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:35:11.054824399
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:11.072228864
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:35:11.076982253
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:35:11.081450831
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:11.082503681
+DEBUG (0): LQI Root is receiving packet from node 5 @1:35:11.089644752
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:11.099669718
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:35:11.108367177
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:11.123396997
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:35:11.126387702
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:11.144530296
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 69 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 189 and my cost to 1439.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 1155 and my cost to 284.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 81 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 159.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 269.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 189 and my cost to 1439.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 269.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 1155 and my cost to 284.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 269.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 284.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 113 that advertises 269.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 269.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 269.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 348.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 5, my link to 729 and my cost to 348.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 348.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 5, my link to 52 and my cost to 348.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 348.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 348.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 113 that advertises 348.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 269.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 103 that advertises 1077.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 52 and my cost to 348.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 1077.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 64 and my cost to 284.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 85 that advertises 1077.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 269.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 1077.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 125 and my cost to 144.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:35:16.007265252
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:35:16.007409906
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:16.010515474
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:35:16.013900566
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:35:16.018741456
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:16.023944673
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:16.026542426
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:35:16.028217109
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:16.038606740
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:35:16.044318811
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:35:16.046088820
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:16.052848424
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:16.064139862
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:16.068351264
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:16.075965355
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:16.078864508
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:35:16.088141798
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:16.093573895
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:35:16.099616340
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:35:16.099616340
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:16.099616340
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:16.099616340
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:16.122489131
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:35:16.127921228
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:16.132819271
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:21.006416200
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:35:21.006416200
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:35:21.010177443
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:35:21.010537940
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:21.013170488
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:35:21.013170488
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:35:21.013170488
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:21.017671804
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:21.017671804
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:35:21.017671804
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:35:21.021976300
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:35:21.026101814
+DEBUG (0): LQI Root is receiving packet from node 5 @1:35:21.028095039
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:35:21.028095039
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:35:21.028095039
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:35:21.028976161
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:35:21.031259254
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:21.031259254
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:21.031259254
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:35:21.031259254
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:35:21.031259254
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:21.035247487
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:21.035247487
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:35:21.035247487
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:35:21.035247487
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:35:21.037111270
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:21.041610365
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:21.041610365
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:35:21.041610365
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:21.043855615
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:35:21.043855615
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:35:21.043855615
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:21.044254002
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:35:21.049623404
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:21.049623404
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:35:21.049623404
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:35:21.049623404
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:35:21.049623404
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:35:21.051393413
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:35:21.054246790
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:35:21.054246790
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:35:21.055086018
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:35:21.055086018
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:21.055086018
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:35:21.060029837
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:21.060029837
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:35:21.060029837
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:35:21.061084349
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:21.062121940
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:35:21.062121940
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:35:21.062121940
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:35:21.062121940
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:35:21.067493003
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:35:21.067493003
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:35:21.067493003
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:21.067493003
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:35:21.067493003
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:35:21.067493003
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:35:21.072482597
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:35:21.080096689
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:35:21.080096689
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:35:21.080096689
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:21.080096689
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:35:21.080096689
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:35:21.085910253
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:35:21.085910253
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:21.085910253
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:35:21.085910253
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:35:21.085910253
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:26.007089474
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:35:26.007089474
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:35:26.007089474
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:35:26.007089474
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:35:26.009981301
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:26.009981301
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:35:26.009981301
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:35:26.010345289
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:35:26.012041344
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:26.012041344
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:35:26.012041344
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:26.012041344
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:35:26.016725646
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:26.016725646
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:35:26.018539210
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:26.018861864
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:35:26.021211822
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:35:26.021211822
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:26.021211822
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:35:26.021211822
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:35:26.021211822
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:35:26.021211822
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:26.024278703
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:35:26.024278703
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:26.024278703
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:26.024278703
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:26.024278703
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:35:26.024278703
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:35:26.027177856
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:26.027177856
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:35:26.029192004
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:26.029192004
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:35:26.029192004
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:35:26.030305889
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:26.030305889
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:35:26.032320156
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:26.032320156
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:35:26.032320156
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:26.032320156
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:35:26.033586510
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:35:26.037996274
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:35:26.037996274
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:35:26.037996274
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:35:26.037996274
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:26.038667657
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:35:26.042512849
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:35:26.042512849
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:26.042512849
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:35:26.042512849
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:26.049302971
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:26.049302971
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:26.049302971
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:26.049302971
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:35:26.049302971
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:35:26.053178681
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:35:26.053178681
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:35:26.053178681
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:26.053178681
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:35:26.053178681
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:35:26.053178681
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 58 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 81 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 117 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 89 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 113 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:35:31.008767931
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:35:31.008767931
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:31.008767931
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:35:31.008767931
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:35:31.008767931
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:35:31.010391065
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:31.011249434
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:35:31.011249434
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:31.012941607
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:31.018665163
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:31.018665163
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:31.018665163
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:35:31.020998082
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:31.020998082
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:35:31.020998082
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:35:31.020998082
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:31.024535880
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:35:31.024535880
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:31.024535880
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:31.024535880
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:35:31.024535880
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:35:31.024535880
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:31.028032343
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:35:31.028032343
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:35:31.028032343
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:35:31.028032343
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:35:31.028808316
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:31.030443336
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:31.030443336
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:35:31.030443336
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:35:31.032821354
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:31.033416443
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:31.033416443
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:35:31.036109631
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:31.036109631
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:31.036109631
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:31.036109631
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:35:31.037736876
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:35:31.039339158
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:35:31.039339158
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:35:31.039339158
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:31.039934247
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:35:31.039934247
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:31.039934247
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:35:31.043319339
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:31.043319339
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:31.043319339
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:35:31.043319339
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:31.043809957
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:31.043809957
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:35:31.045747812
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:31.045747812
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:31.045747812
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:35:31.045747812
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:35:31.053893618
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:35:31.053893618
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:31.053893618
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:31.053893618
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:31.053893618
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:31.053893618
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:35:31.062285903
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:31.062285903
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:31.062285903
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:31.062285903
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:31.062285903
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:36.008277762
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:35:36.008277762
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:35:36.008277762
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:35:36.008277762
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:35:36.008277762
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:35:36.009164657
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:36.011263150
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:36.011263150
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:36.015856019
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:36.015856019
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:36.015856019
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:36.018160082
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:36.018160082
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:35:36.019180076
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:36.020097819
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:35:36.020097819
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:36.020097819
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:35:36.020221550
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:35:36.022844503
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:35:36.022844503
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:36.022844503
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:35:36.022844503
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:35:36.022844503
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:35:36.022844503
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:36.025974080
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:35:36.025974080
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:36.025974080
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:35:36.025974080
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:36.026887941
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:36.032611614
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:36.032611614
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:36.032611614
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:36.032611614
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:41.005770018
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:41.005770018
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:41.005770018
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:41.005770018
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:35:41.005770018
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:41.008243470
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:41.008243470
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:41.008243470
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:35:41.008243470
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:35:41.009546124
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:41.013629792
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:41.013629792
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:35:41.015109885
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:41.015617196
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:41.015617196
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:41.015617196
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:41.018335136
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:35:41.018335136
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:41.018335136
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:41.018335136
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:35:41.018335136
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:41.022592313
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:41.022592313
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:35:41.022592313
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:35:41.022592313
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:41.025155774
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:35:41.025155774
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:35:41.025155774
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:35:41.025155774
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:41.027427430
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:41.027427430
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:41.027427430
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:35:41.027427430
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:35:41.031335548
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:35:41.031335548
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:41.031335548
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:41.031335548
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:41.031335548
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:35:41.034599019
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:35:41.034599019
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:41.034599019
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:41.034599019
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:41.034599019
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:41.034599019
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:35:41.042106300
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:35:41.042106300
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:35:41.042106300
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:41.042106300
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:35:41.042106300
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:41.042106300
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2744 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 926.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 2744 and my cost to 926.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 84 that advertises 926.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 95 that advertises 926.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:46.007318354
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:46.012229765
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:46.014301174
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:35:46.016496766
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:46.019523424
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:46.023973647
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:46.027351137
+DEBUG (0): LQI Root is receiving packet from node 5 @1:35:46.046371079
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 1595.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1595.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 1595.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1595.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 1595.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 95 that advertises 1595.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 1595.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 102 that advertises 2264.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1595.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 2264.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 72 that advertises 2264.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 2264.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:35:51.006667942
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:51.008722155
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:51.011049528
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:35:51.016239029
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:35:51.017885308
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:51.019767563
+DEBUG (0): LQI Root is receiving packet from node 5 @1:35:51.030673759
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:35:51.035342922
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:51.038181040
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:51.050738950
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:51.053485516
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:51.071872249
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:35:56.012222109
+DEBUG (0): LQI Root is receiving packet from node 2 @1:35:56.016320987
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:35:56.018863526
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:35:56.020570839
+DEBUG (0): LQI Root is receiving packet from node 1 @1:35:56.022554588
+DEBUG (0): LQI Root is receiving packet from node 4 @1:35:56.024814419
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:35:56.025836752
+DEBUG (0): LQI Root is receiving packet from node 5 @1:35:56.031879197
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:35:56.033912378
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:35:56.049899721
+DEBUG (0): LQI Root is receiving packet from node 3 @1:35:56.052894201
+DEBUG (0): LQI Root is receiving packet from node 6 @1:35:56.060966053
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:36:1.007140962
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:36:1.010105032
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:36:1.013236839
+DEBUG (0): LQI Root is receiving packet from node 2 @1:36:1.016275211
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:36:1.016910412
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:36:1.019533247
+DEBUG (0): LQI Root is receiving packet from node 4 @1:36:1.026117073
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:1.033944786
+DEBUG (0): LQI Root is receiving packet from node 1 @1:36:1.042375639
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:36:1.044908465
+DEBUG (0): LQI Root is receiving packet from node 6 @1:36:1.051774880
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 85 that advertises 1051.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1595.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 90 that advertises 1051.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1595.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 1051.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1051.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 1647.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1595.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1647.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 1647.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 1647.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 1647.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:36:6.006416200
+DEBUG (0): LQI Root is receiving packet from node 2 @1:36:6.010034403
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:6.014474684
+DEBUG (0): LQI Root is receiving packet from node 1 @1:36:6.016527402
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:36:6.022874903
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:36:6.031635058
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:36:6.033645323
+DEBUG (0): LQI Root is receiving packet from node 4 @1:36:6.036212668
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:36:6.039767945
+DEBUG (0): LQI Root is receiving packet from node 6 @1:36:6.047458329
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:36:6.049152045
+DEBUG (0): LQI Root is receiving packet from node 5 @1:36:6.055865873
+DEBUG (0): LQI Root is receiving packet from node 1 @1:36:11.009340554
+DEBUG (0): LQI Root is receiving packet from node 2 @1:36:11.018792897
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:36:11.024371916
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:36:11.033446960
+DEBUG (0): LQI Root is receiving packet from node 4 @1:36:11.038821905
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:36:11.043046904
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:36:11.048720919
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:36:11.055404230
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:36:11.058311039
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:11.065856439
+DEBUG (0): LQI Root is receiving packet from node 6 @1:36:11.070968104
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:36:16.006217837
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:36:16.008991147
+DEBUG (0): LQI Root is receiving packet from node 2 @1:36:16.011468721
+DEBUG (0): LQI Root is receiving packet from node 1 @1:36:16.014604805
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:36:16.019317404
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:16.022592313
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:36:16.026794167
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:36:16.029008900
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:36:16.050767806
+DEBUG (0): LQI Root is receiving packet from node 4 @1:36:16.057855169
+DEBUG (0): LQI Root is receiving packet from node 6 @1:36:16.067269786
+DEBUG (0): LQI Root is receiving packet from node 5 @1:36:16.074334565
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1595.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1595.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 74 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 669 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 105 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 72 that advertises 1331.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 669 and my cost to 1595.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 1331.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 52 and my cost to 1595.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 1331.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 1331.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1331.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 1711.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1711.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 1711.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1711.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 1711.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1331 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 1711.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 108 that advertises 1711.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 2501.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1711.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 2501.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 380 and my cost to 1331.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 88 that advertises 2501.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 63 that advertises 2501.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:36:21.007560603
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:36:21.009676127
+DEBUG (0): LQI Root is receiving packet from node 2 @1:36:21.011636566
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:36:21.016727308
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:21.021539463
+DEBUG (0): LQI Root is receiving packet from node 4 @1:36:21.030786235
+DEBUG (0): LQI Root is receiving packet from node 1 @1:36:21.039507004
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:36:21.045108490
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:36:21.045898060
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:36:21.082427387
+DEBUG (0): LQI Root is receiving packet from node 6 @1:36:21.099231099
+DEBUG (0): LQI Root is receiving packet from node 5 @1:36:21.106952001
+DEBUG (0): LQI Root is receiving packet from node 2 @1:36:26.010827855
+DEBUG (0): LQI Root is receiving packet from node 1 @1:36:26.014497994
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:36:26.030061750
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:36:26.033588171
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:36:26.039020268
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:36:26.041251812
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:36:26.044494259
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:26.047961867
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:26.054385779
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:36:26.057586224
+DEBUG (0): LQI Root is receiving packet from node 6 @1:36:26.060382448
+DEBUG (0): LQI Root is receiving packet from node 5 @1:36:26.066012909
+DEBUG (0): LQI Root is receiving packet from node 2 @1:36:31.012948814
+DEBUG (0): LQI Root is receiving packet from node 1 @1:36:31.015489810
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:36:31.017890743
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:36:31.020633535
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:36:31.023866718
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:31.026054147
+DEBUG (0): LQI Root is receiving packet from node 4 @1:36:31.037833864
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:36:31.046800544
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:36:31.048385228
+DEBUG (0): LQI Root is receiving packet from node 6 @1:36:31.050660995
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:36:31.058471228
+DEBUG (0): LQI Root is receiving packet from node 5 @1:36:31.064239017
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 59 that advertises 243.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1711.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 68 that advertises 243.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1711.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 97 that advertises 243.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 243.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1331.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 243.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 1456.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1711.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 1456.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1711.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 1456.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 243.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1456.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 83 that advertises 1456.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 102 that advertises 1855.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1711.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1855.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 77 that advertises 1855.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 243 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:36:36.006021365
+DEBUG (0): LQI Root is receiving packet from node 1 @1:36:36.010301852
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:36:36.012260282
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:36:36.020561015
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:36:36.023242773
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:36:36.027452513
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:36:36.031020827
+DEBUG (0): LQI Root is receiving packet from node 4 @1:36:36.035066722
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:36:36.037416444
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:36:36.045610366
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:36.052827849
+DEBUG (0): LQI Root is receiving packet from node 6 @1:36:36.062471347
+DEBUG (0): LQI Root is receiving packet from node 5 @1:36:36.069795523
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:36:41.010974778
+DEBUG (0): LQI Root is receiving packet from node 1 @1:36:41.015138860
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:36:41.015924261
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:36:41.017036256
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:36:41.022796388
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:36:41.029098231
+DEBUG (0): LQI Root is receiving packet from node 4 @1:36:41.042100983
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:36:41.048067016
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:36:41.053412996
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:36:41.056291456
+DEBUG (0): LQI Root is receiving packet from node 6 @1:36:41.065111102
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:41.080293509
+DEBUG (0): LQI Root is receiving packet from node 5 @1:36:41.087251476
+DEBUG (0): LQI Root is receiving packet from node 1 @1:36:46.007555286
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:36:46.009691386
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:36:46.013374168
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:36:46.014148587
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:36:46.016778748
+DEBUG (0): LQI Root is receiving packet from node 4 @1:36:46.019885859
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:36:46.031625463
+DEBUG (0): LQI Root is receiving packet from node 2 @1:36:46.034808867
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:36:46.035815941
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:36:46.040237082
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:46.044833833
+DEBUG (0): LQI Root is receiving packet from node 6 @1:36:46.053729655
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:36:46.061614521
+DEBUG (0): LQI Root is receiving packet from node 5 @1:36:46.064971435
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 60 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1711.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1711.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 102 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 90 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 243.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 270.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1711.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 270.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 144 and my cost to 1711.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 270.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 270.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 270.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 270.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 804.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 270.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 94 that advertises 804.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 243.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 804.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 804.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 804.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 94 that advertises 804.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 804.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:36:51.010917517
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:36:51.016763489
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:36:51.021844637
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:36:51.024705947
+DEBUG (0): LQI Root is receiving packet from node 2 @1:36:51.032213345
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:36:51.034331965
+DEBUG (0): LQI Root is receiving packet from node 1 @1:36:51.039064501
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:36:51.039920532
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:51.042726589
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:36:51.047977125
+DEBUG (0): LQI Root is receiving packet from node 6 @1:36:51.052385347
+DEBUG (0): LQI Root is receiving packet from node 4 @1:36:51.066987922
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:36:51.067523520
+DEBUG (0): LQI Root is receiving packet from node 5 @1:36:51.076083651
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 104 that advertises 1533.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 804.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 1533.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 561 and my cost to 243.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 1533.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 270.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 74 that advertises 1533.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 27 and my cost to 243.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:36:56.007297431
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:36:56.010063030
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:36:56.011568206
+DEBUG (0): LQI Root is receiving packet from node 4 @1:36:56.018816207
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:36:56.022188261
+DEBUG (0): LQI Root is receiving packet from node 1 @1:36:56.027284785
+DEBUG (0): LQI Root is receiving packet from node 6 @1:36:56.034929394
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:36:56.037530580
+DEBUG (0): LQI Root is receiving packet from node 3 @1:36:56.041955603
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:36:56.046807870
+DEBUG (0): LQI Root is receiving packet from node 2 @1:36:56.054757652
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:36:56.058211830
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:36:56.074996400
+DEBUG (0): LQI Root is receiving packet from node 5 @1:36:56.081756005
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:37:1.006870187
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:37:1.010261393
+DEBUG (0): LQI Root is receiving packet from node 1 @1:37:1.012605916
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:37:1.027520873
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:37:1.029525474
+DEBUG (0): LQI Root is receiving packet from node 4 @1:37:1.031404634
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:37:1.034555134
+DEBUG (0): LQI Root is receiving packet from node 2 @1:37:1.039873213
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:37:1.041656141
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:1.044252341
+DEBUG (0): LQI Root is receiving packet from node 3 @1:37:1.050249129
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:37:1.052263159
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:1.060747114
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:1.069902334
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 94 that advertises 343.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 729 and my cost to 343.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 116 that advertises 343.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 395.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 729 and my cost to 804.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 91 that advertises 395.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 804.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 111 that advertises 395.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 106 and my cost to 395.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 395.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 395.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:37:6.007907779
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:37:6.010650463
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:37:6.016937047
+DEBUG (0): LQI Root is receiving packet from node 1 @1:37:6.018831465
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:37:6.021064552
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:37:6.025354138
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:37:6.027930967
+DEBUG (0): LQI Root is receiving packet from node 2 @1:37:6.031381324
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:37:6.035318069
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:37:6.036475839
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:6.045900281
+DEBUG (0): LQI Root is receiving packet from node 4 @1:37:6.050546251
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:37:6.054406702
+DEBUG (0): LQI Root is receiving packet from node 3 @1:37:6.059350521
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:37:6.061273117
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:6.067010389
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:37:6.075090174
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:37:6.082780559
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:37:6.091752674
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:6.102021779
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 868.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 216 and my cost to 868.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 868.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 106 and my cost to 395.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 868.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 270.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 868.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 343 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 868.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 42 and my cost to 343.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:37:11.008233876
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:37:11.011527865
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:37:11.015977970
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:37:11.024905971
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:11.036040939
+DEBUG (0): LQI Root is receiving packet from node 2 @1:37:11.038820362
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:37:11.053760173
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:37:11.061843401
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:37:11.068374125
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:37:11.070449308
+DEBUG (0): LQI Root is receiving packet from node 1 @1:37:11.073747527
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:37:11.074271639
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:11.079169682
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:37:11.083220840
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:37:11.087630604
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:37:11.090308533
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:37:11.100852295
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:37:11.108420610
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:37:11.108420610
+DEBUG (0): LQI Root is receiving packet from node 4 @1:37:11.108420610
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:37:11.110144843
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:37:11.114768229
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:37:11.120627570
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:37:11.120627570
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:37:11.120627570
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:37:11.120627570
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:11.120627570
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:37:11.128195885
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:37:11.132620908
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:37:16.008518127
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:37:16.010896823
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:37:16.017593171
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:37:16.021987677
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:37:16.021987677
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:37:16.021987677
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:37:16.021987677
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:16.021987677
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:37:16.021987677
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:37:16.027312963
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:16.027312963
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:37:16.027312963
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:37:16.030029012
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:37:16.030029012
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:37:16.030029012
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:37:16.030029012
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:37:16.043441409
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:37:16.043441409
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:37:16.043441409
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:37:16.043441409
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:37:16.046966169
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:37:16.046966169
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:37:16.046966169
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:16.046966169
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:37:16.046966169
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:37:16.046966169
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:37:16.058242348
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:16.065047728
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:37:16.069518527
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:37:16.069518527
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:37:16.069518527
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:16.069518527
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:37:16.069518527
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:37:16.069518527
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:37:16.076308649
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:16.076308649
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:16.076308649
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:37:16.076308649
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:37:16.077819260
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:16.078215986
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:37:16.078215986
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:16.078215986
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 67 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 3906 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:37:21.007270688
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:21.007494133
+DEBUG (0): LQI Root is receiving packet from node 1 @1:37:21.009798315
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:21.012054263
+DEBUG (0): LQI Root is receiving packet from node 3 @1:37:21.016162736
+DEBUG (0): LQI Root is receiving packet from node 2 @1:37:21.023233178
+DEBUG (0): LQI Root is receiving packet from node 4 @1:37:21.027377880
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 72 that advertises 1518.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 1, my link to 3906 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1518.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1518.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 2197.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 106 that advertises 2197.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1518.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 2197.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 97 that advertises 2197.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 116 that advertises 2197.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 108 that advertises 2758.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 97 that advertises 2758.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 2758.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1518.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 2758.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 4 @1:37:26.007251655
+DEBUG (0): LQI Root is receiving packet from node 2 @1:37:26.018853931
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:26.023836201
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:26.028078119
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:37:26.032386508
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:26.035583178
+DEBUG (0): LQI Root is receiving packet from node 1 @1:37:26.042635037
+DEBUG (0): LQI Root is receiving packet from node 3 @1:37:26.049064267
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:31.008608018
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:31.011215034
+DEBUG (0): LQI Root is receiving packet from node 1 @1:37:31.017641287
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:37:31.024192586
+DEBUG (0): LQI Root is receiving packet from node 2 @1:37:31.026849490
+DEBUG (0): LQI Root is receiving packet from node 3 @1:37:31.035348586
+DEBUG (0): LQI Root is receiving packet from node 4 @1:37:31.042834943
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:31.060550294
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:37:36.006477235
+DEBUG (0): LQI Root is receiving packet from node 1 @1:37:36.011705652
+DEBUG (0): LQI Root is receiving packet from node 4 @1:37:36.016391616
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:36.016985044
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:36.018890161
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:36.038972831
+DEBUG (0): LQI Root is receiving packet from node 3 @1:37:36.041268962
+DEBUG (0): LQI Root is receiving packet from node 2 @1:37:36.051873758
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 62 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 73 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 216.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 75 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1518.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 216.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 1643.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 1643.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2325 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 108 that advertises 1643.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1643.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 78 that advertises 1643.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 2325.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2197.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2325.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 94 that advertises 2325.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1518.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 70 that advertises 2325.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 89 that advertises 2325.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:37:41.008293020
+DEBUG (0): LQI Root is receiving packet from node 1 @1:37:41.009187967
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:37:41.017938409
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:37:41.022388285
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:41.025728279
+DEBUG (0): LQI Root is receiving packet from node 2 @1:37:41.028283808
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:37:41.030580546
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:37:41.032556244
+DEBUG (0): LQI Root is receiving packet from node 4 @1:37:41.040872235
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:41.045196159
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:41.049859610
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:46.006822750
+DEBUG (0): LQI Root is receiving packet from node 1 @1:37:46.008989604
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:37:46.012092437
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:37:46.017953668
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:46.024429069
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:37:46.027215699
+DEBUG (0): LQI Root is receiving packet from node 2 @1:37:46.036325143
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:37:46.036945085
+DEBUG (0): LQI Root is receiving packet from node 3 @1:37:46.041513101
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:37:46.042987530
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:46.045983900
+DEBUG (0): LQI Root is receiving packet from node 4 @1:37:46.053323335
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:37:51.010507422
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:37:51.015357799
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:51.018356106
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:37:51.018802491
+DEBUG (0): LQI Root is receiving packet from node 2 @1:37:51.022142603
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:51.025514658
+DEBUG (0): LQI Root is receiving packet from node 1 @1:37:51.027315302
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:37:51.029700977
+DEBUG (0): LQI Root is receiving packet from node 4 @1:37:51.035707587
+DEBUG (0): LQI Root is receiving packet from node 3 @1:37:51.048906363
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:37:51.052705661
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:51.056138869
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 1518.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 77 that advertises 322.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 561 and my cost to 2197.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 322.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 94 that advertises 322.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 322.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 322.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 95 that advertises 1071.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 1071.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 93 that advertises 1071.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1071.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 1071.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1071.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 1071.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 1861.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1071.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 98 that advertises 1861.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 855 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 1861.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 1861.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:37:56.006534496
+DEBUG (0): LQI Root is receiving packet from node 1 @1:37:56.009599952
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:37:56.011827604
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:37:56.013727008
+DEBUG (0): LQI Root is receiving packet from node 4 @1:37:56.017885426
+DEBUG (0): LQI Root is receiving packet from node 2 @1:37:56.025179084
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:37:56.027061221
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:37:56.031755466
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:37:56.039519923
+DEBUG (0): LQI Root is receiving packet from node 6 @1:37:56.044328635
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:37:56.046012527
+DEBUG (0): LQI Root is receiving packet from node 3 @1:37:56.056876721
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:37:56.067519637
+DEBUG (0): LQI Root is receiving packet from node 5 @1:37:56.076644340
+DEBUG (0): LQI Root is receiving packet from node 1 @1:38:1.008852275
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:38:1.011768230
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:38:1.015693490
+DEBUG (0): LQI Root is receiving packet from node 4 @1:38:1.018375247
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:38:1.024636979
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:38:1.026552249
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:1.030715653
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:38:1.037576356
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:38:1.040925945
+DEBUG (0): LQI Root is receiving packet from node 6 @1:38:1.046350109
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:38:1.049241936
+DEBUG (0): LQI Root is receiving packet from node 6 @1:38:1.052835056
+DEBUG (0): LQI Root is receiving packet from node 5 @1:38:1.059945610
+DEBUG (0): LQI Root is receiving packet from node 2 @1:38:1.067300304
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:38:6.007257319
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:38:6.013175804
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:38:6.023027490
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:38:6.026233478
+DEBUG (0): LQI Root is receiving packet from node 2 @1:38:6.032243863
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:38:6.032905304
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:38:6.034991972
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:6.039672510
+DEBUG (0): LQI Root is receiving packet from node 1 @1:38:6.042055207
+DEBUG (0): LQI Root is receiving packet from node 4 @1:38:6.049486194
+DEBUG (0): LQI Root is receiving packet from node 3 @1:38:6.054368978
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:38:6.056090871
+DEBUG (0): LQI Root is receiving packet from node 5 @1:38:6.063262460
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 65 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1071.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 75 that advertises 216.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1071.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 96 that advertises 216.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 2, my link to 612 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 115 that advertises 216.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 447.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 3, my link to 790 and my cost to 1071.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 88 that advertises 447.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1071.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 112 that advertises 447.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 447.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 447.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 106 that advertises 1147.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 216 and my cost to 1147.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1147.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 447.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 1147.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 79 that advertises 1147.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 1147.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 216.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:38:11.007957329
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:38:11.011385101
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:38:11.014194363
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:11.017150669
+DEBUG (0): LQI Root is receiving packet from node 1 @1:38:11.019228191
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:38:11.020059369
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:38:11.021137072
+DEBUG (0): LQI Root is receiving packet from node 3 @1:38:11.023843526
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:38:11.023895014
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:38:11.027541843
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:38:11.032312105
+DEBUG (0): LQI Root is receiving packet from node 4 @1:38:11.039239555
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:38:11.048461521
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:38:11.051665848
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:38:11.069772213
+DEBUG (0): LQI Root is receiving packet from node 5 @1:38:11.077248976
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:38:11.083007218
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:38:11.088906623
+DEBUG (0): LQI Root is receiving packet from node 2 @1:38:11.096825888
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:38:11.098138137
+DEBUG (0): LQI Root is receiving packet from node 6 @1:38:11.106316800
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:38:16.008396057
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:38:16.010537940
+DEBUG (0): LQI Root is receiving packet from node 1 @1:38:16.017381889
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:38:16.019828598
+DEBUG (0): LQI Root is receiving packet from node 2 @1:38:16.024645030
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:38:16.031145118
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:38:16.037467655
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:38:16.041007673
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:38:16.043182011
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:16.049071869
+DEBUG (0): LQI Root is receiving packet from node 4 @1:38:16.051093674
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:38:16.056602065
+DEBUG (0): LQI Root is receiving packet from node 3 @1:38:16.062156231
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:38:16.070022064
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:38:16.078887369
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:38:16.080199617
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:38:16.085845336
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:38:16.087416982
+DEBUG (0): LQI Root is receiving packet from node 6 @1:38:16.091735194
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:38:16.093352617
+DEBUG (0): LQI Root is receiving packet from node 5 @1:38:16.100707310
+DEBUG (0): LQI Root is receiving packet from node 1 @1:38:21.009477882
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:38:21.017046079
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:38:21.023111109
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:38:21.026431841
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:38:21.028274261
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:38:21.030601240
+DEBUG (0): LQI Root is receiving packet from node 2 @1:38:21.038919122
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:38:21.040961897
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:38:21.045943836
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:21.047309516
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:21.049926356
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:21.056861463
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:38:21.062400371
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:38:21.067573070
+DEBUG (0): LQI Root is receiving packet from node 5 @1:38:21.070487482
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:38:21.072646561
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:38:21.075385524
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:38:21.088797922
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:38:21.089873633
+DEBUG (0): LQI Root is receiving packet from node 4 @1:38:21.092032766
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:38:21.096801083
+DEBUG (0): LQI Root is receiving packet from node 6 @1:38:21.101004882
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 75 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1071.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 77 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 447.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 111 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 85 that advertises 268.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 76 and my cost to 1071.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 99 that advertises 268.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 447.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 268.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 268.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 268.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:38:26.005548345
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:38:26.010164405
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:38:26.013461946
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:26.014770312
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:38:26.017616086
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:38:26.022186040
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:38:26.030631757
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:38:26.034736348
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:38:26.037231118
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:38:26.041679056
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:38:26.042457250
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:38:26.043716065
+DEBUG (0): LQI Root is receiving packet from node 4 @1:38:26.052003879
+DEBUG (0): LQI Root is receiving packet from node 1 @1:38:26.057146061
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:38:26.058494143
+DEBUG (0): LQI Root is receiving packet from node 4 @1:38:26.062364536
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:38:26.066359976
+DEBUG (0): LQI Root is receiving packet from node 3 @1:38:26.074235805
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:38:26.075835629
+DEBUG (0): LQI Root is receiving packet from node 5 @1:38:26.081407394
+DEBUG (0): LQI Root is receiving packet from node 6 @1:38:26.087281993
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 537.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 5, my link to 420 and my cost to 537.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 537.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 5, my link to 64 and my cost to 537.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 537.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 268.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 94 that advertises 537.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 537.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 52 and my cost to 216.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 105 that advertises 957.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 64 and my cost to 537.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 957.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 90 and my cost to 447.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 61 that advertises 957.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:38:31.007043698
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:38:31.008888110
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:38:31.016380131
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:31.024734243
+DEBUG (0): LQI Root is receiving packet from node 1 @1:38:31.030428077
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:38:31.032472625
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:38:31.035709130
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:38:31.042361924
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:38:31.045505216
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:38:31.056537256
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:38:31.059863653
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:38:31.069949653
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:38:31.078158834
+DEBUG (0): LQI Root is receiving packet from node 2 @1:38:31.082002483
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:38:31.082827996
+DEBUG (0): LQI Root is receiving packet from node 3 @1:38:31.088624759
+DEBUG (0): LQI Root is receiving packet from node 6 @1:38:31.096482990
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:36.007583464
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:38:36.009967704
+DEBUG (0): LQI Root is receiving packet from node 1 @1:38:36.012377035
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:38:36.015810124
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:38:36.016670047
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:38:36.019611202
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:38:36.023872153
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:38:36.028629094
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:38:36.032691682
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:38:36.041635170
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:38:36.049188227
+DEBUG (0): LQI Root is receiving packet from node 3 @1:38:36.051660136
+DEBUG (0): LQI Root is receiving packet from node 2 @1:38:36.061303635
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:38:36.064475554
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:38:36.067742806
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:38:36.079278383
+DEBUG (0): LQI Root is receiving packet from node 5 @1:38:36.081963915
+DEBUG (0): LQI Root is receiving packet from node 6 @1:38:36.088494638
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:38:36.089944215
+DEBUG (0): LQI Root is receiving packet from node 4 @1:38:36.099511420
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:38:41.011600384
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:38:41.015525644
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:38:41.018632984
+DEBUG (0): LQI Root is receiving packet from node 1 @1:38:41.018678878
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:38:41.024698013
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 64 that advertises 106.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 420 and my cost to 537.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 112 that advertises 106.
+DEBUG (2):   -- Not a loop
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 106.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 79 that advertises 106.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 268.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:38:41.029258474
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:38:41.033174525
+DEBUG (0): LQI Root is receiving packet from node 2 @1:38:41.036195866
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:41.037810949
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:38:41.041207927
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:38:41.044221824
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:38:41.051406450
+DEBUG (0): LQI Root is receiving packet from node 3 @1:38:41.058999571
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:38:41.061324605
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:38:41.064416410
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:38:41.069055054
+DEBUG (0): LQI Root is receiving packet from node 4 @1:38:41.074197236
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:38:41.076775957
+DEBUG (0): LQI Root is receiving packet from node 6 @1:38:41.082787884
+DEBUG (0): LQI Root is receiving packet from node 5 @1:38:41.090768184
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 393.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 420 and my cost to 537.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 393.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 64 and my cost to 537.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 393.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 4, my link to 189 and my cost to 393.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 393.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 106.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 76 that advertises 393.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 106 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 601.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 420 and my cost to 537.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 601.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 189 and my cost to 393.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 93 that advertises 601.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 106.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:38:46.008867534
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:46.013946342
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:38:46.017200327
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:38:46.018449880
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:38:46.027149000
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:38:46.029107778
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:38:46.031470986
+DEBUG (0): LQI Root is receiving packet from node 2 @1:38:46.036630317
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:38:46.041053449
+DEBUG (0): LQI Root is receiving packet from node 4 @1:38:46.045402179
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:38:46.047614690
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:38:46.050891537
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:38:46.055976458
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:38:46.057548104
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:38:46.063727878
+DEBUG (0): LQI Root is receiving packet from node 5 @1:38:46.065436852
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:38:46.066932205
+DEBUG (0): LQI Root is receiving packet from node 3 @1:38:46.072013352
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:38:46.079368045
+DEBUG (0): LQI Root is receiving packet from node 6 @1:38:46.083945655
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:38:51.005975589
+DEBUG (0): LQI Root is receiving packet from node 1 @1:38:51.010240817
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:38:51.022646022
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:51.025298815
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:38:51.028552800
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:38:51.031287881
+DEBUG (0): LQI Root is receiving packet from node 2 @1:38:51.033357748
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:38:51.049369441
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:38:51.053351962
+DEBUG (0): LQI Root is receiving packet from node 3 @1:38:51.055549214
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:38:51.057696917
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:38:51.061667953
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:38:51.062244010
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:38:51.063830915
+DEBUG (0): LQI Root is receiving packet from node 4 @1:38:51.067237379
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:38:51.075671666
+DEBUG (0): LQI Root is receiving packet from node 6 @1:38:51.080630743
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:38:51.090091137
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:38:51.104480091
+DEBUG (0): LQI Root is receiving packet from node 5 @1:38:51.111285472
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:38:56.007638787
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:38:56.009239060
+DEBUG (0): LQI Root is receiving packet from node 1 @1:38:56.010362887
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:38:56.015411177
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:38:56.020343620
+DEBUG (0): LQI Root is receiving packet from node 2 @1:38:56.022279931
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:38:56.031085744
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:38:56.034549469
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:38:56.037223516
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:38:56.040195188
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:38:56.043479583
+DEBUG (0): LQI Root is receiving packet from node 3 @1:38:56.046348218
+DEBUG (0): LQI Root is receiving packet from node 4 @1:38:56.054038603
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:38:56.061708294
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:38:56.063666843
+DEBUG (0): LQI Root is receiving packet from node 5 @1:38:56.068213935
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:38:56.070115838
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:38:56.075074915
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:38:56.081269947
+DEBUG (0): LQI Root is receiving packet from node 6 @1:38:56.087739636
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 420 and my cost to 537.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 64 and my cost to 537.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 189 and my cost to 393.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 268.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 74 that advertises 196.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 420 and my cost to 537.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 196.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 64 and my cost to 537.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 96 that advertises 196.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 189 and my cost to 393.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 114 that advertises 196.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 196.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 196.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 582.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 5, my link to 855 and my cost to 582.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 582.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 5, my link to 34 and my cost to 582.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 582.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 196.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 582.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 582.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 106.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 1437.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 34 and my cost to 582.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 100 that advertises 1437.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 189 and my cost to 393.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 1437.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 196.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 77 that advertises 1437.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 90 and my cost to 106.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:39:1.006158693
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:1.008056484
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:39:1.010745897
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:1.012651692
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:1.019472212
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:39:1.021903781
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:1.022020534
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:39:1.030017635
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:39:1.036090598
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:39:1.042853976
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:39:1.048591247
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:39:1.058341556
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:39:1.061332262
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:39:1.063422704
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:39:1.072619926
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:1.080939691
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:39:1.086352756
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:1.088599559
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:39:1.091952699
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:1.091952699
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:1.091952699
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:39:1.091952699
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:1.091952699
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:1.096392980
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:1.106616309
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:39:6.007129585
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:6.007129585
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:39:6.007129585
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:39:6.007129585
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:6.009081156
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:39:6.009607159
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:6.011827604
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:6.016046331
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:39:6.018508693
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:39:6.019843856
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:39:6.025054675
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:39:6.025054675
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:39:6.025054675
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:6.025054675
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:39:6.025054675
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:39:6.025054675
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:6.028518400
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:39:6.031295484
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:6.032424627
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:39:6.038497590
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:39:6.038497590
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:39:6.038497590
+DEBUG (0): LQI Root is receiving packet from node 5 @1:39:6.038497590
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:39:6.038497590
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:39:6.038497590
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:39:6.046462631
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:6.046462631
+DEBUG (0): LQI Root is receiving packet from node 5 @1:39:6.048400486
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:39:6.048400486
+DEBUG (0): LQI Root is receiving packet from node 5 @1:39:6.053115425
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:39:6.061126242
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:39:6.061126242
+DEBUG (0): LQI Root is receiving packet from node 5 @1:39:6.061126242
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:39:6.061126242
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:39:6.068236796
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:6.068236796
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:39:6.068236796
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:39:6.068236796
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:39:6.068236796
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:11.008241927
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:39:11.008241927
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:39:11.008777525
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:11.010513134
+DEBUG (0): LQI Root is receiving packet from node 5 @1:39:11.010513134
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:39:11.010513134
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:39:11.011507171
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:39:11.011507171
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:39:11.015563764
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:39:11.015563764
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:39:11.015563764
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:11.017001964
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:39:11.019838421
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:11.019838421
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:11.019838421
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:39:11.020555580
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:39:11.027116821
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:39:11.028596915
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:39:11.029298815
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:11.029298815
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:11.029298815
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:11.035203932
+DEBUG (0): LQI Root is receiving packet from node 5 @1:39:11.035203932
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:39:11.035203932
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:39:11.035203932
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:39:11.037736876
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:11.037736876
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:39:11.037736876
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:39:11.037736876
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:39:11.037736876
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:39:11.044160789
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:39:11.044160789
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:39:11.044160789
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:11.044160789
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:11.044160789
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:39:11.044160789
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:39:11.052827731
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:11.052827731
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:11.052827731
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:39:11.052827731
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 60 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 118 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 94 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 109 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:39:16.006860593
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:39:16.006860593
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:39:16.006860593
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:39:16.006860593
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:39:16.009887528
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:16.009887528
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:39:16.010439180
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:39:16.012621056
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:16.012621056
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:16.012621056
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:16.014938157
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:39:16.014938157
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:39:16.014938157
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:39:16.014938157
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:39:16.016670047
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:39:16.016893610
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:16.016893610
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:39:16.017333773
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:16.019426436
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:39:16.019426436
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:39:16.019426436
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:39:16.019426436
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:16.022475955
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:39:16.022475955
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:39:16.022475955
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:39:16.022475955
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:39:16.022475955
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:16.024978382
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:16.024978382
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:39:16.024978382
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:39:16.024978382
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:39:16.024978382
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:16.027404515
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:39:16.027404515
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:39:16.027404515
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:39:16.027404515
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:39:16.029024159
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:39:16.030837723
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:16.030837723
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:39:16.030837723
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:39:16.030837723
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:39:16.032005040
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:39:16.034423517
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:16.034423517
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:16.035033865
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:16.036559735
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:39:16.036559735
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:39:16.037978794
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:16.037978794
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:16.037978794
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:16.042464852
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:39:16.042464852
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:39:16.042464852
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:39:16.043471926
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:16.044829951
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:39:16.044829951
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:16.044829951
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:39:16.044829951
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:16.044829951
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:39:16.053832584
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:39:16.053832584
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:39:16.053832584
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:16.053832584
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:39:16.053832584
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:39:16.053832584
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:39:16.060332790
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:39:16.060332790
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:39:16.060332790
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:39:16.060332790
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:16.060332790
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:39:16.060332790
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:39:16.062957286
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:39:16.062957286
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:16.062957286
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:39:16.062957286
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:39:16.062957286
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:39:16.069961029
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:39:16.069961029
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:39:16.069961029
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:16.069961029
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:39:16.069961029
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:39:16.069961029
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:39:21.006655023
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:21.006655023
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:39:21.006655023
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:21.007433098
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:39:21.009925701
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:39:21.009925701
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:39:21.009925701
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:39:21.009925701
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:39:21.011524091
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:39:21.013999774
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:21.013999774
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:39:21.013999774
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:39:21.013999774
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:39:21.013999774
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:39:21.013999774
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:21.016410649
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:39:21.016410649
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:39:21.016410649
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:21.018577384
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:39:21.018577384
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:39:21.018577384
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:39:21.018577384
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:39:21.018577384
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:39:21.023469992
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:39:21.023469992
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:21.023469992
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:39:21.023469992
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:39:21.023469992
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:39:21.025855784
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:39:21.025855784
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:21.025855784
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:39:21.025855784
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:39:21.030875896
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:39:21.030875896
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:39:21.030875896
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:21.030875896
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:39:21.030875896
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:39:21.034446432
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:39:21.034446432
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:21.034446432
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:39:21.034446432
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:39:21.035819715
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:26.007785709
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:39:26.007785709
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:39:26.007785709
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:39:26.010352945
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:26.010352945
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:39:26.010352945
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:39:26.010352945
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:39:26.011156339
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:39:26.012682091
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:26.012682091
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:26.012682091
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:39:26.012682091
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:26.012682091
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:39:26.016120734
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:26.016120734
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:39:26.016120734
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:39:26.016120734
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:39:26.017234619
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:26.018012812
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:39:26.018012812
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:39:26.019380778
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:39:26.019380778
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:39:26.019380778
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:39:26.020927224
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:26.020927224
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:39:26.022773527
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:39:26.022773527
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:39:26.023612755
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:26.023612755
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:26.023612755
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:26.025596386
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:26.025596386
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:39:26.025596386
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:26.025596386
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:39:26.026740789
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:39:26.028383411
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:39:26.028383411
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:26.028383411
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:39:26.028383411
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:26.028383411
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:39:26.030708051
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:26.030708051
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:39:26.030708051
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:39:26.030708051
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:26.033042632
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:26.033042632
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:39:26.033042632
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:39:26.033042632
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:39:26.036445322
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:39:26.036445322
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:26.036445322
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:39:26.036445322
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:39:26.038276366
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:26.038688351
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:39:26.038688351
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:39:26.038688351
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:39:26.038688351
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:39:26.042426732
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:39:26.042426732
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:26.042426732
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:39:26.042426732
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:39:26.042426732
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:39:26.044868124
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:39:26.044868124
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:26.044868124
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:26.044868124
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:39:26.044868124
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:39:26.049811943
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:39:26.049811943
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:39:26.049811943
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:39:26.049811943
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:26.049811943
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:39:26.049811943
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:39:26.054435329
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:26.054435329
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:26.054435329
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:39:26.054435329
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:39:26.054435329
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 106 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 1241.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 1241 and my cost to 1241.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 98 that advertises 1241.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 1241.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1241.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 98 that advertises 1728.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 112 that advertises 1728.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 2, my link to 90 and my cost to 1728.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 110 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 92 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:31.010912200
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:31.020469463
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:31.022607572
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:31.028596915
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:31.032886271
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:31.040008201
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:31.060428224
+DEBUG (0): LQI Root is receiving packet from node 5 @1:39:31.069644479
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 2240.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 90 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 96 that advertises 2240.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 91 that advertises 2240.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 79 that advertises 2240.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1241 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:36.006936887
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:36.015594281
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:36.016329038
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:36.023231288
+DEBUG (0): LQI Root is receiving packet from node 5 @1:39:36.026111408
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:36.028795278
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:36.035175076
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:36.040240964
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:41.009706763
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:41.012430019
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:41.018920678
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:41.022432400
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:41.035464991
+DEBUG (0): LQI Root is receiving packet from node 5 @1:39:41.042270371
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:41.048785836
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:41.050819017
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 66 that advertises 216.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 216.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 79 that advertises 216.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 111 that advertises 216.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 83 that advertises 1518.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 86 that advertises 1518.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 90 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 1518.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1518.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 1518.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:46.008013047
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:39:46.016101701
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:46.017015562
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:46.021610092
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:46.024171892
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:39:46.028543206
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:46.030946755
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:46.036821354
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:46.046722029
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:39:46.050674033
+DEBUG (0): LQI Root is receiving packet from node 5 @1:39:46.057540448
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:46.065162195
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 105 that advertises 1818.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1818.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 1818.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 76 that advertises 1818.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 216 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 1818.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:51.006990714
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:51.008888110
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:39:51.011148288
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:51.026643801
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:51.033624353
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:51.042667098
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:51.043380374
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:39:51.059390633
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:51.063357895
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:39:51.063922467
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:51.068042316
+DEBUG (0): LQI Root is receiving packet from node 5 @1:39:51.079257460
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:39:56.015916935
+DEBUG (0): LQI Root is receiving packet from node 1 @1:39:56.021761136
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:39:56.022302398
+DEBUG (0): LQI Root is receiving packet from node 3 @1:39:56.025947336
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:39:56.030303668
+DEBUG (0): LQI Root is receiving packet from node 2 @1:39:56.037484804
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:39:56.039783203
+DEBUG (0): LQI Root is receiving packet from node 4 @1:39:56.046954792
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:39:56.048953682
+DEBUG (0): LQI Root is receiving packet from node 6 @1:39:56.054797764
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:39:56.055972684
+DEBUG (0): LQI Root is receiving packet from node 5 @1:39:56.063754621
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 62 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 90 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 93 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:1.008945371
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:1.009584575
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:1.018861983
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:40:1.023119042
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:1.026552367
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:1.039980023
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:40:1.041116375
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:1.046516064
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:40:1.055663628
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:1.062890540
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:40:1.071975178
+DEBUG (0): LQI Root is receiving packet from node 5 @1:40:1.080001254
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 70 that advertises 322.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 512 and my cost to 1728.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 322.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 2, my link to 90 and my cost to 1728.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 92 that advertises 322.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 112 that advertises 322.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 322.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 98 that advertises 681.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 3, my link to 512 and my cost to 681.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 114 that advertises 681.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 681.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 112 that advertises 681.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 92 that advertises 681.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 681.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 101 that advertises 1193.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 3, my link to 64 and my cost to 681.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 1193.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 216.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 90 that advertises 1193.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 322.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 1193.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 106 and my cost to 216.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 60 that advertises 1193.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:6.006320874
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:6.009630469
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:40:6.011718572
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:40:6.014076068
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:40:6.017434872
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:6.021211822
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:40:6.022638089
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:6.026613284
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:6.044771255
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:6.049272572
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:40:6.057128463
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:40:6.066466787
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:40:6.075179505
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:40:6.075179505
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:6.075179505
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:6.075179505
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:40:6.075179505
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:6.080443756
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:40:6.082946183
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:6.086425167
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:40:11.007509510
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:40:11.007509510
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:11.007509510
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:40:11.007509510
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:11.008258729
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:11.013567096
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:40:11.018945484
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:40:11.020113078
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:40:11.026229595
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:40:11.028360101
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:40:11.030053817
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:40:11.031158155
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:40:11.031158155
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:40:11.035791088
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:40:11.035827318
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:40:11.038552913
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:40:11.042144419
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:40:11.042144419
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:40:11.042144419
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:11.048074342
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:40:11.048074342
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:40:11.048074342
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:11.048074342
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:40:11.056716478
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:11.057107492
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:40:11.059722442
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:40:11.065619956
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:40:11.070884208
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:40:11.070884208
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:11.070884208
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:40:11.070884208
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:40:11.073081461
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:40:11.075637266
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:40:11.078116832
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:40:11.078116832
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:11.078116832
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:40:11.078116832
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:40:11.078116832
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:40:11.079139165
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:11.080489532
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:40:11.080489532
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:40:11.080489532
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:40:11.080489532
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:40:11.086997395
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:40:11.095137884
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:40:11.100791260
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:11.110472878
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:16.007572088
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:16.007572088
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:16.007572088
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:16.007572088
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:40:16.008193812
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:40:16.010719154
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:40:16.013061337
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:40:16.013061337
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:40:16.013061337
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:40:16.013061337
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:40:16.013061337
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:16.015540903
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:40:16.015540903
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:40:16.015540903
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:16.016237486
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:40:16.017671686
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:40:16.020805154
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:40:16.020805154
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:40:16.020805154
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:40:16.022859762
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:40:16.022859762
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:16.024797499
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:16.028266659
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:16.030784344
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:16.030784344
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:16.030784344
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:40:16.030784344
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:40:16.030784344
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:16.030784344
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:40:16.033836084
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:16.034949969
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:40:16.034949969
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:40:16.036622991
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:40:16.036622991
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:40:16.036622991
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:40:16.040778793
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:16.040778793
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:40:16.040778793
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:16.042838717
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:16.042838717
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:16.042838717
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:40:16.047614690
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:16.047614690
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:16.047614690
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:40:16.047614690
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:40:16.050979207
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:16.054298001
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:16.054298001
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:40:16.054298001
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:40:16.056792771
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:16.059417268
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:16.059417268
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:16.059417268
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:16.059417268
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:40:16.059417268
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:16.059417268
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:40:16.063476082
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 98 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 90 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 65534.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 115 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 65534.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 65534.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 93 that advertises 65534.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 74 that advertises 65534.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 65534.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (0): LQI Root is receiving packet from node 5 @1:40:21.008514245
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:40:21.008514245
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:40:21.009998221
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:21.010545873
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:40:21.011390537
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:40:21.011390537
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:40:21.011904015
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:21.018222660
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:21.018222660
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:21.025165369
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:21.025165369
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:40:21.025165369
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:21.025165369
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:40:21.025867269
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:40:21.025867269
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:21.033099893
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:40:21.033099893
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:26.006471918
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:40:26.006471918
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:40:26.006471918
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:40:26.006471918
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:40:26.008196033
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:26.009849408
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:40:26.009849408
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:40:26.009849408
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:26.010990036
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:26.010990036
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:40:26.012201138
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:26.012201138
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:40:26.012201138
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:40:26.012201138
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:40:26.013750200
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:40:26.013750200
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:26.015510386
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:40:26.015510386
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:40:26.015510386
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:40:26.016662390
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:40:26.016662390
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:40:26.016662390
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:40:26.019172474
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:40:26.019172474
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:40:26.019172474
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:26.020113078
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:26.022376801
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:40:26.022376801
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:40:26.022376801
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:40:26.024490103
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:26.024490103
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:40:26.024490103
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:40:26.025546836
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:40:26.025546836
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:26.026979493
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:40:26.026979493
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:40:26.027810788
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:40:26.027810788
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:26.029655200
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:40:26.029655200
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:26.029655200
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:26.029655200
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:40:26.032317817
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:40:26.032317817
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:26.032317817
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:40:26.032317817
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:40:26.032808316
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:26.034715654
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:40:26.034715654
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:40:26.034715654
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:40:26.034715654
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:26.035896009
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:40:26.038774468
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:26.038774468
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:26.038774468
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:26.038774468
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:26.038774468
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:26.038774468
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:40:26.041353188
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:40:26.041353188
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:40:26.041353188
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:26.041353188
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:40:26.044381736
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:40:26.044381736
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:26.044381736
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:26.044381736
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:26.048949800
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:26.048949800
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:26.048949800
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:40:26.048949800
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:26.049752799
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:40:26.049752799
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:26.052102639
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:26.052102639
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:26.052102639
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:40:26.052102639
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:26.052102639
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:26.058221377
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:40:26.058221377
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:26.058221377
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:26.058221377
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:26.058221377
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:26.058221377
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:40:31.005624638
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:31.005624638
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:40:31.005624638
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:31.007587346
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:31.007587346
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:31.007587346
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:31.007587346
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:40:31.008087001
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:31.010134006
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:40:31.010134006
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:40:31.010134006
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:40:31.010134006
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:31.013675568
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:31.013675568
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:40:31.013675568
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:40:31.018600245
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:31.018600245
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:40:31.018600245
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:40:31.018600245
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:40:31.018600245
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:31.021308692
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:40:31.021308692
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:40:31.021308692
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:40:31.021682503
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:31.024036225
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:40:31.024036225
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:40:31.024036225
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:40:31.024036225
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:40:31.024036225
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:31.027595276
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:40:31.027595276
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:31.027595276
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:31.027595276
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:40:31.027595276
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:31.031303140
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:31.031303140
+DEBUG (4): LQI fwd is forwarding packet from node 4 @1:40:31.031303140
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:31.031303140
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:40:31.032241523
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:31.033359291
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:40:31.033359291
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:40:31.033359291
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:31.035407730
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:31.035407730
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:40:31.035407730
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:40:31.036048596
+DEBUG (6): LQI fwd is forwarding packet from node 4 @1:40:31.047401069
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:40:31.047401069
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:31.047401069
+DEBUG (5): LQI fwd is forwarding packet from node 4 @1:40:31.047401069
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:40:31.047401069
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 63 that advertises 0.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 1, my link to 4698 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 82 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 79 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 85 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 109 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 93 that advertises 1423.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 101 that advertises 1423.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 1423.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 111 that advertises 1423.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 100 that advertises 2071.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 2, my link to 420 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 117 that advertises 2071.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 111 that advertises 2071.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 97 that advertises 2071.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 99 that advertises 2071.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 2491.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 2491.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 82 that advertises 2491.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 2491.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 1423 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 59 that advertises 2491.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:36.008323538
+DEBUG (0): LQI Root is receiving packet from node 5 @1:40:36.010452099
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:36.014467477
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:36.017793755
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:36.020419913
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:36.030084335
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:36.058154678
+DEBUG (0): LQI Root is receiving packet from node 5 @1:40:41.007613981
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:41.011096847
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:41.017265136
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:41.019426555
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:41.023820942
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:41.026437505
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:41.037050235
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:46.008645861
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:46.010927459
+DEBUG (0): LQI Root is receiving packet from node 5 @1:40:46.018218778
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:46.020664052
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:46.023704307
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:46.028734243
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:46.037279115
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 77 that advertises 144.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 80 that advertises 144.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 119 that advertises 144.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 88 that advertises 1950.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 420 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 93 that advertises 1950.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1728 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 1950.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1950.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 80 that advertises 1950.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 104 that advertises 1728.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 420 and my cost to 2071.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 1728.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 1, my link to 2071 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 91 that advertises 1728.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 1728.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 144 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 95 that advertises 1728.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:51.006492494
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:51.008411316
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:51.009096296
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:51.010408663
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:40:51.011529755
+DEBUG (0): LQI Root is receiving packet from node 5 @1:40:51.014968675
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:51.017022887
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:51.026445438
+DEBUG (0): LQI Root is receiving packet from node 3 @1:40:56.009605269
+DEBUG (0): LQI Root is receiving packet from node 4 @1:40:56.015949114
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:40:56.018190482
+DEBUG (0): LQI Root is receiving packet from node 1 @1:40:56.020220007
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:40:56.027475097
+DEBUG (0): LQI Root is receiving packet from node 2 @1:40:56.032006931
+DEBUG (0): LQI Root is receiving packet from node 5 @1:40:56.035110159
+DEBUG (0): LQI Root is receiving packet from node 6 @1:40:56.039171194
+DEBUG (0): LQI Root is receiving packet from node 4 @1:41:1.008075625
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:41:1.010042336
+DEBUG (0): LQI Root is receiving packet from node 1 @1:41:1.012239707
+DEBUG (0): LQI Root is receiving packet from node 5 @1:41:1.014632983
+DEBUG (0): LQI Root is receiving packet from node 3 @1:41:1.018073847
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:41:1.020959632
+DEBUG (0): LQI Root is receiving packet from node 6 @1:41:1.024629653
+DEBUG (0): LQI Root is receiving packet from node 2 @1:41:1.029000967
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 65 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 420 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 83 that advertises 0.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 108 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 80 that advertises 0.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 1, my link to 1950 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 69 that advertises 164.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 2, my link to 420 and my cost to 2071.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 89 that advertises 164.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 1621 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 164.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 561 and my cost to 164.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 164.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 164.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:41:6.005557939
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:41:6.010713719
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:41:6.013191063
+DEBUG (0): LQI Root is receiving packet from node 1 @1:41:6.015520327
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:41:6.019891523
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:41:6.024232927
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:41:6.027230958
+DEBUG (0): LQI Root is receiving packet from node 4 @1:41:6.030938822
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:41:6.035287551
+DEBUG (0): LQI Root is receiving packet from node 2 @1:41:6.039071709
+DEBUG (0): LQI Root is receiving packet from node 5 @1:41:6.041122086
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:41:6.044000269
+DEBUG (0): LQI Root is receiving packet from node 3 @1:41:6.048287964
+DEBUG (0): LQI Root is receiving packet from node 6 @1:41:6.053063937
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 725.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 4, my link to 465 and my cost to 725.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 109 that advertises 725.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 144 and my cost to 725.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 107 that advertises 725.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 89 that advertises 725.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 101 that advertises 725.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 107 that advertises 1190.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 144 and my cost to 725.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 103 that advertises 1190.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 561 and my cost to 164.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 83 that advertises 1190.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 76 that advertises 1190.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 6 with LQI 58 that advertises 1190.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:41:11.005500678
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:41:11.016601356
+DEBUG (0): LQI Root is receiving packet from node 1 @1:41:11.018633102
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:41:11.019220140
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:41:11.020541983
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:41:11.021257480
+DEBUG (0): LQI Root is receiving packet from node 3 @1:41:11.025430431
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:41:11.029132631
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:41:11.032266329
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:41:11.036334737
+DEBUG (0): LQI Root is receiving packet from node 4 @1:41:11.038369809
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:41:11.040444992
+DEBUG (0): LQI Root is receiving packet from node 2 @1:41:11.045877089
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:41:11.048913570
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:41:11.061990276
+DEBUG (0): LQI Root is receiving packet from node 5 @1:41:11.065331932
+DEBUG (0): LQI Root is receiving packet from node 6 @1:41:11.081796069
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:41:16.017093516
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:41:16.019614976
+DEBUG (0): LQI Root is receiving packet from node 1 @1:41:16.022951314
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:41:16.025460948
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:41:16.038650177
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:41:16.044580100
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:41:16.045653920
+DEBUG (0): LQI Root is receiving packet from node 2 @1:41:16.047708133
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:41:16.048883053
+DEBUG (0): LQI Root is receiving packet from node 4 @1:41:16.051965310
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:41:16.056359816
+DEBUG (0): LQI Root is receiving packet from node 3 @1:41:16.059564143
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:41:16.062974766
+DEBUG (0): LQI Root is receiving packet from node 5 @1:41:16.065896503
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:41:16.069902216
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:41:16.077729929
+DEBUG (0): LQI Root is receiving packet from node 6 @1:41:16.084901518
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:41:21.007303095
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:41:21.011112106
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:41:21.012115298
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:41:21.014650463
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:41:21.017638947
+DEBUG (0): LQI Root is receiving packet from node 2 @1:41:21.021135529
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:41:21.023582238
+DEBUG (0): LQI Root is receiving packet from node 1 @1:41:21.026247193
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 59 that advertises 165.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 465 and my cost to 725.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 165.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 561 and my cost to 164.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 76 that advertises 165.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:41:21.037189224
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:41:21.043960205
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:41:21.048083936
+DEBUG (0): LQI Root is receiving packet from node 3 @1:41:21.051318781
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:41:21.057239156
+DEBUG (0): LQI Root is receiving packet from node 5 @1:41:21.062030388
+DEBUG (0): LQI Root is receiving packet from node 6 @1:41:21.067660848
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 84 that advertises 289.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 465 and my cost to 725.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 289.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 144 and my cost to 725.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 110 that advertises 289.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 4, my link to 125 and my cost to 289.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 289.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 289.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 107 that advertises 869.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 465 and my cost to 725.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 869.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 125 and my cost to 289.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 97 that advertises 869.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 164.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 73 that advertises 869.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 165 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 869.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 20 and my cost to 144.
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:41:26.007438533
+DEBUG (0): LQI Root is receiving packet from node 1 @1:41:26.009691504
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:41:26.011703313
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:41:26.014398391
+DEBUG (0): LQI Root is receiving packet from node 3 @1:41:26.020166180
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:41:26.025171033
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:41:26.027957711
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:41:26.031023048
+DEBUG (0): LQI Root is receiving packet from node 2 @1:41:26.031564428
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:41:26.042941754
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:41:26.046954792
+DEBUG (0): LQI Root is receiving packet from node 5 @1:41:26.051684989
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:41:26.062686512
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:41:26.067233605
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:41:26.075427527
+DEBUG (0): LQI Root is receiving packet from node 6 @1:41:26.080478156
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:41:26.095736856
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:41:26.103366206
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:41:26.109942706
+DEBUG (0): LQI Root is receiving packet from node 4 @1:41:26.113986261
+DEBUG (0): LQI Root is receiving packet from node 1 @1:41:31.009889867
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:41:31.018747120
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:41:31.024370255
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:41:31.027435033
+DEBUG (0): LQI Root is receiving packet from node 2 @1:41:31.038217222
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:41:31.040149412
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:41:31.047294258
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:41:31.056510512
+DEBUG (0): LQI Root is receiving packet from node 3 @1:41:31.066169270
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:41:31.069434631
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:41:31.071963802
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:41:31.082465561
+DEBUG (0): LQI Root is receiving packet from node 6 @1:41:31.087836624
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:41:31.092776668
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:41:31.093280206
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:41:31.099734636
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:41:31.102465943
+DEBUG (0): LQI Root is receiving packet from node 5 @1:41:31.107928558
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:41:31.111148143
+DEBUG (0): LQI Root is receiving packet from node 4 @1:41:31.119906637
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:41:36.005832596
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:41:36.007913443
+DEBUG (0): LQI Root is receiving packet from node 1 @1:41:36.010759613
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:41:36.015075486
+DEBUG (0): LQI Root is receiving packet from node 2 @1:41:36.019182415
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:41:36.024284138
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:41:36.025451402
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:41:36.037849122
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:41:36.041984230
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:41:36.049796684
+DEBUG (0): LQI Root is receiving packet from node 3 @1:41:36.055854388
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:41:36.066016683
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:41:36.071382310
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:41:36.077704847
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:41:36.083970737
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:41:36.089616456
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:41:36.090537413
+DEBUG (6): LQI receiving routing beacon from 0 with LQI 64 that advertises 0.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 465 and my cost to 725.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 92 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 104 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 76 that advertises 855.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 465 and my cost to 725.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 91 that advertises 855.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 144 and my cost to 725.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 97 that advertises 855.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 125 and my cost to 289.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 117 that advertises 855.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 855.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 95 that advertises 414.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 5, my link to 669 and my cost to 414.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 113 that advertises 414.
+DEBUG (5):   -- Not a loop
+DEBUG (5): Set my count to 5, my link to 76 and my cost to 414.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 104 that advertises 414.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 93 that advertises 414.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 98 that advertises 414.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 107 that advertises 1083.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 76 and my cost to 414.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 99 that advertises 1083.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 125 and my cost to 289.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 87 that advertises 1083.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 70 that advertises 1083.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 855 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:41:41.011156339
+DEBUG (0): LQI Root is receiving packet from node 2 @1:41:41.016839783
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:41:41.025520093
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:41:41.028197968
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:41:41.030780570
+DEBUG (0): LQI Root is receiving packet from node 3 @1:41:41.033286771
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:41:41.046174937
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:41:41.046939534
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:41:41.048617991
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:41:41.058032609
+DEBUG (0): LQI Root is receiving packet from node 4 @1:41:41.065204198
+DEBUG (0): LQI Root is receiving packet from node 5 @1:41:41.072528374
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:41:41.079059097
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:41:41.087085173
+DEBUG (0): LQI Root is receiving packet from node 6 @1:41:41.101260506
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:41:46.006446718
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:41:46.007282172
+DEBUG (0): LQI Root is receiving packet from node 1 @1:41:46.010027195
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:41:46.012344178
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:41:46.029741318
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:41:46.043964087
+DEBUG (0): LQI Root is receiving packet from node 3 @1:41:46.049050899
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:41:46.054122499
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:41:46.065398678
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:41:46.073714670
+DEBUG (0): LQI Root is receiving packet from node 2 @1:41:46.077233718
+DEBUG (0): LQI Root is receiving packet from node 4 @1:41:46.081109427
+DEBUG (0): LQI Root is receiving packet from node 2 @1:41:46.087518081
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:41:46.093688308
+DEBUG (0): LQI Root is receiving packet from node 6 @1:41:46.100157997
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:41:51.008445607
+DEBUG (0): LQI Root is receiving packet from node 1 @1:41:51.011141080
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:41:51.021547396
+DEBUG (0): LQI Root is receiving packet from node 2 @1:41:51.025277844
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:41:51.028796939
+DEBUG (0): LQI Root is receiving packet from node 3 @1:41:51.033166592
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:41:51.035556543
+DEBUG (0): LQI Root is receiving packet from node 4 @1:41:51.040790278
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:41:51.048232641
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:41:51.052936203
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:41:51.058124161
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:41:51.060443483
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:41:51.065631441
+DEBUG (0): LQI Root is receiving packet from node 6 @1:41:51.069827584
+DEBUG (0): LQI Root is receiving packet from node 5 @1:41:51.074023726
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 74 that advertises 273.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 76 and my cost to 414.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 92 that advertises 273.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 4, my link to 125 and my cost to 289.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 113 that advertises 273.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 273.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 980.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 5, my link to 669 and my cost to 414.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 89 that advertises 980.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 5, my link to 76 and my cost to 414.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 109 that advertises 980.
+DEBUG (4):   -- Not a loop
+DEBUG (4): Set my count to 3, my link to 144 and my cost to 980.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 980.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 76 and my cost to 273.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 81 that advertises 980.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 273 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 110 that advertises 490.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 6, my link to 125 and my cost to 490.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 490.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 144 and my cost to 980.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 89 that advertises 490.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 855.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:41:56.008455549
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:41:56.014840893
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:41:56.024604571
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:41:56.027713572
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:41:56.029639942
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:41:56.032413251
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:41:56.039804126
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:41:56.046802205
+DEBUG (0): LQI Root is receiving packet from node 4 @1:41:56.054345668
+DEBUG (0): LQI Root is receiving packet from node 4 @1:41:56.061028978
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:41:56.068498416
+DEBUG (0): LQI Root is receiving packet from node 3 @1:41:56.073785251
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:41:56.080239681
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:41:56.081710228
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:41:56.087716444
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:41:56.091475796
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:41:56.094170875
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:41:56.098403246
+DEBUG (0): LQI Root is receiving packet from node 5 @1:41:56.102059622
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:41:56.105254403
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:41:56.109770978
+DEBUG (0): LQI Root is receiving packet from node 6 @1:41:56.120238446
+DEBUG (3): LQI fwd is forwarding packet from node 4 @1:42:1.006137770
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:1.009218484
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:42:1.011047189
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:42:1.011453462
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:42:1.015403575
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:42:1.023254149
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:1.025957160
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:42:1.034563067
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:42:1.035239885
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:1.042945528
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:1.045936233
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:1.048699949
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:42:1.055314899
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:1.057382149
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:1.061408555
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:42:1.064164945
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:42:1.067817209
+DEBUG (6): LQI fwd is forwarding packet from node 5 @1:42:1.073218789
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:42:1.073218789
+DEBUG (0): LQI Root is receiving packet from node 5 @1:42:1.073218789
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:42:1.073218789
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:42:1.073218789
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:42:1.074012241
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:42:1.083564188
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:42:1.083564188
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:42:1.083564188
+DEBUG (0): LQI Root is receiving packet from node 6 @1:42:1.083564188
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:42:1.093283979
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:42:1.096350978
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:42:1.102668080
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:1.116095736
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:42:1.120749639
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:42:6.007026548
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:6.007026548
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:6.007026548
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:6.007026548
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:42:6.009094075
+DEBUG (0): LQI Root is receiving packet from node 5 @1:42:6.009094075
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:42:6.009094075
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:42:6.009576642
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:6.011736170
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:42:6.011736170
+DEBUG (2): LQI fwd is forwarding packet from node 1 @1:42:6.011736170
+DEBUG (6): LQI fwd is forwarding packet from node 1 @1:42:6.011736170
+DEBUG (4): LQI fwd is forwarding packet from node 1 @1:42:6.011736170
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:42:6.014184769
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:6.014184769
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:42:6.014184769
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:42:6.014184769
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:6.017305595
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:42:6.017305595
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:42:6.018655568
+DEBUG (1): LQI fwd is forwarding packet from node 1 @1:42:6.023706198
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:6.023706198
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:42:6.023706198
+DEBUG (3): LQI fwd is forwarding packet from node 1 @1:42:6.024215447
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:42:6.027696770
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:42:6.027696770
+DEBUG (0): LQI Root is receiving packet from node 5 @1:42:6.027696770
+DEBUG (5): LQI fwd is forwarding packet from node 5 @1:42:6.027696770
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:6.030181599
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:6.030181599
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:42:6.034593702
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:6.034593702
+DEBUG (6): LQI fwd is forwarding packet from node 2 @1:42:6.034593702
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:42:6.035844916
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:42:6.035844916
+DEBUG (2): LQI fwd is forwarding packet from node 2 @1:42:6.039934247
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:42:6.039934247
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:6.039934247
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:42:6.039934247
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:42:6.040636148
+DEBUG (3): LQI fwd is forwarding packet from node 2 @1:42:6.046175056
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:42:6.046175056
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:6.046175056
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:42:6.046175056
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:42:6.046175056
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:6.055436968
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:42:6.060518115
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:42:6.060518115
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:42:6.060518115
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:42:6.060518115
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:42:6.060518115
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:42:6.063752960
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:6.063752960
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:42:6.063752960
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:42:6.065812884
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:6.065812884
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:42:6.065812884
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:42:6.067064098
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:42:6.067064098
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:42:6.068925659
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:42:6.068925659
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:6.068925659
+DEBUG (5): LQI fwd is forwarding packet from node 1 @1:42:6.071916364
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:42:6.080949515
+DEBUG (5): LQI receiving routing beacon from 0 with LQI 78 that advertises 0.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 1, my link to 2457 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 84 that advertises 0.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 1, my link to 1518 and my cost to 0.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 107 that advertises 0.
+DEBUG (1):   -- Not a cycle.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 91 that advertises 0.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 2 with LQI 72 that advertises 926.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 6, my link to 125 and my cost to 490.
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 92 that advertises 926.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 93 that advertises 926.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 926.
+DEBUG (3):   -- Not a cycle.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 92 that advertises 1716.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 6, my link to 125 and my cost to 490.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 110 that advertises 1716.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 109 that advertises 1716.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (1): LQI receiving routing beacon from 4 with LQI 91 that advertises 1716.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 97 that advertises 1716.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:11.008279652
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:11.010866306
+DEBUG (0): LQI Root is receiving packet from node 5 @1:42:11.014449879
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:42:11.016345840
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:11.019273968
+DEBUG (0): LQI Root is receiving packet from node 4 @1:42:11.025577354
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:11.030036668
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:11.037192998
+DEBUG (0): LQI Root is receiving packet from node 6 @1:42:11.040862689
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 106 that advertises 615.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 94 that advertises 615.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 790 and my cost to 926.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 615.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 79 that advertises 615.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 1, my link to 926 and my cost to 0.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:16.006593988
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:16.010431129
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:16.011192173
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:16.012819419
+DEBUG (0): LQI Root is receiving packet from node 5 @1:42:16.016814977
+DEBUG (0): LQI Root is receiving packet from node 6 @1:42:16.025207262
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:42:16.028323920
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:16.033576686
+DEBUG (0): LQI Root is receiving packet from node 4 @1:42:16.042945528
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:21.009651045
+DEBUG (0): LQI Root is receiving packet from node 5 @1:42:21.015991008
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:21.026567626
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:42:21.029407287
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:21.033593836
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:21.037157046
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:21.038354550
+DEBUG (0): LQI Root is receiving packet from node 4 @1:42:21.055825761
+DEBUG (0): LQI Root is receiving packet from node 6 @1:42:21.062761144
+DEBUG (6): LQI receiving routing beacon from 1 with LQI 59 that advertises 189.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 6, my link to 125 and my cost to 490.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 90 that advertises 189.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 82 that advertises 189.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 1 with LQI 114 that advertises 189.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 82 that advertises 1051.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 6, my link to 125 and my cost to 490.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 1051.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 1, my link to 2197 and my cost to 0.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 107 that advertises 1051.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 189.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 1051.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 3 with LQI 82 that advertises 1051.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:42:26.008584826
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:26.015037366
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:26.020174231
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:42:26.024341399
+DEBUG (0): LQI Root is receiving packet from node 5 @1:42:26.024993641
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:26.028291741
+DEBUG (0): LQI Root is receiving packet from node 6 @1:42:26.034181599
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:26.045930916
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:26.046912790
+DEBUG (0): LQI Root is receiving packet from node 4 @1:42:26.056291574
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:26.061952551
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 77 that advertises 2197.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 189 and my cost to 0.
+DEBUG (3): LQI receiving routing beacon from 5 with LQI 88 that advertises 2197.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 90 that advertises 2197.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 189.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 2197.
+DEBUG (6):   -- Not a loop
+DEBUG (6): Set my count to 2, my link to 165 and my cost to 2197.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 2197.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 189.
+DEBUG (0): LQI Root is receiving packet from node 5 @1:42:31.009948562
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:31.012987383
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:42:31.016513686
+DEBUG (0): LQI Root is receiving packet from node 4 @1:42:31.023654757
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:31.027437254
+DEBUG (0): LQI Root is receiving packet from node 6 @1:42:31.031236670
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:31.033515652
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:42:31.037469545
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:31.044534323
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:31.046823128
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:31.051339704
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:36.012636433
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:42:36.013360799
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:36.025933968
+DEBUG (0): LQI Root is receiving packet from node 5 @1:42:36.028732022
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:36.033281336
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:36.039664908
+DEBUG (0): LQI Root is receiving packet from node 6 @1:42:36.042879058
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:42:36.044803316
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:36.052589027
+DEBUG (0): LQI Root is receiving packet from node 4 @1:42:36.057193380
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:36.062976427
+DEBUG (4): LQI receiving routing beacon from 0 with LQI 76 that advertises 0.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 1000 and my cost to 189.
+DEBUG (3): LQI receiving routing beacon from 0 with LQI 87 that advertises 0.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 2, my link to 125 and my cost to 926.
+DEBUG (2): LQI receiving routing beacon from 0 with LQI 86 that advertises 0.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 189.
+DEBUG (1): LQI receiving routing beacon from 0 with LQI 103 that advertises 0.
+DEBUG (1):   -- Not a loop
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:41.013124593
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:41.015815560
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:42:41.018258842
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:41.022325708
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:41.024713272
+DEBUG (0): LQI Root is receiving packet from node 6 @1:42:41.035461109
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:41.039445969
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:42:41.043216411
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:41.047853513
+DEBUG (0): LQI Root is receiving packet from node 4 @1:42:41.054658893
+DEBUG (0): LQI Root is receiving packet from node 5 @1:42:41.065780146
+DEBUG (5): LQI receiving routing beacon from 2 with LQI 87 that advertises 253.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 3, my link to 1241 and my cost to 253.
+DEBUG (4): LQI receiving routing beacon from 2 with LQI 100 that advertises 253.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 3, my link to 420 and my cost to 253.
+DEBUG (3): LQI receiving routing beacon from 2 with LQI 110 that advertises 253.
+DEBUG (3):   -- Not a loop
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 253.
+DEBUG (1): LQI receiving routing beacon from 2 with LQI 110 that advertises 253.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (6): LQI receiving routing beacon from 4 with LQI 99 that advertises 673.
+DEBUG (6):   -- Not a cycle.
+DEBUG (6): Set my count to 4, my link to 465 and my cost to 673.
+DEBUG (5): LQI receiving routing beacon from 4 with LQI 115 that advertises 673.
+DEBUG (5):   -- Not a cycle.
+DEBUG (5): Set my count to 4, my link to 52 and my cost to 673.
+DEBUG (3): LQI receiving routing beacon from 4 with LQI 105 that advertises 673.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 253.
+DEBUG (2): LQI receiving routing beacon from 4 with LQI 100 that advertises 673.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 189.
+DEBUG (5): LQI receiving routing beacon from 6 with LQI 100 that advertises 1138.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 52 and my cost to 673.
+DEBUG (4): LQI receiving routing beacon from 6 with LQI 102 that advertises 1138.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 3, my link to 420 and my cost to 253.
+DEBUG (3): LQI receiving routing beacon from 6 with LQI 86 that advertises 1138.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 253.
+DEBUG (2): LQI receiving routing beacon from 6 with LQI 75 that advertises 1138.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 2, my link to 64 and my cost to 189.
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:46.009462623
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:46.013084252
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:42:46.015497017
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:42:46.022340848
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:46.024728531
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:42:46.029153554
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:42:46.034930937
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:42:46.037185342
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:42:46.038797052
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:42:46.043145782
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:42:46.046542807
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:42:46.053805949
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:42:46.057199044
+DEBUG (0): LQI Root is receiving packet from node 4 @1:42:46.062783729
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:42:46.064309599
+DEBUG (0): LQI Root is receiving packet from node 6 @1:42:46.067986945
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:46.076409748
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:51.015215153
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:42:51.018996971
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:42:51.021447910
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:42:51.022144146
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:51.028802604
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:42:51.031312964
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:42:51.032764201
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:51.036628426
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:51.040839828
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:42:51.042850202
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:42:51.044711763
+DEBUG (0): LQI Root is receiving packet from node 5 @1:42:51.050632139
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:51.056659326
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:42:51.067966022
+DEBUG (0): LQI Root is receiving packet from node 5 @1:42:51.072726737
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:42:51.077838401
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:42:51.087100432
+DEBUG (0): LQI Root is receiving packet from node 6 @1:42:51.091357609
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:42:56.007440424
+DEBUG (0): LQI Root is receiving packet from node 1 @1:42:56.011293667
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:42:56.014648242
+DEBUG (2): LQI fwd is forwarding packet from node 4 @1:42:56.018024297
+DEBUG (0): LQI Root is receiving packet from node 2 @1:42:56.020174231
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:42:56.028810537
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:56.031318399
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:42:56.037402846
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:42:56.040164671
+DEBUG (0): LQI Root is receiving packet from node 4 @1:42:56.045749355
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:56.060184085
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:56.062564442
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:42:56.066867396
+DEBUG (0): LQI Root is receiving packet from node 3 @1:42:56.069278270
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:42:56.071414488
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:42:56.081271609
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:42:56.089953809
+DEBUG (5): LQI fwd is forwarding packet from node 6 @1:42:56.089953809
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:42:56.089953809
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:42:56.089953809
+DEBUG (3): LQI fwd is forwarding packet from node 6 @1:42:56.089953809
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:42:56.093875295
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:42:56.095080732
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:42:56.098483422
+DEBUG (0): LQI Root is receiving packet from node 6 @1:42:56.106463722
+DEBUG (5): LQI receiving routing beacon from 1 with LQI 71 that advertises 307.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 52 and my cost to 673.
+DEBUG (4): LQI receiving routing beacon from 1 with LQI 99 that advertises 307.
+DEBUG (4):   -- Not a cycle.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 307.
+DEBUG (3): LQI receiving routing beacon from 1 with LQI 79 that advertises 307.
+DEBUG (3):   -- CYCLE.
+DEBUG (3): Set my count to 3, my link to 125 and my cost to 253.
+DEBUG (6): LQI receiving routing beacon from 3 with LQI 86 that advertises 378.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 465 and my cost to 673.
+DEBUG (5): LQI receiving routing beacon from 3 with LQI 95 that advertises 378.
+DEBUG (5):   -- CYCLE.
+DEBUG (5): Set my count to 4, my link to 52 and my cost to 673.
+DEBUG (4): LQI receiving routing beacon from 3 with LQI 106 that advertises 378.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 3 with LQI 110 that advertises 378.
+DEBUG (2):   -- CYCLE.
+DEBUG (2): Set my count to 255, my link to 32767 and my cost to 32767.
+DEBUG (6): LQI receiving routing beacon from 5 with LQI 108 that advertises 725.
+DEBUG (6):   -- CYCLE.
+DEBUG (6): Set my count to 4, my link to 465 and my cost to 673.
+DEBUG (4): LQI receiving routing beacon from 5 with LQI 110 that advertises 725.
+DEBUG (4):   -- CYCLE.
+DEBUG (4): Set my count to 2, my link to 465 and my cost to 307.
+DEBUG (2): LQI receiving routing beacon from 5 with LQI 97 that advertises 725.
+DEBUG (2):   -- Not a cycle.
+DEBUG (2): Set my count to 5, my link to 561 and my cost to 725.
+DEBUG (1): LQI receiving routing beacon from 5 with LQI 72 that advertises 725.
+DEBUG (1):   -- CYCLE.
+DEBUG (1): Set my count to 1, my link to 307 and my cost to 0.
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:43:1.019167038
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:43:1.021560433
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:43:1.029910824
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:43:1.032785124
+DEBUG (0): LQI Root is receiving packet from node 1 @1:43:1.038026910
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:43:1.039630616
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:43:1.040076893
+DEBUG (4): LQI fwd is forwarding packet from node 2 @1:43:1.042398105
+DEBUG (0): LQI Root is receiving packet from node 6 @1:43:1.043825216
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:43:1.048648508
+DEBUG (0): LQI Root is receiving packet from node 4 @1:43:1.052186983
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:43:1.056201565
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:43:1.060081048
+DEBUG (0): LQI Root is receiving packet from node 5 @1:43:1.061983069
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:43:1.067771433
+DEBUG (0): LQI Root is receiving packet from node 2 @1:43:1.067796634
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:43:1.073554480
+DEBUG (0): LQI Root is receiving packet from node 3 @1:43:1.082709700
+DEBUG (0): LQI Root is receiving packet from node 1 @1:43:6.013826612
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:43:6.021447910
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:43:6.024324479
+DEBUG (1): LQI fwd is forwarding packet from node 4 @1:43:6.026828567
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:43:6.035514541
+DEBUG (0): LQI Root is receiving packet from node 4 @1:43:6.038089488
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:43:6.070632412
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:43:6.073584998
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:43:6.088103624
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:43:6.090289500
+DEBUG (0): LQI Root is receiving packet from node 6 @1:43:6.098204883
+DEBUG (1): LQI fwd is forwarding packet from node 5 @1:43:6.105655011
+DEBUG (0): LQI Root is receiving packet from node 5 @1:43:6.114001520
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:43:6.121535435
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:43:6.136565255
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:43:6.141188641
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:43:6.141188641
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:43:6.141188641
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:43:6.141188641
+DEBUG (0): LQI Root is receiving packet from node 3 @1:43:6.141188641
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:43:6.141188641
+DEBUG (0): LQI Root is receiving packet from node 3 @1:43:6.144957540
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:43:6.153059910
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:43:6.155745441
+DEBUG (1): LQI fwd is forwarding packet from node 2 @1:43:11.007364130
+DEBUG (5): LQI fwd is forwarding packet from node 2 @1:43:11.007364130
+DEBUG (4): LQI fwd is forwarding packet from node 5 @1:43:11.011672795
+DEBUG (0): LQI Root is receiving packet from node 5 @1:43:11.011672795
+DEBUG (3): LQI fwd is forwarding packet from node 5 @1:43:11.011672795
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:43:11.011672795
+DEBUG (0): LQI Root is receiving packet from node 1 @1:43:11.013597731
+DEBUG (0): LQI Root is receiving packet from node 2 @1:43:11.017671804
+DEBUG (0): LQI Root is receiving packet from node 5 @1:43:11.020568618
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:43:11.026796388
+DEBUG (6): LQI fwd is forwarding packet from node 6 @1:43:11.032686247
+DEBUG (1): LQI fwd is forwarding packet from node 6 @1:43:11.032686247
+DEBUG (2): LQI fwd is forwarding packet from node 6 @1:43:11.032686247
+DEBUG (0): LQI Root is receiving packet from node 6 @1:43:11.039232229
+DEBUG (4): LQI fwd is forwarding packet from node 6 @1:43:11.041459999
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:43:11.049720391
+DEBUG (2): LQI fwd is forwarding packet from node 5 @1:43:11.054664210
+DEBUG (6): LQI fwd is forwarding packet from node 3 @1:43:11.058814576
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:43:11.058814576
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:43:11.058814576
+DEBUG (0): LQI Root is receiving packet from node 3 @1:43:11.058814576
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:43:11.058814576
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:43:11.058814576
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:43:11.063590549
+DEBUG (5): LQI fwd is forwarding packet from node 3 @1:43:11.063590549
+DEBUG (0): LQI Root is receiving packet from node 3 @1:43:11.067298413
+DEBUG (1): LQI fwd is forwarding packet from node 3 @1:43:11.069129457
+DEBUG (3): LQI fwd is forwarding packet from node 3 @1:43:11.069129457
+DEBUG (4): LQI fwd is forwarding packet from node 3 @1:43:11.070701103
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:43:11.078772956
+DEBUG (2): LQI fwd is forwarding packet from node 3 @1:43:11.086966878
diff --git a/apps/tests/TestMultihopLqi/meyer-heavy.txt b/apps/tests/TestMultihopLqi/meyer-heavy.txt
new file mode 100644
index 00000000..d50887fb
--- /dev/null
+++ b/apps/tests/TestMultihopLqi/meyer-heavy.txt
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diff --git a/apps/tests/TestMultihopLqi/meyer-short.txt b/apps/tests/TestMultihopLqi/meyer-short.txt
new file mode 100644
index 00000000..e8385d09
--- /dev/null
+++ b/apps/tests/TestMultihopLqi/meyer-short.txt
@@ -0,0 +1,1000 @@
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diff --git a/apps/tests/TestMultihopLqi/script.py b/apps/tests/TestMultihopLqi/script.py
new file mode 100644
index 00000000..aa72201c
--- /dev/null
+++ b/apps/tests/TestMultihopLqi/script.py
@@ -0,0 +1,58 @@
+from TOSSIM import *
+import sys
+import time
+import random
+
+t = Tossim([])
+r = t.radio()
+
+#t.addChannel("HASH", sys.stdout)
+#t.addChannel("Insert", sys.stdout)
+#t.addChannel("RadioCountToLedsC", sys.stdout)
+#t.addChannel("CpmModelC", sys.stdout)
+#t.addChannel("Gain", sys.stdout)
+#t.addChannel("AM", sys.stdout)
+t.addChannel("App", sys.stdout)
+t.addChannel("LQI", sys.stdout)
+#t.addChannel("LQIRoute", sys.stdout)
+t.addChannel("LQIDeliver", sys.stdout)
+#t.addChannel("LQIRoute", sys.stdout)
+#t.addChannel("PointerBug", sys.stdout)
+
+start = time.time();
+noise = open("meyer-short.txt", "r")
+lines = noise.readlines()
+for line in lines:
+    str = line.strip()
+    if (str != ""):
+        val = int(str)
+        for i in range(0, 7):
+            t.getNode(i).addNoiseTraceReading(val)
+#        print "adding ", int(str)
+end = time.time();
+duration = end - start;
+print "time: ", duration;
+
+f = open("topo.txt", "r")
+
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain" and int(s[1]) < 8 and int(s[2]) < 8):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+      
+
+start = time.time();
+for i in range(0, 7):
+    t.getNode(i).createNoiseModel();
+    t.getNode(i).bootAtTime(int(random.random() * 10000000 + 20000000));
+
+duration = end - start;
+print "time: ", duration;
+
+#for i in range(0, 196607):
+#    print m1.generateNoise(i)
+
+while ((t.time() / t.ticksPerSecond()) < 3000):
+    t.runNextEvent();
diff --git a/apps/tests/TestMultihopLqi/topo.txt b/apps/tests/TestMultihopLqi/topo.txt
new file mode 100644
index 00000000..0a236481
--- /dev/null
+++ b/apps/tests/TestMultihopLqi/topo.txt
@@ -0,0 +1,50625 @@
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+noise	134	-104.70	4.00
+noise	135	-104.87	4.00
+noise	136	-105.16	4.00
+noise	137	-100.10	4.00
+noise	138	-107.09	4.00
+noise	139	-106.97	4.00
+noise	140	-105.97	4.00
+noise	141	-110.76	4.00
+noise	142	-104.63	4.00
+noise	143	-103.05	4.00
+noise	144	-104.72	4.00
+noise	145	-102.08	4.00
+noise	146	-104.29	4.00
+noise	147	-107.63	4.00
+noise	148	-106.26	4.00
+noise	149	-107.66	4.00
+noise	150	-104.62	4.00
+noise	151	-104.32	4.00
+noise	152	-105.95	4.00
+noise	153	-107.90	4.00
+noise	154	-104.05	4.00
+noise	155	-105.61	4.00
+noise	156	-106.50	4.00
+noise	157	-107.23	4.00
+noise	158	-104.61	4.00
+noise	159	-102.21	4.00
+noise	160	-104.39	4.00
+noise	161	-102.77	4.00
+noise	162	-104.82	4.00
+noise	163	-103.61	4.00
+noise	164	-105.32	4.00
+noise	165	-105.68	4.00
+noise	166	-107.07	4.00
+noise	167	-103.66	4.00
+noise	168	-103.98	4.00
+noise	169	-104.68	4.00
+noise	170	-106.21	4.00
+noise	171	-104.07	4.00
+noise	172	-104.75	4.00
+noise	173	-104.39	4.00
+noise	174	-105.78	4.00
+noise	175	-106.17	4.00
+noise	176	-104.66	4.00
+noise	177	-104.68	4.00
+noise	178	-107.77	4.00
+noise	179	-106.23	4.00
+noise	180	-101.38	4.00
+noise	181	-105.81	4.00
+noise	182	-106.29	4.00
+noise	183	-106.26	4.00
+noise	184	-102.70	4.00
+noise	185	-100.71	4.00
+noise	186	-105.14	4.00
+noise	187	-105.16	4.00
+noise	188	-103.78	4.00
+noise	189	-105.91	4.00
+noise	190	-104.62	4.00
+noise	191	-104.01	4.00
+noise	192	-104.84	4.00
+noise	193	-105.51	4.00
+noise	194	-105.18	4.00
+noise	195	-106.34	4.00
+noise	196	-106.84	4.00
+noise	197	-106.69	4.00
+noise	198	-105.25	4.00
+noise	199	-103.68	4.00
+noise	200	-104.03	4.00
+noise	201	-104.74	4.00
+noise	202	-104.74	4.00
+noise	203	-102.63	4.00
+noise	204	-108.15	4.00
+noise	205	-107.32	4.00
+noise	206	-103.93	4.00
+noise	207	-103.67	4.00
+noise	208	-104.88	4.00
+noise	209	-103.33	4.00
+noise	210	-103.77	4.00
+noise	211	-107.35	4.00
+noise	212	-104.40	4.00
+noise	213	-102.55	4.00
+noise	214	-99.68	4.00
+noise	215	-102.74	4.00
+noise	216	-102.16	4.00
+noise	217	-102.66	4.00
+noise	218	-107.37	4.00
+noise	219	-105.53	4.00
+noise	220	-109.69	4.00
+noise	221	-104.91	4.00
+noise	222	-107.83	4.00
+noise	223	-103.71	4.00
+noise	224	-102.76	4.00
diff --git a/apps/tests/TestNetwork/.cvsignore b/apps/tests/TestNetwork/.cvsignore
new file mode 100644
index 00000000..c2d8980c
--- /dev/null
+++ b/apps/tests/TestNetwork/.cvsignore
@@ -0,0 +1,8 @@
+build .*.swp
+collection_debug_msg.c
+collection_debug_msg.h
+set_rate_msg.c
+set_rate_msg.h
+test_network_msg.c
+test_network_msg.h
+build
diff --git a/apps/tests/TestNetwork/Driver.c b/apps/tests/TestNetwork/Driver.c
new file mode 100644
index 00000000..f8b4f430
--- /dev/null
+++ b/apps/tests/TestNetwork/Driver.c
@@ -0,0 +1,37 @@
+#include <stdio.h>
+#include <tossim.h>
+#include <radio.h>
+#include <math.h>
+
+int main() {
+ Tossim* t = new Tossim(NULL);
+ t-> init();
+
+ for (int i = 0; i < 10; i++) {
+   Mote* m = t->getNode(i * 5);
+   m->bootAtTime(rand() % t->ticksPerSecond());
+ }
+
+
+ t->addChannel("TestNetworkC", stdout);
+ t->addChannel("Forwarder", stdout);
+// t->addChannel("PointerBug", stdout);
+// t->addChannel("QueueC", stdout);
+// t->addChannel("PoolP", stdout);
+ //t->addChannel("LITest", stdout);
+ //t->addChannel("AM", stdout);
+// t->addChannel("Route", stdout);
+
+ Radio* r = t->radio();
+ for (int i = 0; i < 10; i++) {
+    r->setNoise(i * 5, -105.0, 1.0);
+   for (int j = 0; j < 10; j++) {
+      r->add(i * 5, j * 5, -96.0 - (double)abs(i - j));
+      r->add(j * 5, i * 5, -96.0 - (double)abs(i - j));
+   }
+ }
+
+ while(t->time() < 600 * t->ticksPerSecond()) {
+   t->runNextEvent();
+ }
+}
diff --git a/apps/tests/TestNetwork/Makefile b/apps/tests/TestNetwork/Makefile
new file mode 100644
index 00000000..8c2dc554
--- /dev/null
+++ b/apps/tests/TestNetwork/Makefile
@@ -0,0 +1,64 @@
+COMPONENT=TestNetworkAppC
+
+CFLAGS += -I$(TOSDIR)/lib/net \
+          -I$(TOSDIR)/lib/net/drip \
+          -I$(TOSDIR)/lib/net/4bitle \
+          -I$(TOSDIR)/lib/net/ctp #-DNO_DEBUG
+
+TFLAGS += -I$(TOSDIR)/../apps/tests/TestDissemination \
+          -I$(TOSDIR)/../support/sdk/c \
+          -I$(TOSDIR)/types \
+          -I.
+
+LIBMOTE = $(TOSDIR)/../support/sdk/c/libmote.a
+#BUILD_EXTRA_DEPS += tn-injector #tn-listener
+LISTEN_OBJS = collection_msg.o test_network_msg.o tn-listener.o $(LIBMOTE)
+INJECT_OBJS = set_rate_msg.o tn-injector.o collection_debug_msg.o $(LIBMOTE)
+
+# arguments: output filename stem, input filename, struct name
+define mig_templ
+MIGFILES += $(1).c $(1).h $(1).java $(1).o
+$(1).c:
+	mig -o $(1).h c -target=$$(PLATFORM) $$(CFLAGS) $$(TFLAGS) $(2) $(3)
+$(1).java:
+	mig -o $(1).java java -target=$$(PLATFORM) $$(CFLAGS) $$(TFLAGS) $(2) $(3)
+endef
+
+$(eval $(call mig_templ,test_network_msg,TestNetwork.h,TestNetworkMsg))
+$(eval $(call mig_templ,set_rate_msg,$(TOSDIR)/lib/net/DisseminationEngine.h,dissemination_message))
+$(eval $(call mig_templ,collection_debug_msg,$(TOSDIR)/lib/net/collection/CollectionDebugMsg.h,CollectionDebugMsg))
+
+%.o: %.c
+	gcc -v  $(TFLAGS) $(CFLAGS) -c -o $@ $<
+
+tn-listener: $(LISTEN_OBJS)
+	gcc -v $(TFLAGS) $(CFLAGS) -o $@ $(LISTEN_OBJS)
+
+tn-injector: $(INJECT_OBJS)
+	gcc -v $(TFLAGS) $(CFLAGS) -o $@ $(INJECT_OBJS)
+
+#tn-listener.o: tn-listener.c
+#	gcc $(TFLAGS) $(CFLAGS) -c -o $@ $<
+
+tn-injector.o: tn-injector.c test_network_msg.c
+	gcc $(TFLAGS) $(CFLAGS) -c -o $@ $<
+
+#test_network_msg.c:
+#	mig -o test_network_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) TestNetwork.h TestNetworkMsg 
+
+#set_rate_msg.c:
+#	mig -o set_rate_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) $(TOSDIR)/lib/net/DisseminationEngine.h dissemination_message
+
+#set_rate_msg.o: set_rate_msg.c
+#	gcc $(CFLAGS) $(TFLAGS) -c -o $@ $<
+
+#test_network_msg.o: test_network_msg.c
+#	gcc $(CFLAGS) $(TFLAGS) -c -o $@ $<
+
+#collection_msg.c:
+#	mig -o collection_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) $(TOSDIR)/lib/net/collection/ForwardingEngine.h collection_header
+
+include $(MAKERULES)
+
+migclean:
+	rm -rf $(MIGFILES)
diff --git a/apps/tests/TestNetwork/Makefile.Driver b/apps/tests/TestNetwork/Makefile.Driver
new file mode 100644
index 00000000..e4ac9d88
--- /dev/null
+++ b/apps/tests/TestNetwork/Makefile.Driver
@@ -0,0 +1,7 @@
+
+all:
+	make micaz sim
+	g++ -g -c -o Driver.o Driver.c -I../../../tos/lib/tossim/ -I../../../tos/lib/net -I../../../tos/lib/net/collection
+	g++ -o Driver Driver.o build/micaz/sim.o build/micaz/tossim.o
+
+
diff --git a/apps/tests/TestNetwork/README.txt b/apps/tests/TestNetwork/README.txt
new file mode 100644
index 00000000..b533acdc
--- /dev/null
+++ b/apps/tests/TestNetwork/README.txt
@@ -0,0 +1,37 @@
+README for TestNetwork
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+TestNetworkC exercises the basic networking layers, collection and
+dissemination. The application samples DemoSensorC at a basic rate
+and sends packets up a collection tree. The rate is configurable
+through dissemination.
+
+See TEP118: Dissemination, TEP 119: Collection, and TEP 123: The
+Collection Tree Protocol for details.
+
+There are scripts on net2 website to parse the debug messages sent by
+the nodes.
+
+To test, start with two motes with no program that transmits
+packets. Example., erase the mote or install Blink. Program a mote with
+node id 0. The mote will toggle led1 (green on TelosB) approximately
+every 8s. Then program the second mote with id 1. Once programming is
+complete, the mote with id 0 will toggle led1 twice every 8s. Each
+toggle corresponds to the reception of collection message (once from
+itself, and once from the mote with id 1).
+
+Errors indications:
+
+Motes 0 and 1 will set led0 (red on TelosB) if there are errors while
+sending the packet.
+
+Mote 0 will set led2 (blue on TelosB) if the gap in sequence number on
+consecutive packet reception from node 1 is greater than 1. This is
+expected to be a rare event while doing experiment on a desk.
+
+
+Known bugs/limitations:
+
+None.
diff --git a/apps/tests/TestNetwork/TestNetwork.h b/apps/tests/TestNetwork/TestNetwork.h
new file mode 100644
index 00000000..0f789ec2
--- /dev/null
+++ b/apps/tests/TestNetwork/TestNetwork.h
@@ -0,0 +1,18 @@
+#ifndef TEST_NETWORK_H
+#define TEST_NETWORK_H
+
+#include <AM.h>
+#include "TestNetworkC.h"
+
+typedef nx_struct TestNetworkMsg {
+  nx_am_addr_t source;
+  nx_uint16_t seqno;
+  nx_am_addr_t parent;
+  nx_uint16_t metric;
+  nx_uint16_t data;
+  nx_uint8_t hopcount;
+  nx_uint16_t sendCount;
+  nx_uint16_t sendSuccessCount;
+} TestNetworkMsg;
+
+#endif
diff --git a/apps/tests/TestNetwork/TestNetworkAppC.nc b/apps/tests/TestNetwork/TestNetworkAppC.nc
new file mode 100644
index 00000000..f979596b
--- /dev/null
+++ b/apps/tests/TestNetwork/TestNetworkAppC.nc
@@ -0,0 +1,67 @@
+/**
+ * TestNetworkC exercises the basic networking layers, collection and
+ * dissemination. The application samples DemoSensorC at a basic rate
+ * and sends packets up a collection tree. The rate is configurable
+ * through dissemination.
+ *
+ * See TEP118: Dissemination, TEP 119: Collection, and TEP 123: The
+ * Collection Tree Protocol for details.
+ * 
+ * @author Philip Levis
+ * @version $Revision: 1.7 $ $Date: 2009-09-16 00:51:50 $
+ */
+#include "TestNetwork.h"
+#include "Ctp.h"
+
+configuration TestNetworkAppC {}
+implementation {
+  components TestNetworkC, MainC, LedsC, ActiveMessageC;
+  components DisseminationC;
+  components new DisseminatorC(uint32_t, SAMPLE_RATE_KEY) as Object32C;
+  components CollectionC as Collector;
+  components new CollectionSenderC(CL_TEST);
+  components new TimerMilliC();
+  components new DemoSensorC();
+  components new SerialAMSenderC(CL_TEST);
+  components SerialActiveMessageC;
+#ifndef NO_DEBUG
+  components new SerialAMSenderC(AM_COLLECTION_DEBUG) as UARTSender;
+  components UARTDebugSenderP as DebugSender;
+#endif
+  components RandomC;
+  components new QueueC(message_t*, 12);
+  components new PoolC(message_t, 12);
+
+  TestNetworkC.Boot -> MainC;
+  TestNetworkC.RadioControl -> ActiveMessageC;
+  TestNetworkC.SerialControl -> SerialActiveMessageC;
+  TestNetworkC.RoutingControl -> Collector;
+  TestNetworkC.DisseminationControl -> DisseminationC;
+  TestNetworkC.Leds -> LedsC;
+  TestNetworkC.Timer -> TimerMilliC;
+  TestNetworkC.DisseminationPeriod -> Object32C;
+  TestNetworkC.Send -> CollectionSenderC;
+  TestNetworkC.ReadSensor -> DemoSensorC;
+  TestNetworkC.RootControl -> Collector;
+  TestNetworkC.Receive -> Collector.Receive[CL_TEST];
+  TestNetworkC.UARTSend -> SerialAMSenderC.AMSend;
+  TestNetworkC.CollectionPacket -> Collector;
+  TestNetworkC.CtpInfo -> Collector;
+  TestNetworkC.CtpCongestion -> Collector;
+  TestNetworkC.Random -> RandomC;
+  TestNetworkC.Pool -> PoolC;
+  TestNetworkC.Queue -> QueueC;
+  TestNetworkC.RadioPacket -> ActiveMessageC;
+  
+#ifndef NO_DEBUG
+  components new PoolC(message_t, 10) as DebugMessagePool;
+  components new QueueC(message_t*, 10) as DebugSendQueue;
+  DebugSender.Boot -> MainC;
+  DebugSender.UARTSend -> UARTSender;
+  DebugSender.MessagePool -> DebugMessagePool;
+  DebugSender.SendQueue -> DebugSendQueue;
+  Collector.CollectionDebug -> DebugSender;
+  TestNetworkC.CollectionDebug -> DebugSender;
+#endif
+  TestNetworkC.AMPacket -> ActiveMessageC;
+}
diff --git a/apps/tests/TestNetwork/TestNetworkC.h b/apps/tests/TestNetwork/TestNetworkC.h
new file mode 100644
index 00000000..35b01f1e
--- /dev/null
+++ b/apps/tests/TestNetwork/TestNetworkC.h
@@ -0,0 +1,12 @@
+#ifndef TEST_NETWORK_C_H
+#define TEST_NETWORK_C_H
+
+
+enum {
+ AM_TESTNETWORKMSG = 0x05,
+ SAMPLE_RATE_KEY = 0x1,
+ CL_TEST = 0xee,
+ TEST_NETWORK_QUEUE_SIZE = 8,
+};
+
+#endif
diff --git a/apps/tests/TestNetwork/TestNetworkC.nc b/apps/tests/TestNetwork/TestNetworkC.nc
new file mode 100644
index 00000000..3f2cc9c7
--- /dev/null
+++ b/apps/tests/TestNetwork/TestNetworkC.nc
@@ -0,0 +1,222 @@
+/**
+ * TestNetworkC exercises the basic networking layers, collection and
+ * dissemination. The application samples DemoSensorC at a basic rate
+ * and sends packets up a collection tree. The rate is configurable
+ * through dissemination. The default send rate is every 10s.
+ *
+ * See TEP118: Dissemination and TEP 119: Collection for details.
+ * 
+ * @author Philip Levis
+ * @version $Revision: 1.11 $ $Date: 2010-01-14 21:53:58 $
+ */
+
+#include <Timer.h>
+#include "TestNetwork.h"
+#include "CtpDebugMsg.h"
+
+module TestNetworkC {
+  uses interface Boot;
+  uses interface SplitControl as RadioControl;
+  uses interface SplitControl as SerialControl;
+  uses interface StdControl as RoutingControl;
+  uses interface StdControl as DisseminationControl;
+  uses interface DisseminationValue<uint32_t> as DisseminationPeriod;
+  uses interface Send;
+  uses interface Leds;
+  uses interface Read<uint16_t> as ReadSensor;
+  uses interface Timer<TMilli>;
+  uses interface RootControl;
+  uses interface Receive;
+  uses interface AMSend as UARTSend;
+  uses interface CollectionPacket;
+  uses interface CtpInfo;
+  uses interface CtpCongestion;
+  uses interface Random;
+  uses interface Queue<message_t*>;
+  uses interface Pool<message_t>;
+  uses interface CollectionDebug;
+  uses interface AMPacket;
+  uses interface Packet as RadioPacket;
+}
+implementation {
+  task void uartEchoTask();
+  message_t packet;
+  message_t uartpacket;
+  message_t* recvPtr = &uartpacket;
+  uint8_t msglen;
+  bool sendBusy = FALSE;
+  bool uartbusy = FALSE;
+  bool firstTimer = TRUE;
+  uint16_t seqno;
+  enum {
+    SEND_INTERVAL = 8192
+  };
+
+  event void ReadSensor.readDone(error_t err, uint16_t val) { }  
+
+  event void Boot.booted() {
+    call SerialControl.start();
+  }
+  event void SerialControl.startDone(error_t err) {
+    call RadioControl.start();
+  }
+  event void RadioControl.startDone(error_t err) {
+    if (err != SUCCESS) {
+      call RadioControl.start();
+    }
+    else {
+      call DisseminationControl.start();
+      call RoutingControl.start();
+      if (TOS_NODE_ID % 500 == 0) {
+	call RootControl.setRoot();
+      }
+      seqno = 0;
+        call Timer.startOneShot(call Random.rand16() & 0x1ff);
+    }
+  }
+
+  event void RadioControl.stopDone(error_t err) {}
+  event void SerialControl.stopDone(error_t err) {}	
+
+  void failedSend() {
+    dbg("App", "%s: Send failed.\n", __FUNCTION__);
+    call CollectionDebug.logEvent(NET_C_DBG_1);
+  }
+
+   
+  void sendMessage() {
+    TestNetworkMsg* msg = (TestNetworkMsg*)call Send.getPayload(&packet, sizeof(TestNetworkMsg));
+    uint16_t metric;
+    am_addr_t parent = 0;
+
+    call CtpInfo.getParent(&parent);
+    call CtpInfo.getEtx(&metric);
+
+    msg->source = TOS_NODE_ID;
+    msg->seqno = seqno;
+    msg->data = 0xCAFE;
+    msg->parent = parent;
+    msg->hopcount = 0;
+    msg->metric = metric;
+
+    if (call Send.send(&packet, sizeof(TestNetworkMsg)) != SUCCESS) {
+      failedSend();
+      call Leds.led0On();
+      dbg("TestNetworkC", "%s: Transmission failed.\n", __FUNCTION__);
+    }
+    else {
+      sendBusy = TRUE;
+      seqno++; 
+      dbg("TestNetworkC", "%s: Transmission succeeded.\n", __FUNCTION__);
+    }
+  }
+
+ 
+  event void Timer.fired() {
+    uint32_t nextInt;
+    dbg("TestNetworkC", "TestNetworkC: Timer fired.\n");
+    nextInt = call Random.rand32() % SEND_INTERVAL;
+    nextInt += SEND_INTERVAL >> 1;
+    call Timer.startOneShot(nextInt);
+    if (!sendBusy)
+	sendMessage();
+  }
+
+  event void Send.sendDone(message_t* m, error_t err) {
+    if (err != SUCCESS) {
+      call Leds.led0On();
+    }
+    sendBusy = FALSE;
+    dbg("TestNetworkC", "Send completed.\n");
+  }
+  
+  event void DisseminationPeriod.changed() {
+    const uint32_t* newVal = call DisseminationPeriod.get();
+    call Timer.stop();
+    call Timer.startPeriodic(*newVal);
+  }
+
+
+  uint8_t prevSeq = 0;
+  uint8_t firstMsg = 0;
+
+  event message_t* 
+  Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    dbg("TestNetworkC", "Received packet at %s from node %hhu.\n", sim_time_string(), call CollectionPacket.getOrigin(msg));
+    call Leds.led1Toggle();
+
+    if (call CollectionPacket.getOrigin(msg) == 1) {
+      if (firstMsg == 1) {
+	if (call CollectionPacket.getSequenceNumber(msg) - prevSeq > 1) {
+	  call Leds.led2On();
+	}
+      } else {
+	firstMsg = 1;
+      }
+      prevSeq = call CollectionPacket.getSequenceNumber(msg);
+    }
+
+    if (!call Pool.empty() && call Queue.size() < call Queue.maxSize()) {
+      message_t* tmp = call Pool.get();
+      call Queue.enqueue(msg);
+      if (!uartbusy) {
+        post uartEchoTask();
+      }
+      return tmp;
+    }
+    return msg;
+ }
+
+ task void uartEchoTask() {
+    dbg("Traffic", "Sending packet to UART.\n");
+   if (call Queue.empty()) {
+     return;
+   }
+   else if (!uartbusy) {
+     message_t* msg = call Queue.dequeue();
+     dbg("Traffic", "Sending packet to UART.\n");
+     if (call UARTSend.send(0xffff, msg, call RadioPacket.payloadLength(msg)) == SUCCESS) {
+       uartbusy = TRUE;
+     }
+     else {
+      call CollectionDebug.logEventMsg(NET_C_DBG_2,
+				       call CollectionPacket.getSequenceNumber(msg),
+				       call CollectionPacket.getOrigin(msg),
+				       call AMPacket.destination(msg));
+     }
+   }
+ }
+
+  event void UARTSend.sendDone(message_t *msg, error_t error) {
+    dbg("Traffic", "UART send done.\n");
+    uartbusy = FALSE;
+    call Pool.put(msg);
+    if (!call Queue.empty()) {
+      post uartEchoTask();
+    } 
+    else {
+      //        call CtpCongestion.setClientCongested(FALSE);
+    }
+  }
+
+  /* Default implementations for CollectionDebug calls.
+   * These allow CollectionDebug not to be wired to anything if debugging
+   * is not desired. */
+
+    default command error_t CollectionDebug.logEvent(uint8_t type) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) {
+        return SUCCESS;
+    }
+ 
+}
diff --git a/apps/tests/TestNetwork/meyer-short.txt b/apps/tests/TestNetwork/meyer-short.txt
new file mode 100644
index 00000000..556ac0f8
--- /dev/null
+++ b/apps/tests/TestNetwork/meyer-short.txt
@@ -0,0 +1,1000 @@
+-41
+-41
+-41
+-41
+-41
+-41
+-41
+-91
+-41
+-41
+-41
+-41
+-41
+-48
+-41
+-41
+-41
+-83
+-98
+-80
+-80
+-79
+-79
+-79
+-79
+-98
+-79
+-80
+-79
+-80
+-80
+-80
+-83
+-83
+-83
+-83
+-82
+-82
+-41
+-82
+-82
+-82
+-82
+-82
+-82
+-41
+-94
+-93
+-93
+-87
+-89
+-90
+-45
+-92
+-85
+-98
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diff --git a/apps/tests/TestNetwork/sparse-grid.txt b/apps/tests/TestNetwork/sparse-grid.txt
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+noise	149	-106.74	4.00
+noise	150	-104.96	4.00
+noise	151	-102.78	4.00
+noise	152	-106.21	4.00
+noise	153	-109.02	4.00
+noise	154	-104.99	4.00
+noise	155	-103.82	4.00
+noise	156	-104.94	4.00
+noise	157	-104.32	4.00
+noise	158	-103.15	4.00
+noise	159	-103.97	4.00
+noise	160	-107.18	4.00
+noise	161	-104.74	4.00
+noise	162	-104.62	4.00
+noise	163	-105.56	4.00
+noise	164	-102.63	4.00
+noise	165	-105.82	4.00
+noise	166	-103.21	4.00
+noise	167	-103.17	4.00
+noise	168	-102.17	4.00
+noise	169	-104.06	4.00
+noise	170	-107.67	4.00
+noise	171	-104.67	4.00
+noise	172	-108.32	4.00
+noise	173	-107.65	4.00
+noise	174	-106.16	4.00
+noise	175	-105.63	4.00
+noise	176	-108.63	4.00
+noise	177	-103.02	4.00
+noise	178	-105.96	4.00
+noise	179	-107.23	4.00
+noise	180	-104.95	4.00
+noise	181	-103.90	4.00
+noise	182	-103.83	4.00
+noise	183	-109.16	4.00
+noise	184	-103.90	4.00
+noise	185	-107.83	4.00
+noise	186	-106.99	4.00
+noise	187	-106.47	4.00
+noise	188	-104.39	4.00
+noise	189	-102.88	4.00
+noise	190	-107.63	4.00
+noise	191	-106.83	4.00
+noise	192	-103.00	4.00
+noise	193	-103.50	4.00
+noise	194	-105.60	4.00
+noise	195	-105.12	4.00
+noise	196	-106.37	4.00
+noise	197	-107.20	4.00
+noise	198	-106.28	4.00
+noise	199	-104.01	4.00
+noise	200	-105.85	4.00
+noise	201	-105.60	4.00
+noise	202	-103.91	4.00
+noise	203	-105.07	4.00
+noise	204	-105.75	4.00
+noise	205	-104.77	4.00
+noise	206	-102.30	4.00
+noise	207	-107.39	4.00
+noise	208	-105.65	4.00
+noise	209	-102.82	4.00
+noise	210	-109.21	4.00
+noise	211	-105.20	4.00
+noise	212	-103.75	4.00
+noise	213	-106.22	4.00
+noise	214	-104.94	4.00
+noise	215	-108.01	4.00
+noise	216	-105.58	4.00
+noise	217	-105.94	4.00
+noise	218	-102.37	4.00
+noise	219	-107.01	4.00
+noise	220	-102.30	4.00
+noise	221	-104.20	4.00
+noise	222	-105.14	4.00
+noise	223	-103.82	4.00
+noise	224	-105.47	4.00
diff --git a/apps/tests/TestNetwork/special-topo.txt b/apps/tests/TestNetwork/special-topo.txt
new file mode 100644
index 00000000..7023a4a9
--- /dev/null
+++ b/apps/tests/TestNetwork/special-topo.txt
@@ -0,0 +1,42 @@
+noise 0 -105 5
+noise 1 -105 5
+noise 2 -105 5
+noise 3 -105 5
+noise 4 -105 5
+noise 5 -105 5
+
+gain 0 1 -80
+gain 1 0 -90
+gain 0 2 -80
+gain 2 0 -83
+gain 2 3 -70
+gain 3 2 -80
+gain 1 3 -90
+gain 3 1 -92
+gain 4 3 -88
+gain 3 4 -85
+gain 5 3 -60
+gain 3 5 -76
+
+gain 0 3 -110
+gain 3 0 -110
+gain 0 4 -110
+gain 4 0 -110
+gain 0 5 -110
+gain 5 0 -110
+
+gain 5 1 -110
+gain 1 5 -110
+gain 4 1 -110
+gain 1 4 -110
+gain 2 1 -90
+gain 1 2 -90
+
+gain 5 2 -110
+gain 2 5 -110
+gain 4 2 -110
+gain 2 4 -110
+
+gain 5 4 -90
+gain 4 5 -90
+
diff --git a/apps/tests/TestNetwork/test.py b/apps/tests/TestNetwork/test.py
new file mode 100644
index 00000000..616a8630
--- /dev/null
+++ b/apps/tests/TestNetwork/test.py
@@ -0,0 +1,56 @@
+from TOSSIM import *
+from tinyos.tossim.TossimApp import *
+from random import *
+import sys
+
+#n = NescApp("TestNetwork", "app.xml")
+#t = Tossim(n.variables.variables())
+t = Tossim([])
+r = t.radio()
+
+f = open("sparse-grid.txt", "r")
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if s[0] == "gain":
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+
+noise = open("meyer-short.txt", "r")
+lines = noise.readlines()
+for line in lines:
+  str = line.strip()
+  if (str != ""):
+    val = int(str)
+    for i in range(0, 10):
+      m = t.getNode(i);
+      m.addNoiseTraceReading(val)
+
+
+
+for i in range(0, 10):
+  m = t.getNode(i);
+  m.createNoiseModel();
+  time = randint(t.ticksPerSecond(), 10 * t.ticksPerSecond())
+  m.bootAtTime(time)
+  print "Booting ", i, " at time ", time
+
+print "Starting simulation."
+
+#t.addChannel("AM", sys.stdout)
+#t.addChannel("TreeRouting", sys.stdout)
+#t.addChannel("TestNetworkC", sys.stdout)
+#t.addChannel("Route", sys.stdout)
+#t.addChannel("PointerBug", sys.stdout)
+#t.addChannel("QueueC", sys.stdout)
+#t.addChannel("Gain", sys.stdout)
+t.addChannel("Forwarder", sys.stdout)
+t.addChannel("TestNetworkC", sys.stdout)
+#t.addChannel("App", sys.stdout)
+#t.addChannel("Traffic", sys.stdout)
+#t.addChannel("Acks", sys.stdout)
+
+while (t.time() < 1000 * t.ticksPerSecond()):
+  t.runNextEvent()
+
+print "Completed simulation."
diff --git a/apps/tests/TestNetwork/tn-injector.c b/apps/tests/TestNetwork/tn-injector.c
new file mode 100644
index 00000000..d90d8698
--- /dev/null
+++ b/apps/tests/TestNetwork/tn-injector.c
@@ -0,0 +1,48 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+
+#include "sfsource.h"
+#include "serialpacket.h"
+#include "test_network_msg.h"
+#include "set_rate_msg.h"
+#include "TestNetworkC.h"
+
+int main(int argc, char **argv)
+{
+  int fd,i;
+
+  if (argc != 5) {
+    fprintf(stderr, "Usage: %s <host> <port> <seqno> <rate> - change sample rate (ms/sample)\n", argv[0]);
+    exit(2);
+  }
+  
+  fd = open_sf_source(argv[1], atoi(argv[2]));
+
+  if (fd < 0) {
+    fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n",
+	    argv[1], argv[2]);
+    exit(1);
+  }
+  uint8_t len = DISSEMINATION_MESSAGE_SIZE + SPACKET_SIZE + sizeof(uint16_t);
+  void* storage = malloc(len);
+  tmsg_t* serialMsg = new_tmsg(storage, len);
+  void* payload = storage + (spacket_data_offsetbits(0) / 8);
+  tmsg_t* dataMsg = new_tmsg(payload, DISSEMINATION_MESSAGE_SIZE + sizeof(uint16_t));
+  void* data = payload + (dissemination_message_data_offsetbits(0) / 8);
+  
+  spacket_header_type_set(serialMsg, DISSEMINATION_MESSAGE_AM_TYPE);
+  spacket_header_length_set(serialMsg, DISSEMINATION_MESSAGE_SIZE + sizeof(uint16_t));
+  dissemination_message_key_set(dataMsg, SAMPLE_RATE_KEY);
+  dissemination_message_seqno_set(dataMsg, atoi(argv[3]));
+
+  uint16_t* rate = (uint16_t*)data;
+  *rate = (uint16_t)atoi(argv[4]);
+
+  printf("Writing packet:\n  ");
+  for (i = 0; i < len; i++) {
+    printf("%0.2x ", ((uint8_t*)storage)[i]);
+  }
+  printf("\n");
+  write_sf_packet(fd,storage,len);
+}
diff --git a/apps/tests/TestNetwork/tn-listener.c b/apps/tests/TestNetwork/tn-listener.c
new file mode 100644
index 00000000..2b5dc47a
--- /dev/null
+++ b/apps/tests/TestNetwork/tn-listener.c
@@ -0,0 +1,52 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+
+#include "sfsource.h"
+#include "serialpacket.h"
+#include "test_network_msg.h"
+#include "collection_msg.h"
+#include "set_rate_msg.h"
+#include "TestNetworkC.h"
+
+int main(int argc, char **argv)
+{
+  int fd,i;
+
+  if (argc != 3) {
+    fprintf(stderr, "Usage: %s <host> <port> - print received packets\n", argv[0]);
+    exit(2);
+  }
+  
+  fd = open_sf_source(argv[1], atoi(argv[2]));
+
+  if (fd < 0) {
+    fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n",
+	    argv[1], argv[2]);
+    exit(1);
+  }
+
+  for (;;) {
+    int len, i;
+    const unsigned char *packet = read_sf_packet(fd, &len);
+    char* myPacket = (char*)malloc(len);
+    memcpy(myPacket, packet, len);
+    free((void*)packet);
+    
+    if (!packet)
+      exit(0);
+    else {
+      tmsg_t* serialMsg = new_tmsg(myPacket, len);
+      void* payload = (void*)myPacket + (spacket_data_offsetbits(0) / 8);
+      tmsg_t* dataMsg = new_tmsg(payload, len - SPACKET_SIZE);
+      void* data = payload + (dissemination_message_data_offsetbits(0) / 8);
+      
+      
+      for (i = 0; i < len; i++)
+	printf("%02x ", packet[i]);
+      putchar('\n');
+      fflush(stdout);
+      free((void *)myPacket);
+    }
+  }
+}
diff --git a/apps/tests/TestNetwork/topo.txt b/apps/tests/TestNetwork/topo.txt
new file mode 100644
index 00000000..7a223f69
--- /dev/null
+++ b/apps/tests/TestNetwork/topo.txt
@@ -0,0 +1,50625 @@
+gain	0	1	-70.06
+gain	1	0	-71.36
+gain	0	2	-82.89
+gain	2	0	-84.00
+gain	0	3	-83.00
+gain	3	0	-78.45
+gain	0	4	-96.02
+gain	4	0	-92.74
+gain	0	5	-97.77
+gain	5	0	-94.42
+gain	0	6	-98.31
+gain	6	0	-97.76
+gain	0	7	-100.26
+gain	7	0	-98.81
+gain	0	8	-102.08
+gain	8	0	-99.28
+gain	0	9	-109.70
+gain	9	0	-109.09
+gain	0	10	-108.84
+gain	10	0	-106.68
+gain	0	11	-96.82
+gain	11	0	-94.11
+gain	0	12	-110.53
+gain	12	0	-104.88
+gain	0	13	-109.67
+gain	13	0	-107.03
+gain	0	14	-107.54
+gain	14	0	-104.38
+gain	0	15	-76.93
+gain	15	0	-76.50
+gain	0	16	-73.76
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+gain	160	0	-103.21
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+gain	161	0	-114.21
+gain	0	162	-116.18
+gain	162	0	-113.86
+gain	0	163	-110.10
+gain	163	0	-105.20
+gain	0	164	-116.69
+gain	164	0	-119.02
+gain	0	165	-108.95
+gain	165	0	-108.63
+gain	0	166	-114.06
+gain	166	0	-115.40
+gain	0	167	-111.85
+gain	167	0	-112.02
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+noise	152	-103.47	4.00
+noise	153	-104.38	4.00
+noise	154	-104.80	4.00
+noise	155	-108.24	4.00
+noise	156	-106.12	4.00
+noise	157	-104.14	4.00
+noise	158	-104.84	4.00
+noise	159	-104.72	4.00
+noise	160	-102.00	4.00
+noise	161	-106.60	4.00
+noise	162	-104.81	4.00
+noise	163	-108.87	4.00
+noise	164	-103.71	4.00
+noise	165	-102.58	4.00
+noise	166	-101.49	4.00
+noise	167	-105.32	4.00
+noise	168	-104.48	4.00
+noise	169	-106.44	4.00
+noise	170	-107.46	4.00
+noise	171	-104.56	4.00
+noise	172	-105.14	4.00
+noise	173	-106.17	4.00
+noise	174	-103.92	4.00
+noise	175	-108.82	4.00
+noise	176	-107.80	4.00
+noise	177	-103.64	4.00
+noise	178	-105.16	4.00
+noise	179	-105.01	4.00
+noise	180	-106.44	4.00
+noise	181	-103.30	4.00
+noise	182	-106.61	4.00
+noise	183	-107.62	4.00
+noise	184	-103.79	4.00
+noise	185	-105.15	4.00
+noise	186	-104.53	4.00
+noise	187	-106.04	4.00
+noise	188	-103.39	4.00
+noise	189	-103.88	4.00
+noise	190	-106.80	4.00
+noise	191	-107.83	4.00
+noise	192	-105.03	4.00
+noise	193	-106.80	4.00
+noise	194	-104.66	4.00
+noise	195	-108.63	4.00
+noise	196	-104.61	4.00
+noise	197	-107.59	4.00
+noise	198	-103.22	4.00
+noise	199	-107.19	4.00
+noise	200	-107.44	4.00
+noise	201	-104.85	4.00
+noise	202	-105.26	4.00
+noise	203	-105.66	4.00
+noise	204	-109.45	4.00
+noise	205	-107.63	4.00
+noise	206	-105.19	4.00
+noise	207	-105.82	4.00
+noise	208	-104.71	4.00
+noise	209	-105.68	4.00
+noise	210	-103.54	4.00
+noise	211	-106.32	4.00
+noise	212	-104.62	4.00
+noise	213	-104.03	4.00
+noise	214	-106.30	4.00
+noise	215	-103.40	4.00
+noise	216	-105.08	4.00
+noise	217	-104.01	4.00
+noise	218	-102.13	4.00
+noise	219	-101.03	4.00
+noise	220	-106.55	4.00
+noise	221	-105.11	4.00
+noise	222	-104.38	4.00
+noise	223	-106.19	4.00
+noise	224	-106.60	4.00
diff --git a/apps/tests/TestNetworkLpl/Makefile b/apps/tests/TestNetworkLpl/Makefile
new file mode 100644
index 00000000..af118ab4
--- /dev/null
+++ b/apps/tests/TestNetworkLpl/Makefile
@@ -0,0 +1,73 @@
+COMPONENT=TestNetworkLplAppC
+
+CFLAGS += -DLOW_POWER_LISTENING
+CFLAGS += -DLPL_DEF_LOCAL_WAKEUP=512
+CFLAGS += -DLPL_DEF_REMOTE_WAKEUP=512
+CFLAGS += -DDELAY_AFTER_RECEIVE=20
+
+# CFLAGS += -DCC2420_DEF_CHANNEL=12
+CFLAGS += -I.
+CFLAGS += -I../TestNetwork
+
+CFLAGS += -I$(TOSDIR)/lib/net \
+          -I$(TOSDIR)/lib/net/drip \
+          -I$(TOSDIR)/lib/net/4bitle \
+          -I$(TOSDIR)/lib/net/ctp -DNO_DEBUG
+
+TFLAGS += -I$(TOSDIR)/../apps/tests/TestDissemination \
+          -I$(TOSDIR)/../support/sdk/c \
+          -I$(TOSDIR)/types \
+          -I.
+
+LIBMOTE = $(TOSDIR)/../support/sdk/c/libmote.a
+#BUILD_EXTRA_DEPS += tn-injector #tn-listener
+LISTEN_OBJS = collection_msg.o test_network_msg.o tn-listener.o $(LIBMOTE)
+INJECT_OBJS = set_rate_msg.o tn-injector.o collection_debug_msg.o $(LIBMOTE)
+
+# arguments: output filename stem, input filename, struct name
+define mig_templ
+MIGFILES += $(1).c $(1).h $(1).java $(1).o
+$(1).c:
+	mig -o $(1).h c -target=$$(PLATFORM) $$(CFLAGS) $$(TFLAGS) $(2) $(3)
+$(1).java:
+	mig -o $(1).java java -target=$$(PLATFORM) $$(CFLAGS) $$(TFLAGS) $(2) $(3)
+endef
+
+$(eval $(call mig_templ,test_network_msg,TestNetwork.h,TestNetworkMsg))
+$(eval $(call mig_templ,set_rate_msg,$(TOSDIR)/lib/net/DisseminationEngine.h,dissemination_message))
+$(eval $(call mig_templ,collection_debug_msg,$(TOSDIR)/lib/net/collection/CollectionDebugMsg.h,CollectionDebugMsg))
+
+%.o: %.c
+	gcc -v  $(TFLAGS) $(CFLAGS) -c -o $@ $<
+
+tn-listener: $(LISTEN_OBJS)
+	gcc -v $(TFLAGS) $(CFLAGS) -o $@ $(LISTEN_OBJS)
+
+tn-injector: $(INJECT_OBJS)
+	gcc -v $(TFLAGS) $(CFLAGS) -o $@ $(INJECT_OBJS)
+
+#tn-listener.o: tn-listener.c
+#	gcc $(TFLAGS) $(CFLAGS) -c -o $@ $<
+
+tn-injector.o: tn-injector.c test_network_msg.c
+	gcc $(TFLAGS) $(CFLAGS) -c -o $@ $<
+
+#test_network_msg.c:
+#	mig -o test_network_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) TestNetwork.h TestNetworkMsg 
+
+#set_rate_msg.c:
+#	mig -o set_rate_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) $(TOSDIR)/lib/net/DisseminationEngine.h dissemination_message
+
+#set_rate_msg.o: set_rate_msg.c
+#	gcc $(CFLAGS) $(TFLAGS) -c -o $@ $<
+
+#test_network_msg.o: test_network_msg.c
+#	gcc $(CFLAGS) $(TFLAGS) -c -o $@ $<
+
+#collection_msg.c:
+#	mig -o collection_msg.h c -target=$(PLATFORM) $(CFLAGS) $(TFLAGS) $(TOSDIR)/lib/net/collection/ForwardingEngine.h collection_header
+
+include $(MAKERULES)
+
+migclean:
+	rm -rf $(MIGFILES)
diff --git a/apps/tests/TestNetworkLpl/README.txt b/apps/tests/TestNetworkLpl/README.txt
new file mode 100644
index 00000000..3029a6a6
--- /dev/null
+++ b/apps/tests/TestNetworkLpl/README.txt
@@ -0,0 +1,19 @@
+README for TestNetworkLpl
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+This is a version of the TestNetworkLpl application that is using the
+default LowPowerListening mechanism to reduce the power consumption.
+
+The settings for default lpl are controlled by the following lines
+from the Makefile:
+
+  CFLAGS += -DLOW_POWER_LISTENING
+  CFLAGS += -DLPL_DEF_LOCAL_WAKEUP=512
+  CFLAGS += -DLPL_DEF_REMOTE_WAKEUP=512
+  CFLAGS += -DDELAY_AFTER_RECEIVE=20
+
+Known bugs/limitations:
+
+None.
diff --git a/apps/tests/TestNetworkLpl/TestNetworkLplAppC.nc b/apps/tests/TestNetworkLpl/TestNetworkLplAppC.nc
new file mode 100644
index 00000000..88230cfe
--- /dev/null
+++ b/apps/tests/TestNetworkLpl/TestNetworkLplAppC.nc
@@ -0,0 +1,68 @@
+/**
+ * TestNetworkLplC exercises the basic networking layers, collection and
+ * dissemination. The application samples DemoSensorC at a basic rate
+ * and sends packets up a collection tree. The rate is configurable
+ * through dissemination.
+ *
+ * See TEP118: Dissemination, TEP 119: Collection, and TEP 123: The
+ * Collection Tree Protocol for details.
+ * 
+ * @author Philip Levis
+ * @version $Revision: 1.1 $ $Date: 2009-09-16 00:53:47 $
+ */
+#include "TestNetwork.h"
+#include "Ctp.h"
+
+configuration TestNetworkLplAppC {}
+implementation {
+  components TestNetworkLplC, MainC, LedsC, ActiveMessageC;
+  components DisseminationC;
+  components new DisseminatorC(uint32_t, SAMPLE_RATE_KEY) as Object32C;
+  components CollectionC as Collector;
+  components new CollectionSenderC(CL_TEST);
+  components new TimerMilliC();
+  components new DemoSensorC();
+  components new SerialAMSenderC(CL_TEST);
+  components SerialActiveMessageC;
+#ifndef NO_DEBUG
+  components new SerialAMSenderC(AM_COLLECTION_DEBUG) as UARTSender;
+  components UARTDebugSenderP as DebugSender;
+#endif
+  components RandomC;
+  components new QueueC(message_t*, 12);
+  components new PoolC(message_t, 12);
+
+  TestNetworkLplC.Boot -> MainC;
+  TestNetworkLplC.RadioControl -> ActiveMessageC;
+  TestNetworkLplC.SerialControl -> SerialActiveMessageC;
+  TestNetworkLplC.RoutingControl -> Collector;
+  TestNetworkLplC.DisseminationControl -> DisseminationC;
+  TestNetworkLplC.Leds -> LedsC;
+  TestNetworkLplC.Timer -> TimerMilliC;
+  TestNetworkLplC.DisseminationPeriod -> Object32C;
+  TestNetworkLplC.Send -> CollectionSenderC;
+  TestNetworkLplC.ReadSensor -> DemoSensorC;
+  TestNetworkLplC.RootControl -> Collector;
+  TestNetworkLplC.Receive -> Collector.Receive[CL_TEST];
+  TestNetworkLplC.UARTSend -> SerialAMSenderC.AMSend;
+  TestNetworkLplC.CollectionPacket -> Collector;
+  TestNetworkLplC.CtpInfo -> Collector;
+  TestNetworkLplC.CtpCongestion -> Collector;
+  TestNetworkLplC.Random -> RandomC;
+  TestNetworkLplC.Pool -> PoolC;
+  TestNetworkLplC.Queue -> QueueC;
+  TestNetworkLplC.RadioPacket -> ActiveMessageC;
+  TestNetworkLplC.LowPowerListening -> ActiveMessageC;
+  
+#ifndef NO_DEBUG
+  components new PoolC(message_t, 10) as DebugMessagePool;
+  components new QueueC(message_t*, 10) as DebugSendQueue;
+  DebugSender.Boot -> MainC;
+  DebugSender.UARTSend -> UARTSender;
+  DebugSender.MessagePool -> DebugMessagePool;
+  DebugSender.SendQueue -> DebugSendQueue;
+  Collector.CollectionDebug -> DebugSender;
+  TestNetworkLplC.CollectionDebug -> DebugSender;
+#endif
+  TestNetworkLplC.AMPacket -> ActiveMessageC;
+}
diff --git a/apps/tests/TestNetworkLpl/TestNetworkLplC.nc b/apps/tests/TestNetworkLpl/TestNetworkLplC.nc
new file mode 100644
index 00000000..3a7d49c9
--- /dev/null
+++ b/apps/tests/TestNetworkLpl/TestNetworkLplC.nc
@@ -0,0 +1,214 @@
+/**
+ * TestNetworkC exercises the basic networking layers, collection and
+ * dissemination. The application samples DemoSensorC at a basic rate
+ * and sends packets up a collection tree. The rate is configurable
+ * through dissemination. The default send rate is every 10s.
+ *
+ * See TEP118: Dissemination and TEP 119: Collection for details.
+ * 
+ * @author Philip Levis
+ * @version $Revision: 1.1 $ $Date: 2009-09-16 00:53:47 $
+ */
+
+#include <Timer.h>
+#include "TestNetwork.h"
+#include "CtpDebugMsg.h"
+
+module TestNetworkLplC {
+  uses interface Boot;
+  uses interface SplitControl as RadioControl;
+  uses interface SplitControl as SerialControl;
+  uses interface StdControl as RoutingControl;
+  uses interface StdControl as DisseminationControl;
+  uses interface DisseminationValue<uint32_t> as DisseminationPeriod;
+  uses interface Send;
+  uses interface Leds;
+  uses interface Read<uint16_t> as ReadSensor;
+  uses interface Timer<TMilli>;
+  uses interface RootControl;
+  uses interface Receive;
+  uses interface AMSend as UARTSend;
+  uses interface CollectionPacket;
+  uses interface CtpInfo;
+  uses interface CtpCongestion;
+  uses interface Random;
+  uses interface Queue<message_t*>;
+  uses interface Pool<message_t>;
+  uses interface CollectionDebug;
+  uses interface AMPacket;
+  uses interface Packet as RadioPacket;
+  uses interface LowPowerListening;
+}
+implementation {
+  task void uartEchoTask();
+  message_t packet;
+  message_t uartpacket;
+  message_t* recvPtr = &uartpacket;
+  uint8_t msglen;
+  bool sendBusy = FALSE;
+  bool uartbusy = FALSE;
+  bool firstTimer = TRUE;
+  uint16_t seqno;
+  enum {
+    SEND_INTERVAL = 60*1024U,
+  };
+
+  event void ReadSensor.readDone(error_t err, uint16_t val) { }  
+
+  event void Boot.booted() {
+    call SerialControl.start();
+  }
+  event void SerialControl.startDone(error_t err) {
+    if (TOS_NODE_ID % 500 == 0) {
+      call LowPowerListening.setLocalWakeupInterval(0);
+    }
+    call RadioControl.start();
+  }
+  event void RadioControl.startDone(error_t err) {
+    if (err != SUCCESS) {
+      call RadioControl.start();
+    }
+    else {
+      //call DisseminationControl.start();
+      call RoutingControl.start();
+      if (TOS_NODE_ID % 500 == 0) {
+	call RootControl.setRoot();
+      }
+      seqno = 0;
+        call Timer.startOneShot(call Random.rand32() % SEND_INTERVAL);
+    }
+  }
+
+  event void RadioControl.stopDone(error_t err) {}
+  event void SerialControl.stopDone(error_t err) {}	
+
+  void failedSend() {
+    dbg("App", "%s: Send failed.\n", __FUNCTION__);
+    call CollectionDebug.logEvent(NET_C_DBG_1);
+  }
+
+   
+  void sendMessage() {
+    TestNetworkMsg* msg = (TestNetworkMsg*)call Send.getPayload(&packet, sizeof(TestNetworkMsg));
+    uint16_t metric;
+    am_addr_t parent = 0;
+
+    call CtpInfo.getParent(&parent);
+    call CtpInfo.getEtx(&metric);
+
+    msg->source = TOS_NODE_ID;
+    msg->seqno = seqno;
+    msg->data = 0xCAFE;
+    msg->parent = parent;
+    msg->hopcount = 0;
+    msg->metric = metric;
+
+    if (call Send.send(&packet, sizeof(TestNetworkMsg)) != SUCCESS) {
+      failedSend();
+      call Leds.led0On();
+      dbg("TestNetworkC", "%s: Transmission failed.\n", __FUNCTION__);
+    }
+    else {
+      sendBusy = TRUE;
+      seqno++; 
+      dbg("TestNetworkC", "%s: Transmission succeeded.\n", __FUNCTION__);
+    }
+  }
+
+ 
+  event void Timer.fired() {
+    uint32_t nextInt;
+    call Leds.led0Toggle();
+    dbg("TestNetworkC", "TestNetworkC: Timer fired.\n");
+    nextInt = call Random.rand32() % SEND_INTERVAL;
+    nextInt += SEND_INTERVAL >> 1;
+    call Timer.startOneShot(nextInt);
+    if (!sendBusy)
+	sendMessage();
+  }
+
+  event void Send.sendDone(message_t* m, error_t err) {
+    if (err != SUCCESS) {
+	//      call Leds.led0On();
+    }
+    sendBusy = FALSE;
+    dbg("TestNetworkC", "Send completed.\n");
+  }
+  
+  event void DisseminationPeriod.changed() {
+    const uint32_t* newVal = call DisseminationPeriod.get();
+    call Timer.stop();
+    call Timer.startPeriodic(*newVal);
+  }
+
+  event message_t* 
+  Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    dbg("TestNetworkC", "Received packet at %s from node %hhu.\n", sim_time_string(), call CollectionPacket.getOrigin(msg));
+    call Leds.led1Toggle();    
+    if (!call Pool.size() <= (TEST_NETWORK_QUEUE_SIZE < 4)? 1:3)  {
+      //      call CtpCongestion.setClientCongested(TRUE);
+    }
+    if (!call Pool.empty() && call Queue.size() < call Queue.maxSize()) {
+      message_t* tmp = call Pool.get();
+      call Queue.enqueue(msg);
+      if (!uartbusy) {
+        post uartEchoTask();
+      }
+      return tmp;
+    }
+    return msg;
+ }
+
+ task void uartEchoTask() {
+    dbg("Traffic", "Sending packet to UART.\n");
+   if (call Queue.empty()) {
+     return;
+   }
+   else if (!uartbusy) {
+     message_t* msg = call Queue.dequeue();
+     dbg("Traffic", "Sending packet to UART.\n");
+     if (call UARTSend.send(0xffff, msg, call RadioPacket.payloadLength(msg)) == SUCCESS) {
+       uartbusy = TRUE;
+     }
+     else {
+      call CollectionDebug.logEventMsg(NET_C_DBG_2,
+				       call CollectionPacket.getSequenceNumber(msg),
+				       call CollectionPacket.getOrigin(msg),
+				       call AMPacket.destination(msg));
+     }
+   }
+ }
+
+  event void UARTSend.sendDone(message_t *msg, error_t error) {
+    dbg("Traffic", "UART send done.\n");
+    uartbusy = FALSE;
+    call Pool.put(msg);
+    if (!call Queue.empty()) {
+      post uartEchoTask();
+    } 
+    else {
+      //        call CtpCongestion.setClientCongested(FALSE);
+    }
+  }
+
+  /* Default implementations for CollectionDebug calls.
+   * These allow CollectionDebug not to be wired to anything if debugging
+   * is not desired. */
+
+    default command error_t CollectionDebug.logEvent(uint8_t type) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) {
+        return SUCCESS;
+    }
+ 
+}
diff --git a/apps/tests/TestNetworkLpl/ctp-dump.py b/apps/tests/TestNetworkLpl/ctp-dump.py
new file mode 100644
index 00000000..6fdef401
--- /dev/null
+++ b/apps/tests/TestNetworkLpl/ctp-dump.py
@@ -0,0 +1,49 @@
+#!/usr/bin/env python
+
+import sys, time
+import tos
+
+class Test(tos.Packet):
+    def __init__(self, payload = None):
+        tos.Packet.__init__(self,
+                               [('source',   'int', 2),
+                                ('seqno',    'int', 2),
+                                ('parent',   'int', 2),
+                                ('metric',   'int', 2),
+                                ('data',     'int', 2),
+                                ('hopcount', 'int', 1),
+                                ('sendCount','int', 2),
+                                ('sendSuccessCount','int', 2)],
+                               payload)
+
+class CtpData(tos.Packet):
+    def __init__(self, payload = None):
+        tos.Packet.__init__(self,
+                               [('options',     'int', 1),
+                                ('thl',         'int', 1),
+                                ('etx',         'int', 2),
+                                ('origin',      'int', 2),
+                                ('originSeqNo', 'int', 1),
+                                ('collectionId','int', 1),
+                                ('data',  'blob', None)],
+                               payload)
+
+if len(sys.argv) < 2:
+    print "Usage:", sys.argv[0], "serial@/dev/ttyUSB0:57600"
+    sys.exit()
+
+#s = tos.Serial(sys.argv[1], int(sys.argv[2]), debug=False)
+am = tos.AM()
+
+while True:
+    p = am.read()
+    if p:
+        if p.type == 238:
+            ts = "%.4f" % time.time()
+            ctp = CtpData(p.data)
+            test = Test(ctp.data)
+            print ts, '\t', ctp
+            print ts, '\t', test
+        else:
+            print p
+
diff --git a/apps/tests/TestOscilloscopeLQI/Makefile b/apps/tests/TestOscilloscopeLQI/Makefile
new file mode 100644
index 00000000..2eee0a67
--- /dev/null
+++ b/apps/tests/TestOscilloscopeLQI/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=MultihopOscilloscopeAppC
+CFLAGS += -I$(TOSDIR)/lib/net/ -I$(TOSDIR)/lib/net/lqi -I.
+
+include $(MAKERULES)
diff --git a/apps/tests/TestOscilloscopeLQI/MultihopOscilloscope.h b/apps/tests/TestOscilloscopeLQI/MultihopOscilloscope.h
new file mode 100644
index 00000000..5f040539
--- /dev/null
+++ b/apps/tests/TestOscilloscopeLQI/MultihopOscilloscope.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+#ifndef MULTIHOP_OSCILLOSCOPE_H
+#define MULTIHOP_OSCILLOSCOPE_H
+
+enum {
+  /* Number of readings per message. If you increase this, you may have to
+     increase the message_t size. */
+  NREADINGS = 5,
+  /* Default sampling period. */
+  DEFAULT_INTERVAL = 1024,
+  AM_OSCILLOSCOPE = 0x93
+};
+
+typedef nx_struct oscilloscope {
+  nx_uint16_t version; /* Version of the interval. */
+  nx_uint16_t interval; /* Samping period. */
+  nx_uint16_t id; /* Mote id of sending mote. */
+  nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */
+  nx_uint16_t readings[NREADINGS];
+} oscilloscope_t;
+
+#endif
diff --git a/apps/tests/TestOscilloscopeLQI/MultihopOscilloscopeAppC.nc b/apps/tests/TestOscilloscopeLQI/MultihopOscilloscopeAppC.nc
new file mode 100644
index 00000000..72f85ab8
--- /dev/null
+++ b/apps/tests/TestOscilloscopeLQI/MultihopOscilloscopeAppC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * MultihopOscilloscope demo application using the collection layer. 
+ * See README.txt file in this directory and TEP 119: Collection.
+ *
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+configuration MultihopOscilloscopeAppC { }
+implementation {
+  components MainC, MultihopOscilloscopeC, NoLedsC, new TimerMilliC(), 
+    new DemoSensorC() as Sensor;
+
+  //MainC.SoftwareInit -> Sensor;
+  
+  MultihopOscilloscopeC.Boot -> MainC;
+  MultihopOscilloscopeC.Timer -> TimerMilliC;
+  MultihopOscilloscopeC.Read -> Sensor;
+  MultihopOscilloscopeC.Leds -> NoLedsC;
+
+  //
+  // Communication components.  These are documented in TEP 113:
+  // Serial Communication, and TEP 119: Collection.
+  //
+  components CollectionC as Collector,  // Collection layer
+    ActiveMessageC,                         // AM layer
+    new CollectionSenderC(AM_OSCILLOSCOPE), // Sends multihop RF
+    SerialActiveMessageC,                   // Serial messaging
+    new SerialAMSenderC(AM_OSCILLOSCOPE);   // Sends to the serial port
+
+  MultihopOscilloscopeC.RadioControl -> ActiveMessageC;
+  MultihopOscilloscopeC.SerialControl -> SerialActiveMessageC;
+  MultihopOscilloscopeC.RoutingControl -> Collector;
+
+  MultihopOscilloscopeC.Send -> CollectionSenderC;
+  MultihopOscilloscopeC.SerialSend -> SerialAMSenderC.AMSend;
+  MultihopOscilloscopeC.Receive -> Collector.Receive;
+  MultihopOscilloscopeC.RootControl -> Collector;
+
+  components new PoolC(message_t, 10) as UARTMessagePoolP,
+    new QueueC(message_t*, 10) as UARTQueueP;
+
+  MultihopOscilloscopeC.UARTMessagePool -> UARTMessagePoolP;
+  MultihopOscilloscopeC.UARTQueue -> UARTQueueP;
+
+
+  
+}
diff --git a/apps/tests/TestOscilloscopeLQI/MultihopOscilloscopeC.nc b/apps/tests/TestOscilloscopeLQI/MultihopOscilloscopeC.nc
new file mode 100644
index 00000000..ad51c6ee
--- /dev/null
+++ b/apps/tests/TestOscilloscopeLQI/MultihopOscilloscopeC.nc
@@ -0,0 +1,284 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * MultihopOscilloscope demo application using the collection layer. 
+ * See README.txt file in this directory and TEP 119: Collection.
+ *
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+#include "Timer.h"
+#include "MultihopOscilloscope.h"
+
+module MultihopOscilloscopeC {
+  uses {
+    // Interfaces for initialization:
+    interface Boot;
+    interface SplitControl as RadioControl;
+    interface SplitControl as SerialControl;
+    interface StdControl as RoutingControl;
+    
+    // Interfaces for communication, multihop and serial:
+    interface Send;
+    interface Receive as Snoop;
+    interface Receive;
+    interface AMSend as SerialSend;
+    interface CollectionPacket;
+    interface RootControl;
+
+    interface Queue<message_t *> as UARTQueue;
+    interface Pool<message_t> as UARTMessagePool;
+
+    // Miscalleny:
+    interface Timer<TMilli>;
+    interface Read<uint16_t>;
+    interface Leds;
+  }
+}
+
+implementation {
+  task void uartSendTask();
+  static void startTimer();
+  static void fatal_problem();
+  static void report_problem();
+  static void report_sent();
+  static void report_received();
+
+  uint8_t uartlen;
+  message_t sendbuf;
+  message_t uartbuf;
+  bool sendbusy=FALSE, uartbusy=FALSE;
+
+  /* Current local state - interval, version and accumulated readings */
+  oscilloscope_t local;
+
+  uint8_t reading; /* 0 to NREADINGS */
+
+  /* When we head an Oscilloscope message, we check it's sample count. If
+     it's ahead of ours, we "jump" forwards (set our count to the received
+     count). However, we must then suppress our next count increment. This
+     is a very simple form of "time" synchronization (for an abstract
+     notion of time). */
+  bool suppress_count_change;
+
+  // 
+  // On bootup, initialize radio and serial communications, and our
+  // own state variables.
+  //
+  event void Boot.booted() {
+    local.interval = DEFAULT_INTERVAL;
+    local.id = TOS_NODE_ID;
+    local.version = 0;
+
+    // Beginning our initialization phases:
+    if (call RadioControl.start() != SUCCESS)
+      fatal_problem();
+
+    if (call RoutingControl.start() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void RadioControl.startDone(error_t error) {
+    if (error != SUCCESS)
+      fatal_problem();
+
+    if (sizeof(local) > call Send.maxPayloadLength())
+      fatal_problem();
+
+    if (call SerialControl.start() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void SerialControl.startDone(error_t error) {
+    if (error != SUCCESS)
+      fatal_problem();
+
+    // This is how to set yourself as a root to the collection layer:
+    if (local.id % 500 == 0)
+      call RootControl.setRoot();
+
+    startTimer();
+  }
+
+  static void startTimer() {
+    if (call Timer.isRunning()) call Timer.stop();
+    call Timer.startPeriodic(local.interval);
+    reading = 0;
+  }
+
+  event void RadioControl.stopDone(error_t error) { }
+  event void SerialControl.stopDone(error_t error) { }
+
+  //
+  // Only the root will receive messages from this interface; its job
+  // is to forward them to the serial uart for processing on the pc
+  // connected to the sensor network.
+  //
+  event message_t*
+  Receive.receive(message_t* msg, void *payload, uint8_t len) {
+    oscilloscope_t* in = (oscilloscope_t*)payload;
+    oscilloscope_t* out;
+    call Leds.led1Toggle();
+    if (uartbusy == FALSE) {
+      out = (oscilloscope_t*)call SerialSend.getPayload(&uartbuf, sizeof(oscilloscope_t));
+      if (call Packet.payloadLength(msg) != sizeof(oscilloscope_t)) {
+	return msg;
+      }
+      else {
+	memcpy(out, in, sizeof(oscilloscope_t));
+      }
+      uartlen = sizeof(oscilloscope_t);
+      post uartSendTask();
+    } else {
+      // The UART is busy; queue up messages and service them when the
+      // UART becomes free.
+      message_t *newmsg = call UARTMessagePool.get();
+      if (newmsg == NULL) {
+        // drop the message on the floor if we run out of queue space.
+        report_problem();
+        return msg;
+      }
+
+      //Prepare message to be sent over the uart
+      out = (oscilloscope_t*)call SerialSend.getPayload(newmsg, sizeof(oscilloscope_t));
+      if (out == NULL) {
+	return msg;
+      }
+      memcpy(out, in, sizeof(oscilloscope_t));
+
+      if (call UARTQueue.enqueue(newmsg) != SUCCESS) {
+        // drop the message on the floor and hang if we run out of
+        // queue space without running out of queue space first (this
+        // should not occur).
+        call UARTMessagePool.put(newmsg);
+        fatal_problem();
+        return msg;
+      }
+    }
+
+    return msg;
+  }
+
+  task void uartSendTask() {
+    if (call SerialSend.send(0xffff, &uartbuf, uartlen) != SUCCESS) {
+      report_problem();
+    } else {
+      uartbusy = TRUE;
+    }
+  }
+
+  event void SerialSend.sendDone(message_t *msg, error_t error) {
+    uartbusy = FALSE;
+    if (call UARTQueue.empty() == FALSE) {
+      // We just finished a UART send, and the uart queue is
+      // non-empty.  Let's start a new one.
+      message_t *queuemsg = call UARTQueue.dequeue();
+      if (queuemsg == NULL) {
+        fatal_problem();
+        return;
+      }
+      memcpy(&uartbuf, queuemsg, sizeof(message_t));
+      if (call UARTMessagePool.put(queuemsg) != SUCCESS) {
+        fatal_problem();
+        return;
+      }
+      post uartSendTask();
+    }
+  }
+
+  //
+  // Overhearing other traffic in the network.
+  //
+  event message_t* 
+  Snoop.receive(message_t* msg, void* payload, uint8_t len) {
+    oscilloscope_t *omsg = payload;
+
+    report_received();
+
+    // If we receive a newer version, update our interval. 
+    if (omsg->version > local.version) {
+      local.version = omsg->version;
+      local.interval = omsg->interval;
+      startTimer();
+    }
+
+    // If we hear from a future count, jump ahead but suppress our own
+    // change.
+    if (omsg->count > local.count) {
+      local.count = omsg->count;
+      suppress_count_change = TRUE;
+    }
+
+    return msg;
+  }
+
+  /* At each sample period:
+     - if local sample buffer is full, send accumulated samples
+     - read next sample
+  */
+  event void Timer.fired() {
+    if (TOS_NODE_ID % 500 == 0) {return;}
+    if (reading == NREADINGS) {
+      if (!sendbusy) {
+	oscilloscope_t *o = (oscilloscope_t *)call Send.getPayload(&sendbuf, sizeof(oscilloscope_t));
+	if (o == NULL) {
+	  return;
+	}
+	memcpy(o, &local, sizeof(local));
+	if (call Send.send(&sendbuf, sizeof(local)) == SUCCESS)
+	  sendbusy = TRUE;
+        else
+          report_problem();
+      }
+      
+      reading = 0;
+      /* Part 2 of cheap "time sync": increment our count if we didn't
+         jump ahead. */
+      if (!suppress_count_change)
+        local.count++;
+      suppress_count_change = FALSE;
+    }
+
+    if (call Read.read() != SUCCESS)
+      fatal_problem();
+  }
+
+  event void Send.sendDone(message_t* msg, error_t error) {
+    if (error == SUCCESS)
+      report_sent();
+    else
+      report_problem();
+
+    sendbusy = FALSE;
+  }
+
+  event void Read.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS) {
+      data = 0xffff;
+      report_problem();
+    }
+    local.readings[reading++] = data;
+  }
+
+
+  // Use LEDs to report various status issues.
+  static void fatal_problem() { 
+    call Leds.led0On(); 
+    call Leds.led1On();
+    call Leds.led2On();
+    call Timer.stop();
+  }
+
+  static void report_problem() { call Leds.led0Toggle(); }
+  static void report_sent() { call Leds.led1Toggle(); }
+  static void report_received() { call Leds.led2Toggle(); }
+}
diff --git a/apps/tests/TestOscilloscopeLQI/README.txt b/apps/tests/TestOscilloscopeLQI/README.txt
new file mode 100644
index 00000000..39291dfa
--- /dev/null
+++ b/apps/tests/TestOscilloscopeLQI/README.txt
@@ -0,0 +1,49 @@
+README for MultihopOscilloscope
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+MultihopOscilloscope is a simple data-collection demo. It periodically samples
+the default sensor and broadcasts a message every few readings. These readings
+can be displayed by the Java "Oscilloscope" application found in the
+TOSROOT/apps/Oscilloscope/java subdirectory. The sampling rate starts at 4Hz,
+but can be changed from the Java application.
+
+You can compile MultihopOscilloscope with a sensor board's default sensor by
+compiling as follows:
+
+  SENSORBOARD=<sensorboard name> make <mote>
+
+You can change the sensor used by editing MultihopOscilloscopeAppC.nc.
+
+This version of MultihopOscilloscope uses the MultihopLQI collection
+layer in tos/lib/net/lqi.
+
+Tools:
+
+The Java application displays readings it receives from motes running the
+MultihopOscilloscope demo via a serial forwarder. To run it, change to the
+TOSROOT/apps/Oscilloscope/java subdirectory and type:
+
+  make
+  java net.tinyos.sf.SerialForwarder -comm serial@<serial port>:<mote>
+  # e.g., java net.tinyps.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2
+  # or java net.tinyps.sf.SerialForwarder -comm serial@COM2:telosb
+  ./run
+
+The controls at the bootom of the screen allow yoy to zoom in or out the X
+axis, change the range of the Y axis, and clear all received data. You can
+change the color used to display a mote by clicking on its color in the
+mote table.
+
+Known bugs/limitations:
+
+None.
+
+See also:
+TEP 113: Serial Communications, TEP 119: Collection.
+
+Notes:
+
+MultihopOscilloscope configures a mote whose TOS_NODE_ID modulo 500 is zero 
+to be a collection root.
diff --git a/apps/tests/TestOscilloscopeLQI/java/ColorCellEditor.java b/apps/tests/TestOscilloscopeLQI/java/ColorCellEditor.java
new file mode 100644
index 00000000..f88b0b6f
--- /dev/null
+++ b/apps/tests/TestOscilloscopeLQI/java/ColorCellEditor.java
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import javax.swing.table.*;
+import java.awt.*;
+import java.awt.event.*;
+
+/* Editor for table cells representing colors. Popup a color chooser. */
+public class ColorCellEditor extends AbstractCellEditor
+    implements TableCellEditor {
+    private Color color;
+    private JButton button;
+
+    public ColorCellEditor(String title) {
+	button = new JButton();
+	final JColorChooser chooser = new JColorChooser();
+	final JDialog dialog = JColorChooser.createDialog
+	    (button, title, true, chooser,
+	     new ActionListener() {
+		 public void actionPerformed(ActionEvent e) {
+		     color = chooser.getColor();
+		 } },
+	     null);
+
+	button.setBorderPainted(false);
+	button.addActionListener
+	    (new ActionListener () {
+		    public void actionPerformed(ActionEvent e) {
+			button.setBackground(color);
+			chooser.setColor(color);
+			dialog.setVisible(true);
+			fireEditingStopped();
+		    } } );
+	
+    }
+
+    public Object getCellEditorValue() { return color; }
+    public Component getTableCellEditorComponent(JTable table,
+                                                 Object value,
+                                                 boolean isSelected,
+                                                 int row,
+                                                 int column) {
+        color = (Color)value;
+        return button;
+    }
+}
+
diff --git a/apps/tests/TestOscilloscopeLQI/java/Data.java b/apps/tests/TestOscilloscopeLQI/java/Data.java
new file mode 100644
index 00000000..ac35aa72
--- /dev/null
+++ b/apps/tests/TestOscilloscopeLQI/java/Data.java
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import java.util.*;
+
+/* Hold all data received from motes */
+class Data {
+    /* The mote data is stored in a flat array indexed by a mote's identifier.
+       A null value indicates no mote with that identifier. */
+    private Node[] nodes = new Node[256];
+    private Oscilloscope parent;
+
+    Data(Oscilloscope parent) {
+	this.parent = parent;
+    }
+
+    /* Data received from mote nodeId containing NREADINGS samples from
+       messageId * NREADINGS onwards. Tell parent if this is a new node. */
+    void update(int nodeId, int messageId, int readings[]) {
+	if (nodeId >= nodes.length) {
+	    int newLength = nodes.length * 2;
+	    if (nodeId >= newLength)
+		newLength = nodeId + 1;
+
+	    Node newNodes[] = new Node[newLength];
+	    System.arraycopy(nodes, 0, newNodes, 0, nodes.length);
+	    nodes = newNodes;
+	}
+	Node node = nodes[nodeId];
+	if (node == null) {
+	    nodes[nodeId] = node = new Node(nodeId);
+	    parent.newNode(nodeId);
+	}
+	node.update(messageId, readings);
+    }
+
+    /* Return value of sample x for mote nodeId, or -1 for missing data */
+    int getData(int nodeId, int x) {
+	if (nodeId >= nodes.length || nodes[nodeId] == null)
+	    return -1;
+	return nodes[nodeId].getData(x);
+    }
+
+    /* Return number of last known sample on mote nodeId. Returns 0 for
+       unknown motes. */
+    int maxX(int nodeId) {
+	if (nodeId >= nodes.length || nodes[nodeId] == null)
+	    return 0;
+	return nodes[nodeId].maxX();
+    }
+
+    /* Return number of largest known sample on all motes (0 if there are no
+       motes) */
+    int maxX() {
+	int max = 0;
+
+	for (int i = 0; i < nodes.length; i++)
+	    if (nodes[i] != null) {
+		int nmax = nodes[i].maxX();
+
+		if (nmax > max)
+		    max = nmax;
+	    }
+
+	return max;
+    }
+}
diff --git a/apps/tests/TestOscilloscopeLQI/java/Graph.java b/apps/tests/TestOscilloscopeLQI/java/Graph.java
new file mode 100644
index 00000000..9a42c1c8
--- /dev/null
+++ b/apps/tests/TestOscilloscopeLQI/java/Graph.java
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.awt.font.*;
+import java.awt.geom.*;
+import java.util.*;
+
+/* Panel for drawing mote-data graphs */
+class Graph extends JPanel
+{
+    final static int BORDER_LEFT = 40;
+    final static int BORDER_RIGHT = 0;
+    final static int BORDER_TOP = 10;
+    final static int BORDER_BOTTOM = 10;
+
+    final static int TICK_SPACING = 40;
+    final static int MAX_TICKS = 16;
+    final static int TICK_WIDTH = 10;
+
+    final static int MIN_WIDTH = 50;
+
+    int gx0, gx1, gy0, gy1; // graph bounds
+    int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale
+    Window parent;
+
+    /* Graph to screen coordinate conversion support */
+    int height, width;
+    double xscale, yscale;
+
+    void updateConversion() {
+	height = getHeight() - BORDER_TOP - BORDER_BOTTOM;
+	width = getWidth() - BORDER_LEFT - BORDER_RIGHT;
+	if (height < 1) 
+	    height = 1;
+	if (width < 1)
+	    width = 1;
+	xscale = (double)width / (gx1 - gx0 + 1);
+	yscale = (double)height / (gy1 - gy0 + 1);
+    }
+
+    Graphics makeClip(Graphics g) {
+	return g.create(BORDER_LEFT, BORDER_TOP, width, height);
+    }
+
+    // Note that these do not include the border offset!
+    int screenX(int gx) {
+	return (int)(xscale * (gx - gx0) + 0.5);
+    }
+
+    int screenY(int gy) {
+	return (int)(height - yscale * (gy - gy0));
+    }
+
+    int graphX(int sx) {
+	return (int)(sx / xscale + gx0 + 0.5);
+    }
+
+    Graph(Window parent) {
+	this.parent = parent;
+	gy0 = 0; gy1 = 0xffff;
+	gx0 = 0; gx1 = MIN_WIDTH << scale;
+    }
+
+    void rightDrawString(Graphics2D g, String s, int x, int y) {
+	TextLayout layout =
+	    new TextLayout(s, parent.smallFont, g.getFontRenderContext());
+	Rectangle2D bounds = layout.getBounds();
+	layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2);
+    }
+
+    protected void paintComponent(Graphics g) {
+	Graphics2D g2d = (Graphics2D)g;
+
+	/* Repaint. Synchronize on Oscilloscope to avoid data changing.
+	   Simply clear panel, draw Y axis and all the mote graphs. */
+	synchronized (parent.parent) {
+	    updateConversion();
+	    g2d.setColor(Color.BLACK);
+	    g2d.fillRect(0, 0, getWidth(), getHeight());
+	    drawYAxis(g2d);
+
+	    Graphics clipped = makeClip(g2d);
+	    int count = parent.moteListModel.size();
+	    for (int i = 0; i < count; i++) {
+		clipped.setColor(parent.moteListModel.getColor(i));
+		drawGraph(clipped, parent.moteListModel.get(i));
+	    }
+	}
+    }
+
+    /* Draw the Y-axis */
+    protected void drawYAxis(Graphics2D g) {
+	int axis_x = BORDER_LEFT - 1;
+	int height = getHeight() - BORDER_BOTTOM - BORDER_TOP;
+
+	g.setColor(Color.WHITE);
+	g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1);
+
+	/* Draw a reasonable set of tick marks */
+	int nTicks = height / TICK_SPACING;
+	if (nTicks > MAX_TICKS)
+	    nTicks = MAX_TICKS;
+
+	int tickInterval = (gy1 - gy0 + 1) / nTicks;
+	if (tickInterval == 0)
+	    tickInterval = 1;
+
+	/* Tick interval should be of the family A * 10^B,
+	   where A = 1, 2 * or 5. We tend more to rounding A up, to reduce
+	   rather than increase the number of ticks. */
+	int B = (int)(Math.log(tickInterval) / Math.log(10));
+	int A = (int)(tickInterval / Math.pow(10, B) + 0.5);
+	if (A > 2) A = 5;
+	else if (A > 5) A = 10;
+
+	tickInterval = A * (int)Math.pow(10, B);
+
+	/* Ticks are printed at multiples of tickInterval */
+	int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval;
+	while (tick <= gy1) {
+	    int stick = screenY(tick) + BORDER_TOP;
+	    rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick);
+	    g.drawLine(axis_x - TICK_WIDTH / 2, stick,
+		       axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick);
+	    tick += tickInterval;
+	}
+	
+    }
+
+    /* Draw graph for mote nodeId */
+    protected void drawGraph(Graphics g, int nodeId) {
+	SingleGraph sg = new SingleGraph(g, nodeId);
+
+	if (gx1 - gx0 >= width) // More points than pixels-iterate by pixel
+	    for (int sx = 0; sx < width; sx++)
+		sg.nextPoint(g, graphX(sx), sx);
+	else // Less points than pixel-iterate by points
+	    for (int gx = gx0; gx <= gx1; gx++)
+		sg.nextPoint(g, gx, screenX(gx));
+    }
+
+    /* Inner class to simplify drawing a graph. Simplify initialise it, then
+       feed it the X screen and graph coordinates, from left to right. */
+    private class SingleGraph {
+	int lastsx, lastsy, nodeId;
+
+	/* Start drawing the graph mote id */
+	SingleGraph(Graphics g, int id) {
+	    nodeId = id;
+	    lastsx = -1;
+	    lastsy = -1;
+	}
+
+	/* Next point in mote's graph is at x value gx, screen coordinate sx */
+	void nextPoint(Graphics g, int gx, int sx) {
+	    int gy = parent.parent.data.getData(nodeId, gx);
+	    int sy = -1;
+
+	    if (gy >= 0) { // Ignore missing values
+		double rsy = height - yscale * (gy - gy0);
+
+		// Ignore problem values
+		if (rsy >= -1e6 && rsy <= 1e6)
+		    sy = (int)(rsy + 0.5);
+
+		if (lastsy >= 0 && sy >= 0)
+		    g.drawLine(lastsx, lastsy, sx, sy);
+	    }
+	    lastsx = sx;
+	    lastsy = sy;
+	}
+    }
+
+    /* Update X-axis range in GUI */
+    void updateXLabel() {
+	parent.xLabel.setText("X: " + gx0 + " - " + gx1);
+    }
+
+    /* Ensure that graph is nicely positioned on screen. max is the largest 
+       sample number received from any mote. */
+    private void recenter(int max) {
+	// New data will show up at the 3/4 point
+	// The 2nd term ensures that gx1 will be >= max
+	int scrollby = ((gx1 - gx0) >> 2) + (max - gx1);
+	gx0 += scrollby;
+	gx1 += scrollby;
+	if (gx0 < 0) { // don't bother showing negative sample numbers
+	    gx1 -= gx0;
+	    gx0 = 0;
+	}
+	updateXLabel();
+    }
+
+    /* New data received. Redraw graph, scrolling if necessary */
+    void newData() {
+	int max = parent.parent.data.maxX();
+
+	if (max > gx1 || max < gx0) // time to scroll
+	    recenter(max);
+	repaint();
+    }
+
+    /* User set the X-axis scale to newScale */
+    void setScale(int newScale) {
+	gx1 = gx0 + (MIN_WIDTH << newScale);
+	scale = newScale;
+	recenter(parent.parent.data.maxX());
+	repaint();
+    }
+
+    /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus
+       values (return false), or accept, redraw and return true. */
+    boolean setYAxis(int newy0, int newy1) {
+	if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 ||
+	    newy1 < 0 || newy1 > 65535)
+	    return false;
+	gy0 = newy0;
+	gy1 = newy1;
+	repaint();
+	return true;
+    }
+}
diff --git a/apps/tests/TestOscilloscopeLQI/java/Makefile b/apps/tests/TestOscilloscopeLQI/java/Makefile
new file mode 100644
index 00000000..55c2605b
--- /dev/null
+++ b/apps/tests/TestOscilloscopeLQI/java/Makefile
@@ -0,0 +1,21 @@
+GEN=OscilloscopeMsg.java Constants.java
+
+all: oscilloscope.jar
+
+oscilloscope.jar: Oscilloscope.class
+	jar cf $@ *.class
+
+OscilloscopeMsg.java: ../MultihopOscilloscope.h
+	mig -target=null -java-classname=OscilloscopeMsg java ../MultihopOscilloscope.h oscilloscope -o $@
+
+Constants.java: ../MultihopOscilloscope.h
+	ncg -target=null -java-classname=Constants java ../MultihopOscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@
+
+Oscilloscope.class: $(wildcard *.java) $(GEN)
+	javac *.java
+
+clean:
+	rm -f *.class $(GEN)
+
+veryclean: clean
+	rm oscilloscope.jar
diff --git a/apps/tests/TestOscilloscopeLQI/java/Node.java b/apps/tests/TestOscilloscopeLQI/java/Node.java
new file mode 100644
index 00000000..cfe8db9e
--- /dev/null
+++ b/apps/tests/TestOscilloscopeLQI/java/Node.java
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Class holding all data received from a mote.
+ */
+class Node {
+    /* Data is hold in an array whose size is a multiple of INCREMENT, and
+       INCREMENT itself must be a multiple of Constant.NREADINGS. This
+       simplifies handling the extension and clipping of old data
+       (see setEnd) */
+    final static int INCREMENT = 100 * Constants.NREADINGS;
+    final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT
+
+    /* The mote's identifier */
+    int id;
+
+    /* Data received from the mote. data[0] is the dataStart'th sample
+       Indexes 0 through dataEnd - dataStart - 1 hold data.
+       Samples are 16-bit unsigned numbers, -1 indicates missing data. */
+    int[] data;
+    int dataStart, dataEnd;
+
+    Node(int _id) {
+	id = _id;
+    }
+
+    /* Update data to hold received samples newDataIndex .. newEnd.
+       If we receive data with a lower index, we discard newer data
+       (we assume the mote rebooted). */
+    private void setEnd(int newDataIndex, int newEnd) {
+	if (newDataIndex < dataStart || data == null) {
+	    /* New data is before the start of what we have. Just throw it
+	       all away and start again */
+	    dataStart = newDataIndex;
+	    data = new int[INCREMENT];
+	}
+	if (newEnd > dataStart + data.length) {
+	    /* Try extending first */
+	    if (data.length < MAX_SIZE) {
+		int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT;
+		if (newLength >= MAX_SIZE)
+		    newLength = MAX_SIZE;
+
+		int[] newData = new int[newLength];
+		System.arraycopy(data, 0, newData, 0, data.length);
+		data = newData;
+
+	    }
+	    if (newEnd > dataStart + data.length) {
+		/* Still doesn't fit. Squish.
+		   We assume INCREMENT >= (newEnd - newDataIndex), and ensure
+		   that dataStart + data.length - INCREMENT = newDataIndex */
+		int newStart = newDataIndex + INCREMENT - data.length;
+
+		if (dataStart + data.length > newStart)
+		    System.arraycopy(data, newStart - dataStart, data, 0,
+				     data.length - (newStart - dataStart));
+		dataStart = newStart;
+	    }
+	}
+	/* Mark any missing data as invalid */
+	for (int i = dataEnd < dataStart ? dataStart : dataEnd;
+	     i < newDataIndex; i++)
+	    data[i - dataStart] = -1;
+
+	/* If we receive a count less than the old count, we assume the old
+	   data is invalid */
+	dataEnd = newEnd;
+
+    }
+
+    /* Data received containing NREADINGS samples from messageId * NREADINGS 
+       onwards */
+    void update(int messageId, int readings[]) {
+	int start = messageId * Constants.NREADINGS;
+	setEnd(start, start + Constants.NREADINGS);
+	for (int i = 0; i < readings.length; i++)
+	    data[start - dataStart + i] = readings[i];
+    }
+
+    /* Return value of sample x, or -1 for missing data */
+    int getData(int x) {
+	if (x < dataStart || x >= dataEnd)
+	    return -1;
+	else
+	    return data[x - dataStart];
+    }
+
+    /* Return number of last known sample */
+    int maxX() {
+	return dataEnd - 1;
+    }
+}
diff --git a/apps/tests/TestOscilloscopeLQI/java/Oscilloscope.java b/apps/tests/TestOscilloscopeLQI/java/Oscilloscope.java
new file mode 100644
index 00000000..3db3741f
--- /dev/null
+++ b/apps/tests/TestOscilloscopeLQI/java/Oscilloscope.java
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import net.tinyos.message.*;
+import net.tinyos.util.*;
+import java.io.*;
+
+/* The "Oscilloscope" demo app. Displays graphs showing data received from
+   the Oscilloscope mote application, and allows the user to:
+   - zoom in or out on the X axis
+   - set the scale on the Y axis
+   - change the sampling period
+   - change the color of each mote's graph
+   - clear all data
+
+   This application is in three parts:
+   - the Node and Data objects store data received from the motes and support
+     simple queries
+   - the Window and Graph and miscellaneous support objects implement the
+     GUI and graph drawing
+   - the Oscilloscope object talks to the motes and coordinates the other
+     objects
+
+   Synchronization is handled through the Oscilloscope object. Any operation
+   that reads or writes the mote data must be synchronized on Oscilloscope.
+   Note that the messageReceived method below is synchronized, so no further
+   synchronization is needed when updating state based on received messages.
+*/
+public class Oscilloscope implements MessageListener
+{
+    MoteIF mote;
+    Data data;
+    Window window;
+
+    /* The current sampling period. If we receive a message from a mote
+       with a newer version, we update our interval. If we receive a message
+       with an older version, we broadcast a message with the current interval
+       and version. If the user changes the interval, we increment the
+       version and broadcast the new interval and version. */
+    int interval = Constants.DEFAULT_INTERVAL;
+    int version = -1;
+
+    /* Main entry point */
+    void run() {
+	data = new Data(this);
+	window = new Window(this);
+	window.setup();
+	mote = new MoteIF(PrintStreamMessenger.err);
+	mote.registerListener(new OscilloscopeMsg(), this);
+    }
+
+    /* The data object has informed us that nodeId is a previously unknown
+       mote. Update the GUI. */
+    void newNode(int nodeId) {
+	window.newNode(nodeId);
+    }
+
+    synchronized public void messageReceived(int dest_addr, Message msg) {
+	if (msg instanceof OscilloscopeMsg) {
+	    OscilloscopeMsg omsg = (OscilloscopeMsg)msg;
+
+	    /* Update interval and mote data */
+	    periodUpdate(omsg.get_version(), omsg.get_interval());
+	    data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings());
+
+	    /* Inform the GUI that new data showed up */
+	    window.newData();
+	}
+    }
+
+    /* A potentially new version and interval has been received from the
+       mote */
+    void periodUpdate(int moteVersion, int moteInterval) {
+	if (moteVersion > version) {
+	    /* It's new. Update our vision of the interval. */
+	    version = moteVersion;
+	    interval = moteInterval;
+	    window.updateSamplePeriod();
+	}
+	else if (moteVersion < version) {
+	    /* It's old. Update the mote's vision of the interval. */
+	    sendInterval();
+	}
+    }
+
+    /* The user wants to set the interval to newPeriod. Refuse bogus values
+       and return false, or accept the change, broadcast it, and return
+       true */
+    synchronized boolean setInterval(int newPeriod) {
+	if (newPeriod < 1 || newPeriod > 65535)
+	    return false;
+	interval = newPeriod;
+	version++;
+	sendInterval();
+	return true;
+    }
+
+    /* Broadcast a version+interval message. */
+    void sendInterval() {
+	OscilloscopeMsg omsg = new OscilloscopeMsg();
+
+	omsg.set_version(version);
+	omsg.set_interval(interval);
+	try {
+	    mote.send(MoteIF.TOS_BCAST_ADDR, omsg);
+	}
+	catch (IOException e) {
+	    window.error("Cannot send message to mote");
+	}
+    }
+
+    /* User wants to clear all data. */
+    void clear() {
+	data = new Data(this);
+    }
+
+    public static void main(String[] args) {
+	Oscilloscope me = new Oscilloscope();
+	me.run();
+    }
+}
diff --git a/apps/tests/TestOscilloscopeLQI/java/Window.java b/apps/tests/TestOscilloscopeLQI/java/Window.java
new file mode 100644
index 00000000..d7979bf9
--- /dev/null
+++ b/apps/tests/TestOscilloscopeLQI/java/Window.java
@@ -0,0 +1,294 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import javax.swing.table.*;
+import javax.swing.event.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.util.*;
+
+/* The main GUI object. Build the GUI and coordinate all user activities */
+class Window
+{
+    Oscilloscope parent;
+    Graph graph;
+
+    Font smallFont = new Font("Dialog", Font.PLAIN, 8);
+    Font boldFont = new Font("Dialog", Font.BOLD, 12);
+    Font normalFont = new Font("Dialog", Font.PLAIN, 12);
+    MoteTableModel moteListModel; // GUI view of mote list
+    JLabel xLabel; // Label displaying X axis range
+    JTextField sampleText, yText; // inputs for sample period and Y axis range
+    JFrame frame;
+
+    Window(Oscilloscope parent) {
+	this.parent = parent;
+    }
+
+    /* A model for the mote table, and general utility operations on the mote
+       list */
+    class MoteTableModel extends AbstractTableModel {
+	private ArrayList motes = new ArrayList();
+	private ArrayList colors = new ArrayList();
+
+	/* Initial mote colors cycle through this list. Add more colors if
+	   you want. */
+	private Color[] cycle = {
+	    Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA,
+	    Color.YELLOW, Color.GRAY, Color.YELLOW
+	};
+	int cycleIndex;
+
+	/* TableModel methods for achieving our table appearance */
+	public String getColumnName(int col) {
+	    if (col == 0)
+		return "Mote";
+	    else
+		return "Color";
+	}
+	public int getColumnCount() { return 2; }
+	public synchronized int getRowCount() { return motes.size(); }
+	public synchronized Object getValueAt(int row, int col) {
+	    if (col == 0)
+		return motes.get(row);
+	    else
+		return colors.get(row);
+	}
+        public Class getColumnClass(int col) {
+            return getValueAt(0, col).getClass();
+        }
+	public boolean isCellEditable(int row, int col) { return col == 1; }
+        public synchronized void setValueAt(Object value, int row, int col) {
+	    colors.set(row, value);
+            fireTableCellUpdated(row, col);
+	    graph.repaint();
+        }
+
+	/* Return mote id of i'th mote */
+	int get(int i) { return ((Integer)motes.get(i)).intValue(); }
+	
+	/* Return color of i'th mote */
+	Color getColor(int i)  { return (Color)colors.get(i); }
+
+	/* Return number of motes */
+	int size() { return motes.size(); }
+
+	/* Add a new mote */
+	synchronized void newNode(int nodeId) {
+	    /* Shock, horror. No binary search. */
+	    int i, len = motes.size();
+
+	    for (i = 0; ; i++)
+		if (i == len || nodeId < get(i)) {
+		    motes.add(i, new Integer(nodeId));
+		    // Cycle through a set of initial colors
+		    colors.add(i, cycle[cycleIndex++ % cycle.length]);
+		    break;
+		}
+	    fireTableRowsInserted(i, i);
+	}
+
+	/* Remove all motes */
+	void clear() {
+	    motes = new ArrayList();
+	    colors = new ArrayList();
+	    fireTableDataChanged();
+	}
+    }
+
+    /* A simple full-color cell */
+    static class MoteColor extends JLabel implements TableCellRenderer {
+	public MoteColor() { setOpaque(true); }
+	public Component getTableCellRendererComponent
+	    (JTable table, Object color,
+	     boolean isSelected, boolean hasFocus, int row, int column) {
+	    setBackground((Color)color);
+	    return this;
+	}
+    }
+
+    /* Convenience methods for making buttons, labels and textfields.
+       Simplifies code and ensures a consistent style. */
+
+    JButton makeButton(String label, ActionListener action) {
+	JButton button = new JButton();
+        button.setText(label);
+        button.setFont(boldFont);
+	button.addActionListener(action);
+	return button;
+    }
+
+    JLabel makeLabel(String txt, int alignment) {
+	JLabel label = new JLabel(txt, alignment);
+	label.setFont(boldFont);
+	return label;
+    }
+
+    JLabel makeSmallLabel(String txt, int alignment) {
+	JLabel label = new JLabel(txt, alignment);
+	label.setFont(smallFont);
+	return label;
+    }
+
+    JTextField makeTextField(int columns, ActionListener action) {
+	JTextField tf = new JTextField(columns);
+	tf.setFont(normalFont);
+	tf.setMaximumSize(tf.getPreferredSize());
+	tf.addActionListener(action);
+	return tf;
+    }
+
+    /* Build the GUI */
+    void setup() {
+	JPanel main = new JPanel(new BorderLayout());
+
+	main.setMinimumSize(new Dimension(500, 250));
+	main.setPreferredSize(new Dimension(800, 400));
+
+	// Three panels: mote list, graph, controls
+	moteListModel = new  MoteTableModel();
+	JTable moteList = new JTable(moteListModel);
+	moteList.setDefaultRenderer(Color.class, new MoteColor());
+	moteList.setDefaultEditor(Color.class, new ColorCellEditor("Pick Mote Color"));
+	moteList.setPreferredScrollableViewportSize(new Dimension(100, 400));
+	JScrollPane motePanel = new JScrollPane();
+	motePanel.getViewport().add(moteList, null);
+	main.add(motePanel, BorderLayout.WEST);
+
+	graph = new Graph(this);
+	main.add(graph, BorderLayout.CENTER);
+
+	// Controls. Organised using box layouts.
+
+	// Sample period.
+	JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT);
+	sampleText = makeTextField(6, new ActionListener() {
+		public void actionPerformed(ActionEvent e) { setSamplePeriod(); }
+	    } );
+	updateSamplePeriod();
+
+	// Clear data.
+	JButton clearButton = makeButton("Clear data", new ActionListener() {
+		public void actionPerformed(ActionEvent e) { clearData(); }
+	    } );
+
+	// Adjust X-axis zoom.
+	Box xControl = new Box(BoxLayout.Y_AXIS);
+	xLabel = makeLabel("", JLabel.CENTER);
+	final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale);
+	Hashtable xTable = new Hashtable();
+	for (int i = 0; i <= 8; i += 2)
+	    xTable.put(new Integer(i),
+		       makeSmallLabel("" + (Graph.MIN_WIDTH << i),
+				      JLabel.CENTER));
+	xSlider.setLabelTable(xTable);
+	xSlider.setPaintLabels(true);
+	graph.updateXLabel();
+	graph.setScale(graph.scale);
+	xSlider.addChangeListener(new ChangeListener() {
+		public void stateChanged(ChangeEvent e) {
+		    //if (!xSlider.getValueIsAdjusting())
+			graph.setScale((int)xSlider.getValue());
+		}
+	    });
+	xControl.add(xLabel);
+	xControl.add(xSlider);
+
+	// Adjust Y-axis range.
+	JLabel yLabel = makeLabel("Y:", JLabel.RIGHT);
+	yText = makeTextField(12, new ActionListener() {
+		public void actionPerformed(ActionEvent e) { setYAxis(); }
+	    } );
+	yText.setText(graph.gy0 + " - " + graph.gy1);
+
+	Box controls = new Box(BoxLayout.X_AXIS);
+	controls.add(clearButton);
+	controls.add(Box.createHorizontalGlue());
+	controls.add(Box.createRigidArea(new Dimension(20, 0)));
+	controls.add(sampleLabel);
+	controls.add(sampleText);
+	controls.add(Box.createHorizontalGlue());
+	controls.add(Box.createRigidArea(new Dimension(20, 0)));
+	controls.add(xControl);
+	controls.add(yLabel);
+	controls.add(yText);
+	main.add(controls, BorderLayout.SOUTH);
+
+	// The frame part
+	frame = new JFrame("Oscilloscope");
+	frame.setSize(main.getPreferredSize());
+	frame.getContentPane().add(main);
+	frame.setVisible(true);
+	frame.addWindowListener(new WindowAdapter() {
+		public void windowClosing(WindowEvent e) { System.exit(0); }
+	    });
+    }
+
+    /* User operation: clear data */
+    void clearData() {
+	synchronized (parent) {
+	    moteListModel.clear();
+	    parent.clear();
+	    graph.newData();
+	}
+    }
+
+    /* User operation: set Y-axis range. */
+    void setYAxis() {
+	String val = yText.getText();
+
+	try {
+	    int dash = val.indexOf('-');
+	    if (dash >= 0) {
+		String min = val.substring(0, dash).trim();
+		String max = val.substring(dash + 1).trim();
+
+		if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max)))
+		    error("Invalid range " + min + " - " + max + " (expected values between 0 and 65535)");
+		return;
+	    }
+	}
+	catch (NumberFormatException e) { }
+	error("Invalid range " + val + " (expected NN-MM)");
+    }
+
+    /* User operation: set sample period. */
+    void setSamplePeriod() {
+	String periodS = sampleText.getText().trim();
+	try {
+	    int newPeriod = Integer.parseInt(periodS);
+	    if (parent.setInterval(newPeriod))
+		return;
+	}
+	catch (NumberFormatException e) { }
+	error("Invalid sample period " + periodS);
+    }
+
+    /* Notification: sample period changed. */
+    void updateSamplePeriod() {
+	sampleText.setText("" + parent.interval);
+    }
+
+    /* Notification: new node. */
+    void newNode(int nodeId) {
+	moteListModel.newNode(nodeId);
+    }
+
+    /* Notification: new data. */
+    void newData() {
+	graph.newData();
+    }
+
+    void error(String msg) {
+	JOptionPane.showMessageDialog(frame, msg, "Error",
+				      JOptionPane.ERROR_MESSAGE);
+    }
+}
diff --git a/apps/tests/TestOscilloscopeLQI/java/oscilloscope.jar b/apps/tests/TestOscilloscopeLQI/java/oscilloscope.jar
new file mode 100644
index 00000000..28eb3b4e
Binary files /dev/null and b/apps/tests/TestOscilloscopeLQI/java/oscilloscope.jar differ
diff --git a/apps/tests/TestPowerManager/Makefile b/apps/tests/TestPowerManager/Makefile
new file mode 100644
index 00000000..ef870eb1
--- /dev/null
+++ b/apps/tests/TestPowerManager/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestPowerManagerAppC
+OPTFLAGS = -O0
+include $(MAKERULES)
+
diff --git a/apps/tests/TestPowerManager/MyComponentC.nc b/apps/tests/TestPowerManager/MyComponentC.nc
new file mode 100644
index 00000000..3de82697
--- /dev/null
+++ b/apps/tests/TestPowerManager/MyComponentC.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Please refer to TEP 115 for more information about the components
+ * this application is used to test.
+ *
+ * This component is used to create a "dummy" non-virtualized component for use
+ * with the TestPowerManager component.  It can be powered on and off through any
+ * of the AsyncStdControl, StdControl, and SplitControl interfaces.
+ *
+ * @author Kevin Klues <klueska@cs.wustl.edu>
+ * @version  $Revision: 1.6 $
+ * @date $Date: 2010-06-29 22:07:25 $ 
+ */
+ 
+#define MYCOMPONENT_RESOURCE   "MyComponent.Resource"
+configuration MyComponentC{
+  provides {
+    interface Resource[uint8_t];
+  }
+}
+implementation {
+  components MyComponentP, LedsC, 
+             new TimerMilliC() as StartTimer, new TimerMilliC() as StopTimer,
+             new FcfsArbiterC(MYCOMPONENT_RESOURCE) as Arbiter,
+//              new AsyncStdControlPowerManagerC() as PowerManager;
+             new AsyncStdControlDeferredPowerManagerC(750) as PowerManager;
+//              new StdControlPowerManagerC() as PowerManager;
+//              new StdControlDeferredPowerManagerC(750) as PowerManager;
+//              new SplitControlPowerManagerC() as PowerManager;
+//              new SplitControlDeferredPowerManagerC(750) as PowerManager;
+
+  Resource = Arbiter;
+
+  PowerManager.AsyncStdControl -> MyComponentP.AsyncStdControl;
+//   PowerManager.StdControl -> MyComponentP.StdControl;
+//   PowerManager.SplitControl -> MyComponentP.SplitControl;
+  PowerManager.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
+  PowerManager.ArbiterInfo -> Arbiter.ArbiterInfo;
+
+  MyComponentP.Leds -> LedsC;
+  MyComponentP.StartTimer -> StartTimer;
+  MyComponentP.StopTimer -> StopTimer;
+}
+
diff --git a/apps/tests/TestPowerManager/MyComponentP.nc b/apps/tests/TestPowerManager/MyComponentP.nc
new file mode 100644
index 00000000..ea950736
--- /dev/null
+++ b/apps/tests/TestPowerManager/MyComponentP.nc
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Please refer to TEP 115 for more information about the components
+ * this application is used to test.
+ *
+ * This component is used to create a "dummy" non-virtualized component for use
+ * with the TestPowerManager component.  It can be powered on and off through any
+ * of the AsyncStdControl, StdControl, and SplitControl interfaces.
+ *
+ * @author Kevin Klues <klueska@cs.wustl.edu>
+ * @version  $Revision: 1.5 $
+ * @date $Date: 2010-06-29 22:07:25 $ 
+ */
+ 
+module MyComponentP {
+  provides {
+    interface SplitControl;
+    interface StdControl;
+    interface AsyncStdControl;
+  }
+  uses {
+    interface Leds;
+    interface Timer<TMilli> as StartTimer;
+    interface Timer<TMilli> as StopTimer;
+  }
+}
+implementation {
+
+  #define START_DELAY 10
+  #define STOP_DELAY 10
+
+  command error_t SplitControl.start() {
+    call StartTimer.startOneShot(START_DELAY);
+    return SUCCESS;
+  }
+
+  event void StartTimer.fired() {
+    call Leds.led0On();
+    signal SplitControl.startDone(SUCCESS);
+  }
+
+  command error_t SplitControl.stop() {
+    call StopTimer.startOneShot(STOP_DELAY);
+    return SUCCESS;
+  }
+
+  event void StopTimer.fired() {
+    call Leds.led0Off();
+    signal SplitControl.stopDone(SUCCESS);
+  }
+
+  command error_t StdControl.start() {
+    call Leds.led0On();
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    call Leds.led0Off();
+    return SUCCESS;
+  }
+
+  async command error_t AsyncStdControl.start() {
+    call Leds.led0On();
+    return SUCCESS;
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    call Leds.led0Off();
+    return SUCCESS;
+  }
+
+  default event void SplitControl.startDone(error_t error) {}
+  default event void SplitControl.stopDone(error_t error) {}
+}
+
diff --git a/apps/tests/TestPowerManager/README.txt b/apps/tests/TestPowerManager/README.txt
new file mode 100644
index 00000000..868470e4
--- /dev/null
+++ b/apps/tests/TestPowerManager/README.txt
@@ -0,0 +1,56 @@
+README for TestPowerManager
+Author/Contact: tinyos-help@millennium.berkeley.edu
+@author Kevin Klues <klueska@cs.wustl.edu>
+
+Description:
+
+Please refer to TEP 115 for more information about the components
+this application is used to test.
+
+This application tests the functionality of the various non-mcu power
+management components that are used with non-virtualized devices.
+Different policies can be tested by making a simple wiring change
+in the "MyComponentsC" configuration.  This component is used
+to simulate a non-virtualized device that has a set of resource users
+that need to share it.  An arbiter component is used to control
+access to the resource, and one of the 6 default power management
+policies can be chosen to perform shutdown of the device whenever
+it is no longer in use.  Depending on the power management policy
+chosen, power down of the device will occur through either the
+AsyncStdControl, StdControl, or SplitControl interfaces and will
+occur at different times.  The application itself simply wires to
+"MyComponentC" and is unaware of the power management policy being
+used by it.
+
+Two resource users are created by the application to share the
+"MyComponent" resource.  They each hold the device for a specific
+amount of time and then release it.  There is some delay between
+when the first user releases the resource and when the second one
+requests it.  Since the resource uses one of the default power
+management polices, we expect the device to be automatically shutdown
+whenever both resource users do not require use of the resource.
+Different shutdown times will occur, however, depeneding on which
+power mangament policy is under test.  The various leds are used to
+indicate which resource user currently has control of the resource,
+and whether the "MyComponent" device is currently powered on or not.
+
+  -- Led0 0n  -> MyComponent" powered on
+  -- Led0 0ff -> MyComponent" powered off
+  -- Led1 0n  -> Resource 0 controls "MyComponent" resource
+  -- Led1 0ff -> Resource 0 does not control "MyComponent" resource
+  -- Led2 0n  -> Resource 1 controls "MyComponent" resource
+  -- Led2 0ff -> Resource 1 does not control "MyComponent" resource
+
+This application demonstrates, therefore, not only how one would use
+one of the provided power management polices to control the power
+states of a non-virtualized device, but also how to wire everything
+together.
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
+
diff --git a/apps/tests/TestPowerManager/TestPowerManagerAppC.nc b/apps/tests/TestPowerManager/TestPowerManagerAppC.nc
new file mode 100644
index 00000000..e841075b
--- /dev/null
+++ b/apps/tests/TestPowerManager/TestPowerManagerAppC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about the components
+ * this application is used to test.
+ *
+ * This application is used to test the functionality of the non mcu power  
+ * management component for non-virtualized devices.  Changes to
+ * <code>MyComponentC</code> allow one to choose between different Power
+ * Management policies.
+ *
+ * @author Kevin Klues <klueska@cs.wustl.edu>
+ * @version  $Revision: 1.5 $
+ * @date $Date: 2010-06-29 22:07:25 $ 
+ */
+ 
+configuration TestPowerManagerAppC{
+}
+implementation {
+  components MainC, TestPowerManagerC, MyComponentC, LedsC, new TimerMilliC();
+
+  TestPowerManagerC -> MainC.Boot;
+  
+  TestPowerManagerC.TimerMilli -> TimerMilliC;
+  TestPowerManagerC.Resource0 -> MyComponentC.Resource[unique("MyComponent.Resource")];
+  TestPowerManagerC.Resource1 -> MyComponentC.Resource[unique("MyComponent.Resource")];
+  
+  TestPowerManagerC.Leds -> LedsC;
+}
+
diff --git a/apps/tests/TestPowerManager/TestPowerManagerC.nc b/apps/tests/TestPowerManager/TestPowerManagerC.nc
new file mode 100644
index 00000000..0dcc3ce4
--- /dev/null
+++ b/apps/tests/TestPowerManager/TestPowerManagerC.nc
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about the components
+ * this application is used to test.
+ *
+ * This application is used to test the functionality of the non mcu power  
+ * management component for non-virtualized devices.  Changes to
+ * <code>MyComponentC</code> allow one to choose between different Power
+ * Management policies.
+ *
+ * @author Kevin Klues <klueska@cs.wustl.edu>
+ * @version  $Revision: 1.5 $
+ * @date $Date: 2010-06-29 22:07:25 $ 
+ */
+ 
+#include "Timer.h"
+
+module TestPowerManagerC {
+  uses {
+    interface Boot;  
+    interface Leds;
+    interface Resource as Resource0;
+    interface Resource as Resource1;
+    interface Timer<TMilli> as TimerMilli;
+  }
+}
+implementation {
+
+  #define HOLD_PERIOD 500
+  #define WAIT_PERIOD 1000
+  uint8_t whoHasIt;
+  uint8_t waiting;
+  
+  //All resources try to gain access
+  event void Boot.booted() {
+    call Resource0.request();
+    waiting = FALSE;
+  }
+  
+  //If granted the resource, turn on an LED  
+  event void Resource0.granted() {
+    whoHasIt = 0;
+    call Leds.led1On();
+    call TimerMilli.startOneShot(HOLD_PERIOD);
+  }  
+
+  event void Resource1.granted() {
+    whoHasIt = 1;
+    call Leds.led2On();
+    call TimerMilli.startOneShot(HOLD_PERIOD);
+  }
+
+  event void TimerMilli.fired() {
+    if(waiting == TRUE) {
+      waiting = FALSE;
+      if(whoHasIt == 0)  {
+        if(call Resource1.immediateRequest() == SUCCESS) {
+          whoHasIt = 1;
+          call Leds.led2On();
+          call TimerMilli.startOneShot(HOLD_PERIOD);
+          return;
+        }
+        else call Resource1.request();
+      }
+      if(whoHasIt == 1)
+        call Resource0.request();
+    }
+    else {
+      if(whoHasIt == 0) {
+        call Leds.led1Off();
+        call Resource0.release();
+      }
+      if(whoHasIt == 1) {
+        call Leds.led2Off();
+        call Resource1.release();
+      }
+      waiting = TRUE;
+      call TimerMilli.startOneShot(WAIT_PERIOD);
+    }
+  }
+}
+
diff --git a/apps/tests/TestPowerup/Makefile b/apps/tests/TestPowerup/Makefile
new file mode 100644
index 00000000..bfe92d41
--- /dev/null
+++ b/apps/tests/TestPowerup/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=PowerupAppC
+include $(MAKERULES)
+
diff --git a/apps/tests/TestPowerup/PowerupAppC.nc b/apps/tests/TestPowerup/PowerupAppC.nc
new file mode 100644
index 00000000..2ff1fef4
--- /dev/null
+++ b/apps/tests/TestPowerup/PowerupAppC.nc
@@ -0,0 +1,62 @@
+// $Id: PowerupAppC.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * This application turns on LED 0 when the mote boots successfully
+ * (MainC signals the <tt>booted</tt> event). It is a useful sanity 
+ * test when developing a new platform.
+ *
+ * @author Cory Sharp 
+ * @date   Aug 12 2005
+ *
+ */
+
+configuration PowerupAppC{}
+implementation {
+  components MainC, PowerupC, LedsC;
+
+  MainC.Boot <- PowerupC;
+  
+
+  PowerupC -> LedsC.Leds;
+}
+
diff --git a/apps/tests/TestPowerup/PowerupC.nc b/apps/tests/TestPowerup/PowerupC.nc
new file mode 100644
index 00000000..0dcb0ca2
--- /dev/null
+++ b/apps/tests/TestPowerup/PowerupC.nc
@@ -0,0 +1,56 @@
+// $Id: PowerupC.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+module PowerupC
+{
+  uses interface Boot;
+  uses interface Leds;
+}
+implementation
+{
+  event void Boot.booted()  {
+    call Leds.led0On();
+  }
+}
+
diff --git a/apps/tests/TestPowerup/README.txt b/apps/tests/TestPowerup/README.txt
new file mode 100644
index 00000000..1afda434
--- /dev/null
+++ b/apps/tests/TestPowerup/README.txt
@@ -0,0 +1,19 @@
+$Id: README.txt,v 1.1 2008-06-23 21:06:14 sallai Exp $
+
+README for TestPowerup
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+The TestPowerup application turns on LED 0 when the mote boots successfully,
+i.e. when MainC signals the booted event. It is a useful sanity test when
+developing a new platform.
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
+ 
\ No newline at end of file
diff --git a/apps/tests/TestPrintf/Makefile b/apps/tests/TestPrintf/Makefile
new file mode 100644
index 00000000..dd482a5d
--- /dev/null
+++ b/apps/tests/TestPrintf/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestPrintfAppC
+CFLAGS += -I$(TOSDIR)/lib/printf
+
+include $(MAKERULES)
diff --git a/apps/tests/TestPrintf/README.txt b/apps/tests/TestPrintf/README.txt
new file mode 100644
index 00000000..6c089c6c
--- /dev/null
+++ b/apps/tests/TestPrintf/README.txt
@@ -0,0 +1,23 @@
+README for TestPrintf
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+This application is used to test the basic functionality of the printf service.
+Calls to the standard c-style printf command are made to print various strings
+of text over the serial line.  Only upon calling printfflush() does the
+data actually get sent out over the serial line.
+
+Tools:
+
+net.tinyos.tools.PrintfClient is a Java application that displays the output on
+the PC.
+
+Usage:
+
+java net.tinyos.tools.PrintfClient -comm serial@<serial port>:<mote>
+
+Known bugs/limitations:
+
+None.
+ 
+$Id: README.txt,v 1.2 2008-07-26 02:32:43 klueska Exp $
diff --git a/apps/tests/TestPrintf/TestPrintfAppC.nc b/apps/tests/TestPrintf/TestPrintfAppC.nc
new file mode 100644
index 00000000..b42f0895
--- /dev/null
+++ b/apps/tests/TestPrintf/TestPrintfAppC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This application is used to test the basic functionality of the printf service.
+ * Calls to the standard c-style printf command are made to print various strings
+ * of text over the serial line.  Only upon calling printfflush() does the
+ * data actually get sent out over the serial line.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.9 $
+ * @date $Date: 2010-06-29 22:07:25 $
+ */
+
+#include "printf.h"
+
+configuration TestPrintfAppC{
+}
+implementation {
+  components MainC, TestPrintfC;
+  components new TimerMilliC();
+
+  TestPrintfC.Boot -> MainC;
+  TestPrintfC.Timer -> TimerMilliC;
+}
+
diff --git a/apps/tests/TestPrintf/TestPrintfC.nc b/apps/tests/TestPrintf/TestPrintfC.nc
new file mode 100644
index 00000000..676e0d7d
--- /dev/null
+++ b/apps/tests/TestPrintf/TestPrintfC.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * This application is used to test the basic functionality of the printf service.
+ * Calls to the standard c-style printf command are made to print various strings
+ * of text over the serial line.  Only upon calling printfflush() does the
+ * data actually get sent out over the serial line.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.11 $
+ * @date $Date: 2010-06-29 22:07:25 $
+ */
+
+#include "printf.h"
+module TestPrintfC @safe() {
+  uses {
+    interface Boot;
+    interface Timer<TMilli>;
+  }
+}
+implementation {
+
+  uint8_t dummyVar1 = 123;
+  uint16_t dummyVar2 = 12345;
+  uint32_t dummyVar3 = 1234567890;
+
+  event void Boot.booted() {
+	call Timer.startPeriodic(1000);
+  }
+
+  event void Timer.fired() {
+  	printf("Hi I am writing to you from my TinyOS application!!\n");
+  	printf("Here is a uint8: %u\n", dummyVar1);
+  	printf("Here is a uint16: %u\n", dummyVar2);
+  	printf("Here is a uint32: %lu\n", dummyVar3);
+  	printfflush();
+  }
+}
+
diff --git a/apps/tests/TestRPL/Makefile b/apps/tests/TestRPL/Makefile
new file mode 100644
index 00000000..16e29e0e
--- /dev/null
+++ b/apps/tests/TestRPL/Makefile
@@ -0,0 +1,8 @@
+COMPONENT=TestRPLAppC
+CFLAGS+=-DPACKET_LINK
+CFLAGS+=-DCC2420_DEF_CHANNEL=11
+CFLAGS+=-I$(TOSDIR)/lib/printf
+CFLAGS+=-DPRINTFUART_ENABLED 
+PFLAGS +=-DIN6_PREFIX=\"fec0::\"
+CFLAGS += -DRPL_ROUTING -DRPL_STORING_MODE -I$(LOWPAN_ROOT)/tos/lib/net/rpl
+include $(MAKERULES)
diff --git a/apps/tests/TestRPL/TestRPL.h b/apps/tests/TestRPL/TestRPL.h
new file mode 100644
index 00000000..739ad3d2
--- /dev/null
+++ b/apps/tests/TestRPL/TestRPL.h
@@ -0,0 +1,12 @@
+#ifndef TEST_RPL_H
+#define TEST_RPL_H
+
+typedef nx_struct radio_count_msg {
+  nx_uint16_t counter;
+} radio_count_msg_t;
+
+enum {
+  AM_RADIO_COUNT_MSG = 6,
+};
+
+#endif
diff --git a/apps/tests/TestRPL/TestRPLAppC.nc b/apps/tests/TestRPL/TestRPLAppC.nc
new file mode 100644
index 00000000..8e737232
--- /dev/null
+++ b/apps/tests/TestRPL/TestRPLAppC.nc
@@ -0,0 +1,78 @@
+// $Id: RadioCountToLedsAppC.nc,v 1.4 2006/12/12 18:22:48 vlahan Exp $
+
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "TestRPL.h"
+
+/**
+ * Configuration for the RadioCountToLeds application. RadioCountToLeds 
+ * maintains a 4Hz counter, broadcasting its value in an AM packet 
+ * every time it gets updated. A RadioCountToLeds node that hears a counter 
+ * displays the bottom three bits on its LEDs. This application is a useful 
+ * test to show that basic AM communication and timers work.
+ *
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+configuration TestRPLAppC {}
+implementation {
+  components MainC, TestRPLC as App, LedsC;
+  components new TimerMilliC();
+  components new TimerMilliC() as Timer;
+  components RandomC;
+  components RPLRankC;
+  components RPLRoutingEngineC;
+  components IPDispatchC;
+  //components RPLForwardingEngineC;
+  components RPLDAORoutingEngineC;
+  components IPStackC;
+  components IPProtocolsP;
+
+  App.Boot -> MainC.Boot;  
+  App.SplitControl -> IPStackC;//IPDispatchC;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  App.RPLRoute -> RPLRoutingEngineC;
+  App.RootControl -> RPLRoutingEngineC;
+  App.RoutingControl -> RPLRoutingEngineC;
+  //App.RPL -> RPLForwardingEngineC.IP[49];
+  //App.RPLForwardingEngine -> RPLForwardingEngineC;
+  App.RPL -> IPProtocolsP.IP[49];
+  App.RPLDAO -> RPLDAORoutingEngineC;
+  App.Timer -> Timer;
+  App.Random -> RandomC;
+
+#ifdef RPL_ROUTING
+  components RPLRoutingC;
+#endif
+
+
+}
diff --git a/apps/tests/TestRPL/TestRPLC.nc b/apps/tests/TestRPL/TestRPLC.nc
new file mode 100644
index 00000000..2be519b6
--- /dev/null
+++ b/apps/tests/TestRPL/TestRPLC.nc
@@ -0,0 +1,166 @@
+// $Id: RadioCountToLedsC.nc,v 1.6 2008/06/24 05:32:31 regehr Exp $
+
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "Timer.h"
+#include "TestRPL.h"
+//#include "ip.h"
+#include <PrintfUART.h>
+/**
+ * Implementation of the RadioCountToLeds application. RadioCountToLeds 
+ * maintains a 4Hz counter, broadcasting its value in an AM packet 
+ * every time it gets updated. A RadioCountToLeds node that hears a counter 
+ * displays the bottom three bits on its LEDs. This application is a useful 
+ * test to show that basic AM communication and timers work.
+ *
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+module TestRPLC @safe() {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Timer<TMilli> as MilliTimer;
+    interface Timer<TMilli> as Timer;
+    interface RPLRoutingEngine as RPLRoute;
+    interface RootControl;
+    interface StdControl as RoutingControl;
+    interface SplitControl;
+    interface IP as RPL;
+    //interface RPLForwardingEngine;
+    interface RPLDAORoutingEngine as RPLDAO;
+    interface Random;
+  }
+}
+implementation {
+
+  //uint8_t payload[10];
+  struct in6_addr dest;
+  struct in6_addr MULTICAST_ADDR;
+
+  bool locked;
+  uint16_t counter = 0;
+  
+  event void Boot.booted() {
+
+    memset(MULTICAST_ADDR.s6_addr, 0, 16);
+    MULTICAST_ADDR.s6_addr[0] = 0xFF;
+    MULTICAST_ADDR.s6_addr[1] = 0x2;
+    MULTICAST_ADDR.s6_addr[15] = 0x1A;
+
+    if(TOS_NODE_ID == 1){
+      call RootControl.setRoot();
+    }
+    call RoutingControl.start();
+    //call RoutingControl.start();
+    call SplitControl.start();
+  }
+
+  uint32_t countrx = 0;
+  uint32_t counttx = 0;
+
+  event void RPL.recv(struct ip6_hdr *hdr, void *packet, 
+		      size_t len, struct ip6_metadata *meta){
+    uint8_t i;
+    uint8_t temp[20];
+    memcpy(temp, (uint8_t*)packet, len);
+    call Leds.led2Toggle();
+    printfUART("<><><><><><><> len: %d %lu <><><><><><> \n", len, countrx++);
+    for(i=0; i<len; i++){
+      printfUART("%d ",temp[i]);
+    }
+    printfUART("\n");
+  }
+  
+  event void SplitControl.startDone(error_t err){
+    //call RoutingControl.start();
+    while( call RPLDAO.startDAO() != SUCCESS );
+    
+    call Timer.startOneShot((call Random.rand16()%2)*1024U);
+  }
+
+  event void Timer.fired(){
+    call MilliTimer.startPeriodic(256);
+  }
+
+  task void sendTask(){
+    struct ip6_packet pkt;
+    struct ip_iovec v;
+    uint16_t temp[10];
+    uint8_t i;
+
+    for(i=0;i<10;i++){
+      temp[i] = i;
+    }
+
+    v.iov_base = (uint8_t*) &temp;
+    v.iov_len = 20;
+    v.iov_next = NULL;
+
+    pkt.ip6_data = &v;
+    pkt.ip6_hdr.ip6_vfc = IPV6_VERSION;
+    pkt.ip6_hdr.ip6_nxt = 49; // NOTHING!!
+    pkt.ip6_hdr.ip6_plen = htons(20);
+
+    memcpy(&pkt.ip6_hdr.ip6_dst, call RPLRoute.getDodagId(), sizeof(struct in6_addr));
+
+    if(TOS_NODE_ID == 1){
+      //pkt.ip6_hdr.ip6_dst.s6_addr[12] = 0x50;
+      //pkt.ip6_hdr.ip6_dst.s6_addr[13] = 0xed;
+      //pkt.ip6_hdr.ip6_dst.s6_addr[14] = 0x2f;
+      pkt.ip6_hdr.ip6_dst.s6_addr[15] = 0x03;
+    }
+
+    //pkt.ip6_hdr.ip6_dst.s6_addr[15] = 0x04;
+    printfUART(">>>>>>>>>>>> TX %lu \n", counttx++);
+
+    printfUART("\nsend to ");
+    for(i=0;i<16;i++){
+      printfUART("%x ", pkt.ip6_hdr.ip6_dst.s6_addr[i]);
+    }
+    printfUART("\n");
+
+    //fe80::12:6d45:50ed:2f04
+
+    //pkt.ip6_hdr.ip6_dst.s6_addr16[7] = htons(0xAF);
+    //memcpy(&pkt.ip6_hdr.ip6_dst, &MULTICAST_ADDR, sizeof(struct in6_addr));
+    call Leds.led0Toggle();
+    call RPL.send(&pkt);
+  }
+
+  event void MilliTimer.fired(){
+    //call Leds.led1Toggle();
+    post sendTask();
+  }
+
+  event void SplitControl.stopDone(error_t err){}
+
+}
diff --git a/apps/tests/TestRPL/UDPTest/LocalIeeeEui64C.nc b/apps/tests/TestRPL/UDPTest/LocalIeeeEui64C.nc
new file mode 100644
index 00000000..64b90401
--- /dev/null
+++ b/apps/tests/TestRPL/UDPTest/LocalIeeeEui64C.nc
@@ -0,0 +1,24 @@
+#include "PlatformIeeeEui64.h"
+
+module LocalIeeeEui64C {
+  provides interface LocalIeeeEui64;
+} 
+implementation {
+
+  command ieee_eui64_t LocalIeeeEui64.getId() {
+    ieee_eui64_t eui;
+
+    eui.data[0] = IEEE_EUI64_COMPANY_ID_0;
+    eui.data[1] = IEEE_EUI64_COMPANY_ID_1;
+    eui.data[2] = IEEE_EUI64_COMPANY_ID_2;
+
+    // 16 bits of the ID is generated by software
+    // could be used for hardware model id and revision, for example
+    eui.data[3] = IEEE_EUI64_SERIAL_ID_0;
+    eui.data[4] = IEEE_EUI64_SERIAL_ID_1;
+
+    eui.data[6] = TOS_NODE_ID << 8;
+    eui.data[7] = TOS_NODE_ID;
+    return eui;
+  }
+}
diff --git a/apps/tests/TestRPL/UDPTest/Makefile b/apps/tests/TestRPL/UDPTest/Makefile
new file mode 100644
index 00000000..347a56de
--- /dev/null
+++ b/apps/tests/TestRPL/UDPTest/Makefile
@@ -0,0 +1,22 @@
+COMPONENT=TestRPLAppC
+DEFAULT_LOCAL_GROUP=0xabcd
+CFLAGS+=-DCC2420_HW_ACKNOWLEDGEMENTS
+CFLAGS+=-DPACKET_LINK
+CFLAGS+=-I$(TOSDIR)/lib/printf
+CFLAGS+=-DPRINTFUART_ENABLED
+#
+CFLAGS+=-DRPL_ROUTING -DRPL_STORING_MODE -I$(LOWPAN_ROOT)/tos/lib/net/rpl
+#CFLAGS+=-DRPL_OF_MRHOF
+#
+# the sleep interval needs to be set the same for all participating devices
+#CFLAGS += -DLOW_POWER_LISTENING -DLPL_SLEEP_INTERVAL=200
+# also modifiy blip's L2 parameters to reduce media overload
+CFLAGS +=-DBLIP_L2_RETRIES=10 -DBLIP_L2_DELAY=103
+#
+#5 second packet generation interval
+CFLAGS+=-DPACKET_INTERVAL=5120UL
+CFLAGS+=-DCC2420_DEF_CHANNEL=26
+#
+CFLAGS+=-DRPL_ROOT_ADDR=2
+PFLAGS+=-DIN6_PREFIX=\"fec0::\"
+include $(MAKERULES)
diff --git a/apps/tests/TestRPL/UDPTest/TestRPL.h b/apps/tests/TestRPL/UDPTest/TestRPL.h
new file mode 100644
index 00000000..739ad3d2
--- /dev/null
+++ b/apps/tests/TestRPL/UDPTest/TestRPL.h
@@ -0,0 +1,12 @@
+#ifndef TEST_RPL_H
+#define TEST_RPL_H
+
+typedef nx_struct radio_count_msg {
+  nx_uint16_t counter;
+} radio_count_msg_t;
+
+enum {
+  AM_RADIO_COUNT_MSG = 6,
+};
+
+#endif
diff --git a/apps/tests/TestRPL/UDPTest/TestRPLAppC.nc b/apps/tests/TestRPL/UDPTest/TestRPLAppC.nc
new file mode 100644
index 00000000..d8ed9bd7
--- /dev/null
+++ b/apps/tests/TestRPL/UDPTest/TestRPLAppC.nc
@@ -0,0 +1,78 @@
+// $Id: RadioCountToLedsAppC.nc,v 1.4 2006/12/12 18:22:48 vlahan Exp $
+
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "TestRPL.h"
+
+/**
+ * Configuration for the RadioCountToLeds application. RadioCountToLeds 
+ * maintains a 4Hz counter, broadcasting its value in an AM packet 
+ * every time it gets updated. A RadioCountToLeds node that hears a counter 
+ * displays the bottom three bits on its LEDs. This application is a useful 
+ * test to show that basic AM communication and timers work.
+ *
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+configuration TestRPLAppC {}
+implementation {
+  components MainC, TestRPLC as App, LedsC;
+  components new TimerMilliC();
+  components new TimerMilliC() as Timer;
+  components RandomC;
+  components RPLRankC;
+  components RPLRoutingEngineC;
+  components IPDispatchC;
+  //components RPLForwardingEngineC;
+  components RPLDAORoutingEngineC;
+  components IPStackC;
+  components IPProtocolsP;
+
+  App.Boot -> MainC.Boot;  
+  App.SplitControl -> IPStackC;//IPDispatchC;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  App.RPLRoute -> RPLRoutingEngineC;
+  App.RootControl -> RPLRoutingEngineC;
+  App.RoutingControl -> RPLRoutingEngineC;
+
+  components new UdpSocketC() as RPLUDP;
+  App.RPLUDP -> RPLUDP;
+
+  App.RPLDAO -> RPLDAORoutingEngineC;
+  App.Timer -> Timer;
+  App.Random -> RandomC;
+
+#ifdef RPL_ROUTING
+  components RPLRoutingC;
+#endif
+
+}
diff --git a/apps/tests/TestRPL/UDPTest/TestRPLC.nc b/apps/tests/TestRPL/UDPTest/TestRPLC.nc
new file mode 100644
index 00000000..4dfee6bf
--- /dev/null
+++ b/apps/tests/TestRPL/UDPTest/TestRPLC.nc
@@ -0,0 +1,151 @@
+// $Id: RadioCountToLedsC.nc,v 1.6 2008/06/24 05:32:31 regehr Exp $
+
+/*									tab:4
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "Timer.h"
+#include "TestRPL.h"
+//#include "ip.h"
+#include <PrintfUART.h>
+/**
+ * Implementation of the RadioCountToLeds application. RadioCountToLeds 
+ * maintains a 4Hz counter, broadcasting its value in an AM packet 
+ * every time it gets updated. A RadioCountToLeds node that hears a counter 
+ * displays the bottom three bits on its LEDs. This application is a useful 
+ * test to show that basic AM communication and timers work.
+ *
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+module TestRPLC @safe() {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Timer<TMilli> as MilliTimer;
+    interface Timer<TMilli> as Timer;
+    interface RPLRoutingEngine as RPLRoute;
+    interface RootControl;
+    interface StdControl as RoutingControl;
+    interface SplitControl;
+    //interface IP as RPL;
+    interface UDP as RPLUDP;
+    //interface RPLForwardingEngine;
+    interface RPLDAORoutingEngine as RPLDAO;
+    interface Random;
+  }
+}
+implementation {
+
+#ifndef RPL_ROOT_ADDR
+#define RPL_ROOT_ADDR 1
+#endif
+
+  //uint8_t payload[10];
+  //struct in6_addr dest;
+  struct in6_addr MULTICAST_ADDR;
+
+  bool locked;
+  uint16_t counter = 0;
+  
+  event void Boot.booted() {
+
+    memset(MULTICAST_ADDR.s6_addr, 0, 16);
+    MULTICAST_ADDR.s6_addr[0] = 0xFF;
+    MULTICAST_ADDR.s6_addr[1] = 0x2;
+    MULTICAST_ADDR.s6_addr[15] = 0x1A;
+
+    if(TOS_NODE_ID == RPL_ROOT_ADDR){
+      call RootControl.setRoot();
+    }
+    call RoutingControl.start();
+    //call RoutingControl.start();
+    call SplitControl.start();
+
+    call RPLUDP.bind(10210);
+  }
+
+  uint32_t countrx = 0;
+  uint32_t counttx = 0;
+
+  event void RPLUDP.recvfrom(struct sockaddr_in6 *from, void *payload, uint16_t len, struct ip6_metadata *meta){
+
+    uint16_t temp[10];
+    memcpy(temp, (uint8_t*)payload, len);
+    call Leds.led2Toggle();
+
+    printfUART(">>>> RX %d %d %d %lu \n", TOS_NODE_ID, temp[0], temp[9], ++countrx);
+
+  }
+  
+  event void SplitControl.startDone(error_t err){
+    while( call RPLDAO.startDAO() != SUCCESS );
+    
+    if(TOS_NODE_ID != RPL_ROOT_ADDR)
+      call Timer.startOneShot((call Random.rand16()%2)*1024U);
+  }
+
+  event void Timer.fired(){
+    call MilliTimer.startOneShot(PACKET_INTERVAL + call Random.rand16() % 10);
+  }
+
+  task void sendTask(){
+    struct sockaddr_in6 dest;
+
+    uint16_t temp[10];
+    uint8_t i;
+
+    for(i=0;i<10;i++){
+      temp[i] = i;
+    }
+
+    temp[0] = TOS_NODE_ID;
+    temp[9] = counttx;
+
+    memcpy(dest.sin6_addr.s6_addr, call RPLRoute.getDodagId(), sizeof(struct in6_addr));
+
+    if(dest.sin6_addr.s6_addr[15] != 0) // destination is set as root!
+      ++counttx;
+
+    dest.sin6_port = htons(10210);
+
+    printfUART("Generate Packet at %d \n", TOS_NODE_ID);
+    call Leds.led0Toggle();
+    call RPLUDP.sendto(&dest, temp, 20);
+  }
+
+  event void MilliTimer.fired(){
+    //call Leds.led1Toggle();
+    call MilliTimer.startOneShot(PACKET_INTERVAL + call Random.rand16() % 10);
+    post sendTask();
+  }
+
+  event void SplitControl.stopDone(error_t err){}
+
+}
diff --git a/apps/tests/TestScheduler/Makefile b/apps/tests/TestScheduler/Makefile
new file mode 100644
index 00000000..86979195
--- /dev/null
+++ b/apps/tests/TestScheduler/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestSchedulerAppC
+OPTFLAGS = -O0
+include $(MAKERULES)
+
diff --git a/apps/tests/TestScheduler/README.txt b/apps/tests/TestScheduler/README.txt
new file mode 100644
index 00000000..aa81a364
--- /dev/null
+++ b/apps/tests/TestScheduler/README.txt
@@ -0,0 +1,23 @@
+$Id: README.txt,v 1.4 2006-12-12 18:22:50 vlahan Exp $
+
+README for Null
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+TestScheduler is a simple test application for a Scheduler's implementation
+of the TaskBasic interface. The application has three tasks, each of
+which toggles a different LED after a brief spin loop.
+
+This application has little (if any) use to a TinyOS user; it is intended
+to be a basic sanity test for schedulers.
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None
+
+
diff --git a/apps/tests/TestScheduler/TestSchedulerAppC.nc b/apps/tests/TestScheduler/TestSchedulerAppC.nc
new file mode 100644
index 00000000..a9b93190
--- /dev/null
+++ b/apps/tests/TestScheduler/TestSchedulerAppC.nc
@@ -0,0 +1,68 @@
+// $Id: TestSchedulerAppC.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $
+
+/*	
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * TestScheduler is a simple scheduler test that posts three CPU
+ * intensive tasks of different durations. It is not intended to be
+ * of great use to TinyOS programmers; rather, it is a sanity check
+ * for schedulers. For details and information on how to
+ * replace the scheduler, refer to TEP 106.
+ *
+ * @author Philip Levis
+ * @date Aug 10 2005
+ * @see TEP 106: Tasks and Schedulers
+ */
+
+configuration TestSchedulerAppC {}
+implementation {
+  components MainC, TestSchedulerC, LedsC, TinySchedulerC;
+  
+  
+  TestSchedulerC -> MainC.Boot;
+
+  TestSchedulerC.Leds -> LedsC;
+
+  TestSchedulerC.TaskRed -> TinySchedulerC.TaskBasic[unique("TinySchedulerC.TaskBasic")];
+  TestSchedulerC.TaskGreen -> TinySchedulerC.TaskBasic[unique("TinySchedulerC.TaskBasic")];
+  TestSchedulerC.TaskBlue -> TinySchedulerC.TaskBasic[unique("TinySchedulerC.TaskBasic")];
+}
+
diff --git a/apps/tests/TestScheduler/TestSchedulerC.nc b/apps/tests/TestScheduler/TestSchedulerC.nc
new file mode 100644
index 00000000..3242f0c2
--- /dev/null
+++ b/apps/tests/TestScheduler/TestSchedulerC.nc
@@ -0,0 +1,119 @@
+// $Id: TestSchedulerC.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * TestScheduler is a simple scheduler test that posts three CPU
+ * intensive tasks of different durations. It is not intended to be
+ * of great use to TinyOS programmers; rather, it is a sanity check
+ * for schedulers. For details and information on how to
+ * replace the scheduler, refer to TEP 106.
+ *
+ * @author Philip Levis
+ * @date Aug 10 2005
+ * @see TEP 106: Tasks and Schedulers
+ */
+
+#include "Timer.h"
+
+module TestSchedulerC {
+  uses interface Leds;
+  uses interface Boot;
+  uses interface TaskBasic as TaskRed;
+  uses interface TaskBasic as TaskGreen;
+  uses interface TaskBasic as TaskBlue;
+}
+implementation {
+
+  event void TaskRed.runTask() {
+    uint16_t i, j;
+    for (i= 0; i < 50; i++) {
+      for (j = 0; j < 10000; j++) {}
+    }
+    call Leds.led0Toggle();
+
+    if (call TaskRed.postTask() == FAIL) {
+      call Leds.led0Off();
+    }
+    else {
+      call TaskRed.postTask();
+    }
+  }
+
+  event void TaskGreen.runTask() {
+    uint16_t i, j;
+    for (i= 0; i < 25; i++) {
+      for (j = 0; j < 10000; j++) {}
+    }
+    call Leds.led1Toggle();
+
+    if (call TaskGreen.postTask() == FAIL) {
+      call Leds.led1Off();
+    }
+  }
+
+  event void TaskBlue.runTask() {
+    uint16_t i, j;
+    for (i= 0; i < 5; i++) {
+      for (j = 0; j < 10000; j++) {}
+    }
+    call Leds.led2Toggle();
+
+    if (call TaskBlue.postTask() == FAIL) {
+      call Leds.led2Off();
+    }
+  }
+
+  
+  
+  /**
+   * Event from Main that TinyOS has booted: start the timer at 1Hz.
+   */
+  event void Boot.booted() {
+    call Leds.led2Toggle();
+    call TaskRed.postTask();
+    call TaskGreen.postTask();
+    call TaskBlue.postTask();
+  }
+
+}
+
+
diff --git a/apps/tests/TestSerial/.cvsignore b/apps/tests/TestSerial/.cvsignore
new file mode 100644
index 00000000..5abf7886
--- /dev/null
+++ b/apps/tests/TestSerial/.cvsignore
@@ -0,0 +1,4 @@
+TestSerialMsg.java
+TestSerialMsg.class
+TestSerial.class
+build
diff --git a/apps/tests/TestSerial/Makefile b/apps/tests/TestSerial/Makefile
new file mode 100644
index 00000000..daf594a9
--- /dev/null
+++ b/apps/tests/TestSerial/Makefile
@@ -0,0 +1,15 @@
+COMPONENT=TestSerialAppC
+BUILD_EXTRA_DEPS += TestSerial.class
+CLEAN_EXTRA = *.class TestSerialMsg.java
+
+CFLAGS += -I$(TOSDIR)/lib/T2Hack
+
+TestSerial.class: $(wildcard *.java) TestSerialMsg.java
+	javac -target 1.4 -source 1.4 *.java
+
+TestSerialMsg.java:
+	mig java -target=null $(CFLAGS) -java-classname=TestSerialMsg TestSerial.h test_serial_msg -o $@
+
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestSerial/README.txt b/apps/tests/TestSerial/README.txt
new file mode 100644
index 00000000..1a8e56d5
--- /dev/null
+++ b/apps/tests/TestSerial/README.txt
@@ -0,0 +1,30 @@
+README for TestSerial
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+TestSerial is a simple application that may be used to test that the
+TinyOS java toolchain can communicate with a mote over the serial
+port. The java application sends packets to the serial port at 1Hz:
+the packet contains an incrementing counter. When the mote application
+receives a counter packet, it displays the bottom three bits on its
+LEDs. (This application is similar to RadioCountToLeds, except that it
+operates over the serial port.) Likewise, the mote also sends packets
+to the serial port at 1Hz. Upon reception of a packet, the java
+application prints the counter's value to standard out.
+
+Java Application Usage:
+  java TestSerial [-comm <packetsource>]
+
+  If not specified, the <packetsource> defaults to sf@localhost:9002 or
+  to your MOTECOM environment variable (if defined).
+
+Python Usage:
+  tos-dump /dev/ttyUSB0 57600
+
+Tools:
+
+Known bugs/limitations:
+
+None.
+
diff --git a/apps/tests/TestSerial/TestSerial.h b/apps/tests/TestSerial/TestSerial.h
new file mode 100644
index 00000000..49002603
--- /dev/null
+++ b/apps/tests/TestSerial/TestSerial.h
@@ -0,0 +1,13 @@
+
+#ifndef TEST_SERIAL_H
+#define TEST_SERIAL_H
+
+typedef nx_struct test_serial_msg {
+  nx_uint16_t counter;
+} test_serial_msg_t;
+
+enum {
+  AM_TEST_SERIAL_MSG = 0x89,
+};
+
+#endif
diff --git a/apps/tests/TestSerial/TestSerial.java b/apps/tests/TestSerial/TestSerial.java
new file mode 100644
index 00000000..238bb013
--- /dev/null
+++ b/apps/tests/TestSerial/TestSerial.java
@@ -0,0 +1,115 @@
+/*									tab:4
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Java-side application for testing serial port communication.
+ * 
+ *
+ * @author Phil Levis <pal@cs.berkeley.edu>
+ * @date August 12 2005
+ */
+
+import java.io.IOException;
+
+import net.tinyos.message.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+public class TestSerial implements MessageListener {
+
+  private MoteIF moteIF;
+  
+  public TestSerial(MoteIF moteIF) {
+    this.moteIF = moteIF;
+    this.moteIF.registerListener(new TestSerialMsg(), this);
+  }
+
+  public void sendPackets() {
+    int counter = 0;
+    TestSerialMsg payload = new TestSerialMsg();
+    
+    try {
+      while (true) {
+	System.out.println("Sending packet " + counter);
+	payload.set_counter(counter);
+	moteIF.send(0, payload);
+	counter++;
+	try {Thread.sleep(1000);}
+	catch (InterruptedException exception) {}
+      }
+    }
+    catch (IOException exception) {
+      System.err.println("Exception thrown when sending packets. Exiting.");
+      System.err.println(exception);
+    }
+  }
+
+  public void messageReceived(int to, Message message) {
+    TestSerialMsg msg = (TestSerialMsg)message;
+    System.out.println("Received packet sequence number " + msg.get_counter());
+  }
+  
+  private static void usage() {
+    System.err.println("usage: TestSerial [-comm <source>]");
+  }
+  
+  public static void main(String[] args) throws Exception {
+    String source = null;
+    if (args.length == 2) {
+      if (!args[0].equals("-comm")) {
+	usage();
+	System.exit(1);
+      }
+      source = args[1];
+    }
+    else if (args.length != 0) {
+      usage();
+      System.exit(1);
+    }
+    
+    PhoenixSource phoenix;
+    
+    if (source == null) {
+      phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err);
+    }
+    else {
+      phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err);
+    }
+
+    MoteIF mif = new MoteIF(phoenix);
+    TestSerial serial = new TestSerial(mif);
+    serial.sendPackets();
+  }
+
+
+}
diff --git a/apps/tests/TestSerial/TestSerialAppC.nc b/apps/tests/TestSerial/TestSerialAppC.nc
new file mode 100644
index 00000000..3287055f
--- /dev/null
+++ b/apps/tests/TestSerial/TestSerialAppC.nc
@@ -0,0 +1,78 @@
+// $Id: TestSerialAppC.nc,v 1.6 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Application to test that the TinyOS java toolchain can communicate
+ * with motes over the serial port. The application sends packets to
+ * the serial port at 1Hz: the packet contains an incrementing
+ * counter. When the application receives a counter packet, it
+ * displays the bottom three bits on its LEDs. This application is
+ * very similar to RadioCountToLeds, except that it operates over the
+ * serial port. There is Java application for testing the mote
+ * application: run TestSerial to print out the received packets and
+ * send packets to the mote.
+ *
+ *  @author Gilman Tolle
+ *  @author Philip Levis
+ *  
+ *  @date   Aug 12 2005
+ *
+ **/
+
+#include "TestSerial.h"
+
+configuration TestSerialAppC {}
+implementation {
+  components TestSerialC as App, LedsC, MainC;
+  components SerialActiveMessageC as AM;
+  components new TimerMilliC();
+
+  App.Boot -> MainC.Boot;
+  App.Control -> AM;
+  App.Receive -> AM.Receive[AM_TEST_SERIAL_MSG];
+  App.AMSend -> AM.AMSend[AM_TEST_SERIAL_MSG];
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  App.Packet -> AM;
+}
+
+
diff --git a/apps/tests/TestSerial/TestSerialC.nc b/apps/tests/TestSerial/TestSerialC.nc
new file mode 100644
index 00000000..52d8e2b0
--- /dev/null
+++ b/apps/tests/TestSerial/TestSerialC.nc
@@ -0,0 +1,141 @@
+// $Id: TestSerialC.nc,v 1.7 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Application to test that the TinyOS java toolchain can communicate
+ * with motes over the serial port. 
+ *
+ *  @author Gilman Tolle
+ *  @author Philip Levis
+ *  
+ *  @date   Aug 12 2005
+ *
+ **/
+
+#include "Timer.h"
+#include "TestSerial.h"
+
+module TestSerialC {
+  uses {
+    interface SplitControl as Control;
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface Packet;
+  }
+}
+implementation {
+
+  message_t packet;
+
+  bool locked = FALSE;
+  uint16_t counter = 0;
+  
+  event void Boot.booted() {
+    call Control.start();
+  }
+  
+  event void MilliTimer.fired() {
+    counter++;
+    if (locked) {
+      return;
+    }
+    else {
+      test_serial_msg_t* rcm = (test_serial_msg_t*)call Packet.getPayload(&packet, sizeof(test_serial_msg_t));
+      if (rcm == NULL) {return;}
+      if (call Packet.maxPayloadLength() < sizeof(test_serial_msg_t)) {
+	return;
+      }
+
+      rcm->counter = counter;
+      if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(test_serial_msg_t)) == SUCCESS) {
+	locked = TRUE;
+      }
+    }
+  }
+
+  event message_t* Receive.receive(message_t* bufPtr, 
+				   void* payload, uint8_t len) {
+    if (len != sizeof(test_serial_msg_t)) {return bufPtr;}
+    else {
+      test_serial_msg_t* rcm = (test_serial_msg_t*)payload;
+      if (rcm->counter & 0x1) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if (rcm->counter & 0x2) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if (rcm->counter & 0x4) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led2Off();
+      }
+      return bufPtr;
+    }
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr) {
+      locked = FALSE;
+    }
+  }
+
+  event void Control.startDone(error_t err) {
+    if (err == SUCCESS) {
+      call MilliTimer.startPeriodic(1000);
+    }
+  }
+  event void Control.stopDone(error_t err) {}
+}
+
+
+
+
diff --git a/apps/tests/TestSerialBandwidth/Makefile b/apps/tests/TestSerialBandwidth/Makefile
new file mode 100644
index 00000000..c7603bf0
--- /dev/null
+++ b/apps/tests/TestSerialBandwidth/Makefile
@@ -0,0 +1,13 @@
+COMPONENT=TestSerialAppC
+BUILD_EXTRA_DEPS += TestSerialMsg.class TestSerial.class
+CFLAGS += -DTOSH_DATA_LENGTH=100
+CLEAN_EXTRA = *.class TestSerialMsg.java
+
+%.class: %.java
+	javac $<
+
+TestSerialMsg.java:
+	mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=TestSerialMsg TestSerial.h TestSerialMsg -o $@
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestSerialBandwidth/TestSerial.h b/apps/tests/TestSerialBandwidth/TestSerial.h
new file mode 100644
index 00000000..c5f26e28
--- /dev/null
+++ b/apps/tests/TestSerialBandwidth/TestSerial.h
@@ -0,0 +1,11 @@
+#ifndef TEST_SERIAL_H
+#define TEST_SERIAL_H
+typedef nx_struct TestSerialMsg {
+  nx_uint16_t counter;
+  nx_uint8_t x[TOSH_DATA_LENGTH-sizeof(nx_uint16_t)];
+} TestSerialMsg;
+
+enum {
+  AM_TESTSERIALMSG = 9,
+};
+#endif
diff --git a/apps/tests/TestSerialBandwidth/TestSerial.java b/apps/tests/TestSerialBandwidth/TestSerial.java
new file mode 100644
index 00000000..08600aaa
--- /dev/null
+++ b/apps/tests/TestSerialBandwidth/TestSerial.java
@@ -0,0 +1,116 @@
+/*									tab:4
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Java-side application for testing serial port communication.
+ * 
+ *
+ * @author Phil Levis <pal@cs.berkeley.edu>
+ * @date August 12 2005
+ */
+
+import java.io.IOException;
+
+import net.tinyos.message.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+public class TestSerial implements MessageListener {
+
+  private MoteIF moteIF;
+  
+  public TestSerial(MoteIF moteIF) {
+    this.moteIF = moteIF;
+    this.moteIF.registerListener(new TestSerialMsg(), this);
+  }
+
+  public void sendPackets() {
+    int counter = 0;
+    TestSerialMsg payload = new TestSerialMsg();
+    
+    try {
+      while (true) {
+	System.out.println("Sending packet " + counter);
+	payload.set_counter(counter);
+	moteIF.send(0, payload);
+	counter++;
+	try {Thread.sleep(1000);}
+	catch (InterruptedException exception) {}
+      }
+    }
+    catch (IOException exception) {
+      System.err.println("Exception thrown when sending packets. Exiting.");
+      System.err.println(exception);
+    }
+  }
+
+  public void messageReceived(int to, Message message) {
+    TestSerialMsg msg = (TestSerialMsg)message;
+    System.out.println("Received packet sequence number " + msg.get_counter());
+  }
+  
+  private static void usage() {
+    System.err.println("usage: TestSerial [-comm <source>]");
+  }
+  
+  public static void main(String[] args) throws Exception {
+    String source = null;
+    System.out.println("hello");
+    if (args.length == 2) {
+      if (!args[0].equals("-comm")) {
+	usage();
+	System.exit(1);
+      }
+      source = args[1];
+    }
+    else if (args.length != 0) {
+      usage();
+      System.exit(1);
+    }
+    
+    PhoenixSource phoenix;
+    
+    if (source == null) {
+      phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err);
+    }
+    else {
+      phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err);
+    }
+
+    System.out.println("goodbye");
+    MoteIF mif = new MoteIF(phoenix);
+    TestSerial serial = new TestSerial(mif);
+    serial.sendPackets();
+  }
+
+
+}
diff --git a/apps/tests/TestSerialBandwidth/TestSerialAppC.nc b/apps/tests/TestSerialBandwidth/TestSerialAppC.nc
new file mode 100644
index 00000000..bb355cc5
--- /dev/null
+++ b/apps/tests/TestSerialBandwidth/TestSerialAppC.nc
@@ -0,0 +1,78 @@
+// $Id: TestSerialAppC.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Application to test that the TinyOS java toolchain can communicate
+ * with motes over the serial port. The application sends packets to
+ * the serial port at 1Hz: the packet contains an incrementing
+ * counter. When the application receives a counter packet, it
+ * displays the bottom three bits on its LEDs. This application is
+ * very similar to RadioCountToLeds, except that it operates over the
+ * serial port. There is Java application for testing the mote
+ * application: run TestSerial to print out the received packets and
+ * send packets to the mote.
+ *
+ *  @author Gilman Tolle
+ *  @author Philip Levis
+ *  
+ *  @date   Aug 12 2005
+ *
+ **/
+
+#include "TestSerial.h"
+
+configuration TestSerialAppC {}
+implementation {
+  components TestSerialC as App, LedsC, MainC;
+  components SerialActiveMessageC as AM;
+  components new TimerMilliC();
+
+  App.Boot -> MainC.Boot;
+  App.Control -> AM;
+  App.Receive -> AM.Receive[AM_TESTSERIALMSG];
+  App.AMSend -> AM.AMSend[AM_TESTSERIALMSG];
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  App.Packet -> AM;
+}
+
+
diff --git a/apps/tests/TestSerialBandwidth/TestSerialC.nc b/apps/tests/TestSerialBandwidth/TestSerialC.nc
new file mode 100644
index 00000000..c8fd03b6
--- /dev/null
+++ b/apps/tests/TestSerialBandwidth/TestSerialC.nc
@@ -0,0 +1,174 @@
+// $Id: TestSerialC.nc,v 1.6 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Application to test that the TinyOS java toolchain can communicate
+ * with motes over the serial port. The application sends packets to
+ * the serial port at 1Hz: the packet contains an incrementing
+ * counter. When the application receives a counter packet, it
+ * displays the bottom three bits on its LEDs. This application is
+ * very similar to RadioCountToLeds, except that it operates over the
+ * serial port. There is Java application for testing the mote
+ * application: run TestSerial to print out the received packets and
+ * send packets to the mote.
+ *
+ *  @author Gilman Tolle
+ *  @author Philip Levis
+ *  
+ *  @date   Aug 12 2005
+ *
+ **/
+
+#include "Timer.h"
+#include "TestSerial.h"
+
+module TestSerialC {
+  uses {
+    interface SplitControl as Control;
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface Packet;
+  }
+}
+implementation {
+
+  message_t packet;
+
+  bool locked;
+  bool afap = TRUE;
+  uint32_t interval = 10;
+
+  uint16_t counter = 0;
+  
+  event void Boot.booted() {
+    call Control.start();
+  }
+  
+  event void MilliTimer.fired() {
+    counter++;
+    if (locked) {
+      if (afap) call MilliTimer.startPeriodic(interval);
+
+      return;
+    }
+    else {
+      TestSerialMsg* rcm = (TestSerialMsg*)call Packet.getPayload(&packet, sizeof(TestSerialMsg));
+      if (rcm == NULL || call Packet.maxPayloadLength() < sizeof(TestSerialMsg)) {
+	return;
+      }
+
+      rcm->counter = counter;
+      if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSerialMsg)) == SUCCESS) {
+	locked = TRUE;
+      }
+    }
+  }
+
+  event message_t* Receive.receive(message_t* bufPtr, 
+				   void* payload, uint8_t len) {
+
+    if (len != sizeof(TestSerialMsg)) {return bufPtr;}
+    else {
+      TestSerialMsg* rcm = (TestSerialMsg*)payload;
+      if (rcm->counter & 0x1) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if (rcm->counter & 0x2) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if (rcm->counter & 0x4) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led2Off();
+      }
+      return bufPtr;
+    }
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr) {
+      locked = FALSE;
+      // as fast as possible
+      if (afap){
+        TestSerialMsg* rcm = (TestSerialMsg*)call Packet.getPayload(&packet, sizeof(TestSerialMsg));
+	if (rcm == NULL || call Packet.payloadLength(&packet) != sizeof(TestSerialMsg)) {
+	  return;
+	}
+        counter++;
+        rcm->counter = counter;
+        call Leds.led0Toggle();
+        if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSerialMsg)) == SUCCESS) {
+          locked = TRUE;
+        }
+        else {
+          call MilliTimer.startOneShot(interval);
+        }
+      }
+    }  
+  }
+  
+  event void Control.startDone(error_t err) {
+    if (err == SUCCESS) {
+      if (afap){
+        call MilliTimer.startOneShot(interval);
+      }
+      else {
+        call MilliTimer.startPeriodic(interval);
+      }
+    }
+  }
+  event void Control.stopDone(error_t err) {}
+}
+
+
+
+
diff --git a/apps/tests/TestSimComm/Makefile b/apps/tests/TestSimComm/Makefile
new file mode 100644
index 00000000..aef48a82
--- /dev/null
+++ b/apps/tests/TestSimComm/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestCommAppC
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestSimComm/README b/apps/tests/TestSimComm/README
new file mode 100644
index 00000000..dda666e2
--- /dev/null
+++ b/apps/tests/TestSimComm/README
@@ -0,0 +1,63 @@
+TestSimComm, 5/22/07 
+
+This application tests the TOSSIM radio model by setting up a simple
+hidden terminal case. It checks whether packets collide correctly and
+whether SNR thresholds work correctly..
+
+The relevant output channel is "TestComm".
+
+There are three test cases:
+
+test-equal.py: Tests whether two nodes that are hidden terminals
+cause collisions. The two nodes have equal signal strengths, so a
+collision should corrupt both packets. If one packet is lost due to
+a collision, the other should be too. Note that packets can be 
+lost in the absence of collisions due to external interference.
+
+test-unequal.py: Tests whether two nodes that are hidden terminals
+cause collisions. The two nodes have signal strengths that differ
+by 10dB, and node 1 is stronger. This means that node 2 should hear
+node 1's packets if they start first, but not second. If a packet
+from node 1 is lost, the packet from node 3 should be as well. However,
+a loss from node 3 does not imply a loss from node 1, as it is
+stronger.
+
+test-asym.py: Tests whether asymmetric links can have high delivery
+rates but low acknowledgement rates. Checks that acknowledgements
+follow SNR curves properly. In this test, both 1 and 3 have high
+quality links (-60 dBm) to node 2, but the reverse links (2 to 1 and
+2 to 3) are much worse (-80 dBm). You should see packet deliveries
+like test-equal.py but few acknowledgements.
+
+The ./run script runs all the three tests and counts the number of
+ACKed and non-ACKed send packets. The output will look something
+like this:
+
+test-equal.log
+           ACK           NOACK   total
+         1 21197         19666   40863
+         3 21320         19543   40863
+test-asym.log
+           ACK           NOACK   total
+         1 4930          35923   40853
+         3 4983          35870   40853
+test-unequal.log
+           ACK           NOACK   total
+         1 27619         12966   40585
+         3 21040         19545   40585
+
+ACK is the number of acknowledged packets from that node to node 2;
+NOACK is the number of unacknowledged packets. Total is the sum.
+The output should show three things:
+
+  1) In test-equal, both node 1 and node 3 have very
+  similar delivery ratios, losing about half of their packets.
+
+  2) In test-asym, the number of ACKs is much less than in
+  test-equal because the reverse links are poor.
+
+  3) In test-unequal, node 1 has more acknowledged packets
+  than node 3, because it has a higher SNR link.
+
+Philip Levis
+
diff --git a/apps/tests/TestSimComm/TestCommAppC.nc b/apps/tests/TestSimComm/TestCommAppC.nc
new file mode 100644
index 00000000..a6370683
--- /dev/null
+++ b/apps/tests/TestSimComm/TestCommAppC.nc
@@ -0,0 +1,80 @@
+// $Id: TestCommAppC.nc,v 1.4 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * This application sends a single active message broadcast if it has
+ * address 0, and then starts a timer at 1Hz.  If it has any address 
+ * other than 0, it starts a timer at 1 Hz upon receiving a broadcast 
+ * message.  The idea is to have one base station with address 0 send 
+ * out a broadacst message to synchronize itself with all receivers.  
+ * All Leds from the base station and any receivers of the broadcast 
+ * should blink together.
+ 
+ * It uses the radio HIL component
+ * <tt>ActiveMessageC</tt>, and its packets are AM type 240.
+ *
+ * @author Phil Levis
+ * @author Kevin Klues
+ * @date   Nov 7 2005
+ */
+
+configuration TestCommAppC {}
+implementation {
+  enum {
+    AM_TEST  = 133
+  };
+  
+  components MainC, TestCommC as App, RandomC, ActiveMessageC, TossimActiveMessageC;
+  components new TimerMilliC(), new AMSenderC(AM_TEST), new AMReceiverC(AM_TEST);
+  
+  App.Boot -> MainC.Boot;
+  App.SplitControl -> ActiveMessageC;
+  App.Timer -> TimerMilliC;
+  App.AMSend -> AMSenderC;
+  App.Receive -> AMReceiverC;
+  App.Random -> RandomC;
+  App.AMPacket -> AMSenderC;
+  App.PacketAcknowledgements -> AMSenderC;
+  App.TossimPacket -> TossimActiveMessageC;
+}
+
+
diff --git a/apps/tests/TestSimComm/TestCommC.nc b/apps/tests/TestSimComm/TestCommC.nc
new file mode 100644
index 00000000..ebf70649
--- /dev/null
+++ b/apps/tests/TestSimComm/TestCommC.nc
@@ -0,0 +1,115 @@
+// $Id: TestCommC.nc,v 1.4 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *  Implementation of the TestTimer application.
+ *
+ *  @author Phil Levis
+ *  @date   April 7 2007
+ *
+ **/
+
+module TestCommC {
+  uses {
+    interface Boot;
+    interface Timer<TMilli> as Timer;
+    interface Receive;
+    interface AMSend;
+    interface Random;
+    interface SplitControl;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface TossimPacket;
+  }
+}
+implementation {
+
+  message_t packet;
+  uint8_t busy;
+  
+  event void Boot.booted() {
+    dbg("TestComm", "Booted @ %s.\n", sim_time_string());
+    call SplitControl.start();
+  }
+
+  event void SplitControl.startDone(error_t e) {
+    if (TOS_NODE_ID == 1 ||
+	TOS_NODE_ID == 3) {
+      call Timer.startPeriodic(128);
+    }
+  }
+  
+  event void SplitControl.stopDone(error_t e) {
+
+  }
+    
+  event void Timer.fired() {
+    if (!busy) {
+      call PacketAcknowledgements.requestAck(&packet);
+      if (call AMSend.send(2, &packet, call AMSend.maxPayloadLength()) == SUCCESS) {
+	dbg("TestComm", "Send succeeded @ %s\n", sim_time_string());
+	busy = TRUE;
+      }
+      else {
+	dbg("TestComm", "Send failed at @ %s\n", sim_time_string());
+      }
+    }
+    else {
+      dbg("TestComm", "Send when busy at @ %s\n", sim_time_string());
+    }
+  }
+
+  event void AMSend.sendDone(message_t* m, error_t s) {
+    dbg("TestComm", "Send completed with %s @ %s\n", call PacketAcknowledgements.wasAcked(m)? "ACK":"NOACK", sim_time_string());
+    busy = FALSE;
+  }
+
+
+  event message_t* Receive.receive(message_t* msg, void* p, uint8_t l) {
+    dbg("TestComm", "Received message from %hu @ %s with strength %hhi\n", call AMPacket.source(msg), sim_time_string(), call TossimPacket.strength(msg));
+    return msg;
+  }
+}
+
+
+
+
diff --git a/apps/tests/TestSimComm/meyer-short.txt b/apps/tests/TestSimComm/meyer-short.txt
new file mode 100644
index 00000000..556ac0f8
--- /dev/null
+++ b/apps/tests/TestSimComm/meyer-short.txt
@@ -0,0 +1,1000 @@
+-41
+-41
+-41
+-41
+-41
+-41
+-41
+-91
+-41
+-41
+-41
+-41
+-41
+-48
+-41
+-41
+-41
+-83
+-98
+-80
+-80
+-79
+-79
+-79
+-79
+-98
+-79
+-80
+-79
+-80
+-80
+-80
+-83
+-83
+-83
+-83
+-82
+-82
+-41
+-82
+-82
+-82
+-82
+-82
+-82
+-41
+-94
+-93
+-93
+-87
+-89
+-90
+-45
+-92
+-85
+-98
+-80
+-80
+-79
+-78
+-79
+-79
+-79
+-97
+-94
+-83
+-81
+-80
+-82
+-81
+-81
+-84
+-84
+-86
+-98
+-89
+-79
+-79
+-79
+-79
+-79
+-79
+-57
+-79
+-79
+-79
+-79
+-79
+-79
+-79
+-41
+-84
+-96
+-97
+-79
+-90
+-98
+-79
+-79
+-79
+-79
+-79
+-79
+-92
+-83
+-83
+-82
+-81
+-83
+-80
+-85
+-82
+-81
+-82
+-82
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+
+
diff --git a/apps/tests/TestSimComm/run b/apps/tests/TestSimComm/run
new file mode 100755
index 00000000..7cd6667b
--- /dev/null
+++ b/apps/tests/TestSimComm/run
@@ -0,0 +1,24 @@
+#!/bin/bash
+
+make micaz sim
+
+for t in test-equal.py test-asym.py test-unequal.py
+do
+ echo Running $t...
+ python $t > `basename $t .py`.log
+done
+
+make clean
+
+for l in test-equal.log test-asym.log test-unequal.log
+do
+    echo $l
+    echo -e '\t   ACK \t\t NOACK \t total'
+    for i in 1 3
+    do
+	N1=`grep 'Send completed' $l | grep ' ACK' | grep "($i)" | wc -l`
+	N2=`grep 'Send completed' $l | grep 'NOACK' | grep "($i)" | wc -l`
+	echo -e "\t $i $N1 \t $N2 \t" `expr $N1 + $N2`
+    done
+done
+
diff --git a/apps/tests/TestSimComm/test-asym.py b/apps/tests/TestSimComm/test-asym.py
new file mode 100644
index 00000000..31d87990
--- /dev/null
+++ b/apps/tests/TestSimComm/test-asym.py
@@ -0,0 +1,49 @@
+from TOSSIM import *
+import sys
+import time
+
+t = Tossim([])
+r = t.radio();
+
+t.addChannel("TestComm", sys.stdout)
+t.addChannel("SNRLoss", sys.stdout)
+
+#t.addChannel("Acks", sys.stdout)
+#t.addChannel("Gain", sys.stdout)
+#t.addChannel("CpmModelC", sys.stdout)
+#t.addChannel("AM", sys.stdout)
+
+
+start = time.time();
+m1 = t.getNode(1)
+m2 = t.getNode(2)
+m3 = t.getNode(3)
+
+# Set up a hidden terminal problem, where 1 and 3
+# are closely synchronized, but cannot hear each other.
+m1.bootAtTime(345321);
+m2.bootAtTime(82123411);
+m3.bootAtTime(345325);
+r.add(1, 2, -60.0);
+r.add(2, 1, -80.0);
+r.add(3, 2, -60.0);
+r.add(2, 3, -80.0);
+
+noise = open("meyer-short.txt", "r")
+lines = noise.readlines()
+for line in lines:
+  str = line.strip()
+  if (str != ""):
+    val = int(str)
+    m1.addNoiseTraceReading(val)
+    m2.addNoiseTraceReading(val)
+    m3.addNoiseTraceReading(val)
+
+m1.createNoiseModel()
+m2.createNoiseModel()
+m3.createNoiseModel()
+
+for i in range(0, 200000):
+    t.runNextEvent();
+
+    
diff --git a/apps/tests/TestSimComm/test-equal.py b/apps/tests/TestSimComm/test-equal.py
new file mode 100644
index 00000000..bd7e84c8
--- /dev/null
+++ b/apps/tests/TestSimComm/test-equal.py
@@ -0,0 +1,49 @@
+from TOSSIM import *
+import sys
+import time
+
+t = Tossim([])
+r = t.radio();
+
+t.addChannel("TestComm", sys.stdout)
+t.addChannel("SNRLoss", sys.stdout)
+
+#t.addChannel("Acks", sys.stdout)
+#t.addChannel("Gain", sys.stdout)
+#t.addChannel("CpmModelC", sys.stdout)
+#t.addChannel("AM", sys.stdout)
+
+
+start = time.time();
+m1 = t.getNode(1)
+m2 = t.getNode(2)
+m3 = t.getNode(3)
+
+# Set up a hidden terminal problem, where 1 and 3
+# are closely synchronized, but cannot hear each other.
+m1.bootAtTime(345321);
+m2.bootAtTime(82123411);
+m3.bootAtTime(345325);
+r.add(1, 2, -60.0);
+r.add(2, 1, -60.0);
+r.add(2, 3, -60.0);
+r.add(3, 2, -60.0);
+
+noise = open("meyer-short.txt", "r")
+lines = noise.readlines()
+for line in lines:
+  str = line.strip()
+  if (str != ""):
+    val = int(str)
+    m1.addNoiseTraceReading(val)
+    m2.addNoiseTraceReading(val)
+    m3.addNoiseTraceReading(val)
+
+m1.createNoiseModel()
+m2.createNoiseModel()
+m3.createNoiseModel()
+
+for i in range(0, 200000):
+    t.runNextEvent();
+
+    
diff --git a/apps/tests/TestSimComm/test-unequal.py b/apps/tests/TestSimComm/test-unequal.py
new file mode 100644
index 00000000..a5bcc1e8
--- /dev/null
+++ b/apps/tests/TestSimComm/test-unequal.py
@@ -0,0 +1,48 @@
+from TOSSIM import *
+import sys
+import time
+
+t = Tossim([])
+r = t.radio();
+
+t.addChannel("TestComm", sys.stdout)
+t.addChannel("SNRLoss", sys.stdout)
+#t.addChannel("Acks", sys.stdout)
+#t.addChannel("Gain", sys.stdout)
+#t.addChannel("CpmModelC", sys.stdout)
+#t.addChannel("AM", sys.stdout)
+
+
+start = time.time();
+m1 = t.getNode(1)
+m2 = t.getNode(2)
+m3 = t.getNode(3)
+
+# Set up a hidden terminal problem, where 1 and 3
+# are closely synchronized, but cannot hear each other.
+m1.bootAtTime(345321);
+m2.bootAtTime(82123411);
+m3.bootAtTime(345325);
+r.add(1, 2, -50.0);
+r.add(2, 1, -50.0);
+r.add(2, 3, -60.0);
+r.add(3, 2, -60.0);
+
+noise = open("meyer-short.txt", "r")
+lines = noise.readlines()
+for line in lines:
+  str = line.strip()
+  if (str != ""):
+    val = int(str)
+    m1.addNoiseTraceReading(val)
+    m2.addNoiseTraceReading(val)
+    m3.addNoiseTraceReading(val)
+
+m1.createNoiseModel()
+m2.createNoiseModel()
+m3.createNoiseModel()
+
+for i in range(0, 200000):
+    t.runNextEvent();
+
+    
diff --git a/apps/tests/TestSimTimers/Makefile b/apps/tests/TestSimTimers/Makefile
new file mode 100644
index 00000000..84b6100e
--- /dev/null
+++ b/apps/tests/TestSimTimers/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestTimerAppC
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestSimTimers/README b/apps/tests/TestSimTimers/README
new file mode 100644
index 00000000..65f8f369
--- /dev/null
+++ b/apps/tests/TestSimTimers/README
@@ -0,0 +1,41 @@
+README for TestTimer, 4/9/07 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+This application tests TinyOS millisecond timers (TimerMilliC). It is
+intended for use with TOSSIM, to test whether the timer implementation
+is working correctly: its output consists of TOSSIM dbg() statements.
+The relevant output channel is "TestTimer".
+
+To test this application, compile for TOSSIM ('make micaz sim') and run
+script.py ('python script.py'). If the TOSSIM timers are operating
+correctly, then the output should say that timers are good, e.g.:
+
+DEBUG (0): Timer A is good @ 0:9:56.837925167.
+DEBUG (0): Timer B is good @ 0:9:57.356479854.
+DEBUG (0): Timer A is good @ 0:9:57.837925167.
+DEBUG (0): Timer A is good @ 0:9:58.837925167.
+DEBUG (0): Timer B is good @ 0:9:59.648472042.
+DEBUG (0): Timer A is good @ 0:9:59.837925167.
+DEBUG (0): Timer A is good @ 0:10:0.837925167.
+DEBUG (0): Timer A is good @ 0:10:1.837925167.
+DEBUG (0): Timer A is good @ 0:10:2.837925167.
+DEBUG (0): Timer A is good @ 0:10:3.837925167.
+
+If a timer is off, then the output will read
+
+DEBUG (0): Timer A is off. Should have fired in X, fired in Y @ Z.
+
+Note that if a timer is off by 1, the timer is still operating
+correctly. The way the atm128 counter registers work mean that you
+can't schedule very short timers, so sometimes the code needs to
+make it one tick longer.
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
diff --git a/apps/tests/TestSimTimers/TestTimerAppC.nc b/apps/tests/TestSimTimers/TestTimerAppC.nc
new file mode 100644
index 00000000..49d5da5b
--- /dev/null
+++ b/apps/tests/TestSimTimers/TestTimerAppC.nc
@@ -0,0 +1,77 @@
+// $Id: TestTimerAppC.nc,v 1.2 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * This application sends a single active message broadcast if it has
+ * address 0, and then starts a timer at 1Hz.  If it has any address 
+ * other than 0, it starts a timer at 1 Hz upon receiving a broadcast 
+ * message.  The idea is to have one base station with address 0 send 
+ * out a broadacst message to synchronize itself with all receivers.  
+ * All Leds from the base station and any receivers of the broadcast 
+ * should blink together.
+ 
+ * It uses the radio HIL component
+ * <tt>ActiveMessageC</tt>, and its packets are AM type 240.
+ *
+ * @author Phil Levis
+ * @author Kevin Klues
+ * @date   Nov 7 2005
+ */
+
+configuration TestTimerAppC {}
+implementation {
+  components MainC, TestTimerC as App, RandomC;
+  components new TimerMilliC() as A;
+  components new TimerMilliC() as B;
+  components new TimerMilliC() as C;
+  components new TimerMilliC() as D;
+  
+  App.Boot -> MainC.Boot;
+  App.A -> A;
+  App.B -> B;
+  App.C -> C;
+  App.D -> D;
+  App.Random -> RandomC;
+  
+}
+
+
diff --git a/apps/tests/TestSimTimers/TestTimerC.nc b/apps/tests/TestSimTimers/TestTimerC.nc
new file mode 100644
index 00000000..7d806a9c
--- /dev/null
+++ b/apps/tests/TestSimTimers/TestTimerC.nc
@@ -0,0 +1,144 @@
+// $Id: TestTimerC.nc,v 1.4 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *  Implementation of the TestTimer application.
+ *
+ *  @author Phil Levis
+ *  @date   April 7 2007
+ *
+ **/
+
+module TestTimerC {
+  uses {
+    interface Boot;
+    interface Timer<TMilli> as A;
+    interface Timer<TMilli> as B;
+    interface Timer<TMilli> as C;
+    interface Timer<TMilli> as D;
+    interface Random;
+  }
+}
+implementation {
+
+  uint32_t aTime;
+  uint32_t bTime;
+  uint32_t cTime;
+  uint32_t dTime;
+
+  sim_time_t aStart;
+  sim_time_t bStart;
+  sim_time_t cStart;
+  sim_time_t dStart;
+
+  void check(char name, sim_time_t start, uint32_t interval) {
+    sim_time_t now = sim_time();
+    sim_time_t elapsed = now - start;
+    elapsed /= (sim_ticks_per_sec() / 1024);
+    if (elapsed != interval) {
+      dbg("TestTimer", "Timer %c is off. Should have fired in %u, fired in %u @ %s.\n", name, interval, (uint32_t)elapsed, sim_time_string());
+    }
+    else {
+      dbg("TestTimer", "Timer %c is good @ %s.\n", name, sim_time_string());
+    }
+  }
+  
+  void randomizeTimers() {
+    aTime = call Random.rand32() & 0x3ff;
+    bTime = call Random.rand32() & 0x3ff;
+    cTime = call Random.rand32() & 0x3ff;
+    dTime = call Random.rand32() & 0x3ff;
+  }
+
+  void startTimers() {
+    call A.startPeriodic(aTime);
+    call B.startPeriodic(bTime);
+//    call C.startOneShot(cTime);
+ //   call D.startOneShot(dTime);
+    aStart = bStart = cStart = dStart = sim_time();
+  }
+  
+  event void Boot.booted() {
+    randomizeTimers();
+    startTimers();
+  }
+
+  event void A.fired() {
+    check('A', aStart, aTime);
+    aStart = sim_time();
+    if (aTime & 0xff) {
+      call A.stop();
+      aTime = 1 + (call Random.rand32() & 0x3ff);
+      call A.startPeriodic(aTime);
+    }
+  }
+  
+  event void B.fired() {
+    check('B', bStart, bTime);
+    call B.stop();
+    bTime = 1 + (call Random.rand32() & 0x3fff);
+    call B.startPeriodic(bTime);
+    bStart = sim_time();
+  }
+  
+  event void C.fired() {
+    check('C', cStart, cTime);
+    if (cTime & 0xff) {
+      call C.stop();
+      cTime = 1 + (call Random.rand32() & 0x3ff);
+    }
+    call C.startOneShot(cTime);
+    cStart = sim_time();
+  }
+  
+  event void D.fired() {
+    check('D', dStart, dTime);
+    dTime = 1 + (call Random.rand32() & 0x3ff);
+    call D.startOneShot(dTime);
+    dStart = sim_time();
+  }
+  
+}
+
+
+
+
diff --git a/apps/tests/TestSimTimers/script.py b/apps/tests/TestSimTimers/script.py
new file mode 100644
index 00000000..d4212516
--- /dev/null
+++ b/apps/tests/TestSimTimers/script.py
@@ -0,0 +1,20 @@
+from TOSSIM import *
+import sys
+import time
+
+t = Tossim([])
+
+t.addChannel("TestTimer", sys.stdout)
+#t.addChannel("Timer", sys.stdout)
+#t.addChannel("HplAtm128Timer0AsyncP", sys.stdout)
+#t.addChannel("Atm128AlarmAsyncP", sys.stdout)
+
+start = time.time();
+m1 = t.getNode(0)
+
+m1.bootAtTime(345321);
+
+for i in range(0, 10000):
+    t.runNextEvent();
+
+    
diff --git a/apps/tests/TestSleep/Makefile b/apps/tests/TestSleep/Makefile
new file mode 100644
index 00000000..4129adb3
--- /dev/null
+++ b/apps/tests/TestSleep/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestSleepC
+include $(MAKERULES)
+
diff --git a/apps/tests/TestSleep/TestSleepC.nc b/apps/tests/TestSleep/TestSleepC.nc
new file mode 100644
index 00000000..833d4376
--- /dev/null
+++ b/apps/tests/TestSleep/TestSleepC.nc
@@ -0,0 +1,53 @@
+/// $Id: TestSleepC.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $
+
+/**
+ * Copyright (c) 2005 Crossbow Technology, Inc. 
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/// @author Martin Turon <mturon@xbow.com>
+
+/** 
+ * TestSleep simple puts the processor into sleep mode and stays there.
+ * The instananeous and average current should be ~20 uA on the ATmega128.
+ */
+configuration TestSleepC
+{
+}
+implementation
+{
+  components MainC, TestSleepM, 
+      HplSleepC;  // Low-level control just for test purposes
+
+  TestSleepM -> MainC.Boot;
+
+  TestSleepM.PowerManager -> HplSleepC;
+}
+
diff --git a/apps/tests/TestSleep/TestSleepM.nc b/apps/tests/TestSleep/TestSleepM.nc
new file mode 100644
index 00000000..a4dbd2cf
--- /dev/null
+++ b/apps/tests/TestSleep/TestSleepM.nc
@@ -0,0 +1,50 @@
+/// $Id: TestSleepM.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $
+
+/**
+ * Copyright (c) 2005 Crossbow Technology, Inc. 
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/// @author Martin Turon <mturon@xbow.com>
+
+module TestSleepM
+{
+  uses interface Boot;
+
+  uses interface McuSleep as PowerManager;
+}
+implementation
+{
+  event void Boot.booted()
+  {
+      call PowerManager.enable();
+  }
+}
+
diff --git a/apps/tests/TestSrp/Makefile b/apps/tests/TestSrp/Makefile
new file mode 100644
index 00000000..27cc2184
--- /dev/null
+++ b/apps/tests/TestSrp/Makefile
@@ -0,0 +1,6 @@
+COMPONENT=TestSrpAppC
+
+CFLAGS += -I$(TOSDIR)/lib/net/srp 
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestSrp/TestSrpAppC.nc b/apps/tests/TestSrp/TestSrpAppC.nc
new file mode 100644
index 00000000..691421e8
--- /dev/null
+++ b/apps/tests/TestSrp/TestSrpAppC.nc
@@ -0,0 +1,44 @@
+/*
+* Copyright (c) 2010 Johns Hopkins University.
+* All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Doug Carlson
+ */
+
+#include <hardware.h>
+configuration TestSrpAppC{
+}
+implementation {
+  components TestSrpC, MainC;
+
+  TestSrpC.Boot -> MainC;
+}
diff --git a/apps/tests/TestSrp/TestSrpC.nc b/apps/tests/TestSrp/TestSrpC.nc
new file mode 100644
index 00000000..1476b132
--- /dev/null
+++ b/apps/tests/TestSrp/TestSrpC.nc
@@ -0,0 +1,61 @@
+/**
+ * Copyright (c) 2010 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Doug Carlson
+ */
+
+configuration TestSrpC {
+  uses {
+    interface Boot;
+  }
+} implementation {
+  components TestSrpP;
+
+  components new TimerMilliC() as Timer;
+  components RandomC;
+  components ActiveMessageC;
+
+  components SourceRoutingC;
+  components new SourceRouteSenderC(1);
+  components new SourceRouteReceiverC(1);
+
+  TestSrpP.Boot = Boot;
+  TestSrpP.RadioSplitControl -> ActiveMessageC.SplitControl;
+  
+  TestSrpP.Timer -> Timer;
+  TestSrpP.Random -> RandomC;
+  TestSrpP.SourceRouteSend -> SourceRouteSenderC.SourceRouteSend;
+  TestSrpP.Receive -> SourceRouteReceiverC;
+  TestSrpP.SourceRoutePacket -> SourceRouteSenderC.SourceRoutePacket;
+
+}
diff --git a/apps/tests/TestSrp/TestSrpP.nc b/apps/tests/TestSrp/TestSrpP.nc
new file mode 100644
index 00000000..a8917604
--- /dev/null
+++ b/apps/tests/TestSrp/TestSrpP.nc
@@ -0,0 +1,118 @@
+/*
+* Copyright (c) 2010 Johns Hopkins University.
+* All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Doug Carlson
+ */
+
+module TestSrpP {
+  uses {
+    interface Boot;
+    interface Timer<TMilli>;
+    interface SourceRouteSend;
+    interface SourceRoutePacket;
+    interface Receive;
+    interface Random;
+    interface SplitControl as RadioSplitControl;
+  }
+} 
+implementation {
+  message_t myMsg;
+  uint8_t myCount = 0;
+  #define SEND_INTERVAL 50
+  #define SEND_COUNT 200
+
+  typedef struct {
+    uint8_t len;
+    am_addr_t route[SRP_MAX_PATHLEN];
+  } test_route_t;
+
+  test_route_t routes[6] = {
+    {0, {}},
+    {3, {1,2,3}},
+    {2, {2,3}},
+    {0, {}},
+    {3, {4,2,3}},
+    {3, {5,2,3}},
+  };
+  
+
+  typedef nx_struct {
+    nx_uint8_t count;
+  } test_payload_t;
+
+  event void Boot.booted() {
+    dbg("TestSrpP", "booted\n");
+    call RadioSplitControl.start();
+  }
+
+  event void Timer.fired() {
+    test_payload_t* payload;
+    error_t err;
+
+    myCount++;
+    payload = ((test_payload_t*) call SourceRouteSend.getPayload(&myMsg, sizeof(test_payload_t)));
+    payload -> count = myCount;
+
+    //NOTE we don't want space allocated for the route outside of the header, so this is kind of awkward.
+    //NOTE it seems bad that the sender needs to specify themselves, and also that the user needs to remember that a 1-hop path has 2 nodes in it.
+    err = call SourceRouteSend.send(routes[TOS_NODE_ID].route, routes[TOS_NODE_ID].len , &myMsg, sizeof(test_payload_t));
+
+    dbg("TestSrpP", "Sending %d : %d\n",myCount, err);
+  }
+
+  event void SourceRouteSend.sendDone(message_t* msg, error_t error) {
+    //dbg("TestSrpP", "SendDone: %d\n", error);
+    if (myCount < SEND_COUNT) {
+      call Timer.startOneShot(call Random.rand16() % SEND_INTERVAL);
+    }
+  }
+
+  event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    test_payload_t* tPayload;
+    //dbg("TestSrpP", "Receive msg %p payload %p\n", msg, payload);
+    tPayload = (test_payload_t*) payload;
+    dbg("TestSrpP","Receive p->count %d from %d \n", tPayload->count, (call SourceRoutePacket.getRoute(msg))[0]);
+    return msg;
+  }
+
+  event void RadioSplitControl.startDone(error_t error) {
+    dbg("TestSrpP", "Radio startDone %d\n", error);
+
+    if (routes[TOS_NODE_ID].len > 0 ) {
+      call Timer.startOneShot(call Random.rand16() % SEND_INTERVAL);
+    }
+  }
+
+  event void RadioSplitControl.stopDone(error_t error) {
+  }
+}
diff --git a/apps/tests/TestSrp/sim.py b/apps/tests/TestSrp/sim.py
new file mode 100644
index 00000000..dedc4814
--- /dev/null
+++ b/apps/tests/TestSrp/sim.py
@@ -0,0 +1,34 @@
+import TOSSIM
+import sys
+
+t = TOSSIM.Tossim([])
+m = t.mac()
+r = t.radio()
+t.init()
+
+t.addChannel("TestSrpP", sys.stdout)
+#t.addChannel("SourceRouteEngineP", sys.stdout)
+#t.addChannel("SRPDebug", sys.stdout)
+#t.addChannel("SRPInfo", sys.stdout)
+t.addChannel("SRPError", sys.stdout)
+
+f = open("topo.txt", "r")
+lines = f.readlines()
+
+edges = {}
+
+for [src, dest, gain] in [line.split()[1:] for line in lines if line.startswith("gain")]:
+    src = int(src)
+    dest = int(dest)
+    r.add(src, dest, float(gain))
+    edges[src] = edges.get(src, [])+[dest]
+
+for nodeId in edges:
+    n = t.getNode(nodeId)
+    for i in range(100):
+        n.addNoiseTraceReading(-105)
+    n.createNoiseModel()
+    n.bootAtTime(t.ticksPerSecond()/4 * nodeId )
+
+while t.time() / t.ticksPerSecond() < 300:
+    t.runNextEvent()
diff --git a/apps/tests/TestSrp/topo.txt b/apps/tests/TestSrp/topo.txt
new file mode 100644
index 00000000..173d2768
--- /dev/null
+++ b/apps/tests/TestSrp/topo.txt
@@ -0,0 +1,13 @@
+#            3
+#            |
+#	     2
+#          / | \
+#         1  4  5
+gain    1       2       0
+gain    2       1       0
+gain	3	2	0
+gain	2	3	0
+gain	4	2	0
+gain	2	4	0
+gain	5	2	0
+gain	2	5	0
diff --git a/apps/tests/TestTimerSync/Makefile b/apps/tests/TestTimerSync/Makefile
new file mode 100644
index 00000000..9e51904e
--- /dev/null
+++ b/apps/tests/TestTimerSync/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestTimerSyncAppC
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestTimerSync/TestTimerSyncAppC.nc b/apps/tests/TestTimerSync/TestTimerSyncAppC.nc
new file mode 100644
index 00000000..37c29369
--- /dev/null
+++ b/apps/tests/TestTimerSync/TestTimerSyncAppC.nc
@@ -0,0 +1,76 @@
+// $Id: TestTimerSyncAppC.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * This application sends a single active message broadcast if it has
+ * address 0, and then starts a timer at 1Hz.  If it has any address 
+ * other than 0, it starts a timer at 1 Hz upon receiving a broadcast 
+ * message.  The idea is to have one base station with address 0 send 
+ * out a broadacst message to synchronize itself with all receivers.  
+ * All Leds from the base station and any receivers of the broadcast 
+ * should blink together.
+ 
+ * It uses the radio HIL component
+ * <tt>ActiveMessageC</tt>, and its packets are AM type 240.
+ *
+ * @author Phil Levis
+ * @author Kevin Klues
+ * @date   Nov 7 2005
+ */
+
+configuration TestTimerSyncAppC {}
+implementation {
+  components MainC, TestTimerSyncC as App, LedsC;
+  components ActiveMessageC;
+  components new TimerMilliC();
+  components new AMSenderC(240), new AMReceiverC(240); 
+  
+  App.Boot -> MainC.Boot;
+
+  App.Receive -> AMReceiverC;
+  App.AMSend -> AMSenderC;
+  App.SplitControl -> ActiveMessageC;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+}
+
+
diff --git a/apps/tests/TestTimerSync/TestTimerSyncC.nc b/apps/tests/TestTimerSync/TestTimerSyncC.nc
new file mode 100644
index 00000000..f7c293fe
--- /dev/null
+++ b/apps/tests/TestTimerSync/TestTimerSyncC.nc
@@ -0,0 +1,103 @@
+// $Id: TestTimerSyncC.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *  Implementation of the TestTimerSync application.
+ *
+ *  @author Phil Levis
+ *  @author Kevin Klues
+ *  @date   Nov 7 2005
+ *
+ **/
+
+#include "Timer.h"
+
+module TestTimerSyncC {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface SplitControl;
+  }
+}
+implementation {
+  #define PERIOD 500
+
+  message_t syncMsg;
+
+  event void Boot.booted() {
+    call SplitControl.start();
+  }
+ 
+  event void SplitControl.startDone(error_t err) {
+    if(TOS_NODE_ID == 0) {
+      call AMSend.send(AM_BROADCAST_ADDR, &syncMsg, 0);
+    }
+  }
+
+  event void SplitControl.stopDone(error_t err) {
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t error) {
+    if(error == SUCCESS) {
+      call Leds.led2Toggle();
+      call MilliTimer.startOneShot(PERIOD);
+    }
+  }
+
+  event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    call Leds.led2Toggle();
+    call MilliTimer.startOneShot(PERIOD);
+    return msg;
+  }
+
+  event void MilliTimer.fired() {
+    call Leds.led2Toggle();
+    call MilliTimer.startOneShot(PERIOD);
+  }
+}
+
+
+
+
diff --git a/apps/tests/TestTrickleTimer/Driver.c b/apps/tests/TestTrickleTimer/Driver.c
new file mode 100644
index 00000000..1aa8c67b
--- /dev/null
+++ b/apps/tests/TestTrickleTimer/Driver.c
@@ -0,0 +1,48 @@
+#include <tossim.h>
+
+int main() {
+  nesc_app_t na;
+  na.numVariables = 1;
+  na.variableNames = (char**)malloc(sizeof(char*));
+  na.variableTypes = (char**)malloc(sizeof(char*));
+  na.variableArray = (int*)malloc(sizeof(int));
+  na.variableNames[0] = "TestSerialC.arrayTest";
+  na.variableTypes[0] = "int";
+  na.variableArray[0] = 1;
+
+  Tossim* t = new Tossim(&na);
+  t->init();
+  //  t->addChannel("BlinkC", fdopen(1, "w"));
+  //  t->addChannel("HplAtm128CompareC", fdopen(1, "w"));
+  //t->addChannel("HplCounter0C", fdopen(1, "w"));
+  //t->addChannel("Atm128AlarmC", fdopen(1, "w"));
+  //t->addChannel("TransformAlarmCounterC", fdopen(1, "w"));
+  //t->addChannel("Scheduler", fdopen(1, "w"));
+  //t->addChannel("Trickle", fdopen(1, "w"));
+  t->addChannel("TestTrickle", fdopen(1, "w"));
+  t->addChannel("TrickleTimes", fdopen(1, "w"));
+  
+  for (int i = 0; i < 1; i++) {
+    printf("Mote %i at %i\n", i, 500 * i + 1);
+    Mote* m = t->getNode(i);
+    m->bootAtTime(500 * i + 1);
+  }
+
+  for (int i = 0; i < 5000; i++) {
+    t->runNextEvent();
+  }
+
+  int x = 2;
+
+  for (int i = 0; i < 5000; i++) {
+    t->runNextEvent();
+  }
+  
+  //  Mote* m = t->getNode(2);
+  //Variable* v = m->getVariable("TestSerialC.arrayTest");
+
+  //  variable_string_t s = v->getData();
+
+  //printf ("TestSerialC.arrayTest: %s %s\n", s.type, s.isArray? "[]":"");
+
+}
diff --git a/apps/tests/TestTrickleTimer/Makefile b/apps/tests/TestTrickleTimer/Makefile
new file mode 100644
index 00000000..592741a3
--- /dev/null
+++ b/apps/tests/TestTrickleTimer/Makefile
@@ -0,0 +1,5 @@
+COMPONENT=TestTrickleTimerAppC
+CFLAGS += -I%T/lib/net -I.
+
+include $(MAKERULES)
+
diff --git a/apps/tests/TestTrickleTimer/Makefile.Driver b/apps/tests/TestTrickleTimer/Makefile.Driver
new file mode 100644
index 00000000..4acaadd3
--- /dev/null
+++ b/apps/tests/TestTrickleTimer/Makefile.Driver
@@ -0,0 +1,7 @@
+
+all:
+	make micaz sim
+	g++ -g -c -o Driver.o Driver.c -I../../../tos/lib/tossim/ -Lbuild/micaz -L. 
+	g++ -o Driver Driver.o build/micaz/sim.o build/micaz/tossim.o
+
+
diff --git a/apps/tests/TestTrickleTimer/TestTrickle.h b/apps/tests/TestTrickleTimer/TestTrickle.h
new file mode 100644
index 00000000..33f99cb1
--- /dev/null
+++ b/apps/tests/TestTrickleTimer/TestTrickle.h
@@ -0,0 +1,6 @@
+#ifndef TEST_TRICKLE_H
+#define TEST_TRICKLE_H
+
+#define UQ_TEST_TRICKLE "TestTrickle.TrickleTimer"
+
+#endif
diff --git a/apps/tests/TestTrickleTimer/TestTrickleC.nc b/apps/tests/TestTrickleTimer/TestTrickleC.nc
new file mode 100644
index 00000000..d9062ac0
--- /dev/null
+++ b/apps/tests/TestTrickleTimer/TestTrickleC.nc
@@ -0,0 +1,49 @@
+// $Id: TestTrickleC.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Test of the trickle timers.
+ * @author Philip Levis
+ * @date   Jan 7 2006
+ */ 
+
+#include <TestTrickle.h>
+
+configuration TestTrickleC {
+  provides interface TrickleTimer[uint8_t];
+}
+implementation {
+  components new TrickleTimerMilliC(1, 120, 2, uniqueCount(UQ_TEST_TRICKLE));
+  TrickleTimer = TrickleTimerMilliC;
+}
+
+  
diff --git a/apps/tests/TestTrickleTimer/TestTrickleTimerAppC.nc b/apps/tests/TestTrickleTimer/TestTrickleTimerAppC.nc
new file mode 100644
index 00000000..57caaa06
--- /dev/null
+++ b/apps/tests/TestTrickleTimer/TestTrickleTimerAppC.nc
@@ -0,0 +1,66 @@
+// $Id: TestTrickleTimerAppC.nc,v 1.6 2010-06-29 22:07:25 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Test of the trickle timers.
+ * @author Philip Levis
+ * @date   Jan 7 2006
+ */ 
+
+configuration TestTrickleTimerAppC {
+}
+implementation {
+  components TestTrickleTimerAppP, MainC, RandomC;
+  components new TestTrickleTimerC() as TimerA;
+  components new TestTrickleTimerC() as TimerB;
+  components new TestTrickleTimerC() as TimerC;
+  components new TestTrickleTimerC() as TimerD;
+  components new TimerMilliC();
+  components new BitVectorC(1) as PendingVector;
+  components new BitVectorC(1) as ChangeVector;
+  
+  //  Timer.Timer -> TimerMilliC;
+  //Timer.Random -> RandomC;
+  //Timer.Changed -> ChangeVector;
+  //Timer.Pending -> PendingVector;
+  
+  MainC.SoftwareInit -> TestTrickleTimerAppP;
+  TestTrickleTimerAppP.Boot -> MainC.Boot;
+  
+  TestTrickleTimerAppP.TimerA -> TimerA;
+  TestTrickleTimerAppP.TimerB -> TimerB;
+  TestTrickleTimerAppP.TimerC -> TimerC;
+  TestTrickleTimerAppP.TimerD -> TimerD;
+  TestTrickleTimerAppP.Random -> RandomC;
+}
+
+  
diff --git a/apps/tests/TestTrickleTimer/TestTrickleTimerAppP.nc b/apps/tests/TestTrickleTimer/TestTrickleTimerAppP.nc
new file mode 100644
index 00000000..4f4b74e5
--- /dev/null
+++ b/apps/tests/TestTrickleTimer/TestTrickleTimerAppP.nc
@@ -0,0 +1,119 @@
+// $Id: TestTrickleTimerAppP.nc,v 1.6 2010-06-29 22:07:25 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Test of the trickle timers.
+ * @author Philip Levis
+ * @date   Jan 7 2006
+ */ 
+
+module TestTrickleTimerAppP {
+  provides interface Init;
+  uses {
+    interface Boot;
+    interface TrickleTimer as TimerA;
+    interface TrickleTimer as TimerB;
+    interface TrickleTimer as TimerC;
+    interface TrickleTimer as TimerD;
+    interface Random;
+  }
+}
+implementation {
+
+  bool a = 0;
+  bool b = 0;
+  bool c = 0;
+  bool d = 0;
+
+  command error_t Init.init() {return SUCCESS;}
+  
+  event void Boot.booted() {
+    a = 1;
+    call TimerA.reset();
+    call TimerA.start();
+  }
+
+  event void TimerA.fired() {
+    dbg("TestTrickle", "   Timer A fired at %s\n", sim_time_string());
+    if (!b) {
+      call TimerB.reset();
+      call TimerB.start();
+      b = 1;
+    }
+  }
+  
+
+  event void TimerB.fired() {
+    dbg("TestTrickle", "  Timer B fired at %s\n", sim_time_string());
+    if (!c) {
+    call TimerC.reset();
+      call TimerC.start();
+      b = 1;
+    }
+  }
+  
+  
+  event void TimerC.fired() {
+    dbg("TestTrickle", " Timer C fired at %s\n", sim_time_string());
+    if (!d) {
+      call TimerD.reset();
+      call TimerD.start();
+      b = 1;
+    }
+  }
+
+  uint16_t i = 0;
+  event void TimerD.fired() {
+    dbg("TestTrickle", "Timer D fired at %s\n", sim_time_string());
+    i = call Random.rand16();
+    i = i % 4;
+    switch (i) {
+    case 0:
+      call TimerA.reset();
+      break;
+    case 1:
+      call TimerB.reset();
+      break;
+    case 2:
+      call TimerC.reset();
+      break;
+    case 3:
+      call TimerD.reset();
+      break;
+    }
+  }
+
+  
+  
+}
+
+  
diff --git a/apps/tests/TestTrickleTimer/TestTrickleTimerC.nc b/apps/tests/TestTrickleTimer/TestTrickleTimerC.nc
new file mode 100644
index 00000000..09471444
--- /dev/null
+++ b/apps/tests/TestTrickleTimer/TestTrickleTimerC.nc
@@ -0,0 +1,50 @@
+// $Id: TestTrickleTimerC.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Test of the trickle timers.
+ * @author Philip Levis
+ * @date   Jan 7 2006
+ */ 
+
+#include <TestTrickle.h>
+
+generic configuration TestTrickleTimerC() {
+  provides interface TrickleTimer;
+}
+implementation {
+  components TestTrickleC;
+
+  TrickleTimer = TestTrickleC.TrickleTimer[unique(UQ_TEST_TRICKLE)];
+}
+
+  
diff --git a/apps/tests/TestTrickleTimer/test.py b/apps/tests/TestTrickleTimer/test.py
new file mode 100644
index 00000000..549f8b82
--- /dev/null
+++ b/apps/tests/TestTrickleTimer/test.py
@@ -0,0 +1,15 @@
+from TOSSIM import *
+import sys
+
+t = Tossim([]);
+t.init()
+t.addChannel("Trickle", sys.stdout);
+
+for i in range(0, 1):
+    m = t.getNode(i)
+    m.bootAtTime(i * 5023211 + 10002322)
+
+for i in range(0, 1000000):
+    t.runNextEvent()
+
+    
diff --git a/apps/tests/TestTymo/Makefile b/apps/tests/TestTymo/Makefile
new file mode 100644
index 00000000..7812a6c0
--- /dev/null
+++ b/apps/tests/TestTymo/Makefile
@@ -0,0 +1,5 @@
+COMPONENT=TestC
+PFLAGS += -I../../../tos/lib/net/tymo -I../../../tos/lib/net/tymo/dymo -I../../../tos/lib/net/tymo/mh
+DOCDIR=~/tymo/web/html-doc/
+
+include $(MAKERULES)
\ No newline at end of file
diff --git a/apps/tests/TestTymo/TestC.nc b/apps/tests/TestTymo/TestC.nc
new file mode 100644
index 00000000..0e80be88
--- /dev/null
+++ b/apps/tests/TestTymo/TestC.nc
@@ -0,0 +1,27 @@
+
+#define CC2420_DEF_RFPOWER 1
+#define MAX_TABLE_SIZE 10
+//#define DYMO_MONITORING
+
+configuration TestC {
+
+}
+
+implementation {
+  components TestM, DymoNetworkC;
+  components MainC, LedsC, new TimerMilliC();
+
+  TestM.Boot  -> MainC;
+  TestM.Leds  -> LedsC;
+  TestM.Timer -> TimerMilliC;
+  TestM.SplitControl -> DymoNetworkC;
+  TestM.Packet       -> DymoNetworkC;
+  TestM.MHPacket     -> DymoNetworkC;
+  TestM.Receive      -> DymoNetworkC.Receive[1];
+  TestM.Intercept    -> DymoNetworkC.Intercept[1];
+  TestM.MHSend       -> DymoNetworkC.MHSend[1];
+
+#ifdef DYMO_MONITORING
+  TestM.DymoMonitor -> DymoNetworkC;
+#endif
+}
diff --git a/apps/tests/TestTymo/TestM.nc b/apps/tests/TestTymo/TestM.nc
new file mode 100644
index 00000000..2903fbd8
--- /dev/null
+++ b/apps/tests/TestTymo/TestM.nc
@@ -0,0 +1,121 @@
+#include "routing_table.h"
+
+module TestM {
+  
+  uses {
+    interface Boot;
+    interface Leds;
+    interface SplitControl;
+    interface AMPacket as MHPacket;
+    interface Packet;
+    interface Receive;
+    interface Intercept;
+    interface AMSend as MHSend;
+    interface Timer<TMilli>;
+  }
+#ifdef DYMO_MONITORING
+  uses interface DymoMonitor;
+#endif
+}
+
+implementation {
+
+  message_t packet;
+
+  enum {
+    ORIGIN = 1,
+    TARGET = 3,
+  };
+
+  void display(message_t * msg){
+    uint8_t * payload = NULL;
+    uint8_t size;
+    int8_t i;
+    dbg("messages", "message content:\n");
+    for(i=0; i<size; i+=4, payload+=4){
+      dbg("messages", "\t%hhu\t%hhu\t%hhu\t%hhu\n", *payload, *(payload+1), *(payload+2), *(payload+3));
+    }
+  }
+
+  void setLeds(uint16_t val) {
+    if (val & 0x01)
+      call Leds.led0Toggle();
+    if (val & 0x02)
+      call Leds.led1Toggle();
+    if (val & 0x04)
+      call Leds.led2Toggle();
+  }
+
+  task void stop(){
+    call SplitControl.stop();
+  }
+
+  event void Boot.booted(){
+    call SplitControl.start();
+  }
+
+  event void SplitControl.startDone(error_t e){
+    if(call MHPacket.address() == ORIGIN){
+      call Timer.startPeriodic(2048);
+    }
+  }
+
+  event void Timer.fired(){
+    nx_uint16_t * payload = call Packet.getPayload(&packet, 2);
+    error_t error;
+    *payload = 1664;
+    error = call MHSend.send(TARGET, &packet, sizeof(*payload));
+    if(error == SUCCESS){
+      dbg("messages", "Sending a beer...\n");
+    } else {
+      dbg("messages", "Unable to send the beer! - %hhu\n", error);
+    }
+  }
+
+  event void MHSend.sendDone(message_t * msg, error_t e){
+    if((e == SUCCESS) && (msg == &packet) && (call MHPacket.address() == ORIGIN)){
+      dbg("messages", "Beer successfully sent.\n");
+      setLeds(1);
+    } else if (e == FAIL) {
+      dbg("messages", "Sending the beer didn't succeed!\n");
+      setLeds(2);
+    } else {
+      dbg("messages", "What the hell is going on!?");
+    }
+  }
+  
+  event message_t * Receive.receive(message_t * msg, void * payload, uint8_t len){
+    if(call MHPacket.address() == TARGET){
+      dbg("messages", "I have received a message from %u\n", call MHPacket.source(msg));
+      dbg("messages", "It is a %u french beer, great! :o)\n", *(nx_uint16_t *)payload);
+      setLeds(4);
+    } else {
+      dbg("messages", "What is this message?\n");
+    }
+    return msg;
+  }
+
+  event bool Intercept.forward(message_t * msg, void * payload, uint8_t len){
+    setLeds(2);
+    return TRUE;
+  }
+
+  event void SplitControl.stopDone(error_t e){}
+
+#ifdef DYMO_MONITORING
+
+  event void DymoMonitor.msgReceived(message_t * msg){
+    dbg("messages", "Dymo msg received.\n");
+  }
+
+  event void DymoMonitor.msgSent(message_t * msg){
+    dbg("messages", "Dymo msg sent.\n");
+  }
+
+  event void DymoMonitor.routeDiscovered(uint32_t delay, addr_t target){
+    dbg("messages", "Route for %u discovered in %lu milliseconds.\n", target, delay);
+  }
+
+#endif
+
+}
diff --git a/apps/tests/TestTymo/meyer-light.txt b/apps/tests/TestTymo/meyer-light.txt
new file mode 100644
index 00000000..37bbafd3
--- /dev/null
+++ b/apps/tests/TestTymo/meyer-light.txt
@@ -0,0 +1,100 @@
+-39
+-98
+-98
+-98
+-99
+-98
+-94
+-98
+-98
+-98
+-98
+-98
+-99
+-98
+-98
+-98
+-98
+-98
+-98
+-98
+-97
+-98
+-97
+-98
+-98
+-98
+-98
+-91
+-98
+-96
+-96
+-98
+-98
+-98
+-98
+-98
+-99
+-86
+-97
+-98
+-98
+-86
+-90
+-91
+-87
+-87
+-98
+-98
+-98
+-98
+-98
+-98
+-78
+-94
+-90
+-96
+-98
+-98
+-98
+-86
+-98
+-98
+-98
+-99
+-98
+-98
+-98
+-97
+-99
+-98
+-98
+-99
+-98
+-93
+-98
+-98
+-82
+-82
+-81
+-82
+-82
+-49
+-98
+-81
+-82
+-64
+-81
+-81
+-98
+-98
+-98
+-98
+-98
+-98
+-98
+-98
+-98
+-98
+-98
+-98
diff --git a/apps/tests/TestTymo/test.py b/apps/tests/TestTymo/test.py
new file mode 100644
index 00000000..078f3532
--- /dev/null
+++ b/apps/tests/TestTymo/test.py
@@ -0,0 +1,47 @@
+from TOSSIM import *
+import sys
+import time
+
+t = Tossim([])
+r = t.radio()
+f = open("topo.txt", "r")
+n = 0
+
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+#    print " ", s[0], " ", s[1], " ", s[2]
+    r.add(int(s[0]), int(s[1]), float(s[2]))
+
+
+t.addChannel("messages", sys.stdout)
+#t.addChannel("fwe", sys.stdout)
+#t.addChannel("mhe", sys.stdout)
+#t.addChannel("de", sys.stdout)
+t.addChannel("dt", sys.stdout)
+
+noise = open("meyer-light.txt", "r")
+lines = noise.readlines()
+for line in lines:
+  str = line.strip()
+  if (str != ""):
+    val = int(str)
+    for i in range(1, 4):
+      t.getNode(i).addNoiseTraceReading(val)
+
+for i in range(1, 4):
+#  print "Creating noise model for ",i
+  t.getNode(i).createNoiseModel()
+
+t.getNode(1).bootAtTime(100001);
+t.getNode(2).bootAtTime(200022);
+t.getNode(3).bootAtTime(300033);
+
+t.runNextEvent();
+time = t.time()
+while (time + 700000000000 > t.time()):
+  print t.time()
+  t.runNextEvent()
+
+sys.stderr.write("Finished!\n")
diff --git a/apps/tests/TestTymo/topo.txt b/apps/tests/TestTymo/topo.txt
new file mode 100644
index 00000000..9547d716
--- /dev/null
+++ b/apps/tests/TestTymo/topo.txt
@@ -0,0 +1,6 @@
+1 2 -60.0
+
+2 1 -60.0
+2 3 -60.0
+
+3 2 -60.0
diff --git a/apps/tests/TestTymo/volumes-stm25p.xml b/apps/tests/TestTymo/volumes-stm25p.xml
new file mode 100644
index 00000000..a7b89c1c
--- /dev/null
+++ b/apps/tests/TestTymo/volumes-stm25p.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="DYMODATA" size="131072" />
+</volume_table>
diff --git a/apps/tests/arbiters/TestFcfsArbiter/Makefile b/apps/tests/arbiters/TestFcfsArbiter/Makefile
new file mode 100644
index 00000000..4c2094b0
--- /dev/null
+++ b/apps/tests/arbiters/TestFcfsArbiter/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestFcfsArbiterAppC
+OPTFLAGS = -O0
+include $(MAKERULES)
+
diff --git a/apps/tests/arbiters/TestFcfsArbiter/README.txt b/apps/tests/arbiters/TestFcfsArbiter/README.txt
new file mode 100644
index 00000000..61658d38
--- /dev/null
+++ b/apps/tests/arbiters/TestFcfsArbiter/README.txt
@@ -0,0 +1,38 @@
+README for TestFcfsArbiter
+Author/Contact: tinyos-help@millennium.berkeley.edu
+@author Kevin Klues <klueska@cs.berkeley.edu>
+
+Description:
+
+Please refer to TEP 108 for more information about the components
+this application is used to test.
+
+This application is used to test the functionality of the
+FcfsArbiter component developed using the Resource
+interface.  Three Resource users are created and all three request
+control of the resource before any one of them is granted it.
+Once the first user is granted control of the resource, a timer
+is set to allow this user to have control of it for a specific
+amount of time.  Once this timer expires, the resource is released
+and then immediately requested again.  Upon releasing the resource
+control will be granted to the next user that has requested it in FCFS
+order.  Initial requests are made by the three resource users in the
+following order.
+  -- Resource 0
+  -- Resource 2
+  -- Resource 1
+It is expected then that using a first-come-first-serve policy, control of the
+resource will be granted in the order of 0,2,1 and the Leds
+corresponding to each resource will flash whenever this occurs.
+  -- Led 0 -> Resource 0
+  -- Led 1 -> Resource 1
+  -- Led 2 -> Resource 2
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
+
diff --git a/apps/tests/arbiters/TestFcfsArbiter/TestFcfsArbiterAppC.nc b/apps/tests/arbiters/TestFcfsArbiter/TestFcfsArbiterAppC.nc
new file mode 100644
index 00000000..0ac531d3
--- /dev/null
+++ b/apps/tests/arbiters/TestFcfsArbiter/TestFcfsArbiterAppC.nc
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about the components
+ * this application is used to test.<br><br>
+ *
+ * This application is used to test the functionality of the
+ * FcfsArbiter component developed using the Resource
+ * interface.  Three Resource users are created and all three request
+ * control of the resource before any one of them is granted it.
+ * Once the first user is granted control of the resource, a timer
+ * is set to allow this user to have control of it for a specific
+ * amount of time.  Once this timer expires, the resource is released
+ * and then immediately requested again.  Upon releasing the resource
+ * control will be granted to the next user that has
+ * requested it in FCFS order.  Initial requests are made
+ * by the three resource users in the following order<br>
+ * <li> Resource 0
+ * <li> Resource 2
+ * <li> Resource 1
+ * <br>
+ * It is expected then that using a first-come-first-serve policy, control of the
+ * resource will be granted in the order of 0,2,1 and the Leds
+ * corresponding to each resource will flash whenever this occurs.<br>
+ * <li> Led 0 -> Resource 0
+ * <li> Led 1 -> Resource 1
+ * <li> Led 2 -> Resource 2
+ * <br>
+ *
+ * @author Kevin Klues <klueska@cs.berkeley.edu>
+ * @version  $Revision: 1.2 $
+ * @date $Date: 2009-12-22 08:34:09 $
+ */
+ 
+#define TEST_ARBITER_RESOURCE   "Test.Arbiter.Resource"
+configuration TestFcfsArbiterAppC{
+}
+implementation {
+  components MainC, TestFcfsArbiterC as App,LedsC,
+     new TimerMilliC() as Timer0,
+     new TimerMilliC() as Timer1,
+     new TimerMilliC() as Timer2,
+     new FcfsArbiterC(TEST_ARBITER_RESOURCE) as Arbiter;
+
+  enum {
+    RESOURCE0_ID = unique(TEST_ARBITER_RESOURCE),
+    RESOURCE1_ID = unique(TEST_ARBITER_RESOURCE),
+    RESOURCE2_ID = unique(TEST_ARBITER_RESOURCE),
+  };
+
+  App -> MainC.Boot;
+ 
+  App.Resource0 -> Arbiter.Resource[RESOURCE0_ID];
+  App.Resource1 -> Arbiter.Resource[RESOURCE1_ID];
+  App.Resource2 -> Arbiter.Resource[RESOURCE2_ID];
+  App.Timer0 -> Timer0;
+  App.Timer1 -> Timer1;
+  App.Timer2 -> Timer2;
+  
+  App.Leds -> LedsC;
+}
+
diff --git a/apps/tests/arbiters/TestFcfsArbiter/TestFcfsArbiterC.nc b/apps/tests/arbiters/TestFcfsArbiter/TestFcfsArbiterC.nc
new file mode 100644
index 00000000..8fb5f3ee
--- /dev/null
+++ b/apps/tests/arbiters/TestFcfsArbiter/TestFcfsArbiterC.nc
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+#include "Timer.h"
+ 
+/**
+ * Please refer to TEP 108 for more information about the components
+ * this application is used to test
+ *
+ * This application is used to test the functionality of the
+ * FcfsArbiter component developed using the Resource
+ * interface.  Three Resource users are created and all three request
+ * control of the resource before any one of them is granted it.
+ * Once the first user is granted control of the resource, a timer
+ * is set to allow this user to have control of it for a specific
+ * amount of time.  Once this timer expires, the resource is released
+ * and then immediately requested again.  Upon releasing the resource
+ * control will be granted to the next user that has
+ * requested it in FCFS order.  Initial requests are made
+ * by the three resource users in the following order<br>
+ * <li> Resource 0
+ * <li> Resource 2
+ * <li> Resource 1
+ * <br>
+ * It is expected then that using a first-come-first-serve policy, control of the
+ * resource will be granted in the order of 0,2,1 and the Leds
+ * corresponding to each resource will flash whenever this occurs.<br>
+ * <li> Led 0 -> Resource 0
+ * <li> Led 1 -> Resource 1
+ * <li> Led 2 -> Resource 2
+ * <br>
+ *
+ * @author Kevin Klues <klueska@cs.berkeley.edu>
+ * @version  $Revision: 1.2 $
+ * @date $Date: 2009-12-22 08:34:09 $
+ */
+
+module TestFcfsArbiterC {
+  uses {
+    interface Boot;  
+    interface Leds;
+    interface Resource as Resource0;
+    interface Resource as Resource1;
+    interface Resource as Resource2;
+    interface Timer<TMilli> as Timer0;
+    interface Timer<TMilli> as Timer1;
+    interface Timer<TMilli> as Timer2;
+  }
+}
+implementation {
+
+  #define HOLD_PERIOD 250
+  
+  //All resources try to gain access
+  event void Boot.booted() {
+    call Resource0.request();
+    call Resource2.request();
+    call Resource1.request();
+  }
+  
+  //If granted the resource, turn on an LED  
+  event void Resource0.granted() {
+    call Timer0.startOneShot(HOLD_PERIOD);
+    call Leds.led0Toggle();      
+  }  
+  event void Resource1.granted() {
+    call Timer1.startOneShot(HOLD_PERIOD);
+    call Leds.led1Toggle();     
+  }  
+  event void Resource2.granted() {
+    call Timer2.startOneShot(HOLD_PERIOD);
+    call Leds.led2Toggle();  
+  }  
+  
+  //After the hold period release the resource
+  event void Timer0.fired() {
+    call Resource0.release();
+    call Resource0.request();
+  }
+  event void Timer1.fired() {
+    call Resource1.release();
+    call Resource1.request();
+  }
+  event void Timer2.fired() {
+    call Resource2.release();
+    call Resource2.request();
+  }
+}
+
diff --git a/apps/tests/arbiters/TestRoundRobinArbiter/Makefile b/apps/tests/arbiters/TestRoundRobinArbiter/Makefile
new file mode 100644
index 00000000..804a6041
--- /dev/null
+++ b/apps/tests/arbiters/TestRoundRobinArbiter/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestRoundRobinArbiterAppC
+OPTFLAGS = -O0
+include $(MAKERULES)
+
diff --git a/apps/tests/arbiters/TestRoundRobinArbiter/README.txt b/apps/tests/arbiters/TestRoundRobinArbiter/README.txt
new file mode 100644
index 00000000..85a589d1
--- /dev/null
+++ b/apps/tests/arbiters/TestRoundRobinArbiter/README.txt
@@ -0,0 +1,38 @@
+README for TestRoundRobinArbiter
+Author/Contact: tinyos-help@millennium.berkeley.edu
+@author Kevin Klues <klueska@cs.berkeley.edu>
+
+Description:
+
+Please refer to TEP 108 for more information about the components
+this application is used to test.
+
+This application is used to test the functionality of the
+RoundRobinArbiter component developed using the Resource
+interface.  Three Resource users are created and all three request
+control of the resource before any one of them is granted it.
+Once the first user is granted control of the resource, a timer
+is set to allow this user to have control of it for a specific
+amount of time.  Once this timer expires, the resource is released
+and then immediately requested again.  Upon releasing the resource
+control will be granted to the next user that has requested it in
+round robin order.  Initial requests are made by the three resource
+users in the following order.
+  -- Resource 0
+  -- Resource 2
+  -- Resource 1
+It is expected then that using a round robin policy, control of the
+resource will be granted in the order of 0,1,2 and the Leds
+corresponding to each resource will flash whenever this occurs.
+  -- Led 0 -> Resource 0
+  -- Led 1 -> Resource 1
+  -- Led 2 -> Resource 2
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
+
diff --git a/apps/tests/arbiters/TestRoundRobinArbiter/TestRoundRobinArbiterAppC.nc b/apps/tests/arbiters/TestRoundRobinArbiter/TestRoundRobinArbiterAppC.nc
new file mode 100644
index 00000000..3bd8cf7f
--- /dev/null
+++ b/apps/tests/arbiters/TestRoundRobinArbiter/TestRoundRobinArbiterAppC.nc
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about the components
+ * this application is used to test.<br><br>
+ *
+ * This application is used to test the functionality of the
+ * RoundRobinArbiter component developed using the Resource
+ * interface.  Three Resource users are created and all three request
+ * control of the resource before any one of them is granted it.
+ * Once the first user is granted control of the resource, a timer
+ * is set to allow this user to have control of it for a specific
+ * amount of time.  Once this timer expires, the resource is released
+ * and then immediately requested again.  Upon releasing the resource
+ * control will be granted to the next user that has
+ * requested it in Round Robin order.  Initial requests are made
+ * by the three resource users in the following order<br>
+ * <li> Resource 0
+ * <li> Resource 2
+ * <li> Resource 1
+ * <br>
+ * It is expected then that using a round robin policy, control of the
+ * resource will be granted in the order of 0,1,2, and the Leds
+ * corresponding to each resource will flash whenever this occurs.<br>
+ * <li> Led 0 -> Resource 0
+ * <li> Led 1 -> Resource 1
+ * <li> Led 2 -> Resource 2
+ * <br>
+ *
+ * @author Kevin Klues <klueska@cs.berkeley.edu>
+ * @version  $Revision: 1.2 $
+ * @date $Date: 2009-12-22 08:34:10 $
+ */
+ 
+#define TEST_ARBITER_RESOURCE   "Test.Arbiter.Resource"
+configuration TestRoundRobinArbiterAppC{
+}
+implementation {
+  components MainC, TestRoundRobinArbiterC as App,LedsC,
+  new TimerMilliC() as Timer0,
+  new TimerMilliC() as Timer1,
+  new TimerMilliC() as Timer2,
+  new RoundRobinArbiterC(TEST_ARBITER_RESOURCE) as Arbiter;
+
+     enum {
+       RESOURCE0_ID = unique(TEST_ARBITER_RESOURCE),
+       RESOURCE1_ID = unique(TEST_ARBITER_RESOURCE),
+       RESOURCE2_ID = unique(TEST_ARBITER_RESOURCE),
+     };
+
+  App -> MainC.Boot;
+  
+  App.Resource0 -> Arbiter.Resource[RESOURCE0_ID];
+  App.Resource1 -> Arbiter.Resource[RESOURCE1_ID];
+  App.Resource2 -> Arbiter.Resource[RESOURCE2_ID];
+  App.Timer0 -> Timer0;
+  App.Timer1 -> Timer1;
+  App.Timer2 -> Timer2;
+  
+  App.Leds -> LedsC;
+}
+
diff --git a/apps/tests/arbiters/TestRoundRobinArbiter/TestRoundRobinArbiterC.nc b/apps/tests/arbiters/TestRoundRobinArbiter/TestRoundRobinArbiterC.nc
new file mode 100644
index 00000000..a4441acd
--- /dev/null
+++ b/apps/tests/arbiters/TestRoundRobinArbiter/TestRoundRobinArbiterC.nc
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+#include "Timer.h"
+ 
+/**
+ * Please refer to TEP 108 for more information about the components
+ * this application is used to test
+ *
+ * This application is used to test the functionality of the
+ * RoundRobinArbiter component developed using the Resource
+ * interface.  Three Resource users are created and all three request
+ * control of the resource before any one of them is granted it.
+ * Once the first user is granted control of the resource, a timer
+ * is set to allow this user to have control of it for a specific
+ * amount of time.  Once this timer expires, the resource is released
+ * and then immediately requested again.  Upon releasing the resource
+ * control will be granted to the next user that has
+ * requested it in Round Robin order.  Initial requests are made
+ * by the three resource users in the following order<br>
+ * <li> Resource 0
+ * <li> Resource 2
+ * <li> Resource 1
+ * <br>
+ * It is expected then that using a round robin policy, control of the
+ * resource will be granted in the order of 0,1,2, and the Leds
+ * corresponding to each resource will flash whenever this occurs.<br>
+ * <li> Led 0 -> Resource 0
+ * <li> Led 1 -> Resource 1
+ * <li> Led 2 -> Resource 2
+ * <br>
+ *
+ * @author Kevin Klues <klueska@cs.berkeley.edu>
+ * @version  $Revision: 1.2 $
+ * @date $Date: 2009-12-22 08:34:10 $
+ */
+
+module TestRoundRobinArbiterC {
+  uses {
+    interface Boot;  
+    interface Leds;
+    interface Resource as Resource0;
+    interface Resource as Resource1;
+    interface Resource as Resource2;
+    interface Timer<TMilli> as Timer0;
+    interface Timer<TMilli> as Timer1;
+    interface Timer<TMilli> as Timer2;
+  }
+}
+implementation {
+
+  #define HOLD_PERIOD 250
+  
+  //All resources try to gain access
+  event void Boot.booted() {
+    call Resource0.request();
+    call Resource2.request();
+    call Resource1.request();
+  }
+  
+  //If granted the resource, turn on an LED  
+  event void Resource0.granted() {
+    call Timer0.startOneShot(HOLD_PERIOD);
+    call Leds.led0Toggle();      
+  }  
+  event void Resource1.granted() {
+    call Timer1.startOneShot(HOLD_PERIOD);
+    call Leds.led1Toggle();     
+  }  
+  event void Resource2.granted() {
+    call Timer2.startOneShot(HOLD_PERIOD);
+    call Leds.led2Toggle();  
+  }  
+  
+  //After the hold period release the resource
+  event void Timer0.fired() {
+    call Resource0.release();
+    call Resource0.request();
+  }
+  event void Timer1.fired() {
+    call Resource1.release();
+    call Resource1.request();
+  }
+  event void Timer2.fired() {
+    call Resource2.release();
+    call Resource2.request();
+  }
+}
+
diff --git a/apps/tests/blip/TestLinkLocal/Makefile b/apps/tests/blip/TestLinkLocal/Makefile
new file mode 100644
index 00000000..927da4c1
--- /dev/null
+++ b/apps/tests/blip/TestLinkLocal/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestLinkLocalAppC
+include $(MAKERULES)
+CFLAGS += -DIN6_NO_GLOBAL -DLIB6LOWPAN_HC_VERSION=-1
+CFLAGS += -DPRINTFUART_ENABLED
diff --git a/apps/tests/blip/TestLinkLocal/README.txt b/apps/tests/blip/TestLinkLocal/README.txt
new file mode 100644
index 00000000..eac76a34
--- /dev/null
+++ b/apps/tests/blip/TestLinkLocal/README.txt
@@ -0,0 +1,41 @@
+README for TestLinkLocal
+Author/Contact: Stephen Dawson-Haggerty <tinyos-help@millennium.berkeley.edu>
+
+Description:
+
+TestLinkLocal tests the basic Link-Local communication functionality of blip.
+It verifies that the radio is working, and address resolution is correct, and
+that 64-bit addressing mode works correctly.
+
+Build with:
+$ make epic blip
+
+Install on at least two motes -- the node ID's don't matter since they will
+use only 64-bit address mode.
+
+1. Once per second, each mote transmits a packet (an echo request) to the
+   link-local multicast all-nodes group (ff02::1).  Led0 is toggled each time
+   this happens.  The source address is the node's link-local unicast address
+   derived from an EUI-64.
+
+2. All nodes receiving an echo request toggle Led1.  They also reply to the
+   echo request with a unicast packet to the originator.
+
+3. Nodes receiving a unicast reply to one of their echo requests toggle Led2.
+
+Therefore, if everything is working, you should see Led0 and Led2 blinking
+together, and Led1 blinking in sequence with the other mote's transmission.
+
+This application can help troubleshoot problems with the header compression
+layer; to disable header compression, edit the Makefile to uncommment
+"-DLIB6LOWPAN_HC_VERSION=-1".
+
+Additional debugging output is availiable via printf; on Linux, you can
+examine it with
+$ stty -F /dev/ttyUSB0 57600 && tail -f /dev/ttyUSB0
+
+Tools:
+
+Known bugs/limitations:
+
+
diff --git a/apps/tests/blip/TestLinkLocal/TestLinkLocalAppC.nc b/apps/tests/blip/TestLinkLocal/TestLinkLocalAppC.nc
new file mode 100644
index 00000000..e0e6272f
--- /dev/null
+++ b/apps/tests/blip/TestLinkLocal/TestLinkLocalAppC.nc
@@ -0,0 +1,17 @@
+/** Test the link-local communication in the blip stack
+ */
+configuration TestLinkLocalAppC {
+
+} implementation {
+  components MainC, LedsC;
+  components TestLinkLocalC;
+  components IPStackC;
+  components new TimerMilliC();
+  components new UdpSocketC();
+
+  TestLinkLocalC.Boot -> MainC;
+  TestLinkLocalC.SplitControl -> IPStackC;
+  TestLinkLocalC.Sock -> UdpSocketC;
+  TestLinkLocalC.Timer -> TimerMilliC;
+  TestLinkLocalC.Leds -> LedsC;
+}
diff --git a/apps/tests/blip/TestLinkLocal/TestLinkLocalC.nc b/apps/tests/blip/TestLinkLocal/TestLinkLocalC.nc
new file mode 100644
index 00000000..29c484d4
--- /dev/null
+++ b/apps/tests/blip/TestLinkLocal/TestLinkLocalC.nc
@@ -0,0 +1,67 @@
+
+#include <PrintfUART.h>
+#include <lib6lowpan/ip.h>
+
+module TestLinkLocalC {
+  uses {
+    interface Boot;
+    interface SplitControl;
+    interface UDP as Sock;
+    interface Timer<TMilli>;
+    interface Leds;
+  }
+} implementation {
+  nx_struct echo_state {
+    nx_int8_t cmd;
+    nx_uint32_t seqno;
+  } m_data;
+
+  enum {
+    SVC_PORT = 10210,
+    CMD_ECHO = 1,
+    CMD_REPLY = 2,
+  };
+
+  event void Boot.booted() {
+    printfUART_init();
+    call SplitControl.start();
+    m_data.seqno = 0;
+  }
+
+  event void SplitControl.startDone(error_t e) {
+    call Timer.startPeriodic(2048);
+    call Sock.bind(SVC_PORT);
+  }
+
+  event void SplitControl.stopDone(error_t e) {}
+
+  event void Timer.fired() {
+    struct sockaddr_in6 dest;
+
+    inet_pton6("ff02::1", &dest.sin6_addr);
+    dest.sin6_port = htons(SVC_PORT);
+    
+    m_data.cmd = CMD_ECHO;
+    m_data.seqno ++;
+
+    call Sock.sendto(&dest, &m_data, sizeof(m_data));
+    call Leds.led0Toggle();
+  }
+
+  event void Sock.recvfrom(struct sockaddr_in6 *src, void *payload,                                                               
+                           uint16_t len, struct ip6_metadata *meta) {
+    nx_struct echo_state *cmd = payload;
+    printfUART("TestLinkLocalC: recv from: ");
+    printfUART_in6addr(&src->sin6_addr);
+    printfUART("\n");
+
+    if (cmd->cmd == CMD_ECHO) {
+      cmd->cmd = CMD_REPLY;
+      call Sock.sendto(src, payload, len);
+      call Leds.led1Toggle();
+    } else {
+      printfUART("TestLinkLocalC: reply seqno: %li\n", cmd->seqno);
+      call Leds.led2Toggle();
+    }
+  }
+}
diff --git a/apps/tests/cc2420/LplBroadcastCountToLeds/.cvsignore b/apps/tests/cc2420/LplBroadcastCountToLeds/.cvsignore
new file mode 100644
index 00000000..8efdc3da
--- /dev/null
+++ b/apps/tests/cc2420/LplBroadcastCountToLeds/.cvsignore
@@ -0,0 +1 @@
+RadioCountMsg.py
diff --git a/apps/tests/cc2420/LplBroadcastCountToLeds/Makefile b/apps/tests/cc2420/LplBroadcastCountToLeds/Makefile
new file mode 100644
index 00000000..139d6aea
--- /dev/null
+++ b/apps/tests/cc2420/LplBroadcastCountToLeds/Makefile
@@ -0,0 +1,20 @@
+COMPONENT=RadioCountToLedsAppC
+
+CFLAGS += -DACK_LOW_POWER_LISTENING
+#CFLAGS += -DNOACK_LOW_POWER_LISTENING
+
+BUILD_EXTRA_DEPS = RadioCountMsg.py RadioCountMsg.class
+CLEAN_EXTRA = *.class *.pyc RadioCountMsg.py RadioCountMsg.java
+
+RadioCountMsg.py: RadioCountToLeds.h
+	mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=RadioCountMsg RadioCountToLeds.h radio_count_msg -o $@
+
+RadioCountMsg.class: RadioCountMsg.java
+	javac RadioCountMsg.java
+
+RadioCountMsg.java: RadioCountToLeds.h
+	mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=RadioCountMsg RadioCountToLeds.h radio_count_msg -o $@
+
+
+include $(MAKERULES)
+
diff --git a/apps/tests/cc2420/LplBroadcastCountToLeds/README.txt b/apps/tests/cc2420/LplBroadcastCountToLeds/README.txt
new file mode 100644
index 00000000..ece00cf1
--- /dev/null
+++ b/apps/tests/cc2420/LplBroadcastCountToLeds/README.txt
@@ -0,0 +1,43 @@
+README for LplBroadcastCountToLeds
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+This is a low power listening version of RadioCountToLeds,
+using the broadcast address to delivery packets.  That means the 
+delivery will remain on for the full duration of the receiver's 
+LPL check to ensure all listeners get the message.
+
+Each node is performing 1 second receive checks, but there is a 
+1.5 second delay between each transmission.
+
+Verification:
+ * Install the application on two motes
+ * Both motes should count up their LED's just like RadioCountToLeds
+   - This indicates they are communicating with each other.
+ * LED's will not toggle in rhythm.
+   - Being a broadcast LPL transmission, you'll sometimes see
+     the LED's count up one at a time, or multiple counts
+     at a time.  This is normal.
+
+If you see LED's waggling on both motes, the test passed.
+
+
+LplBroadcastCountToLeds maintains a 4Hz counter, broadcasting its value in 
+an AM packet every time it gets updated. A RadioCountToLeds node that 
+hears a counter displays the bottom three bits on its LEDs. This 
+application is a useful test to show that basic AM communication and 
+timers work.
+
+Tools:
+
+RadioCountMsg.java is a Java class representing the message that
+this application sends.  RadioCountMsg.py is a Python class representing
+the message that this application sends.
+
+Known bugs/limitations:
+
+None.
+
+
+$Id: README.txt,v 1.5 2008-07-26 02:32:44 klueska Exp $
diff --git a/apps/tests/cc2420/LplBroadcastCountToLeds/RadioCountToLeds.h b/apps/tests/cc2420/LplBroadcastCountToLeds/RadioCountToLeds.h
new file mode 100644
index 00000000..634fa855
--- /dev/null
+++ b/apps/tests/cc2420/LplBroadcastCountToLeds/RadioCountToLeds.h
@@ -0,0 +1,12 @@
+#ifndef RADIO_COUNT_TO_LEDS_H
+#define RADIO_COUNT_TO_LEDS_H
+
+typedef nx_struct radio_count_msg {
+  nx_uint16_t counter;
+} radio_count_msg_t;
+
+enum {
+  AM_RADIO_COUNT_MSG = 134,
+};
+
+#endif
diff --git a/apps/tests/cc2420/LplBroadcastCountToLeds/RadioCountToLedsAppC.nc b/apps/tests/cc2420/LplBroadcastCountToLeds/RadioCountToLedsAppC.nc
new file mode 100644
index 00000000..8ce51f6d
--- /dev/null
+++ b/apps/tests/cc2420/LplBroadcastCountToLeds/RadioCountToLedsAppC.nc
@@ -0,0 +1,87 @@
+// $Id: RadioCountToLedsAppC.nc,v 1.7 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "RadioCountToLeds.h"
+
+/**
+ * Configuration for the RadioCountToLeds application. RadioCountToLeds 
+ * maintains a 4Hz counter, broadcasting its value in an AM packet 
+ * every time it gets updated. A RadioCountToLeds node that hears a counter 
+ * displays the bottom three bits on its LEDs. This application is a useful 
+ * test to show that basic AM communication and timers work.
+ * <p>
+ * This version uses low-power listening.
+ *
+ * @author Philip Levis
+ * @date   June 24 2008
+ */
+
+configuration RadioCountToLedsAppC {}
+implementation {
+
+#if defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+  components CC1000ActiveMessageC as LplC;
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB) || defined(PLATFORM_SHIMMER) || defined(PLATFORM_SHIMMER2) || defined(PLATFORM_INTELMOTE2) || defined(PLATFORM_EPIC) 
+  components CC2420ActiveMessageC as LplC;
+#else
+#error "LPL testing not supported on this platform"
+#endif
+
+
+  components MainC, RadioCountToLedsC as App, LedsC;
+  components new AMSenderC(AM_RADIO_COUNT_MSG);
+  components new AMReceiverC(AM_RADIO_COUNT_MSG);
+  components new TimerMilliC();
+  components ActiveMessageC;
+  
+  App.Boot -> MainC.Boot;
+  
+  App.LowPowerListening -> LplC;
+  App.Receive -> AMReceiverC;
+  App.AMSend -> AMSenderC;
+  App.AMControl -> ActiveMessageC;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  App.Packet -> AMSenderC;
+}
+
+
diff --git a/apps/tests/cc2420/LplBroadcastCountToLeds/RadioCountToLedsC.nc b/apps/tests/cc2420/LplBroadcastCountToLeds/RadioCountToLedsC.nc
new file mode 100644
index 00000000..9d041159
--- /dev/null
+++ b/apps/tests/cc2420/LplBroadcastCountToLeds/RadioCountToLedsC.nc
@@ -0,0 +1,140 @@
+// $Id: RadioCountToLedsC.nc,v 1.5 2010-06-29 22:07:25 scipio Exp $
+
+/*                                                                        tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+ 
+#include "Timer.h"
+#include "RadioCountToLeds.h"
+ 
+/**
+ * Implementation of the RadioCountToLeds application. RadioCountToLeds 
+ * maintains a 4Hz counter, broadcasting its value in an AM packet 
+ * every time it gets updated. A RadioCountToLeds node that hears a counter 
+ * displays the bottom three bits on its LEDs. This application is a useful 
+ * test to show that basic AM communication and timers work.
+ * <p>
+ * This version uses low-power listening.
+ *
+ * @author Philip Levis
+ * @date   June 24 2008
+ */
+
+module RadioCountToLedsC {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface SplitControl as AMControl;
+    interface Packet;
+    interface LowPowerListening;
+  }
+}
+implementation {
+
+  message_t packet;
+
+  bool locked;
+  uint16_t counter = 0;
+  
+  event void Boot.booted() {
+    call AMControl.start();
+  }
+
+  event void AMControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+      // Note we can setup LPL before or after the radio turns on
+      call LowPowerListening.setLocalWakeupInterval(1000);
+      call MilliTimer.startOneShot(1500);
+    }
+    else {
+      call AMControl.start();
+    }
+  }
+
+  event void AMControl.stopDone(error_t err) {
+    // do nothing
+  }
+  
+  event void MilliTimer.fired() {
+    counter++;
+    dbg("RadioCountToLedsC", "RadioCountToLedsC: timer fired, counter is %hu.\n", counter);
+    if (locked) {
+      return;
+    }
+    else {
+      radio_count_msg_t* rcm = (radio_count_msg_t*)call Packet.getPayload(&packet, sizeof(radio_count_msg_t));
+      if (call Packet.maxPayloadLength() < sizeof(radio_count_msg_t)) {
+        return;
+      }
+
+      rcm->counter = counter;
+      call LowPowerListening.setRemoteWakeupInterval(&packet, 1000);
+      if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(radio_count_msg_t)) == SUCCESS) {
+        dbg("RadioCountToLedsC", "RadioCountToLedsC: packet sent.\n", counter);        
+        locked = TRUE;
+      }
+    }
+  }
+
+  event message_t* Receive.receive(message_t* bufPtr, 
+                                   void* payload, uint8_t len) {
+    dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len);
+    if (len != sizeof(radio_count_msg_t)) {
+      return bufPtr;
+    } else {
+      call Leds.set(((radio_count_msg_t*) payload)->counter);
+      return bufPtr;
+    }
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    call MilliTimer.startOneShot(1500);
+    if (&packet == bufPtr) {
+      locked = FALSE;
+    }
+  }
+
+}
+
+
+
+
diff --git a/apps/tests/cc2420/LplBroadcastPeriodicDelivery/Makefile b/apps/tests/cc2420/LplBroadcastPeriodicDelivery/Makefile
new file mode 100644
index 00000000..7953ee77
--- /dev/null
+++ b/apps/tests/cc2420/LplBroadcastPeriodicDelivery/Makefile
@@ -0,0 +1,8 @@
+COMPONENT=TestPeriodicAppC
+CFLAGS += -DACK_LOW_POWER_LISTENING
+#CFLAGS += -DNOACK_LOW_POWER_LISTENING
+
+include $(MAKERULES)
+
+
+ 
diff --git a/apps/tests/cc2420/LplBroadcastPeriodicDelivery/README.txt b/apps/tests/cc2420/LplBroadcastPeriodicDelivery/README.txt
new file mode 100644
index 00000000..9f1d6fee
--- /dev/null
+++ b/apps/tests/cc2420/LplBroadcastPeriodicDelivery/README.txt
@@ -0,0 +1,52 @@
+README for LplBroadcastPeriodicDelivery
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+Install the application to two nodes with the following ID's:
+  Node 0 (Receiver node): id = 0
+  Node 1 (Transmitter node): id = 1
+
+Do this at compile time by adding the flag NODEID=<id>, thus:
+
+make <platform> NODEID=<id> ...
+
+This app sends a message from Transmitter node to 
+AM_BROADCAST_ADDR and waits 1000 ms between each 
+delivery so the Rx mote's radio shuts back off and 
+has to redetect to receive the next
+message.
+
+
+EXPECTED OUTPUT
+  Transmitter Node:
+    * Toggles its led0 every second.
+      - led0 ON indicates transmission, which lasts
+        for a full second.
+
+  Receiver Node:
+     * led1 remains on (except at the beginning)
+     * If led0 lights up after the beginning of the
+       test, without resetting the transmitter node,
+       there is a problem.  This means a duplicate
+       message was received
+     * led2 toggles once each for each transmission
+       received.
+
+Summary:  Receiver node's led2 should be toggling once
+a second and led0 should never light up (except at the beginning).
+
+
+
+Tools:
+
+RadioCountMsg.java is a Java class representing the message that
+this application sends.  RadioCountMsg.py is a Python class representing
+the message that this application sends.
+
+Known bugs/limitations:
+
+None.
+
+
+$Id: README.txt,v 1.7 2010-01-06 18:57:20 ayer1 Exp $
diff --git a/apps/tests/cc2420/LplBroadcastPeriodicDelivery/TestPeriodic.h b/apps/tests/cc2420/LplBroadcastPeriodicDelivery/TestPeriodic.h
new file mode 100644
index 00000000..697efe7c
--- /dev/null
+++ b/apps/tests/cc2420/LplBroadcastPeriodicDelivery/TestPeriodic.h
@@ -0,0 +1,14 @@
+
+#ifndef TESTPERIODIC_H
+#define TESTPERIODIC_H
+
+typedef nx_struct TestPeriodicMsg {
+  nx_uint8_t count;
+} TestPeriodicMsg;
+
+enum {
+  AM_TESTPERIODICMSG = 133,
+};
+
+#endif
+
diff --git a/apps/tests/cc2420/LplBroadcastPeriodicDelivery/TestPeriodicAppC.nc b/apps/tests/cc2420/LplBroadcastPeriodicDelivery/TestPeriodicAppC.nc
new file mode 100644
index 00000000..fee5d28a
--- /dev/null
+++ b/apps/tests/cc2420/LplBroadcastPeriodicDelivery/TestPeriodicAppC.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "TestPeriodic.h"
+
+/**
+ * This app sends a message from Transmitter node to AM_BROADCAST_ADDR
+ * and waits 1000 ms between each delivery so the Rx mote's radio
+ * shuts back off and has to redetect to receive the next message. 
+ * Receiver: TOS_NODE_ID != 1
+ * Transmitter: TOS_NODE_ID == 1
+ *
+ * @author David Moss
+ */
+ 
+configuration TestPeriodicAppC {
+}
+
+implementation {
+
+#if defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+  components CC1000ActiveMessageC as Lpl;
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB) || defined(PLATFORM_SHIMMER) || defined(PLATFORM_SHIMMER2) || defined(PLATFORM_INTELMOTE2) || defined(PLATFORM_EPIC)
+  components CC2420ActiveMessageC as Lpl;
+#else
+#error "LPL testing not supported on this platform"
+#endif
+
+  components TestPeriodicC,
+      MainC,
+      ActiveMessageC,
+      new TimerMilliC(),
+      new AMSenderC(AM_TESTPERIODICMSG),
+      new AMReceiverC(AM_TESTPERIODICMSG),
+      LedsC;
+      
+  TestPeriodicC.Boot -> MainC;
+  TestPeriodicC.SplitControl -> ActiveMessageC;
+  TestPeriodicC.LowPowerListening -> Lpl;
+  TestPeriodicC.AMPacket -> ActiveMessageC;
+  TestPeriodicC.AMSend -> AMSenderC;
+  TestPeriodicC.Receive -> AMReceiverC;
+  TestPeriodicC.Packet -> ActiveMessageC;
+  TestPeriodicC.Timer -> TimerMilliC;
+  TestPeriodicC.Leds -> LedsC;
+
+}
+
diff --git a/apps/tests/cc2420/LplBroadcastPeriodicDelivery/TestPeriodicC.nc b/apps/tests/cc2420/LplBroadcastPeriodicDelivery/TestPeriodicC.nc
new file mode 100644
index 00000000..9e7dfff9
--- /dev/null
+++ b/apps/tests/cc2420/LplBroadcastPeriodicDelivery/TestPeriodicC.nc
@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "TestPeriodic.h"
+
+/**
+ * This app sends a message from Transmitter node to AM_BROADCAST_ADDR
+ * and waits 1000 ms between each delivery so the Rx mote's radio
+ * shuts back off and has to redetect to receive the next message. 
+ * Receiver: TOS_NODE_ID != 1.
+ * Transmitter: TOS_NODE_ID == 1.
+ *
+ * @author David Moss
+ */
+
+module TestPeriodicC {
+  uses {
+    interface Boot;
+    interface SplitControl;
+    interface LowPowerListening;
+    interface AMSend;
+    interface Receive;
+    interface AMPacket;
+    interface Packet;
+    interface Leds;
+    interface Timer<TMilli>;
+  }
+}
+
+implementation {
+ 
+  uint8_t count;
+  message_t fullMsg;
+  bool transmitter;
+
+  uint8_t lastCount;
+  
+  /**************** Prototypes ****************/
+  task void send();
+  
+  /**************** Boot Events ****************/
+  event void Boot.booted() {
+    transmitter = (call AMPacket.address() == 1);
+    count = 0;
+    
+    call LowPowerListening.setLocalWakeupInterval(1000);
+    call SplitControl.start();
+  }
+  
+  event void SplitControl.startDone(error_t error) {
+    if(transmitter) {
+      post send();
+    }
+  }
+  
+  event void SplitControl.stopDone(error_t error) {
+  }
+  
+  
+  /**************** Send Receive Events *****************/
+  event void AMSend.sendDone(message_t *msg, error_t error) {
+    if(transmitter) {
+      count++; 
+      call Timer.startOneShot(1000);
+      call Leds.led0Off();
+    }
+  }
+  
+  event message_t *Receive.receive(message_t *msg, void *payload, uint8_t len) {
+    TestPeriodicMsg *periodicMsg = (TestPeriodicMsg *) payload;
+
+    if(!transmitter) {
+      if(lastCount == periodicMsg->count) {
+        call Leds.led0On();
+        call Leds.led1Off();
+      } else {
+        call Leds.led1On();
+        call Leds.led0Off();
+      }
+
+      lastCount = periodicMsg->count;
+
+      call Leds.led2Toggle();
+    }
+    return msg;
+  }
+  
+  /**************** Timer Events ****************/
+  event void Timer.fired() {
+    if(transmitter) {
+      post send();
+    }
+  }
+  
+  /**************** Tasks ****************/
+  task void send() {
+    TestPeriodicMsg *periodicMsg = (TestPeriodicMsg *) call Packet.getPayload(&fullMsg, sizeof(TestPeriodicMsg));
+    periodicMsg->count = count;
+    call LowPowerListening.setRemoteWakeupInterval(&fullMsg, 1000);
+    if(call AMSend.send(AM_BROADCAST_ADDR, &fullMsg, sizeof(TestPeriodicMsg)) != SUCCESS) {
+      post send();
+    } else {
+      call Leds.led0On();
+    }
+  }
+}
+
diff --git a/apps/tests/cc2420/LplUnicastPeriodicDelivery/Makefile b/apps/tests/cc2420/LplUnicastPeriodicDelivery/Makefile
new file mode 100644
index 00000000..7953ee77
--- /dev/null
+++ b/apps/tests/cc2420/LplUnicastPeriodicDelivery/Makefile
@@ -0,0 +1,8 @@
+COMPONENT=TestPeriodicAppC
+CFLAGS += -DACK_LOW_POWER_LISTENING
+#CFLAGS += -DNOACK_LOW_POWER_LISTENING
+
+include $(MAKERULES)
+
+
+ 
diff --git a/apps/tests/cc2420/LplUnicastPeriodicDelivery/README.txt b/apps/tests/cc2420/LplUnicastPeriodicDelivery/README.txt
new file mode 100644
index 00000000..bae67af3
--- /dev/null
+++ b/apps/tests/cc2420/LplUnicastPeriodicDelivery/README.txt
@@ -0,0 +1,38 @@
+README for LplUnicastPeriodicDelivery
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+Install the application to two nodes with the following ID's:
+  Node 0 (Receiver node): id = 0
+  Node 1 (Transmitter node): id = 1 (or.. id > 0)
+
+
+This app sends a message from Transmitter node to 
+the recevier node and waits 1000 ms between each 
+delivery so the Rx mote's radio shuts back off and 
+has to redetect to receive the next message.
+
+
+EXPECTED OUTPUT
+  Transmitter Node:
+    * Toggles its led0 every second.
+      - led0 ON indicates transmission, which lasts
+        for much shorter than a second.  When the
+        receiver performs its receive check, the transmitter
+        stops delivering the message.
+
+  Receiver Node:
+     * led1 toggles once a second, indicating reception.
+
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
+
+
+$Id: README.txt,v 1.4 2008-07-26 02:32:44 klueska Exp $
diff --git a/apps/tests/cc2420/LplUnicastPeriodicDelivery/TestPeriodic.h b/apps/tests/cc2420/LplUnicastPeriodicDelivery/TestPeriodic.h
new file mode 100644
index 00000000..697efe7c
--- /dev/null
+++ b/apps/tests/cc2420/LplUnicastPeriodicDelivery/TestPeriodic.h
@@ -0,0 +1,14 @@
+
+#ifndef TESTPERIODIC_H
+#define TESTPERIODIC_H
+
+typedef nx_struct TestPeriodicMsg {
+  nx_uint8_t count;
+} TestPeriodicMsg;
+
+enum {
+  AM_TESTPERIODICMSG = 133,
+};
+
+#endif
+
diff --git a/apps/tests/cc2420/LplUnicastPeriodicDelivery/TestPeriodicAppC.nc b/apps/tests/cc2420/LplUnicastPeriodicDelivery/TestPeriodicAppC.nc
new file mode 100644
index 00000000..dd6c18f6
--- /dev/null
+++ b/apps/tests/cc2420/LplUnicastPeriodicDelivery/TestPeriodicAppC.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "TestPeriodic.h"
+
+/**
+ * This app sends a message from Transmitter node to the recevier node
+ * and waits 1000 ms between each delivery so the Rx mote's radio
+ * shuts back off and has to redetect to receive the next message.
+ * Receiver: TOS_NODE_ID != 1.
+ * Transmitter: TOS_NODE_ID == 1.
+ *
+ * @author David Moss
+ */
+ 
+configuration TestPeriodicAppC {
+}
+
+implementation {
+
+#if defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+  components CC1000ActiveMessageC as Lpl;
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB) || defined(PLATFORM_SHIMMER) || defined(PLATFORM_SHIMMER2) || defined(PLATFORM_INTELMOTE2) || defined(PLATFORM_EPIC)
+  components CC2420ActiveMessageC as Lpl;
+#else
+#error "LPL testing not supported on this platform"
+#endif
+
+  components TestPeriodicC,
+      MainC,
+      ActiveMessageC,
+      new TimerMilliC(),
+      new AMSenderC(AM_TESTPERIODICMSG),
+      new AMReceiverC(AM_TESTPERIODICMSG),
+      LedsC;
+      
+  TestPeriodicC.Boot -> MainC;
+  TestPeriodicC.SplitControl -> ActiveMessageC;
+  TestPeriodicC.LowPowerListening -> Lpl;
+  TestPeriodicC.AMPacket -> ActiveMessageC;
+  TestPeriodicC.AMSend -> AMSenderC;
+  TestPeriodicC.Receive -> AMReceiverC;
+  TestPeriodicC.Packet -> ActiveMessageC;
+  TestPeriodicC.Timer -> TimerMilliC;
+  TestPeriodicC.Leds -> LedsC;
+
+}
+
diff --git a/apps/tests/cc2420/LplUnicastPeriodicDelivery/TestPeriodicC.nc b/apps/tests/cc2420/LplUnicastPeriodicDelivery/TestPeriodicC.nc
new file mode 100644
index 00000000..4ecce836
--- /dev/null
+++ b/apps/tests/cc2420/LplUnicastPeriodicDelivery/TestPeriodicC.nc
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "TestPeriodic.h"
+
+/**
+ * This app sends a message from Transmitter node to the recevier node
+ * and waits 1000 ms between each delivery so the Rx mote's radio
+ * shuts back off and has to redetect to receive the next message.
+ * Receiver: TOS_NODE_ID != 1.
+ * Transmitter: TOS_NODE_ID == 1.
+ *
+ * @author David Moss
+ */
+
+module TestPeriodicC {
+  uses {
+    interface Boot;
+    interface SplitControl;
+    interface LowPowerListening;
+    interface AMSend;
+    interface Receive;
+    interface AMPacket;
+    interface Packet;
+    interface Leds;
+    interface Timer<TMilli>;
+  }
+}
+
+implementation {
+ 
+  uint8_t count;
+  message_t fullMsg;
+  bool transmitter;
+  
+  /**************** Prototypes ****************/
+  task void send();
+  
+  /**************** Boot Events ****************/
+  event void Boot.booted() {
+    transmitter = (call AMPacket.address() != 0);
+    count = 0;
+    
+    call LowPowerListening.setLocalWakeupInterval(1000);
+    call SplitControl.start();
+  }
+  
+  event void SplitControl.startDone(error_t error) {
+    if(transmitter) {
+      post send();
+    }
+  }
+  
+  event void SplitControl.stopDone(error_t error) {
+  }
+  
+  
+  /**************** Send Receive Events *****************/
+  event void AMSend.sendDone(message_t *msg, error_t error) {
+    if(transmitter) {
+      count++; 
+      call Timer.startOneShot(1000);
+      call Leds.led0Off();
+    }
+  }
+  
+  event message_t *Receive.receive(message_t *msg, void *payload, uint8_t len) {
+    if(!transmitter) {
+      call Leds.led1Toggle();
+    }
+    return msg;
+  }
+  
+  /**************** Timer Events ****************/
+  event void Timer.fired() {
+    if(transmitter) {
+      post send();
+    }
+  }
+  
+  /**************** Tasks ****************/
+  task void send() {
+    TestPeriodicMsg *periodicMsg = (TestPeriodicMsg *) call Packet.getPayload(&fullMsg, sizeof(TestPeriodicMsg));
+    periodicMsg->count = count;
+    call LowPowerListening.setRemoteWakeupInterval(&fullMsg, 1000);
+    if(call AMSend.send(0, &fullMsg, sizeof(TestPeriodicMsg)) != SUCCESS) {
+      post send();
+    } else {
+      call Leds.led0On();
+    }
+  }
+}
+
diff --git a/apps/tests/cc2420/README.txt b/apps/tests/cc2420/README.txt
new file mode 100644
index 00000000..c0bc194f
--- /dev/null
+++ b/apps/tests/cc2420/README.txt
@@ -0,0 +1,15 @@
+README for cc2420
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+This directory contains a number of test applications specific to the
+TI CC2420 radio chip. See the individual test applications for more
+details.
+
+Known bugs/limitations:
+
+None.
+
+
+$Id: README.txt,v 1.1 2008-06-24 17:40:30 idgay Exp $
diff --git a/apps/tests/cc2420/RssiToSerial/.cvsignore b/apps/tests/cc2420/RssiToSerial/.cvsignore
new file mode 100644
index 00000000..4e711396
--- /dev/null
+++ b/apps/tests/cc2420/RssiToSerial/.cvsignore
@@ -0,0 +1 @@
+RssiSerialMsg.java
diff --git a/apps/tests/cc2420/RssiToSerial/Makefile b/apps/tests/cc2420/RssiToSerial/Makefile
new file mode 100644
index 00000000..8e1faddf
--- /dev/null
+++ b/apps/tests/cc2420/RssiToSerial/Makefile
@@ -0,0 +1,12 @@
+COMPONENT=RssiToSerialC
+BUILD_EXTRA_DEPS = RssiSerialMsg.java SpecAnalyzer.class
+CLEAN_EXTRA = *.class RssiSerialMsg.java
+
+RssiSerialMsg.java: RssiToSerial.h
+	mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=RssiSerialMsg RssiToSerial.h rssi_serial_msg -o $@
+
+SpecAnalyzer.class: $(wildcard *.java) SpecAnalyzer.java
+	javac *.java
+
+include $(MAKERULES)
+
diff --git a/apps/tests/cc2420/RssiToSerial/README.txt b/apps/tests/cc2420/RssiToSerial/README.txt
new file mode 100644
index 00000000..dfc67671
--- /dev/null
+++ b/apps/tests/cc2420/RssiToSerial/README.txt
@@ -0,0 +1,36 @@
+README for RssiToSerial
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+This is more of a general demonstration than a test.
+
+Install this application to one node, connected to the computer.
+The node will measure the environmental RSSI from the CC2420
+and sending those readings over the serial port.
+
+Use the Java application to display the relative RSSI readings.
+
+No activity:
+[+++++++++++++++                                   ]
+
+
+Transmitter nearby:
+[+++++++++++++++++++++++++++++++++++               ]
+
+
+Since the Java side has to convert the readings into a CLI bar
+graph, it's scaled by some (possibly non-linear) factor.  
+
+
+Tools:
+  java SpecAnalyzer [-comm <packetsource>]
+
+  If not specified, the <packetsource> defaults to sf@localhost:9002 or
+  to your MOTECOM environment variable (if defined).
+
+Known bugs/limitations:
+
+None.
+
+$Id: README.txt,v 1.3 2008-07-26 02:32:44 klueska Exp $
diff --git a/apps/tests/cc2420/RssiToSerial/RssiToSerial.h b/apps/tests/cc2420/RssiToSerial/RssiToSerial.h
new file mode 100644
index 00000000..f1d9e246
--- /dev/null
+++ b/apps/tests/cc2420/RssiToSerial/RssiToSerial.h
@@ -0,0 +1,61 @@
+
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+ /**
+  * @author Jared Hill
+  */
+  
+#ifndef RSSI_TO_SERIAL_H
+#define RSSI_TO_SERIAL_H
+
+typedef nx_struct rssi_serial_msg {
+  nx_uint16_t rssiAvgValue;
+  nx_uint16_t rssiLargestValue;
+  nx_uint8_t channel;
+} rssi_serial_msg_t;
+
+enum {
+  AM_RSSI_SERIAL_MSG = 134,
+  WAIT_TIME = 256,
+  //* Using log2 samples to avoid a divide. Sending a packet every 1 second will allow
+  //* allow about 5000 samples. A packet every half second allows for 2500 samples, and
+  //* a packet every quarter second allows for 1250 samples. 
+    
+  // When to send a packet is based upon how many samples have been taken, not a 
+  // predetermined amount of time. Rough estimates of time can be found using the 
+  // conversion stated above. 
+  LOG2SAMPLES = 7,
+};
+
+
+
+#endif
diff --git a/apps/tests/cc2420/RssiToSerial/RssiToSerialC.nc b/apps/tests/cc2420/RssiToSerial/RssiToSerialC.nc
new file mode 100644
index 00000000..d9769960
--- /dev/null
+++ b/apps/tests/cc2420/RssiToSerial/RssiToSerialC.nc
@@ -0,0 +1,67 @@
+
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+#include "RssiToSerial.h"
+
+ /**
+  * This is more of a general demonstration than a test.
+  *
+  * Install this application to one node, connected to the computer.
+  * The node will measure the environmental RSSI from the CC2420 and
+  * sending those readings over the serial port.
+  *
+  * Use the Java application to display the relative RSSI readings.
+  *
+  * @author Jared Hill
+  * @date   23 March 2007
+  */
+ 
+ 
+configuration RssiToSerialC {}
+implementation {
+  components MainC, RssiToSerialP as App, LedsC;
+  components new TimerMilliC();
+  components SerialActiveMessageC as AM;
+  components ActiveMessageC;
+  components CC2420ControlC;
+  
+  App.Boot -> MainC.Boot;
+  App.SerialControl -> AM;
+  App.AMSend -> AM.AMSend[AM_RSSI_SERIAL_MSG];
+  App.AMControl -> ActiveMessageC;
+  App.Leds -> LedsC;
+  App.Packet -> AM;
+  App.ReadRssi -> CC2420ControlC.ReadRssi;
+  App.Config -> CC2420ControlC.CC2420Config;
+}
+
+
diff --git a/apps/tests/cc2420/RssiToSerial/RssiToSerialP.nc b/apps/tests/cc2420/RssiToSerial/RssiToSerialP.nc
new file mode 100644
index 00000000..0ec6bcaf
--- /dev/null
+++ b/apps/tests/cc2420/RssiToSerial/RssiToSerialP.nc
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+#include "Timer.h"
+#include "RssiToSerial.h"
+ 
+ /**
+  * This is more of a general demonstration than a test.
+  *
+  * Install this application to one node, connected to the computer.
+  * The node will measure the environmental RSSI from the CC2420 and
+  * sending those readings over the serial port.
+  *
+  * Use the Java application to display the relative RSSI readings.
+  *
+  * @author Jared Hill
+ * @date   23 March 2007
+  */
+ 
+module RssiToSerialP {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface AMSend;
+    interface SplitControl as AMControl;
+    interface SplitControl as SerialControl;
+    interface Packet;
+    interface Read<uint16_t> as ReadRssi;
+    interface CC2420Config as Config;
+  }
+}
+implementation {
+
+  /******* Global Variables ****************/
+  message_t packet;
+  bool locked;
+  uint32_t total;
+  uint16_t largest;
+  uint16_t reads;
+  
+  /******** Declare Tasks *******************/
+  task void readRssi();
+  task void sendSerialMsg();
+  
+  /************ Boot Events *****************/
+  event void Boot.booted() {
+    call AMControl.start();
+    total = 0;
+    largest = 0;
+    reads = 0;
+    locked = FALSE;
+  }
+
+  /************ AMControl Events ******************/
+  event void AMControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+      call SerialControl.start();
+    }
+    else {
+      call AMControl.start();
+    }
+  }
+
+  event void AMControl.stopDone(error_t err) {
+    // do nothing
+  }
+  
+  /***************SerialControl Events*****************/
+  event void SerialControl.startDone(error_t error){
+    if (error == SUCCESS) {
+      post readRssi();
+    }
+    else {
+      call AMControl.start();
+    }
+  }
+  
+  event void SerialControl.stopDone(error_t error){
+    //do nothing
+  }
+  
+  /***************** AMSend Events ****************************/
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    
+    if (&packet == bufPtr) {
+      locked = FALSE;
+    }
+    //post readRssi();
+  }
+  
+  /**************** ReadRssi Events *************************/
+  event void ReadRssi.readDone(error_t result, uint16_t val ){
+    
+    if(result != SUCCESS){
+      post readRssi();
+      return;
+    }
+    atomic{
+      total += val;
+      reads ++;
+      if(largest < val){
+        largest = val;
+      }
+    } 
+    if(reads == (1<<LOG2SAMPLES)){
+      post sendSerialMsg();
+    }
+    
+    post readRssi();
+    
+  }
+  
+  /********************* Config Events *************************/
+  event void Config.syncDone(error_t error){
+  
+  }
+
+  /***************** TASKS *****************************/  
+  task void readRssi(){
+   
+    if(call ReadRssi.read() != SUCCESS){
+      post readRssi();
+    }
+  }
+  
+  task void sendSerialMsg(){
+    if(locked){
+      return;
+    }
+    else {
+      rssi_serial_msg_t* rsm = (rssi_serial_msg_t*)call Packet.getPayload(&packet, sizeof(rssi_serial_msg_t));
+      
+      if (call Packet.maxPayloadLength() < sizeof(rssi_serial_msg_t)) {
+	    return;
+      }
+	  atomic{
+	    rsm->rssiAvgValue = (total >> (LOG2SAMPLES));
+	    rsm->rssiLargestValue = largest;
+	    total = 0;
+	    largest = 0;
+	    reads = 0;
+	  }
+	  rsm->channel = call Config.getChannel();
+      if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(rssi_serial_msg_t)) == SUCCESS) {
+	    locked = TRUE;
+      }
+    }
+  }
+
+}
+
+
+
+
diff --git a/apps/tests/cc2420/RssiToSerial/SpecAnalyzer.java b/apps/tests/cc2420/RssiToSerial/SpecAnalyzer.java
new file mode 100644
index 00000000..ccadaff0
--- /dev/null
+++ b/apps/tests/cc2420/RssiToSerial/SpecAnalyzer.java
@@ -0,0 +1,163 @@
+
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Java class to display RSSI readings returned from a mote running the
+ * RssiToSerial application.
+ *
+ * @author Jared Hill
+ */
+
+import net.tinyos.message.Message;
+import net.tinyos.message.MessageListener;
+import net.tinyos.message.MoteIF;
+import net.tinyos.message.SerialPacket;
+import net.tinyos.packet.BuildSource;
+import net.tinyos.packet.PhoenixSource;
+import net.tinyos.util.PrintStreamMessenger;
+
+public class SpecAnalyzer implements MessageListener {
+
+  /** Communication with the mote */
+  private MoteIF mote;
+
+  /** Broadcast Address */
+  public static final short TOS_BCAST_ADDR = (short) 0xffff;
+
+  /** The message from the mote */
+  private RssiSerialMsg rssiMsg;
+
+  /** The total number of characters written last time */
+  private int lastCharsWritten = 0;
+  
+  /** The maximum size of the bar on the command line, in characters */
+  private static final int MAX_CHARACTERS = 50;
+  
+  /**
+   * Constructor
+   * 
+   * @param argv
+   */
+  public SpecAnalyzer(MoteIF mif) {
+
+    try {
+      System.out.println("Connecting to serial forwarder...");
+      mote = mif;
+      mote.registerListener(new RssiSerialMsg(), this);
+    } catch (Exception e) {
+      System.err.println("Couldn't contact serial forwarder");
+    }
+
+  }
+
+  /**
+   * Received a message from the mote
+   */
+  synchronized public void messageReceived(int dest,
+      Message m) {
+    rssiMsg = (RssiSerialMsg) m;
+    updateSpectrum(rssiMsg.get_rssiLargestValue(), rssiMsg.get_rssiAvgValue());
+
+  }
+
+  /**
+   * Overwrites the current command line prompt with blank space
+   * 
+   */
+  void clearSpectrum() {
+    for(int i = 0; i < lastCharsWritten; i++) {
+      System.out.print('\b');
+    }
+  }
+
+  /**
+   * Prints the magnitude of the spectrum to stdout. Specifically, it prints
+   * (largest - average) "+" signs to stdout.
+   * 
+   * @param largest
+   *          the largest rssi value taken during the sample period
+   * @param avg
+   *          the average rssi value taken during the sample period
+   */
+  void updateSpectrum(int largest, int avg) {
+    clearSpectrum();
+    String bar = "[";
+    int size = (int) ((float) largest * (float) ((float) MAX_CHARACTERS / (float) (255)));
+    
+    for(int i = 0; i < size && i < MAX_CHARACTERS; i++) {
+      bar += "+";
+    }
+    
+    for(int i = 0; i < (MAX_CHARACTERS - size); i++) {
+      bar += " ";
+    }
+    
+    bar += "]";
+    
+    lastCharsWritten = bar.length();
+    System.out.print(bar);
+  }
+  
+  private static void usage() {
+    System.err.println("usage: SpecAnalyzer [-comm <source>]");
+  }
+
+  /**
+   * Main Method
+   * 
+   * @param argv
+   */
+  public static void main(String[] args) {
+    String source = null;
+    if (args.length == 2) {
+      if (!args[0].equals("-comm")) {
+        usage();
+        System.exit(1);
+      }
+      source = args[1];
+    } else if (args.length != 0) {
+      usage();
+      System.exit(1);
+    }
+
+    PhoenixSource phoenix;
+
+    if (source == null) {
+      phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err);
+    } else {
+      phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err);
+    }
+
+    MoteIF mif = new MoteIF(phoenix);
+    new SpecAnalyzer(mif);
+  }
+}
diff --git a/apps/tests/cc2420/TestAcks/Makefile b/apps/tests/cc2420/TestAcks/Makefile
new file mode 100644
index 00000000..4a55f07c
--- /dev/null
+++ b/apps/tests/cc2420/TestAcks/Makefile
@@ -0,0 +1,6 @@
+COMPONENT=TestAcksC
+
+include $(MAKERULES)
+
+
+ 
diff --git a/apps/tests/cc2420/TestAcks/README.txt b/apps/tests/cc2420/TestAcks/README.txt
new file mode 100644
index 00000000..fa6e7682
--- /dev/null
+++ b/apps/tests/cc2420/TestAcks/README.txt
@@ -0,0 +1,24 @@
+README for TestAcks
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+Compile and install this application to two motes, both using ID 1
+
+Expectations:
+Led0 Toggles on a dropped ack
+Led1 Toggles on a received ack
+Led2 Toggles when a message is received
+
+In short, Leds 1&2 should be toggling the majority of the time, until the other receiver
+stops receiving packets by turning off or moving out of range.
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
+
+$Id: README.txt,v 1.3 2008-07-26 02:32:44 klueska Exp $
diff --git a/apps/tests/cc2420/TestAcks/TestAcksC.nc b/apps/tests/cc2420/TestAcks/TestAcksC.nc
new file mode 100644
index 00000000..2ad42356
--- /dev/null
+++ b/apps/tests/cc2420/TestAcks/TestAcksC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Test for radio acknowledgements
+ * Program all motes up with ID 1
+ *   Led0 = Received a message
+ *   Led1 = Got an ack
+ *   Led2 = Missed an ack
+ * @author David Moss
+ */
+ 
+
+configuration TestAcksC {
+}
+
+implementation {
+  components TestAcksP,
+      MainC,
+      ActiveMessageC,
+      new AMSenderC(128),
+      new AMReceiverC(128),
+      new TimerMilliC(),
+      LedsC;
+      
+  TestAcksP.Boot -> MainC;
+  TestAcksP.SplitControl -> ActiveMessageC;
+  TestAcksP.Leds -> LedsC;
+  TestAcksP.AMSend -> AMSenderC;
+  TestAcksP.Receive -> AMReceiverC;
+  TestAcksP.PacketAcknowledgements -> ActiveMessageC;
+  TestAcksP.Timer -> TimerMilliC;
+  
+}
diff --git a/apps/tests/cc2420/TestAcks/TestAcksP.nc b/apps/tests/cc2420/TestAcks/TestAcksP.nc
new file mode 100644
index 00000000..19630807
--- /dev/null
+++ b/apps/tests/cc2420/TestAcks/TestAcksP.nc
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Test for radio acknowledgements
+ * Program all motes up with ID 1
+ *   Led0 = Missed an ack
+ *   Led1 = Got an ack
+ *   Led2 = Sent a message
+ * @author David Moss
+ */
+ 
+module TestAcksP {
+  uses {
+    interface Boot;
+    interface SplitControl;
+    interface AMSend;
+    interface Receive;
+    interface Leds;
+    interface PacketAcknowledgements;
+    interface Timer<TMilli>;
+  }
+}
+
+implementation {
+  
+  /** Message to transmit */
+  message_t myMsg;
+  
+  enum {  
+    DELAY_BETWEEN_MESSAGES = 50,
+  };
+  
+  
+  /***************** Prototypes ****************/
+  task void send();
+  
+  /***************** Boot Events ****************/
+  event void Boot.booted() {
+    call SplitControl.start();
+  }
+  
+  /***************** SplitControl Events ****************/
+  event void SplitControl.startDone(error_t error) {
+    post send();
+  }
+  
+  event void SplitControl.stopDone(error_t error) {
+  }
+  
+  /***************** Receive Events ****************/
+  event message_t *Receive.receive(message_t *msg, void *payload, uint8_t len) {
+    call Leds.led2Toggle();
+    return msg;
+  }
+  
+  /***************** AMSend Events ****************/
+  event void AMSend.sendDone(message_t *msg, error_t error) {
+    if(call PacketAcknowledgements.wasAcked(msg)) {
+      call Leds.led1Toggle();
+      call Leds.led0Off();
+    } else {
+      call Leds.led0Toggle();
+      call Leds.led1Off();
+    }
+    
+    if(DELAY_BETWEEN_MESSAGES > 0) {
+      call Timer.startOneShot(DELAY_BETWEEN_MESSAGES);
+    } else {
+      post send();
+    }
+  }
+  
+  /***************** Timer Events ****************/
+  event void Timer.fired() {
+    post send();
+  }
+  
+  /***************** Tasks ****************/
+  task void send() {
+    call PacketAcknowledgements.requestAck(&myMsg);
+    if(call AMSend.send(1, &myMsg, 0) != SUCCESS) {
+      post send();
+    }
+  }
+}
diff --git a/apps/tests/cc2420/TestPacketLink/.cvsignore b/apps/tests/cc2420/TestPacketLink/.cvsignore
new file mode 100644
index 00000000..83598393
--- /dev/null
+++ b/apps/tests/cc2420/TestPacketLink/.cvsignore
@@ -0,0 +1 @@
+PacketLinkMsg.java
diff --git a/apps/tests/cc2420/TestPacketLink/Makefile b/apps/tests/cc2420/TestPacketLink/Makefile
new file mode 100644
index 00000000..b1ca74d0
--- /dev/null
+++ b/apps/tests/cc2420/TestPacketLink/Makefile
@@ -0,0 +1,12 @@
+COMPONENT=TestPacketLinkC
+CFLAGS += -DPACKET_LINK
+BUILD_EXTRA_DEPS = PacketLinkMsg.java TestPacketLink.class
+CLEAN_EXTRA = *.class PacketLinkMsg.java
+
+PacketLinkMsg.java: TestPacketLink.h
+	mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=PacketLinkMsg TestPacketLink.h PacketLinkMsg -o $@
+
+TestPacketLink.class: $(wildcard *.java) TestPacketLink.java
+	javac *.java
+
+include $(MAKERULES)
diff --git a/apps/tests/cc2420/TestPacketLink/README.txt b/apps/tests/cc2420/TestPacketLink/README.txt
new file mode 100644
index 00000000..db2cbda2
--- /dev/null
+++ b/apps/tests/cc2420/TestPacketLink/README.txt
@@ -0,0 +1,42 @@
+README for TestPacketLink
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+Test the effectiveness of the PacketLink layer
+
+INSTALL
+  Transmitter: id == 1, 2, 3, 4, or 5 (up to MAX_TRANSMITTERS)
+  Receiver: id == 0, plugged into the computer
+
+EXPECTATIONS
+   Transmitter (ID not 0) -
+     led1 toggling on every successfully delivered message
+     led0 toggling on every unsuccessfully delivered message (and stay on
+       until the next dropped packet)
+   
+   Receiver (ID 0) -
+     Leds represent the binary count of sets of messages that were dropped.
+     Ideally, if the transmitter and receiver are in range of each other, 
+     the receiver's LEDs should never turn on.  You can pull the receiver
+     out of range for up to two seconds before the transmission will fail.
+     If you aren't convinced the receiver is doing anything because its 
+     leds aren't flashing, just turn it off and watch the transmitter's
+     reaction.
+
+
+Tools:
+
+  java TestPacketLink [-comm <packetsource>]
+
+  If not specified, the <packetsource> defaults to sf@localhost:9002 or
+  to your MOTECOM environment variable (if defined).
+
+  This application will report dropped and duplicate packets as seen on
+  the receiver.
+
+Known bugs/limitations:
+
+None.
+
+$Id: README.txt,v 1.5 2008-09-22 20:52:39 idgay Exp $
diff --git a/apps/tests/cc2420/TestPacketLink/TestPacketLink.h b/apps/tests/cc2420/TestPacketLink/TestPacketLink.h
new file mode 100644
index 00000000..1f225354
--- /dev/null
+++ b/apps/tests/cc2420/TestPacketLink/TestPacketLink.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+
+#ifndef TESTPACKETLINK_H
+#define TESTPACKETLINK_H
+
+typedef nx_struct PacketLinkMsg {
+  nx_uint32_t count;
+  nx_uint16_t src;
+  nx_uint8_t cmd;
+} PacketLinkMsg;
+
+enum {
+  AM_PACKETLINKMSG = 128,
+};
+
+enum {
+  CMD_DROPPED_PACKET = 0,
+  CMD_DUPLICATE_PACKET = 1,
+};
+
+#ifndef MAX_TRANSMITTERS
+#define MAX_TRANSMITTERS 5
+#endif
+
+#endif
+
diff --git a/apps/tests/cc2420/TestPacketLink/TestPacketLink.java b/apps/tests/cc2420/TestPacketLink/TestPacketLink.java
new file mode 100644
index 00000000..7280d321
--- /dev/null
+++ b/apps/tests/cc2420/TestPacketLink/TestPacketLink.java
@@ -0,0 +1,105 @@
+
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+import net.tinyos.message.Message;
+import net.tinyos.message.MessageListener;
+import net.tinyos.message.MoteIF;
+import net.tinyos.message.SerialPacket;
+import net.tinyos.packet.BuildSource;
+import net.tinyos.packet.PhoenixSource;
+import net.tinyos.util.PrintStreamMessenger;
+
+/**
+ * Feedback on from a TestPacketLink receiver
+ * whether packets have been dropped or duplicated
+ * @author David Moss
+ *
+ */
+public class TestPacketLink implements MessageListener {
+
+  private MoteIF moteIF;
+  
+  private static final short CMD_DROPPED_PACKET = 0;
+  
+  private static final short CMD_DUPLICATE_PACKET = 1;
+  
+  /**
+   * Constructor
+   * @param moteIF
+   */
+  public TestPacketLink(MoteIF moteIF) {
+    this.moteIF = moteIF;
+    this.moteIF.registerListener(new PacketLinkMsg(), this);
+  }
+
+  public void messageReceived(int s, Message message) {
+    PacketLinkMsg msg = (PacketLinkMsg) message;
+    if(msg.get_cmd() == CMD_DROPPED_PACKET) {
+      System.out.println("Dropped packet from source " + msg.get_src());
+    } else {
+      System.out.println("Duplicate packet from source " + msg.get_src());
+    }
+  }
+  
+  private static void usage() {
+    System.err.println("usage: TestSerial [-comm <source>]");
+  }
+  
+  public static void main(String[] args) throws Exception {
+    String source = null;
+    if (args.length == 2) {
+      if (!args[0].equals("-comm")) {
+	usage();
+	System.exit(1);
+      }
+      source = args[1];
+    }
+    else if (args.length != 0) {
+      usage();
+      System.exit(1);
+    }
+    
+    PhoenixSource phoenix;
+    
+    if (source == null) {
+      phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err);
+    }
+    else {
+      phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err);
+    }
+
+    MoteIF mif = new MoteIF(phoenix);
+    new TestPacketLink(mif);
+  }
+
+
+}
diff --git a/apps/tests/cc2420/TestPacketLink/TestPacketLinkC.nc b/apps/tests/cc2420/TestPacketLink/TestPacketLinkC.nc
new file mode 100644
index 00000000..22fb9e6e
--- /dev/null
+++ b/apps/tests/cc2420/TestPacketLink/TestPacketLinkC.nc
@@ -0,0 +1,89 @@
+
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "TestPacketLink.h"
+
+/**
+ * Test the effectiveness of the PacketLink layer
+ *
+ * Transmitter == 1, 2, 3, 4, or 5 (up to MAX_TRANSMITTERS)
+ * Receiver == 0
+ *
+ * Expect:
+ *   Transmitter (ID not 0) -
+ *     led1 toggling on every successfully delivered message
+ *     led0 toggling on every unsuccessfully delivered message (and stay on
+ *       until the next dropped packet)
+ *   
+ *   Receiver (ID 0) -
+ *     Leds represent the binary count of sets of messages that were dropped
+ *     or duplicated.
+ * 
+ *     Ideally, if the transmitter and receiver are in range of each other, 
+ *     the receiver's LEDs should never turn on.  You can pull the receiver
+ *     out of range for up to two seconds before the transmission will fail.
+ *     If you aren't convinced the receiver is doing anything because its 
+ *     leds aren't flashing, just turn it off and watch the transmitter's
+ *     reaction.
+ *
+ * @author David Moss
+ */
+ 
+configuration TestPacketLinkC {
+}
+
+implementation {
+
+  components TestPacketLinkP,
+      MainC,
+      ActiveMessageC,
+      CC2420ActiveMessageC,
+      new AMSenderC(AM_PACKETLINKMSG),
+      new AMReceiverC(AM_PACKETLINKMSG),
+      SerialActiveMessageC,
+      new SerialAMSenderC(AM_PACKETLINKMSG),
+      new TimerMilliC(),
+      LedsC;
+      
+  TestPacketLinkP.Boot -> MainC;
+  TestPacketLinkP.RadioSplitControl -> ActiveMessageC;
+  TestPacketLinkP.SerialSplitControl -> SerialActiveMessageC;
+  TestPacketLinkP.SerialAMSend -> SerialAMSenderC;
+  TestPacketLinkP.PacketLink -> CC2420ActiveMessageC;
+  TestPacketLinkP.AMPacket -> ActiveMessageC;
+  TestPacketLinkP.AMSend -> AMSenderC;
+  TestPacketLinkP.Receive -> AMReceiverC;
+  TestPacketLinkP.Timer -> TimerMilliC;
+  TestPacketLinkP.Leds -> LedsC;
+  
+}
+
diff --git a/apps/tests/cc2420/TestPacketLink/TestPacketLinkP.nc b/apps/tests/cc2420/TestPacketLink/TestPacketLinkP.nc
new file mode 100644
index 00000000..8c83ff7f
--- /dev/null
+++ b/apps/tests/cc2420/TestPacketLink/TestPacketLinkP.nc
@@ -0,0 +1,206 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+#include "TestPacketLink.h"
+
+/**
+ * Test the effectiveness of the PacketLink layer
+ *
+ * Transmitter == 1, 2, 3, 4, or 5 (up to MAX_TRANSMITTERS)
+ * Receiver == 0
+ *
+ * Expect:
+ *   Transmitter (ID not 0) -
+ *     led1 toggling on every successfully delivered message
+ *     led0 toggling on every unsuccessfully delivered message (and stay on
+ *       until the next dropped packet)
+ *   
+ *   Receiver (ID 0) -
+ *     Leds represent the binary count of sets of messages that were dropped
+ *     or duplicated.
+ * 
+ *     Ideally, if the transmitter and receiver are in range of each other, 
+ *     the receiver's LEDs should never turn on.  You can pull the receiver
+ *     out of range for up to two seconds before the transmission will fail.
+ *     If you aren't convinced the receiver is doing anything because its 
+ *     leds aren't flashing, just turn it off and watch the transmitter's
+ *     reaction.
+ *
+ * @author David Moss
+ */
+  
+module TestPacketLinkP {
+  uses {
+    interface Boot;
+    interface SplitControl as RadioSplitControl;
+    interface SplitControl as SerialSplitControl;
+    interface AMSend;
+    interface AMSend as SerialAMSend;
+    interface AMPacket;
+    interface Receive;
+    interface PacketLink;
+    interface Leds;
+    interface Timer<TMilli>;
+  }
+}
+
+implementation {
+
+  /** The message we'll be sending */
+  message_t myMsg;
+  
+  /** Serial message for status */
+  message_t serialMsg;
+  
+  /** The local count we're sending or should receive on each unique message */
+  uint32_t count[MAX_TRANSMITTERS];
+  
+  /** The total number of packets missed by the receiver */
+  uint8_t missedPackets;
+  
+  /** True if this mote is the transmitter mote */
+  bool transmitter;
+  
+  enum {
+    MSG_DESTINATION = 0,
+  };
+  
+  /***************** Prototypes ****************/
+  task void send();
+  task void sendSerial();
+  
+  /***************** Boot Events ****************/
+  event void Boot.booted() {
+    int i;
+    
+    /*
+     * Setup this message in advance to retry up to 50 times with 40 ms of
+     * delay between each message.  50 * 40 ms = 2 seconds before it quits.
+     * It only needs to be setup once to be stored in the msg's metadata.
+     */
+    call PacketLink.setRetries(&myMsg, 50);
+    call PacketLink.setRetryDelay(&myMsg, 40);
+    missedPackets = 0;
+    
+    for(i = 0; i < MAX_TRANSMITTERS; i++) {
+      count[i] = 0;
+    }
+    
+    transmitter = (call AMPacket.address() != 0);
+    call RadioSplitControl.start();
+    
+    if(!transmitter) {
+      call SerialSplitControl.start();
+    }
+  }
+  
+  /***************** SplitControl Events *****************/
+  event void RadioSplitControl.startDone(error_t error) {
+    if(transmitter) {
+      post send();
+    }
+  }
+  
+  event void RadioSplitControl.stopDone(error_t error) {
+  }
+
+  /***************** SerialSplitControl Events ****************/
+  event void SerialSplitControl.startDone(error_t error) {
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {
+  }
+  
+  /***************** AMSend Events ****************/
+  event void AMSend.sendDone(message_t *msg, error_t error) {
+    if(call PacketLink.wasDelivered(msg)) {
+      count[0]++;
+      call Leds.led1Toggle();
+    } else {
+      call Leds.led0Toggle();
+    }
+    
+    ((PacketLinkMsg *) call AMSend.getPayload(&myMsg, sizeof(PacketLinkMsg)))->count = count[0];
+    call Timer.startOneShot(50);
+  }
+  
+  /***************** SerialAMSend Events ****************/
+  event void SerialAMSend.sendDone(message_t *msg, error_t error) {
+  }
+  
+  /***************** Receive Events ****************/
+  event message_t *Receive.receive(message_t *msg, void *payload, uint8_t len) {
+    PacketLinkMsg *linkMsg = (PacketLinkMsg *) payload;
+    uint16_t source = call AMPacket.source(msg);
+    
+    if(transmitter || source > MAX_TRANSMITTERS - 1) {
+      return msg;
+    }
+    
+    if(linkMsg->count != count[source]) {
+      ((PacketLinkMsg *) (call SerialAMSend.getPayload(&serialMsg, sizeof(PacketLinkMsg))))->src = source;
+      if(linkMsg->count > count[source]) {
+        ((PacketLinkMsg *) (call SerialAMSend.getPayload(&serialMsg, sizeof(PacketLinkMsg))))->cmd = CMD_DROPPED_PACKET;
+      } else {
+        ((PacketLinkMsg *) (call SerialAMSend.getPayload(&serialMsg, sizeof(PacketLinkMsg))))->cmd = CMD_DUPLICATE_PACKET;
+      }
+      post sendSerial();
+      
+      if(count[source] != 0) {
+        missedPackets++;
+        call Leds.set(missedPackets);
+      }
+    }
+    
+    count[source] = linkMsg->count;
+    count[source]++;
+    return msg;
+  }
+  
+  /***************** Timer Events ***************/
+  event void Timer.fired() {
+    post send();
+  }
+  
+  /***************** Tasks ****************/
+  task void send() {
+    if(call AMSend.send(MSG_DESTINATION, &myMsg, sizeof(PacketLinkMsg)) != SUCCESS) {
+      post send();
+    }
+  }
+  
+  task void sendSerial() {
+    if(call SerialAMSend.send(0, &serialMsg, sizeof(PacketLinkMsg)) != SUCCESS) {
+      post sendSerial();
+    }
+  }
+}
+
diff --git a/apps/tests/cc2420/TestSecurity/BaseStation/BaseStationC.nc b/apps/tests/cc2420/TestSecurity/BaseStation/BaseStationC.nc
new file mode 100644
index 00000000..497c553b
--- /dev/null
+++ b/apps/tests/cc2420/TestSecurity/BaseStation/BaseStationC.nc
@@ -0,0 +1,103 @@
+// $Id: BaseStationC.nc,v 1.3 2010-06-29 22:07:25 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * The TinyOS 2.x base station that forwards packets between the UART
+ * and radio.It replaces the GenericBase of TinyOS 1.0 and the
+ * TOSBase of TinyOS 1.1.
+ *
+ * <p>On the serial link, BaseStation sends and receives simple active
+ * messages (not particular radio packets): on the radio link, it
+ * sends radio active messages, whose format depends on the network
+ * stack being used. BaseStation will copy its compiled-in group ID to
+ * messages moving from the serial link to the radio, and will filter
+ * out incoming radio messages that do not contain that group ID.</p>
+ *
+ * <p>BaseStation includes queues in both directions, with a guarantee
+ * that once a message enters a queue, it will eventually leave on the
+ * other interface. The queues allow the BaseStation to handle load
+ * spikes.</p>
+ *
+ * <p>BaseStation acknowledges a message arriving over the serial link
+ * only if that message was successfully enqueued for delivery to the
+ * radio link.</p>
+ *
+ * <p>The LEDS are programmed to toggle as follows:</p>
+ * <ul>
+ * <li><b>RED Toggle:</b>: Message bridged from serial to radio</li>
+ * <li><b>GREEN Toggle:</b> Message bridged from radio to serial</li>
+ * <li><b>YELLOW/BLUE Toggle:</b> Dropped message due to queue overflow in either direction</li>
+ * </ul>
+ *
+ * @author Phil Buonadonna
+ * @author Gilman Tolle
+ * @author David Gay
+ * @author Philip Levis
+ * @date August 10 2005
+ */
+
+configuration BaseStationC {
+}
+implementation {
+  components MainC, BaseStationP, LedsC;
+  components ActiveMessageC as Radio, SerialActiveMessageC as Serial;
+  components CC2420KeysC;
+  
+  MainC.Boot <- BaseStationP;
+
+  BaseStationP.RadioControl -> Radio;
+  BaseStationP.SerialControl -> Serial;
+  
+  BaseStationP.UartSend -> Serial;
+  BaseStationP.UartReceive -> Serial.Receive;
+  BaseStationP.UartPacket -> Serial;
+  BaseStationP.UartAMPacket -> Serial;
+  
+  BaseStationP.RadioSend -> Radio;
+  BaseStationP.RadioReceive -> Radio.Receive;
+  BaseStationP.RadioSnoop -> Radio.Snoop;
+  BaseStationP.RadioPacket -> Radio;
+  BaseStationP.RadioAMPacket -> Radio;
+  
+  BaseStationP.Leds -> LedsC;
+  BaseStationP.CC2420Keys -> CC2420KeysC;
+}
diff --git a/apps/tests/cc2420/TestSecurity/BaseStation/BaseStationP.nc b/apps/tests/cc2420/TestSecurity/BaseStation/BaseStationP.nc
new file mode 100644
index 00000000..7a32955a
--- /dev/null
+++ b/apps/tests/cc2420/TestSecurity/BaseStation/BaseStationP.nc
@@ -0,0 +1,318 @@
+// $Id: BaseStationP.nc,v 1.3 2010-06-29 22:07:27 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * @author Phil Buonadonna
+ * @author Gilman Tolle
+ * @author David Gay
+ * Revision:	$Id: BaseStationP.nc,v 1.3 2010-06-29 22:07:27 scipio Exp $
+ */
+  
+/* 
+ * BaseStationP bridges packets between a serial channel and the radio.
+ * Messages moving from serial to radio will be tagged with the group
+ * ID compiled into the TOSBase, and messages moving from radio to
+ * serial will be filtered by that same group id.
+ */
+
+#include "AM.h"
+#include "Serial.h"
+
+module BaseStationP @safe() {
+  uses {
+    interface Boot;
+    interface SplitControl as SerialControl;
+    interface SplitControl as RadioControl;
+
+    interface AMSend as UartSend[am_id_t id];
+    interface Receive as UartReceive[am_id_t id];
+    interface Packet as UartPacket;
+    interface AMPacket as UartAMPacket;
+    
+    interface AMSend as RadioSend[am_id_t id];
+    interface Receive as RadioReceive[am_id_t id];
+    interface Receive as RadioSnoop[am_id_t id];
+    interface Packet as RadioPacket;
+    interface AMPacket as RadioAMPacket;
+
+    interface CC2420Keys;
+
+    interface Leds;
+  }
+}
+
+implementation
+{
+  enum {
+    UART_QUEUE_LEN = 12,
+    RADIO_QUEUE_LEN = 12,
+  };
+
+  message_t  uartQueueBufs[UART_QUEUE_LEN];
+  message_t  * ONE_NOK uartQueue[UART_QUEUE_LEN];
+  uint8_t    uartIn, uartOut;
+  bool       uartBusy, uartFull;
+
+  message_t  radioQueueBufs[RADIO_QUEUE_LEN];
+  message_t  * ONE_NOK radioQueue[RADIO_QUEUE_LEN];
+  uint8_t    radioIn, radioOut;
+  bool       radioBusy, radioFull;
+
+  uint8_t key[16] = {0x98,0x67,0x7F,0xAF,0xD6,0xAD,0xB7,0x0C,0x59,0xE8,0xD9,0x47,0xC9,0x71,0x15,0x0F};
+
+  task void uartSendTask();
+  task void radioSendTask();
+
+  void dropBlink() {
+    call Leds.led2Toggle();
+  }
+
+  void failBlink() {
+    call Leds.led2Toggle();
+  }
+
+  event void Boot.booted() {
+    uint8_t i;
+
+    for (i = 0; i < UART_QUEUE_LEN; i++)
+      uartQueue[i] = &uartQueueBufs[i];
+    uartIn = uartOut = 0;
+    uartBusy = FALSE;
+    uartFull = TRUE;
+
+    for (i = 0; i < RADIO_QUEUE_LEN; i++)
+      radioQueue[i] = &radioQueueBufs[i];
+    radioIn = radioOut = 0;
+    radioBusy = FALSE;
+    radioFull = TRUE;
+
+    call RadioControl.start();
+    call SerialControl.start();
+  }
+
+  event void RadioControl.startDone(error_t error) {
+    if (error == SUCCESS) {
+      radioFull = FALSE;
+      call CC2420Keys.setKey(1, key);
+    }
+  }
+
+  event void SerialControl.startDone(error_t error) {
+    if (error == SUCCESS) {
+      uartFull = FALSE;
+    }
+  }
+
+  event void SerialControl.stopDone(error_t error) {}
+  event void RadioControl.stopDone(error_t error) {}
+
+  event void CC2420Keys.setKeyDone(uint8_t keyNo, uint8_t* skey) {}
+
+  uint8_t count = 0;
+
+  message_t* ONE receive(message_t* ONE msg, void* payload, uint8_t len);
+  
+  event message_t *RadioSnoop.receive[am_id_t id](message_t *msg,
+						    void *payload,
+						    uint8_t len) {
+    return receive(msg, payload, len);
+  }
+  
+  event message_t *RadioReceive.receive[am_id_t id](message_t *msg,
+						    void *payload,
+						    uint8_t len) {
+    return receive(msg, payload, len);
+  }
+
+  message_t* receive(message_t *msg, void *payload, uint8_t len) {
+    message_t *ret = msg;
+
+    atomic {
+      if (!uartFull)
+	{
+	  ret = uartQueue[uartIn];
+	  uartQueue[uartIn] = msg;
+
+	  uartIn = (uartIn + 1) % UART_QUEUE_LEN;
+	
+	  if (uartIn == uartOut)
+	    uartFull = TRUE;
+
+	  if (!uartBusy)
+	    {
+	      post uartSendTask();
+	      uartBusy = TRUE;
+	    }
+	}
+      else
+	dropBlink();
+    }
+    
+    return ret;
+  }
+
+  uint8_t tmpLen;
+  
+  task void uartSendTask() {
+    uint8_t len;
+    am_id_t id;
+    am_addr_t addr, src;
+    message_t* msg;
+    atomic
+      if (uartIn == uartOut && !uartFull)
+	{
+	  uartBusy = FALSE;
+	  return;
+	}
+
+    msg = uartQueue[uartOut];
+    tmpLen = len = call RadioPacket.payloadLength(msg);
+    id = call RadioAMPacket.type(msg);
+    addr = call RadioAMPacket.destination(msg);
+    src = call RadioAMPacket.source(msg);
+    call UartPacket.clear(msg);
+    call UartAMPacket.setSource(msg, src);
+
+    if (call UartSend.send[id](addr, uartQueue[uartOut], len) == SUCCESS)
+      call Leds.led1Toggle();
+    else
+      {
+	failBlink();
+	post uartSendTask();
+      }
+  }
+
+  event void UartSend.sendDone[am_id_t id](message_t* msg, error_t error) {
+    if (error != SUCCESS)
+      failBlink();
+    else
+      atomic
+	if (msg == uartQueue[uartOut])
+	  {
+	    if (++uartOut >= UART_QUEUE_LEN)
+	      uartOut = 0;
+	    if (uartFull)
+	      uartFull = FALSE;
+	  }
+    post uartSendTask();
+  }
+
+  event message_t *UartReceive.receive[am_id_t id](message_t *msg,
+						   void *payload,
+						   uint8_t len) {
+    message_t *ret = msg;
+    bool reflectToken = FALSE;
+
+    atomic
+      if (!radioFull)
+	{
+	  reflectToken = TRUE;
+	  ret = radioQueue[radioIn];
+	  radioQueue[radioIn] = msg;
+	  if (++radioIn >= RADIO_QUEUE_LEN)
+	    radioIn = 0;
+	  if (radioIn == radioOut)
+	    radioFull = TRUE;
+
+	  if (!radioBusy)
+	    {
+	      post radioSendTask();
+	      radioBusy = TRUE;
+	    }
+	}
+      else
+	dropBlink();
+
+    if (reflectToken) {
+      //call UartTokenReceive.ReflectToken(Token);
+    }
+    
+    return ret;
+  }
+
+  task void radioSendTask() {
+    uint8_t len;
+    am_id_t id;
+    am_addr_t addr,source;
+    message_t* msg;
+    
+    atomic
+      if (radioIn == radioOut && !radioFull)
+	{
+	  radioBusy = FALSE;
+	  return;
+	}
+
+    msg = radioQueue[radioOut];
+    len = call UartPacket.payloadLength(msg);
+    addr = call UartAMPacket.destination(msg);
+    source = call UartAMPacket.source(msg);
+    id = call UartAMPacket.type(msg);
+
+    call RadioPacket.clear(msg);
+    call RadioAMPacket.setSource(msg, source);
+    
+    if (call RadioSend.send[id](addr, msg, len) == SUCCESS)
+      call Leds.led0Toggle();
+    else
+      {
+	failBlink();
+	post radioSendTask();
+      }
+  }
+
+  event void RadioSend.sendDone[am_id_t id](message_t* msg, error_t error) {
+    if (error != SUCCESS)
+      failBlink();
+    else
+      atomic
+	if (msg == radioQueue[radioOut])
+	  {
+	    if (++radioOut >= RADIO_QUEUE_LEN)
+	      radioOut = 0;
+	    if (radioFull)
+	      radioFull = FALSE;
+	  }
+    
+    post radioSendTask();
+  }
+}  
diff --git a/apps/tests/cc2420/TestSecurity/BaseStation/Makefile b/apps/tests/cc2420/TestSecurity/BaseStation/Makefile
new file mode 100644
index 00000000..0015d833
--- /dev/null
+++ b/apps/tests/cc2420/TestSecurity/BaseStation/Makefile
@@ -0,0 +1,8 @@
+COMPONENT=BaseStationC
+CFLAGS += -DCC2420_NO_ACKNOWLEDGEMENTS
+CFLAGS += -DCC2420_NO_ADDRESS_RECOGNITION
+CFLAGS += -DCC2420_HW_SECURITY
+CFLAGS += -DTOSH_DATA_LENGTH=115
+CFLAGS += -DTASKLET_IS_TASK
+include $(MAKERULES)
+
diff --git a/apps/tests/cc2420/TestSecurity/README.txt b/apps/tests/cc2420/TestSecurity/README.txt
new file mode 100644
index 00000000..84fbc2cc
--- /dev/null
+++ b/apps/tests/cc2420/TestSecurity/README.txt
@@ -0,0 +1,49 @@
+README for TestSecurity
+
+Author/Contact:
+JeongGil Ko <jgko@cs.jhu.edu>
+Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+Jong Hyun Lim <ljh@cs.jhu.edu>
+
+Description:
+
+Test the CC2420 hardware security support
+
+
+Applications:
+
+1. RadioCountToLeds1/ 
+
+This application is a modification to the RadioCountToLeds/
+application with CC2420 security features added to outgoing
+packets. The packets are decrypted at the receiver node. 
+
+> INSTALL
+
+Compile one node with ID 1 as the transmitter and other nodes with any
+node IDs to receive the decrypted packets
+
+>EXPECTATIONS
+
+LEDs on the receiver nodes will blink their LEDs sequentially like the
+original RadioCountToLeds/ application. The LEDs on the transmitter
+will stay off.
+
+
+2. Basestation/
+
+The BaseStation application with the security extensions
+
+> INSTALL
+
+Follow instructions on apps/BaseStation/README.txt
+
+> EXPECTATIONS
+
+Identical to the expectations in  apps/BaseStation/README.txt
+
+
+
+Known bugs/limitations:
+
+None.
diff --git a/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/Makefile b/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/Makefile
new file mode 100644
index 00000000..710ea3d4
--- /dev/null
+++ b/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/Makefile
@@ -0,0 +1,8 @@
+COMPONENT=RadioCountToLedsAppC
+CFLAGS+=-DCC2420_HW_ACKNOWLEDGEMENTS
+CFLAGS+=-DCC2420_HW_SECURITY
+#CFLAGS+=-DCC2420_DEF_CHANNEL=25
+CFLAGS+=-DPACKET_LINK
+CFLAGS+=-DTOSH_DATA_LENGTH=115
+#CFLAGS+=-I%T/lib/printf
+include $(MAKERULES)
diff --git a/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/RadioCountToLeds.h b/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/RadioCountToLeds.h
new file mode 100644
index 00000000..030bf47b
--- /dev/null
+++ b/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/RadioCountToLeds.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef RADIO_COUNT_TO_LEDS_H
+#define RADIO_COUNT_TO_LEDS_H
+
+typedef nx_struct radio_count_msg {
+  nx_uint16_t counter;
+  nx_uint16_t counter2[20];
+} radio_count_msg_t;
+
+enum {
+  AM_RADIO_COUNT_MSG = 6,
+};
+
+#endif
diff --git a/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/RadioCountToLedsAppC.nc b/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/RadioCountToLedsAppC.nc
new file mode 100644
index 00000000..57e84d16
--- /dev/null
+++ b/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/RadioCountToLedsAppC.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "RadioCountToLeds.h"
+
+/**
+ * Configuration for the RadioCountToLeds application. RadioCountToLeds
+ * maintains a 4Hz counter, broadcasting its value in an AM packet
+ * every time it gets updated. A RadioCountToLeds node that hears a counter
+ * displays the bottom three bits on its LEDs. This application is a useful
+ * test to show that basic AM communication and timers work.
+ *
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+configuration RadioCountToLedsAppC {}
+implementation {
+  components MainC, RadioCountToLedsC as App, LedsC, NoLedsC;
+  components new SecAMSenderC(AM_RADIO_COUNT_MSG) as AMSenderC;
+  components new AMReceiverC(AM_RADIO_COUNT_MSG);
+  components new TimerMilliC();
+  components CC2420KeysC;
+  components ActiveMessageC;
+
+  App.Boot -> MainC.Boot;
+  App.Receive -> AMReceiverC;
+  App.AMSend -> AMSenderC;
+  App.AMControl -> ActiveMessageC;
+  App.Leds -> LedsC;
+  App.MilliTimer -> TimerMilliC;
+  App.Packet -> AMSenderC;
+  App.CC2420Security -> AMSenderC;
+  App.CC2420Keys -> CC2420KeysC;
+
+  components CC2420ActiveMessageC as Radio;
+  App.PacketLink -> Radio;
+}
diff --git a/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/RadioCountToLedsC.nc b/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/RadioCountToLedsC.nc
new file mode 100644
index 00000000..8fbfdb49
--- /dev/null
+++ b/apps/tests/cc2420/TestSecurity/RadioCountToLeds1/RadioCountToLedsC.nc
@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "Timer.h"
+#include "RadioCountToLeds.h"
+//#include "printf.h"
+/**
+ * Implementation of the RadioCountToLeds application. RadioCountToLeds
+ * maintains a 4Hz counter, broadcasting its value in an AM packet
+ * every time it gets updated. A RadioCountToLeds node that hears a counter
+ * displays the bottom three bits on its LEDs. This application is a useful
+ * test to show that basic AM communication and timers work.
+ *
+ * @author Philip Levis
+ * @date   June 6 2005
+ */
+
+module RadioCountToLedsC {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface Timer<TMilli> as MilliTimer;
+    interface SplitControl as AMControl;
+    interface Packet;
+    interface CC2420SecurityMode as CC2420Security;
+    interface CC2420Keys;
+
+    interface PacketLink;
+  }
+}
+implementation {
+
+  message_t packet;
+  uint8_t key[16] = {0x98,0x67,0x7F,0xAF,0xD6,0xAD,0xB7,0x0C,0x59,0xE8,0xD9,0x47,0xC9,0x71,0x15,0x0F};
+  uint8_t keyReady = 0; // should be set to 1 when key setting is done
+
+  bool locked;
+  uint16_t counter = 0;
+
+  event void Boot.booted()
+  {
+    call AMControl.start();
+  }
+
+  event void AMControl.startDone(error_t err)
+  {
+    if (err == SUCCESS) {
+      call CC2420Keys.setKey(1, key);
+      if(TOS_NODE_ID == 1)
+	call MilliTimer.startPeriodic(128);
+    } else {
+      call AMControl.start();
+    }
+  }
+
+  event void AMControl.stopDone(error_t err)
+  {
+  }
+
+  event void CC2420Keys.setKeyDone(uint8_t keyNo, uint8_t* skey)
+  {
+    keyReady = 1;
+  }
+
+  event void MilliTimer.fired()
+  {
+    counter++;
+    dbg("RadioCountToLedsC", "RadioCountToLedsC: timer fired, counter is %hu.\n", counter);
+    if (locked) {
+      return;
+    }
+    else if(keyReady == 1) {
+
+      radio_count_msg_t* rcm = (radio_count_msg_t*)call Packet.getPayload(&packet, sizeof(radio_count_msg_t));
+
+      if (rcm == NULL) {
+	return;
+      }
+
+      rcm->counter = counter;
+      //call CC2420Security.setCtr(&packet, 0, 0);
+      //call CC2420Security.setCbcMac(&packet, 0, 0, 16);
+      call CC2420Security.setCcm(&packet, 1, 0, 16);
+      call PacketLink.setRetries(&packet, 3);
+      if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(radio_count_msg_t)) == SUCCESS) {
+	dbg("RadioCountToLedsC", "RadioCountToLedsC: packet sent.\n", counter);
+	locked = TRUE;
+      }
+    }
+  }
+
+  event message_t* Receive.receive(message_t* bufPtr,
+				   void* payload, uint8_t len)
+  {
+    dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len);
+    if (len != sizeof(radio_count_msg_t)) {return bufPtr;}
+    else {
+      radio_count_msg_t* rcm = (radio_count_msg_t*)payload;
+      //printf("counter: %d len: %d\n",rcm->counter, len);
+      //printfflush();
+      if (rcm->counter & 0x1) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if (rcm->counter & 0x2) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if (rcm->counter & 0x4) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led2Off();
+      }
+      return bufPtr;
+    }
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t error)
+  {
+    if (&packet == msg) {
+      locked = FALSE;
+    }
+  }
+
+}
diff --git a/apps/tests/cc2420/TxThroughput/.cvsignore b/apps/tests/cc2420/TxThroughput/.cvsignore
new file mode 100644
index 00000000..b643dc59
--- /dev/null
+++ b/apps/tests/cc2420/TxThroughput/.cvsignore
@@ -0,0 +1,2 @@
+ThroughputMsg.java
+ThroughputMsg.py
diff --git a/apps/tests/cc2420/TxThroughput/Makefile b/apps/tests/cc2420/TxThroughput/Makefile
new file mode 100644
index 00000000..bbc8e533
--- /dev/null
+++ b/apps/tests/cc2420/TxThroughput/Makefile
@@ -0,0 +1,17 @@
+COMPONENT=TxThroughputC
+BUILD_EXTRA_DEPS = ThroughputMsg.py ThroughputMsg.java ThroughputMsg.class
+CLEAN_EXTRA = *.class *.pyc ThroughputMsg.py ThroughputMsg.java
+
+ThroughputMsg.py: TxThroughput.h
+	mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=ThroughputMsg TxThroughput.h ThroughputMsg -o $@
+
+ThroughputMsg.java: TxThroughput.h
+	mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=ThroughputMsg TxThroughput.h ThroughputMsg -o $@
+
+ThroughputMsg.class: $(wildcard *.java) ThroughputMsg.java
+	javac *.java
+
+include $(MAKERULES)
+
+
+ 
diff --git a/apps/tests/cc2420/TxThroughput/README.txt b/apps/tests/cc2420/TxThroughput/README.txt
new file mode 100644
index 00000000..0e60142b
--- /dev/null
+++ b/apps/tests/cc2420/TxThroughput/README.txt
@@ -0,0 +1,36 @@
+README for TxThroughput
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+This application is used more for characterization rather than a test.
+It measures the maximum radio throughput using the largest message payload 
+size, and does not use low power listening.
+
+INSTALL
+Compile and install this application to one mote. Leave the mote connected
+to the computer.
+
+EXPECTATIONS
+Led1 will toggle as each message is transmitted.  Once a second, the mote
+will send a packet through the serial port to the computer.  
+
+Tools:
+
+Run the TxThroughput java application:
+  Linux: java TxThroughput.class [-comm <packetsource>]
+  Windows: java TxThroughput [-comm <packetsource>]
+
+The TxThroughput Java application will display the number of packets per
+second and the number of bytes sent in the payload per second:
+
+[Packets/s]: 124;  [(Payload Bytes)/s]: 3472
+[Packets/s]: 126;  [(Payload Bytes)/s]: 3528
+[Packets/s]: 115;  [(Payload Bytes)/s]: 3220
+[Packets/s]: 124;  [(Payload Bytes)/s]: 3472
+
+Known bugs/limitations:
+
+None.
+
+$Id: README.txt,v 1.4 2008-07-26 02:32:44 klueska Exp $
diff --git a/apps/tests/cc2420/TxThroughput/TxThroughput.h b/apps/tests/cc2420/TxThroughput/TxThroughput.h
new file mode 100644
index 00000000..fb258053
--- /dev/null
+++ b/apps/tests/cc2420/TxThroughput/TxThroughput.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * @author David Moss
+ */
+ 
+#ifndef TXTHROUGHPUT_H
+#define TXTHROUGHPUT_H
+
+/**
+ * Optionally override the default payload length with our own to see how it
+ * affects throughput.  Be sure to re-mig your messages.
+ */
+#ifndef TOSH_DATA_LENGTH
+#define TOSH_DATA_LENGTH 28 
+#endif
+
+#include "message.h"
+
+typedef nx_struct ThroughputMsg {
+  nx_uint16_t packetsPerSecond;
+  nx_uint8_t fillBytes[TOSH_DATA_LENGTH - 2];
+} ThroughputMsg;
+
+enum {
+  AM_THROUGHPUTMSG = 133,
+};
+
+/**
+ * Set this to 1 if you want to see how acknowledgements affects throughput
+ */
+#ifndef USE_ACKNOWLEDGEMENTS
+#define USE_ACKNOWLEDGEMENTS 0
+#endif
+
+
+#endif
+
diff --git a/apps/tests/cc2420/TxThroughput/TxThroughput.java b/apps/tests/cc2420/TxThroughput/TxThroughput.java
new file mode 100644
index 00000000..a935b3c0
--- /dev/null
+++ b/apps/tests/cc2420/TxThroughput/TxThroughput.java
@@ -0,0 +1,88 @@
+
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Java-side application for examining the radio Tx throughput
+ * 
+ * @author David Moss
+ */
+
+import java.io.IOException;
+
+import net.tinyos.message.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+public class TxThroughput implements MessageListener {
+
+  private MoteIF moteIF;
+
+  public TxThroughput(MoteIF moteIF) {
+    this.moteIF = moteIF;
+    this.moteIF.registerListener(new ThroughputMsg(), this);
+  }
+
+  public void messageReceived(int dest, Message message) {
+    System.out.println("[Packets/s]: " + ((ThroughputMsg) message).get_packetsPerSecond() 
+        + ";  [(Payload Bytes)/s]: " + ((((ThroughputMsg) message).numElements_fillBytes() + 2) * ((ThroughputMsg) message).get_packetsPerSecond()));
+  }
+
+  private static void usage() {
+    System.err.println("usage: TxThroughput [-comm <source>]");
+  }
+
+  public static void main(String[] args) throws Exception {
+    String source = null;
+    if (args.length == 2) {
+      if (!args[0].equals("-comm")) {
+        usage();
+        System.exit(1);
+      }
+      source = args[1];
+    } else if (args.length != 0) {
+      usage();
+      System.exit(1);
+    }
+
+    PhoenixSource phoenix;
+
+    if (source == null) {
+      phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err);
+    } else {
+      phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err);
+    }
+
+    MoteIF mif = new MoteIF(phoenix);
+    new TxThroughput(mif);
+  }
+
+}
\ No newline at end of file
diff --git a/apps/tests/cc2420/TxThroughput/TxThroughputC.nc b/apps/tests/cc2420/TxThroughput/TxThroughputC.nc
new file mode 100644
index 00000000..ff9beb75
--- /dev/null
+++ b/apps/tests/cc2420/TxThroughput/TxThroughputC.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+#include "TxThroughput.h"
+
+/**
+ * This application is used more for characterization rather than a
+ * test.  It measures the maximum radio throughput using the largest
+ * message payload size, and does not use low power listening.
+ *
+ * @author David Moss
+ */
+ 
+configuration TxThroughputC {
+}
+
+implementation {
+
+  components TxThroughputP,
+      MainC,
+      SerialActiveMessageC,
+      new SerialAMSenderC(AM_THROUGHPUTMSG),
+      ActiveMessageC,
+      new AMSenderC(AM_THROUGHPUTMSG),
+      new TimerMilliC(),
+      LedsC;
+  
+  TxThroughputP.Boot -> MainC;
+  TxThroughputP.SerialSplitControl -> SerialActiveMessageC;
+  TxThroughputP.RadioSplitControl -> ActiveMessageC;
+  TxThroughputP.SerialAMSend -> SerialAMSenderC;
+  TxThroughputP.RadioAMSend -> AMSenderC;
+  TxThroughputP.PacketAcknowledgements -> ActiveMessageC;
+  TxThroughputP.Timer -> TimerMilliC;
+  TxThroughputP.Leds -> LedsC;
+  
+}
diff --git a/apps/tests/cc2420/TxThroughput/TxThroughputP.nc b/apps/tests/cc2420/TxThroughput/TxThroughputP.nc
new file mode 100644
index 00000000..deceb27b
--- /dev/null
+++ b/apps/tests/cc2420/TxThroughput/TxThroughputP.nc
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+#include "TxThroughput.h"
+ 
+/**
+ * This application is used more for characterization rather than a
+ * test.  It measures the maximum radio throughput using the largest
+ * message payload size, and does not use low power listening.
+ *
+ * @author David Moss
+ */
+ 
+module TxThroughputP {
+  uses {
+    interface Boot;
+    interface SplitControl as SerialSplitControl;
+    interface SplitControl as RadioSplitControl;
+    interface AMSend as SerialAMSend;
+    interface AMSend as RadioAMSend;
+    interface PacketAcknowledgements;
+    interface Timer<TMilli>;
+    interface Leds;
+  }
+}
+
+implementation {
+
+  message_t radioMsg;
+  
+  message_t serialMsg;
+  
+  uint16_t packetsPerSecond;
+  
+  enum {
+    MSG_DESTINATION = 1,
+  };
+  
+  /***************** Prototypes ****************/
+  task void sendRadio();
+  task void sendSerial();
+  
+  /***************** Boot Events ****************/
+  event void Boot.booted() {
+    if(USE_ACKNOWLEDGEMENTS) {
+      call PacketAcknowledgements.requestAck(&radioMsg);
+    } else {
+      call PacketAcknowledgements.noAck(&radioMsg);
+    }
+    
+    call RadioSplitControl.start();
+    call SerialSplitControl.start();
+  }
+  
+  /***************** RadioSplitControl Events ****************/
+  event void RadioSplitControl.startDone(error_t error) {
+    packetsPerSecond = 0;
+    post sendRadio();
+  }
+  
+  event void RadioSplitControl.stopDone(error_t error) {
+  }
+  
+  /***************** SerialSplitControl Events ****************/
+  event void SerialSplitControl.startDone(error_t error) {
+    call Timer.startPeriodic(1024);
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {
+  }
+  
+  /***************** AMSend Events ****************/
+  event void RadioAMSend.sendDone(message_t *msg, error_t error) {
+    packetsPerSecond++;
+    call Leds.led1Toggle();
+    post sendRadio();
+  }
+  
+  event void SerialAMSend.sendDone(message_t *msg, error_t error) {
+  }
+  
+  /***************** Timer Events ***************/
+  event void Timer.fired() {
+    ((ThroughputMsg *) call SerialAMSend.getPayload(&serialMsg, sizeof(ThroughputMsg)))->packetsPerSecond = packetsPerSecond;
+    packetsPerSecond = 0;
+    post sendSerial();
+  }
+  
+  /****************** Tasks ****************/
+  task void sendRadio() {
+    if(call RadioAMSend.send(MSG_DESTINATION, &radioMsg, sizeof(ThroughputMsg)) 
+        != SUCCESS) {
+      post sendRadio();
+    }
+  }
+  
+  task void sendSerial() {
+    if(call SerialAMSend.send(0, &serialMsg, sizeof(ThroughputMsg)) 
+        != SUCCESS) {
+      post sendSerial();
+    }
+  }
+}
+
+
diff --git a/apps/tests/deluge/Basestation/BasestationAppC.nc b/apps/tests/deluge/Basestation/BasestationAppC.nc
new file mode 100644
index 00000000..044ed12b
--- /dev/null
+++ b/apps/tests/deluge/Basestation/BasestationAppC.nc
@@ -0,0 +1,43 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+configuration BasestationAppC {}
+
+implementation
+{
+  components DelugeC;
+}
+
diff --git a/apps/tests/deluge/Basestation/Makefile b/apps/tests/deluge/Basestation/Makefile
new file mode 100644
index 00000000..6af89227
--- /dev/null
+++ b/apps/tests/deluge/Basestation/Makefile
@@ -0,0 +1,6 @@
+COMPONENT=BasestationAppC
+BOOTLOADER=tosboot
+
+CFLAGS += -DDELUGE_BASESTATION
+
+include $(MAKERULES)
diff --git a/apps/tests/deluge/Basestation/README.txt b/apps/tests/deluge/Basestation/README.txt
new file mode 100644
index 00000000..28a9f643
--- /dev/null
+++ b/apps/tests/deluge/Basestation/README.txt
@@ -0,0 +1,22 @@
+README for apps/tests/deluge/Basestation
+Author/Contact:
+
+Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+
+Description:
+
+This is a sample application for Deluge T2. The application is similar
+with GoldenImage, but it includes the basestation behavior by using
+the CFLAGS=-DDELUGE_BASESTATION flag.
+
+For telosb the command to install the program is like this:
+         make telosb install bsl,/dev/ttyUSB0
+
+Prerequisites:
+
+Python 2.4 with pySerial
+
+References:
+
+The Deluge T2 wiki page from http://docs.tinyos.net/
diff --git a/apps/tests/deluge/Basestation/volumes-at45db.xml b/apps/tests/deluge/Basestation/volumes-at45db.xml
new file mode 100644
index 00000000..8b22ebe4
--- /dev/null
+++ b/apps/tests/deluge/Basestation/volumes-at45db.xml
@@ -0,0 +1,6 @@
+<volume_table>
+  <volume name="GOLDENIMAGE" size="65536" base="0" />
+  <volume name="DELUGE1" size="65536"/>
+  <volume name="DELUGE2" size="65536"/>
+  <volume name="DELUGE3" size="65536"/>
+</volume_table>
\ No newline at end of file
diff --git a/apps/tests/deluge/Basestation/volumes-stm25p.xml b/apps/tests/deluge/Basestation/volumes-stm25p.xml
new file mode 100644
index 00000000..4210f08a
--- /dev/null
+++ b/apps/tests/deluge/Basestation/volumes-stm25p.xml
@@ -0,0 +1,6 @@
+<volume_table>
+  <volume name="GOLDENIMAGE" size="65536" base="983040" />
+  <volume name="DELUGE1" size="65536"/>
+  <volume name="DELUGE2" size="65536"/>
+  <volume name="DELUGE3" size="65536"/>
+</volume_table>
\ No newline at end of file
diff --git a/apps/tests/deluge/Blink/BlinkAppC.nc b/apps/tests/deluge/Blink/BlinkAppC.nc
new file mode 100644
index 00000000..3f1ccdba
--- /dev/null
+++ b/apps/tests/deluge/Blink/BlinkAppC.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Blink is a basic application that toggles a mote's LED periodically.
+ * It does so by starting a Timer that fires every second. It uses the
+ * OSKI TimerMilli service to achieve this goal.
+ *
+ * @author tinyos-help@millennium.berkeley.edu
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ **/
+
+configuration BlinkAppC { }
+
+implementation
+{
+  components MainC, BlinkC, LedsC;
+  components new TimerMilliC() as Timer0;
+  components DelugeC;
+
+  DelugeC.Leds -> LedsC;
+
+  BlinkC -> MainC.Boot;
+  BlinkC.Timer0 -> Timer0;
+  BlinkC.Leds -> LedsC;
+}
+
diff --git a/apps/tests/deluge/Blink/BlinkC.nc b/apps/tests/deluge/Blink/BlinkC.nc
new file mode 100644
index 00000000..415263f1
--- /dev/null
+++ b/apps/tests/deluge/Blink/BlinkC.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Implementation for Blink application.  Toggle the red LED when a
+ * Timer fires.
+ *
+ * @author tinyos-help@millennium.berkeley.edu
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ **/
+
+#include "Timer.h"
+
+module BlinkC
+{
+  uses interface Timer<TMilli> as Timer0;
+  uses interface Leds;
+  uses interface Boot;
+}
+
+implementation
+{
+  event void Boot.booted()
+  {
+    call Timer0.startPeriodic( 500 );
+  }
+
+  event void Timer0.fired()
+  {
+    dbg("BlinkC", "Timer 0 fired @ %s.\n", sim_time_string());
+#ifndef BLINK_REVERSE
+    call Leds.led0Toggle();
+#else
+    call Leds.led2Toggle();
+#endif
+  }
+}
+
diff --git a/apps/tests/deluge/Blink/Makefile b/apps/tests/deluge/Blink/Makefile
new file mode 100644
index 00000000..5aad1f19
--- /dev/null
+++ b/apps/tests/deluge/Blink/Makefile
@@ -0,0 +1,7 @@
+COMPONENT=BlinkAppC
+BOOTLOADER=tosboot
+
+#CFLAGS += -DDELUGE_BASESTATION
+#CFLAGS += -DDELUGE_LIGHT_BASESTATION
+
+include $(MAKERULES)
diff --git a/apps/tests/deluge/Blink/README.txt b/apps/tests/deluge/Blink/README.txt
new file mode 100644
index 00000000..3e0a0169
--- /dev/null
+++ b/apps/tests/deluge/Blink/README.txt
@@ -0,0 +1,46 @@
+README for apps/tests/deluge/Blink
+Author/Contact:
+
+Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+
+Description:
+
+This application serves two purposes. First, it contains two test cases 
+for Deluge T2: testing base station functionality and network-wide 
+reprogramming. Second, it is a sample application referenced in the 
+Deluge T2 wiki page to illustrate some of the basics in reprogramming. 
+These are done with the two burn scripts in the directory.
+
+The "burn" script performs the following tasks (on the basestation 
+only):
+   1) Compile and load the program normally. After this step the mote
+      will blink led 0.
+   2) Compile another version of blink that blinks led 2.
+   3) Upload the new blink to flash volume 1.
+   4) Instruct the mote to reprogram with the new blink.
+
+If all the steps are executed properly the mote end up blinking the
+led 2.
+
+The "burn-net" script performs the following tasks:
+   1) Compile and load the program normally on multiple motes. The last 
+      mote is designated to be the basestation.
+   2) Compile another version of blink that blinks led 2.
+   3) Upload the new blink to flash volume 1 on the base station.
+   4) Give the command to base station to disseminate-and-reprogram.
+
+To help testing, "burn-net" script describes what the user should expect 
+in each step. At the end of all the steps the base station should
+blink led 0 and all the rest of the motes should blink led 2.
+
+For a more detailed discussion on Deluge T2, please refer to the Deluge 
+T2 wiki page.
+
+Prerequisites:
+
+Python 2.4 with pySerial
+
+References:
+
+The Deluge T2 wiki page from http://docs.tinyos.net/
diff --git a/apps/tests/deluge/Blink/burn b/apps/tests/deluge/Blink/burn
new file mode 100755
index 00000000..625d0860
--- /dev/null
+++ b/apps/tests/deluge/Blink/burn
@@ -0,0 +1,84 @@
+#!/bin/bash
+
+TOS_DELUGE=`type -p tos-deluge`
+if [[ ! -x ${TOS_DELUGE} ]] ; then 
+    TOS_DELUGE=../../../../tools/tinyos/misc/tos-deluge
+fi 
+
+$TOS_DELUGE > /dev/null
+
+if [[ $? != 0 ]]
+then
+  echo "Unable to locate tos-deluge."
+  exit 2
+fi
+
+if [[ $# -ne 3 ]]; then
+  echo "Usage: $0 <prog_source> <comm_source> <platform>"
+  echo "  <prog_source> bsl,PORT | mib510,PORT | eprb,HOST | sm16cf,PORT"
+  echo "  <comm_source> serial@PORT:SPEED | network@HOST:PORT"
+  echo "  <platform>    micaz | telosb | iris | epic | mulle"
+  echo " Common combinations"
+  echo "  <prog_source> <comm_source>       <platform>" 
+  echo "  bsl,PORT      serial@PORT:SPEED   telosb|iris"
+  echo "  mib510,PORT   serial@PORT:SPEED   micaz"
+  echo "  eprb,HOST     network@HOST:PORT   micaz"
+  echo "  sm16cf,PORT   serial@PORT:SPEED   mulle"
+  exit 2
+fi
+
+PPORT=$1
+CPORT=$2
+PLATFORM=$3
+
+if [ ${PLATFORM} != 'micaz' -a \
+     ${PLATFORM} != 'telosb' -a \
+     ${PLATFORM} != 'iris' -a \
+     ${PLATFORM} != 'mulle' -a \
+     ${PLATFORM} != 'tinynode' -a \
+     ${PLATFORM} != 'epic' ]
+then
+  echo "\"${PLATFORM}\" is not a supported platform"
+  exit 2
+fi
+
+echo ========================== Compile tosboot for ${PLATFORM} ===========================
+( cd $TOSDIR/lib/tosboot ; make ${PLATFORM} ) 
+
+make clean
+
+echo ============================ Compile and load Blink ============================
+CFLAGS=-DDELUGE_BASESTATION make ${PLATFORM} install ${PPORT}
+
+
+echo '           +-------------------------------------------------------+'
+echo '           |                                                       |'
+echo '           | At this point the first led (red) should be blinking. |'
+echo '           |                                                       |'
+echo '           |               Press ENTER to continue...              |'
+echo '           |                                                       |'
+echo '           +-------------------------------------------------------+'
+read
+
+echo  ============================= Compile a new Blink ==============================
+CFLAGS=-DBLINK_REVERSE\ -DDELUGE_BASESTATION make ${PLATFORM}
+
+echo =============================== Upload the image ===============================
+${TOS_DELUGE} ${CPORT} -i 1 build/${PLATFORM}/tos_image.xml
+
+echo '       +----------------------------------------------------------------+'
+echo '       |                                                                |'
+echo '       | In the next step the following things will take place:         |'
+echo '       | - the mote will be rebooted                                    |'
+echo '       | - all the leds will blink for some time as the                 |'
+echo '       |   reprogramming by tosboot takes place.                        |'
+echo '       | - a fading of the leds will indicate the exiting from tosboot. |'
+echo '       | - the mote should start blinking the 3rd led (blue/yellow).    |'
+echo '       |                                                                |'
+echo '       |                   Press ENTER to continue...                   |'
+echo '       |                                                                |'
+echo '       +----------------------------------------------------------------+'
+read
+
+echo =========================== Reboot the base station ============================
+${TOS_DELUGE} ${CPORT} -r 1 
diff --git a/apps/tests/deluge/Blink/burn-net b/apps/tests/deluge/Blink/burn-net
new file mode 100755
index 00000000..36f1f4cb
--- /dev/null
+++ b/apps/tests/deluge/Blink/burn-net
@@ -0,0 +1,111 @@
+#!/bin/bash
+
+TOS_DELUGE=`type -p tos-deluge`
+if [[ ! -x ${TOS_DELUGE} ]] ; then 
+    TOS_DELUGE=../../../../tools/tinyos/misc/tos-deluge
+fi 
+
+$TOS_DELUGE > /dev/null
+
+if [[ $? != 0 ]]
+then
+  echo "Unable to locate tos-deluge."
+  exit 2
+fi
+
+if [ $# -ne 2 ]; then
+  echo "Usage: $0 <platform> <number of motes>"
+  echo "  <platform>         micaz, telosb, iris or mulle"
+  echo "  <number of motes>  how many motes will be used in the test"
+  exit 2
+fi
+
+PLATFORM=$1
+NO_MOTES=$2
+
+if [ ${PLATFORM} != 'micaz' -a \
+     ${PLATFORM} != 'telosb' -a \
+     ${PLATFORM} != 'iris' \
+     ${PLATFORM} != 'iris' -a \
+     ${PLATFORM} != 'mulle' -a \
+     ${PLATFORM} != 'epic' ]
+then
+  echo "\"${PLAFTORM}\" is not a supported platform"
+  exit 2
+fi
+
+if ! [ -a ${TOSDIR}/lib/tosboot/build/${PLATFORM}/main.ihex ]
+then
+  echo ========================== Compile tosboot for ${PLATFORM} ===========================
+  ( cd $TOSDIR/lib/tosboot ; make ${PLATFORM} ) 
+fi
+
+echo ================================ Compile Blink =================================
+make clean
+ID=0
+
+function burn_one() {
+    ID=`expr $ID + 1`
+    echo -n ">>> Please plug mote $ID and type the programming sorce (bsl,PORT | mib510,PORT | eprb,HOST): "
+    read PORT
+
+    CFLAGS=$1 make ${PLATFORM} install,$ID ${PORT}
+}
+
+while [[ ${NO_MOTES} > 1 ]]
+do
+  burn_one -DDELUGE_LIGHT_BASESTATION
+  NO_MOTES=`expr ${NO_MOTES} - 1`
+done
+echo ">>> Note: this last mote will be the basestation! <<<"
+burn_one -DDELUGE_BASESTATION
+echo -n ">>> Please plug mote $ID and type the communication sorce (serial@PORT:SPEED | network@HOST:PORT) to continue: "
+read CPORT
+
+echo '   +------------------------------------------------------------------------+'
+echo '   |                                                                        |'
+echo '   | At this point the first led (red) of all the motes should be blinking. |'
+echo '   |                                                                        |'
+echo '   |                       Press ENTER to continue...                       |'
+echo '   |                                                                        |'
+echo '   +------------------------------------------------------------------------+'
+read
+
+echo ============================= Compile a new Blink ==============================
+CFLAGS=-DBLINK_REVERSE\ -DDELUGE_LIGHT_BASESTATION make ${PLATFORM} 
+
+echo ========= Upload the new image to the external flash of the last mote ==========
+${TOS_DELUGE} ${CPORT} -i 1 build/${PLATFORM}/tos_image.xml
+
+echo '            +-----------------------------------------------------+'
+echo '            |                                                     |'
+echo '            | In the next step the dissemination will be started. |'
+echo '            | When a node receives a page, the second led (green) |'
+echo '            | will blink.                                         |'
+echo '            |                                                     |'
+echo '            |              Press ENTER to continue...             |'
+echo '            |                                                     |'
+echo '            +-----------------------------------------------------+'
+read
+
+echo ============================= Start dissemination ==============================
+${TOS_DELUGE} ${CPORT} -dr 1
+
+echo '         +------------------------------------------------------------+'
+echo '         |                                                            |'
+echo '         | The dissemination is completed when the second and third   |'
+echo '         | led from all the motes except the last one stops blinking. |'
+echo '         |                                                            |'
+echo '         | After a mote gets the whole image he will reboot and       |'
+echo '         | reprogram itself. If the new image contains Deluge he will |'
+echo '         | continue participating in dissemination.                   |'
+echo '         |                                                            |'
+echo '         | In the next step all the motes except the basestation will |'
+echo '         | be rebooted to allow the reprogramming to take place.      |'
+echo '         |                                                            |'
+echo '         | After reboot the motes should start blinking the 3rd led   |'
+echo '         | (blue/yellow).                                             |'
+echo '         |                                                            |'
+echo '         +------------------------------------------------------------+'
+
+
diff --git a/apps/tests/deluge/Blink/volumes-at45db.xml b/apps/tests/deluge/Blink/volumes-at45db.xml
new file mode 100644
index 00000000..8b22ebe4
--- /dev/null
+++ b/apps/tests/deluge/Blink/volumes-at45db.xml
@@ -0,0 +1,6 @@
+<volume_table>
+  <volume name="GOLDENIMAGE" size="65536" base="0" />
+  <volume name="DELUGE1" size="65536"/>
+  <volume name="DELUGE2" size="65536"/>
+  <volume name="DELUGE3" size="65536"/>
+</volume_table>
\ No newline at end of file
diff --git a/apps/tests/deluge/Blink/volumes-stm25p.xml b/apps/tests/deluge/Blink/volumes-stm25p.xml
new file mode 100644
index 00000000..4210f08a
--- /dev/null
+++ b/apps/tests/deluge/Blink/volumes-stm25p.xml
@@ -0,0 +1,6 @@
+<volume_table>
+  <volume name="GOLDENIMAGE" size="65536" base="983040" />
+  <volume name="DELUGE1" size="65536"/>
+  <volume name="DELUGE2" size="65536"/>
+  <volume name="DELUGE3" size="65536"/>
+</volume_table>
\ No newline at end of file
diff --git a/apps/tests/deluge/GoldenImage/GoldenImageAppC.nc b/apps/tests/deluge/GoldenImage/GoldenImageAppC.nc
new file mode 100644
index 00000000..403e7e0f
--- /dev/null
+++ b/apps/tests/deluge/GoldenImage/GoldenImageAppC.nc
@@ -0,0 +1,46 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+configuration GoldenImageAppC {}
+
+implementation
+{
+  components DelugeC;
+  components LedsC;
+
+  DelugeC.Leds -> LedsC;
+}
+
diff --git a/apps/tests/deluge/GoldenImage/Makefile b/apps/tests/deluge/GoldenImage/Makefile
new file mode 100644
index 00000000..c560f82c
--- /dev/null
+++ b/apps/tests/deluge/GoldenImage/Makefile
@@ -0,0 +1,6 @@
+COMPONENT=GoldenImageAppC
+BOOTLOADER=tosboot
+
+CFLAGS+=-DDELUGE_LIGHT_BASESTATION
+
+include $(MAKERULES)
diff --git a/apps/tests/deluge/GoldenImage/README.txt b/apps/tests/deluge/GoldenImage/README.txt
new file mode 100644
index 00000000..6160096b
--- /dev/null
+++ b/apps/tests/deluge/GoldenImage/README.txt
@@ -0,0 +1,20 @@
+README for apps/tests/deluge/GoldenImage
+Author/Contact:
+
+Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+
+Description:
+
+This is a sample application for Deluge T2. The application is similar 
+to Null, but it includes Deluge T2. The Makefile includes the
+DELUGE_LIGHT_BASESTATION flag to allow the nodes to be pinged using
+tos-deluge.
+
+Prerequisites:
+
+Python 2.4 with pySerial
+
+References:
+
+The Deluge T2 wiki page from http://docs.tinyos.net/
diff --git a/apps/tests/deluge/GoldenImage/volumes-at45db.xml b/apps/tests/deluge/GoldenImage/volumes-at45db.xml
new file mode 100644
index 00000000..8b22ebe4
--- /dev/null
+++ b/apps/tests/deluge/GoldenImage/volumes-at45db.xml
@@ -0,0 +1,6 @@
+<volume_table>
+  <volume name="GOLDENIMAGE" size="65536" base="0" />
+  <volume name="DELUGE1" size="65536"/>
+  <volume name="DELUGE2" size="65536"/>
+  <volume name="DELUGE3" size="65536"/>
+</volume_table>
\ No newline at end of file
diff --git a/apps/tests/deluge/GoldenImage/volumes-stm25p.xml b/apps/tests/deluge/GoldenImage/volumes-stm25p.xml
new file mode 100644
index 00000000..4210f08a
--- /dev/null
+++ b/apps/tests/deluge/GoldenImage/volumes-stm25p.xml
@@ -0,0 +1,6 @@
+<volume_table>
+  <volume name="GOLDENIMAGE" size="65536" base="983040" />
+  <volume name="DELUGE1" size="65536"/>
+  <volume name="DELUGE2" size="65536"/>
+  <volume name="DELUGE3" size="65536"/>
+</volume_table>
\ No newline at end of file
diff --git a/apps/tests/deluge/SerialBlink/BlinkAppC.nc b/apps/tests/deluge/SerialBlink/BlinkAppC.nc
new file mode 100644
index 00000000..d8b8f24d
--- /dev/null
+++ b/apps/tests/deluge/SerialBlink/BlinkAppC.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Blink is a basic application that toggles the a mote LED periodically.
+ * It does so by starting a Timer that fires every second. It uses the
+ * OSKI TimerMilli service to achieve this goal.
+ *
+ * @author tinyos-help@millennium.berkeley.edu
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ **/
+
+configuration BlinkAppC
+{
+}
+implementation
+{
+  components MainC, BlinkC, LedsC, DelugeC;
+  components new TimerMilliC() as Timer0;
+  components new SerialAMSenderC(0);
+
+  BlinkC -> MainC.Boot;
+
+  BlinkC.Timer0 -> Timer0;
+  BlinkC.Leds -> LedsC;
+  BlinkC.AMSend -> SerialAMSenderC;
+}
diff --git a/apps/tests/deluge/SerialBlink/BlinkC.nc b/apps/tests/deluge/SerialBlink/BlinkC.nc
new file mode 100644
index 00000000..95038e50
--- /dev/null
+++ b/apps/tests/deluge/SerialBlink/BlinkC.nc
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Implementation for Blink application.  Toggle the red LED when a
+ * Timer fires.
+ *
+ * @author tinyos-help@millennium.berkeley.edu
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ **/
+
+#include "Timer.h"
+
+module BlinkC
+{
+  uses interface Timer<TMilli> as Timer0;
+  uses interface Leds;
+  uses interface Boot;
+  uses interface AMSend;
+}
+
+implementation
+{
+  message_t byte_msg;
+  
+  event void Boot.booted()
+  {
+    call Timer0.startPeriodic( 1024 );
+  }
+
+  event void Timer0.fired()
+  {
+    char *payload = call AMSend.getPayload(&byte_msg, 1);
+    dbg("BlinkC", "Timer 0 fired @ %s.\n", sim_time_string());
+#ifndef BLINK_REVERSE
+    call Leds.led0Toggle();
+    payload[0] = 0;
+#else
+    call Leds.led2Toggle();
+    payload[0] = 2;
+#endif
+    call AMSend.send(AM_BROADCAST_ADDR, &byte_msg, 1);
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t error) { };
+}
+
diff --git a/apps/tests/deluge/SerialBlink/Makefile b/apps/tests/deluge/SerialBlink/Makefile
new file mode 100644
index 00000000..5aad1f19
--- /dev/null
+++ b/apps/tests/deluge/SerialBlink/Makefile
@@ -0,0 +1,7 @@
+COMPONENT=BlinkAppC
+BOOTLOADER=tosboot
+
+#CFLAGS += -DDELUGE_BASESTATION
+#CFLAGS += -DDELUGE_LIGHT_BASESTATION
+
+include $(MAKERULES)
diff --git a/apps/tests/deluge/SerialBlink/README.txt b/apps/tests/deluge/SerialBlink/README.txt
new file mode 100644
index 00000000..5e5a0e31
--- /dev/null
+++ b/apps/tests/deluge/SerialBlink/README.txt
@@ -0,0 +1,42 @@
+README for apps/tests/deluge/SerialBlink
+Author/Contact:
+
+Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+
+Description:
+
+This is a sample application for Deluge T2. The program blinks and
+sends a serial message every second. On a testbed equipped with a
+serial back-channel the following test can be run:
+   1) Compile and burn the program on all the motes on the
+      testbed. The serial messages send by the motes is one-byte value
+      of 0.
+   2) Compile and burn a base station. This can be done by adding
+      CFLAGS=-DDELUGE_BASESTATION to the make command. For telosb this
+      will look like this:
+      	   CFLAGS=-DDELUGE_BASESTATION make telosb
+   3) Compile a different version of SerialBlink by adding
+      CFLAGS=-DBLINK_REVERSE to the make command. For telosb this
+      will look like this:
+      	   CFLAGS=-DBLINK_REVERSE make telosb
+   4) Upload the new SerialBlink to the base station. For a telosb
+      connected to /dev/ttyUSB0 this can be accomplish using this
+      command:
+       	   tos-deluge /dev/ttyUSB0 telosb -i 1 build/telosb/tos_image.xml
+   5) Give the command to disseminate-and-reboot:
+       	   tos-deluge /dev/ttyUSB0 telosb -dr 1
+
+As the motes get and reprogram with the new image they will start
+sending on the serial a one-byte value of 2.
+
+For a more detailed discussion on Deluge T2, please refer to the Deluge 
+T2 wiki page.
+
+Prerequisites:
+
+Python 2.4 with pySerial
+
+References:
+
+The Deluge T2 wiki page from http://docs.tinyos.net/
diff --git a/apps/tests/deluge/SerialBlink/volumes-at45db.xml b/apps/tests/deluge/SerialBlink/volumes-at45db.xml
new file mode 100644
index 00000000..8b22ebe4
--- /dev/null
+++ b/apps/tests/deluge/SerialBlink/volumes-at45db.xml
@@ -0,0 +1,6 @@
+<volume_table>
+  <volume name="GOLDENIMAGE" size="65536" base="0" />
+  <volume name="DELUGE1" size="65536"/>
+  <volume name="DELUGE2" size="65536"/>
+  <volume name="DELUGE3" size="65536"/>
+</volume_table>
\ No newline at end of file
diff --git a/apps/tests/deluge/SerialBlink/volumes-stm25p.xml b/apps/tests/deluge/SerialBlink/volumes-stm25p.xml
new file mode 100644
index 00000000..4210f08a
--- /dev/null
+++ b/apps/tests/deluge/SerialBlink/volumes-stm25p.xml
@@ -0,0 +1,6 @@
+<volume_table>
+  <volume name="GOLDENIMAGE" size="65536" base="983040" />
+  <volume name="DELUGE1" size="65536"/>
+  <volume name="DELUGE2" size="65536"/>
+  <volume name="DELUGE3" size="65536"/>
+</volume_table>
\ No newline at end of file
diff --git a/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/Makefile b/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/Makefile
new file mode 100644
index 00000000..863a2f9a
--- /dev/null
+++ b/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestTDA5250ControlC
+include $(MAKERULES)
+
diff --git a/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/TestTda5250ControlC.nc b/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/TestTda5250ControlC.nc
new file mode 100644
index 00000000..24a593cc
--- /dev/null
+++ b/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/TestTda5250ControlC.nc
@@ -0,0 +1,65 @@
+/*                                  tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ *
+ **/
+
+#include "Timer.h"
+configuration TestTda5250ControlC {
+}
+implementation {
+  components MainC, TestTda5250ControlP
+           , new AlarmMilliC() as ModeTimer
+           , LedsC
+           , Tda5250RadioC
+           , RandomLfsrC
+           ;
+
+  TestTda5250ControlP -> MainC.Boot;
+
+  TestTda5250ControlP.Random -> RandomLfsrC.Random;
+  TestTda5250ControlP.ModeTimer -> ModeTimer;
+  TestTda5250ControlP.Leds  -> LedsC;
+  TestTda5250ControlP.Tda5250Control -> Tda5250RadioC.Tda5250Control;
+  TestTda5250ControlP.RadioSplitControl -> Tda5250RadioC.SplitControl;
+}
+
+
+
diff --git a/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/TestTda5250ControlP.nc b/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/TestTda5250ControlP.nc
new file mode 100644
index 00000000..89e999f1
--- /dev/null
+++ b/apps/tests/eyesIFX/Radio/TestHAL/TestTDA5250Control/TestTda5250ControlP.nc
@@ -0,0 +1,169 @@
+// $Id: TestTda5250ControlP.nc,v 1.5 2010-06-29 22:07:32 scipio Exp $
+
+/*                                  tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+module TestTda5250ControlP {
+  uses {
+    interface Boot;
+    interface Alarm<TMilli, uint32_t> as ModeTimer;
+    interface Leds;
+    interface Tda5250Control;
+    interface Random;
+    interface SplitControl as RadioSplitControl;
+  }
+}
+
+implementation {
+  
+  #define MODE_TIMER_RATE 500
+  
+  uint8_t mode;
+  
+  event void Boot.booted() {
+    atomic mode = 0;
+    call RadioSplitControl.start();
+  }
+  
+  event void RadioSplitControl.startDone(error_t error) {
+    call ModeTimer.start(MODE_TIMER_RATE);
+  }
+  
+  event void RadioSplitControl.stopDone(error_t error) {
+    call ModeTimer.stop();
+  }  
+  
+  
+  /* tasks and helper functions*/
+  void setTimer() {
+    call ModeTimer.start(call Random.rand16() % MODE_TIMER_RATE);     
+  }
+  task void RxModeTask() {
+    if (call Tda5250Control.RxMode() != SUCCESS)
+      post RxModeTask();
+  }
+  task void TxModeTask() {
+  if (call Tda5250Control.TxMode() != SUCCESS)
+    post TxModeTask();
+  }
+  task void SleepModeTask() {
+    if (call Tda5250Control.SleepMode() != SUCCESS)
+      post SleepModeTask();
+  }
+  
+  /***********************************************************************
+   * Commands and events
+   ***********************************************************************/   
+
+  async event void ModeTimer.fired() {
+    switch(mode) {
+/*      case 0:
+       call Tda5250Control.TimerMode(call Random.rand16() % MODE_TIMER_RATE/20, 
+                                     call Random.rand16() % MODE_TIMER_RATE/20);
+        break;
+      case 1:
+        call Tda5250Control.SelfPollingMode(call Random.rand16() % MODE_TIMER_RATE/20, 
+                                            call Random.rand16() % MODE_TIMER_RATE/20);        
+        break;
+ */      
+      case 2:
+        if (call Tda5250Control.RxMode() != SUCCESS)
+          post RxModeTask();
+        break;
+      case 3:
+        if (call Tda5250Control.TxMode() != SUCCESS)
+          post TxModeTask();
+        break;
+      default:
+        if (call Tda5250Control.SleepMode() != SUCCESS)
+          post SleepModeTask();
+        break;
+    }
+  }
+  
+  async event void Tda5250Control.PWDDDInterrupt() {
+    call Tda5250Control.RxMode();
+  }
+  
+  async event void Tda5250Control.TimerModeDone(){
+    atomic mode = call Random.rand16() % 6;
+    call Leds.led0On();
+    call Leds.led1On();
+    call Leds.led2On(); 
+    setTimer();
+  }
+  async event void Tda5250Control.SelfPollingModeDone(){
+    atomic mode = call Random.rand16() % 6;
+    call Leds.led0On();
+    call Leds.led1On();
+    call Leds.led2Off();   
+    setTimer();
+  }  
+  async event void Tda5250Control.RxModeDone(){
+    atomic mode = call Random.rand16() % 6;
+    call Leds.led0On();
+    call Leds.led1Off();
+    call Leds.led2On();  
+    setTimer();
+  }
+  async event void Tda5250Control.TxModeDone(){
+    atomic mode = call Random.rand16() % 6;
+    call Leds.led0Off();
+    call Leds.led1On();
+    call Leds.led2On();  
+    setTimer();
+  }    
+  async event void Tda5250Control.SleepModeDone(){
+    atomic mode = call Random.rand16() % 6;
+    call Leds.led0Off();
+    call Leds.led1Off();
+    call Leds.led2On();  
+    setTimer();
+  }
+  async event void Tda5250Control.RssiStable(){
+    atomic mode = call Random.rand16() % 6;
+    call Leds.led0On();
+    call Leds.led1Off();
+    call Leds.led2Off();
+  }  
+  
+}
+
+
diff --git a/apps/tests/eyesIFX/Radio/TestPacketSerializer/Makefile b/apps/tests/eyesIFX/Radio/TestPacketSerializer/Makefile
new file mode 100644
index 00000000..aeae5e1c
--- /dev/null
+++ b/apps/tests/eyesIFX/Radio/TestPacketSerializer/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestPacketSerializerC
+include $(MAKERULES)
+
diff --git a/apps/tests/eyesIFX/Radio/TestPacketSerializer/TestPacketSerializerC.nc b/apps/tests/eyesIFX/Radio/TestPacketSerializer/TestPacketSerializerC.nc
new file mode 100644
index 00000000..c07a531a
--- /dev/null
+++ b/apps/tests/eyesIFX/Radio/TestPacketSerializer/TestPacketSerializerC.nc
@@ -0,0 +1,92 @@
+/*                                  tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ *
+ **/
+
+#include <Timer.h>
+#include <message.h>
+
+configuration TestPacketSerializerC {
+}
+implementation {
+  components MainC, TestPacketSerializerP
+           , new AlarmMilliC() as TxTimer
+           , new AlarmMilliC() as RxTimer
+           , new AlarmMilliC() as CCATimer
+//            , new AlarmMilliC() as TimerTimer
+           , new AlarmMilliC() as SelfPollingTimer
+//            , new AlarmMilliC() as SleepTimer
+           , LedsC
+           , TDA5250RadioC
+           , RandomLfsrC
+           , UARTPhyP
+           , PacketSerializerP
+           ;
+
+  MainC.SoftwareInit -> TDA5250RadioC.Init;
+  MainC.SoftwareInit -> RandomLfsrC.Init;
+  MainC.SoftwareInit -> LedsC.Init;
+  MainC.SoftwareInit -> UARTPhyP.Init;
+  MainC.SoftwareInit -> PacketSerializerP.Init;
+  TestPacketSerializerP -> MainC.Boot;
+
+  TestPacketSerializerP.Random -> RandomLfsrC.Random;
+  TestPacketSerializerP.TxTimer -> TxTimer;
+  TestPacketSerializerP.RxTimer -> RxTimer;
+  TestPacketSerializerP.CCATimer -> CCATimer;
+//   TestPacketSerializerP.TimerTimer -> TimerTimer;
+  TestPacketSerializerP.SelfPollingTimer -> SelfPollingTimer;
+//   TestPacketSerializerP.SleepTimer -> SleepTimer;
+  TestPacketSerializerP.Leds  -> LedsC;
+  TestPacketSerializerP.TDA5250Control -> TDA5250RadioC.TDA5250Control;
+  TestPacketSerializerP.RadioSplitControl -> TDA5250RadioC.SplitControl; 
+  TestPacketSerializerP.Send -> PacketSerializerP.Send; 
+  TestPacketSerializerP.Receive -> PacketSerializerP.Receive; 
+
+  UARTPhyP.RadioByteComm -> TDA5250RadioC.RadioByteComm;    
+   
+  PacketSerializerP.RadioByteComm -> UARTPhyP.SerializerRadioByteComm;
+  PacketSerializerP.PhyPacketTx -> UARTPhyP.PhyPacketTx;
+  PacketSerializerP.PhyPacketRx -> UARTPhyP.PhyPacketRx;  
+}
+
+
+
diff --git a/apps/tests/eyesIFX/Radio/TestPacketSerializer/TestPacketSerializerP.nc b/apps/tests/eyesIFX/Radio/TestPacketSerializer/TestPacketSerializerP.nc
new file mode 100644
index 00000000..e4f4ad57
--- /dev/null
+++ b/apps/tests/eyesIFX/Radio/TestPacketSerializer/TestPacketSerializerP.nc
@@ -0,0 +1,199 @@
+// $Id: TestPacketSerializerP.nc,v 1.5 2010-06-29 22:07:32 scipio Exp $
+
+/*                                  tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+module TestPacketSerializerP {
+  uses {
+	  interface Boot;
+	  interface Alarm<TMilli, uint32_t> as TxTimer;
+	  interface Alarm<TMilli, uint32_t> as RxTimer;
+//     interface Alarm<TMilli, uint32_t> as TimerTimer;
+	  interface Alarm<TMilli, uint32_t> as CCATimer;
+	  interface Alarm<TMilli, uint32_t> as SelfPollingTimer;    
+//     interface Alarm<TMilli, uint32_t> as SleepTimer;
+	  interface Leds;
+	  interface TDA5250Control;
+	  interface Random;
+	  interface SplitControl as RadioSplitControl;
+	  interface Send;
+	  interface Receive;
+  }
+}
+
+implementation {
+  
+#define TIMER_RATE    500
+#define NUM_BYTES     TOSH_DATA_LENGTH
+  
+  uint8_t bytes_sent;
+  bool sending;
+  message_t sendMsg;
+  
+  event void Boot.booted() {
+	  uint8_t i;
+	  bytes_sent = 0;
+	  sending = FALSE;
+	  for(i=0; i<NUM_BYTES; i++)
+		  sendMsg.data[i] = 0x00;//call Random.rand16() / 2;
+	  call RadioSplitControl.start();
+  }
+  
+  event void RadioSplitControl.startDone(error_t error) {
+	  call TxTimer.start(call Random.rand16() % TIMER_RATE);
+//     call TimerTimer.start(call Random.rand16() % TIMER_RATE); 
+	  call SelfPollingTimer.start(call Random.rand16() % TIMER_RATE); 
+	  call RxTimer.start(call Random.rand16() % TIMER_RATE); 
+	  call CCATimer.start(call Random.rand16() % TIMER_RATE); 
+  }
+  
+  event void RadioSplitControl.stopDone(error_t error) {
+	  call TxTimer.stop();
+  }  
+
+  /***********************************************************************
+  * Commands and events
+  ***********************************************************************/   
+
+  async event void TxTimer.fired() {
+	  atomic {
+		  if(call TDA5250Control.TxMode() != FAIL) {
+			  bytes_sent = 0;
+			  sending = TRUE;
+			  //call Leds.led0On();
+			  //call Leds.led1On();
+			  //call Leds.led2On();
+			  return;
+		  }
+	  }
+	  call TxTimer.start(call Random.rand16() % TIMER_RATE); 
+  }
+  
+  async event void RxTimer.fired() {
+	  if(sending == FALSE)
+		  if(call TDA5250Control.RxMode() != FAIL) {
+		  	  call Leds.led1Toggle();
+			  return;
+		  }
+	  call RxTimer.start(call Random.rand16() % TIMER_RATE); 
+  }
+  
+  async event void CCATimer.fired() {
+	  if(sending == FALSE)  
+		  if(call TDA5250Control.CCAMode() != FAIL)
+			  return;
+	  call CCATimer.start(call Random.rand16() % TIMER_RATE); 
+  }
+  
+//   async event void TimerTimer.fired() {
+//     if(sending == FALSE)  
+//       if(call TDA5250Control.TimerMode(call Random.rand16() % TIMER_RATE/20, 
+//                                        call Random.rand16() % TIMER_RATE/20) != FAIL)                        
+//         return;
+//     call TimerTimer.start(call Random.rand16() % TIMER_RATE);                   
+//   }
+  
+  async event void SelfPollingTimer.fired() {
+	  if(sending == FALSE)
+		  if(call TDA5250Control.SelfPollingMode(call Random.rand16() % TIMER_RATE/20, 
+		     call Random.rand16() % TIMER_RATE/20) != FAIL)
+			  return;
+	  call SelfPollingTimer.start(call Random.rand16() % TIMER_RATE); 
+  }
+  
+//   async event void SleepTimer.fired() {
+//     if(sending == FALSE)  
+//       if(call TDA5250Control.SleepMode() != FAIL)
+//          return;
+//     call SleepTimer.start(call Random.rand16() % TIMER_RATE); 
+//   }  
+          
+    
+  async event void TDA5250Control.TxModeDone(){
+	  call Send.send(&sendMsg, NUM_BYTES);
+  }
+  
+  event void Send.sendDone(message_t* msg, error_t error) {
+	  call TDA5250Control.SleepMode();
+	  sending = FALSE;    
+	  call TxTimer.start(call Random.rand16() % TIMER_RATE);  
+	  call Leds.led0Toggle();
+  }
+  
+  event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+	  call Leds.led2Toggle();
+	  return msg;
+  }
+  
+  async event void TDA5250Control.TimerModeDone(){ 
+//     call Leds.led0On();
+//     call Leds.led1On();
+//     call Leds.led2Off();    
+  }
+  async event void TDA5250Control.SelfPollingModeDone(){ 
+	  call SelfPollingTimer.start(call Random.rand16() % TIMER_RATE);   
+/*	  call Leds.led0On();
+	  call Leds.led1Off();
+	  call Leds.led2On();   */     
+  }  
+  async event void TDA5250Control.RxModeDone(){ 
+	  call RxTimer.start(call Random.rand16() % TIMER_RATE);   
+// 	  call Leds.led0Off();
+// 	  call Leds.led1On();
+// 	  call Leds.led2On();  
+  }
+  async event void TDA5250Control.SleepModeDone(){ 
+//     call SleepTimer.start(call Random.rand16() % TIMER_RATE);   
+// 	  call Leds.led0Off();
+// 	  call Leds.led1Off();
+// 	  call Leds.led2On();
+  }
+  async event void TDA5250Control.CCAModeDone(){ 
+	  call CCATimer.start(call Random.rand16() % TIMER_RATE);   
+// 	  call Leds.led0On();
+// 	  call Leds.led1Off();
+// 	  call Leds.led2Off();  
+  }    
+  
+  async event void TDA5250Control.PWDDDInterrupt() {
+  }  
+}
+
+
diff --git a/apps/tests/eyesIFX/Radio/TestUARTPhy/Makefile b/apps/tests/eyesIFX/Radio/TestUARTPhy/Makefile
new file mode 100644
index 00000000..f45e388d
--- /dev/null
+++ b/apps/tests/eyesIFX/Radio/TestUARTPhy/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestUARTPhyC
+include $(MAKERULES)
+
diff --git a/apps/tests/eyesIFX/Radio/TestUARTPhy/TestUARTPhyC.nc b/apps/tests/eyesIFX/Radio/TestUARTPhy/TestUARTPhyC.nc
new file mode 100644
index 00000000..2265d85e
--- /dev/null
+++ b/apps/tests/eyesIFX/Radio/TestUARTPhy/TestUARTPhyC.nc
@@ -0,0 +1,75 @@
+/*                                  tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ *
+ **/
+
+#include "Timer.h"
+configuration TestUARTPhyC {
+}
+implementation {
+  components MainC, TestUARTPhyP
+           , new AlarmMilliC() as TxTimer
+           , LedsC
+           , TDA5250RadioC
+           , RandomLfsrC
+           , UARTPhyP
+           ;
+
+  MainC.SoftwareInit -> TDA5250RadioC.Init;
+  MainC.SoftwareInit -> RandomLfsrC.Init;
+  MainC.SoftwareInit -> LedsC.Init;
+  MainC.SoftwareInit -> UARTPhyP.Init;
+  TestUARTPhyP -> MainC.Boot;
+
+  TestUARTPhyP.Random -> RandomLfsrC.Random;
+  TestUARTPhyP.TxTimer -> TxTimer;
+  TestUARTPhyP.Leds  -> LedsC;
+  TestUARTPhyP.TDA5250Control -> TDA5250RadioC.TDA5250Control;
+  TestUARTPhyP.RadioSplitControl -> TDA5250RadioC.SplitControl;  
+  TestUARTPhyP.RadioByteComm -> UARTPhyP.SerializerRadioByteComm;
+  TestUARTPhyP.PhyPacketTx -> UARTPhyP.PhyPacketTx;
+  TestUARTPhyP.PhyPacketRx -> UARTPhyP.PhyPacketRx;
+  
+  UARTPhyP.RadioByteComm -> TDA5250RadioC.RadioByteComm;
+}
+
+
+
diff --git a/apps/tests/eyesIFX/Radio/TestUARTPhy/TestUARTPhyP.nc b/apps/tests/eyesIFX/Radio/TestUARTPhy/TestUARTPhyP.nc
new file mode 100644
index 00000000..303d057a
--- /dev/null
+++ b/apps/tests/eyesIFX/Radio/TestUARTPhy/TestUARTPhyP.nc
@@ -0,0 +1,135 @@
+// $Id: TestUARTPhyP.nc,v 1.5 2010-06-29 22:07:32 scipio Exp $
+
+/*                                  tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+module TestUARTPhyP {
+  uses {
+	  interface Boot;
+	  interface Alarm<TMilli, uint32_t> as TxTimer;
+	  interface Leds;
+	  interface TDA5250Control;
+	  interface Random;
+	  interface SplitControl as RadioSplitControl;
+	  interface PhyPacketTx;
+	  interface PhyPacketRx;
+	  interface RadioByteComm;
+  }
+}
+
+implementation {
+  
+#define TX_TIMER_RATE 500
+#define NUM_BYTES     36
+  
+  uint8_t bytes_sent;
+  
+  event void Boot.booted() {
+	  bytes_sent = 0;
+	  call RadioSplitControl.start();
+  }
+  
+  event void RadioSplitControl.startDone(error_t error) {
+	  // call TDA5250Control.TxMode();
+	  call TDA5250Control.RxMode();
+  }
+  
+  event void RadioSplitControl.stopDone(error_t error) {
+	  call TxTimer.stop();
+  }  
+
+  /***********************************************************************
+  * Commands and events
+  ***********************************************************************/   
+
+  async event void TxTimer.fired() {
+	  call TDA5250Control.TxMode();
+  }
+    
+  async event void TDA5250Control.TxModeDone(){
+	  call PhyPacketTx.sendHeader();
+  }
+  
+  async event void PhyPacketTx.sendHeaderDone(error_t error) {
+	  call RadioByteComm.txByte(call Random.rand16() / 2);
+  }
+  
+  async event void RadioByteComm.txByteReady(error_t error) {
+	  if(++bytes_sent < NUM_BYTES) {
+      		  call RadioByteComm.txByte(call Random.rand16() / 2);
+    	  } else { 
+		  bytes_sent = 0;  
+		  call PhyPacketTx.sendFooter();    
+	  }
+  } 
+  
+  async event void PhyPacketTx.sendFooterDone(error_t error) {
+	  call TDA5250Control.SleepMode();
+	  call TxTimer.start(call Random.rand16() % TX_TIMER_RATE);   
+	  call Leds.led0Toggle();
+  }  
+
+  async event void PhyPacketRx.recvHeaderDone() {
+	  call Leds.led2On();
+  }    
+  
+  async event void PhyPacketRx.recvFooterDone(bool error) {
+  }  
+  
+  async event void RadioByteComm.rxByteReady(uint8_t data) {
+	  call Leds.led2Toggle();
+  }  
+  
+  async event void TDA5250Control.PWDDDInterrupt() {
+  }
+  async event void TDA5250Control.TimerModeDone(){ 
+  }
+  async event void TDA5250Control.SelfPollingModeDone(){       
+  }  
+  async event void TDA5250Control.RxModeDone(){ 
+  }
+  async event void TDA5250Control.SleepModeDone(){  
+  }
+  async event void TDA5250Control.CCAModeDone(){ 
+  }  
+  
+}
+
+
diff --git a/apps/tests/eyesIFX/Radio/TestUARTPhyWithModes/Makefile b/apps/tests/eyesIFX/Radio/TestUARTPhyWithModes/Makefile
new file mode 100644
index 00000000..f45e388d
--- /dev/null
+++ b/apps/tests/eyesIFX/Radio/TestUARTPhyWithModes/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestUARTPhyC
+include $(MAKERULES)
+
diff --git a/apps/tests/eyesIFX/Radio/TestUARTPhyWithModes/TestUARTPhyC.nc b/apps/tests/eyesIFX/Radio/TestUARTPhyWithModes/TestUARTPhyC.nc
new file mode 100644
index 00000000..bfc08a15
--- /dev/null
+++ b/apps/tests/eyesIFX/Radio/TestUARTPhyWithModes/TestUARTPhyC.nc
@@ -0,0 +1,85 @@
+/*                                  tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ *
+ **/
+
+#include "Timer.h"
+configuration TestUARTPhyC {
+}
+implementation {
+  components MainC, TestUARTPhyP
+           , new AlarmMilliC() as TxTimer
+           , new AlarmMilliC() as RxTimer
+           , new AlarmMilliC() as CCATimer
+           , new AlarmMilliC() as TimerTimer
+//            , new AlarmMilliC() as SelfPollingTimer
+//            , new AlarmMilliC() as SleepTimer
+           , LedsC
+           , TDA5250RadioC
+           , RandomLfsrC
+           , UARTPhyP
+           ;
+
+  MainC.SoftwareInit -> TDA5250RadioC.Init;
+  MainC.SoftwareInit -> RandomLfsrC.Init;
+  MainC.SoftwareInit -> LedsC.Init;
+  MainC.SoftwareInit -> UARTPhyP.Init;
+  TestUARTPhyP -> MainC.Boot;
+
+  TestUARTPhyP.Random -> RandomLfsrC.Random;
+  TestUARTPhyP.TxTimer -> TxTimer;
+  TestUARTPhyP.RxTimer -> RxTimer;
+  TestUARTPhyP.CCATimer -> CCATimer;
+  TestUARTPhyP.TimerTimer -> TimerTimer;
+//   TestUARTPhyP.SelfPollingTimer -> SelfPollingTimer;
+//   TestUARTPhyP.SleepTimer -> SleepTimer;
+  TestUARTPhyP.Leds  -> LedsC;
+  TestUARTPhyP.TDA5250Control -> TDA5250RadioC.TDA5250Control;
+  TestUARTPhyP.RadioSplitControl -> TDA5250RadioC.SplitControl;  
+  TestUARTPhyP.RadioByteComm -> UARTPhyP.SerializerRadioByteComm;
+  TestUARTPhyP.PhyPacketTx -> UARTPhyP.PhyPacketTx;
+  TestUARTPhyP.PhyPacketRx -> UARTPhyP.PhyPacketRx;
+  
+  UARTPhyP.RadioByteComm -> TDA5250RadioC.RadioByteComm;
+}
+
+
+
diff --git a/apps/tests/eyesIFX/Radio/TestUARTPhyWithModes/TestUARTPhyP.nc b/apps/tests/eyesIFX/Radio/TestUARTPhyWithModes/TestUARTPhyP.nc
new file mode 100644
index 00000000..28dc9c39
--- /dev/null
+++ b/apps/tests/eyesIFX/Radio/TestUARTPhyWithModes/TestUARTPhyP.nc
@@ -0,0 +1,205 @@
+// $Id: TestUARTPhyP.nc,v 1.5 2010-06-29 22:07:35 scipio Exp $
+
+/*                                  tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+module TestUARTPhyP {
+  uses {
+    interface Boot;
+    interface Alarm<TMilli, uint32_t> as TxTimer;
+    interface Alarm<TMilli, uint32_t> as RxTimer;
+    interface Alarm<TMilli, uint32_t> as TimerTimer;
+    interface Alarm<TMilli, uint32_t> as CCATimer;
+//     interface Alarm<TMilli, uint32_t> as SelfPollingTimer;    
+//     interface Alarm<TMilli, uint32_t> as SleepTimer;
+    interface Leds;
+    interface TDA5250Control;
+    interface Random;
+    interface SplitControl as RadioSplitControl;
+    interface PhyPacketTx;
+    interface PhyPacketRx;
+    interface RadioByteComm;
+  }
+}
+
+implementation {
+  
+  #define TIMER_RATE 500
+  #define NUM_BYTES     36
+  
+  uint8_t bytes_sent;
+  bool sending;
+  
+  event void Boot.booted() {
+    bytes_sent = 0;
+    sending = FALSE;
+    call RadioSplitControl.start();
+  }
+  
+  event void RadioSplitControl.startDone(error_t error) {
+    call TxTimer.start(call Random.rand16() % TIMER_RATE);
+    call TimerTimer.start(call Random.rand16() % TIMER_RATE); 
+    call RxTimer.start(call Random.rand16() % TIMER_RATE); 
+    call CCATimer.start(call Random.rand16() % TIMER_RATE); 
+  }
+  
+  event void RadioSplitControl.stopDone(error_t error) {
+    call TxTimer.stop();
+  }  
+
+  /***********************************************************************
+   * Commands and events
+   ***********************************************************************/   
+
+  async event void TxTimer.fired() {
+    atomic {
+      if(call TDA5250Control.TxMode() != FAIL) {
+        bytes_sent = 0;
+        sending = TRUE;
+        call Leds.led0On();
+        call Leds.led1On();
+        call Leds.led2On();
+        return;
+      }
+    }
+    call TxTimer.start(call Random.rand16() % TIMER_RATE); 
+  }
+  
+  async event void RxTimer.fired() {
+    if(sending == FALSE)
+      if(call TDA5250Control.RxMode() != FAIL)
+        return;
+    call RxTimer.start(call Random.rand16() % TIMER_RATE); 
+  }
+  
+  async event void CCATimer.fired() {
+    if(sending == FALSE)  
+      if(call TDA5250Control.CCAMode() != FAIL)
+        return;
+    call CCATimer.start(call Random.rand16() % TIMER_RATE); 
+  }
+  
+  async event void TimerTimer.fired() {
+    if(sending == FALSE)  
+      if(call TDA5250Control.TimerMode(call Random.rand16() % TIMER_RATE/20, 
+                                       call Random.rand16() % TIMER_RATE/20) != FAIL)                        
+        return;
+    call TimerTimer.start(call Random.rand16() % TIMER_RATE);                   
+  }
+  
+//   async event void SelfPollingTimer.fired() {
+//     if(sending == FALSE)
+//       if(call TDA5250Control.SelfPollingMode(call Random.rand16() % TIMER_RATE/20, 
+//                                              call Random.rand16() % TIMER_RATE/20) != FAIL)
+//         return;
+//     call SelfPollingTimer.start(call Random.rand16() % TIMER_RATE); 
+//   }
+  
+//   async event void SleepTimer.fired() {
+//     if(sending == FALSE)  
+//       if(call TDA5250Control.SleepMode() != FAIL)
+//          return;
+//     call SleepTimer.start(call Random.rand16() % TIMER_RATE); 
+//   }  
+          
+    
+  async event void TDA5250Control.TxModeDone(){
+    call PhyPacketTx.sendHeader();
+  }
+  
+  async event void PhyPacketTx.sendHeaderDone(error_t error) {
+    call RadioByteComm.txByte(call Random.rand16() / 2);
+  }
+  
+  async event void RadioByteComm.txByteReady(error_t error) {
+    if(++bytes_sent < NUM_BYTES)
+      call RadioByteComm.txByte(call Random.rand16() / 2);
+    else {
+      bytes_sent = 0;  
+      call PhyPacketTx.sendFooter();    
+    }
+  } 
+  
+  async event void PhyPacketTx.sendFooterDone(error_t error) {
+    call TDA5250Control.SleepMode();
+    sending = FALSE;    
+    call TxTimer.start(call Random.rand16() % TIMER_RATE);
+  }  
+  
+  async event void TDA5250Control.TimerModeDone(){ 
+    call TimerTimer.start(call Random.rand16() % TIMER_RATE); 
+    call Leds.led0On();
+    call Leds.led1On();
+    call Leds.led2Off();    
+  }
+  async event void TDA5250Control.SelfPollingModeDone(){ 
+//     call SelfPollingTimer.start(call Random.rand16() % TIMER_RATE);   
+//     call Leds.led0On();
+//     call Leds.led1Off();
+//     call Leds.led2On();        
+  }  
+  async event void TDA5250Control.RxModeDone(){ 
+    call RxTimer.start(call Random.rand16() % TIMER_RATE);   
+    call Leds.led0Off();
+    call Leds.led1On();
+    call Leds.led2On();  
+  }
+  async event void TDA5250Control.SleepModeDone(){ 
+//     call SleepTimer.start(call Random.rand16() % TIMER_RATE);   
+    call Leds.led0Off();
+    call Leds.led1Off();
+    call Leds.led2On();
+  }
+  async event void TDA5250Control.CCAModeDone(){ 
+    call CCATimer.start(call Random.rand16() % TIMER_RATE);   
+    call Leds.led0On();
+    call Leds.led1Off();
+    call Leds.led2Off();  
+  }    
+  
+  async event void TDA5250Control.PWDDDInterrupt() {
+  }
+  async event void PhyPacketRx.recvHeaderDone() {}    
+  async event void PhyPacketRx.recvFooterDone(bool error) {}  
+  async event void RadioByteComm.rxByteReady(uint8_t data) {}
+  
+}
+
+
diff --git a/apps/tests/eyesIFX/RadioCountToFlash/Makefile b/apps/tests/eyesIFX/RadioCountToFlash/Makefile
new file mode 100644
index 00000000..e98a3bc3
--- /dev/null
+++ b/apps/tests/eyesIFX/RadioCountToFlash/Makefile
@@ -0,0 +1,16 @@
+COMPONENT=RadioCountToFlashAppC
+BUILD_EXTRA_DEPS = RadioCountMsg.py RadioCountMsg.class
+CLEAN_EXTRA = *.class RadioCountMsg.py RadioCountMsg.java
+
+RadioCountMsg.py: RadioCountToFlash.h
+	mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=RadioCountMsg RadioCountToFlash.h RadioCountMsg -o $@
+
+RadioCountMsg.class: RadioCountMsg.java
+	javac RadioCountMsg.java
+
+RadioCountMsg.java: RadioCountToFlash.h
+	mig java -target=$(PLATFORM) $(CFLAGS) -java-classname=RadioCountMsg RadioCountToFlash.h RadioCountMsg -o $@
+
+
+include $(MAKERULES)
+
diff --git a/apps/tests/eyesIFX/RadioCountToFlash/README.txt b/apps/tests/eyesIFX/RadioCountToFlash/README.txt
new file mode 100644
index 00000000..2bf61d2d
--- /dev/null
+++ b/apps/tests/eyesIFX/RadioCountToFlash/README.txt
@@ -0,0 +1,22 @@
+README for RadioCountToFlash
+
+Description:
+
+RadioCountToLeds maintains a 1Hz counter and broadcsts its value repeatedly. A 
+RadioCountToLeds node that hears a counter writes the counter to the flash. 
+After LOG_LENGTH (default = 16) successful receiptions the previously stored counters 
+are read from the flash with a delay of 100ms between each read. The bottom three bits 
+are displayed on the LEDs. This application tests the coexistance between 
+the radio and the flash.
+
+Tools:
+
+RadioCountMsg.java is a Java class representing the message that
+this application sends.  RadioCountMsg.py is a Python class representing
+the message that this application sends.
+
+Known bugs/limitations:
+
+None.
+
+
diff --git a/apps/tests/eyesIFX/RadioCountToFlash/RadioCountToFlash.h b/apps/tests/eyesIFX/RadioCountToFlash/RadioCountToFlash.h
new file mode 100644
index 00000000..2c8a0ac1
--- /dev/null
+++ b/apps/tests/eyesIFX/RadioCountToFlash/RadioCountToFlash.h
@@ -0,0 +1,12 @@
+#ifndef RADIO_COUNT_TO_FLASH_H
+#define RADIO_COUNT_TO_FLASH_H
+
+typedef nx_struct RadioCountMsg {
+  nx_uint16_t counter;
+} RadioCountMsg;
+
+enum {
+  AM_RADIOCOUNTMSG = 6,
+};
+
+#endif
diff --git a/apps/tests/eyesIFX/RadioCountToFlash/RadioCountToFlashAppC.nc b/apps/tests/eyesIFX/RadioCountToFlash/RadioCountToFlashAppC.nc
new file mode 100644
index 00000000..9c8ec866
--- /dev/null
+++ b/apps/tests/eyesIFX/RadioCountToFlash/RadioCountToFlashAppC.nc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * This application tests the coexistence of radio and flash.
+ * (based on RadioCountToLeds)
+ *
+ * @see README.TXT
+ * @author Philipp Huppertz
+ * @author Philip Levis (RadioCountToLeds)
+ * @date   June 6 2005
+ */
+
+#include "RadioCountToFlash.h"
+#include "StorageVolumes.h"
+
+
+configuration RadioCountToFlashAppC {}
+implementation {
+  components MainC, RadioCountToFlashC as App, LedsC, PlatformLedsC;
+  components new AMSenderC(AM_RADIOCOUNTMSG);
+  components new AMReceiverC(AM_RADIOCOUNTMSG);
+  components new TimerMilliC() as RadioTimer;
+  components new TimerMilliC() as FlashTimer;
+  components ActiveMessageC;
+  components new LogStorageC(VOLUME_LOGTEST, TRUE);
+
+  
+  
+  
+  App.Boot -> MainC.Boot;
+  
+  App.Receive -> AMReceiverC;
+  App.AMSend -> AMSenderC;
+  App.AMControl -> ActiveMessageC;
+  App.Leds -> LedsC;
+  App.FailureLed -> PlatformLedsC.Led3;
+  App.FlashTimer -> FlashTimer;
+  App.RadioTimer -> RadioTimer;
+  App.Packet -> AMSenderC;
+  
+  App.LogRead -> LogStorageC.LogRead;
+  App.LogWrite -> LogStorageC.LogWrite;
+}
+
+
diff --git a/apps/tests/eyesIFX/RadioCountToFlash/RadioCountToFlashC.nc b/apps/tests/eyesIFX/RadioCountToFlash/RadioCountToFlashC.nc
new file mode 100644
index 00000000..ba523322
--- /dev/null
+++ b/apps/tests/eyesIFX/RadioCountToFlash/RadioCountToFlashC.nc
@@ -0,0 +1,214 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * Copyright (c) 2002-2003 Intel Corporation.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+
+/**
+ * This application tests the coexistence of radio and flash.
+ * (based on RadioCountToLeds)
+ *
+ * @see README.TXT
+ * @author Philipp Huppertz
+ * @author Philip Levis (RadioCountToLeds)
+ * @date   June 6 2005
+ */
+
+#include "Timer.h"
+#include "RadioCountToFlash.h"
+#define LOG_LENGTH 15
+
+module RadioCountToFlashC {
+  uses {
+    interface Leds;
+    interface Boot;
+    interface Receive;
+    interface AMSend;
+    interface Timer<TMilli> as FlashTimer;
+    interface Timer<TMilli> as RadioTimer;
+    interface SplitControl as AMControl;
+    interface Packet;
+    interface LogRead;
+    interface LogWrite;
+    interface GeneralIO as FailureLed;
+  }
+}
+implementation {
+
+  message_t packet;
+
+  bool locked;
+  uint16_t sendingCounter = 0;
+  uint16_t receiveCounter = 0;
+  uint16_t readBuffer = 0;
+  uint16_t logCounter = 0;      
+ 
+  void failure() {
+    call FailureLed.set();
+    for (;;) {
+      ;
+    }
+  } 
+  
+  task void readingTask() {
+    if (call LogRead.read((void*) &readBuffer, sizeof(receiveCounter)) != SUCCESS) {
+      post readingTask();
+    }
+  }
+  
+  task void writingTask() {
+    if (call LogWrite.append((void*)receiveCounter, sizeof(receiveCounter)) != SUCCESS) {
+      post writingTask();
+    }
+  }
+  
+  event void Boot.booted() {
+    call LogWrite.erase();
+    call AMControl.start();
+  }
+
+  event void AMControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+      call RadioTimer.startPeriodic(1000);
+    }
+    else {
+      call AMControl.start();
+    }
+  }
+
+  event void AMControl.stopDone(error_t err) {
+    	// do nothing
+  }
+  
+  event void FlashTimer.fired() {
+    if (call LogRead.read((void*) &readBuffer, sizeof(receiveCounter)) != SUCCESS) {
+      post readingTask();
+    }
+  }
+      
+  event void RadioTimer.fired() {
+    dbg("RadioCountToLedsC", "RadioCountToLedsC: timer fired, counter is %hu.\n", counter);
+    if (locked) {
+      return;
+    }
+    else {
+      RadioCountMsg* rcm = (RadioCountMsg*)call Packet.getPayload(&packet, sizeof(rcm));
+      if (rcm == NULL || call Packet.maxPayloadLength() < sizeof(RadioCountMsg)) {
+        return;
+      }
+      ++sendingCounter;
+      rcm->counter = sendingCounter;	
+      if (call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(RadioCountMsg)) == SUCCESS) {
+        dbg("RadioCountToLedsC", "RadioCountToLedsC: packet sent.\n", counter);	
+        locked = TRUE;
+      }
+    }
+  }
+
+  event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) {
+    dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len);
+    if (len != sizeof(RadioCountMsg)) {return bufPtr;}
+    else {
+      RadioCountMsg* rcm = (RadioCountMsg*)payload;
+      receiveCounter = rcm->counter;
+      if (call LogWrite.append((void*)&receiveCounter, sizeof(receiveCounter)) != SUCCESS) {
+        post writingTask();
+      }
+    }
+    return bufPtr;
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    if (&packet == bufPtr) {
+      locked = FALSE;
+    }
+  }
+
+  event void LogRead.readDone(void* buf, storage_len_t len, error_t error) {
+    --logCounter;
+    if (error != SUCCESS) {
+      failure();
+    }
+    readBuffer = *(uint16_t*)buf;
+    if ( logCounter > 0 ) {
+      if (readBuffer & 0x1) {
+        call Leds.led0On();
+      }
+      else {
+        call Leds.led0Off();
+      }
+      if (readBuffer & 0x2) {
+        call Leds.led1On();
+      }
+      else {
+        call Leds.led1Off();
+      }
+      if (readBuffer & 0x4) {
+        call Leds.led2On();
+      }
+      else {
+        call Leds.led2Off();
+      }
+      call FlashTimer.startOneShot(100);
+    } 
+  }  
+      
+  event void LogRead.seekDone(error_t error) {
+    if (error != SUCCESS) {
+      failure();
+    }
+  }
+  
+  event void LogWrite.appendDone(void* buf, storage_len_t len, bool recordsLost, error_t error) {
+    ++logCounter;
+    if (error != SUCCESS) {
+      failure();
+    }
+    if (logCounter > LOG_LENGTH) {
+      if (call LogWrite.sync() != SUCCESS) {
+        failure();
+      } 
+    } 
+  }
+
+  event void LogWrite.syncDone(error_t error) {
+    if (error != SUCCESS) {
+      failure();
+    }
+    call FlashTimer.startOneShot(100);
+  }
+      
+  event void LogWrite.eraseDone(error_t error) {
+    if (error != SUCCESS) {
+      failure();
+    }
+  }
+      
+}
+
diff --git a/apps/tests/eyesIFX/RadioCountToFlash/volumes-at45db.xml b/apps/tests/eyesIFX/RadioCountToFlash/volumes-at45db.xml
new file mode 100644
index 00000000..daa0d507
--- /dev/null
+++ b/apps/tests/eyesIFX/RadioCountToFlash/volumes-at45db.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="LOGTEST" size="262144"/>
+</volume_table>
diff --git a/apps/tests/eyesIFX/Timer/Makefile b/apps/tests/eyesIFX/Timer/Makefile
new file mode 100644
index 00000000..03579df0
--- /dev/null
+++ b/apps/tests/eyesIFX/Timer/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestTimerC
+include $(MAKERULES)
+
diff --git a/apps/tests/eyesIFX/Timer/TestTimerC.nc b/apps/tests/eyesIFX/Timer/TestTimerC.nc
new file mode 100644
index 00000000..9c4ca846
--- /dev/null
+++ b/apps/tests/eyesIFX/Timer/TestTimerC.nc
@@ -0,0 +1,74 @@
+/*                                  tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ *
+ **/
+
+#include "Timer.h"
+configuration TestTimerC {
+}
+implementation {
+  components Main, TestTimerM
+           , new AlarmMilliC() as Timer0
+           , new AlarmMilliC() as Timer1
+           , new AlarmMilliC() as Timer2
+           , new AlarmMilliC() as Timer3
+					 , new AlarmMilliC() as Timer4					 					 					 					 
+					 , new AlarmMilliC() as Timer5	
+					 , new AlarmMilliC() as Timer6	
+					 , new AlarmMilliC() as Timer7	
+					 , new AlarmMilliC() as Timer8	
+           ;
+
+  TestTimerM -> Main.Boot;
+
+  TestTimerM.Timer0 -> Timer0;
+	TestTimerM.Timer1 -> Timer1;
+	TestTimerM.Timer2 -> Timer2;
+	TestTimerM.Timer3 -> Timer3;
+	TestTimerM.Timer4 -> Timer4;
+	TestTimerM.Timer5 -> Timer5;
+	TestTimerM.Timer6 -> Timer6;
+	TestTimerM.Timer7 -> Timer7;
+	TestTimerM.Timer8 -> Timer8;
+}
+
+
+
diff --git a/apps/tests/eyesIFX/Timer/TestTimerM.nc b/apps/tests/eyesIFX/Timer/TestTimerM.nc
new file mode 100644
index 00000000..6d71f276
--- /dev/null
+++ b/apps/tests/eyesIFX/Timer/TestTimerM.nc
@@ -0,0 +1,100 @@
+// $Id: TestTimerM.nc,v 1.5 2010-06-29 22:07:36 scipio Exp $
+
+/*                                  tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+module TestTimerM {
+  uses {
+    interface Boot;
+    interface Alarm<TMilli, uint32_t> as Timer0;
+		interface Alarm<TMilli, uint32_t> as Timer1;
+		interface Alarm<TMilli, uint32_t> as Timer2;
+		interface Alarm<TMilli, uint32_t> as Timer3;
+		interface Alarm<TMilli, uint32_t> as Timer4;
+		interface Alarm<TMilli, uint32_t> as Timer5;
+		interface Alarm<TMilli, uint32_t> as Timer6;
+		interface Alarm<TMilli, uint32_t> as Timer7;
+		interface Alarm<TMilli, uint32_t> as Timer8;
+  }
+}
+
+implementation {
+
+  #define DELAY  20
+  
+  event void Boot.booted() {
+	  call Timer0.start(DELAY);
+  }
+
+  /***********************************************************************
+   * Commands and events
+   ***********************************************************************/   
+
+  async event void Timer0.fired() {
+		call Timer1.start(DELAY);
+  }
+  async event void Timer1.fired() {
+		call Timer2.start(DELAY);	
+  }
+  async event void Timer2.fired() {
+		call Timer3.start(DELAY);
+  }
+  async event void Timer3.fired() {
+		call Timer4.start(DELAY);	
+  }
+  async event void Timer4.fired() {
+		call Timer5.start(DELAY);		
+  }	
+  async event void Timer5.fired() {
+		call Timer6.start(DELAY);
+  }
+  async event void Timer6.fired() {
+		call Timer7.start(DELAY);
+  }	
+  async event void Timer7.fired() {
+		call Timer8.start(DELAY);			
+  }	
+  async event void Timer8.fired() {
+		call Timer0.start(DELAY);		
+  }					
+  
+}
+
+
diff --git a/apps/tests/mica2/ADC/Makefile b/apps/tests/mica2/ADC/Makefile
new file mode 100644
index 00000000..064a45bf
--- /dev/null
+++ b/apps/tests/mica2/ADC/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestADCC
+include $(MAKERULES)
+
diff --git a/apps/tests/mica2/ADC/TestADCC.nc b/apps/tests/mica2/ADC/TestADCC.nc
new file mode 100644
index 00000000..fec1f08a
--- /dev/null
+++ b/apps/tests/mica2/ADC/TestADCC.nc
@@ -0,0 +1,56 @@
+// $Id: TestADCC.nc,v 1.5 2010-06-29 22:07:36 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * Copyright (c) 2002-2005 Intel Corporation.
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * @author tinyos-help@millennium.berkeley.edu
+ * @author Hu Siquan <husq@xbow.com>
+ **/
+
+configuration TestADCC
+{
+}
+implementation
+{
+  components Main, TestADCM, DemoSensorC, LedsC;
+
+  TestADCM -> Main.Boot;
+  Main.SoftwareInit -> LedsC;
+  TestADCM.Leds -> LedsC;
+  TestADCM.SensorControl -> DemoSensorC;   
+  TestADCM.AcquireData -> DemoSensorC; 
+}
+
diff --git a/apps/tests/mica2/ADC/TestADCM.nc b/apps/tests/mica2/ADC/TestADCM.nc
new file mode 100644
index 00000000..011c0f60
--- /dev/null
+++ b/apps/tests/mica2/ADC/TestADCM.nc
@@ -0,0 +1,74 @@
+// $Id: TestADCM.nc,v 1.5 2010-06-29 22:07:36 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * Copyright (c) 2002-2003 Intel Corporation
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ *
+ * @author Hu Siquan <husq@xbow.com>
+ *
+ * Implementation for TestADC application. 
+ * Toggle the green LED when a dataReady event fires.
+ **/
+
+
+module TestADCM
+{
+  uses interface StdControl as SensorControl;
+  uses interface AcquireData;
+  uses interface Leds;
+  uses interface Boot;
+}
+implementation
+{
+  event void Boot.booted()
+  {
+    call Leds.led0Toggle();
+	call SensorControl.start();
+    call AcquireData.getData();
+  }
+
+  event void AcquireData.dataReady(uint16_t data) {
+	call SensorControl.stop();
+    call Leds.led1Toggle();
+    if (data & 1)
+      call Leds.led2On();
+    else
+      call Leds.led2Off();
+  }
+
+  event void AcquireData.error(uint16_t info) {
+	call SensorControl.stop();  	
+  }
+}
+
diff --git a/apps/tests/mica2/mts300/Makefile b/apps/tests/mica2/mts300/Makefile
new file mode 100644
index 00000000..3a7dc907
--- /dev/null
+++ b/apps/tests/mica2/mts300/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestMts300C
+SENSORBOARD=mts300
+include $(MAKERULES)
+
diff --git a/apps/tests/mica2/mts300/TestMts300C.nc b/apps/tests/mica2/mts300/TestMts300C.nc
new file mode 100644
index 00000000..f7da8d79
--- /dev/null
+++ b/apps/tests/mica2/mts300/TestMts300C.nc
@@ -0,0 +1,44 @@
+
+#include "XMTS300.h"
+#include "mts300.h"
+
+configuration TestMts300C
+{
+}
+implementation
+{
+  components MainC, TestMts300P, LedsC, NoLedsC;
+  components new TimerMilliC() as MTS300Timer;
+
+  components ActiveMessageC as Radio;
+  components SerialActiveMessageC as Serial;
+
+// sensorboard devices
+  components new SensorMts300C();
+
+  TestMts300P -> MainC.Boot;
+
+  TestMts300P.MTS300Timer -> MTS300Timer;
+  TestMts300P.Leds -> LedsC;
+
+  // communication
+  TestMts300P.RadioControl -> Radio;
+  TestMts300P.RadioSend -> Radio.AMSend[AM_MTS300MSG];
+  TestMts300P.RadioPacket -> Radio;
+
+  TestMts300P.UartControl -> Serial;
+  TestMts300P.UartSend -> Serial.AMSend[AM_MTS300MSG];
+  TestMts300P.UartPacket -> Serial;
+
+  // sensor components
+  TestMts300P.Vref -> SensorMts300C.Vref;
+  TestMts300P.Sounder -> SensorMts300C.Sounder;
+  
+  TestMts300P.Light -> SensorMts300C.Light;
+  TestMts300P.Temp -> SensorMts300C.Temp;
+  TestMts300P.Microphone -> SensorMts300C.Microphone;
+  TestMts300P.AccelX -> SensorMts300C.AccelX;
+  TestMts300P.AccelY -> SensorMts300C.AccelY;
+  TestMts300P.MagX -> SensorMts300C.MagX;
+  TestMts300P.MagY -> SensorMts300C.MagY;
+}
diff --git a/apps/tests/mica2/mts300/TestMts300P.nc b/apps/tests/mica2/mts300/TestMts300P.nc
new file mode 100644
index 00000000..f0d011da
--- /dev/null
+++ b/apps/tests/mica2/mts300/TestMts300P.nc
@@ -0,0 +1,393 @@
+#include "Timer.h"
+#include "XMTS300.h"
+#include "mts300.h"
+
+module TestMts300P
+{
+  uses
+  {
+    interface Leds;
+    interface Boot;
+    interface Timer<TMilli> as MTS300Timer;
+    // communication
+    interface SplitControl as RadioControl;
+    interface Packet as RadioPacket;
+    interface AMSend as RadioSend;
+
+    interface SplitControl as UartControl;
+    interface Packet as UartPacket;
+    interface AMSend as UartSend;
+    // sensor components
+    interface Mts300Sounder as Sounder;
+   	interface Read<uint16_t> as Vref; //!< voltage
+    interface Read<uint16_t> as Light;
+    interface Read<uint16_t> as Temp;
+   	interface Read<uint16_t> as Microphone; //!< Mic sensor
+   	interface Read<uint16_t> as AccelX; //!< Accelerometer sensor
+   	interface Read<uint16_t> as AccelY; //!< Accelerometer sensor
+   	interface Read<uint16_t> as MagX; //!< magnetometer sensor
+   	interface Read<uint16_t> as MagY; //!< magnetometer sensor
+
+  }
+}
+implementation
+{
+
+  enum
+  {
+  	STATE_IDLE = 0,
+  	STATE_VREF_START,
+  	STATE_VREF_READY,      //!< smaple complete
+  	STATE_LIGHT_START,
+  	STATE_LIGHT_READY,     //!< smaple complete
+  	STATE_TEMP_START,
+  	STATE_TEMP_READY,      //!< smaple complete
+  	STATE_MIC_START,
+  	STATE_MIC_READY,      //!< smaple complete
+  	STATE_ACCELX_START,
+  	STATE_ACCELX_READY,      //!< smaple complete
+  	STATE_ACCELY_START,
+  	STATE_ACCELy_READY,      //!< smaple complete
+  	STATE_MAGX_START,
+  	STATE_MAGX_READY,      //!< smaple complete
+  	STATE_MAGY_START,
+  	STATE_MAGY_READY,      //!< smaple complete
+  };
+
+  bool sending_packet;
+  bool packet_ready;
+  uint8_t state;
+  uint16_t counter = 0;
+  message_t packet;
+  Mts300Msg* pMsg;
+
+  // Zero out the accelerometer, chrl@20070213
+  norace uint16_t accel_ave_x, accel_ave_y;
+  norace uint8_t accel_ave_points;
+
+
+//////////////////////////////////////////////////////////////////////////////
+//
+//  packet sending
+//
+//////////////////////////////////////////////////////////////////////////////
+  task void send_msg()
+  {
+    atomic packet_ready = FALSE;
+    // check length of the allocated buffer to see if it is enough for our packet
+    if (call RadioPacket.maxPayloadLength() < sizeof(Mts300Msg))
+    {
+      return ;
+    }
+    // OK, the buffer is large enough
+    //pMsg->vref = counter;
+    if (call UartSend.send(AM_BROADCAST_ADDR, &packet, sizeof(Mts300Msg)) == SUCCESS)
+    {
+      sending_packet = TRUE;
+      call Leds.led2On();
+    }
+  }
+
+//////////////////////////////////////////////////////////////////////////////
+//
+//  basic control routines
+//
+//////////////////////////////////////////////////////////////////////////////
+  event void Boot.booted()
+  {
+    sending_packet = FALSE;
+    packet_ready = FALSE;
+    state = STATE_IDLE;
+    pMsg = (Mts300Msg*)call RadioPacket.getPayload(&packet, sizeof(Mts300Msg));
+    if (pMsg == NULL) {
+      call Leds.led0On();
+      return;
+    }
+
+    // Zero out the accelerometer, chrl@20070213
+    accel_ave_x = 0;
+    accel_ave_y = 0;
+    accel_ave_points = ACCEL_AVERAGE_POINTS;
+
+    call RadioControl.start();
+    call UartControl.start();
+  }
+
+  event void RadioControl.startDone(error_t err)
+  {
+    if (err != SUCCESS)
+    {
+      call RadioControl.start();
+    }
+  }
+
+  event void RadioControl.stopDone(error_t err)
+  {
+    // do nothing
+  }
+
+  event void UartControl.startDone(error_t err)
+  {
+    if (err == SUCCESS)
+    {
+      call Sounder.beep(1000);
+      call MTS300Timer.startPeriodic( 1000 );
+    }
+    else
+    {
+      call UartControl.start();
+    }
+  }
+
+  event void UartControl.stopDone(error_t err)
+  {
+    // do nothing
+  }
+
+//////////////////////////////////////////////////////////////////////////////
+//
+//  timer control routines
+//
+//////////////////////////////////////////////////////////////////////////////
+  event void MTS300Timer.fired()
+  {
+    uint8_t l_state;
+    atomic l_state = state;
+
+    // Zero out the accelerometer, chrl@20070213
+    if (accel_ave_points >0)
+    {
+      if (accel_ave_points == 1)
+      {
+        call MTS300Timer.stop();
+        call MTS300Timer.startPeriodic(1000);
+      }
+      atomic state = STATE_ACCELX_START;
+      call AccelX.read();
+      return ;
+    }
+
+    call Leds.led1Toggle();
+
+    if (sending_packet) return ;
+
+    if (l_state == STATE_IDLE)
+    {
+      atomic state = STATE_VREF_START;
+      call Vref.read();
+      return ;
+    }
+  }
+
+  /**
+   * reference voltage data read
+   *
+   */
+  event void Vref.readDone(error_t result, uint16_t data)
+  {
+    if (result == SUCCESS)
+    {
+      pMsg->vref = data;
+    }
+    else
+    {
+      pMsg->vref = 0;
+    }
+      atomic state = STATE_LIGHT_START;
+      call Light.read();
+  }
+
+  /**
+   * Light data read
+   *
+   */
+  event void Light.readDone(error_t result, uint16_t data)
+  {
+    if (result == SUCCESS)
+    {
+      pMsg->light = data;
+    }
+    else
+    {
+      pMsg->light = 0;
+    }
+    atomic state = STATE_TEMP_START;
+    call Temp.read();
+//    atomic state = STATE_MIC_START;
+//    call Microphone.read();
+  }
+
+  /**
+   * Temperature data read
+   *
+   */
+  event void Temp.readDone(error_t result, uint16_t data)
+  {
+    if (result == SUCCESS)
+    {
+      pMsg->thermistor = data;
+    }
+    else
+    {
+      pMsg->thermistor = 0;
+    }
+    atomic state = STATE_MIC_START;
+    call Microphone.read();
+  }
+
+  /**
+   * Microphone data read
+   *
+   */
+  event void Microphone.readDone(error_t result, uint16_t data)
+  {
+    if (result == SUCCESS)
+    {
+      pMsg->mic = data;
+    }
+    else
+    {
+      pMsg->mic = 0;
+    }
+//    atomic packet_ready = TRUE;
+    atomic state = STATE_ACCELX_START;
+    call AccelX.read();
+  }
+
+  /**
+   * AccelX data read
+   *
+   */
+  event void AccelX.readDone(error_t result, uint16_t data)
+  {
+    // Zero out the accelerometer, chrl@20061207
+    if (accel_ave_points>0)
+    {
+      accel_ave_x = accel_ave_x + data;
+      call AccelY.read();
+      return ;
+    }
+      
+    if (result == SUCCESS)
+    {
+      pMsg->accelX = data - accel_ave_x;
+    }
+    else
+    {
+      pMsg->accelX = 0;
+    }
+    atomic state = STATE_ACCELY_START;
+    call AccelY.read();
+  }
+
+  /**
+   * AccelY data read
+   *
+   */
+  event void AccelY.readDone(error_t result, uint16_t data)
+  {
+    // Zero out the accelerometer, chrl@20061207
+    if (accel_ave_points>0)
+    {
+      accel_ave_y = accel_ave_y + data;
+      accel_ave_points--;
+      if(accel_ave_points == 0)
+      {
+        accel_ave_x = accel_ave_x / ACCEL_AVERAGE_POINTS - 450;
+        accel_ave_y = accel_ave_y / ACCEL_AVERAGE_POINTS - 450;
+      }
+      atomic state = STATE_IDLE;
+      return ;
+    }
+
+    if (result == SUCCESS)
+    {
+      pMsg->accelY = data - accel_ave_y;
+    }
+    else
+    {
+      pMsg->accelY = 0;
+    }
+    atomic state = STATE_MAGX_START;
+    call MagX.read();
+  }
+
+  /**
+   * MagX data read
+   *
+   */
+  event void MagX.readDone(error_t result, uint16_t data)
+  {
+    if (result == SUCCESS)
+    {
+      pMsg->magX = data;
+    }
+    else
+    {
+      pMsg->magX = 0;
+    }
+    atomic state = STATE_MAGY_START;
+    call MagY.read();
+  }
+
+  /**
+   * MagY data read
+   *
+   */
+  event void MagY.readDone(error_t result, uint16_t data)
+  {
+    if (result == SUCCESS)
+    {
+      pMsg->magY = data;
+    }
+    else
+    {
+      pMsg->magY = 0;
+    }
+    atomic packet_ready = TRUE;
+    post send_msg();
+  }
+
+  /**
+   * Data packet sent to RADIO
+   *
+   */
+  event void RadioSend.sendDone(message_t* bufPtr, error_t error)
+  {
+    if (&packet == bufPtr)
+    {
+      call Leds.led2Off();
+    }
+    else
+    {
+      call Leds.led0On();
+    }
+    sending_packet = FALSE;
+    atomic state = STATE_IDLE;
+  }
+
+  /**
+   * Data packet sent to UART
+   *
+   */
+  event void UartSend.sendDone(message_t* bufPtr, error_t error)
+  {
+    if (&packet == bufPtr)
+    {
+      if (call RadioSend.send(AM_BROADCAST_ADDR, &packet, sizeof(Mts300Msg)) != SUCCESS)
+      {
+        call Leds.led0On();
+        sending_packet = FALSE;
+        atomic state = STATE_IDLE;
+      }
+    }
+    else
+    {
+      call Leds.led0On();
+      sending_packet = FALSE;
+      atomic state = STATE_IDLE;
+    }
+  }
+
+// end of the implementation
+}
diff --git a/apps/tests/mica2/mts300/XMTS300.h b/apps/tests/mica2/mts300/XMTS300.h
new file mode 100644
index 00000000..a4259dd1
--- /dev/null
+++ b/apps/tests/mica2/mts300/XMTS300.h
@@ -0,0 +1,22 @@
+#ifndef MTS_300_H
+#define MTS_300_H
+
+// data pacet struct
+typedef struct Mts300Msg {
+  uint16_t vref;
+  uint16_t thermistor;
+  uint16_t light;
+  uint16_t mic;
+  uint16_t accelX;
+  uint16_t accelY;
+  uint16_t magX;
+  uint16_t magY;
+} Mts300Msg;
+
+enum {
+  AM_MTS300MSG = 6,
+};
+
+#define ACCEL_AVERAGE_POINTS 3
+
+#endif
diff --git a/apps/tests/msp430/Adc12/EvaluatorC.nc b/apps/tests/msp430/Adc12/EvaluatorC.nc
new file mode 100644
index 00000000..c9831c09
--- /dev/null
+++ b/apps/tests/msp430/Adc12/EvaluatorC.nc
@@ -0,0 +1,95 @@
+/* 
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2007-06-25 15:43:37 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * Checks whether all clients signalled Notify.notify(TRUE) and
+ * only then switches all three LEDs on. Displays on LEDs (binary)
+ * the ID of the first unsuccessful client otherwise.
+ *
+ * Author: Jan Hauer
+ **/
+#include "evaluator.h"
+module EvaluatorC
+{
+  uses {
+    interface Leds;
+    interface Notify<bool> as Notify[uint8_t client];
+  }
+}
+implementation
+{
+  enum {
+    NUM_CLIENTS = uniqueCount(EVALUATOR_CLIENT),
+  };
+  int numSuccess = 0;
+
+  void display(uint8_t client)
+  {
+    if (client & 0x1)
+      call Leds.led0On();
+    else 
+      call Leds.led0Off();
+    if (client & 0x2) 
+      call Leds.led1On();
+    else
+      call Leds.led1Off();
+    if (client & 0x4)
+      call Leds.led2On();
+    else
+      call Leds.led2Off();
+  }
+
+
+  event void Notify.notify[uint8_t client]( bool val )
+  {
+    if (val)
+      numSuccess++;
+    else {
+      if (client != 7) // would look like a success
+        display(client);
+      numSuccess = -1000;
+    }
+    if (NUM_CLIENTS == numSuccess){
+      call Leds.led0On();
+      call Leds.led1On();
+      call Leds.led2On();
+    }
+  }
+
+
+       
+
+}
+
diff --git a/apps/tests/msp430/Adc12/Makefile b/apps/tests/msp430/Adc12/Makefile
new file mode 100644
index 00000000..644689ba
--- /dev/null
+++ b/apps/tests/msp430/Adc12/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=TestAdcAppC
+include $(MAKERULES)
diff --git a/apps/tests/msp430/Adc12/TestAdcAppC.nc b/apps/tests/msp430/Adc12/TestAdcAppC.nc
new file mode 100644
index 00000000..dd53e555
--- /dev/null
+++ b/apps/tests/msp430/Adc12/TestAdcAppC.nc
@@ -0,0 +1,117 @@
+/* 
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2008-09-29 15:51:23 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * Testing HAL of ADC12 on msp430. Switches three LEDs on, if the test was
+ * successful.
+ * 
+ * Author: Jan Hauer
+ */
+#include "Msp430Adc12.h"
+#include "evaluator.h"
+configuration TestAdcAppC {
+}
+implementation
+{
+  // msp430 internal temperature sensor with ref volt from generator
+#define CONFIG_VREF TEMPERATURE_DIODE_CHANNEL, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_2_5, SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES, SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+
+  // msp430 internal temperature sensor with ref volt from AVcc
+#define CONFIG_AVCC TEMPERATURE_DIODE_CHANNEL, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_NONE, SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES, SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+                        
+  components MainC, LedsC, EvaluatorC;
+  EvaluatorC.Leds -> LedsC;
+
+  // Single, none
+  components new TestAdcSingleC(CONFIG_AVCC) as TestSingle0,
+             new Msp430Adc12ClientC() as Wrapper0;
+
+  TestSingle0 -> MainC.Boot;
+  TestSingle0.Resource -> Wrapper0;
+  TestSingle0.SingleChannel -> Wrapper0.Msp430Adc12SingleChannel;
+  EvaluatorC.Notify[unique(EVALUATOR_CLIENT)] -> TestSingle0;
+
+  // Single, RefVolt
+  components new TestAdcSingleC(CONFIG_VREF) as TestSingle1,
+             new Msp430Adc12ClientAutoRVGC() as Wrapper1;
+
+  TestSingle1 -> MainC.Boot;
+  TestSingle1.Resource -> Wrapper1;
+  TestSingle1.SingleChannel -> Wrapper1.Msp430Adc12SingleChannel;
+  EvaluatorC.Notify[unique(EVALUATOR_CLIENT)] -> TestSingle1;
+  Wrapper1.AdcConfigure -> TestSingle1;
+
+  // Single, DMA
+  components new TestAdcSingleC(CONFIG_AVCC) as TestSingle2,
+             new Msp430Adc12ClientAutoDMAC() as Wrapper2;
+
+  TestSingle2 -> MainC.Boot;
+  TestSingle2.Resource -> Wrapper2;
+  TestSingle2.SingleChannel -> Wrapper2.Msp430Adc12SingleChannel;
+  EvaluatorC.Notify[unique(EVALUATOR_CLIENT)] -> TestSingle2;
+
+  // Single, RefVolt + DMA
+  components new TestAdcSingleC(CONFIG_VREF) as TestSingle3,
+             new Msp430Adc12ClientAutoDMA_RVGC() as Wrapper3;
+
+  TestSingle3 -> MainC.Boot;
+  TestSingle3.Resource -> Wrapper3;
+  TestSingle3.SingleChannel -> Wrapper3.Msp430Adc12SingleChannel;
+  EvaluatorC.Notify[unique(EVALUATOR_CLIENT)] -> TestSingle3;
+  Wrapper3.AdcConfigure -> TestSingle3;
+
+  // Multi, none
+  components new TestAdcMultiC(CONFIG_AVCC,
+                     TEMPERATURE_DIODE_CHANNEL, REFERENCE_AVcc_AVss) as TestMulti1,
+             new Msp430Adc12ClientC() as Wrapper4;
+
+  TestMulti1 -> MainC.Boot;
+  TestMulti1.Resource -> Wrapper4;
+  TestMulti1.MultiChannel -> Wrapper4.Msp430Adc12MultiChannel;
+  EvaluatorC.Notify[unique(EVALUATOR_CLIENT)] -> TestMulti1;
+
+  // Multi, RefVolt
+  components new TestAdcMultiC(CONFIG_VREF,
+                      TEMPERATURE_DIODE_CHANNEL, REFERENCE_VREFplus_AVss) as TestMulti2,
+             new Msp430Adc12ClientAutoRVGC() as Wrapper5;
+
+  TestMulti2 -> MainC.Boot;
+  TestMulti2.Resource -> Wrapper5;
+  TestMulti2.MultiChannel -> Wrapper5.Msp430Adc12MultiChannel;
+  EvaluatorC.Notify[unique(EVALUATOR_CLIENT)] -> TestMulti2;
+  Wrapper5.AdcConfigure -> TestMulti2;
+
+}
+
diff --git a/apps/tests/msp430/Adc12/TestAdcMultiC.nc b/apps/tests/msp430/Adc12/TestAdcMultiC.nc
new file mode 100644
index 00000000..5c375a88
--- /dev/null
+++ b/apps/tests/msp430/Adc12/TestAdcMultiC.nc
@@ -0,0 +1,138 @@
+/* 
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2008-09-29 15:51:23 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * Testing MultiChannel HAL interface of ADC12 on msp430. 
+ *
+ * Author: Jan Hauer
+ **/
+generic module TestAdcMultiC(  
+                          uint8_t inch,            // first input channel 
+                          uint8_t sref,            // reference voltage 
+                          uint8_t ref2_5v,         // reference voltage level 
+                          uint8_t adc12ssel,       // clock source sample-hold-time 
+                          uint8_t adc12div,        // clock divider sample-hold-time 
+                          uint8_t sht,             // sample-hold-time
+                          uint8_t sampcon_ssel,    // clock source sampcon signal 
+                          uint8_t sampcon_id,      // clock divider sampcon 
+
+                          uint8_t inch2,           // second input channel 
+                          uint8_t sref2            // second reference voltage 
+) @safe()
+{
+  uses {
+    interface Boot;
+    interface Resource;
+    interface Msp430Adc12MultiChannel as MultiChannel;
+  }
+  provides {
+    interface Notify<bool>;
+    interface AdcConfigure<const msp430adc12_channel_config_t*>;
+  }
+}
+implementation
+{
+  
+#define BUFFER_SIZE 100
+#define NUM_REPETITIONS 5
+  const msp430adc12_channel_config_t config = {inch, sref, ref2_5v, adc12ssel, adc12div, sht, sampcon_ssel, sampcon_id};
+  adc12memctl_t memCtl = {inch2, sref2};
+  norace uint8_t state;
+  uint16_t buffer[BUFFER_SIZE];
+  norace uint8_t count = 0;
+  void task getData();
+
+  void task signalFailure()
+  {
+    signal Notify.notify(FALSE);
+  }
+
+  void task signalSuccess()
+  {
+    signal Notify.notify(TRUE);
+  }
+
+  bool assertData(uint16_t *data, uint16_t num)
+  {
+    uint16_t i;
+    if (num != BUFFER_SIZE)
+      post signalFailure();
+    for (i=0; i<num; i++)
+      if (!data[i] || data[i] >= 0xFFF){
+        post signalFailure();
+        return FALSE;
+      }
+    return TRUE;
+  }
+
+  async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration()
+  {
+    return &config;
+  }
+
+  event void Boot.booted()
+  {
+    count = NUM_REPETITIONS;
+    post getData();
+  }
+
+  void task getData()
+  {
+    call Resource.request();
+  }
+  
+  event void Resource.granted()
+  {
+    if (call MultiChannel.configure(&config, &memCtl, 1, buffer, BUFFER_SIZE, 0) == SUCCESS)
+      call MultiChannel.getData();
+  }
+
+  async event void MultiChannel.dataReady(uint16_t *buf, uint16_t numSamples)
+  {
+    if (!assertData(buf, numSamples)){
+      post signalFailure();
+    } else if (count){
+      count--;
+      call MultiChannel.getData();
+    } else {
+      post signalSuccess();
+      call Resource.release();
+    }
+  }
+
+  command error_t Notify.enable(){}
+  command error_t Notify.disable(){}
+}
+
diff --git a/apps/tests/msp430/Adc12/TestAdcSingleC.nc b/apps/tests/msp430/Adc12/TestAdcSingleC.nc
new file mode 100644
index 00000000..c467dee6
--- /dev/null
+++ b/apps/tests/msp430/Adc12/TestAdcSingleC.nc
@@ -0,0 +1,188 @@
+/* 
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2008-09-29 15:51:23 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * Testing SingleChannel HAL interface of ADC12 on msp430. 
+ *
+ * Author: Jan Hauer
+ **/
+generic module TestAdcSingleC(  
+                          uint8_t inch,            // input channel 
+                          uint8_t sref,            // reference voltage 
+                          uint8_t ref2_5v,         // reference voltage level 
+                          uint8_t adc12ssel,       // clock source sample-hold-time 
+                          uint8_t adc12div,        // clock divider sample-hold-time 
+                          uint8_t sht,             // sample-hold-time
+                          uint8_t sampcon_ssel,    // clock source sampcon signal 
+                          uint8_t sampcon_id       // clock divider sampcon 
+) @safe()
+{
+  uses {
+    interface Boot;
+    interface Resource;
+    interface Msp430Adc12SingleChannel as SingleChannel;
+  }
+  provides {
+    interface AdcConfigure<const msp430adc12_channel_config_t*>;
+    interface Notify<bool>;
+  }
+}
+implementation
+{
+#define BUFFER_SIZE 100
+#define NUM_REPETITIONS 5
+  const msp430adc12_channel_config_t config = {inch, sref, ref2_5v, adc12ssel, adc12div, sht, sampcon_ssel, sampcon_id};
+  norace uint8_t state;
+  norace uint8_t count = 0;
+  uint16_t buffer[BUFFER_SIZE];
+  void task getData();
+  enum {
+    SINGLE_DATA,
+    SINGLE_DATA_REPEAT,
+    MULTIPLE_DATA,
+    MULTIPLE_DATA_REPEAT,
+  };
+
+
+  void task signalFailure()
+  {
+    signal Notify.notify(FALSE);
+  }
+
+  void assertData(uint16_t *data, uint16_t num)
+  {
+    uint16_t i;
+    for (i=0; i<num; i++)
+      if (!data[i] || data[i] >= 0xFFF)
+        post signalFailure();
+  }
+
+  event void Boot.booted()
+  {
+    state = SINGLE_DATA;
+    post getData();
+  }
+
+  async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration()
+  {
+    return &config;
+  }
+
+  void task getData()
+  {
+    call Resource.request();
+  }
+  
+  event void Resource.granted()
+  {
+    count = NUM_REPETITIONS;
+    switch(state)
+    {
+      case SINGLE_DATA: 
+              if (call SingleChannel.configureSingle(&config) == SUCCESS)
+                call SingleChannel.getData();
+              break;
+      case SINGLE_DATA_REPEAT: 
+              if (call SingleChannel.configureSingleRepeat(&config, 10) == SUCCESS)
+                call SingleChannel.getData();
+              break;
+      case MULTIPLE_DATA: 
+              if (call SingleChannel.configureMultiple(&config, buffer, BUFFER_SIZE, 10) == SUCCESS)
+                call SingleChannel.getData();
+              break;
+      case MULTIPLE_DATA_REPEAT: 
+              if (call SingleChannel.configureMultipleRepeat(&config, buffer, 16, 10) == SUCCESS)
+                call SingleChannel.getData();
+              break;
+      default: call Resource.release();
+              signal Notify.notify(TRUE);
+              break;
+    }
+  }
+
+  async event error_t SingleChannel.singleDataReady(uint16_t data)
+  { 
+    assertData(&data, 1);
+    switch(state)
+    {
+      case SINGLE_DATA: 
+              if (count){
+                count--;
+                call SingleChannel.getData();
+                return SUCCESS;
+              }
+              break;
+      case SINGLE_DATA_REPEAT:
+              if (count){
+                count--;
+                return SUCCESS;
+              }
+              break;
+    }
+    call Resource.release();
+    state++;
+    post getData();
+    return FAIL;
+  }
+  
+    
+  async event uint16_t* SingleChannel.multipleDataReady(uint16_t *buf, uint16_t length)
+  {
+    assertData(buf, length);
+    switch(state)
+    {
+      case MULTIPLE_DATA: 
+              if (count){
+                count--;
+                call SingleChannel.getData();
+                return 0;
+              }
+              break;
+      case MULTIPLE_DATA_REPEAT:
+              if (count){
+                count--;
+                return buf;
+              }
+    }   
+    call Resource.release();
+    state++;
+    post getData();
+    return 0;
+  }
+
+  command error_t Notify.enable(){}
+  command error_t Notify.disable(){}
+}
+
diff --git a/apps/tests/msp430/Adc12/evaluator.h b/apps/tests/msp430/Adc12/evaluator.h
new file mode 100644
index 00000000..0c008a85
--- /dev/null
+++ b/apps/tests/msp430/Adc12/evaluator.h
@@ -0,0 +1,6 @@
+#ifndef EVALUATOR_H
+#define EVALUATOR_H
+
+#define EVALUATOR_CLIENT "ADC12.Evalutator.ID"
+
+#endif
diff --git a/apps/tests/msp430/AdcSimple/AdcSimpleAppC.nc b/apps/tests/msp430/AdcSimple/AdcSimpleAppC.nc
new file mode 100644
index 00000000..3c1f47e2
--- /dev/null
+++ b/apps/tests/msp430/AdcSimple/AdcSimpleAppC.nc
@@ -0,0 +1,51 @@
+/* 
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2007-08-01 09:28:58 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * Example for configuring and reading data from msp430 ADC via the HIL.
+ * The configuration is stored within the app component - however,
+ * typically it will be stored in a separate component.
+ * (see tinyos-2.x/tos/chips/msp430/sensors)
+ */
+configuration AdcSimpleAppC {
+}
+implementation {
+  components MainC, AdcSimpleC, new AdcReadClientC(), LedsC;
+
+  MainC.Boot <- AdcSimpleC;
+  AdcSimpleC.VoltageRead -> AdcReadClientC;
+  AdcReadClientC.AdcConfigure -> AdcSimpleC.VoltageConfigure;
+  AdcSimpleC.Leds -> LedsC;
+}
diff --git a/apps/tests/msp430/AdcSimple/AdcSimpleC.nc b/apps/tests/msp430/AdcSimple/AdcSimpleC.nc
new file mode 100644
index 00000000..6ab912a1
--- /dev/null
+++ b/apps/tests/msp430/AdcSimple/AdcSimpleC.nc
@@ -0,0 +1,82 @@
+/* 
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2007-08-01 09:28:58 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "Msp430Adc12.h"
+
+module AdcSimpleC {
+  provides {
+    interface AdcConfigure<const msp430adc12_channel_config_t*> as VoltageConfigure;
+  }
+  uses {
+    interface Boot;
+    interface Read<uint16_t> as VoltageRead;
+    interface Leds;
+  }
+}
+implementation {
+
+  const msp430adc12_channel_config_t config = {
+      inch: SUPPLY_VOLTAGE_HALF_CHANNEL,
+      sref: REFERENCE_VREFplus_AVss,
+      ref2_5v: REFVOLT_LEVEL_1_5,
+      adc12ssel: SHT_SOURCE_ACLK,
+      adc12div: SHT_CLOCK_DIV_1,
+      sht: SAMPLE_HOLD_4_CYCLES,
+      sampcon_ssel: SAMPCON_SOURCE_SMCLK,
+      sampcon_id: SAMPCON_CLOCK_DIV_1
+  };
+
+  event void Boot.booted() 
+  {
+    call Leds.led0Off();
+    call Leds.led1Off();
+    call Leds.led2Off();
+    call VoltageRead.read();
+  }
+
+  event void VoltageRead.readDone( error_t result, uint16_t val )
+  {
+    if (result == SUCCESS){
+      call Leds.led0On();
+      call Leds.led1On();
+      call Leds.led2On();
+    }
+  }
+
+  async command const msp430adc12_channel_config_t* VoltageConfigure.getConfiguration()
+  {
+    return &config; // must not be changed
+  }
+}
diff --git a/apps/tests/msp430/AdcSimple/Makefile b/apps/tests/msp430/AdcSimple/Makefile
new file mode 100644
index 00000000..5102a7d5
--- /dev/null
+++ b/apps/tests/msp430/AdcSimple/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=AdcSimpleAppC
+include $(MAKERULES)
diff --git a/apps/tests/msp430/BlinkMSP430/BlinkC.nc b/apps/tests/msp430/BlinkMSP430/BlinkC.nc
new file mode 100644
index 00000000..9fceaab4
--- /dev/null
+++ b/apps/tests/msp430/BlinkMSP430/BlinkC.nc
@@ -0,0 +1,15 @@
+// $Id: BlinkC.nc,v 1.4 2006-12-12 18:22:52 vlahan Exp $
+
+configuration BlinkC
+{
+}
+implementation
+{
+  components MainC as Main, BlinkM, LedsC, MSP430TimerC;
+  BlinkM.Boot -> Main;
+  Main.SoftwareInit -> LedsC;
+  BlinkM.Leds -> LedsC;
+  BlinkM.TimerControl -> MSP430TimerC.ControlB4;
+  BlinkM.TimerCompare -> MSP430TimerC.CompareB4;
+}
+
diff --git a/apps/tests/msp430/BlinkMSP430/BlinkM.nc b/apps/tests/msp430/BlinkMSP430/BlinkM.nc
new file mode 100644
index 00000000..f361cc88
--- /dev/null
+++ b/apps/tests/msp430/BlinkMSP430/BlinkM.nc
@@ -0,0 +1,26 @@
+// $Id: BlinkM.nc,v 1.4 2006-12-12 18:22:52 vlahan Exp $
+
+module BlinkM
+{
+  uses interface MSP430TimerControl as TimerControl;
+  uses interface MSP430Compare as TimerCompare;
+  uses interface Boot;
+  uses interface Leds;
+}
+implementation
+{
+  event void Boot.booted()
+  {
+    call Leds.led1On();
+    call TimerControl.setControlAsCompare();
+    call TimerCompare.setEventFromNow( 8192 );
+    call TimerControl.enableEvents();
+  }
+
+  async event void TimerCompare.fired()
+  {
+    call Leds.led0Toggle();
+    call TimerCompare.setEventFromPrev( 8192 );
+  }
+}
+
diff --git a/apps/tests/msp430/BlinkMSP430/Makefile b/apps/tests/msp430/BlinkMSP430/Makefile
new file mode 100644
index 00000000..57038bd6
--- /dev/null
+++ b/apps/tests/msp430/BlinkMSP430/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=BlinkC
+include $(MAKERULES)
+
diff --git a/apps/tests/mts300/PhotoTemp/Makefile b/apps/tests/mts300/PhotoTemp/Makefile
new file mode 100644
index 00000000..410941cc
--- /dev/null
+++ b/apps/tests/mts300/PhotoTemp/Makefile
@@ -0,0 +1,4 @@
+SENSORBOARD=mts300
+COMPONENT=OscilloscopeAppC
+
+include $(MAKERULES)
diff --git a/apps/tests/mts300/PhotoTemp/Oscilloscope.h b/apps/tests/mts300/PhotoTemp/Oscilloscope.h
new file mode 100644
index 00000000..1e6af206
--- /dev/null
+++ b/apps/tests/mts300/PhotoTemp/Oscilloscope.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+// @author David Gay
+
+#ifndef OSCILLOSCOPE_H
+#define OSCILLOSCOPE_H
+
+enum {
+  /* Number of readings per message. If you increase this, you may have to
+     increase the message_t size. */
+  NREADINGS = 10,
+
+  /* Default sampling period. */
+  DEFAULT_INTERVAL = 256,
+
+  AM_OSCILLOSCOPE = 0x93
+};
+
+typedef nx_struct oscilloscope {
+  nx_uint16_t version; /* Version of the interval. */
+  nx_uint16_t interval; /* Samping period. */
+  nx_uint16_t id; /* Mote id of sending mote. */
+  nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */
+  nx_uint16_t readings[NREADINGS];
+} oscilloscope_t;
+
+#endif
diff --git a/apps/tests/mts300/PhotoTemp/OscilloscopeAppC.nc b/apps/tests/mts300/PhotoTemp/OscilloscopeAppC.nc
new file mode 100644
index 00000000..b0b5763f
--- /dev/null
+++ b/apps/tests/mts300/PhotoTemp/OscilloscopeAppC.nc
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Oscilloscope demo application. Uses the demo sensor - change the
+ * new DemoSensorC() instantiation if you want something else.
+ *
+ * See README.txt file in this directory for usage instructions.
+ *
+ * @author David Gay
+ */
+configuration OscilloscopeAppC { }
+implementation
+{
+  components OscilloscopeC, MainC, ActiveMessageC, LedsC,
+    new TimerMilliC(), new PhotoC() as Sensor1, new TempC() as Sensor2,
+    new AMSenderC(AM_OSCILLOSCOPE), new AMReceiverC(AM_OSCILLOSCOPE);
+
+  OscilloscopeC.Boot -> MainC;
+  OscilloscopeC.RadioControl -> ActiveMessageC;
+  OscilloscopeC.AMSend -> AMSenderC;
+  OscilloscopeC.Receive -> AMReceiverC;
+  OscilloscopeC.Timer -> TimerMilliC;
+  OscilloscopeC.Read1 -> Sensor1;
+  OscilloscopeC.Read2 -> Sensor2;
+  OscilloscopeC.Leds -> LedsC;
+
+  
+}
diff --git a/apps/tests/mts300/PhotoTemp/OscilloscopeC.nc b/apps/tests/mts300/PhotoTemp/OscilloscopeC.nc
new file mode 100644
index 00000000..6ba42ce0
--- /dev/null
+++ b/apps/tests/mts300/PhotoTemp/OscilloscopeC.nc
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Oscilloscope demo application. See README.txt file in this directory.
+ *
+ * @author David Gay
+ */
+#include "Timer.h"
+#include "Oscilloscope.h"
+
+module OscilloscopeC
+{
+  uses {
+    interface Boot;
+    interface SplitControl as RadioControl;
+    interface AMSend;
+    interface Receive;
+    interface Timer<TMilli>;
+    interface Read<uint16_t> as Read1;
+    interface Read<uint16_t> as Read2;
+    interface Leds;
+  }
+}
+implementation
+{
+  message_t sendbuf;
+  bool sendbusy;
+
+  /* Current local state - interval, version and accumulated readings */
+  oscilloscope_t local;
+
+  uint8_t reading; /* 0 to NREADINGS */
+
+  /* When we head an Oscilloscope message, we check it's sample count. If
+     it's ahead of ours, we "jump" forwards (set our count to the received
+     count). However, we must then suppress our next count increment. This
+     is a very simple form of "time" synchronization (for an abstract
+     notion of time). */
+  bool suppress_count_change;
+
+  // Use LEDs to report various status issues.
+  void report_problem() { call Leds.led0Toggle(); }
+  void report_sent() { call Leds.led1Toggle(); }
+  void report_received() { call Leds.led2Toggle(); }
+
+  event void Boot.booted() {
+    local.interval = DEFAULT_INTERVAL;
+    local.id = TOS_NODE_ID;
+    if (call RadioControl.start() != SUCCESS)
+      report_problem();
+  }
+
+  void startTimer() {
+    call Timer.startPeriodic(local.interval);
+    reading = 0;
+  }
+
+  event void RadioControl.startDone(error_t error) {
+    startTimer();
+  }
+
+  event void RadioControl.stopDone(error_t error) {
+  }
+
+  event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    oscilloscope_t *omsg = payload;
+
+    report_received();
+
+    /* If we receive a newer version, update our interval. 
+       If we hear from a future count, jump ahead but suppress our own change
+    */
+    if (omsg->version > local.version)
+      {
+	local.version = omsg->version;
+	local.interval = omsg->interval;
+	startTimer();
+      }
+    if (omsg->count > local.count)
+      {
+	local.count = omsg->count;
+	suppress_count_change = TRUE;
+      }
+
+    return msg;
+  }
+
+  /* At each sample period:
+     - if local sample buffer is full, send accumulated samples
+     - read next sample
+  */
+  event void Timer.fired() {
+    if (reading == NREADINGS)
+      {
+	if (!sendbusy && sizeof local <= call AMSend.maxPayloadLength())
+	  {
+	    memcpy(call AMSend.getPayload(&sendbuf, sizeof(local)), &local, sizeof local);
+	    if (call AMSend.send(AM_BROADCAST_ADDR, &sendbuf, sizeof local) == SUCCESS)
+	      sendbusy = TRUE;
+	  }
+	if (!sendbusy)
+	  report_problem();
+
+	reading = 0;
+	/* Part 2 of cheap "time sync": increment our count if we didn't
+	   jump ahead. */
+	if (!suppress_count_change)
+	  local.count++;
+	suppress_count_change = FALSE;
+      }
+    if (call Read1.read() != SUCCESS)
+      report_problem();
+    if (call Read2.read() != SUCCESS)
+      report_problem();
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t error) {
+    if (error == SUCCESS)
+      report_sent();
+    else
+      report_problem();
+
+    sendbusy = FALSE;
+  }
+
+  event void Read1.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS)
+      {
+	data = 0xffff;
+	report_problem();
+      }
+    local.readings[reading++] = data;
+  }
+
+  event void Read2.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS)
+      {
+	data = 0xffff;
+	report_problem();
+      }
+    local.readings[reading++] = data;
+  }
+}
diff --git a/apps/tests/mts300/PhotoTemp/README.txt b/apps/tests/mts300/PhotoTemp/README.txt
new file mode 100644
index 00000000..dfb5ca4c
--- /dev/null
+++ b/apps/tests/mts300/PhotoTemp/README.txt
@@ -0,0 +1,22 @@
+README for PhotoTemp
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+This is a hacked version of the Oscilloscope application which
+simultaneously samples the PhotoC and TempC sensors of the mts300 to
+ensure that arbitration is working correctly. Compile and run it like
+the usual Oscilloscope application. The output normally looks like
+sawteeth because it consists of alternating light and temperature
+values.
+
+Tools:
+
+See the regular Oscilloscope tools in apps/Oscilloscope/java.
+
+Known bugs/limitations:
+
+None.
+
+
+$Id: README.txt,v 1.1 2007-05-23 23:01:38 idgay Exp $
diff --git a/apps/tests/mts400/DataMsg.h b/apps/tests/mts400/DataMsg.h
new file mode 100644
index 00000000..35eba968
--- /dev/null
+++ b/apps/tests/mts400/DataMsg.h
@@ -0,0 +1,51 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#ifndef DATAMSG_H
+#define DATAMSG_H
+
+enum{
+	AM_DATAMSG=1,
+};
+
+typedef nx_struct datamsg{
+	nx_uint16_t AccelX_data;
+	nx_uint16_t AccelY_data;
+	nx_int16_t Intersema_data[2];
+	nx_uint16_t Temp_data;
+	nx_uint16_t Hum_data;
+	nx_uint16_t VisLight_data;
+	nx_uint16_t InfLight_data;
+}datamsg_t;
+
+#endif
\ No newline at end of file
diff --git a/apps/tests/mts400/DataMsg.java b/apps/tests/mts400/DataMsg.java
new file mode 100644
index 00000000..eb755ac6
--- /dev/null
+++ b/apps/tests/mts400/DataMsg.java
@@ -0,0 +1,623 @@
+/**
+ * This class is automatically generated by mig. DO NOT EDIT THIS FILE.
+ * This class implements a Java interface to the 'DataMsg'
+ * message type.
+ */
+
+public class DataMsg extends net.tinyos.message.Message {
+
+    /** The default size of this message type in bytes. */
+    public static final int DEFAULT_MESSAGE_SIZE = 16;
+
+    /** The Active Message type associated with this message. */
+    public static final int AM_TYPE = 1;
+
+    /** Create a new DataMsg of size 16. */
+    public DataMsg() {
+        super(DEFAULT_MESSAGE_SIZE);
+        amTypeSet(AM_TYPE);
+    }
+
+    /** Create a new DataMsg of the given data_length. */
+    public DataMsg(int data_length) {
+        super(data_length);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+     * Create a new DataMsg with the given data_length
+     * and base offset.
+     */
+    public DataMsg(int data_length, int base_offset) {
+        super(data_length, base_offset);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+     * Create a new DataMsg using the given byte array
+     * as backing store.
+     */
+    public DataMsg(byte[] data) {
+        super(data);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+     * Create a new DataMsg using the given byte array
+     * as backing store, with the given base offset.
+     */
+    public DataMsg(byte[] data, int base_offset) {
+        super(data, base_offset);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+     * Create a new DataMsg using the given byte array
+     * as backing store, with the given base offset and data length.
+     */
+    public DataMsg(byte[] data, int base_offset, int data_length) {
+        super(data, base_offset, data_length);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+     * Create a new DataMsg embedded in the given message
+     * at the given base offset.
+     */
+    public DataMsg(net.tinyos.message.Message msg, int base_offset) {
+        super(msg, base_offset, DEFAULT_MESSAGE_SIZE);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+     * Create a new DataMsg embedded in the given message
+     * at the given base offset and length.
+     */
+    public DataMsg(net.tinyos.message.Message msg, int base_offset, int data_length) {
+        super(msg, base_offset, data_length);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+    /* Return a String representation of this message. Includes the
+     * message type name and the non-indexed field values.
+     */
+    public String toString() {
+      String s = "Message <DataMsg> \n";
+      try {
+        s += "  [AccelX_data=0x"+Long.toHexString(get_AccelX_data())+"]\n";
+      } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ }
+      try {
+        s += "  [AccelY_data=0x"+Long.toHexString(get_AccelY_data())+"]\n";
+      } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ }
+      try {
+        s += "  [Intersema_data=";
+        for (int i = 0; i < 2; i++) {
+          s += "0x"+Long.toHexString(getElement_Intersema_data(i) & 0xffff)+" ";
+        }
+        s += "]\n";
+      } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ }
+      try {
+        s += "  [Temp_data=0x"+Long.toHexString(get_Temp_data())+"]\n";
+      } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ }
+      try {
+        s += "  [Hum_data=0x"+Long.toHexString(get_Hum_data())+"]\n";
+      } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ }
+      try {
+        s += "  [VisLight_data=0x"+Long.toHexString(get_VisLight_data())+"]\n";
+      } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ }
+      try {
+        s += "  [InfLight_data=0x"+Long.toHexString(get_InfLight_data())+"]\n";
+      } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ }
+      return s;
+    }
+
+    // Message-type-specific access methods appear below.
+
+    /////////////////////////////////////////////////////////
+    // Accessor methods for field: AccelX_data
+    //   Field type: int, unsigned
+    //   Offset (bits): 0
+    //   Size (bits): 16
+    /////////////////////////////////////////////////////////
+
+    /**
+     * Return whether the field 'AccelX_data' is signed (false).
+     */
+    public static boolean isSigned_AccelX_data() {
+        return false;
+    }
+
+    /**
+     * Return whether the field 'AccelX_data' is an array (false).
+     */
+    public static boolean isArray_AccelX_data() {
+        return false;
+    }
+
+    /**
+     * Return the offset (in bytes) of the field 'AccelX_data'
+     */
+    public static int offset_AccelX_data() {
+        return (0 / 8);
+    }
+
+    /**
+     * Return the offset (in bits) of the field 'AccelX_data'
+     */
+    public static int offsetBits_AccelX_data() {
+        return 0;
+    }
+
+    /**
+     * Return the value (as a int) of the field 'AccelX_data'
+     */
+    public int get_AccelX_data() {
+        return (int)getUIntBEElement(offsetBits_AccelX_data(), 16);
+    }
+
+    /**
+     * Set the value of the field 'AccelX_data'
+     */
+    public void set_AccelX_data(int value) {
+        setUIntBEElement(offsetBits_AccelX_data(), 16, value);
+    }
+
+    /**
+     * Return the size, in bytes, of the field 'AccelX_data'
+     */
+    public static int size_AccelX_data() {
+        return (16 / 8);
+    }
+
+    /**
+     * Return the size, in bits, of the field 'AccelX_data'
+     */
+    public static int sizeBits_AccelX_data() {
+        return 16;
+    }
+
+    /////////////////////////////////////////////////////////
+    // Accessor methods for field: AccelY_data
+    //   Field type: int, unsigned
+    //   Offset (bits): 16
+    //   Size (bits): 16
+    /////////////////////////////////////////////////////////
+
+    /**
+     * Return whether the field 'AccelY_data' is signed (false).
+     */
+    public static boolean isSigned_AccelY_data() {
+        return false;
+    }
+
+    /**
+     * Return whether the field 'AccelY_data' is an array (false).
+     */
+    public static boolean isArray_AccelY_data() {
+        return false;
+    }
+
+    /**
+     * Return the offset (in bytes) of the field 'AccelY_data'
+     */
+    public static int offset_AccelY_data() {
+        return (16 / 8);
+    }
+
+    /**
+     * Return the offset (in bits) of the field 'AccelY_data'
+     */
+    public static int offsetBits_AccelY_data() {
+        return 16;
+    }
+
+    /**
+     * Return the value (as a int) of the field 'AccelY_data'
+     */
+    public int get_AccelY_data() {
+        return (int)getUIntBEElement(offsetBits_AccelY_data(), 16);
+    }
+
+    /**
+     * Set the value of the field 'AccelY_data'
+     */
+    public void set_AccelY_data(int value) {
+        setUIntBEElement(offsetBits_AccelY_data(), 16, value);
+    }
+
+    /**
+     * Return the size, in bytes, of the field 'AccelY_data'
+     */
+    public static int size_AccelY_data() {
+        return (16 / 8);
+    }
+
+    /**
+     * Return the size, in bits, of the field 'AccelY_data'
+     */
+    public static int sizeBits_AccelY_data() {
+        return 16;
+    }
+
+    /////////////////////////////////////////////////////////
+    // Accessor methods for field: Intersema_data
+    //   Field type: short[], unsigned
+    //   Offset (bits): 32
+    //   Size of each element (bits): 16
+    /////////////////////////////////////////////////////////
+
+    /**
+     * Return whether the field 'Intersema_data' is signed (false).
+     */
+    public static boolean isSigned_Intersema_data() {
+        return false;
+    }
+
+    /**
+     * Return whether the field 'Intersema_data' is an array (true).
+     */
+    public static boolean isArray_Intersema_data() {
+        return true;
+    }
+
+    /**
+     * Return the offset (in bytes) of the field 'Intersema_data'
+     */
+    public static int offset_Intersema_data(int index1) {
+        int offset = 32;
+        if (index1 < 0 || index1 >= 2) throw new ArrayIndexOutOfBoundsException();
+        offset += 0 + index1 * 16;
+        return (offset / 8);
+    }
+
+    /**
+     * Return the offset (in bits) of the field 'Intersema_data'
+     */
+    public static int offsetBits_Intersema_data(int index1) {
+        int offset = 32;
+        if (index1 < 0 || index1 >= 2) throw new ArrayIndexOutOfBoundsException();
+        offset += 0 + index1 * 16;
+        return offset;
+    }
+
+    /**
+     * Return the entire array 'Intersema_data' as a short[]
+     */
+    public short[] get_Intersema_data() {
+        short[] tmp = new short[2];
+        for (int index0 = 0; index0 < numElements_Intersema_data(0); index0++) {
+            tmp[index0] = getElement_Intersema_data(index0);
+        }
+        return tmp;
+    }
+
+    /**
+     * Set the contents of the array 'Intersema_data' from the given short[]
+     */
+    public void set_Intersema_data(short[] value) {
+        for (int index0 = 0; index0 < value.length; index0++) {
+            setElement_Intersema_data(index0, value[index0]);
+        }
+    }
+
+    /**
+     * Return an element (as a short) of the array 'Intersema_data'
+     */
+    public short getElement_Intersema_data(int index1) {
+        return (short)getSIntBEElement(offsetBits_Intersema_data(index1), 16);
+    }
+
+    /**
+     * Set an element of the array 'Intersema_data'
+     */
+    public void setElement_Intersema_data(int index1, short value) {
+        setSIntBEElement(offsetBits_Intersema_data(index1), 16, value);
+    }
+
+    /**
+     * Return the total size, in bytes, of the array 'Intersema_data'
+     */
+    public static int totalSize_Intersema_data() {
+        return (32 / 8);
+    }
+
+    /**
+     * Return the total size, in bits, of the array 'Intersema_data'
+     */
+    public static int totalSizeBits_Intersema_data() {
+        return 32;
+    }
+
+    /**
+     * Return the size, in bytes, of each element of the array 'Intersema_data'
+     */
+    public static int elementSize_Intersema_data() {
+        return (16 / 8);
+    }
+
+    /**
+     * Return the size, in bits, of each element of the array 'Intersema_data'
+     */
+    public static int elementSizeBits_Intersema_data() {
+        return 16;
+    }
+
+    /**
+     * Return the number of dimensions in the array 'Intersema_data'
+     */
+    public static int numDimensions_Intersema_data() {
+        return 1;
+    }
+
+    /**
+     * Return the number of elements in the array 'Intersema_data'
+     */
+    public static int numElements_Intersema_data() {
+        return 2;
+    }
+
+    /**
+     * Return the number of elements in the array 'Intersema_data'
+     * for the given dimension.
+     */
+    public static int numElements_Intersema_data(int dimension) {
+      int array_dims[] = { 2,  };
+        if (dimension < 0 || dimension >= 1) throw new ArrayIndexOutOfBoundsException();
+        if (array_dims[dimension] == 0) throw new IllegalArgumentException("Array dimension "+dimension+" has unknown size");
+        return array_dims[dimension];
+    }
+
+    /////////////////////////////////////////////////////////
+    // Accessor methods for field: Temp_data
+    //   Field type: int, unsigned
+    //   Offset (bits): 64
+    //   Size (bits): 16
+    /////////////////////////////////////////////////////////
+
+    /**
+     * Return whether the field 'Temp_data' is signed (false).
+     */
+    public static boolean isSigned_Temp_data() {
+        return false;
+    }
+
+    /**
+     * Return whether the field 'Temp_data' is an array (false).
+     */
+    public static boolean isArray_Temp_data() {
+        return false;
+    }
+
+    /**
+     * Return the offset (in bytes) of the field 'Temp_data'
+     */
+    public static int offset_Temp_data() {
+        return (64 / 8);
+    }
+
+    /**
+     * Return the offset (in bits) of the field 'Temp_data'
+     */
+    public static int offsetBits_Temp_data() {
+        return 64;
+    }
+
+    /**
+     * Return the value (as a int) of the field 'Temp_data'
+     */
+    public int get_Temp_data() {
+        return (int)getUIntBEElement(offsetBits_Temp_data(), 16);
+    }
+
+    /**
+     * Set the value of the field 'Temp_data'
+     */
+    public void set_Temp_data(int value) {
+        setUIntBEElement(offsetBits_Temp_data(), 16, value);
+    }
+
+    /**
+     * Return the size, in bytes, of the field 'Temp_data'
+     */
+    public static int size_Temp_data() {
+        return (16 / 8);
+    }
+
+    /**
+     * Return the size, in bits, of the field 'Temp_data'
+     */
+    public static int sizeBits_Temp_data() {
+        return 16;
+    }
+
+    /////////////////////////////////////////////////////////
+    // Accessor methods for field: Hum_data
+    //   Field type: int, unsigned
+    //   Offset (bits): 80
+    //   Size (bits): 16
+    /////////////////////////////////////////////////////////
+
+    /**
+     * Return whether the field 'Hum_data' is signed (false).
+     */
+    public static boolean isSigned_Hum_data() {
+        return false;
+    }
+
+    /**
+     * Return whether the field 'Hum_data' is an array (false).
+     */
+    public static boolean isArray_Hum_data() {
+        return false;
+    }
+
+    /**
+     * Return the offset (in bytes) of the field 'Hum_data'
+     */
+    public static int offset_Hum_data() {
+        return (80 / 8);
+    }
+
+    /**
+     * Return the offset (in bits) of the field 'Hum_data'
+     */
+    public static int offsetBits_Hum_data() {
+        return 80;
+    }
+
+    /**
+     * Return the value (as a int) of the field 'Hum_data'
+     */
+    public int get_Hum_data() {
+        return (int)getUIntBEElement(offsetBits_Hum_data(), 16);
+    }
+
+    /**
+     * Set the value of the field 'Hum_data'
+     */
+    public void set_Hum_data(int value) {
+        setUIntBEElement(offsetBits_Hum_data(), 16, value);
+    }
+
+    /**
+     * Return the size, in bytes, of the field 'Hum_data'
+     */
+    public static int size_Hum_data() {
+        return (16 / 8);
+    }
+
+    /**
+     * Return the size, in bits, of the field 'Hum_data'
+     */
+    public static int sizeBits_Hum_data() {
+        return 16;
+    }
+
+    /////////////////////////////////////////////////////////
+    // Accessor methods for field: VisLight_data
+    //   Field type: int, unsigned
+    //   Offset (bits): 96
+    //   Size (bits): 16
+    /////////////////////////////////////////////////////////
+
+    /**
+     * Return whether the field 'VisLight_data' is signed (false).
+     */
+    public static boolean isSigned_VisLight_data() {
+        return false;
+    }
+
+    /**
+     * Return whether the field 'VisLight_data' is an array (false).
+     */
+    public static boolean isArray_VisLight_data() {
+        return false;
+    }
+
+    /**
+     * Return the offset (in bytes) of the field 'VisLight_data'
+     */
+    public static int offset_VisLight_data() {
+        return (96 / 8);
+    }
+
+    /**
+     * Return the offset (in bits) of the field 'VisLight_data'
+     */
+    public static int offsetBits_VisLight_data() {
+        return 96;
+    }
+
+    /**
+     * Return the value (as a int) of the field 'VisLight_data'
+     */
+    public int get_VisLight_data() {
+        return (int)getUIntBEElement(offsetBits_VisLight_data(), 16);
+    }
+
+    /**
+     * Set the value of the field 'VisLight_data'
+     */
+    public void set_VisLight_data(int value) {
+        setUIntBEElement(offsetBits_VisLight_data(), 16, value);
+    }
+
+    /**
+     * Return the size, in bytes, of the field 'VisLight_data'
+     */
+    public static int size_VisLight_data() {
+        return (16 / 8);
+    }
+
+    /**
+     * Return the size, in bits, of the field 'VisLight_data'
+     */
+    public static int sizeBits_VisLight_data() {
+        return 16;
+    }
+
+    /////////////////////////////////////////////////////////
+    // Accessor methods for field: InfLight_data
+    //   Field type: int, unsigned
+    //   Offset (bits): 112
+    //   Size (bits): 16
+    /////////////////////////////////////////////////////////
+
+    /**
+     * Return whether the field 'InfLight_data' is signed (false).
+     */
+    public static boolean isSigned_InfLight_data() {
+        return false;
+    }
+
+    /**
+     * Return whether the field 'InfLight_data' is an array (false).
+     */
+    public static boolean isArray_InfLight_data() {
+        return false;
+    }
+
+    /**
+     * Return the offset (in bytes) of the field 'InfLight_data'
+     */
+    public static int offset_InfLight_data() {
+        return (112 / 8);
+    }
+
+    /**
+     * Return the offset (in bits) of the field 'InfLight_data'
+     */
+    public static int offsetBits_InfLight_data() {
+        return 112;
+    }
+
+    /**
+     * Return the value (as a int) of the field 'InfLight_data'
+     */
+    public int get_InfLight_data() {
+        return (int)getUIntBEElement(offsetBits_InfLight_data(), 16);
+    }
+
+    /**
+     * Set the value of the field 'InfLight_data'
+     */
+    public void set_InfLight_data(int value) {
+        setUIntBEElement(offsetBits_InfLight_data(), 16, value);
+    }
+
+    /**
+     * Return the size, in bytes, of the field 'InfLight_data'
+     */
+    public static int size_InfLight_data() {
+        return (16 / 8);
+    }
+
+    /**
+     * Return the size, in bits, of the field 'InfLight_data'
+     */
+    public static int sizeBits_InfLight_data() {
+        return 16;
+    }
+
+}
diff --git a/apps/tests/mts400/Makefile b/apps/tests/mts400/Makefile
new file mode 100644
index 00000000..e310a845
--- /dev/null
+++ b/apps/tests/mts400/Makefile
@@ -0,0 +1,10 @@
+COMPONENT=Mts400TesterC
+SENSORBOARD=mts400
+
+BUILD_EXTRA_DEPS = DataMsg.java
+CLEAN_EXTRA = $(BULID_EXTRA_DEPS)
+
+DataMsg.java: DataMsg.h
+		mig -target=null -java-classname=DataMsg java DataMsg.h datamsg -o $@
+
+include $(MAKERULES)
diff --git a/apps/tests/mts400/Mts400Tester.java b/apps/tests/mts400/Mts400Tester.java
new file mode 100644
index 00000000..d6a7f7b7
--- /dev/null
+++ b/apps/tests/mts400/Mts400Tester.java
@@ -0,0 +1,104 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+import static java.lang.System.out;
+import net.tinyos.message.*;
+import net.tinyos.util.*;
+import net.tinyos.packet.*;
+
+class Mts400Tester implements MessageListener{
+	private PhoenixSource phoenix;
+	private MoteIF mif;
+		
+	public Mts400Tester(final String source){
+		phoenix=BuildSource.makePhoenix(source, PrintStreamMessenger.err);
+		mif = new MoteIF(phoenix);
+		mif.registerListener(new DataMsg(),this);
+	}
+	
+	public void messageReceived(int dest_addr,Message msg){
+		if(msg instanceof DataMsg){
+			DataMsg results = (DataMsg)msg;
+			int[] taosCalcData = null;
+			double[] sensirionCalcData=null;
+			out.println("The measured results are ");
+			out.println();
+			out.println("Accelerometer X axis:   "+results.get_AccelX_data());
+			out.println("Accelerometer Y axis:   "+results.get_AccelY_data());
+			out.println("Intersema temperature:  "+results.getElement_Intersema_data(0));
+			out.println("Intersema pressure:     "+results.getElement_Intersema_data(1));
+			sensirionCalcData=calculateSensirion(results.get_Temp_data(),results.get_Hum_data());
+			out.printf("Sensirion temperature:  %.2f\n",sensirionCalcData[0]);
+			out.printf("Sensirion humidity:     %.2f\n",sensirionCalcData[1]);
+			taosCalcData=calculateTaos(results.get_VisLight_data(),results.get_InfLight_data());
+			out.println("Taos visible light:     "+taosCalcData[0]);
+			out.println("Taos infrared light:    "+taosCalcData[1]);
+		}
+			
+	}
+	
+	private int[] calculateTaos(int VisibleLight,int InfraredLight){
+		final int CHORD_VAL[]={0,16,49,115,247,511,1039,2095};
+		final int STEP_VAL[]={1,2,4,8,16,32,64,128};
+		int chordVal,stepVal;
+		int[] lightVal=new int[2];
+		
+		chordVal=(VisibleLight>>4) & 7;
+		stepVal=VisibleLight & 15;
+		lightVal[0]=CHORD_VAL [chordVal]+stepVal*STEP_VAL[chordVal];
+		chordVal=(InfraredLight>>4)&7;
+		stepVal=VisibleLight & 15;
+		lightVal[1]=CHORD_VAL[chordVal]+stepVal*STEP_VAL[chordVal];
+		return lightVal;
+	}
+	
+	private double[] calculateSensirion(int Temperature,int Humidity){
+		double [] converted = new double[2]; 
+		
+		converted[0]=-39.4+(0.01*(double)Temperature);
+		converted[1]=(-2.0468+0.0367*(double)Humidity-0.0000015955*Math.pow((double)Humidity,(double )2))+(converted[0]-25)*(0.01+0.00008*(double)Humidity);
+			
+		return converted;
+	}
+	
+	public static void main (String[] args) {
+		if ( args.length == 2 && args[0].equals("-comm") ) {
+			Mts400Tester hy = new Mts400Tester(args[1]);
+		} else {
+			System.err.println("usage: java Mts400Tester [-comm <source>]");
+			System.exit(1);
+		}
+		
+	}
+
+}
\ No newline at end of file
diff --git a/apps/tests/mts400/Mts400TesterC.nc b/apps/tests/mts400/Mts400TesterC.nc
new file mode 100644
index 00000000..ff591d71
--- /dev/null
+++ b/apps/tests/mts400/Mts400TesterC.nc
@@ -0,0 +1,60 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#include "DataMsg.h"
+
+configuration Mts400TesterC {
+}
+implementation {
+	components MainC;
+	components LedsC;
+	components new Accel202C();
+	components new Intersema5534C();
+	components new SensirionSht11C();
+	components new Taos2550C();
+	components ActiveMessageC;
+	components new AMSenderC(AM_DATAMSG);
+	components Mts400TesterP as App;
+	
+	App.Boot -> MainC;
+	App.Leds -> LedsC;
+	App.AMSend -> AMSenderC;
+	App.SplitControl -> ActiveMessageC;
+	App.X_Axis -> Accel202C.X_Axis;
+	App.Y_Axis -> Accel202C.Y_Axis;
+	App.Intersema -> Intersema5534C.Intersema;
+	App.Temperature -> SensirionSht11C.Temperature;
+	App.Humidity -> SensirionSht11C.Humidity;
+	App.VisibleLight -> Taos2550C.VisibleLight;
+	App.InfraredLight -> Taos2550C.InfraredLight;
+}
diff --git a/apps/tests/mts400/Mts400TesterP.nc b/apps/tests/mts400/Mts400TesterP.nc
new file mode 100644
index 00000000..238cee37
--- /dev/null
+++ b/apps/tests/mts400/Mts400TesterP.nc
@@ -0,0 +1,119 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#include "DataMsg.h"
+
+module Mts400TesterP {
+	uses interface Boot;
+	uses interface Leds;
+	uses interface SplitControl;
+	uses interface Read<uint16_t> as X_Axis;
+	uses interface Read<uint16_t> as Y_Axis;
+	uses interface Intersema;
+	uses interface Read<uint16_t> as Temperature;
+	uses interface Read<uint16_t> as Humidity;
+	uses interface Read<uint16_t> as VisibleLight;
+	uses interface Read<uint16_t> as InfraredLight;
+	uses interface AMSend;
+}
+implementation {
+	
+	uint16_t AccelX_data,AccelY_data,Temp_data,Hum_data,VisLight_data;
+	int16_t Intersema_data[2];
+	
+	event void Boot.booted() {
+		call SplitControl.start();
+	}
+	
+	event void SplitControl.startDone(error_t err){
+		if(err==SUCCESS){
+			call X_Axis.read();
+			call Leds.led0On();
+		}else{
+			call SplitControl.start();
+		}
+	}
+	
+	event void X_Axis.readDone(error_t err, uint16_t data){
+		AccelX_data=data;
+		call Y_Axis.read();
+	}
+	
+	event void Y_Axis.readDone(error_t err, uint16_t data){
+		AccelY_data=data;
+		call Intersema.read();
+	}
+	
+	event void Intersema.readDone(error_t err, int16_t* data){
+		Intersema_data[0]=data[0];
+		Intersema_data[1]=data[1];
+		call Temperature.read();
+	}
+	
+	event void Temperature.readDone(error_t err, uint16_t data){
+		Temp_data=data;
+		call Humidity.read();
+	}
+	
+	event void Humidity.readDone(error_t err, uint16_t data){
+		Hum_data=data;
+		call VisibleLight.read();
+	}
+	
+	event void VisibleLight.readDone(error_t err, uint16_t data){
+		VisLight_data=data;
+		call InfraredLight.read();
+	}
+	
+	message_t message;
+	
+	event void InfraredLight.readDone(error_t err, uint16_t data){
+		datamsg_t* packet = (datamsg_t*)(call AMSend.getPayload(&message, sizeof(datamsg_t)));
+		packet-> AccelX_data=AccelX_data;
+		packet-> AccelY_data = AccelY_data;
+		packet-> Intersema_data[0] = Intersema_data[0];
+		packet-> Intersema_data[1] = Intersema_data[1];
+		packet-> Temp_data =Temp_data;
+		packet-> Hum_data = Hum_data;
+		packet-> VisLight_data = VisLight_data;
+		packet-> InfLight_data = data;
+		call AMSend.send(AM_BROADCAST_ADDR, &message, sizeof(datamsg_t));
+	}
+
+	event void AMSend.sendDone(message_t* bufPtr, error_t error){
+		call X_Axis.read();
+		call Leds.led1Toggle();
+	}
+	
+	event void SplitControl.stopDone(error_t err){}
+}
diff --git a/apps/tests/mts400/README.txt b/apps/tests/mts400/README.txt
new file mode 100644
index 00000000..1d8ca340
--- /dev/null
+++ b/apps/tests/mts400/README.txt
@@ -0,0 +1,27 @@
+README for Mts400Tester
+Author/Contact: Zoltán Kincses, kincsesz@inf.u-szeged.hu
+
+Description:
+
+This is a demo application for the mts400 sensor board. This board contains a 2-Axis accelerometer (Analog Devices ADXL202JE), a barometric pressure and temperature sensor (Intersema MS5534), a humidity and temperature sensor (Sensirion SHT11), and a light sensor (Taos TSL2550). You can find detailed description about the board at the http://courses.ece.ubc.ca/494/files/MTS-MDA_Series_Users_Manual_7430-0020-04_B.pdf website. In this application, the Accel202C sensor is sampled first in the X and then in the Y direction. In the next step, the Intersema5534C sensor is sampled, and the read values are stored in an array. The first element is the temperature and the second is the pressure. After this, the SensirionSht11C sensor is sampled, where the raw temperature and then humidity data is read. Finally, the Taos255C sensor is sampled, where the raw visible and then infrared light data is read. The read values are sent to the basestation, and the sampling process starts again. The raw data read from the SensirionSht11C and Taos2550C sensors have to be converted, according to the datasheets of the sensors. The required conversions are done in the example java code. To compile the application, two include directories are required, which can be found in the Makefile of the application. The output normally looks like the following:
+
+Accelerometer X axis:  the measured value (in g)
+Accelerometer Y axis:  the measured value (in g)
+Intersema temperature: the measured value (in degree centigrade)
+Intersema pressure:    the measured value (in mbar)
+Sensirion temperature: the converted value (in degree centigrade)
+Sensirion humidity:    the converted value (in %RH)
+Taos visible light:    the converted value (in Lux)
+Taos infrared light:   the converted value (in Lux)
+
+The displayed Intersema temperature and pressure values always contain one decimal digit. For example, if the measured temperature value is 262, it means that the temperature is 26.2 degree centigrade. Similarly if the measured pressure value is 9922, it means the pressure is 992.2 mbar.
+During the operation of the application, the led0 indicates that the mote is on, and the led1 indicates the mote sent the measured data to the basestation.
+
+Tools:
+The Mts400Tester.java is the example java code.
+
+Known bugs/limitations:
+None.
+
+$Id: README.txt,v 1.1 2010-06-21 22:56:11 mmaroti Exp $
+
diff --git a/apps/tests/rfxlink/RadioSniffer/Makefile b/apps/tests/rfxlink/RadioSniffer/Makefile
new file mode 100644
index 00000000..35598c9f
--- /dev/null
+++ b/apps/tests/rfxlink/RadioSniffer/Makefile
@@ -0,0 +1,7 @@
+COMPONENT=RadioSnifferC
+CFLAGS += -I$(TOSDIR)/lib/diagmsg
+CFLAGS += -DTASKLET_IS_TASK
+CFLAGS += -DDIAGMSG_RECORDED_MSGS=60
+CFLAGS += -DRADIO_DEBUG -DRADIO_DEBUG_MESSAGES
+CFLAGS += -DRF230_RSSI_ENERGY
+include $(MAKERULES)
diff --git a/apps/tests/rfxlink/RadioSniffer/RadioSnifferC.nc b/apps/tests/rfxlink/RadioSniffer/RadioSnifferC.nc
new file mode 100644
index 00000000..7b4dfb5c
--- /dev/null
+++ b/apps/tests/rfxlink/RadioSniffer/RadioSnifferC.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+configuration RadioSnifferC
+{
+}
+
+implementation
+{
+	#define UQ_METADATA_FLAGS	"UQ_METADATA_FLAGS"
+	#define UQ_RADIO_ALARM		"UQ_RADIO_ALARM"
+
+	components RadioSnifferP, MainC, SerialActiveMessageC, AssertC;
+	
+	RadioSnifferP.Boot -> MainC;
+	RadioSnifferP.SplitControl -> SerialActiveMessageC;
+	RadioSnifferP.RadioState -> RadioDriverLayerC;
+
+	// just to avoid a timer compilation bug
+	components new TimerMilliC();
+
+// -------- ActiveMessage
+
+	components new Ieee154PacketLayerC();
+	Ieee154PacketLayerC.SubPacket -> TimeStampingLayerC;
+
+// -------- TimeStamping
+
+	components new TimeStampingLayerC();
+	TimeStampingLayerC.LocalTimeRadio -> RadioDriverLayerC;
+	TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC;
+	TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+
+// -------- MetadataFlags
+
+	components new MetadataFlagsLayerC();
+	MetadataFlagsLayerC.SubPacket -> RadioDriverLayerC;
+
+// -------- RadioAlarm
+
+	components new RadioAlarmC();
+	RadioAlarmC.Alarm -> RadioDriverLayerC;
+
+// -------- RadioDriver
+
+#if defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) || defined(PLATFORM_MESHBEAN)
+	components RF230DriverLayerC as RadioDriverLayerC;
+	components RF230RadioP as RadioP;
+#elif defined(PLATFORM_MESHBEAN900)
+	components RF212DriverLayerC as RadioDriverLayerC;
+	components RF212RadioP as RadioP;
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSA) || defined(PLATFORM_TELOSB)
+	components CC2420XDriverLayerC as RadioDriverLayerC;
+	components CC2420XRadioP as RadioP;
+#elif defined(PLATFORM_UCMINI)
+	components RFA1DriverLayerC as RadioDriverLayerC;
+	components RFA1RadioP as RadioP;
+#endif
+
+	RadioDriverLayerC.PacketTimeStamp -> TimeStampingLayerC;
+	RadioDriverLayerC.Config -> RadioP;
+	RadioP.Ieee154PacketLayer -> Ieee154PacketLayerC;
+
+	RadioDriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	RadioDriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	RadioDriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	RadioDriverLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+}
diff --git a/apps/tests/rfxlink/RadioSniffer/RadioSnifferP.nc b/apps/tests/rfxlink/RadioSniffer/RadioSnifferP.nc
new file mode 100644
index 00000000..3f083af2
--- /dev/null
+++ b/apps/tests/rfxlink/RadioSniffer/RadioSnifferP.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+
+module RadioSnifferP
+{
+	uses
+	{
+		interface Boot;
+		interface SplitControl;
+
+		interface RadioState;
+	}
+}
+
+implementation
+{
+	task void serialPowerUp()
+	{
+		if( call SplitControl.start() != SUCCESS )
+			post serialPowerUp();
+	}
+
+	event void SplitControl.startDone(error_t error)
+	{
+		if( error != SUCCESS )
+			post serialPowerUp();
+		else
+			call RadioState.turnOn();
+	}
+
+	event void SplitControl.stopDone(error_t error)
+	{
+	}
+
+	event void Boot.booted()
+	{
+		post serialPowerUp();
+	}
+
+	tasklet_async event void RadioState.done()
+	{
+	}
+}
diff --git a/apps/tests/rfxlink/TestTransmit/Makefile b/apps/tests/rfxlink/TestTransmit/Makefile
new file mode 100644
index 00000000..b8d1f51b
--- /dev/null
+++ b/apps/tests/rfxlink/TestTransmit/Makefile
@@ -0,0 +1,8 @@
+COMPONENT=TestRadioDriverC
+
+CFLAGS += -I$(TOSDIR)/lib/diagmsg
+CFLAGS += -DDIAGMSG_RECORDED_MSGS=60
+CFLAGS += -DRADIO_DEBUG 
+CFLAGS += -DRADIO_DEBUG_PARTNUM
+
+include $(MAKERULES)
diff --git a/apps/tests/rfxlink/TestTransmit/README b/apps/tests/rfxlink/TestTransmit/README
new file mode 100644
index 00000000..3938806a
--- /dev/null
+++ b/apps/tests/rfxlink/TestTransmit/README
@@ -0,0 +1,20 @@
+TestTransmit:
+
+This application sends a very short message (2 bytes) every 2 millisec
+without checking for other traffic. We want to test if the radio driver
+locks up because we want to transmit while receiving another message.
+
+It blinks the 0th LED (red) when 256 times RadioSend.send() returns with
+an error. It blinks the 1st LED (green) when 256 times the RadioSend.send()
+returns with success. It blinks the 2nd LED (yellow) when 256 times 
+RadioReceiver.receive is called. 
+
+Program two or more motes with this application, then start them. You 
+should see the 2nd LED (yellow) blink continuously, and the 1st and 0th
+LED (green and red) blink too. If both the 0th and 1st LED stops blinking
+the the radio driver locked up. You can also reset one of the motes
+to verify that the other keeps receiving messages.
+
+You can also connect one of your motes to your PC and run there the
+java.net.tinyos.util.DiagMsg application. This should print out ASSERTS
+of the radio driver.
diff --git a/apps/tests/rfxlink/TestTransmit/RadioDriverConfigP.nc b/apps/tests/rfxlink/TestTransmit/RadioDriverConfigP.nc
new file mode 100644
index 00000000..38d251f3
--- /dev/null
+++ b/apps/tests/rfxlink/TestTransmit/RadioDriverConfigP.nc
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include "Tasklet.h"
+#include "RadioAssert.h"
+#include "message.h"
+#include "RadioConfig.h"
+
+module RadioDriverConfigP
+{
+	provides
+	{
+#if defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) || defined(PLATFORM_MESHBEAN)
+		interface RF230DriverConfig as RadioDriverConfig;
+#elif defined(PLATFORM_MESHBEAN900)
+		interface RF212DriverConfig as RadioDriverConfig;
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSA) || defined(PLATFORM_TELOSB)
+		interface CC2420XDriverConfig as RadioDriverConfig;
+#elif defined(PLATFORM_UCMINI)
+		interface RFA1DriverConfig as RadioDriverConfig;
+#endif
+	}
+}
+
+implementation
+{
+	async command uint8_t RadioDriverConfig.headerLength(message_t* msg)
+	{
+		return 0;
+	}
+
+	async command uint8_t RadioDriverConfig.maxPayloadLength()
+	{
+		return sizeof(message_header_t) + TOSH_DATA_LENGTH;
+	}
+
+	async command uint8_t RadioDriverConfig.metadataLength(message_t* msg)
+	{
+		return 0;
+	}
+
+	async command uint8_t RadioDriverConfig.headerPreloadLength()
+	{
+		return 7;
+	}
+
+	async command bool RadioDriverConfig.requiresRssiCca(message_t* msg)
+	{
+		return FALSE;
+	}
+}
diff --git a/apps/tests/rfxlink/TestTransmit/TestRadioDriverC.nc b/apps/tests/rfxlink/TestTransmit/TestRadioDriverC.nc
new file mode 100644
index 00000000..9949fbf2
--- /dev/null
+++ b/apps/tests/rfxlink/TestTransmit/TestRadioDriverC.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2010, University of Szeged
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+configuration TestRadioDriverC
+{
+}
+
+implementation
+{
+	#define UQ_METADATA_FLAGS	"UQ_METADATA_FLAGS"
+	#define UQ_RADIO_ALARM		"UQ_RADIO_ALARM"
+
+	components TestRadioDriverP, MainC, SerialActiveMessageC, AssertC, LedsC;
+	
+	TestRadioDriverP.Boot -> MainC;
+	TestRadioDriverP.SplitControl -> SerialActiveMessageC;
+	TestRadioDriverP.RadioState -> RadioDriverLayerC;
+	TestRadioDriverP.RadioSend -> RadioDriverLayerC;
+	TestRadioDriverP.RadioReceive -> RadioDriverLayerC;
+	TestRadioDriverP.RadioPacket -> TimeStampingLayerC;
+	TestRadioDriverP.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+	TestRadioDriverP.Leds -> LedsC;
+
+	// just to avoid a timer compilation bug
+	components new TimerMilliC();
+
+// -------- TimeStamping
+
+	components new TimeStampingLayerC();
+	TimeStampingLayerC.LocalTimeRadio -> RadioDriverLayerC;
+	TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC;
+	TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+
+// -------- MetadataFlags
+
+	components new MetadataFlagsLayerC();
+	MetadataFlagsLayerC.SubPacket -> RadioDriverLayerC;
+
+// -------- RadioAlarm
+
+	components new RadioAlarmC();
+	RadioAlarmC.Alarm -> RadioDriverLayerC;
+
+// -------- RadioDriver
+
+#if defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) || defined(PLATFORM_MESHBEAN)
+	components RF230DriverLayerC as RadioDriverLayerC;
+	components RF230RadioP as RadioP;
+#elif defined(PLATFORM_MESHBEAN900)
+	components RF212DriverLayerC as RadioDriverLayerC;
+	components RF212RadioP as RadioP;
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSA) || defined(PLATFORM_TELOSB)
+	components CC2420XDriverLayerC as RadioDriverLayerC;
+	components CC2420XRadioP as RadioP;
+#elif defined(PLATFORM_UCMINI)
+	components RFA1DriverLayerC as RadioDriverLayerC;
+	components RFA1RadioP as RadioP;
+#endif
+
+	components RadioDriverConfigP;
+	RadioDriverLayerC.PacketTimeStamp -> TimeStampingLayerC;
+	RadioDriverLayerC.Config -> RadioDriverConfigP;
+
+	RadioDriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	RadioDriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	RadioDriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	RadioDriverLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+}
diff --git a/apps/tests/rfxlink/TestTransmit/TestRadioDriverP.nc b/apps/tests/rfxlink/TestTransmit/TestRadioDriverP.nc
new file mode 100644
index 00000000..b3f215ce
--- /dev/null
+++ b/apps/tests/rfxlink/TestTransmit/TestRadioDriverP.nc
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include "Tasklet.h"
+#include "RadioAssert.h"
+#include "message.h"
+#include "RadioConfig.h"
+
+module TestRadioDriverP
+{
+	uses
+	{
+		interface Boot;
+		interface SplitControl;
+		interface Leds;
+
+		interface RadioState;
+		interface RadioPacket;
+		interface RadioAlarm;
+		interface RadioSend;
+		interface RadioReceive;
+	}
+}
+
+implementation
+{
+	tasklet_norace uint8_t failureCount;
+	tasklet_norace uint8_t successCount;
+	tasklet_norace uint8_t receiveCount;
+	tasklet_norace uint8_t timerCount;
+
+	message_t msgbuffer;
+
+	event void Boot.booted()
+	{
+		error_t error;
+		
+		error = call SplitControl.start();
+		RADIO_ASSERT( error == SUCCESS );
+	}
+
+	event void SplitControl.startDone(error_t error)
+	{
+		RADIO_ASSERT( error == SUCCESS );
+
+		error = call RadioState.turnOn();
+		RADIO_ASSERT( error == SUCCESS );
+	}
+
+	event void SplitControl.stopDone(error_t error)
+	{
+	}
+
+	tasklet_async event void RadioState.done()
+	{
+		call RadioPacket.clear(&msgbuffer);
+		call RadioPacket.setPayloadLength(&msgbuffer, 2);
+
+		RADIO_ASSERT( call RadioAlarm.isFree() );
+
+		call RadioAlarm.wait(1);
+	}
+
+	tasklet_norace uint16_t next;
+
+	tasklet_async event void RadioAlarm.fired()
+	{
+		uint8_t *payload;
+		error_t error;
+
+		next += 2000 * RADIO_ALARM_MICROSEC;
+		atomic
+		{
+			call RadioAlarm.wait(next - call RadioAlarm.getNow());
+		}
+
+		payload = ((void*)&msgbuffer) + call RadioPacket.headerLength(&msgbuffer);
+
+		payload[0] = TOS_NODE_ID;
+		payload[1] = ++timerCount;
+
+		error = call RadioSend.send(&msgbuffer);
+		if( error != SUCCESS )
+		{
+			if( ++failureCount == 0 )
+				call Leds.led0Toggle();
+		}
+		else
+		{
+			if( ++successCount == 0 )
+				call Leds.led1Toggle();
+		}
+	}
+
+	tasklet_async event void RadioSend.sendDone(error_t error)
+	{
+		RADIO_ASSERT( error == SUCCESS );
+	}
+
+	tasklet_async event void RadioSend.ready()
+	{
+	}
+
+	tasklet_async event bool RadioReceive.header(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	tasklet_async event message_t* RadioReceive.receive(message_t* msg)
+	{
+		if( ++receiveCount == 0 )
+			call Leds.led2Toggle();
+
+		return msg;
+	}
+}
diff --git a/apps/tests/sam3/README b/apps/tests/sam3/README
new file mode 100644
index 00000000..1f98590b
--- /dev/null
+++ b/apps/tests/sam3/README
@@ -0,0 +1,2 @@
+This directory contains SAM3 specific test applications. For more
+details, see in the particular sub directories.
diff --git a/apps/tests/sam3/TestMpu/Makefile b/apps/tests/sam3/TestMpu/Makefile
new file mode 100644
index 00000000..8d00fa1f
--- /dev/null
+++ b/apps/tests/sam3/TestMpu/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=TestMpuAppC
+include $(MAKERULES)
diff --git a/apps/tests/sam3/TestMpu/TestMpuAppC.nc b/apps/tests/sam3/TestMpu/TestMpuAppC.nc
new file mode 100644
index 00000000..735c33c6
--- /dev/null
+++ b/apps/tests/sam3/TestMpu/TestMpuAppC.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic application to test the MPU and the corresponding exception.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ **/
+
+configuration TestMpuAppC
+{
+}
+implementation
+{
+	components MainC, TestMpuC, LedsC, HplSam3uMpuC;
+
+	TestMpuC -> MainC.Boot;
+	TestMpuC.Leds -> LedsC;
+	TestMpuC.HplSam3uMpu -> HplSam3uMpuC;
+}
diff --git a/apps/tests/sam3/TestMpu/TestMpuC.nc b/apps/tests/sam3/TestMpu/TestMpuC.nc
new file mode 100644
index 00000000..8c998528
--- /dev/null
+++ b/apps/tests/sam3/TestMpu/TestMpuC.nc
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic application to test the MPU and the corresponding exception.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ **/
+
+// choose exactly one of the following
+#define TEST_WRITE_PROTECTION
+//#define TEST_EXECUTE_PROTECTION
+
+// choose exactly one of the following
+#define PROTECTED
+//#define UNPROTECTED
+
+/* Running either one of the write/execute tests *with* protection should first light up LED 0 (green),
+ * then LED 2 (red) to indicate an MPU fault. LED 1 (green) should not light up,
+ * since that would indicate a successful write/execution despite MPU protection.
+ * Running either one of the write/execute tests *without* protection should first light up LED 0 (green),
+ * then LED 1 (green) to indicate a successful write/execution. LED 2 (red) should not light up,
+ * since that would indicate an MPU fault. */
+
+/* Caveat: currently, the linker ignores the alignment for the function and spits out
+ * warning: `aligned' attribute directive ignored
+ * When setting up the region, the function address is aligned, and the first instruction of the function
+ * will be protected, triggering the trap if protected. */
+
+typedef struct
+{
+	uint32_t word1;
+	uint32_t word2;
+	uint32_t word3;
+	uint32_t word4;
+	uint32_t word5;
+	uint32_t word6;
+	uint32_t word7;
+	uint32_t word8;
+} struct32bytes;
+
+volatile struct32bytes __attribute__((aligned(32))) structure; // 32 bytes aligned
+
+void  __attribute__((noinline)) __attribute__((aligned(32))) protected();
+
+void protected()
+{
+	volatile int i = 0;
+	for (; i < 50; i++);
+}
+
+module TestMpuC
+{
+	uses interface Leds;
+	uses interface Boot;
+	uses interface HplSam3uMpu;
+}
+implementation
+{
+	void fatal();
+
+	event void Boot.booted()
+	{
+		// setup MPU
+		call HplSam3uMpu.enableDefaultBackgroundRegion();
+		call HplSam3uMpu.disableMpuDuringHardFaults();
+
+		// first iteration should be successful, MPU not yet active
+#ifdef TEST_WRITE_PROTECTION
+		structure.word1 = 13;
+#endif
+#ifdef TEST_EXECUTE_PROTECTION
+		protected();
+#endif
+
+		call Leds.led0On(); // LED 0: successful write/execute (should always happen)
+
+#ifdef TEST_WRITE_PROTECTION
+#ifdef PROTECTED
+		// activate MPU and write-protect structure
+		if ((call HplSam3uMpu.setupRegion(0, TRUE, (void *) &structure, 32, FALSE, TRUE, FALSE, TRUE, FALSE, TRUE, TRUE, 0)) == FAIL) {
+			fatal();
+		}
+#endif
+#endif
+#ifdef TEST_EXECUTE_PROTECTION
+#ifdef PROTECTED
+		// activate MPU and execute-protect protected()
+		if ((call HplSam3uMpu.setupRegion(0, TRUE, (void *) (((uint32_t) &protected) & (~ (32 - 1))), 32, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE, TRUE, 0)) == FAIL) { // aligned
+			fatal();
+		}
+#endif
+#endif
+
+#ifdef PROTECTED
+		call HplSam3uMpu.enableMpu();
+#endif
+
+#ifdef TEST_WRITE_PROTECTION
+		structure.word1 = 42;
+#endif
+#ifdef TEST_EXECUTE_PROTECTION
+		protected();
+#endif
+
+		call Leds.led1On(); // LED 1: successful protected write/execute (should not happen if protected)
+
+		while(1);
+	}
+
+	void fatal()
+	{
+		while(1) {
+			volatile int i;
+			for (i = 0; i < 100000; i++);
+			call Leds.led2Toggle(); // Led 2 (red) blinking: fatal
+		}
+	}
+
+	async event void HplSam3uMpu.mpuFault()
+	{
+		call Leds.led2On(); // LED 2 (red): MPU fault
+		while(1);
+	}
+}
diff --git a/apps/tests/sam3/TestSvc/Makefile b/apps/tests/sam3/TestSvc/Makefile
new file mode 100644
index 00000000..f42b4eb4
--- /dev/null
+++ b/apps/tests/sam3/TestSvc/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=TestSvcAppC
+include $(MAKERULES)
diff --git a/apps/tests/sam3/TestSvc/TestSvcAppC.nc b/apps/tests/sam3/TestSvc/TestSvcAppC.nc
new file mode 100644
index 00000000..a88a8fe1
--- /dev/null
+++ b/apps/tests/sam3/TestSvc/TestSvcAppC.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Minimal app to test the svc instruction on the SAM3U and the
+ * dispatching of its arguments.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+configuration TestSvcAppC
+{
+}
+implementation
+{
+	components MainC, TestSvcC, LedsC;
+
+	TestSvcC -> MainC.Boot;
+	TestSvcC.Leds -> LedsC;
+}
diff --git a/apps/tests/sam3/TestSvc/TestSvcC.nc b/apps/tests/sam3/TestSvc/TestSvcC.nc
new file mode 100644
index 00000000..8816b09a
--- /dev/null
+++ b/apps/tests/sam3/TestSvc/TestSvcC.nc
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Minimal app to test the svc instruction on the SAM3U and the
+ * dispatching of its arguments.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+module TestSvcC
+{
+	uses interface Leds;
+	uses interface Boot;
+}
+implementation
+{
+	error_t syscall(uint8_t id, uint32_t p0, uint32_t p1, uint32_t p2, uint32_t p3)
+	{
+		volatile uint32_t result;
+
+		//__nesc_disable_interrupt(); // svc cannot be called with IRQs disabled
+
+		asm volatile("mov r0, %0" : : "r" (p0));
+		asm volatile("mov r1, %0" : : "r" (p1));
+		asm volatile("mov r2, %0" : : "r" (p2));
+		asm volatile("mov r3, %0" : : "r" (p3));
+		asm volatile("svc %0" : : "i" (id));
+
+		// result is in r0
+		asm volatile("mov %0, r0" : "=r" (result));
+
+		return result;
+	}
+
+	event void Boot.booted()
+	{
+		volatile uint32_t result = syscall(0x42, 0x00, 0x11, 0x22, 0x33);
+
+		result++;
+
+		while(1);
+
+		return;
+	}
+
+	void ActualSVCallHandler(uint32_t *args) @C() @spontaneous()
+	{
+		volatile uint32_t svc_id;
+		volatile uint32_t svc_r0;
+		volatile uint32_t svc_r1;
+		volatile uint32_t svc_r2;
+		volatile uint32_t svc_r3;
+
+		svc_id = ((uint8_t *) args[6])[-2];
+		svc_r0 = ((uint32_t) args[0]);
+		svc_r1 = ((uint32_t) args[1]);
+		svc_r2 = ((uint32_t) args[2]);
+		svc_r3 = ((uint32_t) args[3]);
+
+		args[0] = 0x23;
+
+		return;
+	}
+
+	void SVCallHandler() @C() @spontaneous() __attribute__((naked))
+	{
+		asm volatile(
+		"tst lr, #4\n"
+		"ite eq\n"
+		"mrseq r0, msp\n"
+		"mrsne r0, psp\n"
+		"b ActualSVCallHandler\n"
+		);
+		// return from ActualSVCallHandler() returns to svc call site (through lr)
+	}
+}
diff --git a/apps/tests/sam3/TestUart/Makefile b/apps/tests/sam3/TestUart/Makefile
new file mode 100644
index 00000000..915648f6
--- /dev/null
+++ b/apps/tests/sam3/TestUart/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=TestUartAppC
+include $(MAKERULES)
diff --git a/apps/tests/sam3/TestUart/TestUartAppC.nc b/apps/tests/sam3/TestUart/TestUartAppC.nc
new file mode 100644
index 00000000..c9b0cdc9
--- /dev/null
+++ b/apps/tests/sam3/TestUart/TestUartAppC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic application that tests the SAM3U UART.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ **/
+
+configuration TestUartAppC
+{
+}
+implementation
+{
+	components MainC, TestUartC, LedsC;
+
+	TestUartC -> MainC.Boot;
+	TestUartC.Leds -> LedsC;
+
+	components HplNVICC;
+#if defined(PLATFORM_SAM3U_EK)
+	TestUartC.UartIrqControl -> HplNVICC.DBGUInterrupt;
+#else
+	TestUartC.UartIrqControl -> HplNVICC.UART0Interrupt;
+#endif
+
+	components HilSam3UartC;
+	TestUartC.UartControl -> HilSam3UartC;
+	TestUartC.UartByte -> HilSam3UartC;
+	TestUartC.UartStream -> HilSam3UartC;
+}
diff --git a/apps/tests/sam3/TestUart/TestUartC.nc b/apps/tests/sam3/TestUart/TestUartC.nc
new file mode 100644
index 00000000..4a9af37b
--- /dev/null
+++ b/apps/tests/sam3/TestUart/TestUartC.nc
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic application that tests the SAM3U UART.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ **/
+
+module TestUartC
+{
+	uses interface Leds;
+	uses interface Boot;
+	uses interface HplNVICInterruptCntl as UartIrqControl;
+	uses interface StdControl as UartControl;
+	uses interface UartByte;
+	uses interface UartStream;
+}
+implementation
+{
+	uint8_t buffer[10];
+
+	task void sendTask();
+	task void receiveTask();
+
+	event void Boot.booted()
+	{
+		call UartIrqControl.configure(0xff);
+		call UartIrqControl.enable();
+		call UartControl.start();
+
+//		__nesc_enable_interrupt();
+
+		post receiveTask();
+	}
+
+	task void receiveTask()
+	{
+		call UartStream.receive(buffer, 10);
+	}
+
+	async event void UartStream.receiveDone(uint8_t* buf, uint16_t len, error_t error)
+	{
+		call Leds.led0Toggle(); // Led 0 (green) = received something
+		post sendTask();
+	}
+
+	task void sendTask()
+	{
+		// send out received buffer
+		call UartStream.send(buffer, 10);
+	}
+
+	async event void UartStream.sendDone(uint8_t* buf, uint16_t len, error_t error)
+	{
+		call Leds.led1Toggle(); // Led 1 (green) = sent something
+		post receiveTask();
+	}
+
+	async event void UartStream.receivedByte(uint8_t byte)
+	{
+		call Leds.led2Toggle(); // Led 2 (red) = received something w/o a buffer
+	}
+}
diff --git a/apps/tests/sam3/adc/AdcReader/AdcReaderC.nc b/apps/tests/sam3/adc/AdcReader/AdcReaderC.nc
new file mode 100644
index 00000000..9784048e
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReader/AdcReaderC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+configuration AdcReaderC
+{
+  provides interface Read<uint16_t>;
+}
+
+implementation
+{
+  components new AdcReadClientC(), AdcReaderP;
+
+  Read = AdcReadClientC;
+  AdcReadClientC.AdcConfigure -> AdcReaderP;
+}
diff --git a/apps/tests/sam3/adc/AdcReader/AdcReaderP.nc b/apps/tests/sam3/adc/AdcReader/AdcReaderP.nc
new file mode 100644
index 00000000..30213454
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReader/AdcReaderP.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+#include "sam3sadchardware.h"
+
+module AdcReaderP
+{
+  provides interface AdcConfigure<const sam3s_adc_channel_config_t*>;
+}
+
+implementation {
+      const sam3s_adc_channel_config_t config = 
+      {
+         channel  : 5,
+         trgen    : 0, // 0: trigger disabled
+         trgsel   : 0, // 0: external trigger
+         lowres   : 0, // 0: 12-bit
+         sleep    : 0, // 0: normal, adc core and vref are kept on between conversions
+         fwup     : 0, // 0: normal, sleep mode is defined by sleep bit
+         freerun  : 0, // 0: normal mode, wait for trigger
+         prescal  : 2, // ADCClock = MCK / ((prescal + 1)*2)
+         startup  : 7, // 112 periods of ADCClock
+         settling : 1, // 5 periods of ADCClock
+         anach    : 0, // 0: no analog changed on channel switching
+         tracktim : 1, // Tracking Time = (tracktim + 1) * ADCClock periods
+         transfer : 1, // Transfer Period = (transfer*1+3) * ADCClock periods
+         useq     : 0, // 0: normal, converts channel in sequence
+         ibctl    : 1,
+         diff     : 0,
+         gain     : 0,
+         offset   : 0,
+      };
+
+  async command const sam3s_adc_channel_config_t* AdcConfigure.getConfiguration() {
+    return &config;
+  }
+}
diff --git a/apps/tests/sam3/adc/AdcReader/Makefile b/apps/tests/sam3/adc/AdcReader/Makefile
new file mode 100644
index 00000000..c92111cd
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReader/Makefile
@@ -0,0 +1,9 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+#CFLAGS+=-I$(TOSDIR)/lib/printf
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/adc/AdcReader/MoteAppC.nc b/apps/tests/sam3/adc/AdcReader/MoteAppC.nc
new file mode 100644
index 00000000..abfce0f8
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReader/MoteAppC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC Read with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC,
+    LedsC, NoLedsC,
+    new TimerMilliC() as TimerC,
+    SerialActiveMessageC,
+    AdcReaderC,
+    LcdC,
+    MoteP;
+             
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> LedsC;
+  MoteP.Read -> AdcReaderC;
+  MoteP.SerialSplitControl -> SerialActiveMessageC;
+  MoteP.Packet -> SerialActiveMessageC;
+  MoteP.Timer -> TimerC;
+
+  MoteP.Lcd -> LcdC;
+  MoteP.Draw -> LcdC;
+}
diff --git a/apps/tests/sam3/adc/AdcReader/MoteP.nc b/apps/tests/sam3/adc/AdcReader/MoteP.nc
new file mode 100644
index 00000000..8f61dca9
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReader/MoteP.nc
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC Read with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+#include <color.h>
+#include <lcd.h>
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface Read<uint16_t>;
+    interface SplitControl as SerialSplitControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface Lcd;
+    interface Draw;
+  }
+}
+
+implementation
+{
+  event void Boot.booted()
+  {
+    while (call SerialSplitControl.start() != SUCCESS);
+    call Lcd.initialize();
+  }
+
+  event void Lcd.initializeDone(error_t err)
+  {
+    if(err != SUCCESS)
+    {
+    }
+    else
+    {
+      call Draw.fill(COLOR_RED);
+      call Lcd.start();
+    }
+  }
+
+  event void Lcd.startDone(){
+  }
+
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      while (call SerialSplitControl.start() != SUCCESS);
+    }else{
+      call Timer.startPeriodic(256);
+    }
+  }
+
+  event void SerialSplitControl.stopDone(error_t error) {}
+
+
+  task void sample()
+  {
+    const char *start = "Start Sampling";
+    call Leds.led0Toggle();
+    call Draw.fill(COLOR_BLUE);
+    call Draw.drawString(10,50,start,COLOR_RED);
+    if(call Read.read() != SUCCESS)
+    {
+      const char *fail = "Read Failed";
+      call Draw.drawString(10,70, fail, COLOR_RED);
+    }
+
+  }
+
+  event void Read.readDone(error_t result, uint16_t value)
+  {
+    const char *fail = "Read done error";
+    const char *good = "Read done success";
+    call Draw.fill(COLOR_GREEN);
+    if (result != SUCCESS) {
+      call Draw.drawString(10,70,fail,COLOR_BLACK);
+    }else{
+      call Draw.drawString(10,70,good,COLOR_BLACK);
+      call Draw.drawInt(100,100,value,1,COLOR_BLACK);
+    }
+  }
+
+  event void Timer.fired() {
+    post sample();
+  }
+}
diff --git a/apps/tests/sam3/adc/AdcReaderNow/AdcReaderC.nc b/apps/tests/sam3/adc/AdcReaderNow/AdcReaderC.nc
new file mode 100644
index 00000000..9eec964b
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderNow/AdcReaderC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+configuration AdcReaderC
+{
+  provides interface ReadNow<uint16_t>;
+  provides interface Resource;
+}
+
+implementation
+{
+  components new AdcReadNowClientC(), AdcReaderP;
+
+  ReadNow = AdcReadNowClientC;
+  Resource = AdcReadNowClientC;
+  AdcReadNowClientC.AdcConfigure -> AdcReaderP;
+}
diff --git a/apps/tests/sam3/adc/AdcReaderNow/AdcReaderP.nc b/apps/tests/sam3/adc/AdcReaderNow/AdcReaderP.nc
new file mode 100644
index 00000000..30213454
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderNow/AdcReaderP.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+#include "sam3sadchardware.h"
+
+module AdcReaderP
+{
+  provides interface AdcConfigure<const sam3s_adc_channel_config_t*>;
+}
+
+implementation {
+      const sam3s_adc_channel_config_t config = 
+      {
+         channel  : 5,
+         trgen    : 0, // 0: trigger disabled
+         trgsel   : 0, // 0: external trigger
+         lowres   : 0, // 0: 12-bit
+         sleep    : 0, // 0: normal, adc core and vref are kept on between conversions
+         fwup     : 0, // 0: normal, sleep mode is defined by sleep bit
+         freerun  : 0, // 0: normal mode, wait for trigger
+         prescal  : 2, // ADCClock = MCK / ((prescal + 1)*2)
+         startup  : 7, // 112 periods of ADCClock
+         settling : 1, // 5 periods of ADCClock
+         anach    : 0, // 0: no analog changed on channel switching
+         tracktim : 1, // Tracking Time = (tracktim + 1) * ADCClock periods
+         transfer : 1, // Transfer Period = (transfer*1+3) * ADCClock periods
+         useq     : 0, // 0: normal, converts channel in sequence
+         ibctl    : 1,
+         diff     : 0,
+         gain     : 0,
+         offset   : 0,
+      };
+
+  async command const sam3s_adc_channel_config_t* AdcConfigure.getConfiguration() {
+    return &config;
+  }
+}
diff --git a/apps/tests/sam3/adc/AdcReaderNow/Makefile b/apps/tests/sam3/adc/AdcReaderNow/Makefile
new file mode 100644
index 00000000..b54ef125
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderNow/Makefile
@@ -0,0 +1,8 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/adc/AdcReaderNow/MoteAppC.nc b/apps/tests/sam3/adc/AdcReaderNow/MoteAppC.nc
new file mode 100644
index 00000000..277bb8c1
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderNow/MoteAppC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC ReadNow with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC,
+    LedsC, NoLedsC,
+    new TimerMilliC() as TimerC,
+    SerialActiveMessageC,
+    AdcReaderC,
+    LcdC,
+    MoteP;
+             
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> NoLedsC;
+  MoteP.ReadNow -> AdcReaderC;
+  MoteP.Resource -> AdcReaderC;
+  MoteP.SerialSplitControl -> SerialActiveMessageC;
+  MoteP.Packet -> SerialActiveMessageC;
+  MoteP.Timer -> TimerC;
+  MoteP.Lcd -> LcdC;
+  MoteP.Draw -> LcdC;
+}
diff --git a/apps/tests/sam3/adc/AdcReaderNow/MoteP.nc b/apps/tests/sam3/adc/AdcReaderNow/MoteP.nc
new file mode 100644
index 00000000..2207400d
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderNow/MoteP.nc
@@ -0,0 +1,134 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC ReadNow with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+//#include "sam3uDmahardware.h"
+#include <color.h>
+#include <lcd.h>
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface ReadNow<uint16_t>;
+    interface Resource;
+    interface SplitControl as SerialSplitControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface Lcd;
+    interface Draw;
+  }
+}
+
+implementation
+{
+  norace error_t resultError;
+  norace uint16_t resultValue;
+
+  event void Boot.booted()
+  {
+    while (call SerialSplitControl.start() != SUCCESS);
+    call Lcd.initialize();
+  }
+
+  event void Lcd.initializeDone(error_t err)
+  {
+    if(err != SUCCESS)
+      {
+      }
+    else
+      {
+        call Draw.fill(COLOR_RED);
+        call Lcd.start();
+      }
+  }
+
+  event void Lcd.startDone(){
+    call Timer.startPeriodic(512);
+  }
+
+
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      while (call SerialSplitControl.start() != SUCCESS);
+    }
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {}
+  
+  task void sample()
+  {
+    const char *start = "Start Sampling";
+    //call Draw.fill(COLOR_BLUE);
+    call Draw.drawString(10,50,start,COLOR_BLACK);
+    call Resource.request();
+  }
+
+  event void Resource.granted(){
+    /* FOR dma testing ONLY*//*
+    DMAC->saddr0.bits.saddrx = (uint32_t) 0x20180000;
+    call Draw.fill(COLOR_GREEN);
+    call Draw.drawInt(100, 100, DMAC->saddr0.bits.saddrx, 1, COLOR_BLACK);
+    */
+    call ReadNow.read();
+  }
+
+  task void drawResult(){
+    const char *fail = "Read done error";
+    const char *good = "Read done success";
+    call Draw.fill(COLOR_GREEN);
+    if (resultError != SUCCESS) {
+      atomic call Draw.drawString(10,70,fail,COLOR_BLACK);
+    }else{
+      call Draw.drawString(10,70,good,COLOR_BLACK);
+      call Draw.drawInt(100,100,resultValue,1,COLOR_BLACK);
+    }
+  }
+
+  async event void ReadNow.readDone(error_t error, uint16_t value)
+  {
+    atomic resultError = error;
+    atomic resultValue = value;
+    post drawResult();
+  }
+  
+  event void Timer.fired() {
+    post sample();
+  }
+}
diff --git a/apps/tests/sam3/adc/AdcReaderStream/AdcReaderC.nc b/apps/tests/sam3/adc/AdcReaderStream/AdcReaderC.nc
new file mode 100644
index 00000000..3f4d7c36
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderStream/AdcReaderC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+configuration AdcReaderC
+{
+  provides interface ReadStream<uint16_t>;
+}
+
+implementation
+{
+  components new AdcReadStreamClientC(), AdcReaderP;
+
+  ReadStream = AdcReadStreamClientC;
+  AdcReadStreamClientC.AdcConfigure -> AdcReaderP;
+}
diff --git a/apps/tests/sam3/adc/AdcReaderStream/AdcReaderP.nc b/apps/tests/sam3/adc/AdcReaderStream/AdcReaderP.nc
new file mode 100644
index 00000000..30213454
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderStream/AdcReaderP.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+#include "sam3sadchardware.h"
+
+module AdcReaderP
+{
+  provides interface AdcConfigure<const sam3s_adc_channel_config_t*>;
+}
+
+implementation {
+      const sam3s_adc_channel_config_t config = 
+      {
+         channel  : 5,
+         trgen    : 0, // 0: trigger disabled
+         trgsel   : 0, // 0: external trigger
+         lowres   : 0, // 0: 12-bit
+         sleep    : 0, // 0: normal, adc core and vref are kept on between conversions
+         fwup     : 0, // 0: normal, sleep mode is defined by sleep bit
+         freerun  : 0, // 0: normal mode, wait for trigger
+         prescal  : 2, // ADCClock = MCK / ((prescal + 1)*2)
+         startup  : 7, // 112 periods of ADCClock
+         settling : 1, // 5 periods of ADCClock
+         anach    : 0, // 0: no analog changed on channel switching
+         tracktim : 1, // Tracking Time = (tracktim + 1) * ADCClock periods
+         transfer : 1, // Transfer Period = (transfer*1+3) * ADCClock periods
+         useq     : 0, // 0: normal, converts channel in sequence
+         ibctl    : 1,
+         diff     : 0,
+         gain     : 0,
+         offset   : 0,
+      };
+
+  async command const sam3s_adc_channel_config_t* AdcConfigure.getConfiguration() {
+    return &config;
+  }
+}
diff --git a/apps/tests/sam3/adc/AdcReaderStream/Makefile b/apps/tests/sam3/adc/AdcReaderStream/Makefile
new file mode 100644
index 00000000..0359d38a
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderStream/Makefile
@@ -0,0 +1,10 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+
+#CFLAGS += -DSAM3U_ADC12B_PDC
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/adc/AdcReaderStream/MoteAppC.nc b/apps/tests/sam3/adc/AdcReaderStream/MoteAppC.nc
new file mode 100644
index 00000000..9f549522
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderStream/MoteAppC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC,
+    LedsC, NoLedsC,
+    new TimerMilliC() as TimerC,
+    SerialActiveMessageC,
+    AdcReaderC,
+    LcdC,
+    MoteP;
+             
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> LedsC;
+  MoteP.ReadStream -> AdcReaderC;
+  MoteP.SerialSplitControl -> SerialActiveMessageC;
+  MoteP.Packet -> SerialActiveMessageC;
+  MoteP.Timer -> TimerC;
+  MoteP.Lcd -> LcdC;
+  MoteP.Draw -> LcdC;
+}
diff --git a/apps/tests/sam3/adc/AdcReaderStream/MoteP.nc b/apps/tests/sam3/adc/AdcReaderStream/MoteP.nc
new file mode 100644
index 00000000..1462f14c
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderStream/MoteP.nc
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+#include <color.h>
+#include <lcd.h>
+
+#define SAMPLE_BUFFER_SIZE BOARD_LCD_WIDTH
+#define NUM_SAMPLES_PER_PACKET (TOSH_DATA_LENGTH / sizeof(uint16_t))
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface ReadStream<uint16_t>;
+    interface SplitControl as SerialSplitControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface Lcd;
+    interface Draw;
+  }
+}
+
+implementation
+{
+  uint16_t buf[SAMPLE_BUFFER_SIZE];
+
+  task void clear(){
+    /* Reset the target buffer for the ReadStream interface */
+    uint32_t i;
+    for (i = 0; i < SAMPLE_BUFFER_SIZE; i++) {
+      buf[i] = 0xFFFF;
+    }
+  }
+
+  event void Boot.booted()
+  {
+    post clear();
+    while (call SerialSplitControl.start() != SUCCESS);
+    call Lcd.initialize();
+  }
+
+  event void Lcd.initializeDone(error_t err)
+  {
+    if(err != SUCCESS)
+      {
+      }
+    else
+      {
+        call Draw.fill(COLOR_RED);
+        call Lcd.start();
+      }
+  }
+
+  event void Lcd.startDone(){
+  }
+
+  task void sample()
+  {
+    //const char *start = "Start Sampling";
+    //call Draw.fill(COLOR_BLUE);
+    //call Draw.drawString(10,50,start,COLOR_RED);
+ 
+    call ReadStream.postBuffer(buf, SAMPLE_BUFFER_SIZE);
+    call ReadStream.read(10000);
+  }
+
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      while (call SerialSplitControl.start() != SUCCESS);
+    }else{
+      //call Timer.startPeriodic(5*1024U);
+      post sample();
+    }
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {}
+
+
+  event void ReadStream.readDone(error_t result, uint32_t usActualPeriod)
+  {
+    if (result != SUCCESS) {
+    }else{
+    }
+  }
+
+  event void ReadStream.bufferDone(error_t result, uint16_t* buffer, uint16_t count) {
+    const char *fail = "Read done error";
+    const char *good = "Read done success";
+    call Leds.led1Toggle();
+    call Draw.fill(COLOR_GREEN);
+    if (result != SUCCESS) {
+      call Draw.drawString(10,70,fail,COLOR_BLACK);
+    }else{
+      uint16_t i;
+      call Draw.drawString(10,70,good,COLOR_BLACK);
+      call Draw.drawInt(100,100,buffer[0],1,COLOR_BLACK);
+      call Draw.drawInt(200,100,count,1,COLOR_BLACK);
+
+      for(i=0; i<count; i++)
+      {
+        call Draw.drawPixel(i, buffer[i]*(BOARD_LCD_HEIGHT-100)/(1<<12)+100, COLOR_BLACK);
+      }
+    }
+    call Leds.led0Toggle();
+    post clear();
+    post sample();
+  }
+
+  event void Timer.fired() {
+    call Leds.led0Toggle();
+    post clear();
+    post sample();
+  }
+}
diff --git a/apps/tests/sam3/adc/AdcReaderStreamPDC/AdcReaderC.nc b/apps/tests/sam3/adc/AdcReaderStreamPDC/AdcReaderC.nc
new file mode 100644
index 00000000..3f4d7c36
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderStreamPDC/AdcReaderC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+configuration AdcReaderC
+{
+  provides interface ReadStream<uint16_t>;
+}
+
+implementation
+{
+  components new AdcReadStreamClientC(), AdcReaderP;
+
+  ReadStream = AdcReadStreamClientC;
+  AdcReadStreamClientC.AdcConfigure -> AdcReaderP;
+}
diff --git a/apps/tests/sam3/adc/AdcReaderStreamPDC/AdcReaderP.nc b/apps/tests/sam3/adc/AdcReaderStreamPDC/AdcReaderP.nc
new file mode 100644
index 00000000..30213454
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderStreamPDC/AdcReaderP.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+#include "sam3sadchardware.h"
+
+module AdcReaderP
+{
+  provides interface AdcConfigure<const sam3s_adc_channel_config_t*>;
+}
+
+implementation {
+      const sam3s_adc_channel_config_t config = 
+      {
+         channel  : 5,
+         trgen    : 0, // 0: trigger disabled
+         trgsel   : 0, // 0: external trigger
+         lowres   : 0, // 0: 12-bit
+         sleep    : 0, // 0: normal, adc core and vref are kept on between conversions
+         fwup     : 0, // 0: normal, sleep mode is defined by sleep bit
+         freerun  : 0, // 0: normal mode, wait for trigger
+         prescal  : 2, // ADCClock = MCK / ((prescal + 1)*2)
+         startup  : 7, // 112 periods of ADCClock
+         settling : 1, // 5 periods of ADCClock
+         anach    : 0, // 0: no analog changed on channel switching
+         tracktim : 1, // Tracking Time = (tracktim + 1) * ADCClock periods
+         transfer : 1, // Transfer Period = (transfer*1+3) * ADCClock periods
+         useq     : 0, // 0: normal, converts channel in sequence
+         ibctl    : 1,
+         diff     : 0,
+         gain     : 0,
+         offset   : 0,
+      };
+
+  async command const sam3s_adc_channel_config_t* AdcConfigure.getConfiguration() {
+    return &config;
+  }
+}
diff --git a/apps/tests/sam3/adc/AdcReaderStreamPDC/Makefile b/apps/tests/sam3/adc/AdcReaderStreamPDC/Makefile
new file mode 100644
index 00000000..06c0c2fc
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderStreamPDC/Makefile
@@ -0,0 +1,10 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+
+CFLAGS += -DSAM3S_ADC_PDC
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/adc/AdcReaderStreamPDC/MoteAppC.nc b/apps/tests/sam3/adc/AdcReaderStreamPDC/MoteAppC.nc
new file mode 100644
index 00000000..acb0cce2
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderStreamPDC/MoteAppC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC,
+    LedsC, NoLedsC,
+    new TimerMilliC() as TimerC,
+    SerialActiveMessageC,
+    AdcReaderC,
+    LcdC,
+    MoteP;
+             
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> NoLedsC;
+  MoteP.ReadStream -> AdcReaderC;
+  MoteP.SerialSplitControl -> SerialActiveMessageC;
+  MoteP.Packet -> SerialActiveMessageC;
+  MoteP.Timer -> TimerC;
+  MoteP.Lcd -> LcdC;
+  MoteP.Draw -> LcdC;
+}
diff --git a/apps/tests/sam3/adc/AdcReaderStreamPDC/MoteP.nc b/apps/tests/sam3/adc/AdcReaderStreamPDC/MoteP.nc
new file mode 100644
index 00000000..16fd74fd
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderStreamPDC/MoteP.nc
@@ -0,0 +1,148 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+#include <color.h>
+#include <lcd.h>
+
+#define SAMPLE_BUFFER_SIZE BOARD_LCD_WIDTH
+#define NUM_SAMPLES_PER_PACKET (TOSH_DATA_LENGTH / sizeof(uint16_t))
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface ReadStream<uint16_t>;
+    interface SplitControl as SerialSplitControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface Lcd;
+    interface Draw;
+  }
+}
+
+implementation
+{
+  uint16_t buf[SAMPLE_BUFFER_SIZE];
+
+  task void clear(){
+    /* Reset the target buffer for the ReadStream interface */
+    uint32_t i;
+    for (i = 0; i < SAMPLE_BUFFER_SIZE; i++) {
+      buf[i] = 0xFFFF;
+    }
+  }
+
+  event void Boot.booted()
+  {
+    post clear();
+    while (call SerialSplitControl.start() != SUCCESS);
+    call Lcd.initialize();
+  }
+
+  event void Lcd.initializeDone(error_t err)
+  {
+    if(err != SUCCESS)
+      {
+      }
+    else
+      {
+        call Draw.fill(COLOR_RED);
+        call Lcd.start();
+      }
+  }
+
+  event void Lcd.startDone(){
+  }
+
+  task void sample()
+  {
+    const char *start = "Start Sampling";
+    call Draw.fill(COLOR_BLUE);
+    call Draw.drawString(10,50,start,COLOR_RED);
+ 
+    call ReadStream.postBuffer(buf, SAMPLE_BUFFER_SIZE);
+    call ReadStream.read(10000);
+  }
+
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      while (call SerialSplitControl.start() != SUCCESS);
+    }else{
+      //call Timer.startPeriodic(5*1024U);
+      post clear();
+      post sample();
+    }
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {}
+
+  event void ReadStream.readDone(error_t result, uint32_t usActualPeriod)
+  {
+    if (result != SUCCESS) {
+    }else{
+    }
+  }
+
+  event void ReadStream.bufferDone(error_t result, uint16_t* buffer, uint16_t count) {
+    const char *fail = "Read done error";
+    const char *good = "Read done success";
+    call Leds.led1Toggle();
+    call Draw.fill(COLOR_GREEN);
+    if (result != SUCCESS) {
+      call Draw.drawString(10,70,fail,COLOR_BLACK);
+    }else{
+      uint16_t i;
+      call Draw.drawString(10,70,good,COLOR_BLACK);
+      call Draw.drawInt(100,100,buffer[0],1,COLOR_BLACK);
+      call Draw.drawInt(200,100,count,1,COLOR_BLACK);
+
+      for(i=0; i<count; i++)
+      {
+        call Draw.drawPixel(i, buffer[i]*(BOARD_LCD_HEIGHT-100)/(1<<12)+100, COLOR_BLACK);
+      }
+    }
+    call Leds.led0Toggle();
+    post clear();
+    post sample();
+  }
+
+  event void Timer.fired() {
+  }
+}
diff --git a/apps/tests/sam3/adc/AdcReaderStreamPDC/README b/apps/tests/sam3/adc/AdcReaderStreamPDC/README
new file mode 100644
index 00000000..3ed7c0a3
--- /dev/null
+++ b/apps/tests/sam3/adc/AdcReaderStreamPDC/README
@@ -0,0 +1,10 @@
+12 bit ADC test program for SAM3S with PDC
+
+@author JeongGil Ko <jgko@cs.jhu.edu>
+@author Thomas Schmid <thomas.schmid@utah.edu>
+
+To use PDC with ADC, the sampling rate MUST be controlled by properly
+setting the startup, prescal and lowres registers.
+
+Setting the sam3s_adc_channel_config_t config can properly set these
+registers.
diff --git a/apps/tests/sam3/adc12b/AdcReader/AdcReaderC.nc b/apps/tests/sam3/adc12b/AdcReader/AdcReaderC.nc
new file mode 100644
index 00000000..9784048e
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReader/AdcReaderC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+configuration AdcReaderC
+{
+  provides interface Read<uint16_t>;
+}
+
+implementation
+{
+  components new AdcReadClientC(), AdcReaderP;
+
+  Read = AdcReadClientC;
+  AdcReadClientC.AdcConfigure -> AdcReaderP;
+}
diff --git a/apps/tests/sam3/adc12b/AdcReader/AdcReaderP.nc b/apps/tests/sam3/adc12b/AdcReader/AdcReaderP.nc
new file mode 100644
index 00000000..bac83253
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReader/AdcReaderP.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+
+module AdcReaderP
+{
+  provides interface AdcConfigure<const sam3u_adc12_channel_config_t*>;
+}
+
+implementation {
+  const sam3u_adc12_channel_config_t config = {
+  channel: 0,
+  diff: 0,
+  prescal: 2,
+  lowres: 0,
+  shtim: 15,
+  ibctl: 1,
+  sleep: 0,
+  startup: 104,
+  trgen: 0,
+  trgsel: 0
+  };
+
+  async command const sam3u_adc12_channel_config_t* AdcConfigure.getConfiguration() {
+    return &config;
+  }
+}
diff --git a/apps/tests/sam3/adc12b/AdcReader/Makefile b/apps/tests/sam3/adc12b/AdcReader/Makefile
new file mode 100644
index 00000000..c92111cd
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReader/Makefile
@@ -0,0 +1,9 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+#CFLAGS+=-I$(TOSDIR)/lib/printf
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/adc12b/AdcReader/MoteAppC.nc b/apps/tests/sam3/adc12b/AdcReader/MoteAppC.nc
new file mode 100644
index 00000000..1fb4baa6
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReader/MoteAppC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC Read with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC,
+    LedsC, NoLedsC,
+    new TimerMilliC() as TimerC,
+    SerialActiveMessageC,
+    AdcReaderC,
+    LcdC,
+    MoteP;
+             
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> NoLedsC;
+  MoteP.Read -> AdcReaderC;
+  MoteP.SerialSplitControl -> SerialActiveMessageC;
+  MoteP.Packet -> SerialActiveMessageC;
+  MoteP.Timer -> TimerC;
+
+  MoteP.Lcd -> LcdC;
+  MoteP.Draw -> LcdC;
+}
diff --git a/apps/tests/sam3/adc12b/AdcReader/MoteP.nc b/apps/tests/sam3/adc12b/AdcReader/MoteP.nc
new file mode 100644
index 00000000..fdfd508e
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReader/MoteP.nc
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC Read with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+#include <color.h>
+#include <lcd.h>
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface Read<uint16_t>;
+    interface SplitControl as SerialSplitControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface Lcd;
+    interface Draw;
+  }
+}
+
+implementation
+{
+  event void Boot.booted()
+  {
+    while (call SerialSplitControl.start() != SUCCESS);
+    call Lcd.initialize();
+  }
+
+  event void Lcd.initializeDone(error_t err)
+  {
+    if(err != SUCCESS)
+      {
+      }
+    else
+      {
+	call Draw.fill(COLOR_RED);
+	call Lcd.start();
+      }
+  }
+
+  event void Lcd.startDone(){
+  }
+
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      while (call SerialSplitControl.start() != SUCCESS);
+    }else{
+      call Timer.startPeriodic(512);
+    }
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {}
+  
+  
+  task void sample()
+  {
+    const char *start = "Start Sampling";
+    call Leds.led0Toggle();
+    call Draw.fill(COLOR_BLUE);
+    call Draw.drawString(10,50,start,COLOR_RED);
+    call Read.read();
+  }
+  
+  event void Read.readDone(error_t result, uint16_t value)
+  {
+    const char *fail = "Read done error";
+    const char *good = "Read done success";
+    call Draw.fill(COLOR_GREEN);
+    if (result != SUCCESS) {
+      call Draw.drawString(10,70,fail,COLOR_BLACK);
+    }else{
+      call Draw.drawString(10,70,good,COLOR_BLACK);
+      call Draw.drawInt(100,100,value,1,COLOR_BLACK);
+    }
+  }
+  
+  event void Timer.fired() {
+    post sample();
+  }
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderNow/AdcReaderC.nc b/apps/tests/sam3/adc12b/AdcReaderNow/AdcReaderC.nc
new file mode 100644
index 00000000..9eec964b
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderNow/AdcReaderC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+configuration AdcReaderC
+{
+  provides interface ReadNow<uint16_t>;
+  provides interface Resource;
+}
+
+implementation
+{
+  components new AdcReadNowClientC(), AdcReaderP;
+
+  ReadNow = AdcReadNowClientC;
+  Resource = AdcReadNowClientC;
+  AdcReadNowClientC.AdcConfigure -> AdcReaderP;
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderNow/AdcReaderP.nc b/apps/tests/sam3/adc12b/AdcReaderNow/AdcReaderP.nc
new file mode 100644
index 00000000..a41c9acc
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderNow/AdcReaderP.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+
+#include "sam3uadc12bhardware.h"
+
+module AdcReaderP
+{
+  provides interface AdcConfigure<const sam3u_adc12_channel_config_t*>;
+}
+
+implementation {
+  const sam3u_adc12_channel_config_t config = {
+  channel: 0,
+  diff: 0,
+  prescal: 2,
+  lowres: 0,
+  shtim: 15,
+  ibctl: 1,
+  sleep: 0,
+  startup: 104,
+  trgen: 0,
+  trgsel: 0
+  };
+
+  async command const sam3u_adc12_channel_config_t* AdcConfigure.getConfiguration() {
+    return &config;
+  }
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderNow/Makefile b/apps/tests/sam3/adc12b/AdcReaderNow/Makefile
new file mode 100644
index 00000000..b54ef125
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderNow/Makefile
@@ -0,0 +1,8 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/adc12b/AdcReaderNow/MoteAppC.nc b/apps/tests/sam3/adc12b/AdcReaderNow/MoteAppC.nc
new file mode 100644
index 00000000..277bb8c1
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderNow/MoteAppC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC ReadNow with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC,
+    LedsC, NoLedsC,
+    new TimerMilliC() as TimerC,
+    SerialActiveMessageC,
+    AdcReaderC,
+    LcdC,
+    MoteP;
+             
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> NoLedsC;
+  MoteP.ReadNow -> AdcReaderC;
+  MoteP.Resource -> AdcReaderC;
+  MoteP.SerialSplitControl -> SerialActiveMessageC;
+  MoteP.Packet -> SerialActiveMessageC;
+  MoteP.Timer -> TimerC;
+  MoteP.Lcd -> LcdC;
+  MoteP.Draw -> LcdC;
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderNow/MoteP.nc b/apps/tests/sam3/adc12b/AdcReaderNow/MoteP.nc
new file mode 100644
index 00000000..93a8a93d
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderNow/MoteP.nc
@@ -0,0 +1,134 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC ReadNow with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+#include "sam3uDmahardware.h"
+#include <color.h>
+#include <lcd.h>
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface ReadNow<uint16_t>;
+    interface Resource;
+    interface SplitControl as SerialSplitControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface Lcd;
+    interface Draw;
+  }
+}
+
+implementation
+{
+  norace error_t resultError;
+  norace uint16_t resultValue;
+
+  event void Boot.booted()
+  {
+    while (call SerialSplitControl.start() != SUCCESS);
+    call Lcd.initialize();
+  }
+
+  event void Lcd.initializeDone(error_t err)
+  {
+    if(err != SUCCESS)
+      {
+      }
+    else
+      {
+        call Draw.fill(COLOR_RED);
+        call Lcd.start();
+      }
+  }
+
+  event void Lcd.startDone(){
+    call Timer.startPeriodic(512);
+  }
+
+
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      while (call SerialSplitControl.start() != SUCCESS);
+    }
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {}
+  
+  task void sample()
+  {
+    const char *start = "Start Sampling";
+    //call Draw.fill(COLOR_BLUE);
+    call Draw.drawString(10,50,start,COLOR_BLACK);
+    call Resource.request();
+  }
+
+  event void Resource.granted(){
+    /* FOR dma testing ONLY*//*
+    DMAC->saddr0.bits.saddrx = (uint32_t) 0x20180000;
+    call Draw.fill(COLOR_GREEN);
+    call Draw.drawInt(100, 100, DMAC->saddr0.bits.saddrx, 1, COLOR_BLACK);
+    */
+    call ReadNow.read();
+  }
+
+  task void drawResult(){
+    const char *fail = "Read done error";
+    const char *good = "Read done success";
+    call Draw.fill(COLOR_GREEN);
+    if (resultError != SUCCESS) {
+      atomic call Draw.drawString(10,70,fail,COLOR_BLACK);
+    }else{
+      call Draw.drawString(10,70,good,COLOR_BLACK);
+      call Draw.drawInt(100,100,resultValue,1,COLOR_BLACK);
+    }
+  }
+
+  async event void ReadNow.readDone(error_t error, uint16_t value)
+  {
+    atomic resultError = error;
+    atomic resultValue = value;
+    post drawResult();
+  }
+  
+  event void Timer.fired() {
+    post sample();
+  }
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderStream/AdcReaderC.nc b/apps/tests/sam3/adc12b/AdcReaderStream/AdcReaderC.nc
new file mode 100644
index 00000000..3f4d7c36
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderStream/AdcReaderC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+configuration AdcReaderC
+{
+  provides interface ReadStream<uint16_t>;
+}
+
+implementation
+{
+  components new AdcReadStreamClientC(), AdcReaderP;
+
+  ReadStream = AdcReadStreamClientC;
+  AdcReadStreamClientC.AdcConfigure -> AdcReaderP;
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderStream/AdcReaderP.nc b/apps/tests/sam3/adc12b/AdcReaderStream/AdcReaderP.nc
new file mode 100644
index 00000000..bac83253
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderStream/AdcReaderP.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+
+module AdcReaderP
+{
+  provides interface AdcConfigure<const sam3u_adc12_channel_config_t*>;
+}
+
+implementation {
+  const sam3u_adc12_channel_config_t config = {
+  channel: 0,
+  diff: 0,
+  prescal: 2,
+  lowres: 0,
+  shtim: 15,
+  ibctl: 1,
+  sleep: 0,
+  startup: 104,
+  trgen: 0,
+  trgsel: 0
+  };
+
+  async command const sam3u_adc12_channel_config_t* AdcConfigure.getConfiguration() {
+    return &config;
+  }
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderStream/Makefile b/apps/tests/sam3/adc12b/AdcReaderStream/Makefile
new file mode 100644
index 00000000..0359d38a
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderStream/Makefile
@@ -0,0 +1,10 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+
+#CFLAGS += -DSAM3U_ADC12B_PDC
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/adc12b/AdcReaderStream/MoteAppC.nc b/apps/tests/sam3/adc12b/AdcReaderStream/MoteAppC.nc
new file mode 100644
index 00000000..9f549522
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderStream/MoteAppC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC,
+    LedsC, NoLedsC,
+    new TimerMilliC() as TimerC,
+    SerialActiveMessageC,
+    AdcReaderC,
+    LcdC,
+    MoteP;
+             
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> LedsC;
+  MoteP.ReadStream -> AdcReaderC;
+  MoteP.SerialSplitControl -> SerialActiveMessageC;
+  MoteP.Packet -> SerialActiveMessageC;
+  MoteP.Timer -> TimerC;
+  MoteP.Lcd -> LcdC;
+  MoteP.Draw -> LcdC;
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderStream/MoteP.nc b/apps/tests/sam3/adc12b/AdcReaderStream/MoteP.nc
new file mode 100644
index 00000000..79844611
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderStream/MoteP.nc
@@ -0,0 +1,140 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+#include <color.h>
+#include <lcd.h>
+
+#define SAMPLE_BUFFER_SIZE 10000
+#define NUM_SAMPLES_PER_PACKET (TOSH_DATA_LENGTH / sizeof(uint16_t))
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface ReadStream<uint16_t>;
+    interface SplitControl as SerialSplitControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface Lcd;
+    interface Draw;
+  }
+}
+
+implementation
+{
+  uint16_t buf[SAMPLE_BUFFER_SIZE];
+
+  task void clear(){
+    /* Reset the target buffer for the ReadStream interface */
+    uint32_t i;
+    for (i = 0; i < SAMPLE_BUFFER_SIZE; i++) {
+      buf[i] = 0xFFFF;
+    }
+  }
+
+  event void Boot.booted()
+  {
+    post clear();
+    while (call SerialSplitControl.start() != SUCCESS);
+    call Lcd.initialize();
+  }
+
+  event void Lcd.initializeDone(error_t err)
+  {
+    if(err != SUCCESS)
+      {
+      }
+    else
+      {
+        call Draw.fill(COLOR_RED);
+        call Lcd.start();
+      }
+  }
+
+  event void Lcd.startDone(){
+  }
+
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      while (call SerialSplitControl.start() != SUCCESS);
+    }else{
+      call Timer.startPeriodic(5*1024U);
+    }
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {}
+
+  task void sample()
+  {
+    const char *start = "Start Sampling";
+    call Draw.fill(COLOR_BLUE);
+    call Draw.drawString(10,50,start,COLOR_RED);
+ 
+    call ReadStream.postBuffer(buf, SAMPLE_BUFFER_SIZE);
+    call ReadStream.read(100);
+  }
+
+  event void ReadStream.readDone(error_t result, uint32_t usActualPeriod)
+  {
+    if (result != SUCCESS) {
+    }else{
+    }
+  }
+
+  event void ReadStream.bufferDone(error_t result, uint16_t* buffer, uint16_t count) {
+    const char *fail = "Read done error";
+    const char *good = "Read done success";
+    call Leds.led1Toggle();
+    call Draw.fill(COLOR_GREEN);
+    if (result != SUCCESS) {
+      call Draw.drawString(10,70,fail,COLOR_BLACK);
+    }else{
+      call Draw.drawString(10,70,good,COLOR_BLACK);
+      call Draw.drawInt(100,100,buffer[0],1,COLOR_BLACK);
+      call Draw.drawInt(100,160,count,1,COLOR_BLACK);
+    }
+  }
+
+  event void Timer.fired() {
+    call Leds.led0Toggle();
+    post clear();
+    post sample();
+  }
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderStreamPDC/AdcReaderC.nc b/apps/tests/sam3/adc12b/AdcReaderStreamPDC/AdcReaderC.nc
new file mode 100644
index 00000000..3f4d7c36
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderStreamPDC/AdcReaderC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+configuration AdcReaderC
+{
+  provides interface ReadStream<uint16_t>;
+}
+
+implementation
+{
+  components new AdcReadStreamClientC(), AdcReaderP;
+
+  ReadStream = AdcReadStreamClientC;
+  AdcReadStreamClientC.AdcConfigure -> AdcReaderP;
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderStreamPDC/AdcReaderP.nc b/apps/tests/sam3/adc12b/AdcReaderStreamPDC/AdcReaderP.nc
new file mode 100644
index 00000000..410504c0
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderStreamPDC/AdcReaderP.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+
+module AdcReaderP
+{
+  provides interface AdcConfigure<const sam3u_adc12_channel_config_t*>;
+}
+
+implementation {
+  const sam3u_adc12_channel_config_t config = {
+  channel: 0,
+  diff: 0,
+  prescal: 4,
+  lowres: 0,
+  shtim: 15,
+  ibctl: 1,
+  sleep: 0,
+  startup: 104,
+  trgen: 0,
+  trgsel: 0
+  };
+
+  async command const sam3u_adc12_channel_config_t* AdcConfigure.getConfiguration() {
+    return &config;
+  }
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderStreamPDC/Makefile b/apps/tests/sam3/adc12b/AdcReaderStreamPDC/Makefile
new file mode 100644
index 00000000..935806cb
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderStreamPDC/Makefile
@@ -0,0 +1,10 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+
+CFLAGS += -DSAM3U_ADC12B_PDC
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/adc12b/AdcReaderStreamPDC/MoteAppC.nc b/apps/tests/sam3/adc12b/AdcReaderStreamPDC/MoteAppC.nc
new file mode 100644
index 00000000..9f549522
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderStreamPDC/MoteAppC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC,
+    LedsC, NoLedsC,
+    new TimerMilliC() as TimerC,
+    SerialActiveMessageC,
+    AdcReaderC,
+    LcdC,
+    MoteP;
+             
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> LedsC;
+  MoteP.ReadStream -> AdcReaderC;
+  MoteP.SerialSplitControl -> SerialActiveMessageC;
+  MoteP.Packet -> SerialActiveMessageC;
+  MoteP.Timer -> TimerC;
+  MoteP.Lcd -> LcdC;
+  MoteP.Draw -> LcdC;
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderStreamPDC/MoteP.nc b/apps/tests/sam3/adc12b/AdcReaderStreamPDC/MoteP.nc
new file mode 100644
index 00000000..a14d47ba
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderStreamPDC/MoteP.nc
@@ -0,0 +1,139 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC ReadStream with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+#include <color.h>
+#include <lcd.h>
+
+#define SAMPLE_BUFFER_SIZE 10000
+#define NUM_SAMPLES_PER_PACKET (TOSH_DATA_LENGTH / sizeof(uint16_t))
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface ReadStream<uint16_t>;
+    interface SplitControl as SerialSplitControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface Lcd;
+    interface Draw;
+  }
+}
+
+implementation
+{
+  uint16_t buf[SAMPLE_BUFFER_SIZE];
+
+  task void clear(){
+    /* Reset the target buffer for the ReadStream interface */
+    uint32_t i;
+    for (i = 0; i < SAMPLE_BUFFER_SIZE; i++) {
+      buf[i] = 0xFFFF;
+    }
+  }
+
+  event void Boot.booted()
+  {
+    post clear();
+    while (call SerialSplitControl.start() != SUCCESS);
+    call Lcd.initialize();
+  }
+
+  event void Lcd.initializeDone(error_t err)
+  {
+    if(err != SUCCESS)
+      {
+      }
+    else
+      {
+        call Draw.fill(COLOR_RED);
+        call Lcd.start();
+      }
+  }
+
+  event void Lcd.startDone(){
+  }
+
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      while (call SerialSplitControl.start() != SUCCESS);
+    }else{
+      call Timer.startPeriodic(3*1024);
+    }
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {}
+
+  task void sample()
+  {
+    const char *start = "Start Sampling";
+    call Draw.fill(COLOR_BLUE);
+    call Draw.drawString(10,50,start,COLOR_RED);
+    //call Leds.led1Toggle();   
+    call ReadStream.postBuffer(buf, SAMPLE_BUFFER_SIZE);
+    call ReadStream.read(100);
+  }
+
+  event void ReadStream.readDone(error_t result, uint32_t usActualPeriod)
+  {
+    if (result != SUCCESS) {
+    }else{
+    }
+  }
+
+  event void ReadStream.bufferDone(error_t result, uint16_t* buffer, uint16_t count) {
+    const char *fail = "Read done error";
+    const char *good = "Read done success";
+    call Draw.fill(COLOR_GREEN);
+    if (result != SUCCESS) {
+      call Draw.drawString(10,70,fail,COLOR_BLACK);
+    }else{
+      call Draw.drawString(10,70,good,COLOR_BLACK);
+      call Draw.drawInt(100,100,buffer[0],1,COLOR_BLACK);
+      call Draw.drawInt(100,120,buffer[9],1,COLOR_BLACK);
+      call Draw.drawInt(100,160,count,1,COLOR_BLACK);
+    }
+  }
+
+  event void Timer.fired() {
+    post clear();
+    post sample();
+  }
+}
diff --git a/apps/tests/sam3/adc12b/AdcReaderStreamPDC/README b/apps/tests/sam3/adc12b/AdcReaderStreamPDC/README
new file mode 100644
index 00000000..4b570961
--- /dev/null
+++ b/apps/tests/sam3/adc12b/AdcReaderStreamPDC/README
@@ -0,0 +1,9 @@
+12 bit ADC test program for SAM3U with PDC
+
+@author JeongGil Ko <jgko@cs.jhu.edu>
+
+To use PDC with ADC, the sampling rate MUST be controlled by properly
+setting the startup, prescal and lowres registers.
+
+Setting the sam3u_adc12_channel_config_t config can properly set these
+registers.
\ No newline at end of file
diff --git a/apps/tests/sam3/clock/showSpeed/ClockSpeedAppC.nc b/apps/tests/sam3/clock/showSpeed/ClockSpeedAppC.nc
new file mode 100644
index 00000000..ac4e72e4
--- /dev/null
+++ b/apps/tests/sam3/clock/showSpeed/ClockSpeedAppC.nc
@@ -0,0 +1,62 @@
+/** 
+ * Copyright (c) 2009 The Regents of the University of California. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */ 
+
+/**
+ * Basic application that displays the current clock speed on the LCD.
+ *
+ * @author Thomas Schmid
+ **/
+
+configuration ClockSpeedAppC
+{
+}
+implementation
+{
+	components MainC, ClockSpeedC, LedsC;
+
+	ClockSpeedC -> MainC.Boot;
+	ClockSpeedC.Leds -> LedsC;
+
+    components LcdC;
+    ClockSpeedC.Lcd -> LcdC;
+    ClockSpeedC.Draw -> LcdC;
+
+    components HplSam3uClockC;
+
+    ClockSpeedC.HplSam3uClock -> HplSam3uClockC;
+
+    components HplSam3uGeneralIOC;
+    ClockSpeedC.Pck0Pin -> HplSam3uGeneralIOC.HplPioA21;
+
+    components new TimerMilliC() as T1;
+    ClockSpeedC.ChangeTimer -> T1;
+}
diff --git a/apps/tests/sam3/clock/showSpeed/ClockSpeedC.nc b/apps/tests/sam3/clock/showSpeed/ClockSpeedC.nc
new file mode 100644
index 00000000..7d36c861
--- /dev/null
+++ b/apps/tests/sam3/clock/showSpeed/ClockSpeedC.nc
@@ -0,0 +1,177 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ **/
+
+#include <color.h>
+#include <lcd.h>
+#include <sam3upmchardware.h>
+
+module ClockSpeedC
+{
+	uses
+    {
+        interface Leds;
+        interface Boot;
+
+        interface HplSam3uClock;
+
+        interface HplSam3uGeneralIOPin as Pck0Pin;
+
+        interface Timer<TMilli> as ChangeTimer;
+
+        interface Lcd;
+        interface Draw;
+    }
+}
+implementation
+{
+    uint8_t state;
+    uint8_t speed;
+
+    enum {
+        SLOW = 0,
+        MAIN = 1,
+        PLLA = 2,
+        MASTER = 4,
+    };
+
+    enum {
+        RC12,
+        MC48,
+        MC84,
+    };
+
+	event void Boot.booted()
+	{
+        pmc_pck_t pck0 = PMC->pck0;
+        pmc_scer_t scer = PMC->scer;
+
+        state = SLOW;
+        speed = RC12;
+
+        // output slow clock on PCK0
+        pck0.bits.css = SLOW;
+        PMC->pck0 = pck0;
+
+        scer.bits.pck0 = 1;
+        PMC->scer = scer;
+
+        call Lcd.initialize();
+
+        call Pck0Pin.disablePioControl();
+        call Pck0Pin.selectPeripheralB(); // output programmable clock 0 on pin
+	}
+
+    event void Lcd.initializeDone(error_t err)
+    {
+        if(err != SUCCESS)
+        {
+            call Leds.led1On();
+        }
+        else
+        {
+            call Draw.fill(COLOR_WHITE);
+            call Lcd.start();
+        }
+    }
+
+    event void Lcd.startDone()
+    {
+        call Leds.led0On();
+        call Draw.drawString(10, 10, "Init Clock:", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 30, call HplSam3uClock.getMainClockSpeed(), 1, COLOR_BLACK);
+        call HplSam3uClock.mckInit84();
+        call ChangeTimer.startPeriodic(10000);
+    }
+
+    event void ChangeTimer.fired()
+    {
+        pmc_pck_t pck0 = PMC->pck0;
+        call Draw.fill(COLOR_WHITE);
+
+        call Draw.drawString(10, 50, "MCK Speed:", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 70, call HplSam3uClock.getMainClockSpeed(), 1, COLOR_BLACK);
+
+        switch(state)
+        {
+            case SLOW:
+                pck0.bits.css = state;
+                PMC->pck0 = pck0;
+                call Draw.drawString(10, 90, "Slow Clock on PA21", COLOR_BLACK);
+                state = MAIN;
+                break;
+            case MAIN:
+                pck0.bits.css = state;
+                PMC->pck0 = pck0;
+                call Draw.drawString(10, 90, "Main Clock on PA21", COLOR_BLACK);
+                state = PLLA;
+                break;
+            case PLLA:
+                pck0.bits.css = state;
+                PMC->pck0 = pck0;
+                call Draw.drawString(10, 90, "PLLA Clock on PA21", COLOR_BLACK);
+                state = MASTER;
+                break;
+            case MASTER:
+                pck0.bits.css = state;
+                PMC->pck0 = pck0;
+                call Draw.drawString(10, 90, "Master Clock on PA21", COLOR_BLACK);
+                state = SLOW;
+                switch(speed)
+                {
+                    case RC12:
+                        call Draw.drawString(10, 10, "RC12 Clock:", COLOR_BLACK);
+                        call HplSam3uClock.mckInit12RC();
+                        speed = MC48;
+                        break;
+                    case MC48:
+                        call Draw.drawString(10, 10, "MC48 Clock:", COLOR_BLACK);
+                        call HplSam3uClock.mckInit84();
+                        speed = MC84;
+                        break;
+                    case MC84:
+                        call Draw.drawString(10, 10, "MC84 Clock:", COLOR_BLACK);
+                        call HplSam3uClock.mckInit48();
+                        speed = RC12;
+                        break;
+                }
+                break;
+        }
+    }
+
+    async event void HplSam3uClock.mainClockChanged()
+    {
+    }
+}
diff --git a/apps/tests/sam3/clock/showSpeed/Makefile b/apps/tests/sam3/clock/showSpeed/Makefile
new file mode 100644
index 00000000..4b9c5eb9
--- /dev/null
+++ b/apps/tests/sam3/clock/showSpeed/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=ClockSpeedAppC
+include $(MAKERULES)
diff --git a/apps/tests/sam3/dac/README b/apps/tests/sam3/dac/README
new file mode 100644
index 00000000..c27340ef
--- /dev/null
+++ b/apps/tests/sam3/dac/README
@@ -0,0 +1,8 @@
+These test applications generate a tone on the two DAC outputs. The tone can
+be observed on PB13 and PB14, or on the headset output with a
+loudspeaker/headphones. Carefull, some of the tones are LOUD!
+
+timer: This application uses a timer to trigger the samples being sent to
+the DAC.
+
+fast: This application writes as fast as it can to the DAC in a busy loop.
diff --git a/apps/tests/sam3/dac/fast/DacAppC.nc b/apps/tests/sam3/dac/fast/DacAppC.nc
new file mode 100644
index 00000000..794420c2
--- /dev/null
+++ b/apps/tests/sam3/dac/fast/DacAppC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * DACC Demo application for the Sam3s. We generate a sine wave that can be
+ * observed on both DAC0 (PB13) and DAC1 (PB14).
+ *
+ * @author Thomas Schmid
+ */
+
+configuration DacAppC
+{
+}
+implementation
+{
+  components MainC, DacC, LedsC, NoLedsC;
+
+  DacC -> MainC.Boot;
+
+  DacC.Leds -> LedsC;
+
+  components Sam3sDacC;
+  DacC.DacControl -> Sam3sDacC;
+  DacC.Dac -> Sam3sDacC;
+}
+
diff --git a/apps/tests/sam3/dac/fast/DacC.nc b/apps/tests/sam3/dac/fast/DacC.nc
new file mode 100644
index 00000000..c9da9cf3
--- /dev/null
+++ b/apps/tests/sam3/dac/fast/DacC.nc
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ *
+ * @author Thomas Schmid
+ */
+
+#include "Timer.h"
+
+module DacC @safe()
+{
+  uses 
+  {
+    interface Leds;
+    interface Boot;
+
+    interface StdControl as DacControl;
+    interface Sam3sDac as Dac;
+  }
+}
+implementation
+{
+#define SAMPLES 100
+
+  const int16_t sine_data[SAMPLES]=
+  {
+    0x0,   0x080, 0x100, 0x17f, 0x1fd, 0x278, 0x2f1, 0x367, 0x3da, 0x449,
+    0x4b3, 0x519, 0x579, 0x5d4, 0x629, 0x678, 0x6c0, 0x702, 0x73c, 0x76f,
+    0x79b, 0x7bf, 0x7db, 0x7ef, 0x7fb, 0x7ff, 0x7fb, 0x7ef, 0x7db, 0x7bf,
+    0x79b, 0x76f, 0x73c, 0x702, 0x6c0, 0x678, 0x629, 0x5d4, 0x579, 0x519,
+    0x4b3, 0x449, 0x3da, 0x367, 0x2f1, 0x278, 0x1fd, 0x17f, 0x100, 0x080,
+
+    -0x0, -0x080, -0x100, -0x17f, -0x1fd, -0x278, -0x2f1, -0x367,  -0x3da, -0x449,
+    -0x4b3, -0x519, -0x579, -0x5d4, -0x629, -0x678, -0x6c0, -0x702, -0x73c, -0x76f,
+    -0x79b, -0x7bf, -0x7db, -0x7ef, -0x7fb, -0x7ff, -0x7fb, -0x7ef, -0x7db, -0x7bf,
+    -0x79b, -0x76f, -0x73c, -0x702, -0x6c0, -0x678, -0x629, -0x5d4, -0x579, -0x519,
+    -0x4b3, -0x449, -0x3da, -0x367, -0x2f1, -0x278, -0x1fd, -0x17f, -0x100, -0x080
+  };
+
+  uint8_t index = 0;
+
+  event void Boot.booted()
+  {
+    uint32_t data;
+    uint32_t d0;
+    uint32_t d1;
+    call DacControl.start();
+    call Dac.configure(
+        0, // enable external trigger mode
+        0, // select trigger source
+        1, // 1: word transfer, 0: half-word
+        0, // 1: sleep mode, 0: normal mode
+        0, // fast wakeup
+        1, // refresh period = 1024 * REFRESH/DACC Clock
+        0, // select channel
+        1, // 1: bits 13-12 in data select channel
+        0, // 1: max speed mode enabled
+        8);
+
+    call Dac.enable(0);
+    call Dac.enable(1);
+    
+    while(1)
+    {
+
+      d0 = sine_data[index] * 1024 / (1<<11) + (1 << 11);
+      d1 = sine_data[(index+SAMPLES/4)%SAMPLES] * 1024 / (1<<11) + (1 << 11);
+      // format: <ch><data><ch><data>
+      data = (((0 << 12) + d0) << 16) + ((1 << 12) + d1);
+      call Leds.led0Toggle();
+      if(call Dac.set(data) == SUCCESS)
+      {
+        call Leds.led1Toggle();
+        index++;
+        if(index >= SAMPLES)
+        {
+          index = 0;
+        }
+      }
+    }
+  }
+}
+
diff --git a/apps/tests/sam3/dac/fast/Makefile b/apps/tests/sam3/dac/fast/Makefile
new file mode 100644
index 00000000..dbaefb95
--- /dev/null
+++ b/apps/tests/sam3/dac/fast/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=DacAppC
+include $(MAKERULES)
+
diff --git a/apps/tests/sam3/dac/timer/DacAppC.nc b/apps/tests/sam3/dac/timer/DacAppC.nc
new file mode 100644
index 00000000..f62974a0
--- /dev/null
+++ b/apps/tests/sam3/dac/timer/DacAppC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * DACC Demo application for the Sam3s. We generate a sine wave that can be
+ * observed on both DAC0 (PB13) and DAC1 (PB14).
+ *
+ * @author Thomas Schmid
+ */
+
+configuration DacAppC
+{
+}
+implementation
+{
+  components MainC, DacC, LedsC, NoLedsC;
+  components new AlarmTMicro16C() as Alarm;
+
+  DacC -> MainC.Boot;
+
+  DacC.Alarm -> Alarm;
+  DacC.Leds -> LedsC;
+
+  components Sam3sDacC;
+  DacC.DacControl -> Sam3sDacC;
+  DacC.Dac -> Sam3sDacC;
+}
+
diff --git a/apps/tests/sam3/dac/timer/DacC.nc b/apps/tests/sam3/dac/timer/DacC.nc
new file mode 100644
index 00000000..9fd245ba
--- /dev/null
+++ b/apps/tests/sam3/dac/timer/DacC.nc
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ *
+ * @author Thomas Schmid
+ */
+
+#include "Timer.h"
+
+module DacC @safe()
+{
+  uses 
+  {
+    interface Alarm<TMicro,uint16_t> as Alarm;
+    interface Leds;
+    interface Boot;
+
+    interface StdControl as DacControl;
+    interface Sam3sDac as Dac;
+  }
+}
+implementation
+{
+#define SAMPLES 100
+
+  const int16_t sine_data[SAMPLES]=
+  {
+    0x0,   0x080, 0x100, 0x17f, 0x1fd, 0x278, 0x2f1, 0x367, 0x3da, 0x449,
+    0x4b3, 0x519, 0x579, 0x5d4, 0x629, 0x678, 0x6c0, 0x702, 0x73c, 0x76f,
+    0x79b, 0x7bf, 0x7db, 0x7ef, 0x7fb, 0x7ff, 0x7fb, 0x7ef, 0x7db, 0x7bf,
+    0x79b, 0x76f, 0x73c, 0x702, 0x6c0, 0x678, 0x629, 0x5d4, 0x579, 0x519,
+    0x4b3, 0x449, 0x3da, 0x367, 0x2f1, 0x278, 0x1fd, 0x17f, 0x100, 0x080,
+
+    -0x0, -0x080, -0x100, -0x17f, -0x1fd, -0x278, -0x2f1, -0x367,  -0x3da, -0x449,
+    -0x4b3, -0x519, -0x579, -0x5d4, -0x629, -0x678, -0x6c0, -0x702, -0x73c, -0x76f,
+    -0x79b, -0x7bf, -0x7db, -0x7ef, -0x7fb, -0x7ff, -0x7fb, -0x7ef, -0x7db, -0x7bf,
+    -0x79b, -0x76f, -0x73c, -0x702, -0x6c0, -0x678, -0x629, -0x5d4, -0x579, -0x519,
+    -0x4b3, -0x449, -0x3da, -0x367, -0x2f1, -0x278, -0x1fd, -0x17f, -0x100, -0x080
+  };
+
+  uint8_t index = 0;
+
+  event void Boot.booted()
+  {
+    call DacControl.start();
+    call Dac.configure(
+        0, // enable external trigger mode
+        0, // select trigger source
+        1, // 1: word transfer, 0: half-word
+        0, // 1: sleep mode, 0: normal mode
+        0, // fast wakeup
+        1, // refresh period = 1024 * REFRESH/DACC Clock
+        0, // select channel
+        1, // 1: bits 15-13 in data select channel
+        0, // 1: max speed mode enabled
+        8);
+
+    call Dac.enable(0);
+    call Dac.enable(1);
+
+    call Alarm.start(100);
+  }
+
+  async event void Alarm.fired()
+  {
+    uint32_t data;
+    uint32_t d0 = sine_data[index] * 1024 / (1<<11) + (1 << 11);
+    uint32_t d1 = sine_data[(index+SAMPLES/4)%SAMPLES] * 1024 / (1<<11) + (1 << 11);
+    call Leds.led0Toggle();
+    // format: <ch><data><ch><data>
+    data = (((0 << 12) + d0) << 16) + ((1 << 12) + d1);
+    call Dac.set(data);
+    index++;
+    if(index >= SAMPLES)
+    {
+      index = 0;
+    }
+    call Alarm.start(100);
+  }
+}
+
diff --git a/apps/tests/sam3/dac/timer/Makefile b/apps/tests/sam3/dac/timer/Makefile
new file mode 100644
index 00000000..dbaefb95
--- /dev/null
+++ b/apps/tests/sam3/dac/timer/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=DacAppC
+include $(MAKERULES)
+
diff --git a/apps/tests/sam3/dma/Makefile b/apps/tests/sam3/dma/Makefile
new file mode 100644
index 00000000..c92111cd
--- /dev/null
+++ b/apps/tests/sam3/dma/Makefile
@@ -0,0 +1,9 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+#CFLAGS+=-I$(TOSDIR)/lib/printf
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/dma/MoteAppC.nc b/apps/tests/sam3/dma/MoteAppC.nc
new file mode 100644
index 00000000..3f0e8ae5
--- /dev/null
+++ b/apps/tests/sam3/dma/MoteAppC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC Read with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC,
+    LedsC, NoLedsC,
+    new TimerMilliC() as TimerC,
+    SerialActiveMessageC,
+    LcdC,
+    Sam3uDmaC,
+    HplNVICC,
+    HplSam3uClockC,
+    MoteP;
+             
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> LedsC;
+  MoteP.SerialSplitControl -> SerialActiveMessageC;
+  MoteP.Packet -> SerialActiveMessageC;
+  MoteP.Timer -> TimerC;
+
+  MoteP.Dma -> Sam3uDmaC.Channel0;
+  MoteP.DMAControl -> Sam3uDmaC;
+
+  MoteP.Lcd -> LcdC;
+  MoteP.Draw -> LcdC;
+}
diff --git a/apps/tests/sam3/dma/MoteP.nc b/apps/tests/sam3/dma/MoteP.nc
new file mode 100644
index 00000000..88eb2d52
--- /dev/null
+++ b/apps/tests/sam3/dma/MoteP.nc
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+
+#include "sam3uDmahardware.h"
+#include "sam3updchardware.h"
+#include "sam3uadc12bhardware.h"
+#include "sam3umatrixhardware.h"
+#include <color.h>
+#include <lcd.h>
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface SplitControl as SerialSplitControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface Lcd;
+    interface Draw;
+    interface Sam3uDmaControl as DMAControl;
+    interface Sam3uDmaChannel as Dma;
+  }
+}
+
+implementation{
+
+  uint16_t msg = 48;
+  uint16_t msg2 = 0;
+  uint8_t channel = 0;
+
+  task void setup();
+  task void tx();
+
+  event void Boot.booted(){
+    call Lcd.initialize();
+    call DMAControl.init();
+    call DMAControl.setArbitor(TRUE);
+    post setup();
+    post tx();
+    call Timer.startPeriodic(1024);
+  }
+
+  event void Lcd.initializeDone(error_t err){
+    if(err != SUCCESS){
+    }else{
+      call Draw.fill(COLOR_GREEN);
+      call Lcd.start();
+    }
+  }
+  
+
+  uint8_t tmp_s = 88;
+  uint8_t tmp_d = 0;
+  
+  task void setup(){    
+    call Dma.setupTransfer(0, (uint32_t*)&tmp_s, (uint32_t*)&tmp_d, 1 , 0, 0, 0, 0, 1, 1, 0, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
+    //post tx();
+  }
+
+  task void tx(){
+    call Draw.fill(COLOR_WHITE);
+    call Draw.drawInt(100,80,tmp_s,1,COLOR_RED);
+    call Draw.drawInt(150,80,tmp_d,1,COLOR_RED);
+
+    tmp_d = 0;
+
+    call Leds.led1Toggle();
+
+    call Dma.startTransfer(0);
+    call Draw.drawInt(100,100,tmp_s,1,COLOR_RED);
+    call Draw.drawInt(150,100,tmp_d,1,COLOR_RED);
+  }
+
+  task void repeat(){
+    call Draw.fill(COLOR_WHITE);
+    call Draw.drawInt(100,80,tmp_s,1,COLOR_RED);
+    call Draw.drawInt(150,80,tmp_d,1,COLOR_RED);
+    tmp_s++;
+    tmp_d = 0;
+    call Draw.drawInt(100,100,tmp_s,1,COLOR_RED);
+    call Draw.drawInt(150,100,tmp_d,1,COLOR_RED);
+
+    call Leds.led1Toggle();
+
+    call Dma.repeatTransfer((uint32_t*)&tmp_s, (uint32_t*)&tmp_d, 1, 0);
+  }
+  async event void Dma.transferDone(error_t success){
+    call Leds.led0Toggle();
+  }
+
+  event void Timer.fired() {
+    post repeat();
+  }
+
+  event void Lcd.startDone(){}
+  event void SerialSplitControl.startDone(error_t error){}
+  event void SerialSplitControl.stopDone(error_t error) {}
+}
diff --git a/apps/tests/sam3/eefc/erase/Makefile b/apps/tests/sam3/eefc/erase/Makefile
new file mode 100644
index 00000000..a456966f
--- /dev/null
+++ b/apps/tests/sam3/eefc/erase/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=MoteAppC
+include $(MAKERULES)
diff --git a/apps/tests/sam3/eefc/erase/MoteAppC.nc b/apps/tests/sam3/eefc/erase/MoteAppC.nc
new file mode 100644
index 00000000..03108ded
--- /dev/null
+++ b/apps/tests/sam3/eefc/erase/MoteAppC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+#include "AT91SAM3U4.h"
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC;
+  components MoteP;
+  components LedsC;
+  
+  components new HplSam3uEefcC((uint32_t)AT91C_BASE_EFC1, AT91C_IFLASH1,
+                               AT91C_IFLASH1_PAGE_SIZE, AT91C_IFLASH1_SIZE) as IFlash;
+
+  MainC.SoftwareInit -> IFlash;
+
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> LedsC;
+  MoteP.IFlash -> IFlash;
+}
diff --git a/apps/tests/sam3/eefc/erase/MoteP.nc b/apps/tests/sam3/eefc/erase/MoteP.nc
new file mode 100644
index 00000000..17546852
--- /dev/null
+++ b/apps/tests/sam3/eefc/erase/MoteP.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface HplSam3uEefc as IFlash;
+    interface Leds;
+  }
+}
+implementation {
+
+  event void Boot.booted() {
+    call IFlash.erase();
+    call Leds.led1On();
+  }
+}
+
diff --git a/apps/tests/sam3/eefc/read_write/Makefile b/apps/tests/sam3/eefc/read_write/Makefile
new file mode 100644
index 00000000..299fff9c
--- /dev/null
+++ b/apps/tests/sam3/eefc/read_write/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=MoteAppC
+#BOOTLOADER=tosboot
+include $(MAKERULES)
diff --git a/apps/tests/sam3/eefc/read_write/MoteAppC.nc b/apps/tests/sam3/eefc/read_write/MoteAppC.nc
new file mode 100644
index 00000000..d1ccdd81
--- /dev/null
+++ b/apps/tests/sam3/eefc/read_write/MoteAppC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+#include "AT91SAM3U4.h"
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC;
+  components Sam3uEefcC;
+  components LedsC;
+  components new MoteP((uint32_t)AT91C_IFLASH0);
+  MoteP.IFlash -> Sam3uEefcC.InternalFlash0;
+  
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> LedsC;
+}
diff --git a/apps/tests/sam3/eefc/read_write/MoteP.nc b/apps/tests/sam3/eefc/read_write/MoteP.nc
new file mode 100644
index 00000000..d7b41a7e
--- /dev/null
+++ b/apps/tests/sam3/eefc/read_write/MoteP.nc
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+generic module MoteP(uint32_t base_addr)
+{
+  uses {
+    interface Boot;
+    interface InternalFlash as IFlash;
+    interface Leds;
+  }
+}
+implementation {
+
+  __attribute__((noinline)) void verySimpleTest() {
+    #define BUFFER0_SIZE 256
+  
+    uint8_t buf[BUFFER0_SIZE];
+    uint8_t *addr;
+    uint16_t size;
+    int i;
+    for(i=0; i<BUFFER0_SIZE; i++) {
+      buf[i] = (uint8_t)i;
+    }
+
+    addr = (uint8_t*)base_addr + 0x1000;
+    size = BUFFER0_SIZE;
+    call IFlash.write(addr, buf, size);
+    for(i=0; i<size; i++) {
+      if(addr[i] != (uint8_t)i) {
+        call Leds.led0On();
+        while(1);
+      }
+    }
+  }
+  __attribute__((noinline)) void simpleTest() {
+    #define RELATIVE_ADDR 455
+    #define NUM_PAGES 9
+    #define PAGE_OFFSET 34
+    #define BUFFER1_SIZE (NUM_PAGES*AT91C_IFLASH1_PAGE_SIZE - PAGE_OFFSET)
+  
+    uint8_t buf[BUFFER1_SIZE];
+    uint8_t *addr;
+    uint16_t size;
+    int i;
+    for(i=0; i<BUFFER1_SIZE; i++) {
+      buf[i] = (uint8_t)i;
+    }
+
+    addr = (uint8_t*)base_addr + 0x10000 + RELATIVE_ADDR;
+    size = BUFFER1_SIZE;
+    call IFlash.write(addr, buf, size);
+    for(i=0; i<size; i++) {
+      if(addr[i] != (uint8_t)i) {
+        call Leds.led0On();
+        while(1);
+      }
+    }
+  }
+
+  __attribute__((noinline)) void testBootArgs() {
+    typedef struct BootArgs {
+      uint16_t  address;
+      uint32_t imageAddr;
+      uint8_t  gestureCount;
+      bool     noReprogram;
+    } BootArgs;
+    #define TOSBOOT_ARGS_ADDR AT91C_IFLASH1
+
+    error_t e;
+    BootArgs bootArgs;
+    BootArgs *iflashArgs = (BootArgs*)TOSBOOT_ARGS_ADDR;
+
+    atomic {
+      call IFlash.read((uint8_t*)iflashArgs, &bootArgs, sizeof(bootArgs));
+
+      bootArgs.imageAddr = 25;//imgAddr;
+      bootArgs.gestureCount = 0xff;
+      bootArgs.noReprogram = FALSE;
+      bootArgs.address = 100;//TOS_NODE_ID;
+
+      call IFlash.write((uint8_t*)iflashArgs, &bootArgs, sizeof(bootArgs));
+      e = (bootArgs.imageAddr != iflashArgs->imageAddr);
+      e = ecombine(e, bootArgs.gestureCount != iflashArgs->gestureCount);
+      e = ecombine(e, bootArgs.address != iflashArgs->address);
+      e = ecombine(e, bootArgs.noReprogram != iflashArgs->noReprogram);
+      if(e) {
+          call Leds.led0On();
+          while(1);
+      }
+    }
+  }
+
+  event void Boot.booted() {
+    verySimpleTest();
+//    simpleTest();
+//    testBootArgs();
+    call Leds.led1On();
+  }
+}
+
diff --git a/apps/tests/sam3/hsmci/fatfs/Makefile b/apps/tests/sam3/hsmci/fatfs/Makefile
new file mode 100644
index 00000000..62d81882
--- /dev/null
+++ b/apps/tests/sam3/hsmci/fatfs/Makefile
@@ -0,0 +1,9 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+CFLAGS += -I$(TOSDIR)/lib/printf
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/hsmci/fatfs/MoteAppC.nc b/apps/tests/sam3/hsmci/fatfs/MoteAppC.nc
new file mode 100644
index 00000000..c5c3568e
--- /dev/null
+++ b/apps/tests/sam3/hsmci/fatfs/MoteAppC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's SD Card Implementation with FatFS
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC;
+  components MoteP;
+  components FatFsC;
+  components LedsC;
+
+  MoteP.Boot -> MainC;
+  MoteP.FatFs ->FatFsC;
+  MoteP.Leds -> LedsC;
+}
+
diff --git a/apps/tests/sam3/hsmci/fatfs/MoteP.nc b/apps/tests/sam3/hsmci/fatfs/MoteP.nc
new file mode 100644
index 00000000..d830a9fd
--- /dev/null
+++ b/apps/tests/sam3/hsmci/fatfs/MoteP.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2010 CSIRO
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's HSMCI HPL interface
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+#include "sam3uhsmcihardware.h"
+#include "FatFs.h"
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface FatFs;
+    interface Leds;
+  }
+}
+
+implementation
+{
+  FATFS fs;
+  DIR dp;
+  FIL fp;
+
+  #define BUF_SIZE 1024
+  uint8_t buf[BUF_SIZE];
+  uint bytes_written;
+
+  event void Boot.booted() {
+    int i;
+    for(i=0; i<BUF_SIZE; i++)
+      buf[i] = i;
+
+    call FatFs.mount(&fs);
+    call FatFs.mkdir("/data");
+    call FatFs.fopen(&fp, "/data/sample.dat", (FA_OPEN_ALWAYS | FA_WRITE | FA_READ));
+    call FatFs.fwrite(&fp, (uint8_t *)buf, BUF_SIZE, &bytes_written);
+    call FatFs.fsync(&fp);
+    call FatFs.fclose(&fp);
+    call Leds.led0On();
+  }
+
+  async event void FatFs.mediaUnavailable() {
+  }
+  async event void FatFs.mediaAvailable() {
+  }
+}
diff --git a/apps/tests/sam3/hsmci/hil/Makefile b/apps/tests/sam3/hsmci/hil/Makefile
new file mode 100644
index 00000000..62d81882
--- /dev/null
+++ b/apps/tests/sam3/hsmci/hil/Makefile
@@ -0,0 +1,9 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+CFLAGS += -I$(TOSDIR)/lib/printf
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/hsmci/hil/MoteAppC.nc b/apps/tests/sam3/hsmci/hil/MoteAppC.nc
new file mode 100644
index 00000000..9bef03d8
--- /dev/null
+++ b/apps/tests/sam3/hsmci/hil/MoteAppC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2010 CSIRO
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's HSMCI HPL interface
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+#include <sam3uhsmcihardware.h>
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC;
+  components MoteP;
+  components Sam3uHsmciC;
+  components LedsC;
+
+  enum {
+    RESOURCE_ID = unique(SAM3U_HSMCI_RESOURCE)
+  };
+
+  MoteP.Boot -> MainC;
+  MoteP.Resource -> Sam3uHsmciC.Resource[RESOURCE_ID];
+  MoteP.Sam3uHsmciInit -> Sam3uHsmciC.Sam3uHsmciInit;
+  MoteP.Sam3uHsmci -> Sam3uHsmciC.Sam3uHsmci[RESOURCE_ID];
+  MoteP.Leds -> LedsC;
+}
diff --git a/apps/tests/sam3/hsmci/hil/MoteP.nc b/apps/tests/sam3/hsmci/hil/MoteP.nc
new file mode 100644
index 00000000..18efb1fe
--- /dev/null
+++ b/apps/tests/sam3/hsmci/hil/MoteP.nc
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2010 CSIRO
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's HSMCI HPL interface
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+#include "sam3uhsmcihardware.h"
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Resource;
+    interface Sam3uHsmciInit;
+    interface Sam3uHsmci;
+    interface Leds;
+  }
+}
+
+implementation
+{
+  #define NUM_BLOCKS 1000
+  #define WORDS_PER_BLOCK 128
+
+  norace int next_block = 0;
+  norace uint32_t tx_buf[WORDS_PER_BLOCK];
+  norace uint32_t rx_buf[WORDS_PER_BLOCK];
+
+  event void Boot.booted() {
+    int i;
+    for(i=0; i<WORDS_PER_BLOCK; i++)
+      tx_buf[i] = i;
+    call Resource.request();
+  }
+  
+  event void Resource.granted() {
+    call Sam3uHsmciInit.init();
+  }
+
+  async event void Sam3uHsmciInit.initDone(error_t error) {
+    if(error == SUCCESS) {
+      call Leds.led2On();
+      call Sam3uHsmci.writeBlock(next_block, tx_buf);
+    }
+  }
+
+  async event void Sam3uHsmci.writeBlockDone(uint32_t *buf, error_t error) {
+    int i;
+    if(error != SUCCESS)
+      call Leds.led0On();
+    for(i=0; i<WORDS_PER_BLOCK; i++)
+      rx_buf[i] = 0;
+    call Resource.release();
+    call Resource.immediateRequest();
+    call Sam3uHsmci.readBlock(next_block, rx_buf);
+  }
+
+  async event void Sam3uHsmci.readBlockDone(uint32_t *buf, error_t error) {
+    int i, busted = FALSE;
+    for(i=0; i<WORDS_PER_BLOCK; i++) {
+      if(rx_buf[i] != i)
+        busted = TRUE;
+    }
+
+    next_block++;
+    if(busted)
+      call Leds.led0On();
+    else if(next_block == NUM_BLOCKS)
+      call Leds.led1On();
+    else {
+      call Resource.release();
+      call Resource.immediateRequest();
+      call Sam3uHsmci.writeBlock(next_block, tx_buf);
+    }
+  }
+}
+
diff --git a/apps/tests/sam3/hsmci/hpl/Makefile b/apps/tests/sam3/hsmci/hpl/Makefile
new file mode 100644
index 00000000..62d81882
--- /dev/null
+++ b/apps/tests/sam3/hsmci/hpl/Makefile
@@ -0,0 +1,9 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+CFLAGS += -I$(TOSDIR)/lib/printf
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/hsmci/hpl/MoteAppC.nc b/apps/tests/sam3/hsmci/hpl/MoteAppC.nc
new file mode 100644
index 00000000..7bca152e
--- /dev/null
+++ b/apps/tests/sam3/hsmci/hpl/MoteAppC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2010 CSIRO
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's HSMCI HPL interface
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC;
+  components MoteP;
+  components HplSam3uHsmciC;
+  components LedsC;
+  components BusyWaitMicroC;
+
+  MoteP.Boot -> MainC;
+  MoteP.AsyncStdControl -> HplSam3uHsmciC;
+  MoteP.HplSam3uHsmci -> HplSam3uHsmciC;
+  MoteP.Leds -> LedsC;
+  MoteP.BusyWait -> BusyWaitMicroC;
+}
diff --git a/apps/tests/sam3/hsmci/hpl/MoteP.nc b/apps/tests/sam3/hsmci/hpl/MoteP.nc
new file mode 100644
index 00000000..770821aa
--- /dev/null
+++ b/apps/tests/sam3/hsmci/hpl/MoteP.nc
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2010 CSIRO
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's HSMCI HPL interface
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+#include "sam3uhsmcihardware.h"
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface AsyncStdControl;
+    interface HplSam3uHsmci;
+    interface Leds;
+    interface BusyWait<TMicro, uint16_t>;
+  }
+}
+
+implementation
+{
+  #define NUM_BLOCKS 1000
+  #define WORDS_PER_BLOCK 128
+
+  enum {
+    SD_STANDARD_CAP,
+    SD_HIGHEXT_CAP,
+  };
+
+  norace int next_block = 0;
+  norace int block_multiplier = 512;
+  norace int card_type = SD_STANDARD_CAP;
+  uint16_t card_size = 0;
+
+  norace uint32_t rca_addr;
+  norace uint32_t trans_buf[WORDS_PER_BLOCK];
+  uint32_t *trans_buf_ptr;
+
+  event void Boot.booted() {
+    int i;
+    call AsyncStdControl.start();
+    trans_buf_ptr = trans_buf;
+    call HplSam3uHsmci.init(&trans_buf_ptr);
+    for(i=0; i<WORDS_PER_BLOCK; i++) {
+      trans_buf[i] = i;
+    }
+  }
+
+  async event void HplSam3uHsmci.initDone(hsmci_sd_r6_t* rsp, error_t error) {
+    if(error == SUCCESS) {
+      rca_addr = rsp->rca << 16;
+      call HplSam3uHsmci.sendCommand(CMD9, rca_addr);
+    }
+  }
+
+  async event void* HplSam3uHsmci.sendCommandDone(uint8_t cmd, void* rsp, error_t error) {
+    if(error == SUCCESS) {
+      switch(cmd) {
+        case CMD9:
+        {
+          hsmci_sd_r2_t *r2 = (hsmci_sd_r2_t*)rsp;
+          card_type = r2->csd.csd_structure;
+          block_multiplier = card_type ? 1 : 512;
+          //TODO: compute the card size so one can query it
+          call HplSam3uHsmci.sendCommand(CMD7, rca_addr);
+          break;
+        }
+        case CMD7:
+          call HplSam3uHsmci.sendCommand(ACMD6, 2);
+          break;
+        case ACMD6:
+          call Leds.led2Toggle();
+          call HplSam3uHsmci.sendCommand(CMD16, 512);
+          break;
+        case CMD16:
+          call HplSam3uHsmci.sendCommand(CMD24, next_block*block_multiplier);
+          break;
+        case CMD24:
+          break;
+        case CMD17:
+          break;
+        default:
+      }
+    }
+    return rsp;
+  }
+
+  async event void HplSam3uHsmci.txDone(error_t error) {
+    int i;
+    if(error != SUCCESS)
+      call Leds.led0On();
+    for(i=0; i<WORDS_PER_BLOCK; i++)
+      trans_buf[i] = 0;
+    call HplSam3uHsmci.sendCommand(CMD17, next_block*block_multiplier);
+  }
+
+  async event void HplSam3uHsmci.rxDone(error_t error) {
+    int i, busted = FALSE;
+    for(i=0; i<WORDS_PER_BLOCK; i++) {
+      if(trans_buf[i] != i)
+        busted = TRUE;
+    }
+
+    next_block++;
+    if(busted)
+      call Leds.led0On();
+    else if(next_block == NUM_BLOCKS)
+      call Leds.led1On();
+    else {
+      call HplSam3uHsmci.sendCommand(CMD24, next_block*block_multiplier);
+    }
+  }
+}
+
diff --git a/apps/tests/sam3/hsmci/sd/Makefile b/apps/tests/sam3/hsmci/sd/Makefile
new file mode 100644
index 00000000..62d81882
--- /dev/null
+++ b/apps/tests/sam3/hsmci/sd/Makefile
@@ -0,0 +1,9 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+CFLAGS += -I$(TOSDIR)/lib/printf
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/hsmci/sd/MoteAppC.nc b/apps/tests/sam3/hsmci/sd/MoteAppC.nc
new file mode 100644
index 00000000..8d19080d
--- /dev/null
+++ b/apps/tests/sam3/hsmci/sd/MoteAppC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's SD Card Implementation
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+#include <sam3uhsmcihardware.h>
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC;
+  components MoteP;
+  components SDC;
+  components LedsC;
+
+  MoteP.Boot -> MainC;
+  MoteP.StdControl -> SDC;
+  MoteP.SD -> SDC.SD;
+  MoteP.Leds -> LedsC;
+}
+
diff --git a/apps/tests/sam3/hsmci/sd/MoteP.nc b/apps/tests/sam3/hsmci/sd/MoteP.nc
new file mode 100644
index 00000000..7569da07
--- /dev/null
+++ b/apps/tests/sam3/hsmci/sd/MoteP.nc
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2010 CSIRO
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's HSMCI HPL interface
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+#include "sam3uhsmcihardware.h"
+#include "printf.h"
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface StdControl;
+    interface SD;
+    interface Leds;
+  }
+}
+
+implementation
+{
+  #define NUM_BLOCKS 1000
+  #define BYTES_PER_BLOCK 512
+
+  int next_block = 0;
+  uint8_t tx_buf[BYTES_PER_BLOCK];
+  uint8_t rx_buf[BYTES_PER_BLOCK];
+
+  task void writeTask();
+  task void readTask();
+
+  event void Boot.booted() {
+    int i;
+    uint32_t size;
+    for(i=0; i<BYTES_PER_BLOCK; i++)
+      tx_buf[i] = i;
+    call StdControl.start();
+    size = call SD.readCardSize();
+    printf("card_size: %u\n", size);
+    printfflush();
+  }
+
+  task void writeTask() {
+    int i;
+    error_t error = call SD.writeBlock(next_block, tx_buf);
+
+    if(error != SUCCESS)
+      call Leds.led0On();
+    for(i=0; i<BYTES_PER_BLOCK; i++)
+      rx_buf[i] = 0;
+    post readTask();
+  }
+
+  task void readTask() {
+    int i, busted = FALSE;
+    call SD.readBlock(next_block, rx_buf);
+
+    for(i=0; i<BYTES_PER_BLOCK; i++) {
+      if(rx_buf[i] != (uint8_t)i) {
+        busted = TRUE;
+      }
+    }
+
+    next_block++;
+    if(busted)
+      call Leds.led0On();
+    else if(next_block == NUM_BLOCKS)
+      call Leds.led1On();
+    else {
+      post writeTask();
+    }
+  }
+
+  async event void SD.available() {
+    call Leds.led2On();
+    post writeTask();
+  }
+  
+  async event void SD.unavailable() {
+  }
+}
+
diff --git a/apps/tests/sam3/lcd/Makefile b/apps/tests/sam3/lcd/Makefile
new file mode 100644
index 00000000..c1ad6262
--- /dev/null
+++ b/apps/tests/sam3/lcd/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=TestLcdAppC
+include $(MAKERULES)
diff --git a/apps/tests/sam3/lcd/TestLcdAppC.nc b/apps/tests/sam3/lcd/TestLcdAppC.nc
new file mode 100644
index 00000000..2308648f
--- /dev/null
+++ b/apps/tests/sam3/lcd/TestLcdAppC.nc
@@ -0,0 +1,59 @@
+/** 
+ * Copyright (c) 2009 The Regents of the University of California. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */ 
+
+/**
+ * Basic application that tests the SAM3U-EK's LCD.
+ *
+ * @author Thomas Schmid
+ **/
+
+configuration TestLcdAppC
+{
+}
+implementation
+{
+	components MainC, TestLcdC, LedsC;
+
+	TestLcdC -> MainC.Boot;
+	TestLcdC.Leds -> LedsC;
+
+    components LcdC;
+    TestLcdC.Lcd -> LcdC;
+    TestLcdC.Draw -> LcdC;
+
+    components new TimerMilliC() as T0;
+    TestLcdC.ChangeTimer -> T0;
+
+    components RandomC;
+    TestLcdC.Random -> RandomC;
+
+}
diff --git a/apps/tests/sam3/lcd/TestLcdC.nc b/apps/tests/sam3/lcd/TestLcdC.nc
new file mode 100644
index 00000000..7f3e92df
--- /dev/null
+++ b/apps/tests/sam3/lcd/TestLcdC.nc
@@ -0,0 +1,160 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ **/
+
+#include <color.h>
+#include <lcd.h>
+
+module TestLcdC
+{
+	uses
+    {
+        interface Timer<TMilli> as ChangeTimer;
+        interface Leds;
+        interface Boot;
+
+        interface Random;
+
+        interface Lcd;
+        interface Draw;
+    }
+}
+implementation
+{
+    enum {
+        RED,
+        GREEN,
+        BLUE,
+        WHITE,
+        STRING,
+        RAND,
+    };
+    uint8_t state;
+    uint8_t backgrnd;
+
+	event void Boot.booted()
+	{
+        state = RED;
+        backgrnd = 0;
+
+        call Lcd.initialize();
+	}
+
+    event void Lcd.initializeDone(error_t err)
+    {
+        if(err != SUCCESS)
+        {
+            call Leds.led1On();
+        }
+        else
+        {
+            call Draw.fill(COLOR_RED);
+            call Lcd.start();
+        }
+    }
+
+    event void Lcd.startDone()
+    {
+        call Leds.led0On();
+        call ChangeTimer.startPeriodic(1024);
+    }
+
+    event void ChangeTimer.fired()
+    {
+        switch(state)
+        {
+            case RED:
+                call Draw.fill(COLOR_RED);
+                state = GREEN;
+                break;
+            case GREEN:
+                call Draw.fill(COLOR_GREEN);
+                state = BLUE;
+                break;
+            case BLUE:
+                call Draw.fill(COLOR_BLUE);
+                state = WHITE;
+                break;
+            case WHITE:
+                call Draw.fill(COLOR_WHITE);
+                state = STRING;
+                break;
+            case STRING: 
+                {
+                    const char *hi = "Hello World";
+                    const char *l1 = "I am running";
+                    const char *l2 = "the SAM3U port";
+                    const char *l3 = "of TinyOS!";
+                    const char *l4 = "wiki.github.com/";
+                    const char *l5 = "tschmid/tinyos-2.x";
+
+                    call ChangeTimer.stop();
+                    call Draw.fill(COLOR_WHITE);
+                
+                    call Draw.drawString(10, 50, hi, COLOR_RED);
+                    call Draw.drawString(10, 70, l1, COLOR_ORANGE);
+                    call Draw.drawString(10, 90, l2, COLOR_BLUE);
+                    call Draw.drawString(10, 110, l3, COLOR_NAVY);
+                    call Draw.drawString(10, 170, l4, COLOR_BLACK);
+                    call Draw.drawString(10, 190, l5, COLOR_BLACK);
+                    call Draw.drawInt(BOARD_LCD_WIDTH-20, 210, 123456789L, 1, COLOR_BLACK);
+                    call Draw.drawInt(BOARD_LCD_WIDTH-20, 230, 987654321L, -1, COLOR_BLACK);
+
+                    call ChangeTimer.startOneShot(10000);
+
+                    state = RAND;
+                    break;
+                }
+            case RAND:
+                {
+                    uint32_t x;
+
+
+                    for (x=0; x<10*BOARD_LCD_WIDTH*BOARD_LCD_HEIGHT; x++)
+                    {
+                        uint32_t r = call Random.rand32();
+
+                        call Draw.drawPixel((r & 0x0000FFFF)%BOARD_LCD_WIDTH, ((r >> 16) & 0x0000FFFF)%BOARD_LCD_HEIGHT, r%COLOR_WHITE);
+                    }
+                    call ChangeTimer.startPeriodic(1024);
+
+                    state = RED;
+                    break;
+
+                }
+        }
+
+    }
+}
diff --git a/apps/tests/sam3/mpu/TestMpuProtection/Makefile b/apps/tests/sam3/mpu/TestMpuProtection/Makefile
new file mode 100644
index 00000000..e3dbc85b
--- /dev/null
+++ b/apps/tests/sam3/mpu/TestMpuProtection/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=TestMpuProtectionAppC
+include $(MAKERULES)
diff --git a/apps/tests/sam3/mpu/TestMpuProtection/TestMpuProtectionAppC.nc b/apps/tests/sam3/mpu/TestMpuProtection/TestMpuProtectionAppC.nc
new file mode 100644
index 00000000..021eb6e6
--- /dev/null
+++ b/apps/tests/sam3/mpu/TestMpuProtection/TestMpuProtectionAppC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic application to test thread isolation.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ **/
+
+configuration TestMpuProtectionAppC
+{
+}
+implementation
+{
+	components MainC, TestMpuProtectionC, LedsC;
+	components new ThreadC(0x200) as Thread0;
+	components new ThreadC(0x200) as Thread1;
+
+	TestMpuProtectionC -> MainC.Boot;
+	TestMpuProtectionC.Leds -> LedsC;
+	TestMpuProtectionC.Thread0 -> Thread0;
+	TestMpuProtectionC.Thread1 -> Thread1;
+}
diff --git a/apps/tests/sam3/mpu/TestMpuProtection/TestMpuProtectionC.nc b/apps/tests/sam3/mpu/TestMpuProtection/TestMpuProtectionC.nc
new file mode 100644
index 00000000..3f00cc42
--- /dev/null
+++ b/apps/tests/sam3/mpu/TestMpuProtection/TestMpuProtectionC.nc
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic application to test thread isolation.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ **/
+
+// Depending on if MPU protection is enabled or not, thread 1 will be able to
+// write to thread 0's data or not, and, therefore, after LED 0 lights up, either
+// LED 1 should light up (not protected) or LED 2 (red) should light up (protected)
+
+typedef struct
+{
+	uint32_t word1;
+	uint32_t word2;
+	uint32_t word3;
+	uint32_t word4;
+	uint32_t word5;
+	uint32_t word6;
+	uint32_t word7;
+	uint32_t word8;
+} struct32bytes;
+
+module TestMpuProtectionC
+{
+	uses interface Leds;
+	uses interface Boot;
+	uses interface Thread as Thread0;
+	uses interface Thread as Thread1;
+}
+implementation
+{
+	// does not normally have to be volatile, but here it does
+	// so that the compiler does not optimize the artificial check
+	// for manipulation in the test case
+	volatile struct32bytes data0 __attribute__((section(".bssthread0"))); // belongs to thread 0
+
+	volatile struct32bytes data1 __attribute__((section(".bssthread1"))); // belongs to thread 1
+
+	void fatal();
+
+	void wait() {
+		volatile unsigned int i; 
+		for (i = 0; i < 1000000; i++);
+	}  
+
+	event void Boot.booted()
+	{
+		call Thread0.start(NULL);
+		call Thread1.start(NULL);
+	}
+
+	event void Thread0.run(void* arg)
+	{
+		// initialize own data
+		data0.word1 = 1;
+		data0.word2 = 1;
+		data0.word3 = 1;
+		data0.word4 = 1;
+		data0.word5 = 1;
+		data0.word6 = 1;
+		data0.word7 = 1;
+		data0.word8 = 1;
+
+		// check if data has been manipulated
+		while (1) {
+			if (data0.word1 != 1) {
+				call Leds.led1On(); // LED 1 (green): data has been manipulated
+			}
+		}
+	}
+
+	event void Thread1.run(void* arg)
+	{
+		volatile uint32_t i;
+
+		for (i = 0; i < 4; i++) {
+			// wait for some time
+			wait();
+		}
+
+		// then manipulate foreign data
+		call Leds.led0On(); // LED 0 (green): manipulation attempt about to happen
+		data0.word1 = 2;
+
+		while (1); // wait forever
+	}
+
+	void fatal()
+	{
+		while (1) {
+			volatile int i;
+			for (i = 0; i < 100000; i++);
+			call Leds.led2Toggle(); // Led 2 (red) blinking: fatal
+		}
+	}
+}
diff --git a/apps/tests/sam3/mpu/TestMpuProtectionSyscall/Makefile b/apps/tests/sam3/mpu/TestMpuProtectionSyscall/Makefile
new file mode 100644
index 00000000..323d765f
--- /dev/null
+++ b/apps/tests/sam3/mpu/TestMpuProtectionSyscall/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestMpuProtectionSyscallAppC
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/universal
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/mpu/TestMpuProtectionSyscall/TestMpuProtectionSyscallAppC.nc b/apps/tests/sam3/mpu/TestMpuProtectionSyscall/TestMpuProtectionSyscallAppC.nc
new file mode 100644
index 00000000..070cb777
--- /dev/null
+++ b/apps/tests/sam3/mpu/TestMpuProtectionSyscall/TestMpuProtectionSyscallAppC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic app to test thread isolation with system calls.
+ * Based on Kevin's TestSineSensorAppC.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+configuration TestMpuProtectionSyscallAppC
+{
+}
+implementation
+{
+	components MainC, TestMpuProtectionSyscallC;
+	components new ThreadC(0x200) as Thread0;
+
+	components new BlockingSineSensorC();
+	components BlockingSerialActiveMessageC;
+	components new BlockingSerialAMSenderC(228);
+
+	MainC.Boot <- TestMpuProtectionSyscallC;
+	MainC.SoftwareInit -> BlockingSineSensorC;
+	TestMpuProtectionSyscallC.Thread0 -> Thread0;
+	TestMpuProtectionSyscallC.BlockingRead -> BlockingSineSensorC;
+	TestMpuProtectionSyscallC.AMControl -> BlockingSerialActiveMessageC;
+	TestMpuProtectionSyscallC.BlockingAMSend -> BlockingSerialAMSenderC;
+	//TestMpuProtectionSyscallC.Packet -> BlockingSerialAMSenderC;
+
+	components LedsC;
+	TestMpuProtectionSyscallC.Leds -> LedsC;
+}
diff --git a/apps/tests/sam3/mpu/TestMpuProtectionSyscall/TestMpuProtectionSyscallC.nc b/apps/tests/sam3/mpu/TestMpuProtectionSyscall/TestMpuProtectionSyscallC.nc
new file mode 100644
index 00000000..31015966
--- /dev/null
+++ b/apps/tests/sam3/mpu/TestMpuProtectionSyscall/TestMpuProtectionSyscallC.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic app to test thread isolation with system calls.
+ * Based on Kevin's TestSineSensorAppC.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+module TestMpuProtectionSyscallC
+{
+	uses
+	{
+		interface Boot;
+		interface Thread as Thread0;
+		interface BlockingRead<uint16_t>;
+		interface BlockingStdControl as AMControl;
+		interface BlockingAMSend;
+		//interface Packet;
+		interface Leds;
+	}
+}
+implementation
+{
+	void wait() {
+		volatile unsigned int i;  
+		for (i = 0; i < 1000000; i++);
+	}   
+
+	event void Boot.booted()
+	{
+		call Thread0.start(NULL);
+	}
+
+	event void Thread0.run(void* arg)
+	{
+		uint16_t* var = NULL;
+		message_t msg;
+		//var = call Packet.getPayload(&msg, sizeof(uint16_t));
+
+		while( call AMControl.start() != SUCCESS );    
+		for(;;){
+			while( call BlockingRead.read(var) != SUCCESS );
+			while( call BlockingAMSend.send(AM_BROADCAST_ADDR, &msg, sizeof(uint16_t)) != SUCCESS );
+			call Leds.led0Toggle();
+			wait();
+		}
+	}
+}
diff --git a/apps/tests/sam3/pdc/Makefile b/apps/tests/sam3/pdc/Makefile
new file mode 100644
index 00000000..c92111cd
--- /dev/null
+++ b/apps/tests/sam3/pdc/Makefile
@@ -0,0 +1,9 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+#CFLAGS+=-I$(TOSDIR)/lib/printf
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/pdc/MoteAppC.nc b/apps/tests/sam3/pdc/MoteAppC.nc
new file mode 100644
index 00000000..10f66279
--- /dev/null
+++ b/apps/tests/sam3/pdc/MoteAppC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's 12 bit ADC Read with LCD
+ * @author Chieh-Jan Mike Liang
+ * @author JeongGil Ko
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC,
+    LedsC, NoLedsC,
+    new TimerMilliC() as TimerC,
+    SerialActiveMessageC,
+    LcdC,
+    Sam3uDmaC,
+    HplNVICC,
+    HplSam3uClockC,
+    HplSam3uPdcC,
+    MoteP;
+
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> LedsC;
+  MoteP.SerialSplitControl -> SerialActiveMessageC;
+  MoteP.Packet -> SerialActiveMessageC;
+  MoteP.Timer -> TimerC;
+
+  //MoteP.ClockControl -> HplSam3uClockC.DBGUPPCntl;
+  //MoteP.PDC -> HplSam3uPdcC.UartPdcControl;
+
+  MoteP.ClockControl -> HplSam3uClockC.TWI0PPCntl;
+  MoteP.PDC -> HplSam3uPdcC.Twi0PdcControl;
+
+  MoteP.Lcd -> LcdC;
+  MoteP.Draw -> LcdC;
+}
diff --git a/apps/tests/sam3/pdc/MoteP.nc b/apps/tests/sam3/pdc/MoteP.nc
new file mode 100644
index 00000000..aa3cffe1
--- /dev/null
+++ b/apps/tests/sam3/pdc/MoteP.nc
@@ -0,0 +1,160 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This example validates that the values for the PDC registers are correctly written
+ *
+ * @author JeongGil Ko
+ */
+
+
+#include "sam3uDmahardware.h"
+#include "sam3updchardware.h"
+#include "sam3uadc12bhardware.h"
+#include "sam3umatrixhardware.h"
+#include <color.h>
+#include <lcd.h>
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface SplitControl as SerialSplitControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface Lcd;
+    interface Draw;
+    interface HplSam3uPdc as PDC;
+    interface HplSam3uPeripheralClockCntl as ClockControl;
+  }
+}
+
+implementation{
+
+  uint16_t msg = 48;
+  uint16_t msg2 = 0;
+  uint8_t channel = 0;
+  uint32_t addr = 0;
+
+  task void setup();
+  task void tx();
+
+  event void Boot.booted()
+  {
+    call Lcd.initialize();
+    call ClockControl.enable();
+    call Timer.startPeriodic(1024);
+  }
+
+  event void Lcd.initializeDone(error_t err)
+  {
+    if(err != SUCCESS)
+      {
+      }
+    else
+      {
+	call Draw.fill(COLOR_GREEN);
+	call Lcd.start();
+      }
+  }
+
+  event void Lcd.startDone(){
+  }
+
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      while (call SerialSplitControl.start() != SUCCESS);
+    }else{
+    }
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {}
+
+  uint8_t tmp_s = 88;
+  uint8_t tmp_d = 0;
+  
+  task void setup(){    
+    post tx();
+  }
+  uint8_t temp = 99;
+  uint8_t temp_d = 0;
+  bool status;
+
+  enum {
+    UART_BASE = 0x400E0600,
+    USART0_BASE = 0x40090000,
+    USART1_BASE = 0x40094000,
+    USART2_BASE = 0x40098000,
+    USART3_BASE = 0x4009C000,
+    TWI0_BASE = 0x40084000,
+    TWI1_BASE = 0x40088000,
+    PWM_BASE = 0x4008C000
+  };
+
+  task void tx()
+  {
+    volatile periph_rpr_t* RPR = (volatile periph_rpr_t*) (TWI0_BASE + 0x100);
+    volatile periph_rcr_t* RCR = (volatile periph_rcr_t*) (TWI0_BASE + 0x104);
+    volatile periph_tpr_t* TPR = (volatile periph_tpr_t*)  (TWI0_BASE + 0x108);
+    volatile periph_tcr_t* TCR = (volatile periph_tcr_t*)  (TWI0_BASE + 0x10C);
+    volatile periph_ptcr_t* PTCR = (volatile periph_ptcr_t*) (TWI0_BASE + 0x120);
+    volatile periph_ptsr_t* PTSR = (volatile periph_ptsr_t*)  (TWI0_BASE + 0x124);
+
+    call PDC.setRxPtr((uint32_t*)&temp);
+    call PDC.setTxPtr((uint32_t*)&temp_d);
+    call PDC.setTxCounter(10);
+    call PDC.setRxCounter(10);
+    call PDC.enablePdcRx();
+
+    call Draw.fill(COLOR_WHITE);
+    call Leds.led1Toggle();
+    call Draw.drawInt(180,10,RPR->bits.rxptr,1,COLOR_BLUE);
+    call Draw.drawInt(180,30,(uint32_t)&temp,1,COLOR_RED);
+    call Draw.drawInt(180,50,TPR->bits.txptr,1,COLOR_BLUE);
+    call Draw.drawInt(180,70,(uint32_t)&temp_d,1,COLOR_GREEN);
+    call Draw.drawInt(100,90,RCR->bits.rxctr,1,COLOR_RED);
+    call Draw.drawInt(100,110,TCR->bits.txctr,1,COLOR_RED);
+    call Draw.drawInt(100,130,PTCR->bits.rxten,1,COLOR_RED);
+    call Draw.drawInt(100,150,PTSR->bits.rxten,1,COLOR_RED);
+
+    /*For testing*/
+    ADC12B->mr.bits.startup = 104;
+    call Draw.drawInt(100,210,ADC12B->mr.bits.startup,1,COLOR_BLUE);
+  }
+
+  event void Timer.fired() {
+    post tx();
+  }
+
+}
diff --git a/apps/tests/sam3/pin/capture/Makefile b/apps/tests/sam3/pin/capture/Makefile
new file mode 100644
index 00000000..0952672d
--- /dev/null
+++ b/apps/tests/sam3/pin/capture/Makefile
@@ -0,0 +1,5 @@
+COMPONENT=TestCaptureAppC
+
+CFLAGS += -I$(TOSDIR)/lib/printf
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/pin/capture/TestCaptureAppC.nc b/apps/tests/sam3/pin/capture/TestCaptureAppC.nc
new file mode 100644
index 00000000..38786fff
--- /dev/null
+++ b/apps/tests/sam3/pin/capture/TestCaptureAppC.nc
@@ -0,0 +1,67 @@
+/** 
+ * Copyright (c) 2009 The Regents of the University of California. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */ 
+
+/**
+ * Basic application that tests the SAM3U Captures. Connect a switch to PA1
+ * and watch the LCD for rising/falling time measurements. 
+ *
+ * @author Thomas Schmid
+ **/
+
+configuration TestCaptureAppC
+{
+}
+implementation
+{
+	components MainC, TestCaptureC, LedsC, LcdC;
+
+	TestCaptureC -> MainC.Boot;
+	TestCaptureC.Leds -> LedsC;
+    TestCaptureC.Lcd -> LcdC;
+    TestCaptureC.Draw -> LcdC;
+
+    components HplSam3uGeneralIOC as GeneralIOC;
+    components HplSam3uTCC;
+    components new GpioCaptureC() as CaptureSFDC;
+
+    CaptureSFDC.TCCapture -> HplSam3uTCC.TC0Capture;
+    CaptureSFDC.GeneralIO -> GeneralIOC.HplPioA1;
+
+    TestCaptureC.Capture -> CaptureSFDC;
+    TestCaptureC.SFD -> GeneralIOC.PioA1;
+
+    components new Alarm32khz32C();
+
+    TestCaptureC.InitAlarm -> Alarm32khz32C;
+    TestCaptureC.Alarm32 -> Alarm32khz32C;
+
+}
diff --git a/apps/tests/sam3/pin/capture/TestCaptureC.nc b/apps/tests/sam3/pin/capture/TestCaptureC.nc
new file mode 100644
index 00000000..79796bdd
--- /dev/null
+++ b/apps/tests/sam3/pin/capture/TestCaptureC.nc
@@ -0,0 +1,123 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ **/
+
+#include <color.h>
+#include <lcd.h>
+
+module TestCaptureC
+{
+	uses 
+    {
+        interface Leds;
+        interface Boot;
+        interface Lcd;
+        interface Draw;
+
+        interface GpioCapture as Capture;
+        interface GeneralIO as SFD;
+
+        interface Init as InitAlarm;
+        interface Alarm<T32khz,uint32_t> as Alarm32;
+    } 
+}
+implementation
+{
+    bool falling;
+    uint32_t lastTime;
+
+	event void Boot.booted()
+	{
+        atomic lastTime = 0;
+
+        call InitAlarm.init();
+
+        call Lcd.initialize();
+    }
+
+    event void Lcd.initializeDone(error_t result)
+    {
+        if(result != SUCCESS)
+        {
+            call Leds.led0On();
+        } else {
+            call Draw.fill(COLOR_WHITE);
+            call Lcd.start();
+        }
+    }
+
+    event void Lcd.startDone()
+    {
+        atomic falling = TRUE;
+        call SFD.makeInput();
+        call Capture.captureRisingEdge();
+        call Draw.drawString(10, 10, "Rising on PA0", COLOR_BLACK);
+	}
+
+    async event void Capture.captured(uint16_t time)
+    {
+        uint32_t now = (call Alarm32.getNow() & 0xFFFF0000L) + time;
+        call Draw.fill(COLOR_WHITE);
+        call Leds.led0Toggle();
+
+        atomic
+        {
+            if(falling)
+            {
+                call Draw.drawString(10, 10, "Rising at:", COLOR_BLACK);
+                call Draw.drawInt(BOARD_LCD_WIDTH - 10, 30, now, 1, COLOR_BLACK);
+                call Draw.drawString(10, 50, "Since last:", COLOR_BLACK);
+                call Draw.drawInt(BOARD_LCD_WIDTH - 10, 70, now-lastTime, 1, COLOR_BLACK);
+
+                falling = FALSE;
+                call Capture.captureFallingEdge();
+            } else {
+                call Draw.drawString(10, 10, "Falling at:", COLOR_BLACK);
+                call Draw.drawInt(BOARD_LCD_WIDTH - 10, 30, now, 1, COLOR_BLACK);
+                call Draw.drawString(10, 50, "Since last:", COLOR_BLACK);
+                call Draw.drawInt(BOARD_LCD_WIDTH - 10, 70, now-lastTime, 1, COLOR_BLACK);
+
+                falling = TRUE;
+                call Capture.captureRisingEdge();
+            }
+            lastTime = now;
+        }
+    }
+
+
+    async event void Alarm32.fired() {}
+
+
+}
diff --git a/apps/tests/sam3/pin/interrupt/Makefile b/apps/tests/sam3/pin/interrupt/Makefile
new file mode 100644
index 00000000..dcd587f2
--- /dev/null
+++ b/apps/tests/sam3/pin/interrupt/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=TestInterruptAppC
+include $(MAKERULES)
diff --git a/apps/tests/sam3/pin/interrupt/TestInterruptAppC.nc b/apps/tests/sam3/pin/interrupt/TestInterruptAppC.nc
new file mode 100644
index 00000000..981c100b
--- /dev/null
+++ b/apps/tests/sam3/pin/interrupt/TestInterruptAppC.nc
@@ -0,0 +1,55 @@
+/** 
+ * Copyright (c) 2009 The Regents of the University of California. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */ 
+
+/**
+ * Basic application that tests the SAM3U Interrupts. It toggles LED0 and LED1
+ * by pushing the "left" and "right" button on the SAM3U EK devkit.
+ *
+ * @author Thomas Schmid
+ **/
+
+configuration TestInterruptAppC
+{
+}
+implementation
+{
+	components MainC, TestInterruptC, LedsC;
+
+	TestInterruptC -> MainC.Boot;
+	TestInterruptC.Leds -> LedsC;
+
+    components HplSam3uGeneralIOC;
+    TestInterruptC.GpioInterruptLeft -> HplSam3uGeneralIOC.InterruptPioA18;
+    TestInterruptC.ButtonLeft -> HplSam3uGeneralIOC.HplPioA18;
+    TestInterruptC.GpioInterruptRight -> HplSam3uGeneralIOC.InterruptPioA19;
+    TestInterruptC.ButtonRight -> HplSam3uGeneralIOC.HplPioA19;
+}
diff --git a/apps/tests/sam3/pin/interrupt/TestInterruptC.nc b/apps/tests/sam3/pin/interrupt/TestInterruptC.nc
new file mode 100644
index 00000000..0fe5bdb9
--- /dev/null
+++ b/apps/tests/sam3/pin/interrupt/TestInterruptC.nc
@@ -0,0 +1,73 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ **/
+
+module TestInterruptC
+{
+	uses interface Leds;
+	uses interface Boot;
+    uses interface GpioInterrupt as GpioInterruptLeft;
+    uses interface HplSam3uGeneralIOPin as ButtonLeft;
+    uses interface GpioInterrupt as GpioInterruptRight;
+    uses interface HplSam3uGeneralIOPin as ButtonRight;
+}
+implementation
+{
+
+	event void Boot.booted()
+	{
+
+        //call ButtonLeft.enablePioControl();
+        //call ButtonRight.enablePioControl();
+
+        // schematic demands that we pull up the pins!
+        call ButtonLeft.enablePullUpResistor();
+        call ButtonRight.enablePullUpResistor();
+
+        call GpioInterruptLeft.enableFallingEdge();
+        call GpioInterruptRight.enableFallingEdge();
+
+	}
+
+    async event void GpioInterruptLeft.fired()
+    {
+        call Leds.led0Toggle(); 
+    }
+
+    async event void GpioInterruptRight.fired()
+    {
+        call Leds.led1Toggle(); 
+    }
+}
diff --git a/apps/tests/sam3/spi/Makefile b/apps/tests/sam3/spi/Makefile
new file mode 100644
index 00000000..43643b7e
--- /dev/null
+++ b/apps/tests/sam3/spi/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=TestSpiAppC
+include $(MAKERULES)
diff --git a/apps/tests/sam3/spi/TestSpiAppC.nc b/apps/tests/sam3/spi/TestSpiAppC.nc
new file mode 100644
index 00000000..8f0cc8f4
--- /dev/null
+++ b/apps/tests/sam3/spi/TestSpiAppC.nc
@@ -0,0 +1,59 @@
+/** 
+ * Copyright (c) 2009 The Regents of the University of California. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */ 
+
+/**
+ * Basic application that tests the SAM3U SPI.
+ *
+ * @author Thomas Schmid
+ **/
+
+configuration TestSpiAppC
+{
+}
+implementation
+{
+	components MainC, TestSpiC, LedsC;
+
+	TestSpiC -> MainC.Boot;
+	TestSpiC.Leds -> LedsC;
+
+	components HilSam3uSpiC;
+	TestSpiC.SpiControl -> HilSam3uSpiC;
+	TestSpiC.SpiByte -> HilSam3uSpiC;
+    TestSpiC.SpiPacket -> HilSam3uSpiC;
+    TestSpiC.CSN -> HilSam3uSpiC;
+    //components HplSam3uGeneralIOC;
+    //TestSpiC.CSN -> HplSam3uGeneralIOC.PioA16;
+
+    components HplSam3uSpiC;
+    TestSpiC.SpiConfig -> HplSam3uSpiC;
+}
diff --git a/apps/tests/sam3/spi/TestSpiC.nc b/apps/tests/sam3/spi/TestSpiC.nc
new file mode 100644
index 00000000..92d77973
--- /dev/null
+++ b/apps/tests/sam3/spi/TestSpiC.nc
@@ -0,0 +1,127 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ **/
+
+module TestSpiC
+{
+	uses interface Leds;
+	uses interface Boot;
+	uses interface StdControl as SpiControl;
+	uses interface SpiByte;
+    uses interface SpiPacket;
+    uses interface GeneralIO as CSN;
+    uses interface HplSam3uSpiConfig as SpiConfig;
+}
+implementation
+{
+    task void transferPacketTask()
+    {
+        uint8_t tx_buf[10];
+        uint8_t rx_buf[10];
+        uint8_t i;
+
+        for(i=0; i<10; i++)
+        {
+            tx_buf[i] = 0xCD;
+            rx_buf[i] = 0;
+        }
+
+        call SpiControl.start();
+
+        call CSN.clr();
+        call SpiPacket.send(tx_buf, rx_buf, 10);
+    }
+
+	task void transferTask()
+	{
+		uint8_t byte;
+
+		call SpiControl.start();
+        call CSN.clr();
+        
+        byte = call SpiByte.write(0xCD);
+        if(byte == 0xCD)
+        {
+            call Leds.led0Toggle();
+        } else {
+            call Leds.led1Toggle();
+        }
+        byte = call SpiByte.write(0xAB);
+        if(byte == 0xAB)
+        {
+            call Leds.led0Toggle();
+        } else {
+            call Leds.led1Toggle();
+        }
+        call CSN.set();
+
+        call SpiControl.stop();
+
+        post transferPacketTask();
+        //post transferTask();
+	}
+
+	event void Boot.booted()
+	{
+
+        call SpiConfig.enableLoopBack();
+        call CSN.makeOutput();
+
+		post transferTask();
+	}
+
+    async event void SpiPacket.sendDone(uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error)
+    {
+        uint8_t i;
+
+        if(error == SUCCESS)
+        {
+            if(len == 10)
+            {
+                for(i=0; i<10; i++){
+                    if(rx_buf[i] != 0xCD)
+                    {
+                        call Leds.led1Toggle();
+                        return;
+                    }
+                }
+                call Leds.led0Toggle();
+                return;
+            }
+        }
+        call Leds.led1Toggle();
+        //call CSN.set();
+    }
+}
diff --git a/apps/tests/sam3/timer/Alarm32khz/Makefile b/apps/tests/sam3/timer/Alarm32khz/Makefile
new file mode 100644
index 00000000..30240ea7
--- /dev/null
+++ b/apps/tests/sam3/timer/Alarm32khz/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=TestAlarm32khzAppC
+include $(MAKERULES)
diff --git a/apps/tests/sam3/timer/Alarm32khz/TestAlarm32khzAppC.nc b/apps/tests/sam3/timer/Alarm32khz/TestAlarm32khzAppC.nc
new file mode 100644
index 00000000..a7a1b149
--- /dev/null
+++ b/apps/tests/sam3/timer/Alarm32khz/TestAlarm32khzAppC.nc
@@ -0,0 +1,56 @@
+/** 
+ * Copyright (c) 2009 The Regents of the University of California. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */ 
+
+/**
+ * Basic application that generates an alarm, blinks LEDs, and displays the
+ * current alarm on the LCD.
+ *
+ * @author Thomas Schmid
+ **/
+
+configuration TestAlarm32khzAppC
+{
+}
+implementation
+{
+	components MainC, TestAlarm32khzP, LedsC;
+
+	TestAlarm32khzP -> MainC.Boot;
+	TestAlarm32khzP.Leds -> LedsC;
+
+    components LcdC;
+    TestAlarm32khzP.Lcd -> LcdC;
+    TestAlarm32khzP.Draw -> LcdC;
+
+    components new Alarm32khz32C() as Alarm32;
+    TestAlarm32khzP.Alarm -> Alarm32;
+}
diff --git a/apps/tests/sam3/timer/Alarm32khz/TestAlarm32khzP.nc b/apps/tests/sam3/timer/Alarm32khz/TestAlarm32khzP.nc
new file mode 100644
index 00000000..3f76a9e6
--- /dev/null
+++ b/apps/tests/sam3/timer/Alarm32khz/TestAlarm32khzP.nc
@@ -0,0 +1,113 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ **/
+
+#include <color.h>
+#include <lcd.h>
+
+module TestAlarm32khzP
+{
+	uses
+    {
+        interface Leds;
+        interface Boot;
+
+        interface Lcd;
+        interface Draw;
+
+        interface Alarm<T32khz,uint32_t>;
+    }
+}
+implementation
+{
+    uint32_t delta = 32768;
+
+	event void Boot.booted()
+	{
+        call Lcd.initialize();
+	}
+
+    event void Lcd.initializeDone(error_t err)
+    {
+        if(err != SUCCESS)
+        {
+            call Leds.led0On();
+            call Leds.led1On();
+            call Leds.led2On();
+        }
+        else
+        {
+            call Draw.fill(COLOR_WHITE);
+            call Lcd.start();
+        }
+    }
+
+    event void Lcd.startDone()
+    {
+        uint32_t now = call Alarm.getNow();
+
+        call Leds.led0Off();
+        call Leds.led1Off();
+        call Leds.led2Off();
+
+
+        call Draw.fill(COLOR_WHITE);
+        call Draw.drawString(10, 10, "AlarmTest:", COLOR_BLACK);
+        call Draw.drawString(10, 50, "Now: ", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 50, now, 1, COLOR_BLACK);
+        call Draw.drawString(10, 70, "Alarm: ", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 70, now+delta, 1, COLOR_BLACK);
+   
+        call Alarm.startAt(now, delta);
+    }
+
+
+    async event void Alarm.fired()
+    {
+        uint32_t now = call Alarm.getNow();
+
+        call Draw.fill(COLOR_WHITE);
+        call Draw.drawString(10, 10, "AlarmTest:", COLOR_BLACK);
+        call Draw.drawString(10, 50, "Now: ", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 50, now, 1, COLOR_BLACK);
+        call Draw.drawString(10, 70, "Err: ", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 70, now - call Alarm.getAlarm(), 1, COLOR_BLACK);
+        call Draw.drawString(10, 90, "Next: ", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 90, now+delta, 1, COLOR_BLACK);
+   
+        call Alarm.startAt(now, delta);
+    }
+
+}
diff --git a/apps/tests/sam3/timer/AlarmTMicro/Makefile b/apps/tests/sam3/timer/AlarmTMicro/Makefile
new file mode 100644
index 00000000..c6283925
--- /dev/null
+++ b/apps/tests/sam3/timer/AlarmTMicro/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=TestAlarmTMicroAppC
+include $(MAKERULES)
diff --git a/apps/tests/sam3/timer/AlarmTMicro/TestAlarmTMicroAppC.nc b/apps/tests/sam3/timer/AlarmTMicro/TestAlarmTMicroAppC.nc
new file mode 100644
index 00000000..976d47fc
--- /dev/null
+++ b/apps/tests/sam3/timer/AlarmTMicro/TestAlarmTMicroAppC.nc
@@ -0,0 +1,59 @@
+/** 
+ * Copyright (c) 2009 The Regents of the University of California. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */ 
+
+/**
+ * Basic application that generates an alarm, blinks LEDs, and displays the
+ * current alarm on the LCD.
+ *
+ * @author Thomas Schmid
+ **/
+
+configuration TestAlarmTMicroAppC
+{
+}
+implementation
+{
+	components MainC, TestAlarmTMicroP, LedsC;
+
+	TestAlarmTMicroP -> MainC.Boot;
+	TestAlarmTMicroP.Leds -> LedsC;
+
+    components LcdC;
+    TestAlarmTMicroP.Lcd -> LcdC;
+    TestAlarmTMicroP.Draw -> LcdC;
+
+    components new AlarmTMicro32C() as Alarm32;
+    TestAlarmTMicroP.Alarm -> Alarm32;
+
+    components HilSam3uTCCounterTMicroC as HilCounter;
+    TestAlarmTMicroP.HilCounter -> HilCounter;
+}
diff --git a/apps/tests/sam3/timer/AlarmTMicro/TestAlarmTMicroP.nc b/apps/tests/sam3/timer/AlarmTMicro/TestAlarmTMicroP.nc
new file mode 100644
index 00000000..cd5e3aa9
--- /dev/null
+++ b/apps/tests/sam3/timer/AlarmTMicro/TestAlarmTMicroP.nc
@@ -0,0 +1,123 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ **/
+
+#include <color.h>
+#include <lcd.h>
+
+module TestAlarmTMicroP
+{
+	uses
+    {
+        interface Leds;
+        interface Boot;
+
+        interface Lcd;
+        interface Draw;
+
+        interface Alarm<TMicro,uint32_t>;
+
+        interface HplSam3uTCChannel as HilCounter;
+    }
+}
+implementation
+{
+    uint32_t delta = 1e6;
+
+	event void Boot.booted()
+	{
+        call Lcd.initialize();
+	}
+
+    event void Lcd.initializeDone(error_t err)
+    {
+        if(err != SUCCESS)
+        {
+            call Leds.led0On();
+            call Leds.led1On();
+            call Leds.led2On();
+        }
+        else
+        {
+            call Draw.fill(COLOR_WHITE);
+            call Lcd.start();
+        }
+    }
+
+    event void Lcd.startDone()
+    {
+        uint32_t now = call Alarm.getNow();
+
+        call Leds.led0Off();
+        call Leds.led1Off();
+        call Leds.led2Off();
+
+
+        call Draw.fill(COLOR_WHITE);
+        call Draw.drawString(10, 10, "AlarmTest:", COLOR_BLACK);
+        call Draw.drawString(10, 50, "Now: ", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 50, now, 1, COLOR_BLACK);
+        call Draw.drawString(10, 70, "Alarm: ", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 70, now+delta, 1, COLOR_BLACK);
+
+        call Draw.drawString(10, 110, "Frequency kHz:", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 130, call HilCounter.getTimerFrequency(), 1, COLOR_BLACK);
+   
+        call Alarm.startAt(now, delta);
+    }
+
+
+    async event void Alarm.fired()
+    {
+        uint32_t now = call Alarm.getNow();
+
+        call Draw.fill(COLOR_WHITE);
+        call Draw.drawString(10, 10, "AlarmTest:", COLOR_BLACK);
+        call Draw.drawString(10, 50, "Now: ", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 50, now, 1, COLOR_BLACK);
+        call Draw.drawString(10, 70, "Err: ", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 70, now - call Alarm.getAlarm(), 1, COLOR_BLACK);
+        call Draw.drawString(10, 90, "Next: ", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 90, now+delta, 1, COLOR_BLACK);
+
+        call Draw.drawString(10, 110, "Frequency kHz:", COLOR_BLACK);
+        call Draw.drawInt(BOARD_LCD_WIDTH-20, 130, call HilCounter.getTimerFrequency(), 1, COLOR_BLACK);
+   
+        call Alarm.startAt(now, delta);
+    }
+
+    async event void HilCounter.overflow() {}
+
+}
diff --git a/apps/tests/sam3/twi/Makefile b/apps/tests/sam3/twi/Makefile
new file mode 100644
index 00000000..06d6b870
--- /dev/null
+++ b/apps/tests/sam3/twi/Makefile
@@ -0,0 +1,9 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
+
diff --git a/apps/tests/sam3/twi/MoteAppC.nc b/apps/tests/sam3/twi/MoteAppC.nc
new file mode 100644
index 00000000..8b4c646e
--- /dev/null
+++ b/apps/tests/sam3/twi/MoteAppC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's TWI with LCD
+ * @author JeongGil Ko
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC,
+    LedsC, NoLedsC,
+    new TimerMilliC() as TimerC,
+    SerialActiveMessageC,
+    TwiReaderC,
+    LcdC,
+    MoteP;
+
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> NoLedsC;
+  MoteP.TWI -> TwiReaderC;
+  MoteP.Resource -> TwiReaderC;
+  MoteP.SerialSplitControl -> SerialActiveMessageC;
+  MoteP.Packet -> SerialActiveMessageC;
+  MoteP.Timer -> TimerC;
+  MoteP.Lcd -> LcdC;
+  MoteP.Draw -> LcdC;
+  MoteP.ResourceConfigure -> TwiReaderC.ResourceConfigure[0];
+  MoteP.InternalAddr -> TwiReaderC;
+}
diff --git a/apps/tests/sam3/twi/MoteP.nc b/apps/tests/sam3/twi/MoteP.nc
new file mode 100644
index 00000000..80d768c9
--- /dev/null
+++ b/apps/tests/sam3/twi/MoteP.nc
@@ -0,0 +1,172 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3utwihardware.h"
+#include <color.h>
+#include <lcd.h>
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface I2CPacket<TI2CBasicAddr> as TWI;
+    interface Resource;
+    interface SplitControl as SerialSplitControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface Lcd;
+    interface Draw;
+    interface ResourceConfigure;
+    interface Sam3uTwiInternalAddress as InternalAddr;
+  }
+}
+
+implementation
+{
+  norace error_t resultError;
+  norace uint32_t resultValue;
+  uint8_t temp[4];
+  uint8_t tempWrite[2];// = 0x60606060; // for 12bit resolution on temp sensor
+  uint16_t tempWriteLimit = 0x4680;
+
+  event void Boot.booted()
+  {
+    while (call SerialSplitControl.start() != SUCCESS);
+    tempWrite[0] = 0x60;//70;
+    tempWrite[1] = 0x60;//128;
+    call Lcd.initialize();
+  }
+
+  event void Lcd.initializeDone(error_t err)
+  {
+    if(err != SUCCESS)
+      {
+      }
+    else
+      {
+        call Draw.fill(COLOR_RED);
+        call Lcd.start();
+      }
+  }
+
+  task void sample()
+  {
+    const char *start = "Resource Request!";
+    call Draw.fill(COLOR_BLUE);
+    call Draw.drawString(10,50,start,COLOR_BLACK);
+    call Resource.request();
+  }
+
+  event void Lcd.startDone(){
+    post sample();
+    call Timer.startPeriodic(4*1024U);
+  }
+
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      while (call SerialSplitControl.start() != SUCCESS);
+    }
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {}
+  
+  volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI0_BASE_ADDR + 0x4);
+  volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI0_BASE_ADDR + 0x10);
+
+  task void read(){
+    const char *start = "TWI!!";
+    call Draw.fill(COLOR_GREEN);
+    call Draw.fill(COLOR_WHITE);
+    call Draw.drawString(10,30,start,COLOR_BLACK);
+
+    call ResourceConfigure.configure();
+    call InternalAddr.setInternalAddrSize(1);
+    //call InternalAddr.setInternalAddr(1); // 1 byte configuration register
+    call InternalAddr.setInternalAddr(1); // temp Limit register
+    call TWI.write(1, 0x48, 1, (uint8_t*)&tempWrite);
+
+    call Draw.drawInt(180,50,MMR->bits.dadr,1,COLOR_BLUE);
+    call Draw.drawInt(180,70,MMR->bits.mread,1,COLOR_BLUE);
+    call Draw.drawInt(180,90,CWGR->bits.cldiv,1,COLOR_BLUE);
+  }
+
+  event void Resource.granted(){
+    post read();
+  }
+
+  task void drawResult(){
+    const char *fail = "Done error";
+    const char *good = "Done success";
+    //call Draw.fill(COLOR_GREEN);
+    if (resultError != SUCCESS) {
+      atomic call Draw.drawString(10,150,fail,COLOR_BLACK);
+    }else{
+      call Draw.drawString(10,150,good,COLOR_BLACK);
+      call Draw.drawInt(100,170,temp[0],1,COLOR_BLACK);
+      call Draw.drawInt(100,190,temp[1],1,COLOR_BLACK);
+      call Draw.drawInt(100,210,temp[2],1,COLOR_BLACK);
+      call Draw.drawInt(100,230,temp[3],1,COLOR_BLACK);
+      call Draw.drawInt(100,250,resultValue,1,COLOR_BLACK);
+    }
+  }
+
+  task void callRead(){
+    call ResourceConfigure.configure();
+    call InternalAddr.setInternalAddrSize(1);
+    call InternalAddr.setInternalAddr(0); // 2 byte temperature register
+    call TWI.read(1, 0x48, 2, (uint8_t*)temp);
+  }
+
+  async event void TWI.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){
+    resultError = error;
+    resultValue = length;
+    post drawResult();
+    post callRead();
+  }
+
+  async event void TWI.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
+  {
+    resultError = error;
+    resultValue = *data;
+    post drawResult();
+  }
+  
+  event void Timer.fired() {
+    post read();
+  }
+}
diff --git a/apps/tests/sam3/twi/TwiReaderC.nc b/apps/tests/sam3/twi/TwiReaderC.nc
new file mode 100644
index 00000000..8bec0107
--- /dev/null
+++ b/apps/tests/sam3/twi/TwiReaderC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+configuration TwiReaderC
+{
+  provides interface I2CPacket<TI2CBasicAddr>;
+  provides interface Resource;
+  provides interface ResourceConfigure[uint8_t id];
+  provides interface Sam3uTwiInternalAddress;
+}
+
+implementation
+{
+  components Sam3uTwiC as TwiC;
+  components TwiReaderP;
+
+  I2CPacket = TwiC.TwiBasicAddr0;
+  Resource = TwiC;
+  ResourceConfigure = TwiC.Configure0;
+  Sam3uTwiInternalAddress = TwiC.InternalAddress0;
+
+  TwiC.TwiConfig0 -> TwiReaderP;
+}
diff --git a/apps/tests/sam3/twi/TwiReaderP.nc b/apps/tests/sam3/twi/TwiReaderP.nc
new file mode 100644
index 00000000..8593fe8c
--- /dev/null
+++ b/apps/tests/sam3/twi/TwiReaderP.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+
+#include "sam3utwihardware.h"
+
+module TwiReaderP
+{
+  provides interface Sam3uTwiConfigure;
+}
+
+implementation {
+
+  const sam3u_twi_union_config_t config = {
+  cldiv: 59,
+  chdiv: 59,
+  ckdiv: 3
+  };
+
+  async command const sam3u_twi_union_config_t* Sam3uTwiConfigure.getConfig(){
+    return &config;
+  }
+}
diff --git a/apps/tests/sam3/twi_pdc/Makefile b/apps/tests/sam3/twi_pdc/Makefile
new file mode 100644
index 00000000..71efd4bb
--- /dev/null
+++ b/apps/tests/sam3/twi_pdc/Makefile
@@ -0,0 +1,10 @@
+COMPONENT=MoteAppC
+
+CFLAGS += -DTOSH_DATA_LENGTH=114
+CFLAGS += -DTFRAME_ENABLED
+CFLAGS += -DSAM3U_TWI_PDC
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
+
diff --git a/apps/tests/sam3/twi_pdc/MoteAppC.nc b/apps/tests/sam3/twi_pdc/MoteAppC.nc
new file mode 100644
index 00000000..12595906
--- /dev/null
+++ b/apps/tests/sam3/twi_pdc/MoteAppC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's TWI with LCD
+ * @author JeongGil Ko
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC,
+    LedsC, NoLedsC,
+    new TimerMilliC() as TimerC,
+    SerialActiveMessageC,
+    TwiReaderC,
+    LcdC,
+    MoteP;
+
+  MoteP.Boot -> MainC;
+  MoteP.Leds -> LedsC;
+  MoteP.TWI -> TwiReaderC;
+  MoteP.Resource -> TwiReaderC;
+  MoteP.SerialSplitControl -> SerialActiveMessageC;
+  MoteP.Packet -> SerialActiveMessageC;
+  MoteP.Timer -> TimerC;
+  MoteP.Lcd -> LcdC;
+  MoteP.Draw -> LcdC;
+  MoteP.ResourceConfigure -> TwiReaderC.ResourceConfigure[0];
+  MoteP.InternalAddr -> TwiReaderC;
+}
diff --git a/apps/tests/sam3/twi_pdc/MoteP.nc b/apps/tests/sam3/twi_pdc/MoteP.nc
new file mode 100644
index 00000000..f5b890d6
--- /dev/null
+++ b/apps/tests/sam3/twi_pdc/MoteP.nc
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3utwihardware.h"
+#include <color.h>
+#include <lcd.h>
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface I2CPacket<TI2CBasicAddr> as TWI;
+    interface Resource;
+    interface SplitControl as SerialSplitControl;
+    interface Packet;
+    interface Timer<TMilli>;
+    interface Lcd;
+    interface Draw;
+    interface ResourceConfigure;
+    interface Sam3uTwiInternalAddress as InternalAddr;
+  }
+}
+
+implementation
+{
+  norace uint8_t resultError;
+  norace uint32_t resultValue;
+  uint8_t rx_len,tx_len;
+  uint8_t temp[4];
+  uint8_t tempWrite[2];// = 0x60606060; // for 12bit resolution on temp sensor
+  uint16_t tempWriteLimit = 0x4680;
+
+  event void Boot.booted()
+  {
+    while (call SerialSplitControl.start() != SUCCESS);
+    tempWrite[0] = 0x60;//70;
+    tempWrite[1] = 0x60;//128;
+    call Lcd.initialize();
+  }
+
+  event void Lcd.initializeDone(error_t err)
+  {
+    if(err != SUCCESS)
+      {
+      }
+    else
+      {
+        call Draw.fill(COLOR_RED);
+        call Lcd.start();
+      }
+  }
+
+  task void sample()
+  {
+    const char *start = "Resource Request!";
+    call Draw.fill(COLOR_BLUE);
+    call Draw.drawString(10,50,start,COLOR_BLACK);
+    call Resource.request();
+  }
+
+  event void Lcd.startDone(){
+    post sample();
+    call Timer.startPeriodic(2*1024U);
+  }
+
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      while (call SerialSplitControl.start() != SUCCESS);
+    }
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {}
+
+  volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI0_BASE_ADDR + 0x4);
+  volatile twi_sr_t* SR = (volatile twi_sr_t *) (TWI0_BASE_ADDR + 0x20);
+  volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI0_BASE_ADDR + 0x10);
+  volatile periph_ptsr_t* PTSR = (volatile periph_ptsr_t *) (0x40084000 + 0x124);
+  volatile periph_rpr_t* RPR = (volatile periph_rpr_t *) (0x40084000 + 0x100);
+  volatile periph_rcr_t* RCR = (volatile periph_rcr_t *) (0x40084000 + 0x104);
+  volatile periph_tcr_t* TCR = (volatile periph_tcr_t *) (0x40084000 + 0x10C);
+  uint8_t count = 0;
+
+  task void read(){
+    call Draw.fill(COLOR_WHITE);
+    
+    call Draw.drawInt(100,10,SR->bits.txcomp,1,COLOR_BLUE);
+    call Draw.drawInt(100,30,SR->bits.rxrdy,1,COLOR_RED);
+    call Draw.drawInt(100,50,SR->bits.txrdy,1,COLOR_BLUE);
+    call Draw.drawInt(100,70,SR->bits.svread,1,COLOR_BLUE);
+    call Draw.drawInt(100,90,SR->bits.svacc,1,COLOR_BLUE);
+    call Draw.drawInt(100,110,SR->bits.gacc,1,COLOR_BLUE);
+    call Draw.drawInt(100,130,SR->bits.ovre,1,COLOR_BLUE);
+    call Draw.drawInt(100,150,SR->bits.nack,1,COLOR_BLUE);
+    call Draw.drawInt(100,170,SR->bits.arblst,1,COLOR_BLUE);
+    call Draw.drawInt(100,190,SR->bits.sclws,1,COLOR_BLUE);
+    call Draw.drawInt(100,210,SR->bits.eosacc,1,COLOR_BLUE);
+    call Draw.drawInt(100,230,SR->bits.endrx,1,COLOR_BLACK);
+    call Draw.drawInt(100,250,SR->bits.endtx,1,COLOR_BLUE);
+    call Draw.drawInt(100,270,SR->bits.rxbuff,1,COLOR_BLUE);
+    call Draw.drawInt(100,290,SR->bits.txbufe,1,COLOR_BLUE);
+
+    count++;
+
+    call ResourceConfigure.configure();
+    call InternalAddr.setInternalAddrSize(1);
+    call InternalAddr.setInternalAddr(1); // sensor config register
+    call TWI.write(1, 0x48, 1, (uint8_t*)&tempWrite);
+
+    call Draw.drawInt(140,230,TCR->bits.txctr,1,COLOR_BLUE);
+    call Draw.drawInt(140,250,SR->bits.endtx,1,COLOR_BLUE);
+    call Draw.drawInt(140,270,SR->bits.txbufe,1,COLOR_BLUE);
+
+    /*
+    call Draw.drawInt(180,70,MMR->bits.dadr,1,COLOR_BLUE);
+    call Draw.drawInt(180,90,MMR->bits.mread,1,COLOR_BLUE);
+    call Draw.drawInt(180,110,CWGR->bits.cldiv,1,COLOR_BLUE);
+    call Draw.drawInt(180,130,PTSR->bits.rxten,1,COLOR_BLUE);
+    call Draw.drawInt(180,150,RPR->bits.rxptr,1,COLOR_BLUE);
+    call Draw.drawInt(180,170,RCR->bits.rxctr,1,COLOR_BLUE);
+
+    call Draw.drawInt(180,230,SR->bits.endrx,1,COLOR_BLUE);
+    call Draw.drawInt(100,250,temp[0],1,COLOR_BLACK);
+    call Draw.drawInt(100,270,temp[1],1,COLOR_BLACK);
+    */
+  }
+
+  event void Resource.granted(){
+    post read();
+  }
+
+  task void drawResult(){
+    const char *fail = "Done error";
+    //call Draw.fill(COLOR_GREEN);
+    if (0/*resultError != SUCCESS*/) {
+      atomic call Draw.drawString(10,70,fail,COLOR_BLACK);
+    }else{
+      call Draw.drawInt(180,10,SR->bits.txcomp,1,COLOR_BLUE);
+      call Draw.drawInt(180,30,SR->bits.rxrdy,1,COLOR_RED);
+      call Draw.drawInt(180,50,SR->bits.txrdy,1,COLOR_BLUE);
+      call Draw.drawInt(180,70,SR->bits.svread,1,COLOR_BLUE);
+      call Draw.drawInt(180,90,SR->bits.svacc,1,COLOR_BLUE);
+      call Draw.drawInt(180,110,SR->bits.gacc,1,COLOR_BLUE);
+      call Draw.drawInt(180,130,SR->bits.ovre,1,COLOR_BLUE);
+      call Draw.drawInt(180,150,SR->bits.nack,1,COLOR_BLUE);
+      call Draw.drawInt(180,170,SR->bits.arblst,1,COLOR_BLUE);
+      call Draw.drawInt(180,190,SR->bits.sclws,1,COLOR_BLUE);
+      call Draw.drawInt(180,210,SR->bits.eosacc,1,COLOR_BLUE);
+      call Draw.drawInt(180,230,SR->bits.endrx,1,COLOR_BLACK);
+      call Draw.drawInt(180,250,SR->bits.endtx,1,COLOR_BLUE);
+      call Draw.drawInt(180,270,SR->bits.rxbuff,1,COLOR_BLUE);
+      call Draw.drawInt(180,290,SR->bits.txbufe,1,COLOR_BLUE);
+
+      call Draw.drawInt(140,170,TCR->bits.txctr,1,COLOR_RED);
+      call Draw.drawInt(140,190,PTSR->bits.txten,1,COLOR_BLACK);
+
+      call Draw.drawInt(30,180,resultValue,1,COLOR_DARKCYAN);
+      call Draw.drawInt(30,200,resultError,1,COLOR_DARKCYAN);
+      //call Draw.drawInt(30,100,temp[0],1,COLOR_BLACK);
+      //call Draw.drawInt(30,120,temp[1],1,COLOR_BLACK);
+    }
+  }
+
+  task void readread(){ 
+    call Draw.drawInt(30,80,rx_len,1,COLOR_DARKGREEN);
+    call Draw.drawInt(30,100,temp[0],1,COLOR_DARKGREEN);
+    call Draw.drawInt(30,120,temp[1],1,COLOR_DARKGREEN);
+    call Draw.drawInt(30,140,temp[2],1,COLOR_DARKGREEN);
+    call Draw.drawInt(30,160,temp[3],1,COLOR_DARKGREEN);
+  }
+
+  task void callRead(){
+    call ResourceConfigure.configure();
+    call InternalAddr.setInternalAddrSize(1);
+    call InternalAddr.setInternalAddr(0); // 2 byte temperature register
+    call TWI.read(1, 0x48, 2, (uint8_t*)temp);
+  }
+
+  async event void TWI.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){
+    resultError = error;
+    resultValue = length;
+    post drawResult();
+    post callRead();
+  }
+
+  async event void TWI.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
+  {
+    //resultError = error;
+    //resultValue = *data;
+    //post drawResult();
+    rx_len=length;
+    post readread();
+  }
+
+  event void Timer.fired() {
+    post read();
+  }
+}
diff --git a/apps/tests/sam3/twi_pdc/TwiReaderC.nc b/apps/tests/sam3/twi_pdc/TwiReaderC.nc
new file mode 100644
index 00000000..8bec0107
--- /dev/null
+++ b/apps/tests/sam3/twi_pdc/TwiReaderC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+configuration TwiReaderC
+{
+  provides interface I2CPacket<TI2CBasicAddr>;
+  provides interface Resource;
+  provides interface ResourceConfigure[uint8_t id];
+  provides interface Sam3uTwiInternalAddress;
+}
+
+implementation
+{
+  components Sam3uTwiC as TwiC;
+  components TwiReaderP;
+
+  I2CPacket = TwiC.TwiBasicAddr0;
+  Resource = TwiC;
+  ResourceConfigure = TwiC.Configure0;
+  Sam3uTwiInternalAddress = TwiC.InternalAddress0;
+
+  TwiC.TwiConfig0 -> TwiReaderP;
+}
diff --git a/apps/tests/sam3/twi_pdc/TwiReaderP.nc b/apps/tests/sam3/twi_pdc/TwiReaderP.nc
new file mode 100644
index 00000000..8593fe8c
--- /dev/null
+++ b/apps/tests/sam3/twi_pdc/TwiReaderP.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * ADC configuration settings (part of test application) for SAM3U's 12 bit ADC
+ * @author JeongGil Ko
+ */
+
+
+#include "sam3utwihardware.h"
+
+module TwiReaderP
+{
+  provides interface Sam3uTwiConfigure;
+}
+
+implementation {
+
+  const sam3u_twi_union_config_t config = {
+  cldiv: 59,
+  chdiv: 59,
+  ckdiv: 3
+  };
+
+  async command const sam3u_twi_union_config_t* Sam3uTwiConfigure.getConfig(){
+    return &config;
+  }
+}
diff --git a/apps/tests/sam3/usb/Makefile b/apps/tests/sam3/usb/Makefile
new file mode 100644
index 00000000..7f551791
--- /dev/null
+++ b/apps/tests/sam3/usb/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=MoteAppC
+
+include $(MAKERULES)
diff --git a/apps/tests/sam3/usb/MoteAppC.nc b/apps/tests/sam3/usb/MoteAppC.nc
new file mode 100644
index 00000000..c64473a7
--- /dev/null
+++ b/apps/tests/sam3/usb/MoteAppC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2010 CSIRO
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's UDPHS HPL interface
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+configuration MoteAppC {}
+
+implementation
+{
+  components MainC;
+  components MoteP;
+  components Sam3uUsbSerialP;
+  components HplNVICC;
+  components HplSam3uClockC;
+  components LedsC;
+
+  MainC.SoftwareInit -> Sam3uUsbSerialP;
+  Sam3uUsbSerialP.UDPHSInterrupt -> HplNVICC.MCI0Interrupt;
+  Sam3uUsbSerialP.UDPHSClockControl -> HplSam3uClockC.UDPHSPPCntl;
+
+  MoteP.Boot -> MainC;
+  MoteP.StdControl -> Sam3uUsbSerialP;
+  MoteP.UartStream -> Sam3uUsbSerialP;
+  MoteP.Leds -> LedsC;
+
+  components McuSleepC;
+  Sam3uUsbSerialP.UdphsInterruptWrapper -> McuSleepC;
+}
diff --git a/apps/tests/sam3/usb/MoteP.nc b/apps/tests/sam3/usb/MoteP.nc
new file mode 100644
index 00000000..1a4177bf
--- /dev/null
+++ b/apps/tests/sam3/usb/MoteP.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2010 CSIRO
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple test program for SAM3U's UDPHS HPL interface
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+//#include <sam3uudphshardware.h>
+//#include <printf.h>
+
+module MoteP
+{
+  uses {
+    interface Boot;
+    interface StdControl;
+    interface UartStream;
+    interface Leds;
+  }
+}
+
+implementation
+{
+  #define READBUFFERSIZE 64
+  #define WRITEBUFFERSIZE 100
+  int i=0;
+  uint8_t readBuffer[READBUFFERSIZE];
+  uint8_t writeBuffer[WRITEBUFFERSIZE];
+
+  event void Boot.booted() {
+    // Start it up!
+    call StdControl.start();
+
+    for(i=0; i<WRITEBUFFERSIZE; i++)
+      writeBuffer[i] = i;
+    
+    while(call UartStream.receive(readBuffer, READBUFFERSIZE) != SUCCESS);
+    while(call UartStream.send(writeBuffer, WRITEBUFFERSIZE) != SUCCESS);
+  }
+
+  async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ) {
+    while(call UartStream.send(writeBuffer, WRITEBUFFERSIZE) != SUCCESS);
+  }
+
+  async event void UartStream.receivedByte( uint8_t byte ) {
+  }
+
+  async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ) {
+    while(call UartStream.receive(readBuffer, READBUFFERSIZE) != SUCCESS);
+  }
+}
+
diff --git a/apps/tests/storage/Block/Makefile b/apps/tests/storage/Block/Makefile
new file mode 100644
index 00000000..43ed20b8
--- /dev/null
+++ b/apps/tests/storage/Block/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=RandRWAppC
+include $(MAKERULES)
diff --git a/apps/tests/storage/Block/README.txt b/apps/tests/storage/Block/README.txt
new file mode 100644
index 00000000..9c9c13b6
--- /dev/null
+++ b/apps/tests/storage/Block/README.txt
@@ -0,0 +1,32 @@
+README for Block
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+Application to test the BlockStorageC abstraction. There must be a
+volumes-<chip>.xml file in this directory describing the a 256kB volume
+named BLOCKTEST for your flash chip.
+
+The mote id is of the form T*100 + k, where k is a random seed and
+T specifies the test to be performed:
+
+T = 0: perform a full test
+T = 2: read a previously written block with the same seed
+T = 3: write a block with the given seed
+
+For example, install with an id of 310 to write some data to the flash,
+then with an id of 210 to check that the data is correct. Or install
+with an id of 10 to do a combined write+read test.
+
+A successful test will blink LED 2 a few times, then turn on LED 1. A
+failed test will turn on LED 0. A serial message whose last byte is 0x80
+for success and all other values indicate failure is also sent at the
+end of the test.
+
+Tools:
+
+Known bugs/limitations:
+
+None.
+
+$Id: README.txt,v 1.5 2007-02-09 21:30:29 idgay Exp $
diff --git a/apps/tests/storage/Block/RandRWAppC.nc b/apps/tests/storage/Block/RandRWAppC.nc
new file mode 100644
index 00000000..4939ce43
--- /dev/null
+++ b/apps/tests/storage/Block/RandRWAppC.nc
@@ -0,0 +1,31 @@
+/* $Id: RandRWAppC.nc,v 1.5 2008-06-25 01:29:44 konradlorincz Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Block storage test application. Does a pattern of random reads and
+ * writes, based on mote id. See README.txt for more details.
+ *
+ * @author David Gay
+ */
+
+#include "StorageVolumes.h"
+
+configuration RandRWAppC { }
+implementation {
+  components RandRWC, new BlockStorageC(VOLUME_BLOCKTEST),
+    MainC, LedsC, PlatformC, SerialActiveMessageC;
+
+  MainC.Boot <- RandRWC;
+
+  RandRWC.SerialControl -> SerialActiveMessageC;
+  RandRWC.AMSend -> SerialActiveMessageC.AMSend[139];
+  RandRWC.BlockRead -> BlockStorageC.BlockRead;
+  RandRWC.BlockWrite -> BlockStorageC.BlockWrite;
+  RandRWC.Leds -> LedsC;
+}
diff --git a/apps/tests/storage/Block/RandRWC.nc b/apps/tests/storage/Block/RandRWC.nc
new file mode 100644
index 00000000..41a08314
--- /dev/null
+++ b/apps/tests/storage/Block/RandRWC.nc
@@ -0,0 +1,234 @@
+/* $Id: RandRWC.nc,v 1.6 2008-06-25 01:29:44 konradlorincz Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Block storage test application. Does a pattern of random reads and
+ * writes, based on mote id. See README.txt for more details.
+ *
+ * @author David Gay
+ */
+module RandRWC {
+  uses {
+    interface Boot;
+    interface Leds;
+    interface BlockRead;
+    interface BlockWrite;
+    interface AMSend;
+    interface SplitControl as SerialControl;
+  }
+}
+implementation {
+  enum {
+    SIZE = 1024L * 256,
+    NWRITES = SIZE / 4096,
+  };
+
+  uint16_t shiftReg;
+  uint16_t initSeed;
+  uint16_t mask;
+
+  /* Return the next 16 bit random number */
+  uint16_t rand() {
+    bool endbit;
+    uint16_t tmpShiftReg;
+
+    tmpShiftReg = shiftReg;
+    endbit = ((tmpShiftReg & 0x8000) != 0);
+    tmpShiftReg <<= 1;
+    if (endbit) 
+      tmpShiftReg ^= 0x100b;
+    tmpShiftReg++;
+    shiftReg = tmpShiftReg;
+    tmpShiftReg = tmpShiftReg ^ mask;
+
+    return tmpShiftReg;
+  }
+
+  void resetSeed() {
+    shiftReg = 119 * 119 * ((TOS_NODE_ID % 100) + 1);
+    initSeed = shiftReg;
+    mask = 137 * 29 * ((TOS_NODE_ID % 100) + 1);
+  }
+  
+  uint8_t data[512], rdata[512];
+  int count, testCount;
+  uint32_t addr, len;
+  uint16_t offset;
+  message_t reportMsg;
+
+  void done();
+
+  void report(error_t e) {
+    uint8_t *msg = call AMSend.getPayload(&reportMsg, 1);
+
+    msg[0] = e;
+    if (call AMSend.send(AM_BROADCAST_ADDR, &reportMsg, 1) != SUCCESS)
+      call Leds.led0On();
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t error) {
+    if (error != SUCCESS)
+      call Leds.led0On();
+  }
+
+  void fail(error_t e) {
+    call Leds.led0On();
+    report(e);
+  }
+
+  void success() {
+    call Leds.led1On();
+    report(0x80);
+  }
+
+  bool scheck(error_t r) __attribute__((noinline)) {
+    if (r != SUCCESS)
+      fail(r);
+    return r == SUCCESS;
+  }
+
+  bool bcheck(bool b) {
+    if (!b)
+      fail(FAIL);
+    return b;
+  }
+
+  void setParameters() {
+    addr = (uint32_t)count << 12 | (rand() >> 6);
+    len = rand() >> 7;
+    if (addr + len > SIZE)
+      addr = SIZE - len;
+    offset = rand() >> 8;
+    if (offset + len > sizeof data)
+      offset = sizeof data - len;
+  }
+
+  event void Boot.booted() {
+    call SerialControl.start();
+  }
+
+  event void SerialControl.stopDone(error_t e) { }
+
+  event void SerialControl.startDone(error_t e) {
+    int i;
+
+    if (e != SUCCESS)
+      {
+	call Leds.led0On();
+	return;
+      }
+
+    resetSeed();
+    for (i = 0; i < sizeof data; i++)
+      data[i++] = rand() >> 8;
+
+    done();
+  }
+
+  void nextRead() {
+    if (++count == NWRITES)
+      done();
+    else
+      {
+	setParameters();
+	scheck(call BlockRead.read(addr, rdata, len));
+      }
+  }
+
+  void nextWrite() {
+    if (++count == NWRITES)
+      {
+	call Leds.led2Toggle();
+	scheck(call BlockWrite.sync());
+      }
+    else
+      {
+	setParameters();
+	scheck(call BlockWrite.write(addr, data + offset, len));
+      }
+  }
+
+  event void BlockWrite.writeDone(storage_addr_t x, void* buf, storage_len_t y, error_t result) {
+    if (scheck(result))
+      nextWrite();
+  }
+
+  event void BlockWrite.eraseDone(error_t result) {
+    if (scheck(result))
+      {
+	call Leds.led2Toggle();
+	nextWrite();
+      }
+  }
+
+  event void BlockWrite.syncDone(error_t result) {
+    if (scheck(result))
+      done();
+  }
+
+  event void BlockRead.readDone(storage_addr_t x, void* buf, storage_len_t rlen, error_t result) __attribute__((noinline)) {
+    if (scheck(result) && bcheck(x == addr && rlen == len && buf == rdata &&
+				 memcmp(data + offset, rdata, rlen) == 0))
+      nextRead();
+  }
+
+  event void BlockRead.computeCrcDone(storage_addr_t x, storage_len_t y, uint16_t z, error_t result) {
+  }
+
+  enum { A_READ = 2, A_WRITE };
+
+  void doAction(int act) {
+    count = 0;
+    resetSeed();
+
+    switch (act)
+      {
+      case A_WRITE:
+	scheck(call BlockWrite.erase());
+	break;
+      case A_READ:
+	nextRead();
+	break;
+      }
+  }
+
+  const uint8_t actions[] = {
+    A_WRITE,
+    A_READ
+  };
+
+  void done() {
+    uint8_t act = TOS_NODE_ID / 100;
+
+    call Leds.led2Toggle();
+
+    switch (act)
+      {
+      case 0:
+	if (testCount < sizeof actions)
+	  doAction(actions[testCount]);
+	else
+	  success();
+	break;
+
+      case A_READ: case A_WRITE:
+	if (testCount)
+	  success();
+	else
+	  doAction(act);
+	break;
+
+      default:
+	fail(FAIL);
+	break;
+      }
+    testCount++;
+  }
+
+}
diff --git a/apps/tests/storage/Block/volumes-at45db.xml b/apps/tests/storage/Block/volumes-at45db.xml
new file mode 100644
index 00000000..792c8d6b
--- /dev/null
+++ b/apps/tests/storage/Block/volumes-at45db.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="BLOCKTEST" size="262144"/>
+</volume_table>
diff --git a/apps/tests/storage/Block/volumes-pxa27xp30.xml b/apps/tests/storage/Block/volumes-pxa27xp30.xml
new file mode 100644
index 00000000..50bf1889
--- /dev/null
+++ b/apps/tests/storage/Block/volumes-pxa27xp30.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="BLOCKTEST" size="2097152"/>
+</volume_table>
diff --git a/apps/tests/storage/Block/volumes-stm25p.xml b/apps/tests/storage/Block/volumes-stm25p.xml
new file mode 100644
index 00000000..70a68f96
--- /dev/null
+++ b/apps/tests/storage/Block/volumes-stm25p.xml
@@ -0,0 +1,4 @@
+
+<volume_table>
+  <volume name="BLOCKTEST" size="262144"/>
+</volume_table>
\ No newline at end of file
diff --git a/apps/tests/storage/CircularLog/Makefile b/apps/tests/storage/CircularLog/Makefile
new file mode 100644
index 00000000..43ed20b8
--- /dev/null
+++ b/apps/tests/storage/CircularLog/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=RandRWAppC
+include $(MAKERULES)
diff --git a/apps/tests/storage/CircularLog/README.txt b/apps/tests/storage/CircularLog/README.txt
new file mode 100644
index 00000000..e2cf0d4c
--- /dev/null
+++ b/apps/tests/storage/CircularLog/README.txt
@@ -0,0 +1,38 @@
+README for CircularLog
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+Application to test the LogStorageC abstraction, using the log in circular
+mode. There must be a volumes-<chip>.xml file in this directory describing
+the a 256kB volume named LOGTEST for your flash chip.
+
+The mote id is of the form T*100 + k, where k is a random seed and
+T specifies the test to be performed:
+
+T = 0: perform a full test
+T = 1: erase the log
+T = 2: read the log
+T = 3: write some data to the log
+
+The write test writes a random sequence of 4095 32-byte records chosen from
+a set of 16 possible records. The read test checks that the log contains
+that all records in the log are one of the 16 possible records. The valid
+records depend on the seed. Running 2 write tests will fill the log, and
+the third one will wrap around. So for instance, you could run the test
+with id = 117 (erase), then 317 three times (fill the log and wrap around),
+then 217 to check that the log is valid. Or just run it with id = 17
+to perform a full test.
+
+A successful test will turn on LED 1. A failed test will turn on the
+LED 0. LED 1 is turned on after erase is complete. A serial message
+whose last byte is 0x80 for success and all other values indicate
+failure is also sent at the end of the test.
+
+Tools:
+
+Known bugs/limitations:
+
+None.
+
+$Id: README.txt,v 1.5 2007-07-09 20:45:54 idgay Exp $
diff --git a/apps/tests/storage/CircularLog/RandRWAppC.nc b/apps/tests/storage/CircularLog/RandRWAppC.nc
new file mode 100644
index 00000000..80bb3def
--- /dev/null
+++ b/apps/tests/storage/CircularLog/RandRWAppC.nc
@@ -0,0 +1,31 @@
+/* $Id: RandRWAppC.nc,v 1.5 2008-06-25 01:29:44 konradlorincz Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Block storage test application. Does a pattern of random reads and
+ * writes, based on mote id. See README.txt for more details.
+ *
+ * @author David Gay
+ */
+
+#include "StorageVolumes.h"
+
+configuration RandRWAppC { }
+implementation {
+  components RandRWC, new LogStorageC(VOLUME_LOGTEST, TRUE),
+    MainC, LedsC, PlatformC, SerialActiveMessageC;
+
+  MainC.Boot <- RandRWC;
+
+  RandRWC.SerialControl -> SerialActiveMessageC;
+  RandRWC.AMSend -> SerialActiveMessageC.AMSend[139];
+  RandRWC.LogRead -> LogStorageC.LogRead;
+  RandRWC.LogWrite -> LogStorageC.LogWrite;
+  RandRWC.Leds -> LedsC;
+}
diff --git a/apps/tests/storage/CircularLog/RandRWC.nc b/apps/tests/storage/CircularLog/RandRWC.nc
new file mode 100644
index 00000000..0865d998
--- /dev/null
+++ b/apps/tests/storage/CircularLog/RandRWC.nc
@@ -0,0 +1,235 @@
+/* $Id: RandRWC.nc,v 1.6 2008-06-25 01:29:44 konradlorincz Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Log storage test application. Does a pattern of random reads and
+ * writes, based on mote id. See README.txt for more details.
+ *
+ * @author David Gay
+ */
+module RandRWC {
+  uses {
+    interface Boot;
+    interface Leds;
+    interface LogRead;
+    interface LogWrite;
+    interface AMSend;
+    interface SplitControl as SerialControl;
+  }
+}
+implementation {
+  enum {
+    SIZE = 1024L * 256,
+    RECSIZE = 32,
+    NRECS = 16,
+    NWRITES = SIZE / (2 * RECSIZE),
+  };
+
+  uint16_t shiftReg;
+  uint16_t initSeed;
+  uint16_t mask;
+
+  void done();
+
+  /* Return the next 16 bit random number */
+  uint16_t rand() {
+    bool endbit;
+    uint16_t tmpShiftReg;
+
+    tmpShiftReg = shiftReg;
+    endbit = ((tmpShiftReg & 0x8000) != 0);
+    tmpShiftReg <<= 1;
+    if (endbit) 
+      tmpShiftReg ^= 0x100b;
+    tmpShiftReg++;
+    shiftReg = tmpShiftReg;
+    tmpShiftReg = tmpShiftReg ^ mask;
+
+    return tmpShiftReg;
+  }
+
+  void resetSeed() {
+    shiftReg = 119 * 119 * ((TOS_NODE_ID % 100) + 1);
+    initSeed = shiftReg;
+    mask = 137 * 29 * ((TOS_NODE_ID % 100) + 1);
+  }
+  
+  uint8_t data[NRECS * RECSIZE], rdata[RECSIZE];
+  int count, testCount;
+  message_t reportMsg;
+
+  void report(error_t e) {
+    uint8_t *msg = call AMSend.getPayload(&reportMsg, 1);
+
+    msg[0] = e;
+    if (call AMSend.send(AM_BROADCAST_ADDR, &reportMsg, 1) != SUCCESS)
+      call Leds.led0On();
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t error) {
+    if (error != SUCCESS)
+      call Leds.led0On();
+  }
+
+  void fail(error_t e) {
+    call Leds.led0On();
+    report(e);
+  }
+
+  void success() {
+    call Leds.led1On();
+    report(0x80);
+  }
+
+  bool scheck(error_t r) __attribute__((noinline)) {
+    if (r != SUCCESS)
+      fail(r);
+    return r == SUCCESS;
+  }
+
+  bool bcheck(bool b) {
+    if (!b)
+      fail(FAIL);
+    return b;
+  }
+
+  void nextRead() {
+    scheck(call LogRead.read(rdata, RECSIZE));
+  }
+
+  event void LogRead.readDone(void* buf, storage_len_t rlen, error_t result) __attribute__((noinline)) {
+    if (rlen == 0)
+      done();
+    else if (scheck(result) && bcheck(rlen == RECSIZE && buf == rdata))
+      {
+	int i;
+
+	/* It must be one of our possible records */
+	for (i = 0; i < sizeof data; i += RECSIZE)
+	  if (memcmp(buf, data + i, RECSIZE) == 0)
+	    {
+	      nextRead();
+	      return;
+	    }
+	bcheck(FALSE);
+      }
+  }
+
+  event void LogRead.seekDone(error_t error) {
+  }
+
+  void nextWrite() {
+    if (count++ == NWRITES)
+      scheck(call LogWrite.sync());
+    else
+      {
+	int offset = ((rand() >> 8) % NRECS) * RECSIZE;
+
+	scheck(call LogWrite.append(data + offset, RECSIZE));
+      }
+  }
+
+  event void LogWrite.appendDone(void *buf, storage_len_t y, bool recordsLost, error_t result) {
+    if (scheck(result))
+      nextWrite();
+  }
+
+  event void LogWrite.eraseDone(error_t result) {
+    if (scheck(result))
+      done();
+  }
+
+  event void LogWrite.syncDone(error_t result) {
+    if (scheck(result))
+      done();
+  }
+
+  event void Boot.booted() {
+    int i;
+
+    resetSeed();
+    for (i = 0; i < sizeof data; i++)
+      data[i++] = rand() >> 8;
+
+    call SerialControl.start();
+  }
+
+  event void SerialControl.stopDone(error_t e) { }
+
+  event void SerialControl.startDone(error_t e) {
+    if (e != SUCCESS)
+      {
+	call Leds.led0On();
+	return;
+      }
+
+    testCount = 0;
+    done();
+  }
+
+  enum { A_ERASE = 1, A_READ, A_WRITE };
+
+  void doAction(int act) {
+    switch (act)
+      {
+      case A_ERASE:
+	scheck(call LogWrite.erase());
+	break;
+      case A_WRITE:
+	resetSeed();
+	count = 0;
+	nextWrite();
+	break;
+      case A_READ:
+	resetSeed();
+	count = 0;
+	nextRead();
+	break;
+      }
+  }
+
+  const uint8_t actions[] = {
+    A_ERASE, 
+    A_READ,
+    A_WRITE,
+    A_READ,
+    A_WRITE,
+    A_WRITE,
+    A_WRITE,
+    A_READ,
+  };
+
+  void done() {
+    uint8_t act = TOS_NODE_ID / 100;
+
+    call Leds.led2Toggle();
+
+    switch (act)
+      {
+      case 0:
+	if (testCount < sizeof actions)
+	  doAction(actions[testCount]);
+	else
+	  success();
+	break;
+
+      case A_ERASE: case A_READ: case A_WRITE:
+	if (testCount)
+	  success();
+	else
+	  doAction(act);
+	break;
+
+      default:
+	fail(FAIL);
+	break;
+      }
+    testCount++;
+  }
+}
diff --git a/apps/tests/storage/CircularLog/volumes-at45db.xml b/apps/tests/storage/CircularLog/volumes-at45db.xml
new file mode 100644
index 00000000..daa0d507
--- /dev/null
+++ b/apps/tests/storage/CircularLog/volumes-at45db.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="LOGTEST" size="262144"/>
+</volume_table>
diff --git a/apps/tests/storage/CircularLog/volumes-pxa27xp30.xml b/apps/tests/storage/CircularLog/volumes-pxa27xp30.xml
new file mode 100644
index 00000000..cc81eb17
--- /dev/null
+++ b/apps/tests/storage/CircularLog/volumes-pxa27xp30.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="LOGTEST" size="2097152"/>
+</volume_table>
diff --git a/apps/tests/storage/CircularLog/volumes-stm25p.xml b/apps/tests/storage/CircularLog/volumes-stm25p.xml
new file mode 100644
index 00000000..dbe926a1
--- /dev/null
+++ b/apps/tests/storage/CircularLog/volumes-stm25p.xml
@@ -0,0 +1,4 @@
+
+<volume_table>
+  <volume name="LOGTEST" size="262144"/>
+</volume_table>
diff --git a/apps/tests/storage/Config/Makefile b/apps/tests/storage/Config/Makefile
new file mode 100644
index 00000000..43ed20b8
--- /dev/null
+++ b/apps/tests/storage/Config/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=RandRWAppC
+include $(MAKERULES)
diff --git a/apps/tests/storage/Config/README.txt b/apps/tests/storage/Config/README.txt
new file mode 100644
index 00000000..96b1befe
--- /dev/null
+++ b/apps/tests/storage/Config/README.txt
@@ -0,0 +1,28 @@
+README for Config
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+Application to test the ConfigStorageC abstraction. There must be a
+volumes-<chip>.xml file in this directory describing the a volume
+named CONFIGTEST capable of storing 2kB of config data.
+
+The mote id is of the form T*100 + k, where k is a random seed and
+T specifies the test to be performed:
+
+T = 0: do a bunch of writes, reads and commits
+T != 0: check if the contents of the volume are consistent with 
+        a previous run with T = 0 and the same random seed
+
+A successful test will turn on LED 1. A failed test will turn on the
+LED 0. LED 2 blinks to indicate test progress. A serial message whose
+last byte is 0x80 for success and all other values indicate failure is
+also sent at the end of the test.
+
+Tools:
+
+Known bugs/limitations:
+
+None.
+
+$Id: README.txt,v 1.5 2007-07-09 20:45:54 idgay Exp $
diff --git a/apps/tests/storage/Config/RandRWAppC.nc b/apps/tests/storage/Config/RandRWAppC.nc
new file mode 100644
index 00000000..0ea1a1d7
--- /dev/null
+++ b/apps/tests/storage/Config/RandRWAppC.nc
@@ -0,0 +1,31 @@
+/* $Id: RandRWAppC.nc,v 1.5 2008-06-25 01:29:44 konradlorincz Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Block storage test application. Does a pattern of random reads and
+ * writes, based on mote id. See README.txt for more details.
+ *
+ * @author David Gay
+ */
+
+#include "StorageVolumes.h"
+
+configuration RandRWAppC { }
+implementation {
+  components RandRWC, new ConfigStorageC(VOLUME_CONFIGTEST),
+    MainC, LedsC, PlatformC, SerialActiveMessageC;
+
+  MainC.Boot <- RandRWC;
+
+  RandRWC.SerialControl -> SerialActiveMessageC;
+  RandRWC.AMSend -> SerialActiveMessageC.AMSend[139];
+  RandRWC.ConfigStorage -> ConfigStorageC.ConfigStorage;
+  RandRWC.ConfigMount -> ConfigStorageC.Mount;
+  RandRWC.Leds -> LedsC;
+}
diff --git a/apps/tests/storage/Config/RandRWC.nc b/apps/tests/storage/Config/RandRWC.nc
new file mode 100644
index 00000000..f844e28b
--- /dev/null
+++ b/apps/tests/storage/Config/RandRWC.nc
@@ -0,0 +1,285 @@
+/* $Id: RandRWC.nc,v 1.8 2008-06-25 01:29:44 konradlorincz Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Config storage test application. Does a pattern of random reads and
+ * writes, based on mote id. See README.txt for more details.
+ *
+ * @author David Gay
+ */
+module RandRWC @safe() {
+  uses {
+    interface Boot;
+    interface Leds;
+    interface ConfigStorage;
+    interface AMSend;
+    interface SplitControl as SerialControl;
+    interface Mount as ConfigMount;
+  }
+}
+implementation {
+  enum {
+    SIZE = 2048,
+    NWRITES = 100,
+  };
+
+  uint16_t shiftReg;
+  uint16_t initSeed;
+  uint16_t mask;
+
+  uint8_t data[512], rdata[512];
+  int count, testCount, writeCount, countAtCommit;
+  struct {
+    uint32_t addr;
+    void *COUNT_NOK(len) data;
+    uint16_t len;
+  } ops[NWRITES];
+
+  message_t reportMsg;
+
+
+  void done();
+
+  /* Return the next 16 bit random number */
+  uint16_t rand() {
+    bool endbit;
+    uint16_t tmpShiftReg;
+
+    tmpShiftReg = shiftReg;
+    endbit = ((tmpShiftReg & 0x8000) != 0);
+    tmpShiftReg <<= 1;
+    if (endbit) 
+      tmpShiftReg ^= 0x100b;
+    tmpShiftReg++;
+    shiftReg = tmpShiftReg;
+    tmpShiftReg = tmpShiftReg ^ mask;
+
+    return tmpShiftReg;
+  }
+
+  void resetSeed(int offset) {
+    shiftReg = 119 * 119 * ((TOS_NODE_ID % 100) + 1 + offset);
+    initSeed = shiftReg;
+    mask = 137 * 29 * ((TOS_NODE_ID % 100) + 1 + offset);
+  }
+  
+  void report(error_t e) {
+    uint8_t *msg = call AMSend.getPayload(&reportMsg, 1);
+
+    msg[0] = e;
+    if (call AMSend.send(AM_BROADCAST_ADDR, &reportMsg, 1) != SUCCESS)
+      call Leds.led0On();
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t error) {
+    if (error != SUCCESS)
+      call Leds.led0On();
+  }
+
+  void fail(error_t e) {
+    call Leds.led0On();
+    report(e);
+  }
+
+  void success() {
+    call Leds.led1On();
+    report(0x80);
+  }
+
+  bool scheck(error_t r) __attribute__((noinline)) {
+    if (r != SUCCESS)
+      fail(r);
+    return r == SUCCESS;
+  }
+
+  bool bcheck(bool b) {
+    if (!b)
+      fail(FAIL);
+    return b;
+  }
+
+  void setupOps(int wcount) {
+    int i;
+    uint16_t offset;
+
+    count = 0;
+    resetSeed(wcount);
+
+    for (i = 0; i < NWRITES; i++)
+      {
+	uint16_t addr = rand() & (SIZE - 1);
+	uint16_t len = rand() >> 7;
+	if (addr + len > SIZE)
+	  addr = SIZE - len;
+	ops[i].addr = addr;
+	ops[i].data = NULL;
+	ops[i].len = len;
+	offset = rand() >> 8;
+	if (offset + ops[i].len > sizeof data)
+	  offset = sizeof data - ops[i].len;
+	ops[i].data = data + offset;
+      }
+  }
+
+  int overlap(int a, int b) {
+
+    return ops[a].addr >= ops[b].addr && ops[a].addr < ops[b].addr + ops[b].len;
+  }
+
+  int overwritten(int c) {
+    int i;
+
+    /* True if write c is overwritten by a later write */
+    for (i = c + 1; i < NWRITES; i++)
+      if (overlap(i, c) || overlap(c, i))
+	return TRUE;
+    return FALSE;
+  }
+
+  void nextRead() {
+    int c = count++;
+
+    if (c == NWRITES)
+      done();
+    else
+      scheck(call ConfigStorage.read(ops[c].addr, rdata, ops[c].len));
+  }
+
+  event void ConfigStorage.readDone(storage_addr_t x, void* buf, storage_len_t rlen, error_t result) __attribute__((noinline)) {
+    int c = count - 1;
+
+    if (scheck(result) &&
+	bcheck(x == ops[c].addr && rlen == ops[c].len && buf == rdata) &&
+	bcheck(overwritten(c) || memcmp(ops[c].data, rdata, rlen) == 0))
+      nextRead();
+  }
+
+  void nextWrite() {
+    int c = count++;
+
+    if (c == NWRITES)
+      done();
+    else
+      scheck(call ConfigStorage.write(ops[c].addr, ops[c].data, ops[c].len));
+  }
+
+  event void ConfigStorage.writeDone(storage_addr_t x, void *buf, storage_len_t y, error_t result) {
+    int c = count - 1;
+
+    if (scheck(result) &&
+	bcheck(x == ops[c].addr && y == ops[c].len && buf == ops[c].data))
+      nextWrite();
+  }
+
+  event void ConfigStorage.commitDone(error_t result) {
+    if (scheck(result))
+      done();
+  }
+
+  event void Boot.booted() {
+    int i;
+
+    resetSeed(0);
+    for (i = 0; i < sizeof data; i++)
+      data[i++] = rand() >> 8;
+
+    call SerialControl.start();
+  }
+
+  event void SerialControl.startDone(error_t e) {
+    if (e != SUCCESS)
+      {
+	call Leds.led0On();
+	return;
+      }
+
+    scheck(call ConfigMount.mount());
+  }
+
+  event void ConfigMount.mountDone(error_t e) {
+    if (e != SUCCESS)
+      fail(e);
+    else
+      done();
+  }
+
+  enum { A_COMMIT, A_READ, A_WRITE };
+
+  void doAction(int act) {
+    switch (act)
+      {
+      case A_COMMIT:
+	countAtCommit = writeCount;
+	scheck(call ConfigStorage.commit());
+	break;
+      case A_WRITE:
+	setupOps(++writeCount);
+	nextWrite();
+	break;
+      case A_READ:
+	setupOps(countAtCommit);
+	nextRead();
+	break;
+      }
+  }
+
+  const uint8_t actions[] = {
+    A_WRITE,
+    A_COMMIT,
+    A_READ,
+    A_WRITE,
+    A_COMMIT,
+    A_READ,
+    A_WRITE,
+    A_READ
+  };
+
+  void done() {
+    uint8_t act = TOS_NODE_ID / 100;
+
+    call Leds.led2Toggle();
+
+    switch (act)
+      {
+      case 0:
+	if (testCount < sizeof actions)
+	  doAction(actions[testCount]);
+	else
+	  success();
+	break;
+
+      default:
+	if (testCount)
+	  success();
+	else
+	  {
+	    uint8_t i, nwrites = 0;
+
+	    /* Figure out countAtCommit */
+	    for (i = 0; i < sizeof actions; i++)
+	      switch (actions[i])
+		{
+		case A_WRITE:
+		  nwrites++;
+		  break;
+		case A_COMMIT:
+		  countAtCommit = nwrites;
+		  break;
+		}
+
+	    /* And check we have the right data */
+	    doAction(A_READ);
+	  }
+	break;
+      }
+    testCount++;
+  }
+
+  event void SerialControl.stopDone(error_t e) { }
+}
diff --git a/apps/tests/storage/Config/volumes-at45db.xml b/apps/tests/storage/Config/volumes-at45db.xml
new file mode 100644
index 00000000..e221874e
--- /dev/null
+++ b/apps/tests/storage/Config/volumes-at45db.xml
@@ -0,0 +1,4 @@
+<volume_table>
+  <volume name="LOGTEST" size="262144"/>
+  <volume name="CONFIGTEST" size="5120"/>
+</volume_table>
diff --git a/apps/tests/storage/Config/volumes-pxa27xp30.xml b/apps/tests/storage/Config/volumes-pxa27xp30.xml
new file mode 100644
index 00000000..31c65904
--- /dev/null
+++ b/apps/tests/storage/Config/volumes-pxa27xp30.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="CONFIGTEST" size="2097152"/>
+</volume_table>
diff --git a/apps/tests/storage/Config/volumes-stm25p.xml b/apps/tests/storage/Config/volumes-stm25p.xml
new file mode 100644
index 00000000..adce9924
--- /dev/null
+++ b/apps/tests/storage/Config/volumes-stm25p.xml
@@ -0,0 +1,4 @@
+<volume_table>
+  <volume name="LOGTEST" size="262144"/>
+  <volume name="CONFIGTEST" size="131072"/>
+</volume_table>
diff --git a/apps/tests/storage/Log/Makefile b/apps/tests/storage/Log/Makefile
new file mode 100644
index 00000000..43ed20b8
--- /dev/null
+++ b/apps/tests/storage/Log/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=RandRWAppC
+include $(MAKERULES)
diff --git a/apps/tests/storage/Log/README.txt b/apps/tests/storage/Log/README.txt
new file mode 100644
index 00000000..3176b454
--- /dev/null
+++ b/apps/tests/storage/Log/README.txt
@@ -0,0 +1,39 @@
+README for Log
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+Application to test the LogStorageC abstraction, using the log in linear
+mode. There must be a volumes-<chip>.xml file in this directory describing
+a 256kB volume named LOGTEST for your flash chip.
+
+The mote id is of the form T*100 + k, where k is a random seed and
+T specifies the test to be performed:
+
+T = 0: perform a full test
+T = 1: erase the log
+T = 2: read the log
+T = 3: write some data to the log
+
+The read test expects to see one or more consecutive results of the data
+written by the write test (with the same seed). The last write data can be
+partial.  So, for instance, you could run the test with mote id = 104, then
+304 twice to erase the log and write 2 copies of the data sequence for k =
+4, then run with mote id = 204 to test all these writes. Or you can just
+run the test with mote id = 4 to do a complete test.
+
+If the log fills up (which should take 4 or 5 write operations), the write 
+will fail, but a subsequent read will succeed.
+
+A successful test will turn on the LED 1. A failed test will turn on
+the LED 0. LED 1 blinks during the steps of the full test. A serial
+message whose last byte is 0x80 for success and all other values
+indicate failure is also sent at the end of the test.
+
+Tools:
+
+Known bugs/limitations:
+
+None.
+
+$Id: README.txt,v 1.5 2007-07-09 20:45:54 idgay Exp $
diff --git a/apps/tests/storage/Log/RandRWAppC.nc b/apps/tests/storage/Log/RandRWAppC.nc
new file mode 100644
index 00000000..71658dcd
--- /dev/null
+++ b/apps/tests/storage/Log/RandRWAppC.nc
@@ -0,0 +1,31 @@
+/* $Id: RandRWAppC.nc,v 1.5 2008-06-25 01:29:44 konradlorincz Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Block storage test application. Does a pattern of random reads and
+ * writes, based on mote id. See README.txt for more details.
+ *
+ * @author David Gay
+ */
+
+#include "StorageVolumes.h"
+
+configuration RandRWAppC { }
+implementation {
+  components RandRWC, new LogStorageC(VOLUME_LOGTEST, FALSE),
+    MainC, LedsC, PlatformC, SerialActiveMessageC;
+
+  MainC.Boot <- RandRWC;
+
+  RandRWC.SerialControl -> SerialActiveMessageC;
+  RandRWC.AMSend -> SerialActiveMessageC.AMSend[139];
+  RandRWC.LogRead -> LogStorageC.LogRead;
+  RandRWC.LogWrite -> LogStorageC.LogWrite;
+  RandRWC.Leds -> LedsC;
+}
diff --git a/apps/tests/storage/Log/RandRWC.nc b/apps/tests/storage/Log/RandRWC.nc
new file mode 100644
index 00000000..f1104288
--- /dev/null
+++ b/apps/tests/storage/Log/RandRWC.nc
@@ -0,0 +1,257 @@
+/* $Id: RandRWC.nc,v 1.8 2010-02-10 19:13:06 scipio Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Log storage test application. Does a pattern of random reads and
+ * writes, based on mote id. See README.txt for more details.
+ *
+ * @author David Gay
+ */
+module RandRWC {
+  uses {
+    interface Boot;
+    interface Leds;
+    interface LogRead;
+    interface LogWrite;
+    interface AMSend;
+    interface SplitControl as SerialControl;
+  }
+}
+implementation {
+  enum {
+    SIZE = 1024L * 256,
+    NWRITES = SIZE / 512,
+  };
+
+  uint16_t shiftReg;
+  uint16_t initSeed;
+  uint16_t mask;
+
+  void done();
+
+  /* Return the next 16 bit random number */
+  uint16_t rand() {
+    bool endbit;
+    uint16_t tmpShiftReg;
+
+    tmpShiftReg = shiftReg;
+    endbit = ((tmpShiftReg & 0x8000) != 0);
+    tmpShiftReg <<= 1;
+    if (endbit) 
+      tmpShiftReg ^= 0x100b;
+    tmpShiftReg++;
+    shiftReg = tmpShiftReg;
+    tmpShiftReg = tmpShiftReg ^ mask;
+
+    return tmpShiftReg;
+  }
+
+  void resetSeed() {
+    shiftReg = 119 * 119 * ((TOS_NODE_ID % 100) + 1);
+    initSeed = shiftReg;
+    mask = 137 * 29 * ((TOS_NODE_ID % 100) + 1);
+  }
+  
+  uint8_t data[512], rdata[512];
+  int count, testCount;
+  uint32_t len;
+  uint16_t offset;
+  message_t reportMsg;
+
+  void report(error_t e) {
+    uint8_t *msg = call AMSend.getPayload(&reportMsg, 1);
+
+    if (msg)
+      {
+	msg[0] = e;
+	if (call AMSend.send(AM_BROADCAST_ADDR, &reportMsg, 1) == SUCCESS)
+	  return;
+      }
+    call Leds.led0On();
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t error) {
+    if (error != SUCCESS)
+      call Leds.led0On();
+  }
+
+  void fail(error_t e) {
+    call Leds.led0On();
+    report(e);
+  }
+
+  void success() {
+    call Leds.led1On();
+    report(0x80);
+  }
+
+  bool scheck(error_t r) __attribute__((noinline)) {
+    if (r != SUCCESS)
+      fail(r);
+    return r == SUCCESS;
+  }
+
+  bool bcheck(bool b) {
+    if (!b)
+      fail(FAIL);
+    return b;
+  }
+
+  volatile int x;
+
+  void setParameters() {
+    len = rand() >> 8;
+    offset = rand() >> 9;
+    if ( len > 254 )
+      len = 254;
+    if (offset + len > sizeof data)
+      offset = sizeof data - len;
+  }
+
+  void nextRead() {
+    if (count == NWRITES)
+      count = 0;
+    if (count++ == 0)
+      resetSeed();
+    setParameters();
+    scheck(call LogRead.read(rdata, len));
+  }
+
+  event void LogRead.readDone(void* buf, storage_len_t rlen, error_t result) __attribute__((noinline)) {
+    if (len != 0 && rlen == 0)
+      done();
+    else if (scheck(result) && bcheck(rlen == len && buf == rdata && memcmp(data + offset, rdata, rlen) == 0))
+      nextRead();
+  }
+
+  event void LogRead.seekDone(error_t error) {
+  }
+
+  void nextWrite() {
+    if (count++ == NWRITES)
+      scheck(call LogWrite.sync());
+    else
+      {
+	error_t result;
+	setParameters();
+	result = call LogWrite.append(data + offset, len);
+	if (result == ESIZE) {
+	  // We have reached the end of the log, sync it
+	  scheck(call LogWrite.sync());
+	}
+	else {
+	  scheck(result);
+	}
+      }
+  }
+
+  event void LogWrite.appendDone(void *buf, storage_len_t y, bool recordsLost, error_t result) {
+    if (result == ESIZE)
+      scheck(call LogWrite.sync());
+    else if (scheck(result))
+      nextWrite();
+  }
+
+  event void LogWrite.eraseDone(error_t result) {
+    if (scheck(result))
+      done();
+  }
+
+  event void LogWrite.syncDone(error_t result) {
+    if (scheck(result))
+      done();
+  }
+
+  event void Boot.booted() {
+    int i;
+
+    resetSeed();
+    for (i = 0; i < sizeof data; i++)
+      data[i++] = rand() >> 8;
+
+    call SerialControl.start();
+  }
+
+  event void SerialControl.stopDone(error_t e) { }
+
+  event void SerialControl.startDone(error_t e) {
+    if (e != SUCCESS)
+      {
+	call Leds.led0On();
+	return;
+      }
+
+    testCount = 0;
+    done();
+  }
+
+  enum { A_ERASE = 1, A_READ, A_WRITE };
+
+  void doAction(int act) {
+    switch (act)
+      {
+      case A_ERASE:
+	scheck(call LogWrite.erase());
+	break;
+      case A_WRITE:
+	resetSeed();
+	count = 0;
+	nextWrite();
+	break;
+      case A_READ:
+	resetSeed();
+	count = 0;
+	nextRead();
+	break;
+      }
+  }
+
+  const uint8_t actions[] = {
+    A_ERASE, 
+    A_READ,
+    A_WRITE,
+    A_READ,
+    A_WRITE,
+    A_WRITE,
+    A_WRITE,
+    A_READ,
+    A_ERASE,
+    A_READ,
+    A_WRITE,
+    A_WRITE
+  };
+
+  void done() {
+    uint8_t act = TOS_NODE_ID / 100;
+
+    call Leds.led2Toggle();
+
+    switch (act)
+      {
+      case 0:
+	if (testCount < sizeof actions)
+	  doAction(actions[testCount]);
+	else
+	  success();
+	break;
+
+      case A_ERASE: case A_READ: case A_WRITE:
+	if (testCount)
+	  success();
+	else
+	  doAction(act);
+	break;
+
+      default:
+	fail(FAIL);
+	break;
+      }
+    testCount++;
+  }
+}
diff --git a/apps/tests/storage/Log/volumes-at45db.xml b/apps/tests/storage/Log/volumes-at45db.xml
new file mode 100644
index 00000000..daa0d507
--- /dev/null
+++ b/apps/tests/storage/Log/volumes-at45db.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="LOGTEST" size="262144"/>
+</volume_table>
diff --git a/apps/tests/storage/Log/volumes-pxa27xp30.xml b/apps/tests/storage/Log/volumes-pxa27xp30.xml
new file mode 100644
index 00000000..cc81eb17
--- /dev/null
+++ b/apps/tests/storage/Log/volumes-pxa27xp30.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="LOGTEST" size="2097152"/>
+</volume_table>
diff --git a/apps/tests/storage/Log/volumes-stm25p.xml b/apps/tests/storage/Log/volumes-stm25p.xml
new file mode 100644
index 00000000..dbe926a1
--- /dev/null
+++ b/apps/tests/storage/Log/volumes-stm25p.xml
@@ -0,0 +1,4 @@
+
+<volume_table>
+  <volume name="LOGTEST" size="262144"/>
+</volume_table>
diff --git a/apps/tests/storage/SyncLog/Makefile b/apps/tests/storage/SyncLog/Makefile
new file mode 100644
index 00000000..911fac19
--- /dev/null
+++ b/apps/tests/storage/SyncLog/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=SyncLogAppC
+include $(MAKERULES)
diff --git a/apps/tests/storage/SyncLog/README.txt b/apps/tests/storage/SyncLog/README.txt
new file mode 100644
index 00000000..eb94caf7
--- /dev/null
+++ b/apps/tests/storage/SyncLog/README.txt
@@ -0,0 +1,26 @@
+README for SyncLog
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+Application to test 'sync' functionality in the LogStorageC
+abstraction, using the log in linear mode. There must be a
+volumes-<chip>.xml file in this directory describing a 64kB volume
+named SYNCLOG for your flash chip.
+
+A successful test will send serial messages (id 139) with increasing
+sequence numbers (approximately 2 messages every 5 seconds) - the
+easiest way to see these messages is to connect the mote with the
+SyncLog code to your PC and run the java Listen tool:
+  MOTECOM=serial@<your mote details> java net.tinyos.tools.Listen
+
+This test is based on code and a bug report from Mayur Maheshwari
+(mayur.maheshwari@gmail.com).
+
+Tools:
+
+Known bugs/limitations:
+
+None.
+
+$Id: README.txt,v 1.3 2008-06-25 01:29:44 konradlorincz Exp $
diff --git a/apps/tests/storage/SyncLog/SyncLogAppC.nc b/apps/tests/storage/SyncLog/SyncLogAppC.nc
new file mode 100644
index 00000000..5332eb97
--- /dev/null
+++ b/apps/tests/storage/SyncLog/SyncLogAppC.nc
@@ -0,0 +1,26 @@
+/**
+ * Test reading and writing to a log with lots of syncs. See README.txt for
+ * more details.
+ *
+ * @author Mayur Maheshwari (mayur.maheshwari@gmail.com)
+ * @author David Gay
+ */
+
+#include "StorageVolumes.h"
+
+configuration SyncLogAppC { }
+implementation {
+  components SyncLogC,
+    new TimerMilliC() as Timer0, new TimerMilliC() as Timer1,
+    new LogStorageC(VOLUME_SYNCLOG, FALSE), SerialActiveMessageC,
+    MainC, LedsC;
+
+  SyncLogC.Leds -> LedsC;
+  SyncLogC.Boot -> MainC;
+  SyncLogC.Timer0 -> Timer0;
+  SyncLogC.Timer1 -> Timer1;
+  SyncLogC.LogWrite -> LogStorageC;
+  SyncLogC.LogRead -> LogStorageC;
+  SyncLogC.AMSend -> SerialActiveMessageC.AMSend[139];
+  SyncLogC.AMControl -> SerialActiveMessageC;
+}
diff --git a/apps/tests/storage/SyncLog/SyncLogC.nc b/apps/tests/storage/SyncLog/SyncLogC.nc
new file mode 100644
index 00000000..3bd9b1ff
--- /dev/null
+++ b/apps/tests/storage/SyncLog/SyncLogC.nc
@@ -0,0 +1,122 @@
+/**
+ * Test reading and writing to a log with lots of syncs. See README.txt for
+ * more details.
+ *
+ * @author Mayur Maheshwari (mayur.maheshwari@gmail.com)
+ * @author David Gay
+ */
+
+module SyncLogC
+{
+  uses {
+    interface Leds;
+    interface Boot;
+    interface SplitControl as AMControl;
+    interface LogWrite;
+    interface LogRead;
+    interface Timer<TMilli> as Timer0;
+    interface Timer<TMilli> as Timer1;
+    interface AMSend;
+  }
+}
+implementation {
+
+  uint16_t data = 0;
+  uint16_t readings = 0;
+  message_t pkt;
+  bool busy = FALSE;
+  bool logBusy = FALSE;
+
+  task void sendTask();
+
+  storage_cookie_t readCookie;
+  storage_cookie_t writeCookie;
+
+#define SAMPLING_FREQUENCY 2333
+#define TIMER_PERIOD_MILLI 5120
+
+  event void Boot.booted() {
+    call AMControl.start();
+  }
+
+  event void AMControl.startDone(error_t err) {
+    if (err == SUCCESS)
+      call LogWrite.erase();
+    else
+      call AMControl.start();
+  }
+
+  event void LogWrite.eraseDone(error_t result) {
+    call Timer1.startPeriodic(SAMPLING_FREQUENCY);
+    call Timer0.startPeriodic(TIMER_PERIOD_MILLI);
+  }
+  
+  event void Timer1.fired()
+  {
+    readings++;
+    if (!logBusy)
+      {
+	logBusy = TRUE;
+	call LogWrite.append(&readings, sizeof(readings));
+      }
+  }
+
+  event void LogWrite.appendDone(void *buf, storage_len_t len, bool recordsLost, error_t result) {
+    if (result == SUCCESS)
+      call LogWrite.sync();
+  }
+
+  event void LogWrite.syncDone(error_t result) {
+    logBusy = FALSE;
+    call Leds.led2Toggle();
+  }
+
+  event void Timer0.fired() {
+    call Timer1.stop();
+    if (!logBusy)
+      {
+	call Leds.led0Toggle();
+	logBusy = TRUE;
+	call LogRead.read(&data, sizeof data);
+      }
+  }
+
+  event void LogRead.readDone(void* buf, storage_len_t len, error_t error) {
+    if (error == SUCCESS)
+      if (len == sizeof data)
+	post sendTask();
+      else
+	{
+	  logBusy = FALSE;
+	  call Timer1.startPeriodic(SAMPLING_FREQUENCY);
+	}
+  }
+
+  typedef nx_struct {
+    nx_uint16_t nodeid;
+    nx_uint16_t payloadData;
+  } SenseStoreRadioMsg;
+
+  task void sendTask() {
+    if (!busy)
+      {
+	SenseStoreRadioMsg* ssrpkt =
+	  (SenseStoreRadioMsg*)(call AMSend.getPayload(&pkt, sizeof(SenseStoreRadioMsg)));
+	ssrpkt->nodeid = TOS_NODE_ID;
+	ssrpkt->payloadData = data;
+	if (call AMSend.send(AM_BROADCAST_ADDR, &pkt, sizeof(SenseStoreRadioMsg)) == SUCCESS)
+	  busy = TRUE;
+      }
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t err) {
+    if (&pkt == msg)
+      {
+	busy = FALSE;
+	call LogRead.read(&data, sizeof data);
+      }
+  }
+
+  event void LogRead.seekDone(error_t error) { }
+  event void AMControl.stopDone(error_t err) { }
+}
diff --git a/apps/tests/storage/SyncLog/volumes-at45db.xml b/apps/tests/storage/SyncLog/volumes-at45db.xml
new file mode 100644
index 00000000..d5dd77c2
--- /dev/null
+++ b/apps/tests/storage/SyncLog/volumes-at45db.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="SYNCLOG" size="65536"/>
+</volume_table>
diff --git a/apps/tests/storage/SyncLog/volumes-pxa27xp30.xml b/apps/tests/storage/SyncLog/volumes-pxa27xp30.xml
new file mode 100644
index 00000000..cbb856b3
--- /dev/null
+++ b/apps/tests/storage/SyncLog/volumes-pxa27xp30.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="SYNCLOG" size="2097152"/>
+</volume_table>
diff --git a/apps/tests/storage/SyncLog/volumes-stm25p.xml b/apps/tests/storage/SyncLog/volumes-stm25p.xml
new file mode 100644
index 00000000..d5dd77c2
--- /dev/null
+++ b/apps/tests/storage/SyncLog/volumes-stm25p.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="SYNCLOG" size="65536"/>
+</volume_table>
diff --git a/apps/tests/telosb/TestUserButton/Makefile b/apps/tests/telosb/TestUserButton/Makefile
new file mode 100644
index 00000000..3a969039
--- /dev/null
+++ b/apps/tests/telosb/TestUserButton/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestUserButtonAppC
+
+include $(MAKERULES)
diff --git a/apps/tests/telosb/TestUserButton/TestUserButtonAppC.nc b/apps/tests/telosb/TestUserButton/TestUserButtonAppC.nc
new file mode 100644
index 00000000..de642216
--- /dev/null
+++ b/apps/tests/telosb/TestUserButton/TestUserButtonAppC.nc
@@ -0,0 +1,58 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Test for the user button on the telosb platform. Turns blue when
+ * the button is pressed. Samples the button state every 4 seconds,
+ * and turns green when the button is pressed.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+configuration TestUserButtonAppC {}
+implementation {
+
+  components TestUserButtonC;
+
+  components MainC;
+  TestUserButtonC.Boot -> MainC;
+  
+  components UserButtonC;
+  TestUserButtonC.Get -> UserButtonC;
+  TestUserButtonC.Notify -> UserButtonC;
+
+  components LedsC;
+  TestUserButtonC.Leds -> LedsC;
+
+  components new TimerMilliC();
+  TestUserButtonC.Timer -> TimerMilliC;
+}
\ No newline at end of file
diff --git a/apps/tests/telosb/TestUserButton/TestUserButtonC.nc b/apps/tests/telosb/TestUserButton/TestUserButtonC.nc
new file mode 100644
index 00000000..3e4b17e6
--- /dev/null
+++ b/apps/tests/telosb/TestUserButton/TestUserButtonC.nc
@@ -0,0 +1,79 @@
+#include <Timer.h>
+#include <UserButton.h>
+
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Test for the user button on the telosb platform. Turns blue when
+ * the button is pressed. Samples the button state every 4 seconds,
+ * and turns green when the button is pressed.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+module TestUserButtonC {
+  uses {
+    interface Boot;
+    interface Get<button_state_t>;
+    interface Notify<button_state_t>;
+    interface Leds;
+    interface Timer<TMilli>;
+  }
+}
+implementation {
+  event void Boot.booted() {
+    call Notify.enable();
+    call Timer.startPeriodic( 4096 );
+  }
+  
+  event void Notify.notify( button_state_t state ) {
+    if ( state == BUTTON_PRESSED ) {
+      call Leds.led2On();
+    } else if ( state == BUTTON_RELEASED ) {
+      call Leds.led2Off();
+    }
+  }
+
+  event void Timer.fired() {    
+    button_state_t bs;
+
+    bs = call Get.get();
+
+    if ( bs == BUTTON_PRESSED ) {
+      call Leds.led1On();
+    } else if ( bs == BUTTON_RELEASED ) {
+      call Leds.led1Off();
+    }
+  }
+}
+
diff --git a/apps/tests/tkn154/Makefile.include b/apps/tests/tkn154/Makefile.include
new file mode 100644
index 00000000..2f2e9b78
--- /dev/null
+++ b/apps/tests/tkn154/Makefile.include
@@ -0,0 +1,37 @@
+PLATFORMS = telosb micaz
+TKN154_PLATFORM_INCLUDE?=$(TOSDIR)/platforms/$(PLATFORM)/mac/tkn154/Makefile.include
+
+CFLAGS += -I$(TOSDIR)/lib/mac/tkn154 \
+	-I$(TOSDIR)/lib/mac/tkn154/dummies \
+	-I$(TOSDIR)/lib/mac/tkn154/interfaces/MCPS \
+	-I$(TOSDIR)/lib/mac/tkn154/interfaces/MLME \
+	-I$(TOSDIR)/lib/mac/tkn154/interfaces/private \
+	-I$(TOSDIR)/lib/mac/tkn154/interfaces/public
+
+TOSMAKE_PATH += $(TOSDIR)/../apps/tests/tkn154/extras
+
+# legacy
+ifdef IEEE154_EXTENDED_ADDRESS
+$(error To set the extended address of a device to X pass 'extaddr,X' to the make system (e.g. "make telosb extaddr,0x012345"))
+endif
+
+# legacy
+ifdef TKN154_DEBUG
+$(error To enable debug mode pass 'tkn154debug' to the make system (e.g. "make telosb tkn154debug"))
+endif
+
+# parses the PLATFORM variable
+include $(MAKERULES)
+
+# checks whether the target platform is supported by the application;
+# the application Makefile can define PLATFORMS as a whitespace-separated
+# list of supported platforms
+ifneq ($(PLATFORM),)
+  ifneq ($(PLATFORMS),)
+    ifeq ($(strip $(foreach platform,$(PLATFORMS),$(findstring $(platform),$(PLATFORM)))),)
+      $(error The target platform is not supported by this application - supported platforms are: $(PLATFORMS))
+    endif
+  endif
+  include $(TKN154_PLATFORM_INCLUDE)
+endif
+
diff --git a/apps/tests/tkn154/README.txt b/apps/tests/tkn154/README.txt
new file mode 100644
index 00000000..22478c7c
--- /dev/null
+++ b/apps/tests/tkn154/README.txt
@@ -0,0 +1,29 @@
+README for tkn154 test applications
+Author/Contact: Jan Hauer <hauer@tkn.tu-berlin.de>
+
+Description:
+
+This folder contains test applications for "TKN15.4", a platform-independent
+IEEE 802.15.4-2006 MAC implementation. Applications that use the beacon-enabled
+mode are located in the "beacon-enabled" folder, applications that use the
+nonbeacon-enabled mode are in the "nonbeacon-enabled" folder. Every test
+application resides in a separate subdirectory which includes a README.txt
+describing what it does and how it can be installed.
+
+The TKN15.4 implementation can be found in tinyos-2.x/tos/lib/mac/tkn154
+(start with the README.txt in that directory).
+
+If you pass "tkn154debug" to the make system, then a debug mode is enabled,
+where useful information is sent over the serial line and can be displayed
+with the java PrintfClient (see TinyOS tutorial "The TinyOS printf Library").
+Example: "make telosb install tkn154debug"
+To display debug messages run (replace XXX):
+  "java net.tinyos.tools.PrintfClient -comm serial@/dev/ttyUSBXXX:telosb"
+
+Note: TEP3 recommends that interface names "should be mixed case, starting
+upper case". To match the syntax used in the IEEE 802.15.4 standard the
+interfaces provided by the MAC to the next higher layer deviate from this
+convention (they are all caps, e.g. MLME_START).
+
+$Id: README.txt,v 1.4 2010-01-05 17:12:57 janhauer Exp $
+
diff --git a/apps/tests/tkn154/beacon-enabled/TestAssociate/README.txt b/apps/tests/tkn154/beacon-enabled/TestAssociate/README.txt
new file mode 100644
index 00000000..cbea6fc5
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestAssociate/README.txt
@@ -0,0 +1,44 @@
+README for TestAssociate
+Author/Contact: Jan Hauer <hauer@tkn.tu-berlin.de>
+
+Description:
+
+In this application one node takes the role of a PAN coordinator in a
+beacon-enabled 802.15.4 PAN, it transmits periodic beacons and waits for
+devices to request association to its PAN. Whenever a device tries to
+associate, the PAN coordinator accepts the association and assigns to the
+device a unique short address (starting from zero, incremented for every new
+association request). A second node acts as a device, it first scans the
+pre-defined channel for beacons from the coordinator and once it finds a beacon
+it tries to associate to the PAN. A short time after association the device
+then disassociates from the PAN. 
+
+Criteria for a successful test:
+
+Both, coordinator and device, should toggle LED1 in unison about once every 5 
+seconds. The coordinator should also toggle LED2 every second.
+
+
+Tools: NONE
+
+Usage: 
+
+1. Install the coordinator:
+
+    $ cd coordinator; make <platform> install
+
+2. Install one (or more) devices:
+
+    $ cd device; make <platform> install
+
+You can change some of the configuration parameters in app_profile.h
+
+Known bugs/limitations:
+
+- Many TinyOS 2 platforms do not have a clock that satisfies the
+  precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 
+  62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing 
+  is not standard compliant
+
+$Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $o
+
diff --git a/apps/tests/tkn154/beacon-enabled/TestAssociate/app_profile.h b/apps/tests/tkn154/beacon-enabled/TestAssociate/app_profile.h
new file mode 100644
index 00000000..2305b52b
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestAssociate/app_profile.h
@@ -0,0 +1,47 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:54 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __APP_PROFILE_H
+#define __APP_PROFILE_H
+
+enum {
+  RADIO_CHANNEL = 26,
+  PAN_ID = 0x1238,
+  COORDINATOR_ADDRESS = 0x9182,
+  BEACON_ORDER = 6,
+  SUPERFRAME_ORDER = 6,
+};
+
+#endif
diff --git a/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/Makefile b/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/Makefile
new file mode 100644
index 00000000..c4d5d67c
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestAssociateAppC
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/TestAssociateAppC.nc b/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/TestAssociateAppC.nc
new file mode 100644
index 00000000..5fc88d46
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/TestAssociateAppC.nc
@@ -0,0 +1,54 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration TestAssociateAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154BeaconEnabledC as MAC;
+  components TestCoordC as App;
+
+  MainC.Boot <- App;
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+
+  App.MLME_START -> MAC;
+  App.MLME_ASSOCIATE -> MAC;
+  App.MLME_DISASSOCIATE -> MAC;
+  App.MLME_COMM_STATUS -> MAC;
+  App.Frame -> MAC;
+  App.IEEE154TxBeaconPayload -> MAC;
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/TestCoordC.nc b/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/TestCoordC.nc
new file mode 100644
index 00000000..3a38efe3
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestAssociate/coordinator/TestCoordC.nc
@@ -0,0 +1,148 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2010-01-05 17:12:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154.h"
+#include "app_profile.h"
+module TestCoordC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_START;
+    interface MLME_ASSOCIATE;
+    interface MLME_DISASSOCIATE;
+    interface MLME_COMM_STATUS;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface IEEE154Frame as Frame;
+    interface IEEE154TxBeaconPayload;
+    interface Leds;
+  }
+} implementation {
+
+  uint16_t m_assignedShortAddress;
+
+  event void Boot.booted() {
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status != IEEE154_SUCCESS)
+      return;
+    call MLME_SET.macShortAddress(COORDINATOR_ADDRESS);
+    call MLME_SET.macAssociationPermit(TRUE);
+    call MLME_START.request(
+                          PAN_ID,           // PANId
+                          RADIO_CHANNEL,    // LogicalChannel
+                          0,                // ChannelPage,
+                          0,                // StartTime,
+                          BEACON_ORDER,     // BeaconOrder
+                          SUPERFRAME_ORDER, // SuperframeOrder
+                          TRUE,             // PANCoordinator
+                          FALSE,            // BatteryLifeExtension
+                          FALSE,            // CoordRealignment
+                          0,                // no realignment security
+                          0                 // no beacon security
+                        );
+  }
+
+  event void MLME_START.confirm(ieee154_status_t status) { }
+
+  event void MLME_ASSOCIATE.indication (
+                          uint64_t DeviceAddress,
+                          ieee154_CapabilityInformation_t CapabilityInformation,
+                          ieee154_security_t *security
+                        )
+  {
+    call MLME_ASSOCIATE.response(DeviceAddress, m_assignedShortAddress++, IEEE154_ASSOCIATION_SUCCESSFUL, 0);
+  }
+
+  event void MLME_DISASSOCIATE.indication (
+                          uint64_t DeviceAddress,
+                          ieee154_disassociation_reason_t DisassociateReason,
+                          ieee154_security_t *security
+                        )
+  {
+    call Leds.led1Off();
+  }
+
+
+  event void MLME_COMM_STATUS.indication (
+                          uint16_t PANId,
+                          uint8_t SrcAddrMode,
+                          ieee154_address_t SrcAddr,
+                          uint8_t DstAddrMode,
+                          ieee154_address_t DstAddr,
+                          ieee154_status_t status,
+                          ieee154_security_t *security
+                        )
+  {
+    if (status == IEEE154_SUCCESS){
+      // association was successful
+      call Leds.led1On();
+    } else {
+      call Leds.led1Off();
+    }
+  }
+
+  event void MLME_DISASSOCIATE.confirm    (
+                          ieee154_status_t status,
+                          uint8_t DeviceAddrMode,
+                          uint16_t DevicePANID,
+                          ieee154_address_t DeviceAddress
+                        ){}
+
+  event void MLME_ASSOCIATE.confirm    (
+                          uint16_t AssocShortAddress,
+                          uint8_t status,
+                          ieee154_security_t *security
+                        ){}
+
+  event void IEEE154TxBeaconPayload.aboutToTransmit() { }
+
+  event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { }
+
+  event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { }
+
+  event void IEEE154TxBeaconPayload.beaconTransmitted() 
+  {
+    ieee154_macBSN_t beaconSequenceNumber = call MLME_GET.macBSN();
+    if (beaconSequenceNumber & 1)
+      call Leds.led2On();
+    else
+      call Leds.led2Off();
+  }  
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestAssociate/device/Makefile b/apps/tests/tkn154/beacon-enabled/TestAssociate/device/Makefile
new file mode 100644
index 00000000..7c0acfe3
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestAssociate/device/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestAssociateAppC
+PFLAGS += -DIEEE154_BEACON_TX_DISABLED
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/beacon-enabled/TestAssociate/device/TestAssociateAppC.nc b/apps/tests/tkn154/beacon-enabled/TestAssociate/device/TestAssociateAppC.nc
new file mode 100644
index 00000000..02283f56
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestAssociate/device/TestAssociateAppC.nc
@@ -0,0 +1,58 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration TestAssociateAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154BeaconEnabledC as MAC,
+             new Timer62500C() as Timer;
+  components TestDeviceC as App;
+
+  MainC.Boot <- App;
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  App.DisassociateTimer -> Timer;  
+  App.MLME_SCAN -> MAC;
+  App.MLME_SYNC -> MAC;
+  App.MLME_BEACON_NOTIFY -> MAC;
+  App.MLME_SYNC_LOSS -> MAC;
+  App.MLME_ASSOCIATE -> MAC;
+  App.MLME_DISASSOCIATE -> MAC;
+  App.MLME_COMM_STATUS -> MAC;
+  App.BeaconFrame -> MAC;
+
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestAssociate/device/TestDeviceC.nc b/apps/tests/tkn154/beacon-enabled/TestAssociate/device/TestDeviceC.nc
new file mode 100644
index 00000000..35da7665
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestAssociate/device/TestDeviceC.nc
@@ -0,0 +1,238 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2010-01-05 17:12:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154.h"
+#include "app_profile.h"
+module TestDeviceC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface MLME_SCAN;
+    interface MLME_SYNC;
+    interface MLME_ASSOCIATE;
+    interface MLME_DISASSOCIATE;
+    interface MLME_COMM_STATUS;
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_SYNC_LOSS;
+    interface Leds;
+    interface IEEE154BeaconFrame as BeaconFrame;
+    interface Timer<T62500hz> as DisassociateTimer;
+  }
+} implementation {
+
+  ieee154_CapabilityInformation_t m_capabilityInformation;
+  ieee154_PANDescriptor_t m_PANDescriptor;
+  bool m_wasScanSuccessful;
+  void startApp();
+
+  event void Boot.booted() {
+    m_capabilityInformation.AlternatePANCoordinator = 0;
+    m_capabilityInformation.DeviceType = 0;
+    m_capabilityInformation.PowerSource = 0;
+    m_capabilityInformation.ReceiverOnWhenIdle = 0;
+    m_capabilityInformation.Reserved = 0;
+    m_capabilityInformation.SecurityCapability = 0;
+    m_capabilityInformation.AllocateAddress = 1;    
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status == IEEE154_SUCCESS)
+      startApp();
+  }
+
+  void startApp()
+  {
+    ieee154_phyChannelsSupported_t channel;
+    uint8_t scanDuration = BEACON_ORDER; 
+
+    // scan only one channel (to save time)
+    channel = ((uint32_t) 1) << RADIO_CHANNEL;
+
+    // we want all received beacons to be signalled 
+    // through the MLME_BEACON_NOTIFY interface, i.e.
+    // we set the macAutoRequest attribute to FALSE
+    call MLME_SET.macAutoRequest(FALSE);
+    m_wasScanSuccessful = FALSE;
+    call MLME_SCAN.request  (
+                           PASSIVE_SCAN,           // ScanType
+                           channel,                // ScanChannels
+                           scanDuration,           // ScanDuration
+                           0x00,                   // ChannelPage
+                           0,                      // EnergyDetectListNumEntries
+                           NULL,                   // EnergyDetectList
+                           0,                      // PANDescriptorListNumEntries
+                           NULL,                   // PANDescriptorList
+                           NULL                    // security
+                        );
+  }
+
+  event message_t* MLME_BEACON_NOTIFY.indication (message_t* frame)
+  {
+    // received a beacon frame
+    ieee154_phyCurrentPage_t page = call MLME_GET.phyCurrentPage();
+
+    if (!m_wasScanSuccessful) {
+      if (call BeaconFrame.parsePANDescriptor(
+            frame, RADIO_CHANNEL, page, &m_PANDescriptor) == SUCCESS){
+        // let's see if the beacon is from the coordinator we expect...
+        if (m_PANDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS &&
+            m_PANDescriptor.CoordPANId == PAN_ID &&
+            m_PANDescriptor.CoordAddress.shortAddress == COORDINATOR_ADDRESS){
+          // yes - wait until SCAN is finished, then syncronize to beacons
+          m_wasScanSuccessful = TRUE;
+        }
+      }
+    }
+
+    return frame;
+  }
+
+  event void MLME_SCAN.confirm    (
+                          ieee154_status_t status,
+                          uint8_t ScanType,
+                          uint8_t ChannelPage,
+                          uint32_t UnscannedChannels,
+                          uint8_t EnergyDetectListNumEntries,
+                          int8_t* EnergyDetectList,
+                          uint8_t PANDescriptorListNumEntries,
+                          ieee154_PANDescriptor_t* PANDescriptorList
+                        )
+  {
+    if (m_wasScanSuccessful) {
+      call MLME_SET.macPANId(m_PANDescriptor.CoordPANId);
+      call MLME_SET.macCoordShortAddress(m_PANDescriptor.CoordAddress.shortAddress);
+      call MLME_SYNC.request(m_PANDescriptor.LogicalChannel, m_PANDescriptor.ChannelPage, TRUE);
+      call MLME_ASSOCIATE.request(
+          m_PANDescriptor.LogicalChannel,
+          m_PANDescriptor.ChannelPage,
+          m_PANDescriptor.CoordAddrMode,
+          m_PANDescriptor.CoordPANId,
+          m_PANDescriptor.CoordAddress,
+          m_capabilityInformation,
+          NULL  // security
+          );
+    } else
+      startApp();
+  }
+
+  event void MLME_ASSOCIATE.confirm    (
+                          uint16_t AssocShortAddress,
+                          uint8_t status,
+                          ieee154_security_t *security
+                        )
+  {
+    if ( status == IEEE154_SUCCESS ) {
+      // we are now associated - set a timer for disassociation 
+      call Leds.led1On();
+      call DisassociateTimer.startOneShot(312500U);
+    } else {
+      call MLME_ASSOCIATE.request(
+          m_PANDescriptor.LogicalChannel,
+          m_PANDescriptor.ChannelPage,
+          m_PANDescriptor.CoordAddrMode,
+          m_PANDescriptor.CoordPANId,
+          m_PANDescriptor.CoordAddress,
+          m_capabilityInformation,
+          NULL  // security
+          );
+    }
+  }
+
+  event void DisassociateTimer.fired()
+  {
+    if (call MLME_DISASSOCIATE.request  (
+        m_PANDescriptor.CoordAddrMode,
+        m_PANDescriptor.CoordPANId,
+        m_PANDescriptor.CoordAddress,
+        IEEE154_DEVICE_WISHES_TO_LEAVE,
+        FALSE,
+        NULL
+        ) != IEEE154_SUCCESS)
+      call DisassociateTimer.startOneShot(312500U);
+  }
+
+  event void MLME_DISASSOCIATE.confirm    (
+                          ieee154_status_t status,
+                          uint8_t DeviceAddrMode,
+                          uint16_t DevicePANID,
+                          ieee154_address_t DeviceAddress
+                        )
+  {
+    if (status == IEEE154_SUCCESS){
+      call Leds.led1Off();
+    } else {
+      call DisassociateTimer.startOneShot(312500U);
+    }
+  }
+
+  event void MLME_ASSOCIATE.indication (
+                          uint64_t DeviceAddress,
+                          ieee154_CapabilityInformation_t CapabilityInformation,
+                          ieee154_security_t *security
+                        ){}  
+
+  event void MLME_SYNC_LOSS.indication(
+                          ieee154_status_t lossReason,
+                          uint16_t PANId,
+                          uint8_t LogicalChannel,
+                          uint8_t ChannelPage,
+                          ieee154_security_t *security)
+  {
+    startApp();
+  }
+
+  event void MLME_DISASSOCIATE.indication (
+                          uint64_t DeviceAddress,
+                          ieee154_disassociation_reason_t DisassociateReason,
+                          ieee154_security_t *security
+                        ){}
+
+
+  event void MLME_COMM_STATUS.indication (
+                          uint16_t PANId,
+                          uint8_t SrcAddrMode,
+                          ieee154_address_t SrcAddr,
+                          uint8_t DstAddrMode,
+                          ieee154_address_t DstAddr,
+                          ieee154_status_t status,
+                          ieee154_security_t *security
+                        )
+  {
+  }
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestData/README.txt b/apps/tests/tkn154/beacon-enabled/TestData/README.txt
new file mode 100644
index 00000000..10cf96bc
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestData/README.txt
@@ -0,0 +1,47 @@
+README for TestData
+Author/Contact: Jan Hauer <hauer@tkn.tu-berlin.de>
+
+Description:
+
+In this application one node takes the role of a PAN coordinator in a
+beacon-enabled 802.15.4 PAN, it transmits periodic beacons and waits for
+incoming DATA frames. A second node acts as a device, it first scans the
+pre-defined channel for beacons from the coordinator and once it finds a beacon
+it tries to synchronize to and track all future beacons. It then starts to
+transmit DATA frames to the coordinator as fast as possible (direct
+transmission in the contention access period, CAP).
+
+Criteria for a successful test:
+
+Coordinator and device should both toggle LED2 about twice per second in
+unison. They should also each toggle LED1 about 5 times per second (but
+not necessarily in unison). Note: the nodes should be close to each other, 
+because the transmission power is reduced to -20 dBm.
+
+
+Tools: NONE
+
+Usage: 
+
+1. Install the coordinator:
+
+    $ cd coordinator; make <platform> install
+
+2. Install one or more devices
+
+    $ cd device; make <platform> install,X
+
+    where X is a pre-assigned short address and should be different 
+    for every device.
+
+You can change some of the configuration parameters in app_profile.h
+
+Known bugs/limitations:
+
+- Many TinyOS 2 platforms do not have a clock that satisfies the
+  precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 
+  62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing 
+  is not standard compliant
+
+$Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $o
+
diff --git a/apps/tests/tkn154/beacon-enabled/TestData/app_profile.h b/apps/tests/tkn154/beacon-enabled/TestData/app_profile.h
new file mode 100644
index 00000000..6d7ca9c6
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestData/app_profile.h
@@ -0,0 +1,48 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2010-01-05 17:12:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __APP_PROFILE_H
+#define __APP_PROFILE_H
+
+enum {
+  RADIO_CHANNEL = 26,
+  PAN_ID = 0x8172,
+  COORDINATOR_ADDRESS = 0x4331,
+  BEACON_ORDER = 5,
+  SUPERFRAME_ORDER = 5,
+  TX_POWER = -20, // in dBm
+};
+
+#endif
diff --git a/apps/tests/tkn154/beacon-enabled/TestData/coordinator/Makefile b/apps/tests/tkn154/beacon-enabled/TestData/coordinator/Makefile
new file mode 100644
index 00000000..1a86b20c
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestData/coordinator/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestDataAppC
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/beacon-enabled/TestData/coordinator/TestCoordReceiverC.nc b/apps/tests/tkn154/beacon-enabled/TestData/coordinator/TestCoordReceiverC.nc
new file mode 100644
index 00000000..5a144540
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestData/coordinator/TestCoordReceiverC.nc
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2010-01-05 17:12:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154.h"
+#include "app_profile.h"
+module TestCoordReceiverC
+{
+  uses {
+    interface Boot;
+    interface MCPS_DATA;
+    interface MLME_RESET;
+    interface MLME_START;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface IEEE154Frame as Frame;
+    interface IEEE154TxBeaconPayload;
+    interface Leds;
+  }
+} implementation {
+
+  bool m_ledCount;
+
+  event void Boot.booted() {
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status != IEEE154_SUCCESS)
+      return;
+    call MLME_SET.phyTransmitPower(TX_POWER);
+    call MLME_SET.macShortAddress(COORDINATOR_ADDRESS);
+    call MLME_SET.macAssociationPermit(FALSE);
+    call MLME_START.request(
+                          PAN_ID,               // PANId
+                          RADIO_CHANNEL,        // LogicalChannel
+                          0,                    // ChannelPage,
+                          0,                    // StartTime,
+                          BEACON_ORDER,         // BeaconOrder
+                          SUPERFRAME_ORDER,     // SuperframeOrder
+                          TRUE,                 // PANCoordinator
+                          FALSE,                // BatteryLifeExtension
+                          FALSE,                // CoordRealignment
+                          0,                    // CoordRealignSecurity,
+                          0                     // BeaconSecurity
+                        );
+  }
+
+  event message_t* MCPS_DATA.indication ( message_t* frame )
+  {
+    if (m_ledCount++ == 20){
+      m_ledCount = 0;
+      call Leds.led1Toggle();
+    }
+    return frame;
+  }
+
+  event void MLME_START.confirm(ieee154_status_t status) {}
+
+  event void MCPS_DATA.confirm(
+                          message_t *msg,
+                          uint8_t msduHandle,
+                          ieee154_status_t status,
+                          uint32_t Timestamp
+                        ){}
+
+  event void IEEE154TxBeaconPayload.aboutToTransmit() { }
+
+  event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { }
+
+  event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { }
+
+  event void IEEE154TxBeaconPayload.beaconTransmitted() 
+  {
+    ieee154_macBSN_t beaconSequenceNumber = call MLME_GET.macBSN();
+    if (beaconSequenceNumber & 1)
+      call Leds.led2On();
+    else
+      call Leds.led2Off();
+  }  
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestData/coordinator/TestDataAppC.nc b/apps/tests/tkn154/beacon-enabled/TestData/coordinator/TestDataAppC.nc
new file mode 100644
index 00000000..782004d1
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestData/coordinator/TestDataAppC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "app_profile.h"
+configuration TestDataAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154BeaconEnabledC as MAC;
+
+  components TestCoordReceiverC as App;
+  App.MLME_START -> MAC;
+  App.MCPS_DATA -> MAC;
+  App.Frame -> MAC;
+
+  MainC.Boot <- App;
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  App.IEEE154TxBeaconPayload -> MAC;
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestData/device/Makefile b/apps/tests/tkn154/beacon-enabled/TestData/device/Makefile
new file mode 100644
index 00000000..ba70c9ba
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestData/device/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestDataAppC
+PFLAGS += -DIEEE154_BEACON_TX_DISABLED 
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/beacon-enabled/TestData/device/TestDataAppC.nc b/apps/tests/tkn154/beacon-enabled/TestData/device/TestDataAppC.nc
new file mode 100644
index 00000000..e08292ea
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestData/device/TestDataAppC.nc
@@ -0,0 +1,56 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "app_profile.h"
+configuration TestDataAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154BeaconEnabledC as MAC;
+
+  components TestDeviceSenderC as App;
+  App.MLME_SCAN -> MAC;
+  App.MLME_SYNC -> MAC;
+  App.MLME_BEACON_NOTIFY -> MAC;
+  App.MLME_SYNC_LOSS -> MAC;
+  App.MCPS_DATA -> MAC;
+  App.Frame -> MAC;
+  App.BeaconFrame -> MAC;
+  App.Packet -> MAC;
+
+  MainC.Boot <- App;
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestData/device/TestDeviceSenderC.nc b/apps/tests/tkn154/beacon-enabled/TestData/device/TestDeviceSenderC.nc
new file mode 100644
index 00000000..36fb5b40
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestData/device/TestDeviceSenderC.nc
@@ -0,0 +1,217 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2010-01-05 17:12:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154.h"
+#include "app_profile.h"
+module TestDeviceSenderC
+{
+  uses {
+    interface Boot;
+    interface MCPS_DATA;
+    interface MLME_RESET;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface MLME_SCAN;
+    interface MLME_SYNC;
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_SYNC_LOSS;
+    interface IEEE154Frame as Frame;
+    interface IEEE154BeaconFrame as BeaconFrame;
+    interface Leds;
+    interface Packet;
+  }
+} implementation {
+
+  message_t m_frame;
+  uint8_t m_payloadLen;
+  ieee154_PANDescriptor_t m_PANDescriptor;
+  bool m_ledCount;
+  bool m_wasScanSuccessful;
+
+  void startApp();
+  task void packetSendTask();
+
+
+  event void Boot.booted() {
+    char payload[] = "Hello Coordinator!";
+    uint8_t *payloadRegion;
+
+    m_payloadLen = strlen(payload);
+    payloadRegion = call Packet.getPayload(&m_frame, m_payloadLen);
+    if (m_payloadLen <= call Packet.maxPayloadLength()){
+      memcpy(payloadRegion, payload, m_payloadLen);
+      call MLME_RESET.request(TRUE);
+    }
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status == IEEE154_SUCCESS)
+      startApp();
+  }
+
+  void startApp()
+  {
+    ieee154_phyChannelsSupported_t channelMask;
+    uint8_t scanDuration = BEACON_ORDER;
+
+    call MLME_SET.phyTransmitPower(TX_POWER);
+    call MLME_SET.macShortAddress(TOS_NODE_ID);
+
+    // scan only the channel where we expect the coordinator
+    channelMask = ((uint32_t) 1) << RADIO_CHANNEL;
+
+    // we want all received beacons to be signalled 
+    // through the MLME_BEACON_NOTIFY interface, i.e.
+    // we set the macAutoRequest attribute to FALSE
+    call MLME_SET.macAutoRequest(FALSE);
+    m_wasScanSuccessful = FALSE;
+    call MLME_SCAN.request  (
+                           PASSIVE_SCAN,           // ScanType
+                           channelMask,            // ScanChannels
+                           scanDuration,           // ScanDuration
+                           0x00,                   // ChannelPage
+                           0,                      // EnergyDetectListNumEntries
+                           NULL,                   // EnergyDetectList
+                           0,                      // PANDescriptorListNumEntries
+                           NULL,                   // PANDescriptorList
+                           0                       // security
+                        );
+  }
+
+  event message_t* MLME_BEACON_NOTIFY.indication (message_t* frame)
+  {
+    // received a beacon frame
+    ieee154_phyCurrentPage_t page = call MLME_GET.phyCurrentPage();
+    ieee154_macBSN_t beaconSequenceNumber = call BeaconFrame.getBSN(frame);
+
+    if (!m_wasScanSuccessful) {
+      // received a beacon during channel scanning
+      if (call BeaconFrame.parsePANDescriptor(
+            frame, RADIO_CHANNEL, page, &m_PANDescriptor) == SUCCESS) {
+        // let's see if the beacon is from our coordinator...
+        if (m_PANDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS &&
+            m_PANDescriptor.CoordPANId == PAN_ID &&
+            m_PANDescriptor.CoordAddress.shortAddress == COORDINATOR_ADDRESS){
+          // yes! wait until SCAN is finished, then syncronize to the beacons
+          m_wasScanSuccessful = TRUE;
+        }
+      }
+    } else { 
+      // received a beacon during synchronization, toggle LED2
+      if (beaconSequenceNumber & 1)
+        call Leds.led2On();
+      else
+        call Leds.led2Off();   
+    }
+
+    return frame;
+  }
+
+  event void MLME_SCAN.confirm    (
+                          ieee154_status_t status,
+                          uint8_t ScanType,
+                          uint8_t ChannelPage,
+                          uint32_t UnscannedChannels,
+                          uint8_t EnergyDetectListNumEntries,
+                          int8_t* EnergyDetectList,
+                          uint8_t PANDescriptorListNumEntries,
+                          ieee154_PANDescriptor_t* PANDescriptorList
+                        )
+  {
+    if (m_wasScanSuccessful) {
+      // we received a beacon from the coordinator before
+      call MLME_SET.macCoordShortAddress(m_PANDescriptor.CoordAddress.shortAddress);
+      call MLME_SET.macPANId(m_PANDescriptor.CoordPANId);
+      call MLME_SYNC.request(m_PANDescriptor.LogicalChannel, m_PANDescriptor.ChannelPage, TRUE);
+      call Frame.setAddressingFields(
+          &m_frame,                
+          ADDR_MODE_SHORT_ADDRESS,        // SrcAddrMode,
+          ADDR_MODE_SHORT_ADDRESS,        // DstAddrMode,
+          m_PANDescriptor.CoordPANId,     // DstPANId,
+          &m_PANDescriptor.CoordAddress,  // DstAddr,
+          NULL                            // security
+          );
+      post packetSendTask(); 
+    } else
+      startApp();
+  }
+
+  task void packetSendTask()
+  {
+    if (!m_wasScanSuccessful)
+      return;
+    else if (call MCPS_DATA.request  (
+          &m_frame,                         // frame,
+          m_payloadLen,                     // payloadLength,
+          0,                                // msduHandle,
+          TX_OPTIONS_ACK // TxOptions,
+          ) != IEEE154_SUCCESS)
+      call Leds.led0On();
+  }
+
+  event void MCPS_DATA.confirm    (
+                          message_t *msg,
+                          uint8_t msduHandle,
+                          ieee154_status_t status,
+                          uint32_t timestamp
+                        )
+  {
+    if (status == IEEE154_SUCCESS && m_ledCount++ >= 20) {
+      m_ledCount = 0;
+      call Leds.led1Toggle();
+    }
+    post packetSendTask(); 
+  }
+
+  event void MLME_SYNC_LOSS.indication(
+                          ieee154_status_t lossReason,
+                          uint16_t PANId,
+                          uint8_t LogicalChannel,
+                          uint8_t ChannelPage,
+                          ieee154_security_t *security)
+  {
+    m_wasScanSuccessful = FALSE;
+    call Leds.led1Off();
+    call Leds.led2Off();
+  }
+
+  event message_t* MCPS_DATA.indication (message_t* frame)
+  {
+    // we don't expect data
+    return frame;
+  }
+
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestIndirect/README.txt b/apps/tests/tkn154/beacon-enabled/TestIndirect/README.txt
new file mode 100644
index 00000000..f0186ab5
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestIndirect/README.txt
@@ -0,0 +1,43 @@
+README for TestIndirect
+Author/Contact: Jan Hauer <hauer@tkn.tu-berlin.de>
+
+Description:
+
+In this application one node takes the role of a PAN coordinator in a
+beacon-enabled 802.15.4 PAN, it transmits periodic beacons and additionally in
+every beacon interval it tries to transmit one DATA frame to a device using
+indirect tranmission. A second node that takes the role of a device first scans
+the pre-defined channel for beacons from the coordinator and once it finds a
+beacon it tries to synchronize to and track all future beacons. Whenever the
+coordinator has data to send (indicated in the beacon), the device extracts the
+DATA frame from the coordinator.
+
+Criteria for a successful test:
+
+Both nodes should toggle the LED1 in unison, about once every half second. 
+The coordinator should also toggle LED2 with the same frequency.
+
+
+Tools: NONE
+
+Usage: 
+
+1. Install the coordinator:
+
+    $ cd coordinator; make <platform> install
+
+2. Install one device
+
+    $ cd device; make <platform> install
+
+You can change some of the configuration parameters in app_profile.h
+
+Known bugs/limitations:
+
+- Many TinyOS 2 platforms do not have a clock that satisfies the
+  precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 
+  62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing 
+  is not standard compliant
+
+$Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $
+
diff --git a/apps/tests/tkn154/beacon-enabled/TestIndirect/app_profile.h b/apps/tests/tkn154/beacon-enabled/TestIndirect/app_profile.h
new file mode 100644
index 00000000..748124e6
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestIndirect/app_profile.h
@@ -0,0 +1,48 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __APP_PROFILE_H
+#define __APP_PROFILE_H
+
+enum {
+  RADIO_CHANNEL = 26,
+  PAN_ID = 0x1152,
+  DEVICE_ADDRESS = 0x4342,
+  COORDINATOR_ADDRESS = 0x5341,
+  BEACON_ORDER = 5,
+  SUPERFRAME_ORDER = 5,
+};
+
+#endif
diff --git a/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/Makefile b/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/Makefile
new file mode 100644
index 00000000..2f060808
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestIndirectAppC
+PFLAGS += -DIEEE154_BEACON_SYNC_DISABLED -DIEEE154_SCAN_DISABLED
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/TestCoordSenderC.nc b/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/TestCoordSenderC.nc
new file mode 100644
index 00000000..5c8aa521
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/TestCoordSenderC.nc
@@ -0,0 +1,149 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2010-01-05 17:12:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154.h"
+#include "app_profile.h"
+module TestCoordSenderC
+{
+  uses {
+    interface Boot;
+    interface MCPS_DATA;
+    interface MLME_RESET;
+    interface MLME_START;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface Leds;
+    interface IEEE154Frame as Frame;
+    interface IEEE154TxBeaconPayload;
+    interface Packet;
+  }
+} implementation {
+
+  message_t m_frame;
+  uint8_t m_payloadLen;
+
+  event void Boot.booted() {
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status != IEEE154_SUCCESS)
+      return;
+
+    call MLME_SET.macShortAddress(COORDINATOR_ADDRESS);
+    call MLME_SET.macAssociationPermit(FALSE);
+    call MLME_START.request(
+                          PAN_ID,           // PANId
+                          RADIO_CHANNEL,    // LogicalChannel
+                          0,                // ChannelPage,
+                          0,                // StartTime,
+                          BEACON_ORDER,     // BeaconOrder
+                          SUPERFRAME_ORDER, // SuperframeOrder
+                          TRUE,             // PANCoordinator
+                          FALSE,            // BatteryLifeExtension
+                          FALSE,            // CoordRealignment
+                          0,                // CoordRealignSecurity
+                          0                 // BeaconSecurity
+                        );
+  }
+
+  void dataRequest()
+  {
+    call MCPS_DATA.request  (
+        &m_frame,                                 // msdu,
+        m_payloadLen,                             // payloadLength,
+        0,                                        // msduHandle,
+        TX_OPTIONS_ACK | TX_OPTIONS_INDIRECT      // TxOptions,
+        );
+  }
+
+  event void MLME_START.confirm(ieee154_status_t status)
+  {
+    char payload[] = "Hello Device!";
+    uint8_t *payloadRegion;
+    ieee154_address_t deviceShortAddress;
+
+    // construct the frame
+    m_payloadLen = strlen(payload);
+    payloadRegion = call Packet.getPayload(&m_frame, m_payloadLen);
+    deviceShortAddress.shortAddress = DEVICE_ADDRESS; // destination
+    if (status == IEEE154_SUCCESS && m_payloadLen <= call Packet.maxPayloadLength()) {
+      memcpy(payloadRegion, payload, m_payloadLen);
+      call Frame.setAddressingFields(
+          &m_frame,                
+          ADDR_MODE_SHORT_ADDRESS, // SrcAddrMode,
+          ADDR_MODE_SHORT_ADDRESS, // DstAddrMode,
+          PAN_ID,                  // DstPANId,
+          &deviceShortAddress,     // DstAddr,
+          NULL                     // security
+          );
+      dataRequest();
+    }
+  }
+
+  event void MCPS_DATA.confirm(
+                          message_t *msg,
+                          uint8_t msduHandle,
+                          ieee154_status_t status,
+                          uint32_t Timestamp
+                        )
+  {
+    if (status == IEEE154_SUCCESS)
+      call Leds.led1Toggle();
+    dataRequest();
+  }
+
+  event message_t* MCPS_DATA.indication ( message_t* frame)
+  {
+    return frame;
+  }
+
+  event void IEEE154TxBeaconPayload.aboutToTransmit() { }
+
+  event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { }
+
+  event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { }
+
+  event void IEEE154TxBeaconPayload.beaconTransmitted() 
+  {
+    ieee154_macBSN_t beaconSequenceNumber = call MLME_GET.macBSN();
+    if (beaconSequenceNumber & 1)
+      call Leds.led2On();
+    else
+      call Leds.led2Off();
+  }  
+  
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/TestIndirectAppC.nc b/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/TestIndirectAppC.nc
new file mode 100644
index 00000000..4a23ee28
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestIndirect/coordinator/TestIndirectAppC.nc
@@ -0,0 +1,52 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+configuration TestIndirectAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154BeaconEnabledC as MAC;
+  components TestCoordSenderC as App;
+
+  MainC.Boot <- App;
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  App.MLME_START -> MAC;
+  App.MCPS_DATA -> MAC;
+  App.Frame -> MAC;
+  App.IEEE154TxBeaconPayload -> MAC;
+  App.Packet -> MAC;
+
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestIndirect/device/Makefile b/apps/tests/tkn154/beacon-enabled/TestIndirect/device/Makefile
new file mode 100644
index 00000000..65d2fe20
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestIndirect/device/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestIndirectAppC
+PFLAGS += -DIEEE154_BEACON_TX_DISABLED
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/beacon-enabled/TestIndirect/device/TestDeviceReceiverC.nc b/apps/tests/tkn154/beacon-enabled/TestIndirect/device/TestDeviceReceiverC.nc
new file mode 100644
index 00000000..ba18bb0d
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestIndirect/device/TestDeviceReceiverC.nc
@@ -0,0 +1,163 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2010-01-05 17:12:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154.h"
+#include "app_profile.h"
+module TestDeviceReceiverC
+{
+  uses {
+    interface Boot;
+    interface MCPS_DATA;
+    interface MLME_RESET;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface MLME_SCAN;
+    interface MLME_SYNC;
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_SYNC_LOSS;
+    interface IEEE154BeaconFrame as BeaconFrame;
+    interface Leds;
+  }
+} implementation {
+
+  ieee154_address_t m_coordAddress;
+  uint8_t m_coordAddressMode;
+  ieee154_macPANId_t m_coordPANID;
+  ieee154_PANDescriptor_t m_PANDescriptor;
+  bool m_wasScanSuccessful;
+  void startApp();
+
+  event void Boot.booted() {
+    call MLME_RESET.request(TRUE);
+  }
+  
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status == IEEE154_SUCCESS)
+      startApp();
+  }
+
+  void startApp()
+  {
+    ieee154_phyChannelsSupported_t channel;
+    uint8_t scanDuration = BEACON_ORDER;
+
+    // in this application the coordinator assumes that 
+    // the device has a certain short address    
+    call MLME_SET.macShortAddress(DEVICE_ADDRESS);
+    channel = ((uint32_t) 1) << RADIO_CHANNEL;
+
+    // we want all received beacons to be signalled 
+    // through the MLME_BEACON_NOTIFY interface, i.e.
+    // we set the macAutoRequest attribute to FALSE
+    call MLME_SET.macAutoRequest(FALSE);
+    m_wasScanSuccessful = FALSE;
+    call MLME_SCAN.request  (
+                           PASSIVE_SCAN,           // ScanType
+                           channel,                // ScanChannels
+                           scanDuration,           // ScanDuration
+                           0x00,                   // ChannelPage
+                           0,                      // EnergyDetectListNumEntries
+                           NULL,                   // EnergyDetectList
+                           0,                      // PANDescriptorListNumEntries
+                           NULL,                   // PANDescriptorList
+                           0                       // security
+                        );
+  }
+
+  event message_t* MLME_BEACON_NOTIFY.indication (message_t* frame)
+  {
+    // received a beacon frame during SCAN
+    ieee154_phyCurrentPage_t page = call MLME_GET.phyCurrentPage();
+
+    if (!m_wasScanSuccessful && call BeaconFrame.parsePANDescriptor(
+          frame, RADIO_CHANNEL, page, &m_PANDescriptor) == SUCCESS){
+      // let's see if the beacon is from our coordinator...
+      if (m_PANDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS &&
+          m_PANDescriptor.CoordPANId == PAN_ID &&
+          m_PANDescriptor.CoordAddress.shortAddress == COORDINATOR_ADDRESS){
+        // wait until SCAN is finished, then syncronize to beacons
+        m_wasScanSuccessful = TRUE;
+      }
+    }
+    return frame;
+  }
+
+  event void MLME_SCAN.confirm    (
+                          ieee154_status_t status,
+                          uint8_t ScanType,
+                          uint8_t ChannelPage,
+                          uint32_t UnscannedChannels,
+                          uint8_t EnergyDetectListNumEntries,
+                          int8_t* EnergyDetectList,
+                          uint8_t PANDescriptorListNumEntries,
+                          ieee154_PANDescriptor_t* PANDescriptorList
+                        )
+  {
+    if (m_wasScanSuccessful){
+      // set the macAutoRequest attribute to TRUE, so indirect
+      // transmissions are automatically carried through
+      call MLME_SET.macAutoRequest(TRUE);
+      call MLME_SET.macCoordShortAddress(m_PANDescriptor.CoordAddress.shortAddress);
+      call MLME_SET.macPANId(m_PANDescriptor.CoordPANId);
+      call MLME_SYNC.request(m_PANDescriptor.LogicalChannel, m_PANDescriptor.ChannelPage, TRUE);
+    } else
+      startApp();
+  }
+
+  event void MCPS_DATA.confirm(
+                          message_t *msg,
+                          uint8_t msduHandle,
+                          ieee154_status_t status,
+                          uint32_t Timestamp
+                        )
+  {
+  }
+
+  event void MLME_SYNC_LOSS.indication(
+                          ieee154_status_t lossReason,
+                          uint16_t PANId,
+                          uint8_t LogicalChannel,
+                          uint8_t ChannelPage,
+                          ieee154_security_t *security)
+  {
+    call Leds.led1Off();
+  }
+
+  event message_t* MCPS_DATA.indication (message_t* frame)
+  {
+    call Leds.led1Toggle();
+    return frame;
+  }
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestIndirect/device/TestIndirectAppC.nc b/apps/tests/tkn154/beacon-enabled/TestIndirect/device/TestIndirectAppC.nc
new file mode 100644
index 00000000..5b138522
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestIndirect/device/TestIndirectAppC.nc
@@ -0,0 +1,53 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration TestIndirectAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154BeaconEnabledC as MAC;
+  components TestDeviceReceiverC as App;
+
+  MainC.Boot <- App;
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  App.MLME_SCAN -> MAC;
+  App.MLME_SYNC -> MAC;
+  App.MLME_BEACON_NOTIFY -> MAC;
+  App.MLME_SYNC_LOSS -> MAC;
+  App.MCPS_DATA -> MAC;
+  App.BeaconFrame -> MAC;
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestMultihop/README.txt b/apps/tests/tkn154/beacon-enabled/TestMultihop/README.txt
new file mode 100644
index 00000000..bd2822c0
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestMultihop/README.txt
@@ -0,0 +1,131 @@
+README for TestClusterTree
+Author/Contact: Jasper Buesch <buesch@tkn.tu-berlin.de>
+
+-------------------------------------------------------------------------------
+
+Description:
+
+This application creates a multihop topology out of three nodes: a PAN
+Coordinator, a "Router" (Coordinator and Device role) and a Device. The Router
+associates to the PAN Coordinator and the Device associates to the Router, so
+the topology is:
+
+              PAN Coordinator <-> Router <-> Device
+
+PAN Coordinator and Router send periodic beacons, but their active portions
+are shifted in time (so they don't overlap, see detailed explanation below).
+The Device can send packets only to the Router. And that's what is happening:
+after the Router has associated and synchronized with the PAN Coordinator it
+starts transmitting periodic beacons itself.  Once the Device receives these
+beacon it associates and synchronizes to the Router. Then the device starts
+sending periodic DATA packets to the Router (1 packet/s). Whenever the Router
+receives a DATA packet from the device it forwards the packet to the PAN
+Coordinator. A node toggles its LED2 (Telos: blue) every time a beacon is sent
+or received and it toggles LED1 (Telos: green) every time a DATA frame is sent
+or received.  Therefore, the Router's LEDs should to toggle twice as fast as
+the LEDs of the other nodes. LEDs are toggling in unison / at the same time.
+
+
+Criteria for a successful test:
+
+Device and PAN Coordinator should toggle LED1 and LED2 with the same frequency.
+The Router should toggle LED1 and LED2 with twice that frequency.  LEDs are not
+toggled in unison.
+
+
+-------------------------------------------------------------------------------
+
+Superframe structure:
+
+PAN Coordinator and Router send beacons with the same frequency. Each beacon is
+followed by an active period (see IEEE 802.15.4-2006 Sect. 5.5.1). It is
+important that the active periods of the PAN Coordinator and Router do not
+overlap, i.e. we want a configuation like this:
+
+
+  Superframe structure PAN coordinator:
+
+  ||---------------------------|--------------------------------------------|
+  ||    Active period          |             Inactive period                |
+  ||---------------------------|--------------------------------------------|
+
+  |<----- defined by SO ------>|
+
+
+  Superframe structure Router:
+
+  |----------------------------------------||---------------------------|---|
+  |         Inactive period                ||      Active period        |   |
+  |----------------------------------------||---------------------------|---|
+
+                                           |<----- defined by SO ------>|
+
+  |<- "StartTime" in MLME_START.request()->|
+
+  |<---------------------------- defined by BO ----------------------------->|
+
+
+So the parameters that influence a superframe structure are Beacon Order(BO)
+and Superframe Order(SO) and the parameter that influences the time offset
+between the active periods of the PAN Coordinator and Router is "StartTime" in
+the MLME_START.request() interface (used only on the Router).
+
+  => Formula to transform Beacon Order(BO) and Superframe Order(SO) values 
+     into symbols and seconds (refer to section "7.5.1.1 Superframe structure"):
+    
+    - 0 ≤ BO ≤ 14; 0 ≤ SO ≤ 14
+    - symbol-time in seconds        = 16 us (microseconds)
+    - aBaseSlotDuration             = 60
+    - aNumSuperframeSlots           = 16
+    - aBaseSuperframeDuration       = aBaseSlotDuration * aNumSuperframeSlots
+                                    = 960
+    - Beaconintervall BI in symbols = aBaseSuperframeDuration * 2^BO
+                                    = 960 * 2^BO
+    - Beaconintervall BI in seconds = BI (in symbols) * 16 us
+
+     Example:
+       BO = 4
+        BI in symbols = 960 symbols * 2^4 = 15360 symbols
+        BI in seconds = 15360 symbols * 16us = 0.24576 seconds
+
+
+
+  => The "StartTime" parameter in MLME_START.request()
+ 
+     The "StartTime" time offset in the router is defined in symbols.
+     The value has to be chosen so that the active portions of router and
+     PAN coordinator are not overlapping (refer to the figure above).
+     One can, for example, use the duration of the active portion of
+     PAN coordinator as "StartTime" on the Router. 
+
+
+-------------------------------------------------------------------------------
+
+Tools: NONE
+
+Usage: 
+
+1. Install the PAN coordinator:
+
+    $ cd pancoord; make <platform> install
+
+2. Install the router node:
+
+    $ cd router; make <platform> install
+
+3. Install the device node:
+
+    $ cd device; make <platform> install
+
+You can change some of the configuration parameters in app_profile.h
+
+-------------------------------------------------------------------------------
+
+Known bugs/limitations:
+
+- Many TinyOS 2 platforms do not have a clock that satisfies the
+  precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 
+  62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing 
+  is not standard compliant
+
+
diff --git a/apps/tests/tkn154/beacon-enabled/TestMultihop/app_profile.h b/apps/tests/tkn154/beacon-enabled/TestMultihop/app_profile.h
new file mode 100644
index 00000000..230f13c8
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestMultihop/app_profile.h
@@ -0,0 +1,54 @@
+/* 
+ * Copyright (c) 2010, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.0 $
+ * $Date: 2010/08/26 16:07:34 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */ 
+ 
+#ifndef __APP_PROFILE_H
+#define __APP_PROFILE_H
+
+enum{
+  PAN_ID = 0x3901,
+  PAN_COORDINATOR_SHORT_ADDRESS = 0xEF01,
+  ROUTER_SHORT_ADDRESS = 0xEF02,
+  DEVICE_SHORT_ADDRESS = 0xEF03,
+
+  BEACON_ORDER = 6,
+  SUPERFRAME_ORDER = 4,
+
+  RADIO_CHANNEL = 26,
+  DATA_TRANSFER_PERIOD = 62500U, // timebase 62500U = 1 second
+  ROUTER_BEACON_START_OFFSET = 30720U,
+  ROUTER_FRAME_POOL_SIZE = 5,
+};
+
+#endif
diff --git a/apps/tests/tkn154/beacon-enabled/TestMultihop/device/Makefile b/apps/tests/tkn154/beacon-enabled/TestMultihop/device/Makefile
new file mode 100644
index 00000000..18d58ab2
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestMultihop/device/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestDeviceAppC
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/beacon-enabled/TestMultihop/device/TestDeviceAppC.nc b/apps/tests/tkn154/beacon-enabled/TestMultihop/device/TestDeviceAppC.nc
new file mode 100644
index 00000000..58edf11b
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestMultihop/device/TestDeviceAppC.nc
@@ -0,0 +1,61 @@
+/* 
+ * Copyright (c) 2010, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.0 $
+ * $Date: 2010/08/26 16:07:34 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */ 
+ 
+configuration TestDeviceAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154BeaconEnabledC as MAC;
+  components TestDeviceC as App;
+  components new Timer62500C() as DataTimer;
+
+  MainC.Boot <- App;
+  App.MLME_RESET -> MAC;
+  App.MLME_SCAN -> MAC;
+  App.MLME_BEACON_NOTIFY -> MAC;
+  App.MLME_SYNC -> MAC;
+  App.MLME_SYNC_LOSS -> MAC;
+  App.MLME_ASSOCIATE -> MAC;
+  App.MCPS_DATA -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  
+  App.BeaconFrame -> MAC;
+  App.Frame -> MAC;
+  App.Packet -> MAC;
+ 
+  App.Leds -> LedsC;
+  App.DataTimer -> DataTimer;
+  
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestMultihop/device/TestDeviceC.nc b/apps/tests/tkn154/beacon-enabled/TestMultihop/device/TestDeviceC.nc
new file mode 100644
index 00000000..31a5e903
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestMultihop/device/TestDeviceC.nc
@@ -0,0 +1,259 @@
+/* 
+ * Copyright (c) 2010, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.0 $
+ * $Date: 2010/08/26 16:07:34 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */ 
+
+#include "TKN154.h"
+#include "app_profile.h"
+
+module TestDeviceC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_SCAN;
+    interface MLME_SYNC;
+    interface MLME_SYNC_LOSS;
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_ASSOCIATE;
+    interface MCPS_DATA;
+    interface MLME_SET;
+    interface MLME_GET;
+
+    interface IEEE154Frame as Frame;
+    interface IEEE154BeaconFrame as BeaconFrame;
+    interface Packet;
+
+    interface Leds;
+    interface Timer<T62500hz> as DataTimer;
+  }
+} implementation {
+
+  ieee154_CapabilityInformation_t m_capabilityInformation;
+  ieee154_PANDescriptor_t m_panDescriptor;
+  message_t m_frame;
+  bool m_routerWasFound;
+  bool m_associatedToRouter;
+  bool m_dataConfirmPending;
+  uint8_t m_payloadLen;
+  void scanForRouter();
+
+  event void Boot.booted()
+  {
+    m_capabilityInformation.AlternatePANCoordinator = 0;
+    m_capabilityInformation.DeviceType = 0;
+    m_capabilityInformation.PowerSource = 0;
+    m_capabilityInformation.ReceiverOnWhenIdle = 0;
+    m_capabilityInformation.Reserved = 0;
+    m_capabilityInformation.SecurityCapability = 0;
+    m_capabilityInformation.AllocateAddress = 1;
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    char myPayload[] = "This is a packet for the PAN Coordinator!";
+    uint8_t *p;
+
+    m_payloadLen = strlen(myPayload);
+    p =  call Packet.getPayload(&m_frame, m_payloadLen);
+    if (status == IEEE154_SUCCESS && p != NULL)
+    {
+      memcpy(p, myPayload, m_payloadLen);
+      scanForRouter();
+    }
+  }
+
+  void scanForRouter()
+  {
+    ieee154_phyChannelsSupported_t channel;
+    // we only scan the single channel on which we expect the Router
+    uint8_t scanDuration = BEACON_ORDER;
+
+    channel = ((uint32_t) 1) << RADIO_CHANNEL;
+
+    // we want to be signalled every single beacon that is received during the 
+    // channel SCAN-phase, that's why we set  "macAutoRequest" to FALSE
+    call MLME_SET.macAutoRequest(FALSE);
+    m_routerWasFound = FALSE;
+    m_associatedToRouter = FALSE;
+    call MLME_SCAN.request(
+        PASSIVE_SCAN,           // ScanType
+        channel,                // ScanChannels
+        scanDuration,           // ScanDuration
+        0x00,                   // ChannelPage
+        0,                      // EnergyDetectListNumEntries
+        NULL,                   // EnergyDetectList
+        0,                      // PANDescriptorListNumEntries
+        NULL,                   // PANDescriptorList
+        0                       // security
+        );
+  }
+
+  event message_t* MLME_BEACON_NOTIFY.indication(message_t* frame)
+  {
+    ieee154_phyCurrentPage_t page = call MLME_GET.phyCurrentPage();
+
+    if (m_associatedToRouter) {
+      // we are already associated to the Router
+      // and just received one of its periodic beacons
+      call Leds.led2Toggle();
+      return frame;
+    } else {
+      // we have received "some" beacon during the SCAN-phase, let's
+      // check if it is the beacon from our Router
+      if (!m_routerWasFound && call BeaconFrame.parsePANDescriptor(
+            frame, RADIO_CHANNEL, page, &m_panDescriptor) == SUCCESS) {
+        if (m_panDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS &&
+            m_panDescriptor.CoordPANId == PAN_ID &&
+            m_panDescriptor.CoordAddress.shortAddress == ROUTER_SHORT_ADDRESS) {
+          m_routerWasFound = TRUE; // yes!
+        }
+      }
+    }
+    return frame;
+  }
+
+  event void MLME_SCAN.confirm(
+      ieee154_status_t status,
+      uint8_t ScanType,
+      uint8_t ChannelPage,
+      uint32_t UnscannedChannels,
+      uint8_t EnergyDetectListNumEntries,
+      int8_t* EnergyDetectList,
+      uint8_t PANDescriptorListNumEntries,
+      ieee154_PANDescriptor_t* PANDescriptorList
+      )
+  {
+    if (m_routerWasFound) {
+      // our Router is out there sending beacons, 
+      // let's try to associate with it
+      call MLME_SET.macCoordShortAddress(m_panDescriptor.CoordAddress.shortAddress);
+      call MLME_SET.macPANId(m_panDescriptor.CoordPANId);
+      call MLME_SYNC.request(m_panDescriptor.LogicalChannel, m_panDescriptor.ChannelPage, TRUE);
+
+      call MLME_ASSOCIATE.request(
+          m_panDescriptor.LogicalChannel,  // LogicalChannel 
+          m_panDescriptor.ChannelPage,     // ChannelPage
+          ADDR_MODE_SHORT_ADDRESS,         // CoordAddrMode
+          PAN_ID,                          // CoordPANID
+          m_panDescriptor.CoordAddress,    // CoordAddress
+          m_capabilityInformation,         // CapabilityInformation
+          0                                // Security
+          );                              
+
+    } else {
+      scanForRouter();
+    }
+  }
+
+  event void MLME_ASSOCIATE.confirm(
+      uint16_t AssocShortAddress,
+      uint8_t status,
+      ieee154_security_t *security
+      )
+  {
+    if (status == IEEE154_ASSOCIATION_SUCCESSFUL) {
+      m_associatedToRouter = TRUE;
+      call MLME_SET.macShortAddress(AssocShortAddress);
+      call Leds.led1Off();
+      call DataTimer.startPeriodic(DATA_TRANSFER_PERIOD);
+    } else {
+      scanForRouter();
+    }
+  }
+
+  event void DataTimer.fired()
+  {
+    ieee154_address_t deviceShortAddress;
+    deviceShortAddress.shortAddress = ROUTER_SHORT_ADDRESS; // destination
+
+    if (!m_associatedToRouter || m_dataConfirmPending)
+      return;
+
+
+    call Frame.setAddressingFields(
+        &m_frame,                
+        ADDR_MODE_SHORT_ADDRESS, // SrcAddrMode,
+        ADDR_MODE_SHORT_ADDRESS, // DstAddrMode,
+        PAN_ID,                  // DstPANId,
+        &deviceShortAddress,     // DstAddr,
+        NULL                     // security
+        );      
+
+    if (call MCPS_DATA.request(
+        &m_frame,                            // msdu,
+        m_payloadLen,                        // payloadLength,
+        0,                                   // msduHandle,
+        TX_OPTIONS_ACK                       // TxOptions,
+        ) == SUCCESS)
+      m_dataConfirmPending = TRUE;
+
+    call Leds.led1Toggle();
+  }
+
+  event void MCPS_DATA.confirm(
+      message_t *msg,
+      uint8_t msduHandle,
+      ieee154_status_t status,
+      uint32_t Timestamp
+      )
+  {
+    m_dataConfirmPending = FALSE;
+  }
+
+  event void MLME_SYNC_LOSS.indication(
+      ieee154_status_t lossReason,
+      uint16_t PANId, 
+      uint8_t LogicalChannel, 
+      uint8_t ChannelPage, 
+      ieee154_security_t *security
+      )
+  {
+    call DataTimer.stop();
+    scanForRouter();
+  }
+
+  event message_t* MCPS_DATA.indication(message_t* frame)
+  {
+    return frame;
+  }
+
+
+  event void MLME_ASSOCIATE.indication(
+      uint64_t DeviceAddress,
+      ieee154_CapabilityInformation_t CapabilityInformation,
+      ieee154_security_t *security
+      ) { }
+
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/Makefile b/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/Makefile
new file mode 100644
index 00000000..d272707f
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestPanCoordinatorAppC
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/TestPanCoordinatorAppC.nc b/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/TestPanCoordinatorAppC.nc
new file mode 100644
index 00000000..61b2a736
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/TestPanCoordinatorAppC.nc
@@ -0,0 +1,55 @@
+/* 
+ * Copyright (c) 2010, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.0 $
+ * $Date: 2010/08/26 16:07:34 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */ 
+ 
+configuration TestPanCoordinatorAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154BeaconEnabledC as MAC;
+  components TestPanCoordinatorC as App;
+
+  MainC.Boot <- App;
+  App.MLME_RESET -> MAC;
+  App.MLME_START -> MAC;
+  App.MLME_ASSOCIATE -> MAC;
+  App.MCPS_DATA -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  
+  App.IEEE154TxBeaconPayload -> MAC;
+  App.Frame -> MAC;
+  App.Packet -> MAC;
+  
+  App.Leds -> LedsC;
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/TestPanCoordinatorC.nc b/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/TestPanCoordinatorC.nc
new file mode 100644
index 00000000..acafc38e
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestMultihop/pancoord/TestPanCoordinatorC.nc
@@ -0,0 +1,147 @@
+/* 
+ * Copyright (c) 2010, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.0 $
+ * $Date: 2010/08/26 16:07:34 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */ 
+
+#include "TKN154.h"
+#include "app_profile.h"
+
+module TestPanCoordinatorC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_START;
+    interface MLME_ASSOCIATE;
+    interface MCPS_DATA;
+    interface MLME_SET;
+    interface MLME_GET;
+    
+    interface IEEE154TxBeaconPayload;
+    interface IEEE154Frame as Frame;
+    interface Packet;
+    
+    interface Leds;
+  }
+
+} implementation {
+
+  event void Boot.booted()
+  {
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status != IEEE154_SUCCESS)
+      return;
+
+    call MLME_SET.macShortAddress(PAN_COORDINATOR_SHORT_ADDRESS);
+    call MLME_SET.macAssociationPermit(TRUE);
+    call MLME_START.request(
+                         PAN_ID,           // PANId
+                         RADIO_CHANNEL,    // LogicalChannel
+                         0,                // ChannelPage,
+                         0,                // StartTime,
+                         BEACON_ORDER,     // BeaconOrder
+                         SUPERFRAME_ORDER, // SuperframeOrder
+                         TRUE,             // PANCoordinator
+                         FALSE,            // BatteryLifeExtension
+                         FALSE,            // CoordRealignment
+                         0,                // CoordRealignSecurity
+                         0                 // BeaconSecurity
+                           );
+
+    
+  }
+
+  event void MLME_START.confirm(ieee154_status_t status)
+  {
+    if (status != IEEE154_SUCCESS)
+      call MLME_RESET.request(TRUE);
+  }
+
+  event message_t* MCPS_DATA.indication(message_t* frame)
+  {
+    // we received a packet from the "router" -> toggle LED1
+    call Leds.led1Toggle();
+    return frame;
+  }
+
+  event void MCPS_DATA.confirm(
+                         message_t *msg,
+                         uint8_t msduHandle,
+                         ieee154_status_t status,
+                         uint32_t timestamp
+                              )
+  {
+  }  
+
+  /* ------------------------------------------------------------------------------ */
+
+  event void MLME_ASSOCIATE.confirm(
+                         uint16_t assocShortAddress,
+                         uint8_t status,
+                         ieee154_security_t *security
+                                   )
+  {
+  }
+
+  event void MLME_ASSOCIATE.indication(
+                         uint64_t deviceAddress,
+                         ieee154_CapabilityInformation_t capabilityInformation,
+                         ieee154_security_t *security
+                                      )
+  {
+    call MLME_ASSOCIATE.response(
+                         deviceAddress,
+                         ROUTER_SHORT_ADDRESS,
+                         IEEE154_ASSOCIATION_SUCCESSFUL,
+                         0
+                                );
+  }
+
+  /* ------------------------------------------------------------------------------ */
+
+  event void IEEE154TxBeaconPayload.aboutToTransmit() { }
+
+  event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { }
+
+  event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { }
+
+  event void IEEE154TxBeaconPayload.beaconTransmitted()
+  {
+    call Leds.led2Toggle();
+  }  
+  
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestMultihop/router/Makefile b/apps/tests/tkn154/beacon-enabled/TestMultihop/router/Makefile
new file mode 100644
index 00000000..0cd27067
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestMultihop/router/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestRouterAppC
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/beacon-enabled/TestMultihop/router/TestRouterAppC.nc b/apps/tests/tkn154/beacon-enabled/TestMultihop/router/TestRouterAppC.nc
new file mode 100644
index 00000000..b74e6452
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestMultihop/router/TestRouterAppC.nc
@@ -0,0 +1,65 @@
+/* 
+ * Copyright (c) 2010, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.0 $
+ * $Date: 2010/08/26 16:07:34 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */ 
+ 
+#include "TKN154.h"
+#include "app_profile.h"
+ 
+configuration TestRouterAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154BeaconEnabledC as MAC;
+  components TestRouterC as App;
+  components new PoolC(message_t, ROUTER_FRAME_POOL_SIZE) as FramePool;
+
+  MainC.Boot <- App;
+  App.MLME_RESET -> MAC;
+  App.MLME_SCAN -> MAC;
+  App.MLME_BEACON_NOTIFY -> MAC;
+  App.MLME_SYNC -> MAC;
+  App.MLME_SYNC_LOSS -> MAC;
+  App.MLME_ASSOCIATE -> MAC;
+  App.MLME_START -> MAC;
+  App.MCPS_DATA -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  
+  App.IEEE154TxBeaconPayload -> MAC;
+  App.BeaconFrame -> MAC;
+  App.Frame -> MAC;
+  App.Packet -> MAC;
+  App.FramePool -> FramePool;
+  
+  App.Leds -> LedsC;
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestMultihop/router/TestRouterC.nc b/apps/tests/tkn154/beacon-enabled/TestMultihop/router/TestRouterC.nc
new file mode 100644
index 00000000..7d76899a
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestMultihop/router/TestRouterC.nc
@@ -0,0 +1,335 @@
+/* 
+ * Copyright (c) 2010, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.0 $
+ * $Date: 2010/08/26 16:07:34 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */ 
+
+#include "TKN154.h"
+#include "app_profile.h"
+
+module TestRouterC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_SCAN;
+    interface MLME_SYNC;
+    interface MLME_SYNC_LOSS;
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_ASSOCIATE;
+    interface MLME_START;
+    interface MCPS_DATA;
+    interface MLME_GET;
+    interface MLME_SET;
+
+    interface IEEE154TxBeaconPayload;
+    interface IEEE154BeaconFrame as BeaconFrame;
+    interface IEEE154Frame as Frame;
+    interface Packet;
+    interface Pool<message_t> as FramePool;
+
+    interface Leds;
+  }
+} implementation {
+
+  ieee154_CapabilityInformation_t m_capabilityInformation;
+  ieee154_PANDescriptor_t m_PANDescriptor;
+  uint8_t m_panCoordinatorWasFound = FALSE;
+  uint8_t m_associatedToPanCoord = FALSE;
+
+  void scanForPanCoord();
+
+  /* ------------------------------------------------------------------------------ */
+
+  event void Boot.booted()
+  {
+    m_capabilityInformation.AlternatePANCoordinator = 0;
+    m_capabilityInformation.DeviceType = 1;
+    m_capabilityInformation.PowerSource = 0;
+    m_capabilityInformation.ReceiverOnWhenIdle = 0;
+    m_capabilityInformation.Reserved = 0;
+    m_capabilityInformation.SecurityCapability = 0;
+    m_capabilityInformation.AllocateAddress = 1;
+
+    m_panCoordinatorWasFound = FALSE;
+    m_associatedToPanCoord = FALSE;
+
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status != IEEE154_SUCCESS)
+      return;
+    else 
+      scanForPanCoord();
+  }
+
+  void scanForPanCoord()
+  {
+    uint8_t scanDuration = BEACON_ORDER;
+    // we only scan the single channel on which we expect the PAN coordinator
+    ieee154_phyChannelsSupported_t channel = ((uint32_t) 1) << RADIO_CHANNEL;
+
+    // we want to be signalled every single beacon that is received during the 
+    // channel SCAN-phase, that's why we set  "macAutoRequest" to FALSE
+    call MLME_SET.macAutoRequest(FALSE); 
+    m_panCoordinatorWasFound = FALSE;
+    m_associatedToPanCoord = FALSE;
+    call MLME_SCAN.request(
+        PASSIVE_SCAN,           // ScanType
+        channel,                // ScanChannels
+        scanDuration,           // ScanDuration
+        0x00,                   // ChannelPage
+        0,                      // EnergyDetectListNumEntries
+        NULL,                   // EnergyDetectList
+        0,                      // PANDescriptorListNumEntries
+        NULL,                   // PANDescriptorList
+        0                       // security
+        );
+  }
+
+  event message_t* MLME_BEACON_NOTIFY.indication(message_t* frame)
+  {
+    ieee154_phyCurrentPage_t page;
+
+    if (m_associatedToPanCoord == TRUE) {
+      // we are already associated with the PAN Coordinator
+      // and just received one of its periodic beacons
+      call Leds.led2Toggle();
+    } else {
+      // we have received "some" beacon during the SCAN-phase, let's
+      // check if it is the beacon from our PAN Coordinator
+      page = call MLME_GET.phyCurrentPage();
+      if ((m_panCoordinatorWasFound == FALSE) && call BeaconFrame.parsePANDescriptor(
+            frame, RADIO_CHANNEL, page, &m_PANDescriptor) == SUCCESS) {
+        if (m_PANDescriptor.CoordAddrMode == ADDR_MODE_SHORT_ADDRESS &&
+            m_PANDescriptor.CoordPANId == PAN_ID &&
+            m_PANDescriptor.CoordAddress.shortAddress == PAN_COORDINATOR_SHORT_ADDRESS) {
+          m_panCoordinatorWasFound = TRUE; // yes!
+        }
+      }
+    }
+    return frame;
+  }
+
+  event void MLME_SCAN.confirm(
+      ieee154_status_t status,
+      uint8_t ScanType,
+      uint8_t ChannelPage,
+      uint32_t UnscannedChannels,
+      uint8_t EnergyDetectListNumEntries,
+      int8_t* EnergyDetectList,
+      uint8_t PANDescriptorListNumEntries,
+      ieee154_PANDescriptor_t* PANDescriptorList
+      )
+  {
+    if (m_panCoordinatorWasFound) {
+      // our PAN Coordinator is out there sending beacons, 
+      // let's try to associate with it
+      call MLME_SET.macCoordShortAddress(m_PANDescriptor.CoordAddress.shortAddress);
+      call MLME_SET.macPANId(m_PANDescriptor.CoordPANId);
+      call MLME_SYNC.request(m_PANDescriptor.LogicalChannel, m_PANDescriptor.ChannelPage, TRUE);
+      call MLME_ASSOCIATE.request(
+          m_PANDescriptor.LogicalChannel,  // LogicalChannel 
+          m_PANDescriptor.ChannelPage,     // ChannelPage
+          ADDR_MODE_SHORT_ADDRESS,         // CoordAddrMode
+          PAN_ID,                          // CoordPANID
+          m_PANDescriptor.CoordAddress,    // CoordAddress
+          m_capabilityInformation,         // CapabilityInformation
+          0                                // Security
+          );                        
+    } else {
+      scanForPanCoord();
+    }
+  }
+
+  event void MLME_ASSOCIATE.confirm(
+      uint16_t assocShortAddress,
+      uint8_t status,
+      ieee154_security_t *security
+      )
+  {
+    if (status == IEEE154_ASSOCIATION_SUCCESSFUL) {
+      // we have successfully associated with the PAN Coordinator.
+      // now we should start sending our own beacons, so the device
+      // can associate with us; but we must make sure that our active
+      // period does not overlap with PAN Coordinator's active period
+      // (via the "StartTime" parameter to "MLME_START.request")
+      call Leds.led1Off();
+      m_associatedToPanCoord = TRUE;
+
+      call MLME_SET.macShortAddress(assocShortAddress);
+      call MLME_SET.macAssociationPermit(TRUE);
+
+      call MLME_START.request(
+          PAN_ID,                        	         // PANId
+          RADIO_CHANNEL,                           // LogicalChannel
+          0,                                       // ChannelPage,
+          (uint32_t) ROUTER_BEACON_START_OFFSET,   // StartTime,
+          BEACON_ORDER,                            // BeaconOrder
+          SUPERFRAME_ORDER,                        // SuperframeOrder
+          FALSE,                                   // PANCoordinator
+          FALSE,                                   // BatteryLifeExtension
+          FALSE,                                   // CoordRealignment
+          0,                                       // CoordRealignSecurity
+          0                                        // BeaconSecurity
+          );
+    } else {
+      scanForPanCoord();
+    }
+  }
+
+  event void MLME_START.confirm(ieee154_status_t status)
+  {
+    if (status != SUCCESS)
+      scanForPanCoord();
+  }
+
+  event void MLME_SYNC_LOSS.indication(
+      ieee154_status_t lossReason,
+      uint16_t panId, 
+      uint8_t logicalChannel, 
+      uint8_t channelPage, 
+      ieee154_security_t *security
+      )
+  {
+    // We have lost track of our PAN Coordinator's beacons :(
+    // We stop sending our own beacons, until we have synchronized with
+    // the PAN Coordinator again.
+    if (lossReason == IEEE154_BEACON_LOSS) {
+      call Leds.led2Off(); 
+      call MLME_START.request(
+          PAN_ID,         // PANId
+          RADIO_CHANNEL,  // LogicalChannel
+          0,              // ChannelPage,
+          0,   			      // StartTime,
+          15,             // BeaconOrder
+          15,             // SuperframeOrder
+          FALSE,          // PANCoordinator
+          FALSE,          // BatteryLifeExtension
+          FALSE,          // CoordRealignment
+          0,              // CoordRealignSecurity
+          0               // BeaconSecurity
+          );
+      scanForPanCoord();
+    }
+  }
+
+  /* ------------------------------------------------------------------------------ */
+  /* Everything above was about finding and associating with the PAN Coordinator and 
+   * then starting to send our own beacons. The code below is about allowing the device
+   * to associate, receiving data from it and forwarding it to the PAN Coordinator.*/
+
+  event void MLME_ASSOCIATE.indication(
+      uint64_t deviceAddress,
+      ieee154_CapabilityInformation_t capabilityInformation,
+      ieee154_security_t *security
+      )
+  {
+    // The device wants to associate ...
+    call MLME_ASSOCIATE.response(
+        deviceAddress,
+        DEVICE_SHORT_ADDRESS,
+        IEEE154_ASSOCIATION_SUCCESSFUL,
+        0
+        );
+  }
+
+  event message_t* MCPS_DATA.indication(message_t* receivedFrame)
+  {
+    message_t* returnFrame; 
+    ieee154_address_t panCoordAddr;
+    uint8_t payloadLen = call Frame.getPayloadLength(receivedFrame);
+    panCoordAddr.shortAddress = PAN_COORDINATOR_SHORT_ADDRESS;
+
+    call Leds.led1Toggle();  
+
+    // if we are no more associated with the PAN coordinator, we drop the frame
+    if (m_associatedToPanCoord == FALSE) {
+      return receivedFrame;
+    }
+
+    // This event handler has to return a frame buffer to the MAC.
+    // We don't want to return "receivedFrame", because we will try
+    // to forward that to the PAN Coordinator. Instead we get an "empty"
+    // frame through the PoolC component and return that to the MAC.
+    returnFrame = call FramePool.get();
+    if (returnFrame == NULL)
+      return receivedFrame; // no empty frame left!
+
+    // to forward the frame to the PAN Coordinator we update
+    // the addressing part (the payload part remains unchanged!)
+    call Frame.setAddressingFields(
+        receivedFrame,                
+        ADDR_MODE_SHORT_ADDRESS, // SrcAddrMode,
+        ADDR_MODE_SHORT_ADDRESS, // DstAddrMode,
+        PAN_ID,                  // DstPANId,
+        &panCoordAddr,           // DstAddr,
+        NULL                     // security
+        );
+
+    call MCPS_DATA.request(
+        receivedFrame,           // msdu,
+        payloadLen,              // payloadLength,
+        0,                       // msduHandle,
+        TX_OPTIONS_ACK           // TxOptions,
+        );
+
+    return returnFrame;
+  }
+
+  event void MCPS_DATA.confirm(
+      message_t *msg,
+      uint8_t msduHandle,
+      ieee154_status_t status,
+      uint32_t Timestamp
+      )
+  {
+    call Leds.led1Toggle();  
+    call FramePool.put(msg);
+  }
+
+  /* ------------------------------------------------------------------------------ */
+
+  event void IEEE154TxBeaconPayload.aboutToTransmit() { }
+
+  event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { }
+
+  event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { }
+
+  event void IEEE154TxBeaconPayload.beaconTransmitted() 
+  {
+    call Leds.led2Toggle();
+  }  
+
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestStartSync/README.txt b/apps/tests/tkn154/beacon-enabled/TestStartSync/README.txt
new file mode 100644
index 00000000..49b43a8a
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestStartSync/README.txt
@@ -0,0 +1,40 @@
+README for TestStartSync
+Author/Contact: Jan Hauer <hauer@tkn.tu-berlin.de>
+
+Description:
+
+In this application one node takes the role of a PAN coordinator in a
+beacon-enabled 802.15.4 PAN, it transmits periodic beacons with a frequency
+defined in the app_profile.h file. A second node acts as a device, it first
+scans all available channels for beacons from the coordinator and once it finds
+a beacon it tries to synchronize to and track all future beacons. 
+
+Criteria for a successful test:
+
+After a few seconds all nodes should have the LED1 turned on and LED2
+toggling in unison every second.
+
+
+Tools: NONE
+
+Usage: 
+
+1. Install the coordinator:
+
+    $ cd coordinator; make <platform> install
+
+2. Install one (or more) devices:
+
+    $ cd device; make <platform> install
+
+You can change some of the configuration parameters in app_profile.h
+
+Known bugs/limitations:
+
+- Many TinyOS 2 platforms do not have a clock that satisfies the
+  precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 
+  62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing 
+  is not standard compliant
+
+$Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $
+
diff --git a/apps/tests/tkn154/beacon-enabled/TestStartSync/app_profile.h b/apps/tests/tkn154/beacon-enabled/TestStartSync/app_profile.h
new file mode 100644
index 00000000..5f28f37e
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestStartSync/app_profile.h
@@ -0,0 +1,47 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __APP_PROFILE_H
+#define __APP_PROFILE_H
+
+enum {
+  RADIO_CHANNEL = 26,
+  PAN_ID = 0x7761,
+  COORDINATOR_ADDRESS = 0x1832,
+  BEACON_ORDER = 5,
+  SUPERFRAME_ORDER = 5,
+};
+
+#endif
diff --git a/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/Makefile b/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/Makefile
new file mode 100644
index 00000000..0b0bf72b
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestStartSyncAppC
+CFLAGS += -I$(shell pwd)/..
+CFLAGS += -DIEEE154_SCAN_DISABLED -DIEEE154_BEACON_SYNC_DISABLED
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/TestCoordC.nc b/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/TestCoordC.nc
new file mode 100644
index 00000000..20a3424b
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/TestCoordC.nc
@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154.h"
+#include "app_profile.h"
+module TestCoordC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_START;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface Leds;
+    interface IEEE154TxBeaconPayload;
+  }
+} implementation {
+
+  uint8_t m_beaconPayload[] = {0x01, 0x02, 0x03, 0x04, 0x05};
+
+  event void Boot.booted() {
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status == IEEE154_SUCCESS){
+      call MLME_SET.macShortAddress(COORDINATOR_ADDRESS);
+      call MLME_SET.macAssociationPermit(FALSE);
+      call MLME_START.request(
+          PAN_ID,             // PANId
+          RADIO_CHANNEL,      // LogicalChannel
+          0,                  // ChannelPage,
+          0,                  // StartTime,
+          BEACON_ORDER,       // BeaconOrder
+          SUPERFRAME_ORDER,   // SuperframeOrder
+          TRUE,               // PANCoordinator
+          FALSE,              // BatteryLifeExtension
+          FALSE,              // CoordRealignment
+          0,                  // no realignment security
+          0                   // no beacon security
+          );
+    }
+  }
+
+  event void MLME_START.confirm(ieee154_status_t status)
+  {
+    if (status == IEEE154_SUCCESS){
+      call IEEE154TxBeaconPayload.setBeaconPayload(m_beaconPayload, sizeof(m_beaconPayload));
+      call Leds.led1On();
+    }
+  }
+
+  event void IEEE154TxBeaconPayload.aboutToTransmit() { }
+
+  event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) { }
+
+  event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) { }
+
+  event void IEEE154TxBeaconPayload.beaconTransmitted() 
+  {
+    ieee154_macBSN_t beaconSequenceNumber = call MLME_GET.macBSN();
+    if (beaconSequenceNumber & 1)
+      call Leds.led2On();
+    else
+      call Leds.led2Off();
+  }
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/TestStartSyncAppC.nc b/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/TestStartSyncAppC.nc
new file mode 100644
index 00000000..f3df588b
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestStartSync/coordinator/TestStartSyncAppC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration TestStartSyncAppC
+{
+} implementation {
+
+  components MainC, LedsC, Ieee802154BeaconEnabledC as MAC;
+  components TestCoordC as App;
+
+  MainC.Boot <- App;
+  App.MLME_START -> MAC;
+  App.IEEE154TxBeaconPayload -> MAC;
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestStartSync/device/Makefile b/apps/tests/tkn154/beacon-enabled/TestStartSync/device/Makefile
new file mode 100644
index 00000000..3fb36983
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestStartSync/device/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestStartSyncAppC
+PFLAGS += -DIEEE154_BEACON_TX_DISABLED
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/beacon-enabled/TestStartSync/device/TestDeviceC.nc b/apps/tests/tkn154/beacon-enabled/TestStartSync/device/TestDeviceC.nc
new file mode 100644
index 00000000..cdc3421f
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestStartSync/device/TestDeviceC.nc
@@ -0,0 +1,160 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154.h"
+#include "app_profile.h"
+module TestDeviceC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface MLME_SCAN;
+    interface MLME_SYNC;
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_SYNC_LOSS;
+    interface Leds;
+    interface IEEE154BeaconFrame as BeaconFrame;
+  }
+} implementation {
+
+  enum {
+    NUM_PAN_DESCRIPTORS = 10,
+  };
+  ieee154_PANDescriptor_t m_PANDescriptor[NUM_PAN_DESCRIPTORS];
+  void startApp();
+
+  event void Boot.booted() {
+    call MLME_RESET.request(TRUE);
+  }
+  
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status == IEEE154_SUCCESS)
+      startApp();
+  }
+
+  void startApp()
+  {
+    ieee154_phyChannelsSupported_t scanChannels;
+    uint8_t scanDuration = BEACON_ORDER;
+
+    // set the short address to whatever was passed 
+    // as a parameter to make system ("make install,X")
+    call MLME_SET.macShortAddress(TOS_NODE_ID); 
+    scanChannels = call MLME_GET.phyChannelsSupported();
+    //scanChannels = (uint32_t) 1 << RADIO_CHANNEL;
+
+    // setting the macAutoRequest attribute to TRUE means
+    // that during the scan beacons will not be signalled
+    // through MLME_BEACON_NOTIFY
+    call MLME_SET.macAutoRequest(TRUE);
+    call MLME_SCAN.request  (
+        PASSIVE_SCAN,           // ScanType
+        scanChannels,           // ScanChannels
+        scanDuration,           // ScanDuration
+        0x00,                   // ChannelPage
+        0,                      // EnergyDetectListNumEntries
+        NULL,                   // EnergyDetectList
+        NUM_PAN_DESCRIPTORS,    // PANDescriptorListNumEntries
+        m_PANDescriptor,        // PANDescriptorList
+        0                       // security
+        );
+  }
+
+  event void MLME_SCAN.confirm    (
+                          ieee154_status_t status,
+                          uint8_t ScanType,
+                          uint8_t ChannelPage,
+                          uint32_t UnscannedChannels,
+                          uint8_t EnergyDetectListNumEntries,
+                          int8_t* EnergyDetectList,
+                          uint8_t PANDescriptorListNumEntries,
+                          ieee154_PANDescriptor_t* PANDescriptorList
+                        )
+  {
+    uint8_t i;
+    switch (status){
+      case IEEE154_NO_BEACON:
+        startApp();
+        break;
+      case IEEE154_SUCCESS:
+        if (PANDescriptorListNumEntries > 0){
+          for (i=0; i<PANDescriptorListNumEntries; i++)
+            if (PANDescriptorList[i].CoordAddrMode == ADDR_MODE_SHORT_ADDRESS &&
+                PANDescriptorList[i].CoordPANId == PAN_ID &&
+                PANDescriptorList[i].CoordAddress.shortAddress == COORDINATOR_ADDRESS)
+              break;
+          if (i == PANDescriptorListNumEntries){
+            // found no matching entry
+            startApp();
+          } else {
+            call MLME_SET.macAutoRequest(FALSE); // from now on: give me the beacons
+            call MLME_SET.macPANId(PANDescriptorList[i].CoordPANId);
+            call MLME_SET.macCoordShortAddress(PANDescriptorList[i].CoordAddress.shortAddress);
+            call MLME_SYNC.request(PANDescriptorList[i].LogicalChannel, ChannelPage, TRUE);
+          }
+        }
+        break;
+      default:
+        break;
+    }
+  }
+
+  event message_t* MLME_BEACON_NOTIFY.indication (
+                          message_t* frame
+                        )
+  {
+    ieee154_macBSN_t beaconSequenceNumber = call BeaconFrame.getBSN(frame);
+    if (beaconSequenceNumber & 1)
+      call Leds.led2On();
+    else
+      call Leds.led2Off();    
+    call Leds.led1On();
+    return frame;
+  }
+
+  event void MLME_SYNC_LOSS.indication(
+                          ieee154_status_t lossReason,
+                          uint16_t PANId,
+                          uint8_t LogicalChannel,
+                          uint8_t ChannelPage,
+                          ieee154_security_t *security)
+  {
+    call Leds.led1Off();
+    startApp();
+  }
+}
diff --git a/apps/tests/tkn154/beacon-enabled/TestStartSync/device/TestStartSyncAppC.nc b/apps/tests/tkn154/beacon-enabled/TestStartSync/device/TestStartSyncAppC.nc
new file mode 100644
index 00000000..36cb63c6
--- /dev/null
+++ b/apps/tests/tkn154/beacon-enabled/TestStartSync/device/TestStartSyncAppC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:21:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration TestStartSyncAppC
+{
+} implementation {
+
+  components MainC, LedsC, Ieee802154BeaconEnabledC as MAC;
+  components TestDeviceC as App;
+
+  App.MLME_SCAN -> MAC;
+  App.MLME_SYNC -> MAC;
+  App.MLME_BEACON_NOTIFY -> MAC;
+  App.MLME_SYNC_LOSS -> MAC;
+  App.BeaconFrame -> MAC;
+
+  MainC.Boot <- App;
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+
+#ifdef PRINTF_ENABLED
+  components PrintfC;
+  App.PrintfControl -> PrintfC;
+  App.PrintfFlush -> PrintfC;
+#endif
+}
diff --git a/apps/tests/tkn154/extras/extaddr.extra b/apps/tests/tkn154/extras/extaddr.extra
new file mode 100644
index 00000000..fc917b7c
--- /dev/null
+++ b/apps/tests/tkn154/extras/extaddr.extra
@@ -0,0 +1,4 @@
+ifeq ($(EXTADDR),)
+$(error To set an extended address X pass 'extaddr,X' to the make system (e.g. "make telosb extaddr,0x012345"))
+endif
+PFLAGS += -DIEEE154_EXTENDED_ADDRESS=$(EXTADDR)
diff --git a/apps/tests/tkn154/extras/tkn154debug.extra b/apps/tests/tkn154/extras/tkn154debug.extra
new file mode 100644
index 00000000..59a1799e
--- /dev/null
+++ b/apps/tests/tkn154/extras/tkn154debug.extra
@@ -0,0 +1,3 @@
+PFLAGS += -DTKN154_DEBUG
+CFLAGS += -I$(TOSDIR)/lib/printf
+PFLAGS += -DPRINTF_BUFFER_SIZE=1000
diff --git a/apps/tests/tkn154/makeall.sh b/apps/tests/tkn154/makeall.sh
new file mode 100755
index 00000000..a7e92614
--- /dev/null
+++ b/apps/tests/tkn154/makeall.sh
@@ -0,0 +1,26 @@
+#!/bin/bash
+# compile/clean all test applications
+PLATFORM=$1
+OPTIONS=
+STARTDIR=`pwd`
+MAKEFILES=`find . -name Makefile`
+
+if [ $# == 0 ];
+then
+  echo "Usage: $0 <platform|clean>"
+  exit
+fi
+
+for m in $MAKEFILES
+do
+  cd ${m%Makefile}
+  if [ "x$1" == xclean ];
+  then
+    make clean
+  else
+    make $PLATFORM $OPTIONS;
+  fi
+  cd $STARTDIR
+done
+exit
+
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/README.txt b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/README.txt
new file mode 100644
index 00000000..698b706b
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/README.txt
@@ -0,0 +1,40 @@
+README for TestActiveScan
+Author/Contact: Jan Hauer <hauer@tkn.tu-berlin.de>
+
+Description:
+
+In this application one node takes the role of a PAN coordinator in a
+nonbeacon-enabled 802.15.4 PAN, it switches its radio to receive mode.  A
+second node acts as a device, it switches to the pre-defined channel and
+periodically performs active-scans (i.e. sends out beacon request frames) on
+the predefined channel and expects beacon frames in return. 
+
+Criteria for a successful test:
+
+The coordinator should toggle LED1 once every 2 seconds. The device should
+toggle LED1 and LED2 every 2 seconds (not necessarily simultaneously).
+
+
+Tools: NONE
+
+Usage: 
+
+1. Install the coordinator:
+
+    $ cd coordinator; make <platform> install
+
+2. Install one (or more) devices:
+
+    $ cd device; make <platform> install
+
+You can change some of the configuration parameters in app_profile.h
+
+Known bugs/limitations:
+
+- Many TinyOS 2 platforms do not have a clock that satisfies the
+  precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 
+  62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing 
+  is not standard compliant
+
+$Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $o
+
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/app_profile.h b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/app_profile.h
new file mode 100644
index 00000000..30d112bf
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/app_profile.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-06-10 09:38:41 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __APP_PROFILE_H
+#define __APP_PROFILE_H
+
+enum {
+  RADIO_CHANNEL = 26,
+  PAN_ID = 0x1234,
+  COORDINATOR_ADDRESS = 0x2345,
+  DEVICE_ADDRESS = 0x2346
+};
+
+#endif
+
+
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/Makefile b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/Makefile
new file mode 100644
index 00000000..8558fc7d
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestActiveScanCoordAppC
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/TestActiveScanCoordAppC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/TestActiveScanCoordAppC.nc
new file mode 100644
index 00000000..ad90062a
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/TestActiveScanCoordAppC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-06-10 09:38:41 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration TestActiveScanCoordAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154NonBeaconEnabledC as MAC;
+  components new Timer62500C() as Timer1;
+  components TestActiveScanCoordC as App;
+
+  MainC.Boot <- App;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  App.MLME_START -> MAC;
+  App.IEEE154TxBeaconPayload -> MAC;
+
+  App.Led1Timer -> Timer1;
+  App.Leds -> LedsC;
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/TestActiveScanCoordC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/TestActiveScanCoordC.nc
new file mode 100644
index 00000000..26398c7b
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/coordinator/TestActiveScanCoordC.nc
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-06-10 09:38:41 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154.h"
+#include "app_profile.h"
+module TestActiveScanCoordC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_START;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface IEEE154TxBeaconPayload;
+    interface Leds;
+    interface Timer<T62500hz> as Led1Timer;
+
+  }
+} implementation {
+
+  event void Boot.booted() {
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status) {
+    if (status != IEEE154_SUCCESS) 
+      return;
+    call MLME_SET.macShortAddress(COORDINATOR_ADDRESS);
+    call MLME_SET.macAssociationPermit(FALSE);
+    call MLME_SET.macRxOnWhenIdle(TRUE);
+    call MLME_START.request(
+                          PAN_ID,           // PANId
+                          RADIO_CHANNEL,    // LogicalChannel
+                          0,                // ChannelPage,
+                          0,                // StartTime,
+                          15,               // BeaconOrder
+                          15,               // SuperframeOrder
+                          TRUE,             // PANCoordinator
+                          FALSE,            // BatteryLifeExtension
+                          FALSE,            // CoordRealignment
+                          NULL,             // no realignment security
+                          NULL              // no beacon security
+                        );    
+  }
+
+  event void MLME_START.confirm(ieee154_status_t status) {}
+
+  event void IEEE154TxBeaconPayload.aboutToTransmit() {
+    call Leds.led1On();
+    call Led1Timer.startOneShot(62500U);
+  }
+
+  event void Led1Timer.fired(){
+    call Leds.led1Off();
+  }
+
+  event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length){}
+  event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength){}
+  event void IEEE154TxBeaconPayload.beaconTransmitted(){}
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/Makefile b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/Makefile
new file mode 100644
index 00000000..1f7a2be5
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestActiveScanDeviceAppC
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/TestActiveScanDeviceAppC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/TestActiveScanDeviceAppC.nc
new file mode 100644
index 00000000..e42bb05d
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/TestActiveScanDeviceAppC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-06-10 09:38:41 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration TestActiveScanDeviceAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154NonBeaconEnabledC as MAC,
+             new Timer62500C() as Timer1, 
+             new Timer62500C() as Timer2, 
+             new Timer62500C() as Timer3, 
+             new Timer62500C() as Timer4;
+  components TestActiveScanDeviceC as App;
+
+  MainC.Boot <- App;
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  App.MLME_SCAN -> MAC;
+
+  App.ScanTimer -> Timer1;
+  App.Led0Timer -> Timer2;
+  App.Led1Timer -> Timer3;
+  App.Led2Timer -> Timer4;
+
+
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/TestActiveScanDeviceC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/TestActiveScanDeviceC.nc
new file mode 100644
index 00000000..72cee060
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestActiveScan/device/TestActiveScanDeviceC.nc
@@ -0,0 +1,125 @@
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2010-01-05 17:12:56 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154.h"
+#include "app_profile.h"
+module TestActiveScanDeviceC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface MLME_SCAN;
+    interface Leds;
+    interface Timer<T62500hz> as ScanTimer;
+    interface Timer<T62500hz> as Led1Timer;
+    interface Timer<T62500hz> as Led0Timer;
+    interface Timer<T62500hz> as Led2Timer;
+  }
+} implementation {
+
+  ieee154_PANDescriptor_t m_PANDescriptor[5];
+
+  event void Boot.booted() {
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status) {
+    if (status == IEEE154_SUCCESS){
+    call ScanTimer.startPeriodic(125000U); 
+    }
+  }
+
+  event void ScanTimer.fired() {
+    ieee154_phyChannelsSupported_t channelMask;
+    channelMask = ((uint32_t) 1) << RADIO_CHANNEL;
+    call Leds.led2On();
+    call Led2Timer.startOneShot(62500U);
+    call MLME_SCAN.request  (
+                           ACTIVE_SCAN,            // ScanType
+                           channelMask,            // ScanChannels
+                           5,                      // ScanDuration
+                           0x00,                   // ChannelPage
+                           0,                      // EnergyDetectListNumEntries
+                           NULL,                   // EnergyDetectList
+                           5,                      // PANDescriptorListNumEntries
+                           m_PANDescriptor,        // PANDescriptorList
+                           0                       // security
+                        );
+  }
+
+  event void MLME_SCAN.confirm    (
+                          ieee154_status_t status,
+                          uint8_t ScanType,
+                          uint8_t ChannelPage,
+                          uint32_t UnscannedChannels,
+                          uint8_t EnergyDetectListNumEntries,
+                          int8_t* EnergyDetectList,
+                          uint8_t PANDescriptorListNumEntries,
+                          ieee154_PANDescriptor_t* PANDescriptorList
+                        ){
+    uint8_t scanIndex;
+    uint8_t rightCoordFound = FALSE;
+
+    for(scanIndex = 0; scanIndex < PANDescriptorListNumEntries; scanIndex++){
+      if( (PANDescriptorList[scanIndex].CoordAddrMode == ADDR_MODE_SHORT_ADDRESS) && 
+          (PANDescriptorList[scanIndex].CoordAddress.shortAddress == COORDINATOR_ADDRESS) &&
+          (PANDescriptorList[scanIndex].CoordPANId == PAN_ID) ) {
+        call Leds.led1On();
+        call Led1Timer.startOneShot(62500U);
+        rightCoordFound = TRUE;
+        break;
+      }
+    }
+    if(rightCoordFound == FALSE) {
+      // call Leds.led0On();
+      // call Led0Timer.startOneShot(62500U); 
+    }
+  }
+
+  event void Led0Timer.fired(){
+    call Leds.led0Off();
+  }
+
+  event void Led1Timer.fired(){
+    call Leds.led1Off();
+  }
+
+  event void Led2Timer.fired(){
+    call Leds.led2Off();
+  }
+
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/README.txt b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/README.txt
new file mode 100644
index 00000000..99d0fdfa
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/README.txt
@@ -0,0 +1,44 @@
+README for TestAssociate
+Author/Contact: Jan Hauer <hauer@tkn.tu-berlin.de>
+
+Description:
+
+In this application one node takes the role of a PAN coordinator in a
+nonbeacon-enabled 802.15.4 PAN, it switches its radio to receive mode and waits
+for devices to request association to its PAN. Whenever a device tries to
+associate, the PAN coordinator allows association and assigns to the device a
+unique short address (starting from zero, incremented for every device
+requesting association).  A second node acts as a device, it switches to the
+pre-defined channel and tries to associate to the PAN. A short time after
+association the device then disassociates from the PAN. 
+
+Criteria for a successful test:
+
+Assuming one coordinator and one device has been installed, both should
+simultaneously switch on LED1. About 5 seconds later both should switch LED1
+off. That's all.
+
+
+Tools: NONE
+
+Usage: 
+
+1. Install the coordinator:
+
+    $ cd coordinator; make <platform> install
+
+2. Install one (or more) devices:
+
+    $ cd device; make <platform> install
+
+You can change some of the configuration parameters in app_profile.h
+
+Known bugs/limitations:
+
+- Many TinyOS 2 platforms do not have a clock that satisfies the
+  precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 
+  62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing 
+  is not standard compliant
+
+$Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $o
+
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/app_profile.h b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/app_profile.h
new file mode 100644
index 00000000..818f2be6
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/app_profile.h
@@ -0,0 +1,45 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 17:13:02 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __APP_PROFILE_H
+#define __APP_PROFILE_H
+
+enum {
+  RADIO_CHANNEL = 26,
+  PAN_ID = 0x9678,
+  COORDINATOR_ADDRESS = 0x7722,
+};
+
+#endif
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/Makefile b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/Makefile
new file mode 100644
index 00000000..c4d5d67c
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestAssociateAppC
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/TestAssociateAppC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/TestAssociateAppC.nc
new file mode 100644
index 00000000..07a142a4
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/TestAssociateAppC.nc
@@ -0,0 +1,52 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 17:13:02 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration TestAssociateAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154NonBeaconEnabledC as MAC;
+  components TestCoordC as App;
+
+  MainC.Boot <- App;
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+
+  App.MLME_START -> MAC;
+  App.MLME_ASSOCIATE -> MAC;
+  App.MLME_DISASSOCIATE -> MAC;
+  App.MLME_COMM_STATUS -> MAC;
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/TestCoordC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/TestCoordC.nc
new file mode 100644
index 00000000..f15fd341
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/coordinator/TestCoordC.nc
@@ -0,0 +1,136 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 17:13:02 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154.h"
+#include "app_profile.h"
+module TestCoordC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_START;
+    interface MLME_ASSOCIATE;
+    interface MLME_DISASSOCIATE;
+    interface MLME_COMM_STATUS;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface Leds;
+  }
+} implementation {
+
+  ieee154_address_t m_lastDevice;
+  uint16_t m_shortAddress;
+
+  event void Boot.booted() {
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status != IEEE154_SUCCESS)
+      return;
+    call MLME_SET.macShortAddress(COORDINATOR_ADDRESS);
+    call MLME_SET.macAssociationPermit(TRUE);
+    call MLME_SET.macRxOnWhenIdle(TRUE);
+    call MLME_START.request(
+                          PAN_ID,           // PANId
+                          RADIO_CHANNEL,    // LogicalChannel
+                          0,                // ChannelPage,
+                          0,                // StartTime,
+                          15,               // BeaconOrder
+                          15,               // SuperframeOrder
+                          TRUE,             // PANCoordinator
+                          FALSE,            // BatteryLifeExtension
+                          FALSE,            // CoordRealignment
+                          NULL,             // no realignment security
+                          NULL              // no beacon security
+                        );    
+  }
+
+  event void MLME_START.confirm(ieee154_status_t status) {
+    // good, let's wait for association requests ...
+  }
+
+  event void MLME_ASSOCIATE.indication (
+                          uint64_t DeviceAddress,
+                          ieee154_CapabilityInformation_t CapabilityInformation,
+                          ieee154_security_t *security
+                        )
+  {
+    call MLME_ASSOCIATE.response(DeviceAddress, m_shortAddress++, IEEE154_ASSOCIATION_SUCCESSFUL, 0);
+  }
+
+  event void MLME_DISASSOCIATE.indication (
+                          uint64_t DeviceAddress,
+                          ieee154_disassociation_reason_t DisassociateReason,
+                          ieee154_security_t *security
+                        )
+  {
+    call Leds.led1Off();
+  }
+
+
+  event void MLME_COMM_STATUS.indication (
+                          uint16_t PANId,
+                          uint8_t SrcAddrMode,
+                          ieee154_address_t SrcAddr,
+                          uint8_t DstAddrMode,
+                          ieee154_address_t DstAddr,
+                          ieee154_status_t status,
+                          ieee154_security_t *security
+                        )
+  {
+    if (status == IEEE154_SUCCESS){
+      // association was successful
+      call Leds.led1On();
+      m_lastDevice.extendedAddress = DstAddr.extendedAddress;
+    } else {
+      call Leds.led1Off();
+    }
+  }
+
+  event void MLME_DISASSOCIATE.confirm    (
+                          ieee154_status_t status,
+                          uint8_t DeviceAddrMode,
+                          uint16_t DevicePANID,
+                          ieee154_address_t DeviceAddress
+                        ){}
+
+  event void MLME_ASSOCIATE.confirm    (
+                          uint16_t AssocShortAddress,
+                          uint8_t status,
+                          ieee154_security_t *security
+                        ){}
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/Makefile b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/Makefile
new file mode 100644
index 00000000..c4d5d67c
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestAssociateAppC
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/TestAssociateAppC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/TestAssociateAppC.nc
new file mode 100644
index 00000000..5b1745a2
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/TestAssociateAppC.nc
@@ -0,0 +1,53 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 17:13:02 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration TestAssociateAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154NonBeaconEnabledC as MAC,
+             new Timer62500C() as Timer;
+  components TestDeviceC as App;
+
+  MainC.Boot <- App;
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  App.DisassociateTimer -> Timer;  
+  App.MLME_ASSOCIATE -> MAC;
+  App.MLME_DISASSOCIATE -> MAC;
+  App.MLME_COMM_STATUS -> MAC;
+
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/TestDeviceC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/TestDeviceC.nc
new file mode 100644
index 00000000..a5c737b7
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestAssociate/device/TestDeviceC.nc
@@ -0,0 +1,158 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-09-10 12:00:49 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154.h"
+#include "app_profile.h"
+module TestDeviceC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface MLME_ASSOCIATE;
+    interface MLME_DISASSOCIATE;
+    interface MLME_COMM_STATUS;
+    interface Leds;
+    interface Timer<T62500hz> as DisassociateTimer;
+  }
+} implementation {
+
+  ieee154_CapabilityInformation_t m_capabilityInformation;
+  void startApp();
+
+  event void Boot.booted() {
+    m_capabilityInformation.AlternatePANCoordinator = 0;
+    m_capabilityInformation.DeviceType = 0;
+    m_capabilityInformation.PowerSource = 0;
+    m_capabilityInformation.ReceiverOnWhenIdle = 0;
+    m_capabilityInformation.Reserved = 0;
+    m_capabilityInformation.SecurityCapability = 0;
+    m_capabilityInformation.AllocateAddress = 1;    
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status == IEEE154_SUCCESS)
+      startApp();
+  }
+
+  void startApp()
+  {
+    ieee154_address_t coordAdr;
+
+    coordAdr.shortAddress = COORDINATOR_ADDRESS;
+    call MLME_SET.phyCurrentChannel(RADIO_CHANNEL);
+    call MLME_SET.macAutoRequest(FALSE);
+    call MLME_SET.macPANId(PAN_ID);
+    call MLME_SET.macCoordShortAddress(COORDINATOR_ADDRESS);
+    call MLME_ASSOCIATE.request(
+          RADIO_CHANNEL,
+          call MLME_GET.phyCurrentPage(),
+          ADDR_MODE_SHORT_ADDRESS,
+          PAN_ID,
+          coordAdr,
+          m_capabilityInformation,
+          NULL  // security
+          );    
+  }
+
+  event void MLME_ASSOCIATE.confirm    (
+                          uint16_t AssocShortAddress,
+                          uint8_t status,
+                          ieee154_security_t *security
+                        )
+  {
+    if ( status == IEEE154_SUCCESS ){
+      // we are now associated - set a timer for disassociation 
+      call Leds.led1On();
+      call DisassociateTimer.startOneShot(312500U);
+    } else {
+      startApp(); // retry
+    }
+  }
+
+  event void DisassociateTimer.fired()
+  {
+    ieee154_address_t coordAdr;
+    coordAdr.shortAddress = COORDINATOR_ADDRESS;
+    if (call MLME_DISASSOCIATE.request  (
+          ADDR_MODE_SHORT_ADDRESS,
+          PAN_ID,
+          coordAdr,
+          IEEE154_DEVICE_WISHES_TO_LEAVE,
+          FALSE,
+          NULL
+          ) != IEEE154_SUCCESS)
+      call DisassociateTimer.startOneShot(312500U);
+  }
+
+  event void MLME_DISASSOCIATE.confirm    (
+                          ieee154_status_t status,
+                          uint8_t DeviceAddrMode,
+                          uint16_t DevicePANID,
+                          ieee154_address_t DeviceAddress
+                        )
+  {
+    if (status == IEEE154_SUCCESS){
+      call Leds.led1Off();
+    } else {
+      call DisassociateTimer.startOneShot(312500U);
+    }
+  }
+
+  event void MLME_ASSOCIATE.indication (
+                          uint64_t DeviceAddress,
+                          ieee154_CapabilityInformation_t CapabilityInformation,
+                          ieee154_security_t *security
+                        ){}  
+
+  event void MLME_DISASSOCIATE.indication (
+                          uint64_t DeviceAddress,
+                          ieee154_disassociation_reason_t DisassociateReason,
+                          ieee154_security_t *security
+                        ){}
+
+
+  event void MLME_COMM_STATUS.indication (
+                          uint16_t PANId,
+                          uint8_t SrcAddrMode,
+                          ieee154_address_t SrcAddr,
+                          uint8_t DstAddrMode,
+                          ieee154_address_t DstAddr,
+                          ieee154_status_t status,
+                          ieee154_security_t *security
+                        ) {}
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/README.txt b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/README.txt
new file mode 100644
index 00000000..8b91c720
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/README.txt
@@ -0,0 +1,42 @@
+README for TestIndirectData
+Author/Contact: Jan Hauer <hauer@tkn.tu-berlin.de>
+
+Description:
+
+In this application one node takes the role of a PAN coordinator in a
+nonbeacon-enabled 802.15.4 PAN, every 3 seconds it sends a packet to a device
+using indirect transmission (i.e. the packet is buffered until it is polled by
+the device). A second node acts as the device, it switches to the pre-defined
+channel and polls the coordinator every 1 second for outstanding indirect
+transmissions.
+
+Criteria for a successful test:
+
+Assuming one coordinator and one device has been installed, the coordinator
+should briefly flash LED1 every 3 seconds. The device should briefly flash 
+LED2 every 1 second. 
+
+
+Tools: NONE
+
+Usage: 
+
+1. Install the coordinator:
+
+    $ cd coordinator; make <platform> install
+
+2. Install one (or more) devices:
+
+    $ cd device; make <platform> install
+
+You can change some of the configuration parameters in app_profile.h
+
+Known bugs/limitations:
+
+- Many TinyOS 2 platforms do not have a clock that satisfies the
+  precision/accuracy requirements of the IEEE 802.15.4 standard (e.g. 
+  62.500 Hz, +-40 ppm in the 2.4 GHz band); in this case the MAC timing 
+  is not standard compliant
+
+$Id: README.txt,v 1.3 2010-01-05 17:12:56 janhauer Exp $o
+
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/app_profile.h b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/app_profile.h
new file mode 100644
index 00000000..01829b98
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/app_profile.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-06-10 09:23:45 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __APP_PROFILE_H
+#define __APP_PROFILE_H
+
+enum {
+  RADIO_CHANNEL = 26,
+  PAN_ID = 0x4927,
+  COORDINATOR_ADDRESS = 0x6287,
+  DEVICE_ADDRESS = 0x6288
+};
+
+#endif
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/Makefile b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/Makefile
new file mode 100644
index 00000000..ebe71b30
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestIndirectDataCoordAppC
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/TestIndirectDataCoordAppC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/TestIndirectDataCoordAppC.nc
new file mode 100644
index 00000000..d3c8b3f7
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/TestIndirectDataCoordAppC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-06-10 09:23:45 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration TestIndirectDataCoordAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154NonBeaconEnabledC as MAC;
+  components TestIndirectDataCoordC as App;
+  components new Timer62500C() as Timer1;
+  components new Timer62500C() as Timer2;
+  components new Timer62500C() as Timer3;
+
+  MainC.Boot <- App;
+  App.MCPS_DATA -> MAC;
+  App.Frame -> MAC;
+  App.Packet -> MAC;
+  App.DataTimer -> Timer1;
+  App.Led1Timer -> Timer2;
+  App.Led0Timer -> Timer3;
+
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  App.MLME_START -> MAC;
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/TestIndirectDataCoordC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/TestIndirectDataCoordC.nc
new file mode 100644
index 00000000..917d32cf
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/coordinator/TestIndirectDataCoordC.nc
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-06-10 09:23:45 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154.h"
+#include "app_profile.h"
+module TestIndirectDataCoordC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_START;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface MCPS_DATA;
+    interface IEEE154Frame as Frame;
+    interface Leds;
+    interface Packet;
+    interface Timer<T62500hz> as DataTimer;
+    interface Timer<T62500hz> as Led1Timer;
+    interface Timer<T62500hz> as Led0Timer;
+  }
+} implementation {
+
+  message_t frame;
+  uint8_t *payloadRegion;
+  uint8_t m_payloadLen;
+
+  char payload[] = "TestIndirect, Coordinator talking now!";
+
+  void sendIndirectData();
+
+  event void Boot.booted() {
+    m_payloadLen = strlen(payload);
+    payloadRegion = call Packet.getPayload(&frame, m_payloadLen);
+    if (m_payloadLen <= call Packet.maxPayloadLength()){
+      memcpy(payloadRegion, payload, m_payloadLen);
+      call MLME_RESET.request(TRUE);
+    }
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status != IEEE154_SUCCESS)
+      return;
+    call MLME_SET.macShortAddress(COORDINATOR_ADDRESS);
+    call MLME_SET.macAssociationPermit(FALSE);
+    call MLME_SET.macRxOnWhenIdle(TRUE);
+    call MLME_START.request(
+                          PAN_ID,           // PANId
+                          RADIO_CHANNEL,    // LogicalChannel
+                          0,                // ChannelPage,
+                          0,                // StartTime,
+                          15,               // BeaconOrder
+                          15,               // SuperframeOrder
+                          TRUE,             // PANCoordinator
+                          FALSE,            // BatteryLifeExtension
+                          FALSE,            // CoordRealignment
+                          NULL,             // no realignment security
+                          NULL              // no beacon security
+                        );    
+  }
+
+  void sendIndirectData(){
+    ieee154_address_t deviceAddress;
+    deviceAddress.shortAddress = DEVICE_ADDRESS;
+    call Frame.setAddressingFields(
+                          &frame,                
+                          ADDR_MODE_SHORT_ADDRESS,     // SrcAddrMode,
+                          ADDR_MODE_SHORT_ADDRESS,     // DstAddrMode,
+                          PAN_ID,                      // DstPANId,
+                          &deviceAddress,              // DstAddr,
+                          NULL                         // security
+                        );
+    call MCPS_DATA.request(
+                          &frame,                               // frame,
+                          strlen(payload),                      // payloadLength,
+                          0,                                    // msduHandle,
+                          TX_OPTIONS_INDIRECT | TX_OPTIONS_ACK  // TxOptions,
+                        ); 
+    call Leds.led1On();
+    call Led1Timer.startOneShot(12500U);
+  }
+
+  event void MLME_START.confirm(ieee154_status_t status) {
+    sendIndirectData();
+  }
+
+  event void DataTimer.fired(){
+    sendIndirectData();
+  }
+
+  event void Led1Timer.fired(){
+    call Leds.led1Off();
+  }
+
+  event void MCPS_DATA.confirm(
+                          message_t *msg,
+                          uint8_t msduHandle,
+                          ieee154_status_t status,
+                          uint32_t Timestamp
+                        )
+  {
+    if(status == IEEE154_TRANSACTION_EXPIRED){
+      call Leds.led0On();
+      call Led0Timer.startOneShot(125000U);
+      sendIndirectData();
+    }else if(status == SUCCESS){
+      call DataTimer.startOneShot(125000U);
+    }
+  }
+
+  event void Led0Timer.fired(){
+    call Leds.led0Off();
+  }
+
+  event message_t* MCPS_DATA.indication ( message_t* frame__ ){
+    return frame__;
+  }
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/Makefile b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/Makefile
new file mode 100644
index 00000000..7ca4abd3
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestIndirectDataDeviceAppC
+CFLAGS += -I$(shell pwd)/..
+include ../../../Makefile.include
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/TestIndirectDataDeviceAppC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/TestIndirectDataDeviceAppC.nc
new file mode 100644
index 00000000..78df723a
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/TestIndirectDataDeviceAppC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-06-10 09:23:45 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration TestIndirectDataDeviceAppC
+{
+} implementation {
+  components MainC, LedsC, Ieee802154NonBeaconEnabledC as MAC,
+             new Timer62500C() as Timer1, 
+             new Timer62500C() as Timer2;
+  components TestIndirectDataDeviceC as App;
+
+  MainC.Boot <- App;
+  App.MCPS_DATA -> MAC;
+  App.Leds -> LedsC;
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  App.PollTimer -> Timer1;
+  App.Led2Timer -> Timer2;
+  App.MLME_POLL -> MAC;
+
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/TestIndirectDataDeviceC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/TestIndirectDataDeviceC.nc
new file mode 100644
index 00000000..57b40ff9
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestIndirectData/device/TestIndirectDataDeviceC.nc
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-09-10 12:00:50 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154.h"
+#include "app_profile.h"
+module TestIndirectDataDeviceC
+{
+  uses {
+    interface Boot;
+    interface MCPS_DATA;
+    interface MLME_RESET;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface MLME_POLL;
+    interface Leds;
+    interface Timer<T62500hz> as PollTimer;
+    interface Timer<T62500hz> as Led2Timer;
+  }
+} implementation {
+
+  void startApp();
+
+  event void Boot.booted() {
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status == IEEE154_SUCCESS)
+      startApp();
+  }
+
+  void startApp()
+  {
+    call MLME_SET.phyCurrentChannel(RADIO_CHANNEL);
+    call MLME_SET.macAutoRequest(FALSE);
+    call MLME_SET.macPANId(PAN_ID);
+    call MLME_SET.macCoordShortAddress(COORDINATOR_ADDRESS);  
+    call MLME_SET.macShortAddress(DEVICE_ADDRESS);
+    call PollTimer.startPeriodic(62500U); 
+  }
+
+  event void PollTimer.fired(){
+    // check the coordinator for outstanding transmissions
+    ieee154_address_t coordAdr;
+    coordAdr.shortAddress = COORDINATOR_ADDRESS;
+    call MLME_POLL.request  (
+                          ADDR_MODE_SHORT_ADDRESS,
+                          PAN_ID,
+                          coordAdr,
+                          NULL
+                        );
+  }
+
+  event void MLME_POLL.confirm    (
+                          ieee154_status_t status
+                        ){}
+
+  event void MCPS_DATA.confirm(
+                          message_t *msg,
+                          uint8_t msduHandle,
+                          ieee154_status_t status,
+                          uint32_t Timestamp
+                        ){}
+
+  event message_t* MCPS_DATA.indication ( message_t* frame__ ){
+    call Leds.led2On();
+    call Led2Timer.startOneShot(12500U);
+    return frame__;
+  }
+
+  event void Led2Timer.fired(){
+    call Leds.led2Off();
+  }
+
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/Makefile b/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/Makefile
new file mode 100644
index 00000000..4feced10
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/Makefile
@@ -0,0 +1,5 @@
+COMPONENT=TestPromiscuousAppC
+PFLAGS += -DPRINTF_BUFFER_SIZE=1000
+CFLAGS += -I$(TOSDIR)/lib/printf
+CFLAGS += -DIEEE154_SCAN_DISABLED -DIEEE154_BEACON_SYNC_DISABLED -DIEEE154_BEACON_TX_DISABLED -DIEEE154_RXENABLE_DISABLED -DIEEE154_ASSOCIATION_DISABLED -DIEEE154_DISASSOCIATION_DISABLED -DIEEE154_COORD_REALIGNMENT_DISABLED -DIEEE154_COORD_BROADCAST_DISABLED
+include ../../Makefile.include
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/README.txt b/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/README.txt
new file mode 100644
index 00000000..4cd6469e
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/README.txt
@@ -0,0 +1,42 @@
+README for TestPromiscuous
+Author/Contact: Jan Hauer <hauer@tkn.tu-berlin.de>
+
+Description:
+
+In this application the node enables promiscuous mode, i.e. its radio is
+switched to receive mode and all incoming frames that pass the CRC check are
+signalled to the upper layer. The application uses the TinyOS printf library
+(tos/lib/printf) to output information on the MAC header fields and payload for
+every received frame over the serial port. The second (TelosB: green) LED is
+toggled whenever a frame is received.
+
+Criteria for a successful test:
+
+A successful test means that for every received frame LED1 is toggled
+and the java application outputs some text. To see this effect you need a
+second node sending a packet, for example, use the
+../../beacon-enabled/TestStartSync/coordinator application to send periodic
+beacon packets. In this case LED1 should toggle every half second and
+printf java client should output some text on the frame content.
+
+
+Tools: The printf java client in $TOSDIR/../apps/tests/TestPrintf
+
+Usage: 
+
+Install the application on a node
+
+    $ make <platform> install
+
+Start the printf client, e.g. 
+
+    $ java net.tinyos.tools.PrintfClient -comm serial@/dev/ttyUSBXXX:<platform>
+
+(http://docs.tinyos.net/ has a section on how to use the TinyOS printf library)
+
+Known bugs/limitations:
+
+- The timestamps for ACKs are incorrect
+
+$Id: README.txt,v 1.2 2010-01-05 17:12:56 janhauer Exp $
+
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/TestPromiscuousAppC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/TestPromiscuousAppC.nc
new file mode 100644
index 00000000..fa754d2a
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/TestPromiscuousAppC.nc
@@ -0,0 +1,52 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-10-29 17:42:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration TestPromiscuousAppC
+{
+} implementation {
+ components MainC, TestPromiscuousC as App, LedsC, 
+            Ieee802154NonBeaconEnabledC as MAC;
+
+  MainC.Boot <- App;
+  App.Leds -> LedsC;
+
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  App.MCPS_DATA -> MAC;
+  App.Frame -> MAC;
+  App.BeaconFrame -> MAC;
+  App.PromiscuousMode -> MAC;
+}
diff --git a/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/TestPromiscuousC.nc b/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/TestPromiscuousC.nc
new file mode 100644
index 00000000..5c38327e
--- /dev/null
+++ b/apps/tests/tkn154/nonbeacon-enabled/TestPromiscuous/TestPromiscuousC.nc
@@ -0,0 +1,158 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-10-29 17:42:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154.h"
+module TestPromiscuousC
+{
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface MCPS_DATA;
+    interface Leds;
+    interface IEEE154Frame as Frame;
+    interface IEEE154BeaconFrame as BeaconFrame;
+    interface SplitControl as PromiscuousMode;
+  }
+} implementation {
+
+  const char *m_frametype[] = {"Beacon", "Data","Acknowledgement","MAC command", "Unknown"};
+  const char *m_cmdframetype[] = {"unknown command", "Association request","Association response",
+    "Disassociation notification","Data request","PAN ID conflict notification",
+    "Orphan notification", "Beacon request", "Coordinator realignment", "GTS request"};
+
+  enum {
+    RADIO_CHANNEL = 26,
+  };
+
+  event void Boot.booted() {
+    call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    call MLME_SET.phyCurrentChannel(RADIO_CHANNEL);
+    call PromiscuousMode.start();
+  }
+
+  event message_t* MCPS_DATA.indication (message_t* frame)
+  {
+    uint8_t i;
+    uint8_t *payload = call Frame.getPayload(frame);
+    uint8_t payloadLen = call Frame.getPayloadLength(frame);
+    uint8_t *header = call Frame.getHeader(frame);
+    uint8_t headerLen = call Frame.getHeaderLength(frame);
+    uint8_t SrcAddrMode, DstAddrMode;
+    uint8_t frameType, cmdFrameType;
+    ieee154_address_t SrcAddress, DstAddress;
+    uint16_t SrcPANId=0, DstPANId=0;
+
+    if (call Frame.hasStandardCompliantHeader(frame)){
+      frameType = call Frame.getFrameType(frame);
+      if (frameType > FRAMETYPE_CMD)
+        frameType = 4;
+      call Frame.getSrcPANId(frame, &SrcPANId);
+      call Frame.getDstPANId(frame, &DstPANId);
+      call Frame.getSrcAddr(frame, &SrcAddress);
+      call Frame.getDstAddr(frame, &DstAddress);
+      SrcAddrMode = call Frame.getSrcAddrMode(frame);
+      DstAddrMode = call Frame.getDstAddrMode(frame);
+
+      printf("\n");
+      printf("Frametype: %s", m_frametype[frameType]);
+      if (frameType == FRAMETYPE_CMD){
+        cmdFrameType = payload[0];
+        if (cmdFrameType > 9)
+          cmdFrameType = 0;
+        printf(" (%s)", m_cmdframetype[cmdFrameType]);
+      }
+      printf("\n");
+      printf("SrcAddrMode: %d\n", SrcAddrMode);
+      printf("SrcAddr: ");
+      if (SrcAddrMode == ADDR_MODE_SHORT_ADDRESS){
+        printf("0x%02X\n", SrcAddress.shortAddress);
+        printf("SrcPANId: 0x%02X\n", SrcPANId);
+      } else if (SrcAddrMode == ADDR_MODE_EXTENDED_ADDRESS){
+        for (i=0; i<8; i++)
+          printf("0x%02X ", ((uint8_t*) &(SrcAddress.extendedAddress))[i]);
+        printf("\n");
+        printf("SrcPANId: 0x%02X\n", SrcPANId);
+      } else printf("\n");
+      printf("DstAddrMode: %d\n", DstAddrMode);
+      printf("DstAddr: ");
+      if ( DstAddrMode == ADDR_MODE_SHORT_ADDRESS){
+        printf("0x%02X\n", DstAddress.shortAddress);
+        printf("DestPANId: 0x%02X\n", DstPANId);
+      } else if  ( DstAddrMode == ADDR_MODE_EXTENDED_ADDRESS) {
+        for (i=0; i<8; i++)
+          printf("0x%02X ", ((uint8_t*) &(DstAddress.extendedAddress))[i]);
+        printf("\n");    
+        printf("DestPANId: 0x%02X\n", DstPANId);
+      } else printf("\n");
+
+      printf("DSN: %d\n", call Frame.getDSN(frame));
+      printf("MHRLen: %d\n", headerLen);
+      printf("MHR: ");
+      for (i=0; i<headerLen; i++){
+        printf("0x%02X ", header[i]);
+      }
+      printf("\n");      
+      printf("PayloadLen: %d\n", payloadLen);
+      printf("Payload: ");
+      for (i=0; i<payloadLen; i++){
+        printf("0x%02X ", payload[i]);
+      }
+      printf("\n");
+      printf("MpduLinkQuality: %d\n", call Frame.getLinkQuality(frame));
+
+      printf("Timestamp: ");
+      if (call Frame.isTimestampValid(frame))
+        printf("%ld\n", call Frame.getTimestamp(frame));
+      else
+        printf("INVALID\n");
+      printfflush(); 
+    }
+    call Leds.led1Toggle();
+    return frame;
+  }
+
+  event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp){}
+  event void PromiscuousMode.startDone(error_t error) 
+  {
+    printf("\n*** Radio is now in promiscuous mode, listening on channel %d ***\n", RADIO_CHANNEL);
+    printfflush(); 
+  }
+  event void PromiscuousMode.stopDone(error_t error) {}
+}
diff --git a/apps/tests/tkn154/packetsniffer/Makefile b/apps/tests/tkn154/packetsniffer/Makefile
new file mode 100644
index 00000000..bbac8cd1
--- /dev/null
+++ b/apps/tests/tkn154/packetsniffer/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=SnifferAppC
+CFLAGS += -DIEEE154_SCAN_DISABLED -DIEEE154_BEACON_SYNC_DISABLED -DIEEE154_BEACON_TX_DISABLED -DIEEE154_RXENABLE_DISABLED -DIEEE154_ASSOCIATION_DISABLED -DIEEE154_DISASSOCIATION_DISABLED -DIEEE154_COORD_REALIGNMENT_DISABLED -DIEEE154_COORD_BROADCAST_DISABLED
+include ../Makefile.include
diff --git a/apps/tests/tkn154/packetsniffer/README.txt b/apps/tests/tkn154/packetsniffer/README.txt
new file mode 100644
index 00000000..60d42376
--- /dev/null
+++ b/apps/tests/tkn154/packetsniffer/README.txt
@@ -0,0 +1,55 @@
+README for Sniffer
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+This application uses a single node to passively monitor all traffic on a given
+wireless channel and forward the content of any received IEEE 802.15.4 frame
+over the serial line. The information that is forwarded per received frame is
+the following:
+
+1. the length of the MAC header + MAC payload portion 
+2. the entire MAC header
+3. the entire MAC payload
+4. some frame-specific metadata (RSSI, LQI, timestamp, etc.)
+
+On the PC-side (a) with a few changes
+"$TOSROOT/apps/BaseStation15.4/seriallisten15-4.c" can be adapted to display
+textual information on the frame content (if this is sufficient for you, also
+take a look at ../nonbeacon-enabled/TestPromiscuous app); (b) there exists a
+tool that visualizes the frame fields in a JAVA GUI, it's available here:
+http://www.z-monitor.org (c) another option might be to update wireshark to
+display frames received by this application (but I have not started to look
+into this).
+
+The exact format of the data exchanged over the serial line is best explained
+on an example: assuming a MAC DATA frame of MPDU size 15 byte (= PHY length
+field) with a 9 byte MAC header (including destination PAN, destination address
+and source address) and a 4 byte MAC payload the data sent by the mote to the
+PC over serial would be as follows:
+
+0x02 0x0d 0x41 0x88 0x44 0x22 0x00 0xff 0xff 0x01 0x00 0x3f 0x06 0x01 0x45 0x6a 0xee 0x01 0x09 0x1a 0x56 0x20 0xcc 0x00
+
+The first byte is always "0x02". This is a dispatch ID which tells that the
+serial packet is not an active message (AM), but an 802.15.4 frame. In
+particular, this means that a SerialForwarder will not accept the packet
+(because it would expect a "0x00" there, see Serial.h). The next byte ("0x0d" =
+13) is the size of the MAC header + payload portion. Note that the MAC footer
+(CRC) is *not* taken into consideration, i.e. the second byte is identical to
+the PHY length field minus 2. What follows is the MAC header ("0x41 0x88 0x44
+0x22 0x00 0xff 0xff 0x01 0x00") and MAC payload ("0x3f 0x06 0x01 0x45"). The
+remaining 9 byte are the matadata contained in the nx_struct "sniffer_metadata"
+defined in the "./app_profile.h" file. Note that, like the 802.15.4 formatting
+convention, the metadata is little-endian encoded.
+
+Criteria for a successful test:
+
+LED2 should always be on; LED1 should toggle every time a packet is received
+(and forwarded over serial line); LED0 denotes an error and should never be on.
+
+Known bugs/limitations:
+
+- The timestamps for ACKs are incorrect
+
+$Id: README.txt,v 1.1 2009/10/29 17:42:56 janhauer Exp $
+
diff --git a/apps/tests/tkn154/packetsniffer/SerialPacketInfo802_15_4P.nc b/apps/tests/tkn154/packetsniffer/SerialPacketInfo802_15_4P.nc
new file mode 100644
index 00000000..3903b12f
--- /dev/null
+++ b/apps/tests/tkn154/packetsniffer/SerialPacketInfo802_15_4P.nc
@@ -0,0 +1,47 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009/10/29 17:42:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * This component is shadowing tos/lib/serial/SerialPacketInfo802_15_4P
+ * to forward the SerialPacketInfo interface to our sniffer
+ */
+
+configuration SerialPacketInfo802_15_4P {
+  provides interface SerialPacketInfo as Info;
+}
+implementation {
+  components SnifferC;
+  Info = SnifferC;
+}
diff --git a/apps/tests/tkn154/packetsniffer/SnifferAppC.nc b/apps/tests/tkn154/packetsniffer/SnifferAppC.nc
new file mode 100644
index 00000000..36757370
--- /dev/null
+++ b/apps/tests/tkn154/packetsniffer/SnifferAppC.nc
@@ -0,0 +1,64 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009/10/29 17:42:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "app_profile.h"
+#include "platform_message.h"
+#include "message.h"
+configuration SnifferAppC
+{
+} implementation {
+  components MainC, SnifferC as App, LedsC, 
+            Ieee802154NonBeaconEnabledC as MAC,
+            Serial802_15_4C as Serial,
+            new QueueC(message_t*, RX_QUEUE_SIZE),
+            new PoolC(message_t, RX_QUEUE_SIZE);
+
+
+  MainC.Boot <- App;
+  App.Leds -> LedsC;
+
+  App.MLME_RESET -> MAC;
+  App.MLME_SET -> MAC;
+  App.MLME_GET -> MAC;
+  App.MCPS_DATA -> MAC;
+  App.Frame -> MAC;
+  App.BeaconFrame -> MAC;
+  App.PromiscuousMode -> MAC;
+
+  App.SerialControl -> Serial;
+  App.SerialSend -> Serial;
+  App.Pool -> PoolC;
+  App.Queue -> QueueC;
+}
diff --git a/apps/tests/tkn154/packetsniffer/SnifferC.nc b/apps/tests/tkn154/packetsniffer/SnifferC.nc
new file mode 100644
index 00000000..cfb1acd3
--- /dev/null
+++ b/apps/tests/tkn154/packetsniffer/SnifferC.nc
@@ -0,0 +1,202 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009/10/29 17:42:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154.h"
+#include "app_profile.h"
+module SnifferC
+{
+  provides interface SerialPacketInfo;
+  uses {
+    interface Boot;
+    interface MLME_RESET;
+    interface MLME_SET;
+    interface MLME_GET;
+    interface MCPS_DATA;
+    interface Leds;
+    interface Queue<message_t*> as Queue;
+    interface Pool<message_t> as Pool;
+    interface IEEE154Frame as Frame;
+    interface IEEE154BeaconFrame as BeaconFrame;
+    interface SplitControl as PromiscuousMode;
+    interface SplitControl as SerialControl;
+    interface Send as SerialSend;
+  }
+} implementation {
+
+  bool m_serialSendBusy;
+  task void serialSendTask();
+
+  event void Boot.booted() {
+    m_serialSendBusy = FALSE;
+    if (call Pool.maxSize() != call Queue.maxSize() ||
+        call SerialControl.start() != SUCCESS)
+      call Leds.led0On(); // error
+  }
+
+  event void SerialControl.startDone(error_t error) {
+    if (error != SUCCESS)
+      call Leds.led0On(); // error
+    else
+      call MLME_RESET.request(TRUE);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    if (status != IEEE154_SUCCESS)
+      call Leds.led0On(); // error
+    else {
+      call MLME_SET.phyCurrentChannel(INITAL_RADIO_CHANNEL);
+      if (call PromiscuousMode.start() != SUCCESS)
+        call Leds.led0On(); // error
+    }
+  }
+
+  event void PromiscuousMode.startDone(error_t error) 
+  {
+    // ready - we're now in "sniffing mode" ...
+    call Leds.led2On(); 
+  }
+
+  event message_t* MCPS_DATA.indication (message_t* frame)
+  {
+    // -> received a frame: queue it and post a task to
+    // forward it over serial
+    call Leds.led1Toggle();
+    if (call Queue.enqueue(frame) != SUCCESS) {
+      call Leds.led0On(); // overflow
+      return frame;
+    } else {
+      post serialSendTask();
+      return call Pool.get();
+    }
+  }
+
+  task void serialSendTask() 
+  {
+    message_t* frame;
+    sniffer_metadata_t *snifferMetadata;
+    uint8_t headerLen; 
+    uint8_t payloadLen; 
+    uint8_t serialLen; 
+    ieee154_metadata_t *radioMetadata;
+    uint8_t rssi, lqi;
+    uint8_t *header;
+    uint32_t timestamp;
+    uint8_t *phyLenField;
+
+    if (call Queue.empty() || m_serialSendBusy)
+      return;
+    frame = call Queue.head();
+    radioMetadata = (ieee154_metadata_t*) &frame->metadata;
+    rssi = radioMetadata->rssi;
+    lqi = radioMetadata->linkQuality;
+    timestamp = radioMetadata->timestamp;
+    headerLen = call Frame.getHeaderLength(frame);
+    payloadLen = call Frame.getPayloadLength(frame);
+    header = call Frame.getHeader(frame);
+
+    // update PHY length field: set it to the length of
+    // MHR + payload (ignoring CRC footer)
+    phyLenField = (uint8_t*) frame + call SerialPacketInfo.offset();
+    *phyLenField = headerLen + payloadLen; 
+
+    // need to move the payload to the front, because there can be a
+    // gap between the end of the header and the start of the payload
+    // section (-> do not touch the frame via Frame interface afterwards)
+    memmove(header + headerLen, call Frame.getPayload(frame), payloadLen);
+
+    snifferMetadata = (sniffer_metadata_t *) (header + headerLen + payloadLen);
+    if ((uint8_t*) snifferMetadata + sizeof(sniffer_metadata_t) > 
+        (uint8_t*) frame + sizeof(message_t)) {
+      // message_t is too small to hold frame content + sniffer_metadata_t
+      // (this cannot happen, unless someone messes with the header files)
+      call Leds.led0On();
+      return;
+    }
+    snifferMetadata->lqi = lqi;
+    snifferMetadata->rssi = rssi - 45; // substract offset (see CC2420 datasheet)
+
+    // IEEE 802.15.4 Std: incoming packets with incorrect CRC 
+    // are discarded even in promiscuous mode (so all frames
+    // we get here must have passed the CRC check already)
+    snifferMetadata->crc = 1;
+    snifferMetadata->mhrLen = headerLen;
+    snifferMetadata->channel = call MLME_GET.phyCurrentChannel();
+    snifferMetadata->timestamp = timestamp;
+
+    serialLen = 1 + // for the PHY length field
+      headerLen + payloadLen + sizeof(sniffer_metadata_t);     
+    m_serialSendBusy = TRUE;
+    if (call SerialSend.send(frame, serialLen) != SUCCESS)
+      call Leds.led0On();
+  }
+  
+  event void SerialSend.sendDone(message_t* frame, error_t error) {
+    if (error != SUCCESS)
+      call Leds.led0On();
+    else {
+      call Pool.put(call Queue.dequeue());
+      m_serialSendBusy = FALSE;
+      if (!call Queue.empty())
+        post serialSendTask();
+    }
+  }
+
+  async command uint8_t SerialPacketInfo.offset()
+  {
+    return offsetof(message_t, header) +
+           offsetof(message_header_t, ieee154) +
+           offsetof(ieee154_header_t, length);
+  }
+
+  async command uint8_t SerialPacketInfo.dataLinkLength(message_t* frame, uint8_t upperLen)
+  {
+    // returns size of the serial PDU
+    uint8_t length = *((uint8_t*) frame + call SerialPacketInfo.offset());
+    return 1 + length + sizeof(sniffer_metadata_t); // 1 for the length-field itself
+  }
+
+  async command uint8_t SerialPacketInfo.upperLength(message_t* msg, uint8_t dataLinkLen)
+  {
+    // returns size of the serial PDU minus the MAC header length
+    uint8_t *phyLenField = (uint8_t*) msg + call SerialPacketInfo.offset();
+    sniffer_metadata_t *snifferMetadata = 
+      (sniffer_metadata_t *) (phyLenField + *phyLenField);
+    return *phyLenField + sizeof(sniffer_metadata_t) - snifferMetadata->mhrLen;
+  }
+
+  event void MCPS_DATA.confirm( message_t *msg, uint8_t msduHandle, ieee154_status_t status, uint32_t Timestamp){}
+  event void PromiscuousMode.stopDone(error_t error) {}
+  event void SerialControl.stopDone(error_t error) {}
+}
diff --git a/apps/tests/tkn154/packetsniffer/app_profile.h b/apps/tests/tkn154/packetsniffer/app_profile.h
new file mode 100644
index 00000000..ab843b10
--- /dev/null
+++ b/apps/tests/tkn154/packetsniffer/app_profile.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009/06/10 09:23:45 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __APP_PROFILE_H
+#define __APP_PROFILE_H
+
+enum {
+  INITAL_RADIO_CHANNEL = 26, // may be changed later via command over serial line
+  RX_QUEUE_SIZE = 10,        // max. packets queued after received over radio
+};
+
+typedef nx_struct sniffer_metadata 
+{
+  nxle_uint8_t lqi;        // LQI (see CC2420 datasheet for definition)
+  nxle_int8_t rssi;        // RSSI in dBm
+  nxle_uint8_t crc;        // 0: CRC check failed, 1: CRC check passed
+  nxle_uint8_t mhrLen;     // length of the MAC header (for convenience)
+  nxle_uint8_t channel;    // 802.15.4 channel on which the frame was received (11..26)  
+  nxle_uint32_t timestamp; // elapsed time since booting in symbols (1 tick = 16 us)
+} sniffer_metadata_t;
+
+#endif
diff --git a/apps/tosthreads/README b/apps/tosthreads/README
new file mode 100644
index 00000000..9be008d0
--- /dev/null
+++ b/apps/tosthreads/README
@@ -0,0 +1,27 @@
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+The applications contained in this directory are both 'example' and 'test'
+applications for running TOSThreads based applications in TinyOS.  All
+applications in the 'apps' directory can be compiled by running the command:
+
+    make <platform> threads
+    
+and all applications in the 'capps' directory can be compiled by running:
+    
+    make <platform> cthreads
+    
+Some applications may be platform specific, but in general TOSThreads currently
+supports the following platforms: tmote, telosb, iris, mica2, and micaz 
+
+To compile all applications under 'apps' for a given platform, simpley 'cd' into
+the 'apps' directory and run the 'make' command specified above.  Similarly,
+'cd' into the 'capps' directory and run the 'cthreads' version of the make
+command to compile all of those applications too.
+
+There are READMEs contained in each application subdirectory that explain how
+the application works, and hwo one can verify that it is operating correctly.  
+
+I hope everyone finds these applications and their descriptions useful.  And I
+hope everyone finds TOSThreads both intuitive and easy to use.  Enjoy.
+
+~Kevin Klues
diff --git a/apps/tosthreads/apps/BaseStation/BaseSendReceiveP.nc b/apps/tosthreads/apps/BaseStation/BaseSendReceiveP.nc
new file mode 100644
index 00000000..5497f40b
--- /dev/null
+++ b/apps/tosthreads/apps/BaseStation/BaseSendReceiveP.nc
@@ -0,0 +1,195 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * BaseStation is a reimplementation of the standard BaseStation application using
+ * the TOSThreads thread library.  It transparently forwards any AM messages it
+ * receives from its radio interface to its serial interface and vice versa.
+ *
+ * <p>On the serial link, BaseStation sends and receives simple active
+ * messages (not particular radio packets): on the radio link, it
+ * sends radio active messages, whose format depends on the network
+ * stack being used. BaseStation will copy its compiled-in group ID to
+ * messages moving from the serial link to the radio, and will filter
+ * out incoming radio messages that do not contain that group ID.</p>
+ *
+ * <p>BaseStation includes queues in both directions, with a guarantee
+ * that once a message enters a queue, it will eventually leave on the
+ * other interface. The queues allow the BaseStation to handle load
+ * spikes.</p>
+ *
+ * <p>BaseStation acknowledges a message arriving over the serial link
+ * only if that message was successfully enqueued for delivery to the
+ * radio link.</p>
+ *
+ * <p>The LEDS are programmed to toggle as follows:</p>
+ * <ul>
+ * <li><b>LED0:</b> Message bridged from serial to radio</li>
+ * <li><b>LED1:</b> Message bridged from radio to serial</li>
+ * <li><b>LED2:</b> Dropped message due to queue overflow in either direction</li>
+ * </ul>
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+generic module BaseSendReceiveP() {
+  uses {
+    interface Boot;
+    interface Thread as ReceiveThread;
+    interface Thread as SnoopThread;
+    interface Thread as SendThread;
+    interface ConditionVariable;
+    interface Mutex;
+    interface Pool<message_t>;
+    interface Queue<message_t*>;
+    interface Leds;
+    
+    interface BlockingReceive as BlockingReceiveAny;
+    interface BlockingReceive as BlockingSnoopAny;
+    interface BlockingAMSend as BlockingAMSend[uint8_t id];
+    interface Packet as ReceivePacket;
+    interface Packet as SendPacket;
+    interface AMPacket as ReceiveAMPacket;
+    interface AMPacket as SendAMPacket;
+  }
+}
+
+implementation {
+  condvar_t c_queue, c_pool;
+  mutex_t m_queue, m_pool;
+  
+  event void Boot.booted() {
+    call ConditionVariable.init(&c_queue);
+    call ConditionVariable.init(&c_pool);
+    call Mutex.init(&m_queue);
+    call Mutex.init(&m_pool);
+    call ReceiveThread.start(NULL);
+    call SnoopThread.start(NULL);
+    call SendThread.start(NULL);
+  }
+  
+  event void ReceiveThread.run(void* arg) {   
+    message_t* msg;
+    call Mutex.lock(&m_pool);
+      msg = call Pool.get();
+    call Mutex.unlock(&m_pool);
+    for(;;) {
+      if(call BlockingReceiveAny.receive(msg, 0) == SUCCESS) {
+        call Leds.led0Toggle();
+        
+        call Mutex.lock(&m_queue);
+          call Queue.enqueue(msg);
+        call Mutex.unlock(&m_queue);
+        if( call Queue.size() == 1 ) {
+          call ConditionVariable.signalAll(&c_queue);
+        }
+        
+        call Mutex.lock(&m_pool);
+          while( call Pool.empty() )
+            call ConditionVariable.wait(&c_pool, &m_pool);
+          msg = call Pool.get();
+        call Mutex.unlock(&m_pool);
+        
+      }
+      else call Leds.led2Toggle();
+    }
+  }
+  
+  event void SnoopThread.run(void* arg) {   
+    message_t* msg;
+    call Mutex.lock(&m_pool);
+      msg = call Pool.get();
+    call Mutex.unlock(&m_pool);
+    for(;;) {
+      if(call BlockingSnoopAny.receive(msg, 0) == SUCCESS) {
+        call Leds.led0Toggle();
+        
+        call Mutex.lock(&m_queue);
+          call Queue.enqueue(msg);
+        call Mutex.unlock(&m_queue);
+        if( call Queue.size() == 1 ) {
+          call ConditionVariable.signalAll(&c_queue);
+        }
+        
+        call Mutex.lock(&m_pool);
+          while( call Pool.empty() )
+            call ConditionVariable.wait(&c_pool, &m_pool);
+          msg = call Pool.get();
+        call Mutex.unlock(&m_pool);
+        
+      }
+      else call Leds.led2Toggle();
+    }
+  }
+  
+  event void SendThread.run(void* arg) {  
+    message_t* msg;
+    am_id_t id;
+    am_addr_t source;
+    am_addr_t dest;
+    uint8_t len;  
+  
+    for(;;) {
+      call Mutex.lock(&m_queue);
+        while( call Queue.empty() )
+          call ConditionVariable.wait(&c_queue, &m_queue);
+        msg = call Queue.dequeue();
+      call Mutex.unlock(&m_queue);
+      
+      id = call ReceiveAMPacket.type(msg);
+      source = call ReceiveAMPacket.source(msg);
+      dest = call ReceiveAMPacket.destination(msg);
+      len = call ReceivePacket.payloadLength(msg);
+      
+      call SendPacket.clear(msg);
+      call SendAMPacket.setSource(msg, source);
+      
+      call BlockingAMSend.send[id](dest, msg, len);
+      call Leds.led1Toggle();
+      
+      call Mutex.lock(&m_pool);
+        call Pool.put(msg);
+      call Mutex.unlock(&m_pool);
+      if( call Pool.size() == 1 ) {
+        call ConditionVariable.signalAll(&c_pool);
+      }
+    }
+  }
+  
+  default command error_t BlockingSnoopAny.receive(message_t* m, uint32_t timeout) { return FAIL; }
+  default command void* BlockingSnoopAny.getPayload(message_t* msg, uint8_t len) { return NULL; }
+  default command error_t SnoopThread.start(void* arg) { return FAIL; }
+  default command error_t SnoopThread.stop() { return FAIL; }
+  default command error_t SnoopThread.pause() { return FAIL; }
+  default command error_t SnoopThread.resume() { return FAIL; }
+  default command error_t SnoopThread.sleep(uint32_t milli) { return FAIL; }	
+}
diff --git a/apps/tosthreads/apps/BaseStation/BaseStationAppC.nc b/apps/tosthreads/apps/BaseStation/BaseStationAppC.nc
new file mode 100644
index 00000000..09ca717e
--- /dev/null
+++ b/apps/tosthreads/apps/BaseStation/BaseStationAppC.nc
@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * BaseStation is a reimplementation of the standard BaseStation application using
+ * the TOSThreads thread library.  It transparently forwards any AM messages it
+ * receives from its radio interface to its serial interface and vice versa. 
+ *
+ * <p>On the serial link, BaseStation sends and receives simple active
+ * messages (not particular radio packets): on the radio link, it
+ * sends radio active messages, whose format depends on the network
+ * stack being used. BaseStation will copy its compiled-in group ID to
+ * messages moving from the serial link to the radio, and will filter
+ * out incoming radio messages that do not contain that group ID.</p>
+ *
+ * <p>BaseStation includes queues in both directions, with a guarantee
+ * that once a message enters a queue, it will eventually leave on the
+ * other interface. The queues allow the BaseStation to handle load
+ * spikes.</p>
+ *
+ * <p>BaseStation acknowledges a message arriving over the serial link
+ * only if that message was successfully enqueued for delivery to the
+ * radio link.</p>
+ *
+ * <p>The LEDS are programmed to toggle as follows:</p>
+ * <ul>
+ * <li><b>LED0:</b> Message bridged from serial to radio</li>
+ * <li><b>LED1:</b> Message bridged from radio to serial</li>
+ * <li><b>LED2:</b> Dropped message due to queue overflow in either direction</li>
+ * </ul>
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "base_station.h"
+#include "stack.h"
+#include "message.h"
+
+configuration BaseStationAppC {}
+
+implementation
+{
+  components MainC,
+             BaseStationC,
+             new BaseSendReceiveP() as RadioReceiveSerialSendP,
+             new BaseSendReceiveP() as SerialReceiveRadioSendP,
+             
+             new ThreadC(BOOT_THREAD_STACK_SIZE) as BootThread,
+             new ThreadC(RADIO_RECEIVE_THREAD_STACK_SIZE) as RadioReceiveThread,
+             new ThreadC(RADIO_SNOOP_THREAD_STACK_SIZE) as RadioSnoopThread,
+             new ThreadC(SERIAL_SEND_THREAD_STACK_SIZE) as SerialSendThread,
+             new ThreadC(SERIAL_RECEIVE_THREAD_STACK_SIZE) as SerialReceiveThread,
+             new ThreadC(RADIO_SEND_THREAD_STACK_SIZE) as RadioSendThread,
+             
+             new PoolC(message_t, BASE_STATION_MSG_QUEUE_SIZE) as RadioReceivePool,
+             new QueueC(message_t*, BASE_STATION_MSG_QUEUE_SIZE) as RadioReceiveQueue,
+             new PoolC(message_t, BASE_STATION_MSG_QUEUE_SIZE) as SerialReceivePool,
+             new QueueC(message_t*, BASE_STATION_MSG_QUEUE_SIZE) as SerialReceiveQueue,
+             
+             ThreadSynchronizationC,             
+             LedsC;
+  
+  BaseStationC.Boot -> MainC;
+  RadioReceiveSerialSendP.Boot -> BaseStationC;
+  SerialReceiveRadioSendP.Boot -> BaseStationC;
+
+  BaseStationC.BootThread -> BootThread;
+  RadioReceiveSerialSendP.ReceiveThread -> RadioReceiveThread;
+  RadioReceiveSerialSendP.SnoopThread -> RadioSnoopThread;
+  RadioReceiveSerialSendP.SendThread -> SerialSendThread;
+  SerialReceiveRadioSendP.ReceiveThread -> SerialReceiveThread;
+  SerialReceiveRadioSendP.SendThread -> RadioSendThread;  
+  
+  RadioReceiveSerialSendP.Pool -> RadioReceivePool;
+  RadioReceiveSerialSendP.Queue -> RadioReceiveQueue;
+  SerialReceiveRadioSendP.Pool -> SerialReceivePool;  
+  SerialReceiveRadioSendP.Queue -> SerialReceiveQueue;
+  
+  RadioReceiveSerialSendP.ConditionVariable -> ThreadSynchronizationC;
+  RadioReceiveSerialSendP.Mutex -> ThreadSynchronizationC;
+  RadioReceiveSerialSendP.Leds -> LedsC;
+  SerialReceiveRadioSendP.ConditionVariable -> ThreadSynchronizationC;
+  SerialReceiveRadioSendP.Mutex -> ThreadSynchronizationC;
+  SerialReceiveRadioSendP.Leds -> LedsC;
+  
+  components BlockingActiveMessageC as BlockingRadioActiveMessageC,             
+             BlockingSerialActiveMessageC;
+             
+  BaseStationC.BlockingRadioAMControl -> BlockingRadioActiveMessageC;
+  BaseStationC.BlockingSerialAMControl -> BlockingSerialActiveMessageC;
+  
+  RadioReceiveSerialSendP.ReceivePacket -> BlockingRadioActiveMessageC;
+  RadioReceiveSerialSendP.SendPacket -> BlockingSerialActiveMessageC;
+  RadioReceiveSerialSendP.ReceiveAMPacket -> BlockingRadioActiveMessageC;
+  RadioReceiveSerialSendP.SendAMPacket -> BlockingSerialActiveMessageC;             
+  RadioReceiveSerialSendP.BlockingReceiveAny -> BlockingRadioActiveMessageC.BlockingReceiveAny;
+  RadioReceiveSerialSendP.BlockingSnoopAny -> BlockingRadioActiveMessageC.BlockingSnoopAny;
+  RadioReceiveSerialSendP.BlockingAMSend -> BlockingSerialActiveMessageC;
+  
+  SerialReceiveRadioSendP.ReceivePacket -> BlockingSerialActiveMessageC;
+  SerialReceiveRadioSendP.SendPacket -> BlockingRadioActiveMessageC;
+  SerialReceiveRadioSendP.ReceiveAMPacket -> BlockingSerialActiveMessageC;
+  SerialReceiveRadioSendP.SendAMPacket -> BlockingRadioActiveMessageC;             
+  SerialReceiveRadioSendP.BlockingReceiveAny -> BlockingSerialActiveMessageC.BlockingReceiveAny;
+  SerialReceiveRadioSendP.BlockingAMSend -> BlockingRadioActiveMessageC;
+}
diff --git a/apps/tosthreads/apps/BaseStation/BaseStationC.nc b/apps/tosthreads/apps/BaseStation/BaseStationC.nc
new file mode 100644
index 00000000..987aa6bc
--- /dev/null
+++ b/apps/tosthreads/apps/BaseStation/BaseStationC.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * BaseStation is a reimplementation of the standard BaseStation application using
+ * the TOSThreads thread library.  It transparently forwards any AM messages it
+ * receives from its radio interface to its serial interface and vice versa.
+ *
+ * <p>On the serial link, BaseStation sends and receives simple active
+ * messages (not particular radio packets): on the radio link, it
+ * sends radio active messages, whose format depends on the network
+ * stack being used. BaseStation will copy its compiled-in group ID to
+ * messages moving from the serial link to the radio, and will filter
+ * out incoming radio messages that do not contain that group ID.</p>
+ *
+ * <p>BaseStation includes queues in both directions, with a guarantee
+ * that once a message enters a queue, it will eventually leave on the
+ * other interface. The queues allow the BaseStation to handle load
+ * spikes.</p>
+ *
+ * <p>BaseStation acknowledges a message arriving over the serial link
+ * only if that message was successfully enqueued for delivery to the
+ * radio link.</p>
+ *
+ * <p>The LEDS are programmed to toggle as follows:</p>
+ * <ul>
+ * <li><b>LED0:</b> Message bridged from serial to radio</li>
+ * <li><b>LED1:</b> Message bridged from radio to serial</li>
+ * <li><b>LED2:</b> Dropped message due to queue overflow in either direction</li>
+ * </ul>
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module BaseStationC {
+  provides {
+    interface Boot as BaseStationBoot;
+  }
+  uses {
+    interface Boot;    
+    interface Thread as BootThread;
+    interface BlockingStdControl as BlockingRadioAMControl;
+    interface BlockingStdControl as BlockingSerialAMControl;
+  }
+}
+
+implementation {
+
+  event void Boot.booted() {
+    call BootThread.start(NULL);
+  }
+  
+  event void BootThread.run(void* arg) {
+    call BlockingRadioAMControl.start();
+    call BlockingSerialAMControl.start();
+    signal BaseStationBoot.booted();
+  }  
+}
diff --git a/apps/tosthreads/apps/BaseStation/Makefile b/apps/tosthreads/apps/BaseStation/Makefile
new file mode 100644
index 00000000..85201696
--- /dev/null
+++ b/apps/tosthreads/apps/BaseStation/Makefile
@@ -0,0 +1,6 @@
+COMPONENT=BaseStationAppC
+CFLAGS+=-DCC2420_NO_ACKNOWLEDGEMENTS
+CFLAGS+=-DCC2420_NO_ADDRESS_RECOGNITION
+CFLAGS+=-DTOSH_DATA_LENGTH=115
+ 
+include $(MAKERULES)
diff --git a/apps/tosthreads/apps/BaseStation/README b/apps/tosthreads/apps/BaseStation/README
new file mode 100644
index 00000000..11c1a622
--- /dev/null
+++ b/apps/tosthreads/apps/BaseStation/README
@@ -0,0 +1,61 @@
+README for TOSThreads BaseStation 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+BaseStation is a reimplementation of the standard BaseStation application using
+the TOSThreads thread library.  It transparently forwards any AM messages it
+receives from its radio interface to its serial interface and vice versa. Upon
+successful reception of a packet, LED0 is toggled, and upon successful
+forwarding, LED1 is toggled.  If there are any errors, LED2 is toggled.  
+
+To run this application install it on a mote via the command:
+  make <platform> threads install.45
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+Installing with NODE_ID 45 (i.e. AM_ADDRESS 45) is just to verify that the
+application forwards packets with an arbitrarily chosen id, which it should.
+
+To test the correct operation of this application, you need two motes:  one with
+this BaseStation application installed on it, and one with an application that
+is sending messages installed, (let's use the RadioStress application from the
+current directory).  
+
+On one mote install the Base station via the command above, and on the other
+install RadioStress via the command:
+  make <platform> threads install.1
+  
+Don't forget the '.1' when you install, or RadioStress will be configured to
+receive rather than send messages.  Messages are sent to AM_ADDRESS 0.
+
+A successful test will result in the RadioStress mote constantly flickering all
+of its leds very rapidly, and the BaseStation mote flickering its LED0 and LED1
+leds rapidly.  Additionally, messages should be forwarded over the serial interface
+as verified by running the following for the platform of interest:
+  java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX:<baud_rate>
+  
+NOTE::  The baud rate 57600 must be used telos based motes, as its configuration
+has been changed to work with this baud rate when compiled for tosthreads. I.e.
+DO NOT just substitute 'telosb' or 'tmote' for <baud_rate> above.  Explicitly
+set it to 57600.
+
+Once this java application is running, you should see output of the sort
+constantly being streamed to your terminal:
+  00 00 00 00 01 00 00 14 
+  00 00 00 00 01 00 00 16 
+  00 00 00 00 01 00 00 15 
+  00 00 00 00 01 00 00 14 
+  00 00 00 00 01 00 00 16 
+  00 00 00 00 01 00 00 15 
+  00 00 00 00 01 00 00 14 
+  00 00 00 00 01 00 00 16 
+  00 00 00 00 01 00 00 15 
+  00 00 00 00 01 00 00 14 
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/apps/BaseStation/base_station.h b/apps/tosthreads/apps/BaseStation/base_station.h
new file mode 100644
index 00000000..71aa6890
--- /dev/null
+++ b/apps/tosthreads/apps/BaseStation/base_station.h
@@ -0,0 +1,50 @@
+ /*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Header file for declaring constants and AM types for use by the 
+ * BaseStation application
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#ifndef BASE_STATION_H
+#define BASE_STATION_H
+
+enum {
+  BASE_STATION_MSG_QUEUE_SIZE = 3,
+};
+
+enum {
+  AM_SERIAL_BASE_MSG = 0,
+};
+
+#endif //BASE_STATION_H
diff --git a/apps/tosthreads/apps/BaseStation/stack.h b/apps/tosthreads/apps/BaseStation/stack.h
new file mode 100644
index 00000000..185b1f50
--- /dev/null
+++ b/apps/tosthreads/apps/BaseStation/stack.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#ifndef BASE_STATION_APP_STACK_H
+#define BASE_STATION_APP_STACK_H
+
+enum {
+  BOOT_THREAD_STACK_SIZE            = 200,
+  RADIO_RECEIVE_THREAD_STACK_SIZE   = 200,
+  RADIO_SNOOP_THREAD_STACK_SIZE     = 200,
+  SERIAL_SEND_THREAD_STACK_SIZE     = 200,
+  SERIAL_RECEIVE_THREAD_STACK_SIZE  = 200,
+  RADIO_SEND_THREAD_STACK_SIZE      = 200,
+};
+
+#endif //BASE_STATION_APP_STACK_H
diff --git a/apps/tosthreads/apps/Blink/BlinkAppC.nc b/apps/tosthreads/apps/Blink/BlinkAppC.nc
new file mode 100644
index 00000000..85058312
--- /dev/null
+++ b/apps/tosthreads/apps/Blink/BlinkAppC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Blink is a simple application used to test the basic functionality of
+ * TOSThreads.
+ *
+ * Upon a successful burn, you should see LED0 flashing with a period of every
+ * 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms.
+ *
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+configuration BlinkAppC {
+}
+implementation {
+  components MainC, BlinkC,  LedsC;
+  components new ThreadC(100) as NullThread;
+  components new ThreadC(100) as TinyThread0;
+  components new ThreadC(100) as TinyThread1;
+  components new ThreadC(100) as TinyThread2;
+
+  MainC.Boot <- BlinkC;
+  BlinkC.NullThread -> NullThread;
+  BlinkC.TinyThread0 -> TinyThread0;
+  BlinkC.TinyThread1 -> TinyThread1; 
+  BlinkC.TinyThread2 -> TinyThread2;
+
+  BlinkC.Leds -> LedsC;
+}
+
diff --git a/apps/tosthreads/apps/Blink/BlinkC.nc b/apps/tosthreads/apps/Blink/BlinkC.nc
new file mode 100644
index 00000000..ed6fcb7d
--- /dev/null
+++ b/apps/tosthreads/apps/Blink/BlinkC.nc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Blink is a simple application used to test the basic functionality of
+ * TOSThreads.
+ *
+ * Upon a successful burn, you should see LED0 flashing with a period of every
+ * 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms.
+ *
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+module BlinkC {
+  uses {
+    interface Boot;
+    interface Thread as NullThread;
+    interface Thread as TinyThread0;
+    interface Thread as TinyThread1;
+    interface Thread as TinyThread2;
+    interface Leds;
+  }
+}
+
+implementation {
+  event void Boot.booted() {
+    //call NullThread.start(NULL);
+    call TinyThread0.start(NULL);
+    call TinyThread1.start(NULL);
+    call TinyThread2.start(NULL);
+  }
+
+  event void NullThread.run(void* arg) {
+    for(;;){
+    }
+  }  
+  event void TinyThread0.run(void* arg) {
+    for(;;){
+      call Leds.led0Toggle();
+      call TinyThread0.sleep(200);
+    }
+  }
+  event void TinyThread1.run(void* arg) {
+    for(;;){
+      call Leds.led1Toggle();
+      call TinyThread1.sleep(1000);
+    }
+  }
+  event void TinyThread2.run(void* arg) {
+    for(;;){
+      call Leds.led2Toggle();
+      call TinyThread2.sleep(1000);
+    }
+  }
+}
diff --git a/apps/tosthreads/apps/Blink/Makefile b/apps/tosthreads/apps/Blink/Makefile
new file mode 100644
index 00000000..7f9fb6b1
--- /dev/null
+++ b/apps/tosthreads/apps/Blink/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=BlinkAppC
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/apps/Blink/README b/apps/tosthreads/apps/Blink/README
new file mode 100644
index 00000000..31ed5dcb
--- /dev/null
+++ b/apps/tosthreads/apps/Blink/README
@@ -0,0 +1,22 @@
+README for TOSThreads Blink 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+Blink is a simple application used to test the basic functionality of
+TOSThreads.
+
+You can install Blink on a mote via the following command:
+  make <platform> threads install
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+Upon a successful burn, you should see LED0 flashing with a period of every
+200ms, and LED1 and LED2 flashing in unison with a period of 1000ms.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/apps/Blink_DynamicThreads/BlinkAppC.nc b/apps/tosthreads/apps/Blink_DynamicThreads/BlinkAppC.nc
new file mode 100644
index 00000000..811a40c8
--- /dev/null
+++ b/apps/tosthreads/apps/Blink_DynamicThreads/BlinkAppC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * Blink is a simple application used to test the basic functionality of
+ * TOSThreads using dynamic threads rather than static threads.
+ *
+ * Upon a successful burn, you should see LED0 flashing with a period of every
+ * 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms.
+ *
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration BlinkAppC {}
+
+implementation {
+  components MainC,
+             BlinkC,
+             LedsC,
+             DynamicThreadC;
+
+  BlinkC.Boot -> MainC;
+  
+  BlinkC.Leds -> LedsC;
+  BlinkC.DynamicThread -> DynamicThreadC;
+}
diff --git a/apps/tosthreads/apps/Blink_DynamicThreads/BlinkC.nc b/apps/tosthreads/apps/Blink_DynamicThreads/BlinkC.nc
new file mode 100644
index 00000000..aec51c24
--- /dev/null
+++ b/apps/tosthreads/apps/Blink_DynamicThreads/BlinkC.nc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * Blink is a simple application used to test the basic functionality of
+ * TOSThreads using dynamic threads rather than static threads.
+ *
+ * Upon a successful burn, you should see LED0 flashing with a period of every
+ * 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms.
+ *
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module BlinkC {
+  uses {
+    interface Boot;
+    interface Leds;
+    interface DynamicThread;
+  }
+}
+
+implementation {
+  tosthread_t blink1;
+  tosthread_t blink2;
+  tosthread_t blink3;
+  uint16_t a1 = 1;
+  uint16_t a2 = 2;
+  uint16_t a3 = 3;
+
+  void blink_thread(void* arg)
+  {
+    uint16_t *a = (uint16_t *)arg;
+    
+    for (;;) {
+      if (*a == 1) {
+        call Leds.led0Toggle();
+        call DynamicThread.sleep(200);
+      } else if (*a == 2) {
+        call Leds.led1Toggle();
+        call DynamicThread.sleep(1000);
+      } else if (*a == 3) {
+        call Leds.led2Toggle();
+        call DynamicThread.sleep(1000);
+      }
+    }
+  }
+    
+  event void Boot.booted()
+  {
+    call DynamicThread.create(&blink1, blink_thread, &a1, 500);
+    call DynamicThread.create(&blink2, blink_thread, &a2, 500);
+    call DynamicThread.create(&blink3, blink_thread, &a3, 500);
+  }
+}
diff --git a/apps/tosthreads/apps/Blink_DynamicThreads/Makefile b/apps/tosthreads/apps/Blink_DynamicThreads/Makefile
new file mode 100644
index 00000000..7f9fb6b1
--- /dev/null
+++ b/apps/tosthreads/apps/Blink_DynamicThreads/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=BlinkAppC
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/apps/Blink_DynamicThreads/README b/apps/tosthreads/apps/Blink_DynamicThreads/README
new file mode 100644
index 00000000..d5cd5c96
--- /dev/null
+++ b/apps/tosthreads/apps/Blink_DynamicThreads/README
@@ -0,0 +1,21 @@
+README for TOSThreads Blink_DynamicThreads
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+
+Description:
+
+Blink_DynamicThreads is the dynamic-thread version of Blink.
+
+You can install Blink_DynamicThread on a mote via the following command:
+  make <platform> threads install
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+Upon a successful burn, you should see LED0 flashing with a period of every
+200ms, and LED1 and LED2 flashing in unison with a period of 1000ms.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/apps/Bounce/BarrierBounceAppC.nc b/apps/tosthreads/apps/Bounce/BarrierBounceAppC.nc
new file mode 100644
index 00000000..62eff0f0
--- /dev/null
+++ b/apps/tosthreads/apps/Bounce/BarrierBounceAppC.nc
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This application is derived from a similar application in the TinyThread 
+ * implementation by William P. McCartney from Cleveland State University (2006)
+ *
+ * This application implements a threaded approach to bouncing messages back and forth
+ * between two motes.  To run it you will need to burn one mote with node ID 0, and a 
+ * second mote with node ID 1.  Three different threads run that each send a 
+ * message and then wait to receive a message before sending their next one.  After
+ * each message reception, an LED is toggled to indicate that it was received.  Thread
+ * 0 blinks led0, thread 1 blinks led1, and thread 2 blinks led2.  The three 
+ * threads run independently, and three different messages are bounced back and 
+ * forth between the two motes in an unsynchronized fashion.  In contrast to the simple
+ * Bounce application also found in this directory, once a thread receives a message
+ * it waits on a Barrier before continuing on and turning on its led.  A synchronization 
+ * thread is used to wait until all three messages have been received before unblocking
+ * the barrier.  In this way, messages are still bounced back and forth between the 
+ * two motes in an asynchronous fashion, but all leds come on at the same time 
+ * because of the Barrier and the synchronization thread.  The effect is that all three
+ * leds on one mote flash in unison, followed by all three on the other mote back
+ * and forth forever.  
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "barrier_bounce.h"
+#include "stack.h"
+
+configuration BarrierBounceAppC {
+}
+implementation {
+  components MainC, BarrierBounceC as BounceC,  LedsC;
+  components BlockingActiveMessageC;
+  MainC.Boot <- BounceC;
+  BounceC.BlockingAMControl -> BlockingActiveMessageC;
+  BounceC.Leds -> LedsC;
+  
+  // Included to allow the use of barriers in our application
+  components ThreadSynchronizationC;
+  BounceC.Barrier -> ThreadSynchronizationC;
+  
+  // Thread and Bounce Message handlers for thread 0
+  components new ThreadC(BOUNCE_THREAD0_STACK_SIZE) as BounceThread0;
+  components new BlockingAMSenderC(AM_BOUNCE0_MSG) as BlockingAMSender0;
+  components new BlockingAMReceiverC(AM_BOUNCE0_MSG) as BlockingAMReceiver0;
+  BounceC.BounceThread0 -> BounceThread0;
+  BounceC.BlockingAMSend0 -> BlockingAMSender0;
+  BounceC.BlockingReceive0 -> BlockingAMReceiver0;
+  
+  // Thread and Bounce Message handlers for thread 1
+  components new ThreadC(BOUNCE_THREAD1_STACK_SIZE) as BounceThread1;
+  components new BlockingAMSenderC(AM_BOUNCE1_MSG) as BlockingAMSender1;
+  components new BlockingAMReceiverC(AM_BOUNCE1_MSG) as BlockingAMReceiver1;
+  BounceC.BounceThread1 -> BounceThread1;
+  BounceC.BlockingAMSend1 -> BlockingAMSender1;
+  BounceC.BlockingReceive1 -> BlockingAMReceiver1;
+  
+  // Thread and Bounce Message handlers for thread 2
+  components new ThreadC(BOUNCE_THREAD2_STACK_SIZE) as BounceThread2;
+  components new BlockingAMSenderC(AM_BOUNCE2_MSG) as BlockingAMSender2;
+  components new BlockingAMReceiverC(AM_BOUNCE2_MSG) as BlockingAMReceiver2;
+  BounceC.BounceThread2 -> BounceThread2;
+  BounceC.BlockingAMSend2 -> BlockingAMSender2;
+  BounceC.BlockingReceive2 -> BlockingAMReceiver2;
+  
+  // Synchronization thread to keep all threads in sync so that
+  // none of them are able to continue execution until all of them
+  // have both sent and received a message
+  components new ThreadC(SYNC_THREAD_STACK_SIZE) as SyncThread;
+  BounceC.SyncThread -> SyncThread;
+}
+
diff --git a/apps/tosthreads/apps/Bounce/BarrierBounceC.nc b/apps/tosthreads/apps/Bounce/BarrierBounceC.nc
new file mode 100644
index 00000000..5a860794
--- /dev/null
+++ b/apps/tosthreads/apps/Bounce/BarrierBounceC.nc
@@ -0,0 +1,141 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This application is derived from a similar application in the TinyThread 
+ * implementation by William P. McCartney from Cleveland State University (2006)
+ *
+ * This application implements a threaded approach to bouncing messages back and forth
+ * between two motes.  To run it you will need to burn one mote with node ID 0, and a 
+ * second mote with node ID 1.  Three different threads run that each send a 
+ * message and then wait to receive a message before sending their next one.  After
+ * each message reception, an LED is toggled to indicate that it was received.  Thread
+ * 0 blinks led0, thread 1 blinks led1, and thread 2 blinks led2.  The three 
+ * threads run independently, and three different messages are bounced back and 
+ * forth between the two motes in an unsynchronized fashion.  In contrast to the simple
+ * Bounce application also found in this directory, once a thread receives a message
+ * it waits on a Barrier before continuing on and turning on its led.  A synchronization 
+ * thread is used to wait until all three messages have been received before unblocking
+ * the barrier.  In this way, messages are still bounced back and forth between the 
+ * two motes in an asynchronous fashion, but all leds come on at the same time 
+ * because of the Barrier and the synchronization thread.  The effect is that all three
+ * leds on one mote flash in unison, followed by all three on the other mote back
+ * and forth forever.  
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module BarrierBounceC {
+  uses {
+    interface Boot;
+    interface BlockingStdControl as BlockingAMControl;
+    interface Barrier;
+
+    interface Thread as BounceThread0;
+    interface BlockingAMSend as BlockingAMSend0;
+    interface BlockingReceive as BlockingReceive0;
+    
+    interface Thread as BounceThread1;
+    interface BlockingAMSend as BlockingAMSend1;
+    interface BlockingReceive as BlockingReceive1;
+    
+    interface Thread as BounceThread2;
+    interface BlockingAMSend as BlockingAMSend2;
+    interface BlockingReceive as BlockingReceive2;
+    
+    interface Thread as SyncThread;
+
+    interface Leds;
+  }
+}
+
+implementation {
+  message_t m0,m1,m2;
+  barrier_t b0;
+  
+  event void Boot.booted() {
+    //Reset all barriers used in this program at initialization
+    call Barrier.reset(&b0, 4);
+
+    //Start the sync thread to power up the AM layer
+    call SyncThread.start(NULL);
+  }
+  
+  event void BounceThread0.run(void* arg) {
+    for(;;) {
+      call Leds.led0Off();
+      call BlockingAMSend0.send(!TOS_NODE_ID, &m0, 0);
+      if(call BlockingReceive0.receive(&m0, 5000) == SUCCESS) {
+        call Barrier.block(&b0);
+        call Leds.led0On();
+      	call BounceThread0.sleep(500);
+      }
+    }
+  }
+  
+  event void BounceThread1.run(void* arg) {
+    for(;;) {
+      call Leds.led1Off();
+      call BlockingAMSend1.send(!TOS_NODE_ID, &m1, 0);
+      if(call BlockingReceive1.receive(&m1, 5000) == SUCCESS) {
+        call Barrier.block(&b0);
+        call Leds.led1On();
+      	call BounceThread1.sleep(500);
+      }
+    }
+  }
+  
+  event void BounceThread2.run(void* arg) { 
+    for(;;) {
+      call Leds.led2Off();
+      call BlockingAMSend2.send(!TOS_NODE_ID, &m2, 0);
+      if(call BlockingReceive2.receive(&m2, 5000) == SUCCESS) {
+        call Barrier.block(&b0);
+        call Leds.led2On();
+      	call BounceThread2.sleep(500);
+      }
+    }
+  }
+  
+  event void SyncThread.run(void* arg) {
+    //Once the am layer is powered on, start the rest of
+    //  the threads
+    call BlockingAMControl.start();
+    call BounceThread0.start(NULL);
+    call BounceThread1.start(NULL);
+    call BounceThread2.start(NULL);
+    
+    for(;;) {
+      call Barrier.block(&b0);
+      call Barrier.reset(&b0, 4);
+    }
+  }
+}
diff --git a/apps/tosthreads/apps/Bounce/Makefile b/apps/tosthreads/apps/Bounce/Makefile
new file mode 100644
index 00000000..7c304e4c
--- /dev/null
+++ b/apps/tosthreads/apps/Bounce/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=BarrierBounceAppC
+PFLAGS += -DCC2420_HW_ACKNOWLEDGEMENTS
+include $(MAKERULES)
diff --git a/apps/tosthreads/apps/Bounce/README b/apps/tosthreads/apps/Bounce/README
new file mode 100644
index 00000000..d8ff0f9f
--- /dev/null
+++ b/apps/tosthreads/apps/Bounce/README
@@ -0,0 +1,42 @@
+README for TOSThreads Bounce 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+This application is derived from a similar application in the TinyThread 
+implementation by William P. McCartney from Cleveland State University (2006)
+
+This application stresses the operation of the thread based AM commands for
+packet transmission and reception.  To run this application you will need to
+burn it on one mote with NODE_ID 0, and a second mote with NODE_ID 1.  
+
+You can install Bounce on a mote via the following command:
+  make <platform> threads install.0
+  make <platform> threads install.1
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+Three different threads run, and each contains an infinite loop that first sends
+a message and then waits to receive a message before returning to the top of the
+loop. After each message reception, one of the onboard LEDs is toggled to
+indicate that it was received. Thread 0 blinks LED0, thread 1 blinks LED1, and
+thread 2 blinks LED2. The three threads run independently, and three different
+messages are bounced back and forth between the two motes in an unsynchronized
+fashion.  In contrast to the simple Bounce application found in the cthreads
+version of this application, once a thread receives a message it waits on a
+Barrier before continuing on and turning on its led.  A synchronization thread
+is used to wait until all three messages have been received by each thread
+before unblocking the barrier.  In this way, messages are still bounced back and
+forth between the two motes in an asynchronous fashion, but all leds come on at
+the same time because of the Barrier and the synchronization thread.  
+
+Successful running of this application results in all three leds coming on in
+unison on one mote and then coming on in unison on the other mote, back and
+forth forever.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/apps/Bounce/barrier_bounce.h b/apps/tosthreads/apps/Bounce/barrier_bounce.h
new file mode 100644
index 00000000..5433e57b
--- /dev/null
+++ b/apps/tosthreads/apps/Bounce/barrier_bounce.h
@@ -0,0 +1,48 @@
+ /*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Header file for declaring AM types for Bounce messages
+ * in the BarrierBounce application
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#ifndef BARRIER_BOUNCE_H
+#define BARRIER_BOUNCE_H
+
+enum {
+  AM_BOUNCE0_MSG		= 0x90,
+  AM_BOUNCE1_MSG		= 0x91,
+  AM_BOUNCE2_MSG		= 0x92,
+};
+
+#endif //BARRIER_BOUNCE_H
diff --git a/apps/tosthreads/apps/Bounce/stack.h b/apps/tosthreads/apps/Bounce/stack.h
new file mode 100644
index 00000000..ec529324
--- /dev/null
+++ b/apps/tosthreads/apps/Bounce/stack.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#ifndef BARRIER_BOUNCE_APP_STACK_H
+#define BARRIER_BOUNCE_APP_STACK_H
+
+enum {
+  BOUNCE_THREAD0_STACK_SIZE		= 600,
+  BOUNCE_THREAD1_STACK_SIZE		= 600,
+  BOUNCE_THREAD2_STACK_SIZE		= 600,
+  SYNC_THREAD_STACK_SIZE		= 600,
+};
+
+#endif //BARRIER_BOUNCE_APP_STACK_H
diff --git a/apps/tosthreads/apps/Makefile b/apps/tosthreads/apps/Makefile
new file mode 100644
index 00000000..25839861
--- /dev/null
+++ b/apps/tosthreads/apps/Makefile
@@ -0,0 +1,57 @@
+#-*-makefile-*-
+######################################################################
+# 
+# Makes the entire suite of TinyOS applications for a given platform.
+#
+# Author: 	Martin Turon
+# Date:		August 18, 2005
+#
+######################################################################
+# $Id: Makefile,v 1.1 2008-06-12 15:11:38 klueska Exp $
+
+# MAKECMDGOALS is the way to get the arguments passed into a Makefile ...
+TARGET=$(MAKECMDGOALS)
+NESDOC_TARGET=$(filter-out nesdoc,$(TARGET))
+
+# Here is a way to get the list of subdirectories in a Makefile ...
+ROOT=.
+SUBDIRS := $(shell find * -type d)
+
+# Okay, match any target, and recurse the subdirectories
+%: 
+	@for i in $(SUBDIRS); do \
+	  HERE=$$PWD; \
+	  if [ -f $$i/Makefile ]; then \
+	      echo Building ... $(PWD)/$$i; \
+	      echo make $(TARGET); \
+	      cd $$i; \
+	      $(MAKE) $(TARGET); \
+	      cd $$HERE; \
+	  fi; \
+	done
+
+threads:
+	@:
+cthreads:
+	@:
+dynthreads:
+	@:
+
+BASEDIR = $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' )
+# The output directory for generated documentation
+DOCDIR = $(BASEDIR)/doc/nesdoc
+
+nesdoc:
+	@echo This target rebuilds documentation for all known platforms.
+	@echo It DOES NOT overwrite any existing documentation, thus, it 
+	@echo is best run after deleting all old documentation.
+	@echo
+	@echo To delete all old documentation, delete the contents of the
+	@echo $(DOCDIR) directory.
+	@echo
+	@echo Press Enter to continue, or ^C to abort.
+	@read
+	for platform in `ncc -print-platforms`; do \
+	  $(MAKE) $$platform docs.nohtml.preserve; \
+	  nesdoc -o $(DOCDIR) -html -target=$$platform; \
+	done
diff --git a/apps/tosthreads/apps/RadioStress/Makefile b/apps/tosthreads/apps/RadioStress/Makefile
new file mode 100644
index 00000000..e074e16c
--- /dev/null
+++ b/apps/tosthreads/apps/RadioStress/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=RadioStressAppC
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/apps/RadioStress/README b/apps/tosthreads/apps/RadioStress/README
new file mode 100644
index 00000000..e0eb9677
--- /dev/null
+++ b/apps/tosthreads/apps/RadioStress/README
@@ -0,0 +1,35 @@
+README for TOSThreads RadioStress 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+This application stresses the operation of the thread based AM commands for
+packet transmission and reception.  To run this application you will need to
+burn it on one mote with NODE_ID 0, and a second mote with NODE_ID 1.  
+
+You can install RadioStress on a mote via the following command:
+  make <platform> threads install.0
+  make <platform> threads install.1
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+The application burned with NODE_ID 0 will be programmed as a receiver and will
+wait for messages from the sender programmed with NODE_ID 1.  In the case of the
+sender, messages with three different AM ids are sent from three different
+threads in an infinite loop, and one of LED0, LED1, and LED2 is toggled upon
+successful transmission.  In the case of the receiver, three different threads
+are used to wait for messages in an infinite loop from the three sending threads
+on the sender mote.  Upon successful reception, one of LED0, LED1, or LED2 is
+toggled depending on the AM id received.
+
+Successful running of this application will result in all three leds flashing
+very rapidly on both motes, with the receiver mote flashing less rapidly if the
+sender mote is turned off (i.e. once every 5000ms because there is a timeout on
+how long it waits for messages to be received before retrying).
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/apps/RadioStress/RadioStressAppC.nc b/apps/tosthreads/apps/RadioStress/RadioStressAppC.nc
new file mode 100644
index 00000000..e0b709df
--- /dev/null
+++ b/apps/tosthreads/apps/RadioStress/RadioStressAppC.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This application stresses the blocking send and receive commands for the TinyOS 
+ * thread implementation.  Three threads are run, each thread toggling a different 
+ * colored LED. If a node has TOS_NODE_ID == 0 it will try and receive in 
+ * an infinite loop, toggling one of the three Leds upon reception.  If it has 
+ * TOS_NODE_ID == 1, it will try to send in an infinite loop, toggling one of the three
+ * Leds upon the completion of a send.  Thread 0 toggles the Led0, Thread 1 toggles 
+ * Led1, and Thread 2 toggles Led2.
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration RadioStressAppC {
+}
+implementation {
+  components MainC, RadioStressC,  LedsC;
+  components BlockingActiveMessageC;
+  MainC.Boot <- RadioStressC;
+  RadioStressC.BlockingAMControl -> BlockingActiveMessageC;
+  RadioStressC.Leds -> LedsC;
+  
+  components new ThreadC(300) as RadioStressThread0;
+  components new BlockingAMSenderC(220) as BlockingAMSender0;
+  components new BlockingAMReceiverC(220) as BlockingAMReceiver0;
+  RadioStressC.RadioStressThread0 -> RadioStressThread0;
+  RadioStressC.BlockingAMSend0 -> BlockingAMSender0;
+  RadioStressC.BlockingReceive0 -> BlockingAMReceiver0;
+  
+  components new ThreadC(300) as RadioStressThread1;
+  components new BlockingAMSenderC(221) as BlockingAMSender1;
+  components new BlockingAMReceiverC(221) as BlockingAMReceiver1;
+  RadioStressC.RadioStressThread1 -> RadioStressThread1;
+  RadioStressC.BlockingAMSend1 -> BlockingAMSender1;
+  RadioStressC.BlockingReceive1 -> BlockingAMReceiver1;
+  
+  components new ThreadC(300) as RadioStressThread2;
+  components new BlockingAMSenderC(222) as BlockingAMSender2;
+  components new BlockingAMReceiverC(222) as BlockingAMReceiver2;
+  RadioStressC.RadioStressThread2 -> RadioStressThread2;
+  RadioStressC.BlockingAMSend2 -> BlockingAMSender2;
+  RadioStressC.BlockingReceive2 -> BlockingAMReceiver2;
+}
+
diff --git a/apps/tosthreads/apps/RadioStress/RadioStressC.nc b/apps/tosthreads/apps/RadioStress/RadioStressC.nc
new file mode 100644
index 00000000..aca6f58c
--- /dev/null
+++ b/apps/tosthreads/apps/RadioStress/RadioStressC.nc
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This application stresses the blocking send and receive commands for the TinyOS 
+ * thread implementation.  Three threads are run, each thread toggling a different 
+ * colored LED. If a node has TOS_NODE_ID == 0 it will try and receive in 
+ * an infinite loop, toggling one of the three Leds upon reception.  If it has 
+ * TOS_NODE_ID == 1, it will try to send in an infinite loop, toggling one of the three
+ * Leds upon the completion of a send.  Thread 0 toggles the Led0, Thread 1 toggles 
+ * Led1, and Thread 2 toggles Led2.
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "AM.h"
+
+module RadioStressC {
+  uses {
+    interface Boot;
+    interface BlockingStdControl as BlockingAMControl;
+
+    interface Thread as RadioStressThread0;
+    interface BlockingAMSend as BlockingAMSend0;
+    interface BlockingReceive as BlockingReceive0;
+    
+    interface Thread as RadioStressThread1;
+    interface BlockingAMSend as BlockingAMSend1;
+    interface BlockingReceive as BlockingReceive1;
+    
+    interface Thread as RadioStressThread2;
+    interface BlockingAMSend as BlockingAMSend2;
+    interface BlockingReceive as BlockingReceive2;
+
+    interface Leds;
+  }
+}
+
+implementation {
+  message_t m0;
+  message_t m1;
+  message_t m2;
+  
+  event void Boot.booted() {
+    call RadioStressThread0.start(NULL);
+    call RadioStressThread1.start(NULL);
+    call RadioStressThread2.start(NULL);
+  }
+
+  event void RadioStressThread0.run(void* arg) {
+    call BlockingAMControl.start();
+    for(;;) {
+      if(TOS_NODE_ID == 0) {
+        call BlockingReceive0.receive(&m0, 5000);
+        call Leds.led0Toggle();
+      }
+      else {
+        call BlockingAMSend0.send(!TOS_NODE_ID, &m0, 0);
+        call Leds.led0Toggle();
+        //call RadioStressThread0.sleep(500);
+      }
+    }
+  }
+  
+  event void RadioStressThread1.run(void* arg) {
+    call BlockingAMControl.start();
+    for(;;) {
+      if(TOS_NODE_ID == 0) {
+        call BlockingReceive1.receive(&m1, 5000);
+        call Leds.led1Toggle();
+      }
+      else {
+        call BlockingAMSend1.send(!TOS_NODE_ID, &m1, 0);
+        call Leds.led1Toggle();
+        //call RadioStressThread1.sleep(500);
+      }
+    }
+  }
+  
+  event void RadioStressThread2.run(void* arg) {
+    call BlockingAMControl.start();
+    for(;;) {
+      if(TOS_NODE_ID == 0) {
+        call BlockingReceive2.receive(&m2, 5000);
+        call Leds.led2Toggle();
+      }
+      else {
+        call BlockingAMSend2.send(!TOS_NODE_ID, &m2, 0);
+        call Leds.led2Toggle();
+        //call RadioStressThread2.sleep(500);
+      }
+    }
+  }
+}
diff --git a/apps/tosthreads/apps/TestBasicsbSensors/Makefile b/apps/tosthreads/apps/TestBasicsbSensors/Makefile
new file mode 100644
index 00000000..ba7d7d3d
--- /dev/null
+++ b/apps/tosthreads/apps/TestBasicsbSensors/Makefile
@@ -0,0 +1,13 @@
+COMPONENT=TestBasicsbSensorsAppC
+CFLAGS += -I$(TOSDIR)/sensorboards/basicsb
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/basicsb
+
+ifneq ($(filter mica2 mica2dot micaz iris clean,$(MAKECMDGOALS)),)
+  include $(MAKERULES)
+else
+%:
+	@echo "    Sorry, this application is only written to work with mica based motes and the basicsb sensorboards.."
+threads:
+	@:
+endif
+
diff --git a/apps/tosthreads/apps/TestBasicsbSensors/README b/apps/tosthreads/apps/TestBasicsbSensors/README
new file mode 100644
index 00000000..964a2f3e
--- /dev/null
+++ b/apps/tosthreads/apps/TestBasicsbSensors/README
@@ -0,0 +1,32 @@
+README for TOSThreads TestBasicsbSensors
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+This application is used to test the threaded version of the API for accessing
+sensors on the basicsb sensor board.
+
+You can install TestBasicsbSensors on a mote via the following command:
+  make <platform> threads install
+
+Valid platforms are currently: mica2, micaz and iris
+
+This application simply takes sensor readings in an infinite loop from the
+Photo and Temperature sensors on the basicsb sensor board and forwards them
+over the serial interface.  Upon successful transmission, LED0 is toggled.
+
+A successful test will result in the TestBasicsbSensors mote constantly
+flickering LED0. Additionally, messages containing the sensor readings should
+be forwarded over the serial interface as verified by running the following
+for the platform of interest:
+  java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX:<baud_rate>
+
+Once this java application is running, you should see output containing the
+sensor readings being streamed to your terminal.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/apps/TestBasicsbSensors/TestBasicsbSensorsAppC.nc b/apps/tosthreads/apps/TestBasicsbSensors/TestBasicsbSensorsAppC.nc
new file mode 100644
index 00000000..0bc9f115
--- /dev/null
+++ b/apps/tosthreads/apps/TestBasicsbSensors/TestBasicsbSensorsAppC.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This application is used to test the threaded version of the API for accessing
+ * sensors on the basicsb sensor board.
+ * 
+ * This application simply takes sensor readings in an infinite loop from the
+ * Photo and Temperature sensors on the basicsb sensor board and forwards them
+ * over the serial interface.  Upon successful transmission, LED0 is toggled.
+ * 
+ * A successful test will result in the TestBasicsbSensors mote constantly
+ * flickering LED0. Additionally, messages containing the sensor readings should
+ * be forwarded over the serial interface as verified by running the following
+ * for the platform of interest:
+ *   java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX:<baud_rate>
+ * 
+ * Once this java application is running, you should see output containing the
+ * sensor readings being streamed to your terminal.
+ *
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+configuration TestBasicsbSensorsAppC {
+}
+implementation {
+  components MainC, TestBasicsbSensorsC;
+  components new ThreadC(125) as MainThread;
+  
+  components new BlockingPhotoC();
+  components new BlockingTempC();
+  components BlockingSerialActiveMessageC;
+  components new BlockingSerialAMSenderC(128);
+
+  MainC.Boot <- TestBasicsbSensorsC;
+  TestBasicsbSensorsC.MainThread -> MainThread;
+  TestBasicsbSensorsC.Photo -> BlockingPhotoC;
+  TestBasicsbSensorsC.Temp -> BlockingTempC;
+  TestBasicsbSensorsC.AMControl -> BlockingSerialActiveMessageC;
+  TestBasicsbSensorsC.BlockingAMSend -> BlockingSerialAMSenderC;
+  TestBasicsbSensorsC.Packet -> BlockingSerialAMSenderC;
+  
+  components LedsC;
+  TestBasicsbSensorsC.Leds -> LedsC;
+}
+
diff --git a/apps/tosthreads/apps/TestBasicsbSensors/TestBasicsbSensorsC.nc b/apps/tosthreads/apps/TestBasicsbSensors/TestBasicsbSensorsC.nc
new file mode 100644
index 00000000..d9e63373
--- /dev/null
+++ b/apps/tosthreads/apps/TestBasicsbSensors/TestBasicsbSensorsC.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+module TestBasicsbSensorsC {
+  uses {
+    interface Boot;
+    interface Thread as MainThread;
+    interface BlockingRead<uint16_t> as Photo;
+    interface BlockingRead<uint16_t> as Temp;
+    interface BlockingStdControl as AMControl;
+    interface BlockingAMSend;
+    interface Packet;
+    interface Leds;
+  }
+}
+
+implementation {
+  typedef struct sensor_readings {
+    uint16_t photo;
+    uint16_t temp;
+  } sensor_readings_t;
+
+  event void Boot.booted() {
+    call MainThread.start(NULL);
+  }
+
+  event void MainThread.run(void* arg) {
+    sensor_readings_t* readings;
+    message_t msg;
+    readings = call Packet.getPayload(&msg, sizeof(sensor_readings_t));
+
+    while( call AMControl.start() != SUCCESS );    
+    for(;;){
+      while( call Photo.read(&(readings->photo)) != SUCCESS );
+      while( call Temp.read(&(readings->temp)) != SUCCESS );
+      while( call BlockingAMSend.send(AM_BROADCAST_ADDR, &msg, sizeof(sensor_readings_t)) != SUCCESS );
+      call Leds.led0Toggle();
+      call MainThread.sleep(512);
+    }
+  }
+}
+
diff --git a/apps/tosthreads/apps/TestBlockStorage/Makefile b/apps/tosthreads/apps/TestBlockStorage/Makefile
new file mode 100644
index 00000000..00601d23
--- /dev/null
+++ b/apps/tosthreads/apps/TestBlockStorage/Makefile
@@ -0,0 +1,20 @@
+COMPONENT=TestBlockStorageAppC
+THIS_SUPPORTED_PLATFORMS=tmote telos telosb eyesIFXv1 eyesIFXv2 mica2 mica2dot telosa eyesIFX micaz iris tinynode mulle
+
+ifneq ($(filter $(THIS_SUPPORTED_PLATFORMS) clean,$(MAKECMDGOALS)),)
+	ifneq ($(filter tmote telos telosb eyesIFXv1,$(MAKECMDGOALS)),)
+		CFLAGS+=-DUSE_STM25P
+	endif
+	ifneq ($(filter mica2 telosa mica2dot eyesIFX eyesIFXv2 micaz iris tinynode mulle,$(MAKECMDGOALS)),)
+		CFLAGS+=-DUSE_AT45DB
+	endif
+
+	include $(MAKERULES)
+else
+%:
+	@echo "    Sorry, this application is only written to work with the following platforms:"
+	@echo "        $(THIS_SUPPORTED_PLATFORMS)"
+threads:
+	@:
+endif
+
diff --git a/apps/tosthreads/apps/TestBlockStorage/README b/apps/tosthreads/apps/TestBlockStorage/README
new file mode 100644
index 00000000..70d4c38f
--- /dev/null
+++ b/apps/tosthreads/apps/TestBlockStorage/README
@@ -0,0 +1,28 @@
+README for TOSThreads TestBlockStorage
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+This application is used to test the threaded version of the API for performing
+block storage.
+
+You can install TestBlockStorage on a mote via the following command:
+  make <platform> threads install
+
+Valid platforms are currently: tmote, telosb, mica2, micaz, iris and mulle
+
+This application first checks the size of the block storage volume, and
+erases it. Then, it randomly writes records, followed by a verification
+with read.
+
+Successful running of this application results in LED0 being ON
+throughout the duration of the erase, write, and read sequence. Finally,
+if all tests pass, LED1 is turned ON. Otherwise, all three LEDs are
+turned ON to indicate problems.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/apps/TestBlockStorage/TestBlockStorageAppC.nc b/apps/tosthreads/apps/TestBlockStorage/TestBlockStorageAppC.nc
new file mode 100644
index 00000000..afee2266
--- /dev/null
+++ b/apps/tosthreads/apps/TestBlockStorage/TestBlockStorageAppC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * This application is used to test the threaded version of the API for performing
+ * block storage.
+ * 
+ * This application first checks the size of the block storage volume, and
+ * erases it. Then, it randomly writes records, followed by a verification
+ * with read.
+ * 
+ * Successful running of this application results in LED0 being ON
+ * throughout the duration of the erase, write, and read sequence. Finally,
+ * if all tests pass, LED1 is turned ON. Otherwise, all three LEDs are
+ * turned ON to indicate problems.
+ *
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "StorageVolumes.h"
+
+configuration TestBlockStorageAppC {}
+
+implementation
+{
+  components MainC,
+             TestBlockStorageP,
+             LedsC,
+             new ThreadC(500) as TinyThread1,
+             new BlockingBlockStorageC(VOLUME_TESTBLOCKSTORAGE1) as BlockingBlockStorage1,
+             RandomC;
+             
+  TestBlockStorageP.Boot -> MainC;
+  TestBlockStorageP.Leds -> LedsC;
+  TestBlockStorageP.BlockingBlock1 -> BlockingBlockStorage1;
+  TestBlockStorageP.TinyThread1 -> TinyThread1;
+  TestBlockStorageP.Random -> RandomC;
+}
diff --git a/apps/tosthreads/apps/TestBlockStorage/TestBlockStorageP.nc b/apps/tosthreads/apps/TestBlockStorage/TestBlockStorageP.nc
new file mode 100644
index 00000000..2cfb28aa
--- /dev/null
+++ b/apps/tosthreads/apps/TestBlockStorage/TestBlockStorageP.nc
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * This application is used to test the threaded version of the API for performing
+ * block storage.
+ * 
+ * This application first checks the size of the block storage volume, and
+ * erases it. Then, it randomly writes records, followed by a verification
+ * with read.
+ * 
+ * Successful running of this application results in LED0 being ON
+ * throughout the duration of the erase, write, and read sequence. Finally,
+ * if all tests pass, LED1 is turned ON. Otherwise, all three LEDs are
+ * turned ON to indicate problems.
+ *
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "Storage.h"
+
+module TestBlockStorageP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface Thread as TinyThread1;
+    interface BlockingBlock as BlockingBlock1;
+    interface Random;
+  }
+}
+
+implementation
+{
+  event void Boot.booted() {
+    call TinyThread1.start(NULL);
+  }
+  
+  event void TinyThread1.run(void* arg)
+  {
+    int i;
+    error_t error;
+#if defined USE_AT45DB
+    storage_len_t expectedVolumeSize = 262144;
+#elif defined USE_STM25P
+    storage_len_t expectedVolumeSize = 1048576;
+#endif
+
+    call Leds.set(1);
+
+    if (call BlockingBlock1.getSize() != expectedVolumeSize) {
+      call Leds.set(7);
+      return;
+    }
+    
+    error = call BlockingBlock1.erase();
+    if (error != SUCCESS) {
+      call Leds.set(7);
+      return;
+    }
+    
+    for (i = 0; i < 50; i++) {
+      storage_addr_t writeAddr = call Random.rand32() % (call BlockingBlock1.getSize() - sizeof(storage_addr_t));
+      storage_len_t len = sizeof(storage_addr_t);
+      storage_addr_t readBuf;
+    
+      error = call BlockingBlock1.write(writeAddr, &writeAddr, &len);
+      if (error == SUCCESS) {
+        len = sizeof(storage_addr_t);
+        call BlockingBlock1.read(writeAddr, &readBuf, &len);
+        if (readBuf != writeAddr) {
+          call Leds.set(7);
+          return;
+        }
+      } else {
+        call Leds.set(7);
+        return;
+      }
+    }
+    
+    call Leds.set(2);
+  }
+}
diff --git a/apps/tosthreads/apps/TestBlockStorage/volumes-at45db.xml b/apps/tosthreads/apps/TestBlockStorage/volumes-at45db.xml
new file mode 100644
index 00000000..83809ff9
--- /dev/null
+++ b/apps/tosthreads/apps/TestBlockStorage/volumes-at45db.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="TESTBLOCKSTORAGE1" size="262144" type="block"/>
+</volume_table>
diff --git a/apps/tosthreads/apps/TestBlockStorage/volumes-stm25p.xml b/apps/tosthreads/apps/TestBlockStorage/volumes-stm25p.xml
new file mode 100644
index 00000000..6fed4204
--- /dev/null
+++ b/apps/tosthreads/apps/TestBlockStorage/volumes-stm25p.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="TESTBLOCKSTORAGE1" size="1048576" type="block"/>
+</volume_table>
diff --git a/apps/tosthreads/apps/TestCollection/Makefile b/apps/tosthreads/apps/TestCollection/Makefile
new file mode 100644
index 00000000..05eb49ae
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/Makefile
@@ -0,0 +1,11 @@
+COMPONENT=TestCollectionAppC
+
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/universal
+
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/lib/net/
+CFLAGS += -I$(TOSDIR)/lib/net/
+
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/lib/net/ctp
+CFLAGS += -I$(TOSDIR)/lib/net/ctp  -I$(TOSDIR)/lib/net/4bitle
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/apps/TestCollection/MultihopOscilloscope.h b/apps/tosthreads/apps/TestCollection/MultihopOscilloscope.h
new file mode 100644
index 00000000..5f040539
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/MultihopOscilloscope.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+#ifndef MULTIHOP_OSCILLOSCOPE_H
+#define MULTIHOP_OSCILLOSCOPE_H
+
+enum {
+  /* Number of readings per message. If you increase this, you may have to
+     increase the message_t size. */
+  NREADINGS = 5,
+  /* Default sampling period. */
+  DEFAULT_INTERVAL = 1024,
+  AM_OSCILLOSCOPE = 0x93
+};
+
+typedef nx_struct oscilloscope {
+  nx_uint16_t version; /* Version of the interval. */
+  nx_uint16_t interval; /* Samping period. */
+  nx_uint16_t id; /* Mote id of sending mote. */
+  nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */
+  nx_uint16_t readings[NREADINGS];
+} oscilloscope_t;
+
+#endif
diff --git a/apps/tosthreads/apps/TestCollection/README b/apps/tosthreads/apps/TestCollection/README
new file mode 100644
index 00000000..509e4d6c
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/README
@@ -0,0 +1,65 @@
+README for TOSThreads TestCollection
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+TestCollection is a reimplementation of the Multihop Oscilloscope application
+using TOSThreads. It periodically samples a universal software-based SineSensor
+and broadcasts a message every few readings. These readings can be displayed by
+the Java "Oscilloscope" application found in the the TestCollection/java
+subdirectory. The sampling rate starts at 4Hz, but can be changed from the Java
+application.
+
+You can install TestCollection on a mote via the following command:
+  make <platform> threads install
+
+Valid platforms are currently: tmote, telosb, mica2, micaz, iris, and epic
+
+At least two motes must be used by this application, with one of them installed
+as a base station.  Base station motes can be created by installing them with
+NODE_ID % 500 == 0.
+  i.e. make <platform> threads install.0
+       make <platform> threads install.500
+       make <platform> threads install.1000
+
+All other nodes can be installed with arbitrary NODE_IDs.
+  make <platform> threads install.123
+
+Successful running of this application is verified by all NON-base station motes
+periodically flashing LED1 upon sending a message, and the base station mote,
+flashing LED2 upon successful reception of a message.  Additionally, correct
+operation should be verified by running the java tool described in the following
+section.
+
+Tools:
+
+The Java application displays readings it receives from motes running the
+MultihopOscilloscope demo via a serial forwarder. To run it, change to the
+TestCollection/java subdirectory and type:
+
+  make
+  java net.tinyos.sf.SerialForwarder -comm serial@<serial port>:<baud_rate>
+  # e.g., java net.tinyos.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2
+  # or java net.tinyos.sf.SerialForwarder -comm serial@COM2:telosb
+  ./run
+
+NOTE::  The baud rate 57600 must be used telos based motes, as its configuration
+has been changed to work with this baud rate when compiled for TOSThreads. I.e.
+DO NOT just substitute 'telosb' or 'tmote' for <baud_rate> above.  Explicitly
+set it to 57600.
+
+The controls at the bottom of the screen allow you to zoom in or out the X
+axis, change the range of the Y axis, and clear all received data. You can
+change the color used to display a mote by clicking on its color in the
+mote table.
+
+Notes:
+
+By default, the Makefile for TestCollection is setup to run CTP as the
+underlying collection protocol.  The makefile can be modified to work with
+MultihopLQI by changing the appropriate include directories.
+
+Known bugs/limitations:
+  None.
+
diff --git a/apps/tosthreads/apps/TestCollection/TestCollectionAppC.nc b/apps/tosthreads/apps/TestCollection/TestCollectionAppC.nc
new file mode 100644
index 00000000..4b2f49ae
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/TestCollectionAppC.nc
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * TestCollection is a reimplementation of the Multihop Oscilloscope application
+ * using TOSThreads. It periodically samples a universal software-based SineSensor
+ * and broadcasts a message every few readings. These readings can be displayed by
+ * the Java "Oscilloscope" application found in the the TestCollection/java
+ * subdirectory. The sampling rate starts at 4Hz, but can be changed from the Java
+ * application.
+ * 
+ * At least two motes must be used by this application, with one of them installed
+ * as a base station.  Base station motes can be created by installing them with
+ * NODE_ID % 500 == 0.
+ *   i.e. make <platform> threads install.0
+ *        make <platform> threads install.500
+ *        make <platform> threads install.1000
+ * 
+ * All other nodes can be installed with arbitrary NODE_IDs.
+ *   make <platform> threads install.123
+ * 
+ * Successful running of this application is verified by all NON-base station motes
+ * periodically flashing LED1 upon sending a message, and the base station mote,
+ * flashing LED2 upon successful reception of a message.  Additionally, correct
+ * operation should be verified by running the java tool described in the following
+ * section.
+ *
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "MultihopOscilloscope.h"
+
+configuration TestCollectionAppC {}
+
+implementation {
+  components TestCollectionC,
+             new BlockingSineSensorC(),
+             LedsC,
+             BlockingActiveMessageC,
+             BlockingCollectionControlC,
+             new BlockingCollectionSenderC(AM_OSCILLOSCOPE),
+             new BlockingCollectionReceiverC(AM_OSCILLOSCOPE),
+             new ThreadC(800) as MainThread,
+             MainC,
+             BlockingSerialActiveMessageC,
+             new BlockingSerialAMSenderC(AM_OSCILLOSCOPE);
+             
+  
+  TestCollectionC.MainThread -> MainThread;
+  TestCollectionC.Boot -> MainC;
+  TestCollectionC.BlockingRead -> BlockingSineSensorC;
+  TestCollectionC.Leds -> LedsC;
+  TestCollectionC.BlockingRead -> BlockingSineSensorC;
+  
+  TestCollectionC.RadioStdControl -> BlockingActiveMessageC;
+  
+  TestCollectionC.RoutingControl -> BlockingCollectionControlC;
+  TestCollectionC.RootControl -> BlockingCollectionControlC;
+  TestCollectionC.Packet -> BlockingCollectionSenderC;
+  TestCollectionC.BlockingSend -> BlockingCollectionSenderC;
+  TestCollectionC.BlockingReceive -> BlockingCollectionReceiverC;
+  
+  TestCollectionC.SerialStdControl -> BlockingSerialActiveMessageC;
+  TestCollectionC.SerialBlockingSend -> BlockingSerialAMSenderC;
+}
diff --git a/apps/tosthreads/apps/TestCollection/TestCollectionC.nc b/apps/tosthreads/apps/TestCollection/TestCollectionC.nc
new file mode 100644
index 00000000..68f2a336
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/TestCollectionC.nc
@@ -0,0 +1,156 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * TestCollection is a reimplementation of the Multihop Oscilloscope application
+ * using TOSThreads. It periodically samples a universal software-based SineSensor
+ * and broadcasts a message every few readings. These readings can be displayed by
+ * the Java "Oscilloscope" application found in the the TestCollection/java
+ * subdirectory. The sampling rate starts at 4Hz, but can be changed from the Java
+ * application.
+ * 
+ * At least two motes must be used by this application, with one of them installed
+ * as a base station.  Base station motes can be created by installing them with
+ * NODE_ID % 500 == 0.
+ *   i.e. make <platform> threads install.0
+ *        make <platform> threads install.500
+ *        make <platform> threads install.1000
+ * 
+ * All other nodes can be installed with arbitrary NODE_IDs.
+ *   make <platform> threads install.123
+ * 
+ * Successful running of this application is verified by all NON-base station motes
+ * periodically flashing LED1 upon sending a message, and the base station mote,
+ * flashing LED2 upon successful reception of a message.  Additionally, correct
+ * operation should be verified by running the java tool described in the following
+ * section.
+ *
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "MultihopOscilloscope.h"
+
+module TestCollectionC {
+  uses {
+    interface Boot;
+    interface Thread as MainThread;
+    interface BlockingRead<uint16_t>;
+    interface BlockingStdControl as RadioStdControl;
+    interface Packet;
+    interface BlockingSend;
+    interface BlockingReceive;
+    interface BlockingStdControl as RoutingControl;
+    interface RootControl;
+    interface Leds;
+    interface BlockingStdControl as SerialStdControl;
+    interface BlockingAMSend as SerialBlockingSend;
+  }
+}
+
+implementation {
+  static void fatal_problem();
+  
+  oscilloscope_t local;
+  uint8_t reading = 0;   /* 0 to NREADINGS */
+  message_t sendbuf;
+  message_t recvbuf;
+  
+  void fatal_problem();
+  void report_problem();
+  void report_sent();
+  void report_received();
+  
+  event void Boot.booted() {
+    local.interval = DEFAULT_INTERVAL;
+    local.id = TOS_NODE_ID;
+    local.version = 0;
+    
+    call MainThread.start(NULL);
+  }
+  
+  event void MainThread.run(void* arg) {
+    while (call RadioStdControl.start() != SUCCESS);
+    while (call RoutingControl.start() != SUCCESS);
+    
+    if (local.id % 500 == 0) {
+      while (call SerialStdControl.start() != SUCCESS);
+      call RootControl.setRoot();
+      for (;;) {
+        if (call BlockingReceive.receive(&recvbuf, 0) == SUCCESS) {
+          oscilloscope_t *recv_o = (oscilloscope_t *) call BlockingReceive.getPayload(&recvbuf, sizeof(oscilloscope_t));
+          oscilloscope_t *send_o = (oscilloscope_t *) call SerialBlockingSend.getPayload(&sendbuf, sizeof(oscilloscope_t));
+          memcpy(send_o, recv_o, sizeof(oscilloscope_t));
+          call SerialBlockingSend.send(AM_BROADCAST_ADDR, &sendbuf, sizeof(oscilloscope_t));
+          report_received();
+        }
+      }
+    } else {
+      uint16_t var;
+      
+      for (;;) {
+        if (reading == NREADINGS) {
+          oscilloscope_t *o = (oscilloscope_t *) call BlockingSend.getPayload(&sendbuf, sizeof(oscilloscope_t));
+          if (o == NULL) {
+            fatal_problem();
+            return;
+          }
+          memcpy(o, &local, sizeof(oscilloscope_t));
+          if (call BlockingSend.send(&sendbuf, sizeof(oscilloscope_t)) == SUCCESS) {
+	    local.count++;
+            report_sent();
+          } else {
+            report_problem();
+          }
+        
+          reading = 0;
+        }
+          
+        if (call BlockingRead.read(&var) == SUCCESS) {
+          local.readings[reading++] = var;
+        }
+        
+        call MainThread.sleep(local.interval);
+      }
+    }
+  }
+  
+  // Use LEDs to report various status issues.
+  void fatal_problem() { 
+    call Leds.led0On(); 
+    call Leds.led1On();
+    call Leds.led2On();
+  }
+
+  void report_problem() { call Leds.led0Toggle(); }
+  void report_sent() { call Leds.led1Toggle(); }
+  void report_received() { call Leds.led2Toggle(); }
+}
diff --git a/apps/tosthreads/apps/TestCollection/java/ColorCellEditor.java b/apps/tosthreads/apps/TestCollection/java/ColorCellEditor.java
new file mode 100644
index 00000000..f88b0b6f
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/java/ColorCellEditor.java
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import javax.swing.table.*;
+import java.awt.*;
+import java.awt.event.*;
+
+/* Editor for table cells representing colors. Popup a color chooser. */
+public class ColorCellEditor extends AbstractCellEditor
+    implements TableCellEditor {
+    private Color color;
+    private JButton button;
+
+    public ColorCellEditor(String title) {
+	button = new JButton();
+	final JColorChooser chooser = new JColorChooser();
+	final JDialog dialog = JColorChooser.createDialog
+	    (button, title, true, chooser,
+	     new ActionListener() {
+		 public void actionPerformed(ActionEvent e) {
+		     color = chooser.getColor();
+		 } },
+	     null);
+
+	button.setBorderPainted(false);
+	button.addActionListener
+	    (new ActionListener () {
+		    public void actionPerformed(ActionEvent e) {
+			button.setBackground(color);
+			chooser.setColor(color);
+			dialog.setVisible(true);
+			fireEditingStopped();
+		    } } );
+	
+    }
+
+    public Object getCellEditorValue() { return color; }
+    public Component getTableCellEditorComponent(JTable table,
+                                                 Object value,
+                                                 boolean isSelected,
+                                                 int row,
+                                                 int column) {
+        color = (Color)value;
+        return button;
+    }
+}
+
diff --git a/apps/tosthreads/apps/TestCollection/java/Data.java b/apps/tosthreads/apps/TestCollection/java/Data.java
new file mode 100644
index 00000000..ac35aa72
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/java/Data.java
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import java.util.*;
+
+/* Hold all data received from motes */
+class Data {
+    /* The mote data is stored in a flat array indexed by a mote's identifier.
+       A null value indicates no mote with that identifier. */
+    private Node[] nodes = new Node[256];
+    private Oscilloscope parent;
+
+    Data(Oscilloscope parent) {
+	this.parent = parent;
+    }
+
+    /* Data received from mote nodeId containing NREADINGS samples from
+       messageId * NREADINGS onwards. Tell parent if this is a new node. */
+    void update(int nodeId, int messageId, int readings[]) {
+	if (nodeId >= nodes.length) {
+	    int newLength = nodes.length * 2;
+	    if (nodeId >= newLength)
+		newLength = nodeId + 1;
+
+	    Node newNodes[] = new Node[newLength];
+	    System.arraycopy(nodes, 0, newNodes, 0, nodes.length);
+	    nodes = newNodes;
+	}
+	Node node = nodes[nodeId];
+	if (node == null) {
+	    nodes[nodeId] = node = new Node(nodeId);
+	    parent.newNode(nodeId);
+	}
+	node.update(messageId, readings);
+    }
+
+    /* Return value of sample x for mote nodeId, or -1 for missing data */
+    int getData(int nodeId, int x) {
+	if (nodeId >= nodes.length || nodes[nodeId] == null)
+	    return -1;
+	return nodes[nodeId].getData(x);
+    }
+
+    /* Return number of last known sample on mote nodeId. Returns 0 for
+       unknown motes. */
+    int maxX(int nodeId) {
+	if (nodeId >= nodes.length || nodes[nodeId] == null)
+	    return 0;
+	return nodes[nodeId].maxX();
+    }
+
+    /* Return number of largest known sample on all motes (0 if there are no
+       motes) */
+    int maxX() {
+	int max = 0;
+
+	for (int i = 0; i < nodes.length; i++)
+	    if (nodes[i] != null) {
+		int nmax = nodes[i].maxX();
+
+		if (nmax > max)
+		    max = nmax;
+	    }
+
+	return max;
+    }
+}
diff --git a/apps/tosthreads/apps/TestCollection/java/Graph.java b/apps/tosthreads/apps/TestCollection/java/Graph.java
new file mode 100644
index 00000000..9a42c1c8
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/java/Graph.java
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.awt.font.*;
+import java.awt.geom.*;
+import java.util.*;
+
+/* Panel for drawing mote-data graphs */
+class Graph extends JPanel
+{
+    final static int BORDER_LEFT = 40;
+    final static int BORDER_RIGHT = 0;
+    final static int BORDER_TOP = 10;
+    final static int BORDER_BOTTOM = 10;
+
+    final static int TICK_SPACING = 40;
+    final static int MAX_TICKS = 16;
+    final static int TICK_WIDTH = 10;
+
+    final static int MIN_WIDTH = 50;
+
+    int gx0, gx1, gy0, gy1; // graph bounds
+    int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale
+    Window parent;
+
+    /* Graph to screen coordinate conversion support */
+    int height, width;
+    double xscale, yscale;
+
+    void updateConversion() {
+	height = getHeight() - BORDER_TOP - BORDER_BOTTOM;
+	width = getWidth() - BORDER_LEFT - BORDER_RIGHT;
+	if (height < 1) 
+	    height = 1;
+	if (width < 1)
+	    width = 1;
+	xscale = (double)width / (gx1 - gx0 + 1);
+	yscale = (double)height / (gy1 - gy0 + 1);
+    }
+
+    Graphics makeClip(Graphics g) {
+	return g.create(BORDER_LEFT, BORDER_TOP, width, height);
+    }
+
+    // Note that these do not include the border offset!
+    int screenX(int gx) {
+	return (int)(xscale * (gx - gx0) + 0.5);
+    }
+
+    int screenY(int gy) {
+	return (int)(height - yscale * (gy - gy0));
+    }
+
+    int graphX(int sx) {
+	return (int)(sx / xscale + gx0 + 0.5);
+    }
+
+    Graph(Window parent) {
+	this.parent = parent;
+	gy0 = 0; gy1 = 0xffff;
+	gx0 = 0; gx1 = MIN_WIDTH << scale;
+    }
+
+    void rightDrawString(Graphics2D g, String s, int x, int y) {
+	TextLayout layout =
+	    new TextLayout(s, parent.smallFont, g.getFontRenderContext());
+	Rectangle2D bounds = layout.getBounds();
+	layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2);
+    }
+
+    protected void paintComponent(Graphics g) {
+	Graphics2D g2d = (Graphics2D)g;
+
+	/* Repaint. Synchronize on Oscilloscope to avoid data changing.
+	   Simply clear panel, draw Y axis and all the mote graphs. */
+	synchronized (parent.parent) {
+	    updateConversion();
+	    g2d.setColor(Color.BLACK);
+	    g2d.fillRect(0, 0, getWidth(), getHeight());
+	    drawYAxis(g2d);
+
+	    Graphics clipped = makeClip(g2d);
+	    int count = parent.moteListModel.size();
+	    for (int i = 0; i < count; i++) {
+		clipped.setColor(parent.moteListModel.getColor(i));
+		drawGraph(clipped, parent.moteListModel.get(i));
+	    }
+	}
+    }
+
+    /* Draw the Y-axis */
+    protected void drawYAxis(Graphics2D g) {
+	int axis_x = BORDER_LEFT - 1;
+	int height = getHeight() - BORDER_BOTTOM - BORDER_TOP;
+
+	g.setColor(Color.WHITE);
+	g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1);
+
+	/* Draw a reasonable set of tick marks */
+	int nTicks = height / TICK_SPACING;
+	if (nTicks > MAX_TICKS)
+	    nTicks = MAX_TICKS;
+
+	int tickInterval = (gy1 - gy0 + 1) / nTicks;
+	if (tickInterval == 0)
+	    tickInterval = 1;
+
+	/* Tick interval should be of the family A * 10^B,
+	   where A = 1, 2 * or 5. We tend more to rounding A up, to reduce
+	   rather than increase the number of ticks. */
+	int B = (int)(Math.log(tickInterval) / Math.log(10));
+	int A = (int)(tickInterval / Math.pow(10, B) + 0.5);
+	if (A > 2) A = 5;
+	else if (A > 5) A = 10;
+
+	tickInterval = A * (int)Math.pow(10, B);
+
+	/* Ticks are printed at multiples of tickInterval */
+	int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval;
+	while (tick <= gy1) {
+	    int stick = screenY(tick) + BORDER_TOP;
+	    rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick);
+	    g.drawLine(axis_x - TICK_WIDTH / 2, stick,
+		       axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick);
+	    tick += tickInterval;
+	}
+	
+    }
+
+    /* Draw graph for mote nodeId */
+    protected void drawGraph(Graphics g, int nodeId) {
+	SingleGraph sg = new SingleGraph(g, nodeId);
+
+	if (gx1 - gx0 >= width) // More points than pixels-iterate by pixel
+	    for (int sx = 0; sx < width; sx++)
+		sg.nextPoint(g, graphX(sx), sx);
+	else // Less points than pixel-iterate by points
+	    for (int gx = gx0; gx <= gx1; gx++)
+		sg.nextPoint(g, gx, screenX(gx));
+    }
+
+    /* Inner class to simplify drawing a graph. Simplify initialise it, then
+       feed it the X screen and graph coordinates, from left to right. */
+    private class SingleGraph {
+	int lastsx, lastsy, nodeId;
+
+	/* Start drawing the graph mote id */
+	SingleGraph(Graphics g, int id) {
+	    nodeId = id;
+	    lastsx = -1;
+	    lastsy = -1;
+	}
+
+	/* Next point in mote's graph is at x value gx, screen coordinate sx */
+	void nextPoint(Graphics g, int gx, int sx) {
+	    int gy = parent.parent.data.getData(nodeId, gx);
+	    int sy = -1;
+
+	    if (gy >= 0) { // Ignore missing values
+		double rsy = height - yscale * (gy - gy0);
+
+		// Ignore problem values
+		if (rsy >= -1e6 && rsy <= 1e6)
+		    sy = (int)(rsy + 0.5);
+
+		if (lastsy >= 0 && sy >= 0)
+		    g.drawLine(lastsx, lastsy, sx, sy);
+	    }
+	    lastsx = sx;
+	    lastsy = sy;
+	}
+    }
+
+    /* Update X-axis range in GUI */
+    void updateXLabel() {
+	parent.xLabel.setText("X: " + gx0 + " - " + gx1);
+    }
+
+    /* Ensure that graph is nicely positioned on screen. max is the largest 
+       sample number received from any mote. */
+    private void recenter(int max) {
+	// New data will show up at the 3/4 point
+	// The 2nd term ensures that gx1 will be >= max
+	int scrollby = ((gx1 - gx0) >> 2) + (max - gx1);
+	gx0 += scrollby;
+	gx1 += scrollby;
+	if (gx0 < 0) { // don't bother showing negative sample numbers
+	    gx1 -= gx0;
+	    gx0 = 0;
+	}
+	updateXLabel();
+    }
+
+    /* New data received. Redraw graph, scrolling if necessary */
+    void newData() {
+	int max = parent.parent.data.maxX();
+
+	if (max > gx1 || max < gx0) // time to scroll
+	    recenter(max);
+	repaint();
+    }
+
+    /* User set the X-axis scale to newScale */
+    void setScale(int newScale) {
+	gx1 = gx0 + (MIN_WIDTH << newScale);
+	scale = newScale;
+	recenter(parent.parent.data.maxX());
+	repaint();
+    }
+
+    /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus
+       values (return false), or accept, redraw and return true. */
+    boolean setYAxis(int newy0, int newy1) {
+	if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 ||
+	    newy1 < 0 || newy1 > 65535)
+	    return false;
+	gy0 = newy0;
+	gy1 = newy1;
+	repaint();
+	return true;
+    }
+}
diff --git a/apps/tosthreads/apps/TestCollection/java/Makefile b/apps/tosthreads/apps/TestCollection/java/Makefile
new file mode 100644
index 00000000..55c2605b
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/java/Makefile
@@ -0,0 +1,21 @@
+GEN=OscilloscopeMsg.java Constants.java
+
+all: oscilloscope.jar
+
+oscilloscope.jar: Oscilloscope.class
+	jar cf $@ *.class
+
+OscilloscopeMsg.java: ../MultihopOscilloscope.h
+	mig -target=null -java-classname=OscilloscopeMsg java ../MultihopOscilloscope.h oscilloscope -o $@
+
+Constants.java: ../MultihopOscilloscope.h
+	ncg -target=null -java-classname=Constants java ../MultihopOscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@
+
+Oscilloscope.class: $(wildcard *.java) $(GEN)
+	javac *.java
+
+clean:
+	rm -f *.class $(GEN)
+
+veryclean: clean
+	rm oscilloscope.jar
diff --git a/apps/tosthreads/apps/TestCollection/java/Node.java b/apps/tosthreads/apps/TestCollection/java/Node.java
new file mode 100644
index 00000000..cfe8db9e
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/java/Node.java
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Class holding all data received from a mote.
+ */
+class Node {
+    /* Data is hold in an array whose size is a multiple of INCREMENT, and
+       INCREMENT itself must be a multiple of Constant.NREADINGS. This
+       simplifies handling the extension and clipping of old data
+       (see setEnd) */
+    final static int INCREMENT = 100 * Constants.NREADINGS;
+    final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT
+
+    /* The mote's identifier */
+    int id;
+
+    /* Data received from the mote. data[0] is the dataStart'th sample
+       Indexes 0 through dataEnd - dataStart - 1 hold data.
+       Samples are 16-bit unsigned numbers, -1 indicates missing data. */
+    int[] data;
+    int dataStart, dataEnd;
+
+    Node(int _id) {
+	id = _id;
+    }
+
+    /* Update data to hold received samples newDataIndex .. newEnd.
+       If we receive data with a lower index, we discard newer data
+       (we assume the mote rebooted). */
+    private void setEnd(int newDataIndex, int newEnd) {
+	if (newDataIndex < dataStart || data == null) {
+	    /* New data is before the start of what we have. Just throw it
+	       all away and start again */
+	    dataStart = newDataIndex;
+	    data = new int[INCREMENT];
+	}
+	if (newEnd > dataStart + data.length) {
+	    /* Try extending first */
+	    if (data.length < MAX_SIZE) {
+		int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT;
+		if (newLength >= MAX_SIZE)
+		    newLength = MAX_SIZE;
+
+		int[] newData = new int[newLength];
+		System.arraycopy(data, 0, newData, 0, data.length);
+		data = newData;
+
+	    }
+	    if (newEnd > dataStart + data.length) {
+		/* Still doesn't fit. Squish.
+		   We assume INCREMENT >= (newEnd - newDataIndex), and ensure
+		   that dataStart + data.length - INCREMENT = newDataIndex */
+		int newStart = newDataIndex + INCREMENT - data.length;
+
+		if (dataStart + data.length > newStart)
+		    System.arraycopy(data, newStart - dataStart, data, 0,
+				     data.length - (newStart - dataStart));
+		dataStart = newStart;
+	    }
+	}
+	/* Mark any missing data as invalid */
+	for (int i = dataEnd < dataStart ? dataStart : dataEnd;
+	     i < newDataIndex; i++)
+	    data[i - dataStart] = -1;
+
+	/* If we receive a count less than the old count, we assume the old
+	   data is invalid */
+	dataEnd = newEnd;
+
+    }
+
+    /* Data received containing NREADINGS samples from messageId * NREADINGS 
+       onwards */
+    void update(int messageId, int readings[]) {
+	int start = messageId * Constants.NREADINGS;
+	setEnd(start, start + Constants.NREADINGS);
+	for (int i = 0; i < readings.length; i++)
+	    data[start - dataStart + i] = readings[i];
+    }
+
+    /* Return value of sample x, or -1 for missing data */
+    int getData(int x) {
+	if (x < dataStart || x >= dataEnd)
+	    return -1;
+	else
+	    return data[x - dataStart];
+    }
+
+    /* Return number of last known sample */
+    int maxX() {
+	return dataEnd - 1;
+    }
+}
diff --git a/apps/tosthreads/apps/TestCollection/java/Oscilloscope.java b/apps/tosthreads/apps/TestCollection/java/Oscilloscope.java
new file mode 100644
index 00000000..3db3741f
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/java/Oscilloscope.java
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import net.tinyos.message.*;
+import net.tinyos.util.*;
+import java.io.*;
+
+/* The "Oscilloscope" demo app. Displays graphs showing data received from
+   the Oscilloscope mote application, and allows the user to:
+   - zoom in or out on the X axis
+   - set the scale on the Y axis
+   - change the sampling period
+   - change the color of each mote's graph
+   - clear all data
+
+   This application is in three parts:
+   - the Node and Data objects store data received from the motes and support
+     simple queries
+   - the Window and Graph and miscellaneous support objects implement the
+     GUI and graph drawing
+   - the Oscilloscope object talks to the motes and coordinates the other
+     objects
+
+   Synchronization is handled through the Oscilloscope object. Any operation
+   that reads or writes the mote data must be synchronized on Oscilloscope.
+   Note that the messageReceived method below is synchronized, so no further
+   synchronization is needed when updating state based on received messages.
+*/
+public class Oscilloscope implements MessageListener
+{
+    MoteIF mote;
+    Data data;
+    Window window;
+
+    /* The current sampling period. If we receive a message from a mote
+       with a newer version, we update our interval. If we receive a message
+       with an older version, we broadcast a message with the current interval
+       and version. If the user changes the interval, we increment the
+       version and broadcast the new interval and version. */
+    int interval = Constants.DEFAULT_INTERVAL;
+    int version = -1;
+
+    /* Main entry point */
+    void run() {
+	data = new Data(this);
+	window = new Window(this);
+	window.setup();
+	mote = new MoteIF(PrintStreamMessenger.err);
+	mote.registerListener(new OscilloscopeMsg(), this);
+    }
+
+    /* The data object has informed us that nodeId is a previously unknown
+       mote. Update the GUI. */
+    void newNode(int nodeId) {
+	window.newNode(nodeId);
+    }
+
+    synchronized public void messageReceived(int dest_addr, Message msg) {
+	if (msg instanceof OscilloscopeMsg) {
+	    OscilloscopeMsg omsg = (OscilloscopeMsg)msg;
+
+	    /* Update interval and mote data */
+	    periodUpdate(omsg.get_version(), omsg.get_interval());
+	    data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings());
+
+	    /* Inform the GUI that new data showed up */
+	    window.newData();
+	}
+    }
+
+    /* A potentially new version and interval has been received from the
+       mote */
+    void periodUpdate(int moteVersion, int moteInterval) {
+	if (moteVersion > version) {
+	    /* It's new. Update our vision of the interval. */
+	    version = moteVersion;
+	    interval = moteInterval;
+	    window.updateSamplePeriod();
+	}
+	else if (moteVersion < version) {
+	    /* It's old. Update the mote's vision of the interval. */
+	    sendInterval();
+	}
+    }
+
+    /* The user wants to set the interval to newPeriod. Refuse bogus values
+       and return false, or accept the change, broadcast it, and return
+       true */
+    synchronized boolean setInterval(int newPeriod) {
+	if (newPeriod < 1 || newPeriod > 65535)
+	    return false;
+	interval = newPeriod;
+	version++;
+	sendInterval();
+	return true;
+    }
+
+    /* Broadcast a version+interval message. */
+    void sendInterval() {
+	OscilloscopeMsg omsg = new OscilloscopeMsg();
+
+	omsg.set_version(version);
+	omsg.set_interval(interval);
+	try {
+	    mote.send(MoteIF.TOS_BCAST_ADDR, omsg);
+	}
+	catch (IOException e) {
+	    window.error("Cannot send message to mote");
+	}
+    }
+
+    /* User wants to clear all data. */
+    void clear() {
+	data = new Data(this);
+    }
+
+    public static void main(String[] args) {
+	Oscilloscope me = new Oscilloscope();
+	me.run();
+    }
+}
diff --git a/apps/tosthreads/apps/TestCollection/java/Window.java b/apps/tosthreads/apps/TestCollection/java/Window.java
new file mode 100644
index 00000000..d7979bf9
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/java/Window.java
@@ -0,0 +1,294 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import javax.swing.table.*;
+import javax.swing.event.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.util.*;
+
+/* The main GUI object. Build the GUI and coordinate all user activities */
+class Window
+{
+    Oscilloscope parent;
+    Graph graph;
+
+    Font smallFont = new Font("Dialog", Font.PLAIN, 8);
+    Font boldFont = new Font("Dialog", Font.BOLD, 12);
+    Font normalFont = new Font("Dialog", Font.PLAIN, 12);
+    MoteTableModel moteListModel; // GUI view of mote list
+    JLabel xLabel; // Label displaying X axis range
+    JTextField sampleText, yText; // inputs for sample period and Y axis range
+    JFrame frame;
+
+    Window(Oscilloscope parent) {
+	this.parent = parent;
+    }
+
+    /* A model for the mote table, and general utility operations on the mote
+       list */
+    class MoteTableModel extends AbstractTableModel {
+	private ArrayList motes = new ArrayList();
+	private ArrayList colors = new ArrayList();
+
+	/* Initial mote colors cycle through this list. Add more colors if
+	   you want. */
+	private Color[] cycle = {
+	    Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA,
+	    Color.YELLOW, Color.GRAY, Color.YELLOW
+	};
+	int cycleIndex;
+
+	/* TableModel methods for achieving our table appearance */
+	public String getColumnName(int col) {
+	    if (col == 0)
+		return "Mote";
+	    else
+		return "Color";
+	}
+	public int getColumnCount() { return 2; }
+	public synchronized int getRowCount() { return motes.size(); }
+	public synchronized Object getValueAt(int row, int col) {
+	    if (col == 0)
+		return motes.get(row);
+	    else
+		return colors.get(row);
+	}
+        public Class getColumnClass(int col) {
+            return getValueAt(0, col).getClass();
+        }
+	public boolean isCellEditable(int row, int col) { return col == 1; }
+        public synchronized void setValueAt(Object value, int row, int col) {
+	    colors.set(row, value);
+            fireTableCellUpdated(row, col);
+	    graph.repaint();
+        }
+
+	/* Return mote id of i'th mote */
+	int get(int i) { return ((Integer)motes.get(i)).intValue(); }
+	
+	/* Return color of i'th mote */
+	Color getColor(int i)  { return (Color)colors.get(i); }
+
+	/* Return number of motes */
+	int size() { return motes.size(); }
+
+	/* Add a new mote */
+	synchronized void newNode(int nodeId) {
+	    /* Shock, horror. No binary search. */
+	    int i, len = motes.size();
+
+	    for (i = 0; ; i++)
+		if (i == len || nodeId < get(i)) {
+		    motes.add(i, new Integer(nodeId));
+		    // Cycle through a set of initial colors
+		    colors.add(i, cycle[cycleIndex++ % cycle.length]);
+		    break;
+		}
+	    fireTableRowsInserted(i, i);
+	}
+
+	/* Remove all motes */
+	void clear() {
+	    motes = new ArrayList();
+	    colors = new ArrayList();
+	    fireTableDataChanged();
+	}
+    }
+
+    /* A simple full-color cell */
+    static class MoteColor extends JLabel implements TableCellRenderer {
+	public MoteColor() { setOpaque(true); }
+	public Component getTableCellRendererComponent
+	    (JTable table, Object color,
+	     boolean isSelected, boolean hasFocus, int row, int column) {
+	    setBackground((Color)color);
+	    return this;
+	}
+    }
+
+    /* Convenience methods for making buttons, labels and textfields.
+       Simplifies code and ensures a consistent style. */
+
+    JButton makeButton(String label, ActionListener action) {
+	JButton button = new JButton();
+        button.setText(label);
+        button.setFont(boldFont);
+	button.addActionListener(action);
+	return button;
+    }
+
+    JLabel makeLabel(String txt, int alignment) {
+	JLabel label = new JLabel(txt, alignment);
+	label.setFont(boldFont);
+	return label;
+    }
+
+    JLabel makeSmallLabel(String txt, int alignment) {
+	JLabel label = new JLabel(txt, alignment);
+	label.setFont(smallFont);
+	return label;
+    }
+
+    JTextField makeTextField(int columns, ActionListener action) {
+	JTextField tf = new JTextField(columns);
+	tf.setFont(normalFont);
+	tf.setMaximumSize(tf.getPreferredSize());
+	tf.addActionListener(action);
+	return tf;
+    }
+
+    /* Build the GUI */
+    void setup() {
+	JPanel main = new JPanel(new BorderLayout());
+
+	main.setMinimumSize(new Dimension(500, 250));
+	main.setPreferredSize(new Dimension(800, 400));
+
+	// Three panels: mote list, graph, controls
+	moteListModel = new  MoteTableModel();
+	JTable moteList = new JTable(moteListModel);
+	moteList.setDefaultRenderer(Color.class, new MoteColor());
+	moteList.setDefaultEditor(Color.class, new ColorCellEditor("Pick Mote Color"));
+	moteList.setPreferredScrollableViewportSize(new Dimension(100, 400));
+	JScrollPane motePanel = new JScrollPane();
+	motePanel.getViewport().add(moteList, null);
+	main.add(motePanel, BorderLayout.WEST);
+
+	graph = new Graph(this);
+	main.add(graph, BorderLayout.CENTER);
+
+	// Controls. Organised using box layouts.
+
+	// Sample period.
+	JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT);
+	sampleText = makeTextField(6, new ActionListener() {
+		public void actionPerformed(ActionEvent e) { setSamplePeriod(); }
+	    } );
+	updateSamplePeriod();
+
+	// Clear data.
+	JButton clearButton = makeButton("Clear data", new ActionListener() {
+		public void actionPerformed(ActionEvent e) { clearData(); }
+	    } );
+
+	// Adjust X-axis zoom.
+	Box xControl = new Box(BoxLayout.Y_AXIS);
+	xLabel = makeLabel("", JLabel.CENTER);
+	final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale);
+	Hashtable xTable = new Hashtable();
+	for (int i = 0; i <= 8; i += 2)
+	    xTable.put(new Integer(i),
+		       makeSmallLabel("" + (Graph.MIN_WIDTH << i),
+				      JLabel.CENTER));
+	xSlider.setLabelTable(xTable);
+	xSlider.setPaintLabels(true);
+	graph.updateXLabel();
+	graph.setScale(graph.scale);
+	xSlider.addChangeListener(new ChangeListener() {
+		public void stateChanged(ChangeEvent e) {
+		    //if (!xSlider.getValueIsAdjusting())
+			graph.setScale((int)xSlider.getValue());
+		}
+	    });
+	xControl.add(xLabel);
+	xControl.add(xSlider);
+
+	// Adjust Y-axis range.
+	JLabel yLabel = makeLabel("Y:", JLabel.RIGHT);
+	yText = makeTextField(12, new ActionListener() {
+		public void actionPerformed(ActionEvent e) { setYAxis(); }
+	    } );
+	yText.setText(graph.gy0 + " - " + graph.gy1);
+
+	Box controls = new Box(BoxLayout.X_AXIS);
+	controls.add(clearButton);
+	controls.add(Box.createHorizontalGlue());
+	controls.add(Box.createRigidArea(new Dimension(20, 0)));
+	controls.add(sampleLabel);
+	controls.add(sampleText);
+	controls.add(Box.createHorizontalGlue());
+	controls.add(Box.createRigidArea(new Dimension(20, 0)));
+	controls.add(xControl);
+	controls.add(yLabel);
+	controls.add(yText);
+	main.add(controls, BorderLayout.SOUTH);
+
+	// The frame part
+	frame = new JFrame("Oscilloscope");
+	frame.setSize(main.getPreferredSize());
+	frame.getContentPane().add(main);
+	frame.setVisible(true);
+	frame.addWindowListener(new WindowAdapter() {
+		public void windowClosing(WindowEvent e) { System.exit(0); }
+	    });
+    }
+
+    /* User operation: clear data */
+    void clearData() {
+	synchronized (parent) {
+	    moteListModel.clear();
+	    parent.clear();
+	    graph.newData();
+	}
+    }
+
+    /* User operation: set Y-axis range. */
+    void setYAxis() {
+	String val = yText.getText();
+
+	try {
+	    int dash = val.indexOf('-');
+	    if (dash >= 0) {
+		String min = val.substring(0, dash).trim();
+		String max = val.substring(dash + 1).trim();
+
+		if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max)))
+		    error("Invalid range " + min + " - " + max + " (expected values between 0 and 65535)");
+		return;
+	    }
+	}
+	catch (NumberFormatException e) { }
+	error("Invalid range " + val + " (expected NN-MM)");
+    }
+
+    /* User operation: set sample period. */
+    void setSamplePeriod() {
+	String periodS = sampleText.getText().trim();
+	try {
+	    int newPeriod = Integer.parseInt(periodS);
+	    if (parent.setInterval(newPeriod))
+		return;
+	}
+	catch (NumberFormatException e) { }
+	error("Invalid sample period " + periodS);
+    }
+
+    /* Notification: sample period changed. */
+    void updateSamplePeriod() {
+	sampleText.setText("" + parent.interval);
+    }
+
+    /* Notification: new node. */
+    void newNode(int nodeId) {
+	moteListModel.newNode(nodeId);
+    }
+
+    /* Notification: new data. */
+    void newData() {
+	graph.newData();
+    }
+
+    void error(String msg) {
+	JOptionPane.showMessageDialog(frame, msg, "Error",
+				      JOptionPane.ERROR_MESSAGE);
+    }
+}
diff --git a/apps/tosthreads/apps/TestCollection/java/build.xml b/apps/tosthreads/apps/TestCollection/java/build.xml
new file mode 100644
index 00000000..e8fa088b
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/java/build.xml
@@ -0,0 +1,19 @@
+<project name="tinyos-2.x app multihoposcilloscope" default="all">
+
+	<target name="all" >
+		<exec executable="make" failonerror="true">
+			<arg line="all" />
+		</exec>
+	</target>
+
+	<target name="java" depends="all">
+	</target>
+
+	<target name="javadoc" >
+		<echo message = "Building javadoc" />
+		<exec executable="make" failonerror="true">
+			<arg line="javadoc" />
+		</exec>
+	</target>
+	
+</project>
diff --git a/apps/tosthreads/apps/TestCollection/java/oscilloscope.jar b/apps/tosthreads/apps/TestCollection/java/oscilloscope.jar
new file mode 100644
index 00000000..acf8fe3a
Binary files /dev/null and b/apps/tosthreads/apps/TestCollection/java/oscilloscope.jar differ
diff --git a/apps/tosthreads/apps/TestCollection/java/run b/apps/tosthreads/apps/TestCollection/java/run
new file mode 100755
index 00000000..5b5df76f
--- /dev/null
+++ b/apps/tosthreads/apps/TestCollection/java/run
@@ -0,0 +1,7 @@
+#!/bin/sh
+if cygpath -w / >/dev/null 2>/dev/null; then
+  CLASSPATH="oscilloscope.jar;$CLASSPATH"
+else
+  CLASSPATH="oscilloscope.jar:$CLASSPATH"
+fi
+java Oscilloscope
diff --git a/apps/tosthreads/apps/TestJoin/Makefile b/apps/tosthreads/apps/TestJoin/Makefile
new file mode 100644
index 00000000..3cb12126
--- /dev/null
+++ b/apps/tosthreads/apps/TestJoin/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=TestJoinAppC
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/apps/TestJoin/README b/apps/tosthreads/apps/TestJoin/README
new file mode 100644
index 00000000..2f45af0d
--- /dev/null
+++ b/apps/tosthreads/apps/TestJoin/README
@@ -0,0 +1,32 @@
+README for TOSThreads TestJoin
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+TestJoin is a simple application used to test the basic functionality of
+the join() system call for waiting on a set of threads in a TOSThreads 
+based application.
+
+You can install TestJoin on a mote via the following command:
+  make <platform> threads install
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+Upon a successful burn, you should see all LEDs toggle in the following pattern,
+repeating every 8 seconds:
+
+0s: (110) LED0  ON, LED1  ON, LED2 OFF
+1s: (000) LED0 OFF, LED1 OFF, LED2 OFF
+2s: (010) LED0 OFF, LED1  ON, LED2 OFF
+3s: (000) LED0 OFF, LED1 OFF, LED2 OFF
+4s: (111) LED0  ON, LED1  ON, LED2 ON
+5s: (001) LED0 OFF, LED1 OFF, LED2 ON
+6s: (011) LED0 OFF, LED1  ON, LED2 ON
+7s: (001) LED0 OFF, LED1 OFF, LED2 ON
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/apps/TestJoin/TestJoinAppC.nc b/apps/tosthreads/apps/TestJoin/TestJoinAppC.nc
new file mode 100644
index 00000000..9b875e64
--- /dev/null
+++ b/apps/tosthreads/apps/TestJoin/TestJoinAppC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * TestJoin is a simple application used to test the basic functionality of
+ * the join() system call for waiting on a set of threads in a TOSThreads 
+ * based application.
+ * 
+ * Upon a successful burn, you should see all LEDs toggle in the following pattern,
+ * repeating every 8 seconds:
+ * 
+ * 0s: (110) LED0  ON, LED1  ON, LED2 OFF  <br>
+ * 1s: (000) LED0 OFF, LED1 OFF, LED2 OFF  <br>
+ * 2s: (010) LED0 OFF, LED1  ON, LED2 OFF  <br>
+ * 3s: (000) LED0 OFF, LED1 OFF, LED2 OFF  <br>
+ * 4s: (111) LED0  ON, LED1  ON, LED2  ON  <br>
+ * 5s: (001) LED0 OFF, LED1 OFF, LED2  ON  <br>
+ * 6s: (011) LED0 OFF, LED1  ON, LED2  ON  <br>
+ * 7s: (001) LED0 OFF, LED1 OFF, LED2  ON  <br>
+ *
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+configuration TestJoinAppC {
+}
+implementation {
+  components MainC, TestJoinC,  LedsC;
+  components new ThreadC(100) as NullThread;
+  components new ThreadC(100) as TinyThread0;
+  components new ThreadC(100) as TinyThread1;
+
+  MainC.Boot <- TestJoinC;
+  TestJoinC.NullThread -> NullThread;
+  TestJoinC.TinyThread0 -> TinyThread0;
+  TestJoinC.TinyThread1 -> TinyThread1; 
+
+  TestJoinC.Leds -> LedsC;
+}
+
diff --git a/apps/tosthreads/apps/TestJoin/TestJoinC.nc b/apps/tosthreads/apps/TestJoin/TestJoinC.nc
new file mode 100644
index 00000000..ada03332
--- /dev/null
+++ b/apps/tosthreads/apps/TestJoin/TestJoinC.nc
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * TestJoin is a simple application used to test the basic functionality of
+ * the join() system call for waiting on a set of threads in a TOSThreads 
+ * based application.
+ * 
+ * Upon a successful burn, you should see all LEDs toggle in the following pattern,
+ * repeating every 8 seconds:
+ * 
+ * 0s: (110) LED0  ON, LED1  ON, LED2 OFF  <br>
+ * 1s: (000) LED0 OFF, LED1 OFF, LED2 OFF  <br>
+ * 2s: (010) LED0 OFF, LED1  ON, LED2 OFF  <br>
+ * 3s: (000) LED0 OFF, LED1 OFF, LED2 OFF  <br>
+ * 4s: (111) LED0  ON, LED1  ON, LED2  ON  <br>
+ * 5s: (001) LED0 OFF, LED1 OFF, LED2  ON  <br>
+ * 6s: (011) LED0 OFF, LED1  ON, LED2  ON  <br>
+ * 7s: (001) LED0 OFF, LED1 OFF, LED2  ON  <br>
+ *
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+module TestJoinC {
+  uses {
+    interface Boot;
+    interface Thread as NullThread;
+    interface Thread as TinyThread0;
+    interface Thread as TinyThread1;
+    interface Leds;
+  }
+}
+
+implementation {
+  event void Boot.booted() {
+    call NullThread.start(NULL);
+  }
+
+  event void NullThread.run(void* arg) {
+    for(;;){
+      call TinyThread0.start(NULL);
+      call TinyThread1.start(NULL);
+      call TinyThread0.join();
+      call TinyThread1.join();
+      call Leds.led2Toggle();
+    }
+  }  
+  event void TinyThread0.run(void* arg) {
+    int i;
+    for(i=0; i<2; i++){
+      call Leds.led0Toggle();
+      call TinyThread0.sleep(1000);
+    }
+  }
+  event void TinyThread1.run(void* arg) {
+    int i;
+    for(i=0; i<4; i++){ 
+      call Leds.led1Toggle();
+      call TinyThread1.sleep(1000);
+    }
+  }
+}
diff --git a/apps/tosthreads/apps/TestPrintf/Makefile b/apps/tosthreads/apps/TestPrintf/Makefile
new file mode 100644
index 00000000..7f5ec68e
--- /dev/null
+++ b/apps/tosthreads/apps/TestPrintf/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestPrintfAppC
+PFLAGS += -I$(TOSDIR)/lib/tosthreads/lib/printf
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/apps/TestPrintf/README b/apps/tosthreads/apps/TestPrintf/README
new file mode 100644
index 00000000..fa2ddb33
--- /dev/null
+++ b/apps/tosthreads/apps/TestPrintf/README
@@ -0,0 +1,48 @@
+README for TOSThreads TestPrintf 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+This application tests the operation of the Printf client in TOSThreads.  It
+continuously prints the value of a counter starting at 0, increasing as it
+prints.
+
+You can install TestPrintf on a mote via the following command:
+  make <platform> threads install
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+Once burned on a mote, the java based PrintfClient must be ran to verify
+proper operation of the application. For example, to connect PrintfClient
+to a mote over a USB serial port:
+  java net.tinyos.tools.PrintfClient -comm serial@/dev/ttyUSBXXX:<baud_rate>
+  
+NOTE::  The baud rate 57600 must be used telos based motes, as its configuration
+has been changed to work with this baud rate when compiled for tosthreads. I.e.
+DO NOT just substitute 'telosb' or 'tmote' for <baud_rate> above.  Explicitly
+set it to 57600.
+
+Once this java application is running, you should see output of the sort
+continuously being streamed to your terminal:
+...
+...
+Counter: 4549
+Counter: 4550
+Counter: 4551
+Counter: 4552
+Counter: 4553
+Counter: 4554
+Counter: 4555
+Counter: 4556
+Counter: 4557
+Counter: 4558
+Counter: 4559
+...
+...
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/apps/TestPrintf/TestPrintfAppC.nc b/apps/tosthreads/apps/TestPrintf/TestPrintfAppC.nc
new file mode 100644
index 00000000..eeb6d7d7
--- /dev/null
+++ b/apps/tosthreads/apps/TestPrintf/TestPrintfAppC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This application tests the operation of the Printf client in TOSThreads.  It
+ * continuously prints the value of a counter starting at 0, increasing as it
+ * prints.
+ * 
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "printf.h"
+
+configuration TestPrintfAppC {
+}
+implementation {
+  components MainC, TestPrintfC;
+  components PrintfC;
+  components new ThreadC(200);
+
+  MainC.Boot <- TestPrintfC;
+  TestPrintfC.Thread -> ThreadC;
+  
+  components LedsC;
+  TestPrintfC.Leds -> LedsC;
+}
+
diff --git a/apps/tosthreads/apps/TestPrintf/TestPrintfC.nc b/apps/tosthreads/apps/TestPrintf/TestPrintfC.nc
new file mode 100644
index 00000000..3f308a66
--- /dev/null
+++ b/apps/tosthreads/apps/TestPrintf/TestPrintfC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This application tests the operation of the Printf client in TOSThreads.  It
+ * continuously prints the value of a counter starting at 0, increasing as it
+ * prints.
+ * 
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+module TestPrintfC {
+  uses {
+    interface Boot;
+    interface Thread;
+    interface Leds;
+  }
+}
+
+implementation {
+  event void Boot.booted() {
+    call Thread.start(NULL);
+  }
+
+  event void Thread.run(void* arg) {
+    uint32_t counter = 0;
+    for(;;){
+      printf("Counter: %lu\n", counter++);
+    }
+  }
+}
diff --git a/apps/tosthreads/apps/TestSineSensor/Makefile b/apps/tosthreads/apps/TestSineSensor/Makefile
new file mode 100644
index 00000000..f3505239
--- /dev/null
+++ b/apps/tosthreads/apps/TestSineSensor/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestSineSensorAppC
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/universal
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/apps/TestSineSensor/README b/apps/tosthreads/apps/TestSineSensor/README
new file mode 100644
index 00000000..50e6386c
--- /dev/null
+++ b/apps/tosthreads/apps/TestSineSensor/README
@@ -0,0 +1,37 @@
+README for TOSThreads TestSineSensor
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+This application is used to test the threaded version of the API for accessing
+the software based SineSensor usable by any platform for demonstration purposes.
+
+You can install TestSineSensor on a mote via the following command:
+  make <platform> threads install
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+This application simply takes sensor readings in an infinite loop from the
+SineSensor and forwards them over the serial interface.  Upon successful
+transmission, LED0 is toggled.
+
+A successful test will result in the TestSineSensor mote constantly flickering
+LED0. Additionally, messages containing the sensor readings should be forwarded
+over the serial interface as verified by running the following for the platform
+of interest:
+  java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX:<baud_rate>
+  
+NOTE::  The baud rate 57600 must be used telos based motes, as its configuration
+has been changed to work with this baud rate when compiled for tosthreads. I.e.
+DO NOT just substitute 'telosb' or 'tmote' for <baud_rate> above.  Explicitly
+set it to 57600.
+
+Once this java application is running, you should see output containing the
+sensor readings being streamed to your terminal.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/apps/TestSineSensor/TestSineSensorAppC.nc b/apps/tosthreads/apps/TestSineSensor/TestSineSensorAppC.nc
new file mode 100644
index 00000000..926a6809
--- /dev/null
+++ b/apps/tosthreads/apps/TestSineSensor/TestSineSensorAppC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This application is used to test the threaded version of the API for accessing
+ * the software based SineSensor usable by any platform for demonstration purposes.
+ * 
+ * This application simply takes sensor readings in an infinite loop from the
+ * SineSensor and forwards them over the serial interface.  Upon successful
+ * transmission, LED0 is toggled.
+ *
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+configuration TestSineSensorAppC {
+}
+implementation {
+  components MainC, TestSineSensorC;
+  components new ThreadC(150) as MainThread;
+  
+  components new BlockingSineSensorC();
+  components BlockingSerialActiveMessageC;
+  components new BlockingSerialAMSenderC(228);
+
+  MainC.Boot <- TestSineSensorC;
+  MainC.SoftwareInit -> BlockingSineSensorC;
+  TestSineSensorC.MainThread -> MainThread;
+  TestSineSensorC.BlockingRead -> BlockingSineSensorC;
+  TestSineSensorC.AMControl -> BlockingSerialActiveMessageC;
+  TestSineSensorC.BlockingAMSend -> BlockingSerialAMSenderC;
+  TestSineSensorC.Packet -> BlockingSerialAMSenderC;
+  
+  components LedsC;
+  TestSineSensorC.Leds -> LedsC;
+}
+
diff --git a/apps/tosthreads/apps/TestSineSensor/TestSineSensorC.nc b/apps/tosthreads/apps/TestSineSensor/TestSineSensorC.nc
new file mode 100644
index 00000000..cb97ecf8
--- /dev/null
+++ b/apps/tosthreads/apps/TestSineSensor/TestSineSensorC.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This application is used to test the threaded version of the API for accessing
+ * the software based SineSensor usable by any platform for demonstration purposes.
+ * 
+ * This application simply takes sensor readings in an infinite loop from the
+ * SineSensor and forwards them over the serial interface.  Upon successful
+ * transmission, LED0 is toggled.
+ *
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+module TestSineSensorC {
+  uses {
+    interface Boot;
+    interface Thread as MainThread;
+    interface BlockingRead<uint16_t>;
+    interface BlockingStdControl as AMControl;
+    interface BlockingAMSend;
+    interface Packet;
+    interface Leds;
+  }
+}
+
+implementation {
+  event void Boot.booted() {
+    call MainThread.start(NULL);
+  }
+
+  event void MainThread.run(void* arg) {
+    uint16_t* var;
+    message_t msg;
+    var = call Packet.getPayload(&msg, sizeof(uint16_t));
+
+    while( call AMControl.start() != SUCCESS );    
+    for(;;){
+      while( call BlockingRead.read(var) != SUCCESS );
+      while( call BlockingAMSend.send(AM_BROADCAST_ADDR, &msg, sizeof(uint16_t)) != SUCCESS );
+      call Leds.led0Toggle();
+    }
+  }
+}
+
diff --git a/apps/tosthreads/capps/BaseStation/BaseStation.c b/apps/tosthreads/capps/BaseStation/BaseStation.c
new file mode 100644
index 00000000..5d421a3f
--- /dev/null
+++ b/apps/tosthreads/capps/BaseStation/BaseStation.c
@@ -0,0 +1,219 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * BaseStation is a reimplementation of the standard BaseStation application using
+ * the TOSThreads thread library.  It transparently forwards any AM messages it
+ * receives from its radio interface to its serial interface and vice versa.
+ *
+ * <p>On the serial link, BaseStation sends and receives simple active
+ * messages (not particular radio packets): on the radio link, it
+ * sends radio active messages, whose format depends on the network
+ * stack being used. BaseStation will copy its compiled-in group ID to
+ * messages moving from the serial link to the radio, and will filter
+ * out incoming radio messages that do not contain that group ID.</p>
+ *
+ * <p>BaseStation includes queues in both directions, with a guarantee
+ * that once a message enters a queue, it will eventually leave on the
+ * other interface. The queues allow the BaseStation to handle load
+ * spikes.</p>
+ *
+ * <p>BaseStation acknowledges a message arriving over the serial link
+ * only if that message was successfully enqueued for delivery to the
+ * radio link.</p>
+ *
+ * <p>The LEDS are programmed to toggle as follows:</p>
+ * <ul>
+ * <li><b>LED0:</b> Message bridged from serial to radio</li>
+ * <li><b>LED1:</b> Message bridged from radio to serial</li>
+ * <li><b>LED2:</b> Dropped message due to queue overflow in either direction</li>
+ * </ul>
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+//#include "stack.h"
+#include "tosthread.h"
+#include "tosthread_amradio.h"
+#include "tosthread_amserial.h"
+#include "tosthread_leds.h"
+#include "tosthread_threadsync.h"
+
+#define MSG_QUEUE_SIZE  3
+
+//Parameters associated with each of the two base station paths
+// radio -> serial
+// serial -> radio
+typedef struct bs_params {
+  tosthread_t receive_handle;
+  tosthread_t snoop_handle;
+  tosthread_t send_handle;
+  mutex_t     mutex;
+  condvar_t   condvar;
+  message_t   shared_msgs[MSG_QUEUE_SIZE];
+  uint8_t     shared_msg_queue_size;
+  uint8_t     shared_msg_queue_index;
+} bs_params_t;
+
+//Declare parameters associated with radio RX thread
+bs_params_t radioRx_params;
+void radioReceive_thread(void* arg);
+void radioSnoop_thread(void* arg);
+void serialSend_thread(void* arg);
+
+//Declare parameters associated with serial RX thread
+bs_params_t serialRx_params;
+void serialReceive_thread(void* arg);
+void radioSend_thread(void* arg);
+
+/********* Initialize base station parameters ********/
+void bs_params_init(bs_params_t* p) {
+  mutex_init( &(p->mutex) );
+  condvar_init( &(p->condvar) );
+  p->shared_msg_queue_size = 0;
+  p->shared_msg_queue_index = 0;
+}
+
+/*********** Main function thread ************/
+void tosthread_main(void* arg) {
+  bs_params_init( &radioRx_params );
+  bs_params_init( &serialRx_params );
+
+  amRadioStart();
+  amSerialStart();
+  tosthread_create(&(radioRx_params.receive_handle), radioReceive_thread, NULL, 200);
+  tosthread_create(&(radioRx_params.snoop_handle), radioSnoop_thread, NULL, 200);
+  tosthread_create(&(radioRx_params.send_handle), serialSend_thread, NULL, 200);
+  tosthread_create(&(serialRx_params.receive_handle), serialReceive_thread, NULL, 200);
+  tosthread_create(&(serialRx_params.send_handle), radioSend_thread, NULL, 200);
+}
+
+/******************** Enqueue and dequeue Messages ****************/
+error_t enqueueMsg(bs_params_t* p, message_t* m) {
+  if(p->shared_msg_queue_size < MSG_QUEUE_SIZE) {
+    (p->shared_msgs)[p->shared_msg_queue_index] = *m;
+    (p->shared_msg_queue_index) = (p->shared_msg_queue_index + 1) % MSG_QUEUE_SIZE;
+    (p->shared_msg_queue_size)++;
+    return SUCCESS;
+  }
+  return FAIL;
+}
+
+message_t* dequeueMsg(bs_params_t* p) {
+  if(p->shared_msg_queue_size > 0) {
+    message_t* m;
+    m = &((p->shared_msgs)[(p->shared_msg_queue_index + (MSG_QUEUE_SIZE - p->shared_msg_queue_size)) % MSG_QUEUE_SIZE]);
+    (p->shared_msg_queue_size)--;
+    return m;
+  }
+  return NULL;
+}
+
+/******************** Send Serial vs. Radio Messages ****************/
+error_t sendSerialMsg(message_t* msg) {
+  am_id_t   id     = amRadioGetType(msg);
+  am_addr_t source = amRadioGetSource(msg);
+  am_addr_t dest   = amRadioGetDestination(msg);
+  uint8_t   len    = radioGetPayloadLength(msg);
+  serialClear(msg);
+  amSerialSetSource(msg, source);
+      
+  return amSerialSend(dest, msg, len, id);
+}
+
+error_t sendRadioMsg(message_t* msg) {
+  am_id_t   id     = amSerialGetType(msg);
+  am_addr_t source = amSerialGetSource(msg);
+  am_addr_t dest   = amSerialGetDestination(msg);
+  uint8_t   len    = serialGetPayloadLength(msg);
+  radioClear(msg);
+  amRadioSetSource(msg, source);
+      
+  return amRadioSend(dest, msg, len, id);
+}
+
+
+/***********************************************************/
+/** Generic implementations of send/receive functionality **/ 
+/***********************************************************/
+void bs_receive(error_t (*recv_func)(message_t*, uint32_t, am_id_t), bs_params_t* p) {
+  message_t m;
+  
+  for(;;) {
+    if( (*(recv_func))(&m, 0, AM_RECEIVE_FROM_ANY) == SUCCESS ) {
+      led0Toggle();
+
+      mutex_lock( &(p->mutex) );
+        while( enqueueMsg(p, &m) == FAIL )
+          condvar_wait( &(p->condvar), &(p->mutex) );
+      mutex_unlock( &(p->mutex) );
+      condvar_signalAll( &(p->condvar) );
+    }
+    else led2Toggle();
+  }
+}
+
+void bs_send(void* send_func, bs_params_t* p) {
+  message_t m;
+  message_t* m_ptr;
+  
+  for(;;) {
+    mutex_lock( &(p->mutex) );
+      while( (m_ptr = dequeueMsg(p)) == NULL )
+        condvar_wait( &(p->condvar), &(p->mutex) );
+      m = *m_ptr;
+    mutex_unlock( &(p->mutex) );    
+    condvar_signalAll( &(p->condvar) );
+    
+    if(send_func == amSerialSend)
+      sendSerialMsg(&m);
+    else
+      sendRadioMsg(&m);
+    led1Toggle();
+  }  
+}
+
+/******************** Actual thread implementations ******************/
+void radioReceive_thread(void* arg) {
+  bs_receive(amRadioReceive, &radioRx_params);
+}
+void radioSnoop_thread(void* arg) {
+  bs_receive(amRadioSnoop, &radioRx_params);
+}
+void serialSend_thread(void* arg) {
+  bs_send(amSerialSend, &radioRx_params);
+}
+void serialReceive_thread(void* arg) {
+  bs_receive(amSerialReceive, &serialRx_params);
+}
+void radioSend_thread(void* arg) {
+  bs_send(amRadioSend, &serialRx_params);
+}
diff --git a/apps/tosthreads/capps/BaseStation/Makefile b/apps/tosthreads/capps/BaseStation/Makefile
new file mode 100644
index 00000000..9c1d4a94
--- /dev/null
+++ b/apps/tosthreads/capps/BaseStation/Makefile
@@ -0,0 +1,5 @@
+TOSTHREAD_MAIN=BaseStation.c
+CFLAGS += -DCC2420_NO_ACKNOWLEDGEMENTS
+CFLAGS += -DCC2420_NO_ADDRESS_RECOGNITION
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/capps/BaseStation/README b/apps/tosthreads/capps/BaseStation/README
new file mode 100644
index 00000000..f0a5492e
--- /dev/null
+++ b/apps/tosthreads/capps/BaseStation/README
@@ -0,0 +1,61 @@
+README for TOSThreads BaseStation 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+BaseStation is a reimplementation of the standard BaseStation application using
+the TOSThreads thread library.  It transparently forwards any AM messages it
+receives from its radio interface to its serial interface and vice versa. Upon
+successful reception of a packet, LED0 is toggled, and upon successful
+forwarding, LED1 is toggled.  If there are any errors, LED2 is toggled.  
+
+To run this application install it on a mote via the command:
+  make <platform> cthreads install.45
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, and micaz 
+
+Installing with NODE_ID 45 (i.e. AM_ADDRESS 45) is just to verify that the
+application forwards packets with an arbitrarily chosen id, which it should.
+
+To test the correct operation of this application, you need two motes:  one with
+this BaseStation application installed on it, and one with an application that
+is sending messages installed, (let's use the RadioStress application from the
+current directory).  
+
+On one mote install the Base station via the command above, and on the other
+install RadioStress via the command:
+  make <platform> cthreads install.1
+  
+Don't forget the '.1' when you install, or RadioStress will be configured to
+receive rather than send messages.  Messages are sent to AM_ADDRESS 0.
+
+A successful test will result in the RadioStress mote constantly flickering all
+of its leds very rapidly, and the BaseStation mote flickering its LED0 and LED1
+leds rapidly.  Additionally, messages should be forwarded over the serial interface
+as verified by running the following for the platform of interest:
+  java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX:<baud_rate>
+  
+NOTE:  The baud rate 57600 must be used telos based motes, as its configuration
+has been changed to work with this baud rate when compiled for tosthreads. I.e.
+DO NOT just substitute 'telosb' or 'tmote' for <baud_rate> above.  Explicitly
+set it to 57600.
+
+Once this java application is running, you should see output of the sort
+constantly being streamed to your terminal:
+  00 00 00 00 01 00 00 14 
+  00 00 00 00 01 00 00 16 
+  00 00 00 00 01 00 00 15 
+  00 00 00 00 01 00 00 14 
+  00 00 00 00 01 00 00 16 
+  00 00 00 00 01 00 00 15 
+  00 00 00 00 01 00 00 14 
+  00 00 00 00 01 00 00 16 
+  00 00 00 00 01 00 00 15 
+  00 00 00 00 01 00 00 14 
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/capps/Blink/Blink.c b/apps/tosthreads/capps/Blink/Blink.c
new file mode 100644
index 00000000..c9e733be
--- /dev/null
+++ b/apps/tosthreads/capps/Blink/Blink.c
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Blink is a simple application used to test the basic functionality of
+ * TOSThreads.
+ *
+ * Upon a successful burn, you should see LED0 flashing with a period of every
+ * 200ms, and LED1 and LED2 flashing in unison with a period of 1000ms.
+ *
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "stack.h"
+#include "tosthread.h"
+#include "tosthread_leds.h"
+
+//Initialize variables associated with each thread
+tosthread_t blink0;
+tosthread_t blink1;
+tosthread_t blink2;
+
+void blink0_thread(void* arg);
+void blink1_thread(void* arg);
+void blink2_thread(void* arg);
+
+void tosthread_main(void* arg) {
+  //Use stack estimator to calculate maximum stack size
+  //  on a thread by thread basis
+  tosthread_create(&blink0, blink0_thread, NULL, BLINK0_STACK_SIZE);
+  tosthread_create(&blink1, blink1_thread, NULL, BLINK1_STACK_SIZE);
+  tosthread_create(&blink2, blink2_thread, NULL, BLINK2_STACK_SIZE);
+}
+
+void blink0_thread(void* arg) {
+  for(;;) {
+    led0Toggle();
+    tosthread_sleep(200);
+  }
+}
+
+void blink1_thread(void* arg) {
+  for(;;) {
+    led1Toggle();
+    tosthread_sleep(1000);
+  }
+}
+
+void blink2_thread(void* arg) {
+  for(;;) {
+    led2Toggle();
+    tosthread_sleep(1000);
+  }
+}
diff --git a/apps/tosthreads/capps/Blink/Makefile b/apps/tosthreads/capps/Blink/Makefile
new file mode 100644
index 00000000..aecfc210
--- /dev/null
+++ b/apps/tosthreads/capps/Blink/Makefile
@@ -0,0 +1,3 @@
+TOSTHREAD_MAIN=Blink.c
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/capps/Blink/README b/apps/tosthreads/capps/Blink/README
new file mode 100644
index 00000000..2321f41c
--- /dev/null
+++ b/apps/tosthreads/capps/Blink/README
@@ -0,0 +1,22 @@
+README for TOSThreads Blink 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+Blink is a simple application used to test the basic functionality of
+TOSThreads.
+
+You can install Blink on a mote via the following command:
+  make <platform> cthreads install
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+Upon a successful burn, you should see LED0 flashing with a period of every
+200ms, and LED1 and LED2 flashing in unison with a period of 1000ms.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/capps/Blink/stack.h b/apps/tosthreads/capps/Blink/stack.h
new file mode 100644
index 00000000..30882954
--- /dev/null
+++ b/apps/tosthreads/capps/Blink/stack.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+enum {
+  BLINK0_STACK_SIZE = 200,
+  BLINK1_STACK_SIZE = 200,
+  BLINK2_STACK_SIZE = 200,
+};
diff --git a/apps/tosthreads/capps/Bounce/Bounce.c b/apps/tosthreads/capps/Bounce/Bounce.c
new file mode 100644
index 00000000..34422b5f
--- /dev/null
+++ b/apps/tosthreads/capps/Bounce/Bounce.c
@@ -0,0 +1,126 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * This application is derived from a similar application in the TinyThread 
+ * implementation by William P. McCartney from Cleveland State University (2006)
+ * 
+ * This application stresses the operation of the thread based AM commands for
+ * packet transmission and reception.  To run this application you will need to
+ * burn it on one mote with NODE_ID 0, and a second mote with NODE_ID 1. 
+ * 
+ * Three different threads run that each contain an infinite loop that first sends
+ * a message and then waits to receive a message before returning to the top of the
+ * loop. After each message reception, one of the onboard LEDs is toggled to
+ * indicate that it was received. Thread 0 blinks LED0, thread 1 blinks LED1, and
+ * thread 2 blinks LED2. The three threads run independently, and three different
+ * messages are bounced back and forth between the two motes in an unsynchronized
+ * fashion.  In contrast to the more complicated Bounce application found in the
+ * normal nesC threads version of this application, once a thread receives a
+ * message it will immediately flip on its LED instead of waiting on a Barrier and
+ * synchronizing the LEDs to come on only once messages have been received from all
+ * threads.  In this way, messages are bounced back and forth between the two motes
+ * in an asynchronous fashion, and LEDS are toggled immediately upon message
+ * reception..  
+ * 
+ * Successful running of this application results in each LED bouncing back and
+ * forth between each mote independent of one another.  This will continue in an
+ * finite loop forever.
+ *  
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "tosthread.h"
+#include "tosthread_leds.h"
+#include "tosthread_amradio.h"
+
+//Initialize variables associated with each thread
+tosthread_t bounceThread0;
+tosthread_t bounceThread1;
+tosthread_t bounceThread2;
+
+void bounceThread0_start(void* arg);
+void bounceThread1_start(void* arg);
+void bounceThread2_start(void* arg);
+
+void tosthread_main(void* arg) {
+  amRadioStart();
+  
+  tosthread_create(&bounceThread0, bounceThread0_start, NULL, 300);
+  tosthread_create(&bounceThread1, bounceThread1_start, NULL, 300);
+  tosthread_create(&bounceThread2, bounceThread2_start, NULL, 300);
+}
+
+void bounceThread0_start(void *arg) {
+  message_t msg0;
+  
+  for(;;) {
+    while (amRadioSend(AM_BROADCAST_ADDR, &msg0, 0, 20) == EBUSY) {}
+    led0Off();
+    
+    if(amRadioReceive(&msg0, 5000, 20) == SUCCESS) {
+      led0On();
+    }
+    
+    tosthread_sleep(500);
+  }
+}
+
+void bounceThread1_start(void *arg) {
+  message_t msg1;
+  
+  for(;;) {
+    while (amRadioSend(AM_BROADCAST_ADDR, &msg1, 0, 21) == EBUSY) {}
+    led1Off();
+    
+    if(amRadioReceive(&msg1, 5000, 21) == SUCCESS) {
+      led1On();
+    }
+    
+    tosthread_sleep(500);
+  }
+}
+
+void bounceThread2_start(void *arg) {
+  message_t msg2;
+  
+  for(;;) {
+    while (amRadioSend(AM_BROADCAST_ADDR, &msg2, 0, 22) == EBUSY) {}
+    led2Off();
+    
+    if(amRadioReceive(&msg2, 5000, 22) == SUCCESS) {
+      led2On();
+    }
+    
+    tosthread_sleep(500);
+  }
+}
diff --git a/apps/tosthreads/capps/Bounce/Makefile b/apps/tosthreads/capps/Bounce/Makefile
new file mode 100644
index 00000000..0e7e0ae6
--- /dev/null
+++ b/apps/tosthreads/capps/Bounce/Makefile
@@ -0,0 +1,3 @@
+TOSTHREAD_MAIN=Bounce.c
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/capps/Bounce/README b/apps/tosthreads/capps/Bounce/README
new file mode 100644
index 00000000..2a5c0100
--- /dev/null
+++ b/apps/tosthreads/capps/Bounce/README
@@ -0,0 +1,42 @@
+README for TOSThreads Bounce 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+This application is derived from a similar application in the TinyThread 
+implementation by William P. McCartney from Cleveland State University (2006)
+
+This application stresses the operation of the thread based AM commands for
+packet transmission and reception.  To run this application you will need to
+burn it on one mote with NODE_ID 0, and a second mote with NODE_ID 1. 
+
+You can install Bounce on a mote via the following command:
+  make <platform> cthreads install.0
+  make <platform> cthreads install.1
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+Three different threads run that each contain an infinite loop that first sends
+a message and then waits to receive a message before returning to the top of the
+loop. After each message reception, one of the onboard LEDs is toggled to
+indicate that it was received. Thread 0 blinks LED0, thread 1 blinks LED1, and
+thread 2 blinks LED2. The three threads run independently, and three different
+messages are bounced back and forth between the two motes in an unsynchronized
+fashion.  In contrast to the more complicated Bounce application found in the
+normal nesC threads version of this application, once a thread receives a
+message it will immediately flip on its LED instead of waiting on a Barrier and
+synchronizing the LEDs to come on only once messages have been received from all
+threads.  In this way, messages are bounced back and forth between the two motes
+in an asynchronous fashion, and LEDS are toggled immediately upon message
+reception..  
+
+Successful running of this application results in each LED bouncing back and
+forth between each mote independent of one another.  This will continue in an
+finite loop forever.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/capps/Makefile b/apps/tosthreads/capps/Makefile
new file mode 100644
index 00000000..340df73f
--- /dev/null
+++ b/apps/tosthreads/capps/Makefile
@@ -0,0 +1,57 @@
+#-*-makefile-*-
+######################################################################
+# 
+# Makes the entire suite of TinyOS applications for a given platform.
+#
+# Author: 	Martin Turon
+# Date:		August 18, 2005
+#
+######################################################################
+# $Id: Makefile,v 1.1 2008-06-12 15:11:39 klueska Exp $
+
+# MAKECMDGOALS is the way to get the arguments passed into a Makefile ...
+TARGET=$(MAKECMDGOALS)
+NESDOC_TARGET=$(filter-out nesdoc,$(TARGET))
+
+# Here is a way to get the list of subdirectories in a Makefile ...
+ROOT=.
+SUBDIRS := $(shell find * -type d)
+
+# Okay, match any target, and recurse the subdirectories
+%: 
+	@for i in $(SUBDIRS); do \
+	  HERE=$$PWD; \
+	  if [ -f $$i/Makefile ]; then \
+	      echo Building ... $(PWD)/$$i; \
+	      echo make $(TARGET); \
+	      cd $$i; \
+	      $(MAKE) $(TARGET); \
+	      cd $$HERE; \
+	  fi; \
+	done
+
+threads:
+	@:
+cthreads:
+	@:
+dynthreads:
+	@:
+
+BASEDIR = $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' )
+# The output directory for generated documentation
+DOCDIR = $(BASEDIR)/doc/nesdoc
+
+nesdoc:
+	@echo This target rebuilds documentation for all known platforms.
+	@echo It DOES NOT overwrite any existing documentation, thus, it 
+	@echo is best run after deleting all old documentation.
+	@echo
+	@echo To delete all old documentation, delete the contents of the
+	@echo $(DOCDIR) directory.
+	@echo
+	@echo Press Enter to continue, or ^C to abort.
+	@read
+	for platform in `ncc -print-platforms`; do \
+	  $(MAKE) $$platform docs.nohtml.preserve; \
+	  nesdoc -o $(DOCDIR) -html -target=$$platform; \
+	done
diff --git a/apps/tosthreads/capps/Null/Makefile b/apps/tosthreads/capps/Null/Makefile
new file mode 100644
index 00000000..549999b7
--- /dev/null
+++ b/apps/tosthreads/capps/Null/Makefile
@@ -0,0 +1,3 @@
+TOSTHREAD_MAIN=Null.c
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/capps/Null/Null.c b/apps/tosthreads/capps/Null/Null.c
new file mode 100644
index 00000000..c220426b
--- /dev/null
+++ b/apps/tosthreads/capps/Null/Null.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * Null is an empty skeleton application for testing the basic compilation and
+ * runtime of a c-based tosthreads application.  It is useful to test that the build
+ * environment is functional in its most minimal sense, i.e., you can correctly
+ * compile an application. It is also useful to test the minimum power consumption
+ * of a node when it has absolutely no interrupts or resources active.
+ *
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "tosthread.h"
+
+void tosthread_main(void* arg) {}
diff --git a/apps/tosthreads/capps/Null/README b/apps/tosthreads/capps/Null/README
new file mode 100644
index 00000000..ec074096
--- /dev/null
+++ b/apps/tosthreads/capps/Null/README
@@ -0,0 +1,18 @@
+README for TOSTHREADS Null
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.berkeley.edu>
+
+Description:
+
+Null is an empty skeleton application for testing the basic compilation and
+runtime of a c-based tosthreads application.  It is useful to test that the build environment is functional in its most minimal sense, i.e., you can correctly
+compile an application. It is also useful to test the minimum power consumption
+of a node when it has absolutely no interrupts or resources active.
+
+Successful running of this application is that it simply compiles and installs.  No LEDs should be flashed.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/capps/RadioStress/Makefile b/apps/tosthreads/capps/RadioStress/Makefile
new file mode 100644
index 00000000..9fceb0a4
--- /dev/null
+++ b/apps/tosthreads/capps/RadioStress/Makefile
@@ -0,0 +1,3 @@
+TOSTHREAD_MAIN=RadioStress.c
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/capps/RadioStress/README b/apps/tosthreads/capps/RadioStress/README
new file mode 100644
index 00000000..fae9f9f7
--- /dev/null
+++ b/apps/tosthreads/capps/RadioStress/README
@@ -0,0 +1,35 @@
+README for TOSThreads RadioStress 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+This application stresses the operation of the thread based AM commands for
+packet transmission and reception.  To run this application you will need to
+burn it on one mote with NODE_ID 0, and a second mote with NODE_ID 1.  
+
+You can install RadioStress on a mote via the following command:
+  make <platform> cthreads install.0
+  make <platform> cthreads install.1
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+The application burned with NODE_ID 0 will be programmed as a Receiver and will
+wait for messages from the sender programmed with NODE_ID 1.  In the case of the
+sender, messages with three different AM ids are sent from three different
+threads in an infinite loop, and one of LED0, LED1, and LED2 are toggled upon
+successful transmission.  In the case of the receiver, three different threads
+are used to wait for messages in an infinite loop from the three sending threads
+on the sender mote.  Upon successful reception, one of LED0, LED1, or LED2 is
+toggled depending on the AM id received.
+
+Successful running of this application will result in all three leds flashing
+very rapidly on both motes, with the receiver mote flashing less rapidly if the
+sender mote is turned off (i.e. once every 5000ms because there is a timeout on
+how long it waits for messages to be received before retrying).
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/capps/RadioStress/RadioStress.c b/apps/tosthreads/capps/RadioStress/RadioStress.c
new file mode 100644
index 00000000..bd047bf5
--- /dev/null
+++ b/apps/tosthreads/capps/RadioStress/RadioStress.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This application stresses the blocking send and receive commands for the c based 
+ * API of tosthreads.  Three threads are run, each thread toggling a different 
+ * colored LED. If a node has TOS_NODE_ID == 0 it will try and receive in 
+ * an infinite loop, toggling one of the three Leds upon reception.  If it has 
+ * TOS_NODE_ID == 1, it will try to send in an infinite loop, toggling one of the three
+ * Leds upon the completion of a send.  Thread 0 toggles the Led0, Thread 1 toggles 
+ * Led1, and Thread 2 toggles Led2.
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+//#include "stack.h"
+#include "tosthread.h"
+#include "tosthread_amradio.h"
+#include "tosthread_leds.h"
+
+//Initialize variables associated with each thread
+tosthread_t radioStress0;
+tosthread_t radioStress1;
+tosthread_t radioStress2;
+
+void radioStress0_thread(void* arg);
+void radioStress1_thread(void* arg);
+void radioStress2_thread(void* arg);
+
+//Initialize messages for sending out over the radio
+message_t msg0;
+message_t msg1;
+message_t msg2;
+
+void tosthread_main(void* arg) {
+  while( amRadioStart() != SUCCESS );
+  tosthread_create(&radioStress0, radioStress0_thread, &msg0, 200);
+  tosthread_create(&radioStress1, radioStress1_thread, &msg1, 200);
+  tosthread_create(&radioStress2, radioStress2_thread, &msg2, 200);
+}
+
+void radioStress0_thread(void* arg) {
+  message_t* m = (message_t*)arg;
+  for(;;) {
+    if(TOS_NODE_ID == 0) {
+      amRadioReceive(m, 2000, 20);
+      led0Toggle();
+    }
+    else {
+      if(amRadioSend(!TOS_NODE_ID, m, 0, 20) == SUCCESS)
+        led0Toggle(); 
+    }
+  }
+}
+
+void radioStress1_thread(void* arg) {
+  message_t* m = (message_t*)arg;
+  for(;;) {
+    if(TOS_NODE_ID == 0) {
+      amRadioReceive(m, 2000, 21);
+      led1Toggle();
+    }
+    else {
+      if(amRadioSend(!TOS_NODE_ID, m, 0, 21) == SUCCESS)
+        led1Toggle();
+    }
+  }
+}
+
+void radioStress2_thread(void* arg) {
+  message_t* m = (message_t*)arg;
+  for(;;) {
+    if(TOS_NODE_ID == 0) {
+      amRadioReceive(m, 2000, 22);
+      led2Toggle();
+    }
+    else {
+      if(amRadioSend(!TOS_NODE_ID, m, 0, 22) == SUCCESS)
+        led2Toggle();
+    }
+  }
+}
diff --git a/apps/tosthreads/capps/SenseAndSend/Makefile b/apps/tosthreads/capps/SenseAndSend/Makefile
new file mode 100644
index 00000000..edf90505
--- /dev/null
+++ b/apps/tosthreads/capps/SenseAndSend/Makefile
@@ -0,0 +1,13 @@
+TOSTHREAD_MAIN=SenseAndSend.c
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/tmote_onboard
+
+ifneq ($(filter telosb tmote epic clean,$(MAKECMDGOALS)),) 
+  include $(MAKERULES)
+else
+%:
+	@echo "    Sorry, this application is only written to work with telos based motes equipped with onboard sensors.."
+cthreads:
+	@:
+dynthreads:
+	@:
+endif
diff --git a/apps/tosthreads/capps/SenseAndSend/README b/apps/tosthreads/capps/SenseAndSend/README
new file mode 100644
index 00000000..bccfef91
--- /dev/null
+++ b/apps/tosthreads/capps/SenseAndSend/README
@@ -0,0 +1,33 @@
+README for TOSThreads SenseAndSend 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+SenseAndSend is a threaded implementation of an application that takes various
+sensor readings in parallel (by dedicating one thread to each reading), and
+assembling them into a packet to be sent out over the radio.  It is written
+specifically for use with the tmote onboard sensor package, and will not compile
+for any other platforms.
+
+To run this application install it on a mote via the command:
+  make <platform> cthreads install
+  
+Valid platforms are currently: tmote, telosb with onboard sensors
+
+Readings are taken from each of the 4 oboard sensors and sent out over the radio
+interface in an infinite loop.  Upon successful transmission, LED0 is toggled,
+and the process starts over again.
+
+A successful test will result in LED0 toggling periodically at a rate of
+approximately 220ms (the time it takes to take a humidity + temperature sensor
+reading since they share the same hardware and cannot be taken in parallel). 
+
+Additionally, a base station application should be run to verify the reception
+of packets sent from a SenseAndSend mote, with reasonable looking sensor data.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/capps/SenseAndSend/SenseAndSend.c b/apps/tosthreads/capps/SenseAndSend/SenseAndSend.c
new file mode 100644
index 00000000..c49a761e
--- /dev/null
+++ b/apps/tosthreads/capps/SenseAndSend/SenseAndSend.c
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SenseAndSend is a threaded implementation of an application that takes various
+ * sensor readings in parallel (by dedicating one thread to each reading), and
+ * assembling them into a packet to be sent out over the radio.  It is written
+ * specifically for use with the tmote onboard sensor package, and will not compile
+ * for any other platforms.
+ * 
+ * Readings are taken from each of the 4 oboard sensors and sent out over the radio
+ * interface in an infinite loop.  Upon successful transmission, LED0 is toggled,
+ * and the process starts over again.
+ * 
+ * A successful test will result in LED0 toggling periodically at a rate of
+ * approximately 220ms (the time it takes to take a humidity + temperature sensor
+ * reading since they share the same hardware and cannot be taken in parallel). 
+ * 
+ * Additionally, a base station application should be run to verify the reception
+ * of packets sent from a SenseAndSend mote, with reasonable looking sensor data.
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "tosthread.h"
+#include "tosthread_amradio.h"
+#include "tosthread_leds.h"
+#include "tosthread_threadsync.h"
+#include "tosthread_hamamatsuS1087.h"
+#include "tosthread_hamamatsuS10871.h"
+#include "tosthread_sensirionSht11.h"
+
+#define NUM_SENSORS             4
+#define SAMPLING_PERIOD      3000
+#define AM_SENSOR_DATA_MSG   0x25   
+
+//Data structure for storing sensor data
+typedef struct sensor_data {
+  nx_uint32_t seq_no;
+  nx_uint16_t hum;
+  nx_uint16_t temp;
+  nx_uint16_t tsr;
+  nx_uint16_t par;
+} sensor_data_t;
+
+//Initialize variables associated with each thread
+tosthread_t humidity;
+tosthread_t temperature;
+tosthread_t total_solar;
+tosthread_t photo_active;
+tosthread_t send_handler;
+
+message_t send_msg;
+sensor_data_t* sensor_data; //pointer into message structure
+mutex_t data_mutex;
+barrier_t send_barrier;
+barrier_t sense_barrier;
+
+void humidity_thread(void* arg);
+void temperature_thread(void* arg);
+void total_solar_thread(void* arg);
+void photo_active_thread(void* arg);
+void send_thread(void* arg);
+
+void tosthread_main(void* arg) {
+  mutex_init(&data_mutex);
+  barrier_reset(&send_barrier, NUM_SENSORS+1);
+  barrier_reset(&sense_barrier, NUM_SENSORS+1);
+  sensor_data = radioGetPayload(&send_msg, sizeof(sensor_data_t));
+  sensor_data->seq_no = 0;
+
+  amRadioStart();
+  tosthread_create(&humidity, humidity_thread, NULL, 200);
+  tosthread_create(&temperature, temperature_thread, NULL, 200);
+  tosthread_create(&total_solar, total_solar_thread, NULL, 200);
+  tosthread_create(&photo_active, photo_active_thread, NULL, 200);
+  tosthread_create(&send_handler, send_thread, NULL, 200);
+}
+
+void read_sensor(error_t (*read)(uint16_t*), nx_uint16_t* nx_val) {
+  uint16_t val;
+  for(;;) {
+    (*read)(&val);
+    mutex_lock(&data_mutex);
+     *nx_val = val;
+    mutex_unlock(&data_mutex);
+    barrier_block(&send_barrier);
+    barrier_block(&sense_barrier);
+  }
+}
+
+void humidity_thread(void* arg) {
+  read_sensor(sensirionSht11_humidity_read, &(sensor_data->hum));
+}
+void temperature_thread(void* arg) {
+  read_sensor(sensirionSht11_temperature_read, &(sensor_data->temp));
+}
+void total_solar_thread(void* arg) {
+  read_sensor(hamamatsuS10871_tsr_read, &(sensor_data->tsr));
+}
+void photo_active_thread(void* arg) {
+  read_sensor(hamamatsuS1087_par_read, &(sensor_data->par));
+}
+void send_thread(void* arg) {
+  for(;;) {
+    barrier_block(&send_barrier);
+    barrier_reset(&send_barrier, NUM_SENSORS + 1);
+    
+    if(amRadioSend(AM_BROADCAST_ADDR, &send_msg, sizeof(sensor_data_t), AM_SENSOR_DATA_MSG) == SUCCESS) {
+      sensor_data->seq_no++;
+      led0Toggle();
+    }
+    //tosthread_sleep(SAMPLING_PERIOD);
+    barrier_block(&sense_barrier);
+    barrier_reset(&sense_barrier, NUM_SENSORS + 1);
+  }
+}
diff --git a/apps/tosthreads/capps/SenseStoreAndForward/Makefile b/apps/tosthreads/capps/SenseStoreAndForward/Makefile
new file mode 100644
index 00000000..f81126e1
--- /dev/null
+++ b/apps/tosthreads/capps/SenseStoreAndForward/Makefile
@@ -0,0 +1,13 @@
+TOSTHREAD_MAIN=SenseStoreAndForward.c
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/tmote_onboard
+
+ifneq ($(filter telosb tmote clean,$(MAKECMDGOALS)),)
+  include $(MAKERULES)
+else
+%:
+	@echo "    Sorry, this application is only written to work with telos based motes equipped with onboard sensors.."
+cthreads:
+	@:
+dynthreads:
+	@:
+endif
diff --git a/apps/tosthreads/capps/SenseStoreAndForward/README b/apps/tosthreads/capps/SenseStoreAndForward/README
new file mode 100644
index 00000000..75d1e979
--- /dev/null
+++ b/apps/tosthreads/capps/SenseStoreAndForward/README
@@ -0,0 +1,44 @@
+README for TOSThreads SenseStoreAndForward 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+SenseStoreAndForward is a threaded implementation of an application that takes
+various sensor readings in parallel (by dedicating one thread to each reading),
+logs them to flash, and then sends them out over the radio at some later time. 
+In the current implementation, sensor readings are taken as quickly as possible,
+and records containing a set of readings from each iteration are batched out
+over the radio every 10000ms.  This application is written specifically for use
+with the tmote onboard sensor package, and will not compile for any other
+platforms.
+
+To run this application install it on a mote via the command:
+  make <platform> cthreads install
+  
+Valid platforms are currently: tmote, telosb with onboard sensors
+
+Readings are taken from each of the 4 oboard sensors and logged to flash as one
+record in an infinite loop. Records are then read out of flash and and sent out
+over the radio interface in separate infinite loop. Before the application
+starts running, the entire contents of the flash drive are erased.
+
+A successful test will result in LED0 remaining solid for approximately 6s while
+the flash is being erased.  After that LED0 will toggle with each successful set
+of sensor readings logged to flash, at a rate of approximately 220ms (the time
+it takes to take a humidity + temperature sensor reading since they share the
+same hardware and cannot be taken in parallel).  Also, LED1 will begin toggling
+in rapid succession once every 10000ms as records are successfully read from
+flash and sent out over the radio.  Once all of the records currently recorded
+to flash since the last batch of sends have been sent out, LED2 Toggles to
+indicate completion.  This process continues in an infinite loop forever.
+
+Additionally, a base station application should be run to verify the reception
+of packets sent from a SenseStoreAndForward mote, with reasonable looking sensor 
+data.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/capps/SenseStoreAndForward/SenseStoreAndForward.c b/apps/tosthreads/capps/SenseStoreAndForward/SenseStoreAndForward.c
new file mode 100644
index 00000000..93a75a40
--- /dev/null
+++ b/apps/tosthreads/capps/SenseStoreAndForward/SenseStoreAndForward.c
@@ -0,0 +1,191 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SenseStoreAndForward is a threaded implementation of an application that takes
+ * various sensor readings in parallel (by dedicating one thread to each reading),
+ * logs them to flash, and then sends them out over the radio at some later time. 
+ * In the current implementation, sensor readings are taken as quickly as possible,
+ * and records containing a set of readings from each iteration are batched out
+ * over the radio every 10000ms.  This application is written specifically for use
+ * with the tmote onboard sensor package, and will not compile for any other
+ * platforms.
+ *
+ * Readings are taken from each of the 4 oboard sensors and logged to flash as one
+ * record in an infinite loop. Records are then read out of flash and and sent out
+ * over the radio interface in separate infinite loop. Before the application
+ * starts running, the entire contents of the flash drive are erased.
+ * 
+ * A successful test will result in LED0 remaining solid for approximately 6s while
+ * the flash is being erased.  After that LED0 will toggle with each successful set
+ * of sensor readings logged to flash, at a rate of approximately 220ms (the time
+ * it takes to take a humidity + temperature sensor reading since they share the
+ * same hardware and cannot be taken in parallel).  Also, LED1 will begin toggling
+ * in rapid succession once every 10000ms as records are successfully read from
+ * flash and sent out over the radio.  Once all of the records currently recorded
+ * to flash since the last batch of sends have been sent out, LED2 Toggles to
+ * indicate completion.  This process continues in an infinite loop forever.
+ * 
+ * Additionally, a base station application should be run to verify the reception
+ * of packets sent from a SenseStoreAndForward mote, with reasonable looking sensor 
+ * data.
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "tosthread.h"
+#include "tosthread_amradio.h"
+#include "tosthread_leds.h"
+#include "tosthread_threadsync.h"
+#include "tosthread_logstorage.h"
+#include "tmote_onboard_sensors.h"
+#include "StorageVolumes.h"
+
+#define NUM_SENSORS              4
+#define SAMPLING_PERIOD       3000
+#define SENDING_PERIOD       10000
+#define AM_SENSOR_DATA_MSG    0x25   
+
+//Data structure for storing sensor data
+typedef struct sensor_data {
+  nx_uint32_t seq_no;
+  nx_uint16_t hum;
+  nx_uint16_t temp;
+  nx_uint16_t tsr;
+  nx_uint16_t par;
+} sensor_data_t;
+
+//Initialize variables associated with each thread
+tosthread_t humidity;
+tosthread_t temperature;
+tosthread_t total_solar;
+tosthread_t photo_active;
+tosthread_t store_handler;
+tosthread_t send_handler;
+
+message_t send_msg;
+sensor_data_t storing_sensor_data;
+sensor_data_t* sending_sensor_data; //pointer into message structure
+mutex_t data_mutex;
+mutex_t log_mutex;
+barrier_t send_barrier;
+barrier_t sense_barrier;
+
+void humidity_thread(void* arg);
+void temperature_thread(void* arg);
+void total_solar_thread(void* arg);
+void photo_active_thread(void* arg);
+void store_thread(void* arg);
+void send_thread(void* arg);
+
+void tosthread_main(void* arg) {
+  mutex_init(&data_mutex);
+  mutex_init(&log_mutex);
+  barrier_reset(&send_barrier, NUM_SENSORS+1);
+  barrier_reset(&sense_barrier, NUM_SENSORS+1);
+  sending_sensor_data = radioGetPayload(&send_msg, sizeof(sensor_data_t));
+  storing_sensor_data.seq_no = 0;
+
+  amRadioStart();
+  led0Toggle();
+  volumeLogErase(VOLUME_SENSORLOG);
+  volumeLogSeek(VOLUME_SENSORLOG, SEEK_BEGINNING);
+  tosthread_create(&humidity, humidity_thread, NULL, 200);
+  tosthread_create(&temperature, temperature_thread, NULL, 200);
+  tosthread_create(&total_solar, total_solar_thread, NULL, 200);
+  tosthread_create(&photo_active, photo_active_thread, NULL, 200);
+  tosthread_create(&store_handler, store_thread, NULL, 200);
+  tosthread_create(&send_handler, send_thread, NULL, 200);
+}
+
+void read_sensor(error_t (*read)(uint16_t*), nx_uint16_t* nx_val) {
+  uint16_t val;
+  for(;;) {
+    (*read)(&val);
+    mutex_lock(&data_mutex);
+    *nx_val = val;
+    mutex_unlock(&data_mutex);
+    barrier_block(&send_barrier);
+    barrier_block(&sense_barrier);
+  }
+}
+
+void humidity_thread(void* arg) {
+  read_sensor(sensirionSht11_humidity_read, &(storing_sensor_data.hum));
+}
+void temperature_thread(void* arg) {
+  read_sensor(sensirionSht11_temperature_read, &(storing_sensor_data.temp));
+}
+void total_solar_thread(void* arg) {
+  read_sensor(hamamatsuS10871_tsr_read, &(storing_sensor_data.tsr));
+}
+void photo_active_thread(void* arg) {
+  read_sensor(hamamatsuS1087_par_read, &(storing_sensor_data.par));
+}
+void store_thread(void* arg) {
+  storage_len_t sensor_data_len;
+  bool sensor_records_lost;
+  
+  for(;;) {
+    barrier_block(&send_barrier);
+    barrier_reset(&send_barrier, NUM_SENSORS + 1);
+    
+    mutex_lock(&log_mutex);
+      sensor_data_len = sizeof(sensor_data_t);
+      while( volumeLogAppend(VOLUME_SENSORLOG, &storing_sensor_data, &sensor_data_len, &sensor_records_lost) != SUCCESS );
+    mutex_unlock(&log_mutex);
+    
+    storing_sensor_data.seq_no++;
+    led0Toggle();
+
+    //tosthread_sleep(SAMPLING_PERIOD);
+    barrier_block(&sense_barrier);
+    barrier_reset(&sense_barrier, NUM_SENSORS + 1);
+  }
+}
+void send_thread(void* arg) {
+  storage_len_t sensor_data_len;
+  
+  for(;;) {
+    tosthread_sleep(SENDING_PERIOD);
+
+    while( volumeLogCurrentReadOffset(VOLUME_SENSORLOG) != volumeLogCurrentWriteOffset(VOLUME_SENSORLOG) ) {
+      sensor_data_len = sizeof(sensor_data_t);
+      mutex_lock(&log_mutex);
+        while( volumeLogRead(VOLUME_SENSORLOG, sending_sensor_data, &sensor_data_len) != SUCCESS );
+      mutex_unlock(&log_mutex);
+      
+      while( amRadioSend(AM_BROADCAST_ADDR, &send_msg, sizeof(sensor_data_t), AM_SENSOR_DATA_MSG) != SUCCESS );
+      led1Toggle();
+    }
+    led2Toggle();
+  }
+}
diff --git a/apps/tosthreads/capps/SenseStoreAndForward/volumes-at45db.xml b/apps/tosthreads/capps/SenseStoreAndForward/volumes-at45db.xml
new file mode 100644
index 00000000..635db4ee
--- /dev/null
+++ b/apps/tosthreads/capps/SenseStoreAndForward/volumes-at45db.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="SENSORLOG" size="262144" type="log" circular="true"/>
+</volume_table>
diff --git a/apps/tosthreads/capps/SenseStoreAndForward/volumes-stm25p.xml b/apps/tosthreads/capps/SenseStoreAndForward/volumes-stm25p.xml
new file mode 100644
index 00000000..51e665d0
--- /dev/null
+++ b/apps/tosthreads/capps/SenseStoreAndForward/volumes-stm25p.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="SENSORLOG" size="1048576" type="log" circular="true"/>
+</volume_table>
diff --git a/apps/tosthreads/capps/TestCollection/Makefile b/apps/tosthreads/capps/TestCollection/Makefile
new file mode 100644
index 00000000..7e378bf0
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/Makefile
@@ -0,0 +1,21 @@
+TOSTHREAD_MAIN=TestCollection.c
+
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/universal
+
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/lib/net/
+CFLAGS += -I$(TOSDIR)/lib/net/
+
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/lib/net/ctp
+CFLAGS += -I$(TOSDIR)/lib/net/ctp  -I$(TOSDIR)/lib/net/4bitle
+
+ifneq ($(filter telosb tmote tinynode shimmer iris epic clean,$(MAKECMDGOALS)),) 
+  include $(MAKERULES)
+else
+%:
+	@echo "    Sorry, this application only works on platforms with >8kB of RAM (telos, iris, etc.)"
+cthreads:
+	@:
+dynthreads:
+	@:
+endif
+
diff --git a/apps/tosthreads/capps/TestCollection/MultihopOscilloscope.h b/apps/tosthreads/capps/TestCollection/MultihopOscilloscope.h
new file mode 100644
index 00000000..5f040539
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/MultihopOscilloscope.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * @author David Gay
+ * @author Kyle Jamieson
+ */
+
+#ifndef MULTIHOP_OSCILLOSCOPE_H
+#define MULTIHOP_OSCILLOSCOPE_H
+
+enum {
+  /* Number of readings per message. If you increase this, you may have to
+     increase the message_t size. */
+  NREADINGS = 5,
+  /* Default sampling period. */
+  DEFAULT_INTERVAL = 1024,
+  AM_OSCILLOSCOPE = 0x93
+};
+
+typedef nx_struct oscilloscope {
+  nx_uint16_t version; /* Version of the interval. */
+  nx_uint16_t interval; /* Samping period. */
+  nx_uint16_t id; /* Mote id of sending mote. */
+  nx_uint16_t count; /* The readings are samples count * NREADINGS onwards */
+  nx_uint16_t readings[NREADINGS];
+} oscilloscope_t;
+
+#endif
diff --git a/apps/tosthreads/capps/TestCollection/README b/apps/tosthreads/capps/TestCollection/README
new file mode 100644
index 00000000..1eb94411
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/README
@@ -0,0 +1,67 @@
+README for TOSThreads TestCollection
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+TestCollection is a reimplementation of the Multihop Oscilloscope application
+using TOSThreads. It periodically samples a universal software-based SineSensor
+and broadcasts a message every few readings. These readings can be displayed by
+the Java "Oscilloscope" application found in the the TestCollection/java
+subdirectory. The sampling rate starts at 4Hz, but can be changed from the Java
+application.
+
+You can install TestCollection on a mote via the following command:
+  make <platform> cthreads install
+
+Valid platforms are currently: tmote, telosb, mica2, micaz, iris, and epic
+
+At least two motes must be used by this application, with one of them installed
+as a base station.  Base station motes can be created by installing them with
+NODE_ID % 500 == 0.
+  i.e. make <platform> cthreads install.0
+       make <platform> cthreads install.500
+       make <platform> cthreads install.1000
+
+All other nodes can be installed with arbitrary NODE_IDs.
+  make <platform> cthreads install.123
+
+Successful running of this application is verified by all NON-base station motes
+periodically flashing LED0 upon sending a message, and the base station mote,
+flashing LED2 upon successful reception of a message.  Additionally, correct
+operation should be verified by running the java tool described in the following
+section.
+
+Tools:
+
+The Java application displays readings it receives from motes via a
+serial forwarder. To run it, change to the java subdirectory and type:
+
+  make
+  java net.tinyos.sf.SerialForwarder -comm serial@<serial port>:<baud_rate>
+  # e.g., java net.tinyos.sf.SerialForwarder -comm serial@/dev/ttyUSB0:mica2
+  # or java net.tinyos.sf.SerialForwarder -comm serial@COM2:57600
+  ./run
+
+NOTE::  The baud rate 57600 must be used telos based motes, as its configuration
+has been changed to work with this baud rate when compiled for tosthreads. I.e.
+DO NOT just substitute 'telosb' or 'tmote' for <baud_rate> above.  Explicitly
+set it to 57600.
+
+The controls at the bottom of the screen allow you to zoom in or out the X
+axis, change the range of the Y axis, and clear all received data. You can
+change the color used to display a mote by clicking on its color in the
+mote table.
+
+Notes:
+  By default, the Makefile for TestCollection is setup to run CTP as the
+  underlying collection protocol.  The makefile can be modified to work with
+  MultihopLQI by changing the appropriate include directories.
+
+  The baud rate 57600 must be used telos based motes, as its configuration
+  has been changed to work with this baud rate when compiled for tosthreads. I.e.
+  DO NOT just substitute 'telosb' or 'tmote' for <baud_rate> above.  Explicitly
+  set it to 57600.
+
+Known bugs/limitations:
+  None
diff --git a/apps/tosthreads/capps/TestCollection/TestCollection.c b/apps/tosthreads/capps/TestCollection/TestCollection.c
new file mode 100644
index 00000000..bc2ddceb
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/TestCollection.c
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * TestCollection is a reimplementation of the Multihop Oscilloscope application
+ * using TOSThreads. It periodically samples a universal software-based SineSensor
+ * and broadcasts a message every few readings. These readings can be displayed by
+ * the Java "Oscilloscope" application found in the the TestCollection/java
+ * subdirectory. The sampling rate starts at 4Hz, but can be changed from the Java
+ * application.
+ * 
+ * At least two motes must be used by this application, with one of them installed
+ * as a base station.  Base station motes can be created by installing them with
+ * NODE_ID % 500 == 0.
+ *   i.e. make <platform> cthreads install.0
+ *        make <platform> cthreads install.500
+ *        make <platform> cthreads install.1000
+ * 
+ * All other nodes can be installed with arbitrary NODE_IDs.
+ *   make <platform> cthreads install.123
+ * 
+ * Successful running of this application is verified by all NON-base station motes
+ * periodically flashing LED1 upon sending a message, and the base station mote,
+ * flashing LED2 upon successful reception of a message.  Additionally, correct
+ * operation should be verified by running the java tool described in the following
+ * section.
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "tosthread.h"
+#include "tosthread_amradio.h"
+#include "tosthread_amserial.h"
+#include "tosthread_leds.h"
+#include "tosthread_collection.h"
+#include "tosthread_sinesensor.h"
+#include "MultihopOscilloscope.h"
+
+void fatal_problem();
+void report_problem();
+void report_sent();
+void report_received();
+
+oscilloscope_t local;
+uint8_t reading = 0;   /* 0 to NREADINGS */
+message_t sendbuf;
+message_t recvbuf;
+
+enum {
+  MY_COLLECTION_ID = NEW_COLLECTION_CLIENT_ID(),   // Gets a collection sender instance
+};
+
+void tosthread_main(void* arg)
+{
+  local.interval = DEFAULT_INTERVAL;
+  local.id = TOS_NODE_ID;
+  local.version = 0;
+  
+  while ( amRadioStart() != SUCCESS );
+  while ( collectionRoutingStart() != SUCCESS );
+  
+  collectionSetCollectionId(MY_COLLECTION_ID, AM_OSCILLOSCOPE);   // Associates the collection sender
+                                                                  //  with AM_OSCILLOSCOPE collection ID
+  
+  if (local.id % 500 == 0) {
+    while ( amSerialStart() != SUCCESS );
+    collectionSetRoot();
+    for (;;) {
+      // Waits for incoming packets with AM_OSCILLOSCOPE collection ID
+      if (collectionReceive(&recvbuf, 0, AM_OSCILLOSCOPE) == SUCCESS) {
+        oscilloscope_t *recv_o = (oscilloscope_t *) collectionGetPayload(&recvbuf, sizeof(oscilloscope_t));
+        oscilloscope_t *send_o = (oscilloscope_t *) serialGetPayload(&sendbuf, sizeof(oscilloscope_t));
+        memcpy(send_o, recv_o, sizeof(oscilloscope_t));
+        amSerialSend(AM_BROADCAST_ADDR, &sendbuf, sizeof(local), AM_OSCILLOSCOPE);
+        report_received();
+      }
+    }
+  } else {
+    uint16_t var;
+
+    for (;;) {
+      if (reading == NREADINGS) {
+        oscilloscope_t *o = (oscilloscope_t *) collectionGetPayload(&sendbuf, sizeof(oscilloscope_t));
+        if (o == NULL) {
+          fatal_problem();
+          return;
+        }
+        memcpy(o, &local, sizeof(local));
+        if (collectionSend(&sendbuf, sizeof(local), MY_COLLECTION_ID) == SUCCESS) {
+          local.count++;
+          report_sent();
+        } else {
+          report_problem();
+        }
+        
+        reading = 0;
+      }
+        
+      if (sinesensor_read(&var) == SUCCESS) {
+        local.readings[reading++] = var;
+      }
+      
+      tosthread_sleep(local.interval);
+    }
+  }
+}
+  
+// Use LEDs to report various status issues.
+void fatal_problem()
+{
+  led0On(); 
+  led1On();
+  led2On();
+}
+
+void report_problem() { led0Toggle(); }
+void report_sent() { led1Toggle(); }
+void report_received() { led2Toggle(); }
diff --git a/apps/tosthreads/capps/TestCollection/java/ColorCellEditor.java b/apps/tosthreads/capps/TestCollection/java/ColorCellEditor.java
new file mode 100644
index 00000000..f88b0b6f
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/java/ColorCellEditor.java
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import javax.swing.table.*;
+import java.awt.*;
+import java.awt.event.*;
+
+/* Editor for table cells representing colors. Popup a color chooser. */
+public class ColorCellEditor extends AbstractCellEditor
+    implements TableCellEditor {
+    private Color color;
+    private JButton button;
+
+    public ColorCellEditor(String title) {
+	button = new JButton();
+	final JColorChooser chooser = new JColorChooser();
+	final JDialog dialog = JColorChooser.createDialog
+	    (button, title, true, chooser,
+	     new ActionListener() {
+		 public void actionPerformed(ActionEvent e) {
+		     color = chooser.getColor();
+		 } },
+	     null);
+
+	button.setBorderPainted(false);
+	button.addActionListener
+	    (new ActionListener () {
+		    public void actionPerformed(ActionEvent e) {
+			button.setBackground(color);
+			chooser.setColor(color);
+			dialog.setVisible(true);
+			fireEditingStopped();
+		    } } );
+	
+    }
+
+    public Object getCellEditorValue() { return color; }
+    public Component getTableCellEditorComponent(JTable table,
+                                                 Object value,
+                                                 boolean isSelected,
+                                                 int row,
+                                                 int column) {
+        color = (Color)value;
+        return button;
+    }
+}
+
diff --git a/apps/tosthreads/capps/TestCollection/java/Data.java b/apps/tosthreads/capps/TestCollection/java/Data.java
new file mode 100644
index 00000000..ac35aa72
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/java/Data.java
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import java.util.*;
+
+/* Hold all data received from motes */
+class Data {
+    /* The mote data is stored in a flat array indexed by a mote's identifier.
+       A null value indicates no mote with that identifier. */
+    private Node[] nodes = new Node[256];
+    private Oscilloscope parent;
+
+    Data(Oscilloscope parent) {
+	this.parent = parent;
+    }
+
+    /* Data received from mote nodeId containing NREADINGS samples from
+       messageId * NREADINGS onwards. Tell parent if this is a new node. */
+    void update(int nodeId, int messageId, int readings[]) {
+	if (nodeId >= nodes.length) {
+	    int newLength = nodes.length * 2;
+	    if (nodeId >= newLength)
+		newLength = nodeId + 1;
+
+	    Node newNodes[] = new Node[newLength];
+	    System.arraycopy(nodes, 0, newNodes, 0, nodes.length);
+	    nodes = newNodes;
+	}
+	Node node = nodes[nodeId];
+	if (node == null) {
+	    nodes[nodeId] = node = new Node(nodeId);
+	    parent.newNode(nodeId);
+	}
+	node.update(messageId, readings);
+    }
+
+    /* Return value of sample x for mote nodeId, or -1 for missing data */
+    int getData(int nodeId, int x) {
+	if (nodeId >= nodes.length || nodes[nodeId] == null)
+	    return -1;
+	return nodes[nodeId].getData(x);
+    }
+
+    /* Return number of last known sample on mote nodeId. Returns 0 for
+       unknown motes. */
+    int maxX(int nodeId) {
+	if (nodeId >= nodes.length || nodes[nodeId] == null)
+	    return 0;
+	return nodes[nodeId].maxX();
+    }
+
+    /* Return number of largest known sample on all motes (0 if there are no
+       motes) */
+    int maxX() {
+	int max = 0;
+
+	for (int i = 0; i < nodes.length; i++)
+	    if (nodes[i] != null) {
+		int nmax = nodes[i].maxX();
+
+		if (nmax > max)
+		    max = nmax;
+	    }
+
+	return max;
+    }
+}
diff --git a/apps/tosthreads/capps/TestCollection/java/Graph.java b/apps/tosthreads/capps/TestCollection/java/Graph.java
new file mode 100644
index 00000000..9a42c1c8
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/java/Graph.java
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.awt.font.*;
+import java.awt.geom.*;
+import java.util.*;
+
+/* Panel for drawing mote-data graphs */
+class Graph extends JPanel
+{
+    final static int BORDER_LEFT = 40;
+    final static int BORDER_RIGHT = 0;
+    final static int BORDER_TOP = 10;
+    final static int BORDER_BOTTOM = 10;
+
+    final static int TICK_SPACING = 40;
+    final static int MAX_TICKS = 16;
+    final static int TICK_WIDTH = 10;
+
+    final static int MIN_WIDTH = 50;
+
+    int gx0, gx1, gy0, gy1; // graph bounds
+    int scale = 2; // gx1 - gx0 == MIN_WIDTH << scale
+    Window parent;
+
+    /* Graph to screen coordinate conversion support */
+    int height, width;
+    double xscale, yscale;
+
+    void updateConversion() {
+	height = getHeight() - BORDER_TOP - BORDER_BOTTOM;
+	width = getWidth() - BORDER_LEFT - BORDER_RIGHT;
+	if (height < 1) 
+	    height = 1;
+	if (width < 1)
+	    width = 1;
+	xscale = (double)width / (gx1 - gx0 + 1);
+	yscale = (double)height / (gy1 - gy0 + 1);
+    }
+
+    Graphics makeClip(Graphics g) {
+	return g.create(BORDER_LEFT, BORDER_TOP, width, height);
+    }
+
+    // Note that these do not include the border offset!
+    int screenX(int gx) {
+	return (int)(xscale * (gx - gx0) + 0.5);
+    }
+
+    int screenY(int gy) {
+	return (int)(height - yscale * (gy - gy0));
+    }
+
+    int graphX(int sx) {
+	return (int)(sx / xscale + gx0 + 0.5);
+    }
+
+    Graph(Window parent) {
+	this.parent = parent;
+	gy0 = 0; gy1 = 0xffff;
+	gx0 = 0; gx1 = MIN_WIDTH << scale;
+    }
+
+    void rightDrawString(Graphics2D g, String s, int x, int y) {
+	TextLayout layout =
+	    new TextLayout(s, parent.smallFont, g.getFontRenderContext());
+	Rectangle2D bounds = layout.getBounds();
+	layout.draw(g, x - (float)bounds.getWidth(), y + (float)bounds.getHeight() / 2);
+    }
+
+    protected void paintComponent(Graphics g) {
+	Graphics2D g2d = (Graphics2D)g;
+
+	/* Repaint. Synchronize on Oscilloscope to avoid data changing.
+	   Simply clear panel, draw Y axis and all the mote graphs. */
+	synchronized (parent.parent) {
+	    updateConversion();
+	    g2d.setColor(Color.BLACK);
+	    g2d.fillRect(0, 0, getWidth(), getHeight());
+	    drawYAxis(g2d);
+
+	    Graphics clipped = makeClip(g2d);
+	    int count = parent.moteListModel.size();
+	    for (int i = 0; i < count; i++) {
+		clipped.setColor(parent.moteListModel.getColor(i));
+		drawGraph(clipped, parent.moteListModel.get(i));
+	    }
+	}
+    }
+
+    /* Draw the Y-axis */
+    protected void drawYAxis(Graphics2D g) {
+	int axis_x = BORDER_LEFT - 1;
+	int height = getHeight() - BORDER_BOTTOM - BORDER_TOP;
+
+	g.setColor(Color.WHITE);
+	g.drawLine(axis_x, BORDER_TOP, axis_x, BORDER_TOP + height - 1);
+
+	/* Draw a reasonable set of tick marks */
+	int nTicks = height / TICK_SPACING;
+	if (nTicks > MAX_TICKS)
+	    nTicks = MAX_TICKS;
+
+	int tickInterval = (gy1 - gy0 + 1) / nTicks;
+	if (tickInterval == 0)
+	    tickInterval = 1;
+
+	/* Tick interval should be of the family A * 10^B,
+	   where A = 1, 2 * or 5. We tend more to rounding A up, to reduce
+	   rather than increase the number of ticks. */
+	int B = (int)(Math.log(tickInterval) / Math.log(10));
+	int A = (int)(tickInterval / Math.pow(10, B) + 0.5);
+	if (A > 2) A = 5;
+	else if (A > 5) A = 10;
+
+	tickInterval = A * (int)Math.pow(10, B);
+
+	/* Ticks are printed at multiples of tickInterval */
+	int tick = ((gy0 + tickInterval - 1) / tickInterval) * tickInterval;
+	while (tick <= gy1) {
+	    int stick = screenY(tick) + BORDER_TOP;
+	    rightDrawString(g, "" + tick, axis_x - TICK_WIDTH / 2 - 2, stick);
+	    g.drawLine(axis_x - TICK_WIDTH / 2, stick,
+		       axis_x - TICK_WIDTH / 2 + TICK_WIDTH, stick);
+	    tick += tickInterval;
+	}
+	
+    }
+
+    /* Draw graph for mote nodeId */
+    protected void drawGraph(Graphics g, int nodeId) {
+	SingleGraph sg = new SingleGraph(g, nodeId);
+
+	if (gx1 - gx0 >= width) // More points than pixels-iterate by pixel
+	    for (int sx = 0; sx < width; sx++)
+		sg.nextPoint(g, graphX(sx), sx);
+	else // Less points than pixel-iterate by points
+	    for (int gx = gx0; gx <= gx1; gx++)
+		sg.nextPoint(g, gx, screenX(gx));
+    }
+
+    /* Inner class to simplify drawing a graph. Simplify initialise it, then
+       feed it the X screen and graph coordinates, from left to right. */
+    private class SingleGraph {
+	int lastsx, lastsy, nodeId;
+
+	/* Start drawing the graph mote id */
+	SingleGraph(Graphics g, int id) {
+	    nodeId = id;
+	    lastsx = -1;
+	    lastsy = -1;
+	}
+
+	/* Next point in mote's graph is at x value gx, screen coordinate sx */
+	void nextPoint(Graphics g, int gx, int sx) {
+	    int gy = parent.parent.data.getData(nodeId, gx);
+	    int sy = -1;
+
+	    if (gy >= 0) { // Ignore missing values
+		double rsy = height - yscale * (gy - gy0);
+
+		// Ignore problem values
+		if (rsy >= -1e6 && rsy <= 1e6)
+		    sy = (int)(rsy + 0.5);
+
+		if (lastsy >= 0 && sy >= 0)
+		    g.drawLine(lastsx, lastsy, sx, sy);
+	    }
+	    lastsx = sx;
+	    lastsy = sy;
+	}
+    }
+
+    /* Update X-axis range in GUI */
+    void updateXLabel() {
+	parent.xLabel.setText("X: " + gx0 + " - " + gx1);
+    }
+
+    /* Ensure that graph is nicely positioned on screen. max is the largest 
+       sample number received from any mote. */
+    private void recenter(int max) {
+	// New data will show up at the 3/4 point
+	// The 2nd term ensures that gx1 will be >= max
+	int scrollby = ((gx1 - gx0) >> 2) + (max - gx1);
+	gx0 += scrollby;
+	gx1 += scrollby;
+	if (gx0 < 0) { // don't bother showing negative sample numbers
+	    gx1 -= gx0;
+	    gx0 = 0;
+	}
+	updateXLabel();
+    }
+
+    /* New data received. Redraw graph, scrolling if necessary */
+    void newData() {
+	int max = parent.parent.data.maxX();
+
+	if (max > gx1 || max < gx0) // time to scroll
+	    recenter(max);
+	repaint();
+    }
+
+    /* User set the X-axis scale to newScale */
+    void setScale(int newScale) {
+	gx1 = gx0 + (MIN_WIDTH << newScale);
+	scale = newScale;
+	recenter(parent.parent.data.maxX());
+	repaint();
+    }
+
+    /* User attempted to set Y-axis range to newy0..newy1. Refuse bogus
+       values (return false), or accept, redraw and return true. */
+    boolean setYAxis(int newy0, int newy1) {
+	if (newy0 >= newy1 || newy0 < 0 || newy0 > 65535 ||
+	    newy1 < 0 || newy1 > 65535)
+	    return false;
+	gy0 = newy0;
+	gy1 = newy1;
+	repaint();
+	return true;
+    }
+}
diff --git a/apps/tosthreads/capps/TestCollection/java/Makefile b/apps/tosthreads/capps/TestCollection/java/Makefile
new file mode 100644
index 00000000..55c2605b
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/java/Makefile
@@ -0,0 +1,21 @@
+GEN=OscilloscopeMsg.java Constants.java
+
+all: oscilloscope.jar
+
+oscilloscope.jar: Oscilloscope.class
+	jar cf $@ *.class
+
+OscilloscopeMsg.java: ../MultihopOscilloscope.h
+	mig -target=null -java-classname=OscilloscopeMsg java ../MultihopOscilloscope.h oscilloscope -o $@
+
+Constants.java: ../MultihopOscilloscope.h
+	ncg -target=null -java-classname=Constants java ../MultihopOscilloscope.h NREADINGS DEFAULT_INTERVAL -o $@
+
+Oscilloscope.class: $(wildcard *.java) $(GEN)
+	javac *.java
+
+clean:
+	rm -f *.class $(GEN)
+
+veryclean: clean
+	rm oscilloscope.jar
diff --git a/apps/tosthreads/capps/TestCollection/java/Node.java b/apps/tosthreads/capps/TestCollection/java/Node.java
new file mode 100644
index 00000000..cfe8db9e
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/java/Node.java
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Class holding all data received from a mote.
+ */
+class Node {
+    /* Data is hold in an array whose size is a multiple of INCREMENT, and
+       INCREMENT itself must be a multiple of Constant.NREADINGS. This
+       simplifies handling the extension and clipping of old data
+       (see setEnd) */
+    final static int INCREMENT = 100 * Constants.NREADINGS;
+    final static int MAX_SIZE = 100 * INCREMENT; // Must be multiple of INCREMENT
+
+    /* The mote's identifier */
+    int id;
+
+    /* Data received from the mote. data[0] is the dataStart'th sample
+       Indexes 0 through dataEnd - dataStart - 1 hold data.
+       Samples are 16-bit unsigned numbers, -1 indicates missing data. */
+    int[] data;
+    int dataStart, dataEnd;
+
+    Node(int _id) {
+	id = _id;
+    }
+
+    /* Update data to hold received samples newDataIndex .. newEnd.
+       If we receive data with a lower index, we discard newer data
+       (we assume the mote rebooted). */
+    private void setEnd(int newDataIndex, int newEnd) {
+	if (newDataIndex < dataStart || data == null) {
+	    /* New data is before the start of what we have. Just throw it
+	       all away and start again */
+	    dataStart = newDataIndex;
+	    data = new int[INCREMENT];
+	}
+	if (newEnd > dataStart + data.length) {
+	    /* Try extending first */
+	    if (data.length < MAX_SIZE) {
+		int newLength = (newEnd - dataStart + INCREMENT - 1) / INCREMENT * INCREMENT;
+		if (newLength >= MAX_SIZE)
+		    newLength = MAX_SIZE;
+
+		int[] newData = new int[newLength];
+		System.arraycopy(data, 0, newData, 0, data.length);
+		data = newData;
+
+	    }
+	    if (newEnd > dataStart + data.length) {
+		/* Still doesn't fit. Squish.
+		   We assume INCREMENT >= (newEnd - newDataIndex), and ensure
+		   that dataStart + data.length - INCREMENT = newDataIndex */
+		int newStart = newDataIndex + INCREMENT - data.length;
+
+		if (dataStart + data.length > newStart)
+		    System.arraycopy(data, newStart - dataStart, data, 0,
+				     data.length - (newStart - dataStart));
+		dataStart = newStart;
+	    }
+	}
+	/* Mark any missing data as invalid */
+	for (int i = dataEnd < dataStart ? dataStart : dataEnd;
+	     i < newDataIndex; i++)
+	    data[i - dataStart] = -1;
+
+	/* If we receive a count less than the old count, we assume the old
+	   data is invalid */
+	dataEnd = newEnd;
+
+    }
+
+    /* Data received containing NREADINGS samples from messageId * NREADINGS 
+       onwards */
+    void update(int messageId, int readings[]) {
+	int start = messageId * Constants.NREADINGS;
+	setEnd(start, start + Constants.NREADINGS);
+	for (int i = 0; i < readings.length; i++)
+	    data[start - dataStart + i] = readings[i];
+    }
+
+    /* Return value of sample x, or -1 for missing data */
+    int getData(int x) {
+	if (x < dataStart || x >= dataEnd)
+	    return -1;
+	else
+	    return data[x - dataStart];
+    }
+
+    /* Return number of last known sample */
+    int maxX() {
+	return dataEnd - 1;
+    }
+}
diff --git a/apps/tosthreads/capps/TestCollection/java/Oscilloscope.java b/apps/tosthreads/capps/TestCollection/java/Oscilloscope.java
new file mode 100644
index 00000000..3db3741f
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/java/Oscilloscope.java
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import net.tinyos.message.*;
+import net.tinyos.util.*;
+import java.io.*;
+
+/* The "Oscilloscope" demo app. Displays graphs showing data received from
+   the Oscilloscope mote application, and allows the user to:
+   - zoom in or out on the X axis
+   - set the scale on the Y axis
+   - change the sampling period
+   - change the color of each mote's graph
+   - clear all data
+
+   This application is in three parts:
+   - the Node and Data objects store data received from the motes and support
+     simple queries
+   - the Window and Graph and miscellaneous support objects implement the
+     GUI and graph drawing
+   - the Oscilloscope object talks to the motes and coordinates the other
+     objects
+
+   Synchronization is handled through the Oscilloscope object. Any operation
+   that reads or writes the mote data must be synchronized on Oscilloscope.
+   Note that the messageReceived method below is synchronized, so no further
+   synchronization is needed when updating state based on received messages.
+*/
+public class Oscilloscope implements MessageListener
+{
+    MoteIF mote;
+    Data data;
+    Window window;
+
+    /* The current sampling period. If we receive a message from a mote
+       with a newer version, we update our interval. If we receive a message
+       with an older version, we broadcast a message with the current interval
+       and version. If the user changes the interval, we increment the
+       version and broadcast the new interval and version. */
+    int interval = Constants.DEFAULT_INTERVAL;
+    int version = -1;
+
+    /* Main entry point */
+    void run() {
+	data = new Data(this);
+	window = new Window(this);
+	window.setup();
+	mote = new MoteIF(PrintStreamMessenger.err);
+	mote.registerListener(new OscilloscopeMsg(), this);
+    }
+
+    /* The data object has informed us that nodeId is a previously unknown
+       mote. Update the GUI. */
+    void newNode(int nodeId) {
+	window.newNode(nodeId);
+    }
+
+    synchronized public void messageReceived(int dest_addr, Message msg) {
+	if (msg instanceof OscilloscopeMsg) {
+	    OscilloscopeMsg omsg = (OscilloscopeMsg)msg;
+
+	    /* Update interval and mote data */
+	    periodUpdate(omsg.get_version(), omsg.get_interval());
+	    data.update(omsg.get_id(), omsg.get_count(), omsg.get_readings());
+
+	    /* Inform the GUI that new data showed up */
+	    window.newData();
+	}
+    }
+
+    /* A potentially new version and interval has been received from the
+       mote */
+    void periodUpdate(int moteVersion, int moteInterval) {
+	if (moteVersion > version) {
+	    /* It's new. Update our vision of the interval. */
+	    version = moteVersion;
+	    interval = moteInterval;
+	    window.updateSamplePeriod();
+	}
+	else if (moteVersion < version) {
+	    /* It's old. Update the mote's vision of the interval. */
+	    sendInterval();
+	}
+    }
+
+    /* The user wants to set the interval to newPeriod. Refuse bogus values
+       and return false, or accept the change, broadcast it, and return
+       true */
+    synchronized boolean setInterval(int newPeriod) {
+	if (newPeriod < 1 || newPeriod > 65535)
+	    return false;
+	interval = newPeriod;
+	version++;
+	sendInterval();
+	return true;
+    }
+
+    /* Broadcast a version+interval message. */
+    void sendInterval() {
+	OscilloscopeMsg omsg = new OscilloscopeMsg();
+
+	omsg.set_version(version);
+	omsg.set_interval(interval);
+	try {
+	    mote.send(MoteIF.TOS_BCAST_ADDR, omsg);
+	}
+	catch (IOException e) {
+	    window.error("Cannot send message to mote");
+	}
+    }
+
+    /* User wants to clear all data. */
+    void clear() {
+	data = new Data(this);
+    }
+
+    public static void main(String[] args) {
+	Oscilloscope me = new Oscilloscope();
+	me.run();
+    }
+}
diff --git a/apps/tosthreads/capps/TestCollection/java/Window.java b/apps/tosthreads/capps/TestCollection/java/Window.java
new file mode 100644
index 00000000..d7979bf9
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/java/Window.java
@@ -0,0 +1,294 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import javax.swing.*;
+import javax.swing.table.*;
+import javax.swing.event.*;
+import java.awt.*;
+import java.awt.event.*;
+import java.util.*;
+
+/* The main GUI object. Build the GUI and coordinate all user activities */
+class Window
+{
+    Oscilloscope parent;
+    Graph graph;
+
+    Font smallFont = new Font("Dialog", Font.PLAIN, 8);
+    Font boldFont = new Font("Dialog", Font.BOLD, 12);
+    Font normalFont = new Font("Dialog", Font.PLAIN, 12);
+    MoteTableModel moteListModel; // GUI view of mote list
+    JLabel xLabel; // Label displaying X axis range
+    JTextField sampleText, yText; // inputs for sample period and Y axis range
+    JFrame frame;
+
+    Window(Oscilloscope parent) {
+	this.parent = parent;
+    }
+
+    /* A model for the mote table, and general utility operations on the mote
+       list */
+    class MoteTableModel extends AbstractTableModel {
+	private ArrayList motes = new ArrayList();
+	private ArrayList colors = new ArrayList();
+
+	/* Initial mote colors cycle through this list. Add more colors if
+	   you want. */
+	private Color[] cycle = {
+	    Color.RED, Color.WHITE, Color.GREEN, Color.MAGENTA,
+	    Color.YELLOW, Color.GRAY, Color.YELLOW
+	};
+	int cycleIndex;
+
+	/* TableModel methods for achieving our table appearance */
+	public String getColumnName(int col) {
+	    if (col == 0)
+		return "Mote";
+	    else
+		return "Color";
+	}
+	public int getColumnCount() { return 2; }
+	public synchronized int getRowCount() { return motes.size(); }
+	public synchronized Object getValueAt(int row, int col) {
+	    if (col == 0)
+		return motes.get(row);
+	    else
+		return colors.get(row);
+	}
+        public Class getColumnClass(int col) {
+            return getValueAt(0, col).getClass();
+        }
+	public boolean isCellEditable(int row, int col) { return col == 1; }
+        public synchronized void setValueAt(Object value, int row, int col) {
+	    colors.set(row, value);
+            fireTableCellUpdated(row, col);
+	    graph.repaint();
+        }
+
+	/* Return mote id of i'th mote */
+	int get(int i) { return ((Integer)motes.get(i)).intValue(); }
+	
+	/* Return color of i'th mote */
+	Color getColor(int i)  { return (Color)colors.get(i); }
+
+	/* Return number of motes */
+	int size() { return motes.size(); }
+
+	/* Add a new mote */
+	synchronized void newNode(int nodeId) {
+	    /* Shock, horror. No binary search. */
+	    int i, len = motes.size();
+
+	    for (i = 0; ; i++)
+		if (i == len || nodeId < get(i)) {
+		    motes.add(i, new Integer(nodeId));
+		    // Cycle through a set of initial colors
+		    colors.add(i, cycle[cycleIndex++ % cycle.length]);
+		    break;
+		}
+	    fireTableRowsInserted(i, i);
+	}
+
+	/* Remove all motes */
+	void clear() {
+	    motes = new ArrayList();
+	    colors = new ArrayList();
+	    fireTableDataChanged();
+	}
+    }
+
+    /* A simple full-color cell */
+    static class MoteColor extends JLabel implements TableCellRenderer {
+	public MoteColor() { setOpaque(true); }
+	public Component getTableCellRendererComponent
+	    (JTable table, Object color,
+	     boolean isSelected, boolean hasFocus, int row, int column) {
+	    setBackground((Color)color);
+	    return this;
+	}
+    }
+
+    /* Convenience methods for making buttons, labels and textfields.
+       Simplifies code and ensures a consistent style. */
+
+    JButton makeButton(String label, ActionListener action) {
+	JButton button = new JButton();
+        button.setText(label);
+        button.setFont(boldFont);
+	button.addActionListener(action);
+	return button;
+    }
+
+    JLabel makeLabel(String txt, int alignment) {
+	JLabel label = new JLabel(txt, alignment);
+	label.setFont(boldFont);
+	return label;
+    }
+
+    JLabel makeSmallLabel(String txt, int alignment) {
+	JLabel label = new JLabel(txt, alignment);
+	label.setFont(smallFont);
+	return label;
+    }
+
+    JTextField makeTextField(int columns, ActionListener action) {
+	JTextField tf = new JTextField(columns);
+	tf.setFont(normalFont);
+	tf.setMaximumSize(tf.getPreferredSize());
+	tf.addActionListener(action);
+	return tf;
+    }
+
+    /* Build the GUI */
+    void setup() {
+	JPanel main = new JPanel(new BorderLayout());
+
+	main.setMinimumSize(new Dimension(500, 250));
+	main.setPreferredSize(new Dimension(800, 400));
+
+	// Three panels: mote list, graph, controls
+	moteListModel = new  MoteTableModel();
+	JTable moteList = new JTable(moteListModel);
+	moteList.setDefaultRenderer(Color.class, new MoteColor());
+	moteList.setDefaultEditor(Color.class, new ColorCellEditor("Pick Mote Color"));
+	moteList.setPreferredScrollableViewportSize(new Dimension(100, 400));
+	JScrollPane motePanel = new JScrollPane();
+	motePanel.getViewport().add(moteList, null);
+	main.add(motePanel, BorderLayout.WEST);
+
+	graph = new Graph(this);
+	main.add(graph, BorderLayout.CENTER);
+
+	// Controls. Organised using box layouts.
+
+	// Sample period.
+	JLabel sampleLabel = makeLabel("Sample period (ms):", JLabel.RIGHT);
+	sampleText = makeTextField(6, new ActionListener() {
+		public void actionPerformed(ActionEvent e) { setSamplePeriod(); }
+	    } );
+	updateSamplePeriod();
+
+	// Clear data.
+	JButton clearButton = makeButton("Clear data", new ActionListener() {
+		public void actionPerformed(ActionEvent e) { clearData(); }
+	    } );
+
+	// Adjust X-axis zoom.
+	Box xControl = new Box(BoxLayout.Y_AXIS);
+	xLabel = makeLabel("", JLabel.CENTER);
+	final JSlider xSlider = new JSlider(JSlider.HORIZONTAL, 0, 8, graph.scale);
+	Hashtable xTable = new Hashtable();
+	for (int i = 0; i <= 8; i += 2)
+	    xTable.put(new Integer(i),
+		       makeSmallLabel("" + (Graph.MIN_WIDTH << i),
+				      JLabel.CENTER));
+	xSlider.setLabelTable(xTable);
+	xSlider.setPaintLabels(true);
+	graph.updateXLabel();
+	graph.setScale(graph.scale);
+	xSlider.addChangeListener(new ChangeListener() {
+		public void stateChanged(ChangeEvent e) {
+		    //if (!xSlider.getValueIsAdjusting())
+			graph.setScale((int)xSlider.getValue());
+		}
+	    });
+	xControl.add(xLabel);
+	xControl.add(xSlider);
+
+	// Adjust Y-axis range.
+	JLabel yLabel = makeLabel("Y:", JLabel.RIGHT);
+	yText = makeTextField(12, new ActionListener() {
+		public void actionPerformed(ActionEvent e) { setYAxis(); }
+	    } );
+	yText.setText(graph.gy0 + " - " + graph.gy1);
+
+	Box controls = new Box(BoxLayout.X_AXIS);
+	controls.add(clearButton);
+	controls.add(Box.createHorizontalGlue());
+	controls.add(Box.createRigidArea(new Dimension(20, 0)));
+	controls.add(sampleLabel);
+	controls.add(sampleText);
+	controls.add(Box.createHorizontalGlue());
+	controls.add(Box.createRigidArea(new Dimension(20, 0)));
+	controls.add(xControl);
+	controls.add(yLabel);
+	controls.add(yText);
+	main.add(controls, BorderLayout.SOUTH);
+
+	// The frame part
+	frame = new JFrame("Oscilloscope");
+	frame.setSize(main.getPreferredSize());
+	frame.getContentPane().add(main);
+	frame.setVisible(true);
+	frame.addWindowListener(new WindowAdapter() {
+		public void windowClosing(WindowEvent e) { System.exit(0); }
+	    });
+    }
+
+    /* User operation: clear data */
+    void clearData() {
+	synchronized (parent) {
+	    moteListModel.clear();
+	    parent.clear();
+	    graph.newData();
+	}
+    }
+
+    /* User operation: set Y-axis range. */
+    void setYAxis() {
+	String val = yText.getText();
+
+	try {
+	    int dash = val.indexOf('-');
+	    if (dash >= 0) {
+		String min = val.substring(0, dash).trim();
+		String max = val.substring(dash + 1).trim();
+
+		if (!graph.setYAxis(Integer.parseInt(min), Integer.parseInt(max)))
+		    error("Invalid range " + min + " - " + max + " (expected values between 0 and 65535)");
+		return;
+	    }
+	}
+	catch (NumberFormatException e) { }
+	error("Invalid range " + val + " (expected NN-MM)");
+    }
+
+    /* User operation: set sample period. */
+    void setSamplePeriod() {
+	String periodS = sampleText.getText().trim();
+	try {
+	    int newPeriod = Integer.parseInt(periodS);
+	    if (parent.setInterval(newPeriod))
+		return;
+	}
+	catch (NumberFormatException e) { }
+	error("Invalid sample period " + periodS);
+    }
+
+    /* Notification: sample period changed. */
+    void updateSamplePeriod() {
+	sampleText.setText("" + parent.interval);
+    }
+
+    /* Notification: new node. */
+    void newNode(int nodeId) {
+	moteListModel.newNode(nodeId);
+    }
+
+    /* Notification: new data. */
+    void newData() {
+	graph.newData();
+    }
+
+    void error(String msg) {
+	JOptionPane.showMessageDialog(frame, msg, "Error",
+				      JOptionPane.ERROR_MESSAGE);
+    }
+}
diff --git a/apps/tosthreads/capps/TestCollection/java/build.xml b/apps/tosthreads/capps/TestCollection/java/build.xml
new file mode 100644
index 00000000..e8fa088b
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/java/build.xml
@@ -0,0 +1,19 @@
+<project name="tinyos-2.x app multihoposcilloscope" default="all">
+
+	<target name="all" >
+		<exec executable="make" failonerror="true">
+			<arg line="all" />
+		</exec>
+	</target>
+
+	<target name="java" depends="all">
+	</target>
+
+	<target name="javadoc" >
+		<echo message = "Building javadoc" />
+		<exec executable="make" failonerror="true">
+			<arg line="javadoc" />
+		</exec>
+	</target>
+	
+</project>
diff --git a/apps/tosthreads/capps/TestCollection/java/oscilloscope.jar b/apps/tosthreads/capps/TestCollection/java/oscilloscope.jar
new file mode 100644
index 00000000..acf8fe3a
Binary files /dev/null and b/apps/tosthreads/capps/TestCollection/java/oscilloscope.jar differ
diff --git a/apps/tosthreads/capps/TestCollection/java/run b/apps/tosthreads/capps/TestCollection/java/run
new file mode 100755
index 00000000..5b5df76f
--- /dev/null
+++ b/apps/tosthreads/capps/TestCollection/java/run
@@ -0,0 +1,7 @@
+#!/bin/sh
+if cygpath -w / >/dev/null 2>/dev/null; then
+  CLASSPATH="oscilloscope.jar;$CLASSPATH"
+else
+  CLASSPATH="oscilloscope.jar:$CLASSPATH"
+fi
+java Oscilloscope
diff --git a/apps/tosthreads/capps/TestJoin/Makefile b/apps/tosthreads/capps/TestJoin/Makefile
new file mode 100644
index 00000000..37ac73cf
--- /dev/null
+++ b/apps/tosthreads/capps/TestJoin/Makefile
@@ -0,0 +1,3 @@
+TOSTHREAD_MAIN=TestJoin.c
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/capps/TestJoin/README b/apps/tosthreads/capps/TestJoin/README
new file mode 100644
index 00000000..35eba606
--- /dev/null
+++ b/apps/tosthreads/capps/TestJoin/README
@@ -0,0 +1,32 @@
+README for TOSThreads TestJoin
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+TestJoin is a simple application used to test the basic functionality of
+the join() system call for waiting on a set of threads in a TOSThreads 
+based application.
+
+You can install TestJoin on a mote via the following command:
+  make <platform> threads install
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+Upon a successful burn, you should see all LEDs toggle in the following pattern,
+repeating every 8 seconds:
+
+0s: (110) LED0  ON, LED1  ON, LED2 OFF
+1s: (000) LED0 OFF, LED1 OFF, LED2 OFF
+2s: (010) LED0 OFF, LED1  ON, LED2 OFF
+3s: (000) LED0 OFF, LED1 OFF, LED2 OFF
+4s: (111) LED0  ON, LED1  ON, LED2  ON
+5s: (001) LED0 OFF, LED1 OFF, LED2  ON
+6s: (011) LED0 OFF, LED1  ON, LED2  ON
+7s: (001) LED0 OFF, LED1 OFF, LED2  ON
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/capps/TestJoin/TestJoin.c b/apps/tosthreads/capps/TestJoin/TestJoin.c
new file mode 100644
index 00000000..3ff35b57
--- /dev/null
+++ b/apps/tosthreads/capps/TestJoin/TestJoin.c
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * TestJoin is a simple application used to test the basic functionality of
+ * the join() system call for waiting on a set of threads in a TOSThreads 
+ * based application.
+ * 
+ * Upon a successful burn, you should see all LEDs toggle in the following pattern,
+ * repeating every 8 seconds:
+ * 
+ * 0s: (110) LED0  ON, LED1  ON, LED2 OFF  <br>
+ * 1s: (000) LED0 OFF, LED1 OFF, LED2 OFF  <br>
+ * 2s: (010) LED0 OFF, LED1  ON, LED2 OFF  <br>
+ * 3s: (000) LED0 OFF, LED1 OFF, LED2 OFF  <br>
+ * 4s: (111) LED0  ON, LED1  ON, LED2  ON  <br>
+ * 5s: (001) LED0 OFF, LED1 OFF, LED2  ON  <br>
+ * 6s: (011) LED0 OFF, LED1  ON, LED2  ON  <br>
+ * 7s: (001) LED0 OFF, LED1 OFF, LED2  ON  <br>
+ *
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "stack.h"
+#include "tosthread.h"
+#include "tosthread_leds.h"
+
+//Initialize variables associated with each thread
+tosthread_t init;
+tosthread_t blink0;
+tosthread_t blink1;
+
+void init_thread(void* arg);
+void blink0_thread(void* arg);
+void blink1_thread(void* arg);
+
+void tosthread_main(void* arg) {
+  //Use stack estimator to calculate maximum stack size
+  //  on a thread by thread basis
+  tosthread_create(&init, init_thread, NULL, INIT_STACK_SIZE);
+}
+
+void init_thread(void* arg) {
+  for(;;) {
+    tosthread_create(&blink0, blink0_thread, NULL, BLINK0_STACK_SIZE);
+    tosthread_create(&blink1, blink1_thread, NULL, BLINK1_STACK_SIZE);
+    tosthread_join(&blink0);
+    tosthread_join(&blink1);
+    led2Toggle();
+  }
+}
+
+void blink0_thread(void* arg) {
+  int i;
+  for(i=0; i<2; i++) {
+    led0Toggle();
+    tosthread_sleep(1000);
+  }
+}
+
+void blink1_thread(void* arg) {
+  int i;
+  for(i=0; i<4; i++) {
+    led1Toggle();
+    tosthread_sleep(1000);
+  }
+}
+
diff --git a/apps/tosthreads/capps/TestJoin/stack.h b/apps/tosthreads/capps/TestJoin/stack.h
new file mode 100644
index 00000000..392794ad
--- /dev/null
+++ b/apps/tosthreads/capps/TestJoin/stack.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+enum {
+  INIT_STACK_SIZE = 50,
+  BLINK0_STACK_SIZE = 200,
+  BLINK1_STACK_SIZE = 200,
+  BLINK2_STACK_SIZE = 200,
+};
diff --git a/apps/tosthreads/capps/TestLogStorage/Makefile b/apps/tosthreads/capps/TestLogStorage/Makefile
new file mode 100644
index 00000000..cf587f24
--- /dev/null
+++ b/apps/tosthreads/capps/TestLogStorage/Makefile
@@ -0,0 +1,19 @@
+TOSTHREAD_MAIN=TestLogStorage.c
+THIS_SUPPORTED_PLATFORMS=tmote telos telosb eyesIFXv1 eyesIFXv2 mica2 mica2dot telosa eyesIFX micaz iris tinynode epic
+
+ifneq ($(filter $(THIS_SUPPORTED_PLATFORMS) clean,$(MAKECMDGOALS)),)
+        ifneq ($(filter tmote telos telosb eyesIFXv1,$(MAKECMDGOALS)),)
+                CFLAGS+=-DUSE_STM25P
+        endif
+        ifneq ($(filter mica2 telosa mica2dot eyesIFX eyesIFXv2 micaz iris tinynode epic,$(MAKECMDGOALS)),)
+                CFLAGS+=-DUSE_AT45DB
+        endif
+
+        include $(MAKERULES)
+else
+%:
+	@echo "    Sorry, this application is only written to work with the following platforms:"
+	@echo "        $(THIS_SUPPORTED_PLATFORMS)"
+cthreads:
+	@:
+endif
diff --git a/apps/tosthreads/capps/TestLogStorage/README b/apps/tosthreads/capps/TestLogStorage/README
new file mode 100644
index 00000000..3c83d84f
--- /dev/null
+++ b/apps/tosthreads/capps/TestLogStorage/README
@@ -0,0 +1,60 @@
+README for TOSThreads TestLogStorage 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+TestLogStorage is a threaded application that takes dummy sensor readings of a
+counter, logs them to flash, and then sends out over the serial port at some
+later time. In the current implementation, each sensor reading is taken once
+every 3000ms, and records containing a set of readings from each iteration are
+batched out over the radio every 10000ms.  This application is very similar to
+the SenseStoreAndForward application contained in this same directory, except
+that it uses a dummy sensor instead of sensors specific to the tmote onboard
+suite.  In this way, the LogStorage functionality can be tested in conjunction
+with the sending facility in a platform independent way.
+
+To run this application install it on a mote via the command:
+  make <platform> cthreads install
+  
+Valid platforms are currently:  tmote, telosb, iris, mica2, micaz, and epic
+
+Readings are taken from the dummy sensor and logged to flash as one record in an
+infinite loop. Records are then read out of flash and and sent out over the
+serial interface in separate infinite loop.  Before the application starts
+running, the entire contents of the flash drive are erased.
+
+A successful test will result in LED0 remaining solid for approximately 6s while
+the flash is being erased.  After that LED0 will toggle with each successful
+sensor readings logged to flash, at a rate of 3000ms.  Also, LED1 will begin
+toggling in rapid succession once every 10000ms as records are successfully read
+from flash and sent out over the serial port.  Once all of the records currently
+recorded to flash since the last batch of sends have been sent out, LED2 Toggles
+to indicate completion.  This process continues in an infinite loop forever.
+
+Since the TestLogStorage mote writes its records out to the serial
+port, you can test that the application is working properly by reading these
+packets (e.g., through seriallisten):
+
+  java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX:<baud_rate>
+
+Once this java application is running, you should see output containing
+the sensor readings being streamed to your terminal.  Check that the
+output has reasonable values, counting up from 0. E.g.:
+
+  00 ff ff 00 00 06 00 25 00 00 00 9f 00 9f 
+  00 ff ff 00 00 06 00 25 00 00 00 a0 00 a0 
+  00 ff ff 00 00 06 00 25 00 00 00 a1 00 a1 
+  00 ff ff 00 00 06 00 25 00 00 00 a2 00 a2 
+  00 ff ff 00 00 06 00 25 00 00 00 a3 00 a3 
+
+NOTE:  The baud rate 57600 must be used telos based motes, as its configuration
+has been changed to work with this baud rate when compiled for tosthreads. I.e.
+DO NOT just substitute 'telosb' or 'tmote' for <baud_rate> above.  Explicitly
+set it to 57600.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/capps/TestLogStorage/TestLogStorage.c b/apps/tosthreads/capps/TestLogStorage/TestLogStorage.c
new file mode 100644
index 00000000..6e48a217
--- /dev/null
+++ b/apps/tosthreads/capps/TestLogStorage/TestLogStorage.c
@@ -0,0 +1,167 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * TestLogStorage is a threaded implementation of an application that takes a dummy
+ * sensor readings of a counter, logs it flash, and then sends it out over the
+ * serial port at some later time. In the current implementation, each sensor reading is
+ * taken once every 3000ms, and records containing a set of readings from each
+ * iteration are batched out over the radio every 10000ms.  This application is
+ * very similar to the SenseStoreAndForward application contained in this same
+ * directory, except that it is written using a dummy sensor value instead of
+ * sensors specific to the tmote onboard suite. In this way, the LogStorage
+ * functionality can be tested in conjunction with the sending facility in a
+ * platform independent way.
+ * 
+ * Readings are taken from the dummy sensor and logged to flash as one record in an
+ * infinite loop. Records are then read out of flash and and sent out over the
+ * serial interface in separate infinite loop.  Before the application starts
+ * running, the entire contents of the flash drive are erased.
+ * 
+ * A successful test will result in LED0 remaining solid for approximately 6s while
+ * the flash is being erased.  After that LED0 will toggle with each successful
+ * sensor readings logged to flash, at a rate of 3000ms.  Also, LED1 will begin
+ * toggling in rapid succession once every 10000ms as records are successfully read
+ * from flash and sent out over the serial port.  Once all of the records currently
+ * recorded to flash since the last batch of sends have been sent out, LED2 Toggles
+ * to indicate completion.  This process continues in an infinite loop forever.
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "tosthread.h"
+#include "tosthread_amserial.h"
+#include "tosthread_leds.h"
+#include "tosthread_threadsync.h"
+#include "tosthread_logstorage.h"
+#include "StorageVolumes.h"
+
+#define NUM_SENSORS              1
+#define SAMPLING_PERIOD       3000
+#define SENDING_PERIOD       10000
+#define AM_SENSOR_DATA_MSG    0x25   
+
+//Data structure for storing sensor data
+typedef struct sensor_data {
+  nx_uint32_t seq_no;
+  nx_uint16_t sample;
+} sensor_data_t;
+
+//Initialize variables associated with each thread
+tosthread_t dummy_sensor;
+tosthread_t store_handler;
+tosthread_t send_handler;
+
+message_t send_msg;
+sensor_data_t storing_sensor_data;
+sensor_data_t* sending_sensor_data; //pointer into message structure
+mutex_t data_mutex;
+mutex_t log_mutex;
+barrier_t send_barrier;
+barrier_t sense_barrier;
+
+void sensor_thread(void* arg);
+void store_thread(void* arg);
+void send_thread(void* arg);
+
+void tosthread_main(void* arg) {
+  mutex_init(&data_mutex);
+  mutex_init(&log_mutex);
+  barrier_reset(&send_barrier, NUM_SENSORS+1);
+  barrier_reset(&sense_barrier, NUM_SENSORS+1);
+  sending_sensor_data = serialGetPayload(&send_msg, sizeof(sensor_data_t));
+  storing_sensor_data.seq_no = 0;
+  
+  amSerialStart();
+  led0Toggle();
+  volumeLogErase(VOLUME_TESTLOGSTORAGE);
+  volumeLogSeek(VOLUME_TESTLOGSTORAGE, SEEK_BEGINNING);
+  tosthread_create(&dummy_sensor, sensor_thread, NULL, 200);
+  tosthread_create(&store_handler, store_thread, NULL, 200);
+  tosthread_create(&send_handler, send_thread, NULL, 200);
+}
+
+void read_sensor(error_t (*read)(uint16_t*), nx_uint16_t* nx_val) {
+
+}
+
+void sensor_thread(void* arg) {
+  //Dummy sensor just counts up on each iteration
+  uint16_t val = -1;
+  for(;;) {
+    val++;
+    mutex_lock(&data_mutex);
+    storing_sensor_data.sample = val;
+    mutex_unlock(&data_mutex);
+    barrier_block(&send_barrier);
+    barrier_block(&sense_barrier);
+  }
+}
+
+void store_thread(void* arg) {
+  storage_len_t sensor_data_len;
+  bool sensor_records_lost;
+
+  for(;;) {
+    barrier_block(&send_barrier);
+    barrier_reset(&send_barrier, NUM_SENSORS + 1);
+    
+    mutex_lock(&log_mutex);
+      sensor_data_len = sizeof(sensor_data_t);
+      while( volumeLogAppend(VOLUME_TESTLOGSTORAGE, &storing_sensor_data, &sensor_data_len, &sensor_records_lost) != SUCCESS );
+    mutex_unlock(&log_mutex);
+    
+    storing_sensor_data.seq_no++;
+    led0Toggle();
+
+    tosthread_sleep(SAMPLING_PERIOD);
+    barrier_block(&sense_barrier);
+    barrier_reset(&sense_barrier, NUM_SENSORS + 1);
+  }
+}
+void send_thread(void* arg) {
+  storage_len_t sensor_data_len;
+  
+  for(;;) {
+    tosthread_sleep(SENDING_PERIOD);
+
+    while( volumeLogCurrentReadOffset(VOLUME_TESTLOGSTORAGE) != volumeLogCurrentWriteOffset(VOLUME_TESTLOGSTORAGE) ) {
+      sensor_data_len = sizeof(sensor_data_t);
+      mutex_lock(&log_mutex);
+        while( volumeLogRead(VOLUME_TESTLOGSTORAGE, sending_sensor_data, &sensor_data_len) != SUCCESS );
+      mutex_unlock(&log_mutex);
+      
+      while( amSerialSend(AM_BROADCAST_ADDR, &send_msg, sizeof(sensor_data_t), AM_SENSOR_DATA_MSG) != SUCCESS );
+      led1Toggle();
+    }
+    led2Toggle();
+  }
+}
diff --git a/apps/tosthreads/capps/TestLogStorage/volumes-at45db.xml b/apps/tosthreads/capps/TestLogStorage/volumes-at45db.xml
new file mode 100644
index 00000000..d6a3bea7
--- /dev/null
+++ b/apps/tosthreads/capps/TestLogStorage/volumes-at45db.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="TESTLOGSTORAGE" size="262144" type="log" circular="true"/>
+</volume_table>
diff --git a/apps/tosthreads/capps/TestLogStorage/volumes-pxa27xp30.xml b/apps/tosthreads/capps/TestLogStorage/volumes-pxa27xp30.xml
new file mode 100644
index 00000000..9a90b908
--- /dev/null
+++ b/apps/tosthreads/capps/TestLogStorage/volumes-pxa27xp30.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="TESTLOGSTORAGE" size="2097152" type="log" circular="true"/>
+</volume_table>
diff --git a/apps/tosthreads/capps/TestLogStorage/volumes-stm25p.xml b/apps/tosthreads/capps/TestLogStorage/volumes-stm25p.xml
new file mode 100644
index 00000000..d400fdbe
--- /dev/null
+++ b/apps/tosthreads/capps/TestLogStorage/volumes-stm25p.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="TESTLOGSTORAGE" size="1048576" type="log" circular="true"/>
+</volume_table>
diff --git a/apps/tosthreads/capps/TestPrintf/Makefile b/apps/tosthreads/capps/TestPrintf/Makefile
new file mode 100644
index 00000000..11976e49
--- /dev/null
+++ b/apps/tosthreads/capps/TestPrintf/Makefile
@@ -0,0 +1,4 @@
+TOSTHREAD_MAIN=TestPrintf.c
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/lib/printf
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/capps/TestPrintf/README b/apps/tosthreads/capps/TestPrintf/README
new file mode 100644
index 00000000..17294b55
--- /dev/null
+++ b/apps/tosthreads/capps/TestPrintf/README
@@ -0,0 +1,47 @@
+README for TOSThreads TestPrintf 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+This application tests the operation of the Printf client in TOSThreads.  It
+continuously prints the value of a counter starting at 0, increasing as it
+prints.
+
+You can install TestPrintf on a mote via the following command:
+  make <platform> cthreads install
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+Once burned on a mote, the java based PrintfClient must be ran to verify
+proper operation of the application.
+  java net.tinyos.tools.PrintfClient -comm serial@/dev/ttyUSBXXX:<baud_rate>
+  
+NOTE:  The baud rate 57600 must be used telos based motes, as its configuration
+has been changed to work with this baud rate when compiled for tosthreads. I.e.
+DO NOT just substitute 'telosb' or 'tmote' for <baud_rate> above.  Explicitly
+set it to 57600.
+
+Once this java application is running, you should see output of the sort
+continuously being streamed to your terminal:
+...
+...
+Counter: 4549
+Counter: 4550
+Counter: 4551
+Counter: 4552
+Counter: 4553
+Counter: 4554
+Counter: 4555
+Counter: 4556
+Counter: 4557
+Counter: 4558
+Counter: 4559
+...
+...
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/capps/TestPrintf/TestPrintf.c b/apps/tosthreads/capps/TestPrintf/TestPrintf.c
new file mode 100644
index 00000000..e06c3308
--- /dev/null
+++ b/apps/tosthreads/capps/TestPrintf/TestPrintf.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This application tests the operation of the Printf client in TOSThreads.  It
+ * continuously prints the value of a counter starting at 0, increasing as it
+ * prints.
+ * 
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "tosthread.h"
+#include "printf.h"
+
+//Initialize variables associated with each thread
+tosthread_t printf_thread;
+void thread_run(void* arg);
+
+void tosthread_main(void* arg) {
+  tosthread_create(&printf_thread, thread_run, NULL, 200);
+}
+
+void thread_run(void* arg) {
+  uint32_t counter = 0;
+  for(;;) {
+    printf("Counter: %lu\n", counter++);
+  }
+}
diff --git a/apps/tosthreads/capps/TestSineSensor/Makefile b/apps/tosthreads/capps/TestSineSensor/Makefile
new file mode 100644
index 00000000..4852ecee
--- /dev/null
+++ b/apps/tosthreads/capps/TestSineSensor/Makefile
@@ -0,0 +1,4 @@
+TOSTHREAD_MAIN=TestSineSensor.c
+CFLAGS += -I$(TOSDIR)/lib/tosthreads/sensorboards/universal
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/capps/TestSineSensor/README b/apps/tosthreads/capps/TestSineSensor/README
new file mode 100644
index 00000000..852411ad
--- /dev/null
+++ b/apps/tosthreads/capps/TestSineSensor/README
@@ -0,0 +1,37 @@
+README for TOSThreads TestSineSensor
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+This application is used to test the threaded version of the API for accessing
+the software based SineSensor usable by any platform for demonstration purposes.
+
+You can install TestSineSensor on a mote via the following comand:
+  make <platform> cthreads install
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+This application simply takes sensor readings in an infinite loop from the
+SineSensor and forwards them over the serial interface.  Upon successful
+transmission, LED0 is toggled.
+
+A successful test will result in the TestSineSensor mote constantly flickering
+LED0. Additionally, messages containing the sensor readings should be forwarded
+over the serial interface as verified by running the following for the platform
+of interest:
+  java net.tinyos.tools.Listen -comm serial@/dev/ttyUSBXXX:<baud_rate>
+  
+NOTE:  The baud rate 57600 must be used telos based motes, as its configuration
+has been changed to work with this baud rate when compiled for tosthreads. I.e.
+DO NOT just substitute 'telosb' or 'tmote' for <baud_rate> above.  Explicitly
+set it to 57600.
+
+Once this java application is running, you should see output containing the
+sensor readings being streamed to your terminal.
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/capps/TestSineSensor/TestSineSensor.c b/apps/tosthreads/capps/TestSineSensor/TestSineSensor.c
new file mode 100644
index 00000000..c6483ea6
--- /dev/null
+++ b/apps/tosthreads/capps/TestSineSensor/TestSineSensor.c
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This application is used to test the threaded version of the API for accessing
+ * the software based SineSensor usable by any platform for demonstration purposes.
+ *
+ * This application simply takes sensor readings in an infinite loop from the
+ * SineSensor and forwards them over the serial interface.  Upon successful
+ * transmission, LED0 is toggled.
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "tosthread.h"
+#include "tosthread_amserial.h"
+#include "tosthread_leds.h"
+#include "tosthread_sinesensor.h" 
+
+void tosthread_main(void* arg) {
+  uint16_t* var;
+  message_t msg;
+  var = serialGetPayload(&msg, sizeof(uint16_t));
+
+  while( amSerialStart() != SUCCESS );
+  for(;;) {
+    while( sinesensor_read(var) != SUCCESS );
+    while( amSerialSend(AM_BROADCAST_ADDR, &msg, sizeof(uint16_t), 228) != SUCCESS );
+    led0Toggle();
+  }
+}
+
diff --git a/apps/tosthreads/capps/ThreadStress/Makefile b/apps/tosthreads/capps/ThreadStress/Makefile
new file mode 100644
index 00000000..720fe27b
--- /dev/null
+++ b/apps/tosthreads/capps/ThreadStress/Makefile
@@ -0,0 +1,4 @@
+TOSTHREAD_MAIN=ThreadStress.c
+PFLAGS += -I$(TOS_THREADS_DIR)/tos/csystem/Loader
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/capps/ThreadStress/README b/apps/tosthreads/capps/ThreadStress/README
new file mode 100644
index 00000000..34c59e6f
--- /dev/null
+++ b/apps/tosthreads/capps/ThreadStress/README
@@ -0,0 +1,28 @@
+README for TOSThreads ThreadStress 
+Author/Contact: tinyos-help@millennium.berkeley.edu
+Author: Kevin Klues <klueska@cs.stanford.edu>
+
+Description:
+
+This application stresses the creation and destruction of dynamic threads by
+spawning lots and lots of threads over and over again and letting them run to
+completion.  Three different thread start functions are used, each toggling one
+of LED0, LED1, and LED2 every 256 spawnings. The time at which each LED is
+toggled is offset so that the three LEDS do not come on in unison.
+
+You can install ThreadStress on a mote via the following command:
+  make <platform> cthreads install
+  
+Valid platforms are currently: tmote, telosb, iris, mica2, micaz, and epic
+
+Successful running of this application will result in all three leds flashing at
+a rate determined by how long it takes to spawn a thread on a given platform. 
+All three LEDs should flash at this rate in an infinite loop forever.  Given the
+dynamics on the mote the rate may vary over time, but the important thing is
+that all three LEDs continue to toggle at a reasonably visible rate.  
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/capps/ThreadStress/ThreadStress.c b/apps/tosthreads/capps/ThreadStress/ThreadStress.c
new file mode 100644
index 00000000..8d26bbe3
--- /dev/null
+++ b/apps/tosthreads/capps/ThreadStress/ThreadStress.c
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This application stresses the creation and destruction of dynamic threads by
+ * spawning lots and lots of threads over and over again and letting them run to
+ * completion.  Three different thread start functions are used, each toggling one
+ * of LED0, LED1, and LED2 every 256 spawnings. The time at which each LED is
+ * toggled is offset so that the three LEDS do not come on in unison.
+ * 
+ * Successful running of this application will result in all three leds flashing at
+ * a rate determined by how long it takes to spawn a thread on a given platform. 
+ * All three LEDs should flash at this rate in an infinite loop forever.  Given the
+ * dynamics on the mote the rate may vary over time, but the important thing is
+ * that all three LEDs continue to toggle at a reasonably visible rate.  
+ *
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "tosthread.h"
+#include "tosthread_leds.h"
+
+//Initialize variables associated with each thread
+tosthread_t thread_handler;
+void blink0_thread(void* arg);
+void blink1_thread(void* arg);
+void blink2_thread(void* arg);
+
+void tosthread_main(void* arg) {
+  while(1) {
+    tosthread_create(&thread_handler, blink0_thread, NULL, 100);
+    tosthread_create(&thread_handler, blink1_thread, NULL, 100);
+    tosthread_create(&thread_handler, blink2_thread, NULL, 100);
+  }
+}
+
+uint8_t blink0_count = 0;
+void blink0_thread(void* arg) {
+  if(blink0_count++ == 0)
+    led0Toggle();
+  tosthread_create(&thread_handler, blink1_thread, NULL, 100);
+  tosthread_create(&thread_handler, blink2_thread, NULL, 100);
+  tosthread_create(&thread_handler, blink0_thread, NULL, 100);
+}
+
+uint8_t blink1_count = 0;
+void blink1_thread(void* arg) {
+  if(blink1_count++ == 85)
+    led1Toggle();
+  tosthread_create(&thread_handler, blink2_thread, NULL, 100);
+  tosthread_create(&thread_handler, blink0_thread, NULL, 100);
+  tosthread_create(&thread_handler, blink1_thread, NULL, 100);
+}
+
+uint8_t blink2_count = 0;
+void blink2_thread(void* arg) {
+  if(blink2_count++ == 170)
+    led2Toggle();
+  tosthread_create(&thread_handler, blink0_thread, NULL, 100);
+  tosthread_create(&thread_handler, blink1_thread, NULL, 100);
+  tosthread_create(&thread_handler, blink2_thread, NULL, 100);
+}
diff --git a/apps/tosthreads/tinyld/LoadFromRAM/LoadFromRAMAppC.nc b/apps/tosthreads/tinyld/LoadFromRAM/LoadFromRAMAppC.nc
new file mode 100644
index 00000000..882d749f
--- /dev/null
+++ b/apps/tosthreads/tinyld/LoadFromRAM/LoadFromRAMAppC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * LoadFromRAM is a simple program that dynamically loads two loadable
+ * programs hardcoded in the byte arrays; One program is Blink, and the
+ * other one is Basestation.
+ *
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration LoadFromRAMAppC {}
+
+implementation {
+  components MainC,
+             LoadFromRAMP,
+             DynamicLoaderC,
+             LedsC;
+             
+  LoadFromRAMP.Boot -> MainC;
+  LoadFromRAMP.DynamicLoader -> DynamicLoaderC;
+  LoadFromRAMP.Leds -> LedsC;
+}
diff --git a/apps/tosthreads/tinyld/LoadFromRAM/LoadFromRAMP.nc b/apps/tosthreads/tinyld/LoadFromRAM/LoadFromRAMP.nc
new file mode 100644
index 00000000..32c72aa9
--- /dev/null
+++ b/apps/tosthreads/tinyld/LoadFromRAM/LoadFromRAMP.nc
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * LoadFromRAM is a simple program that dynamically loads two loadable
+ * programs hardcoded in the byte arrays; One program is Blink, and the
+ * other one is Basestation.
+ *
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module LoadFromRAMP 
+{
+  uses {
+    interface Boot;
+    interface DynamicLoader;
+    interface Leds;
+  }
+}
+
+implementation
+{
+  // The following blinks led 2
+  uint8_t code1[] = {
+    0x1c, 0x00, 0x01, 0x00, 0x03, 0x00, 0x05, 0x00, 0x01, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00,
+    0x28, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x01, 0x00, 0x2c, 0x00, 0x08, 0x00, 0x44, 0x00, 0x09, 0x00,
+    0x56, 0x00, 0x0a, 0x00, 0x32, 0x00, 0x30, 0x00, 0x24, 0x00, 0x0f, 0x42, 0x12, 0xc3, 0x0f, 0x10,
+    0x0f, 0x11, 0x0f, 0x11, 0x5f, 0xf3, 0x32, 0xc2, 0x03, 0x43, 0x7f, 0xf3, 0x30, 0x41, 0x4f, 0x93,
+    0x01, 0x24, 0x32, 0xd2, 0x30, 0x41, 0x3c, 0x40, 0xf4, 0x01, 0x0d, 0x43, 0x3e, 0x40, 0x00, 0x00,
+    0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x00, 0x00, 0x30, 0x41, 0xb0, 0x12, 0x00, 0x00, 0x3e, 0x40,
+    0xe8, 0x03, 0x0f, 0x43, 0xb0, 0x12, 0x4e, 0x00, 0xf8, 0x3f, 0x30, 0x41, 0xb0, 0x12, 0x00, 0x00,
+    0x3e, 0x40, 0xe8, 0x03, 0x0f, 0x43, 0xb0, 0x12, 0x60, 0x00, 0xf8, 0x3f, 0x30, 0x41, 0xb0, 0x12,
+    0x00, 0x00, 0x3e, 0x40, 0xe8, 0x03, 0x0f, 0x43, 0xb0, 0x12, 0x00, 0x00, 0xf8, 0x3f, 0x30, 0x41
+  };
+
+  // The following is BaseStationForC
+  uint8_t code2[] = {
+    0x1c, 0x00, 0x05, 0x00, 0x58, 0x01, 0x1e, 0x00, 0x0d, 0x00, 0x00, 0x00, 0x26, 0x03, 0xac, 0x00,
+    0x26, 0x00, 0xae, 0x00, 0x88, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x01, 0x00, 0x52, 0x00, 0x02, 0x00,
+    0x64, 0x00, 0x01, 0x00, 0x44, 0x00, 0x08, 0x00, 0xe2, 0x00, 0x09, 0x00, 0x00, 0x02, 0x0a, 0x00,
+    0xdc, 0x00, 0x0b, 0x00, 0x32, 0x00, 0x0d, 0x00, 0x10, 0x03, 0x0e, 0x00, 0x98, 0x01, 0x11, 0x00,
+    0xd6, 0x02, 0x12, 0x00, 0xce, 0x02, 0x14, 0x00, 0x9c, 0x02, 0x16, 0x00, 0xc6, 0x02, 0x1a, 0x00,
+    0x94, 0x02, 0x1b, 0x00, 0xde, 0x02, 0x22, 0x00, 0x2e, 0x00, 0x24, 0x00, 0xb6, 0x00, 0x25, 0x00,
+    0xfa, 0x02, 0x28, 0x00, 0x84, 0x02, 0x29, 0x00, 0x7c, 0x02, 0x2b, 0x00, 0xee, 0x02, 0x2d, 0x00,
+    0x74, 0x02, 0x31, 0x00, 0xe6, 0x02, 0x32, 0x00, 0x8c, 0x02, 0x3f, 0x00, 0xa2, 0x00, 0x40, 0x00,
+    0x04, 0x01, 0x42, 0x00, 0x18, 0x01, 0x44, 0x00, 0x98, 0x00, 0x45, 0x00, 0xec, 0x00, 0x46, 0x00,
+    0x0e, 0x01, 0x51, 0x00, 0x8a, 0x01, 0x6d, 0x00, 0x6c, 0x01, 0x90, 0x00, 0x22, 0x00, 0xb0, 0x00,
+    0x3c, 0x00, 0x84, 0x01, 0x4e, 0x00, 0x92, 0x01, 0x60, 0x00, 0x0a, 0x03, 0x72, 0x00, 0x18, 0x03,
+    0x84, 0x00, 0xbe, 0x00, 0xba, 0x00, 0x28, 0x01, 0xf4, 0x00, 0x00, 0x00, 0x46, 0x01, 0xa0, 0x01,
+    0x9c, 0x01, 0x18, 0x02, 0xbc, 0x01, 0xb8, 0x02, 0xfc, 0x01, 0x66, 0x02, 0x08, 0x02, 0x0f, 0x42,
+    0x12, 0xc3, 0x0f, 0x10, 0x0f, 0x11, 0x0f, 0x11, 0x5f, 0xf3, 0x32, 0xc2, 0x03, 0x43, 0x7f, 0xf3,
+    0x30, 0x41, 0x4f, 0x93, 0x01, 0x24, 0x32, 0xd2, 0x30, 0x41, 0x3f, 0x40, 0x40, 0x00, 0xb0, 0x12,
+    0x2a, 0x00, 0x3f, 0x40, 0x76, 0x00, 0xb0, 0x12, 0x00, 0x00, 0xb0, 0x12, 0x00, 0x00, 0xb0, 0x12,
+    0x00, 0x00, 0x3c, 0x40, 0xc8, 0x00, 0x0d, 0x43, 0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40, 0xb2, 0x00,
+    0xb0, 0x12, 0x56, 0x00, 0x3c, 0x40, 0xc8, 0x00, 0x0d, 0x43, 0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40,
+    0x00, 0x00, 0xb0, 0x12, 0x68, 0x00, 0x3c, 0x40, 0xc8, 0x00, 0x0d, 0x43, 0x3e, 0x40, 0x00, 0x00,
+    0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x7a, 0x00, 0x3c, 0x40, 0xc8, 0x00, 0x0d, 0x43, 0x3e, 0x40,
+    0x00, 0x00, 0x3f, 0x40, 0x0c, 0x03, 0xb0, 0x12, 0x8c, 0x00, 0x3c, 0x40, 0xc8, 0x00, 0x0d, 0x43,
+    0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x00, 0x00, 0x30, 0x41, 0x0b, 0x12,
+    0x0b, 0x4f, 0x2f, 0x52, 0xb0, 0x12, 0x00, 0x00, 0x0f, 0x4b, 0x3f, 0x50, 0x0a, 0x00, 0xb0, 0x12,
+    0x00, 0x00, 0xcb, 0x43, 0xaa, 0x00, 0xcb, 0x43, 0xab, 0x00, 0x3b, 0x41, 0x30, 0x41, 0x3e, 0x40,
+    0x86, 0x01, 0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x8e, 0x01, 0x30, 0x41, 0x0b, 0x12, 0x0a, 0x12,
+    0x09, 0x12, 0x31, 0x80, 0x34, 0x00, 0x09, 0x4f, 0x0b, 0x4e, 0x7c, 0x43, 0x0d, 0x43, 0x0e, 0x43,
+    0x0f, 0x41, 0x89, 0x12, 0x4f, 0x93, 0x03, 0x24, 0xb0, 0x12, 0x00, 0x00, 0xf6, 0x3f, 0xb0, 0x12,
+    0x00, 0x00, 0x0a, 0x4b, 0x2a, 0x52, 0x0f, 0x4a, 0xb0, 0x12, 0xb6, 0x01, 0x0e, 0x41, 0x0f, 0x4b,
+    0xb0, 0x12, 0x00, 0x00, 0x5f, 0x93, 0x07, 0x20, 0x0e, 0x4a, 0x0f, 0x4b, 0x3f, 0x50, 0x0a, 0x00,
+    0xb0, 0x12, 0xcc, 0x01, 0xf3, 0x3f, 0x0f, 0x4b, 0x2f, 0x52, 0xb0, 0x12, 0xe6, 0x01, 0x0f, 0x4b,
+    0x3f, 0x50, 0x0a, 0x00, 0xb0, 0x12, 0xf0, 0x01, 0xd8, 0x3f, 0x31, 0x50, 0x34, 0x00, 0x39, 0x41,
+    0x3a, 0x41, 0x3b, 0x41, 0x30, 0x41, 0x0b, 0x12, 0x0a, 0x12, 0x09, 0x12, 0x09, 0x4f, 0x0d, 0x4e,
+    0xff, 0x90, 0x03, 0x00, 0xaa, 0x00, 0x20, 0x2c, 0x5f, 0x4f, 0xab, 0x00, 0x0a, 0x4f, 0x3c, 0x40,
+    0x34, 0x00, 0xb0, 0x12, 0x48, 0x02, 0x0e, 0x59, 0x3e, 0x50, 0x0e, 0x00, 0x0f, 0x4d, 0x3d, 0x40,
+    0x34, 0x00, 0xfe, 0x4f, 0x00, 0x00, 0x1e, 0x53, 0x1d, 0x83, 0xfb, 0x23, 0x5f, 0x49, 0xab, 0x00,
+    0x1f, 0x53, 0x0c, 0x4f, 0x3a, 0x40, 0x03, 0x00, 0xb0, 0x12, 0x3e, 0x02, 0xc9, 0x4e, 0xab, 0x00,
+    0xd9, 0x53, 0xaa, 0x00, 0x0f, 0x43, 0x01, 0x3c, 0x1f, 0x43, 0x39, 0x41, 0x3a, 0x41, 0x3b, 0x41,
+    0x30, 0x41, 0x3e, 0x40, 0x94, 0x01, 0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12, 0x14, 0x03, 0x30, 0x41,
+    0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40, 0xf4, 0x01, 0xb0, 0x12, 0x22, 0x03, 0x30, 0x41, 0x0b, 0x12,
+    0x0a, 0x12, 0x09, 0x12, 0x31, 0x80, 0x34, 0x00, 0x09, 0x4f, 0x0b, 0x4e, 0x0a, 0x4b, 0x2a, 0x52,
+    0x0f, 0x4a, 0xb0, 0x12, 0x00, 0x00, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x0f, 0x93, 0x07, 0x20,
+    0x0e, 0x4a, 0x0f, 0x4b, 0x3f, 0x50, 0x0a, 0x00, 0xb0, 0x12, 0x00, 0x00, 0xf4, 0x3f, 0x0d, 0x41,
+    0x3e, 0x40, 0x34, 0x00, 0xfd, 0x4f, 0x00, 0x00, 0x1d, 0x53, 0x1e, 0x83, 0xfb, 0x23, 0x0f, 0x4b,
+    0x2f, 0x52, 0xb0, 0x12, 0x00, 0x00, 0x0f, 0x4b, 0x3f, 0x50, 0x0a, 0x00, 0xb0, 0x12, 0x00, 0x00,
+    0x39, 0x90, 0xa8, 0x02, 0x06, 0x24, 0x0f, 0x41, 0xb0, 0x12, 0x00, 0x00, 0xb0, 0x12, 0x00, 0x00,
+    0xd5, 0x3f, 0x0f, 0x41, 0xb0, 0x12, 0x00, 0x00, 0xf9, 0x3f, 0x31, 0x50, 0x34, 0x00, 0x39, 0x41,
+    0x3a, 0x41, 0x3b, 0x41, 0x30, 0x41, 0x0b, 0x12, 0x0a, 0x12, 0x09, 0x12, 0x08, 0x12, 0x09, 0x4f,
+    0x58, 0x4f, 0xaa, 0x00, 0x48, 0x93, 0x18, 0x24, 0x5f, 0x4f, 0xab, 0x00, 0x4e, 0x48, 0x0f, 0x8e,
+    0x3f, 0x50, 0x03, 0x00, 0x0c, 0x4f, 0x3a, 0x40, 0x03, 0x00, 0xb0, 0x12, 0x00, 0x00, 0x0a, 0x4e,
+    0x3c, 0x40, 0x34, 0x00, 0xb0, 0x12, 0x00, 0x00, 0x0f, 0x4e, 0x0f, 0x59, 0x78, 0x53, 0xc9, 0x48,
+    0xaa, 0x00, 0x3f, 0x50, 0x0e, 0x00, 0x01, 0x3c, 0x0f, 0x43, 0x38, 0x41, 0x39, 0x41, 0x3a, 0x41,
+    0x3b, 0x41, 0x30, 0x41, 0x0b, 0x12, 0x0a, 0x12, 0x09, 0x12, 0x08, 0x12, 0x07, 0x12, 0x0b, 0x4f,
+    0xb0, 0x12, 0x00, 0x00, 0x47, 0x4f, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x09, 0x4f, 0x0f, 0x4b,
+    0xb0, 0x12, 0x00, 0x00, 0x08, 0x4f, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x4a, 0x4f, 0x0f, 0x4b,
+    0xb0, 0x12, 0x00, 0x00, 0x0e, 0x49, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x4c, 0x47, 0x4d, 0x4a,
+    0x0e, 0x4b, 0x0f, 0x48, 0xb0, 0x12, 0x00, 0x00, 0x7f, 0xf3, 0x37, 0x41, 0x38, 0x41, 0x39, 0x41,
+    0x3a, 0x41, 0x3b, 0x41, 0x30, 0x41, 0x0b, 0x12, 0x0a, 0x12, 0x09, 0x12, 0x08, 0x12, 0x07, 0x12,
+    0x0b, 0x4f, 0xb0, 0x12, 0x00, 0x00, 0x47, 0x4f, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x09, 0x4f,
+    0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x08, 0x4f, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x4a, 0x4f,
+    0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x0e, 0x49, 0x0f, 0x4b, 0xb0, 0x12, 0x00, 0x00, 0x4c, 0x47,
+    0x4d, 0x4a, 0x0e, 0x4b, 0x0f, 0x48, 0xb0, 0x12, 0x1e, 0x03, 0x7f, 0xf3, 0x37, 0x41, 0x38, 0x41,
+    0x39, 0x41, 0x3a, 0x41, 0x3b, 0x41, 0x30, 0x41, 0x3e, 0x40, 0x1a, 0x03, 0x3f, 0x40, 0x00, 0x00,
+    0xb0, 0x12, 0x00, 0x00, 0x30, 0x41, 0x3e, 0x40, 0x00, 0x00, 0x3f, 0x40, 0x00, 0x00, 0xb0, 0x12,
+    0x00, 0x00, 0x30, 0x41
+  };
+
+  task void loadCode1() {
+    call DynamicLoader.loadFromMemory(code1);
+  }
+
+  task void loadCode2() {
+    call DynamicLoader.loadFromMemory(code2);
+  }
+
+  event void DynamicLoader.loadFromMemoryDone(void *addr, tosthread_t id, error_t error)
+  {
+    if (addr == code1) {
+      post loadCode2();
+    }
+  }
+
+  event void Boot.booted() {
+    post loadCode1();
+  }
+  
+  event void DynamicLoader.loadFromFlashDone(uint8_t volumeId, tosthread_t id, error_t error) {}
+}
diff --git a/apps/tosthreads/tinyld/LoadFromRAM/Makefile b/apps/tosthreads/tinyld/LoadFromRAM/Makefile
new file mode 100644
index 00000000..97b77fa3
--- /dev/null
+++ b/apps/tosthreads/tinyld/LoadFromRAM/Makefile
@@ -0,0 +1,17 @@
+COMPONENT=LoadFromRAMAppC
+
+GOALS += threads
+
+THREADS_DIR ?= $(TOSDIR)/lib/tosthreads
+CFLAGS += -I$(THREADS_DIR)/lib/tinyld
+CFLAGS += -I$(THREADS_DIR)/csystem
+CFLAGS += -I$(THREADS_DIR)/sensorboards/tmote_onboard
+CFLAGS += -I$(THREADS_DIR)/sensorboards/universal
+CFLAGS += -I$(THREADS_DIR)/lib/net/ctp
+CFLAGS += -I$(THREADS_DIR)/lib/net
+CFLAGS += -I$(TOSDIR)/lib/net
+CFLAGS += -I$(TOSDIR)/lib/net/ctp
+CFLAGS += -I$(TOSDIR)/lib/net/4bitle
+CFLAGS += -I$(THREADS_DIR)/lib/printf
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/tinyld/LoadFromRAM/README b/apps/tosthreads/tinyld/LoadFromRAM/README
new file mode 100644
index 00000000..95a32cc5
--- /dev/null
+++ b/apps/tosthreads/tinyld/LoadFromRAM/README
@@ -0,0 +1,22 @@
+README for LoadFromRAM
+Author/Contact: Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+
+Description:
+
+LoadFromRAM is a simple program that dynamically loads two loadable
+programs hardcoded in the byte arrays; One program is Blink, and the
+other one is Basestation.
+
+You can install LoadFromRAM on a mote via the following command:
+  make <platform> install
+
+If you would like to generate your own loadable program run, for example:
+  cd ../../capps/Blink
+  make telosb dynthreads
+  (the output file needed is ../../capps/Blink/build/telosb/dynthreads/main.tos)	
+  
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
diff --git a/apps/tosthreads/tinyld/LoadFromRAM/volumes-at45db.xml b/apps/tosthreads/tinyld/LoadFromRAM/volumes-at45db.xml
new file mode 100644
index 00000000..26c8665f
--- /dev/null
+++ b/apps/tosthreads/tinyld/LoadFromRAM/volumes-at45db.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="MICROEXEIMAGE" size="262144" type="block"/>
+</volume_table>          
diff --git a/apps/tosthreads/tinyld/LoadFromRAM/volumes-stm25p.xml b/apps/tosthreads/tinyld/LoadFromRAM/volumes-stm25p.xml
new file mode 100755
index 00000000..dfc0bd4c
--- /dev/null
+++ b/apps/tosthreads/tinyld/LoadFromRAM/volumes-stm25p.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="MICROEXEIMAGE" size="65536" type="block"/>
+</volume_table>
diff --git a/apps/tosthreads/tinyld/Makefile b/apps/tosthreads/tinyld/Makefile
new file mode 100644
index 00000000..231d9bf4
--- /dev/null
+++ b/apps/tosthreads/tinyld/Makefile
@@ -0,0 +1,57 @@
+#-*-makefile-*-
+######################################################################
+# 
+# Makes the entire suite of TinyOS applications for a given platform.
+#
+# Author: 	Martin Turon
+# Date:		August 18, 2005
+#
+######################################################################
+# $Id: Makefile,v 1.1 2009-12-23 18:08:47 klueska Exp $
+
+# MAKECMDGOALS is the way to get the arguments passed into a Makefile ...
+TARGET=$(MAKECMDGOALS)
+NESDOC_TARGET=$(filter-out nesdoc,$(TARGET))
+
+# Here is a way to get the list of subdirectories in a Makefile ...
+ROOT=.
+SUBDIRS := $(shell find * -type d)
+
+# Okay, match any target, and recurse the subdirectories
+%: 
+	@for i in $(SUBDIRS); do \
+	  HERE=$$PWD; \
+	  if [ -f $$i/Makefile ]; then \
+	      echo Building ... $(PWD)/$$i; \
+	      echo make $(TARGET); \
+	      cd $$i; \
+	      $(MAKE) $(TARGET); \
+	      cd $$HERE; \
+	  fi; \
+	done
+
+threads:
+	@:
+cthreads:
+	@:
+dynthreads:
+	@:
+
+BASEDIR = $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' )
+# The output directory for generated documentation
+DOCDIR = $(BASEDIR)/doc/nesdoc
+
+nesdoc:
+	@echo This target rebuilds documentation for all known platforms.
+	@echo It DOES NOT overwrite any existing documentation, thus, it 
+	@echo is best run after deleting all old documentation.
+	@echo
+	@echo To delete all old documentation, delete the contents of the
+	@echo $(DOCDIR) directory.
+	@echo
+	@echo Press Enter to continue, or ^C to abort.
+	@read
+	for platform in `ncc -print-platforms`; do \
+	  $(MAKE) $$platform docs.nohtml.preserve; \
+	  nesdoc -o $(DOCDIR) -html -target=$$platform; \
+	done
diff --git a/apps/tosthreads/tinyld/SerialLoader/Makefile b/apps/tosthreads/tinyld/SerialLoader/Makefile
new file mode 100755
index 00000000..92bfa550
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoader/Makefile
@@ -0,0 +1,25 @@
+COMPONENT=SerialLoaderAppC
+
+GOALS += threads
+
+THREADS_DIR ?= $(TOSDIR)/lib/tosthreads
+CFLAGS += -I$(THREADS_DIR)/lib/tinyld
+CFLAGS += -I$(THREADS_DIR)/csystem
+CFLAGS += -I$(THREADS_DIR)/sensorboards/tmote_onboard
+CFLAGS += -I$(THREADS_DIR)/sensorboards/universal
+CFLAGS += -I$(THREADS_DIR)/lib/net/ctp
+CFLAGS += -I$(THREADS_DIR)/lib/net
+CFLAGS += -I$(TOSDIR)/lib/net
+CFLAGS += -I$(TOSDIR)/lib/net/ctp
+CFLAGS += -I$(TOSDIR)/lib/net/4bitle
+CFLAGS += -I$(THREADS_DIR)/lib/printf
+
+ifdef TENET
+    CFLAGS += -DTOSTHREAD_TENET=1
+endif
+CFLAGS += -DDISABLE_LOADER_FLASH=1
+CFLAGS += -DDISABLE_LOADER_USERBUTTON=1
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/tinyld/SerialLoader/README b/apps/tosthreads/tinyld/SerialLoader/README
new file mode 100644
index 00000000..7cd3c047
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoader/README
@@ -0,0 +1,33 @@
+README for SerialLoader
+Author/Contact: Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+
+Description:
+
+SerialLoader receives loadable programs from the serial port and stores
+it in a byte array. Then, when it receives the command to load the code,
+it makes the call to the dynamic loader.
+
+Here are the steps:
+1.) Load SerialLoader:
+    make telosb install bsl,<device_port>
+    
+2.) Create the loadable code, main.tos:
+	cd ../../capps/Blink
+	make telosb dynthreads
+	(the output file needed is ../../capps/Blink/build/telosb/dynthreads/main.tos)	
+
+3.) Clear the byte array in the mote RAM buffer:
+    ./serialloader.py <device_port> 0
+
+4.) Upload the binary:
+    ./serialloader.py <device_port> 1 main.tos
+    
+5.) Run the binary:
+    ./serialloader.py <device_port> 7
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
+
diff --git a/apps/tosthreads/tinyld/SerialLoader/SerialLoader.h b/apps/tosthreads/tinyld/SerialLoader/SerialLoader.h
new file mode 100755
index 00000000..65572d58
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoader/SerialLoader.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#ifndef SERIALLOADER_H
+#define SERIALLOADER_H
+
+#define MAX_BIN_SIZE 2000
+
+#define SERIALMSG_ERASE 0
+#define SERIALMSG_WRITE 1
+#define SERIALMSG_READ  2
+#define SERIALMSG_CRC   3
+#define SERIALMSG_LEDS  5
+#define SERIALMSG_RUN   7
+
+typedef nx_struct SerialReqPacket {
+  nx_uint8_t msg_type;
+  nx_uint8_t pad;
+  nx_uint16_t offset;
+  nx_uint16_t len;
+  nx_uint8_t data[0];
+} SerialReqPacket;
+
+#define SERIALMSG_SUCCESS 0
+#define SERIALMSG_FAIL    1
+
+typedef nx_struct SerialReplyPacket {
+  nx_uint8_t error;
+  nx_uint8_t pad;
+  nx_uint8_t data[0];
+} SerialReplyPacket;
+
+#endif
diff --git a/apps/tosthreads/tinyld/SerialLoader/SerialLoaderAppC.nc b/apps/tosthreads/tinyld/SerialLoader/SerialLoaderAppC.nc
new file mode 100755
index 00000000..3cca00ae
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoader/SerialLoaderAppC.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * SerialLoader receives loadable programs from the serial port and stores
+ * it in a byte array. Then, when it receives the command to load the code,
+ * it makes the call to the dynamic loader.
+ * 
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Jeongyeup Paek <jpaek@enl.usc.edu>
+ */
+
+#include "AM.h"
+#include "SerialLoader.h"
+
+configuration SerialLoaderAppC {}
+implementation
+{
+  components MainC,
+             SerialActiveMessageC,
+             new SerialAMSenderC(0xAB),
+             new SerialAMReceiverC(0xAB),
+             SerialLoaderP,
+             BigCrcC,
+             LedsC;
+  
+  SerialLoaderP.Boot -> MainC;
+  SerialLoaderP.SerialSplitControl -> SerialActiveMessageC;
+  SerialLoaderP.SerialAMSender -> SerialAMSenderC;
+  SerialLoaderP.SerialAMReceiver -> SerialAMReceiverC;
+  SerialLoaderP.Leds -> LedsC;
+  SerialLoaderP.BigCrc -> BigCrcC;
+
+  components DynamicLoaderC;
+  SerialLoaderP.DynamicLoader -> DynamicLoaderC;
+}
+
diff --git a/apps/tosthreads/tinyld/SerialLoader/SerialLoaderP.nc b/apps/tosthreads/tinyld/SerialLoader/SerialLoaderP.nc
new file mode 100755
index 00000000..357b2c17
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoader/SerialLoaderP.nc
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * SerialLoader receives loadable programs from the serial port and stores
+ * it in a byte array. Then, when it receives the command to load the code,
+ * it makes the call to the dynamic loader.
+ * 
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Jeongyeup Paek <jpaek@enl.usc.edu>
+ **/
+
+#include "SerialLoader.h"
+
+module SerialLoaderP
+{
+  uses {
+    interface Boot;
+    interface SplitControl as SerialSplitControl;
+    interface AMSend as SerialAMSender;
+    interface Receive as SerialAMReceiver;
+    interface Leds;
+    interface DynamicLoader;
+    interface BigCrc;
+  }
+}
+implementation
+{
+  message_t serialMsg;
+  uint32_t dumpAddr = 0;
+  
+  uint8_t image[MAX_BIN_SIZE];
+
+  event void Boot.booted()
+  {
+    call SerialSplitControl.start();
+  }
+  
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      call SerialSplitControl.start();
+    }
+  }
+  
+  event void SerialSplitControl.stopDone(error_t error) {}
+  
+  void sendReply(error_t error, uint8_t len)
+  {
+    SerialReplyPacket *srpkt = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket));
+    if (error == SUCCESS) {
+      srpkt->error = SERIALMSG_SUCCESS;
+    } else {
+      srpkt->error = SERIALMSG_FAIL;
+    }
+    call SerialAMSender.send(AM_BROADCAST_ADDR, &serialMsg, len);
+  }
+  
+  
+  event void SerialAMSender.sendDone(message_t* msg, error_t error) {}
+  
+  error_t write_image(uint16_t offset, void *data, uint16_t len) {
+    if ((offset + len > MAX_BIN_SIZE) || (data == NULL))
+      return FAIL;
+    memcpy(&image[offset], data, len);
+    return SUCCESS;
+  }
+
+  error_t read_image(uint16_t offset, void *readbuf, uint16_t len) {
+    if ((offset + len > MAX_BIN_SIZE) || (readbuf == NULL))
+      return FAIL;
+    memcpy(readbuf, &image[offset], len);
+    return SUCCESS;
+  }
+
+  event void DynamicLoader.loadFromFlashDone(uint8_t volumeId, tosthread_t id, error_t error) {}
+  event void DynamicLoader.loadFromMemoryDone(void *addr, tosthread_t id, error_t error) {
+    sendReply(error, sizeof(SerialReplyPacket));
+  }
+
+  event void BigCrc.computeCrcDone(void* buf, uint16_t len, uint16_t crc, error_t error)
+  {
+    SerialReplyPacket *srpkt = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket));
+        
+    srpkt->data[1] = crc & 0xFF;
+    srpkt->data[0] = (crc >> 8) & 0xFF;
+    sendReply(SUCCESS, 2 + sizeof(SerialReplyPacket));
+  }
+
+  void sendCrcReply(uint16_t offset, uint16_t len)
+  {
+    call BigCrc.computeCrc(&(image[offset]), len);
+  }
+
+
+  event message_t* SerialAMReceiver.receive(message_t* msg, void* payload, uint8_t len)
+  {
+    uint16_t i;
+    error_t error = FAIL;
+    SerialReqPacket *srpkt = (SerialReqPacket *)payload;
+    SerialReplyPacket *serialMsg_payload = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket));
+    
+    switch (srpkt->msg_type) {
+      case SERIALMSG_ERASE :
+        for (i = 0; i < MAX_BIN_SIZE; i++) { image[i] = 0; }
+        call Leds.set(7);
+        for (i = 0; i < 2000; i++) {}
+        call Leds.set(0);
+        sendReply(SUCCESS, sizeof(SerialReplyPacket));
+        break;
+      case SERIALMSG_RUN :
+        error = call DynamicLoader.loadFromMemory(image);
+        if (error != SUCCESS)
+          sendReply(error, sizeof(SerialReplyPacket));
+        break;
+      case SERIALMSG_WRITE :
+        error = write_image(srpkt->offset, srpkt->data, srpkt->len);
+        if (error != SUCCESS)
+          call Leds.led0On();
+        sendReply(error, sizeof(SerialReplyPacket));
+        break;
+      case SERIALMSG_READ :
+        error = read_image(srpkt->offset, serialMsg_payload->data, srpkt->len);
+        if (error != SUCCESS)
+          sendReply(error, sizeof(SerialReplyPacket));
+        else
+          sendReply(error, len + sizeof(SerialReplyPacket));
+        break;
+      case SERIALMSG_LEDS:
+        call Leds.set(7);
+        for (i = 0; i < 2000; i++) {}
+        call Leds.set(0);
+        break;
+      case SERIALMSG_CRC :
+        sendCrcReply(srpkt->offset, srpkt->len);
+        break;
+    }
+    
+    return msg;
+  }
+}
+
diff --git a/apps/tosthreads/tinyld/SerialLoader/serialloader.py b/apps/tosthreads/tinyld/SerialLoader/serialloader.py
new file mode 100755
index 00000000..a3fc4853
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoader/serialloader.py
@@ -0,0 +1,242 @@
+#!/usr/bin/env python
+
+# Copyright (c) 2008 Johns Hopkins University.
+# All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+
+import sys, os, stat, struct
+import tinyos
+
+SERIAL_BAUDRATE = 57600
+SERIALMSG_AMGROUP = 0
+SERIALMSG_AMID    = 0xAB
+
+SERIALMSG_ERASE = 0
+SERIALMSG_WRITE = 1
+SERIALMSG_READ  = 2
+SERIALMSG_CRC   = 3
+SERIALMSG_LEDS  = 5
+SERIALMSG_RUN   = 7
+
+SERIALMSG_SUCCESS = 0
+SERIALMSG_FAIL    = 1
+
+SERIALMSG_DATA_PAYLOAD_SIZE = 20
+MAX_BIN_SIZE = 2000
+
+HEX_OUTPUT_LINE_SIZE = 16
+
+class SerialReqPacket(tinyos.GenericPacket):
+  def __init__(self, packet = None):
+      tinyos.GenericPacket.__init__(self,
+                             [('msg_type', 'int', 1),
+                              ('pad', 'int', 1),
+                              ('offset', 'int', 2),
+                              ('len', 'int', 2),
+                              ('data', 'blob', None)],
+                             packet)
+
+class SerialReplyPacket(tinyos.GenericPacket):
+  def __init__(self, packet = None):
+      tinyos.GenericPacket.__init__(self,
+                             [('error', 'int', 1),
+                              ('pad', 'int', 1),
+                             ('data', 'blob', None)],
+                             packet)
+
+# Display an integer representation of byte stream to hex representation
+def print_hex(start_addr, byte_stream):
+  byte_stream = ["%02x" % one_byte for one_byte in byte_stream]   # Converts to each byte to hex
+  
+  num_iterations = int( (len(byte_stream) - 1) / HEX_OUTPUT_LINE_SIZE )
+  num_iterations += 1
+  
+  for i in range(num_iterations):
+    line = "%07x" % start_addr + " "   # Prints memory address
+    for j in range(HEX_OUTPUT_LINE_SIZE):
+      if (i * HEX_OUTPUT_LINE_SIZE + j) < len(byte_stream):
+        line += byte_stream[i * HEX_OUTPUT_LINE_SIZE + j] + " "
+    print line
+    
+    start_addr += HEX_OUTPUT_LINE_SIZE
+
+def op_run(s, sreqpkt):
+  success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload())
+  if success == True:
+    packet = s.read_packet()
+    sreplypkt = SerialReplyPacket(packet[1])
+    return (sreplypkt.error == SERIALMSG_SUCCESS)
+
+def op_erase(s, sreqpkt):
+  success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload())
+  if success == True:
+    packet = s.read_packet()
+    sreplypkt = SerialReplyPacket(packet[1])
+    return (sreplypkt.error == SERIALMSG_SUCCESS)
+
+def op_print(s, sreqpkt, offset, length):
+  if (offset + length) <= DELUGE_VOLUME_SIZE:
+    while length > 0:
+      sreqpkt.offset = offset
+      # Calculates the payload size for the reply packet
+      if length >= HEX_OUTPUT_LINE_SIZE:
+        sreqpkt.len = HEX_OUTPUT_LINE_SIZE
+      else:
+        sreqpkt.len = length
+      
+      success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload())
+      if success == True:
+        packet = s.read_packet()
+        sreplypkt = SerialReplyPacket(packet[1])
+        if sreplypkt.error != SERIALMSG_SUCCESS:
+          return False
+  
+      print_hex(offset, sreplypkt.data)
+      length -= sreqpkt.len
+      offset += sreqpkt.len
+  else:
+    print "ERROR: Specified offset and length are too large for the flash volume"
+    return False
+  
+  return True
+
+def op_write(s, sreqpkt, input_file, length):
+  local_crc = 0
+  input_file_size = length
+  
+  sreqpkt.offset = 0
+  while length > 0:
+    # Calculates the payload size for the current packet
+    if length >= SERIALMSG_DATA_PAYLOAD_SIZE:
+      sreqpkt.len = SERIALMSG_DATA_PAYLOAD_SIZE
+    else:
+      sreqpkt.len = length
+    sreqpkt.data = []
+    
+    # Reads in the file we want to transmit
+    for i in range(sreqpkt.len):
+      sreqpkt.data.append(struct.unpack("B", input_file.read(1))[0])
+    
+    # Sends over serial to the mote
+    if s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) == True:
+      # Waiting for confirmation
+      packet = s.read_packet()
+      sreplypkt = SerialReplyPacket(packet[1])
+      if sreplypkt.error != SERIALMSG_SUCCESS:
+        print "ERROR: !SUCCESS"
+        return False
+      local_crc = s.crc16(local_crc, sreqpkt.data)   # Computes running CRC
+    else:
+      print "ERROR: Unable to write to flash"
+      return False
+    
+    length -= sreqpkt.len
+    sreqpkt.offset += sreqpkt.len
+  
+  # Check local and remote CRC
+  sreqpkt.msg_type = SERIALMSG_CRC
+  remote_crc = op_crc(s, sreqpkt, 0, input_file_size)
+  if remote_crc != None:
+    local_crc = [(local_crc >> 8) & 0xFF, local_crc & 0xFF]
+    print "Local CRC:  " + ("%02x" % local_crc[0]) + " " + ("%02x" % local_crc[1])
+    print "Remote CRC: " + ("%02x" % remote_crc[0]) + " " + ("%02x" % remote_crc[1])
+    if remote_crc != local_crc:
+      print "ERROR: Remote CRC doesn't match local CRC"
+      return False
+  else:
+    print "ERROR: Unable to verify CRC"
+    return False
+
+  return True
+
+def op_crc(s, sreqpkt, offset, length):
+  sreqpkt.offset = offset
+  sreqpkt.len = length
+  success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload())
+  if success == True:
+    packet = s.read_packet()
+    sreplypkt = SerialReplyPacket(packet[1])
+    if sreplypkt.error == SERIALMSG_SUCCESS:
+      return sreplypkt.data
+    else:
+      return None
+
+def op_leds(s, sreqpkt):
+  success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload())
+
+# ======== MAIN ======== #
+if len(sys.argv) >= 3:
+  sys.argv[2] = int(sys.argv[2])
+  
+  s = tinyos.Serial(sys.argv[1], SERIAL_BAUDRATE)
+  s.set_debug(False)   # Disables debug msg
+  sreqpkt = SerialReqPacket((sys.argv[2], 0, 0, 0, []))   # msg_type, pad, offset, length, data
+  
+  if sys.argv[2] == SERIALMSG_RUN:
+    if op_run(s, sreqpkt) == True:
+      print "Loaded image should be running now!"
+    else:
+      print "ERROR: Unable to run loaded image"
+    
+  elif sys.argv[2] == SERIALMSG_ERASE:
+    if op_erase(s, sreqpkt) == True:
+      print "Flash volume has been erased"
+    else:
+      print "ERROR: Unable to erase flash volume"
+    
+  elif sys.argv[2] == SERIALMSG_WRITE:
+    input_file = file(sys.argv[3], 'rb')
+    fileStats = os.stat(sys.argv[3])
+    
+    if fileStats[stat.ST_SIZE] <= MAX_BIN_SIZE:
+      #sreqpkt = SerialReqPacket((SERIALMSG_LEDS, 0, 0, 0, []))
+      #op_leds(s, sreqpkt)
+      sreqpkt = SerialReqPacket((sys.argv[2], 0, 0, 0, []))
+      if op_write(s, sreqpkt, input_file, fileStats[stat.ST_SIZE]) == True:
+        print "File has been successfully transmitted (" + str(fileStats[stat.ST_SIZE]) + " bytes)"
+      else:
+        print "ERROR: Unable to transmit file"
+      sreqpkt = SerialReqPacket((SERIALMSG_LEDS, 0, 0, 0, []))
+      op_leds(s, sreqpkt)
+    else:
+      print "ERROR: File is larger than max buffer size (" + str(MAX_BIN_SIZE) + ")"
+  
+  elif sys.argv[2] == SERIALMSG_READ:
+    data = op_print(s, sreqpkt, int(sys.argv[3]), int(sys.argv[4]))
+    if data != True:
+      print "ERROR: Unable to read the specified range"
+    
+  elif sys.argv[2] == SERIALMSG_CRC:
+    remote_crc = op_crc(s, sreqpkt, int(sys.argv[3]), int(sys.argv[4]))
+    if remote_crc != None:
+      print_hex(0, remote_crc)
+    else:
+      print "ERROR: Unable to compute remote CRC"
diff --git a/apps/tosthreads/tinyld/SerialLoader/tinyos.py b/apps/tosthreads/tinyld/SerialLoader/tinyos.py
new file mode 100755
index 00000000..e922f58c
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoader/tinyos.py
@@ -0,0 +1,223 @@
+import struct, time, serial
+
+class Serial:
+  HDLC_FLAG_BYTE = 0x7e
+  HDLC_CTLESC_BYTE = 0x7d
+  
+  TOS_SERIAL_ACTIVE_MESSAGE_ID = 0
+  TOS_SERIAL_CC1000_ID = 1
+  TOS_SERIAL_802_15_4_ID = 2
+  TOS_SERIAL_UNKNOWN_ID = 255
+  
+  SERIAL_PROTO_ACK = 67
+  SERIAL_PROTO_PACKET_ACK = 68
+  SERIAL_PROTO_PACKET_NOACK = 69
+  SERIAL_PROTO_PACKET_UNKNOWN = 255
+  
+  __s = None;       # An instance of serial.Serial object
+  __debug = True   # Debug mode
+  
+  def __init__(self, port, baudrate):
+     self.__s = serial.Serial(port, baudrate, rtscts=0)
+  
+  def __format_packet(self, packet):
+      return " ".join(["%02x" % p for p in packet]) + " | " + \
+             " ".join(["%d" % p for p in packet])
+  
+  def crc16(self, base_crc, frame_data):
+      crc = base_crc
+      for b in frame_data:
+          crc = crc ^ (b << 8)
+          for i in range(0, 8):
+              if crc & 0x8000 == 0x8000:
+                  crc = (crc << 1) ^ 0x1021
+              else:
+                  crc = crc << 1
+              crc = crc & 0xffff
+      return crc
+  
+  def __encode(self, val, dim):
+      output = []
+      for i in range(dim):
+          output.append(val & 0xFF)
+          val = val >> 8
+      return output
+  
+  def __decode(self, v):
+      r = long(0)
+      for i in v[::-1]:
+          r = (r << 8) + i
+      return r
+  
+  def __get_byte(self):
+      r = struct.unpack("B", self.__s.read())[0]
+      return r
+  
+  def __put_bytes(self, data):
+      for b in data:
+          self.__s.write(struct.pack('B', b))
+  
+  def __unescape(self, packet):
+      r = []
+      esc = False
+      for b in packet:
+          if esc:
+              r.append(b ^ 0x20)
+              esc = False
+          elif b == self.HDLC_CTLESC_BYTE:
+              esc = True
+          else:
+              r.append(b)
+      return r
+  
+  def __escape(self, packet):
+      r = []
+      for b in packet:
+          if b == self.HDLC_FLAG_BYTE or b == self.HDLC_CTLESC_BYTE:
+              r.append(self.HDLC_CTLESC_BYTE)
+              r.append(b ^ 0x20)
+          else:
+              r.append(b)
+      return r
+  
+  def read_packet(self):
+      d = self.__get_byte()
+      ts = time.time()
+      while d != self.HDLC_FLAG_BYTE:
+          d = self.__get_byte()
+          ts = time.time()
+      packet = [d]
+      d = self.__get_byte()
+      if d == self.HDLC_FLAG_BYTE:
+          d = self.__get_byte()
+          ts = time.time()
+      else:
+          packet.append(d)
+      while d != self.HDLC_FLAG_BYTE:
+          d = self.__get_byte()
+          packet.append(d)
+      un_packet = self.__unescape(packet)
+      crc = self.crc16(0, un_packet[1:-3])
+      packet_crc = self.__decode(un_packet[-3:-1])
+      if crc != packet_crc:
+          print "Warning: wrong CRC!"
+      if self.__debug == True:
+          print "Recv:", self.__format_packet(un_packet)
+      return (ts, un_packet)
+      
+  def write_packet(self, am_group, am_id, data):
+      # The first byte after SERIAL_PROTO_PACKET_ACK is a sequence
+      # number that will be send back by the mote to ack the receive of
+      # the data.
+      packet = [self.SERIAL_PROTO_PACKET_ACK, 0, self.TOS_SERIAL_ACTIVE_MESSAGE_ID,
+                0xff, 0xff,
+                0, 0,
+                len(data), am_group, am_id] + data;
+      crc = self.crc16(0, packet)
+      packet.append(crc & 0xff)
+      packet.append((crc >> 8) & 0xff)
+      packet = [self.HDLC_FLAG_BYTE] + self.__escape(packet) + [self.HDLC_FLAG_BYTE]
+      if self.__debug == True:
+          print "Send:", self.__format_packet(packet)
+      self.__put_bytes(packet)
+      
+      # Waiting for ACK
+      packet = self.read_packet()
+      if len(packet) > 1 and len(packet[1]) > 1:
+        return ((packet[1])[1] == self.SERIAL_PROTO_ACK)
+      return False
+  
+  def set_debug(self, debug):
+      self.__debug = debug
+
+class GenericPacket:
+    """ GenericPacket """
+
+    def __decode(self, v):
+        r = long(0)
+        for i in v:
+            r = (r << 8) + i
+        return r
+    
+    def __encode(self, val, dim):
+        output = []
+        for i in range(dim):
+            output.append(int(val & 0xFF))
+            val = val >> 8
+        output.reverse()
+        return output
+
+    def __init__(self, desc, packet = None):
+        self.__dict__['_schema'] = [(t, s) for (n, t, s) in desc]
+        self.__dict__['_names'] = [n for (n, t, s) in desc]
+        self.__dict__['_values'] = []
+        offset = 10
+        if type(packet) == type([]):
+            for (t, s) in self._schema:
+                if t == 'int':
+                    self._values.append(self.__decode(packet[offset:offset + s]))
+                    offset += s
+                elif t == 'blob':
+                    if s:
+                        self._values.append(packet[offset:offset + s])
+                        offset += s
+                    else:
+                        self._values.append(packet[offset:-3])
+        elif type(packet) == type(()):
+            for i in packet:
+                self._values.append(i)
+        else:
+            for v in self._schema:
+                self._values.append(None)
+
+    def __repr__(self):
+        return self._values.__repr__()
+
+    def __str__(self):
+        return self._values.__str__()
+
+    # Implement the map behavior
+    def __getitem__(self, key):
+        return self.__getattr__(key)
+
+    def __setitem__(self, key, value):
+        self.__setattr__(key, value)
+
+    def __len__(self):
+        return len(self._values)
+
+    def keys(self):
+        return self._names
+
+    def values(self):
+        return self._names
+
+    # Implement the struct behavior
+    def __getattr__(self, name):
+        if type(name) == type(0):
+            return self._names[name]
+        else:
+            return self._values[self._names.index(name)]
+
+    def __setattr__(self, name, value):
+        if type(name) == type(0):
+            self._values[name] = value
+        else:
+            self._values[self._names.index(name)] = value
+
+    # Custom
+    def names(self):
+        return self._names
+
+    def sizes(self):
+        return self._schema
+
+    def payload(self):
+        r = []
+        for i in range(len(self._schema)):
+            (t, s) = self._schema[i]
+            if t == 'int':
+                r += self.__encode(self._values[i], s)
+            else:
+                r += self._values[i]
+        return r
diff --git a/apps/tosthreads/tinyld/SerialLoaderFlash/FlashVolumeManager.h b/apps/tosthreads/tinyld/SerialLoaderFlash/FlashVolumeManager.h
new file mode 100755
index 00000000..86241a4b
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoaderFlash/FlashVolumeManager.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#ifndef FLASHVOLUMEMANAGER_H
+#define FLASHVOLUMEMANAGER_H
+
+#define SERIALMSG_ERASE 0
+#define SERIALMSG_WRITE 1
+#define SERIALMSG_READ  2
+#define SERIALMSG_CRC   3
+//#define SERIALMSG_ADDR  4
+#define SERIALMSG_LEDS 5
+#define SERIALMSG_RUN  7
+
+typedef nx_struct SerialReqPacket {
+  nx_uint8_t msg_type;
+  nx_uint8_t pad;
+  nx_uint16_t offset;
+  nx_uint16_t len;
+  nx_uint8_t data[0];
+} SerialReqPacket;
+
+#define SERIALMSG_SUCCESS 0
+#define SERIALMSG_FAIL    1
+
+typedef nx_struct SerialReplyPacket {
+  nx_uint8_t error;
+  nx_uint8_t pad;
+  nx_uint8_t data[0];
+} SerialReplyPacket;
+
+#endif
diff --git a/apps/tosthreads/tinyld/SerialLoaderFlash/FlashVolumeManagerC.nc b/apps/tosthreads/tinyld/SerialLoaderFlash/FlashVolumeManagerC.nc
new file mode 100755
index 00000000..76ee29eb
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoaderFlash/FlashVolumeManagerC.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * SerialLoaderFlash is similar to SerialLoader in that it receives
+ * loadable programs from the serial port. However, SerialLoaderFlash
+ * stores them on the external flash. Then, when it receives the command to
+ * load the code, it makes the call to the dynamic loader.
+ * 
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "AM.h"
+
+generic configuration FlashVolumeManagerC(am_id_t AMId)
+{
+  uses {
+    interface BlockRead;
+    interface BlockWrite;
+    interface DynamicLoader;
+  }
+}
+
+implementation
+{
+  components MainC,
+             SerialActiveMessageC,
+             new SerialAMSenderC(AMId),
+             new SerialAMReceiverC(AMId),
+             new FlashVolumeManagerP(),
+             NoLedsC, LedsC;
+  
+  DynamicLoader = FlashVolumeManagerP;
+  BlockRead = FlashVolumeManagerP;
+  BlockWrite = FlashVolumeManagerP;
+  
+  FlashVolumeManagerP.Boot -> MainC;
+  FlashVolumeManagerP.SerialSplitControl -> SerialActiveMessageC;
+
+  FlashVolumeManagerP.SerialAMSender -> SerialAMSenderC;
+  FlashVolumeManagerP.SerialAMReceiver -> SerialAMReceiverC;
+  FlashVolumeManagerP.Leds -> LedsC;
+}
diff --git a/apps/tosthreads/tinyld/SerialLoaderFlash/FlashVolumeManagerP.nc b/apps/tosthreads/tinyld/SerialLoaderFlash/FlashVolumeManagerP.nc
new file mode 100755
index 00000000..f3c1fdd9
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoaderFlash/FlashVolumeManagerP.nc
@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * SerialLoaderFlash is similar to SerialLoader in that it receives
+ * loadable programs from the serial port. However, SerialLoaderFlash
+ * stores them on the external flash. Then, when it receives the command to
+ * load the code, it makes the call to the dynamic loader.
+ * 
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "FlashVolumeManager.h"
+#include "StorageVolumes.h"
+
+generic module FlashVolumeManagerP()
+{
+  uses {
+    interface Boot;
+    interface SplitControl as SerialSplitControl;
+    interface BlockRead;
+    interface BlockWrite;
+    interface AMSend as SerialAMSender;
+    interface Receive as SerialAMReceiver;
+    interface Leds;
+    interface DynamicLoader;
+  }
+}
+
+implementation
+{
+  message_t serialMsg;
+  storage_addr_t dumpAddr = 0;
+  
+  event void Boot.booted() {
+    while (call SerialSplitControl.start() != SUCCESS);
+  }
+  
+  event void SerialSplitControl.startDone(error_t error)
+  {
+    if (error != SUCCESS) {
+      while (call SerialSplitControl.start() != SUCCESS);
+    }
+  }
+    
+  void sendReply(error_t error, storage_len_t len)
+  {
+    SerialReplyPacket *srpkt = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket));
+    if (error == SUCCESS) {
+      srpkt->error = SERIALMSG_SUCCESS;
+    } else {
+      srpkt->error = SERIALMSG_FAIL;
+    }
+    call SerialAMSender.send(AM_BROADCAST_ADDR, &serialMsg, len);
+  }
+  
+  event void BlockRead.readDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error) {
+    sendReply(error, len + sizeof(SerialReplyPacket));
+  }
+  
+  event void BlockRead.computeCrcDone(storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error)
+  {
+    if (error == SUCCESS) {
+      SerialReplyPacket *srpkt = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket));
+      srpkt->data[1] = crc & 0xFF;
+      srpkt->data[0] = (crc >> 8) & 0xFF;
+    }
+    sendReply(error, 2 + sizeof(SerialReplyPacket));
+  }
+  
+  event void BlockWrite.writeDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error)
+  {
+    if (error != SUCCESS) {
+      call Leds.led1On();
+    }
+    sendReply(error, sizeof(SerialReplyPacket));
+  }
+  
+  event void BlockWrite.eraseDone(error_t error) {
+    sendReply(error, sizeof(SerialReplyPacket));
+  }
+    
+  event message_t* SerialAMReceiver.receive(message_t* msg, void* payload, uint8_t len)
+  {
+    uint16_t i;
+    error_t error = SUCCESS;
+    SerialReqPacket *srpkt = (SerialReqPacket *)payload;
+    SerialReplyPacket *serialMsg_payload = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket));
+    
+    switch (srpkt->msg_type) {
+      case SERIALMSG_ERASE :
+        error = call BlockWrite.erase();
+        if (error != SUCCESS) {
+          sendReply(error, sizeof(SerialReplyPacket));
+        }
+        break;
+      case SERIALMSG_WRITE :
+        call Leds.led2On();
+        error = call BlockWrite.write(srpkt->offset, srpkt->data, srpkt->len);
+        if (error != SUCCESS) {
+          sendReply(error, sizeof(SerialReplyPacket));
+          call Leds.led0On();
+        }
+        break;
+      case SERIALMSG_READ :
+        error = call BlockRead.read(srpkt->offset, serialMsg_payload->data, srpkt->len);
+        if (error != SUCCESS) {
+          sendReply(error, sizeof(SerialReplyPacket));
+        }
+        break;
+      case SERIALMSG_CRC :
+        error = call BlockRead.computeCrc(srpkt->offset, srpkt->len, 0);
+        if (error != SUCCESS) {
+          sendReply(error, sizeof(SerialReplyPacket));
+        }
+        break;
+      case SERIALMSG_LEDS:
+        call Leds.set(7);
+        for (i = 0; i < 2000; i++) {}
+        call Leds.set(0);
+        break;
+      case SERIALMSG_RUN :
+        error = call DynamicLoader.loadFromFlash(VOLUME_MICROEXEIMAGE);
+        if (error != SUCCESS)
+          sendReply(error, sizeof(SerialReplyPacket));
+        break;
+    }
+    
+    return msg;
+  }
+  
+  event void DynamicLoader.loadFromFlashDone(uint8_t volumeId, tosthread_t id, error_t error) {
+    sendReply(error, sizeof(SerialReplyPacket));
+  }
+  
+  event void DynamicLoader.loadFromMemoryDone(void *addr, tosthread_t id, error_t error) {}
+  event void BlockWrite.syncDone(error_t error) {}
+  event void SerialAMSender.sendDone(message_t* msg, error_t error) {}
+  event void SerialSplitControl.stopDone(error_t error) {} 
+}
diff --git a/apps/tosthreads/tinyld/SerialLoaderFlash/Makefile b/apps/tosthreads/tinyld/SerialLoaderFlash/Makefile
new file mode 100755
index 00000000..83d3dbeb
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoaderFlash/Makefile
@@ -0,0 +1,22 @@
+COMPONENT=SerialLoaderFlashAppC
+
+GOALS += threads
+
+THREADS_DIR ?= $(TOSDIR)/lib/tosthreads
+CFLAGS += -I$(THREADS_DIR)/lib/tinyld
+CFLAGS += -I$(THREADS_DIR)/csystem
+CFLAGS += -I$(THREADS_DIR)/sensorboards/tmote_onboard
+CFLAGS += -I$(THREADS_DIR)/sensorboards/universal
+CFLAGS += -I$(THREADS_DIR)/lib/net/ctp
+CFLAGS += -I$(THREADS_DIR)/lib/net
+CFLAGS += -I$(TOSDIR)/lib/net
+CFLAGS += -I$(TOSDIR)/lib/net/ctp
+CFLAGS += -I$(TOSDIR)/lib/net/4bitle
+CFLAGS += -I$(THREADS_DIR)/lib/printf
+
+# Creates VolumeMapC.nc
+VOLUME_ALLOCATOR_FLAGS += -t
+
+CLEAN_EXTRA += *.pyc
+
+include $(MAKERULES)
diff --git a/apps/tosthreads/tinyld/SerialLoaderFlash/README b/apps/tosthreads/tinyld/SerialLoaderFlash/README
new file mode 100755
index 00000000..cbeaf477
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoaderFlash/README
@@ -0,0 +1,34 @@
+README for SerialLoaderFlash
+Author/Contact: Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+
+Description:
+
+SerialLoaderFlash is similar to SerialLoader in that it receives
+loadable programs from the serial port. However, SerialLoaderFlash
+stores them on the external flash. Then, when it receives the command to
+load the code, it makes the call to the dynamic loader.
+
+Here are the steps:
+1.) Load SerialLoader:
+    make telosb install bsl,<device_port>
+    
+2.) Create the loadable code, main.tos:
+	cd ../../capps/Blink
+	make telosb dynthreads
+	(the output file needed is ../../capps/Blink/build/telosb/dynthreads/main.tos)	
+
+3.) Erase the external flash:
+    ./serialloader.py <device_port> 0
+
+4.) Upload the binary:
+    ./serialloader.py <device_port> 1 main.tos
+    
+5.) Run the binary:
+    ./serialloader.py <device_port> 7
+
+Tools:
+  None.
+
+Known bugs/limitations:
+  None.
+
diff --git a/apps/tosthreads/tinyld/SerialLoaderFlash/SerialLoaderFlashAppC.nc b/apps/tosthreads/tinyld/SerialLoaderFlash/SerialLoaderFlashAppC.nc
new file mode 100755
index 00000000..e650d1f0
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoaderFlash/SerialLoaderFlashAppC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * SerialLoaderFlash is similar to SerialLoader in that it receives
+ * loadable programs from the serial port. However, SerialLoaderFlash
+ * stores them on the external flash. Then, when it receives the command to
+ * load the code, it makes the call to the dynamic loader.
+ * 
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "StorageVolumes.h"
+
+configuration SerialLoaderFlashAppC {}
+
+implementation {  
+  components DynamicLoaderC,
+             new FlashVolumeManagerC(0xAB),
+             new BlockStorageC(VOLUME_MICROEXEIMAGE) as ImageVolume;
+  
+  FlashVolumeManagerC.BlockRead -> ImageVolume;
+  FlashVolumeManagerC.BlockWrite -> ImageVolume;
+  FlashVolumeManagerC.DynamicLoader -> DynamicLoaderC;
+}
diff --git a/apps/tosthreads/tinyld/SerialLoaderFlash/serialloader.py b/apps/tosthreads/tinyld/SerialLoaderFlash/serialloader.py
new file mode 100755
index 00000000..a967747b
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoaderFlash/serialloader.py
@@ -0,0 +1,239 @@
+#!/usr/bin/env python
+
+# Copyright (c) 2008 Johns Hopkins University.
+# All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+
+import sys, os, stat, struct
+import tinyos
+
+SERIALMSG_AMGROUP = 0
+SERIALMSG_AMID    = 0xAB
+
+SERIALMSG_ERASE = 0
+SERIALMSG_WRITE = 1
+SERIALMSG_READ  = 2
+SERIALMSG_CRC   = 3
+SERIALMSG_LEDS   = 5
+SERIALMSG_RUN   = 7
+
+SERIALMSG_SUCCESS = 0
+SERIALMSG_FAIL    = 1
+
+SERIALMSG_DATA_PAYLOAD_SIZE = 20
+DELUGE_VOLUME_SIZE = 262144
+
+HEX_OUTPUT_LINE_SIZE = 16
+
+class SerialReqPacket(tinyos.GenericPacket):
+  def __init__(self, packet = None):
+      tinyos.GenericPacket.__init__(self,
+                             [('msg_type', 'int', 1),
+                              ('pad', 'int', 1),
+                              ('offset', 'int', 2),
+                              ('len', 'int', 2),
+                              ('data', 'blob', None)],
+                             packet)
+
+class SerialReplyPacket(tinyos.GenericPacket):
+  def __init__(self, packet = None):
+      tinyos.GenericPacket.__init__(self,
+                             [('error', 'int', 1),
+                              ('pad', 'int', 1),
+                             ('data', 'blob', None)],
+                             packet)
+
+# Display an integer representation of byte stream to hex representation
+def print_hex(start_addr, byte_stream):
+  byte_stream = ["%02x" % one_byte for one_byte in byte_stream]   # Converts to each byte to hex
+  
+  num_iterations = int( (len(byte_stream) - 1) / HEX_OUTPUT_LINE_SIZE )
+  num_iterations += 1
+  
+  for i in range(num_iterations):
+    line = "%07x" % start_addr + " "   # Prints memory address
+    for j in range(HEX_OUTPUT_LINE_SIZE):
+      if (i * HEX_OUTPUT_LINE_SIZE + j) < len(byte_stream):
+        line += byte_stream[i * HEX_OUTPUT_LINE_SIZE + j] + " "
+    print line
+    
+    start_addr += HEX_OUTPUT_LINE_SIZE
+
+def op_run(s, sreqpkt):
+  success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload())
+  if success == True:
+    packet = s.read_packet()
+    sreplypkt = SerialReplyPacket(packet[1])
+    return (sreplypkt.error == SERIALMSG_SUCCESS)
+
+def op_erase(s, sreqpkt):
+  success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload())
+  if success == True:
+    packet = s.read_packet()
+    sreplypkt = SerialReplyPacket(packet[1])
+    return (sreplypkt.error == SERIALMSG_SUCCESS)
+
+def op_print(s, sreqpkt, offset, length):
+  if (offset + length) <= DELUGE_VOLUME_SIZE:
+    while length > 0:
+      sreqpkt.offset = offset
+      # Calculates the payload size for the reply packet
+      if length >= HEX_OUTPUT_LINE_SIZE:
+        sreqpkt.len = HEX_OUTPUT_LINE_SIZE
+      else:
+        sreqpkt.len = length
+      
+      success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload())
+      if success == True:
+        packet = s.read_packet()
+        sreplypkt = SerialReplyPacket(packet[1])
+        if sreplypkt.error != SERIALMSG_SUCCESS:
+          return False
+  
+      print_hex(offset, sreplypkt.data)
+      length -= sreqpkt.len
+      offset += sreqpkt.len
+  else:
+    print "ERROR: Specified offset and length are too large for the flash volume"
+    return False
+  
+  return True
+
+def op_write(s, sreqpkt, input_file, length):
+  local_crc = 0
+  input_file_size = length
+  
+  sreqpkt.offset = 0
+  while length > 0:
+    # Calculates the payload size for the current packet
+    if length >= SERIALMSG_DATA_PAYLOAD_SIZE:
+      sreqpkt.len = SERIALMSG_DATA_PAYLOAD_SIZE
+    else:
+      sreqpkt.len = length
+    sreqpkt.data = []
+    
+    # Reads in the file we want to transmit
+    for i in range(sreqpkt.len):
+      sreqpkt.data.append(struct.unpack("B", input_file.read(1))[0])
+    
+    # Sends over serial to the mote
+    if s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload()) == True:
+      # Waiting for confirmation
+      packet = s.read_packet()
+      sreplypkt = SerialReplyPacket(packet[1])
+      if sreplypkt.error != SERIALMSG_SUCCESS:
+        return False
+      local_crc = s.crc16(local_crc, sreqpkt.data)   # Computes running CRC
+    else:
+      print "ERROR: Unable to write to flash"
+      return False
+    
+    length -= sreqpkt.len
+    sreqpkt.offset += sreqpkt.len
+  
+  # Check local and remote CRC
+  sreqpkt.msg_type = SERIALMSG_CRC
+  remote_crc = op_crc(s, sreqpkt, 0, input_file_size)
+  if remote_crc != None:
+    local_crc = [(local_crc >> 8) & 0xFF, local_crc & 0xFF]
+    print "Local CRC:  " + ("%02x" % local_crc[0]) + " " + ("%02x" % local_crc[1])
+    print "Remote CRC: " + ("%02x" % remote_crc[0]) + " " + ("%02x" % remote_crc[1])
+    if remote_crc != local_crc:
+      print "ERROR: Remote CRC doesn't match local CRC"
+      return False
+  else:
+    print "ERROR: Unable to verify CRC"
+    return False
+    
+  return True
+
+def op_crc(s, sreqpkt, offset, length):
+  sreqpkt.offset = offset
+  sreqpkt.len = length
+  success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload())
+  if success == True:
+    packet = s.read_packet()
+    sreplypkt = SerialReplyPacket(packet[1])
+    if sreplypkt.error == SERIALMSG_SUCCESS:
+      return sreplypkt.data
+    else:
+      return None
+
+def op_leds(s, sreqpkt):
+  success = s.write_packet(SERIALMSG_AMGROUP, SERIALMSG_AMID, sreqpkt.payload())
+
+# ======== MAIN ======== #
+if len(sys.argv) >= 3:
+  sys.argv[2] = int(sys.argv[2])
+  
+  s = tinyos.Serial(sys.argv[1], 57600)
+  s.set_debug(False)   # Disables debug msg
+  sreqpkt = SerialReqPacket((sys.argv[2], 0, 0, 0, []))   # msg_type, pad, offset, length, data
+  
+  if sys.argv[2] == SERIALMSG_RUN:
+    if op_run(s, sreqpkt) == True:
+      print "Loaded image should be running now!"
+    else:
+      print "ERROR: Unable to run loaded image"
+  elif sys.argv[2] == SERIALMSG_ERASE:
+    if op_erase(s, sreqpkt) == True:
+      print "Flash volume has been erased"
+    else:
+      print "ERROR: Unable to erase flash volume"
+    
+  elif sys.argv[2] == SERIALMSG_WRITE:
+    input_file = file(sys.argv[3], 'rb')
+    fileStats = os.stat(sys.argv[3])
+    
+    if fileStats[stat.ST_SIZE] <= DELUGE_VOLUME_SIZE:
+      #sreqpkt = SerialReqPacket((SERIALMSG_LEDS, 0, 0, 0, []))
+      #op_leds(s, sreqpkt)
+      sreqpkt = SerialReqPacket((sys.argv[2], 0, 0, 0, []))
+      if op_write(s, sreqpkt, input_file, fileStats[stat.ST_SIZE]) == True:
+        print "File has been successfully transmitted (" + str(fileStats[stat.ST_SIZE]) + " bytes)"
+      else:
+        print "ERROR: Unable to transmit file"
+      sreqpkt = SerialReqPacket((SERIALMSG_LEDS, 0, 0, 0, []))
+      op_leds(s, sreqpkt)
+    else:
+      print "ERROR: File is larger than flash volume (" + DELUGE_VOLUME_SIZE + ")"
+  
+  elif sys.argv[2] == SERIALMSG_READ:
+    data = op_print(s, sreqpkt, int(sys.argv[3]), int(sys.argv[4]))
+    if data != True:
+      print "ERROR: Unable to read the specified range"
+    
+  elif sys.argv[2] == SERIALMSG_CRC:
+    remote_crc = op_crc(s, sreqpkt, int(sys.argv[3]), int(sys.argv[4]))
+    if remote_crc != None:
+      print_hex(0, remote_crc)
+    else:
+      print "ERROR: Unable to compute remote CRC"
diff --git a/apps/tosthreads/tinyld/SerialLoaderFlash/tinyos.py b/apps/tosthreads/tinyld/SerialLoaderFlash/tinyos.py
new file mode 100755
index 00000000..e922f58c
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoaderFlash/tinyos.py
@@ -0,0 +1,223 @@
+import struct, time, serial
+
+class Serial:
+  HDLC_FLAG_BYTE = 0x7e
+  HDLC_CTLESC_BYTE = 0x7d
+  
+  TOS_SERIAL_ACTIVE_MESSAGE_ID = 0
+  TOS_SERIAL_CC1000_ID = 1
+  TOS_SERIAL_802_15_4_ID = 2
+  TOS_SERIAL_UNKNOWN_ID = 255
+  
+  SERIAL_PROTO_ACK = 67
+  SERIAL_PROTO_PACKET_ACK = 68
+  SERIAL_PROTO_PACKET_NOACK = 69
+  SERIAL_PROTO_PACKET_UNKNOWN = 255
+  
+  __s = None;       # An instance of serial.Serial object
+  __debug = True   # Debug mode
+  
+  def __init__(self, port, baudrate):
+     self.__s = serial.Serial(port, baudrate, rtscts=0)
+  
+  def __format_packet(self, packet):
+      return " ".join(["%02x" % p for p in packet]) + " | " + \
+             " ".join(["%d" % p for p in packet])
+  
+  def crc16(self, base_crc, frame_data):
+      crc = base_crc
+      for b in frame_data:
+          crc = crc ^ (b << 8)
+          for i in range(0, 8):
+              if crc & 0x8000 == 0x8000:
+                  crc = (crc << 1) ^ 0x1021
+              else:
+                  crc = crc << 1
+              crc = crc & 0xffff
+      return crc
+  
+  def __encode(self, val, dim):
+      output = []
+      for i in range(dim):
+          output.append(val & 0xFF)
+          val = val >> 8
+      return output
+  
+  def __decode(self, v):
+      r = long(0)
+      for i in v[::-1]:
+          r = (r << 8) + i
+      return r
+  
+  def __get_byte(self):
+      r = struct.unpack("B", self.__s.read())[0]
+      return r
+  
+  def __put_bytes(self, data):
+      for b in data:
+          self.__s.write(struct.pack('B', b))
+  
+  def __unescape(self, packet):
+      r = []
+      esc = False
+      for b in packet:
+          if esc:
+              r.append(b ^ 0x20)
+              esc = False
+          elif b == self.HDLC_CTLESC_BYTE:
+              esc = True
+          else:
+              r.append(b)
+      return r
+  
+  def __escape(self, packet):
+      r = []
+      for b in packet:
+          if b == self.HDLC_FLAG_BYTE or b == self.HDLC_CTLESC_BYTE:
+              r.append(self.HDLC_CTLESC_BYTE)
+              r.append(b ^ 0x20)
+          else:
+              r.append(b)
+      return r
+  
+  def read_packet(self):
+      d = self.__get_byte()
+      ts = time.time()
+      while d != self.HDLC_FLAG_BYTE:
+          d = self.__get_byte()
+          ts = time.time()
+      packet = [d]
+      d = self.__get_byte()
+      if d == self.HDLC_FLAG_BYTE:
+          d = self.__get_byte()
+          ts = time.time()
+      else:
+          packet.append(d)
+      while d != self.HDLC_FLAG_BYTE:
+          d = self.__get_byte()
+          packet.append(d)
+      un_packet = self.__unescape(packet)
+      crc = self.crc16(0, un_packet[1:-3])
+      packet_crc = self.__decode(un_packet[-3:-1])
+      if crc != packet_crc:
+          print "Warning: wrong CRC!"
+      if self.__debug == True:
+          print "Recv:", self.__format_packet(un_packet)
+      return (ts, un_packet)
+      
+  def write_packet(self, am_group, am_id, data):
+      # The first byte after SERIAL_PROTO_PACKET_ACK is a sequence
+      # number that will be send back by the mote to ack the receive of
+      # the data.
+      packet = [self.SERIAL_PROTO_PACKET_ACK, 0, self.TOS_SERIAL_ACTIVE_MESSAGE_ID,
+                0xff, 0xff,
+                0, 0,
+                len(data), am_group, am_id] + data;
+      crc = self.crc16(0, packet)
+      packet.append(crc & 0xff)
+      packet.append((crc >> 8) & 0xff)
+      packet = [self.HDLC_FLAG_BYTE] + self.__escape(packet) + [self.HDLC_FLAG_BYTE]
+      if self.__debug == True:
+          print "Send:", self.__format_packet(packet)
+      self.__put_bytes(packet)
+      
+      # Waiting for ACK
+      packet = self.read_packet()
+      if len(packet) > 1 and len(packet[1]) > 1:
+        return ((packet[1])[1] == self.SERIAL_PROTO_ACK)
+      return False
+  
+  def set_debug(self, debug):
+      self.__debug = debug
+
+class GenericPacket:
+    """ GenericPacket """
+
+    def __decode(self, v):
+        r = long(0)
+        for i in v:
+            r = (r << 8) + i
+        return r
+    
+    def __encode(self, val, dim):
+        output = []
+        for i in range(dim):
+            output.append(int(val & 0xFF))
+            val = val >> 8
+        output.reverse()
+        return output
+
+    def __init__(self, desc, packet = None):
+        self.__dict__['_schema'] = [(t, s) for (n, t, s) in desc]
+        self.__dict__['_names'] = [n for (n, t, s) in desc]
+        self.__dict__['_values'] = []
+        offset = 10
+        if type(packet) == type([]):
+            for (t, s) in self._schema:
+                if t == 'int':
+                    self._values.append(self.__decode(packet[offset:offset + s]))
+                    offset += s
+                elif t == 'blob':
+                    if s:
+                        self._values.append(packet[offset:offset + s])
+                        offset += s
+                    else:
+                        self._values.append(packet[offset:-3])
+        elif type(packet) == type(()):
+            for i in packet:
+                self._values.append(i)
+        else:
+            for v in self._schema:
+                self._values.append(None)
+
+    def __repr__(self):
+        return self._values.__repr__()
+
+    def __str__(self):
+        return self._values.__str__()
+
+    # Implement the map behavior
+    def __getitem__(self, key):
+        return self.__getattr__(key)
+
+    def __setitem__(self, key, value):
+        self.__setattr__(key, value)
+
+    def __len__(self):
+        return len(self._values)
+
+    def keys(self):
+        return self._names
+
+    def values(self):
+        return self._names
+
+    # Implement the struct behavior
+    def __getattr__(self, name):
+        if type(name) == type(0):
+            return self._names[name]
+        else:
+            return self._values[self._names.index(name)]
+
+    def __setattr__(self, name, value):
+        if type(name) == type(0):
+            self._values[name] = value
+        else:
+            self._values[self._names.index(name)] = value
+
+    # Custom
+    def names(self):
+        return self._names
+
+    def sizes(self):
+        return self._schema
+
+    def payload(self):
+        r = []
+        for i in range(len(self._schema)):
+            (t, s) = self._schema[i]
+            if t == 'int':
+                r += self.__encode(self._values[i], s)
+            else:
+                r += self._values[i]
+        return r
diff --git a/apps/tosthreads/tinyld/SerialLoaderFlash/volumes-at45db.xml b/apps/tosthreads/tinyld/SerialLoaderFlash/volumes-at45db.xml
new file mode 100644
index 00000000..26c8665f
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoaderFlash/volumes-at45db.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="MICROEXEIMAGE" size="262144" type="block"/>
+</volume_table>          
diff --git a/apps/tosthreads/tinyld/SerialLoaderFlash/volumes-stm25p.xml b/apps/tosthreads/tinyld/SerialLoaderFlash/volumes-stm25p.xml
new file mode 100755
index 00000000..801def91
--- /dev/null
+++ b/apps/tosthreads/tinyld/SerialLoaderFlash/volumes-stm25p.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="MICROEXEIMAGE" size="262144" type="block"/>
+</volume_table>
diff --git a/apps/tutorials/BlinkConfig/BlinkConfigAppC.nc b/apps/tutorials/BlinkConfig/BlinkConfigAppC.nc
new file mode 100644
index 00000000..5667e195
--- /dev/null
+++ b/apps/tutorials/BlinkConfig/BlinkConfigAppC.nc
@@ -0,0 +1,57 @@
+// $Id: BlinkConfigAppC.nc,v 1.6 2010-06-29 22:07:40 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2006 The Regents of the University of
+ * California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "StorageVolumes.h"
+#include "Timer.h"
+
+/**
+ * Application to demonstrate the ConfigStorageC abstraction.  A timer
+ * period is read from flash, divided by two, and written back to
+ * flash.  An LED is toggled each time the timer fires.
+ *
+ * @author Prabal Dutta <prabal@cs.berkeley.edu>
+ */
+configuration BlinkConfigAppC {
+}
+implementation {
+  components BlinkConfigC as App;
+  components new ConfigStorageC(VOLUME_CONFIGTEST);
+  components MainC, LedsC, PlatformC, SerialActiveMessageC;
+  components new TimerMilliC() as Timer0;
+
+  App.Boot   -> MainC.Boot;
+  App.Config -> ConfigStorageC.ConfigStorage;
+  App.Mount  -> ConfigStorageC.Mount;
+  App.Leds   -> LedsC;
+  App.Timer0 -> Timer0;
+}
diff --git a/apps/tutorials/BlinkConfig/BlinkConfigC.nc b/apps/tutorials/BlinkConfig/BlinkConfigC.nc
new file mode 100644
index 00000000..7f8e262e
--- /dev/null
+++ b/apps/tutorials/BlinkConfig/BlinkConfigC.nc
@@ -0,0 +1,151 @@
+// $Id: BlinkConfigC.nc,v 1.7 2010-06-29 22:07:40 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2006 The Regents of the University of
+ * California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Application to demonstrate the ConfigStorageC abstraction.  A timer
+ * period is read from flash, divided by two, and written back to
+ * flash.  An LED is toggled each time the timer fires.
+ *
+ * @author Prabal Dutta <prabal@cs.berkeley.edu>
+ */
+#include <Timer.h>
+
+module BlinkConfigC {
+  uses {
+    interface Boot;
+    interface Leds;
+    interface ConfigStorage as Config;
+    interface Mount as Mount;
+    interface Timer<TMilli> as Timer0;
+  }
+}
+implementation {
+
+  typedef struct config_t {
+    uint16_t version;
+    uint16_t period;
+  } config_t;
+
+  enum {
+    CONFIG_ADDR = 0,
+    CONFIG_VERSION = 1,
+    DEFAULT_PERIOD = 1024,
+    MIN_PERIOD     = 128,
+    MAX_PERIOD     = 1024
+  };
+
+  uint8_t state;
+  config_t conf;
+
+  event void Boot.booted() {
+    conf.period = DEFAULT_PERIOD;
+
+    if (call Mount.mount() != SUCCESS) {
+      // Handle failure
+    }
+  }
+
+  event void Mount.mountDone(error_t error) {
+    if (error == SUCCESS) {
+      if (call Config.valid() == TRUE) {
+        if (call Config.read(CONFIG_ADDR, &conf, sizeof(conf)) != SUCCESS) {
+          // Handle failure
+	}
+      }
+      else {
+	// Invalid volume.  Commit to make valid.
+	call Leds.led1On();
+	if (call Config.commit() == SUCCESS) {
+	  call Leds.led0On();
+	}
+	else {
+	  // Handle failure
+	}
+      }
+    }
+    else{
+      // Handle failure
+    }
+  }
+
+  event void Config.readDone(storage_addr_t addr, void* buf, 
+    storage_len_t len, error_t err) __attribute__((noinline)) {
+
+    if (err == SUCCESS) {
+      memcpy(&conf, buf, len);
+      if (conf.version == CONFIG_VERSION) {
+        conf.period = conf.period/2;
+	conf.period = conf.period > MAX_PERIOD ? MAX_PERIOD : conf.period;
+        conf.period = conf.period < MIN_PERIOD ? MAX_PERIOD : conf.period;
+      }
+      else {
+        // Version mismatch. Restore default.
+	call Leds.led1On();
+        conf.version = CONFIG_VERSION;
+        conf.period = DEFAULT_PERIOD;
+      }
+      call Leds.led0On();
+      call Config.write(CONFIG_ADDR, &conf, sizeof(conf));
+    }
+    else {
+      // Handle failure.
+    }
+  }
+
+  event void Config.writeDone(storage_addr_t addr, void *buf, 
+    storage_len_t len, error_t err) {
+    // Verify addr and len
+
+    if (err == SUCCESS) {
+      if (call Config.commit() != SUCCESS) {
+        // Handle failure
+      }
+    }
+    else {
+      // Handle failure
+    }
+  }
+
+  event void Config.commitDone(error_t err) {
+    call Leds.led0Off();
+    call Timer0.startPeriodic(conf.period);
+    if (err == SUCCESS) {
+      // Handle failure
+    }
+  }
+
+  event void Timer0.fired() {
+    call Leds.led2Toggle();
+  }
+}
diff --git a/apps/tutorials/BlinkConfig/Makefile b/apps/tutorials/BlinkConfig/Makefile
new file mode 100644
index 00000000..eda3bcdd
--- /dev/null
+++ b/apps/tutorials/BlinkConfig/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=BlinkConfigAppC
+include $(MAKERULES)
diff --git a/apps/tutorials/BlinkConfig/README.txt b/apps/tutorials/BlinkConfig/README.txt
new file mode 100644
index 00000000..dd474402
--- /dev/null
+++ b/apps/tutorials/BlinkConfig/README.txt
@@ -0,0 +1,38 @@
+$Id: README.txt,v 1.7 2007-04-06 02:48:44 prabal Exp $
+
+README for Config
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+  Application to demonstrate the ConfigStorageC abstraction.  A timer
+  period is read from flash, divided by two, and written back to
+  flash.  An LED is toggled each time the timer fires.
+
+  To use this application:
+
+    (i)   Program a mote with this application (e.g. make telos install)
+    (ii)  Wait until the red LED turns off (writing to flash is done)
+    (iii) Power cycle the mote and wait until the red LED turns off.
+    (iv)  Repeat step (iii) and notice that the blink rate of the blue 
+          (yellow) LED doubles each time the mote is power cycled.  The 
+          blink rate cycles through the following values: 1Hz, 2Hz, 4Hz, 
+          and 8Hz.
+
+  The first two times this application is installed, the green LED
+  will light up and remain on (the first time indicating that the
+  storage volume is not valid and second time that the volume does not
+  have the expected version number).
+
+  The red LED will remain lit during the flash write/commit operation.
+
+  The blue (yellow) LED blinks with the period stored and read from
+  flash.
+
+  See Lesson 7 for details.
+
+Tools:
+
+Known bugs/limitations:
+
+None.
diff --git a/apps/tutorials/BlinkConfig/volumes-at45db.xml b/apps/tutorials/BlinkConfig/volumes-at45db.xml
new file mode 100644
index 00000000..7cc59802
--- /dev/null
+++ b/apps/tutorials/BlinkConfig/volumes-at45db.xml
@@ -0,0 +1,4 @@
+<volume_table>
+  <volume name="LOGTEST" size="262144"/>
+  <volume name="CONFIGTEST" size="4608"/>
+</volume_table>
diff --git a/apps/tutorials/BlinkConfig/volumes-stm25p.xml b/apps/tutorials/BlinkConfig/volumes-stm25p.xml
new file mode 100644
index 00000000..adce9924
--- /dev/null
+++ b/apps/tutorials/BlinkConfig/volumes-stm25p.xml
@@ -0,0 +1,4 @@
+<volume_table>
+  <volume name="LOGTEST" size="262144"/>
+  <volume name="CONFIGTEST" size="131072"/>
+</volume_table>
diff --git a/apps/tutorials/BlinkFail/BlinkFailAppC.nc b/apps/tutorials/BlinkFail/BlinkFailAppC.nc
new file mode 100644
index 00000000..ff12b757
--- /dev/null
+++ b/apps/tutorials/BlinkFail/BlinkFailAppC.nc
@@ -0,0 +1,69 @@
+// $Id: BlinkFailAppC.nc,v 1.3 2010-06-29 22:07:40 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * BlinkFail is a basic application that toggles the a mote LED periodically and
+ * then accesses out of bounds storage as a demonstration and sanity check for
+ * Safe TinyOS.
+ *
+ * @author tinyos-help@millennium.berkeley.edu
+ **/
+
+configuration BlinkFailAppC
+{
+}
+implementation
+{
+  components MainC, BlinkFailC, LedsC;
+  components new TimerMilliC() as Timer0;
+  components new TimerMilliC() as Timer1;
+  components new TimerMilliC() as Timer2;
+
+
+  BlinkFailC -> MainC.Boot;
+
+  BlinkFailC.Timer0 -> Timer0;
+  BlinkFailC.Timer1 -> Timer1;
+  BlinkFailC.Timer2 -> Timer2;
+  BlinkFailC.Leds -> LedsC;
+}
+
diff --git a/apps/tutorials/BlinkFail/BlinkFailC.nc b/apps/tutorials/BlinkFail/BlinkFailC.nc
new file mode 100644
index 00000000..9563906b
--- /dev/null
+++ b/apps/tutorials/BlinkFail/BlinkFailC.nc
@@ -0,0 +1,90 @@
+// $Id: BlinkFailC.nc,v 1.3 2010-06-29 22:07:40 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Implementation for BlinkFail application.  Toggle the LEDs when a
+ * Timer fires.  Access out of bounds storage after a few seconds.
+ **/
+
+#include "Timer.h"
+
+module BlinkFailC @safe()
+{
+  uses interface Timer<TMilli> as Timer0;
+  uses interface Timer<TMilli> as Timer1;
+  uses interface Timer<TMilli> as Timer2;
+  uses interface Leds;
+  uses interface Boot;
+}
+implementation
+{
+  event void Boot.booted()
+  {
+    call Timer0.startPeriodic( 250 );
+    call Timer1.startPeriodic( 500 );
+    call Timer2.startPeriodic( 1000 );
+  }
+
+  event void Timer0.fired()
+  {
+    dbg("BlinkFailC", "Timer 0 fired @ %s.\n", sim_time_string());
+    call Leds.led0Toggle();
+  }
+  
+  int a[10];
+  int i;
+
+  event void Timer1.fired()
+  {
+    dbg("BlinkFailC", "Timer 1 fired @ %s \n", sim_time_string());
+    call Leds.led1Toggle();
+    // here we violate memory safety on the 11th signal of this event
+    a[i++] = 1;
+  }
+  
+  event void Timer2.fired()
+  {
+    dbg("BlinkFailC", "Timer 2 fired @ %s.\n", sim_time_string());
+    call Leds.led2Toggle();
+  }
+}
+
diff --git a/apps/tutorials/BlinkFail/Makefile b/apps/tutorials/BlinkFail/Makefile
new file mode 100644
index 00000000..c58ac9db
--- /dev/null
+++ b/apps/tutorials/BlinkFail/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=BlinkFailAppC
+include $(MAKERULES)
+
diff --git a/apps/tutorials/BlinkFail/README.txt b/apps/tutorials/BlinkFail/README.txt
new file mode 100644
index 00000000..39d6b371
--- /dev/null
+++ b/apps/tutorials/BlinkFail/README.txt
@@ -0,0 +1,29 @@
+README for Blink
+Author/Contact: tinyos-help@millennium.berkeley.edu
+
+Description:
+
+BlinkFail is based on Blink (described below).  It is designed to
+violate memory safety after a few seconds and is used as a
+demonstration and sanity check for Safe TinyOS.  For more information
+about Safe TinyOS see here:
+
+  http://www.cs.utah.edu/~coop/safetinyos/
+
+Blink is a simple application that blinks the 3 mote LEDs. It tests
+that the boot sequence and millisecond timers are working properly.
+The three LEDs blink at 1Hz, 2Hz, and 4Hz. Because each is driven by
+an independent timer, visual inspection can determine whether there
+are bugs in the timer system that are causing drift. Note that this
+method is different than RadioCountToLeds, which fires a single timer
+at a steady rate and uses the bottom three bits of a counter to
+display on the LEDs.
+
+Tools:
+
+Known bugs/limitations:
+
+None.
+
+
+$Id: README.txt,v 1.2 2008-07-03 18:41:36 regehr Exp $
diff --git a/apps/tutorials/BlinkTask/BlinkTaskAppC.nc b/apps/tutorials/BlinkTask/BlinkTaskAppC.nc
new file mode 100644
index 00000000..e56275be
--- /dev/null
+++ b/apps/tutorials/BlinkTask/BlinkTaskAppC.nc
@@ -0,0 +1,60 @@
+// $Id: BlinkTaskAppC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * 
+ * @author tinyos-help@millennium.berkeley.edu
+ **/
+
+configuration BlinkTaskAppC
+{
+}
+implementation
+{
+  components MainC, BlinkTaskC, LedsC;
+  components new TimerMilliC() as Timer0;
+
+  BlinkTaskC -> MainC.Boot;
+  BlinkTaskC.Timer0 -> Timer0;
+  BlinkTaskC.Leds -> LedsC;
+}
+
diff --git a/apps/tutorials/BlinkTask/BlinkTaskC.nc b/apps/tutorials/BlinkTask/BlinkTaskC.nc
new file mode 100644
index 00000000..15a7fb28
--- /dev/null
+++ b/apps/tutorials/BlinkTask/BlinkTaskC.nc
@@ -0,0 +1,82 @@
+// $Id: BlinkTaskC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ */
+
+/**
+ * BlinkTask demo application: simple example of posting a task in TinyOS.
+ * 
+ * @author Kristin Wright
+ *
+ */
+
+/**
+ * Blink Led0 every second. For expository purposes, use a task to 
+ * toggle the LED.
+ **/
+
+#include "Timer.h"
+
+module BlinkTaskC
+{
+  uses interface Timer<TMilli> as Timer0;
+  uses interface Leds;
+  uses interface Boot;
+}
+implementation
+{
+  task void toggle() 
+  {
+    call Leds.led0Toggle();
+  }
+
+  event void Boot.booted()
+  {
+    call Timer0.startPeriodic( 1000 );
+  }
+
+  event void Timer0.fired()
+  {
+    post toggle();
+  }
+
+}
+
diff --git a/apps/tutorials/BlinkTask/Makefile b/apps/tutorials/BlinkTask/Makefile
new file mode 100644
index 00000000..349fe480
--- /dev/null
+++ b/apps/tutorials/BlinkTask/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=BlinkTaskAppC
+
+include $(MAKERULES)
+
diff --git a/apps/tutorials/BlinkTask/README.txt b/apps/tutorials/BlinkTask/README.txt
new file mode 100644
index 00000000..235fc6ab
--- /dev/null
+++ b/apps/tutorials/BlinkTask/README.txt
@@ -0,0 +1,22 @@
+$Id: README.txt,v 1.4 2006-12-12 18:22:52 vlahan Exp $
+
+README for BlinkTask
+
+Author/Contact:
+
+  tinyos-help@millennium.berkeley.edu
+
+Description:
+
+  The BlinkTask application: a simple example of how to post a task
+  in TinyOS. A periodic timer is set to fire every 
+  second. The Timer.fired() event posts a task to toggle the LEDs
+  rather than toggling the LEDs directly. 
+
+Tools:
+
+  None
+
+Known bugs/limitations:
+
+  None.
\ No newline at end of file
diff --git a/apps/tutorials/BlinkToRadio/BlinkToRadio.h b/apps/tutorials/BlinkToRadio/BlinkToRadio.h
new file mode 100644
index 00000000..e8c08e6a
--- /dev/null
+++ b/apps/tutorials/BlinkToRadio/BlinkToRadio.h
@@ -0,0 +1,16 @@
+// $Id: BlinkToRadio.h,v 1.4 2006-12-12 18:22:52 vlahan Exp $
+
+#ifndef BLINKTORADIO_H
+#define BLINKTORADIO_H
+
+enum {
+  AM_BLINKTORADIO = 6,
+  TIMER_PERIOD_MILLI = 250
+};
+
+typedef nx_struct BlinkToRadioMsg {
+  nx_uint16_t nodeid;
+  nx_uint16_t counter;
+} BlinkToRadioMsg;
+
+#endif
diff --git a/apps/tutorials/BlinkToRadio/BlinkToRadioAppC.nc b/apps/tutorials/BlinkToRadio/BlinkToRadioAppC.nc
new file mode 100644
index 00000000..cfc8a874
--- /dev/null
+++ b/apps/tutorials/BlinkToRadio/BlinkToRadioAppC.nc
@@ -0,0 +1,72 @@
+// $Id: BlinkToRadioAppC.nc,v 1.5 2010-06-29 22:07:40 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Application file for the BlinkToRadio application.  A counter is
+ * incremented and a radio message is sent whenever a timer fires.
+ * Whenever a radio message is received, the three least significant
+ * bits of the counter in the message payload are displayed on the
+ * LEDs.  Program two motes with this application.  As long as they
+ * are both within range of each other, the LEDs on both will keep
+ * changing.  If the LEDs on one (or both) of the nodes stops changing
+ * and hold steady, then that node is no longer receiving any messages
+ * from the other node.
+ *
+ * @author Prabal Dutta
+ * @date   Feb 1, 2006
+ */
+#include <Timer.h>
+#include "BlinkToRadio.h"
+
+configuration BlinkToRadioAppC {
+}
+implementation {
+  components MainC;
+  components LedsC;
+  components BlinkToRadioC as App;
+  components new TimerMilliC() as Timer0;
+  components ActiveMessageC;
+  components new AMSenderC(AM_BLINKTORADIO);
+  components new AMReceiverC(AM_BLINKTORADIO);
+
+  App.Boot -> MainC;
+  App.Leds -> LedsC;
+  App.Timer0 -> Timer0;
+  App.Packet -> AMSenderC;
+  App.AMPacket -> AMSenderC;
+  App.AMControl -> ActiveMessageC;
+  App.AMSend -> AMSenderC;
+  App.Receive -> AMReceiverC;
+}
diff --git a/apps/tutorials/BlinkToRadio/BlinkToRadioC.nc b/apps/tutorials/BlinkToRadio/BlinkToRadioC.nc
new file mode 100644
index 00000000..24b21d1b
--- /dev/null
+++ b/apps/tutorials/BlinkToRadio/BlinkToRadioC.nc
@@ -0,0 +1,130 @@
+// $Id: BlinkToRadioC.nc,v 1.6 2010-06-29 22:07:40 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Implementation of the BlinkToRadio application.  A counter is
+ * incremented and a radio message is sent whenever a timer fires.
+ * Whenever a radio message is received, the three least significant
+ * bits of the counter in the message payload are displayed on the
+ * LEDs.  Program two motes with this application.  As long as they
+ * are both within range of each other, the LEDs on both will keep
+ * changing.  If the LEDs on one (or both) of the nodes stops changing
+ * and hold steady, then that node is no longer receiving any messages
+ * from the other node.
+ *
+ * @author Prabal Dutta
+ * @date   Feb 1, 2006
+ */
+#include <Timer.h>
+#include "BlinkToRadio.h"
+
+module BlinkToRadioC {
+  uses interface Boot;
+  uses interface Leds;
+  uses interface Timer<TMilli> as Timer0;
+  uses interface Packet;
+  uses interface AMPacket;
+  uses interface AMSend;
+  uses interface Receive;
+  uses interface SplitControl as AMControl;
+}
+implementation {
+
+  uint16_t counter;
+  message_t pkt;
+  bool busy = FALSE;
+
+  void setLeds(uint16_t val) {
+    if (val & 0x01)
+      call Leds.led0On();
+    else 
+      call Leds.led0Off();
+    if (val & 0x02)
+      call Leds.led1On();
+    else
+      call Leds.led1Off();
+    if (val & 0x04)
+      call Leds.led2On();
+    else
+      call Leds.led2Off();
+  }
+
+  event void Boot.booted() {
+    call AMControl.start();
+  }
+
+  event void AMControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+      call Timer0.startPeriodic(TIMER_PERIOD_MILLI);
+    }
+    else {
+      call AMControl.start();
+    }
+  }
+
+  event void AMControl.stopDone(error_t err) {
+  }
+
+  event void Timer0.fired() {
+    counter++;
+    if (!busy) {
+      BlinkToRadioMsg* btrpkt = 
+	(BlinkToRadioMsg*)(call Packet.getPayload(&pkt, sizeof(BlinkToRadioMsg)));
+      if (btrpkt == NULL) {
+	return;
+      }
+      btrpkt->nodeid = TOS_NODE_ID;
+      btrpkt->counter = counter;
+      if (call AMSend.send(AM_BROADCAST_ADDR, 
+          &pkt, sizeof(BlinkToRadioMsg)) == SUCCESS) {
+        busy = TRUE;
+      }
+    }
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t err) {
+    if (&pkt == msg) {
+      busy = FALSE;
+    }
+  }
+
+  event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){
+    if (len == sizeof(BlinkToRadioMsg)) {
+      BlinkToRadioMsg* btrpkt = (BlinkToRadioMsg*)payload;
+      setLeds(btrpkt->counter);
+    }
+    return msg;
+  }
+}
diff --git a/apps/tutorials/BlinkToRadio/Makefile b/apps/tutorials/BlinkToRadio/Makefile
new file mode 100644
index 00000000..b7135212
--- /dev/null
+++ b/apps/tutorials/BlinkToRadio/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=BlinkToRadioAppC
+include $(MAKERULES)
+
diff --git a/apps/tutorials/BlinkToRadio/README.txt b/apps/tutorials/BlinkToRadio/README.txt
new file mode 100644
index 00000000..30e2cb0b
--- /dev/null
+++ b/apps/tutorials/BlinkToRadio/README.txt
@@ -0,0 +1,27 @@
+$Id: README.txt,v 1.4 2006-12-12 18:22:52 vlahan Exp $
+
+README for Blink
+
+Author/Contact:
+
+  tinyos-help@millennium.berkeley.edu
+
+Description:
+
+  The BlinkToRadio application.  A counter is incremented and a radio
+  message is sent whenever a timer fires.  Whenever a radio message is
+  received, the three least significant bits of the counter in the
+  message payload are displayed on the LEDs.  Program two motes with
+  this application.  As long as they are both within range of each
+  other, the LEDs on both will keep changing.  If the LEDs on one (or
+  both) of the nodes stops changing and hold steady, then that node is
+  no longer receiving any messages from the other node.
+
+
+Tools:
+
+  None
+
+Known bugs/limitations:
+
+  None.
\ No newline at end of file
diff --git a/apps/tutorials/LowPowerSensing/Base/LowPowerSensingBaseAppC.nc b/apps/tutorials/LowPowerSensing/Base/LowPowerSensingBaseAppC.nc
new file mode 100644
index 00000000..3a0b7c16
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/Base/LowPowerSensingBaseAppC.nc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#include "LowPowerSensingConstants.h"
+configuration LowPowerSensingBaseAppC{}
+implementation {
+  components MainC, LowPowerSensingBaseC as App;
+  components new QueueC(message_t, MSG_QUEUE_SIZE) as Queue;
+  components LedsC;
+  MainC.Boot <- App;
+  App.MsgQueue -> Queue;
+  App.Leds -> LedsC;
+
+  components SerialActiveMessageC as Serial;
+  App.SerialAMControl -> Serial;
+  App.SerialAMPacket -> Serial;
+  App.SerialPacket -> Serial;
+
+  components ActiveMessageC as Radio;
+  App.RadioAMControl -> Radio;
+  App.RadioAMPacket -> Radio;
+  App.RadioPacket -> Radio;
+
+  components new SerialAMReceiverC(AM_SERIAL_REQUEST_SAMPLES_MSG) as SerialRequestSampleMsgsReceiver;
+  components new AMSenderC(AM_REQUEST_SAMPLES_MSG) as RadioRequestSampleMsgsSender;
+  App.SerialRequestSampleMsgsReceive -> SerialRequestSampleMsgsReceiver;
+  App.RadioRequestSampleMsgsSend -> RadioRequestSampleMsgsSender;
+
+  components new AMReceiverC(AM_SAMPLE_MSG) as RadioSampleMsgReceiver;
+  components new SerialAMSenderC(AM_SERIAL_SAMPLE_MSG) as SerialSampleMsgSender;
+  App.RadioSampleMsgReceive -> RadioSampleMsgReceiver;
+  App.SerialSampleMsgSend -> SerialSampleMsgSender;
+
+//Nasty hack since no uniform way of prividing LPL support as of yet
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_TMOTE) || defined(PLATFORM_MICAZ)
+  components CC2420ActiveMessageC as LPLProvider;
+  App.LPL -> LPLProvider;
+#endif
+
+#if defined(PLATFORM_MICA2)
+  components CC1000CsmaRadioC as LPLProvider;
+  App.LPL -> LPLProvider;
+#endif
+
+#if defined(PLATFORM_IRIS)
+  components ActiveMessageC as LPLProvider;
+  App.LPL -> LPLProvider;
+#endif
+}
+
diff --git a/apps/tutorials/LowPowerSensing/Base/LowPowerSensingBaseC.nc b/apps/tutorials/LowPowerSensing/Base/LowPowerSensingBaseC.nc
new file mode 100644
index 00000000..7e7454c2
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/Base/LowPowerSensingBaseC.nc
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+ 
+#include "LowPowerSensingConstants.h"
+module LowPowerSensingBaseC {
+  uses {
+    interface Boot;
+    interface Queue<message_t> as MsgQueue;
+    interface Leds;
+    interface LowPowerListening as LPL;
+
+    interface SplitControl as SerialAMControl;
+    interface AMPacket as SerialAMPacket;
+    interface Packet as SerialPacket;
+
+    interface SplitControl as RadioAMControl;
+    interface AMPacket as RadioAMPacket;
+    interface Packet as RadioPacket;
+
+    interface Receive as SerialRequestSampleMsgsReceive;
+    interface AMSend as RadioRequestSampleMsgsSend;
+    interface Receive as RadioSampleMsgReceive;
+    interface AMSend as SerialSampleMsgSend;
+  }
+}
+implementation {
+  bool serialSending;
+  am_addr_t dest_addr;
+  message_t request_samples_msg;
+  message_t sample_msg;
+  serial_sample_msg_t* sample_msg_payload;
+
+  event void Boot.booted() {
+    serialSending = FALSE;
+    sample_msg_payload = (serial_sample_msg_t*)call SerialPacket.getPayload(&sample_msg, sizeof(serial_sample_msg_t));
+    call RadioAMControl.start();
+  }
+  
+  event void RadioAMControl.startDone(error_t error) {
+    call SerialAMControl.start();
+  }
+
+  event void SerialAMControl.startDone(error_t error) {
+  }
+
+  event void RadioAMControl.stopDone(error_t error) {
+  }
+
+  event void SerialAMControl.stopDone(error_t error) {
+  }
+
+  event message_t* SerialRequestSampleMsgsReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    serial_request_samples_msg_t* request_msg = payload;
+    call Leds.led0On();
+    call LPL.setRemoteWakeupInterval(&request_samples_msg, LPL_INTERVAL+100);
+    call RadioRequestSampleMsgsSend.send(request_msg->addr, &request_samples_msg, sizeof(request_samples_msg_t));
+    return msg;
+  }
+
+  event void RadioRequestSampleMsgsSend.sendDone(message_t* msg, error_t error) {
+    if(error == SUCCESS)
+      call Leds.led0Off();
+  }
+
+  event message_t* RadioSampleMsgReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    call Leds.led2Toggle();
+    if(call MsgQueue.empty() == FALSE || serialSending == TRUE)
+      call MsgQueue.enqueue(*msg);
+    else {
+      sample_msg_payload->src_addr = call RadioAMPacket.source(msg);
+      sample_msg_payload->sample = *((nx_sensor_sample_t*)payload);
+      dest_addr = call SerialAMPacket.destination(msg); 
+      serialSending = TRUE;
+      call SerialSampleMsgSend.send(dest_addr, &sample_msg, sizeof(*sample_msg_payload));
+    }
+    return msg;
+  }
+
+  event void SerialSampleMsgSend.sendDone(message_t* msg, error_t error) {
+    if(call MsgQueue.empty() == FALSE) {
+      sample_msg = call MsgQueue.dequeue();
+      dest_addr = call SerialAMPacket.destination(msg);
+      call SerialSampleMsgSend.send(dest_addr, &sample_msg, sizeof(serial_sample_msg_t));
+    }
+    else serialSending = FALSE;
+  }
+}
+
diff --git a/apps/tutorials/LowPowerSensing/Base/Makefile b/apps/tutorials/LowPowerSensing/Base/Makefile
new file mode 100644
index 00000000..8aaf58d9
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/Base/Makefile
@@ -0,0 +1,7 @@
+COMPONENT=LowPowerSensingBaseAppC
+CFLAGS += -I.. -I../universal_sensors
+CFLAGS += -DLOW_POWER_LISTENING
+#CFLAGS += -I.. -I../tmote_onboard_sensors
+#CFLAGS += -DCC1K_DEFAULT_FREQ=CC1K_914_077_MHZ
+
+include $(MAKERULES)
diff --git a/apps/tutorials/LowPowerSensing/Base/volumes-at45db.xml b/apps/tutorials/LowPowerSensing/Base/volumes-at45db.xml
new file mode 100644
index 00000000..105e58ae
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/Base/volumes-at45db.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="SENSOR_SAMPLES" size="262144"/>
+</volume_table>
diff --git a/apps/tutorials/LowPowerSensing/Base/volumes-stm25p.xml b/apps/tutorials/LowPowerSensing/Base/volumes-stm25p.xml
new file mode 100644
index 00000000..64dfc4c6
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/Base/volumes-stm25p.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="DATALOG" size="786432"/>
+</volume_table>
diff --git a/apps/tutorials/LowPowerSensing/LowPowerSensingConstants.h b/apps/tutorials/LowPowerSensing/LowPowerSensingConstants.h
new file mode 100644
index 00000000..d883c111
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/LowPowerSensingConstants.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#ifndef LOWPOWERSENSINGCONSTANTS_H
+#define LOWPOWERSENSINGCONSTANTS_H
+
+#ifndef LOWPOWERSENSING_JAVA_MAKEFILE
+#include "StorageVolumes.h"
+#endif
+#include "LowPowerSensingMsgs.h"
+
+enum {
+  LPL_INTERVAL       = 2000,
+  SAMPLING_INTERVAL	 = 3000,
+  MSG_QUEUE_SIZE     = 50,
+  BASE_STATION_ADDR	 = 0,
+};
+#endif //LOWPOWERSENSINGCONSTANTS_H
+
diff --git a/apps/tutorials/LowPowerSensing/LowPowerSensingMsgs.h b/apps/tutorials/LowPowerSensing/LowPowerSensingMsgs.h
new file mode 100644
index 00000000..0fcc191d
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/LowPowerSensingMsgs.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#ifndef LOWPOWERSENSINGMSGS_H
+#define LOWPOWERSENSINGMSGS_H
+
+#include "message.h"
+#include "SensorSample.h"
+
+enum {
+  AM_SERIAL_REQUEST_SAMPLES_MSG         = 0x92,
+  AM_REQUEST_SAMPLES_MSG                = 0x93,
+
+  AM_SAMPLE_MSG                         = 0x98,
+  AM_SERIAL_SAMPLE_MSG                  = 0x99,
+};
+
+typedef nx_struct serial_request_samples_msg {
+  nx_am_addr_t addr;
+  nx_uint32_t sample_num;
+} serial_request_samples_msg_t;
+
+typedef nx_struct request_samples_msg {
+} request_samples_msg_t;
+
+typedef  nx_struct sample_msg {
+  nx_sensor_sample_t sample;
+} sample_msg_t;
+
+typedef  nx_struct serial_sample_msg {
+  nx_am_addr_t  src_addr;
+  nx_sensor_sample_t sample;
+} serial_sample_msg_t;
+
+#endif //LOWPOWERSENSINGMSGS_H
+
diff --git a/apps/tutorials/LowPowerSensing/README b/apps/tutorials/LowPowerSensing/README
new file mode 100644
index 00000000..3b9f9ced
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/README
@@ -0,0 +1,206 @@
+========================================================================
+README:  LowPowerSensing Application
+Created: 2-March-2008
+Author:  Kevin Klues (klueska@cs.stanford.edu)
+========================================================================
+
+This README is intended to give an overview of the organizational
+structure of the LowPowerSensing Application application as well as 
+how to best utilize and customize some of the features it contains.  
+This document is divided into three sections.  The first section 
+contains an overview of how the application is organized and what it 
+is capable of doing.  The second section gives instructions on how to 
+install the application and interact with it from your PC.  The third
+section demonstrates how to customize the application to meet your 
+particualr needs.
+
+------------------------------------------------------------------------
+Organizational Structure and Overview
+------------------------------------------------------------------------
+
+The LowPowerSensing application is actually made up of three separate 
+mini-applications: one mote base station application, one mote sampling 
+application, and one java based application used to interact with the 
+mote applications.  The code for all three applications is divided up 
+among several directories:
+
+LowPowerSensing
+./Base
+./java
+./sampleLog
+./Sampler
+./tmote_onboard_sensors
+./universal_sensors
+
+The code specific to the base station aplication is contained under
+the 'Base' directory, and code for the sampling application is found 
+under 'Sampler'.  Code shared between them is found either in the top 
+level directory (LowPowerSensing) or in the subdirectories 'sampleLog',
+'tmote_onboard_sensors', and 'universal_sensors'.  Code for the java 
+application is found in the 'java' directory.
+
+Now the application itself is fairly straightforward.  The sampler
+application periodically takes some sensor readings, logs them to flash,
+and waits for requests from the base station to stream out the contents 
+or its flash over the radio.  Requests originate from end users of the 
+java application and simply get forwarded on to a mote running the 
+sampler application through the base station application.  Conversely,
+whenever the base station receives any packets from the sampler 
+application, it forwards these packets back to the java application for
+further processing.  Any number of motes running the sampler application 
+can exist simultaneously, and data can be requested from them using a 
+unique address assigned to each of them.  
+
+What sensors are sampled, the periodicity of sampling, and the check 
+interval for performing LowPowerListening the are all configurable 
+options that can easily be set by the user at compile time.
+
+This application is admittedly *not* robust in the sense that no reliable 
+transfer protocol is implemented for the exchange of data, data can only
+be retreived from one mote at a time, and there is no code anywhere to 
+recover from node failures at any point in time.  This application is 
+intended more for demonstration purposes, and as a starting point for 
+developers learning how to write low power sensornet applications. Enjoy!
+
+------------------------------------------------------------------------
+Installation Instructions and Running the Applications
+------------------------------------------------------------------------
+
+The default configuration of the LowPowerSensing applcation has been 
+designed to compile and run on any platform that supports 
+LowPowerListening and has a LogStorage component defined for its 
+external flash (i.e. telos, mica2, micaz, eyesIFX, etc.).  For purposes
+of illustration the instructions below are given for installation on the
+telosb platform, but should be applicable to other platforms as well.
+
+To run the LowPowerSensing application with its default configuration 
+do the following:
+
+1) Install the base station application on a mote and connect it to your
+PC via whatever serial interface you normally use to communicate with it.
+IMPORTANT: the base station mote must be installed with address 0
+
+cd Base
+make telosb install.0
+
+2) Install the sampler application on a mote.  You can install this 
+application on any number of motes, remembering to change the TOS_NODE_ID
+of each installation instance (in the example below I use 5, 10, and 20, 
+but any number is acceptable as long as its not 0).
+
+cd Sampler
+make telosb install.5
+make telosb install.10
+make telosb install.20
+
+3) Compile and run the java application.  You first need to start up an 
+instance of serial forwarder to do so.
+
+cd java
+make 
+java net.tinyos.sf.SerialForwarder -comm serial@/dev/ttyUSB0:telosb &
+java LowePowerSensingApp
+
+After starting the java application you will be presented with a user 
+prompt that looks like:
+
+Enter 's' to request samples
+>> 
+
+Just type 's' and hit enter in order to request samples from one of your 
+sampler motes.  After doing so, you will be presented with a prompt for 
+the address of the mote from which you are requesting data. You should 
+enter the TOS_NODE_ID of one of the motes you installed the sampler 
+application on before.  
+
+Enter Address:
+
+Once the address has been entered, a request message will be sent from 
+the java application through the base station mote and out to the 
+mote running the sampling application.  Once the sampler mote receives
+this request, it will start streaming back any data it has logged to flash
+since the last time a request was received.  If this is the first request
+message it is receiving, it will send all of the samples back that it has
+logged since the time it was booted up.  
+
+------------------------------------------------------------------------
+Changing the default Configuration
+------------------------------------------------------------------------
+
+The LowPowerSensing Application is set up by default to use a software
+based Sinusoidal generator sensor with a sampling period of 3s, and an 
+LPL check interval of 2s. The code for using this sensor can be found 
+in the 'universal_sensors' directory.  The pattern followed by the set 
+of files found in this directory can be used to setup other types of 
+sensors for sampling by the LowPowerSensing application.  If you take a 
+look in the 'tmote_onboard_sensors' directory you will see the exact 
+same set of files as you do in the 'universal_sensors' directory.  Of 
+course, these files are set up to use the set of sensors found onboard
+the tmote sky motes: namely a temperature sensor, a humidity sensor, a 
+photo active sensor, and a total solar sensor.  Because the files in 
+each directory are named identically, we can tell the LowPowerSensing 
+application which set of sensors to expect completely at compile time 
+by simply setting a few compiler flags.
+
+So if you happen to have a tmote laying around and you want to sample 
+its onboard sensors instead of using the default sinusoidal sensor you 
+need to do the following:
+
+Open up the makefiles for both the the Sampler and Base station 
+applications and change this line:
+
+CFLAGS += -I.. -I../sampleLog -I../universal_sensors
+to
+CFLAGS += -I.. -I../sampleLog -I../tmote_onboard_sensors
+
+Additionally, to allow the java application to recognize the new types 
+of sensors being sampled you need to change this line in the makefile 
+of the java directory:
+
+SENSOR_DIR = universal_sensors
+to 
+SENSOR_DIR = tmote_onboard_sensors
+
+And thats it.  You should now be sampling the oboard tmote sensors 
+instead of the sinusoaidal one.  If you wish to create a custom set of 
+sensors to sample using the LowPowerSensing application (such as those 
+from one of the mica sensorboards), just follow the pattern found in 
+the 'universal_sensors' and 'tmote_onboard_sensors' and then change 
+the compiler flags appropriately.
+
+Additionally, if you wish to change the LowPowerListening check 
+interval or the sampling period of the Sampler application you can 
+eitheropen up the 'LowPowerSensingConsants.h' file and directly change 
+them there, or pass new values for them at compile time through the 
+makefile (all values are in binary milliseconds i.e. 1s is specified as 
+1024 not 1000).
+
+To change them via the makefile add lines such as the following to
+your makefile in both the Base and Sampler application directories
+(its important that its in both makefiles for the LPL check interval,
+but only necessary in the Sampler application if you are only changing 
+the sampling period):
+
+PFLAGS += -DSAMPLING_INTERVAL=10000
+PFLAGS += -DLPL_INTERVAL=3000
+PFLAGS += -DSAMPLING_INTERVAL=10000  -DLPL_INTERVAL=3000
+
+And that should be it.  The rest of it involves sifting through the code
+and figuring out how the application does what it does.  If you have any 
+questions feel free to email me (Kevin) at klueska@cs.stanford.edu .
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/apps/tutorials/LowPowerSensing/Sampler/LowPowerSensingPeriodicSamplerAppC.nc b/apps/tutorials/LowPowerSensing/Sampler/LowPowerSensingPeriodicSamplerAppC.nc
new file mode 100644
index 00000000..e2827239
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/Sampler/LowPowerSensingPeriodicSamplerAppC.nc
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#include "LowPowerSensingConstants.h"
+#include "SensorSample.h"
+configuration LowPowerSensingPeriodicSamplerAppC {}
+implementation {
+  components new SamplePeriodicLogC(SAMPLING_INTERVAL, VOLUME_SENSOR_SAMPLES);
+  components MainC, LowPowerSensingPeriodicSamplerC as App;
+  components SampleNxConverterC;
+  MainC.Boot <- App;
+  App.SampleLogRead -> SamplePeriodicLogC;
+  App.SampleNxConverter -> SampleNxConverterC;
+
+  components ActiveMessageC;
+  App.AMControl -> ActiveMessageC;
+  App.AMPacket -> ActiveMessageC;
+  App.Packet -> ActiveMessageC;
+
+  components new AMSenderC(AM_SAMPLE_MSG) as SampleSender;
+  App.SampleSend -> SampleSender;
+
+  components new AMReceiverC(AM_REQUEST_SAMPLES_MSG) as RequestSamplesReceiver;
+  App.RequestSamplesReceive -> RequestSamplesReceiver;
+
+  components LedsC as LedsC;
+  App.Leds -> LedsC;
+
+//Nasty hack since no uniform way of prividing LPL support as of yet
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_TMOTE) || defined(PLATFORM_MICAZ)
+  components CC2420ActiveMessageC as LPLProvider;
+  App.LPL -> LPLProvider;
+#endif
+
+#if defined(PLATFORM_MICA2)
+  components CC1000CsmaRadioC as LPLProvider;
+  App.LPL -> LPLProvider;
+#endif
+
+#if defined(PLATFORM_IRIS)
+  components ActiveMessageC as LPLProvider;
+  App.LPL -> LPLProvider;
+#endif
+
+}
+
diff --git a/apps/tutorials/LowPowerSensing/Sampler/LowPowerSensingPeriodicSamplerC.nc b/apps/tutorials/LowPowerSensing/Sampler/LowPowerSensingPeriodicSamplerC.nc
new file mode 100644
index 00000000..2ebdd544
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/Sampler/LowPowerSensingPeriodicSamplerC.nc
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#include "LowPowerSensingConstants.h"
+#include "SensorSample.h"
+module LowPowerSensingPeriodicSamplerC {
+  uses {
+    interface Boot;
+    interface SampleLogRead<sensor_sample_t>;
+    interface SampleNxConverter;
+    interface Leds;
+    interface SplitControl as AMControl;
+    interface AMPacket;
+    interface Packet;
+    interface AMSend as SampleSend;
+    interface Receive as RequestSamplesReceive;
+    interface LowPowerListening as LPL;
+  }
+}
+implementation {
+  message_t sample_msg;
+  bool sendBusy = FALSE;
+
+  task void readNextTask();
+  task void sendSampleMsgTask();
+
+  void readNext() {
+    error_t error = call SampleLogRead.readNext();
+    if(error == FAIL)
+      post readNextTask();
+    else if(error == ECANCEL) {
+      sendBusy = FALSE;
+      call Leds.led1Toggle();
+    }
+  }
+  
+  void sendSampleMsg() {
+    call LPL.setRemoteWakeupInterval(&sample_msg, 0);
+    if(call SampleSend.send(BASE_STATION_ADDR, &sample_msg, sizeof(nx_sensor_sample_t)) != SUCCESS)
+      post sendSampleMsgTask();
+    else call Leds.led2On();
+  }
+  
+  task void readNextTask() { readNext(); }
+  task void sendSampleMsgTask() { sendSampleMsg(); }
+	
+  event void Boot.booted() {
+    call LPL.setLocalWakeupInterval(LPL_INTERVAL);
+    call AMControl.start();
+  }
+  
+  event void AMControl.startDone(error_t e) {
+  	if(e != SUCCESS)
+  		call AMControl.start();
+  }
+  
+  event void AMControl.stopDone(error_t e) {
+  }
+  
+  event void SampleLogRead.readDone(sensor_sample_t* sample, error_t error) {
+    if(error == SUCCESS) {
+      nx_sensor_sample_t* nx_sample = call SampleSend.getPayload(&sample_msg, sizeof(nx_sample));
+      call SampleNxConverter.copyToNx(nx_sample, sample);
+      sendSampleMsg();
+    }
+    else post readNextTask();
+  }
+
+  event message_t* RequestSamplesReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    call Leds.led0Toggle();
+    if(sendBusy == FALSE) {
+      sendBusy = TRUE;
+      readNext();
+    }
+    return msg;
+  }
+
+  event void SampleSend.sendDone(message_t* msg, error_t error) {
+    if(error != SUCCESS)
+      post sendSampleMsgTask();
+    else {
+      call Leds.led2Off();
+      readNext();
+    }
+  }
+}
diff --git a/apps/tutorials/LowPowerSensing/Sampler/Makefile b/apps/tutorials/LowPowerSensing/Sampler/Makefile
new file mode 100644
index 00000000..01c47c11
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/Sampler/Makefile
@@ -0,0 +1,8 @@
+COMPONENT=LowPowerSensingPeriodicSamplerAppC
+CFLAGS += -I.. -I../sampleLog
+CFLAGS += -I.. -I../universal_sensors
+CFLAGS += -DLOW_POWER_LISTENING
+#CFLAGS += -I.. -I../tmote_onboard_sensors
+#CFLAGS += -DCC1K_DEFAULT_FREQ=CC1K_914_077_MHZ
+
+include $(MAKERULES)
diff --git a/apps/tutorials/LowPowerSensing/Sampler/volumes-at45db.xml b/apps/tutorials/LowPowerSensing/Sampler/volumes-at45db.xml
new file mode 100644
index 00000000..105e58ae
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/Sampler/volumes-at45db.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="SENSOR_SAMPLES" size="262144"/>
+</volume_table>
diff --git a/apps/tutorials/LowPowerSensing/Sampler/volumes-stm25p.xml b/apps/tutorials/LowPowerSensing/Sampler/volumes-stm25p.xml
new file mode 100644
index 00000000..73ed4855
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/Sampler/volumes-stm25p.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="SENSOR_SAMPLES" size="786432"/>
+</volume_table>
diff --git a/apps/tutorials/LowPowerSensing/java/LowPowerSensingApp.java b/apps/tutorials/LowPowerSensing/java/LowPowerSensingApp.java
new file mode 100644
index 00000000..e1d30a60
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/java/LowPowerSensingApp.java
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+import net.tinyos.message.*;
+import net.tinyos.util.*;
+import java.io.*;
+/**
+*/
+
+public class LowPowerSensingApp implements MessageListener
+{
+  MoteIF mote;
+
+  /* Main entry point */
+  void run() {
+    mote = new MoteIF(PrintStreamMessenger.err);
+    mote.registerListener(new SerialSampleMsg(), this);
+  }
+
+  synchronized public void messageReceived(int dest_addr, Message msg) {
+    if (msg instanceof SerialSampleMsg) {
+      System.out.print(msg.toString());
+    }
+  }
+
+  synchronized public void requestSamples(int addr) {
+    SerialRequestSamplesMsg msg = new SerialRequestSamplesMsg();
+    msg.set_addr(addr);
+    try {
+      mote.send(MoteIF.TOS_BCAST_ADDR, msg);
+    }
+    catch (IOException e) {
+      System.err.println("Cannot send message to mote");
+    }
+  }
+
+  public static void main(String[] args) {
+    LowPowerSensingApp me = new LowPowerSensingApp();
+    me.run();
+
+    InputStreamReader cin = new InputStreamReader(System.in);
+    BufferedReader in = new BufferedReader(cin);
+    String input = "";
+
+    System.out.print("Enter 's' to request samples\n");
+    System.out.print(">> ");
+    for(;;) {
+      try {
+        input = in.readLine();
+        if(input.equals("s")) {
+          System.out.print("Enter Address: ");
+          input = in.readLine();
+          me.requestSamples(Integer.parseInt(input));
+        }
+        else System.out.println("Invalid Input!!!!: ");
+        System.out.print(">> ");
+      }
+      catch (IOException e) {
+        System.out.print("Error On Input!!");
+      }
+    }
+  }
+}
diff --git a/apps/tutorials/LowPowerSensing/java/Makefile b/apps/tutorials/LowPowerSensing/java/Makefile
new file mode 100644
index 00000000..9b0a9499
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/java/Makefile
@@ -0,0 +1,32 @@
+GEN=SerialRequestSamplesMsg.java SerialSampleMsg.java Constants.java
+
+SENSOR_DIR = universal_sensors
+#SENSOR_DIR = tmote_onboard_sensors
+SENSOR_DEPS = ../$(SENSOR_DIR)/SensorSample.h
+
+all: LowPowerSensingApp.jar
+
+LowPowerSensingApp.jar: LowPowerSensingApp.class
+	jar cf $@ *.class
+
+SerialRequestSamplesMsg.java: ../LowPowerSensingMsgs.h $(SENSOR_DEPS)
+	mig -I../$(SENSOR_DIR) -target=null \
+-java-classname=SerialRequestSamplesMsg java ../LowPowerSensingMsgs.h serial_request_samples_msg -o $@
+
+SerialSampleMsg.java: ../LowPowerSensingMsgs.h $(SENSOR_DEPS)
+	mig -I../$(SENSOR_DIR) -target=null \
+-java-classname=SerialSampleMsg java ../LowPowerSensingMsgs.h serial_sample_msg -o $@
+
+Constants.java: ../LowPowerSensingConstants.h
+	ncg -I../$(SENSOR_DIR) -DLOWPOWERSENSING_JAVA_MAKEFILE -target=null \
+-java-classname=Constants java ../LowPowerSensingConstants.h BASE_STATION_ADDR SAMPLING_INTERVAL \
+MSG_QUEUE_SIZE LPL_INTERVAL  -o $@
+
+LowPowerSensingApp.class: $(wildcard *.java) $(GEN)
+	javac *.java
+
+clean:
+	rm -f *.class $(GEN)
+
+veryclean: clean
+	rm -f LowPowerSensingApp.jar
diff --git a/apps/tutorials/LowPowerSensing/sampleLog/GenericSensorSample.h b/apps/tutorials/LowPowerSensing/sampleLog/GenericSensorSample.h
new file mode 100644
index 00000000..d79a1549
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/sampleLog/GenericSensorSample.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#ifndef GENERICSENSORSAMPLE_H
+#define GENERICSENSORSAMPLE_H
+
+typedef struct generic_sensor_sample {
+  uint32_t sample_num;
+  sensor_type_t values[num_sensors];
+} generic_sensor_sample_t;
+
+typedef union generic_sensor_sample_type_union {
+  uint8_t u8;
+  uint16_t u16;
+  uint32_t u32; 
+  sensor_type_t st;
+} generic_sensor_sample_type_union_t;
+
+#endif //GENERICSENSORSAMPLE_H
+
diff --git a/apps/tutorials/LowPowerSensing/sampleLog/PeriodicSampleLogger16C.nc b/apps/tutorials/LowPowerSensing/sampleLog/PeriodicSampleLogger16C.nc
new file mode 100644
index 00000000..62217258
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/sampleLog/PeriodicSampleLogger16C.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+generic configuration PeriodicSampleLogger16C(uint32_t period, uint8_t num_sensors){
+  uses {
+    interface Boot;
+    interface LogWrite;
+    interface Read<uint16_t> as Sensor[uint8_t];
+  }
+}
+implementation {
+  Boot = Logger.Boot;
+  Sensor = Logger;
+
+  components new PeriodicSampleLoggerP(period, num_sensors, uint16_t) as Logger;
+  components new TimerMilliC();
+  Logger.LogWrite = LogWrite;
+  Logger.Timer -> TimerMilliC;
+
+  components NoLedsC as LedsC;
+  Logger.Leds -> LedsC;
+}
+
diff --git a/apps/tutorials/LowPowerSensing/sampleLog/PeriodicSampleLoggerP.nc b/apps/tutorials/LowPowerSensing/sampleLog/PeriodicSampleLoggerP.nc
new file mode 100644
index 00000000..23fa83c4
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/sampleLog/PeriodicSampleLoggerP.nc
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+generic module PeriodicSampleLoggerP(uint32_t period_ms, 
+                                     uint8_t num_sensors, 
+                                     typedef sensor_type_t) {
+  uses {
+    interface Boot;
+    interface Read<sensor_type_t> as Sensor[uint8_t];
+    interface Timer<TMilli> as Timer;
+    interface LogWrite;
+    interface Leds;
+  }
+}
+implementation {
+  #include "GenericSensorSample.h"
+
+  generic_sensor_sample_t sample[2];
+  generic_sensor_sample_t* current_sample;
+  uint8_t current_sample_id;
+
+  task void eraseTask();
+  task void appendTask();
+
+  void readSensors() {
+    int i;
+    for(i=0; i<num_sensors; i++)
+      call Sensor.read[i]();
+  }
+
+  void appendSample(generic_sensor_sample_t* s) {
+    //printf("WRITE LOC: %d\n", call LogWrite.currentOffset());
+    if(call LogWrite.append(s, sizeof(generic_sensor_sample_t)) != SUCCESS)
+      post appendTask();
+  }
+
+  task void eraseTask() {
+    if(call LogWrite.erase() != SUCCESS)
+      post eraseTask();
+  }
+
+  task void appendTask() {
+    appendSample(&(sample[!current_sample_id]));
+  }
+
+  event void Boot.booted() {
+    if(call LogWrite.erase() != SUCCESS)
+      post eraseTask();
+  }
+
+  event void LogWrite.eraseDone(error_t error) {
+    sample[0].sample_num = 0;
+    sample[1].sample_num = 1;
+    current_sample_id = 0;
+    current_sample = &(sample[current_sample_id]);
+    readSensors();
+    call Timer.startPeriodic(period_ms);
+  }
+
+  event void Timer.fired() {
+    call Leds.led0Toggle();
+    appendSample(current_sample);
+    current_sample_id = !current_sample_id;
+    current_sample = &(sample[current_sample_id]);
+    readSensors();
+  }
+
+  event void Sensor.readDone[uint8_t i](error_t result, sensor_type_t val) {
+    if(result == SUCCESS) {
+      current_sample->values[i] = val;
+      call Leds.led1Toggle();
+    }
+    else {
+      current_sample->values[i] = ((generic_sensor_sample_type_union_t)(0xFFFFFFFF)).st;
+      call Leds.led2Toggle();
+    }
+  }
+
+  event void LogWrite.appendDone(void* buf, storage_len_t len, bool recordsLost, error_t error){
+    if(error != SUCCESS)
+      post appendTask();
+    else ((generic_sensor_sample_t*)buf)->sample_num+=2;
+  }
+  event void LogWrite.syncDone(error_t error) {}
+  default command error_t Sensor.read[uint8_t i]() {return SUCCESS;}
+}
+
diff --git a/apps/tutorials/LowPowerSensing/sampleLog/SampleLogRead.nc b/apps/tutorials/LowPowerSensing/sampleLog/SampleLogRead.nc
new file mode 100644
index 00000000..1dd5452f
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/sampleLog/SampleLogRead.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+interface SampleLogRead<sample_type_t> {
+  command error_t readFirst();
+  command error_t readNext();
+  event void readDone(sample_type_t* entry, error_t error);
+}
+
diff --git a/apps/tutorials/LowPowerSensing/sampleLog/SampleLogReaderC.nc b/apps/tutorials/LowPowerSensing/sampleLog/SampleLogReaderC.nc
new file mode 100644
index 00000000..25d544ed
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/sampleLog/SampleLogReaderC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+generic configuration SampleLogReaderC(typedef sample_type_t) {
+  provides {
+   interface SampleLogRead<sample_type_t>;
+  }
+  uses {
+    interface LogRead;
+    interface LogWrite;
+  }
+}
+implementation {
+  components new SampleLogReaderP(sample_type_t) as LogReader;
+
+  SampleLogRead = LogReader;
+  LogReader.LogRead = LogRead;
+  LogReader.LogWrite = LogWrite;
+}
+
diff --git a/apps/tutorials/LowPowerSensing/sampleLog/SampleLogReaderP.nc b/apps/tutorials/LowPowerSensing/sampleLog/SampleLogReaderP.nc
new file mode 100644
index 00000000..3f6886da
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/sampleLog/SampleLogReaderP.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+generic module SampleLogReaderP(typedef sample_type_t) {
+  provides {
+    interface SampleLogRead<sample_type_t>;
+  }
+  uses {
+    interface LogRead;
+    interface LogWrite;
+  }
+}
+implementation {
+  sample_type_t sample;
+  storage_cookie_t writeLocation;
+
+  command error_t SampleLogRead.readFirst() {
+    return call LogRead.seek(SEEK_BEGINNING);
+  }
+
+  command error_t SampleLogRead.readNext() {
+    atomic writeLocation = call LogWrite.currentOffset();
+    if(call LogRead.currentOffset() == writeLocation)
+      return ECANCEL;
+    else return call LogRead.read(&sample, sizeof(sample));
+  }
+
+  event void LogRead.readDone(void* buf, storage_len_t len, error_t error) {
+    signal SampleLogRead.readDone((sample_type_t*)buf, error);
+  }
+
+  event void LogRead.seekDone(error_t error) {
+    if(error == SUCCESS) {
+      error = call SampleLogRead.readNext();
+      if(error != SUCCESS)
+        signal SampleLogRead.readDone(&sample, error);
+    }
+    else signal SampleLogRead.readDone(&sample, error);
+  }
+  event void LogWrite.appendDone(void* buf, storage_len_t len, bool recordsLost, error_t error) {}
+  event void LogWrite.eraseDone(error_t error) {}
+  event void LogWrite.syncDone(error_t error) {}
+  default event void SampleLogRead.readDone(sample_type_t* s, error_t error) {}
+}
+
diff --git a/apps/tutorials/LowPowerSensing/sampleLog/SampleNxConverter.nc b/apps/tutorials/LowPowerSensing/sampleLog/SampleNxConverter.nc
new file mode 100644
index 00000000..37154313
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/sampleLog/SampleNxConverter.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#include "SensorSample.h"
+interface SampleNxConverter {
+  command void copyToNx(nx_sensor_sample_t* dest, sensor_sample_t* src);
+  command void copyFromNx(sensor_sample_t* dest, nx_sensor_sample_t* src);
+}
+
diff --git a/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/SampleNxConverterC.nc b/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/SampleNxConverterC.nc
new file mode 100644
index 00000000..d6c8339d
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/SampleNxConverterC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#include "SensorSample.h"
+module SampleNxConverterC {
+  provides interface SampleNxConverter;
+}
+implementation {
+  command void SampleNxConverter.copyToNx(nx_sensor_sample_t* dest, sensor_sample_t* src) {
+    dest->sample_num = src->sample_num;
+    dest->humidity = src->humidity;
+    dest->temperature = src->temperature;
+    dest->photo_active = src->photo_active;
+    dest->total_solar = src->total_solar;
+  }
+  command void SampleNxConverter.copyFromNx(sensor_sample_t* dest, nx_sensor_sample_t* src) {
+    dest->sample_num = src->sample_num;
+    dest->humidity = src->humidity;
+    dest->temperature = src->temperature;
+    dest->photo_active = src->photo_active;
+    dest->total_solar = src->total_solar;
+  }
+}
+
diff --git a/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/SamplePeriodicLogC.nc b/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/SamplePeriodicLogC.nc
new file mode 100644
index 00000000..5580b5e8
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/SamplePeriodicLogC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#include "SensorSample.h"
+#include "Storage.h"
+generic configuration SamplePeriodicLogC(uint32_t sampling_period, 
+                                                        volume_id_t volume) {
+  provides{
+    interface SampleLogRead<sensor_sample_t>;
+  }
+}
+implementation {
+
+  //Change sensors based on sensorboard........
+  components new PeriodicSampleLogger16C(sampling_period, 4) as PeriodicLogger;
+  components new SensirionSht11C() as HumidityTempC;
+  components new HamamatsuS10871TsrC() as PhotoActiveC;
+  components new HamamatsuS1087ParC() as TotalSolarC;
+  PeriodicLogger.Sensor[0] -> HumidityTempC.Humidity;
+  PeriodicLogger.Sensor[1] -> HumidityTempC.Temperature;
+  PeriodicLogger.Sensor[2] -> PhotoActiveC;
+  PeriodicLogger.Sensor[3] -> TotalSolarC;
+  
+  //Don't change........ just copy
+  components MainC;
+  components new LogStorageC(volume, TRUE);
+  components new SampleLogReaderC(sensor_sample_t) as LogReader;
+  SampleLogRead = LogReader;
+  MainC.Boot <- PeriodicLogger;
+  PeriodicLogger.LogWrite -> LogStorageC;
+  LogReader.LogRead -> LogStorageC;
+  LogReader.LogWrite -> LogStorageC;
+
+}
+
diff --git a/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/SensorSample.h b/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/SensorSample.h
new file mode 100644
index 00000000..45c0e895
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/tmote_onboard_sensors/SensorSample.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#ifndef SENSORSAMPLE_H
+#define SENSORSAMPLE_H
+
+typedef struct sensor_sample {
+  uint32_t sample_num;
+  uint16_t humidity;
+  uint16_t temperature;
+  uint16_t photo_active;
+  uint16_t total_solar;
+} sensor_sample_t;
+
+typedef nx_struct nx_sensor_sample {
+  nx_uint32_t sample_num;
+  nx_uint16_t humidity;
+  nx_uint16_t temperature;
+  nx_uint16_t photo_active;
+  nx_uint16_t total_solar;
+} nx_sensor_sample_t;
+
+#endif //SENSORSAMPLE_H
+
diff --git a/apps/tutorials/LowPowerSensing/universal_sensors/SampleNxConverterC.nc b/apps/tutorials/LowPowerSensing/universal_sensors/SampleNxConverterC.nc
new file mode 100644
index 00000000..f9355342
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/universal_sensors/SampleNxConverterC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#include "SensorSample.h"
+module SampleNxConverterC {
+  provides interface SampleNxConverter;
+}
+implementation {
+  command void SampleNxConverter.copyToNx(nx_sensor_sample_t* dest, sensor_sample_t* src) {
+    dest->sample_num = src->sample_num;
+    dest->sin_value = src->sin_value;
+  }
+  command void SampleNxConverter.copyFromNx(sensor_sample_t* dest, nx_sensor_sample_t* src) {
+    dest->sample_num = src->sample_num;
+    dest->sin_value = src->sin_value;
+  }
+}
+
diff --git a/apps/tutorials/LowPowerSensing/universal_sensors/SamplePeriodicLogC.nc b/apps/tutorials/LowPowerSensing/universal_sensors/SamplePeriodicLogC.nc
new file mode 100644
index 00000000..f131cecb
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/universal_sensors/SamplePeriodicLogC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#include "SensorSample.h"
+#include "Storage.h"
+generic configuration SamplePeriodicLogC(uint32_t sampling_period, volume_id_t volume) {
+  provides{
+    interface SampleLogRead<sensor_sample_t>;
+  }
+}
+implementation {
+
+  //Change sensors based on sensorboard........
+  components new PeriodicSampleLogger16C(sampling_period, 1) as PeriodicLogger;
+  components new SineSensorC();
+  PeriodicLogger.Sensor[0] -> SineSensorC;
+  
+  //Don't change..... just copy for different sensorboard implementations
+  components MainC;
+  components new LogStorageC(volume, TRUE);
+  components new SampleLogReaderC(sensor_sample_t) as LogReader;
+  MainC.Boot <- PeriodicLogger;
+  PeriodicLogger.LogWrite -> LogStorageC;
+  SampleLogRead = LogReader;
+  LogReader.LogRead -> LogStorageC;
+  LogReader.LogWrite -> LogStorageC;
+}
+
diff --git a/apps/tutorials/LowPowerSensing/universal_sensors/SensorSample.h b/apps/tutorials/LowPowerSensing/universal_sensors/SensorSample.h
new file mode 100644
index 00000000..8727eabc
--- /dev/null
+++ b/apps/tutorials/LowPowerSensing/universal_sensors/SensorSample.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date July 24, 2007
+ */
+
+#ifndef SENSORSAMPLE_H
+#define SENSORSAMPLE_H
+
+typedef struct sensor_sample {
+  uint32_t sample_num;
+  uint16_t sin_value;
+} sensor_sample_t;
+
+typedef nx_struct nx_sensor_sample {
+  nx_uint32_t sample_num;
+  nx_uint16_t sin_value;
+} nx_sensor_sample_t;
+
+#endif //SENSORSAMPLE_H
+
diff --git a/apps/tutorials/PacketParrot/Makefile b/apps/tutorials/PacketParrot/Makefile
new file mode 100644
index 00000000..3ae6049c
--- /dev/null
+++ b/apps/tutorials/PacketParrot/Makefile
@@ -0,0 +1,2 @@
+COMPONENT=PacketParrotC
+include $(MAKERULES)
diff --git a/apps/tutorials/PacketParrot/PacketParrotC.nc b/apps/tutorials/PacketParrot/PacketParrotC.nc
new file mode 100644
index 00000000..6a5e3827
--- /dev/null
+++ b/apps/tutorials/PacketParrot/PacketParrotC.nc
@@ -0,0 +1,72 @@
+/*                                                                     tab:2
+ *
+ * Copyright (c) 2000-2007 The Regents of the University of
+ * California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Demonstrates the <code>LogRead</code> and <code>LogWrite</code>
+ * abstractions.  The application logs packets it receives from the
+ * radio to flash.  On a subsequent power cycle, the application
+ * transmits logged packets, erases the log, and then continues to log
+ * packets again.  The red LED is on when the log is being erased.
+ * The blue (yellow) LED blinks when packets are being received and
+ * logged, and remains on when packets are being received but are not
+ * logged (because the log is being erased).  The green LED blinks
+ * rapidly after a power cycle when logged packets are transmitted.
+ *
+ * @author Prabal Dutta
+ * @date   Apr 6, 2007
+ */
+#include <Timer.h>
+#include "StorageVolumes.h"
+
+configuration PacketParrotC {
+}
+implementation {
+  components MainC;
+  components LedsC;
+  components PacketParrotP as App;
+  components ActiveMessageC;
+  components CC2420CsmaC;
+  components new LogStorageC(VOLUME_LOGTEST, TRUE);
+  components new TimerMilliC() as Timer0;
+
+  App.Boot -> MainC;
+  App.Leds -> LedsC;
+  App.Packet -> ActiveMessageC;
+  App.AMControl -> ActiveMessageC;
+  App.Send -> CC2420CsmaC;
+  App.Receive -> CC2420CsmaC;
+  App.LogRead -> LogStorageC;
+  App.LogWrite -> LogStorageC;
+  App.Timer0 -> Timer0;
+}
diff --git a/apps/tutorials/PacketParrot/PacketParrotP.nc b/apps/tutorials/PacketParrot/PacketParrotP.nc
new file mode 100644
index 00000000..bb99b343
--- /dev/null
+++ b/apps/tutorials/PacketParrot/PacketParrotP.nc
@@ -0,0 +1,158 @@
+/*                                                                      tab:2
+ *
+ * Copyright (c) 2000-2007 The Regents of the University of
+ * California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Implementation of the <code>PacketParrot</code> application.
+ *
+ * @author Prabal Dutta
+ * @date   Apr 6, 2007
+ */
+module PacketParrotP {
+  uses {
+    interface Boot;
+    interface Leds;
+    interface Packet;
+    interface Send;
+    interface Receive;
+    interface SplitControl as AMControl;
+    interface LogRead;
+    interface LogWrite;
+    interface Timer<TMilli> as Timer0;
+  }
+}
+implementation {
+
+  enum {
+    INTER_PACKET_INTERVAL = 25
+  };
+
+  typedef nx_struct logentry_t {
+    nx_uint8_t len;
+    message_t msg;
+  } logentry_t;
+
+  bool m_busy = TRUE;
+  logentry_t m_entry;
+
+  event void Boot.booted() {
+    call AMControl.start();
+  }
+
+
+  event void AMControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+      if (call LogRead.read(&m_entry, sizeof(logentry_t)) != SUCCESS) {
+	// Handle error.
+      }
+    }
+    else {
+      call AMControl.start();
+    }
+  }
+
+
+  event void AMControl.stopDone(error_t err) {
+  }
+
+
+  event void LogRead.readDone(void* buf, storage_len_t len, error_t err) {
+    if ( (len == sizeof(logentry_t)) && (buf == &m_entry) ) {
+      call Send.send(&m_entry.msg, m_entry.len);
+      call Leds.led1On();
+    }
+    else {
+      if (call LogWrite.erase() != SUCCESS) {
+	// Handle error.
+      }
+      call Leds.led0On();
+    }
+  }
+
+
+  event void Send.sendDone(message_t* msg, error_t err) {
+    call Leds.led1Off();
+    if ( (err == SUCCESS) && (msg == &m_entry.msg) ) {
+      call Packet.clear(&m_entry.msg);
+      if (call LogRead.read(&m_entry, sizeof(logentry_t)) != SUCCESS) {
+	// Handle error.
+      }
+    }
+    else {
+      call Timer0.startOneShot(INTER_PACKET_INTERVAL);
+    }
+  }
+
+
+  event void Timer0.fired() {
+    call Send.send(&m_entry.msg, m_entry.len);
+  }
+
+
+  event void LogWrite.eraseDone(error_t err) {
+    if (err == SUCCESS) {
+      m_busy = FALSE;
+    }
+    else {
+      // Handle error.
+    }
+    call Leds.led0Off();
+  }
+
+
+  event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){
+    call Leds.led2On();
+    if (!m_busy) {
+      m_busy = TRUE;
+      m_entry.len = len;
+      m_entry.msg = *msg;
+      if (call LogWrite.append(&m_entry, sizeof(logentry_t)) != SUCCESS) {
+	m_busy = FALSE;
+      }
+    }
+    return msg;
+  }
+
+  event void LogWrite.appendDone(void* buf, storage_len_t len, 
+                                 bool recordsLost, error_t err) {
+    m_busy = FALSE;
+    call Leds.led2Off();
+  }
+
+  event void LogRead.seekDone(error_t err) {
+  }
+
+  event void LogWrite.syncDone(error_t err) {
+  }
+
+}
diff --git a/apps/tutorials/PacketParrot/README.txt b/apps/tutorials/PacketParrot/README.txt
new file mode 100644
index 00000000..0d9bf635
--- /dev/null
+++ b/apps/tutorials/PacketParrot/README.txt
@@ -0,0 +1,58 @@
+$Id: README.txt,v 1.3 2007-04-19 07:39:18 prabal Exp $
+
+README for PacketParrot
+
+Author/Contact:
+
+  tinyos-help@millennium.berkeley.edu
+
+Description:
+
+  PacketParrot demonstrates use of LogWrite and LogRead abstractions.
+  A node writes received packets to a circular log and retransmits the
+  logged packets (or at least the parts of the packets above the AM
+  layer) when power cycled.
+
+  The application logs packets it receives from the radio to flash.
+  On a subsequent power cycle, the application transmits any logged
+  packets, erases the log, and then continues to log packets again.
+  The red LED is on when the log is being erased.  The blue (yellow)
+  LED turns on when a packet is received and turns off when a packet
+  has been logged successfully.  The blue (yellow) LED remains on when
+  packets are being received but are not logged (because the log is
+  being erased).  The green LED flickers rapidly after a power cycle
+  when logged packets are transmitted.
+
+  To use this application:
+
+  (i)   Program one node (the "parrot") with this application using 
+        the typical command (e.g. make telosb install)
+  (ii)  Program a second node with the BlinkToRadio application.
+  (iii) Turn the parrot node on.  The red LED will turn on briefly, 
+        indicating that the flash volume is being erased.
+  (iv)  Turn the second node on.  Nothing should happen on the second 
+        node but the blue (yellow) LED on the parrot node should start
+        to blink, indicating it is receiving packets and logging them 
+        to flash.
+  (v)   After a few tens of seconds, focus you attention on the second 
+        node's LEDs and then power cycle the parrot node.  The LEDs on 
+        the second node should rapidly flash as if they were displaying 
+        the three low-order bits of a counter.  At the same time, the 
+        green LED on the parrot node should flicker rapidly, in unison 
+        with the LEDs on the second node, indicating that packets are 
+        being transmitted.
+  (vi)  Repeat step (v) a few times and notice that the parrot's blue 
+        (yellow) LED turns on and doesn't turn off until just a bit 
+        after the red LED, indicating that one or more packets were 
+        received (the LED turned on) but these packets were not logged 
+        (since the LED does not turn off) because the log is being 
+        erased.
+
+Tools:
+
+  None
+
+Known bugs/limitations:
+
+  Only works on motes with the CC2420 radio.  Tested and verified with
+  TelosB, Tmote, and MicaZ nodes.
diff --git a/apps/tutorials/PacketParrot/volumes-at45db.xml b/apps/tutorials/PacketParrot/volumes-at45db.xml
new file mode 100644
index 00000000..7cc59802
--- /dev/null
+++ b/apps/tutorials/PacketParrot/volumes-at45db.xml
@@ -0,0 +1,4 @@
+<volume_table>
+  <volume name="LOGTEST" size="262144"/>
+  <volume name="CONFIGTEST" size="4608"/>
+</volume_table>
diff --git a/apps/tutorials/PacketParrot/volumes-stm25p.xml b/apps/tutorials/PacketParrot/volumes-stm25p.xml
new file mode 100644
index 00000000..adce9924
--- /dev/null
+++ b/apps/tutorials/PacketParrot/volumes-stm25p.xml
@@ -0,0 +1,4 @@
+<volume_table>
+  <volume name="LOGTEST" size="262144"/>
+  <volume name="CONFIGTEST" size="131072"/>
+</volume_table>
diff --git a/apps/tutorials/Printf/Makefile b/apps/tutorials/Printf/Makefile
new file mode 100644
index 00000000..dd482a5d
--- /dev/null
+++ b/apps/tutorials/Printf/Makefile
@@ -0,0 +1,4 @@
+COMPONENT=TestPrintfAppC
+CFLAGS += -I$(TOSDIR)/lib/printf
+
+include $(MAKERULES)
diff --git a/apps/tutorials/Printf/TestPrintfAppC.nc b/apps/tutorials/Printf/TestPrintfAppC.nc
new file mode 100644
index 00000000..e5c5b3ab
--- /dev/null
+++ b/apps/tutorials/Printf/TestPrintfAppC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This application is used to test the basic functionality of the printf service.  
+ * It is initiated by calling the start() command of the SplitControl interface 
+ * provided by the PrintfC component.  After starting the printf service, calls to 
+ * the standard c-style printf command are made to print various strings of text 
+ * over the serial line.  Only upon calling PrintfFlush.flush() does the data 
+ * actually get sent out over the serial line.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.3 $
+ * @date $Date: 2010-06-29 22:07:40 $
+ */
+ 
+#include "printf.h"
+
+configuration TestPrintfAppC{
+}
+implementation {
+  components MainC, TestPrintfC;
+
+  TestPrintfC.Boot -> MainC;
+}
+
diff --git a/apps/tutorials/Printf/TestPrintfC.nc b/apps/tutorials/Printf/TestPrintfC.nc
new file mode 100644
index 00000000..5d97bff7
--- /dev/null
+++ b/apps/tutorials/Printf/TestPrintfC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ *
+ * This application is used to test the basic functionality of the printf service.  
+ * It is initiated by calling the start() command of the SplitControl interface 
+ * provided by the PrintfC component.  After starting the printf service, calls to 
+ * the standard c-style printf command are made to print various strings of text 
+ * over the serial line.  Only upon calling PrintfFlush.flush() does the data 
+ * actually get sent out over the serial line.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.3 $
+ * @date $Date: 2010-06-29 22:07:40 $
+ */
+
+#include "printf.h"
+module TestPrintfC {
+  uses {
+    interface Boot;
+  }
+}
+implementation {
+	
+  uint8_t dummyVar1 = 123;
+  uint16_t dummyVar2 = 12345;
+  uint32_t dummyVar3 = 1234567890;
+
+  event void Boot.booted() {
+  	printf("Hi I am writing to you from my TinyOS application!!\n");
+  	printf("Here is a uint8: %u\n", dummyVar1);
+  	printf("Here is a uint16: %u\n", dummyVar2);
+  	printf("Here is a uint32: %ld\n", dummyVar3);
+  	printfflush();
+  }
+}
+
diff --git a/apps/tutorials/RssiDemo/InterceptBase/BaseStationC.nc b/apps/tutorials/RssiDemo/InterceptBase/BaseStationC.nc
new file mode 100644
index 00000000..fcd4eeec
--- /dev/null
+++ b/apps/tutorials/RssiDemo/InterceptBase/BaseStationC.nc
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * The TinyOS 2.x base station that forwards packets between the UART
+ * and radio.It replaces the GenericBase of TinyOS 1.0 and the
+ * TOSBase of TinyOS 1.1.
+ *
+ * <p>On the serial link, BaseStation sends and receives simple active
+ * messages (not particular radio packets): on the radio link, it
+ * sends radio active messages, whose format depends on the network
+ * stack being used. BaseStation will copy its compiled-in group ID to
+ * messages moving from the serial link to the radio, and will filter
+ * out incoming radio messages that do not contain that group ID.</p>
+ *
+ * <p>BaseStation includes queues in both directions, with a guarantee
+ * that once a message enters a queue, it will eventually leave on the
+ * other interface. The queues allow the BaseStation to handle load
+ * spikes.</p>
+ *
+ * <p>BaseStation acknowledges a message arriving over the serial link
+ * only if that message was successfully enqueued for delivery to the
+ * radio link.</p>
+ *
+ * <p>The LEDS are programmed to toggle as follows:</p>
+ * <ul>
+ * <li><b>RED Toggle:</b>: Message bridged from serial to radio</li>
+ * <li><b>GREEN Toggle:</b> Message bridged from radio to serial</li>
+ * <li><b>YELLOW/BLUE Toggle:</b> Dropped message due to queue overflow in either direction</li>
+ * </ul>
+ *
+ * @author Phil Buonadonna
+ * @author Gilman Tolle
+ * @author David Gay
+ * @author Philip Levis
+ * @author Dimas Abreu Dutra
+ * @date January 29 2008
+ */
+
+configuration BaseStationC {
+  provides interface Intercept as RadioIntercept[am_id_t amid];
+  provides interface Intercept as SerialIntercept[am_id_t amid];
+}
+implementation {
+  components MainC, BaseStationP, LedsC;
+  components ActiveMessageC as Radio, SerialActiveMessageC as Serial;
+
+  RadioIntercept = BaseStationP.RadioIntercept;
+  SerialIntercept = BaseStationP.SerialIntercept;
+  
+  MainC.Boot <- BaseStationP;
+
+  BaseStationP.RadioControl -> Radio;
+  BaseStationP.SerialControl -> Serial;
+  
+  BaseStationP.UartSend -> Serial;
+  BaseStationP.UartReceive -> Serial;
+  BaseStationP.UartPacket -> Serial;
+  BaseStationP.UartAMPacket -> Serial;
+  
+  BaseStationP.RadioSend -> Radio;
+  BaseStationP.RadioReceive -> Radio.Receive;
+  BaseStationP.RadioSnoop -> Radio.Snoop;
+  BaseStationP.RadioPacket -> Radio;
+  BaseStationP.RadioAMPacket -> Radio;
+  
+  BaseStationP.Leds -> LedsC;
+}
diff --git a/apps/tutorials/RssiDemo/InterceptBase/BaseStationP.nc b/apps/tutorials/RssiDemo/InterceptBase/BaseStationP.nc
new file mode 100644
index 00000000..73f00203
--- /dev/null
+++ b/apps/tutorials/RssiDemo/InterceptBase/BaseStationP.nc
@@ -0,0 +1,327 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * @author Phil Buonadonna
+ * @author Gilman Tolle
+ * @author David Gay
+ * @author Dimas Abreu Dutra
+ */
+  
+/* 
+ * BaseStationP bridges packets between a serial channel and the radio.
+ * Messages moving from serial to radio will be tagged with the group
+ * ID compiled into the TOSBase, and messages moving from radio to
+ * serial will be filtered by that same group id.
+ */
+
+#include "AM.h"
+#include "Serial.h"
+
+module BaseStationP @safe() {
+  uses {
+    interface Boot;
+    interface SplitControl as SerialControl;
+    interface SplitControl as RadioControl;
+
+    interface AMSend as UartSend[am_id_t id];
+    interface Receive as UartReceive[am_id_t id];
+    interface Packet as UartPacket;
+    interface AMPacket as UartAMPacket;
+    
+    interface AMSend as RadioSend[am_id_t id];
+    interface Receive as RadioReceive[am_id_t id];
+    interface Receive as RadioSnoop[am_id_t id];
+    interface Packet as RadioPacket;
+    interface AMPacket as RadioAMPacket;
+
+    interface Leds;
+  }
+  
+  provides interface Intercept as RadioIntercept[am_id_t amid];
+  provides interface Intercept as SerialIntercept[am_id_t amid];
+}
+
+implementation
+{
+  enum {
+    UART_QUEUE_LEN = 12,
+    RADIO_QUEUE_LEN = 12,
+  };
+
+  message_t  uartQueueBufs[UART_QUEUE_LEN];
+  message_t  *uartQueue[UART_QUEUE_LEN];
+  uint8_t    uartIn, uartOut;
+  bool       uartBusy, uartFull;
+
+  message_t  radioQueueBufs[RADIO_QUEUE_LEN];
+  message_t  *radioQueue[RADIO_QUEUE_LEN];
+  uint8_t    radioIn, radioOut;
+  bool       radioBusy, radioFull;
+
+  task void uartSendTask();
+  task void radioSendTask();
+
+  void dropBlink() {
+    call Leds.led2Toggle();
+  }
+
+  void failBlink() {
+    call Leds.led2Toggle();
+  }
+
+  event void Boot.booted() {
+    uint8_t i;
+
+    for (i = 0; i < UART_QUEUE_LEN; i++)
+      uartQueue[i] = &uartQueueBufs[i];
+    uartIn = uartOut = 0;
+    uartBusy = FALSE;
+    uartFull = TRUE;
+
+    for (i = 0; i < RADIO_QUEUE_LEN; i++)
+      radioQueue[i] = &radioQueueBufs[i];
+    radioIn = radioOut = 0;
+    radioBusy = FALSE;
+    radioFull = TRUE;
+
+    call RadioControl.start();
+    call SerialControl.start();
+  }
+
+  event void RadioControl.startDone(error_t error) {
+    if (error == SUCCESS) {
+      radioFull = FALSE;
+    }
+  }
+
+  event void SerialControl.startDone(error_t error) {
+    if (error == SUCCESS) {
+      uartFull = FALSE;
+    }
+  }
+
+  event void SerialControl.stopDone(error_t error) {}
+  event void RadioControl.stopDone(error_t error) {}
+
+  uint8_t count = 0;
+
+  message_t* receive(message_t* msg, void* payload,
+		     uint8_t len, am_id_t id);
+  
+  event message_t *RadioSnoop.receive[am_id_t id](message_t *msg,
+						    void *payload,
+						    uint8_t len) {
+    return receive(msg, payload, len, id);
+  }
+  
+  event message_t *RadioReceive.receive[am_id_t id](message_t *msg,
+						    void *payload,
+						    uint8_t len) {
+    return receive(msg, payload, len, id);
+  }
+
+  message_t* receive(message_t *msg, void *payload, uint8_t len, am_id_t id) {
+    message_t *ret = msg;
+    
+    if (!signal RadioIntercept.forward[id](msg,payload,len))
+      return ret;
+
+    atomic {
+      if (!uartFull)
+	{
+	  ret = uartQueue[uartIn];
+	  uartQueue[uartIn] = msg;
+
+	  uartIn = (uartIn + 1) % UART_QUEUE_LEN;
+	
+	  if (uartIn == uartOut)
+	    uartFull = TRUE;
+
+	  if (!uartBusy)
+	    {
+	      post uartSendTask();
+	      uartBusy = TRUE;
+	    }
+	}
+      else
+	dropBlink();
+    }
+    
+    return ret;
+  }
+
+  uint8_t tmpLen;
+  
+  task void uartSendTask() {
+    uint8_t len;
+    am_id_t id;
+    am_addr_t addr, src;
+    message_t* msg;
+    atomic
+      if (uartIn == uartOut && !uartFull)
+	{
+	  uartBusy = FALSE;
+	  return;
+	}
+
+    msg = uartQueue[uartOut];
+    tmpLen = len = call RadioPacket.payloadLength(msg);
+    id = call RadioAMPacket.type(msg);
+    addr = call RadioAMPacket.destination(msg);
+    src = call RadioAMPacket.source(msg);
+    call UartAMPacket.setSource(msg, src);
+
+    if (call UartSend.send[id](addr, uartQueue[uartOut], len) == SUCCESS)
+      call Leds.led1Toggle();
+    else
+      {
+	failBlink();
+	post uartSendTask();
+      }
+  }
+
+  event void UartSend.sendDone[am_id_t id](message_t* msg, error_t error) {
+    if (error != SUCCESS)
+      failBlink();
+    else
+      atomic
+	if (msg == uartQueue[uartOut])
+	  {
+	    if (++uartOut >= UART_QUEUE_LEN)
+	      uartOut = 0;
+	    if (uartFull)
+	      uartFull = FALSE;
+	  }
+    post uartSendTask();
+  }
+
+  event message_t *UartReceive.receive[am_id_t id](message_t *msg,
+						   void *payload,
+						   uint8_t len) {       
+    message_t *ret = msg;
+    bool reflectToken = FALSE;
+
+    if (!signal SerialIntercept.forward[id](msg,payload,len))
+      return ret;
+
+    atomic
+      if (!radioFull)
+	{
+	  reflectToken = TRUE;
+	  ret = radioQueue[radioIn];
+	  radioQueue[radioIn] = msg;
+	  if (++radioIn >= RADIO_QUEUE_LEN)
+	    radioIn = 0;
+	  if (radioIn == radioOut)
+	    radioFull = TRUE;
+
+	  if (!radioBusy)
+	    {
+	      post radioSendTask();
+	      radioBusy = TRUE;
+	    }
+	}
+      else
+	dropBlink();
+
+    if (reflectToken) {
+      //call UartTokenReceive.ReflectToken(Token);
+    }
+    
+    return ret;
+  }
+
+  task void radioSendTask() {
+    uint8_t len;
+    am_id_t id;
+    am_addr_t addr;
+    message_t* msg;
+    
+    atomic
+      if (radioIn == radioOut && !radioFull)
+	{
+	  radioBusy = FALSE;
+	  return;
+	}
+
+    msg = radioQueue[radioOut];
+    len = call UartPacket.payloadLength(msg);
+    addr = call UartAMPacket.destination(msg);
+    id = call UartAMPacket.type(msg);
+    if (call RadioSend.send[id](addr, msg, len) == SUCCESS)
+      call Leds.led0Toggle();
+    else
+      {
+	failBlink();
+	post radioSendTask();
+      }
+  }
+
+  event void RadioSend.sendDone[am_id_t id](message_t* msg, error_t error) {
+    if (error != SUCCESS)
+      failBlink();
+    else
+      atomic
+	if (msg == radioQueue[radioOut])
+	  {
+	    if (++radioOut >= RADIO_QUEUE_LEN)
+	      radioOut = 0;
+	    if (radioFull)
+	      radioFull = FALSE;
+	  }
+    
+    post radioSendTask();
+  }
+
+  default event bool
+  RadioIntercept.forward[am_id_t amid](message_t* msg,
+				       void* payload,
+				       uint8_t len) {
+    return TRUE;
+  }
+
+  default event bool
+  SerialIntercept.forward[am_id_t amid](message_t* msg,
+					void* payload,
+					uint8_t len) {
+    return TRUE;
+  }
+}  
diff --git a/apps/tutorials/RssiDemo/InterceptBase/Makefile b/apps/tutorials/RssiDemo/InterceptBase/Makefile
new file mode 100644
index 00000000..3c052e79
--- /dev/null
+++ b/apps/tutorials/RssiDemo/InterceptBase/Makefile
@@ -0,0 +1,6 @@
+COMPONENT=BaseStationC
+CFLAGS += -DCC2420_NO_ACKNOWLEDGEMENTS
+CFLAGS += -DCC2420_NO_ADDRESS_RECOGNITION
+
+include $(MAKERULES)
+
diff --git a/apps/tutorials/RssiDemo/RssiBase/ApplicationDefinitions.h b/apps/tutorials/RssiDemo/RssiBase/ApplicationDefinitions.h
new file mode 100644
index 00000000..163055d2
--- /dev/null
+++ b/apps/tutorials/RssiDemo/RssiBase/ApplicationDefinitions.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2008 Dimas Abreu Dutra
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL DIMAS ABREU
+ * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Dimas Abreu Dutra
+ */
+
+#ifndef APPLICATIONDEFINITIONS_H__
+#define APPLICATIONDEFINITIONS_H__
+
+enum {
+  SEND_INTERVAL_MS = 250
+};
+
+#endif //APPLICATIONDEFINITIONS_H__
diff --git a/apps/tutorials/RssiDemo/RssiBase/Makefile b/apps/tutorials/RssiDemo/RssiBase/Makefile
new file mode 100644
index 00000000..d2f93f6b
--- /dev/null
+++ b/apps/tutorials/RssiDemo/RssiBase/Makefile
@@ -0,0 +1,12 @@
+COMPONENT=RssiBaseAppC
+
+INCLUDES= -I..               \
+          -I../InterceptBase
+
+CFLAGS += $(INCLUDES)
+
+ifneq ($(filter iris,$(MAKECMDGOALS)),) 
+	CFLAGS += -DRF230_RSSI_ENERGY
+endif
+
+include $(MAKERULES)
diff --git a/apps/tutorials/RssiDemo/RssiBase/RssiBaseAppC.nc b/apps/tutorials/RssiDemo/RssiBase/RssiBaseAppC.nc
new file mode 100644
index 00000000..5fba6f1a
--- /dev/null
+++ b/apps/tutorials/RssiDemo/RssiBase/RssiBaseAppC.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2008 Dimas Abreu Dutra
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL DIMAS ABREU
+ * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Dimas Abreu Dutra
+ */
+
+#include "RssiDemoMessages.h"
+#include "message.h"
+
+configuration RssiBaseAppC {
+} implementation {
+  components BaseStationC;
+  components RssiBaseC as App;
+
+#ifdef __CC2420_H__
+  components CC2420ActiveMessageC;
+  App -> CC2420ActiveMessageC.CC2420Packet;
+#elif  defined(PLATFORM_IRIS)
+  components  RF230ActiveMessageC;
+  App -> RF230ActiveMessageC.PacketRSSI;
+#elif defined(TDA5250_MESSAGE_H)
+  components Tda5250ActiveMessageC;
+  App -> Tda5250ActiveMessageC.Tda5250Packet;
+#endif
+  
+  App-> BaseStationC.RadioIntercept[AM_RSSIMSG];
+}
diff --git a/apps/tutorials/RssiDemo/RssiBase/RssiBaseC.nc b/apps/tutorials/RssiDemo/RssiBase/RssiBaseC.nc
new file mode 100644
index 00000000..a837d8d8
--- /dev/null
+++ b/apps/tutorials/RssiDemo/RssiBase/RssiBaseC.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2008 Dimas Abreu Dutra
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL DIMAS ABREU
+ * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Dimas Abreu Dutra
+ */
+
+#include "ApplicationDefinitions.h"
+#include "RssiDemoMessages.h"  
+
+module RssiBaseC {
+  uses interface Intercept as RssiMsgIntercept;
+
+#ifdef __CC2420_H__
+  uses interface CC2420Packet;
+#elif defined(TDA5250_MESSAGE_H)
+  uses interface Tda5250Packet;    
+#else
+  uses interface PacketField<uint8_t> as PacketRSSI;
+#endif 
+} implementation {
+
+  uint16_t getRssi(message_t *msg);
+  
+  event bool RssiMsgIntercept.forward(message_t *msg,
+				      void *payload,
+				      uint8_t len) {
+    RssiMsg *rssiMsg = (RssiMsg*) payload;
+    rssiMsg->rssi = getRssi(msg);
+    
+    return TRUE;
+  }
+
+#ifdef __CC2420_H__  
+  uint16_t getRssi(message_t *msg){
+    return (uint16_t) call CC2420Packet.getRssi(msg);
+  }
+#elif defined(CC1K_RADIO_MSG_H)
+    uint16_t getRssi(message_t *msg){
+    cc1000_metadata_t *md =(cc1000_metadata_t*) msg->metadata;
+    return md->strength_or_preamble;
+  }
+#elif defined(PLATFORM_IRIS)
+  uint16_t getRssi(message_t *msg){
+    if(call PacketRSSI.isSet(msg))
+      return (uint16_t) call PacketRSSI.get(msg);
+    else
+      return 0xFFFF;
+  }
+#elif defined(TDA5250_MESSAGE_H)
+   uint16_t getRssi(message_t *msg){
+       return call Tda5250Packet.getSnr(msg);
+   }
+#else
+  #error Radio chip not supported! This demo currently works only \
+         for motes with CC1000, CC2420, RF230 or TDA5250 radios.  
+#endif
+}
diff --git a/apps/tutorials/RssiDemo/RssiDemoMessages.h b/apps/tutorials/RssiDemo/RssiDemoMessages.h
new file mode 100644
index 00000000..ccd081da
--- /dev/null
+++ b/apps/tutorials/RssiDemo/RssiDemoMessages.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2008 Dimas Abreu Dutra
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL DIMAS ABREU
+ * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Dimas Abreu Dutra
+ */
+
+#ifndef RSSIDEMOMESSAGES_H__
+#define RSSIDEMOMESSAGES_H__
+
+enum {
+  AM_RSSIMSG = 10
+};
+
+typedef nx_struct RssiMsg{
+  nx_int16_t rssi;
+} RssiMsg;
+
+#endif //RSSIDEMOMESSAGES_H__
diff --git a/apps/tutorials/RssiDemo/SendingMote/ApplicationDefinitions.h b/apps/tutorials/RssiDemo/SendingMote/ApplicationDefinitions.h
new file mode 100644
index 00000000..163055d2
--- /dev/null
+++ b/apps/tutorials/RssiDemo/SendingMote/ApplicationDefinitions.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2008 Dimas Abreu Dutra
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL DIMAS ABREU
+ * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Dimas Abreu Dutra
+ */
+
+#ifndef APPLICATIONDEFINITIONS_H__
+#define APPLICATIONDEFINITIONS_H__
+
+enum {
+  SEND_INTERVAL_MS = 250
+};
+
+#endif //APPLICATIONDEFINITIONS_H__
diff --git a/apps/tutorials/RssiDemo/SendingMote/Makefile b/apps/tutorials/RssiDemo/SendingMote/Makefile
new file mode 100644
index 00000000..3ff539ae
--- /dev/null
+++ b/apps/tutorials/RssiDemo/SendingMote/Makefile
@@ -0,0 +1,7 @@
+COMPONENT=SendingMoteAppC
+
+INCLUDES= -I..
+
+CFLAGS += $(INCLUDES)
+
+include $(MAKERULES)
diff --git a/apps/tutorials/RssiDemo/SendingMote/SendingMoteAppC.nc b/apps/tutorials/RssiDemo/SendingMote/SendingMoteAppC.nc
new file mode 100644
index 00000000..c953fb29
--- /dev/null
+++ b/apps/tutorials/RssiDemo/SendingMote/SendingMoteAppC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2008 Dimas Abreu Dutra
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL DIMAS ABREU
+ * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Dimas Abreu Dutra
+ */
+
+#include "RssiDemoMessages.h"
+
+configuration SendingMoteAppC {
+} implementation {
+  components ActiveMessageC, MainC;  
+  components new AMSenderC(AM_RSSIMSG) as RssiMsgSender;
+  components new TimerMilliC() as SendTimer;
+
+  components SendingMoteC as App;
+
+  App.Boot -> MainC;
+  App.SendTimer -> SendTimer;
+  
+  App.RssiMsgSend -> RssiMsgSender;
+  App.RadioControl -> ActiveMessageC;
+}
diff --git a/apps/tutorials/RssiDemo/SendingMote/SendingMoteC.nc b/apps/tutorials/RssiDemo/SendingMote/SendingMoteC.nc
new file mode 100644
index 00000000..8318cae6
--- /dev/null
+++ b/apps/tutorials/RssiDemo/SendingMote/SendingMoteC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2008 Dimas Abreu Dutra
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL DIMAS ABREU
+ * DUTRA OR HIS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Dimas Abreu Dutra
+ */
+
+#include "ApplicationDefinitions.h"
+#include "RssiDemoMessages.h"
+
+module SendingMoteC {
+  uses interface Boot;
+  uses interface Timer<TMilli> as SendTimer;
+  
+  uses interface AMSend as RssiMsgSend;
+  uses interface SplitControl as RadioControl;
+} implementation {
+  message_t msg;
+  
+  event void Boot.booted(){
+    call RadioControl.start();
+  }
+
+  event void RadioControl.startDone(error_t result){
+    call SendTimer.startPeriodic(SEND_INTERVAL_MS);
+  }
+
+  event void RadioControl.stopDone(error_t result){}
+
+
+  event void SendTimer.fired(){
+    call RssiMsgSend.send(AM_BROADCAST_ADDR, &msg, sizeof(RssiMsg));    
+  }
+
+  event void RssiMsgSend.sendDone(message_t *m, error_t error){}
+}
diff --git a/apps/tutorials/RssiDemo/java/Makefile b/apps/tutorials/RssiDemo/java/Makefile
new file mode 100644
index 00000000..33fe237d
--- /dev/null
+++ b/apps/tutorials/RssiDemo/java/Makefile
@@ -0,0 +1,10 @@
+all: RssiDemo.class
+
+RssiMsg.class: RssiMsg.java
+	javac $<
+
+RssiDemo.class: RssiDemo.java RssiMsg.java
+	javac $^
+
+RssiMsg.java: ../RssiDemoMessages.h
+	mig java -target=null -java-classname=RssiMsg $< RssiMsg -o $@
diff --git a/apps/tutorials/RssiDemo/java/RssiDemo.java b/apps/tutorials/RssiDemo/java/RssiDemo.java
new file mode 100644
index 00000000..48012e7a
--- /dev/null
+++ b/apps/tutorials/RssiDemo/java/RssiDemo.java
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * This is a modified version of TestSerial.java, from apps/tests/TestSerial
+ * from TinyOS 2.x (www.tinyos.net)
+ */
+
+/**
+ * Java-side application for testing the RSSI demo
+ *
+ * @author Phil Levis <pal@cs.berkeley.edu>
+ * @author Dimas Abreu Dutra <dimas@dcc.ufmb.br>
+ * @date April 11 2008
+ */
+
+import java.io.IOException;
+
+import net.tinyos.message.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+public class RssiDemo implements MessageListener {
+
+  private MoteIF moteIF;
+  
+  public RssiDemo(MoteIF moteIF) {
+    this.moteIF = moteIF;
+    this.moteIF.registerListener(new RssiMsg(), this);
+  }
+    
+  public void messageReceived(int to, Message message) {
+    RssiMsg msg = (RssiMsg) message;
+    int source = message.getSerialPacket().get_header_src();
+    System.out.println("Rssi Message received from node " + source + 
+		       ": Rssi = " +  msg.get_rssi());
+  }
+  
+  private static void usage() {
+    System.err.println("usage: RssiDemo [-comm <source>]");
+  }
+  
+  public static void main(String[] args) throws Exception {
+    String source = null;
+    if (args.length == 2) {
+      if (!args[0].equals("-comm")) {
+	usage();
+	System.exit(1);
+      }
+      source = args[1];
+    }
+    else if (args.length != 0) {
+      usage();
+      System.exit(1);
+    }
+    
+    PhoenixSource phoenix;
+    
+    if (source == null) {
+      phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err);
+    }
+    else {
+      phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err);
+    }
+
+    MoteIF mif = new MoteIF(phoenix);
+    RssiDemo serial = new RssiDemo(mif);
+  }
+
+
+}
diff --git a/apps/tutorials/SharedResourceDemo/Makefile b/apps/tutorials/SharedResourceDemo/Makefile
new file mode 100644
index 00000000..0ba996c4
--- /dev/null
+++ b/apps/tutorials/SharedResourceDemo/Makefile
@@ -0,0 +1,3 @@
+COMPONENT=SharedResourceDemoAppC
+include $(MAKERULES)
+
diff --git a/apps/tutorials/SharedResourceDemo/README.txt b/apps/tutorials/SharedResourceDemo/README.txt
new file mode 100644
index 00000000..cafe125b
--- /dev/null
+++ b/apps/tutorials/SharedResourceDemo/README.txt
@@ -0,0 +1,35 @@
+README for SharedResourceDemo
+Author/Contact: tinyos-help@millennium.berkeley.edu
+@author Kevin Klues <klues@tkn.tu-berlin.de>
+
+Description:
+
+This application is used to test the use of Shared Resources.  
+Three Resource users are created and all three request
+control of the resource before any one of them is granted it.
+Once the first user is granted control of the resource, it performs
+some operation on it.  Once this operation has completed, a timer
+is set to allow this user to have control of it for a specific
+amount of time.  Once this timer expires, the resource is released
+and then immediately requested again.  Upon releasing the resource
+control will be granted to the next user that has requested it in 
+round robin order.  Initial requests are made by the three resource 
+users in the following order.
+  -- Resource 0
+  -- Resource 2
+  -- Resource 1
+It is expected then that using a round robin policy, control of the
+resource will be granted in the order of 0,1,2 and the Leds
+corresponding to each resource will flash whenever this occurs.
+  -- Led 0 -> Resource 0
+  -- Led 1 -> Resource 1
+  -- Led 2 -> Resource 2
+
+Tools:
+
+None.
+
+Known bugs/limitations:
+
+None.
+
diff --git a/apps/tutorials/SharedResourceDemo/ResourceOperations.nc b/apps/tutorials/SharedResourceDemo/ResourceOperations.nc
new file mode 100644
index 00000000..aed92e1e
--- /dev/null
+++ b/apps/tutorials/SharedResourceDemo/ResourceOperations.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * An EXAMPLE of an interface for performing operations on a resource.
+ * In this test application it is provided by the dedicated ResourceP component
+ * and passed through all of the proper components before being exposed by the
+ * shared resource at the topmost level.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.2 $
+ * @date $Date: 2010-06-29 22:07:40 $
+ */
+
+interface ResourceOperations {
+	command error_t operation();
+	event void operationDone(error_t error);
+}
diff --git a/apps/tutorials/SharedResourceDemo/ResourceP.nc b/apps/tutorials/SharedResourceDemo/ResourceP.nc
new file mode 100644
index 00000000..f44d8f03
--- /dev/null
+++ b/apps/tutorials/SharedResourceDemo/ResourceP.nc
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This is an example implementation of a dedicated resource.  
+ * It provides the SplitControl interface for power management
+ * of the resource and an EXAMPLE ResourceOperations interface
+ * for performing operations on it.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.2 $
+ * @date $Date: 2010-06-29 22:07:40 $
+ */
+
+module ResourceP {
+  provides {
+    interface SplitControl;
+    interface ResourceOperations;
+  }
+}
+implementation {
+	
+  bool lock;
+	
+  task void startDone() {
+  	lock = FALSE;
+  	signal SplitControl.startDone(SUCCESS);
+  }
+  
+  task void stopDone() {
+  	signal SplitControl.stopDone(SUCCESS);
+  }
+  
+  task void operationDone() {
+  	lock = FALSE;
+  	signal ResourceOperations.operationDone(SUCCESS);
+  }
+	
+  command error_t SplitControl.start() {
+  	post startDone();
+  	return  SUCCESS;
+  }
+  
+  command error_t SplitControl.stop() {
+  	lock = TRUE;
+  	post stopDone();
+  	return  SUCCESS;
+  }
+  
+  command error_t ResourceOperations.operation() {
+  	if(lock == FALSE) {
+      lock = TRUE;
+  	  post operationDone();
+  	  return SUCCESS;
+  	}
+  	return FAIL;
+  }
+}
+
diff --git a/apps/tutorials/SharedResourceDemo/SharedResourceC.nc b/apps/tutorials/SharedResourceDemo/SharedResourceC.nc
new file mode 100644
index 00000000..06713f6a
--- /dev/null
+++ b/apps/tutorials/SharedResourceDemo/SharedResourceC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * SharedResourceC is used to provide a generic configuration around 
+ * the SharedResourceP component so that new instantiations of 
+ * it provide a single set of interfaces that are all properly associated 
+ * with one another rather than requiring the user to deal with the complexity
+ * of doing this themselves.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.2 $
+ * @date $Date: 2010-06-29 22:07:40 $
+ */
+ 
+#define UQ_SHARED_RESOURCE   "Shared.Resource"
+generic configuration SharedResourceC() {
+	provides interface Resource;
+	provides interface ResourceRequested;
+	provides interface ResourceOperations;
+    uses interface ResourceConfigure;
+}
+implementation {
+  components SharedResourceP;
+  
+  enum {
+    RESOURCE_ID = unique(UQ_SHARED_RESOURCE)
+  };
+
+  Resource = SharedResourceP.Resource[RESOURCE_ID];
+  ResourceRequested = SharedResourceP.ResourceRequested[RESOURCE_ID];
+  ResourceOperations = SharedResourceP.ResourceOperations[RESOURCE_ID];
+  ResourceConfigure = SharedResourceP.ResourceConfigure[RESOURCE_ID];
+}
+
diff --git a/apps/tutorials/SharedResourceDemo/SharedResourceDemoAppC.nc b/apps/tutorials/SharedResourceDemo/SharedResourceDemoAppC.nc
new file mode 100644
index 00000000..50b1a906
--- /dev/null
+++ b/apps/tutorials/SharedResourceDemo/SharedResourceDemoAppC.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ *
+ * This application is used to test the use of Shared Resources.  
+ * Three Resource users are created and all three request
+ * control of the resource before any one of them is granted it.
+ * Once the first user is granted control of the resource, it performs
+ * some operation on it.  Once this operation has completed, a timer
+ * is set to allow this user to have control of it for a specific
+ * amount of time.  Once this timer expires, the resource is released
+ * and then immediately requested again.  Upon releasing the resource
+ * control will be granted to the next user that has requested it in 
+ * round robin order.  Initial requests are made by the three resource 
+ * users in the following order.<br>
+ * <li> Resource 0
+ * <li> Resource 2
+ * <li> Resource 1
+ * <br>
+ * It is expected then that using a round robin policy, control of the
+ * resource will be granted in the order of 0,1,2 and the Leds
+ * corresponding to each resource will flash whenever this occurs.<br>
+ * <li> Led 0 -> Resource 0
+ * <li> Led 1 -> Resource 1
+ * <li> Led 2 -> Resource 2
+ * <br>
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.2 $
+ * @date $Date: 2010-06-29 22:07:40 $
+ */
+ 
+configuration SharedResourceDemoAppC{
+}
+implementation {
+  components MainC,LedsC, SharedResourceDemoC as App,
+  new TimerMilliC() as Timer0,
+  new TimerMilliC() as Timer1,
+  new TimerMilliC() as Timer2;
+  App -> MainC.Boot;
+  App.Leds -> LedsC;
+  App.Timer0 -> Timer0;
+  App.Timer1 -> Timer1;
+  App.Timer2 -> Timer2;
+  
+  components
+  new SharedResourceC() as Resource0,
+  new SharedResourceC() as Resource1, 
+  new SharedResourceC() as Resource2;
+  App.Resource0 -> Resource0;
+  App.Resource1 -> Resource1;
+  App.Resource2 -> Resource2;
+  App.ResourceOperations0 -> Resource0;
+  App.ResourceOperations1 -> Resource1;
+  App.ResourceOperations2 -> Resource2;
+}
diff --git a/apps/tutorials/SharedResourceDemo/SharedResourceDemoC.nc b/apps/tutorials/SharedResourceDemo/SharedResourceDemoC.nc
new file mode 100644
index 00000000..3596e0f0
--- /dev/null
+++ b/apps/tutorials/SharedResourceDemo/SharedResourceDemoC.nc
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+#include "Timer.h"
+ 
+/**
+ *
+ * This application is used to test the use of Shared Resources.  
+ * Three Resource users are created and all three request
+ * control of the resource before any one of them is granted it.
+ * Once the first user is granted control of the resource, it performs
+ * some operation on it.  Once this operation has completed, a timer
+ * is set to allow this user to have control of it for a specific
+ * amount of time.  Once this timer expires, the resource is released
+ * and then immediately requested again.  Upon releasing the resource
+ * control will be granted to the next user that has requested it in 
+ * round robin order.  Initial requests are made by the three resource 
+ * users in the following order.<br>
+ * <li> Resource 0
+ * <li> Resource 2
+ * <li> Resource 1
+ * <br>
+ * It is expected then that using a round robin policy, control of the
+ * resource will be granted in the order of 0,1,2 and the Leds
+ * corresponding to each resource will flash whenever this occurs.<br>
+ * <li> Led 0 -> Resource 0
+ * <li> Led 1 -> Resource 1
+ * <li> Led 2 -> Resource 2
+ * <br>
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.2 $
+ * @date $Date: 2010-06-29 22:07:40 $
+ */
+
+module SharedResourceDemoC {
+  uses {
+    interface Boot;  
+    interface Leds;
+    interface Timer<TMilli> as Timer0;
+    interface Timer<TMilli> as Timer1;
+    interface Timer<TMilli> as Timer2;
+    
+    interface Resource as Resource0;
+    interface ResourceOperations as ResourceOperations0;
+    
+    interface Resource as Resource1;
+    interface ResourceOperations as ResourceOperations1;
+    
+    interface Resource as Resource2;
+    interface ResourceOperations as ResourceOperations2;
+  }
+}
+implementation {
+
+  #define HOLD_PERIOD 250
+  
+  //All resources try to gain access
+  event void Boot.booted() {
+    call Resource0.request();
+    call Resource2.request();
+    call Resource1.request();
+  }
+  
+  //If granted the resource, run some operation  
+  event void Resource0.granted() {
+  	call ResourceOperations0.operation();   
+  }  
+  event void Resource1.granted() {
+  	call ResourceOperations1.operation();
+  }  
+  event void Resource2.granted() {
+  	call ResourceOperations2.operation();
+  }  
+  
+  //When the operation completes, flash the LED and hold the resource for a while
+  event void ResourceOperations0.operationDone(error_t error) {
+  	call Timer0.startOneShot(HOLD_PERIOD);  
+    call Leds.led0Toggle();
+  }
+  event void ResourceOperations1.operationDone(error_t error) {
+    call Timer1.startOneShot(HOLD_PERIOD);  
+    call Leds.led1Toggle();
+  }
+  event void ResourceOperations2.operationDone(error_t error) {
+    call Timer2.startOneShot(HOLD_PERIOD);  
+    call Leds.led2Toggle();
+  }
+  
+  //After the hold period release the resource and request it again
+  event void Timer0.fired() {
+    call Resource0.release();
+    call Resource0.request();
+  }
+  event void Timer1.fired() {
+    call Resource1.release();
+    call Resource1.request();
+  }
+  event void Timer2.fired() {
+    call Resource2.release();
+    call Resource2.request();
+  }
+}
+
diff --git a/apps/tutorials/SharedResourceDemo/SharedResourceImplP.nc b/apps/tutorials/SharedResourceDemo/SharedResourceImplP.nc
new file mode 100644
index 00000000..d0ec539b
--- /dev/null
+++ b/apps/tutorials/SharedResourceDemo/SharedResourceImplP.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * The SharedResourceImplP component is used to wrap all of the operations
+ * from a dedicated resource so that access to them is protected when 
+ * it is used as a shared resource.  It uses the ArbiterInfo interface 
+ * provided by an Arbiter to accomplish this.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.2 $
+ * @date $Date: 2010-06-29 22:07:40 $
+ */
+
+module SharedResourceImplP {
+  provides {
+    interface ResourceOperations as SharedResourceOperations[uint8_t id];
+  }
+  uses {
+  	interface ArbiterInfo;
+  	interface ResourceOperations;
+  }
+}
+implementation {
+  uint8_t current_id = 0xFF;
+  
+  event void ResourceOperations.operationDone(error_t error) {
+  	signal SharedResourceOperations.operationDone[current_id](error);
+  }
+  
+  command error_t SharedResourceOperations.operation[uint8_t id]() {
+  	if(call ArbiterInfo.userId() == id && call ResourceOperations.operation() == SUCCESS) {
+      current_id = id;
+  	  return SUCCESS;
+  	}
+  	return FAIL;
+  }
+  
+  default event void SharedResourceOperations.operationDone[uint8_t id](error_t error) {}
+}
+
diff --git a/apps/tutorials/SharedResourceDemo/SharedResourceP.nc b/apps/tutorials/SharedResourceDemo/SharedResourceP.nc
new file mode 100644
index 00000000..ef730017
--- /dev/null
+++ b/apps/tutorials/SharedResourceDemo/SharedResourceP.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * The SharedResourceP component is used to create a shared resource
+ * out of a dedicated one.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.2 $
+ * @date $Date: 2010-06-29 22:07:40 $
+ */
+ 
+#define UQ_SHARED_RESOURCE   "Shared.Resource"
+configuration SharedResourceP {
+	provides interface Resource[uint8_t id];
+	provides interface ResourceRequested[uint8_t id];
+	provides interface ResourceOperations[uint8_t id];
+	uses interface ResourceConfigure[uint8_t id];
+}
+implementation {
+  components new RoundRobinArbiterC(UQ_SHARED_RESOURCE) as Arbiter;
+  components new SplitControlPowerManagerC() as PowerManager;
+  components ResourceP;
+  components SharedResourceImplP;
+
+  ResourceOperations = SharedResourceImplP;
+  Resource = Arbiter;
+  ResourceRequested = Arbiter;
+  ResourceConfigure = Arbiter;
+  SharedResourceImplP.ArbiterInfo -> Arbiter;
+  PowerManager.ResourceDefaultOwner -> Arbiter;
+  
+  PowerManager.SplitControl -> ResourceP;
+  SharedResourceImplP.ResourceOperations -> ResourceP;
+}
+
diff --git a/doc/Makefile b/doc/Makefile
new file mode 100644
index 00000000..70870dd6
--- /dev/null
+++ b/doc/Makefile
@@ -0,0 +1,44 @@
+OVERVIEW = txt/overview.txt
+OVERVIEW_HTML = $(subst txt/,,$(subst .txt,.html,$(OVERVIEW)))
+STYLESHEET = stylesheets/doc.css
+HTML = $(OVERVIEW_HTML)
+TEPS = $(wildcard txt/*.txt)
+TEPS_HTML = $(subst txt/,,$(subst .txt,.html,$(TEPS)))
+TEPS_TEX = $(subst txt/,,$(subst .txt,.tex,$(TEPS)))
+TEP_STYLESHEET = stylesheets/tep.css
+
+#override for different docutils installations
+ifndef RST2HTML
+RST2HTML= rst2html
+endif
+ifndef RST2LATEX
+RST2LATEX= rst2latex
+endif
+
+
+all: overview teps
+
+pdf: $(TEPS_TEX) 
+
+
+
+$(OVERVIEW_HTML): $(OVERVIEW) $(STYLESHEET)
+	$(RST2HTML) --stylesheet-path=$(STYLESHEET) --embed-stylesheet $< > html/$@
+
+%.html: txt/%.txt $(TEP_STYLESHEET)
+	$(RST2HTML) --stylesheet-path=$(TEP_STYLESHEET) --embed-stylesheet $< > html/$@
+
+%.tex: txt/%.txt 
+	$(RST2LATEX) $< > pdf/$@
+	pdflatex -interaction=batchmode -output-directory pdf $@
+
+overview: $(OVERVIEW_HTML)
+
+teps: $(TEPS_HTML)
+
+clean:
+	rm -f html/*.html txt/*~ pdf/*.log pdf/*.out pdf/*.tex pdf/*.aux
+
+cleanpdf:
+	rm -f pdf/*.log pdf/*.out pdf/*.tex pdf/*.aux
+
diff --git a/doc/README b/doc/README
new file mode 100644
index 00000000..a580da3c
--- /dev/null
+++ b/doc/README
@@ -0,0 +1,92 @@
+Introduction
+============
+
+The TinyOS Extension Proposals (TEPs) are written using the
+reStructuredText. Converting them into HTML documents can be performed
+using the "rst2html" tool from the python Docutils package::
+
+    http://docutils.sourceforge.net
+
+Installing Docutils using a native package
+==========================================
+
+Many Linux distributions provide a native Docutils package. We provide
+short instructions for installing the package on Fedora Core 3, Fedora
+Core 4 and Debian.
+
+Fedora Core 3
+-------------
+
+The Docutils package is part of the "extras" distribution channel. 
+
+When using the "yum" package manager, the "extras" repository can be
+added by creating a new extras.repo file in the /etc/yum/yum.repos.d
+directory with the content::
+
+    [extras]
+    name=Fedora Extras - $releasever - $basearch
+    baseurl=http://download.fedora.redhat.com/pub/fedora/linux/extras/$releasever/$basearch/
+    gpgcheck=1
+    enabled=1
+
+After that, Docutils can be installed by issuing::
+
+   sudo yum install python-docutils
+
+Alternatively, the Docutils RPM package can be downloaded manually
+from::
+
+    http://download.fedora.redhat.com/pub/fedora/linux/extras/3/i386/python-docutils-0.3.9-1.fc3.noarch.rpm 
+
+and installed using:
+
+    sudo rpm -ivh python-docutils-0.3.9-1.fc3.noarch.rpm 
+
+
+Fedora Core 4
+-------------
+
+In Fedora Core 4, the "extras" repository is already configured, but
+disabled by default. The docutils package can be installed using::
+
+    sudo yum --enablerepo=extras install python-docutils
+
+Alternatively, the Docutils RPM package can be downloaded manually
+from::
+
+    http://download.fedora.redhat.com/pub/fedora/linux/extras/4/i386/python-docutils-0.3.9-1.fc4.noarch.rpm
+
+and installed using:
+
+    sudo rpm -ivh python-docutils-0.3.9-1.fc4.noarch.rpm 
+
+
+Debian
+------
+
+The Docutils are packaged in the python-docutils DEB package and can
+be installed using:
+
+    sudo apt-get install python-docutils
+
+Alternatively, the Docutils DEB package can be download (for Debian
+stable) from::
+
+    http://packages.debian.org/cgi-bin/download.pl?arch=all&file=pool%2Fmain%2Fp%2Fpython-docutils%2Fpython-docutils_0.3.7-2_all.deb&md5sum=4f21cac36c65f9edc080bc5b77169c51&arch=all&type=main
+
+and installed using::
+
+    sudo dpkg -i  python-docutils_0.3.7-2_all.deb
+
+
+Installing Docutils from sources
+================================
+
+The latest Docutils source release (0.3.9) can be downloaded from::
+
+http://prdownloads.sourceforge.net/docutils/docutils-0.3.9.tar.gz?download
+
+The source is packaged using python Distutils and can be installed using:: 
+
+    sudo python setup.py install
+
diff --git a/doc/build.xml b/doc/build.xml
new file mode 100644
index 00000000..d9da73c3
--- /dev/null
+++ b/doc/build.xml
@@ -0,0 +1,19 @@
+<project name="tinyos-2.x docs" default="all">
+
+	<target name="all" >
+		<echo message = "Building tinyos-2.x docs as html" />
+		<exec executable="make" failonerror="true">
+			<arg  line="all" />
+		</exec>
+	</target>
+
+	<target name="pdf" >
+		<echo message = "Building tinyos-2.x docs as pdf" />
+		<exec executable="make" failonerror="true">
+			<arg  line="pdf" />
+		</exec>
+		<exec executable="make" failonerror="true">
+			<arg  line="cleanpdf" />
+		</exec>
+	</target>
+</project>
diff --git a/doc/html/install-tinyos.html b/doc/html/install-tinyos.html
new file mode 100644
index 00000000..b02e4bc5
--- /dev/null
+++ b/doc/html/install-tinyos.html
@@ -0,0 +1,485 @@
+<?xml version="1.0" encoding="utf-8" ?>
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml" xml:lang="en" lang="en">
+<head>
+  <title>Installing TinyOS 2.0.2</title>
+  <link href="../stylesheets/tutorial.css" rel="stylesheet" type="text/css"/>
+</head>
+<body>
+
+<div class="title">Installing TinyOS 2.0.2</div>
+<div class="subtitle">Last updated 14 Feb 2008</div>
+
+<p>If you already have a 1.x tree or an existing 2.x tree, you are better off 
+following the <i>upgrade</i> instructions at 
+<a href="upgrade-tinyos.html">upgrade-tinyos.html</a>. There are several ways to install
+      TinyOS. The first way is to install a live CD that gives
+      you a virtualized Linux with a complete TinyOS install. Note that since
+      this is on a CD, you can't modify anything; you can, however, make
+      a LiveUSB device to use as your TinyOS install. The second way is 
+      to a Ubuntu-based virtual machine directly on your hard drive.  The final way is to
+      install TinyOS on your host operating system. When installing
+      on a host operating system, you can either use a debian package
+      repository or manually instally with RPMs.</p> 
+
+      <p>Of the four options, installing a VM image is simplest. 
+         Using a Live CD lets you try out TinyOS without installing it on your
+	 drive. Debian packages are the simplest and best way to install TinyOS
+	 on your host operating system. RPMs are mostly a stand-by for RedHat
+	 or other Linux distributions, as well as Windows/Cygwin users. If you
+	 are using Cygwin, we strongly recommend using a VM image, unless you
+	 are completely unfamiliar with UNIX tools such as editors (xemacs, vi)
+	 and the shell,
+	 
+	 <h1>One-step install with a VM Image</h1>
+     
+      The most <A HREF="http://www.tinyos.net/scoop/section/Releases">current instructions</A> on 
+      how to install the VM image are on <A HREF="http://www.tinyos.net">www.tinyos.net</A>.
+
+      <h1>One-step Install with a Live CD</h1>
+
+      <p><a href="http://toilers.mines.edu/Public/XubunTOS">Download a
+      Linux live CD that has a TinyOS installation on it</a>. 
+      All you
+      need to do is download the CD image, burn it onto a CD, and
+      install from there. This saves you all of the complexities of
+      installation, and it's the recommended way to install
+      TinyOS. The link above has complete instructions. The live CD is
+      provided by the Toilers group at the Colorado School of
+      Mines.</p>
+
+
+      
+      <h1>Two-step install on your host OS with Debian packages</h1>
+
+   <p>If you are running a version of Linux that supports Debian packages, then
+   you may want to use the TinyOS package repository. There is a <A HREF="http://www.tinyos.net/scoop/story/2007/8/15/234856/990">story on www.tinyos.net</A> 
+   that describes how to use it. If you do this, then you do not have to
+   install the instructions here, except that you will need to check
+   that your environment is set up correctly (the end of step 5 in
+    the manual installation.</p>
+
+      <h1>Manual installation on your host OS with RPMs</h1>
+<p>Currently, the TinyOS Core Working Group supports TinyOS on two platforms: Cygwin (Windows)
+and Linux. There have been some <a href="">successful efforts</a> to getting TinyOS environments working
+on Mac OSX, but OSX is not supported by the Core WG.</p>
+
+
+<p>Installing a TinyOS enviromnent has five basic steps; Windows requires an extra step,
+installing Cygwin, which is a UNIX-like environment. The steps are:</p>
+
+<ol>
+  <li><b>Installing a Java 1.5 (Java 5) JDK.</b> Java is the most common way of interacting
+  with mote base stations or gateways that are plugged into a PC or laptop.</li>
+  <li><b><font color="red">Windows only.</font> Install Cygwin.</b> This gives you a shell
+  and many UNIX tools which the TinyOS environment uses, such as perl and shell
+  scripts.</li>
+  <li><b>Installing native compilers.</b> As you're compiling code for low-power
+  microcontrollers, you need compilers that can generate the proper assembly code.
+  If you using mica-family motes, you need the AVR toolchain; if you're using
+  telos-family motes, you need the MSP430 toolchain.</li>
+  <li><b>Installing the nesC compiler.</b> TinyOS is written in nesC, a dialect
+  of C with support for the TinyOS concurrency model and component-based
+  programming. The nesC compiler is platform-independent: it passes its output
+  to the native compilers, so that it can take advantage of all of the effort
+  put into their optimizations.</li>
+  <li><b>Installing the TinyOS source tree.</b> If you want to compile and
+  install TinyOS programs, you need the code.</li>
+  <li><b>Installing the Graphviz visualization tool.</b> The TinyOS
+  environment includes <tt>nesdoc</tt>, a tool that automatically
+  generates HTML documentation from source code. Part of this process
+  involves drawing diagrams that show the relationships between
+  different TinyOS components. <a href="http://www.graphviz.org">Graphviz</a>
+  is an open source tool
+  that nesdoc uses to draw the diagrams.</li>
+</ol>
+
+<h2>Step 1: Install Java 1.5 JDK</h2>
+
+<b>Windows</b>
+Download and install Sun's 1.5 JDK from <a href="http://java.sun.com">http://java.sun.com</a>.
+
+<p>
+<b>Linux</b>
+Download and install IBM's 1.5 JDK from <a href="http://www-128.ibm.com/developerworks/java/jdk/">http://www-128.ibm.com/developerworks/java/jdk/</a>.
+</p>
+
+<h2>Step 2: Install Cygwin</h2>
+
+<font color="red"> This step is required for Windows installations only. If you are installing
+on Linux, skip to step 3.</font>
+
+<p>We have put online the cygwin packages that we've confirmed to be
+compatible with TinyOS. The instructions below use those packages. You
+can also upgrade your cygwin environment according to the instructions
+at www.cygwin.com and your environment will most likely work. A large
+number of TinyOS users, upgrade their cygwin packages at least monthly
+from cygnus. However, since we can't test what packages are compatible
+as they become available daily, we can't confirm that today's set will
+work.
+</p>
+
+<ol>
+<li> Download and install Cygwin from <a href="http://www.cygwin.com">www.cygwin.com</a>.<p></p></li>
+
+<li> Download the confirmed-compatible cygwin packages from the tinyos web site 
+     <a href="http://www.tinyos.net/dist-1.2.0/tools/windows/cygwin-1.2a.tgz">here
+     </a>.<p></p></li>
+
+<li> In a cygwin shell, unzip the above package into some directory. In these 
+     instructions the directory is /cygdrive/c/newcygpkgs.
+<pre>
+     $ cd /cygdrive/c/newcygpkgs
+     $ tar zxvf cygwin-1.2a.tgz 
+</pre>
+This unzips the packages.<p></p></li>
+
+<li> In Windows Explorer, navigate to /cygdrive/c/newcygpkgs and click on the 
+     file setup.exe. Setup.exe is the setup program distributed by Cygnus Solutions.<p></p></li>
+
+<li> Follow these steps when the Cygwin Setup windows appears:<p></p></li>
+
+<li> Opt to disable the virus scanner (it will be enabled when you're finished).<p></p></li>
+
+<li> Opt to Install from Local Directory.<p></p></li>
+
+<li> Specify the Root directory to be where your <i>current</i> cygwin installation 
+     is. This would be the directory that directories like 'opt' and 'usr' are in. 
+     For example, mine is rooted at c:\tinyos\cygwin, so I enter that.<p></p></li>
+
+<li> Select to Install for All Users<p></p></li>
+
+<li> Select the Unix file type (very important!)<p></p></li>
+
+<li> For the Local Packages Directory, specify where you unzipped the cygwin 
+     packages tarfile. For example, I would specify c:\newcygpkgs. (The setup.exe 
+     program will probably select the right default directory.)<p></p></li>
+
+<li> The next window will allow you to select packages to install. You should 
+     see that most of the packages have an X-ed box next to them; these are the 
+     packages that are to be installed. <p></p></li>
+
+<li> Click install.  <p></p></li>
+</ol>
+
+Some notes:
+<ul>
+<li> You might see a message explaining that you need to reboot because some 
+     files are in use. This most likely means that your cygwin DLL is loaded 
+     and in-use and, therefore, cannot be replaced. When you reboot, the new DLL 
+     will be loaded. <p></p></li>
+
+<li> Related to the above warnings, if you see warnings about the cygwin1.dll not 
+     being found, don't worry. All will be well once you reboot and the right DLL is loaded. <p></p></li>
+</ul>
+
+<h2>Step 3: Install native compilers </h2>
+
+<p>Install the appropriate version of the following (Windows or Linux,
+avr or msp430 or both) with the rpm command 'rpm -ivh <i>rpm></i>'. 
+On
+windows, if you get an error claiming that the rpm was build for an NT
+computer and you're on a windows NT computer, bypass the erroneous
+error by using 'rpm -ivh --ignoreos <i>rpmname</i>'.
+(We have xscale
+compiler tools online at 
+<a href="http://www.tinyos.net/dist-1.2.0/tools/">http://www.tinyos.net/dist-1.2.0/tools/</a>
+but they have not yet been extensively tested by a large community.)</p>
+
+<b><em>Atmel AVR Tools</em></b>
+<table border="0">
+<tbody><tr>
+  <td bgcolor="#dddddd"><b>Tool</b></td>
+  <td bgcolor="#dddddd"><b>Windows/Cygwin</b></td>
+  <td bgcolor="#dddddd"><b>Linux</b></td>
+</tr>
+
+<tr>
+  <td>avr-binutils<font color="red">&#8224;</font></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/avr-binutils-2.15tinyos-3.cygwin.i386.rpm">avr-binutils-2.15tinyos-3.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/avr-binutils-2.15tinyos-3.i386.rpm">avr-binutils-2.15tinyos-3.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd">avr-gcc</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/avr-gcc-3.4.3-1.cygwin.i386.rpm">avr-gcc-3.4.3-1.cygwin.i386.rpm </a></td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/avr-gcc-3.4.3-1.i386.rpm">avr-gcc-3.4.3-1.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td>avr-libc</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/avr-libc-1.2.3-1.cygwin.i386.rpm">avr-libc-1.2.3-1.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/avr-libc-1.2.3-1.i386.rpm">avr-libc-1.2.3-1.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd">avarice</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/avarice-2.4-1.cygwin.i386.rpm">avarice-2.4-1.cygwin.i386.rpm</a></td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/avarice-2.4-1.i386.rpm">avarice-2.4-1.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td>insight (avr-gdb)</td>
+  <td><a href="http://www.tinyos.net/dist-1.2.0/tools/windows/avr-insight-6.3-1.cygwin.i386.rpm">avr-insight-6.3-1.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/avr-insight-6.3-1.i386.rpm">avr-insight-6.3-1.i386.rpm</a></td>
+</tr>
+
+</tbody></table>
+<i><font color="red">&#8224;</font>If you receive an rpm error that indicates that you have a newer version already installed, try <code>rpm -Uvh --force</code></i>
+
+<p></p><b><em>TI MSP430 Tools</em></b>
+<table border="0">
+<tbody><tr>
+  <td bgcolor="#dddddd"><b>Tool</b></td>
+  <td bgcolor="#dddddd"><b>Windows/Cygwin</b></td>
+  <td bgcolor="#dddddd"><b>Linux</b></td>
+</tr>
+
+<tr>
+  <td>base</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/msp430tools-base-0.1-20050607.cygwin.i386.rpm">msp430tools-base-0.1-20050607.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-base-0.1-20050607.i386.rpm">msp430tools-base-0.1-20050607.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd">python tools</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/msp430tools-python-tools-1.0-1.cygwin.noarch.rpm">msp430tools-python-tools-1.0-1.cygwin.noarch.rpm</a></td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-python-tools-1.0-1.noarch.rpm">msp430tools-python-tools-1.0-1.noarch.rpm</a></td>
+</tr>
+
+
+<tr>
+  <td>binutils</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/msp430tools-binutils-2.16-20050607.cygwin.i386.rpm"> msp430tools-binutils-2.16-20050607.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-binutils-2.16-20050607.i386.rpm">msp430tools-binutils-2.16-20050607.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd">gcc</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/msp430tools-gcc-3.2.3-20050607.cygwin.i386.rpm">msp430tools-gcc-3.2.3-20050607.cygwin.i386.rpm</a></td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-gcc-3.2.3-20050607.i386.rpm">msp430tools-gcc-3.2.3-20050607.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td>libc</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/msp430tools-libc-20050308cvs-20050608.cygwin.i386.rpm">msp430tools-libc-20050308cvs-20050608.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-libc-20050308cvs-20050608.i386.rpm">msp430tools-libc-20050308cvs-20050608.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd">jtag</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/"></a>Not yet available</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-jtag-lib-20031101cvs-20050610.i386.rpm">msp430tools-jtag-lib-20031101cvs-20050610.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td>gdb</td>
+<!--  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/msp430tools-gdb-6.0-20050609.cygwin.i386.rpm">msp430tools-gdb-6.0-20050609.cygwin.i386.rpm</a></td> -->
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/"></a>Not yet available</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-gdb-6.0-20050609.i386.rpm">msp430tools-gdb-6.0-20050609.i386.rpm</a></td>
+</tr>
+
+</tbody></table>
+
+<h2>Step 4: Install TinyOS toolchain</h2>
+
+The TinyOS-specific tools are the NesC compiler and a set of tools
+developed in the tinyos-2.x/tools source code repository. They are
+also installed using rpms. If you using the Cygwin version recommended
+in these install
+instructions, you should install the "Recommended" Windows/Cygwin
+nesC RPM. 
+If you
+get strange errors when you try to compile TinyOS programs,
+such as the error message "the procedure entry point basename could not be located
+in the dynamic link library cygwin1.dll", this is likely due
+to a Cygwin version incompatibility: try the "Other" Windows/Cygwin 
+RPM (1.2.7a).
+If you are using Cygwin and installing the nesC RPM
+causes an error that the RPM was built for Cygwin,
+add the <code>--ignoreos</code> option.
+
+Finally, there are two Linux versions of tinyos-tools, depending
+on whether you have a 32-bit or 64-bit machine. The first is the
+i386 RPM and the second is the i686 RPM. If you have a 64-bit
+Java VM, it is important that you install the i686 RPM or otherwise
+the Java support may not work properly.
+
+<p></p>
+<b><em>TinyOS-specific Tools</em></b>
+<table border="0">
+<tbody><tr>
+  <td bgcolor="#dddddd"><b>Tool</b></td>
+  <td bgcolor="#dddddd"><b>Recommended Windows/Cygwin</b></td>
+  <td bgcolor="#dddddd"><b>Other Windows/Cygwin</b></td>
+  <td bgcolor="#dddddd"><b>Linux</b></td>
+  <td bgcolor="#dddddd"><b>Command</b></td>
+</tr>
+
+<tr>
+  <td>NesC</td>
+  <td><a href="http://www.tinyos.net/dist-1.2.0/tinyos/windows/nesc-1.2.8a-1.cygwin.i386.rpm">nesc-1.2.8a-1.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-1.2.0/tinyos/windows/nesc-1.2.8b-1.cygwin.i386.rpm">nesc-1.2.8b-1.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-1.2.0/tinyos/linux/nesc-1.2.8a-1.i386.rpm">nesc-1.2.8a-1.i386.rpm </a></td>
+  <td><a href=""></a><code>rpm -Uvh</code><br/>
+                     <code>rpm -Uvh --ignoreos</code> (if Cygwin complains)</td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd"><b>Tool</b></td>
+  <td bgcolor="#dddddd"><b>Windows/Cygwin</b></td>
+  <td bgcolor="#dddddd"><b>32-bit Linux</b></td>
+  <td bgcolor="#dddddd"><b>64-bit Linux</b></td>
+  <td bgcolor="#dddddd"><b>Command</b></td>
+</tr>
+
+<tr>
+  <td>tinyos-tools</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tinyos/windows/tinyos-tools-1.2.4-2.cygwin.i386.rpm">tinyos-tools-1.2.4-2.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tinyos/linux/tinyos-tools-1.2.4-3.i386.rpm">tinyos-tools-1.2.4-3.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tinyos/linux/tinyos-tools-1.2.4-3.i686.rpm">tinyos-tools-1.2.4-3.i686.rpm</a></td>
+  <td><a href=""></a><code>rpm -ivh --force</code>&nbsp;(1.x tree)<br><code>rpm -Uvh</code>&nbsp;(no 1.x tree)<br></td>
+</tr>
+
+</tbody></table>
+
+<h2>Step 5: Install the TinyOS 2.x source tree </h2>
+
+<p>Now that the tools are installed, you need only install the tinyos 2.x 
+source tree and then set your environment variables.
+Install the appropriate version of the following (Window or Linux)
+with the rpm command 'rpm -ivh <i>rpm</i>'. 
+As with the previous rpms, if you get an error claiming that the rpm
+was build for an NT computer and you're on a windows NT computer,
+bypass the erroneous error by using 'rpm -ivh --ignoreos
+<i>rpmname</i>'.
+</p>
+
+<ul>
+<li> Install tinyos-2.x
+
+<p></p>
+<b><em>TinyOS 2.x</em></b>
+<table border="0">
+<tbody><tr>
+  <td bgcolor="#dddddd"><b></b></td>
+  <td bgcolor="#dddddd"><b>Windows/Cygwin</b></td>
+  <td bgcolor="#dddddd"><b>Linux</b></td>
+</tr>
+
+<tr>
+  <td>TinyOS</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tinyos/windows/tinyos-2.0.2-2.cygwin.noarch.rpm">tinyos-2.0.2-2.cygwin.noarch.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tinyos/linux/tinyos-2.0.2-2.noarch.rpm">tinyos-2.0.2-2.noarch.rpm</a></td>
+</tr>
+
+</tbody></table></li>
+
+<li> Configure your environment
+
+<p>
+Ideally, you'll put these environment variables in a shell script that will run when your shell starts, but you needn't 
+put such a script under /etc/profile.d. 
+</p>
+<p>
+The example
+settings below assume that the tinyos-2.x installation is in /opt/tinyos-2.x.
+Change the settings to be correct for where you've put your tinyos-2.x tree. Note
+that the windows CLASSPATH must be a windows-style path, not a cygwin path. You can 
+generate a windows style path from a cygwin-style path using 'cygpath -w'. For example:
+</p>
+
+<pre>export CLASSPATH=`cygpath -w $TOSROOT/support/sdk/java/tinyos.jar`
+export CLASSPATH="$CLASSPATH;."
+</pre>
+
+<b><em>TinyOS 2.x</em></b>
+<table border="0">
+<tbody><tr>
+  <td bgcolor="#dddddd"><b>Environment Variable</b></td>
+  <td bgcolor="#dddddd"><b>Windows</b></td>
+  <td bgcolor="#dddddd"><b>Linux</b></td>
+</tr>
+
+<tr>
+  <td>TOSROOT</td>
+  <td>/opt/tinyos-2.x</td>
+  <td>same as in Cygwin</td>
+<td>
+
+</td></tr><tr>
+  <td bgcolor="#dddddd">TOSDIR</td>
+  <td bgcolor="#dddddd">$TOSROOT/tos</td>
+  <td bgcolor="#dddddd">same as in Cygwin</td>
+<td>
+
+</td></tr><tr>
+  <td>CLASSPATH</td>
+  <td>C:\tinyos\cygwin\opt\tinyos-2.x\support\sdk\java\tinyos.jar;.</td>
+  <td>$TOSROOT/support/sdk/java/tinyos.jar:.</td>
+<td>
+
+</td></tr><tr>
+  <td bgcolor="#dddddd">MAKERULES</td>
+  <td bgcolor="#dddddd">$TOSROOT/support/make/Makerules</td>
+  <td bgcolor="#dddddd">same as in Cygwin</td>
+<td>
+
+</td></tr><tr>
+  <td>PATH<font color="red">&#8224;</font></td>
+  <td>/opt/msp430/bin:$PATH</td>
+  <td>same as in Cygwin</td>
+<td>
+
+</td></tr></tbody></table>
+
+<i><font color="red">&#8224;</font>Only necessary if you're using the MSP430 platform/tools.</i>
+
+<p>
+In addition to the above environment variables, do the following on Linux machines:
+</p>
+
+<ol>
+<li> Change the ownership on your /opt/tinyos-2.x files: <code>chown -R&nbsp;&lt;your uid&gt;&nbsp;/opt/tinyos-2.x
+</code></li>
+<li> Change the permissions on any serial (/dev/ttyS&lt;N&gt;), usb
+(/dev/tts/usb&lt;N&gt;, /dev/ttyUSB&lt;N&gt;), or parallel (/dev/parport) devices you
+are going to use: <code>chmod 666 /dev/&lt;devicename&gt;</code></li>
+</ol>
+</li>
+
+
+
+<li><p>Finally, if you have installed TinyOS 2.0.1, there is a bug in TOSSIM (which will be fixed in 2.0.2).
+The bug is in file <tt>tos/chips/atm128/sim/atm128_sim.h</tt>. Change these lines 22 and 23 from:</p>
+
+<pre>
+#define _SFR_IO8(io_addr) _MMIO_BYTE((io_addr) + 0x20)
+#define _SFR_IO16(io_addr) _MMIO_WORD((io_addr) + 0x20)
+</pre>
+
+<p>to</p>
+
+<pre>
+#define _SFR_IO8(io_addr) _MMIO_BYTE((io_addr))
+#define _SFR_IO16(io_addr) _MMIO_WORD((io_addr))
+</pre>
+
+<p>If you do not do this, then timers will not work correctly.</p>
+
+</li></ul>
+
+<h2>Step 6: Installing Graphviz</h2>
+
+<p>Go to <a href="http://www.graphviz.org/Download..php">download page</a> of the Graphviz project
+and download the appropriate RPM. You only need the basic graphviz RPM (<tt>graphviz-</tt>);
+you don't need all of the add-ons, such as -devel, -doc, -perl, etc.
+If you're not sure what version of Linux you're running,</p>
+
+<pre>uname -a</pre>
+
+<p>might give you some useful information. Install the rpm with <tt>rpm -i </tt> <i>rpm-name</i>.
+In the case of Windows, there is a simple install program, so you don't need to deal with RPMs.</p>
+
+</body>
+</html>
diff --git a/doc/html/overview.html b/doc/html/overview.html
new file mode 100644
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+<head>
+<meta http-equiv="Content-Type" content="text/html; charset=utf-8" />
+<meta name="generator" content="Docutils 0.4: http://docutils.sourceforge.net/" />
+<title>TinyOS 2.0 Overview</title>
+<meta name="author" content="Philip Levis" />
+<meta name="date" content="Oct 30 2006" />
+<style type="text/css">
+
+/*
+:Author: David Goodger
+:Contact: goodger@users.sourceforge.net
+:date: $Date: 2009-02-03 23:07:32 $
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+  margin: 2em 4em;
+}
+
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+
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+  padding-left: 0.5em ;
+  padding-right: 0.5em ;
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+
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+  font-weight: bold ;
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+  font-size: 100% }
+
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+  font: Courier,monospaced;
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+  list-style-type: none }
+
+</style>
+</head>
+<body>
+<div class="document" id="tinyos-2-0-overview">
+<h1 class="title">TinyOS 2.0 Overview</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr><th class="docinfo-name">Author:</th>
+<td>Philip Levis</td></tr>
+<tr><th class="docinfo-name">Date:</th>
+<td>Oct 30 2006</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This document gives a brief overview of TinyOS 2.0, highlighting how
+and where it departs from 1.1 and 1.0. Further detail on these changes
+is detailed in TEP (TinyOS Enhancement Proposal) documents.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>TinyOS 2.0 is a clean slate redesign and re-implementation of TinyOS.
+Its development was motivated by our belief that many aspects of 1.x
+strain to meet requirements and uses that were not foreseen
+when it was designed and implemented. The structure and interfaces 1.x
+defines have several fundamental limitations. While these limitations
+can be worked around, this practice has led to tightly coupled
+components, hard to find interactions, and a very steep learning curve
+for a newcomer to sensor network programming.</p>
+<p>TinyOS 2.0 is not backwards compatible with 1.x: code written for the
+latter will not compile for the former. However, one important aspect
+of 2.0's design is to minimize the difficulty of upgrading
+code. Therefore, while porting a 1.x application to 2.0 will require
+some work, it should not be very much.</p>
+<p>This document provides a high-level overview of 2.0 and describes some
+of the ways in which it departs from 1.x. It covers the basic TinyOS
+abstractions, such as hardware abstractions, communication, timers,
+the scheduler, booting and initialization. Further detail on each of
+these can be found in TEPs (TinyOS Enhancement Proposals), which
+document and describe these abstractions.</p>
+</div>
+<div class="section">
+<h1><a id="platforms-hardware-abstraction" name="platforms-hardware-abstraction">2. Platforms/Hardware Abstraction</a></h1>
+<p>Platforms exist in the <tt class="docutils literal"><span class="pre">tos/platforms</span></tt> subdirectory. In TinyOS 2.0, a
+<em>platform</em> is a collection of <em>chips</em> and some glue code that connects
+them together. For example, the mica2 platform is the CC1000 radio
+chip and the ATmega128 microcontroller, while the micaZ platform is
+the CC2420 radio and the ATmega128 microcontroller, and the Teloi
+platforms are the CC2420 radio and the MSP430 microcontroller. Chip
+code exists in <tt class="docutils literal"><span class="pre">tos/chips</span></tt>. A platform directory generally has a
+<tt class="docutils literal"><span class="pre">.platform</span></tt> file, which has options to pass to the nesC compiler. For
+example, the mica2 .platform file tells ncc to look in <tt class="docutils literal"><span class="pre">chips/cc1000</span></tt>
+and <tt class="docutils literal"><span class="pre">chips/atm128</span></tt> directories, as well as to use avr-gcc to compile a
+mote binary (Teloi platforms tell it to use msp430-gcc).</p>
+<p>Hardware abstractions in TinyOS 2.0 generally follow a three-level
+abstaction heirarchy, called the HAA (Hardware Abstraction
+Architecture).</p>
+<p>At the bottom of the HAA is the HPL (Hardware Presentation Layer). The
+HPL is a thin software layer on top of the raw hardware, presenting
+hardare such as IO pins or registers as nesC interfaces. The HPL
+generally has no state besides the hardware itself (it has no
+variables). HPL components usually have the prefix <tt class="docutils literal"><span class="pre">Hpl</span></tt>, followed by
+the name of the chip. For example, the HPL components of the CC1000
+begin with <tt class="docutils literal"><span class="pre">HplCC1000</span></tt>.</p>
+<p>The middle of the HAA is the HAL (Hardware Abstraction Layer). The HAL
+builds on top of the HPL and provides higher-level abstractions that
+are easier to use than the HPL but still provide the full
+functionality of the underlying hardware. The HAL components usually have
+a prefix of the chip name. For example, the HAL components of the CC1000
+begin with <tt class="docutils literal"><span class="pre">CC1000</span></tt>.</p>
+<p>The top of the HAA is the HIL (Hardware Independent Layer). The HIL
+builds on top of the HAL and provides abstractions that are hardware
+independent. This generalization means that the HIL usually does not
+provide all of the functionality that the HAL can. HIL components have
+no naming prefix, as they represent abstractions that applications can
+use and safely compile on multiple platforms. For example, the HIL
+component of the CC1000 on the mica2 is <tt class="docutils literal"><span class="pre">ActiveMessageC</span></tt>, representing
+a full active message communication layer.</p>
+<p>The HAA is described in TEP 2: Hardware Abstraction Architecture[<a class="reference" href="#tep2">TEP2</a>].</p>
+<p>Currently (as of the 2.0 release in November 2006), TinyOS 2.0 supports
+the following platforms:</p>
+<blockquote>
+<ul class="simple">
+<li>eyesIFXv2</li>
+<li>intelmote2</li>
+<li>mica2</li>
+<li>mica2dot</li>
+<li>micaZ</li>
+<li>telosb</li>
+<li>tinynode</li>
+<li>btnode3</li>
+</ul>
+</blockquote>
+<p>The btnode3 platform is not included in the RPM.</p>
+</div>
+<div class="section">
+<h1><a id="scheduler" name="scheduler">3. Scheduler</a></h1>
+<p>As with TinyOS 1.x, TinyOS 2.0 scheduler has a non-preemptive FIFO
+policy. However, tasks in 2.0 operate slightly differently than in
+1.x.</p>
+<p>In TinyOS 1.x, there is a shared task queue for all tasks, and a
+component can post a task multiple times. If the task queue is full,
+the post operation fails. Experience with networking stacks showed
+this to be problematic, as the task might signal completion of a
+split-phase operation: if the post fails, the component above might
+block forever, waiting for the completion event.</p>
+<p>In TinyOS 2.x, every task has its own reserved slot in the task queue,
+and a task can only be posted once. A post fails if and only if the
+task has already been posted. If a component needs to post a task
+multiple times, it can set an internal state variable so that when
+the task executes, it reposts itself.</p>
+<p>This slight change in semantics greatly simplifies a lot of component
+code. Rather than test to see if a task is posted already before
+posting it, a component can just post the task. Components do not have
+to try to recover from failed posts and retry. The cost is one byte of
+state per task. Even in large systems such as TinyDB, this cost is
+under one hundred bytes (in TinyDB is is approximately 50).</p>
+<p>Applications can also replace the scheduler, if they wish. This allows
+programmers to try new scheduling policies, such as priority- or
+deadline-based. It is important to maintain non-preemptiveness,
+however, or the scheduler will break all nesC's static concurrency
+analysis. Details on the new scheduler and how to extend it can be found
+in TEP 106: Schedulers and Tasks[<a class="reference" href="#tep106">TEP106</a>].</p>
+</div>
+<div class="section">
+<h1><a id="booting-initialization" name="booting-initialization">4. Booting/Initialization</a></h1>
+<p>TinyOS 2.0 has a different boot sequence than 1.x. The 1.x interface
+<tt class="docutils literal"><span class="pre">StdControl</span></tt> has been split into two interfaces: <tt class="docutils literal"><span class="pre">Init</span></tt> and
+<tt class="docutils literal"><span class="pre">StdControl</span></tt>. The latter only has two commands: <tt class="docutils literal"><span class="pre">start</span></tt> and <tt class="docutils literal"><span class="pre">stop</span></tt>.
+In TinyOS 1.x, wiring components to the boot sequence would cause them
+to be powered up and started at boot. That is no longer the case: the
+boot sequence only initializes components. When it has completed
+initializing the scheduler, hardware, and software, the boot sequence
+signals the <tt class="docutils literal"><span class="pre">Boot.booted</span></tt> event. The top-level application component
+handles this event and start services accordingly. Details on
+the new boot sequence can be found in TEP 107: TinyOS 2.x Boot
+Sequence[<a class="reference" href="#tep107">TEP107</a>].</p>
+</div>
+<div class="section">
+<h1><a id="virtualization" name="virtualization">5. Virtualization</a></h1>
+<p>TinyOS 2.0 is written with nesC 1.2, which introduces the concept
+of a 'generic' or instantiable component. Generic modules allow
+TinyOS to have reusable data structures, such as bit vectors and
+queues, which simplify development. More importantly, generic
+configurations allow services to encapsulate complex wiring
+relationships for clients that need them.</p>
+<p>In practice, this means that many basic TinyOS services are now
+<em>virtualized.</em> Rather than wire to a component with a parameterized
+interface (e.g., GenericComm or TimerC in 1.x), a program instantiates
+a service component that provides the needed interface. This
+service component does all of the wiring underneath (e.g., in the
+case of timers, to a unique) automatically, reducing wiring
+mistakes and simplifying use of the abstraction.</p>
+</div>
+<div class="section">
+<h1><a id="timers" name="timers">6. Timers</a></h1>
+<p>TinyOS 2.0 provides a much richer set of timer interfaces than
+1.x. Experience has shown that timers are one of the most critical
+abstractions a mote OS can provide, and so 2.0 expands the fidelity
+and form that timers take. Depending on the hardware resources of a
+platform, a component can use 32KHz as well as millisecond granularity
+timers, and the timer system may provide one or two high-precision
+timers that fire asynchronously (they have the async
+keyword). Components can query their timers for how much time
+remainins before they fire, and can start timers in the future (e.g.,
+'start firing a timer at 1Hz starting 31ms from now'). TEP 102:
+Timers[<a class="reference" href="#tep102">TEP102</a>] defines what HIL components a platform must provide
+in order to support standard TinyOS timers. Platforms are
+required to provide millisecond granularity timers, and can provide
+finer granularity timers (e.g., 32kHz) if needed.</p>
+<p>Timers present a good example of virtualization in 2.0. In 1.x,
+a program instantiates a timer by wiring to TimerC:</p>
+<pre class="literal-block">
+components App, TimerC;
+App.Timer -&gt; TimerC.Timer[unique(&quot;Timer&quot;)];
+</pre>
+<p>In 2.0, a program instantiates a timer:</p>
+<pre class="literal-block">
+components App, new TimerMilliC();
+App.Timer -&gt; TimerMilliC;
+</pre>
+</div>
+<div class="section">
+<h1><a id="communication" name="communication">7. Communication</a></h1>
+<p>In TinyOS 2.0, the message buffer type is <tt class="docutils literal"><span class="pre">message_t</span></tt>, and it is a
+buffer that is large enough to hold a packet from any of a node's
+communication interfaces. The structure itself is completely opaque:
+components cannot reference its fields. Instead, all buffer accesses
+go through interfaces. For example, to get the destination address of
+an AM packet named <tt class="docutils literal"><span class="pre">msg</span></tt>, a component calls <tt class="docutils literal"><span class="pre">AMPacket.destination(msg)</span></tt>.</p>
+<p>Send interfaces distinguish the addressing mode of communication
+abstractions. For example, active message communication has the
+<tt class="docutils literal"><span class="pre">AMSend</span></tt> interface, as sending a packet require an AM destination
+address. In contrast, broadcasting and collection tree abstractions
+have the address-free <tt class="docutils literal"><span class="pre">Send</span></tt> interface.</p>
+<p>Active messages are the network HIL. A platform's <tt class="docutils literal"><span class="pre">ActiveMessageC</span></tt>
+component defines which network interface is the standard
+communication medium. For example, a mica2 defines the CC1000 active
+message layer as ActiveMessageC, while the TMote defines the CC2420
+active message layer as ActiveMessageC.</p>
+<p>There is no longer a TOS_UART_ADDRESS for active message
+communication.  Instead, a component should wire to
+SerialActiveMessageC, which provides active message communication over
+the serial port.</p>
+<p>Active message communication is virtualized through four generic
+components, which take the AM type as a parameter: AMSenderC,
+AMReceiverC, AMSnooperC, and AMSnoopingReceiverC. AMSenderC is
+virtualized in that the call to send() does not fail if some
+other component is sending (as it does with GenericComm in 1.x). Instead,
+it fails only if that particular AMSenderC already has a packet
+outstanding or if the radio is not in a sending state. Underneath,
+the active message system queues and sends these outstanding packets.
+This is different than the QueuedSendC approach of 1.x, in which there
+is an N-deep queue that is shared among all senders. With N AMSenderC
+components, there is an N-deep queue where each sender has a single
+reserved entry. This means that each AMSenderC receives
+1/n of the available post-MAC transmission opportunities,  where
+n is the number of AMSenderC components with outstanding packets.
+In the worst case, n is the number of components; even when every
+protocol and component that sends packets is trying to send a packet,
+each one will receive its fair share of transmission opportunities.</p>
+<p>Further information on message_t can be found in TEP 111:
+message_t[<a class="reference" href="#tep111">TEP111</a>], while further information on AM can be
+found in TEP 116: Packet Protocols[<a class="reference" href="#tep116">TEP116</a>].</p>
+<p>The current TinyOS release has a low-power stack for the CC1000
+radio (mica2 platform) and an experimental low-power stack for
+the CC2420 radio (micaz, telosb, and intelmote2 platforms).</p>
+</div>
+<div class="section">
+<h1><a id="sensors" name="sensors">8. Sensors</a></h1>
+<p>In TinyOS 2.0, named sensor components comprise the HIL of a
+platform's sensors. TEP 114 describes a set of HIL data acquisition
+interfaces, such as Read, ReadStream, and Get, which sensors
+provide according to their acquisition capabilities.</p>
+<p>If a component needs
+high-frequency or very accurate sampling, it must use the HAL, which
+gives it the full power of the underlying platform (highly accurate
+platform-independent sampling is not really feasible, due to the
+particulars of individual platforms). <tt class="docutils literal"><span class="pre">Read</span></tt> assumes that the
+request can tolerate some latencies (for example, it might schedule
+competing requests using a FIFO policy).</p>
+<p>Details on the ADC subsystem can be found in
+TEP 101: Analog-to-Digital Converters[<a class="reference" href="#tep101">TEP101</a>]; details on
+the organization of sensor boards can be found in TEP 109:
+Sensorboards[<a class="reference" href="#tep109">TEP109</a>], and the details of the HIL sensor interfaces
+can be found in TEP 114: Source and Sink Independent Drivers[<a class="reference" href="#tep114">TEP114</a>].</p>
+</div>
+<div class="section">
+<h1><a id="error-codes" name="error-codes">9. Error Codes</a></h1>
+<p>The standard TinyOS 1.x return code is <tt class="docutils literal"><span class="pre">result_t</span></tt>, whose value is
+either SUCCESS (a non-zero value) or FAIL (a zero value). While this
+makes conditionals on calls very easy to write (e.g., <tt class="docutils literal"><span class="pre">if</span> <span class="pre">(call</span>
+<span class="pre">A.b())</span></tt>), it does not allow the callee to distinguish causes of error
+to the caller. In TinyOS 2.0, <tt class="docutils literal"><span class="pre">result_t</span></tt> is replaced by <tt class="docutils literal"><span class="pre">error_t</span></tt>,
+whose values include SUCCESS, FAIL, EBUSY, and ECANCEL. Interface
+commands and events define which error codes they may return and why.</p>
+<p>From the perspective of porting code, this is the most significant
+different in 2.0. Calls that were once:</p>
+<pre class="literal-block">
+if (call X.y()) {
+  busy = TRUE;
+}
+</pre>
+<p>now have their meanings reversed. In 1.x, the busy statement will execute
+if the call succeeds, while in 2.0 it will execute if the call fails.
+This encourages a more portable, upgradable, and readable approach:</p>
+<pre class="literal-block">
+if (call X.y() == SUCCESS) {
+  busy = TRUE;
+}
+</pre>
+</div>
+<div class="section">
+<h1><a id="arbitration" name="arbitration">10. Arbitration</a></h1>
+<p>While basic abstractions, such as packet communication and timers,
+can be virtualized, experiences with 1.x showed that some cannot
+without either adding significant complexity or limiting the system.
+The most pressing example of this is a shared bus on a microcontroller.
+Many different systems -- sensors, storage, the radio -- might need
+to use the bus at the same time, so some way of arbitrating access
+is needed.</p>
+<p>To support these kinds of abstractions, TinyOS 2.0 introduces
+the Resource interface, which components use to request and
+acquire shared resources, and arbiters, which provide a policy for
+arbitrating access between multiple clients. For some abstractions,
+the arbiter also provides a power management policy, as it can tell
+when the system is no longer needed and can be safely turned off.</p>
+<p>TEP 108: Resource Arbitration[<a class="reference" href="#tep108">TEP108</a>] describes the Resource interface
+and how arbiters work.</p>
+</div>
+<div class="section">
+<h1><a id="power-management" name="power-management">11. Power Management</a></h1>
+<p>Power management in 2.0 is divided into two parts: the power state
+of the microcontroller and the power state of devices. The former,
+discussed in TEP 112: Microcontroller Power Management[<a class="reference" href="#tep112">TEP112</a>],
+is computed in a chip-specific manner by examining which devices
+and interrupt souces are active. The latter, discussed in
+TEP 115: Power Management of Non-Virtualised Devices{<a class="reference" href="#tep115">TEP115</a>], is handled
+through resource abiters. Fully virtualized services have their
+own, individual power management policies.</p>
+<p>TinyOS 2.0 provides low-power stacks for the CC1000 (mica2)
+and CC2420 (micaz, telosb, imote2) radios. Both use a low-power
+listening apporach, where transmitters send long preambles or
+repeatedly send packets and receivers wake up periodically to
+sense the channel to hear if there is a packet being
+transmitted. The low-power stack CC1000 is standard, while
+the CC2420 stack is experimental. That is, the default CC1000
+stack (chips/cc1000) has low-power-listening, while the default
+CC2420 stack (chips/cc2420) does not. To use the low-power CC2420
+stack, you must include chips/cc2420_lpl in your application Makefile.</p>
+</div>
+<div class="section">
+<h1><a id="network-protocols" name="network-protocols">12. Network Protocols</a></h1>
+<p>TinyOS 2.0 provides simple reference implementations of two of
+the most basic protocols used in mote networks: dissemination
+and collection. Dissemination reliably delivers small (fewer
+than 20 byte) data items to every node in a network, while
+collection builds a routing tree rooted at a sink node. Together,
+these two protocols enable a wide range of data collection
+applications. Collection has advanced significantly since the
+most recent beta release; experimental tests in multiple
+network conditions have seen very high (&gt;98%) deliver rates
+as long as the network is not saturated.</p>
+</div>
+<div class="section">
+<h1><a id="conclusion" name="conclusion">13. Conclusion</a></h1>
+<p>TinyOS 2.0 represents the next step of TinyOS development. Building on
+user experiences over the past few years, it has taken the basic
+TinyOS architecture and pushed it forward in several directions,
+hopefully leading to simpler and easier application development. It is
+still under active development: future prereleases will include
+non-volatile storage, basic multihop protocols (collection routing,
+dissemination), and further power management abstractions.</p>
+</div>
+<div class="section">
+<h1><a id="acknowledgments" name="acknowledgments">14. Acknowledgments</a></h1>
+<p>TinyOS 2.0 is the result of a lot of hard work from a lot of people,
+including (but not limited to) David Gay, Philip Levis, Cory Sharp,
+Vlado Handziski, Jan Hauer, Kevin Klues, Joe Polastre, Jonathan Hui,
+Prabal Dutta,
+Gilman Tolle, Martin Turon, Phil Buonodonna, Ben Greenstein, David Culler,
+Kristin Wright, Ion Yannopoulos, Henri Dubois-Ferriere, Jan Beutel,
+Robert Szewczyk, Rodrigo Fonseca, Kyle Jamieson, Omprakash Gnawali,
+David Moss, and Kristin Wright.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">15. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates</div>
+<div class="line">Computer Systems Laboratory</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">16. Citations</a></h1>
+<table class="docutils citation" frame="void" id="tep1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep1">[TEP1]</a></td><td>TEP 1: TEP Structure and Keywords. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep1.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep2">[TEP2]</a></td><td>TEP 2: Hardware Abstraction Architecture. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep2.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep3" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep3">[TEP3]</a></td><td>TEP 3: Coding Standard. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep3.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep101" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep101">[TEP101]</a></td><td>TEP 101: Analog-to-Digital Converters. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep101.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep102" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep102">[TEP102]</a></td><td>TEP 102: Timers. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep102.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep106" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep106">[TEP106]</a></td><td>TEP 106: Schedulers and Tasks. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep106.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep107" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep107">[TEP107]</a></td><td>TEP 107: Boot Sequence. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep107.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep108" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep108">[TEP108]</a></td><td>TEP 108: message_t. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep108.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep109" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep109">[TEP109]</a></td><td>TEP 109: Sensorboards. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep109.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep110" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep110">[TEP110]</a></td><td>TEP 110: Service Distributions. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep110.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep111" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep111">[TEP111]</a></td><td>TEP 111: message_t. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep111.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep112" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep112">[TEP112]</a></td><td>TEP 112: Microcontroller Power Management. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep112.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep113" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep113">[TEP113]</a></td><td>TEP 113: Serial Communication. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep113.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep114" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep114">[TEP114]</a></td><td>TEP 114: SIDs: Source and Sink Independent Drivers. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep114.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep115" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep115">[TEP115]</a></td><td>TEP 115: Power Management of Non-Virtualised Devices. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep115.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep116" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep116">[TEP116]</a></td><td>TEP 116: Packet Protocols. <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep116.html?pathrev=tinyos-2_0_devel-BRANCH</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="porting-tinyos-1-x-code-to-tinyos-2-0">
+<h1 class="title">Porting TinyOS 1.x Code to TinyOS 2.0</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr><th class="docinfo-name">Author:</th>
+<td>Tahir Azim and Philip Levis</td></tr>
+<tr><th class="docinfo-name">Date:</th>
+<td>October 26 2006</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This document provides a few important points that describe
+major steps required for porting TinyOS 1.x code to TinyOS 2.0.
+It is based on Tahir Azim's experience porting Beacon Vector
+Routing (BVR[<a class="reference" href="#id1">1</a>]) from TinyOS 1.x to T2. This document is not
+a complete porting guide, but the hope is that it will provide
+some help or guidance.</p>
+</div>
+<div class="section">
+<h1><a id="porting-points" name="porting-points">1. Porting Points</a></h1>
+<p>As these observations come from porting a network protocol, they are
+rather protocol-centric and do not consider other abstractions such
+as storage. We hope to add such points in the future.</p>
+<blockquote>
+<ol class="arabic">
+<li><p class="first">SUCCESS was a non-zero error code in TinyOS 1.x, while FAIL was non-zero. So any &quot;if blocks&quot; of the following form need to be changed:</p>
+<pre class="literal-block">
+if (call Packet...) {
+    //SUCCESS!: do this...
+}
+</pre>
+</li>
+</ol>
+<p>In TinyOS 2.x, SUCCESS is equal to a zero error code, while other error codes are non-zero. So calls like this should be changed to make sure they test the result for equality with SUCCESS:</p>
+<pre class="literal-block">
+if (call Packet... () == SUCCESS ) {
+      //SUCCESS!: do this...
+  }
+</pre>
+<ol class="arabic simple" start="2">
+<li>The &quot;init()&quot; and &quot;start/stop()&quot; methods in StdControl have been separated in TinyOS 2.x. The init() method is now part of the &quot;Init&quot; interface. Therefore all modules implementing StdControl should now implement Init also. Modules wired to the StdControl interface of a module should also wire to its Init interface.</li>
+<li>The nx_bool data type should be replaced by nx_uint8_t.</li>
+<li>Radios need to be started manually using SplitControl.start() and SplitControl.stop() at the beginning of the simulation. In TinyOS 1.x, this was assumed to be done automatically by TOSSIM/TinyOS.</li>
+<li>Packets are now an abstract data type (ADT) in TinyOS 2.x. Therefore, destination addresses from packets can no longer be obtained by using &quot;msg -&gt; addr&quot;. Instead the AMPacket.destination() method of the AMPacket interface should be used for this purpose. AMSenderC or AMReceiverC can be used to wire the AMPacket interface.</li>
+<li>Similarly, in order to get a pointer to the payload of received message_t structures, and to get the payload lengths and maximum payload lengths of message_t structures, the Packet interface is used. This can also be wired to an AMSenderC or AMReceiverC component.  Similarly, instead of using &quot;msg-&gt;strength&quot; to get the strength of a received signal, CC2420Packet.getRssi(msg) can be used. The CC2420Packet interface can be wired to CC2420ActiveMessageC.</li>
+<li>Communication interfaces are very similar but require straightforward porting. SendMsg and ReceiveMsg interfaces (wherever used or provided by various modules) should be replaced by AMSend and Receive interfaces. At the lowest layer of the communication stack, AMSend and Receive interfaces should be wired to AMSenderC and AMReceiverC.</li>
+<li>Where a module that previously provided SendMsg is changed to provide AMSend, extra methods have to be added that are part of the AMSend signature. These include the cancel, getPayload and maxPayloadLength methods. The Packet interface wired to AMSenderC can generally be used to implement these methods.</li>
+<li>TOS_UART_ADDRESS no longer exists. Use an SerialAMSenderC component when you would like to send to the serial port.</li>
+<li>TOS_LOCAL_ADDRESS no longer exists. There is now a distinction between the local node's ID (which is TOS_NODE_ID) and the active message address. The active message address of a communication interface can be obtained through the AMPacket.localAddress() command. By default, node ID and AM address are the same. TOS_NODE_ID is bound at compile-time, while an interface's AM address can be changed at runtime.</li>
+<li>Calls such as Leds.greenToggle(), Leds.yellowToggle() etc need to be replaced by Leds.led1Toggle(), Leds.led2Toggle() etc.</li>
+<li>You should no longer use &quot;#ifdef PLATFORM_PC&quot; to separate pieces of code that are to run only on the 'pc' target. Instead, &quot;#ifdef TOSSIM&quot; is used to identify blocks of code that should be run only in TOSSIM.</li>
+<li>dbg messages no longer use one of the debug modes of the form, DBG_* as their first argument. Instead, they should be replaced with strings identifying the sources from where the messages originated.</li>
+</ol>
+</blockquote>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">2. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Tahir Azim</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Computer Systems Laboratory</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:tazim&#64;cs.stanford.edu">tazim&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Computer Systems Laboratory</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">3. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id1">[1]</a></td><td>Rodrigo Fonseca, David Culler, Sylvia Ratnasamy, Scott Shenker, and Ion Stoica. &quot;Beacon Vector Routing: Scalable Point-to-Point Routing in Wireless Sensornets.&quot; In Proceedings of the Second USENIX/ACM Symposium on Network Systems Design and Implementation (NSDI 2005).</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
diff --git a/doc/html/tep1.html b/doc/html/tep1.html
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+<title>TEP Structure and Keywords</title>
+<meta name="author" content="Philip Levis" />
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+<body>
+<div class="document" id="tep-structure-and-keywords">
+<h1 class="title">TEP Structure and Keywords</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">1</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Best Current Practice</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">All</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Philip Levis</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This document specifies a Best Current Practices for the
+TinyOS Community, and requests discussion and suggestions for
+improvements.  Distribution of this memo is unlimited.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo describes the structure all TinyOS Extension Proposal (TEP)
+documents follow, and defines the meaning of several key words in
+those documents.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>In order to simplify management, reading, and tracking development,
+all TinyOS Extension Proposals (TEPs) MUST have a particular
+structure. Additionally, to simplify development and improve
+implementation interoperability, all TEPs MUST observe the meaning of
+several key words that specify levels of compliance. This document
+describes and follows both.</p>
+</div>
+<div class="section">
+<h1><a id="keywords" name="keywords">2. Keywords</a></h1>
+<p>The key words &quot;MUST&quot;, &quot;MUST NOT&quot;, &quot;REQUIRED&quot;, &quot;SHALL&quot;, &quot;SHALL NOT&quot;,
+&quot;SHOULD&quot;, &quot;SHOULD NOT&quot;, &quot;RECOMMENDED&quot;, &quot;MAY&quot;, and &quot;OPTIONAL&quot; in this
+document are to be interpreted as described in TEP 1.</p>
+<p>Note that the force of these words is modified by the requirement
+level of the document in which they are used. These words hold their
+special meanings only when capitalized, and documents SHOULD avoid using
+these words uncapitalized in order to minimize confusion.</p>
+<div class="section">
+<h2><a id="must" name="must">2.1 MUST</a></h2>
+<p>MUST: This word, or the terms &quot;REQUIRED&quot; or &quot;SHALL&quot;, mean that the
+definition is an absolute requirement of the specification.</p>
+</div>
+<div class="section">
+<h2><a id="must-not" name="must-not">2.2 MUST NOT</a></h2>
+<p>MUST NOT: This phrase, or the phrase &quot;SHALL NOT&quot;, mean that the
+definition is an absolute prohibition of the specification.</p>
+</div>
+<div class="section">
+<h2><a id="should" name="should">2.3 SHOULD</a></h2>
+<p>SHOULD: This word, or the adjective &quot;RECOMMENDED&quot;, mean that there
+may exist valid reasons in particular circumstances to ignore a
+particular item, but the full implications must be understood and
+carefully weighed before choosing a different course.</p>
+</div>
+<div class="section">
+<h2><a id="should-not" name="should-not">2.4 SHOULD NOT</a></h2>
+<p>SHOULD NOT: This phrase, or the phrase &quot;NOT RECOMMENDED&quot; mean that
+there may exist valid reasons in particular circumstances when the
+particular behavior is acceptable or even useful, but the full
+implications should be understood and the case carefully weighed
+before implementing any behavior described with this label.</p>
+</div>
+<div class="section">
+<h2><a id="may" name="may">2.5 MAY</a></h2>
+<p>MAY: This word, or the adjective &quot;OPTIONAL&quot;, mean that an item is
+truly optional.  One implementer may choose to include the item
+because a particular application requires it or because the
+implementer feels that it enhances the system while another
+implementer may omit the same item.  An implementation which does not
+include a particular option MUST be prepared to interoperate with
+another implementation which does include the option, though perhaps
+with reduced functionality. In the same vein an implementation which
+does include a particular option MUST be prepared to interoperate with
+another implementation which does not include the option (except, of
+course, for the feature the option provides.)</p>
+</div>
+<div class="section">
+<h2><a id="guidance-in-the-use-of-these-imperatives" name="guidance-in-the-use-of-these-imperatives">2.6 Guidance in the use of these Imperatives</a></h2>
+<p>Imperatives of the type defined in this memo must be used with care
+and sparingly.  In particular, they MUST only be used where it is
+actually required for interoperation or to limit behavior which has
+potential for causing harm (e.g., limiting retransmissions)  For
+example, they must not be used to try to impose a particular method
+on implementors where the method is not required for
+interoperability.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="tep-structure" name="tep-structure">3. TEP Structure</a></h1>
+<p>TEPs have two major parts, a header and a body. The header states
+document metadata, for management and status. The body contains the
+content of the proposal.</p>
+<p>All TEPs MUST conform to reStructuredText standards <a class="footnote-reference" href="#id2" id="id1" name="id1">[1]</a> and follow
+the docutils template, to enable translation from  reStructuredText
+to HTML and LaTeX.</p>
+<div class="section">
+<h2><a id="tep-header" name="tep-header">3.1 TEP Header</a></h2>
+<p>The TEP header has several fields which MUST be included, as well as
+others which MAY be included. The TEP header MUST NOT include headers
+which are not specified in TEP 1 or supplementary Best Current
+Practice TEPs. The first six header fields MUST be
+included in all TEPs, in the order stated here.</p>
+<p>The first field is &quot;TEP,&quot; and specifies the TEP number of the
+document. A TEP's number is unique.. This document is TEP 1. The
+TEP type (discussed below) determines TEP number assignment. Generally,
+when a document is ready to be a TEP, it is assigned the smallest
+available number. BCP TEPs start at 1 and all other TEPs
+(Documentary, Experimental, and Informational) start at 101.</p>
+<p>The second field states the name of the working group that produced
+the document. This document was produced by the Core Working Group.</p>
+<p>The third field is &quot;Type,&quot; and specifies the type of TEP the document
+is. There are four types of TEP: Best Current Practice (BCP),
+Documentary, Informational, and Experimental. This document's type is Best
+Current Practice.</p>
+<p>Best Current Practice is the closest thing TEPs have to a standard: it
+represents conclusions from significant experience and work by its
+authors. Developers desiring to add code (or TEPs) to TinyOS SHOULD
+follow all current BCPs.</p>
+<p>Documentary TEPs describe a system or protocol that exists; a
+documentary TEP MUST reference an implementation that a reader can
+easily obtain.  Documentary TEPs simplify interoperability when
+needed, and document TinyOS service implementations.</p>
+<p>Informational TEPs provide information that is of interest to the
+community. Informational TEPs include data gathered on radio behavior,
+hardware characteristics, other aspects of TinyOS software/hardware,
+organizational and logistic information,
+or experiences which could help the community achieve its goals.</p>
+<p>Experimental TEPs describe a completely experimental approach to a
+problem, which are outside the TinyOS core and will not necessarily
+become part of it.  Unlike Documentary TEPs, Experimental TEPs may
+describe systems that do not have a reference implementation.</p>
+<p>The fourth field is &quot;Status,&quot; which specifies the status of the TEP.
+A TEP status can either be &quot;Draft,&quot; which means it is a work in
+progress, &quot;Final,&quot; which means it is complete and will not change.
+Once a TEP has the status &quot;Final,&quot; the only change allowed is the
+addition of an &quot;Obsoleted By&quot; field.</p>
+<p>The &quot;Obsoletes&quot; field is a backward pointer to an earlier TEP which
+the current TEP renders obsolete. An Obsoletes field MAY have multiple
+TEPs listed.  For example, if TEP 191 were to replace TEPs 111 and 116, it
+would have the field &quot;Obsoletes: 111, 116&quot;.</p>
+<p>The &quot;Obsoleted By&quot; field is added to a Final TEP when another TEP has
+rendered it obsolete. The field contains the number of the obsoleting
+TEP. For example, if TEP 111 were obsoleted by TEP 191, it would have
+the field &quot;Obsoleted By: 191&quot;.</p>
+<p>&quot;Obsoletes&quot; and &quot;Obsoleted By&quot; fields MUST agree. For a TEP to list another
+TEP in its Obsoletes field, then that TEP MUST list it in the Obsoleted By
+field.</p>
+<p>The obsoletion fields are used to keep track of evolutions and modifications
+of a single abstraction. They are not intended to force a single approach or
+mechanism over alternative possibilities.</p>
+<p>If a TEP is Best Current Practices or Documentary, then it MUST
+include an additional field, &quot;TinyOS-Version:,&quot; which states what
+version(s) of TinyOS the document pertains to. This document pertains
+to all versions of TinyOS, until made obsolete by a future TEP. This
+field MUST appear after the Status field and before the Author field.</p>
+<p>The final required field is &quot;Author,&quot; which states the names of the
+authors of the document. Full contact information should not be listed
+here (see Section 3.2).</p>
+<p>There is an optional field, &quot;Extends.&quot; The &quot;Extends&quot; field refers to
+another TEP. The purpose of this field is to denote when a TEP represents
+an addition to an existing TEP. Meeting the requirements of a TEP with an
+Extends field requires also meeting the requirements of all TEPs listed
+in the Extends field.</p>
+<p>If a TEP is a Draft, then four additional fields MUST be included:
+Draft-Created, Draft-Modified, Draft-Version, and Draft-Discuss.
+Draft-Created states the date the document was created, Draft-Modified
+states when it was last modified. Draft-Version specifies the version
+of the draft, which MUST increase every time a modification is
+made. Draft-Discuss specifies the email address of a mailing list
+where the draft is being discussed. Final and Obsolete TEPs MUST NOT
+have these fields, which are for Drafts only.</p>
+</div>
+<div class="section">
+<h2><a id="tep-body" name="tep-body">3.2 TEP Body</a></h2>
+<p>The first element of the TEP body MUST be the title of the document. A
+TEP SHOULD follow the title with an Abstract, which gives a brief
+overview of the content of the TEP. Longer TEPs MAY, after the
+Abstract, have a Table of Contents. After the Abstract and Table of
+Contents there SHOULD be an Introduction, stating the problem the TEP
+seeks to solve and providing needed background information.</p>
+<p>If a TEP is Documentary, it MUST have a section entitled
+&quot;Implementation,&quot; which instructs the reader how to obtain the
+implementation documented.</p>
+<p>If a TEP is Best Current Practice, it MUST have a section entitled
+&quot;Reference,&quot; which points the reader to one or more reference uses of
+the practices.</p>
+<p>The last three sections of a TEP are author information, citations,
+and appendices. A TEP MUST have an author information section titled
+entitled &quot;Author's Address&quot; or &quot;Authors' Addresses.&quot; A TEP MAY have
+a citation section entitled &quot;Citations.&quot; A citations section MUST
+immediately follow the author information section. A TEP MAY have
+appendices. Appendices MUST immediately follow the citations section,
+or if there is no citations section, the author information section.
+Appendices are lettered.  Please refer to Appendix A for details.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="reference" name="reference">4. Reference</a></h1>
+<p>The reference use of this document is TEP 1 (itself).</p>
+</div>
+<div class="section">
+<h1><a id="acknowledgments" name="acknowledgments">5. Acknowledgments</a></h1>
+<p>The definitions of the compliance terms are a direct copy of
+definitions taken from IETF RFC 2119.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">6. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">7. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="id2">[1]</a></td><td>reStructuredText Markup Specification. &lt;<a class="reference" href="http://docutils.sourceforge.net/docs/ref/rst/restructuredtext.html">http://docutils.sourceforge.net/docs/ref/rst/restructuredtext.html</a>&gt;</td></tr>
+</tbody>
+</table>
+</div>
+<div class="section">
+<h1><a id="appendix-a-example-appendix" name="appendix-a-example-appendix">Appendix A. Example Appendix</a></h1>
+<p>This is an example appendix. Appendices begin with the letter A.</p>
+</div>
+</div>
+</body>
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+  margin-top: 0.5em ;
+  margin-bottom: 0.5em }
+
+table.citation {
+  border-left: solid thin gray ;
+  padding-left: 0.5ex }
+
+table.docinfo {
+  margin: 2em 4em;
+}
+
+table.footnote {
+  border-left: solid thin black ;
+  padding-left: 0.5ex }
+
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+  padding-left: 0.5em ;
+  padding-right: 0.5em ;
+  vertical-align: top }
+
+th.docinfo-name, th.field-name {
+  font-weight: bold ;
+  text-align: left ;
+  white-space: nowrap;
+  }
+
+h1 tt, h2 tt, h3 tt, h4 tt, h5 tt, h6 tt {
+  font-size: 100% }
+
+tt {}
+
+ul.auto-toc {
+  list-style-type: none }
+
+</style>
+</head>
+<body>
+<div class="document" id="analog-to-digital-converters-adcs">
+<h1 class="title">Analog-to-Digital Converters (ADCs)</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">101</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Jan-Hinrich Hauer, Philip Levis, Vlado Handziski, David Gay</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+<a class="citation-reference" href="#tep1" id="id1" name="id1">[TEP1]</a>.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This TEP proposes a hardware abstraction for analog-to-digital converters (ADCs)
+in TinyOS 2.x, which is aligned to the three-layer Hardware Abstraction
+Architecture (HAA) specified in <a class="citation-reference" href="#tep2" id="id2" name="id2">[TEP2]</a>. It describes some design principles and
+documents the set of hardware-independent interfaces to an ADC.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>Analog-to-digital converters (ADCs) are devices that convert analog input
+signals to discrete digital output signals, typically voltage to a binary
+number.  The interested reader can refer to Appendix A for a brief overview of
+the ADC hardware on some current TinyOS platforms.  In earlier versions of
+TinyOS, the distinction between a sensor and an ADC were blurred: this led
+components that had nothing to do with an ADC to still resemble one
+programatically, even though the semantics and forms of operation were
+completely different.  To compensate for the difference non-ADC sensors
+introduced additional interfaces, such as <tt class="docutils literal"><span class="pre">ADCError</span></tt>, that were tightly bound
+to sensor acquisition but separate in wiring. The separation between the ADC
+and <tt class="docutils literal"><span class="pre">ADCError</span></tt> interface is bug prone and problematic, as is the equation of
+a sensor and an ADC. TinyOS 2.x separates the structure and interfaces of an
+ADC from those of sensor drivers (which may be on top of an ADC stack, but
+this fact is hidden from higher level components). This TEP presents how TinyOS
+2.x structures ADC software. <a class="citation-reference" href="#tep109" id="id3" name="id3">[TEP109]</a> (Sensor Boards) shows how a platform can
+present actual named sensors.</p>
+<p>As can be seen in Appendix A the ADC hardware used on TinyOS platforms differ
+in many respects, which makes it difficult to find a chip independent
+representation for an ADC. Even if there were such a representation, the
+configuration details of an ADC would still depend on the actual device
+producing the input signal (sensor).  Neither a platform independent
+application nor the ADC hardware stack itself has access to this information,
+as it can only be determined on a platform or sensorboard level. For example,
+determining which ADC port a sensor is attached to and how conversion results
+need to be interpreted is a platform specific determination. Although the
+actual configuration details may be different the procedure of configuring an
+ADC can be unified on all ADCs with the help of <strong>hardware independent
+interfaces</strong>: in a similar way as the <tt class="docutils literal"><span class="pre">Read</span></tt> interface definition does not
+predefine the type or semantics of the exchanged data (see <a class="citation-reference" href="#tep114" id="id4" name="id4">[TEP114]</a>), a
+configuration interface definition can abstract from the data type and
+semantics of the involved configuration settings.  For example, like a
+component can provide a <tt class="docutils literal"><span class="pre">Read&lt;uint8_t&gt;</span></tt> or <tt class="docutils literal"><span class="pre">Read&lt;uint16_t&gt;</span></tt> interface, it
+can also provide a <tt class="docutils literal"><span class="pre">AdcConfigure&lt;atm128_adc_config_t&gt;</span></tt> or
+<tt class="docutils literal"><span class="pre">AdcConfigure&lt;msp430adc12_channel_config_t&gt;</span></tt> interface depending on what ADC
+it represents.  This TEP proposes the (typed) <tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface as the
+standard interface for configuring an ADC in TinyOS 2.x.</p>
+<p>In spite of their hardware differences, one aspect represents a common
+denominator of ADCs: they all produce conversion results. To facilitate sensor
+software development conversion results are returned by the ADC stack through
+the interfaces <tt class="docutils literal"><span class="pre">Read</span></tt>, <tt class="docutils literal"><span class="pre">ReadStream</span></tt> and <tt class="docutils literal"><span class="pre">ReadNow</span></tt> (see <a class="reference" href="#interfaces">2.  Interfaces</a>
+and <a class="citation-reference" href="#tep114" id="id5" name="id5">[TEP114]</a>).  Conversion results are returned as uninterpreted values and
+translating them to engineering units can only be done with the configuration
+knowledge of the respective platform, for example, the reference voltage or the
+resistance of a reference resistor in ratiometric measurements.  Translating
+uninterpreted values to engineering units may be performed by components
+located on top of the ADC stack and is out of the scope of this TEP.</p>
+<p>The top layer of abstraction of an ADC - the Hardware Interface Layer (HIL) -
+thus provides the interfaces <tt class="docutils literal"><span class="pre">Read</span></tt>, <tt class="docutils literal"><span class="pre">ReadNow</span></tt> and <tt class="docutils literal"><span class="pre">ReadStream</span></tt> and uses
+the <tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface for hardware configuration (why it <strong>uses</strong> and
+does not <strong>provide</strong> <tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> is explained below).  Since the type and
+semantics of the parameters passed through these interfaces is dependent on the
+actual ADC implementation, it is only a &quot;weak&quot; HIL (see <a class="citation-reference" href="#tep2" id="id6" name="id6">[TEP2]</a>).</p>
+<p>Following the principles of the HAA <a class="citation-reference" href="#tep2" id="id7" name="id7">[TEP2]</a> the Hardware Adaptation Layer (HAL,
+which resides below the HIL) of an ADC should expose all the chip-specific
+capabilities of the chip.  For example, the ADC12 on the MSP430 MCU supports a
+&quot;Repeat-Sequence-of-Channels Mode&quot; and therefore this function should be
+accessible on the HAL of the MSP430 ADC12 hardware abstraction.  Other ADCs
+might not exhibit such functionality and might therefore - on the level of HAL
+- provide only an interface to perform single conversions. Since all ADCs have
+the same HIL representation it may be necessary to perform some degree of
+software emulation in the HIL implementation.  For example, a <tt class="docutils literal"><span class="pre">ReadStream</span></tt>
+command can be emulated by multiple single conversion commands. Below the HAL
+resides the Hardware Presentation Layer (HPL), a stateless component that
+provides access to the hardware registers (see <a class="citation-reference" href="#tep2" id="id8" name="id8">[TEP2]</a>). The general structure
+(without virtualization) of the ADC stack is as follows</p>
+<pre class="literal-block">
+       ^                     |
+       |                     |
+       |                   Read,
+ AdcConfigure              ReadNow (+ Resource),
+       |                   ReadStream
+       |                     |
+       |                     V
+ +----------------------------------+
+ |  Hardware Interface Layer (HIL)  |
+ |  (chip-specific implementation)  |
+ +----------------------------------+
+                  |
+                  |
+   chip-specific interface(s) + Resource
+(e.g. Msp430Adc12SingleChannel + Resource)
+                  |
+                  V
+ +----------------------------------+
+ |  Hardware Adaptation Layer (HAL) |
+ |  (chip-specific implementation)  |
+ +----------------------------------+
+                  |
+                  |
+        chip-specific interface(s)
+            (e.g. HplAdc12)
+                  |
+                  V
+ +----------------------------------+
+ | Hardware Presentation Layer (HPL)|
+ | (chip-specific implementation)   |
+ +----------------------------------+
+</pre>
+<p>The rest of this TEP specifies:</p>
+<ul class="simple">
+<li>the set of standard TinyOS interfaces for collecting ADC conversion
+results and for configuring an ADC (<a class="reference" href="#interfaces">2. Interfaces</a>)</li>
+<li>guidelines on how an ADC's HAL should expose chip-specific
+interfaces (<a class="reference" href="#hal-guidelines">3. HAL guidelines</a>)</li>
+<li>what components an ADC's HIL MUST implement (<a class="reference" href="#hil-requirements">4. HIL requirements</a>)</li>
+<li>guidelines on how the HIL should be implemented
+(<a class="reference" href="#hil-guidelines">5. HIL guidelines</a>)</li>
+<li>a section pointing to current implementations (<a class="reference" href="#implementation">6. Implementation</a>)</li>
+</ul>
+<p>This TEP ends with appendices documenting, as an example, the ADC implementation
+for the TI MSP430 MCU.</p>
+</div>
+<div class="section">
+<h1><a id="interfaces" name="interfaces">2. Interfaces</a></h1>
+<p>This TEP proposes the <tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface for ADC hardware configuration
+and the <tt class="docutils literal"><span class="pre">Read</span></tt>, <tt class="docutils literal"><span class="pre">ReadStream</span></tt> and <tt class="docutils literal"><span class="pre">ReadNow</span></tt> interfaces to acquire
+conversion results. The <tt class="docutils literal"><span class="pre">Read</span></tt> and <tt class="docutils literal"><span class="pre">ReadStream</span></tt> interfaces are documented
+in <a class="citation-reference" href="#tep114" id="id9" name="id9">[TEP114]</a> and the <tt class="docutils literal"><span class="pre">ReadNow</span></tt> interface is documented in this TEP.  A
+<tt class="docutils literal"><span class="pre">Read[Now|Stream]</span></tt> interface is always provided in conjunction with a
+<tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface.</p>
+<div class="section">
+<h2><a id="interface-for-configuring-the-adc-hardware" name="interface-for-configuring-the-adc-hardware">Interface for configuring the ADC hardware</a></h2>
+<p>The <tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface is defined as follows:</p>
+<pre class="literal-block">
+interface AdcConfigure&lt; config_type &gt;
+{
+  async command config_type getConfiguration();
+}
+</pre>
+<p>This interface is used by the ADC stack to retrieve the hardware configuration
+of an ADC HIL client. <tt class="docutils literal"><span class="pre">config_type</span></tt> is a chip-specific data type (simple or
+structured) that contains all information necessary to configure the respective
+ADC hardware. For example, on the ADC12 of the MSP430 the <tt class="docutils literal"><span class="pre">AdcConfigure</span></tt>
+interface will be instantiated with the <tt class="docutils literal"><span class="pre">const</span> <span class="pre">msp430adc12_channel_config_t*</span></tt>
+data type. A client MUST always return the same configuration through a
+<tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface and, if configuration data is passed as a pointer,
+the HIL component (see <a class="reference" href="#hil-requirements">4. HIL requirements</a>) MUST NOT reference it after the
+return of the <tt class="docutils literal"><span class="pre">getConfiguration()</span></tt> command. If a client wants to use the ADC
+with different configurations it must provide multiple instances of the
+<tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface.</p>
+<p>Note that the <tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface is <strong>provided</strong> by an ADC HIL client
+and it is <strong>used</strong> by the ADC HIL implementation. Therefore an ADC HIL client
+cannot initiate the configuration of the ADC hardware itself. Instead it is the
+ADC HIL implementation that can &quot;pull&quot; the client's ADC configuration just
+before it initates a conversion based on the respective client's configuration.
+The rationale is that the ADC HIL implementation does not have to store an ADC
+configuration per client - instead the ADC client can, for example, store its
+configuration in program memory.</p>
+</div>
+<div class="section">
+<h2><a id="interfaces-for-acquiring-conversion-results" name="interfaces-for-acquiring-conversion-results">Interfaces for acquiring conversion results</a></h2>
+<p>This TEP proposes to adopt the following two source-independent data
+collection interfaces from <a class="citation-reference" href="#tep114" id="id10" name="id10">[TEP114]</a> for the collection of ADC conversion
+results on the level of HIL:</p>
+<pre class="literal-block">
+interface Read&lt; size_type &gt;
+interface ReadStream&lt; size_type &gt;
+</pre>
+<p>In addition it proposes the following data collection interface for low-latency
+reading of conversion results:</p>
+<pre class="literal-block">
+interface ReadNow&lt; size_type &gt;
+</pre>
+<p>Every data collection interface is associated with an <tt class="docutils literal"><span class="pre">AdcConfigure</span></tt>
+interface (how this association is realized is explained in Section <a class="reference" href="#hil-requirements">4.  HIL
+requirements</a>).  As the resolution of conversion results is chip-specific, the
+<tt class="docutils literal"><span class="pre">size_type</span></tt> parameter reflects an upper bound for the chip-specific
+resolution of the conversion results - the actual resolution may be smaller
+(e.g.  uint16_t for a 12-bit ADC).</p>
+<div class="section">
+<h3><a id="read" name="read">Read</a></h3>
+<p>The <tt class="docutils literal"><span class="pre">Read</span></tt> interface can be used to sample an ADC channel once and return a
+single conversion result as an uninterpreted value. The <tt class="docutils literal"><span class="pre">Read</span></tt> interface is
+documented in <a class="citation-reference" href="#tep114" id="id11" name="id11">[TEP114]</a>.</p>
+</div>
+<div class="section">
+<h3><a id="readstream" name="readstream">ReadStream</a></h3>
+<p>The <tt class="docutils literal"><span class="pre">ReadStream</span></tt> interface can be used to sample an ADC channel multiple
+times with a specified sampling period. The <tt class="docutils literal"><span class="pre">ReadStream</span></tt> interface is
+documented in <a class="citation-reference" href="#tep114" id="id12" name="id12">[TEP114]</a> .</p>
+</div>
+<div class="section">
+<h3><a id="readnow" name="readnow">ReadNow</a></h3>
+<p>The <tt class="docutils literal"><span class="pre">ReadNow</span></tt> interface is intended for split-phase low-latency
+reading of small values:</p>
+<pre class="literal-block">
+interface ReadNow&lt;val_t&gt;
+{
+  async command error_t read();
+  async event void readDone( error_t result, val_t val );
+}
+</pre>
+<p>This interface is similar to the <tt class="docutils literal"><span class="pre">Read</span></tt> interface, but works in asynchronous
+context. A successful call to <tt class="docutils literal"><span class="pre">ReadNow.read()</span></tt> means that the ADC hardware
+has started the sampling process and that <tt class="docutils literal"><span class="pre">ReadNow.readDone()</span></tt> will be
+signalled once it has finished (note that the asynchronous
+<tt class="docutils literal"><span class="pre">ReadNow.readDone()</span></tt> might be signalled even before the call to
+<tt class="docutils literal"><span class="pre">ReadNow.read()</span></tt> has returned).  Due to its timing constraints the
+<tt class="docutils literal"><span class="pre">ReadNow</span></tt> interface is always provided in conjunction with an instance of the
+<tt class="docutils literal"><span class="pre">Resource</span></tt> interface and a client must reserve the ADC through the
+<tt class="docutils literal"><span class="pre">Resource</span></tt> interface before the client may call <tt class="docutils literal"><span class="pre">ReadNow.read()</span></tt>.  Please
+refer to <a class="citation-reference" href="#tep108" id="id13" name="id13">[TEP108]</a> on how the <tt class="docutils literal"><span class="pre">Resource</span></tt> interface should be used by a client
+component.</p>
+</div>
+</div>
+</div>
+<div class="section">
+<h1><a id="hal-guidelines" name="hal-guidelines">3. HAL guidelines</a></h1>
+<p>As explained in <a class="reference" href="#introduction">1. Introduction</a> the HAL exposes the full capabilities of the
+ADC hardware. Therefore only chip- and platform-dependent clients can wire to
+the HAL. Although the HAL is chip-specific, both, in terms of implementation
+and representation, its design should follow the guidelines described in this
+section to facilitate the mapping to the HIL representation. Appendix B shows
+the signature of the HAL for the MSP430.</p>
+<div class="section">
+<h2><a id="resource-reservation" name="resource-reservation">Resource reservation</a></h2>
+<p>As the ADC hardware is a shared resource that is usually multiplexed between
+several clients some form of access arbitration is necessary.  The HAL should
+therefore provide a parameterized <tt class="docutils literal"><span class="pre">Resource</span></tt> interface, instantiate a
+standard arbiter component and connect the <tt class="docutils literal"><span class="pre">Resource</span></tt> interface to the
+arbiter as described in <a class="citation-reference" href="#tep108" id="id14" name="id14">[TEP108]</a>. To ensure fair and uniform arbitration on
+all platforms the standard round robin arbiter is recommended. Resource
+arbiters and the <tt class="docutils literal"><span class="pre">Resource</span></tt> interface are the topic of <a class="citation-reference" href="#tep108" id="id15" name="id15">[TEP108]</a>.</p>
+</div>
+<div class="section">
+<h2><a id="configuration-and-sampling" name="configuration-and-sampling">Configuration and sampling</a></h2>
+<p>As the ADC hardware is a shared resource the HAL should support hardware
+configuration and sampling per client (although per-port configuration is
+possible, it is not recommended, because it forces all clients to use the same
+configuration for a given port).  Therefore the HAL should provide sampling
+interfaces parameterized by a client identifier. A HAL client can use its
+instance of the sampling interface to configure the ADC hardware, start the
+sampling process and acquire conversion results. It wires to a sampling
+interface using a unique client identifier (this may be hidden by a
+virtualization component). All commands and events in the sampling interface
+should be 'async' to reflect the potential timing requirements of clients on
+the level of HAL. A HAL may provide multiple different parameterized sampling
+interfaces, depending on the hardware capabilities.  This allows to
+differentiate/group ADC functionality, for example single vs.  repeated
+sampling, single channel vs.  multiple channels or low-frequency vs.
+high-frequency sampling.  Every sampling interface should allow the client to
+individually configure the ADC hardware, for example by including the
+configuration data as parameters in the sampling commands.  However, if
+configuration data is passed as a pointer, the HAL component MUST NOT reference
+it after the return of the respective command.  Appendix B shows the HAL
+interfaces for the MSP430.</p>
+</div>
+<div class="section">
+<h2><a id="hal-virtualization" name="hal-virtualization">HAL virtualization</a></h2>
+<p>In order to hide wiring complexities and/or export only a subset of all ADC
+functions generic ADC wrapper components may be provided on the level of HAL.
+Such components can also be used to ensure that a sampling interface is always
+provided with a <tt class="docutils literal"><span class="pre">Resource</span></tt> interface and both are instantiated with the same
+client ID if this is required by the HAL implementation.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="hil-requirements" name="hil-requirements">4. HIL requirements</a></h1>
+<p>The following generic components MUST be provided on all platforms that have an
+ADC:</p>
+<pre class="literal-block">
+AdcReadClientC
+AdcReadNowClientC
+AdcReadStreamClientC
+</pre>
+<p>These components provide virtualized access to the HIL of an ADC. They are
+instantiated by an ADC client and provide/use the four interfaces described in
+Section <a class="reference" href="#interfaces">2.  Interfaces</a>. An ADC client may instantiate multiple such
+components. The following paragraphs describe their signatures. Note that this
+TEP does not address the issue of how to deal with multiple ADCs on the same
+platform (the question of how to deal with multiple devices of the same class
+is a general one in TinyOS 2.x). Appendix C shows the <tt class="docutils literal"><span class="pre">AdcReadClientC</span></tt> for
+the MSP430.</p>
+<div class="section">
+<h2><a id="adcreadclientc" name="adcreadclientc">AdcReadClientC</a></h2>
+<pre class="literal-block">
+generic configuration AdcReadClientC() {
+  provides {
+    interface Read&lt; size_type &gt;;
+  }
+  uses {
+    interface AdcConfigure&lt; config_type &gt;;
+  }
+}
+</pre>
+<p>The <tt class="docutils literal"><span class="pre">AdcReadClientC</span></tt> component provides a <tt class="docutils literal"><span class="pre">Read</span></tt> interface for acquiring
+single conversion results. The associated ADC channel (port) and further
+configuration details are returned by the <tt class="docutils literal"><span class="pre">AdcConfigure.getConfiguration()</span></tt>
+command. It is the task of the client to wire this interface to a component
+that provides the client's ADC configuration. The HIL implementation will use
+the <tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface to dynamically &quot;pull&quot; the client's ADC settings
+when it translates the <tt class="docutils literal"><span class="pre">Read.read()</span></tt> command to a chip-specific sampling
+command.  Note that both, <tt class="docutils literal"><span class="pre">size_type</span></tt> and <tt class="docutils literal"><span class="pre">config_type</span></tt>, are only
+placeholders and will be instantiated by the respective HIL implementation (for
+an example, see the AdcReadClientC for the MSP430 in Appendix C).</p>
+</div>
+<div class="section">
+<h2><a id="adcreadnowclientc" name="adcreadnowclientc">AdcReadNowClientC</a></h2>
+<pre class="literal-block">
+generic configuration AdcReadNowClientC() {
+  provides {
+    interface Resource;
+    interface ReadNow&lt; size_type &gt;;
+  }
+  uses {
+    interface AdcConfigure&lt; config_type &gt;;
+  }
+}
+</pre>
+<p>The <tt class="docutils literal"><span class="pre">AdcReadNowClientC</span></tt> component provides a <tt class="docutils literal"><span class="pre">ReadNow</span></tt> interface for
+acquiring single conversion results. In contrast to <tt class="docutils literal"><span class="pre">Read.read()</span></tt> when a call
+to <tt class="docutils literal"><span class="pre">ReadNow.read()</span></tt> succeeds, the ADC starts to sample the channel
+immediately (a successful <tt class="docutils literal"><span class="pre">Read.read()</span></tt> command may not have this
+implication, see <a class="citation-reference" href="#tep114" id="id16" name="id16">[TEP114]</a> and <a class="reference" href="#interfaces">2. Interfaces</a>). A client MUST reserve the ADC
+through the <tt class="docutils literal"><span class="pre">Resource</span></tt> interface before the client may call
+<tt class="docutils literal"><span class="pre">ReadNow.read()</span></tt> and it MUST release the ADC through the <tt class="docutils literal"><span class="pre">Resource</span></tt>
+interface when it no longer needs to access it (for more details on how to use
+the <tt class="docutils literal"><span class="pre">Resource</span></tt> interface please refer to <a class="citation-reference" href="#tep108" id="id17" name="id17">[TEP108]</a>).  The associated ADC
+channel (port) and further configuration details are returned by the
+<tt class="docutils literal"><span class="pre">AdcConfigure.getConfiguration()</span></tt> command. It is the task of the client to
+wire this interface to a component that provides the client's ADC
+configuration.  The HIL implementation will use the <tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface
+to dynamically &quot;pull&quot; the client's ADC settings when it translates the
+<tt class="docutils literal"><span class="pre">ReadNow.read()</span></tt> command to a chip-specific sampling command. Note that both,
+<tt class="docutils literal"><span class="pre">size_type</span></tt> and <tt class="docutils literal"><span class="pre">config_type</span></tt>, are only placeholders and will be
+instantiated by the respective HIL implementation (for an example how this is
+done for the AdcReadClientC see Appendix C).</p>
+</div>
+<div class="section">
+<h2><a id="adcreadstreamclientc" name="adcreadstreamclientc">AdcReadStreamClientC</a></h2>
+<pre class="literal-block">
+generic configuration AdcReadStreamClientC() {
+  provides {
+    interface ReadStream&lt; size_type &gt;;
+  }
+  uses {
+    interface AdcConfigure&lt; config_type&gt;;
+  }
+}
+</pre>
+<p>The <tt class="docutils literal"><span class="pre">AdcReadStreamClientC</span></tt> component provides a <tt class="docutils literal"><span class="pre">ReadStream</span></tt> interface for
+acquiring multiple conversion results at once. The <tt class="docutils literal"><span class="pre">ReadStream</span></tt> interface is
+explained in <a class="citation-reference" href="#tep114" id="id18" name="id18">[TEP114]</a> and <a class="reference" href="#interfaces">2. Interfaces</a>. The <tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface is
+used in the same way as described in the section on the <tt class="docutils literal"><span class="pre">AdcReadClientC</span></tt>.
+Note that both, <tt class="docutils literal"><span class="pre">size_type</span></tt> and <tt class="docutils literal"><span class="pre">config_type</span></tt>, are only placeholders and
+will be instantiated by the respective HIL implementation (for an example how
+this is done for the AdcReadClientC see Appendix C).</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="hil-guidelines" name="hil-guidelines">5. HIL guidelines</a></h1>
+<p>The HIL implementation of an ADC stack has two main tasks: it translates a
+<tt class="docutils literal"><span class="pre">Read</span></tt>, <tt class="docutils literal"><span class="pre">ReadNow</span></tt> or <tt class="docutils literal"><span class="pre">ReadStream</span></tt> request to a chip-specific HAL sampling
+command and it abstracts from the <tt class="docutils literal"><span class="pre">Resource</span></tt> interface (the latter only for
+the <tt class="docutils literal"><span class="pre">AdcReadClientC</span></tt> and <tt class="docutils literal"><span class="pre">AdcReadStreamClientC</span></tt>). The first task is solved
+with the help of the <tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface which is used by the HIL
+implementation to retrieve a client's ADC configuration.  The second task MAY
+be performed by the following library components: <tt class="docutils literal"><span class="pre">ArbitratedReadC</span></tt>, and
+<tt class="docutils literal"><span class="pre">ArbitratedReadStreamC</span></tt> (in tinyos-2.x/tos/system) - please refer to the
+Atmel Atmega 128 HAL implementation (in tinyos-2.x/tos/chips/atm128/adc) for an
+example.  Note that since the <tt class="docutils literal"><span class="pre">ReadNow</span></tt> interface is always provided in
+conjunction with a <tt class="docutils literal"><span class="pre">Resource</span></tt> interface the HIL implementation does not have
+to perform the ADC resource reservation for an <tt class="docutils literal"><span class="pre">AdcReadNowClientC</span></tt>, but may
+simply forward an instance of the <tt class="docutils literal"><span class="pre">Resource</span></tt> interface from the HAL to the
+<tt class="docutils literal"><span class="pre">AdcReadNowClientC</span></tt>.</p>
+<p>The typical sequence of events is as follows: when a client requests data
+through the <tt class="docutils literal"><span class="pre">Read</span></tt> or <tt class="docutils literal"><span class="pre">ReadStream</span></tt> interface the HIL will request access to
+the HAL using the <tt class="docutils literal"><span class="pre">Resource</span></tt> interface.  After the HIL has been granted
+access, it will &quot;pull&quot; the client's ADC configuration using the
+<tt class="docutils literal"><span class="pre">AdcConfigure</span></tt> interface and translate the client's <tt class="docutils literal"><span class="pre">Read</span></tt> or
+<tt class="docutils literal"><span class="pre">ReadStream</span></tt> command to a chip-specific HAL command. Once the HIL is
+signalled the conversion result(s) from the HAL it releases the ADC through the
+<tt class="docutils literal"><span class="pre">Resource</span></tt> interface and signals the conversion result(s) to the client
+though the <tt class="docutils literal"><span class="pre">Read</span></tt> or <tt class="docutils literal"><span class="pre">ReadStream</span></tt> interface.  When a client requests data
+through the <tt class="docutils literal"><span class="pre">ReadNow</span></tt> interface the HIL translates the client's command to
+the chip-specific HAL command without using the <tt class="docutils literal"><span class="pre">Resource</span></tt> interface (it may
+check ownership of the client through the <tt class="docutils literal"><span class="pre">ArbiterInfo</span></tt> interface - this
+check can also be done in the HAL implementation). Once the HIL is signalled
+the conversion result(s) it forwards it to the respective <tt class="docutils literal"><span class="pre">ReadNow</span></tt> client.</p>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">6. Implementation</a></h1>
+<div class="section">
+<h2><a id="testadc-application" name="testadc-application">TestAdc application</a></h2>
+<p>An ADC HIL test application can be found in <tt class="docutils literal"><span class="pre">tinyos-2.x/apps/tests/TestAdc</span></tt>.
+Note that this application instantiates generic DemoSensorC, DemoSensorStreamC
+and DemoSensorNowC components (see <a class="citation-reference" href="#tep114" id="id19" name="id19">[TEP114]</a>) and assumes that these components
+are actually wired to an ADC HIL. Please refer to
+<tt class="docutils literal"><span class="pre">tinyos-2.x/apps/tests/TestAdc/README.txt</span></tt> for more information.</p>
+</div>
+<div class="section">
+<h2><a id="haa-on-the-msp430-and-atmega-128" name="haa-on-the-msp430-and-atmega-128">HAA on the MSP430 and Atmega 128</a></h2>
+<p>The implementation of the ADC12 stack on the MSP430 can be found in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/msp430/adc12</span></tt>:</p>
+<blockquote>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">HplAdc12P.nc</span></tt> is the HPL implementation</li>
+<li><tt class="docutils literal"><span class="pre">Msp430Adc12P.nc</span></tt> is the HAL implementation</li>
+<li><tt class="docutils literal"><span class="pre">AdcP.nc</span></tt> is the HIL implementation</li>
+<li><tt class="docutils literal"><span class="pre">AdcReadClientC.nc</span></tt>, <tt class="docutils literal"><span class="pre">AdcReadNowClientC.nc</span></tt> and
+<tt class="docutils literal"><span class="pre">AdcReadStreamClientC.nc</span></tt> provide virtualized access to the HIL</li>
+<li>the use of DMA or the reference voltage generator and the
+HAL virtualization components are explained in <tt class="docutils literal"><span class="pre">README.txt</span></tt></li>
+</ul>
+</blockquote>
+<p>The Atmel Atmega 128 ADC implementation can be found in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/atm128/adc</span></tt>:</p>
+<blockquote>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">HplAtm128AdcC.nc</span></tt> is the HPL implementation</li>
+<li><tt class="docutils literal"><span class="pre">Atm128AdcP.nc</span></tt> is the HAL implementation</li>
+<li><tt class="docutils literal"><span class="pre">AdcP.nc</span></tt>, <tt class="docutils literal"><span class="pre">WireAdcP.nc</span></tt> and the library components for arbitrating
+'Read', 'ReadNow' and 'ReadStream', <tt class="docutils literal"><span class="pre">ArbitratedReadC</span></tt> and
+<tt class="docutils literal"><span class="pre">ArbitratedReadStreamC</span></tt> (in <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/system</span></tt>), realize
+the HIL</li>
+<li><tt class="docutils literal"><span class="pre">AdcReadClientC.nc</span></tt>, <tt class="docutils literal"><span class="pre">AdcReadNowClientC.nc</span></tt> and
+<tt class="docutils literal"><span class="pre">AdcReadStreamClientC.nc</span></tt> provide virtualized access to the HIL</li>
+</ul>
+</blockquote>
+</div>
+</div>
+<div class="section">
+<h1><a id="appendix-a-hardware-differences-between-platforms" name="appendix-a-hardware-differences-between-platforms">Appendix A: Hardware differences between platforms</a></h1>
+<p>The following table compares the characteristics of two microcontrollers
+commonly used in TinyOS platforms:</p>
+<table border="1" class="docutils">
+<colgroup>
+<col width="34%" />
+<col width="34%" />
+<col width="32%" />
+</colgroup>
+<thead valign="bottom">
+<tr><th class="head">&nbsp;</th>
+<th class="head">Atmel Atmega 128</th>
+<th class="head">TI MSP430 ADC12</th>
+</tr>
+</thead>
+<tbody valign="top">
+<tr><td>Resolution</td>
+<td>10-bit</td>
+<td>12-bit</td>
+</tr>
+<tr><td>channels</td>
+<td><ul class="first last simple">
+<li>8 multiplexed
+external channels</li>
+<li>16 differential
+voltage input
+combinations</li>
+<li>2 differential
+inputs with gain
+amplification</li>
+</ul>
+</td>
+<td><ul class="first last simple">
+<li>8 individually
+configurable
+external channels</li>
+<li>internal channels
+(AVcc, temperature,
+reference voltages)</li>
+</ul>
+</td>
+</tr>
+<tr><td>internal reference
+voltage</td>
+<td>2.56V</td>
+<td>1.5V or 2.5V</td>
+</tr>
+<tr><td>conversion reference</td>
+<td><ul class="first last simple">
+<li>positive terminal:
+AVcc or 2.56V  or
+AREF (external)</li>
+<li>negative terminal:
+GND</li>
+</ul>
+</td>
+<td><blockquote class="first">
+individually
+selectable per
+channel:</blockquote>
+<ul class="last simple">
+<li>AVcc and AVss</li>
+<li>Vref+ and AVss</li>
+<li>Veref+ and AVss</li>
+<li>AVcc and (Vref- or
+Veref-)</li>
+<li>AVref+ and (Vref-
+or Veref-)</li>
+<li>Veref+ and (Vref-
+or Veref-)</li>
+</ul>
+</td>
+</tr>
+<tr><td>conversion modes</td>
+<td><ul class="first last simple">
+<li>single channel
+conversion mode</li>
+<li>free running mode
+(channels and
+reference voltages
+can be switched
+between samples)</li>
+</ul>
+</td>
+<td><ul class="first last simple">
+<li>single conversion
+mode</li>
+<li>repeat single
+conversion mode</li>
+<li>sequence mode
+(sequence &lt;= 16
+channels)</li>
+<li>repeat sequence
+mode</li>
+</ul>
+</td>
+</tr>
+<tr><td>conversion clock
+source</td>
+<td>clkADC with prescaler</td>
+<td>ACLK, MCLK, SMCLK or
+ADC-oscillator (5MHz)
+with prescaler
+respectively</td>
+</tr>
+<tr><td>sample-hold-time</td>
+<td>1.5 clock cycles
+(fixed)</td>
+<td>selectable values
+from 4 to 1024 clock
+cycles</td>
+</tr>
+<tr><td>conversion triggering</td>
+<td>by software</td>
+<td>by software or timers</td>
+</tr>
+<tr><td>conversion during
+sleep mode possible</td>
+<td>yes</td>
+<td>yes</td>
+</tr>
+<tr><td>interrupts</td>
+<td>after each conversion</td>
+<td>after single or
+sequence conversion</td>
+</tr>
+</tbody>
+</table>
+</div>
+<div class="section">
+<h1><a id="appendix-b-a-hal-representation-msp430-adc12" name="appendix-b-a-hal-representation-msp430-adc12">Appendix B: a HAL representation: MSP430 ADC12</a></h1>
+<p>This section shows the HAL signature for the ADC12 of the TI MSP430 MCU. It
+reflects the four MSP430 ADC12 conversion modes as it lets a client sample an
+ADC channel once (&quot;Single-channel-single-conversion&quot;) or repeatedly
+(&quot;Repeat-single-channel&quot;), multiple times (&quot;Sequence-of-channels&quot;) or multiple
+times repeatedly (&quot;Repeat-sequence-of-channels&quot;). In contrast to the single
+channel conversion modes the sequence conversion modes trigger a single
+interrupt after multiple samples and thus enable high-frequency sampling. The
+<tt class="docutils literal"><span class="pre">DMAExtension</span></tt> interface is used to reset the state machine when the DMA is
+responsible for data transfer (managed in an exterior component):</p>
+<pre class="literal-block">
+configuration Msp430Adc12P
+{
+  provides {
+    interface Resource[uint8_t id];
+    interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id];
+    interface AsyncStdControl as DMAExtension[uint8_t id];
+  }
+}
+
+interface Msp430Adc12SingleChannel
+{
+  async command error_t configureSingle(const msp430adc12_channel_config_t *config);
+  async command error_t configureSingleRepeat(const msp430adc12_channel_config_t *config, uint16_t jiffies);
+  async command error_t configureMultiple( const msp430adc12_channel_config_t *config, uint16_t buffer[], uint16_t numSamples, uint16_t jiffies);
+  async command error_t configureMultipleRepeat(const msp430adc12_channel_config_t *config, uint16_t buffer[], uint8_t numSamples, uint16_t jiffies);
+  async command error_t getData();
+  async event error_t singleDataReady(uint16_t data);
+  async event uint16_t* multipleDataReady(uint16_t buffer[], uint16_t numSamples);
+}
+
+typedef struct
+{
+  unsigned int inch: 4;            // input channel
+  unsigned int sref: 3;            // reference voltage
+  unsigned int ref2_5v: 1;         // reference voltage level
+  unsigned int adc12ssel: 2;       // clock source sample-hold-time
+  unsigned int adc12div: 3;        // clock divider sample-hold-time
+  unsigned int sht: 4;             // sample-hold-time
+  unsigned int sampcon_ssel: 2;    // clock source sampcon signal
+  unsigned int sampcon_id: 2;      // clock divider sampcon signal
+} msp430adc12_channel_config_t;
+</pre>
+</div>
+<div class="section">
+<h1><a id="appendix-c-a-hil-representation-msp430-adc12" name="appendix-c-a-hil-representation-msp430-adc12">Appendix C: a HIL representation: MSP430 ADC12</a></h1>
+<p>The signature of the AdcReadClientC component for the MSP430 ADC12 is as
+follows:</p>
+<pre class="literal-block">
+generic configuration AdcReadClientC() {
+  provides interface Read&lt;uint16_t&gt;;
+  uses interface AdcConfigure&lt;const msp430adc12_channel_config_t*&gt;;
+}
+</pre>
+<table class="docutils citation" frame="void" id="tep1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="tep1">[TEP1]</a></td><td>TEP 1: TEP Structure and Keywords.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep2">[TEP2]</a></td><td><em>(<a class="fn-backref" href="#id2">1</a>, <a class="fn-backref" href="#id6">2</a>, <a class="fn-backref" href="#id7">3</a>, <a class="fn-backref" href="#id8">4</a>)</em> TEP 2: Hardware Abstraction Architecture.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep108" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep108">[TEP108]</a></td><td><em>(<a class="fn-backref" href="#id13">1</a>, <a class="fn-backref" href="#id14">2</a>, <a class="fn-backref" href="#id15">3</a>, <a class="fn-backref" href="#id17">4</a>)</em> TEP 108: Resource Arbitration.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep109" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="tep109">[TEP109]</a></td><td>TEP 109: Sensor Boards.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep114" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep114">[TEP114]</a></td><td><em>(<a class="fn-backref" href="#id4">1</a>, <a class="fn-backref" href="#id5">2</a>, <a class="fn-backref" href="#id9">3</a>, <a class="fn-backref" href="#id10">4</a>, <a class="fn-backref" href="#id11">5</a>, <a class="fn-backref" href="#id12">6</a>, <a class="fn-backref" href="#id16">7</a>, <a class="fn-backref" href="#id18">8</a>, <a class="fn-backref" href="#id19">9</a>)</em> TEP 114: SIDs: Source and Sink Independent Drivers.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
diff --git a/doc/html/tep102.html b/doc/html/tep102.html
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+
+th.docinfo-name, th.field-name {
+  font-weight: bold ;
+  text-align: left ;
+  white-space: nowrap;
+  }
+
+h1 tt, h2 tt, h3 tt, h4 tt, h5 tt, h6 tt {
+  font-size: 100% }
+
+tt {}
+
+ul.auto-toc {
+  list-style-type: none }
+
+</style>
+</head>
+<body>
+<div class="document" id="timers">
+<h1 class="title">Timers</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">102</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Cory Sharp, Martin Turon, David Gay</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited.  This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This TEP proposes a Timer design that supports common timing
+requirements both in precision and width across common hardware
+configurations.  This TEP focuses on aligning the Timer abstraction
+with the three-layer Hardware Abstraction Architecture (HAA).</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>Most microcontrollers offer a rich timer system, with features like:</p>
+<ul class="simple">
+<li>several counters, possibly of different widths, with multiple clocking options</li>
+<li>one or more compare registers for each counter, which can trigger
+interrupts, changes to output pins and changes to the counter value</li>
+<li>capture of the time of input pin changes</li>
+</ul>
+<p>The interested reader can refer to Appendix A for a brief overview of
+the timer hardware on some current TinyOS platforms.</p>
+<p>TinyOS does not attempt to capture all this diversity in a
+platform-independent fashion. Instead, following the principles of the
+HAA[_tep2], each microcontroller should expose all this functionality
+via components and interfaces at the HPL and, where appropriate, HAL levels.
+However, two aspects of timers are sufficiently common and important
+that they should be made available in a well-defined way: measuring time,
+and triggering (possibly repeating) events at specific times. The rest
+of this TEP specifies:</p>
+<ul class="simple">
+<li>a set of platform-independent interfaces for counting time and triggering
+events (<a class="reference" href="#interfaces">2. Interfaces</a>)</li>
+<li>guidelines on how each microcontroller's HAL SHOULD expose its timer hardware
+in terms of the above interfaces (<a class="reference" href="#hal-guidelines">3. HAL guidelines</a>)</li>
+<li>what components a microcontroller's timer HIL MUST implement
+(<a class="reference" href="#hil-requirements">4. HIL requirements</a>)</li>
+<li>a set of utility components whose use simplifies building the components
+specified by the HAL guidelines and HIL requirements (<a class="reference" href="#utility-components">5. Utility components</a>)</li>
+</ul>
+<p>This TEP ends with appendices documenting, as an example, the mica2
+timer subsystem implementation.</p>
+</div>
+<div class="section">
+<h1><a id="interfaces" name="interfaces">2. Interfaces</a></h1>
+<p>Before presenting the interfaces (2.2), we start with a general
+discussion of the issues of precision, width and accuracy in
+timer interfaces (2.1).</p>
+<div class="section">
+<h2><a id="precision-width-and-accuracy" name="precision-width-and-accuracy">2.1 Precision, Width and Accuracy</a></h2>
+<p>Three fundamental properties of timers are <em>precision</em>, <em>width</em> and
+<em>accuracy</em>.</p>
+<p>Examples of precision are millisecond, a cycle of a 32kHz clock, and
+microseconds.  All precisions presented in this TEP are in &quot;binary&quot;
+units with respect to one second.  That is, one second contains 1024
+binary milliseconds, 32768 32kHz ticks, or 1048576 microseconds.
+This TEP emphasizes millisecond and 32kHz tick precisions while
+reasonably accommodating other precisions. The use of &quot;binary&quot; units
+is motivated by the common availability of hardware clocks driven
+by a 32768Hz crystal.</p>
+<p>Examples of widths are 8-bit, 16-bit, 32-bit, and 64-bit.  The width
+for timer interfaces and components SHOULD be 32-bits.  This TEP
+emphasizes 32-bit widths while reasonably accommodating other widths -
+a particular platform may have good reasons not to expose a 32-bit
+interface.</p>
+<p>Accuracy reflects how closely a component conforms to the precision it
+claims to provide. Accuracy is affected by issues such as clock drift (much
+higher for internal vs crystal oscillators) and hardware limitations. As an
+example of hardware limitations, a mica2 clocked at 7.37MHz cannot offer an
+exact binary microsecond timer -- the closest it can come is 7.37MHz/8. Rather
+than introduce a plethora of precisions, we believe it is often best to
+pick the existing precision closest to what can be provided, along with
+appropriate documentation. However, the accuracy MUST remain reasonable:
+for instance, it would be inappropriate to claim that a millisecond timer
+is a 32kHz timer.</p>
+<p>This TEP parameterizes all interfaces by precision and some
+interfaces by width.  This intentionally makes similar timer
+interfaces with different precision or width mutually incompatible.
+It also allows user code to clearly express and understand the
+precision and width for a given timer interface. Accuracy is not
+reflected in the interface type.</p>
+<p>Precision is expressed as a dummy type -- TMilli, T32khz, and
+TMicro -- written in the standard Timer.h header like this:</p>
+<pre class="literal-block">
+typedef struct { int notUsed; } TMilli; // 1024 ticks per second
+typedef struct { int notUsed; } T32khz; // 32768 ticks per second
+typedef struct { int notUsed; } TMicro; // 1048576 ticks per second
+</pre>
+<p>Note that the precision names are expressed as either frequency or
+period, whichever is convenient.</p>
+</div>
+<div class="section">
+<h2><a id="timer-interfaces" name="timer-interfaces">2.2 Timer interfaces</a></h2>
+<p>This TEP proposes these timer interfaces:</p>
+<pre class="literal-block">
+interface Counter&lt; precision_tag, size_type &gt;
+interface Alarm&lt; precision_tag, size_type &gt;
+interface BusyWait&lt; precision_tag, size_type &gt;
+interface LocalTime&lt; precision_tag &gt;
+interface Timer&lt; precision_tag &gt;
+</pre>
+<p>The LocalTime and Timer interfaces are used primarily by user
+applications and use a fixed width of 32-bits.  The Alarm, BusyWait,
+and Counter interfaces are used by the TinyOS timer system and
+advanced user components.</p>
+</div>
+<div class="section">
+<h2><a id="counter" name="counter">Counter</a></h2>
+<p>The Counter interface returns the current time and provides commands
+and an event for managing overflow conditions.  These overflow
+commands and events are necessary for properly deriving larger width
+Counters from smaller widths.</p>
+<pre class="literal-block">
+interface Counter&lt;precision_tag,size_type&gt;
+{
+  async command size_type get();
+  async command bool isOverflowPending();
+  async command void clearOverflow();
+  async event void overflow();
+}
+</pre>
+<dl class="docutils">
+<dt>get()</dt>
+<dd>return the current time.</dd>
+<dt>isOverflowPending()</dt>
+<dd>return TRUE if the overflow flag is set for this counter, i.e., if and
+only if an overflow event will occur after the outermost atomic
+block exits.  Return FALSE otherwise.  This command only returns the
+state of the overflow flag and causes no side effect.</dd>
+<dt>clearOverflow()</dt>
+<dd>cancel the pending overflow event clearing the overflow flag.</dd>
+<dt>overflow()</dt>
+<dd>signals that an overflow in the current time.  That is, the current
+time has wrapped around from its maximum value to zero.</dd>
+</dl>
+</div>
+<div class="section">
+<h2><a id="alarm" name="alarm">Alarm</a></h2>
+<p>Alarm components are extensions of Counters that signal an event
+when their compare register detects the alarm time has been hit.
+All commands and events of the Alarm interface are asynchronous (or
+in &quot;interrupt context&quot;).  The Alarm interface provides a set of
+&quot;basic&quot; commands for common usage and provides a set of &quot;extended&quot;
+commands for advanced use.</p>
+<pre class="literal-block">
+interface Alarm&lt;precision_tag,size_type&gt;
+{
+  // basic interface
+  async command void start( size_type dt );
+  async command void stop();
+  async event void fired();
+
+  // extended interface
+  async command bool isRunning();
+  async command void startAt( size_type t0, size_type dt );
+  async command size_type getNow();
+  async command size_type getAlarm();
+}
+</pre>
+<dl class="docutils">
+<dt>start(dt)</dt>
+<dd>cancel any previously running alarm and set to fire in dt time units
+from the time of invocation.  The alarm will only fire once then
+stop.</dd>
+<dt>stop()</dt>
+<dd>cancel any previously running alarm.</dd>
+<dt>fired()</dt>
+<dd>signals that the alarm has expired.</dd>
+<dt>isRunning()</dt>
+<dd>return TRUE if the alarm has been started and has not been cancelled
+or has not yet fired.  FALSE is returned otherwise.</dd>
+</dl>
+<p>startAt(t0,dt)</p>
+<blockquote>
+<p>cancel any previously running alarm and set to fire at time t1 =
+t0+dt.  This form allows a delay to be anchored to some time t0 taken
+before the invocation of startAt.  The timer subsystem uses this form
+internally, to be able to use of the full width of an alarm while also
+detecting when a short alarm elapses prematurely.</p>
+<p>The time <tt class="docutils literal"><span class="pre">t0</span></tt> is always assumed to be in the past. A value of <tt class="docutils literal"><span class="pre">t0</span></tt>
+numerically greater than the current time (returned by <tt class="docutils literal"><span class="pre">getNow()</span></tt>)
+represents a time from before the last wraparound.</p>
+</blockquote>
+<dl class="docutils">
+<dt>getNow()</dt>
+<dd>return the current time in the precision and width of the alarm.</dd>
+<dt>getAlarm()</dt>
+<dd>return the time the currently running alarm will fire or the time
+that the previously running alarm was set to fire.  getAlarm can
+be used with startAt to set an alarm from the previous alarm time,
+as in startAt(getAlarm(),dt).  This pattern is used within the
+fired() event to construct periodic alarms.</dd>
+</dl>
+</div>
+<div class="section">
+<h2><a id="busywait" name="busywait">BusyWait</a></h2>
+<p>The BusyWait interface allows for very short synchronous delays.
+BusyWait should be used sparingly and when an Alarm would not be
+reasonably efficient or accurate.  The BusyWait interface replaces
+the TOSH_uwait macro from TinyOS 1.x.</p>
+<p>BusyWait blocks for no less than the specified amount of time.  No
+explicit upper bound is imposed on the enacted delay, though it is
+expected that the underlying implementation spins in a busy loop until
+the specified amount of time has elapsed.</p>
+<pre class="literal-block">
+interface BusyWait&lt;precision_tag,size_type&gt;
+{
+  async command void wait( size_type dt );
+}
+</pre>
+<dl class="docutils">
+<dt>wait(dt)</dt>
+<dd>block until at least dt time units have elapsed</dd>
+</dl>
+</div>
+<div class="section">
+<h2><a id="localtime" name="localtime">LocalTime</a></h2>
+<p>The LocalTime interface exposes a 32-bit counter without overflow
+utilities.  This is primarily for application code that does not
+care about overflow conditions.</p>
+<pre class="literal-block">
+interface LocalTime&lt;precision_tag&gt;
+{
+  async command uint32_t get();
+}
+</pre>
+<dl class="docutils">
+<dt>get()</dt>
+<dd>return the current time.</dd>
+</dl>
+</div>
+<div class="section">
+<h2><a id="timer" name="timer">Timer</a></h2>
+<p>All commands and events of the Timer interface are synchronous (or
+in &quot;task context&quot;).  The Timer interface provides a set of &quot;basic&quot;
+commands for common usage and provides a set of &quot;extended&quot; commands
+for advanced use.  The Timer interface allows for periodic events.</p>
+<pre class="literal-block">
+interface Timer&lt;precision_tag&gt;
+{
+  // basic interface
+  command void startPeriodic( uint32_t dt );
+  command void startOneShot( uint32_t dt );
+  command void stop();
+  event void fired();
+
+  // extended interface
+  command bool isRunning();
+  command bool isOneShot();
+  command void startPeriodicAt( uint32_t t0, uint32_t dt );
+  command void startOneShotAt( uint32_t t0, uint32_t dt );
+  command uint32_t getNow();
+  command uint32_t gett0();
+  command uint32_t getdt();
+}
+</pre>
+<dl class="docutils">
+<dt>startPeriodic(dt)</dt>
+<dd>cancel any previously running timer and set to fire in dt time units
+from the time of invocation.  The timer will fire periodically every
+dt time units until stopped.</dd>
+<dt>startOneShot(dt)</dt>
+<dd>cancel any previously running timer and set to fire in dt time units
+from the time of invocation.  The timer will only fire once then
+stop.</dd>
+<dt>stop()</dt>
+<dd>cancel any previously running timer.</dd>
+<dt>fired()</dt>
+<dd>signals that the timer has expired (one-shot) or repeated (periodic).</dd>
+<dt>isRunning()</dt>
+<dd>return TRUE if the timer has been started and has not been cancelled
+and has not fired for the case of one-shot timers.  Once a periodic
+timer is started, isRunning will return TRUE until it is cancelled.</dd>
+<dt>isOneShot()</dt>
+<dd>return TRUE if the timer is a one-shot timer.  Return FALSE
+otherwise if the timer is a periodic timer.</dd>
+<dt>startPeriodicAt(t0,dt)</dt>
+<dd><p class="first">cancel any previously running timer and set to fire at time t1 =
+t0+dt.  The timer will fire periodically every dt time units until
+stopped.</p>
+<p class="last">As with alarms, the time <tt class="docutils literal"><span class="pre">t0</span></tt> is always assumed to be in the past. A
+value of <tt class="docutils literal"><span class="pre">t0</span></tt> numerically greater than the current time (returned by
+<tt class="docutils literal"><span class="pre">getNow()</span></tt>) represents a time from before the last wraparound.</p>
+</dd>
+<dt>startOneShotAt(t0,dt)</dt>
+<dd><p class="first">cancel any previously running timer and set to fire at time t1 =
+t0+dt.  The timer will fire once then stop.</p>
+<p class="last"><tt class="docutils literal"><span class="pre">t0</span></tt> is as in <tt class="docutils literal"><span class="pre">startPeriodicAt</span></tt>.</p>
+</dd>
+<dt>getNow()</dt>
+<dd>return the current time in the precision and width of the timer.</dd>
+<dt>gett0()</dt>
+<dd>return the time anchor for the previously started timer or the time
+of the previous event for periodic timers.</dd>
+<dt>getdt()</dt>
+<dd>return the delay or period for the previously started timer.</dd>
+</dl>
+</div>
+</div>
+<div class="section">
+<h1><a id="hal-guidelines" name="hal-guidelines">3. HAL guidelines</a></h1>
+<p>Platforms SHOULD expose their relevant timing capabilities using
+standard Alarm and Counter interfaces.  The design pattern presented
+here defines a component naming convention to allow platform
+independent access to particular Alarms and Counters if they exist
+and to cause compile errors if they do not.</p>
+<p>A platform specific hardware timer with precision ${P} and width
+${W} SHOULD be exposed as these two conventional Counter and Alarm
+components:</p>
+<pre class="literal-block">
+configuration Counter${P}${W}C
+{
+  provides interface Counter&lt; T${P}, uint${W}_t &gt;;
+}
+
+generic configuration Alarm${P}${W}C()
+{
+  provides interface Alarm&lt; T${P}, uint${W}_t &gt;;
+}
+</pre>
+<p>Instantiating an Alarm${P}${W}C component provides a new and independent
+Alarm.  If the platform presents a limited number of Alarm resources,
+then allocating more Alarms in an application than are available for the
+platform SHOULD produce a compile-time error.  See Appendices B and C
+for an example of how to make allocatable Alarms that are each
+implemented on independent hardware timers.</p>
+<p>For example, if a platform has an 8-bit 32kHz counter and three
+8-bit 32kHz alarms, then the Counter and Alarm interfaces for
+${P}=32khz and ${W}=16 are:</p>
+<pre class="literal-block">
+configuration Counter32khz8C
+{
+  provides interface Counter&lt; T32khz, uint8_t &gt;;
+}
+
+generic configuration Alarm32khz8C()
+{
+  provides interface Alarm&lt; T32khz, uint8_t &gt;;
+}
+</pre>
+<p>This pattern MAY be used to define components for the platform that
+are mutually incompatible in a single application.  Incompatible
+components SHOULD produce compile-time errors when compiled
+together.</p>
+</div>
+<div class="section">
+<h1><a id="hil-requirements" name="hil-requirements">4. HIL requirements</a></h1>
+<p>The following component MUST be provided on all platforms</p>
+<pre class="literal-block">
+HilTimerMilliC
+BusyWaitMicroC
+</pre>
+<p>Both of these components use &quot;binary&quot; units, i.e., 1/1024s for
+HilTimerMilliC and 1/1048576s for BusyWaitMicroC. Components using
+other precisions (e.g., regular, non-binary milliseconds) MAY also be
+provided.</p>
+<div class="section">
+<h2><a id="hiltimermillic" name="hiltimermillic">HilTimerMilliC</a></h2>
+<pre class="literal-block">
+configuration HilTimerMilliC
+{
+  provides interface Init;
+  provides interface Timer&lt;TMilli&gt; as TimerMilli[ uint8_t num ];
+  provides interface LocalTime&lt;TMilli&gt;;
+}
+</pre>
+<p>A new timer is allocated using unique(UQ_TIMER_MILLI) to obtain a
+new unique timer number.  This timer number is used to index the
+TimerMilli parameterised interface.  UQ_TIMER_MILLI is defined in
+Timer.h.  HilTimerMilliC is used by the LocalTimeMilliC component and the
+TimerMilliC generic component, both found in <tt class="docutils literal"><span class="pre">tos/system/</span></tt></p>
+</div>
+<div class="section">
+<h2><a id="busywaitmicroc" name="busywaitmicroc">BusyWaitMicroC</a></h2>
+<pre class="literal-block">
+configuration BusyWaitMicroC
+{
+  provides interface BusyWait&lt;TMicro,uint16_t&gt;;
+}
+</pre>
+<p>BusyWaitMicroC allows applications to busy-wait for a number of
+microseconds. Its use should be restricted to situations where the
+delay is small and setting a timer or alarm would be impractical,
+inefficient or insufficiently precise.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="utility-components" name="utility-components">5. Utility components</a></h1>
+<p>A number of platform independent generic components are provided to
+help implementers and advanced users of the TinyOS timer system:</p>
+<ul class="simple">
+<li>AlarmToTimerC</li>
+<li>BusyWaitCounterC</li>
+<li>CounterToLocalTimeC</li>
+<li>TransformAlarmC</li>
+<li>TransformCounterC</li>
+<li>VirtualizeTimerC</li>
+</ul>
+<p>Appendices B and C show how these can be used to help implement
+the timer HAL and HIL.</p>
+<div class="section">
+<h2><a id="alarmtotimerc" name="alarmtotimerc">AlarmToTimerC</a></h2>
+<p>AlarmToTimerC converts a 32-bit Alarm to a Timer.</p>
+<pre class="literal-block">
+generic component AlarmToTimerC( typedef precision_tag )
+{
+  provides interface Timer&lt;precision_tag&gt;;
+  uses interface Alarm&lt;precision_tag,uint32_t&gt;;
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="busywaitcounterc" name="busywaitcounterc">BusyWaitCounterC</a></h2>
+<p>BusyWaitCounterC uses a Counter to block until a specified amount of
+time elapses.</p>
+<pre class="literal-block">
+generic component BusyWaitC( typedef precision_tag,
+  typedef size_type &#64;integer() )
+{
+  provides interface BusyWait&lt;precision_tag,size_type&gt;;
+  uses interface Counter&lt;precision_tag,size_type&gt;;
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="countertolocaltimec" name="countertolocaltimec">CounterToLocalTimeC</a></h2>
+<p>CounterToLocalTimeC converts from a 32-bit Counter to LocalTime.</p>
+<pre class="literal-block">
+generic component CounterToLocalTimeC( precision_tag )
+{
+  provides interface LocalTime&lt;precision_tag&gt;;
+  uses interface Counter&lt;precision_tag,uint32_t&gt;;
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="transformalarmc" name="transformalarmc">TransformAlarmC</a></h2>
+<p>TransformAlarmC decreases precision and/or widens an Alarm.  An
+already widened Counter component is used to help.</p>
+<pre class="literal-block">
+generic component TransformAlarmC(
+  typedef to_precision_tag,
+  typedef to_size_type &#64;integer(),
+  typedef from_precision_tag,
+  typedef from_size_type &#64;integer(),
+  uint8_t bit_shift_right )
+{
+  provides interface Alarm&lt;to_precision_tag,to_size_type&gt; as Alarm;
+  uses interface Counter&lt;to_precision_tag,to_size_type&gt; as Counter;
+  uses interface Alarm&lt;from_precision_tag,from_size_type&gt; as AlarmFrom;
+}
+</pre>
+<p>to_precision_tag and to_size_type describe the final precision and
+final width for the provided Alarm.  from_precision_tag and
+from_size_type describe the precision and width for the source
+AlarmFrom.  bit_shift_right describes the bit-shift necessary to
+convert from the used precision to the provided precision.</p>
+<p>For instance to convert from an Alarm&lt;T32khz,uint16_t&gt; to an
+Alarm&lt;TMilli,uint32_t&gt;, the following TransformAlarmC would be
+created:</p>
+<pre class="literal-block">
+new TransformAlarmC( TMilli, uint32_t, T32khz, uint16_t, 5 )
+</pre>
+<p>It is the exclusive responsibility of the developer using
+TransformAlarmC to ensure that all five of its arguments are self
+consistent.  No compile errors are generated if the parameters
+passed to TransformAlarmC are inconsistent.</p>
+</div>
+<div class="section">
+<h2><a id="transformcounterc" name="transformcounterc">TransformCounterC</a></h2>
+<p>TransformCounterC decreases precision and/or widens a Counter.</p>
+<pre class="literal-block">
+generic component TransformCounterC(
+  typedef to_precision_tag,
+  typedef to_size_type &#64;integer(),
+  typedef from_precision_tag,
+  typedef from_size_type &#64;integer(),
+  uint8_t bit_shift_right,
+  typedef upper_count_type &#64;integer() )
+{
+  provides interface Counter&lt;to_precision_tag,to_size_type&gt; as Counter;
+  uses interface Counter&lt;from_precision_tag,from_size_type&gt; as CounterFrom;
+}
+</pre>
+<p>to_precision_tag and to_size_type describe the final precision and
+final width for the provided Counter.  from_precision_tag and
+from_size_type describe the precision and width for the source
+CounterFrom.  bit_shift_right describes the bit-shift necessary to
+convert from the used precision to the provided precision.
+upper_count_type describes the numeric type used to store the
+additional counter bits.  upper_count_type MUST be a type with width
+greater than or equal to the additional bits in to_size_type plus
+bit_shift_right.</p>
+<p>For instance to convert from a Counter&lt;T32khz,uint16_t&gt; to a
+Counter&lt;TMilli,uint32_t&gt;, the following TransformCounterC would be
+created:</p>
+<pre class="literal-block">
+new TransformCounterC( TMilli, uint32_t, T32khz, uint16_t, 5, uint32_t )
+</pre>
+</div>
+<div class="section">
+<h2><a id="virtualizetimerc" name="virtualizetimerc">VirtualizeTimerC</a></h2>
+<p>VirtualizeTimerC uses a single Timer to create up to 255 virtual
+timers.</p>
+<pre class="literal-block">
+generic component VirtualizeTimerC( typedef precision_tag, int max_timers )
+{
+  provides interface Init;
+  provides interface Timer&lt;precision_tag&gt; as Timer[ uint8_t num ];
+  uses interface Timer&lt;precision_tag&gt; as TimerFrom;
+}
+</pre>
+</div>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">6. Implementation</a></h1>
+<p>The definition of the HIL interfaces are found in <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/lib/timer</span></tt>:</p>
+<blockquote>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">Alarm.nc</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">BusyWait.nc</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">Counter.nc</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">LocalTime.nc</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">Timer.h</span></tt> defines precision tags and strings for unique()</li>
+<li><tt class="docutils literal"><span class="pre">Timer.nc</span></tt></li>
+</ul>
+</blockquote>
+<p>The implementation of the utility components are also found in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/lib/timer</span></tt>:</p>
+<blockquote>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">AlarmToTimerC.nc</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">BusyWaitCounterC.nc</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">CounterToLocalTimeC.nc</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">TransformAlarmC.nc</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">TransformCounterC.nc</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">VirtualizeAlarmC.nc</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">VirtualizeTimerC.nc</span></tt></li>
+</ul>
+</blockquote>
+<p>The implementation of timers for the MSP430 is in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/msp430/timer</span></tt>:</p>
+<blockquote>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">Alarm32khz16C.nc</span></tt> is generic and provides a new <tt class="docutils literal"><span class="pre">Alarm&lt;T32khz,uint16_t&gt;</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">Alarm32khz32C.nc</span></tt> is generic and provides a new <tt class="docutils literal"><span class="pre">Alarm&lt;T32khz,uint32_t&gt;</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">AlarmMilli16C.nc</span></tt> is generic and provides a new <tt class="docutils literal"><span class="pre">Alarm&lt;TMilli,uint16_t&gt;</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">AlarmMilli32C.nc</span></tt> is generic and provides a new <tt class="docutils literal"><span class="pre">Alarm&lt;TMilli,uint32_t&gt;</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">BusyWait32khzC.nc</span></tt> provides <tt class="docutils literal"><span class="pre">BusyWait&lt;T32khz,uint16_t&gt;</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">BusyWaitMicroC.nc</span></tt> provides <tt class="docutils literal"><span class="pre">BusyWait&lt;TMicro,uint16_t&gt;</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">Counter32khz16C.nc</span></tt> provides <tt class="docutils literal"><span class="pre">Counter&lt;T32khz,uint16_t&gt;</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">Counter32khz32C.nc</span></tt> provides <tt class="docutils literal"><span class="pre">Counter&lt;T32khz,uint32_t&gt;</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">CounterMilli16C.nc</span></tt> provides <tt class="docutils literal"><span class="pre">Counter&lt;TMilli,uint16_t&gt;</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">CounterMilli32C.nc</span></tt> provides <tt class="docutils literal"><span class="pre">Counter&lt;TMilli,uint32_t&gt;</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">GpioCaptureC.nc</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">HilTimerMilliC.nc</span></tt> provides <tt class="docutils literal"><span class="pre">LocalTime&lt;TMilli&gt;</span></tt> and
+<tt class="docutils literal"><span class="pre">Timer&lt;TMilli&gt;</span> <span class="pre">as</span> <span class="pre">TimerMilli[uint8_t</span> <span class="pre">num]</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">Msp430AlarmC.nc</span></tt> is generic and converts an MSP430 timer to a 16-bit Alarm</li>
+<li><tt class="docutils literal"><span class="pre">Msp430Capture.nc</span></tt> HPL interface definition for MSP430 timer captures</li>
+<li><tt class="docutils literal"><span class="pre">Msp430ClockC.nc</span></tt> exposes MSP430 hardware clock initialization</li>
+<li><tt class="docutils literal"><span class="pre">Msp430ClockInit.nc</span></tt> HPL interface definition for hardware clock initialization</li>
+<li><tt class="docutils literal"><span class="pre">Msp430ClockP.nc</span></tt> implements MSP430 hardware clock initialization and
+calibration and startup</li>
+<li><tt class="docutils literal"><span class="pre">Msp430Compare.nc</span></tt> HPL interface definition for MSP430 timer compares</li>
+<li><tt class="docutils literal"><span class="pre">Msp430Counter32khzC.nc</span></tt> provides <tt class="docutils literal"><span class="pre">Counter&lt;T32khz,uint16_t&gt;</span></tt> based on
+MSP430 TimerB</li>
+<li><tt class="docutils literal"><span class="pre">Msp430CounterC.nc</span></tt> is generic and converts an Msp430Timer to a Counter</li>
+<li><tt class="docutils literal"><span class="pre">Msp430CounterMicroC.nc</span></tt> provides <tt class="docutils literal"><span class="pre">Counter&lt;TMicro,uint16_t&gt;</span></tt> based on
+MSP430 TimerA</li>
+<li><tt class="docutils literal"><span class="pre">Msp430Timer.h</span></tt> defines additional MSP430 timer bitmasks and structs</li>
+<li><tt class="docutils literal"><span class="pre">Msp430Timer.nc</span></tt> HPL interface definition</li>
+<li><tt class="docutils literal"><span class="pre">Msp430Timer32khzC.nc</span></tt> is generic and allocates a new 32khz hardware timer</li>
+<li><tt class="docutils literal"><span class="pre">Msp430Timer32khzMapC.nc</span></tt> exposes the MSP430 hardware timers as a
+parameterized interface allocatable using Msp430Timer32khzC</li>
+<li><tt class="docutils literal"><span class="pre">Msp430TimerC.nc</span></tt> exposes the MSP430 hardware timers</li>
+<li><tt class="docutils literal"><span class="pre">Msp430TimerCapComP.nc</span></tt> is generic and implements the HPL for MSP430
+capture/compare special function registers</li>
+<li><tt class="docutils literal"><span class="pre">Msp430TimerCommonP.nc</span></tt> maps the MSP430 timer interrupts to Msp430TimerEvents</li>
+<li><tt class="docutils literal"><span class="pre">Msp430TimerControl.nc</span></tt> HPL interface definition</li>
+<li><tt class="docutils literal"><span class="pre">Msp430TimerEvent.nc</span></tt> HPL interface definition</li>
+<li><tt class="docutils literal"><span class="pre">Msp430TimerP.nc</span></tt> is generic and implements the HPL for MSP430 timer
+special function registers</li>
+</ul>
+</blockquote>
+<p>Implementation of timers for the ATmega128 and PXA27x may be found in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/atm128/timer</span></tt> and
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/pxa27x/timer</span></tt> respectively.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">7. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Cory Sharp</div>
+<div class="line">Moteiv Corporation</div>
+<div class="line">55 Hawthorne St, Suite 550</div>
+<div class="line">San Francisco, CA 94105</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 415 692 0963</div>
+<div class="line">email - <a class="reference" href="mailto:cory&#64;moteiv.com">cory&#64;moteiv.com</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Martin Turon</div>
+<div class="line">P.O. Box 8525</div>
+<div class="line">Berkeley, CA 94707</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 408 965 3355</div>
+<div class="line">email - <a class="reference" href="mailto:mturon&#64;xbow.com">mturon&#64;xbow.com</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">David Gay</div>
+<div class="line">2150 Shattuck Ave, Suite 1300</div>
+<div class="line">Intel Research</div>
+<div class="line">Berkeley, CA 94704</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 510 495 3055</div>
+<div class="line">email - <a class="reference" href="mailto:david.e.gay&#64;intel.com">david.e.gay&#64;intel.com</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="appendix-a-timer-hardware-on-various-microcontrollers" name="appendix-a-timer-hardware-on-various-microcontrollers">Appendix A: Timer hardware on various microcontrollers</a></h1>
+<blockquote>
+<ol class="loweralpha simple">
+<li>Atmega128</li>
+</ol>
+<blockquote>
+<ol class="lowerroman simple">
+<li>Two 8-bit timers, each allowing</li>
+</ol>
+<blockquote>
+<ul class="simple">
+<li>7 prescaler values (division by different powers of 2)</li>
+<li>Timer 0 can use an external 32768Hz crystal</li>
+<li>One compare register, with many compare actions (change
+output pin, clear counter, generate interrupt, etc)</li>
+</ul>
+</blockquote>
+<ol class="lowerroman simple" start="2">
+<li>Two 16-bit timers, each with</li>
+</ol>
+<blockquote>
+<ul class="simple">
+<li>5 prescaler values</li>
+<li>External and software clocking options</li>
+<li>Three compare registers (again with many actions)</li>
+<li>Input capture</li>
+</ul>
+</blockquote>
+</blockquote>
+<ol class="loweralpha simple" start="2">
+<li>MSP430</li>
+</ol>
+<blockquote>
+<ol class="lowerroman simple">
+<li>Two 16-bit timers with</li>
+</ol>
+<blockquote>
+<ul class="simple">
+<li>One with three compare registers</li>
+<li>One with eight compare registers</li>
+<li>Each from distinct clock source</li>
+<li>Each with limited prescalers</li>
+</ul>
+</blockquote>
+</blockquote>
+<ol class="loweralpha simple" start="3">
+<li>Intel PXA27x</li>
+</ol>
+<blockquote>
+<ol class="lowerroman simple">
+<li>One fixed rate (3.25MHz) 32-bit timer with</li>
+</ol>
+<blockquote>
+<ul class="simple">
+<li>4 compare registers</li>
+<li>Watchdog functionality</li>
+</ul>
+</blockquote>
+<ol class="lowerroman simple" start="2">
+<li>8 variable rate 32-bit timers with</li>
+</ol>
+<blockquote>
+<ul class="simple">
+<li>1 associated compare register each</li>
+<li>Individually selectable rates: 1/32768s, 1ms, 1s, 1us</li>
+<li>Individually selectable sources: (32.768 external osc,
+13 Mhz internal clock)</li>
+</ul>
+</blockquote>
+<ol class="lowerroman simple" start="3">
+<li>Periodic &amp; one-shot capability</li>
+<li>Two external sync events</li>
+</ol>
+</blockquote>
+</blockquote>
+</div>
+<div class="section">
+<h1><a id="appendix-b-a-microcontroller-atmega-128-timer-subsystem" name="appendix-b-a-microcontroller-atmega-128-timer-subsystem">Appendix B: a microcontroller: Atmega 128 timer subsystem</a></h1>
+<p>The Atmega128 exposes its four timers through a common set of interfaces:</p>
+<blockquote>
+<ul class="simple">
+<li>HplTimer&lt;width&gt;   - get/set current time, overflow event, control, init</li>
+<li>HplCompare&lt;width&gt; - get/set compare time, fired event,    control</li>
+<li>HplCapture&lt;width&gt; - get/set capture time, captured event, control, config</li>
+</ul>
+</blockquote>
+<p>Parameterising these interfaces by width allows reusing the same interfaces
+for the 8 and 16-bit timers. This simplifies building reusable higher level
+components which are independent of timer width.</p>
+<pre class="literal-block">
+interface HplAtm128Timer&lt;timer_size&gt;
+{
+  /// Timer value register: Direct access
+  async command timer_size get();
+  async command void       set( timer_size t );
+
+  /// Interrupt signals
+  async event void overflow();        //&lt;! Signalled on overflow interrupt
+
+  /// Interrupt flag utilites: Bit level set/clr
+  async command void reset(); //&lt;! Clear the overflow interrupt flag
+  async command void start(); //&lt;! Enable the overflow interrupt
+  async command void stop();  //&lt;! Turn off overflow interrupts
+  async command bool test();  //&lt;! Did overflow interrupt occur?
+  async command bool isOn();  //&lt;! Is overflow interrupt on?
+
+  /// Clock initialization interface
+  async command void    off();                     //&lt;! Turn off the clock
+  async command void    setScale( uint8_t scale);  //&lt;! Turn on the clock
+  async command uint8_t getScale();                //&lt;! Get prescaler setting
+}
+
+interface HplAtm128Compare&lt;size_type&gt;
+{
+  /// Compare value register: Direct access
+  async command size_type get();
+  async command void      set(size_type t);
+
+  /// Interrupt signals
+  async event void fired();           //&lt;! Signalled on compare interrupt
+
+  /// Interrupt flag utilites: Bit level set/clr
+  async command void reset();         //&lt;! Clear the compare interrupt flag
+  async command void start();         //&lt;! Enable the compare interrupt
+  async command void stop();          //&lt;! Turn off comparee interrupts
+  async command bool test();          //&lt;! Did compare interrupt occur?
+  async command bool isOn();          //&lt;! Is compare interrupt on?
+}
+
+interface HplAtm128Capture&lt;size_type&gt;
+{
+  /// Capture value register: Direct access
+  async command size_type get();
+  async command void      set(size_type t);
+
+  /// Interrupt signals
+  async event void captured(size_type t);  //&lt;! Signalled on capture int
+
+  /// Interrupt flag utilites: Bit level set/clr
+  async command void reset();          //&lt;! Clear the capture interrupt flag
+  async command void start();          //&lt;! Enable the capture interrupt
+  async command void stop();           //&lt;! Turn off capture interrupts
+  async command bool test();           //&lt;! Did capture interrupt occur?
+  async command bool isOn();           //&lt;! Is capture interrupt on?
+
+  async command void setEdge(bool up); //&lt;! True = detect rising edge
+}
+</pre>
+<p>These interfaces are provided by four components, corresponding to each
+hardware timer: HplAtm128Timer0AsyncC, and HplAtm128Timer0C through
+HplAtm128Timer3C. Timers 1 and 3 have three compare registers, so offer
+a parameterised HplAtm128Compare interface:</p>
+<pre class="literal-block">
+configuration HplAtm128Timer1C
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer&lt;uint16_t&gt;   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture&lt;uint16_t&gt; as Capture;
+    interface HplAtm128Compare&lt;uint16_t&gt; as Compare[uint8_t id];
+  }
+}
+...
+</pre>
+<p>where the <tt class="docutils literal"><span class="pre">id</span></tt> corresponds to the compare register number. The parameterised
+interface is only connected for <tt class="docutils literal"><span class="pre">id</span></tt> equal to 0, 1 or 2. Attempts to use
+another value cause a compile-time error. This is achieved as follows (code
+from the implementation of <tt class="docutils literal"><span class="pre">HplAtm128Timer1C</span></tt>)</p>
+<pre class="literal-block">
+Compare[0] = HplAtm128Timer1P.CompareA;
+Compare[1] = HplAtm128Timer1P.CompareB;
+Compare[2] = HplAtm128Timer1P.CompareC;
+</pre>
+<p>The Atmega128 chip components do not define a HAL, as the timer
+configuration choices (frequencies, use of input capture or compare output,
+etc) are platform-specific. Instead, it provides a few generic components
+for converting the HPL interfaces into platform-independent interfaces.
+These generic components include appropriate configuration parameters
+(e.g., prescaler values):</p>
+<pre class="literal-block">
+generic module Atm128AlarmC(typedef frequency_tag,
+                            typedef timer_size &#64;integer(),
+                            uint8_t prescaler,
+                            int mindt)
+{
+  provides interface Init;
+  provides interface Alarm&lt;frequency_tag, timer_size&gt; as Alarm;
+  uses interface HplTimer&lt;timer_size&gt;;
+  uses interface HplCompare&lt;timer_size&gt;;
+} ...
+
+generic module Atm128CounterC(typedef frequency_tag,
+                              typedef timer_size &#64;integer())
+{
+  provides interface Counter&lt;frequency_tag,timer_size&gt; as Counter;
+  uses interface HplTimer&lt;timer_size&gt; as Timer;
+} ...
+</pre>
+<p>As a result of issues arising from using timer 0 in asynchronous mode,
+the HAL also offers the following component:</p>
+<pre class="literal-block">
+generic configuration Atm128AlarmAsyncC(typedef precision, int divider) {
+  provides {
+    interface Init &#64;atleastonce();
+    interface Alarm&lt;precision, uint32_t&gt;;
+    interface Counter&lt;precision, uint32_t&gt;;
+  }
+}
+...
+</pre>
+<p>which builds a 32-bit alarm and timer over timer 0. divider is used
+to initialise the timer0 scaling factor.</p>
+</div>
+<div class="section">
+<h1><a id="appendix-c-a-mote-mica-family-timer-subsystem" name="appendix-c-a-mote-mica-family-timer-subsystem">Appendix C: a mote: Mica family timer subsystem</a></h1>
+<p>Members of the mica family (mica2, mica2dot, micaz) use the Atmega128
+microprocessor and have external crystals at 4 or 7.37MHz. Additionally,
+they can be run from an internal oscillator at 1, 2, 4, or 8 MHz. The
+internal oscillator is less precise, but allows for much faster startup
+from power-down and power-save modes (6 clocks vs 16000 clocks). Finally,
+power consumption is lower at the lower frequencies.</p>
+<p>The mica family members support operation at all these frequencies via
+a <tt class="docutils literal"><span class="pre">MHZ</span></tt> preprocessor symbol, which can be defined to 1, 2, 4, or 8.
+If undefined, it defaults to a platform-dependent value (4 for mica2dot,
+8 for mica2 and micaz).</p>
+<p>The mica family configures its four timers in part based on the value
+of this MHZ symbol:</p>
+<ul>
+<li><p class="first">Timer 0: uses Atm128AlarmAsyncC to divide the external 32768Hz crystal
+by 32, creating a 32-bit alarm and counter. This alarm and counter is
+used to build HilTimerMilliC, using the AlarmToTimerC,
+VirtualizeTimerC and CounterToLocalTimeC utility components.</p>
+<p>Timing accuracy is as good as the external crystal.</p>
+</li>
+<li><p class="first">Timer 1: the 16-bit hardware timer 1 is set to run at 1MHz if possible.
+However, the set of dividers for timer 1 is limited to 1, 8,
+64, 256 and 1024. So, when clocked at 2 or 4MHz, a divider of 1 is
+selected and timer 1 runs at 2 or 4MHz. To reflect this fact, the
+HAL components exposing timer 1 are named <tt class="docutils literal"><span class="pre">CounterOne16C</span></tt> and
+<tt class="docutils literal"><span class="pre">AlarmOne16C</span></tt> (rather than the <tt class="docutils literal"><span class="pre">CounterMicro16C</span></tt> <tt class="docutils literal"><span class="pre">AlarmMicro16C</span></tt>
+as suggested in Section 3).</p>
+<p>32-bit microsecond Counters and Alarms, named <tt class="docutils literal"><span class="pre">CounterMicro32C</span></tt> and
+<tt class="docutils literal"><span class="pre">AlarmMicro32C</span></tt>, are created from <tt class="docutils literal"><span class="pre">CounterOne16C</span></tt> and
+<tt class="docutils literal"><span class="pre">AlarmOne16C</span></tt> using the TransformAlarmC and TransformCounterC
+utility components.</p>
+<p>Three compare registers are available on timer1, so up to three instances
+of <tt class="docutils literal"><span class="pre">AlarmOne16C</span></tt> and/or <tt class="docutils literal"><span class="pre">AlarmMicro32C</span></tt> can be created. The timing
+accuracy depends on how the mote is clocked:</p>
+<ul class="simple">
+<li>internal clock: depends on how well the clock is calibrated</li>
+<li>external 7.37MHz crystal: times will be off by ~8.6%</li>
+<li>external 4MHz crystal: times will be as accurate as the crystal</li>
+</ul>
+</li>
+<li><p class="first">Timer 2: this timer is not currently exposed by the HAL.</p>
+</li>
+<li><p class="first">Timer 3: the 16-bit hardware timer 3 is set to run at a rate close to
+32768Hz, if possible. As with timer 1, the limited set of dividers makes
+this impossible at some clock frequencies, so the 16-bit timer 3 HAL
+components are named <tt class="docutils literal"><span class="pre">CounterThree16C</span></tt> and <tt class="docutils literal"><span class="pre">AlarmThree16C</span></tt>. As
+with timer 1, the rate of timer 3 is adjusted in software to
+build 32-bit counter and 32-bit alarms, giving components
+<tt class="docutils literal"><span class="pre">Counter32khz32C</span></tt> and <tt class="docutils literal"><span class="pre">Alarm32khz32C</span></tt>. As with timer 1, three compare
+registers, hence up to three instances of <tt class="docutils literal"><span class="pre">Alarm32khz32C</span></tt> and/or
+<tt class="docutils literal"><span class="pre">AlarmThree16C</span></tt> are available.</p>
+<p>At 1, 2, 4 and 8MHz, <tt class="docutils literal"><span class="pre">Counter32khz32C</span></tt> and <tt class="docutils literal"><span class="pre">Alarm32khz32C</span></tt> run
+at 31.25kHz (plus clock rate inaccuracy). At 7.37MHz, they run at
+~28.8kHz.</p>
+</li>
+</ul>
+<p>The automatic allocation of compare registers to alarms (and
+corresponding compile-time error when too many compare registers are
+used) is achieved as follows.  The implementations of <tt class="docutils literal"><span class="pre">AlarmOne16C</span></tt>
+and <tt class="docutils literal"><span class="pre">AlarmThree16C</span></tt> use the <tt class="docutils literal"><span class="pre">Atm128AlarmC</span></tt> generic component and
+wire it, using <tt class="docutils literal"><span class="pre">unique</span></tt>, to one of the compare registers offered by
+<tt class="docutils literal"><span class="pre">HplAtm128Timer1C</span></tt> and <tt class="docutils literal"><span class="pre">HplAtm128Timer3C</span></tt>:</p>
+<pre class="literal-block">
+generic configuration AlarmOne16C()
+{
+  provides interface Alarm&lt;TOne, uint16_t&gt;;
+}
+implementation
+{
+  components HplAtm128Timer1C, InitOneP,
+    new Atm128AlarmC(TOne, uint16_t, 3) as NAlarm;
+
+  Alarm = NAlarm;
+  NAlarm.HplAtm128Timer -&gt; HplAtm128Timer1C.Timer;
+  NAlarm.HplAtm128Compare -&gt; HplAtm128Timer1C.Compare[unique(UQ_TIMER1_COMPARE)];
+}
+</pre>
+<p>On the fourth creation of an <tt class="docutils literal"><span class="pre">AlarmOne16C</span></tt>, <tt class="docutils literal"><span class="pre">unique(UQ_TIMER1_COMPARE)</span></tt>
+will return 3, causing a compile-time error as discussed in Appendix B
+(<tt class="docutils literal"><span class="pre">HplAtm128Timer1C</span></tt>'s <tt class="docutils literal"><span class="pre">Compare</span></tt> interface is only defined for values
+from 0 to 2).</p>
+<p>When an Atmega128 is in any power-saving mode, hardware timers 1, 2 and 3
+stop counting. The default Atmega128 power management <em>will</em> enter these
+power-saving modes even when timers 1 and 3 are enabled, so time as
+measured by timers 1 and 3 does <em>not</em> represent real time.  However, if any
+alarms built on timers 1 or 3 are active, the Atmega128 power management
+will not enter power-saving modes.</p>
+<p>The mica family HIL components are built as follows:</p>
+<ul class="simple">
+<li>HilTimerMilliC: built as described above from hardware timer 0.</li>
+<li>BusyWaitMicroC: implemented using a simple software busy-wait loop which
+waits for <tt class="docutils literal"><span class="pre">MHZ</span></tt> cycles per requested microsecond. Accuracy is the same as
+Timer 1.</li>
+</ul>
+<p>Finally, the mica family motes measure their clock rate at boot time, based
+on the external 32768Hz crystal. The results of this clock rate measurement
+are made available via the <tt class="docutils literal"><span class="pre">cyclesPerJiffy</span></tt> command of the
+<tt class="docutils literal"><span class="pre">Atm128Calibrate</span></tt> interface of the <tt class="docutils literal"><span class="pre">MeasureClockC</span></tt> component. This
+command reports the number of cycles per 1/32768s. Please see this interface
+definition for other useful commands for more accurate timing.</p>
+</div>
+</div>
+</body>
+</html>
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+<title>Permanent Data Storage (Flash)</title>
+<meta name="author" content="David Gay, Jonathan Hui" />
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+<body>
+<div class="document" id="permanent-data-storage-flash">
+<h1 class="title">Permanent Data Storage (Flash)</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">103</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>David Gay, Jonathan Hui</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo documents a set of hardware-independent interfaces to non-volatile
+storage for TinyOS 2.x. It describes some design principles for the HPL and
+HAL layers of various flash chips.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>Flash chips are a form of EEPROM (electrically-erasable, programmable
+read-only memory), distinguished by a fast erase capability. However,
+erases can only be done in large units (from 256B to 128kB depending on the
+flash chip). Erases are the only way to switch bits from 0 to 1, and
+programming operations can only switch 1's to 0's. Additionally, some
+chips require that programming only happen once between each erase,
+or that it be in relatively large units (e.g., 256B).</p>
+<p>In the table below, we summarise these differences by categorising
+flash chips by their underlying technology (NOR vs NAND). We also
+include a column for Atmel's AT45DB flash chip family, as it has
+significantly different tradeoffs than other flash chips:</p>
+<blockquote>
+<table border="1" class="docutils">
+<colgroup>
+<col width="19%" />
+<col width="27%" />
+<col width="25%" />
+<col width="28%" />
+</colgroup>
+<thead valign="bottom">
+<tr><th class="head">X</th>
+<th class="head">NOR
+(ex: ST M25P40,
+Intel PXA27x)</th>
+<th class="head">AT45DB</th>
+<th class="head">NAND
+(ex: Samsung
+K9K1G08R0B)</th>
+</tr>
+</thead>
+<tbody valign="top">
+<tr><td>Erase</td>
+<td>Slow (seconds)</td>
+<td>Fast (ms)</td>
+<td>Fast (ms)</td>
+</tr>
+<tr><td>Erase unit</td>
+<td>Large (64KB-128KB)</td>
+<td>Small (256B)</td>
+<td>Medium (8KB-32KB)</td>
+</tr>
+<tr><td>Writes</td>
+<td>Slow (100s kB/s)</td>
+<td>Slow (60kB/s)</td>
+<td>Fast (MBs/s)</td>
+</tr>
+<tr><td>Write unit</td>
+<td>1 bit</td>
+<td>256B</td>
+<td>100's of bytes</td>
+</tr>
+<tr><td>Bit-errors</td>
+<td>Low</td>
+<td>Low</td>
+<td>High (requires ECC,
+bad-block mapping)</td>
+</tr>
+<tr><td>Read</td>
+<td>Bus limited <a class="footnote-reference" href="#id3" id="id1" name="id1">[*]</a></td>
+<td>Slow+Bus limited</td>
+<td>Bus limited</td>
+</tr>
+<tr><td>Erase cycles</td>
+<td>10^4 - 10^5</td>
+<td>10^4 <a class="footnote-reference" href="#id4" id="id2" name="id2">[†]</a></td>
+<td>10^5 - 10^7</td>
+</tr>
+<tr><td>Intended use</td>
+<td>Code storage</td>
+<td>Data storage</td>
+<td>Data storage</td>
+</tr>
+<tr><td>Energy/byte</td>
+<td>1uJ</td>
+<td>1uJ</td>
+<td>.01uJ</td>
+</tr>
+</tbody>
+</table>
+</blockquote>
+<table class="docutils footnote" frame="void" id="id3" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="id3">[*]</a></td><td>M25P40 reads are limited by the use of a 25MHz SPI bus. The PXA27x flash
+is memory mapped (reads are very fast and can directly execute code).</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id4" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="id4">[†]</a></td><td>Or infinite? Data sheet just says that every page within a sector
+must be written every 10^4 writes within that sector</td></tr>
+</tbody>
+</table>
+<p>The energy/byte is the per-byte cost of erasing plus programming. It is
+derived from the timing and power consumption of erase and write operations
+(for NOR flash, values are for the STMicroelectronics M25P family, for NAND
+flash, values are from the Samsung datasheet). Energy/byte for reads appears
+to depend mostly on how long the read takes (the power consumptions are
+comparable), i.e., on the efficiency of the bus + processor.</p>
+<p>Early TinyOS platforms all used a flash chip from the AT45DB
+family. In TinyOS 1.x, this chip could be accessed through three
+different components:</p>
+<ul class="simple">
+<li>Using a low-level interface (<tt class="docutils literal"><span class="pre">PageEEPROMC</span></tt>) which gave direct
+access to per-page read, write and erase operations.</li>
+<li>Using a high-level memory-like interface (<tt class="docutils literal"><span class="pre">ByteEEPROMC</span></tt>) with
+read, write and logging operations.</li>
+<li>Using a simple file system (<tt class="docutils literal"><span class="pre">Matchbox</span></tt>) with sequential-only
+files [<a class="reference" href="#id5">1</a>].</li>
+</ul>
+<p>Some more recent platforms use different flash chips: the ST M25P family (Telos
+rev. B, eyes) and the Intel Strataflash (Intel Mote2). None of the
+three components listed above are supported on these chips:</p>
+<ul class="simple">
+<li>The <tt class="docutils literal"><span class="pre">PageEEPROMC</span></tt> component is (and was intended to be) AT45DB-specific</li>
+<li><tt class="docutils literal"><span class="pre">ByteEEPROMC</span></tt> allows arbitrary rewrites of sections of the flash.
+This is not readily implementable on a flash chip with large erase units.</li>
+<li>The <tt class="docutils literal"><span class="pre">Matchbox</span></tt> implementation was AT45DB-specific. It was not
+reimplemented for these other chips, in part because it does not
+support some applications (e.g., network reprogramming) very well.</li>
+</ul>
+</div>
+<div class="section">
+<h1><a id="storage-in-tinyos-2-x" name="storage-in-tinyos-2-x">2. Storage in TinyOS 2.x</a></h1>
+<p>One approach to hiding the differences between different flash chips is to
+provide a disk-like, block interface (with, e.g., 512B blocks). This is the
+approach taken by compact flash cards. However, in the context of TinyOS,
+this approach has several drawbacks:</p>
+<ul class="simple">
+<li>This approach is protected by patents, making it difficult to provide
+in a free, open-source operating system.</li>
+<li>To support arbitrary block writes where blocks are smaller than the
+erase unit, and to deal with the limited number of erase cycles/block
+requires remapping blocks. We believe that maintaining this remapping
+table is too expensive on many mote-class devices.</li>
+</ul>
+<p>A second approach is to provide a generic low-level interface providing
+operations (read, write, erase) corresponding to the basic flash
+operations, along with information describing the flash chip's layout
+(minimum write and erase unit, timing information, etc). However,
+we believe that the large differences between NAND and NOR flash (see the
+table above), in particular the differences in reliability, write and
+erase units, make the design of a useful generic low-level interface
+tricky at best.</p>
+<p>We thus believe it is best, for now at least, to define high-level
+storage abstractions that are useful for sensor network applications,
+and leave their implementation up to each flash chip - such abstractions
+will be necessary anyway. We leave open the possibility that a future
+TEP may define portable lower-level flash interfaces (either for all
+flash chips, or, e.g., for NOR-family flashes). Such low-level
+interfaces would allow implementations of the storage abstractions
+defined in this TEP to be used for multiple flash chips.</p>
+<p>This TEP describes three high-level storage abstractions: large objects
+written in a single session, small objects with arbitrary reads and
+writes, and logs. TinyOS 2.x, divides flash chips into separate volumes
+(with sizes fixed at compile-time). Each volume provides a single
+storage abstraction (the abstraction defines the format).</p>
+<p>We prefer the use of single abstractions over fixed-size volumes over
+the use of a more general filing system (like Matchbox) for several
+reasons:</p>
+<ul class="simple">
+<li>TinyOS is currently targeted at running a single application, and many
+applications know their storage needs in advance: for instance, a
+little space for configuration data, and everything else for a log of
+all sampled data. In such cases, the flexibility offered by a filing
+system (e.g., arbitrary numbers of files) is overkill,</li>
+<li>Each abstraction is relatively easy to implement on a new flash chip, and
+has relatively little overhead.</li>
+<li>The problem of dealing with the limited number of erase cycles/block
+is simplified: it is unlikely that user applications will need to
+rewrite the same small object 100'000 times, or cycle 100'000 times
+through their log. Thus the abstractions can mostly ignore the need for
+&quot;wear levelling&quot; (ensuring that each block of the flash is erased
+the same number of time, to maximise flash chip lifetime).</li>
+</ul>
+<p>New abstractions (including a filing system) can easily be added to
+this framework.</p>
+<p>The rest of this TEP covers some principles for the organisation of
+flash chips (Section 3), then describes the flash volumes and
+storage abstractions in detail (Section 4).</p>
+</div>
+<div class="section">
+<h1><a id="hpl-hal-hil-architecture" name="hpl-hal-hil-architecture">3. HPL/HAL/HIL Architecture</a></h1>
+<p>The flash chip architecture follows the three-layer Hardware
+Abstraction Architecture (HAA), with each chip providing a presentation
+layer (HPL, Section 3.1), adaptation layer (HAL, Section 3.2) and
+platform-independent interface layer (HIL, Section 3.3) [<a class="reference" href="#id6">2</a>].
+The implementation of these layers SHOULD be found in the
+<tt class="docutils literal"><span class="pre">tos/chips/CHIPNAME</span></tt> directory. If a flash chip is part of a larger
+family with a similar interface, the HAA SHOULD support all family members
+by relying, e.g., on platform-provided configuration information.</p>
+<p>Appendix A shows example HPL and HAL specifications for the AT45DB
+and ST M25P chip families.</p>
+<div class="section">
+<h2><a id="hardware-presentation-layer-hpl" name="hardware-presentation-layer-hpl">3.1 Hardware Presentation Layer (HPL)</a></h2>
+<p>The flash HPL has a chip-dependent, platform-independent interface. The
+implementation of this HPL is platform-dependent. The flash HPL SHOULD be
+stateless.</p>
+<p>To remain platform independent, a flash chip's HPL SHOULD connect to
+platform-specific components
+providing access to the flash chip; these components
+SHOULD be placed in the <tt class="docutils literal"><span class="pre">tos/platforms/PLATFORM/chips/CHIPNAME</span></tt>
+directory. If the flash chip implementation supports a family of
+flash chips, this directory MAY also contain a file describing the
+particular flash chip found on the platform.</p>
+</div>
+<div class="section">
+<h2><a id="hardware-adaptation-layer-hal" name="hardware-adaptation-layer-hal">3.2 Hardware Adaptation Layer (HAL)</a></h2>
+<p>The flash HAL has a chip-dependent, platform-independent interface and
+implementation. Flash families with a common HPL SHOULD have a common
+HAL. Flash HAL's SHOULD expose a <tt class="docutils literal"><span class="pre">Resource</span></tt> interface and automatically
+power-manage the underlying flash chip. Finally, the flash HAL MUST
+provide a way to access the volume information specified by the
+programmer (see Section 3). This allows users to build new flash
+abstractions that interact cleanly with the rest of the flash system.</p>
+</div>
+<div class="section">
+<h2><a id="hardware-interface-layer-hil" name="hardware-interface-layer-hil">3.3 Hardware Interface Layer (HIL)</a></h2>
+<p>Each flash chip MUST support at least one of the storage abstractions
+described in Section 4. These abstractions SHOULD be presented in
+components named <tt class="docutils literal"><span class="pre">ChipAbstractionC</span></tt>, e.g., <tt class="docutils literal"><span class="pre">At45dbLogStorageC</span></tt>.
+Additionally, a flash chip implementation MAY support platforms
+with multiple instances of the same storage chip. The way in which
+this is achieved is not specified further in this TEP.</p>
+<p>Each platform MUST have <tt class="docutils literal"><span class="pre">AbstractionC</span></tt> components (e.g.,
+<tt class="docutils literal"><span class="pre">LogStorageC</span></tt>) implementing the storage abstractions of Section 4
+supported by its flash chip(s). On platforms with multiple storage chips
+SHOULD redirect uses of <tt class="docutils literal"><span class="pre">AbstractionC</span></tt> to the appropriate storage
+chip, based on the requested volume.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="non-volatile-storage-abstractions" name="non-volatile-storage-abstractions">4. Non-Volatile Storage Abstractions</a></h1>
+<p>The HIL implementations are platform-independent, but chip (family)
+dependent. They implement the three storage abstractions and
+volume structure discussed in the introduction.</p>
+<div class="section">
+<h2><a id="volumes" name="volumes">4.1. Volumes</a></h2>
+<p>The division of the flash chip into fixed-size volumes is specified by
+an XML file that is placed in the application's directory (where one
+types 'make'). The XML file specifies the allocation as follows:</p>
+<pre class="literal-block">
+&lt;volume_table&gt;
+  &lt;volume name=&quot;DELUGE0&quot; size=&quot;65536&quot; /&gt;
+  &lt;volume name=&quot;CONFIGLOG&quot; size=&quot;65536&quot; /&gt;
+  &lt;volume name=&quot;DATALOG&quot; size=&quot;131072&quot; /&gt;
+  &lt;volume name=&quot;GOLDENIMAGE&quot; size=&quot;65536&quot; base=&quot;983040&quot; /&gt;
+&lt;/volume_table&gt;
+</pre>
+<p>The name and size parameters are required, while base is optional. The name
+is a string containing one or more characters in [a-zA-Z0-9_], while size
+and base are in bytes. Each storage chip MUST provide a compile-time tool
+that translates the allocation specification to chip-specific nesC
+code. There is no constraint on how this is done or what code is produced,
+except that the specification to physical allocation MUST be one-to-one
+(i.e. a given specification should always have the same resulting physical
+allocation on a given chip) and the result MUST be placed in the build
+directory. When not specified, the tool picks a suitable physical
+location for a volume. If there is any reason that the physical allocation
+cannot be satisfied, an error should be given at compile time. The tool
+SHOULD be named <tt class="docutils literal"><span class="pre">tos-storage-CHIPNAME</span></tt> and be distributed with the other
+tools supporting a platform. The XML file SHOULD be named
+<tt class="docutils literal"><span class="pre">volumes-CHIPNAME.xml</span></tt>.</p>
+<p>The compile-time tool MUST prepend 'VOLUME_' to each volume name in
+the XML file and '#define' each resulting name to map to a unique
+integer.</p>
+<p>The storage abstractions are accessed by instantiating generic
+components that take the volume macro as argument:</p>
+<pre class="literal-block">
+components new BlockStorageC(VOLUME_DELUGE0);
+</pre>
+<p>If the named volume is not in the specification, nesC will give a
+compile-time error since the symbol will be undefined.</p>
+<p>A volume MUST NOT be used with more than one storage abstraction instance.</p>
+</div>
+<div class="section">
+<h2><a id="large-objects" name="large-objects">4.2 Large objects</a></h2>
+<p>The motivating example for large objects is the transmission or
+long-term storage of large pieces of data. For instance, programs in a
+network-reprogramming system, or large data-packets in a reliable
+data-transmission system. Such objects have an interesting
+characteristic: each byte in the object is written at most once.</p>
+<p>This leads to the definition of the <tt class="docutils literal"><span class="pre">BlockStorageC</span></tt> abstraction for storing
+large objects or other &quot;write-once&quot; objects:</p>
+<ul class="simple">
+<li>A large object ranges from a few kilobytes upwards.</li>
+<li>A large object is erased before the first write.</li>
+<li>A sync ensures that a large object survives a reboot or crash</li>
+<li>Reads are unrestricted</li>
+<li>Each byte can only be written once between two erases</li>
+</ul>
+<p>Large objects are accessed by instantiating a BlockStorageC component
+which takes a volume id argument:</p>
+<pre class="literal-block">
+generic configuration BlockStorageC(volume_id_t volid) {
+  provides {
+      interface BlockWrite;
+      interface BlockRead;
+  }
+} ...
+</pre>
+<p>The <tt class="docutils literal"><span class="pre">BlockRead</span></tt> and <tt class="docutils literal"><span class="pre">BlockWrite</span></tt> interfaces (briefly presented in
+Appendix B) contain the following operations (all split-phase, except
+<tt class="docutils literal"><span class="pre">BlockRead.getSize</span></tt>):</p>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">BlockWrite.erase</span></tt>: erase the volume. After a reboot or a commit, a
+volume MUST be erased before it can be written to.</li>
+<li><tt class="docutils literal"><span class="pre">BlockWrite.write</span></tt>: write some bytes starting at a given
+offset. Each byte MUST NOT be written more than once between two erases.</li>
+<li><tt class="docutils literal"><span class="pre">BlockWrite.sync</span></tt>: ensure all previous writes are present on a given
+volume. Sync MUST be called to ensure written data survives a reboot
+or crash.</li>
+<li><tt class="docutils literal"><span class="pre">BlockRead.read</span></tt>: read some bytes starting at a given offset.</li>
+<li><tt class="docutils literal"><span class="pre">BlockRead.computeCrc</span></tt>: compute the CRC of some bytes starting at a
+given offset.</li>
+<li><tt class="docutils literal"><span class="pre">BlockRead.getSize</span></tt>: return bytes available for large object storage in
+volume.</li>
+</ul>
+<p>For full details on arguments and other considerations, see the comments in
+the interface definitions.</p>
+<p>Note that these interfaces contain no direct support for verifying the
+integrity of the BlockStorage data, but such support can easily be built
+by using the <tt class="docutils literal"><span class="pre">computeCrc</span></tt> command and storing the result in a
+well-defined location, and checking this CRC when desired.</p>
+</div>
+<div class="section">
+<h2><a id="logging" name="logging">4.3 Logging</a></h2>
+<p>Event and result logging is a common requirement in sensor
+networks. Such logging should be reliable (a mote crash should not
+lose data). It should also be easy to extract data from the log,
+either partially or fully. Some logs are <em>linear</em> (stop logging when
+the volume is full), others are <em>circular</em> (the oldest data is
+overwritten when the volume is full).</p>
+<p>The <tt class="docutils literal"><span class="pre">LogStorageC</span></tt> abstraction supports these requirements.  The log is
+record based: each call to <tt class="docutils literal"><span class="pre">LogWrite.append</span></tt> (see below) creates a new
+record. On failure (crash or reboot), the log MUST only lose whole
+records from the end of the log. Additionally, once a circular log wraps
+around, calls to <tt class="docutils literal"><span class="pre">LogWrite.append</span></tt> MUST only lose whole records from
+the beginning of the log.</p>
+<p>Logs are accessed by instantiating a LogStorageC component which takes a
+volume id and a boolean argument:</p>
+<pre class="literal-block">
+generic configuration LogStorageC(volume_id_t volid, bool circular) {
+  provides {
+      interface LogWrite;
+      interface LogRead;
+  }
+} ...
+</pre>
+<p>If the <tt class="docutils literal"><span class="pre">circular</span></tt> argument is TRUE, the log is circular; otherwise
+it is linear.</p>
+<p>The <tt class="docutils literal"><span class="pre">LogRead</span></tt> and <tt class="docutils literal"><span class="pre">LogWrite</span></tt> interfaces (briefly presented in
+Appendix B) contain the following operations (all split-phase except
+<tt class="docutils literal"><span class="pre">LogWrite.currentOffset</span></tt>, <tt class="docutils literal"><span class="pre">LogRead.currentOffset</span></tt> and
+<tt class="docutils literal"><span class="pre">LogRead.getSize</span></tt>):</p>
+<ul>
+<li><p class="first"><tt class="docutils literal"><span class="pre">LogWrite.erase</span></tt>: erase the log. A log MUST be erased (possibly in
+some previous session) before any other operation can be used.</p>
+</li>
+<li><p class="first"><tt class="docutils literal"><span class="pre">LogWrite.append</span></tt>: append some bytes to the log. In a circular log,
+this may overwrite the current read position. In this case, the
+read position MUST be advanced to the log's current beginning
+(i.e., as if <tt class="docutils literal"><span class="pre">LogRead.seek</span></tt> had been called with <tt class="docutils literal"><span class="pre">SEEK_BEGINNING</span></tt>).
+Additionally, the <tt class="docutils literal"><span class="pre">LogWrite.appendDone</span></tt> event reports whenever, in a
+circular log, an append MAY have erased old records.</p>
+<p>Each append creates a separate record. Log implementations may have a
+maximum record size; all implementations MUST support records of up
+to 255 bytes.</p>
+</li>
+<li><p class="first"><tt class="docutils literal"><span class="pre">LogWrite.sync</span></tt>: guarantee that data written so far will not be lost to
+a crash or reboot (it can still be overwritten when a circular log wraps
+around). Using <tt class="docutils literal"><span class="pre">sync</span></tt> MAY waste some space in the log.</p>
+</li>
+<li><p class="first"><tt class="docutils literal"><span class="pre">LogWrite.currentOffset</span></tt>: return cookie representing current
+append position (for use with <tt class="docutils literal"><span class="pre">LogRead.seek</span></tt>).</p>
+</li>
+<li><p class="first"><tt class="docutils literal"><span class="pre">LogRead.read</span></tt>: read some bytes from the current read position in
+the log and advance the read position.</p>
+<p><tt class="docutils literal"><span class="pre">LogStorageC</span></tt> implementations MUST include error detection codes
+to increase the likelihood of detection of corrupted or invalid log
+data. Data returned by a successful read MUST have passed this
+error detection check. The behaviour on failure of this check is
+unspecified (e.g., the at45db believes as if the end of the log has
+been reached; other implementations may behave differently).</p>
+</li>
+<li><p class="first"><tt class="docutils literal"><span class="pre">LogRead.currentOffset</span></tt>: return cookie representing current
+read position (for use with <tt class="docutils literal"><span class="pre">LogRead.seek</span></tt>).</p>
+</li>
+<li><p class="first"><tt class="docutils literal"><span class="pre">LogRead.seek</span></tt>: set the read position to a value returned by
+a prior call to <tt class="docutils literal"><span class="pre">LogWrite.currentOffset</span></tt> or <tt class="docutils literal"><span class="pre">LogRead.currentOffset</span></tt>,
+or to the special <tt class="docutils literal"><span class="pre">SEEK_BEGINNING</span></tt> value. In a circular log, if
+the specified position has been overwritten, behave as if
+<tt class="docutils literal"><span class="pre">SEEK_BEGINNING</span></tt> was requested.</p>
+<p><tt class="docutils literal"><span class="pre">SEEK_BEGINNING</span></tt> positions the read position at the beginning of
+the oldest record still present in the log.</p>
+<p>After reboot, the current read position is <tt class="docutils literal"><span class="pre">SEEK_BEGINNING</span></tt>.</p>
+</li>
+<li><p class="first"><tt class="docutils literal"><span class="pre">LogRead.getSize</span></tt>: return an approximation of the log's capacity
+in bytes. Uses of <tt class="docutils literal"><span class="pre">sync</span></tt> and other overhead may reduce this number.</p>
+</li>
+</ul>
+<p>For full details on arguments, etc, see the comments in the interface
+definitions.</p>
+<p>Note that while each call to <tt class="docutils literal"><span class="pre">append</span></tt> logically creates a separate
+record, the <tt class="docutils literal"><span class="pre">LogStorageC</span></tt> API does not report record
+boundaries. Additionally, crashes, reboots, and appends after
+wrap-around in a circular log can cause the loss of multiple consecutive
+records. Taken together, these restrictions mean that a <tt class="docutils literal"><span class="pre">LogStorageC</span></tt>
+implementation MAY internally aggregate several consecutive appends into
+a single record. However, the guarantee that only whole records are lost
+is sufficient to ensure that applications do not to have worry about
+incomplete or inconsistent log entries.</p>
+</div>
+<div class="section">
+<h2><a id="small-objects" name="small-objects">4.4 Small objects:</a></h2>
+<p>Sensor network applications need to store configuration data, e.g.,
+mote identity, radio frequency, sample rates, etc. Such data is not large, but
+losing it may lead to a mote misbehaving or losing contact with the
+network.</p>
+<p>The <tt class="docutils literal"><span class="pre">ConfigStorageC</span></tt> abstraction stores a single small object in a volume. It:</p>
+<ul class="simple">
+<li>Assumes that configuration data is relatively small (a few
+hundred bytes).</li>
+<li>Allows random reads and writes.</li>
+<li>Has simple transactional behaviour: each read is a separate transaction,
+all writes up to a commit form a single transaction.</li>
+<li>At reboot, the volume contains the data as of the most recent successful
+commit.</li>
+</ul>
+<p>Small objects are accessed by instantiating a ConfigStorageC component
+which takes a volume id argument:</p>
+<pre class="literal-block">
+generic configuration ConfigStorageC(volume_id_t volid) {
+  provides {
+      interface Mount;
+      interface ConfigStorage;
+  }
+} ...
+</pre>
+<p>A small object MUST be mounted (via the <tt class="docutils literal"><span class="pre">Mount</span></tt> interface) before
+the first use.</p>
+<p>The <tt class="docutils literal"><span class="pre">Mount</span></tt> and <tt class="docutils literal"><span class="pre">ConfigStorage</span></tt> interfaces (briefly presented in
+Appendix B) contain the following operations (all split-phase except
+<tt class="docutils literal"><span class="pre">ConfigStorage.getSize</span></tt> and <tt class="docutils literal"><span class="pre">ConfigStorage.valid</span></tt>):</p>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">Mount.mount</span></tt>: mount the volume.</li>
+<li><tt class="docutils literal"><span class="pre">ConfigStorage.valid</span></tt>: return TRUE if the volume contains a
+valid small object.</li>
+<li><tt class="docutils literal"><span class="pre">ConfigStorage.read</span></tt>: read some bytes starting at a given offset.
+Fails if the small object is not valid. Note that this reads the
+data as of the last successful commit.</li>
+<li><tt class="docutils literal"><span class="pre">ConfigStorage.write</span></tt>: write some bytes to a given offset.</li>
+<li><tt class="docutils literal"><span class="pre">ConfigStorage.commit</span></tt>: make the small object contents reflect all the
+writes since the last commit.</li>
+<li><tt class="docutils literal"><span class="pre">ConfigStorage.getSize</span></tt>: return the number of bytes that can be stored
+in the small object.</li>
+</ul>
+<p>For full details on arguments, etc, see the comments in the interface
+definitions.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="implementations" name="implementations">5. Implementations</a></h1>
+<p>An AT45DB implementation can be found in tinyos-2.x/tos/chips/at45db.</p>
+<p>An ST M25P implementation can be found in tinyos-2.x/tos/chips/stm25p.</p>
+</div>
+<div class="section">
+<h1><a id="authors-addresses" name="authors-addresses">6. Authors' Addresses</a></h1>
+<div class="line-block">
+<div class="line">David Gay</div>
+<div class="line">2150 Shattuck Ave, Suite 1300</div>
+<div class="line">Intel Research</div>
+<div class="line">Berkeley, CA 94704</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 510 495 3055</div>
+<div class="line">email - <a class="reference" href="mailto:david.e.gay&#64;intel.com">david.e.gay&#64;intel.com</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Jonathan Hui</div>
+<div class="line">657 Mission St. Ste. 600</div>
+<div class="line">Arched Rock Corporation</div>
+<div class="line">San Francisco, CA 94105-4120</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 415 692 0828</div>
+<div class="line">email - <a class="reference" href="mailto:jhui&#64;archedrock.com">jhui&#64;archedrock.com</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">7. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id5" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id5">[1]</a></td><td>David Gay. &quot;Design of Matchbox, the simple filing system for
+motes. (version 1.0).&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id6" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id6">[2]</a></td><td>TEP 2: Hardware Abstraction Architecture.</td></tr>
+</tbody>
+</table>
+</div>
+<div class="section">
+<h1><a id="appendix-a-haa-for-some-existing-flash-chips" name="appendix-a-haa-for-some-existing-flash-chips">Appendix A. HAA for some existing flash chips</a></h1>
+<div class="section">
+<h2><a id="a-1-at45db" name="a-1-at45db">A.1 AT45DB</a></h2>
+<p>The Atmel AT45DB family HPL is:</p>
+<pre class="literal-block">
+configuration HplAt45dbC {
+  provides interface HplAt45db;
+} ...
+</pre>
+<p>The <tt class="docutils literal"><span class="pre">HplAt45db</span></tt> interface has flash-&gt;buffer, buffer-&gt;flash, compare
+buffer to flash, erase page, read, compute CRC, and write operations.  Most
+of these operations are asynchronous, i.e., their completion is signaled
+before the flash chip has completed the operation. The HPL also includes
+operations to wait for asynchronous operations to complete.</p>
+<p>A generic, system-independent implementation of the HPL
+(<tt class="docutils literal"><span class="pre">HplAt45dbByteC</span></tt>) is included allowing platforms to just provide SPI and
+chip selection interfaces.</p>
+<p>Different members of the AT45DB family are supported by specifying a few
+constants (number of pages, page size).</p>
+<p>The AT45DB HAL has two components, one for chip access and the other
+providing volume information:</p>
+<pre class="literal-block">
+component At45dbC
+{
+  provides {
+    interface At45db;
+    interface Resource[uint8_t client];
+    interface ResourceController;
+    interface ArbiterInfo;
+  }
+} ...
+
+configuration At45dbStorageManagerC {
+  provides interface At45dbVolume[volume_id_t volid];
+} ...
+</pre>
+<p>Note that the AT45DB HAL resource management is independent of the
+underlying HPL's power management. The motivation for this is that
+individual flash operations may take a long time, so it may be desirable to
+release the flash's bus during long-running operations.</p>
+<p>The <tt class="docutils literal"><span class="pre">At45db</span></tt> interface abstracts from the low-level HPL operations by:</p>
+<ul class="simple">
+<li>using the flash's 2 RAM buffers as a cache to allow faster reads and
+writes</li>
+<li>hiding the asynchronous nature of the HPL operations</li>
+<li>verifying that all writes were successful</li>
+</ul>
+<p>It provides cached read, write and CRC computation, and page erase and
+copy. It also includes flush and sync operations to manage the cache.</p>
+<p>The <tt class="docutils literal"><span class="pre">At45dbVolume</span></tt> interface has operations to report volume size and
+map volume-relative pages to absolute pages.</p>
+</div>
+<div class="section">
+<h2><a id="a-2-st-m25p" name="a-2-st-m25p">A.2 ST M25P</a></h2>
+<p>The ST M25P family HPL is:</p>
+<pre class="literal-block">
+configuration Stm25pSpiC {
+  provides interface Init;
+  provides interface Resource;
+  provides interface Stm25pSpi;
+}
+</pre>
+<p>The <tt class="docutils literal"><span class="pre">Stm25pSpi</span></tt> interface has read, write, compute CRC, sector erase
+and block erase operations. The implementation of this HPL is
+system-independent, built over a few system-dependent components
+providing SPI and chip selection interfaces.</p>
+<p>Note that these two examples have different resource management policies:
+the AT45DB encapsulates resource acquisition and release within each
+operation, while the M25P family requires that HPL users acquire and
+release the resource itself.</p>
+<p>The ST M25P HAL is:</p>
+<pre class="literal-block">
+configuration Stm25pSectorC {
+  provides interface Resource as ClientResource[storage_volume_t volume];
+  provides interface Stm25pSector as Sector[storage_volume_t volume];
+  provides interface Stm25pVolume as Volume[storage_volume_t volume];
+}
+</pre>
+<p>The <tt class="docutils literal"><span class="pre">Stm25pSector</span></tt> interface provides volume-relative operations similar
+to those from the HPL interface: read, write, compute CRC and
+erase. Additionally, it has operations to report volume size and remap
+volume-relative addresses. Clients of the ST M25P HAL must implement the
+<tt class="docutils literal"><span class="pre">getVolumeId</span></tt> event of the <tt class="docutils literal"><span class="pre">Stm25pVolume</span></tt> interface so that the HAL can
+obtain the volume id of each of its clients.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="appendix-b-storage-interfaces" name="appendix-b-storage-interfaces">Appendix B. Storage interfaces</a></h1>
+<p>These interfaces are presented briefly here for reference; please refer
+to the TinyOS documentation for a full description of the commands,
+events and their parameters.</p>
+<div class="section">
+<h2><a id="b-1-blockstorage-interfaces" name="b-1-blockstorage-interfaces">B.1 BlockStorage interfaces</a></h2>
+<p>The BlockStorage interfaces are:</p>
+<pre class="literal-block">
+interface BlockRead {
+  command error_t read(storage_addr_t addr, void* buf, storage_len_t len);
+  event void readDone(storage_addr_t addr, void* buf, storage_len_t len,
+                      error_t error);
+
+  command error_t computeCrc(storage_addr_t addr, storage_len_t len,
+                             uint16_t crc);
+  event void computeCrcDone(storage_addr_t addr, storage_len_t len,
+                            uint16_t crc, error_t error);
+
+  command storage_len_t getSize();
+}
+
+interface BlockWrite {
+  command error_t write(storage_addr_t addr, void* buf, storage_len_t len);
+  event void writeDone(storage_addr_t addr, void* buf, storage_len_t len,
+                       error_t error);
+
+  command error_t erase();
+  event void eraseDone(error_t error);
+
+  command error_t sync();
+  event void syncDone(error_t error);
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="b-2-configstorage-interfaces" name="b-2-configstorage-interfaces">B.2 ConfigStorage interfaces</a></h2>
+<p>The ConfigStorage interfaces are:</p>
+<pre class="literal-block">
+interface Mount {
+  command error_t mount();
+  event void mountDone(error_t error);
+}
+
+interface ConfigStorage {
+  command error_t read(storage_addr_t addr, void* buf, storage_len_t len);
+  event void readDone(storage_addr_t addr, void* buf, storage_len_t len,
+                      error_t error);
+
+  command error_t write(storage_addr_t addr, void* buf, storage_len_t len);
+  event void writeDone(storage_addr_t addr, void* buf, storage_len_t len,
+                       error_t error);
+
+  command error_t commit();
+  event void commitDone(error_t error);
+
+  command storage_len_t getSize();
+  command bool valid();
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="b-3-logstorage-interfaces" name="b-3-logstorage-interfaces">B.3 LogStorage interfaces</a></h2>
+<p>The LogStorage interfaces are:</p>
+<pre class="literal-block">
+interface LogRead {
+  command error_t read(void* buf, storage_len_t len);
+  event void readDone(void* buf, storage_len_t len, error_t error);
+
+  command storage_cookie_t currentOffset();
+
+  command error_t seek(storage_cookie_t offset);
+  event void seekDone(error_t error);
+
+  command storage_len_t getSize();
+}
+
+interface LogWrite {
+  command error_t append(void* buf, storage_len_t len);
+  event void appendDone(void* buf, storage_len_t len, bool recordsLost,
+                        error_t error);
+
+  command storage_cookie_t currentOffset();
+
+  command error_t erase();
+  event void eraseDone(error_t error);
+
+  command error_t sync();
+  event void syncDone(error_t error);
+}
+</pre>
+</div>
+</div>
+</div>
+</body>
+</html>
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+<meta http-equiv="Content-Type" content="text/html; charset=utf-8" />
+<meta name="generator" content="Docutils 0.4: http://docutils.sourceforge.net/" />
+<title>Low Power Listening</title>
+<meta name="author" content="David Moss, Jonathan Hui, Kevin Klues" />
+<style type="text/css">
+
+/*
+:Author: David Goodger
+:Contact: goodger@users.sourceforge.net
+:date: $Date: 2009-02-03 23:07:32 $
+:version: $Revision: 1.2 $
+:copyright: This stylesheet has been placed in the public domain.
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+  font-weight: bold ;
+  text-align: center }
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+  margin: 2em 5em ;
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+<body>
+<div class="document" id="low-power-listening">
+<h1 class="title">Low Power Listening</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">105</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>David Moss, Jonathan Hui, Kevin Klues</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This TEP describes the structure and implementation of the TinyOS 2.x
+link layer abstractions. The architecture is designed to allow each radio
+type to implement its own low power strategy within the Hardware Adaptation
+Layer (HAL), while maintaining a common application interface.  The
+history and strategies for low power listening are discussed, as well
+as expected behavior and implementation recommendations.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>Asynchronous low power listening is a strategy used to duty cycle
+the radio while ensuring reliable message delivery since TinyOS 1.x
+<a class="citation-reference" href="#mica2" id="id1" name="id1">[MICA2]</a>.</p>
+<p>While a CC1000 or CC2420 radio is turned on and listening, it can
+actively consume anywhere between 7.4 to 18.8 mA on top of the power
+consumed by other components in the system <a class="citation-reference" href="#cc1000" id="id2" name="id2">[CC1000]</a>,[CC2420]_.
+This can rapidly deplete batteries.  In the interest of extending
+battery lifetime, it is best to duty cycle the radio on and off to
+prevent this idle waste of energy.  In an asychronous low power
+message delivery scheme, the duty cycling receiver node saves the
+most energy by performing short, periodic receive checks.  The power
+consumption burden is then placed on the transmitter node, which
+must modulate the radio channel long enough for the recipient?s
+receive check to detect an incoming message.  A synchronous low
+power message delivery scheme takes this idea a step further by
+allowing the transmitter to only transmit when it knows the
+destination node is performing a receive check.</p>
+</div>
+<div class="section">
+<h1><a id="background" name="background">2. Background</a></h1>
+<div class="section">
+<h2><a id="early-tinyos-1-x-cc1000-low-power-listening-implementation" name="early-tinyos-1-x-cc1000-low-power-listening-implementation">2.1 Early TinyOS 1.x CC1000 Low Power Listening Implementation</a></h2>
+<p>TinyOS 1.x introduced low power listening on the CC1000 radio, but
+never introduced a similar scheme for the CC2420 radio in the baseline.
+The CC1000 radio had the following low power listening commands,
+provided directly by CC1000RadioIntM::</p>
+<pre class="literal-block">
+command result_t SetListeningMode(uint8_t power);
+command uint8_t GetListeningMode();
+command result_t SetTransmitMode(uint8_t power);
+command uint8_t GetTransmitMode();
+</pre>
+<p>The uint8_t 'power' mode parameter was initially defined as follows::</p>
+<pre class="literal-block">
+//Original CC1000 Low Power Listening Modes
+Power Mode 0 = 100% duty cycle
+Power Mode 1 = 35.5% duty cycle
+Power Mode 2 = 11.5% duty cycle
+Power Mode 3 = 7.53% duty cycle
+Power Mode 4 = 5.61% duty cycle
+Power Mode 5 = 2.22% duty cycle
+Power Mode 6 = 1.00% duty cycle
+</pre>
+<p>There were several issues with this interface and implementation.
+First, setting up a low power network was cumbersome.  The low power
+listening commands had to be directly wired through CC1000RadioIntM,
+and called while the radio was not performing any transactions.
+Second, each node in a network was expected to have the same radio
+power mode.  Finally, the pre-programmed duty cycles were not linear
+and offered a very limited selection of options.</p>
+<p>In this low power listening implementation, the transmitter mote would
+transmit a packet that consisted of an extremely long preamble.  This
+preamble was long enough to span a complete receive check period.   On
+the receiver?s end, the radio would turn on and read bits from the
+radio.  If a preamble sequence was detected in the incoming bits, the
+receiver?s radio would remain on for the full duration of the
+transmitter?s preamble and wait for the packet at the end.</p>
+<p>This original low power listening scheme was rather inefficient on both
+the transmit and receive end.  On the receive end, turning on the radio
+completely and reading in bits typically cost much more energy than
+necessary.  The transmitter's long preamble could end up costing both
+nodes to have their radios on much longer than required, sending and
+receiving useless preamble bits.</p>
+</div>
+<div class="section">
+<h2><a id="cc1000-pulse-check-implementation" name="cc1000-pulse-check-implementation">2.2 CC1000 Pulse Check Implementation</a></h2>
+<p>Joe Polastre and Jason Hill developed a better receive check
+implementation in the CC1000 ?Pulse Check? radio stack for TinyOS 1.x,
+while maintaining the same interface.  This implementation took advantage
+of a Clear Channel Assessment (CCA) to determine if a transmitter was
+nearby.</p>
+<p>In this implementation, the CC1000 radio did not have to be turned on
+completely, so it consumed less maximum current than the previous
+implementation.  The radio on-time was also significantly reduced, only
+turning on long enough for a single ADC conversion to occur.  If energy
+was detected on the channel after the first ADC conversion, subsequent
+ADC conversions would verify this before committing to turning the
+radio receiver on completely.</p>
+<p>In this implementation the receiver's efficiency dramatically improved,
+but the transmitter still sent a long, inefficient preamble.  Energy
+consumption used to transmit messages was still high, while throughput
+was still low.</p>
+</div>
+<div class="section">
+<h2><a id="possible-improvements" name="possible-improvements">2.3 Possible Improvements</a></h2>
+<p>Low power listening is a struggle between minimizing energy efficiency
+and maximizing throughput.   In an asynchronous low power listening
+scheme, several improvements can be made over earlier implementations.
+One improvement that could have been made to earlier implementations is
+to remove the long transmitted preamble and send many smaller messages
+instead.  For example, the transmitter could send the same message over
+and over again for the duration of the receiver's receive check period.
+The receiver could wake up and see that another node is transmitting,
+receive a full message, and finally send back an acknowledgement for that
+message.  The transmitter would see the acknowledgement and stop
+transmitting early, so both nodes can perform some high speed transaction
+or go back to sleep.  Useless preamble bits are minimized while useful
+packet information is maximized.  Incidentally, this is a good strategy
+for CC2420 low power listening.  This strategy certainly improves energy
+efficiency and throughput, but further improvements may be possible by
+employing a synchronous delivery method on top of this type of
+asynchronous low power listening scheme.</p>
+<p>Improvements can also be made to the original low power listening
+interfaces.  For example, instead of pre-programming power modes and
+duty cycles, a low power listening interface should allow the developer
+the flexibility to deploy a network of nodes with whatever duty cycle
+percentage or sleep time desired for each individual node.  Nodes with
+different receive check periods should still have the ability to
+reliably communicate with each other with little difficulty.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="interfaces" name="interfaces">3. Interfaces</a></h1>
+</div>
+<div class="section">
+<h1><a id="low-power-listening-interface" name="low-power-listening-interface">3.1 Low Power Listening Interface</a></h1>
+<p>The LowPowerListening interface MUST be provided for each radio by the
+platform independent ActiveMessageC configuration.</p>
+<p>In some implementations, low power listening may have an option to
+compile into the radio stack for memory footprint reasons.  If low
+power listening is not compiled in with the stack, calls to
+LowPowerListening MUST be handled by a dummy implementation.</p>
+<p>The TEP proposes this LowPowerListening interface::</p>
+<pre class="literal-block">
+interface LowPowerListening {
+  command void setLocalSleepInterval(uint16_t sleepIntervalMs);
+  command uint16_t getLocalSleepInterval();
+  command void setLocalDutyCycle(uint16_t dutyCycle);
+  command uint16_t getLocalDutyCycle();
+  command void setRxSleepInterval(message_t *msg, uint16_t sleepIntervalMs);
+  command uint16_t getRxSleepInterval(message_t *msg);
+  command void setRxDutyCycle(message_t *msg, uint16_t dutyCycle);
+  command uint16_t getRxDutyCycle(message_t *msg);
+  command uint16_t dutyCycleToSleepInterval(uint16_t dutyCycle);
+  command uint16_t sleepIntervalToDutyCycle(uint16_t sleepInterval);
+}
+</pre>
+<dl class="docutils">
+<dt>setLocalSleepInterval(uint16_t sleepIntervalMs)</dt>
+<dd><ul class="first last simple">
+<li>Sets the local node?s radio sleep interval, in milliseconds.</li>
+</ul>
+</dd>
+<dt>getLocalSleepInterval()</dt>
+<dd><ul class="first last simple">
+<li>Retrieves the local node?s sleep interval, in milliseconds.  If duty cycle percentage was originally set, it is automatically converted to a sleep interval.</li>
+</ul>
+</dd>
+<dt>setLocalDutyCycle(uint16_t dutyCycle)</dt>
+<dd><ul class="first last simple">
+<li>Set the local node?s duty cycle percentage, in units of [percentage*100].</li>
+</ul>
+</dd>
+<dt>getLocalDutyCycle()</dt>
+<dd><ul class="first last simple">
+<li>Retrieves the local node?s duty cycle percentage.  If sleep interval in milliseconds was originally set, it is automatically converted to a duty cycle percentage.</li>
+</ul>
+</dd>
+<dt>setRxSleepInterval(message_t *msg, uint16_t sleepIntervalMs)</dt>
+<dd><ul class="first last simple">
+<li>The given message will soon be sent to a low power receiver. The sleepIntervalMs is the sleep interval of that low power receiver, in milliseconds.  When sent, the radio stack will automatically transmit the message so as to be detected by the low power receiver.</li>
+</ul>
+</dd>
+<dt>getRxSleepInterval(message_t *msg)</dt>
+<dd><ul class="first last simple">
+<li>Retrieves the message destination?s sleep interval.  If a duty cycle was originally set for the outgoing message, it is automatically converted to a sleep interval.</li>
+</ul>
+</dd>
+<dt>setRxDutyCycle(message_t *msg, uint16_t dutyCycle)</dt>
+<dd><ul class="first last simple">
+<li>The given message will soon be sent to a low power receiver.  The dutyCycle is the duty cycle percentage, in units of [percentage*100], of that low power receiver.  When sent, the radio stack will automatically transmit the message so as to be detected by the low power receiver.</li>
+</ul>
+</dd>
+<dt>getRxDutyCycle(message_t *msg)</dt>
+<dd><ul class="first last simple">
+<li>Retrieves the message destination?s duty cycle percentage.  If a sleep interval was originally set for the outgoing message, it is automatically converted to a duty cycle percentage.</li>
+</ul>
+</dd>
+<dt>dutyCycleToSleepInterval(uint16_t dutyCycle)</dt>
+<dd><ul class="first last simple">
+<li>Converts the given duty cycle percentage to a sleep interval in milliseconds.</li>
+</ul>
+</dd>
+<dt>sleepIntervalToDutyCycle(uint16_t sleepInterval)</dt>
+<dd><ul class="first last simple">
+<li>Converts the given sleep interval in milliseconds to a duty cycle percentage.</li>
+</ul>
+</dd>
+</dl>
+<div class="section">
+<h2><a id="split-control-behaviour" name="split-control-behaviour">3.2 Split Control Behaviour</a></h2>
+<p>Low power listening MUST be enabled and disabled through the radio?s
+standard SplitControl interface, returning exactly one SplitControl
+event upon completion.  While the radio is duty cycling, it MUST NOT
+alert the application layer each time the radio turns on and off to
+perform a receive check or send a message.</p>
+</div>
+<div class="section">
+<h2><a id="send-interface-behaviour" name="send-interface-behaviour">3.3 Send Interface Behaviour</a></h2>
+<p>Attempts to send a message before SplitControl.start() has been called
+SHOULD return EOFF, signifying the radio has not been enabled.  When
+SplitControl.start() has been called by the application layer, calls
+to Send MUST turn the radio on automatically if the radio is currently
+off due to duty cycling.  If a message is already in the process of
+being sent, multiple calls to Send should return FAIL.</p>
+<p>The Send.sendDone(?) event SHOULD signal SUCCESS upon the successful
+completion of the message delivery process, regardless if any mote
+actually received the message.</p>
+</div>
+<div class="section">
+<h2><a id="receive-interface-behaviour" name="receive-interface-behaviour">3.4 Receive Interface Behaviour</a></h2>
+<p>Upon the successful reception of a message, the low power receive event
+handler SHOULD drop duplicate messages sent to the broadcast address.
+For example, the CC2420 implementation can perform this by checking
+the message_t?s dsn value, where each dsn value is identical for every
+message used in the delivery.</p>
+<p>After the first successful message reception, the receiver?s radio
+SHOULD stay on for a brief period of time to allow any further
+transactions to occur at high speed.  If no subsequent messages are
+detected going inbound or outbound after some short delay, the radio
+MUST continue duty cycling as configured.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="low-power-listening-message-t-metadata" name="low-power-listening-message-t-metadata">4. Low Power Listening message_t Metadata</a></h1>
+<p>To store the extra 16-bit receiver low power listening value, the radio
+stack?s message_t footer MUST contain a parameter to store the message
+destination?s receive check sleep interval in milliseconds or duty cycle
+percentage.  For example, the low power listening CC2420 message_t footer
+stores the message's receive check interval in milliseconds, as shown
+below <a class="citation-reference" href="#tep111" id="id3" name="id3">[TEP111]</a>.:</p>
+<pre class="literal-block">
+typedef nx_struct cc2420_metadata_t {
+  nx_uint8_t tx_power;
+  nx_uint8_t rssi;
+  nx_uint8_t lqi;
+  nx_bool crc;
+  nx_bool ack;
+  nx_uint16_t time;
+  nx_uint16_t rxInterval;
+} cc2420_metadata_t;
+</pre>
+</div>
+<div class="section">
+<h1><a id="recommendations-for-hal-implementation" name="recommendations-for-hal-implementation">5. Recommendations for HAL Implementation</a></h1>
+<p>In the interest of minimizing energy while maximizing throughput, it
+is RECOMMENDED that any asynchronous low power listening implementation
+use clear channel assessment methods to determine the presence of a
+nearby transmitter.  It is also RECOMMENDED that the transmitter send
+duplicate messages continuously with minimum or no backoff period instead
+of one long message.  Removing backoffs on a continuous send delivery
+scheme will allow the channel to be modulated sufficiently for a receiver
+to quickly detect; furthermore, enabling acknowledgements on each
+outgoing duplicate packet will allow the transmit period to be cut short
+based on when the receiver actually receives the message.</p>
+<p>Asynchronous low power listening requires some memory overhead, so
+sometimes it is better to leave the added architecture out when it is
+not required.  When it is feasible to do so, it is RECOMMENDED that
+the preprocessor variable LOW_POWER_LISTENING be defined when low
+power listening functionality is to be compiled in with the radio stack,
+and not defined when low power listening functionality shouldn?t exist.</p>
+<p>It is RECOMMENDED that the radio on-time for actual receive checks be a
+measured value to help approximate the duty cycle percentage.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">6. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">David Moss</div>
+<div class="line">Rincon Research Corporation</div>
+<div class="line">101 N. Wilmot, Suite 101</div>
+<div class="line">Tucson, AZ  85750</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 520 519 3138</div>
+<div class="line">email ? <a class="reference" href="mailto:dmm&#64;rincon.com">dmm&#64;rincon.com</a></div>
+<div class="line"><br /></div>
+<div class="line">Jonathan Hui</div>
+<div class="line">657 Mission St. Ste. 600</div>
+<div class="line">Arched Rock Corporation</div>
+<div class="line">San Francisco, CA 94105-4120</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 415 692 0828</div>
+<div class="line">email - <a class="reference" href="mailto:jhui&#64;archedrock.com">jhui&#64;archedrock.com</a></div>
+<div class="line"><br /></div>
+<div class="line">Kevin Klues</div>
+<div class="line">503 Bryan Hall</div>
+<div class="line">Washington University</div>
+<div class="line">St. Louis, MO 63130</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1-314-935-6355</div>
+<div class="line">email - <a class="reference" href="mailto:klueska&#64;cs.wustl.edu">klueska&#64;cs.wustl.edu</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">7. Citations</a></h1>
+<table class="docutils citation" frame="void" id="mica2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="mica2">[MICA2]</a></td><td>&quot;MICA2 Radio Stack for TinyOS.&quot;  <a class="reference" href="http://www.tinyos.net/tinyos-1.x/doc/mica2radio/CC1000.html">http://www.tinyos.net/tinyos-1.x/doc/mica2radio/CC1000.html</a></td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep111" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="tep111">[TEP111]</a></td><td>TEP 111: message_t.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="cc1000" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="cc1000">[CC1000]</a></td><td>TI/Chipcon CC1000 Datasheet.  <a class="reference" href="http://www.chipcon.com/files/CC1000_Data_Sheet_2_2.pdf">http://www.chipcon.com/files/CC1000_Data_Sheet_2_2.pdf</a></td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="cc2420" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="cc2420">[CC2420]</a></td><td>TI/Chipcon CC2420 Datasheet.  <a class="reference" href="http://www.chipcon.com/files/CC2420_Data_Sheet_1_3.pdf">http://www.chipcon.com/files/CC2420_Data_Sheet_1_3.pdf</a></td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<body>
+<div class="document" id="schedulers-and-tasks">
+<h1 class="title">Schedulers and Tasks</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">106</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Philip Levis and Cory Sharp</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo documents the structure and implementation of tasks
+and task schedulers in TinyOS 2.x.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>TinyOS has two basic computational abstractions: asynchronous events
+and tasks. Early versions of TinyOS provided a single type of task --
+parameter free -- and only a FIFO scheduling policy. While changing
+the latter was possible, the incorporation of tasks into the nesC
+language made it very difficult. Presenting task schedulers as a
+TinyOS component enables much easier customization, and allowing tasks
+to be presented as an interface enables extending the classes of tasks
+available. TinyOS 2.0 takes both approaches, and this memo documents
+the structure of how it does so as well as a simple mechanism that
+greatly increases system dependability.</p>
+</div>
+<div class="section">
+<h1><a id="tasks-and-the-scheduler-in-tinyos-1-x" name="tasks-and-the-scheduler-in-tinyos-1-x">2. Tasks and the Scheduler in TinyOS 1.x</a></h1>
+<p>Tasks in TinyOS are a form of deferred procedure call (DPC) <a class="footnote-reference" href="#id5" id="id1" name="id1">[1]</a>, which
+enable a program to defer a computation or operation until a later
+time. TinyOS tasks run to completion and do not pre-empt one
+another.  These two constraints mean that code called from tasks
+runs synchonously with respect to other tasks. Put another way, tasks
+are atomic with respect to other tasks <a class="footnote-reference" href="#id6" id="id2" name="id2">[2]</a>.</p>
+<p>In TinyOS 1.x, the nesC language supports tasks through two
+mechanisms, <tt class="docutils literal"><span class="pre">task</span></tt> declarations and <tt class="docutils literal"><span class="pre">post</span></tt> expressions:</p>
+<pre class="literal-block">
+task void computeTask() {
+  // Code here
+}
+</pre>
+<p>and:</p>
+<pre class="literal-block">
+result_t rval = post computeTask();
+</pre>
+<p>TinyOS 1.x provides a single kind of task, a parameter-free function,
+and a single scheduling policy, FIFO. <tt class="docutils literal"><span class="pre">post</span></tt> expressions can return
+FAIL, to denote that TinyOS was unable to post the task.  Tasks can be
+posted multiple times. For example, if a task is posted twice in quick
+succession and the first succeeds while the second fails, then the
+task will be run once in the future; for this reason, even if a <tt class="docutils literal"><span class="pre">post</span></tt>
+fails, the task may run.</p>
+<p>The TinyOS 1.x scheduler is implemented as a set of C functions in the
+file <tt class="docutils literal"><span class="pre">sched.c</span></tt>. Modifying the scheduler requires replacing or
+changing this file. Additionally, as tasks are supported solely through
+nesC <tt class="docutils literal"><span class="pre">task</span></tt> declarations and <tt class="docutils literal"><span class="pre">post</span></tt> expressions, which assume
+a parameter-free function, modifying the syntax or capabilities of
+tasks is not possible.</p>
+<p>The task queue in TinyOS 1.x is implemented as a fixed size circular
+buffer of function pointers. Posting a task puts the task's function
+pointer in the next free element of the buffer; if there are no free
+elements, the <tt class="docutils literal"><span class="pre">post</span></tt> returns fail. This model has several issues:</p>
+<blockquote>
+<ol class="arabic simple">
+<li>Some components do not have a reasonable response to a failed   post</li>
+<li>As a given task can be posted multiple times, it can consume more than one element in the buffer</li>
+<li>All tasks from all components share a single resource: one misbehaving component can cause other's posts to fail</li>
+</ol>
+</blockquote>
+<p>Fundamentally, in order for a component A to repost a task after post
+failure, another component B must call a function on it (either a
+command or event). E.g., component A must schedule a timer, or expect
+a retry from its client. However, as many of these systems might
+depend on tasks as well (e.g., timers), it is possible that an
+overflowing task queue can cause the entire system to fail.</p>
+<p>The combination of the above three issues mean that one misbehaving
+component can cause TinyOS to hang. Consider, for example, this
+scenario (a real and encountered problem on the Telos platform):</p>
+<blockquote>
+<ul class="simple">
+<li>A packet-based hardware radio, which issues an interrupt only when it finishes sending a packet</li>
+<li>A networking component that handles the interrupt to post a task to signal <tt class="docutils literal"><span class="pre">SendMsg.sendDone</span></tt>.</li>
+<li>A sensing component that posts a task when it handles an <tt class="docutils literal"><span class="pre">ADC.dataReady</span></tt> event</li>
+<li>An application component that sends a packet and then sets its ADC sampling rate too high</li>
+</ul>
+</blockquote>
+<p>In this scenario, the sensing component will start handling events at
+a faster rate than it can process them. It will start posting tasks to
+handle the data it receives, until it fills the task queue. At some
+point later, the radio finishes sending a packet and signals its
+interrupt. The networking component, however, is unable to post its
+task that signals <tt class="docutils literal"><span class="pre">SendMsg.sendDone()</span></tt>, losing the event. The
+application component does not try to send another packet until it
+knows the one it is sending completes (so it can re-use the
+buffer). As the <tt class="docutils literal"><span class="pre">sendDone()</span></tt> event was lost, this does not occur,
+and the application stops sending network traffic.</p>
+<p>The solution to this particular problem in TinyOS 1.x is to signal
+sendDone() in the radio send complete interrupt if the post fails:
+this violates the sync/async boundary, but the justification is that
+a <em>possible</em> rare race condition is better than <em>certain</em> failure.
+Another solution would be to use an interrupt source to periodically
+retry posting the task; while this does not break the sync/async
+boundary, until the post succeeds the system cannot send packets.
+The TinyOS 1.x model prevents it from doing any better.</p>
+</div>
+<div class="section">
+<h1><a id="tasks-in-tinyos-2-x" name="tasks-in-tinyos-2-x">3. Tasks in TinyOS 2.x</a></h1>
+<p>The semantics of tasks in TinyOS 2.x are different than those in 1.x.
+This change is based on experiences with the limitations and run time
+errors that the 1.x model introduces. <strong>In TinyOS 2.x, a basic post will
+only fail if and only if the task has already been posted and has not
+started execution.</strong> A task can always run, but can only have one
+outstanding post at any time.</p>
+<p>2.x achieves these semantics by allocating one
+byte of state per task (the assumption is that there will be fewer than 255
+tasks in the system). While a very large number of tasks could make
+this overhead noticable, it is not significant in practice.
+If a component needs to post a task several times, then the end of
+the task logic can repost itself as need be.</p>
+<p>For example, one can do this:</p>
+<pre class="literal-block">
+post processTask();
+...
+task void processTask() {
+  // do work
+  if (moreToProcess) {
+    post processTask();
+  }
+}
+</pre>
+<p>These semantics prevent several problems, such as the inability to
+signal completion of split-phase events because the task queue is
+full, task queue overflow at initialization, and unfair task
+allocation by components that post a task many times.</p>
+<p>TinyOS 2.x takes the position that the basic use case of tasks should
+remain simple and easy to use, but that it should be possible to
+introduce new kinds of tasks beyond the basic use case. TinyOS
+achieves this by keeping <tt class="docutils literal"><span class="pre">post</span></tt> and <tt class="docutils literal"><span class="pre">task</span></tt> for the basic case,
+and introducing task interfaces for additional ones.</p>
+<p>Task interfaces allow users to extend the syntax and semantics of
+tasks. Generally, a task interface has an <tt class="docutils literal"><span class="pre">async</span></tt> command,   post  ,
+and an event, <tt class="docutils literal"><span class="pre">run</span></tt>. The exact signature of these functions are
+up to the interface. For example, a task interface that allows a task
+to take an integer parameter could look like this:</p>
+<pre class="literal-block">
+interface TaskParameter {
+  async error_t command postTask(uint16_t param);
+  event void runTask(uint16_t param);
+}
+</pre>
+<p>Using this task interface, a component could post a task with a
+<tt class="docutils literal"><span class="pre">uint16_t</span></tt> parameter. When the scheduler runs the task, it will
+signal the <tt class="docutils literal"><span class="pre">runTask</span></tt> event with the passed parameter, which contains
+the task's logic. Note, however, that this does not save any RAM:
+the scheduler must have RAM allocated for the parameter.  Furthermore, as
+there can only be one copy of a task outstanding at any time, it
+is just as simple to store the variable in the component. E.g.,
+rather than:</p>
+<pre class="literal-block">
+call TaskParameter.postTask(34);
+...
+event void TaskParameter.runTask(uint16_t param) {
+  ...
+}
+</pre>
+<p>one can:</p>
+<pre class="literal-block">
+uint16_t param;
+...
+  param = 34;
+  post parameterTask();
+...
+task void parameterTask() {
+  // use param
+}
+</pre>
+<p>The principal difference between the simplest code for these
+two models is that if the component posts the task twice, it
+will use the older parameter in the TaskParameter example,
+while it will use the newer parameter in the basic task example.
+If a component wants to use the oldest parameter, then it can do
+this:</p>
+<pre class="literal-block">
+if (post myTask() == SUCCESS) {
+  param = 34;
+}
+</pre>
+</div>
+<div class="section">
+<h1><a id="the-scheduler-in-tinyos-2-x" name="the-scheduler-in-tinyos-2-x">4. The Scheduler in TinyOS 2.x</a></h1>
+<p>In TinyOS 2.x, the scheduler is a TinyOS component. Every scheduler
+MUST support nesC tasks. It MAY also support any number of
+additional task interfaces. The scheduler component is resonsible for
+the policy of reconciling different task types (e.g., earliest
+deadline first tasks vs. priority tasks).</p>
+<p>The basic task in TinyOS 2.x is parameterless and FIFO. Tasks continue
+to follow the nesC semantics of task and post, which are linguistic
+shortcuts for declaring an  interface and wiring it to the
+scheduler component. Appendix A describes how these shortcuts can be
+configured. A scheduler provides a task interface as a parameterized
+interface. Every task that wires to the interface uses the unique()
+function to obtain a unique identifier, which the scheduler uses to
+dispatch tasks.</p>
+<p>For example, the standard TinyOS scheduler has this signature:</p>
+<pre class="literal-block">
+module SchedulerBasicP {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t taskID];
+  uses interface McuSleep;
+}
+</pre>
+<p>A scheduler MUST provide a parameterized TaskBasic interface.
+If a call to TaskBasic.postTask() returns SUCCESS, the scheduler MUST run it
+eventually, so that starvation is not a concern. The scheduler MUST
+return SUCCESS to a TaskBasic.postTask()
+operation unless it is not the first call to TaskBasic.postTask() since
+that task's TaskBasic.runTask() event has been signaled. The
+McuSleep interface is used for microcontroller power management;
+its workings are explained in TEP 112 <a class="footnote-reference" href="#id7" id="id3" name="id3">[3]</a>.</p>
+<p>A scheduler MUST provide the Scheduler interface.
+The Scheduler interface has commands for initialization and running
+tasks, and is used by TinyOS to execute tasks:</p>
+<pre class="literal-block">
+interface Scheduler {
+  command void init();
+  command bool runNextTask(bool sleep);
+  command void taskLoop();
+}
+</pre>
+<p>The init() command initializes the task queue and scheduler data
+structures. runNextTask() MUST run to completion whatever task the
+scheduler's policy decides is the next one: the return value indicates
+whether it ran a task. The bool parameter sleep indicates what the
+scheduler should do if there are no tasks to execute. If sleep is
+FALSE, then the command will return immediately with FALSE as a return
+value. If sleep is TRUE, then the command MUST NOT return until a task
+is executed, and SHOULD put the CPU to sleep until a new task arrives.
+Calls of runNextTask(FALSE) may return TRUE or FALSE; calls of
+runNextTask(TRUE) always return TRUE.   The taskLoop() command tells
+the scheduler to enter an infinite task-running loop, putting the MCU
+into a low power state when the processor is idle: it never returns.</p>
+<p>The scheduler is repsonsible for putting the processor to sleep
+predominantly for efficiency reasons. Including the sleep call
+within the scheduler improves the efficiency of the task loop,
+in terms of the assembly generated by the TinyOS toolchain.</p>
+<p>This is the TaskBasic interface:</p>
+<pre class="literal-block">
+interface TaskBasic {
+  async command error_t postTask();
+  void event runTask();
+}
+</pre>
+<p>When a component declares a task with the <tt class="docutils literal"><span class="pre">task</span></tt> keyword in nesC, it
+is implicitly declaring that it uses an instance of the TaskBasic
+interface: the task body is the runTask event. When a component uses the
+<tt class="docutils literal"><span class="pre">post</span></tt> keyword, it calls the postTask command. Each TaskBasic MUST be
+wired to the scheduler with a unique identifier as its parameter.
+The parameter MUST be obtained with the <tt class="docutils literal"><span class="pre">unique</span></tt> function in nesC,
+with a key of <tt class="docutils literal"><span class="pre">&quot;TinySchedulerC.TaskBasic&quot;</span></tt>. The nesC compiler
+automatically does this wiring when the <tt class="docutils literal"><span class="pre">task</span></tt> and <tt class="docutils literal"><span class="pre">post</span></tt>
+keywords are used.</p>
+<p>The SchedulerBasicP implementation uses these identifiers as its queue
+entries. When TinyOS tells the scheduler to run a task, it pulls the
+next identifier off the queue and uses it to dispatch on the
+parameterized TaskBasic interface.</p>
+<p>While the default TinyOS scheduler uses a FIFO policy, TinyOS
+components MUST NOT assume a FIFO policy. If two tasks must run
+in a particular temporal order, this order should be enforced by
+the earlier task posting the later task.</p>
+</div>
+<div class="section">
+<h1><a id="replacing-the-scheduler" name="replacing-the-scheduler">5. Replacing the Scheduler</a></h1>
+<p>The TinyOS scheduler is presented as a component named TinySchedulerC.
+The default TinyOS scheduler implementation is a module named
+SchedulerBasicP; the default scheduler component is a configuration
+that provides wire-through of SchedulerBasicP.</p>
+<p>To replace the scheduler for a particular application, a developer
+SHOULD put a configuration named TinySchedulerC in the application
+directory: this will replace the default. The scheduler component
+provides a wire-through of the desired scheduler implementation. All
+scheduler implementations MUST provide a parameterize TaskBasic
+interface, as SchedulerBasicP does; this supports nesC post statements
+and task declarations and enables TinyOS core systems to operate
+properly. Generally, TinyOS core code needs to be able to run unchanged
+with new scheduler implementations.  All scheduler
+implementations MUST provide the Scheduler interface.</p>
+<p>For example, imagine a hypothetical scheduler that provides earliest
+deadline first tasks, which are provided through the TaskEdf
+interface:</p>
+<pre class="literal-block">
+interface TaskEdf {
+  async command error_t postTask(uint16_t deadlineMs);
+  event void runTask();
+}
+</pre>
+<p>The scheduler implementation is named SchedulerEdfP, and provides both
+TaskBasic and TaskEdf interfaces:</p>
+<pre class="literal-block">
+module SchedulerEdfP {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t taskID];
+  provides interface TaskEdf[uint8_t taskID];
+}
+</pre>
+<p>An application that wants to use SchedulerEdfP instead of
+SchedulerBasicP includes a configuration named TinySchedulerC, which
+exports all of SchedulerEdfP's interfaces:</p>
+<pre class="literal-block">
+configuration TinySchedulerC {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t taskID];
+  provides interface TaskEdf[uint8_t taskID];
+}
+implementation {
+  components SchedulerEdfP;
+  Scheduler = SchedulerEdf;
+  TaskBasic = SchedulerEdfP;
+  TaskEDF   = SchedulerEdfP;
+}
+</pre>
+<p>For a module to have an earliest deadline first task, it uses the
+TaskEdf interface. Its configuration SHOULD wire it to TinySchedulerC.
+The key used for task unique identifiers MUST be &quot;TinySchedulerC.TaskInterface&quot;,
+where <em>TaskInterface</em> is the name of the new task interface as presented
+by the scheduler.  A common way to make sure a consistent string is used
+is to #define it. For example, TaskEdf.nc might include:</p>
+<pre class="literal-block">
+#define UQ_TASK_EDF &quot;TinySchedulerC.TaskEdf&quot;
+</pre>
+<p>In this example, the module SomethingP requires two EDF
+tasks:</p>
+<pre class="literal-block">
+configuration SomethingC {
+  ...
+}
+implementation {
+  components SomethingP, TinySchedulerC;
+  SomethingP.SendTask -&gt; TinySchedulerC.TaskEdf[unique(UQ_TASK_EDF)];
+  SomethingP.SenseTask -&gt; TinySchedulerC.TaskEdf[unique(UQ_TASK_EDF)];
+}
+</pre>
+<p>The module SomethingP also has a basic task. The nesC compiler
+automatically transforms task keywords into BasicTask interfaces and
+wires them appropriately. Therefore, for basic tasks, a component
+author can either use the <tt class="docutils literal"><span class="pre">task</span></tt> and <tt class="docutils literal"><span class="pre">post</span></tt> keywords or use a TaskBasic
+interface. A component SHOULD use the keywords whenever possible, and it
+MUST NOT mix the two syntaxes for a given task.  This is an example
+implementation of SomethingP that uses keywords for basic tasks:</p>
+<pre class="literal-block">
+module SomethingP {
+  uses interface TaskEdf as SendTask
+  uses interface TaskEdf as SenseTask
+}
+implementation {
+  // The TaskBasic, written with keywords
+  task void cleanupTask() { ... some logic ... }
+  event void SendTask.runTask() { ... some logic ... }
+  event void SenseTask.runTask() { ... some logic ... }
+
+  void internal_function() {
+    call SenseTask.postTask(20);
+    call SendTask.postTask(100);
+    post cleanupTask();
+  }
+}
+</pre>
+<p>The requirement that basic tasks not be subject to starvation
+requires that a scheduler supporting EDF tasks must ensure that
+basic tasks run eventually even if there is an unending stream of
+short deadline tasks to run. Quantifying &quot;eventually&quot; is difficult,
+but a 1% share of the MCU cycles (or invocations) is a reasonable
+approximation.</p>
+<p>If the scheduler provides two instances of the same task interface,
+their unique keys are based on the name of the interface as the
+scheduler presents it (the &quot;as&quot; keyword). For example, imagine
+a scheduler which provides two instances of TaskBasic: standard
+tasks and high-priority tasks. The scheduler usually selects a task
+for the high priority queue before the standard queue:</p>
+<pre class="literal-block">
+configuration TinySchedulerC {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t taskID];
+  provides interface TaskBasic[uint8_t taskID] as TaskHighPriority;
+}
+</pre>
+<p>It cannot always select a high priority task because that could
+starve basic tasks.  A component that uses a high priority task would
+wire to TaskHighPriority with the key &quot;TinySchedulerC.TaskHighPriority&quot;:</p>
+<pre class="literal-block">
+configuration SomethingElseC {}
+implementation {
+  components TinySchedulerC as Sched, SomethingElseP;
+  SomethingElseP.RetransmitTask -&gt; Sched.TaskHighPriority[unique(&quot;TinySchedulerC.TaskHighPriority&quot;)];
+}
+</pre>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">6. Implementation</a></h1>
+<p>The following files in <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/system</span></tt> contain the reference
+implementations of the scheduler:</p>
+<blockquote>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">SchedulerBasicP.nc</span></tt> is the basic TinyOS scheduler, providing
+a parameterized TaskBasic interface.</li>
+<li><tt class="docutils literal"><span class="pre">TinySchedulerC.nc</span></tt> is the default scheduler configuration
+that wires SchedulerBasicP to McuSleepC <a class="footnote-reference" href="#id7" id="id4" name="id4">[3]</a>.</li>
+</ul>
+</blockquote>
+<p>A prototype of a scheduler that supports EDF tasks can be obtained
+at the URL <tt class="docutils literal"><span class="pre">http://csl.stanford.edu/~pal/tinyos/edf-sched.tgz.</span></tt></p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">7. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Cory Sharp</div>
+<div class="line">410 Soda Hall</div>
+<div class="line">UC Berkeley</div>
+<div class="line">Berkeley, CA 94720</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:cssharp&#64;eecs.berkeley.edu">cssharp&#64;eecs.berkeley.edu</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">8. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id5" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="id5">[1]</a></td><td>Erik Cota-Robles and James P. Held.  &quot;A Comparison of Windows
+Driver Model Latency Performance on Windows NT and Windows 98.&quot; In
+<em>Proceedings of the Third Symposium on Operating System Design
+and Implementation (OSDI).</em></td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id6" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="id6">[2]</a></td><td>David Gay, Philip Levis, Rob von Behren, Matt Welsh, Eric Brewer
+and David Culler. &quot;The <em>nesC</em> Language: A Holistic Approach to Networked
+Embedded Systems.&quot; In <em>Proceedings of the ACM SIGPLAN 2003 Conference on
+Programming Language Design and Implementation (PLDI).</em></td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id7" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id7">[3]</a></td><td><em>(<a class="fn-backref" href="#id3">1</a>, <a class="fn-backref" href="#id4">2</a>)</em> TEP 112: Microcontroller Power Management.</td></tr>
+</tbody>
+</table>
+</div>
+<div class="section">
+<h1><a id="appendix-a-changing-the-scheduler" name="appendix-a-changing-the-scheduler">Appendix A: Changing the Scheduler</a></h1>
+<p>The nesC compiler transforms the   post   and   task   keywords into
+nesC interfaces, wirings, and calls. By default, the statement:</p>
+<pre class="literal-block">
+module a {
+  ...
+}
+implementation {
+  task x() {
+    ...
+    post x();
+  }
+
+}
+</pre>
+<p>is effectively:</p>
+<pre class="literal-block">
+module a {
+  ...
+  provides interface TaskBasic as x;
+}
+implementation {
+  event void x.runTask() {
+    ...
+    call x.postTask();
+  }
+}
+</pre>
+<p>Specifically, TinyOS maps a task with name <em>T</em> to a TaskBasic
+interface with name <em>T</em>. Posting <em>T</em> is a call to T.postTask(), and
+the task body is T.runTask(). Finally, <em>T</em> is automatically wired to
+TinySchedulerC with a unique() call.</p>
+<p>While the fact that tasks are transformed into interfaces is built in
+to the nesC compiler, the exact names can be configured. Each
+platform's   .platform   file passes the   -fnesc-scheduler   option
+to the compiler. The standard option is:</p>
+<pre class="literal-block">
+-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+</pre>
+<p>There are 6 strings passed. They are:</p>
+<blockquote>
+<ol class="arabic simple">
+<li>The name of the scheduler component to wire the interface
+to (TinySchedulerC).</li>
+<li>The unique string used when wiring to the scheduler component's
+parameterized interface (TinySchedulerC.TaskBasic).</li>
+<li>The name of the interface on the scheduler component (TaskBasic).</li>
+<li>The name of the interface type (TaskBasic).</li>
+<li>The name of the event for running the task (runTask).</li>
+<li>The name of the command for posting the task (postTask).</li>
+</ol>
+</blockquote>
+<p>The nescc man page has further details.</p>
+</div>
+</div>
+</body>
+</html>
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+<title>TinyOS 2.x Boot Sequence</title>
+<meta name="author" content="Philip Levis" />
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+<body>
+<div class="document" id="tinyos-2-x-boot-sequence">
+<h1 class="title">TinyOS 2.x Boot Sequence</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">107</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Philip Levis</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo documents the structure and implementation of the mote
+boot sequence in TinyOS 2.x.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>TinyOS has a set of calling conventions and semantics in its boot
+sequence. Earlier versions of TinyOS used an interface named
+&quot;StdControl&quot; to take care of system initialization and starting
+required software systems. Experience with several hardware platforms
+showed StdControl to be insufficient, as it provided only a
+synchronous interface. Additionally, StdControl bundled the notion of
+initialization, which happens only at boot, with power management and
+service control. TinyOS 2.x solves these problems by separating what
+was once StdControl into three separate interfaces: one for
+initialization, one for starting and stopping components, and one for
+notification that the mote has booted. This memo describes the TinyOS
+boot sequence and reasons for its semantics.</p>
+</div>
+<div class="section">
+<h1><a id="tinyos-1-x-boot-sequence" name="tinyos-1-x-boot-sequence">2. TinyOS 1.x Boot Sequence</a></h1>
+<p>The TinyOS 1.x boot sequence is uniform across most mote platforms
+(TOSSIM has a very different boot sequence, as it is a PC
+program). The module RealMain implements main(), and has the following
+signature:</p>
+<pre class="literal-block">
+module RealMain {
+  uses {
+    command result_t hardwareInit();
+    interface StdControl;
+    interface Pot;
+  }
+}
+</pre>
+<p>The mote main() function uses a mix of nesC and C:</p>
+<pre class="literal-block">
+int main() __attribute__ ((C, spontaneous)) {
+  call hardwareInit();
+  call Pot.init(10);
+  TOSH_sched_init();
+
+  call StdControl.init();
+  call StdControl.start();
+  __nesc_enable_interrupt();
+
+  while(1) {
+    TOSH_run_task();
+  }
+}
+</pre>
+<p>Several problems exist. Some of these calls are artifacts of old
+platforms: the Pot component refers to the mica variable potentiometer
+for controlling radio transmission power, and for other platforms is a
+stub component Some of the calls -- TOSH_sched_init and TOSH_run_task
+-- are C functions that are implemented in other, automatically
+included files. Separation from the nesC component model makes
+changing what lies behind these functions more difficult than normal
+in TinyOS.</p>
+<p>More importantly, the initialization sequence has several
+limitations. The component HPLInit implements the hardwareInit command
+(wired by the component Main): hardware initialization may not be part
+of a pure HPL layer. The scheduler is initialized after hardware,
+which means that no hardware initialization can post a task if it
+needs one. The StdControl interface combines component initialization
+(init()) and activation (start()/stop()); if a component needs to be
+initialized by RealMain, it must also be started. Separating these two
+leads to more flexible power management, and distinguishes required
+low-level components that must always be running (such as a Timer)
+from high level components that can be power managed (such as an
+application). Finally, some components that need to often need to be
+started by main, such as a radio, do not follow a synchronous
+start/stop model. In this case, some components can't operate properly
+until the radio starts, but main has no mechanism for waiting for the
+radio start completion event.</p>
+</div>
+<div class="section">
+<h1><a id="tinyos-2-x-boot-interfaces" name="tinyos-2-x-boot-interfaces">3. TinyOS 2.x Boot Interfaces</a></h1>
+<p>The TinyOS 2.x boot sequence uses three interfaces:</p>
+<blockquote>
+<ul class="simple">
+<li>Init, for initializing component/hardware state</li>
+<li>Scheduler, for initializing and running tasks</li>
+<li>Boot, for signalling that the system has successfully booted</li>
+</ul>
+</blockquote>
+<p>The Init interface has a single command, init():</p>
+<pre class="literal-block">
+interface Init {
+  command error_t init();
+}
+</pre>
+<p>Init provides a synchronous interface, enabling initialization
+ordering. Unlike normal execution, in which operations from a wide
+range of components need to be interleaved effectively, initialization
+is a sequential, synchronous operation: no component can be started
+until initialization is complete. If a particular component's
+initialization requires waiting for interrupts or other asynchronous
+events, then it must explicitly wait for them (e.g.,
+with a spin loop), MUST NOT return until complete. Otherwise the system
+may start before initialization is complete.</p>
+<p>The Scheduler interface is for initializing and controlling task
+execution. It is detailed in TEP 106 <a class="footnote-reference" href="#id7" id="id1" name="id1">[1]</a>.</p>
+<p>The Boot interface has a single event, booted(), which the boot
+sequence signals when it has completed:</p>
+<pre class="literal-block">
+interface Boot {
+  event void booted();
+}
+</pre>
+</div>
+<div class="section">
+<h1><a id="id2" name="id2">4. TinyOS 2.x Boot Sequence</a></h1>
+<p>The module RealMainP implements the standard TinyOS 2.x boot sequence.
+The configuration MainC wires some of RealMainP's interfaces to
+components that implement standard abstractions and exports the others
+that are application specific. Code above the Hardware Independent
+Layer (TEP 2) SHOULD wire to MainC and not RealMainP:</p>
+<pre class="literal-block">
+module RealMainP {
+  provides interface Booted;
+  uses {
+    interface Scheduler;
+    interface Init as PlatformInit;
+    interface Init as SoftwareInit;
+  }
+}
+implementation {
+  int main() __attribute__ ((C, spontaneous)) {
+    atomic {
+      platform_bootstrap();
+      call Scheduler.init();
+      call PlatformInit.init();
+      while (call Scheduler.runNextTask());
+      call SoftwareInit.init();
+      while (call Scheduler.runNextTask());
+    }
+    __nesc_enable_interrupt();
+    signal Boot.booted();
+    call Scheduler.taskLoop();
+    return -1;
+  }
+  default command error_t PlatformInit.init() { return SUCCESS; }
+  default command error_t SoftwareInit.init() { return SUCCESS; }
+  default event void Boot.booted() { }
+}
+</pre>
+<div class="section">
+<h2><a id="initialization" name="initialization">4.1 Initialization</a></h2>
+<p>The first step in the boot sequence is initializing the system:</p>
+<pre class="literal-block">
+atomic {
+  platform_bootstrap();
+  call Scheduler.init();
+  call PlatformInit.init();
+  while (call Scheduler.runNextTask());
+  call SoftwareInit.init();
+  while (call Scheduler.runNextTask());
+}
+</pre>
+<p>The first call, platform_bootstrap(), is a minimalist function that
+places the system into an executable state. This function MUST NOT include
+operations besides those which are absolutely necessary for further code,
+such as scheduler initialization, to execute.
+Examples of platform_bootstrap() operations are configuring the memory
+system and setting the processor mode. Generally, platform_bootstrap()
+is an empty function. TinyOS's top-level include file, <tt class="docutils literal"><span class="pre">tos.h</span></tt>, includes
+a default implementation of this function which does nothing. If a platform
+needs to replace the default, it SHOULD put it in a platform's
+<tt class="docutils literal"><span class="pre">platform.h</span></tt> file as a #define. The implementation of <tt class="docutils literal"><span class="pre">tos.h</span></tt>
+supports this:</p>
+<pre class="literal-block">
+/* This platform_bootstrap macro exists in accordance with TEP
+   107. A platform may override this through a platform.h file. */
+#include &lt;platform.h&gt;
+#ifndef platform_bootstrap
+#define platform_bootstrap() {}
+#endif
+</pre>
+<p>The boot sequence has three separate initializations: Scheduler,
+PlatformInit, and SoftwareInit. The boot configuration (MainC) wires
+the first two automatically, to TinySchedulerC (discussed in TEP 106)
+and to PlatformC:</p>
+<pre class="literal-block">
+configuration MainC {
+  provides interface Boot;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  components PlatformC, RealMainP, TinySchedulerC;
+
+  RealMainP.Scheduler -&gt; TinySchedulerC;
+  RealMainP.PlatformInit -&gt; PlatformC;
+
+  // Export the SoftwareInit and Booted for applications
+  SoftwareInit = RealMainP.SoftwareInit;
+  Boot = RealMainP;
+}
+</pre>
+<p>MainC exports the Boot and SoftwareInit interfaces for applications to
+wire to. TinySchedulerC is the standard name for the TinyOS
+scheduler. As the initialization sequence requires being able to run
+tasks, the boot sequence initializes it first. The second step of
+initialization is to call PlatformInit.init(), which MainC wires to a
+component named PlatformC. PlatformInit is for initializations which
+must follow a very specific order due to hidden dependencies, e.g., as
+part of making the overall hardware platform operable. One example of
+this sort of initialization is clock calibration. Because PlatformInit
+calls the component PlatformC, each platform can specify the required
+initialization order. As these hidden dependencies must be due to
+hardware, the sequence is platform-specific. A port of TinyOS to a
+new plaform MUST include a component PlatformC which provides
+one and only one instance of the Init interface.</p>
+<p>Initializations invoked
+through PlatformC meet some or all of the following criteria:</p>
+<ol class="arabic simple">
+<li>The initialization requires configuring hardware resources. This implies that the code is platform-specific.</li>
+<li>The initialization should always be performed.</li>
+<li>The initialization is a prerequisite for common services in the system.</li>
+</ol>
+<p>Three example operations that often belong in PlatformInit are I/O pin
+configuration, clock calibration, and LED configuration. I/O pin
+configuration meets the first two criteria. It should always be performed
+(regardless of what components the OS uses) for low-power reasons:
+incorrectly configured pins can draw current and prevent the MCU from
+entering its lowest power sleep state <a class="footnote-reference" href="#id8" id="id3" name="id3">[2]</a>. Clock calibration meets
+all three criteria. LED configuration is a special case: while it
+nominally meets all three criteria, the most important one is the third:
+as LEDs are often needed during SoftwareInit initialization, they must
+be set up before it is invoked.</p>
+<p>Note that not all code which meets some of these criteria is wired through
+PlatformC. In particular, criterion 1 is typically necessary but not
+sufficient to require PlatformC. For example, a timer system that
+configures overflow and capture settings or  a UART stack that sets the
+baud rate and transmission options can often be wired to SoftwareInit.
+They are encapsulated abstractions which will not be invoked or
+started until the boot event, and only need to be configured if the
+system includes their functionality.</p>
+<p>Components whose initialization does not directly depend on hardware
+resources SHOULD wire to MainC.SoftwareInit. If a component requires a
+specific initialization ordering, then it is responsible for
+establishing that ordering. Due to the semantics of Init, this is
+usually quite rare; a component SHOULD NOT introduce initialization
+dependencies unless they are required.</p>
+<p>One common approach is for a configuration to &quot;auto-wire&quot; the
+initialization routines of its internal components. The configuration
+does not provide an Init interface. Virtualized services
+often take this approach, as the service, rather than the clients, is
+what needs to be initialized. For example, the standard Timer
+virtualization <a class="footnote-reference" href="#id9" id="id4" name="id4">[3]</a>, TimerMilliC, wires to TimerMilliP, which is
+a very simple configuration that takes the underlying implementation
+(HilTimerMilliC) and wires it to MainC:</p>
+<pre class="literal-block">
+configuration TimerMilliP {
+  provides interface Timer&lt;TMilli&gt; as Timinitialization in ordererMilli[uint8_t id];
+}
+implementation {
+  components HilTimerMilliC, MainC;
+  MainC.SoftwareInit -&gt; HilTimerMilliC;
+  TimerMilli = HilTimerMilliC;
+}
+</pre>
+<p>Rather than require an application to wire HilTimerMilliC to MainC,
+TimerMilliP does it automatically. When a component instantiates a
+TimerMilliC, that names TimerMilliP, which will automatically make
+sure that the timer system is initialized when TinyOS boots.</p>
+</div>
+<div class="section">
+<h2><a id="interrupts-in-initialization" name="interrupts-in-initialization">4.2 Interrupts in Initialization</a></h2>
+<p>Interrupts are not enabled until all calls to Init.init have returned.
+If a component's initialization needs to handle interrupts, it can
+do one of three things:</p>
+<blockquote>
+<ol class="arabic simple">
+<li>If a status flag for the interrupt exists, the Init.init()
+implementations SHOULD use a spin loop to test for when
+an interrupt has been issued.</li>
+<li>If no such flag exists, the Init.init() implementation MAY
+temporarily enable interrupts, if doing so will not cause any other
+components to handle an interrupt. That is, if a component enables
+an interrupt, it MUST NOT enable interrupts whose handlers would
+invoke any other component. Furthermore, when Init.init() exits,
+the interrupts must be disabled.</li>
+<li>If no such flag exists and there is no way to isolate which
+interrupt handlers are called, then the component MUST rely
+on mechanisms outside the Init sequence, such as SplitControl.</li>
+</ol>
+</blockquote>
+<p>The boot sequence assumes that 1) is by far the dominant case. There
+are, however, possible situations where a component might need to
+handle an interrupt because of, e.g., hardware limitations (no pending
+flag) or to catch a brief edge transition. In these cases, a component
+can handle an interrupt in the boot sequence only if doing so will not
+cause any other component to handle an interrupt. As they have all
+been written assuming that interrupts are not enabled until after Init
+completes, making one of them handle an interrupt could cause it to
+fail.</p>
+<p>Depending on what capabilities the hardware provides, there are
+several ways to meet these requirements. The simplest is to push these
+initialization edge cases out of the main boot sequence, e.g., into
+SplitControl. A second possibility is to redirect the interrupt table,
+if the MCU supports doing so. Whichever mechanism is chosen, extreme
+care needs to be used in order to not disrupt the operation of other
+components.</p>
+<p>Unless part of a hardware abstraction architecture (HAA) <a class="footnote-reference" href="#id10" id="id5" name="id5">[4]</a>, the
+Init.init() command MUST NOT assume that other components have been
+initialized unless it has initialized them, and MUST NOT call any
+functional interfaces on any components that might be shared or
+interact with shared resources.  Components MAY call functions
+on other components that are completely internal to the subsystem.
+For example, a networking layer can  call queue operations to
+initialize its queue, but a link layer must not send commands
+over an SPI bus.  An HAA
+component MAY make other calls to initialize hardware state. A
+component that is not part of an HAA SHOULD NOT call Init.init() on
+other components unless it needs to enforce a temporal ordering on
+initialization.</p>
+<p>If a component A depends on another component, B,
+which needs to be initialized, then A SHOULD wire B's Init directly
+to the boot sequence, unless there is a temporal ordering requirement to
+the initialization. The purpose of this convention is to simplify
+component initialization and the initialization sequence.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">5. Implementation</a></h1>
+<p>The following files in <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/system</span></tt> contain the reference
+implementations of the TinyOS boot sequence:</p>
+<blockquote>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">RealMainP.nc</span></tt> is the module containing the function <tt class="docutils literal"><span class="pre">main</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">MainC.nc</span></tt> is the configuration that wires RealMainP to
+PlatformC and TinySchedulerC <a class="footnote-reference" href="#id7" id="id6" name="id6">[1]</a>.</li>
+</ul>
+</blockquote>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">6. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Philip Levis</div>
+<div class="line">467 Soda Hall</div>
+<div class="line">UC Berkeley</div>
+<div class="line">Berkeley, CA 94720</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 510 290 5283</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.berkeley.edu">pal&#64;cs.berkeley.edu</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">7. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id7" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id7">[1]</a></td><td><em>(<a class="fn-backref" href="#id1">1</a>, <a class="fn-backref" href="#id6">2</a>)</em> TEP 106: Schedulers and Tasks.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id8" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="id8">[2]</a></td><td>TEP 112: Microcontroller Power Management.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id9" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id4" name="id9">[3]</a></td><td>TEP 102: Timers.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id10" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id5" name="id10">[4]</a></td><td>TEP 2: Hardware Abstraction Architecture.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="resource-arbitration">
+<h1 class="title">Resource Arbitration</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">108</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Authors:</th>
+<td>Kevin Klues
+<br />Philip Levis
+<br />David Gay
+<br />David Culler
+<br />Vlado Handziski</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo documents the general resource sharing mechanisms for TinyOS
+2.x. These mechanisms are used to allow multiple software components to
+arbitrate access to shared abstractions.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>TinyOS 1.x has two mechanisms for managing shared resources:
+virtualization and completion events. A virtualized resource appears
+as an independent instance of an abstraction, such as the Timer
+interface in TimerC. A client of a Timer instance can use it
+independently of the others: TimerC virtualizes the underlying
+hardware clock into N separate timers.</p>
+<p>Some abstractions, however, are not well suited to virtualization:
+programs need the control provided by a physical abstraction. For
+example, components in 1.x share a single communication stack,
+GenericComm.  GenericComm can only handle one outgoing packet at a
+time. If a component tries to send a packet when GenericComm is
+already busy, then the call returns FAIL. The component needs a way to
+tell when GenericComm is free so it can retry. TinyOS
+1.x provides the mechanism of a global completion event which is
+signaled whenever a packet send completes. Interested components can
+handle this event and retry.</p>
+<p>This approach to physical (rather than virtualized) abstractions
+has several drawbacks:</p>
+<ul class="simple">
+<li>If you need to make several requests, you have to handle the
+possibility of a request returning FAIL at any point. This complicates
+implementations by adding internal states.</li>
+<li>You have no control over the timing of a sequence of operations. One
+example of when this can be a problem is timing-sensitive use of an
+A/D converter.  You need a way to pre-reserve the use of the ADC so
+that its operations can be run at the exact moment they are desired.</li>
+<li>If a hardware resource supports reservation, you cannot express this
+via this software interface. For instance, I2C buses have a
+concept of &quot;repeated start&quot; when doing multiple bus transactions,
+but it is not clear how to use this in TinyOS 1.x's I2C abstraction.</li>
+<li>Most TinyOS 1.x services do not provide a very convenient way of
+monitoring an abstraction's availability for the purpose of retries,
+nor very clear documentation of which requests could happen simultaneously.</li>
+</ul>
+<p>It should be clear that a single approach to resource sharing is not appropriate
+for all circumstances. For instance, requiring explicit reservation of a
+resource allows programs to have better timing guarantees for access to an A/D
+converter. If a program does not need precise timing guarantees, however (e.g.,
+when measuring temperature in a biological monitoring application), this extra
+resource reservation step unnecessarily complicates code and can be handled
+nicely using virtualization. The following section introduces the concept of
+resource classes in order to address this issue.  The sharing policy used by a
+particular resource abstraction is dictated by the resource class it belongs to.</p>
+</div>
+<div class="section">
+<h1><a id="resource-classes" name="resource-classes">2. Resource Classes</a></h1>
+<p>TinyOS 2.x distinguishes between three kinds of abstractions:
+<em>dedicated</em>, <em>virtualized</em>, and <em>shared</em>.  Components offer resource
+sharing mechanisms appropriate to their goals and level of abstraction.</p>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">It is important to point out that Hardware Presentation Layer (HPL)
+components of the HAA <a class="footnote-reference" href="#id4" id="id1" name="id1">[1]</a> can never be virtualized, as virtualization
+inevitably requires state. Depending on their
+expected use, HPL abstractions can either be dedicated or
+shared. For example, while hardware timers are rarely
+multiplexed between multiple components, buses almost always are.
+This can be seen on the MSP430 microcontroller, where the compare and
+counter registers are implemented as dedicated resources, and the USARTs
+are shared ones.</p>
+</div>
+<div class="section">
+<h2><a id="dedicated" name="dedicated">2.1 Dedicated</a></h2>
+<p>An abstraction is <em>dedicated</em> if it is a resource
+which a subsystem needs exclusive access to at all times.
+In this class of resources, no sharing policy is needed since only
+a single component ever requires use of the resource.  Examples of
+dedicated abstractions include interrupts and counters.</p>
+<p>Dedicated abstractions MAY be annotated with the nesC attribute
+&#64;atmostonce or &#64;exactlyonce to provide compile-time checks that
+their usage assumptions are not violated.</p>
+<p>Please refer to Appendix A for an example of how a dedicated
+resource might be represented, including the use of
+the nesC &#64;exactlyonce attribute.</p>
+</div>
+<div class="section">
+<h2><a id="virtualized" name="virtualized">2.2 Virtualized</a></h2>
+<p><em>Virtual</em> abstractions hide multiple clients from each other
+through software virtualization. Every client of a virtualized resource
+interacts with it as if it were a dedicated resource, with all virtualized
+instances being multiplexed on top of a single underlying resource. Because
+the virtualization is done in software, there is no upper bound on the number
+of clients using the abstraction, barring memory or efficiency constraints.
+As virtualization usually requires keeping state that scales with the number
+of virtualized instances, virtualized resources often use the Service Instance
+pattern <a class="footnote-reference" href="#id6" id="id2" name="id2">[3]</a>, which is based on a parameterized interface.</p>
+<p>Virtualization generally provides a very simple interface to its clients.
+This simplicity comes at the cost of reduced efficiency and an inability to
+precisely control the underlying resource. For example, a virtualized
+timer resource introduces CPU overhead from dispatching and maintaining
+each individual virtual timer, as well as introducing jitter whenever two
+timers happen to fire at the same time. Please refer to Appendix A for an
+example of how such a virtualized timer resource might be implemented.</p>
+</div>
+<div class="section">
+<h2><a id="shared" name="shared">2.3 Shared</a></h2>
+<p>Dedicated abstractions are useful when a resource is
+always controlled by a single component. Virtualized abstractions are
+useful when clients are willing to pay a bit of overhead and sacrifice
+control in order to share a resource in a simple way. There are
+situations, however, when many clients need precise control of a
+resource. Clearly, they can't all have such control at the same time:
+some degree of multiplexing is needed.</p>
+<p>A motivating example of a shared resource is a bus.
+The bus may have multiple peripherals on it, corresponding to
+different subsystems. For example, on the Telos platform the flash
+chip (storage) and the radio (network) share a bus. The storage and
+network stacks need exclusive access to the bus when using it,
+but they also need to share it with the other subsystem. In this
+case, virtualization is problematic, as the radio stack needs to be
+able to perform a series of operations in quick succession without
+having to reacquire the bus in each case. Having the bus be a
+shared resource allows the radio stack to send a series of operations
+to the radio atomically, without having to buffer them all up
+in memory beforehand (introducing memory pressure in the process).</p>
+<p>In TinyOS 2.x, a resource <em>arbiter</em> is responsible for multiplexing
+between the different clients of a shared resource. It determines
+which client has access to the resource at which time. While a client
+holds a resource, it has complete and unfettered control. Arbiters assume
+that clients are cooperative, only acquiring the resource when needed
+and holding on to it no longer than necessary. Clients explicitly
+release resources: there is no way for an arbiter to forcibly reclaim it.
+The following section is dedicated to describing the arbiter and its
+interfaces.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="resource-arbiters" name="resource-arbiters">3. Resource Arbiters</a></h1>
+<p>Every shared resource has an arbiter to manage which client
+can use the resource at any given time. Because an arbiter is a
+centralized place that knows whether the resource is in use, it can also
+provide information useful for a variety of other services, such as
+power management. An arbiter MUST provide a parameterized Resource
+interface as well as an instance of the ArbiterInfo interface. The Resource
+interface is instantiated by different clients wanting to gain access to a
+resource.  The ArbiterInfo interface is used by components that wish to
+retrieve global information about the status of a resource (i.e. if it is in
+use, who is using it, etc.).  An arbiter SHOULD also provide a parameterized
+ResourceRequested interface and use a parameterized ResourceConfigure interface.
+It MAY also provide an instance of the ResourceDefaultOwner interface or
+any additional interfaces specific to the particular arbitration policy
+being implemented.  Each of these interfaces is explained in greater detail below:</p>
+<pre class="literal-block">
+Resource     ArbiterInfo ResourceRequested     ResourceDefaultOwner
+   |                |         |                        |
+   |                |         |                        |
+   |               \|/       \|/                       |
+   |             \---------------/                     |
+   |--------------|   Arbiter   |----------------------|
+                 /---------------\
+                         |
+                         |
+                        \|/
+                  ResourceConfigure
+</pre>
+<div class="section">
+<h2><a id="resource" name="resource">3.1 Resource</a></h2>
+<p>Clients of an arbiter request access
+to a shared resource using the Resource interface:</p>
+<pre class="literal-block">
+interface Resource {
+  async command error_t request();
+  async command error_t immediateRequest();
+  event void granted();
+  async command error_t release();
+  async command bool isOwner();
+}
+</pre>
+<p>A client lets an arbiter know it needs access to a resource by
+making a call to request(). If the resource is free,
+SUCCESS is returned, and a granted event is signaled
+back to the client.  If the resource is busy, SUCCESS will
+still be returned, but the request will be queued
+according to the queuing policy of the arbiter. Whenever a client is
+done with the resource, it calls the release() command, and the next
+client in the request queue is given access to the resource and
+is signaled its granted() event. If a client ever makes multiple
+requests before receiving a granted event, an EBUSY value is returned,
+and the request is not queued.  Using this policy, clients are not able to
+monolopize the resource queue by making multiple requests, but they may still be
+able to monopolize the use of the resource if they do not release it in a
+timely manner.</p>
+<p>Clients can also request the use of a resource through the
+immediateRequest() command.  A call to immediateRequest() can either
+return SUCCESS or FAIL, with requests made through this command never being
+queued.  If a call to immediateRequest() returns SUCCESS, the client is granted
+access to the resource immediately after the call has returned, and no granted
+event is ever signaled.  If it returns FAIL, the client is not granted access to
+the resource and the request does not get queued.  The client will have to try
+and gain access to the resource again later.</p>
+<p>A client can use the isOwner command of the Resource interface to
+check if it is the current owner of the resource.  This command is mostly
+used to perform runtime checks to make sure that clients not owning a resource
+are not able to use it.  If a call to isOwner fails, then no call
+should be made to commands provided by that resource.</p>
+<p>The diagram below shows how a simple shared resource can be
+built from a dedicated resource by using just the Resource interface
+provided by an arbiter.:</p>
+<pre class="literal-block">
+         /|\                    /|\
+          |                      |
+          | Data Interface       | Resource
+          |                      |
+--------------------------------------------
+|               Shared Resource            |
+--------------------------------------------
+         /|\                    /|\
+          |                      |
+          | Data Interface       | Resource
+          |                      |
+----------------------      ----------------
+| Dedicated Resource |      |    Arbiter   |
+----------------------      ----------------
+</pre>
+<p>An arbiter MUST provide exactly one parameterized Resource interface,
+where the parameter is a client ID, following the Service
+Instance pattern[3]_.  An arbitrated component SomeNameP MUST
+#define SOME_NAME_RESOURCE to a string which can be passed to unique()
+to obtain a client id.  This #define must be placed in a separate file
+because of the way nesC files are preprocessed: including the
+SomeNameP component isn't enough to ensure that macros #define'd in
+SomeNameP are visible in the referring component.</p>
+<p>Please refer to Appendix B for an example of how to wrap a component of this type
+inside a generic configuration. Wrapping the component in this way ensures that
+each Resource client is given a unique client ID, with the added
+benefit of properly coupling multiple components that all need to
+refer to the same client ID.</p>
+<p>Appendix B also provides a complete example of how an I2C resource might be
+abstracted according to this pattern.  For further examples see the various
+chip implementations in the tinyos-2.x source tree under tinyos-2.x/chips/</p>
+</div>
+<div class="section">
+<h2><a id="arbiterinfo" name="arbiterinfo">3.2 ArbiterInfo</a></h2>
+<p>Arbiters MUST provide an instance of the ArbiterInfo interface.
+The ArbiterInfo interface allows a component to query the current
+status of an arbiter:</p>
+<pre class="literal-block">
+interface ArbiterInfo {
+  async command bool inUse();
+  async command uint8_t clientId();
+}
+</pre>
+<p>In contrast to the parameterized Resource interface provided by an arbiter,
+only a single ArbiterInfo interface is provided.  Its purpose is
+to allow one to find out:</p>
+<ul class="simple">
+<li>Whether the resource for which it is arbitrating use is currently in use or not</li>
+<li>Which client is using it.</li>
+</ul>
+<p>One can view ArbiterInfo as an interface for obtaining global information about
+the use of a resource, while Resource can be viewed as an interface for obtaining
+local access to that resource.</p>
+<p>The primary use of the ArbiterInfo interface is to allow a shared resource to reject
+any calls made through its data interface by clients that do not currently have access to
+it.  For an example of how this interface is used in this fashion refer to Appendix B.:</p>
+<pre class="literal-block">
+         /|\                        /|\
+          |                          |
+          | Data Interface           | Resource
+          |                          |
+-----------------------------------------------------------
+|                     Shared Resource                     |
+-----------------------------------------------------------
+         /|\                    /|\         /|\
+          |                      |           |
+          | Data Interface       | Resource  | ArbiterInfo
+          |                      |           |
+----------------------      -------------------------------
+| Dedicated Resource |      |           Arbiter           |
+----------------------      -------------------------------
+</pre>
+</div>
+<div class="section">
+<h2><a id="resourcerequested" name="resourcerequested">3.3 ResourceRequested</a></h2>
+<p>Sometimes it is useful for a client to be able to hold onto a resource until
+someone else needs it and only at that time decide to release it.  Using the
+ResourceRequested interface, this information is made available to the current
+owner of a resource:</p>
+<pre class="literal-block">
+interface ResourceRequested {
+  async event void requested();
+  async event void immediateRequested();
+}
+</pre>
+<p>A requested event is signaled to the current owner of the resource if another
+client makes a request for the resource through the request() command of
+its Resource interface.  If a request is made through the immediateRequest()
+command, then the immediateRequested() event is signaled.</p>
+<p>An arbiter SHOULD provide a parameterized ResourceRequested interface to its
+clients, but is not required to.  The client id of the parameterized
+ResourceRequested interface should be coupled with the client id of the Resource
+interface to ensure that all events are signaled to the proper clients.  Please
+refer to Appendix B for an example of how this interface might be used.:</p>
+<pre class="literal-block">
+         /|\                        /|\                   /|\
+          |                          |                     |
+          | Data Interface           | Resource            | ResourceRequested
+          |                          |                     |
+--------------------------------------------------------------------------------
+|                              Shared Resource                                 |
+--------------------------------------------------------------------------------
+         /|\                    /|\         /|\            /|\
+          |                      |           |              |
+          | Data Interface       | Resource  | ArbiterInfo  | ResourceRequested
+          |                      |           |              |
+----------------------      ----------------------------------------------------
+| Dedicated Resource |      |                     Arbiter                      |
+----------------------      ----------------------------------------------------
+</pre>
+</div>
+<div class="section">
+<h2><a id="resourceconfigure" name="resourceconfigure">3.4 ResourceConfigure</a></h2>
+<p>The existence of the ResourceConfigure interface allows a resource to be
+automatically configured just before a client is granted access to it.
+Components providing the ResourceConfigure interface use the interfaces
+provided by an underlying dedicated resource to configure it into one
+of its desired modes of operation.  A cleint then wires its shared resource
+abstraction to the component implementing the desired configuration.  The
+configure command is called immediataely before the client is granted access
+to the resource, and the unconfigure command is called just before fully
+releasing it.:</p>
+<pre class="literal-block">
+interface ResourceConfigure {
+  async command void configure();
+  async command void unconfigure();
+}
+</pre>
+<pre class="literal-block">
+  ResourceConfigure       ResourceConfigure      ResourceConfigure
+         |                       |                     /|\
+         |                       |                      |
+        \|/                     \|/                     |
+-------------------     -------------------    -------------------
+| Configuration 1 |     | Configuration 2 |    | Shared Resource |
+-------------------     -------------------    -------------------
+         |                       |                     /|\
+         |   Control Interface   |                      | ResourceConfigure
+        \|/                     \|/                     |
+      ------------------------------               -----------
+      |     Dedicated Resource     |               | Arbiter |
+      ------------------------------               -----------
+</pre>
+<p>The arbiter SHOULD use a parameterized ResourceConfigure interface, with
+its client ID parameter coupled with the client id of its parameterized
+Resource interface.  If an arbiter uses the ResourceConfigure interface,
+it MUST call ResourceConfigure.configure() on the granted client ID
+before it signals the Resource.granted() event. Similarly, after a valid
+call to Resource.release(), it MUST call ResourceConfigure.unconfigure()
+on the releasing client ID.  By calling ResourceConfigure.configure() just
+before granting a client access to a resource and calling
+ResourceConfigure.unconfigure() just before fully releasing it, it is guaranteed
+that a resource is always unconfigured before an attempt to configure it can be
+made again.</p>
+<p>The commands included in this interface could have been made part of the standard
+Resource interface (and changed into callback events), but at a higher cost than
+keeping them separate. Introducing these new commands into the Resource interface
+would have lead to a large number of clients all including redundant configuration
+code, while using the call out approach to a separate component ensures that we
+only have a single instance of the code.</p>
+<p>For an example of how configurations for the three different modes of the
+Msp430 Usart component can take advantage of the ResourceConfigure
+interface refer to Appendix B as well as section 4 on the use of
+cross-component reservation.</p>
+</div>
+<div class="section">
+<h2><a id="resourcedefaultowner" name="resourcedefaultowner">3.5 ResourceDefaultOwner</a></h2>
+<p>The normal Resource interface is for use by clients that all share the resource
+in an equal fashion. The ResourceDefaultOwner interface is for use by a single
+client that needs to be given control of the resource whenever no one else is
+using it. An arbiter MAY provide a single instance of the ResourceDefaultOwner
+interface. It MUST NOT provide more than one.:</p>
+<pre class="literal-block">
+interface ResourceDefaultOwner {
+  async event void granted();
+  async command error_t release();
+  async command bool isOwner();
+  async event void requested();
+  async event void immediateRequested();
+}
+</pre>
+<p>The Arbiter MUST guarantee that the client of the ResourceDefaulrClient interface is
+made the owner of the resource before the boot initialization sequence is
+completed.  When a normal resource client makes a request for the resource, the
+ResourceDefaultOwner will receive either a requested() or an immediateRequested()
+event depending on how the request was made.  It must then decide if and when to
+release it.  Once released, all clients that have pending requests will be
+granted access to the resource in the order determined by the queuing policy of
+the arbiter in use.  Once all pending requests have been granted (including
+those that came in while other clients had access to the resource), the
+ResourceDefaultOwner is automatically given control of the resource, receiving its
+granted() event in the process.  The ResourceDefaultOwner interface also contains
+the same isOwner() command as the normal Resource interface, and the semantics
+of its use are exactly the same.</p>
+<p>Although the ResourceDefaultOwner interface looks similar to a combination of the
+normal Resource interface and the ResourceRequested interface, its intended use
+is quite different.  The ResourceDefaultOwner interface should only be used by
+clients that wish to have access to a resource only when no other clients are
+using it.  They do not actively seek access to the resource, but rather use
+it to perform operations when it would otherwise simply be idle.</p>
+<p>The primary motivation behind the definition of the ResourceDefaultOwner
+interface is to allow for an easy integration of power management
+for a resource with its arbitration policy.  Arbiters that want to allow
+a resource to be controlled by a particular power management policy can
+provide the ResourceDefaultOwner interface for use by a component that
+implements that policy. The power management component will receive the
+granted() event whenever the resource has gone idle, and will proceed in
+powering it down.  When another client requests the resource, the power
+manager will be notified through either the requested() or
+immediateRequested() events as appropriate.  It can then power up the resource
+and release it once the power up has completed.  Note that if power up is
+a split-phase operation (takes a while), then calls by clients to
+immediateRequest() when in the powered down state will return
+FAIL. Please see the TEP on the Power Management of Non-Virtualized devices
+(<a class="footnote-reference" href="#id7" id="id3" name="id3">[4]</a>) for more details.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="cross-component-reservation" name="cross-component-reservation">4. Cross-Component Reservation</a></h1>
+<p>In some cases, it is desirable to share the reservation of a
+single resource across multiple components. For example, on the TI
+MSP430, a single USART component can be used as an I2C bus, a UART,
+or an SPI connection. Clearly, on this chip, a reservation of the I2C
+bus implicitly restricts the corresponding UART and SPI
+services from gaining access to the resource. Enforcing such a policy
+can be accomplished in the framework described above by:</p>
+<blockquote>
+<ol class="arabic simple">
+<li>Creating a set of unique ids for each service using the shared
+resource.</li>
+<li>Mapping these ids onto the ids of the underlying resource</li>
+</ol>
+</blockquote>
+<p>Clients connecting to these services do not know that that this
+mapping is taking place.  As far as they are concerned, the only
+arbitration taking place is between other clients using the same
+service.  In the MSP430 example, a single client of the I2C bus could
+be contending with a single client of the SPI connection, but they
+would probably have the same service level client ID.  These two
+service level client ids would be mapped onto 2 unique resource ids
+for use by the shared USART component. The proper way to achieve this
+mapping is through the use of generic components.  The example given
+below shows how to perform this mapping for the SPI component on the
+MSP430.  It is done similarly for the UART and I2C bus:</p>
+<pre class="literal-block">
+#include &quot;Msp430Usart.h&quot;
+generic configuration Msp430Spi0C() {
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+}
+implementation {
+  enum { CLIENT_ID = unique(MSP430_SPIO_BUS) };
+
+  components Msp430Spi0P as SpiP;
+  Resource = SpiP.Resource[ CLIENT_ID ];
+  SpiByte = SpiP.SpiByte;
+  SpiPacket = SpiP.SpiPacket[ CLIENT_ID ];
+
+  components new Msp430Usart0C() as UsartC;
+  SpiP.UsartResource[ CLIENT_ID ] -&gt; UsartC.Resource;
+  SpiP.UsartInterrupts -&gt; UsartC.HplMsp430UsartInterrupts;
+}
+</pre>
+<p>The definition of the MSP430_SPIO_BUS string is defined in
+Msp430Usart.h. A unique id is created from this string every time a
+new Msp430Spi0C component is instantiated.  This id is used as a
+parameter to the parameterized Resource interface provided by the
+Msp430Spi0P component.  This is where the mapping of the two
+different ids begins.  As well as <em>providing</em> a parameterized
+Resource interface (Msp430Spi0P.Resource), the Msp430Spi0P component
+also <em>uses</em> a parameterized Resource interface (Msp430Spi0P.UsartResource).
+Whenever a client makes a call through the provided Resource interface
+with id CLIENT_ID, an underlying call to the Msp430Spi0P.Resource interface
+with the same id is implicitly made.  By then wiring the Msp430Spi0P.UsartResource
+interface with id CLIENT_ID to an instance of the Resource interface
+provided by the instantiation of the Msp430Usart0C component, the mapping
+is complete. Any calls to the Resource interface provided by a new
+instantiation of the Msp430Spi0C component will now be made through a
+unique Resource interface on the underlying  Msp430Usart0C component.</p>
+<p>This level of indirection is necessary because it may not always be
+desirable to directly wire the service level Resource interface to
+the underlying shared Resource interface.  Sometimes we may want to
+perform some operations between a service level command being
+called, and calling the underlying command on the shared resource.
+With such a mapping, inserting these operations is made possible.</p>
+<p>Having such a mapping is also important for services that need to
+explicitly keep track of the number of clients they have,
+independent from how many total clients the underlying shared
+resource has.  For example, a sensor implementation that uses an
+underlying ADC resource may wish to power down its sensor whenever it
+has no clients.  It doesn't want to have to wait until the entire ADC
+is free to do so.  Providing this mapping allows the implicit power
+manager components described in TEP 115 to be wired in at both levels
+of the abstraction without interfering with one another.  In this
+way, implementations of these components become much simpler, and code
+reuse is encouraged.</p>
+<p>Implementations of components similar to this one can be found in the
+tinyos-2.x source tree in the tos/chips/msp430/uart directory</p>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">5. Implementation</a></h1>
+<p>Because most components use one of a small number of arbitration
+policies, tinyos-2.x includes a number of default resource arbiters. These
+arbiters can be found in <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/system</span></tt> and are all
+generic components that include one of the two signatures seen below:</p>
+<pre class="literal-block">
+generic module SimpleArbiter {
+  provides interface Resource[uint8_t id];
+  provides interface ResourceRequested[uint8_t id];
+  provides interface ArbiterInfo;
+  uses interface ResourceConfigure[uint8_t id];
+}
+
+generic module Arbiter {
+  provides interface Resource[uint8_t id];
+  provides interface ResourceRequested[uint8_t id];
+  provides interface ResourceDefaultOwner;
+  provides interface ArbiterInfo;
+  uses interface ResourceConfigure[uint8_t id];
+}
+</pre>
+<p>The &quot;Simple&quot; arbiters are intended for use by resources that
+do not require the additional overhead incurred by providing the
+ResourceDefaultOwner interface.</p>
+<p>For many situations, changing an arbitration policy requires nothing
+more than changing the queuing policy it uses to decide the order in
+which incoming requests should be granted. In this way, separating
+queuing policy implementations from actual arbitration implementations
+encourages code reuse.  The introduction of the SimpleArbiterP and
+ArbiterP components found under tinyos-2.x/tos/system help in this
+separation.  They can be wired to components providing
+a particular queuing policy through the use of the ResourceQueue
+interface.:</p>
+<pre class="literal-block">
+interface ResourceQueue {
+  async command bool isEmpty();
+  async command bool isEnqueued(resource_client_id_t id);
+  async command resource_client_id_t dequeue();
+  async command error_t enqueue(resource_client_id_t id);
+}
+</pre>
+<p>An example of wiring a First-Come-First-Serve (FCFS) queuing policy to
+the SimpleArbiterP component using the ResourceQueue interface
+defined above can be seen below:</p>
+<pre class="literal-block">
+generic configuration SimpleFcfsArbiterC(char resourceName[]) {
+  provides {
+    interface Resource[uint8_t id];
+    interface ResourceRequested[uint8_t id];
+    interface ArbiterInfo;
+  }
+  uses interface ResourceConfigure[uint8_t id];
+}
+implementation {
+  components MainC;
+  components new FcfsResourceQueueC(uniqueCount(resourceName)) as Queue;
+  components new SimpleArbiterP() as Arbiter;
+
+  MainC.SoftwareInit -&gt; Queue;
+
+  Resource = Arbiter;
+  ResourceRequested = Arbiter;
+  ArbiterInfo = Arbiter;
+  ResourceConfigure = Arbiter;
+
+  Arbiter.Queue -&gt; Queue;
+}
+</pre>
+<p>This generic configuration can be instantiated by a resource in order
+to grant requests made by its clients in an FCFS fashion.</p>
+<p>All of the default queuing policies provided in tinyos-2.x along with the
+respective arbitration components that have been built using them are
+given below:</p>
+<p>Queuing Policies:</p>
+<ul class="simple">
+<li>FcfsResourceQueueC</li>
+<li>RoundRobinResourceQueueC</li>
+</ul>
+<p>Arbiters:</p>
+<ul class="simple">
+<li>SimpleFcfsArbiterC</li>
+<li>FcfsArbiterC</li>
+<li>SimpleRoundRobinArbiterC</li>
+<li>RoundRobinArbiterC</li>
+</ul>
+<p>Keep in mind that neither the implementation of an arbiter nor its
+queuing policy can be used to explicitly restrict access to an
+underlying shared resource.  The arbiter simply provides a standardized
+way of managing client ids so that shared resources don't have to duplicate
+this functionality themselves every time they are implemented.  In order to
+actually restrict clients from using a resource without first requesting it,
+a shared resource must use the functionality provided by the ArbiterInfo interface
+to perform runtime checks on the current owner of a resource.  Please refer
+to the section on the ArbiterInfo interface in Appendix B for more information
+on how such runtime checks can be performed.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">6. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Kevin Klues</div>
+<div class="line">503 Bryan Hall</div>
+<div class="line">Washington University</div>
+<div class="line">St. Louis, MO 63130</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1-314-935-6355</div>
+<div class="line">email - <a class="reference" href="mailto:klueska&#64;cs.wustl.edu">klueska&#64;cs.wustl.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305-9030</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">David Gay</div>
+<div class="line">2150 Shattuck Ave, Suite 1300</div>
+<div class="line">Intel Research</div>
+<div class="line">Berkeley, CA 94704</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 510 495 3055</div>
+<div class="line">email - <a class="reference" href="mailto:david.e.gay&#64;intel.com">david.e.gay&#64;intel.com</a></div>
+<div class="line"><br /></div>
+<div class="line">David Culler</div>
+<div class="line">627 Soda Hall</div>
+<div class="line">UC Berkeley</div>
+<div class="line">Berkeley, CA 94720</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 510 643 7572</div>
+<div class="line">email - <a class="reference" href="mailto:culler&#64;cs.berkeley.edu">culler&#64;cs.berkeley.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Vlado Handziski</div>
+<div class="line">Sekr FT5</div>
+<div class="line">Einsteinufer 25</div>
+<div class="line">10587 Berlin</div>
+<div class="line">GERMANY</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:handzisk&#64;tkn.tu-berlin.de">handzisk&#64;tkn.tu-berlin.de</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">7. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id4" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="id4">[1]</a></td><td>TEP 2: Hardware Abstraction Architecture.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id5" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id10" name="id5">[2]</a></td><td>TEP 102: Timers.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id6" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="id6">[3]</a></td><td>Service Instance Pattern. In <em>Software Design Patterns for TinyOS.</em> David Gay, Philip Levis, and David Culler. Published in Proceedings of the ACM SIGPLAN/SIGBED 2005 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05).</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id7" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="id7">[4]</a></td><td>TEP 115: Power Management of Non-Virtualized Devices.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id8" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id9" name="id8">[5]</a></td><td>TinyOS Programming. <a class="reference" href="http://csl.stanford.edu/~pal/pubs/tinyos-programming-1-0.pdf">http://csl.stanford.edu/~pal/pubs/tinyos-programming-1-0.pdf</a></td></tr>
+</tbody>
+</table>
+</div>
+<div class="section">
+<h1><a id="appendix-a-resource-class-examples" name="appendix-a-resource-class-examples">Appendix A: Resource Class Examples</a></h1>
+<div class="section">
+<h2><a id="dedicated-resource" name="dedicated-resource">Dedicated Resource</a></h2>
+<p>Timer 2 on the Atmega128 microprocessor is a dedicated resource
+represented by the HplAtm128Timer2C component:</p>
+<pre class="literal-block">
+module HplAtm128Timer2C {
+  provides {
+    interface HplTimer&lt;uint8_t&gt;   as Timer2     &#64;exactlyonce();
+    interface HplTimerCtrl8       as Timer2Ctrl &#64;exactlyonce();
+    interface HplCompare&lt;uint8_t&gt; as Compare2   &#64;exactlyonce();
+  }
+}
+</pre>
+<p>Only a single client can wire to any of these interfaces as enforced through
+the nesC &#64;exactlyonce attribute.  Keep in mind that although the interfaces of
+this component are only allowed to be wired to once, nothing prevents the
+component wiring to them from virtualizing the services they provide at some
+higher level.  If you are unfamiliar with how &#64;exactlyonce and other nesC
+attributes are used to by the nesC compiler, please refer to section 9.1 of the
+TinyOS Programming Manual <a class="footnote-reference" href="#id8" id="id9" name="id9">[5]</a>.</p>
+</div>
+<div class="section">
+<h2><a id="virtualized-resource" name="virtualized-resource">Virtualized Resource</a></h2>
+<p>The TimerMilliC component provides a virtual abstraction of millisecond
+precision timers to application components <a class="footnote-reference" href="#id5" id="id10" name="id10">[2]</a>. It encapsulates the required
+parameterized Timer interface through the use of a generic configuration.
+Clients wishing to use a millisecond timer need only instantiate a single
+instance of the TimerMilliC generic, leaving the fact that it is virtualized
+underneath transparent.:</p>
+<pre class="literal-block">
+generic configuration TimerMilliC {
+  provides interface Timer&lt;TMilli&gt;;
+}
+implementation {
+  components TimerMilliP;
+  Timer = TimerMilliP.TimerMilli[unique(UQ_TIMER_MILLI)];
+}
+</pre>
+<p>The actual parameterized Timer interface is provided by the chip specific
+HilTimerMilliC component.  This interface is exposed through
+the TimerMilliP component which wires HilTimerMilliC to the boot
+initialization sequence:</p>
+<pre class="literal-block">
+configuration TimerMilliP {
+  provides interface Timer&lt;TMilli&gt; as TimerMilli[uint8_t num];
+}
+implementation {
+  components HilTimerMilliC, MainC;
+  MainC.SoftwareInit -&gt; HilTimerMilliC;
+  TimerMilli = HilTimerMilliC;
+}
+</pre>
+</div>
+</div>
+<div class="section">
+<h1><a id="appendix-b-arbiter-interface-examples" name="appendix-b-arbiter-interface-examples">Appendix B: Arbiter Interface Examples</a></h1>
+<!-- Note:
+Most of the examples provided in this section use complex nesC syntax that may
+be unfamiliar to the novice nesC programmer.  Please refer to the TinyOS
+programming Manual [5]_ for clarification as necessary. -->
+<div class="section">
+<h2><a id="id11" name="id11">Resource</a></h2>
+<p>Examples of how to use the Resource interface for arbitrating
+between multiple clients can be found in the tinyos-2.x
+source tree under tinyos-2.x/apps/tests/TestArbiter.</p>
+<p>A specific example of where the Resource.isOwner() is used
+can be seen in the HplTda5250DataP component of the Infineon
+Tda5250 radio implementation:</p>
+<pre class="literal-block">
+async command error_t HplTda5250Data.tx(uint8_t data) {
+  if(call UartResource.isOwner() == FALSE)
+    return FAIL;
+  call Usart.tx(data);
+  return SUCCESS;
+}
+</pre>
+<p>A call to the HplTda5250Data.tx command will fail if the radio does
+not currently have control of the underlying Usart resource.  If it
+does, then the Usart.tx(data) command is called as requested.</p>
+<p>A component using the Resource interface to implement an I2C
+service might look like this:</p>
+<pre class="literal-block">
+#include I2CPacket.h
+configuration I2CPacketP {
+  provides interface Resource[uint8_t client];
+  provides interface I2CPacket&lt;I2CAddrSize&gt;[uint8_t client];
+}
+implementation {
+  components new FcfsArbiterC(I2CPACKET_RESOURCE) as Arbiter;
+  components I2CPacketImplP() as I2C;
+  ...
+
+  Resource  = Arbiter;
+  I2CPacket = I2C;
+  ...
+}
+</pre>
+<p>where I2CPacketImplP contains the actual implementation of the
+I2C service, and I2CPacket.h contains the #define for the
+name of the resource required by the arbiter:</p>
+<pre class="literal-block">
+#ifndef I2CPACKETC_H
+#define I2CPACKETC_H
+#define I2CPACKET_RESOURCE &quot;I2CPacket.Resource&quot;
+#endif
+</pre>
+<p>This service would then be made available to a client through
+the generic configuration seen below:</p>
+<pre class="literal-block">
+#include I2CPacket.h
+generic configuration I2CPacketC {
+  provides interface Resource;
+  provides interface I2CPacket&lt;I2CAddrSize&gt;;
+}
+implementation {
+  enum { CLIENT_ID = unique(I2CPACKET_RESOURCE) };
+
+  components I2CPacketP as I2C;
+  Resource = I2C.Resource[CLIENT_ID];
+  I2CPacket = I2C.I2CPacket[CLIENT_ID];
+}
+</pre>
+<p>In this example, an instance of the I2CPacket interface is coupled with
+an instance of the Resource interface on every new instantiation of
+the I2CPacketC component.  In this way, a single Resource and a
+single I2CPacket interface can be exported by this component together
+for use by a client.</p>
+<p>Clients of the I2C service would use it as follows:</p>
+<pre class="literal-block">
+module I2CClientP {
+  uses interface Resource as I2CResource;
+  uses interface I2CPacket&lt;I2CAddrSize&gt;;
+} ...
+
+configuration I2CClientC { }
+implementation {
+  components I2CClientP, new I2CPacketC();
+
+  I2CClientP.I2CResource -&gt; I2CPacketC.Resource;
+  I2CUserM.I2CPacket -&gt; I2CPacket.I2CPacket;
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="id12" name="id12">ArbiterInfo</a></h2>
+<p>In the implementation of the ADC component on the Msp430 microcontroller,
+a simple arbiter is used to provide a round robin sharing policy
+between clients of the ADC:</p>
+<pre class="literal-block">
+configuration Msp430Adc12C {
+  provides interface Resource[uint8_t id];
+  provides interface Msp430Adc12SingleChannel[uint8_t id];
+  provides interface Msp430Adc12FastSingleChannel[uint8_t id];
+}
+implementation {
+  components Msp430Adc12P,MainC,
+             new SimpleRoundRobinArbiterC(MSP430ADC12_RESOURCE) as Arbiter,
+             ...
+
+  Resource = Arbiter;
+  SingleChannel = Msp430Adc12P.SingleChannel;
+  FastSingleChannel = Msp430Adc12P.FastSingleChannel;
+
+  Msp430Adc12P.Init &lt;- MainC;
+  Msp430Adc12P.ADCArbiterInfo -&gt; Arbiter;
+  ...
+}
+</pre>
+<p>In this configuration we see that the Resource interface provided by
+Msp430Adc12C is wired directly to the instance of the SimpleRoundRobinArbiterC
+component that is created.  The ArbiterInfo interface provided by
+SimpleRoundRobinArbiterC is then wired to Msp430Adc12P.  The Msp430Adc12P
+component then uses this interface to perform run time checks to ensure that
+only the client that currently has access to the ADC resource is able to
+use it:</p>
+<pre class="literal-block">
+async command error_t Msp430Adc12SingleChannel.getSingleData[uint8_t id]() {
+  if (call ADCArbiterInfo.clientId() == id){
+    configureChannel()
+    // Start getting data
+  }
+  else return ERESERVE;
+}
+
+async command error_t Msp430Adc12FastSingleChannel.configure[uint8_t id]() {
+  if (call ADCArbiterInfo.clientId() == id){
+    clientID = id
+    configureChannel()
+  }
+  else return ERESERVE;
+}
+
+async command error_t Msp430Adc12FastSingleChannel.getSingleData[uint8_t id]()
+{
+  if (clientID = id)
+    // Start getting data
+  else return ERESERVE;
+}
+</pre>
+<p>In order for these runtime checks to succeed, users of the
+Msp430Adc12SingleChannel and Msp430Adc12FastSingleChannel interfaces will have
+to match their client id's with the client id of a corresponding Resource
+interface.  This can be done in the following way:</p>
+<pre class="literal-block">
+generic configuration Msp430Adc12ClientC() {
+  provides interface Resource;
+  provides interface Msp430Adc12SingleChannel;
+}
+implementation {
+  components Msp430Adc12C;
+  enum { ID = unique(MSP430ADC12_RESOURCE) };
+
+  Resource = Msp430Adc12C.Resource[ID];
+  Msp430Adc12SingleChannel = Msp430Adc12C.SingleChannel[ID];
+}
+</pre>
+<pre class="literal-block">
+generic configuration Msp430Adc12FastClientC() {
+  provides interface Resource;
+  provides interface Msp430Adc12FastSingleChannel;
+}
+implementation {
+  components Msp430Adc12C;
+  enum { ID = unique(MSP430ADC12_RESOURCE) };
+
+  Resource = Msp430Adc12C.Resource[ID];
+  Msp430Adc12FastSingleChannel = Msp430Adc12C.SingleChannel[ID];
+}
+</pre>
+<p>Since these are generic components, clients simply need to instantiate them
+in order to get access to a single Resource interface that is already
+properly coupled with a Msp430Adc12SingleChannel or Msp430Adc12FastSingleChannel
+interface.</p>
+<p>Take a look in the tinyos-2.x source tree under tinyos-2.x/tos/chips/adc12
+to see the full implementation of these components in their original context.</p>
+</div>
+<div class="section">
+<h2><a id="id13" name="id13">ResourceRequested</a></h2>
+<p>On the eyesIFXv2 platform, both the radio and the flash need access to the bus
+provided by the Usart0 component on the Msp430 microcontroller.  Using
+a simple cooperative arbitration policy, these two components should able to
+share the Usart resource by only holding on to it as long as they need it and
+then releasing it for use by the other component.  In the case of the MAC
+implementation of the Tda5250 radio component, however, the Msp430 Usart
+resource needs be held onto indefinitely.  It only ever considers releasing the
+resource if a request from the flash component comes in through its
+ResourceRequested interface.  If it cannot release it right away (i.e. it is in
+the middle of receiving a packet), it defers the release until some later point
+in time.  Once it is ready to release the resource, it releases it, but then
+immediately requests it again.  The flash is then able to do what it wants with
+the Usart, with the radio regaining control soon thereafter.</p>
+<p>In the CsmaMacP implementation of the Tda5250 radio we see the ResourceRequested
+event being implemented:</p>
+<pre class="literal-block">
+async event void ResourceRequested.requested() {
+  atomic {
+    /* This gives other devices the chance to get the Resource
+       because RxMode implies a new arbitration round.  */
+    if (macState == RX) call Tda5250Control.RxMode()();
+  }
+}
+</pre>
+<p>Through several levels of wiring, the Tda5250 interface is provided to this
+component by the Tda5250RadioP component:</p>
+<pre class="literal-block">
+module Tda5250RadioP {
+  provides interface Tda5250Control;
+  uses interface Resource as UsartResource;
+  ...
+}
+implementation {
+  async command error_t Tda5250Control.RxMode() {
+    if(radioBusy() == FALSE)
+      call UsartResource.release();
+      call UsartResource.request();
+  }
+  event void UsartResource.granted() {
+    // Finish setting to RX Mode
+  }
+  ...
+}
+</pre>
+<p>Although the full implementation of these components is not provided, the
+functionality they exhibit should be clear.  The CsmaMacP component receives the
+ResourceRequested.requested() event when the flash requests the use of the
+Msp430 Usart0 resource.  If it is already in the receive state, it tries to
+reset the receive state through a call to a lower level component.  This
+component checks to see if the radio is in the middle of doing anything (i.e.
+the radioBusy() == FALSE check), and if not, releases the resource and then
+requests it again.</p>
+<p>To see the full implementations of these components and their wirings to one
+another, please refer to the tinyos-2.x source tree under
+tinyos-2.x/tos/chips/tda5250, tinyos-2.x/tos/chips/tda5250/mac,
+tinyos-2.x/tos/platforms/eyesIFX/chips/tda5250, and
+tinyos-2.x/tos/platforms/eyesIFX/chips/msp430.</p>
+</div>
+<div class="section">
+<h2><a id="resource-configure" name="resource-configure">Resource Configure</a></h2>
+<p>The Msp430 Usart0 bus can operate in three modes: SPI, I2C,
+and UART. Using all three concurrently is problematic: only one should
+be enabled at any given time. However, different clients of the bus might
+require the bus to be configured for different protocols. On Telos, for example
+many of the available sensors use an I2C bus, while the radio and flash chip use
+SPI.</p>
+<p>A component providing the SPI service on top of the shared Usart component looks
+like this:</p>
+<pre class="literal-block">
+generic configuration Msp430Spi0C() {
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+  ...
+}
+implementation {
+  enum { CLIENT_ID = unique( MSP430_SPIO_BUS ) };
+
+  components Msp430SpiNoDma0P as SpiP;
+  components new Msp430Usart0C() as UsartC;
+  SpiP.ResourceConfigure[ CLIENT_ID ] &lt;- UsartC.ResourceConfigure;
+  SpiP.UsartResource[ CLIENT_ID ] -&gt; UsartC.Resource;
+  SpiP.UsartInterrupts -&gt; UsartC.HplMsp430UsartInterrupts;
+  ...
+}
+</pre>
+<p>And one providing the I2C service looks like this:</p>
+<pre class="literal-block">
+generic configuration Msp430I2CC() {
+  provides interface Resource;
+  provides interface I2CPacket&lt;TI2CBasicAddr&gt; as I2CBasicAddr;
+   ...
+}
+implementation {
+  enum { CLIENT_ID = unique( MSP430_I2CO_BUS ) };
+
+   components Msp430I2C0P as I2CP;
+   components new Msp430Usart0C() as UsartC;
+   I2CP.ResourceConfigure[ CLIENT_ID ] &lt;- UsartC.ResourceConfigure;
+   I2CP.UsartResource[ CLIENT_ID ] -&gt; UsartC.Resource;
+   I2CP.I2CInterrupts -&gt; UsartC.HplMsp430UsartInterrupts;
+   ...
+}
+</pre>
+<p>The implementation of the ResourceConfigure interface is
+provided by both the Msp430SpiNoDma0P and the Msp430I2C0P.  In the
+two different components, the same Msp430Usart0C component is used,
+but wired to the proper implementation of the ResourceConfigure
+interface. In this way, different instances of the Msp430Usart0C
+can each have different configurations associated with them, but
+still provide the same functionality.</p>
+<p>Take a look in the tinyos-2.x source tree under
+tinyos-2.x/tos/chips/msp430/usart to see the full implementation of
+these components along with the corresponding Uart implementation.</p>
+</div>
+</div>
+</div>
+</body>
+</html>
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+  border-left: solid thin gray ;
+  padding-left: 0.5ex }
+
+table.docinfo {
+  margin: 2em 4em;
+}
+
+table.footnote {
+  border-left: solid thin black ;
+  padding-left: 0.5ex }
+
+td, th {
+  padding-left: 0.5em ;
+  padding-right: 0.5em ;
+  vertical-align: top }
+
+th.docinfo-name, th.field-name {
+  font-weight: bold ;
+  text-align: left ;
+  white-space: nowrap;
+  }
+
+h1 tt, h2 tt, h3 tt, h4 tt, h5 tt, h6 tt {
+  font-size: 100% }
+
+tt {}
+
+ul.auto-toc {
+  list-style-type: none }
+
+</style>
+</head>
+<body>
+<div class="document" id="sensors-and-sensor-boards">
+<h1 class="title">Sensors and Sensor Boards</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">109</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>David Gay, Philip Levis, Wei Hong, Joe Polastre, and Gilman Tolle</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo documents how sensor drivers are organized in TinyOS and how
+sets of sensor drivers are combined into sensor boards and sensor
+platforms, along with general principles followed by the components
+that provide access to sensors.</p>
+</div>
+<div class="section">
+<h1><a id="principles" name="principles">1. Principles</a></h1>
+<p>This section describes the basic organization principles for sensor
+drivers in TinyOS.</p>
+<p>For background, a sensor can be attached to the microcontroller on a
+TinyOS platform through a few different types of connections:</p>
+<blockquote>
+<ul class="simple">
+<li>Included within the microcontroller itself</li>
+<li>Connected to general-purpose IO pins for level/edge detection</li>
+<li>Connected to an ADC in the microcontroller for voltage sampling</li>
+<li>Connected to general-purpose IO pins for digital communication</li>
+<li>Connected through a standard digital bus protocol (1-Wire, I2C, SPI)</li>
+</ul>
+</blockquote>
+<p>Physically, these connections can also be decoupled by attaching the
+sensors to a <cite>sensor board</cite>, which can be removed from the TinyOS
+platform, and could attach to multiple different TinyOS platforms.</p>
+<p>The capabilities of a physical sensor are made available to a TinyOS
+application through a <cite>sensor driver</cite>.</p>
+<p>According to the HAA <a class="citation-reference" href="#tep2" id="id1" name="id1">[TEP2]</a>, TinyOS devices SHOULD provide both
+simple hardware-independent interfaces for common-case use (HIL) and
+rich hardware-dependent interfaces for special-case use (HAL). Sensor
+drivers SHOULD follow this spirit as well.</p>
+<p>TinyOS 2.x represents each sensor as an individual component. This
+allows the compilation process to minimize the amount of code
+included. A sensor board containing multiple sensors SHOULD be
+represented as a collection of components, one for each sensor,
+contained within a sensor board directory.</p>
+<p>Sensors, being physical devices that can be shared, can benefit from
+virtualization and arbitration. This document describes a design
+pattern for sensor virtualization that SHOULD be followed by sensor
+drivers.</p>
+<p>The same physical sensor can be attached to multiple different TinyOS
+platforms, through platform-dependent interconnections. The common
+logic of sensor driver SHOULD be factored into chip-dependent,
+platform-independent components, and those components SHOULD be bound
+to the hardware resources on a platform by platform-dependent
+components, and to the hardware resources on a sensor board by
+sensorboard-dependent components.</p>
+<p>A physical sensor has a general class and a specific set of
+performance characteristics, captured by the make and model of the
+sensor itself. The naming of the sensor driver components SHOULD
+reflect the specifc name of the sensor, and MAY provide a component
+with a generic name for application authors who only care about the
+general class of the sensor.</p>
+<p>This document requires that sensor components specify the range (in
+bits) of values returned by sensor drivers, but takes no position on
+the meaning of these values. They MAY be raw uninterpreted values or
+they MAY have some physical meaning. If a driver returns uninterpreted
+values, the driver MAY provide additional interfaces that would allow
+higher-level clients to obtain information (e.g. calibration
+coefficients) needed to properly interpret the value.</p>
+</div>
+<div class="section">
+<h1><a id="sensor-hil-components" name="sensor-hil-components">2. Sensor HIL Components</a></h1>
+<p>A sensor HIL component MUST provide:</p>
+<ul class="simple">
+<li>One or more SID interfaces <a class="citation-reference" href="#tep114" id="id2" name="id2">[TEP114]</a>, for reading data.</li>
+</ul>
+<p>A sensor HIL component MAY provide:</p>
+<ul class="simple">
+<li>One or more SID interfaces <a class="citation-reference" href="#tep114" id="id3" name="id3">[TEP114]</a>, for reading or
+writing calibration coefficients or control registers.</li>
+</ul>
+<p>A sensor device driver SHOULD be a generic component that virtualizes
+access to the sensor. A sensor device driver can provide such
+virtualization for itself by defining a nesC generic client
+component. When a client component is being used, a call to a
+top-level SID interface SHOULD be delayed when the device is busy,
+rather than failing. Using one of the system arbiters can make the
+implementation of this requirement easier to accomplish.</p>
+<p>For example:</p>
+<pre class="literal-block">
+generic configuration SensirionSht11C() {
+  provides interface Read&lt;uint16_t&gt; as Temperature;
+  provides interface ReadStream&lt;uint16_t&gt; as TemperatureStream;
+  provides interface DeviceMetadata as TemperatureDeviceMetadata;
+
+  provides interface Read&lt;uint16_t&gt; as Humidity;
+  provides interface ReadStream&lt;uint16_t&gt; as HumidityStream;
+  provides interface DeviceMetadata as HumidityDeviceMetadata;
+}
+implementation {
+  // connect to the ADC HIL, GPIO HAL, or sensor's HAL
+}
+</pre>
+<p>When a HIL component is being used, the sensor MUST initialize itself,
+either by including the <cite>MainC</cite> component and wiring to the
+<cite>SoftwareInit</cite> interface, or by allowing a lower-level component (like
+an ADC) to initialize itself.</p>
+<p>In addition, the HIL sensor driver MUST start the physical sensor
+automatically. For sensors without a constant power draw, the sensor
+MAY be started once at boot time by wiring to the <cite>MainC.Boot</cite>
+interface. Sensors that draw appreciable power MUST be started in
+response to a call to one of the top-level SID interfaces, and stopped
+some time after that call completes. Using one of the power-management
+components described in <a class="citation-reference" href="#tep115" id="id4" name="id4">[TEP115]</a> can make this implementation easier.</p>
+<p>Generally, simple types are made up of octets. However, sensor values
+often have levels of precision besides a multiple of 8. To account for
+such cases, each device MUST specify the precision of each one of its
+interfaces by providing the DeviceMetadata interface:</p>
+<pre class="literal-block">
+interface DeviceMetadata {
+  command uint8_t getSignificantBits();
+}
+</pre>
+<p>The name of the instance of DeviceMetadata MUST clearly indicate which
+interface it corresponds to.</p>
+<p>The getSignificantBits() call MUST return the number of significant
+bits in the reading. For example, a sensor reading taken from a 12-bit
+ADC would typically return the value 12 (it might return less if, e.g.,
+physical constraints limit the maximum A/D result to 10-bits).</p>
+<p>Sensor driver components SHOULD be named according to the make and
+model of the sensing device being presented. Using specific names
+gives the developer the option to bind to a particular sensor, which
+provides compile-time detection of missing sensors. However, wrapper
+components using &quot;common&quot; names MAY also be provided by the driver
+author, to support application developers who are only concerned with
+the particular type of the sensor and not its make, model, or detailed
+performance characteristics.</p>
+<p>A &quot;common&quot; naming layer atop a HIL might look like this:</p>
+<pre class="literal-block">
+generic configuration TemperatureC() {
+  provides interface Read&lt;uint16_t&gt;;
+  provides interface ReadStream&lt;uint16_t&gt;;
+  provides interface DeviceMetadata;
+}
+implementation {
+  components new SensirionSht11C();
+  Read = SensirionSht11C.Temperature;
+  ReadStream = SensirionSht11C.TemperatureStream;
+  DeviceMetadata = SensirionSht11C.TemperatureDeviceMetadata;
+}
+
+generic configuration HumidityC() {
+  provides interface Read&lt;uint16_t&gt;;
+  provides interface ReadStream&lt;uint16_t&gt;;
+  provides interface DeviceMetadata;
+}
+implementation {
+  components new SensirionSht11C();
+  Read = SensirionSht11C.Humidity;
+  ReadStream = SensirionSht11C.HumidityStream;
+  DeviceMetadata = SensirionSht11C.HumidityDeviceMetadata;
+}
+</pre>
+</div>
+<div class="section">
+<h1><a id="sensor-hal-components" name="sensor-hal-components">3. Sensor HAL Components</a></h1>
+<p>Sensors with a richer interface than would be supported by the SID
+interfaces MAY provide a HAL component in addition to a HIL
+component.</p>
+<p>A sensor HAL component MUST provide:</p>
+<ul class="simple">
+<li>A SID-based interface or a specific hardware-dependent interface
+with commands for sampling and controlling the sensor device.</li>
+</ul>
+<p>A sensor HAL component MAY need to provide:</p>
+<ul class="simple">
+<li>A <cite>StdControl</cite> or <cite>SplitControl</cite> interface for manual power
+management by the user, following the conventions described in
+<a class="citation-reference" href="#tep115" id="id5" name="id5">[TEP115]</a>.</li>
+<li>A <cite>Resource</cite> interface for requesting access to the device and
+possibly performing automated power management, following
+the conventions described in <a class="citation-reference" href="#tep108" id="id6" name="id6">[TEP108]</a> and <a class="citation-reference" href="#tep115" id="id7" name="id7">[TEP115]</a>.</li>
+<li>Any other interfaces needed to control the device, e.g., to
+read or write calibration coefficients.</li>
+</ul>
+<p>For example:</p>
+<pre class="literal-block">
+configuration SensirionSht11DeviceC {
+  provides interface Resource[ uint8_t client ];
+  provides interface SensirionSht11[ uint8_t client ];
+}
+implementation {
+  // connect to the sensor's platform-dependent HPL here
+}
+</pre>
+</div>
+<div class="section">
+<h1><a id="sensor-component-organization-and-compiler-interaction-guidelines" name="sensor-component-organization-and-compiler-interaction-guidelines">4. Sensor Component Organization and Compiler Interaction Guidelines</a></h1>
+<p>Sensors are associated either with a particular sensor board or with a
+particular platform. Both sensors and sensor boards MUST have unique
+names. Case is significant, but two sensor (or sensor board) names
+MUST differ in more than case. This is necessary to support platforms
+where filename case differences are not significant.</p>
+<p>Each sensor board MUST have its own directory whose name is the sensor
+board's unique name (referred to as &lt;sensorboard&gt; in the rest of this
+section). Default TinyOS 2.x sensor boards are placed in
+<tt class="docutils literal"><span class="pre">tos/sensorboards/&lt;sensorboard&gt;</span></tt>, but sensor board directories can be
+placed anywhere as long as the nesC compiler receives a <tt class="docutils literal"><span class="pre">-I</span></tt> directive
+pointing to the sensor board's directory. Each sensor board directory
+MUST contain a <tt class="docutils literal"><span class="pre">.sensor</span></tt> file (described below). If the
+sensor board wishes to define any C types or constants, it SHOULD
+place these in a file named <tt class="docutils literal"><span class="pre">&lt;sensorboard&gt;.h</span></tt> in the sensor board's
+directory.</p>
+<p>A sensor board MAY contain components that override the default TinyOS
+<em>demo sensors</em>. This allows the sensor board to easily be used with
+TinyOS sample applications that use the demo sensors. If a sensor
+board wishes to override the default demo sensor:</p>
+<ul>
+<li><p class="first">It MUST provide a generic component named <tt class="docutils literal"><span class="pre">DemoSensorC</span></tt> with the
+following signature:</p>
+<pre class="literal-block">
+provides interface Read&lt;uint16_t&gt;;
+provides interface DeviceMetadata;
+</pre>
+</li>
+<li><p class="first">It MAY provide a generic component named <tt class="docutils literal"><span class="pre">DemoSensorNowC</span></tt> with the
+following signature:</p>
+<pre class="literal-block">
+provides interface ReadNow&lt;uint16_t&gt;;
+provides interface DeviceMetadata;
+</pre>
+<p>This component SHOULD sample the same sensor as <tt class="docutils literal"><span class="pre">DemoSensorC</span></tt>.</p>
+</li>
+<li><p class="first">It MAY provide a generic component named <tt class="docutils literal"><span class="pre">DemoSensorStreamC</span></tt> with the
+following signature:</p>
+<pre class="literal-block">
+provides interface ReadStream&lt;uint16_t&gt;;
+provides interface DeviceMetadata;
+</pre>
+<p>This component SHOULD sample the same sensor as <tt class="docutils literal"><span class="pre">DemoSensorC</span></tt>.</p>
+</li>
+</ul>
+<p>These components MUST be an alias for one of the sensor board's usual
+sensors, though they change the precision of the sensor if necessary.
+For instance, if <tt class="docutils literal"><span class="pre">DemoSensorC</span></tt> is an alias for a 20-bit sensor that
+provides a <tt class="docutils literal"><span class="pre">Read&lt;uint32_t&gt;</span></tt> interface, <tt class="docutils literal"><span class="pre">DemoSensorC</span></tt> would still
+provide <tt class="docutils literal"><span class="pre">Read&lt;uint16_t&gt;</span></tt> and would include code to reduce the
+precision of the aliased sensor.</p>
+<div class="section">
+<h2><a id="compiler-interaction" name="compiler-interaction">4.1 Compiler Interaction</a></h2>
+<p>When the <tt class="docutils literal"><span class="pre">ncc</span></tt> nesC compiler frontend is passed a <tt class="docutils literal"><span class="pre">-board=X</span></tt> option,
+it executes the <tt class="docutils literal"><span class="pre">.sensor</span></tt> file found in the sensor board directory
+<tt class="docutils literal"><span class="pre">X</span></tt>.  This file is a perl script which can add or modify any
+compile-time options necessary for the sensor board. It MAY modify the
+following perl variables, and MUST NOT modify any others:</p>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">&#64;includes</span></tt>: This array contains the TinyOS search path, i.e., the
+directories which will be passed to nescc (the TinyOS-agnostic nesC
+compiler) as <tt class="docutils literal"><span class="pre">-I</span></tt> arguments. You MUST add to <tt class="docutils literal"><span class="pre">&#64;includes</span></tt> any
+directories needed to compile this sensor board's components.  For
+instance, if your sensor boards depends on support code found in
+<tt class="docutils literal"><span class="pre">tos/chips/sht11</span></tt>, you would add <tt class="docutils literal"><span class="pre">&quot;%T/chips/sht11&quot;</span></tt> to <tt class="docutils literal"><span class="pre">&#64;includes</span></tt>.</li>
+<li><tt class="docutils literal"><span class="pre">&#64;new_args</span></tt>: This is the array of arguments which will be passed to
+nescc. You MUST add any arguments other than <tt class="docutils literal"><span class="pre">-I</span></tt> that are necessary
+to compile your sensor board components to <tt class="docutils literal"><span class="pre">&#64;new_args</span></tt>.</li>
+</ul>
+<p>If a sensor is associated with a platform <cite>P</cite> rather than a sensor
+board, then that platform MUST ensure that, when compiling for
+platform <cite>P</cite>, all directories needed to compile that sensor's
+component are added to the TinyOS search path (see <a class="citation-reference" href="#tep131" id="id8" name="id8">[TEP131]</a> for
+information on how to set up a TinyOS platform).</p>
+</div>
+<div class="section">
+<h2><a id="sensor-components" name="sensor-components">4.2 Sensor Components</a></h2>
+<p>A particular sensor is typically supported by many components,
+including the HIL and HAL components from Sections 2 and 3, A/D
+conversion components (for analog sensors), digital bus components
+(e.g., SPI, for digital sensors), system services (timers, resource
+and power management, ...), glue components (to connect sensors,
+sensor boards and platforms), etc.  These components can be divided
+into three classes: sensorboard-dependent, platform-dependent and
+platform-independent. The sensorboard and platform MUST ensure
+(Section 4.1) that all these components can be found at compile-time.</p>
+<p>Because the same physical sensor can be used on many platforms or
+sensor boards, and attached in many different ways, to maximize code
+reuse the organization of sensor drivers SHOULD reflect the
+distinction between sensor and sensor interconnect. The sensor
+components SHOULD be platform-independent, while the sensor
+interconnect components are typically sensorboard or
+platform-dependent. However, some sensors (e.g. analong sensors) will
+not have a sufficiently large amount of platform-independent logic to
+justify creating platform-independent components.</p>
+<p>The following guidelines specify how to organize sensor and sensor
+interconnect components within TinyOS's directory hierarchy. These
+guidelines are only relevant to components that are part of the core
+source tree. The string <tt class="docutils literal"><span class="pre">&lt;sensor&gt;</span></tt> SHOULD reflect the make and model
+of the sensor device.</p>
+<ul class="simple">
+<li>Platform-independent sensor components that exist as part of a
+larger chip, like a MCU internal voltage sensor, SHOULD be placed in
+a subdirectory of the chip's directory
+<tt class="docutils literal"><span class="pre">tos/&lt;chip&gt;/sensors/&lt;sensor&gt;</span></tt>.</li>
+<li>Other platform-independent sensor components SHOULD be placed
+in <tt class="docutils literal"><span class="pre">tos/chips/&lt;sensor&gt;</span></tt>.</li>
+<li>Sensorboard-dependent sensor and sensor interconnect components
+SHOULD be placed either in the <tt class="docutils literal"><span class="pre">&lt;sensorboard&gt;</span></tt> directory or in a
+<tt class="docutils literal"><span class="pre">&lt;sensorboard&gt;/chips/&lt;sensor&gt;</span></tt> directory.</li>
+<li>Platform-dependent sensor and sensor interconnect components SHOULD
+be placed in <tt class="docutils literal"><span class="pre">tos/&lt;platform&gt;/chips/&lt;sensor&gt;</span></tt>.</li>
+</ul>
+</div>
+</div>
+<div class="section">
+<h1><a id="authors-addresses" name="authors-addresses">5. Authors' Addresses</a></h1>
+<div class="line-block">
+<div class="line">David Gay</div>
+<div class="line">2150 Shattuck Ave, Suite 1300</div>
+<div class="line">Intel Research</div>
+<div class="line">Berkeley, CA 94704</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 510 495 3055</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:david.e.gay&#64;intel.com">david.e.gay&#64;intel.com</a></div>
+<div class="line"><br /></div>
+<div class="line">Wei Hong</div>
+<div class="line">Arch Rock</div>
+<div class="line">657 Mission St. Suite 600</div>
+<div class="line">San Francisco, CA 94105</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:wei.hong&#64;gmail.com">wei.hong&#64;gmail.com</a></div>
+<div class="line"><br /></div>
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Computer Science Department</div>
+<div class="line">353 Serra Mall</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Joe Polastre</div>
+<div class="line">467 Soda Hall</div>
+<div class="line">UC Berkeley</div>
+<div class="line">Berkeley, CA 94720</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:polastre&#64;cs.berkeley.edu">polastre&#64;cs.berkeley.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Gilman Tolle</div>
+<div class="line">Arch Rock</div>
+<div class="line">657 Mission St. Suite 600</div>
+<div class="line">San Francisco, CA 94105</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:gtolle&#64;archrock.com">gtolle&#64;archrock.com</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">6. Citations</a></h1>
+<table class="docutils citation" frame="void" id="tep2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="tep2">[TEP2]</a></td><td>TEP 2: Hardware Abstraction Architecture</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep108" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id6" name="tep108">[TEP108]</a></td><td>TEP 108: Resource Arbitration</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep114" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep114">[TEP114]</a></td><td><em>(<a class="fn-backref" href="#id2">1</a>, <a class="fn-backref" href="#id3">2</a>)</em> TEP 114: SIDs: Source and Sink Indepedent Drivers</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep115" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep115">[TEP115]</a></td><td><em>(<a class="fn-backref" href="#id4">1</a>, <a class="fn-backref" href="#id5">2</a>, <a class="fn-backref" href="#id7">3</a>)</em> TEP 115: Power Management of Non-Virtualized Devices</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep131" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id8" name="tep131">[TEP131]</a></td><td>TEP 131: Creating a New Platform for TinyOS 2.x</td></tr>
+</tbody>
+</table>
+</div>
+<div class="section">
+<h1><a id="appendix-a-sensor-driver-examples" name="appendix-a-sensor-driver-examples">Appendix A: Sensor Driver Examples</a></h1>
+<div class="section">
+<h2><a id="analog-adc-connected-sensor" name="analog-adc-connected-sensor">1. Analog ADC-Connected Sensor</a></h2>
+<p>The Analog sensor requires two components</p>
+<ul class="simple">
+<li>a component to present the sensor itself (HamamatsuS1087ParC)</li>
+<li>a component to select the appropriate hardware resources, such as
+ADC port 4, reference voltage 1.5V, and a slow sample and hold time
+(HamamatsuS1087ParP).</li>
+</ul>
+<p>The AdcReadClientC component and underlying machinery handles all of
+the arbitration and access to the ADC.</p>
+<pre class="literal-block">
+tos/platforms/telosa/chips/s1087/HamamatsuS1087ParC.nc
+
+// HIL for the HamamatsuS1087 analog photodiode sensor
+generic configuration HamamatsuS1087ParC() {
+  provides interface Read&lt;uint16_t&gt;;
+  provides interface ReadStream&lt;uint16_t&gt;;
+  provides interface DeviceMetadata;
+}
+implementation {
+  // Create a new A/D client and connect it to the Hamamatsu S1087 A/D
+  // parameters
+  components new AdcReadClientC();
+  Read = AdcReadClientC;
+
+  components new AdcReadStreamClientC();
+  ReadStream = AdcReadStreamClientC;
+
+  components HamamatsuS1087ParP;
+  DeviceMetadata = HamamatsuS1087ParP;
+  AdcReadClientC.AdcConfigure -&gt; HamamatsuS1087ParP;
+  AdcReadStreamClientC.AdcConfigure -&gt; HamamatsuS1087ParP;
+}
+</pre>
+<pre class="literal-block">
+tos/platforms/telosa/chips/s1087/HamamatsuS1087ParP.nc
+
+#include &quot;Msp430Adc12.h&quot;
+
+// A/D parameters for the Hamamatsu - see the MSP430 A/D converter manual,
+// Hamamatsu specification, Telos hardware schematic and TinyOS MSP430
+// A/D converter component specifications for the explanation of these
+// parameters
+module HamamatsuS1087ParP {
+  provides interface AdcConfigure&lt;const msp430adc12_channel_config_t*&gt;;
+  provides interface DeviceMetadata;
+}
+implementation {
+  msp430adc12_channel_config_t config = {
+    inch: INPUT_CHANNEL_A4,
+    sref: REFERENCE_VREFplus_AVss,
+    ref2_5v: REFVOLT_LEVEL_1_5,
+    adc12ssel: SHT_SOURCE_ACLK,
+    adc12div: SHT_CLOCK_DIV_1,
+    sht: SAMPLE_HOLD_4_CYCLES,
+    sampcon_ssel: SAMPCON_SOURCE_SMCLK,
+    sampcon_id: SAMPCON_CLOCK_DIV_1
+  };
+
+  async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() {
+    return &amp;config;
+  }
+
+  command uint8_t DeviceMetadata.getSignificantBits() { return 12; }
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="binary-pin-connected-sensor" name="binary-pin-connected-sensor">2. Binary Pin-Connected Sensor</a></h2>
+<p>The Binary sensor gets a bit more complex, because it has three
+components:</p>
+<ul class="simple">
+<li>one to present the sensor (UserButtonC)</li>
+<li>one to execute the driver logic (UserButtonLogicP)</li>
+<li>one to select the appropriate hardware resources, such as MSP430
+Port 27 (HplUserButtonC).</li>
+</ul>
+<p>Note that the presentation of this sensor is not arbitrated because
+none of the operations are split-phase.</p>
+<pre class="literal-block">
+tos/platforms/telosa/UserButtonC.nc
+
+// HIL for the user button sensor on Telos-family motes
+configuration UserButtonC {
+  provides interface Get&lt;bool&gt;; // Get button status
+  provides interface Notify&lt;bool&gt;; // Get button-press notifications
+  provides interface DeviceMetadata;
+}
+implementation {
+
+  // Simply connect the button logic to the button HPL
+  components UserButtonLogicP;
+  Get = UserButtonLogicP;
+  Notify = UserButtonLogicP;
+  DeviceMetadata = UserButtonLogicP;
+
+  components HplUserButtonC;
+  UserButtonLogicP.GpioInterrupt -&gt; HplUserButtonC.GpioInterrupt;
+  UserButtonLogicP.GeneralIO -&gt; HplUserButtonC.GeneralIO;
+}
+</pre>
+<pre class="literal-block">
+tos/platforms/telosa/UserButtonLogicP.nc
+
+// Transform the low-level (GeneralIO and GpioInterrupt) interface to the
+// button to high-level SID interfaces
+module UserButtonLogicP {
+  provides interface Get&lt;bool&gt;;
+  provides interface Notify&lt;bool&gt;;
+  provides interface DeviceMetadata;
+
+  uses interface GeneralIO;
+  uses interface GpioInterrupt;
+}
+implementation {
+  norace bool m_pinHigh;
+
+  task void sendEvent();
+
+  command bool Get.get() { return call GeneralIO.get(); }
+
+  command error_t Notify.enable() {
+    call GeneralIO.makeInput();
+
+    // If the pin is high, we need to trigger on falling edge interrupt, and
+    // vice-versa
+    if ( call GeneralIO.get() ) {
+      m_pinHigh = TRUE;
+      return call GpioInterrupt.enableFallingEdge();
+    } else {
+      m_pinHigh = FALSE;
+      return call GpioInterrupt.enableRisingEdge();
+    }
+  }
+
+  command error_t Notify.disable() {
+    return call GpioInterrupt.disable();
+  }
+
+  // Button changed, signal user (in a task) and update interrupt detection
+  async event void GpioInterrupt.fired() {
+    call GpioInterrupt.disable();
+
+    m_pinHigh = !m_pinHigh;
+
+    post sendEvent();
+  }
+
+  task void sendEvent() {
+    bool pinHigh;
+    pinHigh = m_pinHigh;
+
+    signal Notify.notify( pinHigh );
+
+    if ( pinHigh ) {
+      call GpioInterrupt.enableFallingEdge();
+    } else {
+      call GpioInterrupt.enableRisingEdge();
+    }
+  }
+
+  command uint8_t DeviceMetadata.getSignificantBits() { return 1; }
+}
+</pre>
+<pre class="literal-block">
+tos/platforms/telosa/HplUserButtonC.nc
+
+// HPL for the user button sensor on Telos-family motes - just provides
+// access to the I/O and interrupt control for the pin to which the
+// button is connected
+configuration HplUserButtonC {
+  provides interface GeneralIO;
+  provides interface GpioInterrupt;
+}
+implementation {
+
+  components HplMsp430GeneralIOC as GeneralIOC;
+
+  components new Msp430GpioC() as UserButtonC;
+  UserButtonC -&gt; GeneralIOC.Port27;
+  GeneralIO = UserButtonC;
+
+  components HplMsp430InterruptC as InterruptC;
+
+  components new Msp430InterruptC() as InterruptUserButtonC;
+  InterruptUserButtonC.HplInterrupt -&gt; InterruptC.Port27;
+  GpioInterrupt = InterruptUserButtonC.Interrupt;
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="digital-bus-connected-sensor" name="digital-bus-connected-sensor">3. Digital Bus-Connected Sensor</a></h2>
+<p>The Digital sensor is the most complex out of the set, and includes
+six components:</p>
+<ul class="simple">
+<li>one to present the sensor (SensirionSht11C)</li>
+<li>one to request arbitrated access and to transform the sensor HAL
+into the sensor HIL (SensirionSht11P)</li>
+<li>one to present the sensor HAL (HalSensirionSht11C)</li>
+<li>one to perform the driver logic needed to support the HAL, which
+twiddles pins according to a sensor-specific protocol
+(SensirionSht11LogicP).</li>
+<li>one to select the appropriate hardware resources, such as the clock,
+data, and power pins, and to provide an arbiter for the sensor
+(HplSensirionSht11C).</li>
+<li>one to perform the power control logic needed to support the power
+manager associated with the arbiter (HplSensirionSht11P).</li>
+</ul>
+<p>This bus-connected sensor is overly complex because it does not rely
+on a shared framework of bus manipulation components. A sensor built
+on top of the I2C or SPI bus would likely require fewer components.</p>
+<pre class="literal-block">
+tos/platforms/telosa/chips/sht11/SensirionSht11C.nc
+
+// HIL interface to Sensirion SHT11 temperature and humidity sensor
+generic configuration SensirionSht11C() {
+  provides interface Read&lt;uint16_t&gt; as Temperature;
+  provides interface DeviceMetadata as TemperatureDeviceMetadata;
+  provides interface Read&lt;uint16_t&gt; as Humidity;
+  provides interface DeviceMetadata as HumidityDeviceMetadata;
+}
+implementation {
+  // Instantiate the module providing the HIL interfaces
+  components new SensirionSht11ReaderP();
+
+  Temperature = SensirionSht11ReaderP.Temperature;
+  TemperatureDeviceMetadata = SensirionSht11ReaderP.TemperatureDeviceMetadata;
+  Humidity = SensirionSht11ReaderP.Humidity;
+  HumidityDeviceMetadata = SensirionSht11ReaderP.HumidityDeviceMetadata;
+
+  // And connect it to the HAL component for the Sensirion SHT11
+  components HalSensirionSht11C;
+
+  enum { TEMP_KEY = unique(&quot;Sht11.Resource&quot;) };
+  enum { HUM_KEY = unique(&quot;Sht11.Resource&quot;) };
+
+  SensirionSht11ReaderP.TempResource -&gt; HalSensirionSht11C.Resource[ TEMP_KEY ];
+  SensirionSht11ReaderP.Sht11Temp -&gt; HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
+  SensirionSht11ReaderP.HumResource -&gt; HalSensirionSht11C.Resource[ HUM_KEY ];
+  SensirionSht11ReaderP.Sht11Hum -&gt; HalSensirionSht11C.SensirionSht11[ HUM_KEY ];
+}
+</pre>
+<pre class="literal-block">
+tos/chips/sht11/SensirionSht11ReaderP.nc
+
+// Convert Sensirion SHT11 HAL to HIL interfaces for a single
+// client, performing automatic resource arbitration
+generic module SensirionSht11ReaderP() {
+  provides interface Read&lt;uint16_t&gt; as Temperature;
+  provides interface DeviceMetadata as TemperatureDeviceMetadata;
+  provides interface Read&lt;uint16_t&gt; as Humidity;
+  provides interface DeviceMetadata as HumidityDeviceMetadata;
+
+  // Using separate resource interfaces for temperature and humidity allows
+  // temperature and humidity measurements to be requested simultaneously
+  // (if a single Resource interface was used, a request for temperature would
+  // prevent any humidity requests until the temperature measurement was complete)
+  uses interface Resource as TempResource;
+  uses interface Resource as HumResource;
+  uses interface SensirionSht11 as Sht11Temp;
+  uses interface SensirionSht11 as Sht11Hum;
+}
+implementation {
+  command error_t Temperature.read() {
+    // Start by requesting access to the SHT11
+    return call TempResource.request();
+  }
+
+  event void TempResource.granted() {
+    error_t result;
+    // If the HAL measurement fails, release the SHT11 and signal failure
+    if ((result = call Sht11Temp.measureTemperature()) != SUCCESS) {
+      call TempResource.release();
+      signal Temperature.readDone( result, 0 );
+    }
+  }
+
+  event void Sht11Temp.measureTemperatureDone( error_t result, uint16_t val ) {
+    // Release the SHT11 and signal the result
+    call TempResource.release();
+    signal Temperature.readDone( result, val );
+  }
+
+  command uint8_t TemperatureDeviceMetadata.getSignificantBits() { return 14; }
+
+  command error_t Humidity.read() {
+    // Start by requesting access to the SHT11
+    return call HumResource.request();
+  }
+
+  event void HumResource.granted() {
+    error_t result;
+    // If the HAL measurement fails, release the SHT11 and signal failure
+    if ((result = call Sht11Hum.measureHumidity()) != SUCCESS) {
+      call HumResource.release();
+      signal Humidity.readDone( result, 0 );
+    }
+  }
+
+  event void Sht11Hum.measureHumidityDone( error_t result, uint16_t val ) {
+    // Release the SHT11 and signal the result
+    call HumResource.release();
+    signal Humidity.readDone( result, val );
+  }
+
+  command uint8_t HumidityDeviceMetadata.getSignificantBits() { return 12; }
+
+  // Dummy handlers for unused portions of the HAL interface
+  event void Sht11Temp.resetDone( error_t result ) { }
+  event void Sht11Temp.measureHumidityDone( error_t result, uint16_t val ) { }
+  event void Sht11Temp.readStatusRegDone( error_t result, uint8_t val ) { }
+  event void Sht11Temp.writeStatusRegDone( error_t result ) { }
+
+  event void Sht11Hum.resetDone( error_t result ) { }
+  event void Sht11Hum.measureTemperatureDone( error_t result, uint16_t val ) { }
+  event void Sht11Hum.readStatusRegDone( error_t result, uint8_t val ) { }
+  event void Sht11Hum.writeStatusRegDone( error_t result ) { }
+
+  // We need default handlers as a client may wire to only the Temperature
+  // sensor or only the Humidity sensor
+  default event void Temperature.readDone( error_t result, uint16_t val ) { }
+  default event void Humidity.readDone( error_t result, uint16_t val ) { }
+}
+</pre>
+<pre class="literal-block">
+tos/platforms/telosa/chips/sht11/HalSensirionSht11C.nc
+
+// HAL interface to Sensirion SHT11 temperature and humidity sensor
+configuration HalSensirionSht11C {
+  // The SHT11 HAL uses resource arbitration to allow the sensor to shared
+  // between multiple clients and for automatic power management (the SHT11
+  // is switched off when no clients are waiting to use it)
+  provides interface Resource[ uint8_t client ];
+  provides interface SensirionSht11[ uint8_t client ];
+}
+implementation {
+  // The HAL implementation logic
+  components new SensirionSht11LogicP();
+  SensirionSht11 = SensirionSht11LogicP;
+
+  // And it's wiring to the SHT11 HPL - the actual resource management is
+  // provided at the HPL layer
+  components HplSensirionSht11C;
+  Resource = HplSensirionSht11C.Resource;
+  SensirionSht11LogicP.DATA -&gt; HplSensirionSht11C.DATA;
+  SensirionSht11LogicP.CLOCK -&gt; HplSensirionSht11C.SCK;
+  SensirionSht11LogicP.InterruptDATA -&gt; HplSensirionSht11C.InterruptDATA;
+
+  components new TimerMilliC();
+  SensirionSht11LogicP.Timer -&gt; TimerMilliC;
+
+  components LedsC;
+  SensirionSht11LogicP.Leds -&gt; LedsC;
+}
+</pre>
+<pre class="literal-block">
+tos/chips/sht11/SensirionSht11LogicP.nc
+
+generic module SensirionSht11LogicP() {
+  provides interface SensirionSht11[ uint8_t client ];
+
+  uses interface GeneralIO as DATA;
+  uses interface GeneralIO as CLOCK;
+  uses interface GpioInterrupt as InterruptDATA;
+
+  uses interface Timer&lt;TMilli&gt;;
+
+  uses interface Leds;
+}
+implementation {
+
+  ... bus protocol details omitted for brevity ...
+
+}
+</pre>
+<pre class="literal-block">
+tos/platforms/telosa/chips/sht11/HplSensirionSht11C.nc
+
+// Low-level, platform-specific glue-code to access the SHT11 sensor found
+// on telos-family motes - here  the HPL just provides resource management
+// and access to the SHT11 data, clock and interrupt pins
+configuration HplSensirionSht11C {
+  provides interface Resource[ uint8_t id ];
+  provides interface GeneralIO as DATA;
+  provides interface GeneralIO as SCK;
+  provides interface GpioInterrupt as InterruptDATA;
+}
+implementation {
+  // Pins used to access the SHT11
+  components HplMsp430GeneralIOC;
+
+  components new Msp430GpioC() as DATAM;
+  DATAM -&gt; HplMsp430GeneralIOC.Port15;
+  DATA = DATAM;
+
+  components new Msp430GpioC() as SCKM;
+  SCKM -&gt; HplMsp430GeneralIOC.Port16;
+  SCK = SCKM;
+
+  components new Msp430GpioC() as PWRM;
+  PWRM -&gt; HplMsp430GeneralIOC.Port17;
+
+  // HPL logic for switching the SHT11 on and off
+  components HplSensirionSht11P;
+  HplSensirionSht11P.PWR -&gt; PWRM;
+  HplSensirionSht11P.DATA -&gt; DATAM;
+  HplSensirionSht11P.SCK -&gt; SCKM;
+
+  components new TimerMilliC();
+  HplSensirionSht11P.Timer -&gt; TimerMilliC;
+
+  components HplMsp430InterruptC;
+  components new Msp430InterruptC() as InterruptDATAC;
+  InterruptDATAC.HplInterrupt -&gt; HplMsp430InterruptC.Port15;
+  InterruptDATA = InterruptDATAC.Interrupt;
+
+  // The arbiter and power manager for the SHT11
+  components new FcfsArbiterC( &quot;Sht11.Resource&quot; ) as Arbiter;
+  Resource = Arbiter;
+
+  components new SplitControlPowerManagerC();
+  SplitControlPowerManagerC.SplitControl -&gt; HplSensirionSht11P;
+  SplitControlPowerManagerC.ArbiterInit -&gt; Arbiter.Init;
+  SplitControlPowerManagerC.ArbiterInfo -&gt; Arbiter.ArbiterInfo;
+  SplitControlPowerManagerC.ResourceDefaultOwner -&gt; Arbiter.ResourceDefaultOwner;
+}
+</pre>
+<pre class="literal-block">
+tos/platforms/telosa/chips/sht11/HplSensirionSht11P.nc
+
+// Switch the SHT11 on and off, and handle the 11ms warmup delay
+module HplSensirionSht11P {
+  // The SplitControl interface powers the SHT11 on or off (it's automatically
+  // called by the SHT11 power manager, see HplSensirionSht11C)
+  // We use a SplitControl interface as we need to wait 11ms for the sensor to
+  // warm up
+  provides interface SplitControl;
+  uses interface Timer&lt;TMilli&gt;;
+  uses interface GeneralIO as PWR;
+  uses interface GeneralIO as DATA;
+  uses interface GeneralIO as SCK;
+}
+implementation {
+  task void stopTask();
+
+  command error_t SplitControl.start() {
+    // Power SHT11 on and wait for 11ms
+    call PWR.makeOutput();
+    call PWR.set();
+    call Timer.startOneShot( 11 );
+    return SUCCESS;
+  }
+
+  event void Timer.fired() {
+    signal SplitControl.startDone( SUCCESS );
+  }
+
+  command error_t SplitControl.stop() {
+    // Power the SHT11 off
+    call SCK.makeInput();
+    call SCK.clr();
+    call DATA.makeInput();
+    call DATA.clr();
+    call PWR.clr();
+    post stopTask();
+    return SUCCESS;
+  }
+
+  task void stopTask() {
+    signal SplitControl.stopDone( SUCCESS );
+  }
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="mda100-sensor-board-directory-organization" name="mda100-sensor-board-directory-organization">4. MDA100 Sensor Board Directory Organization</a></h2>
+<p>Here we show the organization of the sensor board directory for the
+mica-family Xbow MDA100CA and MDA100CB sensor boards, which have
+temperature and light sensors. It is found in
+<tt class="docutils literal"><span class="pre">tos/sensorboards/mda100</span></tt>:</p>
+<pre class="literal-block">
+./tos/sensorboards/mda100:
+.sensor                                       # Compiler configuration
+ArbitratedPhotoDeviceP.nc                     # Light sensor support component
+ArbitratedTempDeviceP.nc                      # Temperature sensor support component
+DemoSensorC.nc                                # Override TinyOS's default sensor
+PhotoC.nc                                     # Light sensor HIL
+PhotoImplP.nc                                 # Light sensor support component
+PhotoTempConfigC.nc                           # Shared support component
+PhotoTempConfigP.nc                           # Shared support component
+SharedAnalogDeviceC.nc                        # Shared support component
+SharedAnalogDeviceP.nc                        # Shared support component
+TempC.nc                                      # Temperature Sensor HIL
+ca/TempImplP.nc                               # Temperature sensor support component
+                                              # (MDA100CA board)
+cb/TempImplP.nc                               # Temperature sensor support component
+                                              # (MDA100CB board)
+mda100.h                                      # Header file for mda100
+</pre>
+<p>This sensor board provides only a HIL (PhotoC and TempC components), and overrides the
+TinyOS demo sensor (DemoSensorC). The demo sensor is an alias for PhotoC.</p>
+<p>The two forms of the mda100 differ only by the wiring of the
+temperature sensor.  The user has to specify which form of the sensor
+board is in use by providing a <tt class="docutils literal"><span class="pre">-I%T/sensorboards/mda100/ca</span></tt> or
+<tt class="docutils literal"><span class="pre">-I%T/sensorboards/mda100/cb</span></tt> compiler option.</p>
+<p>This sensor board relies on a platform-provided <tt class="docutils literal"><span class="pre">MicaBusC</span></tt> component
+that specifies how the mica-family sensor board bus is connected to
+the microcontroller.</p>
+</div>
+</div>
+</div>
+</body>
+</html>
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+<title>Virtualization</title>
+<meta name="author" content="Philip Levis" />
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+:Author: David Goodger
+:Contact: goodger@users.sourceforge.net
+:date: $Date: 2009-02-03 23:07:32 $
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+</head>
+<body>
+<div class="document" id="virtualization">
+<h1 class="title">Virtualization</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">110</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Philip Levis</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">20-Jun-2005</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.5</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2006-12-12</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo desribes how TinyOS 2.0 virtualizes common abstractions through
+a combination of static allocation and runtime arbitration. It describes
+the benefits and tradeoffs of this approach and how it is used in several
+major abstractions.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>The TinyOS component model allows flexible composition, but that
+flexibility is often limited by reasons which are not explicitly
+stated in components. These implicit assumptions can manifest as buggy
+behavior. In TinyOS 1.x, on the Telos platform, if a program
+simultaneously initializes non-volatile storage and the radio, one of
+them will fail: a program has to initialize them serially. They can
+also manifest as compile-time errors: if two separate communication
+services happen to receive packets of the same AM type, the nesC
+compiler will issue a warning due to the buffer swap semantics.</p>
+<p>On one hand, the flexbility components provide allows expert users to
+build complex and intricate applications. On the other, it can make
+managing complexity and intricacy very difficult when building very
+simple and basic applications. To promote this latter class of
+development, TinyOS 2.x has the notion of &quot;distributions,&quot; which are
+collections of system abstractions that are designed to be used
+together. As long as a user implements an application in terms of the
+distribution, the underlying components will operate correctly and
+there will be no unforseen failures.</p>
+<p>This memo documents an example distribution, named OSKI (Operating
+System Key Interfaces). It describes the services OSKI provides and
+how their implementations are structured to simplify application
+writing.</p>
+</div>
+<div class="section">
+<h1><a id="distributions" name="distributions">2. Distributions</a></h1>
+<p>A distribution presents <em>services</em> to the programmer. A service is a
+set of generic (instantiable) components that represent API
+abstractions. To use an abstraction, a programmer instantiates the
+generic. For example, OSKI has the <tt class="docutils literal"><span class="pre">AMSenderC</span></tt> abstraction for
+sending active messages. The AMSender generic component takes a single
+parameter, the AM type. For example, if a programmer wants a component
+named AppM to send active messages of type 32, the configuration would
+look something like this:</p>
+<div class="line-block">
+<div class="line">configuration AppC {}</div>
+<div class="line">implementation {</div>
+<div class="line-block">
+<div class="line">components AppM, new AMSenderC(32);</div>
+<div class="line">AppM.AMSend -&gt; AMSenderC;</div>
+</div>
+<div class="line">}</div>
+</div>
+<p>Services often present abstractions at a fine grain. For example, the
+active message service has AMSender, AMReceiver, and AMSnooper, each
+of which is a separate abstraction.</p>
+<div class="section">
+<h2><a id="controlling-a-service" name="controlling-a-service">2.1 Controlling a Service</a></h2>
+<p>Every service has two abstractions: <tt class="docutils literal"><span class="pre">ServiceC</span></tt>, for powering it on
+and off, and <tt class="docutils literal"><span class="pre">ServiceNotifierC</span></tt>, for learning when the service's
+power state has changed. For example, active messages have the
+<tt class="docutils literal"><span class="pre">AMServiceC</span></tt> and <tt class="docutils literal"><span class="pre">AMServiceNotifierC</span></tt> abstractions. A service
+abstraction provides the <tt class="docutils literal"><span class="pre">Service</span></tt> interface</p>
+<div class="line-block">
+<div class="line">interface Service {</div>
+<div class="line-block">
+<div class="line">command void start();</div>
+<div class="line">command void stop();</div>
+<div class="line">command bool isRunning();</div>
+</div>
+<div class="line">}</div>
+</div>
+<p>while a notifier abstraction provides the <tt class="docutils literal"><span class="pre">ServiceNotify</span></tt> interface</p>
+<div class="line-block">
+<div class="line">interface ServiceNotify {</div>
+<div class="line-block">
+<div class="line">event void started();</div>
+<div class="line">event void stopped();</div>
+</div>
+<div class="line">}</div>
+</div>
+<p>For example, if a routing layer wants to be able to turn the active
+message layer on and off, then it needs to instantiate an AMServiceC.
+However, many components may be using active messages and have their
+own instances of AMServiceC; while routing might consider it
+acceptable to turn off active messages, other components might
+not. Therefore, a service abstraction does not necessarily represent
+explicit control; instead, each service has a <em>policy</em> for how it
+deals with control requests. When a service changes its activity
+state, it MUST signal all instances of its ServiceNotifierC.</p>
+<p>For example, the active messages service has an &quot;OR&quot; policy; the
+service remains active if <em>any</em> of its ServiceC instances are in the
+on state, and goes inactive if and only if <em>all</em> of its ServiceC
+instances are in the off state. This is an example timeline for
+active messages being used by two components, RouterA and RouterB:</p>
+<ol class="arabic simple">
+<li>System boots: active messages are off.</li>
+<li>RouterA calls <tt class="docutils literal"><span class="pre">Service.start()</span></tt>. The AM layer is turned on.</li>
+<li>All AMServiceNotifierC abstractions signal <tt class="docutils literal"><span class="pre">ServiceNotify.started().</span></tt></li>
+<li>RouterB calls <tt class="docutils literal"><span class="pre">Service.start()</span></tt>.</li>
+<li>RouterA calls <tt class="docutils literal"><span class="pre">Service.stop()</span></tt>. RouterB is still using active messages, so the layer stays on.</li>
+<li>RouterB calls <tt class="docutils literal"><span class="pre">Service.stop()</span></tt>. The AM layer is turned off.</li>
+<li>All AMServiceNotifierC abstractions signal <tt class="docutils literal"><span class="pre">ServiceNotify.stopped().</span></tt></li>
+</ol>
+<p>By default, a service that has a control interface MUST be off. For an
+application to use the service, at least one component has to call
+<tt class="docutils literal"><span class="pre">Service.start()</span></tt>.</p>
+</div>
+<div class="section">
+<h2><a id="service-initialization" name="service-initialization">2.2 Service Initialization</a></h2>
+<p>Because distributions are collections of services that are designed to
+work together, they can avoid many of the common issues that arise
+when composing TinyOS programs. For example, user code does not have
+to initialize a service; this is done automatically by the
+distribution.  If a user component instantiates a service abstraction,
+the distribution MUST make sure that the service is properly
+initialized. Section 4 goes into an example implementation of how a
+distribution can achieve this.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="oski-services" name="oski-services">3. OSKI Services</a></h1>
+<p>This section briefly describes the services that OSKI, an example
+distribution provides. It is intended to give a feel for how a
+distribution presents its abstractions.</p>
+<div class="section">
+<h2><a id="timers" name="timers">3.1 Timers</a></h2>
+<p>OSKI provides timers at one fidelity: milliseconds. Timers do not have
+a Service abstraction, as their use implicitly defines whether the
+service is active or not (the timer service is off if there are no
+pending timers).  The <tt class="docutils literal"><span class="pre">OSKITimerMsC</span></tt> component provides the
+abstraction: it provides a single interface, <tt class="docutils literal"><span class="pre">Timer&lt;TMilli&gt;</span></tt>.</p>
+<p>This is an example code snippet for instantiating a timer in a
+configuration:</p>
+<div class="line-block">
+<div class="line">configuration ExampleC {</div>
+<div class="line-block">
+<div class="line">uses interface Timer&lt;TMilli&gt;;</div>
+</div>
+<div class="line">}</div>
+<div class="line"><br /></div>
+<div class="line">configuration TimerExample {}</div>
+<div class="line">implementation {</div>
+<div class="line-block">
+<div class="line">components ExampleC, new OSKITimerMsC() as T;</div>
+<div class="line">ExampleC.Timer -&gt; T;</div>
+</div>
+<div class="line">}</div>
+</div>
+</div>
+<div class="section">
+<h2><a id="active-messages" name="active-messages">3.2 Active Messages</a></h2>
+<p>OSKI provides four functional active messaging abstractions:
+<tt class="docutils literal"><span class="pre">AMSender</span></tt>, <tt class="docutils literal"><span class="pre">AMReceiver</span></tt>, <tt class="docutils literal"><span class="pre">AMSnooper</span></tt>, and
+<tt class="docutils literal"><span class="pre">AMSnoopingReceiver</span></tt>. Each one takes an <tt class="docutils literal"><span class="pre">am_id_t</span></tt> as a parameter,
+indicating the AM type. Following the general TinyOS 2.x approach to
+networking, all active message abstractions provide the <tt class="docutils literal"><span class="pre">Packet</span></tt> and
+<tt class="docutils literal"><span class="pre">AMPacket</span></tt> interfaces.</p>
+<dl class="docutils">
+<dt>AMSender</dt>
+<dd>This abstraction is for sending active messages. In addition to Packet
+and AMPacket, it provides the AMSend interface.</dd>
+<dt>AMReceiver</dt>
+<dd>This abstraction is for receiving active messages addressed to the
+node or to the broadcast address. In addition to Packet and AMPacket,
+it provides the Receive interface.</dd>
+<dt>AMSnooper</dt>
+<dd>This abstraction is for receiving active messages addressed to other
+nodes (&quot;snooping&quot; on traffic). In addition to Packet and AMPacket,
+it provides the Receive interface.</dd>
+<dt>AMSnoopingReceiver</dt>
+<dd>A union of the functionality of AMReceiver and AMSnooper, this
+abstraction allows a component to receive <em>all</em> active messages
+that it hears. The AMPacket interface allows a component to determine
+whether such a message is destined for it. In addition to
+Packet and AMPacket, this component provides the Receive interface.</dd>
+</dl>
+<p>This snippet of code is an example of a configuration that composes a
+routing layer with needed active message abstractions. This
+implementation snoops on data packets sent by other nodes to improve
+its topology formation:</p>
+<div class="line-block">
+<div class="line">configuration RouterC {</div>
+<div class="line-block">
+<div class="line">uses interface AMSend as DataSend;</div>
+<div class="line">uses interface AMSend as ControlSend;</div>
+<div class="line">uses interface Receive as DataReceive;</div>
+<div class="line">uses interface Receive as BeaconReceive;</div>
+</div>
+<div class="line">}</div>
+<div class="line"><br /></div>
+<div class="line">configuration RoutingExample {</div>
+<div class="line-block">
+<div class="line">components RouterC;</div>
+<div class="line">components new AMSender(5) as CSender;</div>
+<div class="line">components new AMSender(6) as DSender;</div>
+<div class="line">components new AMReceiver(5) as CReceiver;</div>
+<div class="line">components new AMSnoopingReceiver(6) as DReceiver;</div>
+<div class="line"><br /></div>
+<div class="line">RouterC.DataSend -&gt; DSender;</div>
+<div class="line">RouterC.ControlSend -&gt; CSender;</div>
+<div class="line">RouterC.DataReceive -&gt; DReceiver;</div>
+<div class="line">RouterC.ControlReceive -&gt; CReceiver;</div>
+</div>
+<div class="line">}</div>
+</div>
+<p>The active messages layer has control abstractions, named <tt class="docutils literal"><span class="pre">AMServiceC</span></tt>
+and <tt class="docutils literal"><span class="pre">AMServiceNotifierC</span></tt>. Active messages follow an OR policy.</p>
+</div>
+<div class="section">
+<h2><a id="broadcasts" name="broadcasts">3.3 Broadcasts</a></h2>
+<p>In addition to active messages, OSKI provides a broadcasting service.
+Unlike active messages, which are addressed in terms of AM addresses,
+broadcasts are address-free. Broadcast communication has two
+abstractions: <tt class="docutils literal"><span class="pre">BroadcastSenderC</span></tt> and <tt class="docutils literal"><span class="pre">BroadcastReceiverC</span></tt>, both of
+which take a parameter, a broadcast message type. This parameter is
+similar to the AM type in active messages. Both abstractions provide
+the Packet interface. The broadcast service has control abstractions,
+named <tt class="docutils literal"><span class="pre">BroadcastServiceC</span></tt> and <tt class="docutils literal"><span class="pre">BroadcastServiceNotifierC</span></tt>, which
+follow an OR policy.</p>
+</div>
+<div class="section">
+<h2><a id="tree-collection-convergecast" name="tree-collection-convergecast">3.4 Tree Collection/Convergecast</a></h2>
+<p><strong>NOTE: These services are not supported as of the 2.x prerelease.
+They will be supported by the first full release.</strong></p>
+<p>OSKI's third communication service is tree-based collection routing.
+This service has four abstractions:</p>
+<dl class="docutils">
+<dt>CollectionSenderC</dt>
+<dd>This abstraction is for sending packets up the collection tree,
+to the collection root. It provides the Send and Packet interfaces.</dd>
+<dt>CollectionReceiverC</dt>
+<dd>This abstraction is for a collection end-point (a tree root). It
+provides the Receive, Packet, and CollectionPacket interfaces.</dd>
+<dt>CollectionInterceptorC</dt>
+<dd>This abstraction represents a node's ability to view and possibly
+suppress packets it has received for forwarding. It provides
+the Intercept, CollectionPacket, and Packet interfaces.</dd>
+<dt>CollectionSnooperC</dt>
+<dd>This abstraction allows a node to overhear routing packets
+sent to other nodes to forward. It provides the Receive,
+CollectionPacket, and Packet interfaces.</dd>
+</dl>
+<p>All of the collection routing communication abstractions take a
+parameter, similar to active messages and broadcasts, so multiple
+components can independelty use collection routing. In addition to
+communication, collection routing has an additional abstraction:</p>
+<dl class="docutils">
+<dt>CollectionControlC</dt>
+<dd>This abstraction controls whether a node is a collection root
+or not.</dd>
+</dl>
+<p>Finally, collection routing has <tt class="docutils literal"><span class="pre">CollectionServiceC</span></tt> and
+<tt class="docutils literal"><span class="pre">CollectionServiceNotifierC</span></tt> abstractions, which follow an OR
+policy.</p>
+</div>
+<div class="section">
+<h2><a id="uart" name="uart">3.5 UART</a></h2>
+<p><strong>NOTE: These services are not supported as of the 2.x prerelease.
+They will be supported by the first full release.
+They will be fully defined pending discussion/codification of
+UART interfaces.</strong></p>
+</div>
+</div>
+<div class="section">
+<h1><a id="oski-service-structure-and-design" name="oski-service-structure-and-design">4. OSKI Service Structure and Design</a></h1>
+<p>Presenting services through abstractions hides the underlying wiring
+details and gives a distribution a great deal of implementation
+freedom. One issue that arises, however, is initialization. If a user
+component instantiates a service, then a distribution MUST make sure
+the service is initialized properly. OSKI achieves this by
+encapsulating a complete service as a working component; abstractions
+export the service's interfaces.</p>
+<div class="section">
+<h2><a id="example-timers" name="example-timers">4.1 Example: Timers</a></h2>
+<p>For example, the timer service provides a single abstraction,
+OskiTimerMilliC, which is a generic component. OskiTimerMilliC provides a
+single instance of the Timer&lt;TMilli&gt; interface. It is implemented as a
+wrapper around the underlying timer service, a component named
+<tt class="docutils literal"><span class="pre">TimerMilliImplP</span></tt>, which provides a parameterized interface and
+follows the Service Instance design pattern[sipattern]_:</p>
+<div class="line-block">
+<div class="line">generic configuration OskiTimerMilliC() {</div>
+<div class="line-block">
+<div class="line">provides interface Timer&lt;TMilli&gt;;</div>
+</div>
+<div class="line">}</div>
+<div class="line">implementation {</div>
+<div class="line-block">
+<div class="line">components TimerMilliImplP;</div>
+<div class="line">Timer = TimerMilliImplP.TimerMilli[unique(&quot;TimerMilliC.TimerMilli&quot;)];</div>
+</div>
+<div class="line">}</div>
+</div>
+<p>TimerMilliImplP is a fully composed and working service. It takes
+a platform's timer implementation and makes sure it is initialized through
+the TinyOS boot sequence[boot]_:</p>
+<div class="line-block">
+<div class="line">configuration TimerMilliImplP {</div>
+<div class="line-block">
+<div class="line">provides interface Timer&lt;TMilli&gt; as TimerMilli[uint8_t id];</div>
+</div>
+<div class="line">}</div>
+<div class="line">implementation {</div>
+<div class="line-block">
+<div class="line">components TimerMilliC, Main;</div>
+<div class="line">Main.SoftwareInit -&gt; TimerMilliC;</div>
+<div class="line">TimerMilli = TimerMilliC;</div>
+</div>
+<div class="line">}</div>
+</div>
+<p>This composition means that if any component instantiates a timer,
+then TimerMilliImplP will be included in the component graph. If
+TimerMilliImplP is included, the TimerMilliP (the actual platform HIL
+implementation) will be properly initialized at system boot time. In
+this case, the order of initialization isn't important; in cases where
+there are services that have to be initialized in a particular
+sequence to ensure proper ordering, the Impl components can
+orchestrate that order. For example, a distribution can wire
+Main.SoftwareInit to a DistributionInit component, which calls
+sub-Inits in a certain order; when a service is included, it wires
+itself to one of the sub-Inits.</p>
+<p>The user does not have to worry about unique strings to manage the
+underlying Service Instance pattern: the abstractions take care of
+that.</p>
+</div>
+<div class="section">
+<h2><a id="example-active-messages" name="example-active-messages">4.2 Example: Active Messages</a></h2>
+<p>Active messaging reprsent a slightly more complex service, as it has
+several abstractions and a control interface. However, it follows the
+same basic pattern: abstractions are generics that export wirings to
+the underlying service, named <tt class="docutils literal"><span class="pre">ActiveMessageImplP</span></tt>:</p>
+<div class="line-block">
+<div class="line">configuration ActiveMessageImplP {</div>
+<div class="line-block">
+<div class="line">provides {</div>
+<div class="line-block">
+<div class="line">interface SplitControl;</div>
+<div class="line">interface AMSend[am_id_t id];</div>
+<div class="line">interface Receive[am_id_t id];</div>
+<div class="line">interface Receive as Snoop[am_id_t id];</div>
+<div class="line">interface Packet;</div>
+<div class="line">interface AMPacket;</div>
+</div>
+<div class="line">}</div>
+</div>
+<div class="line">}</div>
+<div class="line"><br /></div>
+<div class="line">implementation {</div>
+<div class="line-block">
+<div class="line">components ActiveMessageC, Main;</div>
+<div class="line"><br /></div>
+<div class="line">Main.SoftwareInit -&gt; ActiveMessageC;</div>
+<div class="line"><br /></div>
+<div class="line">SplitControl = ActiveMessageC;</div>
+<div class="line">AMSend = ActiveMessageC;</div>
+<div class="line">Receive = ActiveMessageC.Receive;</div>
+<div class="line">Snoop = ActiveMessageC.Snoop;</div>
+<div class="line">Packet = ActiveMessageC;</div>
+<div class="line">AMPacket = ActiveMessageC;</div>
+</div>
+<div class="line">}</div>
+</div>
+<p>For example, this is the AMSender abstraction:</p>
+<div class="line-block">
+<div class="line">generic configuration AMSenderC(am_id_t AMId) {</div>
+<div class="line-block">
+<div class="line">provides {</div>
+<div class="line-block">
+<div class="line">interface AMSend;</div>
+<div class="line">interface Packet;</div>
+<div class="line">interface AMPacket;</div>
+</div>
+<div class="line">}</div>
+</div>
+<div class="line">}</div>
+<div class="line"><br /></div>
+<div class="line">implementation {</div>
+<div class="line-block">
+<div class="line">components ActiveMessageImplP as Impl;</div>
+<div class="line"><br /></div>
+<div class="line">AMSend = Impl.AMSend[AMId];</div>
+<div class="line">Packet = Impl;</div>
+<div class="line">AMPacket = Impl;</div>
+</div>
+<div class="line">}</div>
+</div>
+<p>AMReceiver is similar, except that it wires to the Receive interface,
+while AMSnooper wires to the Snoop interface, and AMSnoopingReceiver
+provides a single Receive that exports both Snoop and Receive (the
+unidirectional nature of the Receive interface makes this simple to
+achieve, as it represents only fan-in and no fan-out).</p>
+<p>ActiveMessageImplP does not provide a Service interface; it provides
+the SplitControl interface of the underlying active message
+layer. OSKI layers a <em>ServiceController</em> on top of SplitControl. As
+the active message service follows an OR policy, OSKI uses a
+<tt class="docutils literal"><span class="pre">ServiceOrControllerM</span></tt>, which is a generic component with the
+following signature:</p>
+<div class="line-block">
+<div class="line">generic module ServiceOrControllerM(char strID[]) {</div>
+<div class="line-block">
+<div class="line">provides {</div>
+<div class="line-block">
+<div class="line">interface Service[uint8_t id];</div>
+<div class="line">interface ServiceNotify;</div>
+</div>
+<div class="line">}</div>
+<div class="line">uses {</div>
+<div class="line-block">
+<div class="line">interface SplitControl;</div>
+</div>
+<div class="line">}</div>
+</div>
+<div class="line">}</div>
+</div>
+<p>ServiceOrControllerM follows the Service Instance pattern[sipattern];
+it calls its underlying SplitControl based on the state of each of its
+instances of the Service interface. The parameter denotes the string
+used to generate the unique service IDs. The active messages service
+controller implementation, AMServiceImplP, instantiates a
+ServiceOrControllerM, wires it to ActiveMessageImplP:</p>
+<div class="line-block">
+<div class="line">configuration AMServiceImplP {</div>
+<div class="line-block">
+<div class="line">provides interface Service[uint8_t id];</div>
+<div class="line">provides interface ServiceNotify;</div>
+</div>
+<div class="line">}</div>
+<div class="line">implementation {</div>
+<div class="line-block">
+<div class="line">components ActiveMessageImplP;</div>
+<div class="line">components new ServiceOrControllerM(&quot;AMServiceImplP.Service&quot;);</div>
+<div class="line"><br /></div>
+<div class="line">Service = ServiceOrControllerM;</div>
+<div class="line">ServiceOrControllerM.SplitControl -&gt; ActiveMessageImplP;</div>
+<div class="line">ServiceNotify = ServiceOrControllerM;</div>
+</div>
+<div class="line">}</div>
+</div>
+<p>AMServiceC then provides an instance of AMServiceImplP.Service:</p>
+<div class="line-block">
+<div class="line">generic configuration AMServiceC() {</div>
+<div class="line-block">
+<div class="line">provides interface Service;</div>
+</div>
+<div class="line">}</div>
+<div class="line"><br /></div>
+<div class="line">implementation {</div>
+<div class="line-block">
+<div class="line">components AMServiceImplP;</div>
+<div class="line"><br /></div>
+<div class="line">Service = AMServiceImplP.Service[unique(&quot;AMServiceImplP.Service&quot;)];</div>
+</div>
+<div class="line">}</div>
+</div>
+<p>Note that the two strings are the same, so that the uniqueCount() in
+the ServiceOrControllerM is correct based on the number of instances
+of AMServiceC. As with timers, encapsulating the service instance
+pattern in generic components relieves the programmer of having to
+deal with unique strings, a common source of bugs in TinyOS 1.x code.</p>
+</div>
+<div class="section">
+<h2><a id="oski-requirements" name="oski-requirements">4.3 OSKI Requirements</a></h2>
+<p>OSKI is a layer on top of system components: it presents a more
+usable, less error-prone, and simpler interface to common TinyOS
+functionality. For OSKI to work properly, a platform MUST be compliant
+with the following TEPs:</p>
+<blockquote>
+o TEP 102: Timers
+o TEP 106: Schedulers and Tasks
+o TEP 107: TinyOS 2.x Boot Sequence
+o TEP 1XX: Active Messages
+o TEP 1XX: Collection Routing</blockquote>
+<p>Not following some of these TEPS MAY lead to OSKI services being
+inoperable, exhibit strange behavior, or being uncompilable.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="distribution-interfaces" name="distribution-interfaces">5. Distribution Interfaces</a></h1>
+<p>The basic notion of a distribution is that it provides a self-contained,
+tested, and complete (for an application domain) programming interface
+to TinyOS. Layers can be added on top of a distribution, but as a
+distribution is a self-contained set of abstractions, adding new
+services can lead to failures. A distribution represents a hard line
+above which all other code operates. One SHOULD NOT add new services,
+as they can disrupt the underlying organization. Of course, one MAY
+create a new distribution that extends an existing one, but this is
+in and of itself a new distribution.</p>
+<p>Generally, as distributions are intended to be higher-level abstractions,
+they SHOULD NOT provide any asynchronous (async) events. They can,
+of course, provide async commands. The idea is that no code written on
+top of a distribution should be asynchronous, due to the complexity
+introduced by having to manage concurrency. Distributions are usually
+platform independent; if an application needs async events, then
+chances are it is operating close to the hardware, and so is not
+platform independent.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">6. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Philip Levis</div>
+<div class="line">467 Soda Hall</div>
+<div class="line">UC Berkeley</div>
+<div class="line">Berkeley, CA 94720</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 510 290 5283</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.berkeley.edu">pal&#64;cs.berkeley.edu</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">7. Citations</a></h1>
+<table class="docutils citation" frame="void" id="rst" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="rst">[rst]</a></td><td>reStructuredText Markup Specification. &lt;<a class="reference" href="http://docutils.sourceforge.net/docs/ref/rst/restructuredtext.html">http://docutils.sourceforge.net/docs/ref/rst/restructuredtext.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="sipattern" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="sipattern">[sipattern]</a></td><td>The Service Instance Pattern. In <em>Software Design Patterns for TinyOS.</em> David Gay, Philip Levis, and David Culler. Published in Proceedings of the ACM SIGPLAN/SIGBED 2005 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05).</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="boot" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="boot">[boot]</a></td><td>TEP 107: TinyOS 2.x Boot Sequence.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
diff --git a/doc/html/tep111.html b/doc/html/tep111.html
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+<div class="document" id="message-t">
+<h1 class="title">message_t</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">111</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Philip Levis</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo covers the TinyOS 2.x message buffer abstraction, <tt class="docutils literal"><span class="pre">message_t</span></tt>.
+It describes the message buffer design considerations, how and where
+<tt class="docutils literal"><span class="pre">message_t</span></tt> is specified, and how data link layers should access it.
+The major goal of <tt class="docutils literal"><span class="pre">message_t</span></tt> is to allow datagrams to be passed between
+different link layers as a contiguous region of memory with zero copies.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>In TinyOS 1.x, a message buffer is a <tt class="docutils literal"><span class="pre">TOS_Msg</span></tt>. A buffer contains an
+active message (AM) packet as well as packet metadata, such as timestamps,
+acknowledgement bits, and signal strength if the packet was received.
+<tt class="docutils literal"><span class="pre">TOS_Msg</span></tt> is a fixed size structure whose size is defined by the maximum
+AM payload length (the default is 29 bytes). Fixed sized buffers allows
+TinyOS 1.x to have zero-copy semantics: when a component receives a
+buffer, rather than copy out the contents it can return a pointer
+to a new buffer for the underlying layer to use for the next received
+packet.</p>
+<p>One issue that arises is what defines the <tt class="docutils literal"><span class="pre">TOS_Msg</span></tt> structure, as different
+link layers may require different layouts. For example, 802.15.4 radio
+hardware (such as the CC2420, used in the Telos and micaZ platforms)
+may require 802.15.4 headers, while a software stack built on top of
+byte radios (such as the CC1000, used in the mica2 platform) can specify
+its own packet format. This means that <tt class="docutils literal"><span class="pre">TOS_Msg</span></tt> may be different on
+different platforms.</p>
+<p>The solution to this problem in TinyOS 1.x is for there to be a standard
+definition of <tt class="docutils literal"><span class="pre">TOS_Msg</span></tt>, which a platform (e.g., the micaZ) can
+redefine to match its radio. For example, a mica2 mote uses the standard
+definition, which is:</p>
+<pre class="literal-block">
+typedef struct TOS_Msg {
+  // The following fields are transmitted/received on the radio.
+  uint16_t addr;
+  uint8_t type;
+  uint8_t group;
+  uint8_t length;
+  int8_t data[TOSH_DATA_LENGTH];
+  uint16_t crc;
+
+  // The following fields are not actually transmitted or received
+  // on the radio! They are used for internal accounting only.
+  // The reason they are in this structure is that the AM interface
+  // requires them to be part of the TOS_Msg that is passed to
+  // send/receive operations.
+  uint16_t strength;
+  uint8_t ack;
+  uint16_t time;
+  uint8_t sendSecurityMode;
+  uint8_t receiveSecurityMode;
+} TOS_Msg;
+</pre>
+<p>while on a mote with a CC2420 radio (e.g., micaZ), <tt class="docutils literal"><span class="pre">TOS_Msg</span></tt> is defined as:</p>
+<pre class="literal-block">
+typedef struct TOS_Msg {
+  // The following fields are transmitted/received on the radio.
+  uint8_t length;
+  uint8_t fcfhi;
+  uint8_t fcflo;
+  uint8_t dsn;
+  uint16_t destpan;
+  uint16_t addr;
+  uint8_t type;
+  uint8_t group;
+  int8_t data[TOSH_DATA_LENGTH];
+
+  // The following fields are not actually transmitted or received
+  // on the radio! They are used for internal accounting only.
+  // The reason they are in this structure is that the AM interface
+  // requires them to be part of the TOS_Msg that is passed to
+  // send/receive operations.
+
+  uint8_t strength;
+  uint8_t lqi;
+  bool crc;
+  uint8_t ack;
+  uint16_t time;
+ } TOS_Msg;
+</pre>
+<p>There are two basic problems with this approach. First, exposing all of
+the link layer fields leads components to directly access the packet
+structure. This introduces dependencies between higher level components
+and the structure layout. For example, many network services built on
+top of data link layers care whether sent packets are acknowledged. They
+therefore check the <tt class="docutils literal"><span class="pre">ack</span></tt> field of <tt class="docutils literal"><span class="pre">TOS_Msg</span></tt>. If a link layer does not
+provide acknowledgements, it must still include the <tt class="docutils literal"><span class="pre">ack</span></tt> field
+and always set it to 0, wasting a byte of RAM per buffer.</p>
+<p>Second, this model does not easily support multiple data link layers.
+Radio chip implementations assume that the fields they require are
+defined in the structure and directly access them. If a platform
+has two different link layers (e.g., a CC1000 <em>and</em> a CC2420 radio),
+then a <tt class="docutils literal"><span class="pre">TOS_Msg</span></tt> needs to allocate the right amount of space for both
+of their headers while allowing implementations to directly access
+header fields. This is very difficult to do in C.</p>
+<p>The <tt class="docutils literal"><span class="pre">data</span></tt> payload is especially problematic. Many
+components refer to this field, so it must be at a fixed offset
+from the beginning of the structure.
+Depending on the underlying link layer, the header fields
+preceding it might have different lengths, and packet-level radios
+often require packets to be contiguous memory regions. Overall, these
+complexities make specifying the format of <tt class="docutils literal"><span class="pre">TOS_Msg</span></tt> very difficult.</p>
+<p>TinyOS has traditionally used statically sized packet buffers,
+rather than more dynamic approaches, such as scatter-gather I/O
+in UNIX sockets (see the man page for <tt class="docutils literal"><span class="pre">recv(2)</span></tt> for details).
+TinyOS 2.x continues this approach.</p>
+</div>
+<div class="section">
+<h1><a id="id1" name="id1">2. message_t</a></h1>
+<p>In TinyOS 2.x, the standard message buffer is <tt class="docutils literal"><span class="pre">message_t</span></tt>. The
+message_t structure is defined in <tt class="docutils literal"><span class="pre">tos/types/message.h</span></tt>:</p>
+<pre class="literal-block">
+typedef nx_struct message_t {
+  nx_uint8_t header[sizeof(message_header_t)];
+  nx_uint8_t data[TOSH_DATA_LENGTH];
+  nx_uint8_t footer[sizeof(message_footer_t)];
+  nx_uint8_t metadata[sizeof(message_metadata_t)];
+} message_t;
+</pre>
+<p>This format keeps data at a fixed offset on a platform, which
+is important when
+passing a message buffer between two different link layers. If the
+data payload were at different offsets for different link layers, then
+passing a packet between two link layers would require a <tt class="docutils literal"><span class="pre">memmove(3)</span></tt>
+operation (essentially, a copy). Unlike in TinyOS 1.x, where TOS_Msg
+as explicitly an active messaging packet, message_t is a more general
+data-link buffer. In practice, most data-link layers in TinyOS 2.x
+provide active messaging, but it is possible for a non-AM stack to
+share message_t with AM stacks.</p>
+<p>The header, footer, and metadata formats are all opaque. Source code
+cannot access fields directly. Instead, data-link layers provide access
+to fields through nesC interfaces.  Section 3 discusses this in
+greater depth.</p>
+<p>Every link layer defines its header, footer, and metadata
+structures. These structures MUST be external structs (<tt class="docutils literal"><span class="pre">nx_struct</span></tt>),
+and all of their fields MUST be external types (<tt class="docutils literal"><span class="pre">nx_*</span></tt>), for two
+reasons. First, external types ensure cross-platform compatibility <a class="footnote-reference" href="#id5" id="id2" name="id2">[1]</a>.
+Second, it forces structures to be aligned on byte boundaries,
+circumventing issues with the
+alignment of packet buffers and field offsets within them. Metadata fields
+must be nx_structs for when complete packets are forwarded to the serial
+port in order to log traffic.
+For example, the CC1000 radio implementation defines
+its structures in <tt class="docutils literal"><span class="pre">CC1000Msg.h</span></tt>:</p>
+<pre class="literal-block">
+typedef nx_struct cc1000_header {
+  nx_am_addr_t addr;
+  nx_uint8_t length;
+  nx_am_group_t group;
+  nx_am_id_t type;
+} cc1000_header_t;
+
+typedef nx_struct cc1000_footer {
+  nxle_uint16_t crc;
+} cc1000_footer_t;
+
+typedef nx_struct cc1000_metadata {
+  nx_uint16_t strength;
+  nx_uint8_t ack;
+  nx_uint16_t time;
+  nx_uint8_t sendSecurityMode;
+  nx_uint8_t receiveSecurityMode;
+} cc1000_metadata_t;
+</pre>
+<p>Each link layer defines its structures, but a <strong>platform</strong> is
+responsible for defining <tt class="docutils literal"><span class="pre">message_header_t</span></tt>, <tt class="docutils literal"><span class="pre">message_footer_t</span></tt>,
+and <tt class="docutils literal"><span class="pre">message_metadata_t</span></tt>. This is because a platform may have
+multiple link layers, and so only it can resolve which structures are
+needed. These definitions MUST be in a file in a platform directory
+named <tt class="docutils literal"><span class="pre">platform_message.h</span></tt>. The mica2 platform, for example, has
+two data link layers: the CC1000 radio and the TinyOS serial
+stack <a class="footnote-reference" href="#id6" id="id3" name="id3">[2]</a>. The serial packet format does not have a footer
+or metadata section. The <tt class="docutils literal"><span class="pre">platform_message.h</span></tt> of the mica2
+looks like this:</p>
+<pre class="literal-block">
+typedef union message_header {
+  cc1000_header_t cc1k;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  cc1000_footer_t cc1k;
+} message_footer_t;
+
+typedef union message_metadata {
+  cc1000_metadata cc1k;
+} message_metadata_t;
+</pre>
+<p>For a more complex example, consider a fictional platform named
+'megamica' that has both a CC1000 and a CC2420 radio. Its
+<tt class="docutils literal"><span class="pre">platform_message.h</span></tt> would look like this:</p>
+<pre class="literal-block">
+typedef union mega_mica_header {
+  cc1000_header_t cc1k;
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union mega_mica_footer {
+  cc1000_footer_t cc1k;
+  cc2420_footer_t cc2420;
+} message_footer_t;
+
+typedef union mega_mica_metadata {
+  cc1000_metadata_t cc1k;
+  cc2420_metadata_t cc2420;
+} message__metadata_t;
+</pre>
+<p>If a platform has more than one link layer, it SHOULD define each of the
+message_t fields to be a union of the underlying link layer structures.
+This ensures that enough space is allocated for all underlying link layers.</p>
+</div>
+<div class="section">
+<h1><a id="the-message-t-fields" name="the-message-t-fields">3. The message_t fields</a></h1>
+<p>TinyOS 2.x components treat packets as abstract data types (ADTs),
+rather than C structures, obtaining all of the traditional benefits
+of this approach. First and foremost, clients of a packet layer
+do not depend on particular field names or locations, allowing the
+implementations to choose packet formats and make a variety of
+optimizations.</p>
+<p>Components above the basic data-link layer MUST always access
+packet fields through interfaces.  A component that introduces
+new packet fields SHOULD provide an interface to those that
+are of interest to other components. These interfaces SHOULD take
+the form of get/set operations that take and return values, rather
+than offsts into the structure.</p>
+<p>For example, active messages have an interface named <tt class="docutils literal"><span class="pre">AMPacket</span></tt>
+which provides access commands to AM fields. In TinyOS 1.x, a
+component would directly access <tt class="docutils literal"><span class="pre">TOS_Msg.addr</span></tt>; in TinyOS 2.x,
+a component calls <tt class="docutils literal"><span class="pre">AMPacket.getAddress(msg)</span></tt>.
+The most basic of these interfaces is Packet, which provides
+access to a packet payload. TEP 116 describes common TinyOS
+packet ADT interfaces <a class="footnote-reference" href="#id7" id="id4" name="id4">[3]</a>.</p>
+<p>Link layer components MAY access packet fields differently than other
+components, as they are aware of the actual packet format. They can
+therefore implement the interfaces that provide access to the fields
+for other components.</p>
+<div class="section">
+<h2><a id="headers" name="headers">3.1 Headers</a></h2>
+<p>The message_t header field is an array of bytes whose size is
+the size of a platform's union of data-link headers.
+Because radio stacks often prefer packets to be stored contiguously,
+the layout of a packet in memory does not necessarily reflect the
+layout of its nesC structure.</p>
+<p>A packet header MAY start somewhere besides the beginning of
+the message_t. For example, consider the Telos platform:</p>
+<pre class="literal-block">
+typedef union message_header {
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+</pre>
+<p>The CC2420 header is 11 bytes long, while the serial header is
+5 bytes long. The serial header ends at the beginning of the
+data payload, and so six padding bytes precede it. This figure
+shows the layout of message_t, a 12-byte CC2420 packet, and
+a 12-byte serial packet on the Telos platform:</p>
+<pre class="literal-block">
+            11 bytes         TOSH_DATA_LENGTH        7 bytes
+          +-----------+-----------------------------+-------+
+message_t |  header   |          data               | meta  |
+          +-----------+-----------------------------+-------+
+
+          +-----------+------------+                +-------+
+CC2420    |  header   |   data     |                | meta  |
+          +-----------+------------+                +-------+
+
+                +-----+------------+
+Serial          | hdr |   data     |
+                +-----+------------+
+</pre>
+<p>Neither the CC2420 nor the serial stack has packet footers, and
+the serial stack does not have any metadata.</p>
+<p>The packet for a link layer does not necessarily start at the beginning
+of the message_t. Instead, it starts at a negative offset from the
+data field.  When a link layer component needs to read or write protocol
+header fields, it MUST compute the location of the header as a negative
+offset from the data field.  For example, the serial stack header has
+active message fields, such as the AM type. The command that returns
+the AM type, <tt class="docutils literal"><span class="pre">AMPacket.type()</span></tt>, looks like this:</p>
+<pre class="literal-block">
+serial_header_t* getHeader(message_t* msg) {
+  return (serial_header_t*)(msg-&gt;data - sizeof(serial_header_t));
+}
+command am_id_t AMPacket.type(message_t* msg) {
+  serial_header_t* hdr = getheader(msg);
+  return hdr-&gt;type;
+}
+</pre>
+<p>Because calculating the negative offset is a little bit unwieldy, the
+serial stack uses the internal helper function getHeader(). Many
+single-hop stacks follow this approach, as it is very likely
+that nesC will inline the function, eliminating the possible overhead.
+In most cases, the C compiler also compiles the call into a simple
+memory offset load.</p>
+<p>The following code is incorrect, as it directly casts the header field.
+It is an example of what components MUST NOT do:</p>
+<pre class="literal-block">
+serial_header_t* getHeader(message_t* msg) {
+  return (serial_header_t*)(msg-&gt;header);
+}
+</pre>
+<p>In the case of Telos, for example, this would result in a packet
+layout that looks like this:</p>
+<pre class="literal-block">
+            11 bytes         TOSH_DATA_LENGTH           7 bytes
+          +-----------+-----------------------------+-------+
+message_t |  header   |          data               | meta  |
+          +-----------+-----------------------------+-------+
+
+          +-----+     +------------+
+Serial    | hdr |     |   data     |
+          +-----+     +------------+
+</pre>
+</div>
+<div class="section">
+<h2><a id="data" name="data">3.2 Data</a></h2>
+<p>The data field of message_t stores the single-hop packet payload.
+It is TOSH_DATA_LENGTH bytes long. The default size is 28 bytes.
+A TinyOS application can redefine TOSH_DATA_LENGTH at compile time
+with a command-line option to ncc: <tt class="docutils literal"><span class="pre">-DTOSH_DATA_LENGTH=x</span></tt>.
+Because this value can be reconfigured, it is possible that two
+different versions of an application can have different MTU sizes.
+If a packet layer receives a packet whose payload size is
+longer than TOSH_DATA_LENGTH, it MUST discard the packet. As
+headers are right justified to the beginning of the data payload,
+the data payloads of all link layers on a platform start
+at the same fixed offset from the beginning of the message buffer.</p>
+</div>
+<div class="section">
+<h2><a id="footer" name="footer">3.3 Footer</a></h2>
+<p>The message_footer_t field ensures that message_t has enough space to
+store the footers for all underlying link layers when there are
+MTU-sized packets. Like headers, footers are not necessarily stored
+where the C structs indicate they are: instead, their placement is
+implementation dependent. A single-hop layer MAY store the footer
+contiguously with the data region. For short packets, this can mean
+that the footer will actually be stored in the data field.</p>
+</div>
+<div class="section">
+<h2><a id="metadata" name="metadata">3.4 Metadata</a></h2>
+<p>The metadata field of message_t stores data that
+a single-hop stack uses or collects does not transmit.
+This mechanism allows packet layers to store per-packet
+information such as RSSI or timestamps. For example, this is
+the CC2420 metadata structure:</p>
+<pre class="literal-block">
+typedef nx_struct cc2420_metadata_t {
+  nx_uint8_t tx_power;
+  nx_uint8_t rssi;
+  nx_uint8_t lqi;
+  nx_bool crc;
+  nx_bool ack;
+  nx_uint16_t time;
+} cc2420_metadata_t;
+</pre>
+</div>
+<div class="section">
+<h2><a id="variable-sized-structures" name="variable-sized-structures">3.5 Variable Sized Structures</a></h2>
+<p>The message_t structure is optimized for packets with fixed-size
+headers and footers. Variable-sized footers are generally easy
+to implement. Variable-sized headers are a bit more difficult.
+There are three general approaches that can be used.</p>
+<p>If the underlying link hardware is byte-based, the header can
+just be stored at the beginning of the message_t, giving it
+a known offset. There may be padding between the header and
+the data region, but assuming a byte-based send path this merely
+requires adjusting the index.</p>
+<p>If the underlying link hardware is packet-based, then the
+protocol stack can either include metadata (e.g., in the
+metadata structure) stating where the header begins or it
+can place the header at a fixed position and use <tt class="docutils literal"><span class="pre">memmove(3)</span></tt>
+on reception and transmit. In this latter case, on
+reception the packet is continguously read into the message_t
+beginning at the offset of the header structure. Once the
+packet is completely received, the header can be decoded,
+its length calculated, and the data region of the packet
+can be moved to the <tt class="docutils literal"><span class="pre">data</span></tt> field. On transmission,
+the opposite occurs: the data region (and footer if need
+be) are moved to be contiguous with the header. Note that
+on completion of transmission, they need to be moved back.
+Alternatively, the radio stack can institute a single
+copy at the botttom layer.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">4. Implementation</a></h1>
+<p>The definition of message_t can be found in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/types/message.h</span></tt>.</p>
+<p>The definition of the CC2420
+message format can be found in <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/cc2420/CC2420.h</span></tt>.</p>
+<p>The defintion of the CC1000 message format can be found in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/cc1000/CC1000Msg.h</span></tt>.</p>
+<p>The definition
+of the standard serial stack packet format can be found in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/lib/serial/Serial.h</span></tt></p>
+<p>The definition of
+the telos family packet format can be found in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/platform/telosa/platform_message.h</span></tt> and the micaz format can be found in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/platforms/micaz/platform_message.h</span></tt>.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">5. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Computer Science Laboratory</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">6. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id5" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="id5">[1]</a></td><td><a class="reference" href="http://nescc.sourceforge.net">nesC: A Programming Language for Deeply Embedded Networks.</a></td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id6" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="id6">[2]</a></td><td>TEP 113: Serial Communication.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id7" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id4" name="id7">[3]</a></td><td>TEP 116: Packet Protocols.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<title>Microcontroller Power Management</title>
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+<div class="document" id="microcontroller-power-management">
+<h1 class="title">Microcontroller Power Management</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">112</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Robert Szewczyk, Philip Levis, Martin Turon, Lama Nachman, Philip Buonadonna, Vlado Handziski</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section" id="abstract">
+<h1>Abstract</h1>
+<p>This memo documents how TinyOS manages the lower power state of a
+microcontroller.</p>
+</div>
+<div class="section" id="introduction">
+<h1>1. Introduction</h1>
+<p>Microcontrollers often have several power states, with varying power
+draws, wakeup latencies, and peripheral support. The microcontroller
+should always be in the lowest possible power state that can satisfy
+application requirements. Determining this state accurately requires
+knowing a great deal about the power state of many subsystems and
+their peripherals. Additionally, state transitions are common. Every
+time a microcontroller handles an interrupt, it moves from a low power
+state to an active state, and whenever the TinyOS scheduler finds the
+task queue empty it returns the microcontroller to a low power state.
+TinyOS 2.x uses three mechanisms to decide what low power state it
+puts a microcontroller into: status and control registers, a dirty
+bit, and a power state override. This memo documents these mechanisms
+and how they work, as well as the basics of subsystem power
+management.</p>
+</div>
+<div class="section" id="background">
+<h1>2. Background</h1>
+<p>The TinyOS scheduler[<a class="reference internal" href="#id3">2</a>] puts a processor into a sleep state when
+the task queue is empty. However, processors can have a spectrum of
+power states. For example, the MSP430 has one active mode (issuing
+instructions) and five low-power modes. The low power modes range from
+LPM0, which disables only the CPU and main system clock, to LPM4,
+which disables the CPU, all clocks, and the oscillator, expecting to
+be woken by an external interrupt source. The power draws of these low
+power modes can differ by a factor of 350 or more (75 uA for LPM0 at
+3V, 0.2 uA for LPM4). Correctly choosing the right microcontroller low
+power state can greatly increase system lifetime.</p>
+<p>TinyOS 1.x platforms manage MCU power in several different ways, but
+there are commonalities in the approaches. The mica platforms, for
+example, have a component named HPLPowerManagement, which has a
+commands for enabling and disabling low power modes, as well as a
+command (adjustPower()) to tell it to compute the low power state
+based on the configuration of its various control and status
+registers, storing the result in the Atmega128's MCU control
+register. When TinyOS tells the microcontroller to go to sleep, it
+uses the control register to decide exactly which power state to go
+into. In contrast, MSP430 based platforms such as Telos and eyes
+compute the low power state every time the scheduler tells the system
+to go to sleep.</p>
+<p>Each of the two approaches has benefits and drawbacks. The 1.x mica
+approach is efficient, in that it only calculates the low power state
+when told to. However, this leaves the decision of when to calculate
+the low power state to other components, which is an easy way to
+introduce bugs. The lack of a well-defined hardware abstraction
+architecture in 1.x exacerbates this problem. In contrast, the MSP430
+approach is simpler, in that the system will always enter the right
+power state without any external prompting. However, it is
+correspondingly costly, introducing 40-60 cycles of overhead to every
+interrupt that wakes the system up, which can be a bottleneck on the rate
+at which the system can handle interrupts.</p>
+<p>Both of these approaches assume that TinyOS can determine the correct
+low power state by examining control and status registers. For
+example, the MSP430 defaults to low power mode 3 (LPM3) unless it
+detects that Timer A, the USARTs, or the ADC is active, in which case
+it uses low power mode 1 (LPM1). From the perspective of what
+peripherals and subsystems might wake the node up or must continue
+operating while the MCU sleeps, this is true. However, power modes
+introduce wakeup latency, a factor which could be of interest to
+higher-level components. While wakeup latency is not a significant
+issue on very low power microcontrollers, such as the Atmega128 and
+MSP430, more powerful processors, such as the Xscale family (the basis
+of platforms such as the imote2) can have power states with wakeup
+latencies as large as 5ms. For some application domains, this latency
+could be a serious issue. Higher level components therefore need a way
+to give the TinyOS microcontroller power manager information on their
+requirements, which it considers when calculating the right low power
+state.</p>
+</div>
+<div class="section" id="id1">
+<h1>3. Microcontroller Power Management</h1>
+<p>TinyOS 2.x uses three basic mechanisms to manage and control
+microcontroller power states: a dirty bit, a chip-specific low power
+state calculation function, and a power state override function.  The
+dirty bit tells TinyOS when it needs to calculate a new low power
+state, the function performs the calculation, and the override allows
+higher level components to introduce additional requirements, if
+needed.</p>
+<p>These three mechanisms all operate in the TinyOS core scheduling loop,
+described in TEP 106: Schedulers and Tasks[<a class="reference internal" href="#id3">2</a>]. This loop is
+called from the boot sequence, which is described in TEP 107: Boot
+Sequence[<a class="reference internal" href="#id4">3</a>]. The command in question is
+<tt class="docutils literal">Scheduler.taskLoop()</tt>, when microcontroller sleeping is enabled.</p>
+<p>If this command is called when the task queue is empty, the TinyOS
+scheduler puts the microcontroller to sleep. It does so through
+the <tt class="docutils literal">McuSleep</tt> interface:</p>
+<div class="line-block">
+<div class="line"><tt class="docutils literal">interface McuSleep {</tt></div>
+<div class="line-block">
+<div class="line"><tt class="docutils literal">async command void <span class="pre">sleep();</span></tt></div>
+</div>
+<div class="line"><tt class="docutils literal">}</tt></div>
+</div>
+<p><tt class="docutils literal">McuSleep.sleep()</tt> puts the microcontroller into a low power sleep
+state, to be woken by an interrupt. This command deprecates the
+<tt class="docutils literal">__nesc_atomic_sleep()</tt> call of TinyOS 1.x. Note that, as the 1.x
+call suggests, putting the microcontroller to sleep MUST have certain
+atomicity properties. The command is called from within an atomic
+section, and MUST atomically re-enable interrupts and go to sleep. An
+issue arises if the system handles an interrupt after it re-enables
+interrupts but before it sleeps: the interrupt may post a task, but
+the task will not be run until the microcontroller wakes up from sleep.</p>
+<p>Microcontrollers generally have hardware mechanisms to support this
+requirement. For example, on the Atmega128, the <tt class="docutils literal">sei</tt> instruction
+does not re-enable interrupts until two cycles after it is issued (so
+the sequence <tt class="docutils literal">sei sleep</tt> runs atomically).</p>
+<p>A component named <tt class="docutils literal">McuSleepC</tt> provides the McuSleep interface, and
+<tt class="docutils literal">TinySchedulerC</tt> MUST automatically wire it to the scheduler
+implementation. McuSleepC is a chip- or platform-specific component,
+whose signature MUST include the following interfaces:</p>
+<div class="line-block">
+<div class="line"><tt class="docutils literal">component McuSleepC {</tt></div>
+<div class="line-block">
+<div class="line"><tt class="docutils literal">provides interface McuSleep;</tt></div>
+<div class="line"><tt class="docutils literal">provides interface PowerState;</tt></div>
+<div class="line"><tt class="docutils literal">uses interface PowerOverride;</tt></div>
+</div>
+<div class="line"><tt class="docutils literal">}</tt></div>
+<div class="line"><br /></div>
+<div class="line"><tt class="docutils literal">interface McuPowerState {</tt></div>
+<div class="line-block">
+<div class="line"><tt class="docutils literal">async command void <span class="pre">update();</span></tt></div>
+</div>
+<div class="line"><tt class="docutils literal">}</tt></div>
+<div class="line"><br /></div>
+<div class="line"><tt class="docutils literal">interface McuPowerOverride {</tt></div>
+<div class="line-block">
+<div class="line"><tt class="docutils literal">async command mcu_power_t <span class="pre">lowestState();</span></tt></div>
+</div>
+<div class="line"><tt class="docutils literal">}</tt></div>
+</div>
+<p>McuSleepC MAY have additional interfaces.</p>
+</div>
+<div class="section" id="the-dirty-bit">
+<h1>3.1 The Dirty Bit</h1>
+<p>Whenever a Hardware Presentation Layer (HPL, see TEP 2: Hardware
+Abstraction Architecture[<a class="reference internal" href="#id2">1</a>]) component changes an aspect of
+hardware configuration that might change the possible low power state
+of the microcontroller, it MUST call McuPowerState.update(). This is
+the first power management mechanism, a <em>dirty bit</em>. If
+McuPowerState.update() is called, then McuSleepC MUST recompute the
+low power state before the next time it goes to sleep as a result of
+McuSleep.sleep() being called.</p>
+</div>
+<div class="section" id="low-power-state-calculation">
+<h1>3.2 Low Power State Calculation</h1>
+<p>McuSleepC is responsible for calculating the lowest power state that
+it can safely put the microcontroller into without disrupting the
+operation of TinyOS subsystems. McuSleepC SHOULD minimize how often it
+must perform this calculation: it is an inherently atomic calculation,
+and so if performed very often (e.g., on every interrupt) can
+introduce significant overhead and jitter.</p>
+<p>MCU power states MUST be represented as an enum in the standard chip
+implementation header file. This file MUST also define a type
+<tt class="docutils literal">mcu_power_t</tt> and a combine function that given two power state
+values returns one that provides the union of their functionality.</p>
+<p>For example, consider a hypothetical microcontroller with three low
+power states, (LPM0, LPM1, LPM2) and two hardware resources such as
+clocks (HR0, HR1). In LPM0, both HR0 and HR1 are active. In LPM1, HR0
+is inactive but HR1 is active. In LPM2, both HR0 and HR1 are inactive.
+The following table describes the results of a proper combine function
+(essentially a MAX):</p>
+<table border="1" class="docutils">
+<colgroup>
+<col width="25%" />
+<col width="25%" />
+<col width="25%" />
+<col width="25%" />
+</colgroup>
+<tbody valign="top">
+<tr><td>&nbsp;</td>
+<td>LPM0</td>
+<td>LPM1</td>
+<td>LPM2</td>
+</tr>
+<tr><td>LPM0</td>
+<td>LPM0</td>
+<td>LPM0</td>
+<td>LPM0</td>
+</tr>
+<tr><td>LPM1</td>
+<td>LPM0</td>
+<td>LPM1</td>
+<td>LPM1</td>
+</tr>
+<tr><td>LPM2</td>
+<td>LPM0</td>
+<td>LPM1</td>
+<td>LPM2</td>
+</tr>
+</tbody>
+</table>
+<p>In contrast, if in LPM2, HR0 is active but HR1 is inactive, the
+combine function would look like this:</p>
+<table border="1" class="docutils">
+<colgroup>
+<col width="25%" />
+<col width="25%" />
+<col width="25%" />
+<col width="25%" />
+</colgroup>
+<tbody valign="top">
+<tr><td>&nbsp;</td>
+<td>LPM0</td>
+<td>LPM1</td>
+<td>LPM2</td>
+</tr>
+<tr><td>LPM0</td>
+<td>LPM0</td>
+<td>LPM0</td>
+<td>LPM0</td>
+</tr>
+<tr><td>LPM1</td>
+<td>LPM0</td>
+<td>LPM1</td>
+<td>LPM0</td>
+</tr>
+<tr><td>LPM2</td>
+<td>LPM0</td>
+<td>LPM0</td>
+<td>LPM2</td>
+</tr>
+</tbody>
+</table>
+</div>
+<div class="section" id="power-state-override">
+<h1>3.3 Power State Override</h1>
+<p>When McuSleepC computes the best low power state, it MUST call
+<tt class="docutils literal"><span class="pre">PowerOverride.lowestState().</span></tt> McuSleepC SHOULD have a default
+implementation of this command, which returns the lowest power state
+the MCU is capable of. The return value of this command is a
+<tt class="docutils literal">mcu_power_t.</tt> McuSleepC MUST respect the requirements of the return
+of this call and combine it properly with the low power state it
+computes.</p>
+<p>The PowerOverride functionality exists in case higher-level components
+have some knowledge or requirements that cannot be captured in
+hardware status and configuration registers, such as a maximum
+tolerable wakeup latency. Because it can overrides all of the MCU
+power conservation mechanisms, it SHOULD be used sparingly, if at
+all. Because it is called in an atomic section during the core
+scheduling loop, implementations of PowerOverride.lowestState() SHOULD
+be an efficient function, and SHOULD NOT be longer than twenty or
+thirty cycles; implementations SHOULD be a simple return of a cached
+variable. Wiring arbitrarily to this command is an easy way to cause
+TinyOS to behave badly. The presence of a combine function for
+mcu_power_t means that this command can have fan-out calls.</p>
+<p>Section 5 describes one example use of McuPowerOverride, in the
+timer stack for the Atmega128 microcontroller family.</p>
+<p>As part of power state override, a platform MUST define the enum
+TOS_SLEEP_NONE in its hardware.h file. This enum defines the highest
+power state of the platform's microcontroller in a chip-independent
+way. If a component wires to McuPowerOverride and returns TOS_SLEEP_NONE,
+this will cause TinyOS to never put the microcontroller into a power
+saving state. This enum allows a component to prevent sleep in a
+platform-independent way.</p>
+</div>
+<div class="section" id="peripherals-and-subsystems">
+<h1>4. Peripherals and Subsystems</h1>
+<p>At the HIL level, TinyOS subsystems generally have a simple,
+imperative power management interface. Depending on the latencies
+involved, this interface is either <tt class="docutils literal">StdControl</tt>, <tt class="docutils literal">SplitControl</tt>,
+or <tt class="docutils literal">AsyncStdControl</tt>.
+These interfaces are imperative in that when any component calls
+<tt class="docutils literal">stop</tt> on another component, it causes the subsystem that
+component represents to enter an inactive, low-power state.</p>
+<p>From the perspective of MCU power management, this transition causes a
+change in status and control registers (e.g., a clock is
+disabled). Following the requirements in 3.1, the MCU power management
+subsystem will be notified of a significant change and act
+appropriately when the system next goes to sleep. TEP 115[<a class="reference internal" href="#id6">5</a>]
+describes the power management of non-virtualized devices in
+greater detail, and TEP 108[<a class="reference internal" href="#id5">4</a>] describes how TinyOS can automatically
+include power management into shared non-virtualized devices.</p>
+</div>
+<div class="section" id="implementation">
+<h1>5. Implementation</h1>
+<p>An implementation of McuSleepC can be found in <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/atm128</span></tt>,
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/msp430</span></tt>, and <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/px27ax</span></tt>.</p>
+<p>An example use of McuPowerOverride can be found in the atmega128 timer
+system. Because some low-power states have much longer wakeup latencies than
+others, the timer system does not allow long latencies if it has a timer
+that is going to fire soon.  The implementation can be found in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/atm128/timer/HplAtm128Timer0AsyncP.nc</span></tt>, and
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/atm128/timer/HplAtm128Timer0AsyncC.nc</span></tt> automatically
+wires it to McuSleepC if it is included.</p>
+<p>For the atmega128 microcontroller, TOS_SLEEP_NONE is the &quot;idle&quot; power
+state.</p>
+<p>A second example use of McuPowerOverride is in the msp430 timer system.
+By default, the msp430 lowest power state is LPM4, which does not keep
+clocks enabled. If <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/msp430/timer/Msp430ClockC.nc''</span>
+is included in the component graph, however, this configuration wires
+the McuPowerOverride of <span class="pre">``tinyos-2.x/tos/chips/msp430/timer/Msp430ClockP.nc</span></tt>
+to McuSleepC. This implemementation of McuPowerOverride raises the lowest
+power state to LPM3, which keeps clocks enabled.</p>
+<p>For msp430 microcontrollers, TOS_SLEEP_NONE is the &quot;active&quot; power state.</p>
+</div>
+<div class="section" id="author-s-address">
+<h1>6. Author's Address</h1>
+<div class="line-block">
+<div class="line">Robert Szewczyk</div>
+<div class="line">Moteiv Corporation</div>
+<div class="line">2168 Shattuck Ave, Floor 2</div>
+<div class="line">Berkeley, CA 94704</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference external" href="mailto:rob&#64;moteiv.com">rob&#64;moteiv.com</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates</div>
+<div class="line">Computer Science Laboratory</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line">email - <a class="reference external" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Martin Turon</div>
+<div class="line">PO Box 8525</div>
+<div class="line">Berkeley, CA 94707</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 408 965 3355</div>
+<div class="line">email - <a class="reference external" href="mailto:mturon&#64;xbow.com">mturon&#64;xbow.com</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Lama Nachman</div>
+<div class="line">3600 Juliette Lane, SC12-319</div>
+<div class="line">Intel Research</div>
+<div class="line">Santa Clara, CA 95052</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference external" href="mailto:lama.nachman&#64;intel.com">lama.nachman&#64;intel.com</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Phil Buonadonna</div>
+<div class="line">Arched Rock Corp.</div>
+<div class="line">2168 Shattuck Ave. 2nd Floor</div>
+<div class="line">Berkeley, CA 94704</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 510 981 8714</div>
+<div class="line">email - <a class="reference external" href="mailto:pbuonadonna&#64;archedrock.com">pbuonadonna&#64;archedrock.com</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Vlado Handziski</div>
+<div class="line">Sekr FT5</div>
+<div class="line">Einsteinufer 25</div>
+<div class="line">10587 Berlin</div>
+<div class="line">GERMANY</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference external" href="mailto:handzisk&#64;tkn.tu-berlin.de">handzisk&#64;tkn.tu-berlin.de</a></div>
+<div class="line"><br /></div>
+</div>
+</div>
+<div class="section" id="citations">
+<h1>6. Citations</h1>
+<table class="docutils footnote" frame="void" id="id2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label">[1]</td><td>TEP 2: Hardware Abstraction Architecture</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id3" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label">[2]</td><td>TEP 106: Schedulers and Tasks.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id4" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label">[3]</td><td>TEP 107: TinyOS 2.x Boot Sequence.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id5" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label">[4]</td><td>TEP 108: Resource Arbitration</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id6" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label">[5]</td><td>TEP 115: Power Management of Non-Virtualised Devices</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<meta name="author" content="Ben Greenstein and Philip Levis" />
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+  margin-bottom: 0.5em }
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+  padding-left: 0.5ex }
+
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+  margin: 2em 4em;
+}
+
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+  border-left: solid thin black ;
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+
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+  padding-left: 0.5em ;
+  padding-right: 0.5em ;
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+
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+  font-weight: bold ;
+  text-align: left ;
+  white-space: nowrap;
+  }
+
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+  font-size: 100% }
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+  list-style-type: none }
+
+</style>
+</head>
+<body>
+<div class="document" id="serial-communication">
+<h1 class="title">Serial Communication</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">113</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Ben Greenstein and Philip Levis</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo describes the structure and standard implementation of the
+TinyOS 2.x serial communication system for mote-to-PC data
+exchange. The system is broken into three levels (encoding, framing,
+and dispatch) to allow easy experimentation and replacement. It can
+also handle multiple packet formats: unlike 1.x, 2.x serial packets
+are not bound to the mote's radio packet format. Additionally, one of
+the supported packet formats is platform independent, so PC-side
+applications can communicate with arbitrary motes.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>Users need to read data out of a TinyOS network. The most common
+approach is to attach a mote to a PC or laptop with a wired
+connection. While the interface on the PC side can vary from a serial
+cable to a USB device to IP, the mote generally talks to a serial port
+(UART). In TinyOS 1.x, the UART packet format is platform-specific,
+pushing a good deal of complexity into the protocol and PC-side tools
+in order to discover and properly handle platform diversity. TinyOS
+2.0 introduces the notion of packet format dispatch, so a mote can
+support multiple UART packet formats simultaneously.  This allows
+transparent bridging (e.g., an 802.15.4 base station) to exist in
+parallel with platform-independent communication, which simplifies the
+PC toolchain. This memo documents the protocols and structure of the
+TinyOS 2.x serial communication stack.</p>
+</div>
+<div class="section">
+<h1><a id="serial-stack-structure" name="serial-stack-structure">2. Serial Stack Structure</a></h1>
+<p>The TinyOS 2.x serial communication stack is broken up into four
+functional components. From bottom to top, they are</p>
+<blockquote>
+<p>o the raw UART,</p>
+<p>o the encoder/framer,</p>
+<p>o the protocol,</p>
+<p>o and the dispatcher.</p>
+</blockquote>
+<p>Structurally, they look like this:</p>
+<pre class="literal-block">
+ _____________________
+|                     |
+|     Dispatcher      |       Packet formatting.
+|_____________________|
+ _____________________
+|                     |
+|      Protocol       |       Acknowledgements, CRC computation,
+|_____________________|       windowing.
+ _____________________
+|                     |
+|    Encoder/Framer   |       Translating raw bytes into frame
+|_____________________|       delimiters, escape bytes.
+ _____________________
+|                     |
+|      Raw UART       |       Platform code for reading/writing
+|_____________________|       bytes over the serial connection.
+</pre>
+<p>The bottom three provide a byte-level interface: only the Dispatcher
+provides a packet-level interface. The top three are all
+platform-independent: only the UART is platform-specific code.</p>
+<p>The lowest level of the stack is the raw UART. This HIL component
+provides functionality for configuring the UART (speed, stop bytes,
+etc.), sending/receiving bytes, and flushing the UART.</p>
+<p>The Encoder/Framer sits above the raw UART. This component translates
+raw data bytes into packet bytes using a serial protocol's
+encoding. The Encoder/Framer assumes that a protocol's encoding has
+two kinds of bytes: delimiters and data bytes, and signals each in
+separate events to the component above.</p>
+<p>The Protocol component handles data and delimiter byte events. It is
+responsible for reading in and sending all protocol control
+packets. If the Protocol component starts receiving a data packet, it
+signals to the Dispatcher that a packet has started and signals the
+data bytes. When the data packet completes, the Protocol signals to
+the Dispatcher that the packet is complete and whether it passed the
+protocol-level CRC.</p>
+<p>The Dispatcher component handles data packet bytes and delimiters. It
+is responsible for reading data bytes into a message_t and signaling
+packet reception to components above it. The dispatcher can support
+multiple packet formats. Based on how message_t works (see TEP
+111[<a class="reference" href="#tep111">tep111</a>]), this boils down to knowing where in a message_t a
+particular packet format begins (based on its header size). Section
+3.4 describes how the default TinyOS 2.x implementation,
+<tt class="docutils literal"><span class="pre">SerialDispatcherC</span></tt> does this.</p>
+</div>
+<div class="section">
+<h1><a id="the-2-x-serial-stack-implementation" name="the-2-x-serial-stack-implementation">3. The 2.x Serial Stack Implementation</a></h1>
+<p>Section 2 describes the basic structure of the TinyOS 2.x serial
+stack. This section describes its actual implementation,
+including SerialActiveMessageC, which sits on top of the Dispatcher.
+All of the components except for UartC are part of the serial
+library that lives in <tt class="docutils literal"><span class="pre">tos/lib/serial</span></tt>.</p>
+<div class="section">
+<h2><a id="raw-uart-uartc" name="raw-uart-uartc">3.1 Raw UART: UartC</a></h2>
+<p>The UART HIL[<a class="reference" href="#tep2">TEP2</a>] is <tt class="docutils literal"><span class="pre">UartC</span></tt>, which provides a byte-level
+interface to the underlying serial communication. It provides the
+<tt class="docutils literal"><span class="pre">SerialByteComm</span></tt> interface:</p>
+<pre class="literal-block">
+interface SerialByteComm {
+  async command error_t put(uint8_t data);
+  async event void get(uint8_t data);
+  async event void putDone();
+}
+</pre>
+<p>Alternatively, <tt class="docutils literal"><span class="pre">UartC</span></tt> may provide the UartStream multi-byte level
+interface. See the Low-Level I/O TEP [<a class="reference" href="#tep117">TEP117</a>] for details.</p>
+<p>Additionally, UartC provides a split-phase interface to signal when
+the UART is idle. There are situations (such as when powering down the
+usart, when switching from TX to RX on a radio with a UART data line,
+etc.) when we need explicit information that the data sent over the
+UART has actually been transmitted in full. The problem is that on
+MCUs that double-buffer UART communication (such as the msp430), a
+putDone event signifies that the UART is ready to accept another byte,
+but NOT that the UART is idle.</p>
+<pre class="literal-block">
+interface SerialFlush {
+  command void flush();
+  event void flushDone();
+}
+</pre>
+<p>It may provide additional interfaces for configuring the serial
+port. This TEP does not consider this topic.</p>
+</div>
+<div class="section">
+<h2><a id="encoder-framer-hdlctranslatec" name="encoder-framer-hdlctranslatec">3.2 Encoder/Framer: HdlcTranslateC</a></h2>
+<p>HdlcTranslateC is the serial encoder/framer. It uses the
+<tt class="docutils literal"><span class="pre">SerialByteComm</span></tt> interface and provides the <tt class="docutils literal"><span class="pre">SerialFrameComm</span></tt>
+interface:</p>
+<pre class="literal-block">
+interface SerialFrameComm {
+  async command error_t putDelimiter();
+  async command error_t putData(uint8_t data);
+  async command void resetSend();
+  async command void resetReceive();
+  async event void delimiterReceived();
+  async event void dataReceived(uint8_t data);
+  async event void putDone();
+}
+</pre>
+<p>As its name suggests, it uses the same encoding as the HDLC[<a class="reference" href="#hdlc">HDLC</a>]
+protocol. <tt class="docutils literal"><span class="pre">0x7e</span></tt> is reserved as a frame delimiter byte, and <tt class="docutils literal"><span class="pre">0x7d</span></tt>
+is reserved as an escape byte. HdlcTranslateC maintains ten bits of
+state. The receive and send paths each have one bit to store whether
+they are using an escape byte, and the transmit path has a byte for
+when it sends an escaped byte.</p>
+<p>When HdlcTranslateC receives a delimiter byte, it signals
+delimiterReceived(). When HdlcTranslateC receives an escape byte, it
+sets the receiveEscape flag to true. When it receives any other byte,
+it tests to see if the receiveEscape flag is set; if so, it XORs the
+data byte with <tt class="docutils literal"><span class="pre">0x20</span></tt> and clears the flag. It signals dataReceived()
+with the byte. The most common use of escape byte is to transmit data
+bytes corresponding to the delimiter byte or escape byte. For example,
+<tt class="docutils literal"><span class="pre">0x7e</span></tt> becomes <tt class="docutils literal"><span class="pre">0x7d</span> <span class="pre">0x5e</span></tt>.</p>
+<p>HdlcTranslateC performs similar actions on the transmit side. When
+told to transmit the delimiter or escape byte as a data byte, it sets
+the transmitEscape flag to true, stores the data byte XOR <tt class="docutils literal"><span class="pre">0x20</span></tt>,
+and sends an escape byte. When the escape byte is sent, it sends the
+stored data byte.</p>
+</div>
+<div class="section">
+<h2><a id="protocol-serialp" name="protocol-serialp">3.3 Protocol: SerialP</a></h2>
+<p>The SerialP component implements the serial protocol using PPP/HDLC-
+like framing (See RFC 1662[<a class="reference" href="#rfc1662">RFC1662</a>]). Type dispatch and buffer
+management are left to higher layers in the serial stack. The protocol
+is currently stop-and-wait in the host-to-mote direction and best
+effort in the mote-to-host direction.</p>
+<p>SerialP provides two byte-level interfaces to the upper layer for
+sending and receiving packets, respectively called SendBytePacket and
+ReceiveBytePacket.</p>
+<p>On the sending side, SerialP is responsible for encapsulation of upper
+layer packets. An upper layer component such as SerialDispatcherC
+initiates the sending of a packet by calling startSend(), passing the
+first byte to send. SerialP collects subsequent bytes by signalling
+nextByte(). Within the nextByte handler or between calls to nextByte(),
+the upper layer should indicate the end-of-packet by calling
+completeSend(). If completeSend is called from within a nextByte()
+handler, SerialP will ignore the return of the call to nextByte().</p>
+<pre class="literal-block">
+interface SendBytePacket {
+  async command error_t startSend(uint8_t first_byte);
+  async command error_t completeSend();
+  async event uint8_t nextByte();
+  async event void sendCompleted(error_t error);
+}
+</pre>
+<p>SerialP maintains a small window of bytes that have been received by
+the upper layer and not yet sent to the UART. Depending on the timing
+requirements of the underlying UART, the size of this window can be
+changed.  SerialP uses repeated calls to nextByte() to keep this window
+filled.</p>
+<p>SerialP uses SerialFrameComm to send a delimiter between frames, a
+serial-level type field, the bytes of the packet, and a two-byte frame
+CRC. For mote-to-host gap detection and link reliability, a sequence
+number may also be sent (not activated in the default implementation).</p>
+<p>After sending an entire frame and receiving the last putDone() event
+from below, SerialP signals sendCompleted() to indicate the success or
+failure of a requested transmission.</p>
+<p>Packet reception is also managed by SerialP and the interface
+provided to the upper layer is ReceiveBytePacket:</p>
+<pre class="literal-block">
+interface ReceiveBytePacket {
+  async event error_t startPacket();
+  async event void byteReceived(uint8_t b);
+  async event void endPacket(error_t result);
+}
+</pre>
+<p>Upon receiving an interframe delimiter and a new frame's header,
+SerialP signals the upper layer indicating that a packet is
+arriving. For each byte received, SerialP signals byteReceived().
+Once SerialP receives the complete frame it signals endPacket with a
+value of SUCCESS. If instead it loses sync during reception it signals
+endPacket with FAIL.</p>
+<p>SerialP acknowledges frames it receives. Acknowledgements have a
+higher priority than data transmissions and consequently, data frames
+may be slightly delayed. However, acknowledgement information is
+stored in a queue separate from the data buffer, so a data packet to
+be transmitted may begin spooling into SerialP while SerialP is
+actively sending an acknowledgement.</p>
+<p>Only the PC-to-mote communication path supports acknowledgements.
+SerialP does not request acknowledgements from the PC for two reasons.
+First, acks are not perfect reliable: they are used on the
+PC-to-mote path to raise reliability to a usable level. In the case of
+the PC-to-mote path, the UART receive buffer is typically a single
+byte, so a high interrupt load can easily lose (and sometimes does) a
+byte. This is in contrast to the PC receive buffer, which is much
+larger and does not have to deal with overflow. Second, adding support
+for acks would increase the code size and complexity of the serial
+stack. As code space is often at a premium, this would add little
+needed functionality at significant cost. Of course, any application
+that requires perfect reliability may layer its own scheme on top of
+the serial protocol.</p>
+<p>The acknowledgement protocol is stop-and-wait to minimize buffering on
+the mote side. This is considered more important on memory constrained
+devices than increased throughput in the PC-to-mote direction, which
+most applications only use for occasional control transmissions.</p>
+</div>
+<div class="section">
+<h2><a id="dispatcher-serialdispatcherc" name="dispatcher-serialdispatcherc">3.4 Dispatcher: SerialDispatcherC</a></h2>
+<p>SerialDispatcherC handles the data packets that the Protocol component
+receives. It uses the SendBytePacket and ReceiveBytePacket interfaces,
+and provides parameterized Send and Receive interfaces. The parameter
+in the Send and Receive interfaces (<tt class="docutils literal"><span class="pre">uart_id_t</span></tt>) determines the
+packet format contained in the message_t.</p>
+<p>SerialDispatcherC places a one-byte header, the packet format
+identifier, on the packets sent and received through SerialP.
+SerialDispatcherC uses a parameterized SerialPacketInfo interface to
+be able to handle various packet formats:</p>
+<pre class="literal-block">
+interface SerialPacketInfo {
+  async command uint8_t offset();
+  async command uint8_t dataLinkLength(message_t* msg, uint8_t upperLen);
+  async command uint8_t upperLength(message_t* msg, uint8_t dataLinkLen);
+}
+</pre>
+<p>When SerialDispatcherC receives the first data byte of a packet from
+SerialP, it stores it as the packet type and calls
+offset() to determine where in a message_t that
+packet format begins. It then spools data bytes in, filling them into
+its message_t buffer. Similarly, on the send side, it first sends the
+type byte and spools out data bytes starting from the index denoted by
+the call to offset(). SerialDispatcherC uses the two length commands,
+dataLinkLength() and upperLength(), to translate between the two notions
+of packet length: above, length refers to the payload excluding
+header, while below it refers to the payload plus header.</p>
+<p>A component that provides communication over the serial port with
+uart_id_t <em>U</em> MUST wire a component implementing SerialPacketInfo to
+SerialDispatcherC with uart_id_t <em>U</em>. The file <tt class="docutils literal"><span class="pre">Serial.h</span></tt> contains
+reserved uart_id_t's for supported packet formats. Currently, only
+platform independent active messages
+(<tt class="docutils literal"><span class="pre">TOS_SERIAL_ACTIVE_MESSAGE_ID</span></tt>, described in Section 3.5), 802.15.4
+active messages (<tt class="docutils literal"><span class="pre">TOS_SERIAL_802_15_4_ID</span></tt>), mica2 CC1000 packets
+(<tt class="docutils literal"><span class="pre">TOS_SERIAL_CC1000_ID</span></tt>) and the error code
+<tt class="docutils literal"><span class="pre">TOS_SERIAL_UNKNOWN_ID</span></tt> are reserved. New packet formats MUST NOT
+reuse any reserved identifiers.</p>
+</div>
+<div class="section">
+<h2><a id="serialactivemessagec" name="serialactivemessagec">3.5 SerialActiveMessageC</a></h2>
+<p>SerialActiveMessageC is a platform-independent active message layer
+that operates on top of the serial communication
+stack. SerialActiveMessageC is a configuration that wires
+SerialActiveMessageP to SerialDispatcherC with uart_id_t
+TOS_SERIAL_ACTIVE_MESSAGE_ID and wires SerialPacketInfoActiveMessageP
+to SerialDispatcherC with uart_id_t TOS_SERIAL_ACTIVE_MESSAGE_ID:</p>
+<pre class="literal-block">
+includes Serial;``
+configuration SerialActiveMessageC {
+  provides {
+    interface Init;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+  }
+  uses interface Leds;
+}
+implementation {
+  components new SerialActiveMessageP() as AM, SerialDispatcherC;
+  components SerialPacketInfoActiveMessageP as Info;
+
+  Init = SerialDispatcherC;
+  Leds = SerialDispatcherC;
+
+  AMSend = AM;
+  Receive = AM;
+  Packet = AM;
+  AMPacket = AM;
+
+  AM.SubSend -&gt; SerialDispatcherC.Send[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+  AM.SubReceive -&gt; SerialDispatcherC.Receive[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+
+  SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_ACTIVE_MESSAGE_ID] -&gt; Info;
+}
+</pre>
+<p>SerialActiveMessageP is a generic component so that it can be used to
+sit on top of any packet-level communication layer. It does not filter
+packets based on destination address or group. It assumes that if the
+packet was received over the serial port, it was destined to the
+node. This saves PC-side tools from having to discover or consider the
+ID and group of a mote.</p>
+<p>Platform-independent active messages do not have a CRC (they assumes
+the serial stack CRC is sufficient), and have the following header:</p>
+<pre class="literal-block">
+typedef nx_struct SerialAMHeader {
+  nx_am_addr_t addr;
+  nx_uint8_t length;
+  nx_am_group_t group;
+  nx_am_id_t type;
+} SerialAMHeader;
+</pre>
+</div>
+<div class="section">
+<h2><a id="packet-format" name="packet-format">3.6 Packet Format</a></h2>
+<p>A data packet in the TinyOS 2.x serial stack has the following format
+over the wire. Each protocol field is associated with a specific component:</p>
+<pre class="literal-block">
+   ____________________________________________
+  | | | | |                               |  | |
+  | | | | |                               |  | |
+  |_|_|_|_|_______________________________|__|_|
+   F P S D         Payload                 CR F
+
+F       = Framing byte, denoting start of packet: HdlcTranslateC
+P       = Protocol byte: SerialP
+S       = Sequence number byte: SerialP
+D       = Packet format dispatch byte: SerialDispatcherC
+Payload = Data payload (stored in SerialDispatcherC): SerialDispatcherC
+CR      = Two-byte CRC over S to end of Payload: SerialP
+F       = Framing byte denoting end of packet: HdlcTranslateC
+</pre>
+<p>Payload is a contiguous packet that SerialDispatcherC reads in.  Note
+that any data bytes (P - CR) equal to 0x7e or 0x7d will be escaped to
+0x7d 0x5e or 0x7d 0x5d accordingly. For example, a platform
+independent AM packet of type 6, group 0x7d, and length 5 to
+destination 0xbeef with a payload of 1 2 3 4 5 would look like this:</p>
+<p><tt class="docutils literal"><span class="pre">7e</span> <span class="pre">40</span> <span class="pre">09</span> <span class="pre">00</span> <span class="pre">be</span> <span class="pre">ef</span> <span class="pre">05</span> <span class="pre">7d</span> <span class="pre">5d</span> <span class="pre">06</span> <span class="pre">01</span> <span class="pre">02</span> <span class="pre">03</span> <span class="pre">04</span> <span class="pre">05</span> <span class="pre">7e</span></tt></p>
+<p>Note that the group 0x7d is escaped to 0x7d 0x5d. The protocol field
+(P) is 0x40 (64), corresponding to <tt class="docutils literal"><span class="pre">SERIAL_PROTO_ACK</span></tt> (in Serial.h).</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="access-abstractions" name="access-abstractions">4. Access Abstractions</a></h1>
+<p>Two generic components: SerialAMSenderC and SerialAMReceiverC connect
+to SerialActiveMessageC to provide virtualized access to the serial
+stack. Each instantiation of SerialAMSenderC has its own queue of
+depth one. Therefore, it does not have to contend with other
+SerialAMSender instantiations for queue space. The underlying
+implementation schedulers the packets in these queues using some form
+of fair-share queueing. SerialAMReceiverC provides the virtualized
+abstraction for reception. These abstractions are very similar to
+TinyOS's radio abstractions, namely, AMSenderC and AMReceiverC. See
+Section 4 of TEP 116[<a class="reference" href="#tep116">TEP116</a>] for more information. Unlike the
+services in the TEP 116, the serial component virtualizations provide
+no snooping capabilities.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">5. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates</div>
+<div class="line">Computer Science Laboratory</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Ben Greenstein</div>
+<div class="line">Intel Research Seattle</div>
+<div class="line">1100 NE 45th Street, 6th Floor</div>
+<div class="line">Seattle, WA 98105</div>
+<div class="line"><br /></div>
+<div class="line">phone -  +1 206 206 545 2501</div>
+<div class="line">email - <a class="reference" href="mailto:benjamin.m.greenstein&#64;intel.com">benjamin.m.greenstein&#64;intel.com</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">6. Citations</a></h1>
+<table class="docutils citation" frame="void" id="tep2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep2">[TEP2]</a></td><td>TEP 2: Hardware Abstraction Architecture. tinyos-2.x/doc/txt/tep2.txt</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep111" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep111">[TEP111]</a></td><td>TEP 111: message_t. tinyos-2.x/doc/txt/tep111.txt</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep116" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep116">[TEP116]</a></td><td>TEP 116: Packet Protocols. tinyos-2.x/doc/txt/tep116.txt</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep117" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep117">[TEP117]</a></td><td>TEP 117: Low-Level I/O. tinyos-2.x/doc/txt/tep117.txt</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="hdlc" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="hdlc">[HDLC]</a></td><td>International Organization For Standardization, ISO Standard 3309-1979, &quot;Data communication - High-level data link control procedures - Frame structure&quot;, 1979.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="rfc1662" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="rfc1662">[RFC1662]</a></td><td>PPP in HDLC-like Framing, Internet Engineering Task Force (IETF), 1994</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<body>
+<div class="document" id="sids-source-and-sink-independent-drivers">
+<h1 class="title">SIDs: Source and Sink Independent Drivers</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">114</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Gilman Tolle, Philip Levis, and David Gay</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo documents a set of hardware- and sensor-independent interfaces
+for data sources and sinks in TinyOS 2.x.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>Sensing is an integral part of any sensor network application. The
+diversity of sensors can lead to a wide variety of different software
+interfaces to these sensors. However, the burden of connecting a
+general sensor data management application to every one of these
+different interfaces suggests that sensors also provide a simple,
+general-purpose interface for data acquisition. Therefore, TinyOS 2.0
+has telescoping sensor abstractions, providing both sensor-independent
+and sensor-specific interfaces. This memo documents a set of hardware-
+and sensor-independent interfaces for data sources and sinks in TinyOS
+2.x.</p>
+</div>
+<div class="section">
+<h1><a id="sensors-in-tinyos-1-x" name="sensors-in-tinyos-1-x">2. Sensors in TinyOS 1.x</a></h1>
+<p>Early TinyOS sensors were generally analog. To sample one of these
+sensors, an application makes an analog-to-digital conversion using
+the MCU ADC.  Because all early sensors required ADC conversions, the
+ADC interface has become the de-facto 1.x sensor interface. However,
+the ADC interface was originally designed for inexpensive,
+interrupt-driven sampling.  All of its commands and events are async
+and sensor values are always 16 bits, although only some subset of the
+bits may be significant (e.g., a 12-bit value).</p>
+<p>Because sensing is an integral part of high-level application logic,
+having asynchronous events means that high-level components
+must work with atomic sections, even if the sampling rate is very low
+(e.g., every five minutes) and so could be easily placed in a
+task. Race conditions are problematic and possible in any real time
+multi-tasking design. Race conditions are a failure in design, and
+especially difficult to detect at low sampling rates.</p>
+<p>Additionally, not all sensors require ADC conversions from the MCU.
+Many sensors today are digital. To sample these sensors, the MCU sends
+a sample command and receives the corresponding data over a bus (e.g.,
+SPI, I2C). The latency involved, combined with possible Resource
+arbitration <a class="footnote-reference" href="#id2" id="id1" name="id1">[1]</a>, means that these bus operations are often
+synchronous code. In the command direction, this can force a task
+allocation to convert async to sync; in the event direction, the
+application has to deal with async code even though the event is, in
+practice, in a task.</p>
+<p>Finally, the simplicity of the ADC interface has led many sensor
+modules to introduce several new interfaces for calibration and
+control, such as <tt class="docutils literal"><span class="pre">Mic</span></tt> and <tt class="docutils literal"><span class="pre">MagSetting</span></tt>. Because ADCs generally do
+not have error conditions, the ADC interface has no way to signal that
+a sample failed. This turns out to be important for sensors where the
+sampling request is split-phase, such as sensors over a bus. In these
+cases, it is possible that the driver accepts the request to sample,
+but once acquiring the bus discovers something is wrong with the
+sensor. This property has led bus-based sensors to also have a
+separate <tt class="docutils literal"><span class="pre">ADCError</span></tt> interface; this interface breaks the basic
+TinyOS pattern of a tight coupling between split-phase commands and
+their completion events, as the command is in ADC but the completion
+event is in ADCError.</p>
+<p>All of these complications provide the context of the challenge to
+write high-level code that is sensor independent. Sensors, when
+possible, should follow an approach similar to the HAA[_haa], where
+they have sensor- or sensor-class-specific interfaces for high
+performance or special case use, but also simple and common interfaces
+for basic and portable use. Providing a telescoping sensor abstraction
+allows both classes of use.</p>
+</div>
+<div class="section">
+<h1><a id="sensors-in-tinyos-2-x" name="sensors-in-tinyos-2-x">3. Sensors in TinyOS 2.x</a></h1>
+<p>TinyOS 2.x contains several nesC interfaces that can be used to
+provide sensor-independent interfaces which cover a range of common
+use cases. This document describes these interfaces, and explains how
+to use these interfaces to write a Source- or Sink-Independent Driver
+(SID). A SID is source/sink independent because its interfaces do not
+themselves contain information on the sort of sensor or device they
+sit on top of.  A SID SHOULD provide one or more of the interfaces
+described in this section.</p>
+<p>This table summarizes the SID interfaces:</p>
+<table border="1" class="docutils">
+<colgroup>
+<col width="42%" />
+<col width="19%" />
+<col width="19%" />
+<col width="19%" />
+</colgroup>
+<tbody valign="top">
+<tr><td>Name</td>
+<td>Phase</td>
+<td>Data type</td>
+<td>Section</td>
+</tr>
+<tr><td>Read</td>
+<td>Split</td>
+<td>Scalar</td>
+<td>3.1</td>
+</tr>
+<tr><td>Get</td>
+<td>Single</td>
+<td>Scalar</td>
+<td>3.2</td>
+</tr>
+<tr><td>Notify</td>
+<td>Trigger</td>
+<td>Scalar</td>
+<td>3.3</td>
+</tr>
+<tr><td>ReadStream</td>
+<td>Split</td>
+<td>Stream</td>
+<td>3.4</td>
+</tr>
+</tbody>
+</table>
+<div class="section">
+<h2><a id="split-phase-small-scalar-i-o" name="split-phase-small-scalar-i-o">3.1 Split-Phase Small Scalar I/O</a></h2>
+<p>The first set of interfaces can be used for low-rate scalar I/O:</p>
+<pre class="literal-block">
+interface Read&lt;val_t&gt; {
+  command error_t read();
+  event void readDone( error_t result, val_t val );
+}
+</pre>
+<p>If the <tt class="docutils literal"><span class="pre">result</span></tt> parameter of the <tt class="docutils literal"><span class="pre">Read.readDone</span></tt> and
+<tt class="docutils literal"><span class="pre">ReadWrite.readDone</span></tt> events is not SUCCESS, then the memory of the
+<tt class="docutils literal"><span class="pre">val</span></tt> parameter MUST be filled with zeroes.</p>
+<p>If the call to <tt class="docutils literal"><span class="pre">read</span></tt> has returned SUCCESS, but the <tt class="docutils literal"><span class="pre">readDone</span></tt>
+event has not yet been signaled, then a subsequent call to <tt class="docutils literal"><span class="pre">read</span></tt>
+MUST return EBUSY or FAIL.  This simple locking technique, as opposed
+to a more complex system in which multiple read/readDone pairs may be
+outstanding, is intended to reduce the complexity of SID client code.</p>
+<p>Examples of sensors that would be suited to this class of interface
+include many basic sensors, such as photo, temp, voltage, and ADC
+readings.</p>
+</div>
+<div class="section">
+<h2><a id="single-phase-scalar-i-o" name="single-phase-scalar-i-o">3.2 Single-Phase Scalar I/O</a></h2>
+<p>Some devices may have their state cached or readily available. In
+these cases, the device can provide a single-phase instead of
+split-phase operation.  Examples include a node's MAC address (which
+the radio stack caches in memory), profiling information (e.g.,
+packets received), or a GPIO pin. These devices MAY use the
+Get interface:</p>
+<pre class="literal-block">
+interface Get&lt;val_t&gt; {
+  command val_t get();
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="notification-based-scalar-i-o" name="notification-based-scalar-i-o">3.3 Notification-Based Scalar I/O</a></h2>
+<p>Some sensor devices represent triggers, rather than request-driven
+data acquisition. Examples of such sensors include switches,
+passive-IR (PIR) motion sensors, tone detectors, and smoke
+detectors. This class of event-driven sensors can be presented with
+the Notify interface:</p>
+<pre class="literal-block">
+interface Notify&lt;val_t&gt; {
+  command error_t enable();
+  command error_t disable();
+  event void notify( val_t val );
+}
+</pre>
+<p>The Notify interface is intended for relatively low-rate events (e.g.,
+that can easily tolerate task latencies). High-rate events may require
+more platform- or hardware-specific async interfaces.</p>
+<p>The enable() and disable() command enable and disable notification
+events for the interface instance used by a single particular
+client. They are distinct from the sensor's power state. For example,
+if an enabled sensor is powered down, then when powered up it will
+remain enabled.</p>
+<p>If <tt class="docutils literal"><span class="pre">enable</span></tt> returns SUCCESS, the interface MUST subsequently
+signal notifications when appropriate. If <tt class="docutils literal"><span class="pre">disable</span></tt> returns SUCCESS,
+the interface MUST NOT signal any notifications.</p>
+<p>The val parameter is used as defined in the Read interface.</p>
+</div>
+<div class="section">
+<h2><a id="split-phase-streaming-i-o" name="split-phase-streaming-i-o">3.4 Split-Phase Streaming I/O</a></h2>
+<p>Some sensors can provide a continuous stream of readings, and some
+actuators can accept a continuous stream of new data. Depending on the
+rate needed and jitter bounds that higher level components can
+tolerate, it can be useful to be able to read or write readings in
+blocks instead of singly.  For example, a microphone or accelerometer
+may provide data at a high rate that cannot be processed quickly
+enough when each new reading must be transferred from asynchronous to
+synchronous context through the task queue.</p>
+<p>The ReadStream interface MAY be provided by a device that can
+provide a continuous stream of readings:</p>
+<pre class="literal-block">
+interface ReadStream&lt;val_t&gt; {
+
+  command error_t postBuffer( val_t* buf, uint16_t count );
+
+  command error_t read( uint32_t usPeriod );
+
+  event void bufferDone( error_t result,
+                         val_t* buf, uint16_t count );
+
+  event void readDone( error_t result );
+}
+</pre>
+<p>The postBuffer command takes an array parameterized by the sample
+type, and the number of entries in that buffer. A driver can then
+enqueue the buffer for filling. The client can call postBuffer() more
+than once, to &quot;pre-fill&quot; the queue with any number of buffers. The
+size of the memory region pointed to by the buf parameter MUST be at
+least as large as the size of a pointer on the node architecture plus
+the size of the uint16_t count argument. This requirement supports
+drivers that may store the queue of buffers and count sizes by
+building a linked list.</p>
+<p>After posting at least one buffer, the client can call read() with a
+specified sample period in terms of microseconds. The driver then
+begins to fill the buffers in the queue, signaling the bufferDone()
+event when a buffer has been filled. The client MAY call postBuffer()
+after read() in order to provide the device with new storage for
+future reads.</p>
+<p>If the device ever takes a sample that it cannot store (e.g., due to
+buffer underrun), it MUST signal readDone() with an appropriate
+failure code. If an error occurs during a read, then the device MUST
+signal readDone() with an appropriate failure code. Before a device
+signals readDone(), it MUST signal bufferDone() for all outstanding
+buffers. If a readDone() is pending, calls to postBuffer MUST return
+FAIL.</p>
+<p>In the ReadStream interface, <tt class="docutils literal"><span class="pre">postBuffer</span></tt> returns SUCCESS if the buffer
+was successfully added to the queue, FAIL otherwise. A return value
+of SUCCESS from <tt class="docutils literal"><span class="pre">read</span></tt> indicates reading has begun and the interface
+will signal <tt class="docutils literal"><span class="pre">bufferDone</span></tt> and/or <tt class="docutils literal"><span class="pre">readDone</span></tt> in the future. A
+return value of FAIL means the read did not begin and the interface
+MUST NOT signal <tt class="docutils literal"><span class="pre">readDone</span></tt> or <tt class="docutils literal"><span class="pre">bufferDone</span></tt>. Calls to <tt class="docutils literal"><span class="pre">read</span></tt>
+MAY return EBUSY if the component cannot service the request.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">4. Implementation</a></h1>
+<p>An implementation of the Read interface can be found in
+<tt class="docutils literal"><span class="pre">tos/system/SineSensorC.nc</span></tt> and <tt class="docutils literal"><span class="pre">tos/system/ArbitratedReadC.nc</span></tt>.</p>
+<p>An implementation of the Get interface can be found in
+<tt class="docutils literal"><span class="pre">tos/platforms/telosb/UserButtonC.nc</span></tt>.</p>
+<p>An implementation of the ReadStream interface can be found in
+<tt class="docutils literal"><span class="pre">tos/sensorboards/mts300/MageXStreamC.nc</span></tt>.</p>
+<p>Implementations of the Notify interface can be found in
+<tt class="docutils literal"><span class="pre">tos/platforms/telosb/SwitchToggleC.nc</span></tt> and
+<tt class="docutils literal"><span class="pre">tos/platforms/telosb/UserButtonP.nc</span></tt>.</p>
+</div>
+<div class="section">
+<h1><a id="summary" name="summary">5. Summary</a></h1>
+<p>According to the design principles described in the HAA[_haa], authors
+should write device drivers that provide rich, device-specific
+interfaces that expose the full capabilities of each device. In
+addition, authors can use the interfaces described in this memo to
+provide a higher-level device-independent abstractions: SIDs. By
+providing such an abstraction, driver authors can support developers
+who only need simple interfaces, and can reduce the effort needed to
+connect a sensor into a more general system.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">6. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Gilman Tolle</div>
+<div class="line">501 2nd St. Ste 410</div>
+<div class="line">Arch Rock Corporation</div>
+<div class="line">San Francisco, CA 94107</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 415 692 0828</div>
+<div class="line">email - <a class="reference" href="mailto:gtolle&#64;archrock.com">gtolle&#64;archrock.com</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates</div>
+<div class="line">Computer Science Laboratory</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">David Gay</div>
+<div class="line">2150 Shattuck Ave, Suite 1300</div>
+<div class="line">Intel Research</div>
+<div class="line">Berkeley, CA 94704</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 510 495 3055</div>
+<div class="line">email - <a class="reference" href="mailto:david.e.gay&#64;intel.com">david.e.gay&#64;intel.com</a></div>
+<div class="line"><br /></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">7. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="id2">[1]</a></td><td>TEP 108: Resource Arbitration.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="power-management-of-non-virtualised-devices">
+<h1 class="title">Power Management of Non-Virtualised Devices</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">115</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Kevin Klues, Vlado Handziski, Jan-Hinrich Hauer, Phil Levis</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with TEP
+1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo documents how TinyOS 2.x manages the power state of physical
+(not virtualised) abstractions.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>TinyOS platforms have limited energy. A unified power management
+strategy for all devices and peripherals is not feasible, as
+they vary significantly in warm-up times, power profiles, and
+operation latencies. While some devices, such as
+microcontrollers, can efficiently calculate their lowest possible
+power state very quickly, others, such as sensors with warm-up
+times, require external knowledge to do so.</p>
+<p>In TinyOS 1.x, applications are responsible for all power management.
+Low-level subsystems, such as an SPI bus, are explicitly powered on
+and off by higher level abstractions. This approach of deep calls
+to <tt class="docutils literal"><span class="pre">StdControl.start()</span></tt> and <tt class="docutils literal"><span class="pre">StdControl.stop()</span></tt> introduces strange behaviors
+and can get in the way of power conservation. Turning off the radio
+on the Telos platform, for example, turns off the SPI bus and therefore
+prevents the flash driver from working. Additionally, the microcontroller
+stays in a higher power state for the SPI bus even when it is
+inactive.</p>
+<p>TinyOS 2.x defines two classes of devices for power-management:
+microcontrollers and peripherals. TEP 112 documents how TinyOS 2.x
+manages the power state of a microcontroller <a class="citation-reference" href="#tep112" id="id1" name="id1">[TEP112]</a>.
+Unlike microcontrollers, which typically have several power states,
+peripheral devices typically have two distinct states, <em>on</em> and <em>off</em>.
+This TEP is dedicated to documenting how TinyOS 2.x controls the power
+state of peripheral devices.</p>
+<p>The term &quot;peripheral device&quot; refers to any hardware device which
+arbitrates access with the mechanisms described in <a class="citation-reference" href="#tep108" id="id2" name="id2">[TEP108]</a> .  These
+devices are not  virtualised in the sense that access to
+them must be explicitly requested and released by their users.</p>
+</div>
+<div class="section">
+<h1><a id="power-management-models" name="power-management-models">2. Power Management Models</a></h1>
+<p>There are two different models to managing the power state of a
+peripheral in TinyOS: <em>explicit power management</em> and <em>implicit
+power management</em>.</p>
+<p>The explicit model provides a means for a single client to manually
+control the power state of a dedicated physical device (as defined by
+<a class="citation-reference" href="#tep108" id="id3" name="id3">[TEP108]</a>).  Whenever this client tells the device to power up or down
+it does so without delay (except for delays in the hardware of course).
+This model
+can be particularly useful when the control information driving the
+selection of the proper power state of a device relies on external
+logic contained in higher level components.  The following section
+discusses the <tt class="docutils literal"><span class="pre">StdControl</span></tt>, <tt class="docutils literal"><span class="pre">SplitControl</span></tt>, and
+<tt class="docutils literal"><span class="pre">AsyncStdControl</span></tt> interfaces used to perform power management of
+this type.</p>
+<p>The implicit model, on the other hand, provides a means for allowing
+the power state of a device to be controlled from within the driver
+for that device itself.  Device drivers following this model are never
+explicitly powered up or down by some external client, but rather
+<em>require</em> some internal policy to be defined that decides exactly when
+their power states should be changed.  This policy could exist
+natively on the hardware of the physical device itself, or be
+implemented on top of some lower level abstraction of a physical
+device adhering to the <em>explicit power management</em> model.</p>
+<p>Shared devices (as defined by <a class="citation-reference" href="#tep108" id="id4" name="id4">[TEP108]</a>) can infer whether they
+should be on or off based on the interfaces they provide to their
+clients. For example, when a client requests the ADC, this implies
+the ADC should be on; if there are no requests of the ADC, this implies
+it should be off. Therefore shared devices do not need to provide a
+power control interface. They can use an implicit power management policy.
+Section 4.2 discusses this in more detail.:</p>
+<pre class="literal-block">
+               /|\                                    /|\
+                |                                      |
+          Data Interface                            Resource
+                |                                      |
+-----------------------------------------------------------------------
+|             Shared Device (implicitly power managed)                |
+-----------------------------------------------------------------------
+               /|\                                    /|\
+                |                                      |
+          Data Interface                            Resource
+                |                                      |
+                |        ----------------------        |
+                |        |    Power Manager   |        |
+                |        ----------------------        |
+                |          /|\            /|\          |
+                |           |              |           |
+                |      StdControl ResourceDefaultOwner |
+                |           |              |           |
+---------------------------------      --------------------------------
+|        Dedicated Device       |      |            Arbiter           |
+|  (explicitly power managed)   |      |                              |
+---------------------------------      --------------------------------
+</pre>
+</div>
+<div class="section">
+<h1><a id="explicit-power-management" name="explicit-power-management">3. Explicit Power Management</a></h1>
+<p>Just as in TinyOS 1.x, TinyOS 2.x has  <tt class="docutils literal"><span class="pre">StdControl</span></tt> and <tt class="docutils literal"><span class="pre">SplitControl</span></tt>
+interfaces in order to control the on and off
+power states of explicitly managed peripherals. TinyOS 2.x also
+introduces a third interface, <tt class="docutils literal"><span class="pre">AsyncStdControl</span></tt>. A component
+representing a hardware device that can be powered on and off MUST
+provide one of these three interfaces.
+The selection of the right interface depends on the
+latencies involved in changing between these two states as well as the
+nature of the code (sync or async) executing any of the interface's
+commands.</p>
+<div class="section">
+<h2><a id="power-management-with-stdcontrol" name="power-management-with-stdcontrol">3.1 Power Management with <tt class="docutils literal"><span class="pre">StdControl</span></tt></a></h2>
+<p>Whenever the powerup and powerdown times of a non-virtualised device
+are negligible, they SHOULD provide the <tt class="docutils literal"><span class="pre">StdControl</span></tt> interface as
+defined below:</p>
+<pre class="literal-block">
+interface StdControl {
+  command error_t start();
+  command error_t stop();
+}
+</pre>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">Powerup and powerdown times on the order of a few microseconds have
+traditionally been considered negligible, and can be waited on using
+one of the <em>BusyWait</em> interfaces described in <a class="citation-reference" href="#tep102" id="id5" name="id5">[TEP102]</a>.  Powerup
+and powerdown times on the order of a few milliseconds, however,
+should not be ignored, and MUST be hidden behind the use of the
+<tt class="docutils literal"><span class="pre">SplitControl</span></tt> interface described later on in this section.
+A general rule of thumb is that if waiting for powerup takes
+more than one hundred microseconds, SplitControl is probably more
+suitable.</p>
+</div>
+<p>An external component MUST call <tt class="docutils literal"><span class="pre">StdControl.start()</span></tt> to power a
+device on and <tt class="docutils literal"><span class="pre">StdControl.stop()</span></tt> to power a device off.  Calls to
+either command MUST return either SUCCESS or FAIL.</p>
+<p>Upon the successful return of a call to <tt class="docutils literal"><span class="pre">StdControl.start()</span></tt>, a
+device MUST be completely powered on, allowing calls to commands of other
+interfaces implemented by the device to succeed.</p>
+<p>Upon the successful return of a call to <tt class="docutils literal"><span class="pre">StdControl.stop()</span></tt>, a
+device MUST be completely powered down, and any calls to commands
+of other interfaces implemented by that device that actually access
+the device hardware MUST return FAIL or EOFF.</p>
+<p>If a device is not able to complete the <tt class="docutils literal"><span class="pre">StdControl.start()</span></tt> or
+<tt class="docutils literal"><span class="pre">StdControl.stop()</span></tt> request for any reason, it MUST return FAIL.</p>
+<p>Based on these specifications, the following matrix has been created
+to describe the valid return values for any call made through the
+<tt class="docutils literal"><span class="pre">StdControl</span></tt> interface in one of the devices valid power states:</p>
+<table border="1" class="docutils">
+<colgroup>
+<col width="38%" />
+<col width="31%" />
+<col width="31%" />
+</colgroup>
+<thead valign="bottom">
+<tr><th class="head">Call</th>
+<th class="head">Device On</th>
+<th class="head">Device Off</th>
+</tr>
+</thead>
+<tbody valign="top">
+<tr><td>StdControl.start()</td>
+<td>SUCCESS</td>
+<td>SUCCESS or FAIL</td>
+</tr>
+<tr><td>StdControl.stop()</td>
+<td>SUCCESS or FAIL</td>
+<td>SUCCESS</td>
+</tr>
+<tr><td>operation</td>
+<td>depends</td>
+<td>FAIL or EOFF</td>
+</tr>
+</tbody>
+</table>
+<p>Devices providing this interface would do so as shown below:</p>
+<pre class="literal-block">
+configuration DeviceC {
+  provides {
+    interface Init;
+    interface StdControl;  //For Power Management
+    ....
+  }
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="power-management-with-splitcontrol" name="power-management-with-splitcontrol">3.2 Power Management with <tt class="docutils literal"><span class="pre">SplitControl</span></tt></a></h2>
+<p>When a device's powerup and powerdown times are non-negligible, the
+<em>``SplitControl``</em> interface SHOULD be used in place of the <em>``StdControl``</em>
+interface.  The definition of this interface can be seen below:</p>
+<pre class="literal-block">
+interface SplitControl {
+  command error_t start();
+  event void startDone(error_t error);
+  command error_t stop();
+  event void stopDone(error_t error);
+}
+</pre>
+<p>An external component MUST call <tt class="docutils literal"><span class="pre">SplitControl.start()</span></tt> to power a
+device on and <tt class="docutils literal"><span class="pre">SplitControl.stop()</span></tt> to power a device off.  Calls to
+either command return one of SUCCESS, FAIL, EBUSY, or
+EALREADY. SUCCESS indicates that the device has now started changing
+its power state and will signal a corresponding completion event in
+the future. EBUSY indicates that the device is in the midst of either starting
+or stopping (e.g., it is starting when stop is called or stopping
+when start is called) and will not issue an event. EALREADY indicates
+that the device is already in that state; the call is erroneous and a
+completion event will not be signaled. FAIL indicates that the
+device's power state could not be changed. More explicitly:</p>
+<p>Successful calls to <tt class="docutils literal"><span class="pre">SplitControl.start()</span></tt> MUST signal one of
+<tt class="docutils literal"><span class="pre">SplitControl.startDone(SUCCESS)</span></tt> or <tt class="docutils literal"><span class="pre">SplitControl.startDone(FAIL)</span></tt>.</p>
+<p>Successful calls to <tt class="docutils literal"><span class="pre">SplitControl.stop()</span></tt> MUST signal one of
+<tt class="docutils literal"><span class="pre">SplitControl.stopDone(SUCCESS)</span></tt> or <tt class="docutils literal"><span class="pre">SplitControl.stopDone(FAIL)</span></tt>.</p>
+<p>Upon signaling a <tt class="docutils literal"><span class="pre">SplitControl.startDone(SUCCESS)</span></tt>, a device MUST
+be completely powered on, and operation requests through calls to commands
+of other interfaces implemented by the device MAY succeed.</p>
+<p>Upon signalling a <tt class="docutils literal"><span class="pre">SplitControl.stopDone(SUCCESS)</span></tt>, a device MUST be
+completely powered down, and any subsequent calls to commands of other
+interfaces implemented by the device that actually access
+the device hardware MUST return EOFF or FAIL.</p>
+<p>If a device is powered on and a successful call to <tt class="docutils literal"><span class="pre">SplitControl.stop()</span></tt>
+signals a <tt class="docutils literal"><span class="pre">SplitControl.stopDone(FAIL)</span></tt>, the device MUST still be fully
+powered on, and operation requests through calls to commands of other
+interfaces implemented by the device MAY succeed.</p>
+<p>If a device is powered down and a successful call to <tt class="docutils literal"><span class="pre">SplitControl.start()</span></tt>
+signals a <tt class="docutils literal"><span class="pre">SplitControl.startDone(FAIL)</span></tt>, the device MUST still be fully
+powered down, and operation requests through calls to commands of other
+interfaces implemented by the device MUST return EOFF or FAIL.</p>
+<p>If a device is not able to complete the <tt class="docutils literal"><span class="pre">SplitControl.start()</span></tt> or
+<tt class="docutils literal"><span class="pre">SplitControl.stop()</span></tt> requests they MUST return FAIL.</p>
+<p>Calls to either <tt class="docutils literal"><span class="pre">SplitControl.start()</span></tt> when the device is starting
+or <tt class="docutils literal"><span class="pre">SplitControl.stop()</span></tt> while the device is stopping MUST return
+SUCCESS, with the  anticipation that a corresponding
+<tt class="docutils literal"><span class="pre">SplitControl.startDone()</span></tt> or <tt class="docutils literal"><span class="pre">SplitControl.stopDone()</span></tt>
+will be signaled in the future.</p>
+<p>Calls to <tt class="docutils literal"><span class="pre">SplitControl.start()</span></tt> when the device is started
+or <tt class="docutils literal"><span class="pre">SplitControl.stop()</span></tt> while the device is stopped MUST
+return EALREADY, indicating that the device is already in that
+state. The corresponding completion event (startDone for start
+or stopDone for stop) MUST NOT be signaled.</p>
+<p>Calls to <tt class="docutils literal"><span class="pre">SplitControl.start()</span></tt> when the device is stopping or
+<tt class="docutils literal"><span class="pre">SplitControl.stop()</span></tt> while the device is starting MUST return
+EBUSY, indicating that the device is busy performing a differnet
+operation. The correspodning completion event (startDone for start or
+stopDone for stop) MUST NOT be signaled.</p>
+<table border="1" class="docutils">
+<colgroup>
+<col width="34%" />
+<col width="17%" />
+<col width="18%" />
+<col width="15%" />
+<col width="15%" />
+</colgroup>
+<thead valign="bottom">
+<tr><th class="head">Call</th>
+<th class="head">Device On</th>
+<th class="head">Device Off</th>
+<th class="head">Starting</th>
+<th class="head">Stopping</th>
+</tr>
+</thead>
+<tbody valign="top">
+<tr><td>SplitControl.start()</td>
+<td>EALREADY</td>
+<td>SUCCESS
+FAIL</td>
+<td>SUCCESS</td>
+<td>EBUSY</td>
+</tr>
+<tr><td>SplitControl.stop()</td>
+<td>SUCCESS
+FAIL</td>
+<td>EALREADY</td>
+<td>EBUSY</td>
+<td>SUCCESS</td>
+</tr>
+<tr><td>operation</td>
+<td>depends</td>
+<td>FAIL
+EOFF
+EOFF</td>
+<td>FAIL
+EOFF
+SUCCESS</td>
+<td>FAIL
+EOFF</td>
+</tr>
+</tbody>
+</table>
+<p>Devices providing this interface would do so as shown below:</p>
+<pre class="literal-block">
+configuration DeviceC {
+  provides {
+    interface Init;
+    interface SplitControl; \\ For Power Management
+    ....
+  }
+}
+</pre>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p>Other approaches were considered for the return values of
+<tt class="docutils literal"><span class="pre">SplitControl.start()</span></tt> and <tt class="docutils literal"><span class="pre">SplitControl.stop()</span></tt>.  One such
+approach would have replaced EBUSY with SUCCESS when
+<tt class="docutils literal"><span class="pre">SplitControl.start()</span></tt> was called while in the process of stopping
+and <tt class="docutils literal"><span class="pre">SplitControl.stop()</span></tt> was called while in the process of starting.
+However, implementing such an approach adds unwanted complexity to
+a device driver.  It is unreasonable to expect the implementor of
+each driver to implement this functionality.</p>
+<p class="last">Returning EBUSY is the most straightforward, unambiguous value
+that can be returned in such a situation.  By returning
+EBUSY when a device is in a transitional state, the components
+built on top of a driver unambiguously know exactly why a call to
+<tt class="docutils literal"><span class="pre">start()</span></tt> or <tt class="docutils literal"><span class="pre">stop()</span></tt> did not succeed, and can take action accordingly.
+Since only ONE component should ever implement the <tt class="docutils literal"><span class="pre">SplitControl</span></tt>
+interface for a given device, it isn't unreasonable to expect them
+to keep track of this return value themselves.  There is, of course,
+nothing preventing someone from creating a component
+on top of each driver implementation that implements things differently.</p>
+</div>
+</div>
+<div class="section">
+<h2><a id="power-management-with-asyncstdcontrol" name="power-management-with-asyncstdcontrol">3.3 Power Management with <tt class="docutils literal"><span class="pre">AsyncStdControl</span></tt></a></h2>
+<p>The commands and the events of the <em>``StdControl``</em> and the <em>``SplitControl``</em>
+interfaces are synchronous and can not be called from within
+asynchronous code (such as interrupt service routines, etc.). For the
+cases when the power state of the device needs to be controlled from
+within asynchronous code, the <em>``AsyncStdControl``</em> interface MUST be used
+in place of the <em>``StdControl``</em> interface.  The definition of this
+interface can be seen below:</p>
+<pre class="literal-block">
+interface AsyncStdControl {
+  async command error_t start();
+  async command error_t stop();
+}
+</pre>
+<p>All of the semantics that hold true for devices providing the
+<tt class="docutils literal"><span class="pre">StdControl</span></tt> interface also hold for this interface.</p>
+<p>Devices providing this interface would do so as shown below:</p>
+<pre class="literal-block">
+configuration DeviceC {
+  provides {
+    interface Init;
+    interface AsyncStdControl; \\ For Power Management
+    ....
+  }
+}
+</pre>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">The <tt class="docutils literal"><span class="pre">AsyncStdControl</span></tt> interface should be provided whenever it might be
+necessary to allow a device to be powered on or off while running in
+async context.  If it is anticipated that a device <em>will</em> not (or more
+likely <em>should</em> not) be powered on or off while in asynchronous context,
+then the <tt class="docutils literal"><span class="pre">StdControl</span></tt> interface SHOULD be provided instead.  Components
+that wish to power the device on or off from within async context would
+then be required to post a task before doing so.  In practice,
+<tt class="docutils literal"><span class="pre">AsyncStdControl</span></tt> is provided by low-level hardware resources, while
+<tt class="docutils literal"><span class="pre">StdControl</span></tt> is provided by higher level services built on top of these
+resources.</p>
+</div>
+</div>
+</div>
+<div class="section">
+<h1><a id="implicit-power-management" name="implicit-power-management">4. Implicit Power Management</a></h1>
+<p>While explicit power management provides the mechanism for changing
+power states, it does not specify a policy.
+This does not represent a large problem for the simple case
+of <em>dedicated</em> devices, but can become crucial for non-trivial cases
+involving complex interdependencies between devices controlled by multiple
+clients.</p>
+<p>For example, if component <em>A</em> is a client of both component <em>B</em>
+and component <em>C</em>, what happens with <em>B</em> and <em>C</em> if
+<tt class="docutils literal"><span class="pre">StdControl.stop()</span></tt> is called on component <em>A</em> ? Should components
+<em>B</em> and <em>C</em> also be stopped?  What about the reverse case where both
+<em>B</em> and <em>C</em> are clients of the single shared component, <em>A</em>?  If
+devices <em>B</em> and <em>C</em> are shut off, should <em>A</em> be shut off as well?
+How can one decide when it is appropriate to cascade such powerup
+and powerdown requests?</p>
+<p>The complex nature of the problem is evident from the number of
+unexpected behaviors in TinyOS 1.x involving <tt class="docutils literal"><span class="pre">StdControl</span></tt>. On several
+platforms, one of the SPI buses is shared between the radio and the
+flash device. On some of them, issuing <tt class="docutils literal"><span class="pre">StdControl.stop()</span></tt> on the
+radio results in a series of cascaded calls that result in SPI bus
+becoming disabled, rendering the communication with the flash impossible.
+Of course, the right policy would involve tracking the clients of the
+SPI bus and powering it off only once both the radio and the flash
+devices were no longer using it. Conversely, the SPI bus should be
+powered on whenever there is at least one active client.</p>
+<p>The selection of the right power management policy to use is a complex
+task that depends on the nature of the devices in use, their
+interdependency, as well as on any specific application requirements.
+For cases when some of these features are known a-priori or are
+restricted in some sense, it is preferable that the system provide
+architectural support for enforcing a meaningful <em>default</em> power-management
+policy instead of passing that task on to the application programmer to be
+solved on a case-by-case basis.  The following section discusses these power
+management policies and the components that implement them in greater detail.</p>
+<div class="section">
+<h2><a id="power-management-policies" name="power-management-policies">4.1. Power Management Policies</a></h2>
+<p>Just as generic arbiters are offered in TinyOS 2.x to provide the
+arbitration functionality required by shared resources, generic power
+management policies are also offered to allow the power management of
+non-virtualised devices to be automatically controlled.</p>
+<p>Through the use of the arbiter components described in <a class="citation-reference" href="#tep108" id="id6" name="id6">[TEP108]</a>,
+device drivers implemented as shared resources provide the type of
+restricted resource interdependency where default power-management
+policies can be offered. The shared resource class defined in Section
+2.3 of <a class="citation-reference" href="#tep108" id="id7" name="id7">[TEP108]</a>, provides a well defined component interdependency,
+where a single resource is shared among multiple clients. This
+relationship enables the definition of default power-management
+policies that can be used to automatically power the resource on and
+off.</p>
+<p>The <em>Power Manager</em> component implementing one of these polices acts as
+the <em>default owner</em> of the shared resource device and interacts with it
+through the use of the ResourceDefaultOwner interface:</p>
+<pre class="literal-block">
+interface ResourceDefaultOwner {
+  async event void granted();
+  async command error_t release();
+  async command bool isOwner();
+  async event void requested();
+  async event void immediateRequested();
+}
+</pre>
+<p>Acting as the default owner, the <em>Power Manager</em> waits for the
+<tt class="docutils literal"><span class="pre">ResourceDefaultOwner.granted()</span></tt> event to be signaled in order to
+gain ownership over the resource device.</p>
+<p>Once it owns the device, the <em>Power Manager</em> is free to execute its
+power-management policy using the StdControl-like interface provided by the
+underlying resource. Different power managers can implement different
+policies. In the simplest case, this would involve an immediate power-down
+via one of the <tt class="docutils literal"><span class="pre">stop()</span></tt> commands. When the power-state transition
+involves non-negligible costs in terms of wake-up latency or power
+consumption, the <em>PowerManager</em> might revert to a more intelligent
+strategy that tries to reduce these effects. As pointed out in the
+introduction, one such strategy might involve the use of a timer to defer
+the power-down of the resource to some later point in time, giving any
+resource clients a window of opportunity to put in requests before the
+device is fully shut down.</p>
+<p>Regardless of the power management policy in use, the <em>Power Manager</em>
+remains owner of the resource as long as the resource is not requested
+by one of its clients.  Whenever a client puts in a request, the
+<em>Power Manager</em> will receive a <tt class="docutils literal"><span class="pre">ResourceDefaultOwner.requested()</span></tt> event
+(or <tt class="docutils literal"><span class="pre">immediateRequested()</span></tt> event) from the arbiter it is associated with.
+Upon receiving this event, the <em>Power Manager</em> MUST power up the
+resource through the StdControl-like interface provided by the lower level
+abstraction of the physical device. The <em>Power Manager</em> MUST release the
+ownership of the resource (using the <tt class="docutils literal"><span class="pre">ResourceDefaultOwner.release()</span></tt>
+command) and MUST wait until after the resource has been fully powered on
+before doing so.</p>
+<p>Modeling devices as shared resources and allowing them to be
+controlled in the way described here, solves the problems outlined in
+section 3 regarding how to keep track of when and how the
+powerdown of nested resources should proceed.  The <em>Power Manager</em>
+component answers the question of how, and the combination of the power
+management policy being used and the reception of the
+<tt class="docutils literal"><span class="pre">ResourceDefaultOwner.granted()</span></tt> and <tt class="docutils literal"><span class="pre">ResourceDefaultOwner.requested()</span></tt>
+events answers the question of when.  As long as the resource at
+the bottom of a large set of nested resource clients has been fully released,
+the power mananger will be able to power down the resource appropriately.</p>
+<p>Using the model described above, a resource that uses one of these policies
+according to the <em>implicitly power management</em> model could be built as shown below:</p>
+<pre class="literal-block">
+module MyFlashP {
+  provides {
+    interface Init;
+    interface SplitControl;
+    interface Resource;
+    interface FlashCommands;
+    ...
+  }
+}
+implementation {
+  ...
+}
+
+generic module PowerManagerC(uint8_t POWERDOWN_DELAY) {
+  provides {
+    interface Init;
+  }
+  uses {
+    interface SplitControl;
+    interface ResourceDefaultOwner;
+  }
+}
+implementation {
+  ...
+}
+
+#define MYFLASH_RESOURCE &quot;MyFlash.resource&quot;
+#define MYFLASH_POWERDOWN_DELAY       1000
+configuration MyFlashC {
+  provides {
+    interface Init;
+    interface Resource;
+    interface FlashCommands;
+  }
+}
+implementation {
+  components new PowerManagerC(MYFLASH_POWERDOWN_DELAY)
+  , FcfsArbiter(MYFLASH_RESOURCE)
+  , MyFlashP;
+
+  Init = MyFlashP;
+  Resource = FcfsArbiter;
+  FlashCommands = MyFlashP;
+
+  PowerManagerC.ResourceDefaultUser -&gt; FcfsArbiter;
+  PowerManagerC.SplitControl -&gt; MyFlashP;
+
+}
+</pre>
+<p>This example implementation is built out of three components.  The
+first component (<tt class="docutils literal"><span class="pre">MyFlashP</span></tt>) follows the <em>explicit power management</em>
+model for defining the interfaces to the physical flash device.  The
+second component (<tt class="docutils literal"><span class="pre">PowerManagerC</span></tt>) is the generic <em>Power Manager</em>
+component that will be used to implement the specific power management
+policy for this device.  The third component (<tt class="docutils literal"><span class="pre">MyFlashC</span></tt>) is the
+configuration file that wires together all of the components required
+by the implementation of of the device as it adheres to the <em>implicit power
+management</em> model.  It includes the <tt class="docutils literal"><span class="pre">MyflashP</span></tt> and <tt class="docutils literal"><span class="pre">PowerManagerC</span></tt>
+components, as well as an arbiter component for managing shared clients
+of the device.  Notice how the <em>Power Manager</em> is wired to both the
+<tt class="docutils literal"><span class="pre">ResourceDefaultUser</span></tt> interface provided by the arbiter, and the
+<tt class="docutils literal"><span class="pre">SplitControl</span></tt> interface provided by the flash.  All clients of this flash
+device are directly connected to the resource interface provided by
+the arbiter.  As outlined above, the <tt class="docutils literal"><span class="pre">PowerManagerC</span></tt> component will use
+the events signaled through the <tt class="docutils literal"><span class="pre">ResourceDefaultUser</span></tt> interface to determine
+when to make calls to power the device up and power it down through
+the <tt class="docutils literal"><span class="pre">SplitControl</span></tt> interface.</p>
+</div>
+<div class="section">
+<h2><a id="example-power-managers-powermanagerc-and-deferredpowermanagerc" name="example-power-managers-powermanagerc-and-deferredpowermanagerc">4.2. Example Power Managers: PowerManagerC and DeferredPowerManagerC</a></h2>
+<p>TinyOS 2.x currently has two default power management policies
+that it provides.  These policies are implemented by the various
+components located under tinyos-2.x/lib/power. The first policy
+is implemented using an <em>immediate</em> power control scheme, whereby
+devices are powered on and off immediately after they have been
+requested and released.  The second policy is implemented using
+a <em>deferred</em> power control scheme, whereby devices are powered
+on immediately after being requested, but powered off after
+some small delay from being released. This delay is configurable
+to meet the varying needs of different device drivers.</p>
+<p>Each policy has three different implementations for use by each of
+the <tt class="docutils literal"><span class="pre">StdControl</span></tt>, <tt class="docutils literal"><span class="pre">SplitControl</span></tt>, and <tt class="docutils literal"><span class="pre">AsyncStdControl</span></tt>
+interfaces.</p>
+<p>For reference, each of the available components are listed below</p>
+<dl class="docutils">
+<dt>Immediate Power Management:</dt>
+<dd><ul class="first last simple">
+<li><tt class="docutils literal"><span class="pre">StdControlPowerManagerC</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">SplitControlPowerManagerC</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">AsyncStdControlPowerManagerC</span></tt></li>
+</ul>
+</dd>
+<dt>Deferred Power Management:</dt>
+<dd><ul class="first last simple">
+<li><tt class="docutils literal"><span class="pre">StdControlDeferredPowerManagerC</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">SplitControlDeferredPowerManagerC</span></tt></li>
+<li><tt class="docutils literal"><span class="pre">AsyncStdControlDeferredPowerManagerC</span></tt></li>
+</ul>
+</dd>
+</dl>
+</div>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">5. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Kevin Klues</div>
+<div class="line">444 Gates Hall</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305-9030</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:klueska&#64;cs.stanford.edu">klueska&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Vlado Handziski</div>
+<div class="line">Sekr FT5</div>
+<div class="line">Einsteinufer 25</div>
+<div class="line">10587 Berlin</div>
+<div class="line">GERMANY</div>
+<div class="line"><br /></div>
+<div class="line">phone - +49 30 314 23831</div>
+<div class="line">email - <a class="reference" href="mailto:handzisk&#64;tkn.tu-berlin.de">handzisk&#64;tkn.tu-berlin.de</a></div>
+<div class="line"><br /></div>
+<div class="line">Jan-Hinrich Hauer</div>
+<div class="line">Sekr FT5</div>
+<div class="line">Einsteinufer 25</div>
+<div class="line">10587 Berlin</div>
+<div class="line">GERMANY</div>
+<div class="line"><br /></div>
+<div class="line">phone - +49 30 314 23813</div>
+<div class="line">email - <a class="reference" href="mailto:hauer&#64;tkn.tu-berlin.de">hauer&#64;tkn.tu-berlin.de</a></div>
+<div class="line"><br /></div>
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305-9030</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">6. Citations</a></h1>
+<table class="docutils citation" frame="void" id="tep102" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id5" name="tep102">[TEP102]</a></td><td>TEP 102: Timers.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep108" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep108">[TEP108]</a></td><td><em>(<a class="fn-backref" href="#id2">1</a>, <a class="fn-backref" href="#id3">2</a>, <a class="fn-backref" href="#id4">3</a>, <a class="fn-backref" href="#id6">4</a>, <a class="fn-backref" href="#id7">5</a>)</em> TEP 108: Resource Arbitration.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep112" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="tep112">[TEP112]</a></td><td>TEP 112: Microcontroller Power Management.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
diff --git a/doc/html/tep116.html b/doc/html/tep116.html
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+}
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+
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+  color: red }
+
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+  margin-top: 0.5em ;
+  margin-bottom: 0.5em }
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+  margin: 2em 4em;
+}
+
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+  padding-left: 0.5em ;
+  padding-right: 0.5em ;
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+
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+  font-weight: bold ;
+  text-align: left ;
+  white-space: nowrap;
+  }
+
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+  font-size: 100% }
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+
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+</head>
+<body>
+<div class="document" id="packet-protocols">
+<h1 class="title">Packet Protocols</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">116</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">&gt; 2.1</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Philip Levis</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>The memo documents the interfaces used by packet protocol components in
+TinyOS 2.x as well as the structure and implementation of ActiveMessageC,
+the basic data-link HIL component. It also documents the virtualized
+active message interfaces AMSenderC and AMReceiverC.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>Sensor nodes are network-centric devices. Much of their software
+complexity comes from network protocols and their interactions.
+In TinyOS, the basic network abstraction is an <em>active message</em>,
+a single-hop, unreliable packet. Active messages have a destination
+address, provide synchronous acknowledgements, and can be of
+variable length up to a fixed maximum size. They also have a
+type field, which is essentially a protocol identifier for
+components built on top of this abstraction.</p>
+<p>In TinyOS 1.x, the component GenericComm provides interfaces for
+transmitting and receiving active messages:</p>
+<pre class="literal-block">
+configuration GenericComm {
+  provides {
+    interface StdControl as Control;
+    interface SendMsg[uint8_t id];
+    interface ReceiveMsg[uint8_t id];
+    command uint16_t activity();
+  }
+  uses {
+    event result_t sendDone();
+  }
+}
+</pre>
+<p>This component, while simple, has several issues. First, it has the
+activity() commmand, which does not have a single caller in the entire
+TinyOS tree. This command requires GenericComm to allocate a
+timer, wasting CPU cycles and RAM.</p>
+<p>Second, it does not allow a node to receive packets besides
+those destined to it.  Several network
+protocols (e.g., MintRoute <a class="footnote-reference" href="#id6" id="id1" name="id1">[1]</a>, TAG <a class="footnote-reference" href="#id7" id="id2" name="id2">[2]</a>) take advantage
+of snooping on these packets for a variety of improvements in efficiency or
+performance. This has led to the creation of GenericCommPromiscuous,
+whose Receive interface does not distinguish
+between packets received that were addressed to the node and
+packets received that were addressed to other nodes. Choosing
+one of the two implementations is a global decision across
+an application. There is a way to enable both reception
+semantics at the same time for a different protocols,
+but they require a creative use of default event handlers.</p>
+<p>Third, it assumes that components will directly access the packet
+structure, the accepted approach in TinyOS 1.x. However, directly
+accessing packet structures introduces unforseen dependencies:
+a component that names a header field, for example, binds itself
+to data link layers that have a field with that name. Similarly,
+components on top of GenericComm directly access the data payload
+of a packet.</p>
+<p>TEP 111 documents the structure of a TinyOS 2.x packet buffer <a class="footnote-reference" href="#id8" id="id3" name="id3">[3]</a>.
+This TEP documents the interfaces used to access packet buffers,
+as well as ActiveMessageC, the basic data-link packet communication
+HIL.</p>
+</div>
+<div class="section">
+<h1><a id="communication-interfaces" name="communication-interfaces">2. Communication interfaces</a></h1>
+<p>Packet-level communication has three basic classes of interfaces.
+<em>Packet</em> interfaces are for accessing message fields and payloads.
+<em>Send</em> interfaces are for transmitting packets, and are
+distinguished by their addressing scheme.
+The <em>Receive</em> interface is for handling packet reception events.
+Finally, depending on whether the protocol has a dispatch identifier
+field, the Receive and Send interfaces may be parameterized in order
+to support multiple higher-level clients.</p>
+<div class="section">
+<h2><a id="packet-interfaces" name="packet-interfaces">2.1 Packet interfaces</a></h2>
+<p>The basic TinyOS 2.x message buffer type is message_t, which is
+described in TEP 111. message_t right-justifies data-link
+headers to the data payload so that higher-level components can
+pass buffers between different data link layers without having
+to move data payloads. This means that the data payload of a
+data link frame is always at a fixed offset of a message_t.</p>
+<p>Once protocols layer on top of each other, the data
+payload for components on top of the data link layer are
+no longer at a fixed offset. Where a component can put its
+header or data depends on what headers underlying components
+introduce. Therefore, in order to be able to find out where
+it can put its data, it must query the components below it.
+The Packet interface defines this mechanism:</p>
+<pre class="literal-block">
+interface Packet {
+  command void clear(message_t* msg);
+  command uint8_t payloadLength(message_t* msg);
+  command void setPayLoadLength(message_t* msg, uint8_t len);
+  command uint8_t maxPayloadLength();
+  command void* getPayload(message_t* msg, uint8_t len);
+}
+</pre>
+<p>A component can obtain a pointer to its data region within a packet by
+calling <tt class="docutils literal"><span class="pre">getPayload()</span></tt>. A call to this command includes the length
+the caller requires. The command <tt class="docutils literal"><span class="pre">maxPayloadLength</span></tt> returns the
+maximum length the payload can be: if the <tt class="docutils literal"><span class="pre">len</span></tt> parameter to
+<tt class="docutils literal"><span class="pre">getPayload</span></tt> is greater than the value <tt class="docutils literal"><span class="pre">maxPayloadLength</span></tt> would
+return, <tt class="docutils literal"><span class="pre">getPayload</span></tt> MUST return NULL.</p>
+<p>A component can set the payload length with <tt class="docutils literal"><span class="pre">setPayLoadLength.</span></tt> A
+component can obtain the size of the data region of packet in use with
+a call to <tt class="docutils literal"><span class="pre">payloadLength</span></tt>. As Send interfaces always include a
+length parameter in their send call, <tt class="docutils literal"><span class="pre">setPayLoadLength</span></tt> is not
+required for sending, and so is never called in common use
+cases. Instead, it is a way for queues and other packet buffering
+components to store the full state of a packet without requiring
+additional memory allocation.</p>
+<p>The distinction between <tt class="docutils literal"><span class="pre">payloadLength</span></tt> and <tt class="docutils literal"><span class="pre">maxPayloadLength</span></tt>
+comes from whether the packet is being received or sent. In the
+receive case, determining the size of the existing data payload is
+needed; in the send case, a component needs to know how much data it
+can put in the packet. By definition, the return value of
+<tt class="docutils literal"><span class="pre">payloadLength</span></tt> must be less than or equal to the return value of
+<tt class="docutils literal"><span class="pre">maxPayloadLength</span></tt>.</p>
+<p>The Packet interface assumes that headers have a fixed size. It is
+difficult to return a pointer into the data region when its position
+will only be known once the header values are bound.</p>
+<p>The <tt class="docutils literal"><span class="pre">clear</span></tt> command clears out all headers, footers, and metadata
+for lower layers. For example, calling <tt class="docutils literal"><span class="pre">clear</span></tt> on a routing
+component, such as CollectionSenderC[4]_, will clear out the
+collection headers and footers. Furthermore, CollectionSenderC will
+recursively call <tt class="docutils literal"><span class="pre">clear</span></tt> on the layer below it, clearing out the
+link layer headers and footers. Calling <tt class="docutils literal"><span class="pre">clear</span></tt> is typically
+necessary when moving a packet across two link layers. Otherwise, the
+destination link layer may incorrectly interpret metadata from the
+source link layer, and, for example, transmit the packet on the wrong
+RF channel. Because <tt class="docutils literal"><span class="pre">clear</span></tt> prepares a packet for a particular link
+layer, in this example correct code would call the command on the
+destination link layer, not the source link layer.</p>
+<p>Typically, an incoming call to the Packet interface of a protocol has
+an accompanying outgoing call to the Packet interface of the component
+below it. The one exception to this is the data link layer. For
+example, if there is a network that introduces 16-bit sequence numbers
+to packets, it might look like this:</p>
+<pre class="literal-block">
+generic module SequenceNumber {
+  provides interface Packet;
+  uses interface Packet as SubPacket;
+}
+implementation {
+  typedef nx_struct seq_header {
+    nx_uint16_t seqNo;
+  } seq_header_t;
+
+  enum {
+    SEQNO_OFFSET = sizeof(seq_header_t),
+  };
+
+  command void Packet.clear(message_t* msg) {
+    void* payload = call SubPacket.getPayload(msg, call SubPacket.maxPayloadLength());
+    call SubPacket.clear();
+    if (payload != NULL) {
+      memset(payload, sizeof(seq_header_t), 0);
+    }
+  }
+
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return SubPacket.payloadLength(msg) - SEQNO_OFFSET;
+  }
+
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    SubPacket.setPayloadLength(msg, len + SEQNO_OFFSET);
+  }
+
+  command uint8_t Packet.maxPayloadLength() {
+    return SubPacket.maxPayloadLength(msg) - SEQNO_OFFSET;
+  }
+
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    uint8_t* payload = call SubPacket.getPayload(msg, len + SEQNO_OFFSET);
+    if (payload != NULL) {
+      payload += SEQNO_OFFSET;
+    }
+    return payload;
+  }
+}
+</pre>
+<p>The above example is incomplete: it does not include the code for
+the send path that increments sequence numbers.</p>
+<p>In practice, calls to Packet are very efficient even if they
+pass through many components before reaching the data link
+layer. nesC's inlining means that in almost all cases
+there will not actually be any function calls, and since payload
+position and length calculations all use constant offsets,
+the compiler generally uses constant folding to generate a
+fixed offset.</p>
+<p>The Packet interface provides access to the one field all packet
+layers have, the data payload. Communication layers can add additional
+header and footer fields, and may need to provide access to these
+fields. If a packet communication component provides access to header
+and/or footer fields, it MUST do so through an interface. The interface
+SHOULD have a name of the form <em>XPacket</em>, where <em>X</em> is a name that
+describes the communication layer. For example, active message components
+provide both the Packet interface and the AMPacket interface. The latter
+has this signature:</p>
+<pre class="literal-block">
+interface AMPacket {
+  command am_addr_t address();
+  command am_addr_t destination(message_t* amsg);
+  command am_addr_t source(message_t* amsg);
+  command void setDestination(message_t* amsg, am_addr_t addr);
+  command void setSource(message_t* amsg, am_addr_t addr);
+  command bool isForMe(message_t* amsg);
+  command am_id_t type(message_t* amsg);
+  command void setType(message_t* amsg, am_id_t t);
+  command am_group_t group(message_t* amsg);
+  command void setGroup(message_t* amsg, am_group_t grp);
+  command am_group_t localGroup();
+}
+</pre>
+<p>The command address() returns the local AM address of the
+node. AMPacket provides accessors for its four fields, destination,
+source, type and group. It also provides commands to set these
+fields, for the same
+reason that Packet allows a caller to set the payload length.  Packet
+interfaces SHOULD provide accessors and mutators for all of their
+fields to enable queues and other buffering to store values in a
+packet buffer. Typically, a component stores these values in the
+packet buffer itself (where the field is), but when necessary it may
+use the metadata region of message_t or other locations.</p>
+<p>The group field refers to the AM group, a logical network identifier.
+Link layers will typically only signal reception for packets whose AM
+group matches the node's, which <tt class="docutils literal"><span class="pre">localGroup</span></tt> returns.</p>
+</div>
+<div class="section">
+<h2><a id="sending-interfaces" name="sending-interfaces">2.2 Sending interfaces</a></h2>
+<p>There are multiple sending interfaces, corresponding to different
+addressing modes. For example, address-free protocols, such as
+collection routing, provide the basic <tt class="docutils literal"><span class="pre">Send</span></tt> interface. Active
+message communication has a destination of an AM address, so
+it provides the <tt class="docutils literal"><span class="pre">AMSend</span></tt> interface.  This, for example, is the
+basic, address-free Send interface:</p>
+<pre class="literal-block">
+interface Send {
+  command error_t send(message_t* msg, uint8_t len);
+  command error_t cancel(message_t* msg);
+  event void sendDone(message_t* msg, error_t error);
+
+  command uint8_t maxPayloadLength();
+  command void* getPayload(message_t* msg, uint8_t len);
+}
+</pre>
+<p>while this is the AMSend interface:</p>
+<pre class="literal-block">
+interface AMSend {
+  command error_t send(am_addr_t addr, message_t* msg, uint8_t len);
+  command error_t cancel(message_t* msg);
+  event void sendDone(message_t* msg, error_t error);
+
+  command uint8_t maxPayloadLength();
+  command void* getPayload(message_t* msg, uint8_t len);
+}
+</pre>
+<p>Sending interfaces MUST include these four commands and one event.
+The duplication of some of the commands in Packet is solely for ease
+of use: <tt class="docutils literal"><span class="pre">maxPayloadLength</span></tt> and <tt class="docutils literal"><span class="pre">getPayload</span></tt> MUST behave
+identically as <tt class="docutils literal"><span class="pre">Packet.maxPayloadLength</span></tt> and <tt class="docutils literal"><span class="pre">Packet.getPayload.</span></tt>
+Their inclusion is so that components do not have to wire to
+both Packet and the sending interface for basic use cases.</p>
+<p>When called with a length that is too long for the underlying
+maximum transfer unit (MTU), the send command MUST return ESIZE.</p>
+<p>The <tt class="docutils literal"><span class="pre">Send</span></tt> and <tt class="docutils literal"><span class="pre">AMSend</span></tt> interfaces have an explicit queue of
+depth one. A call to <tt class="docutils literal"><span class="pre">send</span></tt> on either of these interfaces MUST
+return EBUSY if a prior call to <tt class="docutils literal"><span class="pre">send</span></tt> returned SUCCESS but no
+<tt class="docutils literal"><span class="pre">sendDone</span></tt> event has been signaled yet. More explicitly:</p>
+<pre class="literal-block">
+if (call Send.send(...) == SUCCESS &amp;&amp;
+    call Send.send(...) == SUCCESS) {
+   // This block is unreachable.
+}
+</pre>
+<p>Systems that need send queues have two options. They can
+use a QueueC (found in tos/system) to store pending packet pointers
+and serialize them onto sending interface, or they can introduce
+a new sending interface that supports multiple pending transmissions.</p>
+<p>The cancel command allows a sender to cancel the current transmission.
+A call to cancel when there is no pending sendDone event MUST return
+FAIL.  If there is a pending sendDone event and the cancel returns
+SUCCESS, then the packet layer MUST NOT transmit the packet and MUST
+signal sendDone with ECANCEL as its error code. If there is a pending
+sendDone event and cancel returns FAIL, then sendDone MUST occur as if
+the cancel was not called.</p>
+</div>
+<div class="section">
+<h2><a id="receive-interface" name="receive-interface">2.3 Receive interface</a></h2>
+<p>Receive is the interface for receiving packets. It has this signature:</p>
+<pre class="literal-block">
+interface Receive {
+  event message_t* receive(message_t* msg, void* payload, uint8_t len);
+}
+</pre>
+<p>The <tt class="docutils literal"><span class="pre">receive()</span></tt> event's <tt class="docutils literal"><span class="pre">payload</span></tt> parameter MUST be identical to
+what a call to the corresponding <tt class="docutils literal"><span class="pre">Packet.getPayload()</span></tt> would return,
+and the <tt class="docutils literal"><span class="pre">len</span></tt> parameter MUST be identical to the length that a call
+to <tt class="docutils literal"><span class="pre">Packet.getPayload</span></tt> would return. These parameters are for
+convenience, as they are commonly used by receive handlers, and their
+presence removes the need for a call to <tt class="docutils literal"><span class="pre">getPayload()</span></tt>. Unlike Send,
+Receive does not have a convenience <tt class="docutils literal"><span class="pre">getPayload</span></tt> call, because doing
+so prevents fan-in. As Receive has only a single event, users of
+Receive can be wired multiple times.</p>
+<p>Receive has a <em>buffer-swap</em> policy. The handler of the event MUST
+return a pointer to a valid message buffer for the signaler to
+use. This approach enforces an equilibrium between upper and lower
+packet layers. If an upper layer cannot handle packets as quickly as
+they are arriving, it still has to return a valid buffer to the lower
+layer. This buffer could be the <tt class="docutils literal"><span class="pre">msg</span></tt> parameter passed to it: it
+just returns the buffer it was given without looking at it. Following
+this policy means that a data-rate mismatch in an upper-level
+component will be isolated to that component. It will drop packets,
+but it will not prevent other components from receiving packets. If an
+upper layer did not have to return a buffer immediately, then when an
+upper layer cannot handle packets quickly enough it will end up
+holding all of them, starving lower layers and possibly preventing
+packet reception.</p>
+<p>A <em>user</em> of the Receive interface has three basic options when it
+handles a receive event:</p>
+<blockquote>
+<ol class="arabic simple">
+<li>Return <tt class="docutils literal"><span class="pre">msg</span></tt> without touching it.</li>
+<li>Copy some data out of <tt class="docutils literal"><span class="pre">payload</span></tt> and return <tt class="docutils literal"><span class="pre">msg</span></tt>.</li>
+<li>Store <tt class="docutils literal"><span class="pre">msg</span></tt> in its local frame and return a different <tt class="docutils literal"><span class="pre">message_t*</span></tt> for the lower layer to use.</li>
+</ol>
+</blockquote>
+<p>These are simple code examples of the three cases:</p>
+<pre class="literal-block">
+// Case 1
+message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+  return msg;
+}
+
+// Case 2
+uint16_t value;
+message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+  if (len &gt;= sizeof(uint16_t)) {
+    nx_uint16_t* nval = (nx_uint16_t*)payload;
+    value = *nval;
+  }
+  return msg;
+}
+
+//Case 3
+message_t buf;
+message_t* ptr = &amp;buf;
+message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+  message_t* tmp = ptr;
+  ptr = msg;
+  post processTask();
+  return tmp;
+}
+</pre>
+<p>Because of case 3), a lower layer MUST respect the buffer swap semantics
+and use the pointer returned from <tt class="docutils literal"><span class="pre">receive</span></tt>. The pointer passed as
+a parameter to <tt class="docutils literal"><span class="pre">receive</span></tt> MUST NOT be touched, used, or stored after
+the signaling of <tt class="docutils literal"><span class="pre">receive.</span></tt></p>
+</div>
+<div class="section">
+<h2><a id="dispatch" name="dispatch">2.4 Dispatch</a></h2>
+<p>A packet protocol MAY have a dispatch identifier. This generally manifests
+as the protocol component providing parameterized interfaces (rather than
+a single interface instance). A dispatch identifier allows multiple
+services to use a protocol independently. If a protocol provides a
+dispatch mechanism, then each dispatch identifier SHOULD correspond to
+a single packet format: if an identifier corresponds to multiple packet
+formats, then there is no way to disambiguate them. Packets whose internal
+structure depends on their fields (for example,
+a packet that has a control field which indicates which optional fields
+are present) do not pose such problems.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="hil-activemessagec" name="hil-activemessagec">3. HIL: ActiveMessageC</a></h1>
+<p>A platform MUST provide ActiveMessageC as a basic HIL to
+packet-level communication.  ActiveMessageC provides a best-effort,
+single-hop communication abstraction.  Every active message has a
+16-bit destination address and an 8-bit type. There is one reserved
+destination address, <tt class="docutils literal"><span class="pre">AM_BROADCAST_ADDR</span></tt>, which has the value
+of <tt class="docutils literal"><span class="pre">0xffff</span></tt>. ActiveMessageC has the following signature:</p>
+<pre class="literal-block">
+configuration ActiveMessageC {
+  provides {
+    interface Init;
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+</pre>
+<p>The Receive interface is for packets destined to the node, while
+the Snoop interface is for packets destined to other nodes. A
+packet is destined for a node if its destination AM address is
+either the AM broadcast address or an address associated with
+the AM stack. Different link layers have different snooping
+capabilities. The Snoop interface does not assume always-on
+listening, for example, in the case of a TDMA or RTS/CTS data
+link layer. By separating out these two interfaces, ActiveMessageC
+avoids the complications encountered in 1.x with regards to
+GenericComm vs. GenericCommPromiscuous.</p>
+<p>ActiveMessageC is usually just a configuration that has
+pass-through wiring to a chip-specific HAL active message
+implementation. The definition of ActiveMessageC is left
+to the platform for when a node has more than one
+radio. In this case, the platform decides how to map the
+basic packet abstraction to the hardware underneath. Approaches
+include choosing one radio or having some form of address-based
+dispatch.</p>
+</div>
+<div class="section">
+<h1><a id="am-services-amsenderc-amreceiverc-amsnooperc-amsnoopingreceiverc" name="am-services-amsenderc-amreceiverc-amsnooperc-amsnoopingreceiverc">4. AM Services: AMSenderC, AMReceiverC, AMSnooperC, AMSnoopingReceiverC</a></h1>
+<p>TinyOS 2.x provides four component single-hop communication
+virtualizations to applications:
+AMReceiverC, AMSnooperC, AMSnoopingReceiverC, and AMSenderC. Each is a
+generic component that takes an active message ID as a
+parameter. These components assume the existence of ActiveMessageC.</p>
+<div class="section">
+<h2><a id="dispatch-am-id-t" name="dispatch-am-id-t">4.1 Dispatch: <tt class="docutils literal"><span class="pre">am_id_t</span></tt></a></h2>
+<p>Active messages have an 8-bit type field, which allows multiple
+protocols to all use AM communication without conflicting. Following
+the guidelines for protocol dispatch identifiers, each
+am_id_t used in a network SHOULD have a single packet format, so
+that the am_id_t, combined with the packet contents, are sufficient
+to determine the exact packet format.</p>
+</div>
+<div class="section">
+<h2><a id="amreceiverc" name="amreceiverc">4.2 AMReceiverC</a></h2>
+<p>AMReceiverC has the following signature:</p>
+<pre class="literal-block">
+generic configuration AMReceiverC(am_id_t t) {
+  provides{
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+</pre>
+<p>AMReceiver.Receive.receive is signalled whenever the packet layer
+receives an active message of the corresponding AM type whose
+destination address is the local address or the broadcast
+address. Note that since Receive.receive swaps buffers, a program MUST
+NOT instantiate two AMReceivers with the same am_id_t and MUST NOT
+instantiate an AMReceiver and an AMSnoopingReceiver with the same
+am_id_t.</p>
+</div>
+<div class="section">
+<h2><a id="amsnooperc" name="amsnooperc">4.3 AMSnooperC</a></h2>
+<p>AMSnooper has an identical signature to AMReceiver:</p>
+<pre class="literal-block">
+generic configuration AMSnooperC(am_id_t t) {
+  provides{
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+</pre>
+<p>AMSnooper.Receive.receive is signalled whenever the packet layer
+receives an active message of the corresponding AM type whose
+destination address is neither to the local address nor the broadcast
+address. Note that since Receive.receive swaps buffers, a program MUST
+NOT instantiate two AMSnoopers with the same am_id_t and MUST NOT
+instantiate an AMSnooper and an AMSnoopingReceiver with the same
+am_id_t.</p>
+</div>
+<div class="section">
+<h2><a id="amsnoopingreceiverc" name="amsnoopingreceiverc">4.4 AMSnoopingReceiverC</a></h2>
+<p>AMSnoopingReceiverC has an identical signature to AMReceiverC:</p>
+<pre class="literal-block">
+generic configuration AMSnoopingReceiverC(am_id_t t) {
+  provides{
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+</pre>
+<p>AMSnoopingReceiverC.Receive.receive is signalled whenever the packet
+layer receives an active message of the corresponding AM type,
+regardless of destination address. Note that since Receive.receive
+swaps buffers, a program that instantiates an AMSnoopingReceiverC with
+a certain am_id_t MUST NOT instantiate another AMSnoopingReceiverC,
+AMSnooperC, or AMReceiverC with the same am_id_t.</p>
+</div>
+<div class="section">
+<h2><a id="amsenderc" name="amsenderc">4.5 AMSenderC</a></h2>
+<p>AMSenderC has the following signature:</p>
+<pre class="literal-block">
+generic configuration AMSenderC(am_id_t AMId) {
+  provides {
+    interface AMSend;
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+</pre>
+<p>Because this is a send virtualization, AMSenderC.AMSend.send returns
+EBUSY only if there is a send request outstanding on this particular
+AMSenderC. That is, each AMSenderC has a queue of depth one. The exact
+order in which pending AMSenderC requests are serviced is undefined,
+but it MUST be fair, where fair means that each client with outstanding
+packets receives a reasonable approximation of an equal share of the
+available transmission bandwidth.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="power-management-and-local-address" name="power-management-and-local-address">5. Power Management and Local Address</a></h1>
+<p>In addition to standard datapath interfaces for sending and
+receiving packets, an active message layer also has control interfaces.</p>
+<div class="section">
+<h2><a id="power-management" name="power-management">5.1 Power Management</a></h2>
+<p>The communication virtualizations do not support power management.
+ActiveMessageC provides SplitControl for explicit power control.
+For packet communication to operate properly, a component in an
+application has to call ActiveMessageC.SplitControl.start().
+The HAL underneath ActiveMessageC  MAY employ power management
+techniques, such as TDMA scheduling or low power listening, when
+&quot;on.&quot;</p>
+</div>
+<div class="section">
+<h2><a id="local-active-message-address" name="local-active-message-address">5.2 Local Active Message Address</a></h2>
+<p>An application can change ActiveMessageC's local AM address
+at runtime. This will change which packets a node receives and
+the source address it embeds in packets. To change the local AM
+address at runtime, a component can wire to the component
+<tt class="docutils literal"><span class="pre">ActiveMessageAddressC</span></tt>. This component only changes the
+AM address of the default radio stack (AMSenderC, etc.); if
+a radio has multiple stacks those may have other components
+for changing their addresses in a stack-specific fashion.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="hal-requirements" name="hal-requirements">5. HAL Requirements</a></h1>
+<p>A radio chip <em>X</em> MUST have a packet abstraction with the following
+signature:</p>
+<pre class="literal-block">
+provides interface Init;
+provides interface SplitControl;
+provides interface AMSend[am_id_t type];
+provides interface Receive[am_id_t type];
+provides interface Receive as Snoop[am_id_t type];
+provides interface Packet;
+provides interface AMPacket;
+provides interface PacketAcknowledgments;
+</pre>
+<p>The component SHOULD be named <em>XActiveMessageC</em>, where <em>X</em> is
+the name of the radio chip. The component MAY have additional interfaces.
+These interfaces can either be chip-specific or chip-independent.</p>
+</div>
+<div class="section">
+<h1><a id="message-t" name="message-t">6. message_t</a></h1>
+<p>Active messages are a basic single-hop packet abstraction. Therefore,
+following TEP 111 <a class="footnote-reference" href="#id8" id="id4" name="id4">[3]</a>, all data link and active message headers
+MUST be in the <tt class="docutils literal"><span class="pre">message_header_t</span></tt> structure of message_t. This ensures
+that an active message received from one data link layer (e.g., the radio)
+can be passed to another data link layer (e.g., the UART) without
+shifting the data payload. This means that the <tt class="docutils literal"><span class="pre">message_header_t</span></tt> must
+include all data needed for AM fields, which might introduce headers
+in addition to those of the data link. For example, this is an example
+structure for a CC2420 (802.15.4) header:</p>
+<pre class="literal-block">
+typedef nx_struct cc2420_header_t {
+  nx_uint8_t length;
+  nx_uint16_t fcf;
+  nx_uint8_t dsn;
+  nx_uint16_t destpan;
+  nx_uint16_t dest;
+  nx_uint16_t src;
+  nx_uint8_t type;
+} cc2420_header_t;
+</pre>
+<p>The first six fields (length through src) are all 802.15.4 headers. The
+type field, however, has been added to the header structure in order
+to support AM dispatch.</p>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">7. Implementation</a></h1>
+<p>The following files in <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/system</span></tt> provide reference
+implementations of the abstractions described in this TEP.</p>
+<blockquote>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">AMSenderC.nc</span></tt>, <tt class="docutils literal"><span class="pre">AMReceiverC.nc</span></tt>, <tt class="docutils literal"><span class="pre">AMSnooperC.nc</span></tt>,
+and <tt class="docutils literal"><span class="pre">AMSnoopingReceiverC.nc</span></tt> are implementations of
+virtualized AM services.</li>
+<li><tt class="docutils literal"><span class="pre">AMQueueP</span></tt> provides a send queue of <em>n</em> entries for <em>n</em>
+AMSenderC clients, such that each client has a dedicated entry.</li>
+<li><tt class="docutils literal"><span class="pre">AMQueueImplP</span></tt> is the underlying queue implementation,
+which is reusable for different clients (it is also used
+in the serial stack <a class="footnote-reference" href="#id9" id="id5" name="id5">[4]</a>).</li>
+<li><tt class="docutils literal"><span class="pre">AMQueueEntryP</span></tt> sits on top of <tt class="docutils literal"><span class="pre">AMQueueP</span></tt> and stores
+the parameters to <tt class="docutils literal"><span class="pre">AMSend.send</span></tt> in an outstanding
+packet with the <tt class="docutils literal"><span class="pre">AMPacket</span></tt> interface.</li>
+</ul>
+</blockquote>
+<p>The following files in <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/interfaces</span></tt> contain
+example implementations of packet protocol interfaces:</p>
+<blockquote>
+<ul>
+<li><p class="first"><tt class="docutils literal"><span class="pre">Packet.nc</span></tt> is the basic interface that almost all
+packet protocols provide.</p>
+</li>
+<li><dl class="first docutils">
+<dt><tt class="docutils literal"><span class="pre">Send.nc</span></tt> is the transmission interface for address-free</dt>
+<dd><p class="first last">protocols.</p>
+</dd>
+</dl>
+</li>
+<li><dl class="first docutils">
+<dt><tt class="docutils literal"><span class="pre">AMSend.nc</span></tt> is the transmission interface for AM address</dt>
+<dd><p class="first last">send protocols.</p>
+</dd>
+</dl>
+</li>
+<li><p class="first"><tt class="docutils literal"><span class="pre">AMPacket.nc</span></tt> is the packet interface for AM-specific
+fields.</p>
+</li>
+</ul>
+</blockquote>
+<p>An active messaging implementation for the CC2420 radio chip
+can be found in <tt class="docutils literal"><span class="pre">tos/chips/CC2420/CC2420ActiveMessageC.nc</span></tt>.
+The micaz platform and telos family have an <tt class="docutils literal"><span class="pre">ActiveMessageC.nc</span></tt>
+which exports the interfaces of <tt class="docutils literal"><span class="pre">CC2420ActiveMessageC</span></tt>.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">8. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Computer Science Laboratory</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">9. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id6" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="id6">[1]</a></td><td>The MintRoute protocol. <tt class="docutils literal"><span class="pre">tinyos-1.x/tos/lib/MintRoute</span></tt>. Also, A. Woo, T. Tong, and D. Culler. &quot;Taming the Underlying Challenges of Reliable Multihop Routing in Sensor Networks.&quot; SenSys 2003.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id7" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="id7">[2]</a></td><td>Tiny AGgregation, one protocol of the TinyDB system.  <tt class="docutils literal"><span class="pre">tinyos-1.x/tos/lib/TinyDB</span></tt>. Also, S. Madden and M. Franklin and J. Hellerstein and W. Hong. &quot;TinyDB: An Acquisitional Query Processing System for Sensor Networks.&quot; Transactions on Database Systems (TODS) 2005.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id8" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id8">[3]</a></td><td><em>(<a class="fn-backref" href="#id3">1</a>, <a class="fn-backref" href="#id4">2</a>)</em> TEP 111: message_t.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id9" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id5" name="id9">[4]</a></td><td>TEP 113: Serial Communication.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<meta name="author" content="Phil Buonadonna, Jonathan Hui" />
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+<div class="document" id="low-level-i-o">
+<h1 class="title">Low-Level I/O</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">117</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Phil Buonadonna, Jonathan Hui</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>The memo documents the TinyOS 2.x interfaces used for controlling
+digital IO functionality and digital interfaces.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>The canonical TinyOS device is likely to have a variety of digital
+interfaces. These interfaces may be divided into two broad
+categories. The first are general purpose digital I/O lines (pins) for
+individual digital signals at physical pins on a chip or platform. The
+second are digital I/O interfaces that have predefined communication
+protocol formats. The three buses covered in this document are the
+Serial Peripheral Interface (SPI), the Inter-Integrated Circuit (I2C)
+or Two-Wire interface, and the Universal Asynchronous
+Receiver/Transmitter (UART) interface. While there are likely other
+bus formats, we presume SPI, I2C, and UART to have the largest
+coverage.</p>
+<p>This memo documents the interfaces used for pins and the three buses.</p>
+</div>
+<div class="section">
+<h1><a id="pins" name="pins">2. Pins</a></h1>
+<p>General Purpose I/O (GPIO) pins are single, versatile digital I/O
+signals individually controllable on a particular chip or
+platform. Each GPIO can be placed into either an input mode or an
+output mode. On some platforms a third 'tri-state' mode may exist, but
+this functionality is platform specific and will not be covered in
+this document.</p>
+<p>On many platforms, a physical pin may function as either a digital
+GPIO or another special function I/O such. Examples include ADC I/O or
+a bus I/O. Interfaces to configure the specific function of a pin are
+platform specific.</p>
+<p>The objective of the interfaces described here is not to attempt to
+cover all possibilities of GPIO functionality and features, but to
+distill down to a basis that may be expected on most platforms.</p>
+<dl class="docutils">
+<dt>In input mode, we assume the following capabilities:</dt>
+<dd><ul class="first last simple">
+<li>The ability to arbitrarily sample the pin</li>
+<li>The ability to generate an interrupt/event from either a rising edge or falling edge digital signal.</li>
+</ul>
+</dd>
+<dt>In output mode, we assume the following capabilities:</dt>
+<dd><ul class="first last simple">
+<li>An I/O may be individually cleared (low) or set (hi)</li>
+</ul>
+</dd>
+</dl>
+<p>Platform that provide GPIO capabilities MUST provide the following HIL
+interfaces:</p>
+<blockquote>
+<ul class="simple">
+<li>GeneralIO</li>
+<li>GpioInterrupt</li>
+</ul>
+</blockquote>
+<p>Platforms MAY provide the following capture interface.</p>
+<blockquote>
+<ul class="simple">
+<li>GpioCapture</li>
+</ul>
+</blockquote>
+<div class="section">
+<h2><a id="generalio" name="generalio">2.1 GeneralIO</a></h2>
+<p>The GeneralIO HIL interface is the fundamental mechanism for controlling a
+GPIO pin. The interface provides a mechanism for setting the pin mode
+and reading/setting the pin value. The toggle function switches the
+output state to the opposite of what it currently is.</p>
+<p>Platforms with GPIO functionality MUST provide this interface. It
+SHOULD be provided in a component named GeneralIOC, but MAY be
+provided in other components as needed.</p>
+<pre class="literal-block">
+interface GeneralIO
+{
+  async command void set();
+  async command void clr();
+  async command void toggle();
+  async command bool get();
+  async command void makeInput();
+  async command bool isInput();
+  async command void makeOutput();
+  async command bool isOutput();
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="gpiointerrupt" name="gpiointerrupt">2.2 GpioInterrupt</a></h2>
+<p>The GPIO Interrupt HIL interface provides baseline event control for a
+GPIO pin. It provides a mechanism to detect a rising edge OR a falling
+edge. Note that calls to enableRisingEdge and enableFallingEdge are
+NOT cumulative and only one edge may be detected at a time. There may
+be other edge events supported by the platform which MAY be exported
+through a platform specific HAL interface.</p>
+<pre class="literal-block">
+interface GpioInterrupt {
+
+  async command error_t enableRisingEdge();
+  async command bool isRisingEdgeEnabled();
+  async command error_t enableFallingEdge();
+  async command bool isFallingEdgeEnabled();
+  async command error_t disable();
+  async event void fired();
+
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="gpiocapture" name="gpiocapture">2.3 GpioCapture</a></h2>
+<p>The GpioCapture interface provides a means of associating a timestamp
+with a GPIO event. Platforms MAY provide this interface.</p>
+<p>Some platforms may have hardware support for such a feature. Other
+platforms may emulate this capability using the SoftCaptureC
+component. The interface makes not declaration of the precision or
+accuracy of the timestamp with respect to the associated GPIO
+event.</p>
+<pre class="literal-block">
+interface GpioCapture {
+
+  async command error_t captureRisingEdge();
+  async command bool isRisingEdgeEnabled();
+  async command error_t captureFallingEdge();
+  async command bool isFallingEdgeEnabled();
+  async event void captured(uint16_t time);
+  async command void disable();
+
+}
+</pre>
+</div>
+</div>
+<div class="section">
+<h1><a id="buses" name="buses">3. Buses</a></h1>
+<p>Bus operations may be divided into two categories: data and
+control. The control operations of a particular bus controller are
+platform specific and not covered here. Instead, we focus on the data
+interfaces at the HIL level that are expected to be provided.</p>
+<div class="section">
+<h2><a id="serial-peripheral-interface" name="serial-peripheral-interface">3.1 Serial Peripheral Interface</a></h2>
+<p>The Serial Peripheral Interface (SPI) is part of a larger class of
+Synchronous Serial Protocols.  The term SPI typically refers to the
+Motorola SPI protocols. Other protocols include the National
+Semiconductor Microwire, the TI Synchronous Serial Protocol and the
+Programmable Serial Protocol. The dataside interfaces here were
+developed for the Motorola SPI format, but may work for others.</p>
+<p>Platforms supporting SPI MUST provide these interfaces.</p>
+<p>Of note, the interfaces DO NOT define the behavior of any chip select
+or framing signals. These SHOULD determined by platform specific HAL
+interfaces and implementations.</p>
+<p>The interface is split into a synchronous byte level and an
+asynchronous packet level interface. The byte level interface is
+intended for short transactions (3-4 bytes) on the SPI bus.</p>
+<pre class="literal-block">
+interface SpiByte {
+  async command uint8_t write( uint8_t tx );
+}
+</pre>
+<p>The packet level interface is for larger bus transactions. The
+pointer/length interface permits use of hardware assist such as
+DMA.</p>
+<pre class="literal-block">
+interface SpiPacket {
+  async command error_t send( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len );
+  async event void sendDone( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len,
+                             error_t error );
+}
+</pre>
+</div>
+<div class="section">
+<h2><a id="i2c" name="i2c">3.2 I2C</a></h2>
+<p>The Inter-Integrated Circuit (I2C) interface is another type of
+digital bus that is often used for chip-to-chip communication. It is
+also known as a two-wire interface.</p>
+<p>The I2CPacket interface provides for asynchronous Master mode
+communication on an I2C with application framed packets. Individual
+I2C START-STOP events are controllable which allows the using
+component to do multiple calls within a single I2C transaction and
+permits multiple START sequences</p>
+<p>Platforms providing I2C capability MUST provide this interface.</p>
+<pre class="literal-block">
+interface I2CPacket&lt;addr_size&gt; {
+  async command error_t read(i2c_flags_t flags, uint16_t addr, uint8_t length, u int8_t* data);
+  async event void readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data);
+  async command error_t write(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data);
+  async event void writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
+}
+</pre>
+<p>The interface is typed according to the addressing space the
+underlying implementation supports.  Valid type values are below.</p>
+<pre class="literal-block">
+TI2CExtdAddr - Interfaces uses the extended (10-bit) addressing mode.
+TI2CBasicAddr - Interfaces uses the basic (7-bit) addressing mode.
+</pre>
+<p>The i2c_flags_t values are defined below. The flags define the
+behavior of the operation for the call being made. These values may be
+ORed together.</p>
+<pre class="literal-block">
+I2C_START    - Transmit an I2C STOP at the beginning of the operation.
+I2C_STOP     - Transmit an I2C STOP at the end of the operation. Cannot be used
+               with the I2C_ACK_END flag.
+I2C_ACK_END  - ACK the last byte sent from the buffer. This flags is only valid
+               a write operation. Cannot be used with the I2C_STOP flag.
+</pre>
+</div>
+<div class="section">
+<h2><a id="uart" name="uart">3.3 UART</a></h2>
+<p>The Universal Asynchronous Receiver/Transmitter (UART) interface is a
+type of serial interconnect. The interface is &quot;asynchronous&quot; since it
+recovers timing from the data stream itself, rather than a separate
+control stream. The interface is split into an asynchronous multi-byte
+level interface and a synchronous single-byte level interface.</p>
+<p>The multi-byte level interface, UartStream, provides a split-phase
+interface for sending and receiving one or more bytes at a time. When
+receiving bytes, a byte-level interrupt can be enabled or an interrupt
+can be generated after receiving one or more bytes. The latter is
+intended to support use cases where the number of bytes to receive is
+already known. If the byte-level receive interrupt is enabled, the
+receive command MUST return FAIL. If a multi-byte receive interrupt is
+enabled, the enableReceiveInterrupt command MUST return FAIL.</p>
+<pre class="literal-block">
+interface UartStream {
+  async command error_t send( uint8_t* buf, uint16_t len );
+  async event void sendDone( uint8_t* buf, uint16_t len, error_t error );
+
+  async command error_t enableReceiveInterrupt();
+  async command error_t disableReceiveInterrupt();
+  async event void receivedByte( uint8_t byte );
+
+  async command error_t receive( uint8_t* buf, uint8_t len );
+  async event void receiveDone( uint8_t* buf, uint16_t len, error_t error );
+}
+</pre>
+<p>The single-byte level interface, UartByte, provides a synchronous
+interface for sending and receiving a single byte. This interface is
+intended to support use cases with short transactions. Because UART is
+asynchronous, the receive command takes a timeout which represents
+units in byte-times, after which the command returns with an
+error. Note that use of this interface is discouraged if the UART baud
+rate is low.</p>
+<pre class="literal-block">
+interface UartByte {
+  async command error_t send( uint8_t byte );
+  async command error_t receive( uint8_t* byte, uint8_t timeout );
+}
+</pre>
+</div>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">4. Implementation</a></h1>
+<p>Example implementations of the pin interfaces can be found in tos/chips/msp430/pins,
+tos/chips/atm128/pins, and tos/chips/pxa27x/gpio.</p>
+<p>Example implementations of the SPI interfaces can be found in tos/chips/msp430/usart,
+tos/chips/atm128/spi, and tos/chips/pxa27x/ssp.</p>
+<p>Example implementations of the I2C interfaces can be found in tos/chips/msp430/usart,
+tos/chips/atm128/i2c, and tos/chips/pxa27x/i2c.</p>
+<p>Example implementations of the UART interfaces can be found in tos/chips/msp430/usart,
+tos/chips/atm128/uart/ and tos/chips/pxa27x/uart.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">5. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Phil Buonadonna</div>
+<div class="line">Arch Rock Corporation</div>
+<div class="line">657 Mission St. Ste 600</div>
+<div class="line">San Francisco, CA 94105-4120</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 415 692-0828 x2833</div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Jonathan Hui</div>
+<div class="line">Arch Rock Corporation</div>
+<div class="line">657 Mission St. Ste 600</div>
+<div class="line">San Francisco, CA 94105-4120</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 415 692-0828 x2835</div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">6. Citations</a></h1>
+<table class="docutils citation" frame="void" id="tep113" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep113">[tep113]</a></td><td>TEP 113: Serial Communication.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<title>Dissemination of Small Values</title>
+<meta name="author" content="Philip Levis and Gilman Tolle" />
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+<div class="document" id="dissemination-of-small-values">
+<h1 class="title">Dissemination of Small Values</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">118</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Net2 Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Philip Levis and Gilman Tolle</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>The memo documents the interfaces, components, and semantics for
+disseminating small (smaller than a single packet payload) pieces of
+data in TinyOS 2.x.  Dissemination establishes eventual consistency
+across the entire network on a shared variable and tells an
+application when the variable changes. Common uses of this mechanism
+include network reconfiguration and reprogramming.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>Dissemination is a service for establishing eventual consistency on a
+shared variable. Every node in the network stores a copy of this
+variable. The dissemination service tells nodes when the value
+changes, and exchanges packets so it will reach eventual consistency
+across the network. At any given time, two nodes may disagree, but
+over time the number of disagreements will shrink and the network will
+converge on a single value.</p>
+<p>Eventual consistency is robust to temporary disconnections or high
+packet loss. Unlike flooding protocols, which are discrete efforts
+that terminate and not reach consistency, dissemination assures that
+the network will reach consensus on the value as long as it is not
+disconnected.</p>
+<p>Depending on the size of the data item, dissemination protocols can
+differ greatly: efficiently disseminating tens of kilobytes of a
+binary requires a different protocol than disseminating a two-byte
+configuration constant. Looking more deeply, however, there are
+similarities. Separating a dissemination protocol into two parts ---
+control traffic and data traffic --- shows that while the data traffic
+protocols are greatly dependent on the size of the data item, the
+control traffic tends to be the same or very similar. For example, the
+Deluge binary reprogramming service disseminates metadata about the
+binaries. When nodes learn the disseminated metadata differs from the
+metadata of their local binary, they know they either have a bad
+binary or need a new one.</p>
+<p>Novelty is an explicit consideration in dissemination's consistency
+model: it seeks to have every node agree on the most recent version of
+the variable. In this way, a node can prompt the network to reach
+consistency on a new value for a variable by telling the network it is
+newer. If several nodes all decide to update the variable,
+dissemination ensures that the network converges on a single one of
+the updates.</p>
+<p>Consistency does not mean that every node will see every possible
+value the variable takes: it only means that the network will
+eventually agree on what the newest is. If a node is disconnected from
+a network and the network goes through eight updates to a shared
+variable, when it rejoins the network it will only see the most
+recent.</p>
+<p>Being able to disseminate small values into a network is a useful
+building block for sensornet applications. It allows an administrator
+to inject small programs, commands, and configuration constants.  For
+example, installing a small program through the entire network can be
+cast as the problem of establishing consistency on a variable that
+contains the program.</p>
+<p>The rest of this document describes a set of components and interfaces
+for a dissemination service included in TinyOS 2.0. This service only
+handles small values that can fit in a single packet. Larger values
+require different interfaces and abstractions.</p>
+</div>
+<div class="section">
+<h1><a id="dissemination-interfaces" name="dissemination-interfaces">2. Dissemination interfaces</a></h1>
+<p>Small-value dissemination has two interfaces: DisseminationValue and
+DisseminationUpdate. The former is for consumers of a disseminated
+value, the latter is for producers. They are as follows:</p>
+<pre class="literal-block">
+interface DisseminationValue&lt;t&gt; {
+  command const t* get();
+  command void set(const t*);
+  event void changed();
+}
+
+interface DisseminationUpdate&lt;t&gt; {
+  command void change(t* newVal);
+}
+</pre>
+<p>These interfaces assume that the dissemination service allocates space
+to store the variable. In that way, multiple components can all access
+and share the same variable that the dissemination service establishes
+consistency over. A consumer can obtain a const pointer to the data
+through DissemnationValue.get(). It MUST NOT store this pointer, as it
+may not be constant across updates.  Additionally, doing so wastes
+RAM, as it can be easily re-obtained.  The service signals a changed()
+event whenever the dissemination value changes, in case the consumer
+needs to perform some computation on it or take some action.</p>
+<p>DisseminationValue has a command, ''set'', which allows a node to
+change its local copy of a value without establishing consistency.
+This command exists so a node can establish an initial value for the
+variable. A node MUST NOT call ''set'' after it has handled a
+''changed'' event, or the network may become inconsistent. If a node
+has received an update or a client has called ''change'' then set MUST
+NOT apply its new value.</p>
+<p>DisseminationUpdate has a single command, ''change'', which takes a
+pointer as an argument. This pointer is not stored: a provider of
+DisseminationUpdate MUST copy the data into its own allocated memory.
+DisseminationValue MUST signal ''changed'' in response to a
+call to ''change''.</p>
+<p>A dissemination protocol MUST reach consensus on the newest value in a
+network (assuming the network is connected).  Calling change
+implicitly makes the data item &quot;newer&quot; so that it will be disseminated
+to every node in the network. This change is local, however. If a node
+that is out-of-date also calls change, the new value might not
+disseminate, as other nodes might already have a newer value. If two
+nodes call change at the same time but pass different values, then the
+network might reach consensus when nodes have different values. The
+dissemination protocol therefore MUST have a tie-breaking mechanism,
+so that eventually every node has the same data value.</p>
+</div>
+<div class="section">
+<h1><a id="dissemination-service" name="dissemination-service">3 Dissemination Service</a></h1>
+<p>A dissemination service MUST provide one component, DisseminatorC,
+which has the following signature:</p>
+<pre class="literal-block">
+generic configuration DisseminatorC(typedef t, uint16_t key) {
+  provides interface DisseminationValue &lt;t&gt;;
+  provides interface DisseminationUpdate &lt;t&gt;;
+}
+</pre>
+<p>The t argument MUST be able to fit in a single message_t [TEP111]
+after considering the headers that the dissemination protocol
+introduces.  A dissemination implementation SHOULD have a compile
+error if a larger type than this is used.</p>
+<p>As each instantiation of DisseminatorC probably allocates storage and
+generates code, if more than one component wants to share a
+disseminated value then they SHOULD encapsulate the value in a
+non-generic component that can be shared. E.g.:</p>
+<pre class="literal-block">
+configuration DisseminateTxPowerC {
+  provides interface DisseminationValue&lt;uint8_t&gt;;
+}
+implementation {
+  components new DisseminatorC(uint8_t, DIS_TX_POWER);
+  DisseminationValue = DisseminatorC;
+}
+</pre>
+<p>Two different instances of DisseminatorC MUST NOT share the same value
+for the <tt class="docutils literal"><span class="pre">key</span></tt> argument.</p>
+</div>
+<div class="section">
+<h1><a id="dissemination-keys" name="dissemination-keys">4 Dissemination Keys</a></h1>
+<p>One issue that comes up when using these interfaces is the selection
+of a key for each value. On one hand, using unique() is easy, but this
+means that the keyspaces for two different compilations of the same
+program might be different and there's no way to support a network
+with more than one binary. On the other hand, having a component
+declare its own key internally means that you can run into key
+collisions that can't be resolved. In the middle, an application can
+select keys on behalf of other components.</p>
+<p>Ordinarily, dissemination keys can be generated by unique or selected
+by hand. However, these defined keys can be overridden by an
+application-specific header file. The unique namespace and the static
+namespace are separated by their most significant bit. A component
+author might write something like this:</p>
+<pre class="literal-block">
+#include &lt;disseminate_keys.h&gt;
+configuration SomeComponentC {
+  ...
+}
+implementation {
+#ifndef DIS_SOME_COMPONENT_KEY
+  enum {
+    DIS_SOME_COMPONENT_KEY = unique(DISSEMINATE_KEY) + 1 &lt;&lt; 15;
+  };
+#endif
+  components SomeComponentP;
+  components new DisseminatorC(uint8_t, DIS_SOME_COMPONENT_KEY);
+  SomeComponentP.ConfigVal -&gt; DisseminatorC;
+}
+</pre>
+<p>To override, you can then make a disseminate_keys.h in your app
+directory:</p>
+<pre class="literal-block">
+#define DIS_SOME_COMPONENT_KEY 32
+</pre>
+<p>Even with careful key selection, two incompatible binaries with
+keyspace collisions may end up in the same network. If this happens, a
+GUID that's unique to a particular binary MAY be included in the
+protocol. The GUID enables nodes to detect versions from other
+binaries and not store them. This GUID won't be part of the external
+interface, but will be used internally.</p>
+</div>
+<div class="section">
+<h1><a id="more-complex-dissemination" name="more-complex-dissemination">5. More Complex Dissemination</a></h1>
+<p>An application can use this low-level networking primitive to build
+more complex dissemination systems. For example, if you want have a
+dissemination that causes only nodes which satisfy a predicate to
+apply a change, you can do that by making the &lt;t&gt; a struct that stores
+a predicate and data value in it, and layering the predicate
+evaluation on top of the above interfaces.</p>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">6. Implementation</a></h1>
+<p>Two implementations of this TEP exist and can be found in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/lib/net</span></tt>. The first, Drip, can be found in
+''tinyos-2.x/tos/lib/net/drip''. The second, DIP, can be found in
+''tinyos-2.x/tos/lib/net/dip''. Both implementations are based on the
+Trickle algorithm[2]_. Drip is a simple, basic implementation that
+establishes an independent trickle for each variable. DIP uses a more
+complex approach involving hash trees, such that it is faster,
+especially when the dissemination service is maintaining many
+variables[3]_. This complexity, however, causes DIP to use more
+program memory.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">6. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Computer Science Laboratory</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Gilman Tolle</div>
+<div class="line">2168 Shattuck Ave.</div>
+<div class="line">Arched Rock Corporation</div>
+<div class="line">Berkeley, CA 94704</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 510 981 8714</div>
+<div class="line">email - <a class="reference" href="mailto:gtolle&#64;archedrock.com">gtolle&#64;archedrock.com</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">7. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id1">[1]</a></td><td>TEP 111: message_t.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id2">[2]</a></td><td>Philip Levis, Neil Patel, David Culler, and Scott Shenker. &quot;Trickle: A Self-Regulating Algorithm for Code Maintenance and Propagation in Wireless Sensor Networks.&quot; In Proceedings of the First USENIX/ACM Symposium on Networked Systems Design and Implementation (NSDI 2004).</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id3" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id3">[3]</a></td><td>Kaisen Lin and Philip Levis. &quot;Data Discovery and Dissemination with DIP.&quot; In Proceedings of the Proceedings of the Seventh International Conference on Information Processing in Wireless Sensor Networks (IPSN), 2008.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<body>
+<div class="document" id="collection">
+<h1 class="title">Collection</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">119</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Net2 Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">&gt; 2.1</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Rodrigo Fonseca, Omprakash Gnawali, Kyle Jamieson, and Philip Levis</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">09-Feb-2006</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>The memo documents the interfaces, components, and semantics used by
+the collection protocols in TinyOS 2.x. Collection provides
+best-effort, multihop delivery of packets to one of a set of
+collection points.  There may be multiple collection points in a
+network, and in this case the semantics are <em>anycast</em> delivery to at
+least one of the collection points. A node sending a packet does not
+specify which of the collection points the packet is destined to.  The
+union of the paths from each node to one or more of the collection
+points forms a set of trees, and in this document we assume that
+collection points are the roots of these trees.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>Collecting data at a base station is a common requirement of sensor
+network applications. The general approach used is to build one or
+more collection trees, each of which is rooted at a base station. When
+a node has data which needs to be collected, it sends the data up the
+tree, and it forwards collection data that other nodes send to
+it. Sometimes, depending on the form of data collection, systems need
+to be able to inspect packets as they go by, either to gather
+statistics, compute aggregates, or suppress redundant transmissions.</p>
+<p>Collection provides best-effort, multihop delivery of packets to one
+of a network's tree roots: it is an <em>anycast</em> protocol. The
+semantics are that the protocol will make a reasonable effort to
+deliver the message to at least one of the roots in the network. By
+picking a parent node, a node implementing the collection protocol
+inductively joins the tree its parent has joined.  Delivery is best
+effort, and there can be duplicates delivered to one or more roots.
+Collection provides no ordering or real-time guarantees, although
+specific implementations may extend the basic functionality to do
+so.</p>
+<p>Given the limited state that nodes can store and a general need for
+distributed tree building algorithms, collection protocols encounter
+several challenges. These challenges are not unique to collection
+protocols. Instead, they represent a subset of common networking
+algorithmic edge cases that generally occur in wireless routing:</p>
+<blockquote>
+<ul class="simple">
+<li>Loop detection, for when a node selects one of its descendants as
+a next hop.</li>
+<li>Duplicate suppression, detecting and dealing with lost
+acknowledgments that can cause packets to replicate in the
+network, wasting capacity.</li>
+<li>Link estimation, evaluating the link quality to single-hop
+neighbors.</li>
+<li>Self-interference, preventing forwarding packets along the route
+from introducing interference for subsequent packets.</li>
+</ul>
+</blockquote>
+<p>While collection protocols can take a wide range of approaches to
+address these challenges, the programming interface they provide is
+typically independent of these details. The rest of this document
+describes a set of components and interfaces for collection services.</p>
+</div>
+<div class="section">
+<h1><a id="collection-interfaces" name="collection-interfaces">2. Collection interfaces</a></h1>
+<p>A node can perform four different roles in collection: sender (or
+source), snooper, in-network processor, and receiver (or
+root). Depending on their role, the nodes use different interfaces to
+interact with the collection component.</p>
+<p>The collection infrastructure can be multiplexed among independent
+applications, by means of a collection identifier. The collection
+identifier is used to identify different data traffic at the sender,
+intermediate-nodes, or the receiver, much like port number in TCP. All
+data traffic, regardless of the collection identifier, use the same
+routing topology.</p>
+<p>The nodes that generate data to be sent to the root are <em>senders</em>.
+Senders use the Send interface [<a class="reference" href="#id1">1</a>] to send data to the root of
+the collection tree.  The collection identifier is specified as a
+parameter to Send during instantiation.</p>
+<p>The nodes that overhear messages in transit are <em>snoopers</em>. The
+snoopers use the Receive interface [<a class="reference" href="#id1">1</a>] to receive a snooped
+message. The collection identifier is specified as a parameter
+to Receive during instantiation.</p>
+<p>The nodes can process a packet that is in transit. These in-network
+<em>processors</em> use the Intercept interface to receive and update a
+packet. The collection identifier is specified as a parameter to
+Intercept during instantiation. The Intercept interface has this
+signature:</p>
+<pre class="literal-block">
+interface Intercept {
+  event bool forward(message_t* msg, void* payload, uint8_t len);
+}
+</pre>
+<p>Intercept has a single event, Intercept.forward(). A collection
+service SHOULD signal this event when it receives a packet to forward.
+If the return value of the event is FALSE, then the collection layer
+MUST NOT forward the packet. The Intercept interface allows a higher
+layer to inspect the internals of a packet and suppress it if needed.
+Intercept can be used for duplicate suppression, aggregation, and
+other higher-level services. As the handler of Intercept.forward()
+does not receive ownership of the packet, it MUST NOT modify the
+packet and MUST copy data out of the packet which it wishes to use
+after the event returns.</p>
+<p>Root nodes that receive data from the network are <em>receivers</em>. Roots
+use the Receive interface [<a class="reference" href="#id1">1</a>] to receive a message delivered by
+collection. The collection identifier is specified as a parameter to
+Receive during instantiation.</p>
+<p>The set of all roots and the paths that lead to them form the
+collection routing infrastructure in the network.  For any connected
+set of nodes implementing the collection protocol there is only one
+collection infrastructure, <em>i.e.</em>, all roots in this set active at the
+same time are part of the same infrastructure.</p>
+<p>The RootControl interface configures whether a node is a
+root:</p>
+<pre class="literal-block">
+interface RootControl {
+  command error_t setRoot();
+  command error_t unsetRoot();
+  command bool isRoot();
+}
+</pre>
+<p>The first two commands MUST return SUCCESS if the node is now in the
+specified state, and FAIL otherwise. For example, if a node is already
+a root and an application calls RootControl.setRoot(), the call will
+return SUCCESS. If setRoot() returns SUCCESS, then a subsequent call
+to isRoot() MUST return TRUE. If unsetRoot() returns SUCCESS, then a
+subsequent call to isRoot() MUST return FALSE.</p>
+</div>
+<div class="section">
+<h1><a id="collection-services" name="collection-services">3 Collection Services</a></h1>
+<p>A collection service MUST provide one component, CollectionC,
+which has the following signature:</p>
+<pre class="literal-block">
+configuration CollectionC {
+  provides {
+    interface StdControl;
+    interface Send[uint8_t client];
+    interface Receive[collection_id_t id];
+    interface Receive as Snoop[collection_id_t];
+    interface Intercept[collection_id_t id];
+    interface RootControl;
+    interface Packet;
+    interface CollectionPacket;
+  }
+  uses {
+    interface CollectionId[uint8_t client];
+  }
+}
+</pre>
+<p>CollectionC MAY have additional interfaces. All outgoing invocations
+(commands for uses, events for provides) of those interfaces MUST have
+default functions. Those default functions enable CollectionC to
+operate properly even when the additional interfaces are not wired.</p>
+<p>Components SHOULD NOT wire to CollectionC.Send. The generic
+component CollectionSenderC (described in section 3.1) provides
+a virtualized sending interface.</p>
+<p>Receive, Snoop, and Intercept are all parameterized by
+collection_id_t. Each collection_id_t corresponds to a different
+protocol operating on top of collection, in the same way that
+different am_id_t values represent different protocols operating on
+top of active messages. All packets sent with a particular
+collection_id_t generally SHOULD have the same payload format, so that
+snoopers, intercepters, and receivers can parse them properly.</p>
+<p>ColletionC MUST NOT signal Receive.receive on non-root
+nodes. CollectionC MUST signal Receive.receive on a root node when a
+unique (non-duplicate) data packet successfully arrives at that
+node. It MAY signal Receive.receive when a duplicate data packet
+successfully arrives. If a root node calls Send, CollectionC MUST
+treat it as it if were a received packet.  Note that the buffer
+swapping semantics of Receive.receive, when combined with the pass
+semantics of Send, require that CollectionC make a copy of the buffer
+if it signals Receive.receive.</p>
+<p>If CollectionC receives a data packet to forward and it is not a root
+node, it MAY signal Intercept.forward. CollectionC MAY signal
+Snoop.receive when it hears a packet which a different node is
+supposed to forward. For any given packet it receives, CollectionC
+MUST NOT signal more than one of the Snoop.receive, Receive.receive,
+and Intercept.forward events.</p>
+<p>RootControl allows a node to be made a collection tree root.
+CollectionC SHOULD NOT configure a node as a root by default.</p>
+<p>Packet and CollectionPacket allow components to access collection
+data packet fields [<a class="reference" href="#id1">1</a>].</p>
+<div class="section">
+<h2><a id="collectionsenderc" name="collectionsenderc">3.1 CollectionSenderC</a></h2>
+<p>Collection has a virtualized sending abstraction, the generic
+component CollectionSenderC:</p>
+<pre class="literal-block">
+generic configuration CollectionSenderC(collection_id_t collectid) {
+  provides {
+    interface Send;
+    interface Packet;
+  }
+}
+</pre>
+<p>This abstraction follows a similar virtualization approach to
+AMSenderC [<a class="reference" href="#id1">1</a>], except that it is parameterized by a collection_id_t
+rather than an am_id_t. As with am_id_t, every collection_id_t SHOULD
+have a single packet format, so that receivers can parse a packet
+based on its collection ID and contents.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">4. Implementation</a></h1>
+<p>Implementations of collection can be found in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/lib/net/ctp</span></tt> and <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/lib/net/lqi</span></tt>.
+The former is the Collection Tree Protocol (CTP), described in TEP 123
+[<a class="reference" href="#id2">2</a>]. The latter is a TinyOS 2.x port of MultihopLqi, a
+CC2420-specific collection protocol in TinyOS 1.x.</p>
+</div>
+<div class="section">
+<h1><a id="author-addresses" name="author-addresses">5. Author Addresses</a></h1>
+<div class="line-block">
+<div class="line">Rodrigo Fonseca</div>
+<div class="line">473 Soda Hall</div>
+<div class="line">Berkeley, CA 94720-1776</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 510 642-8919</div>
+<div class="line">email - <a class="reference" href="mailto:rfonseca&#64;cs.berkeley.edu">rfonseca&#64;cs.berkeley.edu</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Omprakash Gnawali</div>
+<div class="line">Ronald Tutor Hall (RTH) 418</div>
+<div class="line">3710 S. McClintock Avenue</div>
+<div class="line">Los Angeles, CA 90089</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 213 821-5627</div>
+<div class="line">email - <a class="reference" href="mailto:gnawali&#64;usc.edu">gnawali&#64;usc.edu</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Kyle Jamieson</div>
+<div class="line">The Stata Center</div>
+<div class="line">32 Vassar St.</div>
+<div class="line">Cambridge, MA 02139</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:jamieson&#64;csail.mit.edu">jamieson&#64;csail.mit.edu</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Computer Science Laboratory</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">6. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id1">[1]</a></td><td>TEP 116: Packet Protocols.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id2">[2]</a></td><td>TEP 123: The Collection Tree Protocol (CTP).</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="tinyos-alliance-structure">
+<h1 class="title">TinyOS Alliance Structure</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">120</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Alliance Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Informational</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">All</td>
+</tr>
+<tr><th class="docinfo-name">Authors:</th>
+<td>Philippe Bonnet
+<br />David Culler
+<br />Deborah Estrin
+<br />Ramesh Govindan
+<br />Mike Horton
+<br />Jeonghoon Kang
+<br />Philip Levis
+<br />Lama Nachman
+<br />Jack Stankovic
+<br />Rob Szewczyk
+<br />Matt Welsh
+<br />Adam Wolisz</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">17-April-2006</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.7</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2007-06-21</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Alliance &lt;tinyos-alliance at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a blueprint for an open alliance aroung
+TinyOS for the TinyOS Community and requests discussion and
+suggestions for improvement.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo describes the goals and organization structure of the TinyOS Alliance.
+It covers membership, the working group forums for contribution, intellectual
+property, source licensing, and the TinyOS Steering Committee (TSC).</p>
+</div>
+<div class="section">
+<h1><a id="charter" name="charter">1. Charter</a></h1>
+<!-- TinyOS Alliance Charter:: -->
+<p>Formulate a legal and organizational framework for an alliance that
+can facilitate the continued advancement of the open embedded network
+ecosystem around TinyOS and support the activities, interactions, and
+development of the worldwide academic and industrial TinyOS community.</p>
+</div>
+<div class="section">
+<h1><a id="overview" name="overview">2. Overview</a></h1>
+<p>This memo defines a blueprint and conceptual foundation for an open
+alliance that fulfills the above charter. It defines the following ten
+aspects of the alliance:</p>
+<blockquote>
+<ul class="simple">
+<li>Mission</li>
+<li>Legal structure</li>
+<li>Organizational structure</li>
+<li>Membership criteria</li>
+<li>Working group processes</li>
+<li>Election process</li>
+<li>Intellectual property</li>
+<li>Source licensing</li>
+<li>Funding</li>
+<li>Work products</li>
+</ul>
+</blockquote>
+<p>We (the Alliance) recognize that each of these aspects contributes to the
+whole, is inter-related and needs to be consistent overall.  This document
+attempts to address them sequentially, recognizing that each depends on the
+others.  It draws on lessons from several related
+organizations, although each of these also has significantly
+different goals from those set out in the charter.</p>
+<ol class="arabic simple">
+<li>IETF - Open protocols, technical documents</li>
+<li>OSDL - Stable, Enterprise Linux</li>
+<li>Apache - Suite of open source tools</li>
+<li>Zigbee - Network layer and marketing for 15.4</li>
+<li>OSGI - Service layer</li>
+<li>FSF - Foundational software</li>
+</ol>
+<p>Examining the structure and policies of these organizations helps
+determine what the Alliance can borrow from them, what it must
+do differently, and why.  We (the Alliance) draw most strongly upon the
+IETF, even though that organization was
+focused around creating and standardizing protocols, rather than
+developing a code base.  Its emphasis on rough consensus AND
+running code placed issues akin to those we face near the fore.  We
+share the view that technical excellence is a primary goal and that
+the organization should be structured to sustain and overall cohesive
+architecture.  In our case, it is represented by high quality
+reference implementations and standard APIs, as well as techical
+documents and protocols.  We share an emphasis on broad participation
+centered on the contributions of individual members.</p>
+<p>We encourage industrial involvement, industrial development, and
+industrial support.  The organization is welcoming to companies, but
+it keeps financial support and marketing activities (while both
+important) at arms length from the technical process.  We share the
+concept that proper behavior of participants and member companies is
+most strongly shaped by code of ethics, captured in organization rules
+and social norms, rather than threats of legal repercussions.  The
+broader marketplace is a more effective enforcement body than any
+technical organization.  Thus, we ask that participants declare
+relevant intellectual proprt (IP) that they are aware of, rather than
+force a strict
+accounting of potentially relevant IP.  We encourage the development
+of open solutions that are implemented without the need for particular
+proprietary IP.  In the IETF, this is addressed by the requirement of
+multiple interoperable implementations before standardization.  If
+such implementations can be developed without legal issues, it is
+likely that other non-infringing implementations are possible.  Like
+IETF, we seek a lean bureacracy and mostly volunteer organization.</p>
+<p>From OSDL, we share the goal of developing a stable, high quality
+version of an open source system.  This suggests that the alliance
+have a strong role in developing test suites and broadly accessible
+testbeds, as well as structures for sharing development resources.
+However, we avoid the OSDL structure of the scale of monetary
+contributions dictating technical oversite.  We are not constrained by
+a GPL license structure, as is the OSDL.</p>
+<p>From Apache, we draw the strong sense of a technical meritocracy
+centered on individual contributors.  We seek to permit a loose enough
+consortium that there can be a lot of individual innovation,
+especially in areas of tools, devices, and new platforms.  We also
+seek to retain the notion that credit should be given to authors.  In
+Apache, giving the copyright to the Apache organization exchanges the
+value of the brand for technical contributions.  For a broad alliance
+representing many universities and large companies, such a copyright
+scheme is likely to be an untenable barrier.  Instead, we seek to
+provide a simple source license regime with technical tools for giving
+credit and strong social pressure to comply.</p>
+<p>From Zigbee, we share the goal of providing marketing support for the
+accomplishments of the alliance and that we should seek to define
+standardized services, not just protocols.  We recognize that the
+alliance serves a useful function in being a point of allocation for
+various namespaces, but that this important function should not be a
+tool for extracting financial contributions.  We see the value of an
+IP pool to give confidence that the standard can be adopted without
+becoming entrapped later by IP terms, however, we also see that such a
+pool presents a very significant barrier.  Moreover, it does not
+prevent members from obtaining IP to use it to their advantage with
+other members of the alliance.  It also does not constrain non-members
+from obtaining blocking IP.  It does discourage contributions that
+might pull IP into the pool.  We prefer a process of declaration and
+multiple implementation. Section 7 goes deeper into how the Alliance
+manages the issues and complexities of IP in an open organization.</p>
+</div>
+<div class="section">
+<h1><a id="mission" name="mission">3. Mission</a></h1>
+<p>The mission of the TinyOS Alliance is to provide a forum to facilitate:</p>
+<blockquote>
+<ul class="simple">
+<li>the continued growth of a healthy TinyOS developer and user community
+with support for innovation as well as industry advancement,</li>
+<li>the development and maintenance of a stable, technically-sound base of
+TinyOS technology and surrounding tools through the creation of
+standard interfaces and protocols, vetted extensions, open reference
+implementations, technical documents, testing and verification suites,
+and educational materials,</li>
+<li>the contribution of innovative technology from a world-wide research
+community and the maturation and dissemination of these
+contributions, and</li>
+<li>the promotion of the technology, the community, and the impact of networked
+embedded systems.</li>
+</ul>
+</blockquote>
+</div>
+<div class="section">
+<h1><a id="organizational-structure" name="organizational-structure">4. Organizational Structure</a></h1>
+<p>The Alliance has a technical advisory function: guide the evolution of
+the TinyOS architecture, formulate and track progress of working
+groups, and provide an open and impartial process for technical
+documentation.  It also has an organizational advisory function:
+manage industry interaction, legal and IP issues, evolution of the
+organization itself, membership issues and so on.</p>
+<p>We follow an approach that starts small and grows the structure as
+needed. The focus should be on the working groups. Working groups are
+not limited to technical functions; they can be formed to promote
+developments, markets, etc. Beyond the working groups, the
+organization should remain lean, relying primarily on volunteers. We
+want to avoid creating a situation where the organization becomes
+focused on its own growth and pre-eminence at the expense of the
+larger community and technical agenda.</p>
+<p>Technical directions should be driven by merit and overall soundness,
+and built on consensus.</p>
+<p>The Alliance consists of a non-profit corporation with a Board of
+Directors, a small support staff (primarily volunteer or outsourced)
+and a Steering Committee. The Steering Committee oversees a collection
+of Working Groups, each with a Chair and Members.</p>
+<div class="section">
+<h2><a id="steering-committee" name="steering-committee">4.1 Steering Committee</a></h2>
+<p>In the steady state the Steering Committee will consist of the chairs
+of working groups plus a handful of elected members at large. Tenure
+of a position on the Steering Committee will consist of two years with
+opportunity for renewal. We want to see a vibrant, engaged, and
+constantly evolving leadership while allowing for long-term and
+committed members.</p>
+<p>Initially the steering committee would be formed from working group
+chairs plus some subset of the Alliance working group members.  This
+initial committee will be responsible for putting in place the
+membership and elections processes, which will then be utilized to
+form the regular Steering Committee.</p>
+<p>The primary role of the Steering Committee (SC) is to oversee the Working
+groups (WGs). This means establishing WG policy, providing appeals
+process, managing WG creation/extinction, arbitrating between WGs, and
+supervising activities to resolve conflicting directions and moving
+the process towards overall architectural coherence.</p>
+<p>The SC is also responsible for reviewing and approving all TinyOS
+Enhancement Proposals (TEPs) that working groups generate. WGs
+submit TEPs to the SC for review. The SC should appoint one
+contributing Alliance member not affiliated with the corresponding WG
+to review the TEP. This reviewer, who may or may not be a member of
+the SC, may solicit comments from the community at large, but must
+also thoroughly review the submitted TEP. WGs must address any
+issues/questions brought up either by the reviewer or by other
+community members. Once the reviewer approves the revisions, he/she
+presents the TEP to the SC for approval by rough consensus. Finally,
+TEPs that affect the organizational structure of the Alliance must
+also be approved by the Board.</p>
+<p>Finally, the Steering Commitee will be responsible for determining the
+procedural elements of the Alliance. This includes election
+procedures, membership criteria, selection of venues, oversight of
+access to code repositories and Alliance web sites, and regular
+Alliance meetings that occur at least once a year.</p>
+</div>
+<div class="section">
+<h2><a id="working-groups" name="working-groups">4.2 Working Groups</a></h2>
+<p>The working groups form the core of the alliance. Each working
+group will have a chair who will be responsible for WG processes,
+reporting, meetings, and membership. Working groups and their
+functions are discussed in more detail in a later section.</p>
+</div>
+<div class="section">
+<h2><a id="board-of-directors" name="board-of-directors">4.3 Board of Directors</a></h2>
+<p>The non-profit will require a Board of Directors responsible for
+corporate matters.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="membership-and-participation" name="membership-and-participation">5. Membership and Participation</a></h1>
+<p>We desire to continue the TinyOS tradition of promoting broad
+membership.  This means that we want to keep barriers to entry low in
+all respects: legal, financial, and organizational.  As with IETF and
+Apache, we want to shape the organization as a meritocracy that
+encourages, promotes, and credits the contributions of its members.
+Companies have an essential role, but merit, not finances should
+dictate direction.  Membership and influence should recognize the
+importance of adopters, not just developers.</p>
+<p>The fundamental membership is individual, as individuals create work products,
+serve on working groups and committees, and vote.  We have two forms:</p>
+<blockquote>
+<ul>
+<li><dl class="first docutils">
+<dt>Member: Individual who joins the Alliance and participates at a</dt>
+<dd><p class="first last">basic level, typically as consumer of technology.</p>
+</dd>
+</dl>
+</li>
+<li><p class="first">Contributing Member: Individual who additionally joins working groups,
+attends meetings, or contributes code or other assets to the
+Alliance.   Contributing members are elected to various posts and
+have voting rights.</p>
+</li>
+</ul>
+</blockquote>
+<p>There is no individual membership fee, but members will be responsible for
+nominal registration fees at Alliance meetings.</p>
+<p>Corporations and organizations have institutional membership, which
+reflects their degree of effort.</p>
+<blockquote>
+<ul class="simple">
+<li>Institutional Member: A corporation or organization
+that joins the Alliance, agrees to appear on the Alliance
+web site and documents, and pays a nominal administrative fee.
+(Min. Annual $500 for small companies and non-profits, $1000 for larger)</li>
+<li>Contributing Institutional Member: Corporation or institutional
+organization that additionally provides financial support, resources,
+facilities, technical contributions, intellectual property,
+marketing support, or other meaningful contributions to the
+Alliance. Such institutions are featured prominently in the Alliance and
+have the opportunity to appoint individuals as contributing members.
+(Min. Annual $2000 for small companies and non-profits, $5000 for larger)</li>
+</ul>
+</blockquote>
+<p>Rather than focusing on maximizing the financial contributions into
+the alliance, we are interested in maximizing the impact of the
+alliance in facilitating a healthy academic and industrial, research
+and production ecosystem around embedded network technology.</p>
+<p>The organization will be able to accept direct financial and
+intellectual property contributions.  The IP policy, described
+in Section 7, should encourage
+corporate participation while preserving focus on soundness, merit,
+and consensus building.  Ultimately, we seek to promote a meritocracy
+that recognizess the contributions of the individuals, whether they
+be members of corporations, academic institutions, govermental
+institutions, or unaffiliated.</p>
+</div>
+<div class="section">
+<h1><a id="id1" name="id1">6. Working Groups</a></h1>
+<p>There will be two forms of working groups. LONG-STANDING groups are
+chartered to develop important areas or subsystems.  For example, we
+expect longstanding groups on routing, management, platforms, testing,
+programming tools, and education.  SHORT-TERM groups have a fixed
+mandate to tackle a particular topic.  For example, there may be
+groups to develop a particular protocol, establish a policy or
+licensing format, or address a particular application capability.</p>
+<p>There will be two means of Working Group formation: grass roots and
+charter. Grass roots groups are formed by individuals or groups
+who have a preliminary version of something important and want to make
+it part of TinyOS.  They assemble and make a request to the SC with a
+proposed charter statement and chair.  Chartered groups are
+formed by SC or Board of Directors to address a recognized need for an
+important area of development.  The SC solicits members and chair with
+a particular charter in mind.  WGs may be formed for organizational or
+marketing goals, as well as technical goals.</p>
+<p>The typical output of a working group is technical documentation AND
+working code, including interface definitions and standard proposals.
+While this is the typical output, working groups are not constrained
+to this model, and can have a variety of purposes and work products.
+We seek to promote the development of standardized interfaces,
+protocols, services, and tools with high quality, open reference
+implementations of each.  We seek to have these standards be
+implementable without relying on particular proprietary intellectual
+property.  We are not interested in discouraging development of
+implementations that have excelled in various ways through proprietary
+IP, but standards should not require the use of such IP and should
+allow for multiple, interoperable implementations.  The Steering
+committee will be engaged in ratification of standards by actively
+participating in the community review process and document evolution.</p>
+</div>
+<div class="section">
+<h1><a id="intellectual-property" name="intellectual-property">7. Intellectual Property</a></h1>
+<p>In general we want to promote the development, adoption and use of
+open technology.  We want to avoid having the advancement of embedded
+networks getting trapped into proprietary IP.  Accordingly, our IP
+policy builds heavily on the IETF model.  We also want to avoid a high
+barrier to participation.  Thus, we want to avoid demanding membership
+requirements that require extensive legal analysis and assessing deep
+strategic analysis before joining.  In particular, IP pooling or broad
+IP assignment requirements are seen to too large a barrier and
+discourage the active participation of members.  At the same time, we
+recognize that without such measures only, members cannot expect
+guarantees of IP rights.  We also want to avoid sponging IP from
+others or worse, having members or non-members running ahead of the
+Alliance and creating blocking IP.  In essence, all participants must
+operate with eyes open.  The Alliance encourage an open process, open
+standards, and open source with a clear code of ethics, but leaves
+broader issues of enforcement to the outside market.  Like IETF, we
+rely on disclosure of known IP of relevance, an open process, and a
+code of conduct.  Working groups are encourage to create work products
+that do not rely on proprietary IP for implementation.</p>
+<p>We also want to avoid requiring a member institution from having to
+conduct a complete inventory of IP holdings for potential relevance.
+This is impractical for Universities and large corporations.  It is
+the responsibility of the members to disclose IP or relvance, whether
+it is their property or not, so that they Alliance members can make
+informed decisions and trade-offs.</p>
+<p>Following the IETF, to establish a culture of openness, meeting
+discussions, presentations, and technical documents are
+non-confidential.  This simple measure is a signficant step towards
+establishing the culture of openness and it avoids large legal and
+organizational hassles, as evident in OSDL.</p>
+<p>As with the IETF, there will be a mechanism for contributing IP to the
+Alliance.  This will be treated along with other forms of contribution
+in establishing member status.</p>
+<p>Working Groups will be tasked to avoid forming standards and creating
+work products that fundamentally depend on proprietary IP, i.e., where
+the proposal can only reasonably be implemented using such IP.
+Members recognize that in making proposals, they are required by
+Alliance rules to disclose what IP they know to be relevant.  In the
+rare cases where a working group determines that IP dependent
+proposals are sufficiently critical that they be pursued, such IP must
+be available on reasonable and non-discriminatory (RAND) terms for the
+Steering Committee to be able to approve the action.</p>
+<p>Of course, Intellectual Property in the TinyOS alliance is closely
+tied to source licensing terms, as dicussed in greater detail in Section 8.
+As part of Alliance rules, members agree to only contribute
+code that conforms to Alliance source license policy.  As part of
+keeping barriers to participation low, GPL and code based on
+potentially viral licensing terms must be carefully compartmentalized,
+explicit, and not present in core software.  It will typically involve
+development tools, such as the compilers and peripheral Linux-based
+devices.</p>
+</div>
+<div class="section">
+<h1><a id="source-licensing" name="source-licensing">8. Source Licensing</a></h1>
+<p>In general, we want to provide a mechanism where individuals and
+companies can easily contribute source, can utilize what is available,
+and can gain recognition for their efforts.  Following the TinyOS
+tradition, our source licensing policy will be most strongly aligned
+with BSD and its more modern variants.  We recognize several inherent
+tensions and trade-offs in formulating the source license.</p>
+<p>We want to give credit where credit is due.  Fundamentally, the
+community moves forward by contributing valuable technology and
+standing upon each other's shoulders, not on their feet.  Credit and
+respect drive a virtuous cycle of technical advance.  We do have
+several examples where companies, or even resarch institutions, have
+gained substantial benefit from the work of others while presenting it
+as their own.  This concern is partially addressed by GPL, where if
+you build upon the work of others you are obliged to put it back in
+the open.  Apache addresses this issue by requiring accreditation of
+the Apache foundation.  However, this is connected with a stiff
+membership requirement of signing the copyright to Apache.
+Participants make that sacrifice when they view the brand appeal
+associated with the Apache meritocracy as of sufficient value to
+warrant the arrangement.  Apache is also a loosely affiliated
+consortium of relatively localized projects, typically in very well
+established technical areas.  Our situation is different because we
+have many contributors to a cohesive whole and many of these
+contributors are at leading research institutions where copyright must
+rest with the host institution.  Moreover, much of the work is at the
+leading edge of technology.</p>
+<p>We recognize that the TinyOS &quot;brand&quot; is of value and will be
+increasingly so as the Alliance becomes more formal.  We do not want
+it tainted with its use as a marketing tool on inferior technology.
+Thus, we want to connect the use of the TinyOS term with membership,
+contribution, and conformance to Alliance rules and guidelines.</p>
+<p>We have the additional wrinkle that we are dealing primarily with
+embedded technology, which may have no visible user interface.  And,
+we have limited resources so carrying additional footprint for legal
+conformance is unattractive.</p>
+<p>Furthermore, many of our contributors are from organizations that have
+very precisely defined sets of acceptable source licensing terms.  As
+much as having a common license throughout the Alliance would make it
+easy for everyone to know the specific terms, getting diverse
+institutions to agree to common language is impractical.  We do,
+however, want to have as few distinct licenses with a little variation
+as possible.  Fortunately, we are seeing convergence in licenses,
+after several years of proliferation.</p>
+<p>To address these matters, the Alliance has a preferred source license
+based on the BSD framework, (the &quot;new&quot; BSD license approved by the
+Open Source Initiative <a class="citation-reference" href="#bsd" id="id2" name="id2">[BSD]</a> ) and a small set of accepted licenses, some
+of which have been gradfathered in with the existing code
+base. Contributions can be made using one of those accepted licenses,
+with the member organization name changed appropriately.
+Organizations can submit additional proposed licenses to the Steering
+Committee.  In order to avoid the debate of what constitutes &quot;open
+source,&quot; the Steering Committee will generally only consider
+licenses approved by the Open Source Initiative (OSI) for inclusion in
+the core.  However, being an
+OSI-approved license is not a sufficient condition for approval
+within the Alliance. If a contributor
+wishes to use a completely new license, it can submit the license to
+the OSI first.</p>
+<p>We will not require that the Alliance hold copyright of submitted
+source code, but that it conform to Alliance guidelines.  These
+include guidelines for adding copyrights to existing sources.</p>
+<p>We will utilize the available development tools to facilitate the
+generation of a list of contributors associated with any particular
+instantiation of TinyOS components into an overall system,
+application, or distribution.  We will provide tools for registering
+contributors, copyrights, and applicable source licenses on line, for
+ease of reference.</p>
+<p>Alliance rules will set guidelines for giving credit to contributors
+in documentation, source, tools, web sites and so on.  We want to
+recognize the individuals and their host institutions, as well as the
+Alliance.  But we do not want to create a bureacratic nightmare that
+deters adoption, nor do we want to turn the Alliance into a policing
+organization.  Harsh and threatening legal terms that have no credible
+means of enforcement create a adversarial culture with little
+practical advantage.  Instead, the Alliance will utilize cultural
+norms and reputation as mechanisms for enforcing proper creditation.
+We will develop tools that make compliance relatively easy, reward
+those that do so, and provide a complaint mechanism to identify
+misuse.</p>
+<p>In taking this approach, we focus on needs of reference mplementations
+of standardized interfaces and protocols.  The Alliance is not the
+only vehicle for producing a hardened, tested, certified code base.
+To do so would require the Alliance host a large technical staff, as
+OSDL does.  Comapanies may do so, or produce implementations with
+enhanced performance, reliability, or efficiency using their own
+proprietary technology.  The Alliance encourages such innovation while
+promoting standardized interfaces that allow such technology to
+interoperate.</p>
+</div>
+<div class="section">
+<h1><a id="funding" name="funding">9. Funding</a></h1>
+<p>Initially, we expect that there are no full time employees in the
+Alliance and that funding needs are limited to such items as lawyer's
+fees, web site costs, and insurance. If the Alliance eventually
+requires full time support personnel, the funding structure will have
+to be re-visited.</p>
+<p>As with the IETF, individuals are responsible for their own costs,
+which primarily involve meetings, travel, and generation of work
+products.  The Alliance is predominantly a volunteer organization.
+Membership participation will involve attendance at Alliance meetings.
+Registration fees will be charged to cover costs associated with
+adminstration of the meetings.</p>
+<p>To maintain the focus on technical excellence and meritocracy, we want
+to avoid the heavy-handed quid-pro-quo seen in many industrial
+consortiums where funding determines influence.  The best use of funds
+and the best form of influence is direct contribution to the work
+products of the Alliance.  To keep the structure of the Alliance and
+its operations minimalist and lean, membership focuses on desired
+impact and recognition, rather than control. We want the best way to
+influence the direction of the Alliance to be to contribute technical
+work and demonstrate leadership, rather than try to control what
+individuals can or cannot contribute.</p>
+<p>Companies and institutions are encouraged to contribute financial and
+in-kind support.  It will be essential that companies provide initial
+funding to create the legal structure and to establish basic IT
+capabilities to host the web site and working groups.  Institutional
+members will pay an annual membership fee. In some cases, a
+contributing corporate member may provide in-kind services such as
+lawyers' time used to draw up or comment on by-laws.  Targeted
+contributions will be solicited and encouraged. In this case the
+donator need not become a contributing corporate member, e.g., in
+those cases where such a membership may be prohibited or unwanted.
+The costs of meetings, such as the TinyOS technology exchange, will be
+covered through registration fees and not by institutional membership
+fees.</p>
+</div>
+<div class="section">
+<h1><a id="work-products" name="work-products">10. Work Products</a></h1>
+<p>The broad mission of the Alliance calls for a broad range of
+work products.</p>
+<p>Foremost among these are a set of TEPs documenting systems and
+protocols as well as TEPs that provide guidance and knowledge to the
+community. Technical documentation will have robust and open reference
+implementations for the community to use, refine, improve, and
+discuss. These reference implementations will not preclude
+alternative, compatibile implementations which may have additional
+features or optimizations. The Alliance Working Groups will
+periodically produce periodic releases of these reference
+implementations for the community to use and improve.</p>
+<p>The Alliance will support community contributions of innovative
+extensions and systems by providing a CVS repository to store them.
+In order to keep these contributions organized for users, the Steering
+Committee may nominate one or more people to caretake the repository
+by setting minimal guidelines for the use of the directory structure
+and migrating code as it joins the core or falls into disuse.</p>
+<p>To make these technological resources more accessible and useful
+to a broad embedded networks community, the Alliance will be
+dedicated to providing a set of educational materials. This
+includes introductory tutorials, documentation of core systems,
+simple and complex example applications, and user guides.</p>
+<p>In addition to educational sample applications, whose purpose
+is to teach new developers about the internals and workings of
+the technology, the Alliance will develop and make available
+several end-user applications and tools. The goal is to improve
+the accessibility of the technology to end-users while
+demonstrating its effectiveness. Historical examples of such applications
+include Surge and TinyDB. An important part of this effort is
+good documentation for users who are not expert programmers, as well
+as tools and graphical environments.</p>
+</div>
+<div class="section">
+<h1><a id="conclusions" name="conclusions">11. Conclusions</a></h1>
+<p>By focusing on consensus building and technical excellence, the
+Alliance seeks to avoid being a forum for political and economic
+positioning. It will achieve this by focusing on working groups and
+the contributions of individuals, while not taking strong positions on
+the benefits or drawbacks of different approaches.  The diverse
+requiremements of sensornet applications mean that having a suite of
+solutions, rather than a single one, is often not only desirable but
+essential.</p>
+<p>Over the past five years, low-power embedded sensor networks have
+grown from research prototypes to working systems that are being
+actively deployed. Furthermore, there is a vibrant research community
+that actively works to deploy these systems and collaborate with
+industry, making advances quickly accessible and usable. A great
+catalyst to this growth has been the presence of a large community
+around a shared, free code base.</p>
+<p>The time has come to create an organizational structure to
+allow the effort to grow further. As sensornets become more widespread,
+contributions and advancements will be from an increasingly broad
+demographic of users, and bringing them all together will speed
+progress and improve the potential benefit these systems can bring
+to society. This focus on bringing disparate groups together lies
+at the heart of the Alliance. Rather than depend on strong requirements,
+it depends on broad collaboration and participation, placing a minimalist
+set of expectations that will encourage the exchange of ideas and
+technology.</p>
+</div>
+<div class="section">
+<h1><a id="authors-address" name="authors-address">12. Authors' Address</a></h1>
+<div class="line-block">
+<div class="line">Philippe Bonnet &lt;bonnet.p at gmail.com&gt;</div>
+<div class="line">David Culler &lt;dculler at archrock.com&gt;</div>
+<div class="line">Deborah Estrin        &lt;destrin at cs.ucla.edu&gt;</div>
+<div class="line">Ramesh Govindan &lt;ramesh at usc.edu&gt;</div>
+<div class="line">Mike Horton   &lt;mhorton at xbow.com&gt;</div>
+<div class="line">Jeonghoon Kang        &lt;budge at keti.re.kr&gt;</div>
+<div class="line">Philip Levis    &lt;pal at cs.stanford.edu&gt;</div>
+<div class="line">Lama Nachman  &lt;lama.nachman at intel.com&gt;</div>
+<div class="line">Jack Stankovic        &lt;stankovic at cs.virginia.edu&gt;</div>
+<div class="line">Rob Szewczyk  &lt;rob at moteiv.com&gt;</div>
+<div class="line">Matt Welsh    &lt;mdw at cs.harvard.edu&gt;</div>
+<div class="line">Adam Wolisz   &lt;awo at ieee.org&gt;</div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">13. Citations</a></h1>
+<table class="docutils citation" frame="void" id="bsd" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="bsd">[BSD]</a></td><td><a class="reference" href="http://www.opensource.org/licenses/bsd-license.php">http://www.opensource.org/licenses/bsd-license.php</a></td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="towards-tinyos-for-8051">
+<h1 class="title">Towards TinyOS for 8051</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">121</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">TinyOS 8051 Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Informational</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">1.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Anders Egeskov Petersen, Sidsel Jensen, Martin Leopold</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">15-Dec-2005</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">27-Mar-2006</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS 8051 Working Group List &lt;Tinyos-8051wg at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo is informational. It will hopefully be a basis for
+discussions and suggestions for improvements.  Distribution of this
+memo is unlimited.  This memo is in full compliance with TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This TEP covers our effort of porting <a class="reference" href="http://www.tinyos.net">TinyOS</a> to the nRF24E1
+platform. We ported the basic modules of TinyOS: Timer, UART, ADC and
+LEDS.</p>
+</div>
+<div class="section">
+<h1><a id="project-outline" name="project-outline">1. Project Outline</a></h1>
+<p>The original 8 bit 8051 chip is a member of the <a class="reference" href="http://www.intel.com/design/mcs51">mcs51 family</a> and
+was developed in 1980 by Intel. It is still to this date one of the most
+widely used microcontrollers. Porting TinyOS to the 8051 System on chip
+architecture makes perfect sense - the mcs51 family has been thoroughly
+tested, it is relatively cheap and it has a reasonable small footprint -
+which makes it ideal for embedded solutions and sensor networks.</p>
+<p>For this work, we use a Nordic Semiconductor VLSI nRF24E1
+evaluation-board [NSC]. The board contains an Intel 8051 compatible MCU
+with 4KB program memory, a 16 MHz clock, 3 different Timers (one being
+8052 compatible), a 2.4 GHz wireless RF transceiver and 9 input 10 bit
+ADC, SPI and a RS232 Serial interface. The nRF24E1 board was chosen
+because the radio component matches the radio on the specially designed
+DIKU/DTU HogthrobV0 [HOG] boards used for research purposes at DIKU
+[PEH].</p>
+<p>We ported a subset of TinyOS for the 8051 platform consisting of the
+Timer, UART, ADC and LED modules. We did not port the radio module and
+the underlying SPI-bus code.</p>
+<p>This works attacks the two most immediate problems when porting TinyOS
+to 8051: the toolchain and the hardware abstraction components. The
+first problem when porting TinyOS to 8051-based platforms concerns the
+toolchain. The Gcc compiler does not support 8051. This is a major issue
+as the code generated by the NesC preprocessor is tailored for gcc.  The
+second problem concerns the hardware abstraction components that must be
+specialized to the 8051 idiosyncracies. In a perfect world, such a
+specialization should not require to modify any interface.
+Unfortunately, we needed to modify some of the interfaces to accomodate
+the 8051 features.</p>
+<p>This work was done under the supervision of Martin Leopold at University
+of Copenhagen.</p>
+</div>
+<div class="section">
+<h1><a id="project-approach" name="project-approach">2. Project Approach</a></h1>
+<p>The approach to the porting project has been pragmatic. The focus has
+been on producing working code, so testing and debugging have been key
+elements of our work. The process has been to implement new
+functionality in small iterative steps and do testing simultaneously.</p>
+<p>To bootstrap the development without a JTAG module or alike, we built a
+small LED expansion board attachable to the port logic. The LEDs was an
+easy way to get instant low level test output. We also built a small
+stimulator based on a potentiometer (variable resistor) to get valid
+input from the ADC pins.</p>
+<dl class="docutils">
+<dt>The following TinyOS application programs have been written and tested:</dt>
+<dd><ul class="first last simple">
+<li>Empty - test of port logic and tool chain</li>
+<li>mcsatomic - test of atomic and interrupts</li>
+<li>mcsBlink - test of LEDs</li>
+<li>mcsBlinkTimer - test of Timers using LEDs</li>
+<li>mcsSerialTest - test of UART code, simple input/output one char</li>
+<li>mcsSerialTest2 - test of multiple byte output</li>
+<li>mcsTimerSerialTest - test of UART controlled by Timer interrupts</li>
+<li>mcsADC - test of ADC code with Timer and LEDs</li>
+</ul>
+</dd>
+</dl>
+</div>
+<div class="section">
+<h1><a id="development-environment-and-tool-chain" name="development-environment-and-tool-chain">3. Development Environment and Tool Chain</a></h1>
+<p>The following subsections describe the different development tools,
+their selection and interconnection.</p>
+<div class="section">
+<h2><a id="selection-of-development-tools-compilers" name="selection-of-development-tools-compilers">3.1 Selection of Development Tools/Compilers</a></h2>
+<p>A large number of 8051 compilers exist primarily for the DOS and Windows
+platforms. We have focused on two popular and regularly updated
+compilers: <a class="reference" href="http://www.keil.com">KEIL</a> and the Small Device C Compiler (SDCC).</p>
+<p><a class="reference" href="http://sdcc.sourceforge.net">SDCC</a> is an open source project hosted on the Sourceforge website,
+whereas the KEIL C51 compiler is a commercial compiler and Integrated
+Development Environment (IDE). The debugger for SDCC (SDCDB) is still
+fairly experimental. The KEIL suite runs on the Windows platform, and
+has a good interactive debugger and simulator. KEIL and SDCC accepts
+roughly the same syntactical dialect, which eases the work of moving
+between the two compilers.</p>
+<p>During our work with SDCC and SDCDB we encountered numerous problems and
+bugs. SDCC 2.4.0 suddenly returned 'fatal compiler errors' with no
+apparent reason. After an update of SDCC from version 2.4.0 to 2.5.0
+(most recent release) the error disappeared, the code compiled, but it
+still did not work correctly on the board. We also discovered a serious
+problem regarding sign bits in SDCC 2.5.0. SDCC made a type error when
+reading a 32 bit signed value. Apparently SDCC did not interpret the
+sign bit correctly, so a very small negative number was interpreted as a
+very large positive number as if the value was unsigned. KEIL however
+interprets the value correctly. The bug was submitted by us and fixed by
+the SDCC development team in just two days, but the timer module still
+does not work using SDCC.</p>
+<p>Our attempts using SDCC's debugger/simulator (SDCDB) was equally
+troublesome. SDCDB simply stopped at address 0, and running or stepping
+through the code returned us to the UNIX prompt with no error message.
+Without SDCDB, we had no debug possibility and we were forced to rethink
+the tool chain. We decided to substitute SDCC with the KEIL development
+kit. This gave us a working debug environment - with minimal change to
+the already produced code.</p>
+</div>
+<div class="section">
+<h2><a id="our-recommendation" name="our-recommendation">3.1.1 Our Recommendation</a></h2>
+<p>In our experience the SDCC compiler and associated tools are not yet
+mature enough to support our development. We recommend pursuing other
+alternatives such as KEIL or other compiler suites.</p>
+<p>We continue to mention SDCC in the remaining text, because we encourage
+the use of open source software and cross-platform development. We hope
+SDCC will prove an reliable alternative in the future.</p>
+</div>
+<div class="section">
+<h2><a id="tool-chain-overview" name="tool-chain-overview">3.2 Tool Chain Overview</a></h2>
+<p>The following figure and sections are an overview of the current tool
+chain. The tool chain is based on TinyOS 1.x, NesC 1.1.3, avr-gcc 3.4.3,
+PERL v. 5.8.6 and SDCC 2.5.4 or KEIL C51 version 7.20.</p>
+<p>Each step in the tool chain will be explained in the section below.</p>
+<pre class="literal-block">
+             Mangle-
+TinyOS       script
+-----&gt; app.c -----&gt; app_mangled.c --------&gt; app.hex ------&gt; nRF24E1
+ NesC         PERL                SDCC/KEIL         nRFPROG
+</pre>
+</div>
+<div class="section">
+<h2><a id="description-of-the-tool-chain" name="description-of-the-tool-chain">3.3 Description of the Tool Chain</a></h2>
+<p>The compilation of the TinyOS test program outputs two files, a
+'main.exe' file and an 'app.c' file. The 'app.c' file contains all the
+needed code to run the TinyOS application. However the C code produced
+by NesC cannot be compiled for the 8051 platform directly.</p>
+<p>One solution could be to alter the syntax NesC produces for this
+specific platform, by modifying the source for NesC. However as a first
+step we chose not to make changes to NesC, but instead changed the
+content of the NesC output file 'app.c'. We inserted an extra step in
+the tool chain in the form of a mangle script. The mangle script works
+as the rope, tying the output from NesC to the input of SDCC or KEIL.</p>
+<p>After running the mangling script on the 'app.c' file we obtain an
+'app_mangled.c' file which can be compiled by either SDCC or KEIL. This
+produces a hex file that is transferred to the chip by the nRFPROG
+software.</p>
+</div>
+<div class="section">
+<h2><a id="description-of-the-mangling-script" name="description-of-the-mangling-script">3.4 Description of the Mangling Script</a></h2>
+<p>The mangling script is written in PERL, a commonly used general purpose
+scripting language with powerful pattern matching capabilities and
+extensive handling of regular expressions. The mangle script handles all
+currently known problems, and it can easily be expanded to handle
+additional alterations.</p>
+<p>To run the mangle script use the following syntax:</p>
+<dl class="docutils">
+<dt>&quot;./sdccMangleAppC.pl -KEIL -file build/mcs51/app.c &gt;</dt>
+<dd>build/mcs51/app_mangled.c&quot;</dd>
+</dl>
+<p>or</p>
+<dl class="docutils">
+<dt>&quot;./sdccMangleAppC.pl -SDCC -file build/mcs51/app.c &gt;</dt>
+<dd>build/mcs51/app_mangled.c&quot;</dd>
+</dl>
+<p>The 'sdccMangleAppC.pl' script handles a number of needed alterations:</p>
+<blockquote>
+<ul class="simple">
+<li>it alters the SFR and SBIT declarations for SDCC and KEIL
+respectively</li>
+<li>it convert 64 bit data types to 32 bit</li>
+<li>it alters the reserved SDCC keyword data to _data</li>
+<li>it removes inlining directives</li>
+<li>it removes preprocessor line numbering</li>
+<li>it alters $ in identifiers to underscore</li>
+<li>it alters GCC interrupt declaration to SDCC syntax</li>
+</ul>
+</blockquote>
+<p>Each of these alterations will be explained in the sections below.</p>
+</div>
+<div class="section">
+<h2><a id="sfr-and-sbit-declarations" name="sfr-and-sbit-declarations">3.4.1 SFR and SBIT Declarations</a></h2>
+<p>In order to make TinyOS accept the 8051 special function registers (SFR)
+and special bit variables (SBIT), we have included them into the TinyOS
+8051 platform folder as a 8051.h file.</p>
+<p>SFRs are located on an address dividable by 8, whereas an SBIT addresses
+a specific bit within these SFR.</p>
+<p>In order to make TinyOS accept the SFRs we have type defined them in the
+NesC code as:</p>
+<blockquote>
+typedef int sfr;
+sfr P0 __attribute((x80));</blockquote>
+<p>which is altered to</p>
+<blockquote>
+//typedef int sfr;
+sfr at 0x80 P0;</blockquote>
+<p>for the SDCC compiler in the mangle script and</p>
+<blockquote>
+sfr P0 = 0x80;</blockquote>
+<p>for the KEIL compiler and similar for the SBIT declarations.</p>
+<p>NOTE: The SDCC website refers to a PERL script (keil2sdcc.pl - last
+updated June 2003) for translating SFR and SBIT declarations from KEIL
+to SDCC, but it produces code with illegal syntax, so either do not use
+it, or alter it to produce code with the right syntax.</p>
+</div>
+<div class="section">
+<h2><a id="sdcc-keil-data-types" name="sdcc-keil-data-types">3.4.2 SDCC/KEIL Data Types</a></h2>
+<p>TinyOS and SDCC/KEIL do not support the same data types, so some
+alterations were needed to compile the code with SDCC and KEIL.</p>
+<dl class="docutils">
+<dt>SDCC/KEIL supports the following data types:</dt>
+<dd><ul class="first last simple">
+<li>char (8 bits, 1 byte)</li>
+<li>short (16 bits, 2 bytes)</li>
+<li>int (16 bits, 2 bytes)</li>
+<li>long (32 bit, 4 bytes)</li>
+<li>float (32 bit, 4 bytes).</li>
+</ul>
+</dd>
+</dl>
+<p>TinyOS supports an extra data type - 64 bit long long (u)int64_t. Since
+we are working with software that does not support this data type, on a
+very small hardware memory model, we decided to change the NesC 64 bit
+data types to 32 bit. This is done in the mangling script.</p>
+</div>
+<div class="section">
+<h2><a id="reserved-keywords-in-sdcc" name="reserved-keywords-in-sdcc">3.4.3 Reserved Keywords in SDCC</a></h2>
+<p>A number of keywords are reserved in SDCC. Half of them represent a
+directive to the compiler, defining which memory segment on the nRF24E1
+the specific lines of code refer to. To ensure that the developer does
+not break code by unintentionally and unaware of their effect use them
+fx. as a variable name in the NesC code, they need to be replaced or
+altered to something else, e.g. data to _data, before compiling for
+SDCC. Right now the mangle script only handles the reserved keyword
+data. None of the other keywords except SFR, SBIT and interrupt are
+currently in use in the code. This might pose as a problem to future
+work, but the mangle script can easily be expanded to handle misuse of
+the other keywords.</p>
+<p>However, if the code size increases significantly in the future, it
+might be nessecary to insert the keywords into the code, to support the
+architectures segmented memory model. Right now, everything is stored in
+the directly addressable memory segment, which is quite small.</p>
+<dl class="docutils">
+<dt>The reserved keywords are:</dt>
+<dd><ul class="first last simple">
+<li>data / near</li>
+<li>xdata / far</li>
+<li>idata / pdata</li>
+<li>code</li>
+<li>bit</li>
+<li>SFR / SBIT</li>
+<li>interrupt</li>
+<li>critical</li>
+</ul>
+</dd>
+</dl>
+<p>Variables declared with keyword storage class data/near will be
+allocated in the directly addressable portion of the internal RAM. This
+is the default option for the small memory model. Variables declared
+with storage class xdata/far will be placed in external RAM, which is
+default for the large memory model.</p>
+<p>Variables declared with keyword storage class idata will be allocated in
+the indirectly addressable portion of the internal RAM. The first 128
+byte of idata physically access the same RAM as the data memory. The
+original 8051 had 128 byte idata, but nowadays most devices have 256
+byte idata memory. Paged xdata access (pdata) is just as
+straightforward.</p>
+<p>The different memory segments that the keywords apply to, can be seen in
+the figure below.</p>
+<p>nRF24E1 Internal Data Memory Structure Overview:</p>
+<pre class="literal-block">
+                       IRAM                  SFR
+                +---------------------+---------------------+
+            FFh |                     |                     | FFh
+                |   Accessible by     |   Accessible by     |
+Upper 128 bytes |   indirect          |   direct            |
+                |   addressing only   |   addressing only   |
+            80h |                     |                     | 80h
+                +---------------------+---------------------+
+            7Fh |                     |
+                | Addressable by      |
+Lower 128 bytes | direct and          |
+                | indirect addressing |
+            00h |                     |
+                +---------------------+
+</pre>
+<p>The prefered memory model can be defined in SDCC through CLI option
+--model-small or --model-large - the small memory model is default. In
+KEIL it can be changed through selecting it in the options pane for the
+target.</p>
+</div>
+<div class="section">
+<h2><a id="removal-of-inlining" name="removal-of-inlining">3.4.4 Removal of inlining</a></h2>
+<p>NesC assumes that GCC is being used for the final compilation. GCC
+supports inline functions and can be made to optimize code quite
+aggressively, so the code generated by NesC does not need to be very
+efficient. Unfortunately SDCC does not support code inlining, so the
+inline statements have to be removed, when compiling for SDCC.</p>
+<p>Lines with the following format are affected:</p>
+<p>static inline void TOSH_sleep(void );
+static __inline void TOSH_SET_RED_LED_PIN(void);
+__inline void__nesc_enable_interrupt(void);</p>
+<p>Lines with the noinline attribute is substituted with the
+#pragma NO_INLINE.</p>
+</div>
+<div class="section">
+<h2><a id="removal-of-preprocessor-line-numbering" name="removal-of-preprocessor-line-numbering">3.4.5 Removal of Preprocessor Line Numbering</a></h2>
+<p>Also NesC produce preprocessor line number meta data, to allow the
+compiler to report error messages referring to the original code. We do
+not really need them for anything, so we filter them out to minimize the
+code size. It also eases the code reading significantly. If needed for
+debug purposes the regular expression in the mangle script which remove
+them can be commented out.</p>
+</div>
+<div class="section">
+<h2><a id="change-in-identifiers" name="change-in-identifiers">3.4.6 Change $ in Identifiers</a></h2>
+<p>The SDCC compiler is very strict when it comes to valid symbols in
+identifiers. NesC produce GCC-code which inserts $ as a separator
+character in identifiers. We mangle the $ to two underscores in order to
+enable SDCC/KEIL to compile.</p>
+</div>
+<div class="section">
+<h2><a id="interrupt-vectors" name="interrupt-vectors">3.4.7 Interrupt Vectors</a></h2>
+<p>The syntax for declaration of interrupt vectors are different in GCC and
+SDCC/KEIL. So we mangle the interrupt declaration:</p>
+<p>From: void __attribute((interrupt)) __vector_5(void)
+To:   void __vector_5(void) interrupt 5</p>
+<p>Additionally KEIL does not understand that the interrupt vector is
+defined previous to its use. So we remove the forward declaration of the
+vectors in the mangle script, when compiling for KEIL.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="tinyos-modifications" name="tinyos-modifications">4. TinyOS Modifications</a></h1>
+<p>TinyOS is based on modules with different levels of hardware
+abstraction. When porting TinyOS to a new platform, you change the
+underlying hardware dependencies in TinyOS, and you have to rebuild the
+modules bottom up. Hence, it has been necessary to modify a number of
+modules in TinyOS. The figure below shows the topological hierarchy of
+the TinyOS modules we have focused on. By far, most of the work has been
+done in the Hardware Presentation Layer (HPL), but certain changes also
+affected the higher abstractions, such as changes in interfaces and
+interrupt handling.</p>
+<p>Modified TinyOS modules overview:</p>
+<pre class="literal-block">
++------------------------------------------------------------+
+|                     TinyOS Application                     |  App
++------------------------------------------------------------+
+  \/    /\            \/    /\           \/   /\      \/  /\   -----
++----------+        +----------+       +---------+  +--------+
+|  Timer   |        |   UART   |       |   ADC   |  |  LEDs  |  HAL
++----------+        +----------+       +---------+  +--------+
+  \/    /\            \/    /\           \/   /\               -----
++----------+  +---------------------+  +---------+
+| HPLClock |  |       HPLUART       |  | HPLADC  |      \/      HPL
++----------+  +---------------------+  +---------+
+  \/    /\        \/         \/  /\      \/   /\               -----
++----------+  +--------+   +--------+  +---------+  +--------+
+|  Timer2  |  | Timer1 | &gt; | Serial |  | Sensors |  |  Port  |  HW
++----------+  +--------+   |  Port  |  +---------+  +--------+
+                          +--------+
+</pre>
+<p>The following sections describe the changes to the four groups of modules.</p>
+<div class="section">
+<h2><a id="hplclock-and-related-modules" name="hplclock-and-related-modules">4.1 HPLClock and related modules</a></h2>
+<p>The 8051 chip has three independent timer/counter circuits: Timer0,
+Timer1 and Timer2, which can run in various modes. Each timer/counter
+consists of a 16-bit register that is accessible to software as three
+SFRs (TL0/TH0, TL1/TH1 and TL2/TH2). Timer0 and Timer1 can be used as 13
+or 16 bit timer/counter or as 8 bit counters with auto-reload. Timer2 is
+only capable of running as a 16 bit timer/counter, but can remain as
+such even in auto-reload mode. Reload is desirable for loading the clock
+with a start value.</p>
+<p>We have chosen to use Timer2 for the clock module, since it gives our
+design a maximum clock interval of 49.15 ms at a 16 MHz system clock.
+Using a different timer circuit would limit the interval to 0.192 ms,
+which would result in a great deal of interrupts and consume processing
+power for administrational overhead.</p>
+</div>
+<div class="section">
+<h2><a id="timer" name="timer">4.1.1 Timer</a></h2>
+<p>The Timer module (HAL) uses the HPLClock module to handle the hardware
+timing.  These two modules communicate through the clock interface.
+However, the standard TinyOS clock interface is designed for an MCU with
+a more flexible prescaler, then the 8051 chip is equipped with. The 8051
+is limited to a prescaler with a factor of 1/4 or 1/12 of the CPU clock
+frequency, whereas the TinyOS clock interface currently uses an 8 bit
+prescaler and an 8 bit timer.  Because of the 8051s limited prescaler
+options, and the possibility to use a 16 bit timer/counter to compensate
+for the reduced prescaler options, we decided to widen the clock
+interface from 8 to 16 bit. We are using the factor 1/4 for the
+prescaler.</p>
+<p>The interface change has affected the following methods:
+result_t setRate(uint16_t interval, char scale)
+void     setInterval(uint16_t value)
+void     setNextInterval(uint16_t value)
+uint16_t getInterval()
+result_t setIntervalAndScale(uint16_t interval, uint8_t scale)
+uint16_t readCounter()
+void     setCounter(uint16_t n)</p>
+<dl class="docutils">
+<dt>See:</dt>
+<dd>Clock.h
+Clock.nc
+HPLClock.nc
+TimerM.nc
+TimerC.nc
+8051.h</dd>
+</dl>
+</div>
+<div class="section">
+<h2><a id="hpluart" name="hpluart">4.2 HPLUART</a></h2>
+<p>The UART is depending on a timer to generate a baud rate for the serial
+port. The architecture only allows two of the three timers (Timer1 or
+Timer2), to act as such. Since Timer2 is already used by the clock
+module, this leaves only Timer1 available for the UART module.</p>
+<p>When using Timer1 as the baud rate generator, 5 different baud rates can
+be obtained: 1.20 KiB/s, 2.4 KiB/s, 4.8 KiB/s, 9.6 KiB/s or 19.2 KiB/s.
+We chose to use a baud rate of 19.2 KiB/s with 8 data bits, no parity
+and one stop bit, since this speed is commonly used and the fastest
+speed possible using this timer.</p>
+<p>We have also expanded the HPLUART interface to include a put2 method.
+This method is able to send more than one byte, by taking two pointers
+as arguments. These pointers refer to the first and last bytes to be
+sent. The HPLUART interrupt handler was also modified to take the
+multiple byte data into account.</p>
+<dl class="docutils">
+<dt>See:</dt>
+<dd>8051.h
+HPLUART.nc
+HPLUARTC.nc
+HPLUARTM.nc</dd>
+</dl>
+</div>
+<div class="section">
+<h2><a id="hpladc" name="hpladc">4.3 HPLADC</a></h2>
+<p>The TinyOS standard ADC interface was developed for the AVR which
+includes hardware functionality for repetitive sampling at a given
+interval.  Implementing this functionality on the 8051, which does not
+support this in hardware, would require use of the last timer. We chose
+not to implement repetitive sampling, therefore the setSampleRate method
+currently has no use.</p>
+<dl class="docutils">
+<dt>See:</dt>
+<dd>8051.h
+ADCM.nc
+HPLADCC.nc
+HPLADCM.nc</dd>
+</dl>
+</div>
+<div class="section">
+<h2><a id="leds" name="leds">4.4 LEDS</a></h2>
+<p>TinyOS features three standard LEDs (Red, Green and Yellow), but the
+nRF24E1 evaluation board is not equipped with programmable LEDs so we
+used the general purpose ports (GPIO).</p>
+<p>The standard 8051 platform features four 8 bit GPIO, however the nRF24E1
+evaluation board is only equipped with two ports: Port0 and Port1, where
+Port0 has eight bits and Port1 has only three bits.</p>
+<p>Intuitively the best solution would have been to place the standard
+three TinyOS LED bits on Port1, but unfortunately we were unable to
+control the most significant bit on Port1, since it is hard-wired as
+input and controlled by external SPI_CTRL. The Yellow LED was moved to
+Port0.</p>
+<p>To visualize the status of the GPIO, including the three standard LEDs,
+we built a LED expansion board.</p>
+<dl class="docutils">
+<dt>The three LEDs are currently wired to:</dt>
+<dd>Red -&gt; P1.0
+Green -&gt; P1.1
+Yellow -&gt; P0.7.</dd>
+<dt>See:</dt>
+<dd>8051.h
+hardware.h
+mcs51hardware.h
+LedsC.nc</dd>
+</dl>
+</div>
+<div class="section">
+<h2><a id="interrupts" name="interrupts">4.5 Interrupts</a></h2>
+<p>In TinyOS interrupts are not implemented as a single module, they are
+mainly facilitated in atomic blocks and in the init, start and stop
+methods of the various HPL modules. The init, start and stop methods
+only handle interrupts that are specific to the module, i.e. timer
+interrupt for the HPLClock module and serial interrupt for the HPLUART
+module. While the atomic block handle the enabling of global interrupts.
+This is used to avoid preempting code execution in critical blocks.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="conclusion" name="conclusion">5. Conclusion</a></h1>
+<p>The project have reached a plateau of development in porting TinyOS to
+the 8051 platform, on which future development can be based. The basic
+modules (Timer, UART, ADC and LEDS) have been implemented making 8051
+accessible for the TinyOS community. However a essential module for the
+field of sensor networks, the radio module, is still missing.</p>
+<p>The result of our work will be uploaded to the TinyOS 8051 Working Group
+website.</p>
+</div>
+<div class="section">
+<h1><a id="future-work" name="future-work">6. Future Work</a></h1>
+<p>The work presented in this TEP is short of being a complete porting of
+TinyOS to the 8051 platform. Two obvious future tasks are implementing a
+Radio module involving the SPI interface and Power Management for duty
+cycling. The radio module is currently under development, in which the
+main hurdle is the three wire SPI interface.</p>
+<p>This work is done for TinyOS 1.x, but looking forward, the 8051 port
+should target TinyOS 2.0. This might be a challenge with the timer
+interface being so different from TinyOS 1.x.</p>
+</div>
+<div class="section">
+<h1><a id="authors" name="authors">7. Authors</a></h1>
+<div class="line-block">
+<div class="line">Anders Egeskov Petersen</div>
+<div class="line">University of Copenhagen, Dept. of Computer Science</div>
+<div class="line">Universitetsparken 1</div>
+<div class="line">DK-2100 K¯benhavn ÿ</div>
+<div class="line">Denmark</div>
+<div class="line"><br /></div>
+<div class="line">Sidsel Jensen</div>
+<div class="line">University of Copenhagen, Dept. of Computer Science</div>
+<div class="line">Universitetsparken 1</div>
+<div class="line">DK-2100 K¯benhavn ÿ</div>
+<div class="line">Denmark</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:purps&#64;diku.dk">purps&#64;diku.dk</a></div>
+<div class="line"><br /></div>
+<div class="line">Martin Leoold</div>
+<div class="line">University of Copenhagen, Dept. of Computer Science</div>
+<div class="line">Universitetsparken 1</div>
+<div class="line">DK-2100 K¯benhavn ÿ</div>
+<div class="line">Denmark</div>
+<div class="line"><br /></div>
+<div class="line">Phone +45 3532 1464</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:leopold&#64;diku.dk">leopold&#64;diku.dk</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">8. Citations</a></h1>
+<table class="docutils citation" frame="void" id="nsc" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="nsc">[NSC]</a></td><td>Nordic Semiconductor. nRF24E1 Evalutaion board.
+<a class="reference" href="http://www.nordicsemi.no/files/Product/development_tools/nRF24E1_EVBOARD_rev1_0.pdf">http://www.nordicsemi.no/files/Product/development_tools/nRF24E1_EVBOARD_rev1_0.pdf</a></td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="peh" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="peh">[PEH]</a></td><td>Martin Leopold. &quot;Power Estimation using the Hogthrob Prototype Platform&quot; <em>M.Sc.
+Thesis, DIKU, Copenhagen University, Denmark, December 2004</em> .</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="hog" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="hog">[HOG]</a></td><td>Kashif Virk, Jan Madsen, Andreas Vad Lorentzen, Martin Leopold, Philippe Bonnet.
+&quot;Design of A Development Platform for HW/SW Codesign ofWireless Integrated Sensor
+Nodes&quot; <em>Eighth Euromicro Symposium on Digital Systems Design</em>, 2005.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<body>
+<div class="document" id="ieee-eui-64-unique-node-identifier">
+<h1 class="title">IEEE EUI-64 Unique Node Identifier</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">122</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Gilman Tolle, Jonathan Hui</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">26-Apr-2006</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body"></td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body"></td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>A TinyOS application developer may desire a globally-unique node
+identifier within the IEEE EUI-64 namespace. This document describes
+the TinyOS components used to access such an identifier.</p>
+</div>
+<div class="section">
+<h1><a id="interfaces" name="interfaces">1. Interfaces</a></h1>
+<p>A platform that can provide a valid IEEE EUI-64 globally-unique node
+identifier SHOULD provide it through a component with the signature
+defined here, enabling platform-independent access to the identifier:</p>
+<pre class="literal-block">
+configuration LocalIeeeEui64C {
+  provides interface LocalIeeeEui64;
+}
+</pre>
+<p>The identifier is accessed through the following interface:</p>
+<pre class="literal-block">
+interface LocalIeeeEui64 {
+  command ieee_eui64_t getId();
+}
+</pre>
+<p>The ieee_eui64_t type is defined in <tt class="docutils literal"><span class="pre">tos/types/IeeeEui64.h</span></tt> as:</p>
+<pre class="literal-block">
+enum { IEEE_EUI64_LENGTH = 8; }
+
+typedef struct ieee_eui64 {
+  uint8_t data[IEEE_EUI64_LENGTH];
+} ieee_eui64_t;
+</pre>
+<p>If the platform can provide a valid IEEE EUI-64, the value returned
+from this call MUST follow the IEEE EUI-64 standard.</p>
+<p>If a platform can provide a unique identifier that is not a valid IEEE
+EUI-64 identifier, it SHOULD provide its unique identifier through a
+component with a different name and a different interface. The
+definition of such an interface is outside the scope of this TEP.</p>
+</div>
+<div class="section">
+<h1><a id="ieee-eui-64" name="ieee-eui-64">2. IEEE EUI-64</a></h1>
+<p>The IEEE EUI-64 structure is copied here:</p>
+<pre class="literal-block">
+|        company_id       |            extension identifier           |
+|addr+0 | addr+1 | addr+2 | addr+3 | addr+4 | addr+5 | addr+6 | addr+7|
+|  AC   |   DE   |   48   |   23   |   45   |   67   |   AB   |   CD  |
+10101100 11011110 01001000 00100011 01000101 01100111 10101011 11001101
+|  |                                                               |  |
+|  most significant byte                      least significant byte  |
+most-significant bit                              least-significant bit
+
+If provided in byte-addressable media, the original byte-address order
+of the manufacturer is specified: the most through least significant
+bytes of the EUI-64 value are contained within the lowest through
+highest byte addresses, as illustrated above.
+</pre>
+<p>See: <a class="reference" href="http://standards.ieee.org/regauth/oui/tutorials/EUI64.html">http://standards.ieee.org/regauth/oui/tutorials/EUI64.html</a></p>
+<p>The author of the LocalIeeeEui64C component MUST ensure that the
+getId() call returns a valid EUI-64 identifier that follows the
+standard, with the bytes in the order described above.</p>
+</div>
+<div class="section">
+<h1><a id="implementation-notes" name="implementation-notes">3. Implementation Notes</a></h1>
+<p>Some TinyOS node platforms contain a unique hardware identifier that
+can be used to build the EUI-64 node identifier. That hardware
+identifier may be obtained from several places, e.g. a dedicated
+serial ID chip or a flash storage device. Users of the interface
+described in this document MUST NOT require knowledge of how the
+unique identifier is generated.</p>
+<p>The EUI-64 node identifier MUST be available before the Boot.booted()
+event is signalled. If the EUI-64 is derived from a hardware device,
+the hardware device should be accessed during the Init portion of the
+boot sequence.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">4. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Gilman Tolle</div>
+<div class="line">Arch Rock Corporation</div>
+<div class="line">657 Mission St. Suite 600</div>
+<div class="line">San Francisco, CA 94105</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 415 692 0828</div>
+<div class="line">email - <a class="reference" href="mailto:gtolle&#64;archrock.com">gtolle&#64;archrock.com</a></div>
+</div>
+<div class="line-block">
+<div class="line">Jonathan Hui</div>
+<div class="line">Arch Rock Corporation</div>
+<div class="line">657 Mission St. Suite 600</div>
+<div class="line">San Francisco, CA 94105</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 415 692 0828</div>
+<div class="line">email - <a class="reference" href="mailto:jhui&#64;archrock.com">jhui&#64;archrock.com</a></div>
+</div>
+</div>
+</div>
+</body>
+</html>
diff --git a/doc/html/tep123.html b/doc/html/tep123.html
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+  padding-left: 0.5em ;
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+
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+  font-weight: bold ;
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+  white-space: nowrap;
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+  font-size: 100% }
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+</head>
+<body>
+<div class="document" id="the-collection-tree-protocol-ctp">
+<h1 class="title">The Collection Tree Protocol (CTP)</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">123</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Network Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">&gt; 2.1</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Rodrigo Fonseca, Omprakash Gnawali, Kyle Jamieson, Sukun Kim, Philip Levis, and Alec Woo</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">3-Aug-2006</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.15</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2009-01-16</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo documents the Collection Tree Protocol (CTP), which
+provides best-effort anycast datagram communication to one of the
+collection roots in a network.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>A collection protocol delivers data to one of possibly several data
+sinks, providing a many-to-one network layer. Collection is a
+fundamental component of most sensor network applications. The
+Collection Tree Protocol (CTP) is a reference Collection protocol in
+TinyOS 2.x. The users use Collection interfaces described in TEP 119
+<a class="footnote-reference" href="#id8" id="id1" name="id1">[3]</a> to use CTP in their applications.</p>
+<p>In this TEP, after a brief discussion of Collection and CTP, we
+specify the CTP routing and data frames. CTP uses routing frames to
+update and build collection tree in the network. CTP uses data frames
+to deliver application payload to the sink and to probe topology
+inconsistencies.</p>
+<p>All fields in this specification are in network byte order.</p>
+</div>
+<div class="section">
+<h1><a id="assumptions-and-limitations" name="assumptions-and-limitations">2. Assumptions and Limitations</a></h1>
+<p>CTP is a tree-based collection protocol. Some number of nodes in a
+network advertise themselves as tree roots. Nodes form a set of routing
+trees to these roots. CTP is <strong>address-free</strong> in that a node does not
+send a packet to a particular root; instead, it implicitly chooses a
+root by choosing a next hop. Nodes generate routes to roots using
+a routing gradient.</p>
+<p>The CTP protocol assumes that the data link layer provides four things:</p>
+<blockquote>
+<ol class="arabic simple">
+<li>Provides an efficient local broadcast address.</li>
+<li>Provides synchronous acknowledgments for unicast packets.</li>
+<li>Provides a protocol dispatch field to support multiple higher-level
+protocols.</li>
+<li>Has single-hop 16-bit source and destination fields.</li>
+</ol>
+</blockquote>
+<p>CTP assumes that it has link quality estimates of some number of nearby
+neighbors. These provide an estimate of the number of transmissions it
+takes for the node to send a unicast packet whose acknowledgment is
+successfully received.</p>
+<p>CTP has several mechanisms in order to achieve high delivery
+reliability, but it does not promise 100% reliable delivery. It is a
+best effort protocol.</p>
+<p>CTP is designed for relatively low traffic rates such that there is
+enough space in the channel to transmit and receive routing frames
+even when the network is forwarding collection data
+frames. Bandwidth-limited systems or high data rate applications might
+benefit from a different protocol, which can, for example, pack
+multiple small frames into a single data-link packet or employ rate
+control mechanisms.</p>
+</div>
+<div class="section">
+<h1><a id="collection-and-ctp" name="collection-and-ctp">3. Collection and CTP</a></h1>
+<p>CTP uses expected transmissions (ETX) as its routing gradient. A root
+has an ETX of 0.  The ETX of a node is the ETX of its parent plus the
+ETX of its link to its parent. This additive measure assumes that
+nodes use link-level retransmissions.  Given a choice of valid routes,
+CTP SHOULD choose the one with the lowest ETX value. CTP represents
+ETX values as 16-bit decimal fixed-point real numbers with a precision
+of tenths. An ETX value of 45, for example, represents an ETX of 4.5,
+while an ETX value of 10 represents an ETX of 1.</p>
+<p>Routing loops are a problem that can emerge in a CTP network. Routing
+loops generally occur when a node choose a new route that has a
+significantly higher ETX than its old one, perhaps in response to
+losing connectivity with a candidate parent. If the new route includes
+a node which was a descendant, then a loop occurs.</p>
+<p>CTP addresses loops through two mechanisms. First, every CTP packet
+contains a node's current gradient value. If CTP receives a data frame with
+a gradient value lower than its own, then this indicates that there
+is an inconsistency in the tree. CTP tries to resolve the inconsistency
+by broadcasting a beacon frame, with the hope that the node which sent
+the data frame will hear it and adjust its routes accordingly. If a
+collection of nodes is separated from the rest of the network, then they
+will form a loop whose ETX increases forever. CTP's second mechanism
+is to not consider routes with an ETX higher than a reasonable constant.
+The value of this constant is implementation dependent.</p>
+<p>Packet duplication is an additional problem that can occur in CTP.
+Packet duplication occurs when a node receives a data frame
+successfully and transmits an ACK, but the ACK is not received. The
+sender retransmits the packet, and the receiver receives it a second
+time. This can have disasterous effects over multiple hops, as the
+duplication is exponential.  For example, if each hop on average
+produces one duplicate, then on the first hop there will be two
+packets, on the second there will be four, on the third there will be
+eight, etc. CTP keeps a small cache of packet signature for the
+packets it has seen to detect packet duplicates. When a new packet
+arrives, if its signature results in cache hit, CTP drops the packet
+because it is a duplicate.</p>
+<p>Routing loops complicate duplicate suppression, as a routing loop may
+cause a node to legitimately receive a packet more than once. Therefore,
+if a node suppresses duplicates based solely on originating address and
+sequence number, packets in routing loops may be dropped. CTP data frames
+therefore have an additional time has lived (THL) field, which the
+routing layer increments on each hop. A link-level retransmission has
+the same THL value, while a looped version of the packet is unlikely
+to do so.</p>
+</div>
+<div class="section">
+<h1><a id="ctp-data-frame" name="ctp-data-frame">4. CTP Data Frame</a></h1>
+<p>The CTP data frame format is as follows:</p>
+<pre class="literal-block">
+                     1
+ 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+|P|C| reserved  |      THL      |
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+|              ETX              |
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+|             origin            |
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+|     seqno     |   collect_id  |
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+|    data ...
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+</pre>
+<p>Field definitions are as follows:</p>
+<blockquote>
+<ul class="simple">
+<li>P: Routing pull. The P bit allows nodes to request routing information from other nodes. If the unicast destination of the data frame with a valid route hears a packet with the P bit set, it SHOULD transmit a routing frame in the near future. Nodes other than the link-layer destination of the data frame MAY respond to the P bit in the data frame.</li>
+<li>C: Congestion notification. If a node drops a CTP data frame, it MUST set the C field on the next data frame it transmits.</li>
+<li>THL: Time Has Lived. When a node generates a CTP data frame, it MUST set THL to 0. When a node receives a CTP data frame, it MUST increment the THL. If a node receives a THL of 255, it increments it to 0.</li>
+<li>ETX: The ETX routing metric of the single-hop sender. When a node transmits a CTP data frame, it MUST put the ETX value of its route through the single-hop destination in the ETX field.  If a node receives a packet with a lower gradient than its own, then it MUST schedule a routing frame in the near future.</li>
+<li>origin: The originating address of the packet. A node forwarding a data frame MUST NOT modify the origin field.</li>
+<li>seqno: Origin sequence number. The originating node sets this field, and a node forwarding a data frame MUST NOT modify it.</li>
+<li>collect_id: Higher-level protocol identifier. The origin sets this field, and a node forwarding a data frame MUST NOT modify it.</li>
+<li>data: the data payload, of zero or more bytes. A node forwarding a data frame MUST NOT modify the data payload. The length of the data field is computed by subtracting the size of the CTP header from the size of the link layer payload provided by the link layer.</li>
+</ul>
+</blockquote>
+<p>Together, the origin, seqno and collect_id fields denote a unique
+<strong>*origin packet.*</strong> Together, the origin, seqno, collect_id, and
+THL denote a unique <strong>*packet instance*</strong> within the network. The
+distinction is important for duplicate suppression in the presence
+of routing loops. If a node suppresses origin packets, then if
+asked to forward the same packet twice due to a routing loop, it will
+drop the packet. However, if it suppresses packet instances, then it
+will route successfully in the presence of transient loops unless the
+THL happens to wrap around to a forwarded packet instance.</p>
+<p>A node MUST send CTP data frames as unicast messages with link-layer
+acknowledgments enabled.</p>
+</div>
+<div class="section">
+<h1><a id="ctp-routing-frame" name="ctp-routing-frame">5. CTP Routing Frame</a></h1>
+<p>The CTP routing frame format is as follows:</p>
+<pre class="literal-block">
+                     1
+ 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+|P|C| reserved  |     parent    |
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+|     parent    |      ETX      |
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+|      ETX      |
++-+-+-+-+-+-+-+-+
+</pre>
+<p>The fields are as follows:</p>
+<blockquote>
+<ul class="simple">
+<li>P: Same as data frame with one difference: Routing frames are broadcast so multiple nodes respond to the P bit in the routing frame.</li>
+<li>C: Congestion notification. If a node drops a CTP data frame, it MUST set the C field on the next routing frame it transmits.</li>
+<li>parent: The node's current parent.</li>
+<li>metric: The node's current routing metric value.</li>
+</ul>
+</blockquote>
+<p>When a node hears a routing frame, it MUST update its routing table to
+reflect the address' new metric. If a node's ETX value changes
+significantly, then CTP SHOULD transmit a broadcast frame soon thereafter
+to notify other nodes, which might change their routes. The parent
+field acts as a surrogate for the single-hop destination field of
+a data packet: a parent can detect when a child's ETX is significantly
+below its own. When a parent hears a child advertise an ETX below its
+own, it MUST schedule a routing frame for transmission in the near
+future.</p>
+<p>A node MUST send CTP routing frames as broadcast messages.</p>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">6. Implementation</a></h1>
+<p>An implementation of CTP can be found in the tos/lib/net/ctp directory
+of TinyOS 2.0. This section describes the structure of that implementation
+and is not in any way part of the specification of CTP.</p>
+<p>This implementation has three major subcomponents:</p>
+<p>1) A <strong>link estimator</strong>, which is responsible for estimating the
+single-hop ETX of communication with single-hop neighbors.</p>
+<p>2) A <strong>routing engine</strong>, which uses link estimates as well as
+network-level information to decide which neighbor is the next
+routing hop.</p>
+<p>3) A <strong>forwarding engine</strong>, which maintains a queue of packets
+to send. It decides when and if to send them. The name is a little
+misleading: the forwarding engine is responsible for forwarded traffic
+as well as traffic generated on the node.</p>
+<div class="section">
+<h2><a id="link-estimation" name="link-estimation">6.1 Link Estimation</a></h2>
+<p>The implementation uses two mechanisms to estimate the quality of a link:
+periodic LEEP <a class="footnote-reference" href="#id6" id="id2" name="id2">[1]</a> packets and data packets. The implementation sends
+routing beacons as LEEP packets. These packets seed the neighbor table
+with bidirectional ETX values. The implementation adapts its beaconing
+rate based on network dynamics using an algorithm similar to the
+trickle dissemination protocol <a class="footnote-reference" href="#id7" id="id3" name="id3">[2]</a>. Beacons are sent on an exponentially
+increasing randomized timer. The implementation resets the timer to a
+small value when one or more of the following conditions are met:</p>
+<blockquote>
+<ol class="arabic simple">
+<li>The routing table is empty (this also sets the P bit)</li>
+<li>The node's routing ETX increases by &gt;= 1 transmission</li>
+<li>The node hears a packet with the P bit set</li>
+</ol>
+</blockquote>
+<p>The implementation augments the LEEP link estimates with data
+transmissions. This is a direct measure of ETX. Whenever the data path
+transmits a packet, it tells the link estimator the destination and
+whether it was successfully acknowledged. The estimator produces an
+ETX estimate every 5 such transmissions, where 0 successes has an ETX
+of 6.</p>
+<p>The estimator combines the beacon and data estimates by incorporating
+them into an exponentially weighted moving average. Beacon-based
+estimates seed the neighbor table. The expectation is that the low
+beacon rate in a stable network means that for a selected route,
+data estimates will outweigh beacon estimates. Additionally, as
+the rate at which CTP collects data estimates is proportional to
+the transmission rate, then it can quickly detect a broken link and
+switch to another candidate neighbor.</p>
+<p>The component <tt class="docutils literal"><span class="pre">tos/lib/net/4bitle/LinkEstimatorP</span></tt> implements the
+link estimator. It couples LEEP-based and data-based estimates as
+described in <a class="footnote-reference" href="#id9" id="id4" name="id4">[4]</a>.</p>
+</div>
+<div class="section">
+<h2><a id="routing-engine" name="routing-engine">6.2 Routing Engine</a></h2>
+<p>The implementation's routing engine is responsible for picking the next
+hop for a data transmission. It keeps track of the path ETX values of
+a subset of the nodes maintained by the link estimation table. The minimum
+cost route has the smallest sum the path ETX from that node and the link
+ETX of that node. The path ETX is therefore the sum of link ETX values
+along the entire route. The component <tt class="docutils literal"><span class="pre">tos/lib/net/ctp/CtpRoutingEngineP</span></tt>
+implements the routing engine.</p>
+</div>
+<div class="section">
+<h2><a id="forwarding-engine" name="forwarding-engine">6.3 Forwarding Engine</a></h2>
+<p>The component <tt class="docutils literal"><span class="pre">tos/lib/net/ctp/CtpForwardingEngineP</span></tt> implements the
+forwarding engine. It has five responsibilities:</p>
+<blockquote>
+<ol class="arabic simple">
+<li>Transmitting packets to the next hop, retransmitting when necessary, and
+passing acknowledgment based information to the link estimator</li>
+<li>Deciding <em>when</em> to transmit packets to the next hop</li>
+<li>Detecting routing inconsistencies and informing the routing engine</li>
+<li>Maintaining a queue of packets to transmit, which are a mix of locally
+generated and forwarded packets</li>
+<li>Detecting single-hop transmission duplicates caused by lost acknowledgments</li>
+</ol>
+</blockquote>
+<p>The four key functions of the forwading engine are packet reception
+(<tt class="docutils literal"><span class="pre">SubReceive.receive()</span></tt>), packet forwarding (<tt class="docutils literal"><span class="pre">forward()</span></tt>), packet
+transmission (<tt class="docutils literal"><span class="pre">sendTask()</span></tt>) and deciding what to do after a packet
+transmission (<tt class="docutils literal"><span class="pre">SubSend.sendDone()</span></tt>).</p>
+<p>The receive function decides whether or not the node should forward a
+packet. It checks for duplicates using a small cache of recently received
+packets. If it decides a packet is not a duplicate, it calls the
+forwading function.</p>
+<p>The forwarding function formats the packet for forwarding. It checks the
+received packet to see if there is possibly a loop in the network.
+It checks if there is space in the transmission queue.
+If there is no space, it drops the packet and sets the C bit. If the
+transmission queue was empty, then it posts the send task.</p>
+<p>The send task examines the packet at the head of the transmission
+queue, formats it for the next hop (requests the route from the
+routing layer, etc.), and submits it to the AM layer.</p>
+<p>When the send completes, sendDone examines the packet to see the result.
+If the packet was acknowledged, it pulls the packet off the transmission
+queue. If the packet was locally generated, it signals sendDone() to the
+client above. If it was forwarded, it returns the packet to the forwarding
+message pool. If there are packets remaining in the queue (e.g., the
+packet was not acknowledged), it starts a randomized timer that reposts
+this task. This timer essentially rate limits CTP so that it does not
+stream packets as quickly as possible, in order to prevent self-collisions
+along the path.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">7. Citations</a></h1>
+<div class="line-block">
+<div class="line">Rodrigo Fonseca</div>
+<div class="line">473 Soda Hall</div>
+<div class="line">Berkeley, CA 94720-1776</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 510 642-8919</div>
+<div class="line">email - <a class="reference" href="mailto:rfonseca&#64;cs.berkeley.edu">rfonseca&#64;cs.berkeley.edu</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Omprakash Gnawali</div>
+<div class="line">Ronald Tutor Hall (RTH) 418</div>
+<div class="line">3710 S. McClintock Avenue</div>
+<div class="line">Los Angeles, CA 90089</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 213 821-5627</div>
+<div class="line">email - <a class="reference" href="mailto:gnawali&#64;usc.edu">gnawali&#64;usc.edu</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Kyle Jamieson</div>
+<div class="line">The Stata Center</div>
+<div class="line">32 Vassar St.</div>
+<div class="line">Cambridge, MA 02139</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:jamieson&#64;csail.mit.edu">jamieson&#64;csail.mit.edu</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Computer Science Laboratory</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Alec Woo</div>
+<div class="line">Arch Rock Corporation</div>
+<div class="line">501 2nd St. Ste 410</div>
+<div class="line">San Francisco, CA 94107-4132</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:awoo&#64;archrock.com">awoo&#64;archrock.com</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Sukun Kim</div>
+<div class="line">Samsung Electronics</div>
+<div class="line">416 Maetan-3-dong, Yeongtong-Gu</div>
+<div class="line">Suwon, Gyeonggi 443-742</div>
+<div class="line">Korea, Republic of</div>
+<div class="line"><br /></div>
+<div class="line">phone - +82 10 3065 6836</div>
+<div class="line">email - <a class="reference" href="mailto:sukun.kim&#64;samsung.com">sukun.kim&#64;samsung.com</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="id5" name="id5">8. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id6" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="id6">[1]</a></td><td>TEP 124: Link Estimation Extension Protocol</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id7" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="id7">[2]</a></td><td>Philip Levis, Neil Patel, David Culler and Scott Shenker. &quot;A
+Self-Regulating Algorithm for Code Maintenance and Propagation
+in Wireless Sensor Networks.&quot; In Proceedings of the First USENIX
+Conference on Networked Systems Design and Implementation (NSDI), 2004.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id8" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="id8">[3]</a></td><td>TEP 119: Collection.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id9" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id4" name="id9">[4]</a></td><td>Rodrigo Fonseca, Omprakash Gnawali, Kyle Jamieson, and Philip Levis.
+&quot;Four Bit Wireless Link Estimation.&quot; In Proceedings of the Sixth Workshop
+on Hot Topics in Networks (HotNets VI), November 2007.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="the-link-estimation-exchange-protocol-leep">
+<h1 class="title">The Link Estimation Exchange Protocol (LEEP)</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">124</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Network Protocol Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Omprakash Gnawali</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">05-Feb-2006</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.9</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2009-01-31</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>The memo documents the Link Estimation Exchange Protocol (LEEP). Nodes
+use LEEP to estimate and exchange information about the quality of
+links to the neighbors.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>Routing protocols often require bi-directional link qualities to
+compute the routes. Nodes can estimate the quality of the in-bound
+link from a neighbor by estimating the ratio of successfully received
+messages and the total transmitted messages. LEEP appends in-bound
+packet reception rate (PRR) estimates to packets. Other nodes hearing
+these packets can combine the in-bound PRR values with their own
+in-bound values to compute bi-directional link quality. Thus, LEEP is
+a discovery and link table bootstrapping mechanism. The link quality
+is often fine-tuned using different mechanisms.</p>
+<p>Link quality estimates obtained using LEEP are often used as a
+bootstrapping values in the link quality table; data transmission
+statistics can later be used to make these estimates more accurate.</p>
+</div>
+<div class="section">
+<h1><a id="definitions" name="definitions">2. Definitions</a></h1>
+<div class="section">
+<h2><a id="in-bound-link-quality" name="in-bound-link-quality">2.1 In-bound Link Quality</a></h2>
+<p>In a node pair (A,B), with B as the node of reference, in-bound link
+quality is a value in the range of 0 to 255 that describes the quality
+of the link from A to B estimated by B by counting the successfully
+received packets from A among all the packets transmitted by A. Thus,
+in-bound link quality is the empirical probability that a packet will
+be successfully received on a given link. A value of 255 represents a
+probability of 1 and a value of 0 represents a probability of 0 of
+successfully receiving a packet on a given link.</p>
+</div>
+<div class="section">
+<h2><a id="out-bound-link-quality" name="out-bound-link-quality">2.2 Out-bound Link Quality</a></h2>
+<p>In a node pair (A,B), with B as the node of reference, out-bound link
+quality is defined as the quality of the link from B to A. B can
+determine the out-bound link quality if A advertises its in-bound link
+qualities. LEEP is the protocol that is used to exchange the in-bound
+link qualities.</p>
+</div>
+<div class="section">
+<h2><a id="bi-directional-link-quality" name="bi-directional-link-quality">2.3 Bi-directional Link Quality</a></h2>
+<p>LEEP does not define or compute bi-directional link quality. LEEP
+provides a way to exchange sufficient information to compute in-bound
+and out-bound link qualities. These two link qualities can be used to
+compute the bi-directional link quality. One popular way to define the
+bi-directional link quality between a node pair (A,B) as the
+probability that a packet transmitted by A will be successfully
+received and acknowledged by B. This approach computes the
+bi-directional link quality of a node pair (A,B) as the product of the
+link quality of (A,B) and (B,A).</p>
+</div>
+<div class="section">
+<h2><a id="link-information-entry" name="link-information-entry">2.4 Link Information Entry</a></h2>
+<p>Link Information Entry created by node k is a tuple (n,q) where q is
+the in-bound link quality from node n to k.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="id1" name="id1">3. The Link Estimation Exchange Protocol (LEEP)</a></h1>
+<div class="section">
+<h2><a id="assumptions" name="assumptions">3.1 Assumptions</a></h2>
+<p>Following are the assumptions made by LEEP:</p>
+<p>3.1.1. The data link frame has a single-hop source field.
+3.1.2. The data link layer provides a broadcast address.
+3.1.3. The data link layer provides the length of the LEEP frame.</p>
+</div>
+<div class="section">
+<h2><a id="the-protocol" name="the-protocol">3.2 The Protocol</a></h2>
+<p>To compute the bi-directional link quality, in-bound link quality must
+be exchanged among the neighbors. LEEP maintains a sequence number
+that is incremented by one for each outgoing LEEP frame. The sequence
+number in the LEEP frame MUST be incremented by one even if the data
+link layer retransmits the LEEP frame. The LEEP sequence number MAY be
+used to count the number of missing packets to estimate the in-bound
+link quality from the transmitter. LEEP MUST transmit Link Information
+entries describing the in-bound link qualities for a subset of its
+neighbors. The Link Information entry on the LEEP frame allows the
+receiver node to find the out-bound link quality to the transmitter
+node identified by the data link source address. Thus, LEEP is also a
+way for nodes to discover new nodes and links in the network.</p>
+<p>Link quality estimation is inherently imperfect - data transmission
+and link quality estimation might be done at different timescales. The
+PRR for LEEP frames (broadcast) and data frames (unicast) might be
+different. So LEEP is better used as a link quality bootstrapping
+mechanism. The link quality estimate can be made more accurate later
+using data transmission statistics.</p>
+</div>
+<div class="section">
+<h2><a id="leep-frame" name="leep-frame">3.3 LEEP Frame</a></h2>
+<p>A LEEP frame has a header, the payload, and a footer with the Link
+Information (LI) entries as shown in this diagram:</p>
+<pre class="literal-block">
+-------------------------------------------------------------
+|   LEEP   | Payload | LI Entry | LI Entry | ... | LI Entry |
+|  Header  |         |     1    |     2    |     |     n    |
+-------------------------------------------------------------
+</pre>
+<p>The number of Link Information entries can be different in each
+outgoing LEEP frame. The number of Link Information entries MUST not
+increase the size of the LEEP frame beyond the maximum payload length
+allowed by the data link layer. A LEEP frame can have 0 Link
+Information entry.</p>
+</div>
+<div class="section">
+<h2><a id="leep-header" name="leep-header">3.3.1 LEEP header</a></h2>
+<p>The following diagram shows the LEEP header format:</p>
+<pre class="literal-block">
+                     1
+ 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+|nentry | rsrvd |     seqno     |
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+</pre>
+<p>Field definitions:</p>
+<blockquote>
+<ul class="simple">
+<li>nentry - Number of Link Information entries in the footer</li>
+<li>seqno - LEEP sequence number.</li>
+<li>rsrvd - Reserved and must be set to 0.</li>
+</ul>
+</blockquote>
+</div>
+<div class="section">
+<h2><a id="id2" name="id2">3.3.2 Link Information Entry</a></h2>
+<p>The following diagram shows the Link Information Entry format:</p>
+<pre class="literal-block">
+                     1
+ 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+|            node id            |
++-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+| link quality  |
++-+-+-+-+-+-+-+-+
+</pre>
+<p>Field definitions:</p>
+<blockquote>
+<ul class="simple">
+<li>node id: the link layer address of the neighbor</li>
+<li>link quality: The in-bound link quality from the node identified by node id
+to the node that transmits this Link Information entry</li>
+</ul>
+</blockquote>
+</div>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">4. Implementation</a></h1>
+<p>The following files in <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/lib/net/le</span></tt> provide a
+reference implementation of LEEP described in this TEP.</p>
+<blockquote>
+<ul class="simple">
+<li><tt class="docutils literal"><span class="pre">LinkEstimator.h</span></tt> and <tt class="docutils literal"><span class="pre">LinkEstimatorP.nc</span></tt></li>
+</ul>
+</blockquote>
+<p>The reference implementation uses the LEEP sequence number to count
+the number of missing packets to estimate the in-bound link
+quality. The implementation tries to append Link Information entry for
+all the neighbors in its neighbor table by sending the largest
+possible data link frame. If there is still not enough room to fit all
+the Link Information entries, it uses a round-robin policy to select
+the entries to be exchanged that could not fit in the previous LEEP
+frame. The LEEP frames are transmitted whenever the CTP <a class="footnote-reference" href="#id5" id="id3" name="id3">[1]</a> beacons,
+sent as a LEEP payload, are sent.</p>
+<p>Another reference implementation resides in
+<tt class="docutils literal"><span class="pre">tinyos-2.x/tos/lib/net/4bitle</span></tt>. This implementation is described in
+detail in <a class="footnote-reference" href="#id6" id="id4" name="id4">[2]</a>.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">5. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Omprakash Gnawali</div>
+<div class="line">Ronald Tutor Hall (RTH) 418</div>
+<div class="line">3710 S. McClintock Avenue</div>
+<div class="line">Los Angeles, CA 90089</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 213 821-5627</div>
+<div class="line">email - <a class="reference" href="mailto:gnawali&#64;usc.edu">gnawali&#64;usc.edu</a></div>
+<div class="line"><br /></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">6. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id5" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="id5">[1]</a></td><td>TEP 123: The Collection Tree Protocol.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id6" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id4" name="id6">[2]</a></td><td>Rodrigo Fonseca, Omprakash Gnawali, Kyle Jamieson, and Philip Levis.
+&quot;Four Bit Wireless Link Estimation.&quot; In Proceedings of the Sixth Workshop
+on Hot Topics in Networks (HotNets VI), November 2007.</td></tr>
+</tbody>
+</table>
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+</head>
+<body>
+<div class="document" id="tinyos-802-15-4-frames">
+<h1 class="title">TinyOS 802.15.4 Frames</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">125</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Jonathan Hui, Philip Levis, and David Moss</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">2-Feb-2007</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.6</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2008-06-20</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo documents the frame format for 802.15.4 packets in TinyOS
+2.0.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>802.15.4 is a data-link and physical packet format for
+low-power wireless networks that is used in many TinyOS platforms.
+The TinyOS 2.0 active message layer adds a packet field for higher-level
+protocol dispatch. This document describes the two TinyOS 2.0 frame format
+for 802.15.4 networks. The first format is for isolated TinyOS networks;
+the second format is for networks that share the spectrum with 6lowpan
+networks[1]_.</p>
+</div>
+<div class="section">
+<h1><a id="id1" name="id1">2. 802.15.4</a></h1>
+<p>802.15.4 supports several different source and destination addressing
+modes, and so has a variable sized packet header.[2]_ A TinyOS device MUST
+support packet frames with 16-bit short source and destination addresses.
+A TinyOS device MAY support additional 802.15.4 frame formats.</p>
+</div>
+<div class="section">
+<h1><a id="frame-format" name="frame-format">3. Frame Format</a></h1>
+<p>TinyOS has two 802.15.4 frame formats. The first format, the T-Frame, is
+for TinyOS networks which do not share their channel with other wireless
+networking architectures. This frame format assumes that TinyOS can use
+every bit of the packet and does not need to state that it is a TinyOS packet.
+T-Frame stands for &quot;TinyOS Frame.&quot;</p>
+<p>The TinyOS 802.15.4 T-frame format is as follows:</p>
+<pre class="literal-block">
++-------------------+---------+------------------------------+--------------+
+| 802.15.4 Header   | AM type |            data              | 802.15.4 CRC |
++-------------------+---------+------------------------------+--------------+
+</pre>
+<p>AM type is a single byte field which indicates which active message type
+the payload contains.</p>
+<p>The second format, the I-Frame, is for TinyOS networks which share their
+channel with 6lowpan networks. 6lowpan reserves a series of codes for the
+first byte of the payload for non-6lowpan packets. In order to interoperate
+with 6lowpan networks, TinyOS I-Frames specify such a field. I-Frame stands
+for &quot;Interoperable Frame.&quot;</p>
+<p>The TinyOS 802.15.4 I-frame format is as follows:</p>
+<pre class="literal-block">
++-------------------+---------+---------+--------------------+--------------+
+| 802.15.4 Header   | 6lowpan | AM type |        data        | 802.15.4 CRC |
++-------------------+---------+------------------------------+--------------+
+</pre>
+<p>AM type is the same as in a T-frame. 6lowpan is the NALP code to
+identify this as a TinyOS packet. NALP codes must be in the range of
+0-63.  TinyOS uses code 63 (0x3F).</p>
+<p>The AM type 63 is reserved for both T-Frames and I-Frames. A TinyOS
+program MUST NOT use it.</p>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">4. Implementation</a></h1>
+<p>An implementation of T-Frames and I-Frames can be found in
+tinyos-2.x/tos/chips/cc2420/.  The components in
+tos/chips/cc2420/lowpan/ control which is used. By default, TinyOS
+802.15.4 stacks use I-Frames, and the 'tframe' make option configures
+them to use T-Frames. This make option defines a symbol named
+<tt class="docutils literal"><span class="pre">TFRAMES_ENABLED</span></tt>. In the case of the CC2420 stack, this causes
+<tt class="docutils literal"><span class="pre">CC2420.h</span></tt> to define <tt class="docutils literal"><span class="pre">CC2420_IFRAME_TYPE</span></tt>, which adds the extra
+byte to the message_t header structure.</p>
+</div>
+<div class="section">
+<h1><a id="author-addresses" name="author-addresses">5. Author Addresses</a></h1>
+<div class="line-block">
+<div class="line">Jonathan Hui</div>
+<div class="line">657 Mission St. Ste. 600</div>
+<div class="line">Arched Rock Corporation</div>
+<div class="line">San Francisco, CA 94105-4120</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 415 692 0828</div>
+<div class="line">email - <a class="reference" href="mailto:jhui&#64;archedrock.com">jhui&#64;archedrock.com</a></div>
+<div class="line"><br /></div>
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305-9030</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">David Moss</div>
+<div class="line">Rincon Research Corporation</div>
+<div class="line">101 N. Wilmot, Suite 101</div>
+<div class="line">Tucson, AZ  85750</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 520 519 3138</div>
+<div class="line">email - <a class="reference" href="mailto:dmm&#64;rincon.com">dmm&#64;rincon.com</a></div>
+</div>
+</div>
+</div>
+</body>
+</html>
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+<body>
+<div class="document" id="cc2420-radio-stack">
+<h1 class="title">CC2420 Radio Stack</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">126</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>David Moss, Jonathan Hui, Philip Levis, and Jung Il Choi</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">5-Mar-2007</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.5</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2007-06-14</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This TEP documents the architecture of the CC2420 low power listening
+radio stack found in TinyOS 2.x.  Radio stack layers and implementation
+details of the CC2420 stack will be discussed.  Readers will be better
+informed about existing features, possible improvements, and limitations
+of the CC2420 radio stack.  Furthermore, lessons learned from
+the construction of the stack can help guide development
+of future TinyOS radio stacks.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>The TI/Chipcon CC2420 radio is a complex device, taking care of
+many of the low-level details of transmitting and receiving packets
+through hardware.  Specifying the proper behavior of that hardware
+requires a well defined radio stack implementation.  Although much
+of the functionality is available within the radio chip itself, there
+are still many factors to consider when implementing a flexible,
+general radio stack.</p>
+<p>The software radio stack that drives the CC2420 radio consists of
+many layers that sit between the application and hardware.  The highest
+levels of the radio stack modify data and headers in each packet, while
+the lowest levels determine the actual send and receive behavior.
+By understanding the functionality at each layer of the stack, as well
+as the architecture of a layer itself, it is possible to easily extend
+or condense the CC2420 radio stack to meet project requirements.</p>
+<p>Some details about the CC2420 are out of the scope of this document.
+These details can be found in the CC2420 datasheet <a class="footnote-reference" href="#id11" id="id1" name="id1">[1]</a>.</p>
+</div>
+<div class="section">
+<h1><a id="cc2420-radio-stack-layers" name="cc2420-radio-stack-layers">2. CC2420 Radio Stack Layers</a></h1>
+<div class="section">
+<h2><a id="layer-architecture" name="layer-architecture">2.1 Layer Architecture</a></h2>
+<p>The CC2420 radio stack consists of layers of functionality stacked
+on top of each other to provide a complete mechanism that
+modifies, filters, transmits, and controls inbound and outbound messages.
+Each layer is a distinct module that can provide and use three sets of
+interfaces in relation to the actual radio stack:  Send, Receive, and
+SplitControl.  If a general layer provides one of those interfaces, it
+also uses that interface from the layer below it in the stack.  This
+allows any given layer to be inserted anywhere in the stack through
+independant wiring. For example::</p>
+<pre class="literal-block">
+provides interface Send;
+uses interface Send as SubSend;
+
+provides interface Receive;
+uses interface Receive as SubReceive;
+
+provides interface SplitControl;
+uses interface SplitControl as subControl;
+</pre>
+<p>The actual wiring of the CC2420 radio stack is done at the highest level
+of the stack, inside CC2420ActiveMessageC.  This configuration defines
+three branches:  Send, Receive, and SplitControl. Note that not all
+layers need to provide and use all three Send, Receive, and SplitControl
+interfaces::</p>
+<pre class="literal-block">
+// SplitControl Layers
+SplitControl = LplC;
+LplC.SubControl -&gt; CsmaC;
+
+// Send Layers
+AM.SubSend -&gt; UniqueSendC;
+UniqueSendC.SubSend -&gt; LinkC;
+LinkC.SubSend -&gt; LplC.Send;
+LplC.SubSend -&gt; TinyosNetworkC.Send;
+TinyosNetworkC.SubSend -&gt; CsmaC;
+
+// Receive Layers
+AM.SubReceive -&gt; LplC;
+LplC.SubReceive -&gt; UniqueReceiveC.Receive;
+UniqueReceiveC.SubReceive -&gt; TinyosNetworkC.Receive;
+TinyosNetworkC.SubReceive -&gt; CsmaC;
+</pre>
+<p>If another layer were to be added, CC2420ActiveMessageC would need
+to be modified to wire it into the correct location.</p>
+</div>
+<div class="section">
+<h2><a id="layer-descriptions" name="layer-descriptions">2.1 Layer Descriptions</a></h2>
+<p>The layers found within this radio stack are in the following order:</p>
+<ul>
+<li><p class="first">ActiveMessageP:  This is the highest layer in the stack, responsible
+for filling in details in the packet header and providing information
+about the packet to the application level <a class="footnote-reference" href="#id12" id="id2" name="id2">[2]</a>.  Because the CC2420 radio
+chip itself uses 802.15.4 headers in hardware <a class="footnote-reference" href="#id11" id="id3" name="id3">[1]</a>, it is not possible
+for the layer to rearrange header bytes.</p>
+</li>
+<li><p class="first">UniqueSend:  This layer generates a unique Data Sequence
+Number (DSN) byte for the packet header.  This byte is incremented once
+per outgoing packet, starting with a pseudo-randomly generated number.
+A receiver can detect duplicate packets by comparing
+the source and DSN byte of a received packet with previous packets.
+DSN is defined in the 802.15.4 specification <a class="footnote-reference" href="#id13" id="id4" name="id4">[3]</a>.</p>
+</li>
+<li><p class="first">PacketLink: This layer provides automatic retransmission functionality
+and is responsible for retrying a packet transmission if no
+acknowledgement was heard from the receiver.  PacketLink is
+activated on a per-message basis, meaning the outgoing packet will
+not use PacketLink unless it is configured ahead of time to do so.
+PacketLink is most reliable when software acknowledgements are enabled
+as opposed to hardware auto acknowledgements.</p>
+</li>
+<li><p class="first">CC2420AckLplP / CC2420NoAckLplP <a class="footnote-reference" href="#id14" id="id5" name="id5">[4]</a>:  These layers provide
+asynchronous low power listening implementations.  Supporting both of them
+is CC2420DutyCycleP.  The DutyCycleP component is responsible for
+turning the radio on and off and performing receive checks.
+After a detection occurs, DutyCycleP is hands off responsibility to
+LowPowerListeningP to perform some transaction and turn the radio off
+when convenient.  Low power listening transmissions are activated on
+a per-message basis, and the layer will continuously retransmit the full outbound
+packet until either a response from the receiver is heard or the
+transmit time expires.</p>
+<p>The AckLplP implementation supports acknowledgement gaps during the
+low power listening packetized preamble, which allows
+transmitters to stop early but penalizes receive check lengths.
+AckLplP low power listening is optimal for high transmission, long
+receive check interval networks.</p>
+<p>The NoAckLplP implementation does not support acknowledgements during
+the packetized preamble.  It continuously modulates the channel,
+allowing the receiver to perform the smallest possible receive check.
+NoAckLpl low power listening is effective for low transmission, short
+receive check interval networks.</p>
+</li>
+<li><p class="first">UniqueReceive: This layer maintains a history of the source address
+and DSN byte of the past few packets it has received, and helps
+filter out duplicate received packets.</p>
+</li>
+<li><p class="first">TinyosNetworkC: This layer allows the TinyOS 2.x radio stack to
+interoperate with other non-TinyOS networks.  Proposed 6LowPAN
+specifications include a network identifier byte after the
+standard 802.15.4 header <a class="footnote-reference" href="#id15" id="id6" name="id6">[5]</a>. If interoperability frames are
+used, the dispatch layer provides functionality for setting
+the network byte on outgoing packets and filtering non-TinyOS
+incoming packets.</p>
+</li>
+<li><p class="first">CsmaC:  This layer is responsible for defining 802.15.4 FCF
+byte information in the outbound packet, providing default
+backoff times when the radio detects a channel in use, and
+defining the power-up/power-down procedure for the radio.</p>
+</li>
+<li><p class="first">TransmitP/ReceiveP: These layers are responsible for interacting
+directly with the radio through the SPI bus, interrupts, and GPIO lines.</p>
+</li>
+</ul>
+<blockquote>
+<table border="1" class="docutils">
+<colgroup>
+<col width="47%" />
+<col width="53%" />
+</colgroup>
+<tbody valign="top">
+<tr><td colspan="2">Application Layer</td>
+</tr>
+</tbody>
+</table>
+<blockquote>
+<table border="1" class="docutils">
+<colgroup>
+<col width="47%" />
+<col width="53%" />
+</colgroup>
+<tbody valign="top">
+<tr><td colspan="2">Active Message Layer</td>
+</tr>
+</tbody>
+</table>
+<table border="1" class="docutils">
+<colgroup>
+<col width="47%" />
+<col width="53%" />
+</colgroup>
+<tbody valign="top">
+<tr><td colspan="2">Unique Send Layer</td>
+</tr>
+</tbody>
+</table>
+<table border="1" class="docutils">
+<colgroup>
+<col width="47%" />
+<col width="53%" />
+</colgroup>
+<tbody valign="top">
+<tr><td colspan="2">Optional Packet Link Layer</td>
+</tr>
+</tbody>
+</table>
+<table border="1" class="docutils">
+<colgroup>
+<col width="47%" />
+<col width="53%" />
+</colgroup>
+<tbody valign="top">
+<tr><td colspan="2">Optional Low Power Listening Implementations</td>
+</tr>
+</tbody>
+</table>
+<table border="1" class="docutils">
+<colgroup>
+<col width="47%" />
+<col width="53%" />
+</colgroup>
+<tbody valign="top">
+<tr><td colspan="2">Unique Receive Filtering Layer</td>
+</tr>
+</tbody>
+</table>
+<table border="1" class="docutils">
+<colgroup>
+<col width="47%" />
+<col width="53%" />
+</colgroup>
+<tbody valign="top">
+<tr><td colspan="2">Optional 6LowPAN TinyOS Network Layer</td>
+</tr>
+</tbody>
+</table>
+<table border="1" class="docutils">
+<colgroup>
+<col width="47%" />
+<col width="53%" />
+</colgroup>
+<tbody valign="top">
+<tr><td colspan="2">Carrier Sense Multiple Access (CSMA)</td>
+</tr>
+</tbody>
+</table>
+</blockquote>
+<p>+----------+----------+   +----------+----------+
+|      ReceiveP       |   |      TransmitP      |
++----------+----------+   +----------+----------+</p>
+<table border="1" class="docutils">
+<colgroup>
+<col width="48%" />
+<col width="52%" />
+</colgroup>
+<tbody valign="top">
+<tr><td colspan="2">SPI bus, GPIO, Interrupts, Timer Capture</td>
+</tr>
+</tbody>
+</table>
+</blockquote>
+</div>
+</div>
+<div class="section">
+<h1><a id="cc2420-packet-format-and-specifications" name="cc2420-packet-format-and-specifications">3. CC2420 Packet Format and Specifications</a></h1>
+<p>The CC2420 Packet structure is defined in CC2420.h.  The default
+I-Frame CC2420 header takes on the following format::</p>
+<pre class="literal-block">
+typedef nx_struct cc2420_header_t {
+  nxle_uint8_t length;
+  nxle_uint16_t fcf;
+  nxle_uint8_t dsn;
+  nxle_uint16_t destpan;
+  nxle_uint16_t dest;
+  nxle_uint16_t src;
+  nxle_uint8_t network;  // optionally included with 6LowPAN layer
+  nxle_uint8_t type;
+} cc2420_header_t;
+</pre>
+<p>All fields up to 'network' are 802.15.4 specified fields, and are
+used in the CC2420 hardware itself. The 'network' field is a 6LowPAN
+interoperability specification <a class="footnote-reference" href="#id15" id="id7" name="id7">[5]</a> only to be included when the
+6LowPAN TinyosNetwork layer is included.  The 'type' field is a
+TinyOS specific field.</p>
+<p>The TinyOS T-Frame packet does not include the 'network' field, nor
+the functionality found in the Dispatch layer to set and check
+the 'network' field.</p>
+<p>No software footer is defined for the CC2420 radio.  A 2-byte
+CRC byte is auto-appended to each outbound packet by the CC2420 radio
+hardware itself.</p>
+<p>The maximum size of a packet is 128 bytes including its headers and
+CRC, which matches the 802.15.4 specifications.  Increasing the
+packet size will increase data throughput and RAM consumption
+in the TinyOS application, but will also increase the probability
+that interference will cause the packet to be destroyed and need
+to be retransmitted. The TOSH_DATA_LENGTH preprocessor variable can
+be altered to increase the size of the message_t payload at
+compile time <a class="footnote-reference" href="#id12" id="id8" name="id8">[2]</a>.</p>
+</div>
+<div class="section">
+<h1><a id="csma-ca" name="csma-ca">4. CSMA/CA</a></h1>
+<div class="section">
+<h2><a id="clear-channel-assessment" name="clear-channel-assessment">4.1 Clear Channel Assessment</a></h2>
+<p>By default, the CC2420 radio stack performs a clear channel assessment
+(CCA) before transmitting.  If the channel is not clear, the radio backs
+off for some short, random period of time before attempting to transmit
+again.  The CC2420 chip itself provides a strobe command to transmit
+the packet if the channel is currently clear.</p>
+<p>To specify whether or not to transmit with clear channel assessment,
+the CC2420TransmitP requests CCA backoff input through the RadioBackoff
+interface on a per-message basis.  By default, each packet will be
+transmitted with CCA enabled.</p>
+<p>If layers above the CSMA layer wish to disable the clear channel
+assessments before transmission, they must intercept the
+RadioBackoff.requestCca(...) event for that message and call back
+using RadioBackoff.setCca(FALSE).</p>
+</div>
+<div class="section">
+<h2><a id="radio-backoff" name="radio-backoff">4.2 Radio Backoff</a></h2>
+<p>A backoff is a period of time where the radio pauses before attempting
+to transmit. When the radio needs to backoff, it can choose one of three
+backoff periods:  initialBackoff, congestionBackoff, and lplBackoff.
+These are implemented through the RadioBackoff interface, which signals
+out a request to specify the backoff period.  Unlike the CsmaBackoff
+interface, components that are interested in adjusting the backoff can
+call back using commands in the RadioBackoff interface.  This allows
+multiple components to adjust the backoff period for packets they are
+specifically listening to adjust.  The lower the backoff period, the
+faster the transmission, but the more likely the transmitter is to hog
+the channel.  Also, backoff periods should be as random as possible
+to prevent two transmitters from sampling the channel at the same
+moment.</p>
+<p>InitialBackoff is the shortest backoff period, requested on the first
+attempt to transmit a packet.</p>
+<p>CongestionBackoff is a longer backoff period used when the channel is
+found to be in use.  By using a longer backoff period in this case,
+the transmitter is less likely to unfairly tie up the channel.</p>
+<p>LplBackoff is the backoff period used for a packet being delivered
+with low power listening.  Because low power listening requires
+the channel to be modulated as continuously as possible while avoiding
+interference with other transmitters, the low power listening
+backoff period is intentionally short.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="acknowledgements" name="acknowledgements">5. Acknowledgements</a></h1>
+<div class="section">
+<h2><a id="hardware-vs-software-acknowledgements" name="hardware-vs-software-acknowledgements">5.1 Hardware vs. Software Acknowledgements</a></h2>
+<p>Originally, the CC2420 radio stack only used hardware generated
+auto-acknowledgements provided by the CC2420 chip itself.  This led
+to some issues, such as false acknowledgements where the radio chip
+would receive a packet and acknowledge its reception and the
+microcontroller would never actually receive the packet.</p>
+<p>The current CC2420 stack uses software acknowledgements, which
+have a higher drop percentage. When used with the UniqueSend
+and UniqueReceive interfaces, dropped acknowledgements are more desirable
+than false acknowledgements.  Received packets are always acknowledged
+before being filtered as a duplicate.</p>
+<p>Use the PacketAcknowledgements or PacketLink interfaces
+to determine if a packet was successfully acknowledged.</p>
+</div>
+<div class="section">
+<h2><a id="data-sequence-numbers-uniquesend-and-uniquereceive" name="data-sequence-numbers-uniquesend-and-uniquereceive">5.2 Data Sequence Numbers - UniqueSend and UniqueReceive</a></h2>
+<p>The 802.15.4 specification identifies a Data Sequence Number (DSN)
+byte in the message header to filter out duplicate packets <a class="footnote-reference" href="#id13" id="id9" name="id9">[3]</a>.</p>
+<p>The UniqueSend interface at the top of the CC2420 radio stack is
+responsible for setting the DSN byte.  Upon boot, an initial DSN
+byte is generated using a pseudo-random number generator with a
+maximum of 8-bits (256) values.  This number is incremented on
+each outgoing packet transmission.  Even if lower levels such as
+PacketLink or LowPowerListening retransmit the packet, the DSN byte
+stays the same for that packet.</p>
+<p>The UniqueReceive interface at the bottom of the CC2420 radio stack
+is responsible for filtering out duplicate messages based on
+source address and DSN.  The UniqueReceive interface is not meant
+to stop sophisticated replay attacks.  '</p>
+<p>As packets are received, DSN and source address information is placed
+into elements of an array. Each subsequent message from previously
+logged addresses overwrite information in the element allocated to
+that source address. This prevents UniqueReceive's history from
+losing DSN byte information from sources that are not able to access
+the channel as often. If the number of elements in the history array
+runs out, UniqueReceive uses a best effort method to avoid replacing
+recently updated DSN/Source information entries.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="packetlink-implementation" name="packetlink-implementation">6. PacketLink Implementation</a></h1>
+<p>PacketLink is a layer added to the CC2420 radio stack to help unicast
+packets get delivered successfully.  In previous version of TinyOS radio
+stacks, it was left up to the application layer to retry a message
+transmission if the application determined the message was not properly
+received.  The PacketLink layer helps to remove the reliable delivery
+responsibility and functional baggage from application layers.</p>
+<div class="section">
+<h2><a id="compiling-in-the-packetlink-layer" name="compiling-in-the-packetlink-layer">6.1 Compiling in the PacketLink layer</a></h2>
+<p>Because the PacketLink layer uses up extra memory footprint,
+it is not compiled in by default.  Developers can simply define
+the preprocessor variable PACKET_LINK to compile the functionality
+of the PacketLink layer in with the CC2420 stack.</p>
+</div>
+<div class="section">
+<h2><a id="implementation-and-usage" name="implementation-and-usage">6.2 Implementation and Usage</a></h2>
+<p>To send a message using PacketLink, the PacketLink
+interface must be called ahead of time to specify two fields in the outbound
+message's metadata::</p>
+<pre class="literal-block">
+command void setRetries(message_t *msg, uint16_t maxRetries);
+command void setRetryDelay(message_t *msg, uint16_t retryDelay);
+</pre>
+<p>The first command, setRetries(..), will specify the maximum number
+of times the message should be sent before the radio stack stops
+transmission.  The second command, setRetryDelay(..), specifies
+the amount of delay in milliseconds between each retry.  The combination
+of these two commands can set a packet to retry as many times as needed
+for as long as necessary.</p>
+<p>Because PacketLink relies on acknowledgements, false acknowledgements
+from the receiver will cause PacketLink to fail.  If using software
+acknowledgements, false acknowledgements can still occur as a result
+of the limited DSN space, other 802.15.4 radios in the area with
+the same destination address, etc.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="asynchronous-low-power-listening-implementation" name="asynchronous-low-power-listening-implementation">7. Asynchronous Low Power Listening Implementation</a></h1>
+<p>Because the Low Power Listening layer uses up extra memory footprint,
+it is not compiled in by default.  Developers can simply define
+the preprocessor variable LOW_POWER_LISTENING to compile the functionality
+of the Low Power Listening layer in with the CC2420 stack.</p>
+<div class="section">
+<h2><a id="design-considerations" name="design-considerations">7.1 Design Considerations</a></h2>
+<p>The CC2420 radio stack low power listening implementation relies
+on clear channel assessments to determine if there is a transmitter
+nearby.  This allows the receiver to turn on and determine there are no
+transmitters in a shorter amount of time than leaving the radio on
+long enough to pick up a full packet.</p>
+<p>The transmitters perform a message delivery by transmitting
+the full packet over and over again for twice the duration of the receiver's
+duty cycle period.  Transmitting for twice as long increases the
+probability that the message will be detected by the receiver, and
+allows the receiver to shave off a small amount of time it needs to
+keep its radio on.</p>
+<p>Typically, the transmission of a single packet takes on the following
+form over time:</p>
+<blockquote>
+<table border="1" class="docutils">
+<colgroup>
+<col width="42%" />
+<col width="21%" />
+<col width="38%" />
+</colgroup>
+<tbody valign="top">
+<tr><td>LPL Backoff</td>
+<td>Packet Tx</td>
+<td>Ack Wait</td>
+</tr>
+</tbody>
+</table>
+</blockquote>
+<p>To decrease the amount of time required for a receive check, the channel
+must be modulated by the transmitter as continuously as possible.
+The only period where the channel is modulated is during the
+Packet Transmission phase.  The receiver must continuosly sample the CCA pin
+a moment longer than the LPL Backoff period and Ack Wait period combined
+to overlap the Packet Transmission period.  By making the LPL backoff
+period as short as possible, we can decrease the amount of time a receiver's
+radio must be turned on when performing a receive check.</p>
+<p>If two transmitters attempt to transmit using low power listening,
+one transmitter may hog the channel if its LPL backoff period
+is set too short.  Both nodes transmitting at the same time
+will cause interference and prevent each other from
+successfully delivering their messages to the intended recipient.</p>
+<p>To allow multiple transmitters to transmit low power listening packets
+at the same time, the LPL backoff period needed to be increased
+greater than the desired minimum.  This increases the amount of time
+receiver radios need to be on to perform a receive check because
+the channel is no longer being modulated as continuously as possible.
+In other words, the channel is allowed to be shared amongst multiple
+transmitters at the expense of power consumption.</p>
+</div>
+<div class="section">
+<h2><a id="minimizing-power-consumption" name="minimizing-power-consumption">7.2 Minimizing Power Consumption</a></h2>
+<p>There are several methods the CC2420 radio stack uses to minimize
+power consumption:</p>
+<ol class="arabic simple">
+<li>Invalid Packet Shutdown</li>
+</ol>
+<blockquote>
+Typically, packets are filtered out by address at the radio hardware
+level.  When a receiver wakes up and does not receive any
+packets into the low power listening layer of the radio stack, it
+will automatically go back to sleep after some period of time.  As a
+secondary backup, if address decoding on the radio chip is disabled,
+the low power listening implementation will shut down the radio if
+three packets are receive that do not belong to the node.  This helps
+prevent against denial of sleep attacks or the typical transmission
+behavior found in an ad-hoc network with many nodes.</blockquote>
+<ol class="arabic simple" start="2">
+<li>Early Transmission Completion</li>
+</ol>
+<blockquote>
+A transmitter typically sends a packet for twice the amount of time
+as the receiver's receive check period.  This increases the probability
+that the receiver will detect the packet.  However, if the transmitter receives
+an acknowledgement before the end of its transmission period, it
+will stop transmitting to save energy.  This is an improvement
+over previous low power listening implementations, which transmitted
+for the full period of time regardless of whether the receiver has
+already woken up and received the packet.</blockquote>
+<ol class="arabic simple" start="3">
+<li>Auto Shutdown</li>
+</ol>
+<blockquote>
+If the radio does not send or receive messages for some period of
+time while low power listening is enabled, the radio will automatically
+turn off and begin duty cycling at its specified duty cycle period.</blockquote>
+<ol class="arabic simple" start="4">
+<li>CCA Sampling Strategy</li>
+</ol>
+<blockquote>
+The actual receive check is performed in a loop inside a function,
+not a spinning task.  This allows the sampling to be performed
+continuously, with the goal of turning the radio off as quickly as
+possible without interruption.</blockquote>
+</div>
+</div>
+<div class="section">
+<h1><a id="cc2420-settings-and-registers" name="cc2420-settings-and-registers">8. CC2420 Settings and Registers</a></h1>
+<p>To interact with registers on the CC2420 chip, the SPI bus must be
+acquired, the chip selecct (CSn) pin must be cleared, and then the
+interaction may occur.  After the interaction completes, the
+CSn pin must be set high.</p>
+<p>All registers and strobes are defined in the CC2420.h file, and most
+are accessible through the CC2420SpiC component.  If your application
+requires access to a specific register or strobe, the CC2420SpiC component
+is the place to add access to it.</p>
+<p>Configuring the CC2420 requires the developer to access the CC2420Config
+interface provided by CC2420ControlC.  First call the CC2420Config commands to
+change the desired settings of the radio. If the radio happens to
+be off, the changes will be committed at the time it is turned on.
+Alternatively, calling sync() will commit the changes to the CC2420.</p>
+<p>RSSI can be sampled directly by calling the ReadRssi interface provided
+by CC2420ControlC.  See page 50 of the CC2420 datasheet for information
+on how to convert RSSI to LQI and why it may not be such a good idea <a class="footnote-reference" href="#id11" id="id10" name="id10">[1]</a>.</p>
+</div>
+<div class="section">
+<h1><a id="cross-platform-portability" name="cross-platform-portability">9. Cross-platform Portability</a></h1>
+<p>To port the CC2420 radio to another platform, the following interfaces
+need to be implemented::</p>
+<pre class="literal-block">
+// GPIO Pins
+interface GeneralIO as CCA;
+interface GeneralIO as CSN;
+interface GeneralIO as FIFO;
+interface GeneralIO as FIFOP;
+interface GeneralIO as RSTN;
+interface GeneralIO as SFD;
+interface GeneralIO as VREN;
+
+// SPI Bus
+interface Resource;
+interface SpiByte;
+interface SpiPacket;
+
+// Interrupts
+interface GpioCapture as CaptureSFD;
+interface GpioInterrupt as InterruptCCA;
+interface GpioInterrupt as InterruptFIFOP;
+</pre>
+<p>The GpioCapture interface is tied through the Timer to provide a relative time
+at which the interrupt occurred.  This is useful for timestamping received
+packets for node synchronization.</p>
+<p>If the CC2420 is not connected to the proper interrupt lines,
+interrupts can be emulated through the use of a spinning task
+that polls the GPIO pin.  The MICAz implementation, for example, does this
+for the CCA interrupt.</p>
+</div>
+<div class="section">
+<h1><a id="future-improvement-recommendations" name="future-improvement-recommendations">10. Future Improvement Recommendations</a></h1>
+<p>Many improvements can be made to the CC2420 stack.  Below are some
+recommendations:</p>
+<div class="section">
+<h2><a id="aes-encryption" name="aes-encryption">10.1 AES Encryption</a></h2>
+<p>The CC2420 chip itself provides AES-128 encryption. The implementation
+involves loading the security RAM buffers on the CC2420 with the information
+to be encrypted - this would be the payload of a packet, without
+the header.  After the payload is encrypted, the microcontroller reads
+out of the security RAM buffer and concatenates the data with the
+unencrypted packet header.  This full packet would be uploaded again to the CC2420
+TXFIFO buffer and transmitted.</p>
+<p>Because the CC2420 cannot begin encryption at a particular offset
+and needs to be written, read, and re-written, use of the AES-128 may be
+inefficient and will certainly decrease throughput.</p>
+</div>
+<div class="section">
+<h2><a id="authentication" name="authentication">10.2 Authentication</a></h2>
+<p>In many cases, authentication is more desirable than encryption.
+Encryption significantly increases energy and decreases packet throughput,
+which does not meet some application requirements. A layer could be
+developed and added toward the bottom of the radio stack that validates
+neighbors, preventing packets from invalid neighbors from reaching the
+application layer.  Several proprietary authentication layers have
+been developed for the CC2420 stack, but so far none are available to
+the general public.</p>
+<p>A solid authentication layer would most likely involve the use of a
+neighbor table and 32-bit frame counts to prevent against replay attacks.
+Once a neighbor is verified and established, the node needs to ensure that
+future packets are still coming from the same trusted source.  Again,
+some high speed low energy proprietary methods to accomplish this exist, but
+encryption is typically the standard method used.</p>
+</div>
+<div class="section">
+<h2><a id="synchronous-low-power-listening" name="synchronous-low-power-listening">10.3 Synchronous Low Power Listening</a></h2>
+<p>A synchronous low power listening layer can be transparently built on
+top of the asynchronous low power listening layer.  One implementation
+of this has already been done on a version of the CC1000 radio stack.
+Moteiv's Boomerang radio stack also has a synchronous low power listening
+layer built as a standalone solution.</p>
+<p>In the case of building a synchronous layer on top of the asynchronous
+low power listening layer, a transmitter's radio stack can detect when
+a particular receiver is performing its receive checks by verifying the
+packet was acknowledged after a sendDone event.  The transmitter can then
+build a table to know when to begin transmission for that particular receiver.
+Each successful transmission would need to adjust the table with updated
+information to avoid clock skew problems.</p>
+<p>The asynchronous low power listening stack needs to be altered a bit
+to make this strategy successful.  Currently, duty cycling is started
+and stopped as packets are detected, received, and transmitted.  The
+stack would need to be altered to keep a constant clock running in the
+background that determines when to perform receive checks.  The
+clock should not be affected by normal radio stack Rx/Tx behavior.  This
+would allow the receiver to maintain a predictable receive check cycle
+for the transmitter to follow.</p>
+<p>If the synchronous low power listening layer loses synchronization,
+the radio stack can always fall back on the asynchronous low power listening
+layer for successful message delivery.</p>
+</div>
+<div class="section">
+<h2><a id="neighbor-tables" name="neighbor-tables">10.4 Neighbor Tables</a></h2>
+<p>Moteiv's Boomerange Sensornet Protocol (SP) implementation is a
+good model to follow for radio stack architecture.  One of the nice features
+of SP is the design and implementation of the neighbor table.  By
+providing and sharing neighbor table information across the entire
+CC2420 radio stack, RAM can be conserved throughout the radio stack
+and TinyOS applications.</p>
+</div>
+<div class="section">
+<h2><a id="radio-independant-layers" name="radio-independant-layers">10.5 Radio Independant Layers</a></h2>
+<p>The best radio stack architecture is one that is completely radio independant.
+Many of the layers in the CC2420 stack can be implemented independant
+of the hardware underneath if the radio stack architecture was redesigned
+and reimplemented. The low power listening receive check strategy may need a
+hardware-dependant implementation, but other layers like PacketLink,
+UniqueSend, UniqueReceive, ActiveMessage, Dispatch, etc. do not require
+a CC2420 underneath to operate properly.  The ultimate TinyOS radio
+stack would be one that forms an abstraction between radio-dependant
+layers and radio-independant layers, and operates with the same
+behavior across any radio chip.</p>
+</div>
+<div class="section">
+<h2><a id="extendable-metadata" name="extendable-metadata">10.6 Extendable Metadata</a></h2>
+<p>Layers added into the radio stack may require extra bytes of metadata.
+The PacketLink layer, for example, requires two extra fields
+in each message's metadata to hold the message's max retries and
+delay between retries.  The low power listening layer requires
+an extra field to specify the destination's duty cycle period for
+a proper delivery.</p>
+<p>If layers are not included in the radio stack during compile time,
+their fields should not be included in the message_t's metadata.</p>
+<p>One version of extendable metadata was implementing using an array at the end
+of the metadata struct that would adjust its size based on which layers were
+compiled in and what size fields they required.  A combination of
+compiler support in the form of unique(..) and uniqueCount(..) functions
+made it possible for the array to adjust its size.</p>
+<p>Explicit compiler support would be the most desirable solution to add
+fields to a struct as they are needed.</p>
+</div>
+<div class="section">
+<h2><a id="error-correcting-codes-ecc" name="error-correcting-codes-ecc">10.7 Error Correcting Codes (ECC)</a></h2>
+<p>When two nodes are communicating near the edge of their RF range,
+it has been observed that interference may cause the packet to be
+corrupted enough that the CRC byte and payload actually passes
+the check, even though the payload is not valid.  There is a one
+in 65535 chance of a CRC byte passing the check for a corrupted
+packet.  Although this is slim, in many cases it is unacceptable.
+Some work arounds have implemented an extra byte of software generated
+CRC to add to the reliability, and tests have proven its effectiveness.
+Taking this a step further, an ECC layer in the radio stack would help
+correct corrupted payloads and increase the distance at which nodes
+can reliably communicate.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">11. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">David Moss</div>
+<div class="line">Rincon Research Corporation</div>
+<div class="line">101 N. Wilmot, Suite 101</div>
+<div class="line">Tucson, AZ  85750</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 520 519 3138</div>
+<div class="line">email ? <a class="reference" href="mailto:dmm&#64;rincon.com">dmm&#64;rincon.com</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Jonathan Hui</div>
+<div class="line">657 Mission St. Ste. 600</div>
+<div class="line">Arched Rock Corporation</div>
+<div class="line">San Francisco, CA 94105-4120</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 415 692 0828</div>
+<div class="line">email - <a class="reference" href="mailto:jhui&#64;archedrock.com">jhui&#64;archedrock.com</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305-9030</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Jung Il Choi</div>
+<div class="line">&lt;contact&gt;</div>
+<div class="line">phone -</div>
+<div class="line">email -</div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">12. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id11" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id11">[1]</a></td><td><em>(<a class="fn-backref" href="#id1">1</a>, <a class="fn-backref" href="#id3">2</a>, <a class="fn-backref" href="#id10">3</a>)</em> TI/Chipcon CC2420 Datasheet.  <a class="reference" href="http://www.chipcon.com/files/CC2420_Data_Sheet_1_3.pdf">http://www.chipcon.com/files/CC2420_Data_Sheet_1_3.pdf</a></td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id12" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id12">[2]</a></td><td><em>(<a class="fn-backref" href="#id2">1</a>, <a class="fn-backref" href="#id8">2</a>)</em> TEP111: message_t</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id13" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id13">[3]</a></td><td><em>(<a class="fn-backref" href="#id4">1</a>, <a class="fn-backref" href="#id9">2</a>)</em> IEEE 802.15.4 Specification: <a class="reference" href="http://standards.ieee.org/getieee802/802.15.html">http://standards.ieee.org/getieee802/802.15.html</a></td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id14" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id5" name="id14">[4]</a></td><td>TEP105: Low Power Listening</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id15" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id15">[5]</a></td><td><em>(<a class="fn-backref" href="#id6">1</a>, <a class="fn-backref" href="#id7">2</a>)</em> TEP125: TinyOS 802.15.4 Frames</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="packet-link-layer">
+<h1 class="title">Packet Link Layer</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">127</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>David Moss, Philip Levis</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This TEP describes the behavior and interfaces of the TinyOS 2.x
+Packet Link Layer.  The Packet Link Layer is an optional radio stack
+layer responsible for the reliable delivery of a packet from node to
+node.  Packet Link provides error correction functionality found in
+Layer 2 of the OSI model <a class="footnote-reference" href="#id2" id="id1" name="id1">[1]</a>.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>In wireless networks, packets are regularly dropped between point to point
+communications due to interference or RF range.  Correcting these dropped
+packets requires the transmitter to first recognize that the packet was
+not acknowledged, and then retransmit that packet.</p>
+<p>Retransmitting the packet adds its own set of issues.  Specifically, the
+receiver will receive duplicate packets due to its own dropped acknowledgements.
+Logic is therefore required to allow receiver to recognize and dump duplicate
+packets, but only after the acknowledgement has been sent back to the
+transmitter.</p>
+<p>With these two pieces of functionality: the ability for a transmitter to
+keep retrying until it gets an acknowledgement and the ability
+for a receiver to accept only a single copy of the packet, a Packet Link Layer
+can be formed to reliably deliver a single packet from point to point.</p>
+</div>
+<div class="section">
+<h1><a id="design-considerations" name="design-considerations">2. Design Considerations</a></h1>
+<div class="section">
+<h2><a id="time-spent-retrying-a-delivery" name="time-spent-retrying-a-delivery">2.1 Time spent retrying a delivery</a></h2>
+<p>Some networks have different timing characteristics than others.
+Consider a person carrying a wireless device while walking in and out
+of RF range of another node.  In this case, the device may want to
+retry the transmission a few times over the course of a few seconds before
+declaring the delivery unsuccessful.  A robust Packet Link Layer should
+allow the developer to specify the amount of time spent retrying as well
+as the number of retries to send.</p>
+</div>
+<div class="section">
+<h2><a id="setting-the-packet-sequence-number" name="setting-the-packet-sequence-number">2.2 Setting the packet sequence number</a></h2>
+<p>To detect duplicate packets, a sequence number byte can be used
+within the packet to verify against previously received
+packets.  If the source address and sequence number of a newly received
+packet matches that of a previously received packet, then the newly received
+packet is a duplicate and may be dumped.  To prevent the packet sequence
+number byte from changing on each retransmission, the byte should be set
+at or above the Packet Link Layer and never changed below.</p>
+</div>
+<div class="section">
+<h2><a id="false-acknowledgements" name="false-acknowledgements">2.3 False Acknowledgements</a></h2>
+<p>The low levels of a radio stack or the radio chip itself are typically
+responsible for generating packet acknowledgements.  It has been
+observed in some platforms that the radio chip will generate false
+auto-acknowledgements. This occurs when the radio receives the packet and
+sends an acknowledgement but the microcontroller never gets the message
+due to some error.  In this case, the transmitter would believe the
+packet got to the destination successfully but the receiver would have
+no knowledge that a packet was received. Software initiated
+acknowledgements prevent this issue by removing the possibility of
+false acknowledgements.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="interface" name="interface">3. Interface</a></h1>
+<div class="section">
+<h2><a id="packetlink-interface" name="packetlink-interface">3.1 PacketLink Interface</a></h2>
+<p>The TEP proposes this PacketLink interface::</p>
+<pre class="literal-block">
+interface PacketLink {
+  command void setRetries(message_t *msg, uint16_t maxRetries);
+  command void setRetryDelay(message_t *msg, uint16_t retryDelay);
+  command uint16_t getRetries(message_t *msg);
+  command uint16_t getRetryDelay(message_t *msg);
+  command bool wasDelivered(message_t *msg);
+}
+</pre>
+<p>PacketLinks interface functions:</p>
+<blockquote>
+<tt class="docutils literal"><span class="pre">setRetries(message_t</span> <span class="pre">*msg,</span> <span class="pre">uint16_t</span> <span class="pre">maxRetries)</span></tt></blockquote>
+<ul>
+<li><p class="first">Sets the maximum number of times to retry the transmission of the message</p>
+<p><tt class="docutils literal"><span class="pre">setRetryDelay(message_t</span> <span class="pre">*msg,</span> <span class="pre">uint16_t</span> <span class="pre">retryDelay)</span></tt></p>
+</li>
+<li><p class="first">Set the delay, in milliseconds, between each retransmission</p>
+<p><tt class="docutils literal"><span class="pre">getRetries(message_t</span> <span class="pre">*msg)</span></tt></p>
+</li>
+<li><p class="first">Returns the maximum number of retries configured for the given message</p>
+<p><tt class="docutils literal"><span class="pre">getRetryDelay(message_t</span> <span class="pre">*msg)</span></tt></p>
+</li>
+<li><p class="first">Returns the delay, in milliseconds, between each retransmission for the given
+message</p>
+<p><tt class="docutils literal"><span class="pre">wasDelivered(message_t</span> <span class="pre">*msg)</span></tt></p>
+</li>
+<li><p class="first">This command may be called after the sendDone() event is signaled. It is the
+equivalent of <tt class="docutils literal"><span class="pre">PacketAcknowledgements.wasAcked(message_t</span> <span class="pre">*msg)</span></tt>, so is only
+a helper function to make the PacketLink interface easier to use.</p>
+</li>
+</ul>
+</div>
+<div class="section">
+<h2><a id="expected-behavior" name="expected-behavior">3.2 Expected Behavior</a></h2>
+<p>The PacketLink interface is accessed by the application layer before
+the packet is passed to the radio stack for transmission.  The application
+layer will call setRetries(...) and setRetryDelay(...), passing in the
+message it is about to send.</p>
+<p>The interface MUST configure metadata for the packet to specify the maximum
+number of retries and the amount of delay between each retry. When the
+send process reaches the Packet Link Layer, it MUST automatically check the
+packet's metadata and retry sending the packet as previously configured.</p>
+<p>For example, to configure a packet to be retried a maximum of 50 times
+over the next 5 seconds, the developer would execute the following commands
+before sending the packet::</p>
+<pre class="literal-block">
+call PacketLink.setRetries(msg, 50);
+call PacketLink.setRetryDelay(msg, 100);
+</pre>
+<p>By placing a 100 ms delay between each retry and allowing up to 50 retries
+maximum, the maximum amount of time the message will be transmitted is
+(50 * 100) ms, or 5000 ms.</p>
+<p>When transmitting a packet configured for reliable delivery to the
+broadcast address, the Packet Link Layer SHOULD allow the packet to be
+retried.  This will let the transmitter know that at least one node
+received the message.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">4. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">David Moss</div>
+<div class="line">Rincon Research Corporation</div>
+<div class="line">101 N. Wilmot, Suite 101</div>
+<div class="line">Tucson, AZ  85750</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 520 519 3138</div>
+<div class="line">email ? <a class="reference" href="mailto:dmm&#64;rincon.com">dmm&#64;rincon.com</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305-9030</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 650 725 9046</div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">5. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="id2">[1]</a></td><td>&quot;OSI model&quot; <a class="reference" href="http://en.wikipedia.org/wiki/OSI_model">http://en.wikipedia.org/wiki/OSI_model</a></td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="platform-independent-non-volatile-storage-abstractions">
+<h1 class="title">Platform Independent Non-Volatile Storage Abstractions</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">128</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Storage Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>DRAFT</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Authors:</th>
+<td>David Moss
+<br />Junzhao Du
+<br />Prabal Dutta
+<br />Deepak Ganesan
+<br />Kevin Klues
+<br />Manju
+<br />Ajay Martin
+<br />and Gaurav Mathur</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>The storage abstractions proposed by TEP 103 are implemented on a
+platform-dependent basis.  A version of BlockStorage, ConfigStorage,
+and LogStorage were created from the ground up for both the
+AT45DB and ST M25P80 flash chips.  Looking forward into the further
+growth and development of hardware, rebuilding each of these storage
+layers for every new flash chip will be time consuming and cause
+compatibility issues.</p>
+<p>We propose a layer of abstraction to reside between a chip-dependent
+flash chip implementation and platform-independent storage
+implementations.  This abstraction layer should provide methods
+to perform basic flash operations (read, write, erase, flush, crc),
+as well as provide information about the physical properties of the
+flash chip.  Efficiency concerns are mitigated by the fact that each
+platform-independent abstraction is implemented in a platform-dependent
+manner, allowing it to exist on different types of memory such as
+NAND flash, NOR flash, and EEPROM.  This abstraction layer should
+allow one implementation of each storage solution to operate across
+many different platforms.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>The implementations of the BlockStorage, ConfigStorage, and LogStorage
+layers described in TEP 103 [1] are platform dependent.  Platform-
+dependent implementations can cause behavioral and usage differences
+as well as compiling problems when attempting to port an application
+written on one platform to another.  A true abstraction layer would
+exhibit the same set of interfaces and no differences in behavior when
+implemented across various types of non-volatile memory.</p>
+<p>A well defined non-volatile memory abstraction layer should allow core
+functionality to work on a variety of platforms without modification.
+Some flash chips may provide extra functionality.  If a particular
+applications on a specific platform wants to take advantage of
+extra functionality provided by a flash chip, it still has the opportunity
+to access those features directly with the understanding that its
+implementation is no longer considered platform-independent.</p>
+<div class="section">
+<h2><a id="platform-dependent-volume-settings" name="platform-dependent-volume-settings">1.1 Platform-dependent volume settings</a></h2>
+<p>Differences exist between the TEP 103 storage implementations
+on the AT45DB, ST M25P80, and PXA27X P30 flash chips.</p>
+<p>First, volume information is defined using two distinct methods. As
+was discussed in TEP 103, an XML file is responsible for the
+allocation of flash memory into volumes at compile time.  Individual
+storage layers can then mount to the defined volumes, which
+allows those layers to share the flash memory resource amongst
+each other.</p>
+<p>The AT45DB implementation running on mica* platforms converts the
+information presented in the application's volumes XML file into
+information accessible through macros::</p>
+<pre class="literal-block">
+#ifndef STORAGE_VOLUMES_H
+#define STORAGE_VOLUMES_H
+
+enum {
+  VOLUME_BLOCKTEST,
+};
+
+#endif
+#if defined(VS)
+VS(VOLUME_BLOCKTEST, 1024)
+#undef VS
+#endif
+#if defined(VB)
+VB(VOLUME_BLOCKTEST, 0)
+#undef VB
+#endif
+</pre>
+<p>The ST M25P80 implementation running on TelosB/Tmote platforms,
+on the other hand, converts the information in the volumes XML
+file into an array of constants::</p>
+<pre class="literal-block">
+#ifndef __STORAGE_VOLUME_H__
+#define __STORAGE_VOLUME_H__
+
+#include &quot;Stm25p.h&quot;
+
+#define VOLUME_BLOCKTEST 0
+
+static const stm25p_volume_info_t STM25P_VMAP[ 1 ] = {
+    { base : 0, size : 4 },
+};
+
+#endif
+</pre>
+<p>Furthermore, the two implementations defined incompatible interfaces for
+accessing information about volumes.  For example, the AT45DB interface
+provides the following::</p>
+<pre class="literal-block">
+interface At45dbVolume {
+  command at45page_t remap(at45page_t volumePage);
+  command at45page_t volumeSize();
+}
+</pre>
+<p>The ST M25P80 interface defines a different interface, which allows
+applications to access the volume settings directly through the
+stm25p_volume_info_t array::</p>
+<pre class="literal-block">
+interface Stm25pVolume {
+  async event volume_id_t getVolumeId();
+}
+</pre>
+<p>Accessing volume information is very platform-dependent.
+A single method should be integrated to access volume
+settings and non-volatile memory properties across any platform.</p>
+<p>Another issue exists with the previous concept of volumes.  Any storage
+solution that wishes to retain valid data while erasing invalid data
+MUST have access to at least two erase units.  Circular logging,
+configuration storage, variable storage, dictionary storage, file
+systems, and more all require a minimum of two erase units to be
+implemented effectively.  One erase unit can be used to erase
+all the invalid data while other erase unit(s) retains any valid data.</p>
+<p>Therefore, the minimum allowable volume size should be twice the size
+of a single erase unit to effectively support the majority of
+storage applications.  The XML tools that process and allocate
+volumes should prevent a user from defining a volume too small::</p>
+<pre class="literal-block">
++------------+--------+------------+-----------+------------+
+|            | AT45DB |   ST M25P  |   PXA27x  | K9K1G08R0B |
++------------+--------+------------+-----------+------------+
+| Min.Volume |  512B  | 512B-128kB | 128-256kB | 16kB-64kB  |
++------------+--------+------------+-----------+------------+
+</pre>
+</div>
+<div class="section">
+<h2><a id="platform-dependent-component-signatures" name="platform-dependent-component-signatures">1.2 Platform-dependent component signatures</a></h2>
+<p>The storage components' signatures differ across implementations.
+For example, the PXA27X P30 flash defines &quot;P30BlockC&quot;, &quot;P30ConfigC&quot;,
+and &quot;P30LogC&quot; in place of &quot;BlockStorageC&quot;, &quot;ConfigStorageC&quot;, and
+&quot;LogStorageC&quot;.  Furthermore, the BlockStorageC configuration in the
+AT45DB implementation takes the following form::</p>
+<pre class="literal-block">
+generic configuration BlockStorageC(volume_id_t volid) {
+  provides {
+    interface BlockWrite;
+    interface BlockRead;
+  }
+}
+</pre>
+<p>while the ST M25P80 implementation adds another interface::</p>
+<pre class="literal-block">
+generic configuration BlockStorageC( volume_id_t volume_id ) {
+  provides interface BlockRead;
+  provides interface BlockWrite;
+  provides interface StorageMap;
+}
+</pre>
+<p>The StorageMap interface on the M25P80 flash chip simply allows
+an application to convert a volume-based virtual address into
+a physical address on flash.  Although it is a good idea, it
+is not consistent with other platforms' defined interfaces.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="directstorage" name="directstorage">2. DirectStorage</a></h1>
+<div class="section">
+<h2><a id="differences-and-advantages" name="differences-and-advantages">3.1 Differences and advantages</a></h2>
+<p>The core current BlockStorage, ConfigStorage, and LogStorage
+layers can all be implemented on a platform-independent abstraction
+layer.  Providing an interface that allows direct, unimpeded
+access to the memory below while offering information about
+the properties of that memory is the first step in doing so.</p>
+<p>The DirectStorage interface was created to as part of the answer to this
+issue.  DirectStorage resembles the BlockStorage interface in many ways,
+with two significant exceptions:</p>
+<p>1. Erase operation
+BlockStorage's behavior erases the entire volume at a time, which may
+consist of multiple erase units.  DirectStorage allows erases to occur
+on per-erase unit basis.  Therefore, if only a portion of the volume
+needs to be erased, it can.</p>
+<p>2. Organization
+BlockStorage defines two different interfaces for interacting with the
+flash:  BlockRead and BlockWrite.  These two interfaces are combined
+into one interface.  The getSize() command provided by the BlockRead
+interface is removed and replaced with VolumeSettings, which will be
+discussed later.  Also, sync()/syncDone() is replaced with
+flush/flushDone(), which is responsible for writing any data that
+has not already been written to non-volatile memory.  Although
+the crc() command can technically exist above BlockStorage as
+well as DirectStorage, it remains in DirectStorage for its ease
+of use.</p>
+<p>Finally, layers should have the ability to be added beneath DirectStorage
+to further optimize and enable memory operation.  For example, the
+ST M25P80 flash does not have any on-board RAM buffers, so it
+is up to the microcontroller to buffer and flush out data to write units.
+This functionality may not be desirable on all applications because
+it uses valuable microcontroller resources; therefore, it should
+be removable as layers can be added and removed from radio stack
+architecture.</p>
+<p>Other memory types may require extra support in and underneath
+the hood of DirectStorage as well. NAND flash, for example,
+requires bad block management and error correction. This functionality
+can be implemented without changing the behavior of the DirectStorage
+interface above.</p>
+</div>
+<div class="section">
+<h2><a id="directstorage-interface" name="directstorage-interface">3.2 DirectStorage Interface</a></h2>
+<p>The DirectStorage interface is described below.  Each &quot;addr&quot; variable
+is a virtual address, with 0x0 relative to the base address of the
+volume.  This base address may actually be physically located
+somewhere else on the non-volatile memory::</p>
+<pre class="literal-block">
+interface DirectStorage {
+
+  command error_t read(uint32_t addr, void *buf, uint32_t len);
+
+  command error_t write(uint32_t addr, void *buf, uint32_t len);
+
+  command error_t erase(uint16_t eraseUnitIndex);
+
+  command error_t flush();
+
+  command error_t crc(uint32_t addr, uint32_t len, uint16_t baseCrc);
+
+
+
+  event void readDone(uint32_t addr, void *buf, uint32_t len, error_t error);
+
+  event void writeDone(uint32_t addr, void *buf, uint32_t len, error_t error);
+
+  event void eraseDone(uint16_t eraseUnitIndex, error_t error);
+
+  event void flushDone(error_t error);
+
+  event void crcDone(uint16_t calculatedCrc, uint32_t addr, uint32_t len, error_t error);
+
+}
+</pre>
+<dl class="docutils">
+<dt><tt class="docutils literal"><span class="pre">read(uint32_t</span> <span class="pre">addr,</span> <span class="pre">void</span> <span class="pre">'*buf',</span> <span class="pre">uint32_t</span> <span class="pre">len);</span></tt></dt>
+<dd><ul class="first last simple">
+<li>Read 'len' bytes into <tt class="docutils literal"><span class="pre">*buf</span></tt> from the given address</li>
+<li>Returns FAIL if the volume is already in use</li>
+<li>Signals readDone(...) when complete.</li>
+</ul>
+</dd>
+<dt><tt class="docutils literal"><span class="pre">write(uint32_t</span> <span class="pre">addr,</span> <span class="pre">void</span> <span class="pre">'*buf',</span> <span class="pre">uint32_t</span> <span class="pre">len);</span></tt></dt>
+<dd><ul class="first last simple">
+<li>Write 'len' bytes from <tt class="docutils literal"><span class="pre">*buf</span></tt> starting at the given address</li>
+<li>Returns FAIL if the volume is already in use</li>
+<li>Signals writeDone(...) when complete.</li>
+</ul>
+</dd>
+<dt><tt class="docutils literal"><span class="pre">erase(uint16_t</span> <span class="pre">eraseUnitIndex);</span></tt></dt>
+<dd><ul class="first last simple">
+<li>Erase a single 0-indexed erase unit</li>
+<li>Returns FAIL if the volume is already in use</li>
+<li>Signals eraseDone(...) when complete.</li>
+</ul>
+</dd>
+<dt>flush()</dt>
+<dd><ul class="first last simple">
+<li>All data that has been previously written and is not yet located on
+non-volatile memory should be immediately stored to non-volatile memory.</li>
+<li>Returns FAIL if the operation cannot be completed at this time</li>
+<li>Signals flushDone(...) when complete.</li>
+</ul>
+</dd>
+<dt>crc(uint32_t addr, uint32_t len, uint16_t baseCrc);</dt>
+<dd><ul class="first last simple">
+<li>Calculate the CRC of 'len' bytes starting at the given address, using
+the given baseCrc as a seed.</li>
+<li>Returns FAIL if the volume is already in use</li>
+<li>Signals crcDone(...) when complete.</li>
+</ul>
+</dd>
+</dl>
+</div>
+<div class="section">
+<h2><a id="directmodify-interface" name="directmodify-interface">3.3 DirectModify Interface</a></h2>
+<p>Some memory types have the ability to modify their contents without
+destroying surrounding data.</p>
+<p>The AT45DB NOR-flash, for example, is able to do this because
+it has built in RAM buffers coupled with small erase unit sizes.
+The physical RAM buffers perform a read-modify-write operation to
+effectively change the contents of flash, allowing it to emulate
+the behavior of an EEPROM with the speed and efficiency of NOR-flash.</p>
+<p>The ATmega128 microcontroller has 4kB of internal EEPROM memory which
+can be directly modified.  Also, the MSP430 has 256 bytes of internal
+NOR-flash memory which is divided into two segments of 128 bytes each.
+When implemented properly, this NOR-flash memory can be modified in a
+fault-tolerant manner.</p>
+<p>The ST M25P80 NOR-flash cannot support modification without sacrificing
+significant overhead.  It has 16 erase units that are 64kB each,
+which is too large to effectively modify bytes.</p>
+<p>While not all memories support modification, a unified interface
+should exist to interact with memories that do.  This interface
+should be access with the understanding that applications built
+on top may not be portable to all memory types. Also, DirectStorage
+and DirectModify are mounted to their own individual volumes, so
+DirectModify cannot share its allocated memory resources with
+a DirectStorage interface::</p>
+<pre class="literal-block">
+interface DirectModify {
+
+  command error_t modify(uint32_t addr, void *buf, uint32_t len);
+
+  command error_t read(uint32_t addr, void *buf, uint32_t len);
+
+  command error_t erase(uint16_t eraseUnitIndex);
+
+  command error_t flush();
+
+  command error_t crc(uint32_t addr, uint32_t len, uint16_t baseCrc);
+
+  command bool isSupported();
+
+
+  event void modified(uint32_t addr, void *buf, uint32_t len, error_t error);
+
+  event void readDone(uint32_t addr, void *buf, uint32_t len, error_t error);
+
+  event void eraseDone(uint16_t eraseUnitIndex, error_t error);
+
+  event void flushDone(error_t error);
+
+  event void crcDone(uint16_t calculatedCrc, uint32_t addr, uint32_t len, error_t error);
+
+}
+</pre>
+<dl class="docutils">
+<dt><tt class="docutils literal"><span class="pre">modify(uint32_t</span> <span class="pre">addr,</span> <span class="pre">void</span> <span class="pre">*buf,</span> <span class="pre">uint32_t</span> <span class="pre">len)</span></tt></dt>
+<dd><ul class="first last simple">
+<li>Modify 'len' bytes located on non-volatile memory at the given address,
+replacing them with data from the given buffer</li>
+<li>Returns FAIL if the volume is already in use</li>
+<li>Signals modified(...) when the operation is complete</li>
+</ul>
+</dd>
+<dt><tt class="docutils literal"><span class="pre">read(uint32_t</span> <span class="pre">addr,</span> <span class="pre">void</span> <span class="pre">*buf,</span> <span class="pre">uint32_t</span> <span class="pre">len)</span></tt></dt>
+<dd><ul class="first last simple">
+<li>Read 'len' bytes into <tt class="docutils literal"><span class="pre">*buf</span></tt> from the given address</li>
+<li>Same as DirectStorage.read(...)</li>
+<li>Returns FAIL if the volume is already in use</li>
+<li>Signals readDone(...) when complete.</li>
+</ul>
+</dd>
+<dt><tt class="docutils literal"><span class="pre">erase(uint16_t</span> <span class="pre">eraseUnitIndex);</span></tt></dt>
+<dd><ul class="first last simple">
+<li>Erase a single 0-indexed erase unit</li>
+<li>Returns FAIL if the volume is already in use</li>
+<li>Signals eraseDone(...) when complete.</li>
+</ul>
+</dd>
+<dt><tt class="docutils literal"><span class="pre">flush()</span></tt></dt>
+<dd><ul class="first last simple">
+<li>All data that has been previously written and is not yet located on
+non-volatile memory should be immediately stored to non-volatile memory.</li>
+<li>Same behavior as flush() methods found in Java</li>
+<li>Returns FAIL if the operation cannot be completed at this time</li>
+<li>Signals flushDone(...) when complete.</li>
+</ul>
+</dd>
+<dt><tt class="docutils literal"><span class="pre">crc(uint32_t</span> <span class="pre">addr,</span> <span class="pre">uint32_t</span> <span class="pre">len,</span> <span class="pre">uint16_t</span> <span class="pre">baseCrc);</span></tt></dt>
+<dd><ul class="first last simple">
+<li>Calculate the CRC of 'len' bytes starting at the given address, using
+the given baseCrc as a seed.</li>
+<li>Returns FAIL if the volume is already in use</li>
+<li>Signals crcDone(...) when complete.</li>
+</ul>
+</dd>
+<dt><tt class="docutils literal"><span class="pre">isSupported()</span></tt></dt>
+<dd><ul class="first last simple">
+<li>Returns TRUE if DirectModify is available on the current memory type</li>
+</ul>
+</dd>
+</dl>
+</div>
+<div class="section">
+<h2><a id="volumesettings-interface" name="volumesettings-interface">3.4 VolumeSettings Interface</a></h2>
+<p>As was shown in Section 1.1, finding information about the current
+volume required platform-dependent methods of access.  VolumeSettings
+provides a unified method of accessing information about the underlying
+memory chip and volume settings.</p>
+<p>VolumeSettings MUST be implemented separately for DirectStorage and
+DirectModify, not only because those abstractions will exist on
+separate volumes, but also because the DirectModify interface may
+change the available size of the volume to support certain memory
+types such as NAND- and NOR-flash::</p>
+<pre class="literal-block">
+interface VolumeSettings {
+
+  command uint32_t getVolumeSize();
+
+  command uint32_t getTotalEraseUnits();
+
+  command uint32_t getEraseUnitSize();
+
+  command uint32_t getTotalWriteUnits();
+
+  command uint32_t getWriteUnitSize();
+
+  command uint8_t getFillByte();
+
+  command uint8_t getEraseUnitSizeLog2();
+
+  command uint8_t getWriteUnitSizeLog2();
+
+}
+</pre>
+<dl class="docutils">
+<dt>getVolumeSize()</dt>
+<dd><ul class="first last simple">
+<li>Returns the size of the volume the DirectStorage layer
+is mounted to, in bytes</li>
+</ul>
+</dd>
+<dt>getTotalEraseUnits()</dt>
+<dd><ul class="first last simple">
+<li>Returns the total number of erase units on the mounted volume</li>
+</ul>
+</dd>
+<dt>getEraseUnitSize()</dt>
+<dd><ul class="first last simple">
+<li>Returns the size of an individual erase unit, in bytes</li>
+</ul>
+</dd>
+<dt>getTotalWriteUnits()</dt>
+<dd><ul class="first last simple">
+<li>Returns the total number of write units on the mounted volume</li>
+</ul>
+</dd>
+<dt>getWriteUnitSize()</dt>
+<dd><ul class="first last simple">
+<li>Returns the size of an individual write unit, in bytes</li>
+</ul>
+</dd>
+<dt>getFillByte()</dt>
+<dd><ul class="first last simple">
+<li>Returns the default byte value found on the memory after an erase,
+which is typically 0xFF</li>
+</ul>
+</dd>
+<dt>getEraseUnitSizeLog2()</dt>
+<dd><ul class="first last simple">
+<li>Returns the size of an erase unit in Log2 format for ease of
+calculations</li>
+</ul>
+</dd>
+<dt>getWriteUnitSizeLog2()</dt>
+<dd><ul class="first last simple">
+<li>Returns the size of a write unit in Log2 format for ease of
+calculations</li>
+</ul>
+</dd>
+</dl>
+</div>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">4. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">David Moss</div>
+<div class="line">Rincon Research Corporation</div>
+<div class="line">101 N. Wilmot, Suite 101</div>
+<div class="line">Tucson, AZ  85750</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 520 519 3138</div>
+<div class="line">phone - +1 520 519 3146</div>
+<div class="line">email ? <a class="reference" href="mailto:dmm&#64;rincon.com">dmm&#64;rincon.com</a></div>
+<div class="line"><br /></div>
+<div class="line">Junzhao Du</div>
+<div class="line">Contact -</div>
+<div class="line"><br /></div>
+<div class="line">Prabal Dutta</div>
+<div class="line">Contact -</div>
+<div class="line"><br /></div>
+<div class="line">Deepak Ganesan</div>
+<div class="line">Contact -</div>
+<div class="line"><br /></div>
+<div class="line">Kevin Klues</div>
+<div class="line">Contact -</div>
+<div class="line"><br /></div>
+<div class="line">Manju</div>
+<div class="line">Contact -</div>
+<div class="line"><br /></div>
+<div class="line">Ajay Martin</div>
+<div class="line">Contact -</div>
+<div class="line"><br /></div>
+<div class="line">Gaurav Mathur</div>
+<div class="line">Contact -</div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">5. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id1">[1]</a></td><td>TEP 103: Permanent Data Storage (Flash). <a class="reference" href="http://tinyos.cvs.sourceforge.net/">http://tinyos.cvs.sourceforge.net/</a><em>checkout</em>/tinyos/tinyos-2.x/doc/html/tep103.html</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id2">[2]</a></td><td>Atmel AT45DB041B datasheet. <a class="reference" href="http://www.atmel.com/dyn/resources/prod_documents/DOC1432.PDF">http://www.atmel.com/dyn/resources/prod_documents/DOC1432.PDF</a></td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id3" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id3">[3]</a></td><td>ST M25P80 datasheet. <a class="reference" href="http://www.st.com/stonline/products/literature/ds/8495/m25p80.pdf">http://www.st.com/stonline/products/literature/ds/8495/m25p80.pdf</a></td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id4" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id4">[4]</a></td><td>K9K1G08R0B datasheet. <a class="reference" href="http://www.samsung.com/Products/Semiconductor/NANDFlash/SLC_SmallBlock/1Gbit/K9K1G08R0B/ds_k9k1g08x0b_rev10.pdf">http://www.samsung.com/Products/Semiconductor/NANDFlash/SLC_SmallBlock/1Gbit/K9K1G08R0B/ds_k9k1g08x0b_rev10.pdf</a></td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="basic-platform-independent-non-volatile-storage-layers">
+<h1 class="title">Basic Platform Independent Non-Volatile Storage Layers</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">129</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Storage Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>DRAFT</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Authors:</th>
+<td>David Moss
+<br />Junzhao Du
+<br />Prabal Dutta
+<br />Deepak Ganesan
+<br />Kevin Klues
+<br />Manju
+<br />Ajay Martin
+<br />and Gaurav Mathur</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>The storage abstractions proposed by TEP 103 are implemented on a
+platform-dependent basis.  A version of BlockStorage, ConfigStorage,
+and LogStorage were created from the ground up for both the
+AT45DB and ST M25P80 flash chips.  Looking forward into the further
+growth and development of hardware, rebuilding each of these storage
+layers for every new flash chip will be time consuming and cause
+compatibility issues.</p>
+<p>We propose versions of BlockStorage, ConfigStorage, and LogStorage
+be built on top of a platform-independent interface.  This would
+allow one version of each to exist on multiple platforms.
+Platform-independent implementation concepts are discussed
+along with recommended solutions, and changes are proposed to the
+interfaces defined by TEP 103.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>The implementations of the BlockStorage, ConfigStorage, and LogStorage
+layers described in TEP 103 <a class="footnote-reference" href="#id6" id="id1" name="id1">[1]</a> are platform-dependent.  Platform-
+dependent implementations can cause behavioral and usage differences
+as well as compiling problems when attempting to port an application
+written on one platform to another.</p>
+<p>Building upon the DirectStorage, DirectModify, and VolumeSettings
+abstraction layers defined in TEP128 <a class="footnote-reference" href="#id7" id="id2" name="id2">[2]</a>, the three basic storage
+solutions can be implemented in a platform-independent manner.
+This requires combining all properties of various memory types,
+which aids in the creation of platform-independent storage solutions.
+Behavioral differences are minimized, and applications using
+the platform-independent storage layers can expect to work the
+same way on different types of non-volatile memory.</p>
+</div>
+<div class="section">
+<h1><a id="implementing-a-platform-independent-blockstorage" name="implementing-a-platform-independent-blockstorage">2. Implementing a platform-independent BlockStorage</a></h1>
+<p>The DirectStorage interface initially stemmed from the BlockStorage
+interface with differences in interfaces, organization, and
+erase behavior, as well as the additional VolumeSettings interface.
+To implement BlockStorage on DirectStorage, the erase behavior must
+be extended to erase the entire volume instead of an individual erase unit.</p>
+<p>VolumeSettings can first be accessed to determine the total number of erase
+units in the currently mounted volume.  Looping through these erase units,
+DirectStorage is accessed to erase() each one.  At the end of the erase
+operation, the entire volume is set back to fill bytes (0xFF).</p>
+<div class="section">
+<h2><a id="improved-blockstorage-interface" name="improved-blockstorage-interface">2.1 Improved BlockStorage interface</a></h2>
+<p>Previous BlockStorage interfaces were divided into BlockRead and
+BlockWrite.  This was found to be cumbersome because applications
+typically required access to both interfaces.  The getSize() is
+unnecessary due to the addition of the VolumeSettings interface.
+All other BlockStorage commands can simply pass through to their
+respective DirectStorage functions. This TEP proposes the following
+unified BlockStorage interface::</p>
+<pre class="literal-block">
+interface BlockStorage {
+
+  command error_t read(uint32_t addr, void *buf, uint32_t len);
+
+  command error_t write(uint32_t addr, void *buf, uint32_t len);
+
+  command error_t erase();
+
+  command error_t flush();
+
+  command error_t crc(uint32_t addr, uint32_t len, uint16_t baseCrc);
+
+
+
+  event void readDone(uint32_t addr, void *buf, uint32_t len, error_t error);
+
+  event void writeDone(uint32_t addr, void *buf, uint32_t len, error_t error);
+
+  event void eraseDone(error_t error);
+
+  event void flushDone(error_t error);
+
+  event void crcDone(uint16_t calculatedCrc, uint32_t addr, uint32_t len, error_t error);
+
+}
+</pre>
+<dl class="docutils">
+<dt><tt class="docutils literal"><span class="pre">read(uint32_t</span> <span class="pre">addr,</span> <span class="pre">void</span> <span class="pre">*buf,</span> <span class="pre">uint32_t</span> <span class="pre">len);</span></tt></dt>
+<dd><ul class="first last simple">
+<li>Read 'len' bytes into <tt class="docutils literal"><span class="pre">*buf</span></tt> from the given address</li>
+<li>Returns FAIL if the request cannot be handled</li>
+<li>Signals readDone(...) when complete.</li>
+</ul>
+</dd>
+<dt><tt class="docutils literal"><span class="pre">write(uint32_t</span> <span class="pre">addr,</span> <span class="pre">void</span> <span class="pre">*buf,</span> <span class="pre">uint32_t</span> <span class="pre">len);</span></tt></dt>
+<dd><ul class="first last simple">
+<li>Write 'len' bytes from <tt class="docutils literal"><span class="pre">*buf</span></tt> starting at the given address</li>
+<li>Returns FAIL if the request cannot be handled</li>
+<li>Signals writeDone(...) when complete.</li>
+</ul>
+</dd>
+<dt>erase();</dt>
+<dd><ul class="first last simple">
+<li>Erase the entire volume</li>
+<li>Returns FAIL if the request cannot be handled</li>
+<li>Signals eraseDone(...) when complete.</li>
+</ul>
+</dd>
+<dt>flush()</dt>
+<dd><ul class="first last simple">
+<li>All data that has been previously written and is not yet located on
+non-volatile memory should be immediately stored to non-volatile memory.</li>
+<li>Returns FAIL if the operation cannot be completed at this time</li>
+<li>Signals flushDone(...) when complete.</li>
+</ul>
+</dd>
+<dt>crc(uint32_t addr, uint32_t len, uint16_t baseCrc);</dt>
+<dd><ul class="first last simple">
+<li>Calculate the CRC of 'len' bytes starting at the given address, using
+the given baseCrc as a seed.</li>
+<li>Returns FAIL if the request cannot be handled</li>
+<li>Signals crcDone(...) when complete.</li>
+</ul>
+</dd>
+</dl>
+</div>
+</div>
+<div class="section">
+<h1><a id="implementing-a-platform-independent-logstorage" name="implementing-a-platform-independent-logstorage">3. Implementing a platform-independent LogStorage</a></h1>
+<p>As described in TEP 103, logging can be implemented using two
+different methods: linear and circular.  A linear log fills up
+its volume and stops when it comes to the end.  A circular log allows
+at least half of its volume to remain valid while continuing to write
+the other half.  As previously described, this requires at least
+two erase units to be effective.</p>
+<p>Both logging behaviors can be implemented using the same code.
+A flag for linear log behavior prevents the logger from
+freeing up an erase unit in which to continue writing.</p>
+<p>It should also be noted that the use of a circular log mandates
+the use of at least two erase units on the volume.  As discussed
+in TEP128 <a class="footnote-reference" href="#id7" id="id3" name="id3">[2]</a>, forcing volumes to contain at least two erase
+units solves this issue.</p>
+<div class="section">
+<h2><a id="logstorage-boot-behavior" name="logstorage-boot-behavior">3.1 LogStorage Boot Behavior</a></h2>
+<p>In the previous LogStorage implementations, reboots cause data to be
+lost or overwritten because the beginning and ends of the log were
+never located. Preventing previously stored data from being lost
+or overwritten after reboot is critical for the successful use and
+integration of logging storage components within a practical,
+deployable system.</p>
+<p>A method is required on boot to locate the first memory location to
+read from as well as the next available memory location to write to.
+Although one method is to use microcontroller user memory
+to store the information, the goal is to avoid relying on external
+support due to cross-platform compatibility reasons. Luckily, storing
+and updating this information on the volume itself is easier than
+it seems.</p>
+<p>Flash cannot overwrite areas of memory it has already written without
+performing a read-modify-write operation, and this operation is
+not supported on many flash types.  Regardless of whether the memory
+type can support modifications, all types of memory - including EEPROM -
+should take wear-leveling into account.  Combining these properties,
+it is possible to design a method of maintaining and updating logging
+start and stop information in a cross-platform compatible manner.</p>
+<p>The method of locating logging properties on boot is simplified by making
+entries aligned to erase unit boundaries, never allowing a single
+entry to bridge erase units.  This also prevents invalid entries
+from being created as a result of erasing an erase unit.</p>
+<p>To find the first available write address to add new log entries,
+the first header entry on each erase unit is evaluated to find the
+greatest 32-bit &quot;cookie&quot; value that is not fill-bytes (0xFFFFFFFF).
+The erase unit with the largest value contains the newest data.
+Next, each entry in that erase unit can be iterated through by reading
+each header and skipping the length of the header + data, until a
+header with the value 0xFFFFFFFF is located.  The address of this
+location is the first available address to write.</p>
+<p>Finding the first available address for reading involves the same process.
+The first header entry on each erase unit is evaluated to find the lowest
+32-bit &quot;cookie&quot; value.  The entry with the lowest value is the beginning
+of the log.</p>
+<p>The first entry to read from and last address to write to MUST be
+located on platform boot.</p>
+</div>
+<div class="section">
+<h2><a id="appending-log-entries" name="appending-log-entries">3.2 Appending log entries</a></h2>
+<p>The previous M25P80 log storage implementation is a good place to start.
+In it, each write consists of a 32-bit header &quot;cookie&quot; and the data to
+be appended to the log.  Locating the beginning of the log is therefore
+a matter of finding the lowest header cookie value.  If this were to be
+implemented so entries align with erase unit boundaries, only the
+first header of each erase unit needs to be checked for the lowest value.</p>
+<p>32-bits leaves plenty of space to increment log entry values for.
+If the log were to append one chunk of data every second, it would
+take 136.1 years before the 32-bit header recycles to 0 and causes
+an issue in properly locating the first and last log entries.
+This is well beyond the expected lifetime of a deployed system.</p>
+<p>Each header entry can provide additional support for every
+data entry by allowing it to track the amount of appended data as well
+as an optional 8-bit CRC to verify the data is valid::</p>
+<pre class="literal-block">
+typedef struct log_header_t {
+  uint32_t cookie;
+  uint8_t length;
+  uint8_t crc;
+} log_header_t;
+</pre>
+<p>When the logger appends to the next erase unit boundary, it can first erase
+it to ensure future appends are not corrupted by existing bytes. At the
+point where it reaches the end of its volume, the 'circular' logging
+flag can be used to determine if the logger should go back to the
+beginning of the volume and continue writing.  Again, this is performed
+in conjunction with the VolumeStorage interface to determine erase unit
+properties.</p>
+</div>
+<div class="section">
+<h2><a id="reading-log-entries" name="reading-log-entries">3.3 Reading log entries</a></h2>
+<p>After the first log entry is located, entries are extracted by first
+reading the header of a single entry, and using the information from
+the header to pull out the subsequent log information.  After each read,
+the read pointer is updated to point to the read location of the next header.</p>
+<p>If the header ID is fill bytes (0xFFFFFFFF), then the entry is
+invalid and the read process has reached the end of the log. As with
+the ST M25P80 implementation, entries may be randomly seeked by
+providing the 32-bit &quot;cookie&quot; identifier to locate.</p>
+</div>
+<div class="section">
+<h2><a id="logging-conclusions" name="logging-conclusions">3.5 Logging conclusions</a></h2>
+<p>This proposed logging storage solution will provide the
+ability to maintain and locate previously logged data as well as
+support truly circular logs by mandating more than one erase unit per
+volume.  Behavioral differences between flash chip implementations
+are eliminated so one application can access logging storage across
+all platforms.  Furthermore, reboots will not cause logged information
+to be lost or overwritten.</p>
+<p>Existing LogRead and LogWrite interfaces defined in TEP 103 <a class="footnote-reference" href="#id7" id="id4" name="id4">[2]</a> are
+sufficient to implement cross-platform logging abilities.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="implementing-a-platform-independent-configstorage" name="implementing-a-platform-independent-configstorage">4. Implementing a platform-independent ConfigStorage</a></h1>
+<p>The previous interface to ConfigStorage looks very similar to that
+of BlockStorage.  The ConfigStorage interface allows reads and
+writes to arbitrary addresses, which is not optimal.  One critical
+concept behind the storage of configuration data is the ability to
+modify and overwrite existing parameters while preventing surrounding
+data from being corrupted.  The former ConfigStorage definition did
+not support this, so a new solution should be explored and developed.</p>
+<p>This new solution should prevent an application from specifying
+addresses to read and write to on the volume.  Instead, it should dictate
+addresses underneath, not allowing applications to see those addresses.
+In essence, the solution should handle the allocation of memory and
+take the burden of determining valid addresses off of the application
+layer.  This will allow it to support multiple components written by
+different authors on the same system.</p>
+<div class="section">
+<h2><a id="hash-based-configuration-storage" name="hash-based-configuration-storage">4.1 Hash-based configuration storage</a></h2>
+<p>Several practical deployments have demonstrated the effectiveness of
+a hash-based configuration storage solution.  In it, any module
+in a system can store and update any type of data of any size without
+destroying other modules' information.</p>
+<p>The implementation is similar to that of ConfigStorage in that each
+entry contains a header followed by a variable amount of data.
+The header is different than ConfigStorage headers in that instead
+of containing a 32-bit cookie, it contains a 32-bit hash key and
+a magic number to keep track of state::</p>
+<pre class="literal-block">
+typedef struct config_header_t {
+  uint32_t hashId;
+  uint8_t magic;
+  uint8_t length;
+  uint8_t crc;
+} config_header_t;
+</pre>
+<p>The magic number allows Configuration storage to determine if the
+entry is valid or has been deleted.  Because non-volatile memory typically
+writes from 1's to 0's, the magic number can take on a finite number of
+values before it is filled with 0's.  For example::</p>
+<pre class="literal-block">
+enum {
+  ENTRY_EMPTY = 0xFF,
+  ENTRY_VALID = 0xEE,
+  ENTRY_INVALID = 0xDD,
+};
+</pre>
+<p>Configuration data can be stored and retrieved by indexing it with
+a hash key. Like AM types in the radio stack <a class="footnote-reference" href="#id8" id="id5" name="id5">[3]</a>, each key is uniquely
+defined by the developer.</p>
+<p>Each new update to the configuration storage should create an entirely
+new entry while invalidating any previous entry containing the same hash key.
+Optionally, a small cache in RAM can be used to maintain information about
+where existing hash ID's are located in memory, so non-volatile memory
+does not need to be traversed each time.</p>
+<p>When space runs out on one erase unit, the next erase unit can be used
+to copy in all valid data from the first.  The first erase unit can
+then be erased.  This allows parameters and configuration data to be
+infinitely updated so long as the amount of valid data plus supporting
+headers is less than half the volume's total erase unit size.</p>
+</div>
+<div class="section">
+<h2><a id="improved-configstorage-interface" name="improved-configstorage-interface">4.2 Improved ConfigStorage interface</a></h2>
+<p>The interface to access the configuration storage mechanism is proposed
+as follows, allowing the application layer to continually update
+previously stored parameters while preventing it from accessing
+memory addresses directly::</p>
+<pre class="literal-block">
+interface ConfigStorage {
+
+  command error_t getTotalKeys();
+
+  command error_t insert(uint32_t key, void *value, uint16_t valueSize);
+
+  command error_t retrieve(uint32_t key, void *valueHolder, uint16_t maxValueSize);
+
+  command error_t remove(uint32_t key);
+
+  command error_t getFirstKey();
+
+  command uint32_t getLastKey();
+
+  command error_t getNextKey(uint32_t presentKey);
+
+
+  event void inserted(uint32_t key, void *value, uint16_t valueSize, error_t error);
+
+  event void retrieved(uint32_t key, void *valueHolder, uint16_t valueSize, error_t error);
+
+  event void removed(uint32_t key, error_t error);
+
+  event void nextKey(uint32_t nextKey, error_t error);
+
+  event void totalKeys(uint16_t totalKeys);
+
+}
+</pre>
+<dl class="docutils">
+<dt>getTotalKeys()</dt>
+<dd><ul class="first last simple">
+<li>Determine the total number of valid keys stored on non-volatile memory</li>
+<li>Signals totalKeys(...) when complete</li>
+</ul>
+</dd>
+<dt><tt class="docutils literal"><span class="pre">insert(uint32_t</span> <span class="pre">key,</span> <span class="pre">void</span> <span class="pre">*value,</span> <span class="pre">uint16_t</span> <span class="pre">valueSize)</span></tt></dt>
+<dd><ul class="first last simple">
+<li>Insert some data into the configuration storage associated with the
+given key</li>
+<li>Signals inserted(...) when complete</li>
+</ul>
+</dd>
+<dt><tt class="docutils literal"><span class="pre">retrieve(uint32_t</span> <span class="pre">key,</span> <span class="pre">void</span> <span class="pre">*valueHolder,</span> <span class="pre">uint16_t</span> <span class="pre">maxValueSize)</span></tt></dt>
+<dd><ul class="first last simple">
+<li>Retrieve the value associated with the given key.  The maximum value
+size is the maximum amount of data that can be loaded into the
+<tt class="docutils literal"><span class="pre">*valueHolder</span></tt> location, to avoid overflow</li>
+<li>Signals retrieved(...) when complete</li>
+</ul>
+</dd>
+<dt>remove(uint32_t key)</dt>
+<dd><ul class="first last simple">
+<li>Removes the given key and its associated values from non-volatile memory</li>
+<li>Signals removed(...) when complete</li>
+</ul>
+</dd>
+<dt>getFirstKey()</dt>
+<dd><ul class="first last simple">
+<li>Determines the first key available for reading on non-volatile memory</li>
+<li>Signals nextKey(...) when complete</li>
+</ul>
+</dd>
+<dt>getNextKey(uint32_t presentKey)</dt>
+<dd><ul class="first last simple">
+<li>Obtain the next available key on non-volatile memory based on the
+current key.  Allows the application to traverse through all stored
+keys.</li>
+<li>Signals nextKey(...) when complete</li>
+</ul>
+</dd>
+<dt>getLastKey()</dt>
+<dd><ul class="first last simple">
+<li>Returns last key available for reading on non-volatile memory.</li>
+<li>This value is assumed to be located in cache, so it can
+return immediately</li>
+</ul>
+</dd>
+</dl>
+</div>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">5. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">David Moss</div>
+<div class="line">Rincon Research Corporation</div>
+<div class="line">101 N. Wilmot, Suite 101</div>
+<div class="line">Tucson, AZ  85750</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 520 519 3138</div>
+<div class="line">phone - +1 520 519 3146</div>
+<div class="line">email ? <a class="reference" href="mailto:dmm&#64;rincon.com">dmm&#64;rincon.com</a></div>
+<div class="line"><br /></div>
+<div class="line">Junzhao Du</div>
+<div class="line">Contact -</div>
+<div class="line"><br /></div>
+<div class="line">Prabal Dutta</div>
+<div class="line">Contact -</div>
+<div class="line"><br /></div>
+<div class="line">Deepak Ganesan</div>
+<div class="line">Contact -</div>
+<div class="line"><br /></div>
+<div class="line">Kevin Klues</div>
+<div class="line">Contact -</div>
+<div class="line"><br /></div>
+<div class="line">Manju</div>
+<div class="line">Contact -</div>
+<div class="line"><br /></div>
+<div class="line">Ajay Martin</div>
+<div class="line">Contact -</div>
+<div class="line"><br /></div>
+<div class="line">Gaurav Mathur</div>
+<div class="line">Contact -</div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">6. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id6" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="id6">[1]</a></td><td>TEP 103: Permanent Data Storage (Flash).</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id7" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id7">[2]</a></td><td><em>(<a class="fn-backref" href="#id2">1</a>, <a class="fn-backref" href="#id3">2</a>, <a class="fn-backref" href="#id4">3</a>)</em> TEP 128: Platform independent Non-Volatile Storage Abstraction Layers</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id8" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id5" name="id8">[3]</a></td><td>TEP 116: Packet Protocols</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id9" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id9">[4]</a></td><td>Atmel AT45DB041B datasheet. <a class="reference" href="http://www.atmel.com/dyn/resources/prod_documents/DOC1432.PDF">http://www.atmel.com/dyn/resources/prod_documents/DOC1432.PDF</a></td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id10" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id10">[5]</a></td><td>ST M25P80 datasheet. <a class="reference" href="http://www.st.com/stonline/products/literature/ds/8495/m25p80.pdf">http://www.st.com/stonline/products/literature/ds/8495/m25p80.pdf</a></td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id11" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id11">[6]</a></td><td>K9K1G08R0B datasheet. <a class="reference" href="http://www.samsung.com/Products/Semiconductor/NANDFlash/SLC_SmallBlock/1Gbit/K9K1G08R0B/ds_k9k1g08x0b_rev10.pdf">http://www.samsung.com/Products/Semiconductor/NANDFlash/SLC_SmallBlock/1Gbit/K9K1G08R0B/ds_k9k1g08x0b_rev10.pdf</a></td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">130</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Testbeds Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">All</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Jan Beutel</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">14-Jun-2007</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.2</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2007-06-28</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Testbed WG &lt;<a class="reference" href="mailto:tinyos-testbed-wg&#64;eecs.harvard.edu">tinyos-testbed-wg&#64;eecs.harvard.edu</a>&gt;&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This document specifies a Best Current Practices for the
+TinyOS Community, and requests discussion and suggestions for
+improvements.  Distribution of this memo is unlimited.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo describes the structure and interfaces required for TinyOS compliant
+testbeds.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>The testing and validation of embedded code on real hardware is key to
+successful development of TinyOS applications. Although popular and powerful for
+high level analysis, current simulation methods lack in terms of level of
+detail and accuracy when used accross multiple system layers where abstractions
+and models used are inherently imperfect and impair results. Methods such as
+hardware emulation commonly used in embedded system development allow the
+execution of code on a hardware platform and therefore can guarantee timing but
+are very limited in terms of scalability and often confined to a lab usage only.</p>
+<p>Sensor network testbeds try to overcome these deficiencies by allowing to execute
+software code under realistic operating conditions on real hardware embedded in
+a target environment. This approach allows to generate a level of detail especially
+in respect to the whole system (radio. processor, storage, sensors, interfaces)
+and the wireless environment (noise, fading, shading, errors, failures) while
+maintaining a certain degree of scalability. Remote programming as well as a
+feedback of status and debugging information from the nodes using testbed
+infrastructure alleviates the need for integrated services in sensor network
+applications. Additionally testbeds allow to operate a set of nodes in a
+controlled environment, i.e. using temperature variations or a controlled
+wireless environment.</p>
+<p>A typical testbed is made up of a number of nodes (?do we state amounts here?)
+connected to a central resource for control and logging that are deployed in a
+physical space (testing area). Typically the central resource is a server with
+integrated datalogging capability. Often a web front end serves as a simple control and
+visualization resource. For the submission of testing jobs and the analysis of
+testing results external tools are attached to the central resource using a
+standardized interface. This document serves as a key specification document for
+such an interface and its intended usage.</p>
+<p>MISSING: Difference of a testbed vs. a desktop test (e.g. single nodes with a
+programmer or a simple usb grid)</p>
+<p>Examples of currently used sensor network testbeds are MoteLab [<a class="reference" href="#id1">1</a>] and the
+Deployment-Support Network [<a class="reference" href="#id2">2</a>].</p>
+</div>
+<div class="section">
+<h1><a id="testbed-usage" name="testbed-usage">2. Testbed Usage</a></h1>
+<p>A testbed can serve different purposes depending on the development status and
+requirements of a specific project. While this document does not target to restrict
+such usage it defines a set of mandatory modes of operation that a testbed must
+be able to support:</p>
+<p>Modes of Operation:</p>
+<ul class="simple">
+<li>Single Shot Operation</li>
+</ul>
+<p>Execute a testing job consisting of an uploading of a specific code image onto a
+set of nodes, remote programming of nodes using a testbed resource, the
+synchronized start of this software, capture of resulting target response, the
+centralized storage and timestamping of all actions and target response, ending
+of test execution, notification of a user of the end of test execution, output
+of all stored data on demand.</p>
+<ul class="simple">
+<li>Repetitive (e.g. using continuous integration or for regression testing)</li>
+</ul>
+<p>A concatenation of single shot testing jobs, that in practice often will be used
+with the variation of one or more parameters.</p>
+<ul class="simple">
+<li>Long Term Operation (Profiling)</li>
+</ul>
+<p>Other Topics:</p>
+<ul class="simple">
+<li>Federated Testbeds (in multiple environments)</li>
+<li>Access/Resource Arbitration</li>
+<li>Scheduling of testing jobs</li>
+</ul>
+</div>
+<div class="section">
+<h1><a id="testbed-services" name="testbed-services">3. Testbed Services</a></h1>
+<p>Required Services:</p>
+<ul class="simple">
+<li>identification of target devices (presence, type, hw rev)</li>
+<li>programming of target devices</li>
+<li>resetting of target devices</li>
+<li>logging of target response (UART mandatory, IRQ optional)</li>
+<li>versioning/identification of uploaded software</li>
+<li>identification/versioning/archiving of testing jobs</li>
+<li>testbed status information</li>
+<li>identification of testbed services</li>
+<li>user authentification</li>
+</ul>
+<p>Optional:
+- power measurements
+- stimuli
+- distributed scheduling of actions (at nodes)</p>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">4. Implementation</a></h1>
+<ul class="simple">
+<li>Server, DB/Storage, Interface XMLRPC</li>
+<li>Connection fabric</li>
+<li>On- and offline logging</li>
+<li>Supplied Power</li>
+<li>Mote Hardware</li>
+</ul>
+<p>THINGS TO DISCUSS</p>
+<ul class="simple">
+<li>?Do we state minimum requirements?</li>
+<li>number of nodes</li>
+<li>power supply (fixed/batt)</li>
+<li>power profiling</li>
+<li>power on/off of targets? is simple reset/erasing enough?</li>
+<li>feedback channel capabilities (delay, errors, lost packets...)</li>
+<li>target control? is control of (writing to) targets required or is it an optional feature?</li>
+<li>scheduling of actions (time synched???)</li>
+</ul>
+</div>
+<div class="section">
+<h1><a id="reference" name="reference">5. Reference</a></h1>
+</div>
+<div class="section">
+<h1><a id="acknowledgments" name="acknowledgments">6. Acknowledgments</a></h1>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">7. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Jan Beutel</div>
+<div class="line">Gloriastr 35</div>
+<div class="line">ETH Zurich</div>
+<div class="line">8092 Zurich</div>
+<div class="line">Switzerland</div>
+<div class="line"><br /></div>
+<div class="line">phone - +41 44 632 7032</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:j.beutel&#64;ieee.org">j.beutel&#64;ieee.org</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">8. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id1">[1]</a></td><td>G. Werner-Allen, P. Swieskowski, and M. Welsh. MoteLab: A wireless sensor
+network testbed. In Proc. 4th Int'l Conf. Information Processing Sensor
+Networks (IPSN '05), pages 483-488. IEEE, Piscataway, NJ, April 2005.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id2">[2]</a></td><td>M. Dyer, J. Beutel, L. Thiele, T. Kalt, P. Oehen, K. Martin, and P. Blum.
+Deployment support network - a toolkit for the development of WSNs. In Proc.
+4th European Workshop on Sensor Networks (EWSN 2007), volume 4373 of Lecture
+Notes in Computer Science, pages 195-211. Springer, Berlin, January 2007.</td></tr>
+</tbody>
+</table>
+</div>
+<div class="section">
+<h1><a id="appendix-a-example-appendix" name="appendix-a-example-appendix">Appendix A. Example Appendix</a></h1>
+<p>This is an example appendix. Appendices begin with the letter A.</p>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="creating-a-new-platform-for-tinyos-2-x">
+<h1 class="title">Creating a New Platform for TinyOS 2.x</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">131</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">TinyOS 8051 Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Informational</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Martin Leopold</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">6-Nov-2007</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">6-Nov-2007</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo is informational. It will hopefully be a basis for
+discussions and suggestions for improvements.  Distribution of this
+memo is unlimited.  This memo is in full compliance with TEP 1.</p>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id4" id="abstract" name="abstract">Abstract</a></h1>
+<p>The purpose of this TEP is to provide on overview of how to build a
+new TinyOS 2 platform. While the purpose of most TEPs is to describe
+TinyOS 2 entities, we will present concrete suggestions on how to
+implement a new TinyOS 2 platform. We will use examples and briefly
+cover the relevant TEPs to present a platform that adheres to the
+current TinyOS standards. We will not cover the TEPs in detail, but to
+the full text of each TEP for further information.</p>
+<p>This TEP will go through the tool chain setup and the most basic
+components for a functional TinyOS platform. We consider only TinyOS
+version 2.x (from now on TinyOS).</p>
+<p>Before venturing on this quest we will take a diversion and introduce
+general TinyOS 2 concepts and terminology (Section 1), readers
+familiar to TinyOS 2 can skip this section. This document will
+introduce the TinyOS 2 platform (Section 2) and describes the 3
+elements that make up a platform: the tool chain (Section 3) the
+platform definitions (Section 4) and the chips definitions (Section
+5).</p>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id5" id="table-of-content" name="table-of-content">Table of Content</a></h1>
+<div class="contents topic">
+<p class="topic-title first"><a id="contents" name="contents">Contents</a></p>
+<ul class="simple">
+<li><a class="reference" href="#abstract" id="id4" name="id4">Abstract</a></li>
+<li><a class="reference" href="#table-of-content" id="id5" name="id5">Table of Content</a></li>
+<li><a class="reference" href="#tinyos-overview" id="id6" name="id6">1. TinyOS Overview</a><ul>
+<li><a class="reference" href="#tinyos-2-architecture" id="id7" name="id7">1.1 TinyOS 2 architecture</a></li>
+<li><a class="reference" href="#tinyos-contrib" id="id8" name="id8">1.2 TinyOS Contrib</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#a-tinyos-platform" id="id9" name="id9">2. A TinyOS Platform</a><ul>
+<li><a class="reference" href="#a-new-platform" id="id10" name="id10">2.1 A New Platform</a></li>
+<li><a class="reference" href="#the-chips" id="id11" name="id11">2.2 The Chips</a></li>
+<li><a class="reference" href="#the-platform-directory" id="id12" name="id12">2.3 The Platform Directory</a></li>
+<li><a class="reference" href="#the-tool-chain-make-system" id="id13" name="id13">2.4 The Tool-Chain (Make System)</a></li>
+<li><a class="reference" href="#the-minimal-platform" id="id14" name="id14">2.5 The Minimal Platform</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#tool-chain" id="id15" name="id15">3. Tool Chain</a><ul>
+<li><a class="reference" href="#compiling-using-nesc" id="id16" name="id16">3.1 Compiling using nesC</a></li>
+<li><a class="reference" href="#the-make-system" id="id17" name="id17">3.2 The Make System</a><ul>
+<li><a class="reference" href="#the-target-file" id="id18" name="id18">3.2.1 The .target file</a></li>
+<li><a class="reference" href="#the-rules-file" id="id19" name="id19">3.2.2 The .rules file</a></li>
+</ul>
+</li>
+</ul>
+</li>
+<li><a class="reference" href="#the-platform" id="id20" name="id20">4. The Platform</a><ul>
+<li><a class="reference" href="#platform-file" id="id21" name="id21">4.1 .platform file</a></li>
+<li><a class="reference" href="#platformp-and-platformc" id="id22" name="id22">4.2 PlatformP and PlatformC</a><ul>
+<li><a class="reference" href="#platformc" id="id23" name="id23">4.2.1 PlatformC</a></li>
+<li><a class="reference" href="#platformp" id="id24" name="id24">4.2.1 PlatformP</a></li>
+<li><a class="reference" href="#init-example-platformledsc" id="id25" name="id25">4.2.3 Init example: PlatformLedsC</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#platform-specific-code" id="id26" name="id26">3.3 Platform Specific Code</a><ul>
+<li><a class="reference" href="#platform-headers" id="id27" name="id27">4.3.1 Platform Headers</a><ul>
+<li><a class="reference" href="#hardware-h" id="id28" name="id28">hardware.h</a></li>
+<li><a class="reference" href="#platform-message-h" id="id29" name="id29">platform_message.h</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#platform-specific-components" id="id30" name="id30">4.3.2 Platform Specific Components</a></li>
+</ul>
+</li>
+</ul>
+</li>
+<li><a class="reference" href="#id2" id="id31" name="id31">5. The chips</a><ul>
+<li><a class="reference" href="#mcu-internals" id="id32" name="id32">5.1 MCU Internals</a><ul>
+<li><a class="reference" href="#mcuxardware-h" id="id33" name="id33">5.1.1 mcuXardware.h</a></li>
+<li><a class="reference" href="#mcusleepc" id="id34" name="id34">5.1.2 MCUSleepC</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#generalio" id="id35" name="id35">5.2 GeneralIO</a><ul>
+<li><a class="reference" href="#example-msp430" id="id36" name="id36">5.2.1 Example MSP430</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#leds" id="id37" name="id37">5.3 LEDs</a><ul>
+<li><a class="reference" href="#example-mica2dot" id="id38" name="id38">5.3.1 Example Mica2dot</a></li>
+<li><a class="reference" href="#leds-implementation-discussion" id="id39" name="id39">5.3.2 LEDs implementation discussion</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#timers" id="id40" name="id40">5.4 Timers</a><ul>
+<li><a class="reference" href="#timer-layers" id="id41" name="id41">5.4.1 Timer Layers</a><ul>
+<li><a class="reference" href="#hpl" id="id42" name="id42">HPL</a></li>
+<li><a class="reference" href="#hal" id="id43" name="id43">HAL</a></li>
+<li><a class="reference" href="#hil" id="id44" name="id44">HIL</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#timer-implementation" id="id45" name="id45">5.4.2 Timer Implementation</a></li>
+<li><a class="reference" href="#example-atmega128l" id="id46" name="id46">5.4.3 Example: ATMega128l</a></li>
+<li><a class="reference" href="#id3" id="id47" name="id47">5.4.4 Example: MSP430</a></li>
+<li><a class="reference" href="#example-pxa27x" id="id48" name="id48">5.4.5 Example: PXA27x</a></li>
+<li><a class="reference" href="#timer-discussion" id="id49" name="id49">5.4.6 Timer Discussion</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#i-o-buses-uart-spi-i2c" id="id50" name="id50">5.5 I/O buses (UART, SPI, I2C)</a><ul>
+<li><a class="reference" href="#serial-communication" id="id51" name="id51">5.5.1 Serial Communication</a></li>
+<li><a class="reference" href="#i2c-spi" id="id52" name="id52">5.5.2 I2C, SPI</a><ul>
+<li><a class="reference" href="#spibyte-spipacket" id="id53" name="id53">SpiByte, SpiPacket</a></li>
+<li><a class="reference" href="#i2cpacket" id="id54" name="id54">I2CPacket</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#example" id="id55" name="id55">5.5.3 Example</a></li>
+</ul>
+</li>
+</ul>
+</li>
+<li><a class="reference" href="#authors" id="id56" name="id56">6. Authors</a></li>
+<li><a class="reference" href="#citations" id="id57" name="id57">7. Citations</a></li>
+</ul>
+</div>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id6" id="tinyos-overview" name="tinyos-overview">1. TinyOS Overview</a></h1>
+<p>Before describing the process of writing TinyOS platforms we will
+briefly sum up the TinyOS ecosystem and the terminology required in
+this TEP. To learn more visit the TinyOS website <a class="reference" href="http://www.tinyos.net">http://www.tinyos.net</a>.</p>
+<p>A systems overview is depicted below. In this TEP we will primarily
+concern our selves with the platform portion of figure and briefly
+cover the tool chain. This involves writing the necessary drivers and
+writing rules to pass the code to the TinyOS tool chain. We will not
+cover sensor boards in this TEP refer to, see [<a class="reference" href="#tep109">TEP109</a>] for details.</p>
+<pre class="literal-block">
++------------------------------------------+
+|              Application                 |
++------------------------------------------+
++--------+   +----------+   +--------------+
+| TinyOS | + | Platform | + | Sensor board |
++--------+   +----------+   +--------------+
+                    |
+                    V
+           +-------------------+
+           | TinyOS tool chain |
+           +-------------------+
+                    |
+ Target platform    V
+  +-------------------------------------+
+  |  +-------+    +-----+    +-------+  |
+  |  | Radio |----| MCU |----|Sensors|  |
+  |  +-------+    +-----+    +-------+  |
+  +-------------------------------------+
+</pre>
+<div class="section">
+<h2><a class="toc-backref" href="#id7" id="tinyos-2-architecture" name="tinyos-2-architecture">1.1 TinyOS 2 architecture</a></h2>
+<p>TinyOS 2.x is built on a tree-layered hardware abstraction
+architecture (HAA)[<a class="reference" href="#tep2">TEP2</a>]. This architecture separates the code for
+each platform into distinct layers:</p>
+<blockquote>
+<ol class="arabic simple">
+<li>the Hardware Independent Layer (HIL)</li>
+<li>the Hardware Adaptation Layer (HAL)</li>
+<li>the Hardware Presentation Layer (HPL)</li>
+</ol>
+</blockquote>
+<p>A platform is built from bottom up, starting with the HPL level,
+building HAL and HIL layers on top. Platform independent applications
+are written using HIL level interfaces, allowing them to move easily
+from platform to platform. While applications can target a platform
+specific HAL layer for finer control of hardware specific features,
+this will could prohibit such an application from being easily
+portable. An overview of the TinyOS 2 architecture is given in
+[<a class="reference" href="#tos2-0view">tos2.0view</a>].</p>
+<p>The requirements for the platform implementation is described in
+TinyOS Enhancement Proposals (TEP). Each TEP covers a particular area
+and specifies the recommendations within that area, some of which are
+relevant for platforms. While no specific label or designation is
+given to platforms adhering to the set of TEPs, [<a class="reference" href="#tep1">TEP1</a>] states:
+&quot;Developers desiring to add code (or TEPs) to TinyOS SHOULD follow all
+current BCPs (Best Current Practice)&quot;. At the time of writing no TEP
+has been awarded this designation or been finalized and we will refer
+to the drafts as they are.</p>
+<p>This document will not go through each of the requirements, but merely
+outline how to build a basic functional platform. For further
+information see &quot;TinyOS 2.0 Overview&quot; [<a class="reference" href="#tos2-0view">tos2.0view</a>] or the TEP list on
+the TinyOS website <a class="reference" href="http://www.tinyos.net">http://www.tinyos.net</a>.</p>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id8" id="tinyos-contrib" name="tinyos-contrib">1.2 TinyOS Contrib</a></h2>
+<p>The core of TinyOS is maintained by a set of working groups that
+govern specific parts of the source code. New project can benefit from
+the <em>contrib</em> section of TinyOS. This is a separate section of the
+website and source repository maintained more loosely than the core of
+TinyOS. It is intended for sharing code at an early stage or code that
+may not gain the same popularity as the core.</p>
+<p>New projects request a directory in this repository by following a
+simple procedure on the <a class="reference" href="http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x-contrib/contrib.html">TinyOS contrib web page</a></p>
+<p>In contrib is a skeleton project <em>skel</em> that provides the most basic
+framework for setting up a new platform, MCU, etc.</p>
+</div>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id9" id="a-tinyos-platform" name="a-tinyos-platform">2. A TinyOS Platform</a></h1>
+<p>A TinyOS platform provides the code and tool chain definitions that
+enable an application writer to implement an application for a mote. A
+platform in TinyOS exposes some or all of the features of a particular
+physical mote device to TinyOS applications - it refers to an entire
+system, not a single chip. In order to write programs for a device
+using TinyOS a platform for that device must exist within TinyOS.</p>
+<p>A physical platform is comprised of a set of chips. Similarly a TinyOS
+platform is the collection of the components representing these chips
+(corresponding to drivers) Common chips can be shared among platforms
+and implementing a new platform could simply mean wiring existing
+components in a new way. If the chips that make up the platform are
+not supported by TinyOS implementing the new platform consists if
+implementing components for those chips (much like implementing
+drivers).</p>
+<div class="section">
+<h2><a class="toc-backref" href="#id10" id="a-new-platform" name="a-new-platform">2.1 A New Platform</a></h2>
+<p>Platforms are discovered at compile time by the TinyOS tool
+chain and a new platform placed in the search path will be discovered
+automatically. In addition sensor boards can be defined in a very
+similar manner, however we will not cover sensor boards, see [<a class="reference" href="#tep109">TEP109</a>]
+for details. Defining a new platform boils down to 3 things:</p>
+<blockquote>
+<ol class="arabic simple">
+<li>definitions of the chips that make up the platform,</li>
+<li>platform definitions (combining chips to a platform) and,</li>
+<li>the tool chain or make definitions.</li>
+</ol>
+</blockquote>
+<p>The code for a TinyOS platform is spread out in a few locations of the
+TinyOS tree depending based on those 3 categories. Below is an
+overview of the locations and some of the files we will be needing in
+the following (for further information see see &quot;Coding Conventions&quot;
+[<a class="reference" href="#tep3">TEP3</a>] and the &quot;README&quot; files in each directory).</p>
+<p>Through this TEP we will use the terms PlatformX and MCUX to denote
+the new generic platform and MCU being created:</p>
+<pre class="literal-block">
+tos
+ +--chips                            1. Chip definitions
+ |    +--chipX
+ +--platforms
+ |    +--platformX                   2. Platform definitions
+ |         +--PlatformP/PlatformC
+ |         +--PlatformLeds              example component
+ |         +--.platform
+ |         +--hardware.h
+ |         +--chips
+ |              +--MCUX                 Platform specific features
+ |              +--chipX
+ +--sensorboards
+ |    +--boardX
+ |         +--.sensor
+ +--support
+      +--make                        3. Make definitions
+           +--platformX.target          platformX make targets
+           +--MCUX
+                +--MCUX.rules           make rules for MCUX
+                +--install.extra        additional target for MCUX
+</pre>
+<p>In the following we will briefly introduce each of the parts and
+describe them in more detail in sections 2 through 4.</p>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id11" id="the-chips" name="the-chips">2.2 The Chips</a></h2>
+<p>Each of the chips that provide software accessible functionality must
+have definitions present in the chips directory sensors, radios,
+micro controllers (MCU) alike. Each chip is assigned a separate
+directory under <tt class="docutils literal"><span class="pre">tos/chips</span></tt>. This directory contains chip specific
+interfaces (HPL and HAL interfaces) and their implementations as well
+as implementations of the hardware independent interface (HIL).</p>
+<p>Some chips, MCUs in particular, contain distinct subsystems, such as
+uart, timer, A/D converter, SPI, and so forth. These subsystems are
+often put in a sub directory of their own within the chip-specific
+directory.</p>
+<p>If some feature of a chip is available or used only on a particular
+platform, the platform directory can contain code that is specific to
+this combination of chip and platform, say pin assignments, interrupt
+assignments, etc. For example such additions would be placed in
+<tt class="docutils literal"><span class="pre">tos/platforms/platformX/chips/chipX</span></tt> for PlatformX.</p>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id12" id="the-platform-directory" name="the-platform-directory">2.3 The Platform Directory</a></h2>
+<p>The platform is the piece of the puzzle that ties the components
+corresponding to physical chips (drivers) together to form a
+platform. The platform ties together the code that exposes the
+features of the platform to TinyOS programs. In practise this is done
+by i) including code for each of the chips and ii) by providing any
+additional code that is specific to this particular platform.</p>
+<p>A platform <em>PlatformX</em> would be placed in the directory
+<tt class="docutils literal"><span class="pre">tos/platforms/platformX/</span></tt> and code for subsystems reside in further
+sub directories. Also in this directory is the <tt class="docutils literal"><span class="pre">.platform</span></tt> file that
+sets up include paths and more (see Section 3).</p>
+<p>An empty platform with no code (null) is provided and serves as an
+example for other platforms.</p>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id13" id="the-tool-chain-make-system" name="the-tool-chain-make-system">2.4 The Tool-Chain (Make System)</a></h2>
+<p>The build system for TinyOS is written using GNU Make <a class="footnote-reference" href="#make" id="id1" name="id1">[1]</a>. The
+build system controls the process from pre-processing a TinyOS
+application into a single C file and to pass this file to the
+appropriate compiler and other tools. The make system is documented in
+<tt class="docutils literal"><span class="pre">support/make/README</span></tt> and in TinyOS 2 Tutorial Lesson 10[<a class="reference" href="#tut10">TUT10</a>].</p>
+<p>The make system is located in the <tt class="docutils literal"><span class="pre">support</span></tt> directory. This
+directory contains a platform definition and Make rules to build an
+application for this platform (see Section 2).</p>
+<table class="docutils footnote" frame="void" id="make" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="make">[1]</a></td><td><a class="reference" href="http://www.gnu.org/software/make/">http://www.gnu.org/software/make/</a></td></tr>
+</tbody>
+</table>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id14" id="the-minimal-platform" name="the-minimal-platform">2.5 The Minimal Platform</a></h2>
+<p>Before describing each of the subsystems, we will show a simple check
+list. The absolute minimal TinyOS platform would have to provide the
+following resources, given a <em>PlatformX</em> with <em>MCUX</em>:</p>
+<ul class="simple">
+<li>a platform directory <tt class="docutils literal"><span class="pre">tos/platform/PlatformX/</span></tt> with the following<ul>
+<li>a platform definition (<em>.platform</em> file)</li>
+<li>a <em>hardware.h</em> header</li>
+</ul>
+</li>
+<li>a <em>platformX.target</em> in <tt class="docutils literal"><span class="pre">tos/support/make</span></tt></li>
+<li>a <em>MCUX.rules</em> in <tt class="docutils literal"><span class="pre">tos/support/make/MCUX</span></tt></li>
+<li>a <em>MCUX</em> directory in <tt class="docutils literal"><span class="pre">tos/chips/MCUX</span></tt>, containing<ul>
+<li>a <em>McuSleepC</em> (must enable interrupts)</li>
+<li>a <em>mcuxhardware.h</em> (defines <em>nesc_atomic_start</em>/<em>nesc_atomic_end</em>)</li>
+</ul>
+</li>
+</ul>
+</div>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id15" id="tool-chain" name="tool-chain">3. Tool Chain</a></h1>
+<p>The major components in the tool chain of TinyOS are i) the compiler
+and ii) the build system that uses the compiler to produce an
+executable binary or hex file. The first is installed separately,
+while the second is part of the TinyOS source code. The compile
+process transforms a set of nesC files into a binary executable or hex
+file. Involved in this process is set of separate tools that are
+linked in a chain. We will briefly cover this chain in a moment, but a
+detailed description is beyond the scope of this TEP.</p>
+<p>The make system is split in two: a general part and a platform
+specific part. Section 3.1 will introduce the general mechanism and
+Section 3.2 will cover how to introduce a new platform in the tool
+chain.</p>
+<div class="section">
+<h2><a class="toc-backref" href="#id16" id="compiling-using-nesc" name="compiling-using-nesc">3.1 Compiling using nesC</a></h2>
+<p>The process of the build system is depicted below. This system feeds
+the source code through the tools to produce an executable or hex file
+for uploading to the platform. The nesC pre-compiler is split in two
+tools ncc an nescc. These two tools are used to assemble nesC source
+files into a single C file which is compiled using a regular C
+compiler. This requires that a C compiler is available for a given
+platform and that this compiler accepts the dialect produced by nesC.</p>
+<pre class="literal-block">
+  TinyOS
+application
+    |
+    |
+    V
++------+       +-----+        +---------+         +------------+
+| ncc  | app.c |     | Binary |         | app.hex |            |
+|  +   |------&gt;| GCC |-------&gt;| objdump |--------&gt;| programmer |
+| nesC |       |     |        |         |         |            |
++------+       +-----+        +---------+         +------------+
+                                                        |
+                                                        |
+                                                        V
+                                                      Target
+                                                     platform
+</pre>
+<p>The core TinyOS platforms are centered around GCC, this includes the
+telos family, mica family and intelmote2. The nesC compiler expects
+code resembling GCC C-dialect and also outputs code in GCC
+C-dialect. The current TinyOS platforms are supported by GCC, but for
+some processor architectures GCC is not available (e.g. Motorola HCS08,
+Intel MCS51).</p>
+<p>Porting to platforms that are GCC supported can benefit from the
+existing tool flow, while porting to other platforms requires some
+effort. A straight forward solution adopted for these platforms is to
+post-process the C files produced by nesC to fit the needs of a
+specific compiler, see TEP121 for an example of such a solution.</p>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id17" id="the-make-system" name="the-make-system">3.2 The Make System</a></h2>
+<p>TinyOS controls the build process using make. The global make file
+searches certain locations to find make definitions for all available
+platforms. In order to make a new platform available to the TinyOS
+make system, a few files must be created in particular locations. These
+files will be read by the global make system and exposed to the users
+by make targets. Often the required rules are tied to a particular MCU
+that is shared among several platforms and TinyOS leverages this fact
+by creating a light-weight <em>.target</em> file pointing to the appropriate
+rules in a <em>.rules</em> file. The make system is documented in
+<tt class="docutils literal"><span class="pre">support/make/README</span></tt> and in TinyOS 2 Tutorial Lesson 10[<a class="reference" href="#tut10">TUT10</a>].</p>
+<p>The make system looks for <em>.target</em> files in <tt class="docutils literal"><span class="pre">support/make</span></tt> and the
+directories listed in the environment variable <tt class="docutils literal"><span class="pre">TOSMAKE_PATH</span></tt>. Each
+of the files found contain make targets for one TinyOS platform. The
+target files usually do not contain the rules to build the binary
+files, but include the appropriate rules from a <em>.rules</em> file, located
+in a sub directory for the appropriate MCU architecture (e.g. avr for
+the ATMega128 used by Mica). In this way many platforms share the
+build rules, but have different <em>.target</em> files. In addition <em>.extra</em>
+targets can be used to define helper targets such as install or clean.</p>
+<p>Setting up the make system, requires two steps (Section 3.2.1 gives an
+example):</p>
+<blockquote>
+<ol class="arabic simple">
+<li>Creating a <em>platformX.target</em> file that allows the make system to
+discover the new platform. This file must contain a make rule with
+the name of the platform. Further this target must depend on the
+targets given in the variable <tt class="docutils literal"><span class="pre">BUILD_DEPS</span></tt> - this variable
+contains the remainder of targets to be build during the build
+process.</li>
+<li>Creating a <em>.rules</em> file in a sub diretory of
+<tt class="docutils literal"><span class="pre">support/make</span></tt>. Each file contain the actual target for
+producing the binaries, hex files, etc. for one platform. They are
+assembled in the <tt class="docutils literal"><span class="pre">BUILD_DEPS</span></tt> variable.</li>
+</ol>
+</blockquote>
+<p>We will cover these two files next.</p>
+<div class="section">
+<h3><a class="toc-backref" href="#id18" id="the-target-file" name="the-target-file">3.2.1 The .target file</a></h3>
+<p>As mentioned above TinyOS searches for targets in the <tt class="docutils literal"><span class="pre">support/make</span></tt>
+directory of the TinyOS source code and in the directories listed in
+the environment variable <tt class="docutils literal"><span class="pre">TOSMAKE_PATH</span></tt>. A <em>.target</em> file for the
+platform must exist in one of these locations. The <em>.target</em> usually
+only sets up variables related to this platform and provide a target
+named after the platform, this target depend on other rules to build
+the binaries. These rules are included by calling
+<em>TOSMake_include_platform</em>. As an example the <tt class="docutils literal"><span class="pre">mica2.target</span></tt> is
+listed below:</p>
+<pre class="literal-block">
+PLATFORM = mica2
+SENSORBOARD ?= micasb
+PROGRAMMER_PART ?= -dpart=ATmega128 --wr_fuse_e=ff
+PFLAGS += -finline-limit=100000
+
+AVR_FUSE_H ?= 0xd9
+
+$(call TOSMake_include_platform,avr)
+
+mica2: $(BUILD_DEPS)
+        &#64;:
+</pre>
+<p>Pay attention to the call to <em>TOSMake_include_platform,avr</em> this call
+includes <tt class="docutils literal"><span class="pre">.rules</span></tt> files in <tt class="docutils literal"><span class="pre">support/make</span></tt> or any sub directory of
+<tt class="docutils literal"><span class="pre">TOSHMAKE_PATH</span></tt> named <em>avr</em>.</p>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id19" id="the-rules-file" name="the-rules-file">3.2.2 The .rules file</a></h3>
+<p>The <em>.rules</em> file contain the make rules for building the target
+binary. If a MCU implementation already exists for a new platform,
+simply pointing to this <em>.rules</em> from the corresponding <em>.target</em> is
+sufficient. If not the <em>.rules</em> file must be built for a new MCU
+architecture.</p>
+<p><tt class="docutils literal"><span class="pre">TOSMake_include_platform</span></tt> expects a sub directory with a rule file
+of the form <tt class="docutils literal"><span class="pre">avr/avr.rules</span></tt>. The call also includes additional
+<em>.rules</em> and <em>.extra</em> files present in that sub directory.  See
+<tt class="docutils literal"><span class="pre">support/make/README</span></tt> for details.</p>
+<p>For example a simplified .rules file could look like this (from
+<em>avr/avr.rules</em>):</p>
+<pre class="literal-block">
+...
+
+    BUILD_DEPS = srec tosimage
+
+srec: exe FORCE
+        $(OBJCOPY) --output-target=srec $(MAIN_EXE) $(MAIN_SREC)
+
+tosimage: ihex build_tosimage FORCE
+        &#64;:
+
+exe: builddir $(BUILD_EXTRA_DEPS) FORCE
+        &#64;echo &quot;    compiling $(COMPONENT) to a $(PLATFORM) binary&quot;
+        $(NCC) -o $(MAIN_EXE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS)
+                  $(COMPONENT).nc $(LIBS) $(LDFLAGS)
+...
+</pre>
+</div>
+</div>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id20" id="the-platform" name="the-platform">4. The Platform</a></h1>
+<p>A TinyOS platform is a collection of components corresponding to a
+physical devices (a collection of drivers). A platform is constructed
+by defining which components make up the platform and by providing any
+additional platform specific components. The content of a platform is
+not covered by a TEP at the time of writing and the following is based
+on the available tutorials, <em>READMEs</em> and the current consensus.</p>
+<p>The platform definitions for a <em>PlatformX</em> are located in
+<tt class="docutils literal"><span class="pre">tos/platforms/platformX</span></tt> and contain 3 major elements:</p>
+<blockquote>
+<ol class="arabic simple">
+<li>The <em>.platform</em> file containing include paths and other arguments
+for nesC</li>
+<li>Platform boot procedure: PlatformP/PlatformC</li>
+<li>Platform specific code, including a header for hardware specific
+funtions (hardware.h) and code that is specific to the combination
+of chip and platform (e.g. pin assignments, modifications, etc.).</li>
+</ol>
+</blockquote>
+<p>In the following we will describe each of these in more detail, below
+is a depiction of a fictuous platform and the required definitions.</p>
+<pre class="literal-block">
+Platform:                           .platform
+                                        include MCU driver
+  +-------------------------+           include Radio driver
+  |                         |           include Sensors driver
+  | Chips:                  |
+  |             +-------+   |       PlatformP
+  |             | Radio |   |           Initialize MCU
+  |             +--+----+   |           Initialize Sensor
+  |   +-----+      |        |           Initialize Radio
+  |   | MCU +------+        |
+  |   +-----+      |        |       hardware.h
+  |             +--+----+   |           Include MCU HW macros
+  |             | Leds  |   |
+  |             +-------+   |       HIL interfaces, eg:
+  |                         |           PlatformLeds
+  +-------------------------+
+</pre>
+<p>All the files we describe here must be found in a common directory
+named after the platform; we call this a platform directory. This
+directory must be found in the TinyOS tool chain search path for
+example <tt class="docutils literal"><span class="pre">tos/platforms</span></tt> (or found in <tt class="docutils literal"><span class="pre">TOSHMAKE_PATH</span></tt> see Section
+3.2.1). For example a platform named PlatformX could be placed in the
+directory <tt class="docutils literal"><span class="pre">tos/platforms/platformX</span></tt>.</p>
+<div class="section">
+<h2><a class="toc-backref" href="#id21" id="platform-file" name="platform-file">4.1 .platform file</a></h2>
+<p>All platform directories must carry a <tt class="docutils literal"><span class="pre">.platform</span></tt> file, this file
+defines what makes up the platform. This file carries instructions for
+the make system on where to locate the drivers for each of the
+components of the platform. The definitions are read in a two step
+process: the file is read by the ncc script that passes the
+appropriate arguments to the nesC pre-processor[<a class="reference" href="#nescman">nescman</a>]. The
+.platform file is written as a Perl script interpreted by ncc.</p>
+<p>The file is documented in form of the README file in the platforms
+directory (<em>tos/platforms</em>), and the source code of the ncc script
+found in the TinyOS distribution. Valuable information can also be
+found in [<a class="reference" href="#tep106">TEP106</a>], [<a class="reference" href="#tep109">TEP109</a>], TinyOS 2 Tutorial Lesson 10[<a class="reference" href="#tut10">TUT10</a>].</p>
+<p>In addition to setting up include paths for nesC other arguments can
+be passed on. In particular the components to be used for the
+scheduler are selected with the '-fnesc-scheduler' command line
+argument (see [<a class="reference" href="#tep106">TEP106</a>]). The include paths are passed on using the
+'-I' command line argument covered in [<a class="reference" href="#tep109">TEP109</a>].</p>
+<p>As an example, an abbreviated <em>.platform</em> file for the mica2 platform
+looks like this:</p>
+<pre class="literal-block">
+push( &#64;includes, qw(
+  %T/platforms/mica
+  %T/platforms/mica2/chips/cc1000
+  %T/chips/cc1000
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/timer
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/power
+) );
+
+&#64;opts = qw(
+  -gcc=avr-gcc
+  -mmcu=atmega128
+  -fnesc-target=avr
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+);
+</pre>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id22" id="platformp-and-platformc" name="platformp-and-platformc">4.2 PlatformP and PlatformC</a></h2>
+<p>The PlatformP and PlatformC components are responsible for booting
+this platform to a usable state. In general this usually means things
+like calibrating clock and initializing I/O pins. If this platform
+requires that some devices are initialized in a particular order this
+can be implemented in a platform dependent way here. The boot process
+covered in [<a class="reference" href="#tep107">TEP107</a>].</p>
+<p>Most hardware peripherals require an initialization procedure of some
+sort. For most peripheral devices this procedure is only required when
+the device is in use and can be left out if the device is
+unused. TinyOS accomplishes this by providing a few initialization
+call backs interfaces. When a given component is included it wires an
+initialization procedure to one of these interfaces. In this way the
+procedure will only be included when the component is included, this
+process is known as auto wiring[<a class="reference" href="#tosprg">TOSPRG</a>].</p>
+<p>The boot sequence calls two initialization interfaces in the following
+order: <tt class="docutils literal"><span class="pre">PlatformC.Init</span></tt> and <tt class="docutils literal"><span class="pre">MainC.SoftwareInit</span></tt>.
+<tt class="docutils literal"><span class="pre">PlatformC.Init</span></tt> must take care of initializing the hardware to an
+operable state and initialization that has hidden dependencies must
+occur here. Other components are initialized as part of
+<tt class="docutils literal"><span class="pre">SoftwareInit</span></tt> and the orderign is determined at compile
+time.</p>
+<p>Common tasks in <tt class="docutils literal"><span class="pre">PlatformC.Init</span></tt> include clock calibration and IO
+pins. However this component can be used to provide greater control of
+the boot process if required. Consider for example that some component
+which is initialized in SoftwareInit requires that some other
+component has been initialized previously - lets say that the radio
+must be initialized prior to the radio stack or that a component
+prints a message to the UART during boot. How can this order be
+ensured? One solution is to provide an additional initialization
+handle prior to SoftwareInit and wire such procedures to this
+handle. Below is an example from the Mica mote family using the
+<tt class="docutils literal"><span class="pre">MoteInit</span></tt> interface.  Components that must be initialized early in
+the boot process is wired to this interface. If greater level of
+control is required this strategy can be trivially be expanded to
+further levels of interfaces for example MoteInit1 being initialized
+prior to MoteInit2, this strategy is chosen by the MSP430
+implementation.</p>
+<div class="section">
+<h3><a class="toc-backref" href="#id23" id="platformc" name="platformc">4.2.1 PlatformC</a></h3>
+<p>Below is depicted the PlatformC component from the Mica family of platforms.</p>
+<pre class="literal-block">
+#include &quot;hardware.h&quot;
+
+configuration PlatformC {
+  provides {
+    interface Init;
+    /**
+     * Provides calibration information for other components.
+     */
+    interface Atm128Calibrate;
+  }
+  uses interface Init as SubInit;
+} implementation {
+  components PlatformP, MotePlatformC, MeasureClockC;
+
+  Init = PlatformP;
+  Atm128Calibrate = MeasureClockC;
+
+  PlatformP.MeasureClock -&gt; MeasureClockC;
+  PlatformP.MoteInit -&gt; MotePlatformC;
+  MotePlatformC.SubInit = SubInit;
+}
+</pre>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id24" id="platformp" name="platformp">4.2.1 PlatformP</a></h3>
+<p>Below is depicted the PlatformP component from the Mica family of platforms.</p>
+<pre class="literal-block">
+module PlatformP
+{
+  provides interface Init;
+  uses interface Init as MoteInit;
+  uses interface Init as MeasureClock;
+
+}
+implementation
+{
+  void power_init() {
+     ...
+  }
+
+  command error_t Init.init()
+  {
+    error_t ok;
+
+    ok = call MeasureClock.init();
+    ok = ecombine(ok, call MoteInit.init());
+    return ok;
+  }
+}
+</pre>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id25" id="init-example-platformledsc" name="init-example-platformledsc">4.2.3 Init example: PlatformLedsC</a></h3>
+<p>Below is an example from mica/PlatformLedsC.nc wiring to the platform
+specific <em>MoteInit</em> interface.</p>
+<pre class="literal-block">
+configuration PlatformLedsC {
+  provides interface GeneralIO as Led0;
+...
+  uses interface Init;
+} implementation {
+  components HplAtm128GeneralIOC as IO;
+  components PlatformP;
+
+  Init = PlatformP.MoteInit;
+...
+</pre>
+</div>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id26" id="platform-specific-code" name="platform-specific-code">3.3 Platform Specific Code</a></h2>
+<p>In addition to PlatformP/PlatformC the platform directory contain
+additional code that is specific to this platform. First this could be
+code that ties platform independent resources to particular instances
+on this platform, second it could be code that is only relevant on
+this particular platform (e.g. the clock rate of this platform). For
+example the LEDs are a an example of the first: most platform have a
+few LEDs, and the particular pin on this platform is tied to the
+platform independent implementation using PlatformLedsC.</p>
+<p>TinyOS requires that the header <tt class="docutils literal"><span class="pre">hardware.h</span></tt> is present while other
+component can be named freely.</p>
+<div class="section">
+<h3><a class="toc-backref" href="#id27" id="platform-headers" name="platform-headers">4.3.1 Platform Headers</a></h3>
+<p>TinyOS relies on a few C-header files being present for each
+platform. These headers are then automatically included from the
+respective parts of the TinyOS system. TinyOS expects that the
+following files are present and that certain properties are defined in
+them.</p>
+<div class="section">
+<h4><a class="toc-backref" href="#id28" id="hardware-h" name="hardware-h">hardware.h</a></h4>
+<p>The <tt class="docutils literal"><span class="pre">hardware.h</span></tt> header file is included by <tt class="docutils literal"><span class="pre">tos/system/MainC.nc</span></tt>
+and usually in turn includes a MCU specific header file, with a few
+required macros (such as avr128hardware.h, see Section 5.1.1). The
+header is documented in TinyOS 2 Tutorial Lesson 10[<a class="reference" href="#tut10">TUT10</a>]</p>
+<p>In addition the hardware.h file can set flags that are not related to
+the hardware in general, but to this platform (e.g. clock rate). Below
+is a snippet from <tt class="docutils literal"><span class="pre">mica2/hardware.h</span></tt></p>
+<pre class="literal-block">
+#ifndef MHZ
+/* Clock rate is ~8MHz except if specified by user
+   (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */
+#define MHZ 8
+#endif
+
+#include &lt;atm128hardware.h&gt;
+
+enum {
+  PLATFORM_BAUDRATE = 57600L
+};
+...
+</pre>
+</div>
+<div class="section">
+<h4><a class="toc-backref" href="#id29" id="platform-message-h" name="platform-message-h">platform_message.h</a></h4>
+<p>As part of the TinyOS 2 message buffer abstraction[<a class="reference" href="#tep111">TEP111</a>], TinyOS
+includes the header <em>platform_message.h</em> from the internal TinyOS
+header <em>message.h</em>. This header is only strictly required for
+platforms wishing to use the message_t abstraction - this is not
+described further in this TEP, but is used widely throughout TinyOS
+(See [<a class="reference" href="#tep111">TEP111</a>] for details). The is expected to define the structures:
+<em>message_header_t</em>, <em>message_footer_t</em>, and <em>message_metadata_t</em> which
+are used to fill out the generic <em>message_t</em> structure.</p>
+<p>Below is an example from the <tt class="docutils literal"><span class="pre">mica2</span></tt> <em>platform_message.h</em></p>
+<pre class="literal-block">
+typedef union message_header {
+  cc1000_header_t cc1k;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  cc1000_footer_t cc1k;
+} message_footer_t;
+
+typedef union message_metadata {
+  cc1000_metadata_t cc1k;
+} message_metadata_t;
+</pre>
+</div>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id30" id="platform-specific-components" name="platform-specific-components">4.3.2 Platform Specific Components</a></h3>
+<p>The code for platform dependent features also resides in the platform
+directory. If the code can be tied to a particular chip it can be
+placed in a separate directory below the <tt class="docutils literal"><span class="pre">chips</span></tt> directory. As an
+example the following section of
+<tt class="docutils literal"><span class="pre">micaz/chips/cc2420/HplCC2420PinsC.nc</span></tt> ties specific pins to general
+names on the MicaZ platform.</p>
+<pre class="literal-block">
+configuration HplCC2420PinsC {
+  provides {
+    interface GeneralIO as CCA;
+    interface GeneralIO as CSN;
+    interface GeneralIO as FIFO;
+    interface GeneralIO as FIFOP;
+    interface GeneralIO as RSTN;
+    interface GeneralIO as SFD;
+    interface GeneralIO as VREN;
+  }
+}
+
+implementation {
+
+  components HplAtm128GeneralIOC as IO;
+
+  CCA    = IO.PortD6;
+  CSN    = IO.PortB0;
+  FIFO   = IO.PortB7;
+  FIFOP  = IO.PortE6;
+  RSTN   = IO.PortA6;
+  SFD    = IO.PortD4;
+  VREN   = IO.PortA5;
+
+}
+</pre>
+</div>
+</div>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id31" id="id2" name="id2">5. The chips</a></h1>
+<p>The functionality of each chip is provided by a set of one or more
+interfaces and one or more components, in traditional terms this makes
+up a driver. Each chip is assigned a sub directory in the the
+<tt class="docutils literal"><span class="pre">tos/chips</span></tt> directory. All code that define the functionality of a
+chip is located here regardless of the type of chip (MCU, radio,
+etc.). In addition MCU's group the code related to separate sub
+systems into further sub directories (e.g. <tt class="docutils literal"><span class="pre">tos/chips/atm128/timer</span></tt>).</p>
+<p>In this section we will go trough some of the peripherals commonly
+built into MCUs, but we will not go trough other chips such as sensors
+or radio.</p>
+<div class="section">
+<h2><a class="toc-backref" href="#id32" id="mcu-internals" name="mcu-internals">5.1 MCU Internals</a></h2>
+<p>Apart from the drivers for each of the peripheral units, a few
+additional definitions are required for the internals of the MCU. This
+includes i) atomic begin/end and ii) low power mode. The first is
+defined in the header <em>hardware.h</em> and the latter component
+<em>MCUSleepC</em>.</p>
+<div class="section">
+<h3><a class="toc-backref" href="#id33" id="mcuxardware-h" name="mcuxardware-h">5.1.1 mcuXardware.h</a></h3>
+<p>Each architecture defines a set of required and useful macros in a
+header filed named after the architecture (for example
+<em>atm128hardware.h</em> for ATMega128). This header is then in turn
+included from <em>hardware.h</em> in the platform directory (See Section
+4.3.1).</p>
+<p>A few of the macros are required by nesC code generation. nesC will
+output code using these macros and they must be defined in advance,
+other useful macros such as interrupt handlers on this particular
+platform can be defined here as well. The required macros are:</p>
+<blockquote>
+<ul class="simple">
+<li><em>__nesc_enable_interrupt</em> / <em>__nesc_disable_interrupt</em></li>
+<li><em>__nesc_atomic_start</em> / <em>__nesc_atomic_end</em></li>
+</ul>
+</blockquote>
+<p>Below is a few examples from <em>atm128hardware.h</em></p>
+<pre class="literal-block">
+/* We need slightly different defs than SIGNAL, INTERRUPT */
+#define AVR_ATOMIC_HANDLER(signame) \
+  void signame() __attribute__ ((signal)) &#64;atomic_hwevent() &#64;C()
+
+#define AVR_NONATOMIC_HANDLER(signame) \
+  void signame() __attribute__ ((interrupt)) &#64;hwevent() &#64;C()
+
+...
+
+inline void __nesc_enable_interrupt()  { sei(); }
+inline void __nesc_disable_interrupt() { cli(); }
+
+...
+
+inline __nesc_atomic_t
+__nesc_atomic_start(void) &#64;spontaneous()  {
+    __nesc_atomic_t result = SREG;
+    __nesc_disable_interrupt();
+    asm volatile(&quot;&quot; : : : &quot;memory&quot;);
+    return result;
+}
+
+/* Restores interrupt mask to original state. */
+inline void
+__nesc_atomic_end(__nesc_atomic_t original_SREG) &#64;spontaneous() {
+  asm volatile(&quot;&quot; : : : &quot;memory&quot;);
+  SREG = original_SREG;
+}
+</pre>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id34" id="mcusleepc" name="mcusleepc">5.1.2 MCUSleepC</a></h3>
+<p>TinyOS manages the power state of the MCU through a few
+interfaces. These interfaces allow components to signal how and when
+this platform should enter low power mode. Each new MCU in TinyOS must
+implement the <em>MCUSleepC</em> component that provide the <em>McuSleep</em> and
+<em>McuPowerState</em> interfaces.</p>
+<p>The TinyOS scheduler calls <em>McuSleep.sleep()</em> when it runs out of
+tasks to start. The purpose of this function is to make the MCU enter
+the appropriate sleep mode. The call to <em>McuSleep.sleep()</em> is made
+from within an atomic section making it essential that sleep() enables
+interrupts before entering sleep mode!  If the interrupts not enabled
+prior to entering sleep mode the MCU will not be able to power back up.</p>
+<p>A dummy MCU sleep component that does not enter sleep mode, but merely
+switches interrupts on and off is shown below. This ensures that the
+platform will not lock up even without proper sleep support.</p>
+<pre class="literal-block">
+#include &quot;hardware.h&quot;
+
+module McuSleepC {
+  provides interface McuSleep;
+  provides interface McuPowerState;
+  uses  interface McuPowerOverride;
+} implementation {
+  async command void McuSleep.sleep() {
+    __nesc_enable_interrupt();
+    // Enter sleep here
+    __nesc_disable_interrupt();
+  }
+
+  async command void McuPowerState.update() { }
+}
+</pre>
+</div>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id35" id="generalio" name="generalio">5.2 GeneralIO</a></h2>
+<p>Virtually all micro controllers feature a set of input output (I/O)
+pins.  The features of these pins is often configurable and often some
+pins only support a subset of features. The HIL level interface for
+TinyOS is described in [<a class="reference" href="#tep117">TEP117</a>] and uses two interface to describe
+general purpose I/O pins common to many MCUs:</p>
+<ul class="simple">
+<li><strong>GeneralIO</strong>: Digital input/output. The GeneralIO interface
+describes a digital pin with a state of either <em>clr</em> or <em>set</em>, the
+pin must be capable of both input and output. Some MCUs provide pins
+with different capabilities: more modes (e.g. an alternate
+peripheral mode), less modes (e.g. only input) or a third
+&quot;tri-state&quot; mode. Such chip specific additional features are not
+supported. Some chips group a set of pins into &quot;ports&quot; that can be
+read or written simultaneously, the HIL level interface does not
+support reading or setting an entire port.</li>
+<li><strong>GpioInterrupt</strong>: Edge triggered interrupts. GpioInterrupt support
+a single pin providing an interrupt triggered on a rising or falling
+edge. Pins capable of triggering on an input level or only
+triggering on one edge is not supported.</li>
+</ul>
+<p>While these interfaces are aimed at the HIL level some platforms use
+the GeneralIO and GpioInterrupt interface to represent the HPL level
+(atm128 for example) and others platforms define their own interface
+to capture the entire functionality (msp430, pxa27x for example).</p>
+<p>[<a class="reference" href="#tep117">TEP117</a>] states that each platform must provide the general IO pins of
+that platform through the <em>GeneralIO</em> interface and should do this
+though the component <em>GeneralIOC</em>. It is however not clear how the
+entire set of pins should be provided - this could be in the form of a
+list of pins, group of pins, a generic component, etc.</p>
+<p>The pin implementations are usually found in the <em>pins</em> sub directory
+for a particular MCU (e.g. <em>msp430/pins</em> for MSP430 pin
+implementation).</p>
+<div class="section">
+<h3><a class="toc-backref" href="#id36" id="example-msp430" name="example-msp430">5.2.1 Example MSP430</a></h3>
+<p>The MSP430 implementation builds the platform independent pin
+implementation as a stack of components starting with a platform
+specific component for each pin.</p>
+<pre class="literal-block">
+           |  GeneralIO
++---------------------+
+|      Msp430GpioC    |
++---------------------+
+           |  HplMsp430GeneralIO
++---------------------+
+| HplMsp430GeneralIOC |
++---------------------+
+           |  HplMsp430GeneralIO
++---------------------+
+| HplMsp430GeneralIOP |
++---------------------+
+</pre>
+<p>At the bottom the component <tt class="docutils literal"><span class="pre">HplMsp430GeneralIOP</span></tt> provides a general
+implementation of one Msp430 pin using the <tt class="docutils literal"><span class="pre">HplMsp430GeneralIO</span></tt>
+interface. The generic component <tt class="docutils literal"><span class="pre">HplMsp430GeneralIOP</span></tt> is then
+instantiated for each pin by <tt class="docutils literal"><span class="pre">HplMsp430GeneralIOC</span></tt>.</p>
+<pre class="literal-block">
+interface HplMsp430GeneralIO {
+  async command void set();
+  async command void clr();
+  async command void toggle();
+  async command uint8_t getRaw();
+  async command bool get();
+  async command void makeInput();
+  async command bool isInput();
+  async command void makeOutput();
+  async command bool isOutput();
+  async command void selectModuleFunc();
+  async command bool isModuleFunc();
+  async command void selectIOFunc();
+  async command bool isIOFunc();
+}
+</pre>
+<p>This interface is implemented in the generic component
+HplMsp430GeneralIOP (abbreviated):</p>
+<pre class="literal-block">
+ generic module HplMsp430GeneralIOP(uint8_t port_in_addr, ...)  {
+   provides interface HplMsp430GeneralIO as IO;
+ } implementation  {
+   #define PORTx (*(volatile TYPE_PORT_OUT*)port_out_addr)
+
+   async command void IO.set() { atomic PORTx |= (0x01 &lt;&lt; pin); }
+   async command void IO.clr() { atomic PORTx &amp;= ~(0x01 &lt;&lt; pin); }
+   async command void IO.toggle() { atomic PORTx ^= (0x01 &lt;&lt; pin); }
+
+...
+</pre>
+<p>These are then instantiated from HplMsp430GeneralIOC (abbreviated):</p>
+<pre class="literal-block">
+configuration HplMsp430GeneralIOC {
+  provides interface HplMsp430GeneralIO as Port10;
+  provides interface HplMsp430GeneralIO as Port11;
+...
+} implementation {
+  components
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 0) as P10,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 1) as P11,
+...
+  Port10 = P10;
+  Port11 = P11;
+...
+</pre>
+<p>And finally these are transformed from the interface
+HplMsp430GeneralIO to the platform independent GeneralIO using the
+generic component Msp430GpioC (abbreviated):</p>
+<pre class="literal-block">
+generic module Msp430GpioC() {
+  provides interface GeneralIO;
+  uses interface HplMsp430GeneralIO as HplGeneralIO;
+} implementation {
+  async command void GeneralIO.set() { call HplGeneralIO.set(); }
+  async command void GeneralIO.clr() { call HplGeneralIO.clr(); }
+  async command void GeneralIO.toggle() { call HplGeneralIO.toggle(); }
+...
+</pre>
+</div>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id37" id="leds" name="leds">5.3 LEDs</a></h2>
+<p>Having a few leds on a platform is quite common and TinyOS supports
+three leds in a platform independent manner. Three leds are provided
+through the <em>LedsC</em> component regardless of the amount of leds
+available on the platform. The LED implementation is not covered by a
+TEP at the time of writing, but the general consensus between most
+platforms seems to be to provide access to 3 LEDs through the
+component <em>PlatformLedsC</em>. This component is then used by <em>LedC</em> and
+<em>LedP</em> (from <tt class="docutils literal"><span class="pre">tos/system</span></tt>) to provide a platform independent Led
+interface.</p>
+<p>The PlatformLedsC implementation is found in the platform directory of
+each platform (e.g. <em>tos/platforms/mica2</em> for mica2). The consensus is
+as follows:</p>
+<ul class="simple">
+<li>Each platform provides the component PlatformLedsC</li>
+<li>PlatformLedsC provides Led0, Led1, Led2 using the GeneralIO
+interface. If the platform has less than 3 Leds these are wired to
+the component NoPinC</li>
+<li>PlatformLedsC <em>uses</em> the Init interface and usually it wired back to
+an initialization in PlatformP - this way when LedC is included in
+an application it will be initialized when PlatformP call this
+interface</li>
+</ul>
+<div class="section">
+<h3><a class="toc-backref" href="#id38" id="example-mica2dot" name="example-mica2dot">5.3.1 Example Mica2dot</a></h3>
+<pre class="literal-block">
+configuration PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation  {
+  components HplAtm128GeneralIOC as IO;
+  components new NoPinC();
+  components PlatformP;
+
+  Init = PlatformP.MoteInit;
+
+  Led0 = IO.PortA2;  // Pin A2 = Red LED
+  Led1 = NoPinC;
+  Led2 = NoPinC;
+}
+</pre>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id39" id="leds-implementation-discussion" name="leds-implementation-discussion">5.3.2 LEDs implementation discussion</a></h3>
+<p>The Led interface described above is not specified in a TEP, though at
+the time of writing most platforms seem to follow this pattern. Not
+being covered by a TEP leads to a few uncertainties:</p>
+<ul class="simple">
+<li><em>PlatformLedsC</em> exports leds using the <em>GeneralIO</em> interface. The
+intention is of course that a led is connected to a pin and this pin
+is used to turn the led on. <em>LedC</em> uses this assumption to calls the
+appropriate <em>makeOutput</em> and <em>set</em>/<em>clr</em> calls. However this might
+not be the case - a led could be connected differently making the
+semantics of, say <em>makeOutput</em> unclear. Furthermore it is assumed
+that the set call turns the led on, while the actual pin might have
+to be cleared (active low). And what is the semantics of <em>makeInput</em>
+on a LED? Abstracting these differences into on/off, enable/disable
+semantics would clear up the uncertainties.</li>
+<li>Initializing the Leds is important - the Leds can consume power even
+when turned off, if the corresponding pins are configured
+inappropriately. Including the LedsC component initializes the Leds
+as output when this component is used, if not they must be
+initialized elsewhere (e.g. PlatformP). It would seem elegant to
+group related code (e.g. one Leds component).</li>
+<li>The interface does not provide a uniform way of accessing any
+additional LEDs other than the 3 found on the Mica motes. While this
+is inherently platform specific, having a common consensus would be
+useful, say for example exporting an array of Led. In this way a
+program requiring say 4 leds could be compiled if 4 leds are available.</li>
+</ul>
+</div>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id40" id="timers" name="timers">5.4 Timers</a></h2>
+<p>The timer subsystem in TinyOS 2 is described in [<a class="reference" href="#tep102">TEP102</a>] the TEP
+specifies interfaces at HAL and HIL levels that a platform must adhere
+to. The timer does not cover the possible design choices at the HPL
+level. The timers defined in this TEP are described in terms of
+<em>width</em> of the underlying counters (e.g. 8, 16, 32 bit) and in the
+tick period or frequency denoted <em>precision</em> (e.g. 10 kHz, 1 ms, 1
+us). The timer subsystem is provided through a set of hardware
+independent interfaces and a set of recommended configuration modules.
+As such some features of a particular device may not be available in a
+device independent manner.</p>
+<p>The functionality commonly seen in MCU timer units is often split in 3
+parts: control, timer/counter, capture/compare(trigger). Timer control
+in is inherently platform specific and is not covered by a TEP. The
+timer [<a class="reference" href="#tep102">TEP102</a>] covers timer/counter while capture/compare is covered
+by [<a class="reference" href="#tep117">TEP117</a>]. From the TEPs it is not clear how capture/compare and
+timer/counter relate to each other even though they are likely to
+refer to the same time base. The calibration of the system clock is
+often connected with the timer system and lives in the timer
+directory, but it is not covered in [<a class="reference" href="#tep102">TEP102</a>].</p>
+<p>The timer implementation for a given MCU is placed in the <em>timer</em> sub
+directory of the directory for a given MCU
+(e.g. <em>tos/chips/avr/timer</em>). Often clock initialization components
+are placed in the same directory, but these are not covered by the
+TEPs.</p>
+<div class="section">
+<h3><a class="toc-backref" href="#id41" id="timer-layers" name="timer-layers">5.4.1 Timer Layers</a></h3>
+<p><a class="reference" href="#tep117">TEP117</a> follows the 3 layer architecture and separates the platform
+dependent and independent abstractions. It poses not restrictions on
+the HPL layer, but provides a suggested HAL layer and requirements at
+the HIL level. It defines a set of interfaces and precisions that are
+used at the HAL and HIL levels.</p>
+<p>The common features of a timer are separated into a set of interfaces,
+corresponding roughly to common features in MCU timer units. The
+interfaces covered by the [<a class="reference" href="#tep102">TEP102</a>] are (capture from [<a class="reference" href="#tep117">TEP117</a>]):</p>
+<ul class="simple">
+<li><strong>BusyWait&lt;precision_tag,size_type&gt;</strong> Short synchronous delays</li>
+<li><strong>Counter&lt;precision_tag, size_type&gt;</strong> Current time, and overflow events</li>
+<li><strong>Alarm&lt;precision_tag,size_type&gt;</strong> Extend Counter with at a given time</li>
+<li><strong>Timer&lt;precision_tag&gt;</strong> 32 bit current time, one shot and periodic events</li>
+<li><strong>LocalTime&lt;precision_tag&gt;</strong> 32 bit current time without overflow</li>
+<li><strong>GpioCapture</strong> 16 bit time value on an external event (precision unspecified)</li>
+</ul>
+<p>The precisions defined in [<a class="reference" href="#tep117">TEP117</a>] are defined as &quot;binary&quot; meaning
+1024 parts of a second. Platforms must provide these precisions (if
+possible) regardless of the underlying system frequency (i.e. this
+could be a power of 10).</p>
+<ul class="simple">
+<li><strong>TMilli</strong> 1024 Hz (period 0.98 ms)</li>
+<li><strong>TMicro</strong> 1048576 Hz (period 0.95 us)</li>
+<li><strong>T32khz</strong> 32.768 kHz (period 30.5 us)</li>
+</ul>
+<div class="section">
+<h4><a class="toc-backref" href="#id42" id="hpl" name="hpl">HPL</a></h4>
+<p>The features of the underlying hardware timers are generally exposed
+using one or more hardware specific interfaces. Many MCU provide a
+rich a set of different timer units varying in timer width, frequency
+and features.</p>
+<p>Many MCUs provides features that are quite close to the features
+described by the interfaces above. The HPL layer exposes these
+features and the layers above utilize the available hardware and
+virtualize the features if necessary.</p>
+<p>Consider for example generating events at a specific time. Often a
+timer unit has a single counter and a few compare registers that
+generate interrupts. The counter and compare registers often translate
+relative straightforward to Counter and Alarm interfaces.</p>
+</div>
+<div class="section">
+<h4><a class="toc-backref" href="#id43" id="hal" name="hal">HAL</a></h4>
+<p>Each platform should expose a hardware timer of precision P and width W
+as Counter${P}${W}C, Alarm${P}${W}C(). For example an 8 bit, 32.768 kHz
+timer should be exposed as Counter32khz8C and Alarm32khz8C</p>
+<p>Alarm/Counters come in pairs and refer to a particular hardware unit,
+while there is only one counter there is commonly multiple compare
+registers. Alarm is a generic component and each instantiation must
+provide an independent alarm allocating more Alarm components than
+available compare register should provide a compile time error.</p>
+</div>
+<div class="section">
+<h4><a class="toc-backref" href="#id44" id="hil" name="hil">HIL</a></h4>
+<p>Each platform must expose the following components that provide
+specific width and precision that are guaranteed to exist on TEP
+compliant platforms.</p>
+<blockquote>
+<ul class="simple">
+<li><strong>HilTimerMilliC</strong> A 32 bit Timer interface of TMilli precision</li>
+<li><strong>BusyWaitMicroC</strong> A BusyWait interface of  TMicro precision</li>
+</ul>
+</blockquote>
+</div>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id45" id="timer-implementation" name="timer-implementation">5.4.2 Timer Implementation</a></h3>
+<p>Implementing the timers for TinyOS in short consists of utilizing the
+available HW timer features to provide TinyOS style timers
+interfaces. In general the approach taken by existing platforms is to
+create a set of HPL level timer and control interfaces that export the
+available hardware features and adapt these to specific precisions and
+widths at the HAL level. However the specific HPL level design choices
+differ from platform to platform.</p>
+<p>For example one could export all timers as a simple list, a component
+for each timer, a parameterised interface, etc. Similarly for the
+control features this could be provided with the timer interfaces or
+kept as a separate interface. In the following we will go through a
+few examples and point out their differences.</p>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id46" id="example-atmega128l" name="example-atmega128l">5.4.3 Example: ATMega128l</a></h3>
+<p>The ATMega128l implementation (atm128) exports the system timers one
+component each. Each component provide 4 interfaces - one for each of
+the functions of the unit: timer, capture, compare and control. The
+timer, capture, and compare interfaces are generic based on the width
+(either 8 or 16 bit) while two separate control interfaces are
+provided.</p>
+<p>Depicted below is a diagram of how <tt class="docutils literal"><span class="pre">HplAtm128Timer1C</span></tt> could be stacked
+to provide platform independent interfaces (not shown are
+<tt class="docutils literal"><span class="pre">HplAtm128Timer0Async</span></tt>, <tt class="docutils literal"><span class="pre">HplAtm128Timer2</span></tt>, <tt class="docutils literal"><span class="pre">HplAtm128Timer3</span></tt>):</p>
+<pre class="literal-block">
+          +------------------------------------------------+
+          |              HplAtm128Timer1C                  |
+          +-----+-------------------+-----------------+----+
+HplAtm128Capture|     HplAtm128Timer| HplAtm128Compare|
+                |                   |                 |
+     +----------+---------+         |                 |
+     | Atm128GpioCaptureC |         |                 |
+     +----------+---------+         |                 |
+                |                 +-+-----------------+--+
+     GpioCapture|                 |      Atm128AlarmC    |
+                |                 +----------+-----------+
+                |                       Alarm|
+</pre>
+<p>The hardware features is exported using 3 interfaces:
+<tt class="docutils literal"><span class="pre">HplAtm128Timer</span></tt>, <tt class="docutils literal"><span class="pre">HplAtm128Compare</span></tt> and <tt class="docutils literal"><span class="pre">HplAtm128Capture</span></tt>.</p>
+<pre class="literal-block">
+interface HplAtm128Timer&lt;timer_size&gt;
+{
+  async command timer_size get();
+  async command void       set( timer_size t );
+  async event void overflow();
+  async command void reset();
+  async command void start();
+...
+
+interface HplAtm128Compare&lt;size_type&gt;
+{
+  async command size_type get();
+  async command void set(size_type t);
+  async event void fired();           //&lt;! Signalled on compare interrupt
+  async command void reset();
+...
+
+interface HplAtm128Capture&lt;size_type&gt;
+{
+  async command size_type get();
+  async command void      set(size_type t);
+  async event void captured(size_type t);
+  async command void reset();
+</pre>
+<dl class="docutils">
+<dt>In addition to the timer related interfaces two control interfaces are</dt>
+<dd>provided: 'HplAtm128TimerCtrl16' and 'HplAtm128TimerCtrl8' (below).</dd>
+</dl>
+<pre class="literal-block">
+#include &lt;Atm128Timer.h&gt;
+
+interface HplAtm128TimerCtrl8
+{
+  /// Timer control register: Direct access
+  async command Atm128TimerControl_t getControl();
+  async command void setControl( Atm128TimerControl_t control );
+
+  /// Interrupt mask register: Direct access
+  async command Atm128_TIMSK_t getInterruptMask();
+  async command void setInterruptMask( Atm128_TIMSK_t mask);
+
+  /// Interrupt flag register: Direct access
+  async command Atm128_TIFR_t getInterruptFlag();
+  async command void setInterruptFlag( Atm128_TIFR_t flags );
+}
+</pre>
+<p>Each of the hardware timers are exported in one component for example
+'HplAtm128Timer1P':</p>
+<pre class="literal-block">
+#include &lt;Atm128Timer.h&gt;
+
+module HplAtm128Timer1P
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer&lt;uint16_t&gt;   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture&lt;uint16_t&gt; as Capture;
+    interface HplAtm128Compare&lt;uint16_t&gt; as CompareA;
+    interface HplAtm128Compare&lt;uint16_t&gt; as CompareB;
+    interface HplAtm128Compare&lt;uint16_t&gt; as CompareC;
+  }
+  uses interface HplAtm128TimerCtrl8     as Timer0Ctrl;
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint16_t Timer.get() { return TCNT1; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint16_t t) { TCNT1 = t; }
+...
+</pre>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id47" id="id3" name="id3">5.4.4 Example: MSP430</a></h3>
+<p>The MSP430 features two very similar (but not identical) timers. Both
+timers are provided through the same interfaces in a way similar to
+ATMega128l: 'Msp430Timer', 'Msp430Capture' 'Msp430Compare',
+'Msp430TimerControl'. All timer interfaces (for both timers) are
+accessed through the component Msp430TimerC.</p>
+<p>The <tt class="docutils literal"><span class="pre">Msp430TimerControl</span></tt> is show below. It is slightly different
+than the ATMega equivalent - notice that 'setControl' accepts a struct
+with configuration parameters instead of setting these with a command
+each.</p>
+<pre class="literal-block">
+#include &quot;Msp430Timer.h&quot;
+
+interface Msp430TimerControl
+{
+  async command msp430_compare_control_t getControl();
+  async command bool isInterruptPending();
+  async command void clearPendingInterrupt();
+
+  async command void setControl(msp430_compare_control_t control );
+  async command void setControlAsCompare();
+  async command void setControlAsCapture(uint8_t cm);
+
+  async command void enableEvents();
+  async command void disableEvents();
+  async command bool areEventsEnabled();
+}
+</pre>
+<p>Each timer is implemented through the generic component 'Msp430TimerP'
+that is instantiated for each timer in 'Msp430TimerC':</p>
+<pre class="literal-block">
+configuration Msp430TimerC
+{
+  provides interface Msp430Timer as TimerA;
+  provides interface Msp430TimerControl as ControlA0;
+  provides interface Msp430TimerControl as ControlA1;
+  provides interface Msp430TimerControl as ControlA2;
+  provides interface Msp430Compare as CompareA0;
+  provides interface Msp430Compare as CompareA1;
+  provides interface Msp430Compare as CompareA2;
+  provides interface Msp430Capture as CaptureA0;
+  provides interface Msp430Capture as CaptureA1;
+  provides interface Msp430Capture as CaptureA2;
+...
+}
+implementation
+{
+  components new Msp430TimerP( TAIV_, TAR_, TACTL_, TAIFG, TACLR, TAIE,
+               TASSEL0, TASSEL1, FALSE ) as Msp430TimerA
+           , new Msp430TimerP( TBIV_, TBR_, TBCTL_, TBIFG, TBCLR, TBIE,
+               TBSSEL0, TBSSEL1, TRUE ) as Msp430TimerB
+           , new Msp430TimerCapComP( TACCTL0_, TACCR0_ ) as Msp430TimerA0
+           , new Msp430TimerCapComP( TACCTL1_, TACCR1_ ) as Msp430TimerA1
+           , new Msp430TimerCapComP( TACCTL2_, TACCR2_ ) as Msp430TimerA2
+...
+</pre>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id48" id="example-pxa27x" name="example-pxa27x">5.4.5 Example: PXA27x</a></h3>
+<p>The PXA27x (XScale) platform provides a component for each of the
+timers classes on the system. Each component provides a few interfaces
+that exposes all features of that unit. Each interface combines timer
+and control interface features. For example 'HplPXA27xOSTimerC'
+provides 12 instances of the 'HplPXA27xOSTimer' interface and one
+instace 'HplPXA27xOSTimerWatchdog'. Similarly for 'HplPXA27xSleep' and
+'HplPXA27xWatchdog'.</p>
+<pre class="literal-block">
+interface HplPXA27xOSTimer
+{
+  async command void setOSCR(uint32_t val);
+  async command uint32_t getOSCR();
+...
+
+
+  async event void fired();
+}
+</pre>
+<p>All the OS timers are exported through HplPXA27xOSTimerC</p>
+<pre class="literal-block">
+configuration HplPXA27xOSTimerC {
+
+  provides {
+    interface Init;
+    interface HplPXA27xOSTimer as OST0;
+    interface HplPXA27xOSTimer as OST0M1;
+    interface HplPXA27xOSTimer as OST0M2;
+    interface HplPXA27xOSTimer as OST0M3;
+...
+implementation {
+  components HplPXA27xOSTimerM, HplPXA27xInterruptM;
+
+  Init = HplPXA27xOSTimerM;
+
+  OST0 = HplPXA27xOSTimerM.PXA27xOST[0];
+  OST0M1 = HplPXA27xOSTimerM.PXA27xOST[1];
+  OST0M2 = HplPXA27xOSTimerM.PXA27xOST[2];
+  OST0M3 = HplPXA27xOSTimerM.PXA27xOST[3];
+...
+</pre>
+<p>These interfaces are further abstracted through 'HalPXA27xOSTimerMapC'
+as a parameterised interface:</p>
+<pre class="literal-block">
+configuration HalPXA27xOSTimerMapC {
+  provides {
+    interface Init;
+    interface HplPXA27xOSTimer as OSTChnl[uint8_t id];
+  }
+} implementation {
+  components HplPXA27xOSTimerC;
+
+  Init = HplPXA27xOSTimerC;
+
+  OSTChnl[0] = HplPXA27xOSTimerC.OST4;
+  OSTChnl[1] = HplPXA27xOSTimerC.OST5;
+  OSTChnl[2] = HplPXA27xOSTimerC.OST6;
+ ...
+</pre>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id49" id="timer-discussion" name="timer-discussion">5.4.6 Timer Discussion</a></h3>
+<p>While the TEP is clear on many points there are few that are left up
+to the implementer.  The relation between timers and capture events is
+unclear and covered in two TEPs. Capture refers to timers[<a class="reference" href="#tep102">TEP102</a>] but
+the reverse is not clear[<a class="reference" href="#tep102">TEP102</a>]. This has a few implications for the
+timer/capture relationship:</p>
+<ul class="simple">
+<li>Many devices feature multiple timers of the same width and
+precision. It is not clear how this is provided. In particular how
+this relates to a capture event - e.g. how does a capture event from
+timer 2 relate to a time value from timer 1. Presumably TinyOS has
+one system time based on a single timer which is used by all timer
+capture interfaces and visualized if necessary.</li>
+<li>The interfaces provide a an elegant way to expand a 16 bit timer to
+a 32 bit interface. However this is not the case for capture events.</li>
+</ul>
+</div>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id50" id="i-o-buses-uart-spi-i2c" name="i-o-buses-uart-spi-i2c">5.5 I/O buses (UART, SPI, I2C)</a></h2>
+<p>Most modern microprocessors provide a selection of standard I/O bus
+units such as serial (UART or USART), I2C, SPI, etc. The drivers for
+the available buses are usually put in a sub directory for the MCU
+(e.g. <em>chip/atm128/spi</em> for SPI on ATMega128l).</p>
+<p>There are a few TEP that cover different buses in TinyOS, and low
+level serial communication:</p>
+<ul class="simple">
+<li><a class="reference" href="#tep113">TEP113</a> Serial Communication: Serial</li>
+<li><a class="reference" href="#tep117">TEP117</a> Low-Level I/O: Serial, SPI, I2C</li>
+</ul>
+<p>On some hardware platforms a single I/O unit is shared among a number
+of buses. The MSP430 for example implements SPI, I2C and USART in a
+single USART unit that can only operate in one mode at a time. In such
+cases the single hardware unit must be shared among the drivers.</p>
+<div class="section">
+<h3><a class="toc-backref" href="#id51" id="serial-communication" name="serial-communication">5.5.1 Serial Communication</a></h3>
+<p>Serial communication in TinyOS 2.x is implemented as a serial
+communications stack with a UART or USART at the bottom. The bottom
+layer is covered in [<a class="reference" href="#tep113">TEP113</a>] and [<a class="reference" href="#tep117">TEP117</a>]. TEP117 states that each
+platform must provide access to a serial port through the
+'SerialByteComm' interface from the component UartC. However UartC is
+not provided by any platforms at the time of writing. There seems to
+be a consensus to build the component 'PlatformSerialC' providing the
+'UartStream' and 'StdControl' interfaces. Either component will be
+placed in the platform directory (e.g. <em>tos/platforms/mica2</em> for
+mica2). The serial stack is built upon 'PlatformSerialC' and this
+component will be required to take advantage of the serial stack.</p>
+<p>[<a class="reference" href="#tep117">TEP117</a>] defines 'UartStream' and 'UartByte' to access the a UART
+multiple bytes at a time and one byte at a time (synchronously), while
+[<a class="reference" href="#tep113">TEP113</a>] defines 'UartByte' to send and receive one byte at a time
+(asynchronously).</p>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id52" id="i2c-spi" name="i2c-spi">5.5.2 I2C, SPI</a></h3>
+<p>SPI and I2C buses are provided through straightforward interfaces that
+match the functionality of the buses closely.</p>
+<div class="section">
+<h4><a class="toc-backref" href="#id53" id="spibyte-spipacket" name="spibyte-spipacket">SpiByte, SpiPacket</a></h4>
+<pre class="literal-block">
+interface SpiByte {
+  async command uint8_t write( uint8_t tx );
+}
+</pre>
+<pre class="literal-block">
+interface SpiPacket {
+  async command error_t send( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len );
+  async event void sendDone( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len,
+                             error_t error );
+}
+</pre>
+</div>
+<div class="section">
+<h4><a class="toc-backref" href="#id54" id="i2cpacket" name="i2cpacket">I2CPacket</a></h4>
+<pre class="literal-block">
+interface I2CPacket&lt;addr_size&gt; {
+  async command error_t read(i2c_flags_t flags, uint16_t addr,
+                             uint8_t length, uint8_t* data);
+  async command error_t write(i2c_flags_t flags, uint16_t addr,
+                              uint8_t length,  uint8_t* data);
+  async event void readDone(error_t error, uint16_t addr,
+                            uint8_t length, uint8_t* data);
+  async event void writeDone(error_t error, uint16_t addr,
+                             uint8_t length, uint8_t* data);
+}
+</pre>
+</div>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id55" id="example" name="example">5.5.3 Example</a></h3>
+<dl class="docutils">
+<dt>..ATMega128</dt>
+<dd>-&gt; does not provide SerialByteComm</dd>
+<dt>..MSP430</dt>
+<dd>-&gt; Uart1C provides SerialByteComm along with Init and StdControl
+-&gt; sender det meste videre til Msp430Uart1C (som mangler Init!?!?)
+Msp430Uart0C
+-&gt; SerialByteComm, Msp430UartControl, Msp430UartConfigure, Resurce
+-&gt; Sender videre til  Msp430Uart1P &amp; Msp430Usart1C
+-&gt; Sender videre til HplMsp430Usart1C-&gt;HplMsp430Usart1P</dd>
+<dt>..PXA27</dt>
+<dd>Parametriseret m. HplPXA27xUARTP (Init &amp;&amp; HplPXA27xUART)
+-&gt; init sÊtter en masse registre og enabler interrupt
+HalPXA27xSerialP: HplPXA27xUART, Init, noget DMA noget</dd>
+</dl>
+</div>
+</div>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id56" id="authors" name="authors">6. Authors</a></h1>
+<div class="line-block">
+<div class="line">Martin Leoold</div>
+<div class="line">University of Copenhagen, Dept. of Computer Science</div>
+<div class="line">Universitetsparken 1</div>
+<div class="line">DK-2100 K¯benhavn ÿ</div>
+<div class="line">Denmark</div>
+<div class="line"><br /></div>
+<div class="line">Phone +45 3532 1464</div>
+<div class="line"><br /></div>
+<div class="line">email - <a class="reference" href="mailto:leopold&#64;diku.dk">leopold&#64;diku.dk</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id57" id="citations" name="citations">7. Citations</a></h1>
+<table class="docutils citation" frame="void" id="tep1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep1">[TEP1]</a></td><td>TEP 1: TEP Structure and Keywords
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/tep1.html">http://www.tinyos.net/tinyos-2.x/doc/html/tep1.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep2">[TEP2]</a></td><td>TEP 2: Hardware Abstraction Architecture
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/tep2.html">http://www.tinyos.net/tinyos-2.x/doc/html/tep2.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep3" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep3">[TEP3]</a></td><td>TEP 3: Coding Standard
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/tep3.html">http://www.tinyos.net/tinyos-2.x/doc/html/tep3.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep102" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep102">[TEP102]</a></td><td>TEP 102: Timers
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/tep102.html">http://www.tinyos.net/tinyos-2.x/doc/html/tep102.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep106" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep106">[TEP106]</a></td><td>TEP 106: Schedulers and Tasks
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/tep106.html">http://www.tinyos.net/tinyos-2.x/doc/html/tep106.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep107" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep107">[TEP107]</a></td><td>TEP 107: TinyOS 2.x Boot Sequence
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/tep107.html">http://www.tinyos.net/tinyos-2.x/doc/html/tep107.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep109" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep109">[TEP109]</a></td><td>TEP 109: Sensors and Sensor Boards
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/tep109.html">http://www.tinyos.net/tinyos-2.x/doc/html/tep109.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep111" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep111">[TEP111]</a></td><td>TEP 111: message_t
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/tep111.html">http://www.tinyos.net/tinyos-2.x/doc/html/tep111.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep113" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep113">[TEP113]</a></td><td>TEP 113: Serial Communication
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/tep113.html">http://www.tinyos.net/tinyos-2.x/doc/html/tep113.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep117" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep117">[TEP117]</a></td><td>TEP 117: Low-Level I/O
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/tep117.html">http://www.tinyos.net/tinyos-2.x/doc/html/tep117.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep121" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep121">[TEP121]</a></td><td>TEP 121: Towards TinyOS for 8051
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/tep121.html">http://www.tinyos.net/tinyos-2.x/doc/html/tep121.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tosprg" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tosprg">[TOSPRG]</a></td><td>Philip Levis: TinyOS Programming
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/pdf/tinyos-programming.pdf">http://www.tinyos.net/tinyos-2.x/doc/pdf/tinyos-programming.pdf</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tos2-0view" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tos2-0view">[tos2.0view]</a></td><td>Philip Levis. &quot;TinyOS 2.0 Overview&quot; <em>Feb 8 2006</em>
+&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/overview.html">http://www.tinyos.net/tinyos-2.x/doc/html/overview.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="nescman" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="nescman">[nescman]</a></td><td>David Gay, Philip Levis, David Culler, Eric Brewer. &quot;NesC 1.2 Language Reference Manual&quot; <em>August 2005</em></td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tut10" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tut10">[TUT10]</a></td><td><dl class="first docutils">
+<dt>TinyOS 2 Tutorial Lesson 10</dt>
+<dd>&lt;<a class="reference" href="http://www.tinyos.net/tinyos-2.x/doc/html/tutorial/lesson10.html">http://www.tinyos.net/tinyos-2.x/doc/html/tutorial/lesson10.html</a>&gt;</dd>
+</dl>
+<p class="last">LocalWords:  TinyOS TEP TEPs nesC</p>
+</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="packet-timestamping">
+<h1 class="title">Packet timestamping</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">TBA</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">&gt; 2.1</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Miklos Maroti, Janos Sallai</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">15-May-2008</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.1</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2008-06-17</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and requests
+discussion and suggestions for improvements.  Distribution of this memo is
+unlimited. This memo is in full compliance with TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This TEP describes a mechanism that provides access to the time of transmission
+and time of reception of a packet. The local clocks of the sender and recipient
+are used to timestamp the transmission and reception of the packet,
+respectively.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>Time of packet sending and reception is often of interest in sensor network
+applications. Typically, neither the time of invocation of the send command, nor
+the time of signaling of the sendDone event can be used to estimate, without
+significant jitter, the time when the packet was transmitted. Similarly, the
+time of occurrence of the receive event cannot be used to reliably estimate the
+time of reception.</p>
+<p>A straightforward way of message timestamping is to use the start-of-frame
+delimiter interrupt, commonly exposed by packet-oriented radio transceivers.
+This approach was taken by the CC2420 radio stack in TinyOS 1.x: the SFD
+interrupt handler was exposed by the radio stack as an asynchronous event. This
+solution was problematic, because higher- level application components that
+wired the interface containing this event could break the timing of radio stack
+due to excessive computation in interrupt context.</p>
+<p>This TEP overcomes this issue by providing a standardized, platform- independent
+interface to access packet timestamps without exposing timing critical and/or
+hardware-specific events. Also, this TEP does not prescribe how packet
+timestamping should be implemented: it only describes the interfaces and the
+required functionality (semantics).</p>
+</div>
+<div class="section">
+<h1><a id="the-packettimestamp-interface" name="the-packettimestamp-interface">2. The <tt class="docutils literal"><span class="pre">PacketTimeStamp</span></tt> interface</a></h1>
+<p>This TEP specifies a standard interface (<tt class="docutils literal"><span class="pre">PacketTimeStamp</span></tt>) to access the
+packet transmission and packet reception times. The sender and the receiver use
+unsynchronized clocks to timestamp packets. The precision and width of
+timestamps is specified as interface parameters <tt class="docutils literal"><span class="pre">precision_tag</span></tt> and
+<tt class="docutils literal"><span class="pre">size_type</span></tt>:</p>
+<pre class="literal-block">
+interface PacketTimeStamp&lt;precision_tag, size_type&gt;
+{
+        async command bool isValid(message_t* msg);
+        async command size_type timestamp(message_t* msg);
+        async command void clear(message_t* msg);
+        async command void set(message_t* msg, size_type value);
+}
+</pre>
+<p>The <tt class="docutils literal"><span class="pre">timestamp</span></tt> command of the <tt class="docutils literal"><span class="pre">PacketTimeStamp</span></tt> interface is an accessor to the
+the timestamp. The <tt class="docutils literal"><span class="pre">timestamp</span></tt> command returns the time
+of transmission after a sendDone event, and the time of reception after a
+receive event.</p>
+<p>In some cases, it is not possible to timestamp certain packets (e.g. under very
+heavy traffic multiple interrupts can occur before they could be serviced, and
+even if capture registers are used, it is not possible to get the time stamp for
+the first or last unserviced event). The <tt class="docutils literal"><span class="pre">PacketTimeStamp</span></tt> interface contains
+the <tt class="docutils literal"><span class="pre">isValid</span></tt> command to query if the packet timestamp is valid.</p>
+<p>The communications stack MUST guarantee that if the <tt class="docutils literal"><span class="pre">isValid</span></tt> command called
+from within the <tt class="docutils literal"><span class="pre">sendDone</span></tt> or <tt class="docutils literal"><span class="pre">receive</span></tt> event handler returns <tt class="docutils literal"><span class="pre">TRUE</span></tt>, then
+the value returned by the <tt class="docutils literal"><span class="pre">timestamp</span></tt> command can be trusted. However, it
+might be possible that the local clock overflowed more than once or that is was
+stopped or reset since the packet was timestamped, which causes the value
+returned by the <tt class="docutils literal"><span class="pre">timestamp</span></tt> command invalid. The <tt class="docutils literal"><span class="pre">isValid</span></tt> command MAY
+return TRUE in such situations, and it is the responsibility of the user of the
+interface to ensure that the clock runs freely from the time of message
+reception to the time when <tt class="docutils literal"><span class="pre">timestamp</span></tt> is called. To avoid this issue, it is
+recommended that <tt class="docutils literal"><span class="pre">isValid</span></tt> and <tt class="docutils literal"><span class="pre">timestamp</span></tt> are called from the <tt class="docutils literal"><span class="pre">receive</span></tt>
+or <tt class="docutils literal"><span class="pre">sendDone</span></tt> event handler.</p>
+<p>The clear command invalidates the timestamp: after clear is called, <tt class="docutils literal"><span class="pre">isValid</span></tt>
+will return <tt class="docutils literal"><span class="pre">FALSE</span></tt>. A <tt class="docutils literal"><span class="pre">set</span></tt> command is also included to allow for changing
+the timestamp associated with the message. After the <tt class="docutils literal"><span class="pre">set</span></tt> command is called,
+<tt class="docutils literal"><span class="pre">isValid</span></tt> will return TRUE.</p>
+<p>The communications stack guarantees that the transmission timestamp and the
+reception timestamp that belong to the same packet transmission always
+correspond to the same physical phenomenon, i.e. to the same instance of
+physical time. This TEP does not prescribe what synchronization event the
+communications stack should use. For example, the communications stack may chose
+to timestamps hardware events that correspond to the start of
+transmission/reception of the packet, signaled a start-of-frame delimiter (SFD)
+interrupt. The SFD interrupt occurs at the same time on the transmitter and the
+receiver (assuming that the signal propagation delay is negligible).
+Alternatively, on a byte oriented radio, the timestamp may correspond to the
+average of the transmission times of bytes, as described in <a class="footnote-reference" href="#id5" id="id1" name="id1">[2]</a>.</p>
+</div>
+<div class="section">
+<h1><a id="hil-requirements" name="hil-requirements">3. HIL requirements</a></h1>
+<p>The signature of the platform's ActiveMessageC <a class="footnote-reference" href="#id6" id="id2" name="id2">[3]</a> MUST include:</p>
+<pre class="literal-block">
+provides interface PacketTimeStamp&lt;TMilli,uint32_t&gt;;
+</pre>
+<p>where timestamps are given in the node's local time, which is available through
+<tt class="docutils literal"><span class="pre">HILTimerMilliC.LocalTime</span></tt> <a class="footnote-reference" href="#id7" id="id3" name="id3">[4]</a>.</p>
+<p>The communications stack MAY support timestamp precisions and widths other than
+<tt class="docutils literal"><span class="pre">TMilli</span></tt> and <tt class="docutils literal"><span class="pre">uint32_t</span></tt>, respectively. Also, alternative
+<tt class="docutils literal"><span class="pre">TimesyncedPacket</span></tt> implementations MAY use clock sources other than
+<tt class="docutils literal"><span class="pre">HILTimerMilliC.LocalTime</span></tt>.</p>
+</div>
+<div class="section">
+<h1><a id="implementation" name="implementation">4. Implementation</a></h1>
+<p>A reference implementation of the packet timestamping mechanism described in
+this TEP can be found in <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/rf230</span></tt>.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">5. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Miklos Maroti</div>
+<div class="line">Janos Sallai</div>
+<div class="line">Institute for Software Integrated Systems</div>
+<div class="line">Vanderbilt University</div>
+<div class="line">2015 Terrace Place</div>
+<div class="line">Nashville, TN 37203</div>
+<div class="line">phone: +1 (615) 343-7555</div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">6. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id4" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id4">[1]</a></td><td>TEP 111: message_t</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id5" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="id5">[2]</a></td><td>Maroti, M., Kusy, B., Simon, G., and Ledeczi, A. 2004. The flooding time synchronization protocol. In Proceedings of the 2nd international Conference on Embedded Networked Sensor Systems (Baltimore, MD, USA, November 03 - 05, 2004). ACM SenSys '04.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id6" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="id6">[3]</a></td><td>TEP 116: Packet protocols</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id7" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="id7">[4]</a></td><td>TEP 102: Timers</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="packet-level-time-synchronization">
+<h1 class="title">Packet-level time synchronization</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">TBA</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">&gt; 2.1</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Miklos Maroti, Janos Sallai</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">15-May-2008</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.1</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2008-06-17</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and requests
+discussion and suggestions for improvements.  Distribution of this memo is
+unlimited. This memo is in full compliance with TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This TEP describes a packet-level time synchronization mechanism that allows for
+sending a time value along with the packet which is automatically converted from
+the sender's local time to the receiver's local time by the communications
+stack.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>Time of occurrence of events is often of interest in a sensor network.
+Maintaining a synchronized UTC or a virtual global time in a sensor network may,
+however, lead to significant communication overhead and may not always be
+required by the application.</p>
+<p>This TEP describes a packet-level time synchronization mechanism that allows for
+sending a time value along with the packet which is automatically converted from
+the sender's local time to the receiver's local time by the communications
+stack. Packet-level time synchronization is limited to single-hop communication
+and does not provide synchronized network time. It provides a simple yet
+powerful abstraction, on top of which it is possible to implement higher-level
+time synchronization services (e.g. FTSP <a class="footnote-reference" href="#id17" id="id1" name="id1">[6]</a>)in a platform-independent way.
+Packet-level time synchronization is semantically equivalent to the ETA
+primitives <a class="footnote-reference" href="#id12" id="id2" name="id2">[1]</a>.</p>
+<p>The rest of this TEP specifies:</p>
+<ul class="simple">
+<li>Platform-independent packet-level time synchronization interfaces</li>
+<li>How these interfaces are provided in the HIL</li>
+<li>A guideline how each transceiver's HAL may implement the above interfaces</li>
+</ul>
+</div>
+<div class="section">
+<h1><a id="interface" name="interface">2. Interface</a></h1>
+<p>Packet-level time synchronization is implemented by the communication stack and
+is exposed through two interfaces, <tt class="docutils literal"><span class="pre">TimeSyncAMSend</span></tt> and <tt class="docutils literal"><span class="pre">TimeSyncPacket</span></tt>.</p>
+<p>The <tt class="docutils literal"><span class="pre">TimeSyncAMSend</span></tt> interface allows for sending a time value (e.g. an event
+timestamp) along with a message. It is parameterized by the precision and width
+of the time value:</p>
+<pre class="literal-block">
+interface TimeSyncAMSend&lt;precision_tag, size_type&gt;
+{
+  command error_t send(am_addr_t addr, message_t* msg, uint8_t len, size_type event_time);
+  command error_t cancel(message_t* msg);
+  event void sendDone(message_t* msg, error_t error);
+  command uint8_t maxPayloadLength();
+  command void* getPayload(message_t* msg, uint8_t len);
+}
+</pre>
+<p>The <tt class="docutils literal"><span class="pre">send</span></tt> command sends a regular message just like <tt class="docutils literal"><span class="pre">AMSend.send</span></tt> <a class="footnote-reference" href="#id13" id="id3" name="id3">[2]</a>, but
+it also performs sender-receiver time synchronization. The <tt class="docutils literal"><span class="pre">event_time</span></tt>
+parameter holds the time of some event as expressed in the local clock of the
+sender. The receiver can obtain the time of this event (expressed in its own
+local time) via the <tt class="docutils literal"><span class="pre">TimeSyncPacket</span></tt> interface.</p>
+<p>The rest of the functionality is identical to that of the <tt class="docutils literal"><span class="pre">AMSend</span></tt> interface,
+therefore its description is omitted here.  Please refer to <a class="footnote-reference" href="#id13" id="id4" name="id4">[2]</a> for details.</p>
+<p>The <tt class="docutils literal"><span class="pre">TimeSyncPacket</span></tt> interface, parameterized by a precision tag and width,
+allows for retrieving a time value that was sent along the received packet:</p>
+<pre class="literal-block">
+interface TimeSyncPacket&lt;precision_tag, size_type&gt;
+{
+        command bool isValid(message_t* msg);
+        command size_type eventTime(message_t* msg);
+}
+</pre>
+<p>The <tt class="docutils literal"><span class="pre">isValid</span></tt> command returns <tt class="docutils literal"><span class="pre">TRUE</span></tt> if the value returned by
+<tt class="docutils literal"><span class="pre">eventTime</span></tt> can be trusted. Under certain circumstances the received packet
+cannot be properly time stamped, so the sender-receiver synchronization cannot
+be finished on the receiver side. In such case, this command returns <tt class="docutils literal"><span class="pre">FALSE</span></tt>.
+This command MUST be called only on the receiver side and only for messages
+transmitted via the TimeSyncAMSend interface.</p>
+<p>The communications stack MUST guarantee that if the <tt class="docutils literal"><span class="pre">isValid</span></tt> command called
+from within the <tt class="docutils literal"><span class="pre">receive</span></tt> event handler returns <tt class="docutils literal"><span class="pre">TRUE</span></tt>, then the value
+returned by the <tt class="docutils literal"><span class="pre">eventTime</span></tt> command can be trusted. However, it might be
+possible that the local clock overflowed more than once or that is was stopped
+or reset since the packet was received, which causes the <tt class="docutils literal"><span class="pre">event_time</span></tt> to be
+invalid. The <tt class="docutils literal"><span class="pre">isValid</span></tt> command MAY return <tt class="docutils literal"><span class="pre">TRUE</span></tt> in such situations, and it
+is the responsibility of the user of the interface to ensure that the clock runs
+freely from the time of message reception to the time when <tt class="docutils literal"><span class="pre">eventTime</span></tt> is
+called. To avoid this issue, it is recommended that <tt class="docutils literal"><span class="pre">isValid</span></tt> and
+<tt class="docutils literal"><span class="pre">eventTime</span></tt> are called from the <tt class="docutils literal"><span class="pre">receive</span></tt> event handler.</p>
+<p>The <tt class="docutils literal"><span class="pre">eventTime</span></tt> command should be called by the receiver of a packet. The
+time of the synchronization event is returned as expressed in the local clock of
+the caller. This command MUST BE called only on the receiver side and only for
+messages transmitted via the <tt class="docutils literal"><span class="pre">TimeSyncAMSend</span></tt> interface.</p>
+</div>
+<div class="section">
+<h1><a id="hil-requirements" name="hil-requirements">3. HIL requirements</a></h1>
+<p>The signature of the platform's ActiveMessageC <a class="footnote-reference" href="#id16" id="id5" name="id5">[5]</a> MUST include:</p>
+<pre class="literal-block">
+provides interface TimeSyncAMSend&lt;TMilli, uint32_t&gt;;
+provides interface TimeSyncPacket&lt;TMilli, uint32_t&gt;;
+</pre>
+<p>where event times are given in the node's local time, which is available through
+<tt class="docutils literal"><span class="pre">HILTimerMilliC.LocalTime</span></tt>.</p>
+<p>The communications stack MAY support timestamp precisions and widths other than
+<tt class="docutils literal"><span class="pre">TMilli</span></tt> and uint32_t, respectively. Also, alternative <tt class="docutils literal"><span class="pre">TimeSyncAMSend</span></tt> and
+<tt class="docutils literal"><span class="pre">TimeSyncPacket</span></tt> implementations MAY use clock sources other than
+<tt class="docutils literal"><span class="pre">HILTimerMilliC.LocalTime</span></tt>.</p>
+</div>
+<div class="section">
+<h1><a id="implementation-guidelines" name="implementation-guidelines">4. Implementation guidelines</a></h1>
+<p>Packet-level time synchronization employs the ETA primitives. In this TEP, only
+the basics of the time synchronization mechanism are described, for details
+please see <a class="footnote-reference" href="#id12" id="id6" name="id6">[1]</a>. This section presents two possible implementation approaches.
+The first approach assumes that the payload of the packet is still mutable when
+the transmission time of the packet (e.g. the timestamp of the SFD interrupt)
+becomes available. The second approach avoids this assumption and uses the
+packet timestamping functionality described in TEP <a class="footnote-reference" href="#id15" id="id7" name="id7">[4]</a> to implement packet-
+level time synchronization.</p>
+<div class="section">
+<h2><a id="approach-1" name="approach-1">4.1 Approach #1</a></h2>
+<p>Several transceivers allow for modifying the contents of a packet after packet
+transmission is started. Packet-level time synchronization can be implemented
+very efficiently on such platforms.</p>
+<p>Transmitter's story</p>
+<blockquote>
+<ul class="simple">
+<li>When the communications stack services a <tt class="docutils literal"><span class="pre">TimeSyncAMSend.send</span></tt> command called
+with event timestamp <tt class="docutils literal"><span class="pre">t_e</span></tt>, it stores <tt class="docutils literal"><span class="pre">t_e</span></tt> (e.g. in a map with the pointer
+of the message_t as key) and sets the designated timestamp field in the packet
+payload to <tt class="docutils literal"><span class="pre">0x80000000</span></tt>.</li>
+<li>When the packet starts being transmitted over the communication medium, a
+corresponding hardware event is timestamped (e.g. an SFD interrupt). Let us
+denote this transmission timestamp with <tt class="docutils literal"><span class="pre">t_tx</span></tt>. The difference of event
+timestamp <tt class="docutils literal"><span class="pre">t_e</span></tt> and transmit timestamp <tt class="docutils literal"><span class="pre">t_tx</span></tt> is written into the
+designated timestamp field in the payload of the packet (typically into the
+footer, since the first few bytes might have been transmitted by this time).
+That is, the information the packet contains at the instance when being sent
+over the communications medium is the age of the event (i.e. how much time ago
+the event had occurred).</li>
+<li>If an error occurs with timestamping the transmission or with writing the
+package payload after transmission has started, then the designated timestamp
+field in the packet payload will contain <tt class="docutils literal"><span class="pre">0x80000000</span></tt>, indicating the error
+to the receiver.</li>
+</ul>
+</blockquote>
+<p>Receiver's story</p>
+<blockquote>
+<ul class="simple">
+<li>The packet is timestamped with the receiver node's local clock at reception
+(e.g. with the timestamp of the SFD interrupt). Let us denote the time of
+reception with <tt class="docutils literal"><span class="pre">t_rx</span></tt>. The reception timestamp is stored in the metadata
+structure of the <tt class="docutils literal"><span class="pre">message_t</span></tt> <a class="footnote-reference" href="#id16" id="id8" name="id8">[5]</a>.</li>
+<li>When the event time is queried via the <tt class="docutils literal"><span class="pre">TimeSyncPacket</span></tt> interface, the
+<tt class="docutils literal"><span class="pre">eventTime</span></tt> command returns the sum of the value stored in the designated
+timestamp field in packet payload and the reception timestamp, i.e. <tt class="docutils literal"><span class="pre">e_t-</span>
+<span class="pre">e_tx+e_rx</span></tt>. This value corresponds to the time of the event in the receiver's
+local clock.</li>
+<li>The <tt class="docutils literal"><span class="pre">TimeSyncPacket.isValid</span></tt> command returns <tt class="docutils literal"><span class="pre">FALSE</span></tt> if the time
+value stored in the payload equals <tt class="docutils literal"><span class="pre">0x80000000</span></tt> or if the communications
+stack failed to timestamp the reception of the packet. Otherwise <tt class="docutils literal"><span class="pre">TRUE</span></tt> is
+returned, which indicates that the value returned by
+<tt class="docutils literal"><span class="pre">TimeSyncPacket.eventTime</span></tt> can be trusted.</li>
+</ul>
+</blockquote>
+</div>
+<div class="section">
+<h2><a id="approach-2" name="approach-2">4.1 Approach #2</a></h2>
+<p>If a particular platform does not support changing the packet contents after the
+synchronization event (start of transmission, SFD interrupt, etc.) had occured,
+it is still possible to provide packet-level time synchronization functionality
+at the cost of some communication overhead. Such an approach can rely on packet
+timestamping TEP <a class="footnote-reference" href="#id15" id="id9" name="id9">[4]</a> to implement packet-level time synchronization.</p>
+<p>Transmitter's story</p>
+<blockquote>
+<ul class="simple">
+<li>When the communications stack services a <tt class="docutils literal"><span class="pre">TimeSyncAMSend.send</span></tt> command
+called with event timestamp <tt class="docutils literal"><span class="pre">t_e</span></tt>, it stores <tt class="docutils literal"><span class="pre">t_e</span></tt> (e.g. in a map with the
+pointer of the message_t as key) and sends the packet.</li>
+<li>Transmission of the packet is timestamped using the packet timestamping TEP
+<a class="footnote-reference" href="#id15" id="id10" name="id10">[4]</a> mechanism. Let us denote this transmission timestamp with <tt class="docutils literal"><span class="pre">t_tx</span></tt>. The
+difference of event timestamp <tt class="docutils literal"><span class="pre">t_e</span></tt> and transmit timestamp <tt class="docutils literal"><span class="pre">t_tx</span></tt> is sent
+in an auxilliary packet. That is, the information the auxulary packet contains
+is the age of the event at the time when the initial packet was transmitted.</li>
+</ul>
+</blockquote>
+<p>Receiver's story</p>
+<blockquote>
+<ul class="simple">
+<li>The packet is timestamped with the receiver node's local clock at reception
+(e.g. with the timestamp of the SFD interrupt). Let us denote the time of
+reception with <tt class="docutils literal"><span class="pre">t_rx</span></tt>. The reception timestamp is stored in the metadata
+structure of the <tt class="docutils literal"><span class="pre">message_t</span></tt> <a class="footnote-reference" href="#id16" id="id11" name="id11">[5]</a>.</li>
+<li>When the auxilliary packet arrives, the time value it carries (<tt class="docutils literal"><span class="pre">t_e-t_tx</span></tt>,
+the age of the event) is stored in a metadata field of the main packet. The
+auxilliary packet is discarded, and the receive event is signalled with the
+pointer to the main packet.</li>
+<li>When the event time is queried via the <tt class="docutils literal"><span class="pre">TimeSyncPacket</span></tt> interface, the
+<tt class="docutils literal"><span class="pre">eventTime</span></tt> command returns the sum of the value stored in the metadata (age
+of the event) and the reception timestamp, i.e. <tt class="docutils literal"><span class="pre">e_t-</span> <span class="pre">e_tx+e_rx</span></tt>. This value
+corresponds to the time of the event in the receiver's local clock.</li>
+<li>The <tt class="docutils literal"><span class="pre">TimeSyncPacket.isValid</span></tt> command returns <tt class="docutils literal"><span class="pre">FALSE</span></tt> if the communications
+stack failed to timestamp the reception of the packet. Otherwise <tt class="docutils literal"><span class="pre">TRUE</span></tt> is
+returned, which indicates that the value returned by
+<tt class="docutils literal"><span class="pre">TimeSyncPacket.eventTime</span></tt> can be trusted.</li>
+</ul>
+</blockquote>
+</div>
+<div class="section">
+<h2><a id="reference-implementation" name="reference-implementation">5. Reference implementation</a></h2>
+<p>A reference implementation of the packet-level time synchronization mechanism
+described in this TEP can be found in <tt class="docutils literal"><span class="pre">tinyos-2.x/tos/chips/rf230</span></tt>.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">6. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Miklos Maroti</div>
+<div class="line">Janos Sallai</div>
+<div class="line">Institute for Software Integrated Systems</div>
+<div class="line">Vanderbilt University</div>
+<div class="line">2015 Terrace Place</div>
+<div class="line">Nashville, TN 37203</div>
+<div class="line">phone: +1 (615) 343-7555</div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">7. Citations</a></h1>
+<table class="docutils footnote" frame="void" id="id12" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id12">[1]</a></td><td><em>(<a class="fn-backref" href="#id2">1</a>, <a class="fn-backref" href="#id6">2</a>)</em> Kusy, B., Dutta, P., Levis, P., Maroti, M., Ledeczi, A., Culler, D., Elapsed Time on Arrival: A simple and versatile primitive for canonical time synchronization services. International Journal of Ad hoc and Ubiquitous Computing, Vol, 2, No. 1, 2006.</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id13" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id13">[2]</a></td><td><em>(<a class="fn-backref" href="#id3">1</a>, <a class="fn-backref" href="#id4">2</a>)</em> TEP 116: Packet protocols</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id14" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id14">[3]</a></td><td>TEP 102: Timers</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id15" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id15">[4]</a></td><td><em>(<a class="fn-backref" href="#id7">1</a>, <a class="fn-backref" href="#id9">2</a>, <a class="fn-backref" href="#id10">3</a>)</em> TEP TBA: Packet timestamping</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id16" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id16">[5]</a></td><td><em>(<a class="fn-backref" href="#id5">1</a>, <a class="fn-backref" href="#id8">2</a>, <a class="fn-backref" href="#id11">3</a>)</em> TEP 111: message_t</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id17" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="id17">[6]</a></td><td>Maroti, M., Kusy, B., Simon, G., and Ledeczi, A. 2004. The flooding time synchronization protocol. In Proceedings of the 2nd international Conference on Embedded Networked Sensor Systems (Baltimore, MD, USA, November 03 - 05, 2004). ACM SenSys '04.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<body>
+<div class="document" id="the-tosthreads-thread-library">
+<h1 class="title">The TOSThreads Thread Library</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">134</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Kevin Klues, Chieh-Jan Liang, Jeongyeup Paek, Razvan Musaloiu-E, Ramesh Govindan, Andreas Terzis, Philip Levis</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">13-May-2008</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.1</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2008-06-12</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This memo documents the TOSThreads thread library for TinyOS</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>TOSThreads is an attempt to combine the ease of a threaded programming model
+with the efficiency of a fully event-based OS. Unlike earlier threads packages
+designed for TinyOS, TOSThreads supports fully-preemptive application level
+threads, does not require explicit continuation management, and neither
+violates TinyOS's concurrency model nor limits its concurrency.  Additionally,
+adding support for TOSThreads requires minimal changes to the existing TinyOS
+code base, and bringing up a new platform to support the use of TOSThreads
+is a fairly easy process.</p>
+<p>In TOSThreads, TinyOS runs inside a single high priority kernel thread, while all
+application logic is implemented using user-level threads, which execute
+whenever the TinyOS core becomes idle. This approach is a natural extension
+to the existing TinyOS concurrency model, adding support for long-running
+computations while preserving the timing-sensitive nature of TinyOS itself.</p>
+<p>In this model, application threads access underlying TinyOS services using a
+kernel API of blocking system calls. The kernel API defines the set of TinyOS
+services provided to applications (e.g. time-sync <a class="citation-reference" href="#tep133" id="id1" name="id1">[TEP133]</a>, collection <a class="citation-reference" href="#tep119" id="id2" name="id2">[TEP119]</a>,
+and dissemination <a class="citation-reference" href="#tep118" id="id3" name="id3">[TEP118]</a>). Each system call in the API is comprised
+of a thin blocking wrapper built on top of one of these services.  TOSThreads
+allows systems developers to re-define the kernel API by appropriately
+selecting (or implementing their own) custom set of blocking system call wrappers.</p>
+<p>The following section describes the details of how TOSThreads interacts with
+TinyOS to provide each of the features described above.</p>
+</div>
+<div class="section">
+<h1><a id="basic-architecture" name="basic-architecture">2. Basic Architecture</a></h1>
+<p>The existing TinyOS concurrency model has two execution contexts: synchronous
+(tasks) and asynchronous (interrupts). These two contexts follow a strict
+priority scheme: asynchronous code can preempt synchronous code but not
+vice-versa. TOSThreads extends this concurrency model to provide a third execution
+context in the form of user-level application threads. Application threads run
+at the lowest priority, with the ability to only preempt one another.  They are
+preemptable at any time by either synchronous code or asynchronous code, and
+synchronize amongst each other using standard synchronization primitives
+such as mutexes, semaphores, barriers, condition variables, and blocking
+reference counters (a custom mechanism we have developed ourselves).  Take a look
+in <tt class="docutils literal"><span class="pre">tos/lib/tosthreads/interfaces</span></tt> to see the interfaces providing these
+primitives.</p>
+<p>The basic TOSThreads architecture, consists of five key elements: the TinyOS
+task scheduler, a single kernel-level TinyOS thread, a thread scheduler, a
+set of user-level application threads, and a set of system call APIs and their
+corresponding implementations. Any number of application threads can
+concurrently exist (barring memory constraints), while a single kernel thread
+runs the TinyOS task scheduler. The thread scheduler manages concurrency
+between application threads, while a set of system calls provides them
+access to the TinyOS kernel.</p>
+<p>In order to preserve the timing-sensitive operation of TinyOS, the kernel
+thread has higher priority than application threads. This <em>TinyOS thread</em>
+therefore always takes precedence over application threads as long as the TinyOS
+task queue is non-empty. Once the TinyOS task queue empties, control passes to
+the thread scheduler and application threads can run. The processer goes to
+sleep only when either all application threads have run to completion, or when
+all threads are waiting on synchronization primitives or blocked on I/O
+operations.</p>
+<p>There are two ways in which posted events can cause the TinyOS thread to wake
+up. First, an application thread can issue a blocking system call into the
+TinyOS kernel. This call internally posts a task, implicitly waking up the
+TinyOS thread to process it. Second, an interrupt handler can post a task for
+deferred computation. Since interrupt handlers have higher priority than the
+TinyOS thread, the TinyOS thread will not wake up to process the task until
+after the interrupt handler has completed. Because interrupts can arrive at
+anytime, it is important to note that waking up the TinyOS thread may require
+a context switch with an interrupted application thread. Control eventually
+returns to the application thread after the TinyOS thread has emptied the
+task queue.</p>
+</div>
+<div class="section">
+<h1><a id="modifications-to-the-standard-tinyos-code-base" name="modifications-to-the-standard-tinyos-code-base">3. Modifications to the Standard TinyOS Code Base</a></h1>
+<p>Only two changes to the existing TinyOS code base are required to support
+TOSThreads: a modification to the boot sequence and the addition of a post-amble
+for every interrupt handler.  Changes to the boot sequence only need to be made
+once and are independent of any platforms supported by TinyOS. Changes to the
+interrupt handlers MUST be handled on a microcontroller to microntroller basis.
+Additionally, a custom <tt class="docutils literal"><span class="pre">chip_thread.h</span></tt> file MUST be created for each
+microcontroller and place in its top level directory, e.g. <tt class="docutils literal"><span class="pre">tos/chips/msp430</span></tt></p>
+<div class="section">
+<h2><a id="changes-to-the-boot-sequence" name="changes-to-the-boot-sequence">3.1 Changes to the Boot Sequence</a></h2>
+<p>Instead of directly running the TinyOS boot sequence inside of main() as
+done previously, main() now calls out to a Boot.booted() event
+associated with booting up the thread scheduler.:</p>
+<pre class="literal-block">
+event void ThreadSchedulerBoot.booted() {
+  //Thread sceduler specific init stuff
+  ...
+  ...
+
+  //Encapsulate TinyOS inside a thread
+  tos_thread = call ThreadInfo.get[TOSTHREAD_TOS_THREAD_ID]();
+  tos_thread-&gt;id = TOSTHREAD_TOS_THREAD_ID;
+
+  //Set the TinyOS thread as the current thread and activate it
+  current_thread = tos_thread;
+  current_thread-&gt;state = TOSTHREAD_STATE_ACTIVE;
+
+  //Signal the boot sequence
+  signal TinyOSBoot.booted();
+}
+</pre>
+<p>This change is made in order to encapsulate TinyOS inside the single
+kernel-level thread and set it as the initial thread that starts running.
+Once this is done, the normal TinyOS boot sequence is ran by signaling the
+TinyOSBoot.booted() event.</p>
+<p>At the bottom of the existing TinyOS boot sequence, we enter an infinite
+loop that continuously checks the TinyOS task scheduler to see if it
+has any tasks to run.  If it does, it runs the next task in its queue.
+If it does not, it puts the microcontroller into its lowest possible power
+state and goes to sleep <a class="citation-reference" href="#tep112" id="id4" name="id4">[TEP112]</a>.:</p>
+<pre class="literal-block">
+command void Scheduler.taskLoop() {
+  for (;;) {
+    uint8_t nextTask;
+
+    atomic {
+      while ((nextTask = popTask()) == NO_TASK)
+        call McuSleep.sleep();
+    }
+    signal TaskBasic.runTask[nextTask]();
+  }
+}
+</pre>
+<p>By adding threads as a lowest priority execution context, we need to change
+these semantics slightly.  Instead of going directly to sleep, we want to
+allow the thread scheduler to take control of the microcontroller and start
+scheduling any threads it has to run.  Only once all application threads
+have run to completion, or when all threads are waiting on synchronization
+primitives or blocked on I/O operations is the microcontroller put to sleep.</p>
+<p>We achieve such functionality by replacing the call to McuSleep.sleep() shown
+above, by a call that signals the thread scheduler to suspend the currently
+running thread (the TinyOS kernel thread).:</p>
+<pre class="literal-block">
+command void TaskScheduler.taskLoop() {
+  for (;;) {
+    uint8_t nextTask;
+
+    atomic {
+      while((nextTask = popTask()) == NO_TASK)
+        call ThreadScheduler.suspendCurrentThread();
+    }
+    signal TaskBasic.runTask[nextTask]();
+  }
+}
+</pre>
+<p>Once the TinyOS thread has been suspended, the thread scheduler is free to
+begin scheduling application level threads however it sees fit.</p>
+</div>
+<div class="section">
+<h2><a id="interrupt-handler-post-ambles" name="interrupt-handler-post-ambles">3.2 Interrupt Handler Post-Ambles</a></h2>
+<p>With the changes described above, the only other <em>non-self-contained</em>
+TinyOS code necessary to support TOSThreads is the addition of a post-amble
+at the bottom of every interrupt handler.  Since the number and type
+of interrupt handlers, as well as the semantics required for implementing
+them, differ from platform to platform, the way in which this post-amble is
+is added is highly dependent on the microcontroller in use.  The post-amble
+itself, however, is completely platform-independent, and is provided via a
+<tt class="docutils literal"><span class="pre">postAmble()</span></tt> command included in the <tt class="docutils literal"><span class="pre">PlatformInterrupt</span></tt> interface.:</p>
+<pre class="literal-block">
+command void PlatformInterrupt.postAmble() {
+  atomic {
+  if(call ThreadScheduler.wakeupThread(TOSTHREAD_TOS_THREAD_ID) == SUCCESS)
+    if(call ThreadScheduler.currentThreadId() != TOSTHREAD_TOS_THREAD_ID)
+      call ThreadScheduler.interruptCurrentThread();
+  }
+}
+</pre>
+<p>As described in the following section, the call to <tt class="docutils literal"><span class="pre">wakeupThread()</span></tt> returns
+SUCCESS iff the TinyOS task queue has any tasks to process (i.e. the interrupt
+handler posted some tasks), otherwise it returns FAIL.  Upon FAIL, we simply
+return from this function, and continue execution from the point at which the
+currently running thread was interrupted.  Upon SUCCESS, we preempt the current
+thread, immediately scheduling the TinyOS thread for execution.  The check to
+make sure that the current thread isn't already the TinyOS thread is simply an
+optimization used to bypass ''rescheduling'' the already running thread.</p>
+<p>This <tt class="docutils literal"><span class="pre">postAmble()</span></tt> command MUST be called at the bottom of EVERY interrupt
+handler provided by a platform.  This interface is provided by the
+<tt class="docutils literal"><span class="pre">PlatformInterruptC</span></tt> component, and MUST be wired into every component which
+implements an interrupt handler.  Calls to <tt class="docutils literal"><span class="pre">postAmble()</span></tt> MUST then be made
+just before any return points in the given interrupt handler.</p>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">Attempts were made to try and simplify / automate the inclusion of the
+post amble through the use of MACROS and other means. It was determined in
+the end, however, that this was the simplest and most readable way
+to keep the implementation of the post-amble platform independent, while
+allowing it to be included on a platform by platform basis for differing
+interrrupt handler implementations.</p>
+</div>
+<p>As an example, consider the case of the interrupt handlers for the
+TIMERA0_VECTOR and ADC_VECTOR on the msp430 microcontroller:</p>
+<pre class="literal-block">
+TOSH_SIGNAL(TIMERA0_VECTOR) {
+  //Body of interrupt handler
+  ...
+  ...
+
+  call PlatformInterrupt.postAmble();
+}
+
+TOSH_SIGNAL(ADC_VECTOR) {
+  //Body of interrupt handler
+  ...
+  ...
+
+  call PlatformInterrupt.postAmble();
+}
+</pre>
+<p>The component in which each of these handlers is defined MUST wire in
+the <tt class="docutils literal"><span class="pre">PlatformInterrupt</span></tt> interface provided by <tt class="docutils literal"><span class="pre">PlatformInterruptC</span></tt>
+and call <tt class="docutils literal"><span class="pre">postAmble()</span></tt> at the bottom of their interrupt handlers.</p>
+</div>
+<div class="section">
+<h2><a id="the-chip-thread-h-file" name="the-chip-thread-h-file">3.3 The <tt class="docutils literal"><span class="pre">chip_thread.h</span></tt> file</a></h2>
+<p>A <tt class="docutils literal"><span class="pre">chip_thread.h</span></tt> MUST be created in the chips directory for each
+microcontroller supporting the TOSThreads library.  This file MUST contain
+definitions of the following:</p>
+<p>(1) A structure containing space for saving any microcontroller specific
+registers needed to save state when doing a context switch.:</p>
+<pre class="literal-block">
+typedef struct thread_regs {
+  ...
+} thread_regs_t;
+</pre>
+<p>(2) A typedef of a <tt class="docutils literal"><span class="pre">stack_ptr_t</span></tt> type.  For example, the msp430 microconroller
+has 16 bit memory addresses, so <tt class="docutils literal"><span class="pre">stack_prt_t</span></tt> is typedefed as follows.:</p>
+<pre class="literal-block">
+typedef uint16_t* stack_ptr_t;
+</pre>
+<p>(3) Definitions of the following MACROS for use by the TOSThreads thread
+scheduler.:</p>
+<pre class="literal-block">
+PREPARE_THREAD(thread, start_function)
+SWITCH_CONTEXTS(current_thread, next_thread)
+RESTORE_TCB(next_thread)
+STACK_TOP(stack, size)
+</pre>
+<p>As explained in Section 4.2, state manipulated by these MACROS is
+carried around by a thread as part of its <em>Thread Control Block (TCB)</em>, defined
+as type 'thread_t'.</p>
+<p><tt class="docutils literal"><span class="pre">PREPARE_THREAD()</span></tt> takes two parameters: 'thread' and 'start_function'.  The
+'thread' parameter MUST be of type <tt class="docutils literal"><span class="pre">thread_t</span></tt>, and 'start_function' MUST be of
+type <tt class="docutils literal"><span class="pre">void</span> <span class="pre">(*start_function)(void)</span></tt>.  The purpose of <tt class="docutils literal"><span class="pre">PREPARE_THREAD()</span></tt> is
+to get a thread ready for the first time it starts to execute.  Primarily, it is
+used to set the top of the stack associated with 'thread' to its
+'start_function'.  When it comes time for the thread to begin executing, the
+address pointed to by 'start_function' will be popped off and it will start executing.</p>
+<p>As an example, consider the definition of <tt class="docutils literal"><span class="pre">PREPARE_THREAD()</span></tt> for the msp430
+microcontroller:</p>
+<pre class="literal-block">
+#define PREPARE_THREAD(t, thread_ptr)         \
+  *((t)-&gt;stack_ptr) = (uint16_t)(&amp;(thread_ptr));      \
+  SAVE_STATUS(t)
+</pre>
+<p>In this case, the status register is also saved with its initial setup, but this
+may not be necessary for all microcontrollers.</p>
+<p><tt class="docutils literal"><span class="pre">SWITCH_CONTEXTS()</span></tt> takes two parameters: current_thread and next_thread. Both
+parameters MUST be of type 'thread_t'.The purpose of <tt class="docutils literal"><span class="pre">SWITCH_CONTEXTS()</span></tt> is to
+store the state of the thread associated with the 'current_thread', and swap it
+out with the state of the 'next_thread'.  The amount and type of state saved,
+and how it is actually swapped out varies from microcontroller to microcontroller.</p>
+<p><tt class="docutils literal"><span class="pre">RESTORE_TCB()</span></tt> takes just one parameter: next_thread.  This parameter MUST be
+of type 'thread_t'. <tt class="docutils literal"><span class="pre">RESTORE_TCB()</span></tt> is similar to <tt class="docutils literal"><span class="pre">SWITCH_CONTEXTS()</span></tt> except
+that no state is stored about the current thread before swapping in the state
+associated with 'next_thread'.  This MACRO is primarily called at the time a
+thread is either killed or has run to completion.</p>
+<p><tt class="docutils literal"><span class="pre">STACK_TOP()</span></tt> takes two parameters: 'stack' and 'size'.  The 'stack' parameter
+MUST be of type <tt class="docutils literal"><span class="pre">stack_ptr_t</span></tt> and 'size' MUST be an integer type (i.e.
+uint8_t, uint16_t, etc).  As explained in Section 4.2, whenever a thread is
+created, it is allocated its own stack space with a given size.  As a thread
+executes, local variables, register values, and the return address of procedure
+calls are pushed onto this stack. Depending on the microcontroller in use, the
+<em>top</em> of a thread's stack might exist at either the highest address (stack grows
+down) or lowest address (stack grows up) of the data structure allocated to the
+stack.  The purpose of <tt class="docutils literal"><span class="pre">STACK_TOP()</span></tt> is to return a pointer of type
+<tt class="docutils literal"><span class="pre">uint8_t*</span></tt> to the location of the <em>top</em> of the stack.  <tt class="docutils literal"><span class="pre">STACK_TOP()</span></tt> is only
+called once at the time a thread is first initialized.</p>
+<p>There are only two choices for the definition of this MACRO, and both are shown
+below.:</p>
+<pre class="literal-block">
+//Stack grows down (i.e. need to return pointer to bottom of structure (highest address))
+#define STACK_TOP(stack, size)    \
+  (&amp;(((uint8_t*)stack)[size - sizeof(stack_ptr_t)]))
+</pre>
+<pre class="literal-block">
+//Stack grows up (i.e. need to return pointer to top of structure (lowest address))
+#define STACK_TOP(stack, size)    \
+  (&amp;(((uint8_t*)stack)[0]))
+</pre>
+<p>As an example, consider the msp430 and atmega128 microcontrollers. On both of
+these microcontrollers, a thread's stack grows down as it executes, so
+<tt class="docutils literal"><span class="pre">STACK_TOP()</span></tt> is defined using the first macro.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="the-tosthreads-library-implementation" name="the-tosthreads-library-implementation">4. The TOSThreads Library Implementation</a></h1>
+<p>This section describes the implementation of TOSThreads, including the
+internals of the thread scheduler, the thread and system call
+data structures, and their corresponding interfaces.</p>
+<div class="section">
+<h2><a id="the-thread-scheduler" name="the-thread-scheduler">4.1 The Thread Scheduler</a></h2>
+<p>The thread scheduler is the first component to take control of the
+microcontroller during the boot process. As mentioned previously, its job is to
+encapsulate TinyOS inside a thread and trigger the normal TinyOS boot sequence.
+Once TinyOS boots and processes all of its initial tasks, control returns to the
+thread scheduler which begins scheduling application threads. The scheduler
+keeps threads ready for processing on a ready queue, while threads blocked on
+I/O requests or waiting on a lock are kept on different queues.</p>
+<p>The default TOSThreads scheduler implements a fully preemptive round-robin
+scheduling policy with a time slice of 5 msec. We chose this value to achieve
+low latency across multiple application-level computing tasks. While application
+threads currently run with the same priority, one can easily modify the
+scheduler to support other policies.</p>
+<p>As explained in the following section, TOSThreads exposes a relatively
+standard API for creating and manipulating threads: <tt class="docutils literal"><span class="pre">create(),</span>
+<span class="pre">destroy(),</span> <span class="pre">pause()</span> <span class="pre">and</span> <span class="pre">resume()</span></tt>. These functions form part of the system
+call API, and can be invoked by any application program.</p>
+<p>Internally, TOSThreads library components use the following <tt class="docutils literal"><span class="pre">ThreadScheduler</span></tt>
+interface to interact with a thread.:</p>
+<pre class="literal-block">
+interface ThreadScheduler {
+  async command uint8_t currentThreadId();
+  async command thread_t* currentThreadInfo();
+  async command thread_t* threadInfo(thread_id_t id);
+
+  command error_t initThread(thread_id_t id);
+  command error_t startThread(thread_id_t id);
+  command error_t stopThread(thread_id_t id);
+
+  async command error_t interruptCurrentThread();
+
+  async command error_t suspendCurrentThread();
+  async command error_t wakeupThread(thread_id_t id);
+}
+</pre>
+<p>The thread scheduler itself does not exist in any particular execution context
+(i.e., it is not a thread and does not have its own stack). Instead, any
+TOSThreads library component that invokes one of the above commands executes in
+the context of the calling thread. Due to the sensitive nature of these
+commands, ONLY the interrupt handler post-ambles and blocking system call API
+wrappers invoke them directly.</p>
+<p>The first three commands are used to get information associated with an instance
+of a thread.  Calling <tt class="docutils literal"><span class="pre">currentThreadId()</span></tt> returns a unique identifier
+associated with the currently running thread.  Calling <tt class="docutils literal"><span class="pre">currentThreadInfo()</span></tt>
+or <tt class="docutils literal"><span class="pre">threadInfo()</span></tt> on a particular thread returns a pointer to the complete
+<em>Thread Control Block (TCB)</em> associated with a thread.  Details about the TCB
+structure returned by these comamnds are given in section 4.2.</p>
+<p>The rest of the commands in this interface are used to manipulate the state of a
+thread, putting it into one of 4 distinct states and starting / stopping its
+execution as necessary.  At any given time, a thread may exist in one of the
+following states (INACTIVE, ACTIVE, READY, SUSPENDED).</p>
+<p>Threads are initialized into the INACTIVE state via a call to <tt class="docutils literal"><span class="pre">initThread()</span></tt>.
+This command MUST only be called once at the time a thread is first created.  A
+call to <tt class="docutils literal"><span class="pre">initThread()</span></tt> MUST be followed by a call to <tt class="docutils literal"><span class="pre">startThread()</span></tt> at some
+point later in order to start the actual execution of the thread.  Calls to
+<tt class="docutils literal"><span class="pre">initThread()</span></tt> always return SUCCESS;</p>
+<p>Calls to <tt class="docutils literal"><span class="pre">startThread()</span></tt> return either SUCCESS or FAIL, depending on the state
+a thread is in when it is called.  If a thread is in the INACTIVE state, calling
+this command puts a thread into the READY state and places it on a ready queue.
+Threads are scheduled for execution by puling threads off this ready queue in
+FCFS order.  If a thread is in any state other than INACTIVE, FAIL is returned,
+and no other side effects occur.</p>
+<p>Calls to <tt class="docutils literal"><span class="pre">stopThread()</span></tt> only return SUCCESS if called on a thread that is in
+the READY state (and thereby implicitly on the ready queue) and currently holds
+no mutexes.  The <tt class="docutils literal"><span class="pre">mutex_count</span></tt> field in a thread's TCB is used to determine if
+any mutexes are currently held.  If both of these conditions are met, a thread
+is removed from the READY queue and its state is set to INACTIVE.  If either of
+these conditions are not met, calling <tt class="docutils literal"><span class="pre">stopThread()</span></tt> returns FAIL and no other
+side effects occur.</p>
+<p>Calls to <tt class="docutils literal"><span class="pre">interruptCurrentThread()</span></tt> are made in order to preempt a currently
+running thread. Calling <tt class="docutils literal"><span class="pre">interruptCurrentThread()</span></tt> returns SUCCESS if the
+currently running thread is in the ACTIVE state (SHOULD always be true),
+otherwise it returns FAIL.  Upon FAIL no side effects occur.  Upon SUCCESS, the
+currently running thread is put into the READY state and placed on the thread
+scheduler's ready queue.  Threads in the READY state are not blocked, and will
+be scheduled for execution again the next time their turn comes up.  The
+<tt class="docutils literal"><span class="pre">interruptCurrentThread()</span></tt> function is currently only called in two places.
+At the bottom of the interrupt <tt class="docutils literal"><span class="pre">postAmble()</span></tt> (as shown before), and in the
+code implementing the round-robin preemption scheme.</p>
+<p>Calls to <tt class="docutils literal"><span class="pre">suspendCurrentThread()</span></tt> return SUCCESS if the currently running
+thread is in the ACTIVE state (SHOULD always be true), otherwise they return
+FAIL.  Upon SUCCESS, the currently running thread is put into the SUSPEND state
+and its execution is stopped.  A thread in the SUSPEND state will not be
+scheduled for execution again until a call to <tt class="docutils literal"><span class="pre">wakeupThread()</span></tt> is made at some
+later point in time. Calls to <tt class="docutils literal"><span class="pre">suspendCurrentThread()</span></tt> SHOULD only be made
+from within the body of blocking system call API wrappers or synchronization
+primitives.</p>
+<p>Calls to <tt class="docutils literal"><span class="pre">wakeupThread()</span></tt> take one parameter: 'thread_id'. <tt class="docutils literal"><span class="pre">wakeupThread()</span></tt>
+returns SUCCESS if the thread associated with 'thread_id' is successfully woken up
+and returns FAIL otherwise.  For all threads other than the TinyOS thread, SUCCESS
+will only be returned if the thread being woken up is in the SUSPEND state.  For the
+TinyOS thread, it must be both in the SUSPEND state and have tasks waiting on it
+task queue.  Upon SUCCESS, a thread is put in the READY state and placed on the ready
+queue.  Upon FAIL, no side effects occur.</p>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">Most times calls to <cite>suspendCurrentThread()`</cite> are paired with placing the
+suspended thread on a queue.  Calls to <tt class="docutils literal"><span class="pre">wakeupThread()</span></tt> are then paired with
+removing a thread from that queue.  The queue used is matianed externally by
+the component issuing the suspend and wakeup.  For example, every mutex
+variable has its own queue associated with it. Everytime a thread calls the
+<tt class="docutils literal"><span class="pre">lock()</span></tt> function associated with a mutex, it is placed onto the queue
+associated with that mutex if someone already holds the lock.  When the owner
+of the lock eventually calls <tt class="docutils literal"><span class="pre">unlock()</span></tt> this queue is then checked and
+requesters are removed from the queue in FCFS order.</p>
+</div>
+</div>
+<div class="section">
+<h2><a id="threads" name="threads">4.2 Threads</a></h2>
+<p>Section 4 discusses the API provided to an application that allows it to create
+and destroy theads, as well as invoke blocking system calls.  This section
+details the internals of the thread implementation itself, focusing on the data
+structure used to actually represent threads.</p>
+<p>Regardless of the API used to create a thread (either <em>statically</em> or
+<em>dynamically</em> as discussed in the following section), TOSThreads allocates a
+Thread Control Block (TCB) and stack memory for each thread at the time it is
+created.  Each thread has a fixed stack size that does not grow over time.  The
+code snippet below shows the structure of a TOSThreads TCB.:</p>
+<pre class="literal-block">
+struct thread {
+  thread_id_t thread_id;
+  init_block_t* init_block;
+  struct thread* next_thread;
+
+  //thread_state
+  uint8_t state;
+  uint8_t mutex_count;
+  thread_regs_t regs;
+
+  //start_function
+  void (*start_ptr)(void*);
+  void* start_arg_ptr;
+
+  stack_ptr_t stack_ptr;
+  syscall_t* syscall;
+};
+</pre>
+<p><strong>thread_id</strong>: This field stores a thread's unique identifier.
+It is used primarily by system call implementations and synchronization
+primitives to identify the thread that should be blocked or woken up.</p>
+<p><strong>init_block</strong>: Applications implemented using the TOSThreds library have the
+ability to be dynamically loaded onto a mote at runtime.  It is beyond the scope
+of this TEP to go into the details of this process, but applications use this
+field whenever they are dynamically loaded onto a mote. Whenever the system
+dynamically loads a TOSThreads application, the threads it creates must all
+receive the state associated with its global variables. An initialization block
+structure stores these global variables and 'init_block' points to this structure.</p>
+<p><strong>next_thread</strong>: TOSThreads uses thread queues to keep track of threads waiting
+to run. These queues are implemented as linked lists of threads connected
+through their next_thread' pointers. By design, a single pointer suffices:
+threads are <em>always</em> added to a queue just before they are interrupted and
+are removed form a queue just before they wake up. This approach conserves
+memory.</p>
+<p><strong>thread_state</strong> This set of fields store information about the thread's current
+state. It contains a count of the number of mutexes the thread currently holds;
+a state variable indicating the state the thread is in (INACTIVE, READY,
+SUSPENDED, or ACTIVE); and a set of variables that store a processor's register
+state whenever a context switch occurs.</p>
+<p><strong>stack_pointer</strong> This field points to the top of a thread's stack. Whenever a
+context switch is about to occur, the thread scheduler calls a
+<tt class="docutils literal"><span class="pre">switch_threads()</span></tt> function, pushing the return address onto the current
+thread's stack. This function stores the current thread's register state,
+replaces the processor's stack pointer with that of a new thread, and finally
+restores the register state of the new thread. Once this function returns, the
+new thread resumes its execution from the point it was interrupted.</p>
+<p><strong>start_function</strong> This field points to a thread's start function along with a
+pointer to a single argument. The application developer must ensure that the
+structure the argument points to is not deallocated before the thread's start
+function executes. These semantics are similar to those that Unix <tt class="docutils literal"><span class="pre">pthreads</span></tt>
+define.</p>
+<p><strong>system_call_block</strong> This field contains a pointer to a structure used when
+making system calls into a TOSThreads kernel. This structure is readable by both a
+system call wrapper implementation and the TinyOS kernel thread. The section
+that follows explains how this structure is used.</p>
+</div>
+<div class="section">
+<h2><a id="blocking-system-calls" name="blocking-system-calls">4.3 Blocking System Calls</a></h2>
+<p>TOSThreads implements blocking system calls by wrapping existing TinyOS services
+inside blocking APIs. These wrappers are responsible for maintaining state
+across the non-blocking <em>split-phase</em> operations associated with the
+underlying TinyOS services. They also transfer control to the TinyOS thread
+whenever a user thread invokes a system call.  All wrappers are written in nesC
+with an additional layer of C code layered on top of them.  We refer to the
+TOSThreads <em>standard</em> C API as the API providing system calls to standard
+TinyOS services such as sending packets, sampling sensors, and writing to flash.
+Alternative API's (potentially also written in C) can be implemented as well
+(e.g. the Tenet API).</p>
+<p>A user thread initiates a system call by calling a function in one of the
+blocking API wrappers. This function creates a local instance of a
+<em>system call block (SCB)</em> structure which contains: a unique
+'syscall_id' associated with the system call; a pointer to the
+'thread' invoking the call; a pointer to the function that TinyOS should
+call once it assumes control, and the set of parameters this function should
+receive. The SCB is used to exchange data with the TinyOS thread.:</p>
+<pre class="literal-block">
+struct syscall {
+  syscall_id_t syscall_id;
+  thread_t* thread;
+  void (*syscall_ptr)(struct syscall*);
+  void* params;
+};
+</pre>
+<p>All variables associated with a system call (i.e., the pointer to the SCB and
+the parameters passed to the system call itself) can all be allocated on the
+local stack of the calling thread at the time of the system call. This is
+possible because once the calling thread invokes a system call, it will not
+return from the function which instantiates these variables until after the
+blocking system call completes. These variables remain on the local thread's
+stack throughout the duration of the system call and can therefore be accessed
+as necessary.</p>
+<p>As discussed in Section 2, making a system call implicitly posts a TinyOS task,
+causing the TinyOS thread to immediately wake up and the calling thread to
+block. In this way, there can only be <em>one</em> outstanding system call at any given
+time. Thus, only a <em>single</em> TinyOS task is necessary to perform an
+applications' system calls. The body of this task simply invokes the function
+the 'system_call_block' points to.</p>
+<p>The important interfaces and components that implement the functionality
+described in this section can be found in <tt class="docutils literal"><span class="pre">tos/lib/tosthreads/system</span></tt> and
+<tt class="docutils literal"><span class="pre">tos/lib/tosthreads/interfaces</span></tt>.  The important ones to look at are the
+<tt class="docutils literal"><span class="pre">SystemCall</span></tt> interface, and the <tt class="docutils literal"><span class="pre">SystemCallC</span></tt> and <tt class="docutils literal"><span class="pre">SystemCallP</span></tt>
+components.  Example system call wrappers themselves include
+<tt class="docutils literal"><span class="pre">BlockingStdControlC</span></tt>, <tt class="docutils literal"><span class="pre">BlockingAMSenderC</span></tt>, etc.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="programming-applications" name="programming-applications">5. Programming Applications</a></h1>
+<p>Application written using TOSThreads can be programmed in either nesC or
+standard C.  In nesC, threads can either be created <em>statically</em> or
+<em>dynamically</em> as a TOSThreads application executes.  The primary difference
+between the two is that statically allocated threads have their TCB allocated
+for them at compile time while dynamic threads have them allocated at run time.</p>
+<div class="section">
+<h2><a id="static-threads" name="static-threads">5.1 Static Threads</a></h2>
+<p>Static threads are created by wiring in an instance of a ThreadC component as shown
+below.  As a parameter to ThreadC, we pass in the desired stack size for the thread.</p>
+<pre class="literal-block">
+configuration ExampleAppC {
+}
+implementation {
+  components MainC, ExampleC;
+  components new ThreadC(STACK_SIZE);
+
+  MainC.Boot &lt;- ExampleC;
+  ExampleC.Thread -&gt; ThreadC;
+}
+</pre>
+<p>The ThreadC component provides a <tt class="docutils literal"><span class="pre">Thread</span></tt> interface for creating and
+manipulating static threads from within a nesC module.:</p>
+<pre class="literal-block">
+ interface Thread {
+   command error_t start(void* arg);
+   command error_t stop();
+   command error_t pause();
+   command error_t resume();
+   command error_t sleep(uint32_t milli);
+   event void run(void* arg);
+}
+</pre>
+<p>Calling <tt class="docutils literal"><span class="pre">start()</span></tt> on a thread signals to the TOSThreads thread scheduler that
+that thread should begin executing.  <tt class="docutils literal"><span class="pre">start()</span></tt> takes as an argument a pointer
+to a data structure to pass to a thread once it starts executing.  Calls to
+<tt class="docutils literal"><span class="pre">start()</span></tt> return either SUCCESS or FAIL.  Upon SUCCESS, the thread is
+scheduled for execution, and at some point later the <tt class="docutils literal"><span class="pre">run()</span></tt> event is
+signaled.  The body of the run event implements the logic of the thread.</p>
+<p>Calling <tt class="docutils literal"><span class="pre">stop()</span></tt> on a thread signals to the TOSThreads thread scheduler that
+that thread should stop executing.  Once a thread is stopped it cannot be
+restarted. Calls to <tt class="docutils literal"><span class="pre">stop()</span></tt> return SUCESS if a thread was successfully
+stopped, and FAIL otherwise. <tt class="docutils literal"><span class="pre">stop()</span></tt> MUST NOT be called from within the
+thread being stopped; it MUST be called from either the TinyOS thread or another
+application thread.</p>
+<p>Calling <tt class="docutils literal"><span class="pre">pause()</span></tt> on a thread signals to the TOSThreads thread scheduler that
+that thread should be paused.  Pausing a thread is different than stopping it in
+that a <em>paused</em> thread can be restarted again later by calling <tt class="docutils literal"><span class="pre">resume()</span></tt> on
+it.  Underneath, the <tt class="docutils literal"><span class="pre">pause()</span></tt> command is implemented by calling the thread
+scheduler's <tt class="docutils literal"><span class="pre">suspendCurrentThread()</span></tt> command.  Calls to <tt class="docutils literal"><span class="pre">pause()</span></tt> return
+SUCCESS if a thread is paused, and FAIL otherwise.  Essentially, <tt class="docutils literal"><span class="pre">pause()</span></tt> is
+used to perform an explicit suspension of the currently running thread.
+<tt class="docutils literal"><span class="pre">pause()</span></tt> MUST ONLY be called from within the thread itself that is being
+paused.  Note that these are exactly the opposite semantics than those used for
+<tt class="docutils literal"><span class="pre">stop()</span></tt>.</p>
+<p>Calling <tt class="docutils literal"><span class="pre">resume()</span></tt> wakes up a thread previously suspended via the <tt class="docutils literal"><span class="pre">pause()</span></tt>
+command. SUCCESS is returned if the thread was successfully resumed, FAIL
+otherwise.</p>
+<p>Calling <tt class="docutils literal"><span class="pre">sleep()</span></tt> puts a thread to sleep for the interval specified in its
+single 'milli' parameter. <tt class="docutils literal"><span class="pre">sleep()</span></tt> MUST ONLY be called from within the thread
+itself that is being put to sleep.  SUCCESS is returned if the thread was
+successfully put to sleep, FAIL otherwise.</p>
+</div>
+<div class="section">
+<h2><a id="dynamic-threads" name="dynamic-threads">5.2 Dynamic Threads</a></h2>
+<p>Dynamic threads are created by wiring in an instance of a DynamicThreadC
+component as shown below.:</p>
+<pre class="literal-block">
+configuration ExampleAppC {
+}
+implementation {
+  components MainC, ExampleC;
+  components DynamicThreadC;
+
+  MainC.Boot &lt;- ExampleC;
+  BlinkC.DynamicThread -&gt; DynamicThreadC;
+}
+</pre>
+<p>The nesC interface for creating and manipulating dynamic threads is.:</p>
+<pre class="literal-block">
+interface DynamicThread {
+  command error_t create(tosthread_t* t, void (*start_routine)(void*),
+                         void* arg, uint16_t stack_size);
+  command error_t destroy(tosthread_t* t);
+  command error_t pause(tosthread_t* t);
+  command error_t resume(tosthread_t* t);
+}
+</pre>
+<p><tt class="docutils literal"><span class="pre">create()</span></tt> is used to create a new dynamic thread.  It takes 4 parameters:
+'t', 'start_routine', 'arg', and 'stack_size'.  't' is pointer to a unique
+handler associated with the thread being created. 'start_routine' is the start
+function associated with the thread.  'arg' is a pointer to a structure passed
+to the start function once the thread has begun executing.  'stack_size' is the
+size of the stack to be dynamicaly allocated for the thread.  Calls to
+<tt class="docutils literal"><span class="pre">create()</span></tt> return either SUCCESS, FAIL, or EALREADY.  SUCCESS indiactes that
+the thread has been successfully created, FAIL means it could not be created,
+and EALREADY indicates that the handler assocaited with the 't' parameter is
+associated with an already running thread.  Upon SUCCESS, a dynamic thread's TCB
+and stack memory are dynamically allocated, and the thread is scheduled for
+execution.  Its 'start_routine' whill be called once it begins running.  UPON
+FAIL or EALREADY, no side effects occur.</p>
+<p>''destroy()`` is similar to <tt class="docutils literal"><span class="pre">stop()</span></tt> from a static thread's <tt class="docutils literal"><span class="pre">Thread</span></tt>
+interface.  It follows all the same semantics as this command, except that it
+deallocates the TCB and stack memory associated with a thread before returning.</p>
+<p><tt class="docutils literal"><span class="pre">pause()</span></tt> and <tt class="docutils literal"><span class="pre">resume()</span></tt> are identical to their counterparts in the
+<tt class="docutils literal"><span class="pre">Thread</span></tt> interface.</p>
+<p>The API allowing TOSThreads applications to be written in standard C includes a
+set of functions that simply wrap the commands provided by the
+<tt class="docutils literal"><span class="pre">DynamicThread</span></tt> interface.  The following section shows an example of how
+these functions are used.</p>
+</div>
+<div class="section">
+<h2><a id="the-full-tosthreads-api" name="the-full-tosthreads-api">5.3 The Full TOSThreads API</a></h2>
+<p>As mentioned previously, TinyOS services are presented to TOSThreads applications
+by wrapping their functionality inside blocking system calls.  The number and type
+of standard services provided is constantly growing so it doesn't make sense to
+try and list them all out.  Browse through <tt class="docutils literal"><span class="pre">tos/lib/tosthreads/system/</span></tt> and
+<tt class="docutils literal"><span class="pre">tos/lib/tosthreads/lib</span></tt> to see what services are currently available.
+Also, take a look at the various applications found in <tt class="docutils literal"><span class="pre">apps/tosthreads</span></tt> to see
+how these services are used.  There are applications written in nesC using both
+static and dynamic threads, as well as applications written in standard C.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="author-addresses" name="author-addresses">6. Author Addresses</a></h1>
+<div class="line-block">
+<div class="line"><br /></div>
+<div class="line">Kevin Klues</div>
+<div class="line">284 Gates Hall</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305-9030</div>
+<div class="line">email - <a class="reference" href="mailto:klueska&#64;cs.stanford.edu">klueska&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Chieh-Jan Liang</div>
+<div class="line">XXX</div>
+<div class="line">XXX</div>
+<div class="line">XXX</div>
+<div class="line">email - <a class="reference" href="mailto:cliang4&#64;cs.jhu.edu">cliang4&#64;cs.jhu.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Jeongyeup Paek</div>
+<div class="line">XXX</div>
+<div class="line">XXX</div>
+<div class="line">XXX</div>
+<div class="line">email - <a class="reference" href="mailto:jpaek&#64;enl.usc.edu">jpaek&#64;enl.usc.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Razvan Musaloiu-E</div>
+<div class="line">XXX</div>
+<div class="line">XXX</div>
+<div class="line">XXX</div>
+<div class="line">email - <a class="reference" href="mailto:razvanm&#64;cs.jhu.edu">razvanm&#64;cs.jhu.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Ramesh Govindan</div>
+<div class="line">XXX</div>
+<div class="line">XXX</div>
+<div class="line">XXX</div>
+<div class="line">email - <a class="reference" href="mailto:ramesh&#64;enl.usc.edu">ramesh&#64;enl.usc.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Andreas Terzis</div>
+<div class="line">XXX</div>
+<div class="line">XXX</div>
+<div class="line">XXX</div>
+<div class="line">email - <a class="reference" href="mailto:terzis&#64;cs.jhu.edu">terzis&#64;cs.jhu.edu</a></div>
+<div class="line"><br /></div>
+<div class="line">Philip Levis</div>
+<div class="line">358 Gates Hall</div>
+<div class="line">Stanford University</div>
+<div class="line">Stanford, CA 94305-9030</div>
+<div class="line">email - <a class="reference" href="mailto:pal&#64;cs.stanford.edu">pal&#64;cs.stanford.edu</a></div>
+<div class="line"><br /></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">7. Citations</a></h1>
+<table class="docutils citation" frame="void" id="tep112" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id4" name="tep112">[TEP112]</a></td><td>TEP 112: Microcontroller Power Management.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep118" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="tep118">[TEP118]</a></td><td>TEP 118: Dissemination.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep119" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="tep119">[TEP119]</a></td><td>TEP 119: Collection.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep133" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="tep133">[TEP133]</a></td><td>TEP 133: Packet Level Time Synchronization.</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<meta name="author" content="Omprakash Gnawali" />
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+<body>
+<div class="document" id="active-message-id-allocation-in-tinyos-2-1">
+<h1 class="title">Active Message ID Allocation in TinyOS 2.1</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">135</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Network Protocol Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Informational</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.1</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Omprakash Gnawali</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">19-June-2008</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.3</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2008-06-24</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+<a class="citation-reference" href="#tep-1" id="id1" name="id1">[TEP_1]</a> and <a class="citation-reference" href="#tep-4" id="id2" name="id2">[TEP_4]</a>.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>TinyOS network protocols use allocated Active Message Type <a class="citation-reference" href="#tep-116" id="id3" name="id3">[TEP_116]</a>
+to prevent AM ID conflict between different protocols. <a class="citation-reference" href="#tep-4" id="id4" name="id4">[TEP_4]</a>
+describes how AM IDs are allocated for a TinyOS network protocol. In
+this TEP, we document the AM ID allocations in TinyOS 2.1.</p>
+</div>
+<div class="section">
+<h1><a id="unreserved-pool-128-255-0x80-0xff" name="unreserved-pool-128-255-0x80-0xff">2. Unreserved pool 128-255 (0x80 - 0xFF)</a></h1>
+<p>The unreserved pool is in the range 128-255 (0x80-0xFF). Applications
+distributed with TinyOS use AM IDs in this range. Protocols and
+applications in contrib as well as those developed by the community
+but not included in the distribution or contrib SHOULD use AM IDs in
+this range.</p>
+</div>
+<div class="section">
+<h1><a id="reserved-pool-0-127-0x00-0x7f" name="reserved-pool-0-127-0x00-0x7f">3. Reserved pool 0-127 (0x00 - 0x7F)</a></h1>
+<p>The reserved pool is in the range 0-127 (0x00-0x7F). The AM IDs in
+this range are used by protocols distributed with TinyOS.</p>
+<p>Here is a list of allocations for TinyOS 2.1:</p>
+<pre class="literal-block">
+* 0x70 - 0x75 are reserved for collection protocols [TEP_119]_
+  maintained by the Network Protocol Working Group.
+
+  For CTP (''tos/lib/net/ctp'') [TEP_123]_ and LEEP  [TEP_124]_
+  0x70 - AM_CTP_ROUTING CTP (Routing beacon)
+  0x71 - AM_CTP_DATA CTP (Data packets)
+  0x72 - AM_CTP_DEBUG CTP (Debug messages)
+
+  For MultiHopLQI (''tos/lib/net/lqi'')
+  0x73 - AM_LQI_BEACON_MSG (Routing beacon)
+  0x74 - AM_LQI_DATA_MSG MultiHopLQI (Data packets)
+  0x75 - AM_LQI_DEBUG MultiHopLQI (Debug messages)
+
+* 0x60 - 0x62 are reserved for dissemination protocols [TEP_118]_
+  maintained by the Network Protocol Working Group.
+
+  For Drip (''tos/lib/net/drip'')
+  0x60 - AM_DISSEMINATION_MESSAGE
+  0x61 - AM_DISSEMINATION_PROBE_MESSAGE
+
+  For DIP (''tos/lib/net/dip'')
+  0x62 - AM_DIP
+
+* 0x50 - 0x54 are reserved for Deluge (''tos/lib/net/Deluge'')
+  maintained by the Network Protocol Working Group.
+
+  0x50 - AM_DELUGEADVMSG (Advertisements)
+  0x51 - AM_DELUGEREQMSG (Requests)
+  0x52 - AM_DELUGEDATAMSG (Data)
+  0x53 - DELUGE_AM_FLASH_VOL_MANAGER (Flash volume manager)
+  0x54 - DELUGE_AM_DELUGE_MANAGER (Deluge manger)
+
+* 0x3E - AM_TIMESYNCMSG for FTSP (''tos/lib/ftsp'') reserved by the
+  Core Working Group.
+
+* 0x3F - TinyOS NALP code [TEP_125]_ reserved by the Core Working
+  Group.
+</pre>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">4. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Omprakash Gnawali</div>
+<div class="line">Ronald Tutor Hall (RTH) 418</div>
+<div class="line">3710 S. McClintock Avenue</div>
+<div class="line">Los Angeles, CA 90089</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 213 821-5627</div>
+<div class="line">email - <a class="reference" href="mailto:gnawali&#64;usc.edu">gnawali&#64;usc.edu</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">5. Citations</a></h1>
+<table class="docutils citation" frame="void" id="tep-1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="tep-1">[TEP_1]</a></td><td>TEP 1: TEP Structure and Keywords</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep-4" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep-4">[TEP_4]</a></td><td><em>(<a class="fn-backref" href="#id2">1</a>, <a class="fn-backref" href="#id4">2</a>)</em> TEP 4: Active Message ID Allocation for Network Protocols and Applications</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep-116" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="tep-116">[TEP_116]</a></td><td>TEP 116: Packet Protocols</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep-118" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep-118">[TEP_118]</a></td><td>TEP 118: Dissemination of Small Values</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep-119" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep-119">[TEP_119]</a></td><td>TEP 119: Collection</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep-123" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep-123">[TEP_123]</a></td><td>TEP 123: The Collection Tree Protocol (CTP)</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep-124" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep-124">[TEP_124]</a></td><td>TEP 124: The Link Estimation Exchange Protocol (LEEP)</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep-125" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep-125">[TEP_125]</a></td><td>TEP 125: TinyOS 802.15.4 Frames</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<div class="document" id="roadmap-to-an-ip-stack-in-tinyos">
+<h1 class="title">Roadmap to an IP Stack in TinyOS</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">136</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Network Protocol Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Informational</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">&gt; 2.1</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Stephen Dawson-Haggerty, Matus Harvan, and Omprakash Gnawali</td></tr>
+</tbody>
+</table>
+<div class="section" id="abstract">
+<h1>Abstract</h1>
+<p>Recently, there has been renewed interest in the applicability of Internet
+Protocol-based networking for low power, embedded devices.  This interest is
+being driven by several sources.  One, emerging standards from the IETF are
+beginning to make it possible to design efficient, compatible
+implementations of IP for this class of resource-constrained device.  Two,
+there has been an emergence of a significant number of both open and closed IP
+embedded IP stacks which demonstrate the applicability of this model of
+networking.  Third, a set of recent academic papers have made the case that
+this network architecture is a significant research enabler and shown in more
+detail the structure of a full stack.</p>
+<p>In this TEP, we briefly explain how IP mechanisms map onto the well-studied
+problems of the sensor network community like collection routing and local
+aggregation.  Next, we discuss the current &quot;state of the standards.&quot;  Finally,
+we propose a path for the adoption of IP within TinyOS.</p>
+</div>
+<div class="section" id="ip-requirements-and-mechanisms">
+<h1>1. IP Requirements and Mechanisms</h1>
+<p>There are two versions of IP: IPv4 (RFCXXX) and IPv6 (RFCXXX).  Previous
+studies have indicated that IPv6 is more applicable to the low-power, embedded
+space then IPv4 for various reasons; most standardization efforts have focused
+on adapting IPv6 to these devices.  Therefore, we consider only IPv6.</p>
+<div class="section" id="ipv6-routing">
+<h2>1.1 IPv6 Routing</h2>
+<p>A central question for implementing IPv6 in sensor networks is what has become
+know as &quot;route over&quot; vs. &quot;mesh under&quot; in the IETF.  In mesh under networking,
+routing is done on layer two addresses, and every host is one hop from every
+other.  Although this is the most compatible with existing assumptions about
+subnet design, it leads to significant redundancies and inefficiencies in this
+space.  The alternative, so called route-over exposes the radio topology at
+the IP layer.  While not strictly compatible with some IPv6 mechanisms, this
+is becomming the favored approach since a single set of tools can be used to
+debug.  For the rest of this TEP we assume that route over is the model.</p>
+<p>There are a number of existing routing protocols for IPv6, some targeted at
+wireless links.  However, IPv6 itself does not require any particular routing
+protocol to be used with a domain; common choices in wired networks are OSPF
+and IS-IS.  Recent study in the IETF has indicated that existing protocols are
+probably not appropriate for this space [draft-ietf-roll-protocols-02], and so
+further work is needed on this point.  Existing protocols with TinyOS
+implementations such as DYMO or S4 may be appropriate for this task;
+collection and dissemination protocols like CTP or Drip are probably not
+directly applicable since they are address-free, although the insight gained
+from their implementations may be transferable.</p>
+</div>
+<div class="section" id="addressing">
+<h2>1.2 Addressing</h2>
+<p>The most well-known property of IPv6 is probably it's address length.  An IPv6
+address is 128 bits long.  Within this space, IPv6 defines unicast, anycast,
+and multicast address ranges; each of these ranges further have properties of
+their own.  For a full explaination of IPv6 addressing we refer the reader to,
+for example, [OReilly, RFC], we cover briefly some of the important details.</p>
+<div class="section" id="unicast-addressing">
+<h3>1.2.1 Unicast Addressing</h3>
+<p>Unicast addresses in IPv6 consist of two parts: the network identifier (the
+first 64 bits), and the interface identifier (the second).  The interface
+identifier is a flat space, and may be derived from the interface's MAC
+address, a random number, or other mechanism.  IPv6 contains mechanisms to
+ensure that the interface ID is unique within the subnet.  The network
+may be assigned using many different mechanisms, but some network identifiers
+are special.</p>
+<p>Unlike IPv4, each interface in IPv6 is multihomed: it is expected to have
+multiple IPv6 addresses.  When an interface is brought up, IPv6 contains
+mechanisms to configure the interface with a locally unique, non-routable
+address known as the link-local address.  This address has the network
+identifier fe80::, and can be used for communication between hosts in the same
+subnet.</p>
+<p>In a TinyOS IPv6 stack, this address range might be used to allow TinyOS nodes
+to communicate locally without routing, for instance to enable local
+aggregation.  If the TinyOS hosts can assign themselves link-local addresses
+derived from their IEEE802.15.4 16-bit short id, or full 64-bit EUID.  For
+instance, a node with short ID 16 might assign the address fe80::10 to its
+802.15.4 interface.  These addresses would not be routed; an IP stack would
+send directly to the short id 0x10 contained in the address.</p>
+<p>IPv6 also contains several mechanisms to allow a host to obtain a
+publicly-routable network identifier.  TinyOS hosts communicating with these
+addresses could contact nodes in other sensor networks or on the internet; the
+fact that they are multihomed allows them to use both public and link-local
+addresses simultaneously.</p>
+</div>
+<div class="section" id="multicast-addressing">
+<h3>1.2.2 Multicast Addressing</h3>
+<p>IPv6 contains a multicast address range; addresses beginning with the byte
+containing all ones (0xff) are multicast addresses.  Following this byte are
+four bits of flags and four bits of &quot;scope&quot;.  For instance, scope 1 is
+node-local, and scope 2 is link local.  IPv6 defines many well-known multicast
+groups [<a class="reference external" href="http://www.iana.org/assignments/ipv6-multicast-addresses">http://www.iana.org/assignments/ipv6-multicast-addresses</a>]; of most interest here are the &quot;link-local all nodes&quot; and &quot;link
+local all-routers&quot; addresses: ff02::1 and ff02::2, respectively.  Depending on
+weather TinyOS IP hosts are also IP routers, these addresses are effecitvely
+link-local broadcast addresses which might be mapped into the layer 2
+broadcast address (0xffff).  Thus IPv6 contains mechanisms for local
+broadcast.</p>
+<p>There is also a site-local scope defined in IPv6 (5) with a similar ff05::2
+address.  &quot;Site local&quot; is an administratively defined scope in IPv6, and might
+naturally consist of an entire sensor network.  Thus, sending to this address
+would correspond to disseminating a value to each node in the network and
+could be implemented with a trickle-based algorithm.</p>
+<p>Futhermore, the TinyOS community could develop additional conventions to
+provide and address for scoped flooding or delivery to nodes with particular
+capabilities.  A full IP multicast implementation within the sensor network
+could be used for many things including control applications or
+publish-subscribe network layers which have previously been special purpose.</p>
+</div>
+<div class="section" id="anycast-addressing">
+<h3>1.2.3 Anycast Addressing</h3>
+<p>Anycast addresses indicate that the packet should be delivered to at least one
+host with the anycast address.  This seems initially similar to the model for
+collection routing such as MultiHopLQI or CTP, in that a collection report is
+delivered to a single root.  However, it is more likeley that those
+&quot;collection roots&quot; in an IP-based infrastructure are not actually the final
+destination for the data; they are likely to only be intermediate routers who
+send the data on to a final destination.  Therefore, while there may be
+applications for anycast addressing, we do not believe this addressing mode to
+be appropriate in the common case.</p>
+</div>
+</div>
+<div class="section" id="ipv6-configuration-mechanisms">
+<h2>1.3 IPv6 Configuration Mechanisms</h2>
+<p>As alluded to earlier, IPv6 contains two mechanisms to allow internet hosts to
+become associated with a public network identifier.  These methods are
+stateless autoconfiguration and DHCPv6.  Stateless autoconfiguration defines
+Router Solicitations and Router Advertisements.  A host joining a network
+sends router solicitations to the link-local all-routers address (ff02::2)
+using his link-local address as the source address.  Routers respond with a
+Router Advertisement containing, among other things, a public network
+identifier which the host may use.</p>
+<p>In a TinyOS IP implementation, router solicitations and advertisements might
+be used for default route selection on the hosts, as well as neighbor
+discovery.</p>
+</div>
+<div class="section" id="extension-mechanisms">
+<h2>1.4 Extension Mechanisms</h2>
+<p>A common idiom in TinyOS is to provide &quot;stacked&quot; headers by implementing a
+series of components, all of which implement the Packet interface.  IPv6
+supports this a more flexible way with options headers.  These headers fall
+into one of two categories: hop-by-hop options headers and destination option
+headers.  These headers are chained together with small, two-octet common
+header fields which identifiy the header type of the next header, and the
+length of that options header.  This allows hosts to process a header chain
+even if they do not know how to interpret all of the options headers.</p>
+<p>These headers are commonly used for protocol options, or to piggyback data on
+outgoing packets.  For instance, a link estimator component could add an extra
+&quot;link options&quot; header to occasional outgoing packets as an options header,
+while avoiding the overhead when it is not necessary to do so.  This header
+architecture is significantly more flexible then the existing TinyOS packet
+architecture, although it does come at the slight cost of complexity.</p>
+</div>
+</div>
+<div class="section" id="the-state-of-the-standards">
+<h1>2. The State of the Standards</h1>
+<p>All of the previously defined mechanisms are well defined for IPv6 in various
+RFCs.  However, most nodes running TinyOS are significantly more
+resource-constrained then typical IPv6 hosts.  Thus, there is ongoing work on
+adapting these mechanisms to the characteristics of embedded devices.</p>
+<div class="section" id="header-compression">
+<h2>2.1 Header Compression</h2>
+<p>The first issue which must be addressed is the sheer size of the IPv6 header:
+40 octets.  Of this, 32 octets are the source and destination addresses of the
+packet.  The IETF has published RFC4944 which describes a header compression
+technique known as HC1.  However, this scheme has significant problems, most
+importantly the inability to take advantage of 16-bit short identifiers when
+available.  There have been a sequence of internet drafts proposing improved
+techinques such as HC1g, and HC.  The most recent version of these drafts is
+draft-hui-6lowpan-hc-02, and there are strong indications that the working
+group will depreciate HC1 from RFC4944 in the future.</p>
+</div>
+<div class="section" id="mtu">
+<h2>2.2 MTU</h2>
+<p>IPv6 requires a minimum link MTU of 1280 octets in RFCXXX.  Clearly, this is
+much larger then the IEEE802.15.4 link MTU of 127 octets.  RFC4944 defines
+&quot;layer 2.5&quot; fragmentation which allow packets up to this MTU to be transfered
+over small MTU links.  While there are some issues have been raised with this
+scheme, it seems likely to remain relatively unaltered.</p>
+</div>
+<div class="section" id="autoconfiguration">
+<h2>2.3 Autoconfiguration</h2>
+<p>IPv6 stateless autoconfiguration as originally defined has some problems,
+expecially once a &quot;route over&quot; network topology is established; for instance,
+Duplicate Address Detection is likely to require some changes.  A subcomittee
+of the 6lowpan working group is currently investigating these issues is is
+likely to propose adaptation mechanisms but they are currently in flux.</p>
+</div>
+<div class="section" id="routing">
+<h2>2.4 Routing</h2>
+<p>It is currently not possible to develop a standards-compliant routing layer,
+as the relevant standards do not exist.  Work in this direction is occuring in
+the Roll working group, but a full specification is likely some way off.</p>
+</div>
+</div>
+<div class="section" id="the-tinyos-way">
+<h1>3. The TinyOS Way</h1>
+<p>As the previous sections have shown, many sensor network abstractions map well
+into IPv6 mechanisms, with a significant gain in clarity of abstraction.
+However, standards are currently unavailable to specifiy exactly how this
+should be accomplished.  Therefor, our position is that TinyOS should move
+quickly to incorporate existing techinques and standards into an IPv6 stack
+where possible, while taking liberties with the standards when doing so
+improves performance or simplifies implementation.  Given that the standards
+themselves are in a state of flux, having an open implementation which
+demonstrates challenges and feasible mechaninisms is likely to be of
+significant value.</p>
+<p>The most important places where it may be necessary to move ahead of the
+standards are the routing; an IPv6 stack with no routing will not be as useful
+as one with it.  One open question is weather we choose a routing algorithm
+which functions in a completly decentralized fashion like AODV, OLSR, DYMO,
+S4, or many existing protocols or choose one which imposes more hierarchy on
+deployments.  We do note that existing standards like Zigbee and WirelessHART
+both contain multi-tier architectures with devices of differing capabilities.
+This has also been a common deployment model in many applications, but it
+limits the utility to places where this is possible.  The correct long-term
+answer is probably to support both types of routing.</p>
+</div>
+<div class="section" id="conclusion">
+<h1>4. Conclusion</h1>
+<p>This document is meant to introduce readers to the ways in which IPv6
+mechanisms can be used in a TinyOS-based sensor network deployment, and how
+they relate to previous work.  It does not address any implementation issues,
+which will be presented in a later TEP.</p>
+</div>
+<div class="section" id="authors">
+<h1>5. Authors</h1>
+<div class="line-block">
+<div class="line">Stephen Dawson-Haggerty</div>
+<div class="line">Computer Science Division</div>
+<div class="line">University of California, Berkeley</div>
+<div class="line">410 Soda Hall</div>
+<div class="line">Berkeley, CA 94701</div>
+<div class="line"><br /></div>
+<div class="line"><a class="reference external" href="mailto:stevedh&#64;eecs.berkeley.edu">stevedh&#64;eecs.berkeley.edu</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Matus Harvan</div>
+<div class="line">Information Security</div>
+<div class="line">IFW C 48.1</div>
+<div class="line">ETH Zentrum</div>
+<div class="line">Haldeneggsteig 4</div>
+<div class="line">8092 Zurich</div>
+<div class="line">Switzerland</div>
+<div class="line"><br /></div>
+<div class="line">phone - +41 44 63 26876</div>
+<div class="line">email - <a class="reference external" href="mailto:mharvan&#64;inf.ethz.ch">mharvan&#64;inf.ethz.ch</a></div>
+<div class="line"><br /></div>
+<div class="line"><br /></div>
+<div class="line">Omprakash Gnawali</div>
+<div class="line">Ronald Tutor Hall (RTH) 418</div>
+<div class="line">3710 S. McClintock Avenue</div>
+<div class="line">Los Angeles, CA 90089</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 213 821-5627</div>
+<div class="line">email - <a class="reference external" href="mailto:gnawali&#64;usc.edu">gnawali&#64;usc.edu</a></div>
+</div>
+</div>
+<div class="section" id="references">
+<h1>6. References</h1>
+</div>
+</div>
+</body>
+</html>
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+<title>Traffic Control</title>
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+<div class="document" id="traffic-control">
+<h1 class="title">Traffic Control</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">137</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Documentary</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>David Moss, Mark Hays, and Mark Siner</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">3-Sept-2009</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.0</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2009-09-30</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This memo documents a part of TinyOS for the TinyOS Community, and
+requests discussion and suggestions for improvements.  Distribution
+of this memo is unlimited. This memo is in full compliance with
+TEP 1.</p>
+</div>
+<div class="section" id="abstract">
+<h1>Abstract</h1>
+<p>This memo proposes traffic control interfaces to be provided by an optional
+traffic control layer integrated at the highest levels of communication
+stacks. These traffic control mechanisms are targeted to help improve acknowledgment
+success rate, energy efficiency, fairness, and routing reliability on
+any wireless platform. The available reference implementation is a platform
+independent radio stack layer designed to consume a very small memory footprint.</p>
+</div>
+<div class="section" id="introduction">
+<h1>1. Introduction</h1>
+<p>As the traffic rate of a wireless sensor network increases, the probability
+of collision, dropped packets, and missed acknowledgments also increases,
+even with sophisticated CSMA/CA implementations.</p>
+<p>It is important, especially in the case mesh networks, for packets to be
+delivered reliably and acknowledgments to be returned successfully on a hop-by-
+hop basis. One method to improve reliability is to reduce the rate of
+transmissions from each node within the network.</p>
+<p>Traffic Control has been in use for years in many different wired and wireless
+applications[1]_,[2]_,[3]_.  TinyOS already has traffic control
+mechanisms integrated directly into some networking libraries, such as CTP[4]_
+and Dissemination[5]_.  The use of Trickle[6]_ algorithms, also used
+within CTP and Dissemination, further reduces the rate of traffic throughout a
+network to improve delivery performance and prevent livelock. There has
+yet to be a centralized method of traffic control that throttles traffic
+generated from any component of a user's application.</p>
+<p>The traffic control interfaces proposed in this TEP are very basic, and are
+intended to support many different traffic control implementations.
+Two interfaces assist the application layer in controlling behavior:
+TrafficControl and TrafficPriority.</p>
+<p>The reference implementation presented here is integrated as a optional and
+generic radio stack layer (providing a Send and using a SubSend interface) and
+uses acknowledgments to dynamically adjust the transmit throttle. Other traffic
+control implementations could employ more sophisticated techniques to control
+throughput, but likely at the cost of a larger memory footprint.</p>
+<p>The ultimate goal is to allow developers to use mesh networking protocols and/or
+their own protocols without having to worry about implementing any kind of
+traffic control timer mechanism for each separate component.</p>
+</div>
+<div class="section" id="desired-behavior">
+<h1>2. Desired Behavior</h1>
+<p>Ideally, a traffic control layer SHOULD attempt to balance the rate of
+transmissions from a single node with the channel throughput capacity.
+This implies an adaptive control mechanism. If the channel is
+busy, nodes should add delay between packets to let other nodes transmit.
+Similarly, if the channel is not busy, a node should be allowed access to
+the channel more often to prevent inefficient channel downtime.  Traffic
+control SHOULD NOT listen to the channel for long periods of time to determine
+the appropriate access rates, because that defeats the purpose of low power
+communications layers used elsewhere.</p>
+<p>The traffic control implementation SHOULD have the option to be activated or
+deactivated on a system-wide level as well as a packet level. This allows for
+individual high or low priority packets. Traffic control SHOULD be deactivated
+by default, until the application or networking layers explicitly enable it.</p>
+<p>Finally, the traffic control mechanism SHOULD be small in code size to fit
+on the limited program memory available on most wireless platforms. There
+SHOULD NOT be additions or modifications to a packet's metadata structure
+that enables or disables traffic control on a per-packet basis;
+instead, per-packet priorities SHOULD be performed with a request/call back
+procedure. This keeps RAM requirements low and can be optimized out at compile
+time if those functions are not used.</p>
+<p>We also recommend any traffic control layer be implemented as an optional
+compile time add-on to a core radio stack or within the ActiveMessageC platform
+communication stack definition. This allows applications that do not require
+traffic control to remove its memory footprint from the system.</p>
+</div>
+<div class="section" id="trafficcontrolc-component-signature">
+<h1>3. TrafficControlC Component Signature</h1>
+<p>The signature of TrafficControlC is RECOMMENDED as follows:</p>
+<pre class="literal-block">
+configuration TrafficControlC {
+  provides {
+    interface Send;
+    interface TrafficControl;
+    interface TrafficPriority[am_id_t amId];
+  }
+
+  uses {
+    interface Send as SubSend;
+  }
+}
+</pre>
+<p>The Send interface provided on top and SubSend interface used underneath
+allow the TrafficControlC component to be integrated as a generic layer
+within any radio stack.</p>
+</div>
+<div class="section" id="trafficcontrol-interface">
+<h1>4. TrafficControl Interface</h1>
+<p>The TrafficControl interface allows the application layer to enable or
+disable traffic control from a system-wide level.  It also
+allows an application to set and get the current delay between packets.
+For most systems, we expect that the setDelay() and getDelay() commands may not be
+used often and will most likely get optimized out at compile time; however, some
+systems may care to explicitly increase or decrease the delay between packets or
+collect statistics on how the traffic control layer is performing.</p>
+<p>The TEP proposes the following TrafficControl interface:</p>
+<pre class="literal-block">
+interface TrafficControl {
+
+  command void enable(bool active);
+
+  command void setDelay(uint16_t delay);
+
+  command uint16_t getDelay();
+
+}
+</pre>
+</div>
+<div class="section" id="trafficpriority-interface">
+<h1>5. TrafficPriority Interface</h1>
+<p>The TrafficPriority interface is parameterized by active message ID.  It is a
+simple request / call back interface that allows components in the application layer to
+configure individual packets for priorities on a scale from 0 (lowest priority, default) to
+5 (highest priority, get the packet out immediately). There are several advantages
+to this call back method. Metadata does not need to be added
+to the end of every message_t. Additionally, a component that captures a requestPriority(...)
+event is not required to adjust the priority as it would if the event returned
+a value.</p>
+<p>When a packet enters the traffic control layer, and traffic control is
+enabled, the TrafficPriority interface MUST signal out the event
+requestPriority(...).  This event, with all the extra information it provides,
+allows the application layer to decide whether the packet is a high priority
+packet or not.  Calling the setPriority(uint8_t priority) command within the
+requestPriority(...) event MAY adjust the traffic control mechanisms applied
+to the current packet.  To aid in the definition of priority, two definitions
+are available in TrafficControl.h:</p>
+<pre class="literal-block">
+enum {
+  TRAFFICPRIORITY_LOWEST = 0,
+  TRAFFICPRIORITY_HIGHEST = 5,
+};
+</pre>
+<p>It is up to the traffic control implementation to define the meaning of each priority
+level. In the reference implementation, a priority of 0
+is the default low priority level that employs the full traffic control delays.
+Anything above 0 in the reference implementation is considered to be at the
+highest priority.</p>
+<p>If no areas of the application layer care to change the
+packet's priority, a default event handler will capture the requestPriority(...)
+event and do nothing. This would result in all packets being sent at a low
+priority with full traffic control mechanisms enforced.</p>
+<p>The TEP proposes the following TrafficPriority interface, to be provided as an
+interface parameterized by AM type:</p>
+<pre class="literal-block">
+interface TrafficPriority {
+
+  event void requestPriority(am_addr_t destination, message_t \*msg);
+
+  command void setPriority(uint8_t priority);
+
+}
+</pre>
+</div>
+<div class="section" id="reference-implementation">
+<h1>6. Reference Implementation</h1>
+<p>An implementation of the proposed traffic control layer can be found in the
+CCxx00 radio stack in
+tinyos-2.x-contrib/blaze/tos/chips/ccxx00_addons/trafficcontrol, with
+interfaces located in
+tinyos-2.x-contrib/blaze/tos/chips/ccxx00_single/interfaces and a dummy
+implementation located in
+tinyos-2.x-contrib/blaze/tos/chips/ccxx00_single/traffic.</p>
+<p>In this implementation, the default core radio stack (ccxx00_single) includes
+an empty stub for traffic control. Users that wish to include the
+traffic control implementation in their systems simply override the default
+stub component with the ccxx00_addons/trafficcontrol directory.</p>
+<p>The reference implementation works as follows. All nodes start with a default
+of 4 seconds between each packet. Changes are made to the time between outbound
+packets only when a unicast packet is sent with the request for acknowledgment
+flag set.  The reception of an acknowledgment is used as a basic indicator of
+channel activity.  For each acknowledgment received, the amount of time between
+packets is decreased so the next packet will get sent faster.  For each dropped
+acknowledgment, the amount of time between packets increases, causing the
+next packet to be sent later.</p>
+<p>When the transmission rate reaches a boundary (1 second per packet per node
+fastest, 10 seconds per packet per node slowest), it is reset to the default
+rate of 4 seconds per packet per node. This prevents nodes from unfairly
+capturing the channel.</p>
+<p>Testing this traffic control layer in a congested test bed setting of 16 nodes
+with multiple hidden terminals resulted in the acknowledgment success rate
+moving from 27-50% without traffic control to 90-100% with traffic control.
+The memory footprint increased by 260 bytes ROM / 16 bytes RAM with the
+inclusion of the traffic control layer.</p>
+</div>
+<div class="section" id="author-addresses">
+<h1>5. Author Addresses</h1>
+<div class="line-block">
+<div class="line">David Moss</div>
+<div class="line">Rincon Research Corporation</div>
+<div class="line">101 N. Wilmot Suite 101</div>
+<div class="line">Tucson AZ  85750</div>
+<div class="line">email: mossmoss at gmail dot com</div>
+<div class="line"><br /></div>
+<div class="line">Mark Hays</div>
+<div class="line">Rincon Research Corporation</div>
+<div class="line">101 N. Wilmot Suite 101</div>
+<div class="line">Tucson AZ  85750</div>
+<div class="line">email: mhh at rincon dot com</div>
+<div class="line"><br /></div>
+<div class="line">Mark Siner</div>
+<div class="line">Rincon Research Corporation</div>
+<div class="line">101 N. Wilmot, Suite 101</div>
+<div class="line">Tucson, AZ  85750</div>
+<div class="line">email: mks at rincon dot com</div>
+</div>
+</div>
+<div class="section" id="citations">
+<h1>6. Citations</h1>
+<table class="docutils footnote" frame="void" id="id1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label">[1]</td><td>Bret Hull, Kyle Jamieson, Hari Balakrishnan. &quot;Mitigating Congestion in Wireless Sensor Networks.&quot; In the Proceedings of the ACM Sensys Conference 2004</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label">[2]</td><td>Wan, C.-Y., Eisenman, S., and Campbell, A. &quot;CODA: Congestion Detection and Avoidance in Sensor Networks.&quot; In the Proceedings of the ACM Sensys Conference 2003</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id3" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label">[3]</td><td>Woo, A., and Culler, D. &quot;A Transmission Control Scheme for Media Access in Sensor Networks.&quot; In ACM MOBICOM 2001</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id4" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label">[4]</td><td>Rodrigo Fonseca, Omprakash Gnawali, Kyle Jamieson, Sukun Kim, Philip Levis, and Alec Woo.. &quot;TEP123: Collection Tree Protocol&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id5" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label">[5]</td><td>Philip Levis and Gilman Tolle. &quot;TEP118: Dissemination of Small Values.&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id6" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label">[6]</td><td>Philip Levis, Neil Patel, David Culler, and Scott Shenker. &quot;Trickle: A Self-Regulating Algorithm for Code Maintenance and Propagation in Wireless Sensor Networks.&quot; In Proceedings of the First USENIX/ACM Symposium on Networked Systems Design and Implementation (NSDI 2004).</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<body>
+<div class="document" id="hardware-abstraction-architecture">
+<h1 class="title">Hardware Abstraction Architecture</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">2</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Core Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Best Current Practice</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Vlado Handziski, Joseph Polastre, Jan-Hinrich Hauer,
+Cory Sharp, Adam Wolisz, David Culler, David Gay</td></tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This document specifies a Best Current Practices for the TinyOS
+Community, and requests discussion and suggestions for
+improvements.  The distribution of the memo is unlimited, provided
+that the header information and this note are preserved. Parts of
+this document are taken verbatim from the <a class="citation-reference" href="#haa2005" id="id1" name="id1">[HAA2005]</a> paper that is
+under IEEE copyright and from the <a class="citation-reference" href="#t2-tr" id="id2" name="id2">[T2_TR]</a> technical report.  This
+memo is in full compliance with <a class="citation-reference" href="#tep1" id="id3" name="id3">[TEP1]</a>.</p>
+</div>
+<div class="section">
+<h1><a id="abstract" name="abstract">Abstract</a></h1>
+<p>This TEP documents a <em>Hardware Abstraction Architecture (HAA)</em> for
+TinyOS 2.0 that balances the conflicting requirements of code
+reusability and portability on the one hand and efficiency and
+performance optimization on the other. Its three-layer design
+gradually adapts the capabilities of the underlying hardware platforms
+to the selected platform-independent hardware interface between the
+operating system core and the application code. At the same time, it
+allows the applications to utilize a platform's full capabilities --
+exported at the second layer, when the performance requirements
+outweigh the need for cross-platform compatibility.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>The introduction of hardware abstraction in operating systems has
+proved valuable for increasing portability and simplifying application
+development by hiding the hardware intricacies from the rest of the
+system. However, hardware abstractions come into conflict with the
+performance and energy-efficiency requirements of sensor network
+applications.</p>
+<p>This drives the need for a well-defined architecture of hardware
+abstractions that can strike a balance between these conflicting
+goals.  The main challenge is to select appropriate levels of
+abstraction and to organize them in form of TinyOS components to
+support reusability while maintaining energy-efficiency through access
+to the full hardware capabilities when it is needed.</p>
+<p>This TEP proposes a three-tier <em>Hardware Abstraction Architecture
+(HAA)</em> for TinyOS 2.0 that combines the strengths of the component
+model with an effective organization in form of three different levels
+of abstraction. The top level of abstraction fosters portability by
+providing a platform-independent hardware interface, the middle layer
+promotes efficiency through rich hardware-specific interfaces and the
+lowest layer structures access to hardware registers and interrupts.</p>
+<p>The rest of this TEP specifies:</p>
+<ul class="simple">
+<li>the details of the <em>HAA</em> and its three distinct layers
+(<a class="reference" href="#architecture">2. Architecture</a>)</li>
+<li>guidelines on selecting the &quot;right&quot; level of abstraction
+(<a class="reference" href="#combining-different-levels-of-abstraction">3. Combining different levels of abstraction</a>)</li>
+<li>how hardware abstractions can be shared among different TinyOS
+platforms (<a class="reference" href="#horizontal-decomposition">4. Horizontal decomposition</a>)</li>
+<li>the level of hardware abstraction for the processing units
+(<a class="reference" href="#cpu-abstraction">5. CPU abstraction</a>)</li>
+<li>how some hardware abstractions may realize different degrees of
+alignment with the <em>HAA</em> top layer
+(<a class="reference" href="#hil-alignment">6. HIL alignment</a>)</li>
+</ul>
+<p>The <em>HAA</em> is the architectural basis for many TinyOS 2.0 documentary
+TEPs, e.g. <a class="citation-reference" href="#tep101" id="id4" name="id4">[TEP101]</a>, <a class="citation-reference" href="#tep102" id="id5" name="id5">[TEP102]</a>, <a class="citation-reference" href="#tep103" id="id6" name="id6">[TEP103]</a> and so forth. Those TEPs
+focus on the hardware abstraction for a particular hardware module,
+and <a class="citation-reference" href="#tep112" id="id7" name="id7">[TEP112]</a> and <a class="citation-reference" href="#tep115" id="id8" name="id8">[TEP115]</a> explain how power management is realized.</p>
+</div>
+<div class="section">
+<h1><a id="architecture" name="architecture">2. Architecture</a></h1>
+<p>In the proposed architecture (<a class="reference" href="#fig-1">Fig.1</a>), the hardware abstraction
+functionality is organized in three distinct layers of components.
+Each layer has clearly defined responsibilities and is dependent on
+interfaces provided by lower layers.  The capabilities of the
+underlying hardware are gradually adapted to the established
+platform-independent interface between the operating system and the
+applications. As we move from the hardware towards this top interface,
+the components become less and less hardware dependent, giving the
+developer more freedom in the design and the implementation of
+reusable applications.</p>
+<pre class="literal-block" id="fig-1">
+                          +-----------------------------+
+                          |                             |
+                          | Cross-platform applications |
+                          |                             |
+                          +--------------+--------------+
++-----------------+                      |                  +-----------------+
+|Platform-specific|                      |                  |Platform-specific|
+|  applications   |                      |                  |  applications   |
++--------+--------+                      |                  +--------+--------+
+         |          Platform-independent | hardware interface        |
+         |        +-------------+--------+----+-------------+        |
+         |        |             |             |             |        |
+         |  +-----+-----+ +-----+-----+ +-----+-----+ +-----+-----+  |
+         |  |.----+----.| |.----+----.| |.----+----.| |.----+----.|  |
+         |  ||         || ||         || ||         || ||  HIL 4  ||  |
+         |  ||  HIL 1  || ||  HIL 2  || ||  HIL 3  || |`----+----'|  |
+         |  ||         || |`----+----'| |`----+----'| |     |     |  |
+         |  |`----+----'| |     |     | |     |     | |     |  +--+--+
+         +--+--+  |     | |.----+----.| |     |     | |     |  |  |
+            |  |  |     | ||         || |.----+----.| |.----+--+-.|
+            |.-+--+----.| ||         || ||         || ||         ||
+            ||         || ||  HAL 2  || ||         || ||         ||
+            ||         || ||         || ||  HAL 3  || ||  HAL 4  ||
+            ||  HAL 1  || |`----+----'| ||         || ||         ||
+            ||         || |     |     | ||         || ||         ||
+            ||         || |     |     | |`----+----'| |`----+----'|
+            |`----+----'| |.----+----.| |     |     | |     |     |
+            |     |     | ||         || |.----+----.| |     |     |
+            |.----+----.| ||  HPL 2  || ||         || |.----+----.|
+            ||  HPL 1  || ||         || ||  HPL 3  || ||  HPL 4  ||
+            |`----+----'| |`----+----'| |`----+----'| |`----+----'|
+            +-----+-----+ +-----+-----+ +-----+-----+ +-----+-----+  HW/SW
+                  |             |             |             |          boundary
+       ************************************************************************
+           +------+-----+ +-----+-----+ +-----+-----+ +-----+-----+
+           |HW Plat 1   | |HW Plat 2  | |HW Plat 3  | |HW Plat 4  |
+           +------------+ +-----------+ +-----------+ +-----------+
+
+
+             Fig.1: The proposed Hardware Abstraction Architecture
+</pre>
+<p>In contrast to the more traditional two step approach used in other
+embedded operating systems like <a class="citation-reference" href="#windowsce" id="id9" name="id9">[WindowsCE]</a>, the three-level design
+results in increased <em>flexibility</em> that arises from separating the
+platform-specific abstractions and the adaptation wrappers that
+upgrade or downgrade them to the current platform-independent
+interface.  In this way, for maximum performance, the platform
+specific applications can circumvent the <em>HIL</em> components and directly
+tap to the <em>HAL</em> interfaces that provide access to the full
+capabilities of the hardware module.</p>
+<p>The rest of the section discusses the specific roles of each component
+layer in more detail.</p>
+<div class="section">
+<h2><a id="hardware-presentation-layer-hpl" name="hardware-presentation-layer-hpl">Hardware Presentation Layer (HPL)</a></h2>
+<p>The components belonging to the <em>HPL</em> are positioned directly over the
+HW/SW interface. As the name suggests, their major task is to
+&quot;present&quot; the capabilities of the hardware using the native concepts
+of the operating system.  They access the hardware in the usual way,
+either by memory or by port mapped I/O. In the reverse direction, the
+hardware can request servicing by signaling an interrupt. Using these
+communication channels internally, the <em>HPL</em> hides the hardware
+intricacies and exports a more readable interface (simple function
+calls) for the rest of the system.</p>
+<p>The <em>HPL</em> components SHOULD be stateless and expose an interface that
+is fully determined by the capabilities of the hardware module that is
+abstracted. This tight coupling with the hardware leaves little
+freedom in the design and the implementation of the components.  Even
+though each <em>HPL</em> component will be as unique as the underlying
+hardware, all of them will have a similar general structure. For
+optimal integration with the rest of the architecture, each <em>HPL</em>
+component SHOULD have:</p>
+<ul class="simple">
+<li>commands for initialization, starting, and stopping of the
+hardware module that are necessary for effective power management
+policy</li>
+<li>&quot;get&quot; and &quot;set&quot; commands for the register(s) that control
+the operation of the hardware</li>
+<li>separate commands with descriptive names for the most
+frequently used flag-setting/testing operations</li>
+<li>commands for enabling and disabling of the interrupts generated by
+the hardware module</li>
+<li>service routines for the interrupts that are generated by the
+hardware module</li>
+</ul>
+<p>The interrupt service routines in the <em>HPL</em> components perform only
+the most time critical operations (like copying a single value,
+clearing some flags, etc.), and delegate the rest of the processing to
+the higher level components that possess extended knowledge about the
+state of the system.</p>
+<p>The above <em>HPL</em> structure eases manipulation of the hardware.  Instead
+of using cryptic macros and register names whose definitions are
+hidden deep in the header files of compiler libraries, the programmer
+can now access hardware through a familiar interface.</p>
+<p>This <em>HPL</em> does not provide any substantial abstraction over the
+hardware beyond automating frequently used command
+sequences. Nonetheless, it hides the most hardware-dependent code and
+opens the way for developing higher-level abstraction components.
+These higher abstractions can be used with different <em>HPL</em>
+hardware-modules of the same class.  For example, many of the
+microcontrollers used on the existing sensornet platforms have two
+USART modules for serial communication.  They have the same
+functionality but are accessed using slightly different register names
+and generate different interrupt vectors. The <em>HPL</em> components can
+hide these small differences behind a consistent interface, making the
+higher-level abstractions resource independent.  The programmer can
+then switch between the different USART modules by simple rewiring
+(<em>not</em> rewriting) the <em>HPL</em> components, without any changes to the
+implementation code.</p>
+</div>
+<div class="section">
+<h2><a id="hardware-adaptation-layer-hal" name="hardware-adaptation-layer-hal">Hardware Adaptation Layer (HAL)</a></h2>
+<p>The adaptation layer components represent the core of the
+architecture. They use the raw interfaces provided by the <em>HPL</em>
+components to build useful abstractions hiding the complexity
+naturally associated with the use of hardware resources. In contrast
+to the <em>HPL</em> components, they are allowed to maintain state that can
+be used for performing arbitration and resource control.</p>
+<p>Due to the efficiency requirements of sensor networks, abstractions at
+the <em>HAL</em> level are tailored to the concrete device class and
+platform. Instead of hiding the individual features of the hardware
+class behind generic models, <em>HAL</em> interfaces expose specific features
+and provide the &quot;best&quot; possible abstraction that streamlines
+application development while maintaining effective use of resources.</p>
+<p>For example, rather than using a single &quot;file-like&quot; abstraction for
+all devices, we propose domain specific models like <em>Alarm</em>, <em>ADC
+channel</em>, <em>EEPROM</em>. According to the model, <em>HAL</em> components SHOULD
+provide access to these abstractions via rich, customized interfaces,
+and not via standard narrow ones that hide all the functionality
+behind few overloaded commands. This also enables more efficient
+compile-time detection of abstraction interface usage errors.</p>
+</div>
+<div class="section">
+<h2><a id="hardware-interface-layer-hil" name="hardware-interface-layer-hil">Hardware Interface Layer (HIL)</a></h2>
+<p>The final tier in the architecture is formed by the <em>HIL</em> components
+that take the platform-specific abstractions provided by the <em>HAL</em> and
+convert them to hardware-independent interfaces used by cross-platform
+applications.  These interfaces provide a platform independent
+abstraction over the hardware that simplifies the development of the
+application software by hiding the hardware differences.  To be
+successful, this API &quot;contract&quot; SHOULD reflect the <em>typical</em> hardware
+services that are required in a sensornet application.</p>
+<p>The complexity of the <em>HIL</em> components mainly depends on how advanced
+the capabilities of the abstracted hardware are with respect to the
+platform-independent interface. When the capabilities of the hardware
+exceed the current API contract, the <em>HIL</em> &quot;downgrades&quot; the
+platform-specific abstractions provided by the <em>HAL</em> until they are
+leveled-off with the chosen standard interface. Consequently, when the
+underlying hardware is inferior, the <em>HIL</em> might have to resort to
+software simulation of the missing hardware capabilities.  As newer
+and more capable platforms are introduced in the system, the pressure
+to break the current API contract will increase. When the performance
+requirements outweigh the benefits of the stable interface, a discrete
+jump will be made that realigns the API with the abstractions provided
+in the newer <em>HAL</em>.  The evolution of the platform-independent
+interface will force a reimplementation of the affected <em>HIL</em>
+components. For newer platforms, the <em>HIL</em> will be much simpler
+because the API contract and their <em>HAL</em> abstractions are tightly
+related. On the other extreme, the cost of boosting up (in software)
+the capabilities of the old platforms will rise.</p>
+<p>Since we expect <em>HIL</em> interfaces to evolve as new platforms are
+designed, we must determine when the overhead of software emulation of
+hardware features can no longer be sustained.  At this point, we
+introduce <em>versioning</em> of <em>HIL</em> interfaces.  By assigning a version
+number to each iteration of an <em>HIL</em> interface, we can design
+applications using a legacy interface to be compatible with previously
+deployed devices.  This is important for sensor networks since they execute
+long-running applications and may be deployed for years.  An <em>HIL</em> MAY
+also branch, providing multiple different <em>HIL</em> interfaces with
+increasing levels of functionality.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="combining-different-levels-of-abstraction" name="combining-different-levels-of-abstraction">3. Combining different levels of abstraction</a></h1>
+<p>Providing two levels of abstraction to the application --the <em>HIL</em> and
+<em>HAL</em>-- means that a hardware asset may be accessed at two levels in
+parallel, e.g. from different parts of the application and the OS
+libraries.</p>
+<p>The standard Oscilloscope application in TinyOS 2.0, for example, may
+use the ADC to sample several values from a sensor, construct a
+message out of them and send it over the radio. For the sake of
+cross-platform compatibility, the application uses the standard
+<tt class="docutils literal"><span class="pre">Read</span></tt> interface provided by the ADC <em>HIL</em> and forwarded by the
+<tt class="docutils literal"><span class="pre">DemoSensorC</span></tt> component wired to, for example, the temperature
+sensor wrapper.  When enough samples are collected in the message
+buffer, the application passes the message to the networking stack.
+The MAC protocol might use clear channel assessment to determine when
+it is safe to send the message, which could involve taking several ADC
+samples of an analog RSSI signal provided by the radio hardware. Since
+this is a very time critical operation in which the correlation
+between the consecutive samples has a significant influence, the
+programmer of the MAC might directly use the hardware specific
+interface of the <em>HAL</em> component as it provides much finer control
+over the conversion process. (<a class="reference" href="#fig-2">Fig.2</a>) depicts how the ADC hardware
+stack on the MSP430 MCU on the level of <em>HIL</em> and <em>HAL</em> in parallel.</p>
+<pre class="literal-block" id="fig-2">
+        +--------------------------------+
+        |               APP              |
+        +-+----------------------------+-+
+          |                            |
+         Read                         Send
+          |                            |
+          |                            |
++---------+----------+         +-------+--------+
+|   DemoSensorC /    |         |                |
+|   TemperatureC     |         | ActiveMessageC |
++---------+----------+         |                |
+          |                    +-------+--------+
+         Read                          |
+          |                            |
+          |                    +-------+--------+
++---------+----------+         |                |
+| HIL:   AdcC        |         |                |
++---------+----------+         |  TDA5250       |
+          |                    |                |
+          |                    |  Radio Stack   |
+          |                    |                |
+          |                    +-------+--------+
+          |                            |
+          |     +----------------------+
+          |     |
+  Msp430Adc12SingleChannel
+          |     |
+          |     |
++---------+-----+----+
+| HAL: Msp430Adc12C  |
++--------------------+
+
+
+         Fig.2: Accessing the MSP430 ADC hardware abstraction
+                via *HIL* and *HAL* in parallel
+</pre>
+<p>To support this type of &quot;vertical&quot; flexibility the ADC <em>HAL</em> includes
+more complex arbitration and resource control functionality <a class="citation-reference" href="#tep108" id="id10" name="id10">[TEP108]</a>
+so that a safe shared access to the <em>HPL</em> exported resources can be
+guaranteed.</p>
+</div>
+<div class="section">
+<h1><a id="horizontal-decomposition" name="horizontal-decomposition">4. Horizontal decomposition</a></h1>
+<p>In addition to the <em>vertical</em> decomposition of the <em>HAA</em>, a
+<em>horizontal</em> decomposition can promote reuse of the hardware resource
+abstractions that are common on different platforms.  To this aim,
+TinyOS 2.0 introduces the concept of <em>chips</em>, the self-contained
+abstraction of a given hardware chip: microcontroller, radio-chip,
+flash-chip, etc.  Each chip decomposition follows the <em>HAA</em> model,
+providing <em>HIL</em> implementation(s) as the topmost component(s).
+Platforms are then built as compositions of different chip components
+with the help of &quot;glue&quot; components that perform the mapping (<a class="reference" href="#fig-3">Fig.3</a>)</p>
+<pre class="literal-block" id="fig-3">
+    +----------------------------------------------------+
+    | AppC                                               |
+    | /Application Component/                            |
+    +------+--------------------------------------+------+
+           |                                      |
+           |Millisecond Timer                     | Communication
+    +------+------+                     +---------+------+
+    | TimerMilliC |                     | ActiveMessageC |
+    |             |                     |                |
+    | /Platform   |                     | /Platform      |
+    |  Component/ |                     | Component/     |
+    +------+------+                     +---------+------+
+           |                                      |
+    +------+------+                        +------+------+
+    |             | 32kHz Timer            |             |
+    |             |    +--------------+    |             |
+    | Atmega128   |    | CC2420AlarmC |    | CC2420      |
+    |             +----+              +----+             |
+    | Timer Stack |    | /Platform    |    | Radio Stack |
+    |             |    |  Component/  |    |             |
+    | /Chip       |    +--------------+    | /Chip       |
+    |  Component/ |                        |  Component/ |
+    +-------------+                        +-------------+
+
+
+
+Fig.3: The CC2420 software depends on a physical and dedicated
+timer. The micaZ platform code maps this to a specific Atmega128
+timer.
+</pre>
+<p>Some of the shared hardware modules are connected to the
+microcontroller using one of the standard bus interfaces: SPI, I2C,
+UART. To share hardware drivers across different platforms the issue
+of the abstraction of the interconnect has to be solved. Clearly,
+greatest portability and reuse would be achieved using a generic bus
+abstraction like in NetBSD <a class="citation-reference" href="#netbsd" id="id11" name="id11">[netBSD]</a>. This model abstracts the
+different bus protocols under one generic bus access scheme.  In this
+way, it separates the abstraction of the chip from the abstraction of
+the interconnect, potentially allowing the same chip abstraction to be
+used with different connection protocols on different platforms.
+However, this generalization comes at high costs in performance. This
+may be affordable for desktop operating systems, but is highly
+sub-optimal for the application specific sensor network platforms.</p>
+<p>TinyOS 2.0 takes a less generic approach, providing <em>HIL</em>-level,
+microcontroller-independent abstractions of the main bus protocols
+like I2C, SPI, UART and pin-I/O. This distinction enables
+protocol-specific optimizations, for example, the SPI abstraction does
+not have to deal with client addresses, where the I2C abstraction
+does. Furthermore, the programmer can choose to tap directly into the
+chip-specific <em>HAL</em>-level component, which could further improve the
+performance by allowing fine tuning using chip-specific configuration
+options.</p>
+<p>The TinyOS 2.0 bus abstractions, combined with the ones for low-level
+pin-I/O and pin-interrupts (see <a class="citation-reference" href="#tep117" id="id12" name="id12">[TEP117]</a>), enable a given chip
+abstraction to be reused on any platform that supports the required
+bus protocol.  The CC2420 radio, for example, can be used both on the
+Telos and on micaZ platforms, because the abstractions of the serial
+modules on the MSP430 and Atmega128 microcontrollers support the
+unified SPI bus abstraction, which is used by the same CC2420 radio
+stack implementation.</p>
+<p>Sharing chips across platforms raises the issue of resource contention
+on the bus when multiple chips are connected to it. For example, on
+the micaZ the CC2420 is connected to a dedicated SPI bus, while on the
+Telos platform one SPI bus is shared between the CC2420 radio and the
+flash chip. To dissolve conflicts the resource reservation mechanism
+proposed in [<a class="reference" href="#tep108">TEP108</a>] is applied: every chip abstraction that uses a
+bus protocol MUST use the <tt class="docutils literal"><span class="pre">Resource</span></tt> interface in order to gain
+access to the bus resource. In this way, the chip can be safely used
+both in dedicated scenarios, as well as in situations where multiple
+chips are connected to the same physical bus interconnect.</p>
+</div>
+<div class="section">
+<h1><a id="cpu-abstraction" name="cpu-abstraction">5. CPU abstraction</a></h1>
+<p>In TinyOS most of the variability between the processing units is
+hidden from the OS simply by using a nesC/C based programming language
+with a common compiler suite (GCC). For example, the standard library
+distributed with the compiler creates the necessary start-up code for
+initializing the global variables, the stack pointer and the interrupt
+vector table, shielding the OS from these tasks. To unify things
+further, TinyOS provides common constructs for declaring reentrant and
+non-reentrant interrupt service routines and critical code-sections.</p>
+<p>The <em>HAA</em> is not currently used to abstract the features of the
+different CPUs. For the currently supported MCUs, the combination of
+the compiler suite support and the low-level I/O is
+sufficient. Nevertheless, if new cores with radically different
+architectures need to be supported by TinyOS in the future, this part
+of the hardware abstraction functionality will have to be explicitly
+addressed.</p>
+</div>
+<div class="section">
+<h1><a id="hil-alignment" name="hil-alignment">6. HIL alignment</a></h1>
+<p>While the <em>HAA</em> requires that the <em>HIL</em> provides full hardware
+independence (<a class="reference" href="#strong-real-hils">Strong/Real HILs</a>), some abstractions might only
+partially meet this goal (<a class="reference" href="#weak-hils">Weak HILs</a>). This section introduces
+several terms describing different degrees of alignment with the
+concept of a <em>HIL</em>. It also uses the following differentiation:</p>
+<ul class="simple">
+<li><em>platform-defined X:</em> X is defined on all platforms, but the
+definition may be different</li>
+<li><em>platform-specific X:</em> X is defined on just one platform</li>
+</ul>
+<div class="section">
+<h2><a id="strong-real-hils" name="strong-real-hils">Strong/Real HILs</a></h2>
+<p><em>Strong/Real HILs</em> mean that &quot;code using these abstractions can
+reasonably be expected to behave the same on all implementations&quot;.
+This matches the original definition of the <em>HIL</em> level according to
+the <em>HAA</em>.  Examples include the <em>HIL</em> for the Timer (TimerMilliC,
+<a class="citation-reference" href="#tep102" id="id13" name="id13">[TEP102]</a>), for LEDs (LedsC), active messages (ActiveMessageC,
+<a class="citation-reference" href="#tep116" id="id14" name="id14">[TEP116]</a>, if not using any radio metadata at least), sensor wrappers
+(DemoSensorC, <a class="citation-reference" href="#tep109" id="id15" name="id15">[TEP109]</a>) or storage (<a class="citation-reference" href="#tep103" id="id16" name="id16">[TEP103]</a>). Strong <em>HILs</em> may use
+platform-defined types if they also provide operations to manipulate
+them (i.e., they are platform-defined abstract data types), for
+example, the TinyOS 2.x message buffer abstraction, <tt class="docutils literal"><span class="pre">message_t</span></tt>
+(<a class="citation-reference" href="#tep111" id="id17" name="id17">[TEP111]</a>).</p>
+</div>
+<div class="section">
+<h2><a id="weak-hils" name="weak-hils">Weak HILs</a></h2>
+<p><em>Weak HILs</em> mean that one &quot;can write portable code over these
+abstractions, but any use of them involves platform-specific
+behavior&quot;. Although such platform-specific behavior can --at least at
+a rudimentary syntactical level-- be performed by a
+platform-independent application, the semantics require knowledge of
+the particular platform.  For example, the ADC abstraction requires
+platform-specific configuration and the returned data must be
+interpreted in light of this configuration. The ADC configuration is
+exposed on all platforms through the &quot;AdcConfigure&quot; interface that
+takes a platform-defined type (adc_config_t) as a parameter. However,
+the returned ADC data may be processed in a platform-independent way,
+for example, by calculating the max/min or mean of multiple ADC
+readings.</p>
+<p>The benefit from weak <em>HILs</em> are that one can write portable utility
+code, e.g., a repeated sampling for an ADC on top of the data path.
+While code using these abstractions may not be fully portable, it will
+still be easier to port than code built on top of <em>HALs</em>, because weak
+<em>HILs</em> involve some guidelines on how to expose some functionality,
+which should help programmers and provide guidance to platform
+developers.</p>
+</div>
+<div class="section">
+<h2><a id="hardware-independent-interfaces-hii" name="hardware-independent-interfaces-hii">Hardware Independent Interfaces (HII)</a></h2>
+<p><em>Hardware Independent Interfaces (HII)</em>, is just an interface
+definition intended for use across multiple platforms.</p>
+<p>Examples include the SID interfaces, the pin interfaces from <a class="citation-reference" href="#tep117" id="id18" name="id18">[TEP117]</a>,
+the Alarm/Counter/etc interfaces from <a class="citation-reference" href="#tep102" id="id19" name="id19">[TEP102]</a>.</p>
+</div>
+<div class="section">
+<h2><a id="utility-components" name="utility-components">Utility components</a></h2>
+<p><em>Utility components</em> are pieces of clearly portable code (typically
+generic components), which aren't exposing a self-contained service.
+Examples include the components in tos/lib/timer and the
+ArbitratedRead* components. These provide and use HIIs.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="conclusion" name="conclusion">6. Conclusion</a></h1>
+<p>The proposed hardware abstraction architecture provides a set of core
+services that eliminate duplicated code and provide a coherent view of
+the system across different platforms. It supports the concurrent use
+of platform-independent and the platform-dependent interfaces in the
+same application. In this way, applications can localize their
+platform dependence to only the places where performance matters,
+while using standard cross-platform hardware interfaces for the
+remainder of the application.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Vlado Handziski (handzisk at tkn.tu-berlin.de) <a class="footnote-reference" href="#id27" id="id20" name="id20">[1]</a></div>
+<div class="line">Joseph Polastre (polastre at cs.berkeley.edu) <a class="footnote-reference" href="#id28" id="id21" name="id21">[2]</a></div>
+<div class="line">Jan-Hinrich Hauer (hauer at tkn.tu-berlin.de) <a class="footnote-reference" href="#id27" id="id22" name="id22">[1]</a></div>
+<div class="line">Cory Sharp (cssharp at eecs.berkeley.edu) <a class="footnote-reference" href="#id28" id="id23" name="id23">[2]</a></div>
+<div class="line">Adam Wolisz (awo at ieee.org) <a class="footnote-reference" href="#id27" id="id24" name="id24">[1]</a></div>
+<div class="line">David Culler (culler at eecs.berkeley.edu) <a class="footnote-reference" href="#id28" id="id25" name="id25">[2]</a></div>
+<div class="line">David Gay (david.e.gay at intel.com) <a class="footnote-reference" href="#id29" id="id26" name="id26">[3]</a></div>
+</div>
+<table class="docutils footnote" frame="void" id="id27" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id27">[1]</a></td><td><em>(<a class="fn-backref" href="#id20">1</a>, <a class="fn-backref" href="#id22">2</a>, <a class="fn-backref" href="#id24">3</a>)</em> Technische Universitaet Berlin
+Telecommunication Networks Group
+Sekr. FT 5, Einsteinufer 25
+10587 Berlin, Germany</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id28" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="id28">[2]</a></td><td><em>(<a class="fn-backref" href="#id21">1</a>, <a class="fn-backref" href="#id23">2</a>, <a class="fn-backref" href="#id25">3</a>)</em> University of California, Berkeley
+Computer Science Department
+Berkeley, CA 94720 USA</td></tr>
+</tbody>
+</table>
+<table class="docutils footnote" frame="void" id="id29" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id26" name="id29">[3]</a></td><td>Intel Research Berkeley
+2150 Shattuck Ave, Suite 1300
+CA 94704</td></tr>
+</tbody>
+</table>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">Citations</a></h1>
+<table class="docutils citation" frame="void" id="haa2005" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="haa2005">[HAA2005]</a></td><td>V. Handziski, J.Polastre, J.H.Hauer, C.Sharp,
+A.Wolisz and D.Culler, &quot;Flexible Hardware Abstraction for Wireless
+Sensor Networks&quot;, in <em>Proceedings of the 2nd European Workshop on
+Wireless Sensor Networks (EWSN 2005)</em>, Istanbul, Turkey, 2005.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="t2-tr" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="t2-tr">[T2_TR]</a></td><td>P. Levis, D. Gay, V. Handziski, J.-H.Hauer, B.Greenstein,
+M.Turon, J.Hui, K.Klues, C.Sharp, R.Szewczyk, J.Polastre,
+P.Buonadonna, L.Nachman, G.Tolle, D.Culler, and A.Wolisz,
+&quot;T2: A Second Generation OS For Embedded Sensor Networks&quot;,
+<em>Technical Report TKN-05-007</em>, Telecommunication Networks Group,
+Technische Universitaet Berlin, November 2005.</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="windowsce" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id9" name="windowsce">[WindowsCE]</a></td><td>&quot;The WindowsCE operating system home page&quot;, <em>Online</em>,
+<a class="reference" href="http://msdn.microsoft.com/embedded/windowsce">http://msdn.microsoft.com/embedded/windowsce</a></td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="netbsd" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id11" name="netbsd">[NetBSD]</a></td><td>&quot;The NetBSD project home page&quot;, <em>Online</em>,
+<a class="reference" href="http://www.netbsd.org">http://www.netbsd.org</a></td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="tep1">[TEP1]</a></td><td>Philip Levis, &quot;TEP structure and key words&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep101" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id4" name="tep101">[TEP101]</a></td><td>Jan-Hinrich Hauer, Philip Levis, Vlado Handziski, David Gay
+&quot;Analog-to-Digital Converters (ADCs)&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep102" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep102">[TEP102]</a></td><td><em>(<a class="fn-backref" href="#id5">1</a>, <a class="fn-backref" href="#id13">2</a>, <a class="fn-backref" href="#id19">3</a>)</em> Cory Sharp, Martin Turon, David Gay, &quot;Timers&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep103" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep103">[TEP103]</a></td><td><em>(<a class="fn-backref" href="#id6">1</a>, <a class="fn-backref" href="#id16">2</a>)</em> David Gay, Jonathan Hui, &quot;Permanent Data Storage (Flash)&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep108" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id10" name="tep108">[TEP108]</a></td><td>Kevin Klues, Philip Levis, David Gay, David Culler, Vlado
+Handziski, &quot;Resource Arbitration&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep109" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id15" name="tep109">[TEP109]</a></td><td>David Gay, Philip Levis, Wei Hong, Joe Polastre, and Gilman
+Tolle &quot;Sensors and Sensor Boards&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep111" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id17" name="tep111">[TEP111]</a></td><td>Philip Levis, &quot;message_t&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep112" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id7" name="tep112">[TEP112]</a></td><td>Robert Szewczyk, Philip Levis, Martin Turon, Lama Nachman,
+Philip Buonadonna, Vlado Handziski, &quot;Microcontroller Power
+Management&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep115" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id8" name="tep115">[TEP115]</a></td><td>Kevin Klues, Vlado Handziski, Jan-Hinrich Hauer, Philip
+Levis, &quot;Power Management of Non-Virtualised Devices&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep116" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id14" name="tep116">[TEP116]</a></td><td>Philip Levis, &quot;Packet Protocols&quot;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep117" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep117">[TEP117]</a></td><td><em>(<a class="fn-backref" href="#id12">1</a>, <a class="fn-backref" href="#id18">2</a>)</em> Phil Buonadonna, Jonathan Hui, &quot;Low-Level I/O&quot;</td></tr>
+</tbody>
+</table>
+</div>
+</div>
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+  font-family: serif ;
+  font-size: 100% }
+
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+  margin-left: 2em ;
+  margin-right: 2em ;
+  background-color: #eeeeee;
+  border-color: #000000;
+  border-width: thin; 
+  font-size: 14px
+}
+
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+  font-family: sans-serif ;
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+  white-space: nowrap }
+
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+  font-style: italic }
+
+span.pre {
+  white-space: pre }
+
+span.problematic {
+  color: red }
+
+table {
+  margin-top: 0.5em ;
+  margin-bottom: 0.5em }
+
+table.citation {
+  border-left: solid thin gray ;
+  padding-left: 0.5ex }
+
+table.docinfo {
+  margin: 2em 4em;
+}
+
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+  border-left: solid thin black ;
+  padding-left: 0.5ex }
+
+td, th {
+  padding-left: 0.5em ;
+  padding-right: 0.5em ;
+  vertical-align: top }
+
+th.docinfo-name, th.field-name {
+  font-weight: bold ;
+  text-align: left ;
+  white-space: nowrap;
+  }
+
+h1 tt, h2 tt, h3 tt, h4 tt, h5 tt, h6 tt {
+  font-size: 100% }
+
+tt {}
+
+ul.auto-toc {
+  list-style-type: none }
+
+</style>
+</head>
+<body>
+<div class="document" id="coding-standard">
+<h1 class="title">Coding Standard</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">3</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">TinyOS 2.0 Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Best Current Practice</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Draft</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">2.x</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Ion Yannopoulos, David Gay</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">31-Dec-2004</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.5</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2006-12-12</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This document specifies a Best Current Practices for the
+TinyOS Community, and requests discussion and suggestions for
+improvements.  Distribution of this memo is unlimited.  This memo
+is in full compliance with <a class="citation-reference" href="#tep-1" id="id1" name="id1">[TEP_1]</a>.</p>
+</div>
+<div class="contents topic">
+<p class="topic-title first"><a id="contents" name="contents">Contents</a></p>
+<ul class="auto-toc simple">
+<li><a class="reference" href="#introduction" id="id7" name="id7">1&nbsp;&nbsp;&nbsp;Introduction</a></li>
+<li><a class="reference" href="#general-conventions" id="id8" name="id8">2&nbsp;&nbsp;&nbsp;General Conventions</a><ul class="auto-toc">
+<li><a class="reference" href="#general" id="id9" name="id9">2.1&nbsp;&nbsp;&nbsp;General</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#packages" id="id10" name="id10">3&nbsp;&nbsp;&nbsp;Packages</a><ul class="auto-toc">
+<li><a class="reference" href="#directory-structure" id="id11" name="id11">3.1&nbsp;&nbsp;&nbsp;Directory structure</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#language-conventions" id="id12" name="id12">4&nbsp;&nbsp;&nbsp;Language Conventions</a><ul class="auto-toc">
+<li><a class="reference" href="#nesc-convention" id="id13" name="id13">4.1&nbsp;&nbsp;&nbsp;nesC convention</a><ul class="auto-toc">
+<li><a class="reference" href="#names" id="id14" name="id14">4.1.1&nbsp;&nbsp;&nbsp;Names</a></li>
+<li><a class="reference" href="#id5" id="id15" name="id15">4.1.2&nbsp;&nbsp;&nbsp;Packages</a></li>
+<li><a class="reference" href="#preprocessor" id="id16" name="id16">4.1.3&nbsp;&nbsp;&nbsp;Preprocessor</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#c-convention" id="id17" name="id17">4.2&nbsp;&nbsp;&nbsp;C Convention</a></li>
+<li><a class="reference" href="#java-convention" id="id18" name="id18">4.3&nbsp;&nbsp;&nbsp;Java convention</a></li>
+<li><a class="reference" href="#other-languages" id="id19" name="id19">4.4&nbsp;&nbsp;&nbsp;Other languages</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#tinyos-conventions" id="id20" name="id20">5&nbsp;&nbsp;&nbsp;TinyOS Conventions</a><ul class="auto-toc">
+<li><a class="reference" href="#error-returns" id="id21" name="id21">5.1&nbsp;&nbsp;&nbsp;Error returns</a></li>
+<li><a class="reference" href="#passing-pointers-between-components" id="id22" name="id22">5.2&nbsp;&nbsp;&nbsp;Passing pointers between components</a></li>
+<li><a class="reference" href="#usage-of-wiring-annotations" id="id23" name="id23">5.3&nbsp;&nbsp;&nbsp;Usage of wiring annotations</a></li>
+</ul>
+</li>
+<li><a class="reference" href="#citations" id="id24" name="id24">6&nbsp;&nbsp;&nbsp;Citations</a></li>
+</ul>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id7" id="introduction" name="introduction">1&nbsp;&nbsp;&nbsp;Introduction</a></h1>
+<dl class="docutils">
+<dt>The purpose of a naming convention is twofold:</dt>
+<dd><ul class="first last simple">
+<li>To avoid collisions which prevent compilation or lead to errors.
+In TinyOS the most important place to avoid such collisions is in
+interface and component names.</li>
+<li>To enable readers of the code to identify which names are grouped
+together and which packages they are defined in.</li>
+</ul>
+</dd>
+</dl>
+<p>Remember that code that is useful will end up being read far more often
+than it is written.  If you deviate from the suggestions or requirements
+below, be consistent in how you do so.  If you add any new conventions to
+your code, note it in a README.</p>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id8" id="general-conventions" name="general-conventions">2&nbsp;&nbsp;&nbsp;General Conventions</a></h1>
+<div class="section">
+<h2><a class="toc-backref" href="#id9" id="general" name="general">2.1&nbsp;&nbsp;&nbsp;General</a></h2>
+<blockquote>
+<ul class="simple">
+<li>Avoid the use of acronyms and abbreviations that are not well known.
+Try not to abbreviate &quot;just because&quot;.</li>
+<li>Acronyms should be capitalized (as in Java), i.e., Adc, not ADC.
+Exception: 2-letter acronyms should be all caps (e.g., AM for active
+messages, not Am)</li>
+<li>If you need to abbreviate a word, do so consistently.  Try to be
+consistent with code outside your own.</li>
+<li>All code should be documented using <cite>nesdoc</cite> <a class="citation-reference" href="#nesdoc" id="id2" name="id2">[nesdoc]</a>, <cite>Doxygen</cite>
+<a class="citation-reference" href="#doxygen" id="id3" name="id3">[Doxygen]</a> or <cite>Javadoc</cite> <a class="citation-reference" href="#javadoc" id="id4" name="id4">[Javadoc]</a>.  Ideally each command, event and
+function has documentation.  At a bare minimum the interface, component,
+class or file needs a paragraph of description.</li>
+<li>If you write code for a file, add an <cite>&#64;author</cite> tag to the toplevel
+documentation block.</li>
+</ul>
+</blockquote>
+</div>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id10" id="packages" name="packages">3&nbsp;&nbsp;&nbsp;Packages</a></h1>
+<p>For the purposes of this document a package is a collection of related
+source and other files, in whatever languages are needed.  A package is
+a logical grouping.  It may or may not correspond to a physical grouping
+such as a single directory.  In TinyOS a package is most often a
+directory with zero or more subdirectories.</p>
+<p>nesC and C do not currently provide any package support, thus names
+of types and components in different packages might accidentally
+clash. To make this less likely, judiciously use prefixes on groups
+of related files (often, but not always, part of a single package).
+See the examples below.</p>
+<p>In a package, we distinguish between public components (intended to
+be used and wired outside the package) and private components (only
+used and wired within the package). This distinction is not enforced
+by nesC.</p>
+<div class="section">
+<h2><a class="toc-backref" href="#id11" id="directory-structure" name="directory-structure">3.1&nbsp;&nbsp;&nbsp;Directory structure</a></h2>
+<blockquote>
+<ul>
+<li><p class="first">Each package should have it's own directory.  It may have as many
+subdirectories as are necessary.</p>
+</li>
+<li><p class="first">The package's directory should match the package's prefix (if it
+uses one), but in lower-case.</p>
+</li>
+<li><p class="first">The default packages in a TinyOS distribution are:</p>
+<ul>
+<li><dl class="first docutils">
+<dt><cite>tos/system/</cite>.  Core TinyOS components.  This directory's</dt>
+<dd><p class="first last">components are the ones necessary for TinyOS to actually run.</p>
+</dd>
+</dl>
+</li>
+<li><dl class="first docutils">
+<dt><cite>tos/interfaces/</cite>.  Core TinyOS interfaces, including</dt>
+<dd><p class="first last">hardware-independent abstractions.  Expected to be heavily
+used not just by <cite>tos/system</cite> but throughout all other code.
+<cite>tos/interfaces</cite> should only contain interfaces named in TEPs.</p>
+</dd>
+</dl>
+</li>
+<li><dl class="first docutils">
+<dt><cite>tos/platforms/</cite>.  Contains code specific to mote platforms, but</dt>
+<dd><p class="first last">chip-independent.</p>
+</dd>
+</dl>
+</li>
+<li><dl class="first docutils">
+<dt><cite>tos/chips/</cite>.  Contains code specific to particular chips and to</dt>
+<dd><p class="first last">chips on particular platforms.</p>
+</dd>
+</dl>
+</li>
+<li><dl class="first docutils">
+<dt><cite>tos/libs/</cite>.  Contains interfaces and components which extend the</dt>
+<dd><p class="first last">usefulness of TinyOS but which are not viewed as essential to its
+operation.  Libraries will likely contain subdirectories.</p>
+</dd>
+</dl>
+</li>
+<li><dl class="first docutils">
+<dt><cite>apps/</cite>, <cite>apps/demos</cite>, <cite>apps/tests</cite>, <cite>apps/tutorials</cite>.  Contain</dt>
+<dd><p class="first last">applications with some division by purpose.  Applications may
+contain subdirectories.</p>
+</dd>
+</dl>
+</li>
+</ul>
+</li>
+<li><p class="first">It is not necessary that packages other than the core break up their
+components and their interfaces.  The core should allow overrides of
+components fairly easily however.</p>
+</li>
+<li><p class="first">Each directory should have a README describing its purpose.</p>
+</li>
+</ul>
+</blockquote>
+</div>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id12" id="language-conventions" name="language-conventions">4&nbsp;&nbsp;&nbsp;Language Conventions</a></h1>
+<div class="section">
+<h2><a class="toc-backref" href="#id13" id="nesc-convention" name="nesc-convention">4.1&nbsp;&nbsp;&nbsp;nesC convention</a></h2>
+<div class="section">
+<h3><a class="toc-backref" href="#id14" id="names" name="names">4.1.1&nbsp;&nbsp;&nbsp;Names</a></h3>
+<blockquote>
+<ul class="simple">
+<li>All nesC files must have a <cite>.nc</cite> extension.  The nesC compiler requires
+that the filename match the interface or component name.</li>
+<li>Directory names should be lowercase.</li>
+<li>Interface and component names should be mixed case, starting upper
+case.</li>
+<li>All public components should be suffixed with 'C'.</li>
+<li>All private components should be suffixed with 'P'.</li>
+<li>Avoid interfaces ending in 'C' or 'P'.</li>
+<li>If an interface and component are related it is useful if they have
+the same name except for the suffix of the component.</li>
+<li>Commands, events, tasks and functions should be mixed case, starting
+lower case.</li>
+<li>Events which handle the second half of a split-phase operation begun
+in a command should have names that are related to the commands.
+Making the command past tense or appending <cite>'Done'</cite> are suggested.</li>
+<li>Constants should be all upper case, words separated by underscores.
+- Use of <cite>#define</cite> for integer constants is discouraged: use <cite>enum</cite>.</li>
+<li>Type arguments to generic components and interfaces should use the
+same case as C types: all lower-case separated by underscores, ending
+in '_t'.</li>
+<li>Module (global) variables should be mixed case, starting lower case.</li>
+</ul>
+</blockquote>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id15" id="id5" name="id5">4.1.2&nbsp;&nbsp;&nbsp;Packages</a></h3>
+<blockquote>
+<ul>
+<li><p class="first">Each package may use a prefix for its component, interface and
+global C names. These prefixes may sometimes be common to multiple
+packages. Examples:</p>
+<blockquote>
+<ul class="simple">
+<li>All hardware presentation layer names start with Hpl (this is
+an example of a shared prefix).</li>
+<li>Chip-specific hardware abstraction layer components and interfaces
+start with the chip name, e.g., Atm128 for ATmega128.</li>
+<li>The Maté virtual machine uses the Mate to prefix all its names.</li>
+<li>Core TinyOS names (e.g., the timer components, the Init interface)
+do not use a prefix.</li>
+</ul>
+</blockquote>
+</li>
+<li><p class="first">Some packages may use multiple prefixes. For instance, the ATmega128
+chip package uses an Hpl prefix for hardware presentation layer
+components and Atm128 for hardware abstraction layer components.</p>
+</li>
+</ul>
+</blockquote>
+</div>
+<div class="section">
+<h3><a class="toc-backref" href="#id16" id="preprocessor" name="preprocessor">4.1.3&nbsp;&nbsp;&nbsp;Preprocessor</a></h3>
+<blockquote>
+<ul class="simple">
+<li>Don't use the nesC <cite>includes</cite> statement.  It does not handle macro
+inclusion properly.  Use <cite>#include</cite> instead.</li>
+<li>Macros declared in an <cite>.nc</cite> file must be <cite>#define</cite>'d after the
+<cite>module</cite> or <cite>configuration</cite> keyword to actually limit their scope to
+the module.</li>
+<li>Macros which are meant for use in multiple <cite>.nc</cite> files should be
+<cite>#define</cite>'d in a <cite>#include</cite>'d C header file.</li>
+<li>Use of macros should be minimized:
+<cite>#define</cite> should only be used where <cite>enum</cite> and <cite>inline</cite> do not suffice.<ul>
+<li>Arguments to <cite>unique()</cite> should be <cite>#define</cite> string constants rather
+than strings.  This minimizes nasty bugs from typos the compiler
+can't catch.</li>
+</ul>
+</li>
+</ul>
+</blockquote>
+</div>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id17" id="c-convention" name="c-convention">4.2&nbsp;&nbsp;&nbsp;C Convention</a></h2>
+<blockquote>
+<ul class="simple">
+<li>All C files have a .h (header) or (rarely) a .c (source) extension.<ul>
+<li>Filenames associated with a component should have the same name as
+the component.</li>
+<li>Filenames of a package should have a name with the package
+prefix (if any).</li>
+<li>Filenames which are not associated with a component should be lowercase.</li>
+</ul>
+</li>
+<li>C does not protect names in any way. If a package uses a prefix, it
+should also use it for all types, tags, functions, variables,
+constants and macros. This leads naturally to:<ul>
+<li>Minimize C code outside of nesC files.  In particular: most uses of
+hardware specific macros in TinyOS 1.x should be replaced with nesC
+components in TinyOS 2.x.</li>
+</ul>
+</li>
+<li>C type names (define with <cite>typedef</cite>) should be lower case, words
+separated by underscores and ending in <cite>'_t'</cite>.</li>
+<li>C tag names (for <cite>struct</cite>, <cite>union</cite>, or <cite>enum</cite>) should be lower case,
+words separated by underscores.  Types with tag names should provide
+a typedef.</li>
+<li>C types which represent opaque pointers (for use in parameters) should
+be named similar to other types but should end in <cite>'_ptr_t'</cite>.</li>
+<li>Functions should be lower case, words separated by underscores.</li>
+<li>Function macros (<cite>#define</cite> ) should be all upper case, words separated
+by underscores.<ul>
+<li>Using function macros is discouraged: use <cite>inline</cite> functions.</li>
+</ul>
+</li>
+<li>Constants should be all upper case, words separated by underscores.
+- Use of <cite>#define</cite> for integer constants is discouraged: use <cite>enum</cite>.</li>
+<li>Global variables should be mixed case, starting lower case.</li>
+</ul>
+</blockquote>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id18" id="java-convention" name="java-convention">4.3&nbsp;&nbsp;&nbsp;Java convention</a></h2>
+<blockquote>
+<ul class="simple">
+<li>The standard Java coding convention <a class="citation-reference" href="#java-coding-convention" id="id6" name="id6">[Java_Coding_Convention]</a>
+should be followed.</li>
+<li>All core TinyOS code is in the package <cite>net.tinyos</cite>.</li>
+</ul>
+</blockquote>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id19" id="other-languages" name="other-languages">4.4&nbsp;&nbsp;&nbsp;Other languages</a></h2>
+<blockquote>
+<ul class="simple">
+<li>No established conventions.</li>
+</ul>
+</blockquote>
+</div>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id20" id="tinyos-conventions" name="tinyos-conventions">5&nbsp;&nbsp;&nbsp;TinyOS Conventions</a></h1>
+<p>TinyOS also follows a number of higher-level programming conventions,
+mostly designed to provide a consistent &quot;look&quot; to TinyOS interfaces and
+components, and to increase software reliability.</p>
+<div class="section">
+<h2><a class="toc-backref" href="#id21" id="error-returns" name="error-returns">5.1&nbsp;&nbsp;&nbsp;Error returns</a></h2>
+<p>TinyOS defines a standard error return type, <tt class="docutils literal"><span class="pre">error_t</span></tt>, similar to Unix's
+error returns, except that error codes are positive:</p>
+<pre class="literal-block">
+enum {
+  SUCCESS        = 0,
+  FAIL           = 1,
+  ESIZE          = 2, // Parameter passed in was too big.
+  ...
+};
+</pre>
+<p><tt class="docutils literal"><span class="pre">SUCCESS</span></tt> represents successful execution of an operation, and <tt class="docutils literal"><span class="pre">FAIL</span></tt>
+represents some undescribed failure. Operations can also return more
+descriptive failure results using one of the Exxx constants, see the
+<tt class="docutils literal"><span class="pre">tos/types/TinyError.h</span></tt> file for the current list of errors.</p>
+<p>The <tt class="docutils literal"><span class="pre">error_t</span></tt> type has a combining function to support multiple wiring
+of commands or events retuning <tt class="docutils literal"><span class="pre">error_t</span></tt>, defined as follows:</p>
+<pre class="literal-block">
+error_t ecombine(error_t r1, error_t r2) { return r1 == r2 ? r1 : FAIL; }
+</pre>
+<p>This function returns <tt class="docutils literal"><span class="pre">SUCCESS</span></tt> if both error returns are <tt class="docutils literal"><span class="pre">SUCCESS</span></tt>, an
+error code if they both return the same error, and <tt class="docutils literal"><span class="pre">FAIL</span></tt> otherwise.</p>
+<p>Commands that initiate a split-phase operation SHOULD return <tt class="docutils literal"><span class="pre">error_t</span></tt> if
+the operation may be refused (i.e., the split-phase event may not be
+signaled under some conditions). With such functions, the split-phase event
+will be signaled iff the split-phase command returns <tt class="docutils literal"><span class="pre">SUCCESS</span></tt>.</p>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id22" id="passing-pointers-between-components" name="passing-pointers-between-components">5.2&nbsp;&nbsp;&nbsp;Passing pointers between components</a></h2>
+<p>Sharing data across components can easily lead to bugs such as data races,
+overwriting data, etc. To minimise the likelyhood of these occurrences,
+we discourage the use of pointers in TinyOS interfaces.</p>
+<p>However, there are circumstances where pointers are necessary for
+efficiency or convenience, for instance when receiving messages, reading
+data from a flash chip, returning multiple results, etc.  Thus we allow the
+use of pointers within interfaces as long as use of those pointers follows
+an &quot;ownership&quot; model: at any time, only one component may refer to the
+object referenced by the pointer. We distinguish two cases:</p>
+<ul>
+<li><p class="first">Ownership transferred for the duration of a call: in the following command:</p>
+<pre class="literal-block">
+command void getSomething(uint16_t *value1, uint32_t *value2);
+</pre>
+<p>we are using pointers to return multiple results. The component
+implementing getSomething MAY read/write <tt class="docutils literal"><span class="pre">*value1</span></tt> or <tt class="docutils literal"><span class="pre">*value2</span></tt>
+during the call and MUST NOT access these pointers after getSomething
+returns.</p>
+</li>
+<li><p class="first">Permanent ownership transfer: in the following split-phase interface:</p>
+<pre class="literal-block">
+interface Send {
+  command void send(message_t *PASS msg);
+  event void sendDone(message_t *PASS msg);
+}
+</pre>
+<p>components calling send or signaling <tt class="docutils literal"><span class="pre">sendDone</span></tt> relinquish ownership of
+the message buffer. For example, take a program where component A uses
+the <tt class="docutils literal"><span class="pre">Send</span></tt> interface and B provides it. If A calls <tt class="docutils literal"><span class="pre">send</span></tt> with a
+pointer to <tt class="docutils literal"><span class="pre">message_t</span></tt> <em>x</em>, then ownership of <em>x</em> passes to B and A
+MUST NOT access <em>x</em> while B MAY access <em>x</em>. Later, when B signals the
+<tt class="docutils literal"><span class="pre">sendDone</span></tt> event with a pointer to <em>x</em> as parameter, ownership of <em>x</em>
+returns to A and A MAY access <em>x</em>, while B MUST NOT access <em>x</em>.</p>
+<p>If an interface with <tt class="docutils literal"><span class="pre">PASS</span></tt> parameters has a return type of
+<tt class="docutils literal"><span class="pre">error_t</span></tt>, then ownership is transferred iff the result is
+<tt class="docutils literal"><span class="pre">SUCCESS</span></tt>. For instance, in</p>
+<pre class="literal-block">
+interface ESend {
+  command error_t esend(message_t *PASS msg);
+  event void esendDone(message_t *PASS msg, error_t sendResult);
+}
+</pre>
+<p>ownership is transferred only if <tt class="docutils literal"><span class="pre">esend</span></tt> returns <tt class="docutils literal"><span class="pre">SUCCESS</span></tt>, while
+ownership is always transferred with <tt class="docutils literal"><span class="pre">esendDone</span></tt>. This convention
+matches the rule for signaling split-phase completion events discussed
+above.</p>
+<p><tt class="docutils literal"><span class="pre">PASS</span></tt> is a do-nothing macro defined as follows:</p>
+<pre class="literal-block">
+#define PASS
+</pre>
+</li>
+</ul>
+<p>In the future, some tool may check that programs respect these ownership
+transfer rules.</p>
+</div>
+<div class="section">
+<h2><a class="toc-backref" href="#id23" id="usage-of-wiring-annotations" name="usage-of-wiring-annotations">5.3&nbsp;&nbsp;&nbsp;Usage of wiring annotations</a></h2>
+<p>TinyOS checks constraints on a program's wiring graph specified by
+annotations on a component's interfaces. Wiring constraints are specified
+by placing <tt class="docutils literal"><span class="pre">&#64;atmostonce()</span></tt>, <tt class="docutils literal"><span class="pre">&#64;atleastonce()</span></tt> and <tt class="docutils literal"><span class="pre">&#64;exactlyonce()</span></tt>
+attributes on the relevant interfaces. For instance, writing</p>
+<pre class="literal-block">
+module Fun {
+  provides interface Init &#64;atleastonce();
+...
+</pre>
+<p>ensures that programs using module <tt class="docutils literal"><span class="pre">Fun</span></tt> must wire its <tt class="docutils literal"><span class="pre">Init</span></tt> interface
+at least once.</p>
+<p>The <tt class="docutils literal"><span class="pre">&#64;atleastonce()</span></tt> and <tt class="docutils literal"><span class="pre">&#64;exactlyonce()</span></tt> annotations SHOULD be used
+sparingly, as they can easily prevent modularising subsystem
+implementations, which is undesirable. However, the <tt class="docutils literal"><span class="pre">&#64;atleastonce()</span></tt>
+annotation SHOULD be used on initialisation interfaces (typically, the
+<tt class="docutils literal"><span class="pre">Init</span></tt> interface) in modules, to prevent the common bug of forgetting to
+wire initialisation code.</p>
+</div>
+</div>
+<div class="section">
+<h1><a class="toc-backref" href="#id24" id="citations" name="citations">6&nbsp;&nbsp;&nbsp;Citations</a></h1>
+<table class="docutils citation" frame="void" id="tep-1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="tep-1">[TEP_1]</a></td><td>TEP 1
+&lt;<a class="reference" href="http://www.tinyos.net/working_groups/tinyos-2.0wg/teps/tep-1.html">http://www.tinyos.net/working_groups/tinyos-2.0wg/teps/tep-1.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep-2" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a name="tep-2">[TEP_2]</a></td><td>TEP 2
+&lt;<a class="reference" href="http://www.tinyos.net/working_groups/tinyos-2.0wg/teps/tep-2.html">http://www.tinyos.net/working_groups/tinyos-2.0wg/teps/tep-2.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="doxygen" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="doxygen">[Doxygen]</a></td><td>Doxygen &lt;<a class="reference" href="http://www.doxygen.org">http://www.doxygen.org</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="java-coding-convention" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id6" name="java-coding-convention">[Java_Coding_Convention]</a></td><td>Java Coding Convention
+&lt;<a class="reference" href="http://java.sun.com/docs/codeconv/html/CodeConvTOC.doc.html">http://java.sun.com/docs/codeconv/html/CodeConvTOC.doc.html</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="javadoc" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id4" name="javadoc">[JavaDoc]</a></td><td>JavaDoc &lt;<a class="reference" href="http://java.sun.com/j2se/javadoc">http://java.sun.com/j2se/javadoc</a>&gt;</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="nesdoc" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="nesdoc">[nesdoc]</a></td><td>nesdoc &lt;<a class="reference" href="http://www.tinyos.net/tinyos-1.x/doc/nesc/nesdoc.html">http://www.tinyos.net/tinyos-1.x/doc/nesc/nesdoc.html</a>&gt;</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<head>
+<meta http-equiv="Content-Type" content="text/html; charset=utf-8" />
+<meta name="generator" content="Docutils 0.4: http://docutils.sourceforge.net/" />
+<title>Active Message ID Allocation for Network Protocols and Applications</title>
+<meta name="author" content="Omprakash Gnawali" />
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+:Author: David Goodger
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+<body>
+<div class="document" id="active-message-id-allocation-for-network-protocols-and-applications">
+<h1 class="title">Active Message ID Allocation for Network Protocols and Applications</h1>
+<table class="docinfo" frame="void" rules="none">
+<col class="docinfo-name" />
+<col class="docinfo-content" />
+<tbody valign="top">
+<tr class="field"><th class="docinfo-name">TEP:</th><td class="field-body">4</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Group:</th><td class="field-body">Network Protocol Working Group</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Type:</th><td class="field-body">Best Current Practice</td>
+</tr>
+<tr><th class="docinfo-name">Status:</th>
+<td>Final</td></tr>
+<tr class="field"><th class="docinfo-name">TinyOS-Version:</th><td class="field-body">&gt; 2.1</td>
+</tr>
+<tr><th class="docinfo-name">Author:</th>
+<td>Omprakash Gnawali</td></tr>
+<tr class="field"><th class="docinfo-name">Draft-Created:</th><td class="field-body">07-May-2008</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Version:</th><td class="field-body">1.8</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Modified:</th><td class="field-body">2008-11-04</td>
+</tr>
+<tr class="field"><th class="docinfo-name">Draft-Discuss:</th><td class="field-body">TinyOS Developer List &lt;tinyos-devel at mail.millennium.berkeley.edu&gt;</td>
+</tr>
+</tbody>
+</table>
+<div class="note">
+<p class="first admonition-title">Note</p>
+<p class="last">This document specifies a Best Current Practices for the
+TinyOS Community, and requests discussion and suggestions for
+improvements.  Distribution of this memo is unlimited.  This memo
+is in full compliance with <a class="citation-reference" href="#tep-1" id="id1" name="id1">[TEP_1]</a>.</p>
+</div>
+<div class="section">
+<h1><a id="introduction" name="introduction">1. Introduction</a></h1>
+<p>In order to document the Active Message Type <a class="citation-reference" href="#tep-116" id="id2" name="id2">[TEP_116]</a>, also known as
+Active Message Identifier (AM ID), used by the protocols and to
+prevent AM ID conflicts between applications and protocols distributed
+with TinyOS 2.x, the application and protocol developers MUST use AM
+IDs in the appropriate range. The network protocol implementors MUST
+use AM ID allocated by the Network Protocol Working Group for the
+specific protocol. The application developers MUST use AM IDs from the
+unreserved pool. This TEP describes the process of AM ID allocations
+and deallocations and how the allocations are documented.</p>
+</div>
+<div class="section">
+<h1><a id="am-id-pools" name="am-id-pools">2. AM ID pools</a></h1>
+<p>The unreserved pool is in the range 128-255 (0x80-0xFF). The reserved
+pool is in the range 0-127 (0x00-0x7F).</p>
+<div class="section">
+<h2><a id="unreserved-pool-0x80-0xff" name="unreserved-pool-0x80-0xff">2.1 Unreserved pool (0x80 - 0xFF)</a></h2>
+<p>When an application uses the AM ID in the range 128-255, it is
+guaranteed to not conflict with AM IDs used by the protocols
+distributed with TinyOS 2.x. These IDs may conflict with the protocols
+in the contrib tree or other applications. No allocation request is
+necessary to use AM IDs in this range.</p>
+</div>
+<div class="section">
+<h2><a id="reserved-pool-0x00-0x7f" name="reserved-pool-0x00-0x7f">2.2 Reserved pool (0x00 - 0x7F)</a></h2>
+<p>When a protocol uses an allocated AM ID in the reserved pool, it is
+guaranteed to not conflict with AM IDs used by applications or other
+protocols that also use an allocated AM ID. The AM ID may conflict
+with the protocols and applications in the contrib tree.</p>
+</div>
+</div>
+<div class="section">
+<h1><a id="requesting-am-id-allocation" name="requesting-am-id-allocation">3. Requesting AM ID Allocation</a></h1>
+<p>The Network Protocol Working Group will maintain a list of all the
+allocations in the reserved range.</p>
+<p>Developers whose protocols will be included within the ''tos''
+directory MUST receive AM ID allocation from the Network Protocol
+Working Group. This allocation policy applies to software and
+protocols maintained by any working group.</p>
+<p>To receive an AM ID allocation, please send an email to the chair of
+Network Protocol Working Group with the following information:
+* Working Group responsible for the protocol
+* Name of the protocol and relevant TEPs
+* Location of the protocol in TinyOS source tree
+* Number of AM IDs requested and description of each ID
+* Specific AM ID request (only if necessary)</p>
+<p>Upon receiving this request, the chair of the Network Protocol Working
+Group will allocate the AM ID(s) and document the allocation. If the
+request is made for a specific AM ID, the chair of the Network
+Protocol Work Group will try to accommodate that request.</p>
+</div>
+<div class="section">
+<h1><a id="reclaiming-the-am-id-allocation" name="reclaiming-the-am-id-allocation">4. Reclaiming the AM ID Allocation</a></h1>
+<p>When the working group responsible for maintaining the protocol with
+an allocated AM ID obsoletes the protocol, the chair of the working
+group should send a deallocation request to the chair of the Network
+Protocol Working Group. The chair of the Network Protocol Working
+Group will document the deallocation.</p>
+</div>
+<div class="section">
+<h1><a id="documenting-allocations-and-deallocations" name="documenting-allocations-and-deallocations">5. Documenting allocations and deallocations</a></h1>
+<p>For each TinyOS 2.x release that introduces a new protocol or use of a
+new AM ID, the chair of the Network Protocol Working Group creates a
+new Informational TEP that lists all the AM ID allocations for that
+release. The TEP is finalized at the time of the release. <a class="citation-reference" href="#tep-135" id="id3" name="id3">[TEP_135]</a>
+documents the AM IDs allocated for TinyOS 2.1.</p>
+</div>
+<div class="section">
+<h1><a id="acknowledgments" name="acknowledgments">6. Acknowledgments</a></h1>
+<p>Thanks to the TinyOS community at large for helping to formulate this
+ID allocation policy.</p>
+</div>
+<div class="section">
+<h1><a id="author-s-address" name="author-s-address">7. Author's Address</a></h1>
+<div class="line-block">
+<div class="line">Omprakash Gnawali</div>
+<div class="line">Ronald Tutor Hall (RTH) 418</div>
+<div class="line">3710 S. McClintock Avenue</div>
+<div class="line">Los Angeles, CA 90089</div>
+<div class="line"><br /></div>
+<div class="line">phone - +1 213 821-5627</div>
+<div class="line">email - <a class="reference" href="mailto:gnawali&#64;usc.edu">gnawali&#64;usc.edu</a></div>
+</div>
+</div>
+<div class="section">
+<h1><a id="citations" name="citations">8. Citations</a></h1>
+<table class="docutils citation" frame="void" id="tep-1" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id1" name="tep-1">[TEP_1]</a></td><td>TEP 1: TEP Structure and Keywords</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep-116" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id2" name="tep-116">[TEP_116]</a></td><td>TEP 116: Packet Protocols</td></tr>
+</tbody>
+</table>
+<table class="docutils citation" frame="void" id="tep-135" rules="none">
+<colgroup><col class="label" /><col /></colgroup>
+<tbody valign="top">
+<tr><td class="label"><a class="fn-backref" href="#id3" name="tep-135">[TEP_135]</a></td><td>TEP 135: Active Message ID Allocation in TinyOS 2.1</td></tr>
+</tbody>
+</table>
+</div>
+</div>
+</body>
+</html>
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+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/TinyOS_Tutorials">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
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+</html>
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+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/Platforms">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
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+<!DOCTYPE doctype PUBLIC "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+  <title>Lesson 11: Simulation with TOSSIM</title>
+  <link href="../../stylesheets/tutorial.css" rel="stylesheet" type="text/css">
+</head>
+<body>
+
+<div class="title">Lesson 11: Simulation with TOSSIM</div>
+<div class="subtitle">Last Modified: 18 May 2006</div>
+
+      <p>This lesson introduces the TOSSIM simulator. You will become
+        familiar with how to compile TOSSIM and use some of its
+        functionality. You will learn how to:</p>
+
+      <p>
+        
+        <ul>
+          
+          <li>Compile TOSSIM.</li>
+          
+          <li>Configure a simulation in Python and C++.</li>
+            
+          <li>Inspect variables.</li>
+              
+          <li>Inject packets.</li>
+        </ul>
+      </p>
+
+
+<h1>Introduction</h1>
+
+        TOSSIM simulates entire TinyOS applications. It works by
+        replacing components with simulation implementations. The
+        level at which components are replaced is very flexible: for
+        example, there is a simulation implementation of millisecond
+        timers that replaces <code>HilTimerMilliC</code>, while there is also an
+        implementation for atmega128 platforms that replaces the HPL
+        components of the hardware clocks. The former is general and
+        can be used for any platform, but lacks the fidelity of
+        capturing an actual chips behavior, as the latter
+        does. Similarly, TOSSIM can replace a packet-level
+        communication component for packet-level simulation, or
+        replace a low-level radio chip component for a more precise
+        simulation of the code execution.
+
+        TOSSIM is a discrete event simulator. When it runs, it pulls
+        events of the event queue (sorted by time) and executes them.
+        Depending on the level of simulation, simulation events can
+        represent hardware interrupts or high-level system events
+        (such as packet reception). Additionally, tasks are simulation
+        events, so that posting a task causes it to run a short time
+        (e.g., a few microseconds) in the future.
+
+        TOSSIM is a library: you must write a program that configures
+        a simulation and runs it. TOSSIM supports two programming
+        interfaces, Python and C++. Python allows you to interact with
+        a running simulation dynamically, like a powerful
+        debugger. However, as the interpretation can be a performance
+        bottleneck when obtaining results, TOSSIM also has a C++
+        interface. Usually, transforming code from one to the other is
+        very simple.
+
+        TOSSIM currently does not support gathering power
+        measurements.
+
+        <h1>Compiling TOSSIM</h1>
+
+        <p>TOSSIM is a TinyOS library. Its core code lives in <code><a
+        href="../../../tos/lib/tossim">tos/lib/tossim</a></code>. Every TinyOS
+        source directory has an optional <code>sim</code> subdirectory,
+        which contains simulation implementations of that package. For
+        example, <code><a
+        href="../../../tos/chips/atm128/timersim">tos/chips/atm128/timer/sim</a></code>
+        contains TOSSIM implementations of some of the Atmega128 timer
+        abstractions.</p>
+
+        <p>To compile TOSSIM, you pass the <code>sim</code> option to make:</p>
+
+        <pre>
+          $ cd apps/Blink
+          $ make micaz sim
+        </pre>
+
+        
+        
+      <p>Currently, the only platform TOSSIM supports is the
+        micaz. You should see output similar to this:</p>
+      <pre>
+          mkdir -p build/micaz
+            placing object files in build/micaz
+            writing XML schema to app.xml
+            compiling BlinkAppC to object file sim.o 
+          ncc -c -fPIC -o build/micaz/sim.o -g -O0 -tossim -fnesc-nido-tosnodes=1000 -fnesc-simulate -fnesc-nido-motenumber=sim_node\(\)   -finline-limit=100000 -Wall -Wshadow -DDEF_TOS_AM_GROUP=0x7d -Wnesc-all -target=micaz -fnesc-cfile=build/micaz/app.c -board=micasb  -Wno-nesc-data-race BlinkAppC.nc   -fnesc-dump=components -fnesc-dump=variables -fnesc-dump=constants -fnesc-dump=typedefs -fnesc-dump=interfacedefs -fnesc-dump=tags -fnesc-dumpfile=app.xml
+            compiling Python support into pytossim.o and tossim.o
+          g++ -c -shared -fPIC -o build/micaz/pytossim.o -g -O0  /home/pal/src/tinyos-2.x/tos/lib/tossim/tossim_wrap.cxx -I/usr/include/python2.3 -I/home/pal/src/tinyos-2.x/tos/lib/tossim -DHAVE_CONFIG_H
+          g++ -c -shared -fPIC -o build/micaz/tossim.o -g -O0  /home/pal/src/tinyos-2.x/tos/lib/tossim/tossim.c -I/usr/include/python2.3 -I/home/pal/src/tinyos-2.x/tos/lib/tossim
+            linking into shared object ./_TOSSIMmodule.so
+          g++ -shared build/micaz/pytossim.o build/micaz/sim.o build/micaz/tossim.o -lstdc++ -o _TOSSIMmodule.so
+          copying Python script interface TOSSIM.py from lib/tossim to local directory
+      </pre>
+
+      <p>Depending on what OS you are using and what packages are installed, TOSSIM may
+	not properly compile on the first try. <A HREF="#appendix">Appendix A</A>
+	addresses some of the common causes and gives possible solutions.</p>
+
+      <A name="#compiling"></A>
+
+	
+        <p>Compiling TOSSIM has five basic steps. Let's go through
+        them one by one.</p>
+
+        <h2>Writing an XML schema</h2>
+
+        <pre>
+          writing XML schema to app.xml
+        </pre>
+
+        <p>The first thing the TOSSIM build process does is use
+        nesc-dump to produce an XML document that describes the
+        application. Among other things, this document descibes the
+        name and type of every variable.</p>
+
+        <h2>Compiling the TinyOS Application</h2>
+
+        <p>Besides introducing all of these new compilation steps, the
+        <code>sim</code> option changes the include paths of the
+        application. If the application has a series of includes</p>
+
+        <pre>
+          -Ia -Ib -Ic
+        </pre>
+
+        <p>Then the sim option transforms the list to</p>
+
+        <pre>
+          -Ia/sim -Ib/sim -Ic/sim -I%T/lib/tossim -Ia -Ib -Ic
+        </pre>
+          
+        <p>This means that any system-specific simulation
+        implementations will be used first, followed by generic TOSSIM
+        implementations, followed by standard implementations. The
+        <code>sim</code> option also passes a bunch of arguments to the
+        compiler, so it knows to compile for simulation.</p>
+
+        <p>The product of this step is an object file, <code>sim.o</code>,
+        which lives in the platform's build directory. This object
+        file has a set of C functions which configure the simulation
+        and control execution.</p>
+
+        <h2>Compiling the Programming Interface</h2>
+
+        <pre>
+            compiling Python support into pytossim.o and tossim.o
+          g++ -c -shared -fPIC -o build/micaz/pytossim.o -g -O0 \
+          /home/pal/src/tinyos-2.x/tos/lib/tossim/tossim_wrap.cxx \
+          -I/usr/include/python2.3 -I/home/pal/src/tinyos-2.x/tos/lib/tossim \
+          -DHAVE_CONFIG_H
+          g++ -c -shared -fPIC -o build/micaz/tossim.o -g -O0 \
+          /home/pal/src/tinyos-2.x/tos/lib/tossim/tossim.c \
+          -I/usr/include/python2.3 -I/home/pal/src/tinyos-2.x/tos/lib/tossim
+        </pre>
+        
+        <p>The next step compiles the support for the C++ and Python
+        programming interfaces. The Python interface is actually built
+        on top of the C++ interface. Calling a Python object calls a
+        C++ object, which then calls TOSSIM through the C
+        interface. <code>tossim.o</code> contains the C++ code, while
+        <code>pytossim.o</code> contains the Python support. These files
+        have to be compiled separately because C++ doesn't understand
+        nesC, and nesC doesn't understand C++.</p>
+
+        <h2>Building the shared object</h2>
+        
+        <pre>
+            linking into shared object ./_TOSSIMmodule.so
+          g++ -shared build/micaz/pytossim.o build/micaz/sim.o build/micaz/tossim.o -lstdc++ -o _TOSSIMmodule.so
+        </pre>
+
+        <p>The next to last step is to build a shared library that
+        contains the TOSSIM code, the C++ support, and the Python
+        support.</p>
+
+        <h2>Copying Python Support</h2>
+        
+        <pre>
+            copying Python script interface TOSSIM.py from lib/tossim to local directory
+        </pre>
+
+        <p>Finally, there is the Python code that calls into the
+        shared object. This code exists in <code>lib/tossim</code>, and
+        the make process copies it into the local directory.</p>
+
+        
+        <h1>Running TOSSIM with Python</h1>
+        
+        <p>Go into the <code>RadioCountToLeds</code> application and build
+          TOSSIM:</p>
+
+        <pre>
+$ cd tinyos-2.x/apps/RadioCountToLeds
+$ make micaz sim
+        </pre>
+
+        <p>We'll start with running a simulation in Python. You can either
+          write a script and just tell Python to run it, or you can
+          use Python interactively. We'll start with the latter. Fire
+          up your Python interpreter:</p>
+
+        <pre>
+$ python
+        </pre>
+
+        <p>You should see a prompt like this:</p>
+
+        <pre>
+Python 2.3.4 (#1, Nov  4 2004, 14:13:38)
+[GCC 3.4.2 20041017 (Red Hat 3.4.2-6.fc3)] on linux2
+Type "help", "copyright", "credits" or "license" for more information.
+>>>
+        </pre>
+
+        <p>The first thing we need to do is import TOSSIM and create a
+        TOSSIM object. Type</p>
+
+        <pre>
+>>> from TOSSIM import *
+>>> t = Tossim([])
+        </pre>
+        
+        <p>The square brackets are an optional argument that lets you
+        access variables in the simulation. We'll get to how to use
+        that later. In this case, we're telling TOSSIM that there are
+        no variables that we want to look at. The way you run a TOSSIM
+        simulation is with the <code>runNextEvent</code> function. For
+        example:</p>
+
+        <pre>
+>>> t.runNextEvent()
+0
+        </pre>
+
+        <p>When you tell TOSSIM to run the next event, it returns
+        0. This means that there was no next event to run. The reason
+        is simple: we haven't told any nodes to boot. This snippet of
+        code will tell mote 32 to boot at time 45654 and run its first
+        event (booting):</p>
+
+        <pre>
+>>> m = t.getNode(32);
+>>> m.bootAtTime(45654);
+>>> t.runNextEVent()
+1
+        </pre>
+
+      <p>Instead of using raw simulation ticks, you can also use the
+      call <code>ticksPerSecond()</code>. However, you want to be careful
+      to add some random bits into this number: having every node
+      perfectly synchronized and only different in phase in terms of
+          seconds can lead to strange results.</p>
+
+      <pre>
+>>> m = t.getNode(32);
+>>> m.bootAtTime(4 * t.ticksPerSecond() + 242119);
+>>> t.runNextEVent()
+1
+      </pre>
+
+        <p>Now, <code>runNextEvent</code> returns 1, because there was an
+        event to run. But we have no way of knowing whether the node
+        has booted or not. We can find this out in one of two ways.
+        The first is that we can just ask it:</p>
+
+        <pre>
+>>> m.isOn()
+1
+>>> m.turnOff()
+>>> m.isOn()
+0
+>>> m.bootAtTime(560000)
+>>> t.runNextEvent()
+0
+>>> t.runNextEvent()
+1
+        </pre>        
+
+        <p>Note that the first <code>runNextEvent</code> returned 0. This
+        is because when we turned the mote off, there was still an
+        event in the queue, for its next timer tick. However, since
+        the mote was off when the event was handled in that call,
+        <code>runNextEvent</code> returned 0. The second call to
+        <code>runNextEvent</code> returned 1 for the second boot event, at
+        time 560000.</p>
+
+
+        <p>A Tossim object has several useful functions. In Python,
+        you can generally see the signature of an object with the
+        <code>dir</code> function. E.g.:</p>
+
+        <pre>
+>>> t = Tossim([])
+>>> dir(t)
+['__class__', '__del__', '__delattr__', '__dict__', '__doc__', '__getattr__',
+'__getattribute__', '__hash__', '__init__', '__module__', '__new__',
+'__reduce__', '__reduce_ex__', '__repr__', '__setattr__', '__str__',
+'__swig_getmethods__', '__swig_setmethods__', '__weakref__', 'addChannel',
+'currentNode', 'getNode', 'init', 'mac', 'newPacket', 'radio', 'removeChannel',
+'runNextEvent', 'setCurrentNode', 'setTime', 'this', 'thisown', 'time', 'timeStr']
+        </pre>
+
+        <p>The most common utility functions are:</p>
+
+        <ul>
+          <li><b><code>currentNode()</code></b>: returns the ID of the current node.</li>
+          <li><b><code>getNode(id)</code></b>: returns an object representing a specific mote</li>
+          <li><b><code>runNextEvent()</code></b>: run a simulation event</li>
+          <li><b><code>time()</code></b>: return the current time in simulation ticks as a large integer </li>
+          <li><b><code>timeStr()</code></b>: return a string representation of the current time</li>
+          <li><b><code>init()</code></b>: initialize TOSSIM</li>
+          <li><b><code>mac()</code></b>: return the object representing the media access layer</li>
+          <li><b><code>radio()</code></b>: return the object representing the radio model</li>
+          <li><b><code>addChannel(ch, output)</code></b>: add <i>output</i> as an output to channel <i>ch</i> </li>
+          <li><b><code>removeChannel(ch, output)</code></b>: remove <i>output</i> as an output to channel <i>ch</i> </li>
+          <li><b><code>ticksPerSecond()</code></b>: return how many simulation ticks there are in a simulated second </li>
+        </ul>
+
+        <p>The next section discusses the last two.</p>
+
+          <h1>Debugging Statements</h1>
+        
+        <p>The second approach to know whether a node is on is to tell
+        it to print something out when it boots. TOSSIM has a
+        debugging output system, called <code>dbg</code>. There are four
+        <code>dbg</code> calls:</p>
+
+          <ul>
+            <li><code>dbg</code>: print a debugging statement preceded by the node ID.</li>
+            <li><code>dbg_clear</code>: print a debugging statement which is not preceded by the node ID. This allows you to easily print out complex data types, such as packets, without interspersing node IDs through the output.</li>
+            <li><code>dbgerror</code>: print an error statement preceded by the node ID</li>
+            <li><code>dbgerror_clear</code>: print an error statement which is not preceded by the node ID</li>
+          </ul>
+
+          
+        <p>Go into <code>RadioCountToLedsC</code> and modify the <code>Boot.booted</code> event
+          to print out a debug message when it boots, such as this:</p>
+
+        <pre>
+event void Boot.booted() {
+  call Leds.led0On();
+  dbg("Boot", "Application booted.\n");
+  call AMControl.start();
+}
+        </pre>
+
+        <p>Calls to the debugging calls take two or more
+        parameters. The first parameter ("Boot" in the above example)
+        defines the output <i>channel</i>. An output channel is simply
+        a string. The second and subsequent parameters are the message
+        to output. They are identical to a printf statement. For example
+          <code>RadioCountToLedsC</code> has this call:
+
+        <pre>
+event message_t* Receive.receive(message_t* bufPtr, void* payload, uint8_t len) {
+  dbg("RadioCountToLedsC", "Received packet of length %hhu.\n", len);
+  ...
+}
+        </pre>
+
+        which prints out the length of received packet as an 8-bit unsigned value (%hhu).</p>
+
+        <p>Once you have added the debugging statement to the event,
+        recompile the application with <code>make micaz sim</code> and
+        start up your Python interpreter. Load the TOSSIM module and
+        schedule a mote to boot as before:</p>
+        
+        <pre>
+>>> from TOSSIM import *
+>>> t = Tossim([])
+>>> m = t.getNode(32);
+>>> m.bootAtTime(45654);
+        </pre>
+
+        <p>This time, however, we want to see the debugging message
+        that the mote has booted. TOSSIM's debugging output can be
+        configured on a per-channel basis. So, for example, you can
+        tell TOSSIM to send the "Boot" channel to standard output, but
+        another channel, say "AM", to a file. 
+        By default, a channel has no destination, and so
+        messages to it are discarded.</p>
+
+        <p>In this case, we want to send the Boot channel to standard
+        output. To do this, we need to import the <code>sys</code> Python
+        package, which lets us refer to standard out. We can then tell
+        TOSSIM to send Boot messages to this destination:
+          
+        <pre>
+>>> import sys
+>>> t.addChannel("Boot", sys.stdout);
+1
+        </pre>
+
+          The return value shows that the channel was added successfully. Run the first
+          simulation event, and the mote boots:
+
+        <pre>
+>>> t.runNextEvent()
+DEBUG (32): Application booted.
+1
+        </pre>          </p>
+
+        <p>The only difference between debug and error functions is
+        the string output at the beginning of a message. Debug
+        statements print <code>DEBUG (n)</code>, while error statements
+        print <code>ERROR (n)</code>.</p>
+
+        <p>A debugging statement can have multiple output
+          channels. Each channel name is delimited by commas:
+
+          <pre>
+event void Boot.booted() {
+  call Leds.led0On();
+  dbg("Boot,RadioCountToLedsC", "Application booted.\n");
+  call AMControl.start();
+}
+          </pre>
+
+          If a statement has multiple channels and those channels
+          share outputs, then TOSSIM only prints the message once. For
+          example, if both the Boot channel and RadioCountToLedsC
+          channel were connected to standard out, TOSSIM will only
+          print one message. For example, this series of debug statements
+
+          
+          <pre>
+event void Boot.booted() {
+  call Leds.led0On();
+  dbg("Boot,RadioCountToLedsC", "Application booted.\n");
+  dbg("RadioCountToLedsC", "Application booted again.\n");
+  dbg("Boot", "Application booted a third time.\n");
+  call AMControl.start();
+}
+          </pre>
+
+          when configured so
+
+          <pre>
+>>> import sys
+>>> t.addChannel("Boot", sys.stdout)
+>>> t.addChannel("RadioCountToLedsC", sys.stdout)
+          </pre>
+
+          will print out this:
+
+          <pre>
+DEBUG (32): Application booted.
+DEBUG (32): Application booted again.
+DEBUG (32): Application booted a third time.
+          </pre></p>
+
+
+        <p>A channel can have multiple outputs. For example, this
+        script will tell TOSSIM to write <code>RadioCountToLedsC</code> messages to
+        standard output, but to write <code>Boot</code> messages to both standard
+        output and a file named <code>log.txt</code>:
+
+          <pre>
+>>> import sys
+>>> f = open("log.txt", "w")
+>>> t.addChannel("Boot", f)
+>>> t.addChannel("Boot", sys.stdout)
+>>> t.addChannel("RadioCountToLedsC", sys.stdout)
+          </pre>
+        </p>
+
+        <h1>Configuring a Network</h1>
+
+        <p>When you start TOSSIM, no node can communicate with any
+        other.  In order to be able to simulate network behavior, you
+        have to specify a <i>network topology</i>. Internally, TOSSIM
+        is structured so that you can easily change the underlying
+        radio simulation, but that's beyond the scope of this
+        tutorial. The default TOSSIM radio model is signal-strength
+        based. You provide a graph to the simulator that describes the
+        propagation strengths. You also specify noise floor, and
+        receiver sensitivity. There are some very early results that
+        describe current sensor platforms (e.g., the mica2) in these
+        terms. Because all of this is through a scripting interface,
+        rather than provide a specific radio model, TOSSIM tries to
+        provide a few low-level primitives that can express a wide
+        range of radios and behavior.</p>
+
+        <p>You control the radio simulation through a Python Radio
+        object:</p>
+
+        
+        <pre>
+>>> from TOSSIM import *
+>>> t = Tossim([])
+>>> r = t.radio()
+>>> dir(r)
+['__class__', '__del__', '__delattr__', '__dict__', '__doc__',
+'__getattr__', '__getattribute__', '__hash__', '__init__',
+'__module__', '__new__', '__reduce__', '__reduce_ex__',
+'__repr__', '__setattr__', '__str__', '__swig_getmethods__',
+'__swig_setmethods__', '__weakref__', 'add', 'connected',
+'gain', 'remove', 'setNoise', 'this', 'thisown',
+<class 'TOSSIM.RadioPtr'>]
+        </pre>          
+
+        <p>The first set of methods (with the double underscores) are
+        ones that you usually don't call. The important ones are at
+        the end. They are:</p>
+
+        <ul>
+          <li><b><code>add(src, dest, gain)</code></b>: Add a link from <i>src</i>
+          to <i>dest</i> with <i>gain</i>. When <i>src</i> transmits, <i>dest</i>
+          will receive a packet attenuated by the <i>gain</i> value.</li>
+
+          <li><b><code>connected(src, dest)</code></b>: Return whether there is a
+          link from <i>src</i> to <i>dest</i>.</li>
+
+
+          <li><b><code>gain(src, dest)</code></b>: Return the gain value of the
+          link from <i>src</i> to <i>dest</i>.</li>
+          
+          <li><b><code>remove(src, dest)</code></b>: Remove the link from
+          <i>src</i> to <i>dest</i>.</li>
+
+
+          <li><b><code>setNoise(node, mean, variance)</code></b>: Set the noise
+          floor at <i>node</i> to be a gaussian distribution with
+          <i>mean</i> and <i>variance</i>.</li>
+
+          <li><b><code>sensitivity()</code></b>: Return the receive sensitivity of
+            the nodes.</li>
+
+          <li><b><code>setSensitivity(val)</code></b>: Set the receive sensitivity
+          of nodes to be <i>val</i>. The sensitivity is how much
+          stronger a signal must be for it to be received
+          uncorrupted. E.g., a sensitivity of 3.0 (the default value)
+          means that a packet must be 3dBm greater than the sum of
+          noise and concurrent transmissions for it to be received
+          uncorrupted.</li>
+
+          <li><b><code>threshold()</code></b>: Return the CCA threshold.</li>
+
+          <li><b><code>setThreshold(val)</code></b>: Set the CCA threshold value in
+            dBm.The default is -95.</li>
+          
+        </ul>
+
+        <p>The Radio object only deals with physical layer
+        propagation. The MAC object deals with the data link layer,
+        packet lengths, and radio bandwidth. The default TOSSIM MAC
+        object is for a CSMA protocol. You get a reference to the MAC
+        object by calling <code>mac()</code> on a Tossim object:
+          <pre>
+>>> mac = t.mac()
+          </pre>
+
+          The default MAC object has a large number of functions, for
+          controlling backoff behavior, packet preamble length, radio
+          bandwidth, etc. All time values are specified in terms of
+          radio symbols, and you can configure the number of symbols
+          per second and bits per symbol. By default, the MAC object
+          is configured to act like the standard TinyOS 2.0 CC2420
+          stack: it has 4 bits per symbol and 64k symbols per second,
+          for 256kbps. This is a subset of the MAC functions that
+          could be useful for changing backoff behavior. Every
+          accessor function has a corresponding set function that
+          takes an integer as a parameter. E.g., there's <code>int
+          initHigh()</code> and <code>void setInitHigh(int val)</code>. The
+          default value for each parameter is shown italicized in
+          parentheses.  </p>
+
+        <ul>
+          <li><b>initHigh</b>: The upper bound of the initial backoff range. <i>(400)</i></li>
+          <li><b>initLow</b>: The lower bound of the initial backoff range. <i>(20)</i></li>
+          <li><b>high</b>: The upper bound of the backoff range. This is multiplied by the
+          exponent base to the nth power, where n is the number of previous backoffs. So if the
+          node had its initial backoff, then the upper bound is high * base, while if it
+          is after the second backoff then the upper bound is high * base * base. <i>(160)</i></li>
+          <li><b>low</b>: The lower bound of the backoff range. This is multiplied by the
+          exponent base to the nth power, where n is the number of previous backoffs. So if the
+          node had its initial backoff, then the upper bound is low * base, while if it
+          is after the second backoff then the upper bound is low * base * base. <i>(20)</i></li>
+          <li><b>symbolsPerSec</b>: The number of symbols per second that the radio can
+          transmit. <i>(65536)</i></li>
+          <li><b>bitsPerSymbol</b>: The number of bits per radio symbol. Multiplying this by
+          the symbols per second gives the radio bandwidth. <i>(4)</i></li>
+          <li><b>preambleLength</b>: How long a packet preamble is. This is added to the duration
+          of transmission for every packet. <i>(12)</i></li>
+          <li><b>exponentBase</b>: The base of the exponent used to calculate backoff. Setting it to
+          2 provides binary exponential backoff. <i>(0)</i>.</li>
+          <li><b>maxIterations</b>: The maximum number of times the radio will back off before
+          signaling failure, zero signifies forever. <i>(0)</i>.</li>
+          <li><b>minFreeSamples</b>: The number of times the radio must detect a clear channel
+          before it will transmit. This is important for protocols like 802.15.4, whose synchonrous
+          acknowledgments requires that this be greater than 1 (you could have sampled in the dead time
+          when the radios are changing between RX and TX mode). <i>(2)</i></li>
+          <li><b>rxtxDelay</b>: The time it takes to change the radio from RX to TX mode (or vice versa).<i>(32)</i></li>
+          <li><b>ackTime</b>: The time it takes to transmit a synchonrous acknowledgment, not including the
+          requisite RX/TX transition.<i>(34)</i></li>
+        </ul>
+
+        <p>Any and all of these configuration constants can be changed
+        at compile time with #define directives. Look at
+        <code>tos/lib/tossim/sim_csma.h</code>.</p>
+
+        <p>Because the radio connectivity graph can be scripted, you
+        can easily store topologies in files and then load the
+        file. Alternatively, you can store a topology as a script.
+        For example, this script will load a file which specifies each
+          link in the graph as a line with three values, the source, the
+          destination, and the gain, e.g.:
+
+          <pre>
+1  2 -54.0
+          </pre>
+
+          means that when 1 transmits 2 hears it at -54 dBm. Create a file <code>topo.txt</code>
+          that looks like this:</p>
+
+        <pre>
+1  2 -54.0
+2  1 -55.0
+1  3 -60.0
+3  1 -60.0
+2  3 -64.0
+3  2 -64.0
+        </pre>
+
+        <p>This script will read such a file:
+
+          <pre>
+>>> f = open("topo.txt", "r")
+>>> lines = f.readlines()
+>>> for line in lines:
+...   s = line.split()
+...   if (len(s) > 0):
+...     print " ", s[0], " ", s[1], " ", s[2];
+...     r.add(int(s[0]), int(s[1]), float(s[2]))
+          </pre></p>
+        
+        
+        <p>Now, when a node transmits a packet, other nodes will hear it.
+        This is a complete script for simulating packet transmission with
+          RadioCountToLedsC. Save it as a file <code>test.py</code>:</p>
+        <pre>
+from TOSSIM import *
+import sys
+
+t = Tossim([])
+r = t.radio()
+f = open("topo.txt", "r")
+
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    print " ", s[0], " ", s[1], " ", s[2];
+    r.add(int(s[0]), int(s[1]), float(s[2]))
+
+t.addChannel("RadioCountToLedsC", sys.stdout)
+t.addChannel("Boot", sys.stdout)
+
+t.getNode(1).bootAtTime(100001);
+t.getNode(2).bootAtTime(800008);
+t.getNode(3).bootAtTime(1800009);
+
+r.setNoise(1, -100.0, 5.0)
+r.setNoise(2, -100.0, 5.0)
+r.setNoise(3, -100.0, 5.0)
+
+for i in range(0, 100):
+  t.runNextEvent()
+        </pre>          
+
+        <p>Run it by typing <code>python test.py</code>. You should see
+          output that looks like this:</p>
+
+        <pre>
+1  2 -54.0
+2  1 -55.0
+1  3 -60.0
+3  1 -60.0
+2  3 -64.0
+3  2 -64.0
+DEBUG (1): Application booted.
+DEBUG (1): Application booted again.
+DEBUG (1): Application booted a third time.
+DEBUG (2): Application booted.
+DEBUG (2): Application booted again.
+DEBUG (2): Application booted a third time.
+DEBUG (3): Application booted.
+DEBUG (3): Application booted again.
+DEBUG (3): Application booted a third time.
+DEBUG (1): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (1): RadioCountToLedsC: packet sent.
+DEBUG (2): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (2): RadioCountToLedsC: packet sent.
+DEBUG (3): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (3): RadioCountToLedsC: packet sent.
+DEBUG (1): Received packet of length 2.
+DEBUG (3): Received packet of length 2.
+DEBUG (2): Received packet of length 2.
+DEBUG (1): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (1): RadioCountToLedsC: packet sent.
+DEBUG (2): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (2): RadioCountToLedsC: packet sent.
+DEBUG (3): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (3): RadioCountToLedsC: packet sent.
+DEBUG (1): Received packet of length 2.
+        </pre>
+
+        <p>If you set the noise to be 30 plus or minus 5 dBm instead
+        of 80 plus or minus 5 dBm, then nodes will never transmit, as
+        the default CCA threshold is -95 dBm. You'll see something
+        like this:</p>
+             <pre>
+1  2 -54.0
+2  1 -55.0
+1  3 -60.0
+3  1 -60.0
+2  3 -64.0
+3  2 -64.0
+DEBUG (1): Application booted.
+DEBUG (1): Application booted again.
+DEBUG (1): Application booted a third time.
+DEBUG (2): Application booted.
+DEBUG (2): Application booted again.
+DEBUG (2): Application booted a third time.
+DEBUG (3): Application booted.
+DEBUG (3): Application booted again.
+DEBUG (3): Application booted a third time.
+DEBUG (1): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (1): RadioCountToLedsC: packet sent.
+DEBUG (2): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (2): RadioCountToLedsC: packet sent.
+DEBUG (3): RadioCountToLedsC: timer fired, counter is 1.
+DEBUG (3): RadioCountToLedsC: packet sent.
+DEBUG (1): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (2): RadioCountToLedsC: timer fired, counter is 2.
+DEBUG (3): RadioCountToLedsC: timer fired, counter is 2.
+        </pre>
+
+        <p>Because the nodes backoff perpetually, they never transmit
+        the packet and so subsequent attempts to send fail. Although
+        it only takes a few simulation events to reach the first timer
+        firings, it takes many simulation events (approximately 4000)
+        to reach the second timer firings. This is because the nodes
+        have MAC backoff events. If you want to simulate in terms of
+        time, rather than events, you can always do something like
+        this, which simulates 5 seconds from the first node boot:</p>
+
+        <pre>
+t.runNextEvent();
+time = t.time()
+while (time + 50000000000 > t.time()):
+  t.runNextEvent()
+</pre>
+
+        <p>TOSSIM allows you to specify a network topology in terms of
+        gain. However, this raises the problem of coming up with a
+        topology. There are two approaches you can take. The first is
+        to take data from a real world network and input this into
+        TOSSIM. The second is to generate it from applying a
+        theoretical propagation model to a physical layout.  The standard
+        file format is
+
+          <pre>
+noise n avg std
+gain src dest g
+          </pre>
+
+          where each statement is on a separate line. The <i>noise</i>
+          statement defines the noise observed at node <i>n</i> with
+          an average of <i>avg</i> and a standard deviation of
+          <i>std</i>.  The <i>gain</i> statement defines a propagation
+          gain <i>g</i> when <i>src</i> transmits to <i>dest</i>. This
+          is a snippet of python code that will parse this file
+          format:
+
+          <pre>
+f = open("mirage-1.txt", "r")
+
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain"):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+    elif (s[0] == "noise"):
+      r.setNoise(int(s[1]), float(s[2]), float(s[3]))
+          </pre></p>
+
+        <p>TOSSIM has a tool for the second option of generating a
+        network topology using a theoretical propagation model. The
+        tool is written in Java and is
+        <code>net.tinyos.sim.PropagationModel</code>. The tool takes a
+        single command line parameter, the name of a configuration
+        file, e.g.:</p>
+
+        <pre>
+java net.tinyos.sim.PropagationModel config.txt
+        </pre>
+
+        <p>The format of a configuration file is beyond the scope of
+        this document: the tool has its own <A
+        HREF="usc-topologies.html">documentation</A>. TOSSIM has two sample configuration
+        files generated from the tool in
+        <code>tos/lib/tossim/topologies</code>. The first is <code><A
+        HREF="">grid.txt</A></code>, which is a 10x10 grid of nodes
+        spaced roughly 40 feet apart. Each node is placed randomly
+        within a 40'x40' "cell." The cells follow a strict grid. The
+        second file is <code><A HREF="">scatter.txt</A></code>, which is
+        100 nodes scattered randomly (with a uniform distribution)
+        over a 360'x360' area. Note that the tool uses random numbers,
+        these configuration files can generate multiple different
+        network topologies. Network topology files generated from the
+        tool follow the same format as <code>mirage-1.txt</code>.</p>
+
+        <h1>Variables</h1>
+
+        <p>TOSSIM allows you to inspect variables in a running TinyOS
+        program. Currently, you can only inspect basic types. For
+        example, you can't look at fields of structs, but you can look
+        at state variables.</p>
+
+        <p>When you compile TOSSIM, the make system generates a large
+        XML file that contains a lot of information about the TinyOS
+        program, including every component variable and its type. If
+        you want to examine the state of your program, then you need
+        to give TOSSIM this information so it can parse all of the
+        variables properly. You do this by instantiating a Python
+        object that parses the XML file to extract all of the relevant
+        information. You have to import the Python support package for
+        TOSSIM to do this:</p>
+
+        <pre>
+from tinyos.tossim.TossimApp import *
+
+n = NescApp()
+        </pre>
+
+        <p>Instantiating a <code>NescApp</code> can take quite a while:
+        Python has to parse through megabytes of XML. So be patient
+        (you only have to do it once). NescApp has two optional
+        arguments. The first is the name of the application being
+        loaded. The second is the XML file to load. The default for
+        the latter is <code>app.xml</code>, which is the name of the file
+        that the make system generates. The default for the former is
+        "Unknown App."  So this code behaves identically to that
+        above:</p>
+
+        <pre>
+from tinyos.tossim.TossimApp import *
+
+n = NescApp("Unknown App", "app.xml")
+        </pre>
+
+        <p>You fetch a list of variables from a NescApp object by
+        calling the function <code>variables</code> on the field
+        <code>variables</code>:</p>
+
+        <pre>
+vars = n.variables.variables()
+        </pre>
+
+        <p>To enable variable inspection, you pass this list to a
+        Tossim object when you instantiate it:</p>
+
+        <pre>
+t = Tossim(vars)
+        </pre>
+
+        <p>The TOSSIM object now knows the names, sizes, and types of
+        all of the variables in the TinyOS application. This
+        information allows the TOSSIM support code to take C variables
+        and properly tranform them into Python variables. This
+        currently only works for simple types: if a component declares
+        a structure, you can't access its fields. But let's say we
+        want to read the counter in <code>RadioCountToLedsC</code>. Since each mote
+        in the network has its own instance of the variable, we need
+        to fetch it from a specific mote:</p>
+
+        <pre>
+m = t.getNode(0)
+v = m.getVariable("RadioCountToLedsC.counter")
+        </pre>
+
+        <p>The name of a variable is usually <i>C.V</i>, where
+        <i>C</i> is the component name and <i>V</i> is the variable.
+        In the case of generic components, the name is <i>C.N.V</i>,
+        where <i>N</i> is an integer that describes which instance.
+        Unfortunately, there is currently no easy way to know what
+        <i>N</i> is from nesC source, so you have to root through
+        <code>app.c</code> in order to know.</p>
+
+        <p>Once you have a variable object (<code>v</code> in the above
+        code), you can fetch its value with the <code>getData()</code>
+        function:</p>
+
+        <pre>
+counter = v.getData()
+        </pre>
+
+        <p>Because <code>getData()</code> transforms the underlying C type
+        into a Python type, you can then use its return value in
+        Python expressions. For example, this script will start a
+        simulation of five nodes and run it until node 0's counter
+        reaches 10:</p>
+
+        <pre>
+from sys import *
+from random import *
+from TOSSIM import *
+from tinyos.tossim.TossimApp import *
+
+n = NescApp()
+t = Tossim(n.variables.variables())
+r = t.radio()
+
+f = open("topo.txt", "r")
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain"):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+    elif (s[0] == "noise"):
+      r.setNoise(int(s[1]), float(s[2]), float(s[3]))
+
+for i in range (0, 4):
+  m = t.getNode(i)
+  m.bootAtTime(randint(1000, 2000) * 1000000)
+
+m = t.getNode(0)
+v = m.getVariable("RadioCountToLedsC.counter")
+
+while (v.getData() < 10):
+  t.runNextEvent()
+
+        </pre>
+
+      <p>The TOSSIM <A
+      HREF="../../../tos/lib/tossim/examples">examples</A>
+      subdirectory also has an example script, named
+      <code>variables.py</code>.</p>
+
+      <h1>Injecting Packets</h1>
+
+      <p>TOSSIM allows you to dynamically inject packets into a
+      network.  Packets can be scheduled to arrive at any time. If a
+      packet is scheduled to arrive in the past, then it arrives
+      immediately. Injected packets circumvent the radio stack: it is
+      possible for a node to receive an injected packet while it is in
+      the midst of receiving a packet from another node over its
+      radio.</p>
+
+      <p>TinyOS 2.0 has support for building Python packet objects.
+      Just like the standard Java toolchain, you can build a packet
+      class based on a C structure. The packet class gives you a full
+      set of packet field mutators and accessors. If an application
+      has a packet format, you can generate a packet class for it,
+      instantiate packet objects, set their fields, and have nodes
+      receive them.</p>
+
+      <p>The <code>RadioCountToLeds</code> application Makefile has an
+      example of how to do this. First, it adds the Python class as a
+      dependency for building the application. Whenever you compile
+      the app, if the Python class doesn't exist, make will build it
+      for you:</p>
+
+      <pre>
+BUILD_EXTRA_DEPS = RadioCountMsg.py RadioCountMsg.class
+      </pre>
+
+      <p>The Makefile also tells make how to generate RadioCountMsg.py:</p>
+
+      <pre>
+RadioCountMsg.py: RadioCountToLeds.h
+        mig python -target=$(PLATFORM) $(CFLAGS) -python-classname=RadioCountMsg RadioCountToLeds.h RadioCountMsg -o $@
+      </pre>
+
+      <p>The rule says to generate RadioCountMsg.py by calling mig
+      with the python parameter.  The Makefile also has rules on how
+      to build Java class, but that's not important for TOSSIM. Since
+      we've been using RadioCountToLeds so far, the Python class
+      should be there already.</p>
+
+      <p>RadioCountMsg.py defines a packet format, but this packet is
+      contained in the data payload of another format. If a node is
+      sending a <code>RadioCountMsg</code> over AM, then the <code>RadioCountMsg</code>
+      structure is put into the AM payload, and might look something
+      like this:</p>
+
+      <center>
+        <table BORDER=1>
+          <TR>
+            <TD WIDTH=100 BGCOLOR="#ffa0a0">AM Header</TD>
+            <TD WIDTH=100 BGCOLOR="white">RadioCountMsg</TD>
+            <TD WIDTH=100 BGCOLOR="#ffa0a0">AM Footer</TD>
+          </TR>
+        </table>
+      </center>
+      
+      <p>If it is sending it over a routing protocol. the packet is
+      put in the routing payload, and might look something like this:</p>
+
+      <center>
+        <table BORDER=1>
+          <TR>
+            <TD WIDTH=100 BGCOLOR="#ffa0a0">AM Header</TD>
+            <TD WIDTH=100 BGCOLOR="#00a0ff">Routing Header</TD>
+            <TD WIDTH=100 BGCOLOR="white">RadioCountMsg</TD>
+            <TD WIDTH=100 BGCOLOR="#ffa0a0">AM Footer</TD>
+          </TR>
+        </table>
+      </center>
+
+      <p>If you want to send a <code>RadioCountMsg</code> to a node, then you need
+      to decide how to deliver it. In the simple AM case, you place
+      the <code>RadioCountMsg</code> structure in a basic AM packet. In the routing
+      case, you put it in a routing packet, which you then put inside
+      an AM packet. We'll only deal with the simple AM case here.</p>
+
+      <p>To get an AM packet which you can inject into TOSSIM, you
+      call the <code>newPacket</code> function on a Tossim object. The
+      returned object has the standard expected AM fields:
+      <i>destination</i>, <i>length</i>, <i>type</i>, and <i>data</i>,
+      as well as <i>strength</i>.</p>
+
+      <p>To include support for a packet format, you must import
+      it. For example, to include <code>RadioCountMsg</code>, you have to import
+      it:</p>
+
+      <pre>
+from RadioCountMsg import *
+      </pre>
+      
+      <p>This snippet of code, for example, creates a <code>RadioCountMsg</code>,
+      sets its counter to 7, creates an AM packet, stores the
+      <code>RadioCountMsg</code> in the AM packet, and configures the AM packet so
+      it will be received properly (destination and type):</p>
+
+      <pre>
+from RadioCountMsg import *
+
+msg = RadioCountMsg()
+msg.set_counter(7);
+pkt = t.newPacket();
+pkt.setData(msg.data)
+pkt.setType(msg.get_amType())
+pkt.setDestination(0)
+      </pre>
+
+
+      <p>The variable <code>pkt</code> is now an Active Message of the AM
+      type of <code>RadioCountMsg</code> with a destination of 0 that contains a
+      <code>RadioCountMsg</code> with a counter of 7. You can deliver this packet
+      to a node with the <code>deliver</code> function. The
+      <code>deliver</code> function takes two parameters, the destination
+      node and the time to deliver:</p>
+
+      <pre>
+pkt.deliver(0, t.time() + 3)
+      </pre>
+
+      <p>This call delivers pkt to node 0 at the current simulation
+      time plus 3 ticks (e.g., 3ns). There is also a
+      <code>deliverNow</code>, which has no time parameter. Note that if
+      the destination of <code>pkt</code> had been set to 1, then the
+      TinyOS application would not receive the packet, as it was
+      delivered to node 0.</p>
+
+      <p>Taken all together, the following script starts a simulation,
+      configures the topology based on topo.txt, and delivers a packet
+      to node 0. It can also be found as <code>packets.py</code> in the TOSSIM <A
+      HREF="../../../tos/lib/tossim/examples/">examples</A>
+      subdirectory.
+
+      <pre>
+import sys
+from TOSSIM import *
+from RadioCountMsg import *
+
+t = Tossim([])
+m = t.mac();
+r = t.radio();
+
+t.addChannel("RadioCountToLedsC", sys.stdout);
+t.addChannel("LedsC", sys.stdout);
+
+for i in range(0, 2):
+  m = t.getNode(i);
+  m.bootAtTime((31 + t.ticksPerSecond() / 10) * i + 1);
+  
+f = open("topo.txt", "r")
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain"):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+    elif (s[0] == "noise"):
+      r.setNoise(int(s[1]), float(s[2]), float(s[3]))
+
+for i in range(0, 60):
+  t.runNextEvent();
+
+msg = RadioCountMsg()
+msg.set_counter(7);
+pkt = t.newPacket();
+pkt.setData(msg.data)
+pkt.setType(msg.get_amType())
+pkt.setDestination(0)
+
+print "Delivering " + msg.__str__() + " to 0 at " + str(t.time() + 3);
+pkt.deliver(0, t.time() + 3)
+
+
+for i in range(0, 20):
+  t.runNextEvent();
+      </pre>
+
+      
+      <h1>C++</h1>
+
+      <p>Python is very useful because it is succinct, easy to write,
+      and can be used interactively. Interpretation, however, has a
+      significant cost: a Python/C transition on every event is a
+      significant cost (around 100%, so it runs at half the
+      speed). Additionally, it's often useful to step through code
+      with a standard debugger. TOSSIM also has support for C++, so
+      that it can be useful in these circumstances.  Because many of
+      the Python interfaces are merely wrappers around C++ objects,
+      much of the scripting stays the same. The two major exceptions
+      are inspecting variables and injecting packets.</p>
+
+      <p>In a C++ TOSSIM, there is no variable inspection. While it is
+      possible to request memory regions and cast them to the expected
+      structures, currently there is no good and simple way to do
+      so. The Python support goes through several steps in order to
+      convert variables into Python types, and this gets in the way of
+      C++. However, as the purpose of C++ is usually to run high
+      performance simulations (in which inspecting variables is a big
+      cost) or debugging (when you have a debugger), this generally
+      isn't a big problem.</p>
+
+      <p>There is a C++ <code>Packet</code> class, which the Python
+      version is a simple wrapper around. In order to inject packets
+      in C++, however, you must build C support for a packet type and
+      manually build the packet. There currently is no support in mig
+      with which to generate C/C++ packet structures, and since most
+      packets are nx_struct types, they cannot be parsed by
+      C/C++. Furthermore, as many of the fields are nx types, they are
+      big endian, while x86 processors are little endian. Still, if you
+      want to deliver a packet through C++, you can do so.</p>
+
+      <p>Usually, the C++ and Python versions of a program look pretty
+      similar. For example:</p>
+
+      <table WIDTH=800>
+
+        <TR><TD WIDTH=400><TD WIDTH=400></TR>
+        <TR><TD ALIGN=CENTER><b>Python</b></TD><TD ALIGN=CENTER><b>C++</b></TD></TR>
+        <TR>
+          <TD VALIGN=TOP>
+            <PRE>
+import TOSSIM
+import sys
+
+from RadioCountMsg import *
+
+t = TOSSIM.Tossim([])
+r = t.radio();
+
+for i in range(0, 999):
+  m = t.getNode(i);
+  m.bootAtTime(5000003 * i + 1);
+  r.setNoise(i, -99.0, 3.0);
+  for j in range (0, 2):
+    if (j != i):
+      r.add(i, j, -50.0);
+
+
+
+
+for i in range(0, 1000000):
+  t.runNextEvent();
+           </PRE>
+          </TD>
+          <TD VALIGN=TOP>
+            <PRE>
+#include &lt;tossim.h&gt;
+
+
+
+int main() {
+  Tossim* t = new Tossim(NULL);
+  Radio* r = t->radio();
+
+  for (int i = 0; i &lt; 999; i++) {
+    Mote* m = t->getNode(i);
+    m->bootAtTime(5000003 * i + 1);
+    r->setNoise(i, -99.0, 3);
+    for (int j = 0; j &lt; 2; j++) {
+      if (i != j) {
+        r->add(i, j, -50.0);
+      }
+    }
+  }
+
+  for (int i = 0; i &lt; 1000000; i++) {
+    t->runNextEvent();
+  }
+}
+            </PRE>
+          </TD>
+        </TR>
+      </TABLE>
+
+      <p>To compile a C++ TOSSIM, you have to compile the top-level
+      driver program (e.g, the one shown above) and link it against
+      TOSSIM. Usually the easiest way to do this is to link it against
+      the TOSSIM objects rather than the shared library. Often, it's
+      useful to have a separate Makefile to do this with. E.g.,
+      <code>Makefile.Driver</code>:</p>
+
+      <pre>
+all:
+        make micaz sim
+        g++ -g -c -o Driver.o Driver.c -I../../tos/lib/tossim/
+        g++ -o Driver Driver.o build/micaz/tossim.o build/micaz/sim.o build/micaz/c-support.o
+      </pre>
+        
+
+     <h2>Using gdb</h2>
+
+     <p>Since Driver is a C++ program, you can use gdb on it to
+     step through your TinyOS code, inspect variables, set 
+     breakpoints, and do everything else you can normally do.
+     Unfortunately, as gdb is designed for C and not nesC, the
+     component model of nesC means that a single command can have multiple
+providers; referring to a specific command requires specifying the component,
+interface, and command. For example, to break on entry to the <tt>redOff</tt>
+command of the <tt>Leds</tt> interface of <tt>LedsC</tt>, one must type:
+
+<pre>
+$ gdb Driver
+GNU gdb Red Hat Linux (6.0post-0.20040223.19rh)
+Copyright 2004 Free Software Foundation, Inc.
+GDB is free software, covered by the GNU General Public License, and you are
+welcome to change it and/or distribute copies of it under certain conditions.
+Type "show copying" to see the conditions.
+There is absolutely no warranty for GDB.  Type "show warranty" for details.
+This GDB was configured as "i386-redhat-linux-gnu"...Using host libthread_db library "/lib/tls/libthread_db.so.1".
+
+(gdb) break *LedsP$Leds$led0Toggle
+Breakpoint 1 at 0x804f184: file LedsP.nc, line 73.
+</pre>
+
+<p>nesC translates component names to C names using
+$. $ is a legal but almost-never-used character in some versions
+of C, so nesC prohibits it and uses it internally. The leading
+* is necessary so dbg can parse the $s. With the above
+breakpoint set, gdb will break whenever a mote toggles led0.</p>
+
+<p>Variables have similar names. For example, to inspect the packet
+of RadioCountToLedsC in the RadioCountToLeds application,</p>
+
+<pre>
+(gdb) print RadioCountToLedsC$packet
+$1 = {{header = {{data = ""}, {data = ""}, {data = ""}, {data = ""}, {
+        data = ""}}, data = {{data = ""} <repeats 28 times>}, footer = {{
+        data = ""}, {data = ""}}, metadata = {{data = ""}, {data = ""}, {
+        data = ""}, {data = ""}, {data = ""}}} <repeats 1000 times>}
+</pre>
+
+<p>For those who know gdb very well, you'll recognize this as a print
+of an array, rather than a single variable: there are more than 1000
+instances of the message_t struct. This is because TOSSIM simulates
+many motes; rather than there being a single RadioCountToLedsC$packet,
+there is one for every node. To print the packet of a specific node, you
+have to index into the array. This, for example, will print the variable
+for node 6:</p>
+
+<pre>
+(gdb) print RadioCountToLedsC$packet[6]
+$2 = {header = {{data = ""}, {data = ""}, {data = ""}, {data = ""}, {
+      data = ""}}, data = {{data = ""} <repeats 28 times>}, footer = {{
+      data = ""}, {data = ""}}, metadata = {{data = ""}, {data = ""}, {
+      data = ""}, {data = ""}, {data = ""}}}
+</pre>
+
+<p>If you want to print out the variable for the node TOSSIM is currently
+simulating, you can do this:</p>
+
+<pre>
+(gdb) print RadioCountToLedsC$counter[sim_node()]
+$4 = 0
+</pre>
+
+<p>You can also set watchpoints (although, as to be expected, they are
+<i>slow</i>:</p>
+
+<pre>
+(gdb) watch UscGainInterferenceModelC$receiving[23]
+Hardware watchpoint 2: UscGainInterferenceModelC$receiving[23]
+</pre>
+
+<p>This variable happens to be an internal variable in the 
+packet-level network simulation, which keeps track of whether
+the radio thinks it is receiving a packet. So setting the
+above watchpoint will cause gdb to break whenever 
+node 23 starts receiving a packet or returns to searching
+for packet preambles.</p>
+
+<p>Generic components add another wrinkle. Since they use
+a code-copying approach, each instance of a generic has its
+own separate functions and variables (this is mostly due to the
+fact that you can pass types to them). Take, for example,
+<code>AMQueueImplP</code>, which is used in both the radio
+AM stack and the serial AM stack. If you use gdb on an
+application that uses both serial and radio communication and
+try to break on its Send.send, you'll see an error:</p>
+
+<pre>
+(gdb) break *AMQueueImplP$Send$send
+No symbol "AMQueueImplP$Send$send" in current context.
+</pre>
+
+<p>nesC gives each generic a unique number. So if you
+have an application in which there is a single copy
+of AMQueueImplP, its name will actually be AMQueueImplP$0.
+For example, in RadioCountToLeds, this will work:</p>
+
+<pre>
+(gdb) break *AMQueueImplP$0$Send$send
+Breakpoint 5 at 0x8051b29: file AMQueueImplP.nc, line 79.
+</pre>
+
+<p>If you have multiple instances of a generic in a 
+program, there is unfortunately no easy way to figure out each one's
+name besides looking at the source code or stepping into them.
+E.g., if you application uses serial and radio communication,
+knowing which stack has AMQueueImpl$0 and which has AMQueueImplP$1
+requires either stepping through their send operation or looking
+at their <code>app.c</code> files.
+</p>
+
+<h1>Conclusions</h1>
+
+This lesson introduced the basics of the TOSSIM simulator. It showed
+you how to configure a network, how to run a simulation, how to
+inspect variables, how to inject packets, and how to compile with C++.
+
+<center>
+<p>&lt;&nbsp;<b><a href="lesson10.html">Previous Lesson</a></b> |&nbsp; <b><a
+ href="index.html">Top</a></b> &nbsp;|&nbsp; <b><a href="lesson12.html">Next
+Lesson </a>&nbsp;&gt;</b>
+	      </center>
+</p>
+
+
+	    <A name="appendix"><H1>Appendix A: Troubleshooting TOSSIM compilation</H1></A>
+
+	    <p>TOSSIM is a C/C++ shared library with an optional
+	    Python translation layer. Almost all of the problems
+	    encountered in compiling TOSSIM are due to C linking
+	    issues. If you don't know what a linker is (or have never
+	    linked a C program), then chances are the rest of this
+	    appendix is going to be cryptic and
+	    incomprehensible. You're best off starting with learning
+	    about <A
+	    HREF="http://en.wikipedia.org/wiki/Linker">linkers</A>, <A
+	    HREF="http://www.iecc.com/linker/linker01.html">why they
+	    are needed</A>, and how you <A
+	    HREF="http://www.linuxjournal.com/article/6463">use the
+	    gcc/g++ compilers</A> to link code.</p>
+		
+
+	    <p>Generally, when compiling TOSSIM using <tt>make micaz sim</tt>,
+	      one of four things can go wrong:</p>
+
+	    <ol>
+	      <li>You are using Cygwin but the <tt>sim</tt> compilation option
+		can't figure this out.</li>
+
+	      <li>You do not have the needed Python support installed.</li>
+
+	      <li>You have Python support installed, but the make
+	      system can't find it.</li>
+
+	      <li>You have Python support installed, but it turns out to
+		be incompatible with TOSSIM.</li>
+              
+	       <li>You have a variant of gcc/g++ installed that 
+	        expects slightly different compilation options than the
+		normal installation.</li>
+	    </ol>
+
+	    <p>We'll visit each in turn.</p>
+
+	    <h2>You are using Cygwin but the <tt>sim</tt> compilation option
+	      can't figure this out</h2>
+
+	    <p>It turns out that the Cygwin and Linux versions of gcc/g++
+	      have different command-line flags and require different options
+	      to compile TOSSIM properly. For example, telling the Linux
+	      compiler to build a library requires <tt>-fPIC</tt> while
+	      the Cygwin is <tt>-fpic</tt>. If you're using Cygwin and
+	      you see the output look like this:
+
+	      <pre>
+  ncc -c -shared -fPIC -o build/micaz/sim.o ...
+	      </pre>
+
+	      rather than
+
+	      <pre>
+  ncc -c -DUSE_DL_IMPORT -fpic -o build/micaz/sim.o ...
+	      </pre>
+
+	      then you have encountered this problem. The problem
+	      occurs because Cygwin installations do not have a
+	      consistent naming scheme, and so it's difficult for the
+	      compilation toolchain to always figure out whether it's
+	      under Linux or Cygwin.</p>
+
+	    <p><b>Symptom:</b> You're running cygwin but you see the
+	      <tt>-fPIC</tt> rather than <tt>-fpic</tt> option being
+	      passed to the compiler.</b></p>
+	    
+	    <p><b>Solution:</b> Explicitly set the OSTYPE environment
+	      variable to be <tt>cygwin</tt> either in your <tt>.bashrc</tt>
+	      or when you compile. For example, in bash:</p>
+
+	    <pre>
+$ OSTYPE=cygwin make micaz sim
+	    </pre>
+
+	    or in tcsh
+
+	    <pre>
+$ setenv OSTYPE cygwin
+$ make micaz sim
+	    </pre>
+
+	    <p>Note that often this problem occurs in addition to
+	    other ones, due to using a nonstandard Cygwin
+	    installation. So you might have more problems to track
+	    down.</p>
+	    
+	    <h2>You do not have the needed Python support installed</h2>
+
+	    <p>If when you compile you see lots of errors such as
+	    "undefined reference to" or "Python.h: No such file or
+	    directory" then this might be your problem. It is a
+	    subcase of the more general problem of TOSSIM not being
+	    able to find needed libraries and files.</p>
+	    
+	    <p>Compiling Python scripting support requires that you
+	      have certain Python development libraries installed. First, check
+	      that you have Python installed:</p>
+
+	    <pre>
+$ python -V
+Python 2.4.2
+	    </pre>
+
+	    <p>In the above example, the system has Python 2.4.2. If
+	    you see "command not found" then you do not have Python
+	    installed. You'll need to track down an RPM and install
+	    it.  TOSSIM has been tested with Python versions 2.3 and
+	    2.4. You can install other versions, but there's no
+	    assurance things will work.</p>
+
+	    <p>In addition to the Python interpreter itself, you need
+	    the libraries and files for Python development. This is
+	    essentially a set of header files and shared libraries. If
+	    you have the <tt>locate</tt> command, you can type
+	    <tt>locate libpython</tt>, or if you don't, you can look
+	    in <tt>/lib</tt>, <tt>/usr/lib</tt> and
+	    <tt>/usr/local/lib</tt>. You're looking for a file with a
+	    name such as <tt>libpython2.4.so</tt> and a file named
+	    <tt>Python.h</tt>. If you can't find these files, then you
+	    need to install a <tt>python-devel</tt> package.</p>
+
+
+	    <p><b>Symptom:</b> Compilation can't find critical files
+	    such as the Python interpreter, <tt>Python.h</tt> or a
+	    Python shared library, and searching your filesystem shows
+	    that you don't have them.</p>
+
+	    <p><b>Solution:</b> Installed the needed files from Python
+	    and/or Python development RPMS.</p>
+
+	    <p>If you have all of the needed files, but are still
+	    getting errors such as "undefined reference" or "Python.h:
+	    No such file or directory", then you have the next
+	    problem: they're on your filesystem, but TOSSIM can't find
+	    them.</p>
+	      
+	    <h2>You have Python support installed, but the make
+	      system can't find it</h2>
+
+	    <p>You've found libpython and Python.h, but when TOSSIM compiles
+	    it says that it can't find one or both of them. If it can't
+	    find Python.h then compilation will fail pretty early, as g++ won't
+	    be able to compile the Python glue code. If it can't find the python
+	    library, then compilation will fail at linking, and you'll see
+	    errors along the lines of "undefined reference to __Py...". You
+	    need to point the make system at the right place.</p>
+
+	    <p>Open up <tt>support/make/sim.extra</tt>. If the make
+	      system can't find Python.h, then chances are it isn't in
+	      one of the standard places (e.g., /usr/include). You need to tell
+	      the make system to look in the directory where Python.h is with
+	      a <tt>-I</tt> option. At the top of sim.extra, under the PFLAGS entry,
+	      add
+
+	    <pre>
+CFLAGS += -I/path
+	    </pre>
+
+	      where <tt>/path</tt> is the path of the directory where Python.h
+	      lives. For example, if it is in <tt>/opt/python/include</tt>,
+	      then add <tt>CFLAGS += -I/opt/python/include</tt>.</p>
+	    
+	    <p>If the make system can't find the python library for
+	    linking (causing "undefined reference") error messages,
+	    then you need to make sure the make system can find
+	    it. The sim.extra file uses two variables to find the
+	    library: <tt>PYDIR</tt> and <tt>PYTHON_VERSION</tt>.  It
+	    looks for a file named libpython$(PYTHON_VERSION).so. So
+	    if you have Python 2.4 installed, make sure that
+	    PYTHON_VERSION is 2.4 (be sure to use no spaces!) and if
+	    2.3, make sure it is 2.3.</p>
+
+	    <p>Usually the Python library is found in
+	    <tt>/usr/lib</tt>. If it isn't there, then you will need
+	    to modify the <tt>PLATFORM_LIB_FLAGS</tt> variable.  The
+	    -L flag tells gcc in what directories to look for
+	    libraries. So if libpython2.4.so is in
+	    <tt>/opt/python/lib</tt>, then add
+	    <tt>-L/opt/python/lib</tt> to the
+	    <tt>PLATFORM_LIB_FLAGS</tt>. Note that there are three
+	    different versions of this variable, depending on what OS
+	    you're using. Be sure to modify the correct one (or be
+	    paranoid and modify all three).
+
+	      
+	    <p><b>Symptom:</b> You've verified that you have the
+	    needed Python files and libraries, but compilation is
+	    still saying that it can't link to them ("undefined
+	    reference") or can't find them ("cannot find -lpython2.4").</p>
+
+	    <p><b>Solution:</b> Change the sim.extra file to point to
+	    the correct directories using -L and -I flags.</p>
+
+	    <h2>You have Python support installed, but it turns out to
+	      be incompatible with TOSSIM.</h2>
+
+	    <p><b>Symptom:</b> You get a "This python version requires
+	      to use swig with the -classic option" error message.</p>
+
+	    <p><b>Solution:</b> Install SWIG and regenerate Python
+	    support with the sing-generate script in
+	    <tt>tos/lib/tossim</tt>, or install a different version of
+	    Python.</p>
+	    
+	       <h2>You have a variant of gcc/g++ installed that 
+	        expects slightly different compilation options than the
+		normal installation.</h2>
+
+		<p><b>Symptom:</b> g++ complains that it cannot find
+		 main() when you are compiling the shared library
+		 ("undefined reference to `_WinMain@16'").</p>
+
+		 <p><b>Solution:</b> There are two possible solutions.
+		 The first is to include a dummy main(), as described
+		  in this <A HREF="http://mail.millennium.berkeley.edu/pipermail/tinyos-help/2006-December/021719.html">tinyos-help posting.</A> The
+		  second is to add the -shared option, as described in
+		  this <A HREF="http://curl.haxx.se/mail/archive-2003-01/0056.html">web page</A>.
+		  
+		  <p>Hopefully, these solutions worked and you can get back
+	    to <A HREF="#compiling">compiling</A>, If not, then you
+		should email tinyos-help.</p>
+</center>
+
+</body>
+</html>
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+<html>
+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/TOSSIM">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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+<html>
+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/Network_Protocols">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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+<html>
+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/TinyOS_Toolchain">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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diff --git a/doc/html/tutorial/lesson15.html b/doc/html/tutorial/lesson15.html
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+<html>
+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/The_TinyOS_printf_Library">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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+<html>
+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/Writing_Low-Power_Applications">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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+<html>
+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/Modules_and_the_TinyOS_Execution_Model">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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diff --git a/doc/html/tutorial/lesson3.html b/doc/html/tutorial/lesson3.html
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+<html>
+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/Mote-mote_radio_communication">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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+<html>
+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/Mote-PC_serial_communication_and_SerialForwarder">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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diff --git a/doc/html/tutorial/lesson5.html b/doc/html/tutorial/lesson5.html
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+<html>
+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/Sensing">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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diff --git a/doc/html/tutorial/lesson6.html b/doc/html/tutorial/lesson6.html
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+<html>
+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/Boot_Sequence">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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diff --git a/doc/html/tutorial/lesson7.html b/doc/html/tutorial/lesson7.html
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+<html>
+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/Storage">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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diff --git a/doc/html/tutorial/lesson8.html b/doc/html/tutorial/lesson8.html
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+<html>
+<head>
+<meta http-equiv="Refresh" content="5; url=http://docs.tinyos.net/index.php/Resource_Arbitration_and_Power_Management">
+</head>
+<img src="http://www.tinyos.net/scoop/images/tos-jwall.jpg"></img>
+<br><br>
+The tinyOS tutorials have been moved into a wiki.  
+You will be redirected there in 5 seconds ....
+</html>
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diff --git a/doc/html/tutorial/lesson9.html b/doc/html/tutorial/lesson9.html
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+  <html>
+    <head>
+      <title>TinyOS Tutorial Lesson 9: Concurrency in TinyOS</title>
+      <link href="../../stylesheets/tutorial.css" rel="stylesheet" type="text/css">
+    </head>
+    <body>
+      
+      <div class="title">Lesson 9: Concurrency</div>
+      <div class="subtitle">Last updated 30 October 2006</div>
+
+      <h1>Introduction</h1>
+
+      <p>This tutorial introduces the concept of <tt>async</tt> code,
+	which represents interrupt handlers and other time-critical functionality.
+	It describes the relationship between async code and tasks</p>
+
+      
+      <h1>Sync vs. Async</h1>
+      <p><A HREF="lesson2.html">Lesson 2</A> introduced tasks as a
+	mechanism to defer processing until later. Because tasks are
+	run-to-completion (a new task does not start until the previous one
+	finished), well-written components keep keep them short and spread
+	complex processing across several tasks. Not all TinyOS code is
+	run from a task, however: when a processor has an interrupt,
+	it immediately jumps to the interrupt handler code.</p>
+
+      <p>Because interrupt handler code can theoretically run at almost any
+	time, it has to be much more careful than task code. The interrupt
+	might start executing in the middle of a task, and it needs to make sure
+	that it does not corrupt variables that the task is using. The complexities
+	this introduces motivate most service-level TinyOS code to be in tasks.
+	Interrupt handlers therefore usually post tasks to defer their processing
+	as soon as they can, simplifying the code.</p>
+
+      <p>Some code, however, such as the interrupt handlers themselves cannot 
+	be in a task. Only a small subset of TinyOS code has been written to safely
+      run in preemptive context: these functions have the <tt>async</tt> keyword.
+	If an async function needs to call a command or signal an event that is not
+	async, then it must post a task to do so. Code that does not have the
+      async keyword is <i>synchronous</i>, as synchronous functions do not preempt
+      one another. However, as most TinyOS functions are synchronous, there is no
+      keyword (it is the default). This restriction is in one direction only.
+	Synchronous (task) code can call
+	async functions, but async code cannot call synchronous functions.</p>
+
+      <h1>An Example Async Function</h1>
+
+      <p><tt>Leds</tt> is a very common interface whose commands are all async.
+	It is often the case that low-level code needs to control the LEDs (e.g.,
+	when testing), and so these functions can be safely called from interrupts.
+	If the Leds commands were not async, then an interrupt handler would have
+	to post a task to toggle them, possibly introducing enough delay to make
+	debugging difficult.</p>
+
+      <pre>
+interface Leds {
+  async command void led0On();
+  async command void led0Off();
+  async command void led0Toggle();
+  async command void led1On();
+  async command void led1Off();
+  async command void led1Toggle();
+  async command void led2On();
+  async command void led2Off();
+  async command void led2Toggle();
+  async command uint8_t get();
+  async command void set(uint8_t val);
+}
+      </pre>
+
+
+      <p>Calling async functions is easy; a caller doesn't need to do anything special:
+	a component can just call Leds commands. The challenging part is implementing
+	async functions.</p>
+
+      
+	
+      <p>Commands and events that are executed as part
+	of a hardware event handler must be declared with the <b>async</b>
+	keyword (more about the async keyword in Lesson 8). </p>
+      
+      <p>Because tasks and hardware event handlers may be preempted by other
+	asynchronous code, nesC programs are susceptible to certain race
+	conditions. Races are avoided either by accessing shared data
+	exclusively  within tasks, or by having all accesses within <b>atomic</b>
+	statements. The nesC compiler reports potential <b>data races</b> to the
+	programmer at compile-time. It is possible the compiler may report a
+	false positive. In this case a variable can be declared with the <b>norace</b>
+	keyword. The norace keyword should be used with extreme caution. </p>
+      
+      <p>Please see the <a href="../../doc/nesc/ref.pdf">nesC Language
+	  Reference Manual</a> for more information on programming in nesC. <br>
+	  &nbsp;
diff --git a/doc/html/tutorial/outline.txt b/doc/html/tutorial/outline.txt
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+On Mon, 2005-12-05 at 12:18 -0700, Kristin Wright wrote:
+> On 11/30/05, Philip Levis <pal at cs.stanford.edu> wrote:
+> > I am on the hook for writing a short book on nesC programming for
+> > xbow, focusing on wiring. I think I could come up with a basic
+> > tutorial outline, but can't do more than that.
+> 
+> Is the tutorial outline something you can commit to? If so, what
+> timeframe are you thinking?
+> -kw
+
+but it's a high level one. Each bullet point should have an exercise to
+demonstate it. This is pretty exhaustive. We could do something
+simpler/shorter. I'm sure I must have missed something, so everyone feel
+free to chip in.
+
+Tutorial I: Interfaces and Configurations (Kristin)
+  - Components interact through well-defined interfaces.
+  - Component signatures, provides and uses
+  - Interface descriptions
+  - Wiring two components together
+  - Exporting a wiring
+
+Tutorial II: Modules (Kristin)
+  - Executable logic.
+  - Events vs. commands.
+  - Defaults.
+  - Storage and ownership.
+   
+Tutorial III: An Application (Kristin)
+  - Boot.booted()
+  - Init()
+  - Twiddling the LEDs.
+  - Starting services/components
+  - Timers.
+  - Tasks to defer processing.
+
+Tutorial IV: Acquiring Data (Kristin)
+  - Sampling a sensor.
+  - Periodically sampling the sensors and twiddling the LEDs.
+  - Handling error conditions.
+
+Tutorial V: Communication (Prabal)
+  - Message buffers.
+  - Sending a buffer.
+  - Receiving a buffer: swapping vs. copying.
+  - Making a send queue.
+  - Getting packet metadata (Packet, AMPacket interfaces).
+
+Tutorial VI: Storage (Kristin)
+  - Storing small things: nodeID.
+  - Storing a big chunk of things: data from another node (generated,
+e.g., with Random), reliable protocol.xa
+  - Storing a stream: logging.
+
+Tutorial VII: Power management (Vlado)
+  - Turning components on/off.
+  - Resource managers and power policies.
+
+Tutorial VIII: Concurrency (Kristin)
+  - Tasks, revisited.
+  - Async code vs. sync code (until now all has been sync)
+  - Scheduler.
+
+Tutorial IX: Platforms (PhilB)
+  - chips vs. platforms
+  - Telescoping abstractions
+  - Sensorboards
+
+Tutorial X: TOSSIM (PhilL)
+
diff --git a/doc/html/tutorial/programmers.html b/doc/html/tutorial/programmers.html
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+<html>
+<head>
+    <title>Mica-family Programming</title>
+  <link href="../../stylesheets/tutorial.css" rel="stylesheet" type="text/css">
+
+</head>
+
+<body>
+
+<div class="title">Device Programming</div>
+<div class="subtitle">Last updated 03 Sep 2003</div>
+
+    <p>
+    The TinyOS development environment includes features to ease programming 
+    devices. The mica family of motes has a diverse set of boards
+    which connect a mote to a PC for programming.  TinyOS 2.0 supports
+    the following mica family programming boards
+    </p>
+
+
+
+    <center>
+      <table cellpadding=10>
+        <tr><td>Name</td><td width=10></td><td>Picture</td></tr>
+        <tr>
+          <td>Parallel port programming board (e.g., Crossbow MIB500)</td>
+          <td></td>
+          <td><IMG SRC="img/MIB500CA_Sm.jpg"></td>
+        </tr>
+        <tr>
+          <td>Serial port programming board (e.g., Crossbow MIB510)</td>
+          <td></td>
+          <td><IMG SRC="img/MIB510CA_Sm.jpg"></td>
+        </tr>
+        <tr>
+          <td>USB serial programming board (e.g., Crossbow MIB520)</td> 
+          <td></td>
+          <td><IMG SRC="img/MIB520CA_Sm.jpg"></td>
+        </tr>
+        <tr>
+          <td>Ethernet programming board (e.g., Crossbow MIB600) </td>
+          <td></td>
+          <td><IMG SRC="img/MIB600CA_Sm.jpg"></td>
+      </tr>
+     </table>
+    </center>
+    <p>
+    The second key feature permits programming each device with a unique address 
+    attribute without having to compile the application each time. </p>
+
+    <p>
+    This document describes how to use these features in TinyOS 2.0.</p>
+
+    <p>
+
+<h1>Using Programmers</h1>
+
+    <p>
+    The standard programming software used in TinyOS is the
+    <font face="Times New Roman">µ In-System Programmer or '<tt>uisp</tt>'.&nbsp; This 
+    program, which comes as a part of the TinyOS release, takes various 
+    arguments according to the programmer hardware and the particular 
+    programming action desired (erase, verify, program, etc..).&nbsp; To 
+    simplify using this tool, the TinyOS environment invokes uisp for you with 
+    the correct arguments whenever you issue an 'install' or 'reinstall'.&nbsp; 
+    You only need specify the type of device you are using and how to 
+    communicate with it.&nbsp; This is done using environment variables.</font></p>
+
+    <h2>MIB500/Parallel Port Programmers</h2>
+
+    <blockquote>
+
+    <p>
+    This is the default programmer device.&nbsp; No additional command line 
+    parameters need to be specified when using this programmer.</p>
+
+    </blockquote>
+
+    <h2>Serial Programming (MIB510 and MIB520)</h2>
+
+    <blockquote>
+
+    <p>
+    Add <tt>mib510,&lt;dev&gt; </tt> where &lt;dev&gt; is the name of the serial port where the device is attached (i.e. /dev/ttyS0).</p>
+
+    <p>
+    example: <br>
+<tt>make micaz install mib510,/dev/ttyS1</tt></p>
+
+    </blockquote>
+
+ <h2>Ethernet Programming (MIB600)</h2>
+    <blockquote>
+
+    <p>Add <tt>eprb,&lt;addr&gt;</tt> where &lt;addr&gt; is the IP address of the ethernet device (e.g., 10.0.0.12).</p>
+
+    <p>
+    example:<br>
+<tt>make micaz install eprb,192.168.2.23</tt></p>
+
+    </blockquote>
+
+    <p>
+    &nbsp;</p>
+
+
+
+<hr>
+<b><a href="index.html"> Tutorial Index </a></b></body>
+</html>
diff --git a/doc/html/tutorial/usc-topologies.html b/doc/html/tutorial/usc-topologies.html
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@@ -0,0 +1,426 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <meta name="GENERATOR" content="Mozilla/4.78 [en] (X11; U; Linux 2.4.7-10 i686) [Netscape]">
+   <link href="../../stylesheets/tutorial.css" rel="stylesheet" type="text/css">
+   <title>Building a Network Topology for TOSSIM</title>
+</head>
+<body bgcolor="#F8F8FF" link="#005BB7" vlink="#005BB7">
+<div class="title">Building a Network Topology for TOSSIM</div>
+<div class="subtitle">Marco Zuniga, &lt;mzunigaz@gmail.com&gt;</div>
+
+<br>&nbsp;
+<table BORDER=0 CELLSPACING=2 CELLPADDING=3 WIDTH="100%" hspace="4" >
+<tr BGCOLOR="#E0E0FF">
+<td WIDTH="100%"><b><nobr><font face="arial,helvetica">Introduction</font></nobr></b></td>
+</tr>
+</table>
+
+<p>The specific behavior of the wireless link depends on two 
+elements: the radio, and the environment (channel) where they are placed.
+Hence, in order to obtain better simulations, the characteristics of
+both elements should be provided. The model presented in this tutorial is part of a more 
+general link-layer model proposed by the 
+<a href="http://ceng.usc.edu/%7Eanrg/downloads.html">ANRG</a> group at USC, 
+and it is valid for static and low-dynamic environments. 
+
+<br>&nbsp;
+<table BORDER=0 CELLSPACING=2 CELLPADDING=3 WIDTH="100%" hspace="4" >
+<tr BGCOLOR="#E0E0FF">
+<td WIDTH="100%"><b><nobr><font face="arial,helvetica">Configuration File</font></nobr></b></td>
+</tr>
+</table>
+
+<p>The configuration file contains various channel, radio and topology 
+parameters that can be modified. Any line starting with the percentage 
+symbol (%) is treated as a comment. The format of the configuration file is as follows: 
+
+<p>
+<table border="0" cellspacing="2" cellpadding="3" width="80%" hspace="4">
+  <tbody>
+    <tr bgcolor="#e0e0e0">
+		%%%%%%%%%%%%%%%%%%%%%%
+		<br>% Channel Parameters 			     
+		<br>%%%%%%%%%%%%%%%%%%%%%%
+		<br>
+		<br>PATH_LOSS_EXPONENT = 3.0;
+		<br>SHADOWING_STANDARD_DEVIATION = 4.0;
+		<br>D0 = 1.0;
+		<br>PL_D0 = 55.0;
+		<br>
+		<br>%%%%%%%%%%%%%%%%%%%%%%
+		<br>% Radio Parameters 			     
+		<br>%%%%%%%%%%%%%%%%%%%%%%
+		<br>
+		<br>NOISE_FLOOR = -105.0;
+		<br>
+		<br>S11 = 3.7;
+		<br>S12 = -3.3;
+		<br>S21 = -3.3;
+		<br>S22 = 6.0;
+		<br>
+		<br>WHITE_GAUSSIAN_NOISE = 4;
+		<br>
+		<br>%%%%%%%%%%%%%%%%%%%%%%
+		<br>% Topology Parameters 			     
+		<br>%%%%%%%%%%%%%%%%%%%%%%
+		<br>% available topologies :
+		<br>%	- GRID		(1)
+		<br>%	- UNIFORM	(2)
+		<br>%	- RANDOM	(3)
+		<br>%	- FILE		(4)
+		<br>
+		<br>TOPOLOGY = 1;
+		<br>GRID_UNIT = 1.0;
+		<br>TOPOLOGY_FILE = topologyFile;
+		<br>
+		<br>NUMBER_OF_NODES = 9;
+		<br>
+		<br>TERRAIN_DIMENSIONS_X = 20.0;
+		<br>TERRAIN_DIMENSIONS_Y = 20.0;
+    </tr>
+  </tbody>
+</table>
+
+<p> A sample file (<tt>configurationFile</tt>) is provided as the default configuration file. 
+The next sections explain the different channel, radio and deployment parameters.
+
+<br>&nbsp;
+<table BORDER=0 CELLSPACING=2 CELLPADDING=3 WIDTH="100%" hspace="4" >
+<tr BGCOLOR="#E0E0FF">
+<td WIDTH="100%"><b><nobr><font face="arial,helvetica">
+Channel Parameters</font></nobr></b></td>
+</tr>
+</table>
+
+<p>When a radio signal propagates it may be diffracted, reflected and scattered. These 
+events have two important consequences on 
+the signal strength. First, the signal strength decays exponentially with respect to 
+distance. And second, for a given distance the signal strength is random and 
+log-normally distributed.
+
+<p>The channel is modeled using the log-normal path loss model. This model has the 
+following parameters:
+<p>
+<li>
+PATH_LOSS_EXPONENT : rate at which signal decays.
+<li>
+SHADOWING_STANDARD_DEVIATION : randomness of received signal due to multipath.
+<li>
+D0 : reference distance (usually 1 meter). D0 also determines the minimum distance
+allowed between any pair of nodes.
+<li>
+PL_D0 : power decay in dB for the reference distance D0. 
+
+
+<p>
+Channel parameters for some scenarios with D0 = 1m are presented in the following table:
+
+<p>
+<center>
+<table border="0" cellspacing="2" cellpadding="3" width="80%" hspace="4">
+  <tbody>
+    <tr bgcolor="#e0e0e0"><th><th>PL_D0 (dB) <th>PATH_LOSS_EXPONENT<th>SHADOWING_STANDARD_DEVIATION (dB)</tr>
+	<tr bgcolor="#e0e0e0"><th>Football Field<th> 55.4 <th> 4.7 <th> 3.2 </tr>
+    <tr bgcolor="#e0e0e0"><th>Aisle of Building<th> 52.1 <th> 3.3 <th> 5.5 </tr>
+  </tbody>
+</table>
+</center>
+
+<p> In <a href="http://ieeexplore.ieee.org/iel5/6314/16884/00778120.pdf?arnumber=778120">
+"Near-ground wideband channel measurements"</a>, the authors present channel parameters for several scenarios.
+Usually, the PATH_LOSS_EXPONENT and the SHADOWING_STANDARD_DEVIATION take values between 2 and 6 for scenarios
+with LOS (line-of-sight) conditions.
+
+<br>&nbsp;
+<table BORDER=0 CELLSPACING=2 CELLPADDING=3 WIDTH="100%" hspace="4" >
+<tr BGCOLOR="#E0E0FF">
+<td WIDTH="100%"><b><nobr><font face="arial,helvetica">
+Radio Parameters</font></nobr></b></td>
+</tr>
+</table>
+
+<p>Another important effect to be considered is link asymmetry. Link
+asymmetry have a static and a dynamic component. The dynamic component
+is due to thermal noise, which leads to a dynamic variation of a 
+node's noise floor readings at runtime.  This dynamic variation 
+is usually modeled as a gaussian random variable with mean 0 and 
+a standard deviation given by the parameter:
+
+<p>
+<li>
+WHITE_GAUSSIAN_NOISE : standard deviation of additive white gaussian noise.
+
+<p>The static component is caused by hardware variance (variance in the 
+output power and baseline noise floor across nodes). 
+When a user sets the output power of a node to a value P, the actual output 
+power can be below or above P; similarly, the baseline noise floor of the radio
+is not fixed and has some variance around its mean value. Also, there
+might be some correlation between the variances of the output power and noise 
+floor, for example, mica2 motes show that nodes with an output power higher than
+the set value ("better transmitters") usually have a lower noise floor ("better
+receivers"), and viceversa.
+
+<p>Hardware variance can be modeled as a multidimensional Gaussian process, where
+a covariance matrix captures the variances of the output power, the noise floor,
+and their correlation. In this process, the baseline (average) noise floor in dBm is given by:
+
+<p>
+<li>
+NOISE_FLOOR : radio noise floor in dBm.
+
+
+<p>And the variances of the output power and noise floor on a per node basis are given by
+the covariance matrix S = [S11 S12; S21 S22] :
+
+<p>
+<li>
+S11 : variance of noise floor
+<li>
+S12 : covariance between noise floor and output power (captures correlation)
+<li>
+S21 : equal to S12
+<li>
+S22 : variance of output power
+
+<p>
+All the variances (elements of S) should be in dB. The values of the covariance 
+matrix are hardware dependent (default values are given for MICA2 motes), but 
+in general the smaller S11 and S22, the lower the impact on link asymmetry. 
+S12 and S21 are usually negative, and it is important to recall the properties
+of a covariance matrix (linear algebra), where the absolute values of S21 
+(and S12) should be less than sqrt(S11xS22), 
+i.e. |S21| < sqrt(S11xS22). In case symmetric links are desired, the user 
+should set S11 and S22 to 0.
+
+<p>
+Finally, it is important to mention that hardware measurements are required to obtain the
+radio parameters described above. 
+However, the user can modify some of these parameters to study their impact on different protocols. As 
+a general guideline we suggest not to increase the hardware variance too much (mica2 motes have been 
+observed to have the highest levels of asymmetry). The next table presents some suggested 
+values for radio parameters:
+
+<p>
+<center>
+<table border="0" cellspacing="2" cellpadding="3" width="60%" hspace="4">
+  <tbody>
+    <tr bgcolor="#e0e0e0"><th><th>SUGGESTED VALUES</tr>
+    <tr bgcolor="#e0e0e0"><th>NOISE_FLOOR<th> between -110 dBm and -104 dBm </tr>
+    <tr bgcolor="#e0e0e0"><th>S = [S11 S12; S21 S22]<th> [3.7 -3.3; -3.3 6.0] for high asymmetry levels
+														<br>[0.9 -0.7; -0.7 1.2] for low asymmetry levels</tr>
+														<br>[0 x; x 0] for symmetric links (x represents any number)</tr>
+    <tr bgcolor="#e0e0e0"><th>WHITE_GAUSSIAN_NOISE<th> between 4 dB and 5 dB </tr>
+  </tbody>
+</table>
+</center>
+
+<br>&nbsp;
+<table BORDER=0 CELLSPACING=2 CELLPADDING=3 WIDTH="100%" hspace="4" >
+<tr BGCOLOR="#E0E0FF">
+<td WIDTH="100%"><b><nobr><font face="arial,helvetica">
+Topology Parameters</font></nobr></b></td>
+</tr>
+</table>
+
+<p>
+The TOPOLOGY parameter allows to test different deployments (described below). Each 
+one of these deployments have a number identifying it, which should be assigned to the
+variable TOPOLOGY. The available type of deployments are:
+
+<p>
+<li>
+GRID (1): nodes are placed on a square grid topology. The number of nodes has to be a square of an integer.
+<li>  
+UNIFORM (2): based on the number of nodes (square of an integer), the physical 
+terrain is divided into a number of cells. Within each cell, a node is placed randomly. This topology
+can be observed as a GRID with variations.
+<li>
+RANDOM (3): nodes are placed randomly within the physical terrain.
+<li> 
+FILE (4): position of nodes is read from a user-defined topology file. 
+
+<p> For example, if a RANDOM deployment is desired, the parameter TOPOLOGY should be set to 3 
+(TOPOLOGY = 3;). When a user desires to specify the topology, TOPOLOGY should be set to 4, and
+the format of the deployment file provided by the user should be:
+
+<p>
+<tt>
+nodeid Xcoordinate Ycoordinate
+</tt>
+
+<p>
+Where the X and Y coordinates should be in meters, and the <tt>nodeid</tt> should start with 0.
+A topology file looks like:
+
+<p>
+<center>
+<table border="0" cellspacing="2" cellpadding="3" width="80%" hspace="4">
+  <tbody>
+    <tr bgcolor="#e0e0e0">
+	0  1.0 2.7
+	<br> 1  3.0 5.6
+	<br> 2  5.2 7.8
+    </tr>
+  </tbody>
+</table>
+</center>
+
+
+<p>
+A sample topology file is provided in <tt>topologyFile</tt>. Other topology parameters are:
+
+<p>
+<li>
+NUMBER_OF_NODES : for grid and uniform topologies should be a perfect square, 
+and it is not required when the topology is given by user (TOPOLOGY = 4;).
+<li>
+TERRAIN_DIMENSIONS_X : required only for uniform and random topologies.
+<li>
+TERRAIN_DIMENSIONS_Y : required only for uniform and random topologies. Also, for uniform topologies 
+TERRAIN_DIMENSIONS_Y should be equal to TERRAIN_DIMENSIONS_X.
+<li>
+GRID_UNIT : internode distance of the grid, required only for grid topologies.
+<li>
+TOPOLOGY_FILE : name of topology file provided by user, required only for FILE topologies (TOPOLOGY = 4;).
+
+<p>
+Please recall that no pair of nodes can be closer than D0. Hence,
+GRID_UNIT should be greater equal than D0 when GRID topologies are chosen (TOPOLOGY = 1;)
+, and the TOPOLOGY_FILE provided 
+by the user should not violate this constraint either. For UNIFORM and RANDOM
+topologies the node density (NUMBER_OF_NODES / area) is not allowed 
+to be higher than 0.5 nodes / D0^2.
+
+<br>&nbsp;
+<table BORDER=0 CELLSPACING=2 CELLPADDING=3 WIDTH="100%" hspace="4" >
+<tr BGCOLOR="#E0E0FF">
+<td WIDTH="100%"><b><nobr><font face="arial,helvetica">
+Sample Configuration Files</font></nobr></b></td>
+</tr>
+</table>
+
+Now, we provide some sample configuration files.
+
+<p>Example 1: A chain topology defined by the user on file <tt>chainTopo</tt>, placed in
+the aisle of a building (channel parameters), with nodes having an average noise floor
+of -106 dBm, a standard deviation of 4.5 dB for the white gaussian noise and a high level
+of asymmetry. The resulting configuration file is:
+
+<p>
+<table border="0" cellspacing="2" cellpadding="3" width="80%" hspace="4">
+  <tbody>
+    <tr bgcolor="#e0e0e0">
+		PATH_LOSS_EXPONENT = 3.3;
+		<br>SHADOWING_STANDARD_DEVIATION = 5.5;
+		<br>D0 = 1.0;
+		<br>PL_D0 = 52.1;
+		<br>
+		<br>NOISE_FLOOR = -106.0;
+		<br>S11 = 3.7;
+		<br>S12 = -3.3;
+		<br>S21 = -3.3;
+		<br>S22 = 6.0;
+		<br>WHITE_GAUSSIAN_NOISE = 4;
+		<br>
+		<br>TOPOLOGY = 4;
+		<br>TOPOLOGY_FILE = chainTopo;
+    </tr>
+  </tbody>
+</table>
+
+<p>Example 2: A uniform topology with 49 nodes in a 100m by 100m terrain, placed in
+a football field (channel parameters), with nodes having an average noise floor
+of -105 dBm, a standard deviation of 4.0 dB for the white gaussian noise and a low level
+of asymmetry. The resulting configuration file is:
+
+<p>
+<table border="0" cellspacing="2" cellpadding="3" width="80%" hspace="4">
+  <tbody>
+    <tr bgcolor="#e0e0e0">
+		PATH_LOSS_EXPONENT = 4.7;
+		<br>SHADOWING_STANDARD_DEVIATION = 3.2;
+		<br>D0 = 1.0;
+		<br>PL_D0 = 55.4;
+		<br>
+		<br>NOISE_FLOOR = -105.0;
+		<br>S11 = 0.9;
+		<br>S12 = -0.7;
+		<br>S21 = -0.7;
+		<br>S22 = 1.2;
+		<br>WHITE_GAUSSIAN_NOISE = 4;
+		<br>
+		<br>TOPOLOGY = 2;
+		<br>NUMBER_OF_NODES = 49;
+		<br>TERRAIN_DIMENSIONS_X = 100.0;
+		<br>TERRAIN_DIMENSIONS_Y = 100.0;
+    </tr>
+  </tbody>
+</table>
+
+<p>Example 3: similar to example 2, however in this case a 64 node grid topology is deployed
+with an internode distance of 2m and symmetric links are assumed. The resulting configuration file is:
+
+<p>
+<table border="0" cellspacing="2" cellpadding="3" width="80%" hspace="4">
+  <tbody>
+    <tr bgcolor="#e0e0e0">
+		PATH_LOSS_EXPONENT = 4.7;
+		<br>SHADOWING_STANDARD_DEVIATION = 3.2;
+		<br>D0 = 1.0;
+		<br>PL_D0 = 55.4;
+		<br>
+		<br>NOISE_FLOOR = -105.0;
+		<br>S11 = 0;
+		<br>S22 = 0;
+		<br>WHITE_GAUSSIAN_NOISE = 4;
+		<br>
+		<br>TOPOLOGY = 1;
+		<br>GRID_UNIT = 2.0;
+		<br>NUMBER_OF_NODES = 64;
+    </tr>
+  </tbody>
+</table>
+
+<br>&nbsp;
+<table BORDER=0 CELLSPACING=2 CELLPADDING=3 WIDTH="100%" hspace="4" >
+<tr BGCOLOR="#E0E0FF">
+<td WIDTH="100%"><b><nobr><font face="arial,helvetica">
+Usage</font></nobr></b></td>
+</tr>
+</table>
+
+
+<p>To use the model just provide the following commands
+<p><tt>$ javac LinkLayerModel.java</tt>
+<p><tt>$ java LinkLayerModel configurationFileName</tt>
+<p>The link gains will be written in a file called <tt>linkgain.out</tt>, which contains
+the gain for each link and the noise floor for each node 
+(format: &nbsp "gain" &nbsp src &nbsp dest &nbsp linkgain | &nbsp "noise" &nbsp nid &nbsp nf &nbsp awgn), for example:
+
+<p>
+<center>
+<table border="0" cellspacing="2" cellpadding="3" width="80%" hspace="4">
+  <tbody>
+    <tr bgcolor="#e0e0e0">
+	gain 1  2 -58.3
+	<br>gain 2  1 -60.5
+	<br>gain 1  3 -72.8
+	<br>gain 3  1 -75.3
+	<br>gain 2  3 -77.9
+	<br>gain 3  2 -75.4
+	<br>noise 1 -107.3 5
+	<br>noise 2 -105.2 5
+	<br>noise 3 -103.1 5
+    </tr>
+  </tbody>
+</table>
+</center>
+
+
+and the topology will be written in the file <tt>topology.out</tt> (format: &nbsp nodeid &nbsp xcoor &nbsp ycoor).
+
+</body>
+</html>
+
diff --git a/doc/html/upgrade-tinyos.html b/doc/html/upgrade-tinyos.html
new file mode 100644
index 00000000..a6738b1a
--- /dev/null
+++ b/doc/html/upgrade-tinyos.html
@@ -0,0 +1,397 @@
+<?xml version="1.0" encoding="utf-8" ?>
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml" xml:lang="en" lang="en">
+  <head>
+
+  <title>Installing TinyOS 2.0.2</title>
+  <link href="../stylesheets/tutorial.css" rel="stylesheet" type="text/css"/>
+</head>
+  <body>
+
+    <div class="title">Upgrading from TinyOS 1.x to TinyOS 2.0.2</div>
+    <div class="subtitle">Last updated 30 July 2007</div>
+<p>
+This document describes how to upgrade your TinyOS 1.x environment to
+a TinyOS 2.x environment. This requires that you not only install the 
+TinyOS 2.x rpm, but also that you upgrade your tools from the toolset
+distributed with TinyOS 1.1.0 and used with all 1.x
+TinyOS versions up through and including TinyOS 1.1.14. The new
+toolset was created for use with TinyOS 1.x beyond 1.1.14 as well
+as TinyOS 2.x. We call this new tooset version the '1.2' toolset.
+</p><p>
+Because we expect many developers to maintain a 1.x and 2.x tree
+simultaneously, we will also explain what parts of your environment
+need to be reconfigured if you switch from TinyOS 2.x to TinyOS
+1.x. The 1.2 toolset is backwards compatible with the 1.x TinyOS tree,
+so switching back and forth requires only a few variable changes. You
+can find those directions <a href="#tinyos1">at the bottom of the page</a>.
+</p>
+<p>
+There are 3 steps to upgrading from 1.x to 2.x:
+</p>
+<ol>
+  <li> <a href="#external-tools">Upgrade your external tools (compilers). </a></li>
+  <li> <a href="#tinyos-tools">Upgrade your Tinyos-specific tools. </a></li>
+  <li> <a href="#tinyos2">Install the Tinyos 2.x source tree. </a></li>
+</ol>
+
+
+<h1><a name="external-tools">Step 1: Upgrade your external tools.</a></h1>
+The 1.2 toolset uses the same Java JDK and ATT Graphviz versions, so 
+those do not need to be upgraded. What does need to be upgraded are
+your compiler tools. Install the appropriate version of the following 
+(Windows or Linux) with the rpm command 'rpm -Uvh <i>rpm</i>'.
+<p>
+At this time, we have available compiler toolsets for Atmel AVR and 
+TI MSP430 platforms. 
+</p>
+<p>
+All of the tools are in the <code>http://www.tinyos.net/dist-1.2.0/</code>
+and the <code>http://www.tinyos.net/dist-2.0.0</code>
+distribution trees, but are linked below for convenience.
+</p>
+
+<b><em>Atmel AVR Tools</em></b>
+<table border="0">
+<tbody><tr>
+  <td bgcolor="#dddddd"><b>Tool</b></td>
+  <td bgcolor="#dddddd"><b>Windows/Cygwin</b></td>
+  <td bgcolor="#dddddd"><b>Linux</b></td>
+</tr>
+
+<tr>
+  <td>avr-binutils<font color="red">&#8224;</font></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/avr-binutils-2.15tinyos-3.cygwin.i386.rpm">avr-binutils-2.15tinyos-3.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/avr-binutils-2.15tinyos-3.i386.rpm">avr-binutils-2.15tinyos-3.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd">avr-gcc</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/avr-gcc-3.4.3-1.cygwin.i386.rpm">avr-gcc-3.4.3-1.cygwin.i386.rpm </a></td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/avr-gcc-3.4.3-1.i386.rpm">avr-gcc-3.4.3-1.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td>avr-libc</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/avr-libc-1.2.3-1.cygwin.i386.rpm">avr-libc-1.2.3-1.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/avr-libc-1.2.3-1.i386.rpm">avr-libc-1.2.3-1.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd">avarice</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/avarice-2.4-1.cygwin.i386.rpm">avarice-2.4-1.cygwin.i386.rpm</a></td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/avarice-2.4-1.i386.rpm">avarice-2.4-1.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd">insight (avr-gdb)</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-1.2.0/tools/windows/avr-insight-6.3-1.cygwin.i386.rpm">avr-insight-6.3-1.cygwin.i386.rpm</a></td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/avr-insight-6.3-1.i386.rpm">avr-insight-6.3-1.i386.rpm</a></td>
+</tr>
+
+</tbody></table>
+<i><font color="red">&#8224;</font>If you receive an rpm error that indicates that you have a newer version already installed, try <code>rpm -Uvh --force</code></i>
+
+<p></p>
+<b><em>TI MSP430 Tools</em></b>
+<table border="0">
+<tbody><tr>
+  <td bgcolor="#dddddd"><b>Tool</b></td>
+  <td bgcolor="#dddddd"><b>Windows/Cygwin</b></td>
+  <td bgcolor="#dddddd"><b>Linux</b></td>
+</tr>
+
+<tr>
+  <td>base</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/msp430tools-base-0.1-20050607.cygwin.i386.rpm">msp430tools-base-0.1-20050607.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-base-0.1-20050607.i386.rpm">msp430tools-base-0.1-20050607.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd">python tools</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/msp430tools-python-tools-1.0-1.cygwin.noarch.rpm">msp430tools-python-tools-1.0-1.cygwin.noarch.rpm</a></td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-python-tools-1.0-1.noarch.rpm">msp430tools-python-tools-1.0-1.noarch.rpm</a></td>
+</tr>
+
+
+<tr>
+  <td>binutils</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/msp430tools-binutils-2.16-20050607.cygwin.i386.rpm"> msp430tools-binutils-2.16-20050607.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-binutils-2.16-20050607.i386.rpm">msp430tools-binutils-2.16-20050607.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd">gcc</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/msp430tools-gcc-3.2.3-20050607.cygwin.i386.rpm">msp430tools-gcc-3.2.3-20050607.cygwin.i386.rpm</a></td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-gcc-3.2.3-20050607.i386.rpm">msp430tools-gcc-3.2.3-20050607.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td>libc</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/msp430tools-libc-20050308cvs-20050608.cygwin.i386.rpm">msp430tools-libc-20050308cvs-20050608.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-libc-20050308cvs-20050608.i386.rpm">msp430tools-libc-20050308cvs-20050608.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd">jtag</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/"></a>Not yet available</td>
+  <td bgcolor="#dddddd"><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-jtag-lib-20031101cvs-20050610.i386.rpm">msp430tools-jtag-lib-20031101cvs-20050610.i386.rpm</a></td>
+</tr>
+
+<tr>
+  <td>gdb</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/windows/"></a>Not yet available</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tools/linux/msp430tools-gdb-6.0-20050609.i386.rpm">msp430tools-gdb-6.0-20050609.i386.rpm</a></td>
+</tr>
+
+</tbody></table>
+
+<h1><a name="tinyos-tools">Step 2: Upgrade your TinyOS-specific tools.</a></h1>
+
+<p>
+The TinyOS-specific tools are the NesC compiler and a set of tools
+developed in the tinyos-2.x/tools source code repository. They are
+also installed using rpms. Due to file conflicts between the new version
+of the tinyos-tools and older NesC installations, you must upgrade
+your NesC installation before you upgrade tinyos-tools. 
+Also, if you plan on maintaining a tinyos-1.x tree 
+simultaneously with a tinyos-2.x tree, the tinyos-tools installed for the
+1.x versions must remain installed so use <code>rpm -ivh</code>. If you are 
+only installing a 2.x tree, you can use <code>rpm -Uvh</code>.
+If you using the Cygwin version recommended
+in these install
+instructions, you should install the "Recommended" Windows/Cygwin
+nesC RPM.
+If you
+get strange errors when you try to compile TinyOS programs,
+such as the error message "the procedure entry point basename could not be located
+in the dynamic link library cygwin1.dll", this is likely due
+to a Cygwin version incompatibility: try the "Other" Windows/Cygwin 
+RPM. If you are using Cygwin and installing the nesC RPM 
+causes an error that the RPM was built for Cygwin, add the <tt>--ignoreos</tt>
+option.
+</p>
+
+<b><em>TinyOS-specific Tools</em></b>
+<table border="0">
+<tbody><tr>
+  <td bgcolor="#dddddd"><b>Tool</b></td>
+  <td bgcolor="#dddddd"><b>Recommended Windows/Cygwin</b></td>
+  <td bgcolor="#dddddd"><b>Other Windows/Cygwin</b></td>
+  <td bgcolor="#dddddd"><b>Linux</b></td>
+  <td bgcolor="#dddddd"><b>Command</b></td>
+</tr>
+
+<tr>
+  <td>NesC</td>
+  <td><a href="http://www.tinyos.net/dist-1.2.0/tinyos/windows/nesc-1.2.8a-1.cygwin.i386.rpm">nesc-1.2.8a-1.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-1.2.0/tinyos/windows/nesc-1.2.8b-1.cygwin.i386.rpm">nesc-1.2.8b-1.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-1.2.0/tinyos/linux/nesc-1.2.8a-1.i386.rpm">nesc-1.2.8a-1.i386.rpm </a></td>
+  <td><a href=""></a><code>rpm -Uvh</code><br/><code>rpm -Uvh --ignoreos</code> (if Cygwin complains)</td>
+</tr>
+
+<tr>
+  <td bgcolor="#dddddd"><b>Tool</b></td>
+  <td bgcolor="#dddddd"><b>Windows/Cygwin</b></td>
+  <td bgcolor="#dddddd"><b>32-bit Linux</b></td>
+  <td bgcolor="#dddddd"><b>64-bit Linux</b></td>
+  <td bgcolor="#dddddd"><b>Command</b></td>
+</tr>
+
+<tr>
+  <td>tinyos-tools</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tinyos/windows/tinyos-tools-1.2.4-2.cygwin.i386.rpm">tinyos-tools-1.2.4-2.cygwin.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tinyos/linux/tinyos-tools-1.2.4-3.i386.rpm">tinyos-tools-1.2.4-3.i386.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tinyos/linux/tinyos-tools-1.2.4-3.i686.rpm">tinyos-tools-1.2.4-3.i686.rpm</a></td>
+  <td><a href=""></a><code>rpm -ivh --force</code>&nbsp;(1.x tree)<br><code>rpm -Uvh</code>&nbsp;(no 1.x tree)<br></td>
+</tr>
+
+</tbody></table>
+
+<h1><a name="tinyos2">Step 3: Install the TinyOS 2.x source tree.</a></h1>
+
+Now that the tools are installed, you need only install the tinyos 2.x 
+source tree and then set your environment variables.
+
+<ul>
+<li> Install tinyos-2.x
+
+<p>If you have an existing 1.x tree, we strongly recommend that you use
+the install (<code>-i</code>) rpm argument when installing the tinyos-2.x rpm rather 
+than the upgrade (<code>-U</code>) argument. The difference is that the <code>-U</code> will 
+first remove the tinyos-1.x tree while <code>-i</code> will not remove previously installed
+files. Said another way, we recommend using <code>rpm -ivh</code>.</p>
+
+<p>If you have an existing 2.x tree which you want to keep unchanged, then
+you will need to move it to make space for the new one. For example, if you
+have an existing tree in <tt>/opt/tinyos-2.x/</tt>, then you can move it
+to <tt>/opt/tinyos-2.x-old</tt>. Once you have moved it, we recommend
+performing a forced installation of the 2.0 tree.</p>
+
+<p>If you have an existing 2.x tree which you do not care about, then we
+recommend removing it before installing the new one with a forced install.</p>
+
+<b><em>TinyOS 2.x</em></b>
+<table border="0">
+<tbody><tr>
+  <td bgcolor="#dddddd"><b></b></td>
+  <td bgcolor="#dddddd"><b>Windows/Cygwin</b></td>
+  <td bgcolor="#dddddd"><b>Linux</b></td>
+  <td bgcolor="#dddddd"><b>Command</b></td>
+</tr>
+
+<tr>
+  <td>TinyOS</td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tinyos/windows/tinyos-2.0.2-2.cygwin.noarch.rpm">tinyos-2.0.2-2.cygwin.noarch.rpm</a></td>
+  <td><a href="http://www.tinyos.net/dist-2.0.0/tinyos/linux/tinyos-2.0.2-2.noarch.rpm">tinyos-2.0.2-2.noarch.rpm</a></td>
+  <td><tt>rpm -Uvh</tt> (to upgrade)<br/>
+      <tt>rpm -ivh</tt> (to install)<br/>
+      <tt>rpm -ivh --force</tt> (to force install)<br/>
+  </td>      
+</tr>
+
+</tbody></table></li>
+
+<li> Configure your environment
+<p>
+In TinyOS 1.x, much of your environment was set by the rpm installation process
+by copying a tinyos.sh file into /etc/profile.d which was subsequently run anytime
+a shell was started. Because this was deemed unnecessarily invasive, the 2.x rpm
+does not do this. Rather, you need to set these variables yourself. Ideally, you'll
+put them in a shell script that will run when your shell starts, but you needn't 
+put such a script under /etc/profile.d. 
+</p>
+<p>
+<i>Please take note of the current settings since you'll need those if you want
+to work in your current 1.x tree sometime in the future. </i>
+</p>
+<p>
+The example
+settings below assume that the tinyos-2.x installation is in /opt/tinyos-2.x.
+Change the settings to be correct for where you've put your tinyos-2.x tree. Note
+that the windows CLASSPATH must be a windows-style path, not a cygwin path. You can 
+generate a windows style path from a cygwin-style path using 'cygpath -w'. For example:
+</p>
+<pre>export CLASSPATH=`cygpath -w $TOSROOT/support/sdk/java/tinyos.jar`
+export CLASSPATH="$CLASSPATH;."
+</pre>
+
+<p></p><b><em>TinyOS 2.x</em></b>
+<table border="0">
+<tbody><tr>
+  <td bgcolor="#dddddd"><b>Environment Variable</b></td>
+  <td bgcolor="#dddddd"><b>Windows</b></td>
+  <td bgcolor="#dddddd"><b>Linux</b></td>
+</tr>
+
+<tr>
+  <td>TOSROOT</td>
+  <td>/opt/tinyos-2.x</td>
+  <td>same as in Cygwin</td>
+<td>
+
+</td></tr><tr>
+  <td bgcolor="#dddddd">TOSDIR</td>
+  <td bgcolor="#dddddd">$TOSROOT/tos</td>
+  <td bgcolor="#dddddd">same as in Cygwin</td>
+<td>
+
+</td></tr><tr>
+  <td>CLASSPATH</td>
+  <td>C:\tinyos\cygwin\opt\tinyos-2.x\support\sdk\java\tinyos.jar;.</td>
+  <td>$TOSROOT/support/sdk/java/tinyos.jar:.</td>
+<td>
+
+</td></tr><tr>
+  <td bgcolor="#dddddd">MAKERULES</td>
+  <td bgcolor="#dddddd">$TOSROOT/support/make/Makerules</td>
+  <td bgcolor="#dddddd">same as in Cygwin</td>
+<td>
+
+</td></tr><tr>
+  <td>PATH<font color="red">&#8224;</font></td>
+  <td>/opt/msp430/bin:$PATH</td>
+  <td>same as in Cygwin</td>
+<td>
+
+</td></tr></tbody></table>
+
+<i><font color="red">&#8224;</font>Only necessary if you're using the MSP430 platform/tools.</i>
+
+<p>
+In addition to the above environment variables, do the following on Linux machines:
+</p>
+
+<ol>
+<li> Change the ownership on your /opt/tinyos-2.x files: <code>chown -R&nbsp;&lt;your uid&gt;&nbsp;/opt/tinyos-2.x
+</code></li>
+<li> Change the permissions on any serial (/dev/ttyS&lt;N&gt;), usb
+(/dev/tts/usb&lt;N&gt;, /dev/ttyUSB&lt;N&gt;), or parallel (/dev/parport) devices you
+are going to use: <code>chmod 666 /dev/&lt;devicename&gt;</code></li>
+</ol></li>
+</ul>
+
+<ul>
+<li><p>Finally, if you have installed TinyOS 2.0.1, there is a bug in TOSSIM (which will be fixed in 2.0.2).
+The bug is in file <tt>tos/chips/atm128/sim/atm128_sim.h</tt>. Change these lines 22 and 23 from:</p>
+
+<pre>
+#define _SFR_IO8(io_addr) _MMIO_BYTE((io_addr) + 0x20)
+#define _SFR_IO16(io_addr) _MMIO_WORD((io_addr) + 0x20)
+</pre>
+
+<p>to</p>
+
+<pre>
+#define _SFR_IO8(io_addr) _MMIO_BYTE((io_addr))
+#define _SFR_IO16(io_addr) _MMIO_WORD((io_addr))
+</pre>
+
+<p>If you do not do this, then timers will not work correctly.</p>
+</li>
+</ul>
+
+<h1><a name="tinyos1">Switching back to a TinyOS 1.x tree</a></h1>
+<p>Since the tools are backwardly compatible, you need only change
+your environment variables to point to the 1.x settings. Assuming 
+that your old tree was in /opt/tinyos-1.x, you would use the following 
+values:
+</p>
+
+<b><em>TinyOS 1.x</em></b>
+<table border="0">
+<tbody><tr>
+  <td bgcolor="#dddddd"><b>Environment Variable</b></td>
+  <td bgcolor="#dddddd"><b>Windows</b></td>
+  <td bgcolor="#dddddd"><b>Linux</b></td>
+</tr>
+
+<tr>
+  <td>TOSROOT</td>
+  <td>/opt/tinyos-1.x</td>
+  <td>same as in Cygwin</td>
+<td>
+
+</td></tr><tr>
+  <td bgcolor="#dddddd">TOSDIR</td>
+  <td bgcolor="#dddddd">$TOSROOT/tos</td>
+  <td bgcolor="#dddddd">same as in Cygwin</td>
+<td>
+
+</td></tr><tr>
+  <td>CLASSPATH</td>
+  <td>`$TOSROOT/tools/java/javapath`</td>
+  <td>same as in Cygwin</td>
+<td>
+
+</td></tr><tr>
+  <td bgcolor="#dddddd">MAKERULES</td>
+  <td bgcolor="#dddddd">$TOSROOT/tools/make/Makerules</td>
+  <td bgcolor="#dddddd">same as in Cygwin</td>
+<td>
+
+</td></tr></tbody></table>
+
+<p>Switching between the two should require switching only these environment
+variables.</p>
+</body></html>
diff --git a/doc/index.html b/doc/index.html
new file mode 100644
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--- /dev/null
+++ b/doc/index.html
@@ -0,0 +1,172 @@
+<?xml version="1.0" encoding="utf-8" ?>
+<!DOCTYPE html PUBLIC "-//W3C//Dtd XHTML 1.0 Transitional//EN" "http://www.w3.org/tr/xhtml1/Dtd/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml" xml:lang="en" lang="en">
+  <head>
+    <title>TinyOS 2.0.2 Documentation</title>
+    <link href="stylesheets/tinyos.css" rel="stylesheet" type="text/css"/>
+  </head>
+
+  <body>
+   <center> 
+      <table width="800" cellpadding="4">
+	<tr>
+	  <td class="title">
+	    TinyOS 2.0.2 Documentation<br/>
+	    <div class="subtitle">Last Modified: Jul 30 2007</div>
+	  </td>
+	</tr>
+	<tr>
+	  <td>
+	  <p>
+	    This is the documentation for the TinyOS 2.0.2 release.
+	    There is also documentation for versions <a href="http://www.tinyos.net/dist-2.0.0/tinyos-2.0.1/doc/">2.0.1</a>, <a href="http://www.tinyos.net/dist-2.0.0/tinyos-2.0.0/doc/">2.0.0</a> and <a href="http://www.tinyos.net/tinyos-1.x/doc/">1.x</a>.
+	  </p>
+	  <p>
+	    TinyOS 2.0 has three sets of documentation. The first
+	    set is the release notes and high-level overviews of the
+	    system. The second set is a series of tutorials and a
+	    TinyOS programming manual, which explore different parts
+	    of the system in order to help you get started.  The third
+	    set is detailed documentation of the system, including TEP
+	    (TinyOS Enhancement Proposals), which describe the
+	    structure, design goals, and implementation of parts of
+	    the system as well as nesC and Java source code
+	    documentation.
+	  </p>
+	  <p>
+	    If you're just getting started, the best place to start is with the 
+	    tutorials.
+	  </p>
+	  </td>
+	</tr>
+
+	<tr>
+	  <td class="subtitle">1. Release Notes</td>
+	</tr>
+	<tr>
+	  <td>
+	    <ul>
+	      <li><a href="html/overview.html">TinyOS 2.0 overview</a></li>
+	      <li><a href="html/install-tinyos.html">TinyOS 2.0 install instructions </a></li>
+	      <li><a href="html/upgrade-tinyos.html">TinyOS 2.0 upgrade instructions (includes instructions for how to upgrade your tools for 2.0)</a></li>
+              <li><a href="html/porting.html">A brief set of notes on porting code from TinyOS 1.x to 2.0.</a></li>
+	    </ul>
+	  </td>
+	</tr>
+
+
+	<tr>
+	  <td class="subtitle"><a href="html/tutorial/index.html">2. Tutorials</a></td>
+	</tr>
+	<tr>
+	  <td>
+	  <p>TinyOS 2.0 has a few <a href="html/tutorial/index.html">tutorials</a> to get a new user started with programming
+              the system. These tutorials introduce nesC programming and some major
+              TinyOS abstractions, such as timers and communication.</p>
+	    
+	    <p>Additionally, for more advanced programming, there is a
+	      <a href="pdf/tinyos-programming.pdf">TinyOS Programming Manual</a>.
+	      The book describes nesC's features in greater detail,
+	      including generic components, concurrency, and common
+	      component design patterns.</p>
+	</td>
+	</tr>
+
+
+	<tr>
+	  <td class="subtitle">3A. TEPs and source code documentation</td>
+	</tr>
+	<tr>
+	  <td>
+    <p>
+	    TEPs are written in <a href="http://docutils.sourceforge.net/rst.html">ReStructured
+	    Text</a>, and so can be read either as HTML or as a text
+	    document. TEP 1 describes the different kinds of TEPs and
+	    their roles. TEPs 1-100 are BCP (Best Current Practice)
+	    TEPs, while TEPS 101+ are Informational, Documentary, or
+	    Experimental. Currently, many TEPs are Drafts: comments
+	    and feedback to the authors or the associated working
+	    group is welcome. The following TEPs are Documentary and
+	    BCP: they deal with TinyOS, its protocols, and its
+	    programming interfaces:
+   </p>
+	    <ul>
+	      <li>TEP 1: TEP Structure and Key Words                   [<a href="html/tep1.html">HTML</a>]     [<a href="pdf/tep1.pdf">PDF</a>]   [<a href="txt/tep1.txt">TXT</a>]</li>
+	      <li>TEP 2: Hardware Abstraction Architecture             [<a href="html/tep2.html">HTML</a>]     [<a href="pdf/tep2.pdf">PDF</a>]   [<a href="txt/tep2.txt">TXT</a>]</li>
+	      <li>TEP 3: Coding Standards                              [<a href="html/tep3.html">HTML</a>]     [<a href="pdf/tep3.pdf">PDF</a>]   [<a href="txt/tep3.txt">TXT</a>]</li>
+	      <li>TEP 101: ADC                                         [<a href="html/tep101.html">HTML</a>] [<a href="pdf/tep101.pdf">PDF</a>] [<a href="txt/tep101.txt">TXT</a>]</li>
+	      <li>TEP 102: Timers                                      [<a href="html/tep102.html">HTML</a>] [<a href="pdf/tep102.pdf">PDF</a>] [<a href="txt/tep102.txt">TXT</a>]</li>
+	      <li>TEP 103: Storage                                     [<a href="html/tep103.html">HTML</a>] [<a href="pdf/tep103.pdf">PDF</a>] [<a href="txt/tep103.txt">TXT</a>]</li>
+	      <li>TEP 106: Schedulers and Tasks                        [<a href="html/tep106.html">HTML</a>] [<a href="pdf/tep106.pdf">PDF</a>] [<a href="txt/tep106.txt">TXT</a>]</li>
+	      <li>TEP 107: Boot Sequence                               [<a href="html/tep107.html">HTML</a>] [<a href="pdf/tep107.pdf">PDF</a>] [<a href="txt/tep107.txt">TXT</a>]</li>
+	      <li>TEP 108: Resource Arbitration                        [<a href="html/tep108.html">HTML</a>] [<a href="pdf/tep108.pdf">PDF</a>] [<a href="txt/tep108.txt">TXT</a>]</li>
+	      <li>TEP 109: Sensorboards                                [<a href="html/tep109.html">HTML</a>] [<a href="pdf/tep109.pdf">PDF</a>] [<a href="txt/tep109.txt">TXT</a>]</li>
+	      <li>TEP 111: message_t                                   [<a href="html/tep111.html">HTML</a>] [<a href="pdf/tep111.pdf">PDF</a>] [<a href="txt/tep111.txt">TXT</a>]</li>
+	      <li>TEP 112: Microcontroller Power Management            [<a href="html/tep112.html">HTML</a>] [<a href="pdf/tep112.pdf">PDF</a>] [<a href="txt/tep112.txt">TXT</a>]</li>
+	      <li>TEP 113: Serial Communication                        [<a href="html/tep113.html">HTML</a>] [<a href="pdf/tep113.pdf">PDF</a>] [<a href="txt/tep113.txt">TXT</a>]</li>
+	      <li>TEP 114: SIDs: Source and Sink Independent Drivers   [<a href="html/tep114.html">HTML</a>] [<a href="pdf/tep114.pdf">PDF</a>] [<a href="txt/tep114.txt">TXT</a>]</li>
+	      <li>TEP 115: Power Management of Non-Virtualized Devices [<a href="html/tep115.html">HTML</a>] [<a href="pdf/tep115.pdf">PDF</a>] [<a href="txt/tep115.txt">TXT</a>]</li>
+	      <li>TEP 116: Packet Protocols                            [<a href="html/tep116.html">HTML</a>] [<a href="pdf/tep116.pdf">PDF</a>] [<a href="txt/tep116.txt">TXT</a>]</li>
+	      <li>TEP 117: Low-Level I/O                               [<a href="html/tep117.html">HTML</a>] [<a href="pdf/tep117.pdf">PDF</a>] [<a href="txt/tep117.txt">TXT</a>]</li>
+	      <li>TEP 118: Dissemination                               [<a href="html/tep118.html">HTML</a>] [<a href="pdf/tep118.pdf">PDF</a>] [<a href="txt/tep118.txt">TXT</a>]</li>
+	      <li>TEP 119: Collection                                  [<a href="html/tep119.html">HTML</a>] [<a href="pdf/tep119.pdf">PDF</a>] [<a href="txt/tep119.txt">TXT</a>]</li>
+	      <li>TEP 123: Collection Tree Protocol (CTP)              [<a href="html/tep123.html">HTML</a>] [<a href="pdf/tep123.pdf">PDF</a>] [<a href="txt/tep123.txt">TXT</a>]</li>
+	      <li>TEP 124: Link Estimation Exchange Protocol (LEEP)    [<a href="html/tep124.html">HTML</a>] [<a href="pdf/tep124.pdf">PDF</a>] [<a href="txt/tep124.txt">TXT</a>]</li>
+	      <li>TEP 125: TinyOS 802.15.4 Frames                      [<a href="html/tep125.html">HTML</a>] [<a href="pdf/tep125.pdf">PDF</a>] [<a href="txt/tep125.txt">TXT</a>]</li>
+	      <li>TEP 126: CC2420 Radio Stack                          [<a href="html/tep126.html">HTML</a>] [<a href="pdf/tep126.pdf">PDF</a>] [<a href="txt/tep126.txt">TXT</a>]</li>
+	      <li>TEP 127: Packet Link Layer                           [<a href="html/tep127.html">HTML</a>] [<a href="pdf/tep127.pdf">PDF</a>] [<a href="txt/tep127.txt">TXT</a>]</li>
+	      <li>TEP 128: Platform Independent Non-Volatile Storage Abstractions [<a href="html/tep128.html">HTML</a>] [<a href="pdf/tep128.pdf">PDF</a>] [<a href="txt/tep128.txt">TXT</a>]</li>
+	      <li>TEP 129: Basic Platform Independent Non-Volatile Storage Layers [<a href="html/tep129.html">HTML</a>] [<a href="pdf/tep129.pdf">PDF</a>] [<a href="txt/tep129.txt">TXT</a>]</li>
+	      <li>TEP 130: Testbeds - Setup and Interfaces             [<a href="html/tep130.html">HTML</a>] [<a href="pdf/tep130.pdf">PDF</a>] [<a href="txt/tep130.txt">TXT</a>]</li>
+	    </ul>
+
+	    <p>In addition, there are several TEPs which deal with issues besides TinyOS code, such
+	      as the structure of the TinyOS Alliance and design considerations:</p>
+
+	    <ul>
+	      <li>TEP 120: TinyOS Alliance Structure                   [<a href="html/tep120.html">HTML</a>] [<a href="pdf/tep120.pdf">PDF</a>] [<a href="txt/tep120.txt">TXT</a>]</li>
+	      <li>TEP 121: Towards TinyOS for 8051                     [<a href="html/tep121.html">HTML</a>] [<a href="pdf/tep121.pdf">PDF</a>] [<a href="txt/tep121.txt">TXT</a>]</li>
+	    </ul>
+          </td>
+        </tr>
+	<tr>
+	  <td class="subtitle"><a href="nesdoc/">3B. TinyOS Source Code Documentation</a></td>
+	</tr>
+  <tr>
+    <td>
+	  <p>In addition to TEPs, which document the organization and design behind 
+	  important parts of TinyOS, there is also <a href="nesdoc/">source code
+	  documentation</a> for the following platforms: 
+	  <a href="nesdoc/eyesIFXv2/index.html">eyesIFXv2</a>, 
+	  <a href="nesdoc/iris/index.html">iris</a>, 
+	  <a href="nesdoc/mica2/index.html">mica2</a>, 
+	  <a href="nesdoc/mica2dot/index.html">mica2dot</a>, 
+	  <a href="nesdoc/micaz/index.html">micaz</a>, 
+	  <a href="nesdoc/shimmer/index.html">shimmer</a>,
+	  <a href="nesdoc/telosa/index.html">telosb</a>, 
+	  <a href="nesdoc/telosb/index.html">telosb</a> and 
+	  <a href="nesdoc/tinynode/index.html">tinynode</a>.</p>
+
+	<p>The build status, history, memory statistics and power profiles of 
+	regression builds of selected TinyOS applications can be seen online on the 
+	<a href="http://tik42x.ee.ethz.ch:8080">TinyOS CruiseControl Server</a>.</p>	 
+    </td>
+  </tr>
+  <tr>
+	<td class="subtitle"><a href="javadoc/index.html"> 3C. TinyOS Java toolchain Code Documentation</a></td>
+  </tr>
+  <tr>
+    <td>
+          <p>There is similar 
+	  <a href="javadoc/index.html">javadoc documentation</a> for the Java toolchain, 
+             which describes the Java classes and their functionality. This documentation
+             is incomplete. 
+          </p>
+
+	  </td>
+	</tr>
+      </table>
+    </center>
+  </body>
+
+</html>
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diff --git a/doc/pdf/tinyos-programming.pdf b/doc/pdf/tinyos-programming.pdf
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diff --git a/doc/policy/owners.txt b/doc/policy/owners.txt
new file mode 100644
index 00000000..88464826
--- /dev/null
+++ b/doc/policy/owners.txt
@@ -0,0 +1,51 @@
+Owners by directory
+===================
+[For stuff which cleanly fits in a directory]
+
+tos/chips
+---------
+ad5200: Kevin Klues  [eyes?]
+at45db: David Gay [mica family storage]
+atm128: Martin Turon (Xbow), David Gay [mica family microcontroller]
+cc1000: David Gay [mica2 radio]
+cc2420: Phil Levis, Jonathan Hui [802.15.4 radio]
+msp430: Arched Rock, TU Berlin [microcontroller]
+pxa27x: Phil Buonadonna [imote2 microcontroller]
+stm25p: Jonathan Hui [telosb storage]
+tda5250: TU Berlin (who?) [eyes radio]
+
+tos/lib
+-------
+adc: Jan Hauer, David Gay [adc support components]
+gpio: Martin Turon [polling-based interrupt emulation]
+oski: Phil Levis [a service distribution]
+serial: Ben Greenstein, Phil Levis [serial port protocol]
+timer: Cory Sharp [timer support components]
+tossim: Phil Levis [simulation environment]
+
+tos/oski [is it tos/oski or tos/lib/oski??]
+
+tos/platforms
+-------------
+eyesIFX: TU Berlin
+intelmote2: Phil Buonadonna
+mica: Martin Turon, David Gay [mica family support]
+mica2: Martin Turon, David Gay
+micaz: Martin Turon, Phil Levis
+telosa: Arched Rock
+telosb: Arched Rock
+
+tos/sensorboards
+----------------
+mts300: Martin Turon [mica family sensor board]
+
+Owners by subsystem
+===================
+[For things without their own well-defined directory, or which don't
+have a directory yet]
+
+Arbiters: Kevin Klues
+Power management: Phil Levis, Vlado Handziski, Kevin Klues
+Security: Phil Levis, David Gay
+Scheduler, booting: Phil Levis
+Random numbers: Phil Levis
diff --git a/doc/policy/policy.txt b/doc/policy/policy.txt
new file mode 100644
index 00000000..119b08c6
--- /dev/null
+++ b/doc/policy/policy.txt
@@ -0,0 +1,51 @@
+TinyOS 2.x collaboration policy
+-------------------------------
+
+In the interest of furthering effective collaboration on the TinyOS 2.x
+project, we will manage development of TinyOS using the following policies.
+
+1) TinyOS 2.x is composed of a number of independent subsystems (radios,
+sensors, booting, etc) whose design is reflected in TEPs (see TEP 1 for
+more details on TEP structure). Individual TEPs are generally written by a
+subset of the TinyOS 2.x working group members, based on a consensus of the
+whole working group and more detailed discussions by the subset.
+
+2) Changes to TEPs should be proposed to the group as a whole, for
+discussion. If consensus is reached, the TEP can be changed.
+
+3) Code development is divided into a number of subsystems, which often,
+but not always, reflect TEP and platform boundaries (e.g., "storage for the
+mica2", "the scheduler", etc). A subsystem has an owner (one or more
+members or company represented in the working group) and a target
+completion date.
+
+4) To avoid the introduction of bugs, and except as discussed below, a
+subsystem's code should only be committed to the TinyOS 2.x CVS repository
+by its owners. [Thought for discussion: allow people to create arbitrary
+branches and commit on those?]
+
+5) If you find a trivial bug (e.g., an extra character that prevents
+compilation) you can commit a change to any subsystem. Please email
+me the subsystem's owner or the mailing list when you do this.
+
+6) If you find the need to make a substantial change, fix a non-trivial
+bug, or make a trivial API change to a subsystem (e.g., it's missing an
+Init interface that is present on another platform), email the TinyOS 2.x
+mailing list with your proposed change (diffs are helpful). You can commit
+this change on agreement from the subsystem's owner, or after 48 hours if
+no response is received. Disagreements about the change should be resolved
+with the subsystem's owner or the mailing list as a whole.
+
+7) If you find that a subsystem needs API changes, you should present these
+to the TinyOS 2.x mailing list. Once consensus is reached, the code can
+be changed and any related TEPs updated.
+
+8) If progress on a subsystem has stalled, its completion target date has
+passed, or its completion target date is holding up progress of the
+rest of TinyOS 2.x (and dependent projects), you can propose reassigning
+the subsystem to a new owner. You should have a new owner lined up who
+can meet the necessary target dates. This reassignment proposal must
+be made to the TinyOS 2.x list. Once consensus is reached, or if no
+response is received from the subsystem's owners after a week, the
+subsystem will be reassigned.
+
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index 00000000..3adf931e
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diff --git a/doc/txt/overview.txt b/doc/txt/overview.txt
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--- /dev/null
+++ b/doc/txt/overview.txt
@@ -0,0 +1,429 @@
+============================
+TinyOS 2.0 Overview
+============================
+
+:Author: Philip Levis
+:Date: Oct 30 2006
+
+.. Note::
+ 
+   This document gives a brief overview of TinyOS 2.0, highlighting how
+   and where it departs from 1.1 and 1.0. Further detail on these changes
+   is detailed in TEP (TinyOS Enhancement Proposal) documents. 
+
+1. Introduction
+====================================================================
+
+TinyOS 2.0 is a clean slate redesign and re-implementation of TinyOS.
+Its development was motivated by our belief that many aspects of 1.x
+strain to meet requirements and uses that were not foreseen
+when it was designed and implemented. The structure and interfaces 1.x
+defines have several fundamental limitations. While these limitations
+can be worked around, this practice has led to tightly coupled
+components, hard to find interactions, and a very steep learning curve
+for a newcomer to sensor network programming.
+
+TinyOS 2.0 is not backwards compatible with 1.x: code written for the
+latter will not compile for the former. However, one important aspect
+of 2.0's design is to minimize the difficulty of upgrading
+code. Therefore, while porting a 1.x application to 2.0 will require
+some work, it should not be very much. 
+
+This document provides a high-level overview of 2.0 and describes some
+of the ways in which it departs from 1.x. It covers the basic TinyOS
+abstractions, such as hardware abstractions, communication, timers,
+the scheduler, booting and initialization. Further detail on each of
+these can be found in TEPs (TinyOS Enhancement Proposals), which
+document and describe these abstractions.
+
+2. Platforms/Hardware Abstraction
+====================================================================
+
+Platforms exist in the ``tos/platforms`` subdirectory. In TinyOS 2.0, a
+*platform* is a collection of *chips* and some glue code that connects
+them together. For example, the mica2 platform is the CC1000 radio
+chip and the ATmega128 microcontroller, while the micaZ platform is
+the CC2420 radio and the ATmega128 microcontroller, and the Teloi
+platforms are the CC2420 radio and the MSP430 microcontroller. Chip
+code exists in ``tos/chips``. A platform directory generally has a
+``.platform`` file, which has options to pass to the nesC compiler. For
+example, the mica2 .platform file tells ncc to look in ``chips/cc1000``
+and ``chips/atm128`` directories, as well as to use avr-gcc to compile a
+mote binary (Teloi platforms tell it to use msp430-gcc). 
+
+Hardware abstractions in TinyOS 2.0 generally follow a three-level
+abstaction heirarchy, called the HAA (Hardware Abstraction
+Architecture).
+
+At the bottom of the HAA is the HPL (Hardware Presentation Layer). The
+HPL is a thin software layer on top of the raw hardware, presenting
+hardare such as IO pins or registers as nesC interfaces. The HPL
+generally has no state besides the hardware itself (it has no
+variables). HPL components usually have the prefix ``Hpl``, followed by
+the name of the chip. For example, the HPL components of the CC1000
+begin with ``HplCC1000``.
+
+The middle of the HAA is the HAL (Hardware Abstraction Layer). The HAL
+builds on top of the HPL and provides higher-level abstractions that
+are easier to use than the HPL but still provide the full
+functionality of the underlying hardware. The HAL components usually have
+a prefix of the chip name. For example, the HAL components of the CC1000
+begin with ``CC1000``.
+
+The top of the HAA is the HIL (Hardware Independent Layer). The HIL
+builds on top of the HAL and provides abstractions that are hardware
+independent. This generalization means that the HIL usually does not
+provide all of the functionality that the HAL can. HIL components have
+no naming prefix, as they represent abstractions that applications can
+use and safely compile on multiple platforms. For example, the HIL
+component of the CC1000 on the mica2 is ``ActiveMessageC``, representing
+a full active message communication layer.
+
+The HAA is described in TEP 2: Hardware Abstraction Architecture[TEP2_].
+
+Currently (as of the 2.0 release in November 2006), TinyOS 2.0 supports
+the following platforms:
+
+ * eyesIFXv2
+ * intelmote2
+ * mica2
+ * mica2dot
+ * micaZ
+ * telosb
+ * tinynode
+ * btnode3
+
+
+The btnode3 platform is not included in the RPM.
+
+3. Scheduler
+====================================================================
+
+As with TinyOS 1.x, TinyOS 2.0 scheduler has a non-preemptive FIFO
+policy. However, tasks in 2.0 operate slightly differently than in
+1.x.
+
+In TinyOS 1.x, there is a shared task queue for all tasks, and a
+component can post a task multiple times. If the task queue is full,
+the post operation fails. Experience with networking stacks showed
+this to be problematic, as the task might signal completion of a
+split-phase operation: if the post fails, the component above might
+block forever, waiting for the completion event.
+
+In TinyOS 2.x, every task has its own reserved slot in the task queue,
+and a task can only be posted once. A post fails if and only if the
+task has already been posted. If a component needs to post a task
+multiple times, it can set an internal state variable so that when
+the task executes, it reposts itself.
+
+This slight change in semantics greatly simplifies a lot of component
+code. Rather than test to see if a task is posted already before
+posting it, a component can just post the task. Components do not have
+to try to recover from failed posts and retry. The cost is one byte of
+state per task. Even in large systems such as TinyDB, this cost is
+under one hundred bytes (in TinyDB is is approximately 50).
+
+Applications can also replace the scheduler, if they wish. This allows
+programmers to try new scheduling policies, such as priority- or
+deadline-based. It is important to maintain non-preemptiveness,
+however, or the scheduler will break all nesC's static concurrency
+analysis. Details on the new scheduler and how to extend it can be found
+in TEP 106: Schedulers and Tasks[TEP106_].
+
+4. Booting/Initialization
+====================================================================
+
+TinyOS 2.0 has a different boot sequence than 1.x. The 1.x interface
+``StdControl`` has been split into two interfaces: ``Init`` and
+``StdControl``. The latter only has two commands: ``start`` and ``stop``.
+In TinyOS 1.x, wiring components to the boot sequence would cause them
+to be powered up and started at boot. That is no longer the case: the
+boot sequence only initializes components. When it has completed
+initializing the scheduler, hardware, and software, the boot sequence
+signals the ``Boot.booted`` event. The top-level application component
+handles this event and start services accordingly. Details on
+the new boot sequence can be found in TEP 107: TinyOS 2.x Boot
+Sequence[TEP107_].
+
+5. Virtualization
+====================================================================
+
+TinyOS 2.0 is written with nesC 1.2, which introduces the concept
+of a 'generic' or instantiable component. Generic modules allow
+TinyOS to have reusable data structures, such as bit vectors and
+queues, which simplify development. More importantly, generic
+configurations allow services to encapsulate complex wiring 
+relationships for clients that need them.
+
+In practice, this means that many basic TinyOS services are now
+*virtualized.* Rather than wire to a component with a parameterized
+interface (e.g., GenericComm or TimerC in 1.x), a program instantiates
+a service component that provides the needed interface. This
+service component does all of the wiring underneath (e.g., in the
+case of timers, to a unique) automatically, reducing wiring
+mistakes and simplifying use of the abstraction.
+
+6. Timers
+====================================================================
+
+TinyOS 2.0 provides a much richer set of timer interfaces than
+1.x. Experience has shown that timers are one of the most critical
+abstractions a mote OS can provide, and so 2.0 expands the fidelity
+and form that timers take. Depending on the hardware resources of a
+platform, a component can use 32KHz as well as millisecond granularity
+timers, and the timer system may provide one or two high-precision
+timers that fire asynchronously (they have the async
+keyword). Components can query their timers for how much time
+remainins before they fire, and can start timers in the future (e.g.,
+'start firing a timer at 1Hz starting 31ms from now'). TEP 102: 
+Timers[TEP102_] defines what HIL components a platform must provide
+in order to support standard TinyOS timers. Platforms are
+required to provide millisecond granularity timers, and can provide
+finer granularity timers (e.g., 32kHz) if needed.
+
+Timers present a good example of virtualization in 2.0. In 1.x,
+a program instantiates a timer by wiring to TimerC::
+
+  components App, TimerC;
+  App.Timer -> TimerC.Timer[unique("Timer")];
+
+In 2.0, a program instantiates a timer::
+
+  components App, new TimerMilliC();
+  App.Timer -> TimerMilliC;
+
+
+
+7. Communication
+====================================================================
+
+In TinyOS 2.0, the message buffer type is ``message_t``, and it is a
+buffer that is large enough to hold a packet from any of a node's
+communication interfaces. The structure itself is completely opaque:
+components cannot reference its fields. Instead, all buffer accesses
+go through interfaces. For example, to get the destination address of
+an AM packet named ``msg``, a component calls ``AMPacket.destination(msg)``.
+
+Send interfaces distinguish the addressing mode of communication
+abstractions. For example, active message communication has the
+``AMSend`` interface, as sending a packet require an AM destination
+address. In contrast, broadcasting and collection tree abstractions
+have the address-free ``Send`` interface.
+
+Active messages are the network HIL. A platform's ``ActiveMessageC``
+component defines which network interface is the standard
+communication medium. For example, a mica2 defines the CC1000 active
+message layer as ActiveMessageC, while the TMote defines the CC2420
+active message layer as ActiveMessageC.
+
+There is no longer a TOS_UART_ADDRESS for active message
+communication.  Instead, a component should wire to
+SerialActiveMessageC, which provides active message communication over
+the serial port.
+
+Active message communication is virtualized through four generic 
+components, which take the AM type as a parameter: AMSenderC, 
+AMReceiverC, AMSnooperC, and AMSnoopingReceiverC. AMSenderC is
+virtualized in that the call to send() does not fail if some
+other component is sending (as it does with GenericComm in 1.x). Instead,
+it fails only if that particular AMSenderC already has a packet
+outstanding or if the radio is not in a sending state. Underneath,
+the active message system queues and sends these outstanding packets.
+This is different than the QueuedSendC approach of 1.x, in which there
+is an N-deep queue that is shared among all senders. With N AMSenderC 
+components, there is an N-deep queue where each sender has a single
+reserved entry. This means that each AMSenderC receives 
+1/n of the available post-MAC transmission opportunities,  where
+n is the number of AMSenderC components with outstanding packets.
+In the worst case, n is the number of components; even when every
+protocol and component that sends packets is trying to send a packet,
+each one will receive its fair share of transmission opportunities.
+
+Further information on message_t can be found in TEP 111:
+message_t[TEP111_], while further information on AM can be
+found in TEP 116: Packet Protocols[TEP116_].
+
+The current TinyOS release has a low-power stack for the CC1000
+radio (mica2 platform) and an experimental low-power stack for
+the CC2420 radio (micaz, telosb, and intelmote2 platforms). 
+
+
+8. Sensors
+====================================================================
+
+In TinyOS 2.0, named sensor components comprise the HIL of a
+platform's sensors. TEP 114 describes a set of HIL data acquisition
+interfaces, such as Read, ReadStream, and Get, which sensors
+provide according to their acquisition capabilities.
+
+If a component needs
+high-frequency or very accurate sampling, it must use the HAL, which
+gives it the full power of the underlying platform (highly accurate
+platform-independent sampling is not really feasible, due to the
+particulars of individual platforms). ``Read`` assumes that the
+request can tolerate some latencies (for example, it might schedule
+competing requests using a FIFO policy). 
+
+Details on the ADC subsystem can be found in
+TEP 101: Analog-to-Digital Converters[TEP101_]; details on
+the organization of sensor boards can be found in TEP 109:
+Sensorboards[TEP109_], and the details of the HIL sensor interfaces
+can be found in TEP 114: Source and Sink Independent Drivers[TEP114_].
+
+
+9. Error Codes
+====================================================================
+
+The standard TinyOS 1.x return code is ``result_t``, whose value is
+either SUCCESS (a non-zero value) or FAIL (a zero value). While this
+makes conditionals on calls very easy to write (e.g., ``if (call
+A.b())``), it does not allow the callee to distinguish causes of error
+to the caller. In TinyOS 2.0, ``result_t`` is replaced by ``error_t``,
+whose values include SUCCESS, FAIL, EBUSY, and ECANCEL. Interface
+commands and events define which error codes they may return and why.
+
+From the perspective of porting code, this is the most significant
+different in 2.0. Calls that were once::
+
+  if (call X.y()) {
+    busy = TRUE;  
+  }
+
+
+now have their meanings reversed. In 1.x, the busy statement will execute
+if the call succeeds, while in 2.0 it will execute if the call fails.
+This encourages a more portable, upgradable, and readable approach::
+
+  if (call X.y() == SUCCESS) {
+    busy = TRUE;
+  }
+
+10. Arbitration
+====================================================================
+
+While basic abstractions, such as packet communication and timers,
+can be virtualized, experiences with 1.x showed that some cannot 
+without either adding significant complexity or limiting the system.
+The most pressing example of this is a shared bus on a microcontroller.
+Many different systems -- sensors, storage, the radio -- might need
+to use the bus at the same time, so some way of arbitrating access
+is needed. 
+
+To support these kinds of abstractions, TinyOS 2.0 introduces 
+the Resource interface, which components use to request and
+acquire shared resources, and arbiters, which provide a policy for 
+arbitrating access between multiple clients. For some abstractions,
+the arbiter also provides a power management policy, as it can tell
+when the system is no longer needed and can be safely turned off.
+
+TEP 108: Resource Arbitration[TEP108_] describes the Resource interface
+and how arbiters work.
+
+11. Power Management
+====================================================================
+
+Power management in 2.0 is divided into two parts: the power state
+of the microcontroller and the power state of devices. The former,
+discussed in TEP 112: Microcontroller Power Management[TEP112_],
+is computed in a chip-specific manner by examining which devices 
+and interrupt souces are active. The latter, discussed in
+TEP 115: Power Management of Non-Virtualised Devices{TEP115_], is handled
+through resource abiters. Fully virtualized services have their
+own, individual power management policies.
+
+TinyOS 2.0 provides low-power stacks for the CC1000 (mica2)
+and CC2420 (micaz, telosb, imote2) radios. Both use a low-power
+listening apporach, where transmitters send long preambles or
+repeatedly send packets and receivers wake up periodically to 
+sense the channel to hear if there is a packet being 
+transmitted. The low-power stack CC1000 is standard, while
+the CC2420 stack is experimental. That is, the default CC1000
+stack (chips/cc1000) has low-power-listening, while the default 
+CC2420 stack (chips/cc2420) does not. To use the low-power CC2420
+stack, you must include chips/cc2420_lpl in your application Makefile.
+
+12. Network Protocols
+====================================================================
+
+TinyOS 2.0 provides simple reference implementations of two of 
+the most basic protocols used in mote networks: dissemination
+and collection. Dissemination reliably delivers small (fewer 
+than 20 byte) data items to every node in a network, while
+collection builds a routing tree rooted at a sink node. Together,
+these two protocols enable a wide range of data collection
+applications. Collection has advanced significantly since the
+most recent beta release; experimental tests in multiple 
+network conditions have seen very high (>98%) deliver rates
+as long as the network is not saturated.
+
+13. Conclusion
+====================================================================
+
+TinyOS 2.0 represents the next step of TinyOS development. Building on
+user experiences over the past few years, it has taken the basic
+TinyOS architecture and pushed it forward in several directions,
+hopefully leading to simpler and easier application development. It is
+still under active development: future prereleases will include
+non-volatile storage, basic multihop protocols (collection routing,
+dissemination), and further power management abstractions.
+
+14. Acknowledgments
+====================================================================
+
+TinyOS 2.0 is the result of a lot of hard work from a lot of people,
+including (but not limited to) David Gay, Philip Levis, Cory Sharp, 
+Vlado Handziski, Jan Hauer, Kevin Klues, Joe Polastre, Jonathan Hui, 
+Prabal Dutta, 
+Gilman Tolle, Martin Turon, Phil Buonodonna, Ben Greenstein, David Culler, 
+Kristin Wright, Ion Yannopoulos, Henri Dubois-Ferriere, Jan Beutel, 
+Robert Szewczyk, Rodrigo Fonseca, Kyle Jamieson, Omprakash Gnawali,
+David Moss, and Kristin Wright.
+
+
+15. Author's Address
+====================================================================
+
+| Philip Levis
+| 358 Gates
+| Computer Systems Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+|
+| email - pal@cs.stanford.edu
+
+16. Citations
+====================================================================
+
+.. [TEP1] TEP 1: TEP Structure and Keywords. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep1.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP2] TEP 2: Hardware Abstraction Architecture. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep2.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP3] TEP 3: Coding Standard. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep3.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP101] TEP 101: Analog-to-Digital Converters. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep101.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP102] TEP 102: Timers. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep102.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP106] TEP 106: Schedulers and Tasks. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep106.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP107] TEP 107: Boot Sequence. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep107.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP108] TEP 108: message_t. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep108.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP109] TEP 109: Sensorboards. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep109.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP110] TEP 110: Service Distributions. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep110.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP111] TEP 111: message_t. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep111.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP112] TEP 112: Microcontroller Power Management. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep112.html?pathrev=tinyos-2_0_devel-BRANCH
+
+.. [TEP113] TEP 113: Serial Communication. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep113.html?pathrev=tinyos-2_0_devel-BRANCH
+ 
+.. [TEP114] TEP 114: SIDs: Source and Sink Independent Drivers. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep114.html?pathrev=tinyos-2_0_devel-BRANCH
+ 
+.. [TEP115] TEP 115: Power Management of Non-Virtualised Devices. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep115.html?pathrev=tinyos-2_0_devel-BRANCH
+ 
+.. [TEP116] TEP 116: Packet Protocols. http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep116.html?pathrev=tinyos-2_0_devel-BRANCH
diff --git a/doc/txt/porting.txt b/doc/txt/porting.txt
new file mode 100644
index 00000000..8e7dbde6
--- /dev/null
+++ b/doc/txt/porting.txt
@@ -0,0 +1,85 @@
+========================================================
+Porting TinyOS 1.x Code to TinyOS 2.0
+========================================================
+
+:Author: Tahir Azim and Philip Levis
+:Date: October 26 2006
+
+.. Note::
+ 
+   This document provides a few important points that describe 
+   major steps required for porting TinyOS 1.x code to TinyOS 2.0.
+   It is based on Tahir Azim's experience porting Beacon Vector
+   Routing (BVR[1_]) from TinyOS 1.x to T2. This document is not
+   a complete porting guide, but the hope is that it will provide
+   some help or guidance.
+
+1. Porting Points
+====================================================================
+
+As these observations come from porting a network protocol, they are
+rather protocol-centric and do not consider other abstractions such
+as storage. We hope to add such points in the future.
+
+  1.    SUCCESS was a non-zero error code in TinyOS 1.x, while FAIL was non-zero. So any "if blocks" of the following form need to be changed::
+
+           if (call Packet...) {
+               //SUCCESS!: do this...
+           }
+
+  In TinyOS 2.x, SUCCESS is equal to a zero error code, while other error codes are non-zero. So calls like this should be changed to make sure they test the result for equality with SUCCESS::
+
+         if (call Packet... () == SUCCESS ) { 
+               //SUCCESS!: do this...
+           }
+
+  2.    The "init()" and "start/stop()" methods in StdControl have been separated in TinyOS 2.x. The init() method is now part of the "Init" interface. Therefore all modules implementing StdControl should now implement Init also. Modules wired to the StdControl interface of a module should also wire to its Init interface. 
+
+  3.    The nx_bool data type should be replaced by nx_uint8_t.
+
+  4.    Radios need to be started manually using SplitControl.start() and SplitControl.stop() at the beginning of the simulation. In TinyOS 1.x, this was assumed to be done automatically by TOSSIM/TinyOS. 
+
+  5.    Packets are now an abstract data type (ADT) in TinyOS 2.x. Therefore, destination addresses from packets can no longer be obtained by using "msg -> addr". Instead the AMPacket.destination() method of the AMPacket interface should be used for this purpose. AMSenderC or AMReceiverC can be used to wire the AMPacket interface.
+
+  6.    Similarly, in order to get a pointer to the payload of received message_t structures, and to get the payload lengths and maximum payload lengths of message_t structures, the Packet interface is used. This can also be wired to an AMSenderC or AMReceiverC component.  Similarly, instead of using "msg->strength" to get the strength of a received signal, CC2420Packet.getRssi(msg) can be used. The CC2420Packet interface can be wired to CC2420ActiveMessageC.
+
+  7.    Communication interfaces are very similar but require straightforward porting. SendMsg and ReceiveMsg interfaces (wherever used or provided by various modules) should be replaced by AMSend and Receive interfaces. At the lowest layer of the communication stack, AMSend and Receive interfaces should be wired to AMSenderC and AMReceiverC. 
+
+  8.    Where a module that previously provided SendMsg is changed to provide AMSend, extra methods have to be added that are part of the AMSend signature. These include the cancel, getPayload and maxPayloadLength methods. The Packet interface wired to AMSenderC can generally be used to implement these methods. 
+
+  9.    TOS_UART_ADDRESS no longer exists. Use an SerialAMSenderC component when you would like to send to the serial port.
+
+  10.   TOS_LOCAL_ADDRESS no longer exists. There is now a distinction between the local node's ID (which is TOS_NODE_ID) and the active message address. The active message address of a communication interface can be obtained through the AMPacket.localAddress() command. By default, node ID and AM address are the same. TOS_NODE_ID is bound at compile-time, while an interface's AM address can be changed at runtime.
+
+  11.    Calls such as Leds.greenToggle(), Leds.yellowToggle() etc need to be replaced by Leds.led1Toggle(), Leds.led2Toggle() etc.
+
+  12.    You should no longer use "#ifdef PLATFORM_PC" to separate pieces of code that are to run only on the 'pc' target. Instead, "#ifdef TOSSIM" is used to identify blocks of code that should be run only in TOSSIM. 
+
+  13.    dbg messages no longer use one of the debug modes of the form, DBG_* as their first argument. Instead, they should be replaced with strings identifying the sources from where the messages originated. 
+
+2. Author's Address
+====================================================================
+
+| Tahir Azim
+| 358 Gates Hall
+| Computer Systems Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| email - tazim@cs.stanford.edu
+|
+| Philip Levis
+| 358 Gates Hall
+| Computer Systems Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+|
+| email - pal@cs.stanford.edu
+
+3. Citations
+====================================================================
+
+.. [1] Rodrigo Fonseca, David Culler, Sylvia Ratnasamy, Scott Shenker, and Ion Stoica. "Beacon Vector Routing: Scalable Point-to-Point Routing in Wireless Sensornets." In Proceedings of the Second USENIX/ACM Symposium on Network Systems Design and Implementation (NSDI 2005).
+
diff --git a/doc/txt/tep1.txt b/doc/txt/tep1.txt
new file mode 100644
index 00000000..923c1c72
--- /dev/null
+++ b/doc/txt/tep1.txt
@@ -0,0 +1,267 @@
+============================
+TEP Structure and Keywords 
+============================
+
+:TEP: 1
+:Group: Core Working Group 
+:Type: Best Current Practice
+:Status: Final
+:TinyOS-Version: All
+:Author: Philip Levis
+
+.. Note::
+
+   This document specifies a Best Current Practices for the
+   TinyOS Community, and requests discussion and suggestions for
+   improvements.  Distribution of this memo is unlimited.
+
+Abstract
+====================================================================
+
+This memo describes the structure all TinyOS Extension Proposal (TEP)
+documents follow, and defines the meaning of several key words in
+those documents.
+
+1. Introduction
+====================================================================
+
+In order to simplify management, reading, and tracking development,
+all TinyOS Extension Proposals (TEPs) MUST have a particular
+structure. Additionally, to simplify development and improve
+implementation interoperability, all TEPs MUST observe the meaning of
+several key words that specify levels of compliance. This document
+describes and follows both.
+
+2. Keywords
+====================================================================
+
+The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT",
+"SHOULD", "SHOULD NOT", "RECOMMENDED", "MAY", and "OPTIONAL" in this
+document are to be interpreted as described in TEP 1.
+
+Note that the force of these words is modified by the requirement
+level of the document in which they are used. These words hold their
+special meanings only when capitalized, and documents SHOULD avoid using
+these words uncapitalized in order to minimize confusion.
+
+
+2.1 MUST
+--------------------------------------------------------------------
+
+MUST: This word, or the terms "REQUIRED" or "SHALL", mean that the
+definition is an absolute requirement of the specification.
+
+2.2 MUST NOT
+--------------------------------------------------------------------
+
+MUST NOT: This phrase, or the phrase "SHALL NOT", mean that the
+definition is an absolute prohibition of the specification.
+
+2.3 SHOULD
+--------------------------------------------------------------------
+
+SHOULD: This word, or the adjective "RECOMMENDED", mean that there
+may exist valid reasons in particular circumstances to ignore a
+particular item, but the full implications must be understood and
+carefully weighed before choosing a different course.
+
+2.4 SHOULD NOT
+--------------------------------------------------------------------
+
+SHOULD NOT: This phrase, or the phrase "NOT RECOMMENDED" mean that
+there may exist valid reasons in particular circumstances when the
+particular behavior is acceptable or even useful, but the full
+implications should be understood and the case carefully weighed
+before implementing any behavior described with this label.
+
+2.5 MAY
+--------------------------------------------------------------------
+
+MAY: This word, or the adjective "OPTIONAL", mean that an item is
+truly optional.  One implementer may choose to include the item
+because a particular application requires it or because the
+implementer feels that it enhances the system while another
+implementer may omit the same item.  An implementation which does not
+include a particular option MUST be prepared to interoperate with
+another implementation which does include the option, though perhaps
+with reduced functionality. In the same vein an implementation which
+does include a particular option MUST be prepared to interoperate with
+another implementation which does not include the option (except, of
+course, for the feature the option provides.)
+
+2.6 Guidance in the use of these Imperatives
+--------------------------------------------------------------------
+
+Imperatives of the type defined in this memo must be used with care
+and sparingly.  In particular, they MUST only be used where it is
+actually required for interoperation or to limit behavior which has
+potential for causing harm (e.g., limiting retransmissions)  For
+example, they must not be used to try to impose a particular method
+on implementors where the method is not required for
+interoperability.
+
+
+3. TEP Structure
+====================================================================
+
+TEPs have two major parts, a header and a body. The header states
+document metadata, for management and status. The body contains the 
+content of the proposal.
+
+All TEPs MUST conform to reStructuredText standards [1]_ and follow
+the docutils template, to enable translation from  reStructuredText
+to HTML and LaTeX.
+
+3.1 TEP Header
+--------------------------------------------------------------------
+
+The TEP header has several fields which MUST be included, as well as
+others which MAY be included. The TEP header MUST NOT include headers
+which are not specified in TEP 1 or supplementary Best Current
+Practice TEPs. The first six header fields MUST be
+included in all TEPs, in the order stated here.
+
+The first field is "TEP," and specifies the TEP number of the
+document. A TEP's number is unique.. This document is TEP 1. The 
+TEP type (discussed below) determines TEP number assignment. Generally,
+when a document is ready to be a TEP, it is assigned the smallest
+available number. BCP TEPs start at 1 and all other TEPs
+(Documentary, Experimental, and Informational) start at 101.
+
+The second field states the name of the working group that produced
+the document. This document was produced by the Core Working Group.
+
+The third field is "Type," and specifies the type of TEP the document
+is. There are four types of TEP: Best Current Practice (BCP),
+Documentary, Informational, and Experimental. This document's type is Best
+Current Practice.
+
+Best Current Practice is the closest thing TEPs have to a standard: it
+represents conclusions from significant experience and work by its
+authors. Developers desiring to add code (or TEPs) to TinyOS SHOULD
+follow all current BCPs. 
+
+Documentary TEPs describe a system or protocol that exists; a
+documentary TEP MUST reference an implementation that a reader can
+easily obtain.  Documentary TEPs simplify interoperability when 
+needed, and document TinyOS service implementations.
+
+Informational TEPs provide information that is of interest to the
+community. Informational TEPs include data gathered on radio behavior,
+hardware characteristics, other aspects of TinyOS software/hardware,
+organizational and logistic information,
+or experiences which could help the community achieve its goals.  
+
+Experimental TEPs describe a completely experimental approach to a
+problem, which are outside the TinyOS core and will not necessarily
+become part of it.  Unlike Documentary TEPs, Experimental TEPs may 
+describe systems that do not have a reference implementation.
+
+The fourth field is "Status," which specifies the status of the TEP.
+A TEP status can either be "Draft," which means it is a work in
+progress, "Final," which means it is complete and will not change. 
+Once a TEP has the status "Final," the only change allowed is the
+addition of an "Obsoleted By" field.
+
+The "Obsoletes" field is a backward pointer to an earlier TEP which
+the current TEP renders obsolete. An Obsoletes field MAY have multiple
+TEPs listed.  For example, if TEP 191 were to replace TEPs 111 and 116, it
+would have the field "Obsoletes: 111, 116".
+
+The "Obsoleted By" field is added to a Final TEP when another TEP has
+rendered it obsolete. The field contains the number of the obsoleting
+TEP. For example, if TEP 111 were obsoleted by TEP 191, it would have
+the field "Obsoleted By: 191".
+
+"Obsoletes" and "Obsoleted By" fields MUST agree. For a TEP to list another
+TEP in its Obsoletes field, then that TEP MUST list it in the Obsoleted By
+field.
+
+The obsoletion fields are used to keep track of evolutions and modifications
+of a single abstraction. They are not intended to force a single approach or
+mechanism over alternative possibilities.
+
+If a TEP is Best Current Practices or Documentary, then it MUST
+include an additional field, "TinyOS-Version:," which states what
+version(s) of TinyOS the document pertains to. This document pertains
+to all versions of TinyOS, until made obsolete by a future TEP. This
+field MUST appear after the Status field and before the Author field.
+
+The final required field is "Author," which states the names of the
+authors of the document. Full contact information should not be listed
+here (see Section 3.2).
+
+There is an optional field, "Extends." The "Extends" field refers to
+another TEP. The purpose of this field is to denote when a TEP represents
+an addition to an existing TEP. Meeting the requirements of a TEP with an
+Extends field requires also meeting the requirements of all TEPs listed 
+in the Extends field.
+
+If a TEP is a Draft, then four additional fields MUST be included:
+Draft-Created, Draft-Modified, Draft-Version, and Draft-Discuss.
+Draft-Created states the date the document was created, Draft-Modified
+states when it was last modified. Draft-Version specifies the version
+of the draft, which MUST increase every time a modification is
+made. Draft-Discuss specifies the email address of a mailing list
+where the draft is being discussed. Final and Obsolete TEPs MUST NOT
+have these fields, which are for Drafts only.
+
+3.2 TEP Body
+--------------------------------------------------------------------
+
+The first element of the TEP body MUST be the title of the document. A
+TEP SHOULD follow the title with an Abstract, which gives a brief
+overview of the content of the TEP. Longer TEPs MAY, after the
+Abstract, have a Table of Contents. After the Abstract and Table of
+Contents there SHOULD be an Introduction, stating the problem the TEP
+seeks to solve and providing needed background information.
+
+If a TEP is Documentary, it MUST have a section entitled
+"Implementation," which instructs the reader how to obtain the
+implementation documented.
+
+If a TEP is Best Current Practice, it MUST have a section entitled
+"Reference," which points the reader to one or more reference uses of
+the practices.
+
+The last three sections of a TEP are author information, citations,
+and appendices. A TEP MUST have an author information section titled
+entitled "Author's Address" or "Authors' Addresses." A TEP MAY have
+a citation section entitled "Citations." A citations section MUST
+immediately follow the author information section. A TEP MAY have
+appendices. Appendices MUST immediately follow the citations section,
+or if there is no citations section, the author information section.
+Appendices are lettered.  Please refer to Appendix A for details.
+
+4. Reference
+====================================================================
+The reference use of this document is TEP 1 (itself).
+
+5. Acknowledgments
+====================================================================
+
+The definitions of the compliance terms are a direct copy of
+definitions taken from IETF RFC 2119.
+
+6. Author's Address
+====================================================================
+
+| Philip Levis
+| 358 Gates Hall
+| Stanford University 
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+|
+| email - pal@cs.stanford.edu
+
+7. Citations
+====================================================================
+
+.. [1] reStructuredText Markup Specification. <http://docutils.sourceforge.net/docs/ref/rst/restructuredtext.html>
+ 
+
+Appendix A. Example Appendix
+====================================================================
+
+This is an example appendix. Appendices begin with the letter A.
diff --git a/doc/txt/tep101.txt b/doc/txt/tep101.txt
new file mode 100644
index 00000000..9b735cc2
--- /dev/null
+++ b/doc/txt/tep101.txt
@@ -0,0 +1,605 @@
+===================================
+Analog-to-Digital Converters (ADCs)
+===================================
+
+:TEP: 101
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: Jan-Hinrich Hauer, Philip Levis, Vlado Handziski, David Gay
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   [TEP1]_.
+
+
+Abstract
+====================================================================
+
+This TEP proposes a hardware abstraction for analog-to-digital converters (ADCs)
+in TinyOS 2.x, which is aligned to the three-layer Hardware Abstraction
+Architecture (HAA) specified in [TEP2]_. It describes some design principles and
+documents the set of hardware-independent interfaces to an ADC.
+
+1. Introduction
+====================================================================
+
+Analog-to-digital converters (ADCs) are devices that convert analog input
+signals to discrete digital output signals, typically voltage to a binary
+number.  The interested reader can refer to Appendix A for a brief overview of
+the ADC hardware on some current TinyOS platforms.  In earlier versions of
+TinyOS, the distinction between a sensor and an ADC were blurred: this led
+components that had nothing to do with an ADC to still resemble one
+programatically, even though the semantics and forms of operation were
+completely different.  To compensate for the difference non-ADC sensors
+introduced additional interfaces, such as ``ADCError``, that were tightly bound
+to sensor acquisition but separate in wiring. The separation between the ADC
+and ``ADCError`` interface is bug prone and problematic, as is the equation of
+a sensor and an ADC. TinyOS 2.x separates the structure and interfaces of an
+ADC from those of sensor drivers (which may be on top of an ADC stack, but
+this fact is hidden from higher level components). This TEP presents how TinyOS
+2.x structures ADC software. [TEP109]_ (Sensor Boards) shows how a platform can
+present actual named sensors. 
+
+As can be seen in Appendix A the ADC hardware used on TinyOS platforms differ
+in many respects, which makes it difficult to find a chip independent
+representation for an ADC. Even if there were such a representation, the
+configuration details of an ADC would still depend on the actual device
+producing the input signal (sensor).  Neither a platform independent
+application nor the ADC hardware stack itself has access to this information,
+as it can only be determined on a platform or sensorboard level. For example,
+determining which ADC port a sensor is attached to and how conversion results
+need to be interpreted is a platform specific determination. Although the
+actual configuration details may be different the procedure of configuring an
+ADC can be unified on all ADCs with the help of **hardware independent
+interfaces**: in a similar way as the ``Read`` interface definition does not
+predefine the type or semantics of the exchanged data (see [TEP114]_), a
+configuration interface definition can abstract from the data type and
+semantics of the involved configuration settings.  For example, like a
+component can provide a ``Read<uint8_t>`` or ``Read<uint16_t>`` interface, it
+can also provide a ``AdcConfigure<atm128_adc_config_t>`` or
+``AdcConfigure<msp430adc12_channel_config_t>`` interface depending on what ADC
+it represents.  This TEP proposes the (typed) ``AdcConfigure`` interface as the
+standard interface for configuring an ADC in TinyOS 2.x.
+
+In spite of their hardware differences, one aspect represents a common
+denominator of ADCs: they all produce conversion results. To facilitate sensor
+software development conversion results are returned by the ADC stack through
+the interfaces ``Read``, ``ReadStream`` and ``ReadNow`` (see `2.  Interfaces`_
+and [TEP114]_).  Conversion results are returned as uninterpreted values and
+translating them to engineering units can only be done with the configuration
+knowledge of the respective platform, for example, the reference voltage or the
+resistance of a reference resistor in ratiometric measurements.  Translating
+uninterpreted values to engineering units may be performed by components
+located on top of the ADC stack and is out of the scope of this TEP.
+
+The top layer of abstraction of an ADC - the Hardware Interface Layer (HIL) -
+thus provides the interfaces ``Read``, ``ReadNow`` and ``ReadStream`` and uses
+the ``AdcConfigure`` interface for hardware configuration (why it **uses** and
+does not **provide** ``AdcConfigure`` is explained below).  Since the type and
+semantics of the parameters passed through these interfaces is dependent on the
+actual ADC implementation, it is only a "weak" HIL (see [TEP2]_).
+
+Following the principles of the HAA [TEP2]_ the Hardware Adaptation Layer (HAL,
+which resides below the HIL) of an ADC should expose all the chip-specific
+capabilities of the chip.  For example, the ADC12 on the MSP430 MCU supports a
+"Repeat-Sequence-of-Channels Mode" and therefore this function should be
+accessible on the HAL of the MSP430 ADC12 hardware abstraction.  Other ADCs
+might not exhibit such functionality and might therefore - on the level of HAL
+- provide only an interface to perform single conversions. Since all ADCs have
+the same HIL representation it may be necessary to perform some degree of
+software emulation in the HIL implementation.  For example, a ``ReadStream``
+command can be emulated by multiple single conversion commands. Below the HAL
+resides the Hardware Presentation Layer (HPL), a stateless component that
+provides access to the hardware registers (see [TEP2]_). The general structure
+(without virtualization) of the ADC stack is as follows ::
+
+
+        ^                     |
+        |                     |
+        |                   Read,
+  AdcConfigure              ReadNow (+ Resource),
+        |                   ReadStream
+        |                     |
+        |                     V
+  +----------------------------------+
+  |  Hardware Interface Layer (HIL)  |
+  |  (chip-specific implementation)  |
+  +----------------------------------+
+                   |
+                   |
+    chip-specific interface(s) + Resource
+ (e.g. Msp430Adc12SingleChannel + Resource)
+                   |
+                   V
+  +----------------------------------+
+  |  Hardware Adaptation Layer (HAL) |
+  |  (chip-specific implementation)  |
+  +----------------------------------+
+                   |
+                   |
+         chip-specific interface(s)
+             (e.g. HplAdc12)
+                   |
+                   V
+  +----------------------------------+
+  | Hardware Presentation Layer (HPL)|
+  | (chip-specific implementation)   |
+  +----------------------------------+
+
+
+The rest of this TEP specifies:
+
+* the set of standard TinyOS interfaces for collecting ADC conversion
+  results and for configuring an ADC (`2. Interfaces`_)
+* guidelines on how an ADC's HAL should expose chip-specific 
+  interfaces (`3. HAL guidelines`_)
+* what components an ADC's HIL MUST implement (`4. HIL requirements`_)
+* guidelines on how the HIL should be implemented 
+  (`5. HIL guidelines`_)
+* a section pointing to current implementations (`6. Implementation`_)
+
+This TEP ends with appendices documenting, as an example, the ADC implementation
+for the TI MSP430 MCU.
+
+
+2. Interfaces
+====================================================================
+
+This TEP proposes the ``AdcConfigure`` interface for ADC hardware configuration
+and the ``Read``, ``ReadStream`` and ``ReadNow`` interfaces to acquire
+conversion results. The ``Read`` and ``ReadStream`` interfaces are documented
+in [TEP114]_ and the ``ReadNow`` interface is documented in this TEP.  A
+``Read[Now|Stream]`` interface is always provided in conjunction with a
+``AdcConfigure`` interface.
+
+Interface for configuring the ADC hardware
+--------------------------------------------------------------------
+
+The ``AdcConfigure`` interface is defined as follows::
+
+  interface AdcConfigure< config_type > 
+  {
+    async command config_type getConfiguration(); 
+  }
+
+This interface is used by the ADC stack to retrieve the hardware configuration
+of an ADC HIL client. ``config_type`` is a chip-specific data type (simple or
+structured) that contains all information necessary to configure the respective
+ADC hardware. For example, on the ADC12 of the MSP430 the ``AdcConfigure``
+interface will be instantiated with the ``const msp430adc12_channel_config_t*``
+data type. A client MUST always return the same configuration through a
+``AdcConfigure`` interface and, if configuration data is passed as a pointer,
+the HIL component (see `4. HIL requirements`_) MUST NOT reference it after the
+return of the ``getConfiguration()`` command. If a client wants to use the ADC
+with different configurations it must provide multiple instances of the
+``AdcConfigure`` interface.
+
+Note that the ``AdcConfigure`` interface is **provided** by an ADC HIL client
+and it is **used** by the ADC HIL implementation. Therefore an ADC HIL client
+cannot initiate the configuration of the ADC hardware itself. Instead it is the
+ADC HIL implementation that can "pull" the client's ADC configuration just
+before it initates a conversion based on the respective client's configuration.
+The rationale is that the ADC HIL implementation does not have to store an ADC
+configuration per client - instead the ADC client can, for example, store its
+configuration in program memory.
+
+Interfaces for acquiring conversion results
+--------------------------------------------------------------------
+   
+This TEP proposes to adopt the following two source-independent data
+collection interfaces from [TEP114]_ for the collection of ADC conversion
+results on the level of HIL::
+
+  interface Read< size_type >
+  interface ReadStream< size_type >
+
+In addition it proposes the following data collection interface for low-latency
+reading of conversion results::
+
+  interface ReadNow< size_type >
+  
+Every data collection interface is associated with an ``AdcConfigure``
+interface (how this association is realized is explained in Section `4.  HIL
+requirements`_).  As the resolution of conversion results is chip-specific, the
+``size_type`` parameter reflects an upper bound for the chip-specific
+resolution of the conversion results - the actual resolution may be smaller
+(e.g.  uint16_t for a 12-bit ADC).
+
+Read
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The ``Read`` interface can be used to sample an ADC channel once and return a
+single conversion result as an uninterpreted value. The ``Read`` interface is
+documented in [TEP114]_.
+
+ReadStream
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The ``ReadStream`` interface can be used to sample an ADC channel multiple
+times with a specified sampling period. The ``ReadStream`` interface is
+documented in [TEP114]_ .
+
+ReadNow
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The ``ReadNow`` interface is intended for split-phase low-latency
+reading of small values::
+
+  interface ReadNow<val_t> 
+  {
+    async command error_t read();
+    async event void readDone( error_t result, val_t val );
+  }
+
+This interface is similar to the ``Read`` interface, but works in asynchronous
+context. A successful call to ``ReadNow.read()`` means that the ADC hardware
+has started the sampling process and that ``ReadNow.readDone()`` will be
+signalled once it has finished (note that the asynchronous
+``ReadNow.readDone()`` might be signalled even before the call to
+``ReadNow.read()`` has returned).  Due to its timing constraints the
+``ReadNow`` interface is always provided in conjunction with an instance of the
+``Resource`` interface and a client must reserve the ADC through the
+``Resource`` interface before the client may call ``ReadNow.read()``.  Please
+refer to [TEP108]_ on how the ``Resource`` interface should be used by a client
+component.
+
+
+3. HAL guidelines
+====================================================================
+
+As explained in `1. Introduction`_ the HAL exposes the full capabilities of the
+ADC hardware. Therefore only chip- and platform-dependent clients can wire to
+the HAL. Although the HAL is chip-specific, both, in terms of implementation
+and representation, its design should follow the guidelines described in this
+section to facilitate the mapping to the HIL representation. Appendix B shows
+the signature of the HAL for the MSP430.
+
+Resource reservation
+--------------------------------------------------------------------
+
+As the ADC hardware is a shared resource that is usually multiplexed between
+several clients some form of access arbitration is necessary.  The HAL should
+therefore provide a parameterized ``Resource`` interface, instantiate a
+standard arbiter component and connect the ``Resource`` interface to the
+arbiter as described in [TEP108]_. To ensure fair and uniform arbitration on
+all platforms the standard round robin arbiter is recommended. Resource
+arbiters and the ``Resource`` interface are the topic of [TEP108]_.
+
+Configuration and sampling
+--------------------------------------------------------------------
+
+As the ADC hardware is a shared resource the HAL should support hardware
+configuration and sampling per client (although per-port configuration is
+possible, it is not recommended, because it forces all clients to use the same
+configuration for a given port).  Therefore the HAL should provide sampling
+interfaces parameterized by a client identifier. A HAL client can use its
+instance of the sampling interface to configure the ADC hardware, start the
+sampling process and acquire conversion results. It wires to a sampling
+interface using a unique client identifier (this may be hidden by a
+virtualization component). All commands and events in the sampling interface
+should be 'async' to reflect the potential timing requirements of clients on
+the level of HAL. A HAL may provide multiple different parameterized sampling
+interfaces, depending on the hardware capabilities.  This allows to
+differentiate/group ADC functionality, for example single vs.  repeated
+sampling, single channel vs.  multiple channels or low-frequency vs.
+high-frequency sampling.  Every sampling interface should allow the client to
+individually configure the ADC hardware, for example by including the
+configuration data as parameters in the sampling commands.  However, if
+configuration data is passed as a pointer, the HAL component MUST NOT reference
+it after the return of the respective command.  Appendix B shows the HAL
+interfaces for the MSP430.
+
+HAL virtualization
+--------------------------------------------------------------------
+
+In order to hide wiring complexities and/or export only a subset of all ADC
+functions generic ADC wrapper components may be provided on the level of HAL.
+Such components can also be used to ensure that a sampling interface is always
+provided with a ``Resource`` interface and both are instantiated with the same
+client ID if this is required by the HAL implementation.
+
+
+4. HIL requirements
+====================================================================
+
+The following generic components MUST be provided on all platforms that have an
+ADC::
+
+  AdcReadClientC 
+  AdcReadNowClientC 
+  AdcReadStreamClientC 
+
+These components provide virtualized access to the HIL of an ADC. They are
+instantiated by an ADC client and provide/use the four interfaces described in
+Section `2.  Interfaces`_. An ADC client may instantiate multiple such
+components. The following paragraphs describe their signatures. Note that this
+TEP does not address the issue of how to deal with multiple ADCs on the same
+platform (the question of how to deal with multiple devices of the same class
+is a general one in TinyOS 2.x). Appendix C shows the ``AdcReadClientC`` for
+the MSP430.
+
+
+AdcReadClientC
+--------------------------------------------------------------------
+::
+
+  generic configuration AdcReadClientC() {
+    provides {
+      interface Read< size_type >;
+    }
+    uses {
+      interface AdcConfigure< config_type >;
+    }
+  }
+
+The ``AdcReadClientC`` component provides a ``Read`` interface for acquiring
+single conversion results. The associated ADC channel (port) and further
+configuration details are returned by the ``AdcConfigure.getConfiguration()``
+command. It is the task of the client to wire this interface to a component
+that provides the client's ADC configuration. The HIL implementation will use
+the ``AdcConfigure`` interface to dynamically "pull" the client's ADC settings
+when it translates the ``Read.read()`` command to a chip-specific sampling
+command.  Note that both, ``size_type`` and ``config_type``, are only
+placeholders and will be instantiated by the respective HIL implementation (for
+an example, see the AdcReadClientC for the MSP430 in Appendix C).
+
+AdcReadNowClientC
+--------------------------------------------------------------------
+::
+
+  generic configuration AdcReadNowClientC() {
+    provides {
+      interface Resource;
+      interface ReadNow< size_type >;
+    }
+    uses {
+      interface AdcConfigure< config_type >;
+    }
+  }
+
+The ``AdcReadNowClientC`` component provides a ``ReadNow`` interface for
+acquiring single conversion results. In contrast to ``Read.read()`` when a call
+to ``ReadNow.read()`` succeeds, the ADC starts to sample the channel
+immediately (a successful ``Read.read()`` command may not have this
+implication, see [TEP114]_ and `2. Interfaces`_). A client MUST reserve the ADC
+through the ``Resource`` interface before the client may call
+``ReadNow.read()`` and it MUST release the ADC through the ``Resource``
+interface when it no longer needs to access it (for more details on how to use
+the ``Resource`` interface please refer to [TEP108]_).  The associated ADC
+channel (port) and further configuration details are returned by the
+``AdcConfigure.getConfiguration()`` command. It is the task of the client to
+wire this interface to a component that provides the client's ADC
+configuration.  The HIL implementation will use the ``AdcConfigure`` interface
+to dynamically "pull" the client's ADC settings when it translates the
+``ReadNow.read()`` command to a chip-specific sampling command. Note that both,
+``size_type`` and ``config_type``, are only placeholders and will be
+instantiated by the respective HIL implementation (for an example how this is
+done for the AdcReadClientC see Appendix C).
+
+AdcReadStreamClientC
+--------------------------------------------------------------------
+::
+
+  generic configuration AdcReadStreamClientC() {
+    provides {
+      interface ReadStream< size_type >;
+    }
+    uses {
+      interface AdcConfigure< config_type>;
+    }
+  }
+
+The ``AdcReadStreamClientC`` component provides a ``ReadStream`` interface for
+acquiring multiple conversion results at once. The ``ReadStream`` interface is
+explained in [TEP114]_ and `2. Interfaces`_. The ``AdcConfigure`` interface is
+used in the same way as described in the section on the ``AdcReadClientC``.
+Note that both, ``size_type`` and ``config_type``, are only placeholders and
+will be instantiated by the respective HIL implementation (for an example how
+this is done for the AdcReadClientC see Appendix C).
+
+5. HIL guidelines
+====================================================================
+
+The HIL implementation of an ADC stack has two main tasks: it translates a
+``Read``, ``ReadNow`` or ``ReadStream`` request to a chip-specific HAL sampling
+command and it abstracts from the ``Resource`` interface (the latter only for
+the ``AdcReadClientC`` and ``AdcReadStreamClientC``). The first task is solved
+with the help of the ``AdcConfigure`` interface which is used by the HIL
+implementation to retrieve a client's ADC configuration.  The second task MAY
+be performed by the following library components: ``ArbitratedReadC``, and
+``ArbitratedReadStreamC`` (in tinyos-2.x/tos/system) - please refer to the
+Atmel Atmega 128 HAL implementation (in tinyos-2.x/tos/chips/atm128/adc) for an
+example.  Note that since the ``ReadNow`` interface is always provided in
+conjunction with a ``Resource`` interface the HIL implementation does not have
+to perform the ADC resource reservation for an ``AdcReadNowClientC``, but may
+simply forward an instance of the ``Resource`` interface from the HAL to the
+``AdcReadNowClientC``.
+
+The typical sequence of events is as follows: when a client requests data
+through the ``Read`` or ``ReadStream`` interface the HIL will request access to
+the HAL using the ``Resource`` interface.  After the HIL has been granted
+access, it will "pull" the client's ADC configuration using the
+``AdcConfigure`` interface and translate the client's ``Read`` or
+``ReadStream`` command to a chip-specific HAL command. Once the HIL is
+signalled the conversion result(s) from the HAL it releases the ADC through the
+``Resource`` interface and signals the conversion result(s) to the client
+though the ``Read`` or ``ReadStream`` interface.  When a client requests data
+through the ``ReadNow`` interface the HIL translates the client's command to
+the chip-specific HAL command without using the ``Resource`` interface (it may
+check ownership of the client through the ``ArbiterInfo`` interface - this
+check can also be done in the HAL implementation). Once the HIL is signalled
+the conversion result(s) it forwards it to the respective ``ReadNow`` client.
+
+6. Implementation
+====================================================================
+
+TestAdc application
+--------------------------------------------------------------------
+
+An ADC HIL test application can be found in ``tinyos-2.x/apps/tests/TestAdc``.
+Note that this application instantiates generic DemoSensorC, DemoSensorStreamC
+and DemoSensorNowC components (see [TEP114]_) and assumes that these components
+are actually wired to an ADC HIL. Please refer to
+``tinyos-2.x/apps/tests/TestAdc/README.txt`` for more information.
+
+
+HAA on the MSP430 and Atmega 128
+--------------------------------------------------------------------
+
+The implementation of the ADC12 stack on the MSP430 can be found in
+``tinyos-2.x/tos/chips/msp430/adc12``:
+
+  * ``HplAdc12P.nc`` is the HPL implementation
+  * ``Msp430Adc12P.nc`` is the HAL implementation
+  * ``AdcP.nc`` is the HIL implementation
+  * ``AdcReadClientC.nc``, ``AdcReadNowClientC.nc`` and
+    ``AdcReadStreamClientC.nc`` provide virtualized access to the HIL
+  * the use of DMA or the reference voltage generator and the
+    HAL virtualization components are explained in ``README.txt``
+
+The Atmel Atmega 128 ADC implementation can be found in
+``tinyos-2.x/tos/chips/atm128/adc``:
+
+  * ``HplAtm128AdcC.nc`` is the HPL implementation
+  * ``Atm128AdcP.nc`` is the HAL implementation
+  * ``AdcP.nc``, ``WireAdcP.nc`` and the library components for arbitrating 
+    'Read', 'ReadNow' and 'ReadStream', ``ArbitratedReadC`` and
+    ``ArbitratedReadStreamC`` (in ``tinyos-2.x/tos/system``), realize
+    the HIL
+  * ``AdcReadClientC.nc``, ``AdcReadNowClientC.nc`` and
+    ``AdcReadStreamClientC.nc`` provide virtualized access to the HIL
+
+
+Appendix A: Hardware differences between platforms
+====================================================================
+
+The following table compares the characteristics of two microcontrollers
+commonly used in TinyOS platforms:
+
++----------------------+----------------------+---------------------+
+|                      | Atmel Atmega 128     | TI MSP430 ADC12     |
++======================+======================+=====================+
+|Resolution            | 10-bit               | 12-bit              |
++----------------------+----------------------+---------------------+
+|channels              |- 8 multiplexed       |- 8 individually     |
+|                      |  external channels   |  configurable       |
+|                      |- 16 differential     |  external channels  |
+|                      |  voltage input       |- internal channels  |
+|                      |  combinations        |  (AVcc, temperature,|
+|                      |- 2 differential      |  reference voltages)|
+|                      |  inputs with gain    |                     |
+|                      |  amplification       |                     |
++----------------------+----------------------+---------------------+
+|internal reference    | 2.56V                | 1.5V or 2.5V        |
+|voltage               |                      |                     |
++----------------------+----------------------+---------------------+
+|conversion reference  |- positive terminal:  | individually        |
+|                      |  AVcc or 2.56V  or   | selectable per      |
+|                      |  AREF (external)     | channel:            |
+|                      |- negative terminal:  |                     |
+|                      |  GND                 |- AVcc and AVss      |
+|                      |                      |- Vref+ and AVss     |
+|                      |                      |- Veref+ and AVss    |
+|                      |                      |- AVcc and (Vref- or |
+|                      |                      |  Veref-)            |
+|                      |                      |- AVref+ and (Vref-  |
+|                      |                      |  or Veref-)         |
+|                      |                      |- Veref+ and (Vref-  |
+|                      |                      |  or Veref-)         |
++----------------------+----------------------+---------------------+
+|conversion modes      |- single channel      |- single conversion  |
+|                      |  conversion mode     |  mode               |
+|                      |- free running mode   |- repeat single      |
+|                      |  (channels and       |  conversion mode    |
+|                      |  reference voltages  |- sequence mode      |
+|                      |  can be switched     |  (sequence <= 16    |
+|                      |  between samples)    |  channels)          |
+|                      |                      |- repeat sequence    |
+|                      |                      |  mode               |
++----------------------+----------------------+---------------------+
+|conversion clock      |clkADC with prescaler |ACLK, MCLK, SMCLK or |
+|source                |                      |ADC-oscillator (5MHz)|
+|                      |                      |with prescaler       |
+|                      |                      |respectively         |
++----------------------+----------------------+---------------------+
+|sample-hold-time      |1.5 clock cycles      |selectable values    |
+|                      |(fixed)               |from 4 to 1024 clock |
+|                      |                      |cycles               |
++----------------------+----------------------+---------------------+
+|conversion triggering |by software           |by software or timers|
++----------------------+----------------------+---------------------+
+|conversion during     |yes                   |yes                  |
+|sleep mode possible   |                      |                     |
++----------------------+----------------------+---------------------+
+|interrupts            |after each conversion |after single or      |
+|                      |                      |sequence conversion  |
++----------------------+----------------------+---------------------+
+
+
+Appendix B: a HAL representation: MSP430 ADC12
+====================================================================
+
+This section shows the HAL signature for the ADC12 of the TI MSP430 MCU. It
+reflects the four MSP430 ADC12 conversion modes as it lets a client sample an
+ADC channel once ("Single-channel-single-conversion") or repeatedly
+("Repeat-single-channel"), multiple times ("Sequence-of-channels") or multiple
+times repeatedly ("Repeat-sequence-of-channels"). In contrast to the single
+channel conversion modes the sequence conversion modes trigger a single
+interrupt after multiple samples and thus enable high-frequency sampling. The
+``DMAExtension`` interface is used to reset the state machine when the DMA is
+responsible for data transfer (managed in an exterior component)::
+
+  configuration Msp430Adc12P 
+  { 
+    provides {
+      interface Resource[uint8_t id]; 
+      interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; 
+      interface AsyncStdControl as DMAExtension[uint8_t id];
+    }
+  }
+
+  interface Msp430Adc12SingleChannel 
+  {   
+    async command error_t configureSingle(const msp430adc12_channel_config_t *config);
+    async command error_t configureSingleRepeat(const msp430adc12_channel_config_t *config, uint16_t jiffies);
+    async command error_t configureMultiple( const msp430adc12_channel_config_t *config, uint16_t buffer[], uint16_t numSamples, uint16_t jiffies);
+    async command error_t configureMultipleRepeat(const msp430adc12_channel_config_t *config, uint16_t buffer[], uint8_t numSamples, uint16_t jiffies);
+    async command error_t getData();
+    async event error_t singleDataReady(uint16_t data);
+    async event uint16_t* multipleDataReady(uint16_t buffer[], uint16_t numSamples); 
+  }
+
+  typedef struct 
+  { 
+    unsigned int inch: 4;            // input channel 
+    unsigned int sref: 3;            // reference voltage 
+    unsigned int ref2_5v: 1;         // reference voltage level 
+    unsigned int adc12ssel: 2;       // clock source sample-hold-time 
+    unsigned int adc12div: 3;        // clock divider sample-hold-time 
+    unsigned int sht: 4;             // sample-hold-time
+    unsigned int sampcon_ssel: 2;    // clock source sampcon signal 
+    unsigned int sampcon_id: 2;      // clock divider sampcon signal
+  } msp430adc12_channel_config_t;
+
+
+Appendix C: a HIL representation: MSP430 ADC12
+====================================================================
+
+The signature of the AdcReadClientC component for the MSP430 ADC12 is as
+follows::
+
+  generic configuration AdcReadClientC() {
+    provides interface Read<uint16_t>;
+    uses interface AdcConfigure<const msp430adc12_channel_config_t*>;
+  }
+
+.. [TEP1] TEP 1: TEP Structure and Keywords. 
+.. [TEP2] TEP 2: Hardware Abstraction Architecture. 
+.. [TEP108] TEP 108: Resource Arbitration. 
+.. [TEP109] TEP 109: Sensor Boards. 
+.. [TEP114] TEP 114: SIDs: Source and Sink Independent Drivers. 
diff --git a/doc/txt/tep102.txt b/doc/txt/tep102.txt
new file mode 100644
index 00000000..c2ab1814
--- /dev/null
+++ b/doc/txt/tep102.txt
@@ -0,0 +1,969 @@
+============================
+Timers
+============================
+
+:TEP: 102
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: Cory Sharp, Martin Turon, David Gay
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited.  This memo is in full compliance with
+   TEP 1.
+
+
+Abstract
+====================================================================
+
+This TEP proposes a Timer design that supports common timing
+requirements both in precision and width across common hardware
+configurations.  This TEP focuses on aligning the Timer abstraction
+with the three-layer Hardware Abstraction Architecture (HAA).
+
+1. Introduction
+====================================================================
+
+Most microcontrollers offer a rich timer system, with features like:
+
+* several counters, possibly of different widths, with multiple clocking options
+* one or more compare registers for each counter, which can trigger
+  interrupts, changes to output pins and changes to the counter value
+* capture of the time of input pin changes
+
+The interested reader can refer to Appendix A for a brief overview of
+the timer hardware on some current TinyOS platforms.
+
+TinyOS does not attempt to capture all this diversity in a
+platform-independent fashion. Instead, following the principles of the
+HAA[_tep2], each microcontroller should expose all this functionality
+via components and interfaces at the HPL and, where appropriate, HAL levels.
+However, two aspects of timers are sufficiently common and important 
+that they should be made available in a well-defined way: measuring time,
+and triggering (possibly repeating) events at specific times. The rest
+of this TEP specifies:
+
+* a set of platform-independent interfaces for counting time and triggering
+  events (`2. Interfaces`_)
+* guidelines on how each microcontroller's HAL SHOULD expose its timer hardware
+  in terms of the above interfaces (`3. HAL guidelines`_)
+* what components a microcontroller's timer HIL MUST implement 
+  (`4. HIL requirements`_)
+* a set of utility components whose use simplifies building the components
+  specified by the HAL guidelines and HIL requirements (`5. Utility components`_)
+
+This TEP ends with appendices documenting, as an example, the mica2
+timer subsystem implementation.
+
+2. Interfaces
+====================================================================
+
+Before presenting the interfaces (2.2), we start with a general
+discussion of the issues of precision, width and accuracy in
+timer interfaces (2.1).
+
+2.1 Precision, Width and Accuracy
+--------------------------------------------------------------------
+
+Three fundamental properties of timers are *precision*, *width* and
+*accuracy*.
+
+Examples of precision are millisecond, a cycle of a 32kHz clock, and
+microseconds.  All precisions presented in this TEP are in "binary"
+units with respect to one second.  That is, one second contains 1024
+binary milliseconds, 32768 32kHz ticks, or 1048576 microseconds.
+This TEP emphasizes millisecond and 32kHz tick precisions while
+reasonably accommodating other precisions. The use of "binary" units
+is motivated by the common availability of hardware clocks driven 
+by a 32768Hz crystal.
+
+Examples of widths are 8-bit, 16-bit, 32-bit, and 64-bit.  The width
+for timer interfaces and components SHOULD be 32-bits.  This TEP
+emphasizes 32-bit widths while reasonably accommodating other widths -
+a particular platform may have good reasons not to expose a 32-bit
+interface.
+
+Accuracy reflects how closely a component conforms to the precision it
+claims to provide. Accuracy is affected by issues such as clock drift (much
+higher for internal vs crystal oscillators) and hardware limitations. As an
+example of hardware limitations, a mica2 clocked at 7.37MHz cannot offer an
+exact binary microsecond timer -- the closest it can come is 7.37MHz/8. Rather
+than introduce a plethora of precisions, we believe it is often best to
+pick the existing precision closest to what can be provided, along with
+appropriate documentation. However, the accuracy MUST remain reasonable:
+for instance, it would be inappropriate to claim that a millisecond timer
+is a 32kHz timer.
+
+This TEP parameterizes all interfaces by precision and some
+interfaces by width.  This intentionally makes similar timer
+interfaces with different precision or width mutually incompatible.
+It also allows user code to clearly express and understand the
+precision and width for a given timer interface. Accuracy is not
+reflected in the interface type.
+
+Precision is expressed as a dummy type -- TMilli, T32khz, and
+TMicro -- written in the standard Timer.h header like this::
+
+  typedef struct { int notUsed; } TMilli; // 1024 ticks per second
+  typedef struct { int notUsed; } T32khz; // 32768 ticks per second
+  typedef struct { int notUsed; } TMicro; // 1048576 ticks per second
+
+Note that the precision names are expressed as either frequency or
+period, whichever is convenient.
+
+2.2 Timer interfaces
+--------------------------------------------------------------------
+
+This TEP proposes these timer interfaces::
+
+  interface Counter< precision_tag, size_type >
+  interface Alarm< precision_tag, size_type >
+  interface BusyWait< precision_tag, size_type >
+  interface LocalTime< precision_tag >
+  interface Timer< precision_tag >
+
+The LocalTime and Timer interfaces are used primarily by user
+applications and use a fixed width of 32-bits.  The Alarm, BusyWait,
+and Counter interfaces are used by the TinyOS timer system and
+advanced user components.
+
+Counter
+--------------------------------------------------------------------
+
+The Counter interface returns the current time and provides commands
+and an event for managing overflow conditions.  These overflow
+commands and events are necessary for properly deriving larger width
+Counters from smaller widths.  ::
+
+  interface Counter<precision_tag,size_type>
+  {
+    async command size_type get();
+    async command bool isOverflowPending();
+    async command void clearOverflow();
+    async event void overflow();
+  }
+
+get() 
+  return the current time.
+
+isOverflowPending() 
+  return TRUE if the overflow flag is set for this counter, i.e., if and
+  only if an overflow event will occur after the outermost atomic
+  block exits.  Return FALSE otherwise.  This command only returns the
+  state of the overflow flag and causes no side effect.  
+
+clearOverflow() 
+  cancel the pending overflow event clearing the overflow flag.
+
+overflow() 
+  signals that an overflow in the current time.  That is, the current
+  time has wrapped around from its maximum value to zero.
+
+
+Alarm
+--------------------------------------------------------------------
+
+Alarm components are extensions of Counters that signal an event
+when their compare register detects the alarm time has been hit.
+All commands and events of the Alarm interface are asynchronous (or
+in "interrupt context").  The Alarm interface provides a set of
+"basic" commands for common usage and provides a set of "extended"
+commands for advanced use.  ::
+
+  interface Alarm<precision_tag,size_type>
+  {
+    // basic interface
+    async command void start( size_type dt );
+    async command void stop();
+    async event void fired();
+
+    // extended interface
+    async command bool isRunning();
+    async command void startAt( size_type t0, size_type dt );
+    async command size_type getNow();
+    async command size_type getAlarm();
+  }
+
+start(dt) 
+  cancel any previously running alarm and set to fire in dt time units
+  from the time of invocation.  The alarm will only fire once then
+  stop.
+
+stop() 
+  cancel any previously running alarm.
+
+fired() 
+  signals that the alarm has expired.
+
+isRunning() 
+  return TRUE if the alarm has been started and has not been cancelled
+  or has not yet fired.  FALSE is returned otherwise.
+
+startAt(t0,dt) 
+
+  cancel any previously running alarm and set to fire at time t1 =
+  t0+dt.  This form allows a delay to be anchored to some time t0 taken
+  before the invocation of startAt.  The timer subsystem uses this form
+  internally, to be able to use of the full width of an alarm while also
+  detecting when a short alarm elapses prematurely.
+
+  The time ``t0`` is always assumed to be in the past. A value of ``t0``
+  numerically greater than the current time (returned by ``getNow()``)
+  represents a time from before the last wraparound.
+
+getNow() 
+  return the current time in the precision and width of the alarm.
+
+getAlarm() 
+  return the time the currently running alarm will fire or the time
+  that the previously running alarm was set to fire.  getAlarm can
+  be used with startAt to set an alarm from the previous alarm time,
+  as in startAt(getAlarm(),dt).  This pattern is used within the
+  fired() event to construct periodic alarms.
+
+
+BusyWait
+--------------------------------------------------------------------
+
+The BusyWait interface allows for very short synchronous delays.
+BusyWait should be used sparingly and when an Alarm would not be
+reasonably efficient or accurate.  The BusyWait interface replaces
+the TOSH_uwait macro from TinyOS 1.x. 
+
+BusyWait blocks for no less than the specified amount of time.  No
+explicit upper bound is imposed on the enacted delay, though it is
+expected that the underlying implementation spins in a busy loop until
+the specified amount of time has elapsed.
+::
+
+  interface BusyWait<precision_tag,size_type>
+  {
+    async command void wait( size_type dt );
+  }
+
+wait(dt)
+  block until at least dt time units have elapsed
+
+LocalTime
+--------------------------------------------------------------------
+
+The LocalTime interface exposes a 32-bit counter without overflow
+utilities.  This is primarily for application code that does not
+care about overflow conditions.  ::
+
+  interface LocalTime<precision_tag>
+  {
+    async command uint32_t get();
+  }
+
+get() 
+  return the current time.
+
+
+Timer
+--------------------------------------------------------------------
+
+All commands and events of the Timer interface are synchronous (or
+in "task context").  The Timer interface provides a set of "basic"
+commands for common usage and provides a set of "extended" commands
+for advanced use.  The Timer interface allows for periodic events.
+::
+
+  interface Timer<precision_tag>
+  {
+    // basic interface
+    command void startPeriodic( uint32_t dt );
+    command void startOneShot( uint32_t dt );
+    command void stop();
+    event void fired();
+
+    // extended interface
+    command bool isRunning();
+    command bool isOneShot();
+    command void startPeriodicAt( uint32_t t0, uint32_t dt );
+    command void startOneShotAt( uint32_t t0, uint32_t dt );
+    command uint32_t getNow();
+    command uint32_t gett0();
+    command uint32_t getdt();
+  }
+
+startPeriodic(dt) 
+  cancel any previously running timer and set to fire in dt time units
+  from the time of invocation.  The timer will fire periodically every
+  dt time units until stopped.
+
+startOneShot(dt) 
+  cancel any previously running timer and set to fire in dt time units
+  from the time of invocation.  The timer will only fire once then
+  stop.
+
+stop() 
+  cancel any previously running timer.
+
+fired()
+  signals that the timer has expired (one-shot) or repeated (periodic).
+
+isRunning() 
+  return TRUE if the timer has been started and has not been cancelled
+  and has not fired for the case of one-shot timers.  Once a periodic
+  timer is started, isRunning will return TRUE until it is cancelled.
+
+isOneShot() 
+  return TRUE if the timer is a one-shot timer.  Return FALSE
+  otherwise if the timer is a periodic timer.
+
+startPeriodicAt(t0,dt) 
+  cancel any previously running timer and set to fire at time t1 =
+  t0+dt.  The timer will fire periodically every dt time units until
+  stopped.
+
+  As with alarms, the time ``t0`` is always assumed to be in the past. A
+  value of ``t0`` numerically greater than the current time (returned by
+  ``getNow()``) represents a time from before the last wraparound.
+
+startOneShotAt(t0,dt) 
+  cancel any previously running timer and set to fire at time t1 =
+  t0+dt.  The timer will fire once then stop.
+
+  ``t0`` is as in ``startPeriodicAt``.
+
+getNow() 
+  return the current time in the precision and width of the timer.
+
+gett0() 
+  return the time anchor for the previously started timer or the time
+  of the previous event for periodic timers.
+
+getdt() 
+  return the delay or period for the previously started timer.
+
+
+3. HAL guidelines
+====================================================================
+
+Platforms SHOULD expose their relevant timing capabilities using
+standard Alarm and Counter interfaces.  The design pattern presented
+here defines a component naming convention to allow platform
+independent access to particular Alarms and Counters if they exist
+and to cause compile errors if they do not.
+
+A platform specific hardware timer with precision ${P} and width
+${W} SHOULD be exposed as these two conventional Counter and Alarm
+components::
+
+  configuration Counter${P}${W}C
+  {
+    provides interface Counter< T${P}, uint${W}_t >;
+  }
+
+  generic configuration Alarm${P}${W}C()
+  {
+    provides interface Alarm< T${P}, uint${W}_t >;
+  }
+
+Instantiating an Alarm${P}${W}C component provides a new and independent
+Alarm.  If the platform presents a limited number of Alarm resources,
+then allocating more Alarms in an application than are available for the
+platform SHOULD produce a compile-time error.  See Appendices B and C
+for an example of how to make allocatable Alarms that are each
+implemented on independent hardware timers.
+
+For example, if a platform has an 8-bit 32kHz counter and three
+8-bit 32kHz alarms, then the Counter and Alarm interfaces for
+${P}=32khz and ${W}=16 are::
+
+  configuration Counter32khz8C
+  {
+    provides interface Counter< T32khz, uint8_t >;
+  }
+
+  generic configuration Alarm32khz8C()
+  {
+    provides interface Alarm< T32khz, uint8_t >;
+  }
+
+This pattern MAY be used to define components for the platform that
+are mutually incompatible in a single application.  Incompatible
+components SHOULD produce compile-time errors when compiled
+together.
+
+
+4. HIL requirements
+====================================================================
+
+The following component MUST be provided on all platforms
+::
+
+  HilTimerMilliC
+  BusyWaitMicroC
+
+Both of these components use "binary" units, i.e., 1/1024s for
+HilTimerMilliC and 1/1048576s for BusyWaitMicroC. Components using
+other precisions (e.g., regular, non-binary milliseconds) MAY also be
+provided.
+
+HilTimerMilliC
+--------------------------------------------------------------------
+
+::
+
+  configuration HilTimerMilliC
+  {
+    provides interface Init;
+    provides interface Timer<TMilli> as TimerMilli[ uint8_t num ];
+    provides interface LocalTime<TMilli>;
+  }
+
+A new timer is allocated using unique(UQ_TIMER_MILLI) to obtain a
+new unique timer number.  This timer number is used to index the
+TimerMilli parameterised interface.  UQ_TIMER_MILLI is defined in
+Timer.h.  HilTimerMilliC is used by the LocalTimeMilliC component and the
+TimerMilliC generic component, both found in ``tos/system/``
+
+BusyWaitMicroC
+--------------------------------------------------------------------
+
+::
+
+  configuration BusyWaitMicroC
+  {
+    provides interface BusyWait<TMicro,uint16_t>;
+  }
+
+BusyWaitMicroC allows applications to busy-wait for a number of
+microseconds. Its use should be restricted to situations where the
+delay is small and setting a timer or alarm would be impractical,
+inefficient or insufficiently precise.
+
+5. Utility components
+====================================================================
+
+A number of platform independent generic components are provided to
+help implementers and advanced users of the TinyOS timer system:
+
+* AlarmToTimerC
+* BusyWaitCounterC
+* CounterToLocalTimeC
+* TransformAlarmC
+* TransformCounterC
+* VirtualizeTimerC
+
+Appendices B and C show how these can be used to help implement
+the timer HAL and HIL.
+
+AlarmToTimerC
+--------------------------------------------------------------------
+
+AlarmToTimerC converts a 32-bit Alarm to a Timer.  ::
+
+  generic component AlarmToTimerC( typedef precision_tag )
+  {
+    provides interface Timer<precision_tag>;
+    uses interface Alarm<precision_tag,uint32_t>;
+  }
+
+
+BusyWaitCounterC
+--------------------------------------------------------------------
+
+BusyWaitCounterC uses a Counter to block until a specified amount of
+time elapses.  ::
+
+  generic component BusyWaitC( typedef precision_tag,
+    typedef size_type @integer() )
+  {
+    provides interface BusyWait<precision_tag,size_type>;
+    uses interface Counter<precision_tag,size_type>;
+  }
+
+
+CounterToLocalTimeC
+--------------------------------------------------------------------
+
+CounterToLocalTimeC converts from a 32-bit Counter to LocalTime.  ::
+
+  generic component CounterToLocalTimeC( precision_tag )
+  {
+    provides interface LocalTime<precision_tag>;
+    uses interface Counter<precision_tag,uint32_t>;
+  }
+
+
+TransformAlarmC
+--------------------------------------------------------------------
+
+TransformAlarmC decreases precision and/or widens an Alarm.  An
+already widened Counter component is used to help.  ::
+
+  generic component TransformAlarmC( 
+    typedef to_precision_tag,
+    typedef to_size_type @integer(),
+    typedef from_precision_tag,
+    typedef from_size_type @integer(),
+    uint8_t bit_shift_right )
+  {
+    provides interface Alarm<to_precision_tag,to_size_type> as Alarm;
+    uses interface Counter<to_precision_tag,to_size_type> as Counter;
+    uses interface Alarm<from_precision_tag,from_size_type> as AlarmFrom;
+  }
+
+to_precision_tag and to_size_type describe the final precision and
+final width for the provided Alarm.  from_precision_tag and
+from_size_type describe the precision and width for the source
+AlarmFrom.  bit_shift_right describes the bit-shift necessary to
+convert from the used precision to the provided precision.
+
+For instance to convert from an Alarm<T32khz,uint16_t> to an
+Alarm<TMilli,uint32_t>, the following TransformAlarmC would be
+created::
+
+  new TransformAlarmC( TMilli, uint32_t, T32khz, uint16_t, 5 )
+
+It is the exclusive responsibility of the developer using
+TransformAlarmC to ensure that all five of its arguments are self
+consistent.  No compile errors are generated if the parameters
+passed to TransformAlarmC are inconsistent.
+
+
+TransformCounterC
+--------------------------------------------------------------------
+
+TransformCounterC decreases precision and/or widens a Counter.  ::
+
+  generic component TransformCounterC(
+    typedef to_precision_tag,
+    typedef to_size_type @integer(),
+    typedef from_precision_tag,
+    typedef from_size_type @integer(),
+    uint8_t bit_shift_right,
+    typedef upper_count_type @integer() )
+  {
+    provides interface Counter<to_precision_tag,to_size_type> as Counter;
+    uses interface Counter<from_precision_tag,from_size_type> as CounterFrom;
+  }
+
+to_precision_tag and to_size_type describe the final precision and
+final width for the provided Counter.  from_precision_tag and
+from_size_type describe the precision and width for the source
+CounterFrom.  bit_shift_right describes the bit-shift necessary to
+convert from the used precision to the provided precision.
+upper_count_type describes the numeric type used to store the
+additional counter bits.  upper_count_type MUST be a type with width
+greater than or equal to the additional bits in to_size_type plus
+bit_shift_right.
+
+For instance to convert from a Counter<T32khz,uint16_t> to a
+Counter<TMilli,uint32_t>, the following TransformCounterC would be
+created::
+
+  new TransformCounterC( TMilli, uint32_t, T32khz, uint16_t, 5, uint32_t )
+
+VirtualizeTimerC
+--------------------------------------------------------------------
+
+VirtualizeTimerC uses a single Timer to create up to 255 virtual
+timers.  ::
+
+  generic component VirtualizeTimerC( typedef precision_tag, int max_timers )
+  {
+    provides interface Init;
+    provides interface Timer<precision_tag> as Timer[ uint8_t num ];
+    uses interface Timer<precision_tag> as TimerFrom;
+  }
+
+6. Implementation
+====================================================================
+
+The definition of the HIL interfaces are found in ``tinyos-2.x/tos/lib/timer``:
+
+  * ``Alarm.nc``
+  * ``BusyWait.nc``
+  * ``Counter.nc``
+  * ``LocalTime.nc``
+  * ``Timer.h`` defines precision tags and strings for unique()
+  * ``Timer.nc``
+
+The implementation of the utility components are also found in
+``tinyos-2.x/tos/lib/timer``:
+
+  * ``AlarmToTimerC.nc``
+  * ``BusyWaitCounterC.nc``
+  * ``CounterToLocalTimeC.nc``
+  * ``TransformAlarmC.nc``
+  * ``TransformCounterC.nc``
+  * ``VirtualizeAlarmC.nc``
+  * ``VirtualizeTimerC.nc``
+
+The implementation of timers for the MSP430 is in
+``tinyos-2.x/tos/chips/msp430/timer``:
+
+  * ``Alarm32khz16C.nc`` is generic and provides a new ``Alarm<T32khz,uint16_t>``
+  * ``Alarm32khz32C.nc`` is generic and provides a new ``Alarm<T32khz,uint32_t>``
+  * ``AlarmMilli16C.nc`` is generic and provides a new ``Alarm<TMilli,uint16_t>``
+  * ``AlarmMilli32C.nc`` is generic and provides a new ``Alarm<TMilli,uint32_t>``
+  * ``BusyWait32khzC.nc`` provides ``BusyWait<T32khz,uint16_t>``
+  * ``BusyWaitMicroC.nc`` provides ``BusyWait<TMicro,uint16_t>``
+  * ``Counter32khz16C.nc`` provides ``Counter<T32khz,uint16_t>``
+  * ``Counter32khz32C.nc`` provides ``Counter<T32khz,uint32_t>``
+  * ``CounterMilli16C.nc`` provides ``Counter<TMilli,uint16_t>``
+  * ``CounterMilli32C.nc`` provides ``Counter<TMilli,uint32_t>``
+  * ``GpioCaptureC.nc``
+  * ``HilTimerMilliC.nc`` provides ``LocalTime<TMilli>`` and 
+    ``Timer<TMilli> as TimerMilli[uint8_t num]``
+  * ``Msp430AlarmC.nc`` is generic and converts an MSP430 timer to a 16-bit Alarm
+  * ``Msp430Capture.nc`` HPL interface definition for MSP430 timer captures
+  * ``Msp430ClockC.nc`` exposes MSP430 hardware clock initialization
+  * ``Msp430ClockInit.nc`` HPL interface definition for hardware clock initialization
+  * ``Msp430ClockP.nc`` implements MSP430 hardware clock initialization and
+    calibration and startup
+  * ``Msp430Compare.nc`` HPL interface definition for MSP430 timer compares
+  * ``Msp430Counter32khzC.nc`` provides ``Counter<T32khz,uint16_t>`` based on
+    MSP430 TimerB
+  * ``Msp430CounterC.nc`` is generic and converts an Msp430Timer to a Counter
+  * ``Msp430CounterMicroC.nc`` provides ``Counter<TMicro,uint16_t>`` based on
+    MSP430 TimerA
+  * ``Msp430Timer.h`` defines additional MSP430 timer bitmasks and structs
+  * ``Msp430Timer.nc`` HPL interface definition
+  * ``Msp430Timer32khzC.nc`` is generic and allocates a new 32khz hardware timer
+  * ``Msp430Timer32khzMapC.nc`` exposes the MSP430 hardware timers as a
+    parameterized interface allocatable using Msp430Timer32khzC
+  * ``Msp430TimerC.nc`` exposes the MSP430 hardware timers
+  * ``Msp430TimerCapComP.nc`` is generic and implements the HPL for MSP430
+    capture/compare special function registers
+  * ``Msp430TimerCommonP.nc`` maps the MSP430 timer interrupts to Msp430TimerEvents
+  * ``Msp430TimerControl.nc`` HPL interface definition
+  * ``Msp430TimerEvent.nc`` HPL interface definition
+  * ``Msp430TimerP.nc`` is generic and implements the HPL for MSP430 timer
+    special function registers
+
+Implementation of timers for the ATmega128 and PXA27x may be found in
+``tinyos-2.x/tos/chips/atm128/timer`` and
+``tinyos-2.x/tos/chips/pxa27x/timer`` respectively.
+
+
+7. Author's Address
+====================================================================
+| Cory Sharp
+| Moteiv Corporation
+| 55 Hawthorne St, Suite 550
+| San Francisco, CA 94105
+|
+| phone - +1 415 692 0963
+| email - cory@moteiv.com
+|
+|
+| Martin Turon
+| P.O. Box 8525
+| Berkeley, CA 94707
+|
+| phone - +1 408 965 3355
+| email - mturon@xbow.com
+|
+|
+| David Gay
+| 2150 Shattuck Ave, Suite 1300
+| Intel Research
+| Berkeley, CA 94704
+|
+| phone - +1 510 495 3055
+| email - david.e.gay@intel.com
+
+
+Appendix A: Timer hardware on various microcontrollers
+====================================================================
+
+  a. Atmega128
+
+    i. Two 8-bit timers, each allowing
+
+      * 7 prescaler values (division by different powers of 2)
+      * Timer 0 can use an external 32768Hz crystal 
+      * One compare register, with many compare actions (change
+        output pin, clear counter, generate interrupt, etc)
+      
+
+    ii. Two 16-bit timers, each with
+
+      * 5 prescaler values
+      * External and software clocking options
+      * Three compare registers (again with many actions)
+      * Input capture
+
+  b. MSP430
+
+    i. Two 16-bit timers with
+
+      * One with three compare registers
+      * One with eight compare registers
+      * Each from distinct clock source
+      * Each with limited prescalers
+
+  c. Intel PXA27x
+
+    i. One fixed rate (3.25MHz) 32-bit timer with
+
+      * 4 compare registers
+      * Watchdog functionality
+
+    ii. 8 variable rate 32-bit timers with
+
+      * 1 associated compare register each
+      * Individually selectable rates: 1/32768s, 1ms, 1s, 1us
+      * Individually selectable sources: (32.768 external osc,
+        13 Mhz internal clock)
+
+    iii. Periodic & one-shot capability
+
+    iv. Two external sync events
+
+Appendix B: a microcontroller: Atmega 128 timer subsystem
+====================================================================
+
+The Atmega128 exposes its four timers through a common set of interfaces:
+
+  * HplTimer<width>   - get/set current time, overflow event, control, init
+  * HplCompare<width> - get/set compare time, fired event,    control
+  * HplCapture<width> - get/set capture time, captured event, control, config
+
+Parameterising these interfaces by width allows reusing the same interfaces
+for the 8 and 16-bit timers. This simplifies building reusable higher level
+components which are independent of timer width. ::
+
+  interface HplAtm128Timer<timer_size>
+  {
+    /// Timer value register: Direct access
+    async command timer_size get();
+    async command void       set( timer_size t );
+
+    /// Interrupt signals
+    async event void overflow();        //<! Signalled on overflow interrupt
+
+    /// Interrupt flag utilites: Bit level set/clr
+    async command void reset(); //<! Clear the overflow interrupt flag
+    async command void start(); //<! Enable the overflow interrupt
+    async command void stop();  //<! Turn off overflow interrupts
+    async command bool test();  //<! Did overflow interrupt occur?
+    async command bool isOn();  //<! Is overflow interrupt on?
+
+    /// Clock initialization interface
+    async command void    off();                     //<! Turn off the clock 
+    async command void    setScale( uint8_t scale);  //<! Turn on the clock
+    async command uint8_t getScale();                //<! Get prescaler setting
+  }
+
+  interface HplAtm128Compare<size_type>
+  {
+    /// Compare value register: Direct access
+    async command size_type get();
+    async command void      set(size_type t);
+
+    /// Interrupt signals
+    async event void fired();           //<! Signalled on compare interrupt
+
+    /// Interrupt flag utilites: Bit level set/clr
+    async command void reset();         //<! Clear the compare interrupt flag
+    async command void start();         //<! Enable the compare interrupt
+    async command void stop();          //<! Turn off comparee interrupts
+    async command bool test();          //<! Did compare interrupt occur?
+    async command bool isOn();          //<! Is compare interrupt on?
+  }
+
+  interface HplAtm128Capture<size_type>
+  {
+    /// Capture value register: Direct access
+    async command size_type get();
+    async command void      set(size_type t);
+
+    /// Interrupt signals
+    async event void captured(size_type t);  //<! Signalled on capture int
+
+    /// Interrupt flag utilites: Bit level set/clr  
+    async command void reset();          //<! Clear the capture interrupt flag
+    async command void start();          //<! Enable the capture interrupt
+    async command void stop();           //<! Turn off capture interrupts
+    async command bool test();           //<! Did capture interrupt occur?
+    async command bool isOn();           //<! Is capture interrupt on?
+
+    async command void setEdge(bool up); //<! True = detect rising edge
+  }
+
+These interfaces are provided by four components, corresponding to each
+hardware timer: HplAtm128Timer0AsyncC, and HplAtm128Timer0C through
+HplAtm128Timer3C. Timers 1 and 3 have three compare registers, so offer
+a parameterised HplAtm128Compare interface: ::
+
+  configuration HplAtm128Timer1C
+  {
+    provides {
+      // 16-bit Timers
+      interface HplAtm128Timer<uint16_t>   as Timer;
+      interface HplAtm128TimerCtrl16       as TimerCtrl;
+      interface HplAtm128Capture<uint16_t> as Capture;
+      interface HplAtm128Compare<uint16_t> as Compare[uint8_t id];
+    }
+  }
+  ...
+
+where the ``id`` corresponds to the compare register number. The parameterised
+interface is only connected for ``id`` equal to 0, 1 or 2. Attempts to use
+another value cause a compile-time error. This is achieved as follows (code
+from the implementation of ``HplAtm128Timer1C``) ::
+
+  Compare[0] = HplAtm128Timer1P.CompareA; 
+  Compare[1] = HplAtm128Timer1P.CompareB;
+  Compare[2] = HplAtm128Timer1P.CompareC;
+
+
+The Atmega128 chip components do not define a HAL, as the timer
+configuration choices (frequencies, use of input capture or compare output,
+etc) are platform-specific. Instead, it provides a few generic components
+for converting the HPL interfaces into platform-independent interfaces.
+These generic components include appropriate configuration parameters
+(e.g., prescaler values)::
+
+  generic module Atm128AlarmC(typedef frequency_tag,
+			      typedef timer_size @integer(),
+			      uint8_t prescaler,
+			      int mindt)
+  {
+    provides interface Init;
+    provides interface Alarm<frequency_tag, timer_size> as Alarm;
+    uses interface HplTimer<timer_size>;
+    uses interface HplCompare<timer_size>;
+  } ...
+
+  generic module Atm128CounterC(typedef frequency_tag,
+				typedef timer_size @integer())
+  {
+    provides interface Counter<frequency_tag,timer_size> as Counter;
+    uses interface HplTimer<timer_size> as Timer;
+  } ...
+
+As a result of issues arising from using timer 0 in asynchronous mode,
+the HAL also offers the following component: ::
+
+  generic configuration Atm128AlarmAsyncC(typedef precision, int divider) {
+    provides {
+      interface Init @atleastonce();
+      interface Alarm<precision, uint32_t>;
+      interface Counter<precision, uint32_t>;
+    }
+  }
+  ...
+
+which builds a 32-bit alarm and timer over timer 0. divider is used
+to initialise the timer0 scaling factor.
+
+
+Appendix C: a mote: Mica family timer subsystem
+====================================================================
+
+Members of the mica family (mica2, mica2dot, micaz) use the Atmega128
+microprocessor and have external crystals at 4 or 7.37MHz. Additionally,
+they can be run from an internal oscillator at 1, 2, 4, or 8 MHz. The
+internal oscillator is less precise, but allows for much faster startup
+from power-down and power-save modes (6 clocks vs 16000 clocks). Finally,
+power consumption is lower at the lower frequencies. 
+
+The mica family members support operation at all these frequencies via
+a ``MHZ`` preprocessor symbol, which can be defined to 1, 2, 4, or 8.
+If undefined, it defaults to a platform-dependent value (4 for mica2dot,
+8 for mica2 and micaz).
+
+The mica family configures its four timers in part based on the value
+of this MHZ symbol:
+
+* Timer 0: uses Atm128AlarmAsyncC to divide the external 32768Hz crystal
+  by 32, creating a 32-bit alarm and counter. This alarm and counter is
+  used to build HilTimerMilliC, using the AlarmToTimerC,
+  VirtualizeTimerC and CounterToLocalTimeC utility components.
+
+  Timing accuracy is as good as the external crystal.
+* Timer 1: the 16-bit hardware timer 1 is set to run at 1MHz if possible.
+  However, the set of dividers for timer 1 is limited to 1, 8,
+  64, 256 and 1024. So, when clocked at 2 or 4MHz, a divider of 1 is
+  selected and timer 1 runs at 2 or 4MHz. To reflect this fact, the 
+  HAL components exposing timer 1 are named ``CounterOne16C`` and
+  ``AlarmOne16C`` (rather than the ``CounterMicro16C`` ``AlarmMicro16C``
+  as suggested in Section 3).
+
+  32-bit microsecond Counters and Alarms, named ``CounterMicro32C`` and
+  ``AlarmMicro32C``, are created from ``CounterOne16C`` and
+  ``AlarmOne16C`` using the TransformAlarmC and TransformCounterC 
+  utility components.
+
+  Three compare registers are available on timer1, so up to three instances
+  of ``AlarmOne16C`` and/or ``AlarmMicro32C`` can be created. The timing
+  accuracy depends on how the mote is clocked:
+
+  - internal clock: depends on how well the clock is calibrated
+  - external 7.37MHz crystal: times will be off by ~8.6%
+  - external 4MHz crystal: times will be as accurate as the crystal
+* Timer 2: this timer is not currently exposed by the HAL.
+
+* Timer 3: the 16-bit hardware timer 3 is set to run at a rate close to
+  32768Hz, if possible. As with timer 1, the limited set of dividers makes
+  this impossible at some clock frequencies, so the 16-bit timer 3 HAL
+  components are named ``CounterThree16C`` and ``AlarmThree16C``. As 
+  with timer 1, the rate of timer 3 is adjusted in software to
+  build 32-bit counter and 32-bit alarms, giving components
+  ``Counter32khz32C`` and ``Alarm32khz32C``. As with timer 1, three compare
+  registers, hence up to three instances of ``Alarm32khz32C`` and/or
+  ``AlarmThree16C`` are available.
+
+  At 1, 2, 4 and 8MHz, ``Counter32khz32C`` and ``Alarm32khz32C`` run
+  at 31.25kHz (plus clock rate inaccuracy). At 7.37MHz, they run at
+  ~28.8kHz.
+
+The automatic allocation of compare registers to alarms (and
+corresponding compile-time error when too many compare registers are
+used) is achieved as follows.  The implementations of ``AlarmOne16C``
+and ``AlarmThree16C`` use the ``Atm128AlarmC`` generic component and
+wire it, using ``unique``, to one of the compare registers offered by
+``HplAtm128Timer1C`` and ``HplAtm128Timer3C``::
+
+  generic configuration AlarmOne16C()
+  {
+    provides interface Alarm<TOne, uint16_t>;
+  }
+  implementation
+  {
+    components HplAtm128Timer1C, InitOneP,
+      new Atm128AlarmC(TOne, uint16_t, 3) as NAlarm;
+
+    Alarm = NAlarm;
+    NAlarm.HplAtm128Timer -> HplAtm128Timer1C.Timer;
+    NAlarm.HplAtm128Compare -> HplAtm128Timer1C.Compare[unique(UQ_TIMER1_COMPARE)];
+  }
+
+On the fourth creation of an ``AlarmOne16C``, ``unique(UQ_TIMER1_COMPARE)``
+will return 3, causing a compile-time error as discussed in Appendix B
+(``HplAtm128Timer1C``'s ``Compare`` interface is only defined for values
+from 0 to 2).
+
+
+When an Atmega128 is in any power-saving mode, hardware timers 1, 2 and 3
+stop counting. The default Atmega128 power management *will* enter these
+power-saving modes even when timers 1 and 3 are enabled, so time as
+measured by timers 1 and 3 does *not* represent real time.  However, if any
+alarms built on timers 1 or 3 are active, the Atmega128 power management
+will not enter power-saving modes.
+
+The mica family HIL components are built as follows:
+
+* HilTimerMilliC: built as described above from hardware timer 0.
+* BusyWaitMicroC: implemented using a simple software busy-wait loop which
+  waits for ``MHZ`` cycles per requested microsecond. Accuracy is the same as
+  Timer 1.
+
+Finally, the mica family motes measure their clock rate at boot time, based
+on the external 32768Hz crystal. The results of this clock rate measurement
+are made available via the ``cyclesPerJiffy`` command of the
+``Atm128Calibrate`` interface of the ``MeasureClockC`` component. This
+command reports the number of cycles per 1/32768s. Please see this interface
+definition for other useful commands for more accurate timing.
+
diff --git a/doc/txt/tep103.txt b/doc/txt/tep103.txt
new file mode 100644
index 00000000..31a3571c
--- /dev/null
+++ b/doc/txt/tep103.txt
@@ -0,0 +1,706 @@
+==============================================
+Permanent Data Storage (Flash)
+==============================================
+
+:TEP: 103
+:Group: Core Working Group
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: David Gay, Jonathan Hui
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents a set of hardware-independent interfaces to non-volatile
+storage for TinyOS 2.x. It describes some design principles for the HPL and
+HAL layers of various flash chips.
+
+1. Introduction
+====================================================================
+
+Flash chips are a form of EEPROM (electrically-erasable, programmable
+read-only memory), distinguished by a fast erase capability. However,
+erases can only be done in large units (from 256B to 128kB depending on the
+flash chip). Erases are the only way to switch bits from 0 to 1, and
+programming operations can only switch 1's to 0's. Additionally, some
+chips require that programming only happen once between each erase,
+or that it be in relatively large units (e.g., 256B).
+
+In the table below, we summarise these differences by categorising
+flash chips by their underlying technology (NOR vs NAND). We also
+include a column for Atmel's AT45DB flash chip family, as it has
+significantly different tradeoffs than other flash chips:
+
+
+  =============  ==================  =================  ===================
+       	X        NOR                 AT45DB              NAND  
+  	         (ex: ST M25P40,   		         (ex: Samsung
+  	         Intel PXA27x)     		         K9K1G08R0B)
+  =============  ==================  =================  ===================
+  Erase	         Slow (seconds)      Fast (ms)	        Fast (ms)
+  Erase unit     Large (64KB-128KB)  Small (256B)       Medium (8KB-32KB)
+  Writes         Slow (100s kB/s)    Slow (60kB/s)      Fast (MBs/s)
+  Write unit     1 bit               256B               100's of bytes
+  Bit-errors     Low                 Low                High (requires ECC,
+                                                        bad-block mapping)
+  Read	         Bus limited [*]_    Slow+Bus limited   Bus limited
+  Erase cycles   10^4 - 10^5         10^4 [*]_          10^5 - 10^7
+  Intended use   Code storage        Data storage       Data storage
+  Energy/byte    1uJ                 1uJ                .01uJ
+  =============  ==================  =================  ===================
+
+.. [*] M25P40 reads are limited by the use of a 25MHz SPI bus. The PXA27x flash
+       is memory mapped (reads are very fast and can directly execute code).
+.. [*] Or infinite? Data sheet just says that every page within a sector
+       must be written every 10^4 writes within that sector
+
+The energy/byte is the per-byte cost of erasing plus programming. It is
+derived from the timing and power consumption of erase and write operations
+(for NOR flash, values are for the STMicroelectronics M25P family, for NAND
+flash, values are from the Samsung datasheet). Energy/byte for reads appears
+to depend mostly on how long the read takes (the power consumptions are
+comparable), i.e., on the efficiency of the bus + processor.
+
+Early TinyOS platforms all used a flash chip from the AT45DB
+family. In TinyOS 1.x, this chip could be accessed through three
+different components:
+
+- Using a low-level interface (``PageEEPROMC``) which gave direct
+  access to per-page read, write and erase operations.
+- Using a high-level memory-like interface (``ByteEEPROMC``) with
+  read, write and logging operations.
+- Using a simple file system (``Matchbox``) with sequential-only
+  files [1_].
+
+Some more recent platforms use different flash chips: the ST M25P family (Telos
+rev. B, eyes) and the Intel Strataflash (Intel Mote2). None of the
+three components listed above are supported on these chips:
+
+- The ``PageEEPROMC`` component is (and was intended to be) AT45DB-specific
+- ``ByteEEPROMC`` allows arbitrary rewrites of sections of the flash.
+  This is not readily implementable on a flash chip with large erase units.
+- The ``Matchbox`` implementation was AT45DB-specific. It was not
+  reimplemented for these other chips, in part because it does not
+  support some applications (e.g., network reprogramming) very well.
+
+2. Storage in TinyOS 2.x
+====================================================================
+
+One approach to hiding the differences between different flash chips is to
+provide a disk-like, block interface (with, e.g., 512B blocks). This is the
+approach taken by compact flash cards. However, in the context of TinyOS,
+this approach has several drawbacks:
+
+- This approach is protected by patents, making it difficult to provide
+  in a free, open-source operating system.
+- To support arbitrary block writes where blocks are smaller than the
+  erase unit, and to deal with the limited number of erase cycles/block
+  requires remapping blocks. We believe that maintaining this remapping
+  table is too expensive on many mote-class devices.
+
+A second approach is to provide a generic low-level interface providing
+operations (read, write, erase) corresponding to the basic flash
+operations, along with information describing the flash chip's layout
+(minimum write and erase unit, timing information, etc). However,
+we believe that the large differences between NAND and NOR flash (see the
+table above), in particular the differences in reliability, write and
+erase units, make the design of a useful generic low-level interface
+tricky at best.
+
+We thus believe it is best, for now at least, to define high-level
+storage abstractions that are useful for sensor network applications,
+and leave their implementation up to each flash chip - such abstractions
+will be necessary anyway. We leave open the possibility that a future
+TEP may define portable lower-level flash interfaces (either for all
+flash chips, or, e.g., for NOR-family flashes). Such low-level
+interfaces would allow implementations of the storage abstractions
+defined in this TEP to be used for multiple flash chips.
+
+This TEP describes three high-level storage abstractions: large objects
+written in a single session, small objects with arbitrary reads and
+writes, and logs. TinyOS 2.x, divides flash chips into separate volumes
+(with sizes fixed at compile-time). Each volume provides a single
+storage abstraction (the abstraction defines the format).
+
+We prefer the use of single abstractions over fixed-size volumes over
+the use of a more general filing system (like Matchbox) for several
+reasons:
+
+- TinyOS is currently targeted at running a single application, and many
+  applications know their storage needs in advance: for instance, a
+  little space for configuration data, and everything else for a log of
+  all sampled data. In such cases, the flexibility offered by a filing
+  system (e.g., arbitrary numbers of files) is overkill,
+- Each abstraction is relatively easy to implement on a new flash chip, and
+  has relatively little overhead.
+- The problem of dealing with the limited number of erase cycles/block
+  is simplified: it is unlikely that user applications will need to
+  rewrite the same small object 100'000 times, or cycle 100'000 times
+  through their log. Thus the abstractions can mostly ignore the need for
+  "wear levelling" (ensuring that each block of the flash is erased
+  the same number of time, to maximise flash chip lifetime).
+
+New abstractions (including a filing system) can easily be added to
+this framework.
+
+The rest of this TEP covers some principles for the organisation of
+flash chips (Section 3), then describes the flash volumes and
+storage abstractions in detail (Section 4).
+
+
+3. HPL/HAL/HIL Architecture
+====================================================================
+
+The flash chip architecture follows the three-layer Hardware
+Abstraction Architecture (HAA), with each chip providing a presentation
+layer (HPL, Section 3.1), adaptation layer (HAL, Section 3.2) and
+platform-independent interface layer (HIL, Section 3.3) [2_].
+The implementation of these layers SHOULD be found in the
+``tos/chips/CHIPNAME`` directory. If a flash chip is part of a larger
+family with a similar interface, the HAA SHOULD support all family members
+by relying, e.g., on platform-provided configuration information.
+
+Appendix A shows example HPL and HAL specifications for the AT45DB
+and ST M25P chip families.
+
+
+3.1 Hardware Presentation Layer (HPL)
+--------------------------------------------------------------------
+
+The flash HPL has a chip-dependent, platform-independent interface. The
+implementation of this HPL is platform-dependent. The flash HPL SHOULD be
+stateless.
+
+To remain platform independent, a flash chip's HPL SHOULD connect to
+platform-specific components
+providing access to the flash chip; these components
+SHOULD be placed in the ``tos/platforms/PLATFORM/chips/CHIPNAME``
+directory. If the flash chip implementation supports a family of
+flash chips, this directory MAY also contain a file describing the
+particular flash chip found on the platform.
+
+3.2 Hardware Adaptation Layer (HAL)
+--------------------------------------------------------------------
+
+The flash HAL has a chip-dependent, platform-independent interface and
+implementation. Flash families with a common HPL SHOULD have a common
+HAL. Flash HAL's SHOULD expose a ``Resource`` interface and automatically
+power-manage the underlying flash chip. Finally, the flash HAL MUST
+provide a way to access the volume information specified by the
+programmer (see Section 3). This allows users to build new flash
+abstractions that interact cleanly with the rest of the flash system.
+
+3.3 Hardware Interface Layer (HIL)
+--------------------------------------------------------------------
+
+Each flash chip MUST support at least one of the storage abstractions
+described in Section 4. These abstractions SHOULD be presented in
+components named ``ChipAbstractionC``, e.g., ``At45dbLogStorageC``.
+Additionally, a flash chip implementation MAY support platforms
+with multiple instances of the same storage chip. The way in which
+this is achieved is not specified further in this TEP.
+
+Each platform MUST have ``AbstractionC`` components (e.g.,
+``LogStorageC``) implementing the storage abstractions of Section 4
+supported by its flash chip(s). On platforms with multiple storage chips
+SHOULD redirect uses of ``AbstractionC`` to the appropriate storage
+chip, based on the requested volume.
+
+4. Non-Volatile Storage Abstractions
+===================================================================
+
+The HIL implementations are platform-independent, but chip (family)
+dependent. They implement the three storage abstractions and
+volume structure discussed in the introduction.
+
+4.1. Volumes
+-------------------------------------------------------------------
+
+The division of the flash chip into fixed-size volumes is specified by
+an XML file that is placed in the application's directory (where one
+types 'make'). The XML file specifies the allocation as follows: ::
+
+  <volume_table>
+    <volume name="DELUGE0" size="65536" />
+    <volume name="CONFIGLOG" size="65536" />
+    <volume name="DATALOG" size="131072" />
+    <volume name="GOLDENIMAGE" size="65536" base="983040" />
+  </volume_table>
+
+The name and size parameters are required, while base is optional. The name
+is a string containing one or more characters in [a-zA-Z0-9\_], while size
+and base are in bytes. Each storage chip MUST provide a compile-time tool
+that translates the allocation specification to chip-specific nesC
+code. There is no constraint on how this is done or what code is produced,
+except that the specification to physical allocation MUST be one-to-one
+(i.e. a given specification should always have the same resulting physical
+allocation on a given chip) and the result MUST be placed in the build
+directory. When not specified, the tool picks a suitable physical
+location for a volume. If there is any reason that the physical allocation
+cannot be satisfied, an error should be given at compile time. The tool
+SHOULD be named ``tos-storage-CHIPNAME`` and be distributed with the other
+tools supporting a platform. The XML file SHOULD be named
+``volumes-CHIPNAME.xml``.
+
+The compile-time tool MUST prepend 'VOLUME\_' to each volume name in
+the XML file and '#define' each resulting name to map to a unique
+integer.
+
+The storage abstractions are accessed by instantiating generic
+components that take the volume macro as argument: ::
+
+  components new BlockStorageC(VOLUME_DELUGE0);
+
+If the named volume is not in the specification, nesC will give a
+compile-time error since the symbol will be undefined.
+
+A volume MUST NOT be used with more than one storage abstraction instance.
+
+
+4.2 Large objects
+------------------------------------------------------------------
+
+The motivating example for large objects is the transmission or
+long-term storage of large pieces of data. For instance, programs in a
+network-reprogramming system, or large data-packets in a reliable
+data-transmission system. Such objects have an interesting
+characteristic: each byte in the object is written at most once.
+
+This leads to the definition of the ``BlockStorageC`` abstraction for storing
+large objects or other "write-once" objects:
+
+- A large object ranges from a few kilobytes upwards.
+- A large object is erased before the first write.
+- A sync ensures that a large object survives a reboot or crash
+- Reads are unrestricted
+- Each byte can only be written once between two erases
+
+Large objects are accessed by instantiating a BlockStorageC component
+which takes a volume id argument: ::
+
+  generic configuration BlockStorageC(volume_id_t volid) {
+    provides {
+	interface BlockWrite;
+	interface BlockRead;
+    }
+  } ...
+
+The ``BlockRead`` and ``BlockWrite`` interfaces (briefly presented in
+Appendix B) contain the following operations (all split-phase, except
+``BlockRead.getSize``):
+
+- ``BlockWrite.erase``: erase the volume. After a reboot or a commit, a
+  volume MUST be erased before it can be written to.
+
+- ``BlockWrite.write``: write some bytes starting at a given
+  offset. Each byte MUST NOT be written more than once between two erases.
+
+
+- ``BlockWrite.sync``: ensure all previous writes are present on a given
+  volume. Sync MUST be called to ensure written data survives a reboot
+  or crash.
+
+- ``BlockRead.read``: read some bytes starting at a given offset.
+
+- ``BlockRead.computeCrc``: compute the CRC of some bytes starting at a
+  given offset.
+
+- ``BlockRead.getSize``: return bytes available for large object storage in
+  volume.
+
+For full details on arguments and other considerations, see the comments in
+the interface definitions.
+
+Note that these interfaces contain no direct support for verifying the
+integrity of the BlockStorage data, but such support can easily be built
+by using the ``computeCrc`` command and storing the result in a
+well-defined location, and checking this CRC when desired.
+
+
+4.3 Logging
+------------------------------------------------------------------
+
+Event and result logging is a common requirement in sensor
+networks. Such logging should be reliable (a mote crash should not
+lose data). It should also be easy to extract data from the log,
+either partially or fully. Some logs are *linear* (stop logging when
+the volume is full), others are *circular* (the oldest data is
+overwritten when the volume is full).
+
+The ``LogStorageC`` abstraction supports these requirements.  The log is
+record based: each call to ``LogWrite.append`` (see below) creates a new
+record. On failure (crash or reboot), the log MUST only lose whole
+records from the end of the log. Additionally, once a circular log wraps
+around, calls to ``LogWrite.append`` MUST only lose whole records from
+the beginning of the log.
+
+Logs are accessed by instantiating a LogStorageC component which takes a
+volume id and a boolean argument: ::
+
+  generic configuration LogStorageC(volume_id_t volid, bool circular) {
+    provides {
+	interface LogWrite;
+	interface LogRead;
+    }
+  } ...
+
+If the ``circular`` argument is TRUE, the log is circular; otherwise
+it is linear.
+
+The ``LogRead`` and ``LogWrite`` interfaces (briefly presented in
+Appendix B) contain the following operations (all split-phase except
+``LogWrite.currentOffset``, ``LogRead.currentOffset`` and
+``LogRead.getSize``):
+
+- ``LogWrite.erase``: erase the log. A log MUST be erased (possibly in
+  some previous session) before any other operation can be used.
+
+- ``LogWrite.append``: append some bytes to the log. In a circular log,
+  this may overwrite the current read position. In this case, the
+  read position MUST be advanced to the log's current beginning
+  (i.e., as if ``LogRead.seek`` had been called with ``SEEK_BEGINNING``).
+  Additionally, the ``LogWrite.appendDone`` event reports whenever, in a
+  circular log, an append MAY have erased old records.
+
+  Each append creates a separate record. Log implementations may have a
+  maximum record size; all implementations MUST support records of up
+  to 255 bytes.
+
+- ``LogWrite.sync``: guarantee that data written so far will not be lost to
+  a crash or reboot (it can still be overwritten when a circular log wraps
+  around). Using ``sync`` MAY waste some space in the log.
+
+- ``LogWrite.currentOffset``: return cookie representing current
+  append position (for use with ``LogRead.seek``).
+
+- ``LogRead.read``: read some bytes from the current read position in
+  the log and advance the read position.
+
+  ``LogStorageC`` implementations MUST include error detection codes
+  to increase the likelihood of detection of corrupted or invalid log
+  data. Data returned by a successful read MUST have passed this
+  error detection check. The behaviour on failure of this check is
+  unspecified (e.g., the at45db believes as if the end of the log has
+  been reached; other implementations may behave differently).
+
+- ``LogRead.currentOffset``: return cookie representing current
+  read position (for use with ``LogRead.seek``).
+
+- ``LogRead.seek``: set the read position to a value returned by
+  a prior call to ``LogWrite.currentOffset`` or ``LogRead.currentOffset``,
+  or to the special ``SEEK_BEGINNING`` value. In a circular log, if
+  the specified position has been overwritten, behave as if
+  ``SEEK_BEGINNING`` was requested.
+
+  ``SEEK_BEGINNING`` positions the read position at the beginning of
+  the oldest record still present in the log.
+
+  After reboot, the current read position is ``SEEK_BEGINNING``.
+
+- ``LogRead.getSize``: return an approximation of the log's capacity
+  in bytes. Uses of ``sync`` and other overhead may reduce this number.
+
+For full details on arguments, etc, see the comments in the interface
+definitions.
+
+Note that while each call to ``append`` logically creates a separate
+record, the ``LogStorageC`` API does not report record
+boundaries. Additionally, crashes, reboots, and appends after
+wrap-around in a circular log can cause the loss of multiple consecutive
+records. Taken together, these restrictions mean that a ``LogStorageC``
+implementation MAY internally aggregate several consecutive appends into
+a single record. However, the guarantee that only whole records are lost
+is sufficient to ensure that applications do not to have worry about
+incomplete or inconsistent log entries.
+
+
+4.4 Small objects:
+------------------------------------------------------------------
+
+Sensor network applications need to store configuration data, e.g.,
+mote identity, radio frequency, sample rates, etc. Such data is not large, but
+losing it may lead to a mote misbehaving or losing contact with the
+network.
+
+The ``ConfigStorageC`` abstraction stores a single small object in a volume. It:
+
+- Assumes that configuration data is relatively small (a few
+  hundred bytes).
+- Allows random reads and writes.
+- Has simple transactional behaviour: each read is a separate transaction,
+  all writes up to a commit form a single transaction.
+- At reboot, the volume contains the data as of the most recent successful
+  commit.
+
+Small objects are accessed by instantiating a ConfigStorageC component
+which takes a volume id argument: ::
+
+  generic configuration ConfigStorageC(volume_id_t volid) {
+    provides {
+	interface Mount;
+	interface ConfigStorage;
+    }
+  } ...
+
+A small object MUST be mounted (via the ``Mount`` interface) before
+the first use.
+
+The ``Mount`` and ``ConfigStorage`` interfaces (briefly presented in
+Appendix B) contain the following operations (all split-phase except
+``ConfigStorage.getSize`` and ``ConfigStorage.valid``):
+
+- ``Mount.mount``: mount the volume.
+
+- ``ConfigStorage.valid``: return TRUE if the volume contains a
+  valid small object.
+
+- ``ConfigStorage.read``: read some bytes starting at a given offset.
+  Fails if the small object is not valid. Note that this reads the
+  data as of the last successful commit.
+
+- ``ConfigStorage.write``: write some bytes to a given offset.
+
+- ``ConfigStorage.commit``: make the small object contents reflect all the
+  writes since the last commit.
+
+- ``ConfigStorage.getSize``: return the number of bytes that can be stored
+  in the small object.
+
+For full details on arguments, etc, see the comments in the interface
+definitions.
+
+5. Implementations
+====================================================================
+
+An AT45DB implementation can be found in tinyos-2.x/tos/chips/at45db.
+
+An ST M25P implementation can be found in tinyos-2.x/tos/chips/stm25p.
+
+
+6. Authors' Addresses
+====================================================================
+
+| David Gay
+| 2150 Shattuck Ave, Suite 1300
+| Intel Research
+| Berkeley, CA 94704
+|
+| phone - +1 510 495 3055
+| email - david.e.gay@intel.com
+|
+|
+| Jonathan Hui
+| 657 Mission St. Ste. 600
+| Arched Rock Corporation
+| San Francisco, CA 94105-4120
+|
+| phone - +1 415 692 0828
+| email - jhui@archedrock.com
+
+7. Citations
+====================================================================
+
+.. [1] David Gay. "Design of Matchbox, the simple filing system for
+   motes. (version 1.0)."
+
+.. [2] TEP 2: Hardware Abstraction Architecture.
+
+
+Appendix A. HAA for some existing flash chips
+====================================================================
+
+A.1 AT45DB
+------------------------------------------------------------------
+
+The Atmel AT45DB family HPL is: ::
+
+  configuration HplAt45dbC {
+    provides interface HplAt45db;
+  } ...
+
+The ``HplAt45db`` interface has flash->buffer, buffer->flash, compare
+buffer to flash, erase page, read, compute CRC, and write operations.  Most
+of these operations are asynchronous, i.e., their completion is signaled
+before the flash chip has completed the operation. The HPL also includes
+operations to wait for asynchronous operations to complete.
+
+A generic, system-independent implementation of the HPL
+(``HplAt45dbByteC``) is included allowing platforms to just provide SPI and
+chip selection interfaces.
+
+Different members of the AT45DB family are supported by specifying a few
+constants (number of pages, page size).
+
+The AT45DB HAL has two components, one for chip access and the other
+providing volume information: ::
+
+  component At45dbC
+  {
+    provides {
+      interface At45db;
+      interface Resource[uint8_t client];
+      interface ResourceController;
+      interface ArbiterInfo;
+    }
+  } ...
+
+  configuration At45dbStorageManagerC {
+    provides interface At45dbVolume[volume_id_t volid];
+  } ...
+
+
+Note that the AT45DB HAL resource management is independent of the
+underlying HPL's power management. The motivation for this is that
+individual flash operations may take a long time, so it may be desirable to
+release the flash's bus during long-running operations.
+
+The ``At45db`` interface abstracts from the low-level HPL operations by:
+
+- using the flash's 2 RAM buffers as a cache to allow faster reads and
+  writes
+- hiding the asynchronous nature of the HPL operations
+- verifying that all writes were successful
+
+It provides cached read, write and CRC computation, and page erase and
+copy. It also includes flush and sync operations to manage the cache.
+
+The ``At45dbVolume`` interface has operations to report volume size and
+map volume-relative pages to absolute pages.
+
+A.2 ST M25P
+------------------------------------------------------------------
+
+The ST M25P family HPL is: ::
+
+  configuration Stm25pSpiC {
+    provides interface Init;
+    provides interface Resource;
+    provides interface Stm25pSpi;
+  }
+
+The ``Stm25pSpi`` interface has read, write, compute CRC, sector erase
+and block erase operations. The implementation of this HPL is
+system-independent, built over a few system-dependent components
+providing SPI and chip selection interfaces.
+
+Note that these two examples have different resource management policies:
+the AT45DB encapsulates resource acquisition and release within each
+operation, while the M25P family requires that HPL users acquire and
+release the resource itself.
+
+The ST M25P HAL is: ::
+
+  configuration Stm25pSectorC {
+    provides interface Resource as ClientResource[storage_volume_t volume];
+    provides interface Stm25pSector as Sector[storage_volume_t volume];
+    provides interface Stm25pVolume as Volume[storage_volume_t volume];
+  }
+
+The ``Stm25pSector`` interface provides volume-relative operations similar
+to those from the HPL interface: read, write, compute CRC and
+erase. Additionally, it has operations to report volume size and remap
+volume-relative addresses. Clients of the ST M25P HAL must implement the
+``getVolumeId`` event of the ``Stm25pVolume`` interface so that the HAL can
+obtain the volume id of each of its clients.
+
+Appendix B. Storage interfaces
+====================================================================
+
+These interfaces are presented briefly here for reference; please refer
+to the TinyOS documentation for a full description of the commands,
+events and their parameters.
+
+B.1 BlockStorage interfaces
+------------------------------------------------------------------
+
+The BlockStorage interfaces are: ::
+
+  interface BlockRead {
+    command error_t read(storage_addr_t addr, void* buf, storage_len_t len);
+    event void readDone(storage_addr_t addr, void* buf, storage_len_t len,
+			error_t error);
+
+    command error_t computeCrc(storage_addr_t addr, storage_len_t len,
+			       uint16_t crc);
+    event void computeCrcDone(storage_addr_t addr, storage_len_t len,
+			      uint16_t crc, error_t error);
+
+    command storage_len_t getSize();
+  }
+
+  interface BlockWrite {
+    command error_t write(storage_addr_t addr, void* buf, storage_len_t len);
+    event void writeDone(storage_addr_t addr, void* buf, storage_len_t len,
+			 error_t error);
+
+    command error_t erase();
+    event void eraseDone(error_t error);
+
+    command error_t sync();
+    event void syncDone(error_t error);
+  }
+
+B.2 ConfigStorage interfaces
+------------------------------------------------------------------
+
+The ConfigStorage interfaces are: ::
+
+  interface Mount {
+    command error_t mount();
+    event void mountDone(error_t error);
+  }
+
+  interface ConfigStorage {
+    command error_t read(storage_addr_t addr, void* buf, storage_len_t len);
+    event void readDone(storage_addr_t addr, void* buf, storage_len_t len,
+			error_t error);
+
+    command error_t write(storage_addr_t addr, void* buf, storage_len_t len);
+    event void writeDone(storage_addr_t addr, void* buf, storage_len_t len,
+			 error_t error);
+
+    command error_t commit();
+    event void commitDone(error_t error);
+
+    command storage_len_t getSize();
+    command bool valid();
+  }
+
+B.3 LogStorage interfaces
+------------------------------------------------------------------
+
+The LogStorage interfaces are: ::
+
+  interface LogRead {
+    command error_t read(void* buf, storage_len_t len);
+    event void readDone(void* buf, storage_len_t len, error_t error);
+
+    command storage_cookie_t currentOffset();
+
+    command error_t seek(storage_cookie_t offset);
+    event void seekDone(error_t error);
+
+    command storage_len_t getSize();
+  }
+
+  interface LogWrite {
+    command error_t append(void* buf, storage_len_t len);
+    event void appendDone(void* buf, storage_len_t len, bool recordsLost,
+			  error_t error);
+
+    command storage_cookie_t currentOffset();
+
+    command error_t erase();
+    event void eraseDone(error_t error);
+
+    command error_t sync();
+    event void syncDone(error_t error);
+  }
diff --git a/doc/txt/tep105.txt b/doc/txt/tep105.txt
new file mode 100644
index 00000000..23233597
--- /dev/null
+++ b/doc/txt/tep105.txt
@@ -0,0 +1,326 @@
+===================================
+Low Power Listening
+===================================
+
+:TEP: 105
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: David Moss, Jonathan Hui, Kevin Klues
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+
+Abstract
+====================================================================
+
+This TEP describes the structure and implementation of the TinyOS 2.x 
+link layer abstractions. The architecture is designed to allow each radio 
+type to implement its own low power strategy within the Hardware Adaptation
+Layer (HAL), while maintaining a common application interface.  The 
+history and strategies for low power listening are discussed, as well 
+as expected behavior and implementation recommendations.
+
+1. Introduction
+====================================================================
+
+Asynchronous low power listening is a strategy used to duty cycle 
+the radio while ensuring reliable message delivery since TinyOS 1.x 
+[MICA2]_. 
+
+While a CC1000 or CC2420 radio is turned on and listening, it can 
+actively consume anywhere between 7.4 to 18.8 mA on top of the power 
+consumed by other components in the system [CC1000]_,[CC2420]_.  
+This can rapidly deplete batteries.  In the interest of extending 
+battery lifetime, it is best to duty cycle the radio on and off to
+prevent this idle waste of energy.  In an asychronous low power 
+message delivery scheme, the duty cycling receiver node saves the 
+most energy by performing short, periodic receive checks.  The power 
+consumption burden is then placed on the transmitter node, which 
+must modulate the radio channel long enough for the recipient?s 
+receive check to detect an incoming message.  A synchronous low 
+power message delivery scheme takes this idea a step further by 
+allowing the transmitter to only transmit when it knows the 
+destination node is performing a receive check.
+
+2. Background
+====================================================================
+
+2.1 Early TinyOS 1.x CC1000 Low Power Listening Implementation
+--------------------------------------------------------------------
+
+TinyOS 1.x introduced low power listening on the CC1000 radio, but 
+never introduced a similar scheme for the CC2420 radio in the baseline.  
+The CC1000 radio had the following low power listening commands, 
+provided directly by CC1000RadioIntM:::
+
+  command result_t SetListeningMode(uint8_t power);
+  command uint8_t GetListeningMode();
+  command result_t SetTransmitMode(uint8_t power);
+  command uint8_t GetTransmitMode();
+
+The uint8_t 'power' mode parameter was initially defined as follows:::
+
+  //Original CC1000 Low Power Listening Modes
+  Power Mode 0 = 100% duty cycle
+  Power Mode 1 = 35.5% duty cycle
+  Power Mode 2 = 11.5% duty cycle
+  Power Mode 3 = 7.53% duty cycle
+  Power Mode 4 = 5.61% duty cycle
+  Power Mode 5 = 2.22% duty cycle
+  Power Mode 6 = 1.00% duty cycle
+
+There were several issues with this interface and implementation.  
+First, setting up a low power network was cumbersome.  The low power 
+listening commands had to be directly wired through CC1000RadioIntM, 
+and called while the radio was not performing any transactions.  
+Second, each node in a network was expected to have the same radio 
+power mode.  Finally, the pre-programmed duty cycles were not linear 
+and offered a very limited selection of options.
+
+In this low power listening implementation, the transmitter mote would 
+transmit a packet that consisted of an extremely long preamble.  This 
+preamble was long enough to span a complete receive check period.   On 
+the receiver?s end, the radio would turn on and read bits from the 
+radio.  If a preamble sequence was detected in the incoming bits, the 
+receiver?s radio would remain on for the full duration of the 
+transmitter?s preamble and wait for the packet at the end.  
+
+This original low power listening scheme was rather inefficient on both 
+the transmit and receive end.  On the receive end, turning on the radio 
+completely and reading in bits typically cost much more energy than 
+necessary.  The transmitter's long preamble could end up costing both 
+nodes to have their radios on much longer than required, sending and 
+receiving useless preamble bits.
+
+2.2 CC1000 Pulse Check Implementation
+--------------------------------------------------------------------
+
+Joe Polastre and Jason Hill developed a better receive check 
+implementation in the CC1000 ?Pulse Check? radio stack for TinyOS 1.x, 
+while maintaining the same interface.  This implementation took advantage 
+of a Clear Channel Assessment (CCA) to determine if a transmitter was 
+nearby. 
+
+In this implementation, the CC1000 radio did not have to be turned on 
+completely, so it consumed less maximum current than the previous 
+implementation.  The radio on-time was also significantly reduced, only 
+turning on long enough for a single ADC conversion to occur.  If energy 
+was detected on the channel after the first ADC conversion, subsequent 
+ADC conversions would verify this before committing to turning the 
+radio receiver on completely.
+
+In this implementation the receiver's efficiency dramatically improved, 
+but the transmitter still sent a long, inefficient preamble.  Energy 
+consumption used to transmit messages was still high, while throughput 
+was still low.
+
+2.3 Possible Improvements
+--------------------------------------------------------------------
+
+Low power listening is a struggle between minimizing energy efficiency 
+and maximizing throughput.   In an asynchronous low power listening 
+scheme, several improvements can be made over earlier implementations.  
+One improvement that could have been made to earlier implementations is 
+to remove the long transmitted preamble and send many smaller messages 
+instead.  For example, the transmitter could send the same message over 
+and over again for the duration of the receiver's receive check period.  
+The receiver could wake up and see that another node is transmitting, 
+receive a full message, and finally send back an acknowledgement for that 
+message.  The transmitter would see the acknowledgement and stop 
+transmitting early, so both nodes can perform some high speed transaction 
+or go back to sleep.  Useless preamble bits are minimized while useful 
+packet information is maximized.  Incidentally, this is a good strategy 
+for CC2420 low power listening.  This strategy certainly improves energy
+efficiency and throughput, but further improvements may be possible by 
+employing a synchronous delivery method on top of this type of 
+asynchronous low power listening scheme.
+
+Improvements can also be made to the original low power listening 
+interfaces.  For example, instead of pre-programming power modes and 
+duty cycles, a low power listening interface should allow the developer 
+the flexibility to deploy a network of nodes with whatever duty cycle 
+percentage or sleep time desired for each individual node.  Nodes with 
+different receive check periods should still have the ability to 
+reliably communicate with each other with little difficulty.
+
+3. Interfaces
+====================================================================
+
+3.1 Low Power Listening Interface
+====================================================================
+
+The LowPowerListening interface MUST be provided for each radio by the 
+platform independent ActiveMessageC configuration.  
+
+In some implementations, low power listening may have an option to 
+compile into the radio stack for memory footprint reasons.  If low 
+power listening is not compiled in with the stack, calls to 
+LowPowerListening MUST be handled by a dummy implementation. 
+
+The TEP proposes this LowPowerListening interface:::
+  
+  interface LowPowerListening {
+    command void setLocalSleepInterval(uint16_t sleepIntervalMs);
+    command uint16_t getLocalSleepInterval();
+    command void setLocalDutyCycle(uint16_t dutyCycle);
+    command uint16_t getLocalDutyCycle();
+    command void setRxSleepInterval(message_t *msg, uint16_t sleepIntervalMs);
+    command uint16_t getRxSleepInterval(message_t *msg);
+    command void setRxDutyCycle(message_t *msg, uint16_t dutyCycle);
+    command uint16_t getRxDutyCycle(message_t *msg);               
+    command uint16_t dutyCycleToSleepInterval(uint16_t dutyCycle);
+    command uint16_t sleepIntervalToDutyCycle(uint16_t sleepInterval);
+  }
+
+setLocalSleepInterval(uint16_t sleepIntervalMs)
+  - Sets the local node?s radio sleep interval, in milliseconds.
+
+getLocalSleepInterval()
+  - Retrieves the local node?s sleep interval, in milliseconds.  If duty cycle percentage was originally set, it is automatically converted to a sleep interval.
+
+setLocalDutyCycle(uint16_t dutyCycle)
+  - Set the local node?s duty cycle percentage, in units of [percentage*100].
+
+getLocalDutyCycle()
+  - Retrieves the local node?s duty cycle percentage.  If sleep interval in milliseconds was originally set, it is automatically converted to a duty cycle percentage.
+
+setRxSleepInterval(message_t \*msg, uint16_t sleepIntervalMs)
+  - The given message will soon be sent to a low power receiver. The sleepIntervalMs is the sleep interval of that low power receiver, in milliseconds.  When sent, the radio stack will automatically transmit the message so as to be detected by the low power receiver.
+
+getRxSleepInterval(message_t \*msg)
+  - Retrieves the message destination?s sleep interval.  If a duty cycle was originally set for the outgoing message, it is automatically converted to a sleep interval.
+
+setRxDutyCycle(message_t \*msg, uint16_t dutyCycle)
+  - The given message will soon be sent to a low power receiver.  The dutyCycle is the duty cycle percentage, in units of [percentage*100], of that low power receiver.  When sent, the radio stack will automatically transmit the message so as to be detected by the low power receiver.
+
+getRxDutyCycle(message_t \*msg)
+  - Retrieves the message destination?s duty cycle percentage.  If a sleep interval was originally set for the outgoing message, it is automatically converted to a duty cycle percentage.
+
+dutyCycleToSleepInterval(uint16_t dutyCycle)
+  - Converts the given duty cycle percentage to a sleep interval in milliseconds.
+
+sleepIntervalToDutyCycle(uint16_t sleepInterval)
+  - Converts the given sleep interval in milliseconds to a duty cycle percentage.
+  
+3.2 Split Control Behaviour
+--------------------------------------------------------------------
+
+Low power listening MUST be enabled and disabled through the radio?s 
+standard SplitControl interface, returning exactly one SplitControl 
+event upon completion.  While the radio is duty cycling, it MUST NOT 
+alert the application layer each time the radio turns on and off to 
+perform a receive check or send a message.
+
+3.3 Send Interface Behaviour
+--------------------------------------------------------------------
+
+Attempts to send a message before SplitControl.start() has been called 
+SHOULD return EOFF, signifying the radio has not been enabled.  When
+SplitControl.start() has been called by the application layer, calls 
+to Send MUST turn the radio on automatically if the radio is currently 
+off due to duty cycling.  If a message is already in the process of 
+being sent, multiple calls to Send should return FAIL. 
+
+The Send.sendDone(?) event SHOULD signal SUCCESS upon the successful 
+completion of the message delivery process, regardless if any mote 
+actually received the message.
+
+3.4 Receive Interface Behaviour
+--------------------------------------------------------------------
+
+Upon the successful reception of a message, the low power receive event 
+handler SHOULD drop duplicate messages sent to the broadcast address.  
+For example, the CC2420 implementation can perform this by checking 
+the message_t?s dsn value, where each dsn value is identical for every 
+message used in the delivery. 
+
+After the first successful message reception, the receiver?s radio 
+SHOULD stay on for a brief period of time to allow any further 
+transactions to occur at high speed.  If no subsequent messages are 
+detected going inbound or outbound after some short delay, the radio 
+MUST continue duty cycling as configured.
+
+4. Low Power Listening message_t Metadata
+====================================================================
+
+To store the extra 16-bit receiver low power listening value, the radio 
+stack?s message_t footer MUST contain a parameter to store the message 
+destination?s receive check sleep interval in milliseconds or duty cycle
+percentage.  For example, the low power listening CC2420 message_t footer 
+stores the message's receive check interval in milliseconds, as shown 
+below [TEP111]_.::
+
+  typedef nx_struct cc2420_metadata_t {
+    nx_uint8_t tx_power;
+    nx_uint8_t rssi;
+    nx_uint8_t lqi;
+    nx_bool crc;
+    nx_bool ack;
+    nx_uint16_t time;
+    nx_uint16_t rxInterval;
+  } cc2420_metadata_t;
+
+5. Recommendations for HAL Implementation
+====================================================================
+In the interest of minimizing energy while maximizing throughput, it 
+is RECOMMENDED that any asynchronous low power listening implementation 
+use clear channel assessment methods to determine the presence of a 
+nearby transmitter.  It is also RECOMMENDED that the transmitter send 
+duplicate messages continuously with minimum or no backoff period instead 
+of one long message.  Removing backoffs on a continuous send delivery 
+scheme will allow the channel to be modulated sufficiently for a receiver 
+to quickly detect; furthermore, enabling acknowledgements on each 
+outgoing duplicate packet will allow the transmit period to be cut short 
+based on when the receiver actually receives the message.
+
+Asynchronous low power listening requires some memory overhead, so 
+sometimes it is better to leave the added architecture out when it is 
+not required.  When it is feasible to do so, it is RECOMMENDED that 
+the preprocessor variable LOW_POWER_LISTENING be defined when low 
+power listening functionality is to be compiled in with the radio stack, 
+and not defined when low power listening functionality shouldn?t exist.
+
+It is RECOMMENDED that the radio on-time for actual receive checks be a 
+measured value to help approximate the duty cycle percentage.
+
+6. Author's Address
+====================================================================
+
+| David Moss
+| Rincon Research Corporation
+| 101 N. Wilmot, Suite 101
+| Tucson, AZ  85750
+|
+| phone - +1 520 519 3138
+| email ? dmm@rincon.com
+|
+| Jonathan Hui
+| 657 Mission St. Ste. 600
+| Arched Rock Corporation
+| San Francisco, CA 94105-4120
+|
+| phone - +1 415 692 0828
+| email - jhui@archedrock.com
+|
+| Kevin Klues
+| 503 Bryan Hall
+| Washington University
+| St. Louis, MO 63130
+|
+| phone - +1-314-935-6355
+| email - klueska@cs.wustl.edu
+
+
+7. Citations
+====================================================================
+.. [MICA2] "MICA2 Radio Stack for TinyOS."  http://www.tinyos.net/tinyos-1.x/doc/mica2radio/CC1000.html
+.. [TEP111] TEP 111: message_t. 
+.. [CC1000] TI/Chipcon CC1000 Datasheet.  http://www.chipcon.com/files/CC1000_Data_Sheet_2_2.pdf
+.. [CC2420] TI/Chipcon CC2420 Datasheet.  http://www.chipcon.com/files/CC2420_Data_Sheet_1_3.pdf
\ No newline at end of file
diff --git a/doc/txt/tep106.txt b/doc/txt/tep106.txt
new file mode 100644
index 00000000..28bf8d43
--- /dev/null
+++ b/doc/txt/tep106.txt
@@ -0,0 +1,536 @@
+============================
+Schedulers and Tasks
+============================
+
+:TEP: 106
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: Philip Levis and Cory Sharp
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents the structure and implementation of tasks
+and task schedulers in TinyOS 2.x.
+
+
+1. Introduction
+====================================================================
+
+TinyOS has two basic computational abstractions: asynchronous events
+and tasks. Early versions of TinyOS provided a single type of task --
+parameter free -- and only a FIFO scheduling policy. While changing
+the latter was possible, the incorporation of tasks into the nesC
+language made it very difficult. Presenting task schedulers as a
+TinyOS component enables much easier customization, and allowing tasks
+to be presented as an interface enables extending the classes of tasks
+available. TinyOS 2.0 takes both approaches, and this memo documents
+the structure of how it does so as well as a simple mechanism that
+greatly increases system dependability.
+
+2. Tasks and the Scheduler in TinyOS 1.x
+====================================================================
+
+Tasks in TinyOS are a form of deferred procedure call (DPC) [1]_, which
+enable a program to defer a computation or operation until a later
+time. TinyOS tasks run to completion and do not pre-empt one
+another.  These two constraints mean that code called from tasks
+runs synchonously with respect to other tasks. Put another way, tasks
+are atomic with respect to other tasks [2]_.
+
+In TinyOS 1.x, the nesC language supports tasks through two
+mechanisms, ``task`` declarations and ``post`` expressions::
+
+  task void computeTask() {
+    // Code here  
+  }  
+
+and::
+
+  result_t rval = post computeTask();
+
+
+TinyOS 1.x provides a single kind of task, a parameter-free function,
+and a single scheduling policy, FIFO. ``post`` expressions can return
+FAIL, to denote that TinyOS was unable to post the task.  Tasks can be
+posted multiple times. For example, if a task is posted twice in quick
+succession and the first succeeds while the second fails, then the
+task will be run once in the future; for this reason, even if a ``post``
+fails, the task may run.
+
+The TinyOS 1.x scheduler is implemented as a set of C functions in the
+file ``sched.c``. Modifying the scheduler requires replacing or
+changing this file. Additionally, as tasks are supported solely through
+nesC ``task`` declarations and ``post`` expressions, which assume
+a parameter-free function, modifying the syntax or capabilities of
+tasks is not possible.
+
+The task queue in TinyOS 1.x is implemented as a fixed size circular
+buffer of function pointers. Posting a task puts the task's function
+pointer in the next free element of the buffer; if there are no free
+elements, the ``post`` returns fail. This model has several issues:
+
+  1) Some components do not have a reasonable response to a failed   post  
+  2) As a given task can be posted multiple times, it can consume more than one element in the buffer
+  3) All tasks from all components share a single resource: one misbehaving component can cause other's posts to fail
+
+Fundamentally, in order for a component A to repost a task after post
+failure, another component B must call a function on it (either a
+command or event). E.g., component A must schedule a timer, or expect
+a retry from its client. However, as many of these systems might
+depend on tasks as well (e.g., timers), it is possible that an
+overflowing task queue can cause the entire system to fail.
+
+The combination of the above three issues mean that one misbehaving
+component can cause TinyOS to hang. Consider, for example, this
+scenario (a real and encountered problem on the Telos platform):
+
+  * A packet-based hardware radio, which issues an interrupt only when it finishes sending a packet
+  * A networking component that handles the interrupt to post a task to signal ``SendMsg.sendDone``.
+  * A sensing component that posts a task when it handles an ``ADC.dataReady`` event
+  * An application component that sends a packet and then sets its ADC sampling rate too high
+
+In this scenario, the sensing component will start handling events at
+a faster rate than it can process them. It will start posting tasks to
+handle the data it receives, until it fills the task queue. At some
+point later, the radio finishes sending a packet and signals its
+interrupt. The networking component, however, is unable to post its
+task that signals ``SendMsg.sendDone()``, losing the event. The
+application component does not try to send another packet until it
+knows the one it is sending completes (so it can re-use the
+buffer). As the ``sendDone()`` event was lost, this does not occur,
+and the application stops sending network traffic.
+
+The solution to this particular problem in TinyOS 1.x is to signal 
+sendDone() in the radio send complete interrupt if the post fails: 
+this violates the sync/async boundary, but the justification is that 
+a *possible* rare race condition is better than *certain* failure. 
+Another solution would be to use an interrupt source to periodically
+retry posting the task; while this does not break the sync/async
+boundary, until the post succeeds the system cannot send packets.  
+The TinyOS 1.x model prevents it from doing any better.
+
+3. Tasks in TinyOS 2.x
+====================================================================
+
+The semantics of tasks in TinyOS 2.x are different than those in 1.x.
+This change is based on experiences with the limitations and run time
+errors that the 1.x model introduces. **In TinyOS 2.x, a basic post will
+only fail if and only if the task has already been posted and has not 
+started execution.** A task can always run, but can only have one 
+outstanding post at any time. 
+
+2.x achieves these semantics by allocating one
+byte of state per task (the assumption is that there will be fewer than 255
+tasks in the system). While a very large number of tasks could make 
+this overhead noticable, it is not significant in practice.
+If a component needs to post a task several times, then the end of 
+the task logic can repost itself as need be.
+
+For example, one can do this::
+
+  post processTask();
+  ...
+  task void processTask() {
+    // do work
+    if (moreToProcess) {
+      post processTask();
+    } 
+  }
+
+
+These semantics prevent several problems, such as the inability to
+signal completion of split-phase events because the task queue is
+full, task queue overflow at initialization, and unfair task
+allocation by components that post a task many times.
+
+TinyOS 2.x takes the position that the basic use case of tasks should
+remain simple and easy to use, but that it should be possible to
+introduce new kinds of tasks beyond the basic use case. TinyOS
+achieves this by keeping ``post`` and ``task`` for the basic case,
+and introducing task interfaces for additional ones. 
+
+Task interfaces allow users to extend the syntax and semantics of
+tasks. Generally, a task interface has an ``async`` command,   post  ,
+and an event, ``run``. The exact signature of these functions are
+up to the interface. For example, a task interface that allows a task
+to take an integer parameter could look like this::
+
+  interface TaskParameter {  
+    async error_t command postTask(uint16_t param);  
+    event void runTask(uint16_t param);  
+  }  
+
+Using this task interface, a component could post a task with a
+``uint16_t`` parameter. When the scheduler runs the task, it will
+signal the ``runTask`` event with the passed parameter, which contains
+the task's logic. Note, however, that this does not save any RAM: 
+the scheduler must have RAM allocated for the parameter.  Furthermore, as
+there can only be one copy of a task outstanding at any time, it
+is just as simple to store the variable in the component. E.g.,
+rather than::
+
+  call TaskParameter.postTask(34);
+  ...
+  event void TaskParameter.runTask(uint16_t param) {
+    ...
+  }
+
+one can::
+
+  uint16_t param;
+  ...
+    param = 34;
+    post parameterTask();
+  ...
+  task void parameterTask() {
+    // use param 
+  }
+
+The principal difference between the simplest code for these
+two models is that if the component posts the task twice, it
+will use the older parameter in the TaskParameter example,
+while it will use the newer parameter in the basic task example.
+If a component wants to use the oldest parameter, then it can do
+this::
+
+  if (post myTask() == SUCCESS) {
+    param = 34;
+  }
+
+4. The Scheduler in TinyOS 2.x
+====================================================================
+
+In TinyOS 2.x, the scheduler is a TinyOS component. Every scheduler
+MUST support nesC tasks. It MAY also support any number of
+additional task interfaces. The scheduler component is resonsible for
+the policy of reconciling different task types (e.g., earliest
+deadline first tasks vs. priority tasks).
+
+The basic task in TinyOS 2.x is parameterless and FIFO. Tasks continue
+to follow the nesC semantics of task and post, which are linguistic
+shortcuts for declaring an  interface and wiring it to the
+scheduler component. Appendix A describes how these shortcuts can be
+configured. A scheduler provides a task interface as a parameterized
+interface. Every task that wires to the interface uses the unique()
+function to obtain a unique identifier, which the scheduler uses to
+dispatch tasks.
+
+For example, the standard TinyOS scheduler has this signature::
+
+  module SchedulerBasicP {  
+    provides interface Scheduler;  
+    provides interface TaskBasic[uint8_t taskID];  
+    uses interface McuSleep;  
+  }  
+
+A scheduler MUST provide a parameterized TaskBasic interface.
+If a call to TaskBasic.postTask() returns SUCCESS, the scheduler MUST run it
+eventually, so that starvation is not a concern. The scheduler MUST 
+return SUCCESS to a TaskBasic.postTask()
+operation unless it is not the first call to TaskBasic.postTask() since
+that task's TaskBasic.runTask() event has been signaled. The 
+McuSleep interface is used for microcontroller power management;
+its workings are explained in TEP 112 [3]_.
+
+A scheduler MUST provide the Scheduler interface. 
+The Scheduler interface has commands for initialization and running
+tasks, and is used by TinyOS to execute tasks::
+
+  interface Scheduler {  
+    command void init();  
+    command bool runNextTask(bool sleep);  
+    command void taskLoop();  
+  }  
+
+The init() command initializes the task queue and scheduler data
+structures. runNextTask() MUST run to completion whatever task the
+scheduler's policy decides is the next one: the return value indicates
+whether it ran a task. The bool parameter sleep indicates what the
+scheduler should do if there are no tasks to execute. If sleep is
+FALSE, then the command will return immediately with FALSE as a return
+value. If sleep is TRUE, then the command MUST NOT return until a task
+is executed, and SHOULD put the CPU to sleep until a new task arrives.
+Calls of runNextTask(FALSE) may return TRUE or FALSE; calls of
+runNextTask(TRUE) always return TRUE.   The taskLoop() command tells
+the scheduler to enter an infinite task-running loop, putting the MCU
+into a low power state when the processor is idle: it never returns.
+
+The scheduler is repsonsible for putting the processor to sleep
+predominantly for efficiency reasons. Including the sleep call
+within the scheduler improves the efficiency of the task loop,
+in terms of the assembly generated by the TinyOS toolchain. 
+
+This is the TaskBasic interface::
+
+  interface TaskBasic {  
+    async command error_t postTask();  
+    void event runTask();  
+  }  
+
+When a component declares a task with the ``task`` keyword in nesC, it
+is implicitly declaring that it uses an instance of the TaskBasic
+interface: the task body is the runTask event. When a component uses the
+``post`` keyword, it calls the postTask command. Each TaskBasic MUST be
+wired to the scheduler with a unique identifier as its parameter. 
+The parameter MUST be obtained with the ``unique`` function in nesC, 
+with a key of ``"TinySchedulerC.TaskBasic"``. The nesC compiler
+automatically does this wiring when the ``task`` and ``post``
+keywords are used.
+
+The SchedulerBasicP implementation uses these identifiers as its queue
+entries. When TinyOS tells the scheduler to run a task, it pulls the
+next identifier off the queue and uses it to dispatch on the
+parameterized TaskBasic interface.
+
+While the default TinyOS scheduler uses a FIFO policy, TinyOS
+components MUST NOT assume a FIFO policy. If two tasks must run
+in a particular temporal order, this order should be enforced by
+the earlier task posting the later task.
+
+5. Replacing the Scheduler
+====================================================================
+
+The TinyOS scheduler is presented as a component named TinySchedulerC.
+The default TinyOS scheduler implementation is a module named
+SchedulerBasicP; the default scheduler component is a configuration
+that provides wire-through of SchedulerBasicP.
+
+To replace the scheduler for a particular application, a developer
+SHOULD put a configuration named TinySchedulerC in the application
+directory: this will replace the default. The scheduler component
+provides a wire-through of the desired scheduler implementation. All
+scheduler implementations MUST provide a parameterize TaskBasic
+interface, as SchedulerBasicP does; this supports nesC post statements
+and task declarations and enables TinyOS core systems to operate
+properly. Generally, TinyOS core code needs to be able to run unchanged
+with new scheduler implementations.  All scheduler 
+implementations MUST provide the Scheduler interface.
+
+For example, imagine a hypothetical scheduler that provides earliest
+deadline first tasks, which are provided through the TaskEdf
+interface::
+
+  interface TaskEdf {  
+    async command error_t postTask(uint16_t deadlineMs);  
+    event void runTask();  
+  }  
+
+The scheduler implementation is named SchedulerEdfP, and provides both
+TaskBasic and TaskEdf interfaces::
+
+  module SchedulerEdfP {  
+    provides interface Scheduler;  
+    provides interface TaskBasic[uint8_t taskID];  
+    provides interface TaskEdf[uint8_t taskID];  
+  }  
+
+An application that wants to use SchedulerEdfP instead of
+SchedulerBasicP includes a configuration named TinySchedulerC, which
+exports all of SchedulerEdfP's interfaces::
+
+  configuration TinySchedulerC {  
+    provides interface Scheduler;  
+    provides interface TaskBasic[uint8_t taskID];  
+    provides interface TaskEdf[uint8_t taskID];  
+  }  
+  implementation {  
+    components SchedulerEdfP;  
+    Scheduler = SchedulerEdf;  
+    TaskBasic = SchedulerEdfP;  
+    TaskEDF   = SchedulerEdfP;  
+  }  
+
+For a module to have an earliest deadline first task, it uses the
+TaskEdf interface. Its configuration SHOULD wire it to TinySchedulerC.
+The key used for task unique identifiers MUST be "TinySchedulerC.TaskInterface",
+where *TaskInterface* is the name of the new task interface as presented
+by the scheduler.  A common way to make sure a consistent string is used
+is to #define it. For example, TaskEdf.nc might include::
+
+#define UQ_TASK_EDF "TinySchedulerC.TaskEdf"
+
+In this example, the module SomethingP requires two EDF
+tasks::
+  
+  configuration SomethingC {  
+    ...  
+  }  
+  implementation {  
+    components SomethingP, TinySchedulerC;  
+    SomethingP.SendTask -> TinySchedulerC.TaskEdf[unique(UQ_TASK_EDF)];  
+    SomethingP.SenseTask -> TinySchedulerC.TaskEdf[unique(UQ_TASK_EDF)];  
+  }  
+
+The module SomethingP also has a basic task. The nesC compiler
+automatically transforms task keywords into BasicTask interfaces and
+wires them appropriately. Therefore, for basic tasks, a component
+author can either use the ``task`` and ``post`` keywords or use a TaskBasic
+interface. A component SHOULD use the keywords whenever possible, and it
+MUST NOT mix the two syntaxes for a given task.  This is an example
+implementation of SomethingP that uses keywords for basic tasks::
+
+  module SomethingP {  
+    uses interface TaskEdf as SendTask  
+    uses interface TaskEdf as SenseTask  
+  }  
+  implementation {  
+    // The TaskBasic, written with keywords  
+    task void cleanupTask() { ... some logic ... }  
+    event void SendTask.runTask() { ... some logic ... }  
+    event void SenseTask.runTask() { ... some logic ... }  
+
+    void internal_function() {  
+      call SenseTask.postTask(20);  
+      call SendTask.postTask(100);  
+      post cleanupTask();  
+    }  
+  }  
+
+The requirement that basic tasks not be subject to starvation
+requires that a scheduler supporting EDF tasks must ensure that
+basic tasks run eventually even if there is an unending stream of
+short deadline tasks to run. Quantifying "eventually" is difficult,
+but a 1% share of the MCU cycles (or invocations) is a reasonable 
+approximation. 
+
+If the scheduler provides two instances of the same task interface,
+their unique keys are based on the name of the interface as the 
+scheduler presents it (the "as" keyword). For example, imagine
+a scheduler which provides two instances of TaskBasic: standard
+tasks and high-priority tasks. The scheduler usually selects a task
+for the high priority queue before the standard queue::
+
+  configuration TinySchedulerC {  
+    provides interface Scheduler;  
+    provides interface TaskBasic[uint8_t taskID];  
+    provides interface TaskBasic[uint8_t taskID] as TaskHighPriority;  
+  }  
+
+It cannot always select a high priority task because that could
+starve basic tasks.  A component that uses a high priority task would 
+wire to TaskHighPriority with the key "TinySchedulerC.TaskHighPriority"::
+
+  configuration SomethingElseC {}  
+  implementation {  
+    components TinySchedulerC as Sched, SomethingElseP;  
+    SomethingElseP.RetransmitTask -> Sched.TaskHighPriority[unique("TinySchedulerC.TaskHighPriority")];  
+  }  
+
+6. Implementation
+====================================================================
+
+The following files in ``tinyos-2.x/tos/system`` contain the reference
+implementations of the scheduler:
+ 
+  * ``SchedulerBasicP.nc`` is the basic TinyOS scheduler, providing
+    a parameterized TaskBasic interface. 
+  * ``TinySchedulerC.nc`` is the default scheduler configuration
+    that wires SchedulerBasicP to McuSleepC [3]_.
+
+
+A prototype of a scheduler that supports EDF tasks can be obtained
+at the URL ``http://csl.stanford.edu/~pal/tinyos/edf-sched.tgz.``
+
+7. Author's Address
+====================================================================
+
+| Philip Levis
+| 358 Gates Hall
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046 
+| email - pal@cs.stanford.edu
+|
+| Cory Sharp
+| 410 Soda Hall
+| UC Berkeley
+| Berkeley, CA 94720
+|
+| email - cssharp@eecs.berkeley.edu
+
+8. Citations
+====================================================================
+
+.. [1] Erik Cota-Robles and James P. Held.  "A Comparison of Windows 
+   Driver Model Latency Performance on Windows NT and Windows 98." In
+   *Proceedings of the Third Symposium on Operating System Design
+   and Implementation (OSDI).*
+
+.. [2] David Gay, Philip Levis, Rob von Behren, Matt Welsh, Eric Brewer
+   and David Culler. "The *nesC* Language: A Holistic Approach to Networked
+   Embedded Systems." In *Proceedings of the ACM SIGPLAN 2003 Conference on
+   Programming Language Design and Implementation (PLDI).* 
+
+.. [3] TEP 112: Microcontroller Power Management.
+
+ 
+Appendix A: Changing the Scheduler
+====================================================================
+
+The nesC compiler transforms the   post   and   task   keywords into
+nesC interfaces, wirings, and calls. By default, the statement::
+
+  module a {
+    ...
+  }
+  implementation {
+    task x() {
+      ...
+      post x();
+    } 
+  
+  }
+
+
+is effectively::
+
+  module a {
+    ...
+    provides interface TaskBasic as x;
+  }
+  implementation {
+    event void x.runTask() {
+      ...
+      call x.postTask();
+    }
+  }
+
+Specifically, TinyOS maps a task with name *T* to a TaskBasic
+interface with name *T*. Posting *T* is a call to T.postTask(), and
+the task body is T.runTask(). Finally, *T* is automatically wired to
+TinySchedulerC with a unique() call.
+
+While the fact that tasks are transformed into interfaces is built in
+to the nesC compiler, the exact names can be configured. Each
+platform's   .platform   file passes the   -fnesc-scheduler   option
+to the compiler. The standard option is::
+
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+There are 6 strings passed. They are:
+
+  1) The name of the scheduler component to wire the interface
+     to (TinySchedulerC).
+  2) The unique string used when wiring to the scheduler component's
+     parameterized interface (TinySchedulerC.TaskBasic).
+  3) The name of the interface on the scheduler component (TaskBasic).
+  4) The name of the interface type (TaskBasic).
+  5) The name of the event for running the task (runTask).
+  6) The name of the command for posting the task (postTask).
+
+
+The nescc man page has further details.
+
+
+
diff --git a/doc/txt/tep107.txt b/doc/txt/tep107.txt
new file mode 100644
index 00000000..18465422
--- /dev/null
+++ b/doc/txt/tep107.txt
@@ -0,0 +1,398 @@
+============================
+TinyOS 2.x Boot Sequence
+============================
+
+:TEP: 107
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: Philip Levis 
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents the structure and implementation of the mote
+boot sequence in TinyOS 2.x.
+
+
+1. Introduction
+====================================================================
+
+TinyOS has a set of calling conventions and semantics in its boot
+sequence. Earlier versions of TinyOS used an interface named
+"StdControl" to take care of system initialization and starting
+required software systems. Experience with several hardware platforms
+showed StdControl to be insufficient, as it provided only a
+synchronous interface. Additionally, StdControl bundled the notion of
+initialization, which happens only at boot, with power management and
+service control. TinyOS 2.x solves these problems by separating what
+was once StdControl into three separate interfaces: one for
+initialization, one for starting and stopping components, and one for
+notification that the mote has booted. This memo describes the TinyOS
+boot sequence and reasons for its semantics.
+
+2. TinyOS 1.x Boot Sequence
+====================================================================
+
+The TinyOS 1.x boot sequence is uniform across most mote platforms
+(TOSSIM has a very different boot sequence, as it is a PC
+program). The module RealMain implements main(), and has the following
+signature::
+
+  module RealMain {
+    uses {
+      command result_t hardwareInit();
+      interface StdControl;
+      interface Pot;
+    }
+  }
+
+
+The mote main() function uses a mix of nesC and C::
+
+  int main() __attribute__ ((C, spontaneous)) {
+    call hardwareInit();
+    call Pot.init(10);
+    TOSH_sched_init();
+         
+    call StdControl.init();
+    call StdControl.start();
+    __nesc_enable_interrupt();
+     
+    while(1) {
+      TOSH_run_task();
+    }
+  }
+
+
+Several problems exist. Some of these calls are artifacts of old
+platforms: the Pot component refers to the mica variable potentiometer
+for controlling radio transmission power, and for other platforms is a
+stub component Some of the calls -- TOSH_sched_init and TOSH_run_task
+-- are C functions that are implemented in other, automatically
+included files. Separation from the nesC component model makes
+changing what lies behind these functions more difficult than normal
+in TinyOS.
+
+More importantly, the initialization sequence has several
+limitations. The component HPLInit implements the hardwareInit command
+(wired by the component Main): hardware initialization may not be part
+of a pure HPL layer. The scheduler is initialized after hardware,
+which means that no hardware initialization can post a task if it
+needs one. The StdControl interface combines component initialization
+(init()) and activation (start()/stop()); if a component needs to be
+initialized by RealMain, it must also be started. Separating these two
+leads to more flexible power management, and distinguishes required
+low-level components that must always be running (such as a Timer)
+from high level components that can be power managed (such as an
+application). Finally, some components that need to often need to be
+started by main, such as a radio, do not follow a synchronous
+start/stop model. In this case, some components can't operate properly
+until the radio starts, but main has no mechanism for waiting for the
+radio start completion event.
+
+
+3. TinyOS 2.x Boot Interfaces
+====================================================================
+
+The TinyOS 2.x boot sequence uses three interfaces:
+
+  * Init, for initializing component/hardware state
+  * Scheduler, for initializing and running tasks
+  * Boot, for signalling that the system has successfully booted
+
+The Init interface has a single command, init()::
+
+  interface Init {
+    command error_t init();
+  }
+
+Init provides a synchronous interface, enabling initialization
+ordering. Unlike normal execution, in which operations from a wide
+range of components need to be interleaved effectively, initialization
+is a sequential, synchronous operation: no component can be started
+until initialization is complete. If a particular component's
+initialization requires waiting for interrupts or other asynchronous
+events, then it must explicitly wait for them (e.g., 
+with a spin loop), MUST NOT return until complete. Otherwise the system
+may start before initialization is complete.
+
+The Scheduler interface is for initializing and controlling task
+execution. It is detailed in TEP 106 [1]_.
+
+The Boot interface has a single event, booted(), which the boot
+sequence signals when it has completed::
+
+  interface Boot {
+    event void booted();
+  }
+
+
+4. TinyOS 2.x Boot Sequence
+====================================================================
+
+The module RealMainP implements the standard TinyOS 2.x boot sequence.
+The configuration MainC wires some of RealMainP's interfaces to
+components that implement standard abstractions and exports the others
+that are application specific. Code above the Hardware Independent
+Layer (TEP 2) SHOULD wire to MainC and not RealMainP::
+
+ 
+  module RealMainP {
+    provides interface Booted;
+    uses {
+      interface Scheduler;
+      interface Init as PlatformInit;
+      interface Init as SoftwareInit;
+    }
+  }
+  implementation {
+    int main() __attribute__ ((C, spontaneous)) {
+      atomic {
+        platform_bootstrap();
+        call Scheduler.init();
+        call PlatformInit.init();
+        while (call Scheduler.runNextTask());
+        call SoftwareInit.init();
+        while (call Scheduler.runNextTask());
+      }
+      __nesc_enable_interrupt();
+      signal Boot.booted();
+      call Scheduler.taskLoop();
+      return -1;
+    }
+    default command error_t PlatformInit.init() { return SUCCESS; }
+    default command error_t SoftwareInit.init() { return SUCCESS; }
+    default event void Boot.booted() { }
+  }
+
+4.1 Initialization
+--------------------------------------------------------------------
+
+The first step in the boot sequence is initializing the system::
+
+  atomic {
+    platform_bootstrap();
+    call Scheduler.init();
+    call PlatformInit.init();
+    while (call Scheduler.runNextTask());
+    call SoftwareInit.init();
+    while (call Scheduler.runNextTask());
+  }
+
+The first call, platform_bootstrap(), is a minimalist function that
+places the system into an executable state. This function MUST NOT include
+operations besides those which are absolutely necessary for further code,
+such as scheduler initialization, to execute.
+Examples of platform_bootstrap() operations are configuring the memory
+system and setting the processor mode. Generally, platform_bootstrap() 
+is an empty function. TinyOS's top-level include file, ``tos.h``, includes
+a default implementation of this function which does nothing. If a platform
+needs to replace the default, it SHOULD put it in a platform's
+``platform.h`` file as a #define. The implementation of ``tos.h`` 
+supports this::
+
+  /* This platform_bootstrap macro exists in accordance with TEP
+     107. A platform may override this through a platform.h file. */
+  #include <platform.h>
+  #ifndef platform_bootstrap
+  #define platform_bootstrap() {}
+  #endif
+
+The boot sequence has three separate initializations: Scheduler,
+PlatformInit, and SoftwareInit. The boot configuration (MainC) wires
+the first two automatically, to TinySchedulerC (discussed in TEP 106)
+and to PlatformC::
+
+  configuration MainC {
+    provides interface Boot;
+    uses interface Init as SoftwareInit;
+  }
+  implementation {
+    components PlatformC, RealMainP, TinySchedulerC;  
+  
+    RealMainP.Scheduler -> TinySchedulerC;
+    RealMainP.PlatformInit -> PlatformC;
+  
+    // Export the SoftwareInit and Booted for applications
+    SoftwareInit = RealMainP.SoftwareInit;
+    Boot = RealMainP;
+  }
+
+
+MainC exports the Boot and SoftwareInit interfaces for applications to
+wire to. TinySchedulerC is the standard name for the TinyOS
+scheduler. As the initialization sequence requires being able to run
+tasks, the boot sequence initializes it first. The second step of
+initialization is to call PlatformInit.init(), which MainC wires to a
+component named PlatformC. PlatformInit is for initializations which
+must follow a very specific order due to hidden dependencies, e.g., as
+part of making the overall hardware platform operable. One example of
+this sort of initialization is clock calibration. Because PlatformInit
+calls the component PlatformC, each platform can specify the required
+initialization order. As these hidden dependencies must be due to
+hardware, the sequence is platform-specific. A port of TinyOS to a
+new plaform MUST include a component PlatformC which provides
+one and only one instance of the Init interface.
+
+Initializations invoked
+through PlatformC meet some or all of the following criteria:
+
+1. The initialization requires configuring hardware resources. This implies that the code is platform-specific. 
+
+2. The initialization should always be performed.
+
+3. The initialization is a prerequisite for common services in the system.
+
+Three example operations that often belong in PlatformInit are I/O pin
+configuration, clock calibration, and LED configuration. I/O pin 
+configuration meets the first two criteria. It should always be performed
+(regardless of what components the OS uses) for low-power reasons:
+incorrectly configured pins can draw current and prevent the MCU from
+entering its lowest power sleep state [2]_. Clock calibration meets
+all three criteria. LED configuration is a special case: while it
+nominally meets all three criteria, the most important one is the third:
+as LEDs are often needed during SoftwareInit initialization, they must
+be set up before it is invoked.
+
+Note that not all code which meets some of these criteria is wired through 
+PlatformC. In particular, criterion 1 is typically necessary but not 
+sufficient to require PlatformC. For example, a timer system that
+configures overflow and capture settings or  a UART stack that sets the
+baud rate and transmission options can often be wired to SoftwareInit.
+They are encapsulated abstractions which will not be invoked or
+started until the boot event, and only need to be configured if the 
+system includes their functionality.
+
+Components whose initialization does not directly depend on hardware
+resources SHOULD wire to MainC.SoftwareInit. If a component requires a
+specific initialization ordering, then it is responsible for
+establishing that ordering. Due to the semantics of Init, this is
+usually quite rare; a component SHOULD NOT introduce initialization
+dependencies unless they are required.
+
+One common approach is for a configuration to "auto-wire" the
+initialization routines of its internal components. The configuration
+does not provide an Init interface. Virtualized services
+often take this approach, as the service, rather than the clients, is
+what needs to be initialized. For example, the standard Timer
+virtualization [3]_, TimerMilliC, wires to TimerMilliP, which is
+a very simple configuration that takes the underlying implementation
+(HilTimerMilliC) and wires it to MainC::
+
+  configuration TimerMilliP {
+    provides interface Timer<TMilli> as Timinitialization in ordererMilli[uint8_t id];
+  }
+  implementation {
+    components HilTimerMilliC, MainC;
+    MainC.SoftwareInit -> HilTimerMilliC;
+    TimerMilli = HilTimerMilliC; 
+  }
+
+Rather than require an application to wire HilTimerMilliC to MainC,
+TimerMilliP does it automatically. When a component instantiates a
+TimerMilliC, that names TimerMilliP, which will automatically make
+sure that the timer system is initialized when TinyOS boots.
+
+
+4.2 Interrupts in Initialization
+--------------------------------------------------------------------
+
+Interrupts are not enabled until all calls to Init.init have returned.
+If a component's initialization needs to handle interrupts, it can
+do one of three things:
+
+  1) If a status flag for the interrupt exists, the Init.init()
+     implementations SHOULD use a spin loop to test for when
+     an interrupt has been issued.
+  2) If no such flag exists, the Init.init() implementation MAY
+     temporarily enable interrupts, if doing so will not cause any other
+     components to handle an interrupt. That is, if a component enables
+     an interrupt, it MUST NOT enable interrupts whose handlers would
+     invoke any other component. Furthermore, when Init.init() exits,
+     the interrupts must be disabled.
+  3) If no such flag exists and there is no way to isolate which
+     interrupt handlers are called, then the component MUST rely
+     on mechanisms outside the Init sequence, such as SplitControl.
+
+The boot sequence assumes that 1) is by far the dominant case. There
+are, however, possible situations where a component might need to
+handle an interrupt because of, e.g., hardware limitations (no pending
+flag) or to catch a brief edge transition. In these cases, a component
+can handle an interrupt in the boot sequence only if doing so will not
+cause any other component to handle an interrupt. As they have all
+been written assuming that interrupts are not enabled until after Init
+completes, making one of them handle an interrupt could cause it to 
+fail.
+
+Depending on what capabilities the hardware provides, there are
+several ways to meet these requirements. The simplest is to push these
+initialization edge cases out of the main boot sequence, e.g., into
+SplitControl. A second possibility is to redirect the interrupt table,
+if the MCU supports doing so. Whichever mechanism is chosen, extreme
+care needs to be used in order to not disrupt the operation of other
+components.
+
+Unless part of a hardware abstraction architecture (HAA) [4]_, the
+Init.init() command MUST NOT assume that other components have been
+initialized unless it has initialized them, and MUST NOT call any
+functional interfaces on any components that might be shared or
+interact with shared resources.  Components MAY call functions
+on other components that are completely internal to the subsystem.
+For example, a networking layer can  call queue operations to 
+initialize its queue, but a link layer must not send commands
+over an SPI bus.  An HAA
+component MAY make other calls to initialize hardware state. A
+component that is not part of an HAA SHOULD NOT call Init.init() on
+other components unless it needs to enforce a temporal ordering on
+initialization.
+
+If a component A depends on another component, B, 
+which needs to be initialized, then A SHOULD wire B's Init directly 
+to the boot sequence, unless there is a temporal ordering requirement to
+the initialization. The purpose of this convention is to simplify
+component initialization and the initialization sequence.
+
+5. Implementation
+====================================================================
+
+The following files in ``tinyos-2.x/tos/system`` contain the reference
+implementations of the TinyOS boot sequence:
+
+  * ``RealMainP.nc`` is the module containing the function ``main``.
+  * ``MainC.nc`` is the configuration that wires RealMainP to
+    PlatformC and TinySchedulerC [1]_.
+
+
+6. Author's Address
+====================================================================
+
+| Philip Levis
+| 467 Soda Hall
+| UC Berkeley
+| Berkeley, CA 94720
+|
+| phone - +1 510 290 5283
+|
+| email - pal@cs.berkeley.edu
+
+7. Citations
+====================================================================
+
+.. [1] TEP 106: Schedulers and Tasks.
+
+.. [2] TEP 112: Microcontroller Power Management.
+
+.. [3] TEP 102: Timers.
+
+.. [4] TEP 2: Hardware Abstraction Architecture. 
+
+ 
diff --git a/doc/txt/tep108.txt b/doc/txt/tep108.txt
new file mode 100644
index 00000000..307aa3f8
--- /dev/null
+++ b/doc/txt/tep108.txt
@@ -0,0 +1,1076 @@
+============================
+Resource Arbitration
+============================
+
+:TEP: 108
+:Group: Core Working Group
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Authors: Kevin Klues, Philip Levis, David Gay, David Culler, Vlado Handziski
+
+.. Note::
+
+  This memo documents a part of TinyOS for the TinyOS Community, and
+  requests discussion and suggestions for improvements.  Distribution
+  of this memo is unlimited. This memo is in full compliance with
+  TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents the general resource sharing mechanisms for TinyOS
+2.x. These mechanisms are used to allow multiple software components to
+arbitrate access to shared abstractions.
+
+1. Introduction
+====================================================================
+
+TinyOS 1.x has two mechanisms for managing shared resources:
+virtualization and completion events. A virtualized resource appears
+as an independent instance of an abstraction, such as the Timer
+interface in TimerC. A client of a Timer instance can use it
+independently of the others: TimerC virtualizes the underlying
+hardware clock into N separate timers.
+
+Some abstractions, however, are not well suited to virtualization:
+programs need the control provided by a physical abstraction. For
+example, components in 1.x share a single communication stack,
+GenericComm.  GenericComm can only handle one outgoing packet at a
+time. If a component tries to send a packet when GenericComm is
+already busy, then the call returns FAIL. The component needs a way to 
+tell when GenericComm is free so it can retry. TinyOS
+1.x provides the mechanism of a global completion event which is
+signaled whenever a packet send completes. Interested components can
+handle this event and retry.
+
+This approach to physical (rather than virtualized) abstractions 
+has several drawbacks:
+
+- If you need to make several requests, you have to handle the
+  possibility of a request returning FAIL at any point. This complicates  
+  implementations by adding internal states.
+
+- You have no control over the timing of a sequence of operations. One
+  example of when this can be a problem is timing-sensitive use of an 
+  A/D converter.  You need a way to pre-reserve the use of the ADC so
+  that its operations can be run at the exact moment they are desired.
+
+- If a hardware resource supports reservation, you cannot express this
+  via this software interface. For instance, I2C buses have a
+  concept of "repeated start" when doing multiple bus transactions,
+  but it is not clear how to use this in TinyOS 1.x's I2C abstraction.
+
+- Most TinyOS 1.x services do not provide a very convenient way of
+  monitoring an abstraction's availability for the purpose of retries,
+  nor very clear documentation of which requests could happen simultaneously.
+
+It should be clear that a single approach to resource sharing is not appropriate 
+for all circumstances. For instance, requiring explicit reservation of a
+resource allows programs to have better timing guarantees for access to an A/D
+converter. If a program does not need precise timing guarantees, however (e.g.,
+when measuring temperature in a biological monitoring application), this extra
+resource reservation step unnecessarily complicates code and can be handled
+nicely using virtualization. The following section introduces the concept of
+resource classes in order to address this issue.  The sharing policy used by a
+particular resource abstraction is dictated by the resource class it belongs to.
+
+2. Resource Classes
+====================================================================
+
+TinyOS 2.x distinguishes between three kinds of abstractions: 
+*dedicated*, *virtualized*, and *shared*.  Components offer resource 
+sharing mechanisms appropriate to their goals and level of abstraction.
+
+.. Note::
+  It is important to point out that Hardware Presentation Layer (HPL)
+  components of the HAA [1]_ can never be virtualized, as virtualization
+  inevitably requires state. Depending on their
+  expected use, HPL abstractions can either be dedicated or
+  shared. For example, while hardware timers are rarely
+  multiplexed between multiple components, buses almost always are.
+  This can be seen on the MSP430 microcontroller, where the compare and 
+  counter registers are implemented as dedicated resources, and the USARTs 
+  are shared ones.
+
+2.1 Dedicated
+-------------------------------
+
+An abstraction is *dedicated* if it is a resource
+which a subsystem needs exclusive access to at all times. 
+In this class of resources, no sharing policy is needed since only 
+a single component ever requires use of the resource.  Examples of
+dedicated abstractions include interrupts and counters.
+
+Dedicated abstractions MAY be annotated with the nesC attribute 
+@atmostonce or @exactlyonce to provide compile-time checks that
+their usage assumptions are not violated.
+
+Please refer to Appendix A for an example of how a dedicated 
+resource might be represented, including the use of 
+the nesC @exactlyonce attribute.
+
+2.2 Virtualized
+-------------------------------
+
+*Virtual* abstractions hide multiple clients from each other
+through software virtualization. Every client of a virtualized resource 
+interacts with it as if it were a dedicated resource, with all virtualized
+instances being multiplexed on top of a single underlying resource. Because
+the virtualization is done in software, there is no upper bound on the number
+of clients using the abstraction, barring memory or efficiency constraints.
+As virtualization usually requires keeping state that scales with the number 
+of virtualized instances, virtualized resources often use the Service Instance 
+pattern [3]_, which is based on a parameterized interface.
+
+Virtualization generally provides a very simple interface to its clients.  
+This simplicity comes at the cost of reduced efficiency and an inability to 
+precisely control the underlying resource. For example, a virtualized
+timer resource introduces CPU overhead from dispatching and maintaining 
+each individual virtual timer, as well as introducing jitter whenever two 
+timers happen to fire at the same time. Please refer to Appendix A for an 
+example of how such a virtualized timer resource might be implemented.
+
+2.3 Shared
+-------------------------------
+
+Dedicated abstractions are useful when a resource is
+always controlled by a single component. Virtualized abstractions are
+useful when clients are willing to pay a bit of overhead and sacrifice
+control in order to share a resource in a simple way. There are
+situations, however, when many clients need precise control of a
+resource. Clearly, they can't all have such control at the same time:
+some degree of multiplexing is needed.
+
+A motivating example of a shared resource is a bus.
+The bus may have multiple peripherals on it, corresponding to 
+different subsystems. For example, on the Telos platform the flash
+chip (storage) and the radio (network) share a bus. The storage and
+network stacks need exclusive access to the bus when using it,
+but they also need to share it with the other subsystem. In this
+case, virtualization is problematic, as the radio stack needs to be
+able to perform a series of operations in quick succession without
+having to reacquire the bus in each case. Having the bus be a
+shared resource allows the radio stack to send a series of operations 
+to the radio atomically, without having to buffer them all up 
+in memory beforehand (introducing memory pressure in the process).
+
+In TinyOS 2.x, a resource *arbiter* is responsible for multiplexing
+between the different clients of a shared resource. It determines 
+which client has access to the resource at which time. While a client 
+holds a resource, it has complete and unfettered control. Arbiters assume 
+that clients are cooperative, only acquiring the resource when needed 
+and holding on to it no longer than necessary. Clients explicitly 
+release resources: there is no way for an arbiter to forcibly reclaim it.
+The following section is dedicated to describing the arbiter and its 
+interfaces.
+
+3. Resource Arbiters
+====================================================================
+
+Every shared resource has an arbiter to manage which client
+can use the resource at any given time. Because an arbiter is a
+centralized place that knows whether the resource is in use, it can also
+provide information useful for a variety of other services, such as
+power management. An arbiter MUST provide a parameterized Resource
+interface as well as an instance of the ArbiterInfo interface. The Resource
+interface is instantiated by different clients wanting to gain access to a 
+resource.  The ArbiterInfo interface is used by components that wish to 
+retrieve global information about the status of a resource (i.e. if it is in 
+use, who is using it, etc.).  An arbiter SHOULD also provide a parameterized 
+ResourceRequested interface and use a parameterized ResourceConfigure interface. 
+It MAY also provide an instance of the ResourceDefaultOwner interface or 
+any additional interfaces specific to the particular arbitration policy 
+being implemented.  Each of these interfaces is explained in greater detail below::
+
+ Resource     ArbiterInfo ResourceRequested     ResourceDefaultOwner 
+    |                |         |                        |
+    |                |         |                        |
+    |               \|/       \|/                       |
+    |             \---------------/                     |
+    |--------------|   Arbiter   |----------------------|
+                  /---------------\
+                          |
+                          |      
+                         \|/
+                   ResourceConfigure
+                                
+3.1 Resource
+-------------------------------
+
+Clients of an arbiter request access 
+to a shared resource using the Resource interface::
+
+  interface Resource {
+    async command error_t request();
+    async command error_t immediateRequest();
+    event void granted();
+    async command error_t release();
+    async command bool isOwner();
+  }
+  
+A client lets an arbiter know it needs access to a resource by 
+making a call to request(). If the resource is free,
+SUCCESS is returned, and a granted event is signaled 
+back to the client.  If the resource is busy, SUCCESS will 
+still be returned, but the request will be queued 
+according to the queuing policy of the arbiter. Whenever a client is 
+done with the resource, it calls the release() command, and the next 
+client in the request queue is given access to the resource and 
+is signaled its granted() event. If a client ever makes multiple 
+requests before receiving a granted event, an EBUSY value is returned, 
+and the request is not queued.  Using this policy, clients are not able to 
+monolopize the resource queue by making multiple requests, but they may still be
+able to monopolize the use of the resource if they do not release it in a 
+timely manner.
+
+Clients can also request the use of a resource through the 
+immediateRequest() command.  A call to immediateRequest() can either 
+return SUCCESS or FAIL, with requests made through this command never being 
+queued.  If a call to immediateRequest() returns SUCCESS, the client is granted 
+access to the resource immediately after the call has returned, and no granted 
+event is ever signaled.  If it returns FAIL, the client is not granted access to 
+the resource and the request does not get queued.  The client will have to try 
+and gain access to the resource again later.  
+
+A client can use the isOwner command of the Resource interface to 
+check if it is the current owner of the resource.  This command is mostly 
+used to perform runtime checks to make sure that clients not owning a resource
+are not able to use it.  If a call to isOwner fails, then no call
+should be made to commands provided by that resource.
+
+The diagram below shows how a simple shared resource can be 
+built from a dedicated resource by using just the Resource interface 
+provided by an arbiter.::
+
+           /|\                    /|\
+            |                      |
+            | Data Interface       | Resource
+            |                      |  
+  --------------------------------------------
+  |               Shared Resource            |
+  --------------------------------------------
+           /|\                    /|\
+            |                      |
+            | Data Interface       | Resource
+            |                      |
+  ----------------------      ----------------
+  | Dedicated Resource |      |    Arbiter   |
+  ----------------------      ----------------
+
+An arbiter MUST provide exactly one parameterized Resource interface,
+where the parameter is a client ID, following the Service
+Instance pattern[3]_.  An arbitrated component SomeNameP MUST
+#define SOME_NAME_RESOURCE to a string which can be passed to unique() 
+to obtain a client id.  This #define must be placed in a separate file
+because of the way nesC files are preprocessed: including the
+SomeNameP component isn't enough to ensure that macros #define'd in
+SomeNameP are visible in the referring component.
+
+Please refer to Appendix B for an example of how to wrap a component of this type
+inside a generic configuration. Wrapping the component in this way ensures that
+each Resource client is given a unique client ID, with the added
+benefit of properly coupling multiple components that all need to
+refer to the same client ID.
+
+Appendix B also provides a complete example of how an I2C resource might be 
+abstracted according to this pattern.  For further examples see the various 
+chip implementations in the tinyos-2.x source tree under tinyos-2.x/chips/
+
+3.2 ArbiterInfo
+-------------------------------
+
+Arbiters MUST provide an instance of the ArbiterInfo interface.
+The ArbiterInfo interface allows a component to query the current 
+status of an arbiter::
+
+  interface ArbiterInfo {
+    async command bool inUse();
+    async command uint8_t clientId();
+  }
+  
+In contrast to the parameterized Resource interface provided by an arbiter, 
+only a single ArbiterInfo interface is provided.  Its purpose is 
+to allow one to find out:
+
+- Whether the resource for which it is arbitrating use is currently in use or not
+- Which client is using it.
+
+One can view ArbiterInfo as an interface for obtaining global information about  
+the use of a resource, while Resource can be viewed as an interface for obtaining 
+local access to that resource.
+
+The primary use of the ArbiterInfo interface is to allow a shared resource to reject 
+any calls made through its data interface by clients that do not currently have access to 
+it.  For an example of how this interface is used in this fashion refer to Appendix B.::
+
+           /|\                        /|\
+            |                          |
+            | Data Interface           | Resource
+            |                          |  
+  -----------------------------------------------------------
+  |                     Shared Resource                     |
+  -----------------------------------------------------------
+           /|\                    /|\         /|\
+            |                      |           |
+            | Data Interface       | Resource  | ArbiterInfo
+            |                      |           |
+  ----------------------      -------------------------------
+  | Dedicated Resource |      |           Arbiter           |
+  ----------------------      -------------------------------
+
+3.3 ResourceRequested
+-------------------------------
+
+Sometimes it is useful for a client to be able to hold onto a resource until 
+someone else needs it and only at that time decide to release it.  Using the
+ResourceRequested interface, this information is made available to the current
+owner of a resource:: 
+
+  interface ResourceRequested {
+    async event void requested();
+    async event void immediateRequested();
+  }
+  
+A requested event is signaled to the current owner of the resource if another
+client makes a request for the resource through the request() command of
+its Resource interface.  If a request is made through the immediateRequest()
+command, then the immediateRequested() event is signaled.
+  
+An arbiter SHOULD provide a parameterized ResourceRequested interface to its 
+clients, but is not required to.  The client id of the parameterized 
+ResourceRequested interface should be coupled with the client id of the Resource 
+interface to ensure that all events are signaled to the proper clients.  Please 
+refer to Appendix B for an example of how this interface might be used.::
+
+           /|\                        /|\                   /|\
+            |                          |                     |
+            | Data Interface           | Resource            | ResourceRequested
+            |                          |                     |
+  --------------------------------------------------------------------------------
+  |                              Shared Resource                                 |
+  --------------------------------------------------------------------------------
+           /|\                    /|\         /|\            /|\
+            |                      |           |              |
+            | Data Interface       | Resource  | ArbiterInfo  | ResourceRequested
+            |                      |           |              |
+  ----------------------      ----------------------------------------------------
+  | Dedicated Resource |      |                     Arbiter                      |
+  ----------------------      ----------------------------------------------------
+
+3.4 ResourceConfigure
+-------------------------------
+
+The existence of the ResourceConfigure interface allows a resource to be 
+automatically configured just before a client is granted access to it.
+Components providing the ResourceConfigure interface use the interfaces
+provided by an underlying dedicated resource to configure it into one
+of its desired modes of operation.  A cleint then wires its shared resource 
+abstraction to the component implementing the desired configuration.  The 
+configure command is called immediataely before the client is granted access 
+to the resource, and the unconfigure command is called just before fully 
+releasing it.::
+
+  interface ResourceConfigure {
+    async command void configure();
+    async command void unconfigure();
+  }
+  
+:: 
+
+    ResourceConfigure       ResourceConfigure      ResourceConfigure
+           |                       |                     /|\
+           |                       |                      |
+          \|/                     \|/                     |                
+  -------------------     -------------------    ------------------- 
+  | Configuration 1 |     | Configuration 2 |    | Shared Resource |
+  -------------------     -------------------    -------------------
+           |                       |                     /|\
+           |   Control Interface   |                      | ResourceConfigure
+          \|/                     \|/                     |
+        ------------------------------               -----------                 
+        |     Dedicated Resource     |               | Arbiter |
+        ------------------------------               -----------
+
+The arbiter SHOULD use a parameterized ResourceConfigure interface, with 
+its client ID parameter coupled with the client id of its parameterized
+Resource interface.  If an arbiter uses the ResourceConfigure interface, 
+it MUST call ResourceConfigure.configure() on the granted client ID 
+before it signals the Resource.granted() event. Similarly, after a valid
+call to Resource.release(), it MUST call ResourceConfigure.unconfigure() 
+on the releasing client ID.  By calling ResourceConfigure.configure() just
+before granting a client access to a resource and calling 
+ResourceConfigure.unconfigure() just before fully releasing it, it is guaranteed
+that a resource is always unconfigured before an attempt to configure it can be 
+made again.
+
+The commands included in this interface could have been made part of the standard
+Resource interface (and changed into callback events), but at a higher cost than 
+keeping them separate. Introducing these new commands into the Resource interface 
+would have lead to a large number of clients all including redundant configuration 
+code, while using the call out approach to a separate component ensures that we 
+only have a single instance of the code. 
+
+For an example of how configurations for the three different modes of the 
+Msp430 Usart component can take advantage of the ResourceConfigure 
+interface refer to Appendix B as well as section 4 on the use of 
+cross-component reservation.
+
+3.5 ResourceDefaultOwner
+-------------------------------
+
+The normal Resource interface is for use by clients that all share the resource 
+in an equal fashion. The ResourceDefaultOwner interface is for use by a single 
+client that needs to be given control of the resource whenever no one else is 
+using it. An arbiter MAY provide a single instance of the ResourceDefaultOwner 
+interface. It MUST NOT provide more than one.::
+
+  interface ResourceDefaultOwner {
+    async event void granted();
+    async command error_t release();
+    async command bool isOwner();
+    async event void requested();
+    async event void immediateRequested();
+  }
+  
+The Arbiter MUST guarantee that the client of the ResourceDefaulrClient interface is
+made the owner of the resource before the boot initialization sequence is 
+completed.  When a normal resource client makes a request for the resource, the 
+ResourceDefaultOwner will receive either a requested() or an immediateRequested() 
+event depending on how the request was made.  It must then decide if and when to 
+release it.  Once released, all clients that have pending requests will be 
+granted access to the resource in the order determined by the queuing policy of 
+the arbiter in use.  Once all pending requests have been granted (including 
+those that came in while other clients had access to the resource), the 
+ResourceDefaultOwner is automatically given control of the resource, receiving its 
+granted() event in the process.  The ResourceDefaultOwner interface also contains 
+the same isOwner() command as the normal Resource interface, and the semantics 
+of its use are exactly the same.
+
+Although the ResourceDefaultOwner interface looks similar to a combination of the 
+normal Resource interface and the ResourceRequested interface, its intended use 
+is quite different.  The ResourceDefaultOwner interface should only be used by 
+clients that wish to have access to a resource only when no other clients are 
+using it.  They do not actively seek access to the resource, but rather use 
+it to perform operations when it would otherwise simply be idle.  
+  
+The primary motivation behind the definition of the ResourceDefaultOwner 
+interface is to allow for an easy integration of power management
+for a resource with its arbitration policy.  Arbiters that want to allow 
+a resource to be controlled by a particular power management policy can 
+provide the ResourceDefaultOwner interface for use by a component that 
+implements that policy. The power management component will receive the 
+granted() event whenever the resource has gone idle, and will proceed in
+powering it down.  When another client requests the resource, the power 
+manager will be notified through either the requested() or 
+immediateRequested() events as appropriate.  It can then power up the resource 
+and release it once the power up has completed.  Note that if power up is 
+a split-phase operation (takes a while), then calls by clients to 
+immediateRequest() when in the powered down state will return 
+FAIL. Please see the TEP on the Power Management of Non-Virtualized devices
+([4]_) for more details.
+
+4. Cross-Component Reservation
+====================================================================
+
+In some cases, it is desirable to share the reservation of a
+single resource across multiple components. For example, on the TI
+MSP430, a single USART component can be used as an I2C bus, a UART,
+or an SPI connection. Clearly, on this chip, a reservation of the I2C
+bus implicitly restricts the corresponding UART and SPI
+services from gaining access to the resource. Enforcing such a policy
+can be accomplished in the framework described above by:
+
+ 1) Creating a set of unique ids for each service using the shared
+    resource.
+
+ 2) Mapping these ids onto the ids of the underlying resource
+
+Clients connecting to these services do not know that that this
+mapping is taking place.  As far as they are concerned, the only
+arbitration taking place is between other clients using the same
+service.  In the MSP430 example, a single client of the I2C bus could
+be contending with a single client of the SPI connection, but they
+would probably have the same service level client ID.  These two
+service level client ids would be mapped onto 2 unique resource ids
+for use by the shared USART component. The proper way to achieve this
+mapping is through the use of generic components.  The example given
+below shows how to perform this mapping for the SPI component on the
+MSP430.  It is done similarly for the UART and I2C bus::
+
+  #include "Msp430Usart.h"
+  generic configuration Msp430Spi0C() {
+    provides interface Resource;
+    provides interface SpiByte;
+    provides interface SpiPacket;
+  }
+  implementation {
+    enum { CLIENT_ID = unique(MSP430_SPIO_BUS) };
+
+    components Msp430Spi0P as SpiP;
+    Resource = SpiP.Resource[ CLIENT_ID ];
+    SpiByte = SpiP.SpiByte;
+    SpiPacket = SpiP.SpiPacket[ CLIENT_ID ];
+
+    components new Msp430Usart0C() as UsartC;
+    SpiP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
+    SpiP.UsartInterrupts -> UsartC.HplMsp430UsartInterrupts;
+  }
+
+The definition of the MSP430_SPIO_BUS string is defined in
+Msp430Usart.h. A unique id is created from this string every time a
+new Msp430Spi0C component is instantiated.  This id is used as a
+parameter to the parameterized Resource interface provided by the
+Msp430Spi0P component.  This is where the mapping of the two
+different ids begins.  As well as *providing* a parameterized
+Resource interface (Msp430Spi0P.Resource), the Msp430Spi0P component 
+also *uses* a parameterized Resource interface (Msp430Spi0P.UsartResource). 
+Whenever a client makes a call through the provided Resource interface 
+with id CLIENT_ID, an underlying call to the Msp430Spi0P.Resource interface 
+with the same id is implicitly made.  By then wiring the Msp430Spi0P.UsartResource 
+interface with id CLIENT_ID to an instance of the Resource interface 
+provided by the instantiation of the Msp430Usart0C component, the mapping 
+is complete. Any calls to the Resource interface provided by a new 
+instantiation of the Msp430Spi0C component will now be made through a 
+unique Resource interface on the underlying  Msp430Usart0C component.
+
+This level of indirection is necessary because it may not always be
+desirable to directly wire the service level Resource interface to
+the underlying shared Resource interface.  Sometimes we may want to
+perform some operations between a service level command being
+called, and calling the underlying command on the shared resource. 
+With such a mapping, inserting these operations is made possible.
+
+Having such a mapping is also important for services that need to
+explicitly keep track of the number of clients they have,
+independent from how many total clients the underlying shared
+resource has.  For example, a sensor implementation that uses an
+underlying ADC resource may wish to power down its sensor whenever it
+has no clients.  It doesn't want to have to wait until the entire ADC
+is free to do so.  Providing this mapping allows the implicit power
+manager components described in TEP 115 to be wired in at both levels
+of the abstraction without interfering with one another.  In this
+way, implementations of these components become much simpler, and code
+reuse is encouraged.
+
+Implementations of components similar to this one can be found in the
+tinyos-2.x source tree in the tos/chips/msp430/uart directory
+
+5. Implementation 
+====================================================================
+
+Because most components use one of a small number of arbitration
+policies, tinyos-2.x includes a number of default resource arbiters. These
+arbiters can be found in ``tinyos-2.x/tos/system`` and are all
+generic components that include one of the two signatures seen below::
+
+  generic module SimpleArbiter {
+    provides interface Resource[uint8_t id];
+    provides interface ResourceRequested[uint8_t id];
+    provides interface ArbiterInfo;
+    uses interface ResourceConfigure[uint8_t id];
+  }
+
+  generic module Arbiter {
+    provides interface Resource[uint8_t id];
+    provides interface ResourceRequested[uint8_t id];
+    provides interface ResourceDefaultOwner;
+    provides interface ArbiterInfo;
+    uses interface ResourceConfigure[uint8_t id];
+  } 
+  
+The "Simple" arbiters are intended for use by resources that 
+do not require the additional overhead incurred by providing the
+ResourceDefaultOwner interface.
+
+For many situations, changing an arbitration policy requires nothing
+more than changing the queuing policy it uses to decide the order in
+which incoming requests should be granted. In this way, separating 
+queuing policy implementations from actual arbitration implementations 
+encourages code reuse.  The introduction of the SimpleArbiterP and 
+ArbiterP components found under tinyos-2.x/tos/system help in this
+separation.  They can be wired to components providing
+a particular queuing policy through the use of the ResourceQueue  
+interface.::
+
+  interface ResourceQueue {
+    async command bool isEmpty();
+    async command bool isEnqueued(resource_client_id_t id);
+    async command resource_client_id_t dequeue();
+    async command error_t enqueue(resource_client_id_t id);
+  }   
+  
+An example of wiring a First-Come-First-Serve (FCFS) queuing policy to 
+the SimpleArbiterP component using the ResourceQueue interface
+defined above can be seen below:: 
+
+  generic configuration SimpleFcfsArbiterC(char resourceName[]) {
+    provides {
+      interface Resource[uint8_t id];
+      interface ResourceRequested[uint8_t id];
+      interface ArbiterInfo;
+    }
+    uses interface ResourceConfigure[uint8_t id];
+  }
+  implementation {
+    components MainC;
+    components new FcfsResourceQueueC(uniqueCount(resourceName)) as Queue;
+    components new SimpleArbiterP() as Arbiter;
+
+    MainC.SoftwareInit -> Queue;
+
+    Resource = Arbiter;
+    ResourceRequested = Arbiter;
+    ArbiterInfo = Arbiter;
+    ResourceConfigure = Arbiter;
+
+    Arbiter.Queue -> Queue;
+  }
+
+This generic configuration can be instantiated by a resource in order
+to grant requests made by its clients in an FCFS fashion.
+  
+All of the default queuing policies provided in tinyos-2.x along with the 
+respective arbitration components that have been built using them are 
+given below:
+
+Queuing Policies:
+
+- FcfsResourceQueueC
+- RoundRobinResourceQueueC
+    
+Arbiters:
+
+- SimpleFcfsArbiterC
+- FcfsArbiterC
+- SimpleRoundRobinArbiterC
+- RoundRobinArbiterC 
+  
+Keep in mind that neither the implementation of an arbiter nor its 
+queuing policy can be used to explicitly restrict access to an 
+underlying shared resource.  The arbiter simply provides a standardized
+way of managing client ids so that shared resources don't have to duplicate 
+this functionality themselves every time they are implemented.  In order to
+actually restrict clients from using a resource without first requesting it,
+a shared resource must use the functionality provided by the ArbiterInfo interface
+to perform runtime checks on the current owner of a resource.  Please refer 
+to the section on the ArbiterInfo interface in Appendix B for more information
+on how such runtime checks can be performed. 
+  
+6. Author's Address
+====================================================================
+
+| Kevin Klues
+| 503 Bryan Hall
+| Washington University
+| St. Louis, MO 63130
+|
+| phone - +1-314-935-6355
+| email - klueska@cs.wustl.edu
+|
+| Philip Levis
+| 358 Gates Hall
+| Stanford University
+| Stanford, CA 94305-9030
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+|
+| David Gay
+| 2150 Shattuck Ave, Suite 1300
+| Intel Research
+| Berkeley, CA 94704
+|
+| phone - +1 510 495 3055
+| email - david.e.gay@intel.com
+|
+| David Culler
+| 627 Soda Hall
+| UC Berkeley
+| Berkeley, CA 94720
+|
+| phone - +1 510 643 7572
+| email - culler@cs.berkeley.edu
+|
+| Vlado Handziski
+| Sekr FT5
+| Einsteinufer 25
+| 10587 Berlin
+| GERMANY
+|
+| email - handzisk@tkn.tu-berlin.de
+
+7. Citations
+====================================================================
+
+.. [1] TEP 2: Hardware Abstraction Architecture. 
+.. [2] TEP 102: Timers. 
+.. [3] Service Instance Pattern. In *Software Design Patterns for TinyOS.* David Gay, Philip Levis, and David Culler. Published in Proceedings of the ACM SIGPLAN/SIGBED 2005 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05).
+.. [4] TEP 115: Power Management of Non-Virtualized Devices. 
+.. [5] TinyOS Programming. http://csl.stanford.edu/~pal/pubs/tinyos-programming-1-0.pdf
+
+Appendix A: Resource Class Examples
+====================================================================
+
+Dedicated Resource
+--------------------------------------------------------------------
+Timer 2 on the Atmega128 microprocessor is a dedicated resource
+represented by the HplAtm128Timer2C component::
+ 	
+  module HplAtm128Timer2C {
+    provides {
+      interface HplTimer<uint8_t>   as Timer2     @exactlyonce();
+      interface HplTimerCtrl8       as Timer2Ctrl @exactlyonce();
+      interface HplCompare<uint8_t> as Compare2   @exactlyonce();
+    }
+  }
+  
+Only a single client can wire to any of these interfaces as enforced through
+the nesC @exactlyonce attribute.  Keep in mind that although the interfaces of
+this component are only allowed to be wired to once, nothing prevents the 
+component wiring to them from virtualizing the services they provide at some 
+higher level.  If you are unfamiliar with how @exactlyonce and other nesC 
+attributes are used to by the nesC compiler, please refer to section 9.1 of the 
+TinyOS Programming Manual [5]_.
+
+Virtualized Resource
+--------------------------------------------------------------------
+
+The TimerMilliC component provides a virtual abstraction of millisecond 
+precision timers to application components [2]_. It encapsulates the required 
+parameterized Timer interface through the use of a generic configuration.  
+Clients wishing to use a millisecond timer need only instantiate a single 
+instance of the TimerMilliC generic, leaving the fact that it is virtualized 
+underneath transparent.::
+
+  generic configuration TimerMilliC {
+    provides interface Timer<TMilli>;
+  }
+  implementation {
+    components TimerMilliP;
+    Timer = TimerMilliP.TimerMilli[unique(UQ_TIMER_MILLI)];
+  }
+	
+The actual parameterized Timer interface is provided by the chip specific 
+HilTimerMilliC component.  This interface is exposed through  
+the TimerMilliP component which wires HilTimerMilliC to the boot 
+initialization sequence::
+
+  configuration TimerMilliP {
+    provides interface Timer<TMilli> as TimerMilli[uint8_t num];
+  }
+  implementation {
+    components HilTimerMilliC, MainC;
+    MainC.SoftwareInit -> HilTimerMilliC;
+    TimerMilli = HilTimerMilliC;
+  }
+
+Appendix B: Arbiter Interface Examples
+====================================================================
+
+.. Note:
+  Most of the examples provided in this section use complex nesC syntax that may 
+  be unfamiliar to the novice nesC programmer.  Please refer to the TinyOS 
+  programming Manual [5]_ for clarification as necessary. 
+ 
+Resource
+--------------------------------------------------------------------
+Examples of how to use the Resource interface for arbitrating
+between multiple clients can be found in the tinyos-2.x
+source tree under tinyos-2.x/apps/tests/TestArbiter.
+  	 
+A specific example of where the Resource.isOwner() is used 
+can be seen in the HplTda5250DataP component of the Infineon 
+Tda5250 radio implementation::
+
+  async command error_t HplTda5250Data.tx(uint8_t data) {
+    if(call UartResource.isOwner() == FALSE)
+      return FAIL;
+    call Usart.tx(data);
+    return SUCCESS;
+  }
+
+A call to the HplTda5250Data.tx command will fail if the radio does
+not currently have control of the underlying Usart resource.  If it
+does, then the Usart.tx(data) command is called as requested.
+
+A component using the Resource interface to implement an I2C
+service might look like this::
+
+  #include I2CPacket.h
+  configuration I2CPacketP {
+    provides interface Resource[uint8_t client];
+    provides interface I2CPacket<I2CAddrSize>[uint8_t client];
+  }
+  implementation {
+    components new FcfsArbiterC(I2CPACKET_RESOURCE) as Arbiter;
+    components I2CPacketImplP() as I2C;
+    ...
+  
+    Resource  = Arbiter;
+    I2CPacket = I2C;
+    ...
+  }
+
+where I2CPacketImplP contains the actual implementation of the 
+I2C service, and I2CPacket.h contains the #define for the 
+name of the resource required by the arbiter::
+
+  #ifndef I2CPACKETC_H
+  #define I2CPACKETC_H
+  #define I2CPACKET_RESOURCE "I2CPacket.Resource"
+  #endif
+  
+This service would then be made available to a client through
+the generic configuration seen below::
+
+  #include I2CPacket.h
+  generic configuration I2CPacketC {
+    provides interface Resource;
+    provides interface I2CPacket<I2CAddrSize>;
+  }
+  implementation {
+    enum { CLIENT_ID = unique(I2CPACKET_RESOURCE) };
+        
+    components I2CPacketP as I2C;
+    Resource = I2C.Resource[CLIENT_ID];
+    I2CPacket = I2C.I2CPacket[CLIENT_ID]; 
+  }
+
+In this example, an instance of the I2CPacket interface is coupled with
+an instance of the Resource interface on every new instantiation of
+the I2CPacketC component.  In this way, a single Resource and a
+single I2CPacket interface can be exported by this component together 
+for use by a client.
+
+Clients of the I2C service would use it as follows::
+
+  module I2CClientP {
+    uses interface Resource as I2CResource;
+    uses interface I2CPacket<I2CAddrSize>;
+  } ...
+
+  configuration I2CClientC { }
+  implementation {
+    components I2CClientP, new I2CPacketC();
+  
+    I2CClientP.I2CResource -> I2CPacketC.Resource;
+    I2CUserM.I2CPacket -> I2CPacket.I2CPacket;
+  }
+  
+ArbiterInfo
+--------------------------------------------------------------------
+In the implementation of the ADC component on the Msp430 microcontroller,
+a simple arbiter is used to provide a round robin sharing policy
+between clients of the ADC::
+	   
+  configuration Msp430Adc12C { 
+    provides interface Resource[uint8_t id]; 
+    provides interface Msp430Adc12SingleChannel[uint8_t id]; 
+    provides interface Msp430Adc12FastSingleChannel[uint8_t id]; 
+  } 
+  implementation { 
+    components Msp430Adc12P,MainC, 
+               new SimpleRoundRobinArbiterC(MSP430ADC12_RESOURCE) as Arbiter,
+               ...
+
+    Resource = Arbiter;
+    SingleChannel = Msp430Adc12P.SingleChannel;
+    FastSingleChannel = Msp430Adc12P.FastSingleChannel;
+  
+    Msp430Adc12P.Init <- MainC;
+    Msp430Adc12P.ADCArbiterInfo -> Arbiter;
+    ...
+  }
+       
+In this configuration we see that the Resource interface provided by 
+Msp430Adc12C is wired directly to the instance of the SimpleRoundRobinArbiterC
+component that is created.  The ArbiterInfo interface provided by
+SimpleRoundRobinArbiterC is then wired to Msp430Adc12P.  The Msp430Adc12P 
+component then uses this interface to perform run time checks to ensure that
+only the client that currently has access to the ADC resource is able to 
+use it::
+       
+  async command error_t Msp430Adc12SingleChannel.getSingleData[uint8_t id]() {
+    if (call ADCArbiterInfo.clientId() == id){
+      configureChannel()
+      // Start getting data
+    }
+    else return ERESERVE;
+  }
+         
+  async command error_t Msp430Adc12FastSingleChannel.configure[uint8_t id]() {
+    if (call ADCArbiterInfo.clientId() == id){
+      clientID = id
+      configureChannel()
+    }
+    else return ERESERVE;
+  }
+         
+  async command error_t Msp430Adc12FastSingleChannel.getSingleData[uint8_t id]() 
+  {
+    if (clientID = id)
+      // Start getting data
+    else return ERESERVE;
+  }
+       
+In order for these runtime checks to succeed, users of the 
+Msp430Adc12SingleChannel and Msp430Adc12FastSingleChannel interfaces will have 
+to match their client id's with the client id of a corresponding Resource 
+interface.  This can be done in the following way::
+       
+  generic configuration Msp430Adc12ClientC() {
+    provides interface Resource;
+    provides interface Msp430Adc12SingleChannel;
+  } 
+  implementation {
+    components Msp430Adc12C;
+    enum { ID = unique(MSP430ADC12_RESOURCE) };
+         
+    Resource = Msp430Adc12C.Resource[ID];
+    Msp430Adc12SingleChannel = Msp430Adc12C.SingleChannel[ID];
+  }  
+
+::
+        
+  generic configuration Msp430Adc12FastClientC() {
+    provides interface Resource;
+    provides interface Msp430Adc12FastSingleChannel;
+  } 
+  implementation {
+    components Msp430Adc12C;
+    enum { ID = unique(MSP430ADC12_RESOURCE) };
+       
+    Resource = Msp430Adc12C.Resource[ID];
+    Msp430Adc12FastSingleChannel = Msp430Adc12C.SingleChannel[ID];
+  }  
+         
+Since these are generic components, clients simply need to instantiate them
+in order to get access to a single Resource interface that is already
+properly coupled with a Msp430Adc12SingleChannel or Msp430Adc12FastSingleChannel
+interface.
+       
+Take a look in the tinyos-2.x source tree under tinyos-2.x/tos/chips/adc12 
+to see the full implementation of these components in their original context.
+
+ResourceRequested
+--------------------------------------------------------------------
+On the eyesIFXv2 platform, both the radio and the flash need access to the bus
+provided by the Usart0 component on the Msp430 microcontroller.  Using 
+a simple cooperative arbitration policy, these two components should able to 
+share the Usart resource by only holding on to it as long as they need it and 
+then releasing it for use by the other component.  In the case of the MAC 
+implementation of the Tda5250 radio component, however, the Msp430 Usart 
+resource needs be held onto indefinitely.  It only ever considers releasing the 
+resource if a request from the flash component comes in through its 
+ResourceRequested interface.  If it cannot release it right away (i.e. it is in 
+the middle of receiving a packet), it defers the release until some later point 
+in time.  Once it is ready to release the resource, it releases it, but then 
+immediately requests it again.  The flash is then able to do what it wants with 
+the Usart, with the radio regaining control soon thereafter.
+ 	 
+In the CsmaMacP implementation of the Tda5250 radio we see the ResourceRequested 
+event being implemented::
+
+  async event void ResourceRequested.requested() {
+    atomic {
+      /* This gives other devices the chance to get the Resource
+         because RxMode implies a new arbitration round.  */
+      if (macState == RX) call Tda5250Control.RxMode()();
+    }
+  }
+
+Through several levels of wiring, the Tda5250 interface is provided to this
+component by the Tda5250RadioP component::  	
+      
+  module Tda5250RadioP {
+    provides interface Tda5250Control;
+    uses interface Resource as UsartResource;
+    ...
+  }
+  implementation {
+    async command error_t Tda5250Control.RxMode() {
+      if(radioBusy() == FALSE)
+        call UsartResource.release();
+        call UsartResource.request();
+    }
+    event void UsartResource.granted() {
+      // Finish setting to RX Mode
+    }
+    ...
+  }
+        
+Although the full implementation of these components is not provided, the 
+functionality they exhibit should be clear.  The CsmaMacP component receives the 
+ResourceRequested.requested() event when the flash requests the use of the 
+Msp430 Usart0 resource.  If it is already in the receive state, it tries to 
+reset the receive state through a call to a lower level component.  This 
+component checks to see if the radio is in the middle of doing anything (i.e. 
+the radioBusy() == FALSE check), and if not, releases the resource and then 
+requests it again.
+      
+To see the full implementations of these components and their wirings to one 
+another, please refer to the tinyos-2.x source tree under 
+tinyos-2.x/tos/chips/tda5250, tinyos-2.x/tos/chips/tda5250/mac, 
+tinyos-2.x/tos/platforms/eyesIFX/chips/tda5250, and 
+tinyos-2.x/tos/platforms/eyesIFX/chips/msp430.
+  	  
+Resource Configure
+--------------------------------------------------------------------
+The Msp430 Usart0 bus can operate in three modes: SPI, I2C, 
+and UART. Using all three concurrently is problematic: only one should 
+be enabled at any given time. However, different clients of the bus might
+require the bus to be configured for different protocols. On Telos, for example
+many of the available sensors use an I2C bus, while the radio and flash chip use 
+SPI.
+
+A component providing the SPI service on top of the shared Usart component looks
+like this::
+
+  generic configuration Msp430Spi0C() {
+    provides interface Resource;
+    provides interface SpiByte;
+    provides interface SpiPacket;
+    ...
+  }
+  implementation {
+    enum { CLIENT_ID = unique( MSP430_SPIO_BUS ) };
+    
+    components Msp430SpiNoDma0P as SpiP;
+    components new Msp430Usart0C() as UsartC;
+    SpiP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure;
+    SpiP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
+    SpiP.UsartInterrupts -> UsartC.HplMsp430UsartInterrupts;
+    ...
+  }
+      
+And one providing the I2C service looks like this::
+  
+  generic configuration Msp430I2CC() {  
+    provides interface Resource;
+    provides interface I2CPacket<TI2CBasicAddr> as I2CBasicAddr;
+     ... 
+  }
+  implementation {
+    enum { CLIENT_ID = unique( MSP430_I2CO_BUS ) };
+  
+     components Msp430I2C0P as I2CP;
+     components new Msp430Usart0C() as UsartC;
+     I2CP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure;
+     I2CP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
+     I2CP.I2CInterrupts -> UsartC.HplMsp430UsartInterrupts;
+     ...
+  }
+
+The implementation of the ResourceConfigure interface is
+provided by both the Msp430SpiNoDma0P and the Msp430I2C0P.  In the 
+two different components, the same Msp430Usart0C component is used,
+but wired to the proper implementation of the ResourceConfigure
+interface. In this way, different instances of the Msp430Usart0C 
+can each have different configurations associated with them, but 
+still provide the same functionality.
+    
+Take a look in the tinyos-2.x source tree under 
+tinyos-2.x/tos/chips/msp430/usart to see the full implementation of 
+these components along with the corresponding Uart implementation.
+
diff --git a/doc/txt/tep109.txt b/doc/txt/tep109.txt
new file mode 100644
index 00000000..3945ffc6
--- /dev/null
+++ b/doc/txt/tep109.txt
@@ -0,0 +1,936 @@
+=========================
+Sensors and Sensor Boards
+=========================
+
+:TEP: 109
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: David Gay, Philip Levis, Wei Hong, Joe Polastre, and Gilman Tolle
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents how sensor drivers are organized in TinyOS and how
+sets of sensor drivers are combined into sensor boards and sensor
+platforms, along with general principles followed by the components
+that provide access to sensors.
+
+1. Principles
+====================================================================
+
+This section describes the basic organization principles for sensor
+drivers in TinyOS.
+
+For background, a sensor can be attached to the microcontroller on a
+TinyOS platform through a few different types of connections:
+
+ * Included within the microcontroller itself
+ * Connected to general-purpose IO pins for level/edge detection
+ * Connected to an ADC in the microcontroller for voltage sampling
+ * Connected to general-purpose IO pins for digital communication
+ * Connected through a standard digital bus protocol (1-Wire, I2C, SPI)
+
+Physically, these connections can also be decoupled by attaching the
+sensors to a `sensor board`, which can be removed from the TinyOS
+platform, and could attach to multiple different TinyOS platforms.
+
+The capabilities of a physical sensor are made available to a TinyOS
+application through a `sensor driver`. 
+
+According to the HAA [TEP2]_, TinyOS devices SHOULD provide both
+simple hardware-independent interfaces for common-case use (HIL) and
+rich hardware-dependent interfaces for special-case use (HAL). Sensor
+drivers SHOULD follow this spirit as well.
+
+TinyOS 2.x represents each sensor as an individual component. This
+allows the compilation process to minimize the amount of code
+included. A sensor board containing multiple sensors SHOULD be
+represented as a collection of components, one for each sensor,
+contained within a sensor board directory.
+
+Sensors, being physical devices that can be shared, can benefit from
+virtualization and arbitration. This document describes a design
+pattern for sensor virtualization that SHOULD be followed by sensor
+drivers.
+
+The same physical sensor can be attached to multiple different TinyOS
+platforms, through platform-dependent interconnections. The common
+logic of sensor driver SHOULD be factored into chip-dependent,
+platform-independent components, and those components SHOULD be bound
+to the hardware resources on a platform by platform-dependent
+components, and to the hardware resources on a sensor board by
+sensorboard-dependent components.
+
+A physical sensor has a general class and a specific set of
+performance characteristics, captured by the make and model of the
+sensor itself. The naming of the sensor driver components SHOULD
+reflect the specifc name of the sensor, and MAY provide a component
+with a generic name for application authors who only care about the
+general class of the sensor.
+
+This document requires that sensor components specify the range (in
+bits) of values returned by sensor drivers, but takes no position on
+the meaning of these values. They MAY be raw uninterpreted values or
+they MAY have some physical meaning. If a driver returns uninterpreted
+values, the driver MAY provide additional interfaces that would allow
+higher-level clients to obtain information (e.g. calibration
+coefficients) needed to properly interpret the value.
+
+2. Sensor HIL Components
+====================================================================
+
+A sensor HIL component MUST provide:
+
+- One or more SID interfaces [TEP114]_, for reading data.
+
+A sensor HIL component MAY provide:
+
+- One or more SID interfaces [TEP114]_, for reading or
+  writing calibration coefficients or control registers.
+
+A sensor device driver SHOULD be a generic component that virtualizes
+access to the sensor. A sensor device driver can provide such
+virtualization for itself by defining a nesC generic client
+component. When a client component is being used, a call to a
+top-level SID interface SHOULD be delayed when the device is busy,
+rather than failing. Using one of the system arbiters can make the
+implementation of this requirement easier to accomplish.
+
+For example::
+
+  generic configuration SensirionSht11C() {
+    provides interface Read<uint16_t> as Temperature;
+    provides interface ReadStream<uint16_t> as TemperatureStream;
+    provides interface DeviceMetadata as TemperatureDeviceMetadata;
+
+    provides interface Read<uint16_t> as Humidity;
+    provides interface ReadStream<uint16_t> as HumidityStream;
+    provides interface DeviceMetadata as HumidityDeviceMetadata;
+  }
+  implementation {
+    // connect to the ADC HIL, GPIO HAL, or sensor's HAL
+  }
+
+When a HIL component is being used, the sensor MUST initialize itself,
+either by including the `MainC` component and wiring to the
+`SoftwareInit` interface, or by allowing a lower-level component (like
+an ADC) to initialize itself.
+
+In addition, the HIL sensor driver MUST start the physical sensor
+automatically. For sensors without a constant power draw, the sensor
+MAY be started once at boot time by wiring to the `MainC.Boot`
+interface. Sensors that draw appreciable power MUST be started in
+response to a call to one of the top-level SID interfaces, and stopped
+some time after that call completes. Using one of the power-management
+components described in [TEP115]_ can make this implementation easier.
+
+Generally, simple types are made up of octets. However, sensor values
+often have levels of precision besides a multiple of 8. To account for
+such cases, each device MUST specify the precision of each one of its
+interfaces by providing the DeviceMetadata interface::
+
+  interface DeviceMetadata {
+    command uint8_t getSignificantBits();
+  }
+
+The name of the instance of DeviceMetadata MUST clearly indicate which
+interface it corresponds to.
+
+The getSignificantBits() call MUST return the number of significant
+bits in the reading. For example, a sensor reading taken from a 12-bit
+ADC would typically return the value 12 (it might return less if, e.g.,
+physical constraints limit the maximum A/D result to 10-bits).
+
+Sensor driver components SHOULD be named according to the make and
+model of the sensing device being presented. Using specific names
+gives the developer the option to bind to a particular sensor, which
+provides compile-time detection of missing sensors. However, wrapper
+components using "common" names MAY also be provided by the driver
+author, to support application developers who are only concerned with
+the particular type of the sensor and not its make, model, or detailed
+performance characteristics.
+
+A "common" naming layer atop a HIL might look like this::
+
+  generic configuration TemperatureC() {
+    provides interface Read<uint16_t>;
+    provides interface ReadStream<uint16_t>;
+    provides interface DeviceMetadata;
+  }
+  implementation {
+    components new SensirionSht11C();
+    Read = SensirionSht11C.Temperature;
+    ReadStream = SensirionSht11C.TemperatureStream;
+    DeviceMetadata = SensirionSht11C.TemperatureDeviceMetadata;
+  }
+
+  generic configuration HumidityC() {
+    provides interface Read<uint16_t>;
+    provides interface ReadStream<uint16_t>;
+    provides interface DeviceMetadata;
+  }
+  implementation {
+    components new SensirionSht11C();
+    Read = SensirionSht11C.Humidity;
+    ReadStream = SensirionSht11C.HumidityStream;
+    DeviceMetadata = SensirionSht11C.HumidityDeviceMetadata;
+  }
+
+3. Sensor HAL Components
+====================================================================
+
+Sensors with a richer interface than would be supported by the SID
+interfaces MAY provide a HAL component in addition to a HIL
+component.
+
+A sensor HAL component MUST provide:
+
+- A SID-based interface or a specific hardware-dependent interface
+  with commands for sampling and controlling the sensor device.
+
+A sensor HAL component MAY need to provide:
+
+- A `StdControl` or `SplitControl` interface for manual power
+  management by the user, following the conventions described in
+  [TEP115]_.
+
+- A `Resource` interface for requesting access to the device and
+  possibly performing automated power management, following
+  the conventions described in [TEP108]_ and [TEP115]_.
+
+- Any other interfaces needed to control the device, e.g., to
+  read or write calibration coefficients.
+
+For example::
+
+  configuration SensirionSht11DeviceC {
+    provides interface Resource[ uint8_t client ];
+    provides interface SensirionSht11[ uint8_t client ];
+  }
+  implementation {
+    // connect to the sensor's platform-dependent HPL here
+  }
+
+4. Sensor Component Organization and Compiler Interaction Guidelines
+====================================================================
+
+Sensors are associated either with a particular sensor board or with a
+particular platform. Both sensors and sensor boards MUST have unique
+names. Case is significant, but two sensor (or sensor board) names
+MUST differ in more than case. This is necessary to support platforms
+where filename case differences are not significant.
+
+Each sensor board MUST have its own directory whose name is the sensor
+board's unique name (referred to as <sensorboard> in the rest of this
+section). Default TinyOS 2.x sensor boards are placed in
+``tos/sensorboards/<sensorboard>``, but sensor board directories can be
+placed anywhere as long as the nesC compiler receives a ``-I`` directive
+pointing to the sensor board's directory. Each sensor board directory
+MUST contain a ``.sensor`` file (described below). If the
+sensor board wishes to define any C types or constants, it SHOULD
+place these in a file named ``<sensorboard>.h`` in the sensor board's
+directory.
+
+A sensor board MAY contain components that override the default TinyOS
+*demo sensors*. This allows the sensor board to easily be used with
+TinyOS sample applications that use the demo sensors. If a sensor 
+board wishes to override the default demo sensor:
+
+* It MUST provide a generic component named ``DemoSensorC`` with the
+  following signature::
+
+    provides interface Read<uint16_t>;
+    provides interface DeviceMetadata;
+
+* It MAY provide a generic component named ``DemoSensorNowC`` with the
+  following signature::
+
+    provides interface ReadNow<uint16_t>;
+    provides interface DeviceMetadata;
+
+  This component SHOULD sample the same sensor as ``DemoSensorC``.
+
+* It MAY provide a generic component named ``DemoSensorStreamC`` with the
+  following signature::
+
+    provides interface ReadStream<uint16_t>;
+    provides interface DeviceMetadata;
+
+  This component SHOULD sample the same sensor as ``DemoSensorC``.
+
+These components MUST be an alias for one of the sensor board's usual
+sensors, though they change the precision of the sensor if necessary.
+For instance, if ``DemoSensorC`` is an alias for a 20-bit sensor that
+provides a ``Read<uint32_t>`` interface, ``DemoSensorC`` would still
+provide ``Read<uint16_t>`` and would include code to reduce the
+precision of the aliased sensor.
+
+
+4.1 Compiler Interaction
+------------------------
+
+When the ``ncc`` nesC compiler frontend is passed a ``-board=X`` option,
+it executes the ``.sensor`` file found in the sensor board directory
+``X``.  This file is a perl script which can add or modify any
+compile-time options necessary for the sensor board. It MAY modify the
+following perl variables, and MUST NOT modify any others:
+
+- ``@includes``: This array contains the TinyOS search path, i.e., the
+  directories which will be passed to nescc (the TinyOS-agnostic nesC
+  compiler) as ``-I`` arguments. You MUST add to ``@includes`` any
+  directories needed to compile this sensor board's components.  For
+  instance, if your sensor boards depends on support code found in
+  ``tos/chips/sht11``, you would add ``"%T/chips/sht11"`` to ``@includes``.
+
+- ``@new_args``: This is the array of arguments which will be passed to
+  nescc. You MUST add any arguments other than ``-I`` that are necessary
+  to compile your sensor board components to ``@new_args``.
+
+If a sensor is associated with a platform `P` rather than a sensor
+board, then that platform MUST ensure that, when compiling for
+platform `P`, all directories needed to compile that sensor's 
+component are added to the TinyOS search path (see [TEP131]_ for
+information on how to set up a TinyOS platform).
+
+4.2 Sensor Components
+---------------------
+
+A particular sensor is typically supported by many components,
+including the HIL and HAL components from Sections 2 and 3, A/D
+conversion components (for analog sensors), digital bus components
+(e.g., SPI, for digital sensors), system services (timers, resource
+and power management, ...), glue components (to connect sensors,
+sensor boards and platforms), etc.  These components can be divided
+into three classes: sensorboard-dependent, platform-dependent and
+platform-independent. The sensorboard and platform MUST ensure
+(Section 4.1) that all these components can be found at compile-time.
+
+Because the same physical sensor can be used on many platforms or
+sensor boards, and attached in many different ways, to maximize code
+reuse the organization of sensor drivers SHOULD reflect the
+distinction between sensor and sensor interconnect. The sensor
+components SHOULD be platform-independent, while the sensor
+interconnect components are typically sensorboard or
+platform-dependent. However, some sensors (e.g. analong sensors) will
+not have a sufficiently large amount of platform-independent logic to
+justify creating platform-independent components.
+
+The following guidelines specify how to organize sensor and sensor
+interconnect components within TinyOS's directory hierarchy. These
+guidelines are only relevant to components that are part of the core
+source tree. The string ``<sensor>`` SHOULD reflect the make and model
+of the sensor device.
+
+- Platform-independent sensor components that exist as part of a
+  larger chip, like a MCU internal voltage sensor, SHOULD be placed in
+  a subdirectory of the chip's directory
+  ``tos/<chip>/sensors/<sensor>``.
+
+- Other platform-independent sensor components SHOULD be placed
+  in ``tos/chips/<sensor>``.
+
+- Sensorboard-dependent sensor and sensor interconnect components
+  SHOULD be placed either in the ``<sensorboard>`` directory or in a
+  ``<sensorboard>/chips/<sensor>`` directory.
+
+- Platform-dependent sensor and sensor interconnect components SHOULD
+  be placed in ``tos/<platform>/chips/<sensor>``.
+
+5. Authors' Addresses
+====================================================================
+
+| David Gay
+| 2150 Shattuck Ave, Suite 1300
+| Intel Research
+| Berkeley, CA 94704
+|
+| phone - +1 510 495 3055
+|
+| email - david.e.gay@intel.com
+|
+| Wei Hong
+| Arch Rock
+| 657 Mission St. Suite 600
+| San Francisco, CA 94105
+|
+| email - wei.hong@gmail.com
+|
+| Philip Levis
+| 358 Gates Hall
+| Computer Science Department
+| 353 Serra Mall
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+|
+| email - pal@cs.stanford.edu
+| 
+| Joe Polastre
+| 467 Soda Hall
+| UC Berkeley
+| Berkeley, CA 94720
+|
+| email - polastre@cs.berkeley.edu
+|
+| Gilman Tolle
+| Arch Rock
+| 657 Mission St. Suite 600
+| San Francisco, CA 94105
+|
+| email - gtolle@archrock.com
+
+6. Citations
+====================================================================
+
+.. [TEP2] TEP 2: Hardware Abstraction Architecture
+.. [TEP108] TEP 108: Resource Arbitration
+.. [TEP114] TEP 114: SIDs: Source and Sink Indepedent Drivers
+.. [TEP115] TEP 115: Power Management of Non-Virtualized Devices
+.. [TEP131] TEP 131: Creating a New Platform for TinyOS 2.x
+
+Appendix A: Sensor Driver Examples
+====================================================================
+
+1. Analog ADC-Connected Sensor
+------------------------------
+
+The Analog sensor requires two components
+
+* a component to present the sensor itself (HamamatsuS1087ParC)
+
+* a component to select the appropriate hardware resources, such as
+  ADC port 4, reference voltage 1.5V, and a slow sample and hold time
+  (HamamatsuS1087ParP).
+
+The AdcReadClientC component and underlying machinery handles all of
+the arbitration and access to the ADC.
+
+::
+
+  tos/platforms/telosa/chips/s1087/HamamatsuS1087ParC.nc
+
+  // HIL for the HamamatsuS1087 analog photodiode sensor
+  generic configuration HamamatsuS1087ParC() {
+    provides interface Read<uint16_t>;
+    provides interface ReadStream<uint16_t>;
+    provides interface DeviceMetadata;
+  }
+  implementation {
+    // Create a new A/D client and connect it to the Hamamatsu S1087 A/D
+    // parameters
+    components new AdcReadClientC();
+    Read = AdcReadClientC;
+
+    components new AdcReadStreamClientC();
+    ReadStream = AdcReadStreamClientC;
+
+    components HamamatsuS1087ParP;
+    DeviceMetadata = HamamatsuS1087ParP;
+    AdcReadClientC.AdcConfigure -> HamamatsuS1087ParP;
+    AdcReadStreamClientC.AdcConfigure -> HamamatsuS1087ParP;
+  }
+  
+::
+
+  tos/platforms/telosa/chips/s1087/HamamatsuS1087ParP.nc
+
+  #include "Msp430Adc12.h"
+
+  // A/D parameters for the Hamamatsu - see the MSP430 A/D converter manual,
+  // Hamamatsu specification, Telos hardware schematic and TinyOS MSP430
+  // A/D converter component specifications for the explanation of these
+  // parameters
+  module HamamatsuS1087ParP {
+    provides interface AdcConfigure<const msp430adc12_channel_config_t*>;
+    provides interface DeviceMetadata;
+  }
+  implementation {
+    msp430adc12_channel_config_t config = {
+      inch: INPUT_CHANNEL_A4,
+      sref: REFERENCE_VREFplus_AVss,
+      ref2_5v: REFVOLT_LEVEL_1_5,
+      adc12ssel: SHT_SOURCE_ACLK,
+      adc12div: SHT_CLOCK_DIV_1,
+      sht: SAMPLE_HOLD_4_CYCLES,
+      sampcon_ssel: SAMPCON_SOURCE_SMCLK,
+      sampcon_id: SAMPCON_CLOCK_DIV_1
+    };
+ 
+    async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() {
+      return &config;
+    }
+
+    command uint8_t DeviceMetadata.getSignificantBits() { return 12; }
+  }
+
+2. Binary Pin-Connected Sensor
+------------------------------
+
+The Binary sensor gets a bit more complex, because it has three
+components: 
+
+* one to present the sensor (UserButtonC)
+
+* one to execute the driver logic (UserButtonLogicP)
+
+* one to select the appropriate hardware resources, such as MSP430
+  Port 27 (HplUserButtonC).
+
+Note that the presentation of this sensor is not arbitrated because
+none of the operations are split-phase. 
+
+::
+
+  tos/platforms/telosa/UserButtonC.nc
+
+  // HIL for the user button sensor on Telos-family motes
+  configuration UserButtonC {
+    provides interface Get<bool>; // Get button status
+    provides interface Notify<bool>; // Get button-press notifications
+    provides interface DeviceMetadata;
+  }
+  implementation {
+
+    // Simply connect the button logic to the button HPL
+    components UserButtonLogicP;
+    Get = UserButtonLogicP;
+    Notify = UserButtonLogicP;
+    DeviceMetadata = UserButtonLogicP;
+
+    components HplUserButtonC;
+    UserButtonLogicP.GpioInterrupt -> HplUserButtonC.GpioInterrupt;
+    UserButtonLogicP.GeneralIO -> HplUserButtonC.GeneralIO;
+  }
+
+::
+
+  tos/platforms/telosa/UserButtonLogicP.nc
+ 
+  // Transform the low-level (GeneralIO and GpioInterrupt) interface to the
+  // button to high-level SID interfaces  
+  module UserButtonLogicP {
+    provides interface Get<bool>;
+    provides interface Notify<bool>;
+    provides interface DeviceMetadata;
+
+    uses interface GeneralIO;
+    uses interface GpioInterrupt; 
+  }
+  implementation {
+    norace bool m_pinHigh;
+
+    task void sendEvent();
+ 
+    command bool Get.get() { return call GeneralIO.get(); }
+
+    command error_t Notify.enable() {
+      call GeneralIO.makeInput();
+
+      // If the pin is high, we need to trigger on falling edge interrupt, and
+      // vice-versa
+      if ( call GeneralIO.get() ) {
+        m_pinHigh = TRUE;
+        return call GpioInterrupt.enableFallingEdge();
+      } else {
+        m_pinHigh = FALSE;
+        return call GpioInterrupt.enableRisingEdge();
+      }
+    }
+
+    command error_t Notify.disable() {
+      return call GpioInterrupt.disable();
+    }
+
+    // Button changed, signal user (in a task) and update interrupt detection
+    async event void GpioInterrupt.fired() {
+      call GpioInterrupt.disable();
+
+      m_pinHigh = !m_pinHigh;
+
+      post sendEvent();
+    }
+
+    task void sendEvent() {
+      bool pinHigh;
+      pinHigh = m_pinHigh;
+    
+      signal Notify.notify( pinHigh );
+    
+      if ( pinHigh ) {
+        call GpioInterrupt.enableFallingEdge();
+      } else {
+        call GpioInterrupt.enableRisingEdge();
+      }
+    }
+
+    command uint8_t DeviceMetadata.getSignificantBits() { return 1; }
+  }
+
+::
+
+  tos/platforms/telosa/HplUserButtonC.nc
+
+  // HPL for the user button sensor on Telos-family motes - just provides
+  // access to the I/O and interrupt control for the pin to which the
+  // button is connected
+  configuration HplUserButtonC {
+    provides interface GeneralIO;
+    provides interface GpioInterrupt;
+  }
+  implementation {
+
+    components HplMsp430GeneralIOC as GeneralIOC;
+
+    components new Msp430GpioC() as UserButtonC;
+    UserButtonC -> GeneralIOC.Port27;
+    GeneralIO = UserButtonC;
+
+    components HplMsp430InterruptC as InterruptC;
+
+    components new Msp430InterruptC() as InterruptUserButtonC;
+    InterruptUserButtonC.HplInterrupt -> InterruptC.Port27;
+    GpioInterrupt = InterruptUserButtonC.Interrupt;
+  }
+
+3. Digital Bus-Connected Sensor
+-------------------------------
+
+The Digital sensor is the most complex out of the set, and includes
+six components:
+
+* one to present the sensor (SensirionSht11C)
+
+* one to request arbitrated access and to transform the sensor HAL
+  into the sensor HIL (SensirionSht11P)
+
+* one to present the sensor HAL (HalSensirionSht11C)
+
+* one to perform the driver logic needed to support the HAL, which
+  twiddles pins according to a sensor-specific protocol
+  (SensirionSht11LogicP).
+
+* one to select the appropriate hardware resources, such as the clock,
+  data, and power pins, and to provide an arbiter for the sensor
+  (HplSensirionSht11C).
+
+* one to perform the power control logic needed to support the power
+  manager associated with the arbiter (HplSensirionSht11P).
+
+This bus-connected sensor is overly complex because it does not rely
+on a shared framework of bus manipulation components. A sensor built
+on top of the I2C or SPI bus would likely require fewer components.
+
+::
+
+  tos/platforms/telosa/chips/sht11/SensirionSht11C.nc
+  
+  // HIL interface to Sensirion SHT11 temperature and humidity sensor
+  generic configuration SensirionSht11C() {  
+    provides interface Read<uint16_t> as Temperature;
+    provides interface DeviceMetadata as TemperatureDeviceMetadata;
+    provides interface Read<uint16_t> as Humidity;
+    provides interface DeviceMetadata as HumidityDeviceMetadata;
+  }
+  implementation {
+    // Instantiate the module providing the HIL interfaces
+    components new SensirionSht11ReaderP();
+  
+    Temperature = SensirionSht11ReaderP.Temperature;
+    TemperatureDeviceMetadata = SensirionSht11ReaderP.TemperatureDeviceMetadata;
+    Humidity = SensirionSht11ReaderP.Humidity;
+    HumidityDeviceMetadata = SensirionSht11ReaderP.HumidityDeviceMetadata;
+
+    // And connect it to the HAL component for the Sensirion SHT11
+    components HalSensirionSht11C;
+  
+    enum { TEMP_KEY = unique("Sht11.Resource") };
+    enum { HUM_KEY = unique("Sht11.Resource") };
+  
+    SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ];
+    SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
+    SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ];
+    SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ];
+  }
+  
+::
+  
+  tos/chips/sht11/SensirionSht11ReaderP.nc
+  
+  // Convert Sensirion SHT11 HAL to HIL interfaces for a single
+  // client, performing automatic resource arbitration
+  generic module SensirionSht11ReaderP() {
+    provides interface Read<uint16_t> as Temperature;
+    provides interface DeviceMetadata as TemperatureDeviceMetadata;
+    provides interface Read<uint16_t> as Humidity;
+    provides interface DeviceMetadata as HumidityDeviceMetadata;
+    
+    // Using separate resource interfaces for temperature and humidity allows
+    // temperature and humidity measurements to be requested simultaneously
+    // (if a single Resource interface was used, a request for temperature would
+    // prevent any humidity requests until the temperature measurement was complete) 
+    uses interface Resource as TempResource;
+    uses interface Resource as HumResource;
+    uses interface SensirionSht11 as Sht11Temp;
+    uses interface SensirionSht11 as Sht11Hum;
+  }
+  implementation {
+    command error_t Temperature.read() {
+      // Start by requesting access to the SHT11
+      return call TempResource.request();
+    }
+  
+    event void TempResource.granted() {
+      error_t result;
+      // If the HAL measurement fails, release the SHT11 and signal failure
+      if ((result = call Sht11Temp.measureTemperature()) != SUCCESS) {
+        call TempResource.release();
+        signal Temperature.readDone( result, 0 );
+      }
+    }
+  
+    event void Sht11Temp.measureTemperatureDone( error_t result, uint16_t val ) {
+      // Release the SHT11 and signal the result
+      call TempResource.release();
+      signal Temperature.readDone( result, val );
+    }
+
+    command uint8_t TemperatureDeviceMetadata.getSignificantBits() { return 14; }
+
+    command error_t Humidity.read() {
+      // Start by requesting access to the SHT11
+      return call HumResource.request();
+    }
+  
+    event void HumResource.granted() {
+      error_t result;
+      // If the HAL measurement fails, release the SHT11 and signal failure
+      if ((result = call Sht11Hum.measureHumidity()) != SUCCESS) {
+        call HumResource.release();
+        signal Humidity.readDone( result, 0 );
+      }
+    }
+  
+    event void Sht11Hum.measureHumidityDone( error_t result, uint16_t val ) {
+      // Release the SHT11 and signal the result
+      call HumResource.release();
+      signal Humidity.readDone( result, val );
+    }
+  
+    command uint8_t HumidityDeviceMetadata.getSignificantBits() { return 12; }
+
+    // Dummy handlers for unused portions of the HAL interface
+    event void Sht11Temp.resetDone( error_t result ) { }
+    event void Sht11Temp.measureHumidityDone( error_t result, uint16_t val ) { }
+    event void Sht11Temp.readStatusRegDone( error_t result, uint8_t val ) { }
+    event void Sht11Temp.writeStatusRegDone( error_t result ) { }
+  
+    event void Sht11Hum.resetDone( error_t result ) { }
+    event void Sht11Hum.measureTemperatureDone( error_t result, uint16_t val ) { }
+    event void Sht11Hum.readStatusRegDone( error_t result, uint8_t val ) { }
+    event void Sht11Hum.writeStatusRegDone( error_t result ) { }
+  
+    // We need default handlers as a client may wire to only the Temperature
+    // sensor or only the Humidity sensor
+    default event void Temperature.readDone( error_t result, uint16_t val ) { }
+    default event void Humidity.readDone( error_t result, uint16_t val ) { }
+  }
+  
+::
+  
+  tos/platforms/telosa/chips/sht11/HalSensirionSht11C.nc
+  
+  // HAL interface to Sensirion SHT11 temperature and humidity sensor
+  configuration HalSensirionSht11C {
+    // The SHT11 HAL uses resource arbitration to allow the sensor to shared
+    // between multiple clients and for automatic power management (the SHT11
+    // is switched off when no clients are waiting to use it)
+    provides interface Resource[ uint8_t client ];
+    provides interface SensirionSht11[ uint8_t client ];
+  }
+  implementation {
+    // The HAL implementation logic
+    components new SensirionSht11LogicP();
+    SensirionSht11 = SensirionSht11LogicP;
+  
+    // And it's wiring to the SHT11 HPL - the actual resource management is
+    // provided at the HPL layer
+    components HplSensirionSht11C;
+    Resource = HplSensirionSht11C.Resource;
+    SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA;
+    SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
+    SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;
+    
+    components new TimerMilliC();
+    SensirionSht11LogicP.Timer -> TimerMilliC;
+  
+    components LedsC;
+    SensirionSht11LogicP.Leds -> LedsC;
+  }
+  
+::
+  
+  tos/chips/sht11/SensirionSht11LogicP.nc
+  
+  generic module SensirionSht11LogicP() {
+    provides interface SensirionSht11[ uint8_t client ];
+  
+    uses interface GeneralIO as DATA;
+    uses interface GeneralIO as CLOCK;
+    uses interface GpioInterrupt as InterruptDATA;
+  
+    uses interface Timer<TMilli>;
+  
+    uses interface Leds;
+  }
+  implementation {
+  
+    ... bus protocol details omitted for brevity ...
+  
+  }
+  
+::
+  
+  tos/platforms/telosa/chips/sht11/HplSensirionSht11C.nc
+
+  // Low-level, platform-specific glue-code to access the SHT11 sensor found
+  // on telos-family motes - here  the HPL just provides resource management
+  // and access to the SHT11 data, clock and interrupt pins
+  configuration HplSensirionSht11C {
+    provides interface Resource[ uint8_t id ];
+    provides interface GeneralIO as DATA;
+    provides interface GeneralIO as SCK;
+    provides interface GpioInterrupt as InterruptDATA;
+  }
+  implementation {
+    // Pins used to access the SHT11
+    components HplMsp430GeneralIOC;
+    
+    components new Msp430GpioC() as DATAM;
+    DATAM -> HplMsp430GeneralIOC.Port15;
+    DATA = DATAM;
+  
+    components new Msp430GpioC() as SCKM;
+    SCKM -> HplMsp430GeneralIOC.Port16;
+    SCK = SCKM;
+  
+    components new Msp430GpioC() as PWRM;
+    PWRM -> HplMsp430GeneralIOC.Port17;
+  
+    // HPL logic for switching the SHT11 on and off
+    components HplSensirionSht11P;
+    HplSensirionSht11P.PWR -> PWRM;
+    HplSensirionSht11P.DATA -> DATAM;
+    HplSensirionSht11P.SCK -> SCKM;
+  
+    components new TimerMilliC();
+    HplSensirionSht11P.Timer -> TimerMilliC;
+  
+    components HplMsp430InterruptC;
+    components new Msp430InterruptC() as InterruptDATAC;
+    InterruptDATAC.HplInterrupt -> HplMsp430InterruptC.Port15;
+    InterruptDATA = InterruptDATAC.Interrupt;
+  
+    // The arbiter and power manager for the SHT11
+    components new FcfsArbiterC( "Sht11.Resource" ) as Arbiter;
+    Resource = Arbiter;
+    
+    components new SplitControlPowerManagerC();
+    SplitControlPowerManagerC.SplitControl -> HplSensirionSht11P;
+    SplitControlPowerManagerC.ArbiterInit -> Arbiter.Init;
+    SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
+    SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
+  }
+  
+::
+  
+  tos/platforms/telosa/chips/sht11/HplSensirionSht11P.nc
+  
+  // Switch the SHT11 on and off, and handle the 11ms warmup delay
+  module HplSensirionSht11P {
+    // The SplitControl interface powers the SHT11 on or off (it's automatically
+    // called by the SHT11 power manager, see HplSensirionSht11C)
+    // We use a SplitControl interface as we need to wait 11ms for the sensor to
+    // warm up
+    provides interface SplitControl;
+    uses interface Timer<TMilli>;
+    uses interface GeneralIO as PWR;
+    uses interface GeneralIO as DATA;
+    uses interface GeneralIO as SCK;
+  }
+  implementation {
+    task void stopTask();
+  
+    command error_t SplitControl.start() {
+      // Power SHT11 on and wait for 11ms
+      call PWR.makeOutput();
+      call PWR.set();
+      call Timer.startOneShot( 11 );
+      return SUCCESS;
+    }
+    
+    event void Timer.fired() {
+      signal SplitControl.startDone( SUCCESS );
+    }
+  
+    command error_t SplitControl.stop() {
+      // Power the SHT11 off
+      call SCK.makeInput();
+      call SCK.clr();
+      call DATA.makeInput();
+      call DATA.clr();
+      call PWR.clr();
+      post stopTask();
+      return SUCCESS;
+    }
+  
+    task void stopTask() {
+      signal SplitControl.stopDone( SUCCESS );
+    }
+  }
+
+4. MDA100 Sensor Board Directory Organization
+---------------------------------------------
+
+Here we show the organization of the sensor board directory for the
+mica-family Xbow MDA100CA and MDA100CB sensor boards, which have
+temperature and light sensors. It is found in
+``tos/sensorboards/mda100``::
+
+  ./tos/sensorboards/mda100:
+  .sensor					# Compiler configuration
+  ArbitratedPhotoDeviceP.nc			# Light sensor support component
+  ArbitratedTempDeviceP.nc			# Temperature sensor support component
+  DemoSensorC.nc				# Override TinyOS's default sensor
+  PhotoC.nc					# Light sensor HIL
+  PhotoImplP.nc					# Light sensor support component
+  PhotoTempConfigC.nc				# Shared support component
+  PhotoTempConfigP.nc				# Shared support component
+  SharedAnalogDeviceC.nc			# Shared support component
+  SharedAnalogDeviceP.nc			# Shared support component
+  TempC.nc					# Temperature Sensor HIL
+  ca/TempImplP.nc				# Temperature sensor support component
+  						# (MDA100CA board)
+  cb/TempImplP.nc				# Temperature sensor support component
+  						# (MDA100CB board)
+  mda100.h					# Header file for mda100
+
+This sensor board provides only a HIL (PhotoC and TempC components), and overrides the
+TinyOS demo sensor (DemoSensorC). The demo sensor is an alias for PhotoC.
+
+The two forms of the mda100 differ only by the wiring of the
+temperature sensor.  The user has to specify which form of the sensor
+board is in use by providing a ``-I%T/sensorboards/mda100/ca`` or
+``-I%T/sensorboards/mda100/cb`` compiler option.
+
+This sensor board relies on a platform-provided ``MicaBusC`` component
+that specifies how the mica-family sensor board bus is connected to
+the microcontroller.
diff --git a/doc/txt/tep110.txt b/doc/txt/tep110.txt
new file mode 100644
index 00000000..16287a3a
--- /dev/null
+++ b/doc/txt/tep110.txt
@@ -0,0 +1,524 @@
+============================
+Virtualization
+============================
+
+:TEP: 110
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Philip Levis
+
+:Draft-Created: 20-Jun-2005
+:Draft-Version: $Revision: 1.5 $
+:Draft-Modified: $Date: 2006-12-12 18:22:54 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo desribes how TinyOS 2.0 virtualizes common abstractions through
+a combination of static allocation and runtime arbitration. It describes
+the benefits and tradeoffs of this approach and how it is used in several
+major abstractions.
+
+1. Introduction
+====================================================================
+
+The TinyOS component model allows flexible composition, but that
+flexibility is often limited by reasons which are not explicitly
+stated in components. These implicit assumptions can manifest as buggy
+behavior. In TinyOS 1.x, on the Telos platform, if a program
+simultaneously initializes non-volatile storage and the radio, one of
+them will fail: a program has to initialize them serially. They can
+also manifest as compile-time errors: if two separate communication
+services happen to receive packets of the same AM type, the nesC
+compiler will issue a warning due to the buffer swap semantics.
+
+On one hand, the flexbility components provide allows expert users to
+build complex and intricate applications. On the other, it can make
+managing complexity and intricacy very difficult when building very
+simple and basic applications. To promote this latter class of
+development, TinyOS 2.x has the notion of "distributions," which are
+collections of system abstractions that are designed to be used
+together. As long as a user implements an application in terms of the
+distribution, the underlying components will operate correctly and
+there will be no unforseen failures.
+
+This memo documents an example distribution, named OSKI (Operating
+System Key Interfaces). It describes the services OSKI provides and
+how their implementations are structured to simplify application
+writing.
+
+
+2. Distributions
+====================================================================
+
+A distribution presents *services* to the programmer. A service is a
+set of generic (instantiable) components that represent API
+abstractions. To use an abstraction, a programmer instantiates the
+generic. For example, OSKI has the ``AMSenderC`` abstraction for
+sending active messages. The AMSender generic component takes a single
+parameter, the AM type. For example, if a programmer wants a component
+named AppM to send active messages of type 32, the configuration would
+look something like this:
+
+| configuration AppC {}
+| implementation {
+|   components AppM, new AMSenderC(32);
+|   AppM.AMSend -> AMSenderC;
+| }
+
+Services often present abstractions at a fine grain. For example, the
+active message service has AMSender, AMReceiver, and AMSnooper, each
+of which is a separate abstraction.
+
+2.1 Controlling a Service
+--------------------------------------------------------------------
+
+Every service has two abstractions: ``ServiceC``, for powering it on
+and off, and ``ServiceNotifierC``, for learning when the service's
+power state has changed. For example, active messages have the
+``AMServiceC`` and ``AMServiceNotifierC`` abstractions. A service
+abstraction provides the ``Service`` interface
+
+| interface Service {
+|   command void start();
+|   command void stop();
+|   command bool isRunning();
+| }
+
+while a notifier abstraction provides the ``ServiceNotify`` interface
+
+| interface ServiceNotify {
+|   event void started();
+|   event void stopped();
+| }
+
+For example, if a routing layer wants to be able to turn the active
+message layer on and off, then it needs to instantiate an AMServiceC.
+However, many components may be using active messages and have their
+own instances of AMServiceC; while routing might consider it
+acceptable to turn off active messages, other components might
+not. Therefore, a service abstraction does not necessarily represent
+explicit control; instead, each service has a *policy* for how it
+deals with control requests. When a service changes its activity
+state, it MUST signal all instances of its ServiceNotifierC.
+
+For example, the active messages service has an "OR" policy; the
+service remains active if *any* of its ServiceC instances are in the
+on state, and goes inactive if and only if *all* of its ServiceC
+instances are in the off state. This is an example timeline for
+active messages being used by two components, RouterA and RouterB:
+
+1. System boots: active messages are off.
+2. RouterA calls ``Service.start()``. The AM layer is turned on.
+3. All AMServiceNotifierC abstractions signal ``ServiceNotify.started().``
+4. RouterB calls ``Service.start()``.
+5. RouterA calls ``Service.stop()``. RouterB is still using active messages, so the layer stays on.
+6. RouterB calls ``Service.stop()``. The AM layer is turned off.
+7. All AMServiceNotifierC abstractions signal ``ServiceNotify.stopped().``
+
+By default, a service that has a control interface MUST be off. For an
+application to use the service, at least one component has to call
+``Service.start()``.
+
+2.2 Service Initialization
+--------------------------------------------------------------------
+
+Because distributions are collections of services that are designed to
+work together, they can avoid many of the common issues that arise
+when composing TinyOS programs. For example, user code does not have
+to initialize a service; this is done automatically by the
+distribution.  If a user component instantiates a service abstraction,
+the distribution MUST make sure that the service is properly
+initialized. Section 4 goes into an example implementation of how a
+distribution can achieve this.
+
+
+3. OSKI Services
+====================================================================
+
+This section briefly describes the services that OSKI, an example
+distribution provides. It is intended to give a feel for how a
+distribution presents its abstractions. 
+
+3.1 Timers
+--------------------------------------------------------------------
+
+OSKI provides timers at one fidelity: milliseconds. Timers do not have
+a Service abstraction, as their use implicitly defines whether the
+service is active or not (the timer service is off if there are no
+pending timers).  The ``OSKITimerMsC`` component provides the
+abstraction: it provides a single interface, ``Timer<TMilli>``.
+
+This is an example code snippet for instantiating a timer in a
+configuration:
+
+| configuration ExampleC {
+|   uses interface Timer<TMilli>;
+| }
+|
+| configuration TimerExample {}
+| implementation {
+|   components ExampleC, new OSKITimerMsC() as T;
+|   ExampleC.Timer -> T;
+| }
+
+
+3.2 Active Messages
+--------------------------------------------------------------------
+
+OSKI provides four functional active messaging abstractions:
+``AMSender``, ``AMReceiver``, ``AMSnooper``, and
+``AMSnoopingReceiver``. Each one takes an ``am_id_t`` as a parameter,
+indicating the AM type. Following the general TinyOS 2.x approach to
+networking, all active message abstractions provide the ``Packet`` and
+``AMPacket`` interfaces.
+
+AMSender
+  This abstraction is for sending active messages. In addition to Packet
+  and AMPacket, it provides the AMSend interface.
+AMReceiver
+  This abstraction is for receiving active messages addressed to the
+  node or to the broadcast address. In addition to Packet and AMPacket,
+  it provides the Receive interface.
+AMSnooper
+  This abstraction is for receiving active messages addressed to other
+  nodes ("snooping" on traffic). In addition to Packet and AMPacket,
+  it provides the Receive interface.
+AMSnoopingReceiver
+  A union of the functionality of AMReceiver and AMSnooper, this
+  abstraction allows a component to receive *all* active messages
+  that it hears. The AMPacket interface allows a component to determine
+  whether such a message is destined for it. In addition to
+  Packet and AMPacket, this component provides the Receive interface.
+
+This snippet of code is an example of a configuration that composes a
+routing layer with needed active message abstractions. This
+implementation snoops on data packets sent by other nodes to improve
+its topology formation:
+
+| configuration RouterC {
+|   uses interface AMSend as DataSend;
+|   uses interface AMSend as ControlSend;
+|   uses interface Receive as DataReceive;
+|   uses interface Receive as BeaconReceive;
+| }
+|
+| configuration RoutingExample {
+|   components RouterC;
+|   components new AMSender(5) as CSender;
+|   components new AMSender(6) as DSender;
+|   components new AMReceiver(5) as CReceiver;
+|   components new AMSnoopingReceiver(6) as DReceiver;
+|
+|   RouterC.DataSend -> DSender;
+|   RouterC.ControlSend -> CSender;
+|   RouterC.DataReceive -> DReceiver;
+|   RouterC.ControlReceive -> CReceiver;
+| }
+
+The active messages layer has control abstractions, named ``AMServiceC``
+and ``AMServiceNotifierC``. Active messages follow an OR policy.
+
+
+3.3 Broadcasts
+--------------------------------------------------------------------
+
+In addition to active messages, OSKI provides a broadcasting service.
+Unlike active messages, which are addressed in terms of AM addresses,
+broadcasts are address-free. Broadcast communication has two
+abstractions: ``BroadcastSenderC`` and ``BroadcastReceiverC``, both of
+which take a parameter, a broadcast message type. This parameter is
+similar to the AM type in active messages. Both abstractions provide
+the Packet interface. The broadcast service has control abstractions,
+named ``BroadcastServiceC`` and ``BroadcastServiceNotifierC``, which
+follow an OR policy.
+
+3.4 Tree Collection/Convergecast
+--------------------------------------------------------------------
+
+**NOTE: These services are not supported as of the 2.x prerelease. 
+They will be supported by the first full release.**
+
+OSKI's third communication service is tree-based collection routing.
+This service has four abstractions:
+
+CollectionSenderC
+  This abstraction is for sending packets up the collection tree,
+  to the collection root. It provides the Send and Packet interfaces. 
+
+CollectionReceiverC
+  This abstraction is for a collection end-point (a tree root). It
+  provides the Receive, Packet, and CollectionPacket interfaces.
+
+CollectionInterceptorC
+  This abstraction represents a node's ability to view and possibly
+  suppress packets it has received for forwarding. It provides
+  the Intercept, CollectionPacket, and Packet interfaces.
+
+CollectionSnooperC
+  This abstraction allows a node to overhear routing packets
+  sent to other nodes to forward. It provides the Receive,
+  CollectionPacket, and Packet interfaces.
+
+All of the collection routing communication abstractions take a
+parameter, similar to active messages and broadcasts, so multiple
+components can independelty use collection routing. In addition to
+communication, collection routing has an additional abstraction:
+
+CollectionControlC
+  This abstraction controls whether a node is a collection root
+  or not.
+
+Finally, collection routing has ``CollectionServiceC`` and
+``CollectionServiceNotifierC`` abstractions, which follow an OR
+policy.
+
+
+3.5 UART
+--------------------------------------------------------------------
+
+**NOTE: These services are not supported as of the 2.x prerelease. 
+They will be supported by the first full release. 
+They will be fully defined pending discussion/codification of 
+UART interfaces.** 
+
+4. OSKI Service Structure and Design
+====================================================================
+
+Presenting services through abstractions hides the underlying wiring
+details and gives a distribution a great deal of implementation
+freedom. One issue that arises, however, is initialization. If a user
+component instantiates a service, then a distribution MUST make sure
+the service is initialized properly. OSKI achieves this by
+encapsulating a complete service as a working component; abstractions
+export the service's interfaces.
+
+4.1 Example: Timers
+--------------------------------------------------------------------
+
+For example, the timer service provides a single abstraction,
+OskiTimerMilliC, which is a generic component. OskiTimerMilliC provides a
+single instance of the Timer<TMilli> interface. It is implemented as a
+wrapper around the underlying timer service, a component named
+``TimerMilliImplP``, which provides a parameterized interface and
+follows the Service Instance design pattern[sipattern]_:
+
+| generic configuration OskiTimerMilliC() {
+|   provides interface Timer<TMilli>;
+| }
+| implementation {
+|   components TimerMilliImplP;
+|   Timer = TimerMilliImplP.TimerMilli[unique("TimerMilliC.TimerMilli")];
+| }
+
+TimerMilliImplP is a fully composed and working service. It takes
+a platform's timer implementation and makes sure it is initialized through
+the TinyOS boot sequence[boot]_:
+
+| configuration TimerMilliImplP {
+|   provides interface Timer<TMilli> as TimerMilli[uint8_t id];
+| }
+| implementation {
+|   components TimerMilliC, Main;
+|   Main.SoftwareInit -> TimerMilliC;
+|   TimerMilli = TimerMilliC;
+| }
+
+This composition means that if any component instantiates a timer,
+then TimerMilliImplP will be included in the component graph. If
+TimerMilliImplP is included, the TimerMilliP (the actual platform HIL
+implementation) will be properly initialized at system boot time. In
+this case, the order of initialization isn't important; in cases where
+there are services that have to be initialized in a particular
+sequence to ensure proper ordering, the Impl components can
+orchestrate that order. For example, a distribution can wire
+Main.SoftwareInit to a DistributionInit component, which calls
+sub-Inits in a certain order; when a service is included, it wires
+itself to one of the sub-Inits.
+
+The user does not have to worry about unique strings to manage the
+underlying Service Instance pattern: the abstractions take care of
+that.
+
+
+4.2 Example: Active Messages
+--------------------------------------------------------------------
+
+Active messaging reprsent a slightly more complex service, as it has
+several abstractions and a control interface. However, it follows the
+same basic pattern: abstractions are generics that export wirings to
+the underlying service, named ``ActiveMessageImplP``:
+
+| configuration ActiveMessageImplP {
+|   provides {
+|     interface SplitControl;      
+|     interface AMSend[am_id_t id];
+|     interface Receive[am_id_t id];
+|     interface Receive as Snoop[am_id_t id];
+|     interface Packet;
+|     interface AMPacket;
+|   }
+| }
+| 
+| implementation {
+|   components ActiveMessageC, Main;
+| 
+|   Main.SoftwareInit -> ActiveMessageC;
+| 
+|   SplitControl = ActiveMessageC;
+|   AMSend = ActiveMessageC;
+|   Receive = ActiveMessageC.Receive;
+|   Snoop = ActiveMessageC.Snoop;
+|   Packet = ActiveMessageC;
+|   AMPacket = ActiveMessageC;
+| }
+
+For example, this is the AMSender abstraction:
+
+| generic configuration AMSenderC(am_id_t AMId) {
+|   provides {
+|     interface AMSend;
+|     interface Packet;
+|     interface AMPacket;
+|   }
+| }
+| 
+| implementation {
+|   components ActiveMessageImplP as Impl;
+| 
+|   AMSend = Impl.AMSend[AMId];
+|   Packet = Impl;
+|   AMPacket = Impl;
+| }
+
+AMReceiver is similar, except that it wires to the Receive interface,
+while AMSnooper wires to the Snoop interface, and AMSnoopingReceiver
+provides a single Receive that exports both Snoop and Receive (the
+unidirectional nature of the Receive interface makes this simple to
+achieve, as it represents only fan-in and no fan-out).
+
+ActiveMessageImplP does not provide a Service interface; it provides
+the SplitControl interface of the underlying active message
+layer. OSKI layers a *ServiceController* on top of SplitControl. As
+the active message service follows an OR policy, OSKI uses a
+``ServiceOrControllerM``, which is a generic component with the
+following signature:
+
+| generic module ServiceOrControllerM(char strID[]) {
+|   provides {
+|     interface Service[uint8_t id];
+|     interface ServiceNotify;
+|   }
+|   uses {
+|     interface SplitControl;
+|   }
+| }
+
+ServiceOrControllerM follows the Service Instance pattern[sipattern];
+it calls its underlying SplitControl based on the state of each of its
+instances of the Service interface. The parameter denotes the string
+used to generate the unique service IDs. The active messages service
+controller implementation, AMServiceImplP, instantiates a
+ServiceOrControllerM, wires it to ActiveMessageImplP:
+
+| configuration AMServiceImplP {
+|   provides interface Service[uint8_t id];
+|   provides interface ServiceNotify;
+| }
+| implementation {
+|   components ActiveMessageImplP;
+|   components new ServiceOrControllerM("AMServiceImplP.Service");
+|   
+|   Service = ServiceOrControllerM;
+|   ServiceOrControllerM.SplitControl -> ActiveMessageImplP;
+|   ServiceNotify = ServiceOrControllerM;
+| }
+
+AMServiceC then provides an instance of AMServiceImplP.Service:
+
+| generic configuration AMServiceC() {
+|   provides interface Service;
+| }
+|
+| implementation {
+|   components AMServiceImplP;
+| 
+|   Service = AMServiceImplP.Service[unique("AMServiceImplP.Service")];
+| }
+
+Note that the two strings are the same, so that the uniqueCount() in
+the ServiceOrControllerM is correct based on the number of instances
+of AMServiceC. As with timers, encapsulating the service instance
+pattern in generic components relieves the programmer of having to
+deal with unique strings, a common source of bugs in TinyOS 1.x code.
+
+
+4.3 OSKI Requirements
+--------------------------------------------------------------------
+
+OSKI is a layer on top of system components: it presents a more
+usable, less error-prone, and simpler interface to common TinyOS
+functionality. For OSKI to work properly, a platform MUST be compliant
+with the following TEPs:
+
+  o TEP 102: Timers
+  o TEP 106: Schedulers and Tasks
+  o TEP 107: TinyOS 2.x Boot Sequence
+  o TEP 1XX: Active Messages
+  o TEP 1XX: Collection Routing
+
+Not following some of these TEPS MAY lead to OSKI services being
+inoperable, exhibit strange behavior, or being uncompilable.
+
+5. Distribution Interfaces
+====================================================================
+
+The basic notion of a distribution is that it provides a self-contained,
+tested, and complete (for an application domain) programming interface 
+to TinyOS. Layers can be added on top of a distribution, but as a 
+distribution is a self-contained set of abstractions, adding new
+services can lead to failures. A distribution represents a hard line
+above which all other code operates. One SHOULD NOT add new services,
+as they can disrupt the underlying organization. Of course, one MAY
+create a new distribution that extends an existing one, but this is
+in and of itself a new distribution.
+
+Generally, as distributions are intended to be higher-level abstractions,
+they SHOULD NOT provide any asynchronous (async) events. They can, 
+of course, provide async commands. The idea is that no code written on
+top of a distribution should be asynchronous, due to the complexity
+introduced by having to manage concurrency. Distributions are usually
+platform independent; if an application needs async events, then
+chances are it is operating close to the hardware, and so is not
+platform independent.
+
+6. Author's Address
+====================================================================
+
+| Philip Levis
+| 467 Soda Hall
+| UC Berkeley
+| Berkeley, CA 94720
+|
+| phone - +1 510 290 5283
+|
+| email - pal@cs.berkeley.edu
+
+7. Citations
+====================================================================
+
+.. [rst] reStructuredText Markup Specification. <http://docutils.sourceforge.net/docs/ref/rst/restructuredtext.html>
+ 
+.. [sipattern] The Service Instance Pattern. In *Software Design Patterns for TinyOS.* David Gay, Philip Levis, and David Culler. Published in Proceedings of the ACM SIGPLAN/SIGBED 2005 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05).
+
+.. [boot] TEP 107: TinyOS 2.x Boot Sequence.
diff --git a/doc/txt/tep111.txt b/doc/txt/tep111.txt
new file mode 100644
index 00000000..cf32dc5f
--- /dev/null
+++ b/doc/txt/tep111.txt
@@ -0,0 +1,473 @@
+============================
+message_t
+============================
+
+:TEP: 111
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: Philip Levis
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo covers the TinyOS 2.x message buffer abstraction, ``message_t``.
+It describes the message buffer design considerations, how and where 
+``message_t`` is specified, and how data link layers should access it.
+The major goal of ``message_t`` is to allow datagrams to be passed between
+different link layers as a contiguous region of memory with zero copies.
+
+1. Introduction
+====================================================================
+
+In TinyOS 1.x, a message buffer is a ``TOS_Msg``. A buffer contains an
+active message (AM) packet as well as packet metadata, such as timestamps,
+acknowledgement bits, and signal strength if the packet was received.
+``TOS_Msg`` is a fixed size structure whose size is defined by the maximum
+AM payload length (the default is 29 bytes). Fixed sized buffers allows
+TinyOS 1.x to have zero-copy semantics: when a component receives a
+buffer, rather than copy out the contents it can return a pointer
+to a new buffer for the underlying layer to use for the next received 
+packet.
+
+One issue that arises is what defines the ``TOS_Msg`` structure, as different
+link layers may require different layouts. For example, 802.15.4 radio 
+hardware (such as the CC2420, used in the Telos and micaZ platforms) 
+may require 802.15.4 headers, while a software stack built on top of
+byte radios (such as the CC1000, used in the mica2 platform) can specify 
+its own packet format. This means that ``TOS_Msg`` may be different on
+different platforms.
+
+The solution to this problem in TinyOS 1.x is for there to be a standard
+definition of ``TOS_Msg``, which a platform (e.g., the micaZ) can
+redefine to match its radio. For example, a mica2 mote uses the standard 
+definition, which is::
+
+  typedef struct TOS_Msg {
+    // The following fields are transmitted/received on the radio.
+    uint16_t addr;
+    uint8_t type;
+    uint8_t group;
+    uint8_t length;
+    int8_t data[TOSH_DATA_LENGTH];
+    uint16_t crc;
+
+    // The following fields are not actually transmitted or received
+    // on the radio! They are used for internal accounting only.
+    // The reason they are in this structure is that the AM interface
+    // requires them to be part of the TOS_Msg that is passed to
+    // send/receive operations.
+    uint16_t strength;
+    uint8_t ack;
+    uint16_t time;
+    uint8_t sendSecurityMode;
+    uint8_t receiveSecurityMode;
+  } TOS_Msg;
+
+while on a mote with a CC2420 radio (e.g., micaZ), ``TOS_Msg`` is defined as::
+
+  typedef struct TOS_Msg {
+    // The following fields are transmitted/received on the radio.
+    uint8_t length;
+    uint8_t fcfhi;
+    uint8_t fcflo;
+    uint8_t dsn;
+    uint16_t destpan;
+    uint16_t addr;
+    uint8_t type;
+    uint8_t group;
+    int8_t data[TOSH_DATA_LENGTH];
+    
+    // The following fields are not actually transmitted or received
+    // on the radio! They are used for internal accounting only.
+    // The reason they are in this structure is that the AM interface
+    // requires them to be part of the TOS_Msg that is passed to
+    // send/receive operations.
+    
+    uint8_t strength;
+    uint8_t lqi;
+    bool crc;
+    uint8_t ack;
+    uint16_t time;
+   } TOS_Msg;
+
+There are two basic problems with this approach. First, exposing all of
+the link layer fields leads components to directly access the packet
+structure. This introduces dependencies between higher level components
+and the structure layout. For example, many network services built on
+top of data link layers care whether sent packets are acknowledged. They
+therefore check the ``ack`` field of ``TOS_Msg``. If a link layer does not 
+provide acknowledgements, it must still include the ``ack`` field
+and always set it to 0, wasting a byte of RAM per buffer.
+
+Second, this model does not easily support multiple data link layers.
+Radio chip implementations assume that the fields they require are 
+defined in the structure and directly access them. If a platform
+has two different link layers (e.g., a CC1000 *and* a CC2420 radio),
+then a ``TOS_Msg`` needs to allocate the right amount of space for both
+of their headers while allowing implementations to directly access
+header fields. This is very difficult to do in C.
+
+The ``data`` payload is especially problematic. Many
+components refer to this field, so it must be at a fixed offset
+from the beginning of the structure.
+Depending on the underlying link layer, the header fields 
+preceding it might have different lengths, and packet-level radios
+often require packets to be contiguous memory regions. Overall, these 
+complexities make specifying the format of ``TOS_Msg`` very difficult.
+
+TinyOS has traditionally used statically sized packet buffers,
+rather than more dynamic approaches, such as scatter-gather I/O
+in UNIX sockets (see the man page for ``recv(2)`` for details). 
+TinyOS 2.x continues this approach.
+
+2. message_t
+====================================================================
+
+In TinyOS 2.x, the standard message buffer is ``message_t``. The
+message_t structure is defined in ``tos/types/message.h``::
+
+  typedef nx_struct message_t {
+    nx_uint8_t header[sizeof(message_header_t)];
+    nx_uint8_t data[TOSH_DATA_LENGTH];
+    nx_uint8_t footer[sizeof(message_footer_t)];
+    nx_uint8_t metadata[sizeof(message_metadata_t)];
+  } message_t;
+
+This format keeps data at a fixed offset on a platform, which 
+is important when
+passing a message buffer between two different link layers. If the
+data payload were at different offsets for different link layers, then
+passing a packet between two link layers would require a ``memmove(3)``
+operation (essentially, a copy). Unlike in TinyOS 1.x, where TOS_Msg
+as explicitly an active messaging packet, message_t is a more general
+data-link buffer. In practice, most data-link layers in TinyOS 2.x 
+provide active messaging, but it is possible for a non-AM stack to 
+share message_t with AM stacks.
+
+The header, footer, and metadata formats are all opaque. Source code
+cannot access fields directly. Instead, data-link layers provide access
+to fields through nesC interfaces.  Section 3 discusses this in 
+greater depth.
+
+Every link layer defines its header, footer, and metadata
+structures. These structures MUST be external structs (``nx_struct``), 
+and all of their fields MUST be external types (``nx_*``), for two 
+reasons. First, external types ensure cross-platform compatibility [1]_.
+Second, it forces structures to be aligned on byte boundaries, 
+circumventing issues with the 
+alignment of packet buffers and field offsets within them. Metadata fields
+must be nx_structs for when complete packets are forwarded to the serial
+port in order to log traffic.
+For example, the CC1000 radio implementation defines
+its structures in ``CC1000Msg.h``::
+
+  typedef nx_struct cc1000_header {
+    nx_am_addr_t addr;
+    nx_uint8_t length;
+    nx_am_group_t group;
+    nx_am_id_t type;
+  } cc1000_header_t;
+
+  typedef nx_struct cc1000_footer {
+    nxle_uint16_t crc;
+  } cc1000_footer_t;
+
+  typedef nx_struct cc1000_metadata {
+    nx_uint16_t strength;
+    nx_uint8_t ack;
+    nx_uint16_t time;
+    nx_uint8_t sendSecurityMode;
+    nx_uint8_t receiveSecurityMode;
+  } cc1000_metadata_t;
+
+Each link layer defines its structures, but a **platform** is
+responsible for defining ``message_header_t``, ``message_footer_t``,
+and ``message_metadata_t``. This is because a platform may have
+multiple link layers, and so only it can resolve which structures are
+needed. These definitions MUST be in a file in a platform directory
+named ``platform_message.h``. The mica2 platform, for example, has
+two data link layers: the CC1000 radio and the TinyOS serial
+stack [2]_. The serial packet format does not have a footer
+or metadata section. The ``platform_message.h`` of the mica2
+looks like this::
+
+  typedef union message_header {
+    cc1000_header_t cc1k; 
+    serial_header_t serial;
+  } message_header_t;
+
+  typedef union message_footer {
+    cc1000_footer_t cc1k;
+  } message_footer_t;
+  
+  typedef union message_metadata {
+    cc1000_metadata cc1k;
+  } message_metadata_t;
+
+For a more complex example, consider a fictional platform named
+'megamica' that has both a CC1000 and a CC2420 radio. Its
+``platform_message.h`` would look like this::
+
+  typedef union mega_mica_header {
+    cc1000_header_t cc1k;
+    cc2420_header_t cc2420;
+    serial_header_t serial;
+  } message_header_t;
+
+  typedef union mega_mica_footer {
+    cc1000_footer_t cc1k;
+    cc2420_footer_t cc2420;
+  } message_footer_t;
+
+  typedef union mega_mica_metadata {
+    cc1000_metadata_t cc1k;
+    cc2420_metadata_t cc2420;
+  } message__metadata_t;
+ 
+If a platform has more than one link layer, it SHOULD define each of the
+message_t fields to be a union of the underlying link layer structures.
+This ensures that enough space is allocated for all underlying link layers.
+
+3. The message_t fields
+====================================================================
+
+TinyOS 2.x components treat packets as abstract data types (ADTs),
+rather than C structures, obtaining all of the traditional benefits
+of this approach. First and foremost, clients of a packet layer
+do not depend on particular field names or locations, allowing the
+implementations to choose packet formats and make a variety of
+optimizations.
+
+Components above the basic data-link layer MUST always access 
+packet fields through interfaces.  A component that introduces 
+new packet fields SHOULD provide an interface to those that 
+are of interest to other components. These interfaces SHOULD take
+the form of get/set operations that take and return values, rather
+than offsts into the structure.
+
+For example, active messages have an interface named ``AMPacket`` 
+which provides access commands to AM fields. In TinyOS 1.x, a 
+component would directly access ``TOS_Msg.addr``; in TinyOS 2.x, 
+a component calls ``AMPacket.getAddress(msg)``.
+The most basic of these interfaces is Packet, which provides
+access to a packet payload. TEP 116 describes common TinyOS 
+packet ADT interfaces [3]_. 
+
+Link layer components MAY access packet fields differently than other 
+components, as they are aware of the actual packet format. They can
+therefore implement the interfaces that provide access to the fields
+for other components.
+
+
+3.1 Headers
+----------------------------------------------------------------
+
+The message_t header field is an array of bytes whose size is 
+the size of a platform's union of data-link headers.
+Because radio stacks often prefer packets to be stored contiguously, 
+the layout of a packet in memory does not necessarily reflect the 
+layout of its nesC structure.
+
+A packet header MAY start somewhere besides the beginning of
+the message_t. For example, consider the Telos platform::
+
+  typedef union message_header {
+    cc2420_header_t cc2420;
+    serial_header_t serial;
+  } message_header_t;
+
+The CC2420 header is 11 bytes long, while the serial header is
+5 bytes long. The serial header ends at the beginning of the
+data payload, and so six padding bytes precede it. This figure
+shows the layout of message_t, a 12-byte CC2420 packet, and
+a 12-byte serial packet on the Telos platform::
+
+              11 bytes         TOSH_DATA_LENGTH        7 bytes
+            +-----------+-----------------------------+-------+
+  message_t |  header   |          data               | meta  |
+            +-----------+-----------------------------+-------+
+              
+            +-----------+------------+                +-------+
+  CC2420    |  header   |   data     |                | meta  |
+            +-----------+------------+                +-------+
+  
+                  +-----+------------+                   
+  Serial          | hdr |   data     |   
+                  +-----+------------+                 
+
+
+Neither the CC2420 nor the serial stack has packet footers, and
+the serial stack does not have any metadata. 
+
+The packet for a link layer does not necessarily start at the beginning
+of the message_t. Instead, it starts at a negative offset from the
+data field.  When a link layer component needs to read or write protocol 
+header fields, it MUST compute the location of the header as a negative 
+offset from the data field.  For example, the serial stack header has
+active message fields, such as the AM type. The command that returns
+the AM type, ``AMPacket.type()``, looks like this::
+
+  serial_header_t* getHeader(message_t* msg) {
+    return (serial_header_t*)(msg->data - sizeof(serial_header_t));
+  } 
+  command am_id_t AMPacket.type(message_t* msg) {
+    serial_header_t* hdr = getheader(msg); 
+    return hdr->type;
+  }
+
+
+Because calculating the negative offset is a little bit unwieldy, the
+serial stack uses the internal helper function getHeader(). Many
+single-hop stacks follow this approach, as it is very likely
+that nesC will inline the function, eliminating the possible overhead.
+In most cases, the C compiler also compiles the call into a simple
+memory offset load.
+
+The following code is incorrect, as it directly casts the header field.
+It is an example of what components MUST NOT do::
+
+  serial_header_t* getHeader(message_t* msg) {
+    return (serial_header_t*)(msg->header);
+  } 
+
+
+In the case of Telos, for example, this would result in a packet 
+layout that looks like this::
+
+              11 bytes         TOSH_DATA_LENGTH           7 bytes
+            +-----------+-----------------------------+-------+
+  message_t |  header   |          data               | meta  |
+            +-----------+-----------------------------+-------+
+  
+            +-----+     +------------+                   
+  Serial    | hdr |     |   data     |   
+            +-----+     +------------+                 
+
+3.2 Data
+----------------------------------------------------------------
+
+The data field of message_t stores the single-hop packet payload.
+It is TOSH_DATA_LENGTH bytes long. The default size is 28 bytes.
+A TinyOS application can redefine TOSH_DATA_LENGTH at compile time
+with a command-line option to ncc: ``-DTOSH_DATA_LENGTH=x``.
+Because this value can be reconfigured, it is possible that two
+different versions of an application can have different MTU sizes.
+If a packet layer receives a packet whose payload size is 
+longer than TOSH_DATA_LENGTH, it MUST discard the packet. As
+headers are right justified to the beginning of the data payload,
+the data payloads of all link layers on a platform start
+at the same fixed offset from the beginning of the message buffer.
+
+3.3 Footer
+----------------------------------------------------------------
+
+The message_footer_t field ensures that message_t has enough space to
+store the footers for all underlying link layers when there are
+MTU-sized packets. Like headers, footers are not necessarily stored
+where the C structs indicate they are: instead, their placement is
+implementation dependent. A single-hop layer MAY store the footer
+contiguously with the data region. For short packets, this can mean
+that the footer will actually be stored in the data field.
+
+3.4 Metadata
+----------------------------------------------------------------
+
+The metadata field of message_t stores data that 
+a single-hop stack uses or collects does not transmit. 
+This mechanism allows packet layers to store per-packet 
+information such as RSSI or timestamps. For example, this is
+the CC2420 metadata structure::
+
+  typedef nx_struct cc2420_metadata_t {
+    nx_uint8_t tx_power;
+    nx_uint8_t rssi;
+    nx_uint8_t lqi;
+    nx_bool crc;
+    nx_bool ack;
+    nx_uint16_t time;
+  } cc2420_metadata_t;
+
+3.5 Variable Sized Structures
+----------------------------------------------------------------
+
+The message_t structure is optimized for packets with fixed-size
+headers and footers. Variable-sized footers are generally easy
+to implement. Variable-sized headers are a bit more difficult.
+There are three general approaches that can be used.
+
+If the underlying link hardware is byte-based, the header can
+just be stored at the beginning of the message_t, giving it
+a known offset. There may be padding between the header and
+the data region, but assuming a byte-based send path this merely
+requires adjusting the index.
+
+If the underlying link hardware is packet-based, then the
+protocol stack can either include metadata (e.g., in the 
+metadata structure) stating where the header begins or it
+can place the header at a fixed position and use ``memmove(3)``
+on reception and transmit. In this latter case, on
+reception the packet is continguously read into the message_t
+beginning at the offset of the header structure. Once the
+packet is completely received, the header can be decoded,
+its length calculated, and the data region of the packet 
+can be moved to the ``data`` field. On transmission,
+the opposite occurs: the data region (and footer if need
+be) are moved to be contiguous with the header. Note that
+on completion of transmission, they need to be moved back.
+Alternatively, the radio stack can institute a single
+copy at the botttom layer.
+
+
+
+4. Implementation
+====================================================================
+
+The definition of message_t can be found in 
+``tinyos-2.x/tos/types/message.h``. 
+
+The definition of the CC2420
+message format can be found in ``tinyos-2.x/tos/chips/cc2420/CC2420.h``.
+
+The defintion of the CC1000 message format can be found in 
+``tinyos-2.x/tos/chips/cc1000/CC1000Msg.h``. 
+
+The definition
+of the standard serial stack packet format can be found in
+``tinyos-2.x/tos/lib/serial/Serial.h`` 
+
+The definition of
+the telos family packet format can be found in 
+``tinyos-2.x/tos/platform/telosa/platform_message.h`` and the micaz format can be found in
+``tinyos-2.x/tos/platforms/micaz/platform_message.h``.
+
+5. Author's Address
+====================================================================
+
+| Philip Levis
+| 358 Gates Hall
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+
+6. Citations
+====================================================================
+
+.. [1] `nesC: A Programming Language for Deeply Embedded Networks. <http://nescc.sourceforge.net>`_
+
+.. [2] TEP 113: Serial Communication.
+
+.. [3] TEP 116: Packet Protocols.
+
+
diff --git a/doc/txt/tep112.txt b/doc/txt/tep112.txt
new file mode 100644
index 00000000..a130052a
--- /dev/null
+++ b/doc/txt/tep112.txt
@@ -0,0 +1,371 @@
+====================================================================
+Microcontroller Power Management
+====================================================================
+
+:TEP: 112
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: Robert Szewczyk, Philip Levis, Martin Turon, Lama Nachman, Philip Buonadonna, Vlado Handziski
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents how TinyOS manages the lower power state of a
+microcontroller.
+
+
+1. Introduction
+====================================================================
+
+Microcontrollers often have several power states, with varying power
+draws, wakeup latencies, and peripheral support. The microcontroller
+should always be in the lowest possible power state that can satisfy
+application requirements. Determining this state accurately requires
+knowing a great deal about the power state of many subsystems and
+their peripherals. Additionally, state transitions are common. Every
+time a microcontroller handles an interrupt, it moves from a low power
+state to an active state, and whenever the TinyOS scheduler finds the
+task queue empty it returns the microcontroller to a low power state.
+TinyOS 2.x uses three mechanisms to decide what low power state it
+puts a microcontroller into: status and control registers, a dirty
+bit, and a power state override. This memo documents these mechanisms
+and how they work, as well as the basics of subsystem power
+management.
+
+
+2. Background
+====================================================================
+
+The TinyOS scheduler[2_] puts a processor into a sleep state when
+the task queue is empty. However, processors can have a spectrum of
+power states. For example, the MSP430 has one active mode (issuing
+instructions) and five low-power modes. The low power modes range from
+LPM0, which disables only the CPU and main system clock, to LPM4,
+which disables the CPU, all clocks, and the oscillator, expecting to
+be woken by an external interrupt source. The power draws of these low
+power modes can differ by a factor of 350 or more (75 uA for LPM0 at
+3V, 0.2 uA for LPM4). Correctly choosing the right microcontroller low
+power state can greatly increase system lifetime.
+
+TinyOS 1.x platforms manage MCU power in several different ways, but
+there are commonalities in the approaches. The mica platforms, for
+example, have a component named HPLPowerManagement, which has a
+commands for enabling and disabling low power modes, as well as a
+command (adjustPower()) to tell it to compute the low power state
+based on the configuration of its various control and status
+registers, storing the result in the Atmega128's MCU control
+register. When TinyOS tells the microcontroller to go to sleep, it
+uses the control register to decide exactly which power state to go
+into. In contrast, MSP430 based platforms such as Telos and eyes
+compute the low power state every time the scheduler tells the system
+to go to sleep.
+
+Each of the two approaches has benefits and drawbacks. The 1.x mica
+approach is efficient, in that it only calculates the low power state
+when told to. However, this leaves the decision of when to calculate
+the low power state to other components, which is an easy way to
+introduce bugs. The lack of a well-defined hardware abstraction
+architecture in 1.x exacerbates this problem. In contrast, the MSP430
+approach is simpler, in that the system will always enter the right
+power state without any external prompting. However, it is
+correspondingly costly, introducing 40-60 cycles of overhead to every
+interrupt that wakes the system up, which can be a bottleneck on the rate
+at which the system can handle interrupts.
+
+Both of these approaches assume that TinyOS can determine the correct
+low power state by examining control and status registers. For
+example, the MSP430 defaults to low power mode 3 (LPM3) unless it
+detects that Timer A, the USARTs, or the ADC is active, in which case
+it uses low power mode 1 (LPM1). From the perspective of what
+peripherals and subsystems might wake the node up or must continue
+operating while the MCU sleeps, this is true. However, power modes
+introduce wakeup latency, a factor which could be of interest to
+higher-level components. While wakeup latency is not a significant
+issue on very low power microcontrollers, such as the Atmega128 and
+MSP430, more powerful processors, such as the Xscale family (the basis
+of platforms such as the imote2) can have power states with wakeup
+latencies as large as 5ms. For some application domains, this latency
+could be a serious issue. Higher level components therefore need a way
+to give the TinyOS microcontroller power manager information on their
+requirements, which it considers when calculating the right low power
+state.
+
+3. Microcontroller Power Management
+====================================================================
+
+TinyOS 2.x uses three basic mechanisms to manage and control
+microcontroller power states: a dirty bit, a chip-specific low power
+state calculation function, and a power state override function.  The
+dirty bit tells TinyOS when it needs to calculate a new low power
+state, the function performs the calculation, and the override allows
+higher level components to introduce additional requirements, if
+needed.
+
+These three mechanisms all operate in the TinyOS core scheduling loop,
+described in TEP 106: Schedulers and Tasks[2_]. This loop is
+called from the boot sequence, which is described in TEP 107: Boot
+Sequence[3_]. The command in question is
+``Scheduler.taskLoop()``, when microcontroller sleeping is enabled.
+
+If this command is called when the task queue is empty, the TinyOS
+scheduler puts the microcontroller to sleep. It does so through
+the ``McuSleep`` interface:
+
+|  ``interface McuSleep {``
+|    ``async command void sleep();``
+|  ``}``
+
+``McuSleep.sleep()`` puts the microcontroller into a low power sleep
+state, to be woken by an interrupt. This command deprecates the
+``__nesc_atomic_sleep()`` call of TinyOS 1.x. Note that, as the 1.x
+call suggests, putting the microcontroller to sleep MUST have certain
+atomicity properties. The command is called from within an atomic
+section, and MUST atomically re-enable interrupts and go to sleep. An
+issue arises if the system handles an interrupt after it re-enables
+interrupts but before it sleeps: the interrupt may post a task, but
+the task will not be run until the microcontroller wakes up from sleep.
+
+Microcontrollers generally have hardware mechanisms to support this
+requirement. For example, on the Atmega128, the ``sei`` instruction
+does not re-enable interrupts until two cycles after it is issued (so
+the sequence ``sei sleep`` runs atomically).
+
+A component named ``McuSleepC`` provides the McuSleep interface, and
+``TinySchedulerC`` MUST automatically wire it to the scheduler
+implementation. McuSleepC is a chip- or platform-specific component,
+whose signature MUST include the following interfaces:
+
+|  ``component McuSleepC {``
+|    ``provides interface McuSleep;``
+|    ``provides interface PowerState;``
+|    ``uses interface PowerOverride;``
+|  ``}``
+|
+|  ``interface McuPowerState {``
+|    ``async command void update();``
+|  ``}``
+|
+|  ``interface McuPowerOverride {``
+|    ``async command mcu_power_t lowestState();``
+|  ``}``
+
+
+McuSleepC MAY have additional interfaces.
+
+3.1 The Dirty Bit
+====================================================================
+
+Whenever a Hardware Presentation Layer (HPL, see TEP 2: Hardware
+Abstraction Architecture[1_]) component changes an aspect of
+hardware configuration that might change the possible low power state
+of the microcontroller, it MUST call McuPowerState.update(). This is
+the first power management mechanism, a *dirty bit*. If
+McuPowerState.update() is called, then McuSleepC MUST recompute the
+low power state before the next time it goes to sleep as a result of
+McuSleep.sleep() being called.
+
+
+3.2 Low Power State Calculation
+====================================================================
+
+McuSleepC is responsible for calculating the lowest power state that
+it can safely put the microcontroller into without disrupting the
+operation of TinyOS subsystems. McuSleepC SHOULD minimize how often it
+must perform this calculation: it is an inherently atomic calculation,
+and so if performed very often (e.g., on every interrupt) can
+introduce significant overhead and jitter.
+
+MCU power states MUST be represented as an enum in the standard chip
+implementation header file. This file MUST also define a type
+``mcu_power_t`` and a combine function that given two power state
+values returns one that provides the union of their functionality.
+
+For example, consider a hypothetical microcontroller with three low
+power states, (LPM0, LPM1, LPM2) and two hardware resources such as
+clocks (HR0, HR1). In LPM0, both HR0 and HR1 are active. In LPM1, HR0
+is inactive but HR1 is active. In LPM2, both HR0 and HR1 are inactive.
+The following table describes the results of a proper combine function
+(essentially a MAX):
+
++------+------+------+------+
+|      | LPM0 | LPM1 | LPM2 |
++------+------+------+------+
+| LPM0 | LPM0 | LPM0 | LPM0 | 
++------+------+------+------+
+| LPM1 | LPM0 | LPM1 | LPM1 |
++------+------+------+------+
+| LPM2 | LPM0 | LPM1 | LPM2 |
++------+------+------+------+
+
+In contrast, if in LPM2, HR0 is active but HR1 is inactive, the
+combine function would look like this:
+
++------+------+------+------+
+|      | LPM0 | LPM1 | LPM2 |
++------+------+------+------+
+| LPM0 | LPM0 | LPM0 | LPM0 | 
++------+------+------+------+
+| LPM1 | LPM0 | LPM1 | LPM0 |
++------+------+------+------+
+| LPM2 | LPM0 | LPM0 | LPM2 |
++------+------+------+------+
+
+3.3 Power State Override
+====================================================================
+
+When McuSleepC computes the best low power state, it MUST call
+``PowerOverride.lowestState().`` McuSleepC SHOULD have a default
+implementation of this command, which returns the lowest power state
+the MCU is capable of. The return value of this command is a
+``mcu_power_t.`` McuSleepC MUST respect the requirements of the return
+of this call and combine it properly with the low power state it
+computes.
+
+The PowerOverride functionality exists in case higher-level components
+have some knowledge or requirements that cannot be captured in
+hardware status and configuration registers, such as a maximum
+tolerable wakeup latency. Because it can overrides all of the MCU
+power conservation mechanisms, it SHOULD be used sparingly, if at
+all. Because it is called in an atomic section during the core
+scheduling loop, implementations of PowerOverride.lowestState() SHOULD
+be an efficient function, and SHOULD NOT be longer than twenty or
+thirty cycles; implementations SHOULD be a simple return of a cached
+variable. Wiring arbitrarily to this command is an easy way to cause
+TinyOS to behave badly. The presence of a combine function for
+mcu_power_t means that this command can have fan-out calls.
+
+Section 5 describes one example use of McuPowerOverride, in the
+timer stack for the Atmega128 microcontroller family.
+
+As part of power state override, a platform MUST define the enum
+TOS_SLEEP_NONE in its hardware.h file. This enum defines the highest
+power state of the platform's microcontroller in a chip-independent
+way. If a component wires to McuPowerOverride and returns TOS_SLEEP_NONE,
+this will cause TinyOS to never put the microcontroller into a power
+saving state. This enum allows a component to prevent sleep in a
+platform-independent way.
+
+4. Peripherals and Subsystems
+====================================================================
+
+At the HIL level, TinyOS subsystems generally have a simple,
+imperative power management interface. Depending on the latencies
+involved, this interface is either ``StdControl``, ``SplitControl``,
+or ``AsyncStdControl``.
+These interfaces are imperative in that when any component calls
+``stop`` on another component, it causes the subsystem that
+component represents to enter an inactive, low-power state.
+
+From the perspective of MCU power management, this transition causes a
+change in status and control registers (e.g., a clock is
+disabled). Following the requirements in 3.1, the MCU power management
+subsystem will be notified of a significant change and act
+appropriately when the system next goes to sleep. TEP 115[5_]
+describes the power management of non-virtualized devices in 
+greater detail, and TEP 108[4_] describes how TinyOS can automatically
+include power management into shared non-virtualized devices.
+
+5. Implementation
+====================================================================
+
+An implementation of McuSleepC can be found in ``tinyos-2.x/tos/chips/atm128``, 
+``tinyos-2.x/tos/chips/msp430``, and ``tinyos-2.x/tos/chips/px27ax``. 
+
+An example use of McuPowerOverride can be found in the atmega128 timer
+system. Because some low-power states have much longer wakeup latencies than
+others, the timer system does not allow long latencies if it has a timer
+that is going to fire soon.  The implementation can be found in 
+``tinyos-2.x/tos/chips/atm128/timer/HplAtm128Timer0AsyncP.nc``, and
+``tinyos-2.x/tos/chips/atm128/timer/HplAtm128Timer0AsyncC.nc`` automatically
+wires it to McuSleepC if it is included.
+
+For the atmega128 microcontroller, TOS_SLEEP_NONE is the "idle" power
+state.
+
+A second example use of McuPowerOverride is in the msp430 timer system.
+By default, the msp430 lowest power state is LPM4, which does not keep
+clocks enabled. If ``tinyos-2.x/tos/chips/msp430/timer/Msp430ClockC.nc''
+is included in the component graph, however, this configuration wires
+the McuPowerOverride of ``tinyos-2.x/tos/chips/msp430/timer/Msp430ClockP.nc``
+to McuSleepC. This implemementation of McuPowerOverride raises the lowest
+power state to LPM3, which keeps clocks enabled.
+
+For msp430 microcontrollers, TOS_SLEEP_NONE is the "active" power state.
+
+6. Author's Address
+====================================================================
+
+| Robert Szewczyk
+| Moteiv Corporation
+| 2168 Shattuck Ave, Floor 2
+| Berkeley, CA 94704
+|
+| email - rob@moteiv.com
+|
+|
+| Philip Levis
+| 358 Gates
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+|
+|
+| Martin Turon
+| PO Box 8525
+| Berkeley, CA 94707
+|
+| phone - +1 408 965 3355
+| email - mturon@xbow.com
+|
+|
+| Lama Nachman
+| 3600 Juliette Lane, SC12-319
+| Intel Research
+| Santa Clara, CA 95052
+|
+| email - lama.nachman@intel.com
+|
+|
+| Phil Buonadonna
+| Arched Rock Corp.
+| 2168 Shattuck Ave. 2nd Floor
+| Berkeley, CA 94704
+|
+| phone - +1 510 981 8714
+| email - pbuonadonna@archedrock.com
+|
+|
+| Vlado Handziski
+| Sekr FT5
+| Einsteinufer 25
+| 10587 Berlin
+| GERMANY
+|
+| email - handzisk@tkn.tu-berlin.de
+|
+
+6. Citations
+====================================================================
+
+.. [1] TEP 2: Hardware Abstraction Architecture
+
+.. [2] TEP 106: Schedulers and Tasks.
+
+.. [3] TEP 107: TinyOS 2.x Boot Sequence.
+
+.. [4] TEP 108: Resource Arbitration
+
+.. [5] TEP 115: Power Management of Non-Virtualised Devices
+
diff --git a/doc/txt/tep113.txt b/doc/txt/tep113.txt
new file mode 100644
index 00000000..c631df7c
--- /dev/null
+++ b/doc/txt/tep113.txt
@@ -0,0 +1,488 @@
+============================
+Serial Communication
+============================
+
+:TEP: 113
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: Ben Greenstein and Philip Levis
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo describes the structure and standard implementation of the
+TinyOS 2.x serial communication system for mote-to-PC data
+exchange. The system is broken into three levels (encoding, framing,
+and dispatch) to allow easy experimentation and replacement. It can
+also handle multiple packet formats: unlike 1.x, 2.x serial packets
+are not bound to the mote's radio packet format. Additionally, one of
+the supported packet formats is platform independent, so PC-side
+applications can communicate with arbitrary motes.
+
+
+1. Introduction
+====================================================================
+
+Users need to read data out of a TinyOS network. The most common
+approach is to attach a mote to a PC or laptop with a wired
+connection. While the interface on the PC side can vary from a serial
+cable to a USB device to IP, the mote generally talks to a serial port
+(UART). In TinyOS 1.x, the UART packet format is platform-specific,
+pushing a good deal of complexity into the protocol and PC-side tools
+in order to discover and properly handle platform diversity. TinyOS
+2.0 introduces the notion of packet format dispatch, so a mote can
+support multiple UART packet formats simultaneously.  This allows
+transparent bridging (e.g., an 802.15.4 base station) to exist in
+parallel with platform-independent communication, which simplifies the
+PC toolchain. This memo documents the protocols and structure of the
+TinyOS 2.x serial communication stack.
+
+2. Serial Stack Structure
+====================================================================
+
+The TinyOS 2.x serial communication stack is broken up into four
+functional components. From bottom to top, they are
+
+  o the raw UART,
+
+  o the encoder/framer,
+
+  o the protocol,
+
+  o and the dispatcher.
+
+Structurally, they look like this:
+
+::
+
+         _____________________     
+        |                     |    
+        |     Dispatcher      |       Packet formatting.
+        |_____________________|    
+         _____________________     
+        |                     |    
+        |      Protocol       |       Acknowledgements, CRC computation,
+        |_____________________|       windowing.
+         _____________________     
+        |                     |    
+        |    Encoder/Framer   |       Translating raw bytes into frame
+        |_____________________|       delimiters, escape bytes.
+         _____________________     
+        |                     |    
+        |      Raw UART       |       Platform code for reading/writing
+        |_____________________|       bytes over the serial connection.
+                                        
+
+The bottom three provide a byte-level interface: only the Dispatcher
+provides a packet-level interface. The top three are all
+platform-independent: only the UART is platform-specific code.
+
+The lowest level of the stack is the raw UART. This HIL component
+provides functionality for configuring the UART (speed, stop bytes,
+etc.), sending/receiving bytes, and flushing the UART.
+
+The Encoder/Framer sits above the raw UART. This component translates
+raw data bytes into packet bytes using a serial protocol's
+encoding. The Encoder/Framer assumes that a protocol's encoding has
+two kinds of bytes: delimiters and data bytes, and signals each in
+separate events to the component above.
+
+The Protocol component handles data and delimiter byte events. It is
+responsible for reading in and sending all protocol control
+packets. If the Protocol component starts receiving a data packet, it
+signals to the Dispatcher that a packet has started and signals the
+data bytes. When the data packet completes, the Protocol signals to
+the Dispatcher that the packet is complete and whether it passed the
+protocol-level CRC.
+
+The Dispatcher component handles data packet bytes and delimiters. It
+is responsible for reading data bytes into a message_t and signaling
+packet reception to components above it. The dispatcher can support
+multiple packet formats. Based on how message_t works (see TEP
+111[tep111_]), this boils down to knowing where in a message_t a
+particular packet format begins (based on its header size). Section
+3.4 describes how the default TinyOS 2.x implementation,
+``SerialDispatcherC`` does this.
+
+
+3. The 2.x Serial Stack Implementation
+====================================================================
+
+Section 2 describes the basic structure of the TinyOS 2.x serial
+stack. This section describes its actual implementation,
+including SerialActiveMessageC, which sits on top of the Dispatcher.
+All of the components except for UartC are part of the serial
+library that lives in ``tos/lib/serial``.
+
+3.1 Raw UART: UartC
+--------------------------------------------------------------------
+
+The UART HIL[TEP2_] is ``UartC``, which provides a byte-level
+interface to the underlying serial communication. It provides the
+``SerialByteComm`` interface:
+
+::
+
+  interface SerialByteComm {
+    async command error_t put(uint8_t data);
+    async event void get(uint8_t data);
+    async event void putDone();
+  }
+
+Alternatively, ``UartC`` may provide the UartStream multi-byte level
+interface. See the Low-Level I/O TEP [TEP117_] for details.
+
+Additionally, UartC provides a split-phase interface to signal when
+the UART is idle. There are situations (such as when powering down the
+usart, when switching from TX to RX on a radio with a UART data line,
+etc.) when we need explicit information that the data sent over the
+UART has actually been transmitted in full. The problem is that on
+MCUs that double-buffer UART communication (such as the msp430), a
+putDone event signifies that the UART is ready to accept another byte,
+but NOT that the UART is idle.
+
+::
+
+  interface SerialFlush {
+    command void flush();
+    event void flushDone();
+  }
+
+It may provide additional interfaces for configuring the serial
+port. This TEP does not consider this topic.
+
+
+3.2 Encoder/Framer: HdlcTranslateC
+--------------------------------------------------------------------
+
+HdlcTranslateC is the serial encoder/framer. It uses the
+``SerialByteComm`` interface and provides the ``SerialFrameComm``
+interface:
+
+::
+
+  interface SerialFrameComm {
+    async command error_t putDelimiter();
+    async command error_t putData(uint8_t data);
+    async command void resetSend();
+    async command void resetReceive();
+    async event void delimiterReceived();
+    async event void dataReceived(uint8_t data);
+    async event void putDone();
+  }
+
+As its name suggests, it uses the same encoding as the HDLC[HDLC_]
+protocol. ``0x7e`` is reserved as a frame delimiter byte, and ``0x7d``
+is reserved as an escape byte. HdlcTranslateC maintains ten bits of
+state. The receive and send paths each have one bit to store whether
+they are using an escape byte, and the transmit path has a byte for
+when it sends an escaped byte.
+
+When HdlcTranslateC receives a delimiter byte, it signals
+delimiterReceived(). When HdlcTranslateC receives an escape byte, it
+sets the receiveEscape flag to true. When it receives any other byte,
+it tests to see if the receiveEscape flag is set; if so, it XORs the
+data byte with ``0x20`` and clears the flag. It signals dataReceived()
+with the byte. The most common use of escape byte is to transmit data
+bytes corresponding to the delimiter byte or escape byte. For example,
+``0x7e`` becomes ``0x7d 0x5e``.
+
+HdlcTranslateC performs similar actions on the transmit side. When
+told to transmit the delimiter or escape byte as a data byte, it sets
+the transmitEscape flag to true, stores the data byte XOR ``0x20``,
+and sends an escape byte. When the escape byte is sent, it sends the
+stored data byte.
+
+3.3 Protocol: SerialP
+--------------------------------------------------------------------
+
+The SerialP component implements the serial protocol using PPP/HDLC-
+like framing (See RFC 1662[RFC1662_]). Type dispatch and buffer
+management are left to higher layers in the serial stack. The protocol
+is currently stop-and-wait in the host-to-mote direction and best
+effort in the mote-to-host direction. 
+
+SerialP provides two byte-level interfaces to the upper layer for
+sending and receiving packets, respectively called SendBytePacket and
+ReceiveBytePacket.
+
+On the sending side, SerialP is responsible for encapsulation of upper
+layer packets. An upper layer component such as SerialDispatcherC
+initiates the sending of a packet by calling startSend(), passing the
+first byte to send. SerialP collects subsequent bytes by signalling
+nextByte(). Within the nextByte handler or between calls to nextByte(),
+the upper layer should indicate the end-of-packet by calling
+completeSend(). If completeSend is called from within a nextByte()
+handler, SerialP will ignore the return of the call to nextByte().
+
+::
+
+  interface SendBytePacket {
+    async command error_t startSend(uint8_t first_byte);
+    async command error_t completeSend();
+    async event uint8_t nextByte();
+    async event void sendCompleted(error_t error);
+  }
+
+SerialP maintains a small window of bytes that have been received by
+the upper layer and not yet sent to the UART. Depending on the timing
+requirements of the underlying UART, the size of this window can be
+changed.  SerialP uses repeated calls to nextByte() to keep this window
+filled.
+
+SerialP uses SerialFrameComm to send a delimiter between frames, a
+serial-level type field, the bytes of the packet, and a two-byte frame
+CRC. For mote-to-host gap detection and link reliability, a sequence
+number may also be sent (not activated in the default implementation).
+
+After sending an entire frame and receiving the last putDone() event
+from below, SerialP signals sendCompleted() to indicate the success or
+failure of a requested transmission.
+
+Packet reception is also managed by SerialP and the interface
+provided to the upper layer is ReceiveBytePacket:
+
+::
+
+  interface ReceiveBytePacket {
+    async event error_t startPacket();
+    async event void byteReceived(uint8_t b);
+    async event void endPacket(error_t result);
+  }
+
+Upon receiving an interframe delimiter and a new frame's header,
+SerialP signals the upper layer indicating that a packet is
+arriving. For each byte received, SerialP signals byteReceived().
+Once SerialP receives the complete frame it signals endPacket with a
+value of SUCCESS. If instead it loses sync during reception it signals
+endPacket with FAIL.
+
+SerialP acknowledges frames it receives. Acknowledgements have a
+higher priority than data transmissions and consequently, data frames
+may be slightly delayed. However, acknowledgement information is
+stored in a queue separate from the data buffer, so a data packet to
+be transmitted may begin spooling into SerialP while SerialP is
+actively sending an acknowledgement.
+
+Only the PC-to-mote communication path supports acknowledgements.
+SerialP does not request acknowledgements from the PC for two reasons.
+First, acks are not perfect reliable: they are used on the
+PC-to-mote path to raise reliability to a usable level. In the case of
+the PC-to-mote path, the UART receive buffer is typically a single
+byte, so a high interrupt load can easily lose (and sometimes does) a
+byte. This is in contrast to the PC receive buffer, which is much
+larger and does not have to deal with overflow. Second, adding support
+for acks would increase the code size and complexity of the serial
+stack. As code space is often at a premium, this would add little
+needed functionality at significant cost. Of course, any application
+that requires perfect reliability may layer its own scheme on top of
+the serial protocol.
+
+The acknowledgement protocol is stop-and-wait to minimize buffering on
+the mote side. This is considered more important on memory constrained
+devices than increased throughput in the PC-to-mote direction, which
+most applications only use for occasional control transmissions.
+
+
+3.4 Dispatcher: SerialDispatcherC
+--------------------------------------------------------------------
+
+SerialDispatcherC handles the data packets that the Protocol component
+receives. It uses the SendBytePacket and ReceiveBytePacket interfaces,
+and provides parameterized Send and Receive interfaces. The parameter
+in the Send and Receive interfaces (``uart_id_t``) determines the
+packet format contained in the message_t.
+
+SerialDispatcherC places a one-byte header, the packet format
+identifier, on the packets sent and received through SerialP.
+SerialDispatcherC uses a parameterized SerialPacketInfo interface to
+be able to handle various packet formats:
+
+::
+
+  interface SerialPacketInfo {
+    async command uint8_t offset();
+    async command uint8_t dataLinkLength(message_t* msg, uint8_t upperLen);
+    async command uint8_t upperLength(message_t* msg, uint8_t dataLinkLen);
+  }
+
+When SerialDispatcherC receives the first data byte of a packet from
+SerialP, it stores it as the packet type and calls
+offset() to determine where in a message_t that
+packet format begins. It then spools data bytes in, filling them into
+its message_t buffer. Similarly, on the send side, it first sends the
+type byte and spools out data bytes starting from the index denoted by
+the call to offset(). SerialDispatcherC uses the two length commands,
+dataLinkLength() and upperLength(), to translate between the two notions
+of packet length: above, length refers to the payload excluding
+header, while below it refers to the payload plus header.
+
+A component that provides communication over the serial port with
+uart_id_t *U* MUST wire a component implementing SerialPacketInfo to
+SerialDispatcherC with uart_id_t *U*. The file ``Serial.h`` contains
+reserved uart_id_t's for supported packet formats. Currently, only
+platform independent active messages
+(``TOS_SERIAL_ACTIVE_MESSAGE_ID``, described in Section 3.5), 802.15.4
+active messages (``TOS_SERIAL_802_15_4_ID``), mica2 CC1000 packets
+(``TOS_SERIAL_CC1000_ID``) and the error code
+``TOS_SERIAL_UNKNOWN_ID`` are reserved. New packet formats MUST NOT
+reuse any reserved identifiers.
+
+3.5 SerialActiveMessageC
+--------------------------------------------------------------------
+
+SerialActiveMessageC is a platform-independent active message layer
+that operates on top of the serial communication
+stack. SerialActiveMessageC is a configuration that wires
+SerialActiveMessageP to SerialDispatcherC with uart_id_t
+TOS_SERIAL_ACTIVE_MESSAGE_ID and wires SerialPacketInfoActiveMessageP
+to SerialDispatcherC with uart_id_t TOS_SERIAL_ACTIVE_MESSAGE_ID:
+
+::
+
+  includes Serial;``
+  configuration SerialActiveMessageC {
+    provides {
+      interface Init;
+      interface AMSend[am_id_t id];
+      interface Receive[am_id_t id];
+      interface Packet;
+      interface AMPacket;
+    }
+    uses interface Leds;
+  }
+  implementation {
+    components new SerialActiveMessageP() as AM, SerialDispatcherC;
+    components SerialPacketInfoActiveMessageP as Info;
+   
+    Init = SerialDispatcherC;
+    Leds = SerialDispatcherC;
+   
+    AMSend = AM;
+    Receive = AM;
+    Packet = AM;
+    AMPacket = AM;
+    
+    AM.SubSend -> SerialDispatcherC.Send[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+    AM.SubReceive -> SerialDispatcherC.Receive[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+    
+    SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_ACTIVE_MESSAGE_ID] -> Info;
+  }
+
+
+SerialActiveMessageP is a generic component so that it can be used to
+sit on top of any packet-level communication layer. It does not filter
+packets based on destination address or group. It assumes that if the
+packet was received over the serial port, it was destined to the
+node. This saves PC-side tools from having to discover or consider the
+ID and group of a mote.
+
+Platform-independent active messages do not have a CRC (they assumes
+the serial stack CRC is sufficient), and have the following header:
+
+::
+
+  typedef nx_struct SerialAMHeader {
+    nx_am_addr_t addr;
+    nx_uint8_t length;
+    nx_am_group_t group;
+    nx_am_id_t type;
+  } SerialAMHeader;
+
+
+
+3.6 Packet Format
+--------------------------------------------------------------------
+
+A data packet in the TinyOS 2.x serial stack has the following format
+over the wire. Each protocol field is associated with a specific component:
+
+::
+
+     ____________________________________________
+    | | | | |                               |  | |
+    | | | | |                               |  | | 
+    |_|_|_|_|_______________________________|__|_|
+     F P S D         Payload                 CR F
+   
+  F       = Framing byte, denoting start of packet: HdlcTranslateC
+  P       = Protocol byte: SerialP
+  S       = Sequence number byte: SerialP
+  D       = Packet format dispatch byte: SerialDispatcherC
+  Payload = Data payload (stored in SerialDispatcherC): SerialDispatcherC
+  CR      = Two-byte CRC over S to end of Payload: SerialP
+  F       = Framing byte denoting end of packet: HdlcTranslateC
+
+Payload is a contiguous packet that SerialDispatcherC reads in.  Note
+that any data bytes (P - CR) equal to 0x7e or 0x7d will be escaped to
+0x7d 0x5e or 0x7d 0x5d accordingly. For example, a platform
+independent AM packet of type 6, group 0x7d, and length 5 to
+destination 0xbeef with a payload of 1 2 3 4 5 would look like this:
+
+``7e 40 09 00 be ef 05 7d 5d 06 01 02 03 04 05 7e``
+
+Note that the group 0x7d is escaped to 0x7d 0x5d. The protocol field
+(P) is 0x40 (64), corresponding to ``SERIAL_PROTO_ACK`` (in Serial.h).
+
+
+4. Access Abstractions
+====================================================================
+
+Two generic components: SerialAMSenderC and SerialAMReceiverC connect
+to SerialActiveMessageC to provide virtualized access to the serial
+stack. Each instantiation of SerialAMSenderC has its own queue of
+depth one. Therefore, it does not have to contend with other
+SerialAMSender instantiations for queue space. The underlying
+implementation schedulers the packets in these queues using some form
+of fair-share queueing. SerialAMReceiverC provides the virtualized
+abstraction for reception. These abstractions are very similar to
+TinyOS's radio abstractions, namely, AMSenderC and AMReceiverC. See
+Section 4 of TEP 116[TEP116_] for more information. Unlike the
+services in the TEP 116, the serial component virtualizations provide
+no snooping capabilities.
+
+
+5. Author's Address
+====================================================================
+
+| Philip Levis
+| 358 Gates
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+|
+|
+| Ben Greenstein
+| Intel Research Seattle
+| 1100 NE 45th Street, 6th Floor
+| Seattle, WA 98105
+|
+| phone -  +1 206 206 545 2501
+| email - benjamin.m.greenstein@intel.com
+
+6. Citations
+====================================================================
+
+.. [TEP2] TEP 2: Hardware Abstraction Architecture. tinyos-2.x/doc/txt/tep2.txt
+
+.. [TEP111] TEP 111: message_t. tinyos-2.x/doc/txt/tep111.txt
+
+.. [TEP116] TEP 116: Packet Protocols. tinyos-2.x/doc/txt/tep116.txt
+ 
+.. [TEP117] TEP 117: Low-Level I/O. tinyos-2.x/doc/txt/tep117.txt
+
+.. [HDLC] International Organization For Standardization, ISO Standard 3309-1979, "Data communication - High-level data link control procedures - Frame structure", 1979.
+
+.. [RFC1662] PPP in HDLC-like Framing, Internet Engineering Task Force (IETF), 1994
diff --git a/doc/txt/tep114.txt b/doc/txt/tep114.txt
new file mode 100644
index 00000000..235bf787
--- /dev/null
+++ b/doc/txt/tep114.txt
@@ -0,0 +1,313 @@
+=====================================================
+SIDs: Source and Sink Independent Drivers
+===================================================== 
+
+:TEP: 114
+:Group: Core Working Group
+:Type: Documentary 
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: Gilman Tolle, Philip Levis, and David Gay
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents a set of hardware- and sensor-independent interfaces 
+for data sources and sinks in TinyOS 2.x.
+
+1. Introduction
+====================================================================
+
+Sensing is an integral part of any sensor network application. The
+diversity of sensors can lead to a wide variety of different software
+interfaces to these sensors. However, the burden of connecting a
+general sensor data management application to every one of these
+different interfaces suggests that sensors also provide a simple,
+general-purpose interface for data acquisition. Therefore, TinyOS 2.0
+has telescoping sensor abstractions, providing both sensor-independent
+and sensor-specific interfaces. This memo documents a set of hardware-
+and sensor-independent interfaces for data sources and sinks in TinyOS
+2.x.
+
+2. Sensors in TinyOS 1.x
+====================================================================
+
+Early TinyOS sensors were generally analog. To sample one of these
+sensors, an application makes an analog-to-digital conversion using
+the MCU ADC.  Because all early sensors required ADC conversions, the
+ADC interface has become the de-facto 1.x sensor interface. However,
+the ADC interface was originally designed for inexpensive,
+interrupt-driven sampling.  All of its commands and events are async
+and sensor values are always 16 bits, although only some subset of the
+bits may be significant (e.g., a 12-bit value).
+
+Because sensing is an integral part of high-level application logic,
+having asynchronous events means that high-level components
+must work with atomic sections, even if the sampling rate is very low
+(e.g., every five minutes) and so could be easily placed in a
+task. Race conditions are problematic and possible in any real time
+multi-tasking design. Race conditions are a failure in design, and
+especially difficult to detect at low sampling rates. 
+
+Additionally, not all sensors require ADC conversions from the MCU.
+Many sensors today are digital. To sample these sensors, the MCU sends
+a sample command and receives the corresponding data over a bus (e.g.,
+SPI, I2C). The latency involved, combined with possible Resource
+arbitration [1]_, means that these bus operations are often
+synchronous code. In the command direction, this can force a task
+allocation to convert async to sync; in the event direction, the
+application has to deal with async code even though the event is, in
+practice, in a task.
+
+Finally, the simplicity of the ADC interface has led many sensor
+modules to introduce several new interfaces for calibration and
+control, such as ``Mic`` and ``MagSetting``. Because ADCs generally do
+not have error conditions, the ADC interface has no way to signal that
+a sample failed. This turns out to be important for sensors where the
+sampling request is split-phase, such as sensors over a bus. In these
+cases, it is possible that the driver accepts the request to sample,
+but once acquiring the bus discovers something is wrong with the
+sensor. This property has led bus-based sensors to also have a
+separate ``ADCError`` interface; this interface breaks the basic
+TinyOS pattern of a tight coupling between split-phase commands and
+their completion events, as the command is in ADC but the completion
+event is in ADCError.
+
+All of these complications provide the context of the challenge to
+write high-level code that is sensor independent. Sensors, when
+possible, should follow an approach similar to the HAA[_haa], where
+they have sensor- or sensor-class-specific interfaces for high
+performance or special case use, but also simple and common interfaces
+for basic and portable use. Providing a telescoping sensor abstraction
+allows both classes of use.
+
+3. Sensors in TinyOS 2.x
+====================================================================
+
+TinyOS 2.x contains several nesC interfaces that can be used to
+provide sensor-independent interfaces which cover a range of common
+use cases. This document describes these interfaces, and explains how
+to use these interfaces to write a Source- or Sink-Independent Driver
+(SID). A SID is source/sink independent because its interfaces do not
+themselves contain information on the sort of sensor or device they
+sit on top of.  A SID SHOULD provide one or more of the interfaces
+described in this section.
+
+This table summarizes the SID interfaces:
+
++------------------------+-----------+-----------+-----------+
+| Name                   | Phase     | Data type | Section   |
++------------------------+-----------+-----------+-----------+
+| Read                   | Split     | Scalar    | 3.1       |
++------------------------+-----------+-----------+-----------+
+| Get                    | Single    | Scalar    | 3.2       |
++------------------------+-----------+-----------+-----------+
+| Notify                 | Trigger   | Scalar    | 3.3       |
++------------------------+-----------+-----------+-----------+
+| ReadStream             | Split     | Stream    | 3.4       |
++------------------------+-----------+-----------+-----------+
+
+3.1 Split-Phase Small Scalar I/O
+--------------------------------------------------------------------
+
+The first set of interfaces can be used for low-rate scalar I/O::
+
+  interface Read<val_t> {
+    command error_t read();
+    event void readDone( error_t result, val_t val );
+  }
+
+If the ``result`` parameter of the ``Read.readDone`` and
+``ReadWrite.readDone`` events is not SUCCESS, then the memory of the
+``val`` parameter MUST be filled with zeroes.
+
+If the call to ``read`` has returned SUCCESS, but the ``readDone``
+event has not yet been signaled, then a subsequent call to ``read``
+MUST return EBUSY or FAIL.  This simple locking technique, as opposed
+to a more complex system in which multiple read/readDone pairs may be
+outstanding, is intended to reduce the complexity of SID client code.
+
+Examples of sensors that would be suited to this class of interface
+include many basic sensors, such as photo, temp, voltage, and ADC
+readings.
+
+3.2 Single-Phase Scalar I/O
+--------------------------------------------------------------------
+
+Some devices may have their state cached or readily available. In
+these cases, the device can provide a single-phase instead of
+split-phase operation.  Examples include a node's MAC address (which
+the radio stack caches in memory), profiling information (e.g.,
+packets received), or a GPIO pin. These devices MAY use the
+Get interface::
+
+  interface Get<val_t> {
+    command val_t get();
+  }
+
+
+
+3.3 Notification-Based Scalar I/O
+--------------------------------------------------------------------
+
+Some sensor devices represent triggers, rather than request-driven
+data acquisition. Examples of such sensors include switches,
+passive-IR (PIR) motion sensors, tone detectors, and smoke
+detectors. This class of event-driven sensors can be presented with
+the Notify interface::
+
+  interface Notify<val_t> {
+    command error_t enable();
+    command error_t disable();
+    event void notify( val_t val );
+  }
+
+The Notify interface is intended for relatively low-rate events (e.g.,
+that can easily tolerate task latencies). High-rate events may require
+more platform- or hardware-specific async interfaces.
+
+The enable() and disable() command enable and disable notification
+events for the interface instance used by a single particular
+client. They are distinct from the sensor's power state. For example,
+if an enabled sensor is powered down, then when powered up it will
+remain enabled.
+
+If ``enable`` returns SUCCESS, the interface MUST subsequently
+signal notifications when appropriate. If ``disable`` returns SUCCESS,
+the interface MUST NOT signal any notifications.
+
+The val parameter is used as defined in the Read interface.
+
+3.4 Split-Phase Streaming I/O
+--------------------------------------------------------------------
+
+Some sensors can provide a continuous stream of readings, and some
+actuators can accept a continuous stream of new data. Depending on the
+rate needed and jitter bounds that higher level components can
+tolerate, it can be useful to be able to read or write readings in
+blocks instead of singly.  For example, a microphone or accelerometer
+may provide data at a high rate that cannot be processed quickly
+enough when each new reading must be transferred from asynchronous to
+synchronous context through the task queue.
+
+The ReadStream interface MAY be provided by a device that can
+provide a continuous stream of readings::
+
+  interface ReadStream<val_t> {
+
+    command error_t postBuffer( val_t* buf, uint16_t count );
+
+    command error_t read( uint32_t usPeriod );
+
+    event void bufferDone( error_t result, 
+                           val_t* buf, uint16_t count );
+
+    event void readDone( error_t result );
+  }    
+
+The postBuffer command takes an array parameterized by the sample
+type, and the number of entries in that buffer. A driver can then
+enqueue the buffer for filling. The client can call postBuffer() more
+than once, to "pre-fill" the queue with any number of buffers. The
+size of the memory region pointed to by the buf parameter MUST be at
+least as large as the size of a pointer on the node architecture plus
+the size of the uint16_t count argument. This requirement supports
+drivers that may store the queue of buffers and count sizes by
+building a linked list.
+
+After posting at least one buffer, the client can call read() with a
+specified sample period in terms of microseconds. The driver then
+begins to fill the buffers in the queue, signaling the bufferDone()
+event when a buffer has been filled. The client MAY call postBuffer()
+after read() in order to provide the device with new storage for
+future reads.
+
+If the device ever takes a sample that it cannot store (e.g., due to
+buffer underrun), it MUST signal readDone() with an appropriate
+failure code. If an error occurs during a read, then the device MUST
+signal readDone() with an appropriate failure code. Before a device
+signals readDone(), it MUST signal bufferDone() for all outstanding
+buffers. If a readDone() is pending, calls to postBuffer MUST return
+FAIL.
+
+In the ReadStream interface, ``postBuffer`` returns SUCCESS if the buffer
+was successfully added to the queue, FAIL otherwise. A return value
+of SUCCESS from ``read`` indicates reading has begun and the interface
+will signal ``bufferDone`` and/or ``readDone`` in the future. A
+return value of FAIL means the read did not begin and the interface
+MUST NOT signal ``readDone`` or ``bufferDone``. Calls to ``read``
+MAY return EBUSY if the component cannot service the request.
+
+4. Implementation
+====================================================================
+
+An implementation of the Read interface can be found in
+``tos/system/SineSensorC.nc`` and ``tos/system/ArbitratedReadC.nc``.
+
+An implementation of the Get interface can be found in
+``tos/platforms/telosb/UserButtonC.nc``.
+
+An implementation of the ReadStream interface can be found in
+``tos/sensorboards/mts300/MageXStreamC.nc``.
+
+Implementations of the Notify interface can be found in
+``tos/platforms/telosb/SwitchToggleC.nc`` and
+``tos/platforms/telosb/UserButtonP.nc``.
+
+
+5. Summary
+====================================================================
+
+According to the design principles described in the HAA[_haa], authors
+should write device drivers that provide rich, device-specific
+interfaces that expose the full capabilities of each device. In
+addition, authors can use the interfaces described in this memo to
+provide a higher-level device-independent abstractions: SIDs. By
+providing such an abstraction, driver authors can support developers
+who only need simple interfaces, and can reduce the effort needed to
+connect a sensor into a more general system.
+
+6. Author's Address
+====================================================================
+
+| Gilman Tolle
+| 501 2nd St. Ste 410
+| Arch Rock Corporation
+| San Francisco, CA 94107
+|
+| phone - +1 415 692 0828
+| email - gtolle@archrock.com
+|
+|
+| Philip Levis
+| 358 Gates
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+|
+|
+| David Gay
+| 2150 Shattuck Ave, Suite 1300
+| Intel Research
+| Berkeley, CA 94704
+|
+| phone - +1 510 495 3055
+| email - david.e.gay@intel.com
+|
+
+7. Citations
+============================================================================
+
+.. [1] TEP 108: Resource Arbitration.
+
+
diff --git a/doc/txt/tep115.txt b/doc/txt/tep115.txt
new file mode 100644
index 00000000..398faaf6
--- /dev/null
+++ b/doc/txt/tep115.txt
@@ -0,0 +1,620 @@
+======================================================================
+Power Management of Non-Virtualised Devices
+======================================================================
+
+:TEP: 115
+:Group: Core Working Group
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: Kevin Klues, Vlado Handziski, Jan-Hinrich Hauer, Phil Levis
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with TEP
+   1.
+
+Abstract
+======================================================================
+
+This memo documents how TinyOS 2.x manages the power state of physical
+(not virtualised) abstractions.
+
+1. Introduction
+======================================================================
+
+TinyOS platforms have limited energy. A unified power management
+strategy for all devices and peripherals is not feasible, as
+they vary significantly in warm-up times, power profiles, and
+operation latencies. While some devices, such as
+microcontrollers, can efficiently calculate their lowest possible
+power state very quickly, others, such as sensors with warm-up
+times, require external knowledge to do so.
+
+In TinyOS 1.x, applications are responsible for all power management.
+Low-level subsystems, such as an SPI bus, are explicitly powered on
+and off by higher level abstractions. This approach of deep calls
+to ``StdControl.start()`` and ``StdControl.stop()`` introduces strange behaviors
+and can get in the way of power conservation. Turning off the radio
+on the Telos platform, for example, turns off the SPI bus and therefore
+prevents the flash driver from working. Additionally, the microcontroller
+stays in a higher power state for the SPI bus even when it is
+inactive.
+
+TinyOS 2.x defines two classes of devices for power-management:
+microcontrollers and peripherals. TEP 112 documents how TinyOS 2.x
+manages the power state of a microcontroller [TEP112]_.
+Unlike microcontrollers, which typically have several power states,
+peripheral devices typically have two distinct states, *on* and *off*.
+This TEP is dedicated to documenting how TinyOS 2.x controls the power
+state of peripheral devices.
+
+The term "peripheral device" refers to any hardware device which
+arbitrates access with the mechanisms described in [TEP108]_ .  These
+devices are not  virtualised in the sense that access to
+them must be explicitly requested and released by their users.
+
+
+2. Power Management Models
+======================================================================
+
+There are two different models to managing the power state of a
+peripheral in TinyOS: *explicit power management* and *implicit
+power management*.  
+
+The explicit model provides a means for a single client to manually
+control the power state of a dedicated physical device (as defined by
+[TEP108]_).  Whenever this client tells the device to power up or down
+it does so without delay (except for delays in the hardware of course).  
+This model
+can be particularly useful when the control information driving the
+selection of the proper power state of a device relies on external
+logic contained in higher level components.  The following section
+discusses the ``StdControl``, ``SplitControl``, and
+``AsyncStdControl`` interfaces used to perform power management of
+this type.
+
+The implicit model, on the other hand, provides a means for allowing
+the power state of a device to be controlled from within the driver
+for that device itself.  Device drivers following this model are never
+explicitly powered up or down by some external client, but rather
+*require* some internal policy to be defined that decides exactly when
+their power states should be changed.  This policy could exist
+natively on the hardware of the physical device itself, or be
+implemented on top of some lower level abstraction of a physical
+device adhering to the *explicit power management* model.
+
+Shared devices (as defined by [TEP108]_) can infer whether they
+should be on or off based on the interfaces they provide to their
+clients. For example, when a client requests the ADC, this implies
+the ADC should be on; if there are no requests of the ADC, this implies
+it should be off. Therefore shared devices do not need to provide a
+power control interface. They can use an implicit power management policy. 
+Section 4.2 discusses this in more detail.::
+
+
+                 /|\                                    /|\
+                  |                                      |
+            Data Interface                            Resource
+                  |                                      |  
+  -----------------------------------------------------------------------
+  |             Shared Device (implicitly power managed)                |
+  -----------------------------------------------------------------------
+                 /|\                                    /|\
+                  |                                      |
+            Data Interface                            Resource
+                  |                                      |
+                  |        ----------------------        |
+                  |        |    Power Manager   |        |
+                  |        ----------------------        |
+                  |          /|\            /|\          |
+                  |           |              |           |
+                  |      StdControl ResourceDefaultOwner |
+                  |           |              |           |
+  ---------------------------------      --------------------------------
+  |        Dedicated Device       |      |            Arbiter           |
+  |  (explicitly power managed)   |      |                              |
+  ---------------------------------      --------------------------------
+      
+
+3. Explicit Power Management 
+======================================================================
+
+Just as in TinyOS 1.x, TinyOS 2.x has  ``StdControl`` and ``SplitControl``
+interfaces in order to control the on and off
+power states of explicitly managed peripherals. TinyOS 2.x also
+introduces a third interface, ``AsyncStdControl``. A component
+representing a hardware device that can be powered on and off MUST
+provide one of these three interfaces.
+The selection of the right interface depends on the
+latencies involved in changing between these two states as well as the
+nature of the code (sync or async) executing any of the interface's
+commands.
+
+3.1 Power Management with ``StdControl``
+----------------------------------------------------------------------
+
+Whenever the powerup and powerdown times of a non-virtualised device
+are negligible, they SHOULD provide the ``StdControl`` interface as 
+defined below::
+
+   interface StdControl {
+     command error_t start();
+     command error_t stop();
+   }
+   
+.. Note::
+   
+  Powerup and powerdown times on the order of a few microseconds have
+  traditionally been considered negligible, and can be waited on using
+  one of the *BusyWait* interfaces described in [TEP102]_.  Powerup
+  and powerdown times on the order of a few milliseconds, however,
+  should not be ignored, and MUST be hidden behind the use of the
+  ``SplitControl`` interface described later on in this section.
+  A general rule of thumb is that if waiting for powerup takes
+  more than one hundred microseconds, SplitControl is probably more
+  suitable.
+
+An external component MUST call ``StdControl.start()`` to power a
+device on and ``StdControl.stop()`` to power a device off.  Calls to
+either command MUST return either SUCCESS or FAIL. 
+
+Upon the successful return of a call to ``StdControl.start()``, a
+device MUST be completely powered on, allowing calls to commands of other
+interfaces implemented by the device to succeed.
+
+Upon the successful return of a call to ``StdControl.stop()``, a
+device MUST be completely powered down, and any calls to commands 
+of other interfaces implemented by that device that actually access 
+the device hardware MUST return FAIL or EOFF.
+
+If a device is not able to complete the ``StdControl.start()`` or
+``StdControl.stop()`` request for any reason, it MUST return FAIL.
+
+Based on these specifications, the following matrix has been created
+to describe the valid return values for any call made through the
+``StdControl`` interface in one of the devices valid power states:
+
++---------------------+-----------------+-----------------+
+| Call                | Device On       | Device Off      |
++=====================+=================+=================+
+| StdControl.start()  | SUCCESS         | SUCCESS or FAIL |
++---------------------+-----------------+-----------------+
+| StdControl.stop()   | SUCCESS or FAIL | SUCCESS         |
++---------------------+-----------------+-----------------+
+| operation           | depends         | FAIL or EOFF    |
++---------------------+-----------------+-----------------+
+
+Devices providing this interface would do so as shown below::
+
+   configuration DeviceC {
+     provides {
+       interface Init;
+       interface StdControl;  //For Power Management
+       ....
+     }
+   }
+
+
+3.2 Power Management with ``SplitControl``
+----------------------------------------------------------------------
+
+When a device's powerup and powerdown times are non-negligible, the
+*``SplitControl``* interface SHOULD be used in place of the *``StdControl``*
+interface.  The definition of this interface can be seen below::
+
+   interface SplitControl {
+     command error_t start();
+     event void startDone(error_t error);
+     command error_t stop();
+     event void stopDone(error_t error);
+   }
+   
+
+An external component MUST call ``SplitControl.start()`` to power a
+device on and ``SplitControl.stop()`` to power a device off.  Calls to
+either command return one of SUCCESS, FAIL, EBUSY, or
+EALREADY. SUCCESS indicates that the device has now started changing
+its power state and will signal a corresponding completion event in
+the future. EBUSY indicates that the device is in the midst of either starting
+or stopping (e.g., it is starting when stop is called or stopping
+when start is called) and will not issue an event. EALREADY indicates
+that the device is already in that state; the call is erroneous and a
+completion event will not be signaled. FAIL indicates that the
+device's power state could not be changed. More explicitly:
+
+Successful calls to ``SplitControl.start()`` MUST signal one of
+``SplitControl.startDone(SUCCESS)`` or ``SplitControl.startDone(FAIL)``.
+
+Successful calls to ``SplitControl.stop()`` MUST signal one of
+``SplitControl.stopDone(SUCCESS)`` or ``SplitControl.stopDone(FAIL)``.
+
+Upon signaling a ``SplitControl.startDone(SUCCESS)``, a device MUST
+be completely powered on, and operation requests through calls to commands 
+of other interfaces implemented by the device MAY succeed.  
+
+Upon signalling a ``SplitControl.stopDone(SUCCESS)``, a device MUST be 
+completely powered down, and any subsequent calls to commands of other 
+interfaces implemented by the device that actually access 
+the device hardware MUST return EOFF or FAIL.
+
+If a device is powered on and a successful call to ``SplitControl.stop()``
+signals a ``SplitControl.stopDone(FAIL)``, the device MUST still be fully 
+powered on, and operation requests through calls to commands of other 
+interfaces implemented by the device MAY succeed.
+
+If a device is powered down and a successful call to ``SplitControl.start()`` 
+signals a ``SplitControl.startDone(FAIL)``, the device MUST still be fully 
+powered down, and operation requests through calls to commands of other 
+interfaces implemented by the device MUST return EOFF or FAIL.
+
+If a device is not able to complete the ``SplitControl.start()`` or
+``SplitControl.stop()`` requests they MUST return FAIL.
+
+Calls to either ``SplitControl.start()`` when the device is starting
+or ``SplitControl.stop()`` while the device is stopping MUST return
+SUCCESS, with the  anticipation that a corresponding
+``SplitControl.startDone()`` or ``SplitControl.stopDone()``
+will be signaled in the future.
+
+Calls to ``SplitControl.start()`` when the device is started
+or ``SplitControl.stop()`` while the device is stopped MUST
+return EALREADY, indicating that the device is already in that
+state. The corresponding completion event (startDone for start
+or stopDone for stop) MUST NOT be signaled.
+
+Calls to ``SplitControl.start()`` when the device is stopping or
+``SplitControl.stop()`` while the device is starting MUST return
+EBUSY, indicating that the device is busy performing a differnet
+operation. The correspodning completion event (startDone for start or
+stopDone for stop) MUST NOT be signaled.
+
++----------------------+-----------+------------+----------+----------+ 
+| Call                 | Device On | Device Off | Starting | Stopping |
++======================+===========+============+==========+==========+
+| SplitControl.start() |  EALREADY |  SUCCESS   | SUCCESS  | EBUSY    |
+|                      |           |  FAIL      |          |          |
++----------------------+-----------+------------+----------+----------+
+| SplitControl.stop()  |  SUCCESS  |  EALREADY  | EBUSY    | SUCCESS  |
+|                      |  FAIL     |            |          |          |
++----------------------+-----------+------------+----------+----------+
+| operation            |  depends  |  FAIL      | FAIL     | FAIL     |
+|                      |           |  EOFF      | EOFF     | EOFF     |
+|                      |           |  EOFF      | SUCCESS  |          |
++----------------------+-----------+------------+----------+----------+
+
+Devices providing this interface would do so as shown below::
+
+   configuration DeviceC {
+     provides {
+       interface Init;
+       interface SplitControl; \\ For Power Management
+       ....
+     }
+   }
+   
+.. Note::
+	
+	Other approaches were considered for the return values of  
+	``SplitControl.start()`` and ``SplitControl.stop()``.  One such 
+	approach would have replaced EBUSY with SUCCESS when 
+	``SplitControl.start()`` was called while in the process of stopping
+	and ``SplitControl.stop()`` was called while in the process of starting.
+	However, implementing such an approach adds unwanted complexity to 
+	a device driver.  It is unreasonable to expect the implementor of
+	each driver to implement this functionality.  
+	
+	Returning EBUSY is the most straightforward, unambiguous value
+	that can be returned in such a situation.  By returning 
+	EBUSY when a device is in a transitional state, the components 
+	built on top of a driver unambiguously know exactly why a call to 
+	``start()`` or ``stop()`` did not succeed, and can take action accordingly.
+	Since only ONE component should ever implement the ``SplitControl`` 
+	interface for a given device, it isn't unreasonable to expect them 
+	to keep track of this return value themselves.  There is, of course, 
+	nothing preventing someone from creating a component 
+	on top of each driver implementation that implements things differently.
+
+3.3 Power Management with ``AsyncStdControl`` 
+----------------------------------------------------------------------
+
+The commands and the events of the *``StdControl``* and the *``SplitControl``*
+interfaces are synchronous and can not be called from within
+asynchronous code (such as interrupt service routines, etc.). For the
+cases when the power state of the device needs to be controlled from
+within asynchronous code, the *``AsyncStdControl``* interface MUST be used
+in place of the *``StdControl``* interface.  The definition of this
+interface can be seen below::
+
+   interface AsyncStdControl {
+     async command error_t start();
+     async command error_t stop();
+   }
+   
+
+All of the semantics that hold true for devices providing the
+``StdControl`` interface also hold for this interface.
+   
+Devices providing this interface would do so as shown below::
+
+   configuration DeviceC {
+     provides {
+       interface Init;
+       interface AsyncStdControl; \\ For Power Management
+       ....
+     }
+   }
+   
+.. Note::
+
+  The ``AsyncStdControl`` interface should be provided whenever it might be
+  necessary to allow a device to be powered on or off while running in 
+  async context.  If it is anticipated that a device *will* not (or more 
+  likely *should* not) be powered on or off while in asynchronous context,
+  then the ``StdControl`` interface SHOULD be provided instead.  Components 
+  that wish to power the device on or off from within async context would
+  then be required to post a task before doing so.  In practice, 
+  ``AsyncStdControl`` is provided by low-level hardware resources, while 
+  ``StdControl`` is provided by higher level services built on top of these 
+  resources.
+
+
+4. Implicit Power Management
+======================================================================
+
+While explicit power management provides the mechanism for changing
+power states, it does not specify a policy.
+This does not represent a large problem for the simple case
+of *dedicated* devices, but can become crucial for non-trivial cases 
+involving complex interdependencies between devices controlled by multiple 
+clients.
+
+For example, if component *A* is a client of both component *B* 
+and component *C*, what happens with *B* and *C* if
+``StdControl.stop()`` is called on component *A* ? Should components
+*B* and *C* also be stopped?  What about the reverse case where both 
+*B* and *C* are clients of the single shared component, *A*?  If 
+devices *B* and *C* are shut off, should *A* be shut off as well?  
+How can one decide when it is appropriate to cascade such powerup
+and powerdown requests?
+
+The complex nature of the problem is evident from the number of
+unexpected behaviors in TinyOS 1.x involving ``StdControl``. On several
+platforms, one of the SPI buses is shared between the radio and the
+flash device. On some of them, issuing ``StdControl.stop()`` on the
+radio results in a series of cascaded calls that result in SPI bus 
+becoming disabled, rendering the communication with the flash impossible. 
+Of course, the right policy would involve tracking the clients of the 
+SPI bus and powering it off only once both the radio and the flash 
+devices were no longer using it. Conversely, the SPI bus should be
+powered on whenever there is at least one active client.
+
+The selection of the right power management policy to use is a complex 
+task that depends on the nature of the devices in use, their 
+interdependency, as well as on any specific application requirements. 
+For cases when some of these features are known a-priori or are 
+restricted in some sense, it is preferable that the system provide 
+architectural support for enforcing a meaningful *default* power-management 
+policy instead of passing that task on to the application programmer to be 
+solved on a case-by-case basis.  The following section discusses these power
+management policies and the components that implement them in greater detail.
+
+
+4.1. Power Management Policies
+----------------------------------------------------------------------------
+
+Just as generic arbiters are offered in TinyOS 2.x to provide the
+arbitration functionality required by shared resources, generic power
+management policies are also offered to allow the power management of
+non-virtualised devices to be automatically controlled.
+
+Through the use of the arbiter components described in [TEP108]_,
+device drivers implemented as shared resources provide the type of
+restricted resource interdependency where default power-management
+policies can be offered. The shared resource class defined in Section
+2.3 of [TEP108]_, provides a well defined component interdependency,
+where a single resource is shared among multiple clients. This
+relationship enables the definition of default power-management
+policies that can be used to automatically power the resource on and
+off.
+
+The *Power Manager* component implementing one of these polices acts as
+the *default owner* of the shared resource device and interacts with it
+through the use of the ResourceDefaultOwner interface::
+
+  interface ResourceDefaultOwner {
+    async event void granted();
+    async command error_t release();
+    async command bool isOwner();
+    async event void requested();
+    async event void immediateRequested();
+  }
+    
+Acting as the default owner, the *Power Manager* waits for the
+``ResourceDefaultOwner.granted()`` event to be signaled in order to
+gain ownership over the resource device.
+
+Once it owns the device, the *Power Manager* is free to execute its
+power-management policy using the StdControl-like interface provided by the 
+underlying resource. Different power managers can implement different 
+policies. In the simplest case, this would involve an immediate power-down
+via one of the ``stop()`` commands. When the power-state transition 
+involves non-negligible costs in terms of wake-up latency or power 
+consumption, the *PowerManager* might revert to a more intelligent 
+strategy that tries to reduce these effects. As pointed out in the 
+introduction, one such strategy might involve the use of a timer to defer 
+the power-down of the resource to some later point in time, giving any 
+resource clients a window of opportunity to put in requests before the 
+device is fully shut down.
+
+Regardless of the power management policy in use, the *Power Manager* 
+remains owner of the resource as long as the resource is not requested 
+by one of its clients.  Whenever a client puts in a request, the
+*Power Manager* will receive a ``ResourceDefaultOwner.requested()`` event 
+(or ``immediateRequested()`` event) from the arbiter it is associated with. 
+Upon receiving this event, the *Power Manager* MUST power up the 
+resource through the StdControl-like interface provided by the lower level
+abstraction of the physical device. The *Power Manager* MUST release the
+ownership of the resource (using the ``ResourceDefaultOwner.release()``
+command) and MUST wait until after the resource has been fully powered on 
+before doing so.
+
+Modeling devices as shared resources and allowing them to be
+controlled in the way described here, solves the problems outlined in
+section 3 regarding how to keep track of when and how the
+powerdown of nested resources should proceed.  The *Power Manager*
+component answers the question of how, and the combination of the power
+management policy being used and the reception of the
+``ResourceDefaultOwner.granted()`` and ``ResourceDefaultOwner.requested()``
+events answers the question of when.  As long as the resource at
+the bottom of a large set of nested resource clients has been fully released,
+the power mananger will be able to power down the resource appropriately.
+
+Using the model described above, a resource that uses one of these policies 
+according to the *implicitly power management* model could be built as shown below::
+
+  module MyFlashP {
+    provides {
+      interface Init;
+      interface SplitControl;
+      interface Resource;
+      interface FlashCommands;
+      ...
+    }
+  }
+  implementation {
+    ...
+  }     
+
+  generic module PowerManagerC(uint8_t POWERDOWN_DELAY) {
+    provides {
+      interface Init;
+    }
+    uses {
+      interface SplitControl;
+      interface ResourceDefaultOwner;
+    }
+  }
+  implementation {
+    ...
+  }
+
+  #define MYFLASH_RESOURCE "MyFlash.resource"
+  #define MYFLASH_POWERDOWN_DELAY	1000
+  configuration MyFlashC {
+    provides {
+      interface Init;
+      interface Resource;
+      interface FlashCommands;
+    }
+  }
+  implementation {
+    components new PowerManagerC(MYFLASH_POWERDOWN_DELAY)
+    , FcfsArbiter(MYFLASH_RESOURCE)
+    , MyFlashP;
+
+    Init = MyFlashP;
+    Resource = FcfsArbiter; 
+    FlashCommands = MyFlashP;
+
+    PowerManagerC.ResourceDefaultUser -> FcfsArbiter;
+    PowerManagerC.SplitControl -> MyFlashP;
+    
+  }
+     
+
+This example implementation is built out of three components.  The
+first component (``MyFlashP``) follows the *explicit power management*
+model for defining the interfaces to the physical flash device.  The
+second component (``PowerManagerC``) is the generic *Power Manager*
+component that will be used to implement the specific power management
+policy for this device.  The third component (``MyFlashC``) is the
+configuration file that wires together all of the components required
+by the implementation of of the device as it adheres to the *implicit power
+management* model.  It includes the ``MyflashP`` and ``PowerManagerC``
+components, as well as an arbiter component for managing shared clients
+of the device.  Notice how the *Power Manager* is wired to both the
+``ResourceDefaultUser`` interface provided by the arbiter, and the
+``SplitControl`` interface provided by the flash.  All clients of this flash 
+device are directly connected to the resource interface provided by
+the arbiter.  As outlined above, the ``PowerManagerC`` component will use
+the events signaled through the ``ResourceDefaultUser`` interface to determine 
+when to make calls to power the device up and power it down through
+the ``SplitControl`` interface.
+
+
+4.2. Example Power Managers: PowerManagerC and DeferredPowerManagerC
+----------------------------------------------------------------------------
+
+TinyOS 2.x currently has two default power management policies
+that it provides.  These policies are implemented by the various 
+components located under tinyos-2.x/lib/power. The first policy 
+is implemented using an *immediate* power control scheme, whereby
+devices are powered on and off immediately after they have been
+requested and released.  The second policy is implemented using
+a *deferred* power control scheme, whereby devices are powered 
+on immediately after being requested, but powered off after
+some small delay from being released. This delay is configurable
+to meet the varying needs of different device drivers.  
+
+Each policy has three different implementations for use by each of 
+the ``StdControl``, ``SplitControl``, and ``AsyncStdControl``
+interfaces.
+
+For reference, each of the available components are listed below
+
+Immediate Power Management:
+ - ``StdControlPowerManagerC``
+ - ``SplitControlPowerManagerC``
+ - ``AsyncStdControlPowerManagerC``
+ 
+Deferred Power Management:
+ - ``StdControlDeferredPowerManagerC``
+ - ``SplitControlDeferredPowerManagerC``
+ - ``AsyncStdControlDeferredPowerManagerC``
+ 
+
+5. Author's Address
+====================================================================
+| Kevin Klues
+| 444 Gates Hall
+| Stanford University
+| Stanford, CA 94305-9030
+|
+| email - klueska@cs.stanford.edu
+|
+| Vlado Handziski
+| Sekr FT5
+| Einsteinufer 25
+| 10587 Berlin
+| GERMANY
+|
+| phone - +49 30 314 23831
+| email - handzisk@tkn.tu-berlin.de
+|
+| Jan-Hinrich Hauer
+| Sekr FT5
+| Einsteinufer 25
+| 10587 Berlin
+| GERMANY
+|
+| phone - +49 30 314 23813
+| email - hauer@tkn.tu-berlin.de
+|
+| Philip Levis
+| 358 Gates Hall
+| Stanford University
+| Stanford, CA 94305-9030
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu 
+
+6. Citations
+====================================================================
+
+.. [TEP102] TEP 102: Timers.
+.. [TEP108] TEP 108: Resource Arbitration.
+.. [TEP112] TEP 112: Microcontroller Power Management.
+
diff --git a/doc/txt/tep116.txt b/doc/txt/tep116.txt
new file mode 100644
index 00000000..50cfdcbd
--- /dev/null
+++ b/doc/txt/tep116.txt
@@ -0,0 +1,699 @@
+============================
+Packet Protocols
+============================
+
+:TEP: 116 
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: > 2.1
+:Author: Philip Levis
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+============================================================================
+
+The memo documents the interfaces used by packet protocol components in  
+TinyOS 2.x as well as the structure and implementation of ActiveMessageC, 
+the basic data-link HIL component. It also documents the virtualized
+active message interfaces AMSenderC and AMReceiverC.
+
+1. Introduction
+============================================================================
+
+Sensor nodes are network-centric devices. Much of their software
+complexity comes from network protocols and their interactions.
+In TinyOS, the basic network abstraction is an *active message*,
+a single-hop, unreliable packet. Active messages have a destination
+address, provide synchronous acknowledgements, and can be of
+variable length up to a fixed maximum size. They also have a 
+type field, which is essentially a protocol identifier for
+components built on top of this abstraction.
+
+In TinyOS 1.x, the component GenericComm provides interfaces for
+transmitting and receiving active messages::
+
+  configuration GenericComm {
+    provides {
+      interface StdControl as Control;
+      interface SendMsg[uint8_t id];
+      interface ReceiveMsg[uint8_t id];
+      command uint16_t activity();
+    }
+    uses {
+      event result_t sendDone();
+    }
+  }
+
+This component, while simple, has several issues. First, it has the
+activity() commmand, which does not have a single caller in the entire
+TinyOS tree. This command requires GenericComm to allocate a 
+timer, wasting CPU cycles and RAM. 
+
+Second, it does not allow a node to receive packets besides
+those destined to it.  Several network
+protocols (e.g., MintRoute [1]_, TAG [2]_) take advantage 
+of snooping on these packets for a variety of improvements in efficiency or
+performance. This has led to the creation of GenericCommPromiscuous,
+whose Receive interface does not distinguish
+between packets received that were addressed to the node and
+packets received that were addressed to other nodes. Choosing
+one of the two implementations is a global decision across
+an application. There is a way to enable both reception
+semantics at the same time for a different protocols, 
+but they require a creative use of default event handlers.
+
+Third, it assumes that components will directly access the packet
+structure, the accepted approach in TinyOS 1.x. However, directly
+accessing packet structures introduces unforseen dependencies:
+a component that names a header field, for example, binds itself
+to data link layers that have a field with that name. Similarly,
+components on top of GenericComm directly access the data payload
+of a packet.
+
+TEP 111 documents the structure of a TinyOS 2.x packet buffer [3]_.
+This TEP documents the interfaces used to access packet buffers,
+as well as ActiveMessageC, the basic data-link packet communication
+HIL.
+
+2. Communication interfaces
+============================================================================
+
+Packet-level communication has three basic classes of interfaces.
+*Packet* interfaces are for accessing message fields and payloads. 
+*Send* interfaces are for transmitting packets, and are
+distinguished by their addressing scheme. 
+The *Receive* interface is for handling packet reception events.
+Finally, depending on whether the protocol has a dispatch identifier
+field, the Receive and Send interfaces may be parameterized in order
+to support multiple higher-level clients.
+
+2.1 Packet interfaces
+--------------------------------------------------------------------
+
+The basic TinyOS 2.x message buffer type is message_t, which is 
+described in TEP 111. message_t right-justifies data-link
+headers to the data payload so that higher-level components can 
+pass buffers between different data link layers without having
+to move data payloads. This means that the data payload of a 
+data link frame is always at a fixed offset of a message_t.
+
+Once protocols layer on top of each other, the data
+payload for components on top of the data link layer are
+no longer at a fixed offset. Where a component can put its 
+header or data depends on what headers underlying components
+introduce. Therefore, in order to be able to find out where
+it can put its data, it must query the components below it.
+The Packet interface defines this mechanism::
+
+  interface Packet {
+    command void clear(message_t* msg);
+    command uint8_t payloadLength(message_t* msg);
+    command void setPayLoadLength(message_t* msg, uint8_t len);
+    command uint8_t maxPayloadLength();
+    command void* getPayload(message_t* msg, uint8_t len);
+  }
+
+A component can obtain a pointer to its data region within a packet by
+calling ``getPayload()``. A call to this command includes the length
+the caller requires. The command ``maxPayloadLength`` returns the
+maximum length the payload can be: if the ``len`` parameter to
+``getPayload`` is greater than the value ``maxPayloadLength`` would
+return, ``getPayload`` MUST return NULL.
+
+
+A component can set the payload length with ``setPayLoadLength.`` A
+component can obtain the size of the data region of packet in use with
+a call to ``payloadLength``. As Send interfaces always include a
+length parameter in their send call, ``setPayLoadLength`` is not
+required for sending, and so is never called in common use
+cases. Instead, it is a way for queues and other packet buffering
+components to store the full state of a packet without requiring
+additional memory allocation.
+
+The distinction between ``payloadLength`` and ``maxPayloadLength``
+comes from whether the packet is being received or sent. In the
+receive case, determining the size of the existing data payload is
+needed; in the send case, a component needs to know how much data it
+can put in the packet. By definition, the return value of
+``payloadLength`` must be less than or equal to the return value of
+``maxPayloadLength``.
+
+The Packet interface assumes that headers have a fixed size. It is
+difficult to return a pointer into the data region when its position
+will only be known once the header values are bound.
+
+The ``clear`` command clears out all headers, footers, and metadata
+for lower layers. For example, calling ``clear`` on a routing
+component, such as CollectionSenderC[4]_, will clear out the
+collection headers and footers. Furthermore, CollectionSenderC will
+recursively call ``clear`` on the layer below it, clearing out the
+link layer headers and footers. Calling ``clear`` is typically
+necessary when moving a packet across two link layers. Otherwise, the
+destination link layer may incorrectly interpret metadata from the
+source link layer, and, for example, transmit the packet on the wrong
+RF channel. Because ``clear`` prepares a packet for a particular link
+layer, in this example correct code would call the command on the
+destination link layer, not the source link layer.
+
+Typically, an incoming call to the Packet interface of a protocol has
+an accompanying outgoing call to the Packet interface of the component
+below it. The one exception to this is the data link layer. For
+example, if there is a network that introduces 16-bit sequence numbers
+to packets, it might look like this::
+
+  generic module SequenceNumber {
+    provides interface Packet;
+    uses interface Packet as SubPacket;
+  }
+  implementation {
+    typedef nx_struct seq_header {
+      nx_uint16_t seqNo;
+    } seq_header_t;
+
+    enum {
+      SEQNO_OFFSET = sizeof(seq_header_t),
+    };
+ 
+    command void Packet.clear(message_t* msg) {
+      void* payload = call SubPacket.getPayload(msg, call SubPacket.maxPayloadLength());
+      call SubPacket.clear();
+      if (payload != NULL) {
+        memset(payload, sizeof(seq_header_t), 0);
+      }
+    }
+
+    command uint8_t Packet.payloadLength(message_t* msg) {
+      return SubPacket.payloadLength(msg) - SEQNO_OFFSET;
+    }
+
+    command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+      SubPacket.setPayloadLength(msg, len + SEQNO_OFFSET);
+    }
+
+    command uint8_t Packet.maxPayloadLength() {
+      return SubPacket.maxPayloadLength(msg) - SEQNO_OFFSET;
+    }
+
+    command void* Packet.getPayload(message_t* msg, uint8_t len) {
+      uint8_t* payload = call SubPacket.getPayload(msg, len + SEQNO_OFFSET);
+      if (payload != NULL) {       
+        payload += SEQNO_OFFSET;
+      }
+      return payload;
+    } 
+  }
+
+
+The above example is incomplete: it does not include the code for
+the send path that increments sequence numbers. 
+
+In practice, calls to Packet are very efficient even if they 
+pass through many components before reaching the data link
+layer. nesC's inlining means that in almost all cases
+there will not actually be any function calls, and since payload
+position and length calculations all use constant offsets,
+the compiler generally uses constant folding to generate a 
+fixed offset. 
+
+The Packet interface provides access to the one field all packet
+layers have, the data payload. Communication layers can add additional
+header and footer fields, and may need to provide access to these
+fields. If a packet communication component provides access to header
+and/or footer fields, it MUST do so through an interface. The interface 
+SHOULD have a name of the form *XPacket*, where *X* is a name that
+describes the communication layer. For example, active message components
+provide both the Packet interface and the AMPacket interface. The latter
+has this signature::
+
+  interface AMPacket {
+    command am_addr_t address();
+    command am_addr_t destination(message_t* amsg);
+    command am_addr_t source(message_t* amsg);
+    command void setDestination(message_t* amsg, am_addr_t addr);
+    command void setSource(message_t* amsg, am_addr_t addr);
+    command bool isForMe(message_t* amsg);
+    command am_id_t type(message_t* amsg);
+    command void setType(message_t* amsg, am_id_t t);
+    command am_group_t group(message_t* amsg);
+    command void setGroup(message_t* amsg, am_group_t grp);
+    command am_group_t localGroup();
+  }
+
+
+The command address() returns the local AM address of the
+node. AMPacket provides accessors for its four fields, destination, 
+source, type and group. It also provides commands to set these 
+fields, for the same
+reason that Packet allows a caller to set the payload length.  Packet
+interfaces SHOULD provide accessors and mutators for all of their
+fields to enable queues and other buffering to store values in a
+packet buffer. Typically, a component stores these values in the
+packet buffer itself (where the field is), but when necessary it may
+use the metadata region of message_t or other locations.
+
+The group field refers to the AM group, a logical network identifier.
+Link layers will typically only signal reception for packets whose AM
+group matches the node's, which ``localGroup`` returns.
+
+2.2 Sending interfaces
+--------------------------------------------------------------------
+
+There are multiple sending interfaces, corresponding to different
+addressing modes. For example, address-free protocols, such as
+collection routing, provide the basic ``Send`` interface. Active
+message communication has a destination of an AM address, so
+it provides the ``AMSend`` interface.  This, for example, is the 
+basic, address-free Send interface::
+
+  interface Send {
+    command error_t send(message_t* msg, uint8_t len);
+    command error_t cancel(message_t* msg);
+    event void sendDone(message_t* msg, error_t error);  
+
+    command uint8_t maxPayloadLength();
+    command void* getPayload(message_t* msg, uint8_t len);
+  }
+
+while this is the AMSend interface::
+
+  interface AMSend {
+    command error_t send(am_addr_t addr, message_t* msg, uint8_t len);
+    command error_t cancel(message_t* msg);
+    event void sendDone(message_t* msg, error_t error);
+
+    command uint8_t maxPayloadLength();
+    command void* getPayload(message_t* msg, uint8_t len); 
+  }
+
+Sending interfaces MUST include these four commands and one event.
+The duplication of some of the commands in Packet is solely for ease
+of use: ``maxPayloadLength`` and ``getPayload`` MUST behave
+identically as ``Packet.maxPayloadLength`` and ``Packet.getPayload.``
+Their inclusion is so that components do not have to wire to
+both Packet and the sending interface for basic use cases.
+
+When called with a length that is too long for the underlying
+maximum transfer unit (MTU), the send command MUST return ESIZE.
+
+The ``Send`` and ``AMSend`` interfaces have an explicit queue of
+depth one. A call to ``send`` on either of these interfaces MUST 
+return EBUSY if a prior call to ``send`` returned SUCCESS but no
+``sendDone`` event has been signaled yet. More explicitly::
+
+  if (call Send.send(...) == SUCCESS &&
+      call Send.send(...) == SUCCESS) {
+     // This block is unreachable.
+  }
+
+Systems that need send queues have two options. They can
+use a QueueC (found in tos/system) to store pending packet pointers
+and serialize them onto sending interface, or they can introduce
+a new sending interface that supports multiple pending transmissions.
+
+The cancel command allows a sender to cancel the current transmission.
+A call to cancel when there is no pending sendDone event MUST return
+FAIL.  If there is a pending sendDone event and the cancel returns
+SUCCESS, then the packet layer MUST NOT transmit the packet and MUST
+signal sendDone with ECANCEL as its error code. If there is a pending
+sendDone event and cancel returns FAIL, then sendDone MUST occur as if
+the cancel was not called.
+
+2.3 Receive interface
+--------------------------------------------------------------------
+
+Receive is the interface for receiving packets. It has this signature::
+
+  interface Receive {
+    event message_t* receive(message_t* msg, void* payload, uint8_t len);
+  }
+
+The ``receive()`` event's ``payload`` parameter MUST be identical to
+what a call to the corresponding ``Packet.getPayload()`` would return,
+and the ``len`` parameter MUST be identical to the length that a call
+to ``Packet.getPayload`` would return. These parameters are for
+convenience, as they are commonly used by receive handlers, and their
+presence removes the need for a call to ``getPayload()``. Unlike Send,
+Receive does not have a convenience ``getPayload`` call, because doing
+so prevents fan-in. As Receive has only a single event, users of
+Receive can be wired multiple times.
+
+Receive has a *buffer-swap* policy. The handler of the event MUST
+return a pointer to a valid message buffer for the signaler to
+use. This approach enforces an equilibrium between upper and lower
+packet layers. If an upper layer cannot handle packets as quickly as
+they are arriving, it still has to return a valid buffer to the lower
+layer. This buffer could be the ``msg`` parameter passed to it: it
+just returns the buffer it was given without looking at it. Following
+this policy means that a data-rate mismatch in an upper-level
+component will be isolated to that component. It will drop packets,
+but it will not prevent other components from receiving packets. If an
+upper layer did not have to return a buffer immediately, then when an
+upper layer cannot handle packets quickly enough it will end up
+holding all of them, starving lower layers and possibly preventing
+packet reception.
+
+A *user* of the Receive interface has three basic options when it
+handles a receive event:
+
+  1) Return ``msg`` without touching it.
+  2) Copy some data out of ``payload`` and return ``msg``.
+  3) Store ``msg`` in its local frame and return a different ``message_t*`` for the lower layer to use.
+
+These are simple code examples of the three cases::
+
+  // Case 1
+  message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    return msg; 
+  }  
+
+  // Case 2
+  uint16_t value;
+  message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    if (len >= sizeof(uint16_t)) {
+      nx_uint16_t* nval = (nx_uint16_t*)payload;
+      value = *nval;
+    }
+    return msg;
+  }
+
+  //Case 3
+  message_t buf;
+  message_t* ptr = &buf;
+  message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    message_t* tmp = ptr;
+    ptr = msg;
+    post processTask();
+    return tmp;
+  }
+
+
+Because of case 3), a lower layer MUST respect the buffer swap semantics
+and use the pointer returned from ``receive``. The pointer passed as
+a parameter to ``receive`` MUST NOT be touched, used, or stored after
+the signaling of ``receive.``
+
+2.4 Dispatch
+--------------------------------------------------------------------
+
+A packet protocol MAY have a dispatch identifier. This generally manifests
+as the protocol component providing parameterized interfaces (rather than
+a single interface instance). A dispatch identifier allows multiple 
+services to use a protocol independently. If a protocol provides a
+dispatch mechanism, then each dispatch identifier SHOULD correspond to
+a single packet format: if an identifier corresponds to multiple packet
+formats, then there is no way to disambiguate them. Packets whose internal 
+structure depends on their fields (for example,
+a packet that has a control field which indicates which optional fields
+are present) do not pose such problems.
+
+3. HIL: ActiveMessageC
+============================================================================
+
+A platform MUST provide ActiveMessageC as a basic HIL to 
+packet-level communication.  ActiveMessageC provides a best-effort, 
+single-hop communication abstraction.  Every active message has a 
+16-bit destination address and an 8-bit type. There is one reserved 
+destination address, ``AM_BROADCAST_ADDR``, which has the value 
+of ``0xffff``. ActiveMessageC has the following signature::
+
+  configuration ActiveMessageC {
+    provides {
+      interface Init;
+      interface SplitControl;  
+
+      interface AMSend[uint8_t id];
+      interface Receive[uint8_t id];
+      interface Receive as Snoop[uint8_t id];
+ 
+      interface Packet;
+      interface AMPacket;
+      interface PacketAcknowledgements;
+    }
+  }
+
+The Receive interface is for packets destined to the node, while 
+the Snoop interface is for packets destined to other nodes. A 
+packet is destined for a node if its destination AM address is 
+either the AM broadcast address or an address associated with 
+the AM stack. Different link layers have different snooping 
+capabilities. The Snoop interface does not assume always-on 
+listening, for example, in the case of a TDMA or RTS/CTS data 
+link layer. By separating out these two interfaces, ActiveMessageC
+avoids the complications encountered in 1.x with regards to
+GenericComm vs. GenericCommPromiscuous.
+
+ActiveMessageC is usually just a configuration that has
+pass-through wiring to a chip-specific HAL active message
+implementation. The definition of ActiveMessageC is left
+to the platform for when a node has more than one
+radio. In this case, the platform decides how to map the
+basic packet abstraction to the hardware underneath. Approaches 
+include choosing one radio or having some form of address-based
+dispatch.
+
+
+4. AM Services: AMSenderC, AMReceiverC, AMSnooperC, AMSnoopingReceiverC
+============================================================================
+
+TinyOS 2.x provides four component single-hop communication
+virtualizations to applications:
+AMReceiverC, AMSnooperC, AMSnoopingReceiverC, and AMSenderC. Each is a
+generic component that takes an active message ID as a
+parameter. These components assume the existence of ActiveMessageC.
+
+4.1 Dispatch: ``am_id_t``
+--------------------------------------------------------------------
+
+Active messages have an 8-bit type field, which allows multiple
+protocols to all use AM communication without conflicting. Following
+the guidelines for protocol dispatch identifiers, each
+am_id_t used in a network SHOULD have a single packet format, so
+that the am_id_t, combined with the packet contents, are sufficient
+to determine the exact packet format.
+
+4.2 AMReceiverC
+--------------------------------------------------------------------
+
+AMReceiverC has the following signature::
+
+  generic configuration AMReceiverC(am_id_t t) {
+    provides{
+      interface Receive;
+      interface Packet;
+      interface AMPacket;
+    }
+  }
+
+AMReceiver.Receive.receive is signalled whenever the packet layer
+receives an active message of the corresponding AM type whose
+destination address is the local address or the broadcast
+address. Note that since Receive.receive swaps buffers, a program MUST
+NOT instantiate two AMReceivers with the same am_id_t and MUST NOT
+instantiate an AMReceiver and an AMSnoopingReceiver with the same
+am_id_t.
+
+4.3 AMSnooperC
+--------------------------------------------------------------------
+
+AMSnooper has an identical signature to AMReceiver::
+
+  generic configuration AMSnooperC(am_id_t t) {
+    provides{
+      interface Receive;
+      interface Packet;
+      interface AMPacket;
+    }
+  }
+
+AMSnooper.Receive.receive is signalled whenever the packet layer
+receives an active message of the corresponding AM type whose
+destination address is neither to the local address nor the broadcast
+address. Note that since Receive.receive swaps buffers, a program MUST
+NOT instantiate two AMSnoopers with the same am_id_t and MUST NOT
+instantiate an AMSnooper and an AMSnoopingReceiver with the same
+am_id_t.
+
+4.4 AMSnoopingReceiverC
+--------------------------------------------------------------------
+
+AMSnoopingReceiverC has an identical signature to AMReceiverC::
+
+  generic configuration AMSnoopingReceiverC(am_id_t t) {
+    provides{
+      interface Receive;
+      interface Packet;
+      interface AMPacket;
+    }
+  }
+
+AMSnoopingReceiverC.Receive.receive is signalled whenever the packet
+layer receives an active message of the corresponding AM type,
+regardless of destination address. Note that since Receive.receive
+swaps buffers, a program that instantiates an AMSnoopingReceiverC with
+a certain am_id_t MUST NOT instantiate another AMSnoopingReceiverC,
+AMSnooperC, or AMReceiverC with the same am_id_t.
+
+4.5 AMSenderC 
+--------------------------------------------------------------------
+
+AMSenderC has the following signature::
+
+  generic configuration AMSenderC(am_id_t AMId) {
+    provides {
+      interface AMSend;
+      interface Packet;
+      interface AMPacket;
+      interface PacketAcknowledgements as Acks;
+    }
+  }
+
+Because this is a send virtualization, AMSenderC.AMSend.send returns
+EBUSY only if there is a send request outstanding on this particular
+AMSenderC. That is, each AMSenderC has a queue of depth one. The exact
+order in which pending AMSenderC requests are serviced is undefined,
+but it MUST be fair, where fair means that each client with outstanding
+packets receives a reasonable approximation of an equal share of the 
+available transmission bandwidth.
+
+5. Power Management and Local Address
+============================================================================
+
+In addition to standard datapath interfaces for sending and
+receiving packets, an active message layer also has control interfaces.
+
+
+5.1 Power Management
+--------------------------------------------------------------------
+
+The communication virtualizations do not support power management.
+ActiveMessageC provides SplitControl for explicit power control.
+For packet communication to operate properly, a component in an 
+application has to call ActiveMessageC.SplitControl.start().
+The HAL underneath ActiveMessageC  MAY employ power management 
+techniques, such as TDMA scheduling or low power listening, when
+"on."
+
+5.2 Local Active Message Address
+--------------------------------------------------------------------
+
+An application can change ActiveMessageC's local AM address 
+at runtime. This will change which packets a node receives and
+the source address it embeds in packets. To change the local AM
+address at runtime, a component can wire to the component
+``ActiveMessageAddressC``. This component only changes the
+AM address of the default radio stack (AMSenderC, etc.); if
+a radio has multiple stacks those may have other components
+for changing their addresses in a stack-specific fashion.
+
+5. HAL Requirements
+============================================================================
+
+A radio chip *X* MUST have a packet abstraction with the following
+signature::
+
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface AMSend[am_id_t type];
+  provides interface Receive[am_id_t type];
+  provides interface Receive as Snoop[am_id_t type];
+  provides interface Packet;
+  provides interface AMPacket;
+  provides interface PacketAcknowledgments;
+
+
+The component SHOULD be named *XActiveMessageC*, where *X* is 
+the name of the radio chip. The component MAY have additional interfaces. 
+These interfaces can either be chip-specific or chip-independent. 
+
+6. message_t
+============================================================================
+
+Active messages are a basic single-hop packet abstraction. Therefore,
+following TEP 111 [3]_, all data link and active message headers
+MUST be in the ``message_header_t`` structure of message_t. This ensures
+that an active message received from one data link layer (e.g., the radio)
+can be passed to another data link layer (e.g., the UART) without
+shifting the data payload. This means that the ``message_header_t`` must
+include all data needed for AM fields, which might introduce headers
+in addition to those of the data link. For example, this is an example 
+structure for a CC2420 (802.15.4) header::
+
+  typedef nx_struct cc2420_header_t {
+    nx_uint8_t length;
+    nx_uint16_t fcf;
+    nx_uint8_t dsn;
+    nx_uint16_t destpan;
+    nx_uint16_t dest;
+    nx_uint16_t src;
+    nx_uint8_t type;
+  } cc2420_header_t;
+
+
+The first six fields (length through src) are all 802.15.4 headers. The
+type field, however, has been added to the header structure in order
+to support AM dispatch.
+
+7. Implementation
+============================================================================
+
+The following files in ``tinyos-2.x/tos/system`` provide reference 
+implementations of the abstractions described in this TEP.
+
+  * ``AMSenderC.nc``, ``AMReceiverC.nc``, ``AMSnooperC.nc``,
+    and ``AMSnoopingReceiverC.nc`` are implementations of 
+    virtualized AM services.
+  * ``AMQueueP`` provides a send queue of *n* entries for *n*
+    AMSenderC clients, such that each client has a dedicated entry.
+  * ``AMQueueImplP`` is the underlying queue implementation,
+    which is reusable for different clients (it is also used
+    in the serial stack [4]_).
+  * ``AMQueueEntryP`` sits on top of ``AMQueueP`` and stores
+    the parameters to ``AMSend.send`` in an outstanding
+    packet with the ``AMPacket`` interface.
+
+The following files in ``tinyos-2.x/tos/interfaces`` contain
+example implementations of packet protocol interfaces:
+
+  * ``Packet.nc`` is the basic interface that almost all
+    packet protocols provide.
+  * ``Send.nc`` is the transmission interface for address-free 
+     protocols.
+  * ``AMSend.nc`` is the transmission interface for AM address
+     send protocols.
+  * ``AMPacket.nc`` is the packet interface for AM-specific
+    fields.
+
+An active messaging implementation for the CC2420 radio chip
+can be found in ``tos/chips/CC2420/CC2420ActiveMessageC.nc``.
+The micaz platform and telos family have an ``ActiveMessageC.nc``
+which exports the interfaces of ``CC2420ActiveMessageC``.
+
+8. Author's Address
+============================================================================
+
+| Philip Levis
+| 358 Gates Hall
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+
+9. Citations
+============================================================================
+
+.. [1] The MintRoute protocol. ``tinyos-1.x/tos/lib/MintRoute``. Also, A. Woo, T. Tong, and D. Culler. "Taming the Underlying Challenges of Reliable Multihop Routing in Sensor Networks." SenSys 2003.
+
+.. [2] Tiny AGgregation, one protocol of the TinyDB system.  ``tinyos-1.x/tos/lib/TinyDB``. Also, S. Madden and M. Franklin and J. Hellerstein and W. Hong. "TinyDB: An Acquisitional Query Processing System for Sensor Networks." Transactions on Database Systems (TODS) 2005.
+
+.. [3] TEP 111: message_t.
+
+.. [4] TEP 113: Serial Communication.
+
diff --git a/doc/txt/tep117.txt b/doc/txt/tep117.txt
new file mode 100644
index 00000000..8ea415c7
--- /dev/null
+++ b/doc/txt/tep117.txt
@@ -0,0 +1,313 @@
+============================
+Low-Level I/O
+============================
+
+:TEP: 117
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: Phil Buonadonna, Jonathan Hui
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+The memo documents the TinyOS 2.x interfaces used for controlling
+digital IO functionality and digital interfaces.
+
+
+1. Introduction
+====================================================================
+
+The canonical TinyOS device is likely to have a variety of digital
+interfaces. These interfaces may be divided into two broad
+categories. The first are general purpose digital I/O lines (pins) for
+individual digital signals at physical pins on a chip or platform. The
+second are digital I/O interfaces that have predefined communication
+protocol formats. The three buses covered in this document are the
+Serial Peripheral Interface (SPI), the Inter-Integrated Circuit (I2C)
+or Two-Wire interface, and the Universal Asynchronous
+Receiver/Transmitter (UART) interface. While there are likely other
+bus formats, we presume SPI, I2C, and UART to have the largest
+coverage.
+
+This memo documents the interfaces used for pins and the three buses.
+
+2. Pins
+====================================================================
+
+General Purpose I/O (GPIO) pins are single, versatile digital I/O
+signals individually controllable on a particular chip or
+platform. Each GPIO can be placed into either an input mode or an
+output mode. On some platforms a third 'tri-state' mode may exist, but
+this functionality is platform specific and will not be covered in
+this document.
+
+On many platforms, a physical pin may function as either a digital
+GPIO or another special function I/O such. Examples include ADC I/O or
+a bus I/O. Interfaces to configure the specific function of a pin are
+platform specific.
+
+The objective of the interfaces described here is not to attempt to
+cover all possibilities of GPIO functionality and features, but to
+distill down to a basis that may be expected on most platforms.
+
+In input mode, we assume the following capabilities:
+ * The ability to arbitrarily sample the pin
+ * The ability to generate an interrupt/event from either a rising edge or falling edge digital signal.
+ 
+In output mode, we assume the following capabilities:
+ * An I/O may be individually cleared (low) or set (hi)
+ 
+Platform that provide GPIO capabilities MUST provide the following HIL
+interfaces:
+
+ * GeneralIO
+ * GpioInterrupt
+
+Platforms MAY provide the following capture interface.
+
+ * GpioCapture
+
+2.1 GeneralIO 
+--------------------------------------------------------------------
+
+The GeneralIO HIL interface is the fundamental mechanism for controlling a
+GPIO pin. The interface provides a mechanism for setting the pin mode
+and reading/setting the pin value. The toggle function switches the
+output state to the opposite of what it currently is.
+ 
+Platforms with GPIO functionality MUST provide this interface. It
+SHOULD be provided in a component named GeneralIOC, but MAY be
+provided in other components as needed. ::
+
+ interface GeneralIO
+ {
+   async command void set();
+   async command void clr();
+   async command void toggle();
+   async command bool get();
+   async command void makeInput();
+   async command bool isInput();
+   async command void makeOutput();
+   async command bool isOutput();
+ }
+
+
+
+2.2 GpioInterrupt
+--------------------------------------------------------------------
+
+The GPIO Interrupt HIL interface provides baseline event control for a
+GPIO pin. It provides a mechanism to detect a rising edge OR a falling
+edge. Note that calls to enableRisingEdge and enableFallingEdge are
+NOT cumulative and only one edge may be detected at a time. There may
+be other edge events supported by the platform which MAY be exported
+through a platform specific HAL interface. ::
+ 
+ interface GpioInterrupt {
+ 
+   async command error_t enableRisingEdge();
+   async command bool isRisingEdgeEnabled();
+   async command error_t enableFallingEdge();
+   async command bool isFallingEdgeEnabled();
+   async command error_t disable();
+   async event void fired();
+ 
+ }
+
+
+2.3 GpioCapture
+--------------------------------------------------------------------
+
+The GpioCapture interface provides a means of associating a timestamp
+with a GPIO event. Platforms MAY provide this interface.
+
+Some platforms may have hardware support for such a feature. Other
+platforms may emulate this capability using the SoftCaptureC
+component. The interface makes not declaration of the precision or
+accuracy of the timestamp with respect to the associated GPIO
+event. ::
+
+ interface GpioCapture {
+ 
+   async command error_t captureRisingEdge();
+   async command bool isRisingEdgeEnabled();
+   async command error_t captureFallingEdge();
+   async command bool isFallingEdgeEnabled();
+   async event void captured(uint16_t time);
+   async command void disable();
+ 
+ }
+
+
+3. Buses
+====================================================================
+
+Bus operations may be divided into two categories: data and
+control. The control operations of a particular bus controller are
+platform specific and not covered here. Instead, we focus on the data
+interfaces at the HIL level that are expected to be provided.
+
+3.1 Serial Peripheral Interface
+--------------------------------------------------------------------
+
+The Serial Peripheral Interface (SPI) is part of a larger class of
+Synchronous Serial Protocols.  The term SPI typically refers to the
+Motorola SPI protocols. Other protocols include the National
+Semiconductor Microwire, the TI Synchronous Serial Protocol and the
+Programmable Serial Protocol. The dataside interfaces here were
+developed for the Motorola SPI format, but may work for others.
+
+Platforms supporting SPI MUST provide these interfaces.
+
+Of note, the interfaces DO NOT define the behavior of any chip select
+or framing signals. These SHOULD determined by platform specific HAL
+interfaces and implementations.
+
+
+The interface is split into a synchronous byte level and an
+asynchronous packet level interface. The byte level interface is
+intended for short transactions (3-4 bytes) on the SPI bus. ::
+
+ interface SpiByte {
+   async command uint8_t write( uint8_t tx );
+ }
+
+The packet level interface is for larger bus transactions. The
+pointer/length interface permits use of hardware assist such as
+DMA. ::
+
+ interface SpiPacket {
+   async command error_t send( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len );
+   async event void sendDone( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len,
+                              error_t error );
+ }
+
+3.2 I2C
+--------------------------------------------------------------------
+
+The Inter-Integrated Circuit (I2C) interface is another type of
+digital bus that is often used for chip-to-chip communication. It is
+also known as a two-wire interface.
+
+The I2CPacket interface provides for asynchronous Master mode
+communication on an I2C with application framed packets. Individual
+I2C START-STOP events are controllable which allows the using
+component to do multiple calls within a single I2C transaction and
+permits multiple START sequences
+
+Platforms providing I2C capability MUST provide this interface. ::
+
+ interface I2CPacket<addr_size> {
+   async command error_t read(i2c_flags_t flags, uint16_t addr, uint8_t length, u int8_t* data);
+   async event void readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data);
+   async command error_t write(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data);
+   async event void writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
+ }
+
+The interface is typed according to the addressing space the
+underlying implementation supports.  Valid type values are below. ::
+
+  TI2CExtdAddr - Interfaces uses the extended (10-bit) addressing mode. 
+  TI2CBasicAddr - Interfaces uses the basic (7-bit) addressing mode.
+
+The i2c_flags_t values are defined below. The flags define the
+behavior of the operation for the call being made. These values may be
+ORed together. ::
+
+  I2C_START    - Transmit an I2C STOP at the beginning of the operation.
+  I2C_STOP     - Transmit an I2C STOP at the end of the operation. Cannot be used
+                 with the I2C_ACK_END flag.
+  I2C_ACK_END  - ACK the last byte sent from the buffer. This flags is only valid 
+                 a write operation. Cannot be used with the I2C_STOP flag.
+
+
+3.3 UART
+--------------------------------------------------------------------
+
+The Universal Asynchronous Receiver/Transmitter (UART) interface is a
+type of serial interconnect. The interface is "asynchronous" since it
+recovers timing from the data stream itself, rather than a separate
+control stream. The interface is split into an asynchronous multi-byte
+level interface and a synchronous single-byte level interface.
+
+The multi-byte level interface, UartStream, provides a split-phase
+interface for sending and receiving one or more bytes at a time. When
+receiving bytes, a byte-level interrupt can be enabled or an interrupt
+can be generated after receiving one or more bytes. The latter is
+intended to support use cases where the number of bytes to receive is
+already known. If the byte-level receive interrupt is enabled, the
+receive command MUST return FAIL. If a multi-byte receive interrupt is
+enabled, the enableReceiveInterrupt command MUST return FAIL. ::
+
+ interface UartStream {
+   async command error_t send( uint8_t* buf, uint16_t len );
+   async event void sendDone( uint8_t* buf, uint16_t len, error_t error );
+   
+   async command error_t enableReceiveInterrupt();
+   async command error_t disableReceiveInterrupt();
+   async event void receivedByte( uint8_t byte );
+   
+   async command error_t receive( uint8_t* buf, uint8_t len );
+   async event void receiveDone( uint8_t* buf, uint16_t len, error_t error );
+ }
+
+The single-byte level interface, UartByte, provides a synchronous
+interface for sending and receiving a single byte. This interface is
+intended to support use cases with short transactions. Because UART is
+asynchronous, the receive command takes a timeout which represents
+units in byte-times, after which the command returns with an
+error. Note that use of this interface is discouraged if the UART baud
+rate is low. ::
+ 
+ interface UartByte {
+   async command error_t send( uint8_t byte );
+   async command error_t receive( uint8_t* byte, uint8_t timeout );
+ }
+
+4. Implementation
+====================================================================
+
+Example implementations of the pin interfaces can be found in tos/chips/msp430/pins,
+tos/chips/atm128/pins, and tos/chips/pxa27x/gpio.
+
+Example implementations of the SPI interfaces can be found in tos/chips/msp430/usart,
+tos/chips/atm128/spi, and tos/chips/pxa27x/ssp.
+
+Example implementations of the I2C interfaces can be found in tos/chips/msp430/usart,
+tos/chips/atm128/i2c, and tos/chips/pxa27x/i2c.
+
+Example implementations of the UART interfaces can be found in tos/chips/msp430/usart,
+tos/chips/atm128/uart/ and tos/chips/pxa27x/uart.
+
+
+5. Author's Address
+====================================================================
+
+| Phil Buonadonna
+| Arch Rock Corporation
+| 657 Mission St. Ste 600
+| San Francisco, CA 94105-4120
+|
+| phone - +1 415 692-0828 x2833
+|
+|
+| Jonathan Hui
+| Arch Rock Corporation
+| 657 Mission St. Ste 600
+| San Francisco, CA 94105-4120
+|
+| phone - +1 415 692-0828 x2835
+
+6. Citations
+====================================================================
+
+.. [tep113] TEP 113: Serial Communication.
diff --git a/doc/txt/tep118.txt b/doc/txt/tep118.txt
new file mode 100644
index 00000000..45ded9cf
--- /dev/null
+++ b/doc/txt/tep118.txt
@@ -0,0 +1,272 @@
+================================
+Dissemination of Small Values
+================================
+
+:TEP: 118 
+:Group: Net2 Working Group
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: Philip Levis and Gilman Tolle
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+The memo documents the interfaces, components, and semantics for
+disseminating small (smaller than a single packet payload) pieces of
+data in TinyOS 2.x.  Dissemination establishes eventual consistency
+across the entire network on a shared variable and tells an
+application when the variable changes. Common uses of this mechanism
+include network reconfiguration and reprogramming.
+
+
+1. Introduction
+====================================================================
+
+Dissemination is a service for establishing eventual consistency on a
+shared variable. Every node in the network stores a copy of this
+variable. The dissemination service tells nodes when the value
+changes, and exchanges packets so it will reach eventual consistency
+across the network. At any given time, two nodes may disagree, but
+over time the number of disagreements will shrink and the network will
+converge on a single value.
+
+Eventual consistency is robust to temporary disconnections or high
+packet loss. Unlike flooding protocols, which are discrete efforts
+that terminate and not reach consistency, dissemination assures that
+the network will reach consensus on the value as long as it is not
+disconnected.
+
+Depending on the size of the data item, dissemination protocols can
+differ greatly: efficiently disseminating tens of kilobytes of a
+binary requires a different protocol than disseminating a two-byte
+configuration constant. Looking more deeply, however, there are
+similarities. Separating a dissemination protocol into two parts ---
+control traffic and data traffic --- shows that while the data traffic
+protocols are greatly dependent on the size of the data item, the
+control traffic tends to be the same or very similar. For example, the
+Deluge binary reprogramming service disseminates metadata about the
+binaries. When nodes learn the disseminated metadata differs from the
+metadata of their local binary, they know they either have a bad
+binary or need a new one.
+
+Novelty is an explicit consideration in dissemination's consistency
+model: it seeks to have every node agree on the most recent version of
+the variable. In this way, a node can prompt the network to reach
+consistency on a new value for a variable by telling the network it is
+newer. If several nodes all decide to update the variable,
+dissemination ensures that the network converges on a single one of
+the updates.
+
+Consistency does not mean that every node will see every possible
+value the variable takes: it only means that the network will
+eventually agree on what the newest is. If a node is disconnected from
+a network and the network goes through eight updates to a shared
+variable, when it rejoins the network it will only see the most
+recent.
+
+Being able to disseminate small values into a network is a useful
+building block for sensornet applications. It allows an administrator
+to inject small programs, commands, and configuration constants.  For
+example, installing a small program through the entire network can be
+cast as the problem of establishing consistency on a variable that
+contains the program.
+
+The rest of this document describes a set of components and interfaces
+for a dissemination service included in TinyOS 2.0. This service only
+handles small values that can fit in a single packet. Larger values
+require different interfaces and abstractions.
+
+2. Dissemination interfaces
+====================================================================
+
+Small-value dissemination has two interfaces: DisseminationValue and
+DisseminationUpdate. The former is for consumers of a disseminated
+value, the latter is for producers. They are as follows::
+
+  interface DisseminationValue<t> {
+    command const t* get();
+    command void set(const t*);
+    event void changed(); 
+  }
+
+  interface DisseminationUpdate<t> {
+    command void change(t* newVal);
+  }
+
+
+These interfaces assume that the dissemination service allocates space
+to store the variable. In that way, multiple components can all access
+and share the same variable that the dissemination service establishes
+consistency over. A consumer can obtain a const pointer to the data
+through DissemnationValue.get(). It MUST NOT store this pointer, as it
+may not be constant across updates.  Additionally, doing so wastes
+RAM, as it can be easily re-obtained.  The service signals a changed()
+event whenever the dissemination value changes, in case the consumer
+needs to perform some computation on it or take some action.
+
+DisseminationValue has a command, ''set'', which allows a node to
+change its local copy of a value without establishing consistency.
+This command exists so a node can establish an initial value for the
+variable. A node MUST NOT call ''set'' after it has handled a
+''changed'' event, or the network may become inconsistent. If a node
+has received an update or a client has called ''change'' then set MUST
+NOT apply its new value.
+
+DisseminationUpdate has a single command, ''change'', which takes a
+pointer as an argument. This pointer is not stored: a provider of
+DisseminationUpdate MUST copy the data into its own allocated memory.
+DisseminationValue MUST signal ''changed'' in response to a
+call to ''change''.
+
+A dissemination protocol MUST reach consensus on the newest value in a
+network (assuming the network is connected).  Calling change
+implicitly makes the data item "newer" so that it will be disseminated
+to every node in the network. This change is local, however. If a node
+that is out-of-date also calls change, the new value might not
+disseminate, as other nodes might already have a newer value. If two
+nodes call change at the same time but pass different values, then the
+network might reach consensus when nodes have different values. The
+dissemination protocol therefore MUST have a tie-breaking mechanism,
+so that eventually every node has the same data value.
+
+3 Dissemination Service
+====================================================================
+
+A dissemination service MUST provide one component, DisseminatorC,
+which has the following signature::
+
+  generic configuration DisseminatorC(typedef t, uint16_t key) {
+    provides interface DisseminationValue <t>;
+    provides interface DisseminationUpdate <t>;
+  }
+
+The t argument MUST be able to fit in a single message_t [TEP111]
+after considering the headers that the dissemination protocol
+introduces.  A dissemination implementation SHOULD have a compile
+error if a larger type than this is used.
+
+As each instantiation of DisseminatorC probably allocates storage and
+generates code, if more than one component wants to share a
+disseminated value then they SHOULD encapsulate the value in a
+non-generic component that can be shared. E.g.::
+
+  configuration DisseminateTxPowerC {
+    provides interface DisseminationValue<uint8_t>;
+  }
+  implementation {
+    components new DisseminatorC(uint8_t, DIS_TX_POWER);
+    DisseminationValue = DisseminatorC;
+  }
+
+
+Two different instances of DisseminatorC MUST NOT share the same value
+for the ``key`` argument.
+
+4 Dissemination Keys
+====================================================================
+
+One issue that comes up when using these interfaces is the selection
+of a key for each value. On one hand, using unique() is easy, but this
+means that the keyspaces for two different compilations of the same
+program might be different and there's no way to support a network
+with more than one binary. On the other hand, having a component
+declare its own key internally means that you can run into key
+collisions that can't be resolved. In the middle, an application can
+select keys on behalf of other components.
+
+Ordinarily, dissemination keys can be generated by unique or selected
+by hand. However, these defined keys can be overridden by an
+application-specific header file. The unique namespace and the static
+namespace are separated by their most significant bit. A component
+author might write something like this::
+
+  #include <disseminate_keys.h>
+  configuration SomeComponentC { 
+    ...
+  }
+  implementation {
+  #ifndef DIS_SOME_COMPONENT_KEY
+    enum {
+      DIS_SOME_COMPONENT_KEY = unique(DISSEMINATE_KEY) + 1 << 15;
+    };
+  #endif
+    components SomeComponentP;
+    components new DisseminatorC(uint8_t, DIS_SOME_COMPONENT_KEY);
+    SomeComponentP.ConfigVal -> DisseminatorC; 
+  }
+
+To override, you can then make a disseminate_keys.h in your app
+directory::
+
+  #define DIS_SOME_COMPONENT_KEY 32
+
+Even with careful key selection, two incompatible binaries with
+keyspace collisions may end up in the same network. If this happens, a
+GUID that's unique to a particular binary MAY be included in the
+protocol. The GUID enables nodes to detect versions from other
+binaries and not store them. This GUID won't be part of the external
+interface, but will be used internally.
+
+5. More Complex Dissemination
+====================================================================
+
+An application can use this low-level networking primitive to build
+more complex dissemination systems. For example, if you want have a
+dissemination that causes only nodes which satisfy a predicate to
+apply a change, you can do that by making the <t> a struct that stores
+a predicate and data value in it, and layering the predicate
+evaluation on top of the above interfaces.
+
+6. Implementation
+====================================================================
+
+Two implementations of this TEP exist and can be found in
+``tinyos-2.x/tos/lib/net``. The first, Drip, can be found in
+''tinyos-2.x/tos/lib/net/drip''. The second, DIP, can be found in
+''tinyos-2.x/tos/lib/net/dip''. Both implementations are based on the
+Trickle algorithm[2]_. Drip is a simple, basic implementation that
+establishes an independent trickle for each variable. DIP uses a more
+complex approach involving hash trees, such that it is faster,
+especially when the dissemination service is maintaining many
+variables[3]_. This complexity, however, causes DIP to use more
+program memory.
+
+
+6. Author's Address
+====================================================================
+
+| Philip Levis
+| 358 Gates Hall
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+|
+|
+| Gilman Tolle
+| 2168 Shattuck Ave.
+| Arched Rock Corporation
+| Berkeley, CA 94704
+|
+| phone - +1 510 981 8714
+| email - gtolle@archedrock.com
+
+7. Citations
+====================================================================
+
+.. [1] TEP 111: message_t.
+
+.. [2] Philip Levis, Neil Patel, David Culler, and Scott Shenker. "Trickle: A Self-Regulating Algorithm for Code Maintenance and Propagation in Wireless Sensor Networks." In Proceedings of the First USENIX/ACM Symposium on Networked Systems Design and Implementation (NSDI 2004).
+
+.. [3] Kaisen Lin and Philip Levis. "Data Discovery and Dissemination with DIP." In Proceedings of the Proceedings of the Seventh International Conference on Information Processing in Wireless Sensor Networks (IPSN), 2008.
+
+ 
diff --git a/doc/txt/tep119.txt b/doc/txt/tep119.txt
new file mode 100644
index 00000000..f8723f31
--- /dev/null
+++ b/doc/txt/tep119.txt
@@ -0,0 +1,292 @@
+============================
+Collection
+============================
+
+:TEP: 119
+:Group: Net2 Working Group
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: > 2.1
+:Author: Rodrigo Fonseca, Omprakash Gnawali, Kyle Jamieson, and Philip Levis
+
+:Draft-Created: 09-Feb-2006
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+The memo documents the interfaces, components, and semantics used by
+the collection protocols in TinyOS 2.x. Collection provides
+best-effort, multihop delivery of packets to one of a set of
+collection points.  There may be multiple collection points in a
+network, and in this case the semantics are *anycast* delivery to at
+least one of the collection points. A node sending a packet does not
+specify which of the collection points the packet is destined to.  The
+union of the paths from each node to one or more of the collection
+points forms a set of trees, and in this document we assume that
+collection points are the roots of these trees.
+ 
+
+1. Introduction
+====================================================================
+
+Collecting data at a base station is a common requirement of sensor
+network applications. The general approach used is to build one or
+more collection trees, each of which is rooted at a base station. When
+a node has data which needs to be collected, it sends the data up the
+tree, and it forwards collection data that other nodes send to
+it. Sometimes, depending on the form of data collection, systems need
+to be able to inspect packets as they go by, either to gather
+statistics, compute aggregates, or suppress redundant transmissions.
+
+Collection provides best-effort, multihop delivery of packets to one
+of a network's tree roots: it is an *anycast* protocol. The
+semantics are that the protocol will make a reasonable effort to
+deliver the message to at least one of the roots in the network. By
+picking a parent node, a node implementing the collection protocol
+inductively joins the tree its parent has joined.  Delivery is best
+effort, and there can be duplicates delivered to one or more roots.
+Collection provides no ordering or real-time guarantees, although
+specific implementations may extend the basic functionality to do
+so.
+
+Given the limited state that nodes can store and a general need for
+distributed tree building algorithms, collection protocols encounter
+several challenges. These challenges are not unique to collection
+protocols. Instead, they represent a subset of common networking
+algorithmic edge cases that generally occur in wireless routing:
+
+  * Loop detection, for when a node selects one of its descendants as
+    a next hop.
+
+  * Duplicate suppression, detecting and dealing with lost
+    acknowledgments that can cause packets to replicate in the
+    network, wasting capacity.
+
+  * Link estimation, evaluating the link quality to single-hop
+    neighbors.
+
+  * Self-interference, preventing forwarding packets along the route
+    from introducing interference for subsequent packets.
+
+While collection protocols can take a wide range of approaches to
+address these challenges, the programming interface they provide is
+typically independent of these details. The rest of this document
+describes a set of components and interfaces for collection services.
+
+2. Collection interfaces
+====================================================================
+
+A node can perform four different roles in collection: sender (or
+source), snooper, in-network processor, and receiver (or
+root). Depending on their role, the nodes use different interfaces to
+interact with the collection component.
+
+The collection infrastructure can be multiplexed among independent
+applications, by means of a collection identifier. The collection
+identifier is used to identify different data traffic at the sender,
+intermediate-nodes, or the receiver, much like port number in TCP. All
+data traffic, regardless of the collection identifier, use the same
+routing topology.
+
+The nodes that generate data to be sent to the root are *senders*.
+Senders use the Send interface [1_] to send data to the root of
+the collection tree.  The collection identifier is specified as a
+parameter to Send during instantiation.
+
+The nodes that overhear messages in transit are *snoopers*. The
+snoopers use the Receive interface [1_] to receive a snooped
+message. The collection identifier is specified as a parameter
+to Receive during instantiation.
+
+The nodes can process a packet that is in transit. These in-network
+*processors* use the Intercept interface to receive and update a
+packet. The collection identifier is specified as a parameter to
+Intercept during instantiation. The Intercept interface has this
+signature::
+
+  interface Intercept {
+    event bool forward(message_t* msg, void* payload, uint8_t len);
+  }
+
+Intercept has a single event, Intercept.forward(). A collection
+service SHOULD signal this event when it receives a packet to forward.
+If the return value of the event is FALSE, then the collection layer
+MUST NOT forward the packet. The Intercept interface allows a higher
+layer to inspect the internals of a packet and suppress it if needed.
+Intercept can be used for duplicate suppression, aggregation, and
+other higher-level services. As the handler of Intercept.forward()
+does not receive ownership of the packet, it MUST NOT modify the
+packet and MUST copy data out of the packet which it wishes to use
+after the event returns.
+
+Root nodes that receive data from the network are *receivers*. Roots
+use the Receive interface [1_] to receive a message delivered by
+collection. The collection identifier is specified as a parameter to
+Receive during instantiation.
+
+The set of all roots and the paths that lead to them form the
+collection routing infrastructure in the network.  For any connected
+set of nodes implementing the collection protocol there is only one
+collection infrastructure, *i.e.*, all roots in this set active at the
+same time are part of the same infrastructure.
+
+The RootControl interface configures whether a node is a
+root::
+
+  interface RootControl {
+    command error_t setRoot();
+    command error_t unsetRoot();
+    command bool isRoot();
+  }
+
+The first two commands MUST return SUCCESS if the node is now in the
+specified state, and FAIL otherwise. For example, if a node is already
+a root and an application calls RootControl.setRoot(), the call will
+return SUCCESS. If setRoot() returns SUCCESS, then a subsequent call
+to isRoot() MUST return TRUE. If unsetRoot() returns SUCCESS, then a
+subsequent call to isRoot() MUST return FALSE.
+
+3 Collection Services
+====================================================================
+
+A collection service MUST provide one component, CollectionC,
+which has the following signature::
+
+  configuration CollectionC {
+    provides {
+      interface StdControl;
+      interface Send[uint8_t client];
+      interface Receive[collection_id_t id];
+      interface Receive as Snoop[collection_id_t];
+      interface Intercept[collection_id_t id];
+      interface RootControl;
+      interface Packet;
+      interface CollectionPacket;
+    }
+    uses {
+      interface CollectionId[uint8_t client];
+    }
+  }
+
+
+CollectionC MAY have additional interfaces. All outgoing invocations
+(commands for uses, events for provides) of those interfaces MUST have
+default functions. Those default functions enable CollectionC to
+operate properly even when the additional interfaces are not wired.
+
+Components SHOULD NOT wire to CollectionC.Send. The generic
+component CollectionSenderC (described in section 3.1) provides
+a virtualized sending interface.
+
+Receive, Snoop, and Intercept are all parameterized by
+collection_id_t. Each collection_id_t corresponds to a different
+protocol operating on top of collection, in the same way that
+different am_id_t values represent different protocols operating on
+top of active messages. All packets sent with a particular
+collection_id_t generally SHOULD have the same payload format, so that
+snoopers, intercepters, and receivers can parse them properly.
+
+ColletionC MUST NOT signal Receive.receive on non-root
+nodes. CollectionC MUST signal Receive.receive on a root node when a
+unique (non-duplicate) data packet successfully arrives at that
+node. It MAY signal Receive.receive when a duplicate data packet
+successfully arrives. If a root node calls Send, CollectionC MUST
+treat it as it if were a received packet.  Note that the buffer
+swapping semantics of Receive.receive, when combined with the pass
+semantics of Send, require that CollectionC make a copy of the buffer
+if it signals Receive.receive.
+
+If CollectionC receives a data packet to forward and it is not a root
+node, it MAY signal Intercept.forward. CollectionC MAY signal
+Snoop.receive when it hears a packet which a different node is
+supposed to forward. For any given packet it receives, CollectionC
+MUST NOT signal more than one of the Snoop.receive, Receive.receive,
+and Intercept.forward events.
+
+RootControl allows a node to be made a collection tree root.
+CollectionC SHOULD NOT configure a node as a root by default.
+
+Packet and CollectionPacket allow components to access collection
+data packet fields [1_].
+
+3.1 CollectionSenderC
+--------------------------------------------------------------------
+
+Collection has a virtualized sending abstraction, the generic
+component CollectionSenderC::
+
+  generic configuration CollectionSenderC(collection_id_t collectid) {
+    provides {
+      interface Send;
+      interface Packet;
+    }
+  }
+
+This abstraction follows a similar virtualization approach to
+AMSenderC [1_], except that it is parameterized by a collection_id_t
+rather than an am_id_t. As with am_id_t, every collection_id_t SHOULD
+have a single packet format, so that receivers can parse a packet
+based on its collection ID and contents. 
+  
+4. Implementation
+====================================================================
+
+Implementations of collection can be found in
+``tinyos-2.x/tos/lib/net/ctp`` and ``tinyos-2.x/tos/lib/net/lqi``.
+The former is the Collection Tree Protocol (CTP), described in TEP 123
+[2_]. The latter is a TinyOS 2.x port of MultihopLqi, a
+CC2420-specific collection protocol in TinyOS 1.x.
+
+5. Author Addresses
+====================================================================
+
+| Rodrigo Fonseca 
+| 473 Soda Hall
+| Berkeley, CA 94720-1776
+|
+| phone - +1 510 642-8919
+| email - rfonseca@cs.berkeley.edu
+|
+|
+| Omprakash Gnawali
+| Ronald Tutor Hall (RTH) 418 
+| 3710 S. McClintock Avenue
+| Los Angeles, CA 90089 
+|
+| phone - +1 213 821-5627
+| email - gnawali@usc.edu
+|
+|
+| Kyle Jamieson
+| The Stata Center
+| 32 Vassar St.
+| Cambridge, MA 02139 
+|
+| email - jamieson@csail.mit.edu
+|
+|
+| Philip Levis
+| 358 Gates Hall
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+
+
+6. Citations
+====================================================================
+
+.. [1] TEP 116: Packet Protocols.
+
+.. [2] TEP 123: The Collection Tree Protocol (CTP).
+
diff --git a/doc/txt/tep120.txt b/doc/txt/tep120.txt
new file mode 100644
index 00000000..aef8464e
--- /dev/null
+++ b/doc/txt/tep120.txt
@@ -0,0 +1,631 @@
+==============================================
+TinyOS Alliance Structure
+==============================================
+
+:TEP: 120
+:Group: Alliance Working Group 
+:Type: Informational
+:Status: Draft
+:TinyOS-Version: All
+:Authors: Philippe Bonnet, David Culler, Deborah Estrin, Ramesh Govindan, Mike Horton, Jeonghoon Kang, Philip Levis, Lama Nachman, Jack Stankovic, Rob Szewczyk, Matt Welsh, Adam Wolisz 
+:Draft-Created: 17-April-2006
+:Draft-Version: $Revision: 1.7 $
+:Draft-Modified: $Date: 2007-06-21 19:38:42 $
+:Draft-Discuss: TinyOS Alliance <tinyos-alliance at mail.millennium.berkeley.edu>
+
+
+.. Note::
+
+   This memo documents a blueprint for an open alliance aroung
+   TinyOS for the TinyOS Community and requests discussion and
+   suggestions for improvement.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo describes the goals and organization structure of the TinyOS Alliance.
+It covers membership, the working group forums for contribution, intellectual
+property, source licensing, and the TinyOS Steering Committee (TSC).
+
+1. Charter
+====================================================================
+
+.. TinyOS Alliance Charter::
+
+Formulate a legal and organizational framework for an alliance that
+can facilitate the continued advancement of the open embedded network
+ecosystem around TinyOS and support the activities, interactions, and
+development of the worldwide academic and industrial TinyOS community.
+
+2. Overview
+====================================================================
+
+This memo defines a blueprint and conceptual foundation for an open
+alliance that fulfills the above charter. It defines the following ten
+aspects of the alliance:
+
+   * Mission
+   * Legal structure
+   * Organizational structure
+   * Membership criteria
+   * Working group processes
+   * Election process
+   * Intellectual property
+   * Source licensing
+   * Funding
+   * Work products
+
+We (the Alliance) recognize that each of these aspects contributes to the 
+whole, is inter-related and needs to be consistent overall.  This document 
+attempts to address them sequentially, recognizing that each depends on the 
+others.  It draws on lessons from several related
+organizations, although each of these also has significantly
+different goals from those set out in the charter.
+
+1) IETF - Open protocols, technical documents 
+2) OSDL - Stable, Enterprise Linux
+3) Apache - Suite of open source tools
+4) Zigbee - Network layer and marketing for 15.4
+5) OSGI - Service layer
+6) FSF - Foundational software
+
+Examining the structure and policies of these organizations helps
+determine what the Alliance can borrow from them, what it must
+do differently, and why.  We (the Alliance) draw most strongly upon the 
+IETF, even though that organization was
+focused around creating and standardizing protocols, rather than
+developing a code base.  Its emphasis on rough consensus AND
+running code placed issues akin to those we face near the fore.  We
+share the view that technical excellence is a primary goal and that
+the organization should be structured to sustain and overall cohesive
+architecture.  In our case, it is represented by high quality
+reference implementations and standard APIs, as well as techical
+documents and protocols.  We share an emphasis on broad participation
+centered on the contributions of individual members.  
+
+We encourage industrial involvement, industrial development, and
+industrial support.  The organization is welcoming to companies, but
+it keeps financial support and marketing activities (while both
+important) at arms length from the technical process.  We share the
+concept that proper behavior of participants and member companies is
+most strongly shaped by code of ethics, captured in organization rules
+and social norms, rather than threats of legal repercussions.  The
+broader marketplace is a more effective enforcement body than any
+technical organization.  Thus, we ask that participants declare
+relevant intellectual proprt (IP) that they are aware of, rather than 
+force a strict
+accounting of potentially relevant IP.  We encourage the development
+of open solutions that are implemented without the need for particular
+proprietary IP.  In the IETF, this is addressed by the requirement of
+multiple interoperable implementations before standardization.  If
+such implementations can be developed without legal issues, it is
+likely that other non-infringing implementations are possible.  Like
+IETF, we seek a lean bureacracy and mostly volunteer organization.
+
+From OSDL, we share the goal of developing a stable, high quality
+version of an open source system.  This suggests that the alliance
+have a strong role in developing test suites and broadly accessible
+testbeds, as well as structures for sharing development resources.
+However, we avoid the OSDL structure of the scale of monetary
+contributions dictating technical oversite.  We are not constrained by
+a GPL license structure, as is the OSDL.
+
+From Apache, we draw the strong sense of a technical meritocracy
+centered on individual contributors.  We seek to permit a loose enough
+consortium that there can be a lot of individual innovation,
+especially in areas of tools, devices, and new platforms.  We also
+seek to retain the notion that credit should be given to authors.  In
+Apache, giving the copyright to the Apache organization exchanges the
+value of the brand for technical contributions.  For a broad alliance
+representing many universities and large companies, such a copyright
+scheme is likely to be an untenable barrier.  Instead, we seek to
+provide a simple source license regime with technical tools for giving
+credit and strong social pressure to comply.
+
+From Zigbee, we share the goal of providing marketing support for the
+accomplishments of the alliance and that we should seek to define
+standardized services, not just protocols.  We recognize that the
+alliance serves a useful function in being a point of allocation for
+various namespaces, but that this important function should not be a
+tool for extracting financial contributions.  We see the value of an
+IP pool to give confidence that the standard can be adopted without
+becoming entrapped later by IP terms, however, we also see that such a
+pool presents a very significant barrier.  Moreover, it does not
+prevent members from obtaining IP to use it to their advantage with
+other members of the alliance.  It also does not constrain non-members
+from obtaining blocking IP.  It does discourage contributions that
+might pull IP into the pool.  We prefer a process of declaration and
+multiple implementation. Section 7 goes deeper into how the Alliance
+manages the issues and complexities of IP in an open organization.
+
+3. Mission
+====================================================================
+
+The mission of the TinyOS Alliance is to provide a forum to facilitate:
+
+  * the continued growth of a healthy TinyOS developer and user community
+    with support for innovation as well as industry advancement, 
+  * the development and maintenance of a stable, technically-sound base of
+    TinyOS technology and surrounding tools through the creation of
+    standard interfaces and protocols, vetted extensions, open reference
+    implementations, technical documents, testing and verification suites,
+    and educational materials, 
+  * the contribution of innovative technology from a world-wide research 
+    community and the maturation and dissemination of these
+    contributions, and
+  * the promotion of the technology, the community, and the impact of networked 
+    embedded systems.
+
+
+4. Organizational Structure
+====================================================================
+
+The Alliance has a technical advisory function: guide the evolution of
+the TinyOS architecture, formulate and track progress of working
+groups, and provide an open and impartial process for technical
+documentation.  It also has an organizational advisory function:
+manage industry interaction, legal and IP issues, evolution of the
+organization itself, membership issues and so on.
+
+We follow an approach that starts small and grows the structure as
+needed. The focus should be on the working groups. Working groups are
+not limited to technical functions; they can be formed to promote
+developments, markets, etc. Beyond the working groups, the
+organization should remain lean, relying primarily on volunteers. We
+want to avoid creating a situation where the organization becomes
+focused on its own growth and pre-eminence at the expense of the
+larger community and technical agenda.
+
+Technical directions should be driven by merit and overall soundness,
+and built on consensus.
+
+The Alliance consists of a non-profit corporation with a Board of
+Directors, a small support staff (primarily volunteer or outsourced)
+and a Steering Committee. The Steering Committee oversees a collection
+of Working Groups, each with a Chair and Members.
+
+4.1 Steering Committee
+---------------------------------------------------------------
+
+In the steady state the Steering Committee will consist of the chairs
+of working groups plus a handful of elected members at large. Tenure
+of a position on the Steering Committee will consist of two years with
+opportunity for renewal. We want to see a vibrant, engaged, and
+constantly evolving leadership while allowing for long-term and
+committed members.
+
+Initially the steering committee would be formed from working group
+chairs plus some subset of the Alliance working group members.  This
+initial committee will be responsible for putting in place the
+membership and elections processes, which will then be utilized to
+form the regular Steering Committee.
+
+The primary role of the Steering Committee (SC) is to oversee the Working
+groups (WGs). This means establishing WG policy, providing appeals
+process, managing WG creation/extinction, arbitrating between WGs, and
+supervising activities to resolve conflicting directions and moving
+the process towards overall architectural coherence.
+
+The SC is also responsible for reviewing and approving all TinyOS 
+Enhancement Proposals (TEPs) that working groups generate. WGs
+submit TEPs to the SC for review. The SC should appoint one
+contributing Alliance member not affiliated with the corresponding WG
+to review the TEP. This reviewer, who may or may not be a member of
+the SC, may solicit comments from the community at large, but must
+also thoroughly review the submitted TEP. WGs must address any
+issues/questions brought up either by the reviewer or by other
+community members. Once the reviewer approves the revisions, he/she
+presents the TEP to the SC for approval by rough consensus. Finally,
+TEPs that affect the organizational structure of the Alliance must
+also be approved by the Board.
+
+Finally, the Steering Commitee will be responsible for determining the
+procedural elements of the Alliance. This includes election
+procedures, membership criteria, selection of venues, oversight of
+access to code repositories and Alliance web sites, and regular
+Alliance meetings that occur at least once a year.
+
+4.2 Working Groups
+-------------------------------------------------------
+
+The working groups form the core of the alliance. Each working
+group will have a chair who will be responsible for WG processes,
+reporting, meetings, and membership. Working groups and their
+functions are discussed in more detail in a later section.
+
+4.3 Board of Directors
+------------------------------------------------------- 
+
+The non-profit will require a Board of Directors responsible for
+corporate matters. 
+
+5. Membership and Participation
+====================================================================
+
+We desire to continue the TinyOS tradition of promoting broad
+membership.  This means that we want to keep barriers to entry low in
+all respects: legal, financial, and organizational.  As with IETF and
+Apache, we want to shape the organization as a meritocracy that
+encourages, promotes, and credits the contributions of its members.
+Companies have an essential role, but merit, not finances should
+dictate direction.  Membership and influence should recognize the
+importance of adopters, not just developers.
+
+The fundamental membership is individual, as individuals create work products,
+serve on working groups and committees, and vote.  We have two forms:
+
+  * Member: Individual who joins the Alliance and participates at a
+     basic level, typically as consumer of technology.
+
+  * Contributing Member: Individual who additionally joins working groups,
+    attends meetings, or contributes code or other assets to the
+    Alliance.   Contributing members are elected to various posts and
+    have voting rights.
+
+There is no individual membership fee, but members will be responsible for
+nominal registration fees at Alliance meetings.
+
+Corporations and organizations have institutional membership, which
+reflects their degree of effort.
+
+  * Institutional Member: A corporation or organization
+    that joins the Alliance, agrees to appear on the Alliance
+    web site and documents, and pays a nominal administrative fee.
+    (Min. Annual $500 for small companies and non-profits, $1000 for larger)
+
+  * Contributing Institutional Member: Corporation or institutional
+    organization that additionally provides financial support, resources,
+    facilities, technical contributions, intellectual property,
+    marketing support, or other meaningful contributions to the
+    Alliance. Such institutions are featured prominently in the Alliance and
+    have the opportunity to appoint individuals as contributing members.
+    (Min. Annual $2000 for small companies and non-profits, $5000 for larger)
+
+Rather than focusing on maximizing the financial contributions into
+the alliance, we are interested in maximizing the impact of the
+alliance in facilitating a healthy academic and industrial, research
+and production ecosystem around embedded network technology.
+
+The organization will be able to accept direct financial and
+intellectual property contributions.  The IP policy, described 
+in Section 7, should encourage
+corporate participation while preserving focus on soundness, merit,
+and consensus building.  Ultimately, we seek to promote a meritocracy
+that recognizess the contributions of the individuals, whether they
+be members of corporations, academic institutions, govermental
+institutions, or unaffiliated.
+
+6. Working Groups
+====================================================================
+
+There will be two forms of working groups. LONG-STANDING groups are
+chartered to develop important areas or subsystems.  For example, we
+expect longstanding groups on routing, management, platforms, testing,
+programming tools, and education.  SHORT-TERM groups have a fixed
+mandate to tackle a particular topic.  For example, there may be
+groups to develop a particular protocol, establish a policy or
+licensing format, or address a particular application capability.
+
+There will be two means of Working Group formation: grass roots and
+charter. Grass roots groups are formed by individuals or groups
+who have a preliminary version of something important and want to make
+it part of TinyOS.  They assemble and make a request to the SC with a
+proposed charter statement and chair.  Chartered groups are
+formed by SC or Board of Directors to address a recognized need for an
+important area of development.  The SC solicits members and chair with
+a particular charter in mind.  WGs may be formed for organizational or
+marketing goals, as well as technical goals.
+
+The typical output of a working group is technical documentation AND
+working code, including interface definitions and standard proposals.
+While this is the typical output, working groups are not constrained
+to this model, and can have a variety of purposes and work products.
+We seek to promote the development of standardized interfaces,
+protocols, services, and tools with high quality, open reference
+implementations of each.  We seek to have these standards be
+implementable without relying on particular proprietary intellectual
+property.  We are not interested in discouraging development of
+implementations that have excelled in various ways through proprietary
+IP, but standards should not require the use of such IP and should
+allow for multiple, interoperable implementations.  The Steering
+committee will be engaged in ratification of standards by actively
+participating in the community review process and document evolution.
+
+7. Intellectual Property
+====================================================================
+
+In general we want to promote the development, adoption and use of
+open technology.  We want to avoid having the advancement of embedded
+networks getting trapped into proprietary IP.  Accordingly, our IP
+policy builds heavily on the IETF model.  We also want to avoid a high
+barrier to participation.  Thus, we want to avoid demanding membership
+requirements that require extensive legal analysis and assessing deep
+strategic analysis before joining.  In particular, IP pooling or broad
+IP assignment requirements are seen to too large a barrier and
+discourage the active participation of members.  At the same time, we
+recognize that without such measures only, members cannot expect
+guarantees of IP rights.  We also want to avoid sponging IP from
+others or worse, having members or non-members running ahead of the
+Alliance and creating blocking IP.  In essence, all participants must
+operate with eyes open.  The Alliance encourage an open process, open
+standards, and open source with a clear code of ethics, but leaves
+broader issues of enforcement to the outside market.  Like IETF, we
+rely on disclosure of known IP of relevance, an open process, and a
+code of conduct.  Working groups are encourage to create work products
+that do not rely on proprietary IP for implementation.
+
+We also want to avoid requiring a member institution from having to
+conduct a complete inventory of IP holdings for potential relevance.
+This is impractical for Universities and large corporations.  It is
+the responsibility of the members to disclose IP or relvance, whether
+it is their property or not, so that they Alliance members can make
+informed decisions and trade-offs.
+
+Following the IETF, to establish a culture of openness, meeting
+discussions, presentations, and technical documents are
+non-confidential.  This simple measure is a signficant step towards
+establishing the culture of openness and it avoids large legal and
+organizational hassles, as evident in OSDL.
+
+As with the IETF, there will be a mechanism for contributing IP to the
+Alliance.  This will be treated along with other forms of contribution
+in establishing member status.
+
+Working Groups will be tasked to avoid forming standards and creating
+work products that fundamentally depend on proprietary IP, i.e., where
+the proposal can only reasonably be implemented using such IP.
+Members recognize that in making proposals, they are required by
+Alliance rules to disclose what IP they know to be relevant.  In the
+rare cases where a working group determines that IP dependent
+proposals are sufficiently critical that they be pursued, such IP must
+be available on reasonable and non-discriminatory (RAND) terms for the
+Steering Committee to be able to approve the action.
+
+Of course, Intellectual Property in the TinyOS alliance is closely
+tied to source licensing terms, as dicussed in greater detail in Section 8.
+As part of Alliance rules, members agree to only contribute 
+code that conforms to Alliance source license policy.  As part of
+keeping barriers to participation low, GPL and code based on
+potentially viral licensing terms must be carefully compartmentalized,
+explicit, and not present in core software.  It will typically involve
+development tools, such as the compilers and peripheral Linux-based
+devices. 
+
+8. Source Licensing
+====================================================================
+
+In general, we want to provide a mechanism where individuals and
+companies can easily contribute source, can utilize what is available,
+and can gain recognition for their efforts.  Following the TinyOS
+tradition, our source licensing policy will be most strongly aligned
+with BSD and its more modern variants.  We recognize several inherent
+tensions and trade-offs in formulating the source license.
+
+We want to give credit where credit is due.  Fundamentally, the
+community moves forward by contributing valuable technology and
+standing upon each other's shoulders, not on their feet.  Credit and
+respect drive a virtuous cycle of technical advance.  We do have
+several examples where companies, or even resarch institutions, have
+gained substantial benefit from the work of others while presenting it
+as their own.  This concern is partially addressed by GPL, where if
+you build upon the work of others you are obliged to put it back in
+the open.  Apache addresses this issue by requiring accreditation of
+the Apache foundation.  However, this is connected with a stiff
+membership requirement of signing the copyright to Apache.
+Participants make that sacrifice when they view the brand appeal
+associated with the Apache meritocracy as of sufficient value to
+warrant the arrangement.  Apache is also a loosely affiliated
+consortium of relatively localized projects, typically in very well
+established technical areas.  Our situation is different because we
+have many contributors to a cohesive whole and many of these
+contributors are at leading research institutions where copyright must
+rest with the host institution.  Moreover, much of the work is at the
+leading edge of technology.
+
+We recognize that the TinyOS "brand" is of value and will be
+increasingly so as the Alliance becomes more formal.  We do not want
+it tainted with its use as a marketing tool on inferior technology.
+Thus, we want to connect the use of the TinyOS term with membership,
+contribution, and conformance to Alliance rules and guidelines.
+
+We have the additional wrinkle that we are dealing primarily with
+embedded technology, which may have no visible user interface.  And,
+we have limited resources so carrying additional footprint for legal
+conformance is unattractive.
+
+Furthermore, many of our contributors are from organizations that have
+very precisely defined sets of acceptable source licensing terms.  As
+much as having a common license throughout the Alliance would make it
+easy for everyone to know the specific terms, getting diverse
+institutions to agree to common language is impractical.  We do,
+however, want to have as few distinct licenses with a little variation
+as possible.  Fortunately, we are seeing convergence in licenses,
+after several years of proliferation.
+
+To address these matters, the Alliance has a preferred source license
+based on the BSD framework, (the "new" BSD license approved by the
+Open Source Initiative [BSD]_ ) and a small set of accepted licenses, some
+of which have been gradfathered in with the existing code
+base. Contributions can be made using one of those accepted licenses,
+with the member organization name changed appropriately.
+Organizations can submit additional proposed licenses to the Steering
+Committee.  In order to avoid the debate of what constitutes "open
+source," the Steering Committee will generally only consider
+licenses approved by the Open Source Initiative (OSI) for inclusion in 
+the core.  However, being an 
+OSI-approved license is not a sufficient condition for approval
+within the Alliance. If a contributor
+wishes to use a completely new license, it can submit the license to
+the OSI first.
+
+We will not require that the Alliance hold copyright of submitted
+source code, but that it conform to Alliance guidelines.  These
+include guidelines for adding copyrights to existing sources.
+
+We will utilize the available development tools to facilitate the
+generation of a list of contributors associated with any particular
+instantiation of TinyOS components into an overall system,
+application, or distribution.  We will provide tools for registering
+contributors, copyrights, and applicable source licenses on line, for
+ease of reference.
+
+Alliance rules will set guidelines for giving credit to contributors
+in documentation, source, tools, web sites and so on.  We want to
+recognize the individuals and their host institutions, as well as the
+Alliance.  But we do not want to create a bureacratic nightmare that
+deters adoption, nor do we want to turn the Alliance into a policing
+organization.  Harsh and threatening legal terms that have no credible
+means of enforcement create a adversarial culture with little
+practical advantage.  Instead, the Alliance will utilize cultural
+norms and reputation as mechanisms for enforcing proper creditation.
+We will develop tools that make compliance relatively easy, reward
+those that do so, and provide a complaint mechanism to identify
+misuse.
+
+In taking this approach, we focus on needs of reference mplementations
+of standardized interfaces and protocols.  The Alliance is not the
+only vehicle for producing a hardened, tested, certified code base.
+To do so would require the Alliance host a large technical staff, as
+OSDL does.  Comapanies may do so, or produce implementations with
+enhanced performance, reliability, or efficiency using their own
+proprietary technology.  The Alliance encourages such innovation while
+promoting standardized interfaces that allow such technology to
+interoperate.
+
+9. Funding
+====================================================================
+
+Initially, we expect that there are no full time employees in the
+Alliance and that funding needs are limited to such items as lawyer's
+fees, web site costs, and insurance. If the Alliance eventually
+requires full time support personnel, the funding structure will have
+to be re-visited.
+
+As with the IETF, individuals are responsible for their own costs,
+which primarily involve meetings, travel, and generation of work
+products.  The Alliance is predominantly a volunteer organization.
+Membership participation will involve attendance at Alliance meetings.
+Registration fees will be charged to cover costs associated with
+adminstration of the meetings.
+
+To maintain the focus on technical excellence and meritocracy, we want
+to avoid the heavy-handed quid-pro-quo seen in many industrial
+consortiums where funding determines influence.  The best use of funds
+and the best form of influence is direct contribution to the work
+products of the Alliance.  To keep the structure of the Alliance and
+its operations minimalist and lean, membership focuses on desired
+impact and recognition, rather than control. We want the best way to
+influence the direction of the Alliance to be to contribute technical
+work and demonstrate leadership, rather than try to control what
+individuals can or cannot contribute.
+
+Companies and institutions are encouraged to contribute financial and
+in-kind support.  It will be essential that companies provide initial
+funding to create the legal structure and to establish basic IT
+capabilities to host the web site and working groups.  Institutional
+members will pay an annual membership fee. In some cases, a
+contributing corporate member may provide in-kind services such as
+lawyers' time used to draw up or comment on by-laws.  Targeted
+contributions will be solicited and encouraged. In this case the
+donator need not become a contributing corporate member, e.g., in
+those cases where such a membership may be prohibited or unwanted.
+The costs of meetings, such as the TinyOS technology exchange, will be
+covered through registration fees and not by institutional membership
+fees.
+
+10. Work Products
+====================================================================
+
+The broad mission of the Alliance calls for a broad range of 
+work products. 
+
+Foremost among these are a set of TEPs documenting systems and
+protocols as well as TEPs that provide guidance and knowledge to the
+community. Technical documentation will have robust and open reference
+implementations for the community to use, refine, improve, and
+discuss. These reference implementations will not preclude
+alternative, compatibile implementations which may have additional
+features or optimizations. The Alliance Working Groups will
+periodically produce periodic releases of these reference
+implementations for the community to use and improve.
+
+The Alliance will support community contributions of innovative
+extensions and systems by providing a CVS repository to store them.
+In order to keep these contributions organized for users, the Steering
+Committee may nominate one or more people to caretake the repository
+by setting minimal guidelines for the use of the directory structure
+and migrating code as it joins the core or falls into disuse.
+
+To make these technological resources more accessible and useful
+to a broad embedded networks community, the Alliance will be
+dedicated to providing a set of educational materials. This
+includes introductory tutorials, documentation of core systems,
+simple and complex example applications, and user guides.
+
+In addition to educational sample applications, whose purpose
+is to teach new developers about the internals and workings of
+the technology, the Alliance will develop and make available
+several end-user applications and tools. The goal is to improve
+the accessibility of the technology to end-users while 
+demonstrating its effectiveness. Historical examples of such applications
+include Surge and TinyDB. An important part of this effort is
+good documentation for users who are not expert programmers, as well
+as tools and graphical environments. 
+
+
+11. Conclusions
+====================================================================
+
+By focusing on consensus building and technical excellence, the
+Alliance seeks to avoid being a forum for political and economic
+positioning. It will achieve this by focusing on working groups and
+the contributions of individuals, while not taking strong positions on
+the benefits or drawbacks of different approaches.  The diverse
+requiremements of sensornet applications mean that having a suite of
+solutions, rather than a single one, is often not only desirable but
+essential.
+
+Over the past five years, low-power embedded sensor networks have
+grown from research prototypes to working systems that are being
+actively deployed. Furthermore, there is a vibrant research community
+that actively works to deploy these systems and collaborate with
+industry, making advances quickly accessible and usable. A great
+catalyst to this growth has been the presence of a large community
+around a shared, free code base.
+
+The time has come to create an organizational structure to 
+allow the effort to grow further. As sensornets become more widespread,
+contributions and advancements will be from an increasingly broad
+demographic of users, and bringing them all together will speed
+progress and improve the potential benefit these systems can bring
+to society. This focus on bringing disparate groups together lies
+at the heart of the Alliance. Rather than depend on strong requirements,
+it depends on broad collaboration and participation, placing a minimalist
+set of expectations that will encourage the exchange of ideas and
+technology.
+
+
+12. Authors' Address
+====================================================================
+
+| Philippe Bonnet <bonnet.p at gmail.com> 
+| David Culler <dculler at archrock.com>
+| Deborah Estrin 	<destrin at cs.ucla.edu> 
+| Ramesh Govindan <ramesh at usc.edu> 
+| Mike Horton 	<mhorton at xbow.com> 
+| Jeonghoon Kang 	<budge at keti.re.kr> 
+| Philip Levis    <pal at cs.stanford.edu>
+| Lama Nachman 	<lama.nachman at intel.com>
+| Jack Stankovic 	<stankovic at cs.virginia.edu>
+| Rob Szewczyk 	<rob at moteiv.com> 
+| Matt Welsh 	<mdw at cs.harvard.edu> 
+| Adam Wolisz 	<awo at ieee.org> 
+
+13. Citations
+====================================================================
+
+.. [BSD] http://www.opensource.org/licenses/bsd-license.php
+
+
diff --git a/doc/txt/tep121.txt b/doc/txt/tep121.txt
new file mode 100644
index 00000000..ff204338
--- /dev/null
+++ b/doc/txt/tep121.txt
@@ -0,0 +1,621 @@
+=============================
+Towards TinyOS for 8051
+=============================
+
+:TEP: 121
+:Group: TinyOS 8051 Working Group 
+:Type: Informational
+:Status: Draft 
+:TinyOS-Version: 1.x 
+:Author: Anders Egeskov Petersen, Sidsel Jensen, Martin Leopold
+
+:Draft-Created: 15-Dec-2005 
+:Draft-Version: 1 
+:Draft-Modified: 27-Mar-2006 
+:Draft-Discuss: TinyOS 8051 Working Group List <Tinyos-8051wg at mail.millennium.berkeley.edu>
+
+.. Note::
+   This memo is informational. It will hopefully be a basis for
+   discussions and suggestions for improvements.  Distribution of this
+   memo is unlimited.  This memo is in full compliance with TEP 1.
+
+Abstract
+====================================================================
+
+This TEP covers our effort of porting `TinyOS`_ to the nRF24E1
+platform. We ported the basic modules of TinyOS: Timer, UART, ADC and
+LEDS.
+
+
+1. Project Outline
+====================================================================
+
+The original 8 bit 8051 chip is a member of the `mcs51 family`_ and
+was developed in 1980 by Intel. It is still to this date one of the most
+widely used microcontrollers. Porting TinyOS to the 8051 System on chip
+architecture makes perfect sense - the mcs51 family has been thoroughly
+tested, it is relatively cheap and it has a reasonable small footprint -
+which makes it ideal for embedded solutions and sensor networks.
+
+For this work, we use a Nordic Semiconductor VLSI nRF24E1
+evaluation-board [NSC]. The board contains an Intel 8051 compatible MCU
+with 4KB program memory, a 16 MHz clock, 3 different Timers (one being
+8052 compatible), a 2.4 GHz wireless RF transceiver and 9 input 10 bit
+ADC, SPI and a RS232 Serial interface. The nRF24E1 board was chosen
+because the radio component matches the radio on the specially designed
+DIKU/DTU HogthrobV0 [HOG] boards used for research purposes at DIKU
+[PEH].
+
+We ported a subset of TinyOS for the 8051 platform consisting of the
+Timer, UART, ADC and LED modules. We did not port the radio module and
+the underlying SPI-bus code.
+
+This works attacks the two most immediate problems when porting TinyOS
+to 8051: the toolchain and the hardware abstraction components. The
+first problem when porting TinyOS to 8051-based platforms concerns the
+toolchain. The Gcc compiler does not support 8051. This is a major issue
+as the code generated by the NesC preprocessor is tailored for gcc.  The
+second problem concerns the hardware abstraction components that must be
+specialized to the 8051 idiosyncracies. In a perfect world, such a
+specialization should not require to modify any interface.
+Unfortunately, we needed to modify some of the interfaces to accomodate
+the 8051 features.
+
+This work was done under the supervision of Martin Leopold at University
+of Copenhagen.
+
+2. Project Approach
+====================================================================
+
+The approach to the porting project has been pragmatic. The focus has
+been on producing working code, so testing and debugging have been key
+elements of our work. The process has been to implement new
+functionality in small iterative steps and do testing simultaneously.
+
+To bootstrap the development without a JTAG module or alike, we built a
+small LED expansion board attachable to the port logic. The LEDs was an
+easy way to get instant low level test output. We also built a small
+stimulator based on a potentiometer (variable resistor) to get valid
+input from the ADC pins.
+
+The following TinyOS application programs have been written and tested:
+  * Empty - test of port logic and tool chain 
+  * mcsatomic - test of atomic and interrupts 
+  * mcsBlink - test of LEDs 
+  * mcsBlinkTimer - test of Timers using LEDs 
+  * mcsSerialTest - test of UART code, simple input/output one char 
+  * mcsSerialTest2 - test of multiple byte output 
+  * mcsTimerSerialTest - test of UART controlled by Timer interrupts 
+  * mcsADC - test of ADC code with Timer and LEDs
+
+
+3. Development Environment and Tool Chain
+====================================================================
+
+The following subsections describe the different development tools,
+their selection and interconnection. 
+
+3.1 Selection of Development Tools/Compilers
+--------------------------------------------------------------------
+
+A large number of 8051 compilers exist primarily for the DOS and Windows
+platforms. We have focused on two popular and regularly updated
+compilers: `KEIL`_ and the Small Device C Compiler (SDCC).
+
+`SDCC`_ is an open source project hosted on the Sourceforge website,
+whereas the KEIL C51 compiler is a commercial compiler and Integrated
+Development Environment (IDE). The debugger for SDCC (SDCDB) is still
+fairly experimental. The KEIL suite runs on the Windows platform, and
+has a good interactive debugger and simulator. KEIL and SDCC accepts
+roughly the same syntactical dialect, which eases the work of moving
+between the two compilers.
+
+During our work with SDCC and SDCDB we encountered numerous problems and
+bugs. SDCC 2.4.0 suddenly returned 'fatal compiler errors' with no
+apparent reason. After an update of SDCC from version 2.4.0 to 2.5.0
+(most recent release) the error disappeared, the code compiled, but it
+still did not work correctly on the board. We also discovered a serious
+problem regarding sign bits in SDCC 2.5.0. SDCC made a type error when
+reading a 32 bit signed value. Apparently SDCC did not interpret the
+sign bit correctly, so a very small negative number was interpreted as a
+very large positive number as if the value was unsigned. KEIL however
+interprets the value correctly. The bug was submitted by us and fixed by
+the SDCC development team in just two days, but the timer module still
+does not work using SDCC.
+
+Our attempts using SDCC's debugger/simulator (SDCDB) was equally
+troublesome. SDCDB simply stopped at address 0, and running or stepping
+through the code returned us to the UNIX prompt with no error message.
+Without SDCDB, we had no debug possibility and we were forced to rethink
+the tool chain. We decided to substitute SDCC with the KEIL development
+kit. This gave us a working debug environment - with minimal change to
+the already produced code. 
+
+3.1.1 Our Recommendation
+------------------------------------------------------------------- 
+
+In our experience the SDCC compiler and associated tools are not yet
+mature enough to support our development. We recommend pursuing other
+alternatives such as KEIL or other compiler suites.
+
+We continue to mention SDCC in the remaining text, because we encourage
+the use of open source software and cross-platform development. We hope
+SDCC will prove an reliable alternative in the future.
+
+3.2 Tool Chain Overview
+--------------------------------------------------------------------
+
+The following figure and sections are an overview of the current tool
+chain. The tool chain is based on TinyOS 1.x, NesC 1.1.3, avr-gcc 3.4.3,
+PERL v. 5.8.6 and SDCC 2.5.4 or KEIL C51 version 7.20.
+
+Each step in the tool chain will be explained in the section below. ::
+
+              Mangle-
+ TinyOS       script
+ -----> app.c -----> app_mangled.c --------> app.hex ------> nRF24E1 
+  NesC         PERL                SDCC/KEIL         nRFPROG
+
+
+3.3 Description of the Tool Chain
+--------------------------------------------------------------------
+
+The compilation of the TinyOS test program outputs two files, a
+'main.exe' file and an 'app.c' file. The 'app.c' file contains all the
+needed code to run the TinyOS application. However the C code produced
+by NesC cannot be compiled for the 8051 platform directly. 
+
+One solution could be to alter the syntax NesC produces for this
+specific platform, by modifying the source for NesC. However as a first
+step we chose not to make changes to NesC, but instead changed the
+content of the NesC output file 'app.c'. We inserted an extra step in
+the tool chain in the form of a mangle script. The mangle script works
+as the rope, tying the output from NesC to the input of SDCC or KEIL.
+
+After running the mangling script on the 'app.c' file we obtain an
+'app_mangled.c' file which can be compiled by either SDCC or KEIL. This
+produces a hex file that is transferred to the chip by the nRFPROG
+software.
+
+3.4 Description of the Mangling Script
+--------------------------------------------------------------------
+
+The mangling script is written in PERL, a commonly used general purpose
+scripting language with powerful pattern matching capabilities and
+extensive handling of regular expressions. The mangle script handles all
+currently known problems, and it can easily be expanded to handle
+additional alterations.
+
+To run the mangle script use the following syntax:
+
+"./sdccMangleAppC.pl -KEIL -file build/mcs51/app.c >
+  build/mcs51/app_mangled.c" 
+
+or 
+
+"./sdccMangleAppC.pl -SDCC -file build/mcs51/app.c > 
+  build/mcs51/app_mangled.c"
+
+The 'sdccMangleAppC.pl' script handles a number of needed alterations:
+
+  * it alters the SFR and SBIT declarations for SDCC and KEIL
+    respectively
+  * it convert 64 bit data types to 32 bit 
+  * it alters the reserved SDCC keyword data to _data 
+  * it removes inlining directives 
+  * it removes preprocessor line numbering 
+  * it alters $ in identifiers to underscore 
+  * it alters GCC interrupt declaration to SDCC syntax
+
+Each of these alterations will be explained in the sections below.
+
+3.4.1 SFR and SBIT Declarations
+--------------------------------------------------------------------
+
+In order to make TinyOS accept the 8051 special function registers (SFR)
+and special bit variables (SBIT), we have included them into the TinyOS
+8051 platform folder as a 8051.h file.
+
+SFRs are located on an address dividable by 8, whereas an SBIT addresses
+a specific bit within these SFR. 
+
+In order to make TinyOS accept the SFRs we have type defined them in the
+NesC code as:
+
+  typedef int sfr; 
+  sfr P0 __attribute((x80));
+
+which is altered to
+
+  //typedef int sfr;
+  sfr at 0x80 P0;
+
+for the SDCC compiler in the mangle script and
+
+  sfr P0 = 0x80;
+
+for the KEIL compiler and similar for the SBIT declarations.
+
+NOTE: The SDCC website refers to a PERL script (keil2sdcc.pl - last
+updated June 2003) for translating SFR and SBIT declarations from KEIL
+to SDCC, but it produces code with illegal syntax, so either do not use
+it, or alter it to produce code with the right syntax.
+
+3.4.2 SDCC/KEIL Data Types
+--------------------------------------------------------------------
+
+TinyOS and SDCC/KEIL do not support the same data types, so some
+alterations were needed to compile the code with SDCC and KEIL.
+
+SDCC/KEIL supports the following data types:
+  - char (8 bits, 1 byte)
+  - short (16 bits, 2 bytes)
+  - int (16 bits, 2 bytes)
+  - long (32 bit, 4 bytes)
+  - float (32 bit, 4 bytes).
+
+TinyOS supports an extra data type - 64 bit long long (u)int64_t. Since
+we are working with software that does not support this data type, on a
+very small hardware memory model, we decided to change the NesC 64 bit
+data types to 32 bit. This is done in the mangling script.
+
+3.4.3 Reserved Keywords in SDCC
+--------------------------------------------------------------------
+
+A number of keywords are reserved in SDCC. Half of them represent a
+directive to the compiler, defining which memory segment on the nRF24E1
+the specific lines of code refer to. To ensure that the developer does
+not break code by unintentionally and unaware of their effect use them
+fx. as a variable name in the NesC code, they need to be replaced or
+altered to something else, e.g. data to _data, before compiling for
+SDCC. Right now the mangle script only handles the reserved keyword
+data. None of the other keywords except SFR, SBIT and interrupt are
+currently in use in the code. This might pose as a problem to future
+work, but the mangle script can easily be expanded to handle misuse of
+the other keywords.
+
+However, if the code size increases significantly in the future, it
+might be nessecary to insert the keywords into the code, to support the
+architectures segmented memory model. Right now, everything is stored in
+the directly addressable memory segment, which is quite small.
+
+The reserved keywords are:
+  * data / near 
+  * xdata / far 
+  * idata / pdata 
+  * code 
+  * bit 
+  * SFR / SBIT 
+  * interrupt
+  * critical
+
+Variables declared with keyword storage class data/near will be
+allocated in the directly addressable portion of the internal RAM. This
+is the default option for the small memory model. Variables declared
+with storage class xdata/far will be placed in external RAM, which is
+default for the large memory model.
+
+Variables declared with keyword storage class idata will be allocated in
+the indirectly addressable portion of the internal RAM. The first 128
+byte of idata physically access the same RAM as the data memory. The
+original 8051 had 128 byte idata, but nowadays most devices have 256
+byte idata memory. Paged xdata access (pdata) is just as
+straightforward.
+
+The different memory segments that the keywords apply to, can be seen in
+the figure below.
+
+nRF24E1 Internal Data Memory Structure Overview::
+
+                        IRAM                  SFR
+                 +---------------------+---------------------+
+             FFh |                     |                     | FFh
+                 |   Accessible by     |   Accessible by     |
+ Upper 128 bytes |   indirect          |   direct            |
+                 |   addressing only   |   addressing only   |
+             80h |                     |                     | 80h
+                 +---------------------+---------------------+
+             7Fh |                     |
+                 | Addressable by      |
+ Lower 128 bytes | direct and          |
+                 | indirect addressing |
+             00h |                     |
+                 +---------------------+
+
+The prefered memory model can be defined in SDCC through CLI option
+--model-small or --model-large - the small memory model is default. In
+KEIL it can be changed through selecting it in the options pane for the
+target. 
+
+
+3.4.4 Removal of inlining
+--------------------------------------------------------------------
+
+NesC assumes that GCC is being used for the final compilation. GCC
+supports inline functions and can be made to optimize code quite
+aggressively, so the code generated by NesC does not need to be very
+efficient. Unfortunately SDCC does not support code inlining, so the
+inline statements have to be removed, when compiling for SDCC.
+ 
+Lines with the following format are affected:
+
+static inline void TOSH_sleep(void ); 
+static __inline void TOSH_SET_RED_LED_PIN(void);
+__inline void__nesc_enable_interrupt(void);
+
+Lines with the noinline attribute is substituted with the 
+#pragma NO_INLINE.
+
+3.4.5 Removal of Preprocessor Line Numbering
+--------------------------------------------------------------------
+
+Also NesC produce preprocessor line number meta data, to allow the
+compiler to report error messages referring to the original code. We do
+not really need them for anything, so we filter them out to minimize the
+code size. It also eases the code reading significantly. If needed for
+debug purposes the regular expression in the mangle script which remove
+them can be commented out.
+
+3.4.6 Change $ in Identifiers
+--------------------------------------------------------------------
+
+The SDCC compiler is very strict when it comes to valid symbols in
+identifiers. NesC produce GCC-code which inserts $ as a separator
+character in identifiers. We mangle the $ to two underscores in order to
+enable SDCC/KEIL to compile.
+
+3.4.7 Interrupt Vectors
+--------------------------------------------------------------------
+
+The syntax for declaration of interrupt vectors are different in GCC and
+SDCC/KEIL. So we mangle the interrupt declaration:
+
+From: void __attribute((interrupt)) __vector_5(void) 
+To:   void __vector_5(void) interrupt 5
+
+Additionally KEIL does not understand that the interrupt vector is
+defined previous to its use. So we remove the forward declaration of the
+vectors in the mangle script, when compiling for KEIL.
+
+
+4. TinyOS Modifications
+====================================================================
+
+TinyOS is based on modules with different levels of hardware
+abstraction. When porting TinyOS to a new platform, you change the
+underlying hardware dependencies in TinyOS, and you have to rebuild the
+modules bottom up. Hence, it has been necessary to modify a number of
+modules in TinyOS. The figure below shows the topological hierarchy of
+the TinyOS modules we have focused on. By far, most of the work has been
+done in the Hardware Presentation Layer (HPL), but certain changes also
+affected the higher abstractions, such as changes in interfaces and
+interrupt handling.
+
+Modified TinyOS modules overview::
+
+ +------------------------------------------------------------+ 
+ |                     TinyOS Application                     |  App
+ +------------------------------------------------------------+ 
+   \/    /\            \/    /\           \/   /\      \/  /\   -----
+ +----------+        +----------+       +---------+  +--------+ 
+ |  Timer   |        |   UART   |       |   ADC   |  |  LEDs  |  HAL
+ +----------+        +----------+       +---------+  +--------+
+   \/    /\            \/    /\           \/   /\               -----
+ +----------+  +---------------------+  +---------+ 
+ | HPLClock |  |       HPLUART       |  | HPLADC  |      \/      HPL 
+ +----------+  +---------------------+  +---------+
+   \/    /\        \/         \/  /\      \/   /\               ----- 
+ +----------+  +--------+   +--------+  +---------+  +--------+ 
+ |  Timer2  |  | Timer1 | > | Serial |  | Sensors |  |  Port  |  HW 
+ +----------+  +--------+   |  Port  |  +---------+  +--------+ 
+                           +--------+
+
+The following sections describe the changes to the four groups of modules.
+
+4.1 HPLClock and related modules
+--------------------------------------------------------------------
+
+The 8051 chip has three independent timer/counter circuits: Timer0,
+Timer1 and Timer2, which can run in various modes. Each timer/counter
+consists of a 16-bit register that is accessible to software as three
+SFRs (TL0/TH0, TL1/TH1 and TL2/TH2). Timer0 and Timer1 can be used as 13
+or 16 bit timer/counter or as 8 bit counters with auto-reload. Timer2 is
+only capable of running as a 16 bit timer/counter, but can remain as
+such even in auto-reload mode. Reload is desirable for loading the clock
+with a start value.
+
+We have chosen to use Timer2 for the clock module, since it gives our
+design a maximum clock interval of 49.15 ms at a 16 MHz system clock.
+Using a different timer circuit would limit the interval to 0.192 ms,
+which would result in a great deal of interrupts and consume processing
+power for administrational overhead.
+
+4.1.1 Timer
+--------------------------------------------------------------------
+
+The Timer module (HAL) uses the HPLClock module to handle the hardware
+timing.  These two modules communicate through the clock interface.
+However, the standard TinyOS clock interface is designed for an MCU with
+a more flexible prescaler, then the 8051 chip is equipped with. The 8051
+is limited to a prescaler with a factor of 1/4 or 1/12 of the CPU clock
+frequency, whereas the TinyOS clock interface currently uses an 8 bit
+prescaler and an 8 bit timer.  Because of the 8051s limited prescaler
+options, and the possibility to use a 16 bit timer/counter to compensate
+for the reduced prescaler options, we decided to widen the clock
+interface from 8 to 16 bit. We are using the factor 1/4 for the
+prescaler.
+
+The interface change has affected the following methods: 
+result_t setRate(uint16_t interval, char scale) 
+void     setInterval(uint16_t value) 
+void     setNextInterval(uint16_t value) 
+uint16_t getInterval()
+result_t setIntervalAndScale(uint16_t interval, uint8_t scale)
+uint16_t readCounter() 
+void     setCounter(uint16_t n)  
+
+See: 
+  Clock.h 
+  Clock.nc 
+  HPLClock.nc 
+  TimerM.nc 
+  TimerC.nc 
+  8051.h
+
+4.2 HPLUART
+--------------------------------------------------------------------
+
+The UART is depending on a timer to generate a baud rate for the serial
+port. The architecture only allows two of the three timers (Timer1 or
+Timer2), to act as such. Since Timer2 is already used by the clock
+module, this leaves only Timer1 available for the UART module. 
+
+When using Timer1 as the baud rate generator, 5 different baud rates can
+be obtained: 1.20 KiB/s, 2.4 KiB/s, 4.8 KiB/s, 9.6 KiB/s or 19.2 KiB/s.
+We chose to use a baud rate of 19.2 KiB/s with 8 data bits, no parity
+and one stop bit, since this speed is commonly used and the fastest
+speed possible using this timer.
+
+We have also expanded the HPLUART interface to include a put2 method.
+This method is able to send more than one byte, by taking two pointers
+as arguments. These pointers refer to the first and last bytes to be
+sent. The HPLUART interrupt handler was also modified to take the
+multiple byte data into account.
+
+See: 
+  8051.h 
+  HPLUART.nc 
+  HPLUARTC.nc 
+  HPLUARTM.nc
+
+4.3 HPLADC
+--------------------------------------------------------------------
+
+The TinyOS standard ADC interface was developed for the AVR which
+includes hardware functionality for repetitive sampling at a given
+interval.  Implementing this functionality on the 8051, which does not
+support this in hardware, would require use of the last timer. We chose
+not to implement repetitive sampling, therefore the setSampleRate method
+currently has no use. 
+
+See: 
+  8051.h 
+  ADCM.nc 
+  HPLADCC.nc 
+  HPLADCM.nc
+
+4.4 LEDS
+--------------------------------------------------------------------
+
+TinyOS features three standard LEDs (Red, Green and Yellow), but the
+nRF24E1 evaluation board is not equipped with programmable LEDs so we
+used the general purpose ports (GPIO).
+
+The standard 8051 platform features four 8 bit GPIO, however the nRF24E1
+evaluation board is only equipped with two ports: Port0 and Port1, where
+Port0 has eight bits and Port1 has only three bits. 
+
+Intuitively the best solution would have been to place the standard
+three TinyOS LED bits on Port1, but unfortunately we were unable to
+control the most significant bit on Port1, since it is hard-wired as
+input and controlled by external SPI_CTRL. The Yellow LED was moved to
+Port0.
+
+To visualize the status of the GPIO, including the three standard LEDs,
+we built a LED expansion board.
+
+The three LEDs are currently wired to: 
+  Red -> P1.0 
+  Green -> P1.1
+  Yellow -> P0.7.
+
+See: 
+  8051.h 
+  hardware.h 
+  mcs51hardware.h 
+  LedsC.nc
+
+4.5 Interrupts
+--------------------------------------------------------------------
+
+In TinyOS interrupts are not implemented as a single module, they are
+mainly facilitated in atomic blocks and in the init, start and stop
+methods of the various HPL modules. The init, start and stop methods
+only handle interrupts that are specific to the module, i.e. timer
+interrupt for the HPLClock module and serial interrupt for the HPLUART
+module. While the atomic block handle the enabling of global interrupts.
+This is used to avoid preempting code execution in critical blocks.
+
+
+5. Conclusion
+====================================================================
+
+The project have reached a plateau of development in porting TinyOS to
+the 8051 platform, on which future development can be based. The basic
+modules (Timer, UART, ADC and LEDS) have been implemented making 8051
+accessible for the TinyOS community. However a essential module for the
+field of sensor networks, the radio module, is still missing.
+
+The result of our work will be uploaded to the TinyOS 8051 Working Group
+website.
+
+
+6. Future Work
+====================================================================
+
+The work presented in this TEP is short of being a complete porting of
+TinyOS to the 8051 platform. Two obvious future tasks are implementing a
+Radio module involving the SPI interface and Power Management for duty
+cycling. The radio module is currently under development, in which the
+main hurdle is the three wire SPI interface.
+
+This work is done for TinyOS 1.x, but looking forward, the 8051 port
+should target TinyOS 2.0. This might be a challenge with the timer
+interface being so different from TinyOS 1.x.
+
+
+7. Authors
+====================================================================
+
+| Anders Egeskov Petersen 
+| University of Copenhagen, Dept. of Computer Science 
+| Universitetsparken 1 
+| DK-2100 København Ø 
+| Denmark 
+| 
+| Sidsel Jensen 
+| University of Copenhagen, Dept. of Computer Science 
+| Universitetsparken 1 
+| DK-2100 København Ø 
+| Denmark 
+|
+| email - purps@diku.dk
+| 
+| Martin Leoold
+| University of Copenhagen, Dept. of Computer Science 
+| Universitetsparken 1 
+| DK-2100 København Ø
+| Denmark 
+|
+| Phone +45 3532 1464
+|
+| email - leopold@diku.dk
+
+
+8. Citations
+====================================================================
+         
+.. [NSC] Nordic Semiconductor. nRF24E1 Evalutaion board.
+         http://www.nordicsemi.no/files/Product/development_tools/nRF24E1_EVBOARD_rev1_0.pdf
+
+.. [PEH] Martin Leopold. "Power Estimation using the Hogthrob Prototype Platform" *M.Sc. 
+         Thesis, DIKU, Copenhagen University, Denmark, December 2004* .
+
+.. [HOG] Kashif Virk, Jan Madsen, Andreas Vad Lorentzen, Martin Leopold, Philippe Bonnet.
+        "Design of A Development Platform for HW/SW Codesign ofWireless Integrated Sensor
+        Nodes" *Eighth Euromicro Symposium on Digital Systems Design*, 2005.
+
+.. _TinyOS: http://www.tinyos.net 
+.. _SDCC: http://sdcc.sourceforge.net 
+.. _KEIL: http://www.keil.com
+.. _mcs51 family: http://www.intel.com/design/mcs51 
diff --git a/doc/txt/tep122.txt b/doc/txt/tep122.txt
new file mode 100644
index 00000000..87670103
--- /dev/null
+++ b/doc/txt/tep122.txt
@@ -0,0 +1,122 @@
+=====================================================
+IEEE EUI-64 Unique Node Identifier
+===================================================== 
+
+:TEP: 122
+:Group: Core Working Group
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Gilman Tolle, Jonathan Hui
+
+:Draft-Created: 26-Apr-2006
+:Draft-Version:
+:Draft-Modified:
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+A TinyOS application developer may desire a globally-unique node
+identifier within the IEEE EUI-64 namespace. This document describes
+the TinyOS components used to access such an identifier.
+
+1. Interfaces
+====================================================================
+
+A platform that can provide a valid IEEE EUI-64 globally-unique node
+identifier SHOULD provide it through a component with the signature
+defined here, enabling platform-independent access to the identifier::
+
+  configuration LocalIeeeEui64C {
+    provides interface LocalIeeeEui64;
+  }
+
+The identifier is accessed through the following interface::
+
+  interface LocalIeeeEui64 {
+    command ieee_eui64_t getId();
+  }
+
+The ieee_eui64_t type is defined in ``tos/types/IeeeEui64.h`` as::
+
+  enum { IEEE_EUI64_LENGTH = 8; }
+
+  typedef struct ieee_eui64 {
+    uint8_t data[IEEE_EUI64_LENGTH];
+  } ieee_eui64_t;
+
+If the platform can provide a valid IEEE EUI-64, the value returned
+from this call MUST follow the IEEE EUI-64 standard.
+
+If a platform can provide a unique identifier that is not a valid IEEE
+EUI-64 identifier, it SHOULD provide its unique identifier through a
+component with a different name and a different interface. The
+definition of such an interface is outside the scope of this TEP.
+
+2. IEEE EUI-64
+====================================================================
+
+The IEEE EUI-64 structure is copied here::
+
+  |        company_id       |            extension identifier           |
+  |addr+0 | addr+1 | addr+2 | addr+3 | addr+4 | addr+5 | addr+6 | addr+7|
+  |  AC   |   DE   |   48   |   23   |   45   |   67   |   AB   |   CD  |
+  10101100 11011110 01001000 00100011 01000101 01100111 10101011 11001101
+  |  |                                                               |  |
+  |  most significant byte                      least significant byte  |
+  most-significant bit                              least-significant bit
+
+  If provided in byte-addressable media, the original byte-address order
+  of the manufacturer is specified: the most through least significant
+  bytes of the EUI-64 value are contained within the lowest through
+  highest byte addresses, as illustrated above.
+
+See: http://standards.ieee.org/regauth/oui/tutorials/EUI64.html
+
+The author of the LocalIeeeEui64C component MUST ensure that the
+getId() call returns a valid EUI-64 identifier that follows the
+standard, with the bytes in the order described above.
+
+3. Implementation Notes
+====================================================================
+
+Some TinyOS node platforms contain a unique hardware identifier that
+can be used to build the EUI-64 node identifier. That hardware
+identifier may be obtained from several places, e.g. a dedicated
+serial ID chip or a flash storage device. Users of the interface
+described in this document MUST NOT require knowledge of how the
+unique identifier is generated.
+
+The EUI-64 node identifier MUST be available before the Boot.booted()
+event is signalled. If the EUI-64 is derived from a hardware device,
+the hardware device should be accessed during the Init portion of the
+boot sequence.
+
+4. Author's Address
+====================================================================
+
+| Gilman Tolle
+| Arch Rock Corporation
+| 657 Mission St. Suite 600
+| San Francisco, CA 94105
+|
+| phone - +1 415 692 0828
+| email - gtolle@archrock.com
+
+| Jonathan Hui
+| Arch Rock Corporation
+| 657 Mission St. Suite 600
+| San Francisco, CA 94105
+|
+| phone - +1 415 692 0828
+| email - jhui@archrock.com
+
+
diff --git a/doc/txt/tep123.txt b/doc/txt/tep123.txt
new file mode 100644
index 00000000..3d3d86ef
--- /dev/null
+++ b/doc/txt/tep123.txt
@@ -0,0 +1,391 @@
+==============================================================================
+The Collection Tree Protocol (CTP) 
+==============================================================================
+
+:TEP: 123
+:Group: Network Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: > 2.1
+:Author: Rodrigo Fonseca, Omprakash Gnawali, Kyle Jamieson, Sukun Kim, Philip Levis, and Alec Woo
+
+:Draft-Created: 3-Aug-2006
+:Draft-Version: $Revision: 1.15 $
+:Draft-Modified: $Date: 2009-01-16 19:50:47 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+==============================================================================
+
+This memo documents the Collection Tree Protocol (CTP), which 
+provides best-effort anycast datagram communication to one of the 
+collection roots in a network.
+
+1. Introduction
+==============================================================================
+
+A collection protocol delivers data to one of possibly several data
+sinks, providing a many-to-one network layer. Collection is a
+fundamental component of most sensor network applications. The
+Collection Tree Protocol (CTP) is a reference Collection protocol in
+TinyOS 2.x. The users use Collection interfaces described in TEP 119
+[3]_ to use CTP in their applications.
+
+In this TEP, after a brief discussion of Collection and CTP, we
+specify the CTP routing and data frames. CTP uses routing frames to
+update and build collection tree in the network. CTP uses data frames
+to deliver application payload to the sink and to probe topology
+inconsistencies.
+
+All fields in this specification are in network byte order.
+
+2. Assumptions and Limitations
+==============================================================================
+
+CTP is a tree-based collection protocol. Some number of nodes in a
+network advertise themselves as tree roots. Nodes form a set of routing
+trees to these roots. CTP is **address-free** in that a node does not
+send a packet to a particular root; instead, it implicitly chooses a
+root by choosing a next hop. Nodes generate routes to roots using
+a routing gradient.
+
+The CTP protocol assumes that the data link layer provides four things:
+
+ 1) Provides an efficient local broadcast address.
+ 2) Provides synchronous acknowledgments for unicast packets.
+ 3) Provides a protocol dispatch field to support multiple higher-level
+    protocols.
+ 4) Has single-hop 16-bit source and destination fields.
+
+CTP assumes that it has link quality estimates of some number of nearby 
+neighbors. These provide an estimate of the number of transmissions it 
+takes for the node to send a unicast packet whose acknowledgment is
+successfully received.
+
+CTP has several mechanisms in order to achieve high delivery
+reliability, but it does not promise 100\% reliable delivery. It is a
+best effort protocol.
+
+CTP is designed for relatively low traffic rates such that there is
+enough space in the channel to transmit and receive routing frames
+even when the network is forwarding collection data
+frames. Bandwidth-limited systems or high data rate applications might
+benefit from a different protocol, which can, for example, pack
+multiple small frames into a single data-link packet or employ rate
+control mechanisms.
+
+
+3. Collection and CTP
+==============================================================================
+
+CTP uses expected transmissions (ETX) as its routing gradient. A root
+has an ETX of 0.  The ETX of a node is the ETX of its parent plus the
+ETX of its link to its parent. This additive measure assumes that
+nodes use link-level retransmissions.  Given a choice of valid routes,
+CTP SHOULD choose the one with the lowest ETX value. CTP represents
+ETX values as 16-bit decimal fixed-point real numbers with a precision
+of tenths. An ETX value of 45, for example, represents an ETX of 4.5,
+while an ETX value of 10 represents an ETX of 1.
+
+Routing loops are a problem that can emerge in a CTP network. Routing
+loops generally occur when a node choose a new route that has a
+significantly higher ETX than its old one, perhaps in response to
+losing connectivity with a candidate parent. If the new route includes
+a node which was a descendant, then a loop occurs.
+
+CTP addresses loops through two mechanisms. First, every CTP packet
+contains a node's current gradient value. If CTP receives a data frame with
+a gradient value lower than its own, then this indicates that there
+is an inconsistency in the tree. CTP tries to resolve the inconsistency
+by broadcasting a beacon frame, with the hope that the node which sent
+the data frame will hear it and adjust its routes accordingly. If a
+collection of nodes is separated from the rest of the network, then they
+will form a loop whose ETX increases forever. CTP's second mechanism
+is to not consider routes with an ETX higher than a reasonable constant.
+The value of this constant is implementation dependent.
+
+Packet duplication is an additional problem that can occur in CTP.
+Packet duplication occurs when a node receives a data frame
+successfully and transmits an ACK, but the ACK is not received. The
+sender retransmits the packet, and the receiver receives it a second
+time. This can have disasterous effects over multiple hops, as the
+duplication is exponential.  For example, if each hop on average
+produces one duplicate, then on the first hop there will be two
+packets, on the second there will be four, on the third there will be
+eight, etc. CTP keeps a small cache of packet signature for the
+packets it has seen to detect packet duplicates. When a new packet
+arrives, if its signature results in cache hit, CTP drops the packet
+because it is a duplicate.
+
+Routing loops complicate duplicate suppression, as a routing loop may
+cause a node to legitimately receive a packet more than once. Therefore,
+if a node suppresses duplicates based solely on originating address and
+sequence number, packets in routing loops may be dropped. CTP data frames
+therefore have an additional time has lived (THL) field, which the
+routing layer increments on each hop. A link-level retransmission has
+the same THL value, while a looped version of the packet is unlikely
+to do so.
+
+4. CTP Data Frame 
+==============================================================================
+
+The CTP data frame format is as follows::
+
+                           1            
+       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |P|C| reserved  |      THL      |
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |              ETX              |
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |             origin            |                 
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |     seqno     |   collect_id  |    
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |    data ... 
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+
+Field definitions are as follows:
+
+  * P: Routing pull. The P bit allows nodes to request routing information from other nodes. If the unicast destination of the data frame with a valid route hears a packet with the P bit set, it SHOULD transmit a routing frame in the near future. Nodes other than the link-layer destination of the data frame MAY respond to the P bit in the data frame.
+  * C: Congestion notification. If a node drops a CTP data frame, it MUST set the C field on the next data frame it transmits.
+  * THL: Time Has Lived. When a node generates a CTP data frame, it MUST set THL to 0. When a node receives a CTP data frame, it MUST increment the THL. If a node receives a THL of 255, it increments it to 0.
+  * ETX: The ETX routing metric of the single-hop sender. When a node transmits a CTP data frame, it MUST put the ETX value of its route through the single-hop destination in the ETX field.  If a node receives a packet with a lower gradient than its own, then it MUST schedule a routing frame in the near future.
+  * origin: The originating address of the packet. A node forwarding a data frame MUST NOT modify the origin field.
+  * seqno: Origin sequence number. The originating node sets this field, and a node forwarding a data frame MUST NOT modify it. 
+  * collect_id: Higher-level protocol identifier. The origin sets this field, and a node forwarding a data frame MUST NOT modify it.
+  * data: the data payload, of zero or more bytes. A node forwarding a data frame MUST NOT modify the data payload. The length of the data field is computed by subtracting the size of the CTP header from the size of the link layer payload provided by the link layer.
+
+Together, the origin, seqno and collect_id fields denote a unique 
+***origin packet.*** Together, the origin, seqno, collect_id, and
+THL denote a unique ***packet instance*** within the network. The
+distinction is important for duplicate suppression in the presence
+of routing loops. If a node suppresses origin packets, then if
+asked to forward the same packet twice due to a routing loop, it will
+drop the packet. However, if it suppresses packet instances, then it
+will route successfully in the presence of transient loops unless the
+THL happens to wrap around to a forwarded packet instance.
+
+A node MUST send CTP data frames as unicast messages with link-layer 
+acknowledgments enabled. 
+
+5. CTP Routing Frame
+==============================================================================
+
+The CTP routing frame format is as follows::
+
+                           1            
+       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |P|C| reserved  |     parent    |
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |     parent    |      ETX      |    
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |      ETX      |          
+      +-+-+-+-+-+-+-+-+
+
+The fields are as follows:
+  
+  * P: Same as data frame with one difference: Routing frames are broadcast so multiple nodes respond to the P bit in the routing frame.
+  * C: Congestion notification. If a node drops a CTP data frame, it MUST set the C field on the next routing frame it transmits.
+  * parent: The node's current parent.
+  * metric: The node's current routing metric value.
+
+When a node hears a routing frame, it MUST update its routing table to
+reflect the address' new metric. If a node's ETX value changes
+significantly, then CTP SHOULD transmit a broadcast frame soon thereafter
+to notify other nodes, which might change their routes. The parent
+field acts as a surrogate for the single-hop destination field of
+a data packet: a parent can detect when a child's ETX is significantly
+below its own. When a parent hears a child advertise an ETX below its
+own, it MUST schedule a routing frame for transmission in the near
+future.
+
+A node MUST send CTP routing frames as broadcast messages.
+
+6. Implementation
+==============================================================================
+
+An implementation of CTP can be found in the tos/lib/net/ctp directory
+of TinyOS 2.0. This section describes the structure of that implementation
+and is not in any way part of the specification of CTP.
+
+This implementation has three major subcomponents:
+
+1) A **link estimator**, which is responsible for estimating the
+single-hop ETX of communication with single-hop neighbors.
+
+2) A **routing engine**, which uses link estimates as well as
+network-level information to decide which neighbor is the next
+routing hop.
+
+3) A **forwarding engine**, which maintains a queue of packets
+to send. It decides when and if to send them. The name is a little
+misleading: the forwarding engine is responsible for forwarded traffic
+as well as traffic generated on the node.
+
+6.1 Link Estimation
+------------------------------------------------------------------------------
+
+The implementation uses two mechanisms to estimate the quality of a link:
+periodic LEEP [1]_ packets and data packets. The implementation sends
+routing beacons as LEEP packets. These packets seed the neighbor table
+with bidirectional ETX values. The implementation adapts its beaconing
+rate based on network dynamics using an algorithm similar to the
+trickle dissemination protocol [2]_. Beacons are sent on an exponentially
+increasing randomized timer. The implementation resets the timer to a
+small value when one or more of the following conditions are met:
+
+ 1) The routing table is empty (this also sets the P bit)
+ 2) The node's routing ETX increases by >= 1 transmission
+ 3) The node hears a packet with the P bit set
+
+The implementation augments the LEEP link estimates with data
+transmissions. This is a direct measure of ETX. Whenever the data path
+transmits a packet, it tells the link estimator the destination and
+whether it was successfully acknowledged. The estimator produces an
+ETX estimate every 5 such transmissions, where 0 successes has an ETX
+of 6.
+
+The estimator combines the beacon and data estimates by incorporating
+them into an exponentially weighted moving average. Beacon-based
+estimates seed the neighbor table. The expectation is that the low
+beacon rate in a stable network means that for a selected route, 
+data estimates will outweigh beacon estimates. Additionally, as
+the rate at which CTP collects data estimates is proportional to
+the transmission rate, then it can quickly detect a broken link and
+switch to another candidate neighbor.
+
+The component ``tos/lib/net/4bitle/LinkEstimatorP`` implements the
+link estimator. It couples LEEP-based and data-based estimates as
+described in [4]_.
+
+6.2 Routing Engine
+------------------------------------------------------------------------------
+
+The implementation's routing engine is responsible for picking the next
+hop for a data transmission. It keeps track of the path ETX values of
+a subset of the nodes maintained by the link estimation table. The minimum
+cost route has the smallest sum the path ETX from that node and the link
+ETX of that node. The path ETX is therefore the sum of link ETX values
+along the entire route. The component ``tos/lib/net/ctp/CtpRoutingEngineP``
+implements the routing engine.
+
+6.3 Forwarding Engine
+------------------------------------------------------------------------------
+
+The component ``tos/lib/net/ctp/CtpForwardingEngineP`` implements the
+forwarding engine. It has five responsibilities:
+
+ 1) Transmitting packets to the next hop, retransmitting when necessary, and
+    passing acknowledgment based information to the link estimator
+ 2) Deciding *when* to transmit packets to the next hop
+ 3) Detecting routing inconsistencies and informing the routing engine
+ 4) Maintaining a queue of packets to transmit, which are a mix of locally
+    generated and forwarded packets
+ 5) Detecting single-hop transmission duplicates caused by lost acknowledgments
+
+The four key functions of the forwading engine are packet reception
+(``SubReceive.receive()``), packet forwarding (``forward()``), packet
+transmission (``sendTask()``) and deciding what to do after a packet
+transmission (``SubSend.sendDone()``).
+
+The receive function decides whether or not the node should forward a
+packet. It checks for duplicates using a small cache of recently received
+packets. If it decides a packet is not a duplicate, it calls the
+forwading function.
+
+The forwarding function formats the packet for forwarding. It checks the
+received packet to see if there is possibly a loop in the network.
+It checks if there is space in the transmission queue.
+If there is no space, it drops the packet and sets the C bit. If the
+transmission queue was empty, then it posts the send task.
+
+The send task examines the packet at the head of the transmission
+queue, formats it for the next hop (requests the route from the
+routing layer, etc.), and submits it to the AM layer.
+
+When the send completes, sendDone examines the packet to see the result.
+If the packet was acknowledged, it pulls the packet off the transmission
+queue. If the packet was locally generated, it signals sendDone() to the
+client above. If it was forwarded, it returns the packet to the forwarding
+message pool. If there are packets remaining in the queue (e.g., the
+packet was not acknowledged), it starts a randomized timer that reposts
+this task. This timer essentially rate limits CTP so that it does not
+stream packets as quickly as possible, in order to prevent self-collisions
+along the path.
+
+7. Citations
+====================================================================
+
+| Rodrigo Fonseca 
+| 473 Soda Hall
+| Berkeley, CA 94720-1776
+|
+| phone - +1 510 642-8919
+| email - rfonseca@cs.berkeley.edu
+|
+|
+| Omprakash Gnawali
+| Ronald Tutor Hall (RTH) 418 
+| 3710 S. McClintock Avenue
+| Los Angeles, CA 90089 
+|
+| phone - +1 213 821-5627
+| email - gnawali@usc.edu
+|
+|
+| Kyle Jamieson
+| The Stata Center
+| 32 Vassar St.
+| Cambridge, MA 02139 
+|
+| email - jamieson@csail.mit.edu
+|
+|
+| Philip Levis
+| 358 Gates Hall
+| Computer Science Laboratory
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+|
+|
+| Alec Woo
+| Arch Rock Corporation
+| 501 2nd St. Ste 410
+| San Francisco, CA 94107-4132
+|
+| email - awoo@archrock.com
+|
+|
+| Sukun Kim
+| Samsung Electronics
+| 416 Maetan-3-dong, Yeongtong-Gu
+| Suwon, Gyeonggi 443-742
+| Korea, Republic of
+|
+| phone - +82 10 3065 6836
+| email - sukun.kim@samsung.com
+
+8. Citations
+====================================================================
+
+.. [1] TEP 124: Link Estimation Extension Protocol
+.. [2] Philip Levis, Neil Patel, David Culler and Scott Shenker. "A
+       Self-Regulating Algorithm for Code Maintenance and Propagation
+       in Wireless Sensor Networks." In Proceedings of the First USENIX
+       Conference on Networked Systems Design and Implementation (NSDI), 2004.
+.. [3] TEP 119: Collection.
+.. [4] Rodrigo Fonseca, Omprakash Gnawali, Kyle Jamieson, and Philip Levis.
+       "Four Bit Wireless Link Estimation." In Proceedings of the Sixth Workshop
+       on Hot Topics in Networks (HotNets VI), November 2007.
diff --git a/doc/txt/tep124.txt b/doc/txt/tep124.txt
new file mode 100644
index 00000000..540ac1b2
--- /dev/null
+++ b/doc/txt/tep124.txt
@@ -0,0 +1,222 @@
+============================================================================
+The Link Estimation Exchange Protocol (LEEP)
+============================================================================
+
+:TEP: 124 
+:Group: Network Protocol Working Group 
+:Type: Documentary
+:Status: Final
+:TinyOS-Version: > 2.1
+:Author: Omprakash Gnawali
+
+:Draft-Created: 05-Feb-2006
+:Draft-Version: $Revision: 1.12 $
+:Draft-Modified: $Date: 2009-02-08 19:54:16 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+============================================================================
+
+The memo documents the Link Estimation Exchange Protocol (LEEP). Nodes
+use LEEP to estimate and exchange information about the quality of
+links to the neighbors.
+
+1. Introduction
+============================================================================
+
+Routing protocols often require bi-directional link qualities to
+compute the routes. Nodes can estimate the quality of the in-bound
+link from a neighbor by estimating the ratio of successfully received
+messages to the total transmitted messages. LEEP appends in-bound
+packet reception rate (PRR) estimates to packets. Other nodes hearing
+these packets can combine the in-bound PRR values with their own
+in-bound values to compute bi-directional link quality. Thus, LEEP is
+a discovery and link table bootstrapping mechanism. The link quality
+is often fine-tuned using different mechanisms.
+
+Link quality estimates obtained using LEEP are often used as
+bootstrapping values in the link quality table; data transmission
+statistics can later be used to make these estimates more accurate.
+
+2. Definitions
+============================================================================
+
+2.1 In-bound Link Quality
+--------------------------------------------------------------------
+
+In a node pair (A,B), with B as the node of reference, in-bound link
+quality is a value in the range of 0 to 255 that describes the quality
+of the link from A to B estimated by B as the ratio of successfully
+received to all packets transmitted by A. Thus, in-bound link quality
+is the empirical probability that a packet will be successfully
+received on a given link. A value of 255 represents a probability of 1
+and a value of 0 represents a probability of 0 of successfully
+receiving a packet on a given link.
+
+2.2 Out-bound Link Quality
+--------------------------------------------------------------------
+
+In a node pair (A,B), with B as the node of reference, out-bound link
+quality is defined as the quality of the link from B to A. B can
+determine the out-bound link quality if A advertises its in-bound link
+qualities. LEEP is the protocol that is used to exchange the in-bound
+link qualities.
+
+2.3 Bi-directional Link Quality
+--------------------------------------------------------------------
+
+LEEP does not define or compute bi-directional link quality. LEEP
+provides a way to exchange sufficient information to compute in-bound
+and out-bound link qualities. These two link qualities can be used to
+compute the bi-directional link quality. Routing protocols often
+compute the bi-directional link quality of a node pair (A,B) as a
+function (product, min, etc.) of the link quality of (A,B) and (B,A).
+
+
+2.4 Link Information Entry
+--------------------------------------------------------------------
+
+Link Information Entry created by node k is a tuple (n,q) where q is
+the in-bound link quality from node n to k.
+
+3. The Link Estimation Exchange Protocol (LEEP)
+============================================================================
+
+3.1 Assumptions
+--------------------------------------------------------------------
+
+Following are the assumptions made by LEEP:
+
+3.1.1. The data link frame has a single-hop source field.
+3.1.2. The data link layer provides a broadcast address.
+3.1.3. The data link layer provides the length of the LEEP frame.
+
+3.2 The Protocol
+--------------------------------------------------------------------
+
+To compute the bi-directional link quality, in-bound link quality must
+be exchanged among the neighbors. LEEP maintains a sequence number
+that is incremented by one for each outgoing LEEP frame. The sequence
+number in the LEEP frame MUST be incremented by one even if the data
+link layer retransmits the LEEP frame. The LEEP sequence number MAY be
+used to count the number of missing packets to estimate the in-bound
+link quality from the transmitter. LEEP MUST transmit Link Information
+entries describing the in-bound link qualities for a subset of its
+neighbors. The Link Information entry on the LEEP frame allows the
+receiver node to find the out-bound link quality to the transmitter
+node identified by the data link source address. Thus, LEEP is also a
+way for nodes to discover new nodes and links in the network.
+
+Link quality estimation is inherently imperfect - data transmission
+and link quality estimation might be done at different timescales. The
+PRR for LEEP frames (broadcast) and data frames (unicast) might be
+different. So LEEP is better used as a link quality bootstrapping
+mechanism. The link quality estimate can be made more accurate later
+using data transmission statistics.
+
+
+
+3.3 LEEP Frame
+--------------------------------------------------------------------
+
+A LEEP frame has a header, the payload, and a footer with the Link
+Information (LI) entries as shown in this diagram::
+
+  -------------------------------------------------------------
+  |   LEEP   | Payload | LI Entry | LI Entry | ... | LI Entry |
+  |  Header  |         |     1    |     2    |     |     n    |
+  -------------------------------------------------------------
+
+The number of Link Information entries can be different in each
+outgoing LEEP frame. The number of Link Information entries MUST not
+increase the size of the LEEP frame beyond the maximum payload length
+allowed by the data link layer. A LEEP frame can have 0 Link
+Information entry.
+
+3.3.1 LEEP header
+--------------------------------------------------------------------
+
+The following diagram shows the LEEP header format::
+
+                           1
+       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |nentry | rsrvd |     seqno     |
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+
+
+Field definitions:
+
+  * nentry - Number of Link Information entries in the footer
+  * seqno - LEEP sequence number.
+  * rsrvd - Reserved and must be set to 0.
+
+
+3.3.2 Link Information Entry
+--------------------------------------------------------------------
+
+The following diagram shows the Link Information Entry format::
+
+                           1
+       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |            node id            |
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      | link quality  |
+      +-+-+-+-+-+-+-+-+
+
+Field definitions:
+
+  * node id: the link layer address of the neighbor
+  * link quality: The in-bound link quality from the node identified by node id
+    to the node that transmits this Link Information entry
+
+
+4. Implementation
+============================================================================
+
+The following files in ``tinyos-2.x/tos/lib/net/le`` provide a
+reference implementation of LEEP described in this TEP.
+
+  * ``LinkEstimator.h`` and ``LinkEstimatorP.nc``
+
+The reference implementation uses the LEEP sequence number to count
+the number of missing packets to estimate the in-bound link
+quality. The implementation tries to append Link Information entry for
+all the neighbors in its neighbor table by sending the largest
+possible data link frame. If there is still not enough room to fit all
+the Link Information entries, it uses a round-robin policy to select
+the entries to be exchanged that could not fit in the previous LEEP
+frame. The LEEP frames are transmitted whenever the CTP [1]_ beacons,
+sent as a LEEP payload, are sent.
+
+Another reference implementation resides in
+``tinyos-2.x/tos/lib/net/4bitle``. This implementation is described in
+detail in [2]_.
+
+5. Author's Address
+============================================================================
+
+| Omprakash Gnawali
+| Ronald Tutor Hall (RTH) 418 
+| 3710 S. McClintock Avenue
+| Los Angeles, CA 90089 
+|
+| phone - +1 213 821-5627
+| email - gnawali@usc.edu
+|
+
+6. Citations
+============================================================================
+
+.. [1] TEP 123: The Collection Tree Protocol.
+.. [2] Rodrigo Fonseca, Omprakash Gnawali, Kyle Jamieson, and Philip Levis.
+       "Four Bit Wireless Link Estimation." In Proceedings of the Sixth Workshop
+       on Hot Topics in Networks (HotNets VI), November 2007.
diff --git a/doc/txt/tep125.txt b/doc/txt/tep125.txt
new file mode 100644
index 00000000..fb843796
--- /dev/null
+++ b/doc/txt/tep125.txt
@@ -0,0 +1,126 @@
+====================================================================
+TinyOS 802.15.4 Frames
+====================================================================
+
+:TEP: 125
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Jonathan Hui, Philip Levis, and David Moss
+
+:Draft-Created: 2-Feb-2007
+:Draft-Version: $Revision: 1.6 $
+:Draft-Modified: $Date: 2008-06-20 05:41:23 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents the frame format for 802.15.4 packets in TinyOS
+2.0.
+
+1. Introduction
+====================================================================
+
+802.15.4 is a data-link and physical packet format for
+low-power wireless networks that is used in many TinyOS platforms.
+The TinyOS 2.0 active message layer adds a packet field for higher-level
+protocol dispatch. This document describes the two TinyOS 2.0 frame format
+for 802.15.4 networks. The first format is for isolated TinyOS networks;
+the second format is for networks that share the spectrum with 6lowpan
+networks[1]_.
+
+2. 802.15.4
+====================================================================
+
+802.15.4 supports several different source and destination addressing
+modes, and so has a variable sized packet header.[2]_ A TinyOS device MUST
+support packet frames with 16-bit short source and destination addresses.
+A TinyOS device MAY support additional 802.15.4 frame formats. 
+
+3. Frame Format
+====================================================================
+
+TinyOS has two 802.15.4 frame formats. The first format, the T-Frame, is
+for TinyOS networks which do not share their channel with other wireless
+networking architectures. This frame format assumes that TinyOS can use
+every bit of the packet and does not need to state that it is a TinyOS packet.
+T-Frame stands for "TinyOS Frame."
+
+The TinyOS 802.15.4 T-frame format is as follows::
+
+  +-------------------+---------+------------------------------+--------------+
+  | 802.15.4 Header   | AM type |            data              | 802.15.4 CRC |
+  +-------------------+---------+------------------------------+--------------+
+
+AM type is a single byte field which indicates which active message type
+the payload contains.
+
+The second format, the I-Frame, is for TinyOS networks which share their
+channel with 6lowpan networks. 6lowpan reserves a series of codes for the
+first byte of the payload for non-6lowpan packets. In order to interoperate
+with 6lowpan networks, TinyOS I-Frames specify such a field. I-Frame stands
+for "Interoperable Frame."
+
+The TinyOS 802.15.4 I-frame format is as follows::
+
+  +-------------------+---------+---------+--------------------+--------------+
+  | 802.15.4 Header   | 6lowpan | AM type |        data        | 802.15.4 CRC |
+  +-------------------+---------+------------------------------+--------------+
+
+AM type is the same as in a T-frame. 6lowpan is the NALP code to
+identify this as a TinyOS packet. NALP codes must be in the range of
+0-63.  TinyOS uses code 63 (0x3F).
+
+The AM type 63 is reserved for both T-Frames and I-Frames. A TinyOS 
+program MUST NOT use it.
+
+4. Implementation
+====================================================================
+
+An implementation of T-Frames and I-Frames can be found in
+tinyos-2.x/tos/chips/cc2420/.  The components in
+tos/chips/cc2420/lowpan/ control which is used. By default, TinyOS
+802.15.4 stacks use I-Frames, and the 'tframe' make option configures
+them to use T-Frames. This make option defines a symbol named
+``TFRAMES_ENABLED``. In the case of the CC2420 stack, this causes
+``CC2420.h`` to define ``CC2420_IFRAME_TYPE``, which adds the extra
+byte to the message_t header structure.
+
+
+
+5. Author Addresses
+====================================================================
+
+| Jonathan Hui
+| 657 Mission St. Ste. 600
+| Arched Rock Corporation
+| San Francisco, CA 94105-4120
+|
+| phone - +1 415 692 0828
+| email - jhui@archedrock.com
+|
+| Philip Levis
+| 358 Gates Hall
+| Stanford University
+| Stanford, CA 94305-9030
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+|
+| David Moss
+| Rincon Research Corporation
+| 101 N. Wilmot, Suite 101
+| Tucson, AZ  85750
+|
+| phone - +1 520 519 3138
+| email - dmm@rincon.com
+
diff --git a/doc/txt/tep126.txt b/doc/txt/tep126.txt
new file mode 100644
index 00000000..98132931
--- /dev/null
+++ b/doc/txt/tep126.txt
@@ -0,0 +1,737 @@
+===================================
+CC2420 Radio Stack
+===================================
+
+:TEP: 126
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: David Moss, Jonathan Hui, Philip Levis, and Jung Il Choi
+
+:Draft-Created: 5-Mar-2007
+:Draft-Version: $Revision: 1.5 $
+:Draft-Modified: $Date: 2007-06-14 18:51:58 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+
+Abstract
+====================================================================
+
+This TEP documents the architecture of the CC2420 low power listening
+radio stack found in TinyOS 2.x.  Radio stack layers and implementation 
+details of the CC2420 stack will be discussed.  Readers will be better
+informed about existing features, possible improvements, and limitations
+of the CC2420 radio stack.  Furthermore, lessons learned from
+the construction of the stack can help guide development 
+of future TinyOS radio stacks.
+
+
+1. Introduction
+====================================================================
+
+The TI/Chipcon CC2420 radio is a complex device, taking care of
+many of the low-level details of transmitting and receiving packets
+through hardware.  Specifying the proper behavior of that hardware 
+requires a well defined radio stack implementation.  Although much 
+of the functionality is available within the radio chip itself, there 
+are still many factors to consider when implementing a flexible,
+general radio stack.
+
+The software radio stack that drives the CC2420 radio consists of
+many layers that sit between the application and hardware.  The highest
+levels of the radio stack modify data and headers in each packet, while
+the lowest levels determine the actual send and receive behavior.  
+By understanding the functionality at each layer of the stack, as well 
+as the architecture of a layer itself, it is possible to easily extend 
+or condense the CC2420 radio stack to meet project requirements.
+
+Some details about the CC2420 are out of the scope of this document.
+These details can be found in the CC2420 datasheet [1]_.
+
+
+2. CC2420 Radio Stack Layers
+====================================================================
+
+2.1 Layer Architecture
+--------------------------------------------------------------------
+
+The CC2420 radio stack consists of layers of functionality stacked 
+on top of each other to provide a complete mechanism that
+modifies, filters, transmits, and controls inbound and outbound messages.  
+Each layer is a distinct module that can provide and use three sets of 
+interfaces in relation to the actual radio stack:  Send, Receive, and 
+SplitControl.  If a general layer provides one of those interfaces, it 
+also uses that interface from the layer below it in the stack.  This 
+allows any given layer to be inserted anywhere in the stack through
+independant wiring. For example:::
+
+  provides interface Send;
+  uses interface Send as SubSend;
+  
+  provides interface Receive;
+  uses interface Receive as SubReceive;
+  
+  provides interface SplitControl;
+  uses interface SplitControl as subControl;
+  
+The actual wiring of the CC2420 radio stack is done at the highest level
+of the stack, inside CC2420ActiveMessageC.  This configuration defines 
+three branches:  Send, Receive, and SplitControl. Note that not all
+layers need to provide and use all three Send, Receive, and SplitControl
+interfaces:::
+
+  // SplitControl Layers
+  SplitControl = LplC;
+  LplC.SubControl -> CsmaC;
+  
+  // Send Layers
+  AM.SubSend -> UniqueSendC;
+  UniqueSendC.SubSend -> LinkC;
+  LinkC.SubSend -> LplC.Send;
+  LplC.SubSend -> TinyosNetworkC.Send;
+  TinyosNetworkC.SubSend -> CsmaC;
+  
+  // Receive Layers
+  AM.SubReceive -> LplC;
+  LplC.SubReceive -> UniqueReceiveC.Receive;
+  UniqueReceiveC.SubReceive -> TinyosNetworkC.Receive;
+  TinyosNetworkC.SubReceive -> CsmaC;
+
+If another layer were to be added, CC2420ActiveMessageC would need
+to be modified to wire it into the correct location.  
+
+
+2.1 Layer Descriptions
+--------------------------------------------------------------------
+The layers found within this radio stack are in the following order:
+
+- ActiveMessageP:  This is the highest layer in the stack, responsible 
+  for filling in details in the packet header and providing information
+  about the packet to the application level [2]_.  Because the CC2420 radio
+  chip itself uses 802.15.4 headers in hardware [1]_, it is not possible
+  for the layer to rearrange header bytes.
+
+- UniqueSend:  This layer generates a unique Data Sequence 
+  Number (DSN) byte for the packet header.  This byte is incremented once 
+  per outgoing packet, starting with a pseudo-randomly generated number.
+  A receiver can detect duplicate packets by comparing
+  the source and DSN byte of a received packet with previous packets.  
+  DSN is defined in the 802.15.4 specification [3]_.
+
+- PacketLink: This layer provides automatic retransmission functionality
+  and is responsible for retrying a packet transmission if no
+  acknowledgement was heard from the receiver.  PacketLink is 
+  activated on a per-message basis, meaning the outgoing packet will
+  not use PacketLink unless it is configured ahead of time to do so.
+  PacketLink is most reliable when software acknowledgements are enabled 
+  as opposed to hardware auto acknowledgements.
+
+- CC2420AckLplP / CC2420NoAckLplP [4]_:  These layers provide
+  asynchronous low power listening implementations.  Supporting both of them
+  is CC2420DutyCycleP.  The DutyCycleP component is responsible for 
+  turning the radio on and off and performing receive checks.  
+  After a detection occurs, DutyCycleP is hands off responsibility to 
+  LowPowerListeningP to perform some transaction and turn the radio off 
+  when convenient.  Low power listening transmissions are activated on 
+  a per-message basis, and the layer will continuously retransmit the full outbound 
+  packet until either a response from the receiver is heard or the 
+  transmit time expires.
+
+  The AckLplP implementation supports acknowledgement gaps during the
+  low power listening packetized preamble, which allows
+  transmitters to stop early but penalizes receive check lengths.
+  AckLplP low power listening is optimal for high transmission, long
+  receive check interval networks.
+
+  The NoAckLplP implementation does not support acknowledgements during
+  the packetized preamble.  It continuously modulates the channel,
+  allowing the receiver to perform the smallest possible receive check.
+  NoAckLpl low power listening is effective for low transmission, short
+  receive check interval networks.
+
+- UniqueReceive: This layer maintains a history of the source address
+  and DSN byte of the past few packets it has received, and helps
+  filter out duplicate received packets.
+
+- TinyosNetworkC: This layer allows the TinyOS 2.x radio stack to 
+  interoperate with other non-TinyOS networks.  Proposed 6LowPAN 
+  specifications include a network identifier byte after the 
+  standard 802.15.4 header [5]_. If interoperability frames are 
+  used, the dispatch layer provides functionality for setting 
+  the network byte on outgoing packets and filtering non-TinyOS 
+  incoming packets.  
+
+- CsmaC:  This layer is responsible for defining 802.15.4 FCF
+  byte information in the outbound packet, providing default
+  backoff times when the radio detects a channel in use, and
+  defining the power-up/power-down procedure for the radio.
+
+- TransmitP/ReceiveP: These layers are responsible for interacting
+  directly with the radio through the SPI bus, interrupts, and GPIO lines.
+
+ +--------------------------------------------------+
+ |               Application Layer                  |
+ |                                                  |
+ +-----------------------+--------------------------+
+
+  +----------------------+-------------------------+
+  |             Active Message Layer               |
+  +----------------------+-------------------------+
+
+  +----------------------+-------------------------+
+  |              Unique Send Layer                 |
+  +----------------------+-------------------------+
+                         
+  +----------------------+-------------------------+
+  |         Optional Packet Link Layer             |
+  +----------------------+-------------------------+
+                         
+  +----------------------+-------------------------+
+  |  Optional Low Power Listening Implementations  |
+  +----------------------+-------------------------+
+                         
+  +----------------------+-------------------------+
+  |        Unique Receive Filtering Layer          |
+  +----------------------+-------------------------+
+                         
+  +----------------------+-------------------------+
+  |      Optional 6LowPAN TinyOS Network Layer     |
+  +----------------------+-------------------------+
+                         
+  +----------------------+-------------------------+
+  |     Carrier Sense Multiple Access (CSMA)       |
+  +----------------------+-------------------------+
+                         
+                                    
+ +----------+----------+   +----------+----------+
+ |      ReceiveP       |   |      TransmitP      |
+ +----------+----------+   +----------+----------+
+                                     
+                         
+ +-----------------------+-------------------------+
+ |    SPI bus, GPIO, Interrupts, Timer Capture     |
+ +-------------------------------------------------+
+
+
+3. CC2420 Packet Format and Specifications
+====================================================================
+
+The CC2420 Packet structure is defined in CC2420.h.  The default
+I-Frame CC2420 header takes on the following format:::
+
+  typedef nx_struct cc2420_header_t {
+    nxle_uint8_t length;
+    nxle_uint16_t fcf;
+    nxle_uint8_t dsn;
+    nxle_uint16_t destpan;
+    nxle_uint16_t dest;
+    nxle_uint16_t src;
+    nxle_uint8_t network;  // optionally included with 6LowPAN layer
+    nxle_uint8_t type;
+  } cc2420_header_t;
+
+All fields up to 'network' are 802.15.4 specified fields, and are 
+used in the CC2420 hardware itself. The 'network' field is a 6LowPAN 
+interoperability specification [5]_ only to be included when the
+6LowPAN TinyosNetwork layer is included.  The 'type' field is a 
+TinyOS specific field.
+
+The TinyOS T-Frame packet does not include the 'network' field, nor
+the functionality found in the Dispatch layer to set and check
+the 'network' field.
+
+No software footer is defined for the CC2420 radio.  A 2-byte
+CRC byte is auto-appended to each outbound packet by the CC2420 radio
+hardware itself.
+
+The maximum size of a packet is 128 bytes including its headers and 
+CRC, which matches the 802.15.4 specifications.  Increasing the 
+packet size will increase data throughput and RAM consumption 
+in the TinyOS application, but will also increase the probability 
+that interference will cause the packet to be destroyed and need 
+to be retransmitted. The TOSH_DATA_LENGTH preprocessor variable can 
+be altered to increase the size of the message_t payload at 
+compile time [2]_. 
+
+
+4. CSMA/CA
+====================================================================
+
+4.1 Clear Channel Assessment
+--------------------------------------------------------------------
+By default, the CC2420 radio stack performs a clear channel assessment 
+(CCA) before transmitting.  If the channel is not clear, the radio backs
+off for some short, random period of time before attempting to transmit 
+again.  The CC2420 chip itself provides a strobe command to transmit
+the packet if the channel is currently clear.
+
+To specify whether or not to transmit with clear channel assessment,
+the CC2420TransmitP requests CCA backoff input through the RadioBackoff
+interface on a per-message basis.  By default, each packet will be
+transmitted with CCA enabled.
+
+If layers above the CSMA layer wish to disable the clear channel
+assessments before transmission, they must intercept the 
+RadioBackoff.requestCca(...) event for that message and call back
+using RadioBackoff.setCca(FALSE).
+ 
+
+4.2 Radio Backoff
+--------------------------------------------------------------------
+A backoff is a period of time where the radio pauses before attempting
+to transmit. When the radio needs to backoff, it can choose one of three 
+backoff periods:  initialBackoff, congestionBackoff, and lplBackoff.
+These are implemented through the RadioBackoff interface, which signals
+out a request to specify the backoff period.  Unlike the CsmaBackoff
+interface, components that are interested in adjusting the backoff can
+call back using commands in the RadioBackoff interface.  This allows 
+multiple components to adjust the backoff period for packets they are 
+specifically listening to adjust.  The lower the backoff period, the
+faster the transmission, but the more likely the transmitter is to hog
+the channel.  Also, backoff periods should be as random as possible
+to prevent two transmitters from sampling the channel at the same 
+moment.
+
+InitialBackoff is the shortest backoff period, requested on the first
+attempt to transmit a packet.
+
+CongestionBackoff is a longer backoff period used when the channel is
+found to be in use.  By using a longer backoff period in this case, 
+the transmitter is less likely to unfairly tie up the channel. 
+
+LplBackoff is the backoff period used for a packet being delivered
+with low power listening.  Because low power listening requires 
+the channel to be modulated as continuously as possible while avoiding
+interference with other transmitters, the low power listening 
+backoff period is intentionally short.
+
+
+5. Acknowledgements
+====================================================================
+
+5.1 Hardware vs. Software Acknowledgements
+--------------------------------------------------------------------
+
+Originally, the CC2420 radio stack only used hardware generated
+auto-acknowledgements provided by the CC2420 chip itself.  This led
+to some issues, such as false acknowledgements where the radio chip
+would receive a packet and acknowledge its reception and the 
+microcontroller would never actually receive the packet.
+
+The current CC2420 stack uses software acknowledgements, which 
+have a higher drop percentage. When used with the UniqueSend
+and UniqueReceive interfaces, dropped acknowledgements are more desirable 
+than false acknowledgements.  Received packets are always acknowledged 
+before being filtered as a duplicate.
+
+Use the PacketAcknowledgements or PacketLink interfaces
+to determine if a packet was successfully acknowledged.
+
+
+5.2 Data Sequence Numbers - UniqueSend and UniqueReceive
+--------------------------------------------------------------------
+The 802.15.4 specification identifies a Data Sequence Number (DSN)
+byte in the message header to filter out duplicate packets [3]_.  
+
+The UniqueSend interface at the top of the CC2420 radio stack is 
+responsible for setting the DSN byte.  Upon boot, an initial DSN
+byte is generated using a pseudo-random number generator with a 
+maximum of 8-bits (256) values.  This number is incremented on
+each outgoing packet transmission.  Even if lower levels such as 
+PacketLink or LowPowerListening retransmit the packet, the DSN byte 
+stays the same for that packet.
+
+The UniqueReceive interface at the bottom of the CC2420 radio stack
+is responsible for filtering out duplicate messages based on 
+source address and DSN.  The UniqueReceive interface is not meant
+to stop sophisticated replay attacks.  '
+
+As packets are received, DSN and source address information is placed 
+into elements of an array. Each subsequent message from previously 
+logged addresses overwrite information in the element allocated to 
+that source address. This prevents UniqueReceive's history from 
+losing DSN byte information from sources that are not able to access 
+the channel as often. If the number of elements in the history array
+runs out, UniqueReceive uses a best effort method to avoid replacing 
+recently updated DSN/Source information entries.
+
+
+6. PacketLink Implementation
+====================================================================
+PacketLink is a layer added to the CC2420 radio stack to help unicast
+packets get delivered successfully.  In previous version of TinyOS radio 
+stacks, it was left up to the application layer to retry a message 
+transmission if the application determined the message was not properly
+received.  The PacketLink layer helps to remove the reliable delivery
+responsibility and functional baggage from application layers.
+
+
+6.1 Compiling in the PacketLink layer
+--------------------------------------------------------------------
+Because the PacketLink layer uses up extra memory footprint,
+it is not compiled in by default.  Developers can simply define
+the preprocessor variable PACKET_LINK to compile the functionality
+of the PacketLink layer in with the CC2420 stack.
+
+
+6.2 Implementation and Usage
+--------------------------------------------------------------------
+To send a message using PacketLink, the PacketLink
+interface must be called ahead of time to specify two fields in the outbound
+message's metadata:::
+  
+  command void setRetries(message_t *msg, uint16_t maxRetries);
+  command void setRetryDelay(message_t *msg, uint16_t retryDelay);
+
+The first command, setRetries(..), will specify the maximum number
+of times the message should be sent before the radio stack stops
+transmission.  The second command, setRetryDelay(..), specifies
+the amount of delay in milliseconds between each retry.  The combination
+of these two commands can set a packet to retry as many times as needed
+for as long as necessary.
+
+Because PacketLink relies on acknowledgements, false acknowledgements 
+from the receiver will cause PacketLink to fail.  If using software
+acknowledgements, false acknowledgements can still occur as a result
+of the limited DSN space, other 802.15.4 radios in the area with
+the same destination address, etc.
+
+
+
+7. Asynchronous Low Power Listening Implementation
+====================================================================
+Because the Low Power Listening layer uses up extra memory footprint,
+it is not compiled in by default.  Developers can simply define
+the preprocessor variable LOW_POWER_LISTENING to compile the functionality
+of the Low Power Listening layer in with the CC2420 stack.
+
+7.1 Design Considerations
+--------------------------------------------------------------------
+The CC2420 radio stack low power listening implementation relies
+on clear channel assessments to determine if there is a transmitter
+nearby.  This allows the receiver to turn on and determine there are no
+transmitters in a shorter amount of time than leaving the radio on
+long enough to pick up a full packet. 
+
+The transmitters perform a message delivery by transmitting
+the full packet over and over again for twice the duration of the receiver's 
+duty cycle period.  Transmitting for twice as long increases the 
+probability that the message will be detected by the receiver, and 
+allows the receiver to shave off a small amount of time it needs to 
+keep its radio on.
+
+Typically, the transmission of a single packet takes on the following 
+form over time:
+
+ +----------------------+-----------+--------------------+
+ |     LPL Backoff      | Packet Tx |      Ack Wait      |
+ +----------------------+-----------+--------------------+
+
+To decrease the amount of time required for a receive check, the channel 
+must be modulated by the transmitter as continuously as possible. 
+The only period where the channel is modulated is during the 
+Packet Transmission phase.  The receiver must continuosly sample the CCA pin 
+a moment longer than the LPL Backoff period and Ack Wait period combined
+to overlap the Packet Transmission period.  By making the LPL backoff
+period as short as possible, we can decrease the amount of time a receiver's
+radio must be turned on when performing a receive check.
+
+If two transmitters attempt to transmit using low power listening,
+one transmitter may hog the channel if its LPL backoff period
+is set too short.  Both nodes transmitting at the same time
+will cause interference and prevent each other from 
+successfully delivering their messages to the intended recipient.  
+
+To allow multiple transmitters to transmit low power listening packets 
+at the same time, the LPL backoff period needed to be increased 
+greater than the desired minimum.  This increases the amount of time
+receiver radios need to be on to perform a receive check because
+the channel is no longer being modulated as continuously as possible.
+In other words, the channel is allowed to be shared amongst multiple 
+transmitters at the expense of power consumption.
+
+
+7.2 Minimizing Power Consumption
+--------------------------------------------------------------------
+There are several methods the CC2420 radio stack uses to minimize
+power consumption:
+
+1. Invalid Packet Shutdown
+
+  Typically, packets are filtered out by address at the radio hardware
+  level.  When a receiver wakes up and does not receive any
+  packets into the low power listening layer of the radio stack, it 
+  will automatically go back to sleep after some period of time.  As a 
+  secondary backup, if address decoding on the radio chip is disabled, 
+  the low power listening implementation will shut down the radio if 
+  three packets are receive that do not belong to the node.  This helps 
+  prevent against denial of sleep attacks or the typical transmission 
+  behavior found in an ad-hoc network with many nodes.
+
+2. Early Transmission Completion
+
+  A transmitter typically sends a packet for twice the amount of time
+  as the receiver's receive check period.  This increases the probability
+  that the receiver will detect the packet.  However, if the transmitter receives
+  an acknowledgement before the end of its transmission period, it
+  will stop transmitting to save energy.  This is an improvement
+  over previous low power listening implementations, which transmitted
+  for the full period of time regardless of whether the receiver has 
+  already woken up and received the packet.
+
+3. Auto Shutdown
+
+  If the radio does not send or receive messages for some period of
+  time while low power listening is enabled, the radio will automatically 
+  turn off and begin duty cycling at its specified duty cycle period.
+
+4. CCA Sampling Strategy
+
+  The actual receive check is performed in a loop inside a function, 
+  not a spinning task.  This allows the sampling to be performed
+  continuously, with the goal of turning the radio off as quickly as 
+  possible without interruption.
+
+
+8. CC2420 Settings and Registers
+====================================================================
+
+To interact with registers on the CC2420 chip, the SPI bus must be
+acquired, the chip selecct (CSn) pin must be cleared, and then the 
+interaction may occur.  After the interaction completes, the
+CSn pin must be set high.
+
+All registers and strobes are defined in the CC2420.h file, and most 
+are accessible through the CC2420SpiC component.  If your application
+requires access to a specific register or strobe, the CC2420SpiC component
+is the place to add access to it.
+
+Configuring the CC2420 requires the developer to access the CC2420Config
+interface provided by CC2420ControlC.  First call the CC2420Config commands to 
+change the desired settings of the radio. If the radio happens to
+be off, the changes will be committed at the time it is turned on.
+Alternatively, calling sync() will commit the changes to the CC2420.
+
+RSSI can be sampled directly by calling the ReadRssi interface provided
+by CC2420ControlC.  See page 50 of the CC2420 datasheet for information
+on how to convert RSSI to LQI and why it may not be such a good idea [1]_.
+
+
+
+9. Cross-platform Portability
+====================================================================
+To port the CC2420 radio to another platform, the following interfaces
+need to be implemented:::
+
+  // GPIO Pins
+  interface GeneralIO as CCA;
+  interface GeneralIO as CSN;
+  interface GeneralIO as FIFO;
+  interface GeneralIO as FIFOP;
+  interface GeneralIO as RSTN;
+  interface GeneralIO as SFD;
+  interface GeneralIO as VREN;
+    
+  // SPI Bus
+  interface Resource;
+  interface SpiByte;
+  interface SpiPacket;
+
+  // Interrupts
+  interface GpioCapture as CaptureSFD;
+  interface GpioInterrupt as InterruptCCA;
+  interface GpioInterrupt as InterruptFIFOP;
+
+The GpioCapture interface is tied through the Timer to provide a relative time
+at which the interrupt occurred.  This is useful for timestamping received
+packets for node synchronization.
+
+If the CC2420 is not connected to the proper interrupt lines, 
+interrupts can be emulated through the use of a spinning task
+that polls the GPIO pin.  The MICAz implementation, for example, does this
+for the CCA interrupt.
+
+
+10. Future Improvement Recommendations
+====================================================================
+
+Many improvements can be made to the CC2420 stack.  Below are some
+recommendations:
+
+10.1 AES Encryption
+--------------------------------------------------------------------
+The CC2420 chip itself provides AES-128 encryption. The implementation
+involves loading the security RAM buffers on the CC2420 with the information
+to be encrypted - this would be the payload of a packet, without
+the header.  After the payload is encrypted, the microcontroller reads
+out of the security RAM buffer and concatenates the data with the 
+unencrypted packet header.  This full packet would be uploaded again to the CC2420
+TXFIFO buffer and transmitted.  
+
+Because the CC2420 cannot begin encryption at a particular offset
+and needs to be written, read, and re-written, use of the AES-128 may be 
+inefficient and will certainly decrease throughput.
+
+
+10.2 Authentication
+--------------------------------------------------------------------
+In many cases, authentication is more desirable than encryption. 
+Encryption significantly increases energy and decreases packet throughput,
+which does not meet some application requirements. A layer could be 
+developed and added toward the bottom of the radio stack that validates
+neighbors, preventing packets from invalid neighbors from reaching the
+application layer.  Several proprietary authentication layers have
+been developed for the CC2420 stack, but so far none are available to 
+the general public.
+
+A solid authentication layer would most likely involve the use of a 
+neighbor table and 32-bit frame counts to prevent against replay attacks.
+Once a neighbor is verified and established, the node needs to ensure that
+future packets are still coming from the same trusted source.  Again,
+some high speed low energy proprietary methods to accomplish this exist, but 
+encryption is typically the standard method used.
+
+
+10.3 Synchronous Low Power Listening
+--------------------------------------------------------------------
+A synchronous low power listening layer can be transparently built on 
+top of the asynchronous low power listening layer.  One implementation
+of this has already been done on a version of the CC1000 radio stack.
+Moteiv's Boomerang radio stack also has a synchronous low power listening 
+layer built as a standalone solution.
+
+In the case of building a synchronous layer on top of the asynchronous
+low power listening layer, a transmitter's radio stack can detect when 
+a particular receiver is performing its receive checks by verifying the 
+packet was acknowledged after a sendDone event.  The transmitter can then 
+build a table to know when to begin transmission for that particular receiver.
+Each successful transmission would need to adjust the table with updated 
+information to avoid clock skew problems.
+
+The asynchronous low power listening stack needs to be altered a bit
+to make this strategy successful.  Currently, duty cycling is started
+and stopped as packets are detected, received, and transmitted.  The
+stack would need to be altered to keep a constant clock running in the
+background that determines when to perform receive checks.  The
+clock should not be affected by normal radio stack Rx/Tx behavior.  This 
+would allow the receiver to maintain a predictable receive check cycle
+for the transmitter to follow.
+
+If the synchronous low power listening layer loses synchronization,
+the radio stack can always fall back on the asynchronous low power listening
+layer for successful message delivery.
+
+
+10.4 Neighbor Tables
+--------------------------------------------------------------------
+Moteiv's Boomerange Sensornet Protocol (SP) implementation is a
+good model to follow for radio stack architecture.  One of the nice features
+of SP is the design and implementation of the neighbor table.  By
+providing and sharing neighbor table information across the entire
+CC2420 radio stack, RAM can be conserved throughout the radio stack
+and TinyOS applications.
+
+
+10.5 Radio Independant Layers
+--------------------------------------------------------------------
+The best radio stack architecture is one that is completely radio independant.
+Many of the layers in the CC2420 stack can be implemented independant
+of the hardware underneath if the radio stack architecture was redesigned
+and reimplemented. The low power listening receive check strategy may need a 
+hardware-dependant implementation, but other layers like PacketLink,
+UniqueSend, UniqueReceive, ActiveMessage, Dispatch, etc. do not require
+a CC2420 underneath to operate properly.  The ultimate TinyOS radio
+stack would be one that forms an abstraction between radio-dependant
+layers and radio-independant layers, and operates with the same
+behavior across any radio chip.
+
+
+10.6 Extendable Metadata
+--------------------------------------------------------------------
+Layers added into the radio stack may require extra bytes of metadata.
+The PacketLink layer, for example, requires two extra fields
+in each message's metadata to hold the message's max retries and
+delay between retries.  The low power listening layer requires
+an extra field to specify the destination's duty cycle period for
+a proper delivery.
+
+If layers are not included in the radio stack during compile time,
+their fields should not be included in the message_t's metadata.
+
+One version of extendable metadata was implementing using an array at the end
+of the metadata struct that would adjust its size based on which layers were
+compiled in and what size fields they required.  A combination of
+compiler support in the form of unique(..) and uniqueCount(..) functions
+made it possible for the array to adjust its size.  
+
+Explicit compiler support would be the most desirable solution to add 
+fields to a struct as they are needed.
+
+
+10.7 Error Correcting Codes (ECC)
+--------------------------------------------------------------------
+When two nodes are communicating near the edge of their RF range,
+it has been observed that interference may cause the packet to be
+corrupted enough that the CRC byte and payload actually passes
+the check, even though the payload is not valid.  There is a one
+in 65535 chance of a CRC byte passing the check for a corrupted
+packet.  Although this is slim, in many cases it is unacceptable.
+Some work arounds have implemented an extra byte of software generated
+CRC to add to the reliability, and tests have proven its effectiveness.
+Taking this a step further, an ECC layer in the radio stack would help 
+correct corrupted payloads and increase the distance at which nodes 
+can reliably communicate.
+
+
+
+11. Author's Address
+====================================================================
+
+| David Moss
+| Rincon Research Corporation
+| 101 N. Wilmot, Suite 101
+| Tucson, AZ  85750
+|
+| phone - +1 520 519 3138
+| email ? dmm@rincon.com
+|
+|
+| Jonathan Hui
+| 657 Mission St. Ste. 600
+| Arched Rock Corporation
+| San Francisco, CA 94105-4120
+|
+| phone - +1 415 692 0828
+| email - jhui@archedrock.com
+|
+|
+| Philip Levis
+| 358 Gates Hall
+| Stanford University
+| Stanford, CA 94305-9030
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+|
+|
+| Jung Il Choi
+| <contact>
+| phone -
+| email -
+
+
+12. Citations
+====================================================================
+.. [1] TI/Chipcon CC2420 Datasheet.  http://www.chipcon.com/files/CC2420_Data_Sheet_1_3.pdf
+.. [2] TEP111: message_t
+.. [3] IEEE 802.15.4 Specification: http://standards.ieee.org/getieee802/802.15.html
+.. [4] TEP105: Low Power Listening
+.. [5] TEP125: TinyOS 802.15.4 Frames
diff --git a/doc/txt/tep127.txt b/doc/txt/tep127.txt
new file mode 100644
index 00000000..d17f5da8
--- /dev/null
+++ b/doc/txt/tep127.txt
@@ -0,0 +1,186 @@
+===================================
+Packet Link Layer
+===================================
+
+:TEP: 127
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: David Moss, Philip Levis
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+
+Abstract
+====================================================================
+
+This TEP describes the behavior and interfaces of the TinyOS 2.x 
+Packet Link Layer.  The Packet Link Layer is an optional radio stack 
+layer responsible for the reliable delivery of a packet from node to 
+node.  Packet Link provides error correction functionality found in 
+Layer 2 of the OSI model [1]_.
+
+
+1. Introduction
+====================================================================
+
+In wireless networks, packets are regularly dropped between point to point
+communications due to interference or RF range.  Correcting these dropped 
+packets requires the transmitter to first recognize that the packet was 
+not acknowledged, and then retransmit that packet.  
+
+Retransmitting the packet adds its own set of issues.  Specifically, the 
+receiver will receive duplicate packets due to its own dropped acknowledgements.  
+Logic is therefore required to allow receiver to recognize and dump duplicate 
+packets, but only after the acknowledgement has been sent back to the
+transmitter.  
+
+With these two pieces of functionality: the ability for a transmitter to 
+keep retrying until it gets an acknowledgement and the ability
+for a receiver to accept only a single copy of the packet, a Packet Link Layer
+can be formed to reliably deliver a single packet from point to point.
+
+
+2. Design Considerations
+====================================================================
+
+2.1 Time spent retrying a delivery
+--------------------------------------------------------------------
+Some networks have different timing characteristics than others.  
+Consider a person carrying a wireless device while walking in and out
+of RF range of another node.  In this case, the device may want to 
+retry the transmission a few times over the course of a few seconds before 
+declaring the delivery unsuccessful.  A robust Packet Link Layer should 
+allow the developer to specify the amount of time spent retrying as well 
+as the number of retries to send.
+
+
+2.2 Setting the packet sequence number
+--------------------------------------------------------------------
+To detect duplicate packets, a sequence number byte can be used
+within the packet to verify against previously received
+packets.  If the source address and sequence number of a newly received
+packet matches that of a previously received packet, then the newly received
+packet is a duplicate and may be dumped.  To prevent the packet sequence
+number byte from changing on each retransmission, the byte should be set
+at or above the Packet Link Layer and never changed below.
+
+
+2.3 False Acknowledgements
+--------------------------------------------------------------------
+The low levels of a radio stack or the radio chip itself are typically 
+responsible for generating packet acknowledgements.  It has been
+observed in some platforms that the radio chip will generate false
+auto-acknowledgements. This occurs when the radio receives the packet and 
+sends an acknowledgement but the microcontroller never gets the message 
+due to some error.  In this case, the transmitter would believe the 
+packet got to the destination successfully but the receiver would have 
+no knowledge that a packet was received. Software initiated 
+acknowledgements prevent this issue by removing the possibility of 
+false acknowledgements.
+
+
+
+3. Interface
+====================================================================
+
+3.1 PacketLink Interface
+--------------------------------------------------------------------
+
+The TEP proposes this PacketLink interface:::
+
+  interface PacketLink {
+    command void setRetries(message_t *msg, uint16_t maxRetries);
+    command void setRetryDelay(message_t *msg, uint16_t retryDelay);
+    command uint16_t getRetries(message_t *msg);
+    command uint16_t getRetryDelay(message_t *msg);
+    command bool wasDelivered(message_t *msg);
+  }
+
+PacketLinks interface functions:
+
+  ``setRetries(message_t *msg, uint16_t maxRetries)``
+
+- Sets the maximum number of times to retry the transmission of the message
+
+  ``setRetryDelay(message_t *msg, uint16_t retryDelay)``
+
+- Set the delay, in milliseconds, between each retransmission
+
+  ``getRetries(message_t *msg)``
+
+- Returns the maximum number of retries configured for the given message
+
+  ``getRetryDelay(message_t *msg)``
+
+- Returns the delay, in milliseconds, between each retransmission for the given 
+  message
+
+  ``wasDelivered(message_t *msg)``
+ 
+- This command may be called after the sendDone() event is signaled. It is the 
+  equivalent of ``PacketAcknowledgements.wasAcked(message_t *msg)``, so is only 
+  a helper function to make the PacketLink interface easier to use.
+
+
+
+3.2 Expected Behavior
+--------------------------------------------------------------------
+
+The PacketLink interface is accessed by the application layer before 
+the packet is passed to the radio stack for transmission.  The application
+layer will call setRetries(...) and setRetryDelay(...), passing in the
+message it is about to send.  
+
+The interface MUST configure metadata for the packet to specify the maximum 
+number of retries and the amount of delay between each retry. When the 
+send process reaches the Packet Link Layer, it MUST automatically check the 
+packet's metadata and retry sending the packet as previously configured.
+
+For example, to configure a packet to be retried a maximum of 50 times
+over the next 5 seconds, the developer would execute the following commands
+before sending the packet:::
+
+  call PacketLink.setRetries(msg, 50);
+  call PacketLink.setRetryDelay(msg, 100);
+
+By placing a 100 ms delay between each retry and allowing up to 50 retries
+maximum, the maximum amount of time the message will be transmitted is
+(50 * 100) ms, or 5000 ms.
+
+When transmitting a packet configured for reliable delivery to the
+broadcast address, the Packet Link Layer SHOULD allow the packet to be
+retried.  This will let the transmitter know that at least one node
+received the message.
+
+
+4. Author's Address
+====================================================================
+
+| David Moss
+| Rincon Research Corporation
+| 101 N. Wilmot, Suite 101
+| Tucson, AZ  85750
+|
+| phone - +1 520 519 3138
+| email ? dmm@rincon.com
+|
+|
+| Philip Levis
+| 358 Gates Hall
+| Stanford University
+| Stanford, CA 94305-9030
+|
+| phone - +1 650 725 9046
+| email - pal@cs.stanford.edu
+|
+
+5. Citations
+====================================================================
+.. [1] "OSI model" http://en.wikipedia.org/wiki/OSI_model
diff --git a/doc/txt/tep128.txt b/doc/txt/tep128.txt
new file mode 100644
index 00000000..6584a6df
--- /dev/null
+++ b/doc/txt/tep128.txt
@@ -0,0 +1,496 @@
+======================================================
+Platform Independent Non-Volatile Storage Abstractions
+======================================================
+
+:TEP: 128
+:Group: Storage Working Group 
+:Type: Documentary
+:Status: DRAFT
+:TinyOS-Version: 2.x
+:Authors: David Moss, Junzhao Du, Prabal Dutta, Deepak Ganesan,
+          Kevin Klues, Manju, Ajay Martin, and Gaurav Mathur
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+
+Abstract
+====================================================================
+
+The storage abstractions proposed by TEP 103 are implemented on a
+platform-dependent basis.  A version of BlockStorage, ConfigStorage,
+and LogStorage were created from the ground up for both the
+AT45DB and ST M25P80 flash chips.  Looking forward into the further 
+growth and development of hardware, rebuilding each of these storage 
+layers for every new flash chip will be time consuming and cause
+compatibility issues.
+
+We propose a layer of abstraction to reside between a chip-dependent
+flash chip implementation and platform-independent storage 
+implementations.  This abstraction layer should provide methods
+to perform basic flash operations (read, write, erase, flush, crc),
+as well as provide information about the physical properties of the
+flash chip.  Efficiency concerns are mitigated by the fact that each
+platform-independent abstraction is implemented in a platform-dependent
+manner, allowing it to exist on different types of memory such as
+NAND flash, NOR flash, and EEPROM.  This abstraction layer should
+allow one implementation of each storage solution to operate across
+many different platforms.
+
+
+1. Introduction
+====================================================================
+
+The implementations of the BlockStorage, ConfigStorage, and LogStorage
+layers described in TEP 103 [1] are platform dependent.  Platform-
+dependent implementations can cause behavioral and usage differences
+as well as compiling problems when attempting to port an application 
+written on one platform to another.  A true abstraction layer would
+exhibit the same set of interfaces and no differences in behavior when
+implemented across various types of non-volatile memory.
+
+A well defined non-volatile memory abstraction layer should allow core 
+functionality to work on a variety of platforms without modification.
+Some flash chips may provide extra functionality.  If a particular 
+applications on a specific platform wants to take advantage of
+extra functionality provided by a flash chip, it still has the opportunity
+to access those features directly with the understanding that its
+implementation is no longer considered platform-independent.
+
+
+1.1 Platform-dependent volume settings
+--------------------------------------------------------------------
+Differences exist between the TEP 103 storage implementations 
+on the AT45DB, ST M25P80, and PXA27X P30 flash chips.  
+
+First, volume information is defined using two distinct methods. As
+was discussed in TEP 103, an XML file is responsible for the 
+allocation of flash memory into volumes at compile time.  Individual
+storage layers can then mount to the defined volumes, which 
+allows those layers to share the flash memory resource amongst
+each other.
+
+The AT45DB implementation running on mica* platforms converts the 
+information presented in the application's volumes XML file into
+information accessible through macros:::
+
+  #ifndef STORAGE_VOLUMES_H
+  #define STORAGE_VOLUMES_H
+
+  enum {
+    VOLUME_BLOCKTEST, 
+  };
+
+  #endif
+  #if defined(VS)
+  VS(VOLUME_BLOCKTEST, 1024)
+  #undef VS
+  #endif
+  #if defined(VB)
+  VB(VOLUME_BLOCKTEST, 0)
+  #undef VB
+  #endif
+
+
+The ST M25P80 implementation running on TelosB/Tmote platforms,
+on the other hand, converts the information in the volumes XML 
+file into an array of constants:::
+
+  #ifndef __STORAGE_VOLUME_H__
+  #define __STORAGE_VOLUME_H__
+
+  #include "Stm25p.h"
+
+  #define VOLUME_BLOCKTEST 0
+
+  static const stm25p_volume_info_t STM25P_VMAP[ 1 ] = {
+      { base : 0, size : 4 },
+  };
+
+  #endif
+
+Furthermore, the two implementations defined incompatible interfaces for 
+accessing information about volumes.  For example, the AT45DB interface 
+provides the following:::
+
+  interface At45dbVolume {
+    command at45page_t remap(at45page_t volumePage);
+    command at45page_t volumeSize();
+  }
+
+The ST M25P80 interface defines a different interface, which allows
+applications to access the volume settings directly through the 
+stm25p_volume_info_t array:::
+
+  interface Stm25pVolume {
+    async event volume_id_t getVolumeId();
+  }
+
+Accessing volume information is very platform-dependent.
+A single method should be integrated to access volume 
+settings and non-volatile memory properties across any platform.
+
+Another issue exists with the previous concept of volumes.  Any storage 
+solution that wishes to retain valid data while erasing invalid data 
+MUST have access to at least two erase units.  Circular logging, 
+configuration storage, variable storage, dictionary storage, file 
+systems, and more all require a minimum of two erase units to be 
+implemented effectively.  One erase unit can be used to erase 
+all the invalid data while other erase unit(s) retains any valid data.
+
+Therefore, the minimum allowable volume size should be twice the size
+of a single erase unit to effectively support the majority of
+storage applications.  The XML tools that process and allocate
+volumes should prevent a user from defining a volume too small:::
+
+  +------------+--------+------------+-----------+------------+
+  |            | AT45DB |   ST M25P  |   PXA27x  | K9K1G08R0B |
+  +------------+--------+------------+-----------+------------+
+  | Min.Volume |  512B  | 512B-128kB | 128-256kB | 16kB-64kB  |
+  +------------+--------+------------+-----------+------------+
+
+
+
+1.2 Platform-dependent component signatures
+--------------------------------------------------------------------
+The storage components' signatures differ across implementations.  
+For example, the PXA27X P30 flash defines "P30BlockC", "P30ConfigC",
+and "P30LogC" in place of "BlockStorageC", "ConfigStorageC", and
+"LogStorageC".  Furthermore, the BlockStorageC configuration in the 
+AT45DB implementation takes the following form:::
+
+  generic configuration BlockStorageC(volume_id_t volid) {
+    provides {
+      interface BlockWrite;
+      interface BlockRead;
+    }
+  }
+
+
+while the ST M25P80 implementation adds another interface:::
+
+  generic configuration BlockStorageC( volume_id_t volume_id ) {
+    provides interface BlockRead;
+    provides interface BlockWrite;
+    provides interface StorageMap;
+  }
+
+The StorageMap interface on the M25P80 flash chip simply allows
+an application to convert a volume-based virtual address into
+a physical address on flash.  Although it is a good idea, it
+is not consistent with other platforms' defined interfaces.
+
+
+2. DirectStorage
+====================================================================
+
+3.1 Differences and advantages
+--------------------------------------------------------------------
+The core current BlockStorage, ConfigStorage, and LogStorage 
+layers can all be implemented on a platform-independent abstraction 
+layer.  Providing an interface that allows direct, unimpeded
+access to the memory below while offering information about
+the properties of that memory is the first step in doing so.
+
+The DirectStorage interface was created to as part of the answer to this
+issue.  DirectStorage resembles the BlockStorage interface in many ways, 
+with two significant exceptions:
+
+1. Erase operation
+BlockStorage's behavior erases the entire volume at a time, which may 
+consist of multiple erase units.  DirectStorage allows erases to occur 
+on per-erase unit basis.  Therefore, if only a portion of the volume
+needs to be erased, it can.
+
+2. Organization
+BlockStorage defines two different interfaces for interacting with the
+flash:  BlockRead and BlockWrite.  These two interfaces are combined
+into one interface.  The getSize() command provided by the BlockRead
+interface is removed and replaced with VolumeSettings, which will be
+discussed later.  Also, sync()/syncDone() is replaced with 
+flush/flushDone(), which is responsible for writing any data that 
+has not already been written to non-volatile memory.  Although
+the crc() command can technically exist above BlockStorage as
+well as DirectStorage, it remains in DirectStorage for its ease
+of use.
+
+Finally, layers should have the ability to be added beneath DirectStorage
+to further optimize and enable memory operation.  For example, the
+ST M25P80 flash does not have any on-board RAM buffers, so it
+is up to the microcontroller to buffer and flush out data to write units.
+This functionality may not be desirable on all applications because
+it uses valuable microcontroller resources; therefore, it should 
+be removable as layers can be added and removed from radio stack
+architecture.
+
+Other memory types may require extra support in and underneath
+the hood of DirectStorage as well. NAND flash, for example, 
+requires bad block management and error correction. This functionality
+can be implemented without changing the behavior of the DirectStorage
+interface above.
+
+
+3.2 DirectStorage Interface
+--------------------------------------------------------------------
+The DirectStorage interface is described below.  Each "addr" variable
+is a virtual address, with 0x0 relative to the base address of the 
+volume.  This base address may actually be physically located 
+somewhere else on the non-volatile memory:::
+
+  interface DirectStorage {
+  
+    command error_t read(uint32_t addr, void *buf, uint32_t len);
+    
+    command error_t write(uint32_t addr, void *buf, uint32_t len);
+    
+    command error_t erase(uint16_t eraseUnitIndex);
+    
+    command error_t flush();
+    
+    command error_t crc(uint32_t addr, uint32_t len, uint16_t baseCrc);
+    
+    
+  
+    event void readDone(uint32_t addr, void *buf, uint32_t len, error_t error);
+    
+    event void writeDone(uint32_t addr, void *buf, uint32_t len, error_t error);  
+    
+    event void eraseDone(uint16_t eraseUnitIndex, error_t error);
+    
+    event void flushDone(error_t error);
+    
+    event void crcDone(uint16_t calculatedCrc, uint32_t addr, uint32_t len, error_t error);
+  
+  }
+
+
+``read(uint32_t addr, void '*buf', uint32_t len);``
+ - Read 'len' bytes into ``*buf`` from the given address
+ - Returns FAIL if the volume is already in use
+ - Signals readDone(...) when complete.
+
+``write(uint32_t addr, void '*buf', uint32_t len);``
+ - Write 'len' bytes from ``*buf`` starting at the given address
+ - Returns FAIL if the volume is already in use
+ - Signals writeDone(...) when complete.
+
+``erase(uint16_t eraseUnitIndex);``
+ - Erase a single 0-indexed erase unit
+ - Returns FAIL if the volume is already in use
+ - Signals eraseDone(...) when complete.
+
+flush()
+ - All data that has been previously written and is not yet located on 
+   non-volatile memory should be immediately stored to non-volatile memory.
+ - Returns FAIL if the operation cannot be completed at this time
+ - Signals flushDone(...) when complete.
+
+crc(uint32_t addr, uint32_t len, uint16_t baseCrc);
+ - Calculate the CRC of 'len' bytes starting at the given address, using
+   the given baseCrc as a seed.
+ - Returns FAIL if the volume is already in use
+ - Signals crcDone(...) when complete.
+
+
+3.3 DirectModify Interface
+--------------------------------------------------------------------
+Some memory types have the ability to modify their contents without
+destroying surrounding data.  
+
+The AT45DB NOR-flash, for example, is able to do this because 
+it has built in RAM buffers coupled with small erase unit sizes. 
+The physical RAM buffers perform a read-modify-write operation to 
+effectively change the contents of flash, allowing it to emulate
+the behavior of an EEPROM with the speed and efficiency of NOR-flash.
+
+The ATmega128 microcontroller has 4kB of internal EEPROM memory which 
+can be directly modified.  Also, the MSP430 has 256 bytes of internal
+NOR-flash memory which is divided into two segments of 128 bytes each.  
+When implemented properly, this NOR-flash memory can be modified in a 
+fault-tolerant manner. 
+
+The ST M25P80 NOR-flash cannot support modification without sacrificing 
+significant overhead.  It has 16 erase units that are 64kB each,
+which is too large to effectively modify bytes.
+
+While not all memories support modification, a unified interface
+should exist to interact with memories that do.  This interface
+should be access with the understanding that applications built
+on top may not be portable to all memory types. Also, DirectStorage 
+and DirectModify are mounted to their own individual volumes, so 
+DirectModify cannot share its allocated memory resources with 
+a DirectStorage interface:::
+
+
+  interface DirectModify {
+  
+    command error_t modify(uint32_t addr, void *buf, uint32_t len);
+  
+    command error_t read(uint32_t addr, void *buf, uint32_t len);
+  
+    command error_t erase(uint16_t eraseUnitIndex);
+  
+    command error_t flush();
+  
+    command error_t crc(uint32_t addr, uint32_t len, uint16_t baseCrc);
+  
+    command bool isSupported();
+    
+    
+    event void modified(uint32_t addr, void *buf, uint32_t len, error_t error);
+  
+    event void readDone(uint32_t addr, void *buf, uint32_t len, error_t error);
+    
+    event void eraseDone(uint16_t eraseUnitIndex, error_t error);
+    
+    event void flushDone(error_t error);
+    
+    event void crcDone(uint16_t calculatedCrc, uint32_t addr, uint32_t len, error_t error);
+    
+  }
+
+
+``modify(uint32_t addr, void *buf, uint32_t len)``
+ - Modify 'len' bytes located on non-volatile memory at the given address,
+   replacing them with data from the given buffer
+ - Returns FAIL if the volume is already in use
+ - Signals modified(...) when the operation is complete
+
+``read(uint32_t addr, void *buf, uint32_t len)``
+ - Read 'len' bytes into ``*buf`` from the given address
+ - Same as DirectStorage.read(...)
+ - Returns FAIL if the volume is already in use
+ - Signals readDone(...) when complete.
+
+``erase(uint16_t eraseUnitIndex);``
+ - Erase a single 0-indexed erase unit
+ - Returns FAIL if the volume is already in use
+ - Signals eraseDone(...) when complete.
+
+``flush()``
+ - All data that has been previously written and is not yet located on 
+   non-volatile memory should be immediately stored to non-volatile memory.
+ - Same behavior as flush() methods found in Java
+ - Returns FAIL if the operation cannot be completed at this time
+ - Signals flushDone(...) when complete.
+
+``crc(uint32_t addr, uint32_t len, uint16_t baseCrc);``
+ - Calculate the CRC of 'len' bytes starting at the given address, using
+   the given baseCrc as a seed.
+ - Returns FAIL if the volume is already in use
+ - Signals crcDone(...) when complete.
+
+``isSupported()``
+ - Returns TRUE if DirectModify is available on the current memory type
+
+
+
+3.4 VolumeSettings Interface
+--------------------------------------------------------------------
+As was shown in Section 1.1, finding information about the current
+volume required platform-dependent methods of access.  VolumeSettings
+provides a unified method of accessing information about the underlying 
+memory chip and volume settings.  
+
+VolumeSettings MUST be implemented separately for DirectStorage and
+DirectModify, not only because those abstractions will exist on
+separate volumes, but also because the DirectModify interface may 
+change the available size of the volume to support certain memory 
+types such as NAND- and NOR-flash:::
+
+
+  interface VolumeSettings {
+
+    command uint32_t getVolumeSize();
+
+    command uint32_t getTotalEraseUnits();
+  
+    command uint32_t getEraseUnitSize();
+  
+    command uint32_t getTotalWriteUnits();
+
+    command uint32_t getWriteUnitSize();
+  
+    command uint8_t getFillByte();
+
+    command uint8_t getEraseUnitSizeLog2();
+  
+    command uint8_t getWriteUnitSizeLog2();
+
+  }
+
+
+getVolumeSize()
+  - Returns the size of the volume the DirectStorage layer 
+    is mounted to, in bytes
+
+getTotalEraseUnits()
+  - Returns the total number of erase units on the mounted volume
+
+getEraseUnitSize()
+  - Returns the size of an individual erase unit, in bytes
+
+getTotalWriteUnits()
+  - Returns the total number of write units on the mounted volume
+
+getWriteUnitSize()
+  - Returns the size of an individual write unit, in bytes
+
+getFillByte()
+  - Returns the default byte value found on the memory after an erase,
+    which is typically 0xFF
+
+getEraseUnitSizeLog2()
+  - Returns the size of an erase unit in Log2 format for ease of
+    calculations
+
+getWriteUnitSizeLog2()
+  - Returns the size of a write unit in Log2 format for ease of
+    calculations
+
+  
+
+4. Author's Address
+====================================================================
+
+| David Moss
+| Rincon Research Corporation
+| 101 N. Wilmot, Suite 101
+| Tucson, AZ  85750
+|
+| phone - +1 520 519 3138
+| phone - +1 520 519 3146
+| email ? dmm@rincon.com
+|
+| Junzhao Du
+| Contact -
+|
+| Prabal Dutta
+| Contact -
+| 
+| Deepak Ganesan
+| Contact -
+| 
+| Kevin Klues 
+| Contact -
+| 
+| Manju
+| Contact -
+|
+| Ajay Martin
+| Contact -
+|
+| Gaurav Mathur
+| Contact -
+
+
+5. Citations
+====================================================================
+.. [1] TEP 103: Permanent Data Storage (Flash). http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x/doc/html/tep103.html
+.. [2] Atmel AT45DB041B datasheet. http://www.atmel.com/dyn/resources/prod_documents/DOC1432.PDF
+.. [3] ST M25P80 datasheet. http://www.st.com/stonline/products/literature/ds/8495/m25p80.pdf
+.. [4] K9K1G08R0B datasheet. http://www.samsung.com/Products/Semiconductor/NANDFlash/SLC_SmallBlock/1Gbit/K9K1G08R0B/ds_k9k1g08x0b_rev10.pdf
diff --git a/doc/txt/tep129.txt b/doc/txt/tep129.txt
new file mode 100644
index 00000000..199bce51
--- /dev/null
+++ b/doc/txt/tep129.txt
@@ -0,0 +1,451 @@
+======================================================
+Basic Platform Independent Non-Volatile Storage Layers
+======================================================
+
+:TEP: 129
+:Group: Storage Working Group 
+:Type: Documentary
+:Status: DRAFT
+:TinyOS-Version: 2.x
+:Authors: David Moss, Junzhao Du, Prabal Dutta, Deepak Ganesan,
+          Kevin Klues, Manju, Ajay Martin, and Gaurav Mathur
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+
+Abstract
+====================================================================
+
+The storage abstractions proposed by TEP 103 are implemented on a
+platform-dependent basis.  A version of BlockStorage, ConfigStorage,
+and LogStorage were created from the ground up for both the
+AT45DB and ST M25P80 flash chips.  Looking forward into the further 
+growth and development of hardware, rebuilding each of these storage 
+layers for every new flash chip will be time consuming and cause
+compatibility issues.
+
+We propose versions of BlockStorage, ConfigStorage, and LogStorage
+be built on top of a platform-independent interface.  This would 
+allow one version of each to exist on multiple platforms. 
+Platform-independent implementation concepts are discussed
+along with recommended solutions, and changes are proposed to the
+interfaces defined by TEP 103.
+
+1. Introduction
+====================================================================
+
+The implementations of the BlockStorage, ConfigStorage, and LogStorage
+layers described in TEP 103 [1]_ are platform-dependent.  Platform-
+dependent implementations can cause behavioral and usage differences
+as well as compiling problems when attempting to port an application 
+written on one platform to another.  
+
+Building upon the DirectStorage, DirectModify, and VolumeSettings
+abstraction layers defined in TEP128 [2]_, the three basic storage
+solutions can be implemented in a platform-independent manner.
+This requires combining all properties of various memory types, 
+which aids in the creation of platform-independent storage solutions.
+Behavioral differences are minimized, and applications using 
+the platform-independent storage layers can expect to work the
+same way on different types of non-volatile memory.
+
+
+2. Implementing a platform-independent BlockStorage
+====================================================================
+
+The DirectStorage interface initially stemmed from the BlockStorage 
+interface with differences in interfaces, organization, and
+erase behavior, as well as the additional VolumeSettings interface.  
+To implement BlockStorage on DirectStorage, the erase behavior must 
+be extended to erase the entire volume instead of an individual erase unit.  
+
+VolumeSettings can first be accessed to determine the total number of erase
+units in the currently mounted volume.  Looping through these erase units,
+DirectStorage is accessed to erase() each one.  At the end of the erase
+operation, the entire volume is set back to fill bytes (0xFF).
+
+
+2.1 Improved BlockStorage interface
+--------------------------------------------------------------------
+Previous BlockStorage interfaces were divided into BlockRead and
+BlockWrite.  This was found to be cumbersome because applications
+typically required access to both interfaces.  The getSize() is
+unnecessary due to the addition of the VolumeSettings interface.
+All other BlockStorage commands can simply pass through to their
+respective DirectStorage functions. This TEP proposes the following 
+unified BlockStorage interface:::
+
+  interface BlockStorage {
+  
+    command error_t read(uint32_t addr, void *buf, uint32_t len);
+    
+    command error_t write(uint32_t addr, void *buf, uint32_t len);
+    
+    command error_t erase();
+    
+    command error_t flush();
+    
+    command error_t crc(uint32_t addr, uint32_t len, uint16_t baseCrc);
+    
+    
+  
+    event void readDone(uint32_t addr, void *buf, uint32_t len, error_t error);
+    
+    event void writeDone(uint32_t addr, void *buf, uint32_t len, error_t error);  
+    
+    event void eraseDone(error_t error);
+    
+    event void flushDone(error_t error);
+    
+    event void crcDone(uint16_t calculatedCrc, uint32_t addr, uint32_t len, error_t error);
+  
+  }
+
+
+``read(uint32_t addr, void *buf, uint32_t len);``
+ - Read 'len' bytes into ``*buf`` from the given address
+ - Returns FAIL if the request cannot be handled
+ - Signals readDone(...) when complete.
+
+``write(uint32_t addr, void *buf, uint32_t len);``
+ - Write 'len' bytes from ``*buf`` starting at the given address
+ - Returns FAIL if the request cannot be handled
+ - Signals writeDone(...) when complete.
+
+erase();
+ - Erase the entire volume
+ - Returns FAIL if the request cannot be handled
+ - Signals eraseDone(...) when complete.
+
+flush()
+ - All data that has been previously written and is not yet located on 
+   non-volatile memory should be immediately stored to non-volatile memory.
+ - Returns FAIL if the operation cannot be completed at this time
+ - Signals flushDone(...) when complete.
+
+crc(uint32_t addr, uint32_t len, uint16_t baseCrc);
+ - Calculate the CRC of 'len' bytes starting at the given address, using
+   the given baseCrc as a seed.
+ - Returns FAIL if the request cannot be handled
+ - Signals crcDone(...) when complete.
+
+
+
+3. Implementing a platform-independent LogStorage
+====================================================================
+
+As described in TEP 103, logging can be implemented using two 
+different methods: linear and circular.  A linear log fills up
+its volume and stops when it comes to the end.  A circular log allows
+at least half of its volume to remain valid while continuing to write
+the other half.  As previously described, this requires at least
+two erase units to be effective.
+
+Both logging behaviors can be implemented using the same code.
+A flag for linear log behavior prevents the logger from
+freeing up an erase unit in which to continue writing. 
+
+It should also be noted that the use of a circular log mandates
+the use of at least two erase units on the volume.  As discussed
+in TEP128 [2]_, forcing volumes to contain at least two erase 
+units solves this issue.
+
+
+3.1 LogStorage Boot Behavior
+--------------------------------------------------------------------
+In the previous LogStorage implementations, reboots cause data to be
+lost or overwritten because the beginning and ends of the log were
+never located. Preventing previously stored data from being lost 
+or overwritten after reboot is critical for the successful use and
+integration of logging storage components within a practical,
+deployable system.  
+
+A method is required on boot to locate the first memory location to
+read from as well as the next available memory location to write to. 
+Although one method is to use microcontroller user memory 
+to store the information, the goal is to avoid relying on external
+support due to cross-platform compatibility reasons. Luckily, storing
+and updating this information on the volume itself is easier than
+it seems.  
+
+Flash cannot overwrite areas of memory it has already written without
+performing a read-modify-write operation, and this operation is
+not supported on many flash types.  Regardless of whether the memory
+type can support modifications, all types of memory - including EEPROM -
+should take wear-leveling into account.  Combining these properties, 
+it is possible to design a method of maintaining and updating logging 
+start and stop information in a cross-platform compatible manner. 
+
+The method of locating logging properties on boot is simplified by making 
+entries aligned to erase unit boundaries, never allowing a single
+entry to bridge erase units.  This also prevents invalid entries
+from being created as a result of erasing an erase unit.
+
+To find the first available write address to add new log entries, 
+the first header entry on each erase unit is evaluated to find the 
+greatest 32-bit "cookie" value that is not fill-bytes (0xFFFFFFFF). 
+The erase unit with the largest value contains the newest data. 
+Next, each entry in that erase unit can be iterated through by reading 
+each header and skipping the length of the header + data, until a 
+header with the value 0xFFFFFFFF is located.  The address of this 
+location is the first available address to write.
+
+Finding the first available address for reading involves the same process.
+The first header entry on each erase unit is evaluated to find the lowest
+32-bit "cookie" value.  The entry with the lowest value is the beginning
+of the log.
+
+The first entry to read from and last address to write to MUST be 
+located on platform boot.
+
+
+3.2 Appending log entries
+--------------------------------------------------------------------
+The previous M25P80 log storage implementation is a good place to start.
+In it, each write consists of a 32-bit header "cookie" and the data to 
+be appended to the log.  Locating the beginning of the log is therefore 
+a matter of finding the lowest header cookie value.  If this were to be 
+implemented so entries align with erase unit boundaries, only the
+first header of each erase unit needs to be checked for the lowest value.
+
+32-bits leaves plenty of space to increment log entry values for.
+If the log were to append one chunk of data every second, it would
+take 136.1 years before the 32-bit header recycles to 0 and causes
+an issue in properly locating the first and last log entries.  
+This is well beyond the expected lifetime of a deployed system.
+
+Each header entry can provide additional support for every
+data entry by allowing it to track the amount of appended data as well 
+as an optional 8-bit CRC to verify the data is valid:::
+
+  typedef struct log_header_t {
+    uint32_t cookie;
+    uint8_t length;
+    uint8_t crc;
+  } log_header_t;
+
+When the logger appends to the next erase unit boundary, it can first erase
+it to ensure future appends are not corrupted by existing bytes. At the 
+point where it reaches the end of its volume, the 'circular' logging 
+flag can be used to determine if the logger should go back to the 
+beginning of the volume and continue writing.  Again, this is performed 
+in conjunction with the VolumeStorage interface to determine erase unit
+properties.
+
+
+3.3 Reading log entries
+--------------------------------------------------------------------
+After the first log entry is located, entries are extracted by first 
+reading the header of a single entry, and using the information from 
+the header to pull out the subsequent log information.  After each read, 
+the read pointer is updated to point to the read location of the next header.
+
+If the header ID is fill bytes (0xFFFFFFFF), then the entry is
+invalid and the read process has reached the end of the log. As with
+the ST M25P80 implementation, entries may be randomly seeked by 
+providing the 32-bit "cookie" identifier to locate.
+
+
+3.5 Logging conclusions
+--------------------------------------------------------------------
+This proposed logging storage solution will provide the
+ability to maintain and locate previously logged data as well as 
+support truly circular logs by mandating more than one erase unit per
+volume.  Behavioral differences between flash chip implementations
+are eliminated so one application can access logging storage across 
+all platforms.  Furthermore, reboots will not cause logged information
+to be lost or overwritten.
+
+Existing LogRead and LogWrite interfaces defined in TEP 103 [2]_ are
+sufficient to implement cross-platform logging abilities.
+
+
+
+4. Implementing a platform-independent ConfigStorage
+====================================================================
+
+The previous interface to ConfigStorage looks very similar to that
+of BlockStorage.  The ConfigStorage interface allows reads and
+writes to arbitrary addresses, which is not optimal.  One critical 
+concept behind the storage of configuration data is the ability to
+modify and overwrite existing parameters while preventing surrounding
+data from being corrupted.  The former ConfigStorage definition did
+not support this, so a new solution should be explored and developed.  
+
+This new solution should prevent an application from specifying 
+addresses to read and write to on the volume.  Instead, it should dictate
+addresses underneath, not allowing applications to see those addresses.
+In essence, the solution should handle the allocation of memory and 
+take the burden of determining valid addresses off of the application 
+layer.  This will allow it to support multiple components written by 
+different authors on the same system.
+
+
+4.1 Hash-based configuration storage
+--------------------------------------------------------------------
+Several practical deployments have demonstrated the effectiveness of 
+a hash-based configuration storage solution.  In it, any module
+in a system can store and update any type of data of any size without 
+destroying other modules' information.
+
+The implementation is similar to that of ConfigStorage in that each
+entry contains a header followed by a variable amount of data.  
+The header is different than ConfigStorage headers in that instead 
+of containing a 32-bit cookie, it contains a 32-bit hash key and
+a magic number to keep track of state:::
+
+  typedef struct config_header_t {
+    uint32_t hashId;
+    uint8_t magic;
+    uint8_t length;
+    uint8_t crc;
+  } config_header_t;
+
+
+The magic number allows Configuration storage to determine if the 
+entry is valid or has been deleted.  Because non-volatile memory typically 
+writes from 1's to 0's, the magic number can take on a finite number of
+values before it is filled with 0's.  For example:::
+
+  enum {
+    ENTRY_EMPTY = 0xFF,
+    ENTRY_VALID = 0xEE,
+    ENTRY_INVALID = 0xDD,
+  };
+
+Configuration data can be stored and retrieved by indexing it with 
+a hash key. Like AM types in the radio stack [3]_, each key is uniquely 
+defined by the developer.
+
+Each new update to the configuration storage should create an entirely
+new entry while invalidating any previous entry containing the same hash key.
+Optionally, a small cache in RAM can be used to maintain information about
+where existing hash ID's are located in memory, so non-volatile memory
+does not need to be traversed each time.
+
+When space runs out on one erase unit, the next erase unit can be used
+to copy in all valid data from the first.  The first erase unit can 
+then be erased.  This allows parameters and configuration data to be 
+infinitely updated so long as the amount of valid data plus supporting
+headers is less than half the volume's total erase unit size.
+
+
+4.2 Improved ConfigStorage interface
+--------------------------------------------------------------------
+The interface to access the configuration storage mechanism is proposed
+as follows, allowing the application layer to continually update
+previously stored parameters while preventing it from accessing
+memory addresses directly:::
+
+  interface ConfigStorage {
+
+    command error_t getTotalKeys();
+    
+    command error_t insert(uint32_t key, void *value, uint16_t valueSize);
+    
+    command error_t retrieve(uint32_t key, void *valueHolder, uint16_t maxValueSize);
+    
+    command error_t remove(uint32_t key);
+    
+    command error_t getFirstKey();
+  
+    command uint32_t getLastKey();
+  
+    command error_t getNextKey(uint32_t presentKey);
+
+
+    event void inserted(uint32_t key, void *value, uint16_t valueSize, error_t error);
+    
+    event void retrieved(uint32_t key, void *valueHolder, uint16_t valueSize, error_t error);
+    
+    event void removed(uint32_t key, error_t error);
+  
+    event void nextKey(uint32_t nextKey, error_t error);
+
+    event void totalKeys(uint16_t totalKeys);
+
+  }
+
+getTotalKeys()
+ - Determine the total number of valid keys stored on non-volatile memory
+ - Signals totalKeys(...) when complete
+
+``insert(uint32_t key, void *value, uint16_t valueSize)``
+ - Insert some data into the configuration storage associated with the
+   given key
+ - Signals inserted(...) when complete
+
+``retrieve(uint32_t key, void *valueHolder, uint16_t maxValueSize)``
+ - Retrieve the value associated with the given key.  The maximum value
+   size is the maximum amount of data that can be loaded into the 
+   ``*valueHolder`` location, to avoid overflow
+ - Signals retrieved(...) when complete
+
+remove(uint32_t key)
+ - Removes the given key and its associated values from non-volatile memory
+ - Signals removed(...) when complete
+
+getFirstKey()
+ - Determines the first key available for reading on non-volatile memory
+ - Signals nextKey(...) when complete
+
+getNextKey(uint32_t presentKey)
+ - Obtain the next available key on non-volatile memory based on the 
+   current key.  Allows the application to traverse through all stored
+   keys.
+ - Signals nextKey(...) when complete
+
+getLastKey()
+ - Returns last key available for reading on non-volatile memory.
+ - This value is assumed to be located in cache, so it can
+   return immediately
+
+  
+
+5. Author's Address
+====================================================================
+
+| David Moss
+| Rincon Research Corporation
+| 101 N. Wilmot, Suite 101
+| Tucson, AZ  85750
+|
+| phone - +1 520 519 3138
+| phone - +1 520 519 3146
+| email ? dmm@rincon.com
+|
+| Junzhao Du
+| Contact -
+|
+| Prabal Dutta
+| Contact -
+| 
+| Deepak Ganesan
+| Contact -
+| 
+| Kevin Klues 
+| Contact -
+| 
+| Manju
+| Contact -
+|
+| Ajay Martin
+| Contact -
+|
+| Gaurav Mathur
+| Contact -
+
+
+6. Citations
+====================================================================
+.. [1] TEP 103: Permanent Data Storage (Flash).
+.. [2] TEP 128: Platform independent Non-Volatile Storage Abstraction Layers
+.. [3] TEP 116: Packet Protocols
+.. [4] Atmel AT45DB041B datasheet. http://www.atmel.com/dyn/resources/prod_documents/DOC1432.PDF
+.. [5] ST M25P80 datasheet. http://www.st.com/stonline/products/literature/ds/8495/m25p80.pdf
+.. [6] K9K1G08R0B datasheet. http://www.samsung.com/Products/Semiconductor/NANDFlash/SLC_SmallBlock/1Gbit/K9K1G08R0B/ds_k9k1g08x0b_rev10.pdf
diff --git a/doc/txt/tep130.txt b/doc/txt/tep130.txt
new file mode 100644
index 00000000..76117b8c
--- /dev/null
+++ b/doc/txt/tep130.txt
@@ -0,0 +1,188 @@
+=================================
+Testbeds - Setup and Interfaces
+=================================
+
+:TEP: 130
+:Group: Testbeds Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: All
+:Author: Jan Beutel
+
+:Draft-Created: 14-Jun-2007
+:Draft-Version: $Revision: 1.2 $
+:Draft-Modified: $Date: 2007-06-28 16:41:55 $
+:Draft-Discuss: TinyOS Testbed WG <tinyos-testbed-wg@eecs.harvard.edu>>
+
+.. Note::
+
+   This document specifies a Best Current Practices for the
+   TinyOS Community, and requests discussion and suggestions for
+   improvements.  Distribution of this memo is unlimited.
+
+Abstract
+====================================================================
+
+This memo describes the structure and interfaces required for TinyOS compliant 
+testbeds. 
+
+1. Introduction
+====================================================================
+The testing and validation of embedded code on real hardware is key to 
+successful development of TinyOS applications. Although popular and powerful for 
+high level analysis, current simulation methods lack in terms of level of 
+detail and accuracy when used accross multiple system layers where abstractions 
+and models used are inherently imperfect and impair results. Methods such as 
+hardware emulation commonly used in embedded system development allow the 
+execution of code on a hardware platform and therefore can guarantee timing but 
+are very limited in terms of scalability and often confined to a lab usage only.
+
+Sensor network testbeds try to overcome these deficiencies by allowing to execute 
+software code under realistic operating conditions on real hardware embedded in 
+a target environment. This approach allows to generate a level of detail especially 
+in respect to the whole system (radio. processor, storage, sensors, interfaces) 
+and the wireless environment (noise, fading, shading, errors, failures) while 
+maintaining a certain degree of scalability. Remote programming as well as a 
+feedback of status and debugging information from the nodes using testbed 
+infrastructure alleviates the need for integrated services in sensor network 
+applications. Additionally testbeds allow to operate a set of nodes in a 
+controlled environment, i.e. using temperature variations or a controlled 
+wireless environment. 
+
+A typical testbed is made up of a number of nodes (?do we state amounts here?) 
+connected to a central resource for control and logging that are deployed in a 
+physical space (testing area). Typically the central resource is a server with 
+integrated datalogging capability. Often a web front end serves as a simple control and 
+visualization resource. For the submission of testing jobs and the analysis of 
+testing results external tools are attached to the central resource using a 
+standardized interface. This document serves as a key specification document for 
+such an interface and its intended usage.
+
+MISSING: Difference of a testbed vs. a desktop test (e.g. single nodes with a 
+programmer or a simple usb grid)
+
+Examples of currently used sensor network testbeds are MoteLab [1_] and the 
+Deployment-Support Network [2_].
+
+
+2. Testbed Usage
+====================================================================
+A testbed can serve different purposes depending on the development status and 
+requirements of a specific project. While this document does not target to restrict 
+such usage it defines a set of mandatory modes of operation that a testbed must 
+be able to support:
+
+Modes of Operation:
+
+- Single Shot Operation
+
+Execute a testing job consisting of an uploading of a specific code image onto a 
+set of nodes, remote programming of nodes using a testbed resource, the 
+synchronized start of this software, capture of resulting target response, the 
+centralized storage and timestamping of all actions and target response, ending 
+of test execution, notification of a user of the end of test execution, output 
+of all stored data on demand.
+
+- Repetitive (e.g. using continuous integration or for regression testing)
+
+A concatenation of single shot testing jobs, that in practice often will be used 
+with the variation of one or more parameters.
+
+- Long Term Operation (Profiling)
+
+Other Topics:
+
+- Federated Testbeds (in multiple environments)
+
+- Access/Resource Arbitration
+
+- Scheduling of testing jobs
+
+
+3. Testbed Services
+====================================================================
+Required Services:
+
+
+- identification of target devices (presence, type, hw rev)
+- programming of target devices
+- resetting of target devices
+- logging of target response (UART mandatory, IRQ optional)
+- versioning/identification of uploaded software 
+- identification/versioning/archiving of testing jobs
+
+- testbed status information
+- identification of testbed services
+- user authentification
+
+Optional:
+- power measurements
+- stimuli
+- distributed scheduling of actions (at nodes)
+
+4. Implementation
+====================================================================
+
+- Server, DB/Storage, Interface XMLRPC
+
+- Connection fabric
+
+- On- and offline logging
+
+- Supplied Power
+
+- Mote Hardware
+
+
+THINGS TO DISCUSS
+
+- ?Do we state minimum requirements?
+- number of nodes
+- power supply (fixed/batt)
+- power profiling
+- power on/off of targets? is simple reset/erasing enough?
+- feedback channel capabilities (delay, errors, lost packets...)
+- target control? is control of (writing to) targets required or is it an optional feature?
+- scheduling of actions (time synched???)
+
+
+5. Reference
+====================================================================
+
+
+
+6. Acknowledgments
+====================================================================
+
+
+
+7. Author's Address
+====================================================================
+
+| Jan Beutel
+| Gloriastr 35
+| ETH Zurich
+| 8092 Zurich
+| Switzerland
+|
+| phone - +41 44 632 7032
+|
+| email - j.beutel@ieee.org
+
+8. Citations
+====================================================================
+
+.. [1] G. Werner-Allen, P. Swieskowski, and M. Welsh. MoteLab: A wireless sensor
+ network testbed. In Proc. 4th Int'l Conf. Information Processing Sensor 
+ Networks (IPSN '05), pages 483-488. IEEE, Piscataway, NJ, April 2005.
+
+.. [2] M. Dyer, J. Beutel, L. Thiele, T. Kalt, P. Oehen, K. Martin, and P. Blum.
+ Deployment support network - a toolkit for the development of WSNs. In Proc. 
+ 4th European Workshop on Sensor Networks (EWSN 2007), volume 4373 of Lecture 
+ Notes in Computer Science, pages 195-211. Springer, Berlin, January 2007.
+ 
+
+Appendix A. Example Appendix
+====================================================================
+
+This is an example appendix. Appendices begin with the letter A.
diff --git a/doc/txt/tep131.txt b/doc/txt/tep131.txt
new file mode 100644
index 00000000..cf941ae2
--- /dev/null
+++ b/doc/txt/tep131.txt
@@ -0,0 +1,1675 @@
+
+======================================
+Creating a New Platform for TinyOS 2.x
+======================================
+
+:TEP: 131
+:Group: TinyOS 8051 Working Group
+:Type: Informational
+:Status: Draft 
+:TinyOS-Version: 2.x 
+:Author: Martin Leopold
+
+:Draft-Created: 6-Nov-2007
+:Draft-Version: 1 
+:Draft-Modified: 6-Nov-2007
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+   This memo is informational. It will hopefully be a basis for
+   discussions and suggestions for improvements.  Distribution of this
+   memo is unlimited.  This memo is in full compliance with TEP 1.
+
+Abstract
+====================================================================
+
+The purpose of this TEP is to provide on overview of how to build a
+new TinyOS 2 platform. While the purpose of most TEPs is to describe
+TinyOS 2 entities, we will present concrete suggestions on how to
+implement a new TinyOS 2 platform. We will use examples and briefly
+cover the relevant TEPs to present a platform that adheres to the
+current TinyOS standards. We will not cover the TEPs in detail, but to
+the full text of each TEP for further information.
+
+This TEP will go through the tool chain setup and the most basic
+components for a functional TinyOS platform. We consider only TinyOS
+version 2.x (from now on TinyOS).
+
+Before venturing on this quest we will take a diversion and introduce
+general TinyOS 2 concepts and terminology (Section 1), readers
+familiar to TinyOS 2 can skip this section. This document will
+introduce the TinyOS 2 platform (Section 2) and describes the 3
+elements that make up a platform: the tool chain (Section 3) the
+platform definitions (Section 4) and the chips definitions (Section
+5).
+
+Table of Content
+====================================================================
+
+..  contents::
+
+1. TinyOS Overview
+====================================================================
+
+Before describing the process of writing TinyOS platforms we will
+briefly sum up the TinyOS ecosystem and the terminology required in
+this TEP. To learn more visit the TinyOS website http://www.tinyos.net.
+
+A systems overview is depicted below. In this TEP we will primarily
+concern our selves with the platform portion of figure and briefly
+cover the tool chain. This involves writing the necessary drivers and
+writing rules to pass the code to the TinyOS tool chain. We will not
+cover sensor boards in this TEP refer to, see [TEP109_] for details.
+
+::
+
+             +------------------------------------------+
+             |              Application                 |
+             +------------------------------------------+
+             +--------+   +----------+   +--------------+
+             | TinyOS | + | Platform | + | Sensor board |
+             +--------+   +----------+   +--------------+
+                                 |
+                                 V
+                        +-------------------+
+                        | TinyOS tool chain |
+                        +-------------------+
+                                 |
+              Target platform    V
+               +-------------------------------------+
+               |  +-------+    +-----+    +-------+  |
+               |  | Radio |----| MCU |----|Sensors|  |
+               |  +-------+    +-----+    +-------+  |
+               +-------------------------------------+
+
+
+1.1 TinyOS 2 architecture
+--------------------------------------------------------------------
+
+TinyOS 2.x is built on a tree-layered hardware abstraction
+architecture (HAA)[TEP2_]. This architecture separates the code for
+each platform into distinct layers:
+
+  1. the Hardware Independent Layer (HIL)
+  2. the Hardware Adaptation Layer (HAL)
+  3. the Hardware Presentation Layer (HPL)
+
+A platform is built from bottom up, starting with the HPL level,
+building HAL and HIL layers on top. Platform independent applications
+are written using HIL level interfaces, allowing them to move easily
+from platform to platform. While applications can target a platform
+specific HAL layer for finer control of hardware specific features,
+this will could prohibit such an application from being easily
+portable. An overview of the TinyOS 2 architecture is given in
+[tos2.0view_].
+
+The requirements for the platform implementation is described in
+TinyOS Enhancement Proposals (TEP). Each TEP covers a particular area
+and specifies the recommendations within that area, some of which are
+relevant for platforms. While no specific label or designation is
+given to platforms adhering to the set of TEPs, [TEP1_] states:
+"Developers desiring to add code (or TEPs) to TinyOS SHOULD follow all
+current BCPs (Best Current Practice)". At the time of writing no TEP
+has been awarded this designation or been finalized and we will refer
+to the drafts as they are.
+
+This document will not go through each of the requirements, but merely
+outline how to build a basic functional platform. For further
+information see "TinyOS 2.0 Overview" [tos2.0view_] or the TEP list on
+the TinyOS website http://www.tinyos.net.
+
+
+1.2 TinyOS Contrib
+--------------------------------------------------------------------
+
+The core of TinyOS is maintained by a set of working groups that
+govern specific parts of the source code. New project can benefit from
+the *contrib* section of TinyOS. This is a separate section of the
+website and source repository maintained more loosely than the core of
+TinyOS. It is intended for sharing code at an early stage or code that
+may not gain the same popularity as the core.
+
+New projects request a directory in this repository by following a
+simple procedure on the `TinyOS contrib web page
+<http://tinyos.cvs.sourceforge.net/*checkout*/tinyos/tinyos-2.x-contrib/contrib.html>`_
+
+In contrib is a skeleton project *skel* that provides the most basic
+framework for setting up a new platform, MCU, etc.
+
+2. A TinyOS Platform
+====================================================================
+
+A TinyOS platform provides the code and tool chain definitions that
+enable an application writer to implement an application for a mote. A
+platform in TinyOS exposes some or all of the features of a particular
+physical mote device to TinyOS applications - it refers to an entire
+system, not a single chip. In order to write programs for a device
+using TinyOS a platform for that device must exist within TinyOS.
+
+A physical platform is comprised of a set of chips. Similarly a TinyOS
+platform is the collection of the components representing these chips
+(corresponding to drivers) Common chips can be shared among platforms
+and implementing a new platform could simply mean wiring existing
+components in a new way. If the chips that make up the platform are
+not supported by TinyOS implementing the new platform consists if
+implementing components for those chips (much like implementing
+drivers).
+
+
+2.1 A New Platform
+--------------------------------------------------------------------
+
+Platforms are discovered at compile time by the TinyOS tool
+chain and a new platform placed in the search path will be discovered
+automatically. In addition sensor boards can be defined in a very
+similar manner, however we will not cover sensor boards, see [TEP109_]
+for details. Defining a new platform boils down to 3 things:
+
+  1. definitions of the chips that make up the platform,
+  2. platform definitions (combining chips to a platform) and,
+  3. the tool chain or make definitions.
+
+The code for a TinyOS platform is spread out in a few locations of the
+TinyOS tree depending based on those 3 categories. Below is an
+overview of the locations and some of the files we will be needing in
+the following (for further information see see "Coding Conventions"
+[TEP3_] and the "README" files in each directory).
+
+Through this TEP we will use the terms PlatformX and MCUX to denote
+the new generic platform and MCU being created:
+
+::
+
+ tos
+  +--chips                            1. Chip definitions
+  |    +--chipX
+  +--platforms			      
+  |    +--platformX                   2. Platform definitions
+  |         +--PlatformP/PlatformC
+  |         +--PlatformLeds	         example component
+  |         +--.platform
+  |         +--hardware.h	      
+  |         +--chips                        
+  |              +--MCUX	         Platform specific features
+  |              +--chipX
+  +--sensorboards		      
+  |    +--boardX		      
+  |         +--.sensor		      
+  +--support			      
+       +--make			      3. Make definitions 
+            +--platformX.target          platformX make targets
+	    +--MCUX		      
+	         +--MCUX.rules           make rules for MCUX
+	         +--install.extra        additional target for MCUX
+
+
+In the following we will briefly introduce each of the parts and
+describe them in more detail in sections 2 through 4.
+
+
+2.2 The Chips
+--------------------------------------------------------------------
+
+Each of the chips that provide software accessible functionality must
+have definitions present in the chips directory sensors, radios,
+micro controllers (MCU) alike. Each chip is assigned a separate
+directory under ``tos/chips``. This directory contains chip specific
+interfaces (HPL and HAL interfaces) and their implementations as well
+as implementations of the hardware independent interface (HIL).
+
+Some chips, MCUs in particular, contain distinct subsystems, such as
+uart, timer, A/D converter, SPI, and so forth. These subsystems are
+often put in a sub directory of their own within the chip-specific
+directory.
+
+If some feature of a chip is available or used only on a particular
+platform, the platform directory can contain code that is specific to
+this combination of chip and platform, say pin assignments, interrupt
+assignments, etc. For example such additions would be placed in
+``tos/platforms/platformX/chips/chipX`` for PlatformX.
+
+2.3 The Platform Directory
+--------------------------------------------------------------------
+
+The platform is the piece of the puzzle that ties the components
+corresponding to physical chips (drivers) together to form a
+platform. The platform ties together the code that exposes the
+features of the platform to TinyOS programs. In practise this is done
+by i) including code for each of the chips and ii) by providing any
+additional code that is specific to this particular platform.
+
+A platform *PlatformX* would be placed in the directory
+``tos/platforms/platformX/`` and code for subsystems reside in further
+sub directories. Also in this directory is the ``.platform`` file that
+sets up include paths and more (see Section 3).
+
+An empty platform with no code (null) is provided and serves as an
+example for other platforms.
+
+
+2.4 The Tool-Chain (Make System)
+--------------------------------------------------------------------
+
+The build system for TinyOS is written using GNU Make [#make]_. The
+build system controls the process from pre-processing a TinyOS
+application into a single C file and to pass this file to the
+appropriate compiler and other tools. The make system is documented in
+``support/make/README`` and in TinyOS 2 Tutorial Lesson 10[TUT10_].
+
+The make system is located in the ``support`` directory. This
+directory contains a platform definition and Make rules to build an
+application for this platform (see Section 2).
+
+.. [#make] http://www.gnu.org/software/make/ 
+
+2.5 The Minimal Platform
+--------------------------------------------------------------------
+
+Before describing each of the subsystems, we will show a simple check
+list. The absolute minimal TinyOS platform would have to provide the
+following resources, given a *PlatformX* with *MCUX*:
+
+* a platform directory ``tos/platform/PlatformX/`` with the following
+
+  - a platform definition (*.platform* file)
+  - a *hardware.h* header
+
+* a *platformX.target* in ``tos/support/make``
+* a *MCUX.rules* in ``tos/support/make/MCUX``
+* a *MCUX* directory in ``tos/chips/MCUX``, containing
+
+  - a *McuSleepC* (must enable interrupts)
+  - a *mcuxhardware.h* (defines *nesc_atomic_start*/*nesc_atomic_end*)
+
+
+3. Tool Chain
+====================================================================
+
+The major components in the tool chain of TinyOS are i) the compiler
+and ii) the build system that uses the compiler to produce an
+executable binary or hex file. The first is installed separately,
+while the second is part of the TinyOS source code. The compile
+process transforms a set of nesC files into a binary executable or hex
+file. Involved in this process is set of separate tools that are
+linked in a chain. We will briefly cover this chain in a moment, but a
+detailed description is beyond the scope of this TEP.
+
+The make system is split in two: a general part and a platform
+specific part. Section 3.1 will introduce the general mechanism and
+Section 3.2 will cover how to introduce a new platform in the tool
+chain.
+
+3.1 Compiling using nesC
+--------------------------------------------------------------------
+
+The process of the build system is depicted below. This system feeds
+the source code through the tools to produce an executable or hex file
+for uploading to the platform. The nesC pre-compiler is split in two
+tools ncc an nescc. These two tools are used to assemble nesC source
+files into a single C file which is compiled using a regular C
+compiler. This requires that a C compiler is available for a given
+platform and that this compiler accepts the dialect produced by nesC.
+
+::
+
+    TinyOS
+  application
+      |
+      |
+      V                      
+  +------+       +-----+        +---------+         +------------+
+  | ncc  | app.c |     | Binary |         | app.hex |            |
+  |  +   |------>| GCC |------->| objdump |-------->| programmer |
+  | nesC |       |     |        |         |         |            |
+  +------+       +-----+        +---------+         +------------+
+                                                          |
+                                                          |
+                                                          V
+                                                        Target
+                                                       platform
+
+
+The core TinyOS platforms are centered around GCC, this includes the
+telos family, mica family and intelmote2. The nesC compiler expects
+code resembling GCC C-dialect and also outputs code in GCC
+C-dialect. The current TinyOS platforms are supported by GCC, but for
+some processor architectures GCC is not available (e.g. Motorola HCS08,
+Intel MCS51).
+
+Porting to platforms that are GCC supported can benefit from the
+existing tool flow, while porting to other platforms requires some
+effort. A straight forward solution adopted for these platforms is to
+post-process the C files produced by nesC to fit the needs of a
+specific compiler, see TEP121 for an example of such a solution.
+
+3.2 The Make System
+--------------------------------------------------------------------
+
+TinyOS controls the build process using make. The global make file
+searches certain locations to find make definitions for all available
+platforms. In order to make a new platform available to the TinyOS
+make system, a few files must be created in particular locations. These
+files will be read by the global make system and exposed to the users
+by make targets. Often the required rules are tied to a particular MCU
+that is shared among several platforms and TinyOS leverages this fact
+by creating a light-weight *.target* file pointing to the appropriate
+rules in a *.rules* file. The make system is documented in
+``support/make/README`` and in TinyOS 2 Tutorial Lesson 10[TUT10_].
+
+The make system looks for *.target* files in ``support/make`` and the
+directories listed in the environment variable ``TOSMAKE_PATH``. Each
+of the files found contain make targets for one TinyOS platform. The
+target files usually do not contain the rules to build the binary
+files, but include the appropriate rules from a *.rules* file, located
+in a sub directory for the appropriate MCU architecture (e.g. avr for
+the ATMega128 used by Mica). In this way many platforms share the
+build rules, but have different *.target* files. In addition *.extra*
+targets can be used to define helper targets such as install or clean.
+
+Setting up the make system, requires two steps (Section 3.2.1 gives an
+example):
+
+ 1. Creating a *platformX.target* file that allows the make system to
+    discover the new platform. This file must contain a make rule with
+    the name of the platform. Further this target must depend on the
+    targets given in the variable ``BUILD_DEPS`` - this variable
+    contains the remainder of targets to be build during the build
+    process.
+
+ 2. Creating a *.rules* file in a sub diretory of
+    ``support/make``. Each file contain the actual target for
+    producing the binaries, hex files, etc. for one platform. They are
+    assembled in the ``BUILD_DEPS`` variable.
+
+We will cover these two files next.
+
+3.2.1 The .target file
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+As mentioned above TinyOS searches for targets in the ``support/make``
+directory of the TinyOS source code and in the directories listed in
+the environment variable ``TOSMAKE_PATH``. A *.target* file for the
+platform must exist in one of these locations. The *.target* usually
+only sets up variables related to this platform and provide a target
+named after the platform, this target depend on other rules to build
+the binaries. These rules are included by calling
+*TOSMake_include_platform*. As an example the ``mica2.target`` is
+listed below:
+
+::
+
+ PLATFORM = mica2
+ SENSORBOARD ?= micasb
+ PROGRAMMER_PART ?= -dpart=ATmega128 --wr_fuse_e=ff
+ PFLAGS += -finline-limit=100000
+
+ AVR_FUSE_H ?= 0xd9
+
+ $(call TOSMake_include_platform,avr)
+
+ mica2: $(BUILD_DEPS)
+         @:
+
+Pay attention to the call to *TOSMake_include_platform,avr* this call
+includes ``.rules`` files in ``support/make`` or any sub directory of
+``TOSHMAKE_PATH`` named *avr*.
+
+
+3.2.2 The .rules file
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The *.rules* file contain the make rules for building the target
+binary. If a MCU implementation already exists for a new platform,
+simply pointing to this *.rules* from the corresponding *.target* is
+sufficient. If not the *.rules* file must be built for a new MCU
+architecture.
+
+``TOSMake_include_platform`` expects a sub directory with a rule file
+of the form ``avr/avr.rules``. The call also includes additional
+*.rules* and *.extra* files present in that sub directory.  See
+``support/make/README`` for details.
+
+For example a simplified .rules file could look like this (from
+*avr/avr.rules*):
+
+
+::
+
+ ...
+ 
+     BUILD_DEPS = srec tosimage
+  
+ srec: exe FORCE
+         $(OBJCOPY) --output-target=srec $(MAIN_EXE) $(MAIN_SREC)
+ 
+ tosimage: ihex build_tosimage FORCE
+         @:
+ 
+ exe: builddir $(BUILD_EXTRA_DEPS) FORCE
+         @echo "    compiling $(COMPONENT) to a $(PLATFORM) binary"
+         $(NCC) -o $(MAIN_EXE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS)
+                   $(COMPONENT).nc $(LIBS) $(LDFLAGS)
+ ...
+ 
+
+4. The Platform
+====================================================================
+
+A TinyOS platform is a collection of components corresponding to a
+physical devices (a collection of drivers). A platform is constructed
+by defining which components make up the platform and by providing any
+additional platform specific components. The content of a platform is
+not covered by a TEP at the time of writing and the following is based
+on the available tutorials, *READMEs* and the current consensus.
+
+The platform definitions for a *PlatformX* are located in
+``tos/platforms/platformX`` and contain 3 major elements:
+
+ 1. The *.platform* file containing include paths and other arguments
+    for nesC
+
+ 2. Platform boot procedure: PlatformP/PlatformC
+
+ 3. Platform specific code, including a header for hardware specific
+    funtions (hardware.h) and code that is specific to the combination
+    of chip and platform (e.g. pin assignments, modifications, etc.).
+
+In the following we will describe each of these in more detail, below
+is a depiction of a fictuous platform and the required definitions.
+
+::
+
+    Platform:                           .platform
+                                            include MCU driver
+      +-------------------------+           include Radio driver
+      |                         |           include Sensors driver
+      | Chips:                  |           
+      |             +-------+   |       PlatformP
+      |             | Radio |   |           Initialize MCU
+      |             +--+----+   |           Initialize Sensor
+      |   +-----+      |        |           Initialize Radio
+      |   | MCU +------+        |
+      |   +-----+      |        |       hardware.h
+      |             +--+----+   |           Include MCU HW macros
+      |             | Leds  |   |
+      |             +-------+   |       HIL interfaces, eg:
+      |                         |           PlatformLeds
+      +-------------------------+           
+
+
+All the files we describe here must be found in a common directory
+named after the platform; we call this a platform directory. This
+directory must be found in the TinyOS tool chain search path for
+example ``tos/platforms`` (or found in ``TOSHMAKE_PATH`` see Section
+3.2.1). For example a platform named PlatformX could be placed in the
+directory ``tos/platforms/platformX``.
+
+4.1 .platform file
+--------------------------------------------------------------------
+
+All platform directories must carry a ``.platform`` file, this file
+defines what makes up the platform. This file carries instructions for
+the make system on where to locate the drivers for each of the
+components of the platform. The definitions are read in a two step
+process: the file is read by the ncc script that passes the
+appropriate arguments to the nesC pre-processor[nescman_]. The
+.platform file is written as a Perl script interpreted by ncc.
+
+The file is documented in form of the README file in the platforms
+directory (*tos/platforms*), and the source code of the ncc script
+found in the TinyOS distribution. Valuable information can also be
+found in [TEP106_], [TEP109_], TinyOS 2 Tutorial Lesson 10[TUT10_].
+
+In addition to setting up include paths for nesC other arguments can
+be passed on. In particular the components to be used for the
+scheduler are selected with the '-fnesc-scheduler' command line
+argument (see [TEP106_]). The include paths are passed on using the
+'-I' command line argument covered in [TEP109_].
+
+As an example, an abbreviated *.platform* file for the mica2 platform
+looks like this:
+
+::
+
+ push( @includes, qw(
+   %T/platforms/mica
+   %T/platforms/mica2/chips/cc1000
+   %T/chips/cc1000
+   %T/chips/atm128
+   %T/chips/atm128/adc
+   %T/chips/atm128/pins
+   %T/chips/atm128/spi
+   %T/chips/atm128/timer
+   %T/lib/timer
+   %T/lib/serial
+   %T/lib/power
+ ) );
+ 
+ @opts = qw(
+   -gcc=avr-gcc
+   -mmcu=atmega128
+   -fnesc-target=avr
+   -fnesc-no-debug
+   -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+ );
+
+
+4.2 PlatformP and PlatformC
+--------------------------------------------------------------------
+
+The PlatformP and PlatformC components are responsible for booting
+this platform to a usable state. In general this usually means things
+like calibrating clock and initializing I/O pins. If this platform
+requires that some devices are initialized in a particular order this
+can be implemented in a platform dependent way here. The boot process
+covered in [TEP107_].
+
+Most hardware peripherals require an initialization procedure of some
+sort. For most peripheral devices this procedure is only required when
+the device is in use and can be left out if the device is
+unused. TinyOS accomplishes this by providing a few initialization
+call backs interfaces. When a given component is included it wires an
+initialization procedure to one of these interfaces. In this way the
+procedure will only be included when the component is included, this
+process is known as auto wiring[TOSPRG_].
+
+The boot sequence calls two initialization interfaces in the following
+order: ``PlatformC.Init`` and ``MainC.SoftwareInit``.
+``PlatformC.Init`` must take care of initializing the hardware to an
+operable state and initialization that has hidden dependencies must
+occur here. Other components are initialized as part of
+``SoftwareInit`` and the orderign is determined at compile
+time.
+
+Common tasks in ``PlatformC.Init`` include clock calibration and IO
+pins. However this component can be used to provide greater control of
+the boot process if required. Consider for example that some component
+which is initialized in SoftwareInit requires that some other
+component has been initialized previously - lets say that the radio
+must be initialized prior to the radio stack or that a component
+prints a message to the UART during boot. How can this order be
+ensured? One solution is to provide an additional initialization
+handle prior to SoftwareInit and wire such procedures to this
+handle. Below is an example from the Mica mote family using the
+``MoteInit`` interface.  Components that must be initialized early in
+the boot process is wired to this interface. If greater level of
+control is required this strategy can be trivially be expanded to
+further levels of interfaces for example MoteInit1 being initialized
+prior to MoteInit2, this strategy is chosen by the MSP430
+implementation.
+
+4.2.1 PlatformC
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Below is depicted the PlatformC component from the Mica family of platforms.
+
+::
+
+ #include "hardware.h"
+ 
+ configuration PlatformC {
+   provides {
+     interface Init;
+     /**
+      * Provides calibration information for other components.
+      */
+     interface Atm128Calibrate;
+   }
+   uses interface Init as SubInit;
+ } implementation {
+   components PlatformP, MotePlatformC, MeasureClockC;
+   
+   Init = PlatformP;
+   Atm128Calibrate = MeasureClockC;
+ 
+   PlatformP.MeasureClock -> MeasureClockC;
+   PlatformP.MoteInit -> MotePlatformC;
+   MotePlatformC.SubInit = SubInit;
+ }
+
+4.2.1 PlatformP
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Below is depicted the PlatformP component from the Mica family of platforms.
+
+::
+ 
+ module PlatformP
+ {
+   provides interface Init;
+   uses interface Init as MoteInit;
+   uses interface Init as MeasureClock;
+ 
+ }
+ implementation
+ {
+   void power_init() {
+      ...
+   }
+ 
+   command error_t Init.init()
+   {
+     error_t ok;
+
+     ok = call MeasureClock.init();
+     ok = ecombine(ok, call MoteInit.init());
+     return ok;
+   }
+ }
+
+4.2.3 Init example: PlatformLedsC
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+Below is an example from mica/PlatformLedsC.nc wiring to the platform
+specific *MoteInit* interface.
+
+:: 
+
+  configuration PlatformLedsC {
+    provides interface GeneralIO as Led0;
+  ...
+    uses interface Init;
+  } implementation {
+    components HplAtm128GeneralIOC as IO;
+    components PlatformP;
+  
+    Init = PlatformP.MoteInit;
+  ...  
+
+3.3 Platform Specific Code
+--------------------------------------------------------------------
+
+In addition to PlatformP/PlatformC the platform directory contain
+additional code that is specific to this platform. First this could be
+code that ties platform independent resources to particular instances
+on this platform, second it could be code that is only relevant on
+this particular platform (e.g. the clock rate of this platform). For
+example the LEDs are a an example of the first: most platform have a
+few LEDs, and the particular pin on this platform is tied to the
+platform independent implementation using PlatformLedsC.
+
+TinyOS requires that the header ``hardware.h`` is present while other
+component can be named freely.
+
+4.3.1 Platform Headers
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+TinyOS relies on a few C-header files being present for each
+platform. These headers are then automatically included from the
+respective parts of the TinyOS system. TinyOS expects that the
+following files are present and that certain properties are defined in
+them.
+
+hardware.h
+**********************
+
+The ``hardware.h`` header file is included by ``tos/system/MainC.nc``
+and usually in turn includes a MCU specific header file, with a few
+required macros (such as avr128hardware.h, see Section 5.1.1). The
+header is documented in TinyOS 2 Tutorial Lesson 10[TUT10_]
+
+In addition the hardware.h file can set flags that are not related to
+the hardware in general, but to this platform (e.g. clock rate). Below
+is a snippet from ``mica2/hardware.h``
+
+::
+
+  #ifndef MHZ
+  /* Clock rate is ~8MHz except if specified by user 
+     (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */
+  #define MHZ 8
+  #endif
+  
+  #include <atm128hardware.h>
+   
+  enum {
+    PLATFORM_BAUDRATE = 57600L
+  };
+  ...
+
+platform_message.h
+**********************
+
+As part of the TinyOS 2 message buffer abstraction[TEP111_], TinyOS
+includes the header *platform_message.h* from the internal TinyOS
+header *message.h*. This header is only strictly required for
+platforms wishing to use the message_t abstraction - this is not
+described further in this TEP, but is used widely throughout TinyOS
+(See [TEP111_] for details). The is expected to define the structures:
+*message_header_t*, *message_footer_t*, and *message_metadata_t* which
+are used to fill out the generic *message_t* structure.
+
+Below is an example from the ``mica2`` *platform_message.h*
+
+::
+
+  typedef union message_header {
+    cc1000_header_t cc1k;
+    serial_header_t serial;
+  } message_header_t;
+
+  typedef union message_footer {
+    cc1000_footer_t cc1k;
+  } message_footer_t;
+
+  typedef union message_metadata {
+    cc1000_metadata_t cc1k;
+  } message_metadata_t;
+
+
+4.3.2 Platform Specific Components
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The code for platform dependent features also resides in the platform
+directory. If the code can be tied to a particular chip it can be
+placed in a separate directory below the ``chips`` directory. As an
+example the following section of
+``micaz/chips/cc2420/HplCC2420PinsC.nc`` ties specific pins to general
+names on the MicaZ platform.
+
+::
+
+  configuration HplCC2420PinsC {
+    provides {
+      interface GeneralIO as CCA;
+      interface GeneralIO as CSN;
+      interface GeneralIO as FIFO;
+      interface GeneralIO as FIFOP;
+      interface GeneralIO as RSTN;
+      interface GeneralIO as SFD;
+      interface GeneralIO as VREN;
+    }
+  }
+  
+  implementation {
+  
+    components HplAtm128GeneralIOC as IO;
+    
+    CCA    = IO.PortD6;
+    CSN    = IO.PortB0;
+    FIFO   = IO.PortB7;
+    FIFOP  = IO.PortE6;
+    RSTN   = IO.PortA6;
+    SFD    = IO.PortD4;
+    VREN   = IO.PortA5;
+  
+  }
+
+
+
+5. The chips
+====================================================================
+
+The functionality of each chip is provided by a set of one or more
+interfaces and one or more components, in traditional terms this makes
+up a driver. Each chip is assigned a sub directory in the the
+``tos/chips`` directory. All code that define the functionality of a
+chip is located here regardless of the type of chip (MCU, radio,
+etc.). In addition MCU's group the code related to separate sub
+systems into further sub directories (e.g. ``tos/chips/atm128/timer``).
+
+In this section we will go trough some of the peripherals commonly
+built into MCUs, but we will not go trough other chips such as sensors
+or radio.
+
+5.1 MCU Internals
+--------------------------------------------------------------------
+
+Apart from the drivers for each of the peripheral units, a few
+additional definitions are required for the internals of the MCU. This
+includes i) atomic begin/end and ii) low power mode. The first is
+defined in the header *hardware.h* and the latter component
+*MCUSleepC*.
+
+5.1.1 mcuXardware.h
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Each architecture defines a set of required and useful macros in a
+header filed named after the architecture (for example
+*atm128hardware.h* for ATMega128). This header is then in turn
+included from *hardware.h* in the platform directory (See Section
+4.3.1).
+
+A few of the macros are required by nesC code generation. nesC will
+output code using these macros and they must be defined in advance,
+other useful macros such as interrupt handlers on this particular
+platform can be defined here as well. The required macros are:
+
+  * *__nesc_enable_interrupt* / *__nesc_disable_interrupt*
+  * *__nesc_atomic_start* / *__nesc_atomic_end*
+
+Below is a few examples from *atm128hardware.h*
+
+::
+
+  /* We need slightly different defs than SIGNAL, INTERRUPT */
+  #define AVR_ATOMIC_HANDLER(signame) \
+    void signame() __attribute__ ((signal)) @atomic_hwevent() @C()
+  
+  #define AVR_NONATOMIC_HANDLER(signame) \
+    void signame() __attribute__ ((interrupt)) @hwevent() @C()
+  
+  ...
+  
+  inline void __nesc_enable_interrupt()  { sei(); }
+  inline void __nesc_disable_interrupt() { cli(); }
+
+  ...
+  
+  inline __nesc_atomic_t 
+  __nesc_atomic_start(void) @spontaneous()  {
+      __nesc_atomic_t result = SREG;
+      __nesc_disable_interrupt();
+      asm volatile("" : : : "memory");
+      return result;
+  }
+  
+  /* Restores interrupt mask to original state. */
+  inline void 
+  __nesc_atomic_end(__nesc_atomic_t original_SREG) @spontaneous() {
+    asm volatile("" : : : "memory");
+    SREG = original_SREG;
+  }
+  
+
+5.1.2 MCUSleepC
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+TinyOS manages the power state of the MCU through a few
+interfaces. These interfaces allow components to signal how and when
+this platform should enter low power mode. Each new MCU in TinyOS must
+implement the *MCUSleepC* component that provide the *McuSleep* and
+*McuPowerState* interfaces.
+
+The TinyOS scheduler calls *McuSleep.sleep()* when it runs out of
+tasks to start. The purpose of this function is to make the MCU enter
+the appropriate sleep mode. The call to *McuSleep.sleep()* is made
+from within an atomic section making it essential that sleep() enables
+interrupts before entering sleep mode!  If the interrupts not enabled
+prior to entering sleep mode the MCU will not be able to power back up.
+
+A dummy MCU sleep component that does not enter sleep mode, but merely
+switches interrupts on and off is shown below. This ensures that the
+platform will not lock up even without proper sleep support.
+
+::
+
+  #include "hardware.h"
+
+  module McuSleepC {
+    provides interface McuSleep;
+    provides interface McuPowerState;
+    uses  interface McuPowerOverride;
+  } implementation {
+    async command void McuSleep.sleep() {
+      __nesc_enable_interrupt();
+      // Enter sleep here
+      __nesc_disable_interrupt();
+    }
+  
+    async command void McuPowerState.update() { }
+  }
+  
+
+5.2 GeneralIO 
+--------------------------------------------------------------------
+
+Virtually all micro controllers feature a set of input output (I/O)
+pins.  The features of these pins is often configurable and often some
+pins only support a subset of features. The HIL level interface for
+TinyOS is described in [TEP117_] and uses two interface to describe
+general purpose I/O pins common to many MCUs:
+
+* **GeneralIO**: Digital input/output. The GeneralIO interface
+  describes a digital pin with a state of either *clr* or *set*, the
+  pin must be capable of both input and output. Some MCUs provide pins
+  with different capabilities: more modes (e.g. an alternate
+  peripheral mode), less modes (e.g. only input) or a third
+  "tri-state" mode. Such chip specific additional features are not
+  supported. Some chips group a set of pins into "ports" that can be
+  read or written simultaneously, the HIL level interface does not
+  support reading or setting an entire port.
+
+* **GpioInterrupt**: Edge triggered interrupts. GpioInterrupt support
+  a single pin providing an interrupt triggered on a rising or falling
+  edge. Pins capable of triggering on an input level or only
+  triggering on one edge is not supported.
+
+While these interfaces are aimed at the HIL level some platforms use
+the GeneralIO and GpioInterrupt interface to represent the HPL level
+(atm128 for example) and others platforms define their own interface
+to capture the entire functionality (msp430, pxa27x for example).
+
+[TEP117_] states that each platform must provide the general IO pins of
+that platform through the *GeneralIO* interface and should do this
+though the component *GeneralIOC*. It is however not clear how the
+entire set of pins should be provided - this could be in the form of a
+list of pins, group of pins, a generic component, etc.
+
+The pin implementations are usually found in the *pins* sub directory
+for a particular MCU (e.g. *msp430/pins* for MSP430 pin
+implementation).
+
+5.2.1 Example MSP430
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The MSP430 implementation builds the platform independent pin
+implementation as a stack of components starting with a platform
+specific component for each pin.
+
+::
+
+               |  GeneralIO
+    +---------------------+
+    |      Msp430GpioC    |
+    +---------------------+
+               |  HplMsp430GeneralIO
+    +---------------------+
+    | HplMsp430GeneralIOC |
+    +---------------------+
+               |  HplMsp430GeneralIO
+    +---------------------+
+    | HplMsp430GeneralIOP |
+    +---------------------+
+
+At the bottom the component ``HplMsp430GeneralIOP`` provides a general
+implementation of one Msp430 pin using the ``HplMsp430GeneralIO``
+interface. The generic component ``HplMsp430GeneralIOP`` is then
+instantiated for each pin by ``HplMsp430GeneralIOC``.
+
+::
+  
+  interface HplMsp430GeneralIO {
+    async command void set();
+    async command void clr();
+    async command void toggle();
+    async command uint8_t getRaw();
+    async command bool get();
+    async command void makeInput();
+    async command bool isInput();
+    async command void makeOutput();
+    async command bool isOutput();
+    async command void selectModuleFunc();
+    async command bool isModuleFunc();
+    async command void selectIOFunc();
+    async command bool isIOFunc();
+  }
+
+This interface is implemented in the generic component
+HplMsp430GeneralIOP (abbreviated):
+
+::
+
+  generic module HplMsp430GeneralIOP(uint8_t port_in_addr, ...)  {
+    provides interface HplMsp430GeneralIO as IO;
+  } implementation  {
+    #define PORTx (*(volatile TYPE_PORT_OUT*)port_out_addr)
+  
+    async command void IO.set() { atomic PORTx |= (0x01 << pin); }
+    async command void IO.clr() { atomic PORTx &= ~(0x01 << pin); }
+    async command void IO.toggle() { atomic PORTx ^= (0x01 << pin); }
+
+ ...
+
+These are then instantiated from HplMsp430GeneralIOC (abbreviated):
+
+::
+
+  configuration HplMsp430GeneralIOC {
+    provides interface HplMsp430GeneralIO as Port10;
+    provides interface HplMsp430GeneralIO as Port11;
+  ...
+  } implementation {
+    components 
+      new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 0) as P10,
+      new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 1) as P11,
+  ...
+    Port10 = P10;
+    Port11 = P11;
+  ...
+
+
+And finally these are transformed from the interface
+HplMsp430GeneralIO to the platform independent GeneralIO using the
+generic component Msp430GpioC (abbreviated):
+
+::
+
+  generic module Msp430GpioC() {
+    provides interface GeneralIO;
+    uses interface HplMsp430GeneralIO as HplGeneralIO;
+  } implementation {
+    async command void GeneralIO.set() { call HplGeneralIO.set(); }
+    async command void GeneralIO.clr() { call HplGeneralIO.clr(); }
+    async command void GeneralIO.toggle() { call HplGeneralIO.toggle(); }
+  ...
+
+
+5.3 LEDs
+--------------------------------------------------------------------
+
+Having a few leds on a platform is quite common and TinyOS supports
+three leds in a platform independent manner. Three leds are provided
+through the *LedsC* component regardless of the amount of leds
+available on the platform. The LED implementation is not covered by a
+TEP at the time of writing, but the general consensus between most
+platforms seems to be to provide access to 3 LEDs through the
+component *PlatformLedsC*. This component is then used by *LedC* and
+*LedP* (from ``tos/system``) to provide a platform independent Led
+interface.
+
+The PlatformLedsC implementation is found in the platform directory of
+each platform (e.g. *tos/platforms/mica2* for mica2). The consensus is
+as follows:
+
+* Each platform provides the component PlatformLedsC
+
+* PlatformLedsC provides Led0, Led1, Led2 using the GeneralIO
+  interface. If the platform has less than 3 Leds these are wired to
+  the component NoPinC
+
+* PlatformLedsC *uses* the Init interface and usually it wired back to
+  an initialization in PlatformP - this way when LedC is included in
+  an application it will be initialized when PlatformP call this
+  interface
+
+5.3.1 Example Mica2dot
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+::
+
+  configuration PlatformLedsC
+  {
+    provides interface GeneralIO as Led0;
+    provides interface GeneralIO as Led1;
+    provides interface GeneralIO as Led2;
+    uses interface Init;
+  }
+  implementation  {
+    components HplAtm128GeneralIOC as IO;
+    components new NoPinC();
+    components PlatformP;
+  
+    Init = PlatformP.MoteInit;
+  
+    Led0 = IO.PortA2;  // Pin A2 = Red LED
+    Led1 = NoPinC;
+    Led2 = NoPinC;
+  }
+  
+
+
+
+5.3.2 LEDs implementation discussion
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The Led interface described above is not specified in a TEP, though at
+the time of writing most platforms seem to follow this pattern. Not
+being covered by a TEP leads to a few uncertainties:
+
+* *PlatformLedsC* exports leds using the *GeneralIO* interface. The
+  intention is of course that a led is connected to a pin and this pin
+  is used to turn the led on. *LedC* uses this assumption to calls the
+  appropriate *makeOutput* and *set*/*clr* calls. However this might
+  not be the case - a led could be connected differently making the
+  semantics of, say *makeOutput* unclear. Furthermore it is assumed
+  that the set call turns the led on, while the actual pin might have
+  to be cleared (active low). And what is the semantics of *makeInput*
+  on a LED? Abstracting these differences into on/off, enable/disable
+  semantics would clear up the uncertainties.
+
+* Initializing the Leds is important - the Leds can consume power even
+  when turned off, if the corresponding pins are configured
+  inappropriately. Including the LedsC component initializes the Leds
+  as output when this component is used, if not they must be
+  initialized elsewhere (e.g. PlatformP). It would seem elegant to
+  group related code (e.g. one Leds component).
+
+* The interface does not provide a uniform way of accessing any
+  additional LEDs other than the 3 found on the Mica motes. While this
+  is inherently platform specific, having a common consensus would be
+  useful, say for example exporting an array of Led. In this way a
+  program requiring say 4 leds could be compiled if 4 leds are available.
+
+
+5.4 Timers
+--------------------------------------------------------------------
+
+The timer subsystem in TinyOS 2 is described in [TEP102_] the TEP
+specifies interfaces at HAL and HIL levels that a platform must adhere
+to. The timer does not cover the possible design choices at the HPL
+level. The timers defined in this TEP are described in terms of
+*width* of the underlying counters (e.g. 8, 16, 32 bit) and in the
+tick period or frequency denoted *precision* (e.g. 10 kHz, 1 ms, 1
+us). The timer subsystem is provided through a set of hardware
+independent interfaces and a set of recommended configuration modules.
+As such some features of a particular device may not be available in a
+device independent manner.
+
+The functionality commonly seen in MCU timer units is often split in 3
+parts: control, timer/counter, capture/compare(trigger). Timer control
+in is inherently platform specific and is not covered by a TEP. The
+timer [TEP102_] covers timer/counter while capture/compare is covered
+by [TEP117_]. From the TEPs it is not clear how capture/compare and
+timer/counter relate to each other even though they are likely to
+refer to the same time base. The calibration of the system clock is
+often connected with the timer system and lives in the timer
+directory, but it is not covered in [TEP102_].
+
+The timer implementation for a given MCU is placed in the *timer* sub
+directory of the directory for a given MCU
+(e.g. *tos/chips/avr/timer*). Often clock initialization components
+are placed in the same directory, but these are not covered by the
+TEPs.
+
+5.4.1 Timer Layers
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+TEP117_ follows the 3 layer architecture and separates the platform
+dependent and independent abstractions. It poses not restrictions on
+the HPL layer, but provides a suggested HAL layer and requirements at
+the HIL level. It defines a set of interfaces and precisions that are
+used at the HAL and HIL levels.
+
+The common features of a timer are separated into a set of interfaces,
+corresponding roughly to common features in MCU timer units. The
+interfaces covered by the [TEP102_] are (capture from [TEP117_]):
+
+* **BusyWait<precision_tag,size_type>** Short synchronous delays
+* **Counter<precision_tag, size_type>** Current time, and overflow events
+* **Alarm<precision_tag,size_type>** Extend Counter with at a given time
+* **Timer<precision_tag>** 32 bit current time, one shot and periodic events
+* **LocalTime<precision_tag>** 32 bit current time without overflow
+* **GpioCapture** 16 bit time value on an external event (precision unspecified)
+
+The precisions defined in [TEP117_] are defined as "binary" meaning
+1024 parts of a second. Platforms must provide these precisions (if
+possible) regardless of the underlying system frequency (i.e. this
+could be a power of 10).
+
+* **TMilli** 1024 Hz (period 0.98 ms)
+* **TMicro** 1048576 Hz (period 0.95 us)
+* **T32khz** 32.768 kHz (period 30.5 us)
+
+HPL
+********
+The features of the underlying hardware timers are generally exposed
+using one or more hardware specific interfaces. Many MCU provide a
+rich a set of different timer units varying in timer width, frequency
+and features. 
+
+Many MCUs provides features that are quite close to the features
+described by the interfaces above. The HPL layer exposes these
+features and the layers above utilize the available hardware and
+virtualize the features if necessary.
+
+Consider for example generating events at a specific time. Often a
+timer unit has a single counter and a few compare registers that
+generate interrupts. The counter and compare registers often translate
+relative straightforward to Counter and Alarm interfaces.
+
+HAL
+********
+
+Each platform should expose a hardware timer of precision P and width W
+as Counter${P}${W}C, Alarm${P}${W}C(). For example an 8 bit, 32.768 kHz
+timer should be exposed as Counter32khz8C and Alarm32khz8C
+
+Alarm/Counters come in pairs and refer to a particular hardware unit,
+while there is only one counter there is commonly multiple compare
+registers. Alarm is a generic component and each instantiation must
+provide an independent alarm allocating more Alarm components than
+available compare register should provide a compile time error.
+
+HIL
+*********
+
+Each platform must expose the following components that provide
+specific width and precision that are guaranteed to exist on TEP
+compliant platforms.
+
+ * **HilTimerMilliC** A 32 bit Timer interface of TMilli precision
+ * **BusyWaitMicroC** A BusyWait interface of  TMicro precision
+
+
+5.4.2 Timer Implementation
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Implementing the timers for TinyOS in short consists of utilizing the
+available HW timer features to provide TinyOS style timers
+interfaces. In general the approach taken by existing platforms is to
+create a set of HPL level timer and control interfaces that export the
+available hardware features and adapt these to specific precisions and
+widths at the HAL level. However the specific HPL level design choices
+differ from platform to platform.
+
+For example one could export all timers as a simple list, a component
+for each timer, a parameterised interface, etc. Similarly for the
+control features this could be provided with the timer interfaces or
+kept as a separate interface. In the following we will go through a
+few examples and point out their differences.
+
+
+5.4.3 Example: ATMega128l
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The ATMega128l implementation (atm128) exports the system timers one
+component each. Each component provide 4 interfaces - one for each of
+the functions of the unit: timer, capture, compare and control. The
+timer, capture, and compare interfaces are generic based on the width
+(either 8 or 16 bit) while two separate control interfaces are
+provided.
+
+Depicted below is a diagram of how ``HplAtm128Timer1C`` could be stacked
+to provide platform independent interfaces (not shown are
+``HplAtm128Timer0Async``, ``HplAtm128Timer2``, ``HplAtm128Timer3``):
+
+::
+
+            +------------------------------------------------+
+            |              HplAtm128Timer1C                  |
+            +-----+-------------------+-----------------+----+
+  HplAtm128Capture|     HplAtm128Timer| HplAtm128Compare|
+                  |                   |                 |
+       +----------+---------+         |                 |
+       | Atm128GpioCaptureC |         |                 |
+       +----------+---------+         |                 |
+                  |                 +-+-----------------+--+
+       GpioCapture|                 |      Atm128AlarmC    |
+                  |                 +----------+-----------+
+                  |                       Alarm|
+
+
+The hardware features is exported using 3 interfaces:
+``HplAtm128Timer``, ``HplAtm128Compare`` and ``HplAtm128Capture``.
+
+::
+
+ interface HplAtm128Timer<timer_size>
+ {
+   async command timer_size get();
+   async command void       set( timer_size t );
+   async event void overflow();
+   async command void reset();
+   async command void start();
+ ...
+ 
+ interface HplAtm128Compare<size_type>
+ {
+   async command size_type get();
+   async command void set(size_type t);
+   async event void fired();           //<! Signalled on compare interrupt
+   async command void reset();         
+ ... 
+
+ interface HplAtm128Capture<size_type>
+ {
+   async command size_type get();
+   async command void      set(size_type t);
+   async event void captured(size_type t);
+   async command void reset();
+ 
+
+In addition to the timer related interfaces two control interfaces are
+ provided: 'HplAtm128TimerCtrl16' and 'HplAtm128TimerCtrl8' (below).
+
+::
+
+ #include <Atm128Timer.h>
+ 
+ interface HplAtm128TimerCtrl8
+ {
+   /// Timer control register: Direct access
+   async command Atm128TimerControl_t getControl();
+   async command void setControl( Atm128TimerControl_t control );
+ 
+   /// Interrupt mask register: Direct access
+   async command Atm128_TIMSK_t getInterruptMask();
+   async command void setInterruptMask( Atm128_TIMSK_t mask);
+ 
+   /// Interrupt flag register: Direct access
+   async command Atm128_TIFR_t getInterruptFlag();
+   async command void setInterruptFlag( Atm128_TIFR_t flags );
+ }
+ 
+
+Each of the hardware timers are exported in one component for example
+'HplAtm128Timer1P':
+
+::
+
+ #include <Atm128Timer.h>
+
+ module HplAtm128Timer1P
+ {
+   provides {
+     // 16-bit Timers
+     interface HplAtm128Timer<uint16_t>   as Timer;
+     interface HplAtm128TimerCtrl16       as TimerCtrl;
+     interface HplAtm128Capture<uint16_t> as Capture;
+     interface HplAtm128Compare<uint16_t> as CompareA;
+     interface HplAtm128Compare<uint16_t> as CompareB;
+     interface HplAtm128Compare<uint16_t> as CompareC;
+   }
+   uses interface HplAtm128TimerCtrl8     as Timer0Ctrl;
+ }
+ implementation
+ {
+   //=== Read the current timer value. ===================================
+   async command uint16_t Timer.get() { return TCNT1; }
+ 
+   //=== Set/clear the current timer value. ==============================
+   async command void Timer.set(uint16_t t) { TCNT1 = t; }
+ ...
+
+
+5.4.4 Example: MSP430 
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The MSP430 features two very similar (but not identical) timers. Both
+timers are provided through the same interfaces in a way similar to
+ATMega128l: 'Msp430Timer', 'Msp430Capture' 'Msp430Compare',
+'Msp430TimerControl'. All timer interfaces (for both timers) are
+accessed through the component Msp430TimerC.
+
+The ``Msp430TimerControl`` is show below. It is slightly different
+than the ATMega equivalent - notice that 'setControl' accepts a struct
+with configuration parameters instead of setting these with a command
+each.
+
+::
+
+ #include "Msp430Timer.h"
+ 
+ interface Msp430TimerControl
+ {
+   async command msp430_compare_control_t getControl();
+   async command bool isInterruptPending();
+   async command void clearPendingInterrupt();
+ 
+   async command void setControl(msp430_compare_control_t control );
+   async command void setControlAsCompare();
+   async command void setControlAsCapture(uint8_t cm);
+ 
+   async command void enableEvents();
+   async command void disableEvents();
+   async command bool areEventsEnabled();
+ }
+
+Each timer is implemented through the generic component 'Msp430TimerP'
+that is instantiated for each timer in 'Msp430TimerC':
+
+::
+
+ configuration Msp430TimerC
+ {
+   provides interface Msp430Timer as TimerA;
+   provides interface Msp430TimerControl as ControlA0;
+   provides interface Msp430TimerControl as ControlA1;
+   provides interface Msp430TimerControl as ControlA2;
+   provides interface Msp430Compare as CompareA0;
+   provides interface Msp430Compare as CompareA1;
+   provides interface Msp430Compare as CompareA2;
+   provides interface Msp430Capture as CaptureA0;
+   provides interface Msp430Capture as CaptureA1;
+   provides interface Msp430Capture as CaptureA2;
+ ...
+ }
+ implementation
+ {
+   components new Msp430TimerP( TAIV_, TAR_, TACTL_, TAIFG, TACLR, TAIE,
+                TASSEL0, TASSEL1, FALSE ) as Msp430TimerA
+            , new Msp430TimerP( TBIV_, TBR_, TBCTL_, TBIFG, TBCLR, TBIE,
+                TBSSEL0, TBSSEL1, TRUE ) as Msp430TimerB
+            , new Msp430TimerCapComP( TACCTL0_, TACCR0_ ) as Msp430TimerA0
+            , new Msp430TimerCapComP( TACCTL1_, TACCR1_ ) as Msp430TimerA1
+            , new Msp430TimerCapComP( TACCTL2_, TACCR2_ ) as Msp430TimerA2
+ ...
+
+
+5.4.5 Example: PXA27x
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The PXA27x (XScale) platform provides a component for each of the
+timers classes on the system. Each component provides a few interfaces
+that exposes all features of that unit. Each interface combines timer
+and control interface features. For example 'HplPXA27xOSTimerC'
+provides 12 instances of the 'HplPXA27xOSTimer' interface and one
+instace 'HplPXA27xOSTimerWatchdog'. Similarly for 'HplPXA27xSleep' and
+'HplPXA27xWatchdog'.
+
+
+::
+
+ interface HplPXA27xOSTimer
+ {
+   async command void setOSCR(uint32_t val);
+   async command uint32_t getOSCR();
+ ...
+ 
+ 
+   async event void fired();
+ }
+ 
+All the OS timers are exported through HplPXA27xOSTimerC
+
+::
+
+ configuration HplPXA27xOSTimerC {
+ 
+   provides {
+     interface Init;
+     interface HplPXA27xOSTimer as OST0;
+     interface HplPXA27xOSTimer as OST0M1;
+     interface HplPXA27xOSTimer as OST0M2;
+     interface HplPXA27xOSTimer as OST0M3;
+ ...
+ implementation {
+   components HplPXA27xOSTimerM, HplPXA27xInterruptM;
+ 
+   Init = HplPXA27xOSTimerM;
+ 
+   OST0 = HplPXA27xOSTimerM.PXA27xOST[0];
+   OST0M1 = HplPXA27xOSTimerM.PXA27xOST[1];
+   OST0M2 = HplPXA27xOSTimerM.PXA27xOST[2];
+   OST0M3 = HplPXA27xOSTimerM.PXA27xOST[3];
+ ...
+
+These interfaces are further abstracted through 'HalPXA27xOSTimerMapC'
+as a parameterised interface:
+
+::
+
+  configuration HalPXA27xOSTimerMapC {
+    provides {
+      interface Init;
+      interface HplPXA27xOSTimer as OSTChnl[uint8_t id];
+    }
+  } implementation {
+    components HplPXA27xOSTimerC;
+  
+    Init = HplPXA27xOSTimerC;
+  
+    OSTChnl[0] = HplPXA27xOSTimerC.OST4;
+    OSTChnl[1] = HplPXA27xOSTimerC.OST5;
+    OSTChnl[2] = HplPXA27xOSTimerC.OST6;
+   ...
+
+
+5.4.6 Timer Discussion
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+While the TEP is clear on many points there are few that are left up
+to the implementer.  The relation between timers and capture events is
+unclear and covered in two TEPs. Capture refers to timers[TEP102_] but
+the reverse is not clear[TEP102_]. This has a few implications for the
+timer/capture relationship:
+
+* Many devices feature multiple timers of the same width and
+  precision. It is not clear how this is provided. In particular how
+  this relates to a capture event - e.g. how does a capture event from
+  timer 2 relate to a time value from timer 1. Presumably TinyOS has
+  one system time based on a single timer which is used by all timer
+  capture interfaces and visualized if necessary.
+
+* The interfaces provide a an elegant way to expand a 16 bit timer to
+  a 32 bit interface. However this is not the case for capture events.
+
+
+
+5.5 I/O buses (UART, SPI, I2C)
+--------------------------------------------------------------------
+
+Most modern microprocessors provide a selection of standard I/O bus
+units such as serial (UART or USART), I2C, SPI, etc. The drivers for
+the available buses are usually put in a sub directory for the MCU
+(e.g. *chip/atm128/spi* for SPI on ATMega128l).
+
+There are a few TEP that cover different buses in TinyOS, and low
+level serial communication:
+
+* TEP113_ Serial Communication: Serial 
+* TEP117_ Low-Level I/O: Serial, SPI, I2C 
+
+On some hardware platforms a single I/O unit is shared among a number
+of buses. The MSP430 for example implements SPI, I2C and USART in a
+single USART unit that can only operate in one mode at a time. In such
+cases the single hardware unit must be shared among the drivers.
+
+5.5.1 Serial Communication
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Serial communication in TinyOS 2.x is implemented as a serial
+communications stack with a UART or USART at the bottom. The bottom
+layer is covered in [TEP113_] and [TEP117_]. TEP117 states that each
+platform must provide access to a serial port through the
+'SerialByteComm' interface from the component UartC. However UartC is
+not provided by any platforms at the time of writing. There seems to
+be a consensus to build the component 'PlatformSerialC' providing the
+'UartStream' and 'StdControl' interfaces. Either component will be
+placed in the platform directory (e.g. *tos/platforms/mica2* for
+mica2). The serial stack is built upon 'PlatformSerialC' and this
+component will be required to take advantage of the serial stack.
+
+[TEP117_] defines 'UartStream' and 'UartByte' to access the a UART
+multiple bytes at a time and one byte at a time (synchronously), while
+[TEP113_] defines 'UartByte' to send and receive one byte at a time
+(asynchronously).
+
+5.5.2 I2C, SPI
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+SPI and I2C buses are provided through straightforward interfaces that
+match the functionality of the buses closely.
+
+SpiByte, SpiPacket
+******************
+::
+
+  interface SpiByte {
+    async command uint8_t write( uint8_t tx );
+  }
+
+::
+
+  interface SpiPacket {
+    async command error_t send( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len );
+    async event void sendDone( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len,
+                               error_t error );
+  }
+
+I2CPacket
+*********
+::
+
+  interface I2CPacket<addr_size> {
+    async command error_t read(i2c_flags_t flags, uint16_t addr,
+                               uint8_t length, uint8_t* data);
+    async command error_t write(i2c_flags_t flags, uint16_t addr,
+                                uint8_t length,  uint8_t* data);
+    async event void readDone(error_t error, uint16_t addr,
+                              uint8_t length, uint8_t* data);
+    async event void writeDone(error_t error, uint16_t addr,
+                               uint8_t length, uint8_t* data);
+  }
+
+5.5.3 Example
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+..ATMega128
+ -> does not provide SerialByteComm
+
+..MSP430
+ -> Uart1C provides SerialByteComm along with Init and StdControl
+ -> sender det meste videre til Msp430Uart1C (som mangler Init!?!?)
+ Msp430Uart0C
+ -> SerialByteComm, Msp430UartControl, Msp430UartConfigure, Resurce
+ -> Sender videre til  Msp430Uart1P & Msp430Usart1C
+ -> Sender videre til HplMsp430Usart1C->HplMsp430Usart1P
+
+..PXA27
+ Parametriseret m. HplPXA27xUARTP (Init && HplPXA27xUART)
+ -> init sætter en masse registre og enabler interrupt
+ HalPXA27xSerialP: HplPXA27xUART, Init, noget DMA noget
+
+
+6. Authors
+====================================================================
+
+| Martin Leoold
+| University of Copenhagen, Dept. of Computer Science 
+| Universitetsparken 1 
+| DK-2100 København Ø
+| Denmark 
+|
+| Phone +45 3532 1464
+|
+| email - leopold@diku.dk
+
+
+7. Citations
+====================================================================
+.. [TEP1] TEP 1: TEP Structure and Keywords
+	    <http://www.tinyos.net/tinyos-2.x/doc/html/tep1.html> 
+
+.. [TEP2] TEP 2: Hardware Abstraction Architecture
+	    <http://www.tinyos.net/tinyos-2.x/doc/html/tep2.html> 
+
+.. [TEP3]   TEP 3: Coding Standard
+	    <http://www.tinyos.net/tinyos-2.x/doc/html/tep3.html> 
+
+.. [TEP102] TEP 102: Timers
+	    <http://www.tinyos.net/tinyos-2.x/doc/html/tep102.html>
+
+.. [TEP106] TEP 106: Schedulers and Tasks
+	    <http://www.tinyos.net/tinyos-2.x/doc/html/tep106.html> 
+
+.. [TEP107] TEP 107: TinyOS 2.x Boot Sequence
+	    <http://www.tinyos.net/tinyos-2.x/doc/html/tep107.html> 
+
+.. [TEP109] TEP 109: Sensors and Sensor Boards
+	    <http://www.tinyos.net/tinyos-2.x/doc/html/tep109.html> 
+
+.. [TEP111] TEP 111: message_t
+	    <http://www.tinyos.net/tinyos-2.x/doc/html/tep111.html> 
+
+.. [TEP113] TEP 113: Serial Communication
+	    <http://www.tinyos.net/tinyos-2.x/doc/html/tep113.html> 
+
+.. [TEP117] TEP 117: Low-Level I/O
+	    <http://www.tinyos.net/tinyos-2.x/doc/html/tep117.html> 
+
+.. [TEP121] TEP 121: Towards TinyOS for 8051
+	    <http://www.tinyos.net/tinyos-2.x/doc/html/tep121.html> 
+
+.. [TOSPRG] Philip Levis: TinyOS Programming
+            <http://www.tinyos.net/tinyos-2.x/doc/pdf/tinyos-programming.pdf>
+
+.. [tos2.0view] Philip Levis. "TinyOS 2.0 Overview" *Feb 8 2006*
+ 	    <http://www.tinyos.net/tinyos-2.x/doc/html/overview.html>
+
+.. [nescman] David Gay, Philip Levis, David Culler, Eric Brewer. "NesC 1.2 Language Reference Manual" *August 2005*
+
+.. [TUT10] TinyOS 2 Tutorial Lesson 10
+            <http://www.tinyos.net/tinyos-2.x/doc/html/tutorial/lesson10.html>
+
+ LocalWords:  TinyOS TEP TEPs nesC
diff --git a/doc/txt/tep132.txt b/doc/txt/tep132.txt
new file mode 100644
index 00000000..312cf1f5
--- /dev/null
+++ b/doc/txt/tep132.txt
@@ -0,0 +1,153 @@
+===================
+Packet timestamping
+===================
+
+:TEP: TBA
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: > 2.1
+:Author: Miklos Maroti, Janos Sallai
+
+:Draft-Created: 15-May-2008
+:Draft-Version: $Revision: 1.1 $
+:Draft-Modified: $Date: 2008-06-17 15:06:33 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and requests
+   discussion and suggestions for improvements.  Distribution of this memo is
+   unlimited. This memo is in full compliance with TEP 1.
+
+Abstract
+============================================================================
+
+This TEP describes a mechanism that provides access to the time of transmission
+and time of reception of a packet. The local clocks of the sender and recipient
+are used to timestamp the transmission and reception of the packet,
+respectively.
+
+1. Introduction
+============================================================================
+
+Time of packet sending and reception is often of interest in sensor network
+applications. Typically, neither the time of invocation of the send command, nor
+the time of signaling of the sendDone event can be used to estimate, without
+significant jitter, the time when the packet was transmitted. Similarly, the
+time of occurrence of the receive event cannot be used to reliably estimate the
+time of reception.
+
+A straightforward way of message timestamping is to use the start-of-frame
+delimiter interrupt, commonly exposed by packet-oriented radio transceivers.
+This approach was taken by the CC2420 radio stack in TinyOS 1.x: the SFD
+interrupt handler was exposed by the radio stack as an asynchronous event. This
+solution was problematic, because higher- level application components that
+wired the interface containing this event could break the timing of radio stack
+due to excessive computation in interrupt context.
+
+This TEP overcomes this issue by providing a standardized, platform- independent
+interface to access packet timestamps without exposing timing critical and/or
+hardware-specific events. Also, this TEP does not prescribe how packet
+timestamping should be implemented: it only describes the interfaces and the
+required functionality (semantics).
+
+2. The ``PacketTimeStamp`` interface
+============================================================================
+
+This TEP specifies a standard interface (``PacketTimeStamp``) to access the
+packet transmission and packet reception times. The sender and the receiver use
+unsynchronized clocks to timestamp packets. The precision and width of
+timestamps is specified as interface parameters ``precision_tag`` and
+``size_type``::
+
+  interface PacketTimeStamp<precision_tag, size_type>
+  {
+	  async command bool isValid(message_t* msg);
+	  async command size_type timestamp(message_t* msg);
+	  async command void clear(message_t* msg);
+	  async command void set(message_t* msg, size_type value);
+  }
+
+The ``timestamp`` command of the ``PacketTimeStamp`` interface is an accessor to the
+the timestamp. The ``timestamp`` command returns the time
+of transmission after a sendDone event, and the time of reception after a
+receive event.
+
+In some cases, it is not possible to timestamp certain packets (e.g. under very
+heavy traffic multiple interrupts can occur before they could be serviced, and
+even if capture registers are used, it is not possible to get the time stamp for
+the first or last unserviced event). The ``PacketTimeStamp`` interface contains
+the ``isValid`` command to query if the packet timestamp is valid.
+
+The communications stack MUST guarantee that if the ``isValid`` command called
+from within the ``sendDone`` or ``receive`` event handler returns ``TRUE``, then
+the value returned by the ``timestamp`` command can be trusted. However, it
+might be possible that the local clock overflowed more than once or that is was
+stopped or reset since the packet was timestamped, which causes the value
+returned by the ``timestamp`` command invalid. The ``isValid`` command MAY
+return TRUE in such situations, and it is the responsibility of the user of the
+interface to ensure that the clock runs freely from the time of message
+reception to the time when ``timestamp`` is called. To avoid this issue, it is
+recommended that ``isValid`` and ``timestamp`` are called from the ``receive``
+or ``sendDone`` event handler.
+
+The clear command invalidates the timestamp: after clear is called, ``isValid``
+will return ``FALSE``. A ``set`` command is also included to allow for changing
+the timestamp associated with the message. After the ``set`` command is called,
+``isValid`` will return TRUE.
+
+The communications stack guarantees that the transmission timestamp and the
+reception timestamp that belong to the same packet transmission always
+correspond to the same physical phenomenon, i.e. to the same instance of
+physical time. This TEP does not prescribe what synchronization event the
+communications stack should use. For example, the communications stack may chose
+to timestamps hardware events that correspond to the start of
+transmission/reception of the packet, signaled a start-of-frame delimiter (SFD)
+interrupt. The SFD interrupt occurs at the same time on the transmitter and the
+receiver (assuming that the signal propagation delay is negligible).
+Alternatively, on a byte oriented radio, the timestamp may correspond to the
+average of the transmission times of bytes, as described in [2]_.
+
+3. HIL requirements
+============================================================================
+
+The signature of the platform's ActiveMessageC [3]_ MUST include::
+
+  provides interface PacketTimeStamp<TMilli,uint32_t>;
+
+where timestamps are given in the node's local time, which is available through
+``HILTimerMilliC.LocalTime`` [4]_.
+
+The communications stack MAY support timestamp precisions and widths other than
+``TMilli`` and ``uint32_t``, respectively. Also, alternative
+``TimesyncedPacket`` implementations MAY use clock sources other than
+``HILTimerMilliC.LocalTime``.
+
+4. Implementation
+============================================================================
+
+A reference implementation of the packet timestamping mechanism described in
+this TEP can be found in ``tinyos-2.x/tos/chips/rf230``.
+
+5. Author's Address
+============================================================================
+
+| Miklos Maroti                            
+| Janos Sallai                             
+| Institute for Software Integrated Systems
+| Vanderbilt University                    
+| 2015 Terrace Place                       
+| Nashville, TN 37203                      
+| phone: +1 (615) 343-7555                 
+
+6. Citations
+============================================================================
+
+.. [1] TEP 111: message_t
+
+.. [2] Maroti, M., Kusy, B., Simon, G., and Ledeczi, A. 2004. The flooding time synchronization protocol. In Proceedings of the 2nd international Conference on Embedded Networked Sensor Systems (Baltimore, MD, USA, November 03 - 05, 2004). ACM SenSys '04.
+
+.. [3] TEP 116: Packet protocols
+
+.. [4] TEP 102: Timers
diff --git a/doc/txt/tep133.txt b/doc/txt/tep133.txt
new file mode 100644
index 00000000..141dd43c
--- /dev/null
+++ b/doc/txt/tep133.txt
@@ -0,0 +1,268 @@
+=================================
+Packet-level time synchronization
+=================================
+
+:TEP: TBA
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: > 2.1
+:Author: Miklos Maroti, Janos Sallai
+
+:Draft-Created: 15-May-2008
+:Draft-Version: $Revision: 1.1 $
+:Draft-Modified: $Date: 2008-06-17 15:06:33 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and requests
+   discussion and suggestions for improvements.  Distribution of this memo is
+   unlimited. This memo is in full compliance with TEP 1.
+
+Abstract
+============================================================================
+
+This TEP describes a packet-level time synchronization mechanism that allows for
+sending a time value along with the packet which is automatically converted from
+the sender's local time to the receiver's local time by the communications
+stack.
+
+1. Introduction
+============================================================================
+
+Time of occurrence of events is often of interest in a sensor network.
+Maintaining a synchronized UTC or a virtual global time in a sensor network may,
+however, lead to significant communication overhead and may not always be
+required by the application.
+
+This TEP describes a packet-level time synchronization mechanism that allows for
+sending a time value along with the packet which is automatically converted from
+the sender's local time to the receiver's local time by the communications
+stack. Packet-level time synchronization is limited to single-hop communication
+and does not provide synchronized network time. It provides a simple yet
+powerful abstraction, on top of which it is possible to implement higher-level
+time synchronization services (e.g. FTSP [6]_)in a platform-independent way.
+Packet-level time synchronization is semantically equivalent to the ETA
+primitives [1]_.
+
+The rest of this TEP specifies:
+
+-	Platform-independent packet-level time synchronization interfaces
+-	How these interfaces are provided in the HIL
+-	A guideline how each transceiver's HAL may implement the above interfaces
+
+2. Interface
+============================================================================
+
+Packet-level time synchronization is implemented by the communication stack and
+is exposed through two interfaces, ``TimeSyncAMSend`` and ``TimeSyncPacket``.
+
+The ``TimeSyncAMSend`` interface allows for sending a time value (e.g. an event
+timestamp) along with a message. It is parameterized by the precision and width
+of the time value::
+
+  interface TimeSyncAMSend<precision_tag, size_type>
+  {
+    command error_t send(am_addr_t addr, message_t* msg, uint8_t len, size_type event_time);
+    command error_t cancel(message_t* msg);
+    event void sendDone(message_t* msg, error_t error);
+    command uint8_t maxPayloadLength();
+    command void* getPayload(message_t* msg, uint8_t len);
+  }
+
+The ``send`` command sends a regular message just like ``AMSend.send`` [2]_, but
+it also performs sender-receiver time synchronization. The ``event_time``
+parameter holds the time of some event as expressed in the local clock of the
+sender. The receiver can obtain the time of this event (expressed in its own
+local time) via the ``TimeSyncPacket`` interface.
+
+The rest of the functionality is identical to that of the ``AMSend`` interface,
+therefore its description is omitted here.  Please refer to [2]_ for details.
+
+The ``TimeSyncPacket`` interface, parameterized by a precision tag and width,
+allows for retrieving a time value that was sent along the received packet::
+
+  interface TimeSyncPacket<precision_tag, size_type>
+  {
+	  command bool isValid(message_t* msg);
+	  command size_type eventTime(message_t* msg);
+  }
+
+The ``isValid`` command returns ``TRUE`` if the value returned by
+``eventTime`` can be trusted. Under certain circumstances the received packet
+cannot be properly time stamped, so the sender-receiver synchronization cannot
+be finished on the receiver side. In such case, this command returns ``FALSE``.
+This command MUST be called only on the receiver side and only for messages
+transmitted via the TimeSyncAMSend interface.
+
+The communications stack MUST guarantee that if the ``isValid`` command called
+from within the ``receive`` event handler returns ``TRUE``, then the value
+returned by the ``eventTime`` command can be trusted. However, it might be
+possible that the local clock overflowed more than once or that is was stopped
+or reset since the packet was received, which causes the ``event_time`` to be
+invalid. The ``isValid`` command MAY return ``TRUE`` in such situations, and it
+is the responsibility of the user of the interface to ensure that the clock runs
+freely from the time of message reception to the time when ``eventTime`` is
+called. To avoid this issue, it is recommended that ``isValid`` and
+``eventTime`` are called from the ``receive`` event handler.
+
+The ``eventTime`` command should be called by the receiver of a packet. The
+time of the synchronization event is returned as expressed in the local clock of
+the caller. This command MUST BE called only on the receiver side and only for
+messages transmitted via the ``TimeSyncAMSend`` interface.
+
+3. HIL requirements
+============================================================================
+
+The signature of the platform's ActiveMessageC [5]_ MUST include::
+
+  provides interface TimeSyncAMSend<TMilli, uint32_t>;
+  provides interface TimeSyncPacket<TMilli, uint32_t>;
+
+where event times are given in the node's local time, which is available through
+``HILTimerMilliC.LocalTime``.
+
+The communications stack MAY support timestamp precisions and widths other than
+``TMilli`` and uint32_t, respectively. Also, alternative ``TimeSyncAMSend`` and
+``TimeSyncPacket`` implementations MAY use clock sources other than
+``HILTimerMilliC.LocalTime``.
+
+4. Implementation guidelines
+============================================================================
+
+Packet-level time synchronization employs the ETA primitives. In this TEP, only
+the basics of the time synchronization mechanism are described, for details
+please see [1]_. This section presents two possible implementation approaches.
+The first approach assumes that the payload of the packet is still mutable when
+the transmission time of the packet (e.g. the timestamp of the SFD interrupt)
+becomes available. The second approach avoids this assumption and uses the
+packet timestamping functionality described in TEP [4]_ to implement packet-
+level time synchronization.
+
+4.1 Approach #1
+----------------------------------------------------------------------------
+
+Several transceivers allow for modifying the contents of a packet after packet
+transmission is started. Packet-level time synchronization can be implemented
+very efficiently on such platforms.
+
+Transmitter's story
+
+ - When the communications stack services a ``TimeSyncAMSend.send`` command called
+   with event timestamp ``t_e``, it stores ``t_e`` (e.g. in a map with the pointer
+   of the message_t as key) and sets the designated timestamp field in the packet
+   payload to ``0x80000000``.
+
+ - When the packet starts being transmitted over the communication medium, a
+   corresponding hardware event is timestamped (e.g. an SFD interrupt). Let us
+   denote this transmission timestamp with ``t_tx``. The difference of event
+   timestamp ``t_e`` and transmit timestamp ``t_tx`` is written into the
+   designated timestamp field in the payload of the packet (typically into the
+   footer, since the first few bytes might have been transmitted by this time).
+   That is, the information the packet contains at the instance when being sent
+   over the communications medium is the age of the event (i.e. how much time ago
+   the event had occurred).
+
+ - If an error occurs with timestamping the transmission or with writing the
+   package payload after transmission has started, then the designated timestamp
+   field in the packet payload will contain ``0x80000000``, indicating the error
+   to the receiver.
+
+Receiver's story
+
+ - The packet is timestamped with the receiver node's local clock at reception
+   (e.g. with the timestamp of the SFD interrupt). Let us denote the time of
+   reception with ``t_rx``. The reception timestamp is stored in the metadata
+   structure of the ``message_t`` [5]_.
+
+ - When the event time is queried via the ``TimeSyncPacket`` interface, the
+   ``eventTime`` command returns the sum of the value stored in the designated
+   timestamp field in packet payload and the reception timestamp, i.e. ``e_t-
+   e_tx+e_rx``. This value corresponds to the time of the event in the receiver's
+   local clock.
+
+ - The ``TimeSyncPacket.isValid`` command returns ``FALSE`` if the time
+   value stored in the payload equals ``0x80000000`` or if the communications
+   stack failed to timestamp the reception of the packet. Otherwise ``TRUE`` is
+   returned, which indicates that the value returned by
+   ``TimeSyncPacket.eventTime`` can be trusted.
+
+
+4.1 Approach #2
+----------------------------------------------------------------------------
+
+If a particular platform does not support changing the packet contents after the
+synchronization event (start of transmission, SFD interrupt, etc.) had occured,
+it is still possible to provide packet-level time synchronization functionality
+at the cost of some communication overhead. Such an approach can rely on packet
+timestamping TEP [4]_ to implement packet-level time synchronization.
+
+Transmitter's story
+
+ - When the communications stack services a ``TimeSyncAMSend.send`` command
+   called with event timestamp ``t_e``, it stores ``t_e`` (e.g. in a map with the
+   pointer of the message_t as key) and sends the packet.
+
+ - Transmission of the packet is timestamped using the packet timestamping TEP
+   [4]_ mechanism. Let us denote this transmission timestamp with ``t_tx``. The
+   difference of event timestamp ``t_e`` and transmit timestamp ``t_tx`` is sent
+   in an auxilliary packet. That is, the information the auxulary packet contains
+   is the age of the event at the time when the initial packet was transmitted.
+
+Receiver's story
+
+ - The packet is timestamped with the receiver node's local clock at reception
+   (e.g. with the timestamp of the SFD interrupt). Let us denote the time of
+   reception with ``t_rx``. The reception timestamp is stored in the metadata
+   structure of the ``message_t`` [5]_.
+
+ - When the auxilliary packet arrives, the time value it carries (``t_e-t_tx``,
+   the age of the event) is stored in a metadata field of the main packet. The
+   auxilliary packet is discarded, and the receive event is signalled with the
+   pointer to the main packet.
+
+ - When the event time is queried via the ``TimeSyncPacket`` interface, the
+   ``eventTime`` command returns the sum of the value stored in the metadata (age
+   of the event) and the reception timestamp, i.e. ``e_t- e_tx+e_rx``. This value
+   corresponds to the time of the event in the receiver's local clock.
+
+ - The ``TimeSyncPacket.isValid`` command returns ``FALSE`` if the communications
+   stack failed to timestamp the reception of the packet. Otherwise ``TRUE`` is
+   returned, which indicates that the value returned by
+   ``TimeSyncPacket.eventTime`` can be trusted.
+
+5. Reference implementation
+----------------------------------------------------------------------------
+
+A reference implementation of the packet-level time synchronization mechanism
+described in this TEP can be found in ``tinyos-2.x/tos/chips/rf230``.
+
+
+6. Author's Address
+============================================================================
+
+| Miklos Maroti                            
+| Janos Sallai                             
+| Institute for Software Integrated Systems
+| Vanderbilt University                    
+| 2015 Terrace Place                       
+| Nashville, TN 37203                      
+| phone: +1 (615) 343-7555                 
+
+7. Citations
+============================================================================
+
+.. [1] Kusy, B., Dutta, P., Levis, P., Maroti, M., Ledeczi, A., Culler, D., Elapsed Time on Arrival: A simple and versatile primitive for canonical time synchronization services. International Journal of Ad hoc and Ubiquitous Computing, Vol, 2, No. 1, 2006.
+
+.. [2] TEP 116: Packet protocols
+
+.. [3] TEP 102: Timers
+
+.. [4] TEP TBA: Packet timestamping
+
+.. [5] TEP 111: message_t
+
+.. [6] Maroti, M., Kusy, B., Simon, G., and Ledeczi, A. 2004. The flooding time synchronization protocol. In Proceedings of the 2nd international Conference on Embedded Networked Sensor Systems (Baltimore, MD, USA, November 03 - 05, 2004). ACM SenSys '04.
+
+
diff --git a/doc/txt/tep134.txt b/doc/txt/tep134.txt
new file mode 100644
index 00000000..34f35339
--- /dev/null
+++ b/doc/txt/tep134.txt
@@ -0,0 +1,785 @@
+====================================================================
+The TOSThreads Thread Library
+====================================================================
+
+:TEP: 134
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Kevin Klues, Chieh-Jan Liang, Jeongyeup Paek, Razvan Musaloiu-E, Ramesh Govindan, Andreas Terzis, Philip Levis
+
+:Draft-Created: 13-May-2008
+:Draft-Version: $Revision: 1.1 $
+:Draft-Modified: $Date: 2008-06-12 13:02:08 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents the TOSThreads thread library for TinyOS
+
+1. Introduction
+====================================================================
+
+TOSThreads is an attempt to combine the ease of a threaded programming model 
+with the efficiency of a fully event-based OS. Unlike earlier threads packages 
+designed for TinyOS, TOSThreads supports fully-preemptive application level 
+threads, does not require explicit continuation management, and neither 
+violates TinyOS's concurrency model nor limits its concurrency.  Additionally,
+adding support for TOSThreads requires minimal changes to the existing TinyOS 
+code base, and bringing up a new platform to support the use of TOSThreads 
+is a fairly easy process.  
+
+In TOSThreads, TinyOS runs inside a single high priority kernel thread, while all 
+application logic is implemented using user-level threads, which execute 
+whenever the TinyOS core becomes idle. This approach is a natural extension 
+to the existing TinyOS concurrency model, adding support for long-running 
+computations while preserving the timing-sensitive nature of TinyOS itself. 
+
+In this model, application threads access underlying TinyOS services using a 
+kernel API of blocking system calls. The kernel API defines the set of TinyOS 
+services provided to applications (e.g. time-sync [TEP133]_, collection [TEP119]_, 
+and dissemination [TEP118]_). Each system call in the API is comprised 
+of a thin blocking wrapper built on top of one of these services.  TOSThreads 
+allows systems developers to re-define the kernel API by appropriately 
+selecting (or implementing their own) custom set of blocking system call wrappers.
+
+The following section describes the details of how TOSThreads interacts with
+TinyOS to provide each of the features described above.
+
+2. Basic Architecture
+====================================================================
+
+The existing TinyOS concurrency model has two execution contexts: synchronous
+(tasks) and asynchronous (interrupts). These two contexts follow a strict
+priority scheme: asynchronous code can preempt synchronous code but not
+vice-versa. TOSThreads extends this concurrency model to provide a third execution
+context in the form of user-level application threads. Application threads run 
+at the lowest priority, with the ability to only preempt one another.  They are
+preemptable at any time by either synchronous code or asynchronous code, and 
+synchronize amongst each other using standard synchronization primitives
+such as mutexes, semaphores, barriers, condition variables, and blocking
+reference counters (a custom mechanism we have developed ourselves).  Take a look
+in ``tos/lib/tosthreads/interfaces`` to see the interfaces providing these 
+primitives.
+
+The basic TOSThreads architecture, consists of five key elements: the TinyOS 
+task scheduler, a single kernel-level TinyOS thread, a thread scheduler, a 
+set of user-level application threads, and a set of system call APIs and their 
+corresponding implementations. Any number of application threads can 
+concurrently exist (barring memory constraints), while a single kernel thread 
+runs the TinyOS task scheduler. The thread scheduler manages concurrency 
+between application threads, while a set of system calls provides them 
+access to the TinyOS kernel.  
+
+In order to preserve the timing-sensitive operation of TinyOS, the kernel 
+thread has higher priority than application threads. This *TinyOS thread*
+therefore always takes precedence over application threads as long as the TinyOS
+task queue is non-empty. Once the TinyOS task queue empties, control passes to
+the thread scheduler and application threads can run. The processer goes to
+sleep only when either all application threads have run to completion, or when
+all threads are waiting on synchronization primitives or blocked on I/O
+operations.
+
+There are two ways in which posted events can cause the TinyOS thread to wake
+up. First, an application thread can issue a blocking system call into the
+TinyOS kernel. This call internally posts a task, implicitly waking up the
+TinyOS thread to process it. Second, an interrupt handler can post a task for
+deferred computation. Since interrupt handlers have higher priority than the
+TinyOS thread, the TinyOS thread will not wake up to process the task until
+after the interrupt handler has completed. Because interrupts can arrive at 
+anytime, it is important to note that waking up the TinyOS thread may require 
+a context switch with an interrupted application thread. Control eventually 
+returns to the application thread after the TinyOS thread has emptied the 
+task queue.
+
+3. Modifications to the Standard TinyOS Code Base
+====================================================================
+
+Only two changes to the existing TinyOS code base are required to support
+TOSThreads: a modification to the boot sequence and the addition of a post-amble
+for every interrupt handler.  Changes to the boot sequence only need to be made
+once and are independent of any platforms supported by TinyOS. Changes to the
+interrupt handlers MUST be handled on a microcontroller to microntroller basis. 
+Additionally, a custom ``chip_thread.h`` file MUST be created for each
+microcontroller and place in its top level directory, e.g. ``tos/chips/msp430``
+
+3.1 Changes to the Boot Sequence
+----------------------------------------------------------------------
+
+Instead of directly running the TinyOS boot sequence inside of main() as
+done previously, main() now calls out to a Boot.booted() event 
+associated with booting up the thread scheduler.::
+
+  event void ThreadSchedulerBoot.booted() {
+    //Thread sceduler specific init stuff
+    ...
+    ...
+    
+    //Encapsulate TinyOS inside a thread
+    tos_thread = call ThreadInfo.get[TOSTHREAD_TOS_THREAD_ID]();
+    tos_thread->id = TOSTHREAD_TOS_THREAD_ID;
+    
+    //Set the TinyOS thread as the current thread and activate it
+    current_thread = tos_thread;
+    current_thread->state = TOSTHREAD_STATE_ACTIVE;
+    
+    //Signal the boot sequence
+    signal TinyOSBoot.booted();
+  }
+  
+This change is made in order to encapsulate TinyOS inside the single 
+kernel-level thread and set it as the initial thread that starts running. 
+Once this is done, the normal TinyOS boot sequence is ran by signaling the 
+TinyOSBoot.booted() event. 
+
+At the bottom of the existing TinyOS boot sequence, we enter an infinite
+loop that continuously checks the TinyOS task scheduler to see if it 
+has any tasks to run.  If it does, it runs the next task in its queue.
+If it does not, it puts the microcontroller into its lowest possible power
+state and goes to sleep [TEP112]_.::
+
+  command void Scheduler.taskLoop() {
+    for (;;) {
+      uint8_t nextTask;
+
+      atomic {
+        while ((nextTask = popTask()) == NO_TASK)
+          call McuSleep.sleep();
+      }
+      signal TaskBasic.runTask[nextTask]();
+    }
+  }
+
+By adding threads as a lowest priority execution context, we need to change 
+these semantics slightly.  Instead of going directly to sleep, we want to 
+allow the thread scheduler to take control of the microcontroller and start
+scheduling any threads it has to run.  Only once all application threads 
+have run to completion, or when all threads are waiting on synchronization 
+primitives or blocked on I/O operations is the microcontroller put to sleep.
+
+We achieve such functionality by replacing the call to McuSleep.sleep() shown 
+above, by a call that signals the thread scheduler to suspend the currently 
+running thread (the TinyOS kernel thread).::
+
+  command void TaskScheduler.taskLoop() {
+    for (;;) {
+      uint8_t nextTask;
+
+      atomic {
+        while((nextTask = popTask()) == NO_TASK)
+          call ThreadScheduler.suspendCurrentThread();
+      }
+      signal TaskBasic.runTask[nextTask]();
+    }
+  }
+
+Once the TinyOS thread has been suspended, the thread scheduler is free to 
+begin scheduling application level threads however it sees fit.
+
+3.2 Interrupt Handler Post-Ambles
+----------------------------------------------------------------------
+
+With the changes described above, the only other *non-self-contained* 
+TinyOS code necessary to support TOSThreads is the addition of a post-amble 
+at the bottom of every interrupt handler.  Since the number and type
+of interrupt handlers, as well as the semantics required for implementing 
+them, differ from platform to platform, the way in which this post-amble is 
+is added is highly dependent on the microcontroller in use.  The post-amble 
+itself, however, is completely platform-independent, and is provided via a 
+``postAmble()`` command included in the ``PlatformInterrupt`` interface.::
+
+  command void PlatformInterrupt.postAmble() {
+    atomic {
+    if(call ThreadScheduler.wakeupThread(TOSTHREAD_TOS_THREAD_ID) == SUCCESS)
+      if(call ThreadScheduler.currentThreadId() != TOSTHREAD_TOS_THREAD_ID)
+        call ThreadScheduler.interruptCurrentThread();
+    }
+  }
+  
+As described in the following section, the call to ``wakeupThread()`` returns
+SUCCESS iff the TinyOS task queue has any tasks to process (i.e. the interrupt
+handler posted some tasks), otherwise it returns FAIL.  Upon FAIL, we simply
+return from this function, and continue execution from the point at which the
+currently running thread was interrupted.  Upon SUCCESS, we preempt the current
+thread, immediately scheduling the TinyOS thread for execution.  The check to
+make sure that the current thread isn't already the TinyOS thread is simply an
+optimization used to bypass ''rescheduling'' the already running thread.
+
+This ``postAmble()`` command MUST be called at the bottom of EVERY interrupt
+handler provided by a platform.  This interface is provided by the 
+``PlatformInterruptC`` component, and MUST be wired into every component which
+implements an interrupt handler.  Calls to ``postAmble()`` MUST then be made 
+just before any return points in the given interrupt handler.
+
+.. Note::
+  Attempts were made to try and simplify / automate the inclusion of the 
+  post amble through the use of MACROS and other means. It was determined in 
+  the end, however, that this was the simplest and most readable way 
+  to keep the implementation of the post-amble platform independent, while 
+  allowing it to be included on a platform by platform basis for differing
+  interrrupt handler implementations.
+  
+As an example, consider the case of the interrupt handlers for the 
+TIMERA0_VECTOR and ADC_VECTOR on the msp430 microcontroller::
+
+  TOSH_SIGNAL(TIMERA0_VECTOR) {
+    //Body of interrupt handler
+    ...
+    ...
+    
+    call PlatformInterrupt.postAmble();
+  }
+  
+  TOSH_SIGNAL(ADC_VECTOR) {
+    //Body of interrupt handler
+    ...
+    ...
+    
+    call PlatformInterrupt.postAmble();
+  }
+  
+The component in which each of these handlers is defined MUST wire in 
+the ``PlatformInterrupt`` interface provided by ``PlatformInterruptC``
+and call ``postAmble()`` at the bottom of their interrupt handlers.
+
+3.3 The ``chip_thread.h`` file
+----------------------------------------------------------------------
+
+A ``chip_thread.h`` MUST be created in the chips directory for each
+microcontroller supporting the TOSThreads library.  This file MUST contain
+definitions of the following:
+
+(1) A structure containing space for saving any microcontroller specific 
+registers needed to save state when doing a context switch.::
+
+  typedef struct thread_regs {
+    ...
+  } thread_regs_t;
+
+(2) A typedef of a ``stack_ptr_t`` type.  For example, the msp430 microconroller
+has 16 bit memory addresses, so ``stack_prt_t`` is typedefed as follows.::
+
+  typedef uint16_t* stack_ptr_t;
+  
+(3) Definitions of the following MACROS for use by the TOSThreads thread
+scheduler.::
+
+  PREPARE_THREAD(thread, start_function)
+  SWITCH_CONTEXTS(current_thread, next_thread)
+  RESTORE_TCB(next_thread)
+  STACK_TOP(stack, size)
+  
+As explained in Section 4.2, state manipulated by these MACROS is
+carried around by a thread as part of its *Thread Control Block (TCB)*, defined
+as type 'thread_t'.
+  
+``PREPARE_THREAD()`` takes two parameters: 'thread' and 'start_function'.  The
+'thread' parameter MUST be of type ``thread_t``, and 'start_function' MUST be of
+type ``void (*start_function)(void)``.  The purpose of ``PREPARE_THREAD()`` is
+to get a thread ready for the first time it starts to execute.  Primarily, it is
+used to set the top of the stack associated with 'thread' to its
+'start_function'.  When it comes time for the thread to begin executing, the
+address pointed to by 'start_function' will be popped off and it will start executing.
+
+As an example, consider the definition of ``PREPARE_THREAD()`` for the msp430
+microcontroller::
+
+  #define PREPARE_THREAD(t, thread_ptr)		\
+    *((t)->stack_ptr) = (uint16_t)(&(thread_ptr));	\
+    SAVE_STATUS(t)
+    
+In this case, the status register is also saved with its initial setup, but this
+may not be necessary for all microcontrollers.
+  
+``SWITCH_CONTEXTS()`` takes two parameters: current_thread and next_thread. Both
+parameters MUST be of type 'thread_t'.The purpose of ``SWITCH_CONTEXTS()`` is to
+store the state of the thread associated with the 'current_thread', and swap it
+out with the state of the 'next_thread'.  The amount and type of state saved,
+and how it is actually swapped out varies from microcontroller to microcontroller.
+
+``RESTORE_TCB()`` takes just one parameter: next_thread.  This parameter MUST be
+of type 'thread_t'. ``RESTORE_TCB()`` is similar to ``SWITCH_CONTEXTS()`` except
+that no state is stored about the current thread before swapping in the state
+associated with 'next_thread'.  This MACRO is primarily called at the time a
+thread is either killed or has run to completion.  
+  
+``STACK_TOP()`` takes two parameters: 'stack' and 'size'.  The 'stack' parameter
+MUST be of type ``stack_ptr_t`` and 'size' MUST be an integer type (i.e.
+uint8_t, uint16_t, etc).  As explained in Section 4.2, whenever a thread is
+created, it is allocated its own stack space with a given size.  As a thread
+executes, local variables, register values, and the return address of procedure
+calls are pushed onto this stack. Depending on the microcontroller in use, the
+*top* of a thread's stack might exist at either the highest address (stack grows
+down) or lowest address (stack grows up) of the data structure allocated to the
+stack.  The purpose of ``STACK_TOP()`` is to return a pointer of type
+``uint8_t*`` to the location of the *top* of the stack.  ``STACK_TOP()`` is only
+called once at the time a thread is first initialized.
+
+There are only two choices for the definition of this MACRO, and both are shown
+below.::
+
+  //Stack grows down (i.e. need to return pointer to bottom of structure (highest address))
+  #define STACK_TOP(stack, size)    \
+    (&(((uint8_t*)stack)[size - sizeof(stack_ptr_t)]))
+    
+::
+
+  //Stack grows up (i.e. need to return pointer to top of structure (lowest address))
+  #define STACK_TOP(stack, size)    \
+    (&(((uint8_t*)stack)[0]))
+
+As an example, consider the msp430 and atmega128 microcontrollers. On both of
+these microcontrollers, a thread's stack grows down as it executes, so
+``STACK_TOP()`` is defined using the first macro.
+  
+4. The TOSThreads Library Implementation
+====================================================================
+
+This section describes the implementation of TOSThreads, including the
+internals of the thread scheduler, the thread and system call
+data structures, and their corresponding interfaces.
+
+4.1 The Thread Scheduler
+----------------------------------------------------------------------
+
+The thread scheduler is the first component to take control of the
+microcontroller during the boot process. As mentioned previously, its job is to
+encapsulate TinyOS inside a thread and trigger the normal TinyOS boot sequence.
+Once TinyOS boots and processes all of its initial tasks, control returns to the
+thread scheduler which begins scheduling application threads. The scheduler
+keeps threads ready for processing on a ready queue, while threads blocked on
+I/O requests or waiting on a lock are kept on different queues. 
+
+The default TOSThreads scheduler implements a fully preemptive round-robin
+scheduling policy with a time slice of 5 msec. We chose this value to achieve
+low latency across multiple application-level computing tasks. While application
+threads currently run with the same priority, one can easily modify the
+scheduler to support other policies.
+
+As explained in the following section, TOSThreads exposes a relatively 
+standard API for creating and manipulating threads: ``create(), 
+destroy(), pause() and resume()``. These functions form part of the system 
+call API, and can be invoked by any application program.
+
+Internally, TOSThreads library components use the following ``ThreadScheduler``
+interface to interact with a thread.::
+
+  interface ThreadScheduler {
+    async command uint8_t currentThreadId();
+    async command thread_t* currentThreadInfo();
+    async command thread_t* threadInfo(thread_id_t id);
+  
+    command error_t initThread(thread_id_t id);
+    command error_t startThread(thread_id_t id);
+    command error_t stopThread(thread_id_t id);
+    
+    async command error_t interruptCurrentThread();
+  
+    async command error_t suspendCurrentThread();
+    async command error_t wakeupThread(thread_id_t id);
+  }
+  
+The thread scheduler itself does not exist in any particular execution context
+(i.e., it is not a thread and does not have its own stack). Instead, any
+TOSThreads library component that invokes one of the above commands executes in
+the context of the calling thread. Due to the sensitive nature of these
+commands, ONLY the interrupt handler post-ambles and blocking system call API
+wrappers invoke them directly.
+  
+The first three commands are used to get information associated with an instance
+of a thread.  Calling ``currentThreadId()`` returns a unique identifier
+associated with the currently running thread.  Calling ``currentThreadInfo()``
+or ``threadInfo()`` on a particular thread returns a pointer to the complete
+*Thread Control Block (TCB)* associated with a thread.  Details about the TCB
+structure returned by these comamnds are given in section 4.2.
+
+The rest of the commands in this interface are used to manipulate the state of a
+thread, putting it into one of 4 distinct states and starting / stopping its
+execution as necessary.  At any given time, a thread may exist in one of the 
+following states (INACTIVE, ACTIVE, READY, SUSPENDED).  
+
+Threads are initialized into the INACTIVE state via a call to ``initThread()``. 
+This command MUST only be called once at the time a thread is first created.  A
+call to ``initThread()`` MUST be followed by a call to ``startThread()`` at some
+point later in order to start the actual execution of the thread.  Calls to
+``initThread()`` always return SUCCESS;
+
+Calls to ``startThread()`` return either SUCCESS or FAIL, depending on the state
+a thread is in when it is called.  If a thread is in the INACTIVE state, calling
+this command puts a thread into the READY state and places it on a ready queue.
+Threads are scheduled for execution by puling threads off this ready queue in
+FCFS order.  If a thread is in any state other than INACTIVE, FAIL is returned, 
+and no other side effects occur.
+
+Calls to ``stopThread()`` only return SUCCESS if called on a thread that is in
+the READY state (and thereby implicitly on the ready queue) and currently holds
+no mutexes.  The ``mutex_count`` field in a thread's TCB is used to determine if
+any mutexes are currently held.  If both of these conditions are met, a thread
+is removed from the READY queue and its state is set to INACTIVE.  If either of
+these conditions are not met, calling ``stopThread()`` returns FAIL and no other
+side effects occur.
+
+Calls to ``interruptCurrentThread()`` are made in order to preempt a currently
+running thread. Calling ``interruptCurrentThread()`` returns SUCCESS if the
+currently running thread is in the ACTIVE state (SHOULD always be true),
+otherwise it returns FAIL.  Upon FAIL no side effects occur.  Upon SUCCESS, the
+currently running thread is put into the READY state and placed on the thread
+scheduler's ready queue.  Threads in the READY state are not blocked, and will
+be scheduled for execution again the next time their turn comes up.  The
+``interruptCurrentThread()`` function is currently only called in two places. 
+At the bottom of the interrupt ``postAmble()`` (as shown before), and in the
+code implementing the round-robin preemption scheme.
+
+Calls to ``suspendCurrentThread()`` return SUCCESS if the currently running
+thread is in the ACTIVE state (SHOULD always be true), otherwise they return
+FAIL.  Upon SUCCESS, the currently running thread is put into the SUSPEND state
+and its execution is stopped.  A thread in the SUSPEND state will not be
+scheduled for execution again until a call to ``wakeupThread()`` is made at some
+later point in time. Calls to ``suspendCurrentThread()`` SHOULD only be made
+from within the body of blocking system call API wrappers or synchronization
+primitives.  
+
+Calls to ``wakeupThread()`` take one parameter: 'thread_id'. ``wakeupThread()``
+returns SUCCESS if the thread associated with 'thread_id' is successfully woken up
+and returns FAIL otherwise.  For all threads other than the TinyOS thread, SUCCESS 
+will only be returned if the thread being woken up is in the SUSPEND state.  For the
+TinyOS thread, it must be both in the SUSPEND state and have tasks waiting on it
+task queue.  Upon SUCCESS, a thread is put in the READY state and placed on the ready 
+queue.  Upon FAIL, no side effects occur. 
+
+.. Note::
+  Most times calls to `suspendCurrentThread()`` are paired with placing the
+  suspended thread on a queue.  Calls to ``wakeupThread()`` are then paired with
+  removing a thread from that queue.  The queue used is matianed externally by
+  the component issuing the suspend and wakeup.  For example, every mutex
+  variable has its own queue associated with it. Everytime a thread calls the
+  ``lock()`` function associated with a mutex, it is placed onto the queue
+  associated with that mutex if someone already holds the lock.  When the owner
+  of the lock eventually calls ``unlock()`` this queue is then checked and
+  requesters are removed from the queue in FCFS order.  
+
+4.2 Threads 
+----------------------------------------------------------------------
+
+Section 4 discusses the API provided to an application that allows it to create
+and destroy theads, as well as invoke blocking system calls.  This section
+details the internals of the thread implementation itself, focusing on the data
+structure used to actually represent threads.
+
+Regardless of the API used to create a thread (either *statically* or
+*dynamically* as discussed in the following section), TOSThreads allocates a
+Thread Control Block (TCB) and stack memory for each thread at the time it is
+created.  Each thread has a fixed stack size that does not grow over time.  The
+code snippet below shows the structure of a TOSThreads TCB.::
+
+  struct thread {
+    thread_id_t thread_id;
+    init_block_t* init_block;
+    struct thread* next_thread;
+   
+    //thread_state
+    uint8_t state;
+    uint8_t mutex_count;
+    thread_regs_t regs;
+  
+    //start_function
+    void (*start_ptr)(void*);
+    void* start_arg_ptr;
+  
+    stack_ptr_t stack_ptr;
+    syscall_t* syscall;
+  };
+
+**thread_id**: This field stores a thread's unique identifier.
+It is used primarily by system call implementations and synchronization
+primitives to identify the thread that should be blocked or woken up.
+
+**init_block**: Applications implemented using the TOSThreds library have the
+ability to be dynamically loaded onto a mote at runtime.  It is beyond the scope
+of this TEP to go into the details of this process, but applications use this
+field whenever they are dynamically loaded onto a mote. Whenever the system
+dynamically loads a TOSThreads application, the threads it creates must all
+receive the state associated with its global variables. An initialization block
+structure stores these global variables and 'init_block' points to this structure.
+ 
+**next_thread**: TOSThreads uses thread queues to keep track of threads waiting
+to run. These queues are implemented as linked lists of threads connected
+through their next_thread' pointers. By design, a single pointer suffices:
+threads are *always* added to a queue just before they are interrupted and
+are removed form a queue just before they wake up. This approach conserves
+memory.
+
+**thread_state** This set of fields store information about the thread's current
+state. It contains a count of the number of mutexes the thread currently holds;
+a state variable indicating the state the thread is in (INACTIVE, READY,
+SUSPENDED, or ACTIVE); and a set of variables that store a processor's register
+state whenever a context switch occurs.
+
+**stack_pointer** This field points to the top of a thread's stack. Whenever a
+context switch is about to occur, the thread scheduler calls a
+``switch_threads()`` function, pushing the return address onto the current
+thread's stack. This function stores the current thread's register state,
+replaces the processor's stack pointer with that of a new thread, and finally
+restores the register state of the new thread. Once this function returns, the
+new thread resumes its execution from the point it was interrupted.
+
+**start_function** This field points to a thread's start function along with a
+pointer to a single argument. The application developer must ensure that the
+structure the argument points to is not deallocated before the thread's start
+function executes. These semantics are similar to those that Unix ``pthreads``
+define.
+
+**system_call_block** This field contains a pointer to a structure used when
+making system calls into a TOSThreads kernel. This structure is readable by both a
+system call wrapper implementation and the TinyOS kernel thread. The section
+that follows explains how this structure is used.
+
+4.3 Blocking System Calls 
+----------------------------------------------------------------------
+
+TOSThreads implements blocking system calls by wrapping existing TinyOS services
+inside blocking APIs. These wrappers are responsible for maintaining state
+across the non-blocking *split-phase* operations associated with the
+underlying TinyOS services. They also transfer control to the TinyOS thread
+whenever a user thread invokes a system call.  All wrappers are written in nesC
+with an additional layer of C code layered on top of them.  We refer to the
+TOSThreads *standard* C API as the API providing system calls to standard
+TinyOS services such as sending packets, sampling sensors, and writing to flash.
+Alternative API's (potentially also written in C) can be implemented as well 
+(e.g. the Tenet API).
+
+A user thread initiates a system call by calling a function in one of the
+blocking API wrappers. This function creates a local instance of a
+*system call block (SCB)* structure which contains: a unique
+'syscall_id' associated with the system call; a pointer to the
+'thread' invoking the call; a pointer to the function that TinyOS should
+call once it assumes control, and the set of parameters this function should
+receive. The SCB is used to exchange data with the TinyOS thread.::
+
+  struct syscall {
+    syscall_id_t syscall_id;
+    thread_t* thread;
+    void (*syscall_ptr)(struct syscall*);
+    void* params;
+  };
+  
+All variables associated with a system call (i.e., the pointer to the SCB and
+the parameters passed to the system call itself) can all be allocated on the
+local stack of the calling thread at the time of the system call. This is
+possible because once the calling thread invokes a system call, it will not
+return from the function which instantiates these variables until after the
+blocking system call completes. These variables remain on the local thread's
+stack throughout the duration of the system call and can therefore be accessed
+as necessary.  
+
+As discussed in Section 2, making a system call implicitly posts a TinyOS task,
+causing the TinyOS thread to immediately wake up and the calling thread to
+block. In this way, there can only be *one* outstanding system call at any given
+time. Thus, only a *single* TinyOS task is necessary to perform an
+applications' system calls. The body of this task simply invokes the function
+the 'system_call_block' points to.
+
+The important interfaces and components that implement the functionality
+described in this section can be found in ``tos/lib/tosthreads/system`` and
+``tos/lib/tosthreads/interfaces``.  The important ones to look at are the
+``SystemCall`` interface, and the ``SystemCallC`` and ``SystemCallP``
+components.  Example system call wrappers themselves include
+``BlockingStdControlC``, ``BlockingAMSenderC``, etc.
+
+5. Programming Applications
+====================================================================
+
+Application written using TOSThreads can be programmed in either nesC or
+standard C.  In nesC, threads can either be created *statically* or
+*dynamically* as a TOSThreads application executes.  The primary difference
+between the two is that statically allocated threads have their TCB allocated
+for them at compile time while dynamic threads have them allocated at run time. 
+ 
+5.1 Static Threads
+----------------------------------------------------------------------
+
+Static threads are created by wiring in an instance of a ThreadC component as shown 
+below.  As a parameter to ThreadC, we pass in the desired stack size for the thread. 
+::
+
+  configuration ExampleAppC {
+  }
+  implementation {
+    components MainC, ExampleC;
+    components new ThreadC(STACK_SIZE);
+
+    MainC.Boot <- ExampleC;
+    ExampleC.Thread -> ThreadC;
+  }
+
+The ThreadC component provides a ``Thread`` interface for creating and
+manipulating static threads from within a nesC module.::
+
+  interface Thread {
+    command error_t start(void* arg);
+    command error_t stop();
+    command error_t pause();
+    command error_t resume();
+    command error_t sleep(uint32_t milli);
+    event void run(void* arg);
+ }  
+ 
+Calling ``start()`` on a thread signals to the TOSThreads thread scheduler that
+that thread should begin executing.  ``start()`` takes as an argument a pointer
+to a data structure to pass to a thread once it starts executing.  Calls to
+``start()`` return either SUCCESS or FAIL.  Upon SUCCESS, the thread is
+scheduled for execution, and at some point later the ``run()`` event is
+signaled.  The body of the run event implements the logic of the thread.
+
+Calling ``stop()`` on a thread signals to the TOSThreads thread scheduler that
+that thread should stop executing.  Once a thread is stopped it cannot be
+restarted. Calls to ``stop()`` return SUCESS if a thread was successfully
+stopped, and FAIL otherwise. ``stop()`` MUST NOT be called from within the
+thread being stopped; it MUST be called from either the TinyOS thread or another
+application thread.  
+
+Calling ``pause()`` on a thread signals to the TOSThreads thread scheduler that
+that thread should be paused.  Pausing a thread is different than stopping it in
+that a *paused* thread can be restarted again later by calling ``resume()`` on
+it.  Underneath, the ``pause()`` command is implemented by calling the thread
+scheduler's ``suspendCurrentThread()`` command.  Calls to ``pause()`` return
+SUCCESS if a thread is paused, and FAIL otherwise.  Essentially, ``pause()`` is
+used to perform an explicit suspension of the currently running thread.
+``pause()`` MUST ONLY be called from within the thread itself that is being
+paused.  Note that these are exactly the opposite semantics than those used for
+``stop()``.
+
+Calling ``resume()`` wakes up a thread previously suspended via the ``pause()``
+command. SUCCESS is returned if the thread was successfully resumed, FAIL
+otherwise.
+
+Calling ``sleep()`` puts a thread to sleep for the interval specified in its
+single 'milli' parameter. ``sleep()`` MUST ONLY be called from within the thread
+itself that is being put to sleep.  SUCCESS is returned if the thread was
+successfully put to sleep, FAIL otherwise.
+
+5.2 Dynamic Threads 
+----------------------------------------------------------------------
+
+Dynamic threads are created by wiring in an instance of a DynamicThreadC
+component as shown below.::
+
+  configuration ExampleAppC {
+  }
+  implementation {
+    components MainC, ExampleC;
+    components DynamicThreadC;
+
+    MainC.Boot <- ExampleC;
+    BlinkC.DynamicThread -> DynamicThreadC;
+  }
+
+The nesC interface for creating and manipulating dynamic threads is.::
+
+  interface DynamicThread {
+    command error_t create(tosthread_t* t, void (*start_routine)(void*), 
+                           void* arg, uint16_t stack_size);
+    command error_t destroy(tosthread_t* t);
+    command error_t pause(tosthread_t* t);
+    command error_t resume(tosthread_t* t);
+  }
+  
+``create()`` is used to create a new dynamic thread.  It takes 4 parameters:
+'t', 'start_routine', 'arg', and 'stack_size'.  't' is pointer to a unique
+handler associated with the thread being created. 'start_routine' is the start
+function associated with the thread.  'arg' is a pointer to a structure passed
+to the start function once the thread has begun executing.  'stack_size' is the
+size of the stack to be dynamicaly allocated for the thread.  Calls to
+``create()`` return either SUCCESS, FAIL, or EALREADY.  SUCCESS indiactes that
+the thread has been successfully created, FAIL means it could not be created,
+and EALREADY indicates that the handler assocaited with the 't' parameter is
+associated with an already running thread.  Upon SUCCESS, a dynamic thread's TCB
+and stack memory are dynamically allocated, and the thread is scheduled for
+execution.  Its 'start_routine' whill be called once it begins running.  UPON
+FAIL or EALREADY, no side effects occur. 
+
+''destroy()`` is similar to ``stop()`` from a static thread's ``Thread``
+interface.  It follows all the same semantics as this command, except that it
+deallocates the TCB and stack memory associated with a thread before returning.  
+
+``pause()`` and ``resume()`` are identical to their counterparts in the
+``Thread`` interface.
+
+The API allowing TOSThreads applications to be written in standard C includes a
+set of functions that simply wrap the commands provided by the 
+``DynamicThread`` interface.  The following section shows an example of how
+these functions are used.  
+
+5.3 The Full TOSThreads API
+----------------------------------------------------------------------
+As mentioned previously, TinyOS services are presented to TOSThreads applications 
+by wrapping their functionality inside blocking system calls.  The number and type 
+of standard services provided is constantly growing so it doesn't make sense to 
+try and list them all out.  Browse through ``tos/lib/tosthreads/system/`` and 
+``tos/lib/tosthreads/lib`` to see what services are currently available. 
+Also, take a look at the various applications found in ``apps/tosthreads`` to see 
+how these services are used.  There are applications written in nesC using both 
+static and dynamic threads, as well as applications written in standard C.  
+
+6. Author Addresses
+====================================================================
+|
+| Kevin Klues
+| 284 Gates Hall
+| Stanford University
+| Stanford, CA 94305-9030
+| email - klueska@cs.stanford.edu
+|
+| Chieh-Jan Liang
+| XXX
+| XXX
+| XXX
+| email - cliang4@cs.jhu.edu
+|
+| Jeongyeup Paek
+| XXX
+| XXX
+| XXX
+| email - jpaek@enl.usc.edu
+|
+| Razvan Musaloiu-E
+| XXX
+| XXX
+| XXX
+| email - razvanm@cs.jhu.edu
+|
+| Ramesh Govindan
+| XXX
+| XXX
+| XXX
+| email - ramesh@enl.usc.edu
+|
+| Andreas Terzis
+| XXX
+| XXX
+| XXX
+| email - terzis@cs.jhu.edu
+|
+| Philip Levis
+| 358 Gates Hall
+| Stanford University
+| Stanford, CA 94305-9030
+| email - pal@cs.stanford.edu
+|
+
+7. Citations
+====================================================================
+
+.. [TEP112] TEP 112: Microcontroller Power Management.
+.. [TEP118] TEP 118: Dissemination.
+.. [TEP119] TEP 119: Collection.
+.. [TEP133] TEP 133: Packet Level Time Synchronization.
diff --git a/doc/txt/tep135.txt b/doc/txt/tep135.txt
new file mode 100644
index 00000000..c4f69a7a
--- /dev/null
+++ b/doc/txt/tep135.txt
@@ -0,0 +1,128 @@
+===================================================================
+Active Message ID Allocation in TinyOS 2.1
+===================================================================
+
+:TEP: 135
+:Group: Network Protocol Working Group 
+:Type: Informational
+:Status: Draft
+:TinyOS-Version: 2.1
+:Author: Omprakash Gnawali
+
+:Draft-Created: 19-June-2008
+:Draft-Version: $Revision: 1.5 $
+:Draft-Modified: $Date: 2009-12-08 20:43:46 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   [TEP_1]_ and [TEP_4]_.
+
+
+1. Introduction
+====================================================================
+
+TinyOS network protocols use allocated Active Message Type [TEP_116]_
+to prevent AM ID conflict between different protocols. [TEP_4]_
+describes how AM IDs are allocated for a TinyOS network protocol. In
+this TEP, we document the AM ID allocations in TinyOS 2.1.
+
+2. Unreserved pool 128-255 (0x80 - 0xFF)
+====================================================================
+
+The unreserved pool is in the range 128-255 (0x80-0xFF). Applications
+distributed with TinyOS use AM IDs in this range. Protocols and
+applications in contrib as well as those developed by the community
+but not included in the distribution or contrib SHOULD use AM IDs in
+this range.
+
+3. Reserved pool 0-127 (0x00 - 0x7F)
+====================================================================
+
+The reserved pool is in the range 0-127 (0x00-0x7F). The AM IDs in
+this range are used by protocols distributed with TinyOS.
+
+Here is a list of allocations for TinyOS 2.1::
+
+  * 0x70 - 0x75 are reserved for collection protocols [TEP_119]_
+    maintained by the Network Protocol Working Group.
+
+    For CTP (''tos/lib/net/ctp'') [TEP_123]_ and LEEP  [TEP_124]_
+    0x70 - AM_CTP_ROUTING CTP (Routing beacon)
+    0x71 - AM_CTP_DATA CTP (Data packets)
+    0x72 - AM_CTP_DEBUG CTP (Debug messages)
+
+    For MultiHopLQI (''tos/lib/net/lqi'')
+    0x73 - AM_LQI_BEACON_MSG (Routing beacon)
+    0x74 - AM_LQI_DATA_MSG MultiHopLQI (Data packets)
+    0x75 - AM_LQI_DEBUG MultiHopLQI (Debug messages)
+
+    For SRP(''tos/lib/net/srp'')
+    0x76 - AM_SRP (Data packets)
+
+  * 0x60 - 0x63 are reserved for dissemination protocols [TEP_118]_
+    maintained by the Network Protocol Working Group.
+
+    For Drip (''tos/lib/net/drip'')
+    0x60 - AM_DISSEMINATION_MESSAGE
+    0x61 - AM_DISSEMINATION_PROBE_MESSAGE
+
+    For DIP (''tos/lib/net/dip'')
+    0x62 - AM_DIP 
+
+    For DHV (''tos/lib/net/dhv'')
+    0x63 - AM_DHV
+
+  * 0x50 - 0x54 are reserved for Deluge (''tos/lib/net/Deluge'')
+    maintained by the Network Protocol Working Group.
+
+    0x50 - AM_DELUGEADVMSG (Advertisements)
+    0x51 - AM_DELUGEREQMSG (Requests)
+    0x52 - AM_DELUGEDATAMSG (Data)
+    0x53 - DELUGE_AM_FLASH_VOL_MANAGER (Flash volume manager)
+    0x54 - DELUGE_AM_DELUGE_MANAGER (Deluge manger)
+
+  * 0x3D - TIMESYNC_AMTYPE for Packet Level Time Synchronization
+    (''TimeSyncMessageC'') reserved by the Core Working Group.
+
+  * 0x3E - AM_TIMESYNCMSG for FTSP (''tos/lib/ftsp'') reserved by the
+    Core Working Group.
+
+  * 0x3F - TinyOS NALP code [TEP_125]_ reserved by the Core Working
+    Group.
+
+
+4. Author's Address
+====================================================================
+
+| Omprakash Gnawali
+| 318 Campus Drive, S255
+| Computer Science Department
+| Stanford University
+| Stanford, CA 94305
+|
+| phone - +1 650 725 6086
+| email - gnawali@cs.stanford.edu
+
+5. Citations
+====================================================================
+
+.. [TEP_1] TEP 1: TEP Structure and Keywords 
+
+.. [TEP_4] TEP 4: Active Message ID Allocation for Network Protocols and Applications
+
+.. [TEP_116] TEP 116: Packet Protocols
+
+.. [TEP_118] TEP 118: Dissemination of Small Values
+
+.. [TEP_119] TEP 119: Collection
+
+.. [TEP_123] TEP 123: The Collection Tree Protocol (CTP)
+
+.. [TEP_124] TEP 124: The Link Estimation Exchange Protocol (LEEP)
+
+.. [TEP_125] TEP 125: TinyOS 802.15.4 Frames
+
diff --git a/doc/txt/tep136.txt b/doc/txt/tep136.txt
new file mode 100644
index 00000000..03198b4e
--- /dev/null
+++ b/doc/txt/tep136.txt
@@ -0,0 +1,291 @@
+================================
+Roadmap to an IP Stack in TinyOS
+================================
+
+:TEP: 136
+:Group: Network Protocol Working Group
+:Type: Informational
+:Status: Draft
+:TinyOS-Version: > 2.1
+:Author: Stephen Dawson-Haggerty, Matus Harvan, and Omprakash Gnawali
+
+Abstract
+============================================================================
+
+Recently, there has been renewed interest in the applicability of Internet
+Protocol-based networking for low power, embedded devices.  This interest is
+being driven by several sources.  One, emerging standards from the IETF are
+beginning to make it possible to design efficient, compatible
+implementations of IP for this class of resource-constrained device.  Two,
+there has been an emergence of a significant number of both open and closed IP
+embedded IP stacks which demonstrate the applicability of this model of
+networking.  Third, a set of recent academic papers have made the case that
+this network architecture is a significant research enabler and shown in more
+detail the structure of a full stack.
+
+In this TEP, we briefly explain how IP mechanisms map onto the well-studied
+problems of the sensor network community like collection routing and local
+aggregation.  Next, we discuss the current "state of the standards."  Finally,
+we propose a path for the adoption of IP within TinyOS.
+
+1. IP Requirements and Mechanisms 
+============================================================================
+
+There are two versions of IP: IPv4 (RFCXXX) and IPv6 (RFCXXX).  Previous
+studies have indicated that IPv6 is more applicable to the low-power, embedded
+space then IPv4 for various reasons; most standardization efforts have focused
+on adapting IPv6 to these devices.  Therefore, we consider only IPv6.
+
+
+1.1 IPv6 Routing
+----------------------------------------------------------------------------
+
+A central question for implementing IPv6 in sensor networks is what has become
+know as "route over" vs. "mesh under" in the IETF.  In mesh under networking,
+routing is done on layer two addresses, and every host is one hop from every
+other.  Although this is the most compatible with existing assumptions about
+subnet design, it leads to significant redundancies and inefficiencies in this
+space.  The alternative, so called route-over exposes the radio topology at
+the IP layer.  While not strictly compatible with some IPv6 mechanisms, this
+is becomming the favored approach since a single set of tools can be used to
+debug.  For the rest of this TEP we assume that route over is the model.
+
+There are a number of existing routing protocols for IPv6, some targeted at
+wireless links.  However, IPv6 itself does not require any particular routing
+protocol to be used with a domain; common choices in wired networks are OSPF
+and IS-IS.  Recent study in the IETF has indicated that existing protocols are
+probably not appropriate for this space [draft-ietf-roll-protocols-02], and so
+further work is needed on this point.  Existing protocols with TinyOS
+implementations such as DYMO or S4 may be appropriate for this task;
+collection and dissemination protocols like CTP or Drip are probably not
+directly applicable since they are address-free, although the insight gained
+from their implementations may be transferable.
+
+1.2 Addressing
+----------------------------------------------------------------------------
+
+The most well-known property of IPv6 is probably it's address length.  An IPv6
+address is 128 bits long.  Within this space, IPv6 defines unicast, anycast,
+and multicast address ranges; each of these ranges further have properties of
+their own.  For a full explaination of IPv6 addressing we refer the reader to,
+for example, [OReilly, RFC], we cover briefly some of the important details.
+
+1.2.1 Unicast Addressing
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Unicast addresses in IPv6 consist of two parts: the network identifier (the
+first 64 bits), and the interface identifier (the second).  The interface
+identifier is a flat space, and may be derived from the interface's MAC
+address, a random number, or other mechanism.  IPv6 contains mechanisms to
+ensure that the interface ID is unique within the subnet.  The network
+may be assigned using many different mechanisms, but some network identifiers
+are special.
+
+Unlike IPv4, each interface in IPv6 is multihomed: it is expected to have
+multiple IPv6 addresses.  When an interface is brought up, IPv6 contains
+mechanisms to configure the interface with a locally unique, non-routable
+address known as the link-local address.  This address has the network
+identifier fe80::, and can be used for communication between hosts in the same
+subnet.
+
+In a TinyOS IPv6 stack, this address range might be used to allow TinyOS nodes
+to communicate locally without routing, for instance to enable local
+aggregation.  If the TinyOS hosts can assign themselves link-local addresses
+derived from their IEEE802.15.4 16-bit short id, or full 64-bit EUID.  For
+instance, a node with short ID 16 might assign the address fe80::10 to its
+802.15.4 interface.  These addresses would not be routed; an IP stack would
+send directly to the short id 0x10 contained in the address.
+
+IPv6 also contains several mechanisms to allow a host to obtain a
+publicly-routable network identifier.  TinyOS hosts communicating with these
+addresses could contact nodes in other sensor networks or on the internet; the
+fact that they are multihomed allows them to use both public and link-local
+addresses simultaneously.
+
+1.2.2 Multicast Addressing
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+IPv6 contains a multicast address range; addresses beginning with the byte
+containing all ones (0xff) are multicast addresses.  Following this byte are
+four bits of flags and four bits of "scope".  For instance, scope 1 is
+node-local, and scope 2 is link local.  IPv6 defines many well-known multicast
+groups [http://www.iana.org/assignments/ipv6-multicast-addresses]; of most interest here are the "link-local all nodes" and "link
+local all-routers" addresses: ff02::1 and ff02::2, respectively.  Depending on
+weather TinyOS IP hosts are also IP routers, these addresses are effecitvely
+link-local broadcast addresses which might be mapped into the layer 2
+broadcast address (0xffff).  Thus IPv6 contains mechanisms for local
+broadcast.
+
+There is also a site-local scope defined in IPv6 (5) with a similar ff05::2
+address.  "Site local" is an administratively defined scope in IPv6, and might
+naturally consist of an entire sensor network.  Thus, sending to this address
+would correspond to disseminating a value to each node in the network and
+could be implemented with a trickle-based algorithm.
+
+Futhermore, the TinyOS community could develop additional conventions to
+provide and address for scoped flooding or delivery to nodes with particular
+capabilities.  A full IP multicast implementation within the sensor network
+could be used for many things including control applications or
+publish-subscribe network layers which have previously been special purpose.
+
+1.2.3 Anycast Addressing
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Anycast addresses indicate that the packet should be delivered to at least one
+host with the anycast address.  This seems initially similar to the model for
+collection routing such as MultiHopLQI or CTP, in that a collection report is
+delivered to a single root.  However, it is more likeley that those
+"collection roots" in an IP-based infrastructure are not actually the final
+destination for the data; they are likely to only be intermediate routers who
+send the data on to a final destination.  Therefore, while there may be
+applications for anycast addressing, we do not believe this addressing mode to
+be appropriate in the common case.
+
+1.3 IPv6 Configuration Mechanisms
+----------------------------------------------------------------------------
+
+As alluded to earlier, IPv6 contains two mechanisms to allow internet hosts to
+become associated with a public network identifier.  These methods are
+stateless autoconfiguration and DHCPv6.  Stateless autoconfiguration defines
+Router Solicitations and Router Advertisements.  A host joining a network
+sends router solicitations to the link-local all-routers address (ff02::2)
+using his link-local address as the source address.  Routers respond with a
+Router Advertisement containing, among other things, a public network
+identifier which the host may use.
+
+In a TinyOS IP implementation, router solicitations and advertisements might
+be used for default route selection on the hosts, as well as neighbor
+discovery.
+
+1.4 Extension Mechanisms
+----------------------------------------------------------------------------
+
+A common idiom in TinyOS is to provide "stacked" headers by implementing a
+series of components, all of which implement the Packet interface.  IPv6
+supports this a more flexible way with options headers.  These headers fall
+into one of two categories: hop-by-hop options headers and destination option
+headers.  These headers are chained together with small, two-octet common
+header fields which identifiy the header type of the next header, and the
+length of that options header.  This allows hosts to process a header chain
+even if they do not know how to interpret all of the options headers.
+
+These headers are commonly used for protocol options, or to piggyback data on
+outgoing packets.  For instance, a link estimator component could add an extra
+"link options" header to occasional outgoing packets as an options header,
+while avoiding the overhead when it is not necessary to do so.  This header
+architecture is significantly more flexible then the existing TinyOS packet
+architecture, although it does come at the slight cost of complexity.
+
+2. The State of the Standards
+============================================================================
+
+All of the previously defined mechanisms are well defined for IPv6 in various
+RFCs.  However, most nodes running TinyOS are significantly more
+resource-constrained then typical IPv6 hosts.  Thus, there is ongoing work on
+adapting these mechanisms to the characteristics of embedded devices.
+
+2.1 Header Compression
+----------------------------------------------------------------------------
+
+The first issue which must be addressed is the sheer size of the IPv6 header:
+40 octets.  Of this, 32 octets are the source and destination addresses of the
+packet.  The IETF has published RFC4944 which describes a header compression
+technique known as HC1.  However, this scheme has significant problems, most
+importantly the inability to take advantage of 16-bit short identifiers when
+available.  There have been a sequence of internet drafts proposing improved
+techinques such as HC1g, and HC.  The most recent version of these drafts is
+draft-hui-6lowpan-hc-02, and there are strong indications that the working
+group will depreciate HC1 from RFC4944 in the future.
+
+2.2 MTU
+----------------------------------------------------------------------------
+
+IPv6 requires a minimum link MTU of 1280 octets in RFCXXX.  Clearly, this is
+much larger then the IEEE802.15.4 link MTU of 127 octets.  RFC4944 defines 
+"layer 2.5" fragmentation which allow packets up to this MTU to be transfered
+over small MTU links.  While there are some issues have been raised with this
+scheme, it seems likely to remain relatively unaltered.
+
+2.3 Autoconfiguration
+----------------------------------------------------------------------------
+
+IPv6 stateless autoconfiguration as originally defined has some problems,
+expecially once a "route over" network topology is established; for instance,
+Duplicate Address Detection is likely to require some changes.  A subcomittee
+of the 6lowpan working group is currently investigating these issues is is
+likely to propose adaptation mechanisms but they are currently in flux.
+
+2.4 Routing
+----------------------------------------------------------------------------
+
+It is currently not possible to develop a standards-compliant routing layer,
+as the relevant standards do not exist.  Work in this direction is occuring in
+the Roll working group, but a full specification is likely some way off.
+
+3. The TinyOS Way
+============================================================================
+
+As the previous sections have shown, many sensor network abstractions map well
+into IPv6 mechanisms, with a significant gain in clarity of abstraction.
+However, standards are currently unavailable to specifiy exactly how this
+should be accomplished.  Therefor, our position is that TinyOS should move
+quickly to incorporate existing techinques and standards into an IPv6 stack
+where possible, while taking liberties with the standards when doing so
+improves performance or simplifies implementation.  Given that the standards
+themselves are in a state of flux, having an open implementation which
+demonstrates challenges and feasible mechaninisms is likely to be of
+significant value.
+
+The most important places where it may be necessary to move ahead of the
+standards are the routing; an IPv6 stack with no routing will not be as useful
+as one with it.  One open question is weather we choose a routing algorithm
+which functions in a completly decentralized fashion like AODV, OLSR, DYMO,
+S4, or many existing protocols or choose one which imposes more hierarchy on
+deployments.  We do note that existing standards like Zigbee and WirelessHART
+both contain multi-tier architectures with devices of differing capabilities.
+This has also been a common deployment model in many applications, but it
+limits the utility to places where this is possible.  The correct long-term
+answer is probably to support both types of routing.
+
+4. Conclusion
+============================================================================
+
+This document is meant to introduce readers to the ways in which IPv6
+mechanisms can be used in a TinyOS-based sensor network deployment, and how
+they relate to previous work.  It does not address any implementation issues,
+which will be presented in a later TEP.
+
+5. Authors
+============================================================================
+
+| Stephen Dawson-Haggerty
+| Computer Science Division
+| University of California, Berkeley
+| 410 Soda Hall
+| Berkeley, CA 94701
+| 
+| stevedh@eecs.berkeley.edu
+|
+|
+| Matus Harvan
+| Information Security
+| IFW C 48.1
+| ETH Zentrum
+| Haldeneggsteig 4
+| 8092 Zurich
+| Switzerland
+|
+| phone - +41 44 63 26876
+| email - mharvan@inf.ethz.ch
+|
+|
+| Omprakash Gnawali
+| Ronald Tutor Hall (RTH) 418 
+| 3710 S. McClintock Avenue
+| Los Angeles, CA 90089 
+|
+| phone - +1 213 821-5627
+| email - gnawali@usc.edu
+
+6. References
+============================================================================
diff --git a/doc/txt/tep137.txt b/doc/txt/tep137.txt
new file mode 100644
index 00000000..cb87d19a
--- /dev/null
+++ b/doc/txt/tep137.txt
@@ -0,0 +1,266 @@
+====================================================================
+Traffic Control
+====================================================================
+
+:TEP: 137
+:Group: Core Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: David Moss, Mark Hays, and Mark Siner
+
+:Draft-Created: 3-Sept-2009
+:Draft-Version: $Revision: 1.1 $
+:Draft-Modified: $Date: 2009-10-01 21:09:49 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo proposes traffic control interfaces to be provided by an optional 
+traffic control layer integrated at the highest levels of communication
+stacks. These traffic control mechanisms are targeted to help improve acknowledgment
+success rate, energy efficiency, fairness, and routing reliability on 
+any wireless platform. The available reference implementation is a platform
+independent radio stack layer designed to consume a very small memory footprint.
+
+
+1. Introduction
+====================================================================
+
+As the traffic rate of a wireless sensor network increases, the probability
+of collision, dropped packets, and missed acknowledgments also increases, 
+even with sophisticated CSMA/CA implementations.
+
+It is important, especially in the case mesh networks, for packets to be 
+delivered reliably and acknowledgments to be returned successfully on a hop-by-
+hop basis. One method to improve reliability is to reduce the rate of 
+transmissions from each node within the network.
+
+Traffic Control has been in use for years in many different wired and wireless
+applications[1]_,[2]_,[3]_.  TinyOS already has traffic control
+mechanisms integrated directly into some networking libraries, such as CTP[4]_
+and Dissemination[5]_.  The use of Trickle[6]_ algorithms, also used 
+within CTP and Dissemination, further reduces the rate of traffic throughout a 
+network to improve delivery performance and prevent livelock. There has
+yet to be a centralized method of traffic control that throttles traffic
+generated from any component of a user's application.
+
+The traffic control interfaces proposed in this TEP are very basic, and are 
+intended to support many different traffic control implementations.
+Two interfaces assist the application layer in controlling behavior: 
+TrafficControl and TrafficPriority.  
+
+The reference implementation presented here is integrated as a optional and 
+generic radio stack layer (providing a Send and using a SubSend interface) and 
+uses acknowledgments to dynamically adjust the transmit throttle. Other traffic 
+control implementations could employ more sophisticated techniques to control 
+throughput, but likely at the cost of a larger memory footprint.
+
+The ultimate goal is to allow developers to use mesh networking protocols and/or
+their own protocols without having to worry about implementing any kind of
+traffic control timer mechanism for each separate component. 
+
+2. Desired Behavior
+====================================================================
+
+Ideally, a traffic control layer SHOULD attempt to balance the rate of 
+transmissions from a single node with the channel throughput capacity.
+This implies an adaptive control mechanism. If the channel is 
+busy, nodes should add delay between packets to let other nodes transmit.
+Similarly, if the channel is not busy, a node should be allowed access to
+the channel more often to prevent inefficient channel downtime.  Traffic
+control SHOULD NOT listen to the channel for long periods of time to determine
+the appropriate access rates, because that defeats the purpose of low power 
+communications layers used elsewhere.
+
+The traffic control implementation SHOULD have the option to be activated or 
+deactivated on a system-wide level as well as a packet level. This allows for 
+individual high or low priority packets. Traffic control SHOULD be deactivated 
+by default, until the application or networking layers explicitly enable it.
+
+Finally, the traffic control mechanism SHOULD be small in code size to fit 
+on the limited program memory available on most wireless platforms. There
+SHOULD NOT be additions or modifications to a packet's metadata structure 
+that enables or disables traffic control on a per-packet basis; 
+instead, per-packet priorities SHOULD be performed with a request/call back 
+procedure. This keeps RAM requirements low and can be optimized out at compile 
+time if those functions are not used.
+
+We also recommend any traffic control layer be implemented as an optional
+compile time add-on to a core radio stack or within the ActiveMessageC platform 
+communication stack definition. This allows applications that do not require
+traffic control to remove its memory footprint from the system.
+
+3. TrafficControlC Component Signature
+====================================================================
+
+The signature of TrafficControlC is RECOMMENDED as follows::
+
+  
+  configuration TrafficControlC {
+    provides {
+      interface Send;
+      interface TrafficControl;
+      interface TrafficPriority[am_id_t amId];
+    }
+    
+    uses {
+      interface Send as SubSend;
+    }
+  }
+
+The Send interface provided on top and SubSend interface used underneath
+allow the TrafficControlC component to be integrated as a generic layer
+within any radio stack.
+
+4. TrafficControl Interface
+====================================================================
+
+The TrafficControl interface allows the application layer to enable or
+disable traffic control from a system-wide level.  It also
+allows an application to set and get the current delay between packets.
+For most systems, we expect that the setDelay() and getDelay() commands may not be 
+used often and will most likely get optimized out at compile time; however, some
+systems may care to explicitly increase or decrease the delay between packets or 
+collect statistics on how the traffic control layer is performing.
+
+The TEP proposes the following TrafficControl interface::
+
+  
+  interface TrafficControl {
+  
+    command void enable(bool active);
+    
+    command void setDelay(uint16_t delay);
+    
+    command uint16_t getDelay();
+    
+  }
+
+5. TrafficPriority Interface
+====================================================================
+
+The TrafficPriority interface is parameterized by active message ID.  It is a
+simple request / call back interface that allows components in the application layer to 
+configure individual packets for priorities on a scale from 0 (lowest priority, default) to
+5 (highest priority, get the packet out immediately). There are several advantages 
+to this call back method. Metadata does not need to be added
+to the end of every message_t. Additionally, a component that captures a requestPriority(...)
+event is not required to adjust the priority as it would if the event returned 
+a value.
+
+When a packet enters the traffic control layer, and traffic control is
+enabled, the TrafficPriority interface MUST signal out the event
+requestPriority(...).  This event, with all the extra information it provides,
+allows the application layer to decide whether the packet is a high priority
+packet or not.  Calling the setPriority(uint8_t priority) command within the 
+requestPriority(...) event MAY adjust the traffic control mechanisms applied
+to the current packet.  To aid in the definition of priority, two definitions
+are available in TrafficControl.h::
+
+  
+  enum {
+    TRAFFICPRIORITY_LOWEST = 0,
+    TRAFFICPRIORITY_HIGHEST = 5,
+  };
+
+It is up to the traffic control implementation to define the meaning of each priority
+level. In the reference implementation, a priority of 0 
+is the default low priority level that employs the full traffic control delays.
+Anything above 0 in the reference implementation is considered to be at the
+highest priority.
+
+If no areas of the application layer care to change the
+packet's priority, a default event handler will capture the requestPriority(...)
+event and do nothing. This would result in all packets being sent at a low 
+priority with full traffic control mechanisms enforced.
+
+The TEP proposes the following TrafficPriority interface, to be provided as an 
+interface parameterized by AM type::
+  
+  interface TrafficPriority {
+  
+    event void requestPriority(am_addr_t destination, message_t \*msg);
+    
+    command void setPriority(uint8_t priority);
+    
+  }
+
+
+6. Reference Implementation
+====================================================================
+
+An implementation of the proposed traffic control layer can be found in the
+CCxx00 radio stack in 
+tinyos-2.x-contrib/blaze/tos/chips/ccxx00_addons/trafficcontrol, with
+interfaces located in 
+tinyos-2.x-contrib/blaze/tos/chips/ccxx00_single/interfaces and a dummy
+implementation located in
+tinyos-2.x-contrib/blaze/tos/chips/ccxx00_single/traffic.
+
+In this implementation, the default core radio stack (ccxx00_single) includes 
+an empty stub for traffic control. Users that wish to include the
+traffic control implementation in their systems simply override the default 
+stub component with the ccxx00_addons/trafficcontrol directory.  
+
+The reference implementation works as follows. All nodes start with a default
+of 4 seconds between each packet. Changes are made to the time between outbound
+packets only when a unicast packet is sent with the request for acknowledgment 
+flag set.  The reception of an acknowledgment is used as a basic indicator of 
+channel activity.  For each acknowledgment received, the amount of time between
+packets is decreased so the next packet will get sent faster.  For each dropped 
+acknowledgment, the amount of time between packets increases, causing the
+next packet to be sent later.  
+
+When the transmission rate reaches a boundary (1 second per packet per node
+fastest, 10 seconds per packet per node slowest), it is reset to the default 
+rate of 4 seconds per packet per node. This prevents nodes from unfairly 
+capturing the channel.
+
+Testing this traffic control layer in a congested test bed setting of 16 nodes
+with multiple hidden terminals resulted in the acknowledgment success rate 
+moving from 27-50% without traffic control to 90-100% with traffic control.
+The memory footprint increased by 260 bytes ROM / 16 bytes RAM with the 
+inclusion of the traffic control layer.
+
+
+5. Author Addresses
+====================================================================
+
+| David Moss
+| Rincon Research Corporation
+| 101 N. Wilmot Suite 101
+| Tucson AZ  85750
+| email: mossmoss at gmail dot com
+|
+| Mark Hays
+| Rincon Research Corporation
+| 101 N. Wilmot Suite 101
+| Tucson AZ  85750
+| email: mhh at rincon dot com
+|
+| Mark Siner
+| Rincon Research Corporation
+| 101 N. Wilmot, Suite 101
+| Tucson, AZ  85750
+| email: mks at rincon dot com
+
+
+
+6. Citations
+====================================================================
+.. [1] Bret Hull, Kyle Jamieson, Hari Balakrishnan. "Mitigating Congestion in Wireless Sensor Networks." In the Proceedings of the ACM Sensys Conference 2004
+.. [2] Wan, C.-Y., Eisenman, S., and Campbell, A. "CODA: Congestion Detection and Avoidance in Sensor Networks." In the Proceedings of the ACM Sensys Conference 2003
+.. [3] Woo, A., and Culler, D. "A Transmission Control Scheme for Media Access in Sensor Networks." In ACM MOBICOM 2001
+.. [4] Rodrigo Fonseca, Omprakash Gnawali, Kyle Jamieson, Sukun Kim, Philip Levis, and Alec Woo.. "TEP123: Collection Tree Protocol" 
+.. [5] Philip Levis and Gilman Tolle. "TEP118: Dissemination of Small Values." 
+.. [6] Philip Levis, Neil Patel, David Culler, and Scott Shenker. "Trickle: A Self-Regulating Algorithm for Code Maintenance and Propagation in Wireless Sensor Networks." In Proceedings of the First USENIX/ACM Symposium on Networked Systems Design and Implementation (NSDI 2004).
+
diff --git a/doc/txt/tep138.txt b/doc/txt/tep138.txt
new file mode 100644
index 00000000..470c7d34
--- /dev/null
+++ b/doc/txt/tep138.txt
@@ -0,0 +1,174 @@
+============================
+Source Routing
+============================
+
+:TEP: 138
+:Group: Net2 Working Group
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: > 2.1
+:Author: Chieh-Jan (Mike) Liang, Doug Carlson, Maria A. Kazandjieva, and Omprakash Gnawali
+
+:Draft-Created: 28-May-2010
+:Draft-Version: $Revision: 1.2 $
+:Draft-Modified: $Date: 2010-06-09 19:20:28 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+====================================================================
+
+This memo documents the interfaces and components used for source
+routing in TinyOS 2.x. Source routing allows its users to specify the
+path a packet must take to reach the destination.
+
+1. Introduction
+====================================================================
+
+Source routes are paths explicitly provided by its users. These
+routes, often in the form of a list of nodes to be traversed on the
+way to the destination, are carried in the packet header. When a node
+receives a source-routed packet, it looks up the next hop in the
+source routing packet header and forwards the packet to that node.
+
+A complete source routing system is comprised of two sets of
+functionality: the first deals with reading and writing source routes 
+and the second handles forwarding based on source routes.
+
+A source routing system can be used in many ways. This can be useful
+as a light-weight routing system for debugging or for environments
+that are static enough that the routes are known ahead of time. It can
+also be used by routing systems that compute the path at a given node
+based on topology information from the network. For example, given the
+link state information of a network, a node can source route a packet
+to any node in the network. Source routing is also useful to route a
+packet along the reverse path to the original sender.
+
+Our approach provides the most basic source routing system as an
+example of a light-weight end-to-end protocol that can also be used in
+conjunction with other routing and forwarding systems. Our focus in
+this document is to specify a best-effort source routing system.
+
+The rest of this document describes the source routing interfaces and
+components.
+
+2. Source Routing Interfaces
+====================================================================
+
+A node can perform three different roles in source routing:
+
+  * Sender: Configuring the source route and send a packet
+
+  * Forwarder: Receive a source routed packet and forward it to the next hop
+
+  * Receiver: Receive a source routed packet at the destination
+
+Multiple sender applications can use the source routing system. These senders 
+are uniquely identified by sourceroute identifiers. These identifiers work
+like collection identifiers in collection protocols[1_]. 
+
+The sender uses the SourceRouteSend interface to set the contents of a packet.
+The sender uses the SourceRouteSend interface to introduce a packet into the network.
+
+  interface SourceRouteSend {
+    command error_t send(am_addr_t *path, uint8_t pathLen, message_t* msg, uint8_t len);
+    command error_t cancel(message_t* msg);
+    event void sendDone(message_t* msg, error_t error);
+    command uint8_t maxPayloadLength();
+    command void* getPayload(message_t* msg, uint8_t len);
+  }
+
+
+The forwarder uses the SourceRoutePacket interface to update the header as it 
+forwards the packet:
+
+  interface SourceRoutePacket
+  {
+    command am_addr_t address();
+  
+    command error_t clearRoute(message_t *msg);
+
+    command error_t setRoute(message_t *msg, nx_am_addr_t *path, uint8_t len);
+    command nx_am_addr_t* getRoute(message_t *msg);
+    
+    command uint8_t getRouteLen(message_t *msg);
+    command error_t setRouteLen(message_t *msg, uint8_t len);
+    
+    command am_addr_t getNextHop(message_t *msg);
+    command am_addr_t getDest(message_t *msg);
+     
+    command uint8_t getCurHop(message_t *msg);
+    command error_t setCurHop(message_t *msg, uint8_t hop);
+    
+  }
+
+
+3. Source Routing Services
+====================================================================
+
+A source routing service MUST provide one SourceRoutingC,
+which has the following signature:
+
+  configuration SourceRoutingC {
+    provides {
+      interface StdControl;
+      interface SourceRouteSend[uint8_t client];
+      interface SourceRoutePacket;
+      interface Receive[sourceroute_id_t id];
+    }
+    uses {
+      interface SourceRouteId[uint8_t client];
+    }
+  }
+
+  
+4. Implementation
+====================================================================
+
+An implementation of source routing service will be found in
+``tinyos-2.x/tos/lib/net/sourceroute``.
+
+5. Author Addresses
+====================================================================
+
+| Chieh-Jan (Mike) Liang
+| 213 NEB, 3400 N Charles St
+| Johns Hopkins University
+| Baltimore, MD 21211
+|
+| email - cliang4@cs.jhu.edu
+|
+| Doug Carlson
+| 213 NEB, 3400 N Charles St
+| Johns Hopkins University
+| Baltimore, MD 21211
+|
+| email -  carlson@cs.jhu.edu
+|
+| Maria A. Kazandjieva
+| 284 Gates Computer Science, 353 Serra Mall
+| Stanford University
+| Stanford, CA 94305
+|
+| email - mariakaz@cs.stanford.edu
+|
+| Omprakash Gnawali
+| S255 Clark Center, 318 Campus Drive
+| Stanford University
+| Stanford, CA  94305
+|
+| phone - +1 650 725 6086
+| email - gnawali@cs.stanford.edu
+
+
+6. Citations
+====================================================================
+
+.. [1] TEP 119: Collection
+
diff --git a/doc/txt/tep139.txt b/doc/txt/tep139.txt
new file mode 100644
index 00000000..c5774739
--- /dev/null
+++ b/doc/txt/tep139.txt
@@ -0,0 +1,192 @@
+==============================================================================
+The Source Routing Protocol (SRP)
+==============================================================================
+
+:TEP: 139
+:Group: Network Working Group 
+:Type: Documentary
+:Status: Draft
+:TinyOS-Version: > 2.1
+:Author: Chieh-Jan Mike Liang, Eric Decker, Doug Carlson, and Omprakash Gnawali
+
+:Draft-Created: 18-Jun-2010
+:Draft-Version: $Revision$
+:Draft-Modified: $Date$
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements. Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+==============================================================================
+
+This memo documents the Source Routing Protocol (SRP), which provides
+best-effort point-to-point datagram communication in a network.
+
+1. Introduction
+==============================================================================
+
+A source routing protocol delivers packets from the origin node to the
+destination node. Specifically, source routing allows the origin node to
+specify the route the packet should take in the network. In this
+respect, source routing is considered as one implementation of the
+forwarding engine in network protocols.
+
+The Source Routing Protocol (SRP) is a reference implementation of
+source routing in TinyOS 2.x. SRP is a network-level protocol built on
+top of the TinyOS Active Message (AM) Layer which provides unreliable
+delivery over multi-link routes. Users interact with SRP through the
+source routing interfaces described in TEP 138 [1]_.
+
+In this TEP, after a brief discussion of source routing and SRP, we
+specify the packet format used by SRP, and how fields in the packet are
+used to deliver packets in the network. There are no control frames in
+SRP; all information necessary for source routing is carried in the data
+frame.
+
+All fields in this specification are in network byte order.
+
+2. Source routing and SRP
+==============================================================================
+
+Source routing relies on the origin node to specify the list of nodes
+that a packet should traverse to reach the destination node. Mechanisms
+for path determination are beyond the scope of this specification.
+
+Source routing is useful in many cases. First, source routing may be
+used by protocols that compute routes centrally on more capable nodes.
+Such protocols might first collect link state information from the
+network, and then compute the routes to destination nodes of pending
+packets. Second, during experiments, applications can use source routing
+to fix the route that data packets traverse in the network.
+
+When the user of SRP provides the source route, or the list of nodes on
+the path, SRP stores this information in the data packet header. SRP
+looks up the next hop in the source route in the data packet header and
+forwards the data packet to the next hop. Once the data packet reaches
+the destination, it is considered as being successfully delivered.
+
+SRP is a best-effort protocol. During packet forwarding, if the
+underlying MAC layer indicates a failure in delivering packets to the
+next hop (i.e., the MAC layer fails to receive the packet
+acknowledgement), SRP drops the packet and does not need to notify the
+origin node.
+
+
+3. Packet Format
+==============================================================================
+
+SRP does not have control packets. All the information necessary for
+routing is contained in the data packet header.
+
+The SRP data frame consists of the header, the source routing entries
+(SR Entry), and the payload as shown below::
+
+  -------------------------------------------------------------
+  |   SRP    | SR Entry | SR Entry | ... | SR Entry | Payload |
+  |  Header  |     0    |     1    |     |    n-1   |         |
+  -------------------------------------------------------------
+
+SR Entry 0 corresponds to the origin node, and SR Entry 1 corresponds to
+the first-hop node on the path. Similarly, SR Entry n-1 corresponds to the
+destination of the packet. The number of source route entries is equal
+to the number of nodes on the path.
+
+SR Entries SHOULD NOT repeat as this can cause unwanted loops.
+
+
+3.1 SRP header
+--------------------------------------------------------------------
+
+                           1            
+       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |     sr_len    |   hops_left   |
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |     seqno     |   payload_id  |    
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+
+
+Field definitions are as follows:
+
+  * sr_len: (n) The length of the path in hops. This is equal to the number
+    of source route entries following the SRC header.
+  
+  * hops_left: The remaining distance (in hops) towards the
+    destination. Each node MUST decrement this field when it forwards the
+    packet. It is 0 at the destination. Must be less than sr_len (0..n-1).
+
+  * seqno: The value of the sequence number counter maintained by the
+    origin node. The origin node sets this field, and a node
+    forwarding a data frame MUST NOT modify it. The origin node
+    SHOULD use increasing sequence numbers with wraparound.
+
+  * payload_id: Higher-level protocol identifier. The origin sets this
+    field, and a node forwarding a data frame MUST NOT modify it.
+
+
+3.2 Source Routing Entry
+--------------------------------------------------------------------
+
+The following diagram shows the format of the Source Routing Entry::
+
+                           1
+       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+      |            node_id            |
+      +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+
+Field definition:
+
+  * node_id: the link layer address of a node on the path to the
+    destination.
+
+
+4. Implementation
+==============================================================================
+
+An implementation of SRP can be found in the ``tos/lib/net/srp`` directory
+of TinyOS 2.x source tree.
+
+
+5. Authors
+====================================================================
+
+| Chieh-Jan Mike Liang
+| 213 NEB, 3400 N Charles St
+| Johns Hopkins University
+| Baltimore, MD 21211
+|
+| email - cliang4@cs.jhu.edu
+|
+| Eric B. Decker
+| Autonomous Systems Lab
+| University of California, Santa Cruz
+|
+| email - cire831@gmail.com
+|
+| Doug Carlson
+| 213 NEB, 3400 N Charles St
+| Johns Hopkins University
+| Baltimore, MD 21211
+|
+| email - carlson@cs.jhu.edu
+|
+| Omprakash Gnawali
+| S255 Clark Center, 318 Campus Drive
+| Stanford University
+| Stanford, CA  94305
+|
+| phone - +1 650 725 6086
+| email - gnawali@cs.stanford.edu
+
+
+6. Citations
+====================================================================
+
+.. [1] TEP 138: Source Routing
+
diff --git a/doc/txt/tep140.txt b/doc/txt/tep140.txt
new file mode 100644
index 00000000..82c82d93
--- /dev/null
+++ b/doc/txt/tep140.txt
@@ -0,0 +1,353 @@
+==============================================================================
+The Net2 Protocol Benchmark
+==============================================================================
+
+:TEP: 140
+:Group: Network Working Group 
+:Type: Informational
+:Status: Draft
+:TinyOS-Version: > 2.1
+:Author: Thanh Dang, Kaisen Lin, Chieh-Jan Mike Liang, and Omprakash Gnawali
+
+:Draft-Created: 12-Jul-2010
+:Draft-Version: $Revision: 1.1 $
+:Draft-Modified: $Date: 2010-07-12 22:40:39 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This memo documents a part of TinyOS for the TinyOS Community, and
+   requests discussion and suggestions for improvements.  Distribution
+   of this memo is unlimited. This memo is in full compliance with
+   TEP 1.
+
+Abstract
+==============================================================================
+
+The memo describes the metrics, test scenarios, test applications, and
+analysis tools for testing collection and dissemination protocols in
+TinyOS 2.x. Our goal is to design benchmark suites for network protocols.
+
+
+1. Introduction
+==============================================================================
+
+TinyOS 2.x has a number of collection and dissemination protocols.
+Collection is a network-layer best-effort protocol that forms routes
+from all the nodes in a network to one or more collection roots or sinks
+[1]_. CTP [2]_ and MultihopLQI are examples of collection protocols
+available in TinyOS 2.x. Dissemination is a network-layer reliable
+protocol that provides the eventual delivery of key-value pairs (items) to 
+all the nodes in a network [3]_. Drip, DIP, and DHV are examples of
+dissemination protocols available in the TinyOS 2.x distribution.
+Although a large number of mature protocols are available, the community
+lacks standard performance tests to evaluate these protocols.
+
+In this document, we describe benchmark suites (i.e., test cases,
+scenarios, metrics, and tools) designed with the following two goals.
+First, benchmark suites should allow us to systematically compare the
+performance of protocols of the same category. Second, benchmark suites
+should enable us to quantify the performance difference from the
+different versions of a protocol. We hope the community will adopt these
+benchmark suites so that the evaluation results from different research
+projects can be more meaningfully compared.
+
+
+2. The Net2 Protocol Benchmark Overview
+==============================================================================
+
+There are two components in the benchmark test cases. First, test cases
+need to specify the topologies, scenarios, and protocol parameters to
+vary across the experiments. Second, we need to define a set of metrics
+to interpret the results and logs collected from running test cases.
+
+
+3. Definitions
+==============================================================================
+
+Target state : target state of the network is the state where all nodes in
+the network achieve the collection or dissemination goals. For example, all 
+data is reported to a sink in collection or data is disseminated to all nodes 
+in dissemination. 
+
+Stable network: Stable network refers to network that is in target state for 
+a reasonablly long time.
+
+Updating time : For dissemination protocols, this is the duration from the time
+the first of a set of items being disseminated until the time all nodes receive 
+allitems.
+
+Collection time : For collection protocols, this is the duration from the time 
+the first data is generated to the time all the data is reported to the sinks.
+
+Stabilizing time : Stablizing time refers to the period from the time the network 
+first reach the target state to the time the amount of control traffic generated 
+by the network reaches a constant rate and is still in the target state. For 
+dissemination protocols, stabilizing time is the duration from the last 
+node receives the disseminated item until the network reaches a stable state. 
+For collection protocols, this is the duration from any change in the network 
+topology until the network reaches a target state.
+[COMMENT: change in terms of data generated by sensors or link status?] 
+
+Testbed topology : This refers to the connectivity graph of a testbed.
+
+Network density : This defines the average number of neighborhood size
+in the network.
+
+
+4. Test Case Topologies
+==============================================================================
+
+To promote experiment repeatability and fair comparisons, the network
+topologies MUST remain the same when the same experiment is repeated for
+several runs. However, due to the dynamic nature of testbeds, it is
+difficult to repeat experiments under the same conditions on testbeds. We
+therefore focus on only specifying topologies for simulations in this
+document.
+
+Topologies used in simulations can be either created by duplicating
+topologies of real-world testbeds or from synthesizing topologies as
+outlined later in this section. For testbed topologies, there are
+available topologies from  Motelab, Mirage,...?, which can be accessible
+at urls..?. For synthesized topologies, experiments SHOULD use the
+following topologies.
+
+a) Single-hop star topology
+b) Single-hop clique topology
+c) Multi-hop chain topology
+d) Multi-hop grid topology
+e) Multi-hop random topology
+f) Multi-hop binary tree topology
+                                              
+               ____                    __ __
+ \ | /        /\  /\                  |  |  |     	
+__\|/__      /__\/__\     _ _ _ _     |__|__|             \|/__\
+  /|\        \  /\  /                 |  |  | 		   |\	 /
+ / | \        \/__\/                  |__|__|              |_\/
+   a)           b)           c)          d)            e)
+
+   /\
+  /\/\
+ /\../\
+/\/\/\/\
+   f)
+
+The network size (total number of nodes) and the network density
+(average number of neighbors) can be varied but should remain the same
+for the same set of experiments.
+
+The network dynamics, which are defined by the rate at which nodes (e.g.,
+unreliable or mobile nodes) join and leave a network MUST also remain
+the same for the same set of experiments.
+
+
+5. Test Case Scenarios
+==============================================================================
+
+The following scenarios SHOULD be considered in evaluating dissemination 
+protocols:
+
+Scenario 1: A node disseminates one or more new items to a stable network.
+This scenario occurs in practice when a node or a base station reprograms a 
+network or disseminates events to all nodes in the network.
+
+Scenario 2: A node with old items joins an updated network. This scenario 
+occurs in practice when one or more items have been disseminated to the network. 
+However, there are new nodes (eg. mobile nodes moving into the network 
+region, or intermittent nodes that were off during the dissemination) join 
+the network.
+
+Scenario 3: Multiple nodes join and leave a network at a specified rate.
+This scenario occurs in practice where mobile nodes moving in and out a
+region under dissemination.
+
+Scenario 4: Multiple items with different versions are disseminated to
+the network from different nodes. This scenario occurs in practice where 
+multiple users accessing a shared sensing network and commanding the
+network to perform different tasks at the same time. 
+
+
+The following scenarios SHOULD be considered in evaluating collection 
+protocols:
+
+Scenario 1: All nodes periodically generate one data packet in a network
+with only one sink. Nodes can start sampling at different time to mimic
+deployments where nodes boot at different time instances.
+
+Scenario 2: All nodes periodically generate one data packet in a network
+with multiple sinks. This exercises the case where the network leverages
+multiple sinks to increase the overall network capacity.
+
+Scenario 3: Multiple nodes join and leave a network at a specified rate.
+
+Scenario 4: Links go down and come up at a specified order and rate.
+
+6. Test Case Parameters
+==============================================================================
+
+There are a number of parameters affecting the performance of collection
+and dissemination protocols. Protocol test cases MUST be described
+together with the parameters' values. The parameters are organized in
+the order of stack layers.
+
++------------------------------------------------------------------------------+
+|      Layer      |    Parameter    |    Description     |      Value(s)       |
+|                 |                 |                    |                     |
+|-----------------+--------------------------------------+---------------------|
+| Application     | Item size       | Size of data item  | 2 or 10 bytes       |
+|                 |-----------------+--------------------+---------------------|
+|                 | Number of items |                    | 2 to 128            |
+|                 |-----------------+--------------------+---------------------|
+|                 | Number of new   | Number of items    | 2 to 128            |
+|                 | items           | to be disseminated |                     |
+|-----------------+-----------------+--------------------+---------------------|
+| Network layer   | Suppression     | Number of messages | 1, 2, 3             |
+|                 | constant        | a node heard before|                     |
+|                 |                 | suppressing its own|                     |
+|                 |                 | transmission       |                     | 
+|                 |                 | (trickle-based     |                     |
+|                 |                 | protocol only)     |                     |
+|-----------------+-----------------+--------------------+---------------------|
+| Link layer      | Link quality    | Can be gain, PRR   |                     |
+|                 |                 | ETX,...            |                     |
+|                 |-----------------+--------------------+---------------------|
+|                 | Duty cycle      | Can simply be duty |                     |
+|                 | or LPL          | cycle of the nodes |                     |
+|                 |                 | or LPL parameters  |                     |
++------------------------------------------------------------------------------+
+
+In addition, the following parameters that characterize a network MUST also be 
+considered.
+
++------------------------------------------------------------------------------+
+|   Parameters   |               Description             |      Value(s)       |
+|                |                                       |                     |
+|----------------+---------------------------------------+---------------------|
+| Density        | Can be the average number             | 3,4,5,6 neighbors or|
+|                | of neighbors or the average gain      |                     |
+|----------------+---------------------------------------+---------------------|
+| Network size   | Total number of nodes                 |                     |
+|                |                                       |                     |
+|----------------+---------------------------------------+---------------------|
+| Network        | Rates at which nodes are joining      | 1%, 5%, 10%, 15%    |
+| Dynamics       | and leaving a network (eg. due to     |                     |
+|                | mobility)                             |                     |
++------------------------------------------------------------------------------+
+
+
+7. Running the Test Cases
+==============================================================================
+
+A complete benchmark requires considering all possible parameter
+settings for all network topologies. The total number of test cases is
+11,340,000. To remove random factors, each test case SHOULD be repeated
+10 times. Hence, the total number of experiments are 113,400,000.
+
+Depending on which metrics are being compared, experimental design
+techniques SHOULD be used to reduce the number of experiments.
+
+Each experiment should be ran sufficiently long for the interested
+comparison metrics to reach stability. For collection protocols, the stability
+could refer to observing stability in the data latency of the whole
+network.
+
+While there are various methods of logging the node behavior during
+experiments, nodes SHOULD not broadcast any log packets on the radio
+until the experiment finishes. Instead, nodes can use the external flash
+or dump log data to the serial port, if available.
+
+8. Comparison Metrics
+==============================================================================
+
+The following metrics SHOULD be considered for dissemination protocol 
+comparisons.
+ 
+Total number of transmitted messages:
+
+  * For dissemination protocols, this defines the number of messages
+  transmitted from the time new items are disseminated to the time the
+  network is completely updated (or stable in the case of dynamic
+  network topologies).
+  
+  * For collection protocols, this defines the total number of messages
+  and acknowledgements exchanged for the entire test case duration.
+ 
+Data latency for a node:
+
+  * For dissemination protocols, this defines the latency calculated
+  from the time new items are disseminated or the time the node is
+  active (whichever later) to the time the node is updated.
+  
+  * For collection protocols, this defines the latency of a payload
+  calculated from the time it is generated on the node until it is
+  successfully delivered to any sink.
+
+Data latency for the whole network:
+
+  * For dissemination protocols, this defines the latency calculated
+  from the time new items are disseminated to the time the network is
+  completely updated (or stable in dynamic network case).
+
+  * For collection protocols, this is calculated by averaging the data
+  latency for each node in the network.
+
+Fraction of the network that is updated:
+
+  * This applies to dissemination protocols only. In the dynamic network
+  case, it is impossible to achieve 100% of the network updated because
+  there are always new nodes joining the network and nodes leaving the
+  network. It is suitable to consider the fraction of the network
+  (number of updated nodes/total number of nodes) that is updated. This
+  fraction is measured when it is stable.
+
+ROM and RAM usage:
+
+  * The memory usage of a simple program providing only the
+  dissemination or collection service.
+
+
+9. Result Analysis Tools
+==============================================================================
+
+Analysis scripts (eg. python, shell, matlab) are to be developed and
+released (in tinyos-2.x/benchmark/tools?)
+
+
+10. Authors
+==============================================================================
+
+| Thanh Dang
+| 135 FAB, 1900 SW 4th Ave
+| Portland State University
+| Portland, OR 97201
+|
+| email - dangtx@pdx.edu
+|
+| Kaisen Lin
+| UCSD
+| email - kaisenl@cs.ucsd.edu
+|
+| Chieh-Jan Mike Liang
+| 213 NEB, 3400 N Charles St
+| Johns Hopkins University
+| Baltimore, MD 21211
+|
+| email - cliang4@cs.jhu.edu
+|
+| Omprakash Gnawali
+| S255 Clark Center, 318 Campus Drive
+| Stanford University
+| Stanford, CA  94305
+|
+| phone - +1 650 725 6086
+| email - gnawali@cs.stanford.edu
+
+
+11. Citations
+====================================================================
+
+.. [1] TEP 119: Collection
+
+.. [2] TEP 123: The Collection Tree Protocol (CTP) 
+
+.. [2] TEP 118: Dissemination of Small Values
diff --git a/doc/txt/tep2.txt b/doc/txt/tep2.txt
new file mode 100644
index 00000000..8b3a0bee
--- /dev/null
+++ b/doc/txt/tep2.txt
@@ -0,0 +1,647 @@
+=================================
+Hardware Abstraction Architecture
+=================================
+
+:TEP: 2
+:Group: Core Working Group 
+:Type: Best Current Practice
+:Status: Final
+:TinyOS-Version: 2.x
+:Author: Vlado Handziski, Joseph Polastre, Jan-Hinrich Hauer, 
+         Cory Sharp, Adam Wolisz, David Culler, David Gay
+
+.. Note::
+
+   This document specifies a Best Current Practices for the TinyOS
+   Community, and requests discussion and suggestions for
+   improvements.  The distribution of the memo is unlimited, provided
+   that the header information and this note are preserved. Parts of
+   this document are taken verbatim from the [HAA2005]_ paper that is
+   under IEEE copyright and from the [T2_TR]_ technical report.  This
+   memo is in full compliance with [TEP1]_.
+
+
+Abstract
+========
+
+
+This TEP documents a *Hardware Abstraction Architecture (HAA)* for
+TinyOS 2.0 that balances the conflicting requirements of code
+reusability and portability on the one hand and efficiency and
+performance optimization on the other. Its three-layer design
+gradually adapts the capabilities of the underlying hardware platforms
+to the selected platform-independent hardware interface between the
+operating system core and the application code. At the same time, it
+allows the applications to utilize a platform's full capabilities --
+exported at the second layer, when the performance requirements
+outweigh the need for cross-platform compatibility.
+
+
+1. Introduction
+===============
+
+The introduction of hardware abstraction in operating systems has
+proved valuable for increasing portability and simplifying application
+development by hiding the hardware intricacies from the rest of the
+system. However, hardware abstractions come into conflict with the
+performance and energy-efficiency requirements of sensor network
+applications.
+
+This drives the need for a well-defined architecture of hardware
+abstractions that can strike a balance between these conflicting
+goals.  The main challenge is to select appropriate levels of
+abstraction and to organize them in form of TinyOS components to
+support reusability while maintaining energy-efficiency through access
+to the full hardware capabilities when it is needed.
+
+This TEP proposes a three-tier *Hardware Abstraction Architecture
+(HAA)* for TinyOS 2.0 that combines the strengths of the component
+model with an effective organization in form of three different levels
+of abstraction. The top level of abstraction fosters portability by
+providing a platform-independent hardware interface, the middle layer
+promotes efficiency through rich hardware-specific interfaces and the
+lowest layer structures access to hardware registers and interrupts.
+
+The rest of this TEP specifies:
+
+* the details of the *HAA* and its three distinct layers  
+  (`2. Architecture`_)
+* guidelines on selecting the "right" level of abstraction 
+  (`3. Combining different levels of abstraction`_)
+* how hardware abstractions can be shared among different TinyOS
+  platforms (`4. Horizontal decomposition`_)
+* the level of hardware abstraction for the processing units 
+  (`5. CPU abstraction`_)
+* how some hardware abstractions may realize different degrees of
+  alignment with the *HAA* top layer 
+  (`6. HIL alignment`_)
+
+The *HAA* is the architectural basis for many TinyOS 2.0 documentary
+TEPs, e.g. [TEP101]_, [TEP102]_, [TEP103]_ and so forth. Those TEPs
+focus on the hardware abstraction for a particular hardware module,
+and [TEP112]_ and [TEP115]_ explain how power management is realized.
+
+
+2. Architecture
+===============
+
+In the proposed architecture (Fig.1_), the hardware abstraction
+functionality is organized in three distinct layers of components.
+Each layer has clearly defined responsibilities and is dependent on
+interfaces provided by lower layers.  The capabilities of the
+underlying hardware are gradually adapted to the established
+platform-independent interface between the operating system and the
+applications. As we move from the hardware towards this top interface,
+the components become less and less hardware dependent, giving the
+developer more freedom in the design and the implementation of
+reusable applications.
+
+
+
+
+.. _Fig.1:
+
+::
+
+                           +-----------------------------+
+                           |                             |
+                           | Cross-platform applications |
+                           |                             |
+                           +--------------+--------------+
+ +-----------------+                      |                  +-----------------+
+ |Platform-specific|                      |                  |Platform-specific|
+ |  applications   |                      |                  |  applications   |
+ +--------+--------+                      |                  +--------+--------+
+          |          Platform-independent | hardware interface        |      
+          |        +-------------+--------+----+-------------+        |
+          |        |             |             |             |        |
+          |  +-----+-----+ +-----+-----+ +-----+-----+ +-----+-----+  |
+          |  |.----+----.| |.----+----.| |.----+----.| |.----+----.|  |
+          |  ||         || ||         || ||         || ||  HIL 4  ||  |
+          |  ||  HIL 1  || ||  HIL 2  || ||  HIL 3  || |`----+----'|  |
+          |  ||         || |`----+----'| |`----+----'| |     |     |  |
+          |  |`----+----'| |     |     | |     |     | |     |  +--+--+
+          +--+--+  |     | |.----+----.| |     |     | |     |  |  |
+             |  |  |     | ||         || |.----+----.| |.----+--+-.|
+             |.-+--+----.| ||         || ||         || ||         ||
+             ||         || ||  HAL 2  || ||         || ||         ||
+             ||         || ||         || ||  HAL 3  || ||  HAL 4  ||
+             ||  HAL 1  || |`----+----'| ||         || ||         ||
+             ||         || |     |     | ||         || ||         ||
+             ||         || |     |     | |`----+----'| |`----+----'|
+             |`----+----'| |.----+----.| |     |     | |     |     |
+             |     |     | ||         || |.----+----.| |     |     |
+             |.----+----.| ||  HPL 2  || ||         || |.----+----.|
+             ||  HPL 1  || ||         || ||  HPL 3  || ||  HPL 4  ||
+             |`----+----'| |`----+----'| |`----+----'| |`----+----'|
+             +-----+-----+ +-----+-----+ +-----+-----+ +-----+-----+  HW/SW
+                   |             |             |             |          boundary
+        ************************************************************************
+            +------+-----+ +-----+-----+ +-----+-----+ +-----+-----+
+            |HW Plat 1   | |HW Plat 2  | |HW Plat 3  | |HW Plat 4  |
+            +------------+ +-----------+ +-----------+ +-----------+
+
+                    
+              Fig.1: The proposed Hardware Abstraction Architecture
+
+
+
+In contrast to the more traditional two step approach used in other
+embedded operating systems like [WindowsCE]_, the three-level design
+results in increased *flexibility* that arises from separating the
+platform-specific abstractions and the adaptation wrappers that
+upgrade or downgrade them to the current platform-independent
+interface.  In this way, for maximum performance, the platform
+specific applications can circumvent the *HIL* components and directly
+tap to the *HAL* interfaces that provide access to the full
+capabilities of the hardware module.
+
+The rest of the section discusses the specific roles of each component
+layer in more detail.
+
+
+Hardware Presentation Layer (HPL)
+---------------------------------
+
+The components belonging to the *HPL* are positioned directly over the
+HW/SW interface. As the name suggests, their major task is to
+"present" the capabilities of the hardware using the native concepts
+of the operating system.  They access the hardware in the usual way,
+either by memory or by port mapped I/O. In the reverse direction, the
+hardware can request servicing by signaling an interrupt. Using these
+communication channels internally, the *HPL* hides the hardware
+intricacies and exports a more readable interface (simple function
+calls) for the rest of the system.
+
+The *HPL* components SHOULD be stateless and expose an interface that
+is fully determined by the capabilities of the hardware module that is
+abstracted. This tight coupling with the hardware leaves little
+freedom in the design and the implementation of the components.  Even
+though each *HPL* component will be as unique as the underlying
+hardware, all of them will have a similar general structure. For
+optimal integration with the rest of the architecture, each *HPL*
+component SHOULD have:
+
+- commands for initialization, starting, and stopping of the
+  hardware module that are necessary for effective power management
+  policy
+- "get" and "set" commands for the register(s) that control
+  the operation of the hardware
+- separate commands with descriptive names for the most
+  frequently used flag-setting/testing operations
+- commands for enabling and disabling of the interrupts generated by
+  the hardware module
+- service routines for the interrupts that are generated by the
+  hardware module
+
+The interrupt service routines in the *HPL* components perform only
+the most time critical operations (like copying a single value,
+clearing some flags, etc.), and delegate the rest of the processing to
+the higher level components that possess extended knowledge about the
+state of the system.
+
+The above *HPL* structure eases manipulation of the hardware.  Instead
+of using cryptic macros and register names whose definitions are
+hidden deep in the header files of compiler libraries, the programmer
+can now access hardware through a familiar interface.
+
+This *HPL* does not provide any substantial abstraction over the
+hardware beyond automating frequently used command
+sequences. Nonetheless, it hides the most hardware-dependent code and
+opens the way for developing higher-level abstraction components.
+These higher abstractions can be used with different *HPL*
+hardware-modules of the same class.  For example, many of the
+microcontrollers used on the existing sensornet platforms have two
+USART modules for serial communication.  They have the same
+functionality but are accessed using slightly different register names
+and generate different interrupt vectors. The *HPL* components can
+hide these small differences behind a consistent interface, making the
+higher-level abstractions resource independent.  The programmer can
+then switch between the different USART modules by simple rewiring
+(*not* rewriting) the *HPL* components, without any changes to the
+implementation code.
+
+  
+Hardware Adaptation Layer (HAL)
+-------------------------------
+
+The adaptation layer components represent the core of the
+architecture. They use the raw interfaces provided by the *HPL*
+components to build useful abstractions hiding the complexity
+naturally associated with the use of hardware resources. In contrast
+to the *HPL* components, they are allowed to maintain state that can
+be used for performing arbitration and resource control.
+
+Due to the efficiency requirements of sensor networks, abstractions at
+the *HAL* level are tailored to the concrete device class and
+platform. Instead of hiding the individual features of the hardware
+class behind generic models, *HAL* interfaces expose specific features
+and provide the "best" possible abstraction that streamlines
+application development while maintaining effective use of resources.
+
+For example, rather than using a single "file-like" abstraction for
+all devices, we propose domain specific models like *Alarm*, *ADC
+channel*, *EEPROM*. According to the model, *HAL* components SHOULD
+provide access to these abstractions via rich, customized interfaces,
+and not via standard narrow ones that hide all the functionality
+behind few overloaded commands. This also enables more efficient
+compile-time detection of abstraction interface usage errors.
+
+
+
+Hardware Interface Layer (HIL)
+------------------------------
+
+The final tier in the architecture is formed by the *HIL* components
+that take the platform-specific abstractions provided by the *HAL* and
+convert them to hardware-independent interfaces used by cross-platform
+applications.  These interfaces provide a platform independent
+abstraction over the hardware that simplifies the development of the
+application software by hiding the hardware differences.  To be
+successful, this API "contract" SHOULD reflect the *typical* hardware
+services that are required in a sensornet application.
+
+The complexity of the *HIL* components mainly depends on how advanced
+the capabilities of the abstracted hardware are with respect to the
+platform-independent interface. When the capabilities of the hardware
+exceed the current API contract, the *HIL* "downgrades" the
+platform-specific abstractions provided by the *HAL* until they are
+leveled-off with the chosen standard interface. Consequently, when the
+underlying hardware is inferior, the *HIL* might have to resort to
+software simulation of the missing hardware capabilities.  As newer
+and more capable platforms are introduced in the system, the pressure
+to break the current API contract will increase. When the performance
+requirements outweigh the benefits of the stable interface, a discrete
+jump will be made that realigns the API with the abstractions provided
+in the newer *HAL*.  The evolution of the platform-independent
+interface will force a reimplementation of the affected *HIL*
+components. For newer platforms, the *HIL* will be much simpler
+because the API contract and their *HAL* abstractions are tightly
+related. On the other extreme, the cost of boosting up (in software)
+the capabilities of the old platforms will rise.
+
+Since we expect *HIL* interfaces to evolve as new platforms are
+designed, we must determine when the overhead of software emulation of
+hardware features can no longer be sustained.  At this point, we
+introduce *versioning* of *HIL* interfaces.  By assigning a version
+number to each iteration of an *HIL* interface, we can design
+applications using a legacy interface to be compatible with previously
+deployed devices.  This is important for sensor networks since they execute
+long-running applications and may be deployed for years.  An *HIL* MAY
+also branch, providing multiple different *HIL* interfaces with
+increasing levels of functionality.
+
+
+3. Combining different levels of abstraction
+============================================
+
+Providing two levels of abstraction to the application --the *HIL* and
+*HAL*-- means that a hardware asset may be accessed at two levels in
+parallel, e.g. from different parts of the application and the OS
+libraries. 
+
+The standard Oscilloscope application in TinyOS 2.0, for example, may
+use the ADC to sample several values from a sensor, construct a
+message out of them and send it over the radio. For the sake of
+cross-platform compatibility, the application uses the standard
+``Read`` interface provided by the ADC *HIL* and forwarded by the
+``DemoSensorC`` component wired to, for example, the temperature
+sensor wrapper.  When enough samples are collected in the message
+buffer, the application passes the message to the networking stack.
+The MAC protocol might use clear channel assessment to determine when
+it is safe to send the message, which could involve taking several ADC
+samples of an analog RSSI signal provided by the radio hardware. Since
+this is a very time critical operation in which the correlation
+between the consecutive samples has a significant influence, the
+programmer of the MAC might directly use the hardware specific
+interface of the *HAL* component as it provides much finer control
+over the conversion process. (Fig.2_) depicts how the ADC hardware
+stack on the MSP430 MCU on the level of *HIL* and *HAL* in parallel.
+
+.. _Fig.2:
+
+::
+
+               +--------------------------------+
+               |               APP              |
+               +-+----------------------------+-+
+                 |                            |
+                Read                         Send
+                 |                            |
+                 |                            |
+       +---------+----------+         +-------+--------+
+       |   DemoSensorC /    |         |                |
+       |   TemperatureC     |         | ActiveMessageC |
+       +---------+----------+         |                |
+                 |                    +-------+--------+
+                Read                          |
+                 |                            |
+                 |                    +-------+--------+
+       +---------+----------+         |                |
+       | HIL:   AdcC        |         |                |
+       +---------+----------+         |  TDA5250       |
+                 |                    |                |
+                 |                    |  Radio Stack   |
+                 |                    |                |
+                 |                    +-------+--------+
+                 |                            |
+                 |     +----------------------+
+                 |     |
+         Msp430Adc12SingleChannel
+                 |     |
+                 |     |
+       +---------+-----+----+
+       | HAL: Msp430Adc12C  |
+       +--------------------+
+ 
+ 
+                Fig.2: Accessing the MSP430 ADC hardware abstraction
+                       via *HIL* and *HAL* in parallel
+
+
+To support this type of "vertical" flexibility the ADC *HAL* includes
+more complex arbitration and resource control functionality [TEP108]_
+so that a safe shared access to the *HPL* exported resources can be
+guaranteed.
+
+
+4. Horizontal decomposition
+===========================
+
+In addition to the *vertical* decomposition of the *HAA*, a
+*horizontal* decomposition can promote reuse of the hardware resource
+abstractions that are common on different platforms.  To this aim,
+TinyOS 2.0 introduces the concept of *chips*, the self-contained
+abstraction of a given hardware chip: microcontroller, radio-chip,
+flash-chip, etc.  Each chip decomposition follows the *HAA* model,
+providing *HIL* implementation(s) as the topmost component(s).
+Platforms are then built as compositions of different chip components
+with the help of "glue" components that perform the mapping (Fig.3_)
+
+
+.. _Fig.3:
+
+::
+
+
+
+          +----------------------------------------------------+
+          | AppC                                               |
+          | /Application Component/                            |
+          +------+--------------------------------------+------+
+                 |                                      |
+                 |Millisecond Timer                     | Communication
+          +------+------+                     +---------+------+
+          | TimerMilliC |                     | ActiveMessageC |
+          |             |                     |                |
+          | /Platform   |                     | /Platform      |
+          |  Component/ |                     | Component/     |
+          +------+------+                     +---------+------+
+                 |                                      |
+          +------+------+                        +------+------+
+          |             | 32kHz Timer            |             |
+          |             |    +--------------+    |             |
+          | Atmega128   |    | CC2420AlarmC |    | CC2420      |
+          |             +----+              +----+             |
+          | Timer Stack |    | /Platform    |    | Radio Stack |
+          |             |    |  Component/  |    |             |
+          | /Chip       |    +--------------+    | /Chip       |
+          |  Component/ |                        |  Component/ |
+          +-------------+                        +-------------+
+
+
+
+      Fig.3: The CC2420 software depends on a physical and dedicated
+      timer. The micaZ platform code maps this to a specific Atmega128
+      timer.
+
+
+Some of the shared hardware modules are connected to the
+microcontroller using one of the standard bus interfaces: SPI, I2C,
+UART. To share hardware drivers across different platforms the issue
+of the abstraction of the interconnect has to be solved. Clearly,
+greatest portability and reuse would be achieved using a generic bus
+abstraction like in NetBSD [netBSD]_. This model abstracts the
+different bus protocols under one generic bus access scheme.  In this
+way, it separates the abstraction of the chip from the abstraction of
+the interconnect, potentially allowing the same chip abstraction to be
+used with different connection protocols on different platforms.
+However, this generalization comes at high costs in performance. This
+may be affordable for desktop operating systems, but is highly
+sub-optimal for the application specific sensor network platforms.
+
+TinyOS 2.0 takes a less generic approach, providing *HIL*-level,
+microcontroller-independent abstractions of the main bus protocols
+like I2C, SPI, UART and pin-I/O. This distinction enables
+protocol-specific optimizations, for example, the SPI abstraction does
+not have to deal with client addresses, where the I2C abstraction
+does. Furthermore, the programmer can choose to tap directly into the
+chip-specific *HAL*-level component, which could further improve the
+performance by allowing fine tuning using chip-specific configuration
+options.
+
+The TinyOS 2.0 bus abstractions, combined with the ones for low-level
+pin-I/O and pin-interrupts (see [TEP117]_), enable a given chip
+abstraction to be reused on any platform that supports the required
+bus protocol.  The CC2420 radio, for example, can be used both on the
+Telos and on micaZ platforms, because the abstractions of the serial
+modules on the MSP430 and Atmega128 microcontrollers support the
+unified SPI bus abstraction, which is used by the same CC2420 radio
+stack implementation.
+
+Sharing chips across platforms raises the issue of resource contention
+on the bus when multiple chips are connected to it. For example, on
+the micaZ the CC2420 is connected to a dedicated SPI bus, while on the
+Telos platform one SPI bus is shared between the CC2420 radio and the
+flash chip. To dissolve conflicts the resource reservation mechanism
+proposed in [TEP108_] is applied: every chip abstraction that uses a
+bus protocol MUST use the ``Resource`` interface in order to gain
+access to the bus resource. In this way, the chip can be safely used
+both in dedicated scenarios, as well as in situations where multiple
+chips are connected to the same physical bus interconnect.
+
+
+5. CPU abstraction
+==================
+
+In TinyOS most of the variability between the processing units is
+hidden from the OS simply by using a nesC/C based programming language
+with a common compiler suite (GCC). For example, the standard library
+distributed with the compiler creates the necessary start-up code for
+initializing the global variables, the stack pointer and the interrupt
+vector table, shielding the OS from these tasks. To unify things
+further, TinyOS provides common constructs for declaring reentrant and
+non-reentrant interrupt service routines and critical code-sections.
+
+The *HAA* is not currently used to abstract the features of the
+different CPUs. For the currently supported MCUs, the combination of
+the compiler suite support and the low-level I/O is
+sufficient. Nevertheless, if new cores with radically different
+architectures need to be supported by TinyOS in the future, this part
+of the hardware abstraction functionality will have to be explicitly
+addressed.
+
+
+6. HIL alignment
+================
+
+While the *HAA* requires that the *HIL* provides full hardware
+independence (`Strong/Real HILs`_), some abstractions might only
+partially meet this goal (`Weak HILs`_). This section introduces
+several terms describing different degrees of alignment with the
+concept of a *HIL*. It also uses the following differentiation:
+
+- *platform-defined X:* X is defined on all platforms, but the
+  definition may be different
+
+- *platform-specific X:* X is defined on just one platform
+
+
+Strong/Real HILs 
+----------------
+
+*Strong/Real HILs* mean that "code using these abstractions can
+reasonably be expected to behave the same on all implementations".
+This matches the original definition of the *HIL* level according to
+the *HAA*.  Examples include the *HIL* for the Timer (TimerMilliC,
+[TEP102]_), for LEDs (LedsC), active messages (ActiveMessageC,
+[TEP116]_, if not using any radio metadata at least), sensor wrappers
+(DemoSensorC, [TEP109]_) or storage ([TEP103]_). Strong *HILs* may use
+platform-defined types if they also provide operations to manipulate
+them (i.e., they are platform-defined abstract data types), for
+example, the TinyOS 2.x message buffer abstraction, ``message_t``
+([TEP111]_).
+
+Weak HILs
+---------
+
+*Weak HILs* mean that one "can write portable code over these
+abstractions, but any use of them involves platform-specific
+behavior". Although such platform-specific behavior can --at least at
+a rudimentary syntactical level-- be performed by a
+platform-independent application, the semantics require knowledge of
+the particular platform.  For example, the ADC abstraction requires
+platform-specific configuration and the returned data must be
+interpreted in light of this configuration. The ADC configuration is
+exposed on all platforms through the "AdcConfigure" interface that
+takes a platform-defined type (adc_config_t) as a parameter. However,
+the returned ADC data may be processed in a platform-independent way,
+for example, by calculating the max/min or mean of multiple ADC
+readings.
+
+The benefit from weak *HILs* are that one can write portable utility
+code, e.g., a repeated sampling for an ADC on top of the data path.
+While code using these abstractions may not be fully portable, it will
+still be easier to port than code built on top of *HALs*, because weak
+*HILs* involve some guidelines on how to expose some functionality,
+which should help programmers and provide guidance to platform
+developers.
+
+
+Hardware Independent Interfaces (HII)
+--------------------------------------
+
+*Hardware Independent Interfaces (HII)*, is just an interface
+definition intended for use across multiple platforms.
+
+Examples include the SID interfaces, the pin interfaces from [TEP117]_,
+the Alarm/Counter/etc interfaces from [TEP102]_.
+
+
+Utility components
+------------------
+
+*Utility components* are pieces of clearly portable code (typically
+generic components), which aren't exposing a self-contained service.
+Examples include the components in tos/lib/timer and the
+ArbitratedRead* components. These provide and use HIIs.
+
+
+
+6. Conclusion
+====================================================================
+
+The proposed hardware abstraction architecture provides a set of core
+services that eliminate duplicated code and provide a coherent view of
+the system across different platforms. It supports the concurrent use
+of platform-independent and the platform-dependent interfaces in the
+same application. In this way, applications can localize their
+platform dependence to only the places where performance matters,
+while using standard cross-platform hardware interfaces for the
+remainder of the application.
+
+
+Author's Address
+================
+
+| Vlado Handziski (handzisk at tkn.tu-berlin.de) [1]_ 
+| Joseph Polastre (polastre at cs.berkeley.edu) [2]_ 
+| Jan-Hinrich Hauer (hauer at tkn.tu-berlin.de) [1]_
+| Cory Sharp (cssharp at eecs.berkeley.edu) [2]_
+| Adam Wolisz (awo at ieee.org) [1]_
+| David Culler (culler at eecs.berkeley.edu) [2]_
+| David Gay (david.e.gay at intel.com) [3]_
+
+
+.. [1] Technische Universitaet Berlin   
+       Telecommunication Networks Group                    
+       Sekr. FT 5, Einsteinufer 25                        
+       10587 Berlin, Germany           
+
+.. [2] University of California, Berkeley
+       Computer Science Department                
+       Berkeley, CA 94720 USA
+
+.. [3] Intel Research Berkeley
+       2150 Shattuck Ave, Suite 1300
+       CA 94704
+
+Citations
+=========
+
+.. [HAA2005] V. Handziski, J.Polastre, J.H.Hauer, C.Sharp,
+   A.Wolisz and D.Culler, "Flexible Hardware Abstraction for Wireless
+   Sensor Networks", in *Proceedings of the 2nd European Workshop on
+   Wireless Sensor Networks (EWSN 2005)*, Istanbul, Turkey, 2005.
+
+.. [T2_TR] P. Levis, D. Gay, V. Handziski, J.-H.Hauer, B.Greenstein, 
+   M.Turon, J.Hui, K.Klues, C.Sharp, R.Szewczyk, J.Polastre, 
+   P.Buonadonna, L.Nachman, G.Tolle, D.Culler, and A.Wolisz, 
+   "T2: A Second Generation OS For Embedded Sensor Networks", 
+   *Technical Report TKN-05-007*, Telecommunication Networks Group, 
+   Technische Universitaet Berlin, November 2005.
+
+.. [WindowsCE] "The WindowsCE operating system home page", *Online*,
+   http://msdn.microsoft.com/embedded/windowsce
+
+.. [NetBSD] "The NetBSD project home page", *Online*, 
+   http://www.netbsd.org
+
+.. [TEP1] Philip Levis, "TEP structure and key words" 
+   
+.. [TEP101] Jan-Hinrich Hauer, Philip Levis, Vlado Handziski, David Gay
+            "Analog-to-Digital Converters (ADCs)"
+
+.. [TEP102] Cory Sharp, Martin Turon, David Gay, "Timers"
+
+.. [TEP103] David Gay, Jonathan Hui, "Permanent Data Storage (Flash)"
+
+.. [TEP108] Kevin Klues, Philip Levis, David Gay, David Culler, Vlado
+            Handziski, "Resource Arbitration"
+
+.. [TEP109] David Gay, Philip Levis, Wei Hong, Joe Polastre, and Gilman
+            Tolle "Sensors and Sensor Boards"
+
+.. [TEP111] Philip Levis, "message_t"
+
+.. [TEP112] Robert Szewczyk, Philip Levis, Martin Turon, Lama Nachman,
+            Philip Buonadonna, Vlado Handziski, "Microcontroller Power
+            Management"
+
+.. [TEP115] Kevin Klues, Vlado Handziski, Jan-Hinrich Hauer, Philip
+            Levis, "Power Management of Non-Virtualised Devices"
+
+.. [TEP116] Philip Levis, "Packet Protocols"
+
+.. [TEP117] Phil Buonadonna, Jonathan Hui, "Low-Level I/O"
+
diff --git a/doc/txt/tep3.txt b/doc/txt/tep3.txt
new file mode 100644
index 00000000..c6e18e0f
--- /dev/null
+++ b/doc/txt/tep3.txt
@@ -0,0 +1,381 @@
+================================
+Coding Standard
+================================
+
+:TEP: 3
+:Group: TinyOS 2.0 Working Group 
+:Type: Best Current Practice
+:Status: Draft
+:TinyOS-Version: 2.x
+:Author: Ion Yannopoulos, David Gay
+
+:Draft-Created: 31-Dec-2004
+:Draft-Version: $Revision: 1.6 $
+:Draft-Modified: $Date: 2009-12-16 23:28:49 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This document specifies a Best Current Practices for the
+   TinyOS Community, and requests discussion and suggestions for
+   improvements.  Distribution of this memo is unlimited.  This memo
+   is in full compliance with [TEP_1]_.
+
+.. contents::
+.. sectnum::
+
+
+Introduction
+========================================================================
+
+The purpose of a naming convention is twofold:
+  - To avoid collisions which prevent compilation or lead to errors.
+    In TinyOS the most important place to avoid such collisions is in
+    interface and component names.
+  - To enable readers of the code to identify which names are grouped
+    together and which packages they are defined in.
+
+Remember that code that is useful will end up being read far more often
+than it is written.  If you deviate from the suggestions or requirements
+below, be consistent in how you do so.  If you add any new conventions to
+your code, note it in a README.
+
+
+General Conventions
+========================================================================
+
+General
+-------
+
+  - Avoid the use of acronyms and abbreviations that are not well known.
+    Try not to abbreviate "just because".
+  - Acronyms should be capitalized (as in Java), i.e., Adc, not ADC.
+    Exception: 2-letter acronyms should be all caps (e.g., AM for active 
+    messages, not Am)
+  - If you need to abbreviate a word, do so consistently.  Try to be
+    consistent with code outside your own.
+  - All code should be documented using `nesdoc` [nesdoc]_, `Doxygen`
+    [Doxygen]_ or `Javadoc` [Javadoc]_.  Ideally each command, event and
+    function has documentation.  At a bare minimum the interface, component,
+    class or file needs a paragraph of description.
+  - If you write code for a file, add an `@author` tag to the toplevel
+    documentation block.
+
+
+Packages
+========================================================================
+ 
+For the purposes of this document a package is a collection of related
+source and other files, in whatever languages are needed.  A package is
+a logical grouping.  It may or may not correspond to a physical grouping
+such as a single directory.  In TinyOS a package is most often a
+directory with zero or more subdirectories.
+
+nesC and C do not currently provide any package support, thus names
+of types and components in different packages might accidentally 
+clash. To make this less likely, judiciously use prefixes on groups
+of related files (often, but not always, part of a single package). 
+See the examples below.
+
+In a package, we distinguish between public components (intended to
+be used and wired outside the package) and private components (only
+used and wired within the package). This distinction is not enforced
+by nesC.
+
+Directory structure
+-------------------
+
+  - Each package should have it's own directory.  It may have as many
+    subdirectories as are necessary.
+  - The package's directory should match the package's prefix (if it
+    uses one), but in lower-case.
+  - The default packages in a TinyOS distribution are:
+
+    - `tos/system/`.  Core TinyOS components.  This directory's
+       components are the ones necessary for TinyOS to actually run.
+    - `tos/interfaces/`.  Core TinyOS interfaces, including
+       hardware-independent abstractions.  Expected to be heavily
+       used not just by `tos/system` but throughout all other code.
+       `tos/interfaces` should only contain interfaces named in TEPs.
+    - `tos/platforms/`.  Contains code specific to mote platforms, but
+       chip-independent.
+    - `tos/chips/`.  Contains code specific to particular chips and to
+       chips on particular platforms.
+    - `tos/lib/`.  Contains interfaces and components which extend the
+       usefulness of TinyOS but which are not viewed as essential to its
+       operation.  Libraries will likely contain subdirectories.
+    - `apps/`, `apps/demos`, `apps/tests`, `apps/tutorials`.  Contain
+       applications with some division by purpose.  Applications may
+       contain subdirectories.
+  - It is not necessary that packages other than the core break up their
+    components and their interfaces.  The core should allow overrides of
+    components fairly easily however.
+  - Each directory should have a README.txt describing its purpose.
+
+
+Language Conventions
+========================================================================
+
+nesC convention
+---------------
+
+Names
+.....
+
+  - All nesC files must have a `.nc` extension.  The nesC compiler requires
+    that the filename match the interface or component name.
+  - Directory names should be lowercase.
+  - Interface and component names should be mixed case, starting upper
+    case.
+  - All public components should be suffixed with 'C'.
+  - All private components should be suffixed with 'P'.
+  - Avoid interfaces ending in 'C' or 'P'.
+  - If an interface and component are related it is useful if they have
+    the same name except for the suffix of the component.
+  - Commands, events, tasks and functions should be mixed case, starting
+    lower case.
+  - Events which handle the second half of a split-phase operation begun
+    in a command should have names that are related to the commands.
+    Making the command past tense or appending `'Done'` are suggested.
+  - Constants should be all upper case, words separated by underscores.
+    - Use of `#define` for integer constants is discouraged: use `enum`.
+  - Type arguments to generic components and interfaces should use the
+    same case as C types: all lower-case separated by underscores, ending
+    in '_t'.
+  - Module (global) variables should be mixed case, starting lower case.
+
+Packages
+........
+
+  - Each package may use a prefix for its component, interface and
+    global C names. These prefixes may sometimes be common to multiple
+    packages. Examples:
+
+      - All hardware presentation layer names start with Hpl (this is
+        an example of a shared prefix).
+      - Chip-specific hardware abstraction layer components and interfaces
+        start with the chip name, e.g., Atm128 for ATmega128.
+      - The Maté virtual machine uses the Mate to prefix all its names.
+      - Core TinyOS names (e.g., the timer components, the Init interface) 
+        do not use a prefix.
+
+  - Some packages may use multiple prefixes. For instance, the ATmega128
+    chip package uses an Hpl prefix for hardware presentation layer
+    components and Atm128 for hardware abstraction layer components.
+
+Preprocessor
+............
+
+  - Don't use the nesC `includes` statement.  It does not handle macro
+    inclusion properly.  Use `#include` instead.
+  - Macros declared in an `.nc` file must be `#define`'d after the
+    `module` or `configuration` keyword to actually limit their scope to 
+    the module.
+  - Macros which are meant for use in multiple `.nc` files should be
+    `#define`'d in a `#include`'d C header file.
+  - Use of macros should be minimized:
+    `#define` should only be used where `enum` and `inline` do not suffice.
+
+    - Arguments to `unique()` should be `#define` string constants rather
+      than strings.  This minimizes nasty bugs from typos the compiler
+      can't catch.
+
+
+C Convention
+------------
+  - All C files have a .h (header) or (rarely) a .c (source) extension.
+
+    - Filenames associated with a component should have the same name as 
+      the component.
+    - Filenames of a package should have a name with the package
+      prefix (if any).
+
+    - Filenames which are not associated with a component should be lowercase.
+
+  - C does not protect names in any way. If a package uses a prefix, it
+    should also use it for all types, tags, functions, variables, 
+    constants and macros. This leads naturally to:
+
+    - Minimize C code outside of nesC files.  In particular: most uses of
+      hardware specific macros in TinyOS 1.x should be replaced with nesC
+      components in TinyOS 2.x.
+
+  - C type names (define with `typedef`) should be lower case, words
+    separated by underscores and ending in `'_t'`.
+  - C tag names (for `struct`, `union`, or `enum`) should be lower case,
+    words separated by underscores.  Types with tag names should provide
+    a typedef.
+  - C types which represent opaque pointers (for use in parameters) should
+    be named similar to other types but should end in `'_ptr_t'`.
+  - Functions should be lower case, words separated by underscores.
+  - Function macros (`#define` ) should be all upper case, words separated
+    by underscores.
+
+    - Using function macros is discouraged: use `inline` functions.
+
+  - Constants should be all upper case, words separated by underscores.
+    - Use of `#define` for integer constants is discouraged: use `enum`.
+  - Global variables should be mixed case, starting lower case.
+
+
+Java convention
+---------------
+
+  - The standard Java coding convention [Java_Coding_Convention]_
+    should be followed.
+  - All core TinyOS code is in the package `net.tinyos`.
+
+
+Other languages
+---------------
+
+  - No established conventions.
+
+TinyOS Conventions
+========================================================================
+
+TinyOS also follows a number of higher-level programming conventions,
+mostly designed to provide a consistent "look" to TinyOS interfaces and
+components, and to increase software reliability.
+
+Error returns
+-------------
+
+TinyOS defines a standard error return type, ``error_t``, similar to Unix's
+error returns, except that error codes are positive:
+
+::
+
+  enum {
+    SUCCESS        = 0,          
+    FAIL           = 1,
+    ESIZE          = 2, // Parameter passed in was too big.
+    ...
+  };
+
+``SUCCESS`` represents successful execution of an operation, and ``FAIL``
+represents some undescribed failure. Operations can also return more
+descriptive failure results using one of the Exxx constants, see the
+``tos/types/TinyError.h`` file for the current list of errors.
+
+The ``error_t`` type has a combining function to support multiple wiring
+of commands or events retuning ``error_t``, defined as follows:
+
+::
+
+  error_t ecombine(error_t r1, error_t r2) { return r1 == r2 ? r1 : FAIL; }
+
+This function returns ``SUCCESS`` if both error returns are ``SUCCESS``, an
+error code if they both return the same error, and ``FAIL`` otherwise.
+
+Commands that initiate a split-phase operation SHOULD return ``error_t`` if
+the operation may be refused (i.e., the split-phase event may not be
+signaled under some conditions). With such functions, the split-phase event
+will be signaled iff the split-phase command returns ``SUCCESS``.
+
+
+Passing pointers between components
+-----------------------------------
+
+Sharing data across components can easily lead to bugs such as data races,
+overwriting data, etc. To minimise the likelyhood of these occurrences,
+we discourage the use of pointers in TinyOS interfaces.
+
+However, there are circumstances where pointers are necessary for
+efficiency or convenience, for instance when receiving messages, reading
+data from a flash chip, returning multiple results, etc.  Thus we allow the
+use of pointers within interfaces as long as use of those pointers follows
+an "ownership" model: at any time, only one component may refer to the
+object referenced by the pointer. We distinguish two cases:
+
+* Ownership transferred for the duration of a call: in the following command:
+
+  ::
+
+    command void getSomething(uint16_t *value1, uint32_t *value2);
+
+  we are using pointers to return multiple results. The component
+  implementing getSomething MAY read/write ``*value1`` or ``*value2``
+  during the call and MUST NOT access these pointers after getSomething
+  returns.
+
+* Permanent ownership transfer: in the following split-phase interface:
+
+  ::
+
+    interface Send {
+      command void send(message_t *PASS msg);
+      event void sendDone(message_t *PASS msg);
+    }
+
+  components calling send or signaling ``sendDone`` relinquish ownership of
+  the message buffer. For example, take a program where component A uses
+  the ``Send`` interface and B provides it. If A calls ``send`` with a
+  pointer to ``message_t`` *x*, then ownership of *x* passes to B and A
+  MUST NOT access *x* while B MAY access *x*. Later, when B signals the
+  ``sendDone`` event with a pointer to *x* as parameter, ownership of *x*
+  returns to A and A MAY access *x*, while B MUST NOT access *x*.
+
+  If an interface with ``PASS`` parameters has a return type of
+  ``error_t``, then ownership is transferred iff the result is
+  ``SUCCESS``. For instance, in
+
+  ::
+
+    interface ESend {
+      command error_t esend(message_t *PASS msg);
+      event void esendDone(message_t *PASS msg, error_t sendResult);
+    }
+
+  ownership is transferred only if ``esend`` returns ``SUCCESS``, while
+  ownership is always transferred with ``esendDone``. This convention
+  matches the rule for signaling split-phase completion events discussed
+  above.
+
+  ``PASS`` is a do-nothing macro defined as follows:
+
+  ::
+
+    #define PASS
+  
+In the future, some tool may check that programs respect these ownership
+transfer rules.
+
+Usage of wiring annotations
+---------------------------
+
+TinyOS checks constraints on a program's wiring graph specified by
+annotations on a component's interfaces. Wiring constraints are specified
+by placing ``@atmostonce()``, ``@atleastonce()`` and ``@exactlyonce()``
+attributes on the relevant interfaces. For instance, writing
+
+::
+
+  module Fun {
+    provides interface Init @atleastonce();
+  ...
+
+ensures that programs using module ``Fun`` must wire its ``Init`` interface
+at least once.
+
+The ``@atleastonce()`` and ``@exactlyonce()`` annotations SHOULD be used
+sparingly, as they can easily prevent modularising subsystem
+implementations, which is undesirable. However, the ``@atleastonce()``
+annotation SHOULD be used on initialisation interfaces (typically, the
+``Init`` interface) in modules, to prevent the common bug of forgetting to
+wire initialisation code.
+
+
+Citations
+========================================================================
+
+.. [TEP_1] TEP 1
+   <http://www.tinyos.net/working_groups/tinyos-2.0wg/teps/tep-1.html>
+.. [TEP_2] TEP 2
+   <http://www.tinyos.net/working_groups/tinyos-2.0wg/teps/tep-2.html>
+.. [Doxygen] Doxygen <http://www.doxygen.org>
+.. [Java_Coding_Convention] Java Coding Convention
+   <http://java.sun.com/docs/codeconv/html/CodeConvTOC.doc.html>
+.. [JavaDoc] JavaDoc <http://java.sun.com/j2se/javadoc>
+.. [nesdoc] nesdoc <http://www.tinyos.net/tinyos-1.x/doc/nesc/nesdoc.html>
+
diff --git a/doc/txt/tep4.txt b/doc/txt/tep4.txt
new file mode 100644
index 00000000..0d92f35e
--- /dev/null
+++ b/doc/txt/tep4.txt
@@ -0,0 +1,127 @@
+===================================================================
+Active Message ID Allocation for Network Protocols and Applications
+===================================================================
+
+:TEP: 4
+:Group: Network Protocol Working Group 
+:Type: Best Current Practice
+:Status: Final
+:TinyOS-Version: > 2.1
+:Author: Omprakash Gnawali
+
+:Draft-Created: 07-May-2008
+:Draft-Version: $Revision: 1.8 $
+:Draft-Modified: $Date: 2008-11-04 21:00:41 $
+:Draft-Discuss: TinyOS Developer List <tinyos-devel at mail.millennium.berkeley.edu>
+
+.. Note::
+
+   This document specifies a Best Current Practices for the
+   TinyOS Community, and requests discussion and suggestions for
+   improvements.  Distribution of this memo is unlimited.  This memo
+   is in full compliance with [TEP_1]_.
+
+
+1. Introduction
+====================================================================
+
+In order to document the Active Message Type [TEP_116]_, also known as
+Active Message Identifier (AM ID), used by the protocols and to
+prevent AM ID conflicts between applications and protocols distributed
+with TinyOS 2.x, the application and protocol developers MUST use AM
+IDs in the appropriate range. The network protocol implementors MUST
+use AM ID allocated by the Network Protocol Working Group for the
+specific protocol. The application developers MUST use AM IDs from the
+unreserved pool. This TEP describes the process of AM ID allocations
+and deallocations and how the allocations are documented.
+
+2. AM ID pools
+====================================================================
+
+The unreserved pool is in the range 128-255 (0x80-0xFF). The reserved
+pool is in the range 0-127 (0x00-0x7F).
+
+2.1 Unreserved pool (0x80 - 0xFF)
+---------------------------------
+
+When an application uses the AM ID in the range 128-255, it is
+guaranteed to not conflict with AM IDs used by the protocols
+distributed with TinyOS 2.x. These IDs may conflict with the protocols
+in the contrib tree or other applications. No allocation request is
+necessary to use AM IDs in this range.
+
+2.2 Reserved pool (0x00 - 0x7F)
+-------------------------------
+
+When a protocol uses an allocated AM ID in the reserved pool, it is
+guaranteed to not conflict with AM IDs used by applications or other
+protocols that also use an allocated AM ID. The AM ID may conflict
+with the protocols and applications in the contrib tree.
+
+3. Requesting AM ID Allocation
+====================================================================
+
+The Network Protocol Working Group will maintain a list of all the
+allocations in the reserved range.
+
+Developers whose protocols will be included within the ''tos''
+directory MUST receive AM ID allocation from the Network Protocol
+Working Group. This allocation policy applies to software and
+protocols maintained by any working group.
+
+To receive an AM ID allocation, please send an email to the chair of
+Network Protocol Working Group with the following information:
+* Working Group responsible for the protocol
+* Name of the protocol and relevant TEPs
+* Location of the protocol in TinyOS source tree
+* Number of AM IDs requested and description of each ID
+* Specific AM ID request (only if necessary)
+
+Upon receiving this request, the chair of the Network Protocol Working
+Group will allocate the AM ID(s) and document the allocation. If the
+request is made for a specific AM ID, the chair of the Network
+Protocol Work Group will try to accommodate that request.
+
+4. Reclaiming the AM ID Allocation
+====================================================================
+
+When the working group responsible for maintaining the protocol with
+an allocated AM ID obsoletes the protocol, the chair of the working
+group should send a deallocation request to the chair of the Network
+Protocol Working Group. The chair of the Network Protocol Working
+Group will document the deallocation.
+
+5. Documenting allocations and deallocations
+====================================================================
+
+For each TinyOS 2.x release that introduces a new protocol or use of a
+new AM ID, the chair of the Network Protocol Working Group creates a
+new Informational TEP that lists all the AM ID allocations for that
+release. The TEP is finalized at the time of the release. [TEP_135]_
+documents the AM IDs allocated for TinyOS 2.1.
+
+6. Acknowledgments
+====================================================================
+
+Thanks to the TinyOS community at large for helping to formulate this
+ID allocation policy.
+
+7. Author's Address
+====================================================================
+
+| Omprakash Gnawali
+| Ronald Tutor Hall (RTH) 418 
+| 3710 S. McClintock Avenue
+| Los Angeles, CA 90089 
+|
+| phone - +1 213 821-5627
+| email - gnawali@usc.edu
+
+8. Citations
+====================================================================
+
+.. [TEP_1] TEP 1: TEP Structure and Keywords 
+
+.. [TEP_116] TEP 116: Packet Protocols
+
+.. [TEP_135] TEP 135: Active Message ID Allocation in TinyOS 2.1
diff --git a/licenses/INTEL-LICENSE.txt b/licenses/INTEL-LICENSE.txt
new file mode 100644
index 00000000..2ac0257a
--- /dev/null
+++ b/licenses/INTEL-LICENSE.txt
@@ -0,0 +1,28 @@
+Intel Open Source License 
+
+Copyright (c) 2002-2009 Intel Corporation 
+All rights reserved. 
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+	Redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer.
+	Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer in the
+documentation and/or other materials provided with the distribution.
+    Neither the name of the Intel Corporation nor the names of its
+contributors may be used to endorse or promote products derived from
+this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/release-notes.txt b/release-notes.txt
new file mode 100644
index 00000000..4ab631a6
--- /dev/null
+++ b/release-notes.txt
@@ -0,0 +1,75 @@
+These release notes are as of: $Date: 2010-01-20 20:00:48 $
+
+Current:
+  Added support for automatic default LPL interval
+  Added platform-indepdent TOS_SLEEP_NONE for McuPowerOverride
+  Added support for mulle platform
+  Added support for epic platform
+  Added support for shimmer2 platform
+  Added DHV dissemination protocol in lib/net/dhv
+  Added 6lowpan/IP support in lib/net/blip
+  Improved CTP forwarder code to save code and RAM
+  Improved MSP430 sleep code to default to LPM4
+  Improved TOSSIM PRR curve to prevent very low SNR packets
+  Improved Queue performance by changing % to inequality test
+  Improved TOSThreads tutorials and documentation
+  Improved python sdk
+  Refactored AM layer to better support 6lowpan
+  Fixed TOSSIM bug where nodes could receive while transmitting
+  Fixed TOSSIM ack bug for nodes that change their AM id at runtime
+  Fixed Trickle bugs that could cause timers to fire slightly off 
+  Fixed Pool bug that did not allow large (> 127 element) pools
+
+2.1:
+  Added support for iris platform
+  Added support for shimmer platform
+  Added 4-bit link estimator to CTP in lib/net/4bitle
+  Added DIP dissemination protocol in lib/net/dip
+  Added FTSP time synchronization service in lib/ftsp
+  Added TOSThreads library in lib/tosthreads
+  Added SafeTinyOS support with 'safe' make option
+  Added support for 802.15.4 T-Frames through 'tframe' make option
+  Added TKN15.4, a platform-independent 802.15.4-2006 MAC implementation
+  Added low-power application tutorial
+  Added printf tutorial
+  Added TEPs
+  Changed 802.15.4 stacks to use I-Frames by default (TEP 125)
+  Changed Packet interface to better support type checking
+  Changed Receive interface to support fan-in
+  Changed atm128 I2C bus to obey same addressing as MSP430
+  Changed printf implementation to no longer require explicit wiring of PrintfC component
+  Fixed memory leak in CTP on duplicate suppression
+
+2.0.2:
+  Added reimplementation of low-power CC2420 stack to support AUTOACK and SACK
+  Added Deluge and related tools (support for micaZ and telosb only)
+  Added TEPs
+  Added 64-bit support for Java support code
+  Fixed oscillator calibration bug in MSP430 USART
+  Fixed clear channel detection bug in TOSSIM
+  Fixed errors in tutorial text
+  Fixed deadlock in C-based serial forwarder
+  Fixed bugs in at45db and stm25p storage stacks
+
+2.0.1:
+  Added low-power cc2420 stack as default on relevant platforms
+  Added lib/printf (simple serial messages)
+  Added lib/net/lqi (LQI-based collection layer for CC2420 platforms)
+  Added sensorboards/mts300 (mica sensor board)
+  Added noise modeling to TOSSIM (captures temporal correlation)
+  Added TEPs
+  Added tutorials
+  Changes to Resource management interfaces and components
+  Change to atmega128 ADC: output is no longer left-justified
+  Fixed cancellation bug in active message layers (no sendDone)
+  Fixed errors in tutorial text
+  Fixed interface errors in dissemination
+  Fixed lockup bug in atmega128 streaming reads
+  Fixed lockup bug in atmega128 SPI stack (0-length writes)
+  Fixed lockup bug in atmega128 I2C stack (power management)
+  Fixed memory access bugs in serial stack and AM queue (from John Regehr)
+  Fixed TMote sleep power consumption for newest RHoS nodes
+  New atmega128 timer stack fixes mica-family timer problems
+  Numerous optimizations and performance improvements
+  Numerous additional bug fixes
+
diff --git a/support/make/.cvsignore b/support/make/.cvsignore
new file mode 100644
index 00000000..4fee151f
--- /dev/null
+++ b/support/make/.cvsignore
@@ -0,0 +1 @@
+Makelocal
diff --git a/support/make/Makedefaults b/support/make/Makedefaults
new file mode 100644
index 00000000..a44caa5f
--- /dev/null
+++ b/support/make/Makedefaults
@@ -0,0 +1,24 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: Makedefaults,v 1.8 2008-06-18 20:22:51 razvanm Exp $
+
+DEFAULT_LOCAL_GROUP ?= 0x22
+OPTFLAGS ?= -Os
+NESC_FLAGS ?= -Wnesc-all
+GOALS += ident_flags tos_image tosboot
+
+define DEFAULT_HELP
+
+ Welcome to the TinyOS make system!
+
+ You must specify one of the valid targets and possibly some combination of
+ the extra options.  Many targets have custom extras and extended help, so be
+ sure to try "make <target> help" to learn of all the available features.
+
+ Global extras:
+
+   docs    : compile additional nescdoc documentation
+   tinysec : compile with TinySec secure communication
+
+endef
+HELP += $(DEFAULT_HELP)
+
diff --git a/support/make/Makefile b/support/make/Makefile
new file mode 100644
index 00000000..9f6a61f2
--- /dev/null
+++ b/support/make/Makefile
@@ -0,0 +1 @@
+include Makerules
diff --git a/support/make/Makerules b/support/make/Makerules
new file mode 100644
index 00000000..5992ca9f
--- /dev/null
+++ b/support/make/Makerules
@@ -0,0 +1,205 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: Makerules,v 1.6 2008/09/26 20:13:58 klueska Exp $
+
+# @author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+### --- This makefile requires GNU Make version 3.80 or newer.
+
+
+### ---
+### --- Prepare variables
+### ---
+
+#  Get TOSDIR from ncc if it isn't set already.
+ifndef TOSDIR
+TOSDIR := $(shell ncc -print-tosdir)
+endif
+
+#  Mung MAKERULES for Cygwin; see the warning below for more details.
+ifneq ($(findstring \,$(MAKERULES)),)
+MAKERULES := $(subst \,/,$(MAKERULES))
+define BACKSLASH_WARNING
+warning, MAKERULES contains backslashes.
+
+    The environment variable MAKERULES contains backslashes \'s.  This can
+    cause shell scripts including ones in this make system to fail in
+    strange ways.  I've changed those to forward slashes for you for this
+    build.  However, you are strongly encouraged to respecify MAKERULES as
+    either a standard unix-style path or as a mixed-style path where the
+    backslashes are replaced with forward slashes /'s.
+
+endef
+$(warning $(BACKSLASH_WARNING))
+endif
+
+#  Deduce TINYOS_MAKE_PATH, the path to this file, if it's not defined already.
+ifndef TINYOS_MAKE_PATH
+  ifdef MAKERULES
+    TINYOS_MAKE_PATH := $(dir $(MAKERULES))
+    TINYOS_MAKE_PATH := $(TINYOS_MAKE_PATH:%/=%)
+  else
+    TINYOS_MAKE_PATH := $(TOSDIR)/../support/make
+  endif
+endif
+
+#  Use a default Makelocal if it's not defined already.
+TINYOS_MAKELOCAL ?= $(TINYOS_MAKE_PATH)/Makelocal
+
+#  Use a default Makedefaults if it's not defined already.
+TINYOS_MAKEDEFAULTS ?= $(TINYOS_MAKE_PATH)/Makedefaults
+
+#  Allow users to specify additional directories to find TOSMake files.
+TOSMAKE_PATH += $(TINYOS_MAKE_PATH)
+
+#  Save makecmdgoals (a read only var) to goals so that we can modify it.
+GOALS += $(MAKECMDGOALS)
+
+#  Extract user options from goals of the form opt,arg, transform to opt=arg,
+#  and evaluate.  Then, reduce GOALS to have the args removed.
+OptRE := [,.]
+GoalOpts := $(shell perl -e 'print join " ", map {s{^(.*?)$(OptRE)}{\U$$1=};$$_} grep /$(OptRE)/, split /\s+/, "$(GOALS)";')
+GOALS := $(shell perl -e '$$_="$(GOALS)"; s{$(OptRE)\S*}{}g; print;')
+$(foreach opt,$(GoalOpts),$(eval $(opt)))
+
+
+### ---
+### --- Define make functions.
+### --- (Lord, this is ugly. I want a real scripting language so bad.)
+### ---
+### --- The functions a user will generally be interested in are
+### ---   TOSMake_include(file)
+### ---   TOSMake_include_platform(dir)
+### ---
+
+#  names(words)
+#    Produce option names, like junk from /path/to/junk.target.
+names = $(sort $(basename $(notdir $(1))))
+
+#  TOSMake_find(file_or_dir)
+#    Search for file_or_dir within TOSMAKE_PATH.  For the special case of
+#    initializing TOSMAKE_PATH itself, this function does not search 
+#    TOSMAKE_PATH if file_or_dir begins with +.
+sh_search = for a in $(TOSMAKE_PATH); do [ -e "$$a/$$n" ] && echo "$$a/$$n" && break; done
+TOSMake_find = $(if $(filter +%,$(1)),$(1:+%=%),$(shell n="$(1)"; $(sh_search)))
+
+#  TOSMake_makelist(dir,extension)
+#    Get a list of files with the given extension from a directory which MUST
+#    be a subdir under TOSMAKE_PATH.
+TOSMake_makelist = $(wildcard $(call TOSMake_find,$(1))/*.$(2))
+
+#  TOSMake_include(file)
+#    Include a makefile which MUST be in a dir or subdir under TOSMAKE_PATH.
+TOSMake_include = $(eval include $(call TOSMake_find,$(1)))
+
+#  TOSMake_extra_targets(name)
+#    Create a default make targets for a TOSMake extra full with its possible
+#    options afterward.
+define TOSMake_extra_targets
+$(subst :,%,$(1)): FORCE
+	@:
+endef
+
+#  TOSMake_include_dir(dir)
+#    Pull in .extras and .targets from a directory which MUST be a subdir
+#    under TOSMAKE_PATH.  Create default extra rules as necessary, etc.
+TOSMake_include_dir = $(eval $(call TOSMake_include_dir_define,$(1)))
+define TOSMake_include_dir_define
+$(eval NEW_EXTRAS := $(call TOSMake_makelist,$(1),extra))
+$(eval NEW_TARGETS := $(call TOSMake_makelist,$(1),target))
+$(eval VALID_EXTRAS += $(NEW_EXTRAS))
+$(eval VALID_TARGETS += $(NEW_TARGETS))
+$(eval EXTRAS = $(filter $(call names,$(VALID_EXTRAS)),$(GOALS)))
+$(eval TARGETS = $(filter $(call names,$(VALID_TARGETS)),$(GOALS)))
+$(eval OTHERS = $(filter-out $(EXTRAS) $(TARGETS),$(GOALS)))
+$(foreach file,$(NEW_EXTRAS) $(NEW_TARGETS),$(if $(filter $(call names,$(file)),$(GOALS)),$(eval include $(file))))
+endef
+
+TOSMake_accum_dir = $(eval $(call TOSMake_accum_dir_define,$(1)))
+define TOSMake_accum_dir_define
+$(eval NEW_EXTRAS := $(call TOSMake_makelist,$(1),extra))
+$(eval NEW_TARGETS := $(call TOSMake_makelist,$(1),target))
+$(eval VALID_EXTRAS += $(NEW_EXTRAS))
+$(eval VALID_TARGETS += $(NEW_TARGETS))
+$(eval TARGETS = $(filter $(call names,$(VALID_TARGETS)),$(GOALS)))
+endef
+
+#  TOSMake_include_platform(dir)
+#    Pull in a directory as a new TOSMake platform, which MUST be a subdir of
+#    TOSMAKE_PATH.  A platform directory must also have a .rules file, which
+#    is automatically evaluated.
+TOSMake_include_platform=$(eval $(call TOSMake_include_platform_define,$(1)))
+define TOSMake_include_platform_define
+$(call TOSMake_include_dir,$(1))
+$(call TOSMake_include,$(1)/$(1).rules)
+endef
+
+
+### ---
+### --- Include Makelocal and Makedefaults
+### ---
+
+#  Makelocal comes first to allow overriding Makedefaults.
+-include $(TINYOS_MAKELOCAL)
+-include $(TINYOS_MAKEDEFAULTS)
+
+PLATFORMDIR ?= $(TOSDIR)/platforms/$(PLATFORM)
+
+#  Mark TOSMAKE_PATH with a + so that they're not searched for by TOSMake_find.
+$(foreach incdir,$(addprefix +,$(TOSMAKE_PATH)),$(call TOSMake_accum_dir,$(incdir)))
+
+$(foreach file,$(VALID_EXTRAS),$(if $(filter $(call names,$(file)),$(GOALS)),$(eval include $(file))))
+$(foreach file,$(VALID_TARGETS),$(if $(filter $(call names,$(file)),$(GOALS)),$(eval include $(file))))
+
+#  Make default rules for each extra with full argument
+$(foreach goal,$(MAKECMDGOALS),$(if $(filter-out $(TARGETS) help,$(goal)),$(eval $(call TOSMake_extra_targets,$(goal)))))
+
+
+### ---
+### --- Define USAGE, print help if necessary or requested, etc.
+### ---
+
+#  USAGE is printed out when help is requested.  Files other than this should
+#  add text to HELP, not USAGE.
+define USAGE
+
+
+Usage:  make <target> <extras>
+        make <target> help
+
+        Valid targets: $(call names,$(VALID_TARGETS))
+        Valid extras: $(call names,$(VALID_EXTRAS))
+$(HELP)
+
+endef
+
+#  If no target or an invalid target is specified, print usage.
+ifeq ($(TARGETS),)
+  ifeq ($(GOALS),)
+    $(error $(USAGE)Please specify a valid target)
+  else
+    $(error $(USAGE)ERROR, "$(GOALS)" does not specify a valid target)
+  endif
+endif
+
+#  If the user specifically had help on the command line, don't build any
+#  targets, instead display help information and exit with a nice error.
+ifeq ($(filter help,$(GOALS)),help)
+define USAGE
+
+
+Usage:  make $(TARGETS) <extras>
+
+	Valid targets: $(call names,$(VALID_TARGETS))
+        Valid extras: $(call names,$(VALID_EXTRAS))
+$(HELP)
+
+endef
+$(error $(USAGE)Thank you)
+endif
+
+$(COMPONENT).nc:
+	@echo "ERROR: You need to create a top level file called $(COMPONENT).nc, or modify your local Makefile to point to the real name of your top level component."
+	@false
+
+.PHONY: FORCE
+
diff --git a/support/make/README b/support/make/README
new file mode 100644
index 00000000..b67793e9
--- /dev/null
+++ b/support/make/README
@@ -0,0 +1,110 @@
+README for the TinyOS Make System
+created on 7 Jan 2004
+written by Cory Sharp <cssharp@eecs.berkeley.edu>
+
+updated on 16 Apr 2004 by Cory Sharp
+To describe new TOSMAKE_INCLUDE variable for user make subdirectories.
+
+
+$Id: README,v 1.4 2006-12-12 18:22:55 vlahan Exp $
+
+
+----------------------------------------------------------------------------
+Introduction
+----------------------------------------------------------------------------
+
+This is a new make system.  It's nicer than the old apps/Makerules,
+especially for adding new targets and platforms.  Basically, new features
+can be added without getting in the way of existing make platforms and
+rules.
+
+
+----------------------------------------------------------------------------
+Quick Start
+----------------------------------------------------------------------------
+
+To use this build system, GNU Make 3.80 or greater is required; check with
+"make --version".  Then, set MAKERULES, find an application, and try make
+
+export MAKERULES=`ncc -print-tosdir`/../tools/make/Makerules
+cd `ncc -print-tosdir`/../apps/Blink  #or any app dir
+make telos help
+
+The end of this document has a few notes on some issues that can arise with
+GNU Make 3.80.
+
+----------------------------------------------------------------------------
+Directory Structure and Naming Conventions
+----------------------------------------------------------------------------
+
+The root of the make system is the make/ directory in which this README is
+located.  You'll find two main types of files with the extensions .target
+and .extra.  Both types of files define valid make goals.  A target file
+must define a valid make target of the same name.  An extra file
+automatically has a dummy target created for it, making it useful for
+defining extra make variables given a particular goal on the command line.
+
+There are also subdirectories in make/, such as make/avr/ and make/hc08/.
+Files in these directories are not exposed to the current build unless
+imported from another goal.  For instance, the mica2 target imports the avr/
+directory with the command "$(call TOSMake_include_platform,avr)", which
+further exposes the target and extra files in the avr subdirectory as valid
+goals for the current build.  The TOSMake_include_platform function expects
+to find a .rules file of the same name as the directory, such as
+avr/avr.rules.
+
+It is expected that the primary build behavior occurs in a
+platform/platform.rules file (such as avr/avr.rules).  Further target and
+extra goals in that platform make directory should augment the behavior of
+the rules file.  Then, platform build targets are globally exposed by
+creating a simple .target file in the make/ root.  Overall, this structure
+gives a lot of opportunity to change the behavior of a build given goals on
+the command line with few or no ifdef's in the makefiles.  And, each make
+behavior is localized to a single file, which I think should be pretty nice.
+
+There's also a make/Makerules file.  Do not edit make/Makerules.  No new
+build features should ever be exposed via make/Makerules, but rather though
+the .rules, .target, and .extra files.  Let me repeat, do not edit
+make/Makerules, add new features elsewhere.  make/Makerules is the frontend
+that defines the structure and behavior on those special file extensions.
+
+
+----------------------------------------------------------------------------
+User make/ directories
+----------------------------------------------------------------------------
+
+I've added a new variable TOSMAKE_PATH that allows you to define additional
+root directories for the TinyOS Make System that behave just like the 
+primary make/ directory.  In one of your own make files, just add one or
+more directories to TOSMAKE_PATH sometime before make/Makerules is included:
+
+    TOSMAKE_PATH += $(TOSDIR)/../contrib/eyes/make
+
+That's all you need, and you're in business.  Enjoy.
+
+
+----------------------------------------------------------------------------
+make 3.80
+----------------------------------------------------------------------------
+
+The standard version of GNU Make 3.80 (based on October 2002 source) has
+a bug which this make system can trigger. If a make variable is longer than
+200 bytes (characters), then make will report that it has run out of
+virtual memory and exit. This can happen if, for example, your application
+depends on a lot of Java/mig message classes, which are BUILD_EXTRA_DEPS.
+
+The only way to fix this problem is to use a newer, patched version of
+make 3.80. All TinyOS releases after 1.1.8 should have a patched
+version, and will work properly. Pre-1.1.7 versions, however, may run
+into this problem; you can either upgrade to >= 1.1.8, or download the
+make source, apply the patch 'eval-crash.diff' in this directory, and
+compile then install the patched version.
+
+----------------------------------------------------------------------------
+Go go go
+----------------------------------------------------------------------------
+
+... okay, hopefully that's enough head's up that you can poke around this
+directory tree and add new targets, extras, and platforms.  Good luck, and
+holler if you want more documentation.
+
diff --git a/support/make/all.target b/support/make/all.target
new file mode 100644
index 00000000..27438d5f
--- /dev/null
+++ b/support/make/all.target
@@ -0,0 +1,8 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: all.target,v 1.4 2006-12-12 18:22:55 vlahan Exp $
+
+PLATFORMS ?= mica mica2 mica2dot telos micaz pc
+
+all: FORCE
+	for target in $(filter-out $(INVALID_PLATFORMS),$(PLATFORMS)); do cmd="make $$target"; echo ".... $$cmd"; $$cmd; done
+
diff --git a/support/make/appdoc.extra b/support/make/appdoc.extra
new file mode 100644
index 00000000..00d72a24
--- /dev/null
+++ b/support/make/appdoc.extra
@@ -0,0 +1,21 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: appdoc.extra,v 1.2 2008-05-02 20:49:44 idgay Exp $
+
+# configure the base for the app dirs.  This is used to generate more
+# useful package names in the documentation.
+ifeq ($(BASEDIR)_x, _x)
+BASEDIR := $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' )
+endif
+
+BUILD_DEPS = appdoc_
+
+ifeq ($(filter quiet,$(APPDOC)),quiet)
+QUIET = -quiet
+endif
+
+appdoc_: FORCE
+	@echo "    Making application documentation for $(COMPONENT) on $(PLATFORM)"
+        # first generate the xml files
+	nesdoc -o build $(NESDOC_FLAGS) $(PFLAGS) $(CFLAGS) $(COMPONENT).nc -app $(QUIET)
+        # generate html from the xml files
+	nesdoc -o build -html -target=$(PLATFORM) $(QUIET)
diff --git a/support/make/avr/avr-studio-debug.extra b/support/make/avr/avr-studio-debug.extra
new file mode 100644
index 00000000..bd165b96
--- /dev/null
+++ b/support/make/avr/avr-studio-debug.extra
@@ -0,0 +1,23 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: avr-studio-debug.extra,v 1.2 2009-01-21 16:26:55 sallai Exp $
+
+BUILD_DEPS = srec tosimage bytes $(POST_BUILD_EXTRA_DEPS) buildelf
+APPC_WINPATH = $(BUILDDIR)/app-winpath.c
+MAIN_ELF = $(BUILDDIR)/main.elf
+
+# no inlining or optimizations
+OPTFLAGS += -O0 -fnesc-no-inline
+
+# produce dwarf-2 debug information for AVR Studio
+OPTFLAGS += -gdwarf-2
+
+# we use ncc to invoke gcc thus need to allow dollars in identifiers
+#OPTFLAGS += -fdollars-in-identifiers
+
+# alternatively, we can use a different separator
+PFLAGS += -fnesc-separator=__
+
+buildelf: FORCE
+	@echo "    building ELF output $(MAIN_ELF) for debugging in AVR Studio"
+	@perl -pe 's/#(.*)\"(.*)\"/ "#$$1\"".`cygpath -ma $$2`."\""/e; s/\n\"/\"/;' $(BUILDDIR)/app.c > $(APPC_WINPATH)
+	@$(NCC) -o $(MAIN_ELF) $(NCC_SAFE_TINYOS_FLAGS) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(APPC_WINPATH) $(LIBS) $(LDFLAGS)
diff --git a/support/make/avr/avr.rules b/support/make/avr/avr.rules
new file mode 100644
index 00000000..fb7faeab
--- /dev/null
+++ b/support/make/avr/avr.rules
@@ -0,0 +1,161 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: avr.rules,v 1.29 2010-03-17 00:38:04 klueska Exp $
+
+define AVR_HELP
+
+ AVR extras:
+
+   debug    : compile with minimal optimization and debug symbols
+   debugopt : compile with debug symbols
+
+ Programmer options:
+
+   dapa         : (default) use parallel port programmer
+   mib510,<dev> : use MIB510/MIB520 serial port programming board at port <dev>
+   eprb,<host>	: use EPRB (MIB600) at hostname <host>
+   avrisp,<dev> : use AVRISP serial programmer at port <dev>
+
+   The dev or host parameter for the programmer option need not be specified,
+   in which case it is expected to be defined as in an environment variable of
+   the same name in all caps (such as MIB510, EPRB, or AVRISP).
+
+endef
+HELP += $(AVR_HELP)
+
+ifdef MAKE_DEPUTY_FLAG
+        NCC_SAFE_TINYOS_FLAGS = -DSAFE_TINYOS -I$(TOSDIR)/lib/safe -fnesc-deputy -fnesc-deputy-args='-I$(TOSDIR)/lib/safe/include --FLIDs=build/$(PLATFORM)/flids.txt --envmachine -DSAFE_TINYOS --nolib '
+else
+        NCC_SAFE_TINYOS_FLAGS =
+endif
+
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+SET_ID = tos-set-symbols
+PROGRAMMER ?= uisp
+NCC = ncc
+LIBS = -lm
+
+# Use __ as the separator - requires nesC 1.2.9 or later
+ifneq ($(filter sim,$(GOALS)),sim)
+ifneq ($(filter sim-sf,$(GOALS)),sim-sf)
+	PFLAGS += -fnesc-separator=__
+endif
+endif
+AMADDR = ActiveMessageAddressC__addr
+BUILDDIR ?= build/$(PLATFORM)
+MAIN_EXE = $(BUILDDIR)/main.exe
+MAIN_SREC = $(BUILDDIR)/main.srec
+MAIN_IHEX = $(BUILDDIR)/main.ihex
+INSTALL_SREC = $(MAIN_SREC).out$(if $(NODEID),-$(NODEID),)
+VOLUMEFILE ?= volumes-at45db.xml
+VOLUME_ALLOCATOR ?= tos-storage-at45db
+VOLUME_ALLOCATOR_FLAGS ?=
+
+PFLAGS += -Wall -Wshadow $(NESC_FLAGS)
+PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c -board=$(SENSORBOARD)
+ifdef MSG_SIZE
+PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE)
+endif
+ifdef DEFAULT_LOCAL_GROUP
+PFLAGS += -DDEFINED_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP)
+endif
+
+AVRGCCMAJOR = $(shell avr-gcc -v 2>&1 | grep "gcc version" | sed -n 's/gcc version \([2-5]\)\.\([0-9]\)\.\([0-9]\).*/\1/p')
+ifeq ($(AVRGCCMAJOR),4)
+  PFLAGS += --param max-inline-insns-single=100000
+else
+  PFLAGS += -finline-limit=100000
+endif
+
+ifeq ($(PROGRAMMER),avrdude)
+  ifeq ($(findstring Darwin, $(shell uname)), Darwin)
+    AVRDUDE_CONF ?= /opt/local/etc/avrdude.conf
+  endif
+  AVRDUDE_CONF ?= /etc/avrdude/avrdude.conf
+  ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin)
+    AVRDUDE_CONF := $(shell cygpath -ms $(AVRDUDE_CONF))
+  endif
+  PROGRAMMER_EXTRA_FLAGS += -C$(AVRDUDE_CONF)
+#  PROGRAMMER_EXTRA_FLAGS += -v -v
+endif
+
+ifdef DEFAULT_PROGRAM_AVR
+DEFAULT_PROGRAM = $(DEFAULT_PROGRAM_AVR)
+endif
+DEFAULT_PROGRAM ?= dapa
+
+
+
+BUILDLESS_DEPS += bytes 
+
+ifndef NOWIRING
+include $(TINYOS_MAKE_PATH)/wiring.extra
+endif
+
+# Use the 'if' function instead of the 'ifdef' construct because ifdef freaks
+# out with call in there.  I don't know why.
+$(if $(PROGRAM),,$(call TOSMake_include,avr/$(DEFAULT_PROGRAM).extra))
+
+# Build storage file if volumes.xml present
+ifneq ($(wildcard $(VOLUMEFILE)), )
+build_storage: $(BUILDDIR)/StorageVolumes.h
+
+exe0: build_storage 
+
+VOLUME_ALLOCATOR_FLAGS ?= 
+$(BUILDDIR)/StorageVolumes.h: $(VOLUMEFILE)
+	$(VOLUME_ALLOCATOR) $(VOLUME_ALLOCATOR_FLAGS) $(PLATFORMDIR) <$(VOLUMEFILE) >$@ || rm -f $@
+
+PFLAGS += -I$(BUILDDIR)
+else
+
+build_storage:
+
+endif
+
+ifndef BUILD_DEPS
+  ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),)
+    BUILD_DEPS = srec tosimage bytes $(POST_BUILD_EXTRA_DEPS)
+  endif
+endif
+
+setid: FORCE
+	@cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd cp $(MAIN_SREC) $(INSTALL_SREC); else cmd $(SET_ID) $(MAIN_SREC) $(INSTALL_SREC) TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID) ; fi
+
+delsetid: FORCE
+	rm -f $(subst .srec.,.exe.,$(INSTALL_SREC)) $(INSTALL_SREC) 
+
+srec: exe FORCE
+	$(OBJCOPY) --output-target=srec $(MAIN_EXE) $(MAIN_SREC)
+
+tos_buildinfo: ihex build_buildinfo FORCE
+  @:
+  
+tosimage: ihex build_tosimage FORCE
+	@:
+
+ihex: exe FORCE
+	$(OBJCOPY) --output-target=ihex $(MAIN_EXE) $(MAIN_IHEX)
+
+exe: exe0 bytes FORCE
+	@:
+
+exe0: builddir $(BUILD_EXTRA_DEPS) $(COMPONENT).nc FORCE
+	@echo "    compiling $(COMPONENT) to a $(PLATFORM) binary"
+	$(NCC) -o $(MAIN_EXE) $(NCC_SAFE_TINYOS_FLAGS) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS)
+ifdef WIRING_CHECK_FILE
+	@nescc-wiring $(WIRING_CHECK_FILE)
+endif
+ifdef STACK_CHECK
+	@echo
+	@-tos-ramsize $(PLATFORM) $(MAIN_EXE)
+	@echo
+endif
+	@echo "    compiled $(COMPONENT) to $(MAIN_EXE)"
+
+builddir: FORCE
+	mkdir -p $(BUILDDIR)
+
+bytes: FORCE
+	@$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }'
+
diff --git a/support/make/avr/avrisp.extra b/support/make/avr/avrisp.extra
new file mode 100644
index 00000000..190de886
--- /dev/null
+++ b/support/make/avr/avrisp.extra
@@ -0,0 +1,33 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: avrisp.extra,v 1.8 2008-09-22 15:41:35 sallai Exp $
+
+ifeq ($(AVRISP),)
+$(error AVRISP must be defined, try "make $(TARGETS) help")
+endif
+
+PROGRAM = avrisp
+
+ifeq ($(PROGRAMMER),avrdude)
+    ifdef BOOTLOADER_IMG
+      ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin)
+        BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG))
+      endif
+    endif
+    PROGRAMMER_FLAGS = -cstk500 -P$(AVRISP) -U hfuse:w:$(AVR_FUSE_H):m $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_AVRISP)
+    PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a
+    PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -V -D -U flash:w:$(BOOTLOADER_IMG):a
+endif
+
+ifeq ($(PROGRAMMER),uisp)
+    PROGRAMMER_FLAGS = -dprog=stk500 -dserial=$(AVRISP) --wr_fuse_h=$(AVR_FUSE_H) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_AVRISP)
+    PROGRAMMER_INSTALL_SREC_FLAGS = --erase --upload if=$(INSTALL_SREC) --verify
+    PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = --upload if=$(BOOTLOADER_IMG) --verify
+endif
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using avrisp"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS)
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader using avrisp"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_BOOTLOADER_FLAGS)
diff --git a/support/make/avr/avrispmkii.extra b/support/make/avr/avrispmkii.extra
new file mode 100644
index 00000000..3cb3c5db
--- /dev/null
+++ b/support/make/avr/avrispmkii.extra
@@ -0,0 +1,31 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: avrispmkii.extra,v 1.1 2008-09-23 15:47:56 sallai Exp $
+
+ifeq ($(AVRISPMKII),)
+$(error AVRISPMKII must be defined, try "make $(TARGETS) help")
+endif
+
+PROGRAM = avrispmkii
+
+ifeq ($(PROGRAMMER),avrdude)
+    ifdef BOOTLOADER_IMG
+      ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin)
+        BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG))
+      endif
+    endif
+    PROGRAMMER_FLAGS = -cavrispmkII -P$(AVRISPMKII) -U hfuse:w:$(AVR_FUSE_H):m $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_AVRISPMKII)
+    PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a
+    PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -V -D -U flash:w:$(BOOTLOADER_IMG):a
+endif
+
+ifeq ($(PROGRAMMER),uisp)
+    $(error uisp is not supported, please use avrdude")
+endif
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using avrispmkii"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS)
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader using avrispmkii"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_BOOTLOADER_FLAGS)
diff --git a/support/make/avr/dapa.extra b/support/make/avr/dapa.extra
new file mode 100644
index 00000000..3607c15d
--- /dev/null
+++ b/support/make/avr/dapa.extra
@@ -0,0 +1,33 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: dapa.extra,v 1.7 2008-06-18 20:22:51 razvanm Exp $
+
+
+
+
+
+PROGRAM = dapa
+
+ifeq ($(PROGRAMMER),avrdude)
+    ifdef BOOTLOADER_IMG
+      ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin)
+        BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG))
+      endif
+    endif
+    PROGRAMMER_FLAGS = -cdapa               -U hfuse:w:$(AVR_FUSE_H):m $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_MIB)
+    PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a
+    PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -V -D -U flash:w:$(BOOTLOADER_IMG):a
+endif
+
+ifeq ($(PROGRAMMER),uisp)
+    PROGRAMMER_FLAGS = -dprog=dapa                      --wr_fuse_h=$(AVR_FUSE_H) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_MIB)
+    PROGRAMMER_INSTALL_SREC_FLAGS = --erase --upload if=$(INSTALL_SREC) --verify
+    PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = --upload if=$(BOOTLOADER_IMG) --verify
+endif
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using dapa"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS)
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader using dapa"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_BOOTLOADER_FLAGS)
diff --git a/support/make/avr/debug.extra b/support/make/avr/debug.extra
new file mode 100644
index 00000000..b1c4d495
--- /dev/null
+++ b/support/make/avr/debug.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $
+
+OPTFLAGS += -O1 -g -fnesc-no-inline
+
diff --git a/support/make/avr/debugopt.extra b/support/make/avr/debugopt.extra
new file mode 100644
index 00000000..5d0286c7
--- /dev/null
+++ b/support/make/avr/debugopt.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: debugopt.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $
+
+OPTFLAGS += -g
+
diff --git a/support/make/avr/eprb.extra b/support/make/avr/eprb.extra
new file mode 100644
index 00000000..9cb5a0dd
--- /dev/null
+++ b/support/make/avr/eprb.extra
@@ -0,0 +1,33 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: eprb.extra,v 1.10 2008-09-22 20:56:36 idgay Exp $
+
+ifeq ($(EPRB),)
+$(error EPRB must be defined, try "make $(TARGETS) help")
+endif
+
+PROGRAM = eprb
+
+ifeq ($(PROGRAMMER),avrdude)
+    ifdef BOOTLOADER_IMG
+      ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin)
+        BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG))
+      endif
+    endif
+    PROGRAMMER_FLAGS = -cmib510 -Pnet:$(EPRB):10001    -U hfuse:w:$(AVR_FUSE_H):m $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_STK)
+    PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a
+    PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -V -D -U flash:w:$(BOOTLOADER_IMG):a
+endif
+
+ifeq ($(PROGRAMMER),uisp)
+    PROGRAMMER_FLAGS = -dprog=stk500 -dhost=$(EPRB)     --wr_fuse_h=$(AVR_FUSE_H) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_STK)
+    PROGRAMMER_INSTALL_SREC_FLAGS = --erase --upload if=$(INSTALL_SREC) --verify
+    PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = --upload if=$(BOOTLOADER_IMG) --verify
+endif
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using eprb"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS)
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader using eprb"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_BOOTLOADER_FLAGS)
diff --git a/support/make/avr/install.extra b/support/make/avr/install.extra
new file mode 100644
index 00000000..59952d50
--- /dev/null
+++ b/support/make/avr/install.extra
@@ -0,0 +1,11 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: install.extra,v 1.5 2008-06-18 20:22:51 razvanm Exp $
+
+NODEID = $(INSTALL)
+BUILD_DEPS = srec tosimage bytes $(POST_BUILD_EXTRA_DEPS) setid program delsetid
+
+ifdef BOOTLOADER
+  ifeq ($(BOOTLOADER),tosboot)
+    BUILD_DEPS += program_bl
+  endif
+endif
diff --git a/support/make/avr/mib510.extra b/support/make/avr/mib510.extra
new file mode 100644
index 00000000..c68890a4
--- /dev/null
+++ b/support/make/avr/mib510.extra
@@ -0,0 +1,36 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: mib510.extra,v 1.9 2009-02-04 19:38:30 sallai Exp $
+
+ifeq ($(MIB510),)
+$(error MIB510 must be defined, try "make $(TARGETS) help")
+endif
+
+PROGRAM = mib510
+
+ifeq ($(PROGRAMMER),avrdude)
+    ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin)
+      MIB510 := '\\.\$(MIB510)'
+    endif
+    ifdef BOOTLOADER_IMG
+      ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin)
+        BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG))
+      endif
+    endif
+    PROGRAMMER_FLAGS = -cmib510 -P$(MIB510) -U hfuse:w:$(AVR_FUSE_H):m $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_MIB)
+    PROGRAMMER_INSTALL_SREC_FLAGS = -U flash:w:$(INSTALL_SREC):a
+    PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = -V -D -U flash:w:$(BOOTLOADER_IMG):a
+endif
+
+ifeq ($(PROGRAMMER),uisp)
+    PROGRAMMER_FLAGS = -dprog=mib510 -dserial=$(MIB510) --wr_fuse_h=$(AVR_FUSE_H) $(PROGRAMMER_PART) $(PROGRAMMER_EXTRA_FLAGS) $(PROGRAMMER_EXTRA_FLAGS_MIB)
+    PROGRAMMER_INSTALL_SREC_FLAGS = --erase --upload if=$(INSTALL_SREC) --verify
+    PROGRAMMER_INSTALL_BOOTLOADER_FLAGS = --upload if=$(BOOTLOADER_IMG) --verify
+endif
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using mib510"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_SREC_FLAGS)
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader using mib510"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) $(PROGRAMMER_INSTALL_BOOTLOADER_FLAGS)
diff --git a/support/make/avr/mib520.extra b/support/make/avr/mib520.extra
new file mode 100644
index 00000000..68ab186f
--- /dev/null
+++ b/support/make/avr/mib520.extra
@@ -0,0 +1,7 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: mib520.extra,v 1.1 2008-04-23 20:31:58 sallai Exp $
+
+# The MIB520 uses the same protocol as the MIB510, so we 
+# just include mib510.extra
+MIB510 = $(MIB520)
+include $(TINYOS_MAKE_PATH)/avr/mib510.extra
diff --git a/support/make/avr/reinstall.extra b/support/make/avr/reinstall.extra
new file mode 100644
index 00000000..92ab051e
--- /dev/null
+++ b/support/make/avr/reinstall.extra
@@ -0,0 +1,11 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: reinstall.extra,v 1.5 2008-06-18 20:22:51 razvanm Exp $
+
+NODEID = $(REINSTALL)
+BUILD_DEPS = setid program delsetid
+
+ifdef BOOTLOADER
+  ifeq ($(BOOTLOADER),tosboot)
+    BUILD_DEPS += program_bl
+  endif
+endif
diff --git a/support/make/avr/reset.target b/support/make/avr/reset.target
new file mode 100644
index 00000000..6dc7551c
--- /dev/null
+++ b/support/make/avr/reset.target
@@ -0,0 +1,10 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: reset.target,v 1.4 2006-12-12 18:22:59 vlahan Exp $
+
+BUILD_DEPS = harmless
+
+reset: FORCE
+	@echo "    resetting $(PLATFORM)"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS)
+
+harmless:
diff --git a/support/make/blip.extra b/support/make/blip.extra
new file mode 100644
index 00000000..b9aeb67b
--- /dev/null
+++ b/support/make/blip.extra
@@ -0,0 +1,33 @@
+# -*- makefile -*-
+
+PFLAGS += -DCC2420_HW_ACKNOWLEDGEMENTS 
+PFLAGS += -DCC2420_HW_ADDRESS_RECOGNITION
+PFLAGS += -DPACKET_LINK
+
+ifdef BLIP_L2_MTU
+	PFLAGS += -DTOSH_DATA_LENGTH=$(BLIP_L2_MTU)
+else
+	PFLAGS += -DTOSH_DATA_LENGTH=90
+endif
+
+ifndef LOWPAN_ROOT
+  LOWPAN_ROOT=$(TOSROOT)
+endif
+
+PFLAGS+=-I$(TOSROOT)/tos/lib/net/
+PFLAGS+=-I$(LOWPAN_ROOT)/support/sdk/c/blip/
+PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/
+PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/interfaces/ 
+PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/nwprog/
+PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/shell/
+PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/serial/
+PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/platform/
+PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/icmp/
+PFLAGS+=-I$(LOWPAN_ROOT)/tos/lib/net/blip/dhcp/
+
+PFLAGS+=$(LOWPAN_ROOT)/support/sdk/c/blip/lib6lowpan/iovec.c
+PFLAGS+=$(LOWPAN_ROOT)/support/sdk/c/blip/lib6lowpan/in_cksum.c
+PFLAGS+=$(LOWPAN_ROOT)/support/sdk/c/blip/lib6lowpan/ip_malloc.c
+PFLAGS+=$(LOWPAN_ROOT)/support/sdk/c/blip/lib6lowpan/utility.c
+PFLAGS+=$(LOWPAN_ROOT)/tos/lib/net/blip/table.c
+
diff --git a/support/make/btnode3.target b/support/make/btnode3.target
new file mode 100644
index 00000000..7f8887b5
--- /dev/null
+++ b/support/make/btnode3.target
@@ -0,0 +1,33 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: btnode3.target,v 1.5 2007-11-06 19:32:56 sallai Exp $
+
+PLATFORM ?= btnode3
+SENSORBOARD ?= micasb
+PROGRAMMER ?= uisp
+ifeq ($(PROGRAMMER),avrdude)
+  PROGRAMMER_PART ?= -pm128  -U efuse:w:0xff:m
+endif
+
+ifeq ($(PROGRAMMER),uisp)
+  PROGRAMMER_PART ?= -dpart=ATmega128  --wr_fuse_e=ff
+endif
+
+ifdef TINYOS_NP
+  ifeq ($(TINYOS_NP),BNP)
+    PFLAGS += -I%T/lib/Deluge
+    PFLAGS += -I%T/lib/Deluge/TOSBoot/include
+    BOOTLOADER ?= $(TOSDIR)/lib/Deluge/TOSBoot/bl_mica2.srec
+    AVR_FUSE_H ?= 0xd8
+  endif
+  ifeq ($(TINYOS_NP),XNP)
+    BOOTLOADER ?= $(XNP_DIR)/inpispm2.srec
+  endif
+endif
+
+AVR_FUSE_H ?= 0xd9
+
+$(call TOSMake_include_platform,avr)
+
+btnode3: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/clean.target b/support/make/clean.target
new file mode 100644
index 00000000..007be891
--- /dev/null
+++ b/support/make/clean.target
@@ -0,0 +1,8 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: clean.target,v 1.7 2008-09-22 20:54:11 idgay Exp $
+
+clean: FORCE
+	rm -rf build $(CLEAN_EXTRA) pp
+	rm -rf _TOSSIMmodule.so TOSSIM.pyc TOSSIM.py app.xml simbuild
+	rm -rf VolumeMapC.nc
+	rm -f $(COMPONENT).cmap $(COMPONENT).dot $(COMPONENT).html $(COMPONENT).png
diff --git a/support/make/cthreads.extra b/support/make/cthreads.extra
new file mode 100644
index 00000000..e8b978ac
--- /dev/null
+++ b/support/make/cthreads.extra
@@ -0,0 +1,25 @@
+# Extra threads Makefile target to enable thread support for tinyos
+# Kevin Klues May 16th, 2008
+
+#Get all the normal include directories for a threads build
+$(call TOSMake_include,threads.extra)
+PFLAGS += -DCTHREADS
+
+#Include directories required specifically for cthreads builds
+THREADS_CSYSTEM_DIR = $(TOS_THREADS_DIR)/csystem
+CFLAGS += -I$(THREADS_CSYSTEM_DIR)
+
+#Setup flag to pass to storage volume allocator to indicate threads are being used
+VOLUME_ALLOCATOR_FLAGS = -t
+
+#Set up extra c file to compile functions for thread manipulation
+#Also define the top level nesC component as the TinyOSEntryPointC component
+COMPONENT=$(THREADS_CSYSTEM_DIR)/TinyOSEntryPointC
+TOSTHREAD_MAIN_PATH=$(shell pwd)/$(TOSTHREAD_MAIN)
+ifdef TOSTHREAD_MAIN
+ifndef MAKE_DYNTHREADS
+  ifneq ($(wildcard $(TOSTHREAD_MAIN_PATH)), )
+    CFLAGS += -DMAIN_APP=\"$(TOSTHREAD_MAIN_PATH)\"
+  endif 
+endif
+endif
diff --git a/support/make/docs.extra b/support/make/docs.extra
new file mode 100644
index 00000000..9ba3c6a5
--- /dev/null
+++ b/support/make/docs.extra
@@ -0,0 +1,39 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: docs.extra,v 1.5 2008-05-02 20:49:44 idgay Exp $
+
+# configure the base for the app dirs.  This is used to generate more
+# useful package names in the documentation.
+ifeq ($(BASEDIR)_x, _x)
+BASEDIR := $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' )
+endif
+
+# The output directory for generated documentation
+ifeq ($(DOCDIR)_x, _x)
+DOCDIR := $(BASEDIR)/doc/nesdoc
+endif
+
+COMMA=,
+DOCS := $(subst $(COMMA), ,$(subst ., ,$(DOCS)))
+
+ifeq ($(filter here,$(DOCS)),here)
+DOCDIR = doc
+endif
+
+ifeq ($(filter preserve,$(DOCS)),preserve)
+PFLAGS += -preserve
+endif
+
+ifeq ($(filter quiet,$(DOCS)),quiet)
+QUIET = -quiet
+endif
+
+BUILD_DEPS = docs_
+
+docs_: FORCE
+	@echo "    Making documentation for $(COMPONENT) on $(PLATFORM)"
+        # first generate the xml files
+	nesdoc -o $(DOCDIR) $(NESDOC_FLAGS) $(PFLAGS) $(CFLAGS) $(QUIET) $(COMPONENT).nc
+ifneq ($(filter nohtml,$(DOCS)),nohtml)
+        # generate html from the xml files
+	nesdoc -o $(DOCDIR) -html $(QUIET) -target=$(PLATFORM)
+endif
diff --git a/support/make/dynthreads.extra b/support/make/dynthreads.extra
new file mode 100644
index 00000000..02e3ee84
--- /dev/null
+++ b/support/make/dynthreads.extra
@@ -0,0 +1,45 @@
+# Extra threads Makefile target to enable thread support for tinyos
+# Kevin Klues May 16th, 2008
+
+MAKE_DYNTHREADS =
+BUILD_DEPS = dynthreads_all
+
+#Get all the normal include directories for a cthreads build
+$(call TOSMake_include,cthreads.extra)
+PFLAGS += -DDYNTHREADS
+
+#Stuff to build dynamically loadable binary
+DYNLOAD_CFILE = $(TOSTHREAD_MAIN_PATH)
+CFLAGS += -c
+PFLAGS += -x nesc
+
+BUILDDIR = build/$(PLATFORM)/dynthreads
+#DYNLOAD_BASENAME = $(shell basename $(DYNLOAD_CFILE) .c)
+DYNLOAD_BASENAME = main
+
+DYNLOAD_OBJFILE = $(BUILDDIR)/$(DYNLOAD_BASENAME).o
+DYNLOAD_BINFILE = $(BUILDDIR)/$(DYNLOAD_BASENAME).bin
+DYNLOAD_TOSFILE = $(BUILDDIR)/$(DYNLOAD_BASENAME).tos
+
+DYNLOAD_NCC_COMMAND = $(NCC) -o $(DYNLOAD_OBJFILE) $(PFLAGS) $(OPTFLAGS) $(CFLAGS) $(DYNLOAD_CFILE)
+DYNLOAD_OBJCOPY_COMMAND = $(OBJCOPY) --output-target=binary $(DYNLOAD_OBJFILE) $(DYNLOAD_BINFILE)
+DYNLOAD_GENTOS_COMMAND = tosthreads-dynamic-app $(DYNLOAD_OBJFILE) $(DYNLOAD_BINFILE) $(DYNLOAD_TOSFILE)
+
+dynthreads_build: dynthreads_builddir build_storage
+	@echo "    compiling $(DYNLOAD_CFILE) to a $(PLATFORM) dynamically loadable binary"
+	$(DYNLOAD_NCC_COMMAND)
+	$(DYNLOAD_OBJCOPY_COMMAND)
+	$(DYNLOAD_GENTOS_COMMAND)
+	
+ifneq ($(shell uname),Darwin)
+dynthreads_all: dynthreads_build
+	@echo "            $(shell stat -t $(DYNLOAD_TOSFILE) | perl -lane 'print $$F[1];') bytes in BINARY"
+	@echo "    writing TOS image"
+else
+dynthreads_all: dynthreads_build
+	@echo "            $(shell stat -F $(DYNLOAD_TOSFILE) | perl -lane 'print $$F[4];') bytes in BINARY"
+	@echo "    writing TOS image"
+endif
+
+dynthreads_builddir:
+	mkdir -p $(BUILDDIR)
diff --git a/support/make/epic.target b/support/make/epic.target
new file mode 100644
index 00000000..78d12362
--- /dev/null
+++ b/support/make/epic.target
@@ -0,0 +1,27 @@
+#-*-Makefile-*-
+#$Id: epic.target,v 1.5 2010-02-26 23:36:34 sdhsdh Exp $
+
+PLATFORM ?= epic
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+# OPTFLAGS += -O
+
+# Default BSL assumes telosb-like programming interface
+MSP_BSL ?= tos-bsl
+MSP_BSL_FLAGS = --telosb
+
+VOLUME_FILE = volumes-at45db.xml
+VOLUME_ALLOCATOR ?= tos-storage-at45db
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+# Include the epic-specific targets
+$(call TOSMake_include_platform,epic)
+# Include the msp extra targets
+$(call TOSMake_include_platform,msp)
+
+epic: $(BUILD_DEPS)
+	@:
diff --git a/support/make/epic/digi.extra b/support/make/epic/digi.extra
new file mode 100644
index 00000000..fdaa280b
--- /dev/null
+++ b/support/make/epic/digi.extra
@@ -0,0 +1 @@
+MSP_BSL_FLAGS = --slow --swap-reset-test --invert-reset --invert-test
\ No newline at end of file
diff --git a/support/make/epic/epic.rules b/support/make/epic/epic.rules
new file mode 100644
index 00000000..e69de29b
diff --git a/support/make/epic/miniprog.extra b/support/make/epic/miniprog.extra
new file mode 100644
index 00000000..fec2d9e3
--- /dev/null
+++ b/support/make/epic/miniprog.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*-
+#$Id: miniprog.extra,v 1.1 2008-08-07 06:38:02 prabal Exp $
+
+# Special flags for Epic USB Mini Programmer
+MSP_BSL_FLAGS = --swap-reset-test --invert-reset --invert-test
diff --git a/support/make/eval-crash.diff b/support/make/eval-crash.diff
new file mode 100644
index 00000000..3c18a0be
--- /dev/null
+++ b/support/make/eval-crash.diff
@@ -0,0 +1,77 @@
+Index: variable.h
+===================================================================
+RCS file: /cvsroot/make/make/variable.h,v
+retrieving revision 1.24
+diff -u -B -b -r1.24 variable.h
+--- variable.h	8 Aug 2002 00:11:19 -0000	1.24
++++ variable.h	25 Oct 2002 21:37:32 -0000
+@@ -107,6 +107,8 @@
+ extern char *expand_argument PARAMS ((char *str, char *end));
+ extern char *variable_expand_string PARAMS ((char *line, char *string,
+                                              long length));
++extern void install_variable_buffer PARAMS ((char **bufp, unsigned int *lenp));
++extern void restore_variable_buffer PARAMS ((char *buf, unsigned int len));
+ 
+ /* function.c */
+ extern int handle_function PARAMS ((char **op, char **stringp));
+Index: expand.c
+===================================================================
+RCS file: /cvsroot/make/make/expand.c,v
+retrieving revision 1.33
+diff -u -B -b -r1.33 expand.c
+--- expand.c	14 Oct 2002 21:54:04 -0000	1.33
++++ expand.c	25 Oct 2002 21:37:32 -0000
+@@ -545,3 +545,28 @@
+ 
+   return value;
+ }
++
++/* Install a new variable_buffer context, returning the current one for
++   safe-keeping.  */
++
++void
++install_variable_buffer (char **bufp, unsigned int *lenp)
++{
++  *bufp = variable_buffer;
++  *lenp = variable_buffer_length;
++
++  variable_buffer = 0;
++  initialize_variable_output ();
++}
++
++/* Restore a previously-saved variable_buffer setting (free the current one).
++ */
++
++void
++restore_variable_buffer (char *buf, unsigned int len)
++{
++  free (variable_buffer);
++
++  variable_buffer = buf;
++  variable_buffer_length = len;
++}
+Index: function.c
+===================================================================
+RCS file: /cvsroot/make/make/function.c,v
+retrieving revision 1.71
+diff -u -B -b -r1.71 function.c
+--- function.c	14 Oct 2002 21:54:04 -0000	1.71
++++ function.c	25 Oct 2002 21:37:32 -0000
+@@ -1196,7 +1196,17 @@
+ static char *
+ func_eval (char *o, char **argv, const char *funcname)
+ {
++  char *buf;
++  unsigned int len;
++
++  /* Eval the buffer.  Pop the current variable buffer setting so that the
++     eval'd code can use its own without conflicting.  */
++
++  install_variable_buffer (&buf, &len);
++
+   eval_buffer (argv[0]);
++
++  restore_variable_buffer (buf, len);
+ 
+   return o;
+ }
diff --git a/support/make/eyesIFX.target b/support/make/eyesIFX.target
new file mode 100644
index 00000000..6e33f8b6
--- /dev/null
+++ b/support/make/eyesIFX.target
@@ -0,0 +1,12 @@
+EYES_IFX_VER ?= v2
+
+ifeq ($(EYES_IFX_VER),v2)
+  EYES_IFX_TARGET = eyesIFXv2.target
+else
+  EYES_IFX_TARGET = eyesIFXv1.target
+endif
+
+$(call TOSMake_include,$(EYES_IFX_TARGET))
+
+eyesIFX: $(BUILD_DEPS)
+    @:
diff --git a/support/make/eyesIFXv1.target b/support/make/eyesIFXv1.target
new file mode 100644
index 00000000..a2510931
--- /dev/null
+++ b/support/make/eyesIFXv1.target
@@ -0,0 +1,24 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: eyesIFXv1.target,v 1.5 2008-03-11 09:34:13 klueska Exp $
+
+PLATFORM = eyesIFXv1
+
+MSP_MCU = msp430x149
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+ifndef DEFAULT_PROGRAM
+DEFAULT_PROGRAM = jtag
+endif
+
+VOLUME_FILE = volumes-stm25p.xml
+VOLUME_ALLOCATOR ?= tos-storage-stm25p
+
+NESC_FLAGS:=-Wnesc-all
+
+$(call TOSMake_include_platform,msp)
+
+eyesIFXv1: $(BUILD_DEPS)
+    @:
diff --git a/support/make/eyesIFXv2.target b/support/make/eyesIFXv2.target
new file mode 100644
index 00000000..dec7c503
--- /dev/null
+++ b/support/make/eyesIFXv2.target
@@ -0,0 +1,33 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: eyesIFXv2.target,v 1.5 2008-03-11 09:34:13 klueska Exp $
+
+PLATFORM = eyesIFXv2
+
+MSP_MCU = msp430x1611
+
+#Flash Config
+VOLUME_FILE = volumes-at45db.xml
+VOLUME_ALLOCATOR ?= tos-storage-at45db
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+ifndef DEFAULT_PROGRAM
+DEFAULT_PROGRAM = bsl
+endif
+
+MSP_BSL_FLAGS ?= --invert-test --invert-reset --f1x
+BSL?=/dev/ttyUSB1
+ifeq (,$(findstring /dev/ttyUSB,$(BSL)))
+  ifneq (,$(findstring USB,$(BSL)))
+    BSL:=/dev/tty$(BSL)
+  endif
+endif
+
+NESC_FLAGS:=-Wnesc-all -mdisable-hwmul
+
+$(call TOSMake_include_platform,msp)
+
+eyesIFXv2: $(BUILD_DEPS)
+    @:
diff --git a/support/make/ident_flags.extra b/support/make/ident_flags.extra
new file mode 100644
index 00000000..da421c42
--- /dev/null
+++ b/support/make/ident_flags.extra
@@ -0,0 +1,14 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: ident_flags.extra,v 1.4 2006-12-12 18:22:55 vlahan Exp $
+
+IDENT_PL ?= tos-ident-flags
+IDENT_PROGRAM_NAME ?= $(COMPONENT)
+IDENT_FLAGS := $(shell $(IDENT_PL) "$(IDENT_PROGRAM_NAME)")
+
+CFLAGS += $(IDENT_FLAGS)
+
+BUILD_EXTRA_DEPS += ident_cache
+
+ident_cache: FORCE
+	@echo '$(IDENT_FLAGS)' > $(BUILDDIR)/ident_flags.txt
+
diff --git a/support/make/intelmote2.target b/support/make/intelmote2.target
new file mode 100644
index 00000000..727aca0d
--- /dev/null
+++ b/support/make/intelmote2.target
@@ -0,0 +1,21 @@
+#-*-Makefile-*- vim:syntax=make
+
+PLATFORM = intelmote2
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+VOLUME_FILE = volumes-pxa27xp30.xml
+VOLUME_ALLOCATOR ?= tos-storage-pxa27xp30
+
+#ASSEMBLY_FILES += $(PLATFORM_DIR)/../imote2/flash.s $(PLATFORM_DIR)/../imote2/binarymover.s
+ASSEMBLY_FILES += $(TOSDIR)/platforms/intelmote2/toscrt0.s $(TOSDIR)/chips/pxa27x/pxa27x_util.s
+CFLAGS += -DPXA27X_13M -T$(TOSDIR)/platforms/intelmote2/tos.x 
+
+$(call TOSMake_include_platform,pxa27x)
+
+intelmote2: $(BUILD_DEPS)
+	@:
+
+
diff --git a/support/make/iris.target b/support/make/iris.target
new file mode 100644
index 00000000..b65f8e38
--- /dev/null
+++ b/support/make/iris.target
@@ -0,0 +1,26 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: iris.target,v 1.5 2009-03-10 15:09:55 sallai Exp $
+
+PLATFORM = iris
+SENSORBOARD ?= micasb
+PROGRAMMER ?= avrdude
+
+ifeq ($(PROGRAMMER),avrdude)
+  PROGRAMMER_PART ?= -pm1281 -U efuse:w:0xff:m
+endif
+
+ifeq ($(PROGRAMMER),uisp)
+  PROGRAMMER_PART ?= -dpart=ATmega1281 --wr_fuse_e=ff
+endif
+
+AVR_FUSE_H ?= 0xd9
+AVR_FUSE_L ?= 0xff
+
+ifdef RF230_CHANNEL
+PFLAGS += -DRF230_DEF_CHANNEL=$(RF230_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,avr)
+
+iris: $(BUILD_DEPS)
+	@:
\ No newline at end of file
diff --git a/support/make/m16c62p/crt.S b/support/make/m16c62p/crt.S
new file mode 100755
index 00000000..b63b5c86
--- /dev/null
+++ b/support/make/m16c62p/crt.S
@@ -0,0 +1,206 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Per Lindgren
+ * @author Johan Eriksson
+ * @author Johan Nordlander
+ * @author Simon Aittamaa
+ */
+ 
+.set PM0, 0x04
+.set PRCR, 0x0a
+
+.text
+	.global __vector_default
+	.global m32c_jsri16
+	.extern _main
+
+.section .init0,"ax",@progbits
+	.global _start
+
+_start:
+	/* Setup processor mode, single chip mode, and stack pointers */
+	ldc	#_istack, isp
+	mov.b	#0x02, PRCR
+	mov.b	#0x00, PM0
+	mov.b	#0x00, PRCR
+
+	/* Setup the FLG register to some sane defaults. */
+	ldc		#0, flg
+  /* Clear the U flag. This sets the stack pointer to the interrupt stack.
+     This is done so that only one stack is used by both interrupt routines
+     and other code. There would else be a problem when threads are changed
+     in interrupt routines in the tosthread library. */
+	fclr u
+
+	/* Setup interrupt vector. */
+	ldc		#%hi16(_vectors_variable), intbh
+	ldc		#%lo16(_vectors_variable), intbl
+
+	/* Copy .data. */
+	mov.b	#%hi8(__data_start), r1h
+	mov.w	#%lo16(__data_start), a0
+	mov.w	#__ram_start, a1
+	mov.w	#__data_size, r3
+	smovf.b
+
+	/* Zero out .bss. */
+	mov.b	#0x00, R0L
+	mov.w	#__bss_size, r3
+	mov.w	#__bss_start, a1
+	sstr.b
+
+	/* Enter main(). */
+	jsr.a	_main
+
+	/* In case we return, should realy generate a reset :/ */
+	jmp.b	0
+
+m32c_jsri16:
+    add.w    #-1, sp
+    /* Read the address (16 bits) and return address (24 bits) off
+    the stack.  */
+    mov.w    4[sp], r0
+    mov.w    1[sp], r3
+    mov.b    3[sp], a0 /* This zero-extends, so the high byte has
+                          zero in it.  */
+    /* Write the return address, then new address, to the stack.  */
+    mov.w    a0, 1[sp] /* Just to get the zero in 2[sp].  */
+    mov.w    r0, 0[sp]
+    mov.w    r3, 3[sp]
+    mov.b    a0, 5[sp]
+
+    /* This "returns" to the target address, leaving the pending
+    return address on the stack.  */
+    rts
+
+
+/* We should probably not get here. */
+__vector_default:
+	jmp.a	__vector_default
+
+/* Fixed hardware vector table. */
+.section .vectors_fixed, "a",@progbits
+
+.size	_vectors_fixed, 36
+.type	_vectors_fixed, @object
+
+_vectors_fixed:
+
+.long	0 /* Undefined Instruction. */
+.long	0 /* Overflow INTO Instruction. */
+.long	0 /* BRK Instruction.*/
+.long	0 /* Address Match Interupt. */
+.long	0 /* Single Step Interrupt. */
+.long	0 /* Watchdog, Oscillation, Voltage Interrupt. */
+.long	0 /* DBC. */
+.long	0 /* NMI. */
+.long	_start /* Reset. */
+
+/* Variable vector table. */
+.section .vectors_variable
+
+.size _vectors_variable, 256
+.type _vectors_variable, @object
+
+_vectors_variable:
+
+.long	__vector_0
+.long	__vector_1
+.long	__vector_2
+.long	__vector_3
+.long	__vector_4
+.long	__vector_5
+.long	__vector_6
+.long	__vector_7
+.long	__vector_8
+.long	__vector_9
+.long	__vector_10
+.long	__vector_11
+.long	__vector_12
+.long	__vector_13
+.long	__vector_14
+.long	__vector_15
+.long	__vector_16
+.long	__vector_17
+.long	__vector_18
+.long	__vector_19
+.long	__vector_20
+.long	__vector_21
+.long	__vector_22
+.long	__vector_23
+.long	__vector_24
+.long	__vector_25
+.long	__vector_26
+.long	__vector_27
+.long	__vector_28
+.long	__vector_29
+.long	__vector_30
+.long	__vector_31
+.long	__vector_32
+.long	__vector_33
+.long	__vector_34
+.long	__vector_35
+.long	__vector_36
+.long	__vector_37
+.long	__vector_38
+.long	__vector_39
+.long	__vector_40
+.long	__vector_41
+.long	__vector_42
+.long	__vector_43
+.long	__vector_44
+.long	__vector_45
+.long	__vector_46
+.long	__vector_47
+.long	__vector_48
+.long	__vector_49
+.long	__vector_50
+.long	__vector_51
+.long	__vector_52
+.long	__vector_53
+.long	__vector_54
+.long	__vector_55
+.long	__vector_56
+.long	__vector_57
+.long	__vector_58
+.long	__vector_59
+.long	__vector_60
+.long	__vector_61
+.long	__vector_62
+.long	__vector_63
diff --git a/support/make/m16c62p/debug.extra b/support/make/m16c62p/debug.extra
new file mode 100755
index 00000000..b02de828
--- /dev/null
+++ b/support/make/m16c62p/debug.extra
@@ -0,0 +1,4 @@
+#-*-Makefile-*- vim:syntax=make
+
+OPTFLAGS = -O1 -g -fnesc-no-inline
+
diff --git a/support/make/m16c62p/debugopt.extra b/support/make/m16c62p/debugopt.extra
new file mode 100755
index 00000000..d150e3fb
--- /dev/null
+++ b/support/make/m16c62p/debugopt.extra
@@ -0,0 +1,4 @@
+#-*-Makefile-*- vim:syntax=make
+
+OPTFLAGS += -g
+
diff --git a/support/make/m16c62p/install.extra b/support/make/m16c62p/install.extra
new file mode 100755
index 00000000..db314bed
--- /dev/null
+++ b/support/make/m16c62p/install.extra
@@ -0,0 +1,10 @@
+#-#-Makefile-#- vim:syntax=make
+
+NODEID = $(INSTALL)
+BUILD_DEPS = srec tosimage bytes $(POST_BUILD_EXTRA_DEPS) setid program delsetid
+
+ifdef BOOTLOADER
+  ifeq ($(BOOTLOADER),tosboot)
+    BUILD_DEPS += program_bl
+  endif
+endif
diff --git a/support/make/m16c62p/m16c.x b/support/make/m16c62p/m16c.x
new file mode 100755
index 00000000..c3a80bb5
--- /dev/null
+++ b/support/make/m16c62p/m16c.x
@@ -0,0 +1,172 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Per Lindgren
+ * @author Johan Eriksson
+ * @author Johan Nordlander
+ * @author Simon Aittamaa
+ */
+
+ENTRY(_start)
+
+MEMORY {
+	ram (rw) : o = 0x0000400, l = 31k
+	flash (rx) : o = 0x00a0000, l = 384k
+}
+
+/* Provide any vector symbols not defined. */
+PROVIDE(__vector_0 = __vector_default);
+PROVIDE(__vector_1 = __vector_default);
+PROVIDE(__vector_2 = __vector_default);
+PROVIDE(__vector_3 = __vector_default);
+PROVIDE(__vector_4 = __vector_default);
+PROVIDE(__vector_5 = __vector_default);
+PROVIDE(__vector_6 = __vector_default);
+PROVIDE(__vector_7 = __vector_default);
+PROVIDE(__vector_8 = __vector_default);
+PROVIDE(__vector_9 = __vector_default);
+PROVIDE(__vector_10 = __vector_default);
+PROVIDE(__vector_11 = __vector_default);
+PROVIDE(__vector_12 = __vector_default);
+PROVIDE(__vector_13 = __vector_default);
+PROVIDE(__vector_14 = __vector_default);
+PROVIDE(__vector_15 = __vector_default);
+PROVIDE(__vector_16 = __vector_default);
+PROVIDE(__vector_17 = __vector_default);
+PROVIDE(__vector_18 = __vector_default);
+PROVIDE(__vector_19 = __vector_default);
+PROVIDE(__vector_20 = __vector_default);
+PROVIDE(__vector_21 = __vector_default);
+PROVIDE(__vector_22 = __vector_default);
+PROVIDE(__vector_23 = __vector_default);
+PROVIDE(__vector_24 = __vector_default);
+PROVIDE(__vector_25 = __vector_default);
+PROVIDE(__vector_26 = __vector_default);
+PROVIDE(__vector_27 = __vector_default);
+PROVIDE(__vector_28 = __vector_default);
+PROVIDE(__vector_29 = __vector_default);
+PROVIDE(__vector_30 = __vector_default);
+PROVIDE(__vector_31 = __vector_default);
+PROVIDE(__vector_32 = __vector_default);
+PROVIDE(__vector_33 = __vector_default);
+PROVIDE(__vector_34 = __vector_default);
+PROVIDE(__vector_35 = __vector_default);
+PROVIDE(__vector_36 = __vector_default);
+PROVIDE(__vector_37 = __vector_default);
+PROVIDE(__vector_38 = __vector_default);
+PROVIDE(__vector_39 = __vector_default);
+PROVIDE(__vector_40 = __vector_default);
+PROVIDE(__vector_41 = __vector_default);
+PROVIDE(__vector_42 = __vector_default);
+PROVIDE(__vector_43 = __vector_default);
+PROVIDE(__vector_44 = __vector_default);
+PROVIDE(__vector_45 = __vector_default);
+PROVIDE(__vector_46 = __vector_default);
+PROVIDE(__vector_47 = __vector_default);
+PROVIDE(__vector_48 = __vector_default);
+PROVIDE(__vector_49 = __vector_default);
+PROVIDE(__vector_50 = __vector_default);
+PROVIDE(__vector_51 = __vector_default);
+PROVIDE(__vector_52 = __vector_default);
+PROVIDE(__vector_53 = __vector_default);
+PROVIDE(__vector_54 = __vector_default);
+PROVIDE(__vector_55 = __vector_default);
+PROVIDE(__vector_56 = __vector_default);
+PROVIDE(__vector_57 = __vector_default);
+PROVIDE(__vector_58 = __vector_default);
+PROVIDE(__vector_59 = __vector_default);
+PROVIDE(__vector_60 = __vector_default);
+PROVIDE(__vector_61 = __vector_default);
+PROVIDE(__vector_62 = __vector_default);
+PROVIDE(__vector_63 = __vector_default);
+
+SECTIONS {
+	/*
+	 * Ram starts at 0x400 but for some reason it does not allow med to
+	 * start placing data at 0x400 since it's not into the ram... Life
+	 * is great.
+	 */
+	__ram_start = 0x500;
+	__ram_end = 0x400 + 31k - 1;
+        
+        .start : {
+                *(.init0);
+        } > flash
+
+	.data __ram_start :	{
+		*(.data);
+		*(.rodata);		/* Do NOT place in '.text'. */
+		*(.rodata.*);	/* Do NOT place in '.text'. */
+		*(.plt);		/* Do NOT place in '.text'. */
+	} > ram AT > flash
+
+	__data_start = LOADADDR(.data);
+	__data_size = SIZEOF(.data);
+
+	.bss : {
+		*(.bss);
+		*(COMMON);
+	} > ram
+
+	__bss_start = ADDR(.bss);
+	__bss_size = SIZEOF(.bss);
+        
+	.text /*0xc0000*/: {
+		*(.text);
+		*(.vectors_variable);
+	} > flash
+
+	PROVIDE(_end = __bss_start + __bss_size);
+	
+	/* User Stack Pointer */
+	.ustack 0x00007000 :
+	{
+		_ustack = .;
+	} > ram
+	
+	/* Interrupt Stack Pointer */
+	.istack 0x00008000 :
+	{
+		_istack = .;
+	} > ram
+	
+	/* Vector offset is fixed. */
+	.vectors 0x000FFFDC : {
+		*(.vectors_fixed);
+	} > flash
+}
diff --git a/support/make/m16c62p/m16c62p.rules b/support/make/m16c62p/m16c62p.rules
new file mode 100755
index 00000000..9c792255
--- /dev/null
+++ b/support/make/m16c62p/m16c62p.rules
@@ -0,0 +1,129 @@
+#-#-Makefile-#- vim:syntax=make
+
+define M16C62P_HELP
+
+ M16C/62P extras:
+
+   debug    : compile with minimal optimization and debug symbols
+   debugopt : compile with debug symbols
+
+ Programmer options:
+
+   sm16cf : use SM16CF programmer on port '/dev/ttyUSB0'.
+   sm16cf,<dev> : use SM16CF programmer on port <dev>.
+
+endef
+HELP += $(M16C62P_HELP)
+THIS_FOLDER = m16c62p
+
+#ifdef MAKE_DEPUTY_FLAG
+#        NCC_SAFE_TINYOS_FLAGS = -DSAFE_TINYOS -fnesc-deputy -fnesc-deputy-args='-I$(TOSDIR)/lib/safe/include --FLIDs=build/$(PLATFORM)/flids.txt --envmachine -DSAFE_TINYOS --nolib ' $(TOSDIR)/lib/safe/avr/fail.c 
+#else
+#        NCC_SAFE_TINYOS_FLAGS =
+#endif
+
+OBJCOPY = m32c-elf-objcopy
+OBJDUMP = m32c-elf-objdump
+SET_ID = tos-set-symbols --objcopy $(OBJCOPY) --objdump $(OBJDUMP)
+NCC = ncc
+LIBS = #-lm -lc -lgcc
+
+AMADDR = _ActiveMessageAddressC\$$addr
+# Uncomment the next two lines if you have a toolchain without the dollar sign
+# patch. This needs nesc 1.2.8 or newer (1.2.9 is recommended).
+#PFLAGS += -fnesc-separator=__
+#AMADDR = ActiveMessageAddressC__addr
+BUILDDIR ?= build/$(PLATFORM)
+MAIN_EXE = $(BUILDDIR)/main.exe
+MAIN_SREC = $(BUILDDIR)/main.srec
+MAIN_IHEX = $(BUILDDIR)/main.ihex
+INSTALL_SREC = $(MAIN_SREC).out$(if $(NODEID),-$(NODEID),)
+
+PFLAGS += -Wshadow $(NESC_FLAGS)
+PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c -board=$(SENSORBOARD)
+ifdef MSG_SIZE
+PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE)
+endif
+ifdef DEFAULT_LOCAL_GROUP
+PFLAGS += -DDEFINED_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP)
+endif
+
+# We need a different start address for the flash in the linker script when building TOSBoot.
+# Also program the boot_args address bytes with 0xFF so that we know if they are reprogrammable.
+ifeq ($(COMPONENT),TosBootC)
+$(shell sed -e "s/0x00a0000/0x00f8000/ig" $(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/m16c.x > $(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/m16c_bootloader.x)
+LDFLAGS += -nostartfiles -T$(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/m16c_bootloader.x  $(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/crt.S
+else
+LDFLAGS += -nostartfiles -T$(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/m16c.x  $(TINYOS_MAKE_PATH)/$(THIS_FOLDER)/crt.S
+endif
+
+# This is needed so that we know that the BusyWaitMicroC.BusyWait.wait()
+# function always gets aligned.
+CFLAGS += -falign-functions=2
+
+DEFAULT_PROGRAM ?= sm16cf
+
+# Use the 'if' function instead of the 'ifdef' construct because ifdef freaks
+# out with call in there.  I don't know why.
+$(if $(PROGRAM),,$(call TOSMake_include,$(THIS_FOLDER)/$(DEFAULT_PROGRAM).extra))
+
+# Build storage file if volumes.xml present
+ifneq ($(wildcard $(VOLUMEFILE)), )
+build_storage: $(BUILDDIR)/StorageVolumes.h
+
+exe0: build_storage 
+
+VOLUME_ALLOCATOR_FLAGS ?= 
+$(BUILDDIR)/StorageVolumes.h: $(VOLUMEFILE)
+	$(VOLUME_ALLOCATOR) $(VOLUME_ALLOCATOR_FLAGS) $(PLATFORMDIR) <$(VOLUMEFILE) >$@ || rm -f $@
+
+PFLAGS += -I$(BUILDDIR)
+else
+
+build_storage:
+
+endif
+
+ifndef BUILD_DEPS
+  ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),)
+    BUILD_DEPS = srec bytes tosimage $(POST_BUILD_EXTRA_DEPS)
+  endif
+endif
+
+setid: FORCE
+	@cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd cp $(MAIN_SREC) $(INSTALL_SREC); else cmd $(SET_ID) $(MAIN_SREC) $(INSTALL_SREC) _TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID) ; fi
+
+delsetid: FORCE
+	rm -f $(subst .srec.,.exe.,$(INSTALL_SREC)) $(INSTALL_SREC) 
+
+srec: exe FORCE
+	$(OBJCOPY) --output-target=srec $(MAIN_EXE) $(MAIN_SREC)
+
+tos_buildinfo: ihex build_buildinfo FORCE
+  @:
+  
+	# TODO(henrik) Remove interrupt vector table from the image.
+tosimage: ihex build_tosimage FORCE
+	@:
+
+ihex: exe FORCE
+	$(OBJCOPY) --output-target=ihex $(MAIN_EXE) $(MAIN_IHEX)
+
+exe: exe0 FORCE bytes
+	@:
+
+
+exe0: builddir $(BUILD_EXTRA_DEPS) $(COMPONENT).nc FORCE
+	@echo "    compiling $(COMPONENT) to a $(PLATFORM) binary"
+	$(NCC) -o $(MAIN_EXE) $(NCC_SAFE_TINYOS_FLAGS) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS)
+ifdef WIRING_CHECK_FILE
+	@nescc-wiring $(WIRING_CHECK_FILE)
+endif
+	@echo "    compiled $(COMPONENT) to $(MAIN_EXE)"
+
+builddir: FORCE
+	mkdir -p $(BUILDDIR)
+# bug fix 2009-3-11 by ZHF, here display the ROM and RAM consumption information.
+bytes: FORCE
+	@$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }'
+
diff --git a/support/make/m16c62p/reinstall.extra b/support/make/m16c62p/reinstall.extra
new file mode 100644
index 00000000..1d78c132
--- /dev/null
+++ b/support/make/m16c62p/reinstall.extra
@@ -0,0 +1,6 @@
+#-*-Makefile-*- vim:syntax=make
+
+NODEID = $(REINSTALL)
+BUILD_DEPS = setid program
+
+
diff --git a/support/make/m16c62p/sm16cf.extra b/support/make/m16c62p/sm16cf.extra
new file mode 100755
index 00000000..4a44de2b
--- /dev/null
+++ b/support/make/m16c62p/sm16cf.extra
@@ -0,0 +1,27 @@
+###
+ # @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ ##
+
+ifeq ($(SM16CF), )
+#$(error SM16CF must be defined, try "make $(TARGETS) help")
+SM16CF = /dev/ttyUSB0
+endif
+
+PROGRAM = sm16cf
+PROGRAMMER = sm16cf
+
+ifdef BOOTLOADER
+  program: FORCE
+	@echo "    installing $(PLATFORM) with bootloader using sm16cf"
+	srec_cat $(BOOTLOADER_IMG) $(INSTALL_SREC) -exclude 0x000FFFDC 0x00100000 -o $(BUILDDIR)/main_boot.srec -CRLF
+	sed '/S5/d' $(BUILDDIR)/main_boot.srec > $(BUILDDIR)/main_boot2.srec
+	$(PROGRAMMER) --baud-rate=57600 --device=$(SM16CF) --input-file=$(BUILDDIR)/main_boot2.srec --flash-program
+	rm $(BUILDDIR)/main_boot.srec
+	rm $(BUILDDIR)/main_boot2.srec
+else
+program: FORCE
+	@echo "    installing $(PLATFORM) using sm16cf"
+	$(PROGRAMMER) --baud-rate=57600 --device=$(SM16CF) --input-file=$(INSTALL_SREC) --flash-program
+endif
+
+program_bl: FORCE
diff --git a/support/make/mica2.target b/support/make/mica2.target
new file mode 100644
index 00000000..50fd5b4b
--- /dev/null
+++ b/support/make/mica2.target
@@ -0,0 +1,21 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: mica2.target,v 1.5 2007-11-06 19:32:56 sallai Exp $
+
+PLATFORM = mica2
+SENSORBOARD ?= micasb
+PROGRAMMER ?= uisp
+ifeq ($(PROGRAMMER),avrdude)
+  PROGRAMMER_PART ?= -pm128  -U efuse:w:0xff:m
+endif
+
+ifeq ($(PROGRAMMER),uisp)
+  PROGRAMMER_PART ?= -dpart=ATmega128  --wr_fuse_e=ff
+endif
+
+AVR_FUSE_H ?= 0xd9
+
+$(call TOSMake_include_platform,avr)
+
+mica2: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/mica2dot.target b/support/make/mica2dot.target
new file mode 100644
index 00000000..87d0c75d
--- /dev/null
+++ b/support/make/mica2dot.target
@@ -0,0 +1,21 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: mica2dot.target,v 1.5 2007-11-06 19:32:56 sallai Exp $
+
+PLATFORM = mica2dot
+
+PROGRAMMER ?= uisp
+ifeq ($(PROGRAMMER),avrdude)
+  PROGRAMMER_PART ?= -pm128  -U efuse:w:0xff:m
+endif
+
+ifeq ($(PROGRAMMER),uisp)
+  PROGRAMMER_PART ?= -dpart=ATmega128  --wr_fuse_e=ff
+endif
+
+AVR_FUSE_H ?= 0xd9
+
+$(call TOSMake_include_platform,avr)
+
+mica2dot: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/micaz.target b/support/make/micaz.target
new file mode 100644
index 00000000..18e5c5e1
--- /dev/null
+++ b/support/make/micaz.target
@@ -0,0 +1,25 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: micaz.target,v 1.6 2008-07-09 15:36:50 sallai Exp $
+
+PLATFORM = micaz
+SENSORBOARD ?= micasb
+PROGRAMMER ?= uisp
+ifeq ($(PROGRAMMER),avrdude)
+  PROGRAMMER_PART ?= -pm128  -U efuse:w:0xff:m
+endif
+
+ifeq ($(PROGRAMMER),uisp)
+  PROGRAMMER_PART ?= -dpart=ATmega128  --wr_fuse_e=ff
+endif
+
+AVR_FUSE_H ?= 0xd9
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,avr)
+
+micaz: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/msp/bsl.extra b/support/make/msp/bsl.extra
new file mode 100644
index 00000000..a1e1b12f
--- /dev/null
+++ b/support/make/msp/bsl.extra
@@ -0,0 +1,58 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: bsl.extra,v 1.7 2008-06-18 20:22:51 razvanm Exp $
+
+# BSL arguments:
+#
+#   bsl,<port>
+#     install onto the given port name
+#
+#   bsl,auto
+#     uses motelist to install onto the first listed mote
+#
+#   bsl,ref,<reference>
+#      uses motelist to install onto the mote with the given reference number
+
+PROGRAM = bsl
+
+MSP_BSL ?= msp430-bsl
+# BSL is the comm port, can be specified as "bsl,2" when making
+BSL ?= auto
+MSP_BSL_FLAGS ?= --telos
+
+ifeq ($(BSL),auto)
+BSLTEST = $(shell motelist -c | perl -e '<> =~ /^[^,]+,(\S+?(\d+)[^,]*)/; print $$1;' )
+BSLTEST_COMMENT = "using bsl,auto"
+BSL = $(shell motelist -c | perl -e '<> =~ /^[^,]+,(\S+?(\d+)[^,]*)/; ($$s,$$n)=($$1,$$2); if($$s=~/^com/i) { print $$n-1 } else { print $$s; };' )
+BSL_TARGETS += bsltest
+else
+ifeq ($(BSL:ref,%=ref),ref)
+BSLREF := $(BSL:ref,%=%)
+BSLTEST_COMMENT = "using bsl,ref,$(BSLREF)"
+BSLTEST := $(shell motelist -c | perl -e '$$r=shift; while(<>) { if(/^$$r,([^,]+)/) { print $$1; exit; } }' $(BSLREF))
+BSL = $(BSLTEST)
+BSL_TARGETS += bsltest
+endif
+endif
+
+# bsltest is a separate rule so that make doesn't resolve BSL along with
+# BSLTEST, which saves an invocation of motelist.  It also avoids the test
+# all together if bsl,auto was not specified (whew).
+bsltest: FORCE
+	@N=$(BSLTEST); [ x$$N = x ] && echo "    found no motes ($(BSLTEST_COMMENT))" && exit 1 || echo "    found mote on $$N ($(BSLTEST_COMMENT))"
+
+program: $(BSL_TARGETS) $(TELOS_PROGRAM_DEPS) FORCE
+	@echo "    installing $(PLATFORM) binary using bsl"
+	$(MSP_BSL) $(MSP_BSL_FLAGS) -c $(BSL) -r -e -I -p $(INSTALL_IHEX)
+	rm -f $(subst .ihex.,.exe.,$(INSTALL_IHEX)) $(INSTALL_IHEX) 
+
+program_no_e: $(BSL_TARGETS) $(TELOS_PROGRAM_DEPS) FORCE
+	@echo "    installing $(PLATFORM) binary using bsl (without mass erase)"
+	$(MSP_BSL) $(MSP_BSL_FLAGS) -c $(BSL) -r -I -p $(INSTALL_IHEX)
+	rm -f $(subst .ihex.,.exe.,$(INSTALL_IHEX)) $(INSTALL_IHEX) 
+
+program_bl: $(BSL_TARGETS) $(TELOS_PROGRAM_DEPS) FORCE
+	@echo "    installing $(PLATFORM) bootloader using bsl"
+	$(MSP_BSL) $(MSP_BSL_FLAGS) -c $(BSL) -r -e -I -p $(BOOTLOADER_IMG)
+
+program_input: ihex
+	@:
diff --git a/support/make/msp/debug.extra b/support/make/msp/debug.extra
new file mode 100644
index 00000000..45d3438f
--- /dev/null
+++ b/support/make/msp/debug.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $
+
+OPTFLAGS = -O1 -g -fnesc-no-inline
+
diff --git a/support/make/msp/debugopt.extra b/support/make/msp/debugopt.extra
new file mode 100644
index 00000000..5d0286c7
--- /dev/null
+++ b/support/make/msp/debugopt.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: debugopt.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $
+
+OPTFLAGS += -g
+
diff --git a/support/make/msp/id.extra b/support/make/msp/id.extra
new file mode 100644
index 00000000..548c5332
--- /dev/null
+++ b/support/make/msp/id.extra
@@ -0,0 +1,7 @@
+# The id.extra will simply output the binary with altered node id's and
+# will not install the application to the node. You can install it manually.
+#   Usage:  make telosb id.3  
+#                 ==> Outputs main.ihex.out-3 
+
+NODEID = $(ID)
+BUILD_DEPS = setid
diff --git a/support/make/msp/install.extra b/support/make/msp/install.extra
new file mode 100644
index 00000000..6755196e
--- /dev/null
+++ b/support/make/msp/install.extra
@@ -0,0 +1,11 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: install.extra,v 1.5 2008-06-18 20:22:51 razvanm Exp $
+
+NODEID = $(INSTALL)
+BUILD_DEPS = tosimage $(POST_BUILD_EXTRA_DEPS) bytes setid program 
+
+ifdef BOOTLOADER
+  ifeq ($(BOOTLOADER),tosboot)
+    BUILD_DEPS = tosimage $(POST_BUILD_EXTRA_DEPS) setid program_bl program_no_e 
+  endif
+endif
diff --git a/support/make/msp/jtag.extra b/support/make/msp/jtag.extra
new file mode 100644
index 00000000..0b947f6e
--- /dev/null
+++ b/support/make/msp/jtag.extra
@@ -0,0 +1,24 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: jtag.extra,v 1.5 2008-06-18 20:22:51 razvanm Exp $
+
+PROGRAM = jtag
+
+ifndef MSP_JTAG
+MSP_JTAG = msp430-jtag
+endif
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using the parallel port jtag adapter"
+	$(MSP_JTAG) $(MSP_JTAG_FLAGS) -Iepr $(INSTALL_IHEX)
+
+program_no_e: FORCE
+	@echo "    installing $(PLATFORM) binary using jtag (without mass erase)"
+	$(MSP_JTAG) $(MSP_JTAG_FLAGS) -r -I -p $(INSTALL_IHEX)
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader using jtag"
+	$(MSP_JTAG) $(MSP_JTAG_FLAGS) -r -e -I -p $(BOOTLOADER_IMG)
+
+program_input: ihex
+	@:
+
diff --git a/support/make/msp/msp.rules b/support/make/msp/msp.rules
new file mode 100644
index 00000000..6e959cf0
--- /dev/null
+++ b/support/make/msp/msp.rules
@@ -0,0 +1,120 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: msp.rules,v 1.20 2010-03-17 00:38:05 klueska Exp $
+
+define MSP_HELP
+
+ MSP extras:
+
+   debug    : compile with minimal optimization and debug symbols
+   debugopt : compile with debug symbols
+
+ Programmer options:
+
+   bsl,auto      : (default) use BSL programmer on the first mote found
+   bsl,<port>    : use BSL programmer on <port> serial port
+   bsl,ref,<ref> : use BSL programmer on the mote with reference <ref>
+
+   The dev or host parameter for the programmer option need not be specified,
+   in which case it is expected to be defined as in an environment variable of
+   the same name in all caps (such as BSL).
+
+endef
+HELP += $(MSP_HELP)
+
+ifdef MAKE_DEPUTY_FLAG
+        NCC_SAFE_TINYOS_FLAGS = -DSAFE_TINYOS -I$(TOSDIR)/lib/safe -fnesc-deputy -fnesc-deputy-args='-I$(TOSDIR)/lib/safe/include --FLIDs=build/$(PLATFORM)/flids.txt --envmachine -DSAFE_TINYOS --nolib '
+else
+        NCC_SAFE_TINYOS_FLAGS =
+endif
+
+#MSP_NESC_TARGET ?= msp430
+#MSP_GCC ?= msp430-gcc
+#MSP_MCU ?= msp430x149
+#PFLAGS += -fnesc-target=$(MSP_NESC_TARGET) -gcc=$(MSP_GCC) -mmcu=$(MSP_MCU)
+
+OBJCOPY = msp430-objcopy
+OBJDUMP = msp430-objdump
+SET_ID = tos-set-symbols
+NCC = ncc
+LIBS = -lm
+
+# Use __ as the separator - requires nesC 1.2.9 or later
+ifneq ($(filter sim,$(GOALS)),sim)
+        PFLAGS += -fnesc-separator=__
+endif
+
+AMADDR = ActiveMessageAddressC__addr
+BUILDDIR ?= build/$(PLATFORM)
+MAIN_EXE = $(BUILDDIR)/main.exe
+MAIN_IHEX = $(BUILDDIR)/main.ihex
+INSTALL_IHEX = $(MAIN_IHEX).out$(if $(NODEID),-$(NODEID),)
+
+PFLAGS += -Wall -Wshadow $(NESC_FLAGS)
+PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c -board=$(SENSORBOARD)
+ifdef MSG_SIZE
+PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE)
+endif
+ifdef DEFAULT_LOCAL_GROUP
+PFLAGS += -DDEFINED_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP)
+endif
+
+DEFAULT_PROGRAM ?= bsl
+
+BUILDLESS_DEPS += bytes
+
+# Use the 'if' function instead of the 'ifdef' construct because ifdef freaks
+# out with call in there.  I don't know why.
+$(if $(PROGRAM),,$(call TOSMake_include,msp/$(DEFAULT_PROGRAM).extra))
+
+# Build storage file if volumes.xml present
+ifneq ($(wildcard $(VOLUME_FILE)), )
+build_storage: $(BUILDDIR)/StorageVolumes.h
+
+exe0: build_storage 
+
+VOLUME_ALLOCATOR_FLAGS ?= 
+$(BUILDDIR)/StorageVolumes.h: $(VOLUME_FILE)
+	$(VOLUME_ALLOCATOR) $(VOLUME_ALLOCATOR_FLAGS) $(PLATFORMDIR) <$(VOLUME_FILE) >$@ || rm -f $@
+
+PFLAGS += -I$(BUILDDIR)
+else
+
+build_storage:
+
+endif
+
+ifndef BUILD_DEPS
+  ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),)
+    BUILD_DEPS = tosimage $(POST_BUILD_EXTRA_DEPS)
+  endif
+endif
+
+setid: FORCE
+	@cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd cp $(MAIN_IHEX) $(INSTALL_IHEX); else cmd $(SET_ID) --objcopy $(OBJCOPY) --objdump $(OBJDUMP) --target ihex $(MAIN_IHEX) $(INSTALL_IHEX) TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID); fi
+
+tos_buildinfo: ihex build_buildinfo FORCE
+  @:
+  
+tosimage: ihex build_tosimage FORCE
+	@:
+
+ihex: exe FORCE
+	$(OBJCOPY) --output-target=ihex $(MAIN_EXE) $(MAIN_IHEX)
+
+exe: exe0 bytes FORCE
+	@:
+
+exe0: builddir $(BUILD_EXTRA_DEPS) $(COMPONENT).nc FORCE
+	@echo "    compiling $(COMPONENT) to a $(PLATFORM) binary"
+	$(NCC) -o $(MAIN_EXE) $(NCC_SAFE_TINYOS_FLAGS) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS)
+ifdef WIRING_CHECK_FILE
+	@nescc-wiring $(WIRING_CHECK_FILE)
+endif
+	@echo "    compiled $(COMPONENT) to $(MAIN_EXE)"
+
+builddir: FORCE
+	mkdir -p $(BUILDDIR)
+
+bytes: FORCE
+	@$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }'
+
diff --git a/support/make/msp/reinstall.extra b/support/make/msp/reinstall.extra
new file mode 100644
index 00000000..2cc7df9d
--- /dev/null
+++ b/support/make/msp/reinstall.extra
@@ -0,0 +1,14 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: reinstall.extra,v 1.5 2008-06-18 20:22:51 razvanm Exp $
+
+NODEID = $(REINSTALL)
+BUILD_DEPS = setid program
+
+ifdef BOOTLOADER
+  ifeq ($(BOOTLOADER),tosboot)
+    BUILD_DEPS = setid program_bl program_no_e
+  endif
+endif
+
+check_tosboot: FORCE
+	@perl -e 'exit 0 if (<> =~ /^\:103000/); print "\nERROR: Trying to install with tosboot support.\n       main.ihex was not built properly, please recompile.\n\n"; exit 1;' $(INSTALL_IHEX)
diff --git a/support/make/mulle.target b/support/make/mulle.target
new file mode 100755
index 00000000..37bbb175
--- /dev/null
+++ b/support/make/mulle.target
@@ -0,0 +1,50 @@
+#-#-Makefile-#- vim:syntax=make
+##
+ # Copyright (c) 2009 Communication Group and Eislab at
+ # Lulea University of Technology
+ #
+ # Contact: Laurynas Riliskis, LTU
+ # Mail: laurynas.riliskis@ltu.se
+ # All rights reserved.
+ #
+ #
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of Communication Group at Lulea University of Technology
+ #   nor the names of its contributors may be used to endorse or promote
+ #    products derived from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ # UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+ ##
+
+# @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+PLATFORM = mulle
+
+# Flash settings
+VOLUMEFILE = volumes-at45db.xml
+VOLUME_ALLOCATOR ?= tos-storage-at45db
+VOLUME_ALLOCATOR_FLAGS ?= -s 512 -f 4096
+
+$(call TOSMake_include_platform,m16c62p)
+
+mulle: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/nowiring.extra b/support/make/nowiring.extra
new file mode 100644
index 00000000..e229134f
--- /dev/null
+++ b/support/make/nowiring.extra
@@ -0,0 +1,3 @@
+#-*-Makefile-*- vim:syntax=make
+
+NOWIRING=1
diff --git a/support/make/null.target b/support/make/null.target
new file mode 100644
index 00000000..bb558e65
--- /dev/null
+++ b/support/make/null.target
@@ -0,0 +1,11 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: null.target,v 1.4 2006-12-12 18:22:55 vlahan Exp $
+
+PLATFORM = null
+PFLAGS += -finline-limit=100000
+
+$(call TOSMake_include_platform,null)
+
+null: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/null/debug.extra b/support/make/null/debug.extra
new file mode 100644
index 00000000..38c21268
--- /dev/null
+++ b/support/make/null/debug.extra
@@ -0,0 +1,4 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $
+
+OPTFLAGS += -O1 -g -fnesc-no-inline
diff --git a/support/make/null/null.rules b/support/make/null/null.rules
new file mode 100644
index 00000000..0f3f05e1
--- /dev/null
+++ b/support/make/null/null.rules
@@ -0,0 +1,79 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: null.rules,v 1.10 2010-03-17 00:38:05 klueska Exp $
+
+define NULL_HELP
+
+ NULL extras:
+
+   debug    : compile with minimal optimization and debug symbols
+
+endef
+HELP += $(NULL_HELP)
+
+export GCC=gcc
+OBJCOPY = objcopy
+OBJDUMP = objdump
+NCC = ncc
+LIBS = -lm
+
+BUILDDIR ?= build/$(PLATFORM)
+MAIN_EXE = $(BUILDDIR)/main.exe
+MAIN_SREC = $(BUILDDIR)/main.srec
+MAIN_IHEX = $(BUILDDIR)/main.ihex
+INSTALL_SREC = $(MAIN_SREC).out$(if $(NODEID),-$(NODEID),)
+VOLUMEFILE = volumes-at45db.xml
+VOLUME_ALLOCATOR ?= tos-storage-at45db
+
+PFLAGS += -Wall -Wshadow -fnesc-gcc=$(GCC) $(NESC_FLAGS)
+PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c
+ifdef MSG_SIZE
+PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE)
+endif
+ifdef DEFAULT_LOCAL_GROUP
+PFLAGS += -DDEFINED_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP)
+endif
+ifeq ($(findstring Darwin, $(shell uname)), Darwin)
+  CFLAGS += -D_FORTIFY_SOURCE=0
+  OBJCOPY = /usr/bin/true
+  OBJDUMP = /usr/bin/true
+endif
+
+BUILDLESS_DEPS += bytes
+
+# Build storage file if volumes.xml present
+# We "steal" the at45db storage spec
+ifneq ($(wildcard $(VOLUMEFILE)), )
+build_storage: $(BUILDDIR)/StorageVolumes.h
+
+exe0: build_storage 
+
+$(BUILDDIR)/StorageVolumes.h: $(VOLUMEFILE)
+	$(VOLUME_ALLOCATOR) $(VOLUME_ALLOCATOR_FLAGS) <$(VOLUMEFILE) >$@
+
+PFLAGS += -I$(BUILDDIR)
+else
+
+build_storage: 
+
+endif
+
+ifndef BUILD_DEPS
+  ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),)
+    BUILD_DEPS = exe bytes $(POST_BUILD_EXTRA_DEPS)
+  endif
+endif
+
+exe: exe0 bytes FORCE
+	@:
+
+exe0: builddir $(BUILD_EXTRA_DEPS) $(COMPONENT).nc FORCE
+	@echo "    compiling $(COMPONENT) to a $(PLATFORM) binary"
+	$(NCC) -o $(MAIN_EXE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS)
+	@echo "    compiled $(COMPONENT) to $(MAIN_EXE)"
+
+builddir: FORCE
+	mkdir -p $(BUILDDIR)
+
+bytes: FORCE
+	@$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }'
+
diff --git a/support/make/pxa27x/debug.extra b/support/make/pxa27x/debug.extra
new file mode 100644
index 00000000..db634031
--- /dev/null
+++ b/support/make/pxa27x/debug.extra
@@ -0,0 +1,6 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: debug.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $
+
+#OPTFLAGS = -O1 -g -fnesc-no-inline
+OPTFLAGS = -g -fnesc-no-inline
+
diff --git a/support/make/pxa27x/debugopt.extra b/support/make/pxa27x/debugopt.extra
new file mode 100644
index 00000000..a6c2309c
--- /dev/null
+++ b/support/make/pxa27x/debugopt.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: debugopt.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $
+
+OPTFLAGS += -O3 -g
+
diff --git a/support/make/pxa27x/install.extra b/support/make/pxa27x/install.extra
new file mode 100644
index 00000000..687454ff
--- /dev/null
+++ b/support/make/pxa27x/install.extra
@@ -0,0 +1,6 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: install.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $
+
+NODEID = $(INSTALL)
+BUILD_DEPS = bin bytes setid program
+
diff --git a/support/make/pxa27x/jflashmm.extra b/support/make/pxa27x/jflashmm.extra
new file mode 100644
index 00000000..d16992ef
--- /dev/null
+++ b/support/make/pxa27x/jflashmm.extra
@@ -0,0 +1,19 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: jflashmm.extra,v 1.5 2008-05-27 18:21:43 kusy Exp $
+
+PROGRAM = jflashmm
+
+PROGRAMMER ?= jflashmm.exe
+PROGRAMMER_FLAGS = bulbcx16
+POST_INSTALL_BIN_FLAGS = P 0x0
+PXA27X_JTAG_DEV ?= "JTAG CPU"
+#PXA27X_JTAG_DEV ?= "INTEL(R) JTAG CABLE"
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using $(PROGRAM)"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) $(INSTALL_BIN) $(POST_INSTALL_BIN_FLAGS) 
+
+
+program_input: bin
+	@:
+
diff --git a/support/make/pxa27x/openocd.extra b/support/make/pxa27x/openocd.extra
new file mode 100644
index 00000000..cc55de11
--- /dev/null
+++ b/support/make/pxa27x/openocd.extra
@@ -0,0 +1,18 @@
+#-*-Makefile-*- vim:syntax=make
+
+#
+# To install OpenOCD, see the following wiki page:
+# http://docs.tinyos.net/index.php/OpenOCD_for_IMote2
+#
+
+PROGRAM = imote2-ocd-program.py
+
+PROGRAMMER ?= $(TOSROOT)/tools/platforms/intelmote2/openocd/imote2-ocd-program.py
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using $(PROGRAM)"
+	$(PROGRAMMER) $(INSTALL_BIN)
+
+program_input: bin
+	@:
+
diff --git a/support/make/pxa27x/pxa27x.rules b/support/make/pxa27x/pxa27x.rules
new file mode 100644
index 00000000..0e51b09b
--- /dev/null
+++ b/support/make/pxa27x/pxa27x.rules
@@ -0,0 +1,108 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: pxa27x.rules,v 1.12 2010-03-17 00:38:05 klueska Exp $
+
+define PXA27X_HELP
+
+ PXA27x extras:
+
+   debug    : compile with minimal optimization and debug symbols
+   debugopt : compile with debug symbols
+
+ Programmer extras:
+
+   jflashmm : (default) use the Intel JFLASHMM tool to install
+   xflash   : Use the Intel XFLASH tool to install
+   openocd  : Use openocd to install
+
+endef
+HELP += $(PXA27X_HELP)
+
+GAS = xscale-elf-gcc -c # This ensures .c and .s compiled object are compatible
+OBJCOPY = xscale-elf-objcopy 
+OBJDUMP = xscale-elf-objdump
+SET_ID = tos-set-symbols
+XDB_SYMBOL_EXTRACT = dwarf2bd
+NCC = ncc
+LIBS = -lm
+
+AMADDR = ActiveMessageAddressC\$$addr
+BUILDDIR ?= build/$(PLATFORM)
+MAIN_EXE = $(BUILDDIR)/main.exe
+MAIN_BIN = $(BUILDDIR)/main.bin
+INSTALL_BIN = $(MAIN_BIN).out$(if $(NODEID),-$(NODEID),)
+#PLATFORM_DIR = $(TOSDIR)/chips/pxa27x
+#ASSEMBLY_FILES += $(PLATFORM_DIR)/mmu_table.s $(PLATFORM_DIR)/util.s 
+ASSEMBLY_OBJS =  $(BUILDDIR)/asms.o
+#LIBRARY_OBJS  =  $(PLATFORM_DIR)/lib/profile.o $(PLATFORM_DIR)/lib/queue.o
+
+OPTFLAGS ?= -O3 -g
+PFLAGS += -Wall -Wshadow $(NESC_FLAGS)
+PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c -board=$(SENSORBOARD)
+ifdef MSG_SIZE
+PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE)
+endif
+ifdef DEFAULT_LOCAL_GROUP
+PFLAGS += -DDEFINED_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP)
+endif
+
+DEFAULT_PROGRAM ?= jflashmm
+
+
+BUILDLESS_DEPS += bytes
+
+# Use the 'if' function instead of the 'ifdef' construct because ifdef freaks
+# out with call in there.  I don't know why.
+$(if $(PROGRAM),,$(call TOSMake_include,pxa27x/$(DEFAULT_PROGRAM).extra))
+
+# Build storage file if volumes.xml present
+ifneq ($(wildcard $(VOLUME_FILE)), )
+build_storage: $(BUILDDIR)/StorageVolumes.h
+
+exe0: build_storage 
+
+VOLUME_ALLOCATOR_FLAGS ?= 
+$(BUILDDIR)/StorageVolumes.h: $(VOLUME_FILE)
+	$(VOLUME_ALLOCATOR) $(VOLUME_ALLOCATOR_FLAGS) $(PLATFORMDIR) <$(VOLUME_FILE) >$@ || rm -f $@
+
+PFLAGS += -I$(BUILDDIR)
+else
+
+build_storage: 
+
+endif
+
+ifndef BUILD_DEPS
+  ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),)
+    BUILD_DEPS = bin bytes $(POST_BUILD_EXTRA_DEPS)
+  endif
+endif
+
+setid: FORCE
+	@cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd $(OBJCOPY) --output-target=binary $(MAIN_EXE) $(INSTALL_BIN); else cmd $(SET_ID) --objcopy $(OBJCOPY) --objdump $(OBJDUMP) --target binary $(MAIN_EXE) $(INSTALL_BIN) TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID); fi
+
+
+bin: exe FORCE
+	@cmd () { echo "$$@"; $$@; }; if [ "${PROGRAM}" = "xflash" ]; then $(XDB_SYMBOL_EXTRACT) $(MAIN_EXE); fi
+
+exe: exe0 bytes FORCE
+	@:
+
+exe0: builddir asms $(BUILD_EXTRA_DEPS) $(COMPONENT).nc FORCE
+	@echo "    compiling $(COMPONENT) to a $(PLATFORM) binary"
+	$(NCC) -o $(MAIN_EXE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS) $(ASSEMBLY_OBJS) $(LIBRARY_OBJS)
+ifdef WIRING_CHECK_FILE
+	@nescc-wiring $(WIRING_CHECK_FILE)
+endif
+	@echo "    compiled $(COMPONENT) to $(MAIN_EXE)"
+
+builddir: FORCE
+	mkdir -p $(BUILDDIR)
+
+bytes: FORCE
+	@$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }'
+
+asms: 
+	$(GAS) $(ASSEMBLY_FILES) -o $(BUILDDIR)/asms.o 
+
+library:
+	cd $(PLATFORM_DIR)/lib; make;
diff --git a/support/make/pxa27x/reinstall.extra b/support/make/pxa27x/reinstall.extra
new file mode 100644
index 00000000..b35e2796
--- /dev/null
+++ b/support/make/pxa27x/reinstall.extra
@@ -0,0 +1,7 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: reinstall.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $
+
+NODEID = $(REINSTALL)
+BUILD_DEPS = setid program
+
+
diff --git a/support/make/pxa27x/xflash.extra b/support/make/pxa27x/xflash.extra
new file mode 100644
index 00000000..0e43bb94
--- /dev/null
+++ b/support/make/pxa27x/xflash.extra
@@ -0,0 +1,17 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: xflash.extra,v 1.5 2008-05-29 20:16:43 kusy Exp $
+
+PROGRAM = xflash
+
+PROGRAMMER ?= xflash.exe
+PROGRAMMER_FLAGS = -p imote2
+
+PXA27X_JTAG_DEV ?= "JTAG CPU"
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using $(PROGRAM)"
+	$(PROGRAMMER) $(PROGRAMMER_FLAGS) -tt $(PXA27X_JTAG_DEV) $(INSTALL_BIN)
+
+program_input: bin
+	@:
+
diff --git a/support/make/safe.extra b/support/make/safe.extra
new file mode 100644
index 00000000..b29429f8
--- /dev/null
+++ b/support/make/safe.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*-
+
+MAKE_DEPUTY_FLAG := 1
+#export MAKE_DEPUTY_FLAG
+
diff --git a/support/make/sam3/debug.extra b/support/make/sam3/debug.extra
new file mode 100644
index 00000000..1199ef23
--- /dev/null
+++ b/support/make/sam3/debug.extra
@@ -0,0 +1,4 @@
+#-*-Makefile-*- vim:syntax=make
+
+OPTFLAGS = -g -fnesc-no-inline
+
diff --git a/support/make/sam3/debugopt.extra b/support/make/sam3/debugopt.extra
new file mode 100644
index 00000000..d150e3fb
--- /dev/null
+++ b/support/make/sam3/debugopt.extra
@@ -0,0 +1,4 @@
+#-*-Makefile-*- vim:syntax=make
+
+OPTFLAGS += -g
+
diff --git a/support/make/sam3/install.extra b/support/make/sam3/install.extra
new file mode 100644
index 00000000..ab1b7772
--- /dev/null
+++ b/support/make/sam3/install.extra
@@ -0,0 +1,17 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: install.extra,v 1.4 2006/12/12 18:22:59 vlahan Exp $
+
+NODEID = $(INSTALL)
+BUILD_DEPS = bin tosimage bytes setid 
+
+ifdef BOOTLOADER
+  ifeq ($(BOOTLOADER),tosboot)
+    ifdef INSTALL_GOLDENIMAGE
+      BUILD_DEPS += program_gi
+    else
+      BUILD_DEPS += program_ngi
+    endif
+  endif
+else
+ BUILD_DEPS += program
+endif
diff --git a/support/make/sam3/mpu.extra b/support/make/sam3/mpu.extra
new file mode 100644
index 00000000..031960d8
--- /dev/null
+++ b/support/make/sam3/mpu.extra
@@ -0,0 +1,4 @@
+# use special linker file to provide symbols and alignment for memory protection
+
+LINKERFILE_PREFIX ?= sam3u-ek-flash
+LINKERFILE ?= $(LINKERFILE_PREFIX)-mp.x
diff --git a/support/make/sam3/sam-ba-3s.extra b/support/make/sam3/sam-ba-3s.extra
new file mode 100644
index 00000000..82ced99b
--- /dev/null
+++ b/support/make/sam3/sam-ba-3s.extra
@@ -0,0 +1,41 @@
+#-*-Makefile-*- vim:syntax=make
+
+PROGRAM = samba-program.py
+SAM-BA ?= /dev/ttyUSB10
+START_ADDR ?= 0x400000
+
+PROGRAMMER ?= $(PROGRAM)
+
+DELUGE_BASE_EXE=$(BUILDDIR)/deluge-base.exe
+DELUGE_BASE_BIN=$(BUILDDIR)/deluge-base.bin
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using $(PROGRAM)"
+	$(PROGRAMMER) -b $(INSTALL_BIN) -s $(START_ADDR) -t at91sam3s4-ek -p $(SAM-BA) -r -c
+
+deluge_base_bin: FORCE
+	@echo "Compiling $(PLATFORM) deluge base station"
+	@$(NCC) -o $(DELUGE_BASE_EXE) $(OPTFLAGS) $(PFLAGS) -DDELUGE_BASESTATION $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS)
+	@$(OBJCOPY) --output-target=binary $(DELUGE_BASE_EXE) $(DELUGE_BASE_BIN)
+
+program_gi: deluge_base_bin FORCE
+	@echo "Installing $(PLATFORM) deluge base station using $(PROGRAM)"
+	$(PROGRAMMER) -b $(DELUGE_BASE_BIN) -s $(TOSBOOT_REALPROG_START) -t at91sam3s4-ek -p $(SAM-BA) -c
+	@echo "Installing $(PLATFORM) bootloader using $(PROGRAM)"
+	$(PROGRAMMER) -b $(BOOTLOADER_IMG) -s $(TOSBOOT_START) -t at91sam3s4-ek -p $(SAM-BA) -r -c
+	@echo "Injecting $(PLATFORM) golden image"
+	@sleep 5
+	tos-deluge $(INSTALL_GOLDENIMAGE) -i 0 $(BUILDDIR)/tos_image.xml 
+	@echo "Rebooting into $(PLATFORM) golden image"
+	@sleep 1
+	tos-deluge $(INSTALL_GOLDENIMAGE) -r 0 
+
+program_ngi: FORCE
+	@echo "Installing $(PLATFORM) binary using $(PROGRAM)"
+	$(PROGRAMMER) -b $(INSTALL_BIN) -s $(TOSBOOT_REALPROG_START) -t at91sam3s4-ek -p $(SAM-BA) -c
+	@echo "Installing $(PLATFORM) bootloader using $(PROGRAM)"
+	$(PROGRAMMER) -b $(BOOTLOADER_IMG) -s $(TOSBOOT_START) -t at91sam3s4-ek -p $(SAM-BA) -r -c
+
+program_input: bin
+	@:
+
diff --git a/support/make/sam3/sam-ba.extra b/support/make/sam3/sam-ba.extra
new file mode 100644
index 00000000..7a194796
--- /dev/null
+++ b/support/make/sam3/sam-ba.extra
@@ -0,0 +1,42 @@
+#-*-Makefile-*- vim:syntax=make
+
+PROGRAM = samba-program.py
+SAM-BA ?= /dev/ttyUSB0
+START_ADDR ?= 0x80000
+BOARD ?= at91sam3u4-ek
+
+PROGRAMMER ?= $(PROGRAM)
+
+DELUGE_BASE_EXE=$(BUILDDIR)/deluge-base.exe
+DELUGE_BASE_BIN=$(BUILDDIR)/deluge-base.bin
+
+program: FORCE
+	@echo "    installing $(PLATFORM) binary using $(PROGRAM)"
+	$(PROGRAMMER) -b $(INSTALL_BIN) -s $(START_ADDR) -t $(BOARD) -p $(SAM-BA) -r
+
+deluge_base_bin: FORCE
+	@echo "Compiling $(PLATFORM) deluge base station"
+	@$(NCC) -o $(DELUGE_BASE_EXE) $(OPTFLAGS) $(PFLAGS) -DDELUGE_BASESTATION $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS)
+	@$(OBJCOPY) --output-target=binary $(DELUGE_BASE_EXE) $(DELUGE_BASE_BIN)
+
+program_gi: deluge_base_bin FORCE
+	@echo "Installing $(PLATFORM) deluge base station using $(PROGRAM)"
+	$(PROGRAMMER) -b $(DELUGE_BASE_BIN) -s $(TOSBOOT_REALPROG_START) -t $(BOARD) -p $(SAM-BA) -c
+	@echo "Installing $(PLATFORM) bootloader using $(PROGRAM)"
+	$(PROGRAMMER) -b $(BOOTLOADER_IMG) -s $(TOSBOOT_START) -t $(BOARD) -p $(SAM-BA) -r -c
+	@echo "Injecting $(PLATFORM) golden image"
+	@sleep 5
+	tos-deluge $(INSTALL_GOLDENIMAGE) -i 0 $(BUILDDIR)/tos_image.xml 
+	@echo "Rebooting into $(PLATFORM) golden image"
+	@sleep 1
+	tos-deluge $(INSTALL_GOLDENIMAGE) -r 0 
+
+program_ngi: FORCE
+	@echo "Installing $(PLATFORM) binary using $(PROGRAM)"
+	$(PROGRAMMER) -b $(INSTALL_BIN) -s $(TOSBOOT_REALPROG_START) -t $(BOARD) -p $(SAM-BA) -c
+	@echo "Installing $(PLATFORM) bootloader using $(PROGRAM)"
+	$(PROGRAMMER) -b $(BOOTLOADER_IMG) -s $(TOSBOOT_START) -t $(BOARD) -p $(SAM-BA) -r -c
+
+program_input: bin
+	@:
+
diff --git a/support/make/sam3/sam3.rules b/support/make/sam3/sam3.rules
new file mode 100644
index 00000000..4136cdd5
--- /dev/null
+++ b/support/make/sam3/sam3.rules
@@ -0,0 +1,106 @@
+#-*-Makefile-*- vim:syntax=make
+define SAM3_HELP
+
+SAM3 extras:
+  None available at the moment.
+
+endef
+
+HELP += $(SAM3_HELP)
+
+OBJCOPY = arm-none-eabi-objcopy
+OBJDUMP = arm-none-eabi-objdump
+SET_ID = tos-set-symbols
+NCC = ncc
+LIBS = -lm
+
+AMADDR = ActiveMessageAddressC\$$addr
+BUILDDIR ?= build/$(PLATFORM)
+MAIN_EXE = $(BUILDDIR)/main.exe
+MAIN_BIN = $(BUILDDIR)/main.bin
+MAIN_IHEX = $(BUILDDIR)/main.ihex
+INSTALL_BIN = $(MAIN_BIN).out$(if $(NODEID),-$(NODEID),)
+INCLUDE_DIRS ?= $(TOSDIR)/platforms/$(PLATFORM)
+EXTRA_MODULES ?= $(TOSDIR)/platforms/$(PLATFORM)/vectors.c
+
+OPTFLAGS ?= -O3 -g
+CFLAGS += -mcpu=cortex-m3 -mthumb -fno-strict-aliasing
+PFLAGS += $(EXTRA_MODULES)
+PFLAGS += -I$(INCLUDE_DIRS)
+PFLAGS += -Wall -Wshadow $(NESC_FLAGS)
+PFLAGS += -target=$(PLATFORM) -fnesc-cfile=$(BUILDDIR)/app.c
+PFLAGS += -finline-limit=100000
+PFLAGS += -board=$(SENSORBOARD)
+
+# can be overridden by MP-enabled linker file (see mpu.extra)
+LINKERFILE_PREFIX ?= sam3u-ek-flash
+LINKERFILE ?= $(LINKERFILE_PREFIX).x
+LDFLAGS += -L$(INCLUDE_DIRS) -T $(LINKERFILE)
+
+BUILDLESS_DEPS += bytes
+
+# Build storage file if volumes.xml present
+ifneq ($(wildcard $(VOLUME_FILE)), )
+build_storage: $(BUILDDIR)/StorageVolumes.h
+
+exe0: build_storage 
+
+VOLUME_ALLOCATOR_FLAGS ?= 
+$(BUILDDIR)/StorageVolumes.h: $(VOLUME_FILE)
+	$(VOLUME_ALLOCATOR) $(VOLUME_ALLOCATOR_FLAGS) $(PLATFORMDIR) <$(VOLUME_FILE) >$@ || rm -f $@
+
+PFLAGS += -I$(BUILDDIR)
+else
+
+build_storage:
+
+endif
+
+ifndef BUILD_DEPS
+  ifeq ($(filter $(BUILDLESS_DEPS),$(GOALS)),)
+    BUILD_DEPS = bin tosimage bytes $(POST_BUILD_EXTRA_DEPS)
+  endif
+endif
+
+ifdef MSG_SIZE
+PFLAGS += -DTOSH_DATA_LENGTH=$(MSG_SIZE)
+endif
+ifdef DEFAULT_LOCAL_GROUP
+PFLAGS += -DDEFINED_TOS_AM_GROUP=$(DEFAULT_LOCAL_GROUP)
+endif
+
+
+DEFAULT_PROGRAM ?= sam-ba
+
+# Use the 'if' function instead of the 'ifdef' construct because ifdef freaks
+# out with call in there.  I don't know why.
+$(if $(PROGRAM),,$(call TOSMake_include,sam3/$(DEFAULT_PROGRAM).extra))
+
+exe: exe0 bytes FORCE
+	@:
+
+exe0: builddir $(BUILD_EXTRA_DEPS) FORCE
+	@echo "    compiling $(COMPONENT) to a $(PLATFORM) binary"
+	$(NCC) -o $(MAIN_EXE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WIRING_CHECK_FLAGS) $(COMPONENT).nc $(LIBS) $(LDFLAGS)
+ifdef WIRING_CHECK_FILE
+	@nescc-wiring $(WIRING_CHECK_FILE)
+endif
+	@echo "    compiled $(COMPONENT) to $(MAIN_EXE)"
+
+builddir: FORCE
+	mkdir -p $(BUILDDIR)
+
+setid: FORCE
+	@cmd () { echo "$$@"; $$@; }; if [ x = x$(NODEID) ]; then cmd $(OBJCOPY) --output-target=binary $(MAIN_EXE) $(INSTALL_BIN); else cmd $(SET_ID) --objcopy $(OBJCOPY) --objdump $(OBJDUMP) --target binary $(MAIN_EXE) $(INSTALL_BIN) TOS_NODE_ID=$(NODEID) $(AMADDR)=$(NODEID); fi
+
+tosimage: ihex build_tosimage FORCE
+	@:
+
+bin: exe FORCE
+	$(OBJCOPY) --output-target=binary $(MAIN_EXE) $(MAIN_BIN)
+
+ihex: exe FORCE
+	$(OBJCOPY) --output-target=ihex $(MAIN_EXE) $(MAIN_IHEX)
+
+bytes: FORCE
+	@$(OBJDUMP) -h $(MAIN_EXE) | perl -ne '$$b{$$1}=hex $$2 if /^\s*\d+\s*\.(text|data|bss)\s+(\S+)/; END { printf("%16d bytes in ROM\n%16d bytes in RAM\n",$$b{text}+$$b{data},$$b{data}+$$b{bss}); }'
diff --git a/support/make/sam3s_ek.target b/support/make/sam3s_ek.target
new file mode 100644
index 00000000..50d700ac
--- /dev/null
+++ b/support/make/sam3s_ek.target
@@ -0,0 +1,16 @@
+#-*-Makefile-*- vim:syntax=make
+PLATFORM = sam3s_ek
+
+LINKERFILE_PREFIX?=sam3s-ek-flash
+SAM-BA?=/dev/ttyUSB10
+START_ADDR?=0x400000
+BOARD?=at91sam3s4-ek
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,sam3)
+
+sam3s_ek: $(BUILD_DEPS)
+	@:
diff --git a/support/make/sam3u_ek.target b/support/make/sam3u_ek.target
new file mode 100644
index 00000000..6fd52eff
--- /dev/null
+++ b/support/make/sam3u_ek.target
@@ -0,0 +1,11 @@
+#-*-Makefile-*- vim:syntax=make
+PLATFORM = sam3u_ek
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,sam3)
+
+sam3u_ek: $(BUILD_DEPS)
+	@:
diff --git a/support/make/savepp.extra b/support/make/savepp.extra
new file mode 100644
index 00000000..8d377bfb
--- /dev/null
+++ b/support/make/savepp.extra
@@ -0,0 +1,8 @@
+#-*-Makefile-*- vim:syntax=make
+
+PFLAGS += -fnesc-cppdir=pp
+
+BUILD_EXTRA_DEPS += rmpp
+
+rmpp: FORCE
+	rm -rf pp
diff --git a/support/make/shimmer.target b/support/make/shimmer.target
new file mode 100644
index 00000000..2a872f81
--- /dev/null
+++ b/support/make/shimmer.target
@@ -0,0 +1,17 @@
+PLATFORM = shimmer
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+MSP_BSL ?= tos-bsl
+MSP_BSL_FLAGS = --invert-test --invert-reset
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,msp)
+
+shimmer: $(BUILD_DEPS)
+	@:
diff --git a/support/make/shimmer2.target b/support/make/shimmer2.target
new file mode 100644
index 00000000..b58744cd
--- /dev/null
+++ b/support/make/shimmer2.target
@@ -0,0 +1,17 @@
+PLATFORM = shimmer2
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+MSP_BSL ?= tos-bsl
+MSP_BSL_FLAGS = --invert-test --invert-reset
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,msp)
+
+shimmer2: $(BUILD_DEPS)
+	@:
diff --git a/support/make/shimmer2r.target b/support/make/shimmer2r.target
new file mode 100644
index 00000000..8656ac2f
--- /dev/null
+++ b/support/make/shimmer2r.target
@@ -0,0 +1,17 @@
+PLATFORM = shimmer2r
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+MSP_BSL ?= tos-bsl
+MSP_BSL_FLAGS = --invert-test --invert-reset
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,msp)
+
+shimmer2r: $(BUILD_DEPS)
+	@:
diff --git a/support/make/sim-fast.extra b/support/make/sim-fast.extra
new file mode 100644
index 00000000..ca340d01
--- /dev/null
+++ b/support/make/sim-fast.extra
@@ -0,0 +1,74 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: sim-fast.extra,v 1.8 2010-04-08 04:27:24 regehr Exp $
+
+GCC=gcc
+GPP=g++
+OPTFLAGS = -g -O3
+LIBS = -lm -lstdc++ 
+PFLAGS += -tossim -fnesc-nido-tosnodes=1000 -fnesc-simulate -fnesc-nido-motenumber=sim_node\(\) -DTOSSIM_NO_DEBUG
+WFLAGS = -Wno-nesc-data-race
+PYTHON_VERSION ?= 2.5
+
+BUILDDIR   = simbuild/$(PLATFORM)
+CFILE    = $(BUILDDIR)/sim.c
+OBJFILE    = $(BUILDDIR)/sim.o
+CXXFILE    = $(TOSDIR)/lib/tossim/tossim.c
+CXXOBJFILE = $(BUILDDIR)/tossim.o
+HASHFILE    = $(TOSDIR)/lib/tossim/hashtable.c
+HASHOBJFILE = $(BUILDDIR)/c-support.o
+PYFILE     = $(TOSDIR)/lib/tossim/tossim_wrap.cxx
+PYOBJFILE  = $(BUILDDIR)/pytossim.o
+PYDIR      =/usr/include/python$(PYTHON_VERSION)
+SIMDIR     =$(TOSDIR)/lib/tossim
+XML        = app.xml
+DUMPTYPES = -fnesc-dump=components -fnesc-dump=variables -fnesc-dump=constants -fnesc-dump=typedefs -fnesc-dump=interfacedefs -fnesc-dump=tags
+
+ifeq ($(findstring cygwin, $(OSTYPE)),cygwin)
+  PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic
+  SHARED_OBJECT=_TOSSIM.dll
+  PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base 
+  PLATFORM_LIB_FLAGS = -L/usr/lib/python$(PYTHON_VERSION)/config -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION)
+else 
+ifeq ($(OS),Windows_NT) # Some TinyOS installs are like this
+  PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic
+  SHARED_OBJECT=_TOSSIM.dll
+  PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base 
+  PLATFORM_LIB_FLAGS = -L/usr/lib/python$(PYTHON_VERSION)/config -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION)
+else 
+ifeq ($(findstring darwin, $(OSTYPE)), darwin)
+  PLATFORM_FLAGS=-fPIC
+  PLATFORM_CC_FLAGS=-bundle
+  SHARED_OBJECT=_TOSSIMmodule.so
+  PLATFORM_BUILD_FLAGS=-flat_namespace -undefined suppress 
+  PLATFORM_LIB_FLAGS = -lstdc++ 
+else # linux
+  PLATFORM_FLAGS=-shared -fPIC
+  SHARED_OBJECT=_TOSSIMmodule.so
+  PLATFORM_LIB_FLAGS = -lstdc++ 
+  PLATFORM_BUILD_FLAGS= -shared -fPIC
+endif
+endif
+endif
+ 
+BUILD_DEPS = sim-exe
+
+# lib/tossim has to come at the end in order to ensure basic TOSSIM
+# implementations are the last resort, so put it directly in the call
+
+sim-exe: builddir $(BUILD_EXTRA_DEPS) FORCE
+	@echo "  placing object files in $(BUILDDIR)"
+	@echo "  writing XML schema to $(XML)"
+	@echo "  compiling $(COMPONENT) to object file sim.o"
+	$(NCC) -c $(PLATFORM_FLAGS) -o $(OBJFILE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WFLAGS) $(COMPONENT).nc $(LDFLAGS)  $(DUMPTYPES) -fnesc-dumpfile=$(XML)
+
+	@echo "  compiling Python support and C libraries into pytossim.o, tossim.o, and c-support.o"
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(PYOBJFILE) $(OPTFLAGS) $(CFLAGS) $(PYFILE) -I$(PYDIR) -I$(SIMDIR) -DHAVE_CONFIG_H 
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(CXXOBJFILE) $(OPTFLAGS) $(CFLAGS) $(CXXFILE) -I$(PYDIR) -I$(SIMDIR)
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(HASHOBJFILE) $(OPTFLAGS) $(CFLAGS) $(HASHFILE) -I$(PYDIR) -I$(SIMDIR)
+	@echo "  linking into shared object ./$(SHARED_OBJECT)"
+	$(GPP) $(PLATFORM_BUILD_FLAGS) $(PLATFORM_CC_FLAGS) $(PYOBJFILE) $(OBJFILE) $(CXXOBJFILE) $(HASHOBJFILE) $(PLATFORM_LIB_FLAGS) -o $(SHARED_OBJECT)
+	@echo "  copying Python script interface TOSSIM.py from lib/tossim to local directory"
+	@cp $(TOSDIR)/lib/tossim/TOSSIM.py .
+	@echo " "
+	@echo "*** Successfully built $(PLATFORM) TOSSIM library. "
+
diff --git a/support/make/sim-sf.extra b/support/make/sim-sf.extra
new file mode 100644
index 00000000..c1bce96d
--- /dev/null
+++ b/support/make/sim-sf.extra
@@ -0,0 +1,126 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: sim-sf.extra,v 1.1 2007-10-03 02:09:59 hiro Exp $
+# Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of Toilers Research Group - Colorado School of 
+#   Mines  nor the names of its contributors may be used to endorse 
+#   or promote products derived from this software without specific
+#   prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+# UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Author: Chad Metcalf
+
+SF_DIR=$(TOSDIR)/lib/tossim/sf
+SF_FLAGS=-I$(SF_DIR)
+
+GCC=gcc
+GPP=g++
+OPTFLAGS = -g -O0
+LIBS = -lm -lstdc++ 
+PFLAGS += -tossim -fnesc-nido-tosnodes=1000 -fnesc-simulate -fnesc-nido-motenumber=sim_node\(\) $(SF_FLAGS)
+WFLAGS = -Wno-nesc-data-race
+PYTHON_VERSION ?= 2.5
+
+BUILDDIR = simbuild/$(PLATFORM)
+
+CFILE   = $(BUILDDIR)/sim.c
+OBJFILE = $(BUILDDIR)/sim.o
+
+CSFFILE         = $(SF_DIR)/sim_serial_forwarder.c
+CSFOBJFILE      = $(BUILDDIR)/c-sf.o
+SFFILE          = $(SF_DIR)/SerialForwarder.c 
+SFOBJFILE       = $(BUILDDIR)/sf.o
+THROTTLEFILE    = $(SF_DIR)/Throttle.cpp
+THROTTLEOBJFILE = $(BUILDDIR)/throttle.o
+
+PYFILE          = $(SF_DIR)/tossim_wrap.cxx
+PYOBJFILE       = $(BUILDDIR)/pytossim.o
+
+CXXFILE     = $(SF_DIR)/tossim.c
+CXXOBJFILE  = $(BUILDDIR)/tossim.o
+HASHFILE    = $(TOSDIR)/lib/tossim/hashtable.c
+HASHOBJFILE = $(BUILDDIR)/c-support.o
+
+PYDIR       = /usr/include/python$(PYTHON_VERSION)
+SIMDIR      = $(TOSDIR)/lib/tossim
+XML         = app.xml
+
+DUMPTYPES = -fnesc-dump=components -fnesc-dump=variables -fnesc-dump=constants -fnesc-dump=typedefs -fnesc-dump=interfacedefs -fnesc-dump=tags
+
+ifeq ($(findstring cygwin, $(OSTYPE)),cygwin)
+  PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic
+  SHARED_OBJECT=_TOSSIM.dll
+  PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base 
+  PLATFORM_LIB_FLAGS = -L/usr/lib/python$(PYTHON_VERSION)/config -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION)
+else 
+ifeq ($(OS), Windows_NT) # Some TinyOS installs are like this
+  PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic 
+  SHARED_OBJECT=_TOSSIM.dll
+  PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base 
+  PLATFORM_LIB_FLAGS =-shared -L/usr/lib/python$(PYTHON_VERSION)/config -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION)
+else 
+ifeq ($(findstring darwin, $(OSTYPE)), darwin)
+  PLATFORM_FLAGS=-fPIC
+  PLATFORM_CC_FLAGS=-bundle
+  SHARED_OBJECT=_TOSSIMmodule.so
+  PLATFORM_BUILD_FLAGS=-flat_namespace -undefined suppress 
+  PLATFORM_LIB_FLAGS = -lstdc++ 
+else # linux
+  PLATFORM_FLAGS=-shared -fPIC
+  SHARED_OBJECT=_TOSSIMmodule.so
+  PLATFORM_LIB_FLAGS = -lstdc++ 
+  PLATFORM_BUILD_FLAGS= -shared -fPIC
+endif
+endif
+endif
+ 
+BUILD_DEPS = sim-exe
+
+# lib/tossim has to come at the end in order to ensure basic TOSSIM
+# implementations are the last resort, so put it directly in the call
+
+sim-exe: builddir $(BUILD_EXTRA_DEPS) FORCE
+	@echo "  placing object files in $(BUILDDIR)"
+	@echo "  writing XML schema to $(XML)"
+	@echo "  compiling $(COMPONENT) to object file sim.o"
+	$(NCC) -c $(PLATFORM_FLAGS) -o $(OBJFILE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WFLAGS) $(COMPONENT).nc $(LDFLAGS)  $(DUMPTYPES) -fnesc-dumpfile=$(XML)
+
+	@echo "  compiling Python support and C libraries into pytossim.o, tossim.o, and c-support.o"
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(PYOBJFILE) $(OPTFLAGS) $(CFLAGS) $(SIM_CFLAGS) $(SF_FLAGS) $(PYFILE) -I$(PYDIR) -I$(SIMDIR) -DHAVE_CONFIG_H 
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(CXXOBJFILE) $(OPTFLAGS) $(CFLAGS) $(SIM_CFLAGS) $(SF_FLAGS) $(CXXFILE) -I$(PYDIR) -I$(SIMDIR)
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(HASHOBJFILE) $(OPTFLAGS) $(CFLAGS) $(SIM_CFLAGS) $(SF_FLAGS) $(HASHFILE) -I$(PYDIR) -I$(SIMDIR)
+
+	@echo "  compiling sf support and C libraries into sf.o, c-sf.o, and throttle.o"
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(CSFOBJFILE) $(OPTFLAGS) $(CFLAGS) $(SIM_CFLAGS) $(SF_FLAGS) $(CSFFILE) -I$(PYDIR) -I$(SIMDIR)
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(SFOBJFILE) $(OPTFLAGS) $(CFLAGS) $(SIM_CFLAGS) $(SF_FLAGS) $(SFFILE) -I$(PYDIR) -I$(SIMDIR)
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(THROTTLEOBJFILE) $(OPTFLAGS) $(CFLAGS) $(SIM_CFLAGS) $(SF_FLAGS) $(THROTTLEFILE) -I$(PYDIR) -I$(SIMDIR)
+
+	@echo "  linking into shared object ./$(SHARED_OBJECT)"
+	$(GPP) $(PLATFORM_BUILD_FLAGS) $(PLATFORM_CC_FLAGS) $(PYOBJFILE) $(OBJFILE) $(CXXOBJFILE) $(HASHOBJFILE) $(CSFOBJFILE) $(SFOBJFILE) $(THROTTLEOBJFILE)  $(PLATFORM_LIB_FLAGS) $(LIBS) -o $(SHARED_OBJECT)
+	@echo "  copying Python script interface TOSSIM.py from lib/tossim to local directory"
+	@cp $(SF_DIR)/TOSSIM.py .
+	@echo " "
+	@echo "*** Successfully built $(PLATFORM) TOSSIM library with TOSSIM Live extensions. "
+
diff --git a/support/make/sim.extra b/support/make/sim.extra
new file mode 100644
index 00000000..36928de2
--- /dev/null
+++ b/support/make/sim.extra
@@ -0,0 +1,81 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: sim.extra,v 1.14 2009-11-14 02:14:18 razvanm Exp $
+
+export GCC=gcc
+GPP=g++
+OPTFLAGS = -g -O0
+LIBS = -lm -lstdc++ 
+PFLAGS += -tossim -fnesc-nido-tosnodes=1000 -fnesc-simulate -fnesc-nido-motenumber=sim_node\(\) -fnesc-gcc=$(GCC)
+WFLAGS = -Wno-nesc-data-race
+PYTHON_VERSION ?= 2.5
+
+BUILDDIR   = simbuild/$(PLATFORM)
+CFILE    = $(BUILDDIR)/sim.c
+OBJFILE    = $(BUILDDIR)/sim.o
+CXXFILE    = $(TOSDIR)/lib/tossim/tossim.c
+CXXOBJFILE = $(BUILDDIR)/tossim.o
+HASHFILE    = $(TOSDIR)/lib/tossim/hashtable.c
+HASHOBJFILE = $(BUILDDIR)/c-support.o
+PYFILE     = $(TOSDIR)/lib/tossim/tossim_wrap.cxx
+PYOBJFILE  = $(BUILDDIR)/pytossim.o
+PYDIR      = $(shell python$(PYTHON_VERSION)-config --prefix)/include/python$(PYTHON_VERSION)
+SIMDIR     =$(TOSDIR)/lib/tossim
+XML        = app.xml
+DUMPTYPES = -fnesc-dump=components -fnesc-dump=variables -fnesc-dump=constants -fnesc-dump=typedefs -fnesc-dump=interfacedefs -fnesc-dump=tags
+
+ifeq ($(findstring cygwin, $(OSTYPE)),cygwin)
+  PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic
+  SHARED_OBJECT=_TOSSIM.dll
+  PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base 
+  PLATFORM_LIB_FLAGS = -L/usr/lib/python$(PYTHON_VERSION)/config -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION)
+else 
+ifeq ($(OS), Windows_NT) # Some TinyOS installs are like this
+  PLATFORM_FLAGS=-DUSE_DL_IMPORT -fpic 
+  SHARED_OBJECT=_TOSSIM.dll
+  PLATFORM_BUILD_FLAGS= -fpic -W1,--enabled-auto-image-base 
+  PLATFORM_LIB_FLAGS =-shared -L/usr/lib/python$(PYTHON_VERSION)/config -L/$(PYDIR)/config -lstdc++ -lpython$(PYTHON_VERSION)
+else 
+ifeq ($(findstring darwin, $(OSTYPE)), darwin) 
+  SIM_DARWIN=TRUE
+else
+ifeq ($(findstring Darwin, $(shell uname)), Darwin)
+  SIM_DARWIN = TRUE  
+else # linux
+  PLATFORM_FLAGS=-shared -fPIC
+  SHARED_OBJECT=_TOSSIMmodule.so
+  PLATFORM_LIB_FLAGS = -lstdc++ 
+  PLATFORM_BUILD_FLAGS= -shared -fPIC
+endif
+endif
+endif
+endif 
+ifdef SIM_DARWIN
+  PLATFORM_FLAGS=-fPIC -D_FORTIFY_SOURCE=0
+  PLATFORM_CC_FLAGS=-bundle
+  SHARED_OBJECT=_TOSSIMmodule.so
+  PLATFORM_BUILD_FLAGS=-flat_namespace -undefined suppress 
+  PLATFORM_LIB_FLAGS = -lstdc++ 
+endif 
+
+BUILD_DEPS = sim-exe
+
+# lib/tossim has to come at the end in order to ensure basic TOSSIM
+# implementations are the last resort, so put it directly in the call
+
+sim-exe: builddir $(BUILD_EXTRA_DEPS) FORCE
+	@echo "  placing object files in $(BUILDDIR)"
+	@echo "  writing XML schema to $(XML)"
+	@echo "  compiling $(COMPONENT) to object file sim.o"
+	$(NCC) -c $(PLATFORM_FLAGS) -o $(OBJFILE) $(OPTFLAGS) $(PFLAGS) $(CFLAGS) $(WFLAGS) $(COMPONENT).nc $(LDFLAGS)  $(DUMPTYPES) -fnesc-dumpfile=$(XML)
+
+	@echo "  compiling Python support and C libraries into pytossim.o, tossim.o, and c-support.o"
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(PYOBJFILE) $(OPTFLAGS) $(CFLAGS) $(PYFILE) -I$(PYDIR) -I$(SIMDIR) -DHAVE_CONFIG_H 
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(CXXOBJFILE) $(OPTFLAGS) $(CFLAGS) $(CXXFILE) -I$(PYDIR) -I$(SIMDIR)
+	$(GPP) -c $(PLATFORM_CC_FLAGS) $(PLATFORM_FLAGS) -o $(HASHOBJFILE) $(OPTFLAGS) $(CFLAGS) $(HASHFILE) -I$(PYDIR) -I$(SIMDIR)
+	@echo "  linking into shared object ./$(SHARED_OBJECT)"
+	$(GPP) $(PLATFORM_BUILD_FLAGS) $(PLATFORM_CC_FLAGS) $(PYOBJFILE) $(OBJFILE) $(CXXOBJFILE) $(HASHOBJFILE) $(PLATFORM_LIB_FLAGS) -o $(SHARED_OBJECT)
+	@echo "  copying Python script interface TOSSIM.py from lib/tossim to local directory"
+	@cp $(TOSDIR)/lib/tossim/TOSSIM.py .
+	@echo " "
+	@echo "*** Successfully built $(PLATFORM) TOSSIM library. "
+
diff --git a/support/make/span.target b/support/make/span.target
new file mode 100644
index 00000000..d04d8107
--- /dev/null
+++ b/support/make/span.target
@@ -0,0 +1,17 @@
+PLATFORM = span
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+MSP_BSL ?= tos-bsl
+MSP_BSL_FLAGS = --invert-test --invert-reset
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,msp)
+
+span: $(BUILD_DEPS)
+	@:
diff --git a/support/make/stack-check.extra b/support/make/stack-check.extra
new file mode 100644
index 00000000..b649d43c
--- /dev/null
+++ b/support/make/stack-check.extra
@@ -0,0 +1,3 @@
+#-*-Makefile-*- vim:syntax=make
+
+STACK_CHECK = 1
diff --git a/support/make/telos.target b/support/make/telos.target
new file mode 100644
index 00000000..246dbd6d
--- /dev/null
+++ b/support/make/telos.target
@@ -0,0 +1,13 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: telos.target,v 1.4 2006-12-12 18:22:55 vlahan Exp $
+
+TELOS_REV ?= A
+
+ifeq ($(TELOS_REV),A)
+  TELOS_TARGET = telosa.target
+else
+  TELOS_TARGET = telosb.target
+endif
+
+$(call TOSMake_include,$(TELOS_TARGET))
+
diff --git a/support/make/telosa.target b/support/make/telosa.target
new file mode 100644
index 00000000..eac0e515
--- /dev/null
+++ b/support/make/telosa.target
@@ -0,0 +1,28 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: telosa.target,v 1.6 2008-03-11 09:34:13 klueska Exp $
+
+PLATFORM ?= telosa
+
+MSP_MCU = msp430x149
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+MSP_BSL ?= tos-bsl
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+VOLUME_FILE = volumes-at45db.xml
+VOLUME_ALLOCATOR ?= tos-storage-at45db
+
+$(call TOSMake_include_platform,msp)
+
+telos: $(BUILD_DEPS)
+	@:
+
+telosa: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/telosb.target b/support/make/telosb.target
new file mode 100644
index 00000000..a4c6d056
--- /dev/null
+++ b/support/make/telosb.target
@@ -0,0 +1,28 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: telosb.target,v 1.5 2008-03-11 09:34:13 klueska Exp $
+
+PLATFORM ?= telosb
+
+#MSP_MCU = msp430x1611
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+OPTFLAGS += -O
+
+MSP_BSL ?= tos-bsl
+MSP_BSL_FLAGS = --telosb
+
+VOLUME_FILE = volumes-stm25p.xml
+VOLUME_ALLOCATOR ?= tos-storage-stm25p
+
+ifdef CC2420_CHANNEL
+PFLAGS += -DCC2420_DEF_CHANNEL=$(CC2420_CHANNEL)
+endif
+
+$(call TOSMake_include_platform,msp)
+
+telos: $(BUILD_DEPS)
+	@:
+
+telosb: $(BUILD_DEPS)
+	@:
diff --git a/support/make/tframe.extra b/support/make/tframe.extra
new file mode 100644
index 00000000..f6927788
--- /dev/null
+++ b/support/make/tframe.extra
@@ -0,0 +1,9 @@
+# Makefile extra for compiling 802.15.4 TinyOS apps with t-frames.
+# T-frames are not interoperable with 6lowpan networks.
+# Please see TEP 125 for details.
+# Philip Levis, June 15 2008.
+
+#Include directory where T-Frame implementation lies.
+CFLAGS += -DTFRAMES_ENABLED
+
+
diff --git a/support/make/threads.extra b/support/make/threads.extra
new file mode 100644
index 00000000..6d2b2945
--- /dev/null
+++ b/support/make/threads.extra
@@ -0,0 +1,148 @@
+# Extra threads Makefile target to enable thread support for tinyos
+# Kevin Klues May 16th, 2008
+# Chieh-Jan Mike Liang July 11th, 2008
+
+#Set up flag signifying threads are enabled
+THREADS = THREADS
+PFLAGS += -D$(THREADS)
+TOS_THREADS_DIR ?= $(TOSDIR)/lib/tosthreads
+
+#Include directories required by all platforms and mcus
+CFLAGS += -I$(TOS_THREADS_DIR)/system
+CFLAGS += -I$(TOS_THREADS_DIR)/interfaces
+CFLAGS += -I$(TOS_THREADS_DIR)/types
+CFLAGS += -I$(TOS_THREADS_DIR)/lib/serial
+
+#Setup the thread scheduler for use by redefining the name of the task scheduler to use
+PFLAGS += -tosscheduler=TinyTaskSchedulerC,TinyTaskSchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+#Msp430 specific include directories on tested platforms
+THREADS_MSP430_DIR = $(TOS_THREADS_DIR)/chips/msp430
+THREADS_MSP430_INCLUDE_DIRS = -I$(THREADS_MSP430_DIR)
+THREADS_MSP430_INCLUDE_DIRS += -I$(THREADS_MSP430_DIR)/adc12
+THREADS_MSP430_INCLUDE_DIRS += -I$(THREADS_MSP430_DIR)/sensors
+
+#Atm128 specific include directories on tested platforms
+THREADS_ATM128_DIR = $(TOS_THREADS_DIR)/chips/atm128
+THREADS_ATM128_INCLUDE_DIRS = -I$(THREADS_ATM128_DIR)
+THREADS_ATM128_INCLUDE_DIRS += -I$(THREADS_ATM128_DIR)/adc
+
+#Atm1281 specific include directories on tested platforms
+THREADS_ATM1281_DIR = $(TOS_THREADS_DIR)/chips/atm1281
+THREADS_ATM1281_INCLUDE_DIRS = -I$(THREADS_ATM1281_DIR)
+
+#CC1000 specific include directories on tested platforms
+THREADS_CC1000_DIR = $(TOS_THREADS_DIR)/chips/cc1000
+THREADS_CC1000_INCLUDE_DIRS = -I$(THREADS_CC1000_DIR)
+
+#CC2420 specific include directories on tested platforms
+THREADS_CC2420_DIR = $(TOS_THREADS_DIR)/chips/cc2420
+THREADS_CC2420_INCLUDE_DIRS = -I$(THREADS_CC2420_DIR)
+
+#RF230 specific include directories on tested platforms
+THREADS_RF230_DIR = $(TOS_THREADS_DIR)/chips/rf230
+THREADS_RF230_INCLUDE_DIRS = -I$(THREADS_RF230_DIR)
+
+#TDA5250 specific include directories on tested platforms
+THREADS_TDA5250_DIR = $(TOS_THREADS_DIR)/chips/tda5250
+THREADS_TDA5250_INCLUDE_DIRS = -I$(THREADS_TDA5250_DIR)
+
+#XE1205 specific include directories on tested platforms
+THREADS_XE1205_DIR = $(TOS_THREADS_DIR)/chips/xe1205
+THREADS_XE1205_INCLUDE_DIRS = -I$(THREADS_XE1205_DIR)
+
+#Telos specific include directories
+THREADS_TELOS_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/telosa
+
+#Mica2 specific include directories
+THREADS_MICA2_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/mica2
+THREADS_MICA2_INCLUDE_DIRS += -I$(TOS_THREADS_DIR)/platforms/mica2/chips/cc1000
+
+#Mica2dot specific include directories
+THREADS_MICA2DOT_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/mica2dot
+THREADS_MICA2DOT_INCLUDE_DIRS += -I$(TOS_THREADS_DIR)/platforms/mica2dot/chips/cc1000
+
+#MicaZ specific include directories
+THREADS_MICAZ_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/micaz
+
+#IRIS specific include directories
+THREADS_IRIS_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/iris
+
+#TinyNode specific include directories
+THREADS_TINYNODE_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/tinynode
+
+#eyesIFX specific include directories
+THREADS_EYES_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/eyesIFX
+
+#Shimmer specific include directories
+THREADS_SHIMMER_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/shimmer
+
+#Epic specific include directories
+THREADS_EPIC_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/epic
+
+#M16c62p specific include directories on tested platforms
+THREADS_M16C62P_DIR = $(TOS_THREADS_DIR)/chips/m16c62p
+THREADS_M16C62P_INCLUDE_DIRS = -I$(THREADS_M16C62P_DIR)
+
+#Mulle specific include directories
+THREADS_MULLE_INCLUDE_DIRS = -I$(TOS_THREADS_DIR)/platforms/mulle
+
+#Add CFLAGS for supported platforms
+ifneq ($(filter telos telosa telosb tmote,$(MAKECMDGOALS)),)
+  CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_CC2420_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_TELOS_INCLUDE_DIRS)
+  
+  #Since Telosb has some sensors not on other platforms, this helps us figure out
+  #what components should be included
+  ifneq ($(filter telosb,$(MAKECMDGOALS)),)
+    CFLAGS += -DPLATFORM_TELOSB
+  endif
+endif
+ifneq ($(filter epic,$(MAKECMDGOALS)),)
+  CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_CC2420_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_EPIC_INCLUDE_DIRS)
+endif
+ifneq ($(filter mica2,$(MAKECMDGOALS)),)
+  CFLAGS += $(THREADS_ATM128_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_CC1000_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_MICA2_INCLUDE_DIRS)
+endif
+ifneq ($(filter mica2dot,$(MAKECMDGOALS)),)
+  CFLAGS += $(THREADS_ATM128_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_CC1000_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_MICA2DOT_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_MICA2_INCLUDE_DIRS)
+endif
+ifneq ($(filter micaz,$(MAKECMDGOALS)),)
+  CFLAGS += $(THREADS_ATM128_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_CC2420_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_MICAZ_INCLUDE_DIRS)
+endif
+ifneq ($(filter iris,$(MAKECMDGOALS)),)
+  CFLAGS += $(THREADS_ATM1281_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_ATM128_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_RF230_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_IRIS_INCLUDE_DIRS)
+endif
+ifneq ($(filter tinynode,$(MAKECMDGOALS)),) 
+  CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_XE1205_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_TINYNODE_INCLUDE_DIRS)
+endif
+ifneq ($(filter eyesIFX eyesIFXv2,$(MAKECMDGOALS)),)
+  CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_TDA5250_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_EYES_INCLUDE_DIRS)
+endif
+ifneq ($(filter shimmer,$(MAKECMDGOALS)),)
+  CFLAGS += $(THREADS_MSP430_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_CC2420_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_SHIMMER_INCLUDE_DIRS)
+endif
+ifneq ($(filter mulle,$(MAKECMDGOALS)),)
+  CFLAGS += $(THREADS_M16C62P_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_RF230_INCLUDE_DIRS)
+  CFLAGS += $(THREADS_MULLE_INCLUDE_DIRS)
+endif
diff --git a/support/make/tinynode.target b/support/make/tinynode.target
new file mode 100644
index 00000000..42c8ddb4
--- /dev/null
+++ b/support/make/tinynode.target
@@ -0,0 +1,28 @@
+#-*-Makefile-*- 
+#$Id: tinynode.target,v 1.5 2008-03-11 09:34:13 klueska Exp $
+
+PLATFORM = tinynode
+
+ifndef TOSDIR
+TOSDIR := $(shell ncc -print-tosdir)
+endif
+
+MSP_BSL ?= tos-bsl
+
+#Flash Config
+VOLUME_FILE = volumes-at45db.xml
+VOLUME_ALLOCATOR ?= tos-storage-at45db
+
+OPTFLAGS += -Os
+#OPTFLAGS = 
+
+# Disable MSP430 hardware multiply because it makes MSPGCC die
+PFLAGS += -mdisable-hwmul
+PFLAGS += -mstrict-align
+
+$(call TOSMake_include_platform,tinynode)
+$(call TOSMake_include_platform,msp)
+
+tinynode: $(BUILD_DEPS)
+	@:
+
diff --git a/support/make/tinynode/bsl.extra b/support/make/tinynode/bsl.extra
new file mode 100644
index 00000000..7e07744a
--- /dev/null
+++ b/support/make/tinynode/bsl.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: bsl.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $
+
+MSP_BSL_FLAGS += --invert-reset
+
diff --git a/support/make/tinynode/digi.extra b/support/make/tinynode/digi.extra
new file mode 100644
index 00000000..9550dea7
--- /dev/null
+++ b/support/make/tinynode/digi.extra
@@ -0,0 +1,5 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: digi.extra,v 1.4 2006-12-12 18:22:59 vlahan Exp $
+
+MSP_BSL_FLAGS = --slow --invert-test
+
diff --git a/support/make/tinynode/flash.gdb.in b/support/make/tinynode/flash.gdb.in
new file mode 100644
index 00000000..f1aadeeb
--- /dev/null
+++ b/support/make/tinynode/flash.gdb.in
@@ -0,0 +1,7 @@
+# Erase and program flash.
+monitor erase all
+load @EXE@
+
+# Reset the chip to get to a known state.
+monitor reset
+flushregs
diff --git a/support/make/tinynode/gdb.extra b/support/make/tinynode/gdb.extra
new file mode 100644
index 00000000..76e3a3a0
--- /dev/null
+++ b/support/make/tinynode/gdb.extra
@@ -0,0 +1,26 @@
+#-*-Makefile-*- 
+PROGRAM = gdb
+
+INIT_GDB = $(call TOSMake_find,tinynode/init.gdb.in)
+
+FLASH_GDB ?= $(call TOSMake_find,tinynode/flash.gdb.in)
+FLASH_GDB_NO_E ?= $(call TOSMake_find,tinynode/flashnoerase.gdb.in)
+
+PROXY_HOST ?= localhost
+ifdef BATCH
+	GDB_ARGS = -batch
+endif
+
+
+program:	FORCE
+	cat $(INIT_GDB) $(FLASH_GDB) $(GDB_SCRIPT) | sed -e "s/@HOST@/$(PROXY_HOST)/g" -e "s#@EXE@#$(MAIN_EXE)#g" -e "s#@PROMPT@#msp-gdb $(COMPONENT)#g"> build/init.gdb;	\
+	msp430-gdb $(GDB_ARGS) -silent -x build/init.gdb -se $(MAIN_EXE);				\
+ 
+program_no_e: FORCE
+	@echo "    ...done"
+
+program_bl: FORCE
+	@echo "    installing $(PLATFORM) bootloader using gdb"
+	@echo "    installing $(PLATFORM) binary using gdb (without mass erase)"
+	cat $(INIT_GDB) $(FLASH_GDB) $(FLASH_GDB_NO_E) $(GDB_SCRIPT) | sed -e "s/@HOST@/$(PROXY_HOST)/g" -e "s#@EXE@#$(BOOTLOADER_IMG)#g" -e "s#@MAIN@#$(MAIN_EXE)#g" -e "s#@PROMPT@#msp-gdb $(COMPONENT)#g"> build/init.gdb;	\
+	msp430-gdb $(GDB_ARGS) -silent -x build/init.gdb -se $(MAIN_EXE);
\ No newline at end of file
diff --git a/support/make/tinynode/init.gdb.in b/support/make/tinynode/init.gdb.in
new file mode 100644
index 00000000..ffa51d1e
--- /dev/null
+++ b/support/make/tinynode/init.gdb.in
@@ -0,0 +1,27 @@
+set complaints 1
+#set output-radix 16
+#set input-radix 16
+
+dir .
+set prompt (@PROMPT@) 
+
+# Various personal settings
+display/i $pc
+
+# Connect to msp430-gdbproxy.
+set remoteaddresssize 16
+set remotetimeout 999999
+target remote @HOST@:3333
+
+# Increase the packet size to improve upload speed.
+set remote memory-read-packet-size 1024
+set remote memory-read-packet-size fixed
+set remote memory-write-packet-size 1024
+set remote memory-write-packet-size fixed
+
+b 'XE1205PhyP$xe1205error' 
+b 'XE1205SpiImplP$xe1205error' 
+b 'XE1205SendReceiveP$xe1205error' 
+b 'XE1205IrqConfP$xe1205error' 
+b 'XE1205PhyRssiConfP$xe1205error' 
+#b 'TestXE1205C$xe1205error'
diff --git a/support/make/tinynode/noflash.extra b/support/make/tinynode/noflash.extra
new file mode 100644
index 00000000..badbe5be
--- /dev/null
+++ b/support/make/tinynode/noflash.extra
@@ -0,0 +1 @@
+FLASH_GDB = $(call TOSMake_find,tinynode/noflash.gdb.in)
diff --git a/support/make/tinynode/noflash.gdb.in b/support/make/tinynode/noflash.gdb.in
new file mode 100644
index 00000000..19d8bdf2
--- /dev/null
+++ b/support/make/tinynode/noflash.gdb.in
@@ -0,0 +1,3 @@
+# Reset the chip to get to a known state.
+monitor reset
+flushregs
diff --git a/support/make/tinynode/tinynode.rules b/support/make/tinynode/tinynode.rules
new file mode 100644
index 00000000..6d11b769
--- /dev/null
+++ b/support/make/tinynode/tinynode.rules
@@ -0,0 +1,3 @@
+ifndef NOWIRING
+include $(TINYOS_MAKE_PATH)/wiring.extra
+endif
diff --git a/support/make/tinynode/xedebug.in b/support/make/tinynode/xedebug.in
new file mode 100644
index 00000000..4c697495
--- /dev/null
+++ b/support/make/tinynode/xedebug.in
@@ -0,0 +1,3 @@
+b 'XE1205PhyP$xe1205error' 
+b 'XE1205SpiImplP$xe1205error' 
+b 'XE1205IrqConfP$xe1205error' 
diff --git a/support/make/tmote.target b/support/make/tmote.target
new file mode 100644
index 00000000..e67ec693
--- /dev/null
+++ b/support/make/tmote.target
@@ -0,0 +1,17 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: tmote.target,v 1.4 2006-12-12 18:22:55 vlahan Exp $
+
+TMOTE_REV ?= SKY
+
+# tmote sky == telosb
+ifeq ($(TMOTE_REV),SKY)
+  TMOTE_TARGET = telosb.target
+endif
+
+# if tmote rev is unknown, use telosb
+TMOTE_TARGET ?= telosb.target
+
+$(call TOSMake_include,$(TMOTE_TARGET))
+
+tmote: $(BUILD_DEPS)
+	@:
\ No newline at end of file
diff --git a/support/make/tos_buildinfo.extra b/support/make/tos_buildinfo.extra
new file mode 100644
index 00000000..a73bdebd
--- /dev/null
+++ b/support/make/tos_buildinfo.extra
@@ -0,0 +1,9 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: tos_buildinfo.extra,v 1.1 2007-08-17 15:47:30 beutel Exp $
+
+TOS_BUILDINFO_PL ?= tos-write-buildinfo
+IDENT_PROGRAM_NAME ?= $(COMPONENT)
+
+build_buildinfo: FORCE
+	@echo "    writing TOS buildinfo"
+	@$(TOS_BUILDINFO_PL) $(IDENT_FLAGS) --exe="$(MAIN_EXE)" --size="$(SIZE)" --platform="$(PLATFORM)" > $(BUILDDIR)/tos_buildinfo.xml
diff --git a/support/make/tos_image.extra b/support/make/tos_image.extra
new file mode 100644
index 00000000..2db07c6d
--- /dev/null
+++ b/support/make/tos_image.extra
@@ -0,0 +1,9 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: tos_image.extra,v 1.5 2007-04-27 05:01:25 prabal Exp $
+
+TOS_IMAGE_PL ?= tos-write-image
+IDENT_PROGRAM_NAME ?= $(COMPONENT)
+
+build_tosimage: FORCE
+	@echo "    writing TOS image"
+	@$(TOS_IMAGE_PL) $(IDENT_FLAGS) --ihex="$(MAIN_IHEX)" --exe="$(MAIN_EXE)" --objdump="$(OBJDUMP)" --platform="$(PLATFORM)" > $(BUILDDIR)/tos_image.xml
diff --git a/support/make/tosboot.extra b/support/make/tosboot.extra
new file mode 100644
index 00000000..db9d71eb
--- /dev/null
+++ b/support/make/tosboot.extra
@@ -0,0 +1,58 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: tosboot.extra,v 1.4 2009-11-10 07:03:34 rflury Exp $
+
+DELUGE_DIR ?= $(TOSDIR)/lib/net/Deluge
+DELUGE_EXTRA ?= $(DELUGE_DIR)/extra
+TOSBOOT_DIR ?= $(TOSDIR)/lib/tosboot/build
+
+ifeq ($(BOOTLOADER),tosboot)
+
+  CFLAGS += -DDELUGE
+  CFLAGS += -I$(TOSDIR)/lib/net -I$(TOSDIR)/lib/net/drip -I$(DELUGE_DIR) -I$(DELUGE_DIR)/FlashVolumeManager -I$(DELUGE_DIR)/BlockStorageManager
+
+  ifneq ($(filter telosb tmote epic,$(TARGETS)),)
+    CFLAGS += -I$(DELUGE_EXTRA) -I$(DELUGE_EXTRA)/msp430 -I$(DELUGE_EXTRA)/telos
+    ifeq ($(filter docs,$(GOALS)),)
+      CFLAGS += -Wl,--section-start=.text=0x4a00,--defsym=_reset_vector__=0x4000
+    endif
+    ifeq ($(TARGETS),telosb)
+	CFLAGS += -I$(DELUGE_EXTRA)/telosb
+	BOOTLOADER_IMG ?= $(TOSBOOT_DIR)/telosb/main.ihex
+    endif
+    ifeq ($(TARGETS),epic)
+	CFLAGS += -I$(DELUGE_EXTRA)/epic
+	BOOTLOADER_IMG ?= $(TOSBOOT_DIR)/epic/main.ihex
+    endif
+    ifeq ($(shell [ -f /bin/cygwin1.dll ] && echo cygwin),cygwin)
+      BOOTLOADER_IMG := $(shell cygpath -m $(BOOTLOADER_IMG))
+    endif
+  endif
+
+  ifeq ($(TARGETS),micaz)
+    CFLAGS += -I$(DELUGE_EXTRA) -I$(DELUGE_EXTRA)/avr -I$(DELUGE_EXTRA)/micaz -I$(DELUGE_EXTRA)/mica2
+    BOOTLOADER_IMG ?= $(TOSBOOT_DIR)/micaz/main.ihex
+    AVR_FUSE_H ?= 0xda
+  endif
+
+  ifeq ($(TARGETS),mulle)
+    CFLAGS += -I$(DELUGE_EXTRA) -I$(DELUGE_EXTRA)/mulle -I$(DELUGE_EXTRA)/m16c62p
+    BOOTLOADER_IMG ?= $(TOSBOOT_DIR)/mulle/main.srec
+  endif
+
+  ifeq ($(TARGETS),iris)
+    CFLAGS += -I$(DELUGE_EXTRA)/iris -I$(DELUGE_EXTRA)/micaz -I$(DELUGE_EXTRA)/mica2 -I$(DELUGE_EXTRA)/avr -I$(DELUGE_EXTRA)
+    BOOTLOADER_IMG ?= $(TOSBOOT_DIR)/iris/main.ihex
+    AVR_FUSE_H ?= 0xda
+  endif
+
+   ifeq ($(TARGETS),tinynode)
+		CFLAGS += -I$(DELUGE_EXTRA)/tinynode
+		CFLAGS += -I$(DELUGE_EXTRA) -I$(DELUGE_EXTRA)/msp430 -I$(DELUGE_EXTRA)/msp430f1611 
+     ifeq ($(filter docs,$(GOALS)),)
+			CFLAGS += -Wl,--section-start=.text=0x4a00,--defsym=_reset_vector__=0x4000
+     endif
+		BOOTLOADER_IMG ?= $(TOSBOOT_DIR)/tinynode/main.ihex
+   endif
+
+
+endif
diff --git a/support/make/tunit.extra b/support/make/tunit.extra
new file mode 100644
index 00000000..93c5e468
--- /dev/null
+++ b/support/make/tunit.extra
@@ -0,0 +1,12 @@
+#-*-Makefile-*- vim:syntax=make
+#$Id: tunit.extra,v 1.1 2008-03-10 21:55:20 rincon Exp $
+# @author Miklos Maroti
+
+CFLAGS += -I$(TOSCONTRIB)/tunit/tos/lib/tunit
+CFLAGS += -I$(TOSCONTRIB)/tunit/tos/lib/tunitstats
+CFLAGS += -I$(TOSCONTRIB)/tunit/tos/system/
+CFLAGS += -I$(TOSCONTRIB)/tunit/tos/interfaces
+CFLAGS += -I$(TOSCONTRIB)/tunit/tos/lib/directserial
+CFLAGS += -I$(TOSCONTRIB)/tunit/tos/lib/fifoqueue
+
+CFLAGS += $(TUNITCFLAGS)
diff --git a/support/make/verbose.extra b/support/make/verbose.extra
new file mode 100644
index 00000000..741b21fe
--- /dev/null
+++ b/support/make/verbose.extra
@@ -0,0 +1,6 @@
+#-*-Makefile-*- vim:syntax=make
+# @file	verbose.extra
+# @author	Martin Turon
+# $Id: verbose.extra,v 1.4 2006-12-12 18:22:55 vlahan Exp $
+
+PFLAGS += -v
diff --git a/support/make/wiring.extra b/support/make/wiring.extra
new file mode 100644
index 00000000..c7c04661
--- /dev/null
+++ b/support/make/wiring.extra
@@ -0,0 +1,4 @@
+#-*-Makefile-*- vim:syntax=make
+
+WIRING_CHECK_FLAGS = -fnesc-dump=wiring -fnesc-dump='interfaces(!abstract())' -fnesc-dump='referenced(interfacedefs, components)' -fnesc-dumpfile=$(WIRING_CHECK_FILE)
+WIRING_CHECK_FILE = $(BUILDDIR)/wiring-check.xml
diff --git a/support/sdk/c/6lowpan/serial_tun/6lowpan.h b/support/sdk/c/6lowpan/serial_tun/6lowpan.h
new file mode 100644
index 00000000..64bb5e8d
--- /dev/null
+++ b/support/sdk/c/6lowpan/serial_tun/6lowpan.h
@@ -0,0 +1,378 @@
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * The structures are based on the ones from FreeBSD header files
+ * in /usr/include/netinet6/, which are distributed unred the following
+ * copyright:
+ *
+ * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * Copyright (c) 1982, 1986, 1990, 1993
+ *      The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef __6LOWPAN_H__
+#define __6LOWPAN_H__
+
+#include <sys/types.h>
+
+typedef uint8_t u_int8_t;
+typedef uint16_t u_int16_t;
+typedef uint32_t u_int32_t;
+
+#define LOWPAN_MTU 1280
+#define LOWPAN_OVERHEAD 17
+// 16 bytes opt. headers and 1 byte dispatch
+#define LINK_DATA_MTU 100
+// 802.15.4 space left after the 802.15.4 header: 128 - xx = 102 bytes max
+
+/* Active Message */
+typedef struct __attribute__ ((__packed__))_AMPacket_t {
+    uint8_t  pkt_type;
+    uint16_t dst;
+    uint16_t src;
+    uint8_t  length;
+    uint8_t  group;
+    uint8_t  type;
+    uint8_t data[LINK_DATA_MTU];
+} am_packet_t;
+  
+/* 802.15.4 address */
+enum {
+    HW_ADDR_SHORT,
+    HW_ADDR_LONG
+};
+
+typedef struct hw_addr {
+    uint8_t type; // HW_ADDR_SHORT | HW_ADDR_LONG
+    union {
+	uint8_t addr_short[2];
+	uint8_t addr_long[8];
+    };
+} hw_addr_t;
+
+/* IPv6 address */
+typedef struct __attribute__ ((__packed__)) _ip_6_addr_t {
+    uint8_t addr[16];
+} ip6_addr_t;
+
+
+#define FRAG_BUFS 1
+#define FRAG_BUF_SIZE 1280
+#define FRAG_TIMEOUT 60
+// 60 seconds
+#define FRAG_FREE -1
+
+#define LOWPAN_APP_DATA_LEN 1517
+//#define LOWPAN_HEADER_LEN 49
+#define LOWPAN_HEADER_LEN 102
+
+#define DISPATCH_UNCOMPRESSED_IPV6 0x41
+#define DISPATCH_COMPRESSED_IPV6 0x42
+
+#define DISPATCH_FIRST_FRAG 0xC0
+#define DISPATCH_SUBSEQ_FRAG 0xE0
+#define DISPATCH_FRAG_MASK 0xF8
+
+#define DISPATCH_BC0 0x50
+
+#define DISPATCH_MESH 0x80
+#define DISPATCH_MESH_MASK 0xC0
+#define DISPATCH_MESH_O_FLAG 0x20
+#define DISPATCH_MESH_F_FLAG 0x10
+#define DISPATCH_MESH_HOPSLEFT_MASK 0x0F
+
+enum {
+    HC1_SRC_PREFIX_MASK = 0x80,
+    HC1_SRC_PREFIX_LINKLOCAL = 0x80,
+    HC1_SRC_PREFIX_INLINE = 0,
+    HC1_SRC_IFACEID_MASK = 0x40,
+    HC1_SRC_IFACEID_COMRP = 0x40,
+    HC1_SRC_IFACEID_INLINE = 0,
+
+    HC1_DST_PREFIX_MASK = 0x20,
+    HC1_DST_PREFIX_LINKLOCAL = 0x20,
+    HC1_DST_PREFIX_INLINE = 0,
+    HC1_DST_IFACEID_MASK = 0x10,
+    HC1_DST_IFACEID_COMRP = 0x10,
+    HC1_DST_IFACEID_INLINE = 0,
+
+    HC1_TCFL_MASK = 0x08,
+    HC1_TCFL_ZERO = 0x08,
+    HC1_TCFL_INLINE = 0,
+
+    HC1_NEXTHDR_MASK = 0x06,
+    HC1_NEXTHDR_INLINE = 0,
+    HC1_NEXTHDR_UDP = 0x02,
+    HC1_NEXTHDR_ICMP = 0x04,
+    HC1_NEXTHDR_TCP = 0x06,
+
+    HC1_HC2_MASK = 0x01,
+    HC1_HC2_PRESENT = 0x01,
+    HC1_HC2_NONE = 0,
+    
+    HC2_UDP_P_VALUE = 0x61616,
+
+    HC2_UDP_SRC_PORT_MASK = 0x80,
+    HC2_UDP_SRC_PORT_COMPR = 0x80,
+    HC2_UDP_SRC_PORT_INLINE = 0,
+
+    HC2_UDP_DST_PORT_MASK = 0x40,
+    HC2_UDP_DST_PORT_COMPR = 0x40,
+    HC2_UDP_DST_PORT_INLINE = 0,
+
+    HC2_UDP_LEN_MASK = 0x20,
+    HC2_UDP_LEN_COMPR = 0x20,
+    HC2_UDP_LEN_INLINE = 0
+};
+
+typedef struct _frag_info_t {
+    uint8_t offset;
+    uint8_t len;
+    struct _frag_info_t *next;
+} frag_info_t;
+
+/*
+ * sending - application provides app_data and clears app_data_dealloc
+ *         - a pointer to app_data is returned in sendDone to do deallocation
+ * receiving and fragment reassembly
+ *           - IP_M provides app_data and sets app_data_dealloc
+ *           - header_begin/end is set to point into app_data
+ *             and the received packet is put into app_data
+ *           - header_len should probably be set to a sane value (0)
+ *             and header to NULL or leave as is?
+ * receiving without fragment reassembly
+ *           - the complete 802.15.4 frame is put into header
+ *             (802.15.4 header is left out)
+ */
+typedef struct _lowpan_pkt_t {
+    /* buffers */
+    uint8_t buf[LOWPAN_MTU + LOWPAN_OVERHEAD];
+    uint8_t *buf_begin; // start of data in the buffer
+    uint16_t len; // length of data in the buffer
+    /* fragmentation */
+    uint8_t frag_state;
+    uint16_t dgram_tag; // network byte order
+    uint16_t dgram_size; // host byte order
+    time_t frag_timeout; // fragment reassembly times out at tv_sec */
+    union {
+	uint8_t frag_offset; // sending - offset where next fragment starts
+	frag_info_t *frag_list; // sorted by offset in decreasing order
+    };
+    /* IP addresses */
+    ip6_addr_t ip_src_addr; /* needed for ND and usefull elsewhere */ 
+    ip6_addr_t ip_dst_addr; /* both IP addresses filled in by ipv6*_input */
+    /* 802.15.4 addresses */
+    hw_addr_t hw_src_addr; 
+    hw_addr_t hw_dst_addr; /* 802.15.4 MAC addresses
+			    * needed for fragment identification
+			    * possibly needed for 6lowpan IPv6 header
+			    * decompression
+			    * contains mesh header entries if available
+			    */
+    uint8_t nd_state;
+    struct _lowpan_pkt_t *next;
+} lowpan_pkt_t;
+
+/* /\* fragment reassembly buffer *\/ */
+/* struct frag_buf { */
+/*     hw_addr_t hw_src_addr; */
+/*     hw_addr_t hw_dst_addr; */
+/*     time_t frag_timeout; */
+/*     uint8_t buf[FRAG_BUF_SIZE]; */
+/*     lowpan_pkt_t pkt; */
+/* }; */
+
+enum {
+    FRAG_NONE = 0,
+    FRAG_6LOWPAN = 1,
+    FRAG_IPV6 = 2,
+
+    ND_DONE = 0,
+    ND_TODO = 1,
+    ND_SENT = 2,
+    
+    APP_DATA_DEALLOC_FALSE = 0,
+    APP_DATA_DEALLOC_TRUE = 1
+};
+
+struct __attribute__ ((__packed__)) lowpan_mesh_hdr {
+    uint8_t dispatch; // dispatch, flags and hops left
+    // address length depends on flags in dispatch
+};
+
+struct __attribute__ ((__packed__)) lowpan_broadcast_hdr {
+    uint8_t dispatch;
+    uint8_t seq_no; // sequence number
+};
+
+struct __attribute__ ((__packed__)) lowpan_frag_hdr {
+    union __attribute__ ((__packed__)) {
+	uint8_t dispatch;
+	uint16_t dgram_size;
+	uint8_t dgram_size8[2];
+    };
+    uint16_t dgram_tag;
+};
+
+/*
+ * Definition for internet protocol version 6.
+ * RFC 2460
+ */
+
+struct __attribute__ ((__packed__)) ip6_hdr {
+    union {
+	uint8_t  vtc;    /* 4 bits version, top 4 bits class label*/
+	uint32_t flow;   /* 20 bits flow label at the end */
+    };
+    uint16_t  plen;      /* payload length */
+    uint8_t   nxt_hdr;       /* next header */
+    uint8_t   hlim;      /* hop limit */
+    ip6_addr_t src_addr; /* source address */
+    ip6_addr_t dst_addr; /* destination address */
+};
+
+#define IPV6_VERSION            0x60
+#define IPV6_VERSION_MASK       0xf0
+
+/*
+ * Extension Headers
+ */
+
+struct  ip6_ext {
+        uint8_t ip6e_nxt;
+        uint8_t ip6e_len;
+};
+
+
+struct  icmp6_hdr {
+        uint8_t        type;     /* type field */
+        uint8_t        code;     /* code field */
+        uint16_t       cksum;    /* checksum field */
+        union {
+                uint32_t       icmp6_un_data32[1]; /* type-specific field */
+                uint16_t       icmp6_un_data16[2]; /* type-specific field */
+                uint8_t        icmp6_un_data8[4];  /* type-specific field */
+        } icmp6_dataun;
+};
+
+enum {
+    ICMP_TYPE_ECHO_DEST_UNREACH     = 1,
+    ICMP_TYPE_ECHO_PKT_TOO_BIG      = 129,
+    ICMP_TYPE_ECHO_TIME_EXCEEDED    = 129,
+    ICMP_TYPE_ECHO_PARAM_PROBLEM    = 129,
+    ICMP_TYPE_ECHO_REQUEST          = 128,
+    ICMP_TYPE_ECHO_REPLY            = 129
+};
+
+/*
+ * UDP protocol header.
+ * Per RFC 768, September, 1981.
+ */
+struct __attribute__ ((__packed__)) udp_hdr {
+    uint16_t src_port;               /* source port */
+    uint16_t dst_port;               /* destination port */
+    uint16_t len;                   /* udp length */
+    uint16_t chksum;                /* udp checksum */
+};
+
+enum {
+    //NEXT_HEADER_ICMP = 1,
+    NEXT_HEADER_TCP = 6,
+    NEXT_HEADER_UDP = 17,
+    NEXT_HEADER_ICMP6 = 58
+};
+
+
+// from uip-1.0/uip/uip-neighbor.c
+#define NEIGHBOR_MAX_TIME 128
+
+#ifndef NEIGHBOR_ENTRIES
+#define NEIGHBOR_ENTRIES 8
+#endif
+
+struct neighbor_entry {
+  ip6_addr_t ip_addr;
+  struct hw_addr hw_addr;
+  uint8_t time;
+};
+struct neighbor_entry neighbor_entries[NEIGHBOR_ENTRIES];
+
+#endif /* __6LOWPAN_H__ */
diff --git a/support/sdk/c/6lowpan/serial_tun/Makefile b/support/sdk/c/6lowpan/serial_tun/Makefile
new file mode 100644
index 00000000..de7953ba
--- /dev/null
+++ b/support/sdk/c/6lowpan/serial_tun/Makefile
@@ -0,0 +1,18 @@
+#CPPFLAGS =
+#LDFLAGS = 
+FLAGS=
+FLAGS+=-Wall
+FLAGS+=-g
+FLAGS+=-I${TOSROOT}/support/sdk/c/sf
+
+all: serial_tun
+
+serial_tun: serial_tun.c tun_dev.c 6lowpan.h
+	gcc $(FLAGS) -o serial_tun serial_tun.c tun_dev.c ${TOSROOT}/support/sdk/c/sf/libmote.a
+
+clean:
+	rm -f serial_tun TAGS
+
+TAGS:
+	rm -f TAGS
+	etags *.c *.h
diff --git a/support/sdk/c/6lowpan/serial_tun/README b/support/sdk/c/6lowpan/serial_tun/README
new file mode 100644
index 00000000..0f09e4c0
--- /dev/null
+++ b/support/sdk/c/6lowpan/serial_tun/README
@@ -0,0 +1,14 @@
+A daemon reading 6lowpan packets from the mote running the BaseStation
+application via a USB interface, translating them to Ipv6 packets,
+writing them to a tun interface and the other way round, i.e., reading
+IPv6 packets from a tun interface, encapsulating them as 6lowpan
+packets and sedning them to the mote.
+
+To build the daemon you also need to build the libmote.a library in
+$TOSROOT/support/sdk/c/.
+
+Usage with a TelosB mote:
+	sudo ./serial_tun /dev/ttyUSB0 115200
+
+The Active Message address 12 and the corresponding IPv6 addresses are
+are hardcoded in the source code.
diff --git a/support/sdk/c/6lowpan/serial_tun/build.xml b/support/sdk/c/6lowpan/serial_tun/build.xml
new file mode 100644
index 00000000..b750c727
--- /dev/null
+++ b/support/sdk/c/6lowpan/serial_tun/build.xml
@@ -0,0 +1,10 @@
+<project name="tinyos-2.x support sdk c 6lowpan serial_tun" default="all">
+
+	<target name="all" >
+		<echo message = "Building support sdk c 6lowpan serial_tun" />
+		<exec executable="make" failonerror="true">
+			<arg line="all" />
+		</exec>
+	</target>
+
+</project>
diff --git a/support/sdk/c/6lowpan/serial_tun/serial_tun.c b/support/sdk/c/6lowpan/serial_tun/serial_tun.c
new file mode 100644
index 00000000..798ff55c
--- /dev/null
+++ b/support/sdk/c/6lowpan/serial_tun/serial_tun.c
@@ -0,0 +1,1249 @@
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <string.h>
+#include <sys/types.h>
+#include <sys/time.h>
+#include <sys/socket.h>
+#include <netinet/in_systm.h>
+#include <netinet/in.h>
+#include <netinet/ip.h>
+#include <arpa/inet.h>
+#include <netdb.h>
+
+#include <stdarg.h>
+
+#include "tun_dev.h"
+#include "serialsource.h"
+#include "serialpacket.h"
+#include "6lowpan.h"
+
+#define min(a,b) ( (a>b) ? b : a )
+#define max(a,b) ( (a>b) ? a : b )
+
+static char *msgs[] = {
+  "unknown_packet_type",
+  "ack_timeout"	,
+  "sync"	,
+  "too_long"	,
+  "too_short"	,
+  "bad_sync"	,
+  "bad_crc"	,
+  "closed"	,
+  "no_memory"	,
+  "unix_error"
+};
+
+/* global variables */
+lowpan_pkt_t *fragments = NULL; /* fragment reassembly of received frames */
+//lowpan_pkt_t *send_queue = NULL;
+int g_send_pending = 0;
+
+hw_addr_t hw_addr;
+
+serial_source ser_src;
+int tun_fd = 0; /* tunnel device */
+//int ser_fd = 0; /* serial device */
+
+uint16_t g_dgram_tag = 0; /* datagram_tag for sending fragmented packets */
+
+/* ------------------------------------------------------------------------- */
+/* function pre-declarations */
+int serial_output_am_payload(uint8_t *buf, int len,
+			     const hw_addr_t *hw_src_addr,
+			     const hw_addr_t *hw_dst_addr);
+
+int serial_input_layer3(uint8_t *buf, int len,
+			const hw_addr_t *hw_src_addr,
+			const hw_addr_t *hw_dst_addr);
+
+int serial_input_ipv6_uncompressed(uint8_t *buf, int len,
+				   const hw_addr_t *hw_src_addr,
+				   const hw_addr_t *hw_dst_addr);
+
+int serial_input_ipv6_compressed(uint8_t *buf, int len,
+				 const hw_addr_t *hw_src_addr,
+				 const hw_addr_t *hw_dst_addr);
+
+/* ------------------------------------------------------------------------- */
+/* utility functions */
+int get_ser_fd()
+{
+    return serial_source_fd(ser_src);
+}
+
+void increment_g_dgram_tag()
+{
+    uint16_t tmp = ntohs(g_dgram_tag);
+    if (tmp == 0xFFFF) {
+	tmp = 0;
+    } else {
+	tmp++;
+    }
+    g_dgram_tag = htons(tmp);
+}
+
+void stderr_msg(serial_source_msg problem)
+{
+  fprintf(stderr, "Note: %s\n", msgs[problem]);
+}
+
+int
+debug(const char *fmt, ...)
+{
+    int result;
+    va_list ap;
+    va_start(ap, fmt);
+    result = vfprintf(stderr, fmt, ap);
+    va_end(ap);
+    return result;
+}
+
+/* from contiki-2.x/tools/tunslip.c */
+int
+ssystem(const char *fmt, ...)
+{
+  char cmd[128];
+  va_list ap;
+  va_start(ap, fmt);
+  vsnprintf(cmd, sizeof(cmd), fmt, ap);
+  va_end(ap);
+  printf("%s\n", cmd);
+  fflush(stdout);
+  return system(cmd);
+}
+
+/* print char* in hex format */
+void dump_serial_packet(const unsigned char *packet, const int len) {
+    int i;
+    printf("len: %d\n", len);
+    if (!packet)
+	return;
+    for (i = 0; i < len; i++) {
+	printf("%02x ", packet[i]);
+	//printf("%02x(%c) ", packet[i], packet[i]);
+	//printf("%c", packet[i]);
+    }
+    putchar('\n');
+/*     printf("---\n"); */
+/*     for (i = 0; i < len; i++) { */
+/* 	printf("%c", packet[i]); */
+/*     } */
+/*     putchar('\n'); */
+/*     printf("---\n"); */
+}
+
+/* ------------------------------------------------------------------------- */
+/* ip6_addr_t and hw_addr_t utility functions */
+int ipv6_addr_is_zero(const ip6_addr_t *addr)
+{
+    int i;
+    for (i=0;i<16;i++) {
+	if (addr->addr[i]) {
+	    return 0;
+	}
+    }
+    return 1;
+}
+
+int ipv6_addr_is_linklocal_unicast(const ip6_addr_t *addr)
+{
+    if (   addr->addr[0] == 0xFE
+	   && addr->addr[1] == 0x80
+	   && addr->addr[2] == 0
+	   && addr->addr[3] == 0
+	   && addr->addr[4] == 0
+	   && addr->addr[5] == 0
+	   && addr->addr[6] == 0
+	   && addr->addr[7] == 0
+	   )
+	return 1;
+    else
+	return 0;
+}
+
+int cmp_ipv6_addr(const ip6_addr_t *addr1, const ip6_addr_t *addr2)
+{
+    return memcmp(addr1, addr2, sizeof(ip6_addr_t));
+}
+
+int cmp_hw_addr(const hw_addr_t *addr1, const hw_addr_t *addr2)
+{
+    // for short addresses compare only the first two bytes
+    if (addr1->type == HW_ADDR_SHORT && addr2->type == HW_ADDR_SHORT) {
+	return memcmp(addr1->addr_short, addr2->addr_short,
+		      sizeof(addr1->addr_short));
+    } else {
+	return memcmp(addr1, addr2, sizeof(hw_addr_t));
+    }
+}
+
+int hw_addr_is_broadcat(const hw_addr_t *hw_addr)
+{
+    if (hw_addr->type == HW_ADDR_SHORT
+	&& hw_addr->addr_short[0] == 0xFF  && hw_addr->addr_short[1] == 0xFF)
+	return 1;
+    // TODO: long address
+    else return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+/* more utility functions */
+void clear_pkt(lowpan_pkt_t *pkt)
+{
+    memset(pkt, 0, sizeof(*pkt));
+    pkt->buf_begin = pkt->buf + LOWPAN_OVERHEAD;
+}
+
+void free_frag_list(frag_info_t *p)
+{
+    frag_info_t *q;
+    while (p) {
+	q = p->next;
+	free(p);
+	p = q;
+    }
+}
+
+void free_lowpan_pkt(lowpan_pkt_t *pkt)
+{
+    lowpan_pkt_t *p;
+    lowpan_pkt_t **q;
+
+    if (!fragments) return;
+    for(q=&fragments; *q; q=&(*q)->next) {
+	if (*q == pkt) {
+	    p = *q;
+	    *q = p->next;
+	    free_frag_list(p->frag_list);
+	    free(p);
+	    return;
+	}
+    }
+}
+
+lowpan_pkt_t * find_fragment(hw_addr_t *hw_src_addr, hw_addr_t *hw_dst_addr,
+			     uint16_t dgram_size, uint16_t dgram_tag)
+{
+    lowpan_pkt_t *p;
+    for(p=fragments; p; p=p->next) {
+	if ((p->dgram_tag == dgram_tag)
+	    && (p->dgram_size == dgram_size)
+	    && cmp_hw_addr(&p->hw_src_addr, hw_src_addr) == 0
+	    && cmp_hw_addr(&p->hw_dst_addr, hw_dst_addr) == 0
+	    ) {
+	    return p;
+	}
+    }
+    return NULL;
+}
+/* ------------------------------------------------------------------------- */
+/* HC1 and HC2 compression and decompresstion functions */
+
+/* the caller has to free() new_buf */
+int lowpan_decompress(uint8_t *buf, int len,
+		       const hw_addr_t *hw_src_addr,
+		       const hw_addr_t *hw_dst_addr,
+		       uint8_t **new_buf, int *new_len)
+{
+    uint8_t hc1_enc;
+    uint8_t hc2_enc;
+    struct ip6_hdr *ip_hdr = NULL;
+    struct udp_hdr *udp_hdr = NULL;
+    
+    *new_buf = malloc(len + sizeof(*ip_hdr) + sizeof(*udp_hdr));
+    if (!*new_buf) {
+	fprintf(stderr, "%s: out of memory\n", __func__);
+	*new_len = 0;
+	return 1;
+    }
+    hc1_enc = *buf;
+    buf += sizeof(hc1_enc);
+    len -= sizeof(hc1_enc);
+
+    /* HC2 encoding follows HC1 encoding */
+    if ((hc1_enc & HC1_HC2_MASK) == HC1_HC2_PRESENT) {
+	hc2_enc = *buf;
+	buf += sizeof(hc2_enc);
+	len -= sizeof(hc2_enc);
+    }
+
+    /* IP header fields */
+    ip_hdr = (struct ip6_hdr *) *new_buf;
+    memset(ip_hdr, 0, sizeof(struct ip6_hdr));
+
+    ip_hdr->vtc |= IPV6_VERSION;
+
+    ip_hdr->hlim = *buf;
+    buf += sizeof(ip_hdr->hlim);
+    len -= sizeof(ip_hdr->hlim);
+
+    /* source IP address */
+    if ((hc1_enc & HC1_SRC_PREFIX_MASK) == HC1_SRC_PREFIX_INLINE) {
+	memcpy(&ip_hdr->src_addr, buf, sizeof(ip_hdr->src_addr)/2);
+	buf += sizeof(ip_hdr->src_addr)/2;
+	len -= sizeof(ip_hdr->src_addr)/2;
+    } else {
+	ip_hdr->src_addr.addr[0] = 0xFE;
+	ip_hdr->src_addr.addr[1] = 0x80;
+    }
+     
+    if ((hc1_enc & HC1_SRC_IFACEID_MASK) == HC1_SRC_IFACEID_INLINE) {
+	memcpy(((void*)&ip_hdr->src_addr) + sizeof(ip_hdr->src_addr)/2,
+	       buf, sizeof(ip_hdr->src_addr)/2);
+	buf += sizeof(ip_hdr->src_addr)/2;
+	len -= sizeof(ip_hdr->src_addr)/2;
+    }
+
+    /* destination IP address */
+    if ((hc1_enc & HC1_DST_PREFIX_MASK) == HC1_DST_PREFIX_INLINE) {
+	memcpy(&ip_hdr->dst_addr, buf, sizeof(ip_hdr->dst_addr)/2);
+	buf += sizeof(ip_hdr->dst_addr)/2;
+	len -= sizeof(ip_hdr->dst_addr)/2;
+    } else {
+	ip_hdr->dst_addr.addr[0] = 0xFE;
+	ip_hdr->dst_addr.addr[1] = 0x80;
+    }
+     
+    if ((hc1_enc & HC1_DST_IFACEID_MASK) == HC1_DST_IFACEID_INLINE) {
+	memcpy(((void*)&ip_hdr->dst_addr) + sizeof(ip_hdr->dst_addr)/2,
+	       buf, sizeof(ip_hdr->dst_addr)/2);
+	buf += sizeof(ip_hdr->dst_addr)/2;
+	len -= sizeof(ip_hdr->dst_addr)/2;
+    }
+
+    /* Traffic Class and Flow Label */
+    if ((hc1_enc & HC1_TCFL_MASK) == HC1_TCFL_INLINE) {
+	//TODO
+    }
+
+    /* Next Header */
+    switch (hc1_enc & HC1_NEXTHDR_MASK) {
+    case HC1_NEXTHDR_INLINE:
+	ip_hdr->nxt_hdr = *buf;
+	buf += sizeof(ip_hdr->nxt_hdr);
+	len -= sizeof(ip_hdr->nxt_hdr);
+	break;
+    case HC1_NEXTHDR_UDP:
+	ip_hdr->nxt_hdr = NEXT_HEADER_UDP;
+	break;
+    case HC1_NEXTHDR_ICMP:
+	ip_hdr->nxt_hdr = NEXT_HEADER_ICMP6;
+	break;
+    case HC1_NEXTHDR_TCP:
+	ip_hdr->nxt_hdr = NEXT_HEADER_TCP;
+	break;
+    default:
+	fprintf(stderr, "unknown next header HC1 encoding\n");
+	break;
+    }
+    
+    /* HC_UDP compression */
+    if ((hc1_enc & HC1_HC2_MASK) == HC1_HC2_PRESENT
+	&& (hc1_enc & HC1_NEXTHDR_MASK) == HC1_NEXTHDR_UDP) {
+	
+	udp_hdr = (struct udp_hdr *) ((*new_buf) + sizeof(struct ip6_hdr));
+	//udp_hdr = (struct udp_hdr *) (ip_hdr + 1);
+	memset(udp_hdr, 0, sizeof(struct udp_hdr));
+
+	/* UDP Source Port */
+	if ((hc2_enc & HC2_UDP_SRC_PORT_MASK) == HC2_UDP_SRC_PORT_INLINE) {
+	    memcpy(&udp_hdr->src_port, buf, sizeof(udp_hdr->src_port));
+	    buf += sizeof(udp_hdr->src_port);
+	    len -= sizeof(udp_hdr->src_port);
+	} else {
+	    //TODO
+	}
+
+	/* UDP Destination Port */
+	if ((hc2_enc & HC2_UDP_DST_PORT_MASK) == HC2_UDP_DST_PORT_INLINE) {
+	    memcpy(&udp_hdr->dst_port, buf, sizeof(udp_hdr->dst_port));
+	    buf += sizeof(udp_hdr->dst_port);
+	    len -= sizeof(udp_hdr->dst_port);
+	} else {
+	    //TODO
+	}
+
+	/* UDP Length */
+	if ((hc2_enc & HC2_UDP_LEN_MASK) == HC2_UDP_LEN_INLINE) {
+	    memcpy(&udp_hdr->len, buf, sizeof(udp_hdr->len));
+	    buf += sizeof(udp_hdr->len);
+	    len -= sizeof(udp_hdr->len);
+	} else {
+	    udp_hdr->len = len - sizeof(udp_hdr->chksum)
+		+ sizeof(struct udp_hdr);
+	}
+	
+	/* Checksum */
+	memcpy(&udp_hdr->chksum, buf, sizeof(udp_hdr->chksum));
+	buf += sizeof(udp_hdr->chksum);
+	len -= sizeof(udp_hdr->chksum);
+	
+	/* IPv6 Payload Length */
+	ip_hdr->plen = htons(len + sizeof(struct udp_hdr));
+	
+	memcpy((*new_buf) + sizeof(struct ip6_hdr) + sizeof(struct udp_hdr),
+	       buf, len);
+	*new_len = len + sizeof(struct ip6_hdr) + sizeof(struct udp_hdr);
+    } else {
+    /* IPv6 Payload Length */
+    ip_hdr->plen = htons(len);
+
+    memcpy((*new_buf) + sizeof(struct ip6_hdr), buf, len);
+    *new_len = len + sizeof(struct ip6_hdr);
+    }
+    
+    return 0;
+}
+
+/* assuming there is space available in from of buf_begin */
+int lowpan_compress(uint8_t **buf_begin, int *len,
+		     const hw_addr_t *hw_src_addr,
+		     const hw_addr_t *hw_dst_addr)
+{
+    uint8_t *hc1_enc;
+    uint8_t *hc2_enc;
+    struct ip6_hdr *ip_hdr = NULL;
+    struct udp_hdr *udp_hdr = NULL;
+    
+    uint8_t new_buf[sizeof(struct ip6_hdr) + sizeof(struct udp_hdr) + 5];
+    uint8_t *new_buf_p = new_buf;
+    int new_len = 0;
+
+    debug("%s\n", __func__);
+
+    ip_hdr = (struct ip6_hdr *) *buf_begin;
+    udp_hdr = (struct udp_hdr *) ((*buf_begin) + sizeof(struct ip6_hdr));
+
+    /* check if this is an IPv6 packet */
+    if ((ip_hdr->vtc & IPV6_VERSION_MASK) != IPV6_VERSION) {
+	debug("IP version check failed - not an IPv6 packet\n");
+	return 0;
+    }
+    
+    /* set 6lowpan dispatch value */
+    *new_buf_p = DISPATCH_COMPRESSED_IPV6;
+    new_buf_p += sizeof(uint8_t);
+    new_len += sizeof(uint8_t);
+
+    /* HC1 encoding field */
+    hc1_enc = new_buf_p;
+    new_buf_p += sizeof(uint8_t);
+    new_len += sizeof(uint8_t);
+    *hc1_enc = 0;
+
+    /* does HC2 follow after HC1? */
+    if (ip_hdr->nxt_hdr == NEXT_HEADER_UDP) {
+	*hc1_enc |= HC1_HC2_PRESENT;
+
+	/* HC2 encoding field */
+	hc2_enc = new_buf_p;
+	new_buf_p += sizeof(uint8_t);
+	new_len += sizeof(uint8_t);
+	*hc2_enc = 0;
+    } else {    
+	*hc1_enc |= HC1_HC2_NONE;
+    }
+
+    /* Hop Limit */
+    *new_buf_p = ip_hdr->hlim;
+    new_buf_p += sizeof(uint8_t);
+    new_len += sizeof(uint8_t);
+
+    /* source address prefix */
+    //TODO: fails checksum on the mote !!!
+    if (ipv6_addr_is_linklocal_unicast(&ip_hdr->src_addr)) {
+	*hc1_enc |= HC1_SRC_PREFIX_LINKLOCAL;
+    } else {
+	*hc1_enc |= HC1_SRC_PREFIX_INLINE;
+
+	memcpy(new_buf_p, &(ip_hdr->src_addr), 8);
+	new_buf_p += 8;
+	new_len += 8;
+    }
+
+    /* source address interface identifier */
+    *hc1_enc |= HC1_SRC_IFACEID_INLINE;
+    
+    memcpy(new_buf_p, ((void*)&(ip_hdr->src_addr)) + 8, 8);
+    new_buf_p += 8;
+    new_len += 8;
+
+    /* destination address prefix */
+    if (ipv6_addr_is_linklocal_unicast(&ip_hdr->dst_addr)) {
+	*hc1_enc |= HC1_DST_PREFIX_LINKLOCAL;
+    } else {
+	*hc1_enc |= HC1_DST_PREFIX_INLINE;
+
+	memcpy(new_buf_p, &(ip_hdr->dst_addr), 8);
+	new_buf_p += 8;
+	new_len += 8;
+    }
+
+    /* destination address interface identifier */
+    *hc1_enc |= HC1_DST_IFACEID_INLINE;
+    
+    memcpy(new_buf_p, ((void*)&(ip_hdr->dst_addr)) + 8, 8);
+    new_buf_p += 8;
+    new_len += 8;
+
+    /* we're always sending packets with TC anf FL zero */
+    *hc1_enc |= HC1_TCFL_ZERO;
+    
+    /* next header */
+    switch (ip_hdr->nxt_hdr) {
+    case NEXT_HEADER_UDP:
+	*hc1_enc |= HC1_NEXTHDR_UDP;
+	break;
+    case NEXT_HEADER_ICMP6:
+	*hc1_enc |= HC1_NEXTHDR_ICMP;
+	break;
+    case NEXT_HEADER_TCP:
+	*hc1_enc |= HC1_NEXTHDR_TCP;
+	break;
+    default:
+	*hc1_enc |= HC1_NEXTHDR_INLINE;
+
+	*new_buf_p = ip_hdr->nxt_hdr;
+	new_buf_p += sizeof(ip_hdr->nxt_hdr);
+	new_len += sizeof(ip_hdr->nxt_hdr);
+	break;
+    }
+    
+    /* HC_UDP encoding */
+    if ((*hc1_enc & HC1_HC2_MASK) == HC1_HC2_PRESENT
+	&& (*hc1_enc & HC1_NEXTHDR_MASK) == HC1_NEXTHDR_UDP) {
+	
+	/* Source Port */
+	*hc2_enc |= HC2_UDP_SRC_PORT_INLINE;
+	memcpy(new_buf_p, &udp_hdr->src_port, sizeof(udp_hdr->src_port));
+	new_buf_p += sizeof(udp_hdr->src_port);
+	new_len += sizeof(udp_hdr->src_port);
+	
+	/* Destination Port */
+	*hc2_enc |= HC2_UDP_DST_PORT_INLINE;
+	memcpy(new_buf_p, &udp_hdr->dst_port, sizeof(udp_hdr->dst_port));
+	new_buf_p += sizeof(udp_hdr->dst_port);
+	new_len += sizeof(udp_hdr->dst_port);
+
+	/* Length */
+	//*hc2_enc |= HC2_UDP_LEN_COMPR;
+	*hc2_enc |= HC2_UDP_LEN_INLINE;
+	memcpy(new_buf_p, &udp_hdr->len, sizeof(udp_hdr->len));
+	new_buf_p += sizeof(udp_hdr->len);
+	new_len += sizeof(udp_hdr->len);
+
+	/* Checksum */
+	memcpy(new_buf_p, &udp_hdr->chksum, sizeof(udp_hdr->chksum));
+	new_buf_p += sizeof(udp_hdr->chksum);
+	new_len += sizeof(udp_hdr->chksum);
+
+	/* replace the IP and UDP headers with the compressed ones */
+	*len += new_len;
+	*len -= sizeof(struct ip6_hdr);
+	*len -= sizeof(struct udp_hdr);
+	*buf_begin += sizeof(struct ip6_hdr);
+	*buf_begin += sizeof(struct udp_hdr);
+	*buf_begin -= new_len;
+	memcpy(*buf_begin, new_buf, new_len);
+    } else {
+	/* replace the IP header with the compressed one */
+	*len += new_len;
+	*len -= sizeof(struct ip6_hdr);
+	*buf_begin += sizeof(struct ip6_hdr);
+	*buf_begin -= new_len;
+	memcpy(*buf_begin, new_buf, new_len);
+    }
+
+    return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+/* handling of data arriving on the tun interface */
+
+/*
+ * encapsulate buf as an Active Message payload
+ * fragments packets if needed
+ */
+int serial_output_am_payload(uint8_t *buf, int len,
+			     const hw_addr_t *hw_src_addr,
+			     const hw_addr_t *hw_dst_addr)
+{
+    am_packet_t AMpacket;
+    int result;
+    
+    //debug("%s: dumping buf (len: %d)...\n", __func__, len);
+    //dump_serial_packet(buf, len);
+
+    if (len > LINK_DATA_MTU) {
+	fprintf(stderr, "%s: requested to send more than LINK_DATA_MTU"\
+		"(%d bytes)\n", __func__, len);
+	// TODO: maybe we should send the fisr LINK_DATA_MTU bytes
+	//       and only print a warning
+	return -1;
+    }
+    memset(&AMpacket, 0, sizeof(AMpacket));
+    AMpacket.pkt_type = 0;
+    // TODO: make the dst addr handling more general
+    //AMpacket.dst = htons(0x14);
+    AMpacket.dst = htons(0xFFFF);
+    //AMpacket.src = htons(0x12);
+    // TODO: make the src addr handling more general
+    memcpy(&AMpacket.src, hw_addr.addr_short, 2);
+    AMpacket.group = 0;
+    AMpacket.type = 0x41;
+    AMpacket.length = min(len,LINK_DATA_MTU);
+    //AMpacket.data = buf;
+    memcpy(AMpacket.data, buf, AMpacket.length);
+    
+    len = AMpacket.length + 8; // data + header
+
+    debug("sending to serial port...\n");
+    dump_serial_packet((unsigned char *)&AMpacket, len);
+
+    result = write_serial_packet(ser_src, &AMpacket, len);
+    /*
+     * Returns: 0 if packet successfully written, 1 if successfully
+     * written but not acknowledged, -1 otherwise
+     */
+    debug("write_serial_packet returned %d\n", result);
+
+    if (result < 0) {
+	perror ("sendto");
+	return -1;
+    }
+    return len;
+}
+
+/*
+ * read data from the tun device and send it to the serial port
+ * does also fragmentation
+ */
+int tun_input()
+{
+    uint8_t buf[LOWPAN_MTU + LOWPAN_OVERHEAD];
+    uint8_t *buf_begin = buf + LOWPAN_OVERHEAD;
+    int len;
+    int result;
+    
+    struct lowpan_frag_hdr *frag_hdr;
+    uint8_t dgram_offset = 0;
+    uint16_t dgram_size;
+    hw_addr_t hw_dst_addr;
+    uint8_t frag_len; /* length of the fragment just being sent */
+
+    uint8_t *frame_begin; /* begin of the frame payload */
+    uint8_t frame_len; /* length of the frame payload */
+    
+    len = tun_read (tun_fd, (char*) buf_begin, LOWPAN_MTU);
+    if (len <= 0) {
+	perror ("read");
+	return 0;
+    }
+    printf("data on tun interface\n");
+
+    /* set 802.15.4 destination address */
+    hw_dst_addr.type = HW_ADDR_SHORT;
+    hw_dst_addr.addr_short[0] =0xFF;
+    hw_dst_addr.addr_short[1] =0xFF;
+    
+    /* HC compression */
+    lowpan_compress(&buf_begin, &len,
+		    &hw_addr, &hw_dst_addr);
+
+    /* prepend dispatch */
+/*     buf_begin--; */
+/*     *buf_begin = DISPATCH_UNCOMPRESSED_IPV6;  */
+/*     len++; */
+
+    /* determine if fragmentation is needed */
+    if (len > LINK_DATA_MTU) {
+	/* fragmentation needed */
+	increment_g_dgram_tag();
+	dgram_size = htons(len);
+	
+	/* first fragment */
+	debug("first fragment... (len: %d, offset: %d)\n",
+	      len, dgram_offset);
+	/* fragment heder */
+	frame_begin = buf_begin - sizeof(struct lowpan_frag_hdr);
+	frag_hdr = (struct lowpan_frag_hdr *) frame_begin;
+	frag_hdr->dgram_size = dgram_size;
+	frag_hdr->dispatch |= DISPATCH_FIRST_FRAG;
+	frag_hdr->dgram_tag = g_dgram_tag;
+	/* align fragment length at an 8-byte multiple */
+	frag_len = LINK_DATA_MTU - sizeof(struct lowpan_frag_hdr);
+	frag_len -= frag_len%8;
+	frame_len = frag_len + sizeof(struct lowpan_frag_hdr);
+	result = serial_output_am_payload(frame_begin, frame_len,
+					  &hw_addr, &hw_dst_addr);
+	if (result < 0) {
+	    perror("serial_output_am_payload() failed\n");
+	    return -1;
+	}
+	buf_begin += frag_len;
+	len -= frag_len;
+	dgram_offset += frag_len/8; /* in 8-byte multiples */
+    
+	/* subseq fragment */
+	while (len > 0) {
+	    usleep(10000); /* workaround to prevent loosing fragments */
+	    debug("subsequent fragment... (len: %d, offset: %d)\n",
+		  len, dgram_offset);
+	    /* dgram_offset */
+	    frame_begin = buf_begin - sizeof(uint8_t);
+	    *(frame_begin) = dgram_offset;
+	    /* fragment heder */
+	    frame_begin -= sizeof(struct lowpan_frag_hdr);
+	    frag_hdr = (struct lowpan_frag_hdr *) frame_begin;
+	    frag_hdr->dgram_size = dgram_size;
+	    frag_hdr->dispatch |= DISPATCH_SUBSEQ_FRAG;
+	    frag_hdr->dgram_tag = g_dgram_tag;
+	    if (len <= LINK_DATA_MTU  - sizeof(struct lowpan_frag_hdr)
+		- sizeof(uint8_t)) {
+		/*
+		 * last fragment does not have to be aligned
+		 * at an 8-byte multiple
+		 */
+		frag_len = len;
+	    } else {
+		/* align fragment length at an 8-byte multiple */
+		frag_len = LINK_DATA_MTU - sizeof(struct lowpan_frag_hdr)
+		           - sizeof(uint8_t);
+		frag_len -= frag_len%8;
+	    }
+	    frame_len = frag_len + sizeof(struct lowpan_frag_hdr)
+		                 + sizeof(uint8_t);
+	    result = serial_output_am_payload(frame_begin, frame_len,
+					      &hw_addr, &hw_dst_addr);
+	    if (result < 0) {
+		perror("serial_output_am_payload() failed\n");
+		//return -1;
+	    }
+	    buf_begin += frag_len;
+	    len -= frag_len;
+	    dgram_offset += frag_len/8; /* in 8-byte multiples */
+	}
+	return 1;
+
+    } else {
+	/* no need for fragmentation */
+	serial_output_am_payload(buf_begin, len,
+				 &hw_addr, &hw_dst_addr);
+	return 1;
+    }
+
+}
+
+/* ------------------------------------------------------------------------- */
+/* handling of data arriving on the serial port */
+
+/* 
+ * read data on serial port and send it to the tun interface
+ * does fragment reassembly
+ */
+int serial_input()
+{
+    int result = 0;
+
+    void *ser_data; /* data read from serial port */
+    int ser_len;    /* length of data read from serial port */
+    uint8_t *buf;
+    int len;
+
+    am_packet_t *AMpacket;
+    struct hw_addr hw_src_addr;
+    struct hw_addr hw_dst_addr;
+    uint8_t *dispatch;
+    struct lowpan_broadcast_hdr *bc_hdr;
+    struct lowpan_frag_hdr *frag_hdr;
+
+    uint16_t dgram_tag;
+    uint16_t dgram_size;
+    uint8_t dgram_offset;
+    struct timeval tv;
+    frag_info_t *p;
+    frag_info_t **q;
+    int last_frag;
+    lowpan_pkt_t *pkt;
+
+    printf("serial_input()\n");
+    /* read data from serial port */
+    ser_data = read_serial_packet(ser_src, &ser_len);
+
+    /* process the packet we have received */
+    if (ser_len && ser_data) {
+	printf("dumping data on serial port...\n");
+	dump_serial_packet(ser_data, ser_len);
+	AMpacket = ser_data;
+
+	/* copy 802.15.4 addresses */
+	// TODO: check if I got the byte ordering right
+	hw_src_addr.type = HW_ADDR_SHORT;
+	memcpy(hw_src_addr.addr_short, &AMpacket->src,
+	       sizeof(hw_src_addr.addr_short));
+	hw_dst_addr.type = HW_ADDR_SHORT;
+	memcpy(hw_dst_addr.addr_short, &AMpacket->dst,
+	       sizeof(hw_dst_addr.addr_short));
+
+	/* --- 6lowpan optional headers --- */
+	buf = AMpacket->data;
+	len = AMpacket->length;
+	if (len != ser_len - 8) {
+	    fprintf(stderr,
+		    "warning: mismatch between AMpacket->length(%d)"\
+		    " and ser_len - 8(%d)", AMpacket->length, ser_len - 8);
+	}
+	// TODO: check if length has a sensible value
+	dispatch = AMpacket->data;
+	/* Mesh Addressing header */
+	if ( (*dispatch & DISPATCH_MESH_MASK) == DISPATCH_MESH) {
+	    /* move over the dispatch field */
+	    buf += sizeof(*dispatch);
+	    len -= sizeof(*dispatch);
+
+	    /* Hops Left */
+	    if ((*dispatch & 0x0F) == 0) {
+	      goto discard_packet;
+	    }
+	    
+	    /* Final Destination Address */
+	    if (*dispatch & DISPATCH_MESH_F_FLAG) {
+		hw_dst_addr.type = HW_ADDR_LONG;
+		memcpy(&hw_dst_addr.addr_long, buf,
+		       sizeof(hw_dst_addr.addr_long));
+		buf += sizeof(hw_dst_addr.addr_long);
+		len -= sizeof(hw_dst_addr.addr_long);
+	    } else {
+		hw_dst_addr.type = HW_ADDR_SHORT;
+		memcpy(&hw_dst_addr.addr_short, buf,
+		       sizeof(hw_dst_addr.addr_short));
+		buf += sizeof(hw_dst_addr.addr_short);
+		len -= sizeof(hw_dst_addr.addr_short);
+	    }
+	    
+	    /* check if we're the recipient */
+	    if (cmp_hw_addr(&hw_dst_addr, &hw_addr) != 0
+		&& !hw_addr_is_broadcat(&hw_dst_addr)) {
+		// TODO: if mesh forwarding enabled, then forward
+		goto discard_packet;
+	    }
+	    
+	    /* Originator Address */
+	    if (*dispatch & DISPATCH_MESH_O_FLAG) {
+		hw_src_addr.type = HW_ADDR_LONG;
+		memcpy(&hw_src_addr.addr_long, buf,
+		       sizeof(hw_src_addr.addr_long));
+		buf += sizeof(hw_src_addr.addr_long);
+		len -= sizeof(hw_src_addr.addr_long);
+	    } else {
+		hw_src_addr.type = HW_ADDR_SHORT;
+		memcpy(&hw_src_addr.addr_short, buf,
+		       sizeof(hw_src_addr.addr_short));
+		buf += sizeof(hw_src_addr.addr_short);
+		len -= sizeof(hw_src_addr.addr_short);
+	    }
+	    
+	    dispatch = buf;
+	}
+	/* Broadcast header */
+	if (*dispatch == DISPATCH_BC0) {
+	    bc_hdr = (struct lowpan_broadcast_hdr *) buf;
+	    // do something usefull with bc_hdr->seq_no...
+	    
+	    buf += (sizeof(struct lowpan_broadcast_hdr));
+	    len -= (sizeof(struct lowpan_broadcast_hdr));
+	    dispatch = buf;
+	}
+
+	/* fragment header */
+	if ((*dispatch & DISPATCH_FRAG_MASK)
+	    == DISPATCH_FIRST_FRAG
+	    || (*dispatch & DISPATCH_FRAG_MASK)
+	    == DISPATCH_SUBSEQ_FRAG
+	    ) {
+	    frag_hdr = (struct lowpan_frag_hdr *) buf;
+	    buf += sizeof(struct lowpan_frag_hdr);
+	    len -= sizeof(struct lowpan_frag_hdr);
+
+	    /* collect information about the fragment */
+	    dgram_tag = frag_hdr->dgram_tag;
+	    dgram_size = frag_hdr->dgram_size & htons(0x07FF);
+	    //dgram_size = frag_hdr->dgram_size8[1];
+	    //dgram_size += ((uint16_t) (frag_hdr->dgram_size8[0] & 0x07)) << 8;
+	    if ((*dispatch & DISPATCH_FRAG_MASK) == DISPATCH_SUBSEQ_FRAG) {
+		dgram_offset = *buf;
+		buf += 1;
+		len -= 1;
+	    } else {
+		dgram_offset = 0;
+	    }
+	    
+	    debug("fragment reassembly: tag: 0x%04X, size: %d, offset: %d"\
+		  "(*8=%d)\n",
+		  ntohs(dgram_tag), ntohs(dgram_size),
+		  dgram_offset, dgram_offset*8);
+
+	    pkt = find_fragment(&hw_src_addr, &hw_dst_addr,
+				dgram_size, dgram_tag);
+	    if (pkt) {
+		debug("found an existing reassembly buffer\n");
+		/* fragment reassembly buffer found */
+		/* check for overlap */
+		for (p = pkt->frag_list; p; p=p->next) {
+		    if (dgram_offset == p->offset && len == p->len) {
+			/* duplicate - discard it */
+			result = 0;
+			goto discard_packet;
+		    } else if ((dgram_offset == p->offset && len < p->len) ||
+			       (dgram_offset > p->offset
+				&& dgram_offset < p->offset + p->len/8)
+			       ) {
+			goto frag_overlap;
+		    }
+		}
+		/* no overlap found */
+		goto frag_reassemble;
+	    } else {
+		debug("starting a new reassembly buffer\n");
+		/* fragment reassembly buffer not found - set up a new one */
+		pkt = malloc(sizeof(lowpan_pkt_t));
+		if (!pkt) {
+		    // no free slot for reassembling fragments
+		    fprintf(stderr, "out of memory - dropping a fragment\n");
+		    result = -1;
+		    goto discard_packet;
+		}
+		pkt->next = fragments;
+		fragments = pkt;
+		clear_pkt(pkt);
+		memcpy(&pkt->hw_src_addr, &hw_src_addr, sizeof(hw_src_addr));
+		memcpy(&pkt->hw_dst_addr, &hw_dst_addr, sizeof(hw_dst_addr));
+		pkt->dgram_tag = dgram_tag;
+		pkt->dgram_size = dgram_size;
+		gettimeofday(&tv, NULL);
+		pkt->frag_timeout = tv.tv_sec + FRAG_TIMEOUT;
+		goto frag_reassemble;
+	    }
+	    
+	frag_overlap:
+	    /* overlap - discard previous frags
+	     * and restart freagment reassembly
+	     */
+	    free_frag_list(pkt->frag_list);
+	    pkt->frag_list = NULL;
+	    /* not sure if we want to clear the whole buf */
+	    //memset(&pkt->buf, 0, sizeof(pkt->buf));
+	    gettimeofday(&tv, NULL);
+	    pkt->frag_timeout = tv.tv_sec + FRAG_TIMEOUT;
+	    goto frag_reassemble;
+	    
+	frag_reassemble:
+	    /* copy buf data */
+	    debug("dgram_offset: %d\n", dgram_offset);
+	    memcpy(pkt->buf_begin + dgram_offset*8, buf, len);
+	    //TODO: make sure a large len does not cause a buffer overflow
+
+	    /* update frag_info */
+	    p = malloc(sizeof(frag_info_t));
+	    if (!p) {
+		fprintf(stderr, "out of memory - fragment "\
+			"reassembly failing\n");
+	    } else {
+		p->offset = dgram_offset;
+		p->len = len;
+
+		/* insert frag_info into the orderer list */
+		if (pkt->frag_list) {
+		    for(q = &(pkt->frag_list); (*q)->next; q=&((*q)->next)) {
+			if (p->offset > (*q)->offset) {
+			    break;
+			}
+		    }
+		    if ((*q)) {
+			debug("inserting frag_info before offset %d\n",
+			      (*q)->offset);
+		    } else {
+			debug("inserting frag_info at the beginning/end\n");
+		    }
+
+		    p->next = *q;
+		    *q = p;
+		} else {
+		    debug("inserting frag_info to the beginning "
+			  "of the list\n");
+		    p->next = pkt->frag_list;
+		    pkt->frag_list = p;
+		}
+	    }
+
+	    /* check if this is not the last fragment */
+	    if (!dgram_offset) {
+		/* the first fragment cannot be the last one */
+		last_frag = 0;
+	    } else {
+		debug("checking last_frag...\n");
+		last_frag=1;
+		dgram_offset = ntohs(dgram_size)/8;
+		for(p=pkt->frag_list; p && dgram_offset; p=p->next) {
+		    debug("dgram_offset: %d, p->offset: %d, p->len: %d\n",
+			  dgram_offset, p->offset, p->len);
+		    if (p->offset + p->len/8 != dgram_offset) {
+			debug("offset mismatch - not the last fragment\n");
+			last_frag = 0;
+			break;
+		    }
+		    dgram_offset = p->offset;
+		}
+	    }
+
+	    if (last_frag) {
+		debug("last fragment, reassembly done\n");
+		pkt->len = ntohs(dgram_size);
+		
+		debug("dumping reassembled datagram...\n");
+		dump_serial_packet(pkt->buf_begin, pkt->len);
+		
+		/* pass up the complete packet */
+		result = serial_input_layer3(pkt->buf_begin, pkt->len,
+					     &hw_src_addr, &hw_dst_addr);
+		/* deallocate pkt and all fragment info */
+		free_lowpan_pkt(pkt);
+	    } else {
+		result = 0;
+	    }
+	} else { /* no fragment header present */
+	    result =  serial_input_layer3(buf, len,
+					  &hw_src_addr, &hw_dst_addr);
+	}
+	
+    } else {
+	//printf("no data on serial port, but FD trigerred select\n");
+    }
+ discard_packet:
+    if (ser_data) {
+	free(ser_data);
+    }
+    if (ser_data && ser_len > 0) {
+	return 1;
+    } else {
+	return 0;
+    }
+    //return result;
+}
+
+int serial_input_layer3(uint8_t *buf, int len,
+			const hw_addr_t *hw_src_addr,
+			const hw_addr_t *hw_dst_addr)
+{
+    uint8_t *dispatch = buf;
+    //debug("%s()\n", __func__);
+    //dump_serial_packet(buf, len);
+
+    if (len <= 0) return 1;
+
+    /* uncompressed IPv6 */
+    if (*dispatch == 0x41) {
+	return serial_input_ipv6_uncompressed(buf+1, len-1,
+					      hw_src_addr, hw_dst_addr);
+
+    }
+    /* LOWPAN_HC1 compressed IPv6 */
+    else if (*dispatch == 0x42) {
+	return serial_input_ipv6_compressed(buf+1, len-1,
+					    hw_src_addr, hw_dst_addr);
+    }
+    /* unknown dispatch value if we got here */
+    else {
+	debug("unknown dispatch value: %X\n", *dispatch);
+	return tun_write(tun_fd, (char*) buf+1, len-1);
+    }
+}
+
+int serial_input_ipv6_uncompressed(uint8_t *buf, int len,
+				   const hw_addr_t *hw_src_addr,
+				   const hw_addr_t *hw_dst_addr)
+{
+    debug("%s()\n", __func__);
+    //dump_serial_packet(buf, len);
+    // TODO: update neighbor table
+    return tun_write(tun_fd, (char*) buf, len);
+}
+
+int serial_input_ipv6_compressed(uint8_t *buf, int len,
+				 const hw_addr_t *hw_src_addr,
+				 const hw_addr_t *hw_dst_addr)
+{
+    int ret=0;
+    int new_len;
+    uint8_t *new_buf;
+
+    debug("%s()\n", __func__);
+    if (0 == lowpan_decompress(buf, len,
+			       hw_src_addr, hw_dst_addr,
+			       &new_buf, &new_len)
+	) {
+	// TODO: update neighbor table
+	buf = new_buf;
+	len = new_len;
+	ret =  tun_write(tun_fd, (char*) buf, len);
+	
+	if (new_buf && new_len) {
+	    free(new_buf);
+	}
+    }
+    
+    return ret;
+}
+
+/* ------------------------------------------------------------------------- */
+
+void timer_fired()
+{
+    struct timeval tv;
+    lowpan_pkt_t *p;
+    lowpan_pkt_t **q;
+
+    /* time out old fragments */
+    (void) gettimeofday(&tv, NULL);
+    for(q = &fragments; *q; ) {
+	if ((*q)->frag_timeout > tv.tv_sec) {
+	    p = (*q)->next;
+	    free(*q);
+	    *q = p;
+	} else {
+	    q = &((*q)->next);
+	}
+    }
+    // TODO: ND retransmission
+    // TODO: neighbor table timeouts
+}
+
+/* shifts data between the serial port and the tun interface */
+int serial_tunnel(serial_source ser_src, int tun_fd) {
+    //int result;
+    fd_set fs;
+    
+    while (1) {
+	FD_ZERO (&fs);
+	FD_SET (tun_fd, &fs);
+	FD_SET (serial_source_fd(ser_src), &fs);
+
+	select (tun_fd>serial_source_fd(ser_src)?
+		tun_fd+1 : serial_source_fd(ser_src)+1,
+		&fs, NULL, NULL, NULL);
+
+	debug("--- select() fired ---\n");
+
+	/* data available on tunnel device */
+	if (FD_ISSET (tun_fd, &fs)) {
+	    //result = tun_input();
+	    while( tun_input() );
+	}
+	
+	/* data available on serial port */
+	if (FD_ISSET (serial_source_fd(ser_src), &fs)) {
+	    /* more packets may be queued so process them all */
+	    while (serial_input());
+	    /* using serial_source_empty() seems to make select()
+	     * fire way too often, so the above solution is better */
+	    //while(! serial_source_empty(ser_src)) {
+	    //result = serial_input();
+		//}
+	}
+	/* end of data available */
+    }
+    /* end of while(1) */
+    
+    return 0;
+}
+
+int main(int argc, char **argv) {
+    char dev[16];
+    
+    if (argc != 3)
+	{
+	    fprintf(stderr, "Usage: %s <device> <rate>\n", argv[0]);
+	    exit(2);
+	}
+    
+    hw_addr.type = HW_ADDR_SHORT;
+    hw_addr.addr_short[0] = 0x00; // network byte order
+    hw_addr.addr_short[1] = 0x12;
+
+    /* create the tunnel device */
+    dev[0] = 0;
+    tun_fd = tun_open(dev);
+    if (tun_fd < 1) {
+	printf("Could not create tunnel device. Fatal.\n");
+		return 1;
+    }
+    else {
+	printf("Created tunnel device: %s\n", dev);
+    }
+    
+    /* open the serial port */
+    ser_src = open_serial_source(argv[1], platform_baud_rate(argv[2]),
+				 1, stderr_msg);
+    /* 0 - blocking reads
+     * 1 - non-blocking reads
+     */
+    
+    if (!ser_src) {
+	debug("Couldn't open serial port at %s:%s\n",
+		argv[1], argv[2]);
+	exit(1);
+    }
+    
+    /* set up the tun interface */
+    printf("\n");
+    ssystem("ifconfig tun0 up");
+    ssystem("ifconfig tun0 mtu 1280");
+    ssystem("ifconfig tun0 inet6 add 2001:0638:0709:1234::fffe:12/64");
+    ssystem("ifconfig tun0 inet6 add fe80::fffe:12/64");
+    printf("\n");
+
+    printf("try:\n\tsudo ping6 -s 0 2001:0638:0709:1234::fffe:14\n"
+	   "\tnc6 -u 2001:0638:0709:1234::fffe:14 1234\n\n");
+
+    /* start tunneling */
+    serial_tunnel(ser_src, tun_fd);
+    
+    /* clean up */
+    close_serial_source(ser_src);
+    //close(ser_fd);
+    tun_close(tun_fd, dev);
+    return 0;
+}
diff --git a/support/sdk/c/6lowpan/serial_tun/tun_dev.c b/support/sdk/c/6lowpan/serial_tun/tun_dev.c
new file mode 100644
index 00000000..e5d92bbb
--- /dev/null
+++ b/support/sdk/c/6lowpan/serial_tun/tun_dev.c
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <syslog.h>
+#include <errno.h>
+
+#include <arpa/inet.h>
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+#include <linux/if.h>
+#include <linux/if_tun.h>
+#include <linux/if_ether.h>
+
+#include "tun_dev.h"
+
+
+int tun_open(char *dev)
+{
+    struct ifreq ifr;
+    int fd;
+
+    if ((fd = open("/dev/net/tun", O_RDWR | O_NONBLOCK)) < 0)
+       return -1;
+
+    memset(&ifr, 0, sizeof(ifr));
+    /* By default packets are tagged as IPv4. To tag them as IPv6,
+     * thy need to be prefixed by struct tun_pi.
+     */
+    //ifr.ifr_flags = IFF_TUN | IFF_NO_PI;
+    ifr.ifr_flags = IFF_TUN;
+    if (*dev)
+       strncpy(ifr.ifr_name, dev, IFNAMSIZ);
+
+    if (ioctl(fd, TUNSETIFF, (void *) &ifr) < 0)
+	goto failed;
+
+    strcpy(dev, ifr.ifr_name);
+    return fd;
+
+failed:
+    close(fd);
+    return -1;
+}
+
+int tun_close(int fd, char *dev)
+{
+    return close(fd);
+}
+
+/* Read/write frames from TUN device */
+/*
+int tun_write(int fd, char *buf, int len)
+{
+    return write(fd, buf, len);
+}
+
+int tun_read(int fd, char *buf, int len)
+{
+    return read(fd, buf, len);
+}
+*/
+int tun_write(int fd, char *buf, int len)
+{
+    int out;
+    struct tun_pi pi = {0, htons(ETH_P_IPV6)};
+    char *nbuf = malloc(len+sizeof(struct tun_pi));
+    if (!nbuf) {
+	fprintf(stderr, "tun_write: out of memory!");
+	return -1;
+    }
+    memcpy(nbuf, &pi, sizeof(struct tun_pi));
+    memcpy(nbuf+sizeof(struct tun_pi), buf, len);
+    out = write(fd, nbuf, len+sizeof(struct tun_pi));
+    free(nbuf);
+    return out;
+}
+
+int tun_read(int fd, char *buf, int len)
+{
+    int out;
+    char *nbuf = malloc(len+sizeof(struct tun_pi));
+    if (!nbuf) {
+	fprintf(stderr, "tun_read: out of memory!");
+	return -1;
+    }
+    out=read(fd, nbuf, len+sizeof(struct tun_pi));
+    if (out > 0 && out >= sizeof(struct tun_pi)) {
+	out-=sizeof(struct tun_pi);
+	memcpy(buf, nbuf+sizeof(struct tun_pi), out);
+	free(nbuf);
+	return out;
+    } else {
+	free(nbuf);
+	return -1;
+    }
+}
diff --git a/support/sdk/c/6lowpan/serial_tun/tun_dev.h b/support/sdk/c/6lowpan/serial_tun/tun_dev.h
new file mode 100644
index 00000000..0de31dec
--- /dev/null
+++ b/support/sdk/c/6lowpan/serial_tun/tun_dev.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _TUN_DEV_H
+#define _TUN_DEV_H
+
+int tun_open(char *dev);
+int tun_close(int fd, char *dev);
+int tun_write(int fd, char *buf, int len);
+int tun_read(int fd, char *buf, int len);
+
+#endif
diff --git a/support/sdk/c/blip/Makefile.am b/support/sdk/c/blip/Makefile.am
new file mode 100644
index 00000000..18e29e27
--- /dev/null
+++ b/support/sdk/c/blip/Makefile.am
@@ -0,0 +1,3 @@
+
+SUBDIRS = lib6lowpan 
+
diff --git a/support/sdk/c/blip/bootstrap.sh b/support/sdk/c/blip/bootstrap.sh
new file mode 100755
index 00000000..c5a7472d
--- /dev/null
+++ b/support/sdk/c/blip/bootstrap.sh
@@ -0,0 +1,3 @@
+#!/bin/sh
+
+autoreconf --install
diff --git a/support/sdk/c/blip/config.h.in b/support/sdk/c/blip/config.h.in
new file mode 100644
index 00000000..397864c3
--- /dev/null
+++ b/support/sdk/c/blip/config.h.in
@@ -0,0 +1,88 @@
+/* config.h.in.  Generated from configure.ac by autoheader.  */
+
+/* Number of link-layer retransmissions */
+#undef BLIP_L2_RETRIES
+
+/* Define to 1 if you have the <arpa/inet.h> header file. */
+#undef HAVE_ARPA_INET_H
+
+/* whether struct in6_addr has u6_addrXX and defines s6_addrXX */
+#undef HAVE_IN6_ADDR_S6_ADDR
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#undef HAVE_INTTYPES_H
+
+/* weather IPV6_ADD_MEMBERSHIP is defined */
+#undef HAVE_IPV6_ADD_MEMBERSHIP
+
+/* weather IPV6_JOIN_GROUP is defined */
+#undef HAVE_IPV6_JOIN_GROUP
+
+/* Define to 1 if you have the <linux/if_tun.h> header file. */
+#undef HAVE_LINUX_IF_TUN_H
+
+/* Define to 1 if you have the <memory.h> header file. */
+#undef HAVE_MEMORY_H
+
+/* Define to 1 if you have the <netinet/in.h> header file. */
+#undef HAVE_NETINET_IN_H
+
+/* Define to 1 if you have the <net/if.h> header file. */
+#undef HAVE_NET_IF_H
+
+/* Define to 1 if you have the <net/route.h> header file. */
+#undef HAVE_NET_ROUTE_H
+
+/* weather the SIOCADDRT ioctl is defined */
+#undef HAVE_SIOCADDRT
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#undef HAVE_STDINT_H
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#undef HAVE_STDLIB_H
+
+/* Define to 1 if you have the <strings.h> header file. */
+#undef HAVE_STRINGS_H
+
+/* Define to 1 if you have the <string.h> header file. */
+#undef HAVE_STRING_H
+
+/* Define to 1 if you have the <sys/socket.h> header file. */
+#undef HAVE_SYS_SOCKET_H
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#undef HAVE_SYS_STAT_H
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#undef HAVE_SYS_TYPES_H
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#undef HAVE_UNISTD_H
+
+/* Name of package */
+#undef PACKAGE
+
+/* Define to the address where bug reports for this package should be sent. */
+#undef PACKAGE_BUGREPORT
+
+/* Define to the full name of this package. */
+#undef PACKAGE_NAME
+
+/* Define to the full name and version of this package. */
+#undef PACKAGE_STRING
+
+/* Define to the one symbol short name of this package. */
+#undef PACKAGE_TARNAME
+
+/* Define to the home page for this package. */
+#undef PACKAGE_URL
+
+/* Define to the version of this package. */
+#undef PACKAGE_VERSION
+
+/* Define to 1 if you have the ANSI C header files. */
+#undef STDC_HEADERS
+
+/* Version number of package */
+#undef VERSION
diff --git a/support/sdk/c/blip/configure.ac b/support/sdk/c/blip/configure.ac
new file mode 100644
index 00000000..54b6c626
--- /dev/null
+++ b/support/sdk/c/blip/configure.ac
@@ -0,0 +1,106 @@
+AC_INIT([blip], [2.1], [stevedh@eecs.berkeley.edu])
+AC_CANONICAL_SYSTEM
+echo $ac_n "building for architecture""... $ac_c" 1>&6
+case "$target" in
+        *linux*)
+                AC_MSG_RESULT(linux)
+                arch=linux
+        ;;
+        *darwin*)
+                AC_MSG_RESULT(darwin)
+                arch=darwin
+
+                dnl exit if tun isn't installed
+                AC_MSG_CHECKING(for tun device)
+                if test -c /dev/tun0; then
+                AC_MSG_RESULT(yes)
+                else
+                AC_MSG_ERROR([ERROR: /dev/tun0 not found.  You probably need 
+to install the tuntap kernel extension from http://tuntaposx.sourceforge.net/])
+                fi
+
+        ;;
+        *)      
+                AC_MSG_RESULT(unknown)
+                AC_MSG_ERROR([currently only Linux and OSX are supported])
+        ;;
+esac
+dnl AC_DEFINE([PLATFORM], [${arch}])
+
+dnl check programs
+AM_INIT_AUTOMAKE([-Wall -Werror foreign])
+AC_PROG_RANLIB
+AC_PROG_CC
+AC_CONFIG_MACRO_DIR([m4])
+AC_CONFIG_HEADERS([config.h])
+AC_CONFIG_FILES([
+ Makefile
+ lib6lowpan/Makefile
+ lib6lowpan/trace/Makefile
+])
+dnl  driver/Makefile
+
+dnl check various platform include files
+AC_CHECK_HEADERS([stdint.h inttypes.h])
+AC_CHECK_HEADERS([netinet/in.h ])
+AC_CHECK_HEADERS([linux/if_tun.h])
+AC_CHECK_HEADERS([arpa/inet.h])
+AC_CHECK_HEADERS([sys/socket.h net/route.h net/if.h], [], [], 
+[[#if HAVE_SYS_SOCKET_H
+#include <sys/socket.h>
+#endif
+
+#if HAVE_NET_ROUTE_H
+#include <net/route.h>
+#endif]])
+
+AC_MSG_CHECKING(whether struct in6_addr has u6_addrXX and defines s6_addrXX)
+AC_TRY_COMPILE([#include <netinet/in.h>], [static struct in6_addr in6_u; 
+int u =  in6_u.s6_addr16;], [AC_MSG_RESULT(yes); AC_DEFINE([HAVE_IN6_ADDR_S6_ADDR],
+1, [whether struct in6_addr has u6_addrXX and defines s6_addrXX])],
+AC_MSG_RESULT(no))
+
+AC_MSG_CHECKING(for SIOCADDRT)
+AC_TRY_COMPILE([#include <sys/ioctl.h>], [int x = SIOCADDRT;],
+[AC_MSG_RESULT(yes); AC_DEFINE([HAVE_SIOCADDRT], 1, [weather the SIOCADDRT ioctl is defined])],
+AC_MSG_RESULT(no))
+
+dnl sockoption for joining an ipv6 group
+AC_MSG_CHECKING(if IPV6_JOIN_GROUP is defined)
+AC_TRY_COMPILE([#include <netinet/in.h>], [int x = IPV6_JOIN_GROUP;],
+[AC_MSG_RESULT(yes); AC_DEFINE([HAVE_IPV6_JOIN_GROUP], 1, 
+                     [weather IPV6_JOIN_GROUP is defined])],
+AC_MSG_RESULT(no))
+
+AC_MSG_CHECKING(if IPV6_ADD_MEMBERSHIP is defined)
+AC_TRY_COMPILE([#include <netinet/in.h>], [int x = IPV6_ADD_MEMBERSHIP;],
+[AC_MSG_RESULT(yes); AC_DEFINE([HAVE_IPV6_ADD_MEMBERSHIP], 1, 
+                     [weather IPV6_ADD_MEMBERSHIP is defined])],
+AC_MSG_RESULT(no))
+
+dnl if htons requires -lc
+dnl AC_MSG_CHECKING(if htons requires -lc)
+dnl AC_TRY_COMPILE([#include <arpa/inet.h>], [int x = htons(10);],
+dnl [AC_MSG_RESULT(no)],
+dnl [AC_MSG_RESULT(yes); LDFLAGS+=-lc])
+
+dnl Check where to put the pidfile
+AC_MSG_CHECKING(where to put seqno file)
+AC_ARG_WITH(seqfile,
+[AC_HELP_STRING([--with-seqfile], [Path to the radvd pidfile (/var/run/ip-driver.seq)])],
+        PATH_BLIP_SEQFILE=$withval,
+        PATH_BLIP_SEQFILE=/var/run/ip-driver.seq)
+AC_MSG_RESULT($PATH_BLIP_SEQFILE)
+AC_SUBST(PATH_BLIP_SEQFILE)
+
+
+AC_ARG_ENABLE([lpl],
+        [AS_HELP_STRING([--enable-lpl], [assume LPL is in use])],
+        AC_DEFINE([BLIP_L2_RETRIES], [1], [Number of link-layer retransmissions])
+        [])
+
+AC_LINK_FILES(linux/tun_dev_${arch}.c, linux/tun_dev.c)
+dnl AC_LINK_FILES(driver/routing-${arch}.c, driver/routing-platform.c)
+dnl AC_LINK_FILES(driver/netlink-${arch}.c, driver/netlink.c)
+dnl AC_CONFIG_SUBDIRS([driver/radvd-1.0])
+AC_OUTPUT
diff --git a/support/sdk/c/blip/lib6lowpan/6lowpan.h b/support/sdk/c/blip/lib6lowpan/6lowpan.h
new file mode 100644
index 00000000..1191ce57
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/6lowpan.h
@@ -0,0 +1,144 @@
+/*
+ * "Copyright (c) 2008,2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/*
+ * Header file for the 6lowpan/IPv6 stack.
+ *
+ * @author Stephen Dawson-Haggerty
+ * 
+ */
+
+#ifndef __6LOWPAN_H__
+#define __6LOWPAN_H__
+
+/*
+ * lengths of different lowpan headers
+ */
+enum {
+  LOWMSG_MESH_LEN = 5,
+  LOWMSG_BCAST_LEN = 2,
+  LOWMSG_FRAG1_LEN = 4,
+  LOWMSG_FRAGN_LEN = 5,
+};
+
+enum {
+  INET_MTU = 1280,
+  LIB6LOWPAN_MAX_LEN = 100,
+  LOWPAN_LINK_MTU = 109,
+  /*
+   * The time, in binary milliseconds, after which we stop waiting for
+   * fragments and report a failed receive.  We 
+   */
+  FRAG_EXPIRE_TIME = 4096,
+};
+
+/*
+ * magic numbers from rfc4944; some of them shifted: mostly dispatch values.
+ */
+enum {
+  LOWPAN_NALP_PATTERN = 0x0,
+  LOWPAN_MESH_PATTERN = 0x2,
+  LOWPAN_FRAG1_PATTERN = 0x18,
+  LOWPAN_FRAGN_PATTERN = 0x1c,
+  LOWPAN_BCAST_PATTERN = 0x50,
+  LOWPAN_IPV6_PATTERN = 0x41,
+};
+
+enum {
+  LOWPAN_MESH_V_MASK = 0x20,
+  LOWPAN_MESH_F_MASK = 0x10,
+  LOWPAN_MESH_HOPS_MASK = 0x0f,
+};
+
+/* 
+ * values for LOWPAN_IPHC from draft-ietf-6lowpan-hc-06
+ */
+enum {
+  LOWPAN_DISPATCH_BYTE_MASK = 0xe0,
+  LOWPAN_DISPATCH_BYTE_VAL  = 0x60,
+
+  LOWPAN_IPHC_TF_MASK = 0x18,
+  LOWPAN_IPHC_TF_NONE = 0x18,
+  LOWPAN_IPHC_TF_ECN_DSCP = 0x10,
+  LOWPAN_IPHC_TF_ECN_FL   = 0x08,
+  LOWPAN_IPHC_TF_ECN_DSCP_FL = 0x00,
+
+  LOWPAN_IPHC_NH_MASK = 0x04,
+  LOWPAN_IPHC_NH_INLINE = 0,
+
+  LOWPAN_IPHC_HLIM_MASK = 0x03,
+  LOWPAN_IPHC_HLIM_NONE = 0x00,
+  LOWPAN_IPHC_HLIM_1  = 0x01,
+  LOWPAN_IPHC_HLIM_64 = 0x02,
+  LOWPAN_IPHC_HLIM_255 = 0x03,
+
+  LOWPAN_IPHC_CID_MASK = 0x80,
+  LOWPAN_IPHC_CID_PRESENT = 0x80,
+
+  LOWPAN_IPHC_SAM_SHIFT = 4,
+  LOWPAN_IPHC_M = 0x08,
+  LOWPAN_IPHC_DAM_SHIFT = 0,
+
+  LOWPAN_IPHC_AC_CONTEXT = 0x04,
+  LOWPAN_IPHC_AM_MASK = 0x3,
+  LOWPAN_IPHC_AM_128 = 0x0,
+  LOWPAN_IPHC_AM_64  = 0x1,
+  LOWPAN_IPHC_AM_16  = 0x2,
+  LOWPAN_IPHC_AM_0   = 0x3,
+
+  LOWPAN_IPHC_AM_M     = 0x08,
+  LOWPAN_IPHC_AM_M_128 = 0x0,
+  LOWPAN_IPHC_AM_M_48  = 0x1,
+  LOWPAN_IPHC_AM_M_32  = 0x2,
+  LOWPAN_IPHC_AM_M_8   = 0x3,
+};
+
+/* 
+ * values for LOWPAN_IPNH from draft-ietf-6lowpan-hc-06
+ */
+enum {
+  LOWPAN_NHC_IPV6_MASK    = 0xf0,
+  LOWPAN_NHC_IPV6_PATTERN = 0xe0,
+
+  LOWPAN_NHC_EID_SHIFT  = 0x1,
+  LOWPAN_NHC_EID_MASK   = 0xe,
+  LOWPAN_NHC_EID_HOP     = 0x0 << LOWPAN_NHC_EID_SHIFT,
+  LOWPAN_NHC_EID_ROUTING = 0x1 << LOWPAN_NHC_EID_SHIFT,
+  LOWPAN_NHC_EID_FRAG    = 0x2 << LOWPAN_NHC_EID_SHIFT,
+  LOWPAN_NHC_EID_DEST    = 0x3 << LOWPAN_NHC_EID_SHIFT,
+  LOWPAN_NHC_EID_MOBILE  = 0x4 << LOWPAN_NHC_EID_SHIFT,
+  LOWPAN_NHC_EID_IPV6    = 0x7 << LOWPAN_NHC_EID_SHIFT,
+
+  LOWPAN_NHC_NH          = 0x1,
+
+  LOWPAN_NHC_UDP_MASK    = 0xf8,
+  LOWPAN_NHC_UDP_PATTERN = 0xf0,
+
+  LOWPAN_NHC_UDP_CKSUM      = 0x4,
+
+  LOWPAN_NHC_UDP_PORT_MASK  = 0x3,
+  LOWPAN_NHC_UDP_PORT_FULL  = 0x0,
+  LOWPAN_NHC_UDP_PORT_SRC_FULL = 0x1,
+  LOWPAN_NHC_UDP_PORT_DST_FULL = 0x2,
+  LOWPAN_NHC_UDP_PORT_SHORT = 0x3,
+};
+
+#endif
diff --git a/support/sdk/c/blip/lib6lowpan/Makefile.am b/support/sdk/c/blip/lib6lowpan/Makefile.am
new file mode 100644
index 00000000..9d81c82b
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/Makefile.am
@@ -0,0 +1,8 @@
+
+noinst_PROGRAMS=compress decompress
+CFLAGS += -I.. -I../.. -I../../../../../../tos/types -DPC 
+
+compress_SOURCES=compress.c ../utility.c
+decompress_SOURCES=decompress.c ../utility.c
+
+LDADD=../lib6lowpan.a
diff --git a/support/sdk/c/blip/lib6lowpan/blip-pc-includes.h b/support/sdk/c/blip/lib6lowpan/blip-pc-includes.h
new file mode 100644
index 00000000..39b1e1a2
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/blip-pc-includes.h
@@ -0,0 +1,65 @@
+#ifndef _BLIP_PC_INCLUDES_H_
+#define _BLIP_PC_INCLUDES_H_
+
+#include <stddef.h>
+#include <string.h>
+#include <stdio.h>
+
+#if HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#if HAVE_STDINT_H
+# include <stdint.h>
+#else
+# if HAVE_INTTYPES_H
+#  include <inttypes.h>
+# else
+#  error "no int types found!"
+#endif
+#endif // int types
+
+#if HAVE_LINUX_IF_TUN_H
+# include <linux/if_tun.h>
+#else
+// # error "TUN device not supported on this platform"
+struct tun_pi {
+  uint32_t af;
+};
+#endif
+
+#if HAVE_NET_IF_H
+
+// OSX prerequisites
+#if HAVE_SYS_SOCKET_H
+#include <sys/socket.h>
+#endif
+#if HAVE_NET_ROUTE_H
+#include <net/route.h>
+#endif
+
+# include <net/if.h> // for IFNAMSIZ
+#else
+# error "no IFNAMSIZE defined"
+#endif
+
+
+#if HAVE_NETINET_IN_H
+# include <netinet/in.h>
+#if ! HAVE_IN6_ADDR_S6_ADDR
+# define s6_addr16 __u6_addr.__u6_addr16
+# endif 
+#else
+# error "no netinet/in.h"
+#endif
+
+#if HAVE_ARPA_INET_H
+# include <arpa/inet.h>
+# include "nwbyte.h"
+#else
+# error "no htons routines!"
+#endif
+
+#include <ctype.h>
+
+#endif
diff --git a/support/sdk/c/blip/lib6lowpan/blip-tinyos-includes.h b/support/sdk/c/blip/lib6lowpan/blip-tinyos-includes.h
new file mode 100644
index 00000000..75b4d273
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/blip-tinyos-includes.h
@@ -0,0 +1,9 @@
+#ifndef _BLIP_TINYOS_INCLUDES_H
+#define _BLIP_TINYOS_INCLUDES_H
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "nwbyte.h"
+
+#endif
diff --git a/support/sdk/c/blip/lib6lowpan/ieee154_header.c b/support/sdk/c/blip/lib6lowpan/ieee154_header.c
new file mode 100644
index 00000000..57fa714d
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/ieee154_header.c
@@ -0,0 +1,69 @@
+
+
+#include "lib6lowpan-includes.h"
+#include "internal.h"
+
+#define COPY_IEEE154_ADDR(FIELD) \
+  if (frame-> FIELD  .ieee_mode == IEEE154_ADDR_SHORT) {         \
+    uint16_t tmpval = (frame-> FIELD . i_saddr);                 \
+    memcpy(buf, &tmpval, 2);                                     \
+    buf += 2;                                                    \
+  } else {                                                       \
+    memcpy(buf, &(frame-> FIELD .i_laddr), 8);                   \
+    buf += 8;                                                    \
+  }
+
+uint8_t *pack_ieee154_header(uint8_t *buf, size_t cnt,
+                          struct ieee154_frame_addr *frame) {
+  uint8_t *ieee_hdr = buf;
+  uint16_t fcf;
+  // struct ieee154_header_base *ieee_hdr = (struct ieee154_header_base *)buf;
+  /* fill in the following 802.15.4 fields: */
+  /*    length: will be set once we know how long the data is */
+  /*    fcf: (set frame time, addressing modes) */
+  /*    destpan: set to address in frame */
+  /*    source and destination addresses */
+
+  buf = buf + IEEE154_MIN_HDR_SZ;
+  COPY_IEEE154_ADDR(ieee_dst);
+  COPY_IEEE154_ADDR(ieee_src);
+
+  fcf = (IEEE154_TYPE_DATA << IEEE154_FCF_FRAME_TYPE);
+  fcf |= (frame->ieee_src.ieee_mode << IEEE154_FCF_SRC_ADDR_MODE);
+  fcf |= (frame->ieee_dst.ieee_mode << IEEE154_FCF_DEST_ADDR_MODE);
+
+  ieee_hdr[1] = (fcf & 0xff);
+  ieee_hdr[2] = (fcf >> 8);
+  ieee_hdr[4] = frame->ieee_dstpan & 0xff;
+  ieee_hdr[5] = frame->ieee_dstpan >> 8;
+  
+  return buf;
+}
+
+uint8_t *unpack_ieee154_hdr(uint8_t *buf, struct ieee154_frame_addr *frame) {
+  uint16_t fcf = ((uint16_t)buf[2] << 8) | buf[1];
+
+  frame->ieee_dstpan = htole16(((uint16_t)buf[5] << 8) | buf[4]);
+  frame->ieee_src.ieee_mode = (fcf >> IEEE154_FCF_SRC_ADDR_MODE) & 0x3;
+  frame->ieee_dst.ieee_mode = (fcf >> IEEE154_FCF_DEST_ADDR_MODE) & 0x3;
+
+  buf += IEEE154_MIN_HDR_SZ;
+
+  if (frame->ieee_dst.ieee_mode == IEEE154_ADDR_SHORT) {
+    memcpy(&frame->ieee_dst.i_saddr, buf, 2);
+    buf += 2;
+  } else if (frame->ieee_dst.ieee_mode == IEEE154_ADDR_EXT) {
+    memcpy(&frame->ieee_dst.i_laddr, buf, 8);
+    buf += 8;
+  }
+
+  if (frame->ieee_src.ieee_mode == IEEE154_ADDR_SHORT) {
+    memcpy(&frame->ieee_src.i_saddr, buf, 2);
+    buf += 2;
+  } else if (frame->ieee_src.ieee_mode == IEEE154_ADDR_EXT) {
+    memcpy(&frame->ieee_src.i_laddr, buf, 8);
+    buf += 8;
+  }
+  return buf;
+}
+
diff --git a/support/sdk/c/blip/lib6lowpan/ieee154_header.h b/support/sdk/c/blip/lib6lowpan/ieee154_header.h
new file mode 100644
index 00000000..0e3ddccb
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/ieee154_header.h
@@ -0,0 +1,7 @@
+#ifndef _IEEE154_HEADER_H
+#define _IEEE154_HEADER_H
+
+uint8_t *pack_ieee154_header(uint8_t *buf, size_t cnt, struct ieee154_frame_addr *frame) ;
+uint8_t *unpack_ieee154_hdr(uint8_t *buf, struct ieee154_frame_addr *frame);
+
+#endif
diff --git a/support/sdk/c/blip/lib6lowpan/in_cksum.c b/support/sdk/c/blip/lib6lowpan/in_cksum.c
new file mode 100644
index 00000000..38fba761
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/in_cksum.c
@@ -0,0 +1,213 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/* in_cksum.c
+ * 4.4-Lite-2 Internet checksum routine, modified to take a vector of
+ * pointers/lengths giving the pieces to be checksummed.
+ *
+ * $Id: in_cksum.c,v 1.3 2009/08/20 17:03:05 sdhsdh Exp $
+ */
+
+/*
+ * Copyright (c) 1988, 1992, 1993
+ *      The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *      @(#)in_cksum.c  8.1 (Berkeley) 6/10/93
+ */
+
+#include <stdlib.h>
+#include "in_cksum.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+
+
+#define ADDCARRY(x)  (x > 65535 ? x -= 65535 : x)
+#define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);}
+
+int
+in_cksum(const struct ip_iovec *vec) {
+#if 1
+  uint32_t sum = 0;
+  uint16_t res = 0;
+  uint16_t cur = 0;
+  int i;
+  uint8_t *w;
+ 
+  for (; vec != NULL;  vec = vec->iov_next) {
+    if (vec->iov_len == 0)
+      continue;
+   
+    w = vec->iov_base;
+    for (i = 0; i < vec->iov_len; i++) {
+      if (i % 2 == 0) {
+        cur |= ((uint16_t)w[i]) << 8;
+        if (i + 1 == vec->iov_len) {
+          goto finish;
+        }
+      } else {
+        cur |= w[i];
+      finish:
+        sum += cur;
+        res = (sum & 0xffff) + (sum >> 16);
+        cur = 0;
+      }
+    }
+  }
+  return ~res ;
+#else
+	register const uint16_t *w;
+	register uint32_t sum = 0;
+	register uint32_t mlen = 0;
+	int byte_swapped = 0;
+
+	union {
+		uint8_t	c[2];
+		uint16_t	s;
+	} s_util;
+	union {
+		uint16_t s[2];
+		uint32_t	l;
+	} l_util;
+
+	for (; vec != NULL; vec = vec->iov_next) {
+
+		if (vec->iov_len == 0)
+			continue;
+		w = (const uint16_t *)vec->iov_base;
+		if (mlen == -1) {
+			/*
+			 * The first byte of this chunk is the continuation
+			 * of a word spanning between this chunk and the
+			 * last chunk.
+			 *
+			 * s_util.c[0] is already saved when scanning previous
+			 * chunk.
+			 */
+			s_util.c[1] = *(const uint8_t *)w;
+			sum += s_util.s;
+			w = (const uint16_t *)((const uint8_t *)w + 1);
+			mlen = vec->iov_len - 1;
+		} else
+			mlen = vec->iov_len;
+		/*
+		 * Force to even boundary.
+		 */
+		if ((1 & (int) w) && (mlen > 0)) {
+			REDUCE;
+			sum <<= 8;
+			s_util.c[0] = *(const uint8_t *)w;
+			w = (const uint16_t *)((const uint8_t *)w + 1);
+			mlen--;
+			byte_swapped = 1;
+		}
+		/*
+		 * Unroll the loop to make overhead from
+		 * branches &c small.
+		 */
+		while ((mlen -= 32) >= 0) {
+			sum += w[0]; sum += w[1]; sum += w[2]; sum += w[3];
+			sum += w[4]; sum += w[5]; sum += w[6]; sum += w[7];
+			sum += w[8]; sum += w[9]; sum += w[10]; sum += w[11];
+			sum += w[12]; sum += w[13]; sum += w[14]; sum += w[15];
+			w += 16;
+		}
+		mlen += 32;
+		while ((mlen -= 8) >= 0) {
+			sum += w[0]; sum += w[1]; sum += w[2]; sum += w[3];
+			w += 4;
+		}
+		mlen += 8;
+		if (mlen == 0 && byte_swapped == 0)
+			continue;
+		REDUCE;
+		while ((mlen -= 2) >= 0) {
+			sum += *w++;
+		}
+		if (byte_swapped) {
+			REDUCE;
+			sum <<= 8;
+			byte_swapped = 0;
+			if (mlen == -1) {
+				s_util.c[1] = *(const uint8_t *)w;
+				sum += s_util.s;
+				mlen = 0;
+			} else
+				mlen = -1;
+		} else if (mlen == -1)
+			s_util.c[0] = *(const uint8_t *)w;
+	}
+	if (mlen == -1) {
+		/* The last mbuf has odd # of bytes. Follow the
+		   standard (the odd byte may be shifted left by 8 bits
+		   or not as determined by endian-ness of the machine) */
+		s_util.c[1] = 0;
+		sum += s_util.s;
+	}
+	REDUCE;
+	return (~sum & 0xffff);
+#endif
+}
+
+/* SDH : Added to allow for friendly message checksumming */
+uint16_t msg_cksum(const struct ip6_hdr *iph, 
+                   struct ip_iovec *data,
+                   uint8_t nxt_hdr) {
+  struct ip_iovec cksum_vec[3];
+  uint32_t hdr[2];
+
+  cksum_vec[0].iov_base = (uint8_t *)(iph->ip6_src.s6_addr);
+  cksum_vec[0].iov_len = 16;
+  cksum_vec[0].iov_next = &cksum_vec[1];
+  cksum_vec[1].iov_base = (uint8_t *)(iph->ip6_dst.s6_addr);
+  cksum_vec[1].iov_len = 16;
+  cksum_vec[1].iov_next = &cksum_vec[2];
+  cksum_vec[2].iov_base = (uint8_t *)hdr;
+  cksum_vec[2].iov_len = 8;
+  cksum_vec[2].iov_next = data;
+  hdr[0] = htonl(iov_len(data));
+  hdr[1] = htonl(nxt_hdr);
+
+  return in_cksum(cksum_vec);
+}
diff --git a/support/sdk/c/blip/lib6lowpan/in_cksum.h b/support/sdk/c/blip/lib6lowpan/in_cksum.h
new file mode 100644
index 00000000..b6230de4
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/in_cksum.h
@@ -0,0 +1,40 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef _IN_CKSUM_H_
+#define _IN_CKSUM_H_
+
+/* in_cksum.h
+ * Declaration of  Internet checksum routine.
+ *
+ * $Id: in_cksum.h,v 1.1 2009/08/20 17:03:05 sdhsdh Exp $
+ */
+
+#include <stdint.h>
+#include "iovec.h"
+#include "ip.h"
+
+int in_cksum(const struct ip_iovec *vec);
+uint16_t msg_cksum(const struct ip6_hdr *iph, 
+                   struct ip_iovec *data,
+                   uint8_t nxt_hdr);
+
+#endif
diff --git a/support/sdk/c/blip/lib6lowpan/internal.h b/support/sdk/c/blip/lib6lowpan/internal.h
new file mode 100644
index 00000000..f07dc393
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/internal.h
@@ -0,0 +1,47 @@
+#ifndef _INTERNAL_H
+#define _INTERNAL_H
+
+#include <stdint.h>
+#include "lib6lowpan-includes.h"
+#include "lib6lowpan.h"
+#include "ip.h"
+#include "Ieee154.h"
+
+/* Internal function prototypes for unit testing
+ * this way gcc can check against the right prototype.
+ */
+
+/* packing */
+int bit_range_zero_p(uint8_t *buf, int start, int end);
+inline uint8_t *pack_tcfl(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch);
+inline uint8_t *pack_nh(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch);
+inline uint8_t *pack_hlim(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch);
+uint8_t *pack_address(uint8_t *buf, struct in6_addr *addr, int context_match_len,
+                      ieee154_addr_t *l2addr, ieee154_panid_t pan, uint8_t *flags);
+uint8_t *pack_multicast(uint8_t *buf, struct in6_addr *addr, uint8_t *flags);
+int pack_udp(uint8_t *buf, size_t cnt, struct ip6_packet *packet, int offset);
+int pack_ipnh(uint8_t *dest, size_t cnt, uint8_t *type, struct ip6_packet *packet, int offset);
+int pack_nhc_chain(uint8_t **dest, size_t cnt, struct ip6_packet *packet);
+uint8_t *pack_ieee154_header(uint8_t *buf, size_t cnt,
+                             struct ieee154_frame_addr *frame);
+uint8_t * lowpan_pack_headers(struct ip6_packet *packet,
+                              struct ieee154_frame_addr *frame,
+                              uint8_t *buf, size_t cnt);
+
+/* unpacking */
+uint8_t *unpack_ieee154_hdr(uint8_t *buf, struct ieee154_frame_addr *frame);
+uint8_t *unpack_tcfl(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf);
+uint8_t *unpack_nh(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf);
+uint8_t *unpack_hlim(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf);
+uint8_t *unpack_address(struct in6_addr *addr, uint8_t dispatch, 
+                        int context, uint8_t *buf,
+                        ieee154_addr_t *frame, ieee154_panid_t pan);
+uint8_t *unpack_multicast(struct in6_addr *addr, uint8_t dispatch, 
+                          int context, uint8_t *buf);
+uint8_t *unpack_udp(uint8_t *dest, uint8_t *nxt_hdr, uint8_t *buf);
+uint8_t *unpack_ipnh(uint8_t *dest, size_t cnt, uint8_t *nxt_hdr, uint8_t *buf);
+uint8_t *unpack_nhc_chain(struct lowpan_reconstruct *recon,
+                          uint8_t **dest, size_t cnt, 
+                          uint8_t *nxt_hdr, uint8_t *buf);
+
+#endif
diff --git a/support/sdk/c/blip/lib6lowpan/iovec.c b/support/sdk/c/blip/lib6lowpan/iovec.c
new file mode 100644
index 00000000..e2ca1321
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/iovec.c
@@ -0,0 +1,61 @@
+#include <stdint.h>
+#include <stdio.h>
+
+#include "lib6lowpan.h"
+#include "iovec.h"
+
+#define MIN(X,Y) ((X) < (Y) ? (X) : (Y))
+
+/**
+ * read len bytes starting at offset into the buffer pointed to by buf
+ *
+ *  
+ */
+int iov_read(struct ip_iovec *iov, int offset, int len, uint8_t *buf) {
+  int cur_offset = 0, written = 0;
+  // printf("iov_read iov: %p offset: %i len: %i buf: %p\n", iov, offset, len, buf);
+
+  while (iov != NULL && cur_offset + iov->iov_len <= offset) {
+    cur_offset += iov->iov_len;
+    iov = iov->iov_next;
+  }
+  if (!iov) goto done;
+
+  while (len > 0) {
+    int start, len_here;
+    start      = offset - cur_offset;
+    len_here   = MIN(iov->iov_len - start, len);
+
+    // copy
+    memcpy(buf, iov->iov_base + start, len_here);
+    // printf("iov_read: %i/%i\n", len_here, len);
+
+    cur_offset += start + len_here;
+    offset     += len_here;
+    written    += len_here;
+    len        -= len_here;
+    buf        += len_here;
+    iov         = iov->iov_next;
+
+    if (!iov) {
+      goto done;
+    }
+  }
+ done:
+  return written;
+}
+
+int iov_len(struct ip_iovec *iov) {
+  int rv = 0;
+  while (iov) {
+    rv += iov->iov_len;
+    iov = iov->iov_next;
+  }
+  return rv;
+}
+
+void iov_prefix(struct ip_iovec *iov, struct ip_iovec *new, uint8_t *buf, size_t len) {
+  new->iov_base = buf;
+  new->iov_len = len;
+  new->iov_next = iov;
+}
diff --git a/support/sdk/c/blip/lib6lowpan/iovec.h b/support/sdk/c/blip/lib6lowpan/iovec.h
new file mode 100644
index 00000000..8f420218
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/iovec.h
@@ -0,0 +1,18 @@
+#ifndef IOVEC_H_
+#define IOVEC_H_
+
+#include <stdint.h>
+#include <stddef.h>
+
+struct ip_iovec {
+  uint8_t         *iov_base;
+  size_t           iov_len;
+  struct ip_iovec *iov_next;
+};
+
+int iov_read(struct ip_iovec *iov, int offset, int len, uint8_t *buf);
+int iov_len(struct ip_iovec *iov);
+void iov_prefix(struct ip_iovec *iov, struct ip_iovec *new_iov, uint8_t *buf, size_t len);
+void iov_print(struct ip_iovec *iov);
+
+#endif
diff --git a/support/sdk/c/blip/lib6lowpan/ip.h b/support/sdk/c/blip/lib6lowpan/ip.h
new file mode 100644
index 00000000..f3cf13a7
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/ip.h
@@ -0,0 +1,253 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef _IP_H_
+#define _IP_H_
+
+#include <string.h>
+
+#include "lib6lowpan-includes.h"
+
+/*
+ * define message structures for internet communication
+ *
+ */
+
+#if ! HAVE_NETINET_IN_H 
+// update to use netinet/in definition of an IPv6 address; this is a
+//  lot more elegent.
+struct in6_addr
+  {
+    union
+      {
+	uint8_t	u6_addr8[16];
+	uint16_t u6_addr16[8];
+	uint32_t u6_addr32[4];
+      } in6_u;
+#define s6_addr			in6_u.u6_addr8
+#define s6_addr16		in6_u.u6_addr16
+#define s6_addr32		in6_u.u6_addr32
+  };
+
+struct sockaddr_in6 {
+  uint16_t       sin6_port;
+  struct in6_addr sin6_addr;
+};
+#else 
+#include <netinet/in.h>
+#endif
+
+/*
+ * Definition for internet protocol version 6.
+ * RFC 2460
+ *      @(#)ip.h        8.1 (Berkeley) 6/10/93
+ */
+struct ip6_hdr {
+  union {
+    struct ip6_hdrctl {
+      uint32_t ip6_un1_flow; /* 20 bits of flow-ID */
+      uint16_t ip6_un1_plen; /* payload length */
+      uint8_t  ip6_un1_nxt;  /* next header */
+      uint8_t  ip6_un1_hlim; /* hop limit */
+    } ip6_un1;
+    uint8_t ip6_un2_vfc;   /* 4 bits version, top 4 bits class */
+  } ip6_ctlun;
+  struct in6_addr ip6_src; /* source address */
+  struct in6_addr ip6_dst; /* destination address */
+} __attribute__((packed));
+
+#define ip6_vfc         ip6_ctlun.ip6_un2_vfc
+#define ip6_flow        ip6_ctlun.ip6_un1.ip6_un1_flow
+#define ip6_plen        ip6_ctlun.ip6_un1.ip6_un1_plen
+#define ip6_nxt         ip6_ctlun.ip6_un1.ip6_un1_nxt
+#define ip6_hlim        ip6_ctlun.ip6_un1.ip6_un1_hlim
+#define ip6_hops        ip6_ctlun.ip6_un1.ip6_un1_hlim
+
+#define IPV6_VERSION            0x60
+#define IPV6_VERSION_MASK       0xf0
+
+#if BYTE_ORDER == BIG_ENDIAN
+#define IPV6_FLOWINFO_MASK      0x0fffffff      /* flow info (28 bits) */
+#define IPV6_FLOWLABEL_MASK     0x000fffff      /* flow label (20 bits) */
+#else
+#if BYTE_ORDER == LITTLE_ENDIAN
+#define IPV6_FLOWINFO_MASK      0xffffff0f      /* flow info (28 bits) */
+#define IPV6_FLOWLABEL_MASK     0xffff0f00      /* flow label (20 bits) */
+#endif /* LITTLE_ENDIAN */
+#endif
+#if 1
+/* ECN bits proposed by Sally Floyd */
+#define IP6TOS_CE               0x01    /* congestion experienced */
+#define IP6TOS_ECT              0x02    /* ECN-capable transport */
+#endif
+
+/*
+ * Extension Headers
+ */
+struct ip6_ext {
+  uint8_t ip6e_nxt;
+  uint8_t ip6e_len;
+};
+
+struct tlv_hdr {
+  uint8_t type;
+  uint8_t len;
+};
+/*
+ * IP protocol numbers
+ */
+enum {
+  IANA_ICMP = 58,
+  IANA_UDP = 17,
+  IANA_TCP = 6,
+
+  // IPV6 defined extention header types.  All other next header
+  // values are supposed to be transport protocols, with TLVs used
+  IPV6_HOP = 0,
+  IPV6_IPV6 = 41,
+  IPV6_ROUTING = 43,
+  IPV6_FRAG = 44,
+  IPV6_AUTH = 51,
+  IPV6_SEC = 50,
+  IPV6_NONEXT = 59,
+  IPV6_DEST = 60,
+  IPV6_MOBILITY = 135,
+};
+#define EXTENSION_HEADER(X) ((X) == IPV6_HOP || (X) == IPV6_ROUTING || (X) == IPV6_DEST)
+#define COMPRESSIBLE_TRANSPORT(X) ((X) == IANA_UDP)
+
+/*
+ * icmp
+ */
+struct  icmp6_hdr {
+  uint8_t        type;     /* type field */
+  uint8_t        code;     /* code field */
+  uint16_t       cksum;    /* checksum field */
+};
+
+enum {
+    ICMP_TYPE_ECHO_DEST_UNREACH     = 1,
+    ICMP_TYPE_ECHO_PKT_TOO_BIG      = 2, 
+    ICMP_TYPE_ECHO_TIME_EXCEEDED    = 3,
+    ICMP_TYPE_ECHO_PARAM_PROBLEM    = 4,
+    ICMP_TYPE_ECHO_REQUEST          = 128,
+    ICMP_TYPE_ECHO_REPLY            = 129,
+    ICMP_TYPE_ROUTER_SOL            = 133,
+    ICMP_TYPE_ROUTER_ADV            = 134,
+    ICMP_TYPE_NEIGHBOR_SOL          = 135,
+    ICMP_TYPE_NEIGHBOR_ADV          = 136,
+    ICMP_NEIGHBOR_HOPLIMIT          = 255,
+
+    ICMP_CODE_HOPLIMIT_EXCEEDED     = 0,
+    ICMP_CODE_ASSEMBLY_EXCEEDED     = 1,
+};
+
+/*
+ * UDP protocol header.
+ */
+struct udp_hdr {
+    uint16_t srcport;               /* source port */
+    uint16_t dstport;               /* destination port */
+    uint16_t len;                   /* udp length */
+    uint16_t chksum;                /* udp checksum */
+};
+
+/*
+ * TCP transport headers and flags
+ */
+enum {
+  TCP_FLAG_FIN = 0x1,
+  TCP_FLAG_SYN = 0x2,
+  TCP_FLAG_RST = 0x4,
+  TCP_FLAG_PSH = 0x8,
+  TCP_FLAG_ACK = 0x10,
+  TCP_FLAG_URG = 0x20,
+  TCP_FLAG_ECE = 0x40,
+  TCP_FLAG_CWR = 0x80,
+};
+
+struct tcp_hdr {
+  uint16_t srcport;
+  uint16_t dstport;
+  uint32_t seqno;
+  uint32_t ackno;
+  uint8_t offset;
+  uint8_t flags;
+  uint16_t window;
+  uint16_t chksum;
+  uint16_t urgent;
+};
+
+/*
+ * IP metadata and routing structures
+ */
+struct ip6_metadata {
+  ieee154_addr_t sender;
+  uint8_t   lqi;
+};
+
+
+/*
+ * These are data structures to hold IP messages.  We used a linked
+ * list of headers so that we can easily add extra headers with no
+ * copy; similar to the linux iovec's or BSD mbuf structs.  
+ * Every split_ip_msg contains a full IPv6 header (40 bytes), but it
+ * is placed at the end of the struct so that we can read() a message
+ * straight into one of these structs, and then just set up the header
+ * chain.
+ *
+ * Due to the way fragmentation is currently implemented, the total
+ * length of the data referenced from this chain must not be longer
+ * then what can fit into a single fragment.  This is a limitation of
+ * the current fragmentation code, but is perfectly usable in most
+ * cases.
+ */
+
+struct ip6_packet {
+  struct ip_iovec  *ip6_data;
+  struct ip6_hdr ip6_hdr;
+};
+
+struct ip6_packet_headers {
+  // points to the source header within the packed fields, IF it contains one.
+  struct ip6_hdr   *hdr_ip6;
+  struct ip6_ext   *hdr_hop;
+  struct ip6_route *hdr_route;
+  struct ip6_ext   *hdr_dest;
+
+  uint8_t           u_hdr;
+  uint8_t          *u_data;
+};
+
+#ifndef NO_LIB6LOWPAN_ASCII
+/*
+ * parse a string representation of an IPv6 address
+ */ 
+void inet_pton6(char *addr, struct in6_addr *dest);
+int  inet_ntop6(struct in6_addr *addr, char *buf, int cnt);
+#endif
+
+
+#define POINTER_DIFF(AP, BP) (((char *)AP) - ((char *)BP))
+#define POINTER_SUM(AP, B) (((char *)AP) + (B))
+
+#endif
+
diff --git a/support/sdk/c/blip/lib6lowpan/ip_malloc.c b/support/sdk/c/blip/lib6lowpan/ip_malloc.c
new file mode 100644
index 00000000..a3a0ec69
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/ip_malloc.c
@@ -0,0 +1,119 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef NO_IP_MALLOC
+#include <stdint.h>
+#include <stdio.h>
+#include "ip_malloc.h"
+
+uint8_t heap[IP_MALLOC_HEAP_SIZE];
+
+void ip_malloc_init() {
+  bndrt_t *b = (bndrt_t *)heap;
+  *b = IP_MALLOC_HEAP_SIZE  & IP_MALLOC_LEN;
+}
+
+void *ip_malloc(uint16_t sz) {
+  bndrt_t *cur = (bndrt_t *)heap;
+
+  sz += sizeof(bndrt_t) * 2;
+  sz += (sz % IP_MALLOC_ALIGN);
+
+  while (((*cur & IP_MALLOC_LEN) < sz || (*cur & IP_MALLOC_INUSE) != 0) 
+         && (uint8_t *)cur - heap < IP_MALLOC_HEAP_SIZE) {
+    cur = (bndrt_t *)(((uint8_t *)cur) + ((*cur) & IP_MALLOC_LEN));
+  }
+
+  if ((uint8_t *)cur < heap + IP_MALLOC_HEAP_SIZE) {
+    uint16_t oldsize = *cur & IP_MALLOC_LEN;
+    bndrt_t *next;
+    sz -= sizeof(bndrt_t);
+    next = ((bndrt_t *)(((uint8_t *)cur) + sz));
+
+    *cur = (sz & IP_MALLOC_LEN) | IP_MALLOC_INUSE;
+    *next = (oldsize - sz) & IP_MALLOC_LEN;
+
+    return cur + 1;
+  } else return NULL;
+}
+
+void ip_free(void *ptr) {
+  bndrt_t *prev = NULL, *cur, *next = NULL;
+  cur = (bndrt_t *)heap;
+
+  while (cur + 1 != ptr && (uint8_t *)cur - heap < IP_MALLOC_HEAP_SIZE) {
+    prev = cur;
+    cur = (bndrt_t *)(((uint8_t *)cur) + ((*cur) & IP_MALLOC_LEN));
+  }
+  if (cur + 1 == ptr) {
+    next = (bndrt_t *)((*cur & IP_MALLOC_LEN) + ((uint8_t *)cur));
+
+    *cur &= ~IP_MALLOC_INUSE;
+    if ((((uint8_t *)next) - heap) < IP_MALLOC_HEAP_SIZE && 
+        (*next & IP_MALLOC_INUSE) == 0) {
+      *cur = (*cur & IP_MALLOC_LEN) + (*next & IP_MALLOC_LEN);
+    }
+    if (prev != NULL && (*prev & IP_MALLOC_INUSE) == 0) {
+      *prev = (*prev & IP_MALLOC_LEN) + (*cur & IP_MALLOC_LEN);
+    }
+  }
+}
+
+uint16_t ip_malloc_freespace() {
+  uint16_t ret = 0;
+  bndrt_t *cur = (bndrt_t *)heap;
+
+  while ((uint8_t *)cur - heap < IP_MALLOC_HEAP_SIZE) {
+    if ((*cur & IP_MALLOC_INUSE) == 0)
+      ret += *cur & IP_MALLOC_LEN;
+    cur = (bndrt_t *)(((uint8_t *)cur) + ((*cur) & IP_MALLOC_LEN));
+  }
+  return ret;
+}
+
+#ifdef PC
+void dump_heap() {
+  int i;
+  for (i = 0; i < IP_MALLOC_HEAP_SIZE; i++) {
+    printf("0x%hx ", heap[i]);
+    if (i % 8 == 7) printf("  ");
+    if (i % 16 == 15) printf ("\n");
+    if (i > 64) break;
+  }
+  printf("\n");
+}
+
+void ip_print_heap() {
+  bndrt_t *cur = (bndrt_t *)heap;
+  while (((uint8_t *)cur)  - heap < IP_MALLOC_HEAP_SIZE) {
+    printf ("heap region start: 0x%x length: %i used: %i\n", 
+            cur, (*cur & IP_MALLOC_LEN), (*cur & IP_MALLOC_INUSE) >> 15);
+    if ((*cur & IP_MALLOC_LEN) == 0) {
+      printf("ERROR: zero length cell detected!\n");
+      dump_heap();
+      exit(1);
+    }
+    cur = (bndrt_t *)(((uint8_t *)cur) + ((*cur) & IP_MALLOC_LEN));
+
+  }
+}
+#endif
+#endif
diff --git a/support/sdk/c/blip/lib6lowpan/ip_malloc.h b/support/sdk/c/blip/lib6lowpan/ip_malloc.h
new file mode 100644
index 00000000..655f3648
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/ip_malloc.h
@@ -0,0 +1,51 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef NO_IP_MALLOC
+#ifndef IP_MALLOC_H_
+#define IP_MALLOC_H_
+
+#include <stdint.h>
+
+// align on this number of byte boundarie#s
+#define IP_MALLOC_ALIGN   2
+#define IP_MALLOC_LEN     0x0fff
+#define IP_MALLOC_FLAGS   0x7000
+#define IP_MALLOC_INUSE   0x8000
+#define IP_MALLOC_HEAP_SIZE 1500
+
+extern uint8_t heap[IP_MALLOC_HEAP_SIZE];
+typedef uint16_t bndrt_t;
+
+void ip_malloc_init();
+void *ip_malloc(uint16_t sz);
+void ip_free(void *ptr);
+uint16_t ip_malloc_freespace();
+
+#ifndef PC
+#define malloc(X) ip_malloc(X)
+#define free(X)   ip_free(X)
+#else
+void ip_print_heap();
+#endif
+
+#endif
+#endif
diff --git a/support/sdk/c/blip/lib6lowpan/lib6lowpan-includes.h b/support/sdk/c/blip/lib6lowpan/lib6lowpan-includes.h
new file mode 100644
index 00000000..01e174da
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/lib6lowpan-includes.h
@@ -0,0 +1,25 @@
+#ifndef _LIB6LOWPAN_INCLUDES_H
+#define _LIB6LOWPAN_INCLUDES_H
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#ifdef PC
+#include "blip-pc-includes.h"
+// typedef uint16_t ieee154_saddr_t;
+typedef uint16_t hw_pan_t;
+enum {
+  HW_BROADCAST_ADDR = 0xffff,
+};
+#else
+#include "blip-tinyos-includes.h"
+#endif
+
+#include <Ieee154.h>
+
+#include "nwbyte.h"
+#include "iovec.h"
+#include "6lowpan.h"
+
+#endif
diff --git a/support/sdk/c/blip/lib6lowpan/lib6lowpan.c b/support/sdk/c/blip/lib6lowpan/lib6lowpan.c
new file mode 100644
index 00000000..79f10810
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/lib6lowpan.c
@@ -0,0 +1,793 @@
+/* Implementation of draft-ietf-6lowpan-hc-06 */
+/* @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu> */
+
+/* Each function in this file should have an associated set of test
+ * cases in tests/ 
+ *
+ * The library is built up from small functions which take care of one
+ * element of compressor or decompression.  This way, we can unit-test
+ * all the little pieces separately and then have one big function
+ * which merely applies them in the right order.  In general, HC
+ * allows you to do this pretty well -- the only real state you need
+ * to hang onto is the dispatch block at the beginning of the
+ * encoding.
+*/
+
+#include <stdint.h>
+#include <string.h>
+#include <stdlib.h>
+#ifdef UNIT_TESTING
+#include <stdio.h>
+#else
+// #define printf(fmt, args ...) ;
+#endif
+
+#include "lib6lowpan-includes.h"
+#include "lib6lowpan.h"
+#include "ip.h"
+#include "Ieee154.h"
+#include "ieee154_header.h"
+#include "internal.h"
+
+/* UTILITY MACROS AND FUNCTIONS */
+
+/* test if the first 64-bits are fe80::/64 */
+#define IS_LINKLOCAL(ADDR) \
+  ((ADDR)->s6_addr16[0] == htons(0xfe80) && \
+   (ADDR)->s6_addr16[1] == 0 && \
+   (ADDR)->s6_addr16[2] == 0 && \
+   (ADDR)->s6_addr16[3] == 0)
+
+/* test if the address is all zeroes */
+#define IS_UNSPECIFIED(ADDR) \
+  ((ADDR)->s6_addr16[0] == 0 && \
+   (ADDR)->s6_addr16[1] == 0 && \
+   (ADDR)->s6_addr16[2] == 0 && \
+   (ADDR)->s6_addr16[3] == 0 && \
+   (ADDR)->s6_addr16[4] == 0 && \
+   (ADDR)->s6_addr16[5] == 0 && \
+   (ADDR)->s6_addr16[6] == 0 && \
+   (ADDR)->s6_addr16[7] == 0)
+
+#if ! defined(HAVE_LOWPAN_EXTERN_MATCH_CONTEXT)
+int lowpan_extern_read_context(struct in6_addr *addr, int context) {
+  return -1;
+}
+
+int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) {
+  return 0;
+}
+
+#endif
+
+int iid_eui_cmp(uint8_t *iid, uint8_t *eui) {
+  return (iid[0] == (eui[7] ^ 0x2) &&
+          iid[1] == eui[6] &&
+          iid[2] == eui[5] &&
+          iid[3] == eui[4] &&
+          iid[4] == eui[3] &&
+          iid[5] == eui[2] &&
+          iid[6] == eui[1] &&
+          iid[7] == eui[0]);
+}
+
+/* @return 0 if all bits in the range [start,end) are zero */
+/*    -1 otherwise */
+int bit_range_zero_p(uint8_t *buf, int start, int end) {
+  int start_byte = start / 8;
+  int end_byte   = end / 8;
+  int i;
+  uint8_t start_mask = 0xff << (8 - (start % 8));
+  uint8_t end_mask   = 0xff << (8 - (end % 8));
+  // printf("start: %i end: %i, (%i, %i)\n", start, end, start_byte, end_byte);
+  // printf("start mask: 0x%x end mask: 0x%x\n", start_mask, end_mask);
+
+  if ((buf[start_byte] & start_mask) != 0) {
+    return -1;
+  }
+  if ((buf[end_byte] & end_mask) != 0) {
+    return -1;
+  }
+  for (i = start_byte; i < end_byte; i++) {
+    if (buf[i] != 0) return -1;
+  }
+  return 0;
+}
+
+/* HEADER PACKING  */
+/*   functions for creating a compressed representation of an IPv6 header */
+
+/* packs the Traffic Class and Flow Label fields as described in the internet draft */
+/* @buf the buffer to write any anyline fields to */
+/* @hdr the IPv6 header being compressed; this function only examines the first four octets */
+/* @dispatch the octet corresponding to the first octet of the IPHC dispatch value */
+/*      modified to reflect the packing of the fields */
+inline uint8_t *pack_tcfl(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch) {
+  uint32_t flow = (ntohl(hdr->ip6_flow) & 0x000fffff);
+  uint8_t  tc   = (ntohl(hdr->ip6_flow) >> 20) & 0xff;
+  if (flow == 0 && tc == 0) {
+    // lucky us
+    *dispatch |= LOWPAN_IPHC_TF_NONE;
+  } else if (flow == 0) {
+    *dispatch |= LOWPAN_IPHC_TF_ECN_DSCP;
+    *buf  = (tc >> 2) & 0xff;
+    *buf |= (tc << 6) & 0xff;
+    buf++;
+  } else if ((tc & 0x3) == tc) {
+    *dispatch |= LOWPAN_IPHC_TF_ECN_FL;
+    *buf        = (tc << 6) & 0xff;
+    *buf       |= (flow >> 16) & 0x0f;
+    *(buf + 1)  = (flow >> 8)  & 0xff;
+    *(buf + 2)  = (flow)       & 0xff;
+    buf += 3;
+  } else {
+    *dispatch |= LOWPAN_IPHC_TF_ECN_DSCP_FL;
+    *buf  = (tc >> 2) & 0xff;
+    *buf |= (tc << 6) & 0xff;
+    
+    *(buf + 1)  = (flow >> 16) & 0x0f;
+    *(buf + 2)  = (flow >> 8)  & 0xff;
+    *(buf + 3)  = (flow)       & 0xff;
+    buf += 4;
+  }
+  return buf;
+}
+
+inline uint8_t *pack_nh(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch) {
+  uint8_t nxt = hdr->ip6_nxt;
+  if (nxt == IPV6_HOP  || nxt == IPV6_ROUTING  || nxt == IPV6_FRAG ||
+      nxt == IPV6_DEST || nxt == IPV6_MOBILITY || nxt == IPV6_IPV6 ||
+      nxt == IANA_UDP) {
+    *dispatch |= LOWPAN_IPHC_NH_MASK;
+  } else {
+    *buf++ = hdr->ip6_nxt;
+  }
+  return buf;
+}
+
+inline uint8_t *pack_hlim(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch) {
+  if (hdr->ip6_hlim == 1) {
+    *dispatch |= LOWPAN_IPHC_HLIM_1;
+  } else if (hdr->ip6_hlim == 64) {
+    *dispatch |= LOWPAN_IPHC_HLIM_64;
+  } else if (hdr->ip6_hlim == 255) {
+    *dispatch |= LOWPAN_IPHC_HLIM_255;
+  } else {
+    *dispatch |= LOWPAN_IPHC_HLIM_NONE;
+    *buf++ = hdr->ip6_hlim;
+  }
+  return buf;
+}
+
+/* packs all non-multicast addresses */
+/* @buf output buffer */
+/* @addr the ipv6 address to be compressed */
+/* @context_match_len if a context matches, how long the match is.  must be multiple of 8 */
+/* @l2addr the link-layer address correspoinding to the address (source or destination) */
+/* @pan the destination pan ID */
+/* @flags return argument; which address mode was selected */
+uint8_t *pack_address(uint8_t *buf, struct in6_addr *addr, int context_match_len,
+                      ieee154_addr_t *l2addr, ieee154_panid_t pan, uint8_t *flags) {
+  *flags = 0;
+  if (IS_LINKLOCAL(addr)) {
+    /* then we use stateless compression */
+    /*     no bits to set, just pack the IID */
+    if (addr->s6_addr16[4] == 0 &&
+        addr->s6_addr16[5] == 0 &&
+        addr->s6_addr16[6] == 0) {
+      // then we use 16-bit mode.  This isn't going to be popular...
+      *flags |= LOWPAN_IPHC_AM_16;
+      memcpy(buf, &addr->s6_addr[14], 2);
+      return buf += 2;
+    } else if (/* maybe it's a 16-bit address with the IID derived from the PANID + address */
+               (addr->s6_addr16[4] == htons(letohs(pan)) &&
+                addr->s6_addr16[5] == htons(0x00ff) &&
+                addr->s6_addr16[6] == htons(0xfe00) &&
+                (((l2addr->ieee_mode == IEEE154_ADDR_SHORT) && 
+                  addr->s6_addr16[7] == htons(letohs(l2addr->i_saddr))))) ||
+               /* no?  Maybe it's just a straight-up 64-bit EUI64 */
+                 ((l2addr->ieee_mode == IEEE154_ADDR_EXT) && 
+                  (iid_eui_cmp(&addr->s6_addr[8], l2addr->i_laddr.data)))) {
+      /* in either case we can elide the addressing from the packet. */
+      *flags |= LOWPAN_IPHC_AM_0;
+      return buf;
+    } else {
+      *flags |= LOWPAN_IPHC_AM_64;
+      memcpy(buf, &addr->s6_addr[8], 8);
+      return buf + 8;
+    }
+  } else if (context_match_len > 0) {
+    int extra = 0;
+    // then we're using the context
+    *flags |= LOWPAN_IPHC_AC_CONTEXT;
+    if (context_match_len == 128) {
+      *flags |= LOWPAN_IPHC_AM_0;
+    } else if (bit_range_zero_p(&addr->s6_addr[0], context_match_len, 112) == 0) {
+      *flags |= LOWPAN_IPHC_AM_16;
+      memcpy(buf, &addr->s6_addr[14], 2);
+      extra = 2;
+    } else if (bit_range_zero_p(&addr->s6_addr[0], context_match_len, 64) == 0) {
+      *flags |= LOWPAN_IPHC_AM_64;
+      memcpy(buf, &addr->s6_addr[8], 8);
+      extra = 8;
+    } else {
+      *flags |= LOWPAN_IPHC_AM_128;
+      *flags &= ~LOWPAN_IPHC_AC_CONTEXT;
+      memcpy(buf, &addr->s6_addr[0], 16);
+      extra = 16;
+    }
+    return buf + extra;
+  } else if (IS_UNSPECIFIED(addr)) {
+    /* this case doesn't involve any compression */
+    *flags |= LOWPAN_IPHC_AC_CONTEXT | LOWPAN_IPHC_AM_128;
+    return buf;
+  } else {
+    /* otherwise we have to send the whole thing. */
+    *flags |= LOWPAN_IPHC_AM_128;
+    memcpy(buf, addr->s6_addr, 16);
+    return buf + 16;
+  }
+}
+
+/* Packs a multicast address into the smallest address possible. */
+/*  does not currently implement stateful multicast address compression */
+/*  also does not check to make sure it is a multicast address */
+uint8_t *pack_multicast(uint8_t *buf, struct in6_addr *addr, uint8_t *flags) {
+  /* no need to set AC since it's zero */
+  *flags = 0;
+  if ((addr->s6_addr16[0] == htons(0xff02)) &&
+      (bit_range_zero_p(addr->s6_addr, 16, 120) == 0)) {
+    *flags |= LOWPAN_IPHC_AM_M_8;
+    *buf = addr->s6_addr[15];
+    return buf + 1;
+  } else if (bit_range_zero_p(addr->s6_addr, 16, 104) == 0) {
+    *flags |= LOWPAN_IPHC_AM_M_32;
+    *buf = addr->s6_addr[1];
+    memcpy(buf + 1, &addr->s6_addr[13], 3);
+    return buf + 4;
+  } else if (bit_range_zero_p(addr->s6_addr, 16, 88) == 0) {
+    *flags |= LOWPAN_IPHC_AM_M_48;
+    *buf = addr->s6_addr[1];
+    memcpy(buf + 1, &addr->s6_addr[11], 5);
+    return buf + 6;
+  } else {
+    *flags += LOWPAN_IPHC_AM_M_128;
+    memcpy(buf, addr->s6_addr, 16);
+    return buf + 16;
+  }
+}
+
+/* never pack the ports */
+int pack_udp(uint8_t *buf, size_t cnt, struct ip6_packet *packet, int offset) {
+  struct udp_hdr udp;
+
+  if (cnt < 7) {
+    return -1;
+  }
+  
+  if (iov_read(packet->ip6_data, offset, sizeof(struct udp_hdr), (void *)&udp) != 
+      sizeof(struct udp_hdr)) {
+    return -1;
+  }
+
+  *buf = LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_PORT_FULL;
+  memcpy(buf + 1, &udp.srcport, 4);
+  memcpy(buf + 5, &udp.chksum, 2);
+  return 7;
+}
+
+int pack_ipnh(uint8_t *dest, size_t cnt, uint8_t *type, struct ip6_packet *packet, int offset) {
+  struct ip6_ext ext;
+
+  /* read the ipv6 extension header out for processing */
+  if (iov_read(packet->ip6_data, offset, 2, (void *)&ext) != 2)
+    return -1;
+
+  if (ext.ip6e_len > cnt)
+    return -1;
+
+  *dest = LOWPAN_NHC_IPV6_PATTERN;
+  switch (*type) {
+  case IPV6_HOP:
+    *dest |= LOWPAN_NHC_EID_HOP; break;
+  case IPV6_ROUTING:
+    *dest |= LOWPAN_NHC_EID_ROUTING; break;
+  case IPV6_FRAG:
+    *dest |= LOWPAN_NHC_EID_FRAG; break;
+  case IPV6_DEST:
+    *dest |= LOWPAN_NHC_EID_DEST; break;
+  case IPV6_MOBILITY:
+    *dest |= LOWPAN_NHC_EID_MOBILE; break;
+  default:
+    return -1;
+  }
+
+  /* store the next header type */
+  /*  if it's compressable, we will compress it */
+  *type = ext.ip6e_nxt;
+  if (ext.ip6e_nxt == IPV6_HOP  || ext.ip6e_nxt == IPV6_ROUTING  || ext.ip6e_nxt == IPV6_FRAG ||
+      ext.ip6e_nxt == IPV6_DEST || ext.ip6e_nxt == IPV6_MOBILITY || ext.ip6e_nxt == IPV6_IPV6 ||
+      ext.ip6e_nxt == IANA_UDP) {
+    *dest |= LOWPAN_NHC_NH;
+  } else {
+    /* include the next header value if it's not compressible */
+    dest++;
+    *dest = ext.ip6e_nxt;
+  }
+
+  dest ++;
+  *dest++ = ext.ip6e_len;
+
+  /* copy the payload */
+  if (iov_read(packet->ip6_data, offset + 2, ext.ip6e_len - 2, dest) != ext.ip6e_len - 2)
+    return -1;
+
+  return ext.ip6e_len;
+}
+
+int pack_nhc_chain(uint8_t **dest, size_t cnt, struct ip6_packet *packet) {
+  uint8_t nxt = packet->ip6_hdr.ip6_nxt;
+  int offset = 0, rv;
+  /* @return offset is the offset into the unpacked ipv6 datagram */
+  /* dest is updated to show how far we have gotten in the packed data */
+
+  
+  while (nxt == IPV6_HOP  || nxt == IPV6_ROUTING  || nxt == IPV6_FRAG ||
+         nxt == IPV6_DEST || nxt == IPV6_MOBILITY || nxt == IPV6_IPV6) {
+    int extra;
+    rv = pack_ipnh(*dest, cnt, &nxt,  packet, offset);
+
+    if (rv < 0) return -1;
+    /* it just so happens that LOWPAN_IPNH doesn't change the length
+       of the headers */
+    /* SDH : right... it actually can change the length depending on
+       whether the next header value is elided or not.*/
+    extra = (**dest & LOWPAN_NHC_NH) ? 0 : 1;
+    *dest  += rv + extra;
+    offset += rv;
+    cnt    -= rv;
+  }
+
+  if (nxt == IANA_UDP) {
+    rv = pack_udp(*dest, cnt, packet, offset);
+
+    if (rv < 0) return -1;
+    offset += sizeof(struct udp_hdr);
+    *dest  += rv;
+  }
+  return offset;
+}
+
+uint8_t * lowpan_pack_headers(struct ip6_packet *packet,
+                        struct ieee154_frame_addr *frame,
+                        uint8_t *buf, size_t cnt) {
+  uint8_t *dispatch, temp_dispatch, ctx_match_length;
+
+  if ((packet->ip6_hdr.ip6_vfc & IPV6_VERSION_MASK) != IPV6_VERSION) {
+    return NULL;
+  }
+  
+  /* Packing strategy: */
+  /*   1. we never create 6lowpan broadcast or mesh frames */
+  /*   2. first, pack the IP headers and any other compressible header into the frame */
+  /*   3. if the data will fit into the frame, copy it in too */
+  /*   4. otherwise, do a memmove(3) and insert a fragmentation header */
+  /* We'll then test the whole thing as a unit. */
+  /* There is no support for using more then a single context, and no
+     support for stateful packing of multicast addresses.
+     
+     These things are only supported in decompression, for compatibility.
+   */
+  dispatch = buf;
+  *dispatch = LOWPAN_DISPATCH_BYTE_VAL;
+  *(dispatch+1) = 0;
+  buf += 2;
+
+  buf = pack_tcfl(buf, &packet->ip6_hdr, dispatch);
+  buf = pack_nh(buf, &packet->ip6_hdr, dispatch);
+  buf = pack_hlim(buf, &packet->ip6_hdr, dispatch);
+
+  /* back the source and destination addresses */
+  ctx_match_length = lowpan_extern_match_context(&packet->ip6_hdr.ip6_src, &temp_dispatch);
+  temp_dispatch = 0;
+  buf = pack_address(buf, &packet->ip6_hdr.ip6_src, ctx_match_length,
+                     &frame->ieee_src, frame->ieee_dstpan, &temp_dispatch);
+  *(dispatch+1) |= temp_dispatch << LOWPAN_IPHC_SAM_SHIFT;
+
+  if (packet->ip6_hdr.ip6_dst.s6_addr[0] != 0xff) {
+    /* not multicast */
+    ctx_match_length = lowpan_extern_match_context(&packet->ip6_hdr.ip6_src, &temp_dispatch);
+    temp_dispatch = 0;
+    buf = pack_address(buf, &packet->ip6_hdr.ip6_dst, ctx_match_length,
+                       &frame->ieee_dst, frame->ieee_dstpan, &temp_dispatch);
+    *(dispatch+1) |= temp_dispatch << LOWPAN_IPHC_DAM_SHIFT;
+  } else {
+    /* multicast */
+    buf = pack_multicast(buf, &packet->ip6_hdr.ip6_dst, &temp_dispatch);
+    *(dispatch + 1) |= (temp_dispatch << LOWPAN_IPHC_DAM_SHIFT) | LOWPAN_IPHC_AM_M;
+  }
+  
+  return buf;
+}
+
+uint8_t *unpack_tcfl(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf) {
+  uint8_t  fl[3] = {0,0,0}; 
+  uint8_t  tc = 0;
+
+  switch (dispatch & LOWPAN_IPHC_TF_MASK) {
+  case LOWPAN_IPHC_TF_ECN_DSCP:
+    tc  = ((*buf) >> 6) & 0xff;
+    tc |= ((*buf) << 2) & 0xff;
+    buf += 1;
+    break;
+  case LOWPAN_IPHC_TF_ECN_FL:
+    tc = ((*buf) >> 6) & 0xff;
+    fl[2] = buf[0] & 0x0f;
+    fl[1] = buf[1];
+    fl[0] = buf[2];
+    buf += 3;
+    break;
+  case LOWPAN_IPHC_TF_ECN_DSCP_FL:
+    tc  = ((*buf) >> 6) & 0xff;
+    tc |= ((*buf) << 2) & 0xff;
+    fl[2] = buf[1] & 0x0f;
+    fl[1] = buf[2];
+    fl[0] = buf[3];
+    buf += 4;
+    break;
+  }
+
+  hdr->ip6_flow = htonl(((uint32_t)0x6 << 28) | 
+                        ((uint32_t)tc << 20) | 
+                        ((uint32_t)fl[2] << 16) | 
+                        ((uint32_t)fl[1] << 8) | fl[0]);
+  return buf;
+}
+
+uint8_t *unpack_nh(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf) {
+  if ((dispatch & LOWPAN_IPHC_NH_MASK) == LOWPAN_IPHC_NH_INLINE) {
+    hdr->ip6_nxt = *buf;
+    return buf + 1;
+  } else {
+    return buf;
+  }
+}
+
+uint8_t *unpack_hlim(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf) {
+  switch (dispatch & LOWPAN_IPHC_HLIM_MASK) {
+  case LOWPAN_IPHC_HLIM_1:
+    hdr->ip6_hlim = 1;
+    break;
+  case LOWPAN_IPHC_HLIM_64:
+    hdr->ip6_hlim = 64;
+    break;
+  case LOWPAN_IPHC_HLIM_255:
+    hdr->ip6_hlim = 255;
+    break;
+  default:
+    hdr->ip6_hlim = *buf;
+    return buf + 1;
+  }
+  return buf;
+}
+
+uint8_t *unpack_address(struct in6_addr *addr, uint8_t dispatch, 
+                        int context, uint8_t *buf,
+                        ieee154_addr_t *frame, ieee154_panid_t pan) {
+  memset(addr, 0, 16);
+  if(!((dispatch & LOWPAN_IPHC_AC_CONTEXT))) {
+    /* stateless compression */
+    switch (dispatch & LOWPAN_IPHC_AM_MASK) {
+    case LOWPAN_IPHC_AM_128:
+      memcpy(addr, buf, 16);
+      return buf + 16;
+    case LOWPAN_IPHC_AM_64:
+      addr->s6_addr16[0] = htons(0xfe80);
+      memcpy(&addr->s6_addr[8], buf, 8);
+      return buf + 8;
+    case LOWPAN_IPHC_AM_16:
+      addr->s6_addr16[0] = htons(0xfe80);
+      memcpy(&addr->s6_addr[14], buf, 2);
+      return buf + 2;
+    default:
+      addr->s6_addr16[0] = htons(0xfe80);
+      if (frame->ieee_mode == IEEE154_ADDR_EXT) {
+        int i;
+        for (i = 0; i < 8; i++)
+          addr->s6_addr[i+8] = frame->i_laddr.data[7-i];
+        addr->s6_addr[8] ^= 0x2;
+      } else {
+        addr->s6_addr16[4] = leton16(pan);
+        addr->s6_addr[11] = 0xff;
+        addr->s6_addr[12] = 0xfe;
+        addr->s6_addr16[7] = leton16(frame->i_saddr);
+      }
+      return buf;
+    }
+  } else {
+    /* context-based compression */
+    if ((dispatch & LOWPAN_IPHC_AM_MASK) == LOWPAN_IPHC_AM_128) {
+      // unspecified address ::
+      return buf;
+    } else {
+      lowpan_extern_read_context(addr, context);
+      switch (dispatch & LOWPAN_IPHC_AM_MASK) {
+      case LOWPAN_IPHC_AM_64:
+        memcpy(&addr->s6_addr[8], buf, 8);
+        return buf + 8;
+      case LOWPAN_IPHC_AM_16:
+        memcpy(&addr->s6_addr[14], buf, 2);
+        return buf + 2;
+      case LOWPAN_IPHC_AM_0:
+        // not clear how to use this:
+        //  "and 'possibly' link-layer addresses"
+        if (frame->ieee_mode == IEEE154_ADDR_EXT) {
+          int i;
+          for (i = 0; i < 8; i++)
+            addr->s6_addr[i+8] = frame->i_laddr.data[7-i];
+          addr->s6_addr[8] ^= 0x2;
+        } else {
+          memset(&addr->s6_addr[8], 0, 8);
+          addr->s6_addr16[7] = leton16(frame->i_saddr);
+        }
+        return buf;
+      }
+    }
+  }
+  return NULL;
+}
+
+uint8_t *unpack_multicast(struct in6_addr *addr, uint8_t dispatch, 
+                          int context, uint8_t *buf) {
+  memset(addr->s6_addr, 0, 16);
+
+  if (!(dispatch & LOWPAN_IPHC_AC_CONTEXT)) {
+    int amount;
+    switch (dispatch & LOWPAN_IPHC_AM_MASK) {
+    case LOWPAN_IPHC_AM_M_128:
+      memcpy(addr->s6_addr, buf, 16);
+      return buf+ 16;
+    case LOWPAN_IPHC_AM_M_48:
+      amount = 5;
+      goto copy;
+    case LOWPAN_IPHC_AM_M_32:
+      amount = 3;
+    copy:
+      addr->s6_addr[0] = 0xff;
+      addr->s6_addr[1] = buf[0];
+      memcpy(&addr->s6_addr[16-amount], buf + 1, amount);
+      return buf + 1 + amount;
+    case LOWPAN_IPHC_AM_M_8:
+      addr->s6_addr16[0] = htons(0xff02);
+      addr->s6_addr[15]  = buf[0];
+      return buf + 1;
+    }
+  } else {
+    // stateful multicast compression
+    // all you need to do is read in the context here...
+  }
+  return NULL;
+}
+
+uint8_t *unpack_udp(uint8_t *dest, uint8_t *nxt_hdr, uint8_t *buf) {
+  struct udp_hdr *udp = (struct udp_hdr *)dest;
+  uint8_t dispatch = *buf++;
+
+  *nxt_hdr = IANA_ICMP;
+
+  // MUST be elided  
+  udp->len = 0;
+  // MAY be elided if sufficient conditions are met
+  udp->chksum = 0;
+
+  /* decompress the ports */
+  switch (dispatch & LOWPAN_NHC_UDP_PORT_MASK) {
+  case LOWPAN_NHC_UDP_PORT_FULL:
+    udp->srcport = htons((buf[0] << 8) | buf[1]);
+    udp->dstport = htons((buf[2] << 8) | buf[3]);
+    buf += 4;
+    break;
+  case LOWPAN_NHC_UDP_PORT_SRC_FULL:
+    udp->srcport = htons((buf[0] << 8) | buf[1]);
+    udp->dstport = htons((0xF0 << 8) | buf[2]);
+    buf += 3;
+    break;
+  case LOWPAN_NHC_UDP_PORT_DST_FULL:
+    udp->srcport = htons((0xF0 << 8) | buf[0]);
+    udp->dstport = htons((buf[1] << 8) | buf[2]);
+    buf += 3;
+    break;
+  case LOWPAN_NHC_UDP_PORT_SHORT:
+    udp->srcport = htons((0xF0B0) | (buf[0] >> 4));
+    udp->dstport = 0xF0B0 | (buf[0] & 0xf);
+    udp->dstport = htons(udp->dstport);
+    buf += 1;
+    break;
+  }
+
+  if (!(dispatch & LOWPAN_NHC_UDP_CKSUM)) {
+    udp->chksum = htons((buf[0] << 8) | buf[1]);
+    buf += 2;
+  }
+
+  return buf;
+}
+
+/**
+ * Unpack a single header that has been encoded using LOWPAN_NHC
+ *  compression 
+ *
+ * NOTE: in order simplify application support, this function does NOT
+ *  convert the length field of ip extension headers to the form
+ *  required by RFC2460: that is, the length value remains in units of
+ *  octets.  It is expected that all software within a 6lowpan network
+ *  will expect this to be the case; edge routers communicating with
+ *  the outside world should take care to convert the length octet
+ *  when such packets are received, including removing any necessary
+ *  padding options.
+ */
+uint8_t *unpack_ipnh(uint8_t *dest, size_t cnt, uint8_t *nxt_hdr, uint8_t *buf) {
+  if (((*buf) & LOWPAN_NHC_IPV6_MASK) == LOWPAN_NHC_IPV6_PATTERN) {
+    struct ip6_ext *ext = (struct ip6_ext *)dest;
+    uint8_t length;
+    // decompress an ipv6 extension header
+
+    // fill in the next header field of the previous header
+    switch ((*buf) & LOWPAN_NHC_EID_MASK) {
+    case LOWPAN_NHC_EID_HOP:
+     *nxt_hdr = IPV6_HOP; break;
+    case LOWPAN_NHC_EID_ROUTING:
+      *nxt_hdr = IPV6_ROUTING; break;
+    case LOWPAN_NHC_EID_FRAG:
+      *nxt_hdr = IPV6_FRAG; break;
+    case LOWPAN_NHC_EID_DEST:
+      *nxt_hdr = IPV6_DEST; break;
+    case LOWPAN_NHC_EID_MOBILE:
+      *nxt_hdr = IPV6_MOBILITY; break;
+    case LOWPAN_NHC_EID_IPV6:
+      /* ja if this happens we need to restart compression at the next byte... */
+      *nxt_hdr = IPV6_IPV6; break;
+    default:
+      return NULL;
+    }
+
+    // if the next header value is inline, copy that in.
+    if (!((*buf) & LOWPAN_NHC_NH)) {
+      buf ++;
+      ext->ip6e_nxt = *buf;
+    }
+    buf += 1;
+    length = *buf++;
+
+    if (cnt < length - 2)
+      return NULL;
+
+    // buf now points at the start of the extension header data
+    memcpy(dest + 2, buf, length - 2);
+    ext->ip6e_len = length;
+
+    return buf + length - 2;
+  } else if (((*buf) & LOWPAN_NHC_UDP_MASK) == LOWPAN_NHC_UDP_PATTERN) {
+    // packed UDP header
+    return unpack_udp(dest, nxt_hdr, buf);
+  }
+  return NULL;
+}
+
+uint8_t *unpack_nhc_chain(struct lowpan_reconstruct *recon,
+                          uint8_t **dest, size_t cnt, 
+                          uint8_t *nxt_hdr, uint8_t *buf) {
+  uint8_t *dispatch;
+  int has_nhc = 1;
+
+  do {
+    recon->r_transport_header = *dest;
+    dispatch = buf;
+    buf = unpack_ipnh(*dest, cnt, nxt_hdr, buf);
+
+    if (!buf) return NULL;
+
+    if (((*dispatch & LOWPAN_NHC_IPV6_MASK) == LOWPAN_NHC_IPV6_PATTERN)) {
+      struct ip6_ext *ext = (struct ip6_ext *)*dest;
+      /* need to update dest */
+      *dest += ext->ip6e_len;
+      cnt  -= ext->ip6e_len;
+
+      if ((*dispatch & LOWPAN_NHC_NH) && ext->ip6e_len > 0) { 
+        nxt_hdr = &ext->ip6e_nxt;
+      } else {
+        has_nhc = 0; 
+      }
+    } else if (((*dispatch) & LOWPAN_NHC_UDP_MASK) == LOWPAN_NHC_UDP_PATTERN) {
+      struct udp_hdr *udp = (struct udp_hdr *)*dest;
+      recon->r_app_len = &udp->len;
+      *nxt_hdr = IANA_UDP;
+      has_nhc = 0;
+      *dest += sizeof(struct udp_hdr);
+    } else { has_nhc = 0; }
+  } while (has_nhc);
+  return buf;
+}
+
+uint8_t *lowpan_unpack_headers(struct lowpan_reconstruct *recon,
+                               struct ieee154_frame_addr *frame,
+                               uint8_t *buf, size_t cnt) {
+  uint8_t *dispatch, *unpack_start = buf, *unpack_end;
+  int contexts[2] = {0, 0};
+  uint8_t *dest = recon->r_buf;
+  size_t dst_cnt = recon->r_size;
+  struct ip6_hdr *hdr = (struct ip6_hdr *)dest;
+
+  dispatch = buf;
+  buf += 2;
+
+  if (((*dispatch) & LOWPAN_DISPATCH_BYTE_MASK) != LOWPAN_DISPATCH_BYTE_VAL) {
+    return NULL;
+  }
+
+  /* extend the dispatch block if the context extension is present */
+  if ((*(dispatch + 1) & LOWPAN_IPHC_CID_MASK) == LOWPAN_IPHC_CID_PRESENT) {
+    contexts[0] = (*buf >> 4) & 0xf;
+    contexts[1] = (*buf) & 0xf;
+    buf += 1;
+  }
+
+  /* pull out the IP header fields */
+  buf = unpack_tcfl(hdr, *dispatch, buf);
+  buf = unpack_nh(hdr, *dispatch, buf);
+  buf = unpack_hlim(hdr, *dispatch, buf);
+  
+  /* source address is always unicast compressed */
+  // printf("unpack source: %p (%x)\n", buf, *buf);
+  buf = unpack_address(&hdr->ip6_src,
+                       ((*(dispatch + 1) >> LOWPAN_IPHC_SAM_SHIFT)), 
+                       contexts[0], 
+                       buf,
+                       &frame->ieee_src,
+                       frame->ieee_dstpan);
+  if (!buf) {
+    return NULL;
+  }
+
+  /* destination address may use multicast address compression */
+  if (*(dispatch + 1) & LOWPAN_IPHC_M) {
+    // printf("unpack multicast: %p\n", buf);
+    buf = unpack_multicast(&hdr->ip6_dst,
+                           ((*(dispatch + 1) >> LOWPAN_IPHC_DAM_SHIFT)), 
+                           contexts[1],
+                           buf);
+    // printf("unpack multicast: %p (%x)\n", buf, *buf);
+  } else {
+    buf = unpack_address(&hdr->ip6_dst,
+                         ((*(dispatch + 1) >> LOWPAN_IPHC_DAM_SHIFT)), 
+                         contexts[1],
+                         buf,
+                         &frame->ieee_dst,
+                         frame->ieee_dstpan);
+  }
+  if (!buf) {
+    return NULL;
+  }
+
+  /* IPv6 header is complete */
+  /*   at this point, (might) need to decompress a chain of headers
+       compressed with LOWPAN_NHC */
+  unpack_end = (uint8_t *)(hdr + 1);
+  if ((*dispatch) & LOWPAN_IPHC_NH_MASK) {
+    buf = unpack_nhc_chain(recon,
+                           &unpack_end, 
+                           dst_cnt - sizeof(struct ip6_hdr),
+                           &hdr->ip6_nxt, 
+                           buf);
+    if (!buf) {
+      return NULL;
+    }
+  }
+
+
+  /* copy any remaining payload into the unpack region */
+  memcpy(unpack_end, buf, cnt - (buf - unpack_start));
+  
+  /* return a pointer to the end of the unpacked data */
+  return unpack_end + (cnt - (buf - unpack_start));
+}
diff --git a/support/sdk/c/blip/lib6lowpan/lib6lowpan.h b/support/sdk/c/blip/lib6lowpan/lib6lowpan.h
new file mode 100644
index 00000000..01e980fc
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/lib6lowpan.h
@@ -0,0 +1,194 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef _LIB6LOWPAN_H_
+#define _LIB6LOWPAN_H_
+
+#define UNUSED
+
+#include <stdint.h>
+
+#include "lib6lowpan-includes.h"
+#include "ip.h"
+
+/* utility macros */
+
+/* POSIX versions of these might not preserve alignments when casting
+   though a void* */
+#ifndef PC
+#define memclr(ptr, len) memset((ptr), 0, (len))
+#define memcpy(dst, src, len) ip_memcpy((uint8_t *)dst, (uint8_t *)src, len)
+// #define memmove(dst, src, len) ip_memcpy(dst, src, len)
+uint8_t *ip_memcpy(uint8_t *dst0, const uint8_t *src0, uint16_t len) ;
+#endif
+
+uint16_t ieee154_hashaddr(ieee154_addr_t *addr);
+
+/*
+ * Fragmentation routines.
+ */
+struct packed_lowmsg {
+  uint8_t headers;
+  uint8_t len;
+  uint8_t *data;
+};
+
+struct lowpan_reconstruct {
+  uint16_t r_tag;            /* datagram label */
+  uint16_t r_source_key;     /*  */
+  uint16_t r_size;           /* the size of the packet we are reconstructing */
+  uint8_t *r_buf;            /* the reconstruction location */
+  uint16_t r_bytes_rcvd;     /* how many bytes from the packet we have
+                              received so far */
+  uint8_t  r_timeout;
+  uint16_t *r_app_len;
+  uint8_t  *r_transport_header;
+  struct ip6_metadata       r_meta;
+};
+
+struct lowpan_ctx {
+  uint16_t tag;    /* the label of the datagram */
+  uint16_t offset; /* how far into the packet we have sent, in bytes */
+};
+
+
+enum {
+  LOWMSG_MESH_HDR  = (1 << 0),
+  LOWMSG_BCAST_HDR = (1 << 1),
+  LOWMSG_FRAG1_HDR = (1 << 2),
+  LOWMSG_FRAGN_HDR = (1 << 3),
+  LOWMSG_NALP      = (1 << 4),
+  LOWMSG_IPNH_HDR  = (1 << 5),
+  LOWMSG_IPV6      = (1 << 6),
+};
+
+uint16_t getHeaderBitmap(struct packed_lowmsg *lowmsg);
+/*
+ * Return the length of the buffer required to pack lowmsg
+ *  into a buffer.
+ */
+
+uint8_t *getLowpanPayload(struct packed_lowmsg *lowmsg);
+
+uint8_t setupHeaders(struct packed_lowmsg *packed, uint16_t headers);
+
+/*
+ * Test if various protocol features are enabled
+ */
+inline uint8_t hasMeshHeader(struct packed_lowmsg *msg);
+inline uint8_t hasBcastHeader(struct packed_lowmsg *msg);
+inline uint8_t hasFrag1Header(struct packed_lowmsg *msg);
+inline uint8_t hasFragNHeader(struct packed_lowmsg *msg);
+
+/*
+ * Mesh header fields
+ *
+ *  return FAIL if the message doesn't have a mesh header
+ */
+uint8_t getMeshHopsLeft(struct packed_lowmsg *msg, uint8_t *hops);
+uint8_t getMeshOriginAddr(struct packed_lowmsg *msg, ieee154_saddr_t *origin);
+uint8_t getMeshFinalAddr(struct packed_lowmsg *msg, ieee154_saddr_t *final);
+
+uint8_t setMeshHopsLeft(struct packed_lowmsg *msg, uint8_t hops);
+uint8_t setMeshOriginAddr(struct packed_lowmsg *msg, ieee154_saddr_t origin);
+uint8_t setMeshFinalAddr(struct packed_lowmsg *msg, ieee154_saddr_t final);
+
+/*
+ * Broadcast header fields
+ */
+uint8_t getBcastSeqno(struct packed_lowmsg *msg, uint8_t *seqno);
+
+uint8_t setBcastSeqno(struct packed_lowmsg *msg, uint8_t seqno);
+
+/*
+ * Fragmentation header fields
+ */
+inline uint8_t getFragDgramSize(struct packed_lowmsg *msg, uint16_t *size);
+inline uint8_t getFragDgramTag(struct packed_lowmsg *msg, uint16_t *tag);
+inline uint8_t getFragDgramOffset(struct packed_lowmsg *msg, uint8_t *size);
+
+inline uint8_t setFragDgramSize(struct packed_lowmsg *msg, uint16_t size);
+inline uint8_t setFragDgramTag(struct packed_lowmsg *msg, uint16_t tag);
+inline uint8_t setFragDgramOffset(struct packed_lowmsg *msg, uint8_t size);
+
+
+/* 
+ * extern functions -- must be declared by app somewhere else
+ */
+int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id);
+int lowpan_extern_read_context(struct in6_addr *addr, int context);
+
+
+int pack_nhc_chain(uint8_t **dest, size_t cnt, struct ip6_packet *packet);
+/*
+ * Pack the header fields of msg into buffer 'buf'.
+ *  it returns the number of bytes written to 'buf', or zero if it encountered a problem.
+ *
+ * it will pack the IP header and all headers in the header chain of
+ * msg into the buffer; the only thing it will not pack is the
+ * payload.
+ *
+ * @packet the message to be packet
+ * @frame link-layer address information about the packet
+ * @buf   a buffer to write the headers into
+ * @cnt   length of the buffer
+ * @return the number of 
+ */
+uint8_t *lowpan_pack_headers(struct ip6_packet *packet,
+                             struct ieee154_frame_addr *frame,
+                             uint8_t *buf, size_t cnt);
+
+
+uint8_t *lowpan_unpack_headers(struct lowpan_reconstruct *recon,
+                               struct ieee154_frame_addr *frame,
+                               uint8_t *buf, size_t cnt);
+
+/*
+ *  this function writes the next fragment which needs to be sent into
+ *  the buffer passed in.  It updates the structures in process to
+ *  reflect how much of the packet has been sent so far.
+ *
+ *  if the packet does not require fragmentation, this function will
+ *  not insert a fragmentation header and will merely compress the
+ *  headers into the packet.
+ *
+ */
+int lowpan_frag_get(uint8_t *frag, size_t len,
+                    struct ip6_packet *packet,
+                    struct ieee154_frame_addr *frame,
+                    struct lowpan_ctx *ctx);
+
+int lowpan_recon_start(struct ieee154_frame_addr *frame_addr,
+                       struct lowpan_reconstruct *recon,
+                       uint8_t *pkt, size_t len);
+int lowpan_recon_add(struct lowpan_reconstruct *recon,
+                     uint8_t *pkt, size_t len);
+
+enum {
+  T_FAILED1 = 0,
+  T_FAILED2 = 1,
+  T_UNUSED =  2,
+  T_ACTIVE =  3,
+  T_ZOMBIE =  4,
+};
+
+/* uint8_t* getLinkLocalPrefix(); */
+#endif
diff --git a/support/sdk/c/blip/lib6lowpan/lib6lowpan_4944.c b/support/sdk/c/blip/lib6lowpan/lib6lowpan_4944.c
new file mode 100644
index 00000000..5a222e84
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/lib6lowpan_4944.c
@@ -0,0 +1,349 @@
+/*
+ * "Copyright (c) 2008,2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#include "lib6lowpan.h"
+#include "6lowpan.h"
+#include "nwbyte.h"
+
+/*
+ *  Library implementation of packing of 6lowpan packets.  
+ *
+ *  This should allow uniform code treatment between pc and mote code;
+ *  the goal is to write ANSI C here...  This means no nx_ types,
+ *  unfortunately.
+ *
+ *  Accessing fields programtically is probably a little less
+ *  efficient, but that can be improved.  By precomputing the packet
+ *  headers present, we can make the overhead not too bad.  The #1
+ *  goal of this library is portability and readability.
+ *
+ *  The broadcast and mesh headers may or may not be useful, and are
+ *  off by default to reduce code size.  Removing them reduces the
+ *  library size by about 600 bytes.
+ */
+
+
+/*
+ * Return the length (in bytes) of the buffer required to pack lowmsg
+ * into a buffer.
+ */
+inline uint8_t *getLowpanPayload(struct packed_lowmsg *lowmsg) {
+  uint8_t len = 0;
+#if LIB6LOWPAN_FULL
+  if (lowmsg->headers & LOWMSG_MESH_HDR)
+    len += LOWMSG_MESH_LEN;
+  if (lowmsg->headers & LOWMSG_BCAST_HDR)
+    len += LOWMSG_BCAST_LEN;
+#endif
+  if (lowmsg->headers & LOWMSG_FRAG1_HDR)
+    len += LOWMSG_FRAG1_LEN;
+  if (lowmsg->headers & LOWMSG_FRAGN_HDR)
+    len += LOWMSG_FRAGN_LEN;
+  return lowmsg->data + len;
+}
+
+/*
+ * Return a bitmap indicating which lowpan headers are
+ *  present in the message pointed to by lowmsg.
+ *
+ */
+inline uint16_t getHeaderBitmap(struct packed_lowmsg *lowmsg) {
+  uint16_t headers = 0;
+  uint8_t *buf = lowmsg->data;
+  int16_t len = lowmsg->len;
+  if (buf == NULL) return headers;
+
+  if (len > 0 && ((*buf) >> 6) == LOWPAN_NALP_PATTERN) {
+    return LOWMSG_NALP;
+  }
+  
+#if LIB6LOWPAN_FULL
+  if (len > 0 && ((*buf) >> 6) == LOWPAN_MESH_PATTERN) {
+    if (!(*buf & LOWPAN_MESH_V_MASK) ||
+        !(*buf & LOWPAN_MESH_F_MASK)) {
+      // we will not parse a packet with 64-bit addressing.
+      return LOWMSG_NALP;
+    }
+    headers |= LOWMSG_MESH_HDR;
+    buf += LOWMSG_MESH_LEN;
+    len -= LOWMSG_MESH_LEN;
+  }
+  if (len > 0 && (*buf) == LOWPAN_BCAST_PATTERN) {
+    headers |= LOWMSG_BCAST_HDR;
+    buf += LOWMSG_BCAST_LEN;
+    len -= LOWMSG_BCAST_LEN;
+  }
+#endif 
+
+  // printf("dispatch: 0x%02x\n", *buf);
+
+  if (len > 0 && ((*buf) >> 3) == LOWPAN_FRAG1_PATTERN) {
+    headers |= LOWMSG_FRAG1_HDR;
+    buf += LOWMSG_FRAG1_LEN;
+    len -= LOWMSG_FRAG1_LEN;
+  }
+  if (len > 0 && ((*buf) >> 3) == LOWPAN_FRAGN_PATTERN) {
+    headers |= LOWMSG_FRAGN_HDR;
+    buf += LOWMSG_FRAGN_LEN;
+    len -= LOWMSG_FRAGN_LEN;
+  }
+  return headers;
+}
+
+/*
+ * Fill in dispatch values
+ */
+inline uint8_t setupHeaders(struct packed_lowmsg *packed, uint16_t headers) {
+  uint8_t *buf = packed->data;
+  uint16_t len = packed->len;
+  if (packed == NULL) return 1;
+  if (buf == NULL) return 1;
+  packed->headers = 0;
+#if LIB6LOWPAN_FULL
+  if (headers & LOWMSG_MESH_HDR)  {
+    if (len < LOWMSG_MESH_LEN) return 1;
+    packed->headers |= LOWMSG_MESH_HDR;
+    *buf = LOWPAN_MESH_PATTERN << 6 | LOWPAN_MESH_V_MASK | LOWPAN_MESH_F_MASK;
+    buf += LOWMSG_MESH_LEN;
+    len -= LOWMSG_MESH_LEN;
+  }
+  if (headers & LOWMSG_BCAST_HDR) {
+    if (len < LOWMSG_BCAST_LEN) return 1;
+    packed->headers |= LOWMSG_BCAST_HDR;
+    *buf = LOWPAN_BCAST_PATTERN;
+    buf += LOWMSG_BCAST_LEN;
+    len -= LOWMSG_BCAST_LEN;
+  }
+#endif
+  if (headers & LOWMSG_FRAG1_HDR) {
+    if (len < LOWMSG_FRAG1_LEN) return 1;
+    packed->headers |= LOWMSG_FRAG1_HDR;
+    *buf = LOWPAN_FRAG1_PATTERN << 3;
+    buf += LOWMSG_FRAG1_LEN;
+    len -= LOWMSG_FRAG1_LEN;
+  }
+  if (headers & LOWMSG_FRAGN_HDR) {
+    if (len < LOWMSG_FRAGN_LEN) return 1;
+    packed->headers |= LOWMSG_FRAGN_HDR;
+    *buf = LOWPAN_FRAGN_PATTERN << 3;
+  }
+  return 0;
+  
+}
+
+/*
+ * Test if various headers are present are enabled
+ */
+#ifdef LIB6LOWPAN_FULL
+inline uint8_t hasMeshHeader(struct packed_lowmsg *msg) {
+  return (msg->headers & LOWMSG_MESH_HDR);
+}
+inline uint8_t hasBcastHeader(struct packed_lowmsg *msg) {
+  return (msg->headers & LOWMSG_BCAST_HDR);
+}
+#endif
+inline uint8_t hasFrag1Header(struct packed_lowmsg *msg) {
+  return (msg->headers & LOWMSG_FRAG1_HDR);
+}
+inline uint8_t hasFragNHeader(struct packed_lowmsg *msg) {
+  return (msg->headers & LOWMSG_FRAGN_HDR);
+}
+#ifdef LIB6LOWPAN_FULL
+/*
+ * Mesh header fields
+ *
+ *  return FAIL if the message doesn't have a mesh header
+ */
+inline uint8_t getMeshHopsLeft(struct packed_lowmsg *msg, uint8_t *hops) {
+  uint8_t *buf = msg->data;
+  if (!hasMeshHeader(msg) || msg->data == NULL || hops == NULL) return 1;
+  *hops = (*buf) & LOWPAN_MESH_HOPS_MASK;
+  return 0;
+}
+inline uint8_t getMeshOriginAddr(struct packed_lowmsg *msg, ieee154_saddr_t *origin) {
+  uint8_t *buf = msg->data;
+  if (!hasMeshHeader(msg) || msg->data == NULL || origin == NULL) return 1;
+  // skip 64-bit addresses
+  if (!(*buf & LOWPAN_MESH_V_MASK)) return 1;
+  buf += 1;
+  *origin = ntohs(*((uint16_t *)buf));
+  return 0;
+}
+inline uint8_t getMeshFinalAddr(struct packed_lowmsg *msg, ieee154_saddr_t *final) {
+  uint8_t *buf = msg->data;
+  if (!hasMeshHeader(msg) || msg->data == NULL || final == NULL) return 1;
+  // skip 64-bit addresses
+  if (!(*buf & LOWPAN_MESH_F_MASK)) return 1;
+  buf += 3;
+  *final = ntohs(*((uint16_t *)buf));
+  return 0;
+}
+
+
+inline uint8_t setMeshHopsLeft(struct packed_lowmsg *msg, uint8_t hops) {
+  uint8_t *buf = msg->data;
+  if (!hasMeshHeader(msg) || msg->data == NULL) return 1;
+  
+  *buf = 0xb0;
+  *buf |= hops & LOWPAN_MESH_HOPS_MASK;
+  return 0;
+}
+inline uint8_t setMeshOriginAddr(struct packed_lowmsg *msg, ieee154_saddr_t origin) {
+  uint8_t *buf = msg->data;
+  if (!hasMeshHeader(msg) || msg->data == NULL) return 1;
+  // skip 64-bit addresses
+  if (!(*buf & LOWPAN_MESH_V_MASK)) return 1;
+  buf += 1;
+  *((uint16_t *)buf) = htons(origin);
+  return 0;
+}
+inline uint8_t setMeshFinalAddr(struct packed_lowmsg *msg, ieee154_saddr_t final) {
+  uint8_t *buf = msg->data;
+  if (!hasMeshHeader(msg) || msg->data == NULL) return 1;
+  // skip 64-bit addresses
+  if (!(*buf & LOWPAN_MESH_F_MASK)) return 1;
+  buf += 3;
+  *((uint16_t *)buf) = htons(final);
+  return 0;
+}
+ 
+/*
+ * Broadcast header fields
+ */
+inline uint8_t getBcastSeqno(struct packed_lowmsg *msg, uint8_t *seqno) {
+  uint8_t *buf = msg->data;
+  if (buf == NULL || seqno == NULL || !hasBcastHeader(msg)) return 1;
+  if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN;
+  if (*buf != LOWPAN_BCAST_PATTERN) return 2;
+  buf += 1;
+  *seqno = *buf;
+  return 0;
+}
+
+inline uint8_t setBcastSeqno(struct packed_lowmsg *msg, uint8_t seqno) {
+  uint8_t *buf = msg->data;
+  if (buf == NULL || !hasBcastHeader(msg)) return 1;
+  if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN;
+  if (*buf != LOWPAN_BCAST_PATTERN) return 2;
+  buf += 1;
+  *buf = seqno;
+  return 0;
+}
+#endif
+
+/*
+ * Fragmentation header fields
+ */
+inline uint8_t getFragDgramSize(struct packed_lowmsg *msg, uint16_t *size) {
+  uint8_t *buf = msg->data;
+  uint8_t s[2];
+  if (buf == NULL || size == NULL) return 1;
+#ifdef LIB6LOWPAN_FULL
+  if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN;
+  if (hasBcastHeader(msg)) buf += LOWMSG_BCAST_LEN;
+#endif
+  if ((*buf >> 3) != LOWPAN_FRAG1_PATTERN &&
+      (*buf >> 3) != LOWPAN_FRAGN_PATTERN) return 1;
+
+  s[0] = *buf & 0x7;
+  buf++;
+  s[1] = *buf;
+  *size = ((uint16_t)s[0]) << 8 | s[1];
+  return 0;
+}
+inline uint8_t getFragDgramTag(struct packed_lowmsg *msg, uint16_t *tag) {
+  uint8_t *buf = msg->data;
+  if (buf == NULL || tag == NULL) return 1;
+#ifdef LIB6LOWPAN_FULL
+  if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN;
+  if (hasBcastHeader(msg)) buf += LOWMSG_BCAST_LEN;
+#endif
+  if ((*buf >> 3) != LOWPAN_FRAG1_PATTERN &&
+      (*buf >> 3) != LOWPAN_FRAGN_PATTERN) return 1;
+  buf += 2;
+  //*tag = (*buf << 8) | *(buf + 1);  ;
+  *tag = ntohs( *(uint16_t *)buf);
+  return 0;
+}
+inline uint8_t getFragDgramOffset(struct packed_lowmsg *msg, uint8_t *size) {
+  uint8_t *buf = msg->data;
+  if (buf == NULL || size == NULL) return 1;
+#ifdef LIB6LOWPAN_FULL
+  if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN;
+  if (hasBcastHeader(msg)) buf += LOWMSG_BCAST_LEN;
+#endif
+  if ((*buf >> 3) != LOWPAN_FRAGN_PATTERN) return 1;
+  buf += 4;
+  *size = *buf;
+  return 0;
+
+}
+
+
+inline uint8_t setFragDgramSize(struct packed_lowmsg *msg, uint16_t size) {
+  uint8_t *buf = msg->data;
+  if (buf == NULL) return 1;
+#ifdef LIB6LOWPAN_FULL
+  if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN;
+  if (hasBcastHeader(msg)) buf += LOWMSG_BCAST_LEN;
+#endif
+  if ((*buf >> 3) != LOWPAN_FRAG1_PATTERN &&
+      (*buf >> 3) != LOWPAN_FRAGN_PATTERN) return 1;
+  size = size & 0x7ff;
+
+  // zero out the dgram size first.
+  *buf &= 0xf8;
+  *buf  |= (size >> 8);
+  buf[1] = size & 0xff;
+
+  // *((uint16_t *)buf) |= htons(size & 0x7ff);
+  return 0;
+}
+
+inline uint8_t setFragDgramTag(struct packed_lowmsg *msg, uint16_t tag) {
+  uint8_t *buf = msg->data;
+  if (buf == NULL) return 1;
+#ifdef LIB6LOWPAN_FULL
+  if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN;
+  if (hasBcastHeader(msg)) buf += LOWMSG_BCAST_LEN;
+#endif
+  
+  if ((*buf >> 3) != LOWPAN_FRAG1_PATTERN &&
+      (*buf >> 3) != LOWPAN_FRAGN_PATTERN) return 1;
+  buf += 2;
+
+  buf[0] = tag >> 8;
+  buf[1] = tag & 0xff;
+  return 0;
+}
+inline uint8_t setFragDgramOffset(struct packed_lowmsg *msg, uint8_t size) {
+  uint8_t *buf = msg->data;
+  if (buf == NULL) return 1;
+#ifdef LIB6LOWPAN_FULL
+  if (hasMeshHeader(msg)) buf += LOWMSG_MESH_LEN;
+  if (hasBcastHeader(msg)) buf += LOWMSG_BCAST_LEN;
+#endif
+
+  if ((*buf >> 3) != LOWPAN_FRAGN_PATTERN) return 1;
+  buf += 4;
+  *buf = size;
+  return 0;
+}
diff --git a/support/sdk/c/blip/lib6lowpan/lib6lowpan_frag.c b/support/sdk/c/blip/lib6lowpan/lib6lowpan_frag.c
new file mode 100644
index 00000000..a54443d7
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/lib6lowpan_frag.c
@@ -0,0 +1,196 @@
+
+#include <stdint.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "6lowpan.h"
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+#include "ip_malloc.h"
+#include "iovec.h"
+#include "ieee154_header.h"
+
+int lowpan_recon_complete(struct lowpan_reconstruct *recon,
+                          struct ip6_packet_headers *hdrs);
+
+int lowpan_recon_start(struct ieee154_frame_addr *frame_addr,
+                       struct lowpan_reconstruct *recon,
+                       uint8_t *pkt, size_t len) {
+  uint8_t *unpack_point, *unpack_end;
+  struct packed_lowmsg msg;
+
+  msg.data = pkt;
+  msg.len  = len;
+  msg.headers = getHeaderBitmap(&msg);
+  if (msg.headers == LOWMSG_NALP) return -1;
+
+  /* remove the 6lowpan headers from the payload */
+  unpack_point = getLowpanPayload(&msg);
+  len -= (unpack_point - pkt);
+
+  /* set up the reconstruction, or just fill in the packet length */
+  if (hasFrag1Header(&msg)) {
+    getFragDgramTag(&msg, &recon->r_tag);
+    getFragDgramSize(&msg, &recon->r_size);
+  } else {
+    recon->r_size = LIB6LOWPAN_MAX_LEN + LOWPAN_LINK_MTU;
+  }
+  recon->r_buf = malloc(recon->r_size);
+  if (!recon->r_buf) return -2;
+  memset(recon->r_buf, 0, recon->r_size);
+  recon->r_app_len = NULL;
+
+  if (*unpack_point == LOWPAN_IPV6_PATTERN) {
+    /* uncompressed header... no need to un-hc */
+    unpack_point++; len --;
+    memcpy(recon->r_buf, unpack_point, len);
+    unpack_end = recon->r_buf + len;
+  } else {
+    /* unpack the first fragment */
+    unpack_end = lowpan_unpack_headers(recon, 
+                                       frame_addr,
+                                       unpack_point, len);
+  }
+
+  if (!unpack_end) {
+    free(recon->r_buf);
+    return -3;
+  }
+
+  if (!hasFrag1Header(&msg)) {
+    recon->r_size = (unpack_end - recon->r_buf);
+  }
+  recon->r_bytes_rcvd = unpack_end - recon->r_buf;
+  ((struct ip6_hdr *)(recon->r_buf))->ip6_plen = 
+    htons(recon->r_size - sizeof(struct ip6_hdr));
+  /* fill in any elided app data length fields */
+  if (recon->r_app_len) {
+    *recon->r_app_len = 
+      htons(recon->r_size - (recon->r_transport_header - recon->r_buf));
+  }
+  
+  /* done, updated all the fields */
+  /* reconstruction is complete if r_bytes_rcvd == r_size */
+  return 0;
+}
+
+int lowpan_recon_add(struct lowpan_reconstruct *recon,
+                     uint8_t *pkt, size_t len) {
+  struct packed_lowmsg msg;
+  uint8_t *buf;
+
+  msg.data = pkt;
+  msg.len  = len;
+  msg.headers = getHeaderBitmap(&msg);
+  if (msg.headers == LOWMSG_NALP) return -1;
+
+  if (!hasFragNHeader(&msg)) {
+    return -2;
+  }
+
+  buf = getLowpanPayload(&msg);
+  len -= (buf - pkt);
+
+  if (recon->r_size < recon->r_bytes_rcvd + len) return -3;
+
+  /* just need to copy the new payload in and return */
+  memcpy(recon->r_buf + recon->r_bytes_rcvd, buf, len);
+  recon->r_bytes_rcvd += len;
+
+  return 0;
+}
+
+int lowpan_frag_get(uint8_t *frag, size_t len,
+                    struct ip6_packet *packet,
+                    struct ieee154_frame_addr *frame,
+                    struct lowpan_ctx *ctx) {
+  uint8_t *buf, *lowpan_buf, *ieee_buf = frag;
+  uint16_t extra_payload;
+
+  /* pack 802.15.4 */
+  buf = lowpan_buf = pack_ieee154_header(frag, len, frame);
+  if (ctx->offset == 0) {
+    int offset = 0;
+
+#if LIB6LOWPAN_HC_VERSION == -1
+    /* just copy the ipv6 header around... */
+    *buf++ = LOWPAN_IPV6_PATTERN;
+    memcpy(buf, &packet->ip6_hdr, sizeof(struct ip6_hdr));
+    buf += sizeof(struct ip6_hdr);
+#elif !defined(LIB6LOWPAN_HC_VERSION) || LIB6LOWPAN_HC_VERSION == 6
+    /* pack the IPv6 header */
+    buf = lowpan_pack_headers(packet, frame, buf, len - (buf - frag));
+    if (!buf) return -1;
+
+    /* pack the next headers */
+    offset = pack_nhc_chain(&buf, len - (buf - ieee_buf), packet);
+    if (offset < 0) return -2;
+#endif
+
+    /* copy the rest of the payload into this fragment */
+    extra_payload = ntohs(packet->ip6_hdr.ip6_plen) - offset;
+
+    /* may need to fragment -- insert a FRAG1 header if so */
+    if (extra_payload > len - (buf - ieee_buf)) {
+      struct packed_lowmsg lowmsg;
+      memmove(lowpan_buf + LOWMSG_FRAG1_LEN, 
+                lowpan_buf,
+                buf - lowpan_buf);
+
+      lowmsg.data = lowpan_buf;
+      lowmsg.len  = LOWMSG_FRAG1_LEN;
+      lowmsg.headers = 0;
+      setupHeaders(&lowmsg, LOWMSG_FRAG1_HDR);
+      setFragDgramSize(&lowmsg, ntohs(packet->ip6_hdr.ip6_plen) + sizeof(struct ip6_hdr));
+      setFragDgramTag(&lowmsg, ctx->tag);
+
+      lowpan_buf += LOWMSG_FRAG1_LEN;
+      buf += LOWMSG_FRAG1_LEN;
+
+      extra_payload = len - (buf - ieee_buf);
+      extra_payload -= (extra_payload % 8);
+
+    }
+    
+    if (iov_read(packet->ip6_data, offset, extra_payload, buf) != extra_payload) {
+      return -3;
+    }
+
+    ctx->offset = offset + extra_payload + sizeof(struct ip6_hdr);
+    return (buf - frag) + extra_payload;
+  } else {
+    struct packed_lowmsg lowmsg;
+    buf = lowpan_buf = pack_ieee154_header(frag, len, frame);
+
+    /* setup the FRAGN header */
+    lowmsg.data = lowpan_buf;
+    lowmsg.len = LOWMSG_FRAGN_LEN;
+    lowmsg.headers = 0;
+    setupHeaders(&lowmsg, LOWMSG_FRAGN_HDR);
+    if (setFragDgramSize(&lowmsg, ntohs(packet->ip6_hdr.ip6_plen) + sizeof(struct ip6_hdr)))
+      return -5;
+    if (setFragDgramTag(&lowmsg, ctx->tag))
+      return -6;
+    if (setFragDgramOffset(&lowmsg, ctx->offset / 8))
+      return -7;
+    buf += LOWMSG_FRAGN_LEN;
+
+    extra_payload = ntohs(packet->ip6_hdr.ip6_plen) + sizeof(struct ip6_hdr) - ctx->offset;
+    if (extra_payload > len - (buf - ieee_buf)) {
+      extra_payload = len - (buf - ieee_buf);
+      extra_payload -= (extra_payload % 8);
+    }
+
+    if (iov_read(packet->ip6_data, ctx->offset - sizeof(struct ip6_hdr), extra_payload, buf) != extra_payload) {
+      return -4;
+    }
+
+    ctx->offset += extra_payload;
+
+    if (extra_payload == 0) return 0;
+    else return (lowpan_buf - ieee_buf) + LOWMSG_FRAGN_LEN + extra_payload;
+  }
+}
+
diff --git a/support/sdk/c/blip/lib6lowpan/nwbyte.h b/support/sdk/c/blip/lib6lowpan/nwbyte.h
new file mode 100644
index 00000000..8ebe9c6c
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/nwbyte.h
@@ -0,0 +1,53 @@
+#ifndef _NWBYTE_H
+#define _NWBYTE_H_
+
+#if !defined(PC)
+// if we're not on a pc, assume little endian for now
+#define __LITTLE_ENDIAN 1234
+#define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+
+/* define normal network byte-orders routines  */
+#if defined(PC) 
+// use library versions if on linux
+#include <stdlib.h>
+#else
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+// otherwise have to provide our own 
+
+#ifndef WITH_OSHAN
+#define ntohs(X)   (((((uint16_t)(X)) >> 8) | ((uint16_t)(X) << 8)) & 0xffff)
+#define htons(X)   (((((uint16_t)(X)) << 8) | ((uint16_t)(X) >> 8)) & 0xffff)
+
+/* this is much more efficient since gcc can insert swpb now.  */
+/* moved to utility.c */
+uint32_t ntohl(uint32_t i);
+#define htonl(X) ntohl(X)
+#else 
+#include <arpa/inet.h>
+#endif
+
+
+#else 
+#error "No byte-order conversions defined!"
+#endif
+#endif
+
+/* little-endian conversion routines */
+
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define leton16(X)  htons(X)
+#ifndef htole16
+#define htole16(X)  (X)
+#endif
+#define letohs(X) (X)
+
+#else
+// assume big-endian byte-order
+#define leton16(X) (((((uint16_t)(X)) << 8) | ((uint16_t)(X) >> 8)) & 0xffff)
+#define htole16(X) (((((uint16_t)(X)) << 8) | ((uint16_t)(X) >> 8)) & 0xffff)
+
+
+#endif
+
+#endif
diff --git a/support/sdk/c/blip/lib6lowpan/tests/Makefile b/support/sdk/c/blip/lib6lowpan/tests/Makefile
new file mode 100644
index 00000000..48941388
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/Makefile
@@ -0,0 +1,64 @@
+
+CFLAGS=-U__BLOCKS__ -DPC -DUNIT_TESTING -g -I../../../../../../tos/types -I.. -I../../ -DHAVE_CONFIG_H
+LIBSOURCE=../lib6lowpan.c ../lib6lowpan_4944.c ../lib6lowpan_frag.c \
+	../iovec.c ../utility.c ../in_cksum.c
+LIB=../lib6lowpan.a
+
+TARGETS=test_bit_range_zero_p test_pack_tcfl test_pack_multicast test_pack_address \
+	test_lowpan_pack_headers test_unpack_tcfl test_unpack_address \
+	test_unpack_multicast test_unpack_ipnh test_unpack_udp test_pack_nhc_chain \
+	test_lowpan_frag_get
+
+all: $(TARGETS)
+
+clean:
+	rm $(TARGETS)
+
+test_bit_range_zero_p: test_bit_range_zero_p.c $(LIB)
+	$(CC) -o $@ $(CFLAGS) $< $(LIB) 
+
+test_pack_tcfl: test_pack_tcfl.c $(LIB)
+	$(CC) -o $@ $(CFLAGS) $< $(LIB) 
+
+test_pack_multicast: test_pack_multicast.c $(LIB) 
+
+test_pack_address: test_pack_address.c $(LIB)
+	$(CC) -o $@ $(CFLAGS) $< $(LIB) 
+
+test_lowpan_pack_headers: test_lowpan_pack_headers.c $(LIB)
+	$(CC) -o $@ $(CFLAGS) $< $(LIB) -DHAVE_LOWPAN_EXTERN_MATCH_CONTEXT
+
+test_unpack_tcfl: test_unpack_tcfl.c $(LIB)
+	$(CC) -o $@ $(CFLAGS) $< $(LIB) 
+
+test_unpack_address: test_unpack_address.c $(LIB)
+	$(CC) -o $@ $(CFLAGS) $< $(LIB) -DHAVE_LOWPAN_EXTERN_MATCH_CONTEXT
+
+test_unpack_multicast: test_unpack_multicast.c $(LIB)
+	$(CC) -o $@ $(CFLAGS) $< $(LIB) -DHAVE_LOWPAN_EXTERN_MATCH_CONTEXT
+
+test_unpack_ipnh: test_unpack_ipnh.c $(LIB)
+	$(CC) -o $@ $(CFLAGS) $< $(LIB) 
+
+test_unpack_udp: test_unpack_udp.c $(LIB)
+	$(CC) -o $@ $(CFLAGS) $< $(LIB) 
+
+test_pack_nhc_chain: test_pack_nhc_chain.c $(LIB)
+	$(CC) -o $@ $(CFLAGS) $< $(LIB) 
+
+test_lowpan_frag_get: test_lowpan_frag_get.o $(LIB)
+	$(CC)  -o $@ $(CFLAGS) $< $(LIB) -DHAVE_LOWPAN_EXTERN_MATCH_CONTEXT
+
+test_in_cksum: test_in_cksum.o $(LIB)
+	$(CC)  -o $@ $(CFLAGS) $< $(LIB) 
+
+test_lowpan_recon_start: test_lowpan_recon_start.o $(LIB)
+	$(CC)  -o $@ $(CFLAGS) $< $(LIB) 
+
+test_lowpan_unpack_headers: test_lowpan_unpack_headers.o $(LIB)
+	$(CC)  -o $@ $(CFLAGS) $< $(LIB) 
+
+.c.o:
+	$(CC) -c -o $@ $< $(CFLAGS)
+
+
diff --git a/support/sdk/c/blip/lib6lowpan/tests/run.sh b/support/sdk/c/blip/lib6lowpan/tests/run.sh
new file mode 100755
index 00000000..36b3aba1
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/run.sh
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+TESTS="test_bit_range_zero_p test_pack_tcfl test_pack_multicast test_pack_address \
+       test_lowpan_pack_headers test_unpack_tcfl test_unpack_address \
+       test_unpack_multicast test_unpack_ipnh test_unpack_udp test_pack_nhc_chain \
+"
+ #      test_lowpan_frag_get"
+
+for T in $(echo $TESTS); do
+    ./$T | grep -a tests
+done
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_bit_range_zero_p.c b/support/sdk/c/blip/lib6lowpan/tests/test_bit_range_zero_p.c
new file mode 100644
index 00000000..10090da7
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_bit_range_zero_p.c
@@ -0,0 +1,56 @@
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+
+int bit_range_zero_p(uint8_t *buf, int start, int end);
+
+struct {
+  int start;
+  int end;
+  int len;
+  uint8_t data[32];
+  int result;
+} test_cases[] = {
+  {0, 1, 1, {0x0}, 0},
+  {0, 8, 1, {0x0}, 0},
+  {0, 8, 1, {0x1}, -1},  
+  {0, 1, 1, {0x1}, 0},  
+  {0, 1, 1, {0xff}, -1},  
+  {7, 8, 2, {0x1, 0x0}, -1},  
+  {7, 15, 2, {0x1, 0x0}, -1},  
+  {7, 15, 2, {0x0, 0x1}, 0},
+  {7, 15, 2, {0x1, 0x1}, -1},
+  {8, 24, 4, {0x1, 0x0, 0, 0x8}, 0},
+  {8, 25, 4, {0x1, 0x0, 1, 0x8}, -1},
+  {7, 25, 4, {0x1, 0x0, 0, 0x8}, -1},
+  {8, 24, 4, {0xff, 0, 0, 0xff}, 0},
+  {16, 120, 16, 
+   {0xff, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01}, 0}
+};
+
+int run_tests() {
+  int i;
+  int success = 0, total = 0;
+  for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) {
+    int rc;
+
+    rc = bit_range_zero_p(test_cases[i].data, test_cases[i].start, test_cases[i].end);
+    printf("result: %i(%i)\n", rc, test_cases[i].result);
+    if (rc == test_cases[i].result)
+      success++;
+    total++;
+
+  }
+  printf("%s: %i/%i tests succeeded\n", __FILE__, success, total);
+  if (success == total) return 0;
+  return 1;
+}
+
+int main() {
+  return run_tests();
+}
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_lowpan_frag_get.c b/support/sdk/c/blip/lib6lowpan/tests/test_lowpan_frag_get.c
new file mode 100644
index 00000000..7fd2298a
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_lowpan_frag_get.c
@@ -0,0 +1,178 @@
+
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+#include "6lowpan.h"
+#include "iovec.h"
+
+
+
+uint8_t ctx[8] = {0x20, 0x02,1,2,3,4,5,6};
+
+int lowpan_extern_read_context(struct in6_addr *addr, int context) {
+  memcpy(addr, ctx, 8);
+  return 64;
+}
+
+int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) {
+  if (memcmp(addr, ctx, 8) == 0) {
+    printf("CONTEXT MATCH!\n");
+    return 64;
+  } else {
+    return 0;
+  }
+}
+
+
+struct test_case {
+  uint8_t  tc;
+  uint32_t fl;
+  uint8_t  nxt;
+  uint8_t  hlim;
+  char *ip6_src;
+  char *ip6_dst;
+
+  char *l2src, *l2dst;
+  ieee154_panid_t   panid;
+
+  /*  the result of executing the test case */
+  int      result_len;
+  uint8_t  result[64];
+};
+
+struct test_case cases[] = {
+  {0, 0, IANA_UDP, 66, "fe80::1", "ff02::1", "1", "aa:00:11:22:33:44:55:66:", 0xabcd, 
+   0, {}},
+
+  {1, 0, IANA_UDP, 100, "fe80::1", "fe80::2", "1", "65535", 10, 
+   0, {}},
+
+  {0, 0, IANA_UDP, 100, "fe80::aa00:1122:3344:5566", "ff02::ab", "aa:00:11:22:33:44:55:66:", "0xab", 10, 0, {}},
+
+  {0, 0, IANA_UDP, 100, "2002:102:304:506:aa00:1122:3344:5566", "ff02::12:4567:abcd", "aa:00:11:22:33:44:55:66:", "0xab", 10, 0, {}},
+
+};
+
+uint8_t data[12] = {1,2,3,4,5,6,7,8,9,10,11,12};
+
+int check_test(struct ip6_packet *pkt, struct lowpan_reconstruct *recon) {
+  char buf[2048];
+  memset(buf, 0, 2048);
+  memcpy(buf, &pkt->ip6_hdr, sizeof(struct ip6_hdr));
+  iov_read(pkt->ip6_data, 0, iov_len(pkt->ip6_data), &buf[sizeof(struct ip6_hdr)]);
+  
+  // printf("CMP: %i", memcmp(buf, recon->r_buf, recon->r_bytes_rcvd));
+  print_buffer(buf, 50);
+  print_buffer(recon->r_buf, 50);
+  printf("CMP: %i\n", memcmp(buf, recon->r_buf, 50));
+}
+
+void setup_test(struct test_case *cse, struct ip6_hdr *hdr, struct ieee154_frame_addr *frame, struct ip_iovec *v) {
+  uint32_t val;
+
+  printf("packet length: %i, %p\n", iov_len(v), v);
+
+  val = htonl(0x6 << 28 | ((cse->tc & 0xff) << 20) | (cse->fl & 0x000fffff));
+  hdr->ip6_flow = val;
+  hdr->ip6_nxt  = cse->nxt;
+  hdr->ip6_plen = htons(iov_len(v));
+  hdr->ip6_hlim = cse->hlim;
+  inet_pton6(cse->ip6_src, &hdr->ip6_src);
+  inet_pton6(cse->ip6_dst, &hdr->ip6_dst);
+
+  memset(frame, 0, sizeof(frame));
+  ieee154_parse(cse->l2src, &frame->ieee_src);
+  ieee154_parse(cse->l2dst, &frame->ieee_dst);
+  frame->ieee_dstpan = htole16(cse->panid);
+}
+
+int run_tests() {
+  int i;
+  int success = 0, total = 0;
+  for (i = 0; i < (sizeof(cases) / sizeof(cases[0])); i++) {
+    uint8_t buf[128], *rp, unpack[512], more_data[1500];
+    struct ip6_packet packet;
+    struct ieee154_frame_addr fr, result_fr;
+    struct lowpan_reconstruct recon;
+    struct lowpan_ctx ctx;
+    struct ip_iovec v[2];
+    int rv;
+    memset(buf, 0, sizeof(buf));
+    total++;
+    printf("\n\n----- Test case %i ----\n", i+1);
+
+    packet.ip6_data = &v[0];
+    v[0].iov_next = &v[1];
+    v[0].iov_base= data;
+    v[0].iov_len = 12;
+    for (rv = 0; rv < sizeof(more_data); rv++)
+      more_data[rv] = rv;
+
+    v[1].iov_next = NULL;
+    v[1].iov_base= more_data;
+    v[1].iov_len = 1500;
+    // print_buffer(more_data, 1500);
+
+    setup_test(&cases[i], &packet.ip6_hdr, &fr, &v[0]);
+
+    printf("IEEE 802.15.4 frame: ");
+    print_buffer(&fr, sizeof(struct ieee154_frame_addr));
+    printf("\n");
+    printf("IPv6 Header:\n");
+    print_buffer(&packet.ip6_hdr, sizeof(struct ip6_hdr));
+    printf("\n");
+    printf("Data:\n");
+    print_buffer(data, 12);
+    printf("\n");
+    printf("plen: %i\n", ntohs(packet.ip6_hdr.ip6_plen));
+
+    ctx.offset = 0;
+    ctx.tag = 25;
+    recon.r_buf = NULL;
+
+    /* how you fragment a packet */
+    while ((rv = lowpan_frag_get(buf, sizeof(buf),
+                                 &packet,
+                                 &fr,
+                                 &ctx)) > 0) {
+      // print_buffer(buf, rv);
+
+      /* how you unfragment a packet */
+      rp = unpack_ieee154_hdr(buf, &result_fr);
+      printf("unpacked ieee154_header: %p-%p\n", buf, rp);
+      // print_buffer(&result_fr, sizeof(result_fr));
+
+      if (recon.r_buf == NULL) {
+        lowpan_recon_start(&result_fr, &recon, rp, rv - (rp - buf));
+      } else {
+        lowpan_recon_add(&recon, rp, rv - (rp - buf));
+      }
+      memset(buf, 0, sizeof(buf));
+    }
+    printf("recon progress: %i %i\n", recon.r_bytes_rcvd, recon.r_size);
+
+    print_buffer(recon.r_buf, recon.r_bytes_rcvd);
+    if (recon.r_bytes_rcvd == recon.r_size) {
+      if (check_test(&packet, &recon) == 0) {
+        success++;
+      }
+    }
+
+    free(recon.r_buf);
+    recon.r_buf = NULL;
+
+  }
+
+  printf("%s: %i/%i tests succeeded\n", __FILE__, success, total);
+  if (success == total) return 0;
+  return 1;
+}
+
+int main() {
+  return run_tests();
+}
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_lowpan_pack_headers.c b/support/sdk/c/blip/lib6lowpan/tests/test_lowpan_pack_headers.c
new file mode 100644
index 00000000..e6c07d80
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_lowpan_pack_headers.c
@@ -0,0 +1,115 @@
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+#include "6lowpan.h"
+
+
+
+uint8_t ctx[8] = {0x20, 0x02,1,2,3,4,5,6};
+int lowpan_extern_read_context(struct in6_addr *addr, int context) {
+  memcpy(addr, ctx, 8);
+  return 64;
+}
+
+int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) {
+  if (memcmp(addr, ctx, 8) == 0) {
+    printf("CONTEXT MATCH!\n");
+    return 64;
+  } else {
+    return 0;
+  }
+}
+
+
+struct test_case {
+  uint8_t  tc;
+  uint32_t fl;
+  uint8_t  nxt;
+  uint8_t  hlim;
+  char *ip6_src;
+  char *ip6_dst;
+
+  char *l2src, *l2dst;
+  ieee154_panid_t   panid;
+
+  /*  the result of executing the test case */
+  int      result_len;
+  uint8_t  result[64];
+};
+
+struct test_case cases[] = {
+  {0, 0, 12, 100, "fe80::1", "ff02::1", "1", "65535", 10, 
+   0, {}},
+
+  {1, 0, 12, 100, "fe80::1", "fe80::2", "1", "65535", 10, 
+   0, {}},
+
+  {0, 0, 12, 100, "fe80::aa00:1122:3344:5566", "ff02::ab", "aa:00:11:22:33:44:55:66:", "0xab", 10, 0, {}},
+
+  {0, 0, 12, 100, "2002:102:304:506:aa00:1122:3344:5566", "ff02::12:4567:abcd", "aa:00:11:22:33:44:55:66:", "0xab", 10, 0, {}},
+
+};
+
+void setup_test(struct test_case *cse, struct ip6_hdr *hdr, struct ieee154_frame_addr *frame) {
+  uint32_t val;
+  val = htonl(0x6 << 28 | ((cse->tc & 0xff) << 20) | (cse->fl & 0x000fffff));
+  hdr->ip6_flow = val;
+  hdr->ip6_nxt  = cse->nxt;
+  hdr->ip6_plen = 0;
+  hdr->ip6_hlim = cse->hlim;
+  inet_pton6(cse->ip6_src, &hdr->ip6_src);
+  inet_pton6(cse->ip6_dst, &hdr->ip6_dst);
+
+  memset(frame, 0, sizeof(frame));
+  ieee154_parse(cse->l2src, &frame->ieee_src);
+  ieee154_parse(cse->l2dst, &frame->ieee_dst);
+  frame->ieee_dstpan = htole16(cse->panid);
+}
+
+int run_tests() {
+  int i;
+  int success = 0, total = 0;
+  for (i = 0; i < (sizeof(cases) / sizeof(cases[0])); i++) {
+    uint8_t buf[512], *rp, unpack[512];
+    struct ip6_packet packet;
+    struct ieee154_frame_addr fr;
+    memset(buf, 0, 512);
+    total++;
+    printf("\n\n----- Test case %i ----\n", i+1);
+
+    setup_test(&cases[i], &packet.ip6_hdr, &fr);
+    printf("IEEE 802.15.4 frame: ");
+    print_buffer(&fr, sizeof(struct ieee154_frame_addr));
+    printf("\n");
+    printf("IPv6 Header:\n");
+    print_buffer(&packet.ip6_hdr, sizeof(struct ip6_hdr));
+    printf("\n");
+
+    rp = lowpan_pack_headers(&packet, &fr, buf, 512);
+    printf("Packed result:\n");
+    print_buffer(buf, rp - buf);
+
+
+    rp = lowpan_unpack_headers(unpack, sizeof(unpack), &fr, buf, rp - buf);
+
+    printf("Unpacked result:\n");
+    print_buffer(unpack, 40);
+
+    if (memcmp(unpack, &packet.ip6_hdr, 40) == 0)
+      success++;
+    else 
+      printf("FAIL\n");
+  }
+  printf("%s: %i/%i tests succeeded\n", __FILE__, success, total);
+  if (success == total) return 0;
+  return 1;
+}
+
+int main() {
+  return run_tests();
+}
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_lowpan_unpack_headers.c b/support/sdk/c/blip/lib6lowpan/tests/test_lowpan_unpack_headers.c
new file mode 100644
index 00000000..ac3690ff
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_lowpan_unpack_headers.c
@@ -0,0 +1,92 @@
+
+
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+#include "6lowpan.h"
+#include "iovec.h"
+
+int     packet_len;
+uint8_t packet[1280];
+
+struct  {
+  char *file;
+} cases[] = {
+  {"packet4.test"},
+};
+
+int parse_packet(char *file) {
+  char buf[127], *pos = buf;
+  uint8_t *packet_cur = packet;
+  FILE *fp = fopen(file, "r");
+  if (!fp) return -1;
+
+  while (!feof(fp)) {
+    while (!feof(fp) && isspace(*pos = fgetc(fp)));
+    pos++;
+    while (!feof(fp) && !isspace((*pos++ = fgetc(fp))));
+    *(pos-1) = '\0';
+
+    if (pos > buf + 1)
+      *packet_cur++ = (uint8_t) strtol(buf, NULL, 16);
+
+    pos = buf;
+  }
+  packet_len = (packet_cur - packet);
+  return 0;
+}
+
+int run_tests() {
+  int i;
+  int success = 0, total = 0;
+  for (i = 0; i < (sizeof(cases) / sizeof(cases[0])); i++) {
+    struct packed_lowmsg lowmsg;
+    struct lowpan_reconstruct recon;
+    struct ieee154_frame_addr frame_address;
+    uint8_t *buf = packet, *frame = packet;
+    int length;
+    int rv;
+
+    parse_packet(cases[i].file);
+    length = packet_len;
+    print_buffer(packet, packet_len);
+
+    buf     = unpack_ieee154_hdr(buf, &frame_address);
+    length -= buf - frame;
+
+    lowmsg.data = buf;
+    lowmsg.len  = length;
+    lowmsg.headers = getHeaderBitmap(&lowmsg);
+    if (lowmsg.headers == LOWMSG_NALP) {
+      warn("lowmsg NALP!\n");
+      continue;
+    }
+
+    buf = getLowpanPayload(&lowmsg);
+    if ((rv = lowpan_recon_start(&frame_address, &recon, buf, length)) < 0) {
+      warn("reconstruction failed!\n");
+      continue;
+    }
+
+    if (recon.r_size == recon.r_bytes_rcvd) {
+      printf("recon successful\n");
+      print_buffer(recon.r_buf, recon.r_size);
+    } else {
+      free(recon.r_buf);
+    }
+    
+  }
+
+  printf("%s: %i/%i tests succeeded\n", __FILE__, success, total);
+  if (success == total) return 0;
+  return 0;
+}
+
+int main() {
+  return run_tests();
+}
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_pack_address.c b/support/sdk/c/blip/lib6lowpan/tests/test_pack_address.c
new file mode 100644
index 00000000..6ed7e31f
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_pack_address.c
@@ -0,0 +1,112 @@
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+#include "6lowpan.h"
+
+char *pack_address(uint8_t *buf, struct in6_addr *addr, int context_match_len,
+                   ieee154_addr_t *l2addr, ieee154_panid_t pan, uint8_t *flags);
+
+struct {
+  char *in6_addr;
+  int   context_match_len;
+  char *l2addr;
+  ieee154_panid_t   panid;
+
+  /*  the result of executing the test case */
+  int      result_len;
+  uint8_t  result[32];
+  uint8_t      result_rv;
+} test_cases[] = {
+  // test the link-local address packing
+
+  // non-RFC4944 address, never packed to less then 16 bits
+  {"fe80::1", 0, "25", 0, 2, {0, 1}, LOWPAN_IPHC_AM_16},
+
+  // LL address padded with zeroes, matching L2 address.  Not
+  // compressed to zero because not RFC4944 style address
+  {"fe80::1", 0, "1", 0, 2, {0, 1}, LOWPAN_IPHC_AM_16},
+
+  // RFC4944 address, matching 16-bit id
+  {"fe80::1:00ff:fe00:1", 0, "1", 1, 0, {0, 0}, LOWPAN_IPHC_AM_0},
+
+  // RFC4944 address, different 16-bit ID
+  {"fe80::1:00ff:fe00:2", 0, "1", 8, 8, {0, 1, 0, 0xff, 0xfe, 0x0, 0, 02}, LOWPAN_IPHC_AM_64},
+
+  // matching with the L2 addr
+  {"fe80::aabb:ccdd:eeff:0011", 0, "aa:bb:cc:dd:ee:ff:00:11", 
+   8, 0, {}, LOWPAN_IPHC_AM_0},
+
+  // matching 64-bit L2 addr, but prefix isn't all zero
+  {"fe80::1:aabb:ccdd:eeff:0011", 0, "aa:bb:cc:dd:ee:ff:00:11", 
+   8, 16, 
+   {0xfe, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff, 0x00, 0x11}
+   , LOWPAN_IPHC_AM_128},
+
+  {"fe80::226:bbff:fe11:478b", 0, "2:26:bb:ff:fe:11:47:8c", 0,
+   8, {0x2, 0x26, 0xbb, 0xff, 0xfe, 0x11, 0x47, 0x8b}, LOWPAN_IPHC_AM_64},
+  // unspecified address
+  {"::", 0, "12", 0, 0, {}, LOWPAN_IPHC_AM_128 | LOWPAN_IPHC_AC_CONTEXT},
+
+  // context-based address compression
+
+  // 64-bit prefix, short id
+  {"2002::1", 64, "12", 1, 2, {0, 1}, LOWPAN_IPHC_AM_16 | LOWPAN_IPHC_AC_CONTEXT},
+
+  {"2002::1:1", 64, "12", 1, 8, {0, 0,0,0,0,1,0,1}, LOWPAN_IPHC_AM_64 | LOWPAN_IPHC_AC_CONTEXT},
+
+  {"2002::1:1", 112, "12", 1, 2, {0,1}, LOWPAN_IPHC_AM_16 | LOWPAN_IPHC_AC_CONTEXT},
+
+  {"2002:1::1:1", 8, "12", 1, 16,
+   {0x20, 0x02, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01},
+   LOWPAN_IPHC_AM_128},
+
+  {"2002::1:1", 128, "12", 1, 0, {0}, LOWPAN_IPHC_AM_0 | LOWPAN_IPHC_AC_CONTEXT},
+};
+
+ int run_tests() {
+  int i;
+  int success = 0, total = 0;
+  for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) {
+    uint8_t flags;
+    struct in6_addr addr;
+    uint8_t buf[512], *rv;
+    ieee154_addr_t l2addr;
+    total++;
+
+    inet_pton6(test_cases[i].in6_addr, &addr);
+    ieee154_parse(test_cases[i].l2addr, &l2addr);
+    ieee154_print(&l2addr, buf, 512);
+    printf("%s\n", buf);
+    printf("in6_addr: %s\n", test_cases[i].in6_addr);
+    rv = pack_address(buf, &addr, test_cases[i].context_match_len, &l2addr, 
+                      test_cases[i].panid, &flags);
+
+    printf("flags: 0x%x(0x%x) len: %li\n", flags, test_cases[i].result_rv, rv - buf );
+    print_buffer(buf, rv - buf);
+    if (test_cases[i].result_len != (rv - buf)) {
+      printf("result len failed\n");
+      continue;
+    }
+    if (test_cases[i].result_rv != flags) {
+
+      continue;
+    }
+    if (memcmp(test_cases[i].result, buf, test_cases[i].result_len) != 0) {
+      continue;
+    }
+
+    success++;
+  }
+  printf("%s: %i/%i tests succeeded\n", __FILE__, success, total);
+  if (success == total) return 0;
+  return 1;
+}
+
+int main() {
+  return run_tests();
+}
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_pack_multicast.c b/support/sdk/c/blip/lib6lowpan/tests/test_pack_multicast.c
new file mode 100644
index 00000000..d58bf2a9
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_pack_multicast.c
@@ -0,0 +1,66 @@
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+#include "6lowpan.h"
+
+char *pack_multicast(char *buf, struct in6_addr *addr, uint8_t *flags);
+
+struct {
+  char *addr;
+
+  /*  the result of executing the test case */
+  int      result_len;
+  uint8_t  result[16];
+  int      result_dispatch;
+} test_cases[] = {
+  {"ff02::1", 1, {1}, LOWPAN_IPHC_AM_M_8},
+  {"ff02::1:1111", 4, {0x02, 0x1, 0x11, 0x11}, LOWPAN_IPHC_AM_M_32},
+  {"fff2::1:1111", 4, {0xf2, 0x1, 0x11, 0x11}, LOWPAN_IPHC_AM_M_32},
+  {"fff2::1:fff1:1111", 6, {0xf2, 0x1, 0xff, 0xf1, 0x11, 0x11}, LOWPAN_IPHC_AM_M_48},
+  {"fff2::1:fff1:1111", 6, {0xf2, 0x1, 0xff, 0xf1, 0x11, 0x11}, LOWPAN_IPHC_AM_M_48},
+  {"fff2::f001:fff1:1111", 16, 
+   {0xff, 0xf2, 0,0,0,0,0,0,0,0, 0xf0, 0x1, 0xff, 0xf1, 0x11, 0x11}, 
+   LOWPAN_IPHC_AM_M_128},
+};
+
+ int run_tests() {
+  int i;
+  int success = 0, total = 0;
+  for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) {
+    uint8_t buf[512], *rb;
+    struct in6_addr addr;
+    uint8_t dispatch = 0;
+    total ++;
+
+    scribble(buf, 512);
+
+    inet_pton6(test_cases[i].addr, &addr);
+    printf("addr: %s\n", test_cases[i].addr);
+    rb = pack_multicast(buf, &addr, &dispatch);
+    print_buffer(buf, rb - buf);
+
+    if (test_cases[i].result_len != (rb - buf)) 
+      continue;
+
+    if (memcmp(test_cases[i].result, buf, rb - buf) != 0)
+      continue;
+
+    if (test_cases[i].result_dispatch != dispatch)
+      continue;
+    
+    printf("SUCCESS!\n");
+    success++;    
+  }
+  printf("%s: %i/%i tests succeeded\n", __FILE__, success, total);
+  if (success == total) return 0;
+  return 1;
+}
+
+int main() {
+  return run_tests();
+}
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_pack_nhc_chain.c b/support/sdk/c/blip/lib6lowpan/tests/test_pack_nhc_chain.c
new file mode 100644
index 00000000..da407401
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_pack_nhc_chain.c
@@ -0,0 +1,51 @@
+#include <stdint.h>
+#include <string.h>
+#ifdef UNIT_TESTING
+#include <stdio.h>
+#endif
+
+#include "6lowpan.h"
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+
+
+
+struct {
+  uint8_t hdr[128];
+} ip_hdrs[] = {
+  {IPV6_DEST, 8,  0,1,2,3,4,5},
+  {IANA_UDP,  10, 0,1,2,3,4,5,6,7},
+};
+
+struct udp_hdr udp = {0xabcd, 0x1234, 512, 0xdead};
+
+struct ip6_packet packet;
+struct iovec vec[3];
+
+int main() {
+  uint8_t nxt;
+  char buf[512], result[512];
+  int i, len;
+  packet.ip6_hdr.ip6_nxt = IPV6_HOP;
+  
+  iov_prefix(NULL, &vec[2], (uint8_t *)&udp, 8);
+  iov_prefix(&vec[2], &vec[1], ip_hdrs[1].hdr, 10);
+  iov_prefix(&vec[1], &vec[0], ip_hdrs[0].hdr, 8);
+
+  packet.ip6_data = vec;
+
+  len = pack_nhc_chain(buf, 512, &packet);
+  printf("[%i] ", len);
+  for (i = 0; i < len; i++) {
+    printf("0x%hhx ", buf[i]);
+  }
+  printf("\n\n");
+
+  unpack_nhc_chain(result, 512, &nxt, buf);
+  for (i = 0; i < 26; i++)
+    printf("0x%hhx ", result[i]);
+  printf("\n");
+  printf("Done!\n");
+}
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_pack_tcfl.c b/support/sdk/c/blip/lib6lowpan/tests/test_pack_tcfl.c
new file mode 100644
index 00000000..dcdaee2d
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_pack_tcfl.c
@@ -0,0 +1,90 @@
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+#include "6lowpan.h"
+
+char *pack_tcfl(uint8_t *buf, struct ip6_hdr *hdr, uint8_t *dispatch) ;
+
+struct {
+  uint8_t  tc;
+  uint32_t fl;
+
+  /*  the result of executing the test case */
+  int      result_len;
+  uint8_t  result[4];
+  int      result_dispatch;
+} test_cases[] = {
+  // no nothing
+  {0, 0, 0, {}, LOWPAN_IPHC_TF_NONE},
+
+  // one ecn bit
+  {0x1, 0, 1, {0x40}, LOWPAN_IPHC_TF_ECN_DSCP},
+
+  // both ecn bits
+  {0x3, 0, 1, {0xc0}, LOWPAN_IPHC_TF_ECN_DSCP},
+
+  // just DSCP
+  {0xfc, 0, 1, {0x3f}, LOWPAN_IPHC_TF_ECN_DSCP},
+
+  // flow label of one
+  {0, 1, 3, {0, 0, 1}, LOWPAN_IPHC_TF_ECN_FL},
+
+  // flow label + ECN tests
+  {0, 0xfffff, 3, {0xf, 0xff, 0xff}, LOWPAN_IPHC_TF_ECN_FL},
+
+  {3, 0xfffff, 3, {0xcf, 0xff, 0xff}, LOWPAN_IPHC_TF_ECN_FL},
+
+  {1, 0xabcde, 3, {0x4a, 0xbc, 0xde}, LOWPAN_IPHC_TF_ECN_FL},
+
+  // full thingie
+  {0x4, 0x1, 4, {0x01, 0, 0, 1}, LOWPAN_IPHC_TF_ECN_DSCP_FL},
+
+  {0x5, 0x1, 4, {0x41, 0, 0, 1}, LOWPAN_IPHC_TF_ECN_DSCP_FL},
+
+  {0xab, 0xcdef6, 4, {0xea, 0xc, 0xde, 0xf6}, LOWPAN_IPHC_TF_ECN_DSCP_FL},
+
+};
+
+ int run_tests() {
+  int i;
+  int success = 0, total = 0;
+  for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) {
+    uint8_t buf[512], *rb;
+    struct ip6_hdr hdr;
+    uint8_t dispatch = 0;
+    uint32_t val;
+    total ++;
+    scribble(buf, 512);
+
+    val = htonl(0x6 << 28 | ((test_cases[i].tc & 0xff) << 20) | (test_cases[i].fl & 0x000fffff));
+    hdr.ip6_flow = val;
+    printf("input: 0x%x\n", ntohl(val));
+
+    rb = pack_tcfl(buf, &hdr, &dispatch);
+    printf("output length: %li dispatch: 0x%x\n", (rb -buf), dispatch);
+    print_buffer(buf, rb - buf);
+    if (test_cases[i].result_len != (rb - buf)) 
+      continue;
+
+    if (memcmp(test_cases[i].result, buf, rb - buf) != 0)
+      continue;
+
+    if (test_cases[i].result_dispatch != dispatch)
+      continue;
+    
+    printf("SUCCESS!\n");
+    success++;    
+  }
+  printf("%s: %i/%i tests succeeded\n", __FILE__, success, total);
+  if (success == total) return 0;
+  return 1;
+}
+
+int main() {
+  return run_tests();
+}
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_unpack_address.c b/support/sdk/c/blip/lib6lowpan/tests/test_unpack_address.c
new file mode 100644
index 00000000..ba0a0a6e
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_unpack_address.c
@@ -0,0 +1,104 @@
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+#include "6lowpan.h"
+
+uint8_t *unpack_address(struct in6_addr *addr, uint8_t dispatch, 
+                        int context, uint8_t *buf,
+                        ieee154_addr_t *frame, ieee154_panid_t pan);
+
+struct {
+  char   *prefix;
+  uint8_t pfx_len;
+} prefix_options[] = {
+  {"2002::", 64},
+  {"2002:1:2:3:4:5:6:7", 128},
+};
+
+int lowpan_extern_read_context(struct in6_addr *addr, int context) {
+  struct in6_addr ctx;
+  inet_pton6(prefix_options[context].prefix, &ctx);
+  memcpy(addr->s6_addr, ctx.s6_addr, prefix_options[context].pfx_len / 8);
+}
+int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) {
+}
+
+struct {
+  char *address;
+  int   dispatch;
+  int   context;
+  int   len;
+  char  buf[32];
+  char *l2addr;
+  ieee154_panid_t   panid;
+  
+} test_cases[] = {
+  // context-free tests
+  {"fe80::1", LOWPAN_IPHC_AM_16, 0, 2, {0, 1}, "1", 1},
+  {"fe80::ffff", LOWPAN_IPHC_AM_16, 0, 2, {0xff, 0xff}, "1", 1},
+  {"fe80::abde:f012", LOWPAN_IPHC_AM_64, 0, 8, {0, 0, 0, 0, 0xab, 0xde, 0xf0, 0x12}, "1", 1},
+  {"fe80::1234:8765:abde:f012", LOWPAN_IPHC_AM_64, 0, 8, {0x12, 0x34, 0x87, 0x65, 0xab, 0xde, 0xf0, 0x12}, "1", 1},
+  {"fe80:1234:8765:abde:1234:8765:abde:f012", LOWPAN_IPHC_AM_128, 0, 16, 
+   {0xfe, 0x80, 0x12, 0x34, 0x87, 0x65, 0xab, 0xde, 0x12, 0x34, 0x87, 0x65, 0xab, 0xde, 0xf0, 0x12}, "1", 1},
+
+  // derived from the MAC address
+  {"fe80::1234:8765:abde:f012", LOWPAN_IPHC_AM_0, 0, 0, {}, "12:34:87:65:ab:de:f0:12", 1},
+
+  // RFC4944-style addresses
+  {"fe80::1:00ff:fe00:25", LOWPAN_IPHC_AM_0, 0, 0, {}, "25", 1},
+
+  {"fe80::ffff:00ff:fe00:abcd", LOWPAN_IPHC_AM_0, 0, 0, {}, "abcd", 0xffff},
+
+  // tests using context
+  {"2002::12", LOWPAN_IPHC_AC_CONTEXT |  LOWPAN_IPHC_AM_16, 0, 2, {0, 0x12}, "1", 1},
+
+  {"2002:1:2:3:4:5:6:7", LOWPAN_IPHC_AC_CONTEXT |  LOWPAN_IPHC_AM_0, 1, 0, {}, "1", 1},
+
+  {"2002::4:5:6:7", LOWPAN_IPHC_AC_CONTEXT |  LOWPAN_IPHC_AM_64, 0, 8, {0,4,0,5,0,6,0,7}, "1", 1},
+
+  {"::", LOWPAN_IPHC_AC_CONTEXT | LOWPAN_IPHC_AM_128, 0, 0, {}, "1", 1},
+};
+
+ int run_tests() {
+  int i;
+  int success = 0, total = 0;
+  for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) {
+    struct in6_addr addr, correct;
+    uint8_t buf[512];
+    char *rv;
+    ieee154_addr_t l2addr;
+    total++;
+
+    inet_pton6(test_cases[i].address, &correct);
+
+    ieee154_parse(test_cases[i].l2addr, &l2addr);
+    ieee154_print(&l2addr, buf, 512);
+    printf("%s\n", buf);
+    printf("in6_addr: %s\n", test_cases[i].address);
+    rv = unpack_address(&addr, test_cases[i].dispatch, test_cases[i].context,
+                        test_cases[i].buf, &l2addr, test_cases[i].panid);
+
+    inet_ntop6(&addr, buf, 512);
+    printf("result: %s length: %li\n", buf, rv - test_cases[i].buf);
+
+    if (test_cases[i].len != rv - test_cases[i].buf)
+      continue;
+
+    if (memcmp(&addr, &correct, 16) != 0)
+      continue;
+
+    success++;
+  }
+  printf("%s: %i/%i tests succeeded\n", __FILE__, success, total);
+  if (success == total) return 0;
+  return 1;
+}
+
+int main() {
+  return run_tests();
+}
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_unpack_ipnh.c b/support/sdk/c/blip/lib6lowpan/tests/test_unpack_ipnh.c
new file mode 100644
index 00000000..15f984f4
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_unpack_ipnh.c
@@ -0,0 +1,90 @@
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+#include "6lowpan.h"
+#include "internal.h"
+
+
+struct {
+  uint8_t  nxt_hdr;
+  uint16_t unpacked_length;
+
+  int pack_len;
+  uint8_t pack[2];
+  int data_length;
+} test_cases[] = {
+  {IPV6_HOP, 8, 1, {LOWPAN_NHC_IPV6_PATTERN | LOWPAN_NHC_EID_HOP | LOWPAN_NHC_NH}, 8},
+  {IPV6_MOBILITY, 13, 1, {LOWPAN_NHC_IPV6_PATTERN | LOWPAN_NHC_EID_MOBILE | LOWPAN_NHC_NH}, 13},
+  {IPV6_IPV6, 120, 1, {LOWPAN_NHC_IPV6_PATTERN | LOWPAN_NHC_EID_IPV6 | LOWPAN_NHC_NH}, 120},
+
+  {IPV6_IPV6, 12, 2, {LOWPAN_NHC_IPV6_PATTERN | LOWPAN_NHC_EID_IPV6, IANA_UDP}, 12},
+};
+
+
+int run_tests() {
+  int i, j;
+  int success = 0, total = 0;
+  for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) {
+    uint8_t nxt_hdr;
+    uint8_t buf[512], result[512];
+    uint8_t *rv, *pack;
+    total++;
+
+    memcpy(buf, test_cases[i].pack, test_cases[i].pack_len);
+    pack = buf + test_cases[i].pack_len;
+
+    *pack++ = test_cases[i].data_length;
+    for (j = 12; j < 12 + test_cases[i].data_length - 2; j++)
+      *pack++ = j;
+
+    printf("INPUT: ");
+    for (j = 0; j < test_cases[i].data_length; j++)
+      printf("0x%x ", buf[j]);
+    printf("\n");
+
+    rv = unpack_ipnh(result, sizeof(result), &nxt_hdr, buf);
+
+    printf("ip6_ext nxt: %i length: %i\n", nxt_hdr, result[1]);
+    for (j = 0; j < result[1] ; j++) {
+      printf("0x%x ", result[j]);
+    }
+    printf("\n");
+
+    // printf("%i:\n", test_cases[i].unpacked_length);
+    if (test_cases[i].unpacked_length != result[1]) {
+      printf("ERROR: wrong length\n");
+      continue;
+    }
+
+    if (test_cases[i].nxt_hdr != nxt_hdr) {
+      printf("ERROR: wrong next header: %i %i\n", test_cases[i].nxt_hdr, nxt_hdr);
+      continue;
+    }
+
+    if (test_cases[i].pack_len == 2 && result[0] != test_cases[i].pack[1]) {
+      printf("ERROR: wrong inline NH\n");
+      continue;
+    }
+
+    for (j = 2; j < result[1]; j++) {
+      if (result[j] != j + 10) {
+        printf("ERROR: wrong payload\n");
+        break;
+      }
+    }
+    if (j == result[1])
+      success++;
+  }
+  printf("%s: %i/%i tests succeeded\n", __FILE__, success, total);
+  if (success == total) return 0;
+  return 1;
+}
+
+int main() {
+  return run_tests();
+}
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_unpack_multicast.c b/support/sdk/c/blip/lib6lowpan/tests/test_unpack_multicast.c
new file mode 100644
index 00000000..bf72a80a
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_unpack_multicast.c
@@ -0,0 +1,75 @@
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+#include "6lowpan.h"
+
+uint8_t *unpack_multicast(struct in6_addr *addr, uint8_t dispatch, 
+                          int context, uint8_t *buf);
+
+struct {
+  char   *prefix;
+  uint8_t pfx_len;
+} prefix_options[] = {
+  {"2002::", 64},
+  {"2002:1:2:3:4:5:6:7", 128},
+};
+
+int lowpan_extern_read_context(struct in6_addr *addr, int context) {
+  struct in6_addr ctx;
+  inet_pton6(prefix_options[context].prefix, &ctx);
+  memcpy(addr->s6_addr, ctx.s6_addr, prefix_options[context].pfx_len / 8);
+}
+int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) {
+}
+
+struct {
+  char *address;
+  int   dispatch;
+  int   context;
+  int   len;
+  uint8_t  buf[32];
+} test_cases[] = {
+  {"ff02::1", LOWPAN_IPHC_AM_M | LOWPAN_IPHC_AM_M_8, 0, 1, {1}},
+  {"ff18::ab:cdef:1234", LOWPAN_IPHC_AM_M | LOWPAN_IPHC_AM_M_48, 0, 6, {0x18, 0xab, 0xcd, 0xef, 0x12, 0x34}},
+  {"ffff::ef:1234", LOWPAN_IPHC_AM_M | LOWPAN_IPHC_AM_M_32, 0, 4, {0xff, 0xef, 0x12, 0x34}},
+  {"2002:1:2:3:4:5:6:7", LOWPAN_IPHC_AM_M | LOWPAN_IPHC_AM_M_128, 0, 16, {0x20, 0x02, 0,1,0,2,0,3,0,4,0,5,0,6,0,7}},
+};
+
+ int run_tests() {
+  int i;
+  int success = 0, total = 0;
+  for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) {
+    struct in6_addr addr, correct;
+    uint8_t buf[512];
+    uint8_t *rv;
+    total++;
+
+    inet_pton6(test_cases[i].address, &correct);
+
+    printf("in6_addr: %s\n", test_cases[i].address);
+    rv = unpack_multicast(&addr, test_cases[i].dispatch, test_cases[i].context, test_cases[i].buf);
+
+    inet_ntop6(&addr, buf, 512);
+    printf("result: %s length: %li\n", buf, rv - test_cases[i].buf);
+
+    if (test_cases[i].len != rv - test_cases[i].buf)
+      continue;
+
+    if (memcmp(&addr, &correct, 16) != 0)
+      continue;
+
+    success++;
+  }
+  printf("%s: %i/%i tests succeeded\n", __FILE__, success, total);
+  if (success == total) return 0;
+  return 1;
+}
+
+int main() {
+  return run_tests();
+}
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_unpack_tcfl.c b/support/sdk/c/blip/lib6lowpan/tests/test_unpack_tcfl.c
new file mode 100644
index 00000000..43d9ef33
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_unpack_tcfl.c
@@ -0,0 +1,65 @@
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+#include "6lowpan.h"
+
+uint8_t *unpack_tcfl(struct ip6_hdr *hdr, uint8_t dispatch, uint8_t *buf);
+
+struct {
+  uint32_t result;
+  /*  the result of executing the test case */
+  uint8_t  test_dispatch;
+  int      test_len;
+  uint8_t  test[4];
+} test_cases[] = {
+  {0x60000000, LOWPAN_IPHC_TF_NONE, 0, {}},
+  {0x60000000, LOWPAN_IPHC_TF_NONE | ~LOWPAN_IPHC_TF_MASK, 0, {}},
+
+  // ECN bit
+  {0x60100000, LOWPAN_IPHC_TF_ECN_DSCP, 1, {0x40}},
+
+  // ecn and DSCP
+  {0x6ab00000, LOWPAN_IPHC_TF_ECN_DSCP, 1, {0xea}},
+
+  // ECN + FL
+  {0x60301234, LOWPAN_IPHC_TF_ECN_FL, 3, {0xc0, 0x12, 0x34}},
+
+  // full
+  {0x6f012345, LOWPAN_IPHC_TF_ECN_DSCP_FL, 4, {0x3c, 0x01, 0x23, 0x45}},
+};
+
+int run_tests() {
+  int i;
+  int success = 0, total = 0;
+  for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) {
+    struct ip6_hdr hdr;
+    uint8_t *rb;
+
+    total ++;
+
+    rb = unpack_tcfl(&hdr, test_cases[i].test_dispatch, test_cases[i].test);
+    printf("result: 0x%x correct: 0x%x\n", ntohl(hdr.ip6_flow), test_cases[i].result);
+
+    printf("length: %i\n", rb - test_cases[i].test);
+
+    if (test_cases[i].test_len != rb - test_cases[i].test)
+      continue;
+
+    if (test_cases[i].result != ntohl(hdr.ip6_flow))
+      continue;
+
+    success ++;
+  }
+  printf("%s: %i/%i tests succeeded\n", __FILE__, success, total);
+  if (success == total) return 0;
+  return 1;
+}
+
+int main() {
+  return run_tests();
+}
diff --git a/support/sdk/c/blip/lib6lowpan/tests/test_unpack_udp.c b/support/sdk/c/blip/lib6lowpan/tests/test_unpack_udp.c
new file mode 100644
index 00000000..52b11150
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/tests/test_unpack_udp.c
@@ -0,0 +1,89 @@
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "Ieee154.h"
+#include "ip.h"
+#include "lib6lowpan.h"
+#include "nwbyte.h"
+#include "6lowpan.h"
+
+
+uint8_t *unpack_udp(uint8_t *dest, uint8_t *nxt_hdr, uint8_t *buf);
+
+struct {
+  struct udp_hdr result;
+  uint8_t pack_len;
+  uint8_t pack[10];
+} test_cases[] = {
+  { {0xcdab, 0x3412, 0, 0}, 5,
+    {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_CKSUM | LOWPAN_NHC_UDP_PORT_FULL, 0xab, 0xcd, 0x12, 0x34}},
+
+  { {0xcdab, 0x3412, 0, 0xdead}, 7,
+    {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_PORT_FULL, 0xab, 0xcd, 0x12, 0x34, 0xad, 0xde}},
+
+  { {0xabcd, 0x12f0, 0, 0}, 4,
+    {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_CKSUM | LOWPAN_NHC_UDP_PORT_SRC_FULL, 0xcd, 0xab, 0x12}},
+
+  { {0xabf0, 0x3412, 0, 0}, 4,
+    {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_CKSUM | LOWPAN_NHC_UDP_PORT_DST_FULL, 0xab, 0x12, 0x34}},
+
+  { {0xbff0, 0xbaf0, 0, 0}, 2,
+    {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_CKSUM | LOWPAN_NHC_UDP_PORT_SHORT, 0xfa}},
+
+  { {0xbff0, 0xbaf0, 0, 0xdead}, 4,
+    {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_PORT_SHORT, 0xfa, 0xad, 0xde}},
+
+  { {0xabcd, 0x12f0, 0, 0xdead}, 6,
+    {LOWPAN_NHC_UDP_PATTERN | LOWPAN_NHC_UDP_PORT_SRC_FULL, 0xcd, 0xab, 0x12, 0xad, 0xde}},
+
+};
+
+
+int run_tests() {
+  int i, j;
+  int success = 0, total = 0;
+  for (i = 0; i < (sizeof(test_cases) / sizeof(test_cases[0])); i++) {
+    uint8_t nxt_hdr;
+    uint8_t result[512];
+    uint8_t *rv;
+    struct udp_hdr *udp = (struct udp_hdr *)result;
+    total++;
+
+    rv = unpack_udp(result, &nxt_hdr, test_cases[i].pack);
+
+    if (test_cases[i].pack_len != rv - test_cases[i].pack) {
+      printf("ERROR: wrong unpack length: %li %p %p\n", 
+             (rv - test_cases[i].pack), test_cases[i].pack, rv);
+      continue;
+    }
+
+    if (test_cases[i].result.srcport != udp->srcport) {
+      printf("ERROR: wrong srcport\n");
+      continue;
+    }
+
+    if (test_cases[i].result.dstport != udp->dstport) {
+      printf("ERROR: wrong dstport\n");
+      continue;
+    }
+
+    if (test_cases[i].result.len != udp->len) {
+      printf("ERROR: wrong length\n");
+      continue;
+    }
+
+    if (test_cases[i].result.chksum != udp->chksum) {
+      printf("ERROR: wrong chksum: 0x%x 0x%x\n", test_cases[i].result.chksum, udp->chksum);
+      continue;
+    }
+    success++;
+  }
+  printf("%s: %i/%i tests succeeded\n", __FILE__, success, total);
+  if (success == total) return 0;
+  return 1;
+}
+
+int main() {
+  return run_tests();
+}
diff --git a/support/sdk/c/blip/lib6lowpan/trace/Makefile.am b/support/sdk/c/blip/lib6lowpan/trace/Makefile.am
new file mode 100644
index 00000000..9d81c82b
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/trace/Makefile.am
@@ -0,0 +1,8 @@
+
+noinst_PROGRAMS=compress decompress
+CFLAGS += -I.. -I../.. -I../../../../../../tos/types -DPC 
+
+compress_SOURCES=compress.c ../utility.c
+decompress_SOURCES=decompress.c ../utility.c
+
+LDADD=../lib6lowpan.a
diff --git a/support/sdk/c/blip/lib6lowpan/trace/compress.c b/support/sdk/c/blip/lib6lowpan/trace/compress.c
new file mode 100644
index 00000000..84533319
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/trace/compress.c
@@ -0,0 +1,93 @@
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "../lib6lowpan-includes.h"
+#include "../ieee154_header.h"
+#include "../lib6lowpan.h"
+
+uint8_t frame[1500], *cur;
+uint8_t fragment[128];
+
+int lowpan_extern_read_context(struct in6_addr *addr, int context) {
+  memset(addr->s6_addr, 0, 0);
+  addr->s6_addr16[0] = 0xaaaa;
+  return 64;
+}
+
+int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) {
+  return 0;
+}
+
+int main(int argc, char **argv) {
+  struct ieee154_frame_addr frame_address;
+  struct lowpan_reconstruct recon;
+  struct lowpan_ctx ctx;
+  struct ip6_packet pkt;
+  struct ip_iovec iov;
+  char print_buf[256];
+  int idx = 0, rv;
+  char c, val;
+  memset(frame, 0, sizeof(frame));
+
+  /* read destination */
+  cur = print_buf;
+  while ((c = getc(stdin)) != '\n')
+    *cur++ = c;
+  *cur++ = '\0';
+  ieee154_parse(print_buf, &frame_address.ieee_src);
+
+  /* read source */
+  cur = print_buf;
+  while ((c = getc(stdin)) != '\n')
+    *cur++ = c;
+  *cur++ = '\0';
+  ieee154_parse(print_buf, &frame_address.ieee_dst);
+  frame_address.ieee_dstpan = 0x22;
+
+  cur = frame;
+  while ((c = getc(stdin)) != EOF) {
+    c = tolower(c);
+    if (c >= 'a' && c <= 'f')
+      c = c - 'a' + 10;
+    else if (c >= '0' && c <= '9')
+      c = c - '0';
+    else if (c == '\n' || c == '\r')
+      break;
+    else
+      continue;
+
+    if (idx++ % 2 == 0) 
+      *cur |= c << 4;
+    else 
+      *cur++ |= c;
+  }
+
+  ieee154_print(&frame_address.ieee_src, print_buf, sizeof(print_buf));
+  fprintf(stderr, "src: %s", print_buf);
+  ieee154_print(&frame_address.ieee_dst, print_buf, sizeof(print_buf));
+  fprintf(stderr, " dest: %s\n", print_buf);
+  fprintf(stderr, "packet [%li]\n", cur - frame);
+  fprint_buffer(stderr, frame, cur - frame);
+  fprintf(stderr, "\n");
+
+  if (cur - frame < sizeof(struct ip6_hdr))
+    return -1;
+
+  memset(&ctx, 0, sizeof(ctx));
+  memcpy(&pkt.ip6_hdr, frame, sizeof(struct ip6_hdr));
+  iov.iov_base = frame + sizeof(struct ip6_hdr);
+  iov.iov_len = cur - frame - sizeof(struct ip6_hdr);
+  iov.iov_next = NULL;
+  pkt.ip6_data = &iov;
+
+  while ((rv = lowpan_frag_get(fragment, sizeof(fragment),
+                               &pkt, &frame_address, &ctx)) > 0) {
+    fragment[0] = rv - 1;       /* set the 802.15.4 length */
+    print_buffer_bare(fragment, rv);
+    fprintf(stderr, "fragment [%i]\n", rv);
+    fprint_buffer(stderr, fragment, rv);
+    printf("\n");
+  }  
+}
diff --git a/support/sdk/c/blip/lib6lowpan/trace/decompress.c b/support/sdk/c/blip/lib6lowpan/trace/decompress.c
new file mode 100644
index 00000000..2685ebb6
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/trace/decompress.c
@@ -0,0 +1,85 @@
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "../lib6lowpan-includes.h"
+#include "../ieee154_header.h"
+#include "../lib6lowpan.h"
+
+uint8_t frame[1500];
+
+int lowpan_extern_read_context(struct in6_addr *addr, int context) {
+  memset(addr->s6_addr, 0, 0);
+  addr->s6_addr16[0] = 0xaaaa;
+  return 64;
+}
+
+int lowpan_extern_match_context(struct in6_addr *addr, UNUSED uint8_t *ctx_id) {
+  return 0;
+}
+
+int read_packet(char *buf, int len) {
+  char c;
+  char *start = buf;
+  int idx = 0;
+  memset(buf, 0, len);
+  while (len > 0 && (c = getc(stdin)) != EOF) {
+    c = tolower(c);
+    if (c >= 'a' && c <= 'f')
+      c = c - 'a' + 10;
+    else if (c >= '0' && c <= '9')
+      c = c - '0';
+    else if (c == '\n' || c == '\r')
+      break;
+    else
+      continue;
+
+    if (idx++ % 2 == 0) {
+      *buf |= c << 4;
+    } else {
+      *buf++ |= c;
+      len --;
+    }
+  }
+  if (c == EOF) return -1;
+  else return buf - start ;
+}
+
+int main(int argc, char **argv) {
+  struct ieee154_frame_addr frame_address;
+  struct lowpan_reconstruct recon;
+  char print_buf[256];
+  uint8_t *cur;
+  int idx = 0, rv;
+
+  memset(&recon, 0, sizeof(recon));
+  while ((rv = read_packet(frame, sizeof(frame))) > 0) {
+    printf("packet [%i]\n", rv);
+    print_buffer(frame, rv);
+    printf("\n");
+
+    cur = unpack_ieee154_hdr(frame, &frame_address);
+    ieee154_print(&frame_address.ieee_src, print_buf, sizeof(print_buf));
+    printf("802.15.4 source: %s\n", print_buf);
+    ieee154_print(&frame_address.ieee_dst, print_buf, sizeof(print_buf));
+    printf("802.15.4 dest: %s\n", print_buf);
+    printf("802.15.4 destpan: 0x%x\n", letohs(frame_address.ieee_dstpan));
+    printf("\n");
+
+    if (recon.r_bytes_rcvd == 0) {
+      rv = lowpan_recon_start(&frame_address, &recon,
+                              cur, rv - (cur - frame) );
+    } else {
+      rv = lowpan_recon_add(&recon, cur, rv - (cur - frame));
+    }
+
+    printf("[%i] %i %i\n", rv, recon.r_size, recon.r_bytes_rcvd);
+    if (recon.r_size == recon.r_bytes_rcvd) {
+      printf("reconstruction complete [%i]\n", recon.r_bytes_rcvd);
+      print_buffer(recon.r_buf, recon.r_size);
+      free(recon.r_buf);
+    }
+  }
+  return 0;
+}
diff --git a/support/sdk/c/blip/lib6lowpan/trace/packet.trace b/support/sdk/c/blip/lib6lowpan/trace/packet.trace
new file mode 100644
index 00000000..110f9d40
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/trace/packet.trace
@@ -0,0 +1 @@
+61 41C8 83 CDAB FFFF 01 01010001 7412007A 3B3A029B 012C0600 00010010 020000AA AA000000 00000000 00000000 00000104 0E00080C 0A030001 00000100 FFFFFF08 1E404000 00000000 00000000 000000AA AA000000 00000000 00000000 00000037 02
diff --git a/support/sdk/c/blip/lib6lowpan/trace/uncompressed.trace b/support/sdk/c/blip/lib6lowpan/trace/uncompressed.trace
new file mode 100644
index 00000000..81de5af8
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/trace/uncompressed.trace
@@ -0,0 +1,3 @@
+01:01:01:00:01:74:12:00
+0xffff
+60 00 00 00 00 4c 3a 40 fe 80 00 00 00 00 00 00 03 01 01 00 01 74 12 00 ff 02 00 00 00 00 00 00 00 00 00 00 00 00 00 02 9b 01 2c 05 00 00 01 00 10 03 00 00 aa aa 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 0e 00 08 0c 0a 03 00 01 00 00 01 00 ff ff ff 08 1e 40 40 00 00 00 00 00 00 00 00 00 00 00 00 aa aa 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/support/sdk/c/blip/lib6lowpan/trace/uncompressed2.trace b/support/sdk/c/blip/lib6lowpan/trace/uncompressed2.trace
new file mode 100644
index 00000000..0d27abc7
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/trace/uncompressed2.trace
@@ -0,0 +1,3 @@
+01:01:01:00:01:74:12:00
+0xffff
+60 00 00 00 00 54 00 40 fe 80 00 00 00 00 00 00 01 01 01 00 01 74 12 00 ff 02 00 00 00 00 00 00 00 00 00 00 00 00 00 02 3a 08 f3 06 00 01 ff ff 9b 01 2c 05 00 00 01 00 10 03 00 00 aa aa 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 0e 00 08 0c 0a 03 00 01 00 00 01 00 ff ff ff 08 1e 40 40 00 00 00 00 00 00 00 00 00 00 00 00 aa aa 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/support/sdk/c/blip/lib6lowpan/utility.c b/support/sdk/c/blip/lib6lowpan/utility.c
new file mode 100644
index 00000000..92a4057b
--- /dev/null
+++ b/support/sdk/c/blip/lib6lowpan/utility.c
@@ -0,0 +1,226 @@
+
+#include <stdint.h>
+#include <stdint.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "lib6lowpan-includes.h"
+#include "ip.h"
+
+#define TO_CHAR(X) (((X) < 10) ? ('0' + (X)) : ('a' + ((X) - 10)))
+#define CHAR_VAL(X)  (((X) >= '0' && (X) <= '9') ? ((X) - '0') : \
+                      (((X) >= 'A' && (X) <= 'F') ? ((X) - 'A' + 10) : ((X) - 'a' + 10)))
+
+void inet_pton6(char *addr, struct in6_addr *dest) {
+  uint16_t cur = 0;
+  char *p = addr;
+  uint8_t block = 0, shift = 0;
+  if (addr == NULL || dest == NULL) return;
+  memset(dest->s6_addr, 0, 16);
+
+  // first fill in from the front
+  while (*p != '\0') {
+    if (*p != ':') {
+      cur <<= 4;
+      cur |= CHAR_VAL(*p);
+    } else {
+      dest->s6_addr16[block++] = htons(cur);
+      cur = 0;
+    }
+    p++;
+    if (*p == '\0') {
+      dest->s6_addr16[block++] = htons(cur);      
+      return;
+    }
+    if (*(p - 1) == ':' && *p == ':') {
+      break;
+    }
+  }
+  // we must have hit a "::" which means we need to start filling in from the end.
+  block = 7;
+  cur = 0;
+  while (*p != '\0') p++;
+  p--;
+  // now pointing at the end of the address string
+  while (p > addr) {
+    if (*p != ':') {
+      cur |= (CHAR_VAL(*p) << shift);
+      shift += 4;
+    } else {
+      dest->s6_addr16[block--] = htons(cur);
+      cur = 0; shift = 0;
+    }
+    p --;
+    if (*(p + 1) == ':' && *p == ':') break;
+  }
+}
+
+
+
+int inet_ntop6(struct in6_addr *addr, char *buf, int cnt) {
+  uint16_t block;
+  char *end = buf + cnt;
+  int i, j, compressed = 0;
+
+  for (j = 0; j < 8; j++) {
+    if (buf > end - 7) return -1;
+
+    block = ntohs(addr->s6_addr16[j]);
+    for (i = 4; i <= 16; i+=4) {
+      if (block > (0xffff >> i) || (compressed == 2 && i == 16)) {
+        *buf++ = TO_CHAR((block >> (16 - i)) & 0xf);
+      }
+    }
+    if (addr->s6_addr16[j] == 0 && compressed == 0) {
+      *buf++ = ':';
+      compressed++;
+    }
+    if (addr->s6_addr16[j] != 0 && compressed == 1) compressed++;
+
+    if (j < 7 && compressed != 1) *buf++ = ':';
+  }
+  if (compressed == 1)
+    *buf++ = ':';
+  *buf++ = '\0';
+  return buf - (end - cnt);
+}
+
+uint16_t ieee154_hashaddr(ieee154_addr_t *addr) {
+  if (addr->ieee_mode == IEEE154_ADDR_SHORT) {
+    return addr->i_saddr;
+  } else if (addr->ieee_mode == IEEE154_ADDR_EXT) {
+    uint16_t i, hash = 0, *current = (uint16_t *)addr->i_laddr.data;
+    for (i = 0; i < 4; i++) 
+      hash += *current ++;
+    return hash;
+  } else {
+    return 0;
+  }
+}
+
+#ifndef PC
+
+uint32_t ntohl(uint32_t i) {
+  uint16_t lo = (uint16_t)i;
+  uint16_t hi = (uint16_t)(i >> 16);
+  lo = (lo << 8) | (lo >> 8);
+  hi = (hi << 8) | (hi >> 8);
+  return (((uint32_t)lo) << 16) | ((uint32_t)hi);
+}
+
+uint8_t *ip_memcpy(uint8_t *dst0, const uint8_t *src0, uint16_t len) {
+  uint8_t *dst = (uint8_t *) dst0;
+  uint8_t *src = (uint8_t *) src0;
+  uint8_t *ret = dst0;
+  
+  for (; len > 0; len--)
+    *dst++ = *src++;
+  
+  return ret;
+}
+
+#endif
+
+#ifdef PC
+char *strip(char *buf) {
+  char *rv;
+  while (isspace(*buf))
+    buf++;
+  rv = buf;
+
+  buf += strlen(buf) - 1;
+  while (isspace(*buf)) {
+    *buf = '\0';
+    buf--;
+  }
+  return rv;
+}
+
+int ieee154_parse(char *in, ieee154_addr_t *out) {
+  int i;
+  long val;
+  char *endp = in;
+  long saddr = strtol(in,  &endp, 16);
+  fprintf(stderr, "ieee154_parse: %s, %c\n", in, *endp);
+
+  if (*endp == ':') {
+    endp = in;
+    // must be a long address
+    for (i = 0; i < 8; i++) {
+      val = strtol(endp, &endp, 16);
+      out->i_laddr.data[i] = val;
+      endp++;
+    }
+    out->ieee_mode = IEEE154_ADDR_EXT;
+  } else {
+    out->i_saddr = htole16(saddr);
+    out->ieee_mode = IEEE154_ADDR_SHORT;
+  }
+
+  return 0;
+}
+
+int ieee154_print(ieee154_addr_t *in, char *out, size_t cnt) {
+  int i;
+  char *cur = out;
+  switch (in->ieee_mode) {
+  case IEEE154_ADDR_SHORT:
+    snprintf(out, cnt, "IEEE154_ADDR_SHORT: 0x%x", in->i_saddr);
+    break;
+  case IEEE154_ADDR_EXT:
+    cur += snprintf(out, cnt, "IEEE154_ADDR_EXT: ");
+
+    for (i = 0; i < 8; i++) {
+      cur += snprintf(cur, cnt - (cur - out), "%02x", in->i_laddr.data[i]);
+      if (i < 7)
+        *cur++ = ':';
+    }
+    break;
+  }
+  return 0;
+}
+
+void fprint_buffer(FILE *fp, uint8_t *buf, int len) {
+  int i;
+  for (i = 0; i < len; i++) {
+    if ((i % 16) == 0 && i > 0) 
+      fprintf(fp, "\n");
+    if (i % 16 == 0) {
+      fprintf(fp, "%i:\t", i);
+    }
+    fprintf(fp, "%02x ", buf[i]);
+  }
+  fprintf(fp, "\n");
+}
+
+void print_buffer(uint8_t *buf, int len) {
+  fprint_buffer(stdout, buf, len);
+}
+
+void print_buffer_bare(uint8_t *buf, int len) {
+  while (len--) {
+    printf("%02x ", *buf++);
+  }
+}
+
+void scribble(uint8_t *buf, int len) {
+  int i;
+  for (i = 0; i < len; i++) {
+    buf[i] = rand();
+  }
+}
+
+void iov_print(struct ip_iovec *iov) {
+  struct ip_iovec *cur = iov;
+  while (cur != NULL) {
+    int i;
+    printf("iovec (%p, %i) ", cur, (int)cur->iov_len);
+    for (i = 0; i < cur->iov_len; i++) {
+      printf("%02hhx ", cur->iov_base[i]);
+    }
+    printf("\n");
+    cur = cur->iov_next;
+  }
+}
+
+#endif
diff --git a/support/sdk/c/blip/libtcp/Makefile b/support/sdk/c/blip/libtcp/Makefile
new file mode 100644
index 00000000..6c5a45de
--- /dev/null
+++ b/support/sdk/c/blip/libtcp/Makefile
@@ -0,0 +1,20 @@
+
+GCC=gcc
+CFLAGS=-I../include -I../driver/ -DPC -g -Wall
+
+
+all: test_client test_server
+
+test_circ: test_circ.c circ.c circ.h
+	$(GCC) -o $@ $^ $(CFLAGS)
+
+test_client: test_client.c  # tcplib.h tcplib.c circ.c
+	$(GCC) -o $@ $< $(CFLAGS)
+# 	$(GCC) -o $@ $< tcplib.c circ.c ../driver/tun_dev.c ../lib6lowpan/ip_malloc.c ../lib6lowpan/in_cksum.c $(CFLAGS)
+
+test_server: test_server.c  tcplib.h tcplib.c circ.c
+	$(GCC) -o $@ $< tcplib.c circ.c ../driver/tun_dev.c ../lib6lowpan/ip_malloc.c ../lib6lowpan/in_cksum.c $(CFLAGS)
+
+clean:
+	rm -rf test_server test_circ
+
diff --git a/support/sdk/c/blip/libtcp/circ.c b/support/sdk/c/blip/libtcp/circ.c
new file mode 100644
index 00000000..303b922f
--- /dev/null
+++ b/support/sdk/c/blip/libtcp/circ.c
@@ -0,0 +1,152 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "tcplib.h"
+
+struct circ_buf {
+  uint8_t  *data_start;
+  uint8_t  *data_head;
+  uint16_t  data_len;
+  uint32_t  head_seqno;
+};
+
+int circ_buf_init(void *data, int len, uint32_t seqno) {
+  struct circ_buf *b = (struct circ_buf *)data;
+
+  if (len < sizeof(struct circ_buf))
+    return -1;
+
+  b->data_head = b->data_start = (uint8_t *)(b + 1);
+  b->data_len = len - sizeof(struct circ_buf);
+  b->head_seqno = seqno;
+  return 0;
+}
+
+uint32_t circ_get_seqno(void *buf) {
+  struct circ_buf *b = (struct circ_buf *)buf;
+  return b->head_seqno;
+}
+
+void circ_set_seqno(void *buf, uint32_t seqno) {
+  struct circ_buf *b = (struct circ_buf *)buf;
+  b->head_seqno = seqno;
+}
+
+static void get_ptr_off_1(struct circ_buf *b, uint32_t sseqno, int len,
+                          uint8_t **writeptr, int *w_len) {
+  uint8_t *endptr =  b->data_start + b->data_len;
+  int offset;
+
+  *writeptr = NULL;
+  *w_len = len;
+
+  /* write up to either the end of the buffer */
+  offset = sseqno - b->head_seqno;
+  if (b->data_head + offset < endptr) {
+    *writeptr = b->data_head + offset;
+  } else {
+    offset -= (endptr - b->data_head);
+    *writeptr = b->data_start + offset;
+  }
+  if (*writeptr + *w_len > endptr) {
+    *w_len = endptr - *writeptr;
+  }
+}
+
+int circ_shorten_head(void *buf, uint32_t seqno) {
+  struct circ_buf *b = (struct circ_buf *)buf;
+  int offset = seqno - b->head_seqno;
+
+  b->head_seqno = seqno;
+  b->data_head += offset;
+
+  while (b->data_head > b->data_start + b->data_len)
+    b->data_head -= b->data_len;
+
+  return 0;
+}
+
+int circ_buf_read(void *buf, uint32_t sseqno,
+                  uint8_t *data, int len) {
+  struct circ_buf *b = (struct circ_buf *)buf;
+  uint8_t *readptr;
+  int r_len, rc = 0;
+
+  get_ptr_off_1(b, sseqno, len, &readptr, &r_len);
+  memcpy(data, readptr, r_len);
+  data += r_len;
+  rc += r_len;
+  
+  if (r_len != len) {
+    readptr = b->data_start;
+    r_len = min(len - r_len, b->data_head - b->data_start);
+    memcpy(data, readptr, r_len);
+    rc += r_len;
+  }
+  return rc;
+}
+
+int circ_buf_write(char *buf, uint32_t sseqno,
+                   uint8_t *data, int len) {
+  struct circ_buf *b = (struct circ_buf *)buf;
+  uint8_t *writeptr;
+  int w_len;
+  /* we can't write any bytes since we're trying to write too far
+     ahead  */
+  if (sseqno > b->head_seqno + b->data_len)
+    return -1;
+  if (len == 0) return 0;
+
+  get_ptr_off_1(b, sseqno, len, &writeptr, &w_len);
+
+  memcpy(writeptr, data, w_len);
+  data += w_len;
+
+  if (w_len != len) {
+    writeptr = b->data_start;
+    w_len = min(len - w_len, b->data_head - b->data_start);
+    memcpy(writeptr, data, w_len);
+  }
+
+  return 0;
+}
+
+#ifdef PC             
+void circ_buf_dump(void *buf) {
+  struct circ_buf *b = (struct circ_buf *)buf;
+  uint8_t *d;
+  int i;
+/*   printf("circ buf: %p\n\tmap: %p\n\tmap_len: %i\n\tdata_start: %p\n\t" */
+/*          "data_head: %p\n\tdata_len: %i\n\thead_seqno: %i\n",  */
+/*          b, b->map, */
+/*          b->map_len, b->data_start, b->data_head, b->data_len, b->head_seqno); */
+  for (d = b->data_start; d < b->data_start + b->data_len; d++) {
+    if (d == b->data_head) putc('|', stdout);
+    printf("%2.x ", *d);
+  }
+  putc('\n', stdout);
+}
+#endif
diff --git a/support/sdk/c/blip/libtcp/circ.h b/support/sdk/c/blip/libtcp/circ.h
new file mode 100644
index 00000000..d71f3a0f
--- /dev/null
+++ b/support/sdk/c/blip/libtcp/circ.h
@@ -0,0 +1,48 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef __CIRC_H_
+#define __CIRC_H_
+
+#include <stdint.h>
+
+int circ_buf_init(void *data, int len, uint32_t seqno);
+
+
+int circ_buf_write(char *buf, uint32_t sseqno,
+                   uint8_t *data, int len);
+
+
+int circ_buf_read(void *buf, uint32_t sseqno,
+                  uint8_t *data, int len);
+
+
+int circ_shorten_head(void *buf, uint32_t seqno);
+
+/* read from the head of the buffer, moving the data pointer forward */
+// int circ_buf_read_head(char *buf, char **data);
+
+void circ_buf_dump(void *buf);
+
+uint32_t circ_get_seqno(void *buf);
+void circ_set_seqno(void *buf, uint32_t seqno);
+
+#endif
diff --git a/support/sdk/c/blip/libtcp/tcplib.c b/support/sdk/c/blip/libtcp/tcplib.c
new file mode 100644
index 00000000..e7178717
--- /dev/null
+++ b/support/sdk/c/blip/libtcp/tcplib.c
@@ -0,0 +1,737 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/* A nonblocking library-based implementation of TCP
+ *
+ * There are some things like timers which need to be handled
+ * externally with callbacks.
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include "ip_malloc.h"
+#include "in_cksum.h"
+#include "6lowpan.h"
+#include "ip.h"
+#include "tcplib.h"
+#include "circ.h"
+
+static struct tcplib_sock *conns = NULL;
+
+#define ONE_SEGMENT(X)  ((X)->mss)
+
+#ifdef PC
+uint16_t alloc_local_port() {
+  return (time(NULL) & 0xffff) | 0x8000;
+}
+#endif
+
+static inline void conn_add_once(struct tcplib_sock *sock) {
+  struct tcplib_sock *iter;
+
+  for (iter = conns; iter != NULL; iter = iter->next) {
+    if (iter == sock) break;
+  }
+  if (iter == NULL) {
+    sock->next = conns;
+    conns = sock;
+  }
+
+}
+static int isInaddrAny(struct in6_addr *addr) {
+  int i;
+  for (i = 0; i < 8; i++)
+    if (addr->s6_addr16[i] != 0) break;
+  if (i != 8) return 0;
+  return 1;
+}
+
+#ifdef PC
+#include <arpa/inet.h>
+
+void print_conn(struct tcplib_sock *sock) {
+  char addr_buf[32];
+  printf("tcplib socket state: %i:\n", sock->state);
+  inet_ntop(AF_INET6, sock->l_ep.sin6_addr.s6_addr, addr_buf, 32);
+  printf(" local ep: %s port: %u\n", addr_buf, ntohs(sock->l_ep.sin6_port));
+  inet_ntop(AF_INET6, sock->r_ep.sin6_addr.s6_addr, addr_buf, 32);
+  printf(" remote ep: %s port: %u\n", addr_buf, ntohs(sock->r_ep.sin6_port));
+  printf(" tx buf length: %i\n", sock->tx_buf_len);
+}
+void print_headers(struct ip6_hdr *iph, struct tcp_hdr *tcph) {
+  char addr_buf[32];
+  printf("headers ip length: %i:\n", ntohs(iph->ip6_plen));
+  inet_ntop(AF_INET6, iph->ip6_src.s6_addr, addr_buf, 32);
+  printf(" source: %s port: %u\n", addr_buf, ntohs(tcph->srcport));
+  inet_ntop(AF_INET6, iph->ip6_dst.s6_addr, addr_buf, 32);
+  printf(" remote ep: %s port: %u\n", addr_buf, ntohs(tcph->dstport));
+  printf(" tcp seqno: %u ackno: %u\n", ntohl(tcph->seqno), ntohl(tcph->ackno));
+}
+#endif
+
+static struct tcplib_sock *conn_lookup(struct ip6_hdr *iph, 
+                                       struct tcp_hdr *tcph) {
+  struct tcplib_sock *iter;
+  //printf("looking up conns: %p %p\n", iph, tcph);
+  // print_headers(iph, tcph);
+  for (iter = conns; iter != NULL; iter = iter->next) {
+    // print_conn(iter);
+    printf("conn lport: %i\n", ntohs(iter->l_ep.sin6_port));
+    if (((memcmp(iph->ip6_dst.s6_addr, iter->l_ep.sin6_addr.s6_addr, 16) == 0) ||
+         isInaddrAny(&iter->l_ep.sin6_addr)) &&
+        tcph->dstport == iter->l_ep.sin6_port &&
+        (iter->r_ep.sin6_port == 0 ||
+         (memcmp(&iph->ip6_src, &iter->r_ep.sin6_addr, 16) == 0 &&
+          tcph->srcport == iter->r_ep.sin6_port)))
+      return iter;
+  }
+  return NULL;
+}
+
+static int conn_checkport(uint16_t port) {
+  struct tcplib_sock *iter;
+
+  for (iter = conns; iter != NULL; iter = iter->next) {
+    if (iter->l_ep.sin6_port == port)
+      return -1;
+  }
+  return 0;
+}
+
+struct tcp_hdr *find_tcp_hdr(struct ip6_packet *msg) {
+  if (msg->ip6_hdr.ip6_nxt == IANA_TCP) {
+    return (struct tcp_hdr *)msg->ip6_data->iov_base;
+  }
+  return NULL;
+}
+
+static struct ip6_packet *get_ipmsg(int plen) {
+  int alen = sizeof(struct ip6_packet) + sizeof(struct tcp_hdr) + 
+    sizeof(struct ip_iovec) + plen;
+  char *buf = ip_malloc(alen);
+  struct ip6_packet *msg = (struct ip6_packet *)buf;
+  struct ip_iovec *iov = (struct ip_iovec *)(buf + alen - sizeof(struct ip_iovec));
+
+  if (buf == NULL) return NULL;
+  memset(msg, 0, sizeof(struct ip6_packet) + sizeof(struct tcp_hdr));
+  msg->ip6_hdr.ip6_nxt = IANA_TCP;
+  msg->ip6_hdr.ip6_plen = htons(sizeof(struct tcp_hdr) + plen);
+
+  msg->ip6_data = iov;
+  iov->iov_next = NULL;
+  iov->iov_len = plen + sizeof(struct tcp_hdr);
+  iov->iov_base = (void *)(msg + 1);
+
+  return msg;
+}
+
+static void __tcplib_send(struct tcplib_sock *sock,
+                          struct ip6_packet *msg) {
+  struct tcp_hdr *tcph = find_tcp_hdr(msg);
+  if (tcph == NULL) return;
+  memcpy(&msg->ip6_hdr.ip6_dst, &sock->r_ep.sin6_addr, 16);
+
+  sock->flags &= ~TCP_ACKPENDING;
+  // sock->ackno = ntohl(tcph->ackno);
+
+  printf("srcprt: %hu dstprt: %hu\n", ntohs(sock->l_ep.sin6_port), 
+         ntohs(sock->r_ep.sin6_port));
+
+  tcph->srcport = sock->l_ep.sin6_port;
+  tcph->dstport = sock->r_ep.sin6_port;
+  tcph->offset = sizeof(struct tcp_hdr) * 4;
+  tcph->window = htons(sock->my_wind);
+  tcph->chksum = 0;
+  tcph->urgent = 0;
+
+  tcplib_send_out(msg, tcph);
+}
+
+static void tcplib_send_ack(struct tcplib_sock *sock, int fin_seqno, uint8_t flags) {
+  struct ip6_packet *msg = get_ipmsg(0);
+  printf("sending ACK\n");
+      
+  if (msg != NULL) {
+    struct tcp_hdr *tcp_rep = (struct tcp_hdr *)(msg + 1);
+    tcp_rep->flags = flags;
+
+
+    tcp_rep->seqno = htonl(sock->seqno);
+    tcp_rep->ackno = htonl(sock->ackno +
+                           (fin_seqno ? 1 : 0));
+    printf("sending ACK seqno: %u ackno: %u\n", ntohl(tcp_rep->seqno), ntohl(tcp_rep->ackno));
+    __tcplib_send(sock, msg);
+    ip_free(msg);
+  } else {
+    printf("Could not send ack-- no memory!\n");
+  }
+}
+
+static void tcplib_send_rst(struct ip6_hdr *iph, struct tcp_hdr *tcph) {
+  struct ip6_packet *msg = get_ipmsg(0);
+      
+  if (msg != NULL) {
+    struct tcp_hdr *tcp_rep = (struct tcp_hdr *)(msg + 1);
+
+    memcpy(&msg->ip6_hdr.ip6_dst, &iph->ip6_src, 16);
+
+    tcp_rep->flags = TCP_FLAG_RST | TCP_FLAG_ACK;
+
+    tcp_rep->ackno = htonl(ntohl(tcph->seqno) + 1);
+    tcp_rep->seqno = tcph->ackno;;
+
+    tcp_rep->srcport = tcph->dstport;
+    tcp_rep->dstport = tcph->srcport;
+    tcp_rep->offset = sizeof(struct tcp_hdr) * 4;
+    tcp_rep->window = 0;
+    tcp_rep->chksum = 0;
+    tcp_rep->urgent = 0;
+
+    tcplib_send_out(msg, tcp_rep);
+
+    ip_free(msg);
+    
+  }  
+}
+
+/* send all the data in the tx buffer, starting at sseqno */
+static int tcplib_output(struct tcplib_sock *sock, uint32_t sseqno) {
+  // the output size is the minimum of the advertised window and the
+  // conjestion window.  of course, if we have less data we send even
+  // less.
+  int seg_size = min(sock->seqno - sseqno, sock->r_wind);
+  printf("r_wind: %i\n", sock->r_wind);
+  seg_size = min(seg_size, sock->cwnd);
+  while (seg_size > 0 && sock->seqno > sseqno) {
+    // printf("sending seg_size: %i\n", seg_size);
+    struct ip6_packet *msg = get_ipmsg(seg_size);
+    struct tcp_hdr *tcph;
+    uint8_t *data;
+    if (msg == NULL) return -1;
+    tcph = (struct tcp_hdr *)(msg + 1);
+    data = (uint8_t *)(tcph + 1);
+
+    tcph->flags = TCP_FLAG_ACK;
+    tcph->seqno = htonl(sseqno);
+    tcph->ackno = htonl(sock->ackno);
+
+    printf("tcplib_output: seqno: %u ackno: %u len: %i headno: %u\n",
+           ntohl(tcph->seqno), ntohl(tcph->ackno), seg_size,
+           circ_get_seqno(sock->tx_buf));
+
+    if (seg_size != circ_buf_read(sock->tx_buf, sseqno, data, seg_size)) {
+      printf("WARN: circ could not read!\n");
+    }
+    __tcplib_send(sock, msg);
+    ip_free(msg);
+
+    sseqno += seg_size;
+    seg_size = min(sock->seqno - sseqno, sock->mss);
+  }
+  return 0;
+}
+
+int tcplib_init_sock(struct tcplib_sock *sock) {
+  memset(sock, 0, sizeof(struct tcplib_sock) - sizeof(struct tcplib_sock *));
+  sock->mss = 200;
+  sock->my_wind = 200;
+  sock->cwnd = ONE_SEGMENT(sock);
+  sock->ssthresh = 0xffff;
+  conn_add_once(sock);
+  return 0;
+}
+
+/* called when a new segment arrives. */
+/* deliver as much data to the app as possible, and update the ack
+ * number of the socket to reflect how much was delivered 
+ */
+static int receive_data(struct tcplib_sock *sock, struct tcp_hdr *tcph, int len) {
+  uint8_t *ptr;
+  int payload_len;
+
+  ptr = ((uint8_t *)tcph) + (tcph->offset / 4);
+  payload_len = len - (tcph->offset / 4);
+  sock->ackno = ntohl(tcph->seqno) + payload_len;
+
+  if (payload_len > 0) {
+    tcplib_extern_recv(sock, ptr, payload_len);
+  }
+  return payload_len;
+}
+
+static void reset_ssthresh(struct tcplib_sock *conn) {
+  uint16_t new_ssthresh = min(conn->cwnd, conn->r_wind) / 2;
+  if (new_ssthresh < 2 * ONE_SEGMENT(conn))
+    new_ssthresh = 2 * ONE_SEGMENT(conn);
+  conn->ssthresh = new_ssthresh;
+}
+
+int tcplib_process(struct ip6_hdr *iph, void *payload) {
+  int rc = 0;
+  struct tcp_hdr *tcph;
+  struct tcplib_sock *this_conn;
+  //   uint8_t *ptr;
+  int len = ntohs(iph->ip6_plen) + sizeof(struct ip6_hdr);
+  int payload_len;
+  uint32_t hdr_seqno, hdr_ackno;
+  int connect_done = 0;
+
+  tcph = (struct tcp_hdr *)payload;
+  payload_len = len - sizeof(struct ip6_hdr) - (tcph->offset / 4);
+
+  /* if there's no local */
+  this_conn = conn_lookup(iph, tcph);
+  // printf("conn: %p\n", this_conn);
+  if (this_conn != NULL) {
+    hdr_seqno = ntohl(tcph->seqno);
+    hdr_ackno = ntohl(tcph->ackno);
+
+    if (tcph->flags & TCP_FLAG_RST) {
+      /* Really hose this connection if we get a RST packet.
+       * still TODO: RST generation for unbound ports */
+      printf("connection reset by peer\n");
+          
+      tcplib_extern_closedone(this_conn);
+      // tcplib_init_sock(this_conn);
+      return 0;
+    }
+    // always get window updates from new segments
+    // TODO : this should be after we detect out-of-sequence ACK
+    // numbers!
+    this_conn->r_wind = ntohs(tcph->window);
+    printf("State: %i\n", this_conn->state);
+
+    switch (this_conn->state) {
+    case TCP_LAST_ACK:
+      if (tcph->flags & TCP_FLAG_ACK && 
+          hdr_ackno == this_conn->seqno + 1) {
+
+        this_conn->state = TCP_CLOSED;
+        tcplib_extern_closedone(this_conn);
+        break;
+      }
+    case TCP_FIN_WAIT_1:
+      printf("IN FIN_WAIT_1, %i\n", (tcph->flags & TCP_FLAG_FIN));
+      if (tcph->flags & TCP_FLAG_ACK && 
+          hdr_ackno == this_conn->seqno + 1) {
+        if (tcph->flags & TCP_FLAG_FIN) {
+          this_conn->seqno++;
+          this_conn->state = TCP_TIME_WAIT;
+          
+          // the TIME_WAIT state is problematic, since it holds up the
+          // resources while we're in it...
+          this_conn->timer.retx = TCPLIB_TIMEWAIT_LEN;
+        } else {
+          this_conn->timer.retx = TCPLIB_2MSL;
+          this_conn->state = TCP_FIN_WAIT_2;
+        }
+      }
+      // this generate the ACK we need here
+      goto ESTABLISHED;
+    case TCP_FIN_WAIT_2:
+      if (tcph->flags & TCP_FLAG_FIN) {
+        this_conn->seqno++;
+        this_conn->state = TCP_TIME_WAIT;
+        
+        this_conn->timer.retx = TCPLIB_TIMEWAIT_LEN;
+        tcplib_send_ack(this_conn, 0, TCP_FLAG_ACK);
+      }
+      break;
+
+    case TCP_SYN_SENT:
+      if (tcph->flags & (TCP_FLAG_SYN | TCP_FLAG_ACK)) {
+        // got a syn-ack
+        // send the ACK this_conn
+        this_conn->state = TCP_ESTABLISHED;
+        this_conn->ackno = hdr_seqno + 1;
+        connect_done = 1;
+        // skip the LISTEN processing
+        // this will also generate an ACK
+        goto ESTABLISHED;
+      } else if (tcph->flags & TCP_FLAG_SYN) {
+        // otherwise the state machine says we're in a simultaneous open, so continue doen
+        this_conn->state = TCP_SYN_RCVD;
+        connect_done = 1;
+      } else {
+        printf("sending RST on bad data in state SYN_SENT\n");
+        // we'll just let the timeout eventually close the socket, though
+        tcplib_send_rst(iph, tcph);
+        break;
+      }
+    case TCP_SYN_RCVD:
+    case TCP_LISTEN:
+      /* not connected. */
+      if (tcph->flags & TCP_FLAG_SYN) {
+        struct tcplib_sock *new_sock;
+
+        if (this_conn->state == TCP_LISTEN) {
+          memcpy(&this_conn->r_ep.sin6_addr, &iph->ip6_src, 16);
+          this_conn->r_ep.sin6_port = tcph->srcport;
+          new_sock = tcplib_accept(this_conn, &this_conn->r_ep);
+          if (new_sock != this_conn) {
+            memset(this_conn->r_ep.sin6_addr.s6_addr, 0, 16);
+            this_conn->r_ep.sin6_port = 0;
+            if (new_sock != NULL) {
+              memcpy(&new_sock->r_ep.sin6_addr, &iph->ip6_src, 16);
+              new_sock->r_ep.sin6_port = tcph->srcport;
+              conn_add_once(new_sock);
+            }
+          }
+          if (new_sock == NULL) {
+            tcplib_send_rst(iph, tcph);
+            break;
+          }
+          memcpy(&new_sock->l_ep.sin6_addr, &iph->ip6_dst, 16);
+          new_sock->l_ep.sin6_port = tcph->dstport;
+
+          new_sock->ackno = hdr_seqno + 1;
+          circ_buf_init(new_sock->tx_buf, new_sock->tx_buf_len,
+                        0xcafebabe + 1);
+        } else {
+          /* recieved a SYN retransmission. */
+          new_sock = this_conn;
+        }
+
+        if (new_sock != NULL) {
+          new_sock->seqno = 0xcafebabe + 1;
+          new_sock->state = TCP_SYN_RCVD;
+          tcplib_send_ack(new_sock, 0, TCP_FLAG_ACK | TCP_FLAG_SYN);
+          new_sock->seqno++;
+        } else {
+          memset(&this_conn->r_ep, 0, sizeof(struct sockaddr_in6));
+        }
+      } else if (this_conn->state == TCP_LISTEN) {
+        tcplib_send_rst(iph, tcph);
+        break;
+      }
+      /* this is SYN_RECVd */
+      if (tcph->flags & TCP_FLAG_ACK) {
+        this_conn->state = TCP_ESTABLISHED;
+      } 
+      /* fall through to handle any data. */
+      
+
+    case TCP_CLOSE_WAIT:
+    case TCP_ESTABLISHED:
+    ESTABLISHED:
+
+      /* ack any data in this packet */
+      if (this_conn->state == TCP_ESTABLISHED || this_conn->state == TCP_FIN_WAIT_1) {
+        if (payload_len > 0) {
+          if ((this_conn->flags & TCP_ACKPENDING) == TCP_ACKPENDING) {
+            // printf("Incr would overflow\n");
+          }
+          this_conn->flags ++;
+        }
+
+
+        // receive side sequence check and add data
+        printf("seqno: %u ackno: %u\n", hdr_seqno, hdr_ackno);
+        printf("conn seqno: %u ackno: %u\n", this_conn->seqno, this_conn->ackno);
+
+
+        // send side recieve sequence check and congestion window updates.
+        if (hdr_ackno > circ_get_seqno(this_conn->tx_buf)) {
+          // new data is being ACKed
+          // or we haven't sent anything new
+          if (this_conn->cwnd <= this_conn->ssthresh) {
+            // in slow start; increase the cwnd by one segment
+            this_conn->cwnd += ONE_SEGMENT(this_conn);
+            // printf("in slow start\n");
+          } else {
+            // in congestion avoidance
+            this_conn->cwnd += (ONE_SEGMENT(this_conn) * ONE_SEGMENT(this_conn)) / this_conn->cwnd;
+            // printf("in congestion avoidence\n");
+          }
+          // printf("ACK new data: cwnd: %i ssthresh: %i\n", this_conn->cwnd, this_conn->ssthresh);
+          // reset the duplicate ack counter
+          UNSET_ACK_COUNT(this_conn->flags);
+          // truncates the ack buffer 
+          circ_shorten_head(this_conn->tx_buf, hdr_ackno);
+          // printf("ack_count: %i\n", GET_ACK_COUNT(this_conn->flags));
+
+          if (this_conn->seqno == hdr_ackno) {
+            tcplib_extern_acked(this_conn);
+          }
+        } else if (this_conn->seqno > circ_get_seqno(this_conn->tx_buf)) {
+          // this is a duplicate ACK
+          //  - increase the counter of the number of duplicate ACKs
+          //  - if we get to three duplicate ACK's, start resending at
+          //    the ACK number because this probably means we lost a segment
+
+          INCR_ACK_COUNT(this_conn->flags);
+          // printf("ack_count: %i\n", GET_ACK_COUNT(this_conn->flags));
+          // printf("dup ack count: %i\n", GET_ACK_COUNT(this_conn->flags));
+          // a "dup ack count" of 2 is really 3 total acks because we start with zero
+          if (GET_ACK_COUNT(this_conn->flags) == 2) {
+            UNSET_ACK_COUNT(this_conn->flags);
+            printf("detected multiple duplicate ACKs-- doing fast retransmit [%u, %u]\n",
+                   circ_get_seqno(this_conn->tx_buf),
+                   this_conn->seqno);
+
+            // this is our detection of a "duplicate ack" event.
+            // we are going to reset ssthresh and retransmit the data.
+            reset_ssthresh(this_conn);
+            tcplib_output(this_conn, circ_get_seqno(this_conn->tx_buf));
+            this_conn->timer.retx = 6;
+            
+          }
+        }
+
+        if (hdr_seqno != this_conn->ackno) {
+          printf("==> received forward segment\n");
+          if ((hdr_seqno > this_conn->ackno + this_conn->my_wind) ||
+              (hdr_seqno < this_conn->ackno - this_conn->my_wind)) {
+            // send a RST on really wild data 
+            tcplib_send_rst(iph, tcph);
+          } else {
+            tcplib_send_ack(this_conn, 0, TCP_FLAG_ACK);
+            this_conn->flags |= TCP_ACKSENT;
+          }
+        } else { // (hdr_seqno == this_conn->ackno) {
+          printf("receive data [%i]\n", len - sizeof(struct ip6_hdr));
+
+          if (receive_data(this_conn, tcph, len - sizeof(struct ip6_hdr)) > 0 &&
+              this_conn->flags & TCP_ACKSENT) {
+            this_conn->flags &= ~TCP_ACKSENT;
+            tcplib_send_ack(this_conn, 0, TCP_FLAG_ACK);
+          }
+        }
+
+        // reset the retransmission timer
+        if (this_conn->timer.retx == 0)
+          this_conn->timer.retx = 6;
+      }
+
+      if (connect_done && !(this_conn->flags & TCP_CONNECTDONE)) {
+        this_conn->flags |= TCP_CONNECTDONE;
+        tcplib_extern_connectdone(this_conn, 0);
+      }
+
+    case TCP_TIME_WAIT:
+      if ((payload_len > 0 && (this_conn->flags & TCP_ACKPENDING) >= 1) 
+          || tcph->flags & TCP_FLAG_FIN) {
+        tcplib_send_ack(this_conn, (payload_len == 0 && (tcph->flags & TCP_FLAG_FIN)), TCP_FLAG_ACK);
+        /* only close the connection if we've gotten all the data */
+        if (this_conn->state == TCP_ESTABLISHED 
+            && (tcph->flags & TCP_FLAG_FIN)
+            && hdr_seqno  == this_conn->ackno) {
+          this_conn->state = TCP_CLOSE_WAIT;
+          tcplib_extern_closed(this_conn);
+        }
+      }
+      break;
+    case TCP_CLOSED:
+    default:
+      rc = -1;
+      // printf("sending RST\n");
+      // tcplib_send_ack(this_conn, 0, TCP_FLAG_ACK | TCP_FLAG_RST);
+    }
+  } else {
+    /* this_conn was NULL */
+    /* interestingly, TCP sends a RST on this condition, not an ICMP error.  go figure. */
+    printf("sending rst on missing connection\n");
+    tcplib_send_rst(iph, tcph);
+
+  }
+  return rc;
+}
+
+
+/* bind the socket to a local address */
+int tcplib_bind(struct tcplib_sock *sock,
+                struct sockaddr_in6 *addr) {
+  /* not using an already-bound port */
+  /* TODO : SDH : check local address */
+  if (conn_checkport(addr->sin6_port))
+    return -1;
+  
+  memcpy(&sock->l_ep, addr, sizeof(struct sockaddr_in6));
+  /* passive open */
+  sock->state = TCP_LISTEN;
+  return 0;
+}
+
+/* connect the socket to a remote endpoint */
+int tcplib_connect(struct tcplib_sock *sock,
+                   struct sockaddr_in6 *serv_addr) {
+  if (sock->tx_buf == NULL)
+    return -1;
+
+  switch (sock->state) {
+  case TCP_CLOSED:
+    // passive open; need to set up the local endpoint.
+    memset(&sock->l_ep, 0, sizeof(struct sockaddr_in6));
+    sock->l_ep.sin6_port = htons(alloc_local_port());
+    break;
+  case TCP_LISTEN:
+    // we got here by calling bind, so we're cool.
+    break;
+  default:
+    return -1;
+  }
+  circ_buf_init(sock->tx_buf, sock->tx_buf_len,
+                0xcafebabe + 1);
+
+  sock->ackno = 0;
+  sock->seqno = 0xcafebabe;
+  memcpy(&sock->r_ep, serv_addr, sizeof(struct sockaddr_in6));
+  tcplib_send_ack(sock, 0, TCP_FLAG_SYN);
+  sock->state = TCP_SYN_SENT;
+  sock->seqno++;
+  sock->timer.retx = 6;
+
+  return 0;
+}
+
+
+int tcplib_send(struct tcplib_sock *sock, void *data, int len) {
+  /* have enough tx buffer left? */
+  if (sock->state != TCP_ESTABLISHED)
+    return -1;
+  if (sock->seqno - circ_get_seqno(sock->tx_buf) + len > sock->tx_buf_len) // circ_get_window(sock->tx_buf))
+    return -1;
+  if (circ_buf_write(sock->tx_buf, sock->seqno, data, len) < 0)
+    return -1;
+
+  sock->seqno += len;
+  // printf("tcplib_output from send\n");
+  // tcplib_output(sock, sock->seqno - len);
+
+  // this will let multiple calls to send() get combined into a single packet
+  // the data will be sent out next time the timer fires
+  sock->timer.retx = 1;
+  
+  // 3 seconds
+  //if (sock->timer.retx == 0)
+  //sock->timer.retx = 6;
+
+  return 0;
+}
+
+void tcplib_retx_expire(struct tcplib_sock *sock) {
+  // printf("retransmission timer expired!\n");
+  sock->retxcnt++;
+  switch (sock->state) {
+  case TCP_ESTABLISHED:
+    if (circ_get_seqno(sock->tx_buf) != sock->seqno) {
+      printf("retransmitting [%u, %u]\n", circ_get_seqno(sock->tx_buf),
+             sock->seqno);
+      reset_ssthresh(sock);
+      // restart slow start
+      sock->cwnd = ONE_SEGMENT(sock);
+      // printf("tcplib_output from timer\n");
+      tcplib_output(sock, circ_get_seqno(sock->tx_buf));
+      sock->timer.retx = 6;
+    } else {
+      sock->retxcnt--;
+    }
+    break;
+  case TCP_SYN_SENT:
+    tcplib_send_ack(sock, 0, TCP_FLAG_SYN);
+    sock->timer.retx = 6;
+    break;
+  case TCP_LAST_ACK:
+  case TCP_FIN_WAIT_1:
+    tcplib_send_ack(sock, 1, TCP_FLAG_ACK | TCP_FLAG_FIN);
+    sock->timer.retx = TCPLIB_2MSL;
+    break;
+  case TCP_FIN_WAIT_2:
+  case TCP_TIME_WAIT:
+    sock->state = TCP_CLOSED;
+    // exit TIME_WAIT
+    tcplib_extern_closedone(sock);
+    break;
+  default:
+    break;
+  }
+
+  /* if we've hit this timer a lot, give up
+   *
+   * do this by going into
+   * TIME_WAIT, which will generate a FIN if anyone sends to us but
+   * otherwise just do nothing.
+   *
+   * we don't do something like try to close it here, since we might
+   * have gotten here from doing that.
+   */
+  if (sock->retxcnt > TCPLIB_GIVEUP) {
+    sock->state = TCP_TIME_WAIT;
+    sock->timer.retx = TCPLIB_TIMEWAIT_LEN;
+   }
+}
+
+int tcplib_abort(struct tcplib_sock *sock) {
+  switch (sock->state) {
+    // nothing to abort
+  case TCP_CLOSED:
+  case TCP_LISTEN:
+    break;
+  default:
+    tcplib_send_ack(sock, 0, TCP_FLAG_RST);
+    memset(&sock->l_ep, 0, sizeof(struct sockaddr_in6));
+    memset(&sock->r_ep, 0, sizeof(struct sockaddr_in6));
+    sock->state = TCP_CLOSED;
+  }
+  return 0;
+}
+
+int tcplib_close(struct tcplib_sock *sock) {
+  int rc = 0;
+
+  switch (sock->state) {
+    /* passive close */
+  case TCP_CLOSE_WAIT:
+    tcplib_send_ack(sock, 1, TCP_FLAG_ACK | TCP_FLAG_FIN);
+    sock->timer.retx = 6;
+    sock->state = TCP_LAST_ACK;
+    break;
+    /* active close */
+  case TCP_ESTABLISHED:
+    // kick off the close
+    tcplib_send_ack(sock, 0, TCP_FLAG_ACK | TCP_FLAG_FIN);
+    sock->timer.retx = TCPLIB_2MSL;
+    sock->state = TCP_FIN_WAIT_1;
+    break;
+  case TCP_SYN_SENT:
+    sock->state = TCP_CLOSED;
+    break;
+  default:
+    /* this is meaningless in other states */
+    rc = -1;
+  }
+  return rc;
+}
+
+int tcplib_timer_process() {
+  struct tcplib_sock *iter;
+  for (iter = conns; iter != NULL; iter = iter->next) {
+    if (iter->timer.retx > 0 && (--iter->timer.retx) == 0)
+      tcplib_retx_expire(iter);
+    if ((iter->flags & TCP_ACKPENDING) >= 2) {
+      tcplib_send_ack(iter, 0, TCP_FLAG_ACK);
+    }
+  }
+  return 0;
+}
diff --git a/support/sdk/c/blip/libtcp/tcplib.h b/support/sdk/c/blip/libtcp/tcplib.h
new file mode 100644
index 00000000..9e27c5c5
--- /dev/null
+++ b/support/sdk/c/blip/libtcp/tcplib.h
@@ -0,0 +1,207 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef TCPLIB_H_
+#define TCPLIB_H_
+
+/* 
+ * tcplib: a simple tcp implemented in a library
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ *
+ *
+ */
+
+// #include <netinet/in.h>
+#include "ip.h"
+
+#define min(X,Y) (((X) > (Y)) ? (Y) : (X))
+#ifndef PC
+#define printf(X, args ...) dbg("stdout", X, ## args)
+#define fprintf(X, Y, args ...) dbg("fprintf", Y, ## args)
+#endif
+
+typedef enum {
+  TCP_CLOSED = 0,
+  TCP_LISTEN,
+  TCP_SYN_RCVD,
+  TCP_SYN_SENT,
+  TCP_ESTABLISHED,
+  TCP_CLOSE_WAIT,
+  TCP_LAST_ACK,
+  TCP_FIN_WAIT_1,
+  TCP_FIN_WAIT_2,
+  TCP_CLOSING,
+  TCP_TIME_WAIT,
+} tcplib_sock_state_t;
+
+enum {
+  TCP_ACKPENDING  = 0x3,
+  TCP_DUPACKS     = 0x3c,
+  TCP_DUPACKS_OFF = 2,
+  TCP_CONNECTDONE = 0x40,
+  TCP_ACKSENT     = 0x80,
+};
+
+enum {
+  /* how many timer tics to stay in TIME_WAIT */
+  TCPLIB_TIMEWAIT_LEN = 1,
+  TCPLIB_2MSL = 4,
+  /* how many un-acked retransmissions before we give up the connection */
+  TCPLIB_GIVEUP = 6,
+};
+
+#define GET_ACK_COUNT(X)    (((X) & TCP_DUPACKS) >> TCP_DUPACKS_OFF)
+#define UNSET_ACK_COUNT(X)  ((X) &= ~TCP_DUPACKS)
+#define INCR_ACK_COUNT(X)   ((X) += 1 << TCP_DUPACKS_OFF)
+
+struct tcplib_sock {
+  uint8_t flags;
+  
+  /* local and remote endpoints */
+  struct sockaddr_in6 l_ep;
+  struct sockaddr_in6 r_ep;
+
+  /* current connection state */
+  tcplib_sock_state_t state;
+
+  void    *tx_buf;
+  int tx_buf_len;
+
+  /* max segment size, or default if
+     we didn't bother to pull it out
+     of the options field */
+  uint16_t mss;
+
+  uint16_t my_wind;
+  /* the window the other end is
+     reporting */
+  uint16_t r_wind;
+  uint16_t cwnd;
+  uint16_t ssthresh;
+
+  // the current next sequence number for ourgoing data.
+  uint32_t seqno;
+  // and the index of the last byte we've ACKed
+  uint32_t ackno;
+
+  struct {
+    int8_t retx;
+  } timer;
+
+  /* retransmission counter */
+  uint16_t retxcnt;
+
+  /* callbacks for this connection */
+/*   struct { */
+/*     /\* a previous connection request has finished *\/ */
+/*     void (*connect_done)(struct tcplib_sock *sock, int error); */
+
+/*     /\* a callback to signal new data is ready *\/ */
+/*     void (*recvfrom)(struct tcplib_sock *sock, void *data, int len); */
+
+/*     /\* the connection was closed by the other party *\/ */
+/*     void (*closed)(struct tcplib_sock *sock); */
+
+/*     /\* you called close(); we've finished closing the socket. *\/ */
+/*     void (*close_done)(struct tcplib_sock *sock); */
+/*   } ops; */
+
+  /* this needs to be at the end so
+     we can call init() on a socket
+     without blowing away the linked
+     list */
+  struct tcplib_sock *next;
+};
+
+/* EVENTS 
+ * ------------------------------------------------------------ 
+ *
+ * calls generated by tcplib that must be dealt with elsewhere in the
+ * program.
+ */
+
+
+/* called when a new connection request is recieved on a socket which
+ * is LISTENing.
+ *
+ *
+ * return 0 if it wants to accept the connection and allocated a
+ * buffer for it; -1 otherwise.
+ */
+struct tcplib_sock *tcplib_accept(struct tcplib_sock *conn,
+                                  struct sockaddr_in6 *from);
+
+/* a call-out point for tcplib to send a message */
+void tcplib_send_out(struct ip6_packet *pkt, struct tcp_hdr *tcph);
+
+/* upcall for new data; may be dispatched all the way out to a
+ * handler. 
+ *
+ * Returns: 0 on success,
+ * -1 otherwise.  The error may be safely ignored.
+ */
+int tcplib_process(struct ip6_hdr *ip_packet, void *payload);  
+
+/*
+ * should be called every 500ms to increment all the tcp timers
+ */
+int tcplib_timer_process();
+
+/* Just fill in the fields of the socket.
+ *
+ * If you perform a send on a socket in this state, an ephemeral port
+ * will be allocated to it.
+ *
+ * This must be called once on any socket that might be sent on, or
+ * might have bind() called.
+ */
+int tcplib_init_sock(struct tcplib_sock *sock);
+
+/* bind the socket to a local address */
+int tcplib_bind(struct tcplib_sock *sock,
+                struct sockaddr_in6 *addr);
+
+/* connect the socket to a remote endpoint */
+int tcplib_connect(struct tcplib_sock *sock,
+                   struct sockaddr_in6 *serv_addr);
+
+
+/* send data on an open socket.
+ *
+ * returns: 0 on success
+ *   other errors
+ *     - no local buffer is available,
+ *     
+ */
+int tcplib_send(struct tcplib_sock *sock,
+                 void *data, int len);
+
+int tcplib_close(struct tcplib_sock *sock);
+
+/* abort a connection 
+ *
+ * This will send a RST segment if the connection has been opened and
+ * immediately return the socket to the CLOSED, uninitialized state,
+ * although buffer pointers are maintained.
+ *
+ */
+int tcplib_abort(struct tcplib_sock *sock);
+#endif
diff --git a/support/sdk/c/blip/libtcp/test_circ.c b/support/sdk/c/blip/libtcp/test_circ.c
new file mode 100644
index 00000000..a8a6edd7
--- /dev/null
+++ b/support/sdk/c/blip/libtcp/test_circ.c
@@ -0,0 +1,124 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include "circ.h"
+
+/* void do_head_read(void *buf) { */
+/*   char *read_data; */
+/*   int i, data_len; */
+/*   data_len = circ_buf_read_head(buf, (void **)&read_data); */
+/*   printf("buf_read_head: %i\n", data_len); */
+/*   for (i = 0; i < data_len; i++) */
+/*     putc(((char *)read_data)[i], stdout); */
+/*   putc('\n', stdout); */
+/* } */
+
+void do_read(void *buf, uint32_t sseqno) {
+  char data[20];
+  int data_len, i;
+  data_len = circ_buf_read(buf, sseqno, data, 20);
+
+  printf("buf_read: %i\n", data_len);
+  for (i = 0; i < data_len; i++)
+    putc(((char *)data)[i], stdout);
+  putc('\n', stdout);
+
+}
+
+int main(int argc, char **argv) {
+  char buf[200];
+  char data[20], readbuf[30];
+  int i = 20, data_len;
+  char *read_data;
+  memset(buf, 0, sizeof(buf));
+
+  if (circ_buf_init(buf, 200, 0) < 0)
+    printf("cir_buf_init: error\n");
+
+  for (i=0;i<20;i++)
+    data[i] = 'a' + i;
+
+  if (circ_buf_write(buf, 0, data, 20) < 0)
+    printf("circ_buf_write: error\n");
+
+  circ_buf_dump(buf);
+
+  if (circ_buf_write(buf, 10, data, 20) < 0)
+    printf("circ_buf_write: error\n");
+
+  circ_buf_dump(buf);
+
+
+  if (circ_buf_write(buf, 50, data, 20) < 0)
+    printf("circ_buf_write: error\n");
+
+  // circ_buf_dump(buf);
+
+  // do_head_read(buf);
+  // circ_buf_dump(buf);
+
+  if (circ_buf_write(buf, 30, data, 20) < 0)
+    printf("circ_buf_write: error\n");
+
+  // circ_buf_dump(buf);
+
+  if (circ_buf_write(buf, 70, data, 20) < 0)
+    printf("circ_buf_write: error\n");
+
+  circ_buf_dump(buf);
+
+  circ_shorten_head(buf, 10);
+  circ_buf_dump(buf);
+
+  memset(buf, 0, sizeof(buf));
+
+  if (circ_buf_init(buf, 200, 0) < 0)
+    printf("cir_buf_init: error\n");
+
+  printf("\n\nRESTART\n\n");
+  
+  for (i = 0; i < 25; i++) {
+    circ_buf_write(buf, i * 20, data, 20);
+    do_read(buf, i * 20);
+    circ_shorten_head(buf, (i > 0) ? (i - 1) * 20 : 0 * 10);
+    circ_buf_dump(buf);
+  }
+
+  // do_read(buf, 50);
+
+/*   do_head_read(buf); */
+/*   circ_buf_dump(buf); */
+
+/*   if (circ_buf_write(buf, 90, data, 20) < 0) */
+/*     printf("circ_buf_write: error\n"); */
+/*   if (circ_buf_write(buf, 110, data, 20) < 0) */
+/*     printf("circ_buf_write: error\n"); */
+/*   if (circ_buf_write(buf, 130, data, 20) < 0) */
+/*     printf("circ_buf_write: error\n"); */
+
+/*   circ_buf_dump(buf); */
+/*   do_head_read(buf); */
+/*   do_head_read(buf); */
+/*   circ_buf_dump(buf); */
+}
diff --git a/support/sdk/c/blip/libtcp/test_server.c b/support/sdk/c/blip/libtcp/test_server.c
new file mode 100644
index 00000000..418d1647
--- /dev/null
+++ b/support/sdk/c/blip/libtcp/test_server.c
@@ -0,0 +1,225 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+#include <stdlib.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdio.h>
+#include <sys/select.h>
+#include <sys/socket.h>
+#include <netinet/in.h>
+#include <linux/if.h>
+#include <signal.h>
+#include <string.h>
+#include <limits.h>
+
+
+#include "ip.h"
+#include "tcplib.h"
+#include "tun_dev.h"
+#include "ip_malloc.h"
+
+
+#define BUFSZ 1000
+#define LOSS_RATE_RECPR 200
+#define LOSS_RATE_TRANS 200
+
+int sock = 0;
+struct in6_addr iface_addr[16] = {{{0x20, 0x05, 0x00, 0x00, 0x00, 0x0, 0x00, 0x00,
+                                    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01}}};
+struct sockaddr_in6 laddr;
+
+
+void printBuf(uint8_t *buf, uint16_t len) {
+  int i;
+  // print("len: %i: ", len);
+  for (i = 1; i <= len; i++) {
+    printf(" 0x%02x", buf[i-1]);
+    // if (i % 16 == 0) printf("\n");
+  }
+  printf("\n");
+}
+
+void print_split_msg(struct split_ip_msg *msg) {
+  int i;
+  printf("src_addr: ");
+  for (i = 0; i < 16; i++) printf("0x%x ", msg->hdr.ip6_src.s6_addr[i]);
+  printf("\ndst_addr: ");
+  for (i = 0; i < 16; i++) printf("0x%x ", msg->hdr.ip6_dst.s6_addr[i]);
+  printf("\nplen: %i hlim: %i\n", ntohs(msg->hdr.plen), msg->hdr.hlim);
+
+  printBuf(msg->data, msg->data_len);
+}
+
+void tcplib_extern_recv(struct tcplib_sock *sock, void *data, int len) {
+  // printBuf(data, len);
+  if (tcplib_send(sock, data, len) < 0)
+    printf("tcplib_send: fail\n");
+
+  if (strncmp((char *)data, "close", 5) == 0) {
+    printf("Server closing sock\n");
+    tcplib_close(sock);
+  }
+}
+
+void tcplib_extern_closed(struct tcplib_sock *sock) {
+  printf("remote conn closed\n");
+  tcplib_close(sock);
+}
+
+void tcplib_extern_closedone(struct tcplib_sock *sock) {
+  printf("close done\n");
+  free(sock->tx_buf);
+  tcplib_init_sock(sock);
+/*   printf("rebinding...\n"); */
+}
+
+/* called when a new connection request is received: not 
+ *
+ * return: a tcplib_struc, with the ops table filled in and send and
+ * receive buffers allocated.
+ */
+
+struct tcplib_sock *tcplib_accept(struct tcplib_sock *conn,
+                                  struct sockaddr_in6 *from) {
+  printf("tcplib_accept\n");
+  
+  conn->tx_buf = malloc(BUFSZ);
+  conn->tx_buf_len = BUFSZ;
+
+
+  return conn;
+}
+
+void tcplib_send_out(struct split_ip_msg *msg, struct tcp_hdr *tcph) {
+  uint8_t buf[8192];
+  struct timespec tv;
+  if (sock <= 0) return;
+
+  // printf("sending message\n");
+
+  memcpy(msg->hdr.ip6_src.s6_addr, iface_addr, 16);
+  msg->hdr.ip6_src.s6_addr[15] = 2;
+  msg->hdr.hlim = 64;
+
+  memset(msg->hdr.vlfc, 0, 4);
+  msg->hdr.vlfc[0] = 6 << 4;
+
+  tcph->chksum = htons(msg_cksum(msg, IANA_TCP));
+  
+  tv.tv_sec = 0;
+  // sleep for a ms to give up the cpu...
+  tv.tv_nsec = 1000000;
+  nanosleep(&tv);
+
+  // print_split_msg(msg);
+  if (rand() % LOSS_RATE_TRANS == 0) {
+    printf("dropping packet on write\n");
+  } else {
+    printf("tun_write\n");
+    tun_write(sock, msg);
+  }
+}
+
+/* practice accepting connections and transfering data */
+int main(int argg, char **argv) {
+  char buf[8192], dev[IFNAMSIZ];
+  uint8_t *payload;
+  int len, i, flags;
+
+  ip_malloc_init();
+
+  payload = buf + sizeof(struct tun_pi);
+  dev[0] = 0;
+  if ((sock = tun_open(dev)) < 0) 
+    exit(1);
+
+  if (tun_setup(dev, iface_addr) < 0)
+    exit(1);
+
+  /* tun_setup turns on non-blocking IO.  Turn it off. */
+  flags = fcntl(sock, F_GETFL);
+  flags &= ~O_NONBLOCK;
+  fcntl(sock,F_SETFL, flags);
+
+  struct tcplib_sock srv_sock;
+  tcplib_init_sock(&srv_sock);
+  memcpy(laddr.sin6_addr.s6_addr, iface_addr, 16);
+  laddr.sin6_addr.s6_addr[15] = 2;
+  laddr.sin6_port = htons(atoi(argv[1]));
+
+  tcplib_bind(&srv_sock, &laddr);
+
+  fd_set fds;
+  struct timeval timeout;
+  FD_ZERO(&fds);
+  FD_SET(sock, &fds);
+  FD_SET(fileno(stdin), &fds);
+
+  timeout.tv_sec = 0;
+  timeout.tv_usec = 500000;
+
+  while (select(sock + 1, &fds, NULL, NULL, &timeout) >= 0) {
+    if (FD_ISSET(sock, &fds)) {
+      if ((len = read(sock, buf, 8192)) <= 0) break;
+      // printf("read %i bytes\n", len);
+      struct ip6_hdr *iph = (struct ip6_hdr *)payload;
+      if (iph->nxt_hdr == IANA_TCP) {
+        if (rand() % LOSS_RATE_RECPR == 0) {
+          printf("dropping packet on rx\n");
+        } else {
+          void *p = buf + sizeof(struct tun_pi) + sizeof(struct ip6_hdr);
+          // printBuf(p, len - sizeof(struct tun_pi) - sizeof(struct tcp_hdr));
+          if (tcplib_process(iph, p)) // len - sizeof(struct tun_pi)))
+            printf("TCPLIB_PROCESS: ERROR!\n");
+        }
+      }
+    } else if (FD_ISSET(fileno(stdin), &fds)) {
+      char c = getchar();
+      switch (c) {
+      case 'a':
+        printf("ABORTING CONNETION\n");
+        tcplib_abort(&srv_sock);
+        break;
+      case 'c':
+        printf("CLOSING CONNETION\n");
+        tcplib_close(&srv_sock);
+        break;
+      case 's':
+        printf("connection state: %i\n", srv_sock.state);
+        break;
+      }
+    } else {
+      timeout.tv_sec = 0;
+      timeout.tv_usec = 500000;
+      tcplib_timer_process();
+    }
+    if (srv_sock.state == TCP_CLOSED) {
+      tcplib_bind(&srv_sock, &laddr);
+    }
+
+    FD_ZERO(&fds);
+    FD_SET(sock, &fds);
+    FD_SET(fileno(stdin), &fds);
+  }
+  tun_close(sock, dev);
+}
diff --git a/support/sdk/c/blip/linux/dbg.c b/support/sdk/c/blip/linux/dbg.c
new file mode 100644
index 00000000..8f481bd6
--- /dev/null
+++ b/support/sdk/c/blip/linux/dbg.c
@@ -0,0 +1,82 @@
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+#include <string.h>
+#include <time.h>
+#include <sys/time.h>
+#include <stdint.h>
+extern struct timeval boot_time;
+
+struct dbg_endpoint {
+  char channel[128];
+  FILE *fp;
+  struct dbg_endpoint *next;
+};
+struct dbg_endpoint *endpoints = NULL;
+
+/* find the channel endpoint in the list of logging destinations */
+struct dbg_endpoint *get_endpoint(struct dbg_endpoint *cur, char *channel) {
+  char filename_buf[1024];
+  struct dbg_endpoint *ep;
+  for (ep = cur ? cur->next : endpoints; ep != NULL; ep = ep->next) {
+    if (strcmp(ep->channel, channel) == 0)
+      return ep;
+  }
+  if (cur == NULL) {
+    ep = malloc(sizeof(struct dbg_endpoint));
+    strcpy(ep->channel, channel);
+    snprintf(filename_buf, sizeof(filename_buf), "logs/%s", channel);
+    ep->fp = fopen(filename_buf, "a");
+    if (!ep->fp) return NULL;
+    ep->next = endpoints;
+    endpoints = ep;
+  }
+  return ep;
+}
+
+static int timestamp(FILE *fp){
+  struct timeval now, diff;
+  uint32_t tics_now;
+  gettimeofday(&now, NULL);
+  timersub(&now, &boot_time, &diff);
+
+  tics_now = (diff.tv_usec * 1024) / 1e6;
+  tics_now += diff.tv_sec * 1024;
+
+  fprintf(fp, "%u [%lu.%.06lu]: ", tics_now, diff.tv_sec, diff.tv_usec);
+  return 0;
+}
+
+void linux_dbg(char *channel, const char *fmt, ...) {
+  struct dbg_endpoint *ep = NULL;
+  va_list ap;
+  va_start(ap, fmt);
+  while ((ep = get_endpoint(ep, channel))) {
+    timestamp(ep->fp);
+    vfprintf(ep->fp, fmt, ap);
+    fflush(ep->fp);
+  }
+  va_end(ap);
+}
+
+char *sim_time_string() {
+  return "";
+}
+
+void printfUART_buf(char *buf, int len) {
+  int i;
+  for (i = 0; i < len; i++) {
+    printf("%02hhx ", buf[i]);
+  }
+  printf("\n");
+}
+
+#include <lib6lowpan/iovec.h>
+#include <lib6lowpan/ip.h>
+
+void printfUART_in6addr(struct in6_addr *a) {
+  static char print_buf[64];
+  inet_ntop6(a, print_buf, 64);
+  printf(print_buf);
+}
diff --git a/support/sdk/c/blip/linux/tun_dev.c b/support/sdk/c/blip/linux/tun_dev.c
new file mode 100644
index 00000000..a25a9b18
--- /dev/null
+++ b/support/sdk/c/blip/linux/tun_dev.c
@@ -0,0 +1,204 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <syslog.h>
+#include <errno.h>
+
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+#include <linux/if_ether.h>
+#include <linux/if_tun.h>
+
+#include <netinet/in.h>
+#include <lib6lowpan/lib6lowpan.h>
+
+#include "tun_dev.h"
+
+/*
+ *    This is in linux/include/net/ipv6.h.
+ *    Thanks, net-tools!
+ */
+struct in6_ifreq {
+    struct in6_addr ifr6_addr;
+    __u32 ifr6_prefixlen;
+    unsigned int ifr6_ifindex;
+};
+
+
+int tun_open(char *dev)
+{
+    struct ifreq ifr;
+    int fd;
+
+    if ((fd = open("/dev/net/tun", O_RDWR | O_NONBLOCK)) < 0)
+	return -1;
+
+    memset(&ifr, 0, sizeof(ifr));
+    /* By default packets are tagged as IPv4. To tag them as IPv6,
+     * they need to be prefixed by struct tun_pi.
+     */
+    //ifr.ifr_flags = IFF_TUN | IFF_NO_PI;
+    ifr.ifr_flags = IFF_TUN;
+    if (*dev)
+	strncpy(ifr.ifr_name, dev, IFNAMSIZ);
+
+    if (ioctl(fd, TUNSETIFF, (void *) &ifr) < 0)
+	goto failed;
+
+    strcpy(dev, ifr.ifr_name);
+    return fd;
+
+  failed:
+    perror("tun_open");
+    close(fd);
+    return -1;
+}
+
+int tun_setup(char *dev, struct in6_addr *addr, int pfxlen) {
+  struct in6_ifreq ifr6;
+  struct ifreq ifr;
+  int fd;
+
+  if ((fd = socket(PF_INET6, SOCK_DGRAM, 0)) < 0)
+    return -1;
+
+  memset(&ifr, 0, sizeof(struct ifreq));
+  strncpy(ifr.ifr_name, dev, IFNAMSIZ);
+
+  /* set the interface up */ if (ioctl(fd, SIOCGIFFLAGS, &ifr) < 0) {
+    perror("SIOCGIFFLAGS");
+    return -1;
+  }
+  ifr.ifr_flags |= IFF_UP;
+  if (ioctl(fd, SIOCSIFFLAGS, &ifr) < 0) {
+    perror("SIOCSIFFLAGS");
+    return -1;
+  }
+
+  /* MTU */
+  ifr.ifr_mtu = 1280;
+  if (ioctl(fd, SIOCSIFMTU, &ifr) < 0) {
+    perror("SIOCSIFMTU");
+    return -1;
+  }
+
+  /* Global address */
+  memset(&ifr6, 0, sizeof(struct in6_ifreq));
+  memcpy(&ifr6.ifr6_addr, addr, 16);
+  if (ioctl(fd, SIOGIFINDEX, &ifr) < 0) {
+    perror("SIOGIFINDEX");
+    return -1;
+  }
+
+  ifr6.ifr6_ifindex = ifr.ifr_ifindex;
+  ifr6.ifr6_prefixlen = pfxlen;
+  if (ioctl(fd, SIOCSIFADDR, &ifr6) < 0) {
+    perror("SIOCSIFADDR (global)");
+    return -1;
+  }
+
+#if 0
+  memset(&ifr6.ifr6_addr.s6_addr[0], 0, 16);
+  ifr6.ifr6_addr.s6_addr16[0] = htons(0xfe80);
+  ifr6.ifr6_addr.s6_addr16[7] = addr->s6_addr16[7];
+  
+  if (ioctl(fd, SIOCSIFADDR, &ifr6) < 0) {
+    perror("SIOCSIFADDR (local)");
+    return -1;
+  }
+#endif
+
+  close(fd);
+
+  return 0;
+}
+
+int tun_close(int fd, char *dev)
+{
+    return close(fd);
+}
+
+/* Read/write frames from TUN device */
+int tun_write(int fd, struct ip6_packet *msg)
+{
+  uint8_t buf[INET_MTU + sizeof(struct tun_pi)], *packet;
+  struct tun_pi *pi = (struct tun_pi *)buf;
+  packet = (uint8_t *)(pi + 1);
+
+
+  if (ntohs(msg->ip6_hdr.ip6_plen) + sizeof(struct ip6_hdr) >= INET_MTU)
+    return 1;
+
+  pi->flags = 0;
+  pi->proto = htons(ETH_P_IPV6);
+
+  memcpy(packet, &msg->ip6_hdr, sizeof(struct ip6_hdr));
+  packet += sizeof(struct ip6_hdr);
+
+  iov_read(msg->ip6_data, 0, iov_len(msg->ip6_data), packet);
+
+  return write(fd, buf, sizeof(struct tun_pi) + sizeof(struct ip6_hdr) + 
+               ntohs(msg->ip6_hdr.ip6_plen));
+}
+
+int tun_read(int fd, char *buf, int len)
+{
+  int out;
+  out = read(fd, buf, sizeof(struct tun_pi) + len);
+
+  return out - sizeof(struct tun_pi);
+}
diff --git a/support/sdk/c/blip/linux/tun_dev.h b/support/sdk/c/blip/linux/tun_dev.h
new file mode 100644
index 00000000..8f73bb6f
--- /dev/null
+++ b/support/sdk/c/blip/linux/tun_dev.h
@@ -0,0 +1,64 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _TUN_DEV_H
+#define _TUN_DEV_H
+
+#include <lib6lowpan/ip.h>
+
+int tun_open(char *dev);
+int tun_close(int fd, char *dev);
+int tun_setup(char *dev, struct in6_addr *addr, int pfxlen);
+int tun_write(int fd, struct ip6_packet *msg);
+int tun_read(int fd, char *buf, int len);
+
+#endif
diff --git a/support/sdk/c/blip/linux/tun_dev_darwin.c b/support/sdk/c/blip/linux/tun_dev_darwin.c
new file mode 100644
index 00000000..5ff9ea52
--- /dev/null
+++ b/support/sdk/c/blip/linux/tun_dev_darwin.c
@@ -0,0 +1,196 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+
+/* We're in macland here so we can do all the OSX-specific includes here  */
+
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <syslog.h>
+#include <errno.h>
+
+#include <sys/socket.h>
+#include <sys/ioctl.h>
+#include <net/if.h>
+#include <netinet/in.h>
+#include <netinet/in_var.h>
+#include <arpa/inet.h>
+#include <sys/sockio.h>
+
+#include <lib6lowpan/lib6lowpan.h>
+#include "tun_ioctls_darwin.h" 
+#include "tun_dev.h"
+#include "logging.h"
+
+#if 0
+int main(int argc, char **argv) {
+  char devname[IFNAMSIZ];
+  struct in6_addr addr;
+
+  inet_pton(AF_INET6, "fec0::1", &addr);
+
+  if (tun_open(devname) < 0) {
+    exit(1);
+  }
+
+  if (tun_setup(devname, &addr, 128) < 0) {
+    exit(1);
+  }
+
+  sleep(10);
+}
+#endif
+
+int tun_open(char *dev) {
+    int fd;
+    int yes = 1;
+
+    if ((fd = open("/dev/tun0", O_RDWR | O_NONBLOCK)) < 0)
+      return -1;
+
+    strncpy(dev, "tun0", IFNAMSIZ);
+
+    /* this makes it so we have to prepend the address family to
+       packets we write. */
+    if (ioctl(fd, TUNSIFHEAD, &yes) < 0)
+      goto failed;
+
+    if (fcntl(fd, F_SETFL, O_NONBLOCK) < 0)
+      goto failed;
+
+
+    return fd;
+  failed:
+    log_fatal_perror("tun_open");
+    close(fd);
+    return -1;
+}
+
+int tun_setup(char *dev, struct in6_addr *addr, int pfxlen) {
+  char addr_buf[256], cmd_buf[1024];
+  struct in6_addr my_addr;
+  struct ifreq ifr;
+  int fd;
+  pfxlen = 64;
+
+  if ((fd = socket(PF_INET6, SOCK_DGRAM, 0)) < 0)
+    return -1;
+
+  memset(&ifr, 0, sizeof(struct ifreq));
+  strncpy(ifr.ifr_name, dev, IFNAMSIZ);
+
+  /* set the interface up */
+  if (ioctl(fd, SIOCGIFFLAGS, &ifr) < 0) {
+    log_fatal_perror("SIOCGIFFLAGS");
+    return -1;
+  }
+
+  ifr.ifr_flags |= IFF_UP;
+  if (ioctl(fd, SIOCSIFFLAGS, &ifr) < 0) {
+    log_fatal_perror("SIOCSIFFLAGS");
+    return -1;
+  }
+  /* MTU */
+  ifr.ifr_mtu = 1280;
+  if (ioctl(fd, SIOCSIFMTU, &ifr) < 0) {
+    log_fatal_perror("SIOCSIFMTU");
+    return -1;
+  }
+  /* Global address */
+  memcpy(&my_addr, addr, sizeof(struct in6_addr));
+  inet_ntop(AF_INET6, &my_addr, addr_buf, 256);
+  snprintf(cmd_buf, 1024, "ifconfig %s inet6 %s/%i", dev, addr_buf, pfxlen);
+  if (system(cmd_buf) != 0) {
+    fatal("could not set global address!\n");
+    return -1;
+  }
+
+  snprintf(cmd_buf, 1024, "route -q add -inet6 %s -prefixlen %i -interface %s > /dev/null", 
+           addr_buf, pfxlen, dev);
+  if (system(cmd_buf) != 0) {
+    fatal("could not add route!\n");
+    return -1;
+  }
+
+  snprintf(cmd_buf, 1024, "route -q add -inet6 fe80::%%%s -prefixlen %i -interface %s > /dev/null", 
+           dev, 64, dev);
+  if (system(cmd_buf) != 0) {
+    fatal("could not LL add route!\n");
+    return -1;
+  }
+  
+  my_addr.__u6_addr.__u6_addr16[0] = htons(0xfe80);
+  inet_ntop(AF_INET6, &my_addr, addr_buf, 256);
+  snprintf(cmd_buf, 1024, "ifconfig %s inet6 %s/64", dev, addr_buf);
+  if (system(cmd_buf) != 0) {
+    fatal("could not set local address!\n");
+    return -1;
+  }
+
+  return 0;
+}
+
+int tun_close(int fd, char *dev)
+{
+    return close(fd);
+}
+
+/* Read/write frames from TUN device */
+int tun_write(int fd, struct split_ip_msg *msg)
+{
+  uint8_t buf[INET_MTU + sizeof(struct tun_pi)], *packet;
+  struct tun_pi *pi = (struct tun_pi *)buf;
+  struct generic_header *cur;
+  packet = (uint8_t *)(pi + 1);
+
+
+  if (ntohs(msg->hdr.plen) + sizeof(struct ip6_hdr) >= INET_MTU)
+    return 1;
+
+  pi->af = htonl(AF_INET6);
+
+  memcpy(packet, &msg->hdr, sizeof(struct ip6_hdr));
+  packet += sizeof(struct ip6_hdr);
+
+  cur = msg->headers;
+  while (cur != NULL) {
+    memcpy(packet, cur->hdr.data, cur->len);
+    packet += cur->len;
+    cur = cur->next;
+  }
+
+  memcpy(packet, msg->data, msg->data_len);
+
+  return write(fd, buf, sizeof(struct tun_pi) + sizeof(struct ip6_hdr) + ntohs(msg->hdr.plen));
+}
+
+int tun_read(int fd, char *buf, int len)
+{
+  int out;
+  out = read(fd, buf, sizeof(struct tun_pi) + len);
+
+  return out - sizeof(struct tun_pi);
+}
diff --git a/support/sdk/c/blip/linux/tun_dev_linux.c b/support/sdk/c/blip/linux/tun_dev_linux.c
new file mode 100644
index 00000000..a25a9b18
--- /dev/null
+++ b/support/sdk/c/blip/linux/tun_dev_linux.c
@@ -0,0 +1,204 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <syslog.h>
+#include <errno.h>
+
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+#include <linux/if_ether.h>
+#include <linux/if_tun.h>
+
+#include <netinet/in.h>
+#include <lib6lowpan/lib6lowpan.h>
+
+#include "tun_dev.h"
+
+/*
+ *    This is in linux/include/net/ipv6.h.
+ *    Thanks, net-tools!
+ */
+struct in6_ifreq {
+    struct in6_addr ifr6_addr;
+    __u32 ifr6_prefixlen;
+    unsigned int ifr6_ifindex;
+};
+
+
+int tun_open(char *dev)
+{
+    struct ifreq ifr;
+    int fd;
+
+    if ((fd = open("/dev/net/tun", O_RDWR | O_NONBLOCK)) < 0)
+	return -1;
+
+    memset(&ifr, 0, sizeof(ifr));
+    /* By default packets are tagged as IPv4. To tag them as IPv6,
+     * they need to be prefixed by struct tun_pi.
+     */
+    //ifr.ifr_flags = IFF_TUN | IFF_NO_PI;
+    ifr.ifr_flags = IFF_TUN;
+    if (*dev)
+	strncpy(ifr.ifr_name, dev, IFNAMSIZ);
+
+    if (ioctl(fd, TUNSETIFF, (void *) &ifr) < 0)
+	goto failed;
+
+    strcpy(dev, ifr.ifr_name);
+    return fd;
+
+  failed:
+    perror("tun_open");
+    close(fd);
+    return -1;
+}
+
+int tun_setup(char *dev, struct in6_addr *addr, int pfxlen) {
+  struct in6_ifreq ifr6;
+  struct ifreq ifr;
+  int fd;
+
+  if ((fd = socket(PF_INET6, SOCK_DGRAM, 0)) < 0)
+    return -1;
+
+  memset(&ifr, 0, sizeof(struct ifreq));
+  strncpy(ifr.ifr_name, dev, IFNAMSIZ);
+
+  /* set the interface up */ if (ioctl(fd, SIOCGIFFLAGS, &ifr) < 0) {
+    perror("SIOCGIFFLAGS");
+    return -1;
+  }
+  ifr.ifr_flags |= IFF_UP;
+  if (ioctl(fd, SIOCSIFFLAGS, &ifr) < 0) {
+    perror("SIOCSIFFLAGS");
+    return -1;
+  }
+
+  /* MTU */
+  ifr.ifr_mtu = 1280;
+  if (ioctl(fd, SIOCSIFMTU, &ifr) < 0) {
+    perror("SIOCSIFMTU");
+    return -1;
+  }
+
+  /* Global address */
+  memset(&ifr6, 0, sizeof(struct in6_ifreq));
+  memcpy(&ifr6.ifr6_addr, addr, 16);
+  if (ioctl(fd, SIOGIFINDEX, &ifr) < 0) {
+    perror("SIOGIFINDEX");
+    return -1;
+  }
+
+  ifr6.ifr6_ifindex = ifr.ifr_ifindex;
+  ifr6.ifr6_prefixlen = pfxlen;
+  if (ioctl(fd, SIOCSIFADDR, &ifr6) < 0) {
+    perror("SIOCSIFADDR (global)");
+    return -1;
+  }
+
+#if 0
+  memset(&ifr6.ifr6_addr.s6_addr[0], 0, 16);
+  ifr6.ifr6_addr.s6_addr16[0] = htons(0xfe80);
+  ifr6.ifr6_addr.s6_addr16[7] = addr->s6_addr16[7];
+  
+  if (ioctl(fd, SIOCSIFADDR, &ifr6) < 0) {
+    perror("SIOCSIFADDR (local)");
+    return -1;
+  }
+#endif
+
+  close(fd);
+
+  return 0;
+}
+
+int tun_close(int fd, char *dev)
+{
+    return close(fd);
+}
+
+/* Read/write frames from TUN device */
+int tun_write(int fd, struct ip6_packet *msg)
+{
+  uint8_t buf[INET_MTU + sizeof(struct tun_pi)], *packet;
+  struct tun_pi *pi = (struct tun_pi *)buf;
+  packet = (uint8_t *)(pi + 1);
+
+
+  if (ntohs(msg->ip6_hdr.ip6_plen) + sizeof(struct ip6_hdr) >= INET_MTU)
+    return 1;
+
+  pi->flags = 0;
+  pi->proto = htons(ETH_P_IPV6);
+
+  memcpy(packet, &msg->ip6_hdr, sizeof(struct ip6_hdr));
+  packet += sizeof(struct ip6_hdr);
+
+  iov_read(msg->ip6_data, 0, iov_len(msg->ip6_data), packet);
+
+  return write(fd, buf, sizeof(struct tun_pi) + sizeof(struct ip6_hdr) + 
+               ntohs(msg->ip6_hdr.ip6_plen));
+}
+
+int tun_read(int fd, char *buf, int len)
+{
+  int out;
+  out = read(fd, buf, sizeof(struct tun_pi) + len);
+
+  return out - sizeof(struct tun_pi);
+}
diff --git a/support/sdk/c/blip/linux/tun_ioctls_darwin.h b/support/sdk/c/blip/linux/tun_ioctls_darwin.h
new file mode 100644
index 00000000..bfd157bf
--- /dev/null
+++ b/support/sdk/c/blip/linux/tun_ioctls_darwin.h
@@ -0,0 +1,38 @@
+/*
+ * ip tunnel device for MacOSX.
+ */
+/*
+ * Copyright (c) 2004, 2005, 2006, 2007, 2008, 2009 Mattias Nissler <mattias.nissler@gmx.de>
+ *
+ * Redistribution and use in source and binary forms, with or without modification, are permitted
+ * provided that the following conditions are met:
+ *
+ *   1. Redistributions of source code must retain the above copyright notice, this list of
+ *      conditions and the following disclaimer.
+ *   2. Redistributions in binary form must reproduce the above copyright notice, this list of
+ *      conditions and the following disclaimer in the documentation and/or other materials provided
+ *      with the distribution.
+ *   3. The name of the author may not be used to endorse or promote products derived from this
+ *      software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __TUN_IOCTLS_H__
+#define __TUN_IOCTLS_H__
+
+/* Tun supports prepending a four byte address family field to each packet. These ioctls allow you
+ * to switch it on/off. Pass 1 as parameter to switch it on, pass 0 for off.
+ */
+#define TUNSIFHEAD  _IOW('t', 96, int)
+#define TUNGIFHEAD  _IOR('t', 97, int)
+
+#endif /* __TUN_IOCTLS_H__ */
+
diff --git a/support/sdk/c/sf/.cvsignore b/support/sdk/c/sf/.cvsignore
new file mode 100644
index 00000000..480813a1
--- /dev/null
+++ b/support/sdk/c/sf/.cvsignore
@@ -0,0 +1,20 @@
+.deps
+Makefile
+Makefile.in
+aclocal.m4
+autoconf.h.in
+autom4te.cache
+config-aux
+config.log
+config.status
+configure
+prettylisten
+seriallisten
+serialpacket.c
+serialpacket.h
+serialprotocol.h
+serialsend
+sf
+sflisten
+sfsend
+stamp-h1
diff --git a/support/sdk/c/sf/Makefile.am b/support/sdk/c/sf/Makefile.am
new file mode 100644
index 00000000..eb8adc03
--- /dev/null
+++ b/support/sdk/c/sf/Makefile.am
@@ -0,0 +1,41 @@
+AUTOMAKE_OPTIONS = foreign
+
+MIGFLAGS = -D_POSIX_C_SOURCE
+TOS=$(shell ncc -print-tosdir)
+SERIAL_H = $(TOS)/lib/serial/Serial.h
+
+BUILT_SOURCES = serialpacket.h serialprotocol.h
+
+bin_PROGRAMS=sf 
+noinst_PROGRAMS=prettylisten sflisten sfsend seriallisten serialsend
+noinst_LIBRARIES=libmote.a
+
+sf_SOURCES = sf.c
+sf_LDADD = libmote.a
+
+prettylisten_SOURCES = prettylisten.c
+prettylisten_LDADD = libmote.a
+
+sflisten_SOURCES = sflisten.c
+sflisten_LDADD = libmote.a
+
+sfsend_SOURCES = sfsend.c
+sfsend_LDADD = libmote.a
+
+seriallisten_SOURCES = seriallisten.c
+seriallisten_LDADD = libmote.a
+
+serialsend_SOURCES = serialsend.c
+serialsend_LDADD = libmote.a
+
+libmote_a_SOURCES = \
+	message.c \
+	serialpacket.c \
+	serialsource.c \
+	sfsource.c
+
+serialpacket.c serialpacket.h: $(SERIAL_H)
+	mig -o serialpacket.h -c-prefix=spacket c $(SERIAL_H) serial_packet $(MIGFLAGS)
+
+serialprotocol.h: $(SERIAL_H)
+	ncg -o $@ -c-prefix=SERIAL c $(SERIAL_H) Serial.h $(MIGFLAGS)
diff --git a/support/sdk/c/sf/README b/support/sdk/c/sf/README
new file mode 100644
index 00000000..100865c2
--- /dev/null
+++ b/support/sdk/c/sf/README
@@ -0,0 +1,51 @@
+Mini C-SDK for TinyOS
+=====================
+
+This directory contains a mini-SDK for C, for communicating with motes
+running TinyOS 2.0. To build this SDK, run 
+  ./bootstrap
+  ./configure --prefix=<somewhere>
+  make
+in the current directory and, if you wish, "make install" to install the
+C-based serial forwarder in <somewhere>/bin.
+
+This directory contains one utility:
+- sf: a C-based serial forwarder:
+    sf <port> <device> <baudrate>
+  Starts a serial forwarder listening for TCP connections on port <port>, and
+  sending and receiving packets on serial port <device> at the specified
+  <baudrate>.
+
+  This serial forwarder implements the standard TinyOS 2.0 serial forwarder
+  protocol (see comments in support/sdk/java/net/tinyos/packet/SFProtocol.java
+  for a brief overview).
+
+a library (libmote.a) supporting mote communication:
+- serialsource.h: send and receive packets over a serial port (supports
+  non-blocking I/O)
+- sfsource.h: send and receive packets using the serial forwarder
+  protocol
+- message.h: support functions for mig, to encode and decode bitfields of
+  arbitrary size and endianness
+- serialpacket.h: mig-generated code to encode and decode the header of
+  TinyOS serial active-message packets (the packets sent and received by the
+  BaseStation application)
+- serialprotocol.h: ncg-generated code containing the constants describing
+  TinyOS serial packets (from tos/lib/serial/Serial.h)
+
+and four example programs that use that library:
+- seriallisten: print packets received from a serial port
+- sflisten: print packets received from a serial forwarder
+- prettylisten: print packets received from a serial forwarder, using
+  mig-generated code to decode the standard serial-active-message header
+- sfsend: send a packet (specified on the command line) to a serial forwarder
+
+Note that sflisten prints, and sfsend sends, raw packets. In particular,
+the first byte indicates the packet type (e.g., 00 for the AM-over-serial
+packets). For more information on serial communication to and from motes,
+see TEP113.
+
+For more information on using ncg and mig with C, see the nescc-mig and
+nescc-ncg man pages.
+
+
diff --git a/support/sdk/c/sf/autoconf.h b/support/sdk/c/sf/autoconf.h
new file mode 100644
index 00000000..82855083
--- /dev/null
+++ b/support/sdk/c/sf/autoconf.h
@@ -0,0 +1,23 @@
+/* autoconf.h.  Generated from autoconf.h.in by configure.  */
+/* autoconf.h.in.  Generated from configure.ac by autoheader.  */
+
+/* Name of package */
+#define PACKAGE "cmotesdk"
+
+/* Define to the address where bug reports for this package should be sent. */
+#define PACKAGE_BUGREPORT ""
+
+/* Define to the full name of this package. */
+#define PACKAGE_NAME "cmotesdk"
+
+/* Define to the full name and version of this package. */
+#define PACKAGE_STRING "cmotesdk 1.0"
+
+/* Define to the one symbol short name of this package. */
+#define PACKAGE_TARNAME "cmotesdk"
+
+/* Define to the version of this package. */
+#define PACKAGE_VERSION "1.0"
+
+/* Version number of package */
+#define VERSION "1.0"
diff --git a/support/sdk/c/sf/bootstrap b/support/sdk/c/sf/bootstrap
new file mode 100755
index 00000000..77fb6208
--- /dev/null
+++ b/support/sdk/c/sf/bootstrap
@@ -0,0 +1,5 @@
+mkdir config-aux
+aclocal 
+autoheader
+autoconf
+automake -a -c
diff --git a/support/sdk/c/sf/build.xml b/support/sdk/c/sf/build.xml
new file mode 100644
index 00000000..e0b2c92b
--- /dev/null
+++ b/support/sdk/c/sf/build.xml
@@ -0,0 +1,27 @@
+<project name="tinyos-2.x support sdk c sf" default="all">
+
+	<target name="all" >
+		<echo message = "Building support sdk c sf" />
+		<exec executable="./bootstrap" failonerror="true">
+		</exec>
+		<exec executable="./configure" failonerror="true">
+			<arg  line="--quiet" />
+		</exec>
+		<exec executable="make" failonerror="true">
+			<arg line="all" />
+		</exec>
+	</target>
+
+	<target name="install" >
+		<echo message = "Installing tinyos-2.x support sdk c sf" />
+		<exec executable="./bootstrap" failonerror="true">
+		</exec>
+		<exec executable="./configure" failonerror="true">
+			<arg line="--prefix=${TOSTOOLS_PREFIX} --quiet" />
+			</exec>
+		<exec executable="make" failonerror="true">
+			<arg line="install" />
+		</exec>
+	</target>
+
+</project>
diff --git a/support/sdk/c/sf/configure.ac b/support/sdk/c/sf/configure.ac
new file mode 100644
index 00000000..c064fd6d
--- /dev/null
+++ b/support/sdk/c/sf/configure.ac
@@ -0,0 +1,10 @@
+AC_INIT(cmotesdk, 1.0)
+AC_CONFIG_SRCDIR(sfsource.c)
+AM_CONFIG_HEADER(autoconf.h)
+AC_CONFIG_AUX_DIR(config-aux)
+AM_INIT_AUTOMAKE
+
+AC_PROG_CC
+AC_PROG_RANLIB
+
+AC_OUTPUT(Makefile)
diff --git a/support/sdk/c/sf/message.c b/support/sdk/c/sf/message.c
new file mode 100644
index 00000000..9aa0c32e
--- /dev/null
+++ b/support/sdk/c/sf/message.c
@@ -0,0 +1,320 @@
+/* Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  <dgay@intel-research.net>
+ *           Intel Research Berkeley Lab
+ */
+
+#include <stdlib.h>
+#include "message.h"
+
+struct tmsg {
+  uint8_t *data;
+  size_t len;
+};
+
+tmsg_t *new_tmsg(void *packet, size_t len)
+{
+  tmsg_t *x = malloc(sizeof(tmsg_t));
+
+  if (x)
+    {
+      x->data = packet;
+      x->len = len;
+    }
+  return x;
+}
+
+void free_tmsg(tmsg_t *msg)
+{
+  if (msg)
+    free(msg);
+}
+
+void reset_tmsg(tmsg_t *msg, void *packet, size_t len)
+{
+  if (!msg)
+    return;
+  msg->data = packet;
+  msg->len  = len;
+}
+
+void *tmsg_data(tmsg_t *msg)
+{
+  return msg->data;
+}
+
+size_t tmsg_length(tmsg_t *msg)
+{
+  return msg->len;
+}
+
+static void (*failfn)(void);
+
+void tmsg_fail(void)
+{
+  if (failfn)
+    failfn();
+}
+
+void (*tmsg_set_fail(void (*fn)(void)))(void)
+{
+  void (*oldfn)(void) = failfn;
+
+  failfn = fn;
+
+  return oldfn;
+}
+
+/* Check if a specified bit field is in range for a buffer, and invoke
+   tmsg_fail if not. Return TRUE if in range, FALSE otherwise */
+static int boundsp(tmsg_t *msg, size_t offset, size_t length)
+{
+  if (offset + length <= msg->len * 8)
+    return 1;
+
+  tmsg_fail();
+  return 0;
+}
+
+/* Convert 2's complement 'length' bit integer 'x' from unsigned to signed
+ */
+static int64_t u2s(uint64_t x, size_t length)
+{
+  if (x & 1ULL << (length - 1))
+    return (int64_t)x - (1LL << length);
+  else
+    return x;
+}
+
+uint64_t tmsg_read_ule(tmsg_t *msg, size_t offset, size_t length)
+{
+  uint64_t x = 0;
+
+  if (boundsp(msg, offset, length))
+    {
+      size_t byte_offset = offset >> 3;
+      size_t bit_offset = offset & 7;
+      size_t shift = 0;
+
+      /* all in one byte case */
+      if (length + bit_offset <= 8)
+	return (msg->data[byte_offset] >> bit_offset) & ((1 << length) - 1);
+
+      /* get some high order bits */
+      if (offset > 0)
+	{
+	  x = msg->data[byte_offset] >> bit_offset;
+	  byte_offset++;
+	  shift += 8 - bit_offset;
+	  length -= 8 - bit_offset;
+	}
+
+      while (length >= 8)
+	{
+	  x |= (uint64_t)msg->data[byte_offset++] << shift;
+	  shift += 8;
+	  length -= 8;
+	}
+
+      /* data from last byte */
+      if (length > 0)
+	x |= (uint64_t)(msg->data[byte_offset] & ((1 << length) - 1)) << shift;
+    }
+
+  return x;
+}
+
+int64_t tmsg_read_le(tmsg_t *msg, size_t offset, size_t length)
+{
+  return u2s(tmsg_read_ule(msg, offset, length), length);
+}
+
+void tmsg_write_ule(tmsg_t *msg, size_t offset, size_t length, uint64_t x)
+{
+  if (boundsp(msg, offset, length))
+    {
+      size_t byte_offset = offset >> 3;
+      size_t bit_offset = offset & 7;
+      size_t shift = 0;
+
+      /* all in one byte case */
+      if (length + bit_offset <= 8)
+	{
+	  msg->data[byte_offset] = 
+	    ((msg->data[byte_offset] & ~(((1 << length) - 1) << bit_offset))
+	     | x << bit_offset);
+	  return;
+	}
+
+      /* set some high order bits */
+      if (bit_offset > 0)
+	{
+	  msg->data[byte_offset] =
+	    ((msg->data[byte_offset] & ((1 << bit_offset) - 1)) | x << bit_offset);
+	  byte_offset++;
+	  shift += 8 - bit_offset;
+	  length -= 8 - bit_offset;
+	}
+
+      while (length >= 8)
+	{
+	  msg->data[byte_offset++] = x >> shift;
+	  shift += 8;
+	  length -= 8;
+	}
+
+      /* data for last byte */
+      if (length > 0)
+	msg->data[byte_offset] = 
+	  (msg->data[byte_offset] & ~((1 << length) - 1)) | x >> shift;
+    }
+}
+
+void tmsg_write_le(tmsg_t *msg, size_t offset, size_t length, int64_t value)
+{
+  tmsg_write_ule(msg, offset, length, value);
+}
+
+uint64_t tmsg_read_ube(tmsg_t *msg, size_t offset, size_t length)
+{
+  uint64_t x = 0;
+
+  if (boundsp(msg, offset, length))
+    {
+      size_t byte_offset = offset >> 3;
+      size_t bit_offset = offset & 7;
+
+      /* All in one byte case */
+      if (length + bit_offset <= 8)
+	return (msg->data[byte_offset] >> (8 - bit_offset - length)) &
+	  ((1 << length) - 1);
+
+      /* get some high order bits */
+      if (bit_offset > 0)
+	{
+	  length -= 8 - bit_offset;
+	  x = (uint64_t)(msg->data[byte_offset] & ((1 << (8 - bit_offset)) - 1)) << length;
+	  byte_offset++;
+	}
+
+      while (length >= 8)
+	{
+	  length -= 8;
+	  x |= (uint64_t)msg->data[byte_offset++] << length;
+	}
+
+      /* data from last byte */
+      if (length > 0)
+	x |= msg->data[byte_offset] >> (8 - length);
+
+      return x;
+    }
+
+  return x;
+}
+
+int64_t tmsg_read_be(tmsg_t *msg, size_t offset, size_t length)
+{
+  return u2s(tmsg_read_ube(msg, offset, length), length);
+}
+
+void tmsg_write_ube(tmsg_t *msg, size_t offset, size_t length, uint64_t x)
+{
+  if (boundsp(msg, offset, length))
+    {
+      size_t byte_offset = offset >> 3;
+      size_t bit_offset = offset & 7;
+
+      /* all in one byte case */
+      if (length + bit_offset <= 8) {
+	size_t mask = ((1 << length) - 1) << (8 - bit_offset - length);
+
+	msg->data[byte_offset] = 
+	  ((msg->data[byte_offset] & ~mask) | x << (8 - bit_offset - length));
+	return;
+      }
+
+      /* set some high order bits */
+      if (bit_offset > 0)
+	{
+	  size_t mask = (1 << (8 - bit_offset)) - 1;
+
+	  length -= 8 - bit_offset;
+	  msg->data[byte_offset] = 
+	    ((msg->data[byte_offset] & ~mask) | x >> length);
+	  byte_offset++;
+	}
+
+      while (length >= 8)
+	{
+	  length -= 8;
+	  msg->data[byte_offset++] = x >> length;
+	}
+
+      /* data for last byte */
+      if (length > 0)
+	{
+	  size_t mask = (1 << (8 - length)) - 1;
+
+	  msg->data[byte_offset] =
+	    ((msg->data[byte_offset] & mask) | x << (8 - length));
+	}
+    }
+}
+
+void tmsg_write_be(tmsg_t *msg, size_t offset, size_t length, int64_t value)
+{
+  tmsg_write_ube(msg, offset, length, value);
+}
+
+/* u2f and f2u convert raw 32-bit values to/from float. This code assumes
+   that the floating point rep in the uint32_t values:
+     bit 31: sign, bits 30-23: exponent, bits 22-0: mantissa
+   matches that of a floating point value when such a value is stored in
+   memory.
+*/
+
+/* Note that C99 wants us to use the union approach rather than the
+   cast-a-pointer approach... */
+union f_and_u {
+  uint32_t u;
+  float f;
+};
+
+static float u2f(uint32_t x)
+{
+  union f_and_u y = { .u = x};
+  return y.f;
+}
+
+static uint32_t f2u(float x)
+{
+  union f_and_u y = { .f = x};
+  return y.u;
+}
+
+float tmsg_read_float_le(tmsg_t *msg, size_t offset)
+{
+  return u2f(tmsg_read_ule(msg, offset, 32));
+}
+
+void tmsg_write_float_le(tmsg_t *msg, size_t offset, float x)
+{
+  tmsg_write_ule(msg, offset, 32, f2u(x));
+}
+
+float tmsg_read_float_be(tmsg_t *msg, size_t offset)
+{
+  return u2f(tmsg_read_ube(msg, offset, 32));
+}
+
+void tmsg_write_float_be(tmsg_t *msg, size_t offset, float x)
+{
+  tmsg_write_ube(msg, offset, 32, f2u(x));
+}
diff --git a/support/sdk/c/sf/message.h b/support/sdk/c/sf/message.h
new file mode 100644
index 00000000..d1acc5c6
--- /dev/null
+++ b/support/sdk/c/sf/message.h
@@ -0,0 +1,161 @@
+/* Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  <dgay@intel-research.net>
+ *           Intel Research Berkeley Lab
+ */
+#ifndef MESSAGE_H
+#define MESSAGE_H
+
+#include <stdint.h>
+#include <stdlib.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** The type of message buffers */
+typedef struct tmsg tmsg_t;
+
+/** Invoke the function set by tmsg_set_fail.
+ *  tmsg_fail is called by the tmsg_read and tmsg_write functions when an
+ *  out-of-buffer access is attempted.
+*/
+void tmsg_fail(void);
+
+/** Set the function that tmsg_fail should call, and return the previous
+ *  function. If the function is NULL, tmsg_fail does nothing.
+*/
+void (*tmsg_set_fail(void (*fn)(void)))(void);
+
+/**
+ * Create a message buffer from array 'packet' of 'len' bytes
+ */
+tmsg_t *new_tmsg(void *packet, size_t len);
+
+/**
+ * Free a message buffer. This does NOT free the underlying array.
+ */
+void free_tmsg(tmsg_t *msg);
+
+/** 
+ * Reuse an existing tmsg
+ */
+void reset_tmsg(tmsg_t *msg, void *packet, size_t len) ;
+
+/**
+ * Return underlying array of a message buffer
+ */
+void *tmsg_data(tmsg_t *msg);
+
+/**
+ * Return length of a message buffer
+ */
+size_t tmsg_length(tmsg_t *msg);
+
+/**
+ * Read an unsigned little-endian integer of 'bit_length' bits from bit offset
+ * 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and 0 is returned.
+ */
+uint64_t tmsg_read_ule(tmsg_t *msg, size_t bit_offset, size_t bit_length);
+
+/**
+ * Read a signed little-endian integer of 'bit_length' bits from bit offset
+ * 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and 0 is returned.
+ */
+int64_t tmsg_read_le(tmsg_t *msg, size_t bit_offset, size_t bit_length);
+
+/**
+ * Write an unsigned little-endian integer of 'bit_length' bits to bit offset
+ * 'bit_offset'.
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and no write occurs.
+ */
+void tmsg_write_ule(tmsg_t *msg, size_t bit_offset, size_t bit_length, uint64_t value);
+
+/**
+ * Write a signed little-endian integer of 'bit_length' bits to bit offset
+ * 'bit_offset'.
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and no write occurs.
+ */
+void tmsg_write_le(tmsg_t *msg, size_t bit_offset, size_t bit_length, int64_t value);
+
+/**
+ * Read an unsigned big-endian integer of 'bit_length' bits from bit offset
+ * 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and 0 is returned.
+ */
+uint64_t tmsg_read_ube(tmsg_t *msg, size_t bit_offset, size_t bit_length);
+
+/**
+ * Read a signed big-endian integer of 'bit_length' bits from bit offset
+ * 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and 0 is returned.
+ */
+int64_t tmsg_read_be(tmsg_t *msg, size_t bit_offset, size_t bit_length);
+
+/**
+ * Write an unsigned big-endian integer of 'bit_length' bits to bit offset
+ * 'bit_offset'.
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and no write occurs.
+ */
+void tmsg_write_ube(tmsg_t *msg, size_t bit_offset, size_t bit_length, uint64_t value);
+
+/**
+ * Write a signed big-endian integer of 'bit_length' bits to bit offset
+ * 'bit_offset'.
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and no write occurs.
+ */
+void tmsg_write_be(tmsg_t *msg, size_t bit_offset, size_t bit_length, int64_t value);
+
+/**
+ * Read a 32-bit IEEE float stored in little-endian format (bit 31: sign, 
+ * bits 30-23: exponent, bits 22-0: mantissa) from bit offset 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and 0 is returned.
+ */
+float tmsg_read_float_le(tmsg_t *msg, size_t offset);
+
+/**
+ * Write a 32-bit IEEE float in little-endian format (bit 31: sign, 
+ * bits 30-23: exponent, bits 22-0: mantissa) to bit offset 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and no write occurs.
+ */
+void tmsg_write_float_le(tmsg_t *msg, size_t offset, float x);
+
+/**
+ * Read a 32-bit IEEE float stored in big-endian format (bit 31: sign, 
+ * bits 30-23: exponent, bits 22-0: mantissa) from bit offset 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and 0 is returned.
+ */
+float tmsg_read_float_be(tmsg_t *msg, size_t offset);
+
+/**
+ * Write a 32-bit IEEE float in big-endian format (bit 31: sign, 
+ * bits 30-23: exponent, bits 22-0: mantissa) to bit offset 'bit_offset'
+ * If the specified field is out of range for the buffer, tmsg_fail is called
+ * and no write occurs.
+ */
+void tmsg_write_float_be(tmsg_t *msg, size_t offset, float x);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/support/sdk/c/sf/prettylisten.c b/support/sdk/c/sf/prettylisten.c
new file mode 100644
index 00000000..4a24f7dd
--- /dev/null
+++ b/support/sdk/c/sf/prettylisten.c
@@ -0,0 +1,68 @@
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "sfsource.h"
+#include "serialpacket.h"
+#include "serialprotocol.h"
+
+void hexprint(uint8_t *packet, int len)
+{
+  int i;
+
+  for (i = 0; i < len; i++)
+    printf("%02x ", packet[i]);
+}
+
+int main(int argc, char **argv)
+{
+  int fd;
+
+  if (argc != 3)
+    {
+      fprintf(stderr, "Usage: %s <host> <port> - dump packets from a serial forwarder\n", argv[0]);
+      exit(2);
+    }
+  fd = open_sf_source(argv[1], atoi(argv[2]));
+  if (fd < 0)
+    {
+      fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n",
+	      argv[1], argv[2]);
+      exit(1);
+    }
+  for (;;)
+    {
+      int len, i;
+      uint8_t *packet = read_sf_packet(fd, &len);
+
+      if (!packet)
+	exit(0);
+
+      if (len >= 1 + SPACKET_SIZE &&
+	  packet[0] == SERIAL_TOS_SERIAL_ACTIVE_MESSAGE_ID)
+	{
+	  tmsg_t *msg = new_tmsg(packet + 1, len - 1);
+
+	  if (!msg)
+	    exit(0);
+
+	  printf("dest %u, src %u, length %u, group %u, type %u\n  ",
+		 spacket_header_dest_get(msg),
+		 spacket_header_src_get(msg),
+		 spacket_header_length_get(msg),
+		 spacket_header_group_get(msg),
+		 spacket_header_type_get(msg));
+	  hexprint((uint8_t *)tmsg_data(msg) + spacket_data_offset(0),
+		   tmsg_length(msg) - spacket_data_offset(0));
+
+	  free(msg);
+	}
+      else
+	{
+	  printf("non-AM packet: ");
+	  hexprint(packet, len);
+	}
+      putchar('\n');
+      fflush(stdout);
+      free((void *)packet);
+    }
+}
diff --git a/support/sdk/c/sf/seriallisten.c b/support/sdk/c/sf/seriallisten.c
new file mode 100644
index 00000000..f7d5aeb6
--- /dev/null
+++ b/support/sdk/c/sf/seriallisten.c
@@ -0,0 +1,52 @@
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "serialsource.h"
+
+static char *msgs[] = {
+  "unknown_packet_type",
+  "ack_timeout"	,
+  "sync"	,
+  "too_long"	,
+  "too_short"	,
+  "bad_sync"	,
+  "bad_crc"	,
+  "closed"	,
+  "no_memory"	,
+  "unix_error"
+};
+
+void stderr_msg(serial_source_msg problem)
+{
+  fprintf(stderr, "Note: %s\n", msgs[problem]);
+}
+
+int main(int argc, char **argv)
+{
+  serial_source src;
+
+  if (argc != 3)
+    {
+      fprintf(stderr, "Usage: %s <device> <rate> - dump packets from a serial port\n", argv[0]);
+      exit(2);
+    }
+  src = open_serial_source(argv[1], platform_baud_rate(argv[2]), 0, stderr_msg);
+  if (!src)
+    {
+      fprintf(stderr, "Couldn't open serial port at %s:%s\n",
+	      argv[1], argv[2]);
+      exit(1);
+    }
+  for (;;)
+    {
+      int len, i;
+      const unsigned char *packet = read_serial_packet(src, &len);
+
+      if (!packet)
+	exit(0);
+      for (i = 0; i < len; i++)
+	printf("%02x ", packet[i]);
+      putchar('\n');
+      free((void *)packet);
+    }
+}
diff --git a/support/sdk/c/sf/serialsend.c b/support/sdk/c/sf/serialsend.c
new file mode 100644
index 00000000..7735f362
--- /dev/null
+++ b/support/sdk/c/sf/serialsend.c
@@ -0,0 +1,65 @@
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "serialsource.h"
+
+static char *msgs[] = {
+  "unknown_packet_type",
+  "ack_timeout"	,
+  "sync"	,
+  "too_long"	,
+  "too_short"	,
+  "bad_sync"	,
+  "bad_crc"	,
+  "closed"	,
+  "no_memory"	,
+  "unix_error"
+};
+
+void stderr_msg(serial_source_msg problem)
+{
+  fprintf(stderr, "Note: %s\n", msgs[problem]);
+}
+
+void send_packet(serial_source src, char **bytes, int count)
+{
+  int i;
+  unsigned char *packet;
+
+  packet = malloc(count);
+  if (!packet)
+    exit(2);
+
+  for (i = 0; i < count; i++)
+    packet[i] = strtol(bytes[i], NULL, 0);
+      
+  fprintf(stderr,"Sending ");
+  for (i = 0; i < count; i++)
+    fprintf(stderr, " %02x", packet[i]);
+  fprintf(stderr, "\n");
+
+  if (write_serial_packet(src, packet, count) == 0)
+    printf("ack\n");
+  else
+    printf("noack\n");
+}
+
+int main(int argc, char **argv)
+{
+  serial_source src;
+
+  if (argc < 3)
+    {
+      fprintf(stderr, "Usage: %s <device> <rate> <bytes> - send a raw packet to a serial port\n", argv[0]);
+      exit(2);
+    }
+  src = open_serial_source(argv[1], platform_baud_rate(argv[2]), 0, stderr_msg);
+  if (!src)
+    {
+      fprintf(stderr, "Couldn't open serial port at %s:%s\n",
+	      argv[1], argv[2]);
+      exit(1);
+    }
+
+  send_packet(src, argv + 3, argc - 3);
+}
diff --git a/support/sdk/c/sf/serialsource.c b/support/sdk/c/sf/serialsource.c
new file mode 100644
index 00000000..dd8c78a8
--- /dev/null
+++ b/support/sdk/c/sf/serialsource.c
@@ -0,0 +1,980 @@
+#if defined(_WIN32) && !defined(__CYGWIN__)
+/* Avoid confusing windows w/o cygwin w/ cygwin */
+#define LOSE32
+#endif
+
+#ifndef LOSE32
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <termios.h>
+#include <unistd.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+#include <sys/time.h>
+#include <stdio.h>
+#ifdef __CYGWIN__
+#include <windows.h>
+#include <io.h>
+#else
+#include <stdint.h>
+#endif
+#endif
+
+#ifdef LOSE32
+#include <windows.h>
+#include <stdint.h>
+#endif
+
+/* C implementation of the mote serial protocol. See
+   net.tinyos.packet.Packetizer for more details */
+
+#undef DEBUG
+
+#include "serialsource.h"
+#include "serialprotocol.h"
+
+typedef int bool;
+
+enum {
+#ifndef __CYGWIN__
+#ifndef LOSE32
+  FALSE = 0,
+  TRUE = 1,
+#endif
+#endif
+  BUFSIZE = 256,
+  MTU = 256,
+  ACK_TIMEOUT = 100000, /* in us */
+  SYNC_BYTE = SERIAL_HDLC_FLAG_BYTE,
+  ESCAPE_BYTE = SERIAL_HDLC_CTLESC_BYTE,
+
+  P_ACK = SERIAL_SERIAL_PROTO_ACK,
+  P_PACKET_ACK = SERIAL_SERIAL_PROTO_PACKET_ACK,
+  P_PACKET_NO_ACK = SERIAL_SERIAL_PROTO_PACKET_NOACK,
+  P_UNKNOWN = SERIAL_SERIAL_PROTO_PACKET_UNKNOWN
+};
+
+struct packet_list
+{
+  uint8_t *packet;
+  int len;
+  struct packet_list *next;
+};
+
+struct serial_source_t {
+#ifndef LOSE32
+  int fd;
+#else
+  HANDLE hComm;
+#endif
+  bool non_blocking;
+  void (*message)(serial_source_msg problem);
+
+  /* Receive state */
+  struct {
+    uint8_t buffer[BUFSIZE];
+    int bufpos, bufused;
+    uint8_t packet[MTU];
+    bool in_sync, escaped;
+    int count;
+    struct packet_list *queue[256]; // indexed by protocol
+  } recv;
+  struct {
+    uint8_t seqno;
+    uint8_t *escaped;
+    int escapeptr;
+    uint16_t crc;
+  } send;
+};
+
+#ifndef LOSE32
+static tcflag_t parse_baudrate(int requested)
+{
+  int baudrate;
+
+  switch (requested)
+    {
+#ifdef B50
+    case 50: baudrate = B50; break;
+#endif
+#ifdef B75
+    case 75: baudrate = B75; break;
+#endif
+#ifdef B110
+    case 110: baudrate = B110; break;
+#endif
+#ifdef B134
+    case 134: baudrate = B134; break;
+#endif
+#ifdef B150
+    case 150: baudrate = B150; break;
+#endif
+#ifdef B200
+    case 200: baudrate = B200; break;
+#endif
+#ifdef B300
+    case 300: baudrate = B300; break;
+#endif
+#ifdef B600
+    case 600: baudrate = B600; break;
+#endif
+#ifdef B1200
+    case 1200: baudrate = B1200; break;
+#endif
+#ifdef B1800
+    case 1800: baudrate = B1800; break;
+#endif
+#ifdef B2400
+    case 2400: baudrate = B2400; break;
+#endif
+#ifdef B4800
+    case 4800: baudrate = B4800; break;
+#endif
+#ifdef B9600
+    case 9600: baudrate = B9600; break;
+#endif
+#ifdef B19200
+    case 19200: baudrate = B19200; break;
+#endif
+#ifdef B38400
+    case 38400: baudrate = B38400; break;
+#endif
+#ifdef B57600
+    case 57600: baudrate = B57600; break;
+#endif
+#ifdef B115200
+    case 115200: baudrate = B115200; break;
+#endif
+#ifdef B230400
+    case 230400: baudrate = B230400; break;
+#endif
+#ifdef B460800
+    case 460800: baudrate = B460800; break;
+#endif
+#ifdef B500000
+    case 500000: baudrate = B500000; break;
+#endif
+#ifdef B576000
+    case 576000: baudrate = B576000; break;
+#endif
+#ifdef B921600
+    case 921600: baudrate = B921600; break;
+#endif
+#ifdef B1000000
+    case 1000000: baudrate = B1000000; break;
+#endif
+#ifdef B1152000
+    case 1152000: baudrate = B1152000; break;
+#endif
+#ifdef B1500000
+    case 1500000: baudrate = B1500000; break;
+#endif
+#ifdef B2000000
+    case 2000000: baudrate = B2000000; break;
+#endif
+#ifdef B2500000
+    case 2500000: baudrate = B2500000; break;
+#endif
+#ifdef B3000000
+    case 3000000: baudrate = B3000000; break;
+#endif
+#ifdef B3500000
+    case 3500000: baudrate = B3500000; break;
+#endif
+#ifdef B4000000
+    case 4000000: baudrate = B4000000; break;
+#endif
+    default:
+      baudrate = 0;
+    }
+  return baudrate;
+}
+#endif
+
+#ifdef DEBUG
+static void dump(const char *msg, unsigned char *packet, int len)
+{
+  int i;
+
+  printf("%s", msg);
+  for (i = 0; i < len; i++)
+    printf(" %02x", packet[i]);
+  putchar('\n');
+}
+#endif
+
+static void message(serial_source src, serial_source_msg msg)
+{
+  if (src->message)
+    src->message(msg);
+}
+
+static int serial_read(serial_source src, int non_blocking, void *buffer, int n)
+{
+#ifndef LOSE32
+  fd_set fds;
+  int cnt;
+
+  if (non_blocking)
+    {
+      cnt = read(src->fd, buffer, n);
+
+      /* Work around buggy usb serial driver (returns 0 when no data
+	 is available). Mac OS X seems to like to do this too (at
+	 least with a Keyspan 49WG).
+      */
+      if (cnt == 0)
+	{
+	  cnt = -1;
+	  errno = EAGAIN;
+	}
+      return cnt;
+    }
+  else
+    for (;;)
+      {
+	FD_ZERO(&fds);
+	FD_SET(src->fd, &fds);
+	cnt = select(src->fd + 1, &fds, NULL, NULL, NULL);
+	if (cnt < 0)
+	  return -1;
+
+	cnt = read(src->fd, buffer, n);
+	if (cnt != 0)
+	  return cnt;
+      }
+#else // LOSE32
+  int cnt;
+
+  if (non_blocking) {
+    ReadFile(src->hComm, buffer, n, &cnt, NULL);
+
+    return cnt;
+
+  } else {
+      for (;;) {
+          DWORD eventMask;
+          SetCommMask(src->hComm, EV_RXCHAR);
+          if (!WaitCommEvent(src->hComm, &eventMask, NULL)) {
+              return -1;
+          }
+
+          ReadFile(src->hComm, buffer, n, &cnt, NULL);
+
+          if (cnt != 0) {
+            return cnt;
+          }
+      }
+  }
+#endif
+}
+
+serial_source open_serial_source(const char *device, int baud_rate,
+				 int non_blocking,
+				 void (*message)(serial_source_msg problem))
+/* Effects: opens serial port device at specified baud_rate. If non_blocking
+     is true, read_serial_packet calls will be non-blocking (writes are
+     always blocking, for now at least)
+   Returns: descriptor for serial forwarder at host:port, or
+     NULL for failure (bad device or bad baud rate)
+ */
+{
+#ifndef LOSE32
+  struct termios newtio;
+  int fd;
+  tcflag_t baudflag = parse_baudrate(baud_rate);
+
+  if (!baudflag)
+    return NULL;
+
+  fd = open(device, O_RDWR | O_NOCTTY | O_NONBLOCK);
+  if (fd < 0)
+    return NULL;
+
+#ifdef __CYGWIN__
+  /* For some very mysterious reason, this incantation is necessary to make
+     the serial port work under some windows machines */
+  HANDLE handle = (HANDLE)get_osfhandle(fd);
+  DCB dcb;
+  if (!(GetCommState(handle, &dcb) && SetCommState(handle, &dcb)))
+    {
+      close(fd);
+      return NULL;
+    }
+#endif
+  /* Serial port setting */
+  memset(&newtio, 0, sizeof(newtio));
+  newtio.c_cflag = CS8 | CLOCAL | CREAD;
+  newtio.c_iflag = IGNPAR | IGNBRK;
+  cfsetispeed(&newtio, baudflag);
+  cfsetospeed(&newtio, baudflag);
+
+  /* Raw output_file */
+  newtio.c_oflag = 0;
+
+  if (tcflush(fd, TCIFLUSH) >= 0 &&
+      tcsetattr(fd, TCSANOW, &newtio) >= 0)
+    {
+      serial_source src = malloc(sizeof *src);
+
+      if (src)
+	{
+	  memset(src, 0, sizeof *src);
+	  src->fd = fd;
+	  src->non_blocking = non_blocking;
+	  src->message = message;
+	  src->send.seqno = 37;
+
+	  return src;
+	}
+    }
+  close(fd);
+
+  return NULL;
+#else // LOSE32
+	LPCTSTR       ComName = (LPCTSTR)device;
+    HANDLE        hComm;
+	DCB           dcb;
+    serial_source src;
+
+	int buflen = MultiByteToWideChar(CP_ACP,0,(PCSTR)device,-1,(LPWSTR)ComName,0);
+	MultiByteToWideChar(CP_ACP,0,(PCSTR)device,-1,(LPWSTR)ComName,buflen);
+	
+	//syncronize
+	hComm = CreateFile(ComName,  GENERIC_READ | GENERIC_WRITE,  0,  NULL,  OPEN_EXISTING,
+					FILE_ATTRIBUTE_NORMAL, NULL);
+
+    if (hComm == INVALID_HANDLE_VALUE) {
+        return NULL;
+    }
+
+    PurgeComm(hComm, PURGE_RXCLEAR);
+
+	GetCommState(hComm, &dcb); 
+	dcb.BaudRate = baud_rate;
+	dcb.ByteSize = 8;
+	dcb.Parity = NOPARITY;
+	dcb.fParity = FALSE;
+	dcb.StopBits = ONESTOPBIT;
+    if (SetCommState(hComm, &dcb) == 0) {
+        return NULL;
+    }
+
+    src = malloc(sizeof *src);
+
+    if (src) {
+	  memset(src, 0, sizeof *src);
+	  src->hComm = hComm;
+	  src->non_blocking = non_blocking;
+	  src->message = message;
+	  src->send.seqno = 37;
+
+	}
+
+	return src;
+
+#endif // LOSE32
+}
+
+#ifndef LOSE32
+int serial_source_fd(serial_source src)
+/* Returns: the file descriptor used by serial source src (useful when
+     non-blocking reads were requested)
+*/
+{
+  return src->fd;
+}
+#endif
+
+#ifdef LOSE32
+HANDLE serial_source_handle(serial_source src)
+/* Returns: the file descriptor used by serial source src (useful when
+     non-blocking reads were requested)
+*/
+{
+  return src->hComm;
+}
+#endif
+
+int close_serial_source(serial_source src)
+/* Effects: closes serial source src
+   Returns: 0 if successful, -1 if some problem occured (but source is
+     considered closed anyway)
+ */
+{
+#ifndef LOSE32
+  int ok = close(src->fd);
+#else
+  int ok = CloseHandle(src->hComm);
+#endif
+
+  free(src);
+
+  return ok;
+}
+
+static int source_wait(serial_source src, struct timeval *deadline)
+/* Effects: waits until deadline for some data on source. deadline
+     can be NULL for indefinite waiting.
+   Returns: 0 if data is available, -1 if the deadline expires
+*/
+{
+#ifndef LOSE32
+  struct timeval tv;
+  fd_set fds;
+  int cnt;
+
+  if (src->recv.bufpos < src->recv.bufused)
+    return 0;
+
+  for (;;)
+    {
+      if (deadline)
+	{
+	  gettimeofday(&tv, NULL);
+	  tv.tv_sec = deadline->tv_sec - tv.tv_sec;
+	  tv.tv_usec = deadline->tv_usec - tv.tv_usec;
+	  if (tv.tv_usec < 0)
+	    {
+	      tv.tv_usec += 1000000;
+	      tv.tv_sec--;
+	    }
+	  if (tv.tv_sec < 0)
+	    return -1;
+	}
+
+      FD_ZERO(&fds);
+      FD_SET(src->fd, &fds);
+      cnt = select(src->fd + 1, &fds, NULL, NULL, deadline ? &tv : NULL);
+      if (cnt < 0)
+	{
+	  if (errno == EINTR)
+	    continue;
+	  message(src, msg_unix_error);
+	  return -1;
+	}
+      if (cnt == 0)
+	return -1;
+      return 0;
+    }
+#else // LOSE32
+    // FIXME: the deadline is ignored here
+
+    DWORD eventMask;
+    SetCommMask(src->hComm, EV_RXCHAR);
+    if (!WaitCommEvent(src->hComm, &eventMask, NULL)) {
+        return -1;
+    }
+
+    return 0;
+
+#endif
+}
+
+static int source_write(serial_source src, const void *buffer, int count)
+{
+#ifndef LOSE32
+  int actual = 0;
+
+  if (fcntl(src->fd, F_SETFL, 0) < 0)
+    {
+      message(src, msg_unix_error);
+      return -1;
+    }
+  while (count > 0)
+    {
+      int n = write(src->fd, buffer, count);
+
+      if (n < 0 && errno == EINTR)
+	continue;
+      if (n < 0)
+	{
+	  message(src, msg_unix_error);
+	  actual = -1;
+	  break;
+	}
+
+      count -= n;
+      actual += n;
+      buffer += n;
+    }
+  if (fcntl(src->fd, F_SETFL, O_NONBLOCK) < 0)
+    {
+      message(src, msg_unix_error);
+      /* We're in trouble, but there's no obvious fix. */
+    }
+  return actual;
+#else // LOSE32
+    int actual = 0;
+    int n;
+    const unsigned char * b = buffer;
+
+    while (count > 0) {
+      if (!WriteFile(src->hComm, b, count, &n, NULL)) {
+	      message(src, msg_unix_error);
+          actual = -1;
+          break;
+      }
+
+      count  -= n;
+      actual += n;
+      b      += n;
+    }
+
+    return actual;
+#endif
+}
+
+static void push_protocol_packet(serial_source src,
+				 uint8_t type, uint8_t *packet, uint8_t len)
+{
+  /* I'm assuming short queues */
+  struct packet_list *entry = malloc(sizeof *entry), **last;
+
+  if (!entry)
+    {
+      message(src, msg_no_memory);
+      free(packet);
+      return;
+    }
+
+  entry->packet = packet;
+  entry->len = len;
+  entry->next = NULL;
+
+  last = &src->recv.queue[type];
+  while (*last)
+    last = &(*last)->next;
+  *last = entry;
+}
+
+static struct packet_list *pop_protocol_packet(serial_source src, uint8_t type)
+{
+  struct packet_list *entry = src->recv.queue[type];
+
+  if (entry)
+    src->recv.queue[type] = entry->next;
+
+  return entry;
+}
+
+static bool packet_available(serial_source src, uint8_t type)
+{
+  return src->recv.queue[type] != NULL;
+}
+
+int serial_source_empty(serial_source src)
+/* Returns: true if serial source does not contain any pending data, i.e.,
+     if the result is true and there is no data available on the source's
+     file descriptor, then read_serial_packet will:
+       - return NULL if the source is non-blocking
+       - block if it is blocking
+
+    (Note: the presence of this calls allows the serial_source to do some
+    internal buffering)
+*/
+{
+  return src->recv.bufpos >= src->recv.bufused &&
+    !packet_available(src, P_PACKET_NO_ACK);
+}
+
+/* Slow implementation of crc function */
+static uint16_t crc_byte(uint16_t crc, uint8_t b)
+{
+  uint8_t i;
+  
+  crc = crc ^ b << 8;
+  i = 8;
+  do
+    if (crc & 0x8000)
+      crc = crc << 1 ^ 0x1021;
+    else
+      crc = crc << 1;
+  while (--i);
+
+  return crc;
+}
+
+static uint16_t crc_packet(uint8_t *data, int len)
+{
+  uint16_t crc = 0;
+
+  while (len-- > 0)
+    crc = crc_byte(crc, *data++);
+
+  return crc;
+}
+
+static int read_byte(serial_source src, int non_blocking)
+/* Returns: next byte (>= 0), or -1 if no data available and non-blocking is true.
+*/
+{
+  if (src->recv.bufpos >= src->recv.bufused)
+    {
+      for (;;)
+	{
+	  int n = serial_read(src, non_blocking, src->recv.buffer, sizeof src->recv.buffer);
+
+	  if (n == 0) /* Can't occur because of serial_read bug workaround */
+	    {
+	      message(src, msg_closed);
+	      return -1;
+	    }
+	  if (n > 0)
+	    {
+#ifdef DEBUG
+	      dump("raw", src->recv.buffer, n);
+#endif
+	      src->recv.bufpos = 0;
+	      src->recv.bufused = n;
+	      break;
+	    }
+#ifndef LOSE32
+	  if (errno == EAGAIN)
+	    return -1;
+	  if (errno != EINTR)
+	    message(src, msg_unix_error);
+#endif
+    }
+    }
+  //printf("in %02x\n", src->recv.buffer[src->recv.bufpos]);
+  return src->recv.buffer[src->recv.bufpos++];
+}
+
+static void process_packet(serial_source src, uint8_t *packet, int len);
+static int write_framed_packet(serial_source src,
+			       uint8_t packet_type, uint8_t first_byte,
+			       const uint8_t *packet, int count);
+
+static void read_and_process(serial_source src, int non_blocking)
+/* Effects: reads and processes up to one packet.
+*/
+{
+  uint8_t *packet = src->recv.packet;
+
+  for (;;)
+    {
+      int byte = read_byte(src, non_blocking);
+
+      if (byte < 0)
+	return;
+
+      if (!src->recv.in_sync)
+	{
+	  if (byte == SYNC_BYTE)
+	    {
+	      src->recv.in_sync = TRUE;
+	      message(src, msg_sync);
+	      src->recv.count = 0;
+	      src->recv.escaped = FALSE;
+	    }
+	  continue;
+	}
+      if (src->recv.count >= MTU)
+	{
+	  message(src, msg_too_long);
+	  src->recv.in_sync = FALSE;
+	  continue;
+	}
+      if (src->recv.escaped)
+	{
+	  if (byte == SYNC_BYTE)
+	    {
+	      /* sync byte following escape is an error, resync */
+	      message(src, msg_bad_sync);
+	      src->recv.in_sync = FALSE;
+	      continue;
+	    }
+	  byte ^= 0x20;
+	  src->recv.escaped = FALSE;
+	}
+      else if (byte == ESCAPE_BYTE)
+	{
+	  src->recv.escaped = TRUE;
+	  continue;
+	}
+      else if (byte == SYNC_BYTE)
+	{
+	  int count = src->recv.count;
+	  uint8_t *received;
+	  uint16_t read_crc, computed_crc;
+
+	  src->recv.count = 0; /* ready for next packet */
+
+	  if (count < 4)
+	    /* frames that are too small are ignored */
+	    continue;
+
+	  received = malloc(count - 2);
+	  if (!received)
+	    {
+	      message(src, msg_no_memory);
+	      continue;
+	    }
+	  memcpy(received, packet, count - 2);
+
+	  read_crc = packet[count - 2] | packet[count - 1] << 8;
+	  computed_crc = crc_packet(received, count - 2);
+
+#ifdef DEBUG
+	  dump("received", packet, count);
+	  printf("  crc %x comp %x\n", read_crc, computed_crc);
+#endif
+	  if (read_crc == computed_crc) 
+	    {
+	      process_packet(src, received, count - 2);
+	      return; /* give rest of world chance to do something */
+	    }
+	  else
+	    {
+	      message(src, msg_bad_crc);
+	      free(received);
+	      /* We don't lose sync here. If we did, garbage on the line
+		 at startup will cause loss of the first packet. */
+	      continue;
+	    }
+	}
+      packet[src->recv.count++] = byte;
+    }
+}
+
+static void process_packet(serial_source src, uint8_t *packet, int len)
+{
+  int packet_type = packet[0], offset = 1;
+
+  if (packet_type == P_PACKET_ACK)
+    {
+      /* send ack */
+      write_framed_packet(src, P_ACK, packet[1], NULL, 0);
+      /* And merge with un-acked packets */
+      packet_type = P_PACKET_NO_ACK;
+      offset = 2;
+    }
+  /* packet must remain a valid pointer to pass to free. So we move the
+     data rather than pass an internal pointer */
+  memmove(packet, packet + offset, len - offset);
+  push_protocol_packet(src, packet_type, packet, len - offset);
+}
+
+void *read_serial_packet(serial_source src, int *len)
+/* Effects: Read the serial source src. If a packet is available, return it.
+     If in blocking mode and no packet is available, wait for one.
+   Returns: the packet read (in newly allocated memory), with *len is
+     set to the packet length, or NULL if no packet is yet available and
+     the serial source is in non-blocking mode
+*/
+{
+  read_and_process(src, TRUE);
+  for (;;)
+    {
+      struct packet_list *entry;
+
+      entry = pop_protocol_packet(src, P_PACKET_NO_ACK);
+      if (entry)
+	{
+	  uint8_t *packet = entry->packet;
+
+	  *len = entry->len;
+	  free(entry);
+
+	  return packet;
+	}
+      if (src->non_blocking && serial_source_empty(src))
+	return NULL;
+      source_wait(src, NULL);
+      read_and_process(src, src->non_blocking);
+    }
+}
+
+/* The escaper does the sync bytes+escape-like encoding+crc of packets */
+
+static void escape_add(serial_source src, uint8_t b)
+{
+  src->send.escaped[src->send.escapeptr++] = b;
+}
+
+static int init_escaper(serial_source src, int count)
+{
+  src->send.escaped = malloc(count * 2 + 2);
+  if (!src->send.escaped)
+    {
+      message(src, msg_no_memory);
+      return -1;
+    }
+  src->send.escapeptr = 0;
+  src->send.crc = 0;
+
+  escape_add(src, SYNC_BYTE);
+
+  return 0;
+}
+
+static void terminate_escaper(serial_source src)
+{
+  escape_add(src, SYNC_BYTE);
+}
+
+static void escape_byte(serial_source src, uint8_t b)
+{
+  src->send.crc = crc_byte(src->send.crc, b);
+  if (b == SYNC_BYTE || b == ESCAPE_BYTE)
+    {
+      escape_add(src, ESCAPE_BYTE);
+      escape_add(src, b ^ 0x20);
+    }
+  else
+    escape_add(src, b);
+}
+
+static void free_escaper(serial_source src)
+{
+  free(src->send.escaped);
+}
+
+// Write a packet of type 'packetType', first byte 'firstByte'
+// and bytes 2..'count'+1 in 'packet'
+static int write_framed_packet(serial_source src,
+			       uint8_t packet_type, uint8_t first_byte,
+			       const uint8_t *packet, int count)
+{
+  int i, crc;
+
+#ifdef DEBUG
+  printf("writing %02x %02x", packet_type, first_byte);
+  dump("", packet, count);
+#endif
+
+  if (init_escaper(src, count + 4) < 0)
+    return -1;
+	
+  escape_byte(src, packet_type);
+  escape_byte(src, first_byte);
+  for (i = 0; i < count; i++)
+    escape_byte(src, packet[i]);
+
+  crc = src->send.crc;
+  escape_byte(src, crc & 0xff);
+  escape_byte(src, crc >> 8);
+  
+  terminate_escaper(src);
+
+#ifdef DEBUG
+  dump("encoded", src->send.escaped, src->send.escapeptr);
+#endif
+
+  if (source_write(src, src->send.escaped, src->send.escapeptr) < 0)
+    {
+      free_escaper(src);
+      return -1;
+    }
+  free_escaper(src);
+  return 0;
+}
+
+static void add_timeval(struct timeval *tv, long us)
+/* Specialised for this app */
+{
+  tv->tv_sec += us / 1000000;
+  tv->tv_usec += us % 1000000;
+  if (tv->tv_usec > 1000000)
+    {
+      tv->tv_usec -= 1000000;
+      tv->tv_sec++;
+    }
+}
+
+int write_serial_packet(serial_source src, const void *packet, int len)
+/* Effects: writes len byte packet to serial source src
+   Returns: 0 if packet successfully written, 1 if successfully written
+     but not acknowledged, -1 otherwise
+*/
+{
+  struct timeval deadline;
+
+  src->send.seqno++;
+  if (write_framed_packet(src, P_PACKET_ACK, src->send.seqno, packet, len) < 0)
+    return -1;
+
+  // FIXME: the WIN32 implementation of source_wait()
+  //        disregards the deadline parameter anyway
+#ifndef LOSE32
+  gettimeofday(&deadline, NULL);
+  add_timeval(&deadline, ACK_TIMEOUT);
+#endif
+
+  for (;;) 
+    {
+      struct packet_list *entry;
+      
+      read_and_process(src, TRUE);
+      entry = pop_protocol_packet(src, P_ACK);
+      if (entry)
+	{
+	  uint8_t acked = entry->packet[0];
+
+	  free(entry->packet);
+	  free(entry);
+	  if (acked == src->send.seqno)
+	    return 0;
+	}
+      else if (source_wait(src, &deadline) < 0)
+	return 1;
+    }
+}
+
+/* This somewhat convoluted code allows us to use a common baudrate table
+   with the Java code. This could be improved if we generated the Java
+   code from a common table.
+*/
+
+struct pargs {
+  char *name;
+  int rate;
+};
+
+static void padd(struct pargs *args, const char *name, int baudrate)
+{
+  if (!strcmp(args->name, name))
+    args->rate = baudrate;
+}
+
+static void init(void) { }
+
+int platform_baud_rate(char *platform_name)
+/* Returns: The baud rate of the specified platform, or -1 for unknown
+     platforms
+*/
+{
+  /* The Java code looks like Platform.add(Platform.x, "name", baudrate); 
+     Fake up some C stuff which will make that work right. */
+  struct pargs args;
+  struct {
+    void (*add)(struct pargs *args, const char *name, int baudrate);
+    struct pargs *x;
+  } Platform = { padd, &args };
+  static struct {
+    struct {
+      int packet;
+    } tinyos;
+  } net;
+
+  if (isdigit(platform_name[0]))
+    return atoi(platform_name);
+
+  args.name = platform_name;
+  args.rate = -1;
+
+#define class
+#define BaudRate
+#define static
+#define void
+#define throws ;
+#define Exception
+#define package
+#include "../../java/net/tinyos/packet/BaudRate.java"
+
+  return args.rate;
+}
diff --git a/support/sdk/c/sf/serialsource.h b/support/sdk/c/sf/serialsource.h
new file mode 100644
index 00000000..8fa232bd
--- /dev/null
+++ b/support/sdk/c/sf/serialsource.h
@@ -0,0 +1,94 @@
+#ifndef SERIALSOURCE_H
+#define SERIALSOURCE_H
+
+#ifdef _WIN32
+#include <windows.h>
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct serial_source_t *serial_source;
+
+typedef enum {
+  msg_unknown_packet_type,	/* packet of unknown type received */
+  msg_ack_timeout, 		/* ack not received within timeout */
+  msg_sync,			/* sync achieved */
+  msg_too_long,			/* greater than MTU (256 bytes) */
+  msg_too_short,		/* less than 4 bytes */
+  msg_bad_sync,			/* unexpected sync byte received */
+  msg_bad_crc,			/* received packet has bad crc */
+  msg_closed,			/* serial port closed itself */
+  msg_no_memory,		/* malloc failed */
+  msg_unix_error		/* check errno for details */
+} serial_source_msg;
+
+serial_source open_serial_source(const char *device, int baud_rate,
+				 int non_blocking,
+				 void (*message)(serial_source_msg problem));
+/* Effects: opens serial port device at specified baud_rate. If non_blocking
+     is true, read_serial_packet calls will be non-blocking (writes are
+     always blocking, for now at least)
+     If non-null, message will be called to signal various problems during
+     execution.
+   Returns: descriptor for serial forwarder at host:port, or
+     NULL for failure
+ */
+
+#ifndef _WIN32
+int serial_source_fd(serial_source src);
+/* Returns: the file descriptor used by serial source src (useful when
+     non-blocking reads were requested)
+*/
+#endif
+
+#ifdef _WIN32
+HANDLE serial_source_handle(serial_source src);
+/* Returns: the file descriptor used by serial source src (useful when
+     non-blocking reads were requested)
+*/
+#endif
+
+int serial_source_empty(serial_source src);
+/* Returns: true if serial source does not contain any pending data, i.e.,
+     if the result is true and there is no data available on the source's
+     file descriptor, then read_serial_packet will:
+       - return NULL if the source is non-blocking
+       - block if it is blocking
+
+    (Note: the presence of this calls allows the serial_source to do some
+    internal buffering)
+*/
+
+int close_serial_source(serial_source src);
+/* Effects: closes serial source src
+   Returns: 0 if successful, -1 if some problem occured (but source is
+     considered closed anyway)
+ */
+
+void *read_serial_packet(serial_source src, int *len);
+/* Effects: Read the serial source src. If a packet is available, return it.
+     If in blocking mode and no packet is available, wait for one.
+   Returns: the packet read (in newly allocated memory), with *len is
+     set to the packet length, or NULL if no packet is yet available and
+     the serial source is in non-blocking mode
+*/
+
+int write_serial_packet(serial_source src, const void *packet, int len);
+/* Effects: writes len byte packet to serial source src
+   Returns: 0 if packet successfully written, 1 if successfully written
+     but not acknowledged, -1 otherwise
+*/
+
+int platform_baud_rate(char *platform_name);
+/* Returns: The baud rate of the specified platform, or -1 for unknown
+     platforms. If platform_name starts with a digit, just return 
+     atoi(platform_name).
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/support/sdk/c/sf/sf.c b/support/sdk/c/sf/sf.c
new file mode 100644
index 00000000..f26fe810
--- /dev/null
+++ b/support/sdk/c/sf/sf.c
@@ -0,0 +1,298 @@
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <sys/select.h>
+#include <netinet/in.h>
+#include <netdb.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <signal.h>
+
+#include "sfsource.h"
+#include "serialsource.h"
+
+serial_source src;
+int server_socket;
+int packets_read, packets_written, num_clients;
+
+struct client_list
+{
+  struct client_list *next;
+  int fd;
+} *clients;
+
+int unix_check(const char *msg, int result)
+{
+  if (result < 0)
+    {
+      perror(msg);
+      exit(2);
+    }
+
+  return result;
+}
+
+void *xmalloc(size_t s)
+{
+  void *p = malloc(s);
+
+  if (!p)
+    {
+      fprintf(stderr, "out of memory\n");
+      exit(2);
+    }
+  return p;
+}
+
+void fd_wait(fd_set *fds, int *maxfd, int fd)
+{
+  if (fd > *maxfd)
+    *maxfd = fd;
+  FD_SET(fd, fds);
+}
+
+void pstatus(void)
+{
+  printf("clients %d, read %d, wrote %d\n", num_clients, packets_read,
+	 packets_written);
+}
+
+void forward_packet(const void *packet, int len);
+
+
+void add_client(int fd)
+{
+  struct client_list *c = xmalloc(sizeof *c);
+
+  c->next = clients;
+  clients = c;
+  num_clients++;
+  pstatus();
+
+  c->fd = fd;
+}
+
+void rem_client(struct client_list **c)
+{
+  struct client_list *dead = *c;
+
+  *c = dead->next;
+  num_clients--;
+  pstatus();
+  close(dead->fd);
+  free(dead);
+}
+
+void new_client(int fd)
+{
+  fcntl(fd, F_SETFL, 0);
+  if (init_sf_source(fd) < 0)
+    close(fd);
+  else
+    add_client(fd);
+}
+
+void check_clients(fd_set *fds)
+{
+  struct client_list **c;
+
+  for (c = &clients; *c; )
+    {
+      int next = 1;
+
+      if (FD_ISSET((*c)->fd, fds))
+	{
+	  int len;
+	  const void *packet = read_sf_packet((*c)->fd, &len);
+
+	  if (packet)
+	    {
+	      forward_packet(packet, len);
+	      free((void *)packet);
+	    }
+	  else
+	    {
+	      rem_client(c);
+	      next = 0;
+	    }
+	}
+      if (next)
+	c = &(*c)->next;
+    }
+}
+
+void wait_clients(fd_set *fds, int *maxfd)
+{
+  struct client_list *c;
+
+  for (c = clients; c; c = c->next)
+    fd_wait(fds, maxfd, c->fd);
+}
+
+void dispatch_packet(const void *packet, int len)
+{
+  struct client_list **c;
+
+  for (c = &clients; *c; )
+    if (write_sf_packet((*c)->fd, packet, len) >= 0)
+      c = &(*c)->next;
+    else
+      rem_client(c);
+}
+
+void open_server_socket(int port)
+{
+  struct sockaddr_in me;
+  int opt;
+
+  server_socket = unix_check("socket", socket(AF_INET, SOCK_STREAM, 0));
+  unix_check("socket", fcntl(server_socket, F_SETFL, O_NONBLOCK));
+  memset(&me, 0, sizeof me);
+  me.sin_family = AF_INET;
+  me.sin_port = htons(port);
+
+  opt = 1;
+  unix_check("setsockopt", setsockopt(server_socket, SOL_SOCKET, SO_REUSEADDR,
+				     (char *)&opt, sizeof(opt)));
+                                                                           
+  unix_check("bind", bind(server_socket, (struct sockaddr *)&me, sizeof me));
+  unix_check("listen", listen(server_socket, 5));
+}
+
+void check_new_client(void)
+{
+  int clientfd = accept(server_socket, NULL, NULL);
+
+  if (clientfd >= 0)
+    new_client(clientfd);
+}
+
+
+
+
+
+void stderr_msg(serial_source_msg problem)
+{
+  static char *msgs[] = {
+    "unknown_packet_type",
+    "ack_timeout"	,
+    "sync"	,
+    "too_long"	,
+    "too_short"	,
+    "bad_sync"	,
+    "bad_crc"	,
+    "closed"	,
+    "no_memory"	,
+    "unix_error"
+  };
+
+  fprintf(stderr, "Note: %s\n", msgs[problem]);
+}
+
+void open_serial(const char *dev, int baud)
+{
+    char ldev[80]; 
+#ifdef __CYGWIN__
+    int portnum;
+    if (strncasecmp(dev, "COM", 3) == 0)
+      {
+	fprintf(stderr, "Warning: you're attempting to open a Windows rather that a Cygwin device.  Retrying with "); 
+	portnum=atoi(dev+3);
+	sprintf(ldev, "/dev/ttyS%d",portnum-1);
+	fprintf(stderr,ldev);
+	fprintf(stderr, "\n");
+      } 
+    else
+#endif
+    strcpy(ldev, dev); 
+
+  src = open_serial_source(ldev, baud, 1, stderr_msg);
+  if (!src)
+    {
+      fprintf(stderr, "Couldn't open serial port at %s:%d\n", dev, baud);
+      exit(1);
+    }
+}
+
+void check_serial(void)
+{
+  int len;
+  const unsigned char *packet = read_serial_packet(src, &len);
+
+  if (packet)
+    {
+      packets_read++;
+      dispatch_packet(packet, len);
+      free((void *)packet);
+    }
+}
+
+void forward_packet(const void *packet, int len)
+{
+  int ok = write_serial_packet(src, packet, len);
+
+  packets_written++;
+  if (ok < 0)
+    exit(2);
+  if (ok > 0)
+    fprintf(stderr, "Note: write failed\n");
+}
+
+int main(int argc, char **argv)
+{
+  int serfd;
+
+  if (argc != 4)
+    {
+      fprintf(stderr,
+	      "Usage: %s <port> <device> <rate> - act as a serial forwarder on <port>\n"
+	      "(listens to serial port <device> at baud rate <rate>)\n" ,
+	      argv[0]);
+      exit(2);
+    }
+
+  if (signal(SIGPIPE, SIG_IGN) == SIG_ERR)
+    fprintf(stderr, "Warning: failed to ignore SIGPIPE.\n");
+
+  open_serial(argv[2], platform_baud_rate(argv[3]));
+  serfd = serial_source_fd(src);
+  open_server_socket(atoi(argv[1]));
+
+  for (;;)
+    {
+      fd_set rfds;
+      int maxfd = -1;
+      struct timeval zero;
+      int serial_empty;
+      int ret;
+
+      zero.tv_sec = zero.tv_usec = 0;
+
+      FD_ZERO(&rfds);
+      fd_wait(&rfds, &maxfd, serfd);
+      fd_wait(&rfds, &maxfd, server_socket);
+      wait_clients(&rfds, &maxfd);
+
+      serial_empty = serial_source_empty(src);
+      if (serial_empty)
+	ret = select(maxfd + 1, &rfds, NULL, NULL, NULL);
+      else
+	{
+	  ret = select(maxfd + 1, &rfds, NULL, NULL, &zero);
+	  check_serial();
+	}
+      if (ret >= 0)
+	{
+	  if (FD_ISSET(serfd, &rfds))
+	    check_serial();
+
+	  if (FD_ISSET(server_socket, &rfds))
+	    check_new_client();
+
+	  check_clients(&rfds);
+	}
+    }
+}
diff --git a/support/sdk/c/sf/sflisten.c b/support/sdk/c/sf/sflisten.c
new file mode 100644
index 00000000..845780c6
--- /dev/null
+++ b/support/sdk/c/sf/sflisten.c
@@ -0,0 +1,35 @@
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "sfsource.h"
+
+int main(int argc, char **argv)
+{
+  int fd;
+
+  if (argc != 3)
+    {
+      fprintf(stderr, "Usage: %s <host> <port> - dump packets from a serial forwarder\n", argv[0]);
+      exit(2);
+    }
+  fd = open_sf_source(argv[1], atoi(argv[2]));
+  if (fd < 0)
+    {
+      fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n",
+	      argv[1], argv[2]);
+      exit(1);
+    }
+  for (;;)
+    {
+      int len, i;
+      const unsigned char *packet = read_sf_packet(fd, &len);
+
+      if (!packet)
+	exit(0);
+      for (i = 0; i < len; i++)
+	printf("%02x ", packet[i]);
+      putchar('\n');
+      fflush(stdout);
+      free((void *)packet);
+    }
+}
diff --git a/support/sdk/c/sf/sfsend.c b/support/sdk/c/sf/sfsend.c
new file mode 100644
index 00000000..73043152
--- /dev/null
+++ b/support/sdk/c/sf/sfsend.c
@@ -0,0 +1,47 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+
+#include "sfsource.h"
+
+void send_packet(int fd, char **bytes, int count)
+{
+  int i;
+  unsigned char *packet;
+
+  packet = malloc(count);
+  if (!packet)
+    exit(2);
+
+  for (i = 0; i < count; i++)
+    packet[i] = strtol(bytes[i], NULL, 0);
+      
+  fprintf(stderr,"Sending ");
+  for (i = 0; i < count; i++)
+    fprintf(stderr, " %02x", packet[i]);
+  fprintf(stderr, "\n");
+
+  write_sf_packet(fd, packet, count);
+}
+
+int main(int argc, char **argv)
+{
+  int fd;
+
+  if (argc < 4)
+    {
+      fprintf(stderr, "Usage: %s <host> <port> <bytes> - send a raw packet to a serial forwarder\n", argv[0]);
+      exit(2);
+    }
+  fd = open_sf_source(argv[1], atoi(argv[2]));
+  if (fd < 0)
+    {
+      fprintf(stderr, "Couldn't open serial forwarder at %s:%s\n",
+	      argv[1], argv[2]);
+      exit(1);
+    }
+
+  send_packet(fd, argv + 3, argc - 3);
+
+  close(fd);
+}
diff --git a/support/sdk/c/sf/sfsource.c b/support/sdk/c/sf/sfsource.c
new file mode 100644
index 00000000..ecde05c6
--- /dev/null
+++ b/support/sdk/c/sf/sfsource.c
@@ -0,0 +1,161 @@
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <netinet/in.h>
+#include <netdb.h>
+#include <unistd.h>
+#include <errno.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "sfsource.h"
+
+int saferead(int fd, void *buffer, int count)
+{
+  int actual = 0;
+
+  while (count > 0)
+    {
+      int n = read(fd, buffer, count);
+
+      if (n == -1 && errno == EINTR)
+	continue;
+      if (n == -1)
+	return -1;
+      if (n == 0)
+	return actual;
+
+      count -= n;
+      actual += n;
+      buffer = (char*)buffer + n;
+    }
+  return actual;
+}
+
+int safewrite(int fd, const void *buffer, int count)
+{
+  int actual = 0;
+
+  while (count > 0)
+    {
+      int n = write(fd, buffer, count);
+
+      if (n == -1 && errno == EINTR)
+	continue;
+      if (n == -1)
+	return -1;
+
+      count -= n;
+      actual += n;
+      buffer = (char*)buffer + n;
+    }
+  return actual;
+}
+
+int open_sf_source(const char *host, int port)
+/* Returns: file descriptor for serial forwarder at host:port
+ */
+{
+  int fd = socket(AF_INET, SOCK_STREAM, 0);
+  struct hostent *entry;
+  struct sockaddr_in addr;
+
+  if (fd < 0)
+    return fd;
+
+  entry = gethostbyname(host);
+  if (!entry)
+    {
+      close(fd);
+      return -1;
+    }      
+
+  addr.sin_family = entry->h_addrtype;
+  memcpy(&addr.sin_addr, entry->h_addr_list[0], entry->h_length);
+  addr.sin_port = htons(port);
+  if (connect(fd, (struct sockaddr *)&addr, sizeof addr) < 0)
+    {
+      close(fd);
+      return -1;
+    }
+
+  if (init_sf_source(fd) < 0)
+    {
+      close(fd);
+      return -1;
+    }
+
+  return fd;
+}
+
+int init_sf_source(int fd)
+/* Effects: Checks that fd is following the TinyOS 2.0 serial forwarder 
+     protocol. Use this if you obtain your file descriptor from some other
+     source than open_sf_source (e.g., you're a server)
+   Returns: 0 if it is, -1 otherwise
+ */
+{
+  char check[2], us[2];
+  int version;
+
+  /* Indicate version and check if a TinyOS 2.0 serial forwarder on the
+     other end */
+  us[0] = 'U'; us[1] = ' ';
+  if (safewrite(fd, us, 2) != 2 ||
+      saferead(fd, check, 2) != 2 ||
+      check[0] != 'U')
+    return -1;
+
+  version = check[1];
+  if (us[1] < version)
+    version = us[1];
+
+  /* Add other cases here for later protocol versions */
+  switch (version)
+    {
+    case ' ': break;
+    default: return -1; /* not a valid version */
+    }
+
+  return 0;
+}
+
+void *read_sf_packet(int fd, int *len)
+/* Effects: reads packet from serial forwarder on file descriptor fd
+   Returns: the packet read (in newly allocated memory), and *len is
+     set to the packet length, or NULL for failure
+*/
+{
+  unsigned char l;
+  void *packet;
+
+  if (saferead(fd, &l, 1) != 1)
+    return NULL;
+
+  packet = malloc(l);
+  if (!packet)
+    return NULL;
+
+  if (saferead(fd, packet, l) != l)
+    {
+      free(packet);
+      return NULL;
+    }
+  *len = l;
+  
+  return packet;
+}
+
+int write_sf_packet(int fd, const void *packet, int len)
+/* Effects: writes len byte packet to serial forwarder on file descriptor
+     fd
+   Returns: 0 if packet successfully written, -1 otherwise
+*/
+{
+  unsigned char l = len;
+
+  if (safewrite(fd, &l, 1) != 1 ||
+      safewrite(fd, packet, l) != l)
+    return -1;
+
+  return 0;
+}
diff --git a/support/sdk/c/sf/sfsource.h b/support/sdk/c/sf/sfsource.h
new file mode 100644
index 00000000..b6c2b923
--- /dev/null
+++ b/support/sdk/c/sf/sfsource.h
@@ -0,0 +1,36 @@
+#ifndef SFSOURCE_H
+#define SFSOURCE_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int open_sf_source(const char *host, int port);
+/* Returns: file descriptor for TinyOS 2.0 serial forwarder at host:port, or
+     -1 for failure
+ */
+
+int init_sf_source(int fd);
+/* Effects: Checks that fd is following the TinyOS 2.0 serial forwarder 
+     protocol. Use this if you obtain your file descriptor from some other
+     source than open_sf_source (e.g., you're a server)
+   Returns: 0 if it is, -1 otherwise
+ */
+
+void *read_sf_packet(int fd, int *len);
+/* Effects: reads packet from serial forwarder on file descriptor fd
+   Returns: the packet read (in newly allocated memory), and *len is
+     set to the packet length
+*/
+
+int write_sf_packet(int fd, const void *packet, int len);
+/* Effects: writes len byte packet to serial forwarder on file descriptor
+     fd
+   Returns: 0 if packet successfully written, -1 otherwise
+*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/support/sdk/cpp/sf/Makefile b/support/sdk/cpp/sf/Makefile
new file mode 100644
index 00000000..255ffb90
--- /dev/null
+++ b/support/sdk/cpp/sf/Makefile
@@ -0,0 +1,60 @@
+#
+# Copyright (c) 2007, Technische Universitaet Berlin
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without 
+# modification, are permitted provided that the following conditions 
+# are met:
+# - Redistributions of source code must retain the above copyright notice,
+#   this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright 
+#   notice, this list of conditions and the following disclaimer in the 
+#   documentation and/or other materials provided with the distribution.
+# - Neither the name of the Technische Universitaet Berlin nor the names 
+#   of its contributors may be used to endorse or promote products derived
+#   from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+# TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+# OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+# OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#
+# @author Philipp Huppertz <huppertz@tkn.tu-berlin.de> 
+# @author Andreas Koepke   <koepke@tkn.tu-berlin.de>
+#
+
+
+CC=g++
+CFLAGS= -Wall -O3 -pthread
+
+all: sf
+
+sf: sf.o sfcontrol.o serialcomm.o tcpcomm.o basecomm.o packetbuffer.o sfpacket.o
+	$(CC) $(CFLAGS) sf.o sfcontrol.o serialcomm.o tcpcomm.o basecomm.o packetbuffer.o sfpacket.o -o sf
+
+%.o: %.cpp
+	$(CC) -c $(CFLAGS) $<
+
+serialcomm.o: serialcomm.cpp serialcomm.h basecomm.h sfpacket.h packetbuffer.h sharedinfo.h
+
+tcpcomm.o: tcpcomm.cpp sharedinfo.h tcpcomm.h sfpacket.h packetbuffer.h basecomm.h
+
+sfpacket.o: sfpacket.cpp sfpacket.h serialprotocol.h
+
+basecomm.o: basecomm.cpp basecomm.h 
+
+sfcontrol.o: sfcontrol.cpp sfcontrol.h sharedinfo.h packetbuffer.h tcpcomm.h serialcomm.h
+
+packetbuffer.o: packetbuffer.cpp packetbuffer.h sfpacket.h
+
+clean:
+	rm -rf *.o sf
+
diff --git a/support/sdk/cpp/sf/README.txt b/support/sdk/cpp/sf/README.txt
new file mode 100644
index 00000000..5ad11d81
--- /dev/null
+++ b/support/sdk/cpp/sf/README.txt
@@ -0,0 +1,157 @@
+1. PREFACE:
+
+  This is a re-implementation of the C serial forwarder, covering the
+  same functionality with some improvements. 
+
+  It maintains the features of the C version (low CPU usage, small
+  memory footprint), but with increased reliability: it does not loose
+  packets while it waits for an ACK from the mote. In addition it has
+  a control interface listening on a port, so if you run it as a
+  daemon you can still ask it for various statistics, start and stop
+  additional SFs for individual motes...
+
+  C++ makes this implementation a bit more readable. 
+
+2. INSTALLATION:
+
+  Make sure that your environment has a C++ compiler, supports POSIX
+  threads and can make a select on files and on sockets.
+
+  cd to src
+
+  Open the Makefile and adjust the CC variable and the CFLAGS to match
+  your environment. Please pay attention to the -c (compile only) flag
+  in the stem rule. If you use a Linux and g++ you should be fine out
+  of the box.
+
+  run make and wait
+
+  Your compiler might issue a warning: 
+
+    "sfpacket.cpp: warning: comparison is always true due to limited range
+       of data type"
+
+  you can safely ignore it.
+
+  You should end up with an exectuable called sf in this directory, copy
+  it whereever you need it.
+
+  TODO: some of the things can be caught if we use a automake/autoconf
+  environment. This is an overkill until we iron out the different
+  platforms.
+
+3. USAGE
+  Start it with: sf 
+  or           : sf control-port PORT_NUMBER daemon
+
+  Arguments:
+        control-port PORT_NUMBER : TCP port on which commands are
+        accepted, to play with it: use telnet. Commands are executed
+        once a new line '\n' is entered. If you write your own client,
+        make sure that it sends a terminating '\n' after the command. 
+	
+        daemon : this switch (if present) makes sf aware that it may
+        be running as a daemon. Currently this only means that it will
+        not read from stdin.
+
+  No arguments:
+        If sf is started without arguments it listen on
+        standard input for commands (for a list type "help" when sf is running).
+        If it is started with a given control-port (e.g.: sf control-port 9009)
+        sf listen on the given TCP control port _and_ the standard
+        input.
+
+  Once you have it running and accepting commands either via the TCP
+  port or via stdin, you can issue several commands (executed once a
+  new line '\n' is entered):
+
+  start - starts a sf-server on a given port and device
+  stop  - stops a running sf-server
+  list  - lists all running sf-servers
+  info  - prints out some information about a given sf-server
+  close - closes the TCP connection to the control-client
+  exit  - immediatly exits and kills all running sf-servers
+
+  By typing "help" followd by a command (e.g.: "help start" detailed
+  information about that command is printed.
+
+  The parameters of start are modelled after the command line of the C
+  serial forwarder.
+
+  The info command prints out some stats:
+
+    The TCP SIDE (this is where your PC side application hooks up to the
+    SF) prints:
+
+    clients: the number of clients (or PC side apps/MoteIFs) connected to
+      this port. 
+
+    packets read: correct packets received via TCP
+
+    packets written: packets send vi TCP to your application
+
+    The SERIAL LINE interface prints:
+      packets read: the number of packets read from the mote.
+
+      dropped: the number of packets that could not be send via TCP
+       (usually because no client was connected)
+
+      bad: number of packets with CRC or length errors, often 1: it
+       needs a packet to synchronize to the stream.
+
+      packets written: packets written to the mote
+
+	      dropped: number of packets where no ACK was received
+	      from the mote after 25 retries (with linear increasing
+	      backoff). Go check your mote application ;-)
+
+  	      total retries: total number of packets where ACKs from
+	      the motes where not received in time. These packets are
+	      usually ACKed on a retry, these are not in failures in
+	      general.
+
+4. AUTHOR
+
+  Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+
+5. MAINTAINERS
+
+  Andreas Koepke <koepke@tkn.tu-berlin.de>
+  Jan Hauer      <hauer@tkn.tu-berlin.de>
+
+6. KNOWN BUGS
+
+   - Only one control client is allowed at one point in time.
+   - The daemon switch is less powerful than it promises.
+   - serialprotocol.h should be generated, as is done for the C
+     version.
+   - automake/autoconf build is missing
+
+7. LICENSE
+
+  Copyright (c) 2007, Technische Universitaet Berlin
+  All rights reserved.
+ 
+  Redistribution and use in source and binary forms, with or without 
+  modification, are permitted provided that the following conditions 
+  are met:
+  - Redistributions of source code must retain the above copyright notice,
+    this list of conditions and the following disclaimer.
+  - Redistributions in binary form must reproduce the above copyright 
+    notice, this list of conditions and the following disclaimer in the 
+    documentation and/or other materials provided with the distribution.
+  - Neither the name of the Technische Universitaet Berlin nor the names 
+    of its contributors may be used to endorse or promote products derived
+    from this software without specific prior written permission.
+ 
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+  TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+  OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
\ No newline at end of file
diff --git a/support/sdk/cpp/sf/basecomm.cpp b/support/sdk/cpp/sf/basecomm.cpp
new file mode 100644
index 00000000..788349d6
--- /dev/null
+++ b/support/sdk/cpp/sf/basecomm.cpp
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+
+#include <errno.h>
+#include <iostream>
+
+#include "basecomm.h"
+
+BaseComm::BaseComm()
+{
+}
+
+
+BaseComm::~BaseComm()
+{
+}
+
+/* all count bytes must be read before returning - blocking in that way... */
+int BaseComm::readFD(int fd, char *buffer, int count, int *err)
+{
+    int actual = 0;
+    while (count > 0)
+    {
+        int n = read(fd, buffer, count);
+        if (n == -1)
+        {
+            *err = errno;
+            return -1;
+        }
+        if (n == 0)
+        {
+            return actual;
+        }
+        count -= n;
+        actual += n;
+        buffer += n;
+    }
+    return actual;
+}
+
+/* all count bytes must be written before returning - blocking in that way... */
+int BaseComm::writeFD(int fd, const char *buffer, int count, int *err)
+{
+    int actual = 0;
+    while (count > 0)
+    {
+        int n = write(fd, buffer, count);
+        if(n == -1)
+        {
+            if(errno != 0) {
+                *err = errno;
+                return -1;
+            }
+            else {
+                // looks like a temporary glitch
+                n = 0;
+            }
+        }
+        count -= n;
+        actual += n;
+        buffer += n;
+    }
+    return actual;
+}
diff --git a/support/sdk/cpp/sf/basecomm.h b/support/sdk/cpp/sf/basecomm.h
new file mode 100644
index 00000000..be45e222
--- /dev/null
+++ b/support/sdk/cpp/sf/basecomm.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#ifndef BASECOMM_H
+#define BASECOMM_H
+
+class BaseComm
+{
+public:
+    BaseComm();
+
+    virtual ~BaseComm();
+protected:
+    /* performs blocking read on fd */
+    virtual int readFD(int fd, char *buffer, int count, int *err);
+
+    /* performs blocking write on fd */
+    virtual int writeFD(int fd, const char *buffer, int count, int *err);
+};
+
+#endif
diff --git a/support/sdk/cpp/sf/build.xml b/support/sdk/cpp/sf/build.xml
new file mode 100644
index 00000000..f2723c08
--- /dev/null
+++ b/support/sdk/cpp/sf/build.xml
@@ -0,0 +1,10 @@
+<project name="tinyos-2.x support sdk cpp sf" default="all">
+
+	<target name="all" >
+		<echo message = "Building support sdk cpp sf" />
+		<exec executable="make" failonerror="true">
+			<arg line="all" />
+		</exec>
+	</target>
+
+</project>
diff --git a/support/sdk/cpp/sf/packetbuffer.cpp b/support/sdk/cpp/sf/packetbuffer.cpp
new file mode 100644
index 00000000..635f434e
--- /dev/null
+++ b/support/sdk/cpp/sf/packetbuffer.cpp
@@ -0,0 +1,167 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#include "packetbuffer.h"
+
+#include "pthread.h"
+#include <algorithm>
+
+PacketBuffer::PacketBuffer()
+{
+    pthread_mutex_init(&buffer.lock, NULL);
+    pthread_cond_init(&buffer.notempty, NULL);
+    pthread_cond_init(&buffer.notfull, NULL);
+}
+
+
+PacketBuffer::~PacketBuffer()
+{
+  pthread_cond_destroy(&buffer.notempty);
+  pthread_cond_destroy(&buffer.notfull);
+  pthread_mutex_destroy(&buffer.lock);
+}
+
+// clears the buffer
+void PacketBuffer::clear() {
+    pthread_testcancel();
+    pthread_mutex_lock(&buffer.lock);
+    // clear
+    buffer.container.clear();
+    DEBUG("PacketBuffer::clear : cleared buffer and signal <notfull>")
+    pthread_cond_signal(&buffer.notfull);
+    pthread_mutex_unlock(&buffer.lock);
+}
+
+// gets a packet from the buffer (NULL = buffer empty)
+SFPacket PacketBuffer::dequeue()
+{
+    SFPacket packet;
+    pthread_testcancel();
+    pthread_cleanup_push((void(*)(void*)) pthread_mutex_unlock, (void *) &buffer.lock);
+    pthread_mutex_lock(&buffer.lock);
+    // wait until buffer is _not_ empty
+    while(buffer.container.size() == 0)
+    {
+        DEBUG("PacketBuffer::dequeue : waiting until buffer is <notempty>")
+        pthread_cond_wait(&buffer.notempty, &buffer.lock);
+    }
+    // dequeue
+    packet = buffer.container.front();
+    buffer.container.pop_front();
+    DEBUG("PacketBuffer::dequeue : get from buffer and signal <notfull>")
+    pthread_cond_signal(&buffer.notfull);
+    pthread_cleanup_pop(1); 
+    return packet;
+}
+
+// puts a packet into buffer... (SUCCESS = true)
+bool PacketBuffer::enqueueFront(SFPacket &pPacket)
+{
+    pthread_testcancel();
+    pthread_cleanup_push((void(*)(void*)) pthread_mutex_unlock, (void *) &buffer.lock);
+    pthread_mutex_lock(&buffer.lock);
+    // wait until buffer is _not_ full
+    while(buffer.container.size() >= cMaxBufferSize)
+    {
+        DEBUG("PacketBuffer::enqueueFront : waiting until buffer is <notfull>")
+        pthread_cond_wait(&buffer.notfull, &buffer.lock);
+    }
+    // enqueue
+    buffer.container.push_front(pPacket);
+    DEBUG("PacketBuffer::enqueueFront : put in buffer and signal <notempty>")
+    // signal that buffer is now not empty
+    pthread_cond_signal(&buffer.notempty);
+    pthread_cleanup_pop(1); 
+    return true;
+}
+
+// puts a packet into buffer... (SUCCESS = true)
+bool PacketBuffer::enqueueBack(SFPacket &pPacket)
+{
+    pthread_testcancel();
+    pthread_cleanup_push((void(*)(void*)) pthread_mutex_unlock, (void *) &buffer.lock);
+    pthread_mutex_lock(&buffer.lock);
+    // wait until buffer is _not_ full
+    while(buffer.container.size() >= cMaxBufferSize)
+    {
+        DEBUG("PacketBuffer::enqueueBack : waiting until buffer is <notfull>")
+        pthread_cond_wait(&buffer.notfull, &buffer.lock);
+    }
+    // enqueue
+    buffer.container.push_back(pPacket);
+    DEBUG("PacketBuffer::enqueueBack : put in buffer and signal <notempty>")
+    // signal that buffer is now not empty
+    pthread_cond_signal(&buffer.notempty);
+    pthread_cleanup_pop(1); 
+    return true;
+}
+
+/* checks if packet buffer is full */
+bool PacketBuffer::isFull() {
+  bool isFull = true;
+  pthread_testcancel();
+  pthread_mutex_lock(&buffer.lock);
+  if (buffer.container.size() < cMaxBufferSize) {
+      isFull = false;
+  }
+  pthread_mutex_unlock(&buffer.lock);
+  return isFull;
+}
+
+/* checks if packet buffer is empty */
+bool PacketBuffer::isEmpty() {
+  bool isEmpty = true;
+  pthread_testcancel();
+  pthread_mutex_lock(&buffer.lock);
+  if (buffer.container.size() > 0) {
+      isEmpty = false;
+  }
+  pthread_mutex_unlock(&buffer.lock);
+  return isEmpty;
+}
+
+/* checks if pPacket is in queue */
+bool PacketBuffer::isInQueue(SFPacket &pPacket)
+{
+    bool result = false;
+    DEBUG("PacketBuffer::isInQueue : lock")
+    pthread_testcancel();
+    pthread_mutex_lock(&buffer.lock);
+    container_t::const_iterator it = find(buffer.container.begin(), buffer.container.end(), pPacket);
+    if( it != buffer.container.end() )
+    {
+        result = true;
+    }
+    pthread_mutex_unlock(&buffer.lock);
+    DEBUG("PacketBuffer::isInQueue : unlock")
+    return result;
+}
diff --git a/support/sdk/cpp/sf/packetbuffer.h b/support/sdk/cpp/sf/packetbuffer.h
new file mode 100644
index 00000000..38385945
--- /dev/null
+++ b/support/sdk/cpp/sf/packetbuffer.h
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#ifndef PACKETBUFFER_H
+#define PACKETBUFFER_H
+
+#include <pthread.h>
+#include <list>
+#include "sfpacket.h"
+
+// #define DEBUG_PACKETBUFFER
+
+#undef DEBUG
+#ifdef DEBUG_PACKETBUFFER
+#include <iostream>
+#define DEBUG(message) std::cout << message << std::endl;
+#else
+#define DEBUG(message) 
+#endif
+
+class PacketBuffer
+{
+protected:
+
+  static const unsigned cMaxBufferSize = 25;
+
+  typedef std::list<SFPacket> container_t;
+
+  // thread safe buffer
+  typedef struct
+  {
+    // mutex lock for any of this vars
+    pthread_mutex_t lock;
+    // notempty cond
+    pthread_cond_t notempty;
+    // not full cond
+    pthread_cond_t notfull;
+    // actual buffer 
+    container_t container;
+  } sharedBuffer_t;
+
+  sharedBuffer_t buffer;
+
+public:
+  PacketBuffer();
+
+  ~PacketBuffer();
+
+  void clear();
+
+  SFPacket dequeue();
+
+  bool enqueueFront(SFPacket &pPacket);
+
+  bool enqueueBack(SFPacket &pPacket);
+
+  bool isFull();
+
+  bool isEmpty();
+
+  bool isInQueue(SFPacket &pPacket);
+  
+};
+
+#endif
diff --git a/support/sdk/cpp/sf/serialcomm.cpp b/support/sdk/cpp/sf/serialcomm.cpp
new file mode 100644
index 00000000..a5869f1c
--- /dev/null
+++ b/support/sdk/cpp/sf/serialcomm.cpp
@@ -0,0 +1,792 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#include "serialcomm.h"
+#include "sharedinfo.h"
+
+#include <ctime>
+#include <cstdlib>
+#include <cstring>
+#include <iostream>
+#include <fcntl.h>
+#include <termios.h>
+#include <pthread.h>
+#include <sstream>
+#include <sys/time.h>
+#include <errno.h>
+#include <stdint.h>
+
+using namespace std;
+
+/* forward declarations of pthrad helper functions*/
+void* readSerialThread(void*);
+void* writeSerialThread(void*);
+
+tcflag_t SerialComm::parseBaudrate(int requested)
+{
+    int baudrate;
+
+    switch (requested)
+    {
+#ifdef B50
+    case 50:
+        baudrate = B50;
+        break;
+#endif
+#ifdef B75
+
+    case 75:
+        baudrate = B75;
+        break;
+#endif
+#ifdef B110
+
+    case 110:
+        baudrate = B110;
+        break;
+#endif
+#ifdef B134
+
+    case 134:
+        baudrate = B134;
+        break;
+#endif
+#ifdef B150
+
+    case 150:
+        baudrate = B150;
+        break;
+#endif
+#ifdef B200
+
+    case 200:
+        baudrate = B200;
+        break;
+#endif
+#ifdef B300
+
+    case 300:
+        baudrate = B300;
+        break;
+#endif
+#ifdef B600
+
+    case 600:
+        baudrate = B600;
+        break;
+#endif
+#ifdef B1200
+
+    case 1200:
+        baudrate = B1200;
+        break;
+#endif
+#ifdef B1800
+
+    case 1800:
+        baudrate = B1800;
+        break;
+#endif
+#ifdef B2400
+
+    case 2400:
+        baudrate = B2400;
+        break;
+#endif
+#ifdef B4800
+
+    case 4800:
+        baudrate = B4800;
+        break;
+#endif
+#ifdef B9600
+
+    case 9600:
+        baudrate = B9600;
+        break;
+#endif
+#ifdef B19200
+
+    case 19200:
+        baudrate = B19200;
+        break;
+#endif
+#ifdef B38400
+
+    case 38400:
+        baudrate = B38400;
+        break;
+#endif
+#ifdef B57600
+
+    case 57600:
+        baudrate = B57600;
+        break;
+#endif
+#ifdef B115200
+
+    case 115200:
+        baudrate = B115200;
+        break;
+#endif
+#ifdef B230400
+
+    case 230400:
+        baudrate = B230400;
+        break;
+#endif
+#ifdef B460800
+
+    case 460800:
+        baudrate = B460800;
+        break;
+#endif
+#ifdef B500000
+
+    case 500000:
+        baudrate = B500000;
+        break;
+#endif
+#ifdef B576000
+
+    case 576000:
+        baudrate = B576000;
+        break;
+#endif
+#ifdef B921600
+
+    case 921600:
+        baudrate = B921600;
+        break;
+#endif
+#ifdef B1000000
+
+    case 1000000:
+        baudrate = B1000000;
+        break;
+#endif
+#ifdef B1152000
+
+    case 1152000:
+        baudrate = B1152000;
+        break;
+#endif
+#ifdef B1500000
+
+    case 1500000:
+        baudrate = B1500000;
+        break;
+#endif
+#ifdef B2000000
+
+    case 2000000:
+        baudrate = B2000000;
+        break;
+#endif
+#ifdef B2500000
+
+    case 2500000:
+        baudrate = B2500000;
+        break;
+#endif
+#ifdef B3000000
+
+    case 3000000:
+        baudrate = B3000000;
+        break;
+#endif
+#ifdef B3500000
+
+    case 3500000:
+        baudrate = B3500000;
+        break;
+#endif
+#ifdef B4000000
+
+    case 4000000:
+        baudrate = B4000000;
+        break;
+#endif
+
+    default:
+        baudrate = 0;
+    }
+    return baudrate;
+}
+
+SerialComm::SerialComm(const char* pDevice, int pBaudrate, PacketBuffer &pReadBuffer, PacketBuffer &pWriteBuffer, sharedControlInfo_t& pControl) : readBuffer(pReadBuffer), writeBuffer(pWriteBuffer), droppedReadPacketCount(0), droppedWritePacketCount(0), readPacketCount(0), writtenPacketCount(0), badPacketCount(0), sumRetries(0), device(pDevice), baudrate(pBaudrate), serialReadFD(-1), serialWriteFD(-1), errorReported(false), errorMsg(""), control(pControl)
+{
+    writerThreadRunning = false;
+    readerThreadRunning = false;
+    rawFifo.head = rawFifo.tail = 0;
+    tcflag_t baudflag = parseBaudrate(pBaudrate);
+
+    srand ( time(NULL) );
+    seqno = rand();
+    FD_ZERO(&rfds);
+    FD_ZERO(&wfds);
+
+    serialReadFD = open(device.c_str(), O_RDONLY | O_NOCTTY | O_NONBLOCK);
+    serialWriteFD = open(device.c_str(), O_WRONLY | O_NOCTTY);
+
+    if (((serialReadFD < 0) || (serialWriteFD < 0) || (!baudflag)) && !(errorReported == true))
+    {
+        ostringstream msg;
+        msg << "could not open device = " << pDevice << " with baudrate = " << pBaudrate;
+        reportError(msg.str().c_str() ,-1);
+    }
+
+    /* Serial port setting */
+    struct termios newtio;
+    memset(&newtio, 0, sizeof(newtio));
+    newtio.c_cflag = CS8 | CLOCAL | CREAD;
+    newtio.c_iflag = IGNPAR | IGNBRK;
+    cfsetispeed(&newtio, baudflag);
+    cfsetospeed(&newtio, baudflag);
+
+    /* Raw output_file */
+    newtio.c_oflag = 0;
+
+    if ((tcflush(serialReadFD, TCIFLUSH) >= 0 && tcsetattr(serialReadFD, TCSANOW, &newtio) >= 0)
+        && (tcflush(serialWriteFD, TCIFLUSH) >= 0 && tcsetattr(serialWriteFD, TCSANOW, &newtio) >= 0)
+        && !errorReported)
+    {
+        DEBUG("SerialComm::SerialComm : opened device "<< pDevice << " with baudrate = " << pBaudrate)
+            }
+    else
+    {
+        close(serialReadFD);
+        close(serialWriteFD);
+        if (!errorReported)
+        {
+            ostringstream msg;
+            msg << "could not set ioflags for opened device = " << pDevice;
+            reportError(msg.str().c_str(),-1);
+        }
+    }
+
+    pthread_mutex_init(&ack.lock, NULL);
+    pthread_cond_init(&ack.received, NULL);
+
+    if (!errorReported)
+    {
+        // start thread for reading from serial line
+        if (reportError("SerialComm::SerialComm : pthread_create( &readerThread, NULL, readSerialThread, this)", pthread_create( &readerThread, NULL, readSerialThread, this)) == 0)
+            readerThreadRunning = true;
+        // start thread for writing to serial line
+        if (reportError("SerialComm::SerialComm : pthread_create( &writerThread, NULL, writeSerialThread, this)", pthread_create( &writerThread, NULL, writeSerialThread, this)) == 0)
+            writerThreadRunning = true;
+    }
+}
+
+
+SerialComm::~SerialComm()
+{
+    cancel();
+
+    pthread_mutex_destroy(&ack.lock);
+    pthread_cond_destroy(&ack.received);
+
+    if(serialReadFD > 2) close(serialReadFD);
+    if(serialWriteFD > 2) close(serialWriteFD);
+}
+
+int SerialComm::hdlcEncode(int count, const char* from, char *to) {
+    int offset = 0;
+    for(int i = 0; i < count; i++) {
+        if (from[i] == SYNC_BYTE || from[i] == ESCAPE_BYTE)
+        {
+            to[offset++] = ESCAPE_BYTE;
+            to[offset++] = from[i] ^ 0x20;
+        }
+        else {
+            to[offset++] = from[i];
+        }
+    }
+    return offset;
+}
+
+int SerialComm::writeFD(int fd, const char *buffer, int count, int *err)
+{
+    int cnt = 0;
+    /*
+      FD_SET(serialWriteFD, &wfds);
+      if(select(serialWriteFD + 1, NULL, &wfds, NULL, NULL) < 0) {
+      return -1;
+      }
+      FD_CLR(serialWriteFD, &wfds);
+    */
+    int tmpCnt = BaseComm::writeFD(fd, buffer, count, err);
+    if (tmpCnt < 0) {
+        *err = errno;
+        return tmpCnt;
+    }
+    else {
+        cnt += tmpCnt;
+    }
+    return cnt;
+}
+
+
+/* Work around buggy usb serial driver (returns 0 when no data is
+   available, independent of the blocking/non-blocking mode) */
+int SerialComm::readFD(int fd, char *buffer, int count, int maxCount, int *err)
+{
+    int cnt = 0;
+    timeval tvold;
+    timeval tv;
+    unsigned to = (10000000 / baudrate) * count; // time out in usec
+    tvold.tv_sec = to / 1000000;
+    tvold.tv_usec = to % 1000000;
+    while (cnt == 0)
+    {
+        // no FD_ZERO here because of performance issues. It is done in constructor...
+        FD_SET(serialReadFD, &rfds);
+        if (select(serialReadFD + 1, &rfds, NULL, NULL, NULL) < 0) {
+            return -1;
+        }
+        FD_CLR(serialReadFD, &rfds);
+        tv = tvold;
+        select(0, NULL, NULL, NULL, &tv);
+        int tmpCnt = read(fd, buffer, maxCount);
+        if (tmpCnt < 0) {
+            *err = errno;
+            return tmpCnt;
+        }
+        else {
+            cnt += tmpCnt;
+        }
+    }
+    return cnt;
+}
+
+char SerialComm::nextRaw() {
+    char nextByte = 0;
+    int err = 0;
+    if(rawFifo.tail < rawFifo.head) {
+        nextByte = rawFifo.queue[rawFifo.tail++];
+    }
+    else {
+        // fifo empty -- need to get some bytes
+        rawFifo.tail = 0;
+        rawFifo.head = readFD(serialReadFD, rawFifo.queue, rawReadBytes, maxMTU-1, &err);
+        if(rawFifo.head < 0) {
+            close(serialReadFD);
+            close(serialWriteFD);
+            serialReadFD = -1;
+            serialWriteFD = -1;
+            errno = err;
+        }
+        reportError("SerialComm::nextRaw: readFD(serialReadFD, rawFifo.queue, rawReadBytes, maxMTU-1)",
+                    rawFifo.head);
+        nextByte = rawFifo.queue[rawFifo.tail++];
+    }
+    return nextByte;
+}
+
+/* reads packet */
+bool SerialComm::readPacket(SFPacket &pPacket)
+{
+    uint8_t buffer[maxMTU + 10];
+    int count = 0;
+    rx_states_t state = WAIT_FOR_SYNC;
+    for(;;) {
+        uint8_t nextByte = nextRaw();
+        if(state == WAIT_FOR_SYNC) {
+            if(nextByte == SYNC_BYTE) {
+                count = 0;
+                state = IN_SYNC;
+            }
+        }
+        else if(state == IN_SYNC) {
+            if(nextByte == SYNC_BYTE) {
+                if(count < minMTU) {
+                    DEBUG("SerialComm::readPacket : frame too short - size = " << count << " : resynchronising ");
+                    badPacketCount++; 
+                    count = 0;
+                }
+                else {
+                    bool dobreak = true;
+                    DEBUG("SerialComm::readPacket : frame size = " << count);
+                    if(checkCrc(buffer, count)) {
+                        pPacket.setType(buffer[typeOffset]);
+                        pPacket.setSeqno(buffer[seqnoOffset]);
+                        switch (buffer[typeOffset]) {
+                        case SF_ACK:
+                            break;
+                        case SF_PACKET_NO_ACK:
+                            pPacket.setPayload((char *)(&buffer[payloadOffset]-1), count+1+1 - serialHeaderBytes);
+                            break;
+                        case SF_PACKET_ACK:
+                            pPacket.setPayload((char *)(&buffer[payloadOffset]), count+1 - serialHeaderBytes);
+                            break;
+                        default:
+                            dobreak = false;
+                            DEBUG("SerialComm::readPacket : unknown packet type = " \
+                                  << static_cast<uint16_t>(buffer[typeOffset] & 0xff));
+                            break;
+                        }
+                        if(dobreak) break; // leave loop
+                    }
+                    else {
+                        DEBUG("SerialComm::readPacket : bad crc");
+                        count = 0;
+                        badPacketCount++;
+                    }
+                }
+            }
+            else if(nextByte == ESCAPE_BYTE) {
+                state = ESCAPED;
+            }
+            else {
+                buffer[count++] = nextByte;
+                if(count >= maxMTU) {
+                    DEBUG("SerialComm::readPacket : packet too long, resynchronizing");
+                    count = 0;
+                    badPacketCount++;
+                    state = WAIT_FOR_SYNC;
+                }
+            }
+        }
+        else if(state == ESCAPED) {
+            if(nextByte == SYNC_BYTE) {
+                DEBUG("SerialComm::readPacket : state ESCAPED, packet got sync byte, resynchronizing");
+                count = 0;
+                badPacketCount++;
+                state = IN_SYNC;
+            }
+            else {
+                buffer[count++] = nextByte ^ 0x20;
+                if(count >= maxMTU) {
+                    DEBUG("SerialComm::readPacket : state ESCAPED, packet too long, resynchronizing");
+                    count = 0;
+                    badPacketCount++;
+                    state = WAIT_FOR_SYNC;
+                }
+                else {
+                    state = IN_SYNC;
+                }
+            }
+        }
+    }
+    return true;
+}
+
+/* writes packet */
+bool SerialComm::writePacket(SFPacket &pPacket)
+{
+    char type, byte = 0;
+    uint16_t crc = 0;
+    char buffer[2*pPacket.getLength() + 20];
+    int offset = 0;
+    int err = 0;
+    int written = 0;
+    
+    // put SFD into buffer 
+    buffer[offset++] = SYNC_BYTE;
+
+    // packet type
+    byte = type = pPacket.getType();
+    crc = byteCRC(byte, crc);
+    offset += hdlcEncode(1, &byte, buffer + offset);
+
+    // seqno
+    byte = pPacket.getSeqno();
+    crc = byteCRC(byte, crc);
+    offset += hdlcEncode(1, &byte, buffer + offset);
+    switch (type)
+    {
+    case SF_ACK:
+        break;
+    case SF_PACKET_NO_ACK:
+    case SF_PACKET_ACK:
+        // compute crc
+        for(int i = 0; i < pPacket.getLength(); i++) {
+            crc = byteCRC(pPacket.getPayload()[i], crc);
+        }
+        offset += hdlcEncode(pPacket.getLength(), pPacket.getPayload(), buffer + offset);
+        break;
+    default:
+        return false;
+    }
+
+    // crc two bytes
+    byte = crc & 0xff;
+    offset += hdlcEncode(1, &byte, buffer + offset);
+    byte = (crc >> 8) & 0xff;
+    offset += hdlcEncode(1, &byte, buffer + offset);
+    
+    // put SFD into buffer
+    buffer[offset++] = SYNC_BYTE;
+    written = writeFD(serialWriteFD, buffer, offset, &err);
+    if(written < 0) {
+        if(err != EINTR) {
+            close(serialReadFD);
+            serialReadFD = -1;
+            close(serialWriteFD);
+            serialWriteFD = -1;
+            errno = err;
+            reportError("SerialComm::writePacket failed",-1);
+            return false;
+        }
+    }
+    else if(written < offset) {
+        DEBUG("SerialComm::writePacket failed");
+        return false;
+    }
+    return true;
+}
+
+string SerialComm::getDevice() const
+{
+    return device;
+}
+
+int SerialComm::getBaudRate() const
+{
+    return baudrate;
+}
+
+/* helper function to start serial reader pthread */
+void* readSerialThread(void* ob)
+{
+    static_cast<SerialComm*>(ob)->readSerial();
+    return NULL;
+}
+
+/* reads from connected clients */
+void SerialComm::readSerial()
+{
+    while (true)
+    {
+        SFPacket packet;
+        readPacket(packet);
+        switch (packet.getType())
+	{
+	case SF_ACK:
+            // successful delivery
+            // FIXME: seqnos are not implemented on the node !
+            pthread_cond_signal(&ack.received);
+            break;
+	case SF_PACKET_ACK:
+        {
+	    // put ack in front of queue
+	    SFPacket ack(SF_ACK, packet.getSeqno());
+	    writeBuffer.enqueueFront(ack);
+        }
+	case SF_PACKET_NO_ACK:
+            // do nothing - fall through
+	default:
+            if (!readBuffer.isFull())
+	    {
+                ++readPacketCount;
+                // put silently into buffer...
+                readBuffer.enqueueBack(packet);
+	    }
+            else
+	    {
+                while(readBuffer.isFull()) {
+                    readBuffer.dequeue();
+                    ++droppedReadPacketCount;
+                }
+                readBuffer.enqueueBack(packet);
+                // DEBUG("SerialComm::readSerial : dropped packet")
+	    }
+	}
+    }
+}
+
+/* helper function to start serial writer pthread */
+void* writeSerialThread(void* ob)
+{
+    static_cast<SerialComm*>(ob)->writeSerial();
+    return NULL;
+}
+
+/* writes to serial/node */
+void SerialComm::writeSerial()
+{
+    SFPacket packet;
+    bool retry = false;
+    int retryCount = 0;
+    long long timeout;
+    
+    while (true)
+    {
+        if (!retry)
+	{
+            cerr << " serial deqeue packet, empty: " << writeBuffer.isEmpty() << endl;
+            packet = writeBuffer.dequeue();
+	}
+        switch (packet.getType())
+	{
+	case SF_ACK:
+            // successful delivery
+            if (!writePacket(packet))
+	    {
+                DEBUG("SerialComm::writeSerial : writePacket failed (SF_ACK)")
+                    reportError("SerialComm::writeSerial : writePacket(SF_ACK)", -1);
+	    }
+            break;
+	case SF_PACKET_ACK:
+            // do nothing - fall through
+	case SF_PACKET_NO_ACK:
+            // do nothing - fall through
+	default:
+            if (!retry)
+                ++writtenPacketCount;
+            // FIXME: this is the only currently supported type by the mote
+            packet.setType(SF_PACKET_ACK);
+            if (!writePacket(packet))
+	    {
+                DEBUG("SerialComm::writeSerial : writePacket failed (SF_PACKET)")
+                    reportError("SerialComm::writeSerial : writeFD(SF_PACKET)", -1);
+	    }
+            // wait for ack...
+            struct timeval currentTime;
+            struct timespec ackTime;
+            timeout = (long long)ackTimeout * (retryCount + 1);
+            
+            pthread_testcancel();
+            pthread_mutex_lock(&ack.lock);
+
+            gettimeofday(&currentTime, NULL);
+            ackTime.tv_sec = currentTime.tv_sec;
+            ackTime.tv_nsec = currentTime.tv_usec * 1000;
+
+            ackTime.tv_sec  +=  timeout / (1000*1000*1000);
+            ackTime.tv_nsec += timeout % (1000*1000*1000);
+
+            pthread_cleanup_push((void(*)(void*)) pthread_mutex_unlock, (void *) &ack.lock);
+            int retval = pthread_cond_timedwait(&ack.received, &ack.lock, &ackTime);
+            if (!((retryCount < maxRetries) && (retval == ETIMEDOUT)))
+	    {
+                if (retryCount >= maxRetries) ++droppedWritePacketCount;
+                retry = false;
+                retryCount = 0;
+	    }
+            else
+	    {
+                ++retryCount;
+                retry = true;
+                DEBUG("SerialComm::writeSerial : packet retryCount = " << retryCount);
+                ++sumRetries;
+	    }
+            // removes the cleanup handler and executes it (unlock mutex)
+            pthread_cleanup_pop(1);         }
+    }
+}
+
+/* cancels all running threads */
+void SerialComm::cancel()
+{
+    pthread_t callingThread = pthread_self();
+    if(readerThreadRunning && pthread_equal(callingThread, readerThread))
+    {
+        DEBUG("SerialComm::cancel : by readerThread")
+            pthread_detach(readerThread);
+        if (writerThreadRunning)
+	{
+            pthread_cancel(writerThread);
+            DEBUG("SerialComm::cancel : writerThread canceled, joining")
+                pthread_join(writerThread, NULL);
+            writerThreadRunning = false;
+	}
+        readerThreadRunning = false;
+        pthread_cond_signal(&control.cancel);
+        pthread_exit(NULL);
+    }
+    else if(writerThreadRunning && pthread_equal(callingThread, writerThread))
+    {
+        DEBUG("SerialComm::cancel : by writerThread")
+            pthread_detach(writerThread);
+        if (readerThreadRunning)
+	{
+            pthread_cancel(readerThread);
+            DEBUG("SerialComm::cancel : readerThread canceled, joining")
+                pthread_join(readerThread, NULL);
+            readerThreadRunning = false;
+	}
+        writerThreadRunning = false;
+        pthread_cond_signal(&control.cancel);
+        pthread_exit(NULL);
+    }
+    else
+    {
+        DEBUG("SerialComm::cancel : by other thread")
+            if (readerThreadRunning)
+            {
+                pthread_cancel(readerThread);
+                DEBUG("SerialComm::cancel : readerThread canceled, joining")
+                    pthread_join(readerThread, NULL);
+                readerThreadRunning = false;
+            }
+        if (writerThreadRunning)
+	{
+            pthread_cancel(writerThread);
+            DEBUG("SerialComm::cancel : writerThread canceled, joining")
+                pthread_join(writerThread, NULL);
+            writerThreadRunning = false;
+	}
+        pthread_cond_signal(&control.cancel);
+    }
+}
+
+/* reports error */
+int SerialComm::reportError(const char *msg, int result)
+{
+    if ((result < 0) && (!errorReported))
+    {
+        errorMsg << "error : SF-Server ( SerialComm on device = " << device << " ) : "
+                 << msg << " ( result = " << result << " )" << endl
+                 << "error-description : " << strerror(errno) << endl;
+
+        cerr << errorMsg.str();
+        errorReported = true;
+        cancel();
+    }
+    return result;
+}
+
+/* prints out status */
+void SerialComm::reportStatus(ostream& os)
+{
+    os << "SF-Server ( SerialComm on device " << device << " ) : "
+       << "baudrate = " << baudrate
+       << " , packets read = " << readPacketCount
+       << " ( dropped = " << droppedReadPacketCount 
+       << ", bad = " << badPacketCount << " )"
+       << " , packets written = " << writtenPacketCount
+       << " ( dropped = " << droppedWritePacketCount 
+       << ", total retries: " << sumRetries << " )"
+       << endl;
+}
diff --git a/support/sdk/cpp/sf/serialcomm.h b/support/sdk/cpp/sf/serialcomm.h
new file mode 100644
index 00000000..af2a57cf
--- /dev/null
+++ b/support/sdk/cpp/sf/serialcomm.h
@@ -0,0 +1,267 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#ifndef SERIALCOMM_H
+#define SERIALCOMM_H
+
+#include "basecomm.h"
+#include "sfpacket.h"
+#include "packetbuffer.h"
+#include "sharedinfo.h"
+
+#include <sys/select.h>
+#include <pthread.h>
+#include <termios.h>
+#include <string>
+#include <sstream>
+#include <iostream>
+
+// #define DEBUG_SERIALCOMM
+// #define DEBUG_RAW_SERIALCOMM
+
+#undef DEBUG
+#ifdef DEBUG_SERIALCOMM
+#include <iostream>
+#define DEBUG(message) std::cout << message << std::endl;
+#else
+#define DEBUG(message)
+#endif
+
+
+class SerialComm : public BaseComm
+{
+
+    /** Constants **/
+protected:
+    // max serial MTU
+    static const int maxMTU = (SFPacket::cMaxPacketLength+1)*2;
+    // min serial MTU
+    static const int minMTU = 4;
+    // byte count of serial header
+    static const int serialHeaderBytes = 5;
+    // byte offset of type field
+    static const int typeOffset = 0;
+    // byte offset of sequence number field
+    static const int seqnoOffset = 1;
+    // byte offset of payload field
+    static const int payloadOffset = 2;
+    // timeout for acks in s
+    static const int ackTimeout = 1000 * 1000 * 200;
+    // max. reties for packets from pc to node
+    static const int maxRetries = 25;
+
+    // how many bytes do we attempt to read from the serial line in one go?
+    static const int rawReadBytes = 20;
+
+    enum rx_states_t {
+        WAIT_FOR_SYNC,
+        IN_SYNC,
+        ESCAPED
+    };
+    
+    /** Member vars */
+protected:
+    /* pthread for serial reading */
+    pthread_t readerThread;
+
+    bool readerThreadRunning;
+
+    /* pthread for serial writing */
+    pthread_t writerThread;
+
+    bool writerThreadRunning;
+
+    // thread safe ack
+    typedef struct
+    {
+        // mutex lock for any of this vars
+        pthread_mutex_t lock;
+        // notempty cond
+        pthread_cond_t received;
+    } ackCondition_t;
+
+    ackCondition_t ack;
+
+    /* raw read buffer */
+    struct rawFifo_t {
+        char queue[maxMTU];
+        int head;
+        int tail;
+    };
+
+    rawFifo_t rawFifo;
+    
+    /* reference to read packet buffer */
+    PacketBuffer &readBuffer;
+
+    /* reference to write packet buffer */
+    PacketBuffer &writeBuffer;
+
+    /* number of dropped (read) packets */
+    int droppedReadPacketCount;
+
+    /* number of dropped (write) packets */
+    int droppedWritePacketCount;
+
+    /* number of read packets */
+    int readPacketCount;
+
+    /* number of written packets */
+    int writtenPacketCount;
+
+    /* number of bad packets read from serial line, counts resynchronizations! */
+    int badPacketCount;
+
+    /* sum retry attempts for all packets */
+    int sumRetries;
+    
+    /* device port of this sf */
+    std::string device;
+
+    /* baudrate of connected device */
+    int baudrate;
+
+    /* read fd set */
+    fd_set rfds;
+
+    /* write fd set */
+    fd_set wfds;
+
+    /* fd for reading from serial device */
+    int serialReadFD;
+
+    /* fd for writing to serial device */
+    int serialWriteFD;
+
+    /* seqno for serial data packets */
+    int seqno;
+
+    /* indicates that an error occured */
+    bool errorReported;
+
+    /* error message of reportError call */
+    std::ostringstream errorMsg;
+    
+    /* for noticing the parent thread of cancelation */
+    sharedControlInfo_t &control;
+    
+/** Member functions */
+
+    /* needed to start pthreads */
+    friend void* readSerialThread(void* ob);
+    friend void* writeSerialThread(void* ob);
+
+private:
+    /* do not allow standard constructor */
+    SerialComm();
+
+protected:
+    char nextRaw();
+    
+    /* claculates crc byte-wise */
+    inline static uint16_t byteCRC(uint8_t byte, uint16_t crc) {
+        crc = (uint8_t)(crc >> 8) | (crc << 8);
+        crc ^= byte;
+        crc ^= (uint8_t)(crc & 0xff) >> 4;
+        crc ^= crc << 12;
+        crc ^= (crc & 0xff) << 5;
+        return crc;
+    }
+    
+    inline static uint16_t calcCRC(uint8_t *bytes, uint16_t len) {
+        uint16_t crc = 0;
+        for(unsigned i = 0; i < len; i++) {
+            crc = SerialComm::byteCRC(bytes[i], crc);
+        }
+        return crc;
+    }
+
+    inline static uint16_t checkCrc(uint8_t *bytes, uint16_t count) {
+        bool crcOk = false;
+        if(count > 2) {
+            uint16_t crc = calcCRC(bytes, count - 2);
+            uint16_t packetCrc = (bytes[count-1] << 8) | bytes[count-2];
+            if(crc == packetCrc) crcOk = true;
+        }
+        return crcOk;
+    }
+
+    /* HDLC encode (byte stuff) count bytes from buffer from into buffer to.
+     * to must be at least count * 2 bytes large. Returns the number of bytes
+     * written into to.
+     */
+    int hdlcEncode(int count, const char* from, char *to);
+    
+    /**
+     *  try to read at least count bytes in one go, but may read up to maxCount bytes.
+     */
+    virtual int readFD(int fd, char *buffer, int count, int maxCount, int *err);
+
+    /* enables byte escaping. overwrites method from base class.*/
+    virtual int writeFD(int fd, const char *buffer, int count, int *err);
+
+    /* reads a packet (blocking) */
+    bool readPacket(SFPacket &pPacket);
+
+    /* writes a packet to serial source */
+    bool writePacket(SFPacket &pPacket);
+
+    /* returns tcflag of requested baudrate */
+    static tcflag_t parseBaudrate(int requested);
+
+    int reportError(const char *msg, int result);
+
+    /* checks for messages from node - producer thread */
+    void readSerial();
+
+    /* write messages to serial / node - consumer thread */
+    void writeSerial();
+    
+public:
+    SerialComm(const char* pDevice, int pBaudrate, PacketBuffer &pReadBuffer, PacketBuffer &pWriteBuffer,  sharedControlInfo_t& pControl);
+
+    ~SerialComm();
+
+    /* cancels all running threads */
+    void cancel();
+
+    std::string getDevice() const;
+
+    int getBaudRate() const;
+
+    void reportStatus(std::ostream& os);
+
+    /* returns if error occurred */
+    bool isErrorReported() { return errorReported; }
+};
+
+#endif
diff --git a/support/sdk/cpp/sf/serialprotocol.h b/support/sdk/cpp/sf/serialprotocol.h
new file mode 100644
index 00000000..46244574
--- /dev/null
+++ b/support/sdk/cpp/sf/serialprotocol.h
@@ -0,0 +1,18 @@
+/**
+ * This file is automatically generated by ncg. DO NOT EDIT THIS FILE.
+ * It includes values of some nesC constants from
+ * /home/phihup/cvs/tinyos-2.x/tos/lib/serial/Serial.h.
+ */
+
+enum {
+    SERIAL_HDLC_CTLESC_BYTE = 125,
+    SERIAL_TOS_SERIAL_802_15_4_ID = 2,
+    SERIAL_SERIAL_PROTO_ACK = 67,
+    SERIAL_TOS_SERIAL_CC1000_ID = 1,
+    SERIAL_SERIAL_PROTO_PACKET_NOACK = 69,
+    SERIAL_SERIAL_PROTO_PACKET_UNKNOWN = 255,
+    SERIAL_HDLC_FLAG_BYTE = 126,
+    SERIAL_TOS_SERIAL_ACTIVE_MESSAGE_ID = 0,
+    SERIAL_TOS_SERIAL_UNKNOWN_ID = 255,
+    SERIAL_SERIAL_PROTO_PACKET_ACK = 68
+};
diff --git a/support/sdk/cpp/sf/sf.cpp b/support/sdk/cpp/sf/sf.cpp
new file mode 100644
index 00000000..c5adcb13
--- /dev/null
+++ b/support/sdk/cpp/sf/sf.cpp
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+
+
+#ifdef HAVE_CONFIG_H
+#include <config.h>
+#endif
+
+#include <iostream>
+#include <cstdlib>
+#include <string>
+#include <sstream>
+
+#include "sfcontrol.h"
+#include "tcpcomm.h"
+#include "serialcomm.h"
+#include "packetbuffer.h"
+
+#ifdef __APPLE__
+#include <unistd.h>
+#include <signal.h>
+#endif
+
+using namespace std;
+
+
+
+int main(int argc, char *argv[])
+{
+
+#ifdef __APPLE__
+    if (signal(SIGPIPE, SIG_IGN) == SIG_ERR)
+        cerr << "Warning: failed to ignore SIGPIPE " << endl;
+#endif
+    
+  SFControl control;
+  control.parseArgs(argc, argv);
+  control.waitOnInput();
+
+  return EXIT_SUCCESS;
+}
diff --git a/support/sdk/cpp/sf/sfcontrol.cpp b/support/sdk/cpp/sf/sfcontrol.cpp
new file mode 100644
index 00000000..8489d0b2
--- /dev/null
+++ b/support/sdk/cpp/sf/sfcontrol.cpp
@@ -0,0 +1,677 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#include "sfcontrol.h"
+#include "sharedinfo.h"
+
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <netinet/in.h>
+#include <arpa/inet.h>
+#include <netdb.h>
+#include <errno.h>
+#include <fcntl.h>
+
+#include <string>
+#include <cstdlib>
+#include <cstring>
+#include <iostream>
+#include <sstream>
+#include <fstream>
+#include <list>
+
+
+using namespace std;
+
+/* forward declarations of pthrad helper functions*/
+void* checkCancelThread(void*);
+
+SFControl::SFControl()
+{
+    servers.clear();
+    pthread_mutex_init(&sfControlInfo.lock, NULL);
+    pthread_cond_init(&sfControlInfo.cancel, NULL);
+
+    FD_ZERO(&rfds);
+    FD_ZERO(&wfds);
+    uniqueId = 0;
+    servers.clear();
+    serverFD = -1;
+    clientFD = -1;
+    controlPort = -1;
+    controlServerStarted = false;
+    daemon = false;
+    reportError("SFControl::SFControl : pthread_create( &cancelThread, NULL, checkCancelThread, this)", pthread_create( &cancelThread, NULL, checkCancelThread, this));
+}
+
+
+SFControl::~SFControl()
+{
+    close(serverFD);
+    pthread_mutex_destroy(&sfControlInfo.lock);
+    pthread_cond_destroy(&sfControlInfo.cancel);
+}
+
+string SFControl::getHelpMessage(string msg)
+{
+    stringstream helpMessage;
+    if (msg == "help arguments")
+    {
+        // genral help message for command line arguments
+        helpMessage << "sf - Controls (starting/stopping) several SFs on one machine" << endl << endl
+        << "Usage : sf" << endl
+        << "or    : sf control-port PORT_NUMBER daemon" << endl << endl
+        << "Arguments:" << endl
+        << "        control-port PORT_NUMBER : TCP port on which commands are accepted" << endl 
+        << "        daemon : this switch (if present) makes sf aware that it may be running as a daemon " << endl << endl
+        << "Info:" << endl
+        << "        If sf is started without arguments it listen on " << endl
+        << "        standard input for commands (for a list type \"help\" when sf is running)." << endl
+        << "        If it is started with a given control-port (e.g.: sf control-port 9009)" << endl
+        << "        sf listen on the given TCP control port _and_ the standard" << endl
+        << "        input." << endl;
+
+    }
+    else if (msg == "start")
+    {
+        helpMessage << ">> start PORT DEVICE_NAME BAUDRATE:" << endl
+        << ">> Starts a sf-server on a given TCP port connecting to a given device with the given baudrate." << endl
+        << ">> The TCP port device name must be specified and must not" << endl
+        << ">> overlap with any other TCP port or device name pair of an already running sf-server." << endl
+        << ">> (e.g: \"start 9002 /dev/ttyUSB2 115200\" starts server on port 9002 and device /dev/ttyUSB2 with baudrate 115200)" << endl;
+    }
+    else if (msg == "stop")
+    {
+        helpMessage << ">> stop ID | PORT | DEVICE_NAME:" << endl
+        << ">> Stops the specified sf-server." << endl
+        << ">> The unique id or the device or the TCP port of the" << endl
+        << ">> sf-server must be specified." << endl
+        << ">> (e.g: \"stop 1\" stops server with id 1 " << endl
+        << ">>      \"stop /dev/ttyUSB0\" stops server connected to /dev/ttyUSB0" << endl
+        << ">>      \"stop 9002\" prints stops server listening on TCPport 90002)" << endl;
+    }
+    else if (msg == "info")
+    {
+        helpMessage << ">> info ID | PORT | DEVICE_NAME:" << endl
+        << ">> Prints some information about a given sf-server." << endl
+        << ">> The unique id or the device or the TCP port of the" << endl
+        << ">> sf-server must be specified." << endl
+        << ">> (e.g: \"info 1\" prints out information about server with id 1 " << endl
+        << ">>      \"info /dev/ttyUSB0\" prints out information about server connected to /dev/ttyUSB0" << endl
+        << ">>      \"info 9002\" prints out information about server listening on TCPport 90002)" << endl;
+    }
+    else if (msg == "list")
+    {
+        helpMessage << ">> list:" << endl
+        << ">> Displays a list of currently running sf-servers." << endl
+        << ">> A List Entry contains the unique id, the TCP port and the device" << endl
+        << ">> of a sf-server." << endl;
+    }
+    else if (msg == "close")
+    {
+        helpMessage << ">> close:" << endl
+        << ">> Closes the TCP connection to the control client." << endl
+        << ">> It can be issued only if the control-server is started."<< endl;
+    }
+    else if (msg == "exit")
+    {
+        helpMessage << ">> exit:" << endl
+        << ">> Immediatly exits and kills all running sf-servers." << endl
+        << ">> This ends everything gracefully..." << endl;
+    }
+    else
+    {
+        // genral help message for interactive commands
+        helpMessage << ">> Supported commands are:" << endl
+        << ">> " << endl
+        << ">> start - starts a sf-server on a given port and device" << endl
+        << ">> stop  - stops a running sf-server" << endl
+        << ">> list  - lists all running sf-servers" << endl
+        << ">> info  - prints out some information about a given sf-server" << endl;
+        if (controlServerStarted) {
+          helpMessage << ">> close - closes the TCP connection to the control-client" << endl;
+        }
+        helpMessage << ">> exit  - immediatly exits and kills all running sf-servers" << endl
+        << ">>" << endl
+        << ">> By typing \"help\" followd by a command (e.g.: \"help start\")" << endl
+        << ">> detailed information about that command is printed." << endl;
+
+
+    }
+    return helpMessage.str();
+}
+
+
+void SFControl::parseArgs(int argc, char *argv[])
+{
+    if (argc == 1)
+    {
+        os << ">> Starting sf-control." << endl;
+        os << ">> Accepting commands on standard input..." << endl;
+        deliverOutput();
+        // test standard port before
+    }
+    else if (argc >= 3)
+    {
+        int port = -1;
+        string argPort(argv[2]);
+        stringstream helpStream(argPort);
+        helpStream >> port;
+        if ((strncmp(argv[1], "control-port", 13) >= 0) && (port > 0))
+        {
+            controlPort = port;
+            startControlServer();
+            os << ">> Accepting commands on TCP port " << controlPort ;
+	    if(argc == 3) {
+	      os << " and on standard input..." << endl;
+	      daemon = false;
+	    }
+	    else {
+	      os << " but not on standard input..." << endl;
+	      daemon = true;
+	    }
+            deliverOutput();
+        }
+        else
+        {
+            os << getHelpMessage("help arguments");
+            deliverOutput();
+            exit(1);
+        }
+    }
+    else
+    {
+        os << getHelpMessage("help arguments");
+        deliverOutput();
+        exit(1);
+    }
+}
+
+/* starts a sf-server */
+void SFControl::startServer(int port, string device, int baudrate)
+{
+    pthread_testcancel();
+    pthread_mutex_lock(&sfControlInfo.lock);
+    sfServer_t newSFServer;
+    newSFServer.serial2tcp = new PacketBuffer();
+    newSFServer.tcp2serial = new PacketBuffer();
+    newSFServer.TcpServer = new TCPComm(port, *(newSFServer.tcp2serial), *(newSFServer.serial2tcp), sfControlInfo);
+    newSFServer.SerialDevice = new SerialComm(device.c_str(), baudrate, *(newSFServer.serial2tcp), *(newSFServer.tcp2serial), sfControlInfo);
+    newSFServer.id = ++uniqueId;
+    servers.push_back(newSFServer);
+    pthread_mutex_unlock(&sfControlInfo.lock);
+}
+
+/* stops a given sf-server. returns false if specified server not running */
+bool SFControl::stopServer(int& id, int& port, string& device)
+{
+    pthread_testcancel();
+    pthread_mutex_lock(&sfControlInfo.lock);
+    bool found = false;
+    list<sfServer_t>::iterator it = servers.begin();
+    list<sfServer_t>::iterator next = it;
+    while( (it != servers.end()) && (!found))
+    {
+        ++next;
+        if (((*it).SerialDevice->getDevice() == device) || ((*it).TcpServer->getPort() == port) || ((*it).id == id) )
+        {
+            // cancel
+            (*it).TcpServer->cancel();
+            (*it).SerialDevice->cancel();
+            // set id, port and device accordingly
+            id = (*it).id;
+            port = (*it).TcpServer->getPort();
+            device = (*it).SerialDevice->getDevice();
+            // clean up
+            delete (*it).TcpServer;
+            delete (*it).SerialDevice;
+            delete (*it).tcp2serial;
+            delete (*it).serial2tcp;
+            servers.erase(it);
+            found = true;
+        }
+        it = next;
+    }
+    pthread_mutex_unlock(&sfControlInfo.lock);
+    return found;
+}
+
+/* prints out server info for specified server */
+bool SFControl::showServerInfo(ostream& pOs, int id, int port, string device)
+{
+    pthread_testcancel();
+    pthread_mutex_lock(&sfControlInfo.lock);
+    bool found = false;
+    list<sfServer_t>::iterator it = servers.begin();
+    list<sfServer_t>::iterator next = it;
+    while( it != servers.end() && (!found))
+    {
+        ++next;
+        if (((*it).SerialDevice->getDevice() == device) || ((*it).TcpServer->getPort() == port) || ((*it).id == id) )
+        {
+            pOs << ">> info for sf-server with id = " << (*it).id
+            << " ( port =  " << (*it).TcpServer->getPort()
+            << " , device = " << (*it).SerialDevice->getDevice()
+            << " , baudrate = " << (*it).SerialDevice->getBaudRate()
+            << " )" << endl;
+            pOs << ">> ";
+            (*it).TcpServer->reportStatus(os);
+            pOs << ">> ";
+            (*it).SerialDevice->reportStatus(os);
+            found = true;
+        }
+        it = next;
+    }
+    pthread_mutex_unlock(&sfControlInfo.lock);
+    return found;
+}
+
+/* lists all running servers */
+void SFControl::listServers(ostream& pOs)
+{
+    pthread_testcancel();
+    pthread_mutex_lock(&sfControlInfo.lock);
+    list<sfServer_t>::iterator it = servers.begin();
+    for ( it = servers.begin(); it != servers.end(); it++ )
+    {
+        pOs << ">> sf-server id = " << (*it).id
+        << " , port = " << (*it).TcpServer->getPort()
+        << " , device = " << (*it).SerialDevice->getDevice()
+        << " , baudrate = " << (*it).SerialDevice->getBaudRate() << endl;
+    }
+    if (servers.size() == 0)
+    {
+        pOs << ">> none" << endl;
+    }
+    pthread_mutex_unlock(&sfControlInfo.lock);
+}
+
+void SFControl::parseInput(std::string arg)
+{
+    /* silly, but works ... */
+    string strBuf;
+    stringstream parseStream(arg);
+    vector<string> tokens;
+    while (parseStream >> strBuf)
+        tokens.push_back(strBuf);
+
+    if (tokens[0] == "start")
+    {
+        if (tokens.size() == 4)
+        {
+            if (servers.size() < maxSFServers)
+            {
+                os << ">> Trying to start sf-server with id = " << (uniqueId+1)
+                << " ( port = " << tokens[1]
+                << " , device = " << tokens[2]
+                << " , baudrate = " << tokens[3]
+                << " )" << endl;
+                deliverOutput();
+                stringstream helpInt;
+                int baudrate = 0;
+                int port = 0;
+                helpInt << tokens[3] << " " << tokens[1];
+                helpInt >> baudrate >> port;
+                startServer(port, tokens[2], baudrate);
+            }
+            else
+            {
+                os << ">> FAIL: Too many running servers (currently " << servers.size() << " servers running)" << endl;
+                deliverOutput();
+            }
+        }
+        else
+        {
+            os << getHelpMessage("start");
+            deliverOutput();
+        }
+    }
+    else if (tokens[0] == "stop")
+    {
+        if (tokens.size() == 2)
+        {
+            stringstream helpInt;
+            int port = 0;
+            int id = -1;
+            helpInt << tokens[1] << " " << tokens[1];
+            helpInt >> id >> port;
+            if (!stopServer(id, port, tokens[1]))
+            {
+                os << ">> no sf-server with id / device / baudrate = " << tokens[1] << " found!" << endl;
+                deliverOutput();
+            }
+            else
+            {
+                os << ">> stopped sf-server with id = " << id
+                << " ( port =  " << port
+                << " , device = " << tokens[1]
+                << " )" << endl;
+                deliverOutput();
+            }
+        }
+        else
+        {
+            os << getHelpMessage("stop");
+            deliverOutput();
+        }
+    }
+    else if (tokens[0] == "info")
+    {
+        if (tokens.size() == 2)
+        {
+
+            stringstream helpInt;
+            int port = 0;
+            int id = -1;
+            helpInt << tokens[1] << " " << tokens[1];
+            helpInt >> id >> port;
+            if (!showServerInfo(os, id, port, tokens[1]))
+            {
+                os << ">> no sf-server with id / device / baudrate = " << tokens[1] << " found!" << endl;
+                deliverOutput();
+            } else {
+                deliverOutput();
+	    }
+        }
+        else
+        {
+            os << getHelpMessage("info");
+            deliverOutput();
+        }
+    }
+    else if ((tokens[0] == "close") && (controlServerStarted))
+    {
+        if (clientFD > 0) {
+        	os << ">> closing connection to control-client " << endl;
+       		deliverOutput();
+        	close(clientFD);
+        	clientFD = -1;
+        }
+    }
+    else if (tokens[0] == "list")
+    {
+        os << ">> currently running sf-servers:" << endl;
+        listServers(os);
+        deliverOutput();
+    }
+    else if (tokens[0] == "exit")
+    {
+        os << ">> exiting..." << endl;
+        deliverOutput();
+        exit(0);
+    }
+    else
+    {
+        if ((tokens[0] == "help") && (tokens.size() == 2))
+        {
+            os << getHelpMessage(tokens[1]);
+            deliverOutput();
+        }
+        else
+        {
+            os << getHelpMessage(tokens[0]);
+            deliverOutput();
+        }
+
+    }
+}
+
+/* send string to connected client.. */
+bool SFControl::sendToClient(string message)
+{
+    if (clientFD < 0)
+        return false;
+    int length = message.size();
+    const char* buffer = message.c_str();
+    while (length > 0)
+    {
+#ifdef __APPLE__
+        int n = send(clientFD, buffer, length, 0);
+#else
+        int n = send(clientFD, buffer, length, MSG_NOSIGNAL);
+#endif
+        if (!(n > 0))
+        {
+            return false;
+        }
+        length -= n;
+        buffer += n;
+    }
+    return true;
+}
+
+/* receive string from connected client... */
+bool SFControl::readFromClient(string& message)
+{
+    if (clientFD < 0)
+        return false;
+    int length = 0;
+    char buffer[256];
+    char* bufPtr = buffer;
+    *bufPtr = '\0';
+    do
+    {
+        int n = read(clientFD, (void *) bufPtr, 1);
+        if (!(n > 0))
+        {
+            return false;
+        }
+    }
+    while ((*bufPtr++ != '\n') && (length++ < 255));
+    buffer[length] = '\0';
+    message = (length == 1) ? "" : buffer;
+    return true;
+}
+
+void SFControl::waitOnInput()
+{
+    bool clientConnected = false;
+
+    struct sockaddr_in client;
+    socklen_t clientAddrLen = sizeof(client);
+    FD_ZERO(&rfds);
+
+    while (true)
+    {
+        int maxfd = 0;
+	if(daemon) {
+	  FD_CLR(0, &rfds);
+	}
+	else {
+	  FD_SET(0, &rfds);
+	}
+        if (controlServerStarted)
+        {
+            FD_SET(serverFD, &rfds);
+            maxfd = (serverFD > maxfd) ? serverFD : maxfd;
+        }
+        if (clientConnected)
+        {
+            FD_SET(clientFD, &rfds);
+            maxfd = (clientFD > maxfd) ? clientFD : maxfd;
+        }
+
+        reportError("SFControl::waitOnInput : select(maxfd+1, &rfds, NULL, NULL, NULL)", select(maxfd+1, &rfds, NULL, NULL, NULL));
+
+        if (FD_ISSET(0, &rfds))
+        {
+            /* parse standard input */
+            FD_CLR(0, &rfds);
+            string input = "";
+            getline (cin, input);
+            if (input != "")
+            {
+                os << "standard input : " << input << endl;
+                if (!(clientFD < 0))
+                    sendToClient(os.str());
+                os.str("");
+                os.clear();
+                parseInput(input);
+            }
+        }
+        if (clientFD == -1) clientConnected = false;
+        if (controlServerStarted)
+        {
+            if (FD_ISSET(serverFD, &rfds))
+            {
+                /* we got a new connection request */
+                FD_CLR(serverFD, &rfds);
+                int newClientFD = reportError("SFControl::waitOnInput : accept(serverFD, (struct sockaddr*) &client, &clientAddrLen)", accept(serverFD, (struct sockaddr*) &client, &clientAddrLen));
+                if ((newClientFD >= 0) && (!clientConnected))
+                {
+                    clientFD = newClientFD;
+                    clientConnected = true;
+                    os << ">> accepted connection from control-client " << inet_ntoa(client.sin_addr) << endl;
+                    deliverOutput();
+                }
+                else
+                {
+                    close(newClientFD);
+                }
+            }
+        }
+        if (clientConnected)
+        {
+            if (FD_ISSET(clientFD, &rfds))
+            {
+                /* we got data from the connected control client */
+                FD_CLR(clientFD, &rfds);
+                string input = "";
+                if (readFromClient(input))
+                {
+                    if (input != "")
+                    {
+                        os << "control-client : " << input << endl;
+                        cout << os.str();
+                        os.str("");
+                        os.clear();
+                        parseInput(input);
+                    }
+                }
+                else
+                {
+                    os << ">> closing connection to control-client " << inet_ntoa(client.sin_addr) << endl;
+                    deliverOutput();
+                    close(clientFD);
+                    clientFD = -1;
+                }
+            }
+        }
+        if (clientFD == -1) clientConnected = false;
+    }
+}
+
+void* checkCancelThread(void* ob)
+{
+    static_cast<SFControl*>(ob)->checkThreadCancel();
+    return NULL;
+}
+
+/* keeps track of self-canceled sf-servers */
+void SFControl::checkThreadCancel()
+{
+    while(true)
+    {
+        pthread_testcancel();
+        pthread_mutex_lock(&sfControlInfo.lock);
+        pthread_cond_wait(&sfControlInfo.cancel, &sfControlInfo.lock);
+        list<sfServer_t>::iterator it = servers.begin();
+        list<sfServer_t>::iterator next = it;
+
+        while( it != servers.end() )
+        {
+            ++next;
+            if ((*it).TcpServer->isErrorReported() || (*it).SerialDevice->isErrorReported())
+            {
+                // cancel
+                (*it).TcpServer->cancel();
+                (*it).SerialDevice->cancel();
+                // inform user
+                os << ">> FAIL: sf-server with id = " << (*it).id
+                << " ( port =  " << (*it).TcpServer->getPort()
+                << " , device = " << (*it).SerialDevice->getDevice()
+                << " ) canceled" << endl;
+                deliverOutput();
+                // clean up
+                delete (*it).TcpServer;
+                delete (*it).SerialDevice;
+                delete (*it).tcp2serial;
+                delete (*it).serial2tcp;
+                servers.erase(it);
+            }
+            it = next;
+        }
+        pthread_mutex_unlock(&sfControlInfo.lock);
+    }
+}
+
+
+void SFControl::startControlServer()
+{
+    struct sockaddr_in me;
+    int opt = 1;
+
+    serverFD = reportError("SFControl::startControlServer : socket(AF_INET, SOCK_STREAM, 0)", socket(AF_INET, SOCK_STREAM, 0));
+    reportError("SFControl::startControlServer : fcntl(serverFD, F_SETFL, O_NONBLOCK)", fcntl(serverFD, F_SETFL, O_NONBLOCK));
+
+    memset(&me, 0, sizeof me);
+    me.sin_family = AF_INET;
+    me.sin_port = htons(controlPort);
+
+    reportError("SFControl::startControlServer : setsockopt(serverFD, SOL_SOCKET, SO_REUSEADDR, (char *)&opt, sizeof(opt))", setsockopt(serverFD, SOL_SOCKET, SO_REUSEADDR, (char *)&opt, sizeof(opt)));
+    reportError("SFControl::startControlServer : bind(serverFD, (struct sockaddr *)&me, sizeof me)", bind(serverFD, (struct sockaddr *)&me, sizeof me));
+    reportError("SFControl::startControlServer : listen(serverFD, 1)", listen(serverFD, 1));
+    controlServerStarted = true;
+}
+
+void SFControl::deliverOutput()
+{
+    if (!(clientFD < 0))
+        sendToClient(os.str());
+    cout << os.str();
+    os.str("");
+    os.clear();
+}
+
+/* reports error */
+int SFControl::reportError(const char *msg, int result)
+{
+    if (result < 0)
+    {
+        cerr << "FATAL : SF-Control-Server : "
+        << msg << " ( result = " << result << " )" << endl
+        << "error-description : " << strerror(errno) << endl;
+        exit(1);
+    }
+    return result;
+}
+
diff --git a/support/sdk/cpp/sf/sfcontrol.h b/support/sdk/cpp/sf/sfcontrol.h
new file mode 100644
index 00000000..a4457f68
--- /dev/null
+++ b/support/sdk/cpp/sf/sfcontrol.h
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#ifndef SFCONTROL_H
+#define SFCONTROL_H
+
+#include "stdio.h"
+#include "packetbuffer.h"
+#include "tcpcomm.h"
+#include "serialcomm.h"
+#include "pthread.h"
+#include <vector>
+#include <string>
+
+class SFControl
+{
+protected:
+
+    typedef struct
+    {
+        PacketBuffer* serial2tcp;
+        PacketBuffer* tcp2serial;
+        TCPComm* TcpServer;
+        SerialComm* SerialDevice;
+        int id;
+    }
+    sfServer_t;
+
+    /* needed to get informed about canceled threads */
+    sharedControlInfo_t sfControlInfo;
+
+    /* list of running / started sf-servers */
+    std::list<sfServer_t> servers;
+
+    /* max. allowed sf-servers */
+    static const unsigned int maxSFServers = 512;
+
+    /* pthread for thread cancel notification */
+    pthread_t cancelThread;
+
+    /* read fd set */
+    fd_set rfds;
+
+    /* write fd set */
+    fd_set wfds;
+
+    /* indicated that the control server is started */
+    bool controlServerStarted;
+
+    /* in daemon mode: do not read from stdin */
+    bool daemon;
+
+    /* tcp port the control server listens on */
+    int controlPort;
+
+    /* control server FD */
+    int serverFD;
+
+    /* control-client fd */
+    int clientFD;
+
+    /* string stream for multiplexing output (cout and control-client) */
+    std::ostringstream os;
+
+    friend void* checkCancelThread(void* ob);
+
+    /* needed for id generation */
+    int uniqueId;
+
+public:
+
+    SFControl();
+
+    ~SFControl();
+
+    /* gets corresponding help message to command */
+    std::string getHelpMessage(std::string msg = "");
+
+    /* parses command line arguments */
+    void parseArgs(int argc, char *argv[]);
+
+    /* parses input */
+    void parseInput(std::string arg);
+
+    /* main loop, waits for input */
+    void waitOnInput();
+
+protected:
+    /* checks if child threads canceled themselves */
+    void checkThreadCancel();
+
+    /* starts the controling server */
+    void startControlServer();
+
+    /* send string to connected client.. */
+    bool sendToClient(std::string message);
+
+    /* receive string from connected client... */
+    bool readFromClient(std::string& message);
+
+    /* starts a sf-server */
+    void startServer(int port, std::string device, int baudrate);
+
+    /* stops a given sf-server. returns false if specified server not running */
+    bool stopServer(int& id, int& port, std::string& device);
+
+    /* prints out server info for specified server */
+    bool showServerInfo(std::ostream& pOs, int id, int port, std::string device);
+
+    /* lists all running servers */
+    void listServers(std::ostream& pOs);
+
+    /* send output to console and/or to connected control client */
+    void deliverOutput();
+
+    /* reports error to stderr */
+    int reportError(const char *msg, int result);
+};
+
+
+
+#endif
diff --git a/support/sdk/cpp/sf/sfpacket.cpp b/support/sdk/cpp/sf/sfpacket.cpp
new file mode 100644
index 00000000..0b066c8e
--- /dev/null
+++ b/support/sdk/cpp/sf/sfpacket.cpp
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#include "sfpacket.h"
+#include <cstring>
+
+SFPacket::SFPacket(int pType, int pSeqno) {
+    length = 0;
+    seqno = pSeqno;
+    type = pType;
+}
+
+// copy constructor
+SFPacket::SFPacket(const SFPacket &pPacket) {
+    length = pPacket.getLength();
+    type = pPacket.getType();
+    seqno = pPacket.getSeqno();
+    setPayload(pPacket.getPayload(), length);
+}
+
+SFPacket::~SFPacket()
+{
+    // if (buffer) delete[] buffer;
+}
+
+const char* SFPacket::getPayload() const
+{
+    if(((type == SF_PACKET_ACK) || (type == SF_PACKET_NO_ACK))) {
+        return buffer + 1;
+    }
+    else {
+        return NULL;
+    }
+}
+
+int SFPacket::getLength() const {
+    return length;
+}
+
+int SFPacket::getType() const
+{
+    return type;
+}
+
+int SFPacket::getSeqno() const
+{
+    return seqno;
+}
+
+bool SFPacket::setPayload(const char* pBuffer, uint8_t pLength)
+{
+    if ((pLength > 0) && (pLength < cMaxPacketLength) && ((type == SF_PACKET_ACK) || (type == SF_PACKET_NO_ACK)))
+    {
+        length = pLength;
+        memcpy(buffer + 1, pBuffer, pLength);
+        return true;
+    }
+    DEBUG("SFPACKET::setPayload : wrong packet length = " << static_cast<int>(pLength) << " or type = " << type)
+    return false;
+}
+
+void SFPacket::setSeqno(int pSeqno)
+{
+    seqno = pSeqno;
+}
+
+void SFPacket::setType(int pType)
+{
+    type = pType;
+}
+
+int const SFPacket::getMaxPayloadLength()
+{
+    return cMaxPacketLength;
+}
+
+/* == operator */
+bool SFPacket::operator==(SFPacket const& pPacket)
+{
+    bool retval=false;
+    if((pPacket.getType() == type) && (pPacket.getLength() == length) && (pPacket.getSeqno() == seqno)) {
+        if((type == SF_PACKET_ACK) || (type == SF_PACKET_NO_ACK)) {
+            retval = (memcmp(pPacket.getPayload(), getPayload(), length) == 0);
+        }
+    }
+    return retval;
+}
+
+    /* return the length that shall be transmitted via TCP */
+int SFPacket::getTcpLength() const {
+    return length + 1;
+}
+
+/* return the payload of the TCP packet */
+const char* SFPacket::getTcpPayload() {
+    char l = length;
+    buffer[0] = l;
+    return buffer;
+}
+
diff --git a/support/sdk/cpp/sf/sfpacket.h b/support/sdk/cpp/sf/sfpacket.h
new file mode 100644
index 00000000..4a650edf
--- /dev/null
+++ b/support/sdk/cpp/sf/sfpacket.h
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#ifndef SFPACKET_H
+#define SFPACKET_H
+
+// #define DEBUG_SFPACKET
+
+#undef DEBUG
+#ifdef DEBUG_SFPACKET
+#include <iostream>
+#define DEBUG(message) std::cout << message << std::endl;
+#else
+#define DEBUG(message) 
+#endif
+
+#include <iostream>
+#include <stdint.h>
+
+#include "serialprotocol.h"
+enum {
+  SYNC_BYTE = SERIAL_HDLC_FLAG_BYTE,
+  ESCAPE_BYTE = SERIAL_HDLC_CTLESC_BYTE,
+
+  SF_ACK = SERIAL_SERIAL_PROTO_ACK,
+  SF_PACKET_ACK = SERIAL_SERIAL_PROTO_PACKET_ACK,
+  SF_PACKET_NO_ACK = SERIAL_SERIAL_PROTO_PACKET_NOACK,
+  SF_UNKNOWN = SERIAL_SERIAL_PROTO_PACKET_UNKNOWN
+};
+
+class SFPacket{
+
+
+public:
+    /* max packet length in bytes */
+    static const int cMaxPacketLength = 256;
+
+/** member vars **/
+protected:
+    /* internal buffer */
+    char buffer[cMaxPacketLength + 1];
+    
+    /* length of byte buffer */
+    int length;
+    /* type */
+    int type;
+    /* sequence number */
+    int seqno;
+
+
+/** member functions **/
+protected:
+
+public:
+    SFPacket(int type = SF_PACKET_ACK, int pSeqno = 0);
+
+    ~SFPacket();
+
+    SFPacket(const SFPacket &pPacket);
+
+    /* returns buffer */
+    const char* getPayload() const;
+
+    /* returns length of buffer */
+    int getLength() const;
+
+    /* return the length that shall be transmitted via TCP */
+    int getTcpLength() const;
+
+    /* return the payload of the TCP packet */
+    const char* getTcpPayload();
+    
+    /* returns the seqno of this packet */
+    int getSeqno() const;
+
+    /* returns type of packet */
+    int getType() const;
+
+    /* sets buffer and length and constructs frame (incl crc) */
+    bool setPayload(const char* pBuffer, uint8_t pLength);
+
+    /* sets the seqno */
+    void setSeqno(int pSeqno);
+
+    /* sets the type */
+    void setType(int pType);
+
+    /* returns max payload length */
+    static const int getMaxPayloadLength();
+
+    /* == operator */
+    bool operator==(SFPacket const& pPacket);
+};
+
+#endif
diff --git a/support/sdk/cpp/sf/sharedinfo.h b/support/sdk/cpp/sf/sharedinfo.h
new file mode 100644
index 00000000..bafa0227
--- /dev/null
+++ b/support/sdk/cpp/sf/sharedinfo.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#ifndef SHAREDINFO_H
+#define SHAREDINFO_H
+
+#include "pthread.h"
+
+     typedef struct
+     {
+        /* mutex to protect *Comm objects */
+        pthread_mutex_t lock;
+        /* condition that object is canceled*/
+        pthread_cond_t cancel;
+    } sharedControlInfo_t;
+
+#endif
diff --git a/support/sdk/cpp/sf/tcpcomm.cpp b/support/sdk/cpp/sf/tcpcomm.cpp
new file mode 100644
index 00000000..2e77a22c
--- /dev/null
+++ b/support/sdk/cpp/sf/tcpcomm.cpp
@@ -0,0 +1,594 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#include "sharedinfo.h"
+#include "tcpcomm.h"
+#include "sfpacket.h"
+#include "stdio.h"
+
+#include <iostream>
+#include <set>
+
+#include <cstring>
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <netinet/in.h>
+#include <netdb.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <pthread.h>
+
+
+
+using namespace std;
+
+/* forward declarations of pthrad helper functions*/
+void* checkClientsThread(void*);
+void* readClientsThread(void*);
+void* writeClientsThread(void*);
+
+/* opens tcp server port for listening and start threads*/
+TCPComm::TCPComm(int pPort, PacketBuffer &pReadBuffer, PacketBuffer &pWriteBuffer, sharedControlInfo_t& pControl) : readBuffer(pReadBuffer), writeBuffer(pWriteBuffer), errorReported(false), errorMsg(""), control(pControl)
+{   
+    // init values
+    writerThreadRunning = false;
+    readerThreadRunning = false;
+    serverThreadRunning = false;
+    clientInfo.count = 0;
+    clientInfo.FDs.clear();
+    readPacketCount = 0;
+    writtenPacketCount = 0;
+    port = pPort;
+    
+    pthread_mutex_init(&clientInfo.sleeplock, NULL);
+    pthread_mutex_init(&clientInfo.countlock, NULL);
+    pthread_cond_init(&clientInfo.wakeup, NULL);
+
+    struct sockaddr_in me;
+    int opt;
+    int rxBuf = 1024;
+
+    /* create pipe to inform client reader of new clients */
+    if (!errorReported) {
+        int pipeFDPair[2];
+        reportError("TCPComm::TCPComm : pipe(pipeFDPair)", pipe(pipeFDPair));
+        pipeWriteFD = pipeFDPair[1];
+        pipeReadFD = pipeFDPair[0];
+    }
+    if (!errorReported) {
+        reportError("TCPComm::TCPComm : fcntl(pipeReadFD, F_SETFL, O_NONBLOCK);",
+                    fcntl(pipeReadFD, F_SETFL, O_NONBLOCK));
+    }
+    /* create server socket where clients connect */
+    if (!errorReported) {
+        serverFD = reportError("TCPComm::TCPComm : socket(AF_INET, SOCK_STREAM, 0)",
+                               socket(AF_INET, SOCK_STREAM, 0));
+    }
+    memset(&me, 0, sizeof me);
+    me.sin_family = AF_INET;
+    me.sin_port = htons(port);
+    
+    opt = 1;
+    if (!errorReported) {
+        reportError("TCPComm::TCPComm : setsockopt(serverFD, SOL_SOCKET, SO_REUSEADDR, (char *)&opt, sizeof(opt))",
+                    setsockopt(serverFD, SOL_SOCKET, SO_REUSEADDR, (char *)&opt, sizeof(opt)));
+    }
+    if (!errorReported) {
+        reportError("TCPComm::TCPComm : setsockopt(serverFD, SOL_SOCKET, SO_RCVBUF, (char *)&rxBuf, sizeof(rxBuf))",
+                    setsockopt(serverFD, SOL_SOCKET, SO_RCVBUF, (char *)&rxBuf, sizeof(rxBuf)));
+    }
+    if (!errorReported) {
+        reportError("TCPComm::TCPComm : bind(serverFD, (struct sockaddr *)&me, sizeof me)",
+                    bind(serverFD, (struct sockaddr *)&me, sizeof me));
+    }
+    if (!errorReported) {
+        reportError("TCPComm::TCPComm : listen(serverFD, 5)",
+                    listen(serverFD, 5));
+    }
+
+    // start thread for server socket (adding and removing clients)
+    if (!errorReported)
+    {
+        if (reportError("TCPComm::TCPComm : pthread_create( &serverThread, NULL, checkClientsThread, this)",
+                        pthread_create( &serverThread, NULL, checkClientsThread, this)) == 0) {
+            serverThreadRunning = true;
+        }
+        // start thread for reading from client connections
+        if (reportError("TCPComm::TCPComm : pthread_create( &readerThread, NULL, readClientsThread, this)",
+                        pthread_create( &readerThread, NULL, readClientsThread, this)) == 0) {
+            readerThreadRunning = true;
+        }
+        // start thread for writing to client connections
+        if (reportError("TCPComm::TCPComm : pthread_create( &writerThread, NULL, writeClientsThread, this)",
+                        pthread_create( &writerThread, NULL, writeClientsThread, this)) == 0) {
+            writerThreadRunning = true;
+        }
+    }
+}
+
+
+TCPComm::~TCPComm()
+{
+    cancel();
+
+    close(serverFD);
+    set<int>::iterator it;
+    for( it = clientInfo.FDs.begin(); it != clientInfo.FDs.end(); it++ )
+    {
+        close(*it);
+    }
+    close(pipeWriteFD);
+    close(pipeReadFD);
+    pthread_mutex_destroy(&clientInfo.sleeplock);
+    pthread_mutex_destroy(&clientInfo.countlock);
+    pthread_cond_destroy(&clientInfo.wakeup);
+}
+
+int TCPComm::getPort()
+{
+    return port;
+}
+
+/* reads packet */
+bool TCPComm::readPacket(int pFD, SFPacket &pPacket)
+{
+    char l;
+    char* buffer[SFPacket::getMaxPayloadLength()];
+    int err;
+    
+    if (readFD(pFD, &l, 1, &err) != 1)
+    {
+        return false;
+    }
+    if (l > SFPacket::getMaxPayloadLength())
+    {
+        return false;
+    }
+    if (readFD(pFD, (char*) buffer, static_cast<int>(l), &err) != l)
+    {
+        return false;
+    }
+    if (pPacket.setPayload((char*)buffer ,l))
+    {
+        return true;
+    }
+    else
+    {
+        return false;
+    }
+}
+
+int TCPComm::writeFD(int fd, const char *buffer, int count, int *err)
+{
+    int actual = 0;
+    while (count > 0)
+    {
+#ifdef __APPLE__
+        int n = send(fd, buffer, count, 0);
+#else
+        int n = send(fd, buffer, count, MSG_NOSIGNAL);
+#endif
+        if (n == -1) {
+            *err = errno;
+            return -1;
+        }
+        count -= n;
+        actual += n;
+        buffer += n;
+    }
+    return actual;
+}
+
+/* writes packet */
+bool TCPComm::writePacket(int pFD, SFPacket &pPacket)
+{
+    int len = pPacket.getTcpLength();
+    int err;
+    return (writeFD(pFD, pPacket.getTcpPayload(), len, &err) == len);
+}
+
+/* checks for correct version of SF protocol */
+bool TCPComm::versionCheck(int clientFD)
+{
+    char check[2], us[2];
+    int version;
+    int err = 0;
+    /* Indicate version and check if a TinyOS 2.0 serial forwarder on the other end */
+    us[0] = 'U';
+    us[1] = ' ';
+    
+    if (writeFD(clientFD, us, 2, &err) != 2)
+    {
+        return false;
+    }
+    if (readFD(clientFD, check, 2, &err) != 2)
+    {
+        return false;
+    }
+    if (check[0] != 'U')
+    {
+        return false;
+    }
+
+    version = check[1];
+    if (us[1] < version)
+    {
+        version = us[1];
+    }
+    /* Add other cases here for later protocol versions */
+    switch (version)
+    {
+    case ' ':
+        break;
+    default:
+        return false;
+    }
+
+    return true;
+}
+
+/* adds a client to the client list and wakes up all threads */
+void TCPComm::addClient(int clientFD)
+{
+    DEBUG("TCPComm::addClient : lock")
+    pthread_testcancel();
+    pthread_mutex_lock( &clientInfo.countlock );
+    bool wakeupClientThreads = false;
+    if (clientInfo.count == 0)
+    {
+        wakeupClientThreads = true;
+    }
+    ++clientInfo.count;
+    clientInfo.FDs.insert(clientFD);
+    if (wakeupClientThreads)
+    {
+        pthread_cond_broadcast( &clientInfo.wakeup );
+    }
+    pthread_mutex_unlock( &clientInfo.countlock );
+    stuffPipe();
+    DEBUG("TCPComm::addClient : unlock")
+}
+
+void TCPComm::removeClient(int clientFD)
+{
+    DEBUG("TCPComm::removeClient : lock")
+    pthread_testcancel();
+    pthread_mutex_lock( &clientInfo.countlock );
+    if (clientInfo.count > 0)
+    {
+        clientInfo.FDs.erase(clientFD);
+        if (close(clientFD) != 0)
+        {
+            DEBUG("TCPComm::removeClient : error closing fd " << clientFD)
+        }
+        else
+        {
+            --clientInfo.count;
+        }
+    }
+    if (clientInfo.count == 0)
+    {
+        // clear write buffer
+        writeBuffer.clear();
+    }
+    pthread_mutex_unlock( &clientInfo.countlock );
+    stuffPipe();
+    DEBUG("TCPComm::removeClient : unlock")
+}
+
+/* helper function to start server pthread */
+void* checkClientsThread(void* ob)
+{
+    static_cast<TCPComm*>(ob)->connectClients();
+    return NULL;
+}
+
+/* checks for new connected clients */
+void TCPComm::connectClients()
+{
+    while (true)
+    {
+        int clientFD = accept(serverFD, NULL, NULL);
+	pthread_testcancel();
+        if (clientFD >= 0)
+        {
+            if (versionCheck(clientFD))
+            {
+                addClient(clientFD);
+            }
+            else
+            {
+                close(clientFD);
+            }
+        }
+        else
+        {
+            pthread_testcancel();
+            cancel();
+        }
+    }
+}
+
+/* helper function to start client reader pthread */
+void* readClientsThread(void* ob)
+{
+    static_cast<TCPComm*>(ob)->readClients();
+    return NULL;
+}
+
+/* reads from connected clients */
+void TCPComm::readClients()
+{
+    FD_t clientFDs;
+    while (true)
+    {
+        pthread_cleanup_push((void(*)(void*)) pthread_mutex_unlock, (void *) &clientInfo.countlock);
+        pthread_mutex_lock( &clientInfo.countlock );
+        while( clientInfo.count == 0 )
+        {
+            // do nothing when no client is connected...
+            DEBUG("TCPComm::readClients : sleeping reader thread")
+            pthread_cond_wait( &clientInfo.wakeup, &clientInfo.countlock );
+        }
+        // copy set in to temp set
+        clientFDs = clientInfo.FDs;
+        // removes the cleanup handler and executes it (unlock mutex)
+        pthread_cleanup_pop(1);
+        // check all fds (work with temp set)...
+        fd_set rfds;
+        FD_ZERO(&rfds);
+        int maxFD = pipeReadFD;
+        FD_SET(pipeReadFD, &rfds);
+        set<int>::iterator it;
+        for( it = clientFDs.begin(); it != clientFDs.end(); it++ )
+        {
+            if (*it > maxFD)
+            {
+                maxFD = *it;
+            }
+            FD_SET(*it, &rfds);
+        }
+        if (select(maxFD + 1, &rfds, NULL, NULL, NULL) < 0 )
+        {
+            //             run = false;
+            reportError("TCPComm::readClients : select(maxFD+1, &rfds, NULL, NULL, NULL)", -1);
+        }
+        else
+        {
+            if(FD_ISSET(pipeReadFD, &rfds)) {
+                clearPipe();
+            }
+            for (it = clientFDs.begin(); it != clientFDs.end(); it++)
+            {
+                if (FD_ISSET(*it, &rfds))
+                {
+                    SFPacket packet;
+                    if(readPacket(*it, packet)) {
+                        // this call blocks until buffer is not full
+                        readBuffer.enqueueBack(packet);
+                        ++readPacketCount;
+                    }
+                    else {
+                        DEBUG("TCPComm::readClients : removeClient")
+                        removeClient(*it);
+                    }
+                }
+            }
+        }
+    }
+}
+
+/* helper function to start client writer pthread */
+void* writeClientsThread(void* ob)
+{
+    static_cast<TCPComm*>(ob)->writeClients();
+    return NULL;
+}
+
+/* writes to connected clients */
+void TCPComm::writeClients()
+{
+    FD_t clientFDs;
+    while (true)
+    {
+        pthread_cleanup_push((void(*)(void*)) pthread_mutex_unlock, (void *) &clientInfo.countlock);
+        pthread_mutex_lock( &clientInfo.countlock );
+        while( clientInfo.count == 0 )
+        {
+            // do nothing when no client is connected...
+            DEBUG("TCPComm::writeClients : sleeping writer thread")
+            pthread_cond_wait( &clientInfo.wakeup, &clientInfo.countlock );
+        }
+        // removes the cleanup handler and executes it (unlock mutex)
+        pthread_cleanup_pop(1); 
+
+        // blocks until buffer is not empty
+        SFPacket packet = writeBuffer.dequeue();
+        pthread_testcancel();
+        pthread_mutex_lock( &clientInfo.countlock );
+        // copy client fd set into temp set
+        clientFDs = clientInfo.FDs;
+        pthread_mutex_unlock( &clientInfo.countlock );
+
+        // check all fds (work with temp set)...
+        set<int>::iterator it;
+        // duplicate and send out packet to all connected clients
+        for( it = clientFDs.begin(); it != clientFDs.end(); it++ )
+        {
+            if (writePacket(*it, packet))
+            {
+                ++writtenPacketCount;
+            }
+            else
+            {
+                DEBUG("TCPComm::writeClients : removeClient")
+                removeClient(*it);
+            }
+        }
+    }
+}
+
+/* cancels all running threads */
+void TCPComm::cancel()
+{
+    pthread_t callingThread = pthread_self();
+    if (pthread_equal(callingThread, readerThread))
+    {
+        DEBUG("TCPComm::cancel : by readerThread")
+        pthread_detach(readerThread);
+        if (writerThreadRunning)
+        {
+            pthread_cancel(writerThread);
+            DEBUG("TCPComm::cancel : writerThread canceled, joining")
+            pthread_join(writerThread, NULL);
+            writerThreadRunning = false;
+        }
+        if (serverThreadRunning)
+        {
+            pthread_cancel(serverThread);
+            DEBUG("TCPComm::cancel : serverThread canceled, joining")
+            pthread_join(serverThread, NULL);
+            serverThreadRunning = false;
+        }
+        readerThreadRunning = false;
+	pthread_cond_signal(&control.cancel);
+        pthread_exit(NULL);
+    }
+    else if (pthread_equal(callingThread, writerThread))
+    {
+        DEBUG("TCPComm::cancel : by writerThread")
+        pthread_detach(writerThread);
+        if (readerThreadRunning)
+        {
+            pthread_cancel(readerThread);
+            DEBUG("TCPComm::cancel : readerThread canceled, joining")
+            pthread_join(readerThread, NULL);
+            readerThreadRunning = false;
+        }
+        if (serverThreadRunning)
+        {
+            pthread_cancel(serverThread);
+            DEBUG("TCPComm::cancel : serverThread canceled, joining")
+            pthread_join(serverThread, NULL);
+            serverThreadRunning = false;
+        }
+        writerThreadRunning = false;
+	pthread_cond_signal(&control.cancel);
+        pthread_exit(NULL);
+    }
+    else if (pthread_equal(callingThread, serverThread))
+    {
+        DEBUG("TCPComm::cancel : by serverThread")
+        pthread_detach(serverThread);
+        if (readerThreadRunning)
+        {
+            pthread_cancel(readerThread);
+            DEBUG("TCPComm::cancel : readerThread canceled, joining")
+	    pthread_join(readerThread, NULL);
+            readerThreadRunning = false;
+        }
+        if (writerThreadRunning)
+        {
+            pthread_cancel(writerThread);
+            DEBUG("TCPComm::cancel : writerThread canceled, joining")
+            pthread_join(writerThread, NULL);
+            writerThreadRunning = false;
+        }
+        serverThreadRunning = false;
+	pthread_cond_signal(&control.cancel);
+        pthread_exit(NULL);
+    }
+    else
+    {
+        DEBUG("TCPComm::cancel : by other thread")
+	if (serverThreadRunning)
+        {
+            pthread_cancel(serverThread);
+            DEBUG("TCPComm::cancel : serverThread canceled, joining")
+            pthread_join(serverThread, NULL);
+            serverThreadRunning = false;
+        }
+ 	if (writerThreadRunning)
+        {
+            pthread_cancel(writerThread);
+            DEBUG("TCPComm::cancel : writerThread canceled, joining")
+            pthread_join(writerThread, NULL);
+            writerThreadRunning = false;
+        }
+        if (readerThreadRunning)
+        {
+            pthread_cancel(readerThread);
+            DEBUG("TCPComm::cancel : readerThread canceled, joining")
+            pthread_join(readerThread, NULL);
+            readerThreadRunning = false;
+        }
+	pthread_cond_signal(&control.cancel);
+    }
+}
+
+/* reports error */
+int TCPComm::reportError(const char *msg, int result)
+{
+    if ((result < 0) && (!errorReported))
+    {
+        errorMsg << "error : SF-Server (TCPComm on port = " << port << ") : "
+        << msg << " ( result = " << result << " )" << endl
+        << "error-description : " << strerror(errno) << endl;
+
+        cerr << errorMsg.str();
+        errorReported = true;
+        cancel();
+    }
+    return result;
+}
+
+/* prints out status */
+void TCPComm::reportStatus(ostream& os)
+{
+    os << "SF-Server ( TCPComm on port " << port << " )"
+    << " : clients = " << clientInfo.count
+    << " , packets read = " << readPacketCount
+    << " , packets written = " << writtenPacketCount << endl;
+}
+
+void TCPComm::stuffPipe() 
+{
+    char info = 'n';
+    if(write(pipeWriteFD, &info, 1) != 1) DEBUG("TCPComm::stuffPipe : lokal pipe is broken");
+}
+
+void TCPComm::clearPipe() {
+    char buf;
+    while(read(pipeReadFD, &buf, 1) > 0) {
+        ;
+    }
+}
diff --git a/support/sdk/cpp/sf/tcpcomm.h b/support/sdk/cpp/sf/tcpcomm.h
new file mode 100644
index 00000000..54cff803
--- /dev/null
+++ b/support/sdk/cpp/sf/tcpcomm.h
@@ -0,0 +1,196 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+
+#ifndef TCPCOMM_H
+#define TCPCOMM_H
+
+#include "sfpacket.h"
+#include "packetbuffer.h"
+#include "basecomm.h"
+#include "sharedinfo.h"
+
+#include <pthread.h>
+#include <set>
+#include <string>
+#include <sstream>
+
+// #define DEBUG_TCPCOMM
+
+#undef DEBUG
+#ifdef DEBUG_TCPCOMM
+#include <iostream>
+#define DEBUG(message) std::cout << message << std::endl;
+#else
+#define DEBUG(message) 
+#endif
+
+class TCPComm : public BaseComm
+{
+
+    /** Member vars */
+protected:
+    /* pthread for tcp client connection handling */
+    pthread_t serverThread;
+
+    bool serverThreadRunning;
+
+    /* pthread for tcp client reading */
+    pthread_t readerThread;
+
+    bool readerThreadRunning;
+
+    /* pthread for tcp client writing */
+    pthread_t writerThread;
+
+    bool writerThreadRunning;
+
+    typedef std::set<int> FD_t;
+
+    // thread safe shared info about connected clients
+    typedef struct
+    {
+        /* mutex to protect clientCount and clientFDs */
+        pthread_mutex_t countlock;
+	/* mutex to protect wakeup condiation */
+	pthread_mutex_t sleeplock;        
+	/* wakeup condition which is siganled if clients are connected */
+        pthread_cond_t wakeup;
+        /* number of connected clients */
+        int count;
+        /* container for client stuff */
+        FD_t FDs;
+    } sharedClientInfo_t;
+
+    /* information about clients */
+    sharedClientInfo_t clientInfo;
+
+    /* number of read packets */
+    int readPacketCount;
+
+    /* number of written packets */
+    int writtenPacketCount;
+
+    /* port of this sf */
+    int port;
+
+    /* file descriptor for server port on local machine */
+    int serverFD;
+
+    /* pipe fd pair to inform client reader thread of new clients */
+    int pipeWriteFD;
+    int pipeReadFD;
+    
+    /* reference to read packet buffer */
+    PacketBuffer &readBuffer;    
+
+    /* reference to write packet buffer */
+    PacketBuffer &writeBuffer;
+       
+    /* indicates that an error occured */
+    bool errorReported;
+
+    /* error message of reportError call */
+    std::ostringstream errorMsg;
+
+    /* for noticing the parent thread of cancelation */
+    sharedControlInfo_t &control;
+
+    /** Member functions */
+
+    /* needed to start pthreads */
+    friend void* checkClientsThread(void* ob);
+    friend void* readClientsThread(void* ob);
+    friend void* writeClientsThread(void* ob);
+
+private:
+    /* disable standard constructor */
+    TCPComm();
+
+protected:
+    /* performs blocking write on fd */
+    virtual int writeFD(int fd, const char *buffer, int count, int *err);
+
+    /* checks SF client protocol version */
+    bool versionCheck(int clientFD);
+
+    /* reads packet */
+    bool readPacket(int pFD, SFPacket &pPacket);
+
+    /* writes packet */
+    bool writePacket(int pFD, SFPacket &pPacket);
+
+    /* adds client to the list */
+    void addClient(int clientFD);
+
+    /* removes client from the list */
+    void removeClient(int clientFD);
+
+    /* checks for connecting clients - main thread for connection handling */
+    void connectClients();
+
+    /* checks for messages from the clients - producer thread */
+    void readClients();
+
+    /* write messages to clients (duplicate) - consumer thread */
+    void writeClients();
+
+    /* reports error to stderr */
+    int reportError(const char *msg, int result);
+
+    /* write something into pipe to wake up client readerThread */
+    void stuffPipe();
+    
+    /* remove data written into pipe */
+    void clearPipe();
+
+public:
+    /* create SF TCP server - init and start threads */
+    TCPComm(int pPort, PacketBuffer &pReadBuffer, PacketBuffer &pWriteBuffer, sharedControlInfo_t& pControl);
+
+    /* wait for threads, close fds and cleanup */
+    ~TCPComm();
+
+    /* cancels all running threads */
+    void cancel();
+
+    /* returns the TCP/IP port of this sf server */
+    int getPort();
+
+    /* reports status info to stdout */
+    void reportStatus(std::ostream& os);
+
+    /* returns if error occurred */
+    bool isErrorReported() { return errorReported; }
+};
+
+#endif
diff --git a/support/sdk/java/.cvsignore b/support/sdk/java/.cvsignore
new file mode 100644
index 00000000..e9538cef
--- /dev/null
+++ b/support/sdk/java/.cvsignore
@@ -0,0 +1 @@
+tinyos.jar
diff --git a/support/sdk/java/Makefile b/support/sdk/java/Makefile
new file mode 100644
index 00000000..fd450350
--- /dev/null
+++ b/support/sdk/java/Makefile
@@ -0,0 +1,20 @@
+# Top-level Makefile for tools/java
+
+SUBDIRS = net
+
+JAVADOCDIR = ../../../doc/javadoc
+
+ROOT = .
+include $(ROOT)/Makefile.include
+
+tinyos.jar: all
+	rm -f tinyos.jar
+	@# create the jar, as update requires it to exist. we use a
+	@# .class file we assume always exists
+	find . | grep -E "class|jpg|gif" | xargs jar cf tinyos.jar
+
+
+javadoc: all
+	rm -rf $(JAVADOCDIR)
+	mkdir -p $(JAVADOCDIR)
+	javadoc -d $(JAVADOCDIR) `find -name *.java`
diff --git a/support/sdk/java/Makefile.include b/support/sdk/java/Makefile.include
new file mode 100644
index 00000000..f3f97633
--- /dev/null
+++ b/support/sdk/java/Makefile.include
@@ -0,0 +1,114 @@
+#-*-makefile-*-
+######################################################################
+# 
+# Contains the shared make rules for the tools/java tree.
+#
+# In each directory, create a Makefile that includes the lines
+#    ROOT = <path to this directory>
+#    include $(ROOT)/Makefile.include
+#
+# By default the Makefile will compile all .java source code in the
+# current directory. You may also specify the following flags in 
+# your Makefile, *before* including Makefile.include:
+#
+#   SUBDIRS = dir1 dir2 ...
+#     Specify a list of subdirectories that 'make' should descend into
+#
+#   INITIAL_TARGETS = target1 target2 ...
+#     Specify build targets to be compiled before compiling Java classes
+#
+#   FINAL_TARGETS = target1 target2 ...
+#     Specify build targets to be compiled after compiling Java classes
+#
+#   OTHER_CLEAN = target1 target2 ...
+#     Specify other targets to be executed when 'make clean' is run
+#
+# NOTE: this Makefile requires GNU make, as well as a number of 
+#       standard UNIX shell tools.
+#
+######################################################################
+
+SRC = $(wildcard *.java)
+JAVA = $(SRC)
+CLASSES = $(JAVA:.java=.class)
+
+all: here subdirs $(FINAL_TARGETS)
+
+# figure out useful variables
+PWD = $(shell pwd)
+
+# set compiler command
+ifeq ($(JAVAC)_x, _x)
+JAVAC = javac
+endif
+
+# general rule for java files
+%.class: %.java
+	$(JAVAC) $<
+
+ifeq ($(SUBDIRS)_x, _x)
+
+subdirs: here
+
+subdirs-clean: here-clean
+
+else
+subdirs: here
+	@for i in $(SUBDIRS); do \
+		if [ -d $$i ]; then \
+			if [ -f $$i/Makefile ]; then \
+				$(MAKE) -C $$i; \
+			else \
+				echo "***" no Makefile in directory: $(PWD)/$$i; \
+			fi \
+		else \
+			echo "***" skipping missing directory: $(PWD)/$$i; \
+		fi; \
+	done
+
+subdirs-clean: here-clean
+	@for i in $(SUBDIRS); do \
+		if [ -d $$i ]; then \
+			if [ -f $$i/Makefile ]; then \
+				$(MAKE) -C $$i clean; \
+			else \
+				echo "***" no Makefile in directory: $(PWD)/$$i; \
+			fi \
+		else \
+			echo "***" skipping missing directory: $$i; \
+		fi; \
+	done
+
+subdirs-install: 
+	@for i in $(INSTALLDIRS); do \
+		if [ -d $$i ]; then \
+			if [ -f $$i/Makefile ]; then \
+				$(MAKE) -C $$i install; \
+			else \
+				echo "***" no Makefile in directory: $(PWD)/$$i; \
+			fi \
+		else \
+			echo "***" skipping missing directory: $$i; \
+		fi; \
+	done
+
+endif
+
+here: printdir $(INITIAL_TARGETS) $(JAVA) $(CLASSES) FORCE
+
+printdir:
+	@echo "... $(PWD)"; 
+
+here-clean: FORCE
+	@rm -f *.class *~ javacore*.txt
+	@echo "cleaning $(PWD)" 
+
+clean: here-clean subdirs-clean $(OTHER_CLEAN)
+
+install: subdirs-install
+# some phony targets - FORCE forces a command to be run on all dependencies,
+# and .PHONY prevents badness if a phony target coincides with a filename
+
+FORCE:
+
+.PHONY: all $(SUBDIRS) $(SUBDIRSCLEAN) clean
diff --git a/support/sdk/java/build.xml b/support/sdk/java/build.xml
new file mode 100644
index 00000000..ed6a646f
--- /dev/null
+++ b/support/sdk/java/build.xml
@@ -0,0 +1,66 @@
+<project name="tinyos-2.x support sdk java" default="all">
+
+	<property environment="env"/>
+	
+	<target name="all" >
+		<echo message = "Building support sdk java" />
+		<exec executable="make" failonerror="true">
+			<arg line="all" />
+		</exec>
+	</target>
+
+	<target name="tinyos.jar">
+		<echo message="Building tinyos.jar"></echo>
+		<exec failonerror="true" executable="make">
+			<arg line="tinyos.jar"></arg></exec>
+	</target>
+
+	<target name="javadoc" >
+		<echo message = "Building javadoc" />
+		<exec executable="make" failonerror="true">
+			<arg line="javadoc" />
+		</exec>
+	</target>
+	
+	<target name="init">
+		<echo message="Generating TinyOS message classes" />
+		<exec executable="mig" failonerror="true">
+			<arg value="-o" />
+			<arg path="net/tinyos/message/SerialPacket.java" />
+			<arg value="-java-classname=net.tinyos.message.SerialPacket" />
+			<arg value="java" />
+			<arg path="${env.TOSDIR}/lib/serial/Serial.h" />
+			<arg value="serial_packet" />
+			<arg prefix="-I" path="${env.TOSDIR}/types" />
+		</exec>
+		<exec executable="mig" failonerror="true">
+			<arg value="-o" />
+			<arg path="net/tinyos/tools/PrintfMsg.java" />
+			<arg value="-java-classname=net.tinyos.tools.PrintfMsg" />
+			<arg value="java" />
+			<arg path="${env.TOSDIR}/lib/printf/printf.h" />
+			<arg value="printf_msg" />
+		</exec>
+	</target>
+	
+	<target name="compile" depends="init">
+		<javac srcdir="." classpath="" includeAntRuntime="false" />
+	</target>
+	
+	<target name="jar" depends="compile">
+		<jar destfile="tinyos.jar">
+			<fileset dir="." includes="**/*.class" />
+			<fileset dir="." includes="**/*.lib" />
+		</jar>
+	</target>
+	
+	<target name="clean">
+		<echo message="Removing generated files" />
+		<delete file="net/tinyos/message/SerialPacket.java" />
+		<delete file="net/tinyos/tools/PrintfMsg.java" />
+		<delete>
+			<fileset dir="." includes="**/*.class"/>
+		</delete>
+	</target>
+	
+</project>
diff --git a/support/sdk/java/net/Makefile b/support/sdk/java/net/Makefile
new file mode 100644
index 00000000..676747ac
--- /dev/null
+++ b/support/sdk/java/net/Makefile
@@ -0,0 +1,6 @@
+# Top-level Makefile for tools/java 
+
+SUBDIRS = tinyos
+
+ROOT = ..
+include $(ROOT)/Makefile.include
diff --git a/support/sdk/java/net/tinyos/Makefile b/support/sdk/java/net/tinyos/Makefile
new file mode 100644
index 00000000..9dd7b5e5
--- /dev/null
+++ b/support/sdk/java/net/tinyos/Makefile
@@ -0,0 +1,7 @@
+# Top-level Makefile for tools/java 
+
+# We do all subdirectories (to allow for optional package installation)
+SUBDIRS = packet message sf $(shell find . -maxdepth 1 -type d | tail -n +2 | grep -v /CVS | grep -v packet | grep -v message | grep -v sf)
+
+ROOT = ../..
+include $(ROOT)/Makefile.include
diff --git a/support/sdk/java/net/tinyos/comm/ByteQueue.java b/support/sdk/java/net/tinyos/comm/ByteQueue.java
new file mode 100644
index 00000000..c3c76838
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/ByteQueue.java
@@ -0,0 +1,133 @@
+//$Id: ByteQueue.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+package net.tinyos.comm;
+
+public class ByteQueue
+{
+  byte buffer[];
+  int nbegin;
+  int nend;
+
+  int num_free_back()
+  {
+    return buffer.length - nend;
+  }
+
+  void left_justify_into( byte dest[] )
+  {
+    for( int i=nbegin,j=0; i<nend; i++,j++ )
+      dest[j] = buffer[i];
+    nend -= nbegin;
+    nbegin = 0;
+    buffer = dest;
+  }
+
+  synchronized void ensure_free( int len )
+  {
+    if( (nbegin + num_free_back()) < len )
+    {
+      int newlen = buffer.length * 2;
+      int total = available() + len;
+      while( newlen < total )
+        newlen *= 2;
+      left_justify_into( new byte[newlen] );
+    }
+    else if( num_free_back() < len )
+    {
+      left_justify_into( buffer );
+    }
+  }
+
+  public int available()
+  {
+    return nend - nbegin;
+  }
+
+  public void push_back( byte b )
+  {
+    ensure_free(1);
+    buffer[nend++] = b;
+  }
+
+  public void push_back( byte b[] )
+  {
+    push_back( b, 0, b.length );
+  }
+
+  public void push_back( byte b[], int off, int len )
+  {
+    ensure_free( len );
+    int bend = off + len;
+    while( off < bend )
+      buffer[nend++] = b[off++];
+  }
+
+  public int pop_front()
+  {
+    if( available() > 0 )
+      return ((int)buffer[nbegin++]) & 255;
+    return -1;
+  }
+
+  public int pop_front( byte b[] )
+  {
+    return pop_front( b, 0, b.length );
+  }
+
+  public int pop_front( byte b[], int off, int len )
+  {
+    int n = available();
+    if( n > len )
+      n = len;
+    int bend = off + len;
+    while( off < bend )
+      b[off++] = buffer[nbegin++];
+    return n;
+  }
+
+  public ByteQueue()
+  {
+    this(64);
+  }
+
+  public ByteQueue( int initial_buffer_length )
+  {
+    buffer = new byte[ initial_buffer_length ];
+    nbegin = 0;
+    nend = 0;
+  }
+}
+
diff --git a/support/sdk/java/net/tinyos/comm/Makefile b/support/sdk/java/net/tinyos/comm/Makefile
new file mode 100644
index 00000000..7f8b61e0
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/Makefile
@@ -0,0 +1,4 @@
+# Top-level Makefile for tools/java 
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
diff --git a/support/sdk/java/net/tinyos/comm/NativeSerial.java b/support/sdk/java/net/tinyos/comm/NativeSerial.java
new file mode 100644
index 00000000..1782edcf
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/NativeSerial.java
@@ -0,0 +1,210 @@
+package net.tinyos.comm;
+
+/* ----------------------------------------------------------------------------
+ * This file was automatically generated by SWIG (http://www.swig.org).
+ * Version: 1.3.21
+ *
+ * Do not make changes to this file unless you know what you are doing--modify
+ * the SWIG interface file instead.
+ * ----------------------------------------------------------------------------- */
+
+/**
+ * Updated to include the open() method, which allows us to keep this object
+ * while being temporarily disconnected from the serial port
+ */
+
+public class NativeSerial {
+
+  /** The handle to the serial port we're connected to */
+  protected long swigCPtr;
+
+  /** True if we have an open serial port connection */
+  protected boolean swigCMemOwn;
+
+  /** Name of the port */
+  private String myPortname = "";
+
+  /**
+   * Constructor
+   * 
+   * @param portname
+   */
+  public NativeSerial(String portname) {
+    this(TOSCommJNI.new_NativeSerial(portname), true);
+  }
+
+  /**
+   * Constructor
+   * 
+   * @param cPtr
+   * @param cMemoryOwn
+   */
+  private NativeSerial(long cPtr, boolean cMemoryOwn) {
+    swigCMemOwn = cMemoryOwn;
+    swigCPtr = cPtr;
+  }
+
+  /**
+   * Reconnect to this serial port
+   * 
+   * @return true if the connection is made
+   */
+  public boolean open() {
+    if (!swigCMemOwn && !myPortname.matches("")) {
+      swigCPtr = TOSCommJNI.new_NativeSerial(myPortname);
+      swigCMemOwn = true;
+      return true;
+    }
+
+    return false;
+  }
+
+  public void close() {
+    // We can come here with swigCptr == 0 from finalize if the C++
+    // constructor throws an exception. Ideally, we should guard all
+    // methods in the C++ code, but this is simpler.
+    
+    if (swigCPtr != 0) {
+      TOSCommJNI.NativeSerial_close(swigCPtr);
+    }
+  }
+
+  protected NativeSerial() {
+    this(0, false);
+  }
+
+  protected void finalize() {
+    delete();
+  }
+
+  public void delete() {
+    if (swigCPtr != 0 && swigCMemOwn) {
+      swigCMemOwn = false;
+      TOSCommJNI.delete_NativeSerial(swigCPtr);
+    }
+    swigCPtr = 0;
+  }
+
+  protected static long getCPtr(NativeSerial obj) {
+    return (obj == null) ? 0 : obj.swigCPtr;
+  }
+
+  public void setSerialPortParams(int baudrate, int databits, int stopbits,
+      boolean parity) {
+    TOSCommJNI.NativeSerial_setSerialPortParams(swigCPtr, baudrate, databits,
+        stopbits, parity);
+  }
+
+  public int getBaudRate() {
+    return TOSCommJNI.NativeSerial_getBaudRate(swigCPtr);
+  }
+
+  public int getDataBits() {
+    return TOSCommJNI.NativeSerial_getDataBits(swigCPtr);
+  }
+
+  public int getStopBits() {
+    return TOSCommJNI.NativeSerial_getStopBits(swigCPtr);
+  }
+
+  public boolean getParity() {
+    return TOSCommJNI.NativeSerial_getParity(swigCPtr);
+  }
+
+  public void notifyOn(int event, boolean enable) {
+    if (swigCPtr != 0) {
+      TOSCommJNI.NativeSerial_notifyOn(swigCPtr, event, enable);
+    }
+  }
+
+  public boolean isNotifyOn(int event) {
+    return TOSCommJNI.NativeSerial_isNotifyOn(swigCPtr, event);
+  }
+
+  public boolean waitForEvent() {
+    if (swigCPtr != 0) {
+      try {
+        return TOSCommJNI.NativeSerial_waitForEvent(swigCPtr);
+      } catch (Exception e) {
+        return false;
+      }
+    }
+    return false;
+  }
+
+  public boolean cancelWait() {
+    if (swigCPtr != 0) {
+      return TOSCommJNI.NativeSerial_cancelWait(swigCPtr);
+    }
+    return false;
+  }
+
+  public boolean didEventOccur(int event) {
+    return TOSCommJNI.NativeSerial_didEventOccur(swigCPtr, event);
+  }
+
+  public void setDTR(boolean high) {
+    TOSCommJNI.NativeSerial_setDTR(swigCPtr, high);
+  }
+
+  public void setRTS(boolean high) {
+    TOSCommJNI.NativeSerial_setRTS(swigCPtr, high);
+  }
+
+  public boolean isDTR() {
+    return TOSCommJNI.NativeSerial_isDTR(swigCPtr);
+  }
+
+  public boolean isRTS() {
+    return TOSCommJNI.NativeSerial_isRTS(swigCPtr);
+  }
+
+  public boolean isCTS() {
+    return TOSCommJNI.NativeSerial_isCTS(swigCPtr);
+  }
+
+  public boolean isDSR() {
+    return TOSCommJNI.NativeSerial_isDSR(swigCPtr);
+  }
+
+  public boolean isRI() {
+    return TOSCommJNI.NativeSerial_isRI(swigCPtr);
+  }
+
+  public boolean isCD() {
+    return TOSCommJNI.NativeSerial_isCD(swigCPtr);
+  }
+
+  public void sendBreak(int millis) {
+    TOSCommJNI.NativeSerial_sendBreak(swigCPtr, millis);
+  }
+
+  public int available() {
+    try {
+      return TOSCommJNI.NativeSerial_available(swigCPtr);
+    } catch (Exception e) {
+      return 0;
+    }
+  }
+
+  public int read() {
+    return TOSCommJNI.NativeSerial_read__SWIG_0(swigCPtr);
+  }
+
+  public int read(byte[] buffer_out, int off, int len) {
+    return TOSCommJNI.NativeSerial_read__SWIG_1(swigCPtr, buffer_out, off, len);
+  }
+
+  public int write(int b) {
+    return TOSCommJNI.NativeSerial_write__SWIG_0(swigCPtr, b);
+  }
+
+  public int write(byte[] buffer_in, int off, int len) {
+    return TOSCommJNI.NativeSerial_write__SWIG_1(swigCPtr, buffer_in, off, len);
+  }
+
+  public static String getTOSCommMap() {
+    return TOSCommJNI.NativeSerial_getTOSCommMap();
+  }
+
+}
diff --git a/support/sdk/java/net/tinyos/comm/SerialPort.java b/support/sdk/java/net/tinyos/comm/SerialPort.java
new file mode 100644
index 00000000..78ca37be
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/SerialPort.java
@@ -0,0 +1,91 @@
+//$Id: SerialPort.java,v 1.6 2010-06-29 22:07:41 scipio Exp $
+
+package net.tinyos.comm;
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+
+import java.io.*;
+
+public interface SerialPort
+{
+  public static final int STOPBITS_1 = 1;
+  public static final int STOPBITS_2 = 2;
+  public static final int STOPBITS_1_5 = 3;
+
+  /*
+  public static final int FLOWCONTROL_NONE = 0;
+  public static final int FLOWCONTROL_RTSCTS_IN = 1;
+  public static final int FLOWCONTROL_RTSCTS_OUT = 2;
+  public static final int FLOWCONTROL_XONXOFF_IN = 4;
+  public static final int FLOWCONTROL_XONXOFF_OUT = 8;
+  */
+
+  public InputStream getInputStream() throws IOException;
+  public OutputStream getOutputStream() throws IOException;
+
+  public boolean open();
+  public void close();
+  public void finalize();
+  
+  public void setSerialPortParams( 
+    int baudrate, int dataBits, int stopBits, boolean parity )
+    throws UnsupportedCommOperationException;
+  public int getBaudRate();
+  public int getDataBits();
+  public int getStopBits();
+  public boolean getParity();
+
+  public void sendBreak( int millis );
+
+  /*
+  public void setFlowControlMode( int flowcontrol )
+    throws UnsupportedCommOperationException;
+  public int getFlowControlMode();
+  */
+
+  public void setDTR( boolean dtr );
+  public void setRTS( boolean rts );
+  public boolean isDTR();
+  public boolean isRTS();
+  public boolean isCTS();
+  public boolean isDSR();
+  public boolean isRI();
+  public boolean isCD();
+
+  public void addListener( SerialPortListener l );
+  public void removeListener( SerialPortListener l );
+  public void notifyOn( int serialEvent, boolean enable );
+}
+
diff --git a/support/sdk/java/net/tinyos/comm/SerialPortEvent.java b/support/sdk/java/net/tinyos/comm/SerialPortEvent.java
new file mode 100644
index 00000000..5a3ef814
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/SerialPortEvent.java
@@ -0,0 +1,66 @@
+//$Id: SerialPortEvent.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+package net.tinyos.comm;
+
+public class SerialPortEvent extends java.util.EventObject
+{
+  public final static int DATA_AVAILABLE = (1<<0);
+  public final static int OUTPUT_EMPTY = (1<<1);
+  public final static int CTS = (1<<2);
+  public final static int DSR = (1<<3);
+  public final static int RING_INDICATOR = (1<<4);
+  public final static int CARRIER_DETECT = (1<<5);
+  public final static int OVERRUN_ERROR = (1<<6);
+  public final static int PARITY_ERROR = (1<<7);
+  public final static int FRAMING_ERROR = (1<<8);
+  public final static int BREAK_INTERRUPT = (1<<9);
+
+  public SerialPort port;
+  int eventType;
+
+  public SerialPortEvent( SerialPort _port, int _eventType )
+  {
+    super(_port);
+    port = _port;
+    eventType = _eventType;
+  }
+
+  public int getEventType()
+  {
+    return eventType;
+  }
+}
+
diff --git a/support/sdk/java/net/tinyos/comm/SerialPortListener.java b/support/sdk/java/net/tinyos/comm/SerialPortListener.java
new file mode 100644
index 00000000..31eaf0a1
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/SerialPortListener.java
@@ -0,0 +1,42 @@
+//$Id: SerialPortListener.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+package net.tinyos.comm;
+
+public interface SerialPortListener
+{
+  public void serialEvent( SerialPortEvent ev );
+}
+
diff --git a/support/sdk/java/net/tinyos/comm/TOSCommJNI.java b/support/sdk/java/net/tinyos/comm/TOSCommJNI.java
new file mode 100644
index 00000000..aa278ce7
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/TOSCommJNI.java
@@ -0,0 +1,44 @@
+package net.tinyos.comm;
+
+/* ----------------------------------------------------------------------------
+ * This file was automatically generated by SWIG (http://www.swig.org).
+ * Version: 1.3.21
+ *
+ * Do not make changes to this file unless you know what you are doing--modify
+ * the SWIG interface file instead.
+ * ----------------------------------------------------------------------------- */
+
+
+class TOSCommJNI {
+
+  static { net.tinyos.util.TOSLibraryLoader.load("toscomm"); }
+
+  public final static native void NativeSerial_setSerialPortParams(long jarg1, int jarg2, int jarg3, int jarg4, boolean jarg5);
+  public final static native int NativeSerial_getBaudRate(long jarg1);
+  public final static native int NativeSerial_getDataBits(long jarg1);
+  public final static native int NativeSerial_getStopBits(long jarg1);
+  public final static native boolean NativeSerial_getParity(long jarg1);
+  public final static native void NativeSerial_notifyOn(long jarg1, int jarg2, boolean jarg3);
+  public final static native boolean NativeSerial_isNotifyOn(long jarg1, int jarg2);
+  public final static native boolean NativeSerial_waitForEvent(long jarg1);
+  public final static native boolean NativeSerial_cancelWait(long jarg1);
+  public final static native boolean NativeSerial_didEventOccur(long jarg1, int jarg2);
+  public final static native void NativeSerial_setDTR(long jarg1, boolean jarg2);
+  public final static native void NativeSerial_setRTS(long jarg1, boolean jarg2);
+  public final static native boolean NativeSerial_isDTR(long jarg1);
+  public final static native boolean NativeSerial_isRTS(long jarg1);
+  public final static native boolean NativeSerial_isCTS(long jarg1);
+  public final static native boolean NativeSerial_isDSR(long jarg1);
+  public final static native boolean NativeSerial_isRI(long jarg1);
+  public final static native boolean NativeSerial_isCD(long jarg1);
+  public final static native void NativeSerial_sendBreak(long jarg1, int jarg2);
+  public final static native long new_NativeSerial(String jarg1);
+  public final static native void delete_NativeSerial(long jarg1);
+  public final static native void NativeSerial_close(long jarg1);
+  public final static native int NativeSerial_available(long jarg1);
+  public final static native int NativeSerial_read__SWIG_0(long jarg1);
+  public final static native int NativeSerial_read__SWIG_1(long jarg1, byte[] jarg2, int jarg3, int jarg4);
+  public final static native int NativeSerial_write__SWIG_0(long jarg1, int jarg2);
+  public final static native int NativeSerial_write__SWIG_1(long jarg1, byte[] jarg2, int jarg3, int jarg4);
+  public final static native String NativeSerial_getTOSCommMap();
+}
diff --git a/support/sdk/java/net/tinyos/comm/TOSSerial.java b/support/sdk/java/net/tinyos/comm/TOSSerial.java
new file mode 100644
index 00000000..eece9cdf
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/TOSSerial.java
@@ -0,0 +1,377 @@
+//$Id: TOSSerial.java,v 1.7 2010-06-29 22:07:41 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+package net.tinyos.comm;
+
+import java.io.*;
+import java.util.*;
+import java.util.regex.*;
+
+public class TOSSerial extends NativeSerial implements SerialPort {
+
+  /**
+   * Inner Class to handle serial event dispatching
+   * 
+   */
+  class EventDispatcher extends Thread {
+    private boolean m_run;
+
+    private boolean busy;
+
+    /**
+     * Constructor
+     * 
+     */
+    public EventDispatcher() {
+      busy = false;
+      m_run = true;
+    }
+
+    /**
+     * Start waiting for events
+     * 
+     */
+    public void open() {
+      synchronized (this) {
+        m_run = true;
+        this.notify();
+      }
+    }
+
+    /**
+     * Stop waiting for events
+     * Here's the deal: we're running a thread here that is calling
+     * a function waitForEvent() in the toscomm driver.  We're now waiting for 
+     * two events: DATA_AVAILABLE and OUTPUT_EMPTY.  If you call cancelWait(), 
+     * nothing happens until the waitForEvent() returns by getting an event 
+     * anyway, so if our node isn't generating bytes on its own, we need to
+     * force it to make an event so we can get out of that function to avoid
+     * a driver crash.
+     * 
+     * Previously, it never returned because there were no events.  Now we
+     * make an event by adding notifyOn(OUTPUT_EMPTY) and then writing a 
+     * standard 0x7E sync byte to the serial port and let it tell us that 
+     * an event occured.    
+     * 
+     * When the waitForEvent() function finally exits, we are then able to 
+     * tell it, "Oh yea, while you're at it, cancelWait()".  Finally, the
+     * EventDispatcher is in a state where the driver is not sitting around
+     * waiting for an event to occur. At that point, we can shut down the
+     * NativeSerial by calling super.close() elsewhere. 
+     * 
+     * As far as I can tell, this is the only way to make this work without
+     * modifying the actual toscomm driver.
+     * 
+     * The only other trick I can see to this is sometimes you can't connect
+     * immediately after you disconnect.. I added a wait(500) after a disconnect
+     * more toward my application layer to prevent my app from trying to
+     * reconnect immediately. My JUnit tests, for example, disconnect and
+     * reconnect very rapidly as you would expect. 
+     */
+    public void close() {
+      m_run = false;
+      
+      synchronized (this) {
+        while (busy) {
+          write(0x7E);
+          cancelWait();
+          try {
+            // Wait for the waitForEvent() done event, if it doesn't work after
+            // 500 ms, then we try generating that OUTPUT_EMPTY event again.
+            wait(500);
+          } catch (InterruptedException e) {
+            e.printStackTrace();
+          }
+        }
+      }
+    }
+
+    /**
+     * Dispatch the event if it really occured
+     * 
+     * @param event
+     */
+    private void dispatch_event(int event) {
+      if (didEventOccur(event)) {
+        SerialPortEvent ev = new SerialPortEvent(TOSSerial.this, event);
+        synchronized (m_listeners) {
+          Iterator i = m_listeners.iterator();
+          while (i.hasNext())
+            ((SerialPortListener) i.next()).serialEvent(ev);
+        }
+      }
+    }
+
+    public void run() {
+      while (true) {
+
+        synchronized (this) {
+          while (!m_run) {
+            try {
+              busy = false;
+              synchronized (this) {
+                this.notify();
+              }
+              this.wait();
+            } catch (InterruptedException e) {
+              e.printStackTrace();
+            }
+          }
+        }
+
+        busy = true;
+        if (waitForEvent()) {
+          dispatch_event(SerialPortEvent.DATA_AVAILABLE);
+          dispatch_event(SerialPortEvent.OUTPUT_EMPTY);
+        }
+      }
+    }
+
+  }
+
+  /**
+   * Inner Serial Input Stream Class
+   * 
+   */
+  class SerialInputStream extends InputStream {
+    ByteQueue bq = new ByteQueue(128);
+
+    protected void gather() {
+      int navail = TOSSerial.this.available();
+      if (navail > 0) {
+        byte buffer[] = new byte[navail];
+        bq.push_back(buffer, 0, TOSSerial.this.read(buffer, 0, navail));
+      }
+    }
+
+    public int read() {
+      gather();
+      return bq.pop_front();
+    }
+
+    public int read(byte[] b) {
+      gather();
+      return bq.pop_front(b);
+    }
+
+    public int read(byte[] b, int off, int len) {
+      gather();
+      return bq.pop_front(b, off, len);
+    }
+
+    public int available() {
+      gather();
+      return bq.available();
+    }
+  }
+
+  /**
+   * Inner Serial Output Stream Class
+   * 
+   */
+  class SerialOutputStream extends OutputStream {
+    public void write(int b) {
+      TOSSerial.this.write(b);
+    }
+
+    public void write(byte[] b) {
+      TOSSerial.this.write(b, 0, b.length);
+    }
+
+    public void write(byte[] b, int off, int len) {
+      int nwritten = 0;
+      while (nwritten < len)
+        nwritten += TOSSerial.this.write(b, nwritten, len - nwritten);
+    }
+  }
+
+  private SerialInputStream m_in;
+
+  private SerialOutputStream m_out;
+
+  private Vector m_listeners = new Vector();
+
+  private EventDispatcher m_dispatch;
+
+  static String map_portname(String mapstr, String portname) {
+    // mapstr is of the form "from1=to1:from2=to2"
+
+    // If "from", "to", and "portname" all end port numbers, then the ports in
+    // "from" and "to" are used as a bias for the port in "portname", appended
+    // to the "to" string (without its original terminating digits). If more
+    // than one port mapping matches, the one with the smallest non-negative
+    // port number wins.
+
+    // For instance, if
+    // mapstr="com1=COM1:com10=\\.\COM10"
+    // then
+    // com1 => COM1
+    // com3 => COM3
+    // com10 => \\.\COM10
+    // com12 => \\.\COM12
+    // or if
+    // mapstr="com1=/dev/ttyS0:usb1=/dev/ttyS100"
+    // then
+    // com1 => /dev/ttyS0
+    // com3 => /dev/ttyS2
+    // usb1 => /dev/ttyS100
+    // usb3 => /dev/ttyS102
+
+    String maps[] = mapstr.split(":");
+    Pattern pkv = Pattern.compile("(.*?)=(.*?)");
+    Pattern pnum = Pattern.compile("(.*\\D)(\\d+)");
+
+    Matcher mport = pnum.matcher(portname);
+    int match_distance = -1;
+    String str_port_to = null;
+
+    for (int i = 0; i < maps.length; i++) {
+      Matcher mkv = pkv.matcher(maps[i]);
+      if (mkv.matches()) {
+        Matcher mfrom = pnum.matcher(mkv.group(1));
+        Matcher mto = pnum.matcher(mkv.group(2));
+        if (mfrom.matches() && mto.matches() && mport.matches()
+            && mfrom.group(1).equalsIgnoreCase(mport.group(1))) {
+          int nfrom = Integer.parseInt(mfrom.group(2));
+          int nto = Integer.parseInt(mto.group(2));
+          int nport_from = Integer.parseInt(mport.group(2));
+          int nport_to = nport_from - nfrom + nto;
+          int ndist = nport_from - nfrom;
+
+          if ((ndist >= 0)
+              && ((ndist < match_distance) || (match_distance == -1))) {
+            match_distance = ndist;
+            str_port_to = mto.group(1) + nport_to;
+          }
+        } else if (mkv.group(1).equalsIgnoreCase(portname)) {
+          match_distance = 0;
+          str_port_to = mkv.group(2);
+        }
+      }
+    }
+
+    return (str_port_to == null) ? portname : str_port_to;
+  }
+
+  /**
+   * Real Constructor of TOSSerial
+   * 
+   * @param portname
+   */
+  public TOSSerial(String portname) {
+    super(map_portname(NativeSerial.getTOSCommMap(), portname));
+    m_in = new SerialInputStream();
+    m_out = new SerialOutputStream();
+    m_dispatch = new EventDispatcher();
+    m_dispatch.start();
+  }
+
+  /**
+   * Open the serial port connection
+   */
+  public boolean open() {
+    if (m_dispatch != null) {
+      m_dispatch.open();
+    }
+    return super.open();
+  }
+
+  /**
+   * Close the serial port connection
+   */
+  public void close() {
+    if (m_dispatch != null) {
+      m_dispatch.close();
+    }
+    super.close();
+  }
+
+  public void addListener(SerialPortListener l) {
+    synchronized (m_listeners) {
+      if (!m_listeners.contains(l))
+        m_listeners.add(l);
+    }
+  }
+
+  public void removeListener(SerialPortListener l) {
+    synchronized (m_listeners) {
+      m_listeners.remove(l);
+    }
+  }
+
+  public InputStream getInputStream() {
+    return m_in;
+  }
+
+  public OutputStream getOutputStream() {
+    return m_out;
+  }
+
+  /**
+   * Finalize the serial port connection, do not expect to open it again
+   */
+  public void finalize() {
+    // Be careful what you call here. The object may never have been
+    // created, so the underlying C++ object may not exist, and there's
+    // insufficient guarding to avoid a core dump. If you call other
+    // methods than super.close() or super.finalize(), be sure to
+    // add an if (swigCptr != 0) guard in NativeSerial.java.
+    if (m_dispatch != null) {
+      m_dispatch.close();
+    }
+
+    /*
+     * try { if (m_dispatch != null) { m_dispatch.join(); } } catch
+     * (InterruptedException e) { }
+     */
+
+    super.close();
+
+    try {
+      if (m_in != null) {
+        m_in.close();
+      }
+
+      if (m_out != null) {
+        m_out.close();
+      }
+    } catch (IOException e) {
+    }
+
+    m_dispatch = null;
+    m_in = null;
+    m_out = null;
+    super.finalize();
+  }
+}
diff --git a/support/sdk/java/net/tinyos/comm/UnsupportedCommOperationException.java b/support/sdk/java/net/tinyos/comm/UnsupportedCommOperationException.java
new file mode 100644
index 00000000..c39caf0d
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/UnsupportedCommOperationException.java
@@ -0,0 +1,51 @@
+//$Id: UnsupportedCommOperationException.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+package net.tinyos.comm;
+
+public class UnsupportedCommOperationException
+  extends Exception
+{
+  public UnsupportedCommOperationException(String str)
+  {
+    super(str);
+  }
+
+  public UnsupportedCommOperationException()
+  {
+    super();
+  }
+}
+
diff --git a/support/sdk/java/net/tinyos/comm/package.html b/support/sdk/java/net/tinyos/comm/package.html
new file mode 100644
index 00000000..c1f867f4
--- /dev/null
+++ b/support/sdk/java/net/tinyos/comm/package.html
@@ -0,0 +1,39 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
+<html>
+<head>
+<!--
+
+  @(#)package.html	1.60 98/01/27
+
+  Copyright 1998 Sun Microsystems, Inc. 901 San Antonio Road, 
+  Palo Alto, California, 94303, U.S.A.  All Rights Reserved.
+
+  This software is the confidential and proprietary information of Sun
+  Microsystems, Inc. ("Confidential Information").  You shall not
+  disclose such Confidential Information and shall use it only in
+  accordance with the terms of the license agreement you entered into
+  with Sun.
+
+  CopyrightVersion 1.2
+
+-->
+</head>
+<body bgcolor="white">
+
+Provides the Java half of JNI interfaces to serial ports.
+
+
+<h2>Package Specification</h2>
+
+<h2>Related Documentation</h2>
+
+For how to this package is used to communicate with motes, please see:
+<ul>
+  <li><a href="http://www.tinyos.net/tinyos-2.x/doc/html/tutorial/lesson4.html">Lesson 4 of the TinyOS tutorials.</a>
+</ul>
+
+<!-- Put @see and @since tags down here. -->
+
+</body>
+</html>
+
diff --git a/support/sdk/java/net/tinyos/message/.cvsignore b/support/sdk/java/net/tinyos/message/.cvsignore
new file mode 100644
index 00000000..ce64efe3
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/.cvsignore
@@ -0,0 +1,2 @@
+SerialPacket.java
+*.class
diff --git a/support/sdk/java/net/tinyos/message/Makefile b/support/sdk/java/net/tinyos/message/Makefile
new file mode 100644
index 00000000..291c73e0
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/Makefile
@@ -0,0 +1,12 @@
+# Top-level Makefile for tools/java
+
+INITIAL_TARGETS = SerialPacket.class SerialPacket.java
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
+
+TOS=$(shell ncc -print-tosdir)
+SERIAL_H = $(TOSDIR)/lib/serial/Serial.h
+
+SerialPacket.java: $(SERIAL_H) FORCE
+	mig -o $@ -java-classname=net.tinyos.message.SerialPacket java $(SERIAL_H) serial_packet -I$(TOSDIR)/types
diff --git a/support/sdk/java/net/tinyos/message/Message.java b/support/sdk/java/net/tinyos/message/Message.java
new file mode 100644
index 00000000..bada6854
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/Message.java
@@ -0,0 +1,700 @@
+// $Id: Message.java,v 1.7 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  <dgay@intel-research.net>
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * Message class (encode/decode tinyos messages).<p>
+ *
+ * The base class for encoding and decoding tinyos messages.  Provides
+ * methods to read and write bit fields at an offset for a particular bit
+ * length.  Intended for use by the Java code generated by mig.
+ *
+ * @version	1, 15 Jul 2002
+ * @author	David Gay
+ * @author David Gay <dgay@intel-research.net>
+ * @author Intel Research Berkeley Lab
+ */
+package net.tinyos.message;
+
+public class Message implements Cloneable {
+
+  /**
+   * The maximum number of characters read from an 8-bit array field being
+   * converted into a Java String.
+   */
+  public static final int MAX_CONVERTED_STRING_LENGTH = 512;
+
+  /**
+   * The underlying byte array storing the data for this message. This is
+   * private to enforce access to the data through the accessor methods in this
+   * class, which do bounds checking and manage the base_offset for embedded
+   * messages.
+   */
+  private byte[] data;
+
+  /**
+   * The base offset into the data. This allows the message data to exist at
+   * some non-zero offset into the actual data.
+   */
+  protected int base_offset;
+
+  /**
+   * The actual length of the message data. Must be less than or equal to
+   * (data.length - base_offset).
+   */
+  protected int data_length;
+
+  /**
+   * The AM type corresponding to this object. Set to -1 if no AM type is known.
+   */
+  protected int am_type;
+
+  /** The serial packet this message originated from */
+  private SerialPacket serialPacket;
+  
+  /** Limit no-arg instantiation. */
+  protected Message() {
+  }
+
+  /**
+   * Construct a new message of the given size.
+   * 
+   * @param data_length
+   *          The size of the message to create.
+   */
+  public Message(int data_length) {
+    init(data_length);
+  }
+
+  public void init(int data_length) {
+    init(new byte[data_length]);
+  }
+
+  /**
+   * Construct a new message of the given size and base offset. Allocates a new
+   * byte array of size data_length+base_offset.
+   * 
+   * @param data_length
+   *          The size of the message to create.
+   * @param base_offset
+   *          The base offset into the newly created message.
+   */
+  public Message(int data_length, int base_offset) {
+    init(data_length, base_offset);
+  }
+
+  protected void init(int data_length, int base_offset) {
+    init(new byte[data_length + base_offset], base_offset);
+  }
+
+  /**
+   * Construct a message using data as the storage. The length of data
+   * determines the length of this message.
+   * 
+   * @param data
+   *          the storage for this message
+   */
+  public Message(byte[] data) {
+    init(data);
+  }
+
+  protected void init(byte[] data) {
+    init(data, 0);
+  }
+
+  /**
+   * Construct a message using data as the storage. Use the given base_offset as
+   * the base offset into the data array. The data length will be (data.length -
+   * base_offset).
+   * 
+   * @param data
+   *          the storage for this message
+   * @param base_offset
+   *          the base offset into the data array
+   */
+  public Message(byte[] data, int base_offset) {
+    init(data, base_offset);
+  }
+
+  protected void init(byte[] data, int base_offset) {
+    init(data, base_offset, data.length - base_offset);
+  }
+
+  /**
+   * Construct a message using data as the storage. Use the given base_offset as
+   * the base offset into the data array, and the specified data length.
+   * 
+   * @param data
+   *          the storage for this message
+   * @param base_offset
+   *          the base offset into the data array
+   * @param data_length
+   *          the length of the message data
+   */
+  public Message(byte[] data, int base_offset, int data_length) {
+    init(data, base_offset, data_length);
+  }
+
+  protected void init(byte[] data, int base_offset, int data_length) {
+    this.data = data;
+    this.base_offset = base_offset;
+    this.data_length = data_length;
+    if (base_offset + data_length > data.length)
+      throw new ArrayIndexOutOfBoundsException(
+          "Cannot create Message with base_offset " + base_offset
+              + ", data_length " + data_length + " and data array size "
+              + data.length);
+  }
+
+  /**
+   * Construct an embedded message within the given 'msg'. Use the given
+   * base_offset as the base offset into the data array, and the specified data
+   * length.
+   * 
+   * @param msg
+   *          the message to embed this message into
+   * @param base_offset
+   *          the base offset into the data array
+   * @param data_length
+   *          the length of the message data
+   */
+  public Message(Message msg, int base_offset, int data_length) {
+    init(msg, base_offset, data_length);
+  }
+
+  protected void init(Message msg, int base_offset, int data_length) {
+    init(msg.dataGet(), msg.base_offset + base_offset, data_length);
+  }
+
+  private Message cloneself() {
+    Message copy;
+
+    try {
+      copy = (Message) super.clone();
+    } catch (CloneNotSupportedException e) {
+      System.err
+          .println("Message: WARNING: CloneNotSupportedException in cloneself(): "
+              + e);
+      System.err
+          .println("Message: This is a bug - please contact dgay@intel-research.net");
+      copy = null;
+      System.exit(2);
+    }
+    return copy;
+  }
+
+  /**
+   * Clone this Message, including making a copy of its data
+   */
+  public Object clone() {
+    Message copy = cloneself();
+    copy.init((byte[]) data.clone(), base_offset, data_length);
+    copy.am_type = this.am_type;
+    return copy;
+  }
+
+  /**
+   * Clone this Message, but give it a new unitialised data array of size size
+   * 
+   * @param size
+   *          size of the new data array
+   */
+  public Message clone(int size) {
+    Message copy = cloneself();
+    copy.init(new byte[size], 0, size);
+    copy.am_type = this.am_type;
+    return copy;
+  }
+
+  /**
+   * Copy new data for this message from 'data'. Copies min(data.length,
+   * this.data_length) bytes.
+   * 
+   * @param data
+   *          the array containing the data to be copied
+   * @exception ArrayIndexOutOfBoundsException
+   *              if any of data[0..getData().length - 1] are invalid
+   */
+  public void dataSet(byte[] data) {
+    dataSet(data, 0, this.base_offset, Math.min(this.data_length, data.length));
+  }
+
+  /**
+   * Copy new data for this message from offsetFrom in data to offsetTo in this
+   * message. Copies a total of length bytes
+   * 
+   * @param data
+   *          the array containing the data to be copied
+   * @param offsetFrom
+   *          the offset in data to start copying from
+   * @param offsetTo
+   *          the offset at which to start copying data into this message.
+   * @param length
+   *          bytes are copied.
+   * @exception ArrayIndexOutOfBoundsException
+   *              if any of the source or target indices are invalid
+   */
+  public void dataSet(byte[] data, int offsetFrom, int offsetTo, int length) {
+    System.arraycopy(data, offsetFrom, this.data, offsetTo + base_offset,
+        length);
+  }
+
+  /**
+   * Copy new data for this message from the raw data in msg to offsetTo in this
+   * message. Copies a total of msg.dataLength() bytes
+   * 
+   * @param msg
+   *          the message containing the data to be copied
+   * @param offsetTo
+   *          the offset at which to start copying data into this message.
+   * @exception ArrayIndexOutOfBoundsException
+   *              if any of the target indices are invalid
+   */
+  public void dataSet(Message msg, int offsetTo) {
+    System.arraycopy(msg.dataGet(), msg.baseOffset(), this.data, offsetTo
+        + base_offset, msg.dataLength());
+  }
+
+  /**
+   * Return the raw byte array representing the data of this message. Note that
+   * only indices in the range (this.baseOffset(),
+   * this.baseOffset()+this.dataLength()) are valid.
+   */
+  public byte[] dataGet() {
+    return data;
+  }
+
+  /**
+   * Return the base offset into the data array for this message.
+   */
+  public int baseOffset() {
+    return base_offset;
+  }
+
+  /**
+   * Return the length of the data (in bytes) contained in this message.
+   */
+  public int dataLength() {
+    return data_length;
+  }
+
+  /**
+   * Return the active message type of this message (-1 if unknown)
+   */
+  public int amType() {
+    return am_type;
+  }
+
+  /**
+   * Set the active message type of this message
+   */
+  public void amTypeSet(int type) {
+    this.am_type = type;
+  }
+
+  // Check that length bits from offset are in bounds
+  private void checkBounds(int offset, int length) {
+    if (offset < 0 || length <= 0 || offset + length > (data_length * 8))
+      throw new ArrayIndexOutOfBoundsException(
+          "Message.checkBounds: bad offset (" + offset + ") or length ("
+              + length + "), for data_length " + data_length + " in class "
+              + this.getClass());
+  }
+
+  // Check that value is valid for a bitfield of length length
+  private void checkValue(int length, long value) {
+    if (length != 64 && (value < 0 || value >= 1L << length))
+      throw new IllegalArgumentException("Message.checkValue: bad length ("
+          + length + " or value (" + value + ")");
+  }
+
+  // Unsigned byte read
+  private int ubyte(int offset) {
+    int val = data[base_offset + offset];
+
+    if (val < 0)
+      return val + 256;
+    else
+      return val;
+  }
+
+  // ASSUMES: little endian bits & bytes for the methods without BE, and
+  // big endian bits & bytes for the methods with BE
+
+  /**
+   * Read the length bit unsigned little-endian int at offset
+   * 
+   * @param offset
+   *          bit offset where the unsigned int starts
+   * @param length
+   *          bit length of the unsigned int
+   * @exception ArrayIndexOutOfBoundsException
+   *              for invalid offset, length
+   */
+  protected long getUIntElement(int offset, int length) {
+    checkBounds(offset, length);
+
+    int byteOffset = offset >> 3;
+    int bitOffset = offset & 7;
+    int shift = 0;
+    long val = 0;
+
+    // all in one byte case
+    if (length + bitOffset <= 8)
+      return (ubyte(byteOffset) >> bitOffset) & ((1 << length) - 1);
+
+    // get some high order bits
+    if (bitOffset > 0) {
+      val = ubyte(byteOffset) >> bitOffset;
+      byteOffset++;
+      shift += 8 - bitOffset;
+      length -= 8 - bitOffset;
+    }
+
+    while (length >= 8) {
+      val |= (long) ubyte(byteOffset++) << shift;
+      shift += 8;
+      length -= 8;
+    }
+
+    // data from last byte
+    if (length > 0)
+      val |= (long) (ubyte(byteOffset) & ((1 << length) - 1)) << shift;
+
+    return val;
+  }
+
+  /**
+   * Set the length bit unsigned little-endian int at offset to val
+   * 
+   * @param offset
+   *          bit offset where the unsigned int starts
+   * @param length
+   *          bit length of the unsigned int
+   * @param val
+   *          value to set the bit field to
+   * @exception ArrayIndexOutOfBoundsException
+   *              for invalid offset, length
+   * @exception IllegalArgumentException
+   *              if val is an out-of-range value for this bitfield
+   */
+  protected void setUIntElement(int offset, int length, long val) {
+    checkBounds(offset, length);
+    // checkValue(length, val);
+
+    int byteOffset = offset >> 3;
+    int bitOffset = offset & 7;
+    int shift = 0;
+
+    // all in one byte case
+    if (length + bitOffset <= 8) {
+      data[base_offset + byteOffset] = (byte) ((ubyte(byteOffset) & ~(((1 << length) - 1) << bitOffset)) | val << bitOffset);
+      return;
+    }
+
+    // set some high order bits
+    if (bitOffset > 0) {
+      data[base_offset + byteOffset] = (byte) ((ubyte(byteOffset) & ((1 << bitOffset) - 1)) | val << bitOffset);
+      byteOffset++;
+      shift += 8 - bitOffset;
+      length -= 8 - bitOffset;
+    }
+
+    while (length >= 8) {
+      data[base_offset + (byteOffset++)] = (byte) (val >> shift);
+      shift += 8;
+      length -= 8;
+    }
+
+    // data for last byte
+    if (length > 0)
+      data[base_offset + byteOffset] = (byte) ((ubyte(byteOffset) & ~((1 << length) - 1)) | val >> shift);
+  }
+
+  /**
+   * Read the length bit signed little-endian int at offset
+   * 
+   * @param offset
+   *          bit offset where the signed int starts
+   * @param length
+   *          bit length of the signed int
+   * @exception ArrayIndexOutOfBoundsException
+   *              for invalid offset, length
+   */
+  protected long getSIntElement(int offset, int length)
+      throws ArrayIndexOutOfBoundsException {
+    long val = getUIntElement(offset, length);
+
+    if (length == 64)
+      return val;
+
+    if ((val & 1L << (length - 1)) != 0)
+      return val - (1L << length);
+
+    return val;
+  }
+
+  /**
+   * Set the length bit signed little-endian int at offset to val
+   * 
+   * @param offset
+   *          bit offset where the signed int starts
+   * @param length
+   *          bit length of the signed int
+   * @param value
+   *          value to set the bit field to
+   * @exception ArrayIndexOutOfBoundsException
+   *              for invalid offset, length
+   * @exception IllegalArgumentException
+   *              if val is an out-of-range value for this bitfield
+   */
+  protected void setSIntElement(int offset, int length, long value)
+      throws ArrayIndexOutOfBoundsException {
+    if (length != 64 && value >= 1L << (length - 1))
+      throw new IllegalArgumentException();
+
+    if (length != 64 && value < 0)
+      value += 1L << length;
+
+    setUIntElement(offset, length, value);
+  }
+
+  /**
+   * Read the length bit unsigned big-endian int at offset
+   * 
+   * @param offset
+   *          bit offset where the unsigned int starts. Note that these are
+   *          big-endian bit offsets: bit 0 is the MSB, bit 7 the LSB.
+   * @param length
+   *          bit length of the unsigned int
+   * @exception ArrayIndexOutOfBoundsException
+   *              for invalid offset, length
+   */
+  protected long getUIntBEElement(int offset, int length) {
+    checkBounds(offset, length);
+
+    int byteOffset = offset >> 3;
+    int bitOffset = offset & 7;
+    long val = 0;
+
+    // All in one byte case
+    if (length + bitOffset <= 8)
+      return (ubyte(byteOffset) >> (8 - bitOffset - length))
+          & ((1 << length) - 1);
+
+    // get some high order bits
+    if (bitOffset > 0) {
+      length -= 8 - bitOffset;
+      val = (long) (ubyte(byteOffset) & ((1 << (8 - bitOffset)) - 1)) << length;
+      byteOffset++;
+    }
+
+    while (length >= 8) {
+      length -= 8;
+      val |= (long) ubyte(byteOffset++) << length;
+    }
+
+    // data from last byte
+    if (length > 0)
+      val |= ubyte(byteOffset) >> (8 - length);
+
+    return val;
+  }
+
+  /**
+   * Set the length bit unsigned big-endian int at offset to val
+   * 
+   * @param offset
+   *          bit offset where the unsigned int starts. Note that these are
+   *          big-endian bit offsets: bit 0 is the MSB, bit 7 the LSB.
+   * @param length
+   *          bit length of the unsigned int
+   * @param val
+   *          value to set the bit field to
+   * @exception ArrayIndexOutOfBoundsException
+   *              for invalid offset, length
+   * @exception IllegalArgumentException
+   *              if val is an out-of-range value for this bitfield
+   */
+  protected void setUIntBEElement(int offset, int length, long val) {
+    checkBounds(offset, length);
+    // checkValue(length, val);
+
+    int byteOffset = offset >> 3;
+    int bitOffset = offset & 7;
+    int shift = 0;
+
+    // all in one byte case
+    if (length + bitOffset <= 8) {
+      int mask = ((1 << length) - 1) << (8 - bitOffset - length);
+
+      data[base_offset + byteOffset] = (byte) ((ubyte(byteOffset) & ~mask) | val << (8 - bitOffset - length));
+      return;
+    }
+
+    // set some high order bits
+    if (bitOffset > 0) {
+      int mask = (1 << (8 - bitOffset)) - 1;
+
+      length -= 8 - bitOffset;
+      data[base_offset + byteOffset] = (byte) (ubyte(byteOffset) & ~mask | val >> length);
+      byteOffset++;
+    }
+
+    while (length >= 8) {
+      length -= 8;
+      data[base_offset + (byteOffset++)] = (byte) (val >> length);
+    }
+
+    // data for last byte
+    if (length > 0) {
+      int mask = (1 << (8 - length)) - 1;
+
+      data[base_offset + byteOffset] = (byte) ((ubyte(byteOffset) & mask) | val << (8 - length));
+    }
+  }
+
+  /**
+   * Read the length bit signed big-endian int at offset
+   * 
+   * @param offset
+   *          bit offset where the signed int starts
+   * @param length
+   *          bit length of the signed int
+   * @exception ArrayIndexOutOfBoundsException
+   *              for invalid offset, length
+   */
+  protected long getSIntBEElement(int offset, int length)
+      throws ArrayIndexOutOfBoundsException {
+    long val = getUIntBEElement(offset, length);
+
+    if (length == 64)
+      return val;
+
+    if ((val & 1L << (length - 1)) != 0)
+      return val - (1L << length);
+
+    return val;
+  }
+
+  /**
+   * Set the length bit signed big-endian int at offset to val
+   * 
+   * @param offset
+   *          bit offset where the signed int starts
+   * @param length
+   *          bit length of the signed int
+   * @param value
+   *          value to set the bit field to
+   * @exception ArrayIndexOutOfBoundsException
+   *              for invalid offset, length
+   * @exception IllegalArgumentException
+   *              if val is an out-of-range value for this bitfield
+   */
+  protected void setSIntBEElement(int offset, int length, long value)
+      throws ArrayIndexOutOfBoundsException {
+    if (length != 64 && value >= 1L << (length - 1))
+      throw new IllegalArgumentException();
+
+    if (length != 64 && value < 0)
+      value += 1L << length;
+
+    setUIntBEElement(offset, length, value);
+  }
+
+  /**
+   * Read the 32 bit IEEE float at offset
+   * 
+   * @param offset
+   *          bit offset where the float starts
+   * @param length
+   *          is ignored
+   * @exception ArrayIndexOutOfBoundsException
+   *              for invalid offset
+   */
+  protected float getFloatElement(int offset, int length)
+      throws ArrayIndexOutOfBoundsException {
+
+    return Float.intBitsToFloat((int) getUIntElement(offset, 32));
+  }
+
+  /**
+   * Set the 32 bit IEEE float at offset to value
+   * 
+   * @param offset
+   *          bit offset where the float starts
+   * @param length
+   *          is ignored
+   * @param value
+   *          value to store in bitfield
+   * @exception ArrayIndexOutOfBoundsException
+   *              for invalid offset
+   */
+  protected void setFloatElement(int offset, int length, float value)
+      throws ArrayIndexOutOfBoundsException {
+
+    // using SInt because floatToRawIntBits might return a negative value
+    setSIntElement(offset, 32, Float.floatToRawIntBits(value));
+  }
+
+  /**
+   * 
+   * @return the SerialPacket this message originated from, if it was set
+   *     externally
+   */
+  public SerialPacket getSerialPacket() {
+    return serialPacket;
+  }
+
+  /**
+   * 
+   * @param mySerialPacket the SerialPacket this message originated from
+   */
+  protected void setSerialPacket(SerialPacket mySerialPacket) {
+    serialPacket = mySerialPacket;
+  }
+  
+  
+}
diff --git a/support/sdk/java/net/tinyos/message/MessageListener.java b/support/sdk/java/net/tinyos/message/MessageListener.java
new file mode 100644
index 00000000..68504959
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/MessageListener.java
@@ -0,0 +1,72 @@
+// $Id: MessageListener.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  <dgay@intel-research.net>
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * @author David Gay <dgay@intel-research.net>
+ * @author Intel Research Berkeley Lab
+ */
+
+package net.tinyos.message;
+
+/**
+ * MessageListener interface (listen to tinyos messages).<p>
+ *
+ * An interface for listening to messages built from
+ * net.tinyos.message.Message
+ *
+ * @version	1, 15 Jul 2002
+ * @author	David Gay
+ */
+public interface MessageListener {
+    /**
+     * This method is called to signal message reception. The destination of
+     * message m is to.
+     * @param to the destination of the message (Note: to is only valid
+     *   when using TOSBase base stations)
+     * @param m the received message
+     */
+    public void messageReceived(int to, Message m);
+}
diff --git a/support/sdk/java/net/tinyos/message/MoteIF.java b/support/sdk/java/net/tinyos/message/MoteIF.java
new file mode 100644
index 00000000..0612e7ae
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/MoteIF.java
@@ -0,0 +1,187 @@
+// $Id: MoteIF.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  <dgay@intel-research.net>
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * @author David Gay <dgay@intel-research.net>
+ * @author Intel Research Berkeley Lab
+ */
+
+package net.tinyos.message;
+
+import net.tinyos.util.*;
+import net.tinyos.packet.*;
+import java.io.*;
+
+/**
+ * MoteIF provides an application-level Java interface for receiving 
+ * messages from, and sending messages to, a mote through a serial port, 
+ * TCP connection, or some other means of connectivity. Generally this
+ * is used to write Java programs that connect over a TCP or serial port
+ * to communicate with a TOSBase or GenericBase mote.
+ *
+ * The default way to use MoteIF is to create an instance of this class
+ * and then register one or more MessageListener objects that will 
+ * be invoked when messages arrive. For example:
+ * <pre>
+ *   MoteIF mif = new MoteIF();
+ *   mif.registerListener(new FooMsg(), this);
+ *   
+ *   // Invoked when a message arrives
+ *   public void messageReceived(int toaddr, Message msg) { ... }
+ * </pre>
+ * The default MoteIF constructor uses the MOTECOM environment
+ * variable to determine how the Java application connects to the mote.
+ * For example, a MOTECOM setting of "serial@COM1" connects to a base
+ * station using the serial port on COM1.
+ *
+ * You can also send messages through the base station mote using
+ * <tt>MoteIF.send()</tt>.
+ * 
+ * @see net.tinyos.packet.BuildSource
+ * @author	David Gay
+ */
+public class MoteIF {
+    /** The destination address for a broadcast. */
+    public static final int TOS_BCAST_ADDR = 0xffff;
+
+    protected PhoenixSource source;
+    protected Sender sender;
+    protected Receiver receiver;
+
+    /**
+     * Create a new mote interface to packet source specified using the 
+     * MOTECOM environment variable. Status and error messages will
+     * be printed to System.err.
+     */
+    public MoteIF() {
+	init(BuildSource.makePhoenix(net.tinyos.util.PrintStreamMessenger.err));
+    }
+
+    /**
+     * Create a new mote interface to packet source specified using the 
+     * MOTECOM environment variable. Status and error messages will
+     * be printed to 'messages'.
+     *
+     * @param messages where to send status messages (null means no messages)
+     */
+    public MoteIF(Messenger messages) {
+	init(BuildSource.makePhoenix(messages));
+    }
+
+    /**
+     * Create a new mote interface to an arbitrary packet source. The
+     * packet source is started if necessary. 
+     *
+     * @param source packet source to use
+     */
+    public MoteIF(PhoenixSource source) {
+	init(source);
+    }
+
+    /**********************************************************************/
+
+    private void init(PhoenixSource source) {
+	this.source = source;
+	// Start source if it isn't started yet
+	try {
+	    source.start();
+	}
+	catch (IllegalThreadStateException e) { }
+	try {
+	    source.awaitStartup();
+	}
+	catch (IOException e) { 
+	    e.printStackTrace();
+	}
+	receiver = new Receiver(source);
+	sender = new Sender(source);
+    }
+
+    /**
+     * @return this MoteIF's source 
+     */
+    public PhoenixSource getSource() {
+	return source;
+    }
+
+    /**
+     * Send m to moteId via this mote interface
+     * @param moteId message destination
+     * @param m message
+     * @exception IOException thrown if message could not be sent
+     */
+    synchronized public void send(int moteId, Message m) throws IOException {
+	sender.send(moteId, m);
+    }
+
+    /**
+     * Register a listener for given messages type. The message m should be
+     * an instance of a subclass of Message (generated by mig). When a
+     * message of the corresponding type is received, a new instance of m's
+     * class is created with the received message as data. This message is
+     * then passed to the given MessageListener.
+     * 
+     * Note that multiple MessageListeners can be registered for the same
+     * message type, and in fact each listener can use a different template
+     * type if it wishes (the only requirement is that m.getType() matches
+     * the received message). 
+     *
+     * @param m message template specifying which message to receive
+     * @param l listener to which received messages are dispatched
+     */
+    synchronized public void registerListener(Message m, MessageListener l) {
+	receiver.registerListener(m, l);
+    }
+
+    /**
+     * Deregister a listener for a given message type.
+     * @param m message template specifying which message to receive
+     * @param l listener to which received messages are dispatched
+     */
+    synchronized public void deregisterListener(Message m, MessageListener l) {
+      receiver.deregisterListener(m, l);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/message/Receiver.java b/support/sdk/java/net/tinyos/message/Receiver.java
new file mode 100644
index 00000000..ffd45b7b
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/Receiver.java
@@ -0,0 +1,224 @@
+// $Id: Receiver.java,v 1.6 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  <dgay@intel-research.net>
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * @author David Gay <dgay@intel-research.net>
+ * @author Intel Research Berkeley Lab
+ */
+
+package net.tinyos.message;
+
+import net.tinyos.util.*;
+import net.tinyos.packet.*;
+import java.util.*;
+
+/**
+ * Receiver class (receive tinyos messages).
+ * 
+ * A receiver class provides a simple interface built on Message for receiving
+ * tinyos messages from a SerialForwarder
+ * 
+ * @version 1, 15 Jul 2002
+ * @author David Gay
+ */
+public class Receiver implements PacketListenerIF {
+  public static final boolean DEBUG = false;
+
+  public static final boolean DISPLAY_ERROR_MSGS = true;
+
+  Hashtable templateTbl; // Mapping from AM type to msgTemplate
+
+  PhoenixSource source;
+
+  /**
+   * Inner class representing a single MessageListener and its associated
+   * Message template.
+   */
+  class msgTemplate {
+    Message template;
+
+    MessageListener listener;
+
+    msgTemplate(Message template, MessageListener listener) {
+      this.template = template;
+      this.listener = listener;
+    }
+
+    public boolean equals(Object o) {
+      try {
+        msgTemplate mt = (msgTemplate) o;
+        if (mt.template.getClass().equals(this.template.getClass())
+            && mt.listener.equals(this.listener)) {
+          return true;
+        }
+      } catch (Exception e) {
+        return false;
+      }
+      return false;
+    }
+
+    public int hashCode() {
+      return listener.hashCode();
+    }
+  }
+
+  /**
+   * Create a receiver messages from forwarder of any group id and of active
+   * message type m.getType() When such a message is received, a new instance of
+   * m's class is created with the received data and send to
+   * listener.messageReceived
+   * 
+   * @param forwarder
+   *          packet source to listen to
+   */
+  public Receiver(PhoenixSource forwarder) {
+    this.templateTbl = new Hashtable();
+    this.source = forwarder;
+    forwarder.registerPacketListener(this);
+  }
+
+  /**
+   * Register a particular listener for a particular message type. More than one
+   * listener can be registered for each message type.
+   * 
+   * @param template
+   *          specify message type and template we're listening for
+   * @param listener
+   *          destination for received messages
+   */
+  public void registerListener(Message template, MessageListener listener) {
+    Integer amType = new Integer(template.amType());
+    Vector vec = (Vector) templateTbl.get(amType);
+    if (vec == null) {
+      vec = new Vector();
+    }
+    vec.addElement(new msgTemplate(template, listener));
+    templateTbl.put(amType, vec);
+  }
+
+  /**
+   * Stop listening for messages of the given type with the given listener.
+   * 
+   * @param template
+   *          specify message type and template we're listening for
+   * @param listener
+   *          destination for received messages
+   */
+  public void deregisterListener(Message template, MessageListener listener) {
+    Integer amType = new Integer(template.amType());
+    Vector vec = (Vector) templateTbl.get(amType);
+    if (vec == null) {
+      throw new IllegalArgumentException(
+          "No listeners registered for message type "
+              + template.getClass().getName() + " (AM type "
+              + template.amType() + ")");
+    }
+    msgTemplate mt = new msgTemplate(template, listener);
+    // Remove all occurrences
+    while (vec.removeElement(mt))
+      ;
+    if (vec.size() == 0)
+      templateTbl.remove(amType);
+  }
+
+  private void error(msgTemplate temp, String msg) {
+    System.err.println("receive error for "
+        + temp.template.getClass().getName() + " (AM type "
+        + temp.template.amType() + "): " + msg);
+  }
+
+  public void packetReceived(byte[] packet) {
+    if (DEBUG)
+      Dump.dump("Received message", packet);
+
+    if (packet[0] != Serial.TOS_SERIAL_ACTIVE_MESSAGE_ID)
+      return; // not for us.
+
+    SerialPacket msg = new SerialPacket(packet, 1);
+    Integer type = new Integer(msg.get_header_type());
+    Vector vec = (Vector) templateTbl.get(type);
+    if (vec == null) {
+      if (DEBUG)
+        Dump.dump("Received packet with type " + type
+            + ", but no listeners registered", packet);
+      return;
+    }
+    int length = msg.get_header_length();
+
+    Enumeration en = vec.elements();
+    while (en.hasMoreElements()) {
+      msgTemplate temp = (msgTemplate) en.nextElement();
+
+      Message received;
+
+      // Erk - end up cloning the message multiple times in case
+      // different templates used for different listeners
+      try {
+        received = temp.template.clone(length);
+        received.dataSet(msg.dataGet(), SerialPacket.offset_data(0) + msg.baseOffset(),
+            0, length);
+        received.setSerialPacket(msg); 
+        
+      } catch (ArrayIndexOutOfBoundsException e) {
+        error(temp, "invalid length message received (too long)");
+        continue;
+      } catch (Exception e) {
+        error(temp, "couldn't clone message!");
+        continue;
+      }
+
+      /*
+       * Messages that are longer than the template might have a variable-sized
+       * array at their end
+       */
+      if (temp.template.dataGet().length > length) {
+        error(temp, "invalid length message received (too short)");
+        continue;
+      }
+      temp.listener.messageReceived(msg.get_header_dest(), received);
+    }
+  }
+}
diff --git a/support/sdk/java/net/tinyos/message/Sender.java b/support/sdk/java/net/tinyos/message/Sender.java
new file mode 100644
index 00000000..6be15b3e
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/Sender.java
@@ -0,0 +1,111 @@
+// $Id: Sender.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  <dgay@intel-research.net>
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * @author David Gay <dgay@intel-research.net>
+ * @author Intel Research Berkeley Lab
+ */
+
+package net.tinyos.message;
+
+import net.tinyos.util.*;
+import net.tinyos.packet.*;
+import java.io.*;
+
+/**
+ * Sender class (send tinyos messages).<p>
+ *
+ * A sender class provides a simple interface built on Message for
+ * sending tinyos messages to a SerialForwarder
+ *
+ * @version	2, 24 Jul 2003
+ * @author	David Gay
+ */
+public class Sender {
+    // If true, dump packet contents that are sent
+    private static final boolean VERBOSE = false;
+
+    PhoenixSource sender;
+
+    /**
+     * Create a sender talking to PhoenixSource forwarder. The group id of
+     * sent packets is not set.
+     * @param forwarder PhoenixSource with which we wish to send packets
+     */
+    public Sender(PhoenixSource forwarder) {
+	sender = forwarder;
+    }
+
+    /**
+     * Send m to moteId via this Sender's SerialForwarder
+     * @param moteId message destination
+     * @param m message
+     * @exception IOException thrown if message could not be sent
+     */
+    synchronized public void send(int moteId, Message m) throws IOException {
+	int amType = m.amType();
+	byte[] data = m.dataGet();
+
+	if (amType < 0) {
+	    throw new IOException("unknown AM type for message " +
+				  m.getClass().getName());
+	}
+
+	SerialPacket packet =
+	    new SerialPacket(SerialPacket.offset_data(0) + data.length);
+	packet.set_header_dest(moteId);
+	packet.set_header_type((short)amType);
+	packet.set_header_length((short)data.length);
+	packet.dataSet(data, 0, packet.offset_data(0), data.length);
+
+	byte[] packetData = packet.dataGet();
+	byte[] fullPacket = new byte[packetData.length + 1];
+	fullPacket[0] = Serial.TOS_SERIAL_ACTIVE_MESSAGE_ID;
+	System.arraycopy(packetData, 0, fullPacket, 1, packetData.length);
+	sender.writePacket(fullPacket);
+	if (VERBOSE) Dump.dump("sent", fullPacket);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/message/package.html b/support/sdk/java/net/tinyos/message/package.html
new file mode 100644
index 00000000..2d1e3519
--- /dev/null
+++ b/support/sdk/java/net/tinyos/message/package.html
@@ -0,0 +1,34 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
+<html>
+<head>
+<!--
+
+  @(#)package.html	1.60 98/01/27
+
+  Copyright 1998 Sun Microsystems, Inc. 901 San Antonio Road, 
+  Palo Alto, California, 94303, U.S.A.  All Rights Reserved.
+
+  This software is the confidential and proprietary information of Sun
+  Microsystems, Inc. ("Confidential Information").  You shall not
+  disclose such Confidential Information and shall use it only in
+  accordance with the terms of the license agreement you entered into
+  with Sun.
+
+  CopyrightVersion 1.2
+
+-->
+</head>
+<body bgcolor="white">
+
+Provides abstractions for reading and writing data messages to different communication sources. 
+
+
+<h2>Package Specification</h2>
+
+<h2>Related Documentation</h2>
+
+<!-- Put @see and @since tags down here. -->
+
+</body>
+</html>
+
diff --git a/support/sdk/java/net/tinyos/mviz/DDocument.java b/support/sdk/java/net/tinyos/mviz/DDocument.java
new file mode 100644
index 00000000..df45c4b7
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DDocument.java
@@ -0,0 +1,520 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+// DDocument.java
+
+import java.awt.*;
+import java.awt.event.*;
+import java.awt.image.*;
+import java.io.*;
+import java.lang.reflect.*;
+import java.net.*;
+import java.util.*;
+
+import javax.imageio.ImageIO;
+import javax.swing.*;
+import javax.swing.border.*;
+import javax.swing.table.*;
+
+import net.tinyos.message.*;
+
+public class DDocument
+    extends JPanel 
+    implements ActionListener{    
+
+    protected String directory;
+    protected JPanel canvas;
+    protected Vector layers;
+	
+    private Color currentColor;
+	
+    public float[] maxValues;
+    public int selectedFieldIndex;
+    public int selectedLinkIndex;
+    public ImageIcon icon;
+    public Image image;
+	
+	
+    public DNavigate navigator;
+    public Color getColor(){ return currentColor; }
+    public Vector sensed_motes;
+    public Vector sensed_links;
+    public ArrayList moteModels;
+    public ArrayList linkModels;
+    private JTextField jText;
+    private DrawTableModel tableModel;
+    private JTable jTable;
+	
+    private String[] toStringArray(Vector v) {
+	String[] array = new String[v.size()];
+	for (int i = 0; i < v.size(); i++) {
+	    array[i] = (String)v.elementAt(i);
+	}
+	return array;
+    }
+    
+    public DDocument(int width, int height, Vector fieldVector, Vector linkVector, String dir) {
+	super();
+	layers = new Vector();
+	directory = dir;
+	
+	setOpaque(false);
+	setLayout(new BorderLayout(6,6));
+	try{ UIManager.setLookAndFeel(UIManager.getSystemLookAndFeelClassName());
+	} catch (Exception ignore){}
+		
+	selectedFieldIndex = 0;
+	selectedLinkIndex = 0;
+	canvas = new DPanel(this);
+	canvas.setLayout(null);
+	canvas.setDoubleBuffered(true);
+	canvas.setPreferredSize(new Dimension(width, height));
+	canvas.setMinimumSize(new Dimension(width, height));
+	canvas.setSize(new Dimension(width, height));
+	canvas.setOpaque(false);
+	canvas.setBorder(new SoftBevelBorder(SoftBevelBorder.LOWERED));
+	add(canvas, BorderLayout.CENTER);
+	sensed_motes = fieldVector;
+	sensed_links = linkVector;
+	moteIndex = new HashMap();
+	linkIndex = new HashMap();
+		
+	String imgName = directory + "/mote.gif";
+	try {
+	    image = Toolkit.getDefaultToolkit().getImage(imgName);
+	}
+	catch (Exception e) {
+	    System.out.println(e);
+	}
+	System.out.println(imgName);
+		
+		
+	canvas.addComponentListener(new ComponentListener(){
+		public void componentResized(ComponentEvent e) {
+		    navigator.redrawAllLayers();
+		}
+		public void componentHidden(ComponentEvent arg0) {
+		}
+		public void componentMoved(ComponentEvent arg0) {
+		}
+		public void componentShown(ComponentEvent arg0) {
+		}			
+	    });
+
+		
+		
+	// Make control area
+	JPanel west = new JPanel();
+	west.setDoubleBuffered(true);
+	west.setLayout(new BoxLayout(west, BoxLayout.Y_AXIS));
+	add(west, BorderLayout.WEST);
+	currentColor = Color.GRAY;
+	navigator = new DNavigate(sensed_motes, sensed_links, this);
+	west.add(navigator);
+	west.add(Box.createVerticalStrut(10));
+	tableModel = new DrawTableModel(sensed_motes);
+	jTable = new JTable(tableModel);
+	jTable.setAutoResizeMode(JTable.AUTO_RESIZE_ALL_COLUMNS);
+	JScrollPane scroller = new JScrollPane(jTable);
+	scroller.setPreferredSize(new Dimension(350, 200));
+	scroller.setMinimumSize(new Dimension(350, 200));
+	scroller.setSize(new Dimension(350, 200));
+	west.add(scroller);
+		
+	enableEvents(LinkSetEvent.EVENT_ID);
+	enableEvents(ValueSetEvent.EVENT_ID);
+    }
+    public void actionPerformed(ActionEvent e) {
+    }
+
+    private void zMove(int direction){
+	tableModel.updateTable();
+    }
+    public int width_canvas = 600;
+    public int height_canvas = 600;
+	
+    protected ArrayList motes = new ArrayList();
+    protected ArrayList links = new ArrayList();
+    protected DMoteModel selected = null;
+    
+    protected HashMap moteIndex;
+    protected HashMap linkIndex;
+	
+    // Provided default ctor that calls the regular ctor
+    public DDocument(Vector fieldVector, Vector linkVector) {
+	this(300, 300, fieldVector, linkVector, ".");	 // this syntax calls one ctor from another
+    }
+	
+	
+    public DShape getSelected() {
+	return null;
+    }
+	
+    public void setSelected(DShape selected) {
+    }
+
+    Random rand = new Random();
+
+
+    private DMoteModel createNewMote(int moteID){
+	DMoteModel m = new DMoteModel(moteID, rand, this);
+	//System.out.println("Adding mote " + moteID);
+	motes.add(m);
+	moteIndex.put(new Integer(moteID), m);
+	tableModel.add(m);
+
+	navigator.addMote(m);
+	return m;
+    }
+    
+    public void setMoteValue(int moteID, String name, int value) {
+	ValueSetEvent vsv = new ValueSetEvent(this, moteID, name, value);
+	EventQueue eq = Toolkit.getDefaultToolkit().getSystemEventQueue();
+	eq.postEvent(vsv);
+    }
+
+    private DLinkModel createNewLink(DMoteModel start, DMoteModel end) {
+	DLinkModel dl = new DLinkModel(start, end, rand, this);
+	links.add(dl);
+	linkIndex.put(start.getId() + " " + end.getId(), dl);
+	//System.out.println("Put with key <" + start.getId() + " " + end.getId() + ">");
+	return dl;
+    }
+    
+    public void setLinkValue(int startMote, int endMote, String name, int value) {
+	LinkSetEvent lsv = new LinkSetEvent(this, name, value, startMote, endMote);
+	EventQueue eq = Toolkit.getDefaultToolkit().getSystemEventQueue();
+	eq.postEvent(lsv);
+    }
+
+    protected void processEvent(AWTEvent event) {
+	if (event instanceof ValueSetEvent) {
+	    ValueSetEvent vsv = (ValueSetEvent)event;
+	    String name = vsv.name();
+	    int moteID = vsv.moteId();
+	    int value = vsv.value();
+	    DMoteModel m = (DMoteModel)moteIndex.get(new Integer(moteID));
+	    if (m == null) {
+		m = createNewMote(moteID);
+	    }
+	    //System.out.println("Set " + moteID + ":" + name + " to " + value);
+	    m.setMoteValue(name, value);
+	    navigator.redrawAllLayers();
+	}
+	else if (event instanceof LinkSetEvent) {
+	    LinkSetEvent lsv = (LinkSetEvent)event;
+	    String name = lsv.name();
+	    int startMote = lsv.start();
+	    int endMote = lsv.end();
+	    int value = lsv.value();
+	    DMoteModel m = (DMoteModel)moteIndex.get(new Integer(startMote));
+	    if (m == null) {
+		m = createNewMote(startMote);
+	    }
+	    DMoteModel m2 = (DMoteModel)moteIndex.get(new Integer(endMote));
+	    if (m2 == null) {
+		m2 = createNewMote(endMote);
+	    }
+	    DLinkModel dl = (DLinkModel)linkIndex.get(startMote + " " + endMote);
+	    if (dl == null) {
+		//System.out.println("Does not contain key <" + startMote + " " + endMote + ">");
+		dl = createNewLink(m, m2);
+	    }
+	    //System.out.println("Setting " + name + " " + startMote + " -> " + endMote + " to " + value);
+	    dl.setLinkValue(name, value);
+	    navigator.redrawAllLayers();
+	}
+	else {
+	    super.processEvent(event);
+	}
+    }
+	
+    public static void usage() {
+	System.err.println("usage: tos-mviz [-comm source] [-dir image_dir] message_type [message_type ...]");
+    }
+	
+    // Just a test main -- put a little DDocument on screen
+    public static void main(String[] args)	{
+	JFrame frame = new JFrame("MViz");
+	Vector packetVector = new Vector();
+	String source = null;
+	String dir = ".";
+	if (args.length > 0) {
+	    for (int i = 0; i < args.length; i++) {
+		if (args[i].equals("-comm")) {
+		    source = args[++i];
+		}
+		else if (args[i].equals("-dir")) {
+		    dir = args[++i];
+		}
+		else {
+		    String className = args[i];
+		    packetVector.add(className);
+		}
+	    }
+	}
+	else if (args.length != 0) {
+	    usage();
+	    System.exit(1);
+	}
+	if (packetVector.size() == 0) {
+	    usage();
+	    System.exit(1);
+	}
+	
+	DataModel model = new DataModel(packetVector);
+	DDocument doc = new DDocument(600, 600, model.fields(), model.links(), dir);
+        
+	frame.setContentPane(doc);
+	frame.setDefaultCloseOperation(JFrame.EXIT_ON_CLOSE);
+	frame.pack();
+	frame.setVisible(true);
+	
+	MessageInput input = new MessageInput(packetVector, source, doc);
+	input.start();
+    }
+	
+    private void repaintAllMotes(){    	
+	Iterator it = motes.iterator();
+	while(it.hasNext()){
+	    ((DMoteModel)it.next()).requestRepaint();
+	}
+    }
+    private void repaintAllLinks(){      	
+	Iterator it = links.iterator();
+	while(it.hasNext()){
+	    ((DLink)it.next()).repaint();
+	}
+    }
+    //#########################################################################//
+	
+	
+	
+    private class DrawTableModel
+	extends AbstractTableModel
+	implements DMoteModelListener {
+	private Vector fields;
+	
+	public DrawTableModel(Vector fields) {
+	    this.fields = fields;
+	}
+	//-----------------------------o
+	public String getColumnName(int col){
+	    switch(col) {
+	    case 0:
+		return "X";
+	    case 1:
+		return "Y";
+	    default:
+		return (String)fields.elementAt(col - 2);
+	    }
+	}
+	//-----------------------------o
+	public int getColumnCount() { return fields.size() + 2; }
+	//-----------------------------o
+	public int getRowCount() {
+	    return DDocument.this.motes.size();
+	}	    
+	//-----------------------------o
+	public Object getValueAt(int row, int col) {
+	    DMoteModel model = (DMoteModel) DDocument.this.motes.get(row);
+	    switch(col) {
+	    case 0:
+		return "" + (int)model.getLocX();
+	    case 1:
+		return "" + (int)model.getLocY();
+	    default:
+		return("" + (int)model.getValue(col - 2));
+	    }
+	}
+	//-----------------------------o
+	public void shapeChanged(DMoteModel changed, int type){
+	    int row = findModel(changed);
+	    if (row != -1) fireTableRowsUpdated(row, row);	
+	}
+	//-----------------------------o
+	public void add(DMoteModel model){
+	    model.addListener(this);
+	    int last = DDocument.this.motes.size()-1;
+	    fireTableRowsInserted(last, last);
+	}
+	//-----------------------------o
+	public void remove(DMoteModel model){
+	    int row = findModel(model);
+	    if (row != -1) fireTableRowsDeleted(row, row);	        
+	}
+	//-----------------------------o
+	public void updateTable(){
+	    fireTableDataChanged();
+	}
+	//-----------------------------o
+	private int findModel(DMoteModel changed){
+	    for (int i=0; i<DDocument.this.motes.size(); i++){
+		if ((DMoteModel)DDocument.this.motes.get(i) == changed)
+		    return i;
+	    }
+	    return -1;	            
+			
+	}
+    }
+    
+    private class DPanel extends JPanel {
+	private DDocument doc;
+	private int lastX = -1;
+	private int lastY = -1;
+	
+	public DPanel(DDocument d) {
+	    super();
+	    doc = d;
+	    addMouseListener( new MouseAdapter() {
+		    private boolean withinRange(int val, int low, int high) {
+			return (val >= low && val <= high);
+		    }
+		    public void mousePressed(MouseEvent e) {
+			lastX = e.getX();
+			lastY = e.getY();
+			Iterator it = doc.motes.iterator();
+			while (it.hasNext()) {
+			    DMoteModel model = (DMoteModel)it.next();
+			    if (withinRange(e.getX(),
+					    model.getLocX() - 20,
+					    model.getLocX() + 20) &&
+				withinRange(e.getY(),
+					    model.getLocY() - 20,
+					    model.getLocY() + 20)) {
+				selected = model;
+				return;
+			    }
+			}
+		    }
+		    public void mouseReleased(MouseEvent e) {
+			if (doc.selected != null) {
+			    doc.selected = null;
+			    lastX = -1;
+			    lastY = -1;
+			}
+		    }
+		});
+	    addMouseMotionListener(new MouseMotionAdapter() {
+		    public void mouseDragged(MouseEvent e) {
+			if (doc.selected != null) {
+			    if (lastY == -1) {
+				lastY = e.getY();
+			    }
+			    if (lastX == -1) {
+				lastX = e.getX();
+			    }
+			    int x = e.getX();
+			    int y = e.getY();	
+			    int dx = x-lastX;
+			    int dy = y-lastY;
+			    lastX = x;
+			    lastY = y;
+			    
+			    selected.move(selected.getLocX() + dx, selected.getLocY() + dy);
+			}
+			doc.navigator.redrawAllLayers();
+		    }
+		});
+	}
+
+	public void paintComponent(Graphics g) {
+	    super.paintComponent(g);
+	    setOpaque(false);
+	    //System.out.println("Painting panel!");
+	    doc.navigator.redrawAllLayers();
+	}
+    }
+
+    private class CanvasMouse extends MouseAdapter {
+
+    }
+    protected class ValueSetEvent extends AWTEvent {
+	public static final int EVENT_ID = AWTEvent.RESERVED_ID_MAX + 1;
+	private String name;
+	private int value;
+	private int mote;
+	
+	public ValueSetEvent(Object target, int mote, String name, int value) {
+	    super(target, EVENT_ID);
+	    this.value = value;
+	    this.name = name;
+	    this.mote = mote;
+	}
+	
+	public String name() {
+	    return name;
+	}
+
+	public int value() {
+	    return value;
+	}
+
+	public int moteId() {
+	    return mote;
+	}
+    }
+
+
+    protected class LinkSetEvent extends AWTEvent {
+	public static final int EVENT_ID = AWTEvent.RESERVED_ID_MAX + 2;
+	private String name;
+	private int value;
+	private int start;
+	private int end;
+	
+	public LinkSetEvent(Object target, String name, int value, int start, int end) {
+	    super(target, EVENT_ID);
+	    this.value = value;
+	    this.name = name;
+	    this.start = start;
+	    this.end = end;
+	}
+	
+	public String name() {
+	    return name;
+	}
+
+	public int value() {
+	    return value;
+	}
+
+	public int start() {
+	    return start;
+	}
+
+	public int end() {
+	    return end;
+	}
+    }
+}
diff --git a/support/sdk/java/net/tinyos/mviz/DLayer.java b/support/sdk/java/net/tinyos/mviz/DLayer.java
new file mode 100644
index 00000000..d0941688
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DLayer.java
@@ -0,0 +1,365 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+// DDocument.java
+
+import java.awt.*;
+
+import javax.imageio.ImageIO;
+import javax.swing.*;
+
+import java.util.*;
+import java.awt.event.*;
+import java.io.*;
+
+import javax.swing.*;
+import javax.swing.border.Border;
+import javax.swing.border.LineBorder;
+import javax.swing.table.*;
+
+import java.awt.image.*;
+
+
+// Standard imports for XML
+import javax.xml.parsers.*;
+import org.xml.sax.*;
+import org.w3c.dom.*;
+
+
+
+
+public class DLayer extends JPanel implements ActionListener{
+	
+    public static final int MOTE = 0;
+    public static final int LINK = 1;
+    public static final int FIELD = 2;
+    private static final Color[] COLORS = {
+	new Color(231, 220, 206),
+	new Color(250, 210, 99),
+	new Color(209, 230, 179)
+    };
+	
+    private int type;
+    protected int index;
+    protected int zIndex;
+    protected int z_index = 0;
+    private ArrayList layer = new ArrayList();
+	
+    private JLabel label;
+    private JCheckBox check;
+    private String[][] DISPLAYS = { {"circle", "img", "txt"}, {"line", "line+label", "label"}, {"color 256", "color 1024", "color 4096", "color 16384"}};
+    private JComboBox displays;
+	
+    private ArrayList models;
+    private ArrayList linkModels;
+    private JButton up;
+    private JButton down;
+	
+    protected int paintMode = 0;
+    // Values chosen for COLOR so that readings can be right shifted
+    // that many bits to be in range 0-255
+    static public final int COLOR_256 = 0;
+    static public final int OVAL = 1;
+    static public final int COLOR_1024 = 2;
+    static public final int IMG = 3;
+    static public final int COLOR_4096 = 4;
+    static public final int TXT_MOTE = 5;
+    static public final int COLOR_16384 = 6;
+    static public final int LINE = 7;
+    static public final int LABEL = 8;
+    static public final int LINE_LABEL = 9;
+    
+    protected DNavigate navigator;
+	
+    private String name;
+    private DDocument parent;
+	
+    public DLayer(int zIndex, int index, String label, int type, DDocument parent, ArrayList models, DNavigate navigator){
+	this.parent = parent;
+	this.type = type;
+	this.models = models;
+	this.zIndex = zIndex;
+	this.index = index;
+	this.navigator = navigator;
+	this.name = label;
+	if (type == MOTE) {
+	    this.paintMode = OVAL;
+	}
+	else if (type == LINK) {
+	    this.paintMode = LINE;
+	}
+
+	
+	SpringLayout layout = new SpringLayout();
+	setLayout(layout);
+	setMaximumSize(new Dimension(350, 25));
+	setPreferredSize(new Dimension(350, 25));
+	setSize(new Dimension(350, 25));
+	setDoubleBuffered(true);
+	setBackground(COLORS[type]);
+	setBorder(new LineBorder(new Color(155, 155, 155)));
+		
+	check = new JCheckBox();
+	check.setSize(35, 25);
+	check.setMaximumSize(new Dimension(35, 25));
+	check.setMinimumSize(new Dimension(35, 25));
+	check.setPreferredSize(new Dimension(35, 25));
+	
+	up = new JButton("^");
+	up.setFont(new Font("Times", Font.PLAIN, 9));
+	up.setSize(25, 25);
+	up.setMaximumSize(new Dimension(25, 25));
+	up.setMinimumSize(new Dimension(25, 25));
+	up.setPreferredSize(new Dimension(25, 25));
+	up.setMargin(new Insets(2, 2, 2, 2));
+
+	down = new JButton("v");
+	down.setFont(new Font("Times", Font.PLAIN, 8));
+	down.setSize(25, 25);
+	down.setMaximumSize(new Dimension(25, 25));
+	down.setMinimumSize(new Dimension(25, 25));
+	down.setPreferredSize(new Dimension(25, 25));
+	down.setMargin(new Insets(2, 2, 2, 2));
+
+	this.label = new JLabel(" " + label, JLabel.LEFT);
+	this.label.setSize(125, 25);
+	this.label.setMaximumSize(new Dimension(125, 25));
+	this.label.setMinimumSize(new Dimension(125, 25));
+	this.label.setPreferredSize(new Dimension(125, 25));
+	switch (type) {
+	case MOTE:
+	    this.label.setBackground(new Color(255, 200, 200));
+	    break;
+	case FIELD:
+	    this.label.setBackground(new Color(200, 255, 200));
+	    break;
+	case LINK:
+	    this.label.setBackground(new Color(200, 200, 255));
+	    break;
+	default:
+	    // do nothing
+	}
+	
+	displays = new JComboBox(DISPLAYS[type]);
+	displays.setSize(100, 25);
+	//displays.setMaximumSize(new Dimension(125, 25));
+	displays.setMinimumSize(new Dimension(125, 25));
+	displays.setPreferredSize(new Dimension(125, 25));
+	
+	
+	check.addActionListener(this);
+	up.addActionListener(this);
+	down.addActionListener(this);
+	displays.addActionListener(this);
+
+	layout.putConstraint(SpringLayout.WEST, this, 0, SpringLayout.WEST, down);
+	layout.putConstraint(SpringLayout.EAST, check, 0, SpringLayout.WEST, down);
+	layout.putConstraint(SpringLayout.EAST, down, 0, SpringLayout.WEST, up);
+	layout.putConstraint(SpringLayout.EAST, up, 0, SpringLayout.WEST, this.label);
+	layout.putConstraint(SpringLayout.EAST, this.label, 0, SpringLayout.WEST, displays);
+	layout.putConstraint(SpringLayout.EAST, displays, 0, SpringLayout.EAST, this);
+
+	
+	add(check);
+	add(down);
+	add(up);
+	add(this.label);
+	add(displays);
+
+	
+		
+    }
+	
+    public boolean isFieldSelected(){
+	return (type==FIELD && check.isSelected());
+    }
+	
+    public void actionPerformed(ActionEvent e) {
+	if (e.getSource() == check) {
+	    if (check.isSelected()){
+		parent.selectedFieldIndex = index;
+		//repaintLayer(g);
+		//System.out.println("redraw index " +zIndex +" on layer");
+	    } else if(type==FIELD){
+		//System.out.println("clear");
+		//parent.canvas.repaint();
+		//repaintLayer(g);
+	    } else {
+		//repaintLayer(g);
+	    }
+	} else if (e.getSource() == up){
+	    parent.navigator.moveLayerUp(this.zIndex);
+	} else if (e.getSource() == down){
+	    parent.navigator.moveLayerDown(this.zIndex);
+	} else if (e.getSource() == displays){
+	    String selected = (String)displays.getSelectedItem();
+	    if (selected.equals("circle")){
+		paintMode = OVAL;
+	    } else if (selected.equals("img")){
+		paintMode = IMG;        		
+	    } else if (selected.equals("txt")){
+		paintMode = TXT_MOTE;        		
+	    } else if (selected.equals("color 256")) {
+		paintMode = COLOR_256;
+	    } else if (selected.equals("color 1024")) {
+		paintMode = COLOR_1024;
+	    } else if (selected.equals("color 4096")) {
+		paintMode = COLOR_4096;
+	    } else if (selected.equals("color 16384")) {
+		paintMode = COLOR_16384;
+	    } else if (selected.equals("line")) {
+		paintMode = LINE;
+	    } else if (selected.equals("label")) {
+		paintMode = LABEL;
+	    } else if (selected.equals("line+label")) {
+		paintMode = LINE_LABEL;
+	    }
+	}
+	//System.out.println("Repainting parent?");
+	//parent.repaint();
+    }
+
+    public void init(){
+	if (type==LINK){
+	    //addLinks(true);
+	} else {
+	    addMotes(true);
+	}
+    }
+
+    public String toString() {
+	return "Layer " +  name + " " + type;
+    }
+    
+	
+    // private void addLinks(boolean paint){
+    // 		Iterator it = models.iterator();
+    // 		while(it.hasNext()){
+    // 			DLink mm = (DLink) it.next();
+    // 			//canvas.add(mm);
+    // 			if (paint) mm.repaint();
+    // 		}    	
+    //     }
+	
+    protected void addMote(DMoteModel model, boolean paint){
+	DShape mote = new DMote(model, this.parent, this);
+	layer.add(mote);
+    }
+	
+    private void addMotes(boolean paint){
+	Iterator it = models.iterator();
+        while(it.hasNext()){
+	    addMote((DMoteModel) it.next(), paint);
+	} 	    
+    }
+    
+	
+    public void updateIndex(int index, boolean repaint){
+	zIndex = index;
+	z_index = (navigator.totalLayers - zIndex)*100;
+	//if (repaint) redrawLayer();
+	//parent.canvas.setLayer(d.canvas, length - i);
+    }
+
+    public void paintScreenBefore(Graphics g) 
+    {
+
+        Dimension d = parent.canvas.getSize();
+        int x = 0;
+        int y = 0;
+        int xstep = (int)(d.width / 40);
+	int ystep = (int)(d.height / 40);  
+
+        for(;x < d.width; x += xstep){
+            for(y = 0;y < d.height; y += ystep){
+                double val = 0;
+                double sum = 0;
+                double total = 0;
+                double min = 10000000;
+                Iterator it = models.iterator();
+                while(it.hasNext()){
+                    DMoteModel m = (DMoteModel) it.next();
+                    double dist = distance(x, y, m.x, m.y);   
+                    if(true){ //121
+                        if(dist < min) min = dist;
+                        val += ((double)(((int)m.getValue(index)) >> paintMode ))  / dist /dist;
+                        sum += (1/dist/dist);
+                    }
+                }
+                int reading = (int)(val / sum);
+		//System.out.println("Reading: " + reading);
+                if (reading > 255)
+                    reading = 255;
+                g.setColor(new Color(reading, reading, reading));
+		//System.out.println("Filling "  + x + "+" + step + " " + y + "+" + step + " with " + g.getColor());
+                g.fillRect(x, y, xstep, ystep);
+            }
+        }
+
+	
+    }
+
+    public double distance(int x, int y, int x1, int y1){
+        return Math.sqrt( (x-x1)*(x-x1)+(y-y1)*(y-y1));
+    }
+
+    protected void repaintLayer(Graphics g){
+    	if (check.isSelected()){
+	    //System.out.println("Repaint layer " + name);
+	    if 	(type==FIELD){
+		paintScreenBefore(g);
+	    } else if (type == LINK) {
+		Iterator it = models.iterator();
+		//System.out.print("Draw links: ");
+		while (it.hasNext()) {
+		    DLinkModel model = (DLinkModel)it.next();
+		    DLink lnk = new DLink(model, parent, this);
+		    lnk.paintShape(g);
+		    //System.out.print("+");
+		}
+		//System.out.println();
+	    }
+	    else if (type == MOTE) {
+		Iterator it = models.iterator();
+		//System.out.print("Draw motes: ");
+		while (it.hasNext()){
+		    DMoteModel model = (DMoteModel)it.next();
+		    DShape m = new DMote(model, parent, this);
+		    m.paintShape(g);
+		    //System.out.print("+");
+		}
+		//System.out.println();
+	    }
+    	}	
+    }
+}
diff --git a/support/sdk/java/net/tinyos/mviz/DLink.java b/support/sdk/java/net/tinyos/mviz/DLink.java
new file mode 100644
index 00000000..725d19b0
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DLink.java
@@ -0,0 +1,173 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+// DShape.java
+import java.awt.*;
+import java.util.*;
+import javax.swing.*;
+import java.awt.event.*;
+import java.awt.geom.Line2D;
+
+public class DLink 
+extends JComponent 
+implements DLinkModelListener
+{
+	
+	protected DLinkModel model;
+	protected DDocument document;
+    private DLayer layer;
+    // remember the last point for mouse tracking
+	private int lastX, lastY;
+	
+	// Move or Resize ?
+	private int action;
+    private static final int MOVE = 0;
+	//=========================================================================//
+    public DLink(DLinkModel model, DDocument document, DLayer layer) {
+		super();
+		this.model = model;
+		this.layer = layer;
+		this.document = document;
+		model.addListener(this);
+		
+		// Mouse listeners.
+		addMouseListener( 
+		        new MouseAdapter() 
+		        {
+		            public void mousePressed(MouseEvent e) {
+		                selected();
+		                lastX = e.getX()+getX();
+		                lastY = e.getY()+getY();
+		                
+		                if (e.isControlDown()){ 
+		                }else if(e.isAltDown()){ 
+		                }else if(e.isShiftDown()){
+		                }else{ DetermineAction(lastX, lastY); }			    
+		            }
+		        }
+		);
+
+		addMouseMotionListener( 
+		        new MouseMotionAdapter() 
+		        {
+		            public void mouseDragged(MouseEvent e) {
+		                
+		                int x = e.getX()+getX();
+		                int y = e.getY()+getY();
+		                // compute delta from last point
+		                int dx = x-lastX;
+		                int dy = y-lastY;
+		                lastX = x;
+		                lastY = y;
+		                
+		                switch(action){
+		                case MOVE: DoAction(dx, dy); break;
+		                }
+		            }
+		        }
+		);
+		
+		synchToModel();		
+	}
+   
+	//=========================================================================//
+	public DLinkModel getModel() {
+		return(model);
+	}
+	
+	//=========================================================================//
+	public void shapeChanged(DLinkModel changed, int type) {
+	    synchToModel();
+	    repaint();
+	}
+	//=========================================================================//
+    public void paintShape(Graphics g){
+	    Graphics2D g2 = (Graphics2D) g;
+	    g.setColor(Color.BLACK);
+	    int diffX = (model.m1.getLocX() - model.m2.getLocX());
+	    int diffY = (model.m1.getLocY() - model.m2.getLocY());
+	    if (diffX == 0 && diffY == 0) {
+		return;
+	    }
+	    if (diffX == 0) {diffX = 1;}
+	    if (diffY == 0) {diffY = 1;}
+	    int midX = (model.m1.getLocX() + model.m2.getLocX()) / 2;
+	    int midY = (model.m1.getLocY() + model.m2.getLocY()) / 2;
+	    midY += 8;
+	    midX += 10;
+	    //midX += Math.abs(((double)diffX / ((double)Math.abs(diffY) + (double)Math.abs(diffX))) * 60);
+	    if (diffX * diffY < 0) {
+		midY += Math.abs(((double)diffX / ((double)Math.abs(diffY) + (double)Math.abs(diffX))) * 10);
+		midX += Math.abs(((double)diffX / ((double)Math.abs(diffY) + (double)Math.abs(diffX))) * 10);
+	    }
+	    else {
+		midY -= Math.abs(((double)diffX / ((double)Math.abs(diffY) + (double)Math.abs(diffX))) * 10);
+		midX += Math.abs((double)diffX / ((double)Math.abs(diffY) + (double)Math.abs(diffX)) * 10);
+	    }
+	    switch(layer.paintMode) {
+	    case DLayer.LINE_LABEL:
+		g.setColor(Color.BLACK);
+		g2.drawString(document.sensed_links.elementAt(layer.index) + ": " + (int)model.getValue(layer.index), midX, midY);
+	    case DLayer.LINE:
+		g2.setStroke(new BasicStroke(3));
+		g2.setColor(Color.RED);
+		g2.draw(new Line2D.Double(model.m1.getLocX(),  model.m1.getLocY(), model.m2.getLocX(), model.m2.getLocY()));
+		break;
+	    case DLayer.LABEL:
+		g.setColor(Color.BLACK);
+		g2.drawString(document.sensed_links.elementAt(layer.index) + ": " + (int)model.getValue(layer.index), midX, midY);
+		break;
+	    }
+	}
+    //=========================================================================//
+    public void paintComponent(Graphics g) {
+    }
+	//=========================================================================//
+	private void DetermineAction(int x, int y){
+        action = MOVE;	        
+	}
+	//=========================================================================//
+	private void DoAction(int dx, int dy){
+	}
+	//=========================================================================//
+	private void synchToModel(){
+	    setBounds(model.getTop(), model.getLeft(), model.getWidth(), model.getHeight());
+	}
+	//=========================================================================//
+	private void selected(){    
+	}
+
+}
+
+
+
diff --git a/support/sdk/java/net/tinyos/mviz/DLinkModel.java b/support/sdk/java/net/tinyos/mviz/DLinkModel.java
new file mode 100644
index 00000000..560d78a3
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DLinkModel.java
@@ -0,0 +1,162 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+// DShapeModel.java
+/*
+ Store the data state for a single shape:
+  type, two points, color
+ Supports DShapeModelListeners.
+*/
+import java.awt.*;
+
+import javax.swing.*;
+import java.util.*;
+import java.awt.event.*;
+import java.io.*;
+
+
+class DLinkModel 
+extends Object 
+implements Serializable {
+
+	public static final int VALUE = 0;
+	public static final int MOTION = 1;
+	public static final int ANY = 1;
+	
+	
+    public DDocument root;
+    transient private ArrayList listeners;
+    
+    protected int x12, y12;
+    protected int[] values;
+    
+    DMoteModel m1;
+    DMoteModel m2;
+    
+    protected int COLOR_MAX = 230;
+	
+    public DLinkModel(DMoteModel m1, DMoteModel m2, Random rand, DDocument root){
+        this.root = root;
+        this.m1 = m1;
+        this.m2 = m2;
+        
+        x12 = getMiddle(m1.x, m2.x);
+        y12 = getMiddle(m1.y, m2.y);
+        
+        values = new int[root.sensed_links.size()];
+        
+        for (int i=0; i<root.sensed_links.size(); i++){
+            values[i] = 0;
+        }   
+        
+
+        //.listeners = null;
+    }
+
+    protected void setLinkValue(String name, int value) {
+	int index = root.sensed_links.indexOf(name);
+	if (index < 0) return;
+	values[index] = value;
+	//System.out.println("Setting link value " + index + " to " + value);
+    }
+    private int getMiddle(int x1, int x2){
+    	return (x1 + x2)/2;
+    }
+    
+    public Color setColor(float value){
+        int color = (int)(value)%COLOR_MAX;
+        return new Color(color+15, color, color+25);
+    } 
+	
+	public int getValue() { return(values[root.selectedLinkIndex]); }
+    	public int getValue(int index) {
+	    //System.out.println("Gettting link value " + index);
+	    return(values[index]);
+	}
+    public int getValue(String name) {
+	int index = root.sensed_links.indexOf(name);
+	if (index < 0) return 0 ;
+	return values[index];
+    }
+	public int getTop() { return(Math.min(m1.y, m2.y)); }		
+	public int getBottom() { return(Math.max(m1.y, m2.y)); }		
+	public int getLeft() { return(Math.min(m1.x, m2.x)); }		
+	public int getRight() { return(Math.max(m1.x, m2.x)); }
+	
+	public int getWidth() { return(Math.abs(m1.x - m2.x)); }
+	public int getHeight() { return(Math.abs(m1.y - m2.y)); }
+
+    protected Color getColor() {
+	return Color.RED;
+    }
+	public void setValue(int value){
+	    values[root.selectedLinkIndex] = value;
+	    fireChanges();
+	}
+
+    
+	public int getLocX() {
+	    return x12;
+	}	
+	public int getLocY() {
+	    return y12;
+	}		
+	
+	
+	public void addListener(DLinkModelListener listener) {
+	    if (listeners == null) listeners = new ArrayList();
+	    Iterator it = listeners.iterator();
+		while (it.hasNext()) { if (it.next() == listener) return; };		
+		listeners.add(listener);	    
+	}
+
+	public void removeListener(DLinkModelListener listener) {
+	    if (listeners == null) return;	    
+	    Iterator it = listeners.iterator();
+		while (it.hasNext()) {
+		    if (it.next() == listener){
+		        it.remove();
+		        return;
+		    }		
+		}	        	
+	}
+	//=========================================================================/
+	protected void fireChanges(){
+	    if (listeners==null) return;
+	    Iterator it = listeners.iterator();
+		while (it.hasNext()) 
+		   ((DLinkModelListener)(it.next())).shapeChanged(this, ANY);
+	}
+	
+}
+
diff --git a/support/sdk/java/net/tinyos/mviz/DLinkModelListener.java b/support/sdk/java/net/tinyos/mviz/DLinkModelListener.java
new file mode 100644
index 00000000..4432f245
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DLinkModelListener.java
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+
+import java.util.EventListener;
+
+public interface DLinkModelListener{
+    public void shapeChanged(DLinkModel changed, int type); 
+}
diff --git a/support/sdk/java/net/tinyos/mviz/DMote.java b/support/sdk/java/net/tinyos/mviz/DMote.java
new file mode 100644
index 00000000..f192e0fc
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DMote.java
@@ -0,0 +1 @@
+/*
 * Copyright (c) 2006 Stanford University.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Stanford University nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
 * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

package net.tinyos.mviz;

import java.awt.*;


public class DMote
extends DShape 
implements DMoteModelListener
{
    
    private DDocument document;
    private DMoteModel model;
    
    public DMote(DMoteModel model, DDocument document, DLayer layer) {
        super(model, document, layer);
	this.document = document;
	this.model = model;
    }
    

    static int counter =0;
    public void paintShape(Graphics g) {
	int x = model.getLocX();
	int y = model.getLocY();
	//System.out.println("Mode " + layer.paintMode);
    	switch(layer.paintMode){
    	case DLayer.IMG:
	    Image img = model.getImage();
	    java.awt.MediaTracker tracker = new java.awt.MediaTracker(this);
	    tracker.addImage(img, 0);
	    if (document.selected == model) {
		g.setColor(Color.RED);
		g.fillOval(x-22, y-22, 44, 44);
	    }
	    g.drawImage(img, x-20, y-20, 40, 40, document.canvas);
	    try {tracker.waitForAll();}
	    catch(InterruptedException e){} 
	    //System.out.println("Draw image " + img + " " + x + " " + y + " " + img.getHeight(document.canvas) + " " + tracker.isErrorAny());

	    //img = model.getIcon().getImage();
	    //System.out.println("Draw image " + img + " " + x + " " + y);
	    //document.canvas.getGraphics().drawImage(img, x, y, this.model.root);
	    break;
    	case DLayer.OVAL:
	    if (document.selected != model) {
		g.setColor(Color.GRAY);
	    }
	    else {
		g.setColor(Color.RED);
	    }
	    counter++;
	    g.fillOval(x-20, y-20, 40, 40);
	    break;
    	case DLayer.TXT_MOTE:
	    g.setFont(new Font("Helvetica", Font.PLAIN, 8));
	    g.setColor(Color.BLACK);
	    g.drawString(document.sensed_motes.elementAt(layer.index) + ": " + (int)model.getValue(layer.index), x+22, y-2);
	    break;
	default:
    	}

    }

}


\ No newline at end of file
diff --git a/support/sdk/java/net/tinyos/mviz/DMoteModel.java b/support/sdk/java/net/tinyos/mviz/DMoteModel.java
new file mode 100644
index 00000000..d430818f
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DMoteModel.java
@@ -0,0 +1,233 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+// DShapeModel.java
+/*
+  Store the data state for a single shape:
+  type, two points, color
+  Supports DShapeModelListeners.
+*/
+import java.awt.*;
+
+import javax.swing.*;
+import java.util.*;
+import java.awt.event.*;
+import java.io.*;
+
+
+class DMoteModel 
+    extends Object 
+    implements Serializable {
+
+    public static final int VALUE = 0;
+    public static final int MOTION = 1;
+    public static final int ANY = 1;
+	
+	
+    public DDocument root;
+    transient private ArrayList listeners;
+    
+    protected int x, y, id;
+    protected float[] values;
+    protected Color[] colors;
+    protected int[] sizes;
+    
+    protected int SHAPE_SIZE_MAX = 100;
+    protected int COLOR_MAX = 230;
+    
+    
+	
+    public DMoteModel(int id, int x, int y, float[] values, DDocument root) {
+        this.root = root;
+        this.x = x;
+        this.y = y;
+	this.id = id;
+       
+        values = new float[root.sensed_motes.size()];
+        colors = new Color[root.sensed_motes.size()];
+        sizes = new int[root.sensed_motes.size()];
+        
+        for (int i=0; i<values.length; i++){
+            colors[i] = setColor(values[i]);
+        }
+        for (int i=0; i<values.length; i++){
+            sizes[i] = setShapeSize(values[i]);
+        }
+        
+        listeners = null;
+    }
+
+	
+    public DMoteModel(DDocument root, int id, String name){
+    	
+    }
+	
+    public DMoteModel(int id, Random rand, DDocument root){
+        this.root = root;
+	this.id = id;
+		
+        x = 20 + rand.nextInt(root.canvas.getWidth() - 20);
+        y = 20 + rand.nextInt(root.canvas.getHeight()- 20);
+        
+        values = new float[root.sensed_motes.size()];
+	
+        colors = new Color[root.sensed_motes.size()];
+        sizes = new int[root.sensed_motes.size()];
+        
+        for (int i=0; i<root.sensed_motes.size(); i++){
+            values[i] = rand.nextFloat()*1000;     
+            colors[i] = setColor(values[i]);
+            sizes[i] = setShapeSize(values[i]);
+        }   
+        
+        listeners = null;
+    }
+    
+    public int getId() {
+	return id;
+    }
+    
+    public Color setColor(float value){
+        int color = (int)(value)%COLOR_MAX;
+        return new Color(color+15, color, color+25);
+    }
+    public int setShapeSize(float value){
+        return SHAPE_SIZE_MAX;
+        //return (int)(value/root.maxValues[root.selectedFieldIndex] * SHAPE_SIZE_MAX);
+    }    
+	
+    public float getValue(int index) {
+	if (values.length <= index) {
+	    return 0;
+	}
+	else {
+	    return(values[index]);
+	}
+    }
+
+    public boolean setMoteValue(String field, int value){
+	int index = root.sensed_motes.indexOf(field);
+	if (index < 0) return false;
+	colors[index] = setColor((float)value);
+	setValue(index, (float) value);
+	return true;
+    }
+
+    
+    public int getX() { return(x); }
+    public int getY() { return(y); }
+    public ImageIcon getIcon(){ return root.icon; }
+	
+    public void setValue(int index, float value){
+	values[index] = value;
+	fireChanges();
+    }    
+    public void applyDeltas(int dx, int dy) {        
+	x += dx;
+	y += dy;
+	fireChanges();
+    }
+    public Image getImage() {
+	return root.image;
+    }
+    public int getWidth(int index) {
+	return getIcon().getImage().getWidth(this.root);
+	//return sizes[index];
+    }	
+    public int getHeight(int index) {
+	return getIcon().getImage().getHeight(this.root);
+	//return sizes[index];
+    }	
+    public int getLeft(){
+	return getLocX() - getWidth(0)/2;
+    }
+    public int getTop(){
+	return getLocY() - getHeight(0)/2;
+    } 
+    public int getLocX() {
+	return x;
+    }	
+    public int getLocY() {
+	return y;
+    }		
+    public Color getColor(int index) { 
+	return colors[index]; 
+    }
+	
+	
+    public void addListener(DMoteModelListener listener) {
+	if (listeners == null) listeners = new ArrayList();
+	Iterator it = listeners.iterator();
+	while (it.hasNext()) { if (it.next() == listener) return; };		
+	listeners.add(listener);	    
+    }
+
+    public void removeListener(DMoteModelListener listener) {
+	if (listeners == null) return;	    
+	Iterator it = listeners.iterator();
+	while (it.hasNext()) {
+	    if (it.next() == listener){
+		it.remove();
+		return;
+	    }		
+	}	        	
+    }
+    //=========================================================================/
+    protected void fireChanges(){
+	if (listeners==null) return;
+	Iterator it = listeners.iterator();
+	while (it.hasNext()) 
+	    ((DMoteModelListener)(it.next())).shapeChanged(this, ANY);
+    }
+    public void requestRepaint(){
+	fireChanges();
+    }
+	
+    //=========================================================================/
+    public void move(int x, int y){
+        this.x = x;
+        this.y = y;
+	fireChanges();	    
+    }
+
+    public boolean equals(Object o) {
+	if (o instanceof DMoteModel) {
+	    DMoteModel dm = (DMoteModel)o;
+	    if (dm.getId() == getId()) {
+		return true;
+	    }
+	}
+	return false;
+    }
+}
+
diff --git a/support/sdk/java/net/tinyos/mviz/DMoteModelListener.java b/support/sdk/java/net/tinyos/mviz/DMoteModelListener.java
new file mode 100644
index 00000000..2fbb5d45
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DMoteModelListener.java
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+
+import java.util.EventListener;
+
+public interface DMoteModelListener{
+    public void shapeChanged(DMoteModel changed, int type); 
+}
diff --git a/support/sdk/java/net/tinyos/mviz/DNavigate.java b/support/sdk/java/net/tinyos/mviz/DNavigate.java
new file mode 100644
index 00000000..f0464ebc
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DNavigate.java
@@ -0,0 +1,212 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+
+// DDocument.java
+
+import java.awt.*;
+
+import javax.imageio.ImageIO;
+import javax.swing.*;
+
+import java.util.*;
+import java.awt.event.*;
+import java.io.*;
+
+import javax.swing.table.*;
+import java.awt.image.*;
+
+
+// Standard imports for XML
+import javax.xml.parsers.*;
+import org.xml.sax.*;
+import org.w3c.dom.*;
+
+
+public class DNavigate extends JPanel implements ActionListener{
+    private DDocument parent;
+    protected ArrayList layers = new ArrayList();
+    private int _tmp_i = 0;
+    protected int totalLayers = 0;
+	
+    private int default_width = 600;
+    private int default_height = 600;
+    
+    public DNavigate(Vector label_motes, Vector label_links, DDocument parent){
+		this.parent = parent;
+		BoxLayout layout = new BoxLayout(this,BoxLayout.PAGE_AXIS);
+		this.setLayout(layout);
+		//this.setBackground(new Color(10,100,200));
+
+		totalLayers = 2 * label_motes.size() + label_links.size();
+		
+		this._tmp_i = 0;
+		addLayer(label_motes, DLayer.MOTE, parent.motes);
+		addLayer(label_links, DLayer.LINK, parent.links);
+		addLayer(label_motes, DLayer.FIELD, parent.motes);      
+		updateLayerIndex(false);
+
+
+		// debug prints
+		Iterator it = layers.iterator();
+		while (it.hasNext()){
+		    DLayer m = (DLayer)it.next();
+		    //System.out.println("setting layer: zIndex=" + m.z_index + ", index=" + m.zIndex);
+		}
+        
+	}
+
+    protected void addMote(DMoteModel model){
+	Iterator it = layers.iterator();
+	while(it.hasNext()){
+	    DLayer layer = (DLayer)it.next();
+	    layer.addMote(model, true);
+	}
+   }
+	
+	private void addLayer(Vector labels, int type, ArrayList models){
+	    for (int i=0; i<labels.size(); i++, _tmp_i++){
+		DLayer d = new DLayer(_tmp_i, i, (String)labels.elementAt(i), type, parent, models, this);
+		this.add(d);
+		layers.add(d);
+	    }
+	}
+	
+	private void updateLayerIndex(boolean repaint){
+		int length = layers.size();
+		Iterator it = layers.iterator();
+		int i = 0;
+		while (it.hasNext()){
+		    DLayer d = (DLayer)it.next();
+		    d.updateIndex(i, repaint);
+		    ++i;
+        }
+	}
+	
+	public void redrawNavigator(){
+	    //System.out.println("Redrawing navigator.");
+	    Iterator it = layers.iterator();
+	    while (it.hasNext()){
+		remove((DLayer)it.next());
+	    }
+	    it = layers.iterator();
+	    while (it.hasNext()){
+		add((DLayer)it.next());
+	    }
+	   
+	    revalidate();
+	    //repaint();
+	    //parent.repaint();
+	    //parent.canvas.repaint();
+	    redrawAllLayers();
+	}
+	
+	public void moveLayerUp(int zIndex){
+		if (zIndex == 0){ return; }
+		DLayer d = (DLayer) layers.remove(zIndex);
+		layers.add(zIndex-1, d);
+		updateLayerIndex(true);
+		redrawNavigator();
+		redrawAllLayers(); 
+	}
+	
+	public void moveLayerDown(int zIndex){
+		if (zIndex == layers.size()-1){ return; }
+		DLayer d = (DLayer) layers.remove(zIndex);
+		layers.add(zIndex+1, d);
+		updateLayerIndex(true);
+		redrawNavigator();
+		redrawAllLayers();
+	}
+	
+	public void init(){
+		Iterator it = layers.iterator();
+		while (it.hasNext()){
+		    DLayer layer = (DLayer)it.next();
+		    layer.init();
+		}
+	}
+
+	
+
+    public void paint() {
+	//System.out.println("Painting navigator");
+	redrawNavigator();
+	Iterator it = layers.iterator();
+    }
+	
+    public void actionPerformed(ActionEvent e) {
+	// TODO Auto-generated method stub
+	
+    }
+
+    
+    private long currentSecond = -1;
+    private long PERIOD = 500;
+    
+    protected void redrawAllLayers(){
+	Date date = new Date();
+	if (date.getTime() - currentSecond < PERIOD){
+	    //System.out.println("time: " + (date.getTime() - currentSecond));
+	    return;
+	} else {
+	    currentSecond = date.getTime();
+	}
+	    
+	int start = totalLayers-1;
+	for (int i=0; i<totalLayers; i++){
+	    DLayer a = (DLayer)layers.get(i);
+	    if (a.isFieldSelected()){
+		start = a.zIndex;
+		break;
+	    }
+	}
+	DLayer bg = (DLayer)layers.get(start);
+	Image offscreen = new BufferedImage(parent.canvas.getWidth(), parent.canvas.getHeight(), BufferedImage.TYPE_INT_ARGB);
+	Graphics g = offscreen.getGraphics();
+	Graphics2D g2d = (Graphics2D)g;
+	g2d.clearRect(0, 0, parent.canvas.getWidth(), parent.canvas.getHeight());
+	g2d.fillRect(0, 0, parent.canvas.getWidth(), parent.canvas.getHeight());
+
+	for (int i=start; i>=0; i--){
+	    DLayer a = (DLayer)layers.get(i);
+	    a.repaintLayer(g);
+	}
+	parent.canvas.getGraphics().drawImage(offscreen, 0, 0, this);
+    }
+
+    public void update(Graphics g) {
+	paint(g);
+    }
+	    
+}
diff --git a/support/sdk/java/net/tinyos/mviz/DShape.java b/support/sdk/java/net/tinyos/mviz/DShape.java
new file mode 100644
index 00000000..a4222afe
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DShape.java
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+
+// DShape.java
+import java.awt.*;
+import java.util.*;
+import javax.swing.*;
+import java.awt.event.*;
+
+abstract class DShape 
+extends JComponent 
+implements DMoteModelListener
+{
+	
+	protected DMoteModel model;
+	protected DDocument document;
+	public Image img;
+	
+
+	
+    // remember the last point for mouse tracking
+	private int lastX, lastY;
+	protected DLayer layer;
+	
+	// Move or Resize ?
+	private int action;
+    private static final int MOVE = 0;
+	//=========================================================================//
+	public DShape(DMoteModel model, DDocument document, DLayer layer) {
+		super();
+		this.model = model;
+		this.img = document.image;
+		this.document = document;
+		this.layer = layer;
+		model.addListener(this);
+
+		addMouseMotionListener( 
+		        new MouseMotionAdapter() 
+		        {
+		            public void mouseDragged(MouseEvent e) {
+		                
+		                int x = e.getX()+getX();
+		                int y = e.getY()+getY();
+		                // compute delta from last point
+		                int dx = x-lastX;
+		                int dy = y-lastY;
+		                lastX = x;
+		                lastY = y;
+		                
+		                switch(action){
+		                case MOVE: DoAction(dx, dy); break;
+		                }
+		            }
+		        }
+		);
+		
+		synchToModel();		
+	}
+   
+	//=========================================================================//
+	public DMoteModel getModel() {
+		return(model);
+	}
+	
+	//=========================================================================//
+	public void shapeChanged(DMoteModel changed, int type) {
+	    synchToModel();
+	    repaint();
+	}
+	//=========================================================================//
+	public abstract void paintShape(Graphics g);
+	//=========================================================================//
+    public void paintComponent(Graphics g) {
+    }
+	//=========================================================================//
+	private void DetermineAction(int x, int y){
+        action = MOVE;	        
+	}
+	//=========================================================================//
+	private void DoAction(int dx, int dy){
+	    model.applyDeltas(dx, dy);
+	}
+	//=========================================================================//
+	private void synchToModel(){
+		int x=0, y=0, w=0, h=0;
+		switch(layer.paintMode){
+		case DLayer.IMG:
+	    	x = model.getLocX();
+	    	y = model.getLocY();
+	    	//w = model.getWidth(layer.index);
+	    	//h = model.getHeight(layer.index);
+	    	w = 250;
+	    	h = 250;
+			break;
+		case DLayer.OVAL:
+			x = model.getLocX();
+	    	y= model.getLocY();
+	    	w = 10;
+	    	h = 10;
+			break;
+		case DLayer.TXT_MOTE:
+			x = model.getLocX();
+	    	y= model.getLocY();
+	    	w = 250;
+	    	h = 250;
+			break;
+		}
+		//setLocation(x, y);
+		setBounds(0, 0, 0, 0);
+	}
+	//=========================================================================//
+	private void selected(){
+	    document.setSelected(this);	    
+	}
+
+}
+
+
+
diff --git a/support/sdk/java/net/tinyos/mviz/DShapeModel.java b/support/sdk/java/net/tinyos/mviz/DShapeModel.java
new file mode 100644
index 00000000..37e548fe
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DShapeModel.java
@@ -0,0 +1,218 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+
+// DShapeModel.java
+/*
+ Store the data state for a single shape:
+  type, two points, color
+ Supports DShapeModelListeners.
+*/
+import java.awt.*;
+
+import javax.swing.*;
+import java.util.*;
+import java.awt.event.*;
+import java.io.*;
+
+
+class DShapeModel extends Object implements Serializable {
+
+	// The 5 standard things for a DShapeModel to store
+    protected char type;
+    protected int x1, y1, x;
+    protected int x2, y2, y;
+    protected Color fill; 
+    
+    protected float value;
+    
+    protected int HALF_WIDTH = 20;
+    protected int HALF_HEIGHT = 20;
+
+    // NOTE: "transient" -- not serialized
+    transient private ArrayList listeners;
+      
+    public DShapeModel(char type, int x, int y, float value) {
+        this.type = type;
+        this.x = x;
+        this.y = y;
+        this.value = value;
+        int color = (int)(value)%230;
+        this.fill = new Color(color+15, color, color+25);
+        
+        listeners = null;
+        
+        this.x1 = x - this.HALF_WIDTH;
+        this.x2 = x + this.HALF_WIDTH;
+        this.y1 = y - this.HALF_HEIGHT;
+        this.y2 = y + this.HALF_HEIGHT;
+    }
+    
+    // Construct a DShapeModel with default size.
+	public DShapeModel(char type, Color color) {
+		this(type, 50, 50, 89, 89, color);
+	}
+    
+    public DShapeModel(){
+        this('m', new Color(12,24,48));
+    }
+
+	public DShapeModel(char type, int x1, int y1, int x2, int y2, Color fill) {
+		this.type = type;
+		this.x1 = x1;
+		this.y1 = y1;
+		this.x2 = x2;
+		this.y2 = y2;
+		this.fill = fill;
+		
+		listeners = null;
+	}
+	
+	public DShapeModel(DShapeModel other) {
+		this.type = other.type;
+		this.x1 = other.x1;
+		this.y1 = other.y1;
+		this.x2 = other.x2;
+		this.y2 = other.y2;
+		this.fill = other.fill;
+		
+		listeners = null;
+	}
+	
+	public char getType() { return(type); }
+	
+	public int getX1() { return(x1); }
+	public int getY1() { return(y1); }
+	public int getX2() { return(x2); }
+	public int getY2() { return(y2); }
+	
+	
+	// Below here, code not done
+	
+	
+	public void applyDeltas(int dx1, int dy1, int dx2, int dy2) {
+	    x1 += dx1;
+	    x2 += dx2;
+	    y1 += dy1;
+	    y2 += dy2;
+        
+        x += dx1;
+        y += dy1;
+	    fireChanges();
+	}
+	
+	public int getWidth() {
+	    return Math.abs(x2-x1)+1;
+	}
+	
+	public int getHeight() {
+	    return Math.abs(y2-y1)+1;
+	}
+	
+	public int getLocX() {
+	    return Math.min(x1, x2);
+	}
+	
+	public int getLocY() {
+	    return Math.min(y1, y2);
+	}
+			
+	
+	
+	public Color getColor() { return(fill); }
+	public void setColor(Color color) {
+	    if (fill.equals(color)) return;
+	    fill = color;
+	    fireChanges();
+	}
+	
+	
+	public void addListener(DShapeModelListener listener) {
+	    if (listeners == null) listeners = new ArrayList();
+	    Iterator it = listeners.iterator();
+		while (it.hasNext()) {
+		    if (it.next() == listener)
+		        return;
+		}
+		listeners.add(listener);	    
+	}
+
+	public void removeListener(DShapeModelListener listener) {
+	    if (listeners == null) return;	    
+	    Iterator it = listeners.iterator();
+		while (it.hasNext()) {
+		    if (it.next() == listener){
+		        it.remove();
+		        return;
+		    }		
+		}	        	
+	}
+	//=========================================================================/
+	protected void fireChanges(){
+	    if (listeners==null) return;
+	    Iterator it = listeners.iterator();
+		while (it.hasNext()) 
+		   ((DShapeModelListener)(it.next())).shapeChanged(this);
+	}
+	//=========================================================================/
+	public void rotate(){
+	    // Get old height/width and locations.
+	    int x = getLocX();	int y = getLocY();
+	    int w = getWidth();	int h = getHeight();
+	    int dL = (h/2-w/2);
+	    // Get the locations right.
+	    x-=dL;	y+= dL;
+	    x1=x;	x2=x+h-1;
+	    y1=y;	y2=y+w-1;	
+		fireChanges();
+	}
+	//=========================================================================/
+	// Rotation with respect to center.
+	public void scale(int magnitude){
+	    if (x1<x2){	x1-=magnitude;	x2+=magnitude;
+	    }else{ 		x1+=magnitude;	x2-=magnitude;	}
+	    if (y1<y2){	y1-=magnitude;	y2+=magnitude;
+	    }else{ 		y1+=magnitude;	y2-=magnitude;	}    
+	    fireChanges();
+	}
+	//=========================================================================/
+	public void move(int x, int y){
+	    int h = getHeight();
+	    int w = getWidth();
+	    x1=x; x2=x+w-1;
+	    y1=y; y2=y+h-1;
+	    fireChanges();	    
+	}
+	
+}
+
diff --git a/support/sdk/java/net/tinyos/mviz/DShapeModelListener.java b/support/sdk/java/net/tinyos/mviz/DShapeModelListener.java
new file mode 100644
index 00000000..c4abc021
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DShapeModelListener.java
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+import java.util.EventListener;
+
+// DShapeModelListener.java
+/*
+ Interface to listen for shape change notifications.
+ As a courtesy, the notification includes a pointer to the
+ model that changed. However, there is not detail about
+ what the exact change was.
+*/
+
+public interface DShapeModelListener{
+    public void shapeChanged(DShapeModel changed); 
+}
diff --git a/support/sdk/java/net/tinyos/mviz/DataModel.java b/support/sdk/java/net/tinyos/mviz/DataModel.java
new file mode 100644
index 00000000..94cc91cf
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/DataModel.java
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+import java.lang.reflect.*;
+import java.util.*;
+
+public class DataModel {
+    Vector packetClasses = new Vector();
+    Vector fields = new Vector();
+    Vector links = new Vector();
+
+    public DataModel(Vector messageNames) {
+	createPackets(messageNames);
+	parseFieldsAndLinks();
+    }
+
+    public Vector fields() {
+	return fields;
+    }
+
+    public Vector links() {
+	return links;
+    }
+	
+    private void createPackets(Vector messageNames) {
+	for (int i = 0; i < messageNames.size(); i++) {
+	    try {
+		System.out.println("Making " + messageNames.elementAt(i));
+		Class c = Class.forName((String)messageNames.elementAt(i));
+		packetClasses.add(c);
+	    }
+	    catch (ClassNotFoundException ex) {
+		System.err.println("Unable to find message type " + messageNames.elementAt(i) + ": please check your CLASSPATH.");
+	    }
+	}
+    }
+
+    private boolean isSubClass(Class subC, Class superC) {
+	if (subC == superC) {return false;}
+	for (Class tmp = subC.getSuperclass(); tmp != null; tmp = tmp.getSuperclass()) {
+	    if (tmp.equals(superC)) {
+		return true;
+	    }
+	}
+	return false;
+    }
+
+    private void parseFieldsAndLinks() {
+	net.tinyos.message.Message msg = new net.tinyos.message.Message(0);
+	Class messageClass = msg.getClass();
+	for (int i = 0; i < packetClasses.size(); i++) {
+	    Class pkt = (Class)packetClasses.elementAt(i);
+	    if (!(isSubClass(pkt, messageClass))) {
+		continue;
+	    }
+	    loadFieldsAndLinks(pkt);
+	}
+    }
+
+    private void loadFieldsAndLinks(Class pkt) {
+	Method[] methods = pkt.getMethods();
+	for (int i = 0; i < methods.length; i++) {
+	    Method method = methods[i];
+	    String name = method.getName();
+	    if (name.startsWith("get_") && !name.startsWith("get_link")) {
+		name = name.substring(4); // Chop off "get_"
+		Class[] params = method.getParameterTypes();
+		if (params.length == 0 && !method.getReturnType().isArray()) {
+		    loadField(name, method, method.getReturnType());
+		    System.out.println("Loading " + name);
+		}
+	    }
+	    else if (name.startsWith("get_link_") && name.endsWith("_value")) {
+		name = name.substring(9); // chop off "get_link_"
+		name = name.substring(0, name.length() - 6); // chop off "_value"
+		Class[] params = method.getParameterTypes();
+		if (params.length == 0) {
+		    loadLink(name, method, method.getReturnType());
+		}
+	    }
+	}
+    }
+
+    private void loadField(String name, Method method, Class param) {
+	fields.add(name);
+    }
+    private void loadLink(String name, Method method, Class param) {
+	System.out.println("Loading link <" + name + ">");
+	links.add(name);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/mviz/Makefile b/support/sdk/java/net/tinyos/mviz/Makefile
new file mode 100644
index 00000000..7ea734fb
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/Makefile
@@ -0,0 +1,6 @@
+# Top-level Makefile for tools/java 
+
+SUBDIRS = 
+ROOT = ../../..
+include $(ROOT)/Makefile.include
+
diff --git a/support/sdk/java/net/tinyos/mviz/MessageInput.java b/support/sdk/java/net/tinyos/mviz/MessageInput.java
new file mode 100644
index 00000000..26d1e463
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/MessageInput.java
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+package net.tinyos.mviz;
+
+import java.lang.reflect.*;
+import java.io.*;
+import java.util.*;
+
+import net.tinyos.message.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+
+public class MessageInput implements net.tinyos.message.MessageListener {
+    private Vector msgVector = new Vector();
+    private MoteIF moteIF;
+    private DDocument document;
+    
+    public MessageInput(Vector packetVector, String commSource, DDocument doc) {
+	document = doc;
+	loadMessages(packetVector);
+	createSource(commSource);
+	installListeners();
+    }
+
+    private void loadMessages(Vector packetVector) {
+	for (int i = 0; i < packetVector.size(); i++) {
+	    String className = (String)packetVector.elementAt(i);
+	  try {
+	    Class c = Class.forName(className);
+	    Object packet = c.newInstance();
+	    Message msg = (Message)packet;
+	    msgVector.addElement(msg);
+	  }
+	  catch (Exception e) {
+	      System.err.println(e);
+	  }
+	}
+    }
+
+    private void createSource(String source) {
+	if (source != null) {
+	    moteIF = new MoteIF(BuildSource.makePhoenix(source, PrintStreamMessenger.err));
+	}
+	else {
+	    moteIF = new MoteIF(BuildSource.makePhoenix(PrintStreamMessenger.err));
+	}
+    }
+
+    private void addMsgType(Message msg) {
+	moteIF.registerListener(msg, this);
+    }
+    
+    private void installListeners() {
+	Enumeration msgs = msgVector.elements();
+	while (msgs.hasMoreElements()) {
+	    Message m = (Message)msgs.nextElement();
+	    this.addMsgType(m);
+	}
+    }
+
+    public void start() {}
+   
+    public void messageReceived(int to, Message message) {
+	Hashtable table = new Hashtable();
+	Hashtable linkTable = new Hashtable();
+	//System.out.println("Received message:");
+	//System.out.println(message);
+
+	Class pktClass = message.getClass();
+	Method[] methods = pktClass.getMethods();
+	for (int i = 0; i < methods.length; i++) {
+	    Method method = methods[i];
+	    String name = method.getName();
+	    Class[] params = method.getParameterTypes();
+	    Class returnType = method.getReturnType();
+	    if (params.length != 0 || returnType.isArray()) {
+		continue;
+	    }
+	    if (name.startsWith("get_") && !name.startsWith("get_link")) {
+		name = name.substring(4); // Chop off "get_"
+		try {
+		    //System.out.println(name + " returns " + res);
+		    Integer result = (Integer)method.invoke(message, null);
+		    table.put(name, result);
+		}
+		catch (java.lang.IllegalAccessException exc) {
+		    System.err.println("Unable to access field " + name);
+		}
+		catch (java.lang.reflect.InvocationTargetException exc) {
+		    System.err.println("Unable to access target " + name);
+		}
+	    }
+	    else if (name.startsWith("get_link_")) {
+		name = name.substring(9); // chop off "get_link_"
+		try {
+		    Integer result = (Integer)method.invoke(message, null);
+		    linkTable.put(name, result);
+		}
+		catch (java.lang.IllegalAccessException exc) {
+		    System.err.println("Unable to access field " + name);
+		}
+		catch (java.lang.reflect.InvocationTargetException exc) {
+		    System.err.println("Unable to access target " + name);
+		}
+	    }
+	}
+	if (table.containsKey("origin")) {
+	    Integer origin = (Integer)table.get("origin");
+	    //table.remove("origin");
+	    Enumeration elements = table.keys();
+	    while (elements.hasMoreElements()) {
+		String key = (String)elements.nextElement();
+		Integer value = (Integer)table.get(key);
+		document.setMoteValue(origin.intValue(), key, value.intValue());
+	    }
+	    elements = linkTable.keys();
+	    while (elements.hasMoreElements()) {
+		String key = (String)elements.nextElement();
+		if (!key.endsWith("_value")) {
+		    continue;
+		}
+		Integer value = (Integer)linkTable.get(key);
+		key = key.substring(0, key.length() - 6); // chop off "_value"
+		String addrkey = key + "_addr";
+		if (!linkTable.containsKey(addrkey)) {
+		    continue;
+		}
+		Integer addr = (Integer)linkTable.get(addrkey);
+		document.setLinkValue(origin.intValue(), addr.intValue(), key, value.intValue());
+	    }
+	}
+	else {
+	    System.err.println("Could not find origin field, discarding message.");
+	}
+	
+    }
+
+}
diff --git a/support/sdk/java/net/tinyos/mviz/images/tmote_sky.gif b/support/sdk/java/net/tinyos/mviz/images/tmote_sky.gif
new file mode 100644
index 00000000..f3bd1929
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diff --git a/support/sdk/java/net/tinyos/mviz/images/tmote_sky.jpg b/support/sdk/java/net/tinyos/mviz/images/tmote_sky.jpg
new file mode 100644
index 00000000..2c507d6c
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diff --git a/support/sdk/java/net/tinyos/mviz/images/tmote_sky.png b/support/sdk/java/net/tinyos/mviz/images/tmote_sky.png
new file mode 100644
index 00000000..2cf018e4
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diff --git a/support/sdk/java/net/tinyos/mviz/package.html b/support/sdk/java/net/tinyos/mviz/package.html
new file mode 100644
index 00000000..2444d1b5
--- /dev/null
+++ b/support/sdk/java/net/tinyos/mviz/package.html
@@ -0,0 +1,36 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
+<html>
+<head>
+<!--
+
+  @(#)package.html	1.60 98/01/27
+
+  Copyright 1998 Sun Microsystems, Inc. 901 San Antonio Road, 
+  Palo Alto, California, 94303, U.S.A.  All Rights Reserved.
+
+  This software is the confidential and proprietary information of Sun
+  Microsystems, Inc. ("Confidential Information").  You shall not
+  disclose such Confidential Information and shall use it only in
+  accordance with the terms of the license agreement you entered into
+  with Sun.
+
+  CopyrightVersion 1.2
+
+-->
+</head>
+<body bgcolor="white">
+
+Provides a GUI interface to a TinyOS network.
+
+
+<h2>Package Specification</h2>
+
+<h2>Related Documentation</h2>
+
+For how to use the classes in this package, please see the man page of the <tt>tos-mviz</tt> tool.
+
+<!-- Put @see and @since tags down here. -->
+
+</body>
+</html>
+
diff --git a/support/sdk/java/net/tinyos/packet/.cvsignore b/support/sdk/java/net/tinyos/packet/.cvsignore
new file mode 100644
index 00000000..f2bf0f3f
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/.cvsignore
@@ -0,0 +1,2 @@
+Serial.java
+*.class
diff --git a/support/sdk/java/net/tinyos/packet/AbstractSource.java b/support/sdk/java/net/tinyos/packet/AbstractSource.java
new file mode 100644
index 00000000..278d69ef
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/AbstractSource.java
@@ -0,0 +1,132 @@
+// $Id: AbstractSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+import java.io.*;
+import java.util.*;
+import net.tinyos.util.*;
+//import net.tinyos.message.*;
+
+/**
+ * Provide a standard, generic implementation of PacketSource. Subclasses
+ * need only implement low-level open and close operations, and packet
+ * reading and writing. This class provides the automatic close-on-error
+ * functionality, general error checking, and standard messages.
+ */
+abstract public class AbstractSource implements PacketSource
+{
+    protected String name;
+    protected boolean opened = false;
+    protected Messenger messages;
+
+    protected void message(String s) {
+	if (messages != null)
+	    messages.message(s);
+    }
+
+    protected AbstractSource(String name) {
+	this.name = name;
+    }
+
+    public String getName() {
+	return name;
+    }
+
+    synchronized public void open(Messenger messages) throws IOException {
+	if (opened)
+	    throw new IOException("already open");
+	this.messages = messages;
+	openSource();
+	opened = true;
+    }
+
+    synchronized public void close() throws IOException {
+	if (opened) {
+	    opened = false;
+	    closeSource();
+	}
+    }
+
+    protected void failIfClosed() throws IOException {
+	if (!opened)
+	    throw new IOException("closed");
+    }
+
+    public byte[] readPacket() throws IOException {
+	failIfClosed();
+
+	try {
+	    return check(readSourcePacket());
+	}
+	catch (IOException e) {
+	    close();
+	    throw e;
+	}
+    }
+
+    synchronized public boolean writePacket(byte[] packet) throws IOException {
+	failIfClosed();
+
+	try {
+	    return writeSourcePacket(check(packet));
+	}
+	catch (IOException e) {
+	    close();
+	    throw e;
+	}
+    }
+
+    protected byte[] check(byte[] packet) throws IOException {
+	return packet;
+    }
+
+    // Implementation interfaces
+    abstract protected void openSource() throws IOException;
+    abstract protected void closeSource() throws IOException;
+    abstract protected byte[] readSourcePacket() throws IOException;
+    protected boolean writeSourcePacket(byte[] packet) throws IOException {
+	// Default writer swallows packets
+	return true;
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/BaudRate.java b/support/sdk/java/net/tinyos/packet/BaudRate.java
new file mode 100644
index 00000000..1cab50f8
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/BaudRate.java
@@ -0,0 +1,26 @@
+/**
+ * This file contains the default baud rate for current TinyOS
+ * platforms. Don't add anything but platform entries, as this file is also
+ * #included in C code to get the table, with appropriate #define's to
+ * avoid problems...
+*/
+package net.tinyos.packet;
+
+class BaudRate {
+    static void init() throws Exception {
+	/* The Platform.x argument is there for when this code is #include'd
+	   into C */
+	Platform.add(Platform.x, "mica",       19200);
+	Platform.add(Platform.x, "mica2",      57600);
+	Platform.add(Platform.x, "mica2dot",   19200);
+	Platform.add(Platform.x, "telos",      115200);
+	Platform.add(Platform.x, "telosb",     115200);
+	Platform.add(Platform.x, "tinynode",     115200);
+	Platform.add(Platform.x, "tmote",      115200);
+	Platform.add(Platform.x, "micaz",      57600);
+	Platform.add(Platform.x, "eyesIFX",       57600);
+	Platform.add(Platform.x, "intelmote2", 115200);
+	Platform.add(Platform.x, "iris",      57600);
+	Platform.add(Platform.x, "shimmer",      115200);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/BuildSource.java b/support/sdk/java/net/tinyos/packet/BuildSource.java
new file mode 100644
index 00000000..faa5ba11
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/BuildSource.java
@@ -0,0 +1,383 @@
+// $Id: BuildSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.packet;
+
+import net.tinyos.util.*;
+
+/**
+ * This class is where packet-sources are created. It also provides 
+ * convenient shortcuts for building PhoenixSources on packet-sources.
+ *
+ * See PacketSource and PhoenixSource for details on the source behaviours.
+ *
+ * Most applications will probably use net.tinyos.message.MoteIF with
+ * the default source, but those that don't must use BuildSource to obtain
+ * a PacketSource.
+ *
+ * The default source is specified by the MOTECOM environment variable
+ * (note that the JNI code for net.tinyos.util.Env must be installed for
+ * this to work - see net/tinyos/util/Env.INSTALL for details). When
+ * MOTECOM is undefined (or the JNI code for Env.java cannot be found), the
+ * packet source is "sf@localhost:9002" (new serial-forwarder, on localhost
+ * port 9002).
+ *
+ * Packet sources can either be specified by strings (when calling
+ * <code>makePacketSource</code>, or by calling a specific makeXXX method
+ * (e.g., <code>makeSF</code>, <code>makeSerial</code>). There are also
+ * makeArgsXXX methods which make a source from its source-args (see below).
+ *
+ * Packet source strings have the format: <source-name>[@<source-args>],
+ * where source-args have reasonable defaults for most sources.
+ * The <code>sourceHelp</code> method prints an up-to-date description
+ * of known sources and their arguments.
+ */
+public class BuildSource {
+    /**
+     * Make a new PhoenixSource over a specified PacketSource
+     * Note that a PhoenixSource must be started (<code>start</code> method)
+     * before use, and that resurrection is off by default (the default error
+     * calls System.exit).
+     * @param source The packet-source to use (not null)
+     * @param messages Where to send status messages (null for no messages)
+     * @return The new PhoenixSource
+     */
+    public static PhoenixSource makePhoenix(PacketSource source, Messenger messages) {
+	return new PhoenixSource(source, messages);
+    }
+
+    /**
+     * Make a new PhoenixSource over a specified PacketSource
+     * Note that a PhoenixSource must be started (<code>start</code> method)
+     * before use, and that resurrection is off by default (the default error
+     * calls System.exit).
+     * @param name The packet-source to use, specified with a packet-source
+     *   string
+     * @param messages Where to send status messages (null for no messages)
+     * @return The new PhoenixSource, or null if name is an invalid source
+     */
+    public static PhoenixSource makePhoenix(String name, Messenger messages) {
+	PacketSource source = makePacketSource(name);
+	if (source == null) {
+	    return null;
+	}
+	return new PhoenixSource(source, messages);
+    }
+
+    /**
+     * Make a new PhoenixSource over the default PacketSource
+     * Note that a PhoenixSource must be started (<code>start</code> method)
+     * before use, and that resurrection is off by default (the default error
+     * calls System.exit).
+     * @param messages Where to send status messages (null for no messages)
+     * @return The new PhoenixSource
+     * @return The new PhoenixSource, or null if the default packet source is
+     *   invalid (ie, the MOTECOM environment variable specifies an invalid packet
+     *   source)
+     */
+    public static PhoenixSource makePhoenix(Messenger messages) {
+	PacketSource source = makePacketSource();
+	if (source == null) {
+	    return null;
+	}
+	return new PhoenixSource(source, messages);
+    }
+
+    /**
+     * Make the default packet source
+     * @return The packet source, or null if it could not be made
+     */
+    public static PacketSource makePacketSource() {
+	return makePacketSource(Env.getenv("MOTECOM"));
+    }
+
+    /**
+     * Make the specified packet source
+     * @param name Name of the packet source, or null for "sf@localhost:9002"
+     * @return The packet source, or null if it could not be made
+     */
+    public static PacketSource makePacketSource(String name) {
+	if (name == null)
+	    name = "sf@localhost:9002"; // default source
+
+	ParseArgs parser = new ParseArgs(name, "@");
+	String source = parser.next();
+	String args = parser.next();
+	PacketSource retVal = null;
+	
+	if (source.equals("sf"))
+	    retVal =  makeArgsSF(args);
+	if (source.equals("serial"))
+	    retVal =  makeArgsSerial(args);
+	if (source.equals("network"))
+	    retVal =  makeArgsNetwork(args);
+	if (source.equals("tossim-serial"))
+	    retVal =  makeArgsTossimSerial(args);
+	if (source.equals("tossim-radio"))
+	    retVal =  makeArgsTossimRadio(args);
+
+	return retVal;
+    }
+
+    /**
+     * Return summary of source string specifications
+     */
+    public static String sourceHelp() {
+	return
+"  - sf@HOSTNAME:PORTNUMBER\n" +
+"    A serial forwarder.\n" +
+"  - serial@SERIALPORT:BAUDRATE\n" +
+"    A mote connected to a serial port using the TinyOS 2.0 serial protocol.\n" +
+"     BAUDRATE is either a number or a platform name (selects platform's\n" +
+"     default baud rate).\n" +
+"  - network@HOSTNAME:PORTNUMBER\n" +
+"    A mote whose serial port is accessed over the network.\n" +
+"  - tossim-serial[@HOSTNAME]\n" +
+"    The serial port of tossim node 0.\n" +
+"  - tossim-radio[@HOSTNAME]\n" +
+"    The radios of tossim nodes.\n" +
+"\n" +
+"Examples: serial@COM1:mica2, serial@/dev/ttyUSB2:19200, sf@localhost:9000";
+    }
+
+    /**
+     * Make a serial-forwarder source  (tcp/ip client) from an argument string
+     * @param args "hostname:port-number", or null for "localhost:9002"
+     * @return The new PacketSource or null for invalid arguments
+     */
+    public static PacketSource makeArgsSF(String args) {
+	if (args == null)
+	    args = "localhost:9002";
+
+	ParseArgs parser = new ParseArgs(args, ":");
+	String host = parser.next();
+	String portS = parser.next();
+	if (portS == null)
+	    return null;
+	int port = Integer.parseInt(portS);
+
+	return makeSF(host, port);
+    }
+
+    /**
+     * Make a serial-forwarder source (tcp/ip client)
+     * @param host hostname
+     * @param port port number
+     * @return The new PacketSource
+     */
+    public static PacketSource makeSF(String host, int port) {
+	return new SFSource(host, port);
+    }
+
+    private static int decodeBaudrate(String rateS) {
+	try {
+	    int rate = Platform.get(rateS);
+	    if (rate == -1)
+		rate = Integer.parseInt(rateS);
+	    if (rate > 0)
+		return rate;
+	}
+	catch (NumberFormatException e) { }
+	return -1;
+    }
+ 
+
+    /**
+     * Make a serial-port packet source. Serial packet sources report
+     * missing acknowledgements via a false result to writePacket.
+     * @param args "COMn[:baudrate]" ("COM1" if args is null)
+     *   baudrate is an integer or mote name
+     *   The default baudrate is 19200.
+     * @return The new packet source, or null if the arguments are invalid
+     */
+    public static PacketSource makeArgsSerial(String args) {
+	if (args == null)
+	    args = "COM1";
+
+	ParseArgs parser = new ParseArgs(args, ":");
+	String port = parser.next();
+	String platformOrBaud = parser.next();
+	int baudrate = decodeBaudrate(platformOrBaud);
+	if (baudrate < 0)
+	    return null;
+	return makeSerial(port, baudrate);
+    }
+
+    /**
+     * Make a serial-port packet source. Serial packet sources report
+     * missing acknowledgements via a false result to writePacket.
+     * @param port javax.comm serial port name ("COMn:")
+     * @param baudrate requested baudrate
+     * @return The new packet source
+     */ 
+    public static PacketSource makeSerial(String port, int baudrate) {
+	return new Packetizer("serial@" + port + ":" + baudrate,
+			      new SerialByteSource(port, baudrate));
+    }
+
+    /**
+     * Make a serial-port packet source for a network-accessible serial
+     * port. Serial packet sources report missing acknowledgements via a
+     * false result to writePacket.
+     * @param args "hostname:portnumber" (no default)
+     * @return The new packet source, or null if the arguments are invalid
+     */
+    public static PacketSource makeArgsNetwork(String args) {
+	if (args == null)
+	    return null;
+
+	ParseArgs parser = new ParseArgs(args, ":,");
+	String host = parser.next();
+	String portS = parser.next();
+	if (portS == null)
+	    return null;
+	int port = Integer.parseInt(portS);
+
+	return makeNetwork(host, port);
+    }
+
+    /**
+     * Make a serial-port packet source for a network-accessible serial
+     * port. Serial packet sources report missing acknowledgements via a
+     * false result to writePacket.
+     * @param host hostname of network-accessible serial port
+     * @param port tcp/ip port number
+     * @return The new packet source
+     */
+    public static PacketSource makeNetwork(String host, int port) {
+	return new Packetizer("network@" + host + ":" + port,
+			      new NetworkByteSource(host, port));
+    }
+
+    // We create tossim sources using reflection to avoid depending on
+    // tossim at compile-time
+
+    /**
+     * Make a tossim serial port (node 0) packet source
+     * @param args "hostname" ("localhost" for null) (on which tossim runs)
+     * @return The new packet source
+     */
+    public static PacketSource makeArgsTossimSerial(String args) {
+	if (args == null)
+	    args = "localhost";
+	return makeTossimSerial(args);
+    }
+
+    /**
+     * Make a tossim serial port (node 0) packet source
+     * @param host hostname on which tossim runs
+     * @return The new packet source
+     */
+    public static PacketSource makeTossimSerial(String host) {
+	return makeTossimSource("TossimSerialSource", host);
+    }
+
+    /**
+     * Make a tossim radio packet source
+     * @param args "hostname" ("localhost" for null) (on which tossim runs)
+     * @return The new packet source
+     */
+    public static PacketSource makeArgsTossimRadio(String args) {
+	if (args == null)
+	    args = "localhost";
+	return makeTossimRadio(args);
+    }
+
+    /**
+     * Make a tossim radio packet source
+     * @param host hostname on which tossim runs
+     * @return The new packet source
+     */
+    public static PacketSource makeTossimRadio(String host) {
+	return makeTossimSource("TossimRadioSource", host);
+    }
+
+    private static PacketSource makeTossimSource(String name, String host) {
+	try {
+	    Class[] oneStringArg = new Class[1];
+	    oneStringArg[0] = Class.forName("java.lang.String");
+	    Object[] args = new Object[1];
+	    args[0] = host;
+
+	    Class tossimSource = Class.forName("net.tinyos.sim.packet." + name);
+	    return (PacketSource)tossimSource.getConstructor(oneStringArg).newInstance(args);
+	}
+	catch (Exception e) {
+	    System.err.println("Couldn't instantiate tossim packet source");
+	    System.err.println("Did you compile tossim?");
+	    return null;
+	}
+    }
+
+//     static class ParseArgs {
+// 	String tokens[];
+// 	int tokenIndex;
+
+// 	ParseArgs(String s, String delimiterSequence) {
+// 	    int count = delimiterSequence.length();
+// 	    tokens = new String[count + 1];
+// 	    tokenIndex = 0;
+
+// 	    // Fill in the tokens
+// 	    int i = 0, lastMatch = 0;
+// 	    while (i < count) {
+// 		int pos = s.indexOf(delimiterSequence.charAt(i++));
+
+// 		if (pos >= 0) {
+// 		    // When we finally find a delimiter, we know where
+// 		    // the last token ended
+// 		    tokens[lastMatch] = s.substring(0, pos);
+// 		    lastMatch = i;
+// 		    s = s.substring(pos + 1);
+// 		}
+// 	    }
+// 	    tokens[lastMatch] = s;
+// 	}
+
+// 	String next() {
+// 	    return tokens[tokenIndex++];
+// 	}
+//     }
+
+    public static void main(String[] args) {
+	System.err.println(sourceHelp());
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/ByteSource.java b/support/sdk/java/net/tinyos/packet/ByteSource.java
new file mode 100644
index 00000000..37b56775
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/ByteSource.java
@@ -0,0 +1,57 @@
+// $Id: ByteSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/** 
+ * Simple byte I/O interface for use with PacketSource packetizers
+ */
+package net.tinyos.packet;
+
+import java.io.*;
+
+public interface ByteSource
+{
+    public void open() throws IOException;
+    public void close();
+    public byte readByte() throws IOException;
+    public void writeBytes(byte[] bytes) throws IOException;
+}
diff --git a/support/sdk/java/net/tinyos/packet/Makefile b/support/sdk/java/net/tinyos/packet/Makefile
new file mode 100644
index 00000000..a8754031
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/Makefile
@@ -0,0 +1,12 @@
+# Makefile for tools/java/net/tinyos/packet
+
+INITIAL_TARGETS = Serial.class Serial.java
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
+
+TOS=$(shell ncc -print-tosdir)
+SERIAL_H = $(TOS)/lib/serial/Serial.h
+
+Serial.java: $(SERIAL_H) FORCE
+	ncg -o $@ -java-classname=net.tinyos.packet.Serial java $(SERIAL_H) Serial.h
diff --git a/support/sdk/java/net/tinyos/packet/NetworkByteSource.java b/support/sdk/java/net/tinyos/packet/NetworkByteSource.java
new file mode 100644
index 00000000..ac6a25d4
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/NetworkByteSource.java
@@ -0,0 +1,72 @@
+// $Id: NetworkByteSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+import java.util.*;
+import java.io.*;
+import java.net.*;
+
+/**
+ * A tcp/ip (client) byte-source
+ */
+public class NetworkByteSource extends StreamByteSource {
+    private Socket socket;
+    private String host;
+    private int port;
+
+    public NetworkByteSource(String host, int port) {
+	this.host = host;
+	this.port = port;
+    }
+
+    protected void openStreams() throws IOException {
+	socket = new Socket(host, port);
+	is = socket.getInputStream();
+	os = socket.getOutputStream();
+    }
+
+    protected void closeStreams() throws IOException {
+	socket.close();
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/PacketListenerIF.java b/support/sdk/java/net/tinyos/packet/PacketListenerIF.java
new file mode 100644
index 00000000..99ea889e
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/PacketListenerIF.java
@@ -0,0 +1,56 @@
+// $Id: PacketListenerIF.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+/**
+ * 
+ * The listener interface receives incoming packets.
+ *
+ * @author  <A HREF="http://www.cs.berkeley.edu/~mikechen/">Mike Chen</A> 
+ * @since   1.1.6
+ */
+
+public interface PacketListenerIF extends java.util.EventListener {
+  public void packetReceived(byte[] packet);
+}
diff --git a/support/sdk/java/net/tinyos/packet/PacketSource.java b/support/sdk/java/net/tinyos/packet/PacketSource.java
new file mode 100644
index 00000000..8dc0d6c9
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/PacketSource.java
@@ -0,0 +1,108 @@
+// $Id: PacketSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/** This interface specifies the generic behaviour of a packet mediator.
+    The read and write operations are blocking. 
+    Reads and writes may fail (e.g., for communications failure), which
+    implicitly closes the mediator. It is not possible to reopen a mediator
+    after it is closed (instead, a new mediator should be created).
+
+    The packet byte array must be at least 1 byte long - the first byte
+    indicates the type of packet and is used to dispatch to upper layers.
+
+    PacketSources are point-to-point and have "at most once" semantics.
+    writePacket should return true only if the packet has been received
+    Note that checking this is not possible with some of our broken,
+    legacy protocols, and that we will optimistically assume that packets
+    sent over reliable links (e.g., tcp/ip socket to a serial forwarder)
+    will be reliably delivered by tcp/ip.
+ */
+package net.tinyos.packet;
+
+import java.io.*;
+import net.tinyos.util.*;
+
+public interface PacketSource
+{
+    /**
+     * Get PacketSource name
+     * @return the name of this packet source, valid for use with
+     * <code>BuildSource.makeSource</code>.
+     */
+    public String getName();
+
+    /**
+     * Open a packet source
+     * @param messages A destination for informative messages from the
+     *   packet source, or null to discard these.
+     * @exception IOException If the source could not be opened
+     */
+    public void open(Messenger messages) throws IOException;
+
+    /**
+     * Close a packet source. Closing a source must force any 
+     * running <code>readPacket</code> and <code>writePacket</code>
+     * operations to terminate with an IOException
+     * @exception IOException Thrown if a problem occured during closing.
+     *   The source is considered closed even if thos occurs.
+     *   Closing a closed source does not cause this exception
+     */
+    public void close() throws IOException;
+
+    /**
+     * Read a packet
+     * @return The packet read (newly allocated). The format is described
+     *   above
+     * @exception IOException If the source detected a problem. The source
+     *   is automatically closed.
+     */
+    public byte[] readPacket() throws IOException;
+
+    /**
+     * Write a packet
+     * @param packet The packet to write. The format is decribed above.
+     * @return Some packet sources will return false if the packet
+     *   could not be written.
+     */
+    public boolean writePacket(byte[] packet) throws IOException;
+}
diff --git a/support/sdk/java/net/tinyos/packet/Packetizer.java b/support/sdk/java/net/tinyos/packet/Packetizer.java
new file mode 100644
index 00000000..1cbe9b07
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/Packetizer.java
@@ -0,0 +1,402 @@
+// $Id: Packetizer.java,v 1.8 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.packet;
+
+import net.tinyos.util.*;
+
+import java.io.*;
+import java.util.*;
+import java.nio.*;
+
+/**
+ * The Packetizer class implements the new mote-PC protocol, using a ByteSource
+ * for low-level I/O
+ */
+public class Packetizer extends AbstractSource implements Runnable {
+  /*
+   * Protocol inspired by, but not identical to, RFC 1663. There is
+   * currently no protocol establishment phase, and a single byte
+   * ("packet type") to identify the kind/target/etc of each packet.
+   * 
+   * The protocol is really, really not aiming for high performance.
+   * 
+   * There is however a hook for future extensions: implementations
+   * are required to answer all unknown packet types with a P_UNKNOWN
+   * packet.
+   * 
+   * To summarise the protocol: 
+   * - the two sides (A & B) are connected by a (potentially
+   *   unreliable) byte stream
+   *
+   * - the two sides exchange packets framed by 0x7e (SYNC_BYTE) bytes
+   *
+   * - each packet has the form 
+   *     <packet type> <data bytes 1..n> <16-bit crc> 
+   *   where the crc (see net.tinyos.util.Crc) covers the packet type
+   *   and bytes 1..n
+   *
+   * - bytes can be escaped by preceding them with 0x7d and their
+   *   value xored with 0x20; 0x7d and 0x7e bytes must be escaped,
+   *   0x00 - 0x1f and 0x80-0x9f may be optionally escaped
+   *
+   * - There are currently 5 packet types: 
+   *   P_PACKET_NO_ACK: A user-packet, with no ack required
+   *   P_PACKET_ACK: A user-packet with a prefix byte, ack
+   *   required. The receiver must send a P_ACK packet with the 
+   *   prefix byte as its contents.  
+   *   P_ACK: ack for a previous P_PACKET_ACK packet 
+   *   P_UNKNOWN: unknown packet type received. On reception of an
+   *   unknown packet type, the receicer must send a P_UNKNOWN packet,
+   *   the first byte must be the unknown packet type. 
+   *
+   * - Packets that are greater than a (private) MTU are silently
+   *   dropped.
+   */
+  final static boolean DEBUG = false;
+
+  final static int SYNC_BYTE = Serial.HDLC_FLAG_BYTE;
+
+  final static int ESCAPE_BYTE = Serial.HDLC_CTLESC_BYTE;
+
+  final static int MTU = 256;
+
+  final static int ACK_TIMEOUT = 1000; // in milliseconds
+
+  final static int P_ACK = Serial.SERIAL_PROTO_ACK;
+
+  final static int P_PACKET_ACK = Serial.SERIAL_PROTO_PACKET_ACK;
+
+  final static int P_PACKET_NO_ACK = Serial.SERIAL_PROTO_PACKET_NOACK;
+
+  final static int P_UNKNOWN = Serial.SERIAL_PROTO_PACKET_UNKNOWN;
+
+  private ByteSource io;
+
+  private boolean inSync;
+
+  private byte[] receiveBuffer = new byte[MTU];
+
+  private int seqNo;
+
+  // Packets are received by a separate thread and placed in a
+  // per-packet-type queue. If received[x] is null, then x is an
+  // unknown protocol (but P_UNKNOWN and P_PACKET_ACK are handled
+  // specially)
+  private Thread reader;
+
+  private LinkedList[] received;
+
+  /**
+   * Packetizers are built using the makeXXX methods in BuildSource
+   */
+  Packetizer(String name, ByteSource io) {
+    super(name);
+    this.io = io;
+    inSync = false;
+    seqNo = 13;
+    reader = new Thread(this);
+    received = new LinkedList[256];
+    received[P_ACK] = new LinkedList();
+    received[P_PACKET_NO_ACK] = new LinkedList();
+  }
+
+  synchronized public void open(Messenger messages) throws IOException {
+    super.open(messages);
+    if (!reader.isAlive()) {
+      reader.start();
+    }
+  }
+
+  protected void openSource() throws IOException {
+    io.open();
+  }
+
+  protected void closeSource() {
+    io.close();
+  }
+
+  protected byte[] readProtocolPacket(int packetType, long deadline)
+      throws IOException {
+    LinkedList inPackets = received[packetType];
+
+    // Wait for a packet on inPackets
+    synchronized (inPackets) {
+      while (inPackets.isEmpty()) {
+        long now = System.currentTimeMillis();
+        if (deadline != 0 && now >= deadline) {
+          return null;
+        }
+        try {
+          inPackets.wait(deadline != 0 ? deadline - now : 0);
+        } catch (InterruptedException e) {
+          throw new IOException("interrupted");
+        }
+      }
+      return (byte[]) inPackets.removeFirst();
+    }
+  }
+
+  // Place a packet in its packet queue, or reject unknown packet
+  // types (which don't have a queue)
+  protected void pushProtocolPacket(int packetType, byte[] packet) {
+    LinkedList inPackets = received[packetType];
+
+    if (inPackets != null) {
+      synchronized (inPackets) {
+        inPackets.add(packet);
+        inPackets.notify();
+      }
+    } else if (packetType != P_UNKNOWN) {
+      try {
+        writeFramedPacket(P_UNKNOWN, packetType, ackPacket, 0);
+      } catch (IOException e) {
+      }
+      message(name + ": ignoring unknown packet type 0x"
+          + Integer.toHexString(packetType));
+    }
+  }
+
+  protected byte[] readSourcePacket() throws IOException {
+    // Packetizer packet format is identical to PacketSource's
+    for (;;) {
+      byte[] packet = readProtocolPacket(P_PACKET_NO_ACK, 0);
+      if (packet.length >= 1) {
+        return packet;
+      }
+    }
+  }
+
+  // Write an ack-ed packet
+  protected boolean writeSourcePacket(byte[] packet) throws IOException {
+    for (int retries = 0; retries < 25; retries++) {
+      writeFramedPacket(P_PACKET_ACK, ++seqNo, packet, packet.length);
+
+      long deadline = System.currentTimeMillis() + ACK_TIMEOUT;
+
+      byte[] ack = readProtocolPacket(P_ACK, deadline);
+      if (ack == null) {
+        if (DEBUG) {
+          message(name + ": ACK timed out");
+        }
+        continue;
+      }
+      if (ack[0] == (byte) seqNo) {
+        if (DEBUG) {
+          message(name + ": Rcvd ACK");
+        }
+        return true;
+      }
+    }
+
+    return false;
+  }
+
+  static private byte ackPacket[] = new byte[0];
+
+  public void run() {
+    try {
+      for (;;) {
+        byte[] packet = readFramedPacket();
+        int packetType = packet[0] & 0xff;
+        int pdataOffset = 1;
+
+        if (packetType == P_PACKET_ACK) {
+          // send ack
+          writeFramedPacket(P_ACK, packet[1], ackPacket, 0);
+          // And merge with un-acked packets
+          packetType = P_PACKET_NO_ACK;
+          pdataOffset = 2;
+        }
+        int dataLength = packet.length - pdataOffset;
+        byte[] dataPacket = new byte[dataLength];
+        System.arraycopy(packet, pdataOffset, dataPacket, 0, dataLength);
+        pushProtocolPacket(packetType, dataPacket);
+      }
+    } catch (IOException e) {
+    }
+  }
+
+  // Read system-level packet. If inSync is false, we currently don't
+  // have sync
+  private byte[] readFramedPacket() throws IOException {
+    int count = 0;
+    boolean escaped = false;
+
+    for (;;) {
+      if (!inSync) {
+        message(name + ": resynchronising");
+        // re-synchronise
+        while (io.readByte() != SYNC_BYTE)
+          ;
+        inSync = true;
+        count = 0;
+        escaped = false;
+      }
+
+      if (count >= MTU) {
+        // Packet too long, give up and try to resync
+        message(name + ": packet too long");
+        inSync = false;
+        continue;
+      }
+
+      byte b = io.readByte();
+      if (escaped) {
+        if (b == SYNC_BYTE) {
+          // sync byte following escape is an error, resync
+          message(name + ": unexpected sync byte");
+          inSync = false;
+          continue;
+        }
+        b ^= 0x20;
+        escaped = false;
+      } else if (b == ESCAPE_BYTE) {
+        escaped = true;
+        continue;
+      } else if (b == SYNC_BYTE) {
+        if (count < 4) {
+          // too-small frames are ignored
+          count = 0;
+          continue;
+        }
+        byte[] packet = new byte[count - 2];
+        System.arraycopy(receiveBuffer, 0, packet, 0, count - 2);
+
+        int readCrc = (receiveBuffer[count - 2] & 0xff)
+            | (receiveBuffer[count - 1] & 0xff) << 8;
+        int computedCrc = Crc.calc(packet, packet.length);
+
+        if (DEBUG) {
+          System.err.println("received: ");
+          Dump.printPacket(System.err, packet);
+          System.err.println(" rcrc: " + Integer.toHexString(readCrc)
+              + " ccrc: " + Integer.toHexString(computedCrc));
+        }
+
+        if (readCrc == computedCrc) {
+          return packet;
+        } else {
+          message(name + ": bad packet");
+          /*
+           * We don't lose sync here. If we did, garbage on the line at startup
+           * will cause loss of the first packet.
+           */
+          count = 0;
+          continue;
+        }
+      }
+
+      receiveBuffer[count++] = b;
+    }
+  }
+
+  // Class to build a framed, escaped and crced packet byte stream
+  static class Escaper {
+    byte[] escaped;
+
+    int escapePtr;
+
+    int crc;
+
+    // We're building a length-byte packet
+    Escaper(int length) {
+      escaped = new byte[2 * length];
+      escapePtr = 0;
+      crc = 0;
+      escaped[escapePtr++] = SYNC_BYTE;
+    }
+
+    static private boolean needsEscape(int b) {
+      return b == SYNC_BYTE || b == ESCAPE_BYTE;
+    }
+
+    void nextByte(int b) {
+      b = b & 0xff;
+      crc = Crc.calcByte(crc, b);
+      if (needsEscape(b)) {
+        escaped[escapePtr++] = ESCAPE_BYTE;
+        escaped[escapePtr++] = (byte) (b ^ 0x20);
+      } else {
+        escaped[escapePtr++] = (byte) b;
+      }
+    }
+
+    void terminate() {
+      escaped[escapePtr++] = SYNC_BYTE;
+    }
+  }
+
+  // Write a packet of type 'packetType', first byte 'firstByte'
+  // and bytes 2..'count'+1 in 'packet'
+  private synchronized void writeFramedPacket(int packetType, int firstByte,
+      byte[] packet, int count) throws IOException {
+    if (DEBUG) {
+      System.err.println("sending: ");
+      Dump.printByte(System.err, packetType);
+      Dump.printByte(System.err, firstByte);
+      Dump.printPacket(System.err, packet);
+      System.err.println();
+    }
+
+    Escaper buffer = new Escaper(count + 6);
+
+    buffer.nextByte(packetType);
+    buffer.nextByte(firstByte);
+    for (int i = 0; i < count; i++) {
+      buffer.nextByte(packet[i]);
+    }
+
+    int crc = buffer.crc;
+    buffer.nextByte(crc & 0xff);
+    buffer.nextByte(crc >> 8);
+
+    buffer.terminate();
+
+    byte[] realPacket = new byte[buffer.escapePtr];
+    System.arraycopy(buffer.escaped, 0, realPacket, 0, buffer.escapePtr);
+
+    if (DEBUG) {
+      Dump.dump("encoded", realPacket);
+    }
+    io.writeBytes(realPacket);
+  }
+}
diff --git a/support/sdk/java/net/tinyos/packet/ParseArgs.java b/support/sdk/java/net/tinyos/packet/ParseArgs.java
new file mode 100644
index 00000000..5e9ed3ae
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/ParseArgs.java
@@ -0,0 +1,41 @@
+    /**
+     * Parse a string into tokens based on a sequence of delimiters
+     * Given delimiters (single characters) d1, d2, ..., dn, this
+     * class recognises strings of the form s0[d1s1][d2s2]...[dnsn],
+     * where s<i-1> does not contain character di
+     * This is unambiguous if all di are distinct. If not, strings
+     * are attributed to the earliest possible si (so if the delimiters
+     * are : and :, and the input string is foo:bar, then s0 is foo,
+     * s1 is bar and s2 is null
+     */
+package net.tinyos.packet;
+
+class ParseArgs {
+	String tokens[];
+	int tokenIndex;
+
+	ParseArgs(String s, String delimiterSequence) {
+	    int count = delimiterSequence.length();
+	    tokens = new String[count + 1];
+	    tokenIndex = 0;
+
+	    // Fill in the tokens
+	    int i = 0, lastMatch = 0;
+	    while (i < count) {
+		int pos = s.indexOf(delimiterSequence.charAt(i++));
+
+		if (pos >= 0) {
+		    // When we finally find a delimiter, we know where
+		    // the last token ended
+		    tokens[lastMatch] = s.substring(0, pos);
+		    lastMatch = i;
+		    s = s.substring(pos + 1);
+		}
+	    }
+	    tokens[lastMatch] = s;
+	}
+
+	String next() {
+	    return tokens[tokenIndex++];
+	}
+}
diff --git a/support/sdk/java/net/tinyos/packet/PhoenixError.java b/support/sdk/java/net/tinyos/packet/PhoenixError.java
new file mode 100644
index 00000000..4fee636c
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/PhoenixError.java
@@ -0,0 +1,66 @@
+// $Id: PhoenixError.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  <dgay@intel-research.net>
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * @author David Gay <dgay@intel-research.net>
+ * @author Intel Research Berkeley Lab
+ */
+
+package net.tinyos.packet;
+
+/**
+ * An interface for reporting packet source errors.
+ *
+ * @version	1, 1 Aug 2003
+ * @author	David Gay
+ */
+public interface PhoenixError {
+    /**
+     * This method is called to signal a problem with a packet source
+     * @param e The IOExcpetion that occured
+     */
+    public void error(java.io.IOException e);
+}
diff --git a/support/sdk/java/net/tinyos/packet/PhoenixSource.java b/support/sdk/java/net/tinyos/packet/PhoenixSource.java
new file mode 100644
index 00000000..ba8fa344
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/PhoenixSource.java
@@ -0,0 +1,234 @@
+// $Id: PhoenixSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.packet;
+
+import net.tinyos.util.*;
+import java.io.*;
+import java.util.*;
+
+/**
+ * A PhoenixSource builds upon a PacketSource to provide the following
+ * features:
+ * - automatic reading and dispatching of packets (registerPacketListener
+ *   and deregisterPacketListener)
+ * - automatic source restarting (via setResurrection), off by default
+ *
+ * PhoenixSources are threads and hence need to be started. PhoenixSources
+ * are not PacketSources (direct reads are no longer allowed, open and
+ * close is less meaningful with automatic restart). 
+ *
+ * net.tinyos.message.MoteIF builds upon a PhoenixSource, not a PacketSource.
+ *
+ * PhoenixSources are built using the makePhoenix methods in BuildSource
+ */
+public class PhoenixSource extends Thread implements PhoenixError {
+    private PacketSource source;
+    private Messenger messages;
+    private Vector listeners;
+    private boolean phoenixLike = true; // does it rise from the ashes?
+    private boolean started;
+    private PhoenixError errorHandler = this;
+
+    protected void message(String s) {
+	if (messages != null)
+	    messages.message(s);
+    }
+
+    // Wait for thread to start
+    public synchronized void awaitStartup() throws IOException {
+	while (!started) {
+	    try {
+		wait();
+	    }
+	    catch (InterruptedException e) {
+		throw new IOException("interrupted");
+	    }
+	}
+    }
+
+    private synchronized void started() {
+	started = true;
+	notify();
+    }
+
+    synchronized private void stopped() {
+	started = false;
+    }
+ 
+    /**
+     * Build PhoenixSources using makePhoenix in BuildSource
+     */
+    PhoenixSource(PacketSource source, Messenger messages) {
+	this.source = source;
+	this.messages = messages;
+	listeners = new Vector();
+    }
+
+    /**
+     * Shutdown a PhoenixSource (closes underlying packet source)
+     * close errors are NOT reported to the error handler, instead 
+     * a simple message is sent
+     */
+    synchronized public void shutdown() {
+	phoenixLike = false;
+	try {
+	    source.close();
+	    interrupt();
+	}
+	catch (IOException e) {
+	    message("close error " + e);
+	}
+    }
+
+    /**
+     * @return This PhoenixSource's PacketSource
+     */
+    public PacketSource getPacketSource() {
+	return source;
+    }
+
+    /**
+     * Write a packet. Waits for PhoenixSource thread to start
+     * @param packet Packet to write (same format as PacketSource)
+     * @return false if packet wasn't received (only the serial 
+     *   and network packet sources currently provide this indication)
+     *   Note that a true result does not guarantee reception
+     */
+    public boolean writePacket(byte[] packet) throws IOException {
+	awaitStartup();
+	return source.writePacket(packet);
+    }
+
+    /**
+     * Register a new packet listener
+     * @param listener listener.packetReceived will be invoked for
+     *   all packets received on this packet source (see PacketSource
+     *   for a description of the packet format). The listener will
+     *   be invoked in the context of the PhoenixSource thread.
+     */
+    public void registerPacketListener(PacketListenerIF listener) {
+	listeners.addElement(listener);
+    }
+
+    /**
+     * Remove a packet listener
+     * @param listener Listener to remove (if it was registered twice,
+     *   only one entry will be removed)
+     */
+    public void deregisterPacketListener(PacketListenerIF listener) {
+	listeners.remove(listener);
+    }
+
+    private void packetDipatchLoop() throws IOException {
+	for (;;) {
+	    dispatch(source.readPacket());
+	}
+    }
+
+    private void dispatch(byte[] packet) {
+	Enumeration e = listeners.elements();
+	while (e.hasMoreElements()) {
+	    PacketListenerIF listener = (PacketListenerIF)e.nextElement();
+	    listener.packetReceived(packet);
+	}
+    }
+
+    public void run() {
+	while (phoenixLike) {
+	    try {
+		source.open(messages);
+		started();
+		packetDipatchLoop();
+	    }
+	    catch (IOException e) {
+		stopped();
+		if (phoenixLike)
+		    errorHandler.error(e);
+	    }
+	}
+    }
+
+    /** 
+     * Set the error handler for this PhoenixSource. When an IOException e
+     * is thrown by this PhoenixSource's PacketSource (note that this
+     * implicitly closes the PacketSource), errorHandler.error is invoked
+     * with e as an argument. When the error handler returns, the
+     * PhoenixSource will restart (i.e., reopen the packet source and try
+     * to read messages), except if the <code>shutdown</code> method has
+     * been called.
+     * @param errorHandler The packet source error handler for this
+     *    PhoenixSource
+     */
+    synchronized public void setPacketErrorHandler(PhoenixError errorHandler) {
+	this.errorHandler = errorHandler;
+    }
+
+    /**
+     * Turn resurrection on. This changes the current packet error handler
+     * (see <code>setPacketErrorHandler</code>) to one that automatically
+     * restarts the packet source after a 2s delay
+     */
+    public void setResurrection() {
+	setPacketErrorHandler(new PhoenixError() {
+		public void error(IOException e) {
+		    message(source.getName() + " died - restarting");
+		    try {
+			sleep(2000);
+		    }
+		    catch (InterruptedException ie) { }
+		}
+	    });
+    }
+
+    // Default error handler
+    public void error(IOException e) {
+	String msg = source.getName() + " died - exiting (" + e + ")";
+	if (messages != null) {
+	    message(msg);
+	}
+	else {
+	    // We always try and print this message as we're about to exit.
+	    System.err.println(msg);
+	}
+	System.exit(2);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/Platform.java b/support/sdk/java/net/tinyos/packet/Platform.java
new file mode 100644
index 00000000..e325317e
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/Platform.java
@@ -0,0 +1,30 @@
+package net.tinyos.packet;
+
+import java.util.*;
+
+class Platform {
+    static int x;
+    static Hashtable platforms;
+
+    static void add(int dummy, String name, int baudrate) {
+	platforms.put(name, new Integer(baudrate));
+    }
+
+    static int get(String name) {
+	if (platforms == null) {
+	    platforms = new Hashtable();
+            try {
+	      BaudRate.init();
+            }
+            catch (Exception e) {
+              System.err.println("Failed to initialize baud rates for platforms. Serial communication may not work properly.");
+            }
+	}
+	Object val = platforms.get(name);
+
+	if (val != null)
+	    return ((Integer)val).intValue();
+	else
+	    return -1;
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/SFProtocol.java b/support/sdk/java/net/tinyos/packet/SFProtocol.java
new file mode 100644
index 00000000..eca7b79b
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/SFProtocol.java
@@ -0,0 +1,135 @@
+// $Id: SFProtocol.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+import java.io.*;
+
+/**
+ * This is the TinyOS 2.x serial forwarder protocol. It is incompatible
+ * with the TinyOS 1.x serial forwarder protocol to avoid accidentally
+ * mixing TinyOS 1.x and 2.x serial forwarders, applications, etc.
+ */
+abstract public class SFProtocol extends AbstractSource
+{
+    // Protocol version, written at connection-open time
+    // 2 bytes: first byte is always 'U', second byte is
+    // protocol version
+    // The actual protocol used will be min(my-version, other-version)
+    // current protocols:
+    // ' ': initial protocol, no further connection data, packets are
+    //      1-byte length followed by n-bytes data. Length must be at least 1.
+    final static byte VERSION[] = {'U', ' '};
+    int version; // The protocol version we're running (negotiated)
+
+    protected InputStream is;
+    protected OutputStream os;
+
+    protected SFProtocol(String name) {
+	super(name);
+    }
+    
+    protected void openSource() throws IOException {
+	// Assumes streams are open
+	os.write(VERSION);
+	byte[] partner = readN(2);
+	
+	// Check that it's a valid header (min version is ' ')
+	if (partner[0] != VERSION[0])
+	    throw new IOException("protocol error");
+	// Actual version is min received vs our version
+	version = partner[1] & 0xff;
+	int ourversion = VERSION[1] & 0xff;
+	if (ourversion < version)
+	    version = ourversion;
+
+	// Handle the different protocol versions (currently only one)
+	// Any connection-time data-exchange goes here
+	switch (version) {
+	case ' ':
+	    break;
+	default:
+	    throw new IOException("bad protocol version");
+	}
+    }
+	
+    protected byte[] readSourcePacket() throws IOException {
+	// Protocol is straightforward: 1 size byte, <n> data bytes
+	byte[] size = readN(1);
+
+	if (size[0] == 0)
+	    throw new IOException("0-byte packet");
+	byte[] read = readN(size[0] & 0xff);
+	//Dump.dump("reading", read);
+	return read;
+    }
+
+    protected byte[] readN(int n) throws IOException {
+	byte[] data = new byte[n];
+	int offset = 0;
+
+	// A timeout would be nice, but there's no obvious way to
+	// write it before java 1.4 (probably some trickery with
+	// a thread and closing the stream would do the trick, but...)
+	while (offset < n) {
+	  int count = is.read(data, offset, n - offset);
+
+	  if (count == -1)
+	    throw new IOException("end-of-stream");
+	  offset += count;
+	}
+	return data;
+    }
+
+    protected boolean writeSourcePacket(byte[] packet) throws IOException {
+	if (packet.length > 255)
+	    throw new IOException("packet too long");
+	if (packet.length == 0)
+	    throw new IOException("packet too short");
+	//Dump.dump("writing", packet);
+	os.write((byte)packet.length);
+	os.write(packet);
+	os.flush();
+	return true;
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/SFSource.java b/support/sdk/java/net/tinyos/packet/SFSource.java
new file mode 100644
index 00000000..33247640
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/SFSource.java
@@ -0,0 +1,76 @@
+// $Id: SFSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+import java.io.*;
+import java.net.*;
+
+/**
+ * Packet source (tcp/ip client) for the new serial forwarder protocol
+ */
+class SFSource extends SFProtocol {
+    private Socket socket;
+    private String host;
+    private int port;
+
+    /**
+     * Packetizers are built using the makeXXX methods in BuildSource
+     */
+    SFSource(String host, int port) {
+	super("sf@" + host + ":" + port);
+	this.host = host;
+	this.port = port;
+    }
+
+    protected void openSource() throws IOException {
+	socket = new Socket(host, port);
+	is = socket.getInputStream();
+	os = socket.getOutputStream();
+	super.openSource();
+    }
+
+    protected void closeSource() throws IOException {
+	socket.close();
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/SerialByteSource.java b/support/sdk/java/net/tinyos/packet/SerialByteSource.java
new file mode 100644
index 00000000..71b09ccf
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/SerialByteSource.java
@@ -0,0 +1,147 @@
+// $Id: SerialByteSource.java,v 1.7 2010-06-29 22:07:41 scipio Exp $
+
+package net.tinyos.packet;
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+import java.io.*;
+import net.tinyos.comm.*;
+
+/**
+ * A serial port byte source using net.tinyos.comm
+ */
+public class SerialByteSource extends StreamByteSource implements
+    SerialPortListener {
+  private SerialPort serialPort;
+
+  private String portName;
+
+  private int baudRate;
+
+  public SerialByteSource(String portName, int baudRate) {
+    this.portName = portName;
+    this.baudRate = baudRate;
+  }
+
+  public void openStreams() throws IOException {
+    // if (serialPort == null) {
+    try {
+      serialPort = new TOSSerial(portName);
+    } catch (Exception e) {
+      throw new IOException("Could not open " + portName + ": "
+          + e.getMessage());
+    }
+    /*
+     * } else { if (!serialPort.open()) { throw new IOException("Could not
+     * re-open " + portName); } }
+     */
+
+    try {
+      // serialPort.setFlowControlMode(SerialPort.FLOWCONTROL_NONE);
+      serialPort.setSerialPortParams(baudRate, 8, SerialPort.STOPBITS_1, false);
+      serialPort.addListener(this);
+      
+      serialPort.notifyOn(SerialPortEvent.DATA_AVAILABLE, true);
+      serialPort.notifyOn(SerialPortEvent.OUTPUT_EMPTY, true);
+
+      
+    } catch (Exception e) {
+      serialPort.close();
+      throw new IOException("Could not configure " + portName + ": "
+          + e.getMessage());
+    }
+
+    is = serialPort.getInputStream();
+    os = serialPort.getOutputStream();
+  }
+
+  public void closeStreams() throws IOException {
+    serialPort.close();
+  }
+
+  public String allPorts() {
+    /*
+     * Enumeration ports = CommPortIdentifier.getPortIdentifiers(); if (ports ==
+     * null) return "No comm ports found!";
+     * 
+     * boolean noPorts = true; String portList = "Known serial ports:\n"; while
+     * (ports.hasMoreElements()) { CommPortIdentifier port =
+     * (CommPortIdentifier)ports.nextElement();
+     * 
+     * if (port.getPortType() == CommPortIdentifier.PORT_SERIAL) { portList += "- " +
+     * port.getName() + "\n"; noPorts = false; } } if (noPorts) return "No comm
+     * ports found!"; else return portList;
+     */
+    return "Listing available comm ports is no longer supported.";
+  }
+
+  Object sync = new Object();
+
+  public byte readByte() throws IOException {
+    // On Linux at least, javax.comm input streams are not interruptible.
+    // Make them so, relying on the DATA_AVAILABLE serial event.
+    synchronized (sync) {
+      while (is.available() == 0) {
+        try {
+          sync.wait();
+        } catch (InterruptedException e) {
+          close();
+          throw new IOException("interrupted");
+        }
+      }
+    }
+
+    return super.readByte();
+  }
+
+  public void serialEvent(SerialPortEvent ev) {
+    if (ev.getEventType() == SerialPortEvent.DATA_AVAILABLE) {
+      synchronized (sync) {
+        sync.notify();
+      }
+    }
+  }
+
+  protected void finalize() {
+    serialPort.finalize();
+  }
+
+}
diff --git a/support/sdk/java/net/tinyos/packet/StreamByteSource.java b/support/sdk/java/net/tinyos/packet/StreamByteSource.java
new file mode 100644
index 00000000..7b4d7f2e
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/StreamByteSource.java
@@ -0,0 +1,112 @@
+// $Id: StreamByteSource.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.packet;
+
+import java.util.*;
+import java.io.*;
+
+abstract public class StreamByteSource implements ByteSource
+{
+    protected InputStream is;
+    protected OutputStream os;
+    private boolean opened;
+
+    protected StreamByteSource() {
+    }
+
+    abstract protected void openStreams() throws IOException;
+    abstract protected void closeStreams() throws IOException;
+
+    public void open() throws IOException {
+	openStreams();
+	opened = true;
+    }
+
+    public void close() {
+	if (opened) {
+	    opened = false;
+	    try { 
+		os.close(); 
+		is.close();
+		closeStreams();
+	    }
+	    catch (Exception e) { }
+	}
+    }
+
+    public byte readByte() throws IOException {
+	int serialByte;
+
+	if (!opened)
+	    throw new IOException("not open");
+
+	try {
+	    serialByte = is.read();
+	}
+	catch (IOException e) {
+	    serialByte = -1;
+	}
+
+	if (serialByte == -1) {
+	    close();
+	    throw new IOException("read error");
+	}
+
+	return (byte)serialByte;
+    }
+
+    public void writeBytes(byte[] bytes) throws IOException {
+	if (!opened)
+	    throw new IOException("not open");
+
+	try {
+	    os.write(bytes);
+	    os.flush();
+	}
+	catch (IOException e) {
+	    close();
+	    throw new IOException("write error");
+	}
+    }
+}
diff --git a/support/sdk/java/net/tinyos/packet/package.html b/support/sdk/java/net/tinyos/packet/package.html
new file mode 100644
index 00000000..d025fa47
--- /dev/null
+++ b/support/sdk/java/net/tinyos/packet/package.html
@@ -0,0 +1,37 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
+<html>
+<head>
+<!--
+
+  @(#)package.html	1.60 98/01/27
+
+  Copyright 1998 Sun Microsystems, Inc. 901 San Antonio Road, 
+  Palo Alto, California, 94303, U.S.A.  All Rights Reserved.
+
+  This software is the confidential and proprietary information of Sun
+  Microsystems, Inc. ("Confidential Information").  You shall not
+  disclose such Confidential Information and shall use it only in
+  accordance with the terms of the license agreement you entered into
+  with Sun.
+
+  CopyrightVersion 1.2
+
+-->
+</head>
+<body bgcolor="white">
+
+Provides for transforming byte arrays into TinyOS packet abstractions.
+
+
+<h2>Package Specification</h2>
+
+<h2>Related Documentation</h2>
+
+The <tt>mig</tt> tool generates packets from arbitrary packet format
+delcarations.
+
+<!-- Put @see and @since tags down here. -->
+
+</body>
+</html>
+
diff --git a/support/sdk/java/net/tinyos/sf/Makefile b/support/sdk/java/net/tinyos/sf/Makefile
new file mode 100644
index 00000000..7f8b61e0
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/Makefile
@@ -0,0 +1,4 @@
+# Top-level Makefile for tools/java 
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
diff --git a/support/sdk/java/net/tinyos/sf/README b/support/sdk/java/net/tinyos/sf/README
new file mode 100644
index 00000000..966ba581
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/README
@@ -0,0 +1,11 @@
+Package: net.tinyos.sf
+Description: provides serial port multiplexing
+Author: Bret Hull <bwhull@uclink4.berkeley.edu>
+	David Gay <dgay@intel-research.net>
+
+This application instantiates a server which provides
+a bi-directional packet stream between a mote connected
+to the host PC and clients anywhere on the network.  For 
+more information, see "serialforwarder.pdf" in the "doc"
+directory.  
+
diff --git a/support/sdk/java/net/tinyos/sf/SFClient.java b/support/sdk/java/net/tinyos/sf/SFClient.java
new file mode 100644
index 00000000..e98fb432
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SFClient.java
@@ -0,0 +1,147 @@
+// $Id: SFClient.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * File: ServerReceivingThread.java
+ *
+ * Description:
+ * The ServerReceivingThread listens for requests
+ * from a connected Aggregator Server.  If a data
+ * packet is received, it is sent on to the serial
+ * port.
+ *
+ * @author <a href="mailto:bwhull@sourceforge.net">Bret Hull</a>
+ * @author <a href="mailto:dgay@intel-research.net">David Gay</a>
+ *
+ */
+
+package net.tinyos.sf;
+
+import java.net.*;
+import java.io.*;
+import java.util.*;
+import net.tinyos.packet.*;
+
+public class SFClient extends SFProtocol implements Runnable, PacketListenerIF {
+    private Thread thread;
+    private Socket socket = null;
+    private SerialForwarder sf;
+    private SFListen listenServer;
+
+    public SFClient(Socket socket, SerialForwarder serialForward,
+		    SFListen listenSvr) {
+	super("");
+	thread = new Thread(this);
+        sf = serialForward;
+        listenServer = listenSvr;
+        this.socket = socket;
+        InetAddress addr = socket.getInetAddress();
+	name = "client at " + addr.getHostName() +
+	    " (" + addr.getHostAddress() + ")";
+        sf.debug.message("new " + name);
+    }
+
+    protected void openSource() throws IOException {
+        is = socket.getInputStream();
+        os = socket.getOutputStream();
+	super.openSource();
+    }
+ 
+    protected void closeSource() throws IOException {
+        socket.close();
+    }
+
+    private void init() throws IOException {
+	sf.incrementClients();
+	open(sf);
+	listenServer.source.registerPacketListener(this);
+    }
+
+    public void shutdown() {
+	try {
+	    close();
+	}
+	catch (IOException e) { }
+    }
+
+    public void start() {
+	thread.start();
+    }
+
+    public final void join(long millis) throws InterruptedException {
+	thread.join(millis);
+    }
+
+    public void run() {
+	try {
+	    init();
+	    readPackets();
+	}
+	catch (IOException e) { }
+	finally {
+	    listenServer.source.deregisterPacketListener(this);
+	    listenServer.removeSFClient(this);
+	    sf.decrementClients();
+	    shutdown();
+	}
+    }
+
+    private void readPackets() throws IOException {
+	for (;;) {
+	    byte[] packet = readPacket();
+
+	    sf.incrementPacketsWritten();
+	    if (!listenServer.source.writePacket(packet))
+		sf.verbose.message("write failed");
+        }
+    }
+
+    public void packetReceived(byte[] packet) {
+	try {
+	    writePacket(packet);
+	}
+	catch (IOException e) {
+	    shutdown();
+	}
+    }
+}
diff --git a/support/sdk/java/net/tinyos/sf/SFConsoleRenderer.java b/support/sdk/java/net/tinyos/sf/SFConsoleRenderer.java
new file mode 100644
index 00000000..40ec74e7
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SFConsoleRenderer.java
@@ -0,0 +1,102 @@
+//$Id: SFConsoleRenderer.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+package net.tinyos.sf;
+
+public class SFConsoleRenderer implements SFRenderer
+{
+  boolean statusLine = false;
+  boolean listening = false;
+  int nclients = 0;
+  int nread = 0;
+  int nwritten = 0;
+
+  public void SFConsoleRenderer()
+  {
+  }
+
+  void clearStatus()
+  {
+    if( statusLine )
+    {
+      System.out.print("\r                                                                              \r");
+      statusLine = false;
+    }
+  }
+
+  void updateStatus()
+  {
+    clearStatus();
+    System.out.print( (listening?"SF enabled":"SF disabled") + ", "
+      + nclients + " " + (nclients==1?"client":"clients") + ", "
+      + nread + " " + (nread==1?"packet":"packets") + " read, "
+      + nwritten + " " + (nwritten==1?"packet":"packets") + " written"
+      + " "
+    );
+    statusLine = true;
+  }
+
+  public void message( String msg )
+  {
+    clearStatus();
+    System.out.println(msg);
+    updateStatus();
+  }
+
+  public void updatePacketsRead( int n )
+  {
+    nread = n;
+    updateStatus();
+  }
+
+  public void updatePacketsWritten( int n )
+  {
+    nwritten = n;
+    updateStatus();
+  }
+
+  public void updateNumClients( int n )
+  {
+    nclients = n;
+    updateStatus();
+  }
+
+  public void updateListenServerStatus( boolean b )
+  {
+    listening = b;
+    updateStatus();
+  }
+}
+
diff --git a/support/sdk/java/net/tinyos/sf/SFListen.java b/support/sdk/java/net/tinyos/sf/SFListen.java
new file mode 100644
index 00000000..6e57a973
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SFListen.java
@@ -0,0 +1,183 @@
+// $Id: SFListen.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * File: ListenServer.java
+ *
+ * Description:
+ * The Listen Server is the heart of the serial forwarder.  Upon
+ * instantiation, this class spawns the SerialPortReader and the
+ * Multicast threads.  As clients connect, this class spawns
+ * ServerReceivingThreads as wells as registers the new connection
+ * SerialPortReader.  This class also provides the central
+ * point of contact for the GUI, allowing the server to easily
+ * be shut down
+ *
+ * @author <a href="mailto:bwhull@sourceforge.net">Bret Hull</a>
+ * @author <a href="mailto:dgay@intel-research.net">David Gay</a>
+ */
+package net.tinyos.sf;
+
+import java.net.*;
+import java.io.*;
+import java.util.*;
+import net.tinyos.packet.*;
+
+public class SFListen extends Thread implements PacketListenerIF, PhoenixError {
+    PhoenixSource source;
+    private ServerSocket serverSocket;
+    private Vector clients  = new Vector();
+    private SerialForwarder sf;
+
+    public SFListen(SerialForwarder sf) {
+        this.sf = sf;
+    }
+
+    // IO error on packet source, restart it
+    // This is essentially the same as the standard resurrection error
+    // handler, but sends the error message to a different location
+    // (sf.message vs sf.verbose.message)
+    public void error(IOException e) {
+	if (e.getMessage() != null) {
+	    sf.message(e.getMessage());
+	}
+	sf.message(source.getPacketSource().getName() +
+		   " died - restarting");
+	try {
+	    sleep(5000);
+	}
+	catch (InterruptedException ie) { }
+	
+    }
+
+    public void run() {
+	try {
+	    sf.verbose.message("Listening to " + sf.motecom);
+
+	    source = BuildSource.makePhoenix(sf.motecom, sf.verbose);
+	    if (source == null) {
+		sf.message("Invalid source " + sf.motecom + ", pick one of:");
+		sf.message(BuildSource.sourceHelp());
+		return;
+	    }
+	    source.setPacketErrorHandler(this);
+	    source.registerPacketListener(this);
+	    source.start();
+	
+	    // open up our server socket
+	    try {
+		serverSocket = new ServerSocket(sf.serverPort);
+	    }
+	    catch (Exception e) {
+		sf.message("Could not listen on port: " + sf.serverPort);
+		source.shutdown();
+		return;
+	    }
+
+	    sf.verbose.message("Listening for client connections on port " + sf.serverPort);
+	    try {
+		for (;;) {
+		    Socket currentSocket = serverSocket.accept();
+		    SFClient newServicer = new SFClient(currentSocket, sf, this);
+		    clients.add(newServicer);
+		    newServicer.start();
+		}
+	    }
+	    catch (IOException e) { }
+	}
+        finally {
+	    cleanup();
+            sf.verbose.message("--------------------------");
+        }
+    }
+
+    private void cleanup() {
+	shutdownAllSFClients();
+	sf.verbose.message("Closing source");
+	if (source != null) {
+	    source.shutdown();
+	}
+	sf.verbose.message("Closing socket");
+	if (serverSocket != null) {
+	    try {
+		serverSocket.close();
+	    }
+	    catch (IOException e) { }
+	}
+	sf.listenServerStopped();
+    }
+
+    private void shutdownAllSFClients() {
+        sf.verbose.message("Shutting down all client connections");
+        SFClient crrntServicer;
+        while (clients.size() != 0) {
+	    crrntServicer = (SFClient)clients.firstElement();
+	    crrntServicer.shutdown();
+	    try {
+		crrntServicer.join(1000);
+	    }
+	    catch (InterruptedException e) {
+		e.printStackTrace();
+	    }
+	}
+    }
+
+    public void removeSFClient(SFClient clientS) {
+        clients.remove(clientS);
+    }
+
+    public void packetReceived(byte[] packet) {
+	sf.incrementPacketsRead();
+    }
+
+    public void shutdown() {
+	try {
+	    if (serverSocket != null) {
+		serverSocket.close();
+	    }
+	}
+	catch (IOException e) {
+	    sf.debug.message("shutdown error " + e);
+	}
+    }
+}
diff --git a/support/sdk/java/net/tinyos/sf/SFNullRenderer.java b/support/sdk/java/net/tinyos/sf/SFNullRenderer.java
new file mode 100644
index 00000000..782dc7c6
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SFNullRenderer.java
@@ -0,0 +1,20 @@
+package net.tinyos.sf;
+
+public class SFNullRenderer implements SFRenderer {
+
+  public void message(String msg) {
+  }
+
+  public void updatePacketsRead(int n) {
+  }
+
+  public void updatePacketsWritten(int n) {
+  }
+
+  public void updateNumClients(int n) {
+  }
+
+  public void updateListenServerStatus(boolean listening) {
+  }
+
+}
diff --git a/support/sdk/java/net/tinyos/sf/SFRenderer.java b/support/sdk/java/net/tinyos/sf/SFRenderer.java
new file mode 100644
index 00000000..5172beac
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SFRenderer.java
@@ -0,0 +1,46 @@
+//$Id: SFRenderer.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+package net.tinyos.sf;
+
+public interface SFRenderer
+{
+  public void message( String msg );
+  public void updatePacketsRead( int n );
+  public void updatePacketsWritten( int n );
+  public void updateNumClients( int n );
+  public void updateListenServerStatus( boolean listening );
+}
+
diff --git a/support/sdk/java/net/tinyos/sf/SFWindow.java b/support/sdk/java/net/tinyos/sf/SFWindow.java
new file mode 100644
index 00000000..2df51830
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SFWindow.java
@@ -0,0 +1,268 @@
+// $Id: SFWindow.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * File: ControlWindow.java
+ *
+ * Description:
+ * This class displays the GUI that allows the serial forwarder
+ * to be more easily configured
+ *
+ * @author <a href="mailto:bwhull@sourceforge.net">Bret Hull</a>
+ * @author <a href="mailto:dgay@intel-research.net">David Gay</a>
+ */
+
+package net.tinyos.sf;
+
+import javax.swing.*;
+import java.awt.*;
+import java.awt.event.*;
+import net.tinyos.packet.*;
+
+public class SFWindow extends JPanel implements WindowListener, SFRenderer {
+    JScrollPane   mssgPanel             = new JScrollPane();
+    JTextArea     mssgArea              = new JTextArea();
+    BorderLayout  toplayout             = new BorderLayout();
+    JTabbedPane   pnlTabs               = new JTabbedPane();
+    JLabel        labelPacketsSent      = new JLabel();
+    JLabel        labelServerPort       = new JLabel();
+    JTextField    fieldServerPort       = new JTextField();
+    JLabel        labelMoteCom          = new JLabel();
+    JLabel        labelPacketsReceived  = new JLabel();
+    JTextField    fieldMoteCom          = new JTextField();
+    ButtonGroup   bttnGroup             = new ButtonGroup();
+    JPanel        pnlMain               = new JPanel();
+    GridLayout    gridLayout1           = new GridLayout();
+    JLabel        labelNumClients       = new JLabel();
+    JCheckBox     cbVerboseMode         = new JCheckBox();
+    JButton       bStopServer           = new JButton();
+    GridLayout    gridLayout2           = new GridLayout();
+    JButton       bHelp                 = new JButton();
+    JButton       bClear                 = new JButton();
+    JButton       bQuit                 = new JButton();
+    private SerialForwarder sf;
+
+    public SFWindow(SerialForwarder SF) {
+	sf = SF;
+	try {
+	    jbInit();
+	}
+	catch(Exception e) {
+	    e.printStackTrace();
+	    System.exit(2);
+	}
+    }
+
+    static public SFWindow createGui( SerialForwarder sf, String title )
+    {
+        JFrame mainFrame = new JFrame(title);
+        SFWindow cntrlWndw = new SFWindow(sf);
+        mainFrame.setSize(cntrlWndw.getPreferredSize());
+        mainFrame.getContentPane().add("Center", cntrlWndw);
+        mainFrame.show();
+        mainFrame.addWindowListener(cntrlWndw);
+        return cntrlWndw;
+    }
+
+    private void jbInit() throws Exception {
+	this.setLayout(toplayout);
+
+	mssgPanel.setVerticalScrollBarPolicy(JScrollPane.VERTICAL_SCROLLBAR_ALWAYS);
+	mssgPanel.setAutoscrolls(true);
+	this.setMinimumSize(new Dimension(500, 250));
+	this.setPreferredSize(new Dimension(500, 300));
+	labelPacketsSent.setFont(new java.awt.Font("Dialog", 1, 10));
+	labelPacketsSent.setHorizontalTextPosition(SwingConstants.LEFT);
+	labelPacketsSent.setText("Pckts Read: 0");
+	labelServerPort.setFont(new java.awt.Font("Dialog", 1, 10));
+	labelServerPort.setText("Server Port:");
+	fieldServerPort.setFont(new java.awt.Font("Dialog", 0, 10));
+	fieldServerPort.setText(Integer.toString (sf.serverPort));
+	labelMoteCom.setFont(new java.awt.Font("Dialog", 1, 10));
+	labelMoteCom.setText("Mote Communications:");
+
+	labelPacketsReceived.setFont(new java.awt.Font("Dialog", 1, 10));
+	labelPacketsReceived.setHorizontalTextPosition(SwingConstants.LEFT);
+	labelPacketsReceived.setText("Pckts Wrttn: 0");
+	fieldMoteCom.setFont(new java.awt.Font("Dialog", 0, 10));
+	fieldMoteCom.setText(sf.motecom);
+
+	// Input CheckBoxes
+	ActionListener cbal = new ActionListener() {
+		public void actionPerformed(ActionEvent e) {
+		    updateGlobals();
+		}
+	    };
+
+	bQuit.addActionListener(new java.awt.event.ActionListener() {
+		public void actionPerformed(ActionEvent e) {
+		    shutdown();
+		}
+	    });
+        bQuit.setText("Quit");
+        bQuit.setFont(new java.awt.Font("Dialog", 1, 10));
+
+	bClear.addActionListener(new java.awt.event.ActionListener() {
+		public synchronized void actionPerformed(ActionEvent e) {
+		    mssgArea.setText("");
+		    sf.clearCounts();
+		}
+	    });
+        bClear.setText("Clear");
+        bClear.setFont(new java.awt.Font("Dialog", 1, 10));
+
+	bHelp.addActionListener(new java.awt.event.ActionListener() {
+		public void actionPerformed(ActionEvent e) {
+		    sf.message("The Mote communications field must");
+		    sf.message("specify a known packet source, one of:");
+		    sf.message(BuildSource.sourceHelp());
+		}
+	    });
+        bHelp.setText("Help");
+        bHelp.setFont(new java.awt.Font("Dialog", 1, 10));
+
+	pnlMain.setLayout(gridLayout1);
+	pnlMain.setMinimumSize(new Dimension(150, 75));
+	pnlMain.setPreferredSize(new Dimension(150, 75));
+	gridLayout1.setRows(13);
+	labelNumClients.setFont(new java.awt.Font("Dialog", 1, 10));
+	labelNumClients.setText("Num Clients: 0");
+	cbVerboseMode.setSelected(sf.verbose.on);
+	cbVerboseMode.setText("Verbose Mode");
+	cbVerboseMode.setFont(new java.awt.Font("Dialog", 1, 10));
+	cbVerboseMode.addActionListener(cbal);
+
+	bStopServer.setFont(new java.awt.Font("Dialog", 1, 10));
+	bStopServer.setText("Stop Server");
+	bStopServer.addActionListener(new java.awt.event.ActionListener() {
+		public void actionPerformed(ActionEvent e) {
+		    if (sf.listenServer != null) {
+			sf.stopListenServer();
+		    }
+		    else {
+			updateGlobals();
+			sf.startListenServer();
+		    }
+		}
+	    });
+	gridLayout2.setRows(15);
+	gridLayout2.setColumns(1);
+
+	toplayout.setHgap(1);
+	toplayout.setVgap(1);
+	this.add(mssgPanel, BorderLayout.CENTER);
+	this.add(pnlTabs, BorderLayout.EAST);
+	pnlTabs.add(pnlMain, "Main");
+
+	// Main Panel Setup
+	pnlMain.add(labelServerPort, null);
+	pnlMain.add(fieldServerPort, null);
+	pnlMain.add(labelMoteCom, null);
+	pnlMain.add(fieldMoteCom, null);
+	pnlMain.add(bStopServer, null);
+
+	pnlMain.add(cbVerboseMode, null);
+
+	pnlMain.add(labelPacketsSent, null);
+	pnlMain.add(labelPacketsReceived, null);
+	pnlMain.add(labelNumClients, null);
+        pnlMain.add(bHelp, null);
+        pnlMain.add(bClear, null);
+        pnlMain.add(bQuit, null);
+
+	mssgPanel.getViewport().add(mssgArea, null);
+	mssgArea.setFont(new java.awt.Font("Monospaced", Font.PLAIN, 12));
+    }
+
+    public synchronized void windowClosing (WindowEvent e) {
+	shutdown();
+    }
+
+    public void windowClosed      (WindowEvent e) { }
+    public void windowActivated   (WindowEvent e) { }
+    public void windowIconified   (WindowEvent e) { }
+    public void windowDeactivated (WindowEvent e) { }
+    public void windowDeiconified (WindowEvent e) { }
+    public void windowOpened      (WindowEvent e) { }
+
+    public synchronized void message(String mssg) {
+	mssgArea.append(mssg + "\n");
+	mssgArea.setCaretPosition(mssgArea.getDocument().getLength());
+    }
+
+    public void updatePacketsRead(int numPackets) {
+	labelPacketsSent.setText("Pckts Read: " + numPackets);
+    }
+
+    public void updatePacketsWritten(int numPackets) {
+	labelPacketsReceived.setText("Pckts Wrttn: " + numPackets);
+    }
+
+    public void updateNumClients(int numClients) {
+	labelNumClients.setText("Num Clients: " + numClients);
+    }
+
+    private void updateGlobals() {
+	// set application/communications defaults
+	sf.verbose.on          = cbVerboseMode.isSelected();
+	sf.motecom             = fieldMoteCom.getText();
+	sf.serverPort          = Integer.parseInt(fieldServerPort.getText());
+    }
+
+    public void updateListenServerStatus(boolean running) {
+	if (!running) {
+	    bStopServer.setText("Start Server");
+	}
+	else {
+	    bStopServer.setText("Stop Server");
+	}
+    }
+
+    synchronized private void shutdown() {
+        //sf.cntrlWndw = null;
+	sf.stopListenServer();
+        System.out.println("Serial Forwarder Exited Normally\n");
+        System.exit(0);
+    }
+
+}
diff --git a/support/sdk/java/net/tinyos/sf/SerialForwarder.java b/support/sdk/java/net/tinyos/sf/SerialForwarder.java
new file mode 100644
index 00000000..579aa832
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/SerialForwarder.java
@@ -0,0 +1,239 @@
+// $Id: SerialForwarder.java,v 1.6 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * File: SerialForwarder.java
+ *
+ * Description:
+ * The SerialForwarder class provides many static functions
+ * that handle the initialization of the serialforwarder
+ * and/or the associated gui.
+ *
+ * @author <a href="mailto:bwhull@sourceforge.net">Bret Hull</a>
+ * @author <a href="mailto:dgay@intel-research.net">David Gay</a>
+ */
+package net.tinyos.sf;
+
+import java.io.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+public class SerialForwarder implements Messenger {
+  public static final int DEFAULT_PORT = 9002;
+
+  // appication defaults
+  public SFRenderer renderer;
+
+  public SFListen listenServer;
+
+  public String motecom = "serial@com1:57600";
+
+  public boolean logDB;
+
+  public int serverPort = DEFAULT_PORT;
+
+  private boolean displayHelp = false;
+
+  private int nClients = 0;
+
+  private int nPacketsRead = 0;
+
+  private int nPacketsWritten = 0;
+
+  private SFListen listener = null;
+
+  SFMessenger verbose = new SFMessenger(true);
+
+  SFMessenger debug = new SFMessenger(false);
+
+  class SFMessenger implements Messenger {
+    boolean on;
+
+    SFMessenger(boolean on) {
+      this.on = on;
+    }
+
+    public void message(String message) {
+      if (on) {
+        SerialForwarder.this.message(message);
+      }
+    }
+  }
+
+  public static void main(String[] args) throws IOException {
+    new SerialForwarder(args);
+  }
+
+  public SerialForwarder(String[] args) throws IOException {
+    ProcessCommandLineArgs(args);
+
+    if (displayHelp) {
+      printHelp();
+      System.exit(2);
+    }
+    
+    if(renderer == null) {
+      // Default is GUI
+      renderer = SFWindow.createGui(this, "TinyOS 2.x Serial Forwarder");
+    }
+    
+    startListenServer();
+  }
+
+  private void ProcessCommandLineArgs(String[] args) {
+    for (int i = 0; i < args.length; i++) {
+      debug.message(args[i]);
+    }
+    for (int i = 0; i < args.length; i++) {
+      if (args[i].equals("-no-gui") && renderer == null) {
+        renderer = new SFConsoleRenderer();
+        
+      } else if(args[i].equals("-no-output") && renderer == null) {
+        renderer = new SFNullRenderer();
+        
+      } else if (args[i].equals("-comm")) {
+        i++;
+        if (i < args.length) {
+          motecom = args[i];
+        } else {
+          displayHelp = true;
+        }
+        
+      } else if (args[i].equals("-port")) {
+        i++;
+        if (i < args.length) {
+          serverPort = Integer.parseInt(args[i]);
+        } else {
+          displayHelp = true;
+        }
+      } else if (args[i].equals("-log")) {
+        logDB = true;
+      } else if (args[i].equals("-quiet")) {
+        verbose.on = false;
+      } else if (args[i].equals("-debug")) {
+        debug.on = true;
+      } else {
+        displayHelp = true;
+      }
+    }
+  }
+
+  private static void printHelp() {
+    System.err.println("optional arguments:");
+    System.err.println("-port [server port] (default " + DEFAULT_PORT + ")");
+    System.err.println("-comm [motecom spec] (default serial@com1:57600)");
+    System.err.println("-packetsize [size] (default 36)");
+    System.err.println("-no-gui      = do not display graphic interface");
+    System.err.println("-no-output");
+    System.err.println("-quiet       = non-verbose mode");
+    System.err.println("-debug       = display debug messages");
+    System.err.println("-log         = log to database");
+  }
+
+  private void createGui() {
+    renderer = SFWindow.createGui(this, "SerialForwarder");
+  }
+
+  public void message(String msg) {
+    renderer.message(msg);
+  }
+
+  synchronized public void incrementPacketsRead() {
+    nPacketsRead++;
+    renderer.updatePacketsRead(nPacketsRead);
+  }
+
+  synchronized public void incrementPacketsWritten() {
+    nPacketsWritten++;
+    renderer.updatePacketsWritten(nPacketsWritten);
+  }
+
+  synchronized public void incrementClients() {
+    nClients++;
+    renderer.updateNumClients(nClients);
+  }
+
+  synchronized public void decrementClients() {
+    nClients--;
+    renderer.updateNumClients(nClients);
+  }
+
+  public synchronized void clearCounts() {
+    nPacketsRead = nPacketsWritten = 0;
+    renderer.updatePacketsWritten(nPacketsWritten);
+    renderer.updatePacketsRead(nPacketsRead);
+  }
+
+  public synchronized void startListenServer() {
+    if (listenServer == null) {
+      nClients = 0;
+      listenServer = new SFListen(this);
+      listenServer.start();
+    }
+    renderer.updateListenServerStatus(true);
+    renderer.updateNumClients(nClients);
+    clearCounts();
+  }
+
+  public void stopListenServer() {
+    SFListen lserver;
+
+    // We can't just make stopSFListen synchronized because
+    // listenServerStopped must be synchronized too
+    synchronized (this) {
+      lserver = listenServer;
+      if (lserver != null)
+        listenServer.shutdown();
+    }
+    if (lserver != null) {
+      try {
+        lserver.join(2000);
+      } catch (InterruptedException ex) {
+      }
+    }
+  }
+
+  public synchronized void listenServerStopped() {
+    listenServer = null;
+    renderer.updateListenServerStatus(false);
+  }
+}
diff --git a/support/sdk/java/net/tinyos/sf/package.html b/support/sdk/java/net/tinyos/sf/package.html
new file mode 100644
index 00000000..36d64534
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sf/package.html
@@ -0,0 +1,37 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
+<html>
+<head>
+<!--
+
+  @(#)package.html	1.60 98/01/27
+
+  Copyright 1998 Sun Microsystems, Inc. 901 San Antonio Road, 
+  Palo Alto, California, 94303, U.S.A.  All Rights Reserved.
+
+  This software is the confidential and proprietary information of Sun
+  Microsystems, Inc. ("Confidential Information").  You shall not
+  disclose such Confidential Information and shall use it only in
+  accordance with the terms of the license agreement you entered into
+  with Sun.
+
+  CopyrightVersion 1.2
+
+-->
+</head>
+<body bgcolor="white">
+
+Provides a communication source mux/demux (SerialForwarder) that allows multiple
+clients to share a single packet source.
+
+
+<h2>Package Specification</h2>
+
+<h2>Related Documentation</h2>
+
+Lesson 4 of the TinyOS tutorials describes how to use SerialForwarder.
+
+<!-- Put @see and @since tags down here. -->
+
+</body>
+</html>
+
diff --git a/support/sdk/java/net/tinyos/sim/LinkLayerModel.java b/support/sdk/java/net/tinyos/sim/LinkLayerModel.java
new file mode 100644
index 00000000..a8e1bfc1
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sim/LinkLayerModel.java
@@ -0,0 +1,765 @@
+/****************************************************************************
+ *       
+ * Copyright (c) 2006 The University of Southern California"  
+ * All rights reserved.   
+ *       
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *     
+ * Author:  Marco Zuniga, Avinash Sridharan
+ * Director: Prof. Bhaskar Krishnamachari
+ * Autonomous Networks Reseach Group, University of Southern California
+ * http://ceng.usc.edu/~anrg
+ * Contact: marcozun@usc.edu
+ *
+ * Date last modified: 2004/07/02 marcozun
+ * Date last modified: 2006/02/05 asridhar
+ *       
+ *     
+ * Description: This file contains the code that generates the
+ * gains for all links in the network and noise floor values for
+ * all nodes.
+ *     
+ ****************************************************************************/
+
+package net.tinyos.sim;
+
+import java.io.*;
+import java.util.*;
+import java.text.DecimalFormat;
+
+/**
+ * Stores channel, radio and topology parameters provided by user
+ * through the configuration file.
+ */
+
+class InputVariables {
+
+  // Channel parameters
+  double n;  // path loss exponent
+  double sigma; // standard deviation shadowing variance
+  double  d0;  // reference distance
+  double pld0; // power decay for reference distance d0
+  // Radio parameters
+  double pn;  // radio noise floor
+  double wgn; // white gaussian noise 
+  // Covariance Matrix for hardware variance
+  double  s11;
+  double  s12;
+  double  s21;
+  double  s22;
+  // Topology parameters
+  int  numNodes; // number of nodes
+  int  top;  // topology option
+  double grid;  // grid unit
+  double Xterr;  // X dimension of Terrain
+  double Yterr;  // Y dimension of Terrain
+  String topFile; // file name with nodes' coordinates (user-defined)
+  // data directly derived from configuration file
+  double area;  // area of the terrain
+
+
+  InputVariables() { // Constructor, loading default values
+    n  = 3;
+    sigma = 3;
+    pld0 = 55;
+    d0  = 1;
+    pn  = -105;
+    wgn  = 4;
+    s11  = 3.7;
+    s12  = -3.3;
+    s21  = -3.3;
+    s22  = 6.0;
+    numNodes= 0;
+    top  = 0;
+    Xterr = 0;
+    Yterr = 0;
+    topFile = "";
+    area  = 0;
+  }
+
+}
+
+/**
+ * Stores nodes' coordinates, link gains and noise floor values for a given topology 
+ */
+
+class OutputVariables {
+
+  double[] nodePosX;  // X coordinate
+  double[] nodePosY;  // Y coordinate
+  double[] outputpowervar; // output power
+  double[] noisefloor;  // noise floor
+  double[][]  linkGain;  // link gain
+
+  OutputVariables(int numNodes) { // Constructor
+
+    nodePosX = new double[numNodes];
+    nodePosY = new double[numNodes];
+    outputpowervar = new double[numNodes];
+    noisefloor  = new double[numNodes];
+    linkGain = new double[numNodes][numNodes];
+  }
+
+}
+
+
+/**
+ * Simulates gains for all links of a specific topology, and noise
+ * floor values for all nodes.  <p>The link gain between nodes A and B
+ * is defined as the output power of A minus the pathloss between A
+ * and B.  The user specifies the desired channel, radio and topology
+ * parameters through a configuration file.  The configuration file is
+ * provided as a command line argument: <tt>$ java LinkLayerModel
+ * configurationFileName</tt>, and the link gains and noise floor
+ * values are provided on a file called <tt>linkgain.out</tt>.
+ */
+
+public class LinkLayerModel  {
+
+  public static void main (String args[]) {
+    if (args.length != 1) {
+      usage();
+      return;
+    }
+    // variable that contains input parameters
+    InputVariables inVar = new InputVariables();
+    // parse configuration file and store parameters in inVar
+    readFile  ( args[0], inVar );
+    // if user defined topology (TOPOLOGY = 4), obtain number of nodes
+    if (inVar.top == 4) {
+      obtainNumNodes (inVar.topFile, inVar);
+    }
+    // variable that contains output data
+    OutputVariables outVar = new OutputVariables( inVar.numNodes ); 
+    // create topology
+    System.out.print("Topology ...\t\t\t");
+    obtainTopology ( inVar, outVar );
+    System.out.println("done");
+    // obtain ouput power and noise floor for all nodes
+    System.out.print("Radio Pt and Pn ...\t\t");
+    obtainRadioPtPn ( inVar, outVar );
+    System.out.println("done");
+    // obtain link gains 
+    System.out.print("Links Gain .....\t\t");
+    obtainLinkGain ( inVar, outVar);
+    System.out.println("done");
+    // print linkgain.out (link gains and noise floor) and topology.out (x/y coordinates)
+    System.out.print("Printing Output File ...\t");
+    printFile  ( inVar, outVar);
+    System.out.println("done");
+  }
+
+
+  /**
+   * Parses configuration file provided by user and stores specified
+   * parameters
+   *
+   * @param inputFile configuration file containing channel, radio and
+   * deployment parameters
+   * @param  var   class that stores input parameters from configuration file
+   * @return    true if file parsing was performed without errors
+   */
+
+  protected static boolean readFile (String inputFile, InputVariables var )
+  {
+
+    String thisLine;
+    StringTokenizer st;
+
+    // open configuration file
+    try {
+      FileInputStream fin =  new FileInputStream(inputFile);
+      try {
+        BufferedReader myInput = new BufferedReader(new InputStreamReader(fin));
+        try {
+          // parse the file
+          while ((thisLine = myInput.readLine()) != null) {
+
+            if ( !thisLine.equals("") && !thisLine.startsWith("%") ) {
+              st = new StringTokenizer(thisLine, " =;\t");
+              String key = st.nextToken();
+              String value = st.nextToken();
+
+              if ( key.equals("PATH_LOSS_EXPONENT")) {
+                var.n = Double.valueOf(value).doubleValue();
+                if (var.n < 0) {
+                  System.out.println("Error: value of PATH_LOSS_EXPONENT must be positive");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("SHADOWING_STANDARD_DEVIATION")) {
+                var.sigma = Double.valueOf(value).doubleValue();
+                if (var.sigma < 0) {
+                  System.out.println("Error: value of SHADOWING_STANDARD_DEVIATION must be positive");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("PL_D0")) {
+                var.pld0 = Double.valueOf(value).doubleValue();
+                if (var.pld0 < 0) {
+                  System.out.println("Error: value of PL_D0 must be positive");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("D0")) {
+                var.d0 = Double.valueOf(value).doubleValue();
+                if (var.d0 <= 0) {
+                  System.out.println("Error: value of D0 must be greater than zero");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("NOISE_FLOOR")) {
+                var.pn = Double.valueOf(value).doubleValue();
+              }
+              else if ( key.equals("WHITE_GAUSSIAN_NOISE")) {
+                var.wgn = Double.valueOf(value).doubleValue();
+                if (var.wgn < 0) {
+                  System.out.println("Error: value of WHITE_GAUSSIAN_NOISE must be greater equal than 0");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("S11")) {
+                var.s11 = Double.valueOf(value).doubleValue();
+                if (var.s11 < 0) {
+                  System.out.println("Error: value of S11 must be greater equal than 0");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("S12")) {
+                var.s12 = Double.valueOf(value).doubleValue();
+              }
+              else if ( key.equals("S21")) {
+                var.s21 = Double.valueOf(value).doubleValue();
+              }
+              else if ( key.equals("S22")) {
+                var.s22 = Double.valueOf(value).doubleValue();
+                if (var.s22 < 0) {
+                  System.out.println("Error: value of S22 must be greater equal than 0");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("NUMBER_OF_NODES")) {
+                var.numNodes = Integer.parseInt(value);
+                if (var.numNodes <= 0) {
+                  System.out.println("Error: value of NUMBER_OF_NODES must be positive");
+                  System.exit(1);
+                }
+              } 
+              else if ( key.equals("TOPOLOGY")) {
+                var.top = Integer.parseInt(value);
+                if ( (var.top < 1) | (var.top > 4) ) {
+                  System.out.println("Error: value of TOPOLOGY must be between 1 and 4");
+                  System.exit(1);
+                }
+              }
+              else if ( key.equals("GRID_UNIT")) {
+                var.grid = Double.valueOf(value).doubleValue();
+              }
+              else if ( key.equals("TOPOLOGY_FILE")) {
+                var.topFile = value;
+              }
+              else if ( key.equals("TERRAIN_DIMENSIONS_X")) {
+                var.Xterr = Double.valueOf(value).doubleValue();
+                if (var.Xterr < 0) {
+                  System.out.println("Error: value of TERRAIN_DIMENSIONS_X must be positive");
+                  System.exit(1);
+                }
+              } 
+              else if ( key.equals("TERRAIN_DIMENSIONS_Y")) {
+                var.Yterr = Double.valueOf(value).doubleValue();
+                if (var.Yterr < 0) {
+                  System.out.println("Error: value of TERRAIN_DIMENSIONS_Y must be positive");
+                  System.exit(1);
+                }
+                var.area = var.Xterr * var.Yterr;
+              } 
+              else {
+                System.out.println("Error: undefined parameter " + key + ", please review your configuration file");
+                System.exit(1);
+              } 
+            }
+          } // end while loop
+        }
+        catch (Exception e) {
+          System.out.println("Error1: " + e);
+          System.exit(1);
+        }
+
+      } // end try
+      catch (Exception e) {
+        System.out.println("Error2: " + e);
+        System.exit(1);
+      }
+
+    } // end try
+    catch (Exception e) {
+      System.out.println("Error Failed to Open file " + inputFile + e);
+      System.exit(1);
+    }
+
+    return true;
+
+  }
+
+  /**
+   * Obtain X and Y coordinates for all nodes. Different type of topologies are available 
+   * (grid, uniform, random, user-defined)
+   * 
+   * @param inVar class that contains input parameters from configuration file
+   * @param outVar class that stores x/y coordinates
+   * @return true if X/Y coordinates are obtained without errors
+   */
+
+  protected static boolean obtainTopology( InputVariables  inVar, 
+                                           OutputVariables outVar )
+  {
+
+    Random rand = new Random();
+    int i, j;
+    int sqrtNumNodes, nodesX;
+    double cellArea, cellLength;
+    double Xdist, Ydist, dist;
+    boolean wrongPlacement;
+
+    if (inVar.numNodes <= 0) {
+      System.out.println("\nError: value of NUMBER_OF_NODES must be positive");
+      System.exit(1);
+    }
+
+    switch (inVar.top) {
+    case 1: // GRID
+      if (inVar.grid < inVar.d0) {
+        System.out.println("\nError: value of GRID_UNIT must be equal or greater than D0");
+        System.exit(1);
+      }
+      sqrtNumNodes = (int) Math.sqrt(inVar.numNodes);
+      if ( sqrtNumNodes != Math.sqrt(inVar.numNodes) ) {
+        System.out.println ("\nError: on GRID topology, NUMBER_OF_NODES should be the square of a natural number");
+        System.exit(1);
+      }
+      for (i = 0; i < inVar.numNodes; i = i+1) {
+        outVar.nodePosX[i] = (i%sqrtNumNodes) * inVar.grid;
+        outVar.nodePosY[i] = (i/sqrtNumNodes) * inVar.grid;
+      }
+      break;
+    case 2: // UNIFORM
+      sqrtNumNodes = (int) Math.sqrt(inVar.numNodes);
+      if ( sqrtNumNodes != Math.sqrt(inVar.numNodes) ) {
+        System.out.println ("\nError: on UNIFORM topology, NUMBER_OF_NODES should be the square of a natural number");
+        System.exit(1);
+      }
+      if ( (inVar.Xterr <= 0) | (inVar.Yterr <= 0) ) {
+        System.out.println("\nError: values of TERRAIN_DIMENSIONS must be positive");
+        System.exit(1);
+      }
+      if ( inVar.Xterr != inVar.Yterr ) {
+        System.out.println("\nError: values of TERRAIN_DIMENSIONS_X and TERRAIN_DIMENSIONS_Y must be equal");
+        System.exit(1);
+      }
+      cellLength = Math.sqrt ( inVar.area / inVar.numNodes );
+      nodesX = sqrtNumNodes; 
+      if ( cellLength < (inVar.d0*1.4) ) {
+        System.out.println ("\nError: on UNIFORM topology, density is too high, increase physical terrain");
+        System.exit(1);
+      }
+      for (i = 0; i < inVar.numNodes; i = i+1) {
+        outVar.nodePosX[i] = (i%nodesX) * cellLength + rand.nextDouble()*cellLength;
+        outVar.nodePosY[i] = (i/nodesX) * cellLength + rand.nextDouble()*cellLength;
+        wrongPlacement = true;
+        while ( wrongPlacement ) {
+          for (j = 0; j < i; j = j+1) {
+            Xdist = outVar.nodePosX[i] - outVar.nodePosX[j];
+            Ydist = outVar.nodePosY[i] - outVar.nodePosY[j];
+            // distance between a given pair of nodes
+            dist = Math.pow((Xdist*Xdist + Ydist*Ydist), 0.5);
+            if (dist < inVar.d0) {
+              outVar.nodePosX[i] = (i%nodesX) * cellLength + rand.nextDouble()*cellLength;
+              outVar.nodePosY[i] = (i/nodesX) * cellLength + rand.nextDouble()*cellLength;
+              wrongPlacement = true;
+              break;
+            }
+          }
+          if ( j == i ) {
+            wrongPlacement = false;
+          }
+        }
+      }
+      break;
+    case 3: // RANDOM
+      if ( (inVar.Xterr <= 0) | (inVar.Yterr <= 0) ) {
+        System.out.println("\nError: values of TERRAIN_DIMENSIONS must be positive");
+        System.exit(1);
+      }
+      cellLength = Math.sqrt ( inVar.area / inVar.numNodes );   
+      if ( cellLength < (inVar.d0*1.4) ) {
+        System.out.println ("\nError: on RANDOM topology, density is too high, increase physical terrain");
+        System.exit(1);
+      }
+      for (i = 0; i < inVar.numNodes; i = i+1) {
+        outVar.nodePosX[i] = rand.nextDouble() * inVar.Xterr;
+        outVar.nodePosY[i] = rand.nextDouble() * inVar.Yterr;
+        wrongPlacement = true;
+        while ( wrongPlacement ) {
+          for (j = 0; j < i; j = j+1) {
+            Xdist = outVar.nodePosX[i] - outVar.nodePosX[j];
+            Ydist = outVar.nodePosY[i] - outVar.nodePosY[j];
+            // distance between a given pair of nodes
+            dist = Math.pow((Xdist*Xdist + Ydist*Ydist), 0.5);
+            if (dist < inVar.d0) {
+              outVar.nodePosX[i] = rand.nextDouble() * inVar.Xterr;
+              outVar.nodePosY[i] = rand.nextDouble() * inVar.Yterr;
+              wrongPlacement = true;
+              break;
+            }
+          }
+          if ( j == i ) {
+            wrongPlacement = false;
+          }
+        }
+      }
+      break;
+    case 4: // FILE (user-defined topology)
+      readTopologyFile(inVar.topFile, outVar);
+      correctTopology (inVar, outVar);
+      break;
+    default:
+      System.out.println("\nError: topology is not correct, please check TOPOLOGY in the configuration file");
+      System.exit(1);
+    }
+
+    return true;
+  }
+
+
+  /**
+   * Checks that user-defined topology does not have inter-node distances less than D0 meter, 
+   * where D0 is the reference distance in the channel model (specified in configuration file)
+   *
+   * @param inVar class that stores input parameters from configuration file
+   * @param outVar class that stores link gains, noise floors and x/y coordinates
+   * @return true if x/y coordinates provided by user satisfy the condition that no internode distance is lesss than D0
+   */
+
+  protected static boolean correctTopology ( InputVariables  inVar, 
+                                             OutputVariables outVar )
+  {
+    Random rand = new Random();
+    int i, j;
+    double Xdist, Ydist, dist, avgDecay;
+
+    for (i = 0; i < inVar.numNodes; i = i+1) {
+      for (j = i+1; j < inVar.numNodes; j = j+1 ) {
+        Xdist = outVar.nodePosX[i] - outVar.nodePosX[j];
+        Ydist = outVar.nodePosY[i] - outVar.nodePosY[j];
+        // distance between a given pair of nodes
+        dist = Math.pow((Xdist*Xdist + Ydist*Ydist), 0.5);
+        if (dist < inVar.d0) {
+          System.out.println("\nError: file " + inVar.topFile + " contains inter-node distances less than one.");
+          System.exit(1);
+        }
+      }
+    }
+    return true;
+  }
+
+
+  /**
+   * Obtains output power and noise floor for all nodes in the network
+   *
+   * @param inVar class that contains radio parameters
+   * @param outVar class that stores output powers and noise floors
+   * @return true if all output powers and noise floors were obtained correctly
+   */
+
+  protected static boolean obtainRadioPtPn ( InputVariables  inVar, 
+                                             OutputVariables outVar )
+  {
+    Random rand = new Random();
+    int i, j;
+    double t11, t12, t21, t22;
+    double rn1, rn2;
+
+    t11 = 0;
+    t12 = 0;
+    t21 = 0;
+    t22 = 0;
+
+    if ( (inVar.s11 == 0) && (inVar.s22 == 0) ) { // symmetric links do nothing
+    }
+    else if ( (inVar.s11 == 0) && (inVar.s22 != 0) ) { // both S11 and S22 must be 0 for symmetric links
+      System.out.println("\nError: symmetric links require both, S11 and S22 to be 0, not only S11.");
+      System.exit(1);
+    }
+    else {
+      if ( (inVar.s12 != inVar.s21) ) { // check that S is symmetric
+        System.out.println("\nError: S12 and S21 must have the same value.");
+        System.exit(1);
+      }
+      if ( Math.abs(inVar.s12) > Math.sqrt(inVar.s11*inVar.s22) ) { // check that correlation is within [-1,1]
+        System.out.println("\nError: S12 (and S21) must be less than sqrt(S11xS22).");
+        System.exit(1);
+      }
+      t11 = Math.sqrt(inVar.s11);
+      t12 = inVar.s12/Math.sqrt(inVar.s11);
+      t21 = 0;
+      t22 = Math.sqrt( (inVar.s11*inVar.s22 - Math.pow( inVar.s12, 2)) / inVar.s11 );
+    }
+
+    for (i = 0; i < inVar.numNodes; i = i+1) {
+      rn1 = rand.nextGaussian();
+      rn2 = rand.nextGaussian();
+      outVar.noisefloor[i]  = inVar.pn + t11 * rn1;
+      outVar.outputpowervar[i] = t12 * rn1 + t22 * rn2;
+    }
+    return true;
+  }
+
+
+  /**
+   * Obtains gain for all links in the network. The link gain between nodes A and B 
+   * is defined as the output power of A minus the pathloss between A and B.
+   *
+   * @param inVar class that contains channel parameters from configuration file
+   * @param outVar class that stores link gains
+   * @return true if all link gains were obtained correctly
+   */
+
+  protected static boolean obtainLinkGain ( InputVariables  inVar, 
+                                            OutputVariables outVar )
+  {
+    Random rand = new Random();
+    int i, j;
+    double Xdist, Ydist, dist, pathloss;
+
+    for (i = 0; i < inVar.numNodes; i = i+1) {
+      for (j = i+1; j < inVar.numNodes; j = j+1 ) {
+        Xdist = outVar.nodePosX[i] - outVar.nodePosX[j];
+        Ydist = outVar.nodePosY[i] - outVar.nodePosY[j];
+        // distance between a given pair of nodes
+        dist = Math.pow((Xdist*Xdist + Ydist*Ydist), 0.5);
+        // mean decay dependent on distance
+        pathloss = - inVar.pld0 - 10*inVar.n*(Math.log(dist/inVar.d0)/Math.log(10.0)) + ( rand.nextGaussian()*inVar.sigma );
+        // assymetric links are given by running two different
+        // R.V.s for each unidirectional link (output power variance).
+        outVar.linkGain[i][j] = outVar.outputpowervar[i] + pathloss;
+        outVar.linkGain[j][i] = outVar.outputpowervar[j] + pathloss;
+  
+      }
+    }
+    return true;
+
+  }
+
+
+  /**
+   * Provides link gain and noise floor in file linkgain.out, and the
+   * X/Y coordinates in file topology.out.
+   *
+   * @param inVar class that contains input parameters from configuration file
+   * @param outVar class that stores link gains, noise floors and x/y coordinates
+   * @return true if files linkgain.out and topology.out were printed correctly
+   */
+
+  protected static boolean printFile( InputVariables  inVar, 
+                                      OutputVariables outVar )
+  {
+
+    int i, j;
+
+    DecimalFormat posFormat = new DecimalFormat("##0.00");
+
+    /*
+     * Output file for xy coordinates.
+     */
+
+    try{
+      FileOutputStream fout =  new FileOutputStream("topology.out");
+      try {
+        PrintStream myOutput = new PrintStream(fout);
+        for (i = 0; i < inVar.numNodes; i = i+1) {
+          myOutput.print( i + "\t" + posFormat.format(outVar.nodePosX[i]) + "\t"+ posFormat.format(outVar.nodePosY[i]) + "\n");
+        }
+      }
+      catch (Exception e) {
+        System.out.println("\nError : Failed to open a print stream to the linkgain file" + e);
+      }
+
+    }
+    catch (Exception e) {
+      System.out.println("\nError : Failed to open the link gain file linkgains.out:" + e);
+    }
+
+   
+    /*
+     * Output file for link gains.
+     */
+    try{
+      FileOutputStream fout =  new FileOutputStream("linkgain.out");
+      try {
+        PrintStream myOutput = new PrintStream(fout);
+        for (i = 0; i < inVar.numNodes; i = i+1) {
+          for (j = (i+1); j < inVar.numNodes; j = j+1 ) {
+            if ( i != j) {
+              myOutput.print( "gain\t" + i + "\t" + j + "\t" + posFormat.format(outVar.linkGain[i][j]) + "\n");
+              myOutput.print( "gain\t" + j + "\t" + i + "\t" + posFormat.format(outVar.linkGain[j][i]) + "\n");
+            }
+          }
+        }
+        for (i = 0; i < inVar.numNodes; i = i+1) {
+          myOutput.print( "noise\t" + i + "\t" + posFormat.format(outVar.noisefloor[i]) + "\t" + posFormat.format(inVar.wgn) + "\n");
+        }
+      }
+      catch (Exception e) {
+        System.out.println("\nError : Failed to open a print stream to the linkgain file" + e);
+      }
+
+    }
+    catch (Exception e) {
+      System.out.println("\nError : Failed to open the link gain file linkgains.out:" + e);
+    }
+
+    return true;
+  }
+
+  /**
+   * Obtains nodes coordinates for user-defined topology.
+   *  
+   * @param inputTopoFile topology file provided by user
+   * @param outVar class that contains variables to store x/y coordinates of nodes
+   * @return true if x/y coordinates of user-defined topology file were read correctly.
+   */
+
+  protected static boolean readTopologyFile ( String inputTopoFile,
+                                              OutputVariables outVar )
+  {
+
+    String thisLine;
+    StringTokenizer st;
+    int counter = 0;
+
+    try {
+      FileInputStream fin =  new FileInputStream(inputTopoFile);
+      try {
+        BufferedReader myInput = new BufferedReader(new InputStreamReader(fin));
+
+        try {
+
+          while ((thisLine = myInput.readLine()) != null) {
+
+            if ( !thisLine.equals("")  && !thisLine.startsWith("%") && 
+                 !thisLine.startsWith(" ") ) {
+              st = new StringTokenizer(thisLine, " \t");
+              int node = Integer.parseInt(st.nextToken());
+              double x = Double.valueOf(st.nextToken()).doubleValue();
+              double y = Double.valueOf(st.nextToken()).doubleValue();
+              outVar.nodePosX[node] = x;
+              outVar.nodePosY[node] = y;
+              counter++;
+            }
+          }
+        } // end try
+        catch (Exception e) {
+          System.out.println("Error4: " + e);
+          System.exit(1);
+        }
+
+      } // end try
+      catch (Exception e) {
+        System.out.println("Error5: " + e);
+        System.exit(1);
+      }
+
+    } // end try
+    catch (Exception e) {
+      System.out.println("Error: Failed to Open TOPOLOGY_FILE " + inputTopoFile + e);
+      System.exit(1);
+    }
+
+    return true;
+  }
+
+
+  /**
+   * Obtains number of nodes in network when user defines the topology.
+   *
+   * @param inputTopoFile topology file provided by user
+   * @param inVar class that contains variable for number of nodes
+   * @return true if number of nodes from user-defined topology file were obtained correctly
+   */
+
+  protected static boolean obtainNumNodes ( String inputTopoFile,
+                                            InputVariables inVar )
+  {
+
+    String thisLine;
+    StringTokenizer st;
+    int counter = 0;
+
+    try {
+      FileInputStream fin =  new FileInputStream(inputTopoFile);
+      try {
+        BufferedReader myInput = new BufferedReader(new InputStreamReader(fin));
+
+        try {
+
+          while ((thisLine = myInput.readLine()) != null) {
+
+            if ( !thisLine.equals("")  && !thisLine.startsWith("%") && 
+                 !thisLine.startsWith(" ") ) {
+              counter++;
+            }
+          }
+          inVar.numNodes = counter; 
+
+        } // end try
+        catch (Exception e) {
+          System.out.println("Error4: " + e);
+          System.exit(1);
+        }
+
+      } // end try
+      catch (Exception e) {
+        System.out.println("Error5: " + e);
+        System.exit(1);
+      }
+
+    } // end try
+    catch (Exception e) {
+      System.out.println("Error: Failed to Open TOPOLOGY_FILE " + inputTopoFile + e);
+      System.exit(1);
+    }
+
+    return true;
+  }
+
+  private static void usage() {
+    System.err.println("usage: net.tinyos.sim.LinkLayerModel <config file>");
+  }
+}
+
+
diff --git a/support/sdk/java/net/tinyos/sim/Makefile b/support/sdk/java/net/tinyos/sim/Makefile
new file mode 100644
index 00000000..7f8b61e0
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sim/Makefile
@@ -0,0 +1,4 @@
+# Top-level Makefile for tools/java 
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
diff --git a/support/sdk/java/net/tinyos/sim/package.html b/support/sdk/java/net/tinyos/sim/package.html
new file mode 100644
index 00000000..9f69c2b8
--- /dev/null
+++ b/support/sdk/java/net/tinyos/sim/package.html
@@ -0,0 +1,35 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
+<html>
+<head>
+<!--
+
+  @(#)package.html	1.60 98/01/27
+
+  Copyright 1998 Sun Microsystems, Inc. 901 San Antonio Road, 
+  Palo Alto, California, 94303, U.S.A.  All Rights Reserved.
+
+  This software is the confidential and proprietary information of Sun
+  Microsystems, Inc. ("Confidential Information").  You shall not
+  disclose such Confidential Information and shall use it only in
+  accordance with the terms of the license agreement you entered into
+  with Sun.
+
+  CopyrightVersion 1.2
+
+-->
+</head>
+<body bgcolor="white">
+
+Provides tools to generate communication topologies for TOSSIM.
+
+<h2>Package Specification</h2>
+
+<h2>Related Documentation</h2>
+
+Lesson 11 of the TinyOS tutorials describe how to use these tools.
+
+<!-- Put @see and @since tags down here. -->
+
+</body>
+</html>
+
diff --git a/support/sdk/java/net/tinyos/tools/.cvsignore b/support/sdk/java/net/tinyos/tools/.cvsignore
new file mode 100644
index 00000000..933f8f49
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/.cvsignore
@@ -0,0 +1 @@
+PrintfMsg.java
diff --git a/support/sdk/java/net/tinyos/tools/Listen.java b/support/sdk/java/net/tinyos/tools/Listen.java
new file mode 100644
index 00000000..be552255
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/Listen.java
@@ -0,0 +1,88 @@
+// $Id: Listen.java,v 1.5 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+package net.tinyos.tools;
+
+import java.io.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+import net.tinyos.message.*;
+
+public class Listen {
+    public static void main(String args[]) throws IOException {
+        String source = null;
+        PacketSource reader;
+        if (args.length == 2 && args[0].equals("-comm")) {
+          source = args[1];
+        }
+	else if (args.length > 0) {
+	    System.err.println("usage: java net.tinyos.tools.Listen [-comm PACKETSOURCE]");
+	    System.err.println("       (default packet source from MOTECOM environment variable)");
+	    System.exit(2);
+	}
+        if (source == null) {	
+  	  reader = BuildSource.makePacketSource();
+        }
+        else {
+  	  reader = BuildSource.makePacketSource(source);
+        }
+	if (reader == null) {
+	    System.err.println("Invalid packet source (check your MOTECOM environment variable)");
+	    System.exit(2);
+	}
+
+	try {
+	  reader.open(PrintStreamMessenger.err);
+	  for (;;) {
+	    byte[] packet = reader.readPacket();
+	    Dump.printPacket(System.out, packet);
+	    System.out.println();
+	    System.out.flush();
+	  }
+	}
+	catch (IOException e) {
+	    System.err.println("Error on " + reader.getName() + ": " + e);
+	}
+    }
+}
+
diff --git a/support/sdk/java/net/tinyos/tools/ListenRaw.java b/support/sdk/java/net/tinyos/tools/ListenRaw.java
new file mode 100644
index 00000000..3849c6fd
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/ListenRaw.java
@@ -0,0 +1,194 @@
+// $Id: ListenRaw.java,v 1.7 2010-06-29 22:07:41 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors: Mike Chen, Philip Levis
+ * Last Modified: 7/1/02 (transition to nesC)
+ *
+ */
+
+/**
+ * @author Mike Chen
+ * @author Philip Levis
+ */
+
+
+
+package net.tinyos.tools;
+
+import java.util.*;
+import java.io.*;
+import net.tinyos.comm.*;
+
+import net.tinyos.util.*;
+
+public class ListenRaw {
+    private static String CLASS_NAME = "net.tinyos.tools.ListenRaw";
+    private static final int MAX_MSG_SIZE = 40;
+    private static final int PORT_SPEED_TELOS = 115200;
+    private static final int PORT_SPEED_MICAZ = 57600;
+    private static final int PORT_SPEED_MICA2 = 57600;
+    private static final int PORT_SPEED_MICA2DOT = 19200;
+    private static final int PORT_SPEED_MICA = 19200;
+    private static final int PORT_SPEED_RENE = 19200;
+    private static final int PORT_SPEED_IRIS = 57600;
+    private static final int PORT_SPEED_SHIMMER = 115200;
+    private static final int LENGTH_OFFSET = 4;
+    private int packetLength;
+    private int portSpeed;
+
+    private SerialPort port;
+    private String portName;
+    private InputStream in;
+    private OutputStream out;
+
+    public ListenRaw(String portName, int portSpeed) {
+	this.portName = portName;
+	this.portSpeed = portSpeed;
+    }
+
+
+    public void open() throws IOException, UnsupportedCommOperationException {
+	System.out.println("Opening port " + portName);
+	port = new TOSSerial(portName);
+	in = port.getInputStream();
+	out = port.getOutputStream();
+
+	//port.setFlowControlMode(SerialPort.FLOWCONTROL_NONE);
+	// These are the mote UART parameters
+	port.setSerialPortParams(portSpeed, 8, SerialPort.STOPBITS_1, false);
+	printPortStatus();
+	System.out.println();
+    }
+
+    private void printPortStatus() {
+	System.out.println(" baud rate: " + port.getBaudRate());
+	System.out.println(" data bits: " + port.getDataBits());
+	System.out.println(" stop bits: " + port.getStopBits());
+	System.out.println(" parity:    " + port.getParity());
+    }
+
+    public void read() throws IOException {
+	int i;
+	int count = 0;
+	byte[] packet = new byte[MAX_MSG_SIZE];
+
+	while ((i = in.read()) != -1) {
+	    if (i == 0x7e) {
+		System.out.println();
+	    }
+	    Dump.printByte(System.out, i);
+	}
+    }
+
+    private static void printUsage() {
+	System.err.println("usage: java net.tinyos.tools.ListenRaw [options] <port>");
+	System.err.println("options are:");
+	System.err.println("  -h, --help:    usage help");
+	System.err.println("  -p:            print available ports");
+	System.err.println("  -telos:        Telos ("+PORT_SPEED_TELOS+" bps)");
+	System.err.println("  -micaz:        Mica2 ("+PORT_SPEED_MICAZ+" bps) [default]");
+	System.err.println("  -mica2:        Mica2 ("+PORT_SPEED_MICA2+" bps) [default]");
+	System.err.println("  -mica2dot:     Mica2Dot ("+PORT_SPEED_MICA2DOT+" bps)");
+	System.err.println("  -mica:         Mica ("+PORT_SPEED_MICA+" bps)");
+	System.err.println("  -rene:         Rene ("+PORT_SPEED_RENE+" bps)");
+	System.err.println("  -iris:         Iris ("+PORT_SPEED_IRIS+" bps) [default]");
+	System.err.println("  -shimmer:      Shimmer ("+PORT_SPEED_SHIMMER+" bps)");
+	System.exit(-1);
+    }
+
+
+    public static void main(String args[]) {
+	int speed = PORT_SPEED_MICA2;
+
+	if ((args.length < 1) || (args.length > 3)) {
+	    printUsage();
+	}
+
+	for (int i = 0; i < args.length; i++) {
+	    if (args[i].equals("-h") || args[i].equals("--help")) {
+		printUsage();
+	    }
+	    if (args[i].equals("-telos")) {
+	        speed = PORT_SPEED_TELOS;
+	    }
+	    if (args[i].equals("-micaz")) {
+	        speed = PORT_SPEED_MICAZ;
+	    }
+	    if (args[i].equals("-mica2")) {
+	        speed = PORT_SPEED_MICA2;
+	    }
+	    if (args[i].equals("-mica2dot")) {
+	        speed = PORT_SPEED_MICA2DOT;
+	    }
+	    if (args[i].equals("-mica")) {
+	        speed = PORT_SPEED_MICA;
+	    }
+	    if (args[i].equals("-rene")) {
+	        speed = PORT_SPEED_RENE;
+	    }
+	    if (args[i].equals("-iris")) {
+	        speed = PORT_SPEED_IRIS;
+	    }
+	    if (args[i].equals("-shimmer")) {
+	        speed = PORT_SPEED_SHIMMER;
+	    }
+	}
+
+	if (args[args.length - 1].charAt(0) == '-') {
+	    return; // No port specified
+	}
+
+	ListenRaw reader = new ListenRaw(args[args.length - 1], speed);
+	try {
+	    reader.open();
+	}
+	catch (Exception e) {
+	    e.printStackTrace();
+	}
+
+	try {
+	    reader.read();
+	}
+	catch (Exception e) {
+	    e.printStackTrace();
+	}
+    }
+}
diff --git a/support/sdk/java/net/tinyos/tools/Makefile b/support/sdk/java/net/tinyos/tools/Makefile
new file mode 100644
index 00000000..4087d371
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/Makefile
@@ -0,0 +1,17 @@
+# $Id: Makefile,v 1.6 2008-06-18 19:04:45 sallai Exp $
+#
+# TinyOS Tools Makefile
+#
+# @author  TinyOS Team
+#
+
+INITIAL_TARGETS = PrintfMsg.class PrintfMsg.java
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
+
+PRINTF_H = $(TOSDIR)/lib/printf/printf.h
+
+PrintfMsg.java: $(PRINTF_H) FORCE
+	mig java $(CFLAGS) -java-classname=net.tinyos.tools.PrintfMsg $(PRINTF_H) printf_msg -o $@
+
diff --git a/support/sdk/java/net/tinyos/tools/MsgReader.java b/support/sdk/java/net/tinyos/tools/MsgReader.java
new file mode 100644
index 00000000..1336c4bf
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/MsgReader.java
@@ -0,0 +1,133 @@
+/*									tab:4
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:	Phil Levis <pal@cs.berkeley.edu>
+ * Date:        December 1 2005
+ * Desc:        Generic Message reader
+ *               
+ */
+
+/**
+ * @author Phil Levis <pal@cs.berkeley.edu>
+ */
+
+
+package net.tinyos.tools;
+
+import java.util.*;
+
+import net.tinyos.message.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+public class MsgReader implements net.tinyos.message.MessageListener {
+
+  private MoteIF moteIF;
+  
+  public MsgReader(String source) throws Exception {
+    if (source != null) {
+      moteIF = new MoteIF(BuildSource.makePhoenix(source, PrintStreamMessenger.err));
+    }
+    else {
+      moteIF = new MoteIF(BuildSource.makePhoenix(PrintStreamMessenger.err));
+    }
+  }
+
+  public void start() {
+  }
+  
+  public void messageReceived(int to, Message message) {
+    long t = System.currentTimeMillis();
+    //    Date d = new Date(t);
+    System.out.print("" + t + ": ");
+    System.out.println(message);
+  }
+
+  
+  private static void usage() {
+    System.err.println("usage: MsgReader [-comm <source>] message-class [message-class ...]");
+  }
+
+  private void addMsgType(Message msg) {
+    moteIF.registerListener(msg, this);
+  }
+  
+  public static void main(String[] args) throws Exception {
+    String source = null;
+    Vector v = new Vector();
+    if (args.length > 0) {
+      for (int i = 0; i < args.length; i++) {
+	if (args[i].equals("-comm")) {
+	  source = args[++i];
+	}
+	else {
+	  String className = args[i];
+	  try {
+	    Class c = Class.forName(className);
+	    Object packet = c.newInstance();
+	    Message msg = (Message)packet;
+	    if (msg.amType() < 0) {
+		System.err.println(className + " does not have an AM type - ignored");
+	    }
+	    else {
+		v.addElement(msg);
+	    }
+	  }
+	  catch (Exception e) {
+	    System.err.println(e);
+	  }
+	}
+      }
+    }
+    else if (args.length != 0) {
+      usage();
+      System.exit(1);
+    }
+
+    MsgReader mr = new MsgReader(source);
+    Enumeration msgs = v.elements();
+    while (msgs.hasMoreElements()) {
+      Message m = (Message)msgs.nextElement();
+      mr.addMsgType(m);
+    }
+    mr.start();
+  }
+
+
+}
diff --git a/support/sdk/java/net/tinyos/tools/PrintfClient.java b/support/sdk/java/net/tinyos/tools/PrintfClient.java
new file mode 100644
index 00000000..f6be115e
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/PrintfClient.java
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.3 $
+ * @date $Date: 2010-06-29 22:07:42 $
+ */
+
+package net.tinyos.tools;
+
+import java.io.IOException;
+
+import net.tinyos.message.*;
+import net.tinyos.tools.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+public class PrintfClient implements MessageListener {
+
+  private MoteIF moteIF;
+  
+  public PrintfClient(MoteIF moteIF) {
+    this.moteIF = moteIF;
+    this.moteIF.registerListener(new PrintfMsg(), this);
+  }
+
+  public void messageReceived(int to, Message message) {
+    PrintfMsg msg = (PrintfMsg)message;
+    for(int i=0; i<msg.totalSize_buffer(); i++) {
+      char nextChar = (char)(msg.getElement_buffer(i));
+      if(nextChar != 0)
+        System.out.print(nextChar);
+    }
+  }
+  
+  private static void usage() {
+    System.err.println("usage: PrintfClient [-comm <source>]");
+  }
+  
+  public static void main(String[] args) throws Exception {
+    String source = null;
+    if (args.length == 2) {
+      if (!args[0].equals("-comm")) {
+	       usage();
+	       System.exit(1);
+      }
+      source = args[1];
+    }
+    
+    PhoenixSource phoenix;
+    if (source == null) {
+      phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err);
+    }
+    else {
+      phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err);
+    }
+    System.out.print(phoenix);
+    MoteIF mif = new MoteIF(phoenix);
+    PrintfClient client = new PrintfClient(mif);
+  }
+}
diff --git a/support/sdk/java/net/tinyos/tools/Send.java b/support/sdk/java/net/tinyos/tools/Send.java
new file mode 100644
index 00000000..caec4a77
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/Send.java
@@ -0,0 +1,70 @@
+// $Id: Send.java,v 1.5 2010-06-29 22:07:42 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.tools;
+
+import net.tinyos.util.*;
+import net.tinyos.packet.*;
+import java.io.*;
+
+public class Send {
+    public static void main(String[] argv) throws IOException
+    {
+	PacketSource sfw = BuildSource.makePacketSource();
+	sfw.open(PrintStreamMessenger.err);
+
+	byte[] packet = new byte[argv.length];
+	for (int i = 0; i < argv.length; i++)
+	    packet[i] = (byte)Integer.parseInt(argv[i], 16);
+
+	try {
+	    sfw.writePacket(packet);
+	}
+	catch (IOException e) {
+	    System.exit(2);
+	}
+	Dump.printPacket(System.out, packet);
+	System.out.println();
+	// A close would be nice, but javax.comm's close is deathly slow
+	//sfw.close();
+	System.exit(0);
+    }
+}    
diff --git a/support/sdk/java/net/tinyos/tools/package.html b/support/sdk/java/net/tinyos/tools/package.html
new file mode 100644
index 00000000..287b7f3e
--- /dev/null
+++ b/support/sdk/java/net/tinyos/tools/package.html
@@ -0,0 +1,35 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
+<html>
+<head>
+<!--
+
+  @(#)package.html	1.60 98/01/27
+
+  Copyright 1998 Sun Microsystems, Inc. 901 San Antonio Road, 
+  Palo Alto, California, 94303, U.S.A.  All Rights Reserved.
+
+  This software is the confidential and proprietary information of Sun
+  Microsystems, Inc. ("Confidential Information").  You shall not
+  disclose such Confidential Information and shall use it only in
+  accordance with the terms of the license agreement you entered into
+  with Sun.
+
+  CopyrightVersion 1.2
+
+-->
+</head>
+<body bgcolor="white">
+
+Provides low-level tools for interacting with TinyOS nodes. 
+
+
+<h2>Package Specification</h2>
+
+<h2>Related Documentation</h2>
+
+
+<!-- Put @see and @since tags down here. -->
+
+</body>
+</html>
+
diff --git a/support/sdk/java/net/tinyos/util/Crc.java b/support/sdk/java/net/tinyos/util/Crc.java
new file mode 100644
index 00000000..ba5235b3
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/Crc.java
@@ -0,0 +1,89 @@
+// $Id: Crc.java,v 1.5 2010-06-29 22:07:42 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.util;
+
+public class Crc {
+    public static int calcByte(int crc, int b) {
+      crc = crc ^ (int)b << 8;
+
+      for (int i = 0; i < 8; i++) {
+	if ((crc & 0x8000) == 0x8000)
+	  crc = crc << 1 ^ 0x1021;
+	else
+	  crc = crc << 1;
+      }
+
+      return crc & 0xffff;
+    }
+
+    public static int calc(byte[] packet, int index, int count) {
+	int crc = 0;
+	int i;
+
+	while (count > 0) {
+	    crc = calcByte(crc, packet[index++]);
+	    count--;
+	}
+	return crc;
+    }
+
+    public static int calc(byte[] packet, int count) {
+	return calc(packet, 0, count);
+    }
+
+    public static void set(byte[] packet) {
+        int crc = Crc.calc(packet, packet.length - 2);
+
+        packet[packet.length - 2] = (byte) (crc & 0xFF);
+        packet[packet.length - 1] = (byte) ((crc >> 8) & 0xFF);
+    }
+
+    public static void main(String[] args) {
+	byte[] ia = new byte[args.length];
+
+	for (int i = 0; i < args.length; i++)
+	    try {
+		ia[i] = Integer.decode(args[i]).byteValue();
+	    } catch (NumberFormatException e) { }
+	System.out.println(Integer.toHexString(calc(ia, ia.length)));
+    }
+}
diff --git a/support/sdk/java/net/tinyos/util/DiagMsg.java b/support/sdk/java/net/tinyos/util/DiagMsg.java
new file mode 100644
index 00000000..a0d8d24b
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/DiagMsg.java
@@ -0,0 +1,341 @@
+/*
+ * Copyright (c) 2003-2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * Author: Miklos Maroti
+ */
+
+package net.tinyos.util;
+
+import net.tinyos.packet.*;
+import net.tinyos.util.PrintStreamMessenger;
+
+public class DiagMsg implements PacketListenerIF {
+    
+    protected String delimiter = " ";
+    protected java.text.SimpleDateFormat timestamp = new java.text.SimpleDateFormat("HH:mm:ss");
+    
+    static final int PACKET_TYPE_FIELD = 7;
+    static final int PACKET_LENGTH_FIELD = 5;
+    static final int PACKET_DATA_FIELD = 8;
+    static final int PACKET_CRC_SIZE = 0;
+    static final byte AM_DIAG_MSG = (byte)0xB1;
+    
+    protected PhoenixSource forwarder;
+    
+    public DiagMsg(PhoenixSource forwarder)
+    {
+    	this.forwarder = forwarder;
+		forwarder.registerPacketListener(this);
+    }
+
+	public void run()
+	{
+		forwarder.run();
+	}
+
+	public static void main(String[] args) throws Exception 
+	{
+		PhoenixSource phoenix = null;
+
+		if( args.length == 0 )
+			phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err);
+		else if( args.length == 2 && args[0].equals("-comm") )
+			phoenix = BuildSource.makePhoenix(args[1], PrintStreamMessenger.err);
+		else
+		{
+			System.err.println("usage: DiagMsg [-comm <source>]");
+			System.exit(1);
+		}
+
+		DiagMsg listener = new DiagMsg(phoenix);
+		listener.run();
+	}
+
+	public void packetReceived(byte[] packet) 
+    {
+        if( packet[PACKET_TYPE_FIELD] == AM_DIAG_MSG ) {
+            try 
+            {
+            	System.out.println(timestamp.format(new java.util.Date()) + " " + decode(packet));
+            }
+            catch(Exception e) 
+            {
+                System.out.println(e.getMessage());
+            }
+        }
+    }
+    
+    protected byte[] packet;
+    protected int end;
+    protected int head;
+    protected StringBuffer line;
+    
+    protected synchronized String decode(byte[] packet) throws Exception 
+    {
+        this.packet = packet;
+        
+        head = PACKET_DATA_FIELD;
+        end = PACKET_DATA_FIELD + packet[PACKET_LENGTH_FIELD];
+        if( end < head || end > packet.length - PACKET_CRC_SIZE )
+            throw new Exception("illegal message length");
+
+        line = new StringBuffer();
+
+        while(head < end) {
+            byte code = getByte();
+
+            addSimple(code & 0xF);
+            addSimple((code >> 4) & 0xF);
+        }
+
+        // delete the leading space
+        if( line.length() > 0 && line.substring(0, delimiter.length()).equals(delimiter) )
+            line.delete(0, delimiter.length());
+
+        return new String(line);
+    }
+
+    static final int TYPE_END = 0;
+    static final int TYPE_INT8 = 1;
+    static final int TYPE_UINT8 = 2;
+    static final int TYPE_HEX8 = 3;
+    static final int TYPE_INT16 = 4;
+    static final int TYPE_UINT16 = 5;
+    static final int TYPE_HEX16 = 6;
+    static final int TYPE_INT32 = 7;
+    static final int TYPE_UINT32 = 8;
+    static final int TYPE_HEX32 = 9;
+    static final int TYPE_FLOAT = 10;
+    static final int TYPE_CHAR = 11;
+    static final int TYPE_INT64 = 12;
+    static final int TYPE_UINT64 = 13;
+    static final int TYPE_ARRAY = 15;
+
+    protected void addSimple(int type) throws Exception
+    {
+        switch(type) {
+            case TYPE_END:                 break;
+            case TYPE_INT8:   addInt8();   break;
+            case TYPE_UINT8:  addUint8();  break;
+            case TYPE_HEX8:   addHex8();   break;
+            case TYPE_INT16:  addInt16();  break;
+            case TYPE_UINT16: addUint16(); break;
+            case TYPE_HEX16:  addHex16();  break;
+            case TYPE_INT32:  addInt32();  break;
+            case TYPE_UINT32: addUint32(); break;
+            case TYPE_HEX32:  addHex32();  break;
+            case TYPE_FLOAT:  addReal();   break;
+            case TYPE_CHAR:   addChar();   break;
+            case TYPE_INT64:  addInt64();  break;
+            case TYPE_UINT64: addUint64(); break;
+            case TYPE_ARRAY:  addArray();  break;
+            
+            default:
+                line.append(delimiter + "unknown");
+        }
+    }
+    
+    protected void addArray() throws Exception 
+    {
+        int len = getByte();
+        int type = (len >> 4) & 0xF;
+        len &= 0xF;
+        
+        if( type == TYPE_CHAR )
+            addStr(len);
+        else {
+            line.append(delimiter + "[");
+            
+            while( --len >= 0 )
+                addSimple(type);
+            
+            line.append(" ]");
+        }
+    }
+    
+    protected void check(int len) throws Exception
+    {
+        if( head + len > end )
+            throw new Exception("illegal message format");
+    }
+    
+    protected byte getByte() throws Exception 
+    {
+        check(1);
+        byte ret = packet[head];
+        head += 1;
+        return ret;
+    }
+    
+    protected short getShort() throws Exception 
+    {
+        short a,b;
+        check(2);
+        
+        a = packet[head];            a &= 0x00FF;
+        b = packet[head+1]; b <<= 8; b &= 0xFF00; a |= b;
+        
+        head += 2;
+        return a;
+    }
+    
+    protected int getInt() throws Exception 
+    {
+        int a,b;
+        check(4);
+        
+        a = packet[head];             a &= 0x000000FF;
+        b = packet[head+1]; b <<= 8;  b &= 0x0000FF00; a |= b;
+        b = packet[head+2]; b <<= 16; b &= 0x00FF0000; a |= b;
+        b = packet[head+3]; b <<= 24; b &= 0xFF000000; a |= b;
+        
+        head += 4;
+        return a;
+    }
+    
+    protected long getLong() throws Exception 
+    {
+        long a,b;
+        check(8);
+        
+        a = packet[head];             a &= 0x00000000000000FF;
+        b = packet[head+1]; b <<= 8;  b &= 0x000000000000FF00; a |= b;
+        b = packet[head+2]; b <<= 16; b &= 0x0000000000FF0000; a |= b;
+        b = packet[head+3]; b <<= 24; b &= 0x00000000FF000000; a |= b;
+        b = packet[head+4]; b &= 0x00000000000000FF; b <<= 32; a |= b;
+        b = packet[head+5]; b &= 0x00000000000000FF; b <<= 40; a |= b;
+        b = packet[head+6]; b &= 0x00000000000000FF; b <<= 48; a |= b;
+        b = packet[head+7]; b &= 0x00000000000000FF; b <<= 56; a |= b;
+        
+        head += 8;
+        return a;
+    }
+    
+    protected void addUint8() throws Exception 
+    {
+        String value = Integer.toString(getByte() & 0xFF);
+        line.append(delimiter + value);
+    }
+    
+    protected void addInt8() throws Exception 
+    {
+        String value = Byte.toString(getByte());
+        line.append(delimiter + value);
+    }
+    
+    protected void addHex8() throws Exception 
+    {
+        String value = Integer.toHexString(getByte() & 0xFF);
+        
+        line.append(delimiter + "0x");
+        for(int i = value.length(); i < 2; ++i)
+            line.append('0');
+        line.append(value);
+    }
+    
+    protected void addUint16() throws Exception 
+    {
+        String value = Integer.toString(getShort() & 0xFFFF);
+        line.append(delimiter + value);
+    }
+    
+    protected void addInt16() throws Exception 
+    {
+        String value = Short.toString(getShort());
+        line.append(delimiter + value);
+    }
+    
+    protected void addHex16() throws Exception 
+    {
+        String value = Integer.toHexString(getShort() & 0xFFFF);
+        
+        line.append(delimiter + "0x");
+        for(int i = value.length(); i < 4; ++i)
+            line.append('0');
+        line.append(value);
+    }
+    
+    protected void addUint32() throws Exception 
+    {
+        String value = Long.toString(getInt() & 0xFFFFFFFF);
+        line.append(delimiter + value);
+    }
+    
+    protected void addInt32() throws Exception 
+    {
+        String value = Integer.toString(getInt());
+        line.append(delimiter + value);
+    }
+    
+    protected void addHex32() throws Exception 
+    {
+        String value = Integer.toHexString(getInt());
+        
+        line.append(delimiter + "0x");
+        for(int i = value.length(); i < 8; ++i)
+            line.append('0');
+        line.append(value);
+    }
+    
+    protected void addInt64() throws Exception 
+    {
+        String value = Long.toString(getLong());
+        line.append(delimiter + value);
+    }
+    
+    protected void addUint64() throws Exception 
+    {
+        String value = Long.toString(getLong());
+        line.append(delimiter + value);
+    }
+    
+    protected void addReal() throws Exception 
+    {
+        float value = Float.intBitsToFloat(getInt());
+        line.append(delimiter + Float.toString(value));
+    }
+    
+    protected void addChar() throws Exception 
+    {
+        char value = (char)getByte();
+        line.append(delimiter + "'" + value + "'");
+    }
+    
+    protected void addStr(int len) throws Exception 
+    {
+        line.append(delimiter + "\"");
+        
+        while( --len >= 0 )
+            line.append((char)getByte());
+        
+        line.append('"');
+    }
+}
diff --git a/support/sdk/java/net/tinyos/util/Dump.java b/support/sdk/java/net/tinyos/util/Dump.java
new file mode 100644
index 00000000..36e9088e
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/Dump.java
@@ -0,0 +1,91 @@
+// $Id: Dump.java,v 1.5 2010-06-29 22:07:42 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/* Authors:  David Gay  <dgay@intel-research.net>
+ *           Intel Research Berkeley Lab
+ *
+ */
+
+/**
+ * @author David Gay <dgay@intel-research.net>
+ * @author Intel Research Berkeley Lab
+ */
+
+package net.tinyos.util;
+
+import java.io.*;
+
+/**
+ * Dump class (print tinyos messages).<p>
+ *
+ * Print packets in hex
+ *
+ * @version	1, 15 Jul 2002
+ * @author	David Gay
+ */
+public class Dump {
+    public static void printByte(PrintStream p, int b) {
+	String bs = Integer.toHexString(b & 0xff).toUpperCase();
+	if (b >=0 && b < 16)
+	    p.print("0");
+	p.print(bs + " ");
+    }
+
+    public static void printPacket(PrintStream p, byte[] packet, int from, int count) {
+	for (int i = from; i < count; i++)
+	    printByte(p, packet[i]);
+    }
+
+    public static void printPacket(PrintStream p, byte[] packet) {
+	printPacket(p, packet, 0, packet.length);
+    }
+
+    public static void dump(PrintStream to, String prefix, byte[] data) {
+	to.print(prefix);
+	to.print(":");
+	printPacket(to, data);
+	to.println();
+    }
+
+    public static void dump(String prefix, byte[] packet) {
+	dump(System.err, prefix, packet);
+    }
+}
diff --git a/support/sdk/java/net/tinyos/util/Env.java b/support/sdk/java/net/tinyos/util/Env.java
new file mode 100644
index 00000000..624cea5c
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/Env.java
@@ -0,0 +1,50 @@
+// $Id: Env.java,v 1.4 2006-12-12 18:23:00 vlahan Exp $
+
+package net.tinyos.util;
+
+/**
+ * The <code>Env</code> class provides an implementation of
+ * <code>getenv</code> that actually works, unlike the one in
+ * <code>java.lang.System</code>.  The class cannot be instantiated.
+ *
+ * V1.1: provide wrapper so that getenv doesn't fail horribly when the
+ * native code is not found.
+ *
+ * @author   R M Yorston, David Gay
+ * @version  1.1
+ */
+public class Env {
+    static private boolean loaded;
+    static {
+	try {
+	    net.tinyos.util.TOSLibraryLoader.load("getenv");
+	    loaded = true;
+	}
+	catch (Throwable t) {
+	    System.err.println("getenv JNI library not found. Env.getenv will not work");
+	    System.err.println("(run the tos-install-jni tool, see man tos-install-jni for more details)\n");
+	}
+    }
+
+    private Env() {
+    }
+
+    /**
+     * Gets an environment variable. An environment variable is a
+     * system-dependent external variable that has a string value.
+     *
+     * @param	name	name of the environment variable
+     * @return	the value of the variable, or <code>null</code> if the
+     * variable is not defined.
+     */
+    public static String getenv(String name) {
+	if (loaded) {
+	    return igetenv(name);
+	}
+	else {
+	    return null;
+	}
+    }
+
+    private static native String igetenv(String name);
+}
diff --git a/support/sdk/java/net/tinyos/util/Makefile b/support/sdk/java/net/tinyos/util/Makefile
new file mode 100644
index 00000000..5be38247
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/Makefile
@@ -0,0 +1,7 @@
+# Top-level Makefile for tools/java 
+
+SUBDIRS = 
+
+ROOT = ../../..
+include $(ROOT)/Makefile.include
+
diff --git a/support/sdk/java/net/tinyos/util/Messenger.java b/support/sdk/java/net/tinyos/util/Messenger.java
new file mode 100644
index 00000000..f6b26d70
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/Messenger.java
@@ -0,0 +1,46 @@
+// $Id: Messenger.java,v 1.5 2010-06-29 22:07:42 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.util;
+
+public interface Messenger {
+  public void message(String s);
+}
diff --git a/support/sdk/java/net/tinyos/util/PrintStreamMessenger.java b/support/sdk/java/net/tinyos/util/PrintStreamMessenger.java
new file mode 100644
index 00000000..e9632aac
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/PrintStreamMessenger.java
@@ -0,0 +1,59 @@
+// $Id: PrintStreamMessenger.java,v 1.5 2010-06-29 22:07:42 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+package net.tinyos.util;
+
+import java.io.*;
+
+public class PrintStreamMessenger implements Messenger {
+  private PrintStream ps;
+
+  public PrintStreamMessenger(PrintStream ps) {
+    this.ps = ps;
+  }
+
+  public void message(String s) {
+    ps.println(s);
+  }
+
+  public static PrintStreamMessenger err = new PrintStreamMessenger(System.err);
+  public static PrintStreamMessenger out = new PrintStreamMessenger(System.out);
+}
diff --git a/support/sdk/java/net/tinyos/util/TOSLibraryLoader.java b/support/sdk/java/net/tinyos/util/TOSLibraryLoader.java
new file mode 100644
index 00000000..b922a196
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/TOSLibraryLoader.java
@@ -0,0 +1,230 @@
+/* Copyright (c) 2010 Urs Hunkeler (urs.hunkeler@epfl.ch)  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR THE AUTHOR BE LIABLE TO ANY PARTY
+ * FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING
+ * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE COPYRIGHT
+ * HOLDER AND/OR THE AUTHOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE COPYRIGHT HOLDER AND THE AUTHOR SPECIFICALLY DISCLAIM ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
+ * FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS ON AN
+ * "AS IS" BASIS, AND NEITHER THE COPYRIGHT OWNER NOR THE AUTHOR HAS ANY
+ * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR
+ * MODIFICATIONS.
+ */
+package net.tinyos.util;
+
+import java.io.ByteArrayOutputStream;
+import java.io.File;
+import java.io.FileOutputStream;
+import java.io.IOException;
+import java.io.InputStream;
+import java.io.PrintStream;
+
+/**
+ * This is a loader for native libraries that tries
+ * to load the libraries from an alternative path if
+ * the tradition loading fails.
+ * 
+ * The traditional approach is to find and load the native
+ * libraries from an operating system and Java implementation
+ * specific path. This requires the user to install the
+ * libraries in a specific location and has proven to be
+ * error prone and a frequent source of problems. The
+ * traditional approach is supported by default to give
+ * developers a means to easily test new versions of the
+ * libraries.
+ * 
+ * The alternative approach is strictly considered a
+ * fall-back method if the libraries have not been installed
+ * properly and to ease the deployment of back-end software
+ * on non-developer machines.
+ * 
+ * The alternative method determines the file (or resource)
+ * name of the native library based on the current operating
+ * system and architecture. It then attempts to copy the
+ * library from a resource on the classpath (which might be
+ * inside a .jar file, such as the tinyos.jar file) to a
+ * temporary file and load the library from this temporary
+ * file. The advantage of this method is that no native
+ * library files need to be installed on the computer (and
+ * thus no administrator rights are necessary). The temporary
+ * files are deleted when the virtual machine terminates.
+ * 
+ * Currently, the library loader class recognizes the
+ * following operating systems: Mac OS X, Linux, and Windows.
+ * The library loader class further recognizes the following
+ * architectures: ppc (PowerPC), x86 (the common Intel x86
+ * 32-bit compatible processors), and amd64 (the x86 64-bit
+ * processors). Precompiled libraries are only available
+ * for the toscomm and getenv libraries for the following
+ * platforms: macosx_ppc, macosx_x86, and windows_x86.
+ * 
+ * @author Urs Hunkeler (urs.hunkeler@epfl.ch)
+ */
+public class TOSLibraryLoader {
+	public static void load(String libName) {
+		boolean loaded = false;
+		boolean ok = true;
+		InputStream is = null;
+		FileOutputStream fos = null;
+		String text = "";
+		
+		// attempt to load the library the conventional way
+		// (using Java's default library locations and loading
+		// mechanism)
+		try {
+			text += "Attempting to load library '" + libName + "'\n";
+			
+			System.loadLibrary(libName);
+			
+			loaded = true;
+			text += "Library loaded successfully\n";
+		} catch(Throwable t) {
+			text += "Could not load library '" + libName + "': " + t.getMessage() + "\n";
+			ByteArrayOutputStream baos = new ByteArrayOutputStream();
+			PrintStream ps = new PrintStream(baos);
+			t.printStackTrace(ps);
+			text += "----------\n";
+			text += baos.toString();
+			text += "----------\n";
+		}
+		
+		if(!loaded) {
+			// failed to load the library the conventional way
+			System.err.println("Error loading the TinyOS JNI libraries the conventional way!");
+			System.err.println(text);
+			
+			// try to extract the library from the classpath
+			// (might be in tinyos.jar)
+			
+			// First some debugging information
+			System.out.println("In order to load the library '" + libName +
+					"' Java tries to locate the file '" +
+					System.mapLibraryName(libName) + "' in one of the " +
+					"following paths:");
+			System.out.println(System.getProperty("java.library.path"));
+			System.out.println();
+			
+			String os   = System.getProperty("os.name");
+			String arch = System.getProperty("os.arch");
+			System.out.println("The operating system is '" + os +
+					"' (" + arch + ")");
+			System.out.println();
+			
+			String libFile = null;
+			File tmpFile = null;
+			if(os.toLowerCase().startsWith("linux")) {
+				// Linux
+				if(arch.toLowerCase().equals("x86") || arch.toLowerCase().equals("i386")) {
+					libFile = "linux_x86_" + libName;
+				} else if(arch.toLowerCase().equals("ppc")) {
+					// not currently supported
+					//libFile = "linux_ppc_" + libName;
+				} else if(arch.toLowerCase().equals("amd64")) {
+					libFile = "linux_amd64_" + libName;
+				}
+			} else if(os.toLowerCase().startsWith("windows")) {
+				// Windows
+				if(arch.toLowerCase().equals("x86") || arch.toLowerCase().equals("i386")) {
+					libFile = "windows_x86_" + libName;
+				} else if(arch.toLowerCase().equals("ppc")) {
+					// not currently supported
+					//libFile = "windows_ppc_" + libName;
+				} else if(arch.toLowerCase().equals("amd64")) {
+					// not currently supported
+					//libFile = "windows_amd64_" + libName;
+				}
+			} else if(os.toLowerCase().startsWith("mac os x")) {
+				libFile = "macosx_universal_" + libName;
+			}
+			if(libFile != null) libFile += ".lib";
+			
+			if(libFile == null) {
+				ok = false;
+				System.out.println("The operating system and architecture " +
+						"is currently not supported");
+			}
+			
+			if(ok) {
+				System.out.println("Trying to locate the file '" + libFile + "' in the classpath");
+				// we found a mapping, now let's try to copy
+				// the library from the classpath (might be
+				// inside a .jar file) to a temporary file
+				// and load it from there
+				
+				// open the library file in the classpath (potentially inside the .jar file)
+				is = TOSLibraryLoader.class.getResourceAsStream(libFile);
+
+				if(is == null) {
+					System.out.println("The library file was not found in the classpath");
+					ok = false;
+				}
+			}
+			
+			if(ok) {
+				try {
+					tmpFile = File.createTempFile(libName, ".lib");
+				} catch(IOException ioe) {
+					ok = false;
+					tmpFile = null;
+					System.out.println("Could not create temporary file to extract library, aborting...");
+					ioe.printStackTrace();
+				}
+			}
+			if(tmpFile == null) {
+				ok = false;
+			}
+			
+			if(ok) {
+				System.out.println("Temporary file created: '" + tmpFile.getAbsolutePath() + "'");
+				tmpFile.deleteOnExit();
+				
+				try {
+					// open the temporary file for writing
+					fos = new FileOutputStream(tmpFile);
+
+					// copy the file
+					byte[] buffer = new byte[1024];
+					int len = 0;
+					while((len = is.read(buffer, 0, buffer.length)) > 0) {
+						fos.write(buffer, 0, len);
+					}
+				} catch(IOException ioe) {
+					ok = false;
+					System.out.println("An error occurred while copying the library file, aborting...");
+					tmpFile.delete();
+					tmpFile = null;
+				} finally {
+					if(fos != null) try { fos.close(); } catch(IOException ioe) { ioe.printStackTrace(); }
+					if( is != null) try {  is.close(); } catch(IOException ioe) { ioe.printStackTrace(); }
+				}
+			}
+			
+			if(ok) {
+				try {
+					System.out.println("Library copied successfully. Let's load it.");
+					System.load(tmpFile.getAbsolutePath());
+					loaded = true;
+					System.out.println("Library loaded successfully");
+				} catch(Throwable t) {
+					ok = false;
+					System.out.println("Error loading the library: " + t.getMessage());
+					t.printStackTrace();
+					tmpFile.delete();
+					tmpFile = null;
+				}
+			}
+		}
+	}
+	
+	public static void main(String[] args) {
+		load("toscomm");
+	}
+}
diff --git a/support/sdk/java/net/tinyos/util/linux_amd64_getenv.lib b/support/sdk/java/net/tinyos/util/linux_amd64_getenv.lib
new file mode 100755
index 00000000..282549f1
Binary files /dev/null and b/support/sdk/java/net/tinyos/util/linux_amd64_getenv.lib differ
diff --git a/support/sdk/java/net/tinyos/util/linux_amd64_toscomm.lib b/support/sdk/java/net/tinyos/util/linux_amd64_toscomm.lib
new file mode 100755
index 00000000..9acfde9c
Binary files /dev/null and b/support/sdk/java/net/tinyos/util/linux_amd64_toscomm.lib differ
diff --git a/support/sdk/java/net/tinyos/util/linux_x86_getenv.lib b/support/sdk/java/net/tinyos/util/linux_x86_getenv.lib
new file mode 100755
index 00000000..6fe33afa
Binary files /dev/null and b/support/sdk/java/net/tinyos/util/linux_x86_getenv.lib differ
diff --git a/support/sdk/java/net/tinyos/util/linux_x86_toscomm.lib b/support/sdk/java/net/tinyos/util/linux_x86_toscomm.lib
new file mode 100755
index 00000000..60cad8e2
Binary files /dev/null and b/support/sdk/java/net/tinyos/util/linux_x86_toscomm.lib differ
diff --git a/support/sdk/java/net/tinyos/util/macosx_universal_getenv.lib b/support/sdk/java/net/tinyos/util/macosx_universal_getenv.lib
new file mode 100755
index 00000000..311e7a23
Binary files /dev/null and b/support/sdk/java/net/tinyos/util/macosx_universal_getenv.lib differ
diff --git a/support/sdk/java/net/tinyos/util/macosx_universal_toscomm.lib b/support/sdk/java/net/tinyos/util/macosx_universal_toscomm.lib
new file mode 100755
index 00000000..5ee238c4
Binary files /dev/null and b/support/sdk/java/net/tinyos/util/macosx_universal_toscomm.lib differ
diff --git a/support/sdk/java/net/tinyos/util/package.html b/support/sdk/java/net/tinyos/util/package.html
new file mode 100644
index 00000000..d2789ba0
--- /dev/null
+++ b/support/sdk/java/net/tinyos/util/package.html
@@ -0,0 +1,34 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
+<html>
+<head>
+<!--
+
+  @(#)package.html	1.60 98/01/27
+
+  Copyright 1998 Sun Microsystems, Inc. 901 San Antonio Road, 
+  Palo Alto, California, 94303, U.S.A.  All Rights Reserved.
+
+  This software is the confidential and proprietary information of Sun
+  Microsystems, Inc. ("Confidential Information").  You shall not
+  disclose such Confidential Information and shall use it only in
+  accordance with the terms of the license agreement you entered into
+  with Sun.
+
+  CopyrightVersion 1.2
+
+-->
+</head>
+<body bgcolor="white">
+
+Provides low-level utilities used by many packages.
+
+
+<h2>Package Specification</h2>
+
+<h2>Related Documentation</h2>
+
+<!-- Put @see and @since tags down here. -->
+
+</body>
+</html>
+
diff --git a/support/sdk/java/net/tinyos/util/windows_x86_getenv.lib b/support/sdk/java/net/tinyos/util/windows_x86_getenv.lib
new file mode 100755
index 00000000..38a0f855
Binary files /dev/null and b/support/sdk/java/net/tinyos/util/windows_x86_getenv.lib differ
diff --git a/support/sdk/java/net/tinyos/util/windows_x86_toscomm.lib b/support/sdk/java/net/tinyos/util/windows_x86_toscomm.lib
new file mode 100755
index 00000000..189d965d
Binary files /dev/null and b/support/sdk/java/net/tinyos/util/windows_x86_toscomm.lib differ
diff --git a/support/sdk/java/tinyos.jar b/support/sdk/java/tinyos.jar
new file mode 100644
index 00000000..91fb3776
Binary files /dev/null and b/support/sdk/java/tinyos.jar differ
diff --git a/support/sdk/python/tinyos/__init__.py b/support/sdk/python/tinyos/__init__.py
new file mode 100644
index 00000000..7b995667
--- /dev/null
+++ b/support/sdk/python/tinyos/__init__.py
@@ -0,0 +1,32 @@
+#
+# Copyright (c) 2005
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland <mainland@eecs.harvard.edu>
+#
+
+__all__ = ["message", "packet", "utils", "tossim"]
diff --git a/support/sdk/python/tinyos/message/Makefile b/support/sdk/python/tinyos/message/Makefile
new file mode 100644
index 00000000..533ce2cb
--- /dev/null
+++ b/support/sdk/python/tinyos/message/Makefile
@@ -0,0 +1,5 @@
+SERIAL_H = $(TOSDIR)/lib/serial/Serial.h
+
+
+SerialPacket.py: 
+	mig -o $@ -python-classname=SerialPacket python $(SERIAL_H) serial_packet -I$(TOSDIR)/types
diff --git a/support/sdk/python/tinyos/message/Message.py b/support/sdk/python/tinyos/message/Message.py
new file mode 100644
index 00000000..d3befe03
--- /dev/null
+++ b/support/sdk/python/tinyos/message/Message.py
@@ -0,0 +1,203 @@
+#
+# Copyright (c) 2005
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Authors: Geoffrey Mainland <mainland@eecs.harvard.edu>
+#          Philip Levis <pal@cs.stanford.edu>
+
+import struct
+
+class MessageException(Exception):
+    def __init__(self, *args):
+        self.args = args
+
+class Message:
+    def __init__(self, data, addr=None, gid=None, base_offset=0, data_length=None):
+        self.addr = addr
+        self.gid = gid
+        self.data = data
+        self.base_offset = base_offset
+        if data_length != None:
+            self.data_length = data_length
+
+            if data == None or len(data) != data_length:
+                self.data = chr(0) * data_length
+
+        else:
+            self.data_length = len(data)
+
+            self.am_type = 0
+            
+    def dataGet(self):
+        return self.data
+
+    def baseOffset(self):
+        return self.base_offset
+
+    def dataLength(self):
+        return self.data_length
+
+    def getAddr(self):
+        return self.addr
+
+    def getGid(self):
+        return self.gid
+
+    def amType(self):
+        return self.am_type
+
+    def amTypeSet(self, type):
+        self.am_type = type
+
+    def checkBounds(self, offset, length):
+        if offset < 0 or length <= 0 or offset + length > (self.data_length * 8):
+            raise MessageException("Message.checkBounds: bad offset (%d) or length (%d), for data_length %d" \
+                                   % (offset, length, self.data_length))
+
+        if offset & 7 != 0:
+            raise MessageException("Cannot deal with bit fields")
+
+        if length & 7 != 0:
+            raise MessageException("Cannot deal with bit fields")
+
+    def getUIntElement(self, offset, length, endian):
+        self.checkBounds(offset, length)
+        
+        byteOffset = offset >> 3
+        bitOffset = offset & 7
+
+        if (endian):
+            endian = ">"
+        else:
+            endian = "<"
+            
+        temp = self.data[byteOffset:byteOffset + (length >> 3)]
+
+        if length == 8:
+            return struct.unpack("B", temp)[0]
+        elif length == 16:
+            return struct.unpack(endian + "H", temp)[0]
+        elif length == 32:
+            return struct.unpack(endian + "L", temp)[0]
+        else:
+            raise MessageException("Bad length")
+
+    def setUIntElement(self, offset, length, val, endian):
+        self.checkBounds(offset, length)
+
+        byteOffset = offset >> 3
+        bitOffset = offset & 7
+
+        if (endian):
+            endian = ">"
+        else:
+            endian = "<"
+            
+        if length == 8:
+            temp = struct.pack(endian + "B", val)
+        elif length == 16:
+            temp = struct.pack(endian + "H", val)
+        elif length == 32:
+            temp = struct.pack(endian + "L", val)
+        else:
+            raise MessageException("Bad length")
+
+        self.data = self.data[:byteOffset] + temp + self.data[byteOffset + (length >> 3):]
+
+    def getSIntElement(self, offset, length, endian):
+        self.checkBounds(offset, length)
+
+        byteOffset = offset >> 3
+        bitOffset = offset & 7
+
+        if (endian):
+            endian = ">"
+        else:
+            endian = "<"
+
+        temp = self.data[byteOffset:byteOffset + (length >> 3)]
+
+        if length == 8:
+            return struct.unpack(endian + "b", temp)[0]
+        elif length == 16:
+            return struct.unpack(endian + "h", temp)[0]
+        elif length == 32:
+            return struct.unpack(endian + "l", temp)[0]
+        else:
+            raise MessageException("Bad length")
+
+    def setSIntElement(self, offset, length, val, endian):
+        self.checkBounds(offset, length)
+
+        byteOffset = offset >> 3
+        bitOffset = offset & 7
+
+        if (endian):
+            endian = ">"
+        else:
+            endian = "<"
+
+        if length == 8:
+            temp = struct.pack(endian + "b", val)
+        elif length == 16:
+            temp = struct.pack(endian + "h", val)
+        elif length == 32:
+            temp = struct.pack(endian + "l", val)
+        else:
+            raise MessageException("Bad length")
+
+        self.data = self.data[:byteOffset] + temp + self.data[byteOffset + (length >> 3):]
+
+    def getFloatElement(self, offset, length, endian):
+        self.checkBounds(offset, length)
+
+        byteOffset = offset >> 3
+        bitOffset = offset & 7
+
+        if (endian):
+            endian = ">"
+        else:
+            endian = "<"
+
+        temp = self.data[byteOffset:byteOffset + (length >> 3)]
+
+        return struct.unpack(endian + "f", temp)[0]
+
+    def setFloatElement(self, offset, length, value, endian):
+        self.checkBounds(offset, length)
+
+        byteOffset = offset >> 3
+        bitOffset = offset & 7
+
+        if (endian):
+            endian = ">"
+        else:
+            endian = "<"
+
+        temp = struct.pack(endian + "f", value)
+
+        self.data = self.data[:byteOffset] + temp + self.data[byteOffset + (length >> 3):]
diff --git a/support/sdk/python/tinyos/message/MoteIF.py b/support/sdk/python/tinyos/message/MoteIF.py
new file mode 100644
index 00000000..984b7798
--- /dev/null
+++ b/support/sdk/python/tinyos/message/MoteIF.py
@@ -0,0 +1,151 @@
+#
+# Copyright (c) 2005-2006
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland <mainland@eecs.harvard.edu>
+# Tinyos-2: Stephen Dawson-Haggerty
+
+import os
+import re
+import struct
+import sys
+import traceback
+from tinyos.utils.Watcher import Watcher
+
+from tinyos.packet.Serial import Serial
+from tinyos.message.SerialPacket import SerialPacket
+import tinyos.packet.PacketDispatcher
+import tinyos.packet.PacketSource
+import tinyos.packet.SFSource
+try:
+    import tinyos.packet.SerialSource
+except:
+    tinyos.packet.SerialSource = None
+
+DEBUG = False
+
+class MoteIFException(Exception):
+    def __init__(self, *args):
+        self.args = args
+
+class MoteIF:
+    def __init__(self):
+        self.listeners = {}
+        self.watcher = Watcher.getInstance()
+
+    def addListener(self, listener, msgClass):
+        if listener not in self.listeners:
+            self.listeners[listener] = {}
+
+        amTypes = self.listeners[listener]
+        amTypes[msgClass.get_amType()] = msgClass
+
+    def removeListener(self, listener):
+        del self.listeners[listener]
+
+    def dispatchPacket(self, source, packet):
+        #try:
+            #print "Packet length: ", len(packet)
+            #            print "Dispatching from MoteIF"
+            #             for i in packet:
+            #                 print ord(i)," ",
+            #             print
+        try:
+            # Message.py ignores base_offset, so we'll just chop off
+            # the first byte (the SERIAL_AMTYPE) here.
+            serial_pkt = SerialPacket(packet[1:],
+                                      data_length=len(packet)-1)
+        except:
+            traceback.print_exc()
+
+
+        try:
+            data_start = serial_pkt.offset_data(0) + 1
+            data_end = data_start + serial_pkt.get_header_length()
+            data = packet[data_start:data_end]
+            amType = serial_pkt.get_header_type()
+
+        except Exception, x:
+            print >>sys.stderr, x
+            print >>sys.stderr, traceback.print_tb(sys.exc_info()[2])
+
+        for l in self.listeners:
+            amTypes = self.listeners[l]
+            if amType in amTypes:
+                try:
+                    msgClass = amTypes[amType]
+                    msg = msgClass(data=data,
+                                   data_length = len(data),
+                                   addr=serial_pkt.get_header_src(),
+                                   gid=serial_pkt.get_header_group())
+                    l.receive(source, msg)
+                except Exception, x:
+                    print >>sys.stderr, x
+                    print >>sys.stderr, traceback.print_tb(sys.exc_info()[2])
+
+    def sendMsg(self, dest, addr, amType, group, msg):
+        try:
+            payload = msg.dataGet()
+            msg = SerialPacket(None)
+            msg.set_header_dest(int(addr))
+            msg.set_header_group(int(group))
+            msg.set_header_type(int(amType))
+            msg.set_header_length(len(payload))
+
+            # from tinyos.packet.Serial
+            data = chr(Serial.TOS_SERIAL_ACTIVE_MESSAGE_ID)
+            data += msg.dataGet()[0:msg.offset_data(0)]
+            data += payload
+
+            dest.writePacket(data)
+        except Exception, x:
+            print >>sys.stderr, x
+            print >>sys.stderr, traceback.print_tb(sys.exc_info()[2])
+
+    def addSource(self, name=None):
+        if name == None:
+            name = os.environ.get("MOTECOM", "sf@localhost:9002")
+
+        m = re.match(r'([^@]*)@(.*)', name)
+        if m == None:
+            raise MoteIFException("base source '%s'" % (name))
+
+        (sourceType, args) = m.groups()
+
+        if sourceType == "sf":
+            source = tinyos.packet.SFSource.SFSource(self, args)
+        elif sourceType == "serial" and tinyos.packet.SerialSource != None:
+            source = tinyos.packet.SerialSource.SerialSource(self, args)
+        else:
+            raise MoteIFException("bad source")
+        
+        source.start()
+
+        return source
+
+    def finishAll(self):
+        tinyos.packet.PacketSource.finishAll()
diff --git a/support/sdk/python/tinyos/message/SerialPacket.py b/support/sdk/python/tinyos/message/SerialPacket.py
new file mode 100644
index 00000000..8029a701
--- /dev/null
+++ b/support/sdk/python/tinyos/message/SerialPacket.py
@@ -0,0 +1,449 @@
+#
+# This class is automatically generated by mig. DO NOT EDIT THIS FILE.
+# This class implements a Python interface to the 'SerialPacket'
+# message type.
+#
+
+import tinyos.message.Message
+
+# The default size of this message type in bytes.
+DEFAULT_MESSAGE_SIZE = 7
+
+# The Active Message type associated with this message.
+AM_TYPE = -1
+
+class SerialPacket(tinyos.message.Message.Message):
+    # Create a new SerialPacket of size 7.
+    def __init__(self, data="", addr=None, gid=None, base_offset=0, data_length=7):
+        tinyos.message.Message.Message.__init__(self, data, addr, gid, base_offset, data_length)
+        self.amTypeSet(AM_TYPE)
+    
+    # Get AM_TYPE
+    def get_amType(cls):
+        return AM_TYPE
+    
+    get_amType = classmethod(get_amType)
+    
+    #
+    # Return a String representation of this message. Includes the
+    # message type name and the non-indexed field values.
+    #
+    def __str__(self):
+        s = "Message <SerialPacket> \n"
+        try:
+            s += "  [header.dest=0x%x]\n" % (self.get_header_dest())
+        except:
+            pass
+        try:
+            s += "  [header.src=0x%x]\n" % (self.get_header_src())
+        except:
+            pass
+        try:
+            s += "  [header.length=0x%x]\n" % (self.get_header_length())
+        except:
+            pass
+        try:
+            s += "  [header.group=0x%x]\n" % (self.get_header_group())
+        except:
+            pass
+        try:
+            s += "  [header.type=0x%x]\n" % (self.get_header_type())
+        except:
+            pass
+        try:
+            pass
+        except:
+            pass
+        return s
+
+    # Message-type-specific access methods appear below.
+
+    #
+    # Accessor methods for field: header.dest
+    #   Field type: int
+    #   Offset (bits): 0
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'header.dest' is signed (False).
+    #
+    def isSigned_header_dest(self):
+        return False
+    
+    #
+    # Return whether the field 'header.dest' is an array (False).
+    #
+    def isArray_header_dest(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'header.dest'
+    #
+    def offset_header_dest(self):
+        return (0 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'header.dest'
+    #
+    def offsetBits_header_dest(self):
+        return 0
+    
+    #
+    # Return the value (as a int) of the field 'header.dest'
+    #
+    def get_header_dest(self):
+        return self.getUIntElement(self.offsetBits_header_dest(), 16, 1)
+    
+    #
+    # Set the value of the field 'header.dest'
+    #
+    def set_header_dest(self, value):
+        self.setUIntElement(self.offsetBits_header_dest(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'header.dest'
+    #
+    def size_header_dest(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'header.dest'
+    #
+    def sizeBits_header_dest(self):
+        return 16
+    
+    #
+    # Accessor methods for field: header.src
+    #   Field type: int
+    #   Offset (bits): 16
+    #   Size (bits): 16
+    #
+
+    #
+    # Return whether the field 'header.src' is signed (False).
+    #
+    def isSigned_header_src(self):
+        return False
+    
+    #
+    # Return whether the field 'header.src' is an array (False).
+    #
+    def isArray_header_src(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'header.src'
+    #
+    def offset_header_src(self):
+        return (16 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'header.src'
+    #
+    def offsetBits_header_src(self):
+        return 16
+    
+    #
+    # Return the value (as a int) of the field 'header.src'
+    #
+    def get_header_src(self):
+        return self.getUIntElement(self.offsetBits_header_src(), 16, 1)
+    
+    #
+    # Set the value of the field 'header.src'
+    #
+    def set_header_src(self, value):
+        self.setUIntElement(self.offsetBits_header_src(), 16, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'header.src'
+    #
+    def size_header_src(self):
+        return (16 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'header.src'
+    #
+    def sizeBits_header_src(self):
+        return 16
+    
+    #
+    # Accessor methods for field: header.length
+    #   Field type: short
+    #   Offset (bits): 32
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'header.length' is signed (False).
+    #
+    def isSigned_header_length(self):
+        return False
+    
+    #
+    # Return whether the field 'header.length' is an array (False).
+    #
+    def isArray_header_length(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'header.length'
+    #
+    def offset_header_length(self):
+        return (32 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'header.length'
+    #
+    def offsetBits_header_length(self):
+        return 32
+    
+    #
+    # Return the value (as a short) of the field 'header.length'
+    #
+    def get_header_length(self):
+        return self.getUIntElement(self.offsetBits_header_length(), 8, 1)
+    
+    #
+    # Set the value of the field 'header.length'
+    #
+    def set_header_length(self, value):
+        self.setUIntElement(self.offsetBits_header_length(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'header.length'
+    #
+    def size_header_length(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'header.length'
+    #
+    def sizeBits_header_length(self):
+        return 8
+    
+    #
+    # Accessor methods for field: header.group
+    #   Field type: short
+    #   Offset (bits): 40
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'header.group' is signed (False).
+    #
+    def isSigned_header_group(self):
+        return False
+    
+    #
+    # Return whether the field 'header.group' is an array (False).
+    #
+    def isArray_header_group(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'header.group'
+    #
+    def offset_header_group(self):
+        return (40 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'header.group'
+    #
+    def offsetBits_header_group(self):
+        return 40
+    
+    #
+    # Return the value (as a short) of the field 'header.group'
+    #
+    def get_header_group(self):
+        return self.getUIntElement(self.offsetBits_header_group(), 8, 1)
+    
+    #
+    # Set the value of the field 'header.group'
+    #
+    def set_header_group(self, value):
+        self.setUIntElement(self.offsetBits_header_group(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'header.group'
+    #
+    def size_header_group(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'header.group'
+    #
+    def sizeBits_header_group(self):
+        return 8
+    
+    #
+    # Accessor methods for field: header.type
+    #   Field type: short
+    #   Offset (bits): 48
+    #   Size (bits): 8
+    #
+
+    #
+    # Return whether the field 'header.type' is signed (False).
+    #
+    def isSigned_header_type(self):
+        return False
+    
+    #
+    # Return whether the field 'header.type' is an array (False).
+    #
+    def isArray_header_type(self):
+        return False
+    
+    #
+    # Return the offset (in bytes) of the field 'header.type'
+    #
+    def offset_header_type(self):
+        return (48 / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'header.type'
+    #
+    def offsetBits_header_type(self):
+        return 48
+    
+    #
+    # Return the value (as a short) of the field 'header.type'
+    #
+    def get_header_type(self):
+        return self.getUIntElement(self.offsetBits_header_type(), 8, 1)
+    
+    #
+    # Set the value of the field 'header.type'
+    #
+    def set_header_type(self, value):
+        self.setUIntElement(self.offsetBits_header_type(), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of the field 'header.type'
+    #
+    def size_header_type(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of the field 'header.type'
+    #
+    def sizeBits_header_type(self):
+        return 8
+    
+    #
+    # Accessor methods for field: data
+    #   Field type: short[]
+    #   Offset (bits): 56
+    #   Size of each element (bits): 8
+    #
+
+    #
+    # Return whether the field 'data' is signed (False).
+    #
+    def isSigned_data(self):
+        return False
+    
+    #
+    # Return whether the field 'data' is an array (True).
+    #
+    def isArray_data(self):
+        return True
+    
+    #
+    # Return the offset (in bytes) of the field 'data'
+    #
+    def offset_data(self, index1):
+        offset = 56
+        if index1 < 0:
+            raise IndexError
+        offset += 0 + index1 * 8
+        return (offset / 8)
+    
+    #
+    # Return the offset (in bits) of the field 'data'
+    #
+    def offsetBits_data(self, index1):
+        offset = 56
+        if index1 < 0:
+            raise IndexError
+        offset += 0 + index1 * 8
+        return offset
+    
+    #
+    # Return the entire array 'data' as a short[]
+    #
+    def get_data(self):
+        raise IndexError
+    
+    #
+    # Set the contents of the array 'data' from the given short[]
+    #
+    def set_data(self, value):
+        for index0 in range(0, len(value)):
+            self.setElement_data(index0, value[index0])
+
+    #
+    # Return an element (as a short) of the array 'data'
+    #
+    def getElement_data(self, index1):
+        return self.getUIntElement(self.offsetBits_data(index1), 8, 1)
+    
+    #
+    # Set an element of the array 'data'
+    #
+    def setElement_data(self, index1, value):
+        self.setUIntElement(self.offsetBits_data(index1), 8, value, 1)
+    
+    #
+    # Return the size, in bytes, of each element of the array 'data'
+    #
+    def elementSize_data(self):
+        return (8 / 8)
+    
+    #
+    # Return the size, in bits, of each element of the array 'data'
+    #
+    def elementSizeBits_data(self):
+        return 8
+    
+    #
+    # Return the number of dimensions in the array 'data'
+    #
+    def numDimensions_data(self):
+        return 1
+    
+    #
+    # Return the number of elements in the array 'data'
+    # for the given dimension.
+    #
+    def numElements_data(self, dimension):
+        array_dims = [ 0,  ]
+        if dimension < 0 or dimension >= 1:
+            raise IndexException
+        if array_dims[dimension] == 0:
+            raise IndexError
+        return array_dims[dimension]
+    
+    #
+    # Fill in the array 'data' with a String
+    #
+    def setString_data(self, s):
+         l = len(s)
+         for i in range(0, l):
+             self.setElement_data(i, ord(s[i]));
+         self.setElement_data(l, 0) #null terminate
+    
+    #
+    # Read the array 'data' as a String
+    #
+    def getString_data(self):
+        carr = "";
+        for i in range(0, 4000):
+            if self.getElement_data(i) == chr(0):
+                break
+            carr += self.getElement_data(i)
+        return carr
+    
diff --git a/support/sdk/python/tinyos/message/__init__.py b/support/sdk/python/tinyos/message/__init__.py
new file mode 100644
index 00000000..75859605
--- /dev/null
+++ b/support/sdk/python/tinyos/message/__init__.py
@@ -0,0 +1,31 @@
+#
+# Copyright (c) 2005
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland <mainland@eecs.harvard.edu>
+#
+__all__ = ["Message", "MoteIF", "SerialPacket"]
diff --git a/support/sdk/python/tinyos/packet/IO.py b/support/sdk/python/tinyos/packet/IO.py
new file mode 100644
index 00000000..b9053e8c
--- /dev/null
+++ b/support/sdk/python/tinyos/packet/IO.py
@@ -0,0 +1,57 @@
+#
+# Copyright (c) 2005
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland <mainland@eecs.harvard.edu>
+#
+class IODone(Exception):
+    pass
+
+class IO:
+    def __init__(self):
+        self.done = False
+
+    def isDone(self):
+        return self.done
+
+    def cancel(self):
+        self.done = True
+
+    def open(self):
+        pass
+
+    def close(self):
+        pass
+
+    def read(self, count):
+        pass
+
+    def write(self, data):
+        pass
+
+    def flush(self):
+        pass
diff --git a/support/sdk/python/tinyos/packet/Makefile b/support/sdk/python/tinyos/packet/Makefile
new file mode 100644
index 00000000..77595676
--- /dev/null
+++ b/support/sdk/python/tinyos/packet/Makefile
@@ -0,0 +1,6 @@
+# Makefile for tools/java/net/tinyos/packet
+
+SERIAL_H = $(TOSDIR)/lib/serial/Serial.h
+
+Serial.py:  
+	ncg -o $@ -python-classname=Serial python $(SERIAL_H) Serial.h
diff --git a/support/sdk/python/tinyos/packet/PacketDispatcher.py b/support/sdk/python/tinyos/packet/PacketDispatcher.py
new file mode 100644
index 00000000..287f90c9
--- /dev/null
+++ b/support/sdk/python/tinyos/packet/PacketDispatcher.py
@@ -0,0 +1,59 @@
+#
+# Copyright (c) 2005
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland <mainland@eecs.harvard.edu>
+#
+import struct
+
+class PacketDispatcher:
+    def __init__(self):
+        self.listeners = {}
+
+    def addListener(self, listener, msgClass):
+        if listener not in self.listeners:
+            self.listeners[listener] = {}
+
+        amTypes = self.listeners[listener]
+        amTypes[msgClass.get_amType()] = msgClass
+
+    def removeListener(self, listener):
+        del self.listeners[listener]
+
+    def dispatchPacket(self, source, packet):
+        (addr, amType, group, length) = struct.unpack("<HBBB", packet[0:5])
+        msgData = packet[5:]
+
+        #print (addr, amType, group, length)
+
+        for l in self.listeners:
+            amTypes = self.listeners[l]
+            if amType in amTypes:
+                msgClass = amTypes[amType]
+                msg = msgClass(msgData)
+
+                l.receive(source, msg)
diff --git a/support/sdk/python/tinyos/packet/PacketSource.py b/support/sdk/python/tinyos/packet/PacketSource.py
new file mode 100644
index 00000000..4b785e4e
--- /dev/null
+++ b/support/sdk/python/tinyos/packet/PacketSource.py
@@ -0,0 +1,132 @@
+#
+# Copyright (c) 2005-2006
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland <mainland@eecs.harvard.edu>
+#
+import signal
+import sys
+import traceback
+
+from IO import *
+from ThreadTask import *
+
+DEBUG = False
+
+runner = ThreadTaskRunner()
+
+def finishAll():
+    global runner
+
+    runner.cancelAll()
+    runner.finish()
+
+class PacketSourceException(Exception):
+    def __init__(self, *args):
+        self.args = args
+
+class PacketSource(ThreadTask):
+    def __init__(self, dispatcher):
+        global runner
+        ThreadTask.__init__(self, runner)
+        self.dispatcher = dispatcher
+
+    def __call__(self):
+        try:
+            self.open()
+        except Exception, x:
+            if DEBUG:
+                print "Exception while opening packet source:"
+                print x
+                print traceback.print_tb(sys.exc_info()[2])
+            self.done = True
+        except:
+            if DEBUG:
+                print "Unknown exception while opening packet source"
+            self.done = True
+
+        while not self.isDone():
+            try:
+                packet = self.readPacket()
+            except IODone:
+                if DEBUG:
+                    print "IO finished"
+                break
+            except Exception, x:
+                if DEBUG:
+                    print "IO exception:"
+                    print x
+                    print traceback.print_tb(sys.exc_info()[2])
+                break
+            except:
+                if DEBUG:
+                    print "Unknown IO exception"
+                break
+
+            if packet:
+                try:
+#                     print "About to run packet dispatcher!"
+#                     for i in packet:
+#                         print ord(i)," ",
+#                     print
+
+                    self.dispatcher.dispatchPacket(self, packet)
+                except Exception, x:
+                    if DEBUG:
+                        print "Exception when dispatching packet:"
+                        print x
+                        print traceback.print_tb(sys.exc_info()[2])
+#                    break
+                except:
+                    if DEBUG:
+                        print "Unknown exception when dispatching packet"
+#                    break
+
+        try:
+            self.close()
+        except:
+            pass
+
+        self.finish()
+
+    def start(self):
+        global runner
+
+        runner.start(self)
+
+    def open(self):
+        pass
+
+    def close(self):
+        pass
+
+    def readPacket(self):
+        return None
+
+    def writePacket(self, packet):
+        pass
+
diff --git a/support/sdk/python/tinyos/packet/Platform.py b/support/sdk/python/tinyos/packet/Platform.py
new file mode 100644
index 00000000..66df0cc3
--- /dev/null
+++ b/support/sdk/python/tinyos/packet/Platform.py
@@ -0,0 +1,89 @@
+#
+# Copyright (c) 2006
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland <mainland@eecs.harvard.edu>
+#
+import re
+import socket
+import sys
+import traceback
+
+DEBUG = False
+
+PLATFORMS = {"mica": ("avrmote", 1, 19200),
+             "mica2dot": ("avrmote", 1, 19200),
+             "mica2": ("avrmote", 1, 57600),
+             "telos": ("telos", 2, 57600),
+             "tmote": ("telos", 2, 57600),
+             "micaz": ("avrmote", 3, 57600),
+             "eyes": ("eyes", 4, 19200)}
+
+ID_AVRMOTE = 1
+ID_TELOS = 2
+ID_MICAZ = 3
+ID_EYES = 4
+
+DEFAULT_BAUD = 19200
+
+class UnknownPlatform(Exception):
+    pass
+
+def baud_from_name(name):
+    try:
+        return PLATFORMS[name][2]
+    except:
+        raise UnknownPlatform()
+
+def default_factory():
+    return factory_from_platform("avrmote")
+
+def factory_from_name(name):
+    try:
+        return factory_from_platform(PLATFORMS[name][0])
+    except:
+        raise UnknownPlatform()
+
+def factory_from_id(i):
+    if i == ID_AVRMOTE:
+        return factory_from_platform("avrmote")
+    elif i == ID_TELOS:
+        return factory_from_platform("telos")
+    elif i == ID_MICAZ:
+        return factory_from_platform("avrmote")
+    else:
+        raise UnknownPlatform()
+
+def factory_from_platform(platform):
+    try:
+        mod = __import__("tinyos.packet.%s" % platform)
+        return mod.packet.__dict__[platform].TOS_Msg
+    except Exception, x:
+        if DEBUG:
+            print >>sys.stderr, x
+            print >>sys.stderr, traceback.print_tb(sys.exc_info()[2])
+        raise UnknownPlatform()
diff --git a/support/sdk/python/tinyos/packet/SFProtocol.py b/support/sdk/python/tinyos/packet/SFProtocol.py
new file mode 100644
index 00000000..831cea4a
--- /dev/null
+++ b/support/sdk/python/tinyos/packet/SFProtocol.py
@@ -0,0 +1,77 @@
+#
+# Copyright (c) 2005-2006
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland <mainland@eecs.harvard.edu>
+#
+VERSION = "U"
+SUBVERSION = " "
+
+PLATFORM_UNKNOWN = 0
+
+class SFProtocolException(Exception):
+    def __init__(self, *args):
+        self.args = args
+
+class SFProtocol:
+    def __init__(self, ins, outs):
+        self.ins = ins
+        self.outs = outs
+        self.platform = None
+
+    def open(self):
+        self.outs.write(VERSION + SUBVERSION)
+        partner = self.ins.read(2)
+        if partner[0] != VERSION:
+            print "SFProtocol : version error"
+            raise SFProtocolException("protocol version error")
+
+	# Actual version is min received vs our version
+        # ourversion = partner[1] & 0xff
+        
+        if self.platform == None:
+            self.platform = PLATFORM_UNKNOWN
+
+        # In tinyox-1.x, we then exchanged platform information
+
+        # the tinyos-2.x serial forwarder doesn't do that, so the
+        # connection is all set up at this point.
+
+
+    def readPacket(self):
+        size = self.ins.read(1)
+        packet = self.ins.read(ord(size))
+        return packet
+
+    def writePacket(self, packet):
+        if len(packet) > 255:
+            raise SFProtocolException("packet too long")
+
+        self.outs.write(chr(len(packet)))
+        self.outs.write(packet)
+        self.outs.flush()
+        
diff --git a/support/sdk/python/tinyos/packet/SFSource.py b/support/sdk/python/tinyos/packet/SFSource.py
new file mode 100644
index 00000000..90154015
--- /dev/null
+++ b/support/sdk/python/tinyos/packet/SFSource.py
@@ -0,0 +1,69 @@
+#
+# Copyright (c) 2005-2006
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland <mainland@eecs.harvard.edu>
+#
+import re
+import socket
+
+from PacketSource import *
+from Platform import *
+from SFProtocol import *
+from SocketIO import *
+
+class SFSource(PacketSource):
+    def __init__(self, dispatcher, args):
+        PacketSource.__init__(self, dispatcher)
+
+        m = re.match(r'(.*):(.*)', args)
+        if m == None:
+            raise PacketSourceException("bad arguments")
+
+        (host, port) = m.groups()
+        port = int(port)
+
+        self.io = SocketIO(host, port)
+        self.prot = SFProtocol(self.io, self.io)
+
+    def cancel(self):
+        self.done = True
+        self.io.cancel()
+
+    def open(self):
+        self.io.open()
+        self.prot.open()
+        PacketSource.open(self)
+
+    def close(self):
+        self.io.close()
+
+    def readPacket(self):
+        return self.prot.readPacket()
+
+    def writePacket(self, packet):
+        self.prot.writePacket(packet)
diff --git a/support/sdk/python/tinyos/packet/Serial.py b/support/sdk/python/tinyos/packet/Serial.py
new file mode 100644
index 00000000..27ae1f10
--- /dev/null
+++ b/support/sdk/python/tinyos/packet/Serial.py
@@ -0,0 +1,18 @@
+ #
+ # This class is automatically generated by ncg. DO NOT EDIT THIS FILE.
+ # This class includes values of some nesC constants from
+ # /opt/tinyos-2.x/tos/lib/serial/Serial.h.
+ #/
+
+class Serial:
+    HDLC_CTLESC_BYTE = 125
+    SERIAL_PROTO_ACK = 67
+    TOS_SERIAL_802_15_4_ID = 2
+    SERIAL_PROTO_PACKET_UNKNOWN = 255
+    SERIAL_PROTO_PACKET_NOACK = 69
+    TOS_SERIAL_CC1000_ID = 1
+    HDLC_FLAG_BYTE = 126
+    TOS_SERIAL_ACTIVE_MESSAGE_ID = 0
+    SERIAL_PROTO_PACKET_ACK = 68
+    TOS_SERIAL_UNKNOWN_ID = 255
+
diff --git a/support/sdk/python/tinyos/packet/SocketIO.py b/support/sdk/python/tinyos/packet/SocketIO.py
new file mode 100644
index 00000000..f9280217
--- /dev/null
+++ b/support/sdk/python/tinyos/packet/SocketIO.py
@@ -0,0 +1,80 @@
+#
+# Copyright (c) 2005
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland <mainland@eecs.harvard.edu>
+#
+import socket
+
+from IO import *
+
+class SocketIO(IO):
+    def __init__(self, host, port):
+        IO.__init__(self)
+
+        self.done = False
+
+        self.host = host
+        self.port = port
+
+        self.socket = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
+        self.socket.setsockopt(socket.IPPROTO_TCP,
+                               socket.TCP_NODELAY,
+                               1)
+        self.socket.settimeout(1)
+        self.socket.bind(("", 0))
+
+    def cancel(self):
+        self.done = True
+
+    def open(self):
+        print "SocketIO: Connecting socket to "+str(self.host)+":"+str(self.port)
+        self.socket.connect((self.host, self.port))
+        self.socket.settimeout(1)
+
+    def close(self):
+        self.socket.close()
+        self.socket = None
+
+    def read(self, count):
+        data = ""
+        while count - len(data) > 0:
+            if self.isDone():
+                raise IODone()
+
+            try:
+                data += self.socket.recv(count - len(data))
+            except:
+                pass
+
+        return data
+
+    def write(self, data):
+        return self.socket.send(data)
+
+    def flush(self):
+        pass
diff --git a/support/sdk/python/tinyos/packet/ThreadTask.py b/support/sdk/python/tinyos/packet/ThreadTask.py
new file mode 100644
index 00000000..5f1360ff
--- /dev/null
+++ b/support/sdk/python/tinyos/packet/ThreadTask.py
@@ -0,0 +1,91 @@
+#
+# Copyright (c) 2005
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland <mainland@eecs.harvard.edu>
+#
+import threading
+import time
+
+class ThreadTask:
+    def __init__(self, runner):
+        self.done = False
+        self.runner = runner
+
+        runner.add(self)
+
+    def isDone(self):
+        return self.done
+
+    def cancel(self):
+        self.done = True
+
+    def finish(self):
+        self.runner.remove(self)
+
+class ThreadTaskRunner:
+    def __init__(self):
+        self.taskList = []
+        self.taskListLock = threading.Lock()
+
+    def add(self, task):
+        self.taskListLock.acquire()
+        self.taskList = [task] + self.taskList
+        self.taskListLock.release()
+
+    def remove(self, task):
+        self.taskListLock.acquire()
+        self.taskList.remove(task)
+        self.taskListLock.release()
+
+    def start(self, task):
+        thread = threading.Thread(None, task)
+        thread.start()
+
+    def cancelAll(self):
+        self.taskListLock.acquire()
+
+        for t in self.taskList:
+            try:
+                t.cancel()
+            except:
+                pass
+
+        self.taskListLock.release()
+
+    def finish(self):
+        try:
+            self.taskListLock.acquire()
+
+            while len(self.taskList) != 0:
+                self.taskListLock.release()
+                time.sleep(0.2)
+                self.taskListLock.acquire()
+
+            self.taskListLock.release()
+        except:
+            pass
diff --git a/support/sdk/python/tinyos/packet/__init__.py b/support/sdk/python/tinyos/packet/__init__.py
new file mode 100644
index 00000000..9b5c173d
--- /dev/null
+++ b/support/sdk/python/tinyos/packet/__init__.py
@@ -0,0 +1,33 @@
+#
+# Copyright (c) 2005
+#      The President and Fellows of Harvard College.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+# 3. Neither the name of the University nor the names of its contributors
+#    may be used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# Author: Geoffrey Mainland <mainland@eecs.harvard.edu>
+#
+__all__ = ["PacketDispatcher", "PacketSource", "Packetizer",
+           "SFProtocol", "SFSource", "ThreadTask",
+           "avrmote", "micaz", "telos"]
diff --git a/support/sdk/python/tinyos/tossim/TossimApp.py b/support/sdk/python/tinyos/tossim/TossimApp.py
new file mode 100644
index 00000000..b989de14
--- /dev/null
+++ b/support/sdk/python/tinyos/tossim/TossimApp.py
@@ -0,0 +1,507 @@
+# Copyright (c) 2000-2003 The Regents of the University of California.
+# Copyright (c) 2005 Stanford University. 
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of the copyright holders nor the names of
+#   its contributors may be used to endorse or promote products derived
+#   from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+# THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# @author Kamin Whitehouse 
+# @author Philip Levis
+
+from tinyos.tossim.TossimNescDecls import *
+
+class NescVariables(object) :
+  def __init__( self, applicationName="Unknown App", xmlFilename=None ) :
+    self.applicationName = applicationName
+    self._varNames = []
+    self._vars = []
+
+    dom = minidom.parse(xmlFilename)
+    variableList = [node for node in dom.getElementsByTagName("variables")]
+    while len(variableList) > 0:
+      variables = variableList.pop(0).getElementsByTagName("variable")
+      while len(variables) > 0:
+        cVariable = 0
+        isArray = 0
+
+        variable = variables.pop(0)
+        name = variable.getAttribute("name")
+        component = variable.getElementsByTagName("component-ref")
+
+        if (len(component) > 0):
+          name = component[0].getAttribute("qname") + "." + name
+        else:  # It's in a C file
+          cVariable = 1
+          fileName = variable.getAttribute("loc")
+          index = fileName.rfind("/") # First check for a UNIX path
+          if (index == -1):
+            index = fileName.rfind("\\") # Then a windows path
+            if (index == -1):
+              index = fileName.rfind(":") # Then if it's in the local dir
+
+          if (index != -1):
+            fileName = fileName[index+1:]
+            index = fileName.rfind(".")
+            if (index != -1):
+              fileName = fileName[0:index]
+              name = fileName + "." + name
+
+        varType = "unknown"
+        varTypes = variable.getElementsByTagName("type-float")
+        if (len(varTypes) == 0):
+          varTypes = variable.getElementsByTagName("type-int")
+
+        if (len(variable.getElementsByTagName("type-array")) > 0):
+          isArray = 1
+          
+        if (len(varTypes) > 0):
+          varTypeEntry = varTypes[0]
+          varType = varTypeEntry.getAttribute("cname")
+
+        if (cVariable == 0):
+          self._varNames.append(str(name))
+          self._vars.append(str(name))
+          if (isArray):
+            self._vars.append("array")
+          else:
+            self._vars.append("simple")
+          self._vars.append(str(varType))
+             
+  def __str__(self) :
+    """ Print all available variables."""
+    string = "\n"
+    name = 1
+    for val in self._varNames :
+      if (name):
+        string += "\t" + val
+        name = 0
+      else:
+        string += ": " + val + "\n"
+        name = 1
+        
+    return string
+     
+  def variables(self):
+    return self._vars
+  
+
+class NescTypes( object ) :
+  """A class that holds all types defined in a specific nesc application.
+
+  usage:
+  myTypes = NescTypes('/path/to/nescDecls.xml')
+  print myTypes
+  var = myTypes.typeName
+  """
+  def __init__( self, applicationName="Unknown App", xmlFilename = None) :
+    self.applicationName = applicationName
+    self._typeNames = []
+    self._types = {}
+    #figure out the sizes of all the basic types for this platform (by scanning the xml file)
+    platformTypes = {}
+    typeRE = re.compile('cname=\"([\w\s]+?)\" size=\"I:(\d+?)\"')
+    infile = open(xmlFilename, 'r')
+    for line in infile :
+      match = typeRE.search(line)
+      if match != None:
+        platformTypes[match.groups()[0]] = int(match.groups()[1])      
+    #define all the basic types
+    self.addType(
+      nescType("uint8_t", "unsigned char", "int", "type-int", "B",1,0))
+    self.addType(
+      nescType("int8_t", "signed char", "int", "type-int", "b", 1, 0))
+    if (platformTypes.has_key("int") and platformTypes["int"] == 4) or \
+       (platformTypes.has_key("unsigned int") and platformTypes["unsigned int"] == 4) :
+      self.addType(
+        nescType("uint16_t", "unsigned short", "int", "type-int", "H", 2, 0))
+      self.addType(
+        nescType("int16_t", "short", "int", "type-int", "h", 2, 0))
+      self.addType(
+        nescType("uint32_t", "unsigned int", "int", "type-int", "L",4,0))
+      self.addType(
+        nescType("int32_t", "int", "int", "type-int", "L", 4, 0))
+      self.addType(
+        nescType("unsigned long", "unsigned long", "int", "type-int", "L",4,0))
+      self.addType(
+        nescType("long", "long", "int", "type-int", "l", 4, 0))
+    else : #int is 2 bytes long (the default)
+      self.addType(
+        nescType("unsigned short", "unsigned short", "int", "type-int", "H", 2, 0))
+      self.addType(
+        nescType("short", "short", "int", "type-int", "h", 2, 0))
+      self.addType(
+        nescType("uint16_t", "unsigned int", "int", "type-int", "H", 2, 0))
+      self.addType(
+        nescType("int16_t", "int", "int", "type-int", "h", 2, 0))
+      self.addType(
+        nescType("uint32_t", "unsigned long", "int", "type-int", "L",4,0))
+      self.addType(
+        nescType("int32_t", "long", "int", "type-int", "l", 4, 0))
+    self.addType(
+      nescType("int64_t", "long long", "long", "type-int", "q", 8, 0))
+    self.addType(
+      nescType("uint64_t", "unsigned long long", "long", "type-int", "Q", 8, 0))
+    self.addType(
+      nescType("float", "float", "float", "type-float", "f", 4, 0))
+    if platformTypes.has_key("double") and platformTypes["double"] == 8 :
+      self.addType(
+        nescType("double", "double", "float", "type-float", "d", 8, 0))
+    else : #double is 4 bytes (the default)
+      self.addType(
+        nescType("double", "double", "float", "type-float", "f", 4, 0))
+    self.addType(
+      nescType("char", "char", "str", "type-int", "c", 1, '\x00'))
+    self.addType(
+      nescType("void", "void", "", "type-void", "", 0, ''))
+
+    #some arrays for error reporting:
+    self.unknownStructs = []
+    self.anonymousStructs = []
+    self.anonymousRefStructs = []
+    self.undefinedTypes = []
+    self.createTypesFromXml(xmlFilename)
+    self._typeNames.sort()
+    #self.printSkippedTypes()
+  
+  def addType(self, value) :
+    if not value.nescType in self._typeNames :
+      self._typeNames.append(value.nescType)
+    self._types[value.nescType] = value #XXX: why does this have to be unconditional??
+    if not self._types.has_key(value.cType):
+      self._types[value.cType] = value
+      self._typeNames.append(value.cType)
+    
+  def __getattr__(self, name) :
+    if name in self._typeNames :
+      return deepcopy(self._types[name])
+    else:
+      raise AttributeError("No type \"%s\" defined" % name)
+  
+  def __getitem__(self, key) :
+    if key in self._typeNames :
+      return deepcopy(self._types[key])
+    else:
+      raise AttributeError("No type \"%s\" defined" % key)
+
+  def __repr__(self) :
+    return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+    
+  def __str__(self) :
+    """ Print all available types."""
+    string = "\n"
+    for t in self._typeNames :
+      string += "\t%s\n" % t
+    return string
+    
+  def createTypesFromXml(self, xmlFilename) :
+    """Go through the struct and typedef elements in the nescDecls.xml file"""
+    
+    dom = minidom.parse(xmlFilename)
+    typeDefs = [node for node in dom.getElementsByTagName("struct")]
+    for node in dom.getElementsByTagName("typedef") :
+      typeDefs.append(node)
+    
+    numSkipped = 0
+
+    #keep going through the queue until it is empty
+    while len(typeDefs) > 0:
+      typeDef = typeDefs.pop(0)
+
+      #if this is a typedef, see if the value is there
+      if typeDef.tagName == "typedef" :
+        value = typeDef.getAttribute("value")
+        name = typeDef.getAttribute("name")
+        #if the real value exists and typedef doesn't already exist, copy and rename original
+        if self._types.has_key(value) :
+          newType = deepcopy(self._types[value])
+          newType.nescType = name
+          self.addType(newType)
+          numSkipped=0
+        else :
+          #try again later
+          typeDefs.append(typeDef)
+          numSkipped += 1
+          
+      else :
+        #if all types within the struct are already defined, it can be defined
+        try :
+          self.addType(nescStruct(self, typeDef ) )
+          numSkipped=0
+
+        except Exception, e:
+          if len(e.args) > 0 and e.args[0] == "Undefined struct":
+            #otherwise, put it back in the queue and move on to the next one
+            typeDefs.append(typeDef)
+            numSkipped += 1
+          elif len(e.args) > 0 and e.args[0] == "Anonymous struct" :
+            self.anonymousStructs.append(typeDef)
+          elif len(e.args) > 0 and e.args[0] == "Anonymous struct reference" :
+            self.anonymousRefStructs.append( (typeDef, e.args[1]) )
+          elif len(e.args) > 0 and e.args[0] == "Unknown type" :
+            self.unknownStructs.append( (typeDef, e.args[1]) )
+          else :
+            #if it's an unknown exception, reraise it
+            raise
+      
+      #make sure we are not cycling endlessly
+      if numSkipped >= len(typeDefs) > 0:
+        self.undefinedTypes = typeDefs
+        break
+
+  def printSkippedTypes(self):
+    err = ""
+    if len(self.anonymousStructs) >0 :
+      err += "\nWarning: %d structs were anonymous." % len(self.anonymousStructs)
+#        for struc in anonymousStructs :
+#            err += "\t%s\n" % struc.getAttribute("ref")
+    if len(self.anonymousRefStructs) >0 :
+      err += "\nWarning: The following structs referenced anonymous structs:\n"
+      for pair in self.anonymousRefStructs :
+        err += "\t%s\n" % pair[0].getAttribute("name")
+    if len(self.undefinedTypes) >0 :
+      err += "\nWarning: The following types are ill-defined or had circular dependencies:\n"
+      for struc in self.undefinedTypes :
+        err += "\t%s\n" % struc.getAttribute("name")
+    if len(self.unknownStructs) >0 :
+      err += "\nWarning: The following structs had unknown xml types:\n"
+      for pair in self.unknownStructs :
+        err += "\t%s (%s)\n" % (pair[0].getAttribute("name"),
+                                pair[1].tagName )
+    if len(err) > 0 : print err
+    
+  def getTypeFromXML(self, xmlDefinition) :
+    """Find the type name value given an xml definition.
+    If it is an array or pointer, define the new type here."""
+
+    #first, see if the tag is type or if child is type
+    if xmlDefinition.tagName.find("type-") < 0 or \
+           xmlDefinition.tagName.find("type-qualified") >= 0 :
+      foundType = 0
+      childNodes = [node for node in xmlDefinition.childNodes
+                    if node.nodeType == 1]
+      for tag in childNodes :
+        if tag.tagName.find("type-") >= 0 :
+          foundType += 1
+          typeTag = tag
+      if foundType < 1 :
+        raise Exception("No type tag found")
+      if foundType > 1 :
+        raise Exception("Too many type tags found")
+      else :
+        return self.getTypeFromXML(typeTag)
+
+    #now check all the existing types to see if it is one of them
+    for val in self._typeNames :
+      typeObj = self._types[val]
+      if typeObj.isType(xmlDefinition) :
+        return deepcopy(typeObj)
+
+    #if the type doesn't already exist, try creating a new one
+    try :
+      return nescArray(self, xmlDefinition)
+    except Exception, e:
+        if len(e.args) <= 0 or e.args[0] != "Not array definition":
+          raise
+    try :
+      return nescPointer(self, xmlDefinition)
+    except Exception, e:
+        if len(e.args) <= 0 or e.args[0] != "Not pointer definition":
+          raise
+      
+    #it is not a simple type, array, or pointer,
+    #so it must be a yet undefined struct
+    child = getUniqueChild(xmlDefinition)
+    if ( xmlDefinition.tagName == "type-tag" and child != None and
+         child.tagName == "struct-ref" ):
+         if child.hasAttribute("name"):
+             raise Exception("Undefined struct")
+         else :
+             raise Exception("Anonymous struct reference", child)
+    else:
+      #otherwise, raise an exception
+      #(but first make sure the right kind of unknown type is displayed)
+      if  xmlDefinition.tagName == "type-tag":
+          xmlDefinition = child
+      raise Exception("Unknown type", xmlDefinition)
+
+class NescEnums( object ) :
+  """A class that holds all enums defined in a specific nesc application.
+
+  usage:
+  myEnums = NescEnums('/path/to/nescDecls.xml')
+  print myEnums
+  var = myEnums.enumName
+  """
+
+  def __init__( self, applicationName="Unknown App", xmlFilename = None ) :
+    self.applicationName = applicationName
+    self._enums = []
+    if type(xmlFilename) == str:
+      xmlFilename = minidom.parse(xmlFilename)
+
+    self.createEnumsFromXml(xmlFilename)
+
+  def __getitem__(self, key) :
+    if key in self._enums :
+      return self.__dict__[key]
+    else:
+      raise AttributeError("No such enum defined")
+      
+  def createEnumsFromXml(self, dom) :
+
+    #now define all the struct types
+    enumDefs = [node for node in dom.getElementsByTagName("enum")]
+    integer = re.compile('^I:(\d+)$')
+    hexidecimal = re.compile('^(0x[\dabcdefABCDEF]+)$')
+    
+    for enumDef in enumDefs :
+      name = enumDef.getAttribute("name")
+      if name in self._enums :
+        continue
+      value = enumDef.getAttribute("value")
+      match = integer.match(value)
+      if match != None :
+        self.__dict__[name] = int(match.groups()[0])
+      else :
+        match = hexidecimal.match(value)
+        if match != None :
+          self.__dict__[name] = int(match.groups()[0], 16)
+        else :
+          self.__dict__[name] = value
+      self._enums.append(name)
+      
+    namedEnums = [node for node in dom.getElementsByTagName("namedEnum")]
+    for namedEnum in namedEnums :
+      name = namedEnum.getAttribute("name")
+      self.__dict__[name] = NescEnums(namedEnum,name)
+      self._enums.append(name)
+    
+  def __repr__(self) :
+    return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+  
+  def __str__(self) :
+    """ Print all available enums."""
+    string = "\n"
+    for key in self._enums :
+      string += "\t%s = %s\n" % (key, str(self[key]))
+    return string
+    
+
+class NescMsgs( object ) :
+  """A class that holds all msgs defined in a specific nesc application.
+  It assumes a struct is a message if AM_STRUCTNAME is defined.
+
+  usage:
+  myMsgs = NescMsgs(myTypes, myEnums[, applicationName])
+  print myMsgs
+  var = myMsgs.msgName
+  """
+  def __init__( self, types, enums, applicationName="Unknown App" ) :
+    self.applicationName = applicationName
+    msgTypes = [enum for enum in enums._enums if enum.find("AM_") ==0]
+    name = re.compile("^AM_(\w+)$")
+    self._msgNames = []
+    self._msgs = {}
+    for msgType in msgTypes :
+      if type(enums[msgType]) == int:
+        msgName = name.match(msgType)
+        if msgName != None :
+          msgName = msgName.groups()[0]
+        for key in types._typeNames :
+          if key.lower() == msgName.lower() :
+            msg = TosMsg(enums[msgType], types[key])
+            self._msgs[key] = msg
+            self._msgNames.append(key)
+            break
+
+  def __getattr__(self, name) :
+    if name in self._msgNames :
+      return deepcopy(self._msgs[name])
+    else:
+      raise AttributeError("No such message defined")
+  
+  def __getitem__(self, key) :
+    if key in self._msgNames :
+      return deepcopy(self._msgs[key])
+    else:
+      raise AttributeError("No such message defined")
+      
+  def __repr__(self) :
+    return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+  
+  def __str__(self) :
+    """ Print all available msgs."""
+    string = "\n"
+    for key in self._msgNames :
+      string += "\t%5d : %s\n" % (self._msgs[key].amType, key)
+    return string
+    
+
+class NescApp( object ) :
+  """A class that holds all types, enums, msgs, rpc commands and ram
+  symbol definitions as defined for a specific nesc application.
+
+  usage:
+  myApp = nescApp('/path/to/nescDecls.xml')
+  print myApp
+  var = myApp.enums.enumName
+  var = myApp.types.typeName
+  """
+  def __init__( self, applicationName="Unknown App", xmlFile="app.xml" ) :
+    """This function creates the NescEnums, NescTypes, and NescMsgs
+    objects for a particular application."""
+    
+    #first, import all enums, types, msgs, rpc functions, and ram symbols
+    self.applicationName = applicationName
+    self.xmlFile = xmlFile
+    
+    # Check for the nescDecls.xml file
+    if not os.path.isfile(xmlFile):
+      raise Exception("""\nERROR: cannot find file \"%s\".
+
+Your nesC app cannot be imported.  Be sure that you compiled with the \"nescDecls\" option.\n\n""" % xmlFile)
+
+    # Import enums, types, and msgs
+    self.enums = NescEnums(applicationName, xmlFile)
+    self.types = NescTypes(applicationName, xmlFile)
+    self.variables = NescVariables(applicationName, xmlFile)
+    self.messages = NescMsgs(self.types, self.enums, applicationName)
+
+  def __repr__(self) :
+    return "%s object at %s:\n\n%s" % (self.__class__, hex(id(self)), str(self))
+  
+  def __str__(self) :
+    """ Print all application declarations."""
+    string = "%20s : %d\n" % ("Enums", len(self.enums._enums))
+    string += "%20s : %d\n" % ("Types", len(self.types._types))
+    string += "%20s : %d\n" % ("Messages", len(self.messages._msgNames))
+    string += "%20s : %d\n" % ("Variables", len(self.variables._varNames))
+    return string
+
+  def configureTossim(self):
+    for var in variables:
+      Mote.var
diff --git a/support/sdk/python/tinyos/tossim/TossimNescDecls.py b/support/sdk/python/tinyos/tossim/TossimNescDecls.py
new file mode 100644
index 00000000..6bd9f6be
--- /dev/null
+++ b/support/sdk/python/tinyos/tossim/TossimNescDecls.py
@@ -0,0 +1,782 @@
+# Copyright (c) 2000-2003 The Regents of the University of California.  
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of the copyright holders nor the names of
+#   its contributors may be used to endorse or promote products derived
+#   from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+# THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# @author Kamin Whitehouse 
+#
+
+import sys, string, math, re, os
+from struct import *
+from xml.dom import minidom
+from copy import deepcopy
+
+###########
+# This class can be used to hold a basic nesc type, eg uint8_t It can
+# be set and get through nescType.value, and does type checking
+# 
+###########
+
+def findBuildFile(givenString, desiredFilename) :
+  """This function will find a desiredFilename (eg. nescDecls.xml) the build directory
+  from a givenString (e.g 'build/pc').  Legal givenStrings are:
+  1.  Full path,     eg: /home/kamin/tinyos-1.x/...
+  2.  relative path, eg: apps/TestRpc/build/pc
+  3.  platform name, eg: pc or telosb
+  """
+
+  #check to see if the given string contains the desiredFilename
+  if givenString.find(desiredFilename) >= 0 :
+    filename = givenString
+
+  #then check to see if it is an absolute or relative path
+  elif givenString.find('/') >= 0 :
+    filename = givenString + desiredFilename
+
+  #then check to see if it is just the platform name
+  elif len(givenString) > 0:
+    filename = 'build/' + givenString + '/' + desiredFilename
+
+  #check if a default platform environment variable is defined
+  elif os.environ.has_key("TINYOS_DEFAULT_PLATFORM") :
+    filename = 'build/' + os.environ["TINYOS_DEFAULT_PLATFORM"] + '/' + desiredFilename
+
+  #otherwise, assume the file is in './'
+  else :
+    filename = desiredFilename
+    
+  #check to see if the file was successfully found
+  if not os.path.isfile(filename) :
+    raise IOError("File %s not found" % filename)
+  return filename
+
+  
+class nescType( object ) :
+  """A python representation of a nesc type.
+
+  usage:
+  X = nescType.value
+  nescType.value = X
+  bytes = nescType.getBytes()
+  nescType.setBytes(bytes)
+  nescType
+  print nescType
+  """
+
+  def __init__( self , nescType, cType, pythonType, xmlTag,
+                conversionString, size, defaultValue) :
+    """create a new nescType"""
+    self.nescType = nescType
+    self.cType = cType
+    self.pythonType = pythonType
+    self._xmlTag = xmlTag
+    self.size = size
+    self._conversionString = conversionString
+    self.value = defaultValue
+
+  def __repr__(self) :
+    return "%s object at %s:\n\n%20s : %s" % (self.__class__, hex(id(self)), "value", str(self))
+
+  def __str__(self) :
+    if self._conversionString == "c" :
+        return "'" + str(self.value) + "'"
+    else :
+        return str(self.value)
+
+  #   this func could be used for type checking 
+  def __setattr__(self, name, value) :
+    if self.__dict__.has_key("value") and name == "value":
+        #use the type conversions built into pack
+        pack(self._conversionString, value)
+    self.__dict__[name] = value
+
+  def oneLineStr(self) :
+    return str(self)
+
+  def __deepcopy__(self, memo={}) :
+    result = nescType(self.nescType, self.cType, self.pythonType,
+                    self._xmlTag, self._conversionString, self.size,
+                    deepcopy(self.value, memo))
+    memo[id(self)] = result
+    return result
+  
+  def isType(self, xmlDefinition) :
+    """returns 1 if the xml definition describes this type.
+    Returns 0 otherwise."""
+    if xmlDefinition != None and xmlDefinition.tagName == self._xmlTag and \
+           xmlDefinition.hasAttribute("cname") and \
+           xmlDefinition.getAttribute("cname") == self.cType :
+      return 1
+    elif self.nescType == "void" and xmlDefinition.tagName == self._xmlTag :
+      #void is a special xml case that doesn't have cname defined (grr)
+      return 1
+    else :
+      return 0
+  
+  def getBytes(self) :
+    """Hexidecimal representation of a value of this type"""
+    if self.nescType == "void" :
+      return ''
+    try:
+      bytes = pack(self._conversionString, self.value)
+    except Exception, inst:
+      print inst
+      raise Exception("Bytes conversion error: %s %d bytes to %d" %
+                      (self.nescType, len(bytes), self.size) )
+    if len(bytes) != self.size:
+      raise Exception("Wrong number of bytes for conversion: %s %d bytes to %d" %
+                      (self.nescType, len(bytes), self.size))
+    return bytes
+  
+  def setBytes(self, bytes):
+    """A value of this type from a hexidecimal representation"""
+    if self.nescType == "void" :
+      return bytes
+    if len(bytes) < self.size:
+      raise Exception("Wrong number of bytes for conversion: %s %d bytes to %d" %
+                      (self.nescType, len(bytes), self.size))
+    try:
+      self.value, = unpack( self._conversionString, bytes[:self.size])
+    except Exception, inst:
+      print inst
+      raise Exception("Bytes conversion error: %s %d bytes to %d" %
+                      ( self.nescType, len(bytes), self.size) )
+    return bytes[self.size:]
+
+###########
+# Array of basic nesc types,
+###########
+
+class nescArray( object ) :
+  """A python representation of a nesc array.
+
+  usage:
+  array = nescArray(size, nescType)
+  array = nescArray(myTypes, xmlDecl)
+  X = array[3]
+  X = array[3:6] (returns a list or, if char[] array, a python string)
+  array[3] = X
+  array[3:6] [X,Y,Z] (or, if char[], \"foo\")
+  bytes = array.getBytes()
+  array.setBytes(bytes)
+  array
+  print array
+  """
+
+  def __init__( self , *varargs) :
+    """initialize all elements to 0"""
+    if len(varargs) == 0 :
+      return
+    elif len(varargs) == 2 and type(varargs[0]) == int :
+      (self.len,self.elementType) = varargs[:]
+      bracketStr = "[" + str(self.len) + "]"
+    elif len(varargs) == 2 :
+      (nescTypes, xmlDefinition) = varargs[:]
+      if xmlDefinition.tagName != "type-array" :
+        raise Exception("Not array definition")
+      child = getUniqueChild(xmlDefinition)
+      self.elementType = nescTypes.getTypeFromXML(child)
+      sizeStr = xmlDefinition.getAttribute("elements")[2:]
+      self.len = int(sizeStr)
+      bracketStr = "[" + sizeStr + "]"
+    else :
+      raise Exception("Illegal array params")
+    self.nescType = self.elementType.nescType + bracketStr
+    self.cType = self.elementType.cType + bracketStr
+    self.pythonType = self.elementType.pythonType + bracketStr
+    self.size = self.len * self.elementType.size
+    self.value = []
+    for i in range(self.len):
+      self.value.append(deepcopy(self.elementType))
+      
+
+  def __repr__(self) :
+    """A printable representation of the value"""
+    return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+    
+  def __str__(self) :
+    """A printable representation of the value"""
+    string = "nescArray of type %s:\n" % self.nescType
+#     if self.elementType._conversionString == "c":
+#       string += self.oneLineStr()
+#     else:
+    for i in range(self.len) :
+      string += "%2d: %s\n" % (i, self.value[i].oneLineStr())
+    return string
+
+  def __getitem__(self, key) :
+      if self.elementType.__class__ == nescType :
+          if key.__class__ == slice:
+              if self.elementType._conversionString == "c":
+                  string = ""
+                  for item in self.value.__getitem__(key) :
+                      string += item.value
+                  return string
+              else:
+                  return [item.value for item in self.value.__getitem__(key)]
+          else:
+              return self.value.__getitem__(key).value
+      else:
+          return self.value.__getitem__(key)
+      
+  def __setitem__(self, key, value) : 
+      if self.elementType.__class__ == nescType :
+        if key.__class__ == slice:
+            i=0;
+            for item in self.value.__getitem__(key) :
+                item.value = value[i]
+                i += 1
+        else:
+            self.value.__getitem__(key).value = value
+      else :
+          self.value.__setitem__(key, value)
+
+  def __delitem__(self, key) : 
+      return self.value.__delitem__(key)
+
+  def oneLineStr(self) :
+    """A one-line representation of the value"""
+    #maybe the string should just print like a string
+    #but the \x00 chars look like nothing
+#     if self.elementType._conversionString == "c":
+#       string = '\''
+#       for c in self.value :
+#         string += c.value
+#       string += '\''
+#     else:
+    tmpStr = str(self.elementType)
+    if tmpStr.find("\n") >= 0 or len(tmpStr) > 5 :
+      return self.nescType
+    else :
+      i = 0; string = "["
+      while len(string) < 40 and i < self.len :
+        string += str(self.value[i]) + ", "
+        i += 1
+      if i < self.len :
+        string += "...]"
+      else:
+        string += "\b\b]"
+    return string
+ 
+  def __deepcopy__(self, memo={}) :
+    result = nescArray()
+    memo[id(self)] = result
+    result.elementType = deepcopy(self.elementType, memo)
+    result.nescType = self.nescType
+    result.cType = self.cType
+    result.pythonType = self.pythonType
+    result.len = self.len
+    result.size = self.size
+    result.value = deepcopy(self.value, memo)
+    return result
+
+  def isType(self, xmlDefinition) :
+    """returns 1 if the xml definition describes this type.
+    Returns 0 otherwise."""
+    if ( xmlDefinition != None and xmlDefinition.tagName == "type-array" and
+         int(xmlDefinition.getAttribute("elements")[2:]) == self.len ) :
+      child = getUniqueChild(xmlDefinition)
+      return self.elementType.isType(child)
+    else :
+      return 0
+
+  def getBytes(self) :
+    """Hexidecimal representation of a value of this type"""
+    bytes = ""
+    for i in range(self.len):
+      bytes += self.value[i].getBytes()
+    if len(bytes) != self.size:
+      raise Exception("Byte conversion error: %s %d bytes to %d" %
+                      ( self.nescType, len(bytes), self.size))
+    return bytes
+    
+  
+  def setBytes(self, bytes) :
+    """A value of this type from a hexidecimal representation"""
+    if len(bytes) < self.size:
+        raise Exception("Byte conversion error: %s %d bytes to %d" %
+                        (self.nescType, len(bytes), self.size) )
+    for i in range(self.len) :
+      bytes = self.value[i].setBytes(bytes)
+    return bytes
+
+###########
+# Pointer to basic nesc types,
+###########
+
+class nescPointer( object ) :
+  """A python representation of a nesc pointer.
+
+  usage:
+  pointer = nescPointer(ptrSize, nescType)
+  pointer = nescPointer(myTypes, xmlDecl)
+  nescType = pointer.value
+  pointer.value = nescType
+  bytes = pointer.getBytes()
+  pointer.setBytes(bytes)
+  pointer
+  print pointer
+  """
+  
+  def __init__( self , *varargs) :
+    """initialize all elements to 0"""
+    if len(varargs) == 0:
+      return
+    elif len(varargs) == 2 and varargs[1].__dict__.has_key("tagName"):
+      (nescTypes, xmlDefinition) = varargs[:]
+      if xmlDefinition.tagName != "type-pointer" :
+        raise Exception("Not pointer definition")
+      child = getUniqueChild(xmlDefinition)
+      self.value = nescTypes.getTypeFromXML(child)
+      self.size = int(xmlDefinition.getAttribute("size")[2:])
+    elif len(varargs) == 2 :
+      self.size = varargs[0].types["unsigned int"].size
+      self.value = varargs[1]
+    else :
+      raise Exception("Illegal nescPointer constructor arguments")
+    self.nescType = self.value.nescType + "*"
+    self.cType = self.value.cType + "*"
+    self.pythonType = self.value.pythonType + "*"
+      
+  def __repr__(self) :
+    return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+
+  def __str__(self) :
+    """A text representation of the value"""
+    return "ptr-> %s" % str(self.value)
+
+  def oneLineStr(self) :
+    """A one-line representation of the value"""
+    return  "ptr-> %s" % self.value.oneLineStr()
+
+  def __deepcopy__(self, memo={}) :
+    result = nescPointer()
+    memo[id(self)] = result
+    result.value = deepcopy(self.value, memo)
+    result.size = self.size
+    result.nescType = self.nescType
+    result.cType = self.cType
+    result.pythonType = self.pythonType
+    return result
+
+  def isType(self, xmlDefinition) :
+    """returns 1 if the xml definition describes this type.
+    Returns 0 otherwise."""
+    if xmlDefinition != None and xmlDefinition.tagName == "type-pointer" :
+      child = getUniqueChild(xmlDefinition)
+      return self.value.isType(child)
+    else :
+      return 0
+
+  def getBytes(self) :
+      bytes = pack (str(self.size)+"s",'\x00')
+      if len(bytes) != self.size:
+          raise Exception("Byte conversion error: %s %d bytes to %d" %
+                          (self.nescType, len(bytes), self.size) )
+      return bytes
+  
+  def setBytes(self, bytes) :
+    if len(bytes) < self.size:
+        raise Exception("Byte conversion error: %s %d bytes to %d" %
+                        ( self.nescType, len(bytes), self.size) )
+    return bytes[self.size:]
+
+
+###########
+# Struct of basic nesc types,
+###########
+
+class nescStruct( object ) :
+  """A python representation of a nesc structure.
+
+  usage:
+  struct = nescStruct(myTypes, xmlDecl)
+  struct = nescStruct(structName, (fieldName, type) (fieldName, type), ...)
+  X = struct.field
+  struct.field = X
+  bytes = struct.getBytes()
+  struct.setBytes(bytes)
+  struct
+  print struct
+  """
+
+  def __init__( self, *varargs) :
+    """initialize all fields to 0"""
+    self.__dict__["value"] = {}
+    self.fields = []
+    self.size = 0
+    if len(varargs) == 0 :
+      self.nescType = ""
+    #create the struct from nescType args
+    elif len(varargs) >= 1 and ( type(varargs[0]) == str or
+                                 type(varargs[0]) == unicode ) :
+      self.nescType = varargs[0]
+      self._parseNescTypeFields(varargs[1:])
+    ## parse the struct def from xml
+    elif len(varargs) == 2 and type(varargs[1]) != tuple :
+      (nescTypes, xmlDefinition) = varargs[:]
+      if xmlDefinition.tagName != "struct" :
+        raise Exception("Not struct definition")
+      if xmlDefinition.hasAttribute("name") == False:
+        raise Exception("Anonymous struct")
+      self.nescType = xmlDefinition.getAttribute("name")
+      if xmlDefinition.getAttribute("size")[2:]:
+        self.size = int(xmlDefinition.getAttribute("size")[2:])
+      else:
+        self.size = 0
+      self._parseXMLFields(nescTypes, xmlDefinition)
+    else :
+      raise Exception("Illegal nescStruct constructor args")
+    self.cType = self.nescType
+    self.pythonType = self.nescType
+    self.__initialized = True
+    
+  def __getattr__(self, name) :
+    if self.__dict__.has_key("value") :
+      if self.value.has_key(name) :
+        if self.value[name].__class__ == nescType :
+          return self.value[name].value
+        else :
+          return self.value[name]
+    else :
+      raise AttributeError("No such field \"%s\" in the nescStruct \"%s\"" % (name, self.nescType))
+
+  def __setattr__(self, name, value) :
+    if not self.__dict__.has_key("_nescStruct__initialized") :
+      self.__dict__[name] = value
+      return
+    if self.value.has_key(name) :
+      if self.value[name].__class__ == nescType :
+          self.value[name].value = value;
+      else :
+          self.value[name] = value;
+    elif self.__dict__.has_key(name) :
+      self.__dict__[name] = value
+    else :
+      raise AttributeError("No such field \"%s\" in the nescStruct \"%s\"" % (name, self.nescType))
+        
+
+  def __repr__(self) :
+    return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+    
+  def __str__(self) :
+    """All fields and values as a readable string"""
+    string = self.nescType + ": \n"
+    for field in self.fields :
+      string += "%30s  : %s\n" % (
+        "%s %s" % (self.value[field["name"]].nescType, field["name"]),
+        self.value[field["name"]].oneLineStr() )
+    return string
+
+  def oneLineStr(self) :
+    """A one-line representation of the struct"""
+    return self.nescType
+
+  def __deepcopy__(self, memo={}) :
+    result = self.__class__()
+    memo[id(self)] = result
+    self._copyFields(result, memo)
+    return result
+
+  def _copyFields(self, other, memo=None) :
+    other.size = self.size
+    other.nescType = self.nescType
+    other.cType = self.cType
+    other.pythonType = self.pythonType
+    if memo == None :
+      other.value = deepcopy(self.value)
+      other.fields = deepcopy(self.fields)
+    else :
+      other.value = deepcopy(self.value, memo)
+      other.fields = deepcopy(self.fields, memo)
+    other.__initialized = True
+
+  def _parseXMLFields(self, nescTypes, xmlDefinition) :
+    """Create a list of fields & values given a struct xml declaration."""
+    fields = [node for node in xmlDefinition.getElementsByTagName("field")]
+    fields.sort( lambda A, B :  int(A.getAttribute("bit-offset")[2:]) - int(B.getAttribute("bit-offset")[2:]))
+    for fieldDef in fields:
+      field = {}
+      field["name"] = fieldDef.getAttribute("name")
+      field["bitOffset"] = int(fieldDef.getAttribute("bit-offset")[2:])
+      if fieldDef.hasAttribute("bit-size"):
+          field["bitSize"] = int(fieldDef.getAttribute("bit-size")[2:])
+      elif fieldDef.hasAttribute("size"):
+          field["bitSize"] = int(fieldDef.getAttribute("size")[2:])*8
+      self.fields.append(field)
+      self.value[fieldDef.getAttribute("name")] = nescTypes.getTypeFromXML(fieldDef)
+    #here's a weird bug in the nesc.xml generation where the "size" attribute
+    #for packed structs is actually the size of the unpacked struct.
+    if xmlDefinition.hasAttribute("packed") :
+      self.size = self.packedSize()
+    elif xmlDefinition.getAttribute("size")[2:]:
+      self.size = int(xmlDefinition.getAttribute("size")[2:])
+    else:
+      self.size = 0
+  def _parseNescTypeFields(self, fields) :
+    """Create a list of fields & values given a tuple of
+    fieldname,value sequences."""
+    self.size = 0
+    for fieldDef in fields:
+      field = {}
+      (field["name"],fType) = fieldDef
+      field["bitOffset"] = self.size*8
+      field["bitSize"] = fType.size*8
+      self.fields.append(field)
+      self.value[field["name"]] = fType
+      self.size += fType.size
+  
+  def isType(self, xmlDefinition) :
+    """returns 1 if the xml definition describes this type.
+    Returns 0 otherwise."""
+    if xmlDefinition == None :
+      return 0
+    child = getUniqueChild(xmlDefinition)
+    if ( ( xmlDefinition.tagName == "struct" and
+           xmlDefinition.getAttribute("name") == self.nescType) or
+         ( xmlDefinition.tagName == "type-tag" and child != None and 
+           child.tagName == "struct-ref" and
+           child.getAttribute("name") == self.nescType ) ) :
+      return 1
+    else :
+      return 0
+
+  def getBytes(self) :
+    """Hexidecimal representation of struct"""
+    # We have to be careful in here about:
+    # 1.  bit fields (ie. bitSize shorter than nominal type size)
+    # 2.  packing (ie. bits that are not part of any particular field)
+    bits = ""
+    for field in self.fields :
+      for i in range(len(bits), field["bitOffset"]) :
+        bits += "0"
+      newBits = hex2bin(self.value[field["name"]].getBytes())
+      bits += newBits[-field["bitSize"]:]
+      #the following loop is just type checking for bit fields.  Can we do this on setattr?
+      for i in range(len(newBits)-field["bitSize"]):
+          if newBits[i] == "1":
+              print "Bit-field type error: value of %s.%s being truncated" % (self.nescType,
+                                                        field["name"])
+    for i in range(len(bits), self.size*8) :
+      bits += "0"
+    bytes = bin2hex(bits)
+    if len(bytes) != self.size:
+      raise Exception("Byte conversion error: %s %d bytes to %d" %
+                      ( self.nescType, len(bytes), self.size))
+    return bytes
+
+  def setBytes(self, bytes) :
+    """Set all values using hexidecimal representation"""
+    # We have to be careful in here about:
+    # 1.  bit fields (ie. bitSize shorter than nominal type size)
+    # 2.  packing (ie. bits that are not part of any particular field)
+    if len(bytes) < self.size:
+      raise Exception("Byte conversion error: %s %d bytes to %d" %
+                      (self.nescType, len(bytes), self.size) )
+    bits = hex2bin(bytes)
+    for field in self.fields :
+      newBits = ""
+      for i in range(self.value[field["name"]].size*8) :
+        newBits += "0"
+      selectedBits=bits[field["bitOffset"]:field["bitOffset"]+field["bitSize"]]
+      newBits = newBits[:-field["bitSize"]] + selectedBits
+      newBytes = ""
+      for i in range(self.value[field["name"]].size) :
+        newBytes += '\x00'
+      tmpBytes = bin2hex(newBits)
+      newBytes = newBytes[:-len(tmpBytes)] + tmpBytes
+      self.value[field["name"]].setBytes(newBytes);
+    return bytes[self.size:]
+
+  def packedSize(self) :
+    if len(self.fields) == 0 :
+      trueSize = 0
+    else :
+      a,b,lastField = self._findLastNestedField()
+      trueSize = (lastField["bitOffset"] + lastField["bitSize"]) /8
+    return trueSize
+
+  def _findLastNestedField(self) :
+    lastField = self
+    parents = []
+    #find the last (possibly nested) field
+    while issubclass(type(lastField), nescStruct) and len(lastField.fields) > 0 :
+      parent = lastField
+      lastFieldDef = parent.fields[-1]
+      lastField = parent.value[lastFieldDef["name"]]
+      parents.append( parent )
+    return (lastField, parents, lastFieldDef)
+
+
+
+
+
+class TosMsg ( nescStruct ) :
+    """A python representation of a TosMsg.
+    Is a nescStruct object.
+    Can be used with
+    pytos.comm.send, pytos.comm.register, pytos.comm.unregister.
+    
+    usage:
+    msg = TosMsg(amType)
+    msg = TosMsg(amType, nescStruct)
+    msg = TosMsg(amType, <nescStruct constructor args>)
+    print msg
+    msg.field = X
+    comm.send(msg)
+    comm.register(msg, f)
+    comm.unregister(msg, f)
+    migMsg = msg.createMigMsg()
+    msg.parseMigMsg(migMsg)
+    """
+
+    def __init__(self, amType, *varargs):
+        self.amType = amType
+        self.parentMsg = None
+        #if this is a nescStruct argument, make myself a clone of it
+        if len(varargs) == 1 and issubclass(type(varargs[0]), nescStruct) :
+            nescStruct._copyFields(varargs[0],self)
+        #otherwise, make myself into a struct with the struct args
+        elif len(varargs) >= 1:
+            nescStruct.__init__(self, *varargs)
+
+    def __deepcopy__(self, memo={}) :
+      result = self.__class__(self.amType)
+      memo[id(self)] = result
+      self._copyFields(result, memo)
+      result.parentMsg = deepcopy(self.parentMsg, memo)
+      return result
+
+    def getParentMsg(self, amOrName) :
+      """This function will get the parent message with the amType or name specified"""
+      if self.parentMsg == None :
+        return None
+      elif self.parentMsg.nescType == amOrName or self.parentMsg.amType == amOrName :
+        return self.parentMsg
+      else :
+        return self.parentMsg.getParentMsg(amOrName)
+      
+    def createMigMsg(self) :
+        """Returns a java BaseTOSMsg with same amType and length
+        and with data payload of same bytes"""
+        Message = tinyos.message.Message()
+        msg = Message(self.size)
+        msg.dataSet(unpack( str(self.size) + 'b', self.getBytes() ) )
+        msg.amTypeSet(self.amType)
+#        msg.set_type( self.amType )
+#        msg.set_length(self.size)
+        return msg
+
+    def parseMigMsg(self, msg) :
+        """Takes a java BaseTOSMsg and creates TosMsg
+        with same amType and length and with data payload of same bytes"""
+        self.amType = msg.amType()
+        data = list(msg.dataGet())
+        self.setBytes(pack(str(len(data)) + 'b', *data))
+
+    def __repr__(self) :
+      return "%s object at %s:\n\n\t%s" % (self.__class__, hex(id(self)), str(self))
+      
+    def __str__(self) :
+        """All fields and values as a readable string"""
+        return "TosMsg(am=%d) " % self.amType + nescStruct.__str__(self)
+        
+    def setBytes(self, bytes) :
+        """Extend this msg to be longer, if necessary to accomodate extra data.
+        This only happens if the last field is a nescArray of length 0.
+        Unlike nescStructs, TosMsg objects are not nested recursively, so it is
+        Ok to do this."""
+        if len(bytes) > self.size : #trueSize() :
+            #print "there are more bytes than fit in this msg... trying to grow msg"
+            lastField, parents,b = self._findLastNestedField()
+            #see if it is an array of size 0
+            if type(lastField) == nescArray and lastField.len == 0 :
+                #make it bigger
+                #print "last field is nescArray[0]... growing"
+                lastFieldSize = lastField.elementType.size
+                numExtraBytes = len(bytes) - self.size #trueSize()
+                if numExtraBytes % lastFieldSize == 0:
+                    requiredArraySize = int( numExtraBytes/lastFieldSize )
+                    lastField = nescArray(requiredArraySize, lastField.elementType)
+                #print "new size is %d" % numExtraBytes
+                #and set it, changing the size of all parent structs
+                parents.reverse()
+                for parent in parents :
+#                    trueSize = parent.trueSize()
+                    parent.value[parent.fields[-1]["name"]] = lastField
+                    parent.fields[-1]["bitSize"] = lastField.size*8
+                    parent.size = self.packedSize()# + lastField.size
+                    lastField = parent
+            else:
+                #print "last field is not nescArray[0]. Cannot grow. Ignoring extra data."
+                pass
+            
+        #make sure everything worked out correctly and call parent's function
+        if len(bytes) != self.size :#trueSize() :
+            raise Exception("Incorrect number of bytes for TosMsg. Byte conversion error: %s %d bytes to %d" % ( self.nescType, len(bytes), self.size) )
+        #print "passing to child to set bytes."
+        nescStruct.setBytes(self,bytes)
+
+
+
+
+
+
+
+def getUniqueChild(xmlDefinition) :
+  child = None
+  for childNode in xmlDefinition.childNodes :
+    if childNode.nodeType == 1 :
+      child = childNode
+      break
+  return child
+
+def bin2hex(bits) :
+    bytes = ""
+    for i in range(0, len(bits), 8 ):
+        bytes += pack('B',int(bits[i:i+8],2))
+    return bytes
+
+def hex2bin(bytes) :
+    bits = ""
+    for i in range(len(bytes)) :
+        val, = unpack('B',bytes[i])
+        for j in range(7,-1,-1):
+            if val>= pow(2,j):
+                bits += "1"
+                val -= pow(2,j)
+            else :
+                bits += "0"
+    return bits
+
+
+def TestAppTypes() :
+    testRpc = appTypes('/home/kamin/tinyos-1.x/contrib/hood/apps/TestRpc/build/telosb/nesc.xml')
+    print testRpc
+    
+if __name__ == "__main__": TestAppTypes()
diff --git a/support/sdk/python/tinyos/tossim/__init__.py b/support/sdk/python/tinyos/tossim/__init__.py
new file mode 100644
index 00000000..a739e305
--- /dev/null
+++ b/support/sdk/python/tinyos/tossim/__init__.py
@@ -0,0 +1,32 @@
+# Copyright (c) 2005 Stanford University. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of the copyright holders nor the names of
+#   its contributors may be used to endorse or promote products derived
+#   from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+# THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Author Philip Levis
+
+__all__ = ["TossimApp", "TossimNescDecls"]
diff --git a/support/sdk/python/tinyos/utils/Singleton.py b/support/sdk/python/tinyos/utils/Singleton.py
new file mode 100644
index 00000000..09d59244
--- /dev/null
+++ b/support/sdk/python/tinyos/utils/Singleton.py
@@ -0,0 +1,249 @@
+# Copyright (c) 2006-2007 Chad Metcalf <chad@5secondfuse.com>
+#
+# Permission is hereby granted, free of charge, to any person obtaining a 
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# Author: Chad Metcalf <chad@5secondfuse.com>
+#
+
+"""
+A Python Singleton mixin class that makes use of some of the ideas
+found at http://c2.com/cgi/wiki?PythonSingleton. Just inherit
+from it and you have a singleton. No code is required in
+subclasses to create singleton behavior -- inheritance from 
+Singleton is all that is needed.
+
+Assume S is a class that inherits from Singleton. Useful behaviors
+are:
+
+1) Getting the singleton:
+
+    S.getInstance() 
+    
+returns the instance of S. If none exists, it is created. 
+
+2) The usual idiom to construct an instance by calling the class, i.e.
+
+    S()
+    
+is disabled for the sake of clarity. If it were allowed, a programmer
+who didn't happen  notice the inheritance from Singleton might think he
+was creating a new instance. So it is felt that it is better to
+make that clearer by requiring the call of a class method that is defined in
+Singleton. An attempt to instantiate via S() will restult in an SingletonException
+being raised.
+
+3) If S.__init__(.) requires parameters, include them in the
+first call to S.getInstance(.). If subsequent calls have parameters,
+a SingletonException is raised.
+
+4) As an implementation detail, classes that inherit 
+from Singleton may not have their own __new__
+methods. To make sure this requirement is followed, 
+an exception is raised if a Singleton subclass includ
+es __new__. This happens at subclass instantiation
+time (by means of the MetaSingleton metaclass.
+
+By Gary Robinson, grobinson@transpose.com. No rights reserved -- 
+placed in the public domain -- which is only reasonable considering
+how much it owes to other people's version which are in the
+public domain. The idea of using a metaclass came from 
+a  comment on Gary's blog (see 
+http://www.garyrobinson.net/2004/03/python_singleto.html#comments). 
+Other improvements came from comments and email from other
+people who saw it online. (See the blog post and comments
+for further credits.)
+
+Not guaranteed to be fit for any particular purpose. Use at your
+own risk. 
+"""
+
+class SingletonException(Exception):
+    def __init__(self, *args):
+        Exception.__init__(self)
+        self.args = args
+
+class MetaSingleton(type):
+    def __new__(metaclass, strName, tupBases, dict):
+        if dict.has_key('__new__'):
+            raise SingletonException, 'Can not override __new__ in a Singleton'
+        return super(MetaSingleton,metaclass).__new__(metaclass, strName, tupBases, dict)
+        
+    def __call__(cls, *lstArgs, **dictArgs):
+        raise SingletonException, 'Singletons may only be instantiated through getInstance()'
+        
+class Singleton(object):
+    __metaclass__ = MetaSingleton
+    
+    def getInstance(cls, *lstArgs):
+        """
+        Call this to instantiate an instance or retrieve the existing instance.
+        If the singleton requires args to be instantiated, include them the first
+        time you call getInstance.        
+        """
+        if cls._isInstantiated():
+            if len(lstArgs) != 0:
+                raise SingletonException, 'If no supplied args, singleton must already be instantiated, or __init__ must require no args'
+        else:
+            if cls._getConstructionArgCountNotCountingSelf() > 0 and len(lstArgs) <= 0:
+                raise SingletonException, 'If the singleton requires __init__ args, supply them on first instantiation'
+            instance = cls.__new__(cls)
+            instance.__init__(*lstArgs)
+            cls.cInstance = instance
+        return cls.cInstance
+    getInstance = classmethod(getInstance)
+    
+    def _isInstantiated(cls):
+        return hasattr(cls, 'cInstance')
+    _isInstantiated = classmethod(_isInstantiated)  
+
+    def _getConstructionArgCountNotCountingSelf(cls):
+        return cls.__init__.im_func.func_code.co_argcount - 1
+    _getConstructionArgCountNotCountingSelf = classmethod(_getConstructionArgCountNotCountingSelf)
+
+    def _forgetClassInstanceReferenceForTesting(cls):
+        """
+        This is designed for convenience in testing -- sometimes you 
+        want to get rid of a singleton during test code to see what
+        happens when you call getInstance() under a new situation.
+        
+        To really delete the object, all external references to it
+        also need to be deleted.
+        """
+        try:
+            delattr(cls,'cInstance')
+        except AttributeError:
+            # run up the chain of base classes until we find the one that has the instance
+            # and then delete it there
+            for baseClass in cls.__bases__: 
+                if issubclass(baseClass, Singleton):
+                    baseClass._forgetClassInstanceReferenceForTesting()
+    _forgetClassInstanceReferenceForTesting = classmethod(_forgetClassInstanceReferenceForTesting)
+    
+
+
+if __name__ == '__main__':
+    import unittest
+    
+    class PublicInterfaceTest(unittest.TestCase):
+        def testReturnsSameObject(self):
+            """
+            Demonstrates normal use -- just call getInstance and it returns a singleton instance
+            """
+        
+            class A(Singleton): 
+                def __init__(self):
+                    super(A, self).__init__()
+                    
+            a1 = A.getInstance()
+            a2 = A.getInstance()
+            self.assertEquals(id(a1), id(a2))
+            
+        def testInstantiateWithMultiArgConstructor(self):
+            """
+            If the singleton needs args to construct, include them in the first
+            call to get instances.
+            """
+                    
+            class B(Singleton): 
+                    
+                def __init__(self, arg1, arg2):
+                    super(B, self).__init__()
+                    self.arg1 = arg1
+                    self.arg2 = arg2
+
+            b1 = B.getInstance('arg1 value', 'arg2 value')
+            b2 = B.getInstance()
+            self.assertEquals(b1.arg1, 'arg1 value')
+            self.assertEquals(b1.arg2, 'arg2 value')
+            self.assertEquals(id(b1), id(b2))
+            
+            
+        def testTryToInstantiateWithoutNeededArgs(self):
+            
+            class B(Singleton): 
+                    
+                def __init__(self, arg1, arg2):
+                    super(B, self).__init__()
+                    self.arg1 = arg1
+                    self.arg2 = arg2
+
+            self.assertRaises(SingletonException, B.getInstance)
+            
+        def testTryToInstantiateWithoutGetInstance(self):
+            """
+            Demonstrates that singletons can ONLY be instantiated through
+            getInstance, as long as they call Singleton.__init__ during construction.
+            
+            If this check is not required, you don't need to call Singleton.__init__().
+            """
+
+            class A(Singleton): 
+                def __init__(self):
+                    super(A, self).__init__()
+                    
+            self.assertRaises(SingletonException, A)
+            
+        def testDontAllowNew(self):
+        
+            def instantiatedAnIllegalClass():
+                class A(Singleton): 
+                    def __init__(self):
+                        super(A, self).__init__()
+                        
+                    def __new__(metaclass, strName, tupBases, dict):
+                        return super(MetaSingleton,metaclass).__new__(metaclass, strName, tupBases, dict)
+                                        
+            self.assertRaises(SingletonException, instantiatedAnIllegalClass)
+        
+        
+        def testDontAllowArgsAfterConstruction(self):
+            class B(Singleton): 
+                    
+                def __init__(self, arg1, arg2):
+                    super(B, self).__init__()
+                    self.arg1 = arg1
+                    self.arg2 = arg2
+
+            b1 = B.getInstance('arg1 value', 'arg2 value')
+            self.assertRaises(SingletonException, B, 'arg1 value', 'arg2 value')
+            
+        def test_forgetClassInstanceReferenceForTesting(self):
+            class A(Singleton): 
+                def __init__(self):
+                    super(A, self).__init__()
+            class B(A): 
+                def __init__(self):
+                    super(B, self).__init__()
+                    
+            # check that changing the class after forgetting the instance produces
+            # an instance of the new class
+            a = A.getInstance()
+            assert a.__class__.__name__ == 'A'
+            A._forgetClassInstanceReferenceForTesting()
+            b = B.getInstance()
+            assert b.__class__.__name__ == 'B'
+            
+            # check that invoking the 'forget' on a subclass still deletes the instance
+            B._forgetClassInstanceReferenceForTesting()
+            a = A.getInstance()
+            B._forgetClassInstanceReferenceForTesting()
+            b = B.getInstance()
+            assert b.__class__.__name__ == 'B'
+
+    unittest.main()
diff --git a/support/sdk/python/tinyos/utils/Watcher.py b/support/sdk/python/tinyos/utils/Watcher.py
new file mode 100644
index 00000000..e96f466a
--- /dev/null
+++ b/support/sdk/python/tinyos/utils/Watcher.py
@@ -0,0 +1,72 @@
+# Copyright (c) 2006-2007 Chad Metcalf <chad@5secondfuse.com>
+#
+# Permission is hereby granted, free of charge, to any person obtaining a 
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# Author: Chad Metcalf <chad@5secondfuse.com>
+#
+
+import os
+import sys
+import signal
+
+from tinyos.utils.Singleton import Singleton
+
+class Watcher(Singleton):
+    """ As seen in:
+    http://aspn.activestate.com/ASPN/Cookbook/Python/Recipe/496735
+    
+    This class solves two problems with multithreaded
+    programs in Python, (1) a signal might be delivered
+    to any thread (which is just a malfeature) and (2) if
+    the thread that gets the signal is waiting, the signal
+    is ignored (which is a bug).
+
+    The watcher is a concurrent process (not thread) that
+    waits for a signal and the process that contains the
+    threads.  See Appendix A of The Little Book of Semaphores.
+    http://greenteapress.com/semaphores/
+    """
+    
+    def __init__(self):
+        """ Creates a child thread, which returns.  The parent
+            thread waits for a KeyboardInterrupt and then kills
+            the child thread.
+        """  
+        Singleton.__init__(self)
+        
+        self.child = os.fork()
+        if self.child != 0:
+            self.watch()
+
+    def watch(self):
+        try:
+            os.wait()
+        except KeyboardInterrupt:
+            # I put the capital B in KeyBoardInterrupt so I can
+            # tell when the Watcher gets the SIGINT
+            print 'KeyBoardInterrupt'
+            self.kill()
+        sys.exit()
+
+    def kill(self):
+        try:
+            os.kill(self.child, signal.SIGKILL)
+        except OSError, x: 
+            print "os.kill failed"
+            print x
\ No newline at end of file
diff --git a/support/sdk/python/tinyos/utils/__init__.py b/support/sdk/python/tinyos/utils/__init__.py
new file mode 100644
index 00000000..e1ac828f
--- /dev/null
+++ b/support/sdk/python/tinyos/utils/__init__.py
@@ -0,0 +1,24 @@
+# Copyright (c) 2006-2007 Chad Metcalf <chad@5secondfuse.com>
+#
+# Permission is hereby granted, free of charge, to any person obtaining a 
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# Author: Chad Metcalf <chad@5secondfuse.com>
+#
+
+__all__ = ["Singleton", "Watcher"]
diff --git a/support/sdk/python/tos.py b/support/sdk/python/tos.py
new file mode 100644
index 00000000..e4e18eb0
--- /dev/null
+++ b/support/sdk/python/tos.py
@@ -0,0 +1,741 @@
+# Copyright (c) 2008 Johns Hopkins University.
+# All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+# @author David Purdy <david@radioretail.co.za>
+
+"""
+A library that implements the T2 serial communication.
+
+This library has two parts: one that deals with sending and receiving
+packets using the serial format from T2 (TEP113) and a second one that
+tries to simplifies the work with arbitrary packets.
+"""
+
+import sys, struct, time, socket, operator, os
+import traceback
+
+try: 
+    import serial
+except ImportError, e: 
+    print "Please install PySerial first."
+    sys.exit(1)
+
+__version__ = "$Id: tos.py,v 1.12 2010-06-29 22:07:42 scipio Exp $"
+
+__all__ = ['Serial', 'AM',
+           'Packet', 'RawPacket',
+           'AckFrame', 'DataFrame', 'NoAckDataFrame',
+           'ActiveMessage']
+
+HDLC_FLAG_BYTE = 0x7e
+HDLC_CTLESC_BYTE = 0x7d
+
+TOS_SERIAL_ACTIVE_MESSAGE_ID = 0
+TOS_SERIAL_CC1000_ID = 1
+TOS_SERIAL_802_15_4_ID = 2
+TOS_SERIAL_UNKNOWN_ID = 255
+
+SERIAL_PROTO_ACK = 67
+SERIAL_PROTO_PACKET_ACK = 68
+SERIAL_PROTO_PACKET_NOACK = 69
+SERIAL_PROTO_PACKET_UNKNOWN = 255
+
+def list2hex(v):
+    return " ".join(["%02x" % p for p in v])
+
+class Timeout(Exception):
+    pass
+
+def getSource(comm):
+    source = comm.split('@')
+    params = source[1].split(':')
+    debug = '--debug' in sys.argv
+    if source[0] == 'serial':
+        try:
+            return Serial(params[0], int(params[1]), flush=True, debug=debug)
+        except:
+            print "ERROR: Unable to initialize a serial connection to", comm
+            raise Exception
+    elif source[0] == 'network':
+        try:
+            return SerialMIB600(params[0], int(params[1]), debug=debug)
+        except:
+            print "ERROR: Unable to initialize a network connection to", comm
+            print "ERROR:", traceback.format_exc()
+            raise Exception
+    raise Exception
+
+class Serial:
+    def __init__(self, port, baudrate, flush=False, debug=False, readTimeout=None, ackTimeout=0.02):
+        self.debug = debug
+        self.readTimeout = readTimeout
+        self.ackTimeout = ackTimeout
+        self._ts = None
+
+        if port.startswith('COM') or port.startswith('com'):
+            port = int(port[3:]) - 1
+        elif port.isdigit():
+            port = int(port) - 1
+
+        self._s = serial.Serial(port, int(baudrate), rtscts=0, timeout=0.5)
+        self._s.flushInput()
+        if flush:
+            print >>sys.stdout, "Flushing the serial port",
+            endtime = time.time() + 1
+            while time.time() < endtime:
+                self._s.read()
+                sys.stdout.write(".")
+            if not self.debug:
+                sys.stdout.write("\n")
+        self._s.close()
+        self._s = serial.Serial(port, baudrate, rtscts=0, timeout=readTimeout)
+
+    def getByte(self):
+        c = self._s.read()
+        if c == '':
+            raise Timeout
+        #print 'Serial:getByte: 0x%02x' % ord(c)
+        return ord(c)
+
+    def putBytes(self, data):
+        #print "DEBUG: putBytes:", data
+        for b in data:
+            self._s.write(struct.pack('B', b))
+            time.sleep(0.000001)
+
+    def getTimeout(self):
+        return self._s.timeout
+
+    def setTimeout(self, timeout):
+        self._s.timeout = timeout
+
+class SerialMIB600:
+    def __init__(self, host, port=10002, debug=False, readTimeout=None, ackTimeout=0.5):
+        self.debug = debug
+        self.readTimeout = readTimeout
+        self.ackTimeout = ackTimeout
+        self._ts = None
+        self._s = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
+        self._s.connect((host, port))
+        print "Connected"
+
+    def getByte(self):
+        try:
+            c = self._s.recv(1)
+        except socket.timeout:
+            c = ''
+        if c == '':
+            raise Timeout
+        #print 'Serial:getByte: 0x%02x' % ord(c)
+        return ord(c)
+
+    def putBytes(self, data):
+        #print "DEBUG: putBytes:", data
+        for b in data:
+            self._s.send(struct.pack('B', b))
+
+    def getTimeout(self):
+        return self._s.gettimeout()
+
+    def setTimeout(self, timeout):
+        self._s.settimeout(timeout)
+
+class HDLC:
+    """
+    An HDLC object offers a way to send and receive data on a byte
+    source using a HDLC-like formating.
+    """
+    def __init__(self, source):
+        self._s = source
+
+    # Returns the next incoming serial packet
+    def read(self, timeout=None):
+        """Wait for a packet and return it as a RawPacket."""
+
+        # Developer notes:
+        #
+        # Packet data read is in this format:
+        #     [HDLC_FLAG_BYTE][Escaped data][HDLC_FLAG_BYTE]
+        #
+        # [Escaped data] is encoded so that [HDLC_FLAG_BYTE] byte
+        # values cannot occur within it. When [Escaped data] has been
+        # unescaped, the last 2 bytes are a 16-bit CRC of the earlier
+        # part of the packet (excluding the initial HDLC_FLAG_BYTE
+        # byte)
+        #
+        # It's also possible that the serial device was half-way
+        # through transmitting a packet when this function was called
+        # (app was just started). So we also neeed to handle this
+        # case:
+        #
+        #     [Incomplete escaped data][HDLC_FLAG_BYTE][HDLC_FLAG_BYTE][Escaped data][HDLC_FLAG_BYTE]
+        #
+        # In this case we skip over the first (incomplete) packet.
+        #
+
+        if self._s.getTimeout() != timeout and timeout != None:
+            self.log("Set the timeout to %s, previous one was %s" % (timeout, self._s.getTimeout()))
+            self._s.setTimeout(timeout)
+
+        #    +--- FLAG -----+
+        #    |              |  ___________
+        #    v              | /           |
+        #  >(1)-- !FLAG -->(2)<-- !FLAG --+
+        #    |
+        #   FLAG
+        #    |  ___________
+        #    v /           |
+        #   (3)<-- FLAG ---+
+        #    |
+        #  !FLAG
+        #    |  ___________
+        #    v /           |
+        #   (4)<-- !FLAG --+
+        #    |
+        #   FLAG
+        #    |
+        #    v
+        #   (5)
+
+        try:
+            # Read bytes until we get to a HDLC_FLAG_BYTE value
+            # (either the end of a packet, or the start of a new one)
+            d = self._s.getByte()
+            ts = time.time()
+            if d != HDLC_FLAG_BYTE:
+                self.log("Skipping byte %d" % d)
+                while d != HDLC_FLAG_BYTE:
+                    d = self._s.getByte()
+                    self.log("Skipping byte %d" % d)
+                    ts = time.time()
+
+            # Store HDLC_FLAG_BYTE at the start of the retrieved packet
+            # data:
+            packet = [d]
+
+            # Is the next byte also HDLC_FLAG_BYTE?
+            d = self._s.getByte()
+            while d == HDLC_FLAG_BYTE:
+                d = self._s.getByte()
+                ts = time.time()
+
+            # We are now on the 2nd byte of the packet. Add it to
+            # our retrieved packet data:
+            packet.append(d)
+
+            # Read bytes from serial until we read another HDLC_FLAG_BYTE
+            # value (end of the current packet):
+            while d != HDLC_FLAG_BYTE:
+                d = self._s.getByte()
+                packet.append(d)
+
+            # Done reading a whole packet from serial
+            self.log("SimpleSerial:_read: unescaped %s" % packet)
+
+            # Decode the packet, and check CRC:
+            packet = self._unescape(packet)
+
+            crc = self._crc16(0, packet[1:-3])
+            packet_crc = self._decode(packet[-3:-1])
+
+            if crc != packet_crc:
+                print "Warning: wrong CRC! %x != %x %s" % (crc, packet_crc, ["%2x" % i for i in packet])
+            if not self._s._ts:
+                self._s._ts = ts
+            self.log("Serial:_read: %.4f (%.4f) Recv: %s" % (ts, ts - self._s._ts, self._format(packet[1:-3])))
+            self._ts = ts
+
+            # Packet was successfully retrieved, so return it in a
+            # RawPacket wrapper object (but leave out the HDLC_FLAG_BYTE
+            # and CRC bytes)
+            return RawPacket(ts, packet[1:-3])
+        except Timeout:
+            return None
+
+    def write(self, payload, seqno):
+        """
+        Write a packet. If the payload argument is a list, it is
+        assumed to be exactly the payload. Otherwise the payload is
+        assume to be a Packet and the real payload is obtain by
+        calling the .payload().
+        """
+
+        if isinstance(payload, Packet):
+            payload = payload.payload()
+
+        packet = DataFrame();
+        # We need to always request for acks
+        packet.protocol = SERIAL_PROTO_PACKET_ACK
+        packet.seqno = seqno
+        packet.dispatch = 0
+        packet.data = payload
+        packet = packet.payload()
+        crc = self._crc16(0, packet)
+        packet.append(crc & 0xff)
+        packet.append((crc >> 8) & 0xff)
+        packet = [HDLC_FLAG_BYTE] + self._escape(packet) + [HDLC_FLAG_BYTE]
+
+        self.log("Serial: write %s" % packet)
+        self._s.putBytes(packet)
+
+    def _format(self, payload):
+        f = NoAckDataFrame(payload)
+        if f.protocol == SERIAL_PROTO_ACK:
+            rpacket = AckFrame(payload)
+            return "Ack seqno: %d" % (rpacket.seqno)
+        else:
+            rpacket = ActiveMessage(f.data)
+            return "D: %04x S: %04x L: %02x G: %02x T: %02x | %s" % \
+                   (rpacket.destination, rpacket.source,
+                    rpacket.length, rpacket.group, rpacket.type,
+                    list2hex(rpacket.data))
+
+    def _crc16(self, base_crc, frame_data):
+        crc = base_crc
+        for b in frame_data:
+            crc = crc ^ (b << 8)
+            for i in range(0, 8):
+                if crc & 0x8000 == 0x8000:
+                    crc = (crc << 1) ^ 0x1021
+                else:
+                    crc = crc << 1
+                crc = crc & 0xffff
+        return crc
+
+    def _encode(self, val, dim):
+        output = []
+        for i in range(dim):
+            output.append(val & 0xFF)
+            val = val >> 8
+        return output
+
+    def _decode(self, v):
+        r = long(0)
+        for i in v[::-1]:
+            r = (r << 8) + i
+        return r
+
+    def _unescape(self, packet):
+        r = []
+        esc = False
+        for b in packet:
+            if esc:
+                r.append(b ^ 0x20)
+                esc = False
+            elif b == HDLC_CTLESC_BYTE:
+                esc = True
+            else:
+                r.append(b)
+        return r
+
+    def _escape(self, packet):
+        r = []
+        for b in packet:
+            if b == HDLC_FLAG_BYTE or b == HDLC_CTLESC_BYTE:
+                r.append(HDLC_CTLESC_BYTE)
+                r.append(b ^ 0x20)
+            else:
+                r.append(b)
+        return r
+
+    def log(self, s):
+        if self._s.debug:
+            print s
+
+class SimpleAM(object):
+    def __init__(self, source, oobHook=None):
+        self._source = source
+        self._hdlc = HDLC(source)
+        self.seqno = 0
+        self.oobHook = oobHook
+
+    def read(self, timeout=None):
+        f = self._hdlc.read(timeout)
+        if f:
+            return ActiveMessage(NoAckDataFrame(f))
+        return None
+
+    def write(self, packet, amId, timeout=5, blocking=True, inc=1):
+        self.seqno = (self.seqno + inc) % 256
+        prevTimeout = self._source.getTimeout()
+        ack = None
+        end = None
+        if timeout: end = time.time() + timeout
+        while not end or time.time() < end:
+            self._hdlc.write(ActiveMessage(packet, amId=amId), seqno=self.seqno)
+            if not blocking:
+                return True
+            start = time.time()
+            f = self._hdlc.read(self._source.ackTimeout)
+            if f == None:
+                #print "Ack Timeout!"
+                continue
+            ack = AckFrame(f)
+            while ack.protocol != SERIAL_PROTO_ACK and (not end or time.time() < end):
+                if self.oobHook:
+                    self.oobHook(ActiveMessage(NoAckDataFrame(f)))
+                else:
+                    print 'SimpleAM:write: skip', ack, f
+                f = self._hdlc.read(self._source.ackTimeout)
+                if f == None:
+                    #print "Ack Timeout!"
+                    break
+                ack = AckFrame(f)
+            if f != None:
+                break
+        self._source.setTimeout(prevTimeout)
+        #print 'SimpleAM:write: got an ack:', ack, ack.seqno == self.seqno
+        return (ack != None and ack.seqno == self.seqno)
+
+    def setOobHook(self, oobHook):
+        self.oobHook = oobHook
+
+def printfHook(packet):
+    if packet == None:
+        return
+    if packet.type == 100:
+        s = "".join([chr(i) for i in packet.data]).strip('\0')
+        lines = s.split('\n')
+        for line in lines:
+            if line: print "PRINTF:", line
+        packet = None # No further processing for the printf packet
+    return packet    
+
+class AM(SimpleAM):
+    def __init__(self, s=None, oobHook=None):
+        if s == None:
+            try:
+                s = getSource(sys.argv[1])
+            except:
+                try:
+                    for (i, j) in zip(sys.argv[1::2], sys.argv[2::2]):
+                        if i == '-comm':
+                            s = getSource(j)
+                    if s == None:
+                        raise Exception
+                except:
+                    try:
+                        s = getSource(os.environ['MOTECOM'])
+                    except:
+                        print "ERROR: Please indicate a way to connect to the mote"
+                        sys.exit(-1)
+        if oobHook == None:
+            oobHook = printfHook
+        super(AM, self).__init__(s, oobHook)
+
+    def read(self, timeout=None):
+        return self.oobHook(super(AM, self).read(timeout))
+
+    def write(self, packet, amId, timeout=None, blocking=True):
+        r = super(AM, self).write(packet, amId, timeout, blocking)
+        while not r:
+            r = super(AM, self).write(packet, amId, timeout, blocking, inc=0)
+            if timeout and not r:
+               raise Timeout
+        return True
+
+
+# class SFClient:
+#     def __init__(self, host, port, qsize=10):
+#         self._in_queue = Queue(qsize)
+#         self._s = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
+#         self._s.connect((host, port))
+#         data = self._s.recv(2)
+#         if data != 'U ':
+#             print "Wrong handshake"
+#         self._s.send("U ")
+#         print "Connected"
+#         thread.start_new_thread(self.run, ())
+
+#     def run(self):
+#         while True:
+#             length = ord(self._s.recv(1))
+#             data = self._s.recv(length)
+#             data = [ord(c) for c in data][1:]
+#             #print "Recv %d bytes" % (length), ActiveMessage(data)
+#             if self._in_queue.full():
+#                 print "Warning: Buffer overflow"
+#                 self._in_queue.get()
+#             p = RawPacket()
+#             p.data = data
+#             self._in_queue.put(p, block=False)
+
+#     def read(self, timeout=0):
+#         return self._in_queue.get()
+
+#     def write(self, payload):
+#         print "SFClient: write:", payload
+#         if type(payload) != type([]):
+#             # Assume this will be derived from Packet
+#             payload = payload.payload()
+#         payload = [0] + payload
+#         self._s.send(chr(len(payload)))
+#         self._s.send(''.join([chr(c) for c in payload]))
+#         return True
+
+
+################################################################################
+
+class Packet:
+    """
+    The Packet class offers a handy way to build pack and unpack
+    binary data based on a given pattern.
+    """
+
+    def _decode(self, v):
+        r = long(0)
+        for i in v:
+            r = (r << 8) + i
+        return r
+
+    def _encode(self, val, dim):
+        output = []
+        for i in range(dim):
+            output.append(int(val & 0xFF))
+            val = val >> 8
+        output.reverse()
+        return output
+
+    def _sign(self, val, dim):
+        if val > (1 << (dim * 8 - 1)):
+            return val - (1 << (dim * 8))
+        return val
+
+    def __init__(self, desc, packet = None):
+        offset = 0
+        boffset = 0
+        sum = 0
+        for i in range(len(desc)-1, -1, -1):
+            (n, t, s) = desc[i]
+            if s == None:
+                if sum > 0:
+                    desc[i] = (n, t, -sum)
+                break
+            sum += s
+        self.__dict__['_schema'] = [(t, s) for (n, t, s) in desc]
+        self.__dict__['_names'] = [n for (n, t, s) in desc]
+        self.__dict__['_values'] = []
+        if type(packet) == type([]):
+            for (t, s) in self._schema:
+                if t == 'int':
+                    self._values.append(self._decode(packet[offset:offset + s]))
+                    offset += s
+                elif t == 'sint':
+                    self._values.append(self._sign(self._decode(packet[offset:offset + s]), s))
+                    offset += s
+                elif t == 'bint':
+                    doffset = 8 - (boffset + s)
+                    self._values.append((packet[offset] >> doffset) & ((1<<s) - 1))
+                    boffset += s
+                    if boffset == 8:
+                        offset += 1
+                        boffset = 0
+                elif t == 'string':
+                    self._values.append(''.join([chr(i) for i in packet[offset:offset + s]]))
+                    offset += s
+                elif t == 'blob':
+                    if s:
+                        if s > 0:
+                            self._values.append(packet[offset:offset + s])
+                            offset += s
+                        else:
+                            self._values.append(packet[offset:s])
+                            offset = len(packet) + s
+                    else:
+                        self._values.append(packet[offset:])
+        elif type(packet) == type(()):
+            for i in packet:
+                self._values.append(i)
+        else:
+            for v in self._schema:
+                self._values.append(None)
+
+    def __repr__(self):
+        return self._values.__repr__()
+
+    def __str__(self):
+        r = ""
+        for i in range(len(self._names)):
+            r += "%s: %s " % (self._names[i], self._values[i])
+        for i in range(len(self._names), len(self._values)):
+            r += "%s" % self._values[i]
+        return r
+
+    # Implement the struct behavior
+    def __getattr__(self, name):
+        if type(name) == type(0):
+            return self._names[name]
+        else:
+            return self._values[self._names.index(name)]
+
+    def __setattr__(self, name, value):
+        if type(name) == type(0):
+            self._values[name] = value
+        else:
+            self._values[self._names.index(name)] = value
+
+    def __ne__(self, other):
+        if other.__class__ == self.__class__:
+            return self._values != other._values
+        else:
+            return True
+
+    def __eq__(self, other):
+        if other.__class__ == self.__class__:
+            return self._values == other._values
+        else:
+            return False
+
+    def __nonzero__(self):
+        return True;
+
+    # Implement the map behavior
+    def __getitem__(self, key):
+        return self.__getattr__(key)
+
+    def __setitem__(self, key, value):
+        self.__setattr__(key, value)
+
+    def __len__(self):
+        return len(self._values)
+
+    def keys(self):
+        return self._names
+
+    def values(self):
+        return self._values
+
+    # Custom functions
+    def names(self):
+        return self._names
+
+    def sizes(self):
+        return self._schema
+
+    def payload(self):
+        r = []
+        boffset = 0
+        for i in range(len(self._schema)):
+            (t, s) = self._schema[i]
+            if t == 'int':
+                r += self._encode(self._values[i], s)
+                boffset = 0
+            elif t == 'bint':
+                doffset = 8 - (boffset + s)
+                if boffset == 0:
+                    r += [self._values[i] << doffset]
+                else:
+                    r[-1] |= self._values[i] << doffset
+                boffset += s
+                if boffset == 8:
+                    boffset = 0
+            elif self._values[i] != []:
+                r += self._values[i]
+        for i in self._values[len(self._schema):]:
+            r += i
+        return r
+
+
+class RawPacket(Packet):
+    def __init__(self, ts = None, data = None):
+        Packet.__init__(self,
+                        [('ts' ,  'int', 4),
+                         ('data', 'blob', None)],
+                        None)
+        self.ts = ts;
+        self.data = data
+
+class AckFrame(Packet):
+    def __init__(self, payload = None):
+        if isinstance(payload, Packet):
+            if isinstance(payload, RawPacket):
+                payload = payload.data
+            else:
+                payload = payload.payload()
+        Packet.__init__(self,
+                        [('protocol', 'int', 1),
+                         ('seqno',    'int', 1)],
+                        payload)
+
+class DataFrame(Packet):
+    def __init__(self, payload = None):
+        if isinstance(payload, Packet):
+            if isinstance(payload, RawPacket):
+                payload = payload.data
+            else:
+                payload = payload.payload()
+        Packet.__init__(self,
+                        [('protocol',  'int', 1),
+                         ('seqno',     'int', 1),
+                         ('dispatch',  'int', 1),
+                         ('data',      'blob', None)],
+                        payload)
+
+class NoAckDataFrame(Packet):
+    def __init__(self, payload = None):
+        if isinstance(payload, Packet):
+            if isinstance(payload, RawPacket):
+                payload = payload.data
+            else:
+                payload = payload.payload()
+        Packet.__init__(self,
+                        [('protocol',  'int', 1),
+                         ('dispatch',  'int', 1),
+                         ('data',      'blob', None)],
+                        payload)
+
+class ActiveMessage(Packet):
+    def __init__(self, packet = None, amId = 0x00, dest = 0xFFFF):
+        payload = None
+        if type(packet) == type([]):
+            payload = packet
+        elif isinstance(packet, NoAckDataFrame):
+            payload = packet.data
+            packet = None
+
+        Packet.__init__(self,
+                        [('destination', 'int', 2),
+                         ('source',      'int', 2),
+                         ('length',      'int', 1),
+                         ('group',       'int', 1),
+                         ('type',        'int', 1),
+                         ('data',        'blob', None)],
+                        payload)
+        if payload == None:
+            self.destination = dest
+            self.source = 0x0000
+            self.group = 0x00
+            self.type = amId
+            self.data = []
+            if isinstance(packet, Packet):
+                self.data = packet.payload()
+            self.length = len(self.data)
+
diff --git a/tools/.cvsignore b/tools/.cvsignore
new file mode 100644
index 00000000..7dfd1f3b
--- /dev/null
+++ b/tools/.cvsignore
@@ -0,0 +1,8 @@
+Makefile
+Makefile.in
+aclocal.m4
+autom4te.cache
+config-aux
+config.log
+config.status
+configure
diff --git a/tools/Bootstrap b/tools/Bootstrap
new file mode 100755
index 00000000..528867bd
--- /dev/null
+++ b/tools/Bootstrap
@@ -0,0 +1,30 @@
+#!/bin/sh
+
+set -e
+
+srcdir=src
+
+ACLOCAL="aclocal"
+AUTOMAKE="automake"
+AUTOCONF="autoconf"
+AUTOHEADER="autoheader"
+
+set -x
+(
+    $ACLOCAL
+    $AUTOCONF
+    [ -d config-aux ] || mkdir config-aux
+    $AUTOMAKE -a -c
+)
+
+set -x
+(
+    # If you include this above, errors regarding $(EXEEXT) in 
+    # tinyos/java/env/Makefile.am cause the block to be exited
+    # before running this command below. I was able to address
+    # the $(EXEEXT) errors for windows, but it still died in
+    # redhat 9 so I'm moving this call to below.
+    (cd platforms/mica/uisp; ./bootstrap)
+)
+
+rm -f config.cache $srcdir/config.cache
diff --git a/tools/Makefile.am b/tools/Makefile.am
new file mode 100644
index 00000000..680cd39d
--- /dev/null
+++ b/tools/Makefile.am
@@ -0,0 +1,4 @@
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = platforms tinyos
+
diff --git a/tools/README b/tools/README
new file mode 100644
index 00000000..81471a78
--- /dev/null
+++ b/tools/README
@@ -0,0 +1,13 @@
+This directory contains the tinyos tools that are distributed in the
+tinyos-tools package, along with the spec files for all tinyos packages
+(the release directory). 
+
+To install the tinyos tools from CVS, you must first prepare the
+configure scripts here and in platforms/mica/uisp:
+  ./Bootstrap
+  (cd platforms/mica/uisp;./bootstrap)
+
+Then you can configure, make and install as usual:
+  ./configure
+  make
+  make install
diff --git a/tools/build.xml b/tools/build.xml
new file mode 100644
index 00000000..31d57751
--- /dev/null
+++ b/tools/build.xml
@@ -0,0 +1,27 @@
+<project name="tinyos-2.x tools" default="all">
+
+	<target name="all" >
+		<echo message = "Building tinyos-2.x tools" />
+		<exec executable="./Bootstrap" failonerror="true">
+		</exec>
+		<exec executable="./configure" failonerror="true">
+			<arg  line="--quiet" />
+		</exec>
+		<exec executable="make" failonerror="true">
+			<arg line="all" />
+		</exec>
+	</target>
+
+	<target name="install" >
+		<echo message = "Installing tinyos-2.x tools" />
+		<exec executable="./Bootstrap" failonerror="true">
+		</exec>
+		<exec executable="./configure" failonerror="true">
+			<arg line="--prefix=/scratch/tos2_trial --quiet" />
+			</exec>
+		<exec executable="make" failonerror="true">
+			<arg line="install" />
+		</exec>
+	</target>
+
+</project>
diff --git a/tools/configure.ac b/tools/configure.ac
new file mode 100644
index 00000000..992d2a65
--- /dev/null
+++ b/tools/configure.ac
@@ -0,0 +1,156 @@
+#!/bin/sh
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+dnl -*- m4 -*-
+
+# force autoconf 2.5 on Debian systems
+AC_PREREQ(2.50)
+
+AC_INIT(tinyos-tools, 1.2.4)
+AC_CONFIG_AUX_DIR(config-aux)
+AM_INIT_AUTOMAKE
+AC_CANONICAL_HOST
+
+AC_PROG_CC
+AC_PROG_CXX
+AC_PROG_RANLIB
+
+AC_PATH_PROG(pathperl, perl)
+if test -z "$pathperl" ; then
+  AC_MSG_ERROR(I can't find perl); 
+fi
+
+AC_PATH_PROG(pathpython, python)
+if test -z "$pathpython" ; then
+  AC_MSG_ERROR(I can't find python); 
+fi
+
+if test -z "$NESCC_PREFIX"; then
+  AC_PATH_PROG(pathnescc, nescc)
+  if test -z "$pathnescc"; then
+    AC_MSG_ERROR(I can't find nescc)
+  else
+    NESCC_PREFIX=`dirname "$pathnescc"`
+    NESCC_PREFIX=`dirname "$NESCC_PREFIX"`
+  fi
+fi
+nescc_prefix=`(cd $NESCC_PREFIX;pwd)`
+AC_SUBST(nescc_prefix)
+
+
+if test -z "$DEFAULT_TARGET"; then
+  DEFAULT_TARGET=mica
+fi
+default_target=$DEFAULT_TARGET
+AC_MSG_NOTICE(Default ncc build target is $default_target)
+AC_MSG_NOTICE(...but using a tos/.default-platform file is a better choice)
+AC_SUBST(default_target)
+
+if test -z "$TOSDIR"; then
+  if test -d ../tos; then
+    TOSDIR=../tos
+  elif test -d ../../tos; then
+    TOSDIR=../../tos
+  elif test -d $HOME/nest/tos; then
+    TOSDIR=$HOME/nest/tos
+  else
+    AC_MSG_ERROR(I can't find the tos directory);
+  fi
+fi
+TOSDIR=`(cd $TOSDIR;pwd)`
+AC_MSG_NOTICE(TinyOS directory is $TOSDIR)
+AC_SUBST(TOSDIR)
+
+AC_MSG_CHECKING(for cygwin)
+case $host in
+  *-*-cygwin*)
+    AC_MSG_RESULT(yes)
+    JNIPREFIX=
+    JNISUFFIX=dll
+    JNIVERSIONS=.
+    INSTALLJNI="install --group=SYSTEM"
+    CYGWIN=yes
+    ;;
+  *-apple-darwin*)
+    JNIPREFIX=lib
+    JNISUFFIX=jnilib
+    JNIVERSIONS=.
+    INSTALLJNI="install"
+    AC_MSG_RESULT(no)
+    DARWIN=yes
+    ;;
+  *)
+    JNIPREFIX=lib
+    JNISUFFIX=so
+    JNIVERSIONS="-32. -64."
+    INSTALLJNI="install"
+    AC_MSG_RESULT(no)
+esac
+
+AM_CONDITIONAL([CYGWIN], [test "$CYGWIN"])
+AM_CONDITIONAL([DARWIN], [test "$DARWIN"])
+
+AC_MSG_CHECKING(for JDK location)
+JAVAC_DIR=`/bin/sh tinyos/misc/tos-locate-jre --javac`
+if test $? -ne 0; then
+  AC_ERROR(java not found)
+fi
+JDK=`dirname "$JAVAC_DIR"`
+AC_MSG_RESULT($JDK)
+
+function jnimap {
+  for v in $JNIVERSIONS; do
+    /bin/echo -n "${JNIPREFIX}$1$v$JNISUFFIX "
+  done
+}
+
+GETENVLIB=`jnimap getenv`
+TOSCOMMLIB=`jnimap toscomm`
+
+AC_SUBST(GETENVLIB)
+AC_SUBST(TOSCOMMLIB)
+AC_SUBST(JDK)
+AC_SUBST(INSTALLJNI)
+AC_SUBST(JNIPREFIX)
+AC_SUBST(JNISUFFIX)
+
+AC_CONFIG_SUBDIRS(platforms/mica/uisp)
+
+AC_OUTPUT(
+	Makefile
+	platforms/Makefile
+	platforms/mica/Makefile
+	platforms/mica/cc1000-channelgen/Makefile
+	platforms/msp430/Makefile
+	platforms/msp430/motelist/Makefile
+	platforms/msp430/pybsl/Makefile
+	platforms/msp430/pybsl/tos-bsl.1
+	platforms/msp430/pybsl/serial/Makefile
+	tinyos/Makefile
+	tinyos/java/Makefile
+	tinyos/java/env/Makefile
+	tinyos/java/serial/Makefile
+	tinyos/misc/tos-ident-flags
+	tinyos/misc/tos-install-jni
+	tinyos/misc/tos-set-symbols
+	tinyos/misc/tos-write-buildinfo
+	tinyos/misc/tos-write-image
+	tinyos/misc/tos-storage-at45db
+	tinyos/misc/tos-storage-stm25p
+	tinyos/misc/tos-storage-pxa27xp30
+	tinyos/misc/Makefile
+	tinyos/ncc/Makefile
+	tinyos/ncc/mig
+	tinyos/ncc/ncc
+	tinyos/ncc/ncg
+	tinyos/ncc/nesdoc
+	tinyos/ncc/nesdoc-py/Makefile
+	tinyos/tosthreads/Makefile
+	tinyos/safe/Makefile
+)
diff --git a/tools/platforms/.cvsignore b/tools/platforms/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/platforms/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/platforms/Makefile.am b/tools/platforms/Makefile.am
new file mode 100644
index 00000000..f61c1114
--- /dev/null
+++ b/tools/platforms/Makefile.am
@@ -0,0 +1,4 @@
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = mica msp430 sam3u
+
diff --git a/tools/platforms/intelmote2/openocd/imote2-ocd-program.py b/tools/platforms/intelmote2/openocd/imote2-ocd-program.py
new file mode 100755
index 00000000..2b6355fe
--- /dev/null
+++ b/tools/platforms/intelmote2/openocd/imote2-ocd-program.py
@@ -0,0 +1,164 @@
+#!/usr/bin/env python
+
+# imote2-ocd-program.py
+# 
+# This script programs an iMote2 connected to the local machine using 
+# 'openocd'. This is just a wrapper to openocd and the telnet session
+# used to issue the device halt, flash erase, and reprogram commands.
+# 
+# Usage:
+#   imote2-ocd-program.py [main.bin.out]
+#
+# The "main.bin.out" file is produced by compiling a TinyOS binary
+# using "make intelmote2" and will be located in the build/intelmote2
+# directory. If not provided on the command line, 
+# build/intemote2/main.bin.out is used by default.
+#
+# Requirements:
+#   - 'openocd' must be installed, on your PATH, and setuid root.
+#   - Assumes that the "arm-usb-tiny.cfg" file is in /usr/local/etc.
+
+import os,sys,time
+import os.path
+import signal
+import subprocess
+import tempfile
+import re
+import telnetlib
+
+CHIP_TIMEOUT = 4 # How long to wait for JTAG, in seconds
+
+def usage():
+    print "Usage: imote2-ocd-program.py [binfile]"
+    sys.exit(1)
+
+expect_found = False
+expect_timeout = False
+
+def alarmHandler(signum, frame):
+    expect_timeout = True
+
+# Wait until expected pattern is received on the given filehandle.
+def expect(fh, pat, timeout=10):
+    r = re.compile(pat)
+
+    expect_found = False
+    expect_timeout = False
+
+    if (timeout != -1):
+        signal.signal(signal.SIGALRM, alarmHandler)
+        signal.alarm(timeout)
+
+    while (not expect_found and not expect_timeout):
+        try:
+            line = fh.readline()
+        except:
+            # Possibly due to alarm
+            break
+        matches = r.findall(line)
+        if (len(matches) != 0):
+            expect_found = True
+            break
+
+    signal.alarm(0)
+    if (not expect_found):
+        raise RuntimeError, "Did not receive expected pattern '%s'" % pat
+
+def main(argv):
+    tn = None
+
+    if (len(argv) > 2): usage()
+
+    if (len(sys.argv) < 2):
+        binfile = "build/intelmote2/main.bin.out"
+    else:
+        binfile = argv[1]
+
+    # Check to make sure filename exists
+    if os.path.isfile(binfile) == False:
+        print '"%s" does not exist. Exiting.' % binfile
+        sys.exit()
+
+    tempfn = None
+    openocd_proc = None
+    telnet_proc = None
+
+    # Create a temporary file for the binary we want to install.
+    # (This way openocd can read the file from /tmp.)
+    tempfd, tempfn = tempfile.mkstemp(prefix="imote2-ocd-program")
+
+    try:
+        print "Programming imote2 with binary: %s" % binfile
+
+        # Kill off any openocd daemons running.
+        os.system("killall -q openocd")
+
+        os.close(tempfd)  # Don't need to keep temp file open
+
+        # Copy binary to temp file and set permissions correctly
+        os.system("/bin/cp %s %s" % (binfile, tempfn))
+        os.system("/bin/chmod 755 %s" % tempfn)
+
+        print "Starting OpenOCD..."
+        openocd_cmd = "openocd -f /usr/local/etc/arm-usb-tiny.cfg".split()
+        openocd_proc = subprocess.Popen(openocd_cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+        expect(openocd_proc.stderr, "JTAG device found:")
+
+        # Connect to openocd daemon
+        print "Connecting to OpenOCD..."
+
+        time.sleep(3)
+        tn = telnetlib.Telnet('localhost', 3333)
+
+        # Uncomment the following line for debugging output
+        #tn.set_debuglevel(10)
+
+        data = tn.read_until('>', CHIP_TIMEOUT)
+        if data == '':
+            print "Could not connect to OpenOCD."
+            sys.exit()
+        tn.write('reset\n')
+        tn.read_until('(processor reset)')
+
+        print "Halting device..."
+        tn.read_until('>')
+        tn.write('halt\n')
+
+        print "Erasing flash..."
+        tn.read_until('>')
+        tn.write("flash protect 0 0 10 off\n")
+        tn.read_until("cleared protection for sectors 0 through 10 on flash bank 0")
+        tn.read_until('>')
+        tn.write("flash erase_sector 0 0 10\n")
+        tn.read_until("erased sectors 0 through 10 on flash bank 0")
+
+        print "Writing image..."
+        tn.read_until('>')
+        tn.write('flash write_image %s\n' % (tempfn))
+        tn.read_until('wrote')
+
+        print "Resuming device..."
+        tn.read_until('>')
+        tn.write('reset\n')
+        tn.read_until('(processor reset)')
+        tn.read_until('>')
+        tn.write('resume\n')
+        tn.read_until('>')
+
+        tn.close()
+
+    finally:
+        # Do all cleanup here
+        print "Doing cleanup..."
+        if (tn != None): 
+            try:
+                tn.close()
+            except:
+                # Ignore
+                pass
+        if (openocd_proc != None): os.kill(openocd_proc.pid, 2)
+        if (tempfn != None): os.unlink(tempfn)
+
+if __name__ == "__main__":
+    main(sys.argv)
+
diff --git a/tools/platforms/mica/.cvsignore b/tools/platforms/mica/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/platforms/mica/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/platforms/mica/Makefile.am b/tools/platforms/mica/Makefile.am
new file mode 100644
index 00000000..5ce734ea
--- /dev/null
+++ b/tools/platforms/mica/Makefile.am
@@ -0,0 +1,3 @@
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = cc1000-channelgen uisp
diff --git a/tools/platforms/mica/cc1000-channelgen/.cvsignore b/tools/platforms/mica/cc1000-channelgen/.cvsignore
new file mode 100644
index 00000000..3f3c51a2
--- /dev/null
+++ b/tools/platforms/mica/cc1000-channelgen/.cvsignore
@@ -0,0 +1,4 @@
+Makefile
+Makefile.in
+.deps
+tos-channelgen
diff --git a/tools/platforms/mica/cc1000-channelgen/Makefile.am b/tools/platforms/mica/cc1000-channelgen/Makefile.am
new file mode 100644
index 00000000..4ebf65dd
--- /dev/null
+++ b/tools/platforms/mica/cc1000-channelgen/Makefile.am
@@ -0,0 +1,9 @@
+AUTOMAKE_OPTIONS = foreign
+
+dist_man_MANS = tos-channelgen.1
+
+bin_PROGRAMS=tos-channelgen
+
+all: $(EXES)
+
+tos_channelgen_SOURCES = tos-channelgen.c
diff --git a/tools/platforms/mica/cc1000-channelgen/tos-channelgen.1 b/tools/platforms/mica/cc1000-channelgen/tos-channelgen.1
new file mode 100644
index 00000000..bd2d705a
--- /dev/null
+++ b/tools/platforms/mica/cc1000-channelgen/tos-channelgen.1
@@ -0,0 +1,18 @@
+.TH tos-channelgen 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-channelgen - Calculate valid CC1000 radio channels
+.SH SYNOPSIS
+
+\fBtos-channelgen\fR [\fB-p\fR] \fIfrequency\fR
+.SH DESCRIPTION
+
+\fBtos-channelgen\fR computes the CC1000 channel which is closest to the
+requested \fIfrequency\fR. With the \fB-p\fR option, \fBtos-channelgen\fR
+prints a table (suitable for use in a C initialiser) containing all the
+CC1000 settings for the channel.
+.SH EXAMPLES
+
+  tos-channelgen 916000000
+  tos-channelgen -p 433000000
diff --git a/tools/platforms/mica/cc1000-channelgen/tos-channelgen.c b/tools/platforms/mica/cc1000-channelgen/tos-channelgen.c
new file mode 100644
index 00000000..4520bfff
--- /dev/null
+++ b/tools/platforms/mica/cc1000-channelgen/tos-channelgen.c
@@ -0,0 +1,320 @@
+// $Id: tos-channelgen.c,v 1.4 2006-12-12 18:23:00 vlahan Exp $
+
+/* -*- Mode: C; c-basic-indent: 2; indent-tabs-mode: nil -*- */
+/*									
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * Author:	Phil Buonadonna
+ * Revision:	$Id: tos-channelgen.c,v 1.4 2006-12-12 18:23:00 vlahan Exp $
+ * 
+ */
+
+/*
+ * This tool provides two things:
+ *  1) To verify the actual channel generated by the component function
+ *     CC1000Control.TuneManual(freq)  The computation engine used in
+ *     this program is EXACTLY the same as it is for the on-device
+ *     stack and should generate the same result.
+ * 
+ *  2) To generate a C-code preset-table entry for a given frequency.
+ * 
+ * The assumptions used are:
+ *  XOSC Freq           - 14.745600 MHz
+ *  Separation Freq     - 64 KHz
+ *  IF                  - 150 KHz
+ *  LO Injection        - High Side
+ *  Baud Rate           - 38.4 Kbaud (19.2 realized w/ Manchester Encoding)
+ */
+
+#include <stdio.h>
+#ifndef __CYGWIN__
+#include <inttypes.h>
+#endif
+
+char gfPrintPreset = 0;
+
+enum {
+  IF = 150000,
+  FREQ_MIN = 4194304,
+  FREQ_MAX = 16751615
+};
+
+
+const uint32_t FRefTbl[9] = {2457600,
+			     2106514,
+			     1843200,
+			     1638400,
+			     1474560,
+			     1340509,
+			     1228800,
+			     1134277,
+			     1053257};
+
+const uint16_t CorTbl[9] = {1213,
+			    1416,
+			    1618,
+			    1820,
+			    2022,
+			    2224,
+			    2427,
+			    2629,
+			    2831};
+
+const uint16_t FSepTbl[9] = {0x1AA,
+			     0x1F1,
+			     0x238,
+			     0x280,
+			     0x2C7,
+			     0x30E,
+			     0x355,
+			     0x39C,
+			     0x3E3};
+
+uint32_t cc1000ComputeFreq(uint32_t desiredFreq) {
+  uint32_t ActualChannel = 0;
+  uint32_t RXFreq = 0, TXFreq = 0;
+  int32_t Offset = 0x7fffffff;
+  uint16_t FSep = 0;
+  uint8_t RefDiv = 0;
+  uint8_t i;
+
+  for (i = 0; i < 9; i++) {
+
+    uint32_t NRef = ((desiredFreq + IF));
+    uint32_t FRef = FRefTbl[i];
+    uint32_t Channel = 0;
+    uint32_t RXCalc = 0, TXCalc = 0;
+    int32_t  diff;
+
+    NRef = ((desiredFreq + IF) << 2) / FRef;
+    if (NRef & 0x1) {
+      NRef++;
+    }
+
+    if (NRef & 0x2) {
+      RXCalc = 16384 >> 1;
+      Channel = FRef >> 1;
+    }
+
+    NRef >>= 2;
+
+    RXCalc += (NRef * 16384) - 8192;
+    if ((RXCalc < FREQ_MIN) || (RXCalc > FREQ_MAX)) 
+      continue;
+    
+    TXCalc = RXCalc - CorTbl[i];
+    if ((TXCalc < FREQ_MIN) || (TXCalc > FREQ_MAX)) 
+      continue;
+
+    Channel += (NRef * FRef);
+    Channel -= IF;
+
+    diff = Channel - desiredFreq;
+    if (diff < 0)
+      diff = 0 - diff;
+
+    if (diff < Offset) {
+      RXFreq = RXCalc;
+      TXFreq = TXCalc;
+      ActualChannel = Channel;
+      FSep = FSepTbl[i];
+      RefDiv = i + 6;
+      Offset = diff;
+    }
+
+  }
+
+  if (RefDiv != 0) {
+    uint8_t ucRxVcoCurrent, ucRxLoDrive, ucRxMatch;
+    uint8_t ucTxVcoCurrent, ucTxPaDrive;
+    uint8_t ucBufCurrent, ucLNACurrent; 
+    if (ActualChannel < 500000000) {
+      if (ActualChannel < 400000000) {
+        // CURRENT (RX)
+        //gCurrentParameters[0x9] = ((8 << CC1K_VCO_CURRENT) | (1 << CC1K_LO_DRIVE));
+        ucRxVcoCurrent = 8; ucRxLoDrive = 1;
+        // CURRENT (TX)
+        //gCurrentParameters[0x1d] = ((9 << CC1K_VCO_CURRENT) | (1 << CC1K_PA_DRIVE));
+        ucTxVcoCurrent = 9; ucTxPaDrive = 1;
+      }
+      else {
+        // CURRENT (RX)
+        // gCurrentParameters[0x9] = ((4 << CC1K_VCO_CURRENT) | (1 << CC1K_LO_DRIVE));
+        ucRxVcoCurrent = 4; ucRxLoDrive = 1;
+        // CURRENT (TX)
+        // gCurrentParameters[0x1d] = ((8 << CC1K_VCO_CURRENT) | (1 << CC1K_PA_DRIVE));
+        ucTxVcoCurrent = 8; ucTxPaDrive = 1;
+      }
+      // FRONT_END
+      //gCurrentParameters[0xa] = (1 << CC1K_IF_RSSI); 
+      ucBufCurrent = 0; ucLNACurrent = 0;
+      // MATCH
+      //gCurrentParameters[0x12] = (7 << CC1K_RX_MATCH);
+      ucRxMatch = 7;
+    }
+    else {
+      // CURRENT (RX)
+      // gCurrentParameters[0x9] = ((8 << CC1K_VCO_CURRENT) | (3 << CC1K_LO_DRIVE));
+      ucRxVcoCurrent = 8; ucRxLoDrive = 3;
+      // CURRENT (TX)
+      // gCurrentParameters[0x1d] = ((15 << CC1K_VCO_CURRENT) | (3 << CC1K_PA_DRIVE));
+      ucTxVcoCurrent = 15; ucTxPaDrive = 3;
+      // FRONT_END
+      //gCurrentParameters[0xa] = ((1<<CC1K_BUF_CURRENT) | (2<<CC1K_LNA_CURRENT) | (1<<CC1K_IF_RSSI));
+      ucBufCurrent = 1; ucLNACurrent = 2;
+      // MATCH
+      //gCurrentParameters[0x12] = (2 << CC1K_RX_MATCH);
+      ucRxMatch = 2;
+    }
+
+    // PLL
+    //gCurrentParameters[0xc] = (RefDiv << CC1K_REFDIV);
+
+    if (!gfPrintPreset) {
+      printf("\n");
+      printf("DesiredFreq(Hz)\tActualFreq(Hz)\tOffset(Hz)\n");
+      printf("-----------------------------------------------------------------------\n");
+      printf("%d\t",desiredFreq);
+      printf("%d\t",ActualChannel);
+      printf("%d\n\n",Offset);
+    }
+    else {
+      
+      printf("// %f MHz Channel, 19.2 Kbps data, Manchester Encoding, High Side LO\n",
+             ((float)ActualChannel/1.0e6));
+      printf("{\n ");
+      // MAIN
+      printf("0x31,\n ");
+      // FREQA
+      printf("0x%x,",(uint8_t)((RXFreq >> 16) & 0xFF));  // MSB
+      printf("0x%x,",(uint8_t)((RXFreq >> 8) & 0xFF));
+      printf("0x%x,\n ",(uint8_t)((RXFreq) & 0xFF));  // LSB
+      // FREQB
+      printf("0x%x,",(uint8_t)((TXFreq >> 16) & 0xFF));  // MSB
+      printf("0x%x,",(uint8_t)((TXFreq >> 8) & 0xFF));
+      printf("0x%x,\n ",(uint8_t)((TXFreq) & 0xFF)); // LSB
+      // FSEP
+      printf("0x%x,",(uint8_t)((FSep >> 8) & 0xFF)); //MSB
+      printf("0x%x,\n ",(uint8_t)((FSep) & 0xFF));  // LSB
+      // CURRENT (RX)
+      printf("((%d << CC1K_VCO_CURRENT) | (%d << CC1K_LO_DRIVE)), \n ",ucRxVcoCurrent,ucRxLoDrive);
+      // FRONT_END
+      printf("((%d<<CC1K_BUF_CURRENT) | (%d<<CC1K_LNA_CURRENT) | (1<<CC1K_IF_RSSI)), \n ",
+             ucBufCurrent,ucLNACurrent);
+      // PA_POW
+      printf("((0x8<<CC1K_PA_HIGHPOWER) | (0x0<<CC1K_PA_LOWPOWER)),\n ");
+      // PLL
+      printf("((%d<<CC1K_REFDIV)),\n ",RefDiv);
+      // LOCK
+      printf("((0x1<<CC1K_LOCK_SELECT)),\n ");
+      // CAL
+      printf("((1<<CC1K_CAL_WAIT) | (6<<CC1K_CAL_ITERATE)),\n ");
+      // MODEM2
+      printf("((0<<CC1K_PEAKDETECT)),\n ");
+      // MODEM1
+      printf("((3<<CC1K_MLIMIT) | (1<<CC1K_LOCK_AVG_MODE) | (3<<CC1K_SETTLING) | (1<<CC1K_MODEM_RESET_N)),\n ");
+      // MODEM0
+      printf("((5<<CC1K_BAUDRATE) | (1<<CC1K_DATA_FORMAT) | (1<<CC1K_XOSC_FREQ)),\n ");
+      // MATCH
+      printf("((%d<<CC1K_RX_MATCH) | (0<<CC1K_TX_MATCH)),\n ",ucRxMatch);
+      // FSCTRL
+      printf("((1<<CC1K_FS_RESET_N)),\n ");
+      // FSHAPE7 - FSHAPE1
+      printf("0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n ");
+      // FSDELAY
+      printf("0x00,\n ");
+      // PRESCALER 
+      printf("0x00,\n ");
+      // CURRENT (TX) 
+      printf("((%d << CC1K_VCO_CURRENT) | (%d << CC1K_PA_DRIVE)), \n ",ucTxVcoCurrent,ucTxPaDrive);
+      // Injection Mode
+      printf("TRUE\n},");
+    }
+  }
+
+  //gCurrentChannel = ActualChannel;
+  return ActualChannel;
+
+}
+
+
+void PrintUsage(char *ProgName) {
+  printf ("Usage: %s [OPTIONS] FREQUENCY\n",ProgName);
+  printf ("Determine CC1000 actual channel frequency and preset constants for\n");
+  printf ("desired FREQUENCY (in Hz).\n");
+  printf ("\n");
+  printf ("-p\t Generate formatted C preset table entry\n");
+  printf ("\n");
+  printf ("Report bugs to <tinyos@millennium.berkeley.edu>\n");
+}
+
+int main(int argc, char **argv) {
+
+  uint32_t DesiredFreq;
+  uint32_t ActualFreq;
+  char *szProgName = argv[0];
+  char cOption;
+
+  if (argc < 2) {
+    PrintUsage(szProgName);
+    return 0;
+  }
+
+  while ((--argc > 0) && ((*++argv)[0] == '-')) {
+    while (cOption = *++argv[0]) {
+      switch (cOption) {
+      case 'p':
+        gfPrintPreset = 1;
+        break;
+      default:
+        PrintUsage(szProgName);
+        return 0;
+      }
+    }
+  }
+
+  DesiredFreq = atoi(argv[0]);
+
+  if ((DesiredFreq < 300000000) || (DesiredFreq > 1000000000)) {
+    fprintf(stderr,"Frequency %d not in range 300000000 Hz - 1000000000 Hz\n",DesiredFreq);
+    return 0;
+  }
+
+  ActualFreq = cc1000ComputeFreq(DesiredFreq);
+
+  return 0;
+
+}
+
diff --git a/tools/platforms/mica/uisp/.cvsignore b/tools/platforms/mica/uisp/.cvsignore
new file mode 100644
index 00000000..d8b16eb9
--- /dev/null
+++ b/tools/platforms/mica/uisp/.cvsignore
@@ -0,0 +1,13 @@
+.dates-set
+Makefile
+Makefile.in
+aclocal.m4
+config
+autom4te.cache
+config.log
+config.status
+uisp.1
+kernel
+uisp.spec
+config.cache
+configure
diff --git a/tools/platforms/mica/uisp/AUTHORS b/tools/platforms/mica/uisp/AUTHORS
new file mode 100644
index 00000000..4388bf49
--- /dev/null
+++ b/tools/platforms/mica/uisp/AUTHORS
@@ -0,0 +1,26 @@
+This version is a patch of the regular uisp distribution, maintained by
+	Phil Buonadonna (pbuonado@intel-research.net)
+	David Gay (dgay@intel-research.net)
+
+The regular distibution is:
+
+Original Author: Uros Platise
+
+Current maintainers: 
+
+	Marek Michalkiewicz <marekm@amelek.gda.pl>
+	Theodore A. Roth <troth@openavr.com>
+
+Contributors:
+
+	Dean Ferreyra <dferreyra@igc.org>
+	Daniel Berntsson <danbe628@student.liu.se>
+	Jason Kyle <jpk@jpk.co.nz>
+	Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
+	Bryce Denney <bryce@tlw.com>
+	Alexander Popov <sasho@vip.orbitel.bg>
+	Hamish Moffatt <hamish@cloud.net.au>
+
+If you have made contributions and your name is missing, send an email saying
+so to <uisp-dev@nongnu.org>.
+
diff --git a/tools/platforms/mica/uisp/CHANGES b/tools/platforms/mica/uisp/CHANGES
new file mode 100644
index 00000000..b436b0b2
--- /dev/null
+++ b/tools/platforms/mica/uisp/CHANGES
@@ -0,0 +1,184 @@
+From 20020524 on, see the ChangeLog file.
+
+The project is now hosted on http://savannah.gnu.org/projects/uisp/ .
+
+Changes in uisp-20020524:
+ - add (GPL) copyright notices to all files, as required before the project
+   can be added to savannah.gnu.org (again, thanks to Theodore A. Roth)
+ - add preliminary ATmega8515 and ATmega162 support (untested, not yet
+   supported by pavr/stk500, just added signature bytes to the list)
+ - add a few items to the TODO list :)
+
+Changes in uisp-20020420:
+ - add preliminary ATtiny26 and ATmega32 support (untested, not yet
+   supported by pavr/stk500)
+ - another parallel port programmer (MAXI - http://www.invtech.com.au/),
+   thanks to Hamish Moffatt <hamish@cloud.net.au>
+ - fix upload/verify of >64K srec/ihex files,
+   fix STK500 swapped signature bytes, and
+   support case-insensitive AVR device names,
+   thanks to Theodore A. Roth <troth@openavr.org>
+ - ATtiny15 has a calibration byte, too (was not in an older version of
+   the datasheet), thanks to Alexander Popov <sasho@vip.orbitel.bg>
+
+Changes in uisp-20020303:
+ - add support for fuse bits with avr910/pavr programmers, and fix NULL
+   pointer segfaults with no -dprog, thanks to Bryce Denney <bryce@tlw.com>
+
+Changes in uisp-20011025:
+ - DASA2 (aka PonyProg interface) fixes (thanks to Uwe Bonnes):
+   AVR RESET# = inverted TXD (so sending BREAK resets the AVR)
+   -dinvert=sck,miso,mosi,reset (invert each specified line)
+   -dt_reset=N (reset inactive high time in microseconds)
+ - add S2/S3 record support necessary for ATmega103 (thanks to Uwe Bonnes)
+ - add ATmega64 to the device table (untested)
+ - read/write ATmega64/128 extended fuse bits (untested, no pavr support yet)
+ - tested on ATmega323 (thanks to Lars Thore W. Aarrestad <ltwa@atmel.com>
+   for sending me samples)
+
+Changes in uisp-20011006:
+ - add ATmega103-old back (bad sig bytes), these chips still exist :)
+ - comment out free(argv_ok) to work around a segfault
+
+Changes in uisp-20010909:
+ - add preliminary ATmega8/ATmega16/ATmega128 support based on recently
+   released datasheets (not tested, no extended fuse bits, no pavr yet)
+ - add support for yet another parallel port cable (DT006)
+ - include pavr firmware source (hacked a little by me) as part of uisp
+   (should also work in existing old "Atmel low cost" programmers after
+   1200 -> 2313 upgrade, assuming the original 1200 was in a socket...)
+
+Changes in uisp-20010818:
+ - clear O_NONBLOCK flag with fcntl() instead of re-opening serial ports
+   (failed with "Permission denied" on Cygwin, reported by Jason Kyle)
+ - enable direct serial support only if TIOCMGET is defined, remove dummy
+   TIOCM* defines added for Cygwin port
+
+Changes in uisp-20010813:
+ - STK500 support (not yet complete, reverse-engineered communication
+   protocol), thanks to Daniel Berntsson <danbe628@student.liu.se>
+ - Win9x/ME/NT/2K (Cygwin) port (needs the giveio.sys driver for direct
+   I/O port access), thanks to Dean Ferreyra <dferreyra@igc.org>
+
+Changes in uisp-20010805:
+ - fix recent termios changes (forgot to clear CRTSCTS and set VMIN, VTIME),
+   also now set termios modes for dasa, dasa2 (still untested)
+ - rename ATmega32 to ATmega323 (now that the official datasheet is out)
+ - accept -dprog=pavr (for now as alias for -dprog=avr910, but may include
+   more features in the future, see http://avr.jpk.co.nz/pavr/pavr.html)
+
+Changes in uisp-20010715:
+ - rename AVR3 to FBPRG (-dprog=fbprg), as it seems that smartcard
+   development boards might have illegal uses in some countries ;)
+ - fix avr910 page write for ATmega163 (please test ATmega103 too!)
+ - save/restore termios modes on serial ports, please test
+ - change -datmel to -dprog=avr910
+ - uisp --help now prints to stdout, not stderr
+ - change #include <string> to #include <string.h>
+ - #include <string.h> in Terminal.C
+ - fix -dspeed handling in Serial.C
+
+Changes in uisp-20010701:
+ - fix compile with g++ 3.0
+ - fix Programming Enable error message after 32 retries
+ - add yet another parallel port interface (FBPRG/AVR3)
+ - more about --download of=file in uisp --help
+
+Changes in uisp-20010616:
+ - hopefully fix serial support (can't test), broken by my 20010211 -dpart
+   changes, in code common to both serial and parallel modes that use
+   different AVR device names :(
+ - CHANGES -> CHANGES.old, README -> CHANGES, TODO
+ - document FBPRG interface (not yet supported), and possible new design
+   using tables to make adding these new cables easier, in DAPA.C comments
+
+Changes in uisp-20010501:
+ - direct serial support: -dlpt=/dev/ttyS0 -dprog=dasa (or dasa2, see help)
+   warning: completely untested, might or might not work
+ - incompatible change: programmer type (for all these dummy parallel and
+   serial programmers) is specified with -dprog=... (-dstk200 etc. is gone)
+ - more portability changes (please test especially on non-x86 Linux and
+   FreeBSD, and send me patches if I broke something...)
+ - fix AT90S2323 signature byte (0x02 not 0x04)
+ - increase SCK delay (4us to 5us) for devices with slow RC oscillators
+ - don't skip 0xFF for page write
+ - fix a few typos
+ - remove OLD_DELAY_LOOP
+ - longer timeout for -datmel (500ms -> 1s)
+
+Changes in uisp-20010211:
+ - now available from http://www.amelek.gda.pl/avr/uisp/ and
+   officially maintained by me (many thanks to Uros for all previous work)
+ - device type can be specified if auto-detection fails, necessary for
+   AT90S1200 and other parts with erased signature bytes: -dpart=at90s1200
+ - assume -dno-retry -dno-poll for AT90S1200 (data polling should work
+   according to the datasheet, but bug reports indicate it doesn't, and
+   1K of program memory doesn't take that long to write anyway...)
+ - support for yet another AVR ISP parallel port cable (not tested),
+   based on information from http://www.bsdhome.com/avrprog/
+ - FreeBSD support (not tested, uncomment -DHAVE_PPI in the Makefile
+   and tell me if it works, or send me a patch if it doesn't :)
+
+Changes in uisp-20001216:
+ - ATmega163 now supported, and tested (many thanks to Odd Jostein Svendsli
+   of Atmel Norway for help - sending me two samples of these new chips)
+ - reading Flash and EEPROM contents to a srec file (--download of=file)
+ - read/write fuse bits and boot lock bits, read calibration byte (use
+   --segment=fuse, address 0 = fuse low, 1 = fuse high, 2 = calibration,
+   3 = lock bits: 1 1 BLB12 BLB11 BLB02 BLB01 LB2 LB1)
+ - data polling with page write, if supported by device
+ - added timer{add,sub,cmp} macros for systems that don't have them
+ - security fix, drop privileges before opening the serial device too
+   (warning: installation setuid root still not recommended, these are
+   just random fixes, and not a complete review for security holes;
+   using ppdev instead of direct I/O is highly recommended)
+
+Changes in uisp-20001125:
+ - fix a bug where erasing a locked device (not possible to identify)
+   might fail, now always wait 200 ms for chip erase
+ - add support for "Atmel AVR ISP" parallel port cable
+ - various cleanups (duplicated code to report statistics, etc.)
+
+Changes in uisp-20001118:
+ - make it possible to compile without direct I/O port access for non-PC
+   architectures, but still allow parallel port access via /dev/parportX
+   (Linux ppdev driver)
+ - include the latest ppdev driver (kernel patch) for Linux 2.2.17
+ - security: drop privileges before opening /dev/parportX (only matters
+   if accidentally installed setuid root - still not recommended!)
+ - data polling statistics reworked: min/avg/max ms/byte (so you can
+   compare them with datasheet specs - maybe it helps in detecting chips
+   that were programmed too many times)
+ - fix a longstanding bug in data polling that caused random programming
+   failures (could be worked around by specifying longer t_wd_flash -
+   no, that really wasn't the chips failing :)
+ - update write timing specs from the current datasheets (flash 8ms -> 4ms
+   for most chips, programs a bit faster - now that the above bug is gone)
+ - add more device codes for "Atmel low cost" (serial port) programmer
+   (still looking for updated avr910.asm - it must exist somewhere, as
+   avrprog.exe from AVR Studio claims to support all devices...)
+ - started work on fuse bits (not finished yet), will be needed for
+   ATmega163 (internal RC oscillator enabled by default)
+
+Changes in uisp-20001014:
+ - fix some stupid bugs (SCK delay, writing lock bits)
+ - avoid "invalid parameter" errors for -dt_wd_flash etc. if device locked
+ - updated help and version information
+
+Changes in uisp-20000930:
+ - compiles with g++ 2.95.2 (tested on Debian 2.2), does not depend on
+   kernel header files for parallel port bit definitions
+ - as in PonyProg, support for the "ppdev" Linux driver (included in
+   pre-2.4.0 kernels, available separately for 2.2.x - please bug Alan
+   to add it to 2.2.18 :), as well as the old direct I/O port access
+   (works with any kernel, but requires root privileges)
+ - more reliable delays on very fast machines, using gettimeofday()
+   (programming may be very slow on <=486 but should work otherwise)
+ - support for more new devices, such as ATmega161 (not tested)
+ - support for programming lock bits with --lock option (currently
+   only both at the same time, and no ATmega161 BLBxx bits yet)
+ - when not programming, try to disable (PS/2) parallel port data outputs -
+   this may allow cheap cables (no 74HC244 inside) to work if the ISP pins
+   are also used for other things (not tested)
+ - removed endian_bug backwards compatibility, various other cleanups
+
diff --git a/tools/platforms/mica/uisp/COPYING b/tools/platforms/mica/uisp/COPYING
new file mode 100644
index 00000000..60549be5
--- /dev/null
+++ b/tools/platforms/mica/uisp/COPYING
@@ -0,0 +1,340 @@
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
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+ Everyone is permitted to copy and distribute verbatim copies
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+
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+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
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+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) 19yy name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.
diff --git a/tools/platforms/mica/uisp/ChangeLog b/tools/platforms/mica/uisp/ChangeLog
new file mode 100644
index 00000000..5faa48a8
--- /dev/null
+++ b/tools/platforms/mica/uisp/ChangeLog
@@ -0,0 +1,473 @@
+2003-06-20  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in: Bump version (back to cvs track).
+	* src/DAPA.C: There's some bug in recent linux kernels which makes
+	ioperm I/O port permission changes be delayed (you get a segmentation
+	fault at the instruction accessing the I/O port). May be related to
+	this: http://www.securitytracker.com/alerts/2003/May/1006778.html.
+	Known to affect RedHat's 2.4.20-13.9 kernel.
+	[Thanks to David Gay <dgay@intel-research.net> for finding and fixing
+	this and for the link.]
+
+2003-06-18: Theodore A. Roth  <troth@openavr.org>
+
+	* Release 20030618.
+
+2003-06-18  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Cut 20030618 release.
+	* NEWS: Minor update to note release.
+
+2003-05-27  Theodore A. Roth  <troth@openavr.org>
+
+	* Makefile.am (EXTRA_DIST): Add doc/uisp-parport-connect.txt.
+	* doc/uisp-parport-connect.txt: Add note about mega128 PDI/PDO pins.
+
+2003-05-27  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* TODO: Add note about fuse and lock bits.
+	* doc/uisp-parport-connect.txt: New file (found on net).
+
+2003-05-18  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* NEWS: Fix spelling mistake.
+
+2003-05-13  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in: Update copyright year.
+	* src/Avr.C: Ditto.
+	* src/Avr.h: Ditto.
+	* src/DAPA.C: Ditto.
+	* src/DAPA.h: Ditto.
+	* src/Error.h: Ditto.
+	* src/MotIntl.C: Ditto.
+	* src/Serial.C: Ditto.
+
+2003-05-12  Theodore A. Roth  <troth@openavr.org>
+
+	* uisp.1.in: Added new options.
+	If an option takes an argument, show what it should be.
+	* src/Main.C: Make a few usage notes more verbose to clarify some
+	of the options.
+
+2003-05-12  Theodore A. Roth  <troth@openavr.org>
+
+	* uisp.1.in: Update pavr URL.
+	Update bsd URL.
+	Update bug report email address.
+	Update download URL.
+
+2003-05-12  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/DAPA.C: Fix a bug in which setting -dlpt=<port_number> for
+	direct IO tries to open the default port name instead of the direct
+	port. [Thanks to Pavel Celeda for reporting the problem and isolating
+	a fix.]
+
+2003-05-10  Theodore A. Roth  <troth@openavr.org>
+
+	* src/Main.C: Update URLs for pavr and bsd programmers.
+	s/Futurtec/Futurlec/ for ett programmer.
+	* TODO: Update pavr URL.
+
+2003-05-10  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/Serial.C: Fix select() failure on cygwin due to use of 
+	getdtablesize() function. [Thanks to Marc Wetzel for the fix and
+	Jason Kyle for reporting.]
+
+2003-05-08  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* NEWS: Add note about pagesize fix.
+	* src/Stk500.C: Fix num fuse bytes for mega162/mega169/mega103.
+	When writing a page to the stk500, set the pagesize based on the
+	pagesize parameter or if the parameter is zero, to 128 (this was
+	causing programming of a 1200 to hang since the pagesize was
+	fixed at 256 which was too long).
+
+2003-05-08  Theodore A. Roth  <troth@openavr.org>
+
+	* src/Avr.C: Mega162 has 3 fuse bytes, so set flags to AVR_M128
+	instead of AVR_M163. [Thanks to John Norgaard for reporting this.]
+
+2003-05-05  Theodore A. Roth  <troth@openavr.org>
+
+	* src/Stk500.C: Add a unique string to some "Device is not responding
+	correctly." error messages.
+
+2003-05-04  Theodore A. Roth  <troth@openavr.org>
+
+	* NEWS: New file.
+
+2003-04-18  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* TODO: Updated.
+	* src/DAPA.C: Handle TIOCMGET #ifdef's so that enum values are still
+	valid in switch statements.
+	Also, add check to see if TIOCCBRK is defined before using it. (This
+	was causing the build to fail on cygwin.
+
+2003-04-16  Theodore A. Roth  <troth@openavr.org>
+
+	* src/DAPA.C:
+	* src/Error.h:
+	* src/Main.C:
+	* src/MotIntl.C:
+	* src/Serial.C:
+	When throwing an Error_C, pass an argument so that the user has a
+	clue as to the cause of the failure. (Maybe the user won't then have
+	to spend two hours looking for what went wrong. *cough*)
+
+2003-03-24  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in: Add check for strtod function.
+	* src/MotIntl.C: Calculate ihex checksum even on ignored records.
+	[submitted by Pavel Celeda <ceba@vabo.cz>] [patch #1322]
+	* src/Stk500.C: Use strtod() instead of strtof() [strtof isn't
+	available when using gcc-2.95.x (debian)]
+
+2003-03-11  Theodore A. Roth  <troth@openavr.org>
+
+	* CHANGES:
+	* ChangeLog:
+	* uisp.spec.in:
+	* doc/HOWTO.windows:
+	Update all occurences of my email address.
+
+2003-03-02  Theodore A. Roth  <troth@openavr.org>
+[Thanks to Richard Barrington <richard@freedomwigs.com>]
+
+	* src/DAPA.C: Add support for Futurlec ETT parallel port programmer.
+	* src/DAPA.h: Ditto.
+	* src/Main.C: Add note about ETT programmer to Usage().
+
+2003-03-02  Theodore A. Roth  <troth@openavr.org>
+[Thanks to Klaus Rudolph <lts-rudolph@gmx.de> as this is based on his patch]
+
+	* src/Main.C: Add --{rd,wr}_{aref,vtg} options to Usage().
+	* src/Stk500.C: Add read/write of aref and vtg voltages.
+	* src/Stk500.h: Add ReadParam() and WriteParam() prototypes.
+
+2003-02-21  Theodore A. Roth  <troth@openavr.org>
+
+	* src/Main.C: Update copyright year.
+
+2003-02-20  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* uisp.1.in: Fix -v option so max is 4.
+
+2003-02-19  Theodore A. Roth  <troth@openavr.org>
+
+	* AUTHORS: Update email addresses.
+	* src/Avr.C: Remove const from parts array so we can change some values
+		at runtime.
+	* src/Avr.h: Ditto.
+	* src/Main.C: Add command switch '-dparallel' for stk500.
+	Fix -v option when printing help to note max is 4 instead of 3.
+	Update email and URL addresses.
+	* src/Stk500.C: Rename VerifyPresense() to Initialize().
+	Remove const from prg_part[] array so we can change some values
+	    at runtime.
+	Before calling Initialize() process the -dparallel option.
+	* src/Stk500.h: Rename VerifyPresense() to Initialize().
+	Remove const from prg_part[] array so we can change some values
+	        at runtime.
+
+2003-02-19  Theodore A. Roth  <troth@openavr.org>
+
+	* src/Stk500.C: Add support for firmware version 1.14.
+	Add support for at90s8534, mega8515, mega8535, mega32.
+	* src/Stk500.h: Remove cmd, len and sync from SPrgExtDevParams struct
+	since its len varies depending on the firmware version.
+
+2003-02-18  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/Avr.C: Add support for mega169.
+	* src/Stk500.C: Add support for mega162 and mega169.
+
+2003-02-17  Theodore A. Roth  <troth@openavr.org>
+
+	* src/Stk500.C: Change MagicNumber to ExtDevParams (see appnote AVR061).
+	Add ext dev params initialization to prg_part structure init.
+	Wrap a few line strings.
+	Change the "Device is not responding correctly." error messages so we
+		can tell where they originated in the code.
+	Add VerifyPresense() method: does most of what was in 
+		EnterProgrammingMode().
+	Simplify EnterProgrammingMode(): doesn't really need to set the params
+		every time it's called.
+	* src/Stk500.h: Add struct SPrgExtDevParams.
+	Remove MagicNumber.
+	Add VerifyPresense() method prototype.
+
+2003-02-17  Theodore A. Roth  <troth@openavr.org>
+
+	* src/timeradd.h: Fix some typos in timeradd & timersub macros.
+
+2003-02-17  Theodore A. Roth  <troth@openavr.org>
+
+	* src/Terminal.C: Remove C++ iostream usage since this was the only
+	file to use it and it was not consistently used.
+
+2003-02-15  Theodore A. Roth  <troth@openavr.org>
+
+	* src/Stk500.C: Add support for mega16.
+
+2003-02-15  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* pavr/Makefile: Create .lst file.
+	Change default lpt port to parport0.
+	* pavr/pavr.c: Use latest avr-libc headers.
+	* src/Stk500.C: Print out the version of the stk500 firmware.
+
+2002-12-19  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/Stk500.C: Add struct entry for mega8.
+
+2002-12-01  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Reset version to 20021201cvs.
+
+2002-12-01  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Cut 20021201 release.
+
+2002-11-22  Theodore A. Roth  <troth@openavr.org>
+  (Thanks to Jake McGuire <jake@boom.net> for the patch and porting to
+  Mac OS X for use with a USB-to-RS232 dongle.)
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/DAPA.C: Make sure the ioport_*() functions are defined in all
+	cases.
+	If par_release() isn't available, define it to nothing instead of (0).
+
+2002-11-15  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/DAPA.C: Use /dev/parport0 as the default interface instead of
+	direct port access via ioperm(). Using uisp at root or setuid root is
+	frowned upon so it should not be the default.
+
+2002-11-15  Theodore A. Roth  <troth@openavr.org>
+  (Thanks to Christopher X. Candreva <chris@westnet.com> for reporting this.)
+
+	* src/Serial.h: Increase serial timeout. Programming 8535 parts with
+	the stk500 was timing out to early and caused failures. This also seems
+	to affect the at90s1200 devices (also reported by Klaus Rudolph 
+	<lts-rudolph@gmx.de>).
+
+2002-10-30  Theodore A. Roth  <troth@openavr.org>
+  (Thanks to Seth LaForge <sethml@ofb.net> for pointing out the buffer overflow
+   problems.)
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/Main.C: Add comment about dropping setuid privies.
+	* src/AvrAtmel.C: Remove unused variables.
+	* src/Makefile.am: Add -Wall and -Werror compile flags.
+	* src/MotIntl.C (Htoi): Make sure hex digit is valid.
+	(UploadMotorola): Increase size of seg_name[] to avoid buffer overflow.
+	(UploadMotorola): Check for possible read past end of line_buf.
+	(UploadMotorola): Add case for "S3" records.
+	(UploadIntel): Check for possible read past end of line_buf.
+
+2002-10-29  Theodore A. Roth  <troth@openavr.org>
+
+	* doc/srecord.htm: New file (from Marek's site).
+
+2002-10-28  Theodore A. Roth  <troth@openavr.org>
+
+	* src/Stk500.C: Allow firmware version >= 1.7.
+
+2002-10-28  Theodore A. Roth  <troth@openavr.org>
+
+	* bootstrap: Check for proper autotools.
+	* configure.in: Check for autoconf version 2.13.
+	* config/check_autoconf213.m4: New file.
+
+2002-10-28  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	Make cvs version rpm compatible.
+	* src/AvrAtmel.C: Make -dpart more compatible with gcc device names.
+
+2002-10-05  Theodore A. Roth  <troth@openavr.org>
+
+	* Makefile.am: Add man page.
+	* configure.in: Ditto.
+	(AM_INIT_AUTOMAKE): Bump version.
+	* uisp.1.in: New file. [Thanks to Shaun Jackman <sjackman@shaw.ca>]
+
+2002-10-02  Theodore A. Roth  <troth@openavr.org>
+
+	* src/Stk500.C: Use struct for programming parameters instead of just
+	a byte array.
+	Add tiny26 support.
+	* src/Stk500.h: Define SPrgParams structure.
+
+2002-10-02  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* doc/README.stk500: Add note about specs available from Atmel.
+
+2002-08-19  Theodore A. Roth  <troth@openavr.org>
+	[Patch from Tetsuya Okada <okayan@c-creators.co.jp>]
+
+	* configure.in (AM_INIT_AUTOMAKE): Bump version.
+	* src/DAPA.C: Added Xilinx cable support.
+	* src/DAPA.h: Added Xilinx cable support.
+	* src/Main.C: Added Xilinx cable support.
+	* doc/README.xilinx: New file.
+
+2002-07-04  Marek Michalkiewicz  <marekm@amelek.gda.pl>
+
+	* src/DAPA.C (OutReset, Init): Fix PAT_BSD bug.
+
+2002-06-26  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Update version for release.
+
+2002-06-24  Theodore A. Roth  <troth@openavr.org>
+
+	* doc/HOWTO.windows: New file. Thanks to Marc Wetzel <mwse@gmx.de>.
+	* Makefile.am (EXTRA_DIST): Added doc files.
+
+2002-06-24  Marek Michalkiewicz  <marekm@amelek.gda.pl>
+
+	* configure.in (AM_INIT_AUTOMAKE): Update version.
+	* pavr/pavr.c: Add ATmega323 support.
+
+	* src/AvrAtmel.C (ChipErase): Wait up to 5 seconds for chip erase.
+	* src/Serial.C (Tx, Rx): Use Info() instead of fprintf() to log
+	sent and received characters (now enabled at run time with -v=4).
+	(Send): Accept optional timeout argument, default is 1 second.
+	* src/Serial.h (DEBUG_LOG_TX, DEBUG_LOG_RX): Remove.
+	(Send): Update for optional timeout argument.
+	Thanks to Bryce Denney <bryce@tlw.com> for suggestions.
+
+2002-06-13  Marek Michalkiewicz  <marekm@amelek.gda.pl>
+
+	* src/DAPA.C (SendRecv): Read MISO just before SCK falling edge,
+	leaving more room for propagation delays.
+
+2002-06-13  Marek Michalkiewicz  <marekm@amelek.gda.pl>
+
+	* configure.in (AM_INIT_AUTOMAKE): Update version.
+	* src/MotIntl.C (UploadIntel): Handle hex record types 3, 4, 5.
+
+2002-06-09  Marek Michalkiewicz  <marekm@amelek.gda.pl>
+
+	* pavr/pavr.c: Fix to build with latest avr-libc.
+
+2002-06-08  Marek Michalkiewicz  <marekm@amelek.gda.pl>
+
+	* configure.in (AM_INIT_AUTOMAKE): Update version.
+	* src/Avr.C (parts): Add ATmega8535 signature bytes.
+	* src/AvrAtmel.C (prg_part): Update list to match AvrProg 1.37
+	distributed with AVR Studio 3.54.  Sort by device code.
+
+2002-06-03  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in (AM_INIT_AUTOMAKE): Update version.
+
+	* src/Avr.h, src/AvrAtmel.C, src/AvrDummy.C, src/Main.C,
+	  src/Stk500.h:
+	Implemented the new '--wr_lock' command line option.
+
+	* src/Stk500.C:
+	Implemented WriteLockBits.
+	Simplified usage of UniversalCmd.
+
+	* src/Avr.C, src/AvrAtmel.C, src/AvrDummy.C, src/DAPA.C,
+	  src/MotIntl.C, src/Serial.C, src/Stk500.C, src/Terminal.C,
+	  src/cygwinp.C:
+	Add include for config.h.
+
+2002-06-02  Marek Michalkiewicz  <marekm@amelek.gda.pl>
+
+	* configure.in (AM_INIT_AUTOMAKE): Update version.
+	* src/Avr.C, src/DAPA.C, src/Main.C, src/Terminal.C:
+	Fixes for g++ 3.1 errors.  Please test with older compilers.
+
+2002-06-02  Marek Michalkiewicz  <marekm@amelek.gda.pl>
+
+	* src/Main.C (main): Fix typo (missing %) in 4 format strings.
+
+2002-06-01  Theodore A. Roth  <troth@openavr.org>
+
+	* src/Avr.h, src/AvrAtmel.C, src/AvrDummy.C, src/Main.C,
+	  src/Stk500.C:
+	Added new command lines options for reading/writing fuses.
+	Stubbed out code for new lock bit writing implementation.
+
+2002-05-30  Theodore A. Roth  <troth@openavr.org>
+
+	* configure.in:
+	Changed version to <date>-cvs.
+
+	* src/Stk500.C, src/Stk500.h:
+	Added functionality to write lock/fuse bits.
+
+	* src/Stk500.C, src/Stk500.h:
+	Added functionality to read lock/fuse/calibration bits.
+
+	* src/Terminal.C:
+	Added space to prompt.
+
+	* src/Stk500.C, src/Stk500.h:
+	Fix write_buffer (separate buffers for flash and eeprom segments).
+
+	* src/Stk500.C, src/Stk500.h:
+	Fix read_buffer (separate buffers for flash and eeprom segments).
+
+2002-05-27  Theodore A. Roth  <troth@openavr.org>
+
+	* doc/README.stk500:
+	New file from Jason Kyle.
+
+	* TODO:
+	Remove note about autoconf/automake.
+
+	* CHANGES:
+	Added note about new ChangeLog file.
+
+	* AUTHORS:
+	Added Hamish Moffatt.
+
+	* Makefile.am, acconfig.h, bootstrap, config/README, configure.in,
+	  src/Main.C, src/Makefile, src/Makefile.am:
+	Conversion to use autoconf/automake for build system.
+
+	* uisp.spec.in:
+	New file.
+
+	* AUTHORS:
+	New file.
+
+2002-05-25  marekm  <marekm@amelek.gda.pl>
+
+	* CHANGES:
+	Added notice that uisp is now on savannah, mainly to test CVS
+	write access.
+
+2002-05-25  Theodore A. Roth  <troth@openavr.org>
+
+	* CHANGES, CHANGES.old, COPYING, INSTALL, TODO,
+	  kernel/patch-2.2.17-ppdev1.gz, pavr/Makefile, pavr/pavr.c,
+	  src/Avr.C, src/Avr.h, src/AvrAtmel.C, src/AvrAtmel.h,
+	  src/AvrDummy.C, src/AvrDummy.h, src/DAPA.C, src/DAPA.h,
+	  src/Error.h, src/Global.h, src/Main.C, src/Makefile,
+	  src/MotIntl.C, src/MotIntl.h, src/Serial.C, src/Serial.h,
+	  src/Stk500.C, src/Stk500.h, src/Terminal.C, src/Terminal.h,
+	  src/cygwinp.C, src/cygwinp.h, src/parport.h, src/ppdev.h,
+	  src/timeradd.h:
+	Import sources from uisp-20020524.
diff --git a/tools/platforms/mica/uisp/INSTALL b/tools/platforms/mica/uisp/INSTALL
new file mode 100644
index 00000000..37e3c5a3
--- /dev/null
+++ b/tools/platforms/mica/uisp/INSTALL
@@ -0,0 +1,13 @@
+Installation for TinyOS-specific uisp:
+
+Execute
+  ./COMPILE
+(you can run the commands it contains directly if you prefer)
+
+Then:
+  make install
+(you must be root on Linux to perform this step)
+
+WARNING: if you don't use the COMPILE script, you may get compilation
+errors (depending on whether you've installed autoconf/etc, and what
+versions you have)
diff --git a/tools/platforms/mica/uisp/Makefile.am b/tools/platforms/mica/uisp/Makefile.am
new file mode 100644
index 00000000..49c1d42c
--- /dev/null
+++ b/tools/platforms/mica/uisp/Makefile.am
@@ -0,0 +1,71 @@
+#
+# $Id: Makefile.am,v 1.5 2008-07-08 12:31:18 beutel Exp $
+#
+# uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+# Copyright (C) 2002  Theodore A. Roth
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+# Makefile.am -- Process this file with automake to produce Makefile.in
+#
+
+auxdir               = @ac_aux_dir@
+AUX_DIST             = $(auxdir)/install-sh $(auxdir)/missing \
+                       $(auxdir)/mkinstalldirs $(auxdir)/README
+
+man_MANS             = uisp.1
+
+AUX_DIST_EXTRA       = 
+EXTRA_DIST           = bootstrap config acconfig.h \
+                       CHANGES CHANGES.old \
+                       kernel/patch-2.2.17-ppdev1.gz \
+                       pavr/Makefile pavr/pavr.c \
+                       doc/HOWTO.windows doc/README.stk500 \
+                       doc/README.xilinx \
+                       doc/uisp-parport-connect.txt \
+                       uisp.1.in 
+
+AUTOMAKE_OPTIONS     = foreign
+
+if CYGWIN
+SUBDIRS              = src kernel
+else
+SUBDIRS              = src
+endif
+DIST_SUBDIRS         = $(SUBDIRS)
+
+MAINTAINERCLEANFILES = Makefile.in aclocal.m4 configure src/config-h.in \
+                       src/stamp-h.in $(AUX_DIST)
+
+ACLOCAL              = aclocal --warnings=none -I $(auxdir)
+
+install_aux_files    = AUTHORS ChangeLog COPYING INSTALL CHANGES CHANGES.old \
+                       TODO
+
+DOC_INST_DIR         = $(DESTDIR)$(datadir)/doc/uisp-$(VERSION)
+
+install-data-local:
+	$(mkinstalldirs) $(DOC_INST_DIR)
+	for file in $(install_aux_files) ; do \
+	  echo " $(INSTALL_DATA) $$file $(DOC_INST_DIR)/$$file"; \
+	  $(INSTALL_DATA) $(srcdir)/$$file $(DOC_INST_DIR)/$$file; \
+	done
+
+uninstall-local:
+	rm -rf $(DOC_INST_DIR)
+
+dist-hook: uisp.spec
+	cp uisp.spec $(distdir)/uisp.spec
+	rm -rf $(distdir)/config/CVS
diff --git a/tools/platforms/mica/uisp/TODO b/tools/platforms/mica/uisp/TODO
new file mode 100644
index 00000000..5f68983c
--- /dev/null
+++ b/tools/platforms/mica/uisp/TODO
@@ -0,0 +1,42 @@
+
+ - The handling of fuse and lock bits needs some serious work. As it stands
+   it does not work with Hi-V parallel programming (on stk500). I've 
+   started working on this, but it was way too intusive a change to do just
+   before a release. [TRoth/2003-05-27]
+ - improve pavr support (many thanks to Jason Kyle for sending me one
+   of these nice programmers, see http://www.avr1.org/pavr/pavr.html):
+   - add option to force device type for chips with broken signature bytes
+   - use consistent -dpart=... device names
+   - more firmware improvements, speed optimizations (send OK response
+     and receive the next command while executing the previous one, use
+     data polling if supported by device, etc.)
+ - support for parallel port JTAG programming of ATmega8/16/323/128
+ - AT89S52 support (similar commands as AVR, but RESET active high)
+ - option to generate XTAL1 clock for target device while programming,
+   as in FBPRG / AVREAL / modified ByteBlaster / STK200 (LED output)
+ - how to talk to these new USB programmers Kanda is advertising now?
+ - better documentation
+ - clean rewrite in C ;)
+   (for parallel port interfaces only, maybe port the program already
+   available at http://www.bsdhome.com/avrprog/ from FreeBSD to Linux
+   and extend it to support all these different cables? [This program
+   is now called avrdude and has been ported to linux and cygwin.])
+   or at least, some better way to add all these parallel interfaces
+   invented by various people, with different pin assignments.
+   See also "cisp" by Marko Makela <msmakela@cc.hut.fi> available from
+   http://www.funet.fi/pub/cbm/crossplatform/transfer/C2N232/firmware/
+   cisp-1.0.tar.gz
+ - ATDH1150VPC cable support
+ - cleaner way to describe all these different cables
+ - free/open firmware for the STK500 (which is based on AT90S8535, and
+   schematics are available on avrfreaks), implementing the same and/or
+   our own different protocol
+ - uisp-compatible (avr910/pavr mode) boot loader for recent ATmega chips,
+   share common parts of the code (comm protocol) with pavr.c ?
+   add multi-word read/write/verify commands (faster)
+   mostly done, needs to be merged - see http://tlw.com/bryce/robot/avr/
+ - pavr firmware for ATmega8: new hardware design, more features possible
+   than with the original 2313, board with TQFP32 part should still fit in
+   that nice small DB9-DB9 housing, and it would be nice to be able to
+   flash the firmware through the same serial port, using a boot loader
+   and uisp of course :)
diff --git a/tools/platforms/mica/uisp/bootstrap b/tools/platforms/mica/uisp/bootstrap
new file mode 100755
index 00000000..15a3f7fe
--- /dev/null
+++ b/tools/platforms/mica/uisp/bootstrap
@@ -0,0 +1,5 @@
+aclocal
+autoheader
+autoconf
+[ -d config ] || mkdir config
+automake -a -c
diff --git a/tools/platforms/mica/uisp/configure.in b/tools/platforms/mica/uisp/configure.in
new file mode 100644
index 00000000..f7cf760d
--- /dev/null
+++ b/tools/platforms/mica/uisp/configure.in
@@ -0,0 +1,78 @@
+#
+# $Id: configure.in,v 1.4 2006-12-12 18:23:00 vlahan Exp $
+#
+# uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+# Copyright (C) 2002, 2003  Theodore A. Roth
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+
+dnl Make sure we're using the correct version of autoconf
+AC_PREREQ(2.50)
+
+dnl Process this file with autoconf to produce a configure script.
+AC_INIT(src/Main.C)
+AC_CONFIG_AUX_DIR(config)
+AM_CONFIG_HEADER(src/config.h:src/config-h.in)
+AM_INIT_AUTOMAKE(uisp, 20050519tinyos)
+AC_CANONICAL_HOST
+
+dnl Checks for programs.
+AC_PROG_CC
+AC_PROG_CXX
+AC_PROG_INSTALL
+
+dnl Checks for libraries.
+
+dnl Checks for header files.
+AC_HEADER_STDC
+AC_CHECK_HEADERS(fcntl.h sys/ioctl.h sys/time.h unistd.h)
+
+dnl Checks for typedefs, structures, and compiler characteristics.
+AC_C_CONST
+AC_TYPE_SIZE_T
+AC_HEADER_TIME
+
+dnl Checks for library functions.
+AC_PROG_GCC_TRADITIONAL
+AC_FUNC_MEMCMP
+AC_FUNC_VPRINTF
+AC_CHECK_FUNCS(gettimeofday select strstr strtol strtod)
+
+AC_SUBST(ac_aux_dir)
+
+# Set the DATE variable for the man page
+DATE=`date "+%B, %Y"` 
+
+AC_SUBST(DATE)
+
+AC_MSG_CHECKING(for cygwin)
+case $host in
+  *-*-cygwin*)
+    AC_MSG_RESULT(yes)
+    CYGWIN=yes
+    ;;
+  *)
+    AC_MSG_RESULT(no)
+esac
+
+AM_CONDITIONAL([CYGWIN], [test "$CYGWIN"])
+
+AC_OUTPUT( \
+	src/Makefile \
+	kernel/Makefile \
+	kernel/win32/Makefile \
+	uisp.1 \
+	uisp.spec \
+	Makefile)
diff --git a/tools/platforms/mica/uisp/doc/HOWTO.windows b/tools/platforms/mica/uisp/doc/HOWTO.windows
new file mode 100644
index 00000000..c7fc7f0b
--- /dev/null
+++ b/tools/platforms/mica/uisp/doc/HOWTO.windows
@@ -0,0 +1,91 @@
+$Id: HOWTO.windows,v 1.4 2006-12-12 18:23:00 vlahan Exp $
+
+MINI-HOWTO to build and use uisp under cygwin/w32.
+----------------------------------------------------------------------------
+-----------
+2002-06-23  Marc Wetzel  <mwse@gmx.de>
+	* First release. Cygwin part.
+2002-06-24  Theodore A. Roth  <troth@openavr.org>
+	* Minor formatting changes.
+
+
+Cygwin:
+-------
+
+Short version:
+--------------
+Get uisp-source.
+./bootstrap  (Only needed if you get source from CVS)
+./configure
+make
+make install
+
+
+Long version:
+--------------
+Install cygwin as explained by redhat <http://sources.redhat.com/cygwin/>
+Be sure to also install the development tools: GNU-C and GNU-CPP,
+and don't forget to install 'make', too :)
+
+Create a directory e.g. "/home/username/uisp-cvs".  Get the latest cvs source/
+or snapshot out of savannah.gnu.org into this directory.
+
+CVS: <http://savannah.gnu.org/cvs/?group=uisp>
+
+  cvs -z3 -d:pserver:anoncvs@subversions.gnu.org:/cvsroot/uisp login
+  <hit just enter for the password>
+  cvs -z3 -d:pserver:anoncvs@subversions.gnu.org:/cvsroot/uisp co uisp
+
+Create the configure script by calling `./bootstrap`.  Now we call
+`./configure` to create the necessary makefiles depending on your system.
+Your are ready to type `make && make install` to build UISP.
+
+This build will link uisp with the cygwin dll's to provide the unix subsystem
+(posix layer) on a plain windows box.  See the cygwin site to get a deeper
+knowledge of it.  But you can use this uisp/w32 by just copying the necessary
+dll's out of your cygwin directory into the windows\system or system32
+directory.
+
+Necessary are the following 3 dlls:
+
+  13.12.2001  11:33            22.016 cygintl-1.dll
+  22.11.2001  00:16            41.105 cygpcre.dll
+  25.02.2002  18:16           769.352 cygwin1.dll
+
+
+Installing the printer-port driver:
+-----------------------------------
+
+Under Windows NT or Windows 2000 you need to install a special driver to get
+access to system resources like the printer port.  A ready to use lpt-driver
+for uisp is for example giveio.  One place where GIVEIO is found is e.g. here:
+<http://irdeo.de/ntdriver.zip>.  Unzip the downloaded file to a location of
+your choice: e.g. "c:\Program Files\Giveio".  Copy the unzipped giveio.sys to
+your "winnt\system32\drivers" directory.  Now run the program loaddrv.exe to
+install the driver, you'll have to change the "Full pathname of driver" to the
+location you copied the giveio.sys to:
+e.g. "C:\WINNT\SYSTEM32\DRIVERS\GIVEIO.SYS".  Now press install, then
+start.  You should see the status change to "Operation was successful" - Now
+the driver is installed.  You should now extend your preferred
+compiler-startup-batch e.g. `run.cmd`  with the line `net start giveio` as
+this driver is not installed automatically.  Or run the loaddrv.exe (with
+changing to the right path) and press the start-button.
+
+You could extend your makefiles with the following two lines to have a new
+rule `make install` to flash the built .rom file into your avr.  My
+programming-interface is a stk200 compatible one, and I like the hashes to see
+that uisp is still working...
+
+ISP = C:/PATH-TO-UISP/uisp.exe
+install: $(TARG)
+		 $(ISP) -v=3 -dprog=stk200 --hash=1024 --erase --upload if=$(TARG).hex
+
+
+MinGW:
+
+To be continued...
+
+
+
+
+Any comments and/or corrections go to Marc Wetzel: <mailto:mwse@gmx.de>
diff --git a/tools/platforms/mica/uisp/doc/README.stk500 b/tools/platforms/mica/uisp/doc/README.stk500
new file mode 100644
index 00000000..560ff03b
--- /dev/null
+++ b/tools/platforms/mica/uisp/doc/README.stk500
@@ -0,0 +1,294 @@
+$Id: README.stk500,v 1.4 2006-12-12 18:23:00 vlahan Exp $
+
+NOTE: Atmel has finally released the specs for the protocol for talking to the
+stk500 over a serial line. Here's where to get the files:
+
+    ftp://www.atmel.com/pub/atmel/avr061.zip
+    http://www.atmel.com/atmel/acrobat/doc2525.pdf
+
+STK500 Commands  **preliminary information**
+---------------
+
+Extracted by Jason Kyle 20010701
+Updated 200201
+
+The latest version of this document can be found at www.avr1.org.
+
+Notes:
+- Incomplete but sufficient to make progress on free tools.
+- All commands are terminated by 0x20
+- All successful responses are framed 0x14 data 0x10 (i.e. NULL response is 
+  0x14 0x10)
+- Commands invalid in current mode (i.e not in pgm mode, pgm page) give 
+  0x14 0x13 response.
+
+
+STK500 BOARD COMMANDS
+---------------------
+
+** ?STK500
+Command		0x30 0x20
+Response	0x14 0x10
+Use		Establish STK500 presence and UART sync. Re-send n times until
+		response.
+Notes		STK500 won't respond to other commands unless this has been
+		sent.
+
+** BoardID
+Command		0x31 0x20
+Response	0x14 "AVR STK" 0x10
+Use		Identify board.
+Notes
+
+** VTargetSet
+Command		0x40 0x84 VTarget 0x20
+Response	0x14 0x10
+Use		Set VTarget voltage.
+Notes		0x33 = 5.1V , 0x34 = 5.2V , 0x32 = 5.0V
+
+** ARefSet
+Command		0x40 0x85 ARef 0x20
+Response	0x14 0x10
+Use		Set ARef voltage.
+Notes		Same count/V relationship as VTargetRead
+
+** POscSet
+Command		0x40 0x86 POsc 0x20
+Response	0x14 0x10
+Use		Set P parameter.
+Notes
+
+** NOscSet
+Command		0x40 0x87 NOsc 0x20
+Response	0x14 0x10
+Use		Set N parameter.
+Notes
+
+** SDOscSet
+Command		0x40 0x89 SDOsc 0x20
+Response	0x14 0x10
+Use		Set SD parameter.
+Notes
+
+** HWver
+Command		0x41 0x80 0x20
+Response	0x14 0x02 0x10
+Use		Hardware version identification.
+Notes
+
+** SWmajor
+Command		0x41 0x81 0x20
+Response	0x14 0x01 0x10
+Use		Software major version identification.
+Notes
+
+** SWminor
+Command		0x41 0x82 0x20
+Response	0x14 0x07 0x10
+Use		Software minor version identification.
+Notes
+
+** VTargetRead
+Command		0x41 0x84 0x20
+Response	0x14 0x33 0x10
+Use		Query present VTarget voltage.
+Notes		0x33 = 5.1V , 0x34 = 5.2V , 0x32 = 5.0V
+
+** ARefRead
+Command		0x41 0x85 0x20
+Response	0x14 0x33 0x10
+Use		Query present ARef voltage.
+Notes		Same count/V relationship as VTargetRead
+
+** POscRead
+Command		0x41 0x86 0x20
+Response	0x14 0x01 0x10
+Use		Query present P parameter.
+Notes
+
+** NOscRead
+Command		0x41 0x87 0x20
+Response	0x14 0x00 0x10
+Use		Query present N parameter.
+Notes
+
+** SDOscRead
+Command		0x41 0x89 0x20
+Response	0x14 0x01 0x10
+Use		Query present SD parameter.
+Notes
+
+** DeviceParam
+Command		0x42 (20 device specific bytes) 0x20
+Response	0x14 0x10
+Use		Tell programmer how to program device, i.e data polling byte
+		returns.
+Notes		See table for more details
+
+** MagicNumber
+Command		0x45 0x03 0x00 0xD7 0xA0 0x20
+Response	0x14 0x10
+Use		Ask Atmel.  Sent before entering programming mode.
+Notes		This may well be a code checksum, software version requested
+		first.
+
+
+STK500 PROGRAMMING COMMANDS
+---------------------------
+
+** EnterPgmMode
+Command		0x50 0x20
+Response	0x14 0x10
+Use		Enter programming mode, nRESET = low.
+Notes
+
+** LeavePgmMode
+Command		0x51 0x20
+Response	0x14 0x10
+Use		Leave programming mode, nRESET = high.
+Notes
+
+** EraseDevice
+Command		0x52 0x20
+Response	0x14 0x10
+Use		Erase device.
+Notes
+
+** SetAddress
+Command		0x55 AddrL AddrH 0x20
+Response	0x14 0x10
+Use		Set address for read/write operation
+Notes		Word address FLASH, Byte address EEPROM
+
+** UniversalCmd
+Command		0x56 0xAC 0xFD 0x00 0xFF 0x20
+Response	0x14 0x00 0x10
+Use		Sending lock and fuse bits.
+Notes		Could probably be used for byte by byte programming of devices.
+		The 0x00 returned is read from byte 4 SPI return value, i.e. if
+		read program memory SPI command sent then this is the byte
+		returned.
+
+** WriteMemory
+Command		0x64 LenH LenL 0x46 DataBytes 0x20
+Response	0x14 0x10
+Use		Programming FLASH/EEPROM/PageBuffer
+Notes		Change 0x46 ("F") to 0x45 ("E") for EEPROM. Length in bytes.
+		Written in 0x0100 chunks for 8515
+
+
+** ReadMemory
+Command		0x74 LenH LenL 0x46 0x20
+Response	0x14 DataBytes 0x10
+Use		Reading FLASH/EEPROM
+Notes		Change 0x46 ("F") to 0x45 ("E") for EEPROM. Length in bytes.
+		Read in 0x0100 chunks for 8515.
+
+** GetSignature
+Command		0x75 0x20
+Response	0x14 0x1E 0x93 0x01 0x10
+Use		Requesting device signature bytes
+Notes		Response shown for 8515
+
+** ReadOscCal
+Command		0x76 0x20
+Response	0x14 0x42 0x10
+Use		Read current oscillator calibration value
+Notes		Varies between devices, 0x42 in an ATmega163L-4PI 0035
+
+
+
+COMMAND SEQUENCES
+-----------------
+
+Startup:
+?STK500 , BoardID , HWver , SWmajor , SWminor
+
+ReadSignature:
+?STK500 , DeviceParam , SWminor , SWmajor, MagicNumber , EnterPgmMode ,
+GetSignature , LeavePgmMode
+
+WriteLockBits:
+?STK500 , DeviceParam , SWminor , SWmajor , MagicNumber , EnterPgmMode ,
+UniversalCmd , LeavePgmMode
+
+WriteMemory:
+?STK500 , DeviceParam , SWminor , SWmajor , MagicNumber , EnterPgmMode ,
+EraseDevice , SetAddress 0x0000 , PgmBlockMode n bytes , SetAddress 0x0000 ,
+ReadBlockMode n bytes , LeavePgmMode
+
+ReadMemory:
+?STK500 , DeviceParam , SWminor , SWmajor , MagicNumber , EnterPgmMode ,
+SetAddress 0x0000 , ReadBlockMode n bytes , LeavePgmMode
+
+Normally memory is programmed or read in 0x0100 byte chunks, obviously if a
+program doesn't align to an 0x0100 length then there will be a < 0x0100 chunk
+at the end.
+
+
+Writing mega163.  Set address to 0x0000, write 0x0100 bytes, set address to
+0x0080, write 0x0100 bytes etc...  STK500 must auto detect end of page boundry
+and write current page to address specified in last setaddress cmd.
+
+
+Set device paramters and programming mode command for STK500
+
+8515
+42 60 00 00 01 01 00 01 01 7f 7f 80 7f 00 00 02 00 00 00 20 00 20
+
+4414
+42 50 00 00 01 01 00 01 01 7f 7f 80 7f 00 00 01 00 00 00 10 00 20
+
+2313
+42 40 00 00 01 01 00 01 01 7f 7f 80 7f 00 00 00 80 00 00 08 00 20
+
+1200
+42 33 00 00 01 01 00 01 01 ff ff 00 ff 00 00 00 40 00 00 04 00 20
+
+2323
+42 41 00 00 00 01 00 01 01 ff ff 00 ff 00 00 00 80 00 00 08 00 20
+
+2343
+42 43 00 00 00 01 00 01 01 ff ff 00 ff 00 00 00 80 00 00 08 00 20
+
+2233
+42 42 00 00 01 01 00 01 01 ff ff 00 ff 00 00 00 80 00 00 08 00 20
+
+4433
+42 51 00 00 01 01 00 01 01 ff ff 00 ff 00 00 01 00 00 00 10 00 20
+
+4434
+42 52 00 00 01 01 00 01 01 ff ff 00 ff 00 00 01 00 00 00 10 00 20
+
+8535
+42 61 00 00 01 01 00 01 01 ff ff 00 ff 00 00 02 00 00 00 20 00 20
+
+tiny11
+42 11 00 00 00 00 00 01 01 00 00 00 00 00 00 00 00 00 00 04 00 20
+
+tiny12
+42 12 00 00 00 01 01 01 01 ff ff ff ff 00 00 00 40 00 00 04 00 20
+
+tiny15
+42 13 00 00 00 01 01 01 01 ff ff ff ff 00 00 00 40 00 00 04 00 20
+
+tiny22
+42 20 00 00 00 01 00 01 01 ff ff 00 ff 00 00 00 80 00 00 08 00 20
+
+tiny28
+42 22 00 00 01 00 01 01 01 00 00 00 00 00 00 00 00 00 00 08 00 20
+
+mega32
+42 90 00 00 01 01 01 01 02 ff ff ff ff 00 80 04 00 00 00 80 00 20
+
+mega161
+42 80 00 00 01 01 01 01 01 ff ff ff ff 00 80 02 00 00 00 40 00 20
+
+mega163
+42 81 00 00 01 01 01 01 02 ff ff ff ff 00 80 02 00 00 00 40 00 20
+
+mega103
+42 b1 00 00 01 00 00 01 01 00 00 00 00 01 00 10 00 00 02 00 00 20
+
+mega128
+42 b2 00 00 01 01 01 01 03 ff ff ff ff 01 00 10 00 00 02 00 00 20
diff --git a/tools/platforms/mica/uisp/doc/README.xilinx b/tools/platforms/mica/uisp/doc/README.xilinx
new file mode 100644
index 00000000..80ae6ea4
--- /dev/null
+++ b/tools/platforms/mica/uisp/doc/README.xilinx
@@ -0,0 +1,12 @@
+I've made a quick hack to support Xilinx HW-JTAG-PC cable.
+Connection is as follows:
+
+TCK --> SCK
+TDO --> MISO
+TDI --> MOSI
+TMS --> RESET#
+
+--
+Tetsuya Okada  <okayan@c-creators.co.jp>
+Computer Creators, Inc.
+
diff --git a/tools/platforms/mica/uisp/doc/uisp-parport-connect.txt b/tools/platforms/mica/uisp/doc/uisp-parport-connect.txt
new file mode 100644
index 00000000..32d2e8b7
--- /dev/null
+++ b/tools/platforms/mica/uisp/doc/uisp-parport-connect.txt
@@ -0,0 +1,21 @@
+
+
+          Connect AVR with parallel port
+        AVR                       Parallel Port
+   Signal name   Pin             Pin  Signal name
+   GND           20 ------------ 19   GND
+   GND           20 ------------ 21   GND
+   SCK            8 ------------  1   Strobe
+   MOSI           6 ------------  2   Data 0
+   MISO           7 ------------ 11   Busy
+   Reset          9 ------------ 16   Init
+
+This scheme works with all parallel port modes (EPP,ECP, classic).
+
+Copyright (C) 1998 by Alexey Lapshin and Sergey Larin.
+
+This scheme can be modifyed as described in send_byte.s
+
+Note: The ATmega128 (maybe other megas too) uses PDI and PDO for spi
+programming instead of MISO and MOSI. You will need to modify the
+connections accordingly.
diff --git a/tools/platforms/mica/uisp/install-giveio b/tools/platforms/mica/uisp/install-giveio
new file mode 100755
index 00000000..bc127199
--- /dev/null
+++ b/tools/platforms/mica/uisp/install-giveio
@@ -0,0 +1,10 @@
+#!/bin/sh
+#
+# This is called by the InstallScript Wizard. The Wizard
+# determines, sets, and exports the value of $TOSROOT before
+# this is called.
+# 
+
+cd $TOSDIR/../tools/platforms/mica/uisp/kernel/win32
+$TOSDIR/../tools/platforms/mica/uisp/kernel/win32/giveio-install --install
+
diff --git a/tools/platforms/mica/uisp/kernel/.cvsignore b/tools/platforms/mica/uisp/kernel/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/platforms/mica/uisp/kernel/Makefile.am b/tools/platforms/mica/uisp/kernel/Makefile.am
new file mode 100644
index 00000000..43823a3f
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/Makefile.am
@@ -0,0 +1,3 @@
+AUTOMAKE_OPTIONS=foreign
+
+SUBDIRS = win32
diff --git a/tools/platforms/mica/uisp/kernel/stargate/Makefile b/tools/platforms/mica/uisp/kernel/stargate/Makefile
new file mode 100644
index 00000000..a87c8e50
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/stargate/Makefile
@@ -0,0 +1,22 @@
+# Comment/uncomment the following line to enable/disable debugging
+#DEBUG = y
+
+# This Makefile has been simplified as much as possible, by putting all
+# generic material, independent of this specific directory, into
+# ../Rules.make. Read that file for details
+
+KERNELDIR = /home/pbuonado/Projects/stargate-linux/linux-2.4.19-star5
+
+CFLAGS = -v -O2
+CFLAGS += -I. -I$(KERNELDIR)/include
+CFLAGS += -DEXPORT_SYMTAB
+
+CC=arm-linux-gcc
+
+all: stargate_ssp.o
+
+stargate_ssp.o: stargate_ssp.c
+	$(CC) $(CFLAGS) -c $< -o $@
+
+clean:
+	rm -f *.o *~ core
diff --git a/tools/platforms/mica/uisp/kernel/stargate/README b/tools/platforms/mica/uisp/kernel/stargate/README
new file mode 100644
index 00000000..bc601669
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/stargate/README
@@ -0,0 +1,20 @@
+Stargate SSP driver 
+
+INSTALLATION
+
+This directory should contain a precompiled version of the Stargate
+SSP driver (stargate_ssp.o) for STARGATE Version 5 (linux 
+version 2.4.19-rmk7-pxa1). If not, see the instructions on COMPILING
+below. 
+To install the driver, copy 'stargate_ssp.o' and 'ssp_load.sh' to a
+directory on your Stargate platform. Execute 'ssp_load.sh' to install
+the driver.  NOTE: As of this version, you will need to run this
+script each time you reboot the stargate to reload the driver.
+
+COMPILING
+
+Edit the 'KERNELDIR' variable in 'Makefile' to point to your Stargate
+kernel tree.  Then execute 'make'.  
+
+
+
diff --git a/tools/platforms/mica/uisp/kernel/stargate/ssp_load.sh b/tools/platforms/mica/uisp/kernel/stargate/ssp_load.sh
new file mode 100755
index 00000000..bdd37e8a
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/stargate/ssp_load.sh
@@ -0,0 +1,18 @@
+#!/bin/sh
+module="stargate_ssp"
+device="ssp"
+
+# invoke insmod with all arguments we got
+# and use a pathname, as newer modutils don't look in . by default
+/sbin/insmod -f ./stargate_ssp.o $* || exit 1
+
+rm -f /dev/${device}[0-7]
+mknod /dev/${device} c $major 0
+
+chmod 644 /dev/${device}
+
+
+
+
+
+
diff --git a/tools/platforms/mica/uisp/kernel/stargate/stargate_ssp.c b/tools/platforms/mica/uisp/kernel/stargate/stargate_ssp.c
new file mode 100644
index 00000000..db24d4ea
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/stargate/stargate_ssp.c
@@ -0,0 +1,324 @@
+/*
+ * sg_ssp.c -- Stargate SSP Driver for mote programming
+ *
+ * Portions Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+
+ * Portions Copyright (C) 2001 Alessandro Rubini and Jonathan Corbet
+ * Copyright (C) 2001 O'Reilly & Associates
+ *
+ * The source code in this file can be freely used, adapted,
+ * and redistributed in source or binary form, so long as an
+ * acknowledgment appears in derived source files.  The citation
+ * should list that the code comes from the book "Linux Device
+ * Drivers" by Alessandro Rubini and Jonathan Corbet, published
+ * by O'Reilly & Associates.   No warranty is attached;
+ * we cannot take responsibility for errors or fitness for use.
+ *
+ * $Id: stargate_ssp.c,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ */
+
+#ifndef __KERNEL__
+#  define __KERNEL__
+#endif
+#ifndef MODULE
+#  define MODULE
+#endif
+
+#include <linux/config.h>
+
+#ifdef CONFIG_MODVERSIONS
+#define MODVERSIONS
+#include <linux/modversions.h>
+#endif
+
+#include <linux/kernel.h> /* printk() */
+#include <linux/module.h>
+#include <linux/sched.h>
+
+#include <linux/fs.h>     /* everything... */
+#include <linux/errno.h>  /* error codes */
+#include <linux/delay.h>  /* udelay */
+#include <linux/slab.h>
+#include <linux/mm.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/tqueue.h>
+#include <linux/poll.h>
+#include <linux/init.h>
+
+#include <asm/io.h>
+#include <asm/system.h>
+#include <asm/hardware.h>
+#include <asm/irq.h>
+
+#define SG_SSP_PHYSBASE (__PREG(SSCR0))
+#define SG_SSP_SIZE	(5*4) /* 5 Registers, 4 Bytes each */
+
+#define SG_GPIOCNTL_PHYSBASE (__PREG(GPLR0))
+#define SG_GPIOCNTL_SIZE (27*4) /* 27 Registers, 4 Bytes each */
+
+#define SSPS_TNF		(1 << 2)
+#define SSPS_RNE		(1 << 3)
+#define SSPS_BSY		(1 << 4)
+#define SSPS_TFS		(1 << 5)
+#define SSPS_RFS		(1 << 6)
+#define SSPS_ROR		(1 << 7)
+
+#define SSPC_SSE		(1 << 7)
+/*
+ * all of the parameters have no "sg_ssp_" prefix, to save typing when
+ * specifying them at load time
+ */
+static int major = 0; /* dynamic by default */
+MODULE_PARM(major, "i");
+
+/* Since sg_ssp_base is vremapped in case use_mem==1, remember the phys addr. */
+unsigned long sg_ssp_vbase;
+
+MODULE_AUTHOR ("Phil Buonadonna");
+MODULE_DESCRIPTION ("Stargate SSP Driver v 0.91");
+/*
+ * The devices with low minor numbers write/read burst of data to/from
+ * specific I/O ports (by default the parallel ones).
+ * 
+ * The device with 128 as minor number returns ascii strings telling
+ * when interrupts have been received. Writing to the device toggles
+ * 00/FF on the parallel data lines. If there is a loopback wire, this
+ * generates interrupts.  
+ */
+
+int sg_ssp_open (struct inode *inode, struct file *filp)
+{
+  MOD_INC_USE_COUNT;
+
+
+  GPCR(22) = GPIO_bit(22); // MUX -> Programming mode
+  
+  SSCR0 = ((10 << 8) | SSPC_SSE | 7);  /* SRC=3, SSE, DSS = 8-bit data */
+  
+  /* Put attached mote into reset */
+  GPCR(77) = GPIO_bit(77); // RSTN -> 0
+  
+  return 0;
+}
+
+
+int sg_ssp_release (struct inode *inode, struct file *filp)
+{
+  SSCR0 = 0;
+
+  GPSR(22) = GPIO_bit(22); // MUX -> Serial Comm mode
+
+  /* Clear the reset */
+  GPSR(77) = GPIO_bit(77); // RSTN -> 1
+
+  MOD_DEC_USE_COUNT;
+  return 0;
+}
+
+
+ssize_t sg_ssp_read(struct file *filp, char *buf, size_t count, loff_t *f_pos)
+{
+  int retval = count, lcnt = count;
+  unsigned char *kbuf=kmalloc(count, GFP_KERNEL), *ptr;
+  unsigned int value;
+
+  if (!kbuf) {
+    return -ENOMEM;
+  }
+
+  ptr = kbuf;
+
+  while (lcnt > 0) {
+    while (!(SSSR & SSPS_RNE)) {
+      cpu_relax();
+    }
+    value = SSDR;
+    *(ptr++) = value;
+    //printk(KERN_INFO "sg_ssp: read 0x%lx from ssp\n",value);
+    lcnt--;
+  }
+
+  if ( (retval > 0) && copy_to_user(buf, kbuf, retval))
+    retval = -EFAULT;
+  kfree(kbuf);
+
+  return retval;
+}
+
+ssize_t sg_ssp_write(struct file *filp, const char *buf, size_t count,
+		     loff_t *f_pos)
+{
+  int retval = count, lcnt = count;
+  unsigned char *kbuf=kmalloc((count+1), GFP_KERNEL), *ptr;
+  unsigned int value;
+
+  if (!kbuf) {
+    return -ENOMEM;
+  }
+  if (copy_from_user(kbuf, buf, count)) {
+    return -EFAULT;
+  }
+  ptr = kbuf;
+
+  while (lcnt > 0) {
+    while (!(SSSR & SSPS_TNF)) {
+      cpu_relax();
+    }
+    value = *(ptr++);
+    SSDR = value;
+    //printk(KERN_INFO "sg_ssp: wrote 0x%lx to ssp\n",value);
+    lcnt--;
+  }
+  kfree(kbuf);
+  return retval;
+
+}
+
+
+
+unsigned int sg_ssp_poll(struct file *filp, poll_table *wait)
+{
+  return POLLIN | POLLRDNORM | POLLOUT | POLLWRNORM;
+}
+
+
+struct file_operations sg_ssp_fops = {
+  read: sg_ssp_read,
+  write: sg_ssp_write,
+  poll: sg_ssp_poll,
+  open: sg_ssp_open,
+  release: sg_ssp_release,
+};
+
+
+void sg_ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+
+  unsigned int status = SSSR;
+
+  if (status & SSPS_ROR) {
+    printk(KERN_WARNING "sg_ssp: receiver overrun 0x%lx",status);
+    SSSR = SSPS_ROR;
+  }
+
+}
+
+
+
+/* Two wrappers, to use non-page-aligned ioremap() on 2.0 */
+
+/* Remap a not (necessarily) aligned port region */
+void *sg_ssp_remap(unsigned long phys_addr, unsigned long phys_size)
+{
+  /* The code comes mainly from arch/any/mm/ioremap.c */
+  unsigned long offset, last_addr, size;
+
+  last_addr = phys_addr + phys_size - 1;
+  offset = phys_addr & ~PAGE_MASK;
+    
+    /* Adjust the begin and end to remap a full page */
+  phys_addr &= PAGE_MASK;
+  size = PAGE_ALIGN(last_addr) - phys_addr;
+  return ioremap(phys_addr, size) + offset;
+}
+
+/* Unmap a region obtained with sg_ssp_remap */
+void sg_ssp_unmap(void *virt_add)
+{
+  iounmap((void *)((unsigned long)virt_add & PAGE_MASK));
+}
+
+/* Finally, init and cleanup */
+
+int sg_ssp_init(void)
+{
+  int result;
+  
+  /* Set up owner pointers.*/
+  SET_MODULE_OWNER(&sg_ssp_fops);
+  
+  /* Get our needed resources. */
+  result = check_mem_region(SG_SSP_PHYSBASE, SG_SSP_SIZE);
+  if (result) {
+    printk(KERN_INFO "sg_ssp: can't get I/O mem address 0x%lx\n",
+	   SG_SSP_PHYSBASE);
+    return result;
+  }
+  request_mem_region(SG_SSP_PHYSBASE, SG_SSP_SIZE, "SSP");
+  
+  result = check_mem_region(SG_GPIOCNTL_PHYSBASE, SG_GPIOCNTL_SIZE);
+  if (result) {
+    printk(KERN_INFO "sg_ssp: can't get GPIO I/O mem address 0x%lx\n",
+	   SG_GPIOCNTL_PHYSBASE);
+    return result;
+  }
+  request_mem_region(SG_GPIOCNTL_PHYSBASE, SG_GPIOCNTL_SIZE, "SSPGPIO");
+
+  /* also, ioremap it */
+  sg_ssp_vbase = (unsigned long)sg_ssp_remap(SG_SSP_PHYSBASE,SG_SSP_SIZE);
+  /* Hmm... we should check the return value */
+  
+  result = register_chrdev(major, "ssp", &sg_ssp_fops);
+  if (result < 0) {
+    printk(KERN_INFO "sg_ssp: can't get major number\n");
+    sg_ssp_unmap((void *)sg_ssp_vbase);
+    release_mem_region(SG_SSP_PHYSBASE,SG_SSP_SIZE);
+    return result;
+  }
+  if (major == 0) major = result; /* dynamic */
+  
+  result = request_irq(IRQ_SSP, sg_ssp_interrupt,
+		       SA_INTERRUPT, "ssp", NULL);
+  if (result) {
+    printk(KERN_INFO "sg_ssp: can't get assigned irq %i\n",
+	   IRQ_SSP);
+    sg_ssp_unmap((void *)sg_ssp_vbase);
+    release_mem_region(SG_SSP_PHYSBASE,SG_SSP_SIZE);
+    return result;
+  }
+
+  SSSR = SSPS_ROR;
+  SSCR1 = 0;
+
+  // Enable the SSP alternate functions
+  set_GPIO_mode(GPIO23_SCLK_md);
+  set_GPIO_mode(GPIO25_STXD_MD); // Enable the SSP TX/RX lines
+  set_GPIO_mode(GPIO26_SRXD_MD);
+
+  set_GPIO_mode((GPIO27_SEXTCLK | GPIO_IN));    // Avoid driving the RED LED
+  set_GPIO_mode((22 | GPIO_OUT));		// MUX Selector
+  set_GPIO_mode((77 | GPIO_OUT));		// RSTN 
+
+  /* Set the state of the reset pin */
+  GPSR(77) = GPIO_bit(77);  // RSTN -> 1
+ 
+  return 0;
+}
+
+void sg_ssp_cleanup(void)
+{
+
+  free_irq(IRQ_SSP,NULL);
+  unregister_chrdev(major, "ssp");
+  sg_ssp_unmap((void *)sg_ssp_vbase);
+  release_mem_region(SG_SSP_PHYSBASE,SG_SSP_SIZE);
+  release_mem_region(SG_GPIOCNTL_PHYSBASE,SG_GPIOCNTL_SIZE);
+}
+
+module_init(sg_ssp_init);
+module_exit(sg_ssp_cleanup);
+
+
+
+
+
+
+
+
diff --git a/tools/platforms/mica/uisp/kernel/stargate/stargate_ssp.o b/tools/platforms/mica/uisp/kernel/stargate/stargate_ssp.o
new file mode 100644
index 00000000..185b625f
Binary files /dev/null and b/tools/platforms/mica/uisp/kernel/stargate/stargate_ssp.o differ
diff --git a/tools/platforms/mica/uisp/kernel/win32/.cvsignore b/tools/platforms/mica/uisp/kernel/win32/.cvsignore
new file mode 100644
index 00000000..37aebf6e
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/win32/.cvsignore
@@ -0,0 +1,4 @@
+Makefile
+Makefile.in
+giveio-install
+.deps
diff --git a/tools/platforms/mica/uisp/kernel/win32/Makefile.am b/tools/platforms/mica/uisp/kernel/win32/Makefile.am
new file mode 100644
index 00000000..a40d2e8d
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/win32/Makefile.am
@@ -0,0 +1,9 @@
+AUTOMAKE_OPTIONS = foreign
+
+tinyoslibdir=$(libdir)/tinyos
+
+tinyoslib_DATA = giveio.sys
+
+tinyoslib_PROGRAMS=giveio-install
+
+giveio_install_SOURCES = giveio-install.cpp
diff --git a/tools/platforms/mica/uisp/kernel/win32/giveio-install.cpp b/tools/platforms/mica/uisp/kernel/win32/giveio-install.cpp
new file mode 100644
index 00000000..8a2e72ac
--- /dev/null
+++ b/tools/platforms/mica/uisp/kernel/win32/giveio-install.cpp
@@ -0,0 +1,191 @@
+#include <windows.h>
+#include <iostream>
+#include <string>
+#include <algorithm>
+using namespace std;
+
+int help()
+{
+    cout << "usage: giveio-install [option]" << endl;
+    cout << "    [option] is one of the following:" << endl;
+    cout << "        --install    Installs GiveIO driver" << endl;
+    cout << "        --uninstall  Uninstalls GiveIO driver" << endl;
+    cout << "        --help       Prints this help message" << endl;
+    return 1;
+}
+
+int error(const char* msg)
+{
+    cout << "giveio-install: " << msg << endl;
+    return 0;
+}
+
+class auto_sc_handle {
+public:
+    auto_sc_handle(SC_HANDLE h_arg) : h(h_arg) { }
+    ~auto_sc_handle() { CloseServiceHandle(h); }
+
+    operator SC_HANDLE() { return h; }
+private:
+    SC_HANDLE h;
+};
+
+bool is_installed(SC_HANDLE scmh)
+{
+    bool result = false;
+    size_t ess_size = sizeof(ENUM_SERVICE_STATUS) + 256 + 256;
+    ENUM_SERVICE_STATUS* essp =
+	reinterpret_cast<ENUM_SERVICE_STATUS*>(new char[ess_size]);
+    DWORD bytes_needed = 0;
+    DWORD services_returned = 0;
+    DWORD resume_handle = 0;
+    do {
+	BOOL success =
+	    EnumServicesStatus(scmh,
+			       SERVICE_DRIVER/* | SERVICE_WIN32*/,
+			       SERVICE_STATE_ALL,
+			       essp,
+			       ess_size,
+			       &bytes_needed,
+			       &services_returned,
+			       &resume_handle);
+	if (success == FALSE && GetLastError() != ERROR_MORE_DATA)
+	    break;
+	
+	for (DWORD i = 0; i < services_returned; i++) {
+	    // cout << essp[i].lpServiceName << endl;
+	    if (strcasecmp(essp[i].lpServiceName, "GiveIO") == 0
+		|| strcasecmp(essp[i].lpDisplayName, "GiveIO") == 0) {
+		result = true;
+		break;
+	    }
+		
+	}
+    } while (bytes_needed != 0 && ! result);
+    delete[] essp;
+    return result;
+}
+
+int install()
+{
+    // Taking out the input from stdin -- eases installation and if
+    // the user chooses N, TOS won't work right. 
+    // -lkw 1/25/2002
+    //cout << "giveio-install:" << endl;
+    //cout << "You are about to install the GiveIO driver" << endl;
+    //cout << "on your computer!  This driver can give applications" << endl;
+    //cout << "direct access to I/O, circumventing" << endl;
+    //cout << "Windows NT/Windows 2000 prohibitions." << endl << endl;
+    //cout << "Do you want to continue?  (Y/N) ";
+    char c;
+    //cin >> c;
+    //cout << endl;
+    //if (c != 'y' && c != 'Y')
+	//return error("Installation aborted");
+
+    auto_sc_handle scmh = OpenSCManager(0, 0, GENERIC_WRITE | GENERIC_READ);
+    if (! scmh)
+	return error("Could not connect to the Service Control Manager");
+
+    if (is_installed(scmh))
+	return error("Driver already installed");
+
+    bool copy_failed = false;
+    string WINDIR = getenv("WINDIR");
+    if (WINDIR.empty()) {
+	copy_failed = true;
+	cout << "giveio-install: warning: "
+	     << "WINDIR environment variable is not defined." << endl;
+    } else {
+	replace(WINDIR.begin(), WINDIR.end(), '\\', '/');
+	const string cp =
+	    "cp giveio.sys " + WINDIR + "/system32/drivers/giveio.sys";
+	cout << cp << endl;
+	if (system(cp.c_str()) != 0) {
+	    copy_failed = true;
+	    cout << "giveio-install: warning: "
+		 << "Copy failed." << endl;
+	}
+    }
+    if (copy_failed)
+	cout << "giveio-install: warning: "
+	     << "Please copy giveio.sys to the "
+	     << "$WINDIR/system32/drivers directory." << endl;
+
+    auto_sc_handle csh =
+	CreateService(scmh,
+		      "GiveIO",
+		      "GiveIO Port Access",
+		      SERVICE_ALL_ACCESS,
+		      SERVICE_KERNEL_DRIVER,
+		      SERVICE_AUTO_START,
+		      SERVICE_ERROR_NORMAL,
+		      "system32\\drivers\\giveio.sys",
+		      0,
+		      0,
+		      0,
+		      0,
+		      0);
+    if (csh == 0)
+      return error("Could not create service");
+    BOOL result = StartService(csh,0,NULL);
+    if (!result)
+      return error("Could not start service");
+    return 0;
+}
+
+int uninstall()
+{
+  SERVICE_STATUS status;
+    auto_sc_handle scmh = OpenSCManager(0, 0, GENERIC_WRITE | GENERIC_READ);
+    if (! scmh)
+	return error("Could not connect to the Service Control Manager");
+
+    if (! is_installed(scmh))
+	return error("Driver has not been installed");
+    auto_sc_handle csh =
+	OpenService(scmh,
+		    "GiveIO",
+		    SERVICE_ALL_ACCESS);
+    if (!csh)
+	return error("Could not access GiveIO driver");
+    BOOL result = ControlService(csh,
+				 SERVICE_CONTROL_STOP,
+				 &status);
+    if (!result) {
+      cout << "giveio-install: warning:"
+	   << "The GiveIO service could not be stopped. "
+	   << "Uninstall will complete when the system restarts." << endl;
+    }
+    DeleteService(csh);
+    return 0;
+}
+
+int main(int argc, char* argv[])
+{
+    enum actions {
+	a_install,
+	a_uninstall,
+	a_help
+    } action = a_install;
+
+    for (int i = 1; i < argc; i++) {
+	if (strcmp(argv[i], "--install") == 0)
+	    action = a_install;
+	else if (strcmp(argv[i], "--uninstall") == 0)
+	    action = a_uninstall;
+	else if (strcmp(argv[i], "--help") == 0)
+	    action = a_help;
+	else
+	    action = a_help;
+    }
+    switch (action) {
+    case a_help:
+	return help();
+    case a_install:
+	return install();
+    case a_uninstall:
+	return uninstall();
+    }
+    return 0;
+}
diff --git a/tools/platforms/mica/uisp/kernel/win32/giveio.sys b/tools/platforms/mica/uisp/kernel/win32/giveio.sys
new file mode 100755
index 00000000..62a0cb66
Binary files /dev/null and b/tools/platforms/mica/uisp/kernel/win32/giveio.sys differ
diff --git a/tools/platforms/mica/uisp/src/.cvsignore b/tools/platforms/mica/uisp/src/.cvsignore
new file mode 100644
index 00000000..36540130
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/.cvsignore
@@ -0,0 +1,10 @@
+Makefile
+Makefile.in
+config-h.in
+stamp-h1
+uisp
+uisp.exe
+.deps
+config.h
+stamp-h
+stamp-h.in
diff --git a/tools/platforms/mica/uisp/src/Avr.C b/tools/platforms/mica/uisp/src/Avr.C
new file mode 100644
index 00000000..6466a634
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Avr.C
@@ -0,0 +1,373 @@
+// $Id: Avr.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: Avr.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	Avr.C
+	
+	Top class of the AVR micro controllers 
+	Uros Platise (c) 1999
+*/
+
+#include "config.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <assert.h>
+#include "Avr.h"
+#include "Error.h"
+
+#define TARGET_MISSING 0xff
+#define DEVICE_LOCKED  0x1
+
+/* ATMEL AVR codes */
+TAvr::TPart TAvr::parts [] = {
+  /* device         sig. bytes   flash page EEPROM twdFL twdEE  flags */
+  { "AT90S1200",    0x90, 0x01,   1024,   0,   64,  4000, 4000, AVR_1200 },
+
+  { "ATtiny12",     0x90, 0x05,   1024,   0,   64,  1700, 3400, AVR_TN12 },
+  { "ATtiny15",     0x90, 0x06,   1024,   0,   64,  2000, 4000, AVR_TN15 },
+#if 0
+  /* 12V serial programming only; here just for the evidence */
+  /* ATtiny10 = QuickFlash(TM) OTP */
+  { "ATtiny10",     0x90, 0x03,   1024,   0,    0,  8000,    0, 0 },
+  { "ATtiny11",     0x90, 0x04,   1024,   0,    0,  8000,    0, 0 },
+#endif
+
+  { "AT90S2313",    0x91, 0x01,   2048,   0,  128,  4000, 4000, AVR_2313 },
+  { "AT90S2343",    0x91, 0x03,   2048,   0,  128,  4000, 4000, AVR_8535 },
+  { "AT90S2323",    0x91, 0x02,   2048,   0,  128,  4000, 4000, AVR_8535 },
+
+  /* no longer in production?  2333 -> 4433, tiny22 -> 2343? */
+  { "AT90S2333",    0x91, 0x05,   2048,   0,  128,  4000, 4000, AVR_4433 },
+  { "ATtiny22",     0x91, 0x06,   2048,   0,  128,  4000, 4000, AVR_TN22 },
+
+  { "ATtiny26",     0x91, 0x09,   2048,  32,  128,  4500, 9000, AVR_TN26 },
+
+#if 0
+  /* 12V parallel programming only; here just for the evidence */
+  { "ATtiny28",     0x91, 0x07,   2048,   0,    0,  8000,    0, 0 },
+#endif
+
+  { "AT90S4433",    0x92, 0x03,   4096,   0,  256,  4000, 4000, AVR_4433 },
+
+  /* no longer in production? -> use 8515, 8535 instead */
+  { "AT90S4414",    0x92, 0x01,   4096,   0,  256,  4000, 4000, AVR_2313 },
+  { "AT90S4434",    0x92, 0x02,   4096,   0,  256,  4000, 4000, AVR_8535 },
+
+  { "AT90S8515",    0x93, 0x01,   8192,   0,  512,  4000, 4000, AVR_2313 },
+  { "AT90S8535",    0x93, 0x03,   8192,   0,  512,  4000, 4000, AVR_8535 },
+
+#if 0
+  /* aka AT90S8555 - probably doesn't exist, use ATmega8535 */
+  { "ATmega83",     0x93, 0x05,   8192, 128,  512, 11000, 4000, AVR_M163 },
+#endif
+
+  { "ATmega8515",   0x93, 0x06,   8192,  64,  512,  4500, 9000, AVR_M163 },
+  { "ATmega8",      0x93, 0x07,   8192,  64,  512,  4500, 9000, AVR_M163 },
+  { "ATmega8535",   0x93, 0x08,   8192,  64,  512,  4500, 9000, AVR_M163 },
+
+#if 0
+  /* 12V parallel programming only; here just for the evidence */
+  { "AT90C8534",    0x93, 0x04,   8192,   0,  512,  8000, 4000, 0 }, 
+#endif
+
+  { "ATmega161",    0x94, 0x01,  16384, 128,  512, 11000, 4000, AVR_M161 },
+  { "ATmega163",    0x94, 0x02,  16384, 128,  512, 15000, 3800, AVR_M163 },
+  { "ATmega16",     0x94, 0x03,  16384, 128,  512,  4500, 9000, AVR_M163 },
+  { "ATmega162",    0x94, 0x04,  16384, 128,  512,  4500, 9000, AVR_M128 },
+  { "ATmega169",    0x94, 0x05,  16384, 128,  512,  4500, 9000, AVR_M128 },
+
+  { "ATmega323",    0x95, 0x01,  32768, 128, 1024, 15000, 3800, AVR_M163 },
+  { "ATmega32",     0x95, 0x02,  32768, 128, 1024,  4500, 9000, AVR_M163 },
+
+  { "ATmega64",     0x96, 0x02,  65536, 256, 2048,  4500, 9000, AVR_M128 },
+
+  { "ATmega103",    0x97, 0x01, 131072, 256, 4096, 22000, 4000, AVR_M103 },
+  { "ATmega128",    0x97, 0x02, 131072, 256, 4096,  4500, 9000, AVR_M128 },
+
+  { "ATmega103-old",0x01, 0x01, 131072, 256, 4096, 22000, 4000, AVR_M103 },
+
+#if 0
+  { "ATmega603",    0x96, 0x01,  65536, 256, 2048, 22000, 4000, AVR_M103 },
+  { "ATmega603-old",0x06, 0x01,  65536, 256, 2048, 22000, 4000, AVR_M103 },
+#endif
+
+#if 0 /* not yet */
+  { "AT89S52",      0x52, 0x06,   8192,   0,    0,  1000,    0, AT89S52 },
+#endif
+
+  { "",          TARGET_MISSING, 0,  0,   0,    0,     0,    0, 0 },
+  { "locked",    DEVICE_LOCKED,  0,  0,   0,    0,     0,    0, 0 },
+  { "",          0x0,            0,  0,   0,    0,     0,    0, 0 }
+};
+
+const char* TAvr::segment_names[] = {"flash", "eeprom", "fuse", NULL};
+
+
+/* Private Functions
+*/
+
+TAddr TAvr::GetWritePageSize(){
+  if (device_locked){return 0;}
+  assert(part!=NULL);
+  return part->flash_page_size;
+}
+
+/* Protected Functions
+*/
+
+void TAvr::OverridePart(const char *part_name)
+{
+  int i;
+
+  for (i = 0; parts[i].name[0]; i++) {
+    if (strcasecmp(parts[i].name, part_name) == 0)
+      break;
+  }
+  if (parts[i].name[0]) {
+    if (vendor_code != 0x1e
+	|| part_family != parts[i].part_family
+	|| part_number != parts[i].part_number) {
+      vendor_code = 0x1e;
+      part_family = parts[i].part_family;
+      part_number = parts[i].part_number;
+
+      Info(3, "Override signature bytes, device %s assumed.\n",
+	   parts[i].name);
+    }
+  } else
+    throw Error_Device("Unknown device specified", part_name);
+}
+
+void TAvr::Identify()
+{
+  const char* vendor = "Device";
+
+  Info(3, "Vendor Code: 0x%02x\nPart Family: 0x%02x\nPart Number: 0x%02x\n",
+    vendor_code, part_family, part_number);  
+
+  /* Identify AVR Part according to the vendor_code ... */
+  if (vendor_code==0x1e){vendor = "Atmel AVR";}
+  
+  if (vendor_code==0 && part_family==DEVICE_LOCKED && part_number==0x02){
+    device_locked=true;
+    Info(0, "Cannot identify device because it is locked.\n");
+    /* XXX hack to avoid "invalid parameter" errors if device is locked */
+    GetCmdParam("-dt_wd_eeprom");
+    GetCmdParam("-dt_wd_flash");
+    GetCmdParam("-dvoltage");
+#if 0
+    return;
+#endif
+  } else{device_locked=false;}
+  if (part_family==TARGET_MISSING){
+    Info(0, "An error has occurred during the AVR initialization.\n"
+	    " * Target status:\n"
+	    "   Vendor Code = 0x%02x, Part Family = 0x%02x, Part Number = 0x%02x\n\n",
+	    vendor_code, part_family, part_number);
+    throw 
+      Error_Device("Probably the wiring is incorrect or target"
+        " might be `damaged'.");
+  }
+  int i,n;
+  for(i=0; parts[i].part_family != 0x0; i++){
+    if (part_family == parts[i].part_family){
+      for (n=i; parts[n].part_family==part_family; n++){
+        if (part_number == parts[n].part_number){i=n; break;}
+      }
+      if (i==n){Info(1, "%s %s is found.\n", vendor, parts[i].name);}
+      else{Info(1, "%s similar to the %s is found.\n", vendor, parts[i].name);}
+      part = &parts[i];
+      break;
+    }
+  }
+  if (parts[i].part_family == 0x0) {
+    throw Error_Device ("Probably the AVR MCU is not in the RESET state.\n"
+			"Check it out and run me again.");}
+
+  if (!GetCmdParam("--download", false))
+    SetWriteTimings();
+}
+
+/* This looks like a good approximation to make the device table simpler
+   (only specify the 5V timings).  */
+
+#define CALC_FLASH_T_wd(voltage) ((long) \
+  ((part ? part->t_wd_flash_50 : 22000) * (5.0 * 5.0) / (voltage * voltage)))
+#define CALC_EEPROM_T_wd(voltage) ((long) \
+  ((part ? part->t_wd_eeprom_50 : 4000) * (5.0 * 5.0) / (voltage * voltage)))
+
+void TAvr::SetWriteTimings(){
+  const char* val;
+
+  page_size = GetWritePageSize();
+  if (page_size)
+    Info(3, "Page Write Enabled, size=%d\n", (int) page_size);
+  else
+    Info(3, "Page Write Disabled\n");
+
+  /* defaults */
+  t_wd_flash = CALC_FLASH_T_wd(AVR_DEFAULT_VOLTAGE);
+  t_wd_eeprom = CALC_EEPROM_T_wd(AVR_DEFAULT_VOLTAGE);  
+    
+  /* set FLASH write delay */  
+  if ((val=GetCmdParam("-dt_wd_flash"))){
+    t_wd_flash = atol(val);
+    Info(0, "t_wd_flash = %ld\n", t_wd_flash);
+    if (t_wd_flash < CALC_FLASH_T_wd(AVR_MAX_VOLTAGE)){
+      Info(0, " * According to the Atmel specs the t_wd_flash\n"
+              "   should be at least %ld us\n", 
+	      CALC_FLASH_T_wd(AVR_MAX_VOLTAGE));
+#if 0
+      throw Error_Device("-dt_wd_flash: Value out of range.");
+#endif
+    }
+  }
+  
+  /* set EEPROM write delay */  
+  if ((val=GetCmdParam("-dt_wd_eeprom"))){
+    t_wd_eeprom = atol(val);
+    if (t_wd_eeprom < CALC_EEPROM_T_wd(AVR_MAX_VOLTAGE)){
+      Info(0, " * According to the Atmel specs the t_wd_eeprom\n"
+              "   should be at least %ld us\n", 
+	      CALC_EEPROM_T_wd(AVR_MAX_VOLTAGE));
+#if 0
+      throw Error_Device("-dt_wd_eeprom: Value out of range.");
+#endif
+    }
+  }
+
+  /* Set Timings according to the Power Supply Voltage */
+  if ((val=GetCmdParam("-dvoltage"))){
+    double voltage = atof(val);
+    if (voltage < AVR_MIN_VOLTAGE || voltage > AVR_MAX_VOLTAGE){
+      Info(0, " * Atmel AVR MCUs operate in range from %.1f to %.1f V\n",
+           AVR_MIN_VOLTAGE, AVR_MAX_VOLTAGE);
+	   
+      throw Error_Device("-dvoltage: Value out of range.");
+    }
+    
+    t_wd_flash = CALC_FLASH_T_wd(voltage);
+    t_wd_eeprom = CALC_EEPROM_T_wd(voltage);
+  }
+  
+  Info(3, "FLASH Write Delay (t_wd_flash): %ld us\n"
+          "EEPROM Write Delay (t_wd_eeprom): %ld us\n",
+	  t_wd_flash, t_wd_eeprom);
+}
+
+const char* TAvr::GetPartName(){
+  return part->name;
+}
+
+TAddr
+TAvr::GetSegmentSize()
+{
+  switch (segment) {
+  case SEG_FLASH: return part->flash_size;
+  case SEG_EEPROM: return part->eeprom_size;
+  case SEG_FUSE: return 5;
+  }
+  throw Error_MemoryRange();
+}
+
+bool
+TAvr::TestFeatures(unsigned int mask)
+{
+  return ((part->flags & mask) == mask);
+}
+
+void TAvr::CheckMemoryRange(TAddr addr){
+  if (device_locked){
+    Info(0, "Device is locked.\n");
+    throw Error_MemoryRange();
+  }
+  if (addr >= GetSegmentSize()) {
+    throw Error_MemoryRange();
+  }
+}
+
+long TAvr::Get_t_wd_flash() const {
+  return t_wd_flash;
+}
+
+long TAvr::Get_t_wd_eeprom() const {
+  return t_wd_eeprom;
+}
+
+long TAvr::Get_t_wd_erase() const{
+#if 0
+  return 3*t_wd_flash;	/* right factor is 2, but just in case */
+#else
+  /* Device might be locked and not possible to identify, assume 200ms
+     which should be long enough for any device, and is not that long
+     compared to the program time itself.  */
+  return 200000;
+#endif
+}
+
+/* Device Interface Functions
+*/
+
+bool TAvr::SetSegment(const char* segment_name){
+  for (int i=0; segment_names[i]!=NULL; i++){
+    if (strcmp(segment_names[i], segment_name)==0){
+      segment=i; 
+      return true;
+    }
+  }
+  return false;
+}
+
+const char* TAvr::TellActiveSegment(){
+  return segment_names[segment];
+}
+
+const char* TAvr::ListSegment(unsigned index){
+  if (index>3){return NULL;}
+  return segment_names[index];
+}
+
+const char* TAvr::ReadByteDescription(TAddr addr){
+  static const char* no_desc = "No description available.";
+  CheckMemoryRange(addr);
+  return no_desc;
+}
+
+/* Constructor/Destructor
+*/
+
+TAvr::TAvr():
+  part(NULL), 
+  page_size(0), page_addr_fetched(false),
+  page_poll_byte(0xFF),
+  segment(SEG_FLASH){
+}
+
+TAvr::~TAvr(){
+}
diff --git a/tools/platforms/mica/uisp/src/Avr.h b/tools/platforms/mica/uisp/src/Avr.h
new file mode 100644
index 00000000..0088a15f
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Avr.h
@@ -0,0 +1,205 @@
+// $Id: Avr.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: Avr.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	Avr.h
+	
+	Top class of the AVR micro controllers 
+	Uros Platise (c) 1999
+*/
+
+#ifndef __AVR
+#define __AVR
+
+#include "Global.h"
+
+/* Virtual Addresses for fuse and lock bytes. These are used to map a
+   read/write of a byte in the fuse segment to the underlying operation. The
+   real address may be different, but should be hidden in the more specific
+   code. */
+
+enum {
+    AVR_FUSE_LOW_ADDR   = 0,
+    AVR_FUSE_HIGH_ADDR  = 1,
+    AVR_CAL_ADDR        = 2,
+    AVR_LOCK_ADDR       = 3,
+    AVR_FUSE_EXT_ADDR   = 4,
+};
+
+/* Define the lock bits */
+enum {
+    LB1   = 0x01,
+    LB2   = 0x02,
+    BLB01 = 0x04,
+    BLB02 = 0x08,
+    BLB11 = 0x10,
+    BLB12 = 0x20,
+};
+
+/* Flags for device features: */
+
+/* Old command (LB1=b7, LB2=b6) for Read Lock and Fuse Bits.  */
+#define AVR_LOCK_RD76	0x0001
+
+/* New command (LB1=b1, LB2=b2) for Read Lock Bits.  */
+#define AVR_LOCK_RD12	0x0002
+
+/* Read/Write Boot Lock Bits (BLB12,11,02,01,LB2,LB1=b5...b0).  */
+#define AVR_LOCK_BOOT	0x0004
+
+/* Read Fuse Bits (0x50) command supported.  */
+#define AVR_FUSE_RD	0x0008
+
+/* Old command (bits 0-4 of byte 2) for Write Fuse Bits.  */
+#define AVR_FUSE_OLDWR	0x0010
+
+/* New command (all bits of byte 4) for Write Fuse (Low) Bits.  */
+#define AVR_FUSE_NEWWR	0x0020
+
+/* Read/Write Fuse High Bits.  */
+#define AVR_FUSE_HIGH 	0x0040
+
+/* Read Calibration Byte.  */
+#define AVR_CAL_RD	0x0080
+
+/* Data Polling supported for Flash page write.  */
+#define AVR_PAGE_POLL	0x0100
+
+/* Data Polling supported for byte write (XXX not on AT90S1200?).  */
+#define AVR_BYTE_POLL	0x0200
+
+/* Has 3 bytes of fuse bits (ATmega128).  */
+#define AVR_FUSE_EXT	0x0400
+
+/* Sets of the above flags ORed for different classes of devices.  */
+
+#define AVR_1200 0  /* XXX no polling */
+#define AVR_2313 (AVR_BYTE_POLL)
+#define AVR_TN22 (AVR_BYTE_POLL | AVR_LOCK_RD76)
+#define AVR_8535 (AVR_BYTE_POLL | AVR_LOCK_RD76 | AVR_FUSE_OLDWR)
+#define AVR_4433 (AVR_BYTE_POLL | AVR_LOCK_RD12 | AVR_FUSE_RD | AVR_FUSE_OLDWR)
+#define AVR_M103 (AVR_BYTE_POLL | AVR_LOCK_RD12 | AVR_FUSE_RD | AVR_FUSE_OLDWR)
+#define AVR_TN12 (AVR_BYTE_POLL | AVR_LOCK_RD12 | AVR_FUSE_RD | AVR_FUSE_NEWWR \
+		  | AVR_CAL_RD)
+#define AVR_TN15 (AVR_BYTE_POLL | AVR_LOCK_RD12 | AVR_FUSE_RD | AVR_FUSE_NEWWR \
+		  | AVR_CAL_RD)
+#define AVR_M161 (AVR_BYTE_POLL | AVR_PAGE_POLL | AVR_LOCK_BOOT | AVR_FUSE_RD \
+		  | AVR_FUSE_NEWWR)
+#define AVR_M163 (AVR_BYTE_POLL | AVR_PAGE_POLL | AVR_LOCK_BOOT | AVR_FUSE_RD \
+		  | AVR_FUSE_NEWWR | AVR_CAL_RD | AVR_FUSE_HIGH)
+#define AVR_M128 (AVR_BYTE_POLL | AVR_PAGE_POLL | AVR_LOCK_BOOT | AVR_FUSE_RD \
+		  | AVR_FUSE_NEWWR | AVR_CAL_RD | AVR_FUSE_HIGH | AVR_FUSE_EXT)
+
+/* XXX no boot lock bits, but ordinary lock bits are in bits 1 and 0.
+   XXX has 4 calibration bytes for 1/2/4/8 MHz, can only read one for now.  */
+#define AVR_TN26 (AVR_BYTE_POLL | AVR_PAGE_POLL | AVR_LOCK_BOOT | AVR_FUSE_RD \
+		  | AVR_FUSE_NEWWR | AVR_CAL_RD | AVR_FUSE_HIGH)
+
+#define AVR_MIN_VOLTAGE		2.7	/* V */
+#define AVR_MAX_VOLTAGE		6.0	/* V */
+#define AVR_DEFAULT_VOLTAGE	3.0	/* V */
+
+class TAvr: public TDevice{
+private:
+  /* AVR Family Device (Part) List */
+  struct TPart {
+    char* name;
+    TByte part_family;
+    TByte part_number;
+    TAddr flash_size;
+    TAddr flash_page_size;
+    TAddr eeprom_size;
+    long t_wd_flash_50;    	/* flash programming delay at 5.0 V */
+    long t_wd_eeprom_50;
+    unsigned int flags;
+  };  
+  
+  TPart* part;
+  bool device_locked;   
+  long t_wd_flash;
+  long t_wd_eeprom;
+
+protected:
+  enum TSegment{SEG_FLASH=0, SEG_EEPROM=1, SEG_FUSE=2};
+  
+  /* ATmega page programming */  
+  TAddr page_size;
+  TAddr page_addr_fetched;	/* Becomes true when first byte is written */
+  TAddr page_addr;		/* Fetched Page Address */
+  /* Page Write Polling */
+  TAddr page_poll_addr;  /* address of the last non-0xFF byte written */
+  TByte page_poll_byte;  /* value of the last non-0xFF byte written */
+  
+  /* Variables and Functions */
+private:
+  static TPart parts[];
+  TAddr GetWritePageSize();
+  void SetWriteTimings();
+
+protected:  
+  int segment;
+  static const char* segment_names[];
+  
+  /* AVR Signs/Info */
+  TByte vendor_code;
+  TByte part_family;
+  TByte part_number;
+  
+  void Identify();
+  void OverridePart(const char *);
+  const char* GetPartName();  
+  TAddr GetSegmentSize();
+  bool TestFeatures(unsigned int mask);
+  void CheckMemoryRange(TAddr addr);  
+  long Get_t_wd_flash() const;
+  long Get_t_wd_eeprom() const;    
+  long Get_t_wd_erase() const;
+
+public:
+  /* Set active segment. 
+     Returns true if segment exists, otherwise false 
+  */
+  bool SetSegment(const char* segment_name);
+  
+    /* Returns char pointer of current active segment name.
+  */
+  const char* TellActiveSegment();
+  
+  /* Returns char pointer of the indexed segment name.
+     Index is in range [0,no_of_segments].
+     When index is out of range NULL is returned.
+  */
+  const char* ListSegment(unsigned index);
+
+  /* Read byte description at address addr (as security bits) */
+  const char* ReadByteDescription(TAddr addr);
+  
+  TAvr();
+  ~TAvr();
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/AvrAtmel.C b/tools/platforms/mica/uisp/src/AvrAtmel.C
new file mode 100644
index 00000000..854d12dc
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/AvrAtmel.C
@@ -0,0 +1,615 @@
+// $Id: AvrAtmel.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: AvrAtmel.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	AvrAtmel.C
+	
+	Device driver for the Serial Atmel Low Cost Programmer
+	Uros Platise (c) 1999
+*/
+
+#include "config.h"
+
+#include <sys/time.h>
+#include <sys/types.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include "AvrAtmel.h"
+
+#define AUTO_SELECT	0
+
+/* Low Cost Atmel Programmer AVR Codes
+   Valid for software version: SW_MAJOR=2 SW_MINOR=0
+   
+   Code 0xff is reserved for invalid code. Update the
+   TAvrAtmel constructor if Atmel comes up with it.
+
+   The list is current as of AVRProg 1.37 (shipped with AVR Studio 3.54).
+*/
+TAvrAtmel::SPrgPart TAvrAtmel::prg_part [] = {
+  {"S1200A", 0x10, "AT90S1200 rev. A", false}, /* old */
+  {"S1200B", 0x11, "AT90S1200 rev. B", false}, /* old */
+  {"S1200C", 0x12, "AT90S1200 rev. C", false}, /* old */
+  {"S1200",  0x13, "AT90S1200", false},
+  {"S2313",  0x20, "AT90S2313", false},
+  {"S4414",  0x28, "AT90S4414", false},
+  {"S4433",  0x30, "AT90S4433", false},
+  {"S2333",  0x34, "AT90S2333", false},
+  {"S8515",  0x38, "AT90S8515", false},
+  {"M8515",  0x3A, "ATmega8515", false},
+  {"M8515b", 0x3B, "ATmega8515 BOOT", false},
+  {"M103C",  0x40, "ATmega103 rev. C", false}, /* old */
+  {"M103",   0x41, "ATmega103", false},
+  {"M603",   0x42, "ATmega603", false},
+  {"M128",   0x43, "ATmega128", false},
+  {"M128b",  0x44, "ATmega128 BOOT", false},
+  {"S2323",  0x48, "AT90S2323", false},
+  {"S2343",  0x4C, "AT90S2343", false}, /* ATtiny22 too */
+  {"TN11",   0x50, "ATtiny11",  false}, /* parallel */
+  {"TN10",   0x51, "ATtiny10",  false}, /* parallel */
+  {"TN12",   0x55, "ATtiny12",  false},
+  {"TN15",   0x56, "ATtiny15",  false},
+  {"TN19",   0x58, "ATtiny19",  false}, /* parallel */
+  {"TN28",   0x5C, "ATtiny28",  false}, /* parallel */
+  {"TN26",   0x5E, "ATtiny26",  false},
+  {"M161",   0x60, "ATmega161", false},
+  {"M161b",  0x61, "ATmega161 BOOT", false},
+  {"M163",   0x64, "ATmega163", false},
+  {"M83",    0x65, "ATmega83",  false}, /* ATmega8535 ??? */
+  {"M163b",  0x66, "ATmega163 BOOT", false},
+  {"M83b",   0x67, "ATmega83 BOOT", false},
+  {"S8535",  0x68, "AT90S8535", false},
+  {"S4434",  0x6C, "AT90S4434", false},
+  {"C8534",  0x70, "AT90C8534", false}, /* parallel */
+  {"C8544",  0x71, "AT90C8544", false}, /* parallel ??? */
+  {"M32",    0x72, "ATmega32",  false}, /* XXX no ATmega323 */
+  {"M32b",   0x73, "ATmega32 BOOT", false},
+  {"M16",    0x74, "ATmega16",  false},
+  {"M16b",   0x75, "ATmega16 BOOT", false},
+  {"M8",     0x76, "ATmega8",   false},
+  {"M8b",    0x77, "ATmega8 BOOT", false},
+  {"89C1051",0x80, "AT89C1051", false}, /* parallel */
+  {"89C2051",0x81, "AT89C2051", false}, /* parallel */
+  {"89C51",  0x82, "AT89C51",   false}, /* parallel */
+  {"89LV51", 0x83, "AT89LV51",  false}, /* parallel */
+  {"89C52",  0x84, "AT89C52",   false}, /* parallel */
+  {"89LV52", 0x85, "AT89LV52",  false}, /* parallel */
+  {"S8252",  0x86, "AT89S8252", false},
+  {"89S53",  0x87, "AT89S53",   false},
+  /* 0x88..0xDF reserved for AT89,
+     0xE0..0xFF reserved */
+  {"auto",   AUTO_SELECT, "Auto detect", false},  
+  {"",       0x00, "", false}
+};
+
+/* Private Functions
+*/
+
+void TAvrAtmel::EnterProgrammingMode(){
+  /* Select Device Type */
+  TByte set_device[2] = {'T', desired_avrcode};
+  Send(set_device, 2, 1);
+  CheckResponse(set_device[0]);
+
+  /* Enter Programming Mode */
+  TByte enter_prg[1] = {'P'};
+  Send(enter_prg, 1);
+  CheckResponse(enter_prg[0]);
+
+  /* Read Signature Bytes */
+  TByte sig_bytes[3] = {'s', 0, 0};
+  Send(sig_bytes, 1, 3);
+  part_number = sig_bytes[0];
+  part_family = sig_bytes[1];
+  vendor_code = sig_bytes[2];
+}
+
+void TAvrAtmel::LeaveProgrammingMode(){
+  TByte leave_prg [1] = { 'L' };
+  Send(leave_prg, 1);    
+}
+
+void TAvrAtmel::CheckResponse(TByte x){
+  if (x!=13){throw Error_Device ("Device is not responding correctly.");}
+}
+
+void TAvrAtmel::EnableAvr(){
+  bool auto_select = desired_avrcode == AUTO_SELECT;
+  
+  for (unsigned pidx=0; prg_part[pidx].code != AUTO_SELECT; pidx++){
+  
+    if (!prg_part[pidx].supported && auto_select){continue;}
+    if (auto_select){
+      desired_avrcode = prg_part[pidx].code;
+      Info(2, "Trying with: %s\n", prg_part[pidx].description);
+    }    
+    EnterProgrammingMode();
+    if (!auto_select ||
+        !(vendor_code==0 && part_family==1 && part_number==2)){
+      break;
+    }
+    LeaveProgrammingMode();    
+  }
+
+ // OverridePart("atmega163"); // XXXXX local hack for broken signature bytes
+  
+  Identify();
+  
+  if (auto_select){
+    /* If avr was recongnized by the Identify(), try to find better match
+       in the support list.
+    */    
+    unsigned better_pidx = 0;
+    TByte better_avrcode = desired_avrcode;
+    
+    for (unsigned pidx=0; prg_part[pidx].code != AUTO_SELECT; pidx++){
+      if (!prg_part[pidx].supported){continue;}      
+      if (strstr(prg_part[pidx].description, GetPartName())){
+        better_avrcode = prg_part[better_pidx = pidx].code;
+      }
+    }
+    if (better_avrcode != desired_avrcode){
+      Info(2, "Retrying with better match: %s\n", 
+        prg_part[better_pidx].description);
+      desired_avrcode = better_avrcode;
+      LeaveProgrammingMode();
+      EnterProgrammingMode();
+      Identify();
+    }
+  }
+}
+
+void TAvrAtmel::SetAddress(TAddr addr){
+  apc_address = addr;
+  TByte setAddr [3] = { 'A', (addr>>8)&0xff, addr&0xff};
+  Send(setAddr, 3, 1);
+  CheckResponse(setAddr [0]);
+}
+
+void TAvrAtmel::WriteProgramMemoryPage(){
+  SetAddress(page_addr >> 1);
+  TByte prg_page [1] = { 'm' };
+  Send(prg_page, 1);    
+}
+
+/* Device Interface Functions
+*/
+
+TByte TAvrAtmel::ReadByte(TAddr addr){
+  CheckMemoryRange(addr);
+  if (segment==SEG_FLASH){
+    TAddr saddr = addr>>1;
+    TByte rdF [2] = { 'R', 0 };
+    
+    if (buf_addr==addr && cache_lowbyte==true){return buf_lowbyte;}
+    if (apc_address!=saddr || apc_autoinc==false) SetAddress(saddr);    
+    apc_address++;
+    Send(rdF, 1, 2);
+    /* cache low byte */
+    cache_lowbyte = true;
+    buf_addr = (saddr<<1) + 1;
+    buf_lowbyte = rdF[0];
+    return rdF [1 - (addr&1)];
+  }
+  else if (segment==SEG_EEPROM){    
+    SetAddress(addr);
+    TByte readEE [1] = { 'd' };    
+    Send(readEE, 1);
+    return readEE[0];
+  }
+  else if (segment==SEG_FUSE) {
+    TByte readback = 0xff;
+    switch (addr) {
+    case AVR_FUSE_LOW_ADDR:
+      if (TestFeatures(AVR_FUSE_RD))
+        readback = ReadFuseLowBits();
+#if 0
+      /* TRoth/2002-06-03: This case is handled by ReadLockBits() so we don't
+         need it here. Can I delete it completely? */
+      else if (TestFeatures(AVR_LOCK_RD76))
+        readback = ReadLockFuseBits();
+#endif
+      break;
+    case AVR_FUSE_HIGH_ADDR:
+      if (TestFeatures(AVR_FUSE_HIGH))
+        readback = ReadFuseHighBits();
+      else
+        Info (1, "Cannot read high fuse bits on this device. Returning 0xff\n");
+      break;
+    case AVR_CAL_ADDR:
+      if (TestFeatures(AVR_CAL_RD))
+        readback = ReadCalByte(0);
+      else
+        Info (1, "Cannot read calibration byte on this device. Returning 0xff\n");
+      break;
+    case AVR_LOCK_ADDR:
+      readback = ReadLockBits();
+      break;
+    case AVR_FUSE_EXT_ADDR:
+      if (TestFeatures(AVR_FUSE_EXT))
+        readback = ReadFuseExtBits();
+      else
+        Info (1, "Cannot read extended fuse bits on this device. Returning 0xff\n");
+      break;
+    }
+    Info(3, "Read fuse/cal/lock: byte %d = 0x%02X\n",
+             (int) addr, (int) readback);
+    return readback;
+  }
+  else return 0;
+}
+
+void TAvrAtmel::WriteByte(TAddr addr, TByte byte, bool flush_buffer){
+  CheckMemoryRange(addr);
+  
+  /* do not check if byte is already written -- it spoils auto-increment
+     feature which reduces the speed for 50%!
+  */     
+  if (segment==SEG_FLASH){
+  
+    cache_lowbyte = false;		/* clear read cache buffer */  
+    if (!page_size && byte==0xff) return;
+  
+    /* PAGE MODE PROGRAMMING:
+       If page mode is enabled cache page address.
+       When current address is out of the page address
+       flush page buffer and continue programming.
+    */  
+    if (page_size){
+      Info(4, "Loading data to address: %d (page_addr_fetched=%s)\n", 
+	addr, page_addr_fetched?"Yes":"No");
+
+      if (page_addr_fetched && page_addr != (addr & ~(page_size - 1))){
+	WriteProgramMemoryPage();
+	page_addr_fetched = false;
+      }
+      if (page_addr_fetched==false){
+	page_addr=addr & ~(page_size - 1);
+	page_addr_fetched=true;
+      }
+      if (flush_buffer){WriteProgramMemoryPage();}
+    }
+    
+    TByte wrF [2] = { (addr&1)?'C':'c', byte };
+    
+    if (apc_address!=(addr>>1) || apc_autoinc==false) SetAddress (addr>>1);
+    if (wrF[0]=='C') apc_address++;
+    Send(wrF, 2, 1);
+    CheckResponse(wrF[0]);
+  }
+  else if (segment==SEG_EEPROM){
+    SetAddress(addr);
+    TByte writeEE [2] = { 'D', byte };
+    Send(writeEE, 2, 1);
+    CheckResponse(writeEE[0]);
+  }  
+  else if (segment==SEG_FUSE){
+    Info(3, "Write fuse/lock: byte %d = 0x%02X\n",
+	 (int) addr, (int) byte);
+    switch (addr) {
+    case AVR_FUSE_LOW_ADDR:
+      if (TestFeatures(AVR_FUSE_NEWWR))
+	WriteFuseLowBits(byte);
+      else if (TestFeatures(AVR_FUSE_OLDWR))
+	WriteOldFuseBits(byte);
+      break;
+    case AVR_FUSE_HIGH_ADDR:
+      if (TestFeatures(AVR_FUSE_HIGH))
+	WriteFuseHighBits(byte);
+      else
+        Info (1, "Cannot write high fuse bits on this device");
+      break;
+    /* calibration byte (addr == 2) is read only */
+    case AVR_CAL_ADDR:
+      Info (1, "Cannot write calibration byte. It is read-only.\n");
+      break;
+    case AVR_LOCK_ADDR:
+      WriteLockBits(byte);
+      break;
+    case AVR_FUSE_EXT_ADDR:
+      if (TestFeatures(AVR_FUSE_EXT))
+	WriteFuseExtBits(byte);
+    }
+  }
+}
+
+/*
+ Write Fuse Bits (old):         7     6     5     4     3     2     1     0
+ 2323,8535:                     x     x     x     1     1     1     1     FSTRT
+ 2343:                          x     x     x     1     1     1     1     RCEN
+ 2333,4433:                     x     x     x     BODLV BODEN CKSL2 CKSL1 CKSL0
+ m103,m603:                     x     x     x     1     EESAV 1     SUT1  SUT0
+ */
+void TAvrAtmel::WriteOldFuseBits (TByte val)
+{
+  TByte buf[5] = {'.', 0xac, (val & 0x1f) | 0xa0, 0x00, 0xd2 };
+  Info (2, "Write fuse high bits: %02x\n", (int)val);
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+}
+
+/*
+ Write Fuse Bits (Low, new):    7     6     5     4     3     2     1     0
+ m161:                          1     BTRST 1     BODLV BODEN CKSL2 CKSL1 CKSL0
+ m163,m323:                     BODLV BODEN 1     1     CKSL3 CKSL2 CKSL1 CKSL0
+ m8,m16,m64,m128:               BODLV BODEN SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ tn12:                          BODLV BODEN SPIEN RSTDI CKSL3 CKSL2 CKSL1 CKSL0
+ tn15:                          BODLV BODEN SPIEN RSTDI 1     1     CKSL1 CKSL0
+
+ WARNING (tn12,tn15): writing SPIEN=1 disables further low voltage programming!
+ */
+void TAvrAtmel::WriteFuseLowBits (TByte val)
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0xac, 0xa0, 0x00, val };
+  Info (2, "Write fuse high bits: %02x\n", (int)val);
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+}
+
+/*
+ Write Fuse Bits High:          7     6     5     4     3     2     1     0
+ m163:                          1     1     1     1     1     BTSZ1 BTSZ0 BTRST
+ m323:                          OCDEN JTGEN 1     1     EESAV BTSZ1 BTSZ0 BTRST
+ m16,m64,m128:                  OCDEN JTGEN x     CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ m8:                            RSTDI WDTON x     CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ */
+void TAvrAtmel::WriteFuseHighBits (TByte val)
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0xac, 0xa8, 0x00, val };
+  Info (2, "Write fuse high bits: %02x\n", (int)val);
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+}
+
+/*
+ Write Extended Fuse Bits:      7     6     5     4     3     2     1     0
+ m64,m128:                      x     x     x     x     x     x     M103C WDTON
+ */
+void TAvrAtmel::WriteFuseExtBits (TByte val)
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0xac, 0xa4, 0x00, val };
+  Info (2, "Write fuse extended bits: %02x\n", (int)val);
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+}
+
+
+void TAvrAtmel::FlushWriteBuffer(){
+  if (page_addr_fetched){
+    WriteProgramMemoryPage();  
+  }
+}
+
+/* Chip erase can take a few seconds when talking to a boot loader,
+   which does it one page at a time.  */
+
+#ifndef CHIP_ERASE_TIMEOUT
+#define CHIP_ERASE_TIMEOUT 5
+#endif
+
+void TAvrAtmel::ChipErase(){
+  TByte eraseTarget [1] = { 'e' };
+  Send (eraseTarget, 1, -1, CHIP_ERASE_TIMEOUT);
+  CheckResponse(eraseTarget [0]);
+  Info(1, "Erasing device ...\nReinitializing device\n");
+  EnableAvr();
+}
+
+void TAvrAtmel::WriteLockBits(TByte bits){
+  TByte lockTarget [2] = { 'l', 0xF9 | ((bits << 1) & 0x06) };
+  Send (lockTarget, 2, 1);
+  CheckResponse(lockTarget [0]);
+  Info(1, "Writing lock bits ...\nReinitializing device\n");
+  EnableAvr();
+}
+
+TByte TAvrAtmel::ReadFuseLowBits ()
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0x50, 0x00, 0x00, 0x00 };
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+  Info (2, "Read fuse low bits: %02x\n", (int)buf[0]);
+  return buf[0];
+}
+
+TByte TAvrAtmel::ReadFuseHighBits ()
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0x58, 0x08, 0x00, 0x00 };
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+  Info (2, "Read fuse high bits: %02x\n", (int)buf[0]);
+  return buf[0];
+}
+
+TByte TAvrAtmel::ReadCalByte(TByte addr)
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0x38, 0x00, addr, 0x00 };
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+  Info (2, "Read calibration byte: %02x\n", (int)buf[0]);
+  return buf[0];
+}
+
+TByte TAvrAtmel::ReadFuseExtBits ()
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0x50, 0x08, 0x00, 0x00 };
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+  return buf[0];
+  Info (2, "Read extended fuse bits: %02x\n", (int)buf[0]);
+  return buf[0];
+}
+
+TByte TAvrAtmel::ReadLockFuseBits ()
+{
+  // use new universal command.
+  TByte buf[5] = {'.', 0x58, 0x00, 0x00, 0x00 };
+  Send (buf, 5, 2);
+  CheckResponse (buf[1]);
+  Info (2, "Read lock bits: %02x\n", (int)buf[0]);
+  return buf[0];
+}
+
+// ReadLockBits tries to return the lock bits in a uniform order, despite
+// the differences in different AVR versions.  The goal is to get the lock 
+// bits into this order:
+//       x x BLB12 BLB11 BLB02 BLB01 LB2 LB1
+// For devices that don't support a boot block, the BLB bits will be 1.
+TByte
+TAvrAtmel::ReadLockBits()
+{
+  TByte rbits = 0xFF;
+  if (TestFeatures(AVR_LOCK_BOOT)) {
+    /* x x BLB12 BLB11 BLB02 BLB01 LB2 LB1 */
+    rbits = ReadLockFuseBits();
+  } else if (TestFeatures(AVR_LOCK_RD76)) {
+    rbits = ReadLockFuseBits();
+    /* LB1 LB2 x x x x x x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 7) & 1) | ((rbits >> 5) & 1) | 0xFC;
+  } else if (TestFeatures(AVR_LOCK_RD12)) {
+    rbits = ReadLockFuseBits();
+    /* x x x x x LB2 LB1 x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 1) & 3) | 0xFC;
+  } else {
+    // if its signature returns 0,1,2 then say it's locked.
+    /* Read Signature Bytes */
+    TByte sig_bytes[3] = {'s', 0, 0};
+    Send(sig_bytes, 1, 3);
+    if (sig_bytes[0]==0 && sig_bytes[1]==1 && sig_bytes[2]==2)
+      rbits = 0xFC;
+    else
+      throw Error_Device ("ReadLockBits failed: are you sure this device has lock bits?");
+  }
+  return rbits;
+}
+
+
+/* Constructor/Destructor
+*/
+
+TAvrAtmel::TAvrAtmel():
+  cache_lowbyte(false), apc_address(0x10000), apc_autoinc(false)
+  {
+
+  /* Select Part by Number or Name */
+  desired_avrcode=0xff;
+  const char* desired_partname = GetCmdParam("-dpart");
+  bool got_device=false;
+  
+  if (desired_partname!=NULL) {
+    if (desired_partname[0] >= '0' && desired_partname[0] <= '9'){
+      desired_avrcode = strtol(&desired_partname[0],(char**)NULL,16); 
+    } else{
+      int j;
+      for (j=0; prg_part[j].name[0] != 0; j++){
+        if ((strcasecmp (desired_partname, prg_part[j].name)==0) ||
+            (strcasecmp (desired_partname, prg_part[j].description)==0))
+        {
+	  desired_avrcode = prg_part[j].code;
+	  break;
+	}
+      }
+      if (prg_part[j].name[0]==0){throw Error_Device("-dpart: Invalid name.");}
+    }
+  }
+  
+  /* check: software version and supported part codes */
+  TByte sw_version [2] = {'V', 0};
+  TByte hw_version [2] = {'v', 0};
+  Send(sw_version, 1, 2);
+  Send(hw_version, 1, 2);
+  Info(1, "Programmer Information:\n"
+          "  Software Version: %c.%c, Hardware Version: %c.%c\n", 
+	  sw_version [0], sw_version [1],
+	  hw_version [0], hw_version [1]);
+  
+  /* Detect Auto-Increment */
+  if (sw_version[0]>='2'){
+    apc_autoinc=true;
+    Info(2, "Address Auto Increment Optimization Enabled\n");
+  }
+  
+  /* Retrieve supported codes */
+  TByte sup_codes[1] = {'t'};
+  Tx(sup_codes, 1);
+  TByte buf_code;
+  timeval timeout = {1, 0};
+  if (desired_partname==NULL){
+    Info(1, "  Supported Parts:\n\tNo\tAbbreviation\tDescription\n");
+  }
+  do{
+    Rx(&buf_code, 1, &timeout);
+    if (buf_code==0){break;}    
+    if (desired_partname!=NULL){ 
+      if (buf_code==desired_avrcode){got_device=true;}
+      if (desired_avrcode!=AUTO_SELECT) continue; 
+    }
+    int j;
+    for (j=0; prg_part[j].name[0] != 0; j++){
+      if (prg_part[j].code == buf_code){
+        prg_part[j].supported = true;
+	if (desired_avrcode!=AUTO_SELECT){
+	  Info(1, "\t%.2x\t%s\t\t%s\n", 
+	    buf_code, prg_part[j].name, prg_part[j].description);
+	}
+	break;
+      }
+    }
+    if (prg_part[j].code == 0) {
+      Info(1, "    - %.2xh (not on the uisp's list yet)\n", buf_code);
+    }
+  } while (1);  
+  Info(1, "\n");
+  
+  if (got_device==false) {
+    if (desired_partname==NULL){
+      throw Error_Device("Select a part from the list with the: -dpart\n"
+        "or use the -dpart=auto option for auto-select.\n");
+    } 
+    else if (desired_avrcode!=AUTO_SELECT){
+      throw Error_Device("Programmer does not supported chosen device.");
+    }
+  }
+  
+  EnableAvr();
+}
+
+TAvrAtmel::~TAvrAtmel(){
+  /* leave programming mode! Due to this 
+     procedure, enableAvr had to be taken out
+     of TAtmelAvr::TAtmelAvr func. */
+  LeaveProgrammingMode();
+}
diff --git a/tools/platforms/mica/uisp/src/AvrAtmel.h b/tools/platforms/mica/uisp/src/AvrAtmel.h
new file mode 100644
index 00000000..03230953
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/AvrAtmel.h
@@ -0,0 +1,94 @@
+// $Id: AvrAtmel.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: AvrAtmel.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* AvrAtmel.h, Uros Platise (c) 1999 */
+
+#ifndef __AVR_ATMEL
+#define __AVR_ATMEL
+
+#include "Global.h"
+#include "Serial.h"
+#include "Avr.h"
+
+class TAvrAtmel: public TAvr, TSerial {
+private:
+  /* Programmer AVR codes */
+  struct SPrgPart{
+    const char* name;
+    TByte code;
+    const char* description;
+    bool supported;
+  };
+  static SPrgPart prg_part[];
+  TByte desired_avrcode;
+
+  /* Flash word's lower byte cache */
+  bool cache_lowbyte;
+  TByte buf_lowbyte;
+  TAddr buf_addr;
+  
+  /* Speed-up Transfer by using the Auto-Increment Option */
+  TAddr apc_address;	/* AVR Programmer's Current Address */
+  bool apc_autoinc;	/* Auto Increment Supported by AVR ISP SoftVer 2 */
+
+private:
+  void EnterProgrammingMode();
+  void LeaveProgrammingMode();
+  void CheckResponse(TByte x);
+  void EnableAvr();
+  void SetAddress(TAddr addr);
+  void WriteProgramMemoryPage();
+  TByte ReadFuseLowBits ();
+  TByte ReadFuseHighBits ();
+  TByte ReadCalByte(TByte addr);
+  TByte ReadFuseExtBits ();
+  TByte ReadLockFuseBits ();
+  TByte ReadLockBits ();
+  void WriteOldFuseBits (TByte val);
+  void WriteFuseLowBits (TByte val);
+  void WriteFuseHighBits (TByte val);
+  void WriteFuseExtBits (TByte val);
+
+public:
+  /* Read byte from active segment at address addr. */
+  TByte ReadByte(TAddr addr);
+  
+  /* Write byte to active segment at address addr */
+  void WriteByte(TAddr addr, TByte byte, bool flush_buffer=true);
+  void FlushWriteBuffer();
+  
+  /* Chip Erase */
+  void ChipErase();
+
+  /* Write lock bits */
+  void WriteLockBits(TByte bits);
+  
+  TAvrAtmel();
+  ~TAvrAtmel();
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/AvrDummy.C b/tools/platforms/mica/uisp/src/AvrDummy.C
new file mode 100644
index 00000000..76ba5d98
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/AvrDummy.C
@@ -0,0 +1,606 @@
+// $Id: AvrDummy.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: AvrDummy.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	AvrDummy.C
+	
+	Dummy device driver for the AVR parallel access
+	Uros Platise (c) 1999
+*/
+
+#ifndef NO_DAPA
+
+#include "config.h"
+
+#include "timeradd.h"
+#include "AvrDummy.h"
+
+/* Private Functions
+*/
+
+void TAvrDummy::EnableAvr(){
+  unsigned char prg  [4] = { 0xAC, 0x53, 0, 0 };
+  int try_number = 32;
+  bool no_retry = GetCmdParam("-dno-retry", false);
+  const char *part_name = GetCmdParam("-dpart");
+
+  if (part_name && strcasecmp(part_name, "at90s1200") == 0)
+    no_retry = true;  /* XXX */
+
+  /* Enable AVR programming mode */
+  do{
+    prg[0]=0xAC; prg[1]=0x53; prg[2]=prg[3]=0;
+    Send(prg, 4);
+    if (no_retry) break;
+    if (prg[2] == 0x53) break;
+    PulseSck();
+  } while (try_number--);
+  
+  if (try_number>=0){
+    Info(2,"AVR Direct Parallel Access succeeded after %d retries.\n", 
+      32-try_number);
+  } else {
+    Info(2,"AVR Direct Parallel Access failed after 32 retries.\n");
+  }
+  
+  /* Get AVR Info */
+  vendor_code = GetPartInfo(0);
+  part_family = GetPartInfo(1);
+  part_number = GetPartInfo(2);
+
+  if (part_name)
+    OverridePart(part_name);
+
+  Identify();
+}
+
+TByte
+TAvrDummy::GetPartInfo(TAddr addr)
+{
+  TByte info [4] = { 0x30, 0, addr, 0 };
+  Send(info, 4);
+  return info[3];
+}
+
+void
+TAvrDummy::WriteProgramMemoryPage()
+{
+  struct timeval t_start_wr, t_start_poll, t_wait, t_timeout, t_end, t_write;
+
+  bool poll_data = use_data_polling && TestFeatures(AVR_PAGE_POLL)
+		   && (page_poll_byte != 0xFF);
+
+  TByte prg_page [4] = { 0x4C,
+			(TByte)((page_addr >> 9) & 0xff),
+			(TByte)((page_addr >> 1) & 0xff),
+			0 };
+
+  gettimeofday(&t_start_wr, NULL);
+  t_wait.tv_sec = 0;
+  t_wait.tv_usec = Get_t_wd_flash();
+
+  Info(4, "Programming page address: %d (%.2x, %.2x, %.2x, %.2x)\n", 
+    page_addr, prg_page[0], prg_page[1], prg_page[2], prg_page[3]);
+  Send(prg_page, 4);
+
+  gettimeofday(&t_start_poll, NULL);
+  timeradd(&t_start_poll, &t_wait, &t_timeout);
+
+  /* Wait */
+  do {
+    gettimeofday(&t_end, NULL);
+    if (poll_data) {
+      TByte rbyte = ReadByte(page_poll_addr);
+      if (rbyte == page_poll_byte)
+	break;
+    }
+  } while (timercmp(&t_end, &t_timeout, <));
+
+  /* Write Statistics */
+  timersub(&t_end, &t_start_wr, &t_write);  /* t_write = t_end - t_start_wr */
+  if (poll_data) {
+    float write_time = 1.0e-6 * t_write.tv_usec + t_write.tv_sec;
+    total_poll_time += write_time;
+    if (max_poll_time < write_time)
+      max_poll_time = write_time;
+    if (min_poll_time > write_time)
+      min_poll_time = write_time;
+    total_poll_cnt++;
+  }
+
+  page_addr_fetched=false;
+  page_poll_byte = 0xFF;
+}
+
+
+/* Device Interface Functions
+*/
+
+TByte
+TAvrDummy::ReadByte(TAddr addr)
+{
+  TByte readback = 0xFF;
+    
+  CheckMemoryRange(addr);
+  if (segment == SEG_FLASH) {
+    TByte hl = (addr & 1) ? 0x28 : 0x20;
+    TByte flash[4] = { hl,
+		       (TByte)((addr >> 9) & 0xff),
+		       (TByte)((addr >> 1) & 0xff),
+			 0 };
+    Send(flash, 4);
+    readback = flash[3];
+  } else if (segment == SEG_EEPROM) {
+    TByte eeprom [4] = { 0xA0, 
+			 (TByte)((addr>>8)&0xff), 
+			 (TByte)(addr&0xff), 
+			 0 };
+    Send(eeprom, 4);
+    readback = eeprom[3];
+  } else if (segment==SEG_FUSE) {
+    switch (addr) {
+    case AVR_FUSE_LOW_ADDR:
+      if (TestFeatures(AVR_FUSE_RD))
+	readback = ReadFuseLowBits();
+#if 0
+      /* TRoth/2002-06-03: This case is handled by ReadLockBits() so we don't
+         need it here. Can I delete it completely? */
+      else if (TestFeatures(AVR_LOCK_RD76))
+	readback = ReadLockFuseBits();
+#endif
+      break;
+    case AVR_FUSE_HIGH_ADDR:
+      if (TestFeatures(AVR_FUSE_HIGH))
+	readback = ReadFuseHighBits();
+      break;
+    case AVR_CAL_ADDR:
+      if (TestFeatures(AVR_CAL_RD))
+	readback = ReadCalByte(0);
+      break;
+    case AVR_LOCK_ADDR:
+      readback = ReadLockBits();
+      break;
+    case AVR_FUSE_EXT_ADDR:
+      if (TestFeatures(AVR_FUSE_EXT))
+	readback = ReadFuseExtBits();
+    }
+    Info(3, "Read fuse/cal/lock: byte %d = 0x%02X\n",
+	 (int) addr, (int) readback);
+  }
+  return readback;
+}
+
+/*
+ Read Lock/Fuse Bits:           7     6     5     4     3     2     1     0
+ 2333,4433,m103,m603,tn12,tn15: x     x     x     x     x     LB2   LB1   x
+ 2323,8535:                     LB1   LB2   SPIEN x     x     x     x     FSTRT
+ 2343:                          LB1   LB2   SPIEN x     x     x     x     RCEN
+ tn22:                          LB1   LB2   SPIEN x     x     x     x     0
+ m161,m163,m323,m128:           x     x     BLB12 BLB11 BLB02 BLB01 LB2   LB1
+ tn26:                          x     x     x     x     x     x     LB2   LB1
+ */
+TByte
+TAvrDummy::ReadLockFuseBits()
+{
+  TByte lockfuse[4] = { 0x58, 0, 0, 0 };
+  Send(lockfuse, 4);
+  return lockfuse[3];
+}
+
+/*
+ Read Fuse Bits (Low):          7     6     5     4     3     2     1     0
+ 2333,4433:                     x     x     SPIEN BODLV BODEN CKSL2 CKSL1 CKSL0
+ m103,m603:                     x     x     SPIEN x     EESAV 1     SUT1  SUT0
+ tn12:                          BODLV BODEN SPIEN RSTDI CKSL3 CKSL2 CKSL1 CKSL0
+ tn15:                          BODLV BODEN SPIEN RSTDI x     x     CKSL1 CKSL0
+ m161:                          x     BTRST SPIEN BODLV BODEN CKSL2 CKSL1 CKSL0
+ m163,m323:                     BODLV BODEN x     x     CKSL3 CKSL2 CKSL1 CKSL0
+ m8,m16,m32,m64,m128:           BODLV BODEN SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ tn26:                          PLLCK CKOPT SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ */
+TByte
+TAvrDummy::ReadFuseLowBits()
+{
+  TByte fuselow[4] = { 0x50, 0, 0, 0 };
+  Send(fuselow, 4);
+  return fuselow[3];
+}
+
+/*
+ Read Fuse Bits High:           7     6     5     4     3     2     1     0
+ m163:                          x     x     x     x     1     BTSZ1 BTSZ0 BTRST
+ m323:                          OCDEN JTGEN x     x     EESAV BTSZ1 BTSZ0 BTRST
+ m16,m32,m64,m128:              OCDEN JTGEN SPIEN CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ m8:                            RSTDI WDTON SPIEN CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ tn26:                          1     1     1     RSTDI SPIEN EESAV BODLV BODEN
+ */
+TByte
+TAvrDummy::ReadFuseHighBits()
+{
+  TByte fusehigh[4] = { 0x58, 0x08, 0, 0 };
+  Send(fusehigh, 4);
+  return fusehigh[3];
+}
+
+/*
+ Read Extended Fuse Bits:       7     6     5     4     3     2     1     0
+ m64,m128:                      x     x     x     x     x     x     M103C WDTON
+ */
+TByte
+TAvrDummy::ReadFuseExtBits()
+{
+  TByte fuseext[4] = { 0x50, 0x08, 0, 0 };
+  Send(fuseext, 4);
+  return fuseext[3];
+}
+
+/* Read Calibration Byte (m163, m323, m128, tn12, tn15, tn26)
+   addr=0...3 for tn26, addr=0 for other devices */
+TByte
+TAvrDummy::ReadCalByte(TByte addr)
+{
+  TByte cal[4] = { 0x38, 0, addr, 0 };
+  Send(cal, 4);
+  return cal[3];
+}
+
+/*
+ Write Fuse Bits (old):         7     6     5     4     3     2     1     0
+ 2323,8535:                     x     x     x     1     1     1     1     FSTRT
+ 2343:                          x     x     x     1     1     1     1     RCEN
+ 2333,4433:                     x     x     x     BODLV BODEN CKSL2 CKSL1 CKSL0
+ m103,m603:                     x     x     x     1     EESAV 1     SUT1  SUT0
+ */
+void
+TAvrDummy::WriteOldFuseBits(TByte val)
+{
+  TByte oldfuse[4] = { 0xAC, (val & 0x1F) | 0xA0, 0, 0xD2 };
+  Send(oldfuse, 4);
+}
+
+/*
+ Write Fuse Bits (Low, new):    7     6     5     4     3     2     1     0
+ m161:                          1     BTRST 1     BODLV BODEN CKSL2 CKSL1 CKSL0
+ m163,m323:                     BODLV BODEN 1     1     CKSL3 CKSL2 CKSL1 CKSL0
+ m8,m16,m64,m128:               BODLV BODEN SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ tn12:                          BODLV BODEN SPIEN RSTDI CKSL3 CKSL2 CKSL1 CKSL0
+ tn15:                          BODLV BODEN SPIEN RSTDI 1     1     CKSL1 CKSL0
+ tn26:                          PLLCK CKOPT SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+
+ WARNING (tn12,tn15): writing SPIEN=1 disables further low voltage programming!
+ */
+void
+TAvrDummy::WriteFuseLowBits(TByte val)
+{
+  TByte fuselow[4] = { 0xAC, 0xA0, 0, val };
+  Send(fuselow, 4);
+}
+
+/*
+ Write Fuse Bits High:          7     6     5     4     3     2     1     0
+ m163:                          1     1     1     1     1     BTSZ1 BTSZ0 BTRST
+ m323:                          OCDEN JTGEN 1     1     EESAV BTSZ1 BTSZ0 BTRST
+ m16,m64,m128:                  OCDEN JTGEN x     CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ m8:                            RSTDI WDTON x     CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ tn26:                          1     1     1     RSTDI SPIEN EESAV BODLV BODEN
+ */
+void
+TAvrDummy::WriteFuseHighBits(TByte val)
+{
+  TByte fusehigh[4] = { 0xAC, 0xA8, 0, val };
+  Send(fusehigh, 4);
+}
+
+/*
+ Write Extended Fuse Bits:      7     6     5     4     3     2     1     0
+ m64,m128:                      x     x     x     x     x     x     M103C WDTON
+ */
+void
+TAvrDummy::WriteFuseExtBits(TByte val)
+{
+  TByte fuseext[4] = { 0xAC, 0xA4, 0, val };
+  Send(fuseext, 4);
+}
+
+
+void
+TAvrDummy::WriteByte(TAddr addr, TByte byte, bool flush_buffer)
+{
+  struct timeval t_start_wr, t_start_poll, t_wait, t_timeout, t_end, t_write;
+  TByte rbyte=0;
+  bool device_not_erased=false;
+  
+  /* Poll data if use_data_polling is enabled and if page mode
+     is enabled, flash is not selected */
+  bool poll_data = ((segment==SEG_FLASH && !page_size) || segment==SEG_EEPROM)
+		   && use_data_polling && TestFeatures(AVR_BYTE_POLL);
+
+  CheckMemoryRange(addr);
+  
+  /* For speed, don't program a byte that is already there
+     (such as 0xFF after chip erase).  */
+  if (poll_data){
+    rbyte=ReadByte(addr);
+    if (rbyte == byte){return;}
+    if (rbyte != 0xff){device_not_erased=true;}
+  }
+  
+  t_wait.tv_sec = 0;
+  t_wait.tv_usec = 500000;
+
+  gettimeofday(&t_start_wr, NULL);
+
+  if (segment==SEG_FLASH){
+      
+    /* PAGE MODE PROGRAMMING:
+       If page mode is enabled cache page address.
+       When current address is out of the page address
+       flush page buffer and continue programming.
+    */
+    if (page_size) {
+      Info(4, "Loading data to address: %d (page_addr_fetched=%s)\n", 
+        addr, page_addr_fetched?"Yes":"No");
+	
+      if (page_addr_fetched && page_addr != (addr & ~(page_size - 1))){
+        WriteProgramMemoryPage();	
+      }
+      if (page_addr_fetched==false){
+        page_addr=addr & ~(page_size - 1);
+	page_addr_fetched=true;
+      }
+      if (flush_buffer){WriteProgramMemoryPage();}
+    }
+
+    TByte hl = (addr & 1) ? 0x48 : 0x40;
+    TByte flash [4] = { hl,
+			(TByte)((addr >> 9) & 0xff),
+			(TByte)((addr >> 1) & 0xff),
+			byte };
+    Send(flash, 4);
+
+    /* Remember the last non-0xFF byte written, for page write polling.  */
+    if (byte != 0xFF) {
+      page_poll_addr = addr;
+      page_poll_byte = byte;
+    }
+
+    /* We do not need to wait for each byte in page mode programming */
+    if (page_size){return;}    
+    t_wait.tv_usec = Get_t_wd_flash();
+  }
+  else if (segment==SEG_EEPROM){
+    TByte eeprom [4] = { 0xC0, 
+			 (TByte)((addr>>8)&0xff), 
+			 (TByte)(addr&0xff),
+			 byte };
+    Send(eeprom, 4);  
+    t_wait.tv_usec = Get_t_wd_eeprom();    
+  }
+  else if (segment==SEG_FUSE) {
+    Info(3, "Write fuse/lock: byte %d = 0x%02X\n",
+	 (int) addr, (int) byte);
+    switch (addr) {
+    case AVR_FUSE_LOW_ADDR:
+      if (TestFeatures(AVR_FUSE_NEWWR))
+	WriteFuseLowBits(byte);
+      else if (TestFeatures(AVR_FUSE_OLDWR))
+	WriteOldFuseBits(byte);
+      break;
+    case AVR_FUSE_HIGH_ADDR:
+      if (TestFeatures(AVR_FUSE_HIGH))
+	WriteFuseHighBits(byte);
+      break;
+    case AVR_CAL_ADDR:
+      /* calibration byte (addr == 2) is read only */
+      break;
+    case AVR_LOCK_ADDR:
+      WriteLockBits(byte);
+      break;
+    case AVR_FUSE_EXT_ADDR:
+      if (TestFeatures(AVR_FUSE_EXT))
+	WriteFuseExtBits(byte);
+    }
+    t_wait.tv_usec = Get_t_wd_eeprom();
+  }
+
+  gettimeofday(&t_start_poll, NULL);
+  /* t_timeout = now + t_wd_prog */
+  timeradd(&t_start_poll, &t_wait, &t_timeout);
+
+  do {
+    /* Data Polling: if the programmed value reads correctly, and
+       is not equal to any of the possible P1, P2 read back values,
+       it is done; else wait until tWD_PROG time has elapsed.
+       The busy loop here is to avoid rounding up the programming
+       wait time to 10ms timer ticks (for Linux/x86).  Programming
+       is not really "hard real time" but 10ms instead of ~4ms for
+       every byte makes it slow.  gettimeofday() reads the 8254
+       timer registers (or Pentium cycle counter if available),
+       so it has much better (microsecond) resolution.  
+    */
+    gettimeofday(&t_end, NULL);
+    if (poll_data){
+      if ((byte == (rbyte = ReadByte(addr))) &&
+          (byte != 0) && (byte != 0x7F) && (byte != 0x80) && (byte != 0xFF)){
+	break;
+      }
+    }
+  } while (timercmp(&t_end, &t_timeout, <));
+  
+  /* Write Statistics */
+  timersub(&t_end, &t_start_wr, &t_write);  /* t_write = t_end - t_start_wr */
+  if (poll_data) {
+    float write_time = 1.0e-6 * t_write.tv_usec + t_write.tv_sec;
+    total_poll_time += write_time;
+    if (max_poll_time < write_time)
+      max_poll_time = write_time;
+    if (min_poll_time > write_time)
+      min_poll_time = write_time;
+    total_poll_cnt++;
+  }
+
+  if (poll_data && byte != rbyte){
+    if (device_not_erased){
+      Info(0, "Warning: It seems that device is not erased.\n"
+              "         Erase it with the --erase option.\n");
+    }
+    Info(0, "Error: Data polling readback status: write=0x%02x read=0x%02x\n", 
+      byte, rbyte);
+    throw Error_Device("If device was erased disable polling with the "
+      "-dno-poll option.");
+  }
+}
+
+void
+TAvrDummy::FlushWriteBuffer()
+{
+  if (page_addr_fetched){
+    WriteProgramMemoryPage();  
+  }
+}
+
+void
+TAvrDummy::ChipErase()
+{
+  TByte init[4] = { 0xAC, 0x53, 0x00, 0x00 };
+  TByte chip_erase [4] = { 0xAC, 0x80, 0x00, 0x00 };
+  Info(1, "Erasing device ...\n");
+  Send(init, 4);
+  Send(chip_erase, 4);
+  Delay_usec(Get_t_wd_erase());
+  Delay_usec(Get_t_wd_erase());
+  Delay_usec(9000);
+  Delay_usec(9000);
+  PulseReset();
+  Delay_usec(9000);
+  Info(1, "Reinitializing device\n");  
+  EnableAvr();
+}
+
+/*
+   0 = program (clear bit), 1 = leave unchanged
+   bit 0 = LB1
+   bit 1 = LB2
+   bit 2 = BLB01
+   bit 3 = BLB02
+   bit 4 = BLB11
+   bit 5 = BLB12
+   bit 6 = 1 (reserved)
+   bit 7 = 1 (reserved)
+ */
+void
+TAvrDummy::WriteLockBits(TByte bits)
+{
+  /* This handles both old (byte 2, bits 1-2)
+     and new (byte 4, bits 0-5) devices.  */
+  TByte lock[4] = { 0xAC, 0xF9 | ((bits << 1) & 0x06), 0xFF, bits };
+  TByte rbits;
+
+  Info(1, "Writing lock bits ...\n");
+  Send(lock, 4);
+  Delay_usec(Get_t_wd_erase());
+  PulseReset();
+  Info(1, "Reinitializing device\n");
+  EnableAvr();
+  rbits = ReadLockBits();
+  if (rbits & ~bits)
+    Info(0, "Warning: lock bits write=0x%02X read=0x%02X\n",
+	 (int) bits, (int) rbits);
+}
+
+TByte
+TAvrDummy::ReadLockBits()
+{
+  TByte rbits = 0xFF;
+  if (TestFeatures(AVR_LOCK_BOOT)) {
+    /* x x BLB12 BLB11 BLB02 BLB01 LB2 LB1 */
+    rbits = ReadLockFuseBits();
+  } else if (TestFeatures(AVR_LOCK_RD76)) {
+    rbits = ReadLockFuseBits();
+    /* LB1 LB2 x x x x x x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 7) & 1) | ((rbits >> 5) & 1) | 0xFC;
+  } else if (TestFeatures(AVR_LOCK_RD12)) {
+    rbits = ReadLockFuseBits();
+    /* x x x x x LB2 LB1 x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 1) & 3) | 0xFC;
+  } else if (GetPartInfo(0) == 0 &&
+	     GetPartInfo(1) == 1 &&
+	     GetPartInfo(2) == 2) {
+    rbits = 0xFC;
+  } else throw Error_Device ("ReadLockBits failed: are you sure this device has lock bits?");
+  return rbits;
+}
+
+unsigned int
+TAvrDummy::GetPollCount()
+{
+  return total_poll_cnt;
+}
+
+float
+TAvrDummy::GetMinPollTime()
+{
+  return min_poll_time;
+}
+
+float
+TAvrDummy::GetMaxPollTime()
+{
+  return max_poll_time;
+}
+
+float
+TAvrDummy::GetTotPollTime()
+{
+  return total_poll_time;
+}
+
+void
+TAvrDummy::ResetMinMax()
+{
+  min_poll_time = 1.0;
+  max_poll_time = 0.0;
+  total_poll_time = 0.0;
+  total_poll_cnt = 0;
+}
+
+/* Constructor
+*/
+
+TAvrDummy::TAvrDummy():
+  use_data_polling(true)
+{
+  ResetMinMax();
+  
+  /* Device Command line options ... */ 
+  if (GetCmdParam("-dno-poll", false)){use_data_polling=false;} 
+  
+  EnableAvr();
+}
+
+#endif
+/* eof */
diff --git a/tools/platforms/mica/uisp/src/AvrDummy.h b/tools/platforms/mica/uisp/src/AvrDummy.h
new file mode 100644
index 00000000..d8ab4a28
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/AvrDummy.h
@@ -0,0 +1,82 @@
+// $Id: AvrDummy.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: AvrDummy.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* AvrDummy.h, Uros Platise (c) 1999 */
+
+#ifndef __AVR_DUMMY
+#define __AVR_DUMMY
+
+#include "Global.h"
+#include "Avr.h"
+#include "DAPA.h"
+
+class TAvrDummy: public TAvr, TDAPA {
+private:
+  bool use_data_polling;
+  float min_poll_time, max_poll_time, total_poll_time;
+  unsigned long total_poll_cnt;  /* bytes or pages */
+
+  void EnableAvr();
+  TByte GetPartInfo(TAddr addr);
+  void WriteProgramMemoryPage();
+  TByte ReadLockFuseBits();
+  TByte ReadFuseLowBits();
+  TByte ReadFuseHighBits();
+  TByte ReadFuseExtBits();
+  TByte ReadCalByte(TByte addr);
+  void WriteOldFuseBits(TByte val);  /* 5 bits */
+  void WriteFuseLowBits(TByte val);
+  void WriteFuseHighBits(TByte val);
+  void WriteFuseExtBits(TByte val);
+
+  /* lock bits */
+  void WriteLockBits(TByte bits);
+  TByte ReadLockBits();
+
+public:
+  /* Read byte from active segment at address addr. */
+  TByte ReadByte(TAddr addr);
+
+  /* Write byte to active segment at address addr */
+  void WriteByte(TAddr addr, TByte byte, bool flush_buffer=true);
+  void FlushWriteBuffer();
+  
+  /* Chip Erase */
+  void ChipErase();
+
+  /* Transfer Statistics */
+  unsigned int GetPollCount();
+  float GetMinPollTime();
+  float GetTotPollTime();
+  float GetMaxPollTime();
+  void ResetMinMax();
+  
+  TAvrDummy();
+  ~TAvrDummy(){}
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/AvrStargate.C b/tools/platforms/mica/uisp/src/AvrStargate.C
new file mode 100644
index 00000000..16006ff3
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/AvrStargate.C
@@ -0,0 +1,604 @@
+// $Id: AvrStargate.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: AvrStargate.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * Portions Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ ****************************************************************************
+ */
+
+#include "config.h"
+
+#include "timeradd.h"
+#include "AvrStargate.h"
+
+/* Private Functions
+*/
+
+void TAvrStargate::EnableAvr(){
+  unsigned char prg  [4] = { 0xAC, 0x53, 0, 0 };
+  int try_number = 32;
+  bool no_retry = GetCmdParam("-dno-retry", false);
+  const char *part_name = GetCmdParam("-dpart");
+
+  if (part_name && strcasecmp(part_name, "at90s1200") == 0)
+    no_retry = true;  /* XXX */
+
+  /* Enable AVR programming mode */
+  do{
+    prg[0]=0xAC; prg[1]=0x53; prg[2]=prg[3]=0;
+    Send(prg, 4);
+    if (no_retry) break;
+    if (prg[2] == 0x53) break;
+    PulseSck();
+  } while (try_number--);
+  
+  if (try_number>=0){
+    Info(2,"AVR Stargate SSP Access succeeded after %d retries.\n", 
+      32-try_number);
+  } else {
+    Info(2,"AVR Stargate SSP Access failed after 32 retries.\n");
+  }
+  
+  /* Get AVR Info */
+  vendor_code = GetPartInfo(0);
+  part_family = GetPartInfo(1);
+  part_number = GetPartInfo(2);
+
+  if (part_name)
+    OverridePart(part_name);
+
+  Identify();
+}
+
+TByte
+TAvrStargate::GetPartInfo(TAddr addr)
+{
+  TByte info [4] = { 0x30, 0, addr, 0 };
+  Send(info, 4);
+  return info[3];
+}
+
+void
+TAvrStargate::WriteProgramMemoryPage()
+{
+  struct timeval t_start_wr, t_start_poll, t_wait, t_timeout, t_end, t_write;
+
+  bool poll_data = use_data_polling && TestFeatures(AVR_PAGE_POLL)
+		   && (page_poll_byte != 0xFF);
+
+  TByte prg_page [4] = { 0x4C,
+			(TByte)((page_addr >> 9) & 0xff),
+			(TByte)((page_addr >> 1) & 0xff),
+			0 };
+
+  gettimeofday(&t_start_wr, NULL);
+  t_wait.tv_sec = 0;
+  t_wait.tv_usec = Get_t_wd_flash();
+
+  Info(4, "Programming page address: %d (%.2x, %.2x, %.2x, %.2x)\n", 
+    page_addr, prg_page[0], prg_page[1], prg_page[2], prg_page[3]);
+  Send(prg_page, 4);
+
+  gettimeofday(&t_start_poll, NULL);
+  timeradd(&t_start_poll, &t_wait, &t_timeout);
+
+  /* Wait */
+  do {
+    gettimeofday(&t_end, NULL);
+    if (poll_data) {
+      TByte rbyte = ReadByte(page_poll_addr);
+      if (rbyte == page_poll_byte)
+	break;
+    }
+  } while (timercmp(&t_end, &t_timeout, <));
+
+  /* Write Statistics */
+  timersub(&t_end, &t_start_wr, &t_write);  /* t_write = t_end - t_start_wr */
+  if (poll_data) {
+    float write_time = 1.0e-6 * t_write.tv_usec + t_write.tv_sec;
+    total_poll_time += write_time;
+    if (max_poll_time < write_time)
+      max_poll_time = write_time;
+    if (min_poll_time > write_time)
+      min_poll_time = write_time;
+    total_poll_cnt++;
+  }
+
+  page_addr_fetched=false;
+  page_poll_byte = 0xFF;
+}
+
+
+/* Device Interface Functions
+*/
+
+TByte
+TAvrStargate::ReadByte(TAddr addr)
+{
+  TByte readback = 0xFF;
+    
+  CheckMemoryRange(addr);
+  if (segment == SEG_FLASH) {
+    TByte hl = (addr & 1) ? 0x28 : 0x20;
+    TByte flash[4] = { hl,
+		       (TByte)((addr >> 9) & 0xff),
+		       (TByte)((addr >> 1) & 0xff),
+			 0 };
+    Send(flash, 4);
+    readback = flash[3];
+  } else if (segment == SEG_EEPROM) {
+    TByte eeprom [4] = { 0xA0, 
+			 (TByte)((addr>>8)&0xff), 
+			 (TByte)(addr&0xff), 
+			 0 };
+    Send(eeprom, 4);
+    readback = eeprom[3];
+  } else if (segment==SEG_FUSE) {
+    switch (addr) {
+    case AVR_FUSE_LOW_ADDR:
+      if (TestFeatures(AVR_FUSE_RD))
+	readback = ReadFuseLowBits();
+#if 0
+      /* TRoth/2002-06-03: This case is handled by ReadLockBits() so we don't
+         need it here. Can I delete it completely? */
+      else if (TestFeatures(AVR_LOCK_RD76))
+	readback = ReadLockFuseBits();
+#endif
+      break;
+    case AVR_FUSE_HIGH_ADDR:
+      if (TestFeatures(AVR_FUSE_HIGH))
+	readback = ReadFuseHighBits();
+      break;
+    case AVR_CAL_ADDR:
+      if (TestFeatures(AVR_CAL_RD))
+	readback = ReadCalByte(0);
+      break;
+    case AVR_LOCK_ADDR:
+      readback = ReadLockBits();
+      break;
+    case AVR_FUSE_EXT_ADDR:
+      if (TestFeatures(AVR_FUSE_EXT))
+	readback = ReadFuseExtBits();
+    }
+    Info(3, "Read fuse/cal/lock: byte %d = 0x%02X\n",
+	 (int) addr, (int) readback);
+  }
+  return readback;
+}
+
+/*
+ Read Lock/Fuse Bits:           7     6     5     4     3     2     1     0
+ 2333,4433,m103,m603,tn12,tn15: x     x     x     x     x     LB2   LB1   x
+ 2323,8535:                     LB1   LB2   SPIEN x     x     x     x     FSTRT
+ 2343:                          LB1   LB2   SPIEN x     x     x     x     RCEN
+ tn22:                          LB1   LB2   SPIEN x     x     x     x     0
+ m161,m163,m323,m128:           x     x     BLB12 BLB11 BLB02 BLB01 LB2   LB1
+ tn26:                          x     x     x     x     x     x     LB2   LB1
+ */
+TByte
+TAvrStargate::ReadLockFuseBits()
+{
+  TByte lockfuse[4] = { 0x58, 0, 0, 0 };
+  Send(lockfuse, 4);
+  return lockfuse[3];
+}
+
+/*
+ Read Fuse Bits (Low):          7     6     5     4     3     2     1     0
+ 2333,4433:                     x     x     SPIEN BODLV BODEN CKSL2 CKSL1 CKSL0
+ m103,m603:                     x     x     SPIEN x     EESAV 1     SUT1  SUT0
+ tn12:                          BODLV BODEN SPIEN RSTDI CKSL3 CKSL2 CKSL1 CKSL0
+ tn15:                          BODLV BODEN SPIEN RSTDI x     x     CKSL1 CKSL0
+ m161:                          x     BTRST SPIEN BODLV BODEN CKSL2 CKSL1 CKSL0
+ m163,m323:                     BODLV BODEN x     x     CKSL3 CKSL2 CKSL1 CKSL0
+ m8,m16,m32,m64,m128:           BODLV BODEN SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ tn26:                          PLLCK CKOPT SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ */
+TByte
+TAvrStargate::ReadFuseLowBits()
+{
+  TByte fuselow[4] = { 0x50, 0, 0, 0 };
+  Send(fuselow, 4);
+  return fuselow[3];
+}
+
+/*
+ Read Fuse Bits High:           7     6     5     4     3     2     1     0
+ m163:                          x     x     x     x     1     BTSZ1 BTSZ0 BTRST
+ m323:                          OCDEN JTGEN x     x     EESAV BTSZ1 BTSZ0 BTRST
+ m16,m32,m64,m128:              OCDEN JTGEN SPIEN CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ m8:                            RSTDI WDTON SPIEN CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ tn26:                          1     1     1     RSTDI SPIEN EESAV BODLV BODEN
+ */
+TByte
+TAvrStargate::ReadFuseHighBits()
+{
+  TByte fusehigh[4] = { 0x58, 0x08, 0, 0 };
+  Send(fusehigh, 4);
+  return fusehigh[3];
+}
+
+/*
+ Read Extended Fuse Bits:       7     6     5     4     3     2     1     0
+ m64,m128:                      x     x     x     x     x     x     M103C WDTON
+ */
+TByte
+TAvrStargate::ReadFuseExtBits()
+{
+  TByte fuseext[4] = { 0x50, 0x08, 0, 0 };
+  Send(fuseext, 4);
+  return fuseext[3];
+}
+
+/* Read Calibration Byte (m163, m323, m128, tn12, tn15, tn26)
+   addr=0...3 for tn26, addr=0 for other devices */
+TByte
+TAvrStargate::ReadCalByte(TByte addr)
+{
+  TByte cal[4] = { 0x38, 0, addr, 0 };
+  Send(cal, 4);
+  return cal[3];
+}
+
+/*
+ Write Fuse Bits (old):         7     6     5     4     3     2     1     0
+ 2323,8535:                     x     x     x     1     1     1     1     FSTRT
+ 2343:                          x     x     x     1     1     1     1     RCEN
+ 2333,4433:                     x     x     x     BODLV BODEN CKSL2 CKSL1 CKSL0
+ m103,m603:                     x     x     x     1     EESAV 1     SUT1  SUT0
+ */
+void
+TAvrStargate::WriteOldFuseBits(TByte val)
+{
+  TByte oldfuse[4] = { 0xAC, (val & 0x1F) | 0xA0, 0, 0xD2 };
+  Send(oldfuse, 4);
+}
+
+/*
+ Write Fuse Bits (Low, new):    7     6     5     4     3     2     1     0
+ m161:                          1     BTRST 1     BODLV BODEN CKSL2 CKSL1 CKSL0
+ m163,m323:                     BODLV BODEN 1     1     CKSL3 CKSL2 CKSL1 CKSL0
+ m8,m16,m64,m128:               BODLV BODEN SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+ tn12:                          BODLV BODEN SPIEN RSTDI CKSL3 CKSL2 CKSL1 CKSL0
+ tn15:                          BODLV BODEN SPIEN RSTDI 1     1     CKSL1 CKSL0
+ tn26:                          PLLCK CKOPT SUT1  SUT0  CKSL3 CKSL2 CKSL1 CKSL0
+
+ WARNING (tn12,tn15): writing SPIEN=1 disables further low voltage programming!
+ */
+void
+TAvrStargate::WriteFuseLowBits(TByte val)
+{
+  TByte fuselow[4] = { 0xAC, 0xA0, 0, val };
+  Send(fuselow, 4);
+}
+
+/*
+ Write Fuse Bits High:          7     6     5     4     3     2     1     0
+ m163:                          1     1     1     1     1     BTSZ1 BTSZ0 BTRST
+ m323:                          OCDEN JTGEN 1     1     EESAV BTSZ1 BTSZ0 BTRST
+ m16,m64,m128:                  OCDEN JTGEN x     CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ m8:                            RSTDI WDTON x     CKOPT EESAV BTSZ1 BTSZ0 BTRST
+ tn26:                          1     1     1     RSTDI SPIEN EESAV BODLV BODEN
+ */
+void
+TAvrStargate::WriteFuseHighBits(TByte val)
+{
+  TByte fusehigh[4] = { 0xAC, 0xA8, 0, val };
+  Send(fusehigh, 4);
+}
+
+/*
+ Write Extended Fuse Bits:      7     6     5     4     3     2     1     0
+ m64,m128:                      x     x     x     x     x     x     M103C WDTON
+ */
+void
+TAvrStargate::WriteFuseExtBits(TByte val)
+{
+  TByte fuseext[4] = { 0xAC, 0xA4, 0, val };
+  Send(fuseext, 4);
+}
+
+
+void
+TAvrStargate::WriteByte(TAddr addr, TByte byte, bool flush_buffer)
+{
+  struct timeval t_start_wr, t_start_poll, t_wait, t_timeout, t_end, t_write;
+  TByte rbyte=0;
+  bool device_not_erased=false;
+  
+  /* Poll data if use_data_polling is enabled and if page mode
+     is enabled, flash is not selected */
+  bool poll_data = ((segment==SEG_FLASH && !page_size) || segment==SEG_EEPROM)
+		   && use_data_polling && TestFeatures(AVR_BYTE_POLL);
+
+  CheckMemoryRange(addr);
+  
+  /* For speed, don't program a byte that is already there
+     (such as 0xFF after chip erase).  */
+  if (poll_data){
+    rbyte=ReadByte(addr);
+    if (rbyte == byte){return;}
+    if (rbyte != 0xff){device_not_erased=true;}
+  }
+  
+  t_wait.tv_sec = 0;
+  t_wait.tv_usec = 500000;
+
+  gettimeofday(&t_start_wr, NULL);
+
+  if (segment==SEG_FLASH){
+      
+    /* PAGE MODE PROGRAMMING:
+       If page mode is enabled cache page address.
+       When current address is out of the page address
+       flush page buffer and continue programming.
+    */
+    if (page_size) {
+      Info(4, "Loading data to address: %d (page_addr_fetched=%s)\n", 
+        addr, page_addr_fetched?"Yes":"No");
+	
+      if (page_addr_fetched && page_addr != (addr & ~(page_size - 1))){
+        WriteProgramMemoryPage();	
+      }
+      if (page_addr_fetched==false){
+        page_addr=addr & ~(page_size - 1);
+	page_addr_fetched=true;
+      }
+      if (flush_buffer){WriteProgramMemoryPage();}
+    }
+
+    TByte hl = (addr & 1) ? 0x48 : 0x40;
+    TByte flash [4] = { hl,
+			(TByte)((addr >> 9) & 0xff),
+			(TByte)((addr >> 1) & 0xff),
+			byte };
+    Send(flash, 4);
+
+    /* Remember the last non-0xFF byte written, for page write polling.  */
+    if (byte != 0xFF) {
+      page_poll_addr = addr;
+      page_poll_byte = byte;
+    }
+
+    /* We do not need to wait for each byte in page mode programming */
+    if (page_size){return;}    
+    t_wait.tv_usec = Get_t_wd_flash();
+  }
+  else if (segment==SEG_EEPROM){
+    TByte eeprom [4] = { 0xC0, 
+			 (TByte)((addr>>8)&0xff), 
+			 (TByte)(addr&0xff),
+			 byte };
+    Send(eeprom, 4);  
+    t_wait.tv_usec = Get_t_wd_eeprom();    
+  }
+  else if (segment==SEG_FUSE) {
+    Info(3, "Write fuse/lock: byte %d = 0x%02X\n",
+	 (int) addr, (int) byte);
+    switch (addr) {
+    case AVR_FUSE_LOW_ADDR:
+      if (TestFeatures(AVR_FUSE_NEWWR))
+	WriteFuseLowBits(byte);
+      else if (TestFeatures(AVR_FUSE_OLDWR))
+	WriteOldFuseBits(byte);
+      break;
+    case AVR_FUSE_HIGH_ADDR:
+      if (TestFeatures(AVR_FUSE_HIGH))
+	WriteFuseHighBits(byte);
+      break;
+    case AVR_CAL_ADDR:
+      /* calibration byte (addr == 2) is read only */
+      break;
+    case AVR_LOCK_ADDR:
+      WriteLockBits(byte);
+      break;
+    case AVR_FUSE_EXT_ADDR:
+      if (TestFeatures(AVR_FUSE_EXT))
+	WriteFuseExtBits(byte);
+    }
+    t_wait.tv_usec = Get_t_wd_eeprom();
+  }
+
+  gettimeofday(&t_start_poll, NULL);
+  /* t_timeout = now + t_wd_prog */
+  timeradd(&t_start_poll, &t_wait, &t_timeout);
+
+  do {
+    /* Data Polling: if the programmed value reads correctly, and
+       is not equal to any of the possible P1, P2 read back values,
+       it is done; else wait until tWD_PROG time has elapsed.
+       The busy loop here is to avoid rounding up the programming
+       wait time to 10ms timer ticks (for Linux/x86).  Programming
+       is not really "hard real time" but 10ms instead of ~4ms for
+       every byte makes it slow.  gettimeofday() reads the 8254
+       timer registers (or Pentium cycle counter if available),
+       so it has much better (microsecond) resolution.  
+    */
+    gettimeofday(&t_end, NULL);
+    if (poll_data){
+      if ((byte == (rbyte = ReadByte(addr))) &&
+          (byte != 0) && (byte != 0x7F) && (byte != 0x80) && (byte != 0xFF)){
+	break;
+      }
+    }
+  } while (timercmp(&t_end, &t_timeout, <));
+  
+  /* Write Statistics */
+  timersub(&t_end, &t_start_wr, &t_write);  /* t_write = t_end - t_start_wr */
+  if (poll_data) {
+    float write_time = 1.0e-6 * t_write.tv_usec + t_write.tv_sec;
+    total_poll_time += write_time;
+    if (max_poll_time < write_time)
+      max_poll_time = write_time;
+    if (min_poll_time > write_time)
+      min_poll_time = write_time;
+    total_poll_cnt++;
+  }
+
+  if (poll_data && byte != rbyte){
+    if (device_not_erased){
+      Info(0, "Warning: It seems that device is not erased.\n"
+              "         Erase it with the --erase option.\n");
+    }
+    Info(0, "Error: Data polling readback status: write=0x%02x read=0x%02x\n", 
+      byte, rbyte);
+    throw Error_Device("If device was erased disable polling with the "
+      "-dno-poll option.");
+  }
+}
+
+void
+TAvrStargate::FlushWriteBuffer()
+{
+  if (page_addr_fetched){
+    WriteProgramMemoryPage();  
+  }
+}
+
+void
+TAvrStargate::ChipErase()
+{
+  TByte init[4] = { 0xAC, 0x53, 0x00, 0x00 };
+  TByte chip_erase [4] = { 0xAC, 0x80, 0x00, 0x00 };
+  Info(1, "Erasing device ...\n");
+  Send(init, 4);
+  Send(chip_erase, 4);
+  Delay_usec(Get_t_wd_erase());
+  Delay_usec(Get_t_wd_erase());
+  Delay_usec(9000);
+  Delay_usec(9000);
+  PulseReset();
+  Delay_usec(9000);
+  Info(1, "Reinitializing device\n");  
+  EnableAvr();
+}
+
+/*
+   0 = program (clear bit), 1 = leave unchanged
+   bit 0 = LB1
+   bit 1 = LB2
+   bit 2 = BLB01
+   bit 3 = BLB02
+   bit 4 = BLB11
+   bit 5 = BLB12
+   bit 6 = 1 (reserved)
+   bit 7 = 1 (reserved)
+ */
+void
+TAvrStargate::WriteLockBits(TByte bits)
+{
+  /* This handles both old (byte 2, bits 1-2)
+     and new (byte 4, bits 0-5) devices.  */
+  TByte lock[4] = { 0xAC, 0xF9 | ((bits << 1) & 0x06), 0xFF, bits };
+  TByte rbits;
+
+  Info(1, "Writing lock bits ...\n");
+  Send(lock, 4);
+  Delay_usec(Get_t_wd_erase());
+  PulseReset();
+  Info(1, "Reinitializing device\n");
+  EnableAvr();
+  rbits = ReadLockBits();
+  if (rbits & ~bits)
+    Info(0, "Warning: lock bits write=0x%02X read=0x%02X\n",
+	 (int) bits, (int) rbits);
+}
+
+TByte
+TAvrStargate::ReadLockBits()
+{
+  TByte rbits = 0xFF;
+  if (TestFeatures(AVR_LOCK_BOOT)) {
+    /* x x BLB12 BLB11 BLB02 BLB01 LB2 LB1 */
+    rbits = ReadLockFuseBits();
+  } else if (TestFeatures(AVR_LOCK_RD76)) {
+    rbits = ReadLockFuseBits();
+    /* LB1 LB2 x x x x x x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 7) & 1) | ((rbits >> 5) & 1) | 0xFC;
+  } else if (TestFeatures(AVR_LOCK_RD12)) {
+    rbits = ReadLockFuseBits();
+    /* x x x x x LB2 LB1 x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 1) & 3) | 0xFC;
+  } else if (GetPartInfo(0) == 0 &&
+	     GetPartInfo(1) == 1 &&
+	     GetPartInfo(2) == 2) {
+    rbits = 0xFC;
+  } else throw Error_Device ("ReadLockBits failed: are you sure this device has lock bits?");
+  return rbits;
+}
+
+unsigned int
+TAvrStargate::GetPollCount()
+{
+  return total_poll_cnt;
+}
+
+float
+TAvrStargate::GetMinPollTime()
+{
+  return min_poll_time;
+}
+
+float
+TAvrStargate::GetMaxPollTime()
+{
+  return max_poll_time;
+}
+
+float
+TAvrStargate::GetTotPollTime()
+{
+  return total_poll_time;
+}
+
+void
+TAvrStargate::ResetMinMax()
+{
+  min_poll_time = 1.0;
+  max_poll_time = 0.0;
+  total_poll_time = 0.0;
+  total_poll_cnt = 0;
+}
+
+/* Constructor
+*/
+
+TAvrStargate::TAvrStargate():
+  use_data_polling(true)
+{
+  ResetMinMax();
+  
+  /* Device Command line options ... */ 
+  if (GetCmdParam("-dno-poll", false)){use_data_polling=false;} 
+  
+  EnableAvr();
+}
+
+/* eof */
diff --git a/tools/platforms/mica/uisp/src/AvrStargate.h b/tools/platforms/mica/uisp/src/AvrStargate.h
new file mode 100644
index 00000000..4ec92156
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/AvrStargate.h
@@ -0,0 +1,89 @@
+// $Id: AvrStargate.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: AvrStargate.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * Portions Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ ****************************************************************************
+ */
+
+
+#ifndef __AVR_STARGATE
+#define __AVR_STARGATE
+
+#include "Global.h"
+#include "Avr.h"
+#include "SASA.h"
+
+class TAvrStargate: public TAvr, TSASA {
+private:
+  bool use_data_polling;
+  float min_poll_time, max_poll_time, total_poll_time;
+  unsigned long total_poll_cnt;  /* bytes or pages */
+
+  void EnableAvr();
+  TByte GetPartInfo(TAddr addr);
+  void WriteProgramMemoryPage();
+  TByte ReadLockFuseBits();
+  TByte ReadFuseLowBits();
+  TByte ReadFuseHighBits();
+  TByte ReadFuseExtBits();
+  TByte ReadCalByte(TByte addr);
+  void WriteOldFuseBits(TByte val);  /* 5 bits */
+  void WriteFuseLowBits(TByte val);
+  void WriteFuseHighBits(TByte val);
+  void WriteFuseExtBits(TByte val);
+
+  /* lock bits */
+  void WriteLockBits(TByte bits);
+  TByte ReadLockBits();
+
+public:
+  /* Read byte from active segment at address addr. */
+  TByte ReadByte(TAddr addr);
+
+  /* Write byte to active segment at address addr */
+  void WriteByte(TAddr addr, TByte byte, bool flush_buffer=true);
+  void FlushWriteBuffer();
+  
+  /* Chip Erase */
+  void ChipErase();
+
+  /* Transfer Statistics */
+  unsigned int GetPollCount();
+  float GetMinPollTime();
+  float GetTotPollTime();
+  float GetMaxPollTime();
+  void ResetMinMax();
+  
+  TAvrStargate();
+  ~TAvrStargate(){}
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/DAPA.C b/tools/platforms/mica/uisp/src/DAPA.C
new file mode 100644
index 00000000..60d3608b
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/DAPA.C
@@ -0,0 +1,1196 @@
+// $Id: DAPA.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: DAPA.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002, 2003  Sergey Larin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	DAPA.C
+
+	Direct AVR Parallel Access (c) 1999
+	
+	Originally written by Sergey Larin.
+	Corrected by 
+	  Denis Chertykov, 
+	  Uros Platise and 
+	  Marek Michalkiewicz
+*/
+
+#ifndef NO_DAPA
+//#define DEBUG
+//#define DEBUG1
+
+#include "config.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <ctype.h>
+
+#ifndef NO_DIRECT_IO
+
+/* Linux and FreeBSD differ in the order of outb() arguments.
+   XXX any other OS/architectures with PC-style parallel ports?
+   XXX how about the other *BSDs?  */
+
+#if defined(__linux__) && defined(__i386__)
+
+#include <sys/io.h>
+
+#define ioport_read(port)         inb(port)
+#define ioport_write(port, val)   outb(val, port)
+#define ioport_enable(port, num)  ({ \
+    int x = ioperm(port, num, 1); usleep(1); x; }) 
+#define ioport_disable(port, num) ({ \
+    int x = ioperm(port, num, 0); usleep(1); x; })
+
+#elif defined(__CYGWIN__)
+
+#include "cygwinp.h"
+
+#define ioport_read(port)         inb(port)
+#define ioport_write(port, val)   outb(val, port)
+#define ioport_enable(port, num)  ioperm(port, num, 1)
+#define ioport_disable(port, num) ioperm(port, num, 0)
+
+#elif defined(__FreeBSD__) && defined(__i386__)
+
+#include <sys/fcntl.h>
+#include <machine/cpufunc.h>
+#include <machine/sysarch.h>
+
+#define ioport_read(port)         inb(port)
+#define ioport_write(port, val)   outb(port, val)
+#define ioport_enable(port, num)  i386_set_ioperm(port, num, 1)
+#define ioport_disable(port, num) i386_set_ioperm(port, num, 0)
+
+#else
+
+/* Direct I/O port access not supported - ppdev/ppi kernel driver
+   required for parallel port support to work at all.  Only likely to
+   work on PC-style parallel ports (all signals implemented) anyway.
+
+   The only lines believed to be implemented in all parallel ports are:
+	D0-D6 outputs	(long long ago I heard of some non-PC machine with
+			D7 hardwired to GND - don't remember what it was)
+	BUSY input
+
+   So far, only the dt006 interface happens to use a subset of the above.
+
+	STROBE output might be pulsed by hardware and not be writable
+	ACK input might only trigger an interrupt and not be readable
+
+   Future designers of these "dongles" might want to keep this in mind.
+ */
+
+#define ioport_read(port)         (0xFF)
+#define ioport_write(port, val)
+#define ioport_enable(port, num)  (-1)
+#define ioport_disable(port, num) (0)
+
+#endif
+
+#else /* NO_DIRECT_IO */
+
+#define ioport_read(port)         (0xFF)
+#define ioport_write(port, val)
+#define ioport_enable(port, num)  (-1)
+#define ioport_disable(port, num) (0)
+
+#endif /* NO_DIRECT_IO */
+
+#include <unistd.h>
+#include <signal.h>
+#include "timeradd.h"
+
+#include <sys/ioctl.h>
+#include <fcntl.h>
+
+#include "parport.h"
+
+/* These should work on any architecture, not just i386.  */
+#if defined(__linux__)
+
+#include "ppdev.h"
+
+#define par_claim(fd)            ioctl(fd, PPCLAIM, 0)
+#define par_read_status(fd, ptr) ioctl(fd, PPRSTATUS, ptr)
+#define par_write_data(fd, ptr)  ioctl(fd, PPWDATA, ptr)
+#define par_write_ctrl(fd, ptr)  ioctl(fd, PPWCONTROL, ptr)
+#define par_set_dir(fd, ptr)     ioctl(fd, PPDATADIR, ptr)
+#define par_release(fd)          ioctl(fd, PPRELEASE, 0)
+
+#elif defined(__FreeBSD__)
+
+#include </sys/dev/ppbus/ppi.h>
+
+#define par_claim(fd)            (0)
+#define par_read_status(fd, ptr) ioctl(fd, PPIGSTATUS, ptr)
+#define par_write_data(fd, ptr)  ioctl(fd, PPISDATA, ptr)
+#define par_write_ctrl(fd, ptr)  ioctl(fd, PPISCTRL, ptr)
+/* par_set_dir not defined, par_write_ctrl used instead */
+#define par_release(fd)
+
+#else
+
+/* Dummy defines if ppdev/ppi not supported by the kernel.  */
+
+#define par_claim(fd)            (-1)
+#define par_read_status(fd, ptr)
+#define par_write_data(fd, ptr)
+#define par_write_ctrl(fd, ptr)
+#define par_release(fd)
+
+#endif
+
+#include "Global.h"
+#include "Error.h"
+#include "DAPA.h"
+#include "Avr.h"
+
+/* Parallel Port Base Address
+*/
+#define IOBASE parport_base
+#define IOSIZE 3
+
+/* FIXME: rewrite using tables to define new interface types.
+
+   For each of the logical outputs (SCK, MOSI, RESET, ENA1, ENA2,
+   power, XTAL1) there should be two bit masks that define which
+   physical bits (from the parallel port output data or control
+   registers, or serial port DTR/RTS/TXD) are affected, and if
+   they should be inverted.  More than one output may be changed.
+   For each of the inputs (MISO, maybe TEST?), define which bit
+   (only one, from parallel port status or CTS/DCD/DSR/RI) should
+   be tested and if it should be inverted.
+   One struct as described above should be initialized for each
+   of the supported hardware interfaces.
+ */
+
+/* Alex's Direct Avr Parallel Access 
+*/
+#define DAPA_SCK    PARPORT_CONTROL_STROBE	/* base + 2 */
+#define DAPA_RESET  PARPORT_CONTROL_INIT	/* base + 2 */
+#define DAPA_DIN    PARPORT_STATUS_BUSY		/* base + 1 */
+#define DAPA_DOUT   0x1		/* base */
+
+/* STK200 Direct Parallel Access 
+*/
+#define STK2_TEST1  0x01	/* D0 (base) - may be connected to POUT input */
+#define STK2_TEST2  0x02	/* D1 (base) - may be connected to BUSY input */
+#define STK2_ENA1   0x04    	/* D2 (base) - ENABLE# for RESET#, MISO */
+#define STK2_ENA2   0x08    	/* D3 (base) - ENABLE# for SCK, MOSI, LED# */
+#define STK2_SCK    0x10    	/* D4 (base) - SCK */
+#define STK2_DOUT   0x20    	/* D5 (base) - MOSI */
+#define STK2_LED    0x40	/* D6 (base) - LED# (optional) */
+#define STK2_RESET  0x80    	/* D7 (base) - RESET# */
+#define STK2_DIN    PARPORT_STATUS_ACK    	/* ACK (base + 1) - MISO */
+
+/* Altera Byte Blaster Port Configuration
+*/
+#define ABB_EN      PARPORT_CONTROL_AUTOFD	/* low active */
+#define ABB_LPAD    0x80	/* D7: loop back throught enable auto-detect */
+#define ABB_SCK	    0x01	/* D0: TCK (ISP conn. pin 1) */
+#define ABB_RESET   0x02	/* D1: TMS (ISP conn. pin 5) */
+#define ABB_DOUT    0x40	/* D6: TDI (ISP conn. pin 9) */
+#define ABB_DIN	    PARPORT_STATUS_BUSY	/* BUSY: TDO (ISP conn. pin 3) */
+/* D5 (pin 7) connected to ACK (pin 10) directly */
+/* D7 (pin 9) connected to POUT (pin 12) via 74HC244 buffer */
+/* optional modification for AVREAL: D3 (pin 5) = XTAL1 (ISP conn. pin 8) */
+#define ABB_XTAL1   0x08
+
+/*
+   XXX not yet supported, just documented here...
+
+   Atmel-ISP Download Cable (P/N ATDH1150VPC)
+   (10-pin connector similar to Altera Byte Blaster, but no 3-state outputs)
+   http://www.atmel.com/atmel/acrobat/isp_c_v5.pdf
+
+   VCC ---- 4
+   GND ---- 2,10 ---- GND
+   SCK   <- TCK(1) <- nSTROBE
+   MISO  -> TDO(3) -> nACK
+   RESET <- TMS(5) <- SELECT
+   MOSI  <- TDI(9) <- D0
+   XTAL1 <- AF(8)  <- AUTOFD (optional, not yet supported)
+ */
+#define ATDH_SCK    PARPORT_CONTROL_STROBE
+#define ATDH_DOUT   0x01
+#define ATDH_RESET  PARPORT_CONTROL_SELECT
+#define ATDH_DIN    PARPORT_STATUS_ACK
+#define ATDH_XTAL1  PARPORT_CONTROL_AUTOFD
+
+/* "Atmel AVR ISP" cable (?)
+ */
+#define AISP_TSTOUT 0x08	/* D3 (base) - dongle test output */
+#define AISP_SCK    0x10	/* D4 (base) - SCK */
+#define AISP_DOUT   0x20	/* D5 (base) - MOSI */
+#define AISP_ENA    0x40	/* D6 (base) - ENABLE# for MISO, MOSI, SCK */
+#define AISP_RESET  0x80	/* D7 (base) - RESET# */
+#define AISP_DIN    PARPORT_STATUS_ACK /* ACK (base + 1) - MISO */
+/* BUSY and POUT used as inputs to test for the dongle */
+
+/* Yet another AVR ISP cable from http://www.bsdhome.com/avrprog/
+ */
+#define BSD_POWER   0x0F	/* D0-D3 (base) - power */
+#define BSD_ENA     0x10	/* D4 (base) - ENABLE# */
+#define BSD_RESET   0x20	/* D5 (base) - RESET# */
+#define BSD_SCK     0x40	/* D6 (base) - SCK */
+#define BSD_DOUT    0x80	/* D7 (base) - MOSI */
+#define BSD_DIN     PARPORT_STATUS_ACK /* ACK (base + 1) - MISO */
+/* optional status LEDs, active low, not yet supported (base + 2) */
+#define BSD_LED_ERR PARPORT_CONTROL_STROBE  /* error */
+#define BSD_LED_RDY PARPORT_CONTROL_AUTOFD  /* ready */
+#define BSD_LED_PGM PARPORT_CONTROL_INIT    /* programming */
+#define BSD_LED_VFY PARPORT_CONTROL_SELECT  /* verifying */
+
+/*
+   FBPRG - http://ln.com.ua/~real/avreal/adapters.html
+*/
+#define FBPRG_POW    0x07	/* D0,D1,D2 (base) - power supply (XXX D7 too?) */
+#define FBPRG_XTAL1  0x08	/* D3 (base) (not supported) */
+#define FBPRG_RESET  0x10	/* D4 (base) */
+#define FBPRG_DOUT   0x20	/* D5 (base) */
+#define FBPRG_SCK    0x40	/* D6 (base) */
+#define FBPRG_DIN    PARPORT_STATUS_ACK /* ACK (base + 1) - MISO */
+
+/* DT006/Sample Electronics Parallel Cable
+   http://www.dontronics.com/dt006.html
+*/
+/* all at base, except for DT006_DIN at base + 1 */
+#define DT006_SCK    0x08
+#define DT006_RESET  0x04
+#define DT006_DIN    PARPORT_STATUS_BUSY
+#define DT006_DOUT   0x01
+
+/* ETT-AVR V2.0 Programmer / Futurlec AT90S8535 */ 
+#define ETT_SCK      0x01                   /* DB25 Pin  2: D0 (Base + 0) -> SCK      */
+#define ETT_RESET    0x02                   /* DB25 Pin  3: D1 (Base + 0) -> RESET    */
+#define ETT_DIN      PARPORT_STATUS_ACK     /* DB25 Pin 10: ACK (Base + 1) -> MISO    */
+#define ETT_DOUT     PARPORT_CONTROL_STROBE /* DB25 Pin  1: STROBE (Base + 2) -> MOSI */
+
+/* ABC Maxi - just like DT006 with two pins swapped */
+/* all at base, except for MAXI_DIN at base + 1 */
+#define MAXI_SCK    0x02
+#define MAXI_RESET  0x04
+#define MAXI_DIN    PARPORT_STATUS_ACK
+#define MAXI_DOUT   0x01
+
+/* Xilinx JTAG download cable
+   RESET=TMS, SCK=TCK, MISO=TDO, MOSI=TDI
+*/
+#define XIL_DOUT    0x01        /* D0: TDI */
+#define XIL_SCK     0x02        /* D1: TCK */
+#define XIL_RESET   0x04        /* D2: TMS */
+#define XIL_ENA     0x08        /* D3: ENABLE# */
+#define XIL_DIN	    PARPORT_STATUS_SELECT /* SLCT: TDO */
+
+/* Default value for minimum SCK high/low time in microseconds.  */
+#ifndef SCK_DELAY
+#define SCK_DELAY 5
+#endif
+
+/* Minimum RESET# high time in microseconds.
+   Should be enough to charge a capacitor between RESET# and GND
+   (it is recommended to use a voltage detector with open collector
+   output, and only something like 100 nF for noise immunity).
+   Default value may be changed with -dt_reset=N microseconds.  */
+#ifndef RESET_HIGH_TIME
+#define RESET_HIGH_TIME 1000
+#endif
+
+/* Delay from RESET# low to sending program enable command
+   (the datasheet says it must be at least 20 ms).  Also wait time
+   for crystal oscillator to start after possible power down mode.  */
+#ifndef RESET_LOW_TIME
+#define RESET_LOW_TIME 30000
+#endif
+
+void
+TDAPA::SckDelay()
+{
+  Delay_usec(t_sck);
+}
+
+#ifndef MIN_SLEEP_USEC
+#define MIN_SLEEP_USEC 20000
+#endif
+
+void
+TDAPA::Delay_usec(long t)
+{
+  struct timeval t1, t2;
+
+#if defined(__CYGWIN__)
+  if (cygwinp_delay_usec(t)) {
+    return;
+  }
+#endif
+
+  if (t <= 0)
+    return;  /* very short delay for slow machines */
+  gettimeofday(&t1, NULL);
+  if (t > MIN_SLEEP_USEC)
+    usleep(t - MIN_SLEEP_USEC);
+  /* loop for the remaining time */
+  t2.tv_sec = t / 1000000UL;
+  t2.tv_usec = t % 1000000UL;
+  timeradd(&t1, &t2, &t1);
+  do {
+    gettimeofday(&t2, NULL);
+  } while (timercmp(&t2, &t1, <));
+}
+
+void
+TDAPA::ParportSetDir(int dir)
+{
+  if (dir)
+    par_ctrl |= PARPORT_CONTROL_DIRECTION;
+  else
+    par_ctrl &= ~PARPORT_CONTROL_DIRECTION;
+
+  if (ppdev_fd != -1) {
+#ifdef par_set_dir
+    par_set_dir(ppdev_fd, &dir);
+#else
+    par_write_ctrl(ppdev_fd, &par_ctrl);
+#endif
+  } else
+    ioport_write(IOBASE+2, par_ctrl);
+}
+
+void
+TDAPA::ParportWriteCtrl()
+{
+  if (ppdev_fd != -1)
+    par_write_ctrl(ppdev_fd, &par_ctrl);
+  else
+    ioport_write(IOBASE+2, par_ctrl);
+}
+
+void
+TDAPA::ParportWriteData()
+{
+  if (ppdev_fd != -1)
+    par_write_data(ppdev_fd, &par_data);
+  else
+    ioport_write(IOBASE, par_data);
+}
+
+void
+TDAPA::ParportReadStatus()
+{
+  if (ppdev_fd != -1)
+    par_read_status(ppdev_fd, &par_status);
+  else
+    par_status = ioport_read(IOBASE+1);
+}
+
+void
+TDAPA::SerialReadCtrl()
+{
+#ifdef TIOCMGET
+  ioctl(ppdev_fd, TIOCMGET, &ser_ctrl);
+#else
+  ser_ctrl = 0;
+#endif
+}
+
+void
+TDAPA::SerialWriteCtrl()
+{
+#ifdef TIOCMGET
+  ioctl(ppdev_fd, TIOCMSET, &ser_ctrl);
+#endif
+}
+
+void
+TDAPA::OutReset(int b)
+  /* FALSE means active Reset at the AVR */ 
+{
+  if (reset_invert)
+    b = !b;
+  switch (pa_type) {
+  case PAT_DAPA:
+  case PAT_DAPA_2:
+    if (b) par_ctrl |= DAPA_RESET; else par_ctrl &= ~DAPA_RESET;
+    ParportWriteCtrl();
+    break;
+
+  case PAT_STK200:
+    if (b) par_data |= STK2_RESET; else par_data &= ~STK2_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_ABB:
+    if (b) par_data |= ABB_RESET; else par_data &= ~ABB_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_AVRISP:
+    if (b) par_data |= AISP_RESET; else par_data &= ~AISP_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_BSD:
+    if (b) par_data |= BSD_RESET; else par_data &= ~BSD_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_FBPRG:
+    if (b) par_data |= FBPRG_RESET; else par_data &= ~FBPRG_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_DT006:
+    if (b) par_data |= DT006_RESET; else par_data &= ~DT006_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_ETT:
+    if (b) par_data |= ETT_RESET; else par_data &= ~ETT_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_MAXI:
+    if (b) par_data |= MAXI_RESET; else par_data &= ~MAXI_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_XIL:
+    if (b) par_data |= XIL_RESET; else par_data &= ~XIL_RESET;
+    ParportWriteData();
+    break;
+
+  case PAT_DASA:
+#ifdef TIOCMGET
+    SerialReadCtrl();
+    if (b) ser_ctrl |= TIOCM_RTS; else ser_ctrl &= ~TIOCM_RTS;
+    SerialWriteCtrl();
+#endif /* TIOCMGET */
+    break;
+
+  case PAT_DASA2:
+#if defined(TIOCMGET) && defined(TIOCCBRK)
+    ioctl(ppdev_fd, b ? TIOCCBRK : TIOCSBRK, 0);
+#endif /* TIOCMGET */
+    break;
+  }
+  Delay_usec(b ? reset_high_time : RESET_LOW_TIME );
+}
+
+void
+TDAPA::OutSck(int b)
+{
+  if (sck_invert)
+    b = !b;
+#ifdef DEBUG1
+  printf("%c",(b)?'S':'s');
+#endif
+  switch (pa_type) {
+  case PAT_DAPA:
+  case PAT_DAPA_2:
+    if (b) par_ctrl &= ~DAPA_SCK; else par_ctrl |= DAPA_SCK;
+    ParportWriteCtrl();
+    break;
+
+  case PAT_STK200:
+    if (b) par_data |= STK2_SCK; else par_data &= ~STK2_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_ABB:
+    if (b) par_data |= ABB_SCK; else par_data &= ~ABB_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_AVRISP:
+    if (b) par_data |= AISP_SCK; else par_data &= ~AISP_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_BSD:
+    if (b) par_data |= BSD_SCK; else par_data &= ~BSD_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_FBPRG:
+    if (b) par_data |= FBPRG_SCK; else par_data &= ~FBPRG_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_DT006:
+    if (b) par_data |= DT006_SCK; else par_data &= ~DT006_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_ETT:
+    if (b) par_data |= ETT_SCK; else par_data &= ~ETT_SCK;
+    ParportWriteData();
+    break;
+  
+  case PAT_MAXI:
+    if (b) par_data |= MAXI_SCK; else par_data &= ~MAXI_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_XIL:
+    if (b) par_data |= XIL_SCK; else par_data &= ~XIL_SCK;
+    ParportWriteData();
+    break;
+
+  case PAT_DASA:
+#if defined(TIOCMGET)
+    SerialReadCtrl();
+    if (b) ser_ctrl |= TIOCM_DTR; else ser_ctrl &= ~TIOCM_DTR;
+    SerialWriteCtrl();
+#endif /* TIOCMGET */
+    break;
+
+  case PAT_DASA2:
+#if defined(TIOCMGET)
+    if (b) ser_ctrl |= TIOCM_RTS; else ser_ctrl &= ~TIOCM_RTS;
+    SerialWriteCtrl();
+#endif /* TIOCMGET */
+    break;
+  }
+}
+
+
+void
+TDAPA::OutEnaReset(int b)
+{
+  bool no_ps2_hack = GetCmdParam("-dno-ps2-hack", false);
+  switch (pa_type) {
+  case PAT_DAPA:
+  case PAT_DAPA_2:
+  case PAT_FBPRG:
+  case PAT_DT006:
+  case PAT_ETT:
+  case PAT_MAXI:
+    if (b) {
+      ParportSetDir(0);
+    } else if (!no_ps2_hack) {
+      /* No special enable line on these interfaces, for PAT_DAPA
+         this only disables the data line (MOSI) and not SCK.  */
+      ParportSetDir(1);
+    }
+    break;
+
+  case PAT_STK200:
+    if (b) {
+      /* Make sure outputs are enabled.  */
+      ParportSetDir(0);
+      SckDelay();
+      par_data &= ~STK2_ENA1;
+      ParportWriteData();
+    } else {
+      par_data |= STK2_ENA1;
+      ParportWriteData();
+      if (!no_ps2_hack) {
+        /* Experimental: disable outputs (PS/2 parallel port), for cheap
+	   STK200-like cable without the '244.  Should work with the real
+           STK200 too (disabled outputs should still have pull-up resistors,
+	   ENA1 and ENA2 are high, and the '244 remains disabled).
+	   This way the SPI pins can be used by the application too.
+	   Please report if it doesn't work on some parallel ports.  */
+	SckDelay();
+	ParportSetDir(1);
+      }
+    }
+    break;
+
+  case PAT_ABB:
+    if (b) {
+      ParportSetDir(0);
+      par_ctrl |= ABB_EN;
+      ParportWriteCtrl();
+    } else {
+      par_ctrl &= ~ABB_EN;
+      ParportWriteCtrl();
+      if (!no_ps2_hack) {
+	SckDelay();
+	ParportSetDir(1);
+      }
+    }
+    break;
+
+  case PAT_AVRISP:
+    if (b) {
+      ParportSetDir(0);
+      SckDelay();
+      par_data &= ~AISP_ENA;
+      ParportWriteData();
+    } else {
+      par_data |= AISP_ENA;
+      ParportWriteData();
+      if (!no_ps2_hack) {
+	SckDelay();
+	ParportSetDir(1);
+      }
+    }
+    break;
+
+  case PAT_BSD:
+    if (b) {
+      ParportSetDir(0);
+      SckDelay();
+      par_data &= ~BSD_ENA;
+      ParportWriteData();
+    } else {
+      par_data |= BSD_ENA;
+      ParportWriteData();
+      if (!no_ps2_hack) {
+	SckDelay();
+	ParportSetDir(1);
+      }
+    }
+    break;
+
+  case PAT_XIL:
+    if (b) {
+      ParportSetDir(0);
+      par_data &= ~XIL_ENA;
+      ParportWriteData();
+    } else {
+      par_data |= XIL_ENA;
+      ParportWriteData();
+      if (!no_ps2_hack) {
+	SckDelay();
+	ParportSetDir(1);
+      }
+    }
+    break;
+
+  case PAT_DASA:
+  case PAT_DASA2:
+    break;
+  }
+}
+
+void
+TDAPA::OutEnaSck(int b)
+{
+  switch (pa_type) {
+  case PAT_STK200:
+    if (b)
+      par_data &= ~(STK2_ENA2 | STK2_LED);
+    else
+      par_data |= (STK2_ENA2 | STK2_LED);
+    ParportWriteData();
+    break;
+
+  case PAT_DAPA:
+  case PAT_DAPA_2:
+  case PAT_ABB:
+  case PAT_AVRISP:
+  case PAT_BSD:
+  case PAT_FBPRG:
+  case PAT_DT006:
+  case PAT_ETT:
+  case PAT_MAXI:
+  case PAT_XIL:
+  case PAT_DASA:
+  case PAT_DASA2:
+    /* no separate enable for SCK nad MOSI */
+    break;
+  }
+}
+
+void
+TDAPA::PulseSck()
+{
+  SckDelay();
+  OutSck(1);
+  SckDelay();
+  OutSck(0);
+}
+
+void
+TDAPA::PulseReset()
+{
+  printf("pulse\n");
+  /* necessary delays already included in these methods */
+  OutReset(1);
+  Delay_usec(1000); 
+  OutReset(0);
+}
+
+void
+TDAPA::OutData(int b)
+{
+  if (mosi_invert)
+    b = !b;
+#ifdef DEBUG1
+  printf("%c",(b)?'D':'d');
+#endif
+  switch (pa_type) {
+  case PAT_DAPA:
+    if (b) par_data |= DAPA_DOUT; else par_data &= ~DAPA_DOUT;
+    par_data &= ~0x6; //0x6
+    par_data |= 0x0; //0x6
+    ParportWriteData();
+    break;
+
+  case PAT_DAPA_2:
+    if (b) par_data |= DAPA_DOUT; else par_data &= ~DAPA_DOUT;
+    par_data &= ~0x6; //0x6
+    par_data |= 0x4; //0x6
+    ParportWriteData();
+    break;
+
+  case PAT_STK200:
+    if (b) par_data |= STK2_DOUT; else par_data &= ~STK2_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_ABB:
+    if (b) par_data |= ABB_DOUT; else par_data &= ~ABB_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_AVRISP:
+    if (b) par_data |= AISP_DOUT; else par_data &= ~AISP_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_BSD:
+    if (b) par_data |= BSD_DOUT; else par_data &= ~BSD_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_FBPRG:
+    if (b) par_data |= FBPRG_DOUT; else par_data &= ~FBPRG_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_DT006:
+    if (b) par_data |= DT006_DOUT; else par_data &= ~DT006_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_ETT:
+    if (b) par_ctrl |= ETT_DOUT; else par_ctrl &= ~ETT_DOUT;
+    ParportWriteCtrl();
+    break;
+
+  case PAT_MAXI:
+    if (b) par_data |= MAXI_DOUT; else par_data &= ~MAXI_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_XIL:
+    if (b) par_data |= XIL_DOUT; else par_data &= ~XIL_DOUT;
+    ParportWriteData();
+    break;
+
+  case PAT_DASA:
+#if defined(TIOCMGET) && defined(TIOCCBRK)
+    ioctl(ppdev_fd, b ? TIOCSBRK : TIOCCBRK, 0);
+#endif /* TIOCMGET */
+    break;
+
+  case PAT_DASA2:
+#if defined(TIOCMGET)
+    if (b) ser_ctrl |= TIOCM_DTR; else ser_ctrl &= ~TIOCM_DTR;
+    SerialWriteCtrl();
+#endif /* TIOCMGET */
+    break;
+  }
+}
+
+int
+TDAPA::InData()
+{
+  int b = 0;
+
+  switch (pa_type) {
+  case PAT_DAPA:
+  case PAT_DAPA_2:
+  case PAT_ABB:
+  case PAT_DT006:
+    ParportReadStatus();
+    b = (~par_status & PARPORT_STATUS_BUSY);
+    break;
+  case PAT_ETT:
+    ParportReadStatus();
+    b = (par_status & ETT_DIN);
+    break;
+  case PAT_STK200:
+  case PAT_AVRISP:
+  case PAT_BSD:
+  case PAT_FBPRG:
+  case PAT_MAXI:
+    ParportReadStatus();
+    b = (par_status & PARPORT_STATUS_ACK);
+    break;
+  case PAT_XIL:
+    ParportReadStatus();
+    b = (par_status & PARPORT_STATUS_SELECT);
+    break;
+  case PAT_DASA:
+  case PAT_DASA2:
+#ifdef TIOCMGET
+    SerialReadCtrl();
+#ifdef DEBUG1
+    printf("%c",(ser_ctrl & TIOCM_CTS)?'I':'i');
+#endif
+    b = (ser_ctrl & TIOCM_CTS);
+#endif /* TIOCMGET */
+    break;
+  }
+  if (miso_invert)
+    b = !b;
+  return b;
+}
+
+void
+TDAPA::Init()
+{
+  /* data=1, reset=0, sck=0 */
+  switch (pa_type) {
+  case PAT_DAPA:
+    par_ctrl = DAPA_SCK;
+    par_data = 0xFF;
+    par_data &= ~0x6; //0x6
+    par_data |= 0x0; //0x6
+    break;
+  case PAT_DAPA_2:
+    par_ctrl = DAPA_SCK;
+    par_data = 0xFF;
+    par_data &= ~0x6; //0x6
+    par_data |= 0x4; //0x6
+    break;
+
+  case PAT_STK200:
+    par_ctrl = 0;
+    par_data = 0xFF & ~(STK2_ENA1 | STK2_SCK);
+    break;
+
+  case PAT_ABB:
+    par_ctrl = ABB_EN;
+    par_data = 0xFF & ~ABB_SCK;
+    break;
+
+  case PAT_AVRISP:
+    par_ctrl = 0;
+    par_data = 0xFF & ~(AISP_ENA | AISP_SCK);
+    break;
+
+  case PAT_BSD:
+    par_ctrl = 0;
+    par_data = BSD_POWER | BSD_RESET;
+    break;
+
+  case PAT_FBPRG:
+    par_ctrl = 0;
+    par_data = FBPRG_POW | FBPRG_RESET;
+    break;
+
+  case PAT_ETT:
+    par_ctrl = ETT_DOUT;
+    par_data = ETT_SCK | ETT_RESET;
+    mosi_invert = 1;
+    break;
+
+  case PAT_DT006:
+  case PAT_MAXI:
+    par_ctrl = 0;
+    par_data = 0xFF;
+    break;
+
+  case PAT_XIL:
+    par_ctrl = 0;
+    par_data = 0xFF & ~(XIL_ENA | XIL_SCK | XIL_RESET);
+    break;
+
+  case PAT_DASA:
+  case PAT_DASA2:
+    break;
+  }
+
+  if (!pa_type_is_serial) {
+    ParportWriteCtrl();
+    ParportWriteData();
+    SckDelay();
+    ParportReadStatus();
+  }
+
+  OutEnaReset(1);
+  OutReset(0);
+  OutEnaSck(1);
+  OutSck(0);
+  /* Wait 100 ms as recommended for ATmega163 (SCK not low on power up).  */
+  Delay_usec(100000);
+  PulseReset();
+}
+
+int
+TDAPA::SendRecv(int b)
+{
+  unsigned int mask, received=0;
+
+  for (mask = 0x80; mask; mask >>= 1) {
+     OutData(b & mask);
+     SckDelay();
+     /* MM 20020613: we used to read the bit here, but ... */
+     OutSck(1);
+     SckDelay();
+     /* ... here we have more room for propagation delays (almost the
+	whole SCK period, instead of half of it) - good for long cables,
+	slow RS232 drivers/receivers, opto-isolated interfaces, etc.  */
+     if (InData())
+       received |= mask;
+     OutSck(0);
+  }
+  return received;
+}
+
+int
+TDAPA::Send (unsigned char* queue, int queueSize, int rec_queueSize)
+{
+  unsigned char *p = queue, ch;
+  int i = queueSize;
+  
+  if (rec_queueSize==-1){rec_queueSize = queueSize;}
+#ifdef DEBUG
+  printf ("send(recv): ");
+#endif
+  while (i--){
+#ifdef DEBUG
+    printf ("%02X(", (unsigned int)*p);
+#endif    
+    ch = SendRecv(*p);
+#ifdef DEBUG    
+    printf ("%02X) ", (unsigned int)ch);
+#endif    
+    *p++ = ch;
+  }
+#ifdef DEBUG  
+  printf ("\n");
+#endif  
+  return queueSize;
+}
+
+
+TDAPA::TDAPA(): 
+  parport_base(0x378), ppdev_fd(-1)
+{
+  const char *val;
+
+  /* If the user doesn't specify -dlpt option, use /dev/parport0 as the
+     default instead of defaulting to using ioperm (ick!). If the user wants
+     to run uisp as root (or setuid root) they should know what they are doing
+     and can suffer the consequences. Joe user should not be told about ioperm
+     failure due to permission denied. */
+#ifdef __CYGWIN__
+  /* But on cygwin, /dev/parport0 does not exist. So... */
+  const char *ppdev_name = NULL;
+#else
+  const char *ppdev_name = "/dev/parport0";
+#endif
+
+  /* Enable Parallel Port */
+  val = GetCmdParam("-dprog");
+  if (val && strcmp(val, "dapa") == 0)
+    pa_type = PAT_DAPA;
+  else if (val && strcmp(val, "dapa_2") == 0)
+    pa_type = PAT_DAPA_2;
+  else if (val && strcmp(val, "stk200") == 0)
+    pa_type = PAT_STK200;
+  else if (val && strcmp(val, "abb") == 0)
+    pa_type = PAT_ABB;
+  else if (val && strcmp(val, "avrisp") == 0)
+    pa_type = PAT_AVRISP;
+  else if (val && strcmp(val, "bsd") == 0)
+    pa_type = PAT_BSD;
+  else if (val && strcmp(val, "fbprg") == 0)
+    pa_type = PAT_FBPRG;
+  else if (val && strcmp(val, "dt006") == 0)
+    pa_type = PAT_DT006;
+  else if (val && strcmp(val, "ett") == 0)
+    pa_type = PAT_ETT;
+  else if (val && strcmp(val, "maxi") == 0)
+    pa_type = PAT_MAXI;
+  else if (val && strcmp(val, "xil") == 0)
+    pa_type = PAT_XIL;
+  else if (val && strcmp(val, "dasa") == 0)
+    pa_type = PAT_DASA;
+  else if (val && strcmp(val, "dasa2") == 0)
+    pa_type = PAT_DASA2;
+  else {
+    throw Error_Device("Direct Parallel Access not defined.");
+  }
+  pa_type_is_serial = (pa_type == PAT_DASA || pa_type == PAT_DASA2);
+  /* Parse Command Line Switches */
+#ifndef NO_DIRECT_IO
+  if ((val = GetCmdParam("-dlpt")) != NULL) {
+    if (!strcmp(val, "1")) {
+      parport_base = 0x378;
+      ppdev_name = NULL;
+    }
+    else if (!strcmp(val, "2")) {
+      parport_base = 0x278;
+      ppdev_name = NULL;
+    }
+    else if (!strcmp(val, "3")) {
+      parport_base = 0x3bc;
+      ppdev_name = NULL;
+    }    
+    else if (isdigit(*val)) {
+      parport_base = strtol(val, NULL, 0);
+      ppdev_name = NULL;
+    }
+    else {
+      ppdev_name = val;
+    }
+  }
+  if (!ppdev_name && !pa_type_is_serial) {
+    if (parport_base!=0x278 && parport_base!=0x378 && parport_base!=0x3bc) {
+      /* TODO: option to override this if you really know
+	 what you're doing (only if running as root).  */
+      throw Error_Device("Bad device address.");
+    }
+    if (ioport_enable(IOBASE, IOSIZE) != 0) {
+      perror("ioperm");
+      throw Error_Device("Failed to get direct I/O port access.");
+    }
+  }
+#endif
+
+  /* Drop privileges (if installed setuid root - NOT RECOMMENDED).  */
+  setgid(getgid());
+  setuid(getuid());
+
+#ifdef NO_DIRECT_IO
+  if ((val = GetCmdParam("-dlpt")) != NULL) {
+    ppdev_name = val;
+  }
+#endif
+
+  if (ppdev_name) {
+    if (pa_type_is_serial) {
+      ppdev_fd = open(ppdev_name, O_RDWR | O_NOCTTY | O_NONBLOCK);
+      if (ppdev_fd != -1) {
+	struct termios pmode;
+
+	tcgetattr(ppdev_fd, &pmode);
+	saved_modes = pmode;
+
+	cfmakeraw(&pmode);
+	pmode.c_iflag &= ~(INPCK | IXOFF | IXON);
+	pmode.c_cflag &= ~(HUPCL | CSTOPB | CRTSCTS);
+	pmode.c_cflag |= (CLOCAL | CREAD);
+	pmode.c_cc [VMIN] = 1;
+	pmode.c_cc [VTIME] = 0;
+
+	tcsetattr(ppdev_fd, TCSANOW, &pmode);
+
+	/* Clear O_NONBLOCK flag.  */
+	int flags = fcntl(ppdev_fd, F_GETFL, 0);
+	if (flags == -1) { throw Error_C("Can not get flags"); }
+	flags &= ~O_NONBLOCK;
+	if (fcntl(ppdev_fd, F_SETFL, flags) == -1) { 
+          throw Error_C("Can not clear nonblock flag");
+        }
+      }
+    } else {
+      ppdev_fd = open(ppdev_name, O_RDWR, 0);
+    }
+    if (ppdev_fd == -1) {
+      perror(ppdev_name);
+      throw Error_Device("Failed to open ppdev.");
+    }
+    if (!pa_type_is_serial && par_claim(ppdev_fd) != 0) {
+      perror("ioctl PPCLAIM");
+      close(ppdev_fd);
+      ppdev_fd = -1;
+      throw Error_Device("Failed to claim ppdev.");
+    }
+  }
+  t_sck = SCK_DELAY;
+  if (pa_type_is_serial)
+    t_sck *= 3;  /* more delay for slow RS232 drivers */
+  val = GetCmdParam("-dt_sck");
+  if (val)
+    t_sck = strtol(val, NULL, 0);
+
+  sck_invert = 0;
+  mosi_invert = 0;
+  miso_invert = 0;
+  reset_invert = 0;
+  if ((val=GetCmdParam("-dinvert")))
+    {
+#define MAXLINESIZE    256
+      char temp[MAXLINESIZE];
+      char * p;
+      strncpy(temp, val, MAXLINESIZE-1);
+      temp[MAXLINESIZE-1] = '\0';
+      for (p=temp; *p; p++)
+        *p=toupper(*p);
+      Info(3, "Inverting %s\n",temp);
+      if (strstr(temp,"SCK"))
+        sck_invert=1;
+
+      if (strstr(temp,"MOSI"))
+        mosi_invert=1;
+
+      if (strstr(temp,"MISO"))
+        miso_invert=1;
+
+      if (strstr(temp,"RESET"))
+        reset_invert=1;
+    }
+
+  reset_high_time = RESET_HIGH_TIME;
+  if ((val=GetCmdParam("-dt_reset")))
+    {
+      reset_high_time = atoi(val);
+    }
+  Info(3, "Reset inactive time (t_reset) %d us\n", reset_high_time);
+
+  Init();
+}
+
+TDAPA::~TDAPA()
+{
+  OutData(1); SckDelay();
+  OutSck(1); SckDelay();
+  OutEnaSck(0);
+  OutReset(1);
+  OutEnaReset(0);
+
+  if (ppdev_fd != -1) {
+    if (pa_type_is_serial)
+      tcsetattr(ppdev_fd, TCSADRAIN, &saved_modes);
+    else
+      par_release(ppdev_fd);
+    close(ppdev_fd);
+    ppdev_fd = -1;
+  } else
+    (void) ioport_disable(IOBASE, IOSIZE);
+}
+
+#endif
+/* eof */
diff --git a/tools/platforms/mica/uisp/src/DAPA.h b/tools/platforms/mica/uisp/src/DAPA.h
new file mode 100644
index 00000000..8a7b87ca
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/DAPA.h
@@ -0,0 +1,101 @@
+// $Id: DAPA.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: DAPA.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+  DAPA.h
+  
+  Direct AVR Parallel Access
+  
+  (c) copyright 1997, Uros Platise  
+*/
+
+#ifndef __DAPA
+#define __DAPA
+
+#include <sys/types.h>
+#include <termios.h>
+#include <time.h>
+#include <unistd.h>
+#include <string.h>
+#include "Error.h"
+
+class TDAPA {
+public:
+  enum TPaType{	PAT_DAPA, PAT_STK200, PAT_ABB, PAT_AVRISP, PAT_BSD,
+		PAT_FBPRG, PAT_DT006, PAT_ETT, PAT_MAXI, PAT_XIL,
+		PAT_DASA, PAT_DASA2, PAT_DAPA_2 };
+
+private:
+  int mosi_invert;
+  int miso_invert;
+  int sck_invert;
+  int reset_invert;
+  int reset_high_time;
+  int parport_base;
+  int ppdev_fd;
+  long t_sck;
+  TPaType pa_type;
+  bool pa_type_is_serial;  /* not ppdev/ppi */
+  struct termios saved_modes;
+  unsigned char par_data, par_ctrl;  /* write */
+  unsigned char par_status;  /* read */
+  unsigned int ser_ctrl;  /* TIOCMGET/TIOCMSET */
+
+private:
+  int SendRecv(int);
+  /* low level access to parallel port lines */
+  void OutReset(int);
+  void OutSck(int);
+  void OutData(int);
+  void SckDelay();
+  int InData();
+  void OutEnaReset(int);
+  void OutEnaSck(int);
+
+  void ParportSetDir(int);
+  void ParportWriteCtrl();
+  void ParportWriteData();
+  void ParportReadStatus();
+
+  void SerialReadCtrl();
+  void SerialWriteCtrl();
+
+public:
+  /* If enable command 0x53 did not echo back, give a positive SCK
+     pulse and retry again.
+  */
+  void PulseSck();
+  void PulseReset();
+  void Init();
+  int Send(unsigned char*, int, int rec_queueSize=-1);
+  void Delay_usec(long);
+
+  TDAPA();
+  ~TDAPA();
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/Error.h b/tools/platforms/mica/uisp/src/Error.h
new file mode 100644
index 00000000..0525e2a2
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Error.h
@@ -0,0 +1,68 @@
+// $Id: Error.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: Error.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+** Error.h
+** Uros Platise, (c) 1997, November
+*/
+
+#ifndef __Error
+#define __Error
+#include <stdio.h>
+
+/* This error class is used to express standard C errors. */
+class Error_C {
+ public:
+  Error_C (const char* _arg) : arg(_arg) { }
+  void print (void) {
+    if (arg != NULL) { printf (" -> %s\n", arg); }
+  }
+ private:
+    const char *arg;
+};
+
+/* Out of memory error class informs terminal or upload/download
+   tools that it has gone out of valid memory - and that's all.
+   Program should not terminate. */
+class Error_MemoryRange {};
+
+/* General internal error reporting class that normally force
+   uisp to exit after proper destruction of all objects. */
+class Error_Device {
+public:
+  Error_Device (const char *_errMsg, const char *_arg=NULL) : 
+    errMsg(_errMsg), arg(_arg) { }
+  void print () { 
+    if (arg==NULL) { printf ("%s\n", errMsg); }
+    else { printf ("%s: %s\n", errMsg, arg); }
+  }
+private:
+  const char* errMsg;
+  const char* arg;
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/Global.h b/tools/platforms/mica/uisp/src/Global.h
new file mode 100644
index 00000000..0265063d
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Global.h
@@ -0,0 +1,141 @@
+// $Id: Global.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: Global.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* Global.h, Uros Platise (c) 1999 */
+
+#ifndef __GLOBAL
+#define __GLOBAL
+
+#include <assert.h>
+#include <stdlib.h>
+
+typedef unsigned char TByte;
+typedef unsigned TAddr;
+
+
+/* Smart Pointer Class 
+*/
+template <class TRec>
+class TPt{
+private:
+  TRec* Addr;
+  void MkRef(){if (Addr!=NULL){Addr->CRef++;}}
+  void UnRef(){if (Addr!=NULL){Addr->CRef--;if (Addr->CRef==0){delete Addr;}}}
+public:
+  TPt():Addr(NULL){}
+  TPt(TRec* _Addr): Addr(_Addr){MkRef();}
+  TPt(const TPt& Pt): Addr(Pt.Addr){MkRef();}
+  ~TPt(){UnRef();}
+
+  TPt& operator=(const TPt& Pt){
+    if (this!=&Pt){UnRef(); Addr=Pt.Addr; MkRef();} return *this;}
+  TPt& operator=(TRec* _Addr){
+    if (Addr!=_Addr){UnRef();Addr=_Addr;MkRef();} return *this;}
+  bool operator==(const TPt& Pt) const {return Addr==Pt.Addr;}
+
+  TRec* operator->() const {assert(Addr!=NULL); return Addr;}
+  TRec& operator*() const {assert(Addr!=NULL); return *Addr;}
+  TRec& operator[](int RecN) const {assert(Addr!=NULL); return Addr[RecN];}
+  TRec* operator()() const {return Addr;}
+  
+  /* think once more! */
+  bool operator<(const TPt& Pt){return Addr < Pt.Addr;}
+};
+
+
+class TDevice{
+private:
+  int CRef;
+  
+public:
+  /* Set active segment. 
+     Returns true if segment exists, otherwise false 
+  */
+  virtual bool SetSegment(const char* segment_name)=0;
+  
+  /* Returns char pointer of current active segment name.
+  */
+  virtual const char* TellActiveSegment()=0;
+
+  /* Returns char pointer of the indexed segment name.
+     Index is in range [0,no_of_segments].
+     When index is out of range NULL is returned.
+  */
+  virtual const char* ListSegment(unsigned index)=0;
+
+  virtual TAddr GetSegmentSize()=0;
+
+  /* Read byte from active segment at address addr. */
+  virtual TByte ReadByte(TAddr addr)=0;
+  
+  /* Read byte description at address addr (as security bits) */
+  virtual const char* ReadByteDescription(TAddr addr)=0;
+  
+  /* Write byte to active segment at address addr */
+  virtual void WriteByte(TAddr addr, TByte byte, bool flush_buffer=true)=0;
+  virtual void FlushWriteBuffer(){}
+  
+  /* Chip Erase */
+  virtual void ChipErase()=0;
+
+  /* lock bits */
+  virtual void WriteLockBits(TByte bits)=0;
+  virtual TByte ReadLockBits(){return 0;}
+  
+  /* Transfer Statistics in Bytes/Seconds */
+  virtual unsigned int GetPollCount(){return 0;}
+  virtual float GetMinPollTime(){return 0;}
+  virtual float GetTotPollTime(){return 0;}
+  virtual float GetMaxPollTime(){return 0;}
+  virtual void ResetMinMax(){}
+  
+  TDevice():CRef(0){}
+  virtual ~TDevice(){}
+  
+  friend class TPt<TDevice>;
+};
+
+typedef TPt<TDevice> PDevice;
+
+extern PDevice device;
+
+/* Find command line parameter's value.
+   It searches the command line parameters of the form:
+   
+	argv_name=value
+	
+   Returns pointer to the value. 
+*/
+const char* GetCmdParam(const char* argv_name, bool value_required=true);
+
+
+/* Print Status Information to the Standard Error Output.
+*/
+bool Info(unsigned _verbose_level, const char* fmt, ...)
+  __attribute__((format (printf, 2, 3)));
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/Main.C b/tools/platforms/mica/uisp/src/Main.C
new file mode 100644
index 00000000..b207fe19
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Main.C
@@ -0,0 +1,453 @@
+// $Id: Main.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: Main.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+  Main.C
+
+  Micro In-System Programmer
+  Uros Platise (C) 1997-1999
+*/
+
+#include "config.h"
+
+#include <stdio.h>
+#include <stdarg.h>
+#include <stdlib.h>
+#include <string.h>
+#include <exception>
+#include "Terminal.h"
+#include "MotIntl.h"
+#include "AvrAtmel.h"
+#include "Stk500.h"
+#include "AvrStargate.h"
+#ifndef NO_DAPA
+# include "AvrDummy.h"
+#endif
+
+/* Globals
+*/
+
+int argc;
+const char** argv;
+char* argv_ok;
+unsigned verbose_level;
+
+PDevice device;
+TMotIntl motintl;
+TTerminal terminal;
+
+const char* version = "uisp version %s\n"
+"(C) 1997-1999 Uros Platise, 2000-2003 Marek Michalkiewicz\n"
+"(c) 2003-2005 Philip Buonadonna, Intel Corporation\n"
+"(c) 2003           ,        Crossbow Technology\n"
+"\nuisp is free software, covered by the GNU General Public License.\n"
+"You are welcome to change it and/or distribute copies of it under\n"
+"the conditions of the GNU General Public License.\n\n";
+
+const char* help_screen =
+"Syntax: uisp [-v{=level}] [-h] [--help] [--version] [--hash=perbytes]\n"
+"             [-dprog=avr910|pavr|stk500|mib510|stargate]"
+#ifndef NO_DAPA
+" [-dprog=type]\n"
+"             [-dlpt=address|/dev/parportX] [-dno-poll] [-dno-retry]\n"
+"             [-dvoltage=...] [-dt_sck=time] [-dt_wd_{flash|eeprom}=time]\n"
+"             [-dt_reset=time] [-dinvert=sck,mosi,miso,reset]"
+#endif
+"\n"
+"             [-dserial=device] [-dpart=name|no]\n"
+"             [-dspeed=1200|2400|4800|9600|19200|38400|57600|115200]"
+"\n"
+"             [--upload] [--verify] [--erase] [if=input_file]\n"
+"             [--download] [of=output_file]\n"
+"             [--segment=flash|eeprom|fuse] [--terminal]\n"
+"             [--rd_fuses] [--wr_fuse_l=byte] [--wr_fuse_h=byte]\n"
+"             [--wr_fuse_e=byte] [--wr_lock=byte]\n\n"
+"Programming Methods:\n"
+"  -dprog=avr910    Standard Atmel Serial Programmer/Atmel Low Cost Programmer\n"
+"         pavr      http://www.avr1.org/pavr/pavr.html\n"
+"         stk500    Atmel STK500 or Atmel ATAVRISP\n"
+"         mib510    Crossbow MIB510 (for Atmega128, 115200 baud serial only) \n"
+"         stargate  PXA Based Stargate \n"
+#ifndef NO_DAPA
+"  -dprog=dapa|stk200|abb|avrisp|bsd|fbprg|dt006|maxi|xil|dasa|dasa2\n"
+"       Programmer type:\n"
+"         dapa      Direct AVR Parallel Access\n"
+"         stk200    Parallel Starter Kit STK200, STK300\n"
+"         abb       Altera ByteBlasterMV Parallel Port Download Cable\n"
+"         avrisp    Atmel AVR ISP (?)\n"
+"         bsd       http://www.bsdhome.com/avrdude/ (parallel)\n"
+"         fbprg     http://ln.com.ua/~real/avreal/adapters.html (parallel)\n"
+"         dt006     http://www.dontronics.com/dt006.html (parallel)\n"
+"         maxi      Investment Technologies Maxi (parallel)\n"
+"         xil       Xilinx HW-JTAG-PC Cable (parallel)\n"
+"         ett       ETT AVR Programmer V2.0 [from Futurlec] (parallel)\n"
+"         dasa      serial (RESET=RTS SCK=DTR MOSI=TXD MISO=CTS)\n"
+"         dasa2     serial (RESET=!TXD SCK=RTS MOSI=DTR MISO=CTS)\n"
+"\n"
+"Target Device Selection:\n"
+"  -dpart       Set  target abbreviated name or number. For some programmers, if\n"
+"               -dpart is not given programmer's supported devices  are  listed.\n"
+"               Set  -dpart=auto for auto-select. Auto-select does not work with\n"
+"               all programmers, so it is recommended to always specify a target\n"
+"               device explicitly.\n"
+"\n"
+"Parallel Device Settings:\n"
+"  -dlpt=       specify device name (Linux ppdev, FreeBSD ppi, serial)\n"
+#ifndef NO_DIRECT_IO
+"               or direct I/O parallel port address (0x378, 0x278, 0x3BC)\n"
+#endif
+"  -dno-poll    Program without data polling (a little slower)\n"
+"  -dno-retry   Disable retries of program enable command\n"
+"  -dvoltage    Set timing specs according to the power supply voltage in [V]\n"
+"               (default 3.0)\n"
+"  -dt_sck      Set minimum SCK high/low time in micro-seconds (default 5)\n"
+"  -dt_wd_flash Set FLASH maximum write delay time in micro-seconds\n"
+"  -dt_wd_eeprom Set EEPROM maximum write delay time in micro-seconds\n"
+"  -dt_reset    Set reset inactive (high) time in micro-seconds\n"
+"  -dinvert=... Invert specified lines\n"
+"               Use -v=3 option to see current settings.\n"
+#endif
+"\n"
+"Atmel Low Cost Programmer Serial Device Settings:\n"
+"  -dserial     Set serial interface as /dev/ttyS* (default /dev/avr)\n"
+"  -dspeed      Set speed of the serial interface (default 19200)\n"
+"  -dhost       IP Address or hostname of serial server. This option\n"
+"               overrides the -dserial option\n"
+"  -dport       Port number of the serial server (default 10001)\n"
+"\n"
+"Stk500 specific options:\n"
+"  -dparallel   Use Hi-V parallel programming instead of serial (default is\n"
+"               serial)\n"
+"  --rd_aref    Read the ARef Voltage. Note that due to a bug in the\n"
+"               stk500 firmware, the read value is sometimes off by 0.1\n"
+"               from the actual value measured with a volt meter.\n"
+"  --rd_vtg     Read the Vtarget Voltage. Note that due to a bug in the\n"
+"               stk500 firmware, the read value is sometimes off by 0.1\n"
+"               from the actual value measured with a volt meter.\n"
+"  --wr_aref    Set the ARef Voltage. Valid values are 0.0 to 6.0 volts in\n"
+"               0.1 volt increments. Value can not be larger than the\n"
+"               VTarget value.\n"
+"  --wr_vtg     Set the VTarget Voltage. Valid values are 0.0 to 6.0 volts in\n"
+"               0.1 volt increments. Value can not be smaller than the\n"
+"               ARef value.\n"
+"\n"
+"Functions:\n"
+"  --upload     Upload \"input_file\" to the AVR memory.\n"
+"  --verify     Verify \"input_file\" (processed after the --upload opt.)\n"
+"  --download   Download AVR memory to \"output_file\" or stdout.\n"
+"  --erase      Erase device.\n"
+"  --segment    Set active segment (auto-select for AVA Motorola output)\n"
+"\n"
+"Fuse/Lock Bit Operations:\n"
+"  --rd_fuses   Read all fuses and print values to stdout\n"
+"  --wr_fuse_l  Write fuse low byte\n"
+"  --wr_fuse_h  Write fuse high byte\n"
+"  --wr_fuse_e  Write fuse extended byte\n"
+"  --wr_lock    Write lock bits. Argument is a byte where each bit is:\n"
+"                   Bit5 -> blb12\n"
+"                   Bit4 -> blb11\n"
+"                   Bit3 -> blb02\n"
+"                   Bit2 -> blb01\n"
+"                   Bit1 -> lb2\n"
+"                   Bit0 -> lb1\n"
+"  --lock       Write lock bits [old method; deprecated].\n" 
+"\n"
+"Files:\n"
+"  if           Input file for the --upload and --verify functions in\n"
+"               Motorola S-records (S1 or S2) or 16 bit Intel format\n"
+"  of           Output file for the --download function in\n"
+"               Motorola S-records format, default is standard output\n"
+"\n"
+"Other Options:\n"
+"  -v           Set verbose level (-v equals -v=2, min/max: 0/4, default 1)\n"
+"  --hash       Print hash (default is 32 bytes)\n"
+"  --help -h    Help\n"
+"  --version    Print version information\n"
+"  --terminal   Invoke shell-like terminal\n"
+"\n"
+"Report bugs to: Maintainers <uisp-dev@nongnu.org>\n"
+"Updates:        http://savannah.nongnu.org/projects/uisp\n";
+
+
+/* Find command line parameter's value.
+   It searches the command line parameters of the form:
+   
+	argv_name=value
+	
+   Returns pointer to the value. 
+*/
+const char* GetCmdParam(const char* argv_name, bool value_required)
+{
+  int argv_name_len = strlen(argv_name);
+  for (int i=1; i<argc; i++){
+    if (strncmp(argv_name, argv[i], argv_name_len)==0){
+      if (argv[i][argv_name_len]==0){
+        if (value_required){
+	  throw Error_Device("Incomplete parameter", argv[i]);
+	}
+	argv_ok[i]=1;
+        return &argv[i][argv_name_len];	
+      }
+      if (argv[i][argv_name_len]=='='){
+        argv_ok[i]=1;
+        return &argv[i][argv_name_len+1];
+      }
+    }
+  }
+  return NULL;
+}
+
+/* Print Status Information to the Standard Error Output.
+*/
+bool Info(unsigned _verbose_level, const char* fmt, ...){
+  if (_verbose_level > verbose_level){return false;}
+  va_list ap;
+  va_start(ap,fmt); 
+  vfprintf(stderr,fmt,ap);
+  va_end(ap);
+  return true;
+}
+
+static void cleanup_exception() {
+  fprintf(stderr, "problem during cleanup - exiting\n");
+  _exit(2);
+}
+
+int main(int _argc, const char* _argv[]){
+  int return_val=0;
+  argc = _argc;
+  argv = _argv;
+  verbose_level=1;  
+  
+  if (argc==1){
+    Info(0, "%s: No commands specified. "
+         "Try '%s --help' for list of commands.\n",
+         argv[0], argv[0]);
+    exit(1);
+  }  
+  argv_ok = (char *)malloc(argc);
+  for (int i=1; i<argc; i++){argv_ok[i]=0;}    
+  
+  /* Help Screen? */
+  if (GetCmdParam("-h", false) || GetCmdParam("--help", false)){
+    printf(version, VERSION);
+    printf("%s\n", help_screen);
+    return 0;
+  }
+  if (GetCmdParam("--version", false)){
+    printf(version, VERSION);
+    return 0;
+  }
+  
+  /* Setup Verbose Level */
+  const char *p = GetCmdParam("-v",false);
+  if (p!=NULL){
+    if (*p==0){verbose_level=2;} else{verbose_level = atoi(p);}
+  }
+
+  /* Invoke Terminal or Command Line Batch Processing */
+  try{
+    const char* val;
+
+    val = GetCmdParam("-dprog");
+    /* backwards compatibility, -datmel is now -dprog=avr910 */
+    if (GetCmdParam("-datmel", false))
+      val = "avr910";
+    // BBD: add check for NULL on -dprog
+    if (val && (strcmp(val, "avr910") == 0 || strcmp(val, "pavr") == 0)) {
+      /* Drop setuid privileges (if any - not recommended) before
+	 trying to open the serial device, they are only needed for
+	 direct I/O access (not ppdev/ppi) to the parallel port.  */
+      setgid(getgid());
+      setuid(getuid());
+      device = new TAvrAtmel();
+    }
+    else if ( (val && (strcmp(val, "stk500") == 0)) || (val && (strcmp(val, "mib510") == 0))   ) {
+      setgid(getgid());
+      setuid(getuid());
+      device = new TStk500();
+    }
+    else if (val && (strcmp(val, "stargate") == 0)) {
+      device = new TAvrStargate();
+    }
+#ifndef NO_DAPA
+    else if (val) {
+      /* The TDAPA() constructor will drop setuid privileges after
+         opening the lpt ioport. */
+      device = new TAvrDummy();
+    }
+#endif
+
+    /* Check Device's bad command line params. */
+    for (int i=1; i<argc; i++){
+      if (argv_ok[i]==0 && strncmp(argv[i], "-d", 2)==0){
+        Info(0,"Invalid parameter: %s\n", argv[i]); exit(1);
+      }
+    }    
+    if (device()==NULL){
+      throw Error_Device("Programming method is not selected.");
+    }
+
+    /* Set Current Active Segment */
+    if ((val=GetCmdParam("--segment"))!=NULL){
+      if (!device->SetSegment(val)){
+	Info(0, "--segment=%s: bad segment name\n", val);
+      }
+    }
+
+    	/* Device Operations: */
+
+    if (GetCmdParam("--download", false)) {
+      motintl.Write(GetCmdParam("of"));
+    }
+
+    if (GetCmdParam("--erase", false)){device->ChipErase();}
+
+    /* Input file */
+    if ((val=GetCmdParam("if"))) {
+      if (GetCmdParam("--upload", false)){motintl.Read(val, true, false);}
+      if (GetCmdParam("--verify", false)){motintl.Read(val, false, true);}
+    }
+
+    if (GetCmdParam("--rd_fuses",false))
+    {
+      TByte bits;
+      const char *old_seg = device->TellActiveSegment();
+      device->SetSegment("fuse");
+
+      printf("\n");
+      printf("Fuse Low Byte      = 0x%02x\n", device->ReadByte(AVR_FUSE_LOW_ADDR));
+      printf("Fuse High Byte     = 0x%02x\n", device->ReadByte(AVR_FUSE_HIGH_ADDR));
+      printf("Fuse Extended Byte = 0x%02x\n", device->ReadByte(AVR_FUSE_EXT_ADDR));
+      printf("Calibration Byte   = 0x%02x  --  Read Only\n",
+             device->ReadByte(AVR_CAL_ADDR));
+
+      bits = device->ReadByte(AVR_LOCK_ADDR);
+      printf("Lock Bits          = 0x%02x\n", bits);
+      printf("    BLB12 -> %d\n", ((bits & BLB12) == BLB12));
+      printf("    BLB11 -> %d\n", ((bits & BLB11) == BLB11));
+      printf("    BLB02 -> %d\n", ((bits & BLB02) == BLB02));
+      printf("    BLB01 -> %d\n", ((bits & BLB01) == BLB01));
+      printf("      LB2 -> %d\n", ((bits & LB2) == LB2));
+      printf("      LB1 -> %d\n", ((bits & LB1) == LB1));
+
+      printf("\n");
+
+      device->SetSegment(old_seg);
+    }
+
+    if ((val=GetCmdParam("--wr_fuse_l")) != NULL)
+    {
+      unsigned int bits;
+      const char *old_seg = device->TellActiveSegment();
+      device->SetSegment("fuse");
+
+      if (sscanf(val, "%x", &bits) == 1)
+      {
+        device->WriteByte( AVR_FUSE_LOW_ADDR, (TByte)bits );
+        printf("\nFuse Low Byte set to 0x%02x\n", (TByte)bits);
+      }
+      else
+        throw Error_Device("Invalid argument for --wr_fuse_l.");
+
+      device->SetSegment(old_seg);
+    }
+
+    if ((val=GetCmdParam("--wr_fuse_h")) != NULL)
+    {
+      unsigned int bits;
+      const char *old_seg = device->TellActiveSegment();
+      device->SetSegment("fuse");
+
+      if (sscanf(val, "%x", &bits) == 1)
+      {
+        device->WriteByte( AVR_FUSE_HIGH_ADDR, (TByte)bits );
+        printf("\nFuse High Byte set to 0x%02x\n", (TByte)bits);
+      }
+      else
+        throw Error_Device("Invalid argument for --wr_fuse_h.");
+
+      device->SetSegment(old_seg);
+    }
+
+    if ((val=GetCmdParam("--wr_fuse_e")) != NULL)
+    {
+      unsigned int bits;
+      const char *old_seg = device->TellActiveSegment();
+      device->SetSegment("fuse");
+
+      if (sscanf(val, "%x", &bits) == 1)
+      {
+        device->WriteByte( AVR_FUSE_EXT_ADDR, (TByte)bits );
+        printf("\nFuse Extended Byte set to 0x%02x\n", (TByte)bits);
+      }
+      else
+        throw Error_Device("Invalid argument for --wr_fuse_e.");
+
+      device->SetSegment(old_seg);
+    }
+
+    if ((val=GetCmdParam("--wr_lock")) != NULL)
+    {
+      unsigned int bits;
+
+      if (sscanf(val, "%x", &bits) == 1)
+      {
+        device->WriteLockBits( (TByte)bits );
+        printf("\nLock Bits set to 0x%02x\n", (TByte)bits);
+      }
+      else
+        throw Error_Device("Invalid argument for --wr_lock.");
+    }
+
+    if (GetCmdParam("--lock", false))
+    {
+      Info(0, "NOTE: '--lock' is deprecated. Used '--wr_lock' instead.\n");
+      device->WriteLockBits(0xFC);
+      printf("\nLock Bits set to 0x%02x\n", 0xfc);
+    }
+
+    	/* enter terminal */ 
+	
+    if (GetCmdParam("--terminal", false)){terminal.Run();}
+    
+    /* Check bad command line parameters */
+    for (int i=1; i<argc; i++){
+      if (argv_ok[i]==0){Info(0,"Invalid parameter: %s\n", argv[i]);}
+    }  
+  } 
+  catch(Error_C& errC){perror("Error"); errC.print(); return_val=1;}
+  catch(Error_Device& errDev){errDev.print(); return_val=2;}
+  catch(Error_MemoryRange& x){
+    Info(0, "Address out of memory range.\n"); return_val=3;
+  }
+
+  std::set_terminate(cleanup_exception);
+
+  return return_val;
+}
+
diff --git a/tools/platforms/mica/uisp/src/Makefile.am b/tools/platforms/mica/uisp/src/Makefile.am
new file mode 100644
index 00000000..282433e3
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Makefile.am
@@ -0,0 +1,66 @@
+#
+# $Id: Makefile.am,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+#
+# uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+# Copyright (C) 2002  Theodore A. Roth
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#
+# Makefile.am -- Process this file with automake to produce Makefile.in
+#
+
+MAINTAINERCLEANFILES = Makefile.in
+
+#SUBDIRS              = 
+#DIST_SUBDIRS         = 
+
+#EXTRA_DIST           = 
+
+# Turn on all warnings and consider them errors. This kinda forces you to have
+# to use gcc, but I'd rather have all warnings eliminated.
+# There's a header file macro causing warnings on cygwin => -Werror removed
+
+AM_CXXFLAGS          = -Wall
+
+bin_PROGRAMS         = uisp
+uisp_SOURCES         = \
+	Avr.C              \
+	Avr.h              \
+	AvrAtmel.C         \
+	AvrAtmel.h         \
+	AvrDummy.C         \
+	AvrDummy.h         \
+	AvrStargate.C      \
+	AvrStargate.h      \
+	DAPA.C             \
+	DAPA.h             \
+	Error.h            \
+	Global.h           \
+	Main.C             \
+	MotIntl.C          \
+	MotIntl.h          \
+	SASA.C             \
+	SASA.h	           \
+	Serial.C           \
+	Serial.h           \
+	Stk500.C           \
+	Stk500.h           \
+	Terminal.C         \
+	Terminal.h         \
+	cygwinp.C          \
+	cygwinp.h          \
+	parport.h          \
+	ppdev.h            \
+	timeradd.h
diff --git a/tools/platforms/mica/uisp/src/MotIntl.C b/tools/platforms/mica/uisp/src/MotIntl.C
new file mode 100644
index 00000000..37942a5b
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/MotIntl.C
@@ -0,0 +1,481 @@
+// $Id: MotIntl.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: MotIntl.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* 
+	MotIntl.C
+	
+	Motorola and Intel Uploading/Downloading Routines
+	Uros Platise (c) 1999
+*/
+
+#include "config.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+#include "timeradd.h"
+#include "Global.h"
+#include "Error.h"
+#include "MotIntl.h"
+
+TByte TMotIntl::Htoi(const char* p){
+  unsigned char val = 0;
+
+  if (*p>='0' && *p<='9')
+    val += *p-'0';
+  else if (*p>='A' && *p<='F')
+    val += *p-'A'+10;
+  else if (*p>='a' && *p<='f')
+    val += *p-'a'+10;
+  else
+    throw Error_Device("Bad file format.");
+
+  val <<= 4; p++;    
+
+  if (*p>='0' && *p<='9')
+    val += *p-'0';
+  else if (*p>='A' && *p<='F')
+    val += *p-'A'+10;
+  else if (*p>='a' && *p<='f')
+    val += *p-'a'+10;
+  else
+    throw Error_Device("Bad file format.");
+
+  cc_sum += val;
+  return val;
+}
+
+void TMotIntl::InfoOperation(const char* prefix, const char* seg_name){
+  Info(1, "%s", prefix);
+  if (!upload && !verify) { Info(1, "Downloading"); }
+  if (upload){Info(1, "Uploading");}
+  if (upload && verify){Info(1, "/");}
+  if (verify){Info(1, "Verifying");}
+  Info(1, ": %s\n", seg_name);
+}
+
+void
+TMotIntl::ReportStats(float elapsed, TAddr total_bytes)
+{
+  float rate = (float)total_bytes / elapsed;
+  Info(2, "\n(total %u bytes transferred in %.2f s (%.0f bytes/s)\n",
+       total_bytes, elapsed, rate);
+  if (upload) {
+    unsigned int total_polled = device->GetPollCount();
+    if (total_polled) {
+      float min_poll_time = device->GetMinPollTime() * 1000.0;
+      float max_poll_time = device->GetMaxPollTime() * 1000.0;
+      float avg_poll_time = device->GetTotPollTime() * (1000.0 / total_polled);
+      Info(2, "Polling: count = %u, min/avg/max = %.2f/%.2f/%.2f ms\n",
+	   total_polled, min_poll_time, avg_poll_time, max_poll_time);
+    }
+  }
+}
+
+void TMotIntl::UploadMotorola(){
+  unsigned char srec_len, buf_len, srec_cc_sum;
+  char seg_name[256];   /* data field length is a byte, so this is safe */
+  char* p;		/* line buffer pointer */
+  TAddr addr;
+  TAddr total_bytes_uploaded=0;
+  TAddr hash_cnt=0;
+  TByte byte;
+  struct timeval t1, t2;
+  
+  device->ResetMinMax();
+  
+  do{
+    /* convert to upper case */
+    buf_len = strlen(line_buf);
+    for (int i=0;i<buf_len;i++){line_buf[i] = toupper(line_buf[i]);}
+  
+    if (line_buf[0]!='S'){throw Error_Device("Bad Motorola file format.");}
+    
+    cc_sum = 0;
+    srec_len = Htoi(&line_buf[2]) - 3; /* subtract off addr (2) and checksum (1) */
+    p = &line_buf[4];
+
+    /* This check is to avoid reading past the end of line_buf.
+       Add 1 for type, 1 for cnt and 3 for subtracted above. */
+    if ((srec_len+1+1+3)*2 > MI_LINEBUF_SIZE)
+        throw ("Bad Motorola file format.");
+    
+    /* Load address */
+    addr = Htoi(p); p+=2; addr <<= 8;
+    addr += Htoi(p); p+=2;
+    
+    switch(line_buf[1]){
+    case '0':{    
+	/* Load segment name */
+        int i;
+	for (i=0;i<srec_len;i++)
+        {
+            seg_name[i] = Htoi(p);
+            p+=2;
+        }
+	seg_name[i]=0;
+		
+	/* Select Segment */
+	if (device->SetSegment(seg_name)){InfoOperation("Auto-", seg_name);}
+	else{InfoOperation("", device->TellActiveSegment());}
+	
+	/* Print first hash */
+	if (device->GetSegmentSize() >= 16)
+	  Info(2, "#");
+	hash_cnt=0;
+	
+	/* Set statistic variables */	
+	total_bytes_uploaded = 0;
+	gettimeofday(&t1, NULL);
+      } break;
+
+    /* 4 byte address */
+    case '3':
+        addr <<= 8; addr += Htoi(p); p+=2;
+	srec_len--;
+        /* Note that we fall through. */
+
+    /* 3 byte address */	
+    case '2':
+        addr <<= 8; addr += Htoi(p); p+=2;
+	srec_len--;
+        /* Note that we fall through. */
+	
+    /* 2 byte address */
+    case '1':{
+	/* Upload/Verify bytes */
+	total_bytes_uploaded += srec_len;
+	while(srec_len-->0){
+	  byte = Htoi(p);
+	  if (upload){device->WriteByte(addr, byte, false);}
+	  if (verify){
+	    TByte rbyte = device->ReadByte(addr);
+	    if (rbyte != byte){
+	      Info(0, "%s error at address 0x%x: file=0x%02x, mem=0x%02x\n",
+	        device->TellActiveSegment(), addr, 
+		(int) byte, (int) rbyte);
+	    }
+	  }	  
+	  p+=2; addr++;
+	  if (total_bytes_uploaded >= hash_cnt+hash_marker){
+	    Info(2, "#");
+	    hash_cnt+=hash_marker;
+	  }
+	}
+      } break;
+
+    case '7':
+    case '8':
+    case '9':{
+        if (upload){device->FlushWriteBuffer();}
+	gettimeofday(&t2, NULL);
+	timersub(&t2, &t1, &t2);
+	float elapsed = t2.tv_sec + t2.tv_usec*1e-6;
+	ReportStats(elapsed, total_bytes_uploaded);
+
+        /* verify check sum */
+	for (int i=0;i<srec_len;i++){Htoi(p); p+=2;}
+      } break;
+
+    case '5':{
+        /* just ignore the S5 record except for verifying checksum */
+	for (int i=0;i<srec_len;i++){Htoi(p); p+=2;}
+        break;
+      }
+      
+    default: throw Error_Device("Bad Motorola S record.\n");
+    }
+    
+    /* Read Check Sum and give a report */
+    srec_cc_sum = Htoi(p);
+    if (cc_sum != 0xFF){
+      Info(2, "S-record check sum: %d   uisp check sum: %d\n",
+        (unsigned)srec_cc_sum, (unsigned)cc_sum);
+      throw Error_Device("Check sum error.\n");
+    }
+
+  } while(fgets(line_buf, MI_LINEBUF_SIZE, fd)!=NULL);
+}
+
+void TMotIntl::UploadIntel(){
+  unsigned char ihex_len, buf_len, ihex_cc_sum;
+  char* p;		/* line buffer pointer */
+  TAddr addr;
+  TAddr seg_offset=0;
+  TAddr total_bytes_uploaded=0;
+  TAddr hash_cnt=0;
+  TByte byte;
+  TByte rec_type;
+  struct timeval t1, t2;
+
+  InfoOperation("", device->TellActiveSegment());
+  
+  /* Print first hash */
+  if (device->GetSegmentSize() >= 16)
+    Info(2, "#");
+  
+  /* Set statistic variables */	
+  total_bytes_uploaded = 0;
+  gettimeofday(&t1, NULL);
+
+  device->ResetMinMax();
+
+  do{
+    /* convert to upper case */
+    buf_len = strlen(line_buf);
+    for (int i=0;i<buf_len;i++){line_buf[i] = toupper(line_buf[i]);}
+  
+    if (line_buf[0]!=':'){throw Error_Device("Bad Intel file format.");}
+
+    cc_sum = 0;
+    ihex_len = Htoi(&line_buf[1]);
+    p = &line_buf[3];
+
+    /* Check len so don't read past end of line_buf.
+     1 for ':', 1 for cnt, 2 for addr, 1 for type and 1 for checksum. */
+    if ((1+(ihex_len+1+2+1+1)*2) > MI_LINEBUF_SIZE)
+        throw ("Bad Intel file format.");
+    
+    /* Load address */
+    addr = Htoi(p); p+=2; addr <<= 8;
+    addr += Htoi(p); p+=2;
+    rec_type = Htoi(p); p+=2;   /* read control byte: 00-data, 01-end, 02-seg_offset */
+
+    addr += seg_offset;         /* this allows access to more than 64K */
+
+    switch(rec_type)
+      {
+      case 0x00:{
+        /* Upload/Verify bytes */
+        total_bytes_uploaded += ihex_len;
+        while(ihex_len-->0){
+          byte = Htoi(p);
+          if (upload){device->WriteByte(addr, byte, false);}
+          if (verify){
+            TByte rbyte = device->ReadByte(addr);
+            if (rbyte != byte){
+              Info(0, "%s error at address 0x%x: file=0x%02x, mem=0x%02x\n",
+                   device->TellActiveSegment(), addr, 
+                   (int) byte, (int) rbyte);
+            }
+          }
+          p+=2; addr++;
+          if (total_bytes_uploaded >= hash_cnt+hash_marker){
+            Info(2, "#");
+            hash_cnt+=hash_marker;
+          }
+        }
+      } break;
+
+      case 0x01:  /* end */
+      case 0x03:  /* start address record */
+      case 0x05:  /* start linear address record */
+        /* don't need to do anything, except calculate the checksum */
+        while (ihex_len-- > 0) {
+          byte = Htoi(p);
+          p += 2;
+        }
+        break;
+
+      case 0x02:{
+        seg_offset = Htoi(p); p+=2; seg_offset <<=8;
+        seg_offset += Htoi(p); p+=2;
+
+        /* seg_offset is bits 4-19 of addr, so shift to that. */
+        seg_offset <<=4;
+      } break;
+
+      case 0x04: /* extended linear address record */
+	seg_offset = Htoi(p); p += 2; seg_offset <<= 8;
+	seg_offset += Htoi(p); p += 2;
+	seg_offset <<= 16;
+	break;
+
+      default: throw Error_Device("Bad Intel Hex record.\n");
+      }
+    
+    /* Read Check Sum and give a report */
+    ihex_cc_sum = Htoi(p);
+    if (cc_sum != 0x0){
+      Info(2, "Intel check sum: %d   uisp check sum: %d\n",
+        (unsigned)ihex_cc_sum, (unsigned)cc_sum);
+      throw Error_Device("Check sum error.\n");
+    }
+    
+  
+  } while(fgets(line_buf, MI_LINEBUF_SIZE, fd)!=NULL);
+  
+  if (upload){device->FlushWriteBuffer();}  
+  
+  /* Print transfer statistics */        
+  gettimeofday(&t2, NULL);  
+  timersub(&t2, &t1, &t2);
+  float elapsed = t2.tv_sec + t2.tv_usec*1e-6;
+  ReportStats(elapsed, total_bytes_uploaded);
+}
+
+void TMotIntl::Read(const char* filename, bool _upload, bool _verify){
+  upload = _upload;
+  verify = _verify;
+  if ((fd=fopen(filename,"rt"))==NULL){
+    throw Error_C(filename);
+  }
+  
+  /* Set-up Hash Marker */
+  const char* val = GetCmdParam("--hash");
+  if (val!=NULL){hash_marker = atoi(val);}  
+  
+  /* auto-detect Motorola or Intel file format */
+  fgets(line_buf, MI_LINEBUF_SIZE, fd);
+  if (strncasecmp(line_buf, "S0", 2)==0){UploadMotorola();}
+  else if (line_buf[0]==':'){UploadIntel();}
+  else {throw Error_Device("Unknown file format.");}  
+  
+  fclose(fd);
+}
+
+void
+TMotIntl::SrecWrite(unsigned int type, const unsigned char *buf,
+		    unsigned int len)
+{
+  unsigned i, sum;
+
+  fprintf(fd, "S%01X%02X", type, len + 1);
+  sum = len + 1;
+  for (i = 0; i < len; i++) {
+    sum += buf[i];
+    fprintf(fd, "%02X", (unsigned int) buf[i]);
+  }
+  fprintf(fd, "%02X\r\n", (unsigned int)(~sum & 0xFF));
+}
+
+void
+TMotIntl::DownloadMotorola()
+{
+  /* A short description of S-Records may be found at 
+     http://www.ndsu.nodak.edu/instruct/tareski/373f98/notes/srecord.htm
+  */
+  TAddr addr, size;
+  TAddr total_bytes_uploaded=0;
+  TAddr hash_cnt=0;
+  struct timeval t1, t2;
+  unsigned char buf[40];
+  const char *seg;
+  int s5count=0;
+
+  seg = device->TellActiveSegment();
+  InfoOperation("", seg);
+  
+  /* Set statistic variables */	
+  total_bytes_uploaded = 0;
+  gettimeofday(&t1, NULL);
+
+  device->ResetMinMax();
+
+  size = device->GetSegmentSize();
+
+  /* Print first hash (except for fuse bits) */
+  if (size >= 16)
+    Info(2, "#");
+
+  buf[0] = 0;
+  buf[1] = 0;
+  strncpy((char *) buf+2, seg, 16);
+  buf[18] = 0;
+  SrecWrite(0, buf, 2 + strlen((const char *) buf + 2));
+
+  for (addr = 0; addr < size; addr += 16) {
+    int i, len;
+
+    len = size - addr;
+    if (len > 16)
+      len = 16;
+    buf[0] = (addr >> 24) & 0xFF;
+    buf[1] = (addr >> 16) & 0xFF;
+    buf[2] = (addr >> 8) & 0xFF;
+    buf[3] = addr & 0xFF;
+    for (i = 0; i < len; i++) {
+      TByte rbyte = device->ReadByte(addr + i);
+      buf[4 + i] = rbyte;
+      total_bytes_uploaded++;
+      if (total_bytes_uploaded >= hash_cnt + hash_marker) {
+	Info(2, "#");
+	hash_cnt += hash_marker;
+      }
+    }
+    if (addr < 0x10000)
+      SrecWrite(1, buf + 2, 2 + len);
+    else if (addr < 0x1000000)
+      SrecWrite(2, buf + 1, 3 + len);
+    else
+      SrecWrite(3, buf    , 4 + len);
+    s5count++;
+  }
+  /* number of S1/2/3 records written */
+  buf[0] = (s5count >> 8) & 0xFF;
+  buf[1] = s5count & 0xFF;
+  SrecWrite(5, buf, 2 );
+
+  /* starting address is 0 */
+  buf[0] = 0;
+  buf[1] = 0;
+  buf[2] = 0;
+  buf[3] = 0;
+  if (addr < 0x10000)
+    SrecWrite(9, buf+2, 2 );
+  else if (addr < 0x1000000)
+    SrecWrite(8, buf+1, 3);
+  else
+    SrecWrite(7, buf, 4);
+
+  /* Print transfer statistics */        
+  gettimeofday(&t2, NULL);  
+  timersub(&t2, &t1, &t2);
+  float elapsed = t2.tv_sec + t2.tv_usec*1e-6;
+  ReportStats(elapsed, total_bytes_uploaded);
+}
+
+void
+TMotIntl::Write(const char *filename)
+{
+  if (filename) {
+    fd = fopen(filename, "wb");
+    if (!fd) {
+      throw Error_C(filename);
+    }
+    DownloadMotorola();
+    fclose(fd);
+  } else {
+    fd = stdout;
+    DownloadMotorola();
+  }
+}
+
+TMotIntl::TMotIntl():
+  hash_marker(32){
+}
diff --git a/tools/platforms/mica/uisp/src/MotIntl.h b/tools/platforms/mica/uisp/src/MotIntl.h
new file mode 100644
index 00000000..1783307e
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/MotIntl.h
@@ -0,0 +1,72 @@
+// $Id: MotIntl.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: MotIntl.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* 
+	MotIntl.h
+	
+	Motorola and Intel Uploading/Downloading Routines
+	Uros Platise (c) 1999
+*/
+
+#ifndef __MOTINTL
+#define __MOTINTL
+
+#include <stdio.h>
+#include "Global.h"
+
+#define MI_LINEBUF_SIZE	128
+
+class TMotIntl{
+public:
+  enum TFormatType{TF_MOTOROLA, TF_INTEL};
+
+private:
+  char line_buf [MI_LINEBUF_SIZE];
+  unsigned char cc_sum;
+  unsigned int hash_marker;
+  FILE* fd;
+  bool upload, verify;
+
+  TByte Htoi(const char* p);
+  void InfoOperation(const char* prefix, const char* seg_name);
+  void ReportStats(float, TAddr);
+  void UploadMotorola();
+  void UploadIntel();
+  void SrecWrite(unsigned int, const unsigned char *, unsigned int);
+  void DownloadMotorola();
+
+public:
+  void Read(const char* filename, bool _upload, bool _verify);
+  void Write(const char *filename);
+
+  TMotIntl();
+  ~TMotIntl(){}
+};
+
+extern TMotIntl motintl;
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/SASA.C b/tools/platforms/mica/uisp/src/SASA.C
new file mode 100644
index 00000000..7d9ff20d
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/SASA.C
@@ -0,0 +1,211 @@
+// $Id: SASA.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: SASA.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002, 2003  Sergey Larin
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * Portions Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+
+ ****************************************************************************
+ */
+
+/*
+	SASA.C
+
+	Stargate AVR SSP Access (SASA)
+	
+	Phil Buonadonna (c) 2003
+*/
+
+//#define DEBUG
+//#define DEBUG1
+
+#include "config.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <ctype.h>
+
+
+#include <unistd.h>
+#include <signal.h>
+#include <sys/ioctl.h>
+#include <fcntl.h>
+
+#include "timeradd.h"
+#include "Global.h"
+#include "Error.h"
+#include "SASA.h"
+#include "Avr.h"
+
+
+/* Default value for minimum SCK high/low time in microseconds.  */
+#ifndef SCK_DELAY
+#define SCK_DELAY 5
+#endif
+
+/* Minimum RESET# high time in microseconds.
+   Should be enough to charge a capacitor between RESET# and GND
+   (it is recommended to use a voltage detector with open collector
+   output, and only something like 100 nF for noise immunity).
+   Default value may be changed with -dt_reset=N microseconds.  */
+#ifndef RESET_HIGH_TIME
+#define RESET_HIGH_TIME 1000
+#endif
+
+/* Delay from RESET# low to sending program enable command
+   (the datasheet says it must be at least 20 ms).  Also wait time
+   for crystal oscillator to start after possible power down mode.  */
+#ifndef RESET_LOW_TIME
+#define RESET_LOW_TIME 30000
+#endif
+
+const char TSASA::dev_name[] = "/dev/ssp";
+
+void
+TSASA::SckDelay()
+{
+  Delay_usec(5);
+}
+
+#ifndef MIN_SLEEP_USEC
+#define MIN_SLEEP_USEC 20000
+#endif
+
+void
+TSASA::Delay_usec(long t)
+{
+  struct timeval t1, t2;
+  if (t <= 0)
+    return;  /* very short delay for slow machines */
+  gettimeofday(&t1, NULL);
+  if (t > MIN_SLEEP_USEC)
+    usleep(t - MIN_SLEEP_USEC);
+  /* loop for the remaining time */
+  t2.tv_sec = t / 1000000UL;
+  t2.tv_usec = t % 1000000UL;
+  timeradd(&t1, &t2, &t1);
+  do {
+    gettimeofday(&t2, NULL);
+  } while (timercmp(&t2, &t1, <));
+}
+
+void 
+TSASA::PulseSck()
+{
+
+  PulseReset();
+
+}
+
+void
+TSASA::PulseReset()
+{
+  close(dev_fd);
+
+  Delay_usec(1000);
+
+  dev_fd = open(dev_name, O_RDWR, 0);
+  if (dev_fd == -1) {
+    perror(dev_name);
+    throw Error_Device("Failed to reopen ppdev.");
+  }
+
+}
+
+void
+TSASA::Init()
+{
+  return;
+}
+
+unsigned char
+TSASA::SendRecv(unsigned char b)
+{
+  unsigned char received;
+
+  write(dev_fd,&b,1);
+  read(dev_fd,&received,1);
+
+  return received;
+}
+
+int
+TSASA::Send (unsigned char* queue, int queueSize, int rec_queueSize)
+{
+  unsigned char *p = queue, ch;
+  int i = queueSize;
+  
+  if (rec_queueSize==-1){rec_queueSize = queueSize;}
+#ifdef DEBUG
+  printf ("send(recv): ");
+#endif
+  while (i--){
+#ifdef DEBUG
+    printf ("%02X(", (unsigned int)*p);
+#endif    
+    ch = SendRecv(*p);
+#ifdef DEBUG    
+    printf ("%02X) ", (unsigned int)ch);
+#endif    
+    *p++ = ch;
+  }
+#ifdef DEBUG  
+  printf ("\n");
+#endif  
+  return queueSize;
+}
+
+
+TSASA::TSASA(): 
+  dev_fd(-1)
+{
+
+  /* Drop privileges (if installed setuid root - NOT RECOMMENDED).  */
+  setgid(getgid());
+  setuid(getuid());
+
+  dev_fd = open(dev_name, O_RDWR, 0);
+  if (dev_fd == -1) {
+    perror(dev_name);
+    throw Error_Device("Failed to open the SSP. Is the driver installed?");
+  }
+
+}
+
+TSASA::~TSASA()
+{
+
+  if (dev_fd != -1) {
+    close(dev_fd);
+    dev_fd = -1;
+  } 
+}
+
+
+/* eof */
diff --git a/tools/platforms/mica/uisp/src/SASA.h b/tools/platforms/mica/uisp/src/SASA.h
new file mode 100644
index 00000000..d3b61554
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/SASA.h
@@ -0,0 +1,73 @@
+// $Id: SASA.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: SASA.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * Portions Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ ****************************************************************************
+ */
+
+/*
+  SASA.h
+  
+  Stargate AVR SSP Access
+
+*/
+
+#ifndef __SASA
+#define __SASA
+
+#include <sys/types.h>
+#include <time.h>
+#include <unistd.h>
+#include <string.h>
+#include "Error.h"
+
+class TSASA {
+
+private:
+  int dev_fd;
+  static const char dev_name[];
+
+private:
+  unsigned char SendRecv(unsigned char);
+  /* low level access to parallel port lines */
+  void SckDelay();
+
+public:
+  void PulseSck();
+  void PulseReset();
+  void Init();
+  int Send(unsigned char*, int, int rec_queueSize=-1);
+  void Delay_usec(long);
+
+  TSASA();
+  ~TSASA();
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/Serial.C b/tools/platforms/mica/uisp/src/Serial.C
new file mode 100644
index 00000000..a1983d3c
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Serial.C
@@ -0,0 +1,267 @@
+// $Id: Serial.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: Serial.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	Serial.C
+	
+	Serial Interface
+	Uros Platise, (c) 1997-1999
+*/
+
+#include "config.h"
+
+#include <sys/time.h>
+#include <sys/ioctl.h>
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <netinet/in.h>
+#include <netinet/tcp.h>
+#include <netdb.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <ctype.h>
+#include <errno.h>
+#include "Global.h"
+#include "Serial.h"
+
+int TSerial::Tx(unsigned char* queue, int queue_size)
+{
+  Info(4, "Transmit: { ");
+  for (int n=0; n<queue_size; n++) {
+    Info(4, "%c [%02x] ", isprint(queue[n])?(char) queue[n]:'.', queue[n]);
+  }
+  Info(4, "}\n");
+  int ok = write(serline, queue, queue_size);
+  tcdrain(serline);
+  return ok;
+}
+
+int TSerial::Rx(unsigned char* queue, int queue_size, timeval* timeout){
+  int ret;
+  fd_set rfds;
+  FD_ZERO(&rfds); FD_SET(serline,&rfds);
+
+  int tries = 5;
+  while (1) {
+    if ((ret=select(serline+1, &rfds, NULL, NULL, timeout))==-1) {
+      Info(3, "Select on %d returned retval:%d errno:%d\n",
+           serline, ret, errno);
+      if ((errno == EINTR) && tries) {
+        tries--;
+        continue;
+      }
+      throw Error_C("Select failed");
+    }
+
+    // Success.
+    break;
+  }
+
+  if (ret==0)
+    throw Error_Device("Programmer is not responding.",GetCmdParam("-dhost"));
+  int size = read(serline, queue, queue_size);  
+  Info(4, "Receive: { ");
+  for (int n=0; n<size; n++) {
+    Info(4, "%c [%02x] ", isprint(queue[n])?(char)queue[n]:'.', queue[n]);
+  }
+  Info(4, "}\n");
+  return size;
+}
+
+int TSerial::Send(unsigned char* queue, int queue_size, int rec_queue_size,
+		  int timeout)
+{
+  Tx(queue, queue_size);
+  struct timeval time_out;
+  time_out.tv_sec = timeout;
+  time_out.tv_usec = 0;
+  if (rec_queue_size==-1){rec_queue_size = queue_size;}
+  int total_len=0;  
+  while(total_len<rec_queue_size){
+    total_len += Rx(&queue[total_len], rec_queue_size - total_len, &time_out);
+  }
+  return total_len;
+}
+
+//xmit a buffer only, empty the rcv buffer
+//for MIB510 only. May have bad chars in uart rcv bfr from mote.
+//need to flush them.
+void TSerial::SendOnly(unsigned char* queue, int queue_size)
+{
+  Tx(queue, queue_size);
+  if (!remote) {
+    // Make sure sequence goes out, then flush input
+    tcdrain(serline);
+    tcflush(serline, TCIFLUSH); // Not strictly necessary, but I
+				// think it will make cygwin happier
+    usleep(10000);		// Should be more than enough (response
+				// is 2 bytes at 115200 baud)
+    tcflush(serline, TCIFLUSH);
+  }
+}
+
+/* Constructor/Destructor
+*/
+
+TSerial::TSerial(){
+  /* Parse Command Line Parameters */
+  if (GetCmdParam("-dhost")) {
+    remote = true;
+    OpenTcp();
+  }
+  else {
+    remote = false;
+    OpenPort();
+  }
+}
+
+void TSerial::OpenTcp() {
+  /* Parse Command Line Parameters */
+  struct sockaddr_in serv_addr;
+  struct hostent *server;
+  short  sPort = 10001;
+
+  if ((server = gethostbyname(GetCmdParam("-dhost"))) == NULL) {
+    throw Error_Device("Error resolving server name.");
+  }
+
+  if ((serline = socket(AF_INET,SOCK_STREAM,0)) < 0) {
+    throw Error_C("Could not create socket.");
+  }
+    
+  int flag = 1;
+  if ((setsockopt(serline,IPPROTO_TCP,TCP_NODELAY,(char *)&flag,sizeof(int))) < 0 ){
+    throw Error_Device("Error setting TCP_NODELAY.");
+  }
+
+  memset ((void *)&serv_addr,0,sizeof(serv_addr));
+  serv_addr.sin_family = AF_INET;
+    
+  memcpy((void *)&serv_addr.sin_addr.s_addr,(void *)server->h_addr,server->h_length);
+
+  const char* val;
+  if ((val = GetCmdParam("-dport"))) {
+    sPort = (short) atoi(val);
+  }
+  serv_addr.sin_port = htons(sPort);
+
+  if (connect(serline,(sockaddr *)&serv_addr,sizeof(serv_addr)) < 0) {
+    throw Error_Device("Error connecting to server.",GetCmdParam("-dhost"));
+  }
+
+  remote = true;
+}
+
+void TSerial::OpenPort() { 
+  struct termios pmode;
+  const char* dev_name = "/dev/avr";
+  const char* val;
+  speed_t speed = B19200;	/* default speed */
+  
+  struct TSpeed{
+    const char* arg;
+    speed_t speed;
+  };
+  const TSpeed speed_array[] = {
+    {"1200", B1200},
+    {"2400", B2400},
+    {"4800", B4800},
+    {"9600", B9600},
+    {"19200", B19200},
+    {"38400", B38400},
+    {"57600", B57600},
+    {"115200", B115200},
+    {"", 0}
+  };
+  
+ /* Open port and set serial attributes */
+  if (strcmp(GetCmdParam("-dprog"), "stk500") == 0 ||
+      strcmp(GetCmdParam("-dprog"), "mib510") == 0) {
+    speed = B115200;        /* default STK500 speed */
+  }
+
+  if ((val=GetCmdParam("-dserial"))){dev_name = val;}
+  if ((val=GetCmdParam("-dspeed"))){
+    const TSpeed* speed_item = speed_array;
+    for (;speed_item->arg[0] != 0; speed_item++){
+      if (strcmp(speed_item->arg, val) == 0) {
+	speed = speed_item->speed;
+	break;
+      }
+    } 
+    if (speed_item->arg[0]==0){throw Error_Device("-dspeed: Invalid speed.");}
+  }
+
+  // COMn and cygwin don't interact well. Use /dev/ttyS<n-1> instead
+  if (strlen(dev_name) == 4 && strncasecmp(dev_name, "com", 3) == 0 &&
+      isdigit(dev_name[3]))
+    {
+      char *new_name = new char[11];
+      sprintf(new_name, "/dev/ttyS%c", dev_name[3] - 1);
+
+      Info(0, "Please use %s rather than %s (the latter often doesn't work)\n",
+	   new_name, dev_name);
+      dev_name = new_name;
+    }
+  
+  if ((serline = open(dev_name, O_RDWR | O_NOCTTY | O_NONBLOCK)) < 0) {
+    throw Error_C(dev_name);
+  }  
+  tcgetattr(serline, &pmode);
+  saved_modes = pmode;
+
+  memset(&pmode, 0, sizeof(pmode));
+  /* VMIN, VTIME=0 is fine as we use select in Rx anyway */
+  pmode.c_cflag = CS8 | CLOCAL | CREAD;
+  pmode.c_iflag = IGNPAR | IGNBRK;
+  cfsetispeed(&pmode, speed);
+  cfsetospeed(&pmode, speed);
+  tcsetattr(serline, TCSANOW, &pmode);
+
+#if 0
+  /* Reopen port */
+  int fd = serline;
+  if ((serline = open(dev_name, O_RDWR | O_NOCTTY)) < 0){throw Error_C();}
+  close(fd);
+#else
+  /* Clear O_NONBLOCK flag.  */
+  int flags = fcntl(serline, F_GETFL, 0);
+  if (flags == -1) { throw Error_C("Can not get flags"); }
+  flags &= ~O_NONBLOCK;
+  if (fcntl(serline, F_SETFL, flags) == -1) {
+    throw Error_C("Can not clear nonblock flag");
+  }
+#endif
+}
+
+TSerial::~TSerial(){
+  if (!remote)
+    tcsetattr(serline, TCSADRAIN, &saved_modes);
+  close(serline);
+}
diff --git a/tools/platforms/mica/uisp/src/Serial.h b/tools/platforms/mica/uisp/src/Serial.h
new file mode 100644
index 00000000..d01a93f5
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Serial.h
@@ -0,0 +1,69 @@
+// $Id: Serial.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: Serial.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	Serial.h  
+	RS232 Serial Interface for the standard Atmel Programmer
+	Uros Platise(c) copyright 1997-1999
+*/
+
+#ifndef __Serial
+#define __Serial
+
+#include <sys/types.h>
+#if defined(__CYGWIN__)
+#include "cygwinp.h"
+#endif
+#include <time.h>
+#include <unistd.h>
+#include <termios.h>
+#include <string.h>
+#include "Global.h"
+#include "Error.h"
+
+class TSerial{
+private:
+  int serline;
+  bool remote;
+  struct termios saved_modes;
+  
+protected:
+  int Tx(unsigned char* queue, int queue_size);
+  int Rx(unsigned char* queue, int queue_size, timeval* timeout);
+  void OpenPort();
+  void OpenTcp();
+
+public:
+  int Send(unsigned char* queue, int queue_size, int rec_queue_size=-1,
+	   int timeout = 4);
+  void  SendOnly(unsigned char* queue, int queue_size);
+
+  TSerial();
+  ~TSerial();
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/Stk500.C b/tools/platforms/mica/uisp/src/Stk500.C
new file mode 100644
index 00000000..295dc7ad
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Stk500.C
@@ -0,0 +1,959 @@
+// $Id: Stk500.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: Stk500.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 2001, 2002, 2003  Daniel Berntsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* Stk500.C, Daniel Berntsson, 2001 */
+
+#include <stdlib.h>
+
+#include "config.h"
+
+#include "Stk500.h"
+#include "Serial.h"
+
+const TByte TStk500::pSTK500[] = { 0x30, 0x20 };
+const TByte TStk500::pSTK500_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::SWminor[] = { 0x41, 0x82, 0x20 };
+const TByte TStk500::SWminor_Reply[] = { 0x14, 0x07, 0x10 };
+
+const TByte TStk500::SWmajor[] = { 0x41, 0x81, 0x20 };
+const TByte TStk500::SWmajor_Reply[] = {0x14, 0x01, 0x10 };
+
+//XBOW MIC510 cmd to enter cmd MIB510 to take control of RS232 lines
+const TByte TStk500::IspMode[] = {0xaa, 0x55, 0x55, 0xaa, 0x17, 0x51, 0x31, 0x13,  '?' };
+const TByte TStk500::IspMode_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::EnterPgmMode[] = { 0x50, 0x20 };
+const TByte TStk500::EnterPgmMode_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::LeavePgmMode[] = { 0x51, 0x20 };
+const TByte TStk500::LeavePgmMode_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::SetAddress[] = { 0x55, '?', '?', 0x20 };
+const TByte TStk500::SetAddress_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::EraseDevice[] = { 0x52, 0x20 };
+const TByte TStk500::EraseDevice_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::WriteMemory[] = { 0x64, '?', '?', '?' };
+const TByte TStk500::WriteMemory_Reply[] = { 0x14, 0x10 };
+
+const TByte TStk500::ReadMemory[] = { 0x74, 0x01, 0x00, '?', 0x20 };
+const TByte TStk500::ReadMemory_Reply[] = { 0x14 };
+
+const TByte TStk500::GetSignature[] = {0x75, 0x20};
+const TByte TStk500::GetSignature_Reply[] = {0x75, '?', '?', '?', 0x20};
+
+const TByte TStk500::CmdStopByte[] = { 0x20 };
+
+const TByte TStk500::ReplyStopByte[] = { 0x10 };
+
+const TByte TStk500::Flash = 'F';
+
+const TByte TStk500::EEPROM = 'E';
+
+const TByte TStk500::DeviceParam_Reply[] = { 0x14, 0x10 };
+const TByte TStk500::ExtDevParams_Reply[] = { 0x14, 0x10 };
+
+/* FIXME: troth/2002-10-02: Get rid of all these magic numbers now that we
+   know what they mean. (See REAME.stk500) */
+
+TStk500::SPrgPart TStk500::prg_part[] = {
+  {"AT90S4414",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x50, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0x7f, 0x7f, 0x80,
+    0x7f, {0x00, 0x00}, {0x01, 0x00}, {0x00, 0x00, 0x10, 0x00}, 0x20}
+  },
+  {"AT90S2313",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x40, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0x7f, 0x7f, 0x80,
+    0x7f, {0x00, 0x00}, {0x00, 0x80}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"AT90S1200",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x33, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x00, 0x40}, {0x00, 0x00, 0x04, 0x00}, 0x20}
+  },
+  {"AT90S2323",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x41, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x00, 0x80}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"AT90S2343",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x43, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x00, 0x80}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"AT90S2333",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x42, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x00, 0x80}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"AT90S4433",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x51, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x01, 0x00}, {0x00, 0x00, 0x10, 0x00}, 0x20}
+  },
+  {"AT90S4434",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x52, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x01, 0x00}, {0x00, 0x00, 0x10, 0x00}, 0x20}
+  },
+  {"AT90S8515",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x60, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0x7f, 0x7f, 0x80,
+    0x7f, {0x00, 0x00}, {0x02, 0x00}, {0x00, 0x00, 0x20, 0x00}, 0x20}
+  },
+  {"AT90S8535",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x61, 0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x02, 0x00}, {0x00, 0x00, 0x20, 0x00}, 0x20}
+  },
+  {"AT90S8534", /* NOTE (20030216): experimental and untested */
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x62, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x02, 0x00}, {0x00, 0x00, 0x20, 0x00}, 0x20}
+  },
+  {"ATmega8515",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x63, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x40}, {0x02, 0x00}, {0x00, 0x00, 0x20, 0x00}, 0x20}
+  },
+  {"ATmega8535",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x64, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x40}, {0x02, 0x00}, {0x00, 0x00, 0x20, 0x00}, 0x20}
+  },
+  {"ATtiny11",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00,
+    0x00, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00, 0x04, 0x00}, 0x20}
+  },
+  {"ATtiny12",
+   {0x00, 0xD7, 0xA0, 0x01},
+   {0x42, 0x12, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x00}, {0x00, 0x40}, {0x00, 0x00, 0x04, 0x00}, 0x20}
+  },
+  {"ATtiny15",
+   {0x00, 0xD7, 0xA0, 0x01},
+   {0x42, 0x13, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x00}, {0x00, 0x40}, {0x00, 0x00, 0x04, 0x00}, 0x20}
+  },
+  {"ATtiny22",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x20, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x01, 0xff, 0xff, 0x00,
+    0xff, {0x00, 0x00}, {0x00, 0x80}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"ATtiny26",
+   {0x04, 0xD7, 0xA0, 0x01},
+   {0x42, 0x21, 0x01, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x20}, {0x00, 0x80}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"ATtiny28",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x22, 0x00, 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00,
+    0x00, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00, 0x08, 0x00}, 0x20}
+  },
+  {"ATmega8",
+   {0x04, 0xD7, 0xA0, 0x01},
+   {0x42, 0x70, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x40}, {0x02, 0x00}, {0x00, 0x00, 0x20, 0x00}, 0x20}
+  },
+  {"ATmega323",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x90, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x04, 0x00}, {0x00, 0x00, 0x80, 0x00}, 0x20}
+  },
+  {"ATmega32",
+   {0x04, 0xD7, 0xA0, 0x00},
+   {0x42, 0x91, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x04, 0x00}, {0x00, 0x00, 0x80, 0x00}, 0x20}
+  },
+  // FIXME: add mega64
+  {"ATmega161",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x80, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x02, 0x00}, {0x00, 0x00, 0x40, 0x00}, 0x20}
+  },
+  {"ATmega163",
+   {0x00, 0xD7, 0xA0, 0x00},
+   {0x42, 0x81, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x02, 0x00}, {0x00, 0x00, 0x40, 0x00}, 0x20}
+  },
+  {"ATmega16",
+   {0x04, 0xD7, 0xA0, 0x00},
+   {0x42, 0x82, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x02, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x02, 0x00}, {0x00, 0x00, 0x40, 0x00}, 0x20}
+  },
+  {"ATmega162",
+   {0x04, 0xD7, 0xA0, 0x00},
+   {0x42, 0x83, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x03, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x02, 0x00}, {0x00, 0x00, 0x40, 0x00}, 0x20}
+  },
+  {"ATmega169",
+   {0x04, 0xD7, 0xA0, 0x01},
+   {0x42, 0x84, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x03, 0xff, 0xff, 0xff,
+    0xff, {0x00, 0x80}, {0x02, 0x00}, {0x00, 0x00, 0x40, 0x00}, 0x20}
+  },
+  {"ATmega103",
+   {0x00, 0xA0, 0xD7, 0x00},
+   {0x42, 0xb1, 0x00, 0x00, 0x01, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00,
+    0x00, {0x01, 0x00}, {0x10, 0x00}, {0x00, 0x02, 0x00, 0x00}, 0x20}
+  },
+  {"ATmega128",
+   {0x08, 0xD7, 0xA0, 0x00},
+   {0x42, 0xb2, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x03, 0xff, 0xff, 0xff,
+    0xff, {0x01, 0x00}, {0x10, 0x00}, {0x00, 0x02, 0x00, 0x00}, 0x20}
+  },
+  // FIXME: add at86rf401, at89s51, at89s52
+  {"", {0,0,0,0},{0,0,0,0, 0,0,0,0, 0,0,0,0, 0, {0}, {0}, {0}, 0}}
+};
+
+/* Get a stk500 parameter value */
+
+TByte
+TStk500::ReadParam(TByte param)
+{
+  TByte buf[0x80];
+
+  TByte rd_param[] = { 0x41, param, 0x20 };
+  TByte rd_param_reply[] = { 0x14, '?', 0x10 };
+
+  memcpy(buf, rd_param, sizeof(rd_param));
+  Send(buf, sizeof(rd_param), sizeof(rd_param_reply));
+
+  if ((buf[0] != rd_param_reply[0]) || (buf[2] != rd_param_reply[2]))
+  {
+      throw Error_Device ("Failed to read parameter", pNodename);
+  }
+
+  return buf[1];
+}
+
+/* Set a stk500 parameter value */
+
+void
+TStk500::WriteParam(TByte param, TByte val)
+{
+  TByte buf[0x80];
+
+  TByte wr_param[] = { 0x40, param, val, 0x20 };
+  TByte wr_param_reply[] = { 0x14, 0x10 };
+
+  memcpy(buf, wr_param, sizeof(wr_param));
+  Send(buf, sizeof(wr_param), sizeof(wr_param_reply));
+
+  if (memcmp(buf, wr_param_reply, sizeof(wr_param_reply)) != 0)
+  {
+      throw Error_Device ("Failed to write parameter", pNodename);
+  }
+}
+
+/* Read byte from active segment at address addr. */
+TByte TStk500::ReadByte(TAddr addr)
+{
+  TByte val = 0xff;
+
+  if (segment == SEG_FUSE)
+  {
+    switch (addr) 
+    {
+      case AVR_FUSE_LOW_ADDR:
+        if (TestFeatures(AVR_FUSE_RD))
+          val = ReadFuseLowBits();
+        else
+          Info (1, "Cannot read low fuse bits on this device. "
+                "Returning 0xff\n");
+        break;
+
+      case AVR_FUSE_HIGH_ADDR:
+        if (TestFeatures(AVR_FUSE_HIGH))
+          val = ReadFuseHighBits();
+        else
+          Info (1, "Cannot read high fuse bits on this device. "
+                "Returning 0xff\n");
+        break;
+
+      case AVR_CAL_ADDR:
+        if (TestFeatures(AVR_CAL_RD))
+          val = ReadCalFuseBits(0);
+        else
+          Info (1, "Cannot read calibration byte on this device. "
+                "Returning 0xff\n");
+        break;
+
+      case AVR_LOCK_ADDR:
+        val = ReadLockBits();
+        break;
+
+      case AVR_FUSE_EXT_ADDR:
+        if (TestFeatures(AVR_FUSE_EXT))
+          val = ReadFuseExtBits();
+        else
+          Info (1, "Cannot read extended fuse bits on this device. "
+                "Returning 0xff\n");
+        break;
+    }
+  }
+  else
+  {
+    /* FIXME: TRoth/2002-05-29: This is still broken. If flash or eeprom
+       changes after the calling ReadMem(), you won't ever see the change. */
+
+    // Xbow: the original STK500 version reads all 128K of Atmega memory
+    // before checking. This takes ~15sec on the mib510. This version reads
+    // a 256 byte page. If a new 256 byte page is needed then it retreives
+    // it from the mib510
+
+    if (read_buffer[segment] == NULL) {
+      page =  addr >> 8;                                  //page number
+      read_buffer[segment] = new TByte[GetSegmentSize()]; //create buffer for data
+      ReadMemPage(addr & 0xfff00);                        //read the page
+    }
+    int new_page = addr >> 8;
+    if (new_page != page){
+      page = new_page;
+      ReadMemPage(addr & 0xfff00);
+    }   
+    val = read_buffer[segment][addr];
+  }
+  return val;
+}
+
+/* Write byte to active segment */
+void TStk500::WriteByte(TAddr addr, TByte byte, bool flush_buffer)
+{
+  if (segment == SEG_FUSE)
+  {
+    switch (addr) 
+    {
+      case AVR_FUSE_LOW_ADDR:
+        if (TestFeatures(AVR_FUSE_RD))
+          WriteFuseLowBits(byte);
+        else
+          Info (1, "Cannot write low fuse bits on this device.\n");
+        break;
+
+      case AVR_FUSE_HIGH_ADDR:
+        if (TestFeatures(AVR_FUSE_HIGH))
+          WriteFuseHighBits(byte);
+        else
+          Info (1, "Cannot write high fuse bits on this device.\n");
+        break;
+
+      case AVR_CAL_ADDR:
+        /* Calibration byte is always readonly. */
+        break;
+
+      case AVR_LOCK_ADDR:
+        WriteLockBits(byte);
+        break;
+
+      case AVR_FUSE_EXT_ADDR:
+        if (TestFeatures(AVR_FUSE_EXT))
+          WriteFuseExtBits(byte);
+        else
+          Info (1, "Cannot read extended fuse bits on this device.\n");
+        break;
+    }
+  }
+  else
+  {
+    if (write_buffer[segment] == NULL) {
+      write_buffer[segment] = new TByte[GetSegmentSize()];
+      minaddr = GetSegmentSize();
+      memset(write_buffer[segment], 0xff, GetSegmentSize());
+    }
+
+    if (addr > maxaddr)
+      maxaddr = addr;
+
+    if (addr < minaddr)
+      minaddr = addr;
+
+    write_buffer[segment][addr] = byte;
+
+    if (flush_buffer) {
+      FlushWriteBuffer();
+    }
+  }
+}
+
+
+void TStk500::FlushWriteBuffer(){
+  TByte buf[0x200];
+  int wordsize;
+  TAddr addr;
+  TByte seg;
+  const TByte *pgsz;
+  int pagesize;
+
+  if (segment == SEG_FLASH) {
+    wordsize = 2;
+    seg = Flash;
+  } else {
+    wordsize = 1;
+    seg = EEPROM;
+  }
+
+  pgsz = prg_part[desired_part].params.pagesize;
+  pagesize = (pgsz[0]) << 8 + pgsz[1];
+
+  if (pagesize == 0) {
+    pagesize = 128;
+  }
+
+  EnterProgrammingMode();
+
+  addr = 0;
+  for (unsigned int addr=minaddr; addr<maxaddr; addr+=pagesize) {
+    memcpy(buf, SetAddress, sizeof(SetAddress));
+    buf[1] = (addr/wordsize) & 0xff;
+    buf[2] = ((addr/wordsize) >> 8) & 0xff;
+    Send(buf, sizeof(SetAddress), sizeof(SetAddress_Reply));
+    if (memcmp(buf, SetAddress_Reply, sizeof(SetAddress_Reply)) != 0) {
+      throw Error_Device ("[FWB 1] Device is not responding correctly.", pNodename); }
+
+    memcpy(buf, WriteMemory, sizeof(WriteMemory));
+    buf[1] = pagesize >> 8;
+    buf[2] = pagesize & 0xff;
+    buf[3] = seg;
+    memcpy(buf+sizeof(WriteMemory), write_buffer[segment]+addr, pagesize);
+    memcpy(buf+sizeof(WriteMemory)+pagesize,
+       CmdStopByte, sizeof(CmdStopByte));
+    Send(buf, sizeof(WriteMemory)+pagesize+sizeof(CmdStopByte),
+     sizeof(WriteMemory_Reply));
+    if (memcmp(buf, WriteMemory_Reply, sizeof(WriteMemory_Reply)) != 0) {
+      throw Error_Device ("[FWB 2] Device is not responding correctly.", pNodename); }
+  }   
+  LeaveProgrammingMode();
+}
+
+
+/* Chip Erase */
+void TStk500::ChipErase(){
+  TByte buf[100];
+
+  EnterProgrammingMode();
+
+  memcpy(buf, EraseDevice, sizeof(EraseDevice));
+  Send(buf, sizeof(EraseDevice), sizeof(EraseDevice_Reply));
+  if (memcmp(buf, EraseDevice_Reply, sizeof(EraseDevice_Reply)) != 0) {
+    throw Error_Device ("[CE] Device is not responding correctly.",  pNodename); }
+
+  LeaveProgrammingMode();
+}
+
+
+TByte TStk500::ReadLockFuseBits()
+{
+  TByte cmd[] = { 0x58, 0x00, 0x00, 0x00 };
+
+  return UniversalCmd(cmd);
+}
+
+
+/* ReadLockBits tries to return the lock bits in a uniform order, despite the
+   differences in different AVR versions.  The goal is to get the lock bits
+   into this order:
+       x x BLB12 BLB11 BLB02 BLB01 LB2 LB1
+   For devices that don't support a boot block, the BLB bits will be 1. */
+
+TByte TStk500::ReadLockBits()
+{
+  TByte rbits = 0xFF;
+  if (TestFeatures(AVR_LOCK_BOOT)) {
+    /* x x BLB12 BLB11 BLB02 BLB01 LB2 LB1 */
+    rbits = ReadLockFuseBits();
+  } else if (TestFeatures(AVR_LOCK_RD76)) {
+    rbits = ReadLockFuseBits();
+    /* LB1 LB2 x x x x x x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 7) & 1) | ((rbits >> 5) & 1) | 0xFC;
+  } else if (TestFeatures(AVR_LOCK_RD12)) {
+    rbits = ReadLockFuseBits();
+    /* x x x x x LB2 LB1 x -> 1 1 1 1 1 1 LB2 LB1 */
+    rbits = ((rbits >> 1) & 3) | 0xFC;
+  } else {
+    /* if its signature returns 0,1,2 then say it's locked. */
+    EnterProgrammingMode();
+    ReadSignature();
+    LeaveProgrammingMode();
+    if (vendor_code == 0 &&
+        part_family == 1 &&
+        part_number == 2)
+    {
+      rbits = 0xFC;
+    }
+    else
+    {
+      throw Error_Device ("ReadLockBits failed: are you sure this device "
+                          "has lock bits?", pNodename);
+    }
+  }
+  return rbits;
+}
+
+
+TByte TStk500::ReadCalFuseBits(int addr)
+{
+  TByte cmd[] = { 0xc8, 0x00, addr, 0x00 };
+
+  return UniversalCmd(cmd);
+}
+
+
+TByte TStk500::ReadFuseLowBits()
+{
+  TByte cmd[] = { 0x50, 0x00, 0x00, 0x00 };
+
+  return UniversalCmd(cmd);
+}
+
+
+TByte TStk500::ReadFuseHighBits()
+{
+  TByte cmd[] = { 0x58, 0x08, 0x00, 0x00 };
+
+  return UniversalCmd(cmd);
+}
+
+
+TByte TStk500::ReadFuseExtBits()
+{
+  TByte cmd[] = { 0x50, 0x08, 0x00, 0x00 };
+
+  return UniversalCmd(cmd);
+}
+
+
+void TStk500::WriteLockFuseBits(TByte bits)
+{
+  TByte cmd[] = { 0xac, 0xff, 0xff, bits };
+
+  UniversalCmd(cmd);
+}
+
+
+void TStk500::WriteFuseLowBits(TByte bits)
+{
+  TByte cmd[] = { 0xac, 0xa0, 0xff, bits };
+
+  UniversalCmd(cmd);
+}
+
+
+void TStk500::WriteFuseHighBits(TByte bits)
+{
+  TByte cmd[] = { 0xac, 0xa8, 0xff, bits };
+
+  UniversalCmd(cmd);
+}
+
+
+void TStk500::WriteFuseExtBits(TByte bits)
+{
+  TByte cmd[] = { 0xac, 0xa4, 0xff, bits };
+
+  UniversalCmd(cmd);
+}
+
+
+/*
+   0 = program (clear bit), 1 = leave unchanged
+   bit 0 = LB1
+   bit 1 = LB2
+   bit 2 = BLB01
+   bit 3 = BLB02
+   bit 4 = BLB11
+   bit 5 = BLB12
+   bit 6 = 1 (reserved)
+   bit 7 = 1 (reserved)
+ */
+void TStk500::WriteLockBits(TByte bits)
+{
+  TByte wbits;
+  if (TestFeatures(AVR_LOCK_BOOT))
+  {
+    /* x x BLB12 BLB11 BLB02 BLB01 LB2 LB1 */
+    wbits = bits;
+  }
+  else if (TestFeatures(AVR_LOCK_RD76))
+  {
+    /* x x x x x x LB2 LB1 -> LB1 LB2 1 1 1 1 1 1 */
+    wbits = ((bits << 7) & 0x80) | ((bits << 5) & 0x40) | 0x3f;
+  }
+  else if (TestFeatures(AVR_LOCK_RD12))
+  {
+    /* x x x x x x LB2 LB1 -> 1 1 1 1 1 LB2 LB1 1 */
+    wbits = ((bits << 1) & 0x06) | 0xF9;
+  }
+  else
+  {
+    Info (0, "WriteLockBits failed: are you sure this device has lock bits?");
+    return;
+  }
+  WriteLockFuseBits(wbits);
+}
+
+void TStk500::Initialize()
+{
+  TByte buf[100];
+  TByte vmajor;
+  TByte vminor;
+
+  TByte num_ext_parms = 3;
+  bool bMIB510 = false;
+
+  //----------------- XBOW mod for MIB510, cmd MIB510 to control RS232 lines----
+  if (bMIB510 = strcmp(GetCmdParam("-dprog"), "mib510") == 0) {
+    int itry= 5;      //try 5 times
+    while (itry > 0){
+      itry--;
+      memcpy(buf, IspMode, sizeof(IspMode));
+      buf[8] =  1;
+      SendOnly(buf, sizeof(IspMode));
+      try {
+	Send(buf, sizeof(IspMode), sizeof(IspMode_Reply), 1);
+	if (memcmp(buf, IspMode_Reply, sizeof(IspMode_Reply)) == 0) itry = 0;
+      }
+      catch (Error_Device e) {
+      }
+    }
+
+    memcpy(buf, IspMode, sizeof(IspMode));
+    buf[8] =  1;
+    Send(buf, sizeof(IspMode), sizeof(IspMode_Reply));
+    if (memcmp(buf, IspMode_Reply, sizeof(IspMode_Reply)) != 0) {
+      throw Error_Device ("Device is not responding correctly.",pNodename); }
+  }
+//-----------------------------------------------------------------------------
+
+  memcpy(buf, pSTK500, sizeof(pSTK500));
+  Send(buf, sizeof(pSTK500), sizeof(pSTK500_Reply));
+  if (memcmp(buf, pSTK500_Reply, sizeof(pSTK500_Reply)) != 0) {
+    throw Error_Device ("[VP 1] Device is not responding correctly.", pNodename); }
+
+  memcpy(buf, &prg_part[desired_part].params,
+     sizeof(prg_part[desired_part].params));
+
+  Send(buf, sizeof(prg_part[desired_part].params),
+       sizeof(DeviceParam_Reply));
+  if (memcmp(buf, DeviceParam_Reply, sizeof(DeviceParam_Reply)) != 0) {
+    throw Error_Device ("[VP 2] Device is not responding correctly.", pNodename); }
+  
+
+  memcpy(buf, SWminor, sizeof(SWminor));
+  Send(buf, sizeof(SWminor), sizeof(SWminor_Reply));
+  vminor = buf[1];
+
+  memcpy(buf, SWmajor, sizeof(SWmajor));
+  Send(buf, sizeof(SWmajor), sizeof(SWmajor_Reply));
+  vmajor = buf[1];
+  
+  if (bMIB510){
+    printf ("Firmware Version: %c.%c\n", vmajor, vminor);
+    return;
+  }
+
+  printf ("Firmware Version: %d.%d\n", vmajor, vminor);
+
+#if 0
+  if (! ((vmajor == 1 && vminor >= 7) || (vmajor > 1)))
+    throw Error_Device ("Need STK500 firmware version 1.7 or newer.", pNodename);
+#endif
+
+  if ((vmajor == 1 && vminor >= 14) || (vmajor > 1))
+      num_ext_parms = 4;
+
+  buf[0] = 0x45;
+  buf[1] = num_ext_parms;
+  memcpy(buf+2, &prg_part[desired_part].ext_params, num_ext_parms);
+  buf[num_ext_parms+2] = 0x20;
+  Send(buf, num_ext_parms+3, sizeof(ExtDevParams_Reply));
+  if (memcmp(buf, ExtDevParams_Reply, sizeof(ExtDevParams_Reply)) != 0) {
+    throw Error_Device ("[VP 3] Device is not responding correctly.", pNodename); }
+}
+
+void TStk500::Cleanup() {
+  TByte buf[100];
+
+  //----------------- XBOW mod for MIB510, cmd MIB510 to release RS232 lines
+  if (strcmp(GetCmdParam("-dprog"), "mib510") == 0)  {
+    memcpy(buf, IspMode, sizeof(IspMode));
+    buf[8] =  0;
+    Send(buf, sizeof(IspMode), sizeof(IspMode_Reply));
+    if (memcmp(buf, IspMode_Reply, sizeof(IspMode_Reply)) != 0) {
+      throw Error_Device ("Device is not responding correctly.",pNodename); }
+  }
+}
+
+void TStk500::EnterProgrammingMode() {
+  TByte buf[100];
+
+  memcpy(buf, EnterPgmMode, sizeof(EnterPgmMode));
+  Send(buf, sizeof(EnterPgmMode), sizeof(EnterPgmMode_Reply));
+  if (memcmp(buf, EnterPgmMode_Reply, sizeof(EnterPgmMode_Reply)) != 0) {
+    throw Error_Device ("Failed to enter programming mode.", pNodename); }
+}
+
+
+void TStk500::LeaveProgrammingMode() {
+  TByte buf[100];
+
+  memcpy(buf, LeavePgmMode, sizeof(LeavePgmMode));
+  Send(buf, sizeof(LeavePgmMode), sizeof(LeavePgmMode_Reply));
+  if (memcmp(buf, LeavePgmMode_Reply, sizeof(LeavePgmMode_Reply)) != 0) {
+    throw Error_Device ("[LPM] Device is not responding correctly.", pNodename); }
+}
+
+
+/* TRoth/2002-05-28: A Universal Command seems to be just the 4 bytes of an
+   SPI command. I'm basing this on my interpretation of the doc/README.stk500
+   and Table 129 of the mega128 datasheet (page 300). */
+
+TByte TStk500::UniversalCmd(TByte cmd[])
+{
+  TByte buf[6] = { 0x56, 0x00, 0x00, 0x00, 0x00, 0x20 };
+
+  memcpy(buf+1, cmd, 4);
+
+  EnterProgrammingMode();
+
+  /* Expected response is { 0x14, <output>, 0x10 } */
+  Send(buf, sizeof(buf), 3);
+
+  LeaveProgrammingMode();
+
+  if ((buf[0] != 0x14) || (buf[2] != 0x10))
+  {
+    throw Error_Device ("[UC] Device is not responding correctly.", pNodename);
+  }
+
+  return buf[1];
+}
+
+
+void TStk500::ReadSignature() {
+  TByte buf[100];
+
+  memcpy(buf, GetSignature, sizeof(GetSignature));
+  Send(buf, sizeof(GetSignature), sizeof(GetSignature_Reply));
+  
+  vendor_code = buf[1];
+  part_family = buf[2];
+  part_number = buf[3];
+}
+
+//mib510: read 256 bytes of flash memory starting at addr
+void TStk500::ReadMemPage(TAddr  addr){
+  TByte buf[0x200];
+  int wordsize;
+  TByte seg;
+
+  if (segment == SEG_FLASH) {
+    wordsize = 2;
+    seg = Flash;
+  } else if (segment == SEG_EEPROM) {
+    wordsize = 1;
+    seg = EEPROM;
+  } else {
+    throw Error_Device ("TStk500::ReadMemPage() called for invalid segment.",pNodename);
+  }
+
+  EnterProgrammingMode();
+ 
+  memcpy(buf, SetAddress, sizeof(SetAddress));
+  buf[1] = (addr/wordsize) & 0xff;
+  buf[2] = ((addr/wordsize) >> 8) & 0xff;
+  Send(buf, sizeof(SetAddress), sizeof(SetAddress_Reply));
+  if (memcmp(buf, SetAddress_Reply, sizeof(SetAddress_Reply)) != 0) {
+      throw Error_Device ("Device is not responding correctly.",pNodename); }
+   
+  memcpy(buf, ReadMemory, sizeof(ReadMemory));
+  buf[3] = seg;
+  Send(buf, sizeof(ReadMemory), 2+0x100);
+
+  memcpy(read_buffer[segment]+addr, buf+1, 0x100);
+  
+
+  LeaveProgrammingMode();
+}
+void TStk500::ReadMem(){
+  TByte buf[0x200];
+  int wordsize;
+  TAddr addr;
+  TByte seg;
+
+  if (segment == SEG_FLASH) {
+    wordsize = 2;
+    seg = Flash;
+  } else if (segment == SEG_EEPROM) {
+    wordsize = 1;
+    seg = EEPROM;
+  } else {
+    throw Error_Device ("TStk500::ReadMem() called for invalid segment.",pNodename);
+  }
+
+  read_buffer[segment] = new TByte[GetSegmentSize()];
+
+  EnterProgrammingMode();
+
+  addr = 0;
+  for (unsigned int addr=0; addr<GetSegmentSize(); addr+=0x100) {
+    memcpy(buf, SetAddress, sizeof(SetAddress));
+    buf[1] = (addr/wordsize) & 0xff;
+    buf[2] = ((addr/wordsize) >> 8) & 0xff;
+    Send(buf, sizeof(SetAddress), sizeof(SetAddress_Reply));
+    if (memcmp(buf, SetAddress_Reply, sizeof(SetAddress_Reply)) != 0) {
+      throw Error_Device ("[RM] Device is not responding correctly.", pNodename); }
+   
+    memcpy(buf, ReadMemory, sizeof(ReadMemory));
+    buf[3] = seg;
+    Send(buf, sizeof(ReadMemory), 2+0x100);
+
+    memcpy(read_buffer[segment]+addr, buf+1, 0x100);
+  }
+
+  LeaveProgrammingMode();
+}
+
+static TByte
+convert_voltage (const char *val)
+{
+    char *endptr;
+    double v = strtod (val, &endptr);
+    if (endptr == val)
+        throw Error_Device ("Bad voltage value.");
+    if (v > 6.0)
+        throw Error_Device ("Voltages can not be greater than 6.0 volts");
+    if (v < 0.0)
+        throw Error_Device ("Voltages can not be less the 0.0 volts");
+
+    TByte res = (int)(v * 10.01);
+
+    return res;
+}
+
+TStk500::TStk500() {
+  /* Select Part by name */
+  desired_part=-1;
+  const char* desired_partname = GetCmdParam("-dpart");
+  pNodename = GetCmdParam("-dhost");
+  if (desired_partname!=NULL) {
+    int j;
+    for (j=0; prg_part[j].name[0] != 0; j++){
+      if (strcasecmp (desired_partname, prg_part[j].name)==0){
+    desired_part = j;
+    break;
+      }
+    }
+    if (prg_part[j].name[0]==0){throw Error_Device("-dpart: Invalid name.",pNodename);}
+  } else {
+    int i = 0;
+    Info(0, "No part specified, supported devices are:\n");
+    while (prg_part[i].name[0] != '\0')
+      Info(0, "%s\n", prg_part[i++].name);
+    throw Error_Device("");
+  }
+
+  /* Force parallel programming mode if the use wants it, otherwise, just use
+     what the device prefers (usually serial programming). */
+
+  if (GetCmdParam("-dparallel",false))
+      prg_part[desired_part].params.progtype = STK500_PROG_PARALLEL;
+
+  Initialize();
+
+  /* Handle Reading/Writing ARef voltage level. */
+
+  const char *val;
+
+  if ((val=GetCmdParam("--wr_vtg", true)))
+  {
+      TByte value = convert_voltage (val);
+      printf ("Setting VTarget to %d.%d V\n", value/10, value%10);
+
+      TByte aref = ReadParam(0x85);
+      if (aref > value)
+      {
+          printf ("Setting ARef == VTarget to avoid damaging device.\n");
+          WriteParam(0x85, value);
+      }
+
+      WriteParam(0x84, value);
+  }
+
+  if ((val=GetCmdParam("--wr_aref", true)))
+  {
+      TByte value = convert_voltage (val);
+      printf ("Setting ARef to %d.%d V\n", value/10, value%10);
+
+      TByte vtg = ReadParam(0x84);
+      if (vtg < value)
+      {
+          printf ("Setting ARef == VTarget to avoid damaging device.\n");
+          WriteParam(0x84, value);
+      }
+
+      WriteParam(0x85, value);
+  }
+
+  if (GetCmdParam("--rd_vtg", false))
+  {
+      TByte val = ReadParam(0x84);
+      printf("VTarget = %d.%d V\n", val/10, val%10);
+  }
+
+  if (GetCmdParam("--rd_aref", false))
+  {
+      TByte val = ReadParam(0x85);
+      printf("ARef = %d.%d V\n", val/10, val%10);
+  }
+
+  EnterProgrammingMode();
+  ReadSignature();
+  LeaveProgrammingMode();
+  Identify();
+
+  write_buffer[SEG_FLASH] = NULL;
+  write_buffer[SEG_EEPROM] = NULL;
+
+  read_buffer[SEG_FLASH] = NULL;
+  read_buffer[SEG_EEPROM] = NULL;
+
+  maxaddr = 0;
+}
+
+
+TStk500::~TStk500() {
+  Cleanup();
+  delete write_buffer[SEG_FLASH];
+  delete write_buffer[SEG_EEPROM];
+
+  delete read_buffer[SEG_FLASH];
+  delete read_buffer[SEG_EEPROM];
+}
diff --git a/tools/platforms/mica/uisp/src/Stk500.h b/tools/platforms/mica/uisp/src/Stk500.h
new file mode 100644
index 00000000..138d5bf4
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Stk500.h
@@ -0,0 +1,183 @@
+// $Id: Stk500.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: Stk500.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 2001, 2002, 2003  Daniel Berntsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* Stk500.h, Daniel Berntsson, 2001 */
+
+#ifndef __STK500
+#define __STK500
+
+#include "Global.h"
+#include "Serial.h"
+#include "Avr.h"
+
+#define STK500_PROG_SERIAL   0
+#define STK500_PROG_PARALLEL 1
+
+struct SPrgParams {
+  const TByte cmd;              // Always 0x42 (Cmnd_STK_SET_DEVICE)
+  const TByte devicecode;       // Device code (as defined above)
+  const TByte revision;         // Device revision. Not used, set to 0.
+  TByte progtype;               // Defines which Program modes are supported:
+                                //   0 - Both parallel/Hi-V and serial mode
+                                //   1 - Parallel/Hi-V only
+  const TByte parmode;          // Defines if the device has a full parallel
+                                // interface or a pseudo parallel programming
+                                // interface: 0 - pseudo; 1 - full
+  const TByte polling;          // Defines if polling may be used during SPI
+                                // access: 0 - no; 1 - yes
+  const TByte selftimed;        // Defines if prog insns are self timed: 
+                                // 0 - no; 1 - yes
+  const TByte lockbytes;        // Number of lock bytes. Currently not used
+                                // but should be set for future compat.
+  const TByte fusebytes;        // Number of fuse bytes. Currently not used
+                                // but should be set for future compat.
+  const TByte flashpollval1;    // FLASH polling value. See dev data sheet.
+  const TByte flashpollval2;    // FLASH polling value. Same as val1.
+  const TByte eeprompollval1;   // EEPROM polling value 1 (P1). See dev data
+                                // sheet.
+  const TByte eeprompollval2;   // EEPROM polling value 2 (P2). See dev data
+                                // sheet.
+  
+  // The following multi-byte values are sent to the stk500 in big endian
+  // order.
+  const TByte pagesize[2];      // Page size in bytes for pagemode parts
+  const TByte eepromsize[2];    // Size of eeprom in bytes.
+  const TByte flashsize[4];     // Size of FLASH in bytes.
+  const TByte sync;             // Always 0x20 (Sync_CRC_EOP)
+};
+
+/* Set the Extened Device Programming parameters. In the future, this may
+   require more than 3 arguments. */
+
+struct SPrgExtDevParams {
+  const TByte eepgsz;           // EEPROM page size in bytes.
+  const TByte sig_pagel;        // Defines which port pin the PAGEL signal
+                                // should be mapped on to. e.g. 0xD7 maps to
+                                // PORTD7.
+  const TByte sig_bs2;          // Defines which port pin the BS2 signal
+                                // should be mapped on to.
+  const TByte reset_disable;    // Req'd by firmware version 1.14.  It's a
+                                // flag which tells whether a device uses the
+                                // reset pin as an IO pin. Where 0x00 =
+                                // Dedicated RESET pin, 0x01 = Can't rely on
+                                // RESET pin for going into programming
+                                // mode. Not needed for SPI programming
+                                // though.
+};
+
+class TStk500: public TAvr, TSerial {
+private:
+  struct SPrgPart{
+    const char *name;
+    struct SPrgExtDevParams ext_params;
+    struct SPrgParams params;
+  };
+
+  int desired_part;
+  int page;                     /* page address for reading memory, mib510 */
+  const char *pNodename;
+  TByte* write_buffer[2];       /* buffer for SEG_FLASH and SEG_EEPROM */
+  TByte* read_buffer[2];        /* buffer for SEG_FLASH and SEG_EEPROM */
+  TAddr maxaddr;
+  TAddr minaddr;
+
+  static const TByte IspMode[];             //XBOW MIB510
+  static const TByte IspMode_Reply[];       //XBOW MIB510
+  static const TByte pSTK500[];
+  static const TByte pSTK500_Reply[];
+  static const TByte SWminor[];
+  static const TByte SWminor_Reply[];
+  static const TByte SWmajor[];
+  static const TByte SWmajor_Reply[];
+  static const TByte EnterPgmMode[];
+  static const TByte EnterPgmMode_Reply[];
+  static const TByte LeavePgmMode[];
+  static const TByte LeavePgmMode_Reply[];
+  static const TByte SetAddress[];
+  static const TByte SetAddress_Reply[];
+  static const TByte EraseDevice[];
+  static const TByte EraseDevice_Reply[];
+  static const TByte WriteMemory[];
+  static const TByte WriteMemory_Reply[];
+  static const TByte ReadMemory[];
+  static const TByte ReadMemory_Reply[];
+  static const TByte GetSignature[];
+  static const TByte GetSignature_Reply[];
+  static const TByte CmdStopByte[];
+  static const TByte ReplyStopByte[];
+  static const TByte Flash;
+  static const TByte EEPROM;
+  static const TByte DeviceParam_Reply[];
+  static const TByte ExtDevParams_Reply[];
+  static SPrgPart prg_part[];
+
+  void Initialize();
+  void Cleanup();
+
+  void EnterProgrammingMode();
+  void LeaveProgrammingMode();
+  void ReadSignature();
+  void ReadMem();
+  void ReadMemPage(TAddr addr);
+
+  TByte ReadParam(TByte param);
+  void  WriteParam(TByte param, TByte val);
+
+  TByte UniversalCmd(TByte cmd[]);
+
+  TByte ReadLockFuseBits();
+  TByte ReadCalFuseBits(int addr);
+  TByte ReadFuseLowBits();
+  TByte ReadFuseHighBits();
+  TByte ReadFuseExtBits();
+
+  TByte ReadLockBits();
+
+  void WriteLockFuseBits(TByte bits);
+  void WriteFuseLowBits(TByte bits);
+  void WriteFuseHighBits(TByte bits);
+  void WriteFuseExtBits(TByte bits);
+
+public:
+  /* Read byte from active segment at address addr. */
+  TByte ReadByte(TAddr addr);
+
+  /* Write byte to active segment at address addr */
+  void WriteByte(TAddr addr, TByte byte, bool flush_buffer=true);
+  void FlushWriteBuffer();
+
+  /* Chip Erase */
+  void ChipErase();
+
+  /* Write lock bits */
+  void WriteLockBits(TByte bits);
+
+  TStk500();
+  ~TStk500();
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/Terminal.C b/tools/platforms/mica/uisp/src/Terminal.C
new file mode 100644
index 00000000..10935c03
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Terminal.C
@@ -0,0 +1,171 @@
+// $Id: Terminal.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: Terminal.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002, 2003  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+	Terminal.C
+	
+	Device Terminal Access
+	Uros Platise (c) 1999
+*/
+
+#include "config.h"
+
+#include <stdio.h>
+#include <string.h>
+#include "Global.h"
+#include "Error.h"
+#include "Terminal.h"
+#include "MotIntl.h"
+
+void TTerminal::Run()
+{
+#if 0
+  enableAvr ();
+  if (isDeviceLocked ()) {
+    char q[20];
+    printf ("Do you want to clear it and enter normal mode now "
+            "(enter y for yes): ");
+    if (fgets (q,sizeof(q),stdin))
+    {
+        if (q[0]=='y') { chipErase (); }
+        else { return; }
+    }
+  }
+#endif
+
+  printf ("Entering the AVR Terminal. ?-help, q-quit.\n");
+  char cmd[32];
+  TAddr addr = 0;
+  do {
+    try {
+      printf("avr> "); 
+      scanf("%s",cmd);
+      if (!strcmp(cmd,"?")){
+	printf ("AVR Terminal supports the following commands:\n"
+	  "ul fileName        - uploads data from Motorola/Intel format.\n"
+	  "vf fileName        - verify file with memory\n"
+/*	  
+	  "dl fileName[%segs] - downloads data to Micro Output File\n"
+*/	  
+          "ls                 - list segments\n"
+	  "ss seg_name        - set segment\n"
+	  "ce                 - perform chip erase\n"
+	  "rd addr            - read a byte from a segment\n"
+	  "wr addr byte       - write a 'byte' to a segment at address 'addr'\n"
+	  "du addr            - dump segment starting at address 'addr'\n"
+	  ",                  - continue segment dump\n"
+	  "\n"
+	  "Written by Uros Platise (c) 1997-1999, uros.platise@ijs.si\n");
+      }
+      else if (!strcmp(cmd,"ul")) {
+	char inputFileName [64]; scanf ("%s", inputFileName);
+	try{
+	  motintl.Read(inputFileName, true, false);
+	}
+	catch (Error_Device& errDev) { errDev.print (); }
+	catch (Error_C) { perror ("Error"); }
+      }
+      else if (!strcmp(cmd,"vf")) {
+	char inputFileName [64]; scanf ("%s", inputFileName);
+	try{
+	  motintl.Read(inputFileName, false, true);
+	}
+	catch (Error_Device& errDev) { errDev.print (); }
+	catch (Error_C) { perror ("Error"); }
+      }      
+/*      
+      else if (cmd=="dl") {
+	char outputFileName [64]; scanf ("%s", outputFileName);
+	try { 
+	  TAout outAout (outputFileName, "wt");
+	  download (&outAout); 
+	}
+	catch (Error_Device& errDev) { errDev.print (); }
+	catch (Error_C) { perror ("Error"); }
+      }
+*/     
+      else if (!strcmp(cmd,"ls")){
+        printf("Available segments: ");
+        const char* seg_name;
+        for (unsigned i=0; (seg_name=device->ListSegment(i))!=NULL; i++){
+	  if (i>0){printf(", ");}
+	  printf("%s", seg_name);
+	}
+	putchar('\n');
+      } 
+      else if (!strcmp(cmd,"ss")){
+        char seg_name [32];
+	scanf("%s", seg_name);
+	if (!device->SetSegment(seg_name)){
+	  printf("Invalid segment: `%s'\n", seg_name);
+	} else {addr=0;}
+      }       
+      else if (!strcmp(cmd,"ce")){ 
+	device->ChipErase();
+      }
+/*      
+      else if (cmd=="rsb") {
+	unsigned char byte = readLockBits ();
+	printf ("Lock and Fuse bits status: %.2x\n", byte );
+      }
+      else if (cmd=="wlb") {
+	string mode; cin >> mode;
+	if (mode=="wr") { writeLockBits (lckPrg);
+	} else if (mode=="rdwr") { writeLockBits (lckPrgRd); 
+	} else { printf ("Invalid parameter: %s\n", mode); }
+      }
+*/      
+      else if (!strcmp(cmd,"rd")){
+	scanf ("%x", &addr);
+	printf("%s: $%.2x\n", 
+	  device->TellActiveSegment(), device->ReadByte(addr));
+      }
+      else if (!strcmp(cmd,"wr")){
+        unsigned x;
+	scanf("%x%x", &addr, &x);
+	device->WriteByte(addr, TByte(x));
+      }
+      else if (!strcmp(cmd,"du")){
+	scanf ("%x", &addr);
+	goto list_contents;
+      }
+      else if (!strcmp(cmd,",")){
+list_contents:
+	int i,l=0;
+	while (l<4) {
+	  printf ("%s $%.5x: ", device->TellActiveSegment(), addr); 
+	  for (i=0; i<0x8; addr++,i++) 
+	    printf ("%.2x ", device->ReadByte(addr));
+	  printf ("\n");
+	  l++;
+	}  
+      }
+      else printf ("Ouch.\n");
+      
+    } catch (Error_MemoryRange){Info(0,"Out of memory range!\n");putchar('\n');}
+  } while (strcmp(cmd,"q"));
+}
diff --git a/tools/platforms/mica/uisp/src/Terminal.h b/tools/platforms/mica/uisp/src/Terminal.h
new file mode 100644
index 00000000..c1e02cb6
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/Terminal.h
@@ -0,0 +1,40 @@
+// $Id: Terminal.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: Terminal.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* Terminal.h, Uros Platise (c) 1999 */
+
+#ifndef __TERMINAL
+#define __TERMINAL
+
+class TTerminal{
+public:
+  void Run(); 
+  TTerminal(){}
+  ~TTerminal(){}
+};
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/cygwinp.C b/tools/platforms/mica/uisp/src/cygwinp.C
new file mode 100644
index 00000000..ed342ce0
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/cygwinp.C
@@ -0,0 +1,118 @@
+// $Id: cygwinp.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: cygwinp.C,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+
+#if defined(__CYGWIN__)
+
+#include "config.h"
+
+#include <termios.h>
+#include <w32api/windows.h>
+#include "cygwinp.h"
+#include "DAPA.h"
+
+unsigned char inb(unsigned short port)
+{
+    unsigned char t;
+    asm volatile ("in %1, %0"
+		  : "=a" (t)
+		  : "d" (port));
+    return t;
+}
+
+void outb(unsigned char value, unsigned short port)
+{
+    asm volatile ("out %1, %0"
+		  :
+		  : "d" (port), "a" (value) );
+}
+
+int ioperm(unsigned short port, int num, int enable)
+{
+    if (enable) {
+	// Only try to use directio under Windows NT/2000.
+	OSVERSIONINFO ver_info;
+	memset(&ver_info, 0, sizeof(ver_info));
+	ver_info.dwOSVersionInfoSize = sizeof(ver_info);
+	if (! GetVersionEx(&ver_info))
+	    return -1;
+	else if (ver_info.dwPlatformId == VER_PLATFORM_WIN32_NT) {
+	    HANDLE h =
+		CreateFile("\\\\.\\giveio",
+			   GENERIC_READ,
+			   0,
+			   NULL,
+			   OPEN_EXISTING,
+			   FILE_ATTRIBUTE_NORMAL,
+			   NULL);
+	    if (h == INVALID_HANDLE_VALUE)
+		return -1;
+	    CloseHandle(h);
+	}
+    }
+    return 0;
+}
+
+bool cygwinp_delay_usec(long t)
+{
+    static bool perf_counter_checked = false;
+    static bool use_perf_counter = false;
+    static LARGE_INTEGER freq;
+
+    if (! perf_counter_checked) {
+	if (QueryPerformanceFrequency(&freq))
+	    use_perf_counter = true;
+	perf_counter_checked = true;
+    }
+
+    if (! use_perf_counter)
+	return false;
+    else {
+	LARGE_INTEGER now;
+	LARGE_INTEGER finish;
+	QueryPerformanceCounter(&now);
+	finish.QuadPart = now.QuadPart + (t * freq.QuadPart) / 1000000;
+	do {
+	    QueryPerformanceCounter(&now);
+	} while (now.QuadPart < finish.QuadPart);
+	return true;
+    }
+}
+
+
+int cfmakeraw(struct termios *termios_p)
+{
+    termios_p->c_iflag &=
+	~(IGNBRK|BRKINT|PARMRK|ISTRIP |INLCR|IGNCR|ICRNL|IXON);
+    termios_p->c_oflag &= ~OPOST;
+    termios_p->c_lflag &= ~(ECHO|ECHONL|ICANON|ISIG|IEXTEN);
+    termios_p->c_cflag &= ~(CSIZE|PARENB);
+    termios_p->c_cflag |= CS8;
+    return 0;
+}
+
+#endif
diff --git a/tools/platforms/mica/uisp/src/cygwinp.h b/tools/platforms/mica/uisp/src/cygwinp.h
new file mode 100644
index 00000000..0807c50c
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/cygwinp.h
@@ -0,0 +1,35 @@
+// $Id: cygwinp.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: cygwinp.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+
+#include <sys/time.h>
+
+unsigned char inb(unsigned short port);
+void outb(unsigned char value, unsigned short port);
+int ioperm(unsigned short port, int num, int enable);
+int cfmakeraw(struct termios *termios_p);
+bool cygwinp_delay_usec(long t);
diff --git a/tools/platforms/mica/uisp/src/parport.h b/tools/platforms/mica/uisp/src/parport.h
new file mode 100644
index 00000000..80152278
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/parport.h
@@ -0,0 +1,423 @@
+// $Id: parport.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: parport.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1999, 2000, 2001, 2002  Uros Platise
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* Id: parport.h,v 1.1 1998/05/17 10:57:52 andrea Exp andrea */
+
+#ifndef _PARPORT_H_
+#define _PARPORT_H_
+
+/* Start off with user-visible constants */
+
+/* Maximum of 8 ports per machine */
+#define PARPORT_MAX  8 
+
+/* Magic numbers */
+#define PARPORT_IRQ_NONE  -1
+#define PARPORT_DMA_NONE  -1
+#define PARPORT_IRQ_AUTO  -2
+#define PARPORT_DMA_AUTO  -2
+#define PARPORT_DISABLE   -2
+#define PARPORT_IRQ_PROBEONLY -3
+
+#define PARPORT_CONTROL_STROBE    0x1
+#define PARPORT_CONTROL_AUTOFD    0x2
+#define PARPORT_CONTROL_INIT      0x4
+#define PARPORT_CONTROL_SELECT    0x8
+#define PARPORT_CONTROL_INTEN     0x10
+#define PARPORT_CONTROL_DIRECTION 0x20
+
+#define PARPORT_STATUS_ERROR      0x8
+#define PARPORT_STATUS_SELECT     0x10
+#define PARPORT_STATUS_PAPEROUT   0x20
+#define PARPORT_STATUS_ACK        0x40
+#define PARPORT_STATUS_BUSY       0x80
+
+/* Type classes for Plug-and-Play probe.  */
+typedef enum {
+	PARPORT_CLASS_LEGACY = 0,       /* Non-IEEE1284 device */
+	PARPORT_CLASS_PRINTER,
+	PARPORT_CLASS_MODEM,
+	PARPORT_CLASS_NET,
+	PARPORT_CLASS_HDC,              /* Hard disk controller */
+	PARPORT_CLASS_PCMCIA,
+	PARPORT_CLASS_MEDIA,            /* Multimedia device */
+	PARPORT_CLASS_FDC,              /* Floppy disk controller */
+	PARPORT_CLASS_PORTS,
+	PARPORT_CLASS_SCANNER,
+	PARPORT_CLASS_DIGCAM,
+	PARPORT_CLASS_OTHER,            /* Anything else */
+	PARPORT_CLASS_UNSPEC            /* No CLS field in ID */
+} parport_device_class;
+
+/* The "modes" entry in parport is a bit field representing the following
+ * modes.
+ * Note that PARPORT_MODE_PCECPEPP is for the SMC EPP+ECP mode which is NOT
+ * 100% compatible with EPP.
+ */
+#define PARPORT_MODE_PCSPP	        0x0001
+#define PARPORT_MODE_PCPS2		0x0002
+#define PARPORT_MODE_PCEPP		0x0004
+#define PARPORT_MODE_PCECP		0x0008
+#define PARPORT_MODE_PCECPEPP		0x0010
+#define PARPORT_MODE_PCECR		0x0020  /* ECR Register Exists */
+#define PARPORT_MODE_PCECPPS2		0x0040
+
+/* The rest is for the kernel only */
+#ifdef __KERNEL__
+
+#include <asm/system.h>
+#include <asm/ptrace.h>
+#include <asm/spinlock.h>
+#include <linux/proc_fs.h>
+#include <linux/config.h>
+
+#define PARPORT_NEED_GENERIC_OPS
+
+/* Define this later. */
+struct parport;
+
+struct pc_parport_state {
+	unsigned int ctr;
+	unsigned int ecr;
+};
+
+struct parport_state {
+	union {
+		struct pc_parport_state pc;
+		/* ARC has no state. */
+		/* AX uses same state information as PC */
+		void *misc; 
+	} u;
+};
+
+struct parport_operations {
+	void (*write_data)(struct parport *, unsigned char);
+	unsigned char (*read_data)(struct parport *);
+	void (*write_control)(struct parport *, unsigned char);
+	unsigned char (*read_control)(struct parport *);
+	unsigned char (*frob_control)(struct parport *, unsigned char mask, unsigned char val);
+	void (*write_econtrol)(struct parport *, unsigned char);
+	unsigned char (*read_econtrol)(struct parport *);
+	unsigned char (*frob_econtrol)(struct parport *, unsigned char mask, unsigned char val);
+	void (*write_status)(struct parport *, unsigned char);
+	unsigned char (*read_status)(struct parport *);
+	void (*write_fifo)(struct parport *, unsigned char);
+	unsigned char (*read_fifo)(struct parport *);
+
+	void (*change_mode)(struct parport *, int);
+
+	void (*release_resources)(struct parport *);
+	int (*claim_resources)(struct parport *);
+
+	void (*epp_write_data)(struct parport *, unsigned char);
+	unsigned char (*epp_read_data)(struct parport *);
+	void (*epp_write_addr)(struct parport *, unsigned char);
+	unsigned char (*epp_read_addr)(struct parport *);
+	int (*epp_check_timeout)(struct parport *);
+	size_t (*epp_write_block)(struct parport *, void *, size_t);
+	size_t (*epp_read_block)(struct parport *, void *, size_t);
+
+	int (*ecp_write_block)(struct parport *, void *, size_t, void (*fn)(struct parport *, void *, size_t), void *);
+	int (*ecp_read_block)(struct parport *, void *, size_t, void (*fn)(struct parport *, void *, size_t), void *);
+
+	void (*init_state)(struct parport_state *);
+	void (*save_state)(struct parport *, struct parport_state *);
+	void (*restore_state)(struct parport *, struct parport_state *);
+
+	void (*enable_irq)(struct parport *);
+	void (*disable_irq)(struct parport *);
+	void (*interrupt)(int, void *, struct pt_regs *);
+
+	void (*inc_use_count)(void);
+	void (*dec_use_count)(void);
+	void (*fill_inode)(struct inode *inode, int fill);
+};
+
+struct parport_device_info {
+	parport_device_class class;
+	const char *class_name;
+	const char *mfr;
+	const char *model;
+	const char *cmdset;
+	const char *description;
+};
+
+/* Each device can have two callback functions:
+ *  1) a preemption function, called by the resource manager to request
+ *     that the driver relinquish control of the port.  The driver should
+ *     return zero if it agrees to release the port, and nonzero if it 
+ *     refuses.  Do not call parport_release() - the kernel will do this
+ *     implicitly.
+ *
+ *  2) a wake-up function, called by the resource manager to tell drivers
+ *     that the port is available to be claimed.  If a driver wants to use
+ *     the port, it should call parport_claim() here.
+ */
+
+/* A parallel port device */
+struct pardevice {
+	const char *name;
+	struct parport *port;
+	int (*preempt)(void *);
+	void (*wakeup)(void *);
+	void *private;
+	void (*irq_func)(int, void *, struct pt_regs *);
+	unsigned int flags;
+	struct pardevice *next;
+	struct pardevice *prev;
+	struct parport_state *state;     /* saved status over preemption */
+	struct wait_queue *wait_q;
+	unsigned long int time;
+	unsigned long int timeslice;
+	unsigned int waiting;
+	struct pardevice *waitprev;
+	struct pardevice *waitnext;
+};
+
+/* Directory information for the /proc interface */
+struct parport_dir {
+	struct proc_dir_entry *entry;    /* Directory /proc/parport/X     */
+	struct proc_dir_entry *irq;	/*		.../irq           */
+	struct proc_dir_entry *devices;  /*		.../devices       */
+	struct proc_dir_entry *hardware; /*		.../hardware      */
+	struct proc_dir_entry *probe;	 /*		.../autoprobe	  */
+	char name[4];
+};
+
+/* A parallel port */
+struct parport {
+	unsigned long base;	/* base address */
+	unsigned int size;	/* IO extent */
+	const char *name;
+	int irq;		/* interrupt (or -1 for none) */
+	int dma;
+	unsigned int modes;
+
+	struct pardevice *devices;
+	struct pardevice *cad;	/* port owner */
+
+	struct pardevice *waithead;
+	struct pardevice *waittail;
+	
+	struct parport *next;
+	unsigned int flags;
+
+	struct parport_dir pdir;
+	struct parport_device_info probe_info; 
+
+	struct parport_operations *ops;
+	void *private_data;     /* for lowlevel driver */
+
+	int number;		/* port index - the `n' in `parportn' */
+	spinlock_t pardevice_lock;
+	spinlock_t waitlist_lock;
+	rwlock_t cad_lock;
+
+	/* PCI parallel I/O card support. */
+	unsigned long base_hi;  /* base address (hi - ECR) */
+};
+
+/* parport_register_port registers a new parallel port at the given address (if
+ * one does not already exist) and returns a pointer to it.  This entails
+ * claiming the I/O region, IRQ and DMA.
+ * NULL is returned if initialisation fails. 
+ */
+struct parport *parport_register_port(unsigned long base, int irq, int dma,
+				      struct parport_operations *ops);
+
+/* Unregister a port. */
+extern void parport_unregister_port(struct parport *port);
+
+/* parport_in_use returns nonzero if there are devices attached to a port. */
+#define parport_in_use(x)  ((x)->devices != NULL)
+
+/* Put a parallel port to sleep; release its hardware resources.  Only possible
+ * if no devices are registered.  */
+extern void parport_quiesce(struct parport *);
+
+/* parport_enumerate returns a pointer to the linked list of all the ports
+ * in this machine.
+ */
+struct parport *parport_enumerate(void);
+
+/* parport_register_device declares that a device is connected to a port, and 
+ * tells the kernel all it needs to know.  
+ * pf is the preemption function (may be NULL for no callback)
+ * kf is the wake-up function (may be NULL for no callback)
+ * irq_func is the interrupt handler (may be NULL for no interrupts)
+ * handle is a user pointer that gets handed to callback functions. 
+ */
+struct pardevice *parport_register_device(struct parport *port, 
+			  const char *name,
+			  int (*pf)(void *), void (*kf)(void *),
+			  void (*irq_func)(int, void *, struct pt_regs *), 
+			  int flags, void *handle);
+
+/* parport_unregister unlinks a device from the chain. */
+extern void parport_unregister_device(struct pardevice *dev);
+
+/* parport_claim tries to gain ownership of the port for a particular driver.
+ * This may fail (return non-zero) if another driver is busy.  If this
+ * driver has registered an interrupt handler, it will be enabled. 
+ */
+extern int parport_claim(struct pardevice *dev);
+
+/* parport_claim_or_block is the same, but sleeps if the port cannot be 
+   claimed.  Return value is 1 if it slept, 0 normally and -errno on error.  */
+extern int parport_claim_or_block(struct pardevice *dev);
+
+/* parport_release reverses a previous parport_claim.  This can never fail, 
+ * though the effects are undefined (except that they are bad) if you didn't
+ * previously own the port.  Once you have released the port you should make
+ * sure that neither your code nor the hardware on the port tries to initiate
+ * any communication without first re-claiming the port.
+ * If you mess with the port state (enabling ECP for example) you should
+ * clean up before releasing the port. 
+ */
+
+extern void parport_release(struct pardevice *dev);
+
+/* parport_yield relinquishes the port if it would be helpful to other
+ * drivers.  The return value is the same as for parport_claim.
+ */
+extern __inline__ int parport_yield(struct pardevice *dev)
+{
+	unsigned long int timeslip = (jiffies - dev->time);
+	if ((dev->port->waithead == NULL) || (timeslip < dev->timeslice))
+		return 0;
+	parport_release(dev);
+	return parport_claim(dev);
+}
+
+/* parport_yield_blocking is the same but uses parport_claim_or_block
+ * instead of parport_claim.
+ */
+extern __inline__ int parport_yield_blocking(struct pardevice *dev)
+{
+	unsigned long int timeslip = (jiffies - dev->time);
+	if ((dev->port->waithead == NULL) || (timeslip < dev->timeslice))
+		return 0;
+	parport_release(dev);
+	return parport_claim_or_block(dev);
+}
+
+/*
+ * Lowlevel drivers _can_ call this support function to handle irqs.
+ */
+extern __inline__ void parport_generic_irq(int irq, struct parport *port,
+					   struct pt_regs *regs)
+{
+	read_lock(&port->cad_lock);
+	if (!port->cad)
+		goto out_unlock;
+	if (port->cad->irq_func)
+		port->cad->irq_func(irq, port->cad->private, regs);
+	else
+		printk(KERN_ERR "%s: irq%d happened with irq_func NULL "
+		       "with %s as cad!\n", port->name, irq, port->cad->name);
+ out_unlock:
+	read_unlock(&port->cad_lock);
+}
+
+/* Flags used to identify what a device does. */
+#define PARPORT_DEV_TRAN		0	/* WARNING !! DEPRECATED !! */
+#define PARPORT_DEV_LURK		(1<<0)	/* WARNING !! DEPRECATED !! */
+#define PARPORT_DEV_EXCL		(1<<1)	/* Need exclusive access. */
+
+#define PARPORT_FLAG_COMA		(1<<0)
+#define PARPORT_FLAG_EXCL		(1<<1)	/* EXCL driver registered. */
+
+extern void parport_parse_irqs(int, const char *[], int irqval[]);
+extern int parport_ieee1284_nibble_mode_ok(struct parport *, unsigned char);
+extern int parport_wait_peripheral(struct parport *, unsigned char, unsigned
+				   char);
+
+/* Prototypes from parport_procfs */
+extern int parport_proc_init(void);
+extern void parport_proc_cleanup(void);
+extern int parport_proc_register(struct parport *pp);
+extern int parport_proc_unregister(struct parport *pp);
+
+extern void dec_parport_count(void);
+extern void inc_parport_count(void);
+
+extern int parport_probe(struct parport *port, char *buffer, int len);
+extern void parport_probe_one(struct parport *port);
+extern void (*parport_probe_hook)(struct parport *port);
+
+/* If PC hardware is the only type supported, we can optimise a bit.  */
+#if (defined(CONFIG_PARPORT_PC) || defined(CONFIG_PARPORT_PC_MODULE)) && !(defined(CONFIG_PARPORT_AX) || defined(CONFIG_PARPORT_AX_MODULE)) && !(defined(CONFIG_PARPORT_ARC) || defined(CONFIG_PARPORT_ARC_MODULE)) && !defined(CONFIG_PARPORT_OTHER)
+#undef PARPORT_NEED_GENERIC_OPS
+#include <linux/parport_pc.h>
+#define parport_write_data(p,x)            parport_pc_write_data(p,x)
+#define parport_read_data(p)               parport_pc_read_data(p)
+#define parport_write_control(p,x)         parport_pc_write_control(p,x)
+#define parport_read_control(p)            parport_pc_read_control(p)
+#define parport_frob_control(p,m,v)        parport_pc_frob_control(p,m,v)
+#define parport_write_econtrol(p,x)        parport_pc_write_econtrol(p,x)
+#define parport_read_econtrol(p)           parport_pc_read_econtrol(p)
+#define parport_frob_econtrol(p,m,v)       parport_pc_frob_econtrol(p,m,v)
+#define parport_write_status(p,v)          parport_pc_write_status(p,v)
+#define parport_read_status(p)             parport_pc_read_status(p)
+#define parport_write_fifo(p,v)            parport_pc_write_fifo(p,v)
+#define parport_read_fifo(p)               parport_pc_read_fifo(p)
+#define parport_change_mode(p,m)           parport_pc_change_mode(p,m)
+#define parport_release_resources(p)       parport_pc_release_resources(p)
+#define parport_claim_resources(p)         parport_pc_claim_resources(p)
+#define parport_epp_write_data(p,x)        parport_pc_write_epp(p,x)
+#define parport_epp_read_data(p)           parport_pc_read_epp(p)
+#define parport_epp_write_addr(p,x)        parport_pc_write_epp_addr(p,x)
+#define parport_epp_read_addr(p)           parport_pc_read_epp_addr(p)
+#define parport_epp_check_timeout(p)       parport_pc_check_epp_timeout(p)
+#endif
+
+#ifdef PARPORT_NEED_GENERIC_OPS
+/* Generic operations vector through the dispatch table. */
+#define parport_write_data(p,x)            (p)->ops->write_data(p,x)
+#define parport_read_data(p)               (p)->ops->read_data(p)
+#define parport_write_control(p,x)         (p)->ops->write_control(p,x)
+#define parport_read_control(p)            (p)->ops->read_control(p)
+#define parport_frob_control(p,m,v)        (p)->ops->frob_control(p,m,v)
+#define parport_write_econtrol(p,x)        (p)->ops->write_econtrol(p,x)
+#define parport_read_econtrol(p)           (p)->ops->read_econtrol(p)
+#define parport_frob_econtrol(p,m,v)       (p)->ops->frob_econtrol(p,m,v)
+#define parport_write_status(p,v)          (p)->ops->write_status(p,v)
+#define parport_read_status(p)             (p)->ops->read_status(p)
+#define parport_write_fifo(p,v)            (p)->ops->write_fifo(p,v)
+#define parport_read_fifo(p)               (p)->ops->read_fifo(p)
+#define parport_change_mode(p,m)           (p)->ops->change_mode(p,m)
+#define parport_release_resources(p)       (p)->ops->release_resources(p)
+#define parport_claim_resources(p)         (p)->ops->claim_resources(p)
+#define parport_epp_write_data(p,x)        (p)->ops->epp_write_data(p,x)
+#define parport_epp_read_data(p)           (p)->ops->epp_read_data(p)
+#define parport_epp_write_addr(p,x)        (p)->ops->epp_write_addr(p,x)
+#define parport_epp_read_addr(p)           (p)->ops->epp_read_addr(p)
+#define parport_epp_check_timeout(p)       (p)->ops->epp_check_timeout(p)
+#endif
+
+#endif /* __KERNEL__ */
+#endif /* _PARPORT_H_ */
diff --git a/tools/platforms/mica/uisp/src/ppdev.h b/tools/platforms/mica/uisp/src/ppdev.h
new file mode 100644
index 00000000..070638c5
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/ppdev.h
@@ -0,0 +1,140 @@
+// $Id: ppdev.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: ppdev.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 1998-9 Tim Waugh <tim@cyberelk.demon.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/*
+ * linux/drivers/char/ppdev.h
+ *
+ * User-space parallel port device driver (header file).
+ *
+ * Added PPGETTIME/PPSETTIME, Fred Barnes, 1999.
+ */
+
+#define PP_MAJOR	99
+
+#define PP_IOCTL	'p'
+
+/* Set mode for read/write (e.g. IEEE1284_MODE_EPP) */
+#define PPSETMODE	_IOW(PP_IOCTL, 0x80, int)
+
+/* Read status */
+#define PPRSTATUS	_IOR(PP_IOCTL, 0x81, unsigned char)
+#define PPWSTATUS	OBSOLETE__IOW(PP_IOCTL, 0x82, unsigned char)
+
+/* Read/write control */
+#define PPRCONTROL	_IOR(PP_IOCTL, 0x83, unsigned char)
+#define PPWCONTROL	_IOW(PP_IOCTL, 0x84, unsigned char)
+
+struct ppdev_frob_struct {
+	unsigned char mask;
+	unsigned char val;
+};
+#define PPFCONTROL      _IOW(PP_IOCTL, 0x8e, struct ppdev_frob_struct)
+
+/* Read/write data */
+#define PPRDATA		_IOR(PP_IOCTL, 0x85, unsigned char)
+#define PPWDATA		_IOW(PP_IOCTL, 0x86, unsigned char)
+
+/* Read/write econtrol (not used) */
+#define PPRECONTROL	OBSOLETE__IOR(PP_IOCTL, 0x87, unsigned char)
+#define PPWECONTROL	OBSOLETE__IOW(PP_IOCTL, 0x88, unsigned char)
+
+/* Read/write FIFO (not used) */
+#define PPRFIFO		OBSOLETE__IOR(PP_IOCTL, 0x89, unsigned char)
+#define PPWFIFO		OBSOLETE__IOW(PP_IOCTL, 0x8a, unsigned char)
+
+/* Claim the port to start using it */
+#define PPCLAIM		_IO(PP_IOCTL, 0x8b)
+
+/* Release the port when you aren't using it */
+#define PPRELEASE	_IO(PP_IOCTL, 0x8c)
+
+/* Yield the port (release it if another driver is waiting,
+ * then reclaim) */
+#define PPYIELD		_IO(PP_IOCTL, 0x8d)
+
+/* Register device exclusively (must be before PPCLAIM). */
+#define PPEXCL		_IO(PP_IOCTL, 0x8f)
+
+/* Data line direction: non-zero for input mode. */
+#define PPDATADIR	_IOW(PP_IOCTL, 0x90, int)
+
+/* Negotiate a particular IEEE 1284 mode. */
+#define PPNEGOT		_IOW(PP_IOCTL, 0x91, int)
+
+/* Set control lines when an interrupt occurs. */
+#define PPWCTLONIRQ	_IOW(PP_IOCTL, 0x92, unsigned char)
+
+/* Clear (and return) interrupt count. */
+#define PPCLRIRQ	_IOR(PP_IOCTL, 0x93, int)
+
+/* Set the IEEE 1284 phase that we're in (e.g. IEEE1284_PH_FWD_IDLE) */
+#define PPSETPHASE	_IOW(PP_IOCTL, 0x94, int)
+
+/* Set and get port timeout (struct timeval's) */
+#define PPGETTIME	_IOR(PP_IOCTL, 0x95, struct timeval)
+#define PPSETTIME	_IOW(PP_IOCTL, 0x96, struct timeval)
+
+/* IEEE1284 modes: 
+   Nibble mode, byte mode, ECP, ECPRLE and EPP are their own
+   'extensibility request' values.  Others are special.
+   'Real' ECP modes must have the IEEE1284_MODE_ECP bit set.  */
+#define IEEE1284_MODE_NIBBLE             0
+#define IEEE1284_MODE_BYTE              (1<<0)
+#define IEEE1284_MODE_COMPAT            (1<<8)
+#define IEEE1284_MODE_BECP              (1<<9) /* Bounded ECP mode */
+#define IEEE1284_MODE_ECP               (1<<4)
+#define IEEE1284_MODE_ECPRLE            (IEEE1284_MODE_ECP | (1<<5))
+#define IEEE1284_MODE_ECPSWE            (1<<10) /* Software-emulated */
+#define IEEE1284_MODE_EPP               (1<<6)
+#define IEEE1284_MODE_EPPSL             (1<<11) /* EPP 1.7 */
+#define IEEE1284_MODE_EPPSWE            (1<<12) /* Software-emulated */
+#define IEEE1284_DEVICEID               (1<<2)  /* This is a flag */
+#define IEEE1284_EXT_LINK               (1<<14) /* This flag causes the
+						 * extensibility link to
+						 * be requested, using
+						 * bits 0-6. */
+
+/* For the benefit of parport_read/write, you can use these with
+ * parport_negotiate to use address operations.  They have no effect
+ * other than to make parport_read/write use address transfers. */
+#define IEEE1284_ADDR			(1<<13)	/* This is a flag */
+#define IEEE1284_DATA			 0	/* So is this */
+
+/* IEEE1284 phases */
+enum ieee1284_phase {
+	IEEE1284_PH_FWD_DATA,
+	IEEE1284_PH_FWD_IDLE,
+	IEEE1284_PH_TERMINATE,
+	IEEE1284_PH_NEGOTIATION,
+	IEEE1284_PH_HBUSY_DNA,
+	IEEE1284_PH_REV_IDLE,
+	IEEE1284_PH_HBUSY_DAVAIL,
+	IEEE1284_PH_REV_DATA,
+	IEEE1284_PH_ECP_SETUP,
+	IEEE1284_PH_ECP_FWD_TO_REV,
+	IEEE1284_PH_ECP_REV_TO_FWD
+};
diff --git a/tools/platforms/mica/uisp/src/timeradd.h b/tools/platforms/mica/uisp/src/timeradd.h
new file mode 100644
index 00000000..b7faa8d2
--- /dev/null
+++ b/tools/platforms/mica/uisp/src/timeradd.h
@@ -0,0 +1,65 @@
+// $Id: timeradd.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+
+/*
+ * $Id: timeradd.h,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+ *
+ ****************************************************************************
+ *
+ * uisp - The Micro In-System Programmer for Atmel AVR microcontrollers.
+ * Copyright (C) 2002, 2003  Marek Michalkiewicz
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ ****************************************************************************
+ */
+
+/* I'm not sure how portable is to use these macros (they are available
+   on my system, but not mentioned in the glibc manual I have).
+   Similar macros are provided here for systems that don't have them.  -MM */
+
+#include <sys/time.h>
+
+#ifndef timeradd
+#define timeradd(_a, _b, _res)				\
+  do {							\
+    (_res)->tv_usec = (_a)->tv_usec + (_b)->tv_usec;	\
+    (_res)->tv_sec = (_a)->tv_sec + (_b)->tv_sec;	\
+    if ((_res)->tv_usec >= 1000000)			\
+      {							\
+        (_res)->tv_usec -= 1000000;			\
+        (_res)->tv_sec++;				\
+      }							\
+  } while (0)
+#endif
+
+#ifndef timersub
+#define timersub(_a, _b, _res)				\
+  do {							\
+    (_res)->tv_usec = (_a)->tv_usec - (_b)->tv_usec;	\
+    (_res)->tv_sec = (_a)->tv_sec - (_b)->tv_sec;	\
+    if ((_res)->tv_usec < 0) {				\
+      (_res)->tv_usec += 1000000;			\
+      (_res)->tv_sec--;					\
+    }							\
+  } while (0)
+#endif
+
+#ifndef timercmp
+#define timercmp(_a, _b, _cmp)				\
+  (((_a)->tv_sec == (_b)->tv_sec) ?			\
+   ((_a)->tv_usec _cmp (_b)->tv_usec) :			\
+   ((_a)->tv_sec _cmp (_b)->tv_sec))
+#endif
+
diff --git a/tools/platforms/mica/uisp/uisp.1.in b/tools/platforms/mica/uisp/uisp.1.in
new file mode 100644
index 00000000..21142214
--- /dev/null
+++ b/tools/platforms/mica/uisp/uisp.1.in
@@ -0,0 +1,200 @@
+.TH UISP "1" "@DATE@" "uisp version @VERSION@" "User Commands"
+.SH NAME
+uisp \- manual page for uisp
+.SH SYNOPSIS
+.B uisp
+[\fIOPTION\fR].. \fI-dprog=TYPE\fR \fI-dpart=AT90XXX\fR \fI--FUNCTION\fR.. [\fIif=SOURCE\fR] [\fIof=DEST\fR]
+.SH DESCRIPTION
+.IP
+.SS "Programming Methods:"
+\fB\-dprog\fR=avr910|pavr|stk500
+.RS
+.TP
+avr910
+Standard Atmel Serial Programmer/Atmel Low Cost Programmer
+.TP
+pavr
+http://www.avr1.org/pavr/pavr.html
+.TP
+stk500
+Atmel STK500
+.RE
+.HP
+\fB\-dprog\fR=dapa|stk200|abb|avrisp|bsd|fbprg|dt006|maxi|dasa|dasa2
+.RS
+.TP
+dapa
+Direct AVR Parallel Access
+.TP
+stk200
+Parallel Starter Kit STK200, STK300
+.TP
+abb
+Altera ByteBlasterMV Parallel Port Download Cable
+.TP
+avrisp
+Atmel AVR ISP (?)
+.TP
+bsd
+http://www.bsdhome.com/avrdude/ (parallel)
+.TP
+fbprg
+http://ln.com.ua/~real/avreal/adapters.html (parallel)
+.TP
+dt006
+http://www.dontronics.com/dt006.html (parallel)
+.TP
+maxi
+Investment Technologies Maxi (parallel)
+.TP
+dasa
+serial (RESET=RTS SCK=DTR MOSI=TXD MISO=CTS)
+.TP
+dasa2
+serial (RESET=!TXD SCK=RTS MOSI=DTR MISO=CTS)
+.RE
+.SS "Target Device Selection:"
+.TP
+\fB\-dpart\fR=part
+Set target abbreviated name or number. For some programmers, if
+\fB\-dpart\fR is not given programmer's supported devices are listed. Set
+\fB\-dpart\fR=\fIauto\fR for auto-select. Auto-select does not work with
+all programmers, so it is recommended to always specify a target device
+explicitly.
+.SS "Parallel Device Settings:"
+.TP
+\fB\-dlpt\fR=address|device name
+specify device name (Linux ppdev, FreeBSD ppi, serial)
+or direct I/O parallel port address (0x378, 0x278, 0x3BC)
+.TP
+\fB\-dno\-poll\fR
+Program without data polling (a little slower)
+.TP
+\fB\-dno\-retry\fR
+Disable retries of program enable command
+.TP
+\fB\-dvoltage\fR=value
+Set timing specs according to the power supply voltage in [V]
+(default 3.0)
+.TP
+\fB\-dt_sck\fR=time
+Set minimum SCK high/low time in micro-seconds (default 5)
+.TP
+\fB\-dt_wd_flash\fR=time
+Set FLASH maximum write delay time in micro-seconds
+.TP
+\fB\-dt_wd_eeprom\fR=time
+Set EEPROM maximum write delay time in micro-seconds
+.TP
+\fB\-dt_reset\fR=time
+Set reset inactive (high) time in micro-seconds
+.TP
+\fB\-dinvert\fR=[sck[,mosi[,miso[,reset]]]]]
+Invert specified lines
+Use \fB\-v\fR=\fI3\fR option to see current settings.
+.SS "Atmel Low Cost Programmer Serial Device Settings:"
+.TP
+\fB\-dserial\fR=device name
+Set serial interface as /dev/ttyS* (default /dev/avr)
+.TP
+\fB\-dspeed\fR=1200|2400|4800|9600|19200|38400|57600|115200
+Set speed of the serial interface (default 19200)
+.SS "Stk500 specific options:"
+.TP
+\fB\-dparallel\fR
+Use Hi-V parallel programming instead of serial (default is serial)
+.TP
+\fB\-\-rd_aref\fR
+Read the ARef Voltage. Note that due to a bug in the stk500 firmware, the read
+value is sometimes off by 0.1 from the actual value measured with a volt meter.
+.TP
+\fB\-\-rd_vtg\fR
+Read the Vtarget Voltage. Note that due to a bug in the stk500 firmware, the
+read value is sometimes off by 0.1 from the actual value measured with a volt
+meter.
+.TP
+\fB\-\-wr_aref\fR=value
+Set the ARef Voltage. Valid values are 0.0 to 6.0 volts in 0.1 volt increments.
+Value can not be larger than the VTarget value.
+.TP
+\fB\-\-wr_vtg\fR=value
+Set the VTarget Voltage. Valid values are 0.0 to 6.0 volts in 0.1 volt
+increments.  Value can not be smaller than the ARef value.
+.SS "Functions:"
+.TP
+\fB\-\-upload\fR
+Upload "input_file" to the AVR memory.
+.TP
+\fB\-\-verify\fR
+Verify "input_file" (processed after the \fB\-\-upload\fR opt.)
+.TP
+\fB\-\-download\fR
+Download AVR memory to "output_file" or stdout.
+.TP
+\fB\-\-erase\fR
+Erase device.
+.TP
+\fB\-\-segment\fR=flash|eeprom|fuse
+Set active segment (auto-select for AVA Motorola output)
+.SS "Fuse/Lock Bit Operations:"
+.TP
+\fB\-\-rd_fuses\fR
+Read all fuses and print values to stdout
+.TP
+\fB\-\-wr_fuse_l\fR=byte
+Write fuse low byte
+.TP
+\fB\-\-wr_fuse_h\fR=byte
+Write fuse high byte
+.TP
+\fB\-\-wr_fuse_e\fR=byte
+Write fuse extended byte
+.TP
+\fB\-\-wr_lock\fR=byte
+Write lock bits. Argument is a byte where each bit is:
+ Bit5 -> blb12
+ Bit4 -> blb11
+ Bit3 -> blb02
+ Bit2 -> blb01
+ Bit1 -> lb2
+ Bit0 -> lb1
+.TP
+\fB\-\-lock\fR
+Write lock bits [old method; deprecated].
+.SS "Files:"
+.TP
+\fBif\fR=filename
+Input file for the \fB\-\-upload\fR and \fB\-\-verify\fR functions in
+Motorola S-records (S1 or S2) or 16 bit Intel format
+.TP
+\fBof\fR=filename
+Output file for the \fB\-\-download\fR function in
+Motorola S-records format, default is standard output
+.SS "Other Options:"
+.TP
+\fB\-v\fR=level
+Set verbose level (-v equals \fB\-v\fR=\fI2\fR, min/max: 0/4, default 1)
+.TP
+\fB\-\-hash\fR=perbytes
+Print hash (default is 32 bytes)
+.TP
+\fB\-\-help\fR \fB\-h\fR
+Help
+.TP
+\fB\-\-version\fR
+Print version information
+.TP
+\fB\-\-terminal\fR
+Invoke shell-like terminal
+.SH "AUTHOR"
+Written by Uros Platise.
+.SH "REPORTING BUGS"
+Report bugs to <uisp-dev@nongnu.org>
+.SH "SEE ALSO"
+http://savannah.nongnu.org/download/uisp/
+.SH "COPYRIGHT"
+(c) 1997-1999 Uros Platise, 2000-2003 Marek Michalkiewicz
+.PP
+uisp is free software, covered by the GNU General Public License.  You are
+welcome to change it and/or distribute copies of it under the conditions of
+the GNU General Public License.
diff --git a/tools/platforms/mica/uisp/uisp.spec.in b/tools/platforms/mica/uisp/uisp.spec.in
new file mode 100644
index 00000000..e0142f97
--- /dev/null
+++ b/tools/platforms/mica/uisp/uisp.spec.in
@@ -0,0 +1,78 @@
+## -*- mode: rpm-spec; -*-
+##
+## $Id: uisp.spec.in,v 1.4 2006-12-12 18:23:00 vlahan Exp $
+##
+## @configure_input@
+##
+
+%define uispVersion      @VERSION@
+
+Summary: Universal In-System Programmer for Atmel AVR and 8051.
+Name: uisp
+Version: %{uispVersion}
+Release: 1
+License: GPL
+Group: Development/Tools
+URL: http://freesoftware.fsf.org/download/uisp
+Source: http://freesoftware.fsf.org/download/uisp/uisp-%{uispVersion}.tar.gz
+Buildroot: %{_tmppath}/%{name}-%{version}-root
+
+%description
+Uisp is utility for downloading/uploading programs to AVR devices. Can also be
+used for some Atmel 8051 type devices. In addition, uisp can erase the device,
+write lock bits, verify and set the active segment.
+
+For use with the following hardware to program the devices:
+  pavr      http://avr.jpk.co.nz/pavr/pavr.html
+  stk500    Atmel STK500
+  dapa      Direct AVR Parallel Access
+  stk200    Parallel Starter Kit STK200, STK300
+  abb       Altera ByteBlasterMV Parallel Port Download Cable
+  avrisp    Atmel AVR ISP (?)
+  bsd       http://www.bsdhome.com/avrprog/ (parallel)
+  fbprg     http://ln.com.ua/~real/avreal/adapters.html (parallel)
+  dt006     http://www.dontronics.com/dt006.html (parallel)
+  dasa      serial (RESET=RTS SCK=DTR MOSI=TXD MISO=CTS)
+  dasa2     serial (RESET=!TXD SCK=RTS MOSI=DTR MISO=CTS)
+
+	
+%prep
+%setup -q
+
+%build
+
+./configure --prefix=/usr
+
+make
+
+%install
+rm -rf $RPM_BUILD_ROOT
+make prefix=$RPM_BUILD_ROOT/%{_prefix} install
+
+%clean
+rm -rf $RPM_BUILD_ROOT
+
+%files
+%defattr(-,root,root)
+%doc ChangeLog AUTHORS CHANGES  CHANGES.old  COPYING  INSTALL  TODO kernel pavr
+%{_prefix}/bin/uisp
+
+%changelog
+* Sun May 26 2002 Theodore A. Roth <troth@openavr.org>
+- Integrated in to build system.
+
+* Sat Apr 20 2002 Theodore A. Roth <troth@openavr.org>
+- Update to new 20020420 release.
+
+* Fri Apr 18 2002 Theodore A. Roth <troth@openavr.org>
+- Added patch to fix reading cal byte on tiny15. (from Alexander Popov)
+
+* Mon Apr 08 2002 Theodore A. Roth <troth@openavr.org>
+- Added patch to fix reading signature bytes.
+- Added patch to fix some problems with srec uploading.
+
+* Tue Mar 17 2002 Theodore A. Roth <troth@openavr.org>
+- Added kernel/ and pavr/ directories to %doc files.
+
+* Tue Mar 17 2002 Theodore A. Roth <troth@openavr.org>
+- Initial spec file.
diff --git a/tools/platforms/msp430/.cvsignore b/tools/platforms/msp430/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/platforms/msp430/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/platforms/msp430/Makefile.am b/tools/platforms/msp430/Makefile.am
new file mode 100644
index 00000000..29ae5edc
--- /dev/null
+++ b/tools/platforms/msp430/Makefile.am
@@ -0,0 +1,3 @@
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = motelist pybsl
diff --git a/tools/platforms/msp430/cppbsl/AUTHORS b/tools/platforms/msp430/cppbsl/AUTHORS
new file mode 100644
index 00000000..cb0124ca
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/AUTHORS
@@ -0,0 +1,8 @@
+Andreas Koepke <koepke@tkn.tu-berlin.de>
+
+Based on bslsh code by Dirk Jagdmann <doj@cubic.org> and Michael Stickel <michael@cubic.org>
+Based on bsl.py by Chris Liechti <cliechti@gmx.net>, 
+which includes fixes from Colin Domoney and maybe others
+Based on the application note slaa96d.pdf by Volker Rzehak and Stefan Schauer, published by Texas Instruments, Inc.
+Based on the application note slaa089d.pdf by Stefan Schauer, published by Texas Instruments, Inc.
+
diff --git a/tools/platforms/msp430/cppbsl/COPYING b/tools/platforms/msp430/cppbsl/COPYING
new file mode 100644
index 00000000..e4a6925c
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/COPYING
@@ -0,0 +1,27 @@
+ Copyright (c) Technische Universitaet Berlin
+ All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+ - Redistributions of source code must retain the above copyright notice,
+   this list of conditions and the following disclaimer.
+ - Redistributions in binary form must reproduce the above copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the distribution.
+ - Neither the name of the Technische Universitaet Berlin nor the names
+   of its contributors may be used to endorse or promote products derived
+   from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
diff --git a/tools/platforms/msp430/cppbsl/ChangeLog b/tools/platforms/msp430/cppbsl/ChangeLog
new file mode 100644
index 00000000..e69de29b
diff --git a/tools/platforms/msp430/cppbsl/INSTALL b/tools/platforms/msp430/cppbsl/INSTALL
new file mode 100644
index 00000000..23a5561a
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/INSTALL
@@ -0,0 +1,242 @@
+This software is tested only on Linux with 2.6.11 or higher kernel, on CPUs
+using little endian byte order (like Intel and ARM in little endian mode). It
+needs the GNU C++ compiler g++ version 3 or higher.
+
+See README for further assumptions.
+
+1. ./configure 
+You may want to specify a cross compiler: ./configure CXX=name-your-cross-compiler-g++
+2. make 
+3. cp src/bsltool to destination
+
+--------------------------------------------------------------------------------------
+
+Copyright (C) 1994, 1995, 1996, 1999, 2000, 2001, 2002 Free Software
+Foundation, Inc.
+
+   This file is free documentation; the Free Software Foundation gives
+unlimited permission to copy, distribute and modify it.
+
+Basic Installation
+==================
+
+   These are generic installation instructions.
+
+   The `configure' shell script attempts to guess correct values for
+various system-dependent variables used during compilation.  It uses
+those values to create a `Makefile' in each directory of the package.
+It may also create one or more `.h' files containing system-dependent
+definitions.  Finally, it creates a shell script `config.status' that
+you can run in the future to recreate the current configuration, and a
+file `config.log' containing compiler output (useful mainly for
+debugging `configure').
+
+   It can also use an optional file (typically called `config.cache'
+and enabled with `--cache-file=config.cache' or simply `-C') that saves
+the results of its tests to speed up reconfiguring.  (Caching is
+disabled by default to prevent problems with accidental use of stale
+cache files.)
+
+   If you need to do unusual things to compile the package, please try
+to figure out how `configure' could check whether to do them, and mail
+diffs or instructions to the address given in the `README' so they can
+be considered for the next release.  If you are using the cache, and at
+some point `config.cache' contains results you don't want to keep, you
+may remove or edit it.
+
+   The file `configure.ac' (or `configure.in') is used to create
+`configure' by a program called `autoconf'.  You only need
+`configure.ac' if you want to change it or regenerate `configure' using
+a newer version of `autoconf'.
+
+The simplest way to compile this package is:
+
+  1. `cd' to the directory containing the package's source code and type
+     `./configure' to configure the package for your system.  If you're
+     using `csh' on an old version of System V, you might need to type
+     `sh ./configure' instead to prevent `csh' from trying to execute
+     `configure' itself.
+
+     Running `configure' takes awhile.  While running, it prints some
+     messages telling which features it is checking for.
+
+  2. Type `make' to compile the package.
+
+  3. Optionally, type `make check' to run any self-tests that come with
+     the package.
+
+  4. Type `make install' to install the programs and any data files and
+     documentation.
+
+  5. You can remove the program binaries and object files from the
+     source code directory by typing `make clean'.  To also remove the
+     files that `configure' created (so you can compile the package for
+     a different kind of computer), type `make distclean'.  There is
+     also a `make maintainer-clean' target, but that is intended mainly
+     for the package's developers.  If you use it, you may have to get
+     all sorts of other programs in order to regenerate files that came
+     with the distribution.
+
+Compilers and Options
+=====================
+
+   Some systems require unusual options for compilation or linking that
+the `configure' script does not know about.  Run `./configure --help'
+for details on some of the pertinent environment variables.
+
+   You can give `configure' initial values for configuration parameters
+by setting variables in the command line or in the environment.  Here
+is an example:
+
+     ./configure CC=c89 CFLAGS=-O2 LIBS=-lposix
+
+   *Note Defining Variables::, for more details.
+
+Compiling For Multiple Architectures
+====================================
+
+   You can compile the package for more than one kind of computer at the
+same time, by placing the object files for each architecture in their
+own directory.  To do this, you must use a version of `make' that
+supports the `VPATH' variable, such as GNU `make'.  `cd' to the
+directory where you want the object files and executables to go and run
+the `configure' script.  `configure' automatically checks for the
+source code in the directory that `configure' is in and in `..'.
+
+   If you have to use a `make' that does not support the `VPATH'
+variable, you have to compile the package for one architecture at a
+time in the source code directory.  After you have installed the
+package for one architecture, use `make distclean' before reconfiguring
+for another architecture.
+
+Installation Names
+==================
+
+   By default, `make install' will install the package's files in
+`/usr/local/bin', `/usr/local/man', etc.  You can specify an
+installation prefix other than `/usr/local' by giving `configure' the
+option `--prefix=PATH'.
+
+   You can specify separate installation prefixes for
+architecture-specific files and architecture-independent files.  If you
+give `configure' the option `--exec-prefix=PATH', the package will use
+PATH as the prefix for installing programs and libraries.
+Documentation and other data files will still use the regular prefix.
+
+   In addition, if you use an unusual directory layout you can give
+options like `--bindir=PATH' to specify different values for particular
+kinds of files.  Run `configure --help' for a list of the directories
+you can set and what kinds of files go in them.
+
+   If the package supports it, you can cause programs to be installed
+with an extra prefix or suffix on their names by giving `configure' the
+option `--program-prefix=PREFIX' or `--program-suffix=SUFFIX'.
+
+Optional Features
+=================
+
+   Some packages pay attention to `--enable-FEATURE' options to
+`configure', where FEATURE indicates an optional part of the package.
+They may also pay attention to `--with-PACKAGE' options, where PACKAGE
+is something like `gnu-as' or `x' (for the X Window System).  The
+`README' should mention any `--enable-' and `--with-' options that the
+package recognizes.
+
+   For packages that use the X Window System, `configure' can usually
+find the X include and library files automatically, but if it doesn't,
+you can use the `configure' options `--x-includes=DIR' and
+`--x-libraries=DIR' to specify their locations.
+
+Specifying the System Type
+==========================
+
+   There may be some features `configure' cannot figure out
+automatically, but needs to determine by the type of machine the package
+will run on.  Usually, assuming the package is built to be run on the
+_same_ architectures, `configure' can figure that out, but if it prints
+a message saying it cannot guess the machine type, give it the
+`--build=TYPE' option.  TYPE can either be a short name for the system
+type, such as `sun4', or a canonical name which has the form:
+
+     CPU-COMPANY-SYSTEM
+
+where SYSTEM can have one of these forms:
+
+     OS KERNEL-OS
+
+   See the file `config.sub' for the possible values of each field.  If
+`config.sub' isn't included in this package, then this package doesn't
+need to know the machine type.
+
+   If you are _building_ compiler tools for cross-compiling, you should
+use the `--target=TYPE' option to select the type of system they will
+produce code for.
+
+   If you want to _use_ a cross compiler, that generates code for a
+platform different from the build platform, you should specify the
+"host" platform (i.e., that on which the generated programs will
+eventually be run) with `--host=TYPE'.
+
+Sharing Defaults
+================
+
+   If you want to set default values for `configure' scripts to share,
+you can create a site shell script called `config.site' that gives
+default values for variables like `CC', `cache_file', and `prefix'.
+`configure' looks for `PREFIX/share/config.site' if it exists, then
+`PREFIX/etc/config.site' if it exists.  Or, you can set the
+`CONFIG_SITE' environment variable to the location of the site script.
+A warning: not all `configure' scripts look for a site script.
+
+Defining Variables
+==================
+
+   Variables not defined in a site shell script can be set in the
+environment passed to `configure'.  However, some packages may run
+configure again during the build, and the customized values of these
+variables may be lost.  In order to avoid this problem, you should set
+them in the `configure' command line, using `VAR=value'.  For example:
+
+     ./configure CC=/usr/local2/bin/gcc
+
+will cause the specified gcc to be used as the C compiler (unless it is
+overridden in the site shell script).
+
+`configure' Invocation
+======================
+
+   `configure' recognizes the following options to control how it
+operates.
+
+`--help'
+`-h'
+     Print a summary of the options to `configure', and exit.
+
+`--version'
+`-V'
+     Print the version of Autoconf used to generate the `configure'
+     script, and exit.
+
+`--cache-file=FILE'
+     Enable the cache: use and save the results of the tests in FILE,
+     traditionally `config.cache'.  FILE defaults to `/dev/null' to
+     disable caching.
+
+`--config-cache'
+`-C'
+     Alias for `--cache-file=config.cache'.
+
+`--quiet'
+`--silent'
+`-q'
+     Do not print messages saying which checks are being made.  To
+     suppress all normal output, redirect it to `/dev/null' (any error
+     messages will still be shown).
+
+`--srcdir=DIR'
+     Look for the package's source code in directory DIR.  Usually
+     `configure' can determine that directory automatically.
+
+`configure' also accepts some other, not widely useful, options.  Run
+`configure --help' for more details.
+
diff --git a/tools/platforms/msp430/cppbsl/Makefile.am b/tools/platforms/msp430/cppbsl/Makefile.am
new file mode 100644
index 00000000..2f1c0729
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/Makefile.am
@@ -0,0 +1,12 @@
+## Makefile.am -- Process this file with automake to produce Makefile.in
+## Makefile.am
+
+MAINTAINERCLEANFILES = aclocal.m4 config.h.in configure Makefile.in *~
+
+SUBDIRS = config src . #   
+#bin_PROGRAMS=mobfwtest
+#mobfwtest_SOURCES=
+#mobfwtest_LDADD=src/libmobfwtest.la
+
+
+
diff --git a/tools/platforms/msp430/cppbsl/Makefile.in b/tools/platforms/msp430/cppbsl/Makefile.in
new file mode 100644
index 00000000..eb862d93
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/Makefile.in
@@ -0,0 +1,603 @@
+# Makefile.in generated by automake 1.10.1 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008  Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+VPATH = @srcdir@
+pkgdatadir = $(datadir)/@PACKAGE@
+pkglibdir = $(libdir)/@PACKAGE@
+pkgincludedir = $(includedir)/@PACKAGE@
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
+install_sh_PROGRAM = $(install_sh) -c
+install_sh_SCRIPT = $(install_sh) -c
+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+subdir = .
+DIST_COMMON = README $(am__configure_deps) $(srcdir)/Makefile.am \
+	$(srcdir)/Makefile.in $(srcdir)/config.h.in \
+	$(top_srcdir)/configure AUTHORS COPYING ChangeLog INSTALL NEWS
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
+am__aclocal_m4_deps = $(top_srcdir)/configure.in
+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
+	$(ACLOCAL_M4)
+am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
+ configure.lineno config.status.lineno
+mkinstalldirs = $(install_sh) -d
+CONFIG_HEADER = config.h
+CONFIG_CLEAN_FILES =
+SOURCES =
+DIST_SOURCES =
+RECURSIVE_TARGETS = all-recursive check-recursive dvi-recursive \
+	html-recursive info-recursive install-data-recursive \
+	install-dvi-recursive install-exec-recursive \
+	install-html-recursive install-info-recursive \
+	install-pdf-recursive install-ps-recursive install-recursive \
+	installcheck-recursive installdirs-recursive pdf-recursive \
+	ps-recursive uninstall-recursive
+RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive	\
+  distclean-recursive maintainer-clean-recursive
+ETAGS = etags
+CTAGS = ctags
+DIST_SUBDIRS = $(SUBDIRS)
+DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST)
+distdir = $(PACKAGE)-$(VERSION)
+top_distdir = $(distdir)
+am__remove_distdir = \
+  { test ! -d $(distdir) \
+    || { find $(distdir) -type d ! -perm -200 -exec chmod u+w {} ';' \
+         && rm -fr $(distdir); }; }
+DIST_ARCHIVES = $(distdir).tar.gz
+GZIP_ENV = --best
+distuninstallcheck_listfiles = find . -type f -print
+distcleancheck_listfiles = find . -type f -print
+ACLOCAL = @ACLOCAL@
+AMTAR = @AMTAR@
+AUTOCONF = @AUTOCONF@
+AUTOHEADER = @AUTOHEADER@
+AUTOMAKE = @AUTOMAKE@
+AWK = @AWK@
+CC = @CC@
+CCDEPMODE = @CCDEPMODE@
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+CPP = @CPP@
+CPPFLAGS = @CPPFLAGS@
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+CXXDEPMODE = @CXXDEPMODE@
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+CYGPATH_W = @CYGPATH_W@
+DEFS = @DEFS@
+DEPDIR = @DEPDIR@
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+INSTALL = @INSTALL@
+INSTALL_DATA = @INSTALL_DATA@
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+INSTALL_SCRIPT = @INSTALL_SCRIPT@
+INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
+LDFLAGS = @LDFLAGS@
+LIBOBJS = @LIBOBJS@
+LIBS = @LIBS@
+LTLIBOBJS = @LTLIBOBJS@
+MAKEINFO = @MAKEINFO@
+MKDIR_P = @MKDIR_P@
+OBJEXT = @OBJEXT@
+PACKAGE = @PACKAGE@
+PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
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diff --git a/tools/platforms/msp430/cppbsl/NEWS b/tools/platforms/msp430/cppbsl/NEWS
new file mode 100644
index 00000000..e69de29b
diff --git a/tools/platforms/msp430/cppbsl/README b/tools/platforms/msp430/cppbsl/README
new file mode 100644
index 00000000..16341683
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/README
@@ -0,0 +1,47 @@
+bsltool is a C++ based tool that can reset, erase and flash msp430 CPUs with a
+bootstrap loader of version 1.6 or higher. Your should be able to use it for
+telosb, tmote sky and eyesIFXv2 node platforms.
+
+bsltool provides only a very basic set of functions, it can not be used for
+debug purposes like the full blown bsl.py. For the basic tasks like reset, erase
+and flash an Intel Hex file it can be used as a drop-in replacement for bsl.py
+from the mspgcc tool chain or tos-bsl from the tinyos-2 tool chain.
+
+On resource limited devices like the NSLU2 it delivers higher performance and
+allows you to flash images on more than two nodes at once, which can lead to a
+significant gain in time compared with the python version. Due to the reduced
+CPU load its impact on other running processes is much lower than the python
+version. 
+
+However, this is a specialized tool and may not work under all conditions.
+
+You should make sure that you have:
+1. the GNU C++ compiler like g++ to compile the tool
+2. little endian byte order on the executing host 
+3. \n (new line) appearing somewhere at the end of the line in the intel hex file
+4. the image to flash as an Intel Hex (TI text is not yet supported)
+5. msp430 CPUs with a bootstrap loader version higher or equal to 1.6 
+
+Trouble Shooting:
+
+If your host needs something different for 2. and 4.: tell me. 
+
+1. Node should be supported (telosb, eyesIFXv2)
+
+   Can not flash (but erase and transmit password work): 
+   Maybe the flash memory of the node is corrupt.
+
+   ... to be extended ;-)
+
+2. Unsupported MSP430 MCU
+   - Check BSL version with some other tool
+   - Check schematic assumed by bsl.py and your schematic, if TEST and RESET are
+     swapped implement your own ...Serial (see Serial.h)
+   - Play with --invert-test, --invert-reset
+
+   ... you are somewhat on your own here.
+
+This tool works great for me!
+
+Happy flashing, Andreas
+
diff --git a/tools/platforms/msp430/cppbsl/aclocal.m4 b/tools/platforms/msp430/cppbsl/aclocal.m4
new file mode 100644
index 00000000..d57c8f6f
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/aclocal.m4
@@ -0,0 +1,880 @@
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+# Check to see how 'make' treats includes.	            -*- Autoconf -*-
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+   am__quote=
+   _am_result=GNU
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+if test "$am__include" = "#"; then
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+      _am_result=BSD
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+AC_SUBST([am__include])
+AC_SUBST([am__quote])
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+# Fake the existence of programs that GNU maintainers use.  -*- Autoconf -*-
+
+# Copyright (C) 1997, 1999, 2000, 2001, 2003, 2004, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
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+# serial 5
+
+# AM_MISSING_PROG(NAME, PROGRAM)
+# ------------------------------
+AC_DEFUN([AM_MISSING_PROG],
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+# AM_MISSING_HAS_RUN
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+# Copyright (C) 2003, 2004, 2005, 2006  Free Software Foundation, Inc.
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+# Copyright (C) 2001, 2002, 2003, 2005  Free Software Foundation, Inc.
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+# Free Software Foundation, Inc.
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+# Check how to create a tarball.                            -*- Autoconf -*-
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+# serial 2
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diff --git a/tools/platforms/msp430/cppbsl/bootstrap b/tools/platforms/msp430/cppbsl/bootstrap
new file mode 100755
index 00000000..c26436c8
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/bootstrap
@@ -0,0 +1,8 @@
+#!/bin/sh
+set -x
+aclocal -I config
+# libtoolize --force --copy
+aclocal -I config
+autoheader 
+automake --gnu --add-missing --copy
+autoconf 
diff --git a/tools/platforms/msp430/cppbsl/config.h.in b/tools/platforms/msp430/cppbsl/config.h.in
new file mode 100644
index 00000000..812ccc7d
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/config.h.in
@@ -0,0 +1,125 @@
+/* config.h.in.  Generated from configure.in by autoheader.  */
+
+/* Define to 1 if you have the <fcntl.h> header file. */
+#undef HAVE_FCNTL_H
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#undef HAVE_INTTYPES_H
+
+/* Define to 1 if you have the `popt' library (-lpopt). */
+#undef HAVE_LIBPOPT
+
+/* Define to 1 if you have the <linux/version.h> header file. */
+#undef HAVE_LINUX_VERSION_H
+
+/* Define to 1 if you have the <memory.h> header file. */
+#undef HAVE_MEMORY_H
+
+/* Define to 1 if you have the <popt.h> header file. */
+#undef HAVE_POPT_H
+
+/* Define to 1 if you have the `select' function. */
+#undef HAVE_SELECT
+
+/* Define to 1 if stdbool.h conforms to C99. */
+#undef HAVE_STDBOOL_H
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#undef HAVE_STDINT_H
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#undef HAVE_STDLIB_H
+
+/* Define to 1 if you have the `strerror' function. */
+#undef HAVE_STRERROR
+
+/* Define to 1 if you have the <strings.h> header file. */
+#undef HAVE_STRINGS_H
+
+/* Define to 1 if you have the <string.h> header file. */
+#undef HAVE_STRING_H
+
+/* Define to 1 if you have the <sys/ioctl.h> header file. */
+#undef HAVE_SYS_IOCTL_H
+
+/* Define to 1 if you have the <sys/select.h> header file. */
+#undef HAVE_SYS_SELECT_H
+
+/* Define to 1 if you have the <sys/socket.h> header file. */
+#undef HAVE_SYS_SOCKET_H
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#undef HAVE_SYS_STAT_H
+
+/* Define to 1 if you have the <sys/time.h> header file. */
+#undef HAVE_SYS_TIME_H
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#undef HAVE_SYS_TYPES_H
+
+/* Define to 1 if you have the <termios.h> header file. */
+#undef HAVE_TERMIOS_H
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#undef HAVE_UNISTD_H
+
+/* Define to 1 if the system has the type `_Bool'. */
+#undef HAVE__BOOL
+
+/* Name of package */
+#undef PACKAGE
+
+/* Define to the address where bug reports for this package should be sent. */
+#undef PACKAGE_BUGREPORT
+
+/* Define to the full name of this package. */
+#undef PACKAGE_NAME
+
+/* Define to the full name and version of this package. */
+#undef PACKAGE_STRING
+
+/* Define to the one symbol short name of this package. */
+#undef PACKAGE_TARNAME
+
+/* Define to the version of this package. */
+#undef PACKAGE_VERSION
+
+/* Define to the type of arg 1 for `select'. */
+#undef SELECT_TYPE_ARG1
+
+/* Define to the type of args 2, 3 and 4 for `select'. */
+#undef SELECT_TYPE_ARG234
+
+/* Define to the type of arg 5 for `select'. */
+#undef SELECT_TYPE_ARG5
+
+/* Define to 1 if you have the ANSI C header files. */
+#undef STDC_HEADERS
+
+/* Define to 1 if you can safely include both <sys/time.h> and <time.h>. */
+#undef TIME_WITH_SYS_TIME
+
+/* Version number of package */
+#undef VERSION
+
+/* Define for Solaris 2.5.1 so the uint8_t typedef from <sys/synch.h>,
+   <pthread.h>, or <semaphore.h> is not used. If the typedef was allowed, the
+   #define below would cause a syntax error. */
+#undef _UINT8_T
+
+/* Define to empty if `const' does not conform to ANSI C. */
+#undef const
+
+/* Define to `__inline__' or `__inline' if that's what the C compiler
+   calls it, or to nothing if 'inline' is not supported under any name.  */
+#ifndef __cplusplus
+#undef inline
+#endif
+
+/* Define to the type of an unsigned integer type of width exactly 16 bits if
+   such a type exists and the standard includes do not define it. */
+#undef uint16_t
+
+/* Define to the type of an unsigned integer type of width exactly 8 bits if
+   such a type exists and the standard includes do not define it. */
+#undef uint8_t
diff --git a/tools/platforms/msp430/cppbsl/config/Makefile.am b/tools/platforms/msp430/cppbsl/config/Makefile.am
new file mode 100644
index 00000000..9c7ec3bd
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/config/Makefile.am
@@ -0,0 +1,7 @@
+## Makefile.am -- Process this file with automake to produce Makefile.in
+## config/Makefile.am
+
+MAINTAINERCLEANFILES    = Makefile.in config.guess config.sub depcomp \
+			  install-sh ltmain.sh missing \
+			mkinstalldirs *~
+
diff --git a/tools/platforms/msp430/cppbsl/config/Makefile.in b/tools/platforms/msp430/cppbsl/config/Makefile.in
new file mode 100644
index 00000000..039cb8ca
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/config/Makefile.in
@@ -0,0 +1,299 @@
+# Makefile.in generated by automake 1.10.1 from Makefile.am.
+# @configure_input@
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+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
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+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
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+
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+datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
+dvidir = @dvidir@
+exec_prefix = @exec_prefix@
+host_alias = @host_alias@
+htmldir = @htmldir@
+includedir = @includedir@
+infodir = @infodir@
+install_sh = @install_sh@
+libdir = @libdir@
+libexecdir = @libexecdir@
+localedir = @localedir@
+localstatedir = @localstatedir@
+mandir = @mandir@
+mkdir_p = @mkdir_p@
+oldincludedir = @oldincludedir@
+pdfdir = @pdfdir@
+prefix = @prefix@
+program_transform_name = @program_transform_name@
+psdir = @psdir@
+sbindir = @sbindir@
+sharedstatedir = @sharedstatedir@
+srcdir = @srcdir@
+sysconfdir = @sysconfdir@
+target_alias = @target_alias@
+top_builddir = @top_builddir@
+top_srcdir = @top_srcdir@
+MAINTAINERCLEANFILES = Makefile.in config.guess config.sub depcomp \
+			  install-sh ltmain.sh missing \
+			mkinstalldirs *~
+
+all: all-am
+
+.SUFFIXES:
+$(srcdir)/Makefile.in:  $(srcdir)/Makefile.am  $(am__configure_deps)
+	@for dep in $?; do \
+	  case '$(am__configure_deps)' in \
+	    *$$dep*) \
+	      cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \
+		&& exit 0; \
+	      exit 1;; \
+	  esac; \
+	done; \
+	echo ' cd $(top_srcdir) && $(AUTOMAKE) --gnu  config/Makefile'; \
+	cd $(top_srcdir) && \
+	  $(AUTOMAKE) --gnu  config/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+	@case '$?' in \
+	  *config.status*) \
+	    cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+	  *) \
+	    echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+	    cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+	esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+	cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure:  $(am__configure_deps)
+	cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4):  $(am__aclocal_m4_deps)
+	cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+tags: TAGS
+TAGS:
+
+ctags: CTAGS
+CTAGS:
+
+
+distdir: $(DISTFILES)
+	@srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+	topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+	list='$(DISTFILES)'; \
+	  dist_files=`for file in $$list; do echo $$file; done | \
+	  sed -e "s|^$$srcdirstrip/||;t" \
+	      -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+	case $$dist_files in \
+	  */*) $(MKDIR_P) `echo "$$dist_files" | \
+			   sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+			   sort -u` ;; \
+	esac; \
+	for file in $$dist_files; do \
+	  if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
+	  if test -d $$d/$$file; then \
+	    dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \
+	    if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
+	      cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
+	    fi; \
+	    cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
+	  else \
+	    test -f $(distdir)/$$file \
+	    || cp -p $$d/$$file $(distdir)/$$file \
+	    || exit 1; \
+	  fi; \
+	done
+check-am: all-am
+check: check-am
+all-am: Makefile
+installdirs:
+install: install-am
+install-exec: install-exec-am
+install-data: install-data-am
+uninstall: uninstall-am
+
+install-am: all-am
+	@$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+
+installcheck: installcheck-am
+install-strip:
+	$(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+	  install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+	  `test -z '$(STRIP)' || \
+	    echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+	-test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+	@echo "This command is intended for maintainers to use"
+	@echo "it deletes files that may require special tools to rebuild."
+	-test -z "$(MAINTAINERCLEANFILES)" || rm -f $(MAINTAINERCLEANFILES)
+clean: clean-am
+
+clean-am: clean-generic mostlyclean-am
+
+distclean: distclean-am
+	-rm -f Makefile
+distclean-am: clean-am distclean-generic
+
+dvi: dvi-am
+
+dvi-am:
+
+html: html-am
+
+info: info-am
+
+info-am:
+
+install-data-am:
+
+install-dvi: install-dvi-am
+
+install-exec-am:
+
+install-html: install-html-am
+
+install-info: install-info-am
+
+install-man:
+
+install-pdf: install-pdf-am
+
+install-ps: install-ps-am
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-am
+	-rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
+
+mostlyclean: mostlyclean-am
+
+mostlyclean-am: mostlyclean-generic
+
+pdf: pdf-am
+
+pdf-am:
+
+ps: ps-am
+
+ps-am:
+
+uninstall-am:
+
+.MAKE: install-am install-strip
+
+.PHONY: all all-am check check-am clean clean-generic distclean \
+	distclean-generic distdir dvi dvi-am html html-am info info-am \
+	install install-am install-data install-data-am install-dvi \
+	install-dvi-am install-exec install-exec-am install-html \
+	install-html-am install-info install-info-am install-man \
+	install-pdf install-pdf-am install-ps install-ps-am \
+	install-strip installcheck installcheck-am installdirs \
+	maintainer-clean maintainer-clean-generic mostlyclean \
+	mostlyclean-generic pdf pdf-am ps ps-am uninstall uninstall-am
+
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
diff --git a/tools/platforms/msp430/cppbsl/config/depcomp b/tools/platforms/msp430/cppbsl/config/depcomp
new file mode 100755
index 00000000..9e5522d0
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/config/depcomp
@@ -0,0 +1,520 @@
+#! /bin/sh
+# depcomp - compile a program generating dependencies as side-effects
+
+scriptversion=2003-11-08.23
+
+# Copyright (C) 1999, 2000, 2003 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+
+# As a special exception to the GNU General Public License, if you
+# distribute this file as part of a program that contains a
+# configuration script generated by Autoconf, you may include it under
+# the same distribution terms that you use for the rest of that program.
+
+# Originally written by Alexandre Oliva <oliva@dcc.unicamp.br>.
+
+case $1 in
+  '')
+     echo "$0: No command.  Try \`$0 --help' for more information." 1>&2
+     exit 1;
+     ;;
+  -h | --h*)
+    cat <<\EOF
+Usage: depcomp [--help] [--version] PROGRAM [ARGS]
+
+Run PROGRAMS ARGS to compile a file, generating dependencies
+as side-effects.
+
+Environment variables:
+  depmode     Dependency tracking mode.
+  source      Source file read by `PROGRAMS ARGS'.
+  object      Object file output by `PROGRAMS ARGS'.
+  depfile     Dependency file to output.
+  tmpdepfile  Temporary file to use when outputing dependencies.
+  libtool     Whether libtool is used (yes/no).
+
+Report bugs to <bug-automake@gnu.org>.
+EOF
+    exit 0
+    ;;
+  -v | --v*)
+    echo "depcomp $scriptversion"
+    exit 0
+    ;;
+esac
+
+if test -z "$depmode" || test -z "$source" || test -z "$object"; then
+  echo "depcomp: Variables source, object and depmode must be set" 1>&2
+  exit 1
+fi
+# `libtool' can also be set to `yes' or `no'.
+
+if test -z "$depfile"; then
+   base=`echo "$object" | sed -e 's,^.*/,,' -e 's,\.\([^.]*\)$,.P\1,'`
+   dir=`echo "$object" | sed 's,/.*$,/,'`
+   if test "$dir" = "$object"; then
+      dir=
+   fi
+   # FIXME: should be _deps on DOS.
+   depfile="$dir.deps/$base"
+fi
+
+tmpdepfile=${tmpdepfile-`echo "$depfile" | sed 's/\.\([^.]*\)$/.T\1/'`}
+
+rm -f "$tmpdepfile"
+
+# Some modes work just like other modes, but use different flags.  We
+# parameterize here, but still list the modes in the big case below,
+# to make depend.m4 easier to write.  Note that we *cannot* use a case
+# here, because this file can only contain one case statement.
+if test "$depmode" = hp; then
+  # HP compiler uses -M and no extra arg.
+  gccflag=-M
+  depmode=gcc
+fi
+
+if test "$depmode" = dashXmstdout; then
+   # This is just like dashmstdout with a different argument.
+   dashmflag=-xM
+   depmode=dashmstdout
+fi
+
+case "$depmode" in
+gcc3)
+## gcc 3 implements dependency tracking that does exactly what
+## we want.  Yay!  Note: for some reason libtool 1.4 doesn't like
+## it if -MD -MP comes after the -MF stuff.  Hmm.
+  "$@" -MT "$object" -MD -MP -MF "$tmpdepfile"
+  stat=$?
+  if test $stat -eq 0; then :
+  else
+    rm -f "$tmpdepfile"
+    exit $stat
+  fi
+  mv "$tmpdepfile" "$depfile"
+  ;;
+
+gcc)
+## There are various ways to get dependency output from gcc.  Here's
+## why we pick this rather obscure method:
+## - Don't want to use -MD because we'd like the dependencies to end
+##   up in a subdir.  Having to rename by hand is ugly.
+##   (We might end up doing this anyway to support other compilers.)
+## - The DEPENDENCIES_OUTPUT environment variable makes gcc act like
+##   -MM, not -M (despite what the docs say).
+## - Using -M directly means running the compiler twice (even worse
+##   than renaming).
+  if test -z "$gccflag"; then
+    gccflag=-MD,
+  fi
+  "$@" -Wp,"$gccflag$tmpdepfile"
+  stat=$?
+  if test $stat -eq 0; then :
+  else
+    rm -f "$tmpdepfile"
+    exit $stat
+  fi
+  rm -f "$depfile"
+  echo "$object : \\" > "$depfile"
+  alpha=ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz
+## The second -e expression handles DOS-style file names with drive letters.
+  sed -e 's/^[^:]*: / /' \
+      -e 's/^['$alpha']:\/[^:]*: / /' < "$tmpdepfile" >> "$depfile"
+## This next piece of magic avoids the `deleted header file' problem.
+## The problem is that when a header file which appears in a .P file
+## is deleted, the dependency causes make to die (because there is
+## typically no way to rebuild the header).  We avoid this by adding
+## dummy dependencies for each header file.  Too bad gcc doesn't do
+## this for us directly.
+  tr ' ' '
+' < "$tmpdepfile" |
+## Some versions of gcc put a space before the `:'.  On the theory
+## that the space means something, we add a space to the output as
+## well.
+## Some versions of the HPUX 10.20 sed can't process this invocation
+## correctly.  Breaking it into two sed invocations is a workaround.
+    sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' | sed -e 's/$/ :/' >> "$depfile"
+  rm -f "$tmpdepfile"
+  ;;
+
+hp)
+  # This case exists only to let depend.m4 do its work.  It works by
+  # looking at the text of this script.  This case will never be run,
+  # since it is checked for above.
+  exit 1
+  ;;
+
+sgi)
+  if test "$libtool" = yes; then
+    "$@" "-Wp,-MDupdate,$tmpdepfile"
+  else
+    "$@" -MDupdate "$tmpdepfile"
+  fi
+  stat=$?
+  if test $stat -eq 0; then :
+  else
+    rm -f "$tmpdepfile"
+    exit $stat
+  fi
+  rm -f "$depfile"
+
+  if test -f "$tmpdepfile"; then  # yes, the sourcefile depend on other files
+    echo "$object : \\" > "$depfile"
+
+    # Clip off the initial element (the dependent).  Don't try to be
+    # clever and replace this with sed code, as IRIX sed won't handle
+    # lines with more than a fixed number of characters (4096 in
+    # IRIX 6.2 sed, 8192 in IRIX 6.5).  We also remove comment lines;
+    # the IRIX cc adds comments like `#:fec' to the end of the
+    # dependency line.
+    tr ' ' '
+' < "$tmpdepfile" \
+    | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' | \
+    tr '
+' ' ' >> $depfile
+    echo >> $depfile
+
+    # The second pass generates a dummy entry for each header file.
+    tr ' ' '
+' < "$tmpdepfile" \
+   | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' -e 's/$/:/' \
+   >> $depfile
+  else
+    # The sourcefile does not contain any dependencies, so just
+    # store a dummy comment line, to avoid errors with the Makefile
+    # "include basename.Plo" scheme.
+    echo "#dummy" > "$depfile"
+  fi
+  rm -f "$tmpdepfile"
+  ;;
+
+aix)
+  # The C for AIX Compiler uses -M and outputs the dependencies
+  # in a .u file.  In older versions, this file always lives in the
+  # current directory.  Also, the AIX compiler puts `$object:' at the
+  # start of each line; $object doesn't have directory information.
+  # Version 6 uses the directory in both cases.
+  stripped=`echo "$object" | sed 's/\(.*\)\..*$/\1/'`
+  tmpdepfile="$stripped.u"
+  if test "$libtool" = yes; then
+    "$@" -Wc,-M
+  else
+    "$@" -M
+  fi
+  stat=$?
+
+  if test -f "$tmpdepfile"; then :
+  else
+    stripped=`echo "$stripped" | sed 's,^.*/,,'`
+    tmpdepfile="$stripped.u"
+  fi
+
+  if test $stat -eq 0; then :
+  else
+    rm -f "$tmpdepfile"
+    exit $stat
+  fi
+
+  if test -f "$tmpdepfile"; then
+    outname="$stripped.o"
+    # Each line is of the form `foo.o: dependent.h'.
+    # Do two passes, one to just change these to
+    # `$object: dependent.h' and one to simply `dependent.h:'.
+    sed -e "s,^$outname:,$object :," < "$tmpdepfile" > "$depfile"
+    sed -e "s,^$outname: \(.*\)$,\1:," < "$tmpdepfile" >> "$depfile"
+  else
+    # The sourcefile does not contain any dependencies, so just
+    # store a dummy comment line, to avoid errors with the Makefile
+    # "include basename.Plo" scheme.
+    echo "#dummy" > "$depfile"
+  fi
+  rm -f "$tmpdepfile"
+  ;;
+
+icc)
+  # Intel's C compiler understands `-MD -MF file'.  However on
+  #    icc -MD -MF foo.d -c -o sub/foo.o sub/foo.c
+  # ICC 7.0 will fill foo.d with something like
+  #    foo.o: sub/foo.c
+  #    foo.o: sub/foo.h
+  # which is wrong.  We want:
+  #    sub/foo.o: sub/foo.c
+  #    sub/foo.o: sub/foo.h
+  #    sub/foo.c:
+  #    sub/foo.h:
+  # ICC 7.1 will output
+  #    foo.o: sub/foo.c sub/foo.h
+  # and will wrap long lines using \ :
+  #    foo.o: sub/foo.c ... \
+  #     sub/foo.h ... \
+  #     ...
+
+  "$@" -MD -MF "$tmpdepfile"
+  stat=$?
+  if test $stat -eq 0; then :
+  else
+    rm -f "$tmpdepfile"
+    exit $stat
+  fi
+  rm -f "$depfile"
+  # Each line is of the form `foo.o: dependent.h',
+  # or `foo.o: dep1.h dep2.h \', or ` dep3.h dep4.h \'.
+  # Do two passes, one to just change these to
+  # `$object: dependent.h' and one to simply `dependent.h:'.
+  sed "s,^[^:]*:,$object :," < "$tmpdepfile" > "$depfile"
+  # Some versions of the HPUX 10.20 sed can't process this invocation
+  # correctly.  Breaking it into two sed invocations is a workaround.
+  sed 's,^[^:]*: \(.*\)$,\1,;s/^\\$//;/^$/d;/:$/d' < "$tmpdepfile" |
+    sed -e 's/$/ :/' >> "$depfile"
+  rm -f "$tmpdepfile"
+  ;;
+
+tru64)
+   # The Tru64 compiler uses -MD to generate dependencies as a side
+   # effect.  `cc -MD -o foo.o ...' puts the dependencies into `foo.o.d'.
+   # At least on Alpha/Redhat 6.1, Compaq CCC V6.2-504 seems to put
+   # dependencies in `foo.d' instead, so we check for that too.
+   # Subdirectories are respected.
+   dir=`echo "$object" | sed -e 's|/[^/]*$|/|'`
+   test "x$dir" = "x$object" && dir=
+   base=`echo "$object" | sed -e 's|^.*/||' -e 's/\.o$//' -e 's/\.lo$//'`
+
+   if test "$libtool" = yes; then
+      tmpdepfile1="$dir.libs/$base.lo.d"
+      tmpdepfile2="$dir.libs/$base.d"
+      "$@" -Wc,-MD
+   else
+      tmpdepfile1="$dir$base.o.d"
+      tmpdepfile2="$dir$base.d"
+      "$@" -MD
+   fi
+
+   stat=$?
+   if test $stat -eq 0; then :
+   else
+      rm -f "$tmpdepfile1" "$tmpdepfile2"
+      exit $stat
+   fi
+
+   if test -f "$tmpdepfile1"; then
+      tmpdepfile="$tmpdepfile1"
+   else
+      tmpdepfile="$tmpdepfile2"
+   fi
+   if test -f "$tmpdepfile"; then
+      sed -e "s,^.*\.[a-z]*:,$object:," < "$tmpdepfile" > "$depfile"
+      # That's a tab and a space in the [].
+      sed -e 's,^.*\.[a-z]*:[	 ]*,,' -e 's,$,:,' < "$tmpdepfile" >> "$depfile"
+   else
+      echo "#dummy" > "$depfile"
+   fi
+   rm -f "$tmpdepfile"
+   ;;
+
+#nosideeffect)
+  # This comment above is used by automake to tell side-effect
+  # dependency tracking mechanisms from slower ones.
+
+dashmstdout)
+  # Important note: in order to support this mode, a compiler *must*
+  # always write the preprocessed file to stdout, regardless of -o.
+  "$@" || exit $?
+
+  # Remove the call to Libtool.
+  if test "$libtool" = yes; then
+    while test $1 != '--mode=compile'; do
+      shift
+    done
+    shift
+  fi
+
+  # Remove `-o $object'.
+  IFS=" "
+  for arg
+  do
+    case $arg in
+    -o)
+      shift
+      ;;
+    $object)
+      shift
+      ;;
+    *)
+      set fnord "$@" "$arg"
+      shift # fnord
+      shift # $arg
+      ;;
+    esac
+  done
+
+  test -z "$dashmflag" && dashmflag=-M
+  # Require at least two characters before searching for `:'
+  # in the target name.  This is to cope with DOS-style filenames:
+  # a dependency such as `c:/foo/bar' could be seen as target `c' otherwise.
+  "$@" $dashmflag |
+    sed 's:^[  ]*[^: ][^:][^:]*\:[    ]*:'"$object"'\: :' > "$tmpdepfile"
+  rm -f "$depfile"
+  cat < "$tmpdepfile" > "$depfile"
+  tr ' ' '
+' < "$tmpdepfile" | \
+## Some versions of the HPUX 10.20 sed can't process this invocation
+## correctly.  Breaking it into two sed invocations is a workaround.
+    sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' | sed -e 's/$/ :/' >> "$depfile"
+  rm -f "$tmpdepfile"
+  ;;
+
+dashXmstdout)
+  # This case only exists to satisfy depend.m4.  It is never actually
+  # run, as this mode is specially recognized in the preamble.
+  exit 1
+  ;;
+
+makedepend)
+  "$@" || exit $?
+  # Remove any Libtool call
+  if test "$libtool" = yes; then
+    while test $1 != '--mode=compile'; do
+      shift
+    done
+    shift
+  fi
+  # X makedepend
+  shift
+  cleared=no
+  for arg in "$@"; do
+    case $cleared in
+    no)
+      set ""; shift
+      cleared=yes ;;
+    esac
+    case "$arg" in
+    -D*|-I*)
+      set fnord "$@" "$arg"; shift ;;
+    # Strip any option that makedepend may not understand.  Remove
+    # the object too, otherwise makedepend will parse it as a source file.
+    -*|$object)
+      ;;
+    *)
+      set fnord "$@" "$arg"; shift ;;
+    esac
+  done
+  obj_suffix="`echo $object | sed 's/^.*\././'`"
+  touch "$tmpdepfile"
+  ${MAKEDEPEND-makedepend} -o"$obj_suffix" -f"$tmpdepfile" "$@"
+  rm -f "$depfile"
+  cat < "$tmpdepfile" > "$depfile"
+  sed '1,2d' "$tmpdepfile" | tr ' ' '
+' | \
+## Some versions of the HPUX 10.20 sed can't process this invocation
+## correctly.  Breaking it into two sed invocations is a workaround.
+    sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' | sed -e 's/$/ :/' >> "$depfile"
+  rm -f "$tmpdepfile" "$tmpdepfile".bak
+  ;;
+
+cpp)
+  # Important note: in order to support this mode, a compiler *must*
+  # always write the preprocessed file to stdout.
+  "$@" || exit $?
+
+  # Remove the call to Libtool.
+  if test "$libtool" = yes; then
+    while test $1 != '--mode=compile'; do
+      shift
+    done
+    shift
+  fi
+
+  # Remove `-o $object'.
+  IFS=" "
+  for arg
+  do
+    case $arg in
+    -o)
+      shift
+      ;;
+    $object)
+      shift
+      ;;
+    *)
+      set fnord "$@" "$arg"
+      shift # fnord
+      shift # $arg
+      ;;
+    esac
+  done
+
+  "$@" -E |
+    sed -n '/^# [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' |
+    sed '$ s: \\$::' > "$tmpdepfile"
+  rm -f "$depfile"
+  echo "$object : \\" > "$depfile"
+  cat < "$tmpdepfile" >> "$depfile"
+  sed < "$tmpdepfile" '/^$/d;s/^ //;s/ \\$//;s/$/ :/' >> "$depfile"
+  rm -f "$tmpdepfile"
+  ;;
+
+msvisualcpp)
+  # Important note: in order to support this mode, a compiler *must*
+  # always write the preprocessed file to stdout, regardless of -o,
+  # because we must use -o when running libtool.
+  "$@" || exit $?
+  IFS=" "
+  for arg
+  do
+    case "$arg" in
+    "-Gm"|"/Gm"|"-Gi"|"/Gi"|"-ZI"|"/ZI")
+	set fnord "$@"
+	shift
+	shift
+	;;
+    *)
+	set fnord "$@" "$arg"
+	shift
+	shift
+	;;
+    esac
+  done
+  "$@" -E |
+  sed -n '/^#line [0-9][0-9]* "\([^"]*\)"/ s::echo "`cygpath -u \\"\1\\"`":p' | sort | uniq > "$tmpdepfile"
+  rm -f "$depfile"
+  echo "$object : \\" > "$depfile"
+  . "$tmpdepfile" | sed 's% %\\ %g' | sed -n '/^\(.*\)$/ s::	\1 \\:p' >> "$depfile"
+  echo "	" >> "$depfile"
+  . "$tmpdepfile" | sed 's% %\\ %g' | sed -n '/^\(.*\)$/ s::\1\::p' >> "$depfile"
+  rm -f "$tmpdepfile"
+  ;;
+
+none)
+  exec "$@"
+  ;;
+
+*)
+  echo "Unknown depmode $depmode" 1>&2
+  exit 1
+  ;;
+esac
+
+exit 0
+
+# Local Variables:
+# mode: shell-script
+# sh-indentation: 2
+# eval: (add-hook 'write-file-hooks 'time-stamp)
+# time-stamp-start: "scriptversion="
+# time-stamp-format: "%:y-%02m-%02d.%02H"
+# time-stamp-end: "$"
+# End:
diff --git a/tools/platforms/msp430/cppbsl/config/install-sh b/tools/platforms/msp430/cppbsl/config/install-sh
new file mode 100755
index 00000000..77bc3814
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/config/install-sh
@@ -0,0 +1,316 @@
+#!/bin/sh
+# install - install a program, script, or datafile
+
+scriptversion=2004-02-15.20
+
+# This originates from X11R5 (mit/util/scripts/install.sh), which was
+# later released in X11R6 (xc/config/util/install.sh) with the
+# following copyright and license.
+#
+# Copyright (C) 1994 X Consortium
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to
+# deal in the Software without restriction, including without limitation the
+# rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+# sell copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+# X CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
+# AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNEC-
+# TION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+#
+# Except as contained in this notice, the name of the X Consortium shall not
+# be used in advertising or otherwise to promote the sale, use or other deal-
+# ings in this Software without prior written authorization from the X Consor-
+# tium.
+#
+#
+# FSF changes to this file are in the public domain.
+#
+# Calling this script install-sh is preferred over install.sh, to prevent
+# `make' implicit rules from creating a file called install from it
+# when there is no Makefile.
+#
+# This script is compatible with the BSD install script, but was written
+# from scratch.  It can only install one file at a time, a restriction
+# shared with many OS's install programs.
+
+# set DOITPROG to echo to test this script
+
+# Don't use :- since 4.3BSD and earlier shells don't like it.
+doit="${DOITPROG-}"
+
+# put in absolute paths if you don't have them in your path; or use env. vars.
+
+mvprog="${MVPROG-mv}"
+cpprog="${CPPROG-cp}"
+chmodprog="${CHMODPROG-chmod}"
+chownprog="${CHOWNPROG-chown}"
+chgrpprog="${CHGRPPROG-chgrp}"
+stripprog="${STRIPPROG-strip}"
+rmprog="${RMPROG-rm}"
+mkdirprog="${MKDIRPROG-mkdir}"
+
+transformbasename=
+transform_arg=
+instcmd="$mvprog"
+chmodcmd="$chmodprog 0755"
+chowncmd=
+chgrpcmd=
+stripcmd=
+rmcmd="$rmprog -f"
+mvcmd="$mvprog"
+src=
+dst=
+dir_arg=
+
+usage="Usage: $0 [OPTION]... SRCFILE DSTFILE
+   or: $0 [OPTION]... SRCFILES... DIRECTORY
+   or: $0 -d DIRECTORIES...
+
+In the first form, install SRCFILE to DSTFILE, removing SRCFILE by default.
+In the second, create the directory path DIR.
+
+Options:
+-b=TRANSFORMBASENAME
+-c         copy source (using $cpprog) instead of moving (using $mvprog).
+-d         create directories instead of installing files.
+-g GROUP   $chgrp installed files to GROUP.
+-m MODE    $chmod installed files to MODE.
+-o USER    $chown installed files to USER.
+-s         strip installed files (using $stripprog).
+-t=TRANSFORM
+--help     display this help and exit.
+--version  display version info and exit.
+
+Environment variables override the default commands:
+  CHGRPPROG CHMODPROG CHOWNPROG CPPROG MKDIRPROG MVPROG RMPROG STRIPPROG
+"
+
+while test -n "$1"; do
+  case $1 in
+    -b=*) transformbasename=`echo $1 | sed 's/-b=//'`
+        shift
+        continue;;
+
+    -c) instcmd=$cpprog
+        shift
+        continue;;
+
+    -d) dir_arg=true
+        shift
+        continue;;
+
+    -g) chgrpcmd="$chgrpprog $2"
+        shift
+        shift
+        continue;;
+
+    --help) echo "$usage"; exit 0;;
+
+    -m) chmodcmd="$chmodprog $2"
+        shift
+        shift
+        continue;;
+
+    -o) chowncmd="$chownprog $2"
+        shift
+        shift
+        continue;;
+
+    -s) stripcmd=$stripprog
+        shift
+        continue;;
+
+    -t=*) transformarg=`echo $1 | sed 's/-t=//'`
+        shift
+        continue;;
+
+    --version) echo "$0 $scriptversion"; exit 0;;
+
+    *)  # When -d is used, all remaining arguments are directories to create.
+	test -n "$dir_arg" && break
+        # Otherwise, the last argument is the destination.  Remove it from $@.
+	for arg
+	do
+          if test -n "$dstarg"; then
+	    # $@ is not empty: it contains at least $arg.
+	    set fnord "$@" "$dstarg"
+	    shift # fnord
+	  fi
+	  shift # arg
+	  dstarg=$arg
+	done
+	break;;
+  esac
+done
+
+if test -z "$1"; then
+  if test -z "$dir_arg"; then
+    echo "$0: no input file specified." >&2
+    exit 1
+  fi
+  # It's OK to call `install-sh -d' without argument.
+  # This can happen when creating conditional directories.
+  exit 0
+fi
+
+for src
+do
+  # Protect names starting with `-'.
+  case $src in
+    -*) src=./$src ;;
+  esac
+
+  if test -n "$dir_arg"; then
+    dst=$src
+    src=
+
+    if test -d "$dst"; then
+      instcmd=:
+      chmodcmd=
+    else
+      instcmd=$mkdirprog
+    fi
+  else
+    # Waiting for this to be detected by the "$instcmd $src $dsttmp" command
+    # might cause directories to be created, which would be especially bad
+    # if $src (and thus $dsttmp) contains '*'.
+    if test ! -f "$src" && test ! -d "$src"; then
+      echo "$0: $src does not exist." >&2
+      exit 1
+    fi
+
+    if test -z "$dstarg"; then
+      echo "$0: no destination specified." >&2
+      exit 1
+    fi
+
+    dst=$dstarg
+    # Protect names starting with `-'.
+    case $dst in
+      -*) dst=./$dst ;;
+    esac
+
+    # If destination is a directory, append the input filename; won't work
+    # if double slashes aren't ignored.
+    if test -d "$dst"; then
+      dst=$dst/`basename "$src"`
+    fi
+  fi
+
+  # This sed command emulates the dirname command.
+  dstdir=`echo "$dst" | sed -e 's,[^/]*$,,;s,/$,,;s,^$,.,'`
+
+  # Make sure that the destination directory exists.
+
+  # Skip lots of stat calls in the usual case.
+  if test ! -d "$dstdir"; then
+    defaultIFS='
+	 '
+    IFS="${IFS-$defaultIFS}"
+
+    oIFS=$IFS
+    # Some sh's can't handle IFS=/ for some reason.
+    IFS='%'
+    set - `echo "$dstdir" | sed -e 's@/@%@g' -e 's@^%@/@'`
+    IFS=$oIFS
+
+    pathcomp=
+
+    while test $# -ne 0 ; do
+      pathcomp=$pathcomp$1
+      shift
+      if test ! -d "$pathcomp"; then
+        $mkdirprog "$pathcomp" || lasterr=$?
+	# mkdir can fail with a `File exist' error in case several
+	# install-sh are creating the directory concurrently.  This
+	# is OK.
+	test ! -d "$pathcomp" && { (exit ${lasterr-1}); exit; }
+      fi
+      pathcomp=$pathcomp/
+    done
+  fi
+
+  if test -n "$dir_arg"; then
+    $doit $instcmd "$dst" \
+      && { test -z "$chowncmd" || $doit $chowncmd "$dst"; } \
+      && { test -z "$chgrpcmd" || $doit $chgrpcmd "$dst"; } \
+      && { test -z "$stripcmd" || $doit $stripcmd "$dst"; } \
+      && { test -z "$chmodcmd" || $doit $chmodcmd "$dst"; }
+
+  else
+    # If we're going to rename the final executable, determine the name now.
+    if test -z "$transformarg"; then
+      dstfile=`basename "$dst"`
+    else
+      dstfile=`basename "$dst" $transformbasename \
+               | sed $transformarg`$transformbasename
+    fi
+
+    # don't allow the sed command to completely eliminate the filename.
+    test -z "$dstfile" && dstfile=`basename "$dst"`
+
+    # Make a couple of temp file names in the proper directory.
+    dsttmp=$dstdir/_inst.$$_
+    rmtmp=$dstdir/_rm.$$_
+
+    # Trap to clean up those temp files at exit.
+    trap 'status=$?; rm -f "$dsttmp" "$rmtmp" && exit $status' 0
+    trap '(exit $?); exit' 1 2 13 15
+
+    # Move or copy the file name to the temp name
+    $doit $instcmd "$src" "$dsttmp" &&
+
+    # and set any options; do chmod last to preserve setuid bits.
+    #
+    # If any of these fail, we abort the whole thing.  If we want to
+    # ignore errors from any of these, just make sure not to ignore
+    # errors from the above "$doit $instcmd $src $dsttmp" command.
+    #
+    { test -z "$chowncmd" || $doit $chowncmd "$dsttmp"; } \
+      && { test -z "$chgrpcmd" || $doit $chgrpcmd "$dsttmp"; } \
+      && { test -z "$stripcmd" || $doit $stripcmd "$dsttmp"; } \
+      && { test -z "$chmodcmd" || $doit $chmodcmd "$dsttmp"; } &&
+
+    # Now remove or move aside any old file at destination location.  We
+    # try this two ways since rm can't unlink itself on some systems and
+    # the destination file might be busy for other reasons.  In this case,
+    # the final cleanup might fail but the new file should still install
+    # successfully.
+    {
+      if test -f "$dstdir/$dstfile"; then
+        $doit $rmcmd -f "$dstdir/$dstfile" 2>/dev/null \
+        || $doit $mvcmd -f "$dstdir/$dstfile" "$rmtmp" 2>/dev/null \
+        || {
+	  echo "$0: cannot unlink or rename $dstdir/$dstfile" >&2
+	  (exit 1); exit
+        }
+      else
+        :
+      fi
+    } &&
+
+    # Now rename the file to the real destination.
+    $doit $mvcmd "$dsttmp" "$dstdir/$dstfile"
+  fi || { (exit 1); exit; }
+done
+
+# The final little trick to "correctly" pass the exit status to the exit trap.
+{
+  (exit 0); exit
+}
+
+# Local variables:
+# eval: (add-hook 'write-file-hooks 'time-stamp)
+# time-stamp-start: "scriptversion="
+# time-stamp-format: "%:y-%02m-%02d.%02H"
+# time-stamp-end: "$"
+# End:
diff --git a/tools/platforms/msp430/cppbsl/config/missing b/tools/platforms/msp430/cppbsl/config/missing
new file mode 100755
index 00000000..e7ef83a1
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/config/missing
@@ -0,0 +1,360 @@
+#! /bin/sh
+# Common stub for a few missing GNU programs while installing.
+
+scriptversion=2003-09-02.23
+
+# Copyright (C) 1996, 1997, 1999, 2000, 2002, 2003 
+#   Free Software Foundation, Inc.
+# Originally by Fran,cois Pinard <pinard@iro.umontreal.ca>, 1996.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+
+# As a special exception to the GNU General Public License, if you
+# distribute this file as part of a program that contains a
+# configuration script generated by Autoconf, you may include it under
+# the same distribution terms that you use for the rest of that program.
+
+if test $# -eq 0; then
+  echo 1>&2 "Try \`$0 --help' for more information"
+  exit 1
+fi
+
+run=:
+
+# In the cases where this matters, `missing' is being run in the
+# srcdir already.
+if test -f configure.ac; then
+  configure_ac=configure.ac
+else
+  configure_ac=configure.in
+fi
+
+msg="missing on your system"
+
+case "$1" in
+--run)
+  # Try to run requested program, and just exit if it succeeds.
+  run=
+  shift
+  "$@" && exit 0
+  # Exit code 63 means version mismatch.  This often happens
+  # when the user try to use an ancient version of a tool on
+  # a file that requires a minimum version.  In this case we
+  # we should proceed has if the program had been absent, or
+  # if --run hadn't been passed.
+  if test $? = 63; then
+    run=:
+    msg="probably too old"
+  fi
+  ;;
+esac
+
+# If it does not exist, or fails to run (possibly an outdated version),
+# try to emulate it.
+case "$1" in
+
+  -h|--h|--he|--hel|--help)
+    echo "\
+$0 [OPTION]... PROGRAM [ARGUMENT]...
+
+Handle \`PROGRAM [ARGUMENT]...' for when PROGRAM is missing, or return an
+error status if there is no known handling for PROGRAM.
+
+Options:
+  -h, --help      display this help and exit
+  -v, --version   output version information and exit
+  --run           try to run the given command, and emulate it if it fails
+
+Supported PROGRAM values:
+  aclocal      touch file \`aclocal.m4'
+  autoconf     touch file \`configure'
+  autoheader   touch file \`config.h.in'
+  automake     touch all \`Makefile.in' files
+  bison        create \`y.tab.[ch]', if possible, from existing .[ch]
+  flex         create \`lex.yy.c', if possible, from existing .c
+  help2man     touch the output file
+  lex          create \`lex.yy.c', if possible, from existing .c
+  makeinfo     touch the output file
+  tar          try tar, gnutar, gtar, then tar without non-portable flags
+  yacc         create \`y.tab.[ch]', if possible, from existing .[ch]
+
+Send bug reports to <bug-automake@gnu.org>."
+    ;;
+
+  -v|--v|--ve|--ver|--vers|--versi|--versio|--version)
+    echo "missing $scriptversion (GNU Automake)"
+    ;;
+
+  -*)
+    echo 1>&2 "$0: Unknown \`$1' option"
+    echo 1>&2 "Try \`$0 --help' for more information"
+    exit 1
+    ;;
+
+  aclocal*)
+    if test -z "$run" && ($1 --version) > /dev/null 2>&1; then
+       # We have it, but it failed.
+       exit 1
+    fi
+
+    echo 1>&2 "\
+WARNING: \`$1' is $msg.  You should only need it if
+         you modified \`acinclude.m4' or \`${configure_ac}'.  You might want
+         to install the \`Automake' and \`Perl' packages.  Grab them from
+         any GNU archive site."
+    touch aclocal.m4
+    ;;
+
+  autoconf)
+    if test -z "$run" && ($1 --version) > /dev/null 2>&1; then
+       # We have it, but it failed.
+       exit 1
+    fi
+
+    echo 1>&2 "\
+WARNING: \`$1' is $msg.  You should only need it if
+         you modified \`${configure_ac}'.  You might want to install the
+         \`Autoconf' and \`GNU m4' packages.  Grab them from any GNU
+         archive site."
+    touch configure
+    ;;
+
+  autoheader)
+    if test -z "$run" && ($1 --version) > /dev/null 2>&1; then
+       # We have it, but it failed.
+       exit 1
+    fi
+
+    echo 1>&2 "\
+WARNING: \`$1' is $msg.  You should only need it if
+         you modified \`acconfig.h' or \`${configure_ac}'.  You might want
+         to install the \`Autoconf' and \`GNU m4' packages.  Grab them
+         from any GNU archive site."
+    files=`sed -n 's/^[ ]*A[CM]_CONFIG_HEADER(\([^)]*\)).*/\1/p' ${configure_ac}`
+    test -z "$files" && files="config.h"
+    touch_files=
+    for f in $files; do
+      case "$f" in
+      *:*) touch_files="$touch_files "`echo "$f" |
+				       sed -e 's/^[^:]*://' -e 's/:.*//'`;;
+      *) touch_files="$touch_files $f.in";;
+      esac
+    done
+    touch $touch_files
+    ;;
+
+  automake*)
+    if test -z "$run" && ($1 --version) > /dev/null 2>&1; then
+       # We have it, but it failed.
+       exit 1
+    fi
+
+    echo 1>&2 "\
+WARNING: \`$1' is $msg.  You should only need it if
+         you modified \`Makefile.am', \`acinclude.m4' or \`${configure_ac}'.
+         You might want to install the \`Automake' and \`Perl' packages.
+         Grab them from any GNU archive site."
+    find . -type f -name Makefile.am -print |
+	   sed 's/\.am$/.in/' |
+	   while read f; do touch "$f"; done
+    ;;
+
+  autom4te)
+    if test -z "$run" && ($1 --version) > /dev/null 2>&1; then
+       # We have it, but it failed.
+       exit 1
+    fi
+
+    echo 1>&2 "\
+WARNING: \`$1' is needed, but is $msg.
+         You might have modified some files without having the
+         proper tools for further handling them.
+         You can get \`$1' as part of \`Autoconf' from any GNU
+         archive site."
+
+    file=`echo "$*" | sed -n 's/.*--output[ =]*\([^ ]*\).*/\1/p'`
+    test -z "$file" && file=`echo "$*" | sed -n 's/.*-o[ ]*\([^ ]*\).*/\1/p'`
+    if test -f "$file"; then
+	touch $file
+    else
+	test -z "$file" || exec >$file
+	echo "#! /bin/sh"
+	echo "# Created by GNU Automake missing as a replacement of"
+	echo "#  $ $@"
+	echo "exit 0"
+	chmod +x $file
+	exit 1
+    fi
+    ;;
+
+  bison|yacc)
+    echo 1>&2 "\
+WARNING: \`$1' $msg.  You should only need it if
+         you modified a \`.y' file.  You may need the \`Bison' package
+         in order for those modifications to take effect.  You can get
+         \`Bison' from any GNU archive site."
+    rm -f y.tab.c y.tab.h
+    if [ $# -ne 1 ]; then
+        eval LASTARG="\${$#}"
+	case "$LASTARG" in
+	*.y)
+	    SRCFILE=`echo "$LASTARG" | sed 's/y$/c/'`
+	    if [ -f "$SRCFILE" ]; then
+	         cp "$SRCFILE" y.tab.c
+	    fi
+	    SRCFILE=`echo "$LASTARG" | sed 's/y$/h/'`
+	    if [ -f "$SRCFILE" ]; then
+	         cp "$SRCFILE" y.tab.h
+	    fi
+	  ;;
+	esac
+    fi
+    if [ ! -f y.tab.h ]; then
+	echo >y.tab.h
+    fi
+    if [ ! -f y.tab.c ]; then
+	echo 'main() { return 0; }' >y.tab.c
+    fi
+    ;;
+
+  lex|flex)
+    echo 1>&2 "\
+WARNING: \`$1' is $msg.  You should only need it if
+         you modified a \`.l' file.  You may need the \`Flex' package
+         in order for those modifications to take effect.  You can get
+         \`Flex' from any GNU archive site."
+    rm -f lex.yy.c
+    if [ $# -ne 1 ]; then
+        eval LASTARG="\${$#}"
+	case "$LASTARG" in
+	*.l)
+	    SRCFILE=`echo "$LASTARG" | sed 's/l$/c/'`
+	    if [ -f "$SRCFILE" ]; then
+	         cp "$SRCFILE" lex.yy.c
+	    fi
+	  ;;
+	esac
+    fi
+    if [ ! -f lex.yy.c ]; then
+	echo 'main() { return 0; }' >lex.yy.c
+    fi
+    ;;
+
+  help2man)
+    if test -z "$run" && ($1 --version) > /dev/null 2>&1; then
+       # We have it, but it failed.
+       exit 1
+    fi
+
+    echo 1>&2 "\
+WARNING: \`$1' is $msg.  You should only need it if
+	 you modified a dependency of a manual page.  You may need the
+	 \`Help2man' package in order for those modifications to take
+	 effect.  You can get \`Help2man' from any GNU archive site."
+
+    file=`echo "$*" | sed -n 's/.*-o \([^ ]*\).*/\1/p'`
+    if test -z "$file"; then
+	file=`echo "$*" | sed -n 's/.*--output=\([^ ]*\).*/\1/p'`
+    fi
+    if [ -f "$file" ]; then
+	touch $file
+    else
+	test -z "$file" || exec >$file
+	echo ".ab help2man is required to generate this page"
+	exit 1
+    fi
+    ;;
+
+  makeinfo)
+    if test -z "$run" && (makeinfo --version) > /dev/null 2>&1; then
+       # We have makeinfo, but it failed.
+       exit 1
+    fi
+
+    echo 1>&2 "\
+WARNING: \`$1' is $msg.  You should only need it if
+         you modified a \`.texi' or \`.texinfo' file, or any other file
+         indirectly affecting the aspect of the manual.  The spurious
+         call might also be the consequence of using a buggy \`make' (AIX,
+         DU, IRIX).  You might want to install the \`Texinfo' package or
+         the \`GNU make' package.  Grab either from any GNU archive site."
+    file=`echo "$*" | sed -n 's/.*-o \([^ ]*\).*/\1/p'`
+    if test -z "$file"; then
+      file=`echo "$*" | sed 's/.* \([^ ]*\) *$/\1/'`
+      file=`sed -n '/^@setfilename/ { s/.* \([^ ]*\) *$/\1/; p; q; }' $file`
+    fi
+    touch $file
+    ;;
+
+  tar)
+    shift
+    if test -n "$run"; then
+      echo 1>&2 "ERROR: \`tar' requires --run"
+      exit 1
+    fi
+
+    # We have already tried tar in the generic part.
+    # Look for gnutar/gtar before invocation to avoid ugly error
+    # messages.
+    if (gnutar --version > /dev/null 2>&1); then
+       gnutar "$@" && exit 0
+    fi
+    if (gtar --version > /dev/null 2>&1); then
+       gtar "$@" && exit 0
+    fi
+    firstarg="$1"
+    if shift; then
+	case "$firstarg" in
+	*o*)
+	    firstarg=`echo "$firstarg" | sed s/o//`
+	    tar "$firstarg" "$@" && exit 0
+	    ;;
+	esac
+	case "$firstarg" in
+	*h*)
+	    firstarg=`echo "$firstarg" | sed s/h//`
+	    tar "$firstarg" "$@" && exit 0
+	    ;;
+	esac
+    fi
+
+    echo 1>&2 "\
+WARNING: I can't seem to be able to run \`tar' with the given arguments.
+         You may want to install GNU tar or Free paxutils, or check the
+         command line arguments."
+    exit 1
+    ;;
+
+  *)
+    echo 1>&2 "\
+WARNING: \`$1' is needed, and is $msg.
+         You might have modified some files without having the
+         proper tools for further handling them.  Check the \`README' file,
+         it often tells you about the needed prerequisites for installing
+         this package.  You may also peek at any GNU archive site, in case
+         some other package would contain this missing \`$1' program."
+    exit 1
+    ;;
+esac
+
+exit 0
+
+# Local variables:
+# eval: (add-hook 'write-file-hooks 'time-stamp)
+# time-stamp-start: "scriptversion="
+# time-stamp-format: "%:y-%02m-%02d.%02H"
+# time-stamp-end: "$"
+# End:
diff --git a/tools/platforms/msp430/cppbsl/configure b/tools/platforms/msp430/cppbsl/configure
new file mode 100755
index 00000000..4cf4ea2c
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/configure
@@ -0,0 +1,7061 @@
+#! /bin/sh
+# Guess values for system-dependent variables and create Makefiles.
+# Generated by GNU Autoconf 2.61 for cppbsl 0.1.
+#
+# Report bugs to <koepke@tkn.tu-berlin.de>.
+#
+# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
+# 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
+# This configure script is free software; the Free Software Foundation
+# gives unlimited permission to copy, distribute and modify it.
+## --------------------- ##
+## M4sh Initialization.  ##
+## --------------------- ##
+
+# Be more Bourne compatible
+DUALCASE=1; export DUALCASE # for MKS sh
+if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then
+  emulate sh
+  NULLCMD=:
+  # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which
+  # is contrary to our usage.  Disable this feature.
+  alias -g '${1+"$@"}'='"$@"'
+  setopt NO_GLOB_SUBST
+else
+  case `(set -o) 2>/dev/null` in
+  *posix*) set -o posix ;;
+esac
+
+fi
+
+
+
+
+# PATH needs CR
+# Avoid depending upon Character Ranges.
+as_cr_letters='abcdefghijklmnopqrstuvwxyz'
+as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
+as_cr_Letters=$as_cr_letters$as_cr_LETTERS
+as_cr_digits='0123456789'
+as_cr_alnum=$as_cr_Letters$as_cr_digits
+
+# The user is always right.
+if test "${PATH_SEPARATOR+set}" != set; then
+  echo "#! /bin/sh" >conf$$.sh
+  echo  "exit 0"   >>conf$$.sh
+  chmod +x conf$$.sh
+  if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then
+    PATH_SEPARATOR=';'
+  else
+    PATH_SEPARATOR=:
+  fi
+  rm -f conf$$.sh
+fi
+
+# Support unset when possible.
+if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then
+  as_unset=unset
+else
+  as_unset=false
+fi
+
+
+# IFS
+# We need space, tab and new line, in precisely that order.  Quoting is
+# there to prevent editors from complaining about space-tab.
+# (If _AS_PATH_WALK were called with IFS unset, it would disable word
+# splitting by setting IFS to empty value.)
+as_nl='
+'
+IFS=" ""	$as_nl"
+
+# Find who we are.  Look in the path if we contain no directory separator.
+case $0 in
+  *[\\/]* ) as_myself=$0 ;;
+  *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break
+done
+IFS=$as_save_IFS
+
+     ;;
+esac
+# We did not find ourselves, most probably we were run as `sh COMMAND'
+# in which case we are not to be found in the path.
+if test "x$as_myself" = x; then
+  as_myself=$0
+fi
+if test ! -f "$as_myself"; then
+  echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2
+  { (exit 1); exit 1; }
+fi
+
+# Work around bugs in pre-3.0 UWIN ksh.
+for as_var in ENV MAIL MAILPATH
+do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var
+done
+PS1='$ '
+PS2='> '
+PS4='+ '
+
+# NLS nuisances.
+for as_var in \
+  LANG LANGUAGE LC_ADDRESS LC_ALL LC_COLLATE LC_CTYPE LC_IDENTIFICATION \
+  LC_MEASUREMENT LC_MESSAGES LC_MONETARY LC_NAME LC_NUMERIC LC_PAPER \
+  LC_TELEPHONE LC_TIME
+do
+  if (set +x; test -z "`(eval $as_var=C; export $as_var) 2>&1`"); then
+    eval $as_var=C; export $as_var
+  else
+    ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var
+  fi
+done
+
+# Required to use basename.
+if expr a : '\(a\)' >/dev/null 2>&1 &&
+   test "X`expr 00001 : '.*\(...\)'`" = X001; then
+  as_expr=expr
+else
+  as_expr=false
+fi
+
+if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then
+  as_basename=basename
+else
+  as_basename=false
+fi
+
+
+# Name of the executable.
+as_me=`$as_basename -- "$0" ||
+$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \
+	 X"$0" : 'X\(//\)$' \| \
+	 X"$0" : 'X\(/\)' \| . 2>/dev/null ||
+echo X/"$0" |
+    sed '/^.*\/\([^/][^/]*\)\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\/\(\/\/\)$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\/\(\/\).*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+
+# CDPATH.
+$as_unset CDPATH
+
+
+if test "x$CONFIG_SHELL" = x; then
+  if (eval ":") 2>/dev/null; then
+  as_have_required=yes
+else
+  as_have_required=no
+fi
+
+  if test $as_have_required = yes && 	 (eval ":
+(as_func_return () {
+  (exit \$1)
+}
+as_func_success () {
+  as_func_return 0
+}
+as_func_failure () {
+  as_func_return 1
+}
+as_func_ret_success () {
+  return 0
+}
+as_func_ret_failure () {
+  return 1
+}
+
+exitcode=0
+if as_func_success; then
+  :
+else
+  exitcode=1
+  echo as_func_success failed.
+fi
+
+if as_func_failure; then
+  exitcode=1
+  echo as_func_failure succeeded.
+fi
+
+if as_func_ret_success; then
+  :
+else
+  exitcode=1
+  echo as_func_ret_success failed.
+fi
+
+if as_func_ret_failure; then
+  exitcode=1
+  echo as_func_ret_failure succeeded.
+fi
+
+if ( set x; as_func_ret_success y && test x = \"\$1\" ); then
+  :
+else
+  exitcode=1
+  echo positional parameters were not saved.
+fi
+
+test \$exitcode = 0) || { (exit 1); exit 1; }
+
+(
+  as_lineno_1=\$LINENO
+  as_lineno_2=\$LINENO
+  test \"x\$as_lineno_1\" != \"x\$as_lineno_2\" &&
+  test \"x\`expr \$as_lineno_1 + 1\`\" = \"x\$as_lineno_2\") || { (exit 1); exit 1; }
+") 2> /dev/null; then
+  :
+else
+  as_candidate_shells=
+    as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in /bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  case $as_dir in
+	 /*)
+	   for as_base in sh bash ksh sh5; do
+	     as_candidate_shells="$as_candidate_shells $as_dir/$as_base"
+	   done;;
+       esac
+done
+IFS=$as_save_IFS
+
+
+      for as_shell in $as_candidate_shells $SHELL; do
+	 # Try only shells that exist, to save several forks.
+	 if { test -f "$as_shell" || test -f "$as_shell.exe"; } &&
+		{ ("$as_shell") 2> /dev/null <<\_ASEOF
+if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then
+  emulate sh
+  NULLCMD=:
+  # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which
+  # is contrary to our usage.  Disable this feature.
+  alias -g '${1+"$@"}'='"$@"'
+  setopt NO_GLOB_SUBST
+else
+  case `(set -o) 2>/dev/null` in
+  *posix*) set -o posix ;;
+esac
+
+fi
+
+
+:
+_ASEOF
+}; then
+  CONFIG_SHELL=$as_shell
+	       as_have_required=yes
+	       if { "$as_shell" 2> /dev/null <<\_ASEOF
+if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then
+  emulate sh
+  NULLCMD=:
+  # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which
+  # is contrary to our usage.  Disable this feature.
+  alias -g '${1+"$@"}'='"$@"'
+  setopt NO_GLOB_SUBST
+else
+  case `(set -o) 2>/dev/null` in
+  *posix*) set -o posix ;;
+esac
+
+fi
+
+
+:
+(as_func_return () {
+  (exit $1)
+}
+as_func_success () {
+  as_func_return 0
+}
+as_func_failure () {
+  as_func_return 1
+}
+as_func_ret_success () {
+  return 0
+}
+as_func_ret_failure () {
+  return 1
+}
+
+exitcode=0
+if as_func_success; then
+  :
+else
+  exitcode=1
+  echo as_func_success failed.
+fi
+
+if as_func_failure; then
+  exitcode=1
+  echo as_func_failure succeeded.
+fi
+
+if as_func_ret_success; then
+  :
+else
+  exitcode=1
+  echo as_func_ret_success failed.
+fi
+
+if as_func_ret_failure; then
+  exitcode=1
+  echo as_func_ret_failure succeeded.
+fi
+
+if ( set x; as_func_ret_success y && test x = "$1" ); then
+  :
+else
+  exitcode=1
+  echo positional parameters were not saved.
+fi
+
+test $exitcode = 0) || { (exit 1); exit 1; }
+
+(
+  as_lineno_1=$LINENO
+  as_lineno_2=$LINENO
+  test "x$as_lineno_1" != "x$as_lineno_2" &&
+  test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2") || { (exit 1); exit 1; }
+
+_ASEOF
+}; then
+  break
+fi
+
+fi
+
+      done
+
+      if test "x$CONFIG_SHELL" != x; then
+  for as_var in BASH_ENV ENV
+        do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var
+        done
+        export CONFIG_SHELL
+        exec "$CONFIG_SHELL" "$as_myself" ${1+"$@"}
+fi
+
+
+    if test $as_have_required = no; then
+  echo This script requires a shell more modern than all the
+      echo shells that I found on your system.  Please install a
+      echo modern shell, or manually run the script under such a
+      echo shell if you do have one.
+      { (exit 1); exit 1; }
+fi
+
+
+fi
+
+fi
+
+
+
+(eval "as_func_return () {
+  (exit \$1)
+}
+as_func_success () {
+  as_func_return 0
+}
+as_func_failure () {
+  as_func_return 1
+}
+as_func_ret_success () {
+  return 0
+}
+as_func_ret_failure () {
+  return 1
+}
+
+exitcode=0
+if as_func_success; then
+  :
+else
+  exitcode=1
+  echo as_func_success failed.
+fi
+
+if as_func_failure; then
+  exitcode=1
+  echo as_func_failure succeeded.
+fi
+
+if as_func_ret_success; then
+  :
+else
+  exitcode=1
+  echo as_func_ret_success failed.
+fi
+
+if as_func_ret_failure; then
+  exitcode=1
+  echo as_func_ret_failure succeeded.
+fi
+
+if ( set x; as_func_ret_success y && test x = \"\$1\" ); then
+  :
+else
+  exitcode=1
+  echo positional parameters were not saved.
+fi
+
+test \$exitcode = 0") || {
+  echo No shell found that supports shell functions.
+  echo Please tell autoconf@gnu.org about your system,
+  echo including any error possibly output before this
+  echo message
+}
+
+
+
+  as_lineno_1=$LINENO
+  as_lineno_2=$LINENO
+  test "x$as_lineno_1" != "x$as_lineno_2" &&
+  test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2" || {
+
+  # Create $as_me.lineno as a copy of $as_myself, but with $LINENO
+  # uniformly replaced by the line number.  The first 'sed' inserts a
+  # line-number line after each line using $LINENO; the second 'sed'
+  # does the real work.  The second script uses 'N' to pair each
+  # line-number line with the line containing $LINENO, and appends
+  # trailing '-' during substitution so that $LINENO is not a special
+  # case at line end.
+  # (Raja R Harinath suggested sed '=', and Paul Eggert wrote the
+  # scripts with optimization help from Paolo Bonzini.  Blame Lee
+  # E. McMahon (1931-1989) for sed's syntax.  :-)
+  sed -n '
+    p
+    /[$]LINENO/=
+  ' <$as_myself |
+    sed '
+      s/[$]LINENO.*/&-/
+      t lineno
+      b
+      :lineno
+      N
+      :loop
+      s/[$]LINENO\([^'$as_cr_alnum'_].*\n\)\(.*\)/\2\1\2/
+      t loop
+      s/-\n.*//
+    ' >$as_me.lineno &&
+  chmod +x "$as_me.lineno" ||
+    { echo "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2
+   { (exit 1); exit 1; }; }
+
+  # Don't try to exec as it changes $[0], causing all sort of problems
+  # (the dirname of $[0] is not the place where we might find the
+  # original and so on.  Autoconf is especially sensitive to this).
+  . "./$as_me.lineno"
+  # Exit status is that of the last command.
+  exit
+}
+
+
+if (as_dir=`dirname -- /` && test "X$as_dir" = X/) >/dev/null 2>&1; then
+  as_dirname=dirname
+else
+  as_dirname=false
+fi
+
+ECHO_C= ECHO_N= ECHO_T=
+case `echo -n x` in
+-n*)
+  case `echo 'x\c'` in
+  *c*) ECHO_T='	';;	# ECHO_T is single tab character.
+  *)   ECHO_C='\c';;
+  esac;;
+*)
+  ECHO_N='-n';;
+esac
+
+if expr a : '\(a\)' >/dev/null 2>&1 &&
+   test "X`expr 00001 : '.*\(...\)'`" = X001; then
+  as_expr=expr
+else
+  as_expr=false
+fi
+
+rm -f conf$$ conf$$.exe conf$$.file
+if test -d conf$$.dir; then
+  rm -f conf$$.dir/conf$$.file
+else
+  rm -f conf$$.dir
+  mkdir conf$$.dir
+fi
+echo >conf$$.file
+if ln -s conf$$.file conf$$ 2>/dev/null; then
+  as_ln_s='ln -s'
+  # ... but there are two gotchas:
+  # 1) On MSYS, both `ln -s file dir' and `ln file dir' fail.
+  # 2) DJGPP < 2.04 has no symlinks; `ln -s' creates a wrapper executable.
+  # In both cases, we have to default to `cp -p'.
+  ln -s conf$$.file conf$$.dir 2>/dev/null && test ! -f conf$$.exe ||
+    as_ln_s='cp -p'
+elif ln conf$$.file conf$$ 2>/dev/null; then
+  as_ln_s=ln
+else
+  as_ln_s='cp -p'
+fi
+rm -f conf$$ conf$$.exe conf$$.dir/conf$$.file conf$$.file
+rmdir conf$$.dir 2>/dev/null
+
+if mkdir -p . 2>/dev/null; then
+  as_mkdir_p=:
+else
+  test -d ./-p && rmdir ./-p
+  as_mkdir_p=false
+fi
+
+if test -x / >/dev/null 2>&1; then
+  as_test_x='test -x'
+else
+  if ls -dL / >/dev/null 2>&1; then
+    as_ls_L_option=L
+  else
+    as_ls_L_option=
+  fi
+  as_test_x='
+    eval sh -c '\''
+      if test -d "$1"; then
+        test -d "$1/.";
+      else
+	case $1 in
+        -*)set "./$1";;
+	esac;
+	case `ls -ld'$as_ls_L_option' "$1" 2>/dev/null` in
+	???[sx]*):;;*)false;;esac;fi
+    '\'' sh
+  '
+fi
+as_executable_p=$as_test_x
+
+# Sed expression to map a string onto a valid CPP name.
+as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'"
+
+# Sed expression to map a string onto a valid variable name.
+as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'"
+
+
+
+exec 7<&0 </dev/null 6>&1
+
+# Name of the host.
+# hostname on some systems (SVR3.2, Linux) returns a bogus exit status,
+# so uname gets run too.
+ac_hostname=`(hostname || uname -n) 2>/dev/null | sed 1q`
+
+#
+# Initializations.
+#
+ac_default_prefix=/usr/local
+ac_clean_files=
+ac_config_libobj_dir=.
+LIBOBJS=
+cross_compiling=no
+subdirs=
+MFLAGS=
+MAKEFLAGS=
+SHELL=${CONFIG_SHELL-/bin/sh}
+
+# Identity of this package.
+PACKAGE_NAME='cppbsl'
+PACKAGE_TARNAME='cppbsl'
+PACKAGE_VERSION='0.1'
+PACKAGE_STRING='cppbsl 0.1'
+PACKAGE_BUGREPORT='koepke@tkn.tu-berlin.de'
+
+ac_unique_file="src"
+# Factoring default headers for most tests.
+ac_includes_default="\
+#include <stdio.h>
+#ifdef HAVE_SYS_TYPES_H
+# include <sys/types.h>
+#endif
+#ifdef HAVE_SYS_STAT_H
+# include <sys/stat.h>
+#endif
+#ifdef STDC_HEADERS
+# include <stdlib.h>
+# include <stddef.h>
+#else
+# ifdef HAVE_STDLIB_H
+#  include <stdlib.h>
+# endif
+#endif
+#ifdef HAVE_STRING_H
+# if !defined STDC_HEADERS && defined HAVE_MEMORY_H
+#  include <memory.h>
+# endif
+# include <string.h>
+#endif
+#ifdef HAVE_STRINGS_H
+# include <strings.h>
+#endif
+#ifdef HAVE_INTTYPES_H
+# include <inttypes.h>
+#endif
+#ifdef HAVE_STDINT_H
+# include <stdint.h>
+#endif
+#ifdef HAVE_UNISTD_H
+# include <unistd.h>
+#endif"
+
+ac_subst_vars='SHELL
+PATH_SEPARATOR
+PACKAGE_NAME
+PACKAGE_TARNAME
+PACKAGE_VERSION
+PACKAGE_STRING
+PACKAGE_BUGREPORT
+exec_prefix
+prefix
+program_transform_name
+bindir
+sbindir
+libexecdir
+datarootdir
+datadir
+sysconfdir
+sharedstatedir
+localstatedir
+includedir
+oldincludedir
+docdir
+infodir
+htmldir
+dvidir
+pdfdir
+psdir
+libdir
+localedir
+mandir
+DEFS
+ECHO_C
+ECHO_N
+ECHO_T
+LIBS
+build_alias
+host_alias
+target_alias
+INSTALL_PROGRAM
+INSTALL_SCRIPT
+INSTALL_DATA
+am__isrc
+CYGPATH_W
+PACKAGE
+VERSION
+ACLOCAL
+AUTOCONF
+AUTOMAKE
+AUTOHEADER
+MAKEINFO
+install_sh
+STRIP
+INSTALL_STRIP_PROGRAM
+mkdir_p
+AWK
+SET_MAKE
+am__leading_dot
+AMTAR
+am__tar
+am__untar
+CC
+CFLAGS
+LDFLAGS
+CPPFLAGS
+ac_ct_CC
+EXEEXT
+OBJEXT
+DEPDIR
+am__include
+am__quote
+AMDEP_TRUE
+AMDEP_FALSE
+AMDEPBACKSLASH
+CCDEPMODE
+am__fastdepCC_TRUE
+am__fastdepCC_FALSE
+CPP
+CXX
+CXXFLAGS
+ac_ct_CXX
+CXXDEPMODE
+am__fastdepCXX_TRUE
+am__fastdepCXX_FALSE
+GREP
+EGREP
+LIBOBJS
+LTLIBOBJS'
+ac_subst_files=''
+      ac_precious_vars='build_alias
+host_alias
+target_alias
+CC
+CFLAGS
+LDFLAGS
+LIBS
+CPPFLAGS
+CPP
+CXX
+CXXFLAGS
+CCC'
+
+
+# Initialize some variables set by options.
+ac_init_help=
+ac_init_version=false
+# The variables have the same names as the options, with
+# dashes changed to underlines.
+cache_file=/dev/null
+exec_prefix=NONE
+no_create=
+no_recursion=
+prefix=NONE
+program_prefix=NONE
+program_suffix=NONE
+program_transform_name=s,x,x,
+silent=
+site=
+srcdir=
+verbose=
+x_includes=NONE
+x_libraries=NONE
+
+# Installation directory options.
+# These are left unexpanded so users can "make install exec_prefix=/foo"
+# and all the variables that are supposed to be based on exec_prefix
+# by default will actually change.
+# Use braces instead of parens because sh, perl, etc. also accept them.
+# (The list follows the same order as the GNU Coding Standards.)
+bindir='${exec_prefix}/bin'
+sbindir='${exec_prefix}/sbin'
+libexecdir='${exec_prefix}/libexec'
+datarootdir='${prefix}/share'
+datadir='${datarootdir}'
+sysconfdir='${prefix}/etc'
+sharedstatedir='${prefix}/com'
+localstatedir='${prefix}/var'
+includedir='${prefix}/include'
+oldincludedir='/usr/include'
+docdir='${datarootdir}/doc/${PACKAGE_TARNAME}'
+infodir='${datarootdir}/info'
+htmldir='${docdir}'
+dvidir='${docdir}'
+pdfdir='${docdir}'
+psdir='${docdir}'
+libdir='${exec_prefix}/lib'
+localedir='${datarootdir}/locale'
+mandir='${datarootdir}/man'
+
+ac_prev=
+ac_dashdash=
+for ac_option
+do
+  # If the previous option needs an argument, assign it.
+  if test -n "$ac_prev"; then
+    eval $ac_prev=\$ac_option
+    ac_prev=
+    continue
+  fi
+
+  case $ac_option in
+  *=*)	ac_optarg=`expr "X$ac_option" : '[^=]*=\(.*\)'` ;;
+  *)	ac_optarg=yes ;;
+  esac
+
+  # Accept the important Cygnus configure options, so we can diagnose typos.
+
+  case $ac_dashdash$ac_option in
+  --)
+    ac_dashdash=yes ;;
+
+  -bindir | --bindir | --bindi | --bind | --bin | --bi)
+    ac_prev=bindir ;;
+  -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
+    bindir=$ac_optarg ;;
+
+  -build | --build | --buil | --bui | --bu)
+    ac_prev=build_alias ;;
+  -build=* | --build=* | --buil=* | --bui=* | --bu=*)
+    build_alias=$ac_optarg ;;
+
+  -cache-file | --cache-file | --cache-fil | --cache-fi \
+  | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
+    ac_prev=cache_file ;;
+  -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
+  | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
+    cache_file=$ac_optarg ;;
+
+  --config-cache | -C)
+    cache_file=config.cache ;;
+
+  -datadir | --datadir | --datadi | --datad)
+    ac_prev=datadir ;;
+  -datadir=* | --datadir=* | --datadi=* | --datad=*)
+    datadir=$ac_optarg ;;
+
+  -datarootdir | --datarootdir | --datarootdi | --datarootd | --dataroot \
+  | --dataroo | --dataro | --datar)
+    ac_prev=datarootdir ;;
+  -datarootdir=* | --datarootdir=* | --datarootdi=* | --datarootd=* \
+  | --dataroot=* | --dataroo=* | --dataro=* | --datar=*)
+    datarootdir=$ac_optarg ;;
+
+  -disable-* | --disable-*)
+    ac_feature=`expr "x$ac_option" : 'x-*disable-\(.*\)'`
+    # Reject names that are not valid shell variable names.
+    expr "x$ac_feature" : ".*[^-._$as_cr_alnum]" >/dev/null &&
+      { echo "$as_me: error: invalid feature name: $ac_feature" >&2
+   { (exit 1); exit 1; }; }
+    ac_feature=`echo $ac_feature | sed 's/[-.]/_/g'`
+    eval enable_$ac_feature=no ;;
+
+  -docdir | --docdir | --docdi | --doc | --do)
+    ac_prev=docdir ;;
+  -docdir=* | --docdir=* | --docdi=* | --doc=* | --do=*)
+    docdir=$ac_optarg ;;
+
+  -dvidir | --dvidir | --dvidi | --dvid | --dvi | --dv)
+    ac_prev=dvidir ;;
+  -dvidir=* | --dvidir=* | --dvidi=* | --dvid=* | --dvi=* | --dv=*)
+    dvidir=$ac_optarg ;;
+
+  -enable-* | --enable-*)
+    ac_feature=`expr "x$ac_option" : 'x-*enable-\([^=]*\)'`
+    # Reject names that are not valid shell variable names.
+    expr "x$ac_feature" : ".*[^-._$as_cr_alnum]" >/dev/null &&
+      { echo "$as_me: error: invalid feature name: $ac_feature" >&2
+   { (exit 1); exit 1; }; }
+    ac_feature=`echo $ac_feature | sed 's/[-.]/_/g'`
+    eval enable_$ac_feature=\$ac_optarg ;;
+
+  -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
+  | --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \
+  | --exec | --exe | --ex)
+    ac_prev=exec_prefix ;;
+  -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
+  | --exec-pref=* | --exec-pre=* | --exec-pr=* | --exec-p=* | --exec-=* \
+  | --exec=* | --exe=* | --ex=*)
+    exec_prefix=$ac_optarg ;;
+
+  -gas | --gas | --ga | --g)
+    # Obsolete; use --with-gas.
+    with_gas=yes ;;
+
+  -help | --help | --hel | --he | -h)
+    ac_init_help=long ;;
+  -help=r* | --help=r* | --hel=r* | --he=r* | -hr*)
+    ac_init_help=recursive ;;
+  -help=s* | --help=s* | --hel=s* | --he=s* | -hs*)
+    ac_init_help=short ;;
+
+  -host | --host | --hos | --ho)
+    ac_prev=host_alias ;;
+  -host=* | --host=* | --hos=* | --ho=*)
+    host_alias=$ac_optarg ;;
+
+  -htmldir | --htmldir | --htmldi | --htmld | --html | --htm | --ht)
+    ac_prev=htmldir ;;
+  -htmldir=* | --htmldir=* | --htmldi=* | --htmld=* | --html=* | --htm=* \
+  | --ht=*)
+    htmldir=$ac_optarg ;;
+
+  -includedir | --includedir | --includedi | --included | --include \
+  | --includ | --inclu | --incl | --inc)
+    ac_prev=includedir ;;
+  -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
+  | --includ=* | --inclu=* | --incl=* | --inc=*)
+    includedir=$ac_optarg ;;
+
+  -infodir | --infodir | --infodi | --infod | --info | --inf)
+    ac_prev=infodir ;;
+  -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
+    infodir=$ac_optarg ;;
+
+  -libdir | --libdir | --libdi | --libd)
+    ac_prev=libdir ;;
+  -libdir=* | --libdir=* | --libdi=* | --libd=*)
+    libdir=$ac_optarg ;;
+
+  -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
+  | --libexe | --libex | --libe)
+    ac_prev=libexecdir ;;
+  -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
+  | --libexe=* | --libex=* | --libe=*)
+    libexecdir=$ac_optarg ;;
+
+  -localedir | --localedir | --localedi | --localed | --locale)
+    ac_prev=localedir ;;
+  -localedir=* | --localedir=* | --localedi=* | --localed=* | --locale=*)
+    localedir=$ac_optarg ;;
+
+  -localstatedir | --localstatedir | --localstatedi | --localstated \
+  | --localstate | --localstat | --localsta | --localst | --locals)
+    ac_prev=localstatedir ;;
+  -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
+  | --localstate=* | --localstat=* | --localsta=* | --localst=* | --locals=*)
+    localstatedir=$ac_optarg ;;
+
+  -mandir | --mandir | --mandi | --mand | --man | --ma | --m)
+    ac_prev=mandir ;;
+  -mandir=* | --mandir=* | --mandi=* | --mand=* | --man=* | --ma=* | --m=*)
+    mandir=$ac_optarg ;;
+
+  -nfp | --nfp | --nf)
+    # Obsolete; use --without-fp.
+    with_fp=no ;;
+
+  -no-create | --no-create | --no-creat | --no-crea | --no-cre \
+  | --no-cr | --no-c | -n)
+    no_create=yes ;;
+
+  -no-recursion | --no-recursion | --no-recursio | --no-recursi \
+  | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r)
+    no_recursion=yes ;;
+
+  -oldincludedir | --oldincludedir | --oldincludedi | --oldincluded \
+  | --oldinclude | --oldinclud | --oldinclu | --oldincl | --oldinc \
+  | --oldin | --oldi | --old | --ol | --o)
+    ac_prev=oldincludedir ;;
+  -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
+  | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
+  | --oldin=* | --oldi=* | --old=* | --ol=* | --o=*)
+    oldincludedir=$ac_optarg ;;
+
+  -prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
+    ac_prev=prefix ;;
+  -prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
+    prefix=$ac_optarg ;;
+
+  -program-prefix | --program-prefix | --program-prefi | --program-pref \
+  | --program-pre | --program-pr | --program-p)
+    ac_prev=program_prefix ;;
+  -program-prefix=* | --program-prefix=* | --program-prefi=* \
+  | --program-pref=* | --program-pre=* | --program-pr=* | --program-p=*)
+    program_prefix=$ac_optarg ;;
+
+  -program-suffix | --program-suffix | --program-suffi | --program-suff \
+  | --program-suf | --program-su | --program-s)
+    ac_prev=program_suffix ;;
+  -program-suffix=* | --program-suffix=* | --program-suffi=* \
+  | --program-suff=* | --program-suf=* | --program-su=* | --program-s=*)
+    program_suffix=$ac_optarg ;;
+
+  -program-transform-name | --program-transform-name \
+  | --program-transform-nam | --program-transform-na \
+  | --program-transform-n | --program-transform- \
+  | --program-transform | --program-transfor \
+  | --program-transfo | --program-transf \
+  | --program-trans | --program-tran \
+  | --progr-tra | --program-tr | --program-t)
+    ac_prev=program_transform_name ;;
+  -program-transform-name=* | --program-transform-name=* \
+  | --program-transform-nam=* | --program-transform-na=* \
+  | --program-transform-n=* | --program-transform-=* \
+  | --program-transform=* | --program-transfor=* \
+  | --program-transfo=* | --program-transf=* \
+  | --program-trans=* | --program-tran=* \
+  | --progr-tra=* | --program-tr=* | --program-t=*)
+    program_transform_name=$ac_optarg ;;
+
+  -pdfdir | --pdfdir | --pdfdi | --pdfd | --pdf | --pd)
+    ac_prev=pdfdir ;;
+  -pdfdir=* | --pdfdir=* | --pdfdi=* | --pdfd=* | --pdf=* | --pd=*)
+    pdfdir=$ac_optarg ;;
+
+  -psdir | --psdir | --psdi | --psd | --ps)
+    ac_prev=psdir ;;
+  -psdir=* | --psdir=* | --psdi=* | --psd=* | --ps=*)
+    psdir=$ac_optarg ;;
+
+  -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+  | -silent | --silent | --silen | --sile | --sil)
+    silent=yes ;;
+
+  -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
+    ac_prev=sbindir ;;
+  -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
+  | --sbi=* | --sb=*)
+    sbindir=$ac_optarg ;;
+
+  -sharedstatedir | --sharedstatedir | --sharedstatedi \
+  | --sharedstated | --sharedstate | --sharedstat | --sharedsta \
+  | --sharedst | --shareds | --shared | --share | --shar \
+  | --sha | --sh)
+    ac_prev=sharedstatedir ;;
+  -sharedstatedir=* | --sharedstatedir=* | --sharedstatedi=* \
+  | --sharedstated=* | --sharedstate=* | --sharedstat=* | --sharedsta=* \
+  | --sharedst=* | --shareds=* | --shared=* | --share=* | --shar=* \
+  | --sha=* | --sh=*)
+    sharedstatedir=$ac_optarg ;;
+
+  -site | --site | --sit)
+    ac_prev=site ;;
+  -site=* | --site=* | --sit=*)
+    site=$ac_optarg ;;
+
+  -srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
+    ac_prev=srcdir ;;
+  -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
+    srcdir=$ac_optarg ;;
+
+  -sysconfdir | --sysconfdir | --sysconfdi | --sysconfd | --sysconf \
+  | --syscon | --sysco | --sysc | --sys | --sy)
+    ac_prev=sysconfdir ;;
+  -sysconfdir=* | --sysconfdir=* | --sysconfdi=* | --sysconfd=* | --sysconf=* \
+  | --syscon=* | --sysco=* | --sysc=* | --sys=* | --sy=*)
+    sysconfdir=$ac_optarg ;;
+
+  -target | --target | --targe | --targ | --tar | --ta | --t)
+    ac_prev=target_alias ;;
+  -target=* | --target=* | --targe=* | --targ=* | --tar=* | --ta=* | --t=*)
+    target_alias=$ac_optarg ;;
+
+  -v | -verbose | --verbose | --verbos | --verbo | --verb)
+    verbose=yes ;;
+
+  -version | --version | --versio | --versi | --vers | -V)
+    ac_init_version=: ;;
+
+  -with-* | --with-*)
+    ac_package=`expr "x$ac_option" : 'x-*with-\([^=]*\)'`
+    # Reject names that are not valid shell variable names.
+    expr "x$ac_package" : ".*[^-._$as_cr_alnum]" >/dev/null &&
+      { echo "$as_me: error: invalid package name: $ac_package" >&2
+   { (exit 1); exit 1; }; }
+    ac_package=`echo $ac_package | sed 's/[-.]/_/g'`
+    eval with_$ac_package=\$ac_optarg ;;
+
+  -without-* | --without-*)
+    ac_package=`expr "x$ac_option" : 'x-*without-\(.*\)'`
+    # Reject names that are not valid shell variable names.
+    expr "x$ac_package" : ".*[^-._$as_cr_alnum]" >/dev/null &&
+      { echo "$as_me: error: invalid package name: $ac_package" >&2
+   { (exit 1); exit 1; }; }
+    ac_package=`echo $ac_package | sed 's/[-.]/_/g'`
+    eval with_$ac_package=no ;;
+
+  --x)
+    # Obsolete; use --with-x.
+    with_x=yes ;;
+
+  -x-includes | --x-includes | --x-include | --x-includ | --x-inclu \
+  | --x-incl | --x-inc | --x-in | --x-i)
+    ac_prev=x_includes ;;
+  -x-includes=* | --x-includes=* | --x-include=* | --x-includ=* | --x-inclu=* \
+  | --x-incl=* | --x-inc=* | --x-in=* | --x-i=*)
+    x_includes=$ac_optarg ;;
+
+  -x-libraries | --x-libraries | --x-librarie | --x-librari \
+  | --x-librar | --x-libra | --x-libr | --x-lib | --x-li | --x-l)
+    ac_prev=x_libraries ;;
+  -x-libraries=* | --x-libraries=* | --x-librarie=* | --x-librari=* \
+  | --x-librar=* | --x-libra=* | --x-libr=* | --x-lib=* | --x-li=* | --x-l=*)
+    x_libraries=$ac_optarg ;;
+
+  -*) { echo "$as_me: error: unrecognized option: $ac_option
+Try \`$0 --help' for more information." >&2
+   { (exit 1); exit 1; }; }
+    ;;
+
+  *=*)
+    ac_envvar=`expr "x$ac_option" : 'x\([^=]*\)='`
+    # Reject names that are not valid shell variable names.
+    expr "x$ac_envvar" : ".*[^_$as_cr_alnum]" >/dev/null &&
+      { echo "$as_me: error: invalid variable name: $ac_envvar" >&2
+   { (exit 1); exit 1; }; }
+    eval $ac_envvar=\$ac_optarg
+    export $ac_envvar ;;
+
+  *)
+    # FIXME: should be removed in autoconf 3.0.
+    echo "$as_me: WARNING: you should use --build, --host, --target" >&2
+    expr "x$ac_option" : ".*[^-._$as_cr_alnum]" >/dev/null &&
+      echo "$as_me: WARNING: invalid host type: $ac_option" >&2
+    : ${build_alias=$ac_option} ${host_alias=$ac_option} ${target_alias=$ac_option}
+    ;;
+
+  esac
+done
+
+if test -n "$ac_prev"; then
+  ac_option=--`echo $ac_prev | sed 's/_/-/g'`
+  { echo "$as_me: error: missing argument to $ac_option" >&2
+   { (exit 1); exit 1; }; }
+fi
+
+# Be sure to have absolute directory names.
+for ac_var in	exec_prefix prefix bindir sbindir libexecdir datarootdir \
+		datadir sysconfdir sharedstatedir localstatedir includedir \
+		oldincludedir docdir infodir htmldir dvidir pdfdir psdir \
+		libdir localedir mandir
+do
+  eval ac_val=\$$ac_var
+  case $ac_val in
+    [\\/$]* | ?:[\\/]* )  continue;;
+    NONE | '' ) case $ac_var in *prefix ) continue;; esac;;
+  esac
+  { echo "$as_me: error: expected an absolute directory name for --$ac_var: $ac_val" >&2
+   { (exit 1); exit 1; }; }
+done
+
+# There might be people who depend on the old broken behavior: `$host'
+# used to hold the argument of --host etc.
+# FIXME: To remove some day.
+build=$build_alias
+host=$host_alias
+target=$target_alias
+
+# FIXME: To remove some day.
+if test "x$host_alias" != x; then
+  if test "x$build_alias" = x; then
+    cross_compiling=maybe
+    echo "$as_me: WARNING: If you wanted to set the --build type, don't use --host.
+    If a cross compiler is detected then cross compile mode will be used." >&2
+  elif test "x$build_alias" != "x$host_alias"; then
+    cross_compiling=yes
+  fi
+fi
+
+ac_tool_prefix=
+test -n "$host_alias" && ac_tool_prefix=$host_alias-
+
+test "$silent" = yes && exec 6>/dev/null
+
+
+ac_pwd=`pwd` && test -n "$ac_pwd" &&
+ac_ls_di=`ls -di .` &&
+ac_pwd_ls_di=`cd "$ac_pwd" && ls -di .` ||
+  { echo "$as_me: error: Working directory cannot be determined" >&2
+   { (exit 1); exit 1; }; }
+test "X$ac_ls_di" = "X$ac_pwd_ls_di" ||
+  { echo "$as_me: error: pwd does not report name of working directory" >&2
+   { (exit 1); exit 1; }; }
+
+
+# Find the source files, if location was not specified.
+if test -z "$srcdir"; then
+  ac_srcdir_defaulted=yes
+  # Try the directory containing this script, then the parent directory.
+  ac_confdir=`$as_dirname -- "$0" ||
+$as_expr X"$0" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+	 X"$0" : 'X\(//\)[^/]' \| \
+	 X"$0" : 'X\(//\)$' \| \
+	 X"$0" : 'X\(/\)' \| . 2>/dev/null ||
+echo X"$0" |
+    sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)[^/].*/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\).*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+  srcdir=$ac_confdir
+  if test ! -r "$srcdir/$ac_unique_file"; then
+    srcdir=..
+  fi
+else
+  ac_srcdir_defaulted=no
+fi
+if test ! -r "$srcdir/$ac_unique_file"; then
+  test "$ac_srcdir_defaulted" = yes && srcdir="$ac_confdir or .."
+  { echo "$as_me: error: cannot find sources ($ac_unique_file) in $srcdir" >&2
+   { (exit 1); exit 1; }; }
+fi
+ac_msg="sources are in $srcdir, but \`cd $srcdir' does not work"
+ac_abs_confdir=`(
+	cd "$srcdir" && test -r "./$ac_unique_file" || { echo "$as_me: error: $ac_msg" >&2
+   { (exit 1); exit 1; }; }
+	pwd)`
+# When building in place, set srcdir=.
+if test "$ac_abs_confdir" = "$ac_pwd"; then
+  srcdir=.
+fi
+# Remove unnecessary trailing slashes from srcdir.
+# Double slashes in file names in object file debugging info
+# mess up M-x gdb in Emacs.
+case $srcdir in
+*/) srcdir=`expr "X$srcdir" : 'X\(.*[^/]\)' \| "X$srcdir" : 'X\(.*\)'`;;
+esac
+for ac_var in $ac_precious_vars; do
+  eval ac_env_${ac_var}_set=\${${ac_var}+set}
+  eval ac_env_${ac_var}_value=\$${ac_var}
+  eval ac_cv_env_${ac_var}_set=\${${ac_var}+set}
+  eval ac_cv_env_${ac_var}_value=\$${ac_var}
+done
+
+#
+# Report the --help message.
+#
+if test "$ac_init_help" = "long"; then
+  # Omit some internal or obsolete options to make the list less imposing.
+  # This message is too long to be a string in the A/UX 3.1 sh.
+  cat <<_ACEOF
+\`configure' configures cppbsl 0.1 to adapt to many kinds of systems.
+
+Usage: $0 [OPTION]... [VAR=VALUE]...
+
+To assign environment variables (e.g., CC, CFLAGS...), specify them as
+VAR=VALUE.  See below for descriptions of some of the useful variables.
+
+Defaults for the options are specified in brackets.
+
+Configuration:
+  -h, --help              display this help and exit
+      --help=short        display options specific to this package
+      --help=recursive    display the short help of all the included packages
+  -V, --version           display version information and exit
+  -q, --quiet, --silent   do not print \`checking...' messages
+      --cache-file=FILE   cache test results in FILE [disabled]
+  -C, --config-cache      alias for \`--cache-file=config.cache'
+  -n, --no-create         do not create output files
+      --srcdir=DIR        find the sources in DIR [configure dir or \`..']
+
+Installation directories:
+  --prefix=PREFIX         install architecture-independent files in PREFIX
+			  [$ac_default_prefix]
+  --exec-prefix=EPREFIX   install architecture-dependent files in EPREFIX
+			  [PREFIX]
+
+By default, \`make install' will install all the files in
+\`$ac_default_prefix/bin', \`$ac_default_prefix/lib' etc.  You can specify
+an installation prefix other than \`$ac_default_prefix' using \`--prefix',
+for instance \`--prefix=\$HOME'.
+
+For better control, use the options below.
+
+Fine tuning of the installation directories:
+  --bindir=DIR           user executables [EPREFIX/bin]
+  --sbindir=DIR          system admin executables [EPREFIX/sbin]
+  --libexecdir=DIR       program executables [EPREFIX/libexec]
+  --sysconfdir=DIR       read-only single-machine data [PREFIX/etc]
+  --sharedstatedir=DIR   modifiable architecture-independent data [PREFIX/com]
+  --localstatedir=DIR    modifiable single-machine data [PREFIX/var]
+  --libdir=DIR           object code libraries [EPREFIX/lib]
+  --includedir=DIR       C header files [PREFIX/include]
+  --oldincludedir=DIR    C header files for non-gcc [/usr/include]
+  --datarootdir=DIR      read-only arch.-independent data root [PREFIX/share]
+  --datadir=DIR          read-only architecture-independent data [DATAROOTDIR]
+  --infodir=DIR          info documentation [DATAROOTDIR/info]
+  --localedir=DIR        locale-dependent data [DATAROOTDIR/locale]
+  --mandir=DIR           man documentation [DATAROOTDIR/man]
+  --docdir=DIR           documentation root [DATAROOTDIR/doc/cppbsl]
+  --htmldir=DIR          html documentation [DOCDIR]
+  --dvidir=DIR           dvi documentation [DOCDIR]
+  --pdfdir=DIR           pdf documentation [DOCDIR]
+  --psdir=DIR            ps documentation [DOCDIR]
+_ACEOF
+
+  cat <<\_ACEOF
+
+Program names:
+  --program-prefix=PREFIX            prepend PREFIX to installed program names
+  --program-suffix=SUFFIX            append SUFFIX to installed program names
+  --program-transform-name=PROGRAM   run sed PROGRAM on installed program names
+_ACEOF
+fi
+
+if test -n "$ac_init_help"; then
+  case $ac_init_help in
+     short | recursive ) echo "Configuration of cppbsl 0.1:";;
+   esac
+  cat <<\_ACEOF
+
+Optional Features:
+  --disable-FEATURE       do not include FEATURE (same as --enable-FEATURE=no)
+  --enable-FEATURE[=ARG]  include FEATURE [ARG=yes]
+  --disable-dependency-tracking  speeds up one-time build
+  --enable-dependency-tracking   do not reject slow dependency extractors
+  --enable-debug=yes/no   compile with g++ debug options, default is no
+  --enable-optimize=yes/no
+                          compile with g++ optimize options, default is no
+  --enable-prof=yes/no    compile with g++ profiling options, default is no
+
+Some influential environment variables:
+  CC          C compiler command
+  CFLAGS      C compiler flags
+  LDFLAGS     linker flags, e.g. -L<lib dir> if you have libraries in a
+              nonstandard directory <lib dir>
+  LIBS        libraries to pass to the linker, e.g. -l<library>
+  CPPFLAGS    C/C++/Objective C preprocessor flags, e.g. -I<include dir> if
+              you have headers in a nonstandard directory <include dir>
+  CPP         C preprocessor
+  CXX         C++ compiler command
+  CXXFLAGS    C++ compiler flags
+
+Use these variables to override the choices made by `configure' or to help
+it to find libraries and programs with nonstandard names/locations.
+
+Report bugs to <koepke@tkn.tu-berlin.de>.
+_ACEOF
+ac_status=$?
+fi
+
+if test "$ac_init_help" = "recursive"; then
+  # If there are subdirs, report their specific --help.
+  for ac_dir in : $ac_subdirs_all; do test "x$ac_dir" = x: && continue
+    test -d "$ac_dir" || continue
+    ac_builddir=.
+
+case "$ac_dir" in
+.) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;;
+*)
+  ac_dir_suffix=/`echo "$ac_dir" | sed 's,^\.[\\/],,'`
+  # A ".." for each directory in $ac_dir_suffix.
+  ac_top_builddir_sub=`echo "$ac_dir_suffix" | sed 's,/[^\\/]*,/..,g;s,/,,'`
+  case $ac_top_builddir_sub in
+  "") ac_top_builddir_sub=. ac_top_build_prefix= ;;
+  *)  ac_top_build_prefix=$ac_top_builddir_sub/ ;;
+  esac ;;
+esac
+ac_abs_top_builddir=$ac_pwd
+ac_abs_builddir=$ac_pwd$ac_dir_suffix
+# for backward compatibility:
+ac_top_builddir=$ac_top_build_prefix
+
+case $srcdir in
+  .)  # We are building in place.
+    ac_srcdir=.
+    ac_top_srcdir=$ac_top_builddir_sub
+    ac_abs_top_srcdir=$ac_pwd ;;
+  [\\/]* | ?:[\\/]* )  # Absolute name.
+    ac_srcdir=$srcdir$ac_dir_suffix;
+    ac_top_srcdir=$srcdir
+    ac_abs_top_srcdir=$srcdir ;;
+  *) # Relative name.
+    ac_srcdir=$ac_top_build_prefix$srcdir$ac_dir_suffix
+    ac_top_srcdir=$ac_top_build_prefix$srcdir
+    ac_abs_top_srcdir=$ac_pwd/$srcdir ;;
+esac
+ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix
+
+    cd "$ac_dir" || { ac_status=$?; continue; }
+    # Check for guested configure.
+    if test -f "$ac_srcdir/configure.gnu"; then
+      echo &&
+      $SHELL "$ac_srcdir/configure.gnu" --help=recursive
+    elif test -f "$ac_srcdir/configure"; then
+      echo &&
+      $SHELL "$ac_srcdir/configure" --help=recursive
+    else
+      echo "$as_me: WARNING: no configuration information is in $ac_dir" >&2
+    fi || ac_status=$?
+    cd "$ac_pwd" || { ac_status=$?; break; }
+  done
+fi
+
+test -n "$ac_init_help" && exit $ac_status
+if $ac_init_version; then
+  cat <<\_ACEOF
+cppbsl configure 0.1
+generated by GNU Autoconf 2.61
+
+Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
+2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
+This configure script is free software; the Free Software Foundation
+gives unlimited permission to copy, distribute and modify it.
+_ACEOF
+  exit
+fi
+cat >config.log <<_ACEOF
+This file contains any messages produced by compilers while
+running configure, to aid debugging if configure makes a mistake.
+
+It was created by cppbsl $as_me 0.1, which was
+generated by GNU Autoconf 2.61.  Invocation command line was
+
+  $ $0 $@
+
+_ACEOF
+exec 5>>config.log
+{
+cat <<_ASUNAME
+## --------- ##
+## Platform. ##
+## --------- ##
+
+hostname = `(hostname || uname -n) 2>/dev/null | sed 1q`
+uname -m = `(uname -m) 2>/dev/null || echo unknown`
+uname -r = `(uname -r) 2>/dev/null || echo unknown`
+uname -s = `(uname -s) 2>/dev/null || echo unknown`
+uname -v = `(uname -v) 2>/dev/null || echo unknown`
+
+/usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null || echo unknown`
+/bin/uname -X     = `(/bin/uname -X) 2>/dev/null     || echo unknown`
+
+/bin/arch              = `(/bin/arch) 2>/dev/null              || echo unknown`
+/usr/bin/arch -k       = `(/usr/bin/arch -k) 2>/dev/null       || echo unknown`
+/usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null || echo unknown`
+/usr/bin/hostinfo      = `(/usr/bin/hostinfo) 2>/dev/null      || echo unknown`
+/bin/machine           = `(/bin/machine) 2>/dev/null           || echo unknown`
+/usr/bin/oslevel       = `(/usr/bin/oslevel) 2>/dev/null       || echo unknown`
+/bin/universe          = `(/bin/universe) 2>/dev/null          || echo unknown`
+
+_ASUNAME
+
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  echo "PATH: $as_dir"
+done
+IFS=$as_save_IFS
+
+} >&5
+
+cat >&5 <<_ACEOF
+
+
+## ----------- ##
+## Core tests. ##
+## ----------- ##
+
+_ACEOF
+
+
+# Keep a trace of the command line.
+# Strip out --no-create and --no-recursion so they do not pile up.
+# Strip out --silent because we don't want to record it for future runs.
+# Also quote any args containing shell meta-characters.
+# Make two passes to allow for proper duplicate-argument suppression.
+ac_configure_args=
+ac_configure_args0=
+ac_configure_args1=
+ac_must_keep_next=false
+for ac_pass in 1 2
+do
+  for ac_arg
+  do
+    case $ac_arg in
+    -no-create | --no-c* | -n | -no-recursion | --no-r*) continue ;;
+    -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+    | -silent | --silent | --silen | --sile | --sil)
+      continue ;;
+    *\'*)
+      ac_arg=`echo "$ac_arg" | sed "s/'/'\\\\\\\\''/g"` ;;
+    esac
+    case $ac_pass in
+    1) ac_configure_args0="$ac_configure_args0 '$ac_arg'" ;;
+    2)
+      ac_configure_args1="$ac_configure_args1 '$ac_arg'"
+      if test $ac_must_keep_next = true; then
+	ac_must_keep_next=false # Got value, back to normal.
+      else
+	case $ac_arg in
+	  *=* | --config-cache | -C | -disable-* | --disable-* \
+	  | -enable-* | --enable-* | -gas | --g* | -nfp | --nf* \
+	  | -q | -quiet | --q* | -silent | --sil* | -v | -verb* \
+	  | -with-* | --with-* | -without-* | --without-* | --x)
+	    case "$ac_configure_args0 " in
+	      "$ac_configure_args1"*" '$ac_arg' "* ) continue ;;
+	    esac
+	    ;;
+	  -* ) ac_must_keep_next=true ;;
+	esac
+      fi
+      ac_configure_args="$ac_configure_args '$ac_arg'"
+      ;;
+    esac
+  done
+done
+$as_unset ac_configure_args0 || test "${ac_configure_args0+set}" != set || { ac_configure_args0=; export ac_configure_args0; }
+$as_unset ac_configure_args1 || test "${ac_configure_args1+set}" != set || { ac_configure_args1=; export ac_configure_args1; }
+
+# When interrupted or exit'd, cleanup temporary files, and complete
+# config.log.  We remove comments because anyway the quotes in there
+# would cause problems or look ugly.
+# WARNING: Use '\'' to represent an apostrophe within the trap.
+# WARNING: Do not start the trap code with a newline, due to a FreeBSD 4.0 bug.
+trap 'exit_status=$?
+  # Save into config.log some information that might help in debugging.
+  {
+    echo
+
+    cat <<\_ASBOX
+## ---------------- ##
+## Cache variables. ##
+## ---------------- ##
+_ASBOX
+    echo
+    # The following way of writing the cache mishandles newlines in values,
+(
+  for ac_var in `(set) 2>&1 | sed -n '\''s/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'\''`; do
+    eval ac_val=\$$ac_var
+    case $ac_val in #(
+    *${as_nl}*)
+      case $ac_var in #(
+      *_cv_*) { echo "$as_me:$LINENO: WARNING: Cache variable $ac_var contains a newline." >&5
+echo "$as_me: WARNING: Cache variable $ac_var contains a newline." >&2;} ;;
+      esac
+      case $ac_var in #(
+      _ | IFS | as_nl) ;; #(
+      *) $as_unset $ac_var ;;
+      esac ;;
+    esac
+  done
+  (set) 2>&1 |
+    case $as_nl`(ac_space='\'' '\''; set) 2>&1` in #(
+    *${as_nl}ac_space=\ *)
+      sed -n \
+	"s/'\''/'\''\\\\'\'''\''/g;
+	  s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\''\\2'\''/p"
+      ;; #(
+    *)
+      sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p"
+      ;;
+    esac |
+    sort
+)
+    echo
+
+    cat <<\_ASBOX
+## ----------------- ##
+## Output variables. ##
+## ----------------- ##
+_ASBOX
+    echo
+    for ac_var in $ac_subst_vars
+    do
+      eval ac_val=\$$ac_var
+      case $ac_val in
+      *\'\''*) ac_val=`echo "$ac_val" | sed "s/'\''/'\''\\\\\\\\'\'''\''/g"`;;
+      esac
+      echo "$ac_var='\''$ac_val'\''"
+    done | sort
+    echo
+
+    if test -n "$ac_subst_files"; then
+      cat <<\_ASBOX
+## ------------------- ##
+## File substitutions. ##
+## ------------------- ##
+_ASBOX
+      echo
+      for ac_var in $ac_subst_files
+      do
+	eval ac_val=\$$ac_var
+	case $ac_val in
+	*\'\''*) ac_val=`echo "$ac_val" | sed "s/'\''/'\''\\\\\\\\'\'''\''/g"`;;
+	esac
+	echo "$ac_var='\''$ac_val'\''"
+      done | sort
+      echo
+    fi
+
+    if test -s confdefs.h; then
+      cat <<\_ASBOX
+## ----------- ##
+## confdefs.h. ##
+## ----------- ##
+_ASBOX
+      echo
+      cat confdefs.h
+      echo
+    fi
+    test "$ac_signal" != 0 &&
+      echo "$as_me: caught signal $ac_signal"
+    echo "$as_me: exit $exit_status"
+  } >&5
+  rm -f core *.core core.conftest.* &&
+    rm -f -r conftest* confdefs* conf$$* $ac_clean_files &&
+    exit $exit_status
+' 0
+for ac_signal in 1 2 13 15; do
+  trap 'ac_signal='$ac_signal'; { (exit 1); exit 1; }' $ac_signal
+done
+ac_signal=0
+
+# confdefs.h avoids OS command line length limits that DEFS can exceed.
+rm -f -r conftest* confdefs.h
+
+# Predefined preprocessor variables.
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_NAME "$PACKAGE_NAME"
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_TARNAME "$PACKAGE_TARNAME"
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_VERSION "$PACKAGE_VERSION"
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_STRING "$PACKAGE_STRING"
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE_BUGREPORT "$PACKAGE_BUGREPORT"
+_ACEOF
+
+
+# Let the site file select an alternate cache file if it wants to.
+# Prefer explicitly selected file to automatically selected ones.
+if test -n "$CONFIG_SITE"; then
+  set x "$CONFIG_SITE"
+elif test "x$prefix" != xNONE; then
+  set x "$prefix/share/config.site" "$prefix/etc/config.site"
+else
+  set x "$ac_default_prefix/share/config.site" \
+	"$ac_default_prefix/etc/config.site"
+fi
+shift
+for ac_site_file
+do
+  if test -r "$ac_site_file"; then
+    { echo "$as_me:$LINENO: loading site script $ac_site_file" >&5
+echo "$as_me: loading site script $ac_site_file" >&6;}
+    sed 's/^/| /' "$ac_site_file" >&5
+    . "$ac_site_file"
+  fi
+done
+
+if test -r "$cache_file"; then
+  # Some versions of bash will fail to source /dev/null (special
+  # files actually), so we avoid doing that.
+  if test -f "$cache_file"; then
+    { echo "$as_me:$LINENO: loading cache $cache_file" >&5
+echo "$as_me: loading cache $cache_file" >&6;}
+    case $cache_file in
+      [\\/]* | ?:[\\/]* ) . "$cache_file";;
+      *)                      . "./$cache_file";;
+    esac
+  fi
+else
+  { echo "$as_me:$LINENO: creating cache $cache_file" >&5
+echo "$as_me: creating cache $cache_file" >&6;}
+  >$cache_file
+fi
+
+# Check that the precious variables saved in the cache have kept the same
+# value.
+ac_cache_corrupted=false
+for ac_var in $ac_precious_vars; do
+  eval ac_old_set=\$ac_cv_env_${ac_var}_set
+  eval ac_new_set=\$ac_env_${ac_var}_set
+  eval ac_old_val=\$ac_cv_env_${ac_var}_value
+  eval ac_new_val=\$ac_env_${ac_var}_value
+  case $ac_old_set,$ac_new_set in
+    set,)
+      { echo "$as_me:$LINENO: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&5
+echo "$as_me: error: \`$ac_var' was set to \`$ac_old_val' in the previous run" >&2;}
+      ac_cache_corrupted=: ;;
+    ,set)
+      { echo "$as_me:$LINENO: error: \`$ac_var' was not set in the previous run" >&5
+echo "$as_me: error: \`$ac_var' was not set in the previous run" >&2;}
+      ac_cache_corrupted=: ;;
+    ,);;
+    *)
+      if test "x$ac_old_val" != "x$ac_new_val"; then
+	{ echo "$as_me:$LINENO: error: \`$ac_var' has changed since the previous run:" >&5
+echo "$as_me: error: \`$ac_var' has changed since the previous run:" >&2;}
+	{ echo "$as_me:$LINENO:   former value:  $ac_old_val" >&5
+echo "$as_me:   former value:  $ac_old_val" >&2;}
+	{ echo "$as_me:$LINENO:   current value: $ac_new_val" >&5
+echo "$as_me:   current value: $ac_new_val" >&2;}
+	ac_cache_corrupted=:
+      fi;;
+  esac
+  # Pass precious variables to config.status.
+  if test "$ac_new_set" = set; then
+    case $ac_new_val in
+    *\'*) ac_arg=$ac_var=`echo "$ac_new_val" | sed "s/'/'\\\\\\\\''/g"` ;;
+    *) ac_arg=$ac_var=$ac_new_val ;;
+    esac
+    case " $ac_configure_args " in
+      *" '$ac_arg' "*) ;; # Avoid dups.  Use of quotes ensures accuracy.
+      *) ac_configure_args="$ac_configure_args '$ac_arg'" ;;
+    esac
+  fi
+done
+if $ac_cache_corrupted; then
+  { echo "$as_me:$LINENO: error: changes in the environment can compromise the build" >&5
+echo "$as_me: error: changes in the environment can compromise the build" >&2;}
+  { { echo "$as_me:$LINENO: error: run \`make distclean' and/or \`rm $cache_file' and start over" >&5
+echo "$as_me: error: run \`make distclean' and/or \`rm $cache_file' and start over" >&2;}
+   { (exit 1); exit 1; }; }
+fi
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+
+ac_aux_dir=
+for ac_dir in config "$srcdir"/config; do
+  if test -f "$ac_dir/install-sh"; then
+    ac_aux_dir=$ac_dir
+    ac_install_sh="$ac_aux_dir/install-sh -c"
+    break
+  elif test -f "$ac_dir/install.sh"; then
+    ac_aux_dir=$ac_dir
+    ac_install_sh="$ac_aux_dir/install.sh -c"
+    break
+  elif test -f "$ac_dir/shtool"; then
+    ac_aux_dir=$ac_dir
+    ac_install_sh="$ac_aux_dir/shtool install -c"
+    break
+  fi
+done
+if test -z "$ac_aux_dir"; then
+  { { echo "$as_me:$LINENO: error: cannot find install-sh or install.sh in config \"$srcdir\"/config" >&5
+echo "$as_me: error: cannot find install-sh or install.sh in config \"$srcdir\"/config" >&2;}
+   { (exit 1); exit 1; }; }
+fi
+
+# These three variables are undocumented and unsupported,
+# and are intended to be withdrawn in a future Autoconf release.
+# They can cause serious problems if a builder's source tree is in a directory
+# whose full name contains unusual characters.
+ac_config_guess="$SHELL $ac_aux_dir/config.guess"  # Please don't use this var.
+ac_config_sub="$SHELL $ac_aux_dir/config.sub"  # Please don't use this var.
+ac_configure="$SHELL $ac_aux_dir/configure"  # Please don't use this var.
+
+
+ac_config_headers="$ac_config_headers config.h"
+
+
+am__api_version='1.10'
+
+# Find a good install program.  We prefer a C program (faster),
+# so one script is as good as another.  But avoid the broken or
+# incompatible versions:
+# SysV /etc/install, /usr/sbin/install
+# SunOS /usr/etc/install
+# IRIX /sbin/install
+# AIX /bin/install
+# AmigaOS /C/install, which installs bootblocks on floppy discs
+# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
+# AFS /usr/afsws/bin/install, which mishandles nonexistent args
+# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
+# OS/2's system install, which has a completely different semantic
+# ./install, which can be erroneously created by make from ./install.sh.
+{ echo "$as_me:$LINENO: checking for a BSD-compatible install" >&5
+echo $ECHO_N "checking for a BSD-compatible install... $ECHO_C" >&6; }
+if test -z "$INSTALL"; then
+if test "${ac_cv_path_install+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  # Account for people who put trailing slashes in PATH elements.
+case $as_dir/ in
+  ./ | .// | /cC/* | \
+  /etc/* | /usr/sbin/* | /usr/etc/* | /sbin/* | /usr/afsws/bin/* | \
+  ?:\\/os2\\/install\\/* | ?:\\/OS2\\/INSTALL\\/* | \
+  /usr/ucb/* ) ;;
+  *)
+    # OSF1 and SCO ODT 3.0 have their own names for install.
+    # Don't use installbsd from OSF since it installs stuff as root
+    # by default.
+    for ac_prog in ginstall scoinst install; do
+      for ac_exec_ext in '' $ac_executable_extensions; do
+	if { test -f "$as_dir/$ac_prog$ac_exec_ext" && $as_test_x "$as_dir/$ac_prog$ac_exec_ext"; }; then
+	  if test $ac_prog = install &&
+	    grep dspmsg "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then
+	    # AIX install.  It has an incompatible calling convention.
+	    :
+	  elif test $ac_prog = install &&
+	    grep pwplus "$as_dir/$ac_prog$ac_exec_ext" >/dev/null 2>&1; then
+	    # program-specific install script used by HP pwplus--don't use.
+	    :
+	  else
+	    ac_cv_path_install="$as_dir/$ac_prog$ac_exec_ext -c"
+	    break 3
+	  fi
+	fi
+      done
+    done
+    ;;
+esac
+done
+IFS=$as_save_IFS
+
+
+fi
+  if test "${ac_cv_path_install+set}" = set; then
+    INSTALL=$ac_cv_path_install
+  else
+    # As a last resort, use the slow shell script.  Don't cache a
+    # value for INSTALL within a source directory, because that will
+    # break other packages using the cache if that directory is
+    # removed, or if the value is a relative name.
+    INSTALL=$ac_install_sh
+  fi
+fi
+{ echo "$as_me:$LINENO: result: $INSTALL" >&5
+echo "${ECHO_T}$INSTALL" >&6; }
+
+# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
+# It thinks the first close brace ends the variable substitution.
+test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
+
+test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL}'
+
+test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
+
+{ echo "$as_me:$LINENO: checking whether build environment is sane" >&5
+echo $ECHO_N "checking whether build environment is sane... $ECHO_C" >&6; }
+# Just in case
+sleep 1
+echo timestamp > conftest.file
+# Do `set' in a subshell so we don't clobber the current shell's
+# arguments.  Must try -L first in case configure is actually a
+# symlink; some systems play weird games with the mod time of symlinks
+# (eg FreeBSD returns the mod time of the symlink's containing
+# directory).
+if (
+   set X `ls -Lt $srcdir/configure conftest.file 2> /dev/null`
+   if test "$*" = "X"; then
+      # -L didn't work.
+      set X `ls -t $srcdir/configure conftest.file`
+   fi
+   rm -f conftest.file
+   if test "$*" != "X $srcdir/configure conftest.file" \
+      && test "$*" != "X conftest.file $srcdir/configure"; then
+
+      # If neither matched, then we have a broken ls.  This can happen
+      # if, for instance, CONFIG_SHELL is bash and it inherits a
+      # broken ls alias from the environment.  This has actually
+      # happened.  Such a system could not be considered "sane".
+      { { echo "$as_me:$LINENO: error: ls -t appears to fail.  Make sure there is not a broken
+alias in your environment" >&5
+echo "$as_me: error: ls -t appears to fail.  Make sure there is not a broken
+alias in your environment" >&2;}
+   { (exit 1); exit 1; }; }
+   fi
+
+   test "$2" = conftest.file
+   )
+then
+   # Ok.
+   :
+else
+   { { echo "$as_me:$LINENO: error: newly created file is older than distributed files!
+Check your system clock" >&5
+echo "$as_me: error: newly created file is older than distributed files!
+Check your system clock" >&2;}
+   { (exit 1); exit 1; }; }
+fi
+{ echo "$as_me:$LINENO: result: yes" >&5
+echo "${ECHO_T}yes" >&6; }
+test "$program_prefix" != NONE &&
+  program_transform_name="s&^&$program_prefix&;$program_transform_name"
+# Use a double $ so make ignores it.
+test "$program_suffix" != NONE &&
+  program_transform_name="s&\$&$program_suffix&;$program_transform_name"
+# Double any \ or $.  echo might interpret backslashes.
+# By default was `s,x,x', remove it if useless.
+cat <<\_ACEOF >conftest.sed
+s/[\\$]/&&/g;s/;s,x,x,$//
+_ACEOF
+program_transform_name=`echo $program_transform_name | sed -f conftest.sed`
+rm -f conftest.sed
+
+# expand $ac_aux_dir to an absolute path
+am_aux_dir=`cd $ac_aux_dir && pwd`
+
+test x"${MISSING+set}" = xset || MISSING="\${SHELL} $am_aux_dir/missing"
+# Use eval to expand $SHELL
+if eval "$MISSING --run true"; then
+  am_missing_run="$MISSING --run "
+else
+  am_missing_run=
+  { echo "$as_me:$LINENO: WARNING: \`missing' script is too old or missing" >&5
+echo "$as_me: WARNING: \`missing' script is too old or missing" >&2;}
+fi
+
+{ echo "$as_me:$LINENO: checking for a thread-safe mkdir -p" >&5
+echo $ECHO_N "checking for a thread-safe mkdir -p... $ECHO_C" >&6; }
+if test -z "$MKDIR_P"; then
+  if test "${ac_cv_path_mkdir+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH$PATH_SEPARATOR/opt/sfw/bin
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_prog in mkdir gmkdir; do
+	 for ac_exec_ext in '' $ac_executable_extensions; do
+	   { test -f "$as_dir/$ac_prog$ac_exec_ext" && $as_test_x "$as_dir/$ac_prog$ac_exec_ext"; } || continue
+	   case `"$as_dir/$ac_prog$ac_exec_ext" --version 2>&1` in #(
+	     'mkdir (GNU coreutils) '* | \
+	     'mkdir (coreutils) '* | \
+	     'mkdir (fileutils) '4.1*)
+	       ac_cv_path_mkdir=$as_dir/$ac_prog$ac_exec_ext
+	       break 3;;
+	   esac
+	 done
+       done
+done
+IFS=$as_save_IFS
+
+fi
+
+  if test "${ac_cv_path_mkdir+set}" = set; then
+    MKDIR_P="$ac_cv_path_mkdir -p"
+  else
+    # As a last resort, use the slow shell script.  Don't cache a
+    # value for MKDIR_P within a source directory, because that will
+    # break other packages using the cache if that directory is
+    # removed, or if the value is a relative name.
+    test -d ./--version && rmdir ./--version
+    MKDIR_P="$ac_install_sh -d"
+  fi
+fi
+{ echo "$as_me:$LINENO: result: $MKDIR_P" >&5
+echo "${ECHO_T}$MKDIR_P" >&6; }
+
+mkdir_p="$MKDIR_P"
+case $mkdir_p in
+  [\\/$]* | ?:[\\/]*) ;;
+  */*) mkdir_p="\$(top_builddir)/$mkdir_p" ;;
+esac
+
+for ac_prog in gawk mawk nawk awk
+do
+  # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_prog_AWK+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -n "$AWK"; then
+  ac_cv_prog_AWK="$AWK" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_AWK="$ac_prog"
+    echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+done
+IFS=$as_save_IFS
+
+fi
+fi
+AWK=$ac_cv_prog_AWK
+if test -n "$AWK"; then
+  { echo "$as_me:$LINENO: result: $AWK" >&5
+echo "${ECHO_T}$AWK" >&6; }
+else
+  { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+
+  test -n "$AWK" && break
+done
+
+{ echo "$as_me:$LINENO: checking whether ${MAKE-make} sets \$(MAKE)" >&5
+echo $ECHO_N "checking whether ${MAKE-make} sets \$(MAKE)... $ECHO_C" >&6; }
+set x ${MAKE-make}; ac_make=`echo "$2" | sed 's/+/p/g; s/[^a-zA-Z0-9_]/_/g'`
+if { as_var=ac_cv_prog_make_${ac_make}_set; eval "test \"\${$as_var+set}\" = set"; }; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  cat >conftest.make <<\_ACEOF
+SHELL = /bin/sh
+all:
+	@echo '@@@%%%=$(MAKE)=@@@%%%'
+_ACEOF
+# GNU make sometimes prints "make[1]: Entering...", which would confuse us.
+case `${MAKE-make} -f conftest.make 2>/dev/null` in
+  *@@@%%%=?*=@@@%%%*)
+    eval ac_cv_prog_make_${ac_make}_set=yes;;
+  *)
+    eval ac_cv_prog_make_${ac_make}_set=no;;
+esac
+rm -f conftest.make
+fi
+if eval test \$ac_cv_prog_make_${ac_make}_set = yes; then
+  { echo "$as_me:$LINENO: result: yes" >&5
+echo "${ECHO_T}yes" >&6; }
+  SET_MAKE=
+else
+  { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+  SET_MAKE="MAKE=${MAKE-make}"
+fi
+
+rm -rf .tst 2>/dev/null
+mkdir .tst 2>/dev/null
+if test -d .tst; then
+  am__leading_dot=.
+else
+  am__leading_dot=_
+fi
+rmdir .tst 2>/dev/null
+
+if test "`cd $srcdir && pwd`" != "`pwd`"; then
+  # Use -I$(srcdir) only when $(srcdir) != ., so that make's output
+  # is not polluted with repeated "-I."
+  am__isrc=' -I$(srcdir)'
+  # test to see if srcdir already configured
+  if test -f $srcdir/config.status; then
+    { { echo "$as_me:$LINENO: error: source directory already configured; run \"make distclean\" there first" >&5
+echo "$as_me: error: source directory already configured; run \"make distclean\" there first" >&2;}
+   { (exit 1); exit 1; }; }
+  fi
+fi
+
+# test whether we have cygpath
+if test -z "$CYGPATH_W"; then
+  if (cygpath --version) >/dev/null 2>/dev/null; then
+    CYGPATH_W='cygpath -w'
+  else
+    CYGPATH_W=echo
+  fi
+fi
+
+
+# Define the identity of the package.
+ PACKAGE='cppbsl'
+ VERSION='0.1'
+
+
+cat >>confdefs.h <<_ACEOF
+#define PACKAGE "$PACKAGE"
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define VERSION "$VERSION"
+_ACEOF
+
+# Some tools Automake needs.
+
+ACLOCAL=${ACLOCAL-"${am_missing_run}aclocal-${am__api_version}"}
+
+
+AUTOCONF=${AUTOCONF-"${am_missing_run}autoconf"}
+
+
+AUTOMAKE=${AUTOMAKE-"${am_missing_run}automake-${am__api_version}"}
+
+
+AUTOHEADER=${AUTOHEADER-"${am_missing_run}autoheader"}
+
+
+MAKEINFO=${MAKEINFO-"${am_missing_run}makeinfo"}
+
+install_sh=${install_sh-"\$(SHELL) $am_aux_dir/install-sh"}
+
+# Installed binaries are usually stripped using `strip' when the user
+# run `make install-strip'.  However `strip' might not be the right
+# tool to use in cross-compilation environments, therefore Automake
+# will honor the `STRIP' environment variable to overrule this program.
+if test "$cross_compiling" != no; then
+  if test -n "$ac_tool_prefix"; then
+  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
+set dummy ${ac_tool_prefix}strip; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_prog_STRIP+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -n "$STRIP"; then
+  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
+    echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+done
+IFS=$as_save_IFS
+
+fi
+fi
+STRIP=$ac_cv_prog_STRIP
+if test -n "$STRIP"; then
+  { echo "$as_me:$LINENO: result: $STRIP" >&5
+echo "${ECHO_T}$STRIP" >&6; }
+else
+  { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+
+fi
+if test -z "$ac_cv_prog_STRIP"; then
+  ac_ct_STRIP=$STRIP
+  # Extract the first word of "strip", so it can be a program name with args.
+set dummy strip; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -n "$ac_ct_STRIP"; then
+  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_ac_ct_STRIP="strip"
+    echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
+if test -n "$ac_ct_STRIP"; then
+  { echo "$as_me:$LINENO: result: $ac_ct_STRIP" >&5
+echo "${ECHO_T}$ac_ct_STRIP" >&6; }
+else
+  { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+  if test "x$ac_ct_STRIP" = x; then
+    STRIP=":"
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools
+whose name does not start with the host triplet.  If you think this
+configuration is useful to you, please write to autoconf@gnu.org." >&5
+echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools
+whose name does not start with the host triplet.  If you think this
+configuration is useful to you, please write to autoconf@gnu.org." >&2;}
+ac_tool_warned=yes ;;
+esac
+    STRIP=$ac_ct_STRIP
+  fi
+else
+  STRIP="$ac_cv_prog_STRIP"
+fi
+
+fi
+INSTALL_STRIP_PROGRAM="\$(install_sh) -c -s"
+
+# We need awk for the "check" target.  The system "awk" is bad on
+# some platforms.
+# Always define AMTAR for backward compatibility.
+
+AMTAR=${AMTAR-"${am_missing_run}tar"}
+
+am__tar='${AMTAR} chof - "$$tardir"'; am__untar='${AMTAR} xf -'
+
+
+
+
+
+
+# Checks for programs.
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+if test -n "$ac_tool_prefix"; then
+  # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args.
+set dummy ${ac_tool_prefix}gcc; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_prog_CC+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -n "$CC"; then
+  ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_CC="${ac_tool_prefix}gcc"
+    echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+done
+IFS=$as_save_IFS
+
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+  { echo "$as_me:$LINENO: result: $CC" >&5
+echo "${ECHO_T}$CC" >&6; }
+else
+  { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+
+fi
+if test -z "$ac_cv_prog_CC"; then
+  ac_ct_CC=$CC
+  # Extract the first word of "gcc", so it can be a program name with args.
+set dummy gcc; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_prog_ac_ct_CC+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -n "$ac_ct_CC"; then
+  ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_ac_ct_CC="gcc"
+    echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_CC=$ac_cv_prog_ac_ct_CC
+if test -n "$ac_ct_CC"; then
+  { echo "$as_me:$LINENO: result: $ac_ct_CC" >&5
+echo "${ECHO_T}$ac_ct_CC" >&6; }
+else
+  { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+  if test "x$ac_ct_CC" = x; then
+    CC=""
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools
+whose name does not start with the host triplet.  If you think this
+configuration is useful to you, please write to autoconf@gnu.org." >&5
+echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools
+whose name does not start with the host triplet.  If you think this
+configuration is useful to you, please write to autoconf@gnu.org." >&2;}
+ac_tool_warned=yes ;;
+esac
+    CC=$ac_ct_CC
+  fi
+else
+  CC="$ac_cv_prog_CC"
+fi
+
+if test -z "$CC"; then
+          if test -n "$ac_tool_prefix"; then
+    # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args.
+set dummy ${ac_tool_prefix}cc; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_prog_CC+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -n "$CC"; then
+  ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_CC="${ac_tool_prefix}cc"
+    echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+done
+IFS=$as_save_IFS
+
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+  { echo "$as_me:$LINENO: result: $CC" >&5
+echo "${ECHO_T}$CC" >&6; }
+else
+  { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+
+  fi
+fi
+if test -z "$CC"; then
+  # Extract the first word of "cc", so it can be a program name with args.
+set dummy cc; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_prog_CC+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -n "$CC"; then
+  ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+  ac_prog_rejected=no
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then
+       ac_prog_rejected=yes
+       continue
+     fi
+    ac_cv_prog_CC="cc"
+    echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+done
+IFS=$as_save_IFS
+
+if test $ac_prog_rejected = yes; then
+  # We found a bogon in the path, so make sure we never use it.
+  set dummy $ac_cv_prog_CC
+  shift
+  if test $# != 0; then
+    # We chose a different compiler from the bogus one.
+    # However, it has the same basename, so the bogon will be chosen
+    # first if we set CC to just the basename; use the full file name.
+    shift
+    ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@"
+  fi
+fi
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+  { echo "$as_me:$LINENO: result: $CC" >&5
+echo "${ECHO_T}$CC" >&6; }
+else
+  { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+
+fi
+if test -z "$CC"; then
+  if test -n "$ac_tool_prefix"; then
+  for ac_prog in cl.exe
+  do
+    # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
+set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_prog_CC+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -n "$CC"; then
+  ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_CC="$ac_tool_prefix$ac_prog"
+    echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+done
+IFS=$as_save_IFS
+
+fi
+fi
+CC=$ac_cv_prog_CC
+if test -n "$CC"; then
+  { echo "$as_me:$LINENO: result: $CC" >&5
+echo "${ECHO_T}$CC" >&6; }
+else
+  { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+
+    test -n "$CC" && break
+  done
+fi
+if test -z "$CC"; then
+  ac_ct_CC=$CC
+  for ac_prog in cl.exe
+do
+  # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_prog_ac_ct_CC+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -n "$ac_ct_CC"; then
+  ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_ac_ct_CC="$ac_prog"
+    echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_CC=$ac_cv_prog_ac_ct_CC
+if test -n "$ac_ct_CC"; then
+  { echo "$as_me:$LINENO: result: $ac_ct_CC" >&5
+echo "${ECHO_T}$ac_ct_CC" >&6; }
+else
+  { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+
+  test -n "$ac_ct_CC" && break
+done
+
+  if test "x$ac_ct_CC" = x; then
+    CC=""
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools
+whose name does not start with the host triplet.  If you think this
+configuration is useful to you, please write to autoconf@gnu.org." >&5
+echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools
+whose name does not start with the host triplet.  If you think this
+configuration is useful to you, please write to autoconf@gnu.org." >&2;}
+ac_tool_warned=yes ;;
+esac
+    CC=$ac_ct_CC
+  fi
+fi
+
+fi
+
+
+test -z "$CC" && { { echo "$as_me:$LINENO: error: no acceptable C compiler found in \$PATH
+See \`config.log' for more details." >&5
+echo "$as_me: error: no acceptable C compiler found in \$PATH
+See \`config.log' for more details." >&2;}
+   { (exit 1); exit 1; }; }
+
+# Provide some information about the compiler.
+echo "$as_me:$LINENO: checking for C compiler version" >&5
+ac_compiler=`set X $ac_compile; echo $2`
+{ (ac_try="$ac_compiler --version >&5"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compiler --version >&5") 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }
+{ (ac_try="$ac_compiler -v >&5"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compiler -v >&5") 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }
+{ (ac_try="$ac_compiler -V >&5"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compiler -V >&5") 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }
+
+cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+int
+main ()
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+ac_clean_files_save=$ac_clean_files
+ac_clean_files="$ac_clean_files a.out a.exe b.out"
+# Try to create an executable without -o first, disregard a.out.
+# It will help us diagnose broken compilers, and finding out an intuition
+# of exeext.
+{ echo "$as_me:$LINENO: checking for C compiler default output file name" >&5
+echo $ECHO_N "checking for C compiler default output file name... $ECHO_C" >&6; }
+ac_link_default=`echo "$ac_link" | sed 's/ -o *conftest[^ ]*//'`
+#
+# List of possible output files, starting from the most likely.
+# The algorithm is not robust to junk in `.', hence go to wildcards (a.*)
+# only as a last resort.  b.out is created by i960 compilers.
+ac_files='a_out.exe a.exe conftest.exe a.out conftest a.* conftest.* b.out'
+#
+# The IRIX 6 linker writes into existing files which may not be
+# executable, retaining their permissions.  Remove them first so a
+# subsequent execution test works.
+ac_rmfiles=
+for ac_file in $ac_files
+do
+  case $ac_file in
+    *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) ;;
+    * ) ac_rmfiles="$ac_rmfiles $ac_file";;
+  esac
+done
+rm -f $ac_rmfiles
+
+if { (ac_try="$ac_link_default"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_link_default") 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }; then
+  # Autoconf-2.13 could set the ac_cv_exeext variable to `no'.
+# So ignore a value of `no', otherwise this would lead to `EXEEXT = no'
+# in a Makefile.  We should not override ac_cv_exeext if it was cached,
+# so that the user can short-circuit this test for compilers unknown to
+# Autoconf.
+for ac_file in $ac_files ''
+do
+  test -f "$ac_file" || continue
+  case $ac_file in
+    *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj )
+	;;
+    [ab].out )
+	# We found the default executable, but exeext='' is most
+	# certainly right.
+	break;;
+    *.* )
+        if test "${ac_cv_exeext+set}" = set && test "$ac_cv_exeext" != no;
+	then :; else
+	   ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'`
+	fi
+	# We set ac_cv_exeext here because the later test for it is not
+	# safe: cross compilers may not add the suffix if given an `-o'
+	# argument, so we may need to know it at that point already.
+	# Even if this section looks crufty: it has the advantage of
+	# actually working.
+	break;;
+    * )
+	break;;
+  esac
+done
+test "$ac_cv_exeext" = no && ac_cv_exeext=
+
+else
+  ac_file=''
+fi
+
+{ echo "$as_me:$LINENO: result: $ac_file" >&5
+echo "${ECHO_T}$ac_file" >&6; }
+if test -z "$ac_file"; then
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+{ { echo "$as_me:$LINENO: error: C compiler cannot create executables
+See \`config.log' for more details." >&5
+echo "$as_me: error: C compiler cannot create executables
+See \`config.log' for more details." >&2;}
+   { (exit 77); exit 77; }; }
+fi
+
+ac_exeext=$ac_cv_exeext
+
+# Check that the compiler produces executables we can run.  If not, either
+# the compiler is broken, or we cross compile.
+{ echo "$as_me:$LINENO: checking whether the C compiler works" >&5
+echo $ECHO_N "checking whether the C compiler works... $ECHO_C" >&6; }
+# FIXME: These cross compiler hacks should be removed for Autoconf 3.0
+# If not cross compiling, check that we can run a simple program.
+if test "$cross_compiling" != yes; then
+  if { ac_try='./$ac_file'
+  { (case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_try") 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }; }; then
+    cross_compiling=no
+  else
+    if test "$cross_compiling" = maybe; then
+	cross_compiling=yes
+    else
+	{ { echo "$as_me:$LINENO: error: cannot run C compiled programs.
+If you meant to cross compile, use \`--host'.
+See \`config.log' for more details." >&5
+echo "$as_me: error: cannot run C compiled programs.
+If you meant to cross compile, use \`--host'.
+See \`config.log' for more details." >&2;}
+   { (exit 1); exit 1; }; }
+    fi
+  fi
+fi
+{ echo "$as_me:$LINENO: result: yes" >&5
+echo "${ECHO_T}yes" >&6; }
+
+rm -f a.out a.exe conftest$ac_cv_exeext b.out
+ac_clean_files=$ac_clean_files_save
+# Check that the compiler produces executables we can run.  If not, either
+# the compiler is broken, or we cross compile.
+{ echo "$as_me:$LINENO: checking whether we are cross compiling" >&5
+echo $ECHO_N "checking whether we are cross compiling... $ECHO_C" >&6; }
+{ echo "$as_me:$LINENO: result: $cross_compiling" >&5
+echo "${ECHO_T}$cross_compiling" >&6; }
+
+{ echo "$as_me:$LINENO: checking for suffix of executables" >&5
+echo $ECHO_N "checking for suffix of executables... $ECHO_C" >&6; }
+if { (ac_try="$ac_link"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_link") 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }; then
+  # If both `conftest.exe' and `conftest' are `present' (well, observable)
+# catch `conftest.exe'.  For instance with Cygwin, `ls conftest' will
+# work properly (i.e., refer to `conftest.exe'), while it won't with
+# `rm'.
+for ac_file in conftest.exe conftest conftest.*; do
+  test -f "$ac_file" || continue
+  case $ac_file in
+    *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf | *.o | *.obj ) ;;
+    *.* ) ac_cv_exeext=`expr "$ac_file" : '[^.]*\(\..*\)'`
+	  break;;
+    * ) break;;
+  esac
+done
+else
+  { { echo "$as_me:$LINENO: error: cannot compute suffix of executables: cannot compile and link
+See \`config.log' for more details." >&5
+echo "$as_me: error: cannot compute suffix of executables: cannot compile and link
+See \`config.log' for more details." >&2;}
+   { (exit 1); exit 1; }; }
+fi
+
+rm -f conftest$ac_cv_exeext
+{ echo "$as_me:$LINENO: result: $ac_cv_exeext" >&5
+echo "${ECHO_T}$ac_cv_exeext" >&6; }
+
+rm -f conftest.$ac_ext
+EXEEXT=$ac_cv_exeext
+ac_exeext=$EXEEXT
+{ echo "$as_me:$LINENO: checking for suffix of object files" >&5
+echo $ECHO_N "checking for suffix of object files... $ECHO_C" >&6; }
+if test "${ac_cv_objext+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+int
+main ()
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.o conftest.obj
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }; then
+  for ac_file in conftest.o conftest.obj conftest.*; do
+  test -f "$ac_file" || continue;
+  case $ac_file in
+    *.$ac_ext | *.xcoff | *.tds | *.d | *.pdb | *.xSYM | *.bb | *.bbg | *.map | *.inf ) ;;
+    *) ac_cv_objext=`expr "$ac_file" : '.*\.\(.*\)'`
+       break;;
+  esac
+done
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+{ { echo "$as_me:$LINENO: error: cannot compute suffix of object files: cannot compile
+See \`config.log' for more details." >&5
+echo "$as_me: error: cannot compute suffix of object files: cannot compile
+See \`config.log' for more details." >&2;}
+   { (exit 1); exit 1; }; }
+fi
+
+rm -f conftest.$ac_cv_objext conftest.$ac_ext
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_objext" >&5
+echo "${ECHO_T}$ac_cv_objext" >&6; }
+OBJEXT=$ac_cv_objext
+ac_objext=$OBJEXT
+{ echo "$as_me:$LINENO: checking whether we are using the GNU C compiler" >&5
+echo $ECHO_N "checking whether we are using the GNU C compiler... $ECHO_C" >&6; }
+if test "${ac_cv_c_compiler_gnu+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+int
+main ()
+{
+#ifndef __GNUC__
+       choke me
+#endif
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_compiler_gnu=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_compiler_gnu=no
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ac_cv_c_compiler_gnu=$ac_compiler_gnu
+
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_c_compiler_gnu" >&5
+echo "${ECHO_T}$ac_cv_c_compiler_gnu" >&6; }
+GCC=`test $ac_compiler_gnu = yes && echo yes`
+ac_test_CFLAGS=${CFLAGS+set}
+ac_save_CFLAGS=$CFLAGS
+{ echo "$as_me:$LINENO: checking whether $CC accepts -g" >&5
+echo $ECHO_N "checking whether $CC accepts -g... $ECHO_C" >&6; }
+if test "${ac_cv_prog_cc_g+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  ac_save_c_werror_flag=$ac_c_werror_flag
+   ac_c_werror_flag=yes
+   ac_cv_prog_cc_g=no
+   CFLAGS="-g"
+   cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+int
+main ()
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_cv_prog_cc_g=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	CFLAGS=""
+      cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+int
+main ()
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  :
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_c_werror_flag=$ac_save_c_werror_flag
+	 CFLAGS="-g"
+	 cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+int
+main ()
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_cv_prog_cc_g=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+   ac_c_werror_flag=$ac_save_c_werror_flag
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_prog_cc_g" >&5
+echo "${ECHO_T}$ac_cv_prog_cc_g" >&6; }
+if test "$ac_test_CFLAGS" = set; then
+  CFLAGS=$ac_save_CFLAGS
+elif test $ac_cv_prog_cc_g = yes; then
+  if test "$GCC" = yes; then
+    CFLAGS="-g -O2"
+  else
+    CFLAGS="-g"
+  fi
+else
+  if test "$GCC" = yes; then
+    CFLAGS="-O2"
+  else
+    CFLAGS=
+  fi
+fi
+{ echo "$as_me:$LINENO: checking for $CC option to accept ISO C89" >&5
+echo $ECHO_N "checking for $CC option to accept ISO C89... $ECHO_C" >&6; }
+if test "${ac_cv_prog_cc_c89+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  ac_cv_prog_cc_c89=no
+ac_save_CC=$CC
+cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <stdarg.h>
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+/* Most of the following tests are stolen from RCS 5.7's src/conf.sh.  */
+struct buf { int x; };
+FILE * (*rcsopen) (struct buf *, struct stat *, int);
+static char *e (p, i)
+     char **p;
+     int i;
+{
+  return p[i];
+}
+static char *f (char * (*g) (char **, int), char **p, ...)
+{
+  char *s;
+  va_list v;
+  va_start (v,p);
+  s = g (p, va_arg (v,int));
+  va_end (v);
+  return s;
+}
+
+/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default.  It has
+   function prototypes and stuff, but not '\xHH' hex character constants.
+   These don't provoke an error unfortunately, instead are silently treated
+   as 'x'.  The following induces an error, until -std is added to get
+   proper ANSI mode.  Curiously '\x00'!='x' always comes out true, for an
+   array size at least.  It's necessary to write '\x00'==0 to get something
+   that's true only with -std.  */
+int osf4_cc_array ['\x00' == 0 ? 1 : -1];
+
+/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters
+   inside strings and character constants.  */
+#define FOO(x) 'x'
+int xlc6_cc_array[FOO(a) == 'x' ? 1 : -1];
+
+int test (int i, double x);
+struct s1 {int (*f) (int a);};
+struct s2 {int (*f) (double a);};
+int pairnames (int, char **, FILE *(*)(struct buf *, struct stat *, int), int, int);
+int argc;
+char **argv;
+int
+main ()
+{
+return f (e, argv, 0) != argv[0]  ||  f (e, argv, 1) != argv[1];
+  ;
+  return 0;
+}
+_ACEOF
+for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std \
+	-Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__"
+do
+  CC="$ac_save_CC $ac_arg"
+  rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_cv_prog_cc_c89=$ac_arg
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+
+fi
+
+rm -f core conftest.err conftest.$ac_objext
+  test "x$ac_cv_prog_cc_c89" != "xno" && break
+done
+rm -f conftest.$ac_ext
+CC=$ac_save_CC
+
+fi
+# AC_CACHE_VAL
+case "x$ac_cv_prog_cc_c89" in
+  x)
+    { echo "$as_me:$LINENO: result: none needed" >&5
+echo "${ECHO_T}none needed" >&6; } ;;
+  xno)
+    { echo "$as_me:$LINENO: result: unsupported" >&5
+echo "${ECHO_T}unsupported" >&6; } ;;
+  *)
+    CC="$CC $ac_cv_prog_cc_c89"
+    { echo "$as_me:$LINENO: result: $ac_cv_prog_cc_c89" >&5
+echo "${ECHO_T}$ac_cv_prog_cc_c89" >&6; } ;;
+esac
+
+
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+DEPDIR="${am__leading_dot}deps"
+
+ac_config_commands="$ac_config_commands depfiles"
+
+
+am_make=${MAKE-make}
+cat > confinc << 'END'
+am__doit:
+	@echo done
+.PHONY: am__doit
+END
+# If we don't find an include directive, just comment out the code.
+{ echo "$as_me:$LINENO: checking for style of include used by $am_make" >&5
+echo $ECHO_N "checking for style of include used by $am_make... $ECHO_C" >&6; }
+am__include="#"
+am__quote=
+_am_result=none
+# First try GNU make style include.
+echo "include confinc" > confmf
+# We grep out `Entering directory' and `Leaving directory'
+# messages which can occur if `w' ends up in MAKEFLAGS.
+# In particular we don't look at `^make:' because GNU make might
+# be invoked under some other name (usually "gmake"), in which
+# case it prints its new name instead of `make'.
+if test "`$am_make -s -f confmf 2> /dev/null | grep -v 'ing directory'`" = "done"; then
+   am__include=include
+   am__quote=
+   _am_result=GNU
+fi
+# Now try BSD make style include.
+if test "$am__include" = "#"; then
+   echo '.include "confinc"' > confmf
+   if test "`$am_make -s -f confmf 2> /dev/null`" = "done"; then
+      am__include=.include
+      am__quote="\""
+      _am_result=BSD
+   fi
+fi
+
+
+{ echo "$as_me:$LINENO: result: $_am_result" >&5
+echo "${ECHO_T}$_am_result" >&6; }
+rm -f confinc confmf
+
+# Check whether --enable-dependency-tracking was given.
+if test "${enable_dependency_tracking+set}" = set; then
+  enableval=$enable_dependency_tracking;
+fi
+
+if test "x$enable_dependency_tracking" != xno; then
+  am_depcomp="$ac_aux_dir/depcomp"
+  AMDEPBACKSLASH='\'
+fi
+ if test "x$enable_dependency_tracking" != xno; then
+  AMDEP_TRUE=
+  AMDEP_FALSE='#'
+else
+  AMDEP_TRUE='#'
+  AMDEP_FALSE=
+fi
+
+
+
+depcc="$CC"   am_compiler_list=
+
+{ echo "$as_me:$LINENO: checking dependency style of $depcc" >&5
+echo $ECHO_N "checking dependency style of $depcc... $ECHO_C" >&6; }
+if test "${am_cv_CC_dependencies_compiler_type+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -z "$AMDEP_TRUE" && test -f "$am_depcomp"; then
+  # We make a subdir and do the tests there.  Otherwise we can end up
+  # making bogus files that we don't know about and never remove.  For
+  # instance it was reported that on HP-UX the gcc test will end up
+  # making a dummy file named `D' -- because `-MD' means `put the output
+  # in D'.
+  mkdir conftest.dir
+  # Copy depcomp to subdir because otherwise we won't find it if we're
+  # using a relative directory.
+  cp "$am_depcomp" conftest.dir
+  cd conftest.dir
+  # We will build objects and dependencies in a subdirectory because
+  # it helps to detect inapplicable dependency modes.  For instance
+  # both Tru64's cc and ICC support -MD to output dependencies as a
+  # side effect of compilation, but ICC will put the dependencies in
+  # the current directory while Tru64 will put them in the object
+  # directory.
+  mkdir sub
+
+  am_cv_CC_dependencies_compiler_type=none
+  if test "$am_compiler_list" = ""; then
+     am_compiler_list=`sed -n 's/^#*\([a-zA-Z0-9]*\))$/\1/p' < ./depcomp`
+  fi
+  for depmode in $am_compiler_list; do
+    # Setup a source with many dependencies, because some compilers
+    # like to wrap large dependency lists on column 80 (with \), and
+    # we should not choose a depcomp mode which is confused by this.
+    #
+    # We need to recreate these files for each test, as the compiler may
+    # overwrite some of them when testing with obscure command lines.
+    # This happens at least with the AIX C compiler.
+    : > sub/conftest.c
+    for i in 1 2 3 4 5 6; do
+      echo '#include "conftst'$i'.h"' >> sub/conftest.c
+      # Using `: > sub/conftst$i.h' creates only sub/conftst1.h with
+      # Solaris 8's {/usr,}/bin/sh.
+      touch sub/conftst$i.h
+    done
+    echo "${am__include} ${am__quote}sub/conftest.Po${am__quote}" > confmf
+
+    case $depmode in
+    nosideeffect)
+      # after this tag, mechanisms are not by side-effect, so they'll
+      # only be used when explicitly requested
+      if test "x$enable_dependency_tracking" = xyes; then
+	continue
+      else
+	break
+      fi
+      ;;
+    none) break ;;
+    esac
+    # We check with `-c' and `-o' for the sake of the "dashmstdout"
+    # mode.  It turns out that the SunPro C++ compiler does not properly
+    # handle `-M -o', and we need to detect this.
+    if depmode=$depmode \
+       source=sub/conftest.c object=sub/conftest.${OBJEXT-o} \
+       depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \
+       $SHELL ./depcomp $depcc -c -o sub/conftest.${OBJEXT-o} sub/conftest.c \
+         >/dev/null 2>conftest.err &&
+       grep sub/conftst1.h sub/conftest.Po > /dev/null 2>&1 &&
+       grep sub/conftst6.h sub/conftest.Po > /dev/null 2>&1 &&
+       grep sub/conftest.${OBJEXT-o} sub/conftest.Po > /dev/null 2>&1 &&
+       ${MAKE-make} -s -f confmf > /dev/null 2>&1; then
+      # icc doesn't choke on unknown options, it will just issue warnings
+      # or remarks (even with -Werror).  So we grep stderr for any message
+      # that says an option was ignored or not supported.
+      # When given -MP, icc 7.0 and 7.1 complain thusly:
+      #   icc: Command line warning: ignoring option '-M'; no argument required
+      # The diagnosis changed in icc 8.0:
+      #   icc: Command line remark: option '-MP' not supported
+      if (grep 'ignoring option' conftest.err ||
+          grep 'not supported' conftest.err) >/dev/null 2>&1; then :; else
+        am_cv_CC_dependencies_compiler_type=$depmode
+        break
+      fi
+    fi
+  done
+
+  cd ..
+  rm -rf conftest.dir
+else
+  am_cv_CC_dependencies_compiler_type=none
+fi
+
+fi
+{ echo "$as_me:$LINENO: result: $am_cv_CC_dependencies_compiler_type" >&5
+echo "${ECHO_T}$am_cv_CC_dependencies_compiler_type" >&6; }
+CCDEPMODE=depmode=$am_cv_CC_dependencies_compiler_type
+
+ if
+  test "x$enable_dependency_tracking" != xno \
+  && test "$am_cv_CC_dependencies_compiler_type" = gcc3; then
+  am__fastdepCC_TRUE=
+  am__fastdepCC_FALSE='#'
+else
+  am__fastdepCC_TRUE='#'
+  am__fastdepCC_FALSE=
+fi
+
+
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+{ echo "$as_me:$LINENO: checking how to run the C preprocessor" >&5
+echo $ECHO_N "checking how to run the C preprocessor... $ECHO_C" >&6; }
+# On Suns, sometimes $CPP names a directory.
+if test -n "$CPP" && test -d "$CPP"; then
+  CPP=
+fi
+if test -z "$CPP"; then
+  if test "${ac_cv_prog_CPP+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+      # Double quotes because CPP needs to be expanded
+    for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp"
+    do
+      ac_preproc_ok=false
+for ac_c_preproc_warn_flag in '' yes
+do
+  # Use a header file that comes with gcc, so configuring glibc
+  # with a fresh cross-compiler works.
+  # Prefer <limits.h> to <assert.h> if __STDC__ is defined, since
+  # <limits.h> exists even on freestanding compilers.
+  # On the NeXT, cc -E runs the code through the compiler's parser,
+  # not just through cpp. "Syntax error" is here to catch this case.
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#ifdef __STDC__
+# include <limits.h>
+#else
+# include <assert.h>
+#endif
+		     Syntax error
+_ACEOF
+if { (ac_try="$ac_cpp conftest.$ac_ext"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } >/dev/null && {
+	 test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       }; then
+  :
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+  # Broken: fails on valid input.
+continue
+fi
+
+rm -f conftest.err conftest.$ac_ext
+
+  # OK, works on sane cases.  Now check whether nonexistent headers
+  # can be detected and how.
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <ac_nonexistent.h>
+_ACEOF
+if { (ac_try="$ac_cpp conftest.$ac_ext"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } >/dev/null && {
+	 test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       }; then
+  # Broken: success on invalid input.
+continue
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+  # Passes both tests.
+ac_preproc_ok=:
+break
+fi
+
+rm -f conftest.err conftest.$ac_ext
+
+done
+# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped.
+rm -f conftest.err conftest.$ac_ext
+if $ac_preproc_ok; then
+  break
+fi
+
+    done
+    ac_cv_prog_CPP=$CPP
+
+fi
+  CPP=$ac_cv_prog_CPP
+else
+  ac_cv_prog_CPP=$CPP
+fi
+{ echo "$as_me:$LINENO: result: $CPP" >&5
+echo "${ECHO_T}$CPP" >&6; }
+ac_preproc_ok=false
+for ac_c_preproc_warn_flag in '' yes
+do
+  # Use a header file that comes with gcc, so configuring glibc
+  # with a fresh cross-compiler works.
+  # Prefer <limits.h> to <assert.h> if __STDC__ is defined, since
+  # <limits.h> exists even on freestanding compilers.
+  # On the NeXT, cc -E runs the code through the compiler's parser,
+  # not just through cpp. "Syntax error" is here to catch this case.
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#ifdef __STDC__
+# include <limits.h>
+#else
+# include <assert.h>
+#endif
+		     Syntax error
+_ACEOF
+if { (ac_try="$ac_cpp conftest.$ac_ext"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } >/dev/null && {
+	 test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       }; then
+  :
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+  # Broken: fails on valid input.
+continue
+fi
+
+rm -f conftest.err conftest.$ac_ext
+
+  # OK, works on sane cases.  Now check whether nonexistent headers
+  # can be detected and how.
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <ac_nonexistent.h>
+_ACEOF
+if { (ac_try="$ac_cpp conftest.$ac_ext"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } >/dev/null && {
+	 test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       }; then
+  # Broken: success on invalid input.
+continue
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+  # Passes both tests.
+ac_preproc_ok=:
+break
+fi
+
+rm -f conftest.err conftest.$ac_ext
+
+done
+# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped.
+rm -f conftest.err conftest.$ac_ext
+if $ac_preproc_ok; then
+  :
+else
+  { { echo "$as_me:$LINENO: error: C preprocessor \"$CPP\" fails sanity check
+See \`config.log' for more details." >&5
+echo "$as_me: error: C preprocessor \"$CPP\" fails sanity check
+See \`config.log' for more details." >&2;}
+   { (exit 1); exit 1; }; }
+fi
+
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+ac_ext=cpp
+ac_cpp='$CXXCPP $CPPFLAGS'
+ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
+if test -z "$CXX"; then
+  if test -n "$CCC"; then
+    CXX=$CCC
+  else
+    if test -n "$ac_tool_prefix"; then
+  for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
+  do
+    # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
+set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_prog_CXX+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -n "$CXX"; then
+  ac_cv_prog_CXX="$CXX" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_CXX="$ac_tool_prefix$ac_prog"
+    echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+done
+IFS=$as_save_IFS
+
+fi
+fi
+CXX=$ac_cv_prog_CXX
+if test -n "$CXX"; then
+  { echo "$as_me:$LINENO: result: $CXX" >&5
+echo "${ECHO_T}$CXX" >&6; }
+else
+  { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+
+    test -n "$CXX" && break
+  done
+fi
+if test -z "$CXX"; then
+  ac_ct_CXX=$CXX
+  for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
+do
+  # Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_prog_ac_ct_CXX+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -n "$ac_ct_CXX"; then
+  ac_cv_prog_ac_ct_CXX="$ac_ct_CXX" # Let the user override the test.
+else
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_exec_ext in '' $ac_executable_extensions; do
+  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+    ac_cv_prog_ac_ct_CXX="$ac_prog"
+    echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+    break 2
+  fi
+done
+done
+IFS=$as_save_IFS
+
+fi
+fi
+ac_ct_CXX=$ac_cv_prog_ac_ct_CXX
+if test -n "$ac_ct_CXX"; then
+  { echo "$as_me:$LINENO: result: $ac_ct_CXX" >&5
+echo "${ECHO_T}$ac_ct_CXX" >&6; }
+else
+  { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+
+  test -n "$ac_ct_CXX" && break
+done
+
+  if test "x$ac_ct_CXX" = x; then
+    CXX="g++"
+  else
+    case $cross_compiling:$ac_tool_warned in
+yes:)
+{ echo "$as_me:$LINENO: WARNING: In the future, Autoconf will not detect cross-tools
+whose name does not start with the host triplet.  If you think this
+configuration is useful to you, please write to autoconf@gnu.org." >&5
+echo "$as_me: WARNING: In the future, Autoconf will not detect cross-tools
+whose name does not start with the host triplet.  If you think this
+configuration is useful to you, please write to autoconf@gnu.org." >&2;}
+ac_tool_warned=yes ;;
+esac
+    CXX=$ac_ct_CXX
+  fi
+fi
+
+  fi
+fi
+# Provide some information about the compiler.
+echo "$as_me:$LINENO: checking for C++ compiler version" >&5
+ac_compiler=`set X $ac_compile; echo $2`
+{ (ac_try="$ac_compiler --version >&5"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compiler --version >&5") 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }
+{ (ac_try="$ac_compiler -v >&5"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compiler -v >&5") 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }
+{ (ac_try="$ac_compiler -V >&5"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compiler -V >&5") 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }
+
+{ echo "$as_me:$LINENO: checking whether we are using the GNU C++ compiler" >&5
+echo $ECHO_N "checking whether we are using the GNU C++ compiler... $ECHO_C" >&6; }
+if test "${ac_cv_cxx_compiler_gnu+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+int
+main ()
+{
+#ifndef __GNUC__
+       choke me
+#endif
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_cxx_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_compiler_gnu=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_compiler_gnu=no
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+ac_cv_cxx_compiler_gnu=$ac_compiler_gnu
+
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_cxx_compiler_gnu" >&5
+echo "${ECHO_T}$ac_cv_cxx_compiler_gnu" >&6; }
+GXX=`test $ac_compiler_gnu = yes && echo yes`
+ac_test_CXXFLAGS=${CXXFLAGS+set}
+ac_save_CXXFLAGS=$CXXFLAGS
+{ echo "$as_me:$LINENO: checking whether $CXX accepts -g" >&5
+echo $ECHO_N "checking whether $CXX accepts -g... $ECHO_C" >&6; }
+if test "${ac_cv_prog_cxx_g+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  ac_save_cxx_werror_flag=$ac_cxx_werror_flag
+   ac_cxx_werror_flag=yes
+   ac_cv_prog_cxx_g=no
+   CXXFLAGS="-g"
+   cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+int
+main ()
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_cxx_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_cv_prog_cxx_g=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	CXXFLAGS=""
+      cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+int
+main ()
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_cxx_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  :
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_cxx_werror_flag=$ac_save_cxx_werror_flag
+	 CXXFLAGS="-g"
+	 cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+int
+main ()
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_cxx_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_cv_prog_cxx_g=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+   ac_cxx_werror_flag=$ac_save_cxx_werror_flag
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_prog_cxx_g" >&5
+echo "${ECHO_T}$ac_cv_prog_cxx_g" >&6; }
+if test "$ac_test_CXXFLAGS" = set; then
+  CXXFLAGS=$ac_save_CXXFLAGS
+elif test $ac_cv_prog_cxx_g = yes; then
+  if test "$GXX" = yes; then
+    CXXFLAGS="-g -O2"
+  else
+    CXXFLAGS="-g"
+  fi
+else
+  if test "$GXX" = yes; then
+    CXXFLAGS="-O2"
+  else
+    CXXFLAGS=
+  fi
+fi
+ac_ext=c
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
+ac_compiler_gnu=$ac_cv_c_compiler_gnu
+
+depcc="$CXX"  am_compiler_list=
+
+{ echo "$as_me:$LINENO: checking dependency style of $depcc" >&5
+echo $ECHO_N "checking dependency style of $depcc... $ECHO_C" >&6; }
+if test "${am_cv_CXX_dependencies_compiler_type+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if test -z "$AMDEP_TRUE" && test -f "$am_depcomp"; then
+  # We make a subdir and do the tests there.  Otherwise we can end up
+  # making bogus files that we don't know about and never remove.  For
+  # instance it was reported that on HP-UX the gcc test will end up
+  # making a dummy file named `D' -- because `-MD' means `put the output
+  # in D'.
+  mkdir conftest.dir
+  # Copy depcomp to subdir because otherwise we won't find it if we're
+  # using a relative directory.
+  cp "$am_depcomp" conftest.dir
+  cd conftest.dir
+  # We will build objects and dependencies in a subdirectory because
+  # it helps to detect inapplicable dependency modes.  For instance
+  # both Tru64's cc and ICC support -MD to output dependencies as a
+  # side effect of compilation, but ICC will put the dependencies in
+  # the current directory while Tru64 will put them in the object
+  # directory.
+  mkdir sub
+
+  am_cv_CXX_dependencies_compiler_type=none
+  if test "$am_compiler_list" = ""; then
+     am_compiler_list=`sed -n 's/^#*\([a-zA-Z0-9]*\))$/\1/p' < ./depcomp`
+  fi
+  for depmode in $am_compiler_list; do
+    # Setup a source with many dependencies, because some compilers
+    # like to wrap large dependency lists on column 80 (with \), and
+    # we should not choose a depcomp mode which is confused by this.
+    #
+    # We need to recreate these files for each test, as the compiler may
+    # overwrite some of them when testing with obscure command lines.
+    # This happens at least with the AIX C compiler.
+    : > sub/conftest.c
+    for i in 1 2 3 4 5 6; do
+      echo '#include "conftst'$i'.h"' >> sub/conftest.c
+      # Using `: > sub/conftst$i.h' creates only sub/conftst1.h with
+      # Solaris 8's {/usr,}/bin/sh.
+      touch sub/conftst$i.h
+    done
+    echo "${am__include} ${am__quote}sub/conftest.Po${am__quote}" > confmf
+
+    case $depmode in
+    nosideeffect)
+      # after this tag, mechanisms are not by side-effect, so they'll
+      # only be used when explicitly requested
+      if test "x$enable_dependency_tracking" = xyes; then
+	continue
+      else
+	break
+      fi
+      ;;
+    none) break ;;
+    esac
+    # We check with `-c' and `-o' for the sake of the "dashmstdout"
+    # mode.  It turns out that the SunPro C++ compiler does not properly
+    # handle `-M -o', and we need to detect this.
+    if depmode=$depmode \
+       source=sub/conftest.c object=sub/conftest.${OBJEXT-o} \
+       depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \
+       $SHELL ./depcomp $depcc -c -o sub/conftest.${OBJEXT-o} sub/conftest.c \
+         >/dev/null 2>conftest.err &&
+       grep sub/conftst1.h sub/conftest.Po > /dev/null 2>&1 &&
+       grep sub/conftst6.h sub/conftest.Po > /dev/null 2>&1 &&
+       grep sub/conftest.${OBJEXT-o} sub/conftest.Po > /dev/null 2>&1 &&
+       ${MAKE-make} -s -f confmf > /dev/null 2>&1; then
+      # icc doesn't choke on unknown options, it will just issue warnings
+      # or remarks (even with -Werror).  So we grep stderr for any message
+      # that says an option was ignored or not supported.
+      # When given -MP, icc 7.0 and 7.1 complain thusly:
+      #   icc: Command line warning: ignoring option '-M'; no argument required
+      # The diagnosis changed in icc 8.0:
+      #   icc: Command line remark: option '-MP' not supported
+      if (grep 'ignoring option' conftest.err ||
+          grep 'not supported' conftest.err) >/dev/null 2>&1; then :; else
+        am_cv_CXX_dependencies_compiler_type=$depmode
+        break
+      fi
+    fi
+  done
+
+  cd ..
+  rm -rf conftest.dir
+else
+  am_cv_CXX_dependencies_compiler_type=none
+fi
+
+fi
+{ echo "$as_me:$LINENO: result: $am_cv_CXX_dependencies_compiler_type" >&5
+echo "${ECHO_T}$am_cv_CXX_dependencies_compiler_type" >&6; }
+CXXDEPMODE=depmode=$am_cv_CXX_dependencies_compiler_type
+
+ if
+  test "x$enable_dependency_tracking" != xno \
+  && test "$am_cv_CXX_dependencies_compiler_type" = gcc3; then
+  am__fastdepCXX_TRUE=
+  am__fastdepCXX_FALSE='#'
+else
+  am__fastdepCXX_TRUE='#'
+  am__fastdepCXX_FALSE=
+fi
+
+
+
+
+{ echo "$as_me:$LINENO: checking for grep that handles long lines and -e" >&5
+echo $ECHO_N "checking for grep that handles long lines and -e... $ECHO_C" >&6; }
+if test "${ac_cv_path_GREP+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  # Extract the first word of "grep ggrep" to use in msg output
+if test -z "$GREP"; then
+set dummy grep ggrep; ac_prog_name=$2
+if test "${ac_cv_path_GREP+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  ac_path_GREP_found=false
+# Loop through the user's path and test for each of PROGNAME-LIST
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_prog in grep ggrep; do
+  for ac_exec_ext in '' $ac_executable_extensions; do
+    ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext"
+    { test -f "$ac_path_GREP" && $as_test_x "$ac_path_GREP"; } || continue
+    # Check for GNU ac_path_GREP and select it if it is found.
+  # Check for GNU $ac_path_GREP
+case `"$ac_path_GREP" --version 2>&1` in
+*GNU*)
+  ac_cv_path_GREP="$ac_path_GREP" ac_path_GREP_found=:;;
+*)
+  ac_count=0
+  echo $ECHO_N "0123456789$ECHO_C" >"conftest.in"
+  while :
+  do
+    cat "conftest.in" "conftest.in" >"conftest.tmp"
+    mv "conftest.tmp" "conftest.in"
+    cp "conftest.in" "conftest.nl"
+    echo 'GREP' >> "conftest.nl"
+    "$ac_path_GREP" -e 'GREP$' -e '-(cannot match)-' < "conftest.nl" >"conftest.out" 2>/dev/null || break
+    diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break
+    ac_count=`expr $ac_count + 1`
+    if test $ac_count -gt ${ac_path_GREP_max-0}; then
+      # Best one so far, save it but keep looking for a better one
+      ac_cv_path_GREP="$ac_path_GREP"
+      ac_path_GREP_max=$ac_count
+    fi
+    # 10*(2^10) chars as input seems more than enough
+    test $ac_count -gt 10 && break
+  done
+  rm -f conftest.in conftest.tmp conftest.nl conftest.out;;
+esac
+
+
+    $ac_path_GREP_found && break 3
+  done
+done
+
+done
+IFS=$as_save_IFS
+
+
+fi
+
+GREP="$ac_cv_path_GREP"
+if test -z "$GREP"; then
+  { { echo "$as_me:$LINENO: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5
+echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;}
+   { (exit 1); exit 1; }; }
+fi
+
+else
+  ac_cv_path_GREP=$GREP
+fi
+
+
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_path_GREP" >&5
+echo "${ECHO_T}$ac_cv_path_GREP" >&6; }
+ GREP="$ac_cv_path_GREP"
+
+
+{ echo "$as_me:$LINENO: checking for egrep" >&5
+echo $ECHO_N "checking for egrep... $ECHO_C" >&6; }
+if test "${ac_cv_path_EGREP+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  if echo a | $GREP -E '(a|b)' >/dev/null 2>&1
+   then ac_cv_path_EGREP="$GREP -E"
+   else
+     # Extract the first word of "egrep" to use in msg output
+if test -z "$EGREP"; then
+set dummy egrep; ac_prog_name=$2
+if test "${ac_cv_path_EGREP+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  ac_path_EGREP_found=false
+# Loop through the user's path and test for each of PROGNAME-LIST
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for ac_prog in egrep; do
+  for ac_exec_ext in '' $ac_executable_extensions; do
+    ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext"
+    { test -f "$ac_path_EGREP" && $as_test_x "$ac_path_EGREP"; } || continue
+    # Check for GNU ac_path_EGREP and select it if it is found.
+  # Check for GNU $ac_path_EGREP
+case `"$ac_path_EGREP" --version 2>&1` in
+*GNU*)
+  ac_cv_path_EGREP="$ac_path_EGREP" ac_path_EGREP_found=:;;
+*)
+  ac_count=0
+  echo $ECHO_N "0123456789$ECHO_C" >"conftest.in"
+  while :
+  do
+    cat "conftest.in" "conftest.in" >"conftest.tmp"
+    mv "conftest.tmp" "conftest.in"
+    cp "conftest.in" "conftest.nl"
+    echo 'EGREP' >> "conftest.nl"
+    "$ac_path_EGREP" 'EGREP$' < "conftest.nl" >"conftest.out" 2>/dev/null || break
+    diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break
+    ac_count=`expr $ac_count + 1`
+    if test $ac_count -gt ${ac_path_EGREP_max-0}; then
+      # Best one so far, save it but keep looking for a better one
+      ac_cv_path_EGREP="$ac_path_EGREP"
+      ac_path_EGREP_max=$ac_count
+    fi
+    # 10*(2^10) chars as input seems more than enough
+    test $ac_count -gt 10 && break
+  done
+  rm -f conftest.in conftest.tmp conftest.nl conftest.out;;
+esac
+
+
+    $ac_path_EGREP_found && break 3
+  done
+done
+
+done
+IFS=$as_save_IFS
+
+
+fi
+
+EGREP="$ac_cv_path_EGREP"
+if test -z "$EGREP"; then
+  { { echo "$as_me:$LINENO: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&5
+echo "$as_me: error: no acceptable $ac_prog_name could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" >&2;}
+   { (exit 1); exit 1; }; }
+fi
+
+else
+  ac_cv_path_EGREP=$EGREP
+fi
+
+
+   fi
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_path_EGREP" >&5
+echo "${ECHO_T}$ac_cv_path_EGREP" >&6; }
+ EGREP="$ac_cv_path_EGREP"
+
+
+if test $ac_cv_c_compiler_gnu = yes; then
+    { echo "$as_me:$LINENO: checking whether $CC needs -traditional" >&5
+echo $ECHO_N "checking whether $CC needs -traditional... $ECHO_C" >&6; }
+if test "${ac_cv_prog_gcc_traditional+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+    ac_pattern="Autoconf.*'x'"
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <sgtty.h>
+Autoconf TIOCGETP
+_ACEOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+  $EGREP "$ac_pattern" >/dev/null 2>&1; then
+  ac_cv_prog_gcc_traditional=yes
+else
+  ac_cv_prog_gcc_traditional=no
+fi
+rm -f conftest*
+
+
+  if test $ac_cv_prog_gcc_traditional = no; then
+    cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <termio.h>
+Autoconf TCGETA
+_ACEOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+  $EGREP "$ac_pattern" >/dev/null 2>&1; then
+  ac_cv_prog_gcc_traditional=yes
+fi
+rm -f conftest*
+
+  fi
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_prog_gcc_traditional" >&5
+echo "${ECHO_T}$ac_cv_prog_gcc_traditional" >&6; }
+  if test $ac_cv_prog_gcc_traditional = yes; then
+    CC="$CC -traditional"
+  fi
+fi
+
+
+{ echo "$as_me:$LINENO: checking for error_at_line" >&5
+echo $ECHO_N "checking for error_at_line... $ECHO_C" >&6; }
+if test "${ac_cv_lib_error_at_line+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <error.h>
+int
+main ()
+{
+error_at_line (0, 0, "", 0, "an error occurred");
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext conftest$ac_exeext
+if { (ac_try="$ac_link"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_link") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest$ac_exeext &&
+       $as_test_x conftest$ac_exeext; then
+  ac_cv_lib_error_at_line=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_cv_lib_error_at_line=no
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \
+      conftest$ac_exeext conftest.$ac_ext
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_lib_error_at_line" >&5
+echo "${ECHO_T}$ac_cv_lib_error_at_line" >&6; }
+if test $ac_cv_lib_error_at_line = no; then
+  case " $LIBOBJS " in
+  *" error.$ac_objext "* ) ;;
+  *) LIBOBJS="$LIBOBJS error.$ac_objext"
+ ;;
+esac
+
+fi
+
+{ echo "$as_me:$LINENO: checking for ANSI C header files" >&5
+echo $ECHO_N "checking for ANSI C header files... $ECHO_C" >&6; }
+if test "${ac_cv_header_stdc+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <stdlib.h>
+#include <stdarg.h>
+#include <string.h>
+#include <float.h>
+
+int
+main ()
+{
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_cv_header_stdc=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_cv_header_stdc=no
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+
+if test $ac_cv_header_stdc = yes; then
+  # SunOS 4.x string.h does not declare mem*, contrary to ANSI.
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <string.h>
+
+_ACEOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+  $EGREP "memchr" >/dev/null 2>&1; then
+  :
+else
+  ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+fi
+
+if test $ac_cv_header_stdc = yes; then
+  # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI.
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <stdlib.h>
+
+_ACEOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+  $EGREP "free" >/dev/null 2>&1; then
+  :
+else
+  ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+fi
+
+if test $ac_cv_header_stdc = yes; then
+  # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi.
+  if test "$cross_compiling" = yes; then
+  :
+else
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <ctype.h>
+#include <stdlib.h>
+#if ((' ' & 0x0FF) == 0x020)
+# define ISLOWER(c) ('a' <= (c) && (c) <= 'z')
+# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c))
+#else
+# define ISLOWER(c) \
+		   (('a' <= (c) && (c) <= 'i') \
+		     || ('j' <= (c) && (c) <= 'r') \
+		     || ('s' <= (c) && (c) <= 'z'))
+# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c))
+#endif
+
+#define XOR(e, f) (((e) && !(f)) || (!(e) && (f)))
+int
+main ()
+{
+  int i;
+  for (i = 0; i < 256; i++)
+    if (XOR (islower (i), ISLOWER (i))
+	|| toupper (i) != TOUPPER (i))
+      return 2;
+  return 0;
+}
+_ACEOF
+rm -f conftest$ac_exeext
+if { (ac_try="$ac_link"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_link") 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && { ac_try='./conftest$ac_exeext'
+  { (case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_try") 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }; }; then
+  :
+else
+  echo "$as_me: program exited with status $ac_status" >&5
+echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+( exit $ac_status )
+ac_cv_header_stdc=no
+fi
+rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext
+fi
+
+
+fi
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_header_stdc" >&5
+echo "${ECHO_T}$ac_cv_header_stdc" >&6; }
+if test $ac_cv_header_stdc = yes; then
+
+cat >>confdefs.h <<\_ACEOF
+#define STDC_HEADERS 1
+_ACEOF
+
+fi
+
+# On IRIX 5.3, sys/types and inttypes.h are conflicting.
+
+
+
+
+
+
+
+
+
+for ac_header in sys/types.h sys/stat.h stdlib.h string.h memory.h strings.h \
+		  inttypes.h stdint.h unistd.h
+do
+as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh`
+{ echo "$as_me:$LINENO: checking for $ac_header" >&5
+echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; }
+if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+$ac_includes_default
+
+#include <$ac_header>
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  eval "$as_ac_Header=yes"
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	eval "$as_ac_Header=no"
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+ac_res=`eval echo '${'$as_ac_Header'}'`
+	       { echo "$as_me:$LINENO: result: $ac_res" >&5
+echo "${ECHO_T}$ac_res" >&6; }
+if test `eval echo '${'$as_ac_Header'}'` = yes; then
+  cat >>confdefs.h <<_ACEOF
+#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1
+_ACEOF
+
+fi
+
+done
+
+
+{ echo "$as_me:$LINENO: checking for stdbool.h that conforms to C99" >&5
+echo $ECHO_N "checking for stdbool.h that conforms to C99... $ECHO_C" >&6; }
+if test "${ac_cv_header_stdbool_h+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+#include <stdbool.h>
+#ifndef bool
+ "error: bool is not defined"
+#endif
+#ifndef false
+ "error: false is not defined"
+#endif
+#if false
+ "error: false is not 0"
+#endif
+#ifndef true
+ "error: true is not defined"
+#endif
+#if true != 1
+ "error: true is not 1"
+#endif
+#ifndef __bool_true_false_are_defined
+ "error: __bool_true_false_are_defined is not defined"
+#endif
+
+	struct s { _Bool s: 1; _Bool t; } s;
+
+	char a[true == 1 ? 1 : -1];
+	char b[false == 0 ? 1 : -1];
+	char c[__bool_true_false_are_defined == 1 ? 1 : -1];
+	char d[(bool) 0.5 == true ? 1 : -1];
+	bool e = &s;
+	char f[(_Bool) 0.0 == false ? 1 : -1];
+	char g[true];
+	char h[sizeof (_Bool)];
+	char i[sizeof s.t];
+	enum { j = false, k = true, l = false * true, m = true * 256 };
+	_Bool n[m];
+	char o[sizeof n == m * sizeof n[0] ? 1 : -1];
+	char p[-1 - (_Bool) 0 < 0 && -1 - (bool) 0 < 0 ? 1 : -1];
+#	if defined __xlc__ || defined __GNUC__
+	 /* Catch a bug in IBM AIX xlc compiler version 6.0.0.0
+	    reported by James Lemley on 2005-10-05; see
+	    http://lists.gnu.org/archive/html/bug-coreutils/2005-10/msg00086.html
+	    This test is not quite right, since xlc is allowed to
+	    reject this program, as the initializer for xlcbug is
+	    not one of the forms that C requires support for.
+	    However, doing the test right would require a runtime
+	    test, and that would make cross-compilation harder.
+	    Let us hope that IBM fixes the xlc bug, and also adds
+	    support for this kind of constant expression.  In the
+	    meantime, this test will reject xlc, which is OK, since
+	    our stdbool.h substitute should suffice.  We also test
+	    this with GCC, where it should work, to detect more
+	    quickly whether someone messes up the test in the
+	    future.  */
+	 char digs[] = "0123456789";
+	 int xlcbug = 1 / (&(digs + 5)[-2 + (bool) 1] == &digs[4] ? 1 : -1);
+#	endif
+	/* Catch a bug in an HP-UX C compiler.  See
+	   http://gcc.gnu.org/ml/gcc-patches/2003-12/msg02303.html
+	   http://lists.gnu.org/archive/html/bug-coreutils/2005-11/msg00161.html
+	 */
+	_Bool q = true;
+	_Bool *pq = &q;
+
+int
+main ()
+{
+
+	*pq |= q;
+	*pq |= ! q;
+	/* Refer to every declared value, to avoid compiler optimizations.  */
+	return (!a + !b + !c + !d + !e + !f + !g + !h + !i + !!j + !k + !!l
+		+ !m + !n + !o + !p + !q + !pq);
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_cv_header_stdbool_h=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_cv_header_stdbool_h=no
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_header_stdbool_h" >&5
+echo "${ECHO_T}$ac_cv_header_stdbool_h" >&6; }
+{ echo "$as_me:$LINENO: checking for _Bool" >&5
+echo $ECHO_N "checking for _Bool... $ECHO_C" >&6; }
+if test "${ac_cv_type__Bool+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+$ac_includes_default
+typedef _Bool ac__type_new_;
+int
+main ()
+{
+if ((ac__type_new_ *) 0)
+  return 0;
+if (sizeof (ac__type_new_))
+  return 0;
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_cv_type__Bool=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_cv_type__Bool=no
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_type__Bool" >&5
+echo "${ECHO_T}$ac_cv_type__Bool" >&6; }
+if test $ac_cv_type__Bool = yes; then
+
+cat >>confdefs.h <<_ACEOF
+#define HAVE__BOOL 1
+_ACEOF
+
+
+fi
+
+if test $ac_cv_header_stdbool_h = yes; then
+
+cat >>confdefs.h <<\_ACEOF
+#define HAVE_STDBOOL_H 1
+_ACEOF
+
+fi
+
+{ echo "$as_me:$LINENO: checking whether time.h and sys/time.h may both be included" >&5
+echo $ECHO_N "checking whether time.h and sys/time.h may both be included... $ECHO_C" >&6; }
+if test "${ac_cv_header_time+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <sys/types.h>
+#include <sys/time.h>
+#include <time.h>
+
+int
+main ()
+{
+if ((struct tm *) 0)
+return 0;
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_cv_header_time=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_cv_header_time=no
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_header_time" >&5
+echo "${ECHO_T}$ac_cv_header_time" >&6; }
+if test $ac_cv_header_time = yes; then
+
+cat >>confdefs.h <<\_ACEOF
+#define TIME_WITH_SYS_TIME 1
+_ACEOF
+
+fi
+
+
+#checks for header files and libraries
+
+
+
+
+
+
+
+
+
+for ac_header in linux/version.h popt.h fcntl.h inttypes.h stdlib.h sys/ioctl.h sys/time.h termios.h unistd.h
+do
+as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh`
+if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then
+  { echo "$as_me:$LINENO: checking for $ac_header" >&5
+echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; }
+if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+fi
+ac_res=`eval echo '${'$as_ac_Header'}'`
+	       { echo "$as_me:$LINENO: result: $ac_res" >&5
+echo "${ECHO_T}$ac_res" >&6; }
+else
+  # Is the header compilable?
+{ echo "$as_me:$LINENO: checking $ac_header usability" >&5
+echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6; }
+cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+$ac_includes_default
+#include <$ac_header>
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_header_compiler=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_header_compiler=no
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5
+echo "${ECHO_T}$ac_header_compiler" >&6; }
+
+# Is the header present?
+{ echo "$as_me:$LINENO: checking $ac_header presence" >&5
+echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6; }
+cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <$ac_header>
+_ACEOF
+if { (ac_try="$ac_cpp conftest.$ac_ext"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } >/dev/null && {
+	 test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       }; then
+  ac_header_preproc=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+  ac_header_preproc=no
+fi
+
+rm -f conftest.err conftest.$ac_ext
+{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5
+echo "${ECHO_T}$ac_header_preproc" >&6; }
+
+# So?  What about this header?
+case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in
+  yes:no: )
+    { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5
+echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;}
+    { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5
+echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;}
+    ac_header_preproc=yes
+    ;;
+  no:yes:* )
+    { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5
+echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;}
+    { echo "$as_me:$LINENO: WARNING: $ac_header:     check for missing prerequisite headers?" >&5
+echo "$as_me: WARNING: $ac_header:     check for missing prerequisite headers?" >&2;}
+    { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5
+echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;}
+    { echo "$as_me:$LINENO: WARNING: $ac_header:     section \"Present But Cannot Be Compiled\"" >&5
+echo "$as_me: WARNING: $ac_header:     section \"Present But Cannot Be Compiled\"" >&2;}
+    { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5
+echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;}
+    { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5
+echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;}
+    ( cat <<\_ASBOX
+## -------------------------------------- ##
+## Report this to koepke@tkn.tu-berlin.de ##
+## -------------------------------------- ##
+_ASBOX
+     ) | sed "s/^/$as_me: WARNING:     /" >&2
+    ;;
+esac
+{ echo "$as_me:$LINENO: checking for $ac_header" >&5
+echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; }
+if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  eval "$as_ac_Header=\$ac_header_preproc"
+fi
+ac_res=`eval echo '${'$as_ac_Header'}'`
+	       { echo "$as_me:$LINENO: result: $ac_res" >&5
+echo "${ECHO_T}$ac_res" >&6; }
+
+fi
+if test `eval echo '${'$as_ac_Header'}'` = yes; then
+  cat >>confdefs.h <<_ACEOF
+#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1
+_ACEOF
+
+fi
+
+done
+
+
+{ echo "$as_me:$LINENO: checking for poptGetNextOpt in -lpopt" >&5
+echo $ECHO_N "checking for poptGetNextOpt in -lpopt... $ECHO_C" >&6; }
+if test "${ac_cv_lib_popt_poptGetNextOpt+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  ac_check_lib_save_LIBS=$LIBS
+LIBS="-lpopt  $LIBS"
+cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+/* Override any GCC internal prototype to avoid an error.
+   Use char because int might match the return type of a GCC
+   builtin and then its argument prototype would still apply.  */
+#ifdef __cplusplus
+extern "C"
+#endif
+char poptGetNextOpt ();
+int
+main ()
+{
+return poptGetNextOpt ();
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext conftest$ac_exeext
+if { (ac_try="$ac_link"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_link") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest$ac_exeext &&
+       $as_test_x conftest$ac_exeext; then
+  ac_cv_lib_popt_poptGetNextOpt=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_cv_lib_popt_poptGetNextOpt=no
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \
+      conftest$ac_exeext conftest.$ac_ext
+LIBS=$ac_check_lib_save_LIBS
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_lib_popt_poptGetNextOpt" >&5
+echo "${ECHO_T}$ac_cv_lib_popt_poptGetNextOpt" >&6; }
+if test $ac_cv_lib_popt_poptGetNextOpt = yes; then
+  cat >>confdefs.h <<_ACEOF
+#define HAVE_LIBPOPT 1
+_ACEOF
+
+  LIBS="-lpopt $LIBS"
+
+fi
+
+
+# Checks for typedefs, structures, and compiler characteristics.
+{ echo "$as_me:$LINENO: checking for an ANSI C-conforming const" >&5
+echo $ECHO_N "checking for an ANSI C-conforming const... $ECHO_C" >&6; }
+if test "${ac_cv_c_const+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+
+int
+main ()
+{
+/* FIXME: Include the comments suggested by Paul. */
+#ifndef __cplusplus
+  /* Ultrix mips cc rejects this.  */
+  typedef int charset[2];
+  const charset cs;
+  /* SunOS 4.1.1 cc rejects this.  */
+  char const *const *pcpcc;
+  char **ppc;
+  /* NEC SVR4.0.2 mips cc rejects this.  */
+  struct point {int x, y;};
+  static struct point const zero = {0,0};
+  /* AIX XL C 1.02.0.0 rejects this.
+     It does not let you subtract one const X* pointer from another in
+     an arm of an if-expression whose if-part is not a constant
+     expression */
+  const char *g = "string";
+  pcpcc = &g + (g ? g-g : 0);
+  /* HPUX 7.0 cc rejects these. */
+  ++pcpcc;
+  ppc = (char**) pcpcc;
+  pcpcc = (char const *const *) ppc;
+  { /* SCO 3.2v4 cc rejects this.  */
+    char *t;
+    char const *s = 0 ? (char *) 0 : (char const *) 0;
+
+    *t++ = 0;
+    if (s) return 0;
+  }
+  { /* Someone thinks the Sun supposedly-ANSI compiler will reject this.  */
+    int x[] = {25, 17};
+    const int *foo = &x[0];
+    ++foo;
+  }
+  { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
+    typedef const int *iptr;
+    iptr p = 0;
+    ++p;
+  }
+  { /* AIX XL C 1.02.0.0 rejects this saying
+       "k.c", line 2.27: 1506-025 (S) Operand must be a modifiable lvalue. */
+    struct s { int j; const int *ap[3]; };
+    struct s *b; b->j = 5;
+  }
+  { /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
+    const int foo = 10;
+    if (!foo) return 0;
+  }
+  return !cs[0] && !zero.x;
+#endif
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_cv_c_const=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_cv_c_const=no
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_c_const" >&5
+echo "${ECHO_T}$ac_cv_c_const" >&6; }
+if test $ac_cv_c_const = no; then
+
+cat >>confdefs.h <<\_ACEOF
+#define const
+_ACEOF
+
+fi
+
+{ echo "$as_me:$LINENO: checking for inline" >&5
+echo $ECHO_N "checking for inline... $ECHO_C" >&6; }
+if test "${ac_cv_c_inline+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  ac_cv_c_inline=no
+for ac_kw in inline __inline__ __inline; do
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#ifndef __cplusplus
+typedef int foo_t;
+static $ac_kw foo_t static_foo () {return 0; }
+$ac_kw foo_t foo () {return 0; }
+#endif
+
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_cv_c_inline=$ac_kw
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+  test "$ac_cv_c_inline" != no && break
+done
+
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_c_inline" >&5
+echo "${ECHO_T}$ac_cv_c_inline" >&6; }
+
+
+case $ac_cv_c_inline in
+  inline | yes) ;;
+  *)
+    case $ac_cv_c_inline in
+      no) ac_val=;;
+      *) ac_val=$ac_cv_c_inline;;
+    esac
+    cat >>confdefs.h <<_ACEOF
+#ifndef __cplusplus
+#define inline $ac_val
+#endif
+_ACEOF
+    ;;
+esac
+
+
+  { echo "$as_me:$LINENO: checking for uint16_t" >&5
+echo $ECHO_N "checking for uint16_t... $ECHO_C" >&6; }
+if test "${ac_cv_c_uint16_t+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  ac_cv_c_uint16_t=no
+     for ac_type in 'uint16_t' 'unsigned int' 'unsigned long int' \
+	 'unsigned long long int' 'unsigned short int' 'unsigned char'; do
+       cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+$ac_includes_default
+int
+main ()
+{
+static int test_array [1 - 2 * !(($ac_type) -1 >> (16 - 1) == 1)];
+test_array [0] = 0
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  case $ac_type in
+  uint16_t) ac_cv_c_uint16_t=yes ;;
+  *) ac_cv_c_uint16_t=$ac_type ;;
+esac
+
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+       test "$ac_cv_c_uint16_t" != no && break
+     done
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_c_uint16_t" >&5
+echo "${ECHO_T}$ac_cv_c_uint16_t" >&6; }
+  case $ac_cv_c_uint16_t in #(
+  no|yes) ;; #(
+  *)
+
+
+cat >>confdefs.h <<_ACEOF
+#define uint16_t $ac_cv_c_uint16_t
+_ACEOF
+;;
+  esac
+
+
+  { echo "$as_me:$LINENO: checking for uint8_t" >&5
+echo $ECHO_N "checking for uint8_t... $ECHO_C" >&6; }
+if test "${ac_cv_c_uint8_t+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  ac_cv_c_uint8_t=no
+     for ac_type in 'uint8_t' 'unsigned int' 'unsigned long int' \
+	 'unsigned long long int' 'unsigned short int' 'unsigned char'; do
+       cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+$ac_includes_default
+int
+main ()
+{
+static int test_array [1 - 2 * !(($ac_type) -1 >> (8 - 1) == 1)];
+test_array [0] = 0
+
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  case $ac_type in
+  uint8_t) ac_cv_c_uint8_t=yes ;;
+  *) ac_cv_c_uint8_t=$ac_type ;;
+esac
+
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+       test "$ac_cv_c_uint8_t" != no && break
+     done
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_c_uint8_t" >&5
+echo "${ECHO_T}$ac_cv_c_uint8_t" >&6; }
+  case $ac_cv_c_uint8_t in #(
+  no|yes) ;; #(
+  *)
+
+cat >>confdefs.h <<\_ACEOF
+#define _UINT8_T 1
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define uint8_t $ac_cv_c_uint8_t
+_ACEOF
+;;
+  esac
+
+
+
+
+for ac_header in sys/select.h sys/socket.h
+do
+as_ac_Header=`echo "ac_cv_header_$ac_header" | $as_tr_sh`
+if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then
+  { echo "$as_me:$LINENO: checking for $ac_header" >&5
+echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; }
+if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+fi
+ac_res=`eval echo '${'$as_ac_Header'}'`
+	       { echo "$as_me:$LINENO: result: $ac_res" >&5
+echo "${ECHO_T}$ac_res" >&6; }
+else
+  # Is the header compilable?
+{ echo "$as_me:$LINENO: checking $ac_header usability" >&5
+echo $ECHO_N "checking $ac_header usability... $ECHO_C" >&6; }
+cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+$ac_includes_default
+#include <$ac_header>
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_header_compiler=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	ac_header_compiler=no
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+{ echo "$as_me:$LINENO: result: $ac_header_compiler" >&5
+echo "${ECHO_T}$ac_header_compiler" >&6; }
+
+# Is the header present?
+{ echo "$as_me:$LINENO: checking $ac_header presence" >&5
+echo $ECHO_N "checking $ac_header presence... $ECHO_C" >&6; }
+cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+#include <$ac_header>
+_ACEOF
+if { (ac_try="$ac_cpp conftest.$ac_ext"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_cpp conftest.$ac_ext") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } >/dev/null && {
+	 test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       }; then
+  ac_header_preproc=yes
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+  ac_header_preproc=no
+fi
+
+rm -f conftest.err conftest.$ac_ext
+{ echo "$as_me:$LINENO: result: $ac_header_preproc" >&5
+echo "${ECHO_T}$ac_header_preproc" >&6; }
+
+# So?  What about this header?
+case $ac_header_compiler:$ac_header_preproc:$ac_c_preproc_warn_flag in
+  yes:no: )
+    { echo "$as_me:$LINENO: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&5
+echo "$as_me: WARNING: $ac_header: accepted by the compiler, rejected by the preprocessor!" >&2;}
+    { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the compiler's result" >&5
+echo "$as_me: WARNING: $ac_header: proceeding with the compiler's result" >&2;}
+    ac_header_preproc=yes
+    ;;
+  no:yes:* )
+    { echo "$as_me:$LINENO: WARNING: $ac_header: present but cannot be compiled" >&5
+echo "$as_me: WARNING: $ac_header: present but cannot be compiled" >&2;}
+    { echo "$as_me:$LINENO: WARNING: $ac_header:     check for missing prerequisite headers?" >&5
+echo "$as_me: WARNING: $ac_header:     check for missing prerequisite headers?" >&2;}
+    { echo "$as_me:$LINENO: WARNING: $ac_header: see the Autoconf documentation" >&5
+echo "$as_me: WARNING: $ac_header: see the Autoconf documentation" >&2;}
+    { echo "$as_me:$LINENO: WARNING: $ac_header:     section \"Present But Cannot Be Compiled\"" >&5
+echo "$as_me: WARNING: $ac_header:     section \"Present But Cannot Be Compiled\"" >&2;}
+    { echo "$as_me:$LINENO: WARNING: $ac_header: proceeding with the preprocessor's result" >&5
+echo "$as_me: WARNING: $ac_header: proceeding with the preprocessor's result" >&2;}
+    { echo "$as_me:$LINENO: WARNING: $ac_header: in the future, the compiler will take precedence" >&5
+echo "$as_me: WARNING: $ac_header: in the future, the compiler will take precedence" >&2;}
+    ( cat <<\_ASBOX
+## -------------------------------------- ##
+## Report this to koepke@tkn.tu-berlin.de ##
+## -------------------------------------- ##
+_ASBOX
+     ) | sed "s/^/$as_me: WARNING:     /" >&2
+    ;;
+esac
+{ echo "$as_me:$LINENO: checking for $ac_header" >&5
+echo $ECHO_N "checking for $ac_header... $ECHO_C" >&6; }
+if { as_var=$as_ac_Header; eval "test \"\${$as_var+set}\" = set"; }; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  eval "$as_ac_Header=\$ac_header_preproc"
+fi
+ac_res=`eval echo '${'$as_ac_Header'}'`
+	       { echo "$as_me:$LINENO: result: $ac_res" >&5
+echo "${ECHO_T}$ac_res" >&6; }
+
+fi
+if test `eval echo '${'$as_ac_Header'}'` = yes; then
+  cat >>confdefs.h <<_ACEOF
+#define `echo "HAVE_$ac_header" | $as_tr_cpp` 1
+_ACEOF
+
+fi
+
+done
+
+{ echo "$as_me:$LINENO: checking types of arguments for select" >&5
+echo $ECHO_N "checking types of arguments for select... $ECHO_C" >&6; }
+if test "${ac_cv_func_select_args+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  for ac_arg234 in 'fd_set *' 'int *' 'void *'; do
+ for ac_arg1 in 'int' 'size_t' 'unsigned long int' 'unsigned int'; do
+  for ac_arg5 in 'struct timeval *' 'const struct timeval *'; do
+   cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+$ac_includes_default
+#ifdef HAVE_SYS_SELECT_H
+# include <sys/select.h>
+#endif
+#ifdef HAVE_SYS_SOCKET_H
+# include <sys/socket.h>
+#endif
+
+int
+main ()
+{
+extern int select ($ac_arg1,
+					    $ac_arg234, $ac_arg234, $ac_arg234,
+					    $ac_arg5);
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext
+if { (ac_try="$ac_compile"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_compile") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest.$ac_objext; then
+  ac_cv_func_select_args="$ac_arg1,$ac_arg234,$ac_arg5"; break 3
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+  done
+ done
+done
+# Provide a safe default value.
+: ${ac_cv_func_select_args='int,int *,struct timeval *'}
+
+fi
+{ echo "$as_me:$LINENO: result: $ac_cv_func_select_args" >&5
+echo "${ECHO_T}$ac_cv_func_select_args" >&6; }
+ac_save_IFS=$IFS; IFS=','
+set dummy `echo "$ac_cv_func_select_args" | sed 's/\*/\*/g'`
+IFS=$ac_save_IFS
+shift
+
+cat >>confdefs.h <<_ACEOF
+#define SELECT_TYPE_ARG1 $1
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define SELECT_TYPE_ARG234 ($2)
+_ACEOF
+
+
+cat >>confdefs.h <<_ACEOF
+#define SELECT_TYPE_ARG5 ($3)
+_ACEOF
+
+rm -f conftest*
+
+
+
+for ac_func in select strerror
+do
+as_ac_var=`echo "ac_cv_func_$ac_func" | $as_tr_sh`
+{ echo "$as_me:$LINENO: checking for $ac_func" >&5
+echo $ECHO_N "checking for $ac_func... $ECHO_C" >&6; }
+if { as_var=$as_ac_var; eval "test \"\${$as_var+set}\" = set"; }; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  cat >conftest.$ac_ext <<_ACEOF
+/* confdefs.h.  */
+_ACEOF
+cat confdefs.h >>conftest.$ac_ext
+cat >>conftest.$ac_ext <<_ACEOF
+/* end confdefs.h.  */
+/* Define $ac_func to an innocuous variant, in case <limits.h> declares $ac_func.
+   For example, HP-UX 11i <limits.h> declares gettimeofday.  */
+#define $ac_func innocuous_$ac_func
+
+/* System header to define __stub macros and hopefully few prototypes,
+    which can conflict with char $ac_func (); below.
+    Prefer <limits.h> to <assert.h> if __STDC__ is defined, since
+    <limits.h> exists even on freestanding compilers.  */
+
+#ifdef __STDC__
+# include <limits.h>
+#else
+# include <assert.h>
+#endif
+
+#undef $ac_func
+
+/* Override any GCC internal prototype to avoid an error.
+   Use char because int might match the return type of a GCC
+   builtin and then its argument prototype would still apply.  */
+#ifdef __cplusplus
+extern "C"
+#endif
+char $ac_func ();
+/* The GNU C library defines this for functions which it implements
+    to always fail with ENOSYS.  Some functions are actually named
+    something starting with __ and the normal name is an alias.  */
+#if defined __stub_$ac_func || defined __stub___$ac_func
+choke me
+#endif
+
+int
+main ()
+{
+return $ac_func ();
+  ;
+  return 0;
+}
+_ACEOF
+rm -f conftest.$ac_objext conftest$ac_exeext
+if { (ac_try="$ac_link"
+case "(($ac_try" in
+  *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;;
+  *) ac_try_echo=$ac_try;;
+esac
+eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5
+  (eval "$ac_link") 2>conftest.er1
+  ac_status=$?
+  grep -v '^ *+' conftest.er1 >conftest.err
+  rm -f conftest.er1
+  cat conftest.err >&5
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); } && {
+	 test -z "$ac_c_werror_flag" ||
+	 test ! -s conftest.err
+       } && test -s conftest$ac_exeext &&
+       $as_test_x conftest$ac_exeext; then
+  eval "$as_ac_var=yes"
+else
+  echo "$as_me: failed program was:" >&5
+sed 's/^/| /' conftest.$ac_ext >&5
+
+	eval "$as_ac_var=no"
+fi
+
+rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \
+      conftest$ac_exeext conftest.$ac_ext
+fi
+ac_res=`eval echo '${'$as_ac_var'}'`
+	       { echo "$as_me:$LINENO: result: $ac_res" >&5
+echo "${ECHO_T}$ac_res" >&6; }
+if test `eval echo '${'$as_ac_var'}'` = yes; then
+  cat >>confdefs.h <<_ACEOF
+#define `echo "HAVE_$ac_func" | $as_tr_cpp` 1
+_ACEOF
+
+fi
+done
+
+
+
+
+# Checks for additional packages and features
+
+# optimization features
+DEFDEBUG="no"
+# Check whether --enable-debug was given.
+if test "${enable_debug+set}" = set; then
+  enableval=$enable_debug; DEFDEBUG=$enableval
+fi
+
+if test "$DEFDEBUG" = "yes"; then
+   CFLAGS=`echo $CFLAGS | sed -e 's/-O2//g' | sed -e 's/-g//g'`
+   CFLAGS="$CFLAGS -ggdb3"
+   CXXFLAGS=`echo $CXXFLAGS | sed -e 's/-O2//g' | sed -e 's/-g//g'`
+   CXXFLAGS="$CXXFLAGS -ggdb3"
+fi
+
+DEFOPTIMIZE="no"
+# Check whether --enable-optimize was given.
+if test "${enable_optimize+set}" = set; then
+  enableval=$enable_optimize; DEFOPTIMIZE=$enableval
+fi
+
+if test "$DEFOPTIMIZE" = "yes"; then
+   CFLAGS=`echo $CFLAGS | sed -e 's/-O2//g' | sed -e 's/-g//g'`
+   CFLAGS="$CFLAGS -O3 -ggdb3 "
+   CXXFLAGS=`echo $CXXFLAGS | sed -e 's/-O2//g' | sed -e 's/-g//g'`
+   CXXFLAGS="$CXXFLAGS -O3 -ggdb3 "
+fi
+
+DEFPROF="no"
+# Check whether --enable-prof was given.
+if test "${enable_prof+set}" = set; then
+  enableval=$enable_prof; DEFPROF=$enableval
+fi
+
+if test "$DEFPROF" = "yes"; then
+   CFLAGS=`echo $CFLAGS | sed -e 's/-O2//g' | sed -e 's/-g//g'`
+   CFLAGS="$CFLAGS -O1 -pg"
+   CXXFLAGS=`echo $CXXFLAGS | sed -e 's/-O2//g' | sed -e 's/-g//g'`
+   CXXFLAGS="$CXXFLAGS -O1 -pg"
+fi
+
+# Using the results
+# ACX_PTHREAD(, AC_MSG_ERROR(Posix threads missing))
+
+LIBS="$PTHREAD_LIBS $LIBS"
+CFLAGS="$CFLAGS $PTHREAD_CFLAGS"
+CXXFLAGS="$CXXFLAGS $PTHREAD_CFLAGS"
+CC="$PTHREAD_CC"
+# CXX="$CXX $PTHREAD_CFLAGS $LIBS"
+
+ac_config_files="$ac_config_files Makefile config/Makefile src/Makefile"
+
+cat >confcache <<\_ACEOF
+# This file is a shell script that caches the results of configure
+# tests run on this system so they can be shared between configure
+# scripts and configure runs, see configure's option --config-cache.
+# It is not useful on other systems.  If it contains results you don't
+# want to keep, you may remove or edit it.
+#
+# config.status only pays attention to the cache file if you give it
+# the --recheck option to rerun configure.
+#
+# `ac_cv_env_foo' variables (set or unset) will be overridden when
+# loading this file, other *unset* `ac_cv_foo' will be assigned the
+# following values.
+
+_ACEOF
+
+# The following way of writing the cache mishandles newlines in values,
+# but we know of no workaround that is simple, portable, and efficient.
+# So, we kill variables containing newlines.
+# Ultrix sh set writes to stderr and can't be redirected directly,
+# and sets the high bit in the cache file unless we assign to the vars.
+(
+  for ac_var in `(set) 2>&1 | sed -n 's/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'`; do
+    eval ac_val=\$$ac_var
+    case $ac_val in #(
+    *${as_nl}*)
+      case $ac_var in #(
+      *_cv_*) { echo "$as_me:$LINENO: WARNING: Cache variable $ac_var contains a newline." >&5
+echo "$as_me: WARNING: Cache variable $ac_var contains a newline." >&2;} ;;
+      esac
+      case $ac_var in #(
+      _ | IFS | as_nl) ;; #(
+      *) $as_unset $ac_var ;;
+      esac ;;
+    esac
+  done
+
+  (set) 2>&1 |
+    case $as_nl`(ac_space=' '; set) 2>&1` in #(
+    *${as_nl}ac_space=\ *)
+      # `set' does not quote correctly, so add quotes (double-quote
+      # substitution turns \\\\ into \\, and sed turns \\ into \).
+      sed -n \
+	"s/'/'\\\\''/g;
+	  s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p"
+      ;; #(
+    *)
+      # `set' quotes correctly as required by POSIX, so do not add quotes.
+      sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p"
+      ;;
+    esac |
+    sort
+) |
+  sed '
+     /^ac_cv_env_/b end
+     t clear
+     :clear
+     s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/
+     t end
+     s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/
+     :end' >>confcache
+if diff "$cache_file" confcache >/dev/null 2>&1; then :; else
+  if test -w "$cache_file"; then
+    test "x$cache_file" != "x/dev/null" &&
+      { echo "$as_me:$LINENO: updating cache $cache_file" >&5
+echo "$as_me: updating cache $cache_file" >&6;}
+    cat confcache >$cache_file
+  else
+    { echo "$as_me:$LINENO: not updating unwritable cache $cache_file" >&5
+echo "$as_me: not updating unwritable cache $cache_file" >&6;}
+  fi
+fi
+rm -f confcache
+
+test "x$prefix" = xNONE && prefix=$ac_default_prefix
+# Let make expand exec_prefix.
+test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
+
+DEFS=-DHAVE_CONFIG_H
+
+ac_libobjs=
+ac_ltlibobjs=
+for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue
+  # 1. Remove the extension, and $U if already installed.
+  ac_script='s/\$U\././;s/\.o$//;s/\.obj$//'
+  ac_i=`echo "$ac_i" | sed "$ac_script"`
+  # 2. Prepend LIBOBJDIR.  When used with automake>=1.10 LIBOBJDIR
+  #    will be set to the directory where LIBOBJS objects are built.
+  ac_libobjs="$ac_libobjs \${LIBOBJDIR}$ac_i\$U.$ac_objext"
+  ac_ltlibobjs="$ac_ltlibobjs \${LIBOBJDIR}$ac_i"'$U.lo'
+done
+LIBOBJS=$ac_libobjs
+
+LTLIBOBJS=$ac_ltlibobjs
+
+
+if test -z "${AMDEP_TRUE}" && test -z "${AMDEP_FALSE}"; then
+  { { echo "$as_me:$LINENO: error: conditional \"AMDEP\" was never defined.
+Usually this means the macro was only invoked conditionally." >&5
+echo "$as_me: error: conditional \"AMDEP\" was never defined.
+Usually this means the macro was only invoked conditionally." >&2;}
+   { (exit 1); exit 1; }; }
+fi
+if test -z "${am__fastdepCC_TRUE}" && test -z "${am__fastdepCC_FALSE}"; then
+  { { echo "$as_me:$LINENO: error: conditional \"am__fastdepCC\" was never defined.
+Usually this means the macro was only invoked conditionally." >&5
+echo "$as_me: error: conditional \"am__fastdepCC\" was never defined.
+Usually this means the macro was only invoked conditionally." >&2;}
+   { (exit 1); exit 1; }; }
+fi
+if test -z "${am__fastdepCXX_TRUE}" && test -z "${am__fastdepCXX_FALSE}"; then
+  { { echo "$as_me:$LINENO: error: conditional \"am__fastdepCXX\" was never defined.
+Usually this means the macro was only invoked conditionally." >&5
+echo "$as_me: error: conditional \"am__fastdepCXX\" was never defined.
+Usually this means the macro was only invoked conditionally." >&2;}
+   { (exit 1); exit 1; }; }
+fi
+
+: ${CONFIG_STATUS=./config.status}
+ac_clean_files_save=$ac_clean_files
+ac_clean_files="$ac_clean_files $CONFIG_STATUS"
+{ echo "$as_me:$LINENO: creating $CONFIG_STATUS" >&5
+echo "$as_me: creating $CONFIG_STATUS" >&6;}
+cat >$CONFIG_STATUS <<_ACEOF
+#! $SHELL
+# Generated by $as_me.
+# Run this file to recreate the current configuration.
+# Compiler output produced by configure, useful for debugging
+# configure, is in config.log if it exists.
+
+debug=false
+ac_cs_recheck=false
+ac_cs_silent=false
+SHELL=\${CONFIG_SHELL-$SHELL}
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF
+## --------------------- ##
+## M4sh Initialization.  ##
+## --------------------- ##
+
+# Be more Bourne compatible
+DUALCASE=1; export DUALCASE # for MKS sh
+if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then
+  emulate sh
+  NULLCMD=:
+  # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which
+  # is contrary to our usage.  Disable this feature.
+  alias -g '${1+"$@"}'='"$@"'
+  setopt NO_GLOB_SUBST
+else
+  case `(set -o) 2>/dev/null` in
+  *posix*) set -o posix ;;
+esac
+
+fi
+
+
+
+
+# PATH needs CR
+# Avoid depending upon Character Ranges.
+as_cr_letters='abcdefghijklmnopqrstuvwxyz'
+as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
+as_cr_Letters=$as_cr_letters$as_cr_LETTERS
+as_cr_digits='0123456789'
+as_cr_alnum=$as_cr_Letters$as_cr_digits
+
+# The user is always right.
+if test "${PATH_SEPARATOR+set}" != set; then
+  echo "#! /bin/sh" >conf$$.sh
+  echo  "exit 0"   >>conf$$.sh
+  chmod +x conf$$.sh
+  if (PATH="/nonexistent;."; conf$$.sh) >/dev/null 2>&1; then
+    PATH_SEPARATOR=';'
+  else
+    PATH_SEPARATOR=:
+  fi
+  rm -f conf$$.sh
+fi
+
+# Support unset when possible.
+if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then
+  as_unset=unset
+else
+  as_unset=false
+fi
+
+
+# IFS
+# We need space, tab and new line, in precisely that order.  Quoting is
+# there to prevent editors from complaining about space-tab.
+# (If _AS_PATH_WALK were called with IFS unset, it would disable word
+# splitting by setting IFS to empty value.)
+as_nl='
+'
+IFS=" ""	$as_nl"
+
+# Find who we are.  Look in the path if we contain no directory separator.
+case $0 in
+  *[\\/]* ) as_myself=$0 ;;
+  *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break
+done
+IFS=$as_save_IFS
+
+     ;;
+esac
+# We did not find ourselves, most probably we were run as `sh COMMAND'
+# in which case we are not to be found in the path.
+if test "x$as_myself" = x; then
+  as_myself=$0
+fi
+if test ! -f "$as_myself"; then
+  echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2
+  { (exit 1); exit 1; }
+fi
+
+# Work around bugs in pre-3.0 UWIN ksh.
+for as_var in ENV MAIL MAILPATH
+do ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var
+done
+PS1='$ '
+PS2='> '
+PS4='+ '
+
+# NLS nuisances.
+for as_var in \
+  LANG LANGUAGE LC_ADDRESS LC_ALL LC_COLLATE LC_CTYPE LC_IDENTIFICATION \
+  LC_MEASUREMENT LC_MESSAGES LC_MONETARY LC_NAME LC_NUMERIC LC_PAPER \
+  LC_TELEPHONE LC_TIME
+do
+  if (set +x; test -z "`(eval $as_var=C; export $as_var) 2>&1`"); then
+    eval $as_var=C; export $as_var
+  else
+    ($as_unset $as_var) >/dev/null 2>&1 && $as_unset $as_var
+  fi
+done
+
+# Required to use basename.
+if expr a : '\(a\)' >/dev/null 2>&1 &&
+   test "X`expr 00001 : '.*\(...\)'`" = X001; then
+  as_expr=expr
+else
+  as_expr=false
+fi
+
+if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then
+  as_basename=basename
+else
+  as_basename=false
+fi
+
+
+# Name of the executable.
+as_me=`$as_basename -- "$0" ||
+$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \
+	 X"$0" : 'X\(//\)$' \| \
+	 X"$0" : 'X\(/\)' \| . 2>/dev/null ||
+echo X/"$0" |
+    sed '/^.*\/\([^/][^/]*\)\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\/\(\/\/\)$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\/\(\/\).*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+
+# CDPATH.
+$as_unset CDPATH
+
+
+
+  as_lineno_1=$LINENO
+  as_lineno_2=$LINENO
+  test "x$as_lineno_1" != "x$as_lineno_2" &&
+  test "x`expr $as_lineno_1 + 1`" = "x$as_lineno_2" || {
+
+  # Create $as_me.lineno as a copy of $as_myself, but with $LINENO
+  # uniformly replaced by the line number.  The first 'sed' inserts a
+  # line-number line after each line using $LINENO; the second 'sed'
+  # does the real work.  The second script uses 'N' to pair each
+  # line-number line with the line containing $LINENO, and appends
+  # trailing '-' during substitution so that $LINENO is not a special
+  # case at line end.
+  # (Raja R Harinath suggested sed '=', and Paul Eggert wrote the
+  # scripts with optimization help from Paolo Bonzini.  Blame Lee
+  # E. McMahon (1931-1989) for sed's syntax.  :-)
+  sed -n '
+    p
+    /[$]LINENO/=
+  ' <$as_myself |
+    sed '
+      s/[$]LINENO.*/&-/
+      t lineno
+      b
+      :lineno
+      N
+      :loop
+      s/[$]LINENO\([^'$as_cr_alnum'_].*\n\)\(.*\)/\2\1\2/
+      t loop
+      s/-\n.*//
+    ' >$as_me.lineno &&
+  chmod +x "$as_me.lineno" ||
+    { echo "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2
+   { (exit 1); exit 1; }; }
+
+  # Don't try to exec as it changes $[0], causing all sort of problems
+  # (the dirname of $[0] is not the place where we might find the
+  # original and so on.  Autoconf is especially sensitive to this).
+  . "./$as_me.lineno"
+  # Exit status is that of the last command.
+  exit
+}
+
+
+if (as_dir=`dirname -- /` && test "X$as_dir" = X/) >/dev/null 2>&1; then
+  as_dirname=dirname
+else
+  as_dirname=false
+fi
+
+ECHO_C= ECHO_N= ECHO_T=
+case `echo -n x` in
+-n*)
+  case `echo 'x\c'` in
+  *c*) ECHO_T='	';;	# ECHO_T is single tab character.
+  *)   ECHO_C='\c';;
+  esac;;
+*)
+  ECHO_N='-n';;
+esac
+
+if expr a : '\(a\)' >/dev/null 2>&1 &&
+   test "X`expr 00001 : '.*\(...\)'`" = X001; then
+  as_expr=expr
+else
+  as_expr=false
+fi
+
+rm -f conf$$ conf$$.exe conf$$.file
+if test -d conf$$.dir; then
+  rm -f conf$$.dir/conf$$.file
+else
+  rm -f conf$$.dir
+  mkdir conf$$.dir
+fi
+echo >conf$$.file
+if ln -s conf$$.file conf$$ 2>/dev/null; then
+  as_ln_s='ln -s'
+  # ... but there are two gotchas:
+  # 1) On MSYS, both `ln -s file dir' and `ln file dir' fail.
+  # 2) DJGPP < 2.04 has no symlinks; `ln -s' creates a wrapper executable.
+  # In both cases, we have to default to `cp -p'.
+  ln -s conf$$.file conf$$.dir 2>/dev/null && test ! -f conf$$.exe ||
+    as_ln_s='cp -p'
+elif ln conf$$.file conf$$ 2>/dev/null; then
+  as_ln_s=ln
+else
+  as_ln_s='cp -p'
+fi
+rm -f conf$$ conf$$.exe conf$$.dir/conf$$.file conf$$.file
+rmdir conf$$.dir 2>/dev/null
+
+if mkdir -p . 2>/dev/null; then
+  as_mkdir_p=:
+else
+  test -d ./-p && rmdir ./-p
+  as_mkdir_p=false
+fi
+
+if test -x / >/dev/null 2>&1; then
+  as_test_x='test -x'
+else
+  if ls -dL / >/dev/null 2>&1; then
+    as_ls_L_option=L
+  else
+    as_ls_L_option=
+  fi
+  as_test_x='
+    eval sh -c '\''
+      if test -d "$1"; then
+        test -d "$1/.";
+      else
+	case $1 in
+        -*)set "./$1";;
+	esac;
+	case `ls -ld'$as_ls_L_option' "$1" 2>/dev/null` in
+	???[sx]*):;;*)false;;esac;fi
+    '\'' sh
+  '
+fi
+as_executable_p=$as_test_x
+
+# Sed expression to map a string onto a valid CPP name.
+as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'"
+
+# Sed expression to map a string onto a valid variable name.
+as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'"
+
+
+exec 6>&1
+
+# Save the log message, to keep $[0] and so on meaningful, and to
+# report actual input values of CONFIG_FILES etc. instead of their
+# values after options handling.
+ac_log="
+This file was extended by cppbsl $as_me 0.1, which was
+generated by GNU Autoconf 2.61.  Invocation command line was
+
+  CONFIG_FILES    = $CONFIG_FILES
+  CONFIG_HEADERS  = $CONFIG_HEADERS
+  CONFIG_LINKS    = $CONFIG_LINKS
+  CONFIG_COMMANDS = $CONFIG_COMMANDS
+  $ $0 $@
+
+on `(hostname || uname -n) 2>/dev/null | sed 1q`
+"
+
+_ACEOF
+
+cat >>$CONFIG_STATUS <<_ACEOF
+# Files that config.status was made for.
+config_files="$ac_config_files"
+config_headers="$ac_config_headers"
+config_commands="$ac_config_commands"
+
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF
+ac_cs_usage="\
+\`$as_me' instantiates files from templates according to the
+current configuration.
+
+Usage: $0 [OPTIONS] [FILE]...
+
+  -h, --help       print this help, then exit
+  -V, --version    print version number and configuration settings, then exit
+  -q, --quiet      do not print progress messages
+  -d, --debug      don't remove temporary files
+      --recheck    update $as_me by reconfiguring in the same conditions
+  --file=FILE[:TEMPLATE]
+		   instantiate the configuration file FILE
+  --header=FILE[:TEMPLATE]
+		   instantiate the configuration header FILE
+
+Configuration files:
+$config_files
+
+Configuration headers:
+$config_headers
+
+Configuration commands:
+$config_commands
+
+Report bugs to <bug-autoconf@gnu.org>."
+
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF
+ac_cs_version="\\
+cppbsl config.status 0.1
+configured by $0, generated by GNU Autoconf 2.61,
+  with options \\"`echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
+
+Copyright (C) 2006 Free Software Foundation, Inc.
+This config.status script is free software; the Free Software Foundation
+gives unlimited permission to copy, distribute and modify it."
+
+ac_pwd='$ac_pwd'
+srcdir='$srcdir'
+INSTALL='$INSTALL'
+MKDIR_P='$MKDIR_P'
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF
+# If no file are specified by the user, then we need to provide default
+# value.  By we need to know if files were specified by the user.
+ac_need_defaults=:
+while test $# != 0
+do
+  case $1 in
+  --*=*)
+    ac_option=`expr "X$1" : 'X\([^=]*\)='`
+    ac_optarg=`expr "X$1" : 'X[^=]*=\(.*\)'`
+    ac_shift=:
+    ;;
+  *)
+    ac_option=$1
+    ac_optarg=$2
+    ac_shift=shift
+    ;;
+  esac
+
+  case $ac_option in
+  # Handling of the options.
+  -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
+    ac_cs_recheck=: ;;
+  --version | --versio | --versi | --vers | --ver | --ve | --v | -V )
+    echo "$ac_cs_version"; exit ;;
+  --debug | --debu | --deb | --de | --d | -d )
+    debug=: ;;
+  --file | --fil | --fi | --f )
+    $ac_shift
+    CONFIG_FILES="$CONFIG_FILES $ac_optarg"
+    ac_need_defaults=false;;
+  --header | --heade | --head | --hea )
+    $ac_shift
+    CONFIG_HEADERS="$CONFIG_HEADERS $ac_optarg"
+    ac_need_defaults=false;;
+  --he | --h)
+    # Conflict between --help and --header
+    { echo "$as_me: error: ambiguous option: $1
+Try \`$0 --help' for more information." >&2
+   { (exit 1); exit 1; }; };;
+  --help | --hel | -h )
+    echo "$ac_cs_usage"; exit ;;
+  -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+  | -silent | --silent | --silen | --sile | --sil | --si | --s)
+    ac_cs_silent=: ;;
+
+  # This is an error.
+  -*) { echo "$as_me: error: unrecognized option: $1
+Try \`$0 --help' for more information." >&2
+   { (exit 1); exit 1; }; } ;;
+
+  *) ac_config_targets="$ac_config_targets $1"
+     ac_need_defaults=false ;;
+
+  esac
+  shift
+done
+
+ac_configure_extra_args=
+
+if $ac_cs_silent; then
+  exec 6>/dev/null
+  ac_configure_extra_args="$ac_configure_extra_args --silent"
+fi
+
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF
+if \$ac_cs_recheck; then
+  echo "running CONFIG_SHELL=$SHELL $SHELL $0 "$ac_configure_args \$ac_configure_extra_args " --no-create --no-recursion" >&6
+  CONFIG_SHELL=$SHELL
+  export CONFIG_SHELL
+  exec $SHELL "$0"$ac_configure_args \$ac_configure_extra_args --no-create --no-recursion
+fi
+
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF
+exec 5>>config.log
+{
+  echo
+  sed 'h;s/./-/g;s/^.../## /;s/...$/ ##/;p;x;p;x' <<_ASBOX
+## Running $as_me. ##
+_ASBOX
+  echo "$ac_log"
+} >&5
+
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF
+#
+# INIT-COMMANDS
+#
+AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac_aux_dir"
+
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF
+
+# Handling of arguments.
+for ac_config_target in $ac_config_targets
+do
+  case $ac_config_target in
+    "config.h") CONFIG_HEADERS="$CONFIG_HEADERS config.h" ;;
+    "depfiles") CONFIG_COMMANDS="$CONFIG_COMMANDS depfiles" ;;
+    "Makefile") CONFIG_FILES="$CONFIG_FILES Makefile" ;;
+    "config/Makefile") CONFIG_FILES="$CONFIG_FILES config/Makefile" ;;
+    "src/Makefile") CONFIG_FILES="$CONFIG_FILES src/Makefile" ;;
+
+  *) { { echo "$as_me:$LINENO: error: invalid argument: $ac_config_target" >&5
+echo "$as_me: error: invalid argument: $ac_config_target" >&2;}
+   { (exit 1); exit 1; }; };;
+  esac
+done
+
+
+# If the user did not use the arguments to specify the items to instantiate,
+# then the envvar interface is used.  Set only those that are not.
+# We use the long form for the default assignment because of an extremely
+# bizarre bug on SunOS 4.1.3.
+if $ac_need_defaults; then
+  test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files
+  test "${CONFIG_HEADERS+set}" = set || CONFIG_HEADERS=$config_headers
+  test "${CONFIG_COMMANDS+set}" = set || CONFIG_COMMANDS=$config_commands
+fi
+
+# Have a temporary directory for convenience.  Make it in the build tree
+# simply because there is no reason against having it here, and in addition,
+# creating and moving files from /tmp can sometimes cause problems.
+# Hook for its removal unless debugging.
+# Note that there is a small window in which the directory will not be cleaned:
+# after its creation but before its name has been assigned to `$tmp'.
+$debug ||
+{
+  tmp=
+  trap 'exit_status=$?
+  { test -z "$tmp" || test ! -d "$tmp" || rm -fr "$tmp"; } && exit $exit_status
+' 0
+  trap '{ (exit 1); exit 1; }' 1 2 13 15
+}
+# Create a (secure) tmp directory for tmp files.
+
+{
+  tmp=`(umask 077 && mktemp -d "./confXXXXXX") 2>/dev/null` &&
+  test -n "$tmp" && test -d "$tmp"
+}  ||
+{
+  tmp=./conf$$-$RANDOM
+  (umask 077 && mkdir "$tmp")
+} ||
+{
+   echo "$me: cannot create a temporary directory in ." >&2
+   { (exit 1); exit 1; }
+}
+
+#
+# Set up the sed scripts for CONFIG_FILES section.
+#
+
+# No need to generate the scripts if there are no CONFIG_FILES.
+# This happens for instance when ./config.status config.h
+if test -n "$CONFIG_FILES"; then
+
+_ACEOF
+
+
+
+ac_delim='%!_!# '
+for ac_last_try in false false false false false :; do
+  cat >conf$$subs.sed <<_ACEOF
+SHELL!$SHELL$ac_delim
+PATH_SEPARATOR!$PATH_SEPARATOR$ac_delim
+PACKAGE_NAME!$PACKAGE_NAME$ac_delim
+PACKAGE_TARNAME!$PACKAGE_TARNAME$ac_delim
+PACKAGE_VERSION!$PACKAGE_VERSION$ac_delim
+PACKAGE_STRING!$PACKAGE_STRING$ac_delim
+PACKAGE_BUGREPORT!$PACKAGE_BUGREPORT$ac_delim
+exec_prefix!$exec_prefix$ac_delim
+prefix!$prefix$ac_delim
+program_transform_name!$program_transform_name$ac_delim
+bindir!$bindir$ac_delim
+sbindir!$sbindir$ac_delim
+libexecdir!$libexecdir$ac_delim
+datarootdir!$datarootdir$ac_delim
+datadir!$datadir$ac_delim
+sysconfdir!$sysconfdir$ac_delim
+sharedstatedir!$sharedstatedir$ac_delim
+localstatedir!$localstatedir$ac_delim
+includedir!$includedir$ac_delim
+oldincludedir!$oldincludedir$ac_delim
+docdir!$docdir$ac_delim
+infodir!$infodir$ac_delim
+htmldir!$htmldir$ac_delim
+dvidir!$dvidir$ac_delim
+pdfdir!$pdfdir$ac_delim
+psdir!$psdir$ac_delim
+libdir!$libdir$ac_delim
+localedir!$localedir$ac_delim
+mandir!$mandir$ac_delim
+DEFS!$DEFS$ac_delim
+ECHO_C!$ECHO_C$ac_delim
+ECHO_N!$ECHO_N$ac_delim
+ECHO_T!$ECHO_T$ac_delim
+LIBS!$LIBS$ac_delim
+build_alias!$build_alias$ac_delim
+host_alias!$host_alias$ac_delim
+target_alias!$target_alias$ac_delim
+INSTALL_PROGRAM!$INSTALL_PROGRAM$ac_delim
+INSTALL_SCRIPT!$INSTALL_SCRIPT$ac_delim
+INSTALL_DATA!$INSTALL_DATA$ac_delim
+am__isrc!$am__isrc$ac_delim
+CYGPATH_W!$CYGPATH_W$ac_delim
+PACKAGE!$PACKAGE$ac_delim
+VERSION!$VERSION$ac_delim
+ACLOCAL!$ACLOCAL$ac_delim
+AUTOCONF!$AUTOCONF$ac_delim
+AUTOMAKE!$AUTOMAKE$ac_delim
+AUTOHEADER!$AUTOHEADER$ac_delim
+MAKEINFO!$MAKEINFO$ac_delim
+install_sh!$install_sh$ac_delim
+STRIP!$STRIP$ac_delim
+INSTALL_STRIP_PROGRAM!$INSTALL_STRIP_PROGRAM$ac_delim
+mkdir_p!$mkdir_p$ac_delim
+AWK!$AWK$ac_delim
+SET_MAKE!$SET_MAKE$ac_delim
+am__leading_dot!$am__leading_dot$ac_delim
+AMTAR!$AMTAR$ac_delim
+am__tar!$am__tar$ac_delim
+am__untar!$am__untar$ac_delim
+CC!$CC$ac_delim
+CFLAGS!$CFLAGS$ac_delim
+LDFLAGS!$LDFLAGS$ac_delim
+CPPFLAGS!$CPPFLAGS$ac_delim
+ac_ct_CC!$ac_ct_CC$ac_delim
+EXEEXT!$EXEEXT$ac_delim
+OBJEXT!$OBJEXT$ac_delim
+DEPDIR!$DEPDIR$ac_delim
+am__include!$am__include$ac_delim
+am__quote!$am__quote$ac_delim
+AMDEP_TRUE!$AMDEP_TRUE$ac_delim
+AMDEP_FALSE!$AMDEP_FALSE$ac_delim
+AMDEPBACKSLASH!$AMDEPBACKSLASH$ac_delim
+CCDEPMODE!$CCDEPMODE$ac_delim
+am__fastdepCC_TRUE!$am__fastdepCC_TRUE$ac_delim
+am__fastdepCC_FALSE!$am__fastdepCC_FALSE$ac_delim
+CPP!$CPP$ac_delim
+CXX!$CXX$ac_delim
+CXXFLAGS!$CXXFLAGS$ac_delim
+ac_ct_CXX!$ac_ct_CXX$ac_delim
+CXXDEPMODE!$CXXDEPMODE$ac_delim
+am__fastdepCXX_TRUE!$am__fastdepCXX_TRUE$ac_delim
+am__fastdepCXX_FALSE!$am__fastdepCXX_FALSE$ac_delim
+GREP!$GREP$ac_delim
+EGREP!$EGREP$ac_delim
+LIBOBJS!$LIBOBJS$ac_delim
+LTLIBOBJS!$LTLIBOBJS$ac_delim
+_ACEOF
+
+  if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 86; then
+    break
+  elif $ac_last_try; then
+    { { echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5
+echo "$as_me: error: could not make $CONFIG_STATUS" >&2;}
+   { (exit 1); exit 1; }; }
+  else
+    ac_delim="$ac_delim!$ac_delim _$ac_delim!! "
+  fi
+done
+
+ac_eof=`sed -n '/^CEOF[0-9]*$/s/CEOF/0/p' conf$$subs.sed`
+if test -n "$ac_eof"; then
+  ac_eof=`echo "$ac_eof" | sort -nru | sed 1q`
+  ac_eof=`expr $ac_eof + 1`
+fi
+
+cat >>$CONFIG_STATUS <<_ACEOF
+cat >"\$tmp/subs-1.sed" <<\CEOF$ac_eof
+/@[a-zA-Z_][a-zA-Z_0-9]*@/!b end
+_ACEOF
+sed '
+s/[,\\&]/\\&/g; s/@/@|#_!!_#|/g
+s/^/s,@/; s/!/@,|#_!!_#|/
+:n
+t n
+s/'"$ac_delim"'$/,g/; t
+s/$/\\/; p
+N; s/^.*\n//; s/[,\\&]/\\&/g; s/@/@|#_!!_#|/g; b n
+' >>$CONFIG_STATUS <conf$$subs.sed
+rm -f conf$$subs.sed
+cat >>$CONFIG_STATUS <<_ACEOF
+:end
+s/|#_!!_#|//g
+CEOF$ac_eof
+_ACEOF
+
+
+# VPATH may cause trouble with some makes, so we remove $(srcdir),
+# ${srcdir} and @srcdir@ from VPATH if srcdir is ".", strip leading and
+# trailing colons and then remove the whole line if VPATH becomes empty
+# (actually we leave an empty line to preserve line numbers).
+if test "x$srcdir" = x.; then
+  ac_vpsub='/^[	 ]*VPATH[	 ]*=/{
+s/:*\$(srcdir):*/:/
+s/:*\${srcdir}:*/:/
+s/:*@srcdir@:*/:/
+s/^\([^=]*=[	 ]*\):*/\1/
+s/:*$//
+s/^[^=]*=[	 ]*$//
+}'
+fi
+
+cat >>$CONFIG_STATUS <<\_ACEOF
+fi # test -n "$CONFIG_FILES"
+
+
+for ac_tag in  :F $CONFIG_FILES  :H $CONFIG_HEADERS    :C $CONFIG_COMMANDS
+do
+  case $ac_tag in
+  :[FHLC]) ac_mode=$ac_tag; continue;;
+  esac
+  case $ac_mode$ac_tag in
+  :[FHL]*:*);;
+  :L* | :C*:*) { { echo "$as_me:$LINENO: error: Invalid tag $ac_tag." >&5
+echo "$as_me: error: Invalid tag $ac_tag." >&2;}
+   { (exit 1); exit 1; }; };;
+  :[FH]-) ac_tag=-:-;;
+  :[FH]*) ac_tag=$ac_tag:$ac_tag.in;;
+  esac
+  ac_save_IFS=$IFS
+  IFS=:
+  set x $ac_tag
+  IFS=$ac_save_IFS
+  shift
+  ac_file=$1
+  shift
+
+  case $ac_mode in
+  :L) ac_source=$1;;
+  :[FH])
+    ac_file_inputs=
+    for ac_f
+    do
+      case $ac_f in
+      -) ac_f="$tmp/stdin";;
+      *) # Look for the file first in the build tree, then in the source tree
+	 # (if the path is not absolute).  The absolute path cannot be DOS-style,
+	 # because $ac_f cannot contain `:'.
+	 test -f "$ac_f" ||
+	   case $ac_f in
+	   [\\/$]*) false;;
+	   *) test -f "$srcdir/$ac_f" && ac_f="$srcdir/$ac_f";;
+	   esac ||
+	   { { echo "$as_me:$LINENO: error: cannot find input file: $ac_f" >&5
+echo "$as_me: error: cannot find input file: $ac_f" >&2;}
+   { (exit 1); exit 1; }; };;
+      esac
+      ac_file_inputs="$ac_file_inputs $ac_f"
+    done
+
+    # Let's still pretend it is `configure' which instantiates (i.e., don't
+    # use $as_me), people would be surprised to read:
+    #    /* config.h.  Generated by config.status.  */
+    configure_input="Generated from "`IFS=:
+	  echo $* | sed 's|^[^:]*/||;s|:[^:]*/|, |g'`" by configure."
+    if test x"$ac_file" != x-; then
+      configure_input="$ac_file.  $configure_input"
+      { echo "$as_me:$LINENO: creating $ac_file" >&5
+echo "$as_me: creating $ac_file" >&6;}
+    fi
+
+    case $ac_tag in
+    *:-:* | *:-) cat >"$tmp/stdin";;
+    esac
+    ;;
+  esac
+
+  ac_dir=`$as_dirname -- "$ac_file" ||
+$as_expr X"$ac_file" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+	 X"$ac_file" : 'X\(//\)[^/]' \| \
+	 X"$ac_file" : 'X\(//\)$' \| \
+	 X"$ac_file" : 'X\(/\)' \| . 2>/dev/null ||
+echo X"$ac_file" |
+    sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)[^/].*/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\).*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+  { as_dir="$ac_dir"
+  case $as_dir in #(
+  -*) as_dir=./$as_dir;;
+  esac
+  test -d "$as_dir" || { $as_mkdir_p && mkdir -p "$as_dir"; } || {
+    as_dirs=
+    while :; do
+      case $as_dir in #(
+      *\'*) as_qdir=`echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #(
+      *) as_qdir=$as_dir;;
+      esac
+      as_dirs="'$as_qdir' $as_dirs"
+      as_dir=`$as_dirname -- "$as_dir" ||
+$as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+	 X"$as_dir" : 'X\(//\)[^/]' \| \
+	 X"$as_dir" : 'X\(//\)$' \| \
+	 X"$as_dir" : 'X\(/\)' \| . 2>/dev/null ||
+echo X"$as_dir" |
+    sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)[^/].*/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\).*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+      test -d "$as_dir" && break
+    done
+    test -z "$as_dirs" || eval "mkdir $as_dirs"
+  } || test -d "$as_dir" || { { echo "$as_me:$LINENO: error: cannot create directory $as_dir" >&5
+echo "$as_me: error: cannot create directory $as_dir" >&2;}
+   { (exit 1); exit 1; }; }; }
+  ac_builddir=.
+
+case "$ac_dir" in
+.) ac_dir_suffix= ac_top_builddir_sub=. ac_top_build_prefix= ;;
+*)
+  ac_dir_suffix=/`echo "$ac_dir" | sed 's,^\.[\\/],,'`
+  # A ".." for each directory in $ac_dir_suffix.
+  ac_top_builddir_sub=`echo "$ac_dir_suffix" | sed 's,/[^\\/]*,/..,g;s,/,,'`
+  case $ac_top_builddir_sub in
+  "") ac_top_builddir_sub=. ac_top_build_prefix= ;;
+  *)  ac_top_build_prefix=$ac_top_builddir_sub/ ;;
+  esac ;;
+esac
+ac_abs_top_builddir=$ac_pwd
+ac_abs_builddir=$ac_pwd$ac_dir_suffix
+# for backward compatibility:
+ac_top_builddir=$ac_top_build_prefix
+
+case $srcdir in
+  .)  # We are building in place.
+    ac_srcdir=.
+    ac_top_srcdir=$ac_top_builddir_sub
+    ac_abs_top_srcdir=$ac_pwd ;;
+  [\\/]* | ?:[\\/]* )  # Absolute name.
+    ac_srcdir=$srcdir$ac_dir_suffix;
+    ac_top_srcdir=$srcdir
+    ac_abs_top_srcdir=$srcdir ;;
+  *) # Relative name.
+    ac_srcdir=$ac_top_build_prefix$srcdir$ac_dir_suffix
+    ac_top_srcdir=$ac_top_build_prefix$srcdir
+    ac_abs_top_srcdir=$ac_pwd/$srcdir ;;
+esac
+ac_abs_srcdir=$ac_abs_top_srcdir$ac_dir_suffix
+
+
+  case $ac_mode in
+  :F)
+  #
+  # CONFIG_FILE
+  #
+
+  case $INSTALL in
+  [\\/$]* | ?:[\\/]* ) ac_INSTALL=$INSTALL ;;
+  *) ac_INSTALL=$ac_top_build_prefix$INSTALL ;;
+  esac
+  ac_MKDIR_P=$MKDIR_P
+  case $MKDIR_P in
+  [\\/$]* | ?:[\\/]* ) ;;
+  */*) ac_MKDIR_P=$ac_top_build_prefix$MKDIR_P ;;
+  esac
+_ACEOF
+
+cat >>$CONFIG_STATUS <<\_ACEOF
+# If the template does not know about datarootdir, expand it.
+# FIXME: This hack should be removed a few years after 2.60.
+ac_datarootdir_hack=; ac_datarootdir_seen=
+
+case `sed -n '/datarootdir/ {
+  p
+  q
+}
+/@datadir@/p
+/@docdir@/p
+/@infodir@/p
+/@localedir@/p
+/@mandir@/p
+' $ac_file_inputs` in
+*datarootdir*) ac_datarootdir_seen=yes;;
+*@datadir@*|*@docdir@*|*@infodir@*|*@localedir@*|*@mandir@*)
+  { echo "$as_me:$LINENO: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&5
+echo "$as_me: WARNING: $ac_file_inputs seems to ignore the --datarootdir setting" >&2;}
+_ACEOF
+cat >>$CONFIG_STATUS <<_ACEOF
+  ac_datarootdir_hack='
+  s&@datadir@&$datadir&g
+  s&@docdir@&$docdir&g
+  s&@infodir@&$infodir&g
+  s&@localedir@&$localedir&g
+  s&@mandir@&$mandir&g
+    s&\\\${datarootdir}&$datarootdir&g' ;;
+esac
+_ACEOF
+
+# Neutralize VPATH when `$srcdir' = `.'.
+# Shell code in configure.ac might set extrasub.
+# FIXME: do we really want to maintain this feature?
+cat >>$CONFIG_STATUS <<_ACEOF
+  sed "$ac_vpsub
+$extrasub
+_ACEOF
+cat >>$CONFIG_STATUS <<\_ACEOF
+:t
+/@[a-zA-Z_][a-zA-Z_0-9]*@/!b
+s&@configure_input@&$configure_input&;t t
+s&@top_builddir@&$ac_top_builddir_sub&;t t
+s&@srcdir@&$ac_srcdir&;t t
+s&@abs_srcdir@&$ac_abs_srcdir&;t t
+s&@top_srcdir@&$ac_top_srcdir&;t t
+s&@abs_top_srcdir@&$ac_abs_top_srcdir&;t t
+s&@builddir@&$ac_builddir&;t t
+s&@abs_builddir@&$ac_abs_builddir&;t t
+s&@abs_top_builddir@&$ac_abs_top_builddir&;t t
+s&@INSTALL@&$ac_INSTALL&;t t
+s&@MKDIR_P@&$ac_MKDIR_P&;t t
+$ac_datarootdir_hack
+" $ac_file_inputs | sed -f "$tmp/subs-1.sed" >$tmp/out
+
+test -z "$ac_datarootdir_hack$ac_datarootdir_seen" &&
+  { ac_out=`sed -n '/\${datarootdir}/p' "$tmp/out"`; test -n "$ac_out"; } &&
+  { ac_out=`sed -n '/^[	 ]*datarootdir[	 ]*:*=/p' "$tmp/out"`; test -z "$ac_out"; } &&
+  { echo "$as_me:$LINENO: WARNING: $ac_file contains a reference to the variable \`datarootdir'
+which seems to be undefined.  Please make sure it is defined." >&5
+echo "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir'
+which seems to be undefined.  Please make sure it is defined." >&2;}
+
+  rm -f "$tmp/stdin"
+  case $ac_file in
+  -) cat "$tmp/out"; rm -f "$tmp/out";;
+  *) rm -f "$ac_file"; mv "$tmp/out" $ac_file;;
+  esac
+ ;;
+  :H)
+  #
+  # CONFIG_HEADER
+  #
+_ACEOF
+
+# Transform confdefs.h into a sed script `conftest.defines', that
+# substitutes the proper values into config.h.in to produce config.h.
+rm -f conftest.defines conftest.tail
+# First, append a space to every undef/define line, to ease matching.
+echo 's/$/ /' >conftest.defines
+# Then, protect against being on the right side of a sed subst, or in
+# an unquoted here document, in config.status.  If some macros were
+# called several times there might be several #defines for the same
+# symbol, which is useless.  But do not sort them, since the last
+# AC_DEFINE must be honored.
+ac_word_re=[_$as_cr_Letters][_$as_cr_alnum]*
+# These sed commands are passed to sed as "A NAME B PARAMS C VALUE D", where
+# NAME is the cpp macro being defined, VALUE is the value it is being given.
+# PARAMS is the parameter list in the macro definition--in most cases, it's
+# just an empty string.
+ac_dA='s,^\\([	 #]*\\)[^	 ]*\\([	 ]*'
+ac_dB='\\)[	 (].*,\\1define\\2'
+ac_dC=' '
+ac_dD=' ,'
+
+uniq confdefs.h |
+  sed -n '
+	t rset
+	:rset
+	s/^[	 ]*#[	 ]*define[	 ][	 ]*//
+	t ok
+	d
+	:ok
+	s/[\\&,]/\\&/g
+	s/^\('"$ac_word_re"'\)\(([^()]*)\)[	 ]*\(.*\)/ '"$ac_dA"'\1'"$ac_dB"'\2'"${ac_dC}"'\3'"$ac_dD"'/p
+	s/^\('"$ac_word_re"'\)[	 ]*\(.*\)/'"$ac_dA"'\1'"$ac_dB$ac_dC"'\2'"$ac_dD"'/p
+  ' >>conftest.defines
+
+# Remove the space that was appended to ease matching.
+# Then replace #undef with comments.  This is necessary, for
+# example, in the case of _POSIX_SOURCE, which is predefined and required
+# on some systems where configure will not decide to define it.
+# (The regexp can be short, since the line contains either #define or #undef.)
+echo 's/ $//
+s,^[	 #]*u.*,/* & */,' >>conftest.defines
+
+# Break up conftest.defines:
+ac_max_sed_lines=50
+
+# First sed command is:	 sed -f defines.sed $ac_file_inputs >"$tmp/out1"
+# Second one is:	 sed -f defines.sed "$tmp/out1" >"$tmp/out2"
+# Third one will be:	 sed -f defines.sed "$tmp/out2" >"$tmp/out1"
+# et cetera.
+ac_in='$ac_file_inputs'
+ac_out='"$tmp/out1"'
+ac_nxt='"$tmp/out2"'
+
+while :
+do
+  # Write a here document:
+    cat >>$CONFIG_STATUS <<_ACEOF
+    # First, check the format of the line:
+    cat >"\$tmp/defines.sed" <<\\CEOF
+/^[	 ]*#[	 ]*undef[	 ][	 ]*$ac_word_re[	 ]*\$/b def
+/^[	 ]*#[	 ]*define[	 ][	 ]*$ac_word_re[(	 ]/b def
+b
+:def
+_ACEOF
+  sed ${ac_max_sed_lines}q conftest.defines >>$CONFIG_STATUS
+  echo 'CEOF
+    sed -f "$tmp/defines.sed"' "$ac_in >$ac_out" >>$CONFIG_STATUS
+  ac_in=$ac_out; ac_out=$ac_nxt; ac_nxt=$ac_in
+  sed 1,${ac_max_sed_lines}d conftest.defines >conftest.tail
+  grep . conftest.tail >/dev/null || break
+  rm -f conftest.defines
+  mv conftest.tail conftest.defines
+done
+rm -f conftest.defines conftest.tail
+
+echo "ac_result=$ac_in" >>$CONFIG_STATUS
+cat >>$CONFIG_STATUS <<\_ACEOF
+  if test x"$ac_file" != x-; then
+    echo "/* $configure_input  */" >"$tmp/config.h"
+    cat "$ac_result" >>"$tmp/config.h"
+    if diff $ac_file "$tmp/config.h" >/dev/null 2>&1; then
+      { echo "$as_me:$LINENO: $ac_file is unchanged" >&5
+echo "$as_me: $ac_file is unchanged" >&6;}
+    else
+      rm -f $ac_file
+      mv "$tmp/config.h" $ac_file
+    fi
+  else
+    echo "/* $configure_input  */"
+    cat "$ac_result"
+  fi
+  rm -f "$tmp/out12"
+# Compute $ac_file's index in $config_headers.
+_am_arg=$ac_file
+_am_stamp_count=1
+for _am_header in $config_headers :; do
+  case $_am_header in
+    $_am_arg | $_am_arg:* )
+      break ;;
+    * )
+      _am_stamp_count=`expr $_am_stamp_count + 1` ;;
+  esac
+done
+echo "timestamp for $_am_arg" >`$as_dirname -- "$_am_arg" ||
+$as_expr X"$_am_arg" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+	 X"$_am_arg" : 'X\(//\)[^/]' \| \
+	 X"$_am_arg" : 'X\(//\)$' \| \
+	 X"$_am_arg" : 'X\(/\)' \| . 2>/dev/null ||
+echo X"$_am_arg" |
+    sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)[^/].*/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\).*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`/stamp-h$_am_stamp_count
+ ;;
+
+  :C)  { echo "$as_me:$LINENO: executing $ac_file commands" >&5
+echo "$as_me: executing $ac_file commands" >&6;}
+ ;;
+  esac
+
+
+  case $ac_file$ac_mode in
+    "depfiles":C) test x"$AMDEP_TRUE" != x"" || for mf in $CONFIG_FILES; do
+  # Strip MF so we end up with the name of the file.
+  mf=`echo "$mf" | sed -e 's/:.*$//'`
+  # Check whether this is an Automake generated Makefile or not.
+  # We used to match only the files named `Makefile.in', but
+  # some people rename them; so instead we look at the file content.
+  # Grep'ing the first line is not enough: some people post-process
+  # each Makefile.in and add a new line on top of each file to say so.
+  # Grep'ing the whole file is not good either: AIX grep has a line
+  # limit of 2048, but all sed's we know have understand at least 4000.
+  if sed -n 's,^#.*generated by automake.*,X,p' "$mf" | grep X >/dev/null 2>&1; then
+    dirpart=`$as_dirname -- "$mf" ||
+$as_expr X"$mf" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+	 X"$mf" : 'X\(//\)[^/]' \| \
+	 X"$mf" : 'X\(//\)$' \| \
+	 X"$mf" : 'X\(/\)' \| . 2>/dev/null ||
+echo X"$mf" |
+    sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)[^/].*/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\).*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+  else
+    continue
+  fi
+  # Extract the definition of DEPDIR, am__include, and am__quote
+  # from the Makefile without running `make'.
+  DEPDIR=`sed -n 's/^DEPDIR = //p' < "$mf"`
+  test -z "$DEPDIR" && continue
+  am__include=`sed -n 's/^am__include = //p' < "$mf"`
+  test -z "am__include" && continue
+  am__quote=`sed -n 's/^am__quote = //p' < "$mf"`
+  # When using ansi2knr, U may be empty or an underscore; expand it
+  U=`sed -n 's/^U = //p' < "$mf"`
+  # Find all dependency output files, they are included files with
+  # $(DEPDIR) in their names.  We invoke sed twice because it is the
+  # simplest approach to changing $(DEPDIR) to its actual value in the
+  # expansion.
+  for file in `sed -n "
+    s/^$am__include $am__quote\(.*(DEPDIR).*\)$am__quote"'$/\1/p' <"$mf" | \
+       sed -e 's/\$(DEPDIR)/'"$DEPDIR"'/g' -e 's/\$U/'"$U"'/g'`; do
+    # Make sure the directory exists.
+    test -f "$dirpart/$file" && continue
+    fdir=`$as_dirname -- "$file" ||
+$as_expr X"$file" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+	 X"$file" : 'X\(//\)[^/]' \| \
+	 X"$file" : 'X\(//\)$' \| \
+	 X"$file" : 'X\(/\)' \| . 2>/dev/null ||
+echo X"$file" |
+    sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)[^/].*/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\).*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+    { as_dir=$dirpart/$fdir
+  case $as_dir in #(
+  -*) as_dir=./$as_dir;;
+  esac
+  test -d "$as_dir" || { $as_mkdir_p && mkdir -p "$as_dir"; } || {
+    as_dirs=
+    while :; do
+      case $as_dir in #(
+      *\'*) as_qdir=`echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #(
+      *) as_qdir=$as_dir;;
+      esac
+      as_dirs="'$as_qdir' $as_dirs"
+      as_dir=`$as_dirname -- "$as_dir" ||
+$as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \
+	 X"$as_dir" : 'X\(//\)[^/]' \| \
+	 X"$as_dir" : 'X\(//\)$' \| \
+	 X"$as_dir" : 'X\(/\)' \| . 2>/dev/null ||
+echo X"$as_dir" |
+    sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)[^/].*/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\/\)$/{
+	    s//\1/
+	    q
+	  }
+	  /^X\(\/\).*/{
+	    s//\1/
+	    q
+	  }
+	  s/.*/./; q'`
+      test -d "$as_dir" && break
+    done
+    test -z "$as_dirs" || eval "mkdir $as_dirs"
+  } || test -d "$as_dir" || { { echo "$as_me:$LINENO: error: cannot create directory $as_dir" >&5
+echo "$as_me: error: cannot create directory $as_dir" >&2;}
+   { (exit 1); exit 1; }; }; }
+    # echo "creating $dirpart/$file"
+    echo '# dummy' > "$dirpart/$file"
+  done
+done
+ ;;
+
+  esac
+done # for ac_tag
+
+
+{ (exit 0); exit 0; }
+_ACEOF
+chmod +x $CONFIG_STATUS
+ac_clean_files=$ac_clean_files_save
+
+
+# configure is writing to config.log, and then calls config.status.
+# config.status does its own redirection, appending to config.log.
+# Unfortunately, on DOS this fails, as config.log is still kept open
+# by configure, so config.status won't be able to write to it; its
+# output is simply discarded.  So we exec the FD to /dev/null,
+# effectively closing config.log, so it can be properly (re)opened and
+# appended to by config.status.  When coming back to configure, we
+# need to make the FD available again.
+if test "$no_create" != yes; then
+  ac_cs_success=:
+  ac_config_status_args=
+  test "$silent" = yes &&
+    ac_config_status_args="$ac_config_status_args --quiet"
+  exec 5>/dev/null
+  $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false
+  exec 5>>config.log
+  # Use ||, not &&, to avoid exiting from the if with $? = 1, which
+  # would make configure fail if this is the last instruction.
+  $ac_cs_success || { (exit 1); exit 1; }
+fi
+
+
diff --git a/tools/platforms/msp430/cppbsl/configure.in b/tools/platforms/msp430/cppbsl/configure.in
new file mode 100644
index 00000000..4d0cf83d
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/configure.in
@@ -0,0 +1,280 @@
+#                                               -*- Autoconf -*-
+# Process this file with autoconf to produce a configure script.
+
+AC_PREREQ(2.53)
+AC_INIT(cppbsl, 0.1, koepke@tkn.tu-berlin.de)
+AC_CONFIG_AUX_DIR(config)
+AM_CONFIG_HEADER(config.h)
+AC_CONFIG_SRCDIR([src])
+AM_INIT_AUTOMAKE
+
+# Checks for programs.
+AC_PROG_CC
+AC_PROG_CPP
+AC_PROG_CXX
+AC_PROG_GCC_TRADITIONAL
+
+AC_FUNC_ERROR_AT_LINE
+AC_HEADER_STDC
+AC_HEADER_STDBOOL
+AC_HEADER_TIME
+
+#checks for header files and libraries
+AC_CHECK_HEADERS([linux/version.h popt.h fcntl.h inttypes.h stdlib.h sys/ioctl.h sys/time.h termios.h unistd.h])
+AC_CHECK_LIB(popt, poptGetNextOpt)
+
+# Checks for typedefs, structures, and compiler characteristics.
+AC_C_CONST
+AC_C_INLINE
+AC_TYPE_UINT16_T
+AC_TYPE_UINT8_T
+
+AC_FUNC_SELECT_ARGTYPES
+AC_CHECK_FUNCS([select strerror])
+
+AC_DEFUN([ACX_PTHREAD], [
+AC_REQUIRE([AC_CANONICAL_HOST])
+AC_LANG_SAVE
+AC_LANG_C
+acx_pthread_ok=no
+
+# Steven G. Johnson <stevenj@alum.mit.edu> http://autoconf-archive.cryp.to/acx_pthread.html
+
+# We used to check for pthread.h first, but this fails if pthread.h
+# requires special compiler flags (e.g. on True64 or Sequent).
+# It gets checked for in the link test anyway.
+
+# First of all, check if the user has set any of the PTHREAD_LIBS,
+# etcetera environment variables, and if threads linking works using
+# them:
+if test x"$PTHREAD_LIBS$PTHREAD_CFLAGS" != x; then
+        save_CFLAGS="$CFLAGS"
+        CFLAGS="$CFLAGS $PTHREAD_CFLAGS"
+        save_LIBS="$LIBS"
+        LIBS="$PTHREAD_LIBS $LIBS"
+        AC_MSG_CHECKING([for pthread_join in LIBS=$PTHREAD_LIBS with CFLAGS=$PTHREAD_CFLAGS])
+        AC_TRY_LINK_FUNC(pthread_join, acx_pthread_ok=yes)
+        AC_MSG_RESULT($acx_pthread_ok)
+        if test x"$acx_pthread_ok" = xno; then
+                PTHREAD_LIBS=""
+                PTHREAD_CFLAGS=""
+        fi
+        LIBS="$save_LIBS"
+        CFLAGS="$save_CFLAGS"
+fi
+
+# We must check for the threads library under a number of different
+# names; the ordering is very important because some systems
+# (e.g. DEC) have both -lpthread and -lpthreads, where one of the
+# libraries is broken (non-POSIX).
+
+# Create a list of thread flags to try.  Items starting with a "-" are
+# C compiler flags, and other items are library names, except for "none"
+# which indicates that we try without any flags at all, and "pthread-config"
+# which is a program returning the flags for the Pth emulation library.
+
+acx_pthread_flags="pthreads none -Kthread -kthread lthread -pthread -pthreads -mthreads pthread --thread-safe -mt pthread-config"
+
+# The ordering *is* (sometimes) important.  Some notes on the
+# individual items follow:
+
+# pthreads: AIX (must check this before -lpthread)
+# none: in case threads are in libc; should be tried before -Kthread and
+#       other compiler flags to prevent continual compiler warnings
+# -Kthread: Sequent (threads in libc, but -Kthread needed for pthread.h)
+# -kthread: FreeBSD kernel threads (preferred to -pthread since SMP-able)
+# lthread: LinuxThreads port on FreeBSD (also preferred to -pthread)
+# -pthread: Linux/gcc (kernel threads), BSD/gcc (userland threads)
+# -pthreads: Solaris/gcc
+# -mthreads: Mingw32/gcc, Lynx/gcc
+# -mt: Sun Workshop C (may only link SunOS threads [-lthread], but it
+#      doesn't hurt to check since this sometimes defines pthreads too;
+#      also defines -D_REENTRANT)
+#      ... -mt is also the pthreads flag for HP/aCC
+# pthread: Linux, etcetera
+# --thread-safe: KAI C++
+# pthread-config: use pthread-config program (for GNU Pth library)
+
+case "${host_cpu}-${host_os}" in
+        *solaris*)
+
+        # On Solaris (at least, for some versions), libc contains stubbed
+        # (non-functional) versions of the pthreads routines, so link-based
+        # tests will erroneously succeed.  (We need to link with -pthreads/-mt/
+        # -lpthread.)  (The stubs are missing pthread_cleanup_push, or rather
+        # a function called by this macro, so we could check for that, but
+        # who knows whether they'll stub that too in a future libc.)  So,
+        # we'll just look for -pthreads and -lpthread first:
+
+        acx_pthread_flags="-pthreads pthread -mt -pthread $acx_pthread_flags"
+        ;;
+esac
+
+if test x"$acx_pthread_ok" = xno; then
+for flag in $acx_pthread_flags; do
+
+        case $flag in
+                none)
+                AC_MSG_CHECKING([whether pthreads work without any flags])
+                ;;
+
+                -*)
+                AC_MSG_CHECKING([whether pthreads work with $flag])
+                PTHREAD_CFLAGS="$flag"
+                ;;
+
+                pthread-config)
+                AC_CHECK_PROG(acx_pthread_config, pthread-config, yes, no)
+                if test x"$acx_pthread_config" = xno; then continue; fi
+                PTHREAD_CFLAGS="`pthread-config --cflags`"
+                PTHREAD_LIBS="`pthread-config --ldflags` `pthread-config --libs`"
+                ;;
+
+                *)
+                AC_MSG_CHECKING([for the pthreads library -l$flag])
+                PTHREAD_LIBS="-l$flag"
+                ;;
+        esac
+
+        save_LIBS="$LIBS"
+        save_CFLAGS="$CFLAGS"
+        LIBS="$PTHREAD_LIBS $LIBS"
+        CFLAGS="$CFLAGS $PTHREAD_CFLAGS"
+
+        # Check for various functions.  We must include pthread.h,
+        # since some functions may be macros.  (On the Sequent, we
+        # need a special flag -Kthread to make this header compile.)
+        # We check for pthread_join because it is in -lpthread on IRIX
+        # while pthread_create is in libc.  We check for pthread_attr_init
+        # due to DEC craziness with -lpthreads.  We check for
+        # pthread_cleanup_push because it is one of the few pthread
+        # functions on Solaris that doesn't have a non-functional libc stub.
+        # We try pthread_create on general principles.
+        AC_TRY_LINK([#include <pthread.h>],
+                    [pthread_t th; pthread_join(th, 0);
+                     pthread_attr_init(0); pthread_cleanup_push(0, 0);
+                     pthread_create(0,0,0,0); pthread_cleanup_pop(0); ],
+                    [acx_pthread_ok=yes])
+
+        LIBS="$save_LIBS"
+        CFLAGS="$save_CFLAGS"
+
+        AC_MSG_RESULT($acx_pthread_ok)
+        if test "x$acx_pthread_ok" = xyes; then
+                break;
+        fi
+
+        PTHREAD_LIBS=""
+        PTHREAD_CFLAGS=""
+done
+fi
+
+# Various other checks:
+if test "x$acx_pthread_ok" = xyes; then
+        save_LIBS="$LIBS"
+        LIBS="$PTHREAD_LIBS $LIBS"
+        save_CFLAGS="$CFLAGS"
+        CFLAGS="$CFLAGS $PTHREAD_CFLAGS"
+
+        # Detect AIX lossage: JOINABLE attribute is called UNDETACHED.
+        AC_MSG_CHECKING([for joinable pthread attribute])
+        attr_name=unknown
+        for attr in PTHREAD_CREATE_JOINABLE PTHREAD_CREATE_UNDETACHED; do
+            AC_TRY_LINK([#include <pthread.h>], [int attr=$attr; return attr;],
+                        [attr_name=$attr; break])
+        done
+        AC_MSG_RESULT($attr_name)
+        if test "$attr_name" != PTHREAD_CREATE_JOINABLE; then
+            AC_DEFINE_UNQUOTED(PTHREAD_CREATE_JOINABLE, $attr_name,
+                               [Define to necessary symbol if this constant
+                                uses a non-standard name on your system.])
+        fi
+
+        AC_MSG_CHECKING([if more special flags are required for pthreads])
+        flag=no
+        case "${host_cpu}-${host_os}" in
+            *-aix* | *-freebsd* | *-darwin*) flag="-D_THREAD_SAFE";;
+            *solaris* | *-osf* | *-hpux*) flag="-D_REENTRANT";;
+        esac
+        AC_MSG_RESULT(${flag})
+        if test "x$flag" != xno; then
+            PTHREAD_CFLAGS="$flag $PTHREAD_CFLAGS"
+        fi
+
+        LIBS="$save_LIBS"
+        CFLAGS="$save_CFLAGS"
+
+        # More AIX lossage: must compile with xlc_r or cc_r
+        if test x"$GCC" != xyes; then
+          AC_CHECK_PROGS(PTHREAD_CC, xlc_r cc_r, ${CC})
+        else
+          PTHREAD_CC=$CC
+        fi
+else
+        PTHREAD_CC="$CC"
+fi
+
+AC_SUBST(PTHREAD_LIBS)
+AC_SUBST(PTHREAD_CFLAGS)
+AC_SUBST(PTHREAD_CC)
+
+# Finally, execute ACTION-IF-FOUND/ACTION-IF-NOT-FOUND:
+if test x"$acx_pthread_ok" = xyes; then
+        ifelse([$1],,AC_DEFINE(HAVE_PTHREAD,1,[Define if you have POSIX threads libraries and header files.]),[$1])
+        :
+else
+        acx_pthread_ok=no
+        $2
+fi
+AC_LANG_RESTORE
+])
+dnl ACX_PTHREAD
+
+# Checks for additional packages and features
+
+# optimization features
+DEFDEBUG="no"
+AC_ARG_ENABLE([debug], AC_HELP_STRING([--enable-debug=yes/no],
+			[compile with g++ debug options, default is no]),
+			[DEFDEBUG=$enableval])
+if test "$DEFDEBUG" = "yes"; then
+   CFLAGS=`echo $CFLAGS | sed -e 's/-O2//g' | sed -e 's/-g//g'`
+   CFLAGS="$CFLAGS -ggdb3"
+   CXXFLAGS=`echo $CXXFLAGS | sed -e 's/-O2//g' | sed -e 's/-g//g'`
+   CXXFLAGS="$CXXFLAGS -ggdb3"
+fi
+
+DEFOPTIMIZE="no"
+AC_ARG_ENABLE([optimize], AC_HELP_STRING([--enable-optimize=yes/no],
+ 			[compile with g++ optimize options, default is no]),
+ 			[DEFOPTIMIZE=$enableval])
+if test "$DEFOPTIMIZE" = "yes"; then 
+   CFLAGS=`echo $CFLAGS | sed -e 's/-O2//g' | sed -e 's/-g//g'`
+   CFLAGS="$CFLAGS -O3 -ggdb3 "
+   CXXFLAGS=`echo $CXXFLAGS | sed -e 's/-O2//g' | sed -e 's/-g//g'`
+   CXXFLAGS="$CXXFLAGS -O3 -ggdb3 "
+fi
+
+DEFPROF="no"
+AC_ARG_ENABLE([prof], AC_HELP_STRING([--enable-prof=yes/no],
+ 			[compile with g++ profiling options, default is no]),
+ 			[DEFPROF=$enableval])
+if test "$DEFPROF" = "yes"; then 
+   CFLAGS=`echo $CFLAGS | sed -e 's/-O2//g' | sed -e 's/-g//g'`
+   CFLAGS="$CFLAGS -O1 -pg"
+   CXXFLAGS=`echo $CXXFLAGS | sed -e 's/-O2//g' | sed -e 's/-g//g'`
+   CXXFLAGS="$CXXFLAGS -O1 -pg"
+fi
+
+# Using the results
+# ACX_PTHREAD(, AC_MSG_ERROR(Posix threads missing))
+
+LIBS="$PTHREAD_LIBS $LIBS"
+CFLAGS="$CFLAGS $PTHREAD_CFLAGS"
+CXXFLAGS="$CXXFLAGS $PTHREAD_CFLAGS"
+CC="$PTHREAD_CC"
+# CXX="$CXX $PTHREAD_CFLAGS $LIBS"
+
+AC_CONFIG_FILES([Makefile config/Makefile src/Makefile ])
+AC_OUTPUT
+
diff --git a/tools/platforms/msp430/cppbsl/src/Bsl.cc b/tools/platforms/msp430/cppbsl/src/Bsl.cc
new file mode 100644
index 00000000..e35c4dec
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/src/Bsl.cc
@@ -0,0 +1,239 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * hand rolled bsl tool, other ones are too slow
+ * @author Andreas Koepke <koepke at tkn.tu-berlin.de>
+ * @date 2007-04-16
+ */
+
+#include "Bsl.h"
+using namespace std;
+
+void Bsl::makeFrame(commands_t cmd, uint16_t A, uint16_t L, frame_t* frame, uint8_t dLen) {
+    frame->HDR = 0x80;
+    frame->CMD = (uint8_t)cmd;
+    frame->L1 = dLen + 4;
+    frame->L2 = dLen + 4;
+    frame->AL = A & 0xff;
+    frame->AH = (A>>8) & 0xff;
+    frame->LL = L & 0xff;
+    frame->LH = (L>>8) & 0xff;
+}
+
+int Bsl::rxPassword(int *err) {
+    frame_t txframe;
+    frame_t rxframe;
+    for(int i = 0; i < 32; i++) {
+        txframe.data[i] = 0xff;
+    }
+    makeFrame(RX_PWD, 0, 0, &txframe, 32);
+    cout << "Transmit default password ..." << endl;
+    return s->txrx(err, &txframe, &rxframe);
+}
+
+int Bsl::erase(int *err) {
+    int r = 0;
+    frame_t txframe;
+    frame_t rxframe;
+    makeFrame(MASS_ERASE, 0xff00, 0xa506, &txframe, 0);
+    for(int i = 0; i < 2; i++) {
+        r = s->invokeBsl(err);
+        if(r != -1) {
+            r = s->txrx(err, &txframe, &rxframe);
+            if(r != -1) {
+                cout << "Mass Erase..." << endl;
+                break;
+            }
+            else {
+                if(*err == EAGAIN) {
+                    serial_delay(1000000);
+                }
+                else {
+                    return -1;
+                }
+            }
+        }
+        else {
+            if(*err == EAGAIN) {
+                serial_delay(1000000);
+            }
+            else {
+                return -1;
+            }
+        }
+    }
+    return r;
+}
+
+int Bsl::install(int *err) {
+    unsigned len = 0;
+    int r = erase(err);
+    if(r == -1) {
+        cerr << "Bsl::install: could not erase node" << endl;
+        return r;
+    }
+    r = rxPassword(err);
+    if(r == -1) {
+        cerr << "Bsl::install: password not accepted" << endl;
+        return r;
+    }
+    r = parseIhex(err);
+    if(r == -1) {
+        cerr << "Bsl::install: could not parse ihex image" << endl;
+        return r;
+    }
+    r = highSpeed(err);
+    if(r == -1) {
+        cerr << " Bsl::install: could not switch to high speed mode" << endl;
+        return r;
+    }
+    cout << "Program ..." << endl;
+    for(std::list<Segment>::const_iterator it = prog.begin(); it != prog.end(); ++it) {
+        len += it->len;
+        r = writeData(err, (uint16_t)it->startAddr,it->data, it->len);
+        if(r == -1) {
+            cerr << " Bsl::install: could not write data" << endl;
+            return r;
+        }
+    }
+    cout << len << " bytes programmed." << endl;
+    r = s->reset(err);
+    if(r == -1) {
+        cerr << " Bsl::install: could not reset node" << endl;
+    }
+    return r;
+}
+
+int Bsl::writeBlock(int *err, const uint16_t addr, const uint8_t* data, const uint16_t len) {
+    frame_t txframe;
+    frame_t rxframe;
+    memcpy(txframe.data, data, len);
+    makeFrame(RX_DATA, addr, len, &txframe, len);
+    return s->txrx(err, &txframe, &rxframe);
+}
+
+int Bsl::writeData(int *err, const uint16_t addr, const uint8_t* data, const uint16_t len) {
+    int r = 0;
+    if(!data) {
+        cerr << "Command::write(): data==NULL" << endl;
+        return -1;
+    }
+    if(addr+len>0x10000) {
+        cerr << "Command::write(): addr+len>0x10000" << endl;
+        return -1;
+    }
+    int l;
+    uint16_t adr;
+    for(int i=0; i<len; i+=l) {
+        l=len-i;
+        if(l>CHUNKSIZE) l=CHUNKSIZE;
+        adr=addr+i;
+        r = writeBlock(err, adr, &data[i], l);
+        if(r == -1) {
+            break;
+        }
+    }
+    return r;
+}
+
+int Bsl::parseIhex(int *err) {
+    char buf[512];
+    Segment segment;
+    segment.len = 0;
+    segment.startAddr = 0;
+    int r;
+    FILE *readFD = fopen(image, "r");
+    if(readFD == NULL) {
+        *err = errno;
+        cerr << "Bsl::parseIhex: Could not open " << image << endl;
+        return -1;
+    };
+    while(fgets(buf, 512, readFD) == buf) {
+        uint16_t len;
+        uint16_t addr;
+        uint16_t recType;
+        uint16_t checksum = 0;
+        uint16_t byte;
+        unsigned i;
+        if(buf[0] != (uint8_t)':') {
+            cerr << "Bsl::parseIhex:  " << image << "is not an ihex" << endl;
+            return -1;
+        }
+        sscanf(buf,":%2hx%4hx%2hx",&len, &addr, &recType);
+        checksum = len + (addr>>8) + (addr & 0xff) + recType;
+        if(recType == 0) {
+            if((segment.len != 0) && (segment.startAddr + segment.len != addr)) {
+                prog.push_back(segment);
+                segment.len = 0;
+            }
+            if(segment.len == 0) {
+                segment.startAddr = addr;
+            }
+            for(i = 0; i  < len; i++) {
+                sscanf(buf+9+2*i,"%2hx",&byte);
+                segment.data[segment.len] = byte;
+                checksum += segment.data[segment.len];
+                ++segment.len;
+            }
+            checksum = (-checksum) & 0xff;
+            sscanf(buf+9+2*i,"%4hx",&byte);
+            if(checksum == byte) {
+                
+            } else {
+                cerr << "Bsl::parseIhex wrong data line format in " << image << endl;
+                fclose(readFD);
+                return -1;
+            }
+        }
+        else if(recType == 1) {
+            prog.push_back(segment);
+        }
+    }
+    r = fclose(readFD);
+    if(r == -1) {
+        *err = errno;
+    }
+    return r;
+}
+
+int Bsl::highSpeed(int *err) {
+    frame_t txframe;
+    frame_t rxframe;
+    int r;
+    for(int i = 0; i < 32; i++) {
+        txframe.data[i] = 0xff;
+    }
+    makeFrame(BAUDRATE, 0x87e0, 0x0002, &txframe, 0);
+    r = s->txrx(err, &txframe, &rxframe);
+    if(r != -1) {
+        serial_delay(10000);
+        r = s->highSpeed(err);
+    }
+    return r;
+}
diff --git a/tools/platforms/msp430/cppbsl/src/Bsl.h b/tools/platforms/msp430/cppbsl/src/Bsl.h
new file mode 100644
index 00000000..7561ca19
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/src/Bsl.h
@@ -0,0 +1,96 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * hand rolled bsl tool, other ones are too slow
+ * @author Andreas Koepke <koepke at tkn.tu-berlin.de>
+ * @date 2007-04-16
+ */
+
+#ifndef BSL_BSL_H
+#define BSL_BSL_H
+
+#include <string>
+#include <iostream>
+#include <list>
+#include "Parameters.h"
+#include "Serial.h"
+
+
+class Bsl {
+protected:
+    BaseSerial *s;
+    const char *image;
+    const int CHUNKSIZE;
+    
+    enum commands_t {
+        MASS_ERASE = 0x18,
+        RX_DATA = 0x12,
+        RX_PWD = 0x10,
+        BAUDRATE = 0x20
+    };
+
+    class Segment {
+    public:
+        unsigned startAddr;
+        unsigned len;
+        uint8_t  data[65536];
+        Segment(const Segment& a) {
+            startAddr = a.startAddr;
+            len = a.len;
+            memcpy(data, a.data, len);
+        }
+        Segment() {
+            startAddr = 0;
+            len = 0;
+        }
+    };
+    
+    std::list<Segment> prog;
+    
+protected:    
+    int rxPassword(int* err);
+    int writeBlock(int *err, const uint16_t addr, const uint8_t* data, const uint16_t len);
+    int writeData(int *err, const uint16_t addr, const uint8_t* data, const uint16_t len);
+    int parseIhex(int *err);
+    void makeFrame(commands_t cmd, uint16_t A, uint16_t L, frame_t* frame, uint8_t dLen);
+    int highSpeed(int *err);
+    
+public:
+    Bsl(BaseSerial* ser, const char *img, int cs=250) : s(ser), image(img), CHUNKSIZE(cs) {
+    };
+
+    ~Bsl() {
+    }
+    
+    int reset(int *err) { return s->reset(err);};
+    int erase(int *err);
+    int install(int *err);
+};
+
+#endif
diff --git a/tools/platforms/msp430/cppbsl/src/Makefile.am b/tools/platforms/msp430/cppbsl/src/Makefile.am
new file mode 100644
index 00000000..8195481b
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/src/Makefile.am
@@ -0,0 +1,12 @@
+## Makefile.am -- Process this file with automake to produce Makefile.in
+## src/Makefile.am
+MAINTAINERCLEANFILES = Makefile.in
+bin_PROGRAMS=cppbsl
+cppbsl_SOURCES=\
+	Parameters.h \
+	Parameters.cc \
+	Serial.h \
+	Serial.cc \
+	Bsl.h \
+	Bsl.cc \
+	cppbsl.cc 
diff --git a/tools/platforms/msp430/cppbsl/src/Makefile.in b/tools/platforms/msp430/cppbsl/src/Makefile.in
new file mode 100644
index 00000000..3946e7a5
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/src/Makefile.in
@@ -0,0 +1,429 @@
+# Makefile.in generated by automake 1.10.1 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008  Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+VPATH = @srcdir@
+pkgdatadir = $(datadir)/@PACKAGE@
+pkglibdir = $(libdir)/@PACKAGE@
+pkgincludedir = $(includedir)/@PACKAGE@
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
+install_sh_PROGRAM = $(install_sh) -c
+install_sh_SCRIPT = $(install_sh) -c
+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+bin_PROGRAMS = cppbsl$(EXEEXT)
+subdir = src
+DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
+am__aclocal_m4_deps = $(top_srcdir)/configure.in
+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
+	$(ACLOCAL_M4)
+mkinstalldirs = $(install_sh) -d
+CONFIG_HEADER = $(top_builddir)/config.h
+CONFIG_CLEAN_FILES =
+am__installdirs = "$(DESTDIR)$(bindir)"
+binPROGRAMS_INSTALL = $(INSTALL_PROGRAM)
+PROGRAMS = $(bin_PROGRAMS)
+am_cppbsl_OBJECTS = Parameters.$(OBJEXT) Serial.$(OBJEXT) \
+	Bsl.$(OBJEXT) cppbsl.$(OBJEXT)
+cppbsl_OBJECTS = $(am_cppbsl_OBJECTS)
+cppbsl_LDADD = $(LDADD)
+DEFAULT_INCLUDES = -I.@am__isrc@ -I$(top_builddir)
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+	Parameters.h \
+	Parameters.cc \
+	Serial.h \
+	Serial.cc \
+	Bsl.h \
+	Bsl.cc \
+	cppbsl.cc 
+
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+
+.SUFFIXES:
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+	@for dep in $?; do \
+	  case '$(am__configure_deps)' in \
+	    *$$dep*) \
+	      cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \
+		&& exit 0; \
+	      exit 1;; \
+	  esac; \
+	done; \
+	echo ' cd $(top_srcdir) && $(AUTOMAKE) --gnu  src/Makefile'; \
+	cd $(top_srcdir) && \
+	  $(AUTOMAKE) --gnu  src/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+	@case '$?' in \
+	  *config.status*) \
+	    cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+	  *) \
+	    echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
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+	@$(NORMAL_INSTALL)
+	test -z "$(bindir)" || $(MKDIR_P) "$(DESTDIR)$(bindir)"
+	@list='$(bin_PROGRAMS)'; for p in $$list; do \
+	  p1=`echo $$p|sed 's/$(EXEEXT)$$//'`; \
+	  if test -f $$p \
+	  ; then \
+	    f=`echo "$$p1" | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'`; \
+	   echo " $(INSTALL_PROGRAM_ENV) $(binPROGRAMS_INSTALL) '$$p' '$(DESTDIR)$(bindir)/$$f'"; \
+	   $(INSTALL_PROGRAM_ENV) $(binPROGRAMS_INSTALL) "$$p" "$(DESTDIR)$(bindir)/$$f" || exit 1; \
+	  else :; fi; \
+	done
+
+uninstall-binPROGRAMS:
+	@$(NORMAL_UNINSTALL)
+	@list='$(bin_PROGRAMS)'; for p in $$list; do \
+	  f=`echo "$$p" | sed 's,^.*/,,;s/$(EXEEXT)$$//;$(transform);s/$$/$(EXEEXT)/'`; \
+	  echo " rm -f '$(DESTDIR)$(bindir)/$$f'"; \
+	  rm -f "$(DESTDIR)$(bindir)/$$f"; \
+	done
+
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+	-test -z "$(bin_PROGRAMS)" || rm -f $(bin_PROGRAMS)
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+	@rm -f cppbsl$(EXEEXT)
+	$(CXXLINK) $(cppbsl_OBJECTS) $(cppbsl_LDADD) $(LIBS)
+
+mostlyclean-compile:
+	-rm -f *.$(OBJEXT)
+
+distclean-compile:
+	-rm -f *.tab.c
+
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/Bsl.Po@am__quote@
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+
+.cc.o:
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+.cc.obj:
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+@am__fastdepCXX_FALSE@	$(CXXCOMPILE) -c -o $@ `$(CYGPATH_W) '$<'`
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+	    if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+	  done | \
+	  $(AWK) '{ files[$$0] = 1; nonemtpy = 1; } \
+	      END { if (nonempty) { for (i in files) print i; }; }'`; \
+	mkid -fID $$unique
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+
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+		$(TAGS_FILES) $(LISP)
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+	list='$(SOURCES) $(HEADERS)  $(LISP) $(TAGS_FILES)'; \
+	unique=`for i in $$list; do \
+	    if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
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+	  test -n "$$unique" || unique=$$empty_fix; \
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+	    $$tags $$unique; \
+	fi
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+		$(TAGS_FILES) $(LISP)
+	tags=; \
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+	  done | \
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+
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+	  && gtags -i $(GTAGS_ARGS) $$here
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+distdir: $(DISTFILES)
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+	list='$(DISTFILES)'; \
+	  dist_files=`for file in $$list; do echo $$file; done | \
+	  sed -e "s|^$$srcdirstrip/||;t" \
+	      -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
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+	  */*) $(MKDIR_P) `echo "$$dist_files" | \
+			   sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+			   sort -u` ;; \
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+	    || cp -p $$d/$$file $(distdir)/$$file \
+	    || exit 1; \
+	  fi; \
+	done
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+	  `test -z '$(STRIP)' || \
+	    echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
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+
+clean-generic:
+
+distclean-generic:
+	-test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+	@echo "This command is intended for maintainers to use"
+	@echo "it deletes files that may require special tools to rebuild."
+	-test -z "$(MAINTAINERCLEANFILES)" || rm -f $(MAINTAINERCLEANFILES)
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+clean-am: clean-binPROGRAMS clean-generic mostlyclean-am
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+	-rm -f Makefile
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+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
diff --git a/tools/platforms/msp430/cppbsl/src/Parameters.cc b/tools/platforms/msp430/cppbsl/src/Parameters.cc
new file mode 100644
index 00000000..56d7cb1e
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/src/Parameters.cc
@@ -0,0 +1,143 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <iostream>
+#include <popt.h>
+#include "Parameters.h"
+
+using namespace std;
+
+Parameters::Parameters(int argc, char **argv) {
+    int c;
+    action = NONE;
+    device = 0;
+    verbose = false;
+    action = NONE;
+    image = 0;
+    telosb = false;
+    chunksize = 250;
+    
+    poptOption optionsTable[] = {
+        {"debug",'D', 0, 0, 'd', "print many statements on progress"},
+        {"f1x",'1', 0, 0, '1', "Specify CPU family, in case autodetect fails"},
+        {"invert-reset",'R', 0, 0, 'R', "RESET pin is inverted"},
+        {"invert-test",'T', 0, 0, 'T', "TEST pin is inverted"},
+        {"telosb",'b', 0, 0, 'b', "Assume a TelosB node"},
+        {"tmote",'b', 0, 0, 'b', "Assume a Tmote node"},
+        {"intelhex",'I', 0, 0, 'I', "force fileformat to be  IntelHex"},
+        {"erase",'e', 0, 0, 'e', "erase device"},
+        {"reset",'r', 0, 0, 'r', "reset device"},
+        {"send-chunk-size",'s', POPT_ARG_INT | POPT_ARGFLAG_SHOW_DEFAULT,
+         &chunksize, 0, "program msp430 using chunks of this size", ""},
+        {"program",'p', POPT_ARG_STRING, &image, 0,
+         "Program file", ""},
+        {"comport",'c', POPT_ARG_STRING, &device, 0,
+         "communicate with MSP430 using this device", ""},
+        POPT_AUTOHELP
+        POPT_TABLEEND
+    };
+    
+    poptContext optCon;   /* context for parsing command-line options */
+    optCon = poptGetContext(NULL, argc, (const char**)argv, optionsTable, 0);
+    /* Now do options processing */
+    while((c = poptGetNextOpt(optCon)) >= 0) {
+        switch(c) {
+            case 'R':
+                invertReset = true;
+                break;
+            case 'T':
+                invertTest = true;
+                break;
+            case 'd':
+                verbose = true;
+                break;
+            case 'r':
+                if(action < RESET) {
+                    action = RESET;
+                }
+                break;
+            case 'e':
+                if(action < ERASE) {
+                    action = ERASE;
+                }
+                break;
+            case 'b':
+                telosb = true;
+                break;
+            default:
+                break;
+        }
+    }
+    if (c < -1) {
+        /* an error occurred during option processing */
+        fprintf(stderr, "%s: %s\n",
+                poptBadOption(optCon, POPT_BADOPTION_NOALIAS),
+                poptStrerror(c));
+        exit(1);
+    }
+    if(telosb) {
+        invertReset = false;
+        invertTest = false;
+    }
+    if(image != 0) {
+        action = FLASH;
+    }
+    if(device != 0) {
+        dev = device;
+    }
+    else {
+        exit(1);
+    }
+    if(image != 0) {
+        img = image;
+    }
+    else if(action == FLASH) {
+        exit(1);
+    }
+    // force sane chunk size
+    if(chunksize < 150) {
+        chunksize = 150;
+    }
+    else if(chunksize > 250) {
+        chunksize = 250;
+    }
+    // must be even!
+    chunksize /= 2; 
+    chunksize *= 2;
+    poptFreeContext(optCon);
+};
+
+
+
+
+
+
diff --git a/tools/platforms/msp430/cppbsl/src/Parameters.h b/tools/platforms/msp430/cppbsl/src/Parameters.h
new file mode 100644
index 00000000..c5f770fb
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/src/Parameters.h
@@ -0,0 +1,72 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * keep parameters for bsl tool
+ * @author Andreas Koepke <koepke at tkn.tu-berlin.de>
+ * @date 2007-10-23
+ */
+
+#ifndef _PARAMETERS_H
+#define _PARAMETERS_H
+
+#include <string>
+
+class Parameters
+{
+public:
+    enum actions_t {
+        NONE,
+        RESET,
+        ERASE,
+        FLASH
+    };
+    
+public:
+    const char *device;
+    std::string dev;
+    
+    const char *image;
+    std::string img;
+
+    bool verbose;
+    bool invertTest;
+    bool invertReset;
+    bool intelhex;
+    bool telosb;
+    
+    actions_t action;
+    int chunksize;
+    
+public:
+    Parameters(int argc, char **argv);
+};
+
+extern Parameters *parameters;
+
+#endif
diff --git a/tools/platforms/msp430/cppbsl/src/Serial.cc b/tools/platforms/msp430/cppbsl/src/Serial.cc
new file mode 100644
index 00000000..1f06989c
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/src/Serial.cc
@@ -0,0 +1,529 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * hand rolled bsl tool, other ones are too slow
+ * @author Andreas Koepke <koepke at tkn.tu-berlin.de>
+ * @date 2007-04-16
+ */
+#include <stdio.h>
+#include <iostream>
+#include "../config.h"
+#ifdef HAVE_LINUX_VERSION_H
+#include <linux/version.h>
+#else
+#define LINUX_VERSION_CODE 1
+#define KERNEL_VERSION 3
+#endif
+
+#include "Serial.h"
+
+using namespace std;
+
+int serial_connect(int* err, const char* dev, int* readFD, int* writeFD, termios* pt)
+{
+    struct termios my_tios;
+    struct serial_struct serinfo;
+    int r = 0;
+    *readFD = -1;
+    *writeFD = -1;
+    for(int i = 0; i < 2; i++) {
+        *readFD = open(dev, O_RDONLY | O_NOCTTY | O_NONBLOCK);
+        *err = errno;
+        if(*readFD != -1) {
+            break;
+        }
+        else if((*readFD == -1) && (errno == EAGAIN)) {
+            serial_delay(1000000);
+        }
+        else {
+            return -1;
+        }
+    }
+    if(*readFD == -1) {
+        return -1;
+    }
+    
+    for(int i = 0; i < 3; i++) {
+        *writeFD = open(dev, O_WRONLY | O_NOCTTY);
+        *err = errno;
+        if(*writeFD != -1) {
+            break;
+        }
+        else if((*writeFD == -1) && (errno == EAGAIN)) {
+            serial_delay(1000000);
+        }
+        else {
+            close(*readFD);
+            *readFD = -1;
+            return -1;
+        }
+    }
+    if(*writeFD == -1) {
+        close(*readFD);
+        *readFD = -1;
+        return -1;
+    }
+    /* prepare attributes */
+#if defined(HAVE_LINUX_VERSION_H) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+    r = tcgetattr(*writeFD, &my_tios);
+    if(r == -1) {
+        *err = errno;
+        close(*readFD);
+        close(*writeFD);
+        return -1;
+    }
+    *pt = my_tios;
+    cfmakeraw(&my_tios);
+    my_tios.c_iflag |= IGNBRK | INPCK;
+    my_tios.c_cflag |= (CS8 | CLOCAL | CREAD | PARENB);
+    cfsetispeed(&my_tios, B38400); // dummy
+    cfsetospeed(&my_tios, B38400); // dummy    
+
+    r = tcsetattr(*readFD, TCSANOW, &my_tios);
+    if(r == -1) {
+        *err = errno;
+        r = tcsetattr(*writeFD, TCSANOW, pt);
+        close(*readFD);
+        close(*writeFD);
+        return -1;        
+    }
+    
+    /* hack for baudrate */
+    r = ioctl(*writeFD, TIOCGSERIAL, &serinfo);
+    if(r == -1) {
+        *err = errno;
+        r = tcsetattr(*writeFD, TCSANOW, pt);
+        close(*readFD);
+        close(*writeFD);
+        return -1;        
+    }    
+    serinfo.custom_divisor = serinfo.baud_base / 9600;
+    if(serinfo.custom_divisor == 0) serinfo.custom_divisor = 1;
+    serinfo.flags &= ~ASYNC_SPD_MASK;
+    serinfo.flags |= ASYNC_SPD_CUST;
+    r = ioctl(*writeFD, TIOCSSERIAL, &serinfo);
+    if(r == -1) {
+        *err = errno;
+        r = tcsetattr(*writeFD, TCSANOW, pt);
+        close(*readFD);
+        close(*writeFD);
+        return -1;        
+    }
+#else
+    r = tcgetattr(*writeFD, &my_tios);
+    if(r == -1) {
+        *err = errno;
+        close(*readFD);
+        close(*writeFD);
+        return -1;
+    }
+    *pt = my_tios;
+    cfmakeraw(&my_tios);
+    my_tios.c_iflag |= IGNBRK | INPCK;
+    my_tios.c_cflag |= (CS8 | CLOCAL | CREAD | PARENB);
+    cfsetispeed(&my_tios, B9600);
+    cfsetospeed(&my_tios, B9600);
+    r = tcsetattr(*readFD, TCSANOW, &my_tios);
+    if(r == -1) {
+        *err = errno;
+        r = tcsetattr(*writeFD, TCSANOW, pt);
+        close(*readFD);
+        close(*writeFD);
+        return -1;        
+    }
+#endif
+    
+    // clear buffers
+    r = tcflush(*writeFD, TCIOFLUSH);
+    if(r == -1) {
+        *err = errno;
+        r = tcsetattr(*writeFD, TCSANOW, pt);
+        close(*readFD);
+        close(*writeFD);
+        return -1;        
+    }
+    if(r == -1) {
+        *err = errno;
+        r = tcsetattr(*writeFD, TCSANOW, pt);
+        close(*readFD);
+        close(*writeFD);
+    }
+    return r;
+};
+
+int BaseSerial::setPins(int *err) {
+    setRST(err);
+    return setTEST(err);
+}
+
+int BaseSerial::resetPins(int *err) {
+    setRST(err);
+    return clrTEST(err);
+}
+
+int BaseSerial::disconnect(int *err) {
+    int r;
+    if(serialWriteFD != -1) {
+        r = resetPins(err);
+        if(r == -1) {
+            cerr << "WARN: BaseSerial::disconnect could not reset pins, " << strerror(*err) << endl;
+        }
+        r = tcsetattr(serialWriteFD, TCSANOW, &oldtermios);
+    }
+    if(serialReadFD != -1) {
+        r = close(serialReadFD);
+        if(r == -1) {
+            *err = errno;
+        }
+        serialReadFD = -1;
+    }
+    if(serialWriteFD != -1) {
+        r = close(serialWriteFD);
+        if(r == -1) {
+            *err = errno;
+        }
+        serialWriteFD = -1;    
+    }
+    return r;
+}
+
+int BaseSerial::reset(int *err) {
+    int r = 0;
+    r = setRST(err);
+    if(r == -1) return -1;
+    r = setTEST(err);
+    if(r == -1) return -1;
+    serial_delay(switchdelay);
+    r = clrRST(err);
+    if(r == -1) return -1;
+    serial_delay(switchdelay);
+    r = setRST(err);
+    if(r == -1) return -1;
+    serial_delay(switchdelay);
+    cout << "Reset device ..." << endl;
+    return clearBuffers(err);
+};
+
+int BaseSerial::invokeBsl(int *err) {
+    int r = 0;
+    r = setRST(err);
+    if(r == -1) return -1;
+    r = setTEST(err);
+    if(r == -1) return -1;
+    serial_delay(switchdelay);
+    r = clrRST(err);
+    if(r == -1) return -1;
+    r = setTEST(err);
+    if(r == -1) return -1;
+    r = clrTEST(err);
+    if(r == -1) return -1;
+    r = setTEST(err);
+    if(r == -1) return -1;
+    r = clrTEST(err);
+    if(r == -1) return -1;
+    r = setRST(err);
+    if(r == -1) return -1;
+    r = setTEST(err);
+    if(r == -1) return -1;
+    serial_delay(switchdelay);
+    cout << "Invoking BSL..." << endl;
+    return clearBuffers(err);
+}
+
+int BaseSerial::readFD(int *err, char *buffer, int count, int maxCount) {
+    int cnt = 0;
+    int retries = 0;
+    timeval tv;
+    tv.tv_sec = 1;
+    tv.tv_usec = 0;
+    while(cnt == 0) {
+        int tmpCnt = read(serialReadFD, buffer, maxCount);
+        *err = errno;
+        if((tmpCnt == 0) || ((tmpCnt < 0) && (errno == EAGAIN))) {
+            FD_SET(serialReadFD, &rfds);
+            if(select(serialReadFD + 1, &rfds, NULL, NULL, &tv) < 0) {
+                *err = errno;
+                return -1;
+            }
+            FD_CLR(serialReadFD, &rfds);
+            if(retries++ >= 2) {
+                cerr << "FATAL: BaseSerial::readFD no data available after 1s" << endl;
+                return -1;
+            }
+        }
+        else if(tmpCnt > 0) {
+            cnt += tmpCnt;
+        }
+        else {
+            return -1;
+        }
+    }
+    return cnt;
+}
+
+int BaseSerial::txrx(int *err, frame_t *txframe, frame_t *rxframe) {
+    int r = 0;
+    char sync = SYNC;
+    uint8_t ack = 0;
+    if((txframe == NULL) || (txframe->L1 < 4) || ((txframe->L1 & 1) != 0) || (rxframe == NULL)) {
+        cerr << "BaseSerial::txrx: precondition not fulfilled, "
+             << " txFrame: " << txframe
+             << " rxFrame: " << rxframe
+             << " txframe->L1: " << (unsigned) txframe->L1
+             << endl;
+        return -1;
+    }
+    for(unsigned i = 0; i < 2; i++) {
+        r = write(serialWriteFD,&sync, 1);
+        if(r == -1) {
+            *err = errno;
+            if(errno != EAGAIN) return -1;
+        }
+        r = readFD(err, (char *)(&ack),1,1);
+        if(r == 1) {
+            if(ack == DATA_ACK) {
+                r = 0;
+                break;
+            }
+            else {
+                cerr << "WARN: BaseSerial::txrx: received " << hex << (unsigned) ack
+                     << " when trying to sync with node." << dec << endl;
+            }
+        }
+        else {
+            if((r == -1) && (errno == EAGAIN)) {
+                // retry to sync
+            }
+            else {
+                cerr << "FATAL: BaseSerial::txrx could not SYNC with node" << endl;
+                return -1;
+            }
+        } 
+    }
+    if(r == -1) {
+        return -1;
+    }
+    r = clearBuffers(err); 
+    if(r == -1) return r;
+    // transmit frame
+    checksum(txframe);    
+    r = write(serialWriteFD, (char *)txframe, txframe->L1 + 6);
+    if(r < txframe->L1 + 6) {
+        *err = errno;
+        return -1;
+    }
+    // receive response
+    int len = 0;
+    rxframe->L1 = 4;
+    r = 0;
+    while(r >= 0) {
+        r = readFD(err, (char *)rxframe, sizeof(frame_t), sizeof(frame_t));
+        if(r == -1) {
+            return -1;
+        }
+        else if(r >= 1) {
+            len += r;
+            if(rxframe->HDR == DATA_ACK) {
+                break;
+            }            
+            else if(rxframe->HDR == DATA_NAK) {
+                cerr << "BaseSerial::txrx frame not valid, command "
+                     << hex << (unsigned) txframe->CMD << dec 
+                     << " not defined or not allowed" << endl;
+                return -1;
+            }
+            else if(rxframe->HDR == SYNC) {
+                if(len >= rxframe->L1 + 6) {
+                    break;
+                }
+            }
+            else {
+                cerr << "FATAL: BaseSerial::txrx: received "
+                     << hex << (unsigned) rxframe->HDR
+                     << " when trying to execute " << hex << (unsigned) txframe->CMD << dec << endl;
+                break;
+            }
+        }
+    }
+    return r;
+}
+
+int BaseSerial::highSpeed(int *err) {
+    int r;
+#if defined(HAVE_LINUX_VERSION_H) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
+    struct serial_struct serinfo;
+    r = ioctl(serialWriteFD, TIOCGSERIAL, &serinfo);
+    if(r == -1) {
+        *err = errno;
+        return -1;
+    }
+    serinfo.custom_divisor = serinfo.baud_base / 38400;
+    if(serinfo.custom_divisor == 0) serinfo.custom_divisor = 1;
+    serinfo.flags &= ~ASYNC_SPD_MASK;
+    serinfo.flags |= ASYNC_SPD_CUST;
+    r = ioctl(serialWriteFD, TIOCSSERIAL, &serinfo);
+#else
+    struct termios my_tios;
+    r = tcgetattr(serialWriteFD, &my_tios);
+    cfsetispeed(&my_tios, B38400); 
+    cfsetospeed(&my_tios, B38400);
+    r = tcsetattr(serialReadFD, TCSANOW, &my_tios);
+    if(r == -1) {
+        *err = errno;
+    }
+    else {
+        r = tcsetattr(serialWriteFD, TCSANOW, &my_tios);
+    }
+#endif    
+    if(r == -1) {
+        *err = errno;
+        return -1;
+    }
+    return r;
+}
+
+int TelosBSerial::reset(int *err) {
+    int r;
+    r = telosI2CWriteCmd(err, 0, 0);
+    if(r == -1) return r;
+    serial_delay(switchdelay);
+    r = telosI2CWriteCmd(err, 0, 3);
+    if(r == -1) return r;
+    r = telosI2CWriteCmd(err, 0, 2);
+    if(r == -1) return r;
+    r = telosI2CWriteCmd(err, 0, 0);
+    if(r == -1) return r;
+    r = telosI2CWriteCmd(err, 0, 0);
+    if(r == -1) return r;
+    serial_delay(switchdelay);
+    cout << "Reset device ..." << endl;
+    return clearBuffers(err);
+}
+
+int TelosBSerial::invokeBsl(int *err) {
+    int r;
+    r = telosI2CWriteCmd(err, 0, 0);
+    if(r == -1) return r;
+    serial_delay(switchdelay);
+    r = telosI2CWriteCmd(err, 0, 1);
+    if(r == -1) return r;
+    r = telosI2CWriteCmd(err, 0, 3);
+    if(r == -1) return r;
+    r = telosI2CWriteCmd(err, 0, 1);
+    if(r == -1) return r;
+    r = telosI2CWriteCmd(err, 0, 3);
+    if(r == -1) return r;
+    r = telosI2CWriteCmd(err, 0, 2);
+    if(r == -1) return r;
+    r = telosI2CWriteCmd(err, 0, 0);
+    if(r == -1) return r;
+    r = telosI2CWriteCmd(err, 0, 0);
+    if(r == -1) return r;
+    serial_delay(switchdelay);
+    cout << "Invoking BSL..." << endl;
+    return clearBuffers(err);
+}
+
+int TelosBSerial::telosI2CStart(int *err) {
+    int r;
+    r = telosSetSDA(err);
+    if(r == -1) return -1;
+    r = telosSetSCL(err);
+    if(r == -1) return -1;
+    r = telosClrSDA(err);
+    return r;
+}
+
+int TelosBSerial::telosI2CStop(int *err) {
+    int r;
+    r = telosClrSDA(err);
+    if(r == -1) return r;
+    r = telosSetSCL(err);
+    if(r == -1) return r;
+    r = telosSetSDA(err);
+    return r;
+}
+
+int TelosBSerial::telosI2CWriteBit(int *err, bool bit) {
+    int r = telosClrSCL(err);
+    if(r == -1) return r;
+    if(bit) {
+        r = telosSetSDA(err);
+        if(r == -1) return r;
+    } else {
+        r = telosClrSDA(err);
+        if(r == -1) return r;
+    }
+    r = telosSetSCL(err);
+    if(r == -1) return r;
+    r = telosClrSCL(err);
+    return r;
+}
+
+int TelosBSerial::telosI2CWriteByte(int *err, uint8_t byte) {
+    int r;
+    r = telosI2CWriteBit(err,  byte & 0x80 );
+    if(r == -1) return r;
+    r = telosI2CWriteBit(err,  byte & 0x40 );
+    if(r == -1) return r;
+    r = telosI2CWriteBit(err,  byte & 0x20 );
+    if(r == -1) return r;
+    r = telosI2CWriteBit(err,  byte & 0x10 );
+    if(r == -1) return r;
+    r = telosI2CWriteBit(err,  byte & 0x08 );
+    if(r == -1) return r;
+    r = telosI2CWriteBit(err,  byte & 0x04 );
+    if(r == -1) return r;
+    r = telosI2CWriteBit(err,  byte & 0x02 );
+    if(r == -1) return r;
+    r = telosI2CWriteBit(err,  byte & 0x01 );
+    if(r == -1) return r;
+    return telosI2CWriteBit(err,  0 );
+}
+
+int TelosBSerial::telosI2CWriteCmd(int *err, uint8_t addr, uint8_t cmdbyte) {
+    int r;
+    r = telosI2CStart(err);
+    if(r == -1) return r;
+    r = telosI2CWriteByte(err,  0x90 | (addr << 1) );
+    if(r == -1) return r;
+    r = telosI2CWriteByte(err,  cmdbyte );
+    if(r == -1) return r;
+    r = telosI2CStop(err);
+    if(r == -1) return r;
+    return clearBuffers(err);
+}
+
+int TelosBSerial::setPins(int *err) {
+    return 0;
+}
+
+int TelosBSerial::resetPins(int *err) {
+    return 0;
+}
diff --git a/tools/platforms/msp430/cppbsl/src/Serial.h b/tools/platforms/msp430/cppbsl/src/Serial.h
new file mode 100644
index 00000000..feca96c2
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/src/Serial.h
@@ -0,0 +1,264 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * hand rolled bsl tool, other ones are too slow
+ * @author Andreas Koepke <koepke at tkn.tu-berlin.de>
+ * @date 2007-04-16
+ */
+#ifndef BSL_SERIAL_H
+#define BSL_SERIAL_H
+
+#include <string>
+#include <inttypes.h>
+#include <fcntl.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <sys/time.h>
+#include <sys/types.h>
+#include <termios.h>
+#include <unistd.h>
+#include <iostream>
+#include <errno.h>
+#include <linux/serial.h>
+#include "Parameters.h"
+
+inline void serial_delay(unsigned usec) {
+    struct timeval tv;
+    tv.tv_sec = usec/1000000;
+    tv.tv_usec = usec%1000000;
+    select(0,NULL,NULL,NULL, &tv);
+};
+
+struct frame_t {
+    uint8_t HDR;
+    uint8_t CMD;
+    uint8_t L1;
+    uint8_t L2;
+    uint8_t AL;
+    uint8_t AH;
+    uint8_t LL;
+    uint8_t LH;
+    uint8_t data[252];
+} __attribute__ ((packed));
+
+/**
+ * Connect with serial device (dev), returns the opened file descriptors in *
+ * readFD and writeFD. Returns on error with something != 0 and errno is *
+ * hopefully set correctly.
+*/
+int serial_connect(int* err, const char* dev, int* readFD, int* writeFD, termios* pt);
+
+class BaseSerial {
+protected:
+    const int switchdelay;
+    termios oldtermios;
+    
+protected:
+    int serialReadFD;
+    int serialWriteFD;
+    bool invertTest;
+    bool invertReset;
+    bool swapRstTest;
+    
+    fd_set rfds;
+    
+    enum {
+	CMD_FAILED = 0x70,
+	SYNC = 0x80,
+	DATA_ACK = 0x90,
+	DATA_NAK = 0xA0,
+    };
+    
+ protected:    
+    inline int setDTR(int *err) {
+        int i = TIOCM_DTR;
+        int r = ioctl(serialWriteFD, TIOCMBIS, &i);
+        if(r == -1) {
+            *err = errno;
+            std::cerr << "ERROR: BaseSerial::setDTR could not set DTR pin" << std::endl;
+        }
+        return r;
+    }
+    inline int clrDTR(int *err) {
+        int i = TIOCM_DTR;
+        int r = ioctl(serialWriteFD, TIOCMBIC, &i);
+        if(r == -1) {
+            *err = errno;
+            std::cerr << "ERROR: BaseSerial::clrDTR could not clr DTR pin" << std::endl;
+        }
+        return r;
+    }
+    inline int setRTS(int *err) {
+        int i = TIOCM_RTS;
+        int r = ioctl(serialWriteFD, TIOCMBIS, &i);
+        if(r == -1) {
+            *err = errno;
+            std::cerr << "ERROR: BaseSerial::setRTS could not set RTS pin" << std::endl;
+        }
+        return r;
+    }
+    inline int clrRTS(int *err) {
+        int i = TIOCM_RTS;
+        int r = ioctl(serialWriteFD, TIOCMBIC, &i);
+        if(r == -1) {
+            *err = errno;
+            std::cerr << "ERROR: BaseSerial::clrRTS could not clr RTS pin" << std::endl;
+        }
+        return r;
+    }
+    
+    int setTEST(int *err) {
+        int r;
+        if(invertTest) { r = clrRTS(err); } else { r = setRTS(err); }
+        return r;
+    }
+
+    int clrTEST(int *err) {
+        int r;
+        if(invertTest) { r = setRTS(err); } else { r = clrRTS(err); }
+        return r;
+    }
+
+    int setRST(int *err) {
+        int r;
+        if(invertReset) { r = clrDTR(err); } else { r = setDTR(err); }
+        return r;
+    }
+
+    int clrRST(int *err) {
+        int r;
+        if(invertReset) { r= setDTR(err); } else { r = clrDTR(err); }
+        return r;
+    }
+
+    inline void checksum(frame_t *frame) {
+        uint8_t i;
+        uint8_t frameLen = frame->L1/2 + 2;
+        uint16_t *dat = (uint16_t *)frame;
+        uint16_t check = 0;
+        for(i = 0; i < frameLen; i++) {
+            check ^= dat[i];
+        }
+        dat[i] = ~check;
+    }
+    
+    int readFD(int *err, char *buffer, int count, int maxCount);
+    virtual int setPins(int *err);
+    virtual int resetPins(int *err);
+    
+public:
+    BaseSerial(const termios& term, int rFD, int wFD, bool T=false, bool R=false) :
+        switchdelay(30000),
+        oldtermios(term),
+        serialReadFD(rFD), serialWriteFD(wFD),
+        invertTest(T), invertReset(R) {
+        int err;
+        FD_ZERO(&rfds);
+        setPins(&err);
+    }
+    
+    virtual ~BaseSerial() {
+        int r;
+        int err;
+        if((serialReadFD != -1) || (serialWriteFD != -1))  {
+            r = disconnect(&err);
+        }
+    }
+    
+    // communicate
+    inline int clearBuffers(int *err) {
+        int r = tcflush(serialReadFD, TCIOFLUSH);
+        if(r != 0) {
+            *err = errno;
+        }
+        else {
+            r = tcflush(serialWriteFD, TCIOFLUSH);
+            if(r != 0) {
+                *err = errno;
+            }
+        }
+        return r;
+    };
+    
+    int txrx(int *err, frame_t *txframe, frame_t *rxframe);
+    
+    // handle connection
+    int disconnect(int *err);
+
+    // change connection speed
+    int highSpeed(int *err);
+
+    // do initial magic on serial interface
+    virtual int reset(int *err);
+    virtual int invokeBsl(int *err);
+
+};
+
+class TelosBSerial : public BaseSerial {    
+protected:
+    virtual int resetPins(int *err);
+    virtual int setPins(int *err);
+        
+    int telosSetSCL(int *err) {
+        return clrRTS(err);
+    }
+    
+    int telosClrSCL(int *err) {
+        return setRTS(err);
+    }
+    
+    int telosSetSDA(int *err) {
+        return clrDTR(err);
+    }
+
+    int telosClrSDA(int *err) {
+        return setDTR(err);
+    }
+
+    int telosI2CStart(int *err);
+    int telosI2CStop(int *err);
+    int telosI2CWriteBit(int *err, bool bit);
+    int telosI2CWriteByte(int* err, uint8_t byte);
+    int telosI2CWriteCmd(int*err, uint8_t addr, uint8_t cmdbyte);
+    
+public:    
+    TelosBSerial(const termios& term, int rFD, int wFD, bool T=false, bool R=false) :
+        BaseSerial(term, rFD, wFD, T, R) {
+    }
+    
+    virtual ~TelosBSerial() {
+    }
+    
+    virtual int reset(int *err);
+    virtual int invokeBsl(int *err);    
+
+
+};
+
+#endif
diff --git a/tools/platforms/msp430/cppbsl/src/cppbsl.cc b/tools/platforms/msp430/cppbsl/src/cppbsl.cc
new file mode 100644
index 00000000..35347828
--- /dev/null
+++ b/tools/platforms/msp430/cppbsl/src/cppbsl.cc
@@ -0,0 +1,108 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * hand rolled bsl tool, other ones are too slow
+ * @author Andreas Koepke <koepke at tkn.tu-berlin.de>
+ * @date 2007-04-16
+ */
+
+#include <fstream>
+#include <iostream>
+#include "Parameters.h"
+#include "Serial.h"
+#include "Bsl.h"
+
+using namespace std;
+
+Parameters *parameters;
+
+void errMsg(int r, int err, const char *msg) {
+    cerr << msg;
+    if(err) {
+        cerr << ", system error: " << strerror(err);
+    } else {
+        cerr << ", internal error";
+    }
+    cerr << "." << endl;
+}
+
+int main(int argc, char *argv[]) {
+    int r, readFD, writeFD, err;
+    termios oldterm;
+    parameters = new Parameters(argc, argv);
+    BaseSerial *bs;
+    Bsl *bsl;
+    err = 0;
+    r = serial_connect(&err, parameters->dev.c_str(), &readFD, &writeFD, &oldterm);
+    if(r == -1) {
+        errMsg(r, err, "Could not connect to serial device");
+        delete parameters;
+        return -1;
+    }
+    if(parameters->telosb) {
+        bs = new TelosBSerial(oldterm, readFD, writeFD);
+    }
+    else {
+        bs = new BaseSerial(oldterm, readFD, writeFD, parameters->invertTest, parameters->invertReset);
+    }
+    bsl = new Bsl(bs, parameters->img.c_str(), parameters->chunksize);
+    switch(parameters->action) {
+        case Parameters::ERASE:
+            r = bsl->erase(&err);
+            if(r == -1) {
+                errMsg(r, err, "Could not erase node");
+            }
+            else {
+                r = bsl->reset(&err);
+                if(r == -1) {
+                    errMsg(r, err, "Could not reset node");
+                }    
+            }
+            break;
+        case Parameters::RESET:
+            r = bsl->reset(&err);
+            if(r == -1) {
+                errMsg(r, err, "Could not reset node");
+            }
+            break;
+        case Parameters::FLASH:
+            r = bsl->install(&err);
+            if(r == -1) {
+                errMsg(r, err, "Could not install image on node");
+            }
+            break;
+        default:
+            break;
+    }
+    delete bsl;
+    bs->disconnect(&err);
+    delete bs;
+    delete parameters;
+    return (r != 0);
+}
diff --git a/tools/platforms/msp430/motelist/.cvsignore b/tools/platforms/msp430/motelist/.cvsignore
new file mode 100644
index 00000000..1be91fbf
--- /dev/null
+++ b/tools/platforms/msp430/motelist/.cvsignore
@@ -0,0 +1,3 @@
+Makefile
+Makefile.in
+motelist
diff --git a/tools/platforms/msp430/motelist/Makefile.am b/tools/platforms/msp430/motelist/Makefile.am
new file mode 100644
index 00000000..f0b5e9d9
--- /dev/null
+++ b/tools/platforms/msp430/motelist/Makefile.am
@@ -0,0 +1,16 @@
+bin_SCRIPTS = motelist
+
+dist_man_MANS = motelist.1
+
+if CYGWIN
+motelist: motelist-win32.cpp
+	g++ -O3 -Wall -o motelist motelist-win32.cpp
+else !CYGWIN
+if DARWIN
+motelist: motelist-macos
+	cp motelist-macos motelist
+else !DARWIN
+motelist: motelist-linux
+	cp motelist-linux motelist
+endif
+endif
diff --git a/tools/platforms/msp430/motelist/motelist-linux b/tools/platforms/msp430/motelist/motelist-linux
new file mode 100755
index 00000000..a3fc8793
--- /dev/null
+++ b/tools/platforms/msp430/motelist/motelist-linux
@@ -0,0 +1,275 @@
+#!/usr/bin/perl -w
+use strict;
+# $Id: motelist-linux,v 1.4 2006-12-12 18:23:01 vlahan Exp $
+# @author Cory Sharp <cory@moteiv.com>
+# @author Joe Polastre
+
+my $help = <<'EOF';
+usage: motelist [options]
+
+  $Revision: 1.4 $
+
+options:
+  -h  display this help
+  -c  compact format, not pretty but easier for parsing
+  -f  specify the usb-serial file (for smote.cs)
+  -k  kernel version: 2.4, 2.6, auto (default)
+  -m  method to scan usb: procfs, sysfs, auto (default)
+  -dev_prefix  force the device prefix for the serial device
+  -usb  display extra usb information
+EOF
+
+my %Opt = (
+  compact => 0,
+  usb => 0,
+  method => "auto",
+  kernel => "auto",
+  dev_prefix => [ "/dev/usb/tts/", "/dev/ttyUSB", "/dev/tts/USB" ],
+  usbserial => "sudo cat /proc/tty/driver/usbserial |",
+);
+
+while (@ARGV) {
+  last unless $ARGV[0] =~ /^-/;
+  my $opt = shift @ARGV;
+  if( $opt eq "-h" ) { print "$help\n"; exit 0; }
+  elsif( $opt eq "-c" ) { $Opt{compact} = 1; }
+  elsif( $opt eq "-f" ) { $Opt{usbserial} = shift @ARGV; }
+  elsif( $opt eq "-k" ) { $Opt{kernel} = shift @ARGV; }
+  elsif( $opt eq "-m" ) { $Opt{method} = shift @ARGV; }
+  elsif( $opt eq "-dev_prefix" ) { $Opt{dev_prefix} = shift @ARGV; }
+  elsif( $opt eq "-usb" ) { $Opt{usb} = 1; }
+  else { print STDERR "$help\nerror, unknown command line option $opt\n"; exit 1; }
+}
+
+if( $Opt{kernel} eq "auto" ) {
+  $Opt{kernel} = "unknown";
+  $Opt{kernel} = $1 if snarf("/proc/version") =~ /\bLinux version (\d+\.\d+)/;
+}
+
+if( $Opt{method} eq "auto" ) {
+  $Opt{method} = ($Opt{kernel} eq "2.4") ? "procfs" : "sysfs";
+}
+
+my @devs = $Opt{method} eq "procfs" ? scan_procfs() : scan_sysfs();
+print_motelist( sort { cmp_usbdev($a,$b) } @devs );
+
+
+#
+#  SysFS
+#
+sub scan_sysfs {
+
+  #  Scan /sys/bus/usb/drivers/usb for FTDI devices
+  my @ftdidevs =
+    grep { ($_->{UsbVendor}||"") eq "0403" && ($_->{UsbProduct}||"") eq "6001" }
+    map { {
+      SysPath => $_,
+      UsbVendor => snarf("$_/idVendor",1),
+      UsbProduct => snarf("$_/idProduct",1),
+    } }
+    glob("/sys/bus/usb/drivers/usb/*");
+
+  #  Gather information about each FTDI device
+  for my $f (@ftdidevs) {
+    my $syspath = $f->{SysPath};
+
+    $f->{InfoManufacturer} = snarf("$syspath/manufacturer",1);
+    $f->{InfoProduct} = snarf("$syspath/product",1);
+    $f->{InfoSerial} = snarf("$syspath/serial",1);
+    $f->{UsbDevNum} = snarf("$syspath/devnum",1);
+
+    my $devstr = readlink($syspath);
+    if( $devstr =~ m{([^/]+)/usb(\d+)/.*-([^/]+)$} ) {
+      $f->{UsbPath} = "usb-$1-$3";
+      $f->{UsbBusNum} = $2;
+    }
+    ($f->{SysDev} = $syspath) =~ s{^.*/}{};
+
+    my $port = "$syspath/$f->{SysDev}:1.0";
+    ($f->{DriverName} = readlink("$port/driver")) =~ s{^.*/}{} if -l "$port/driver";
+    ($f->{SerialDevName} = (glob("$port/tty*"),undef)[0]) =~ s{^.*/}{};
+    $f->{SerialDevNum} = $1 if $f->{SerialDevName} =~ /(\d+)/;
+    $f->{SerialDevName} = getSerialDevName( $f->{SerialDevNum} ) || "  (none)";
+  }
+
+  return @ftdidevs;
+}
+
+
+#
+#  Scan Procfs
+#
+sub scan_procfs {
+
+  my $text_devs = snarf("< /proc/bus/usb/devices");
+  my $text_serial = snarf($Opt{usbserial});
+
+  my @usbdevs = map { {parse_usb_devices_text($_)} }
+                grep { !/^\s*$/ } split /\n+(?=T:)/, $text_devs;
+  my %usbtree = build_usb_tree( @usbdevs );
+  my %usbserialtree = build_usbserial_tree( $text_serial );
+  for my $tts ( values %usbserialtree ) {
+    $usbtree{usbkey($tts->{path})}{usbserial} = $tts if defined $tts->{path};
+  }
+
+  my @ftdidevs = map { {
+      UsbVendor => $_->{Vendor},
+      UsbProduct => $_->{ProdID},
+      InfoManufacturer => $_->{Manufacturer},
+      InfoProduct => $_->{Product},
+      InfoSerial => $_->{SerialNumber},
+      UsbBusNum => $_->{nbus},
+      UsbDevNum => $_->{ndev},
+      UsbPath => (($Opt{kernel} eq "2.4") ? $_->{usbserial}{path} : $_->{usbpath}),
+      DriverName => $_->{driver},
+      SerialDevNum => $_->{usbserial}{tts},
+      SerialDevName => getSerialDevName($_->{usbserial}{tts}) || "  (none)",
+    } }
+    grep { ($_->{Vendor}||"") eq "0403" && ($_->{ProdID}||"") eq "6001" }
+    values %usbtree;
+
+  return @ftdidevs;
+}
+
+sub build_usb_tree {
+  my @devs = @_;
+  my %tree = ();
+  for my $dev (sort { $a->{Lev} <=> $b->{Lev} } @devs) {
+    my ($bus,$lev,$prnt) = ( $dev->{Bus}+0, $dev->{Lev}+0, $dev->{Prnt}+0 );
+    my $devnum = $dev->{"Dev#"}+0;
+    $dev->{nbus} = $bus;
+    $dev->{ndev} = $devnum;
+    $tree{"bus$bus"} = {} unless exists $tree{"bus$bus"};
+    $tree{"bus$bus"}{"dev$devnum"} = $dev;
+    if( $lev == 0 ) {
+      $dev->{usbpath} = "usb-$dev->{SerialNumber}";
+    } else {
+      my $sep = ($lev==1) ? "-" : ".";
+      $dev->{parent} = $tree{"bus$bus"}{"dev$prnt"};
+      $dev->{usbpath} = $dev->{parent}{usbpath} . $sep . ($dev->{Port}+1);
+    }
+    $tree{usbkey($dev->{usbpath})} = $dev;
+  }
+  return %tree;
+}
+
+sub parse_usb_devices_text {
+  my $text = shift;
+  $text =~ s/^\S+\s*//gm;
+  return ($text =~ m/([^\s=]+)=\s*(.*?\S)\s*(?=[^\s=]+=|$)/mg);
+}
+
+sub build_usbserial_tree {
+  my $text = shift;
+  my %tree = ();
+  while( $text =~ /^([^:]+):(.*)/mg ) {
+    my ($tts,$params) = ($1,$2);
+    $tree{$tts} = { tts => $tts };
+    while ($params =~ m/\s+([^:]+):(?:"([^"]*)"|(\S+))/g) {
+      $tree{$tts}{$1} = $2||$3;
+    }
+  }
+  return %tree;
+}
+
+sub usbkey {
+  if( $Opt{kernel} eq "2.4" ) {
+    (my $key = $_[0]) =~ s/^.*-//;
+    return $key;
+  }
+  return $_[0];
+}
+
+
+#
+#  getSerialDevName
+#
+#  For each device, force to use dev_prefix if it's not an array.  Otherwise,
+#  assume it's a list of candidate prefixes.  Check them and commit to the
+#  first one that actually exists.
+#
+sub getSerialDevName {
+  my $devnum = shift;
+  my $devname = undef;
+  if( defined $devnum ) {
+    if( ref($Opt{dev_prefix}) eq "ARRAY" ) {
+      $devname = $devnum;
+      for my $prefix (@{$Opt{dev_prefix}}) {
+        my $file = $prefix . $devnum;
+        if( -e $file ) { $devname = $file; last; }
+      }
+    } else {
+      $devname = $Opt{dev_prefix} . $devnum;
+    }
+  }
+  return $devname;
+}
+
+
+#
+#  Print motelist
+#
+sub print_motelist {
+  my @devs = @_;
+
+  #  If none were found, quit
+  if( @devs == 0 ) {
+    print "No devices found.\n";
+    return;
+  }
+
+  #  Print a header
+  if( !$Opt{compact} ) {
+    if( $Opt{usb} ) {
+      print << "EOF" unless $Opt{compact};
+Bus Dev USB Path                 Reference  Device           Description
+--- --- ------------------------ ---------- ---------------- -------------------------------------
+EOF
+    } else {
+      print << "EOF" unless $Opt{compact};
+Reference  Device           Description
+---------- ---------------- ---------------------------------------------
+EOF
+    }
+  }
+
+  #  Print the usb information
+  for my $dev (sort { cmp_usbdev($a,$b) } @devs) {
+    my $desc = join( " ", $dev->{InfoManufacturer}||"", $dev->{InfoProduct}||"" ) || " (none)";
+    my @output = ( $dev->{InfoSerial}||" (none)", $dev->{SerialDevName}, $desc );
+    @output = ( $dev->{UsbBusNum}, $dev->{UsbDevNum}, $dev->{UsbPath}, @output ) if $Opt{usb};
+    if( $Opt{compact} ) {
+      print join(",",@output) . "\n";
+    } else {
+      printf( ($Opt{usb}?"%3d %3d %-24s ":"")."%-10s %-16s %s\n", @output );
+    }
+  }
+}
+
+
+#
+#  Cmp Usbdev's
+#
+sub cmp_usbdev {
+  my ($a,$b) = @_;
+  if( defined $a->{SerialDevNum} ) {
+    if( defined $b->{SerialDevNum} ) {
+      return $a->{SerialDevNum} <=> $b->{SerialDevNum};
+    }
+    return -1;
+  }
+  return 1 if defined $b->{SerialDevNum};
+  return ($a->{InfoSerial}||"") cmp ($b->{InfoSerial}||"");
+}
+
+#
+#  Read a file in
+#
+sub snarf {
+  open my $fh, $_[0] or return undef;
+  my $text = do{local $/;<$fh>};
+  close $fh;
+  $text =~ s/\s+$// if $_[1];
+  return $text;
+}
+
diff --git a/tools/platforms/msp430/motelist/motelist-macos b/tools/platforms/msp430/motelist/motelist-macos
new file mode 100644
index 00000000..ee5618b1
--- /dev/null
+++ b/tools/platforms/msp430/motelist/motelist-macos
@@ -0,0 +1,75 @@
+#!/usr/bin/perl -w
+use strict;
+
+my $help = <<'EOF';
+usage: motelist [options]
+
+options:
+  -h  display this help
+  -c  compact format, not pretty but easier for parsing
+EOF
+
+my %Opt = (
+  compact => 0,
+  dev_prefix => [ "/dev/tty.usbserial-" ],
+);
+
+while (@ARGV) {
+  last unless $ARGV[0] =~ /^-/;
+  my $opt = shift @ARGV;
+  if( $opt eq "-h" ) { print "$help\n"; exit 0; }
+  elsif( $opt eq "-c" ) { $Opt{compact} = 1; }
+  else { print STDERR "$help\nerror, unknown command line option $opt\n"; exit 1; }
+}
+
+print_motelist( scan_dev() );
+
+#
+#  Scan /dev for tty.usbserial-*
+#
+sub  scan_dev {
+  my @devs;
+  foreach (`ls /dev/tty.usbserial-* 2>&1`) {
+    my($dev, $serial) = /(\/dev\/tty.usbserial-(\S+))/;
+    if ($serial ne "*:") {
+      my $d;
+      $d->{"InfoSerial"} = $serial;
+      $d->{"SerialDevName"} = $dev;
+      push(@devs, $d);
+    }
+  }
+  return @devs;
+}
+
+
+#
+#  Print motelist
+#
+sub print_motelist {
+  my @devs = @_;
+
+  #  If none were found, quit
+  if( @devs == 0 ) {
+    print "No devices found.\n";
+    return;
+  }
+
+  #  Print a header
+  if( !$Opt{compact} ) {
+    print << "EOF" unless $Opt{compact};
+Reference  Device                      Description
+---------- --------------------------- ---------------------------------------
+EOF
+  }
+
+  #  Print the usb information
+  for my $dev (@devs) {
+    my $desc = "(none)";
+    my @output = ( $dev->{"InfoSerial"}, $dev->{"SerialDevName"}, $desc );
+    if( $Opt{compact} ) {
+      print join(",",@output) . "\n";
+    } else {
+      printf( "%-10s %-27s %s\n", @output );
+    }
+  }
+}
diff --git a/tools/platforms/msp430/motelist/motelist-win32.cpp b/tools/platforms/msp430/motelist/motelist-win32.cpp
new file mode 100644
index 00000000..3f680a77
--- /dev/null
+++ b/tools/platforms/msp430/motelist/motelist-win32.cpp
@@ -0,0 +1,479 @@
+// $Id: motelist-win32.cpp,v 1.5 2010-06-29 22:07:42 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+#include <iostream>
+#include <string>
+#include <vector>
+#include <stdexcept>
+#include <list>
+
+#include <windows.h>
+
+namespace TelosList
+{
+using std::cout;
+using std::endl;
+
+typedef std::string String;
+typedef const String& StringRef;
+typedef std::vector<String> VecString;
+
+struct RegValue
+{
+  typedef long long int_type;
+  String name;
+  String data;
+  int_type data_int;
+  int data_type;
+
+  RegValue()
+    : data_int(0), data_type(0)
+  {
+  }
+
+  RegValue( StringRef _name, StringRef _data, int _type )
+    : name(_name), data(_data), data_int(atoi(data.c_str())), data_type(_type)
+  {
+  }
+
+  RegValue( StringRef _name, int_type _data, int _type )
+    : name(_name), data(), data_int(_data), data_type(_type)
+  {
+    char buf[16];
+    int nbuf = sprintf( buf, "%lld", data_int );
+    data = String( buf, buf+nbuf );
+  }
+
+  RegValue( StringRef _name, const char* _data, DWORD _dlen, int _type )
+    : name(_name), data_type(_type)
+  {
+    char buf[256];
+    int nbuf = 0;
+
+    switch( data_type )
+    {
+      case REG_BINARY:
+      case REG_EXPAND_SZ:
+      case REG_MULTI_SZ:
+      case REG_SZ:
+	data = String( _data, _dlen );
+	data_int = atoi( _data );
+	break;
+
+      case REG_NONE:
+	break;
+
+      case REG_DWORD:
+	data_int = *(DWORD*)_data;
+	nbuf = sprintf( buf, "%d", *(DWORD*)_data );
+	data = String( buf, buf+nbuf );
+	break;
+
+      case REG_QWORD:
+	data_int = *(long long*)_data;
+	nbuf = sprintf( buf, "%lld", *(long long*)_data );
+	data = String( buf, buf+nbuf );
+	break;
+
+      default:
+	throw std::runtime_error( "unsupported data type in " + name );
+    }
+  }
+};
+
+
+class RegKey;
+typedef std::vector<RegKey> VecRegKey;
+typedef std::vector<RegValue> VecRegValue;
+
+
+class RegKey
+{
+  HKEY m_hkey;
+  String m_name;
+
+  void openKey( HKEY hkey, StringRef subkey )
+  {
+    LONG result = RegOpenKeyEx( hkey, subkey.c_str(), 0, (KEY_READ&~KEY_NOTIFY), &m_hkey );
+    if( result != ERROR_SUCCESS )
+      throw std::runtime_error( "could not open key " + m_name );
+  }
+
+  void prefixName( HKEY root )
+  {
+    if( root == HKEY_LOCAL_MACHINE )
+      m_name = "HKLM\\" + m_name;
+  }
+
+public:
+
+  ~RegKey()
+  {
+    RegCloseKey(m_hkey);
+    m_hkey = (HKEY)INVALID_HANDLE_VALUE;
+  }
+
+  RegKey( HKEY hkey, StringRef subkey )
+    : m_hkey((HKEY)INVALID_HANDLE_VALUE), m_name(subkey)
+  {
+    prefixName( hkey );
+    openKey( hkey, subkey );
+  }
+
+  RegKey( const RegKey& key, StringRef subkey )
+    : m_hkey((HKEY)INVALID_HANDLE_VALUE), m_name(key.m_name+"\\"+subkey)
+  {
+    openKey( key.m_hkey, subkey );
+  }
+
+  RegKey getSubkey( StringRef subkey ) const
+  {
+    return RegKey( m_hkey, subkey );
+  }
+
+  RegKey operator[]( StringRef subkey ) const
+  {
+    return getSubkey( subkey );
+  }
+
+  RegValue operator()( StringRef value ) const
+  {
+    return getValue( value );
+  }
+
+  RegValue getValue( StringRef value ) const;
+
+  VecString getSubkeyNames() const;
+  VecRegValue getValues() const;
+};
+
+
+VecString RegKey::getSubkeyNames() const
+{
+  VecString v;
+  DWORD i = 0;
+
+  while(true)
+  {
+    DWORD len = 4096;
+    char name[len];
+    LONG result = RegEnumKeyEx( m_hkey, i++, name, &len, NULL, NULL, NULL, NULL );
+
+    if( result == ERROR_NO_MORE_ITEMS )
+      break;
+
+    if( result != ERROR_SUCCESS )
+      throw std::runtime_error( "error iterating keys in " + m_name );
+
+    v.push_back( String(name, name+len) );
+  }
+
+  return v;
+}
+
+
+RegValue RegKey::getValue( StringRef value ) const
+{
+  DWORD dtype = 0;
+  DWORD dlen = 4096;
+  char data[dlen];
+  LONG result = RegQueryValueEx( m_hkey, value.c_str(), NULL, &dtype, (BYTE*)data, &dlen );
+
+  if( result != ERROR_SUCCESS )
+    throw std::runtime_error( "error iterating values in " + m_name );
+
+  return RegValue( value, data, dlen, dtype );
+}
+
+
+VecRegValue RegKey::getValues() const
+{
+  VecRegValue v;
+  DWORD i = 0;
+
+  while(true)
+  {
+    DWORD nlen = 4096;
+    DWORD dlen = 4096;
+    char name[nlen];
+    char data[dlen];
+    DWORD dtype = 0;
+    LONG result = RegEnumValue( m_hkey, i++, name, &nlen, NULL, &dtype, (BYTE*)data, &dlen );
+    dtype = REG_NONE;
+    dlen = 0;
+
+    if( result == ERROR_NO_MORE_ITEMS )
+      break;
+
+    if( result != ERROR_SUCCESS )
+      throw std::runtime_error( "error iterating values in " + m_name );
+
+    v.push_back( RegValue( String(name,name+nlen), data, dlen, dtype ) );
+  }
+
+  return v;
+}
+
+
+struct Device
+{
+  String id;
+  String comm;
+  String info;
+  int sortnum;
+  int refcount;
+
+  Device(): sortnum(0), refcount(0) { }
+
+  bool operator<( const Device& a ) const
+  {
+    if( sortnum < a.sortnum )
+      return true;
+    
+    if( sortnum == a.sortnum )
+      return (id < a.id);
+
+    return false;
+  }
+};
+
+typedef std::list<Device> ListDevice;
+
+String join( StringRef sep, const VecString& vs )
+{
+  String j;
+  VecString::const_iterator i = vs.begin();
+  if( i != vs.end() ) j = *i++;
+  while( i != vs.end() ) j += sep + *i++;
+  return j;
+}
+
+String join( StringRef sep, const VecRegValue& vrv )
+{
+  String j;
+  VecRegValue::const_iterator i = vrv.begin();
+  if( i != vrv.end() ) { j = i->name+"="+i->data; i++; }
+  while( i != vrv.end() ) { j = i->name+"="+i->data; i++; }
+  return j;
+}
+
+VecString split( const char* chars, StringRef str )
+{
+  VecString vs;
+
+  String::size_type n0 = 0;
+  String::size_type n1 = str.find_first_of( chars, 0 );
+  vs.push_back( str.substr( n0, n1 ) );
+
+  while( n1 != String::npos )
+  {
+    n0 = n1+1;
+    n1 = str.find_first_of( chars, n0 );
+    if( n1 != String::npos ) vs.push_back( str.substr( n0, n1-n0 ) );
+    else vs.push_back( str.substr( n0 ) );
+  }
+
+  return vs;
+}
+
+int getRefCount( const RegKey& dclass, const RegKey& key )
+{
+  int refcnt = 0;
+
+  try
+  {
+    String symstr = key["Device Parameters"]("SymbolicName").data;
+    VecString sym = split( "\\#", symstr );
+
+    if( sym.size() >= 4 )
+    {
+      sym.erase( sym.begin(), sym.begin()+sym.size()-4 );
+      String devstr = sym[3] +"\\##?#" + join("#",sym) + "\\Control";
+      RegKey ctrl = dclass[devstr];
+      refcnt = strtol( ctrl("ReferenceCount").data.c_str(), NULL, 0 );
+    }
+  }
+  catch( std::runtime_error e ) { }
+
+  return refcnt;
+}
+
+ListDevice getDevices()
+{
+  ListDevice devs;
+
+  String ccs = "SYSTEM\\CurrentControlSet\\";
+  RegKey dclass( HKEY_LOCAL_MACHINE, ccs+"Control\\DeviceClasses" );
+  RegKey ftdibus( HKEY_LOCAL_MACHINE, ccs+"Enum\\FTDIBUS" );
+  RegKey usb6001( HKEY_LOCAL_MACHINE, ccs+"Enum\\USB\\Vid_0403&Pid_6001" );
+
+  VecString fdev = ftdibus.getSubkeyNames();
+  for( VecString::const_iterator i=fdev.begin(); i!=fdev.end(); i++ )
+  {
+    if( i->substr(0,18) == String("VID_0403+PID_6001+") )
+    {
+      Device d;
+      d.id = i->substr(18,8);
+
+      try
+      {
+	RegKey devkey = ftdibus[*i];
+	VecString devsub = devkey.getSubkeyNames();
+	d.comm = devkey[devsub[0]+"\\Device Parameters"]("PortName").data;
+      }
+      catch( std::runtime_error e )
+      {
+	d.comm = "no_comm";
+      }
+
+      try { d.info = usb6001[d.id]("LocationInformation").data; }
+      catch( std::runtime_error e ) { }
+
+      try { d.refcount = getRefCount( dclass, usb6001[d.id] ); }
+      catch( std::runtime_error e ) { }
+
+      String::size_type ncomm = d.comm.find_first_of("0123456789");
+      if( ncomm != String::npos )
+	d.sortnum = atoi( d.comm.substr(ncomm).c_str() );
+
+      devs.push_back(d);
+    }
+  }
+
+  return devs;
+}
+
+
+void prettyPrintDevices( const ListDevice& devs )
+{
+  const char* fmt = "%-10s %-10s %s\n";
+  printf( fmt, "Reference", "CommPort", "Description" );
+  printf( "---------- ---------- ----------------------------------------\n" );
+
+  for( ListDevice::const_iterator i=devs.begin(); i!=devs.end(); i++ )
+  {
+    String comm = i->comm;
+    if( i->refcount == 0 )
+    {
+      char buf[256];
+      int n = snprintf( buf, 255, " (%s)", i->comm.c_str() );
+      comm = String( buf, buf+n );
+    }
+    printf( fmt, i->id.c_str(), comm.c_str(), i->info.c_str() );
+  }
+}
+
+void printDevices( const ListDevice& devs )
+{
+  for( ListDevice::const_iterator i=devs.begin(); i!=devs.end(); i++ )
+  {
+    cout << i->id << "," << i->comm << ","
+	 << i->refcount << "," << i->info << endl;
+  }
+}
+
+ListDevice getActiveDevices( const ListDevice& devs )
+{
+  ListDevice active;
+  for( ListDevice::const_iterator i=devs.begin(); i!=devs.end(); i++ )
+  {
+    if( i->refcount > 0 )
+      active.push_back( *i );
+  }
+  return active;
+}
+
+void usage()
+{
+  cout << "usage: motelist [-l] [-c]\n"
+       << "\n"
+       << "  $Revision: 1.5 $ $Date: 2010-06-29 22:07:42 $\n"
+       << "\n"
+       << "options:\n"
+       << "  -h  display this help\n"
+       << "  -l  long format, also display disconnected devices\n"
+       << "  -c  compact format, not pretty but easier for parsing\n"
+       << std::endl;
+}
+
+int main( VecString args )
+{
+  bool showall = false;
+  bool compact = false;
+  //bool recovery = false;
+
+  for( VecString::size_type n=1; n!=args.size(); n++ )
+  {
+    StringRef opt = args[n];
+    if( opt == "-h" ) { usage(); return 0; }
+    else if( opt == "-l" ) { showall = true; }
+    else if( opt == "-c" ) { compact = true; }
+    else if( opt == "-c" ) { compact = true; }
+    else { usage(); throw std::runtime_error("unknown command line option "+opt); }
+  }
+
+  ListDevice devs = getDevices();
+
+  if( showall == false )
+    devs = getActiveDevices( devs );
+
+  devs.sort();
+
+  if( devs.empty() )
+    { cout << "No devices found." << endl; return 2; }
+  else if( compact )
+    printDevices( devs );
+  else
+    prettyPrintDevices( devs );
+
+  return 0;
+}
+
+}//namespace TelosList
+
+
+int main( int argc, char* argv[] )
+{
+  try
+  {
+    return TelosList::main( TelosList::VecString(argv,argv+argc) );
+  }
+  catch( std::runtime_error e )
+  {
+    std::cerr << "error, " << e.what() << std::endl;
+  }
+  return 1;
+}
+
diff --git a/tools/platforms/msp430/motelist/motelist.1 b/tools/platforms/msp430/motelist/motelist.1
new file mode 100644
index 00000000..53159adc
--- /dev/null
+++ b/tools/platforms/msp430/motelist/motelist.1
@@ -0,0 +1,30 @@
+.TH motelist 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+motelist - Locate connected USB devices
+.SH SYNOPSIS
+
+\fBmotelist\fR [\fB-c\fR]
+.SH DESCRIPTION
+
+\fBmotelist\fR lists all devices conntected to a PC through an FTDI
+USB-to-serial converter (see www.ftdichip.com).  This includes the
+Telos A, Telos B, and Tmote modules. 
+
+Options for All Platforms:
+  \fB-h\fR display a help message
+  \fB-c\fR compact format for automated parsing
+
+Options for Windows:
+  \fB-l\fR long format, also display disconnected devices
+
+Options for Linux:
+  \fB-f\fR specify the usb-serial file (if not in /proc/tty/driver/usbserial)
+  \fB-k\fR kernel version: 2.4, 2.6, auto (default)
+  \fB-m\fR method to scan usb: procfs, sysfs, auto (default)
+  \fB-dev_prefix\fR force the device prefix for the serial device
+  \fB-usb\fR display extra usb information
+.SH SEE ALSO
+
+.IR tos-bsl (1)
diff --git a/tools/platforms/msp430/pybsl/.cvsignore b/tools/platforms/msp430/pybsl/.cvsignore
new file mode 100644
index 00000000..fdf03227
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/.cvsignore
@@ -0,0 +1,4 @@
+tos-bsl
+tos-bsl.1
+Makefile
+Makefile.in
diff --git a/tools/platforms/msp430/pybsl/Makefile.am b/tools/platforms/msp430/pybsl/Makefile.am
new file mode 100644
index 00000000..dc3f4e9f
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/Makefile.am
@@ -0,0 +1,29 @@
+AUTOMAKE_OPTIONS = foreign
+
+sharedocdir=$(datadir)/doc/tinyos-tools-@PACKAGE_VERSION@
+
+sharedoc_DATA = tos-bsl.txt tos-bsl-license.txt
+
+dist_man_MANS = tos-bsl.1
+
+if CYGWIN
+# Cygwin support using native windows binary
+# (this code is not compatible with cygwin's python)
+
+install: tos-bsl-win.tar.gz
+	tar xzvf tos-bsl-win.tar.gz -C $(bindir) 
+
+else
+# Linux support
+SUBDIRS = serial
+
+tinyoslibdir=$(libdir)/tinyos
+
+bin_SCRIPTS = tos-bsl
+
+tinyoslib_DATA = elf.py
+
+tos-bsl: tos-bsl.in
+	sed -e 's,@tinyoslibdir\@,$(tinyoslibdir),g' tos-bsl.in >$@
+
+endif
diff --git a/tools/platforms/msp430/pybsl/elf.py b/tools/platforms/msp430/pybsl/elf.py
new file mode 100644
index 00000000..ba332191
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/elf.py
@@ -0,0 +1,318 @@
+#!/usr/bin/env python
+import struct
+
+# ELF object file reader
+# (C) 2003 cliechti@gmx.net
+# Python license
+
+#            size  alignment
+# Elf32_Addr    4  4  Unsigned program address
+# Elf32_Half    2  2  Unsigned medium integer
+# Elf32_Off     4  4  Unsigned file offset
+# Elf32_Sword   4  4  Signed large integer
+# Elf32_Word    4  4  Unsigned large integer
+# unsignedchar  1  1  Unsigned small integer
+
+#define EI_NIDENT 16
+#~ typedef struct{
+    #~ unsigned char e_ident[EI_NIDENT];
+    #~ Elf32_Half e_type;
+    #~ Elf32_Half e_machine;
+    #~ Elf32_Word e_version;
+    #~ Elf32_Addr e_entry;
+    #~ Elf32_Off  e_phoff;
+    #~ Elf32_Off  e_shoff;
+    #~ Elf32_Word e_flags;
+    #~ Elf32_Half e_ehsize;
+    #~ Elf32_Half e_phentsize;
+    #~ Elf32_Half e_phnum;
+    #~ Elf32_Half e_shentsize;
+    #~ Elf32_Half e_shnum;
+    #~ Elf32_Half e_shstrndx;
+#~ } Elf32_Ehdr;
+
+
+#Section Header
+#~ typedef struct {
+    #~ Elf32_Word sh_name;
+    #~ Elf32_Word sh_type;
+    #~ Elf32_Word sh_flags;
+    #~ Elf32_Addr sh_addr;
+    #~ Elf32_Off  sh_offset;
+    #~ Elf32_Word sh_size;
+    #~ Elf32_Word sh_link;
+    #~ Elf32_Word sh_info;
+    #~ Elf32_Word sh_addralign;
+    #~ Elf32_Word sh_entsize;
+#~ } Elf32_Shdr; 
+
+#~ typedef struct {
+    #~ Elf32_Word p_type;
+    #~ Elf32_Off  p_offset;
+    #~ Elf32_Addr p_vaddr;
+    #~ Elf32_Addr p_paddr;
+    #~ Elf32_Word p_filesz;
+    #~ Elf32_Word p_memsz;
+    #~ Elf32_Word p_flags;
+    #~ Elf32_Word p_align;
+#~ } Elf32_Phdr;
+
+
+class ELFException(Exception): pass
+
+class ELFSection:
+    """read and store a section"""
+    Elf32_Shdr = "<IIIIIIIIII"          #header format
+    
+    #section types
+    SHT_NULL        = 0
+    SHT_PROGBITS    = 1
+    SHT_SYMTAB      = 2
+    SHT_STRTAB      = 3
+    SHT_RELA        = 4
+    SHT_HASH        = 5
+    SHT_DYNAMIC     = 6
+    SHT_NOTE        = 7
+    SHT_NOBITS      = 8
+    SHT_REL         = 9
+    SHT_SHLIB       = 10
+    SHT_DYNSYM      = 11
+    SHT_LOPROC      = 0x70000000L
+    SHT_HIPROC      = 0x7fffffffL
+    SHT_LOUSER      = 0x80000000L
+    SHT_HIUSER      = 0xffffffffL
+    #section attribute flags
+    SHF_WRITE       = 0x1
+    SHF_ALLOC       = 0x2
+    SHF_EXECINSTR   = 0x4
+    SHF_MASKPROC    = 0xf0000000L
+
+    def __init__(self):
+        """creat a new empty section object"""
+        (self.sh_name, self.sh_type, self.sh_flags, self.sh_addr,
+         self.sh_offset, self.sh_size, self.sh_link, self.sh_info,
+         self.sh_addralign, self.sh_entsize) = [0]*10
+        self.name = None
+        self.data = None
+        self.lma =  None
+
+    def fromString(self, s):
+        """get section header from string"""
+        (self.sh_name, self.sh_type, self.sh_flags, self.sh_addr,
+         self.sh_offset, self.sh_size, self.sh_link, self.sh_info,
+         self.sh_addralign, self.sh_entsize) = struct.unpack(self.Elf32_Shdr, s)
+         
+    def __str__(self):
+        """pretty print for debug..."""
+        return "%s(%s, sh_type=%s, sh_flags=%s, "\
+               "sh_addr=0x%04x, sh_offset=0x%04x, sh_size=%s, sh_link=%s, "\
+               "sh_info=%s, sh_addralign=%s, sh_entsize=%s, lma=0x%04x)" % (
+            self.__class__.__name__,
+            self.name is not None and "%r" % self.name or "sh_name=%s" % self.sh_name,
+            self.sh_type, self.sh_flags, self.sh_addr,
+            self.sh_offset, self.sh_size, self.sh_link, self.sh_info,
+            self.sh_addralign, self.sh_entsize, self.lma)
+
+class ELFProgramHeader:
+    """Store and parse a program header"""
+    Elf32_Phdr = "<IIIIIIII"            #header format
+    
+    #segmet types
+    PT_NULL         = 0
+    PT_LOAD         = 1
+    PT_DYNAMIC      = 2
+    PT_INTERP       = 3
+    PT_NOTE         = 4
+    PT_SHLIB        = 5
+    PT_PHDR         = 6
+    PT_LOPROC       = 0x70000000L
+    PT_HIPROC       = 0x7fffffffL
+    
+    #segment flags
+    PF_R            = 0x4       #segment is readable
+    PF_W            = 0x2       #segment is writable
+    PF_X            = 0x1       #segment is executable
+     
+    def __init__(self):
+        """create a new, empty segment/program header"""
+        (self.p_type, self.p_offset, self.p_vaddr, self.p_paddr,
+            self.p_filesz, self.p_memsz, self.p_flags, self.p_align) = [0]*8
+        self.data = None
+
+    def fromString(self, s):
+        """parse header info from string"""
+        (self.p_type, self.p_offset, self.p_vaddr, self.p_paddr,
+            self.p_filesz, self.p_memsz, self.p_flags,
+            self.p_align) = struct.unpack(self.Elf32_Phdr, s)
+
+    def __str__(self):
+        """pretty print for debug..."""
+        return "%s(p_type=%s, p_offset=0x%04x, p_vaddr=0x%04x, p_paddr=0x%04x, "\
+            "p_filesz=%s, p_memsz=%s, p_flags=%s, "\
+            "p_align=%s)" % (
+            self.__class__.__name__,
+            self.p_type, self.p_offset, self.p_vaddr, self.p_paddr,
+            self.p_filesz, self.p_memsz, self.p_flags,
+            self.p_align)
+
+class ELFObject:
+    """Object to read and handle an LEF object file"""
+    #header information
+    Elf32_Ehdr = "<16sHHIIIIIHHHHHH"
+    
+    #offsets within e_ident
+    EI_MAG0         = 0     #File identification
+    EI_MAG1         = 1     #File identification
+    EI_MAG2         = 2     #File identification
+    EI_MAG3         = 3     #File identification
+    EI_CLASS        = 4     #File class
+    EI_DATA         = 5     #Data encoding
+    EI_VERSION      = 6     #File version
+    EI_PAD          = 7     #Start of padding bytes
+    EI_NIDENT       = 16    #Size of e_ident[]
+    #elf file type flags
+    ET_NONE         = 0     #No file type
+    ET_REL          = 1     #Relocatable file
+    ET_EXEC         = 2     #Executable file
+    ET_DYN          = 3     #Shared object file
+    ET_CORE         = 4     #Core file
+    ET_LOPROC       = 0xff00 #Processor-specific
+    ET_HIPROC       = 0xffff #Processor-specific
+    #ELF format
+    ELFCLASSNONE    = 0     #Invalid class
+    ELFCLASS32      = 1     #32-bit objects
+    ELFCLASS64      = 2     #64-bit objects
+    #encoding
+    ELFDATANONE     = 0     #Invalid data encoding
+    ELFDATA2LSB     = 1     #See below
+    ELFDATA2MSB     = 2     #See below
+
+    def __init__(self):
+        """create a new elf object"""
+        (self.e_ident, self.e_type, self.e_machine, self.e_version,
+        self.e_entry, self.e_phoff, self.e_shoff,
+        self.e_flags, self.e_ehsize, self.e_phentsize, self.e_phnum,
+        self.e_shentsize, self.e_shnum, self.e_shstrndx) = [0]*14
+
+    def fromFile(self, fileobj):
+        """read all relevant data from fileobj.
+        the file must be seekable"""
+        #get file header
+        (self.e_ident, self.e_type, self.e_machine, self.e_version,
+        self.e_entry, self.e_phoff, self.e_shoff,
+        self.e_flags, self.e_ehsize, self.e_phentsize, self.e_phnum,
+        self.e_shentsize, self.e_shnum, self.e_shstrndx) = struct.unpack(
+            self.Elf32_Ehdr, fileobj.read(struct.calcsize(self.Elf32_Ehdr)))
+        #verify if its a known format and realy an ELF file
+        if self.e_ident[0:4]             != '\x7fELF' and\
+           self.e_ident[self.EI_CLASS]   != self.ELFCLASS32 and\
+           self.e_ident[self.EI_DATA]    != self.ELFDATA2LSB and\
+           self.e_ident[self.EI_VERSION] != 1:
+                raise ELFException("Not a valid ELF file")
+
+        #load programm headers
+        self.programmheaders = []
+        if self.e_phnum:
+            #load program headers
+            fileobj.seek(self.e_phoff)
+            for sectionnum in range(self.e_phnum):
+                shdr = (fileobj.read(self.e_phentsize) + '\0'* struct.calcsize(ELFProgramHeader.Elf32_Phdr))[0:struct.calcsize(ELFProgramHeader.Elf32_Phdr)]
+                psection = ELFProgramHeader()
+                psection.fromString(shdr)
+                if psection.p_offset:   #skip if section has invalid offset in file
+                    self.programmheaders.append(psection)
+            #~ #get the segment data from the file for each prg header
+            #~ for phdr in self.programmheaders:
+                #~ fileobj.seek(phdr.p_offset)
+                #~ phdr.data = fileobj.read(phdr.p_filesz)
+                #~ #pad if needed
+                #~ if phdr.p_filesz < phdr.p_memsz:
+                    #~ phdr.data = phdr.data + '\0' * (phdr.p_memsz-phdr.p_filesz)
+
+        #load sections
+        self.sections = []
+        fileobj.seek(self.e_shoff)
+        for sectionnum in range(self.e_shnum):
+            shdr = (fileobj.read(self.e_shentsize) + '\0'* struct.calcsize(ELFSection.Elf32_Shdr))[0:struct.calcsize(ELFSection.Elf32_Shdr)]
+            elfsection = ELFSection()
+            elfsection.fromString(shdr)
+            self.sections.append(elfsection)
+        
+        #load data for all sections
+        for section in self.sections:
+            fileobj.seek(section.sh_offset)
+            data = fileobj.read(section.sh_size)
+            section.data = data
+            if section.sh_type == ELFSection.SHT_STRTAB:
+                section.values = data.split('\0')
+            section.lma = self.getLMA(section)
+        
+        #get section names
+        for section in self.sections:
+            start = self.sections[self.e_shstrndx].data[section.sh_name:]
+            section.name = start.split('\0')[0]
+        
+    def getSection(self, name):
+        """get section by name"""
+        for section in self.sections:
+            if section.name == '.text':
+                return section
+    
+    def getProgrammableSections(self):
+        """get all program headers that are marked as executable and
+        have suitable attributes to be code"""
+        res = []
+        for p in self.programmheaders:
+            #~ print p
+            #~ if section.sh_flags & self.SHF_ALLOC and section.name not in ('.data', '.data1', '.bss'):
+            #~ if p.p_type == ELFProgramHeader.PT_LOAD:# and p.p_paddr == p.p_vaddr and p.p_flags & ELFProgramHeader.PF_X:
+            if p.p_type == ELFProgramHeader.PT_LOAD:
+                res.append(p)
+        return res
+
+    def getLMA(self, section):
+        #magic load memory address calculation ;-)
+        for p in self.programmheaders:
+            if (p.p_paddr != 0 and \
+                p.p_type == ELFProgramHeader.PT_LOAD and \
+                p.p_vaddr != p.p_paddr and \
+                p.p_vaddr <= section.sh_addr and \
+                (p.p_vaddr + p.p_memsz >= section.sh_addr + section.sh_size) \
+                    and (not (section.sh_flags & ELFSection.SHF_ALLOC and section.sh_type != ELFSection.SHT_NOBITS) \
+                    or  (p.p_offset <= section.sh_offset \
+                    and (p.p_offset + p.p_filesz >= section.sh_offset + section.sh_size)))):
+                return section.sh_addr + p.p_paddr - p.p_vaddr
+        return section.sh_addr
+
+    def getSections(self):
+        """get sections relevant for the application"""
+        res = []
+        for section in self.sections:
+            if section.sh_flags & ELFSection.SHF_ALLOC and section.sh_type != ELFSection.SHT_NOBITS:
+                res.append(section)
+        return res
+
+    def __str__(self):
+        """pretty print for debug..."""
+        return "%s(self.e_type=%r, self.e_machine=%r, self.e_version=%r, sections=%r)" % (
+            self.__class__.__name__, 
+            self.e_type, self.e_machine, self.e_version,
+            [section.name for section in self.sections])
+
+
+if __name__ == '__main__':
+    print "This is only a module test!"
+    elf = ELFObject()
+    elf.fromFile(open("test.elf"))
+    if elf.e_type != ELFObject.ET_EXEC:
+        raise Exception("No executable")
+    print elf
+
+    #~ print repr(elf.getSection('.text').data)
+    #~ print [(s.name, hex(s.sh_addr)) for s in elf.getSections()]
+    print "-"*20
+    for p in elf.sections: print p
+    print "-"*20
+    for p in elf.getSections(): print p
+    print "-"*20
+    for p in elf.getProgrammableSections(): print p
diff --git a/tools/platforms/msp430/pybsl/serial/.cvsignore b/tools/platforms/msp430/pybsl/serial/.cvsignore
new file mode 100644
index 00000000..4ef9f957
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/.cvsignore
@@ -0,0 +1,6 @@
+Makefile
+Makefile.in
+
+__init__.pyc
+serialutil.pyc
+serialposix.pyc
diff --git a/tools/platforms/msp430/pybsl/serial/Makefile.am b/tools/platforms/msp430/pybsl/serial/Makefile.am
new file mode 100644
index 00000000..c3ccf3fb
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/Makefile.am
@@ -0,0 +1,10 @@
+AUTOMAKE_OPTIONS = foreign
+
+tinyoslibdir=$(libdir)/tinyos
+serialdir=$(tinyoslibdir)/serial
+
+serial_DATA = __init__.py 		\
+		serialjava.py		\
+		serialposix.py		\
+		serialutil.py		\
+		serialwin32.py
diff --git a/tools/platforms/msp430/pybsl/serial/__init__.py b/tools/platforms/msp430/pybsl/serial/__init__.py
new file mode 100644
index 00000000..4ffaa462
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/__init__.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python 
+#portable serial port access with python
+#this is a wrapper module for different platform implementations
+#
+# (C)2001-2002 Chris Liechti <cliechti@gmx.net>
+# this is distributed under a free software license, see license.txt
+
+import sys, os, string
+VERSION = "$Revision: 1.5 $"     #extract CVS version
+
+#chose an implementation, depending on os
+if os.name == 'nt': #sys.platform == 'win32':
+    from serialwin32 import *
+elif os.name == 'posix':
+    from serialposix import *
+elif os.name == 'java':
+    from serialjava import *
+else:
+    raise "Sorry no implementation for your platform available."
+
+#no "mac" implementation. someone want's to write it? i have no access to a mac.
diff --git a/tools/platforms/msp430/pybsl/serial/serialjava.py b/tools/platforms/msp430/pybsl/serial/serialjava.py
new file mode 100644
index 00000000..c6ae4357
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/serialjava.py
@@ -0,0 +1,197 @@
+#!jython
+#module for serial IO for Jython and JavaComm
+#see __init__.py
+#
+#(C) 2002 Chris Liechti <cliechti@gmx.net>
+# this is distributed under a free software license, see license.txt
+
+import sys, os, string, javax.comm
+import serialutil
+
+VERSION = "$Revision: 1.5 $"     #extract CVS version
+
+PARITY_NONE, PARITY_EVEN, PARITY_ODD, PARITY_MARK, PARITY_SPACE = (0,1,2,3,4)
+STOPBITS_ONE, STOPBITS_TWO, STOPBITS_ONE_HALVE = (1, 2, 3)
+FIVEBITS, SIXBITS, SEVENBITS, EIGHTBITS = (5,6,7,8)
+
+
+portNotOpenError = ValueError('port not open')
+
+def device(portnumber):
+    enum = javax.comm.CommPortIdentifier.getPortIdentifiers()
+    ports = []
+    while enum.hasMoreElements():
+        el = enum.nextElement()
+        if el.getPortType() == javax.comm.CommPortIdentifier.PORT_SERIAL:
+            ports.append(el)
+    return ports[portnumber]
+
+class Serial(serialutil.FileLike):
+    def __init__(self,
+                 port,                  #number of device, numbering starts at
+                                        #zero. if everything fails, the user
+                                        #can specify a device string, note
+                                        #that this isn't portable anymore
+                 baudrate=9600,         #baudrate
+                 bytesize=EIGHTBITS,    #number of databits
+                 parity=PARITY_NONE,    #enable parity checking
+                 stopbits=STOPBITS_ONE, #number of stopbits
+                 timeout=None,          #set a timeout value, None for waiting forever
+                 xonxoff=0,             #enable software flow control
+                 rtscts=0,              #enable RTS/CTS flow control
+                 ):
+
+        if type(port) == type(''):      #strings are taken directly
+            portId = javax.comm.CommPortIdentifier.getPortIdentifier(port)
+        else:
+            portId = device(port)     #numbers are transformed to a comportid obj
+        self.portstr = portId.getName()
+        try:
+            self.sPort = portId.open("python serial module", 10)
+        except Exception, msg:
+            self.sPort = None
+            raise serialutil.SerialException, "could not open port: %s" % msg
+        self.instream = self.sPort.getInputStream()
+        self.outstream = self.sPort.getOutputStream()
+        self.sPort.enableReceiveTimeout(30)
+        if bytesize == FIVEBITS:
+            self.databits = javax.comm.SerialPort.DATABITS_5
+        elif bytesize == SIXBITS:
+            self.databits = javax.comm.SerialPort.DATABITS_6
+        elif bytesize == SEVENBITS:
+            self.databits = javax.comm.SerialPort.DATABITS_7
+        elif bytesize == EIGHTBITS:
+            self.databits = javax.comm.SerialPort.DATABITS_8
+        else:
+            raise ValueError, "unsupported bytesize"
+        
+        if stopbits == STOPBITS_ONE:
+            self.jstopbits = javax.comm.SerialPort.STOPBITS_1
+        elif stopbits == STOPBITS_ONE_HALVE:
+            self.jstopbits = javax.comm.SerialPort.STOPBITS_1_5
+        elif stopbits == STOPBITS_TWO:
+            self.jstopbits = javax.comm.SerialPort.STOPBITS_2
+        else:
+            raise ValueError, "unsupported number of stopbits"
+
+        if parity == PARITY_NONE:
+            self.jparity = javax.comm.SerialPort.PARITY_NONE
+        elif parity == PARITY_EVEN:
+            self.jparity = javax.comm.SerialPort.PARITY_EVEN
+        elif parity == PARITY_ODD:
+            self.jparity = javax.comm.SerialPort.PARITY_ODD
+        elif parity == PARITY_MARK:
+            self.jparity = javax.comm.SerialPort.PARITY_MARK
+        elif parity == PARITY_SPACE:
+            self.jparity = javax.comm.SerialPort.PARITY_SPACE
+        else:
+            raise ValueError, "unsupported parity type"
+
+        jflowin = jflowout = 0
+        if rtscts:
+            jflowin = jflowin | javax.comm.SerialPort.FLOWCONTROL_RTSCTS_IN 
+            jflowout = jflowout | javax.comm.SerialPort.FLOWCONTROL_RTSCTS_OUT
+        if xonxoff:
+            jflowin = jflowin | javax.comm.SerialPort.FLOWCONTROL_XONXOFF_IN
+            jflowout = jflowout | javax.comm.SerialPort.FLOWCONTROL_XONXOFF_OUT
+        
+        self.sPort.setSerialPortParams(baudrate, self.databits, self.jstopbits, self.jparity)
+        self.sPort.setFlowControlMode(jflowin | jflowout)
+        
+        self.timeout = timeout
+        if timeout >= 0:
+            self.sPort.enableReceiveTimeout(timeout*1000)
+        else:
+            self.sPort.disableReceiveTimeout()
+
+    def close(self):
+        if self.sPort:
+            self.instream.close()
+            self.outstream.close()
+            self.sPort.close()
+            self.sPort = None
+
+    def setBaudrate(self, baudrate):
+        """change baudrate after port is open"""
+        if not self.sPort: raise portNotOpenError
+        self.sPort.setSerialPortParams(baudrate, self.databits, self.jstopbits, self.jparity)
+
+
+    def inWaiting(self):
+        if not self.sPort: raise portNotOpenError
+        return self.instream.available()
+
+    def write(self, data):
+        if not self.sPort: raise portNotOpenError
+        self.outstream.write(data)
+
+    def read(self, size=1):
+        if not self.sPort: raise portNotOpenError
+        read = ''
+        if size > 0:
+            while len(read) < size:
+                x = self.instream.read()
+                if x == -1:
+                    if self.timeout >= 0:
+                        break
+                else:
+                    read = read + chr(x)
+        return read
+
+    def flushInput(self):
+        if not self.sPort: raise portNotOpenError
+        self.instream.skip(self.instream.available())
+
+    def flushOutput(self):
+        if not self.sPort: raise portNotOpenError
+        self.outstream.flush()
+
+    def sendBreak(self):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.sendBreak()
+
+    def getDSR(self):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.isDSR()
+
+    def getCD(self):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.isCD()
+
+    def getRI(self):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.isRI()
+
+    def getCTS(self):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.isCTS()
+
+    def setDTR(self,on=1):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.setDTR(on)
+
+    def setRTS(self,on=1):
+        if not self.sPort: raise portNotOpenError
+        self.sPort.setRTS(on)
+
+if __name__ == '__main__':
+    s = Serial(0,
+                 baudrate=19200,        #baudrate
+                 bytesize=EIGHTBITS,    #number of databits
+                 parity=PARITY_EVEN,    #enable parity checking
+                 stopbits=STOPBITS_ONE, #number of stopbits
+                 timeout=3,             #set a timeout value, None for waiting forever
+                 xonxoff=0,             #enable software flow control
+                 rtscts=0,              #enable RTS/CTS flow control
+               )
+    s.setRTS(1)
+    s.setDTR(1)
+    s.flushInput()
+    s.flushOutput()
+    s.write('hello')
+    print repr(s.read(5))
+    print s.inWaiting()
+    del s
+
+
+
diff --git a/tools/platforms/msp430/pybsl/serial/serialposix.py b/tools/platforms/msp430/pybsl/serial/serialposix.py
new file mode 100644
index 00000000..d506d575
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/serialposix.py
@@ -0,0 +1,392 @@
+#!/usr/bin/env python
+#module for serial IO for POSIX compatible systems, like Linux
+#see __init__.py
+#
+#(C) 2001-2002 Chris Liechti <cliechti@gmx.net>
+# this is distributed under a free software license, see license.txt
+#
+#parts based on code from Grant B. Edwards  <grante@visi.com>:
+#  ftp://ftp.visi.com/users/grante/python/PosixSerial.py
+# references: http://www.easysw.com/~mike/serial/serial.html
+
+import sys, os, fcntl, termios, struct, string, select
+import serialutil
+
+VERSION = "$Revision: 1.5 $"     #extract CVS version
+
+PARITY_NONE, PARITY_EVEN, PARITY_ODD = range(3)
+STOPBITS_ONE, STOPBITS_TWO = (1, 2)
+FIVEBITS, SIXBITS, SEVENBITS, EIGHTBITS = (5,6,7,8)
+
+#Do check the Python version as some constants have moved.
+if (sys.hexversion < 0x020100f0):
+    import TERMIOS
+else:
+    TERMIOS = termios
+
+if (sys.hexversion < 0x020200f0):
+    import FCNTL
+else:
+    FCNTL = fcntl
+
+#try to detect the os so that a device can be selected...
+plat = string.lower(sys.platform)
+
+if   plat[:5] == 'linux':    #Linux (confirmed)
+    def device(port):
+        return '/dev/ttyS%d' % port
+
+elif plat == 'cygwin':       #cywin/win32 (confirmed)
+    def device(port):
+        return '/dev/com%d' % (port + 1)
+
+elif plat     == 'openbsd3': #BSD (confirmed)
+    def device(port):
+        return '/dev/ttyp%d' % port
+
+elif plat[:3] == 'bsd' or  \
+     plat[:6] == 'netbsd' or \
+     plat[:7] == 'freebsd' or \
+     plat[:7] == 'openbsd' or \
+     plat[:6] == 'darwin':   #BSD (confirmed for freebsd4: cuaa%d)
+    def device(port):
+        return '/dev/cuaa%d' % port
+
+elif plat[:4] == 'irix':     #IRIX (not tested)
+    def device(port):
+        return '/dev/ttyf%d' % port
+
+elif plat[:2] == 'hp':       #HP-UX (not tested)
+    def device(port):
+        return '/dev/tty%dp0' % (port+1)
+
+elif plat[:5] == 'sunos':    #Solaris/SunOS (confirmed)
+    def device(port):
+        return '/dev/tty%c' % (ord('a')+port)
+
+elif plat[:3] == 'dgux':     #Digital UNIX (not tested)
+    def device(port):
+        return '/dev/tty0%d' % (port+1)
+
+else:
+    #platform detection has failed...
+    info = "sys.platform = %r\nos.name = %r\nserialposix.py version = %s" % (sys.platform, os.name, VERSION)
+    print """send this information to the author of this module:
+
+%s
+
+also add the device name of the serial port and where the
+counting starts for the first serial port.
+e.g. 'first serial port: /dev/ttyS0'
+and with a bit luck you can get this module running...
+"""
+    raise Exception, "this module does not run on this platform, sorry."
+
+#whats up with "aix", "beos", "sco", ....
+#they should work, just need to know the device names.
+
+
+# construct dictionaries for baud rate lookups
+baudEnumToInt = {}
+baudIntToEnum = {}
+for rate in (0,50,75,110,134,150,200,300,600,1200,1800,2400,4800,9600,
+             19200,38400,57600,115200,230400,460800,500000,576000,921600,
+             1000000,1152000,1500000,2000000,2500000,3000000,3500000,4000000
+    ):
+    try:
+        i = eval('TERMIOS.B'+str(rate))
+        baudEnumToInt[i]=rate
+        baudIntToEnum[rate] = i
+    except:
+        pass
+
+
+#load some constants for later use.
+#try to use values from TERMIOS, use defaults from linux otherwise
+TIOCMGET  = hasattr(TERMIOS, 'TIOCMGET') and TERMIOS.TIOCMGET or 0x5415
+TIOCMBIS  = hasattr(TERMIOS, 'TIOCMBIS') and TERMIOS.TIOCMBIS or 0x5416
+TIOCMBIC  = hasattr(TERMIOS, 'TIOCMBIC') and TERMIOS.TIOCMBIC or 0x5417
+TIOCMSET  = hasattr(TERMIOS, 'TIOCMSET') and TERMIOS.TIOCMSET or 0x5418
+
+#TIOCM_LE = hasattr(TERMIOS, 'TIOCM_LE') and TERMIOS.TIOCM_LE or 0x001
+TIOCM_DTR = hasattr(TERMIOS, 'TIOCM_DTR') and TERMIOS.TIOCM_DTR or 0x002
+TIOCM_RTS = hasattr(TERMIOS, 'TIOCM_RTS') and TERMIOS.TIOCM_RTS or 0x004
+#TIOCM_ST = hasattr(TERMIOS, 'TIOCM_ST') and TERMIOS.TIOCM_ST or 0x008
+#TIOCM_SR = hasattr(TERMIOS, 'TIOCM_SR') and TERMIOS.TIOCM_SR or 0x010
+
+TIOCM_CTS = hasattr(TERMIOS, 'TIOCM_CTS') and TERMIOS.TIOCM_CTS or 0x020
+TIOCM_CAR = hasattr(TERMIOS, 'TIOCM_CAR') and TERMIOS.TIOCM_CAR or 0x040
+TIOCM_RNG = hasattr(TERMIOS, 'TIOCM_RNG') and TERMIOS.TIOCM_RNG or 0x080
+TIOCM_DSR = hasattr(TERMIOS, 'TIOCM_DSR') and TERMIOS.TIOCM_DSR or 0x100
+TIOCM_CD  = hasattr(TERMIOS, 'TIOCM_CD') and TERMIOS.TIOCM_CD or TIOCM_CAR
+TIOCM_RI  = hasattr(TERMIOS, 'TIOCM_RI') and TERMIOS.TIOCM_RI or TIOCM_RNG
+#TIOCM_OUT1 = hasattr(TERMIOS, 'TIOCM_OUT1') and TERMIOS.TIOCM_OUT1 or 0x2000
+#TIOCM_OUT2 = hasattr(TERMIOS, 'TIOCM_OUT2') and TERMIOS.TIOCM_OUT2 or 0x4000
+TIOCINQ   = hasattr(TERMIOS, 'FIONREAD') and TERMIOS.FIONREAD or 0x541B
+
+TIOCM_zero_str = struct.pack('I', 0)
+TIOCM_RTS_str = struct.pack('I', TIOCM_RTS)
+TIOCM_DTR_str = struct.pack('I', TIOCM_DTR)
+
+portNotOpenError = ValueError('port not open')
+
+class Serial(serialutil.FileLike):
+    def __init__(self,
+                 port,                  #number of device, numbering starts at
+                                        #zero. if everything fails, the user
+                                        #can specify a device string, note
+                                        #that this isn't portable anymore
+                 baudrate=9600,         #baudrate
+                 bytesize=EIGHTBITS,    #number of databits
+                 parity=PARITY_NONE,    #enable parity checking
+                 stopbits=STOPBITS_ONE, #number of stopbits
+                 timeout=None,          #set a timeout value, None for waiting forever
+                 xonxoff=0,             #enable software flow control
+                 rtscts=0,              #enable RTS/CTS flow control
+                 ):
+        """init comm port"""
+        self.fd = None
+        self.timeout = timeout
+        vmin = vtime = 0                #timeout is done via select
+        #open
+        if type(port) == type(''):      #strings are taken directly
+            self.portstr = port
+        else:
+            self.portstr = device(port) #numbers are transformed to a os dependant string
+        try:
+            self.fd = os.open(self.portstr, os.O_RDWR|os.O_NOCTTY|os.O_NONBLOCK)
+        except Exception, msg:
+            self.fd = None
+            raise serialutil.SerialException, "could not open port: %s" % msg
+        fcntl.fcntl(self.fd, FCNTL.F_SETFL, 0)  #set blocking
+        try:
+            self.__tcgetattr()          #read current settings
+        except termios.error, msg:      #if a port is nonexistent but has a /dev file, it'll fail here
+            raise serialutil.SerialException, "could not open port: %s" % msg
+        #set up raw mode / no echo / binary
+        self.cflag = self.cflag |  (TERMIOS.CLOCAL|TERMIOS.CREAD)
+        self.lflag = self.lflag & ~(TERMIOS.ICANON|TERMIOS.ECHO|TERMIOS.ECHOE|TERMIOS.ECHOK|TERMIOS.ECHONL|
+                                    TERMIOS.ECHOCTL|TERMIOS.ECHOKE|TERMIOS.ISIG|TERMIOS.IEXTEN) #|TERMIOS.ECHOPRT
+        self.oflag = self.oflag & ~(TERMIOS.OPOST)
+        if hasattr(TERMIOS, 'IUCLC'):
+            self.iflag = self.iflag & ~(TERMIOS.INLCR|TERMIOS.IGNCR|TERMIOS.ICRNL|TERMIOS.IUCLC|TERMIOS.IGNBRK)
+        else:
+            self.iflag = self.iflag & ~(TERMIOS.INLCR|TERMIOS.IGNCR|TERMIOS.ICRNL|TERMIOS.IGNBRK)
+        #setup baudrate
+        try:
+            self.ispeed = self.ospeed = baudIntToEnum[baudrate]
+        except:
+            raise ValueError,'invalid baud rate: %s' % baudrate
+        #setup char len
+        self.cflag = self.cflag & ~TERMIOS.CSIZE
+        if bytesize == 8:
+            self.cflag = self.cflag | TERMIOS.CS8
+        elif bytesize == 7:
+            self.cflag = self.cflag | TERMIOS.CS7
+        elif bytesize == 6:
+            self.cflag = self.cflag | TERMIOS.CS6
+        elif bytesize == 5:
+            self.cflag = self.cflag | TERMIOS.CS5
+        else:
+            raise ValueError,'invalid char len: '+str(clen)
+        #setup stopbits
+        if stopbits == STOPBITS_ONE:
+            self.cflag = self.cflag & ~(TERMIOS.CSTOPB)
+        elif stopbits == STOPBITS_TWO:
+            self.cflag = self.cflag |  (TERMIOS.CSTOPB)
+        else:
+            raise ValueError,'invalid stopit specification:'+str(stopbits)
+        #setup parity
+        self.iflag = self.iflag & ~(TERMIOS.INPCK|TERMIOS.ISTRIP)
+        if parity == PARITY_NONE:
+            self.cflag = self.cflag & ~(TERMIOS.PARENB|TERMIOS.PARODD)
+        elif parity == PARITY_EVEN:
+            self.cflag = self.cflag & ~(TERMIOS.PARODD)
+            self.cflag = self.cflag |  (TERMIOS.PARENB)
+        elif parity == PARITY_ODD:
+            self.cflag = self.cflag |  (TERMIOS.PARENB|TERMIOS.PARODD)
+        else:
+            raise ValueError,'invalid parity: '+str(par)
+        #setup flow control
+        #xonxoff
+        if hasattr(TERMIOS, 'IXANY'):
+            if xonxoff:
+                self.iflag = self.iflag |  (TERMIOS.IXON|TERMIOS.IXOFF|TERMIOS.IXANY)
+            else:
+                self.iflag = self.iflag & ~(TERMIOS.IXON|TERMIOS.IXOFF|TERMIOS.IXANY)
+        else:
+            if xonxoff:
+                self.iflag = self.iflag |  (TERMIOS.IXON|TERMIOS.IXOFF)
+            else:
+                self.iflag = self.iflag & ~(TERMIOS.IXON|TERMIOS.IXOFF)
+        #rtscts
+        if hasattr(TERMIOS, 'CRTSCTS'):
+            if rtscts:
+                self.cflag = self.cflag |  (TERMIOS.CRTSCTS)
+            else:
+                self.cflag = self.cflag & ~(TERMIOS.CRTSCTS)
+        elif hasattr(TERMIOS, 'CNEW_RTSCTS'):   #try it with alternate constant name
+            if rtscts:
+                self.cflag = self.cflag |  (TERMIOS.CNEW_RTSCTS)
+            else:
+                self.cflag = self.cflag & ~(TERMIOS.CNEW_RTSCTS)
+        #XXX should there be a warning if setting up rtscts (and xonxoff etc) fails??
+        
+        #buffer
+        #vmin "minimal number of characters to be read. = for non blocking"
+        if vmin<0 or vmin>255:
+            raise ValueError,'invalid vmin: '+str(vmin)
+        self.cc[TERMIOS.VMIN] = vmin
+        #vtime
+        if vtime<0 or vtime>255:
+            raise ValueError,'invalid vtime: '+str(vtime)
+        self.cc[TERMIOS.VTIME] = vtime
+        #activate settings
+        self.__tcsetattr()
+
+    def __tcsetattr(self):
+        """internal function to set port attributes"""
+        termios.tcsetattr(self.fd, TERMIOS.TCSANOW, [self.iflag,self.oflag,self.cflag,self.lflag,self.ispeed,self.ospeed,self.cc])
+
+    def __tcgetattr(self):
+        """internal function to get port attributes"""
+        self.iflag,self.oflag,self.cflag,self.lflag,self.ispeed,self.ospeed,self.cc = termios.tcgetattr(self.fd)
+
+    def close(self):
+        """close port"""
+        if self.fd:
+            os.close(self.fd)
+            self.fd = None
+
+    def setBaudrate(self, baudrate):
+        """change baudrate after port is open"""
+        if not self.fd: raise portNotOpenError
+        self.__tcgetattr()  #read current settings
+        #setup baudrate
+        try:
+            self.ispeed = self.ospeed = baudIntToEnum[baudrate]
+        except:
+            raise ValueError,'invalid baud rate: %s' % baudrate
+        self.__tcsetattr()
+
+    def inWaiting(self):
+        """how many character are in the input queue"""
+        #~ s = fcntl.ioctl(self.fd, TERMIOS.FIONREAD, TIOCM_zero_str)
+        s = fcntl.ioctl(self.fd, TIOCINQ, TIOCM_zero_str)
+        return struct.unpack('I',s)[0]
+
+    def write(self, data):
+        """write a string to the port"""
+        if not self.fd: raise portNotOpenError
+        t = len(data)
+        d = data
+        while t>0:
+            n = os.write(self.fd, d)
+            d = d[n:]
+            t = t - n
+
+    def read(self, size=1):
+        """read a number of bytes from the port.
+        the default is one (unlike files)"""
+        if not self.fd: raise portNotOpenError
+        read = ''
+        inp = None
+        if size > 0:
+            while len(read) < size:
+                #print "\tread(): size",size, "have", len(read)    #debug
+                ready,_,_ = select.select([self.fd],[],[], self.timeout)
+                if not ready:
+                    break   #timeout
+                buf = os.read(self.fd, size-len(read))
+                read = read + buf
+                if self.timeout >= 0 and not buf:
+                    break  #early abort on timeout
+        return read
+
+    def flushInput(self):
+        """clear input queue"""
+        if not self.fd:
+            raise portNotOpenError
+        termios.tcflush(self.fd, TERMIOS.TCIFLUSH)
+
+    def flushOutput(self):
+        """flush output"""
+        if not self.fd:
+            raise portNotOpenError
+        termios.tcflush(self.fd, TERMIOS.TCOFLUSH)
+
+    def sendBreak(self):
+        """send break signal"""
+        if not self.fd:
+            raise portNotOpenError
+        termios.tcsendbreak(self.fd, 0)
+
+    def drainOutput(self):
+        """internal - not portable!"""
+        if not self.fd: raise portNotOpenError
+        termios.tcdrain(self.fd)
+
+    def nonblocking(self):
+        """internal - not portable!"""
+        if not self.fd:
+            raise portNotOpenError
+        fcntl.fcntl(self.fd, FCNTL.F_SETFL, FCNTL.O_NONBLOCK)
+
+    def getDSR(self):
+        """read terminal status line"""
+        if not self.fd: raise portNotOpenError
+        s = fcntl.ioctl(self.fd, TIOCMGET, TIOCM_zero_str)
+        return struct.unpack('I',s)[0] & TIOCM_DSR
+
+    def getCD(self):
+        """read terminal status line"""
+        if not self.fd: raise portNotOpenError
+        s = fcntl.ioctl(self.fd, TIOCMGET, TIOCM_zero_str)
+        return struct.unpack('I',s)[0] & TIOCM_CD
+
+    def getRI(self):
+        """read terminal status line"""
+        if not self.fd: raise portNotOpenError
+        s = fcntl.ioctl(self.fd, TIOCMGET, TIOCM_zero_str)
+        return struct.unpack('I',s)[0] & TIOCM_RI
+
+    def getCTS(self):
+        """read terminal status line"""
+        if not self.fd: raise portNotOpenError
+        s = fcntl.ioctl(self.fd, TIOCMGET, TIOCM_zero_str)
+        return struct.unpack('I',s)[0] & TIOCM_CTS
+
+    def setDTR(self,on=1):
+        """set terminal status line"""
+        if not self.fd: raise portNotOpenError
+        if on:
+            fcntl.ioctl(self.fd, TIOCMBIS, TIOCM_DTR_str)
+        else:
+            fcntl.ioctl(self.fd, TIOCMBIC, TIOCM_DTR_str)
+
+    def setRTS(self,on=1):
+        """set terminal status line"""
+        if not self.fd: raise portNotOpenError
+        if on:
+            fcntl.ioctl(self.fd, TIOCMBIS, TIOCM_RTS_str)
+        else:
+            fcntl.ioctl(self.fd, TIOCMBIC, TIOCM_RTS_str)
+
+if __name__ == '__main__':
+    s = Serial(0,
+                 baudrate=19200,        #baudrate
+                 bytesize=EIGHTBITS,    #number of databits
+                 parity=PARITY_EVEN,    #enable parity checking
+                 stopbits=STOPBITS_ONE, #number of stopbits
+                 timeout=3,             #set a timeout value, None for waiting forever
+                 xonxoff=0,             #enable software flow control
+                 rtscts=0,              #enable RTS/CTS flow control
+               )
+    s.setRTS(1)
+    s.setDTR(1)
+    s.flushInput()
+    s.flushOutput()
+    s.write('hello')
+    print repr(s.read(5))
+    print s.inWaiting()
+    del s
diff --git a/tools/platforms/msp430/pybsl/serial/serialutil.py b/tools/platforms/msp430/pybsl/serial/serialutil.py
new file mode 100644
index 00000000..e3a4bdb3
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/serialutil.py
@@ -0,0 +1,65 @@
+
+class SerialException(Exception):
+    pass
+
+class FileLike:
+    """An abstract file like class.
+    
+    This class implements readline and readlines based on read and
+    writelines based on write.
+    This class is used to provide the above functions for to Serial
+    port objects.
+    
+    Note that when the serial port was opened with _NO_ timeout that
+    readline blocks until it sees a newline (or the specified size is
+    reached) and that readlines would never return and therefore
+    refuses to work (it raises an exception in this case)!
+    """
+
+    def read(self, size): raise NotImplementedError
+    def write(self, s): raise NotImplementedError
+
+    def readline(self, size=None, eol='\n'):
+        """read a line which is terminated with end-of-line (eol) character
+        ('\n' by default) or until timeout"""
+        line = ''
+        while 1:
+            c = self.read(1)
+            if c:
+                line += c   #not very efficient but lines are usually not that long
+                if c == eol:
+                    break
+                if size is not None and len(line) >= size:
+                    break
+            else:
+                break
+        return line
+
+    def readlines(self, sizehint=None, eol='\n'):
+        """read a list of lines, until timeout
+        sizehint is ignored"""
+        if self.timeout is None:
+            raise ValueError, "Serial port MUST have enabled timeout for this function!"
+        lines = []
+        while 1:
+            line = self.readline(eol=eol)
+            if line:
+                lines.append(line)
+                if line[-1] != eol:    #was the line received with a timeout?
+                    break
+            else:
+                break
+        return lines
+
+    def xreadlines(self, sizehint=None):
+        """just call readlines - here for compatibility"""
+        return self.readlines()
+
+    def writelines(self, sequence):
+        for line in sequence:
+            self.write(line)
+
+    def flush(self):
+        """flush of file like objects"""
+        pass
+
diff --git a/tools/platforms/msp430/pybsl/serial/serialwin32.py b/tools/platforms/msp430/pybsl/serial/serialwin32.py
new file mode 100644
index 00000000..6808dccf
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/serial/serialwin32.py
@@ -0,0 +1,280 @@
+#! python
+#serial driver for win32
+#see __init__.py
+#
+#(C) 2001-2002 Chris Liechti <cliechti@gmx.net>
+# this is distributed under a free software license, see license.txt
+
+import win32file  # The base COM port and file IO functions.
+import win32event # We use events and the WaitFor[Single|Multiple]Objects functions.
+import win32con   # constants.
+import sys, string
+import serialutil
+
+VERSION = "$Revision: 1.5 $"     #extract CVS version
+
+PARITY_NONE, PARITY_EVEN, PARITY_ODD = range(3)
+STOPBITS_ONE, STOPBITS_TWO = (1, 2)
+FIVEBITS, SIXBITS, SEVENBITS, EIGHTBITS = (5,6,7,8)
+
+portNotOpenError = ValueError('port not open')
+
+#from winbase.h. these should realy be in win32con
+MS_CTS_ON  = 16
+MS_DSR_ON  = 32
+MS_RING_ON = 64
+MS_RLSD_ON = 128
+
+class Serial(serialutil.FileLike):
+    def __init__(self,
+                 port,                  #number of device, numbering starts at
+                                        #zero. if everything fails, the user
+                                        #can specify a device string, note
+                                        #that this isn't portable anymore
+                 baudrate=9600,         #baudrate
+                 bytesize=EIGHTBITS,    #number of databits
+                 parity=PARITY_NONE,    #enable parity checking
+                 stopbits=STOPBITS_ONE, #number of stopbits
+                 timeout=None,          #set a timeout value, None for waiting forever
+                 xonxoff=0,             #enable software flow control
+                 rtscts=0,              #enable RTS/CTS flow control
+                 ):
+        """initialize comm port"""
+
+        self.timeout = timeout
+
+        if type(port) == type(''):       #strings are taken directly
+            self.portstr = port
+        else:
+	    # CSS 20040528 - open wasn't working for COM10 and greater, but by
+            # chance the '\\.\COM10' format seems to work, yay!  But, only use
+            # if for COM10 and greater in case it introduces some other
+	    # incompatibility.
+	    if port < 9:
+	      self.portstr = 'COM%d' % (port+1) #numbers are transformed to a string
+	    else:
+	      self.portstr = '\\\\.\\COM%d' % (port+1) #WIN NT format??
+
+        try:
+            self.hComPort = win32file.CreateFile(self.portstr,
+                   win32con.GENERIC_READ | win32con.GENERIC_WRITE,
+                   0, # exclusive access
+                   None, # no security
+                   win32con.OPEN_EXISTING,
+                   win32con.FILE_ATTRIBUTE_NORMAL | win32con.FILE_FLAG_OVERLAPPED,
+                   None)
+        except Exception, msg:
+            self.hComPort = None    #'cause __del__ is called anyway
+            raise serialutil.SerialException, "could not open port: %s" % msg
+        # Setup a 4k buffer
+        win32file.SetupComm(self.hComPort, 4096, 4096)
+
+        #Save original timeout values:
+        self.orgTimeouts = win32file.GetCommTimeouts(self.hComPort)
+
+        #Set Windows timeout values
+        #timeouts is a tuple with the following items:
+        #(ReadIntervalTimeout,ReadTotalTimeoutMultiplier,
+        # ReadTotalTimeoutConstant,WriteTotalTimeoutMultiplier,
+        # WriteTotalTimeoutConstant)
+        if timeout is None:
+            timeouts = (0, 0, 0, 0, 0)
+        elif timeout == 0:
+            timeouts = (win32con.MAXDWORD, 0, 0, 0, 0)
+        else:
+            #timeouts = (0, 0, 0, 0, 0) #timeouts are done with WaitForSingleObject
+            #timeouts = (win32con.MAXDWORD, 0, 0, 0, 1000)   #doesn't works
+            #timeouts = (timeout*1000, 0, timeout*1000, 0, 0)
+            timeouts = (0, 0, timeout*1000, 0, timeout*1000)
+        win32file.SetCommTimeouts(self.hComPort, timeouts)
+
+        #win32file.SetCommMask(self.hComPort, win32file.EV_RXCHAR | win32file.EV_TXEMPTY |
+        #    win32file.EV_RXFLAG | win32file.EV_ERR)
+        win32file.SetCommMask(self.hComPort,
+                win32file.EV_RXCHAR | win32file.EV_RXFLAG | win32file.EV_ERR)
+        #win32file.SetCommMask(self.hComPort, win32file.EV_ERR)
+
+        # Setup the connection info.
+        # Get state and modify it:
+        comDCB = win32file.GetCommState(self.hComPort)
+        comDCB.BaudRate = baudrate
+
+        if bytesize == FIVEBITS:
+            comDCB.ByteSize     = 5
+        elif bytesize == SIXBITS:
+            comDCB.ByteSize     = 6
+        elif bytesize == SEVENBITS:
+            comDCB.ByteSize     = 7
+        elif bytesize == EIGHTBITS:
+            comDCB.ByteSize     = 8
+
+        if parity == PARITY_NONE:
+            comDCB.Parity       = win32file.NOPARITY
+            comDCB.fParity      = 0 # Dis/Enable Parity Check
+        elif parity == PARITY_EVEN:
+            comDCB.Parity       = win32file.EVENPARITY
+            comDCB.fParity      = 1 # Dis/Enable Parity Check
+        elif parity == PARITY_ODD:
+            comDCB.Parity       = win32file.ODDPARITY
+            comDCB.fParity      = 1 # Dis/Enable Parity Check
+
+        if stopbits == STOPBITS_ONE:
+            comDCB.StopBits     = win32file.ONESTOPBIT
+        elif stopbits == STOPBITS_TWO:
+            comDCB.StopBits     = win32file.TWOSTOPBITS
+        comDCB.fBinary          = 1 # Enable Binary Transmission
+        # Char. w/ Parity-Err are replaced with 0xff (if fErrorChar is set to TRUE)
+        if rtscts:
+            comDCB.fRtsControl  = win32file.RTS_CONTROL_HANDSHAKE
+            comDCB.fDtrControl  = win32file.DTR_CONTROL_HANDSHAKE
+        else:
+            comDCB.fRtsControl  = win32file.RTS_CONTROL_ENABLE
+            comDCB.fDtrControl  = win32file.DTR_CONTROL_ENABLE
+        comDCB.fOutxCtsFlow     = rtscts
+        comDCB.fOutxDsrFlow     = rtscts
+        comDCB.fOutX            = xonxoff
+        comDCB.fInX             = xonxoff
+        comDCB.fNull            = 0
+        comDCB.fErrorChar       = 0
+        comDCB.fAbortOnError    = 0
+
+        win32file.SetCommState(self.hComPort, comDCB)
+
+        # Clear buffers:
+        # Remove anything that was there
+        win32file.PurgeComm(self.hComPort,
+                            win32file.PURGE_TXCLEAR | win32file.PURGE_TXABORT |
+                            win32file.PURGE_RXCLEAR | win32file.PURGE_RXABORT)
+
+        #print win32file.ClearCommError(self.hComPort) #flags, comState =
+
+        #self.overlapped = win32file.OVERLAPPED()
+        #self.overlapped.hEvent = win32event.CreateEvent(None, 0, 0, None)
+
+    def __del__(self):
+        self.close()
+
+    def close(self):
+        """close port"""
+        if self.hComPort:
+            #Wait until data is transmitted, but not too long... (Timeout-Time)
+            #while 1:
+            #    flags, comState = win32file.ClearCommError(hComPort)
+            #    if comState.cbOutQue <= 0 or calcTimeout(startTime) > timeout:
+            #        break
+
+            self.setRTS(0)
+            self.setDTR(0)
+            #Clear buffers:
+            win32file.PurgeComm(self.hComPort,
+                                win32file.PURGE_TXCLEAR | win32file.PURGE_TXABORT |
+                                win32file.PURGE_RXCLEAR | win32file.PURGE_RXABORT)
+            #Restore original timeout values:
+            win32file.SetCommTimeouts(self.hComPort, self.orgTimeouts)
+            #Close COM-Port:
+            win32file.CloseHandle(self.hComPort)
+            self.hComPort = None
+
+    def setBaudrate(self, baudrate):
+        """change baudrate after port is open"""
+        if not self.hComPort: raise portNotOpenError
+        # Setup the connection info.
+        # Get state and modify it:
+        comDCB = win32file.GetCommState(self.hComPort)
+        comDCB.BaudRate = baudrate
+        win32file.SetCommState(self.hComPort, comDCB)
+
+    def inWaiting(self):
+        """returns the number of bytes waiting to be read"""
+        flags, comstat = win32file.ClearCommError(self.hComPort)
+        return comstat.cbInQue
+
+    def read(self, size=1):
+        "read num bytes from serial port"
+        if not self.hComPort: raise portNotOpenError
+        read = ''
+        if size > 0:
+            overlapped = win32file.OVERLAPPED()
+            overlapped.hEvent = win32event.CreateEvent(None, 1, 0, None)
+            if self.timeout == 0:
+                flags, comstat = win32file.ClearCommError(self.hComPort)
+                n = min(comstat.cbInQue, size)
+                if n > 0:
+                    rc, buf = win32file.ReadFile(self.hComPort, win32file.AllocateReadBuffer(n), overlapped)
+                    win32event.WaitForSingleObject(overlapped.hEvent, win32event.INFINITE)
+                    read = str(buf)
+            else:
+                flags, comstat = win32file.ClearCommError(self.hComPort)
+                rc, buf = win32file.ReadFile(self.hComPort, win32file.AllocateReadBuffer(size), overlapped)
+                n = win32file.GetOverlappedResult(self.hComPort, overlapped, 1)
+                read = str(buf[:n])
+        return read
+
+    def write(self, s):
+        "write string to serial port"
+        if not self.hComPort: raise portNotOpenError
+        #print repr(s),
+        overlapped = win32file.OVERLAPPED()
+        overlapped.hEvent = win32event.CreateEvent(None, 1, 0, None)
+        err, n = win32file.WriteFile(self.hComPort, s, overlapped)
+        if err: #will be ERROR_IO_PENDING:
+            # Wait for the write to complete.
+            win32event.WaitForSingleObject(overlapped.hEvent, win32event.INFINITE)
+
+    def flushInput(self):
+        if not self.hComPort: raise portNotOpenError
+        win32file.PurgeComm(self.hComPort, win32file.PURGE_RXCLEAR | win32file.PURGE_RXABORT)
+
+    def flushOutput(self):
+        if not self.hComPort: raise portNotOpenError
+        win32file.PurgeComm(self.hComPort, win32file.PURGE_TXCLEAR | win32file.PURGE_TXABORT)
+
+    def sendBreak(self):
+        if not self.hComPort: raise portNotOpenError
+        import time
+        win32file.SetCommBreak(self.hComPort)
+        #TODO: how to set the correct duration??
+        time.sleep(0.020)
+        win32file.ClearCommBreak(self.hComPort)
+
+    def setRTS(self,level=1):
+        """set terminal status line"""
+        if not self.hComPort: raise portNotOpenError
+        if level:
+            win32file.EscapeCommFunction(self.hComPort, win32file.SETRTS)
+        else:
+            win32file.EscapeCommFunction(self.hComPort, win32file.CLRRTS)
+
+    def setDTR(self,level=1):
+        """set terminal status line"""
+        if not self.hComPort: raise portNotOpenError
+        if level:
+            win32file.EscapeCommFunction(self.hComPort, win32file.SETDTR)
+        else:
+            win32file.EscapeCommFunction(self.hComPort, win32file.CLRDTR)
+
+    def getCTS(self):
+        """read terminal status line"""
+        if not self.hComPort: raise portNotOpenError
+        return MS_CTS_ON & win32file.GetCommModemStatus(self.hComPort) != 0
+
+    def getDSR(self):
+        """read terminal status line"""
+        if not self.hComPort: raise portNotOpenError
+        return MS_DSR_ON & win32file.GetCommModemStatus(self.hComPort) != 0
+
+    def getRI(self):
+        """read terminal status line"""
+        if not self.hComPort: raise portNotOpenError
+        return MS_RING_ON & win32file.GetCommModemStatus(self.hComPort) != 0
+
+    def getCD(self):
+        """read terminal status line"""
+        if not self.hComPort: raise portNotOpenError
+        return MS_RLSD_ON & win32file.GetCommModemStatus(self.hComPort) != 0
+
+#Nur Testfunktion!!
+if __name__ == '__main__':
+    print __name__
+    s = Serial(0)
+
diff --git a/tools/platforms/msp430/pybsl/tos-bsl-license.txt b/tools/platforms/msp430/pybsl/tos-bsl-license.txt
new file mode 100644
index 00000000..5cae85d7
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/tos-bsl-license.txt
@@ -0,0 +1,62 @@
+Copyright (c) 2001-2003 Chris Liechti <cliechti@gmx.net>
+
+All Rights Reserved.
+
+This is the Python license. In short, you can use this product in
+commercial and non-commercial applications, modify it, redistribute it.
+A notification to the author when you use and/or modify it is welcome.
+
+TERMS AND CONDITIONS FOR ACCESSING OR OTHERWISE USING THIS SOFTWARE
+============================================
+
+LICENSE AGREEMENT
+-----------------
+
+1. This LICENSE AGREEMENT is between the copyright holder of this
+product, and the Individual or Organization ("Licensee") accessing
+and otherwise using this product in source or binary form and its
+associated documentation.
+
+2. Subject to the terms and conditions of this License Agreement,
+the copyright holder hereby grants Licensee a nonexclusive,
+royalty-free, world-wide license to reproduce, analyze, test,
+perform and/or display publicly, prepare derivative works, distribute,
+and otherwise use this product alone or in any derivative version,
+provided, however, that copyright holders License Agreement and
+copyright holders notice of copyright are retained in this product
+alone or in any derivative version prepared by Licensee.
+
+3. In the event Licensee prepares a derivative work that is based on
+or incorporates this product or any part thereof, and wants to make
+the derivative work available to others as provided herein, then
+Licensee hereby agrees to include in any such work a brief summary of
+the changes made to this product.
+
+4. The copyright holder is making this product available to Licensee
+on an "AS IS" basis. THE COPYRIGHT HOLDER MAKES NO REPRESENTATIONS
+OR WARRANTIES, EXPRESS OR IMPLIED.  BY WAY OF EXAMPLE, BUT NOT
+LIMITATION, THE COPYRIGHT HOLDER MAKES NO AND DISCLAIMS ANY
+REPRESENTATION OR WARRANTY OF MERCHANTABILITY OR FITNESS FOR
+ANY PARTICULAR PURPOSE OR THAT THE USE OF THIS PRODUCT WILL
+NOT INFRINGE ANY THIRD PARTY RIGHTS.
+
+5. THE COPYRIGHT HOLDER SHALL NOT BE LIABLE TO LICENSEE OR ANY
+OTHER USERS OF THIS PRODUCT FOR ANY INCIDENTAL, SPECIAL, OR
+CONSEQUENTIAL DAMAGES OR LOSS AS A RESULT OF MODIFYING,
+DISTRIBUTING, OR OTHERWISE USING THIS PRODUCT, OR ANY
+DERIVATIVE THEREOF, EVEN IF ADVISED OF THE POSSIBILITY
+THEREOF.
+
+6. This License Agreement will automatically terminate upon a
+material breach of its terms and conditions.
+
+7. Nothing in this License Agreement shall be deemed to create any
+relationship of agency, partnership, or joint venture between the
+copyright holder and Licensee. This License Agreement does not grant
+permission to use trademarks or trade names from the copyright holder
+in a trademark sense to endorse or promote products or services of
+Licensee, or any third party.
+
+8. By copying, installing or otherwise using this product, Licensee
+agrees to be bound by the terms and conditions of this License
+Agreement.
diff --git a/tools/platforms/msp430/pybsl/tos-bsl-win.tar.gz b/tools/platforms/msp430/pybsl/tos-bsl-win.tar.gz
new file mode 100644
index 00000000..1b645115
Binary files /dev/null and b/tools/platforms/msp430/pybsl/tos-bsl-win.tar.gz differ
diff --git a/tools/platforms/msp430/pybsl/tos-bsl.1.in b/tools/platforms/msp430/pybsl/tos-bsl.1.in
new file mode 100644
index 00000000..8e275d99
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/tos-bsl.1.in
@@ -0,0 +1,18 @@
+.TH tos-bsl 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-bsl - Program a telos or telos B mote
+.SH SYNOPSIS
+
+\fBtos-bsl\fR [\fIoptions-and-files\fR]
+.SH DESCRIPTION
+
+\fBtos-bsl\fR is a version of \fBmsp430-bsl\fR modifies to support the
+telos and telos B motes. See 
+  @prefix@/share/doc/tinyos-tools-@PACKAGE_VERSION@/tos-bsl.txt
+.br
+for full documentation.
+.SH SEE ALSO
+
+.IR motelist (1)
diff --git a/tools/platforms/msp430/pybsl/tos-bsl.in b/tools/platforms/msp430/pybsl/tos-bsl.in
new file mode 100644
index 00000000..5b371d5b
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/tos-bsl.in
@@ -0,0 +1,1629 @@
+#!/usr/bin/env python
+# Serial Bootstrap Loader software for the MSP430 embedded proccessor.
+#
+# (C) 2001-2003 Chris Liechti <cliechti@gmx.net>
+# this is distributed under a free software license, see license.txt
+#
+# fixes from Colin Domoney
+#
+# based on the application note slas96b.pdf from Texas Instruments, Inc.,
+# Volker Rzehak
+# additional infos from slaa089a.pdf
+
+import sys, time, string, cStringIO, struct
+sys.path.append("@tinyoslibdir@")
+import serial
+
+VERSION = string.split("Revision: 1.39-telos-8 ")[1] #freeze the mspgcc CVS version, and tag telos
+
+DEBUG = 0                                       #disable debug messages by default
+
+#copy of the patch file provided by TI
+#this part is (C) by Texas Instruments
+PATCH = """@0220
+31 40 1A 02 09 43 B0 12 2A 0E B0 12 BA 0D 55 42
+0B 02 75 90 12 00 1F 24 B0 12 BA 02 55 42 0B 02
+75 90 16 00 16 24 75 90 14 00 11 24 B0 12 84 0E
+06 3C B0 12 94 0E 03 3C 21 53 B0 12 8C 0E B2 40
+10 A5 2C 01 B2 40 00 A5 28 01 30 40 42 0C 30 40
+76 0D 30 40 AC 0C 16 42 0E 02 17 42 10 02 E2 B2
+08 02 14 24 B0 12 10 0F 36 90 00 10 06 28 B2 40
+00 A5 2C 01 B2 40 40 A5 28 01 D6 42 06 02 00 00
+16 53 17 83 EF 23 B0 12 BA 02 D3 3F B0 12 10 0F
+17 83 FC 23 B0 12 BA 02 D0 3F 18 42 12 02 B0 12
+10 0F D2 42 06 02 12 02 B0 12 10 0F D2 42 06 02
+13 02 38 E3 18 92 12 02 BF 23 E2 B3 08 02 BC 23
+30 41
+q
+"""
+
+#These BSL's are (C) by TI. They come with the application note slaa089a
+F1X_BSL = """@0220
+24 02 2E 02 31 40 20 02 2B D2 C0 43 EA FF 32 C2
+F2 C0 32 00 00 00 B2 40 80 5A 20 01 F2 40 85 00
+57 00 F2 40 80 00 56 00 E2 D3 21 00 E2 D3 22 00
+E2 C3 26 00 E2 C2 2A 00 E2 C2 2E 00 B2 40 10 A5
+2C 01 B2 40 00 A5 28 01 3B C0 3A 00 B0 12 D6 04
+82 43 12 02 09 43 36 40 0A 02 37 42 B0 12 AC 05
+C6 4C 00 00 16 53 17 83 F9 23 D2 92 0C 02 0D 02
+28 20 55 42 0B 02 75 90 12 00 80 24 75 90 10 00
+6D 24 B0 12 9C 04 55 42 0B 02 75 90 18 00 31 24
+75 90 1E 00 B8 24 75 90 20 00 17 24 2B B2 11 24
+75 90 16 00 22 24 75 90 14 00 B3 24 75 90 1A 00
+18 24 75 90 1C 00 45 24 04 3C B0 12 36 05 BE 3F
+21 53 B0 12 3C 05 BA 3F 03 43 B0 12 36 05 D2 42
+0E 02 56 00 D2 42 0F 02 57 00 D2 42 10 02 16 02
+AD 3F B0 12 36 05 10 42 0E 02 16 42 0E 02 15 43
+07 3C 36 40 FE FF B2 40 06 A5 10 02 35 40 0C 00
+B2 40 00 A5 2C 01 92 42 10 02 28 01 B6 43 00 00
+92 B3 2C 01 FD 23 15 83 F3 23 36 90 FE FF CD 27
+37 40 80 00 36 F0 80 FF 36 90 00 11 0E 28 07 57
+36 F0 00 FF 36 90 00 12 08 28 07 57 36 F0 00 FE
+04 3C 16 42 0E 02 17 42 10 02 35 43 75 96 03 20
+17 83 FC 23 B2 3F 82 46 00 02 B3 3F 36 40 E0 FF
+37 40 20 00 B0 12 AC 05 7C 96 01 24 2B D3 17 83
+F9 23 2B C2 B0 12 9C 04 2B D2 9F 3F 16 42 0E 02
+17 42 10 02 2B B2 38 24 3B D0 10 00 B0 12 AC 05
+36 90 00 10 06 2C 36 90 00 01 09 2C C6 4C 00 00
+25 3C B2 40 00 A5 2C 01 B2 40 40 A5 28 01 16 B3
+03 20 C2 4C 14 02 1A 3C C2 4C 15 02 86 9A FD FF
+08 24 2B D3 3B B0 20 00 04 20 3B D0 20 00 82 46
+00 02 36 90 01 02 04 28 3B D2 3B B0 10 00 02 24
+3B C0 32 00 1A 42 14 02 86 4A FF FF 16 53 17 83
+CD 23 B0 12 9C 04 61 3F B0 12 AC 05 17 83 FC 23
+B0 12 9C 04 5E 3F B2 40 F0 0F 0E 02 B2 40 10 00
+10 02 B2 40 80 00 0A 02 D2 42 10 02 0C 02 D2 42
+10 02 0D 02 82 43 12 02 09 43 36 40 0A 02 27 42
+7C 46 B0 12 40 05 17 83 FB 23 16 42 0E 02 17 42
+10 02 36 90 00 01 0A 28 B2 46 14 02 5C 42 14 02
+B0 12 40 05 17 83 5C 42 15 02 01 3C 7C 46 B0 12
+40 05 17 83 EE 23 B2 E3 12 02 5C 42 12 02 B0 12
+40 05 5C 42 13 02 B0 12 40 05 E0 3E 18 42 12 02
+B0 12 AC 05 C2 4C 12 02 B0 12 AC 05 C2 4C 13 02
+38 E3 3B B2 0A 24 86 9A FE FF 07 24 3B B0 20 00
+04 20 16 53 82 46 00 02 2B D3 18 92 12 02 08 23
+2B B3 06 23 30 41 E2 B2 28 00 FD 27 E2 B2 28 00
+FD 23 B2 40 24 02 60 01 E2 B2 28 00 FD 27 15 42
+70 01 05 11 05 11 05 11 82 45 02 02 05 11 82 45
+04 02 B2 80 1E 00 04 02 57 42 16 02 37 80 03 00
+05 11 05 11 17 53 FD 23 35 50 40 A5 82 45 2A 01
+35 42 B2 40 24 02 60 01 92 92 70 01 02 02 FC 2F
+15 83 F7 23 09 43 7C 40 90 00 02 3C 7C 40 A0 00
+C2 43 07 02 C9 EC 12 02 19 E3 1B C3 55 42 07 02
+55 45 56 05 00 55 0C 2E 2E 2E 2E 2E 2E 2E 2E 1A
+34 34 92 42 70 01 72 01 B2 50 0C 00 72 01 07 3C
+1B B3 0B 20 82 43 62 01 92 B3 62 01 FD 27 E2 C3
+21 00 0A 3C 4C 11 F6 2B 1B E3 82 43 62 01 92 B3
+62 01 FD 27 E2 D3 21 00 92 52 02 02 72 01 D2 53
+07 02 F0 90 0C 00 61 FC D1 23 30 41 C2 43 09 02
+1B C3 55 42 09 02 55 45 BC 05 00 55 0C 56 56 56
+56 56 56 56 56 36 76 00 E2 B2 28 00 FD 23 92 42
+70 01 72 01 92 52 04 02 72 01 82 43 62 01 92 B3
+62 01 FD 27 E2 B2 28 00 1E 28 2B D3 1C 3C 4C 10
+1A 3C 82 43 62 01 92 B3 62 01 FD 27 E2 B2 28 00
+01 28 1B E3 1B B3 01 24 2B D3 C9 EC 12 02 19 E3
+0A 3C 82 43 62 01 92 B3 62 01 FD 27 E2 B2 28 00
+E6 2B 4C 10 1B E3 92 52 02 02 72 01 D2 53 09 02
+C0 3F 82 43 62 01 92 B3 62 01 FD 27 E2 B2 28 00
+01 2C 2B D3 30 41
+q
+"""
+
+F4X_BSL = """@0220
+24 02 2E 02 31 40 20 02 2B D2 C0 43 EA FF 32 C2
+F2 C0 32 00 00 00 B2 40 80 5A 20 01 32 D0 40 00
+C2 43 50 00 F2 40 98 00 51 00 F2 C0 80 00 52 00
+D2 D3 21 00 D2 D3 22 00 D2 C3 26 00 E2 C3 22 00
+E2 C3 26 00 B2 40 10 A5 2C 01 B2 40 00 A5 28 01
+3B C0 3A 00 B0 12 DE 04 82 43 12 02 09 43 36 40
+0A 02 37 42 B0 12 B4 05 C6 4C 00 00 16 53 17 83
+F9 23 D2 92 0C 02 0D 02 28 20 55 42 0B 02 75 90
+12 00 80 24 75 90 10 00 6D 24 B0 12 A4 04 55 42
+0B 02 75 90 18 00 31 24 75 90 1E 00 B8 24 75 90
+20 00 17 24 2B B2 11 24 75 90 16 00 22 24 75 90
+14 00 B3 24 75 90 1A 00 18 24 75 90 1C 00 45 24
+04 3C B0 12 3E 05 BE 3F 21 53 B0 12 44 05 BA 3F
+03 43 B0 12 3E 05 D2 42 0E 02 50 00 D2 42 0F 02
+51 00 D2 42 10 02 16 02 AD 3F B0 12 3E 05 10 42
+0E 02 16 42 0E 02 15 43 07 3C 36 40 FE FF B2 40
+06 A5 10 02 35 40 0C 00 B2 40 00 A5 2C 01 92 42
+10 02 28 01 B6 43 00 00 92 B3 2C 01 FD 23 15 83
+F3 23 36 90 FE FF CD 27 37 40 80 00 36 F0 80 FF
+36 90 00 11 0E 28 07 57 36 F0 00 FF 36 90 00 12
+08 28 07 57 36 F0 00 FE 04 3C 16 42 0E 02 17 42
+10 02 35 43 75 96 03 20 17 83 FC 23 B2 3F 82 46
+00 02 B3 3F 36 40 E0 FF 37 40 20 00 B0 12 B4 05
+7C 96 01 24 2B D3 17 83 F9 23 2B C2 B0 12 A4 04
+2B D2 9F 3F 16 42 0E 02 17 42 10 02 2B B2 38 24
+3B D0 10 00 B0 12 B4 05 36 90 00 10 06 2C 36 90
+00 01 09 2C C6 4C 00 00 25 3C B2 40 00 A5 2C 01
+B2 40 40 A5 28 01 16 B3 03 20 C2 4C 14 02 1A 3C
+C2 4C 15 02 86 9A FD FF 08 24 2B D3 3B B0 20 00
+04 20 3B D0 20 00 82 46 00 02 36 90 01 02 04 28
+3B D2 3B B0 10 00 02 24 3B C0 32 00 1A 42 14 02
+86 4A FF FF 16 53 17 83 CD 23 B0 12 A4 04 61 3F
+B0 12 B4 05 17 83 FC 23 B0 12 A4 04 5E 3F B2 40
+F0 0F 0E 02 B2 40 10 00 10 02 B2 40 80 00 0A 02
+D2 42 10 02 0C 02 D2 42 10 02 0D 02 82 43 12 02
+09 43 36 40 0A 02 27 42 7C 46 B0 12 48 05 17 83
+FB 23 16 42 0E 02 17 42 10 02 36 90 00 01 0A 28
+B2 46 14 02 5C 42 14 02 B0 12 48 05 17 83 5C 42
+15 02 01 3C 7C 46 B0 12 48 05 17 83 EE 23 B2 E3
+12 02 5C 42 12 02 B0 12 48 05 5C 42 13 02 B0 12
+48 05 E0 3E 18 42 12 02 B0 12 B4 05 C2 4C 12 02
+B0 12 B4 05 C2 4C 13 02 38 E3 3B B2 0A 24 86 9A
+FE FF 07 24 3B B0 20 00 04 20 16 53 82 46 00 02
+2B D3 18 92 12 02 08 23 2B B3 06 23 30 41 E2 B3
+20 00 FD 27 E2 B3 20 00 FD 23 B2 40 24 02 60 01
+E2 B3 20 00 FD 27 15 42 70 01 05 11 05 11 05 11
+82 45 02 02 05 11 82 45 04 02 B2 80 1E 00 04 02
+57 42 16 02 37 80 03 00 05 11 05 11 17 53 FD 23
+35 50 40 A5 82 45 2A 01 35 42 B2 40 24 02 60 01
+92 92 70 01 02 02 FC 2F 15 83 F7 23 09 43 7C 40
+90 00 02 3C 7C 40 A0 00 C2 43 07 02 C9 EC 12 02
+19 E3 1B C3 55 42 07 02 55 45 5E 05 00 55 0C 2E
+2E 2E 2E 2E 2E 2E 2E 1A 34 34 92 42 70 01 72 01
+B2 50 0C 00 72 01 07 3C 1B B3 0B 20 82 43 62 01
+92 B3 62 01 FD 27 D2 C3 21 00 0A 3C 4C 11 F6 2B
+1B E3 82 43 62 01 92 B3 62 01 FD 27 D2 D3 21 00
+92 52 02 02 72 01 D2 53 07 02 F0 90 0C 00 59 FC
+D1 23 30 41 C2 43 09 02 1B C3 55 42 09 02 55 45
+C4 05 00 55 0C 56 56 56 56 56 56 56 56 36 76 00
+E2 B3 20 00 FD 23 92 42 70 01 72 01 92 52 04 02
+72 01 82 43 62 01 92 B3 62 01 FD 27 E2 B3 20 00
+1E 28 2B D3 1C 3C 4C 10 1A 3C 82 43 62 01 92 B3
+62 01 FD 27 E2 B3 20 00 01 28 1B E3 1B B3 01 24
+2B D3 C9 EC 12 02 19 E3 0A 3C 82 43 62 01 92 B3
+62 01 FD 27 E2 B3 20 00 E6 2B 4C 10 1B E3 92 52
+02 02 72 01 D2 53 09 02 C0 3F 82 43 62 01 92 B3
+62 01 FD 27 E2 B3 20 00 01 2C 2B D3 30 41
+q
+"""
+
+#cpu types for "change baudrate"
+#use strings as ID so that they can be used in outputs too
+F1x                     = "F1x family"
+F4x                     = "F4x family"
+
+#known device list
+deviceids = {
+    0xf149: F1x,
+    0xf16c: F1x, #for telosb
+    0xf112: F1x,
+    0xf413: F4x,
+    0xf123: F1x,
+    0xf449: F4x,
+    0x1232: F1x,
+}
+
+class BSLException(Exception):
+    pass
+
+class LowLevel:
+    "lowlevel communication"
+    #Constants
+    MODE_SSP                = 0
+    MODE_BSL                = 1
+
+    BSL_SYNC                = 0x80
+    BSL_TXPWORD             = 0x10
+    BSL_TXBLK               = 0x12 #Transmit block to boot loader
+    BSL_RXBLK               = 0x14 #Receive  block from boot loader
+    BSL_ERASE               = 0x16 #Erase one segment
+    BSL_MERAS               = 0x18 #Erase complete FLASH memory
+    BSL_CHANGEBAUD          = 0x20 #Change baudrate
+    BSL_LOADPC              = 0x1A #Load PC and start execution
+    BSL_TXVERSION           = 0x1E #Get BSL version
+
+    #Upper limit of address range that might be modified by
+    #"BSL checksum bug".
+    BSL_CRITICAL_ADDR       = 0x0A00
+
+    #Header Definitions
+    CMD_FAILED              = 0x70
+    DATA_FRAME              = 0x80
+    DATA_ACK                = 0x90
+    DATA_NAK                = 0xA0
+
+    QUERY_POLL              = 0xB0
+    QUERY_RESPONSE          = 0x50
+
+    OPEN_CONNECTION         = 0xC0
+    ACK_CONNECTION          = 0x40
+
+    DEFAULT_TIMEOUT         =   1
+    DEFAULT_PROLONG         =  10
+    MAX_FRAME_SIZE          = 256
+    MAX_DATA_BYTES          = 250
+    MAX_DATA_WORDS          = 125
+
+    MAX_FRAME_COUNT         = 16
+
+    #Error messages
+    ERR_COM                 = "Unspecific error"
+    ERR_RX_NAK              = "NAK received (wrong password?)"
+    #ERR_CMD_NOT_COMPLETED   = "Command did not send ACK: indicates that it didn't complete correctly"
+    ERR_CMD_FAILED          = "Command failed, is not defined or is not allowed"
+    ERR_BSL_SYNC            = "Bootstrap loader synchronization error"
+    ERR_FRAME_NUMBER        = "Frame sequence number error."
+
+    def calcChecksum(self, data, length):
+        """Calculates a checksum of "data"."""
+        checksum = 0
+
+        for i in range(length/2):
+            checksum = checksum ^ (ord(data[i*2]) | (ord(data[i*2+1]) << 8))    #xor-ing
+        return 0xffff & (checksum ^ 0xffff)         #inverting
+
+    def __init__(self, aTimeout = None, aProlongFactor = None):
+        """init bsl object, don't connect yet"""
+        if aTimeout is None:
+            self.timeout = self.DEFAULT_TIMEOUT
+        else:
+            self.timeout = aTimeout
+        if aProlongFactor is None:
+            self.prolongFactor = self.DEFAULT_PROLONG
+        else:
+            self.prolongFactor = aProlongFactor
+
+        #flags for inverted use of control pins
+        #used for some hardware
+        self.invertRST = 0
+        self.invertTEST = 0
+	self.swapRSTTEST = 0
+	self.telosLatch = 0
+	self.telosI2C = 0
+        
+        self.protocolMode = self.MODE_BSL
+        self.BSLMemAccessWarning = 0                #Default: no warning.
+        self.slowmode = 0
+
+    def comInit(self, port):
+        """Tries to open the serial port given and
+        initialises the port and variables.
+        The timeout and the number of allowed errors is multiplied by
+        'aProlongFactor' after transmission of a command to give
+        plenty of time to the micro controller to finish the command.
+        Returns zero if the function is successful."""
+        if DEBUG > 1: sys.stderr.write("* comInit()\n")
+        self.seqNo = 0
+        self.reqNo = 0
+        self.rxPtr = 0
+        self.txPtr = 0
+        # Startup-Baudrate: 9600,8,E,1, 1s timeout
+        self.serialport = serial.Serial(
+            port,
+            9600,
+            parity = serial.PARITY_EVEN,
+            timeout = self.timeout
+        )
+        if DEBUG: sys.stderr.write("using serial port %r\n" % self.serialport.portstr)
+        self.SetRSTpin()                        #enable power
+        self.SetTESTpin()                       #enable power
+        self.serialport.flushInput()
+        self.serialport.flushOutput()
+
+    def comDone(self):
+        """Closes the used serial port.
+        This function must be called at the end of a program,
+        otherwise the serial port might not be released and can not be
+        used in other programs.
+        Returns zero if the function is successful."""
+        if DEBUG > 1: sys.stderr.write("* comDone()")
+        self.SetRSTpin(1)                       #disable power
+        self.SetTESTpin(0)                      #disable power
+        self.serialport.close()
+
+    def comRxHeader(self):
+        """receive header and split data"""
+        if DEBUG > 1: sys.stderr.write("* comRxHeader()\n")
+
+        hdr = self.serialport.read(1)
+        if not hdr: raise BSLException("Timeout")
+        rxHeader = ord(hdr) & 0xf0;
+        rxNum    = ord(hdr) & 0x0f;
+
+        if self.protocolMode == self.MODE_BSL:
+            self.reqNo = 0
+            self.seqNo = 0
+            rxNum = 0
+        if DEBUG > 1: sys.stderr.write("* comRxHeader() OK\n")
+        return rxHeader, rxNum
+
+    def comRxFrame(self, rxNum):
+        if DEBUG > 1: sys.stderr.write("* comRxFrame()\n")
+        rxFrame = chr(self.DATA_FRAME | rxNum)
+
+        if DEBUG > 2: sys.stderr.write("  comRxFrame() header...\n")
+        rxFramedata = self.serialport.read(3)
+        if len(rxFramedata) != 3: raise BSLException("Timeout")
+        rxFrame = rxFrame + rxFramedata
+
+        if DEBUG > 3: sys.stderr.write("  comRxFrame() check header...\n")
+        if rxFrame[1] == chr(0) and rxFrame[2] == rxFrame[3]:   #Add. header info. correct?
+            rxLengthCRC = ord(rxFrame[2]) + 2       #Add CRC-Bytes to length
+            if DEBUG > 2: sys.stderr.write("  comRxFrame() receiving data, size: %s\n" % rxLengthCRC)
+
+            rxFramedata = self.serialport.read(rxLengthCRC)
+            if len(rxFramedata) != rxLengthCRC: raise BSLException("Timeout")
+            rxFrame = rxFrame + rxFramedata
+            #Check received frame:
+            if DEBUG > 3: sys.stderr.write("  comRxFrame() crc check\n")
+            #rxLength+4: Length with header but w/o CRC:
+            checksum = self.calcChecksum(rxFrame, ord(rxFrame[2]) + 4)
+            if rxFrame[ord(rxFrame[2])+4] == chr(0xff & checksum) and \
+               rxFrame[ord(rxFrame[2])+5] == chr(0xff & (checksum >> 8)): #Checksum correct?
+                #Frame received correctly (=> send next frame)
+                if DEBUG > 2: sys.stderr.write("* comRxFrame() OK\n")
+                return rxFrame
+            else:
+                if DEBUG: sys.stderr.write("  comRxFrame() Checksum wrong\n")
+        else:
+            if DEBUG: sys.stderr.write("  comRxFrame() Header corrupt %r" % rxFrame)
+        raise BSLException(self.ERR_COM)            #Frame has errors!
+
+    def comTxHeader(self, txHeader):
+        """send header"""
+        if DEBUG > 1: sys.stderr.write("* txHeader()\n")
+        self.serialport.write(txHeader)
+
+    def comTxRx(self, cmd, dataOut, length):
+        """Sends the command cmd with the data given in dataOut to the
+        microcontroller and expects either an acknowledge or a frame
+        with result from the microcontroller.  The results are stored
+        in dataIn (if not a NULL pointer is passed).
+        In this routine all the necessary protocol stuff is handled.
+        Returns zero if the function was successful."""
+        if DEBUG > 1: sys.stderr.write("* comTxRx()\n")
+        txFrame     = []
+        rxHeader    = 0
+        rxNum       = 0
+
+        dataOut = list(dataOut)     #convert to a list for simpler data fill in
+        #Transmitting part ----------------------------------------
+        #Prepare data for transmit
+        if (length % 2) != 0:
+            #/* Fill with one byte to have even number of bytes to send */
+            if self.protocolMode == self.MODE_BSL:
+                dataOut.append(0xFF)  #fill with 0xFF
+            else:
+                dataOut.append(0)     #fill with zero
+
+        txFrame = "%c%c%c%c" % (self.DATA_FRAME | self.seqNo, cmd, len(dataOut), len(dataOut))
+
+        self.reqNo = (self.seqNo + 1) % self.MAX_FRAME_COUNT
+
+        txFrame = txFrame + string.join(dataOut,'')
+        checksum = self.calcChecksum(txFrame, length + 4)
+        txFrame = txFrame + chr(checksum & 0xff)
+        txFrame = txFrame + chr((checksum >> 8) & 0xff)
+
+        accessAddr = (0x0212 + (checksum^0xffff)) & 0xfffe  #0x0212: Address of wCHKSUM
+        if self.BSLMemAccessWarning and accessAddr < self.BSL_CRITICAL_ADDR:
+            sys.stderr.write("WARNING: This command might change data at address %04x or %04x!\n" % (accessAddr, accessAddr + 1))
+
+        self.serialport.flushInput()                #clear receiving queue
+        #TODO: Check after each transmitted character,
+        #TODO: if microcontroller did send a character (probably a NAK!).
+        for c in txFrame:
+            self.serialport.write(c)
+            if DEBUG > 3: sys.stderr.write("\ttx %02x" % ord(c))
+            #if self.serialport.inWaiting(): break  #abort when BSL replies, probably NAK
+        else:
+            if DEBUG > 1: sys.stderr.write( "  comTxRx() transmit OK\n")
+
+        #Receiving part -------------------------------------------
+        rxHeader, rxNum = self.comRxHeader()        #receive header
+        if DEBUG > 1: sys.stderr.write("  comTxRx() rxHeader=0x%02x, rxNum=%d, seqNo=%d, reqNo=%s\n" % (rxHeader, rxNum, self.seqNo, self.reqNo))
+        if rxHeader == self.DATA_ACK:               #acknowledge/OK
+            if DEBUG > 2: sys.stderr.write("  comTxRx() DATA_ACK\n")
+            if rxNum == self.reqNo:
+                self.seqNo = self.reqNo
+                if DEBUG > 2: sys.stderr.write("* comTxRx() DATA_ACK OK\n")
+                return          #Acknowledge received correctly => next frame
+            raise BSLException(self.ERR_FRAME_NUMBER)
+        elif rxHeader == self.DATA_NAK:             #not acknowledge/error
+            if DEBUG > 2: sys.stderr.write("* comTxRx() DATA_NAK\n")
+            raise BSLException(self.ERR_RX_NAK)
+        elif rxHeader == self.DATA_FRAME:           #receive data
+            if DEBUG > 2: sys.stderr.write("* comTxRx() DATA_FRAME\n")
+            if rxNum == self.reqNo:
+                rxFrame = self.comRxFrame(rxNum)
+                return rxFrame
+            raise BSLException(self.ERR_FRAME_NUMBER)
+        elif rxHeader == self.CMD_FAILED:           #Frame ok, but command failed.
+            if DEBUG > 2: sys.stderr.write("*  comTxRx() CMD_FAILED\n")
+            raise BSLException(self.ERR_CMD_FAILED)
+
+        raise BSLException("Unknown header 0x%02x\nAre you downloading to RAM into an old device that requires the patch? Try option -U" % rxHeader)
+
+    def SetDTR(self, level, invert):
+        """Controls DTR pin (0: GND; 1: VCC; unless inverted flag is set)"""
+        if invert:
+            self.serialport.setDTR(not level)
+        else:
+            self.serialport.setDTR(level)
+        if self.slowmode:
+            time.sleep(0.040)
+
+    def SetRTS(self, level, invert):
+        """Controls RTS pin (0: GND; 1: VCC; unless inverted flag is set)"""
+        if invert:
+            self.serialport.setRTS(not level)
+        else:
+            self.serialport.setRTS(level)
+        if self.slowmode:
+            time.sleep(0.040)
+
+    def SetRSTpin(self, level=1):
+        """Controls RST/NMI pin (0: GND; 1: VCC; unless inverted flag is set)"""
+        if self.swapRSTTEST:
+            self.SetRTS(level, self.invertRST)
+        else:
+            self.SetDTR(level, self.invertRST)
+
+    def SetTESTpin(self, level=1):
+        """Controls TEST pin (inverted on board: 0: VCC; 1: GND; unless inverted flag is set)"""
+        if self.swapRSTTEST:
+            self.SetDTR(level, self.invertTEST)
+        else:
+            self.SetRTS(level, self.invertTEST)
+
+    def telosSetSCL(self, level):
+        self.serialport.setRTS(not level)
+
+    def telosSetSDA(self, level):
+        self.serialport.setDTR(not level)
+
+    def telosI2CStart(self):
+	self.telosSetSDA(1)
+	self.telosSetSCL(1)
+	self.telosSetSDA(0)
+
+    def telosI2CStop(self):
+	self.telosSetSDA(0)
+	self.telosSetSCL(1)
+	self.telosSetSDA(1)
+
+    def telosI2CWriteBit(self, bit):
+	self.telosSetSCL(0)
+	self.telosSetSDA(bit)
+        time.sleep(2e-6)
+	self.telosSetSCL(1)
+        time.sleep(1e-6)
+	self.telosSetSCL(0)
+
+    def telosI2CWriteByte(self, byte):
+        self.telosI2CWriteBit( byte & 0x80 );
+        self.telosI2CWriteBit( byte & 0x40 );
+        self.telosI2CWriteBit( byte & 0x20 );
+        self.telosI2CWriteBit( byte & 0x10 );
+        self.telosI2CWriteBit( byte & 0x08 );
+        self.telosI2CWriteBit( byte & 0x04 );
+        self.telosI2CWriteBit( byte & 0x02 );
+        self.telosI2CWriteBit( byte & 0x01 );
+        self.telosI2CWriteBit( 0 );  # "acknowledge"
+
+    def telosI2CWriteCmd(self, addr, cmdbyte):
+	self.telosI2CStart()
+        self.telosI2CWriteByte( 0x90 | (addr << 1) )
+	self.telosI2CWriteByte( cmdbyte )
+	self.telosI2CStop()
+
+    def telosBReset(self,invokeBSL=0):
+
+	# "BSL entry sequence at dedicated JTAG pins"
+        # rst !s0: 0 0 0 0 1 1
+	# tck !s1: 1 0 1 0 0 1
+        #   s0|s1: 1 3 1 3 2 0
+
+	# "BSL entry sequence at shared JTAG pins"
+        # rst !s0: 0 0 0 0 1 1
+	# tck !s1: 0 1 0 1 1 0
+        #   s0|s1: 3 1 3 1 0 2
+
+	if invokeBSL:
+	  self.telosI2CWriteCmd(0,1)
+	  self.telosI2CWriteCmd(0,3)
+	  self.telosI2CWriteCmd(0,1)
+	  self.telosI2CWriteCmd(0,3)
+	  self.telosI2CWriteCmd(0,2)
+	  self.telosI2CWriteCmd(0,0)
+	else:
+	  self.telosI2CWriteCmd(0,3)
+	  self.telosI2CWriteCmd(0,2)
+	self.telosI2CWriteCmd(0,0)
+        time.sleep(0.250)       #give MSP430's oscillator time to stabilize
+	self.serialport.flushInput()  #clear buffers
+
+    def bslReset(self, invokeBSL=0):
+        """Applies BSL entry sequence on RST/NMI and TEST/VPP pins
+        Parameters:
+            invokeBSL = 1: complete sequence
+            invokeBSL = 0: only RST/NMI pin accessed
+
+        RST is inverted twice on boot loader hardware
+        TEST is inverted (only once)
+        Need positive voltage on DTR, RTS for power-supply of hardware"""
+	if self.telosI2C:
+	  self.telosBReset(invokeBSL)
+	  return
+
+        if DEBUG > 1: sys.stderr.write("* bslReset(invokeBSL=%s)\n" % invokeBSL)
+        self.SetRSTpin(1)       #power suply
+        self.SetTESTpin(1)      #power suply
+        time.sleep(0.250)       #charge capacitor on boot loader hardware
+
+	if self.telosLatch:
+	  self.SetTESTpin(0)
+	  self.SetRSTpin(0)
+	  self.SetTESTpin(1)
+
+        self.SetRSTpin(0)       #RST  pin: GND
+        if invokeBSL:
+            self.SetTESTpin(1)  #TEST pin: GND
+            self.SetTESTpin(0)  #TEST pin: Vcc
+            self.SetTESTpin(1)  #TEST pin: GND
+            self.SetTESTpin(0)  #TEST pin: Vcc
+            self.SetRSTpin (1)  #RST  pin: Vcc
+            self.SetTESTpin(1)  #TEST pin: GND
+        else:
+            self.SetRSTpin(1)   #RST  pin: Vcc
+        time.sleep(0.250)       #give MSP430's oscillator time to stabilize
+
+        self.serialport.flushInput()    #clear buffers
+
+    def bslSync(self,wait=0):
+        """Transmits Synchronization character and expects to receive Acknowledge character
+        if wait is 0 it must work the first time. otherwise if wait is 1
+        it is retried (forever).
+        """
+        loopcnt = 5                                 #Max. tries to get synchronization
+
+        if DEBUG > 1: sys.stderr.write("* bslSync(wait=%d)\n" % wait)
+        while wait or loopcnt:
+            loopcnt = loopcnt - 1                   #count down tries
+            self.serialport.flushInput()            #clear input, in case a prog is running
+
+            self.serialport.write(chr(self.BSL_SYNC))   #Send synchronization byte
+            c = self.serialport.read(1)             #read answer
+            if c == chr(self.DATA_ACK):             #ACk
+                if DEBUG > 1: sys.stderr.write("  bslSync() OK\n")
+                return                              #Sync. successful
+            elif not c:                             #timeout
+                    if loopcnt > 4:
+                        if DEBUG > 1:
+                            sys.stderr.write("  bslSync() timeout, retry ...\n")
+                    elif loopcnt == 4:
+                        #nmi may have caused the first reset to be ignored, try again
+                        self.bslReset(0) 
+                        self.bslReset(1)
+                    elif loopcnt > 0:
+                        if DEBUG > 1:
+                            sys.stderr.write("  bslSync() timeout, retry ...\n")
+                    else :
+                        if DEBUG > 1:
+                            sys.stderr.write("  bslSync() timeout\n")
+            else:                                   #garbage
+                if DEBUG > 1: sys.stderr.write("  bslSync() failed (0x%02x), retry ...\n" % ord(c))
+                
+                raise BSLException(self.ERR_BSL_SYNC)       #Sync. failed
+
+    def bslTxRx(self, cmd, addr, length = 0, blkout = None, wait=0):
+        """Transmits a command (cmd) with its parameters:
+        start-address (addr), length (len) and additional
+        data (blkout) to boot loader.
+        wait specified if the bsl sync should be tried once or
+        repeated, forever
+        Parameters return by boot loader are passed via blkin.
+        """
+        if DEBUG > 1: sys.stderr.write("* bslTxRx()\n")
+
+        if cmd == self.BSL_TXBLK:
+            #Align to even start address
+            if (addr % 2) != 0:
+                addr = addr - 1                     #Decrement address and
+                blkout = chr(0xFF) + blkOut         #fill first byte of blkout with 0xFF
+                length = length + 1
+            #Make sure that len is even
+            if (length % 2) != 0:
+                blkout = blkout + chr(0xFF)         #Inc. len and fill last byte of blkout with 0xFF
+                length = length + 1
+
+        elif cmd == self.BSL_RXBLK:
+            #Align to even start address
+            if (addr % 2) != 0:
+                addr = addr - 1                     #Decrement address but
+                length = length + 1                 #request an additional byte
+            #Make sure that len is even
+            if (length % 2) != 0:
+                length = length + 1
+
+        #if cmd == self.BSL_TXBLK or cmd == self.BSL_TXPWORD:
+        #    length = len + 4
+
+        #Add necessary information data to frame
+        dataOut =  struct.pack("<HH", addr, length)
+
+        if blkout: #Copy data out of blkout into frame
+            dataOut = dataOut + blkout
+
+        self.bslSync(wait)                          #synchronize BSL
+        rxFrame = self.comTxRx(cmd, dataOut, len(dataOut))  #Send frame
+        if rxFrame:                                 #test answer
+            return rxFrame[4:] #return only data w/o [hdr,null,len,len]
+        else:
+            return rxFrame
+
+
+class Segment:
+    """store a string with memory contents along with its startaddress"""
+    def __init__(self, startaddress = 0, data=None):
+        if data is None:
+            self.data = ''
+        else:
+            self.data = data
+        self.startaddress = startaddress
+
+    def __getitem__(self, index):
+        return self.data[index]
+
+    def __len__(self):
+        return len(self.data)
+
+    def __repr__(self):
+        return "Segment(startaddress = 0x%04x, data=%r)" % (self.startaddress, self.data)
+
+class Memory:
+    """represent memory contents. with functions to load files"""
+    def __init__(self, filename=None):
+        self.segments = []
+        if filename:
+            self.filename = filename
+            self.loadFile(filename)
+
+    def append(self, seg):
+        self.segments.append(seg)
+
+    def __getitem__(self, index):
+        return self.segments[index]
+
+    def __len__(self):
+        return len(self.segments)
+
+    def loadIHex(self, file):
+        """load data from a (opened) file in Intel-HEX format"""
+        segmentdata = []
+        currentAddr = 0
+        startAddr   = 0
+        lines = file.readlines()
+        for l in lines:
+            if l[0] != ':': raise BSLException("File Format Error\n")
+            l = l.strip()       #fix CR-LF issues...
+            length  = int(l[1:3],16)
+            address = int(l[3:7],16)
+            type    = int(l[7:9],16)
+            check   = int(l[-2:],16)
+            if type == 0x00:
+                if currentAddr != address:
+                    if segmentdata:
+                        self.segments.append( Segment(startAddr, string.join(segmentdata,'')) )
+                    startAddr = currentAddr = address
+                    segmentdata = []
+                for i in range(length):
+                    segmentdata.append( chr(int(l[9+2*i:11+2*i],16)) )
+                currentAddr = length + currentAddr
+            elif type in (0x01, 0x02, 0x03, 0x04, 0x05):
+                pass
+            else:
+                sys.stderr.write("Ignored unknown field (type 0x%02x) in ihex file.\n" % type)
+        if segmentdata:
+            self.segments.append( Segment(startAddr, string.join(segmentdata,'')) )
+
+    def loadTIText(self, file):
+        """load data from a (opened) file in TI-Text format"""
+        next        = 1
+        startAddr   = 0
+        segmentdata = []
+        #Convert data for MSP430, TXT-File is parsed line by line
+        while next >= 1:
+            #Read one line
+            l = file.readline()
+            if not l: break #EOF
+            l = l.strip()
+            if l[0] == 'q': break
+            elif l[0] == '@':        #if @ => new address => send frame and set new addr.
+                #create a new segment
+                if segmentdata:
+                    self.segments.append( Segment(startAddr, string.join(segmentdata,'')) )
+                startAddr = int(l[1:],16)
+                segmentdata = []
+            else:
+                for i in string.split(l):
+                    segmentdata.append(chr(int(i,16)))
+        if segmentdata:
+            self.segments.append( Segment(startAddr, string.join(segmentdata,'')) )
+
+    def loadELF(self, file):
+        """load data from a (opened) file in ELF object format.
+        File must be seekable"""
+        import elf
+        obj = elf.ELFObject()
+        obj.fromFile(file)
+        if obj.e_type != elf.ELFObject.ET_EXEC:
+            raise Exception("No executable")
+        for section in obj.getSections():
+            if DEBUG:
+                sys.stderr.write("ELF section %s at 0x%04x %d bytes\n" % (section.name, section.lma, len(section.data)))
+            if len(section.data):
+                self.segments.append( Segment(section.lma, section.data) )
+        
+    def loadFile(self, filename):
+        """fill memory with the contents of a file. file type is determined from extension"""
+        #TODO: do a contents based detection
+        if filename[-4:].lower() == '.txt':
+            self.loadTIText(open(filename, "rb"))
+        elif filename[-4:].lower() in ('.a43', '.hex'):
+            self.loadIHex(open(filename, "rb"))
+        else:
+            self.loadELF(open(filename, "rb"))
+
+    def getMemrange(self, fromadr, toadr):
+        """get a range of bytes from the memory. unavailable values are filled with 0xff."""
+        res = ''
+        toadr = toadr + 1   #python indxes are excluding end, so include it
+        while fromadr < toadr:
+            #print "fromto: %04x %04x" % (fromadr, toadr)
+            for seg in self.segments:
+                #print seg
+                segend = seg.startaddress + len(seg.data)
+                if seg.startaddress <= fromadr and fromadr < segend:
+                    #print "startok 0x%04x %d" % (seg.startaddress, len(seg.data))
+                    #print ("0x%04x "*3) % (segend, fromadr, toadr)
+                    if toadr > segend:   #not all data in segment
+                        #print "out of segment"
+                        catchlength = segend-fromadr
+                    else:
+                        catchlength = toadr-fromadr
+                    #print toadr-fromadr
+                    #print catchlength
+                    res = res + seg.data[fromadr-seg.startaddress : fromadr-seg.startaddress+catchlength]
+                    fromadr = fromadr + catchlength    #adjust start
+                    if len(res) >= toadr-fromadr:
+                        break#return res
+            else:
+                    res = res + chr(255)
+                    fromadr = fromadr + 1 #adjust start
+                    #print "fill FF"
+        #print "res: %r" % res
+        return res
+
+
+class BootStrapLoader(LowLevel):
+    """higher level Bootstrap Loader functions."""
+
+    ERR_VERIFY_FAILED       = "Error: verification failed"
+    ERR_ERASE_CHECK_FAILED  = "Error: erase check failed"
+
+    ACTION_PROGRAM          = 0x01 #Mask: program data
+    ACTION_VERIFY           = 0x02 #Mask: verify data
+    ACTION_ERASE_CHECK      = 0x04 #Mask: erase check
+
+    #Max. bytes sent within one frame if parsing a TI TXT file.
+    #( >= 16 and == n*16 and <= MAX_DATA_BYTES!)
+    MAXDATA                 = 240-16
+
+
+    def __init__(self, *args, **kargs):
+        LowLevel.__init__(self, *args, **kargs)
+        self.byteCtr        = 0
+        self.meraseCycles   = 1
+        self.patchRequired  = 0
+        self.patchLoaded    = 0
+        self.bslVer         = 0
+        self.passwd         = None
+        self.data           = None
+        self.maxData        = self.MAXDATA
+        self.cpu            = None
+
+
+    def preparePatch(self):
+        """prepare to download patch"""
+        if DEBUG > 1: sys.stderr.write("* preparePatch()\n")
+
+        if self.patchLoaded:
+            #Load PC with 0x0220.
+            #This will invoke the patched bootstrap loader subroutines.
+            self.bslTxRx(self.BSL_LOADPC,           #Command: Load PC
+                           0x0220)                  #Address to load into PC
+            self.BSLMemAccessWarning = 0 #Error is removed within workaround code
+        return
+
+    def postPatch(self):
+        """setup after the patch is loaded"""
+        if DEBUG > 1: sys.stderr.write("* postPatch()\n")
+        if self.patchLoaded:
+            self.BSLMemAccessWarning = 1                #Turn warning back on.
+
+
+    def verifyBlk(self, addr, blkout, action):
+        """verify memory against data or 0xff"""
+        if DEBUG > 1: sys.stderr.write("* verifyBlk()\n")
+
+        if action & self.ACTION_VERIFY or action & self.ACTION_ERASE_CHECK:
+            if DEBUG: sys.stderr.write("  Check starting at 0x%04x, %d bytes ... \n" % (addr, len(blkout)))
+
+            self.preparePatch()
+            blkin = self.bslTxRx(self.BSL_RXBLK, addr, len(blkout))
+            self.postPatch()
+
+            for i in range(len(blkout)):
+                if action & self.ACTION_VERIFY:
+                    #Compare data in blkout and blkin
+                    if blkin[i] != blkout[i]:
+                        sys.stderr.write("Verification failed at 0x%04x (0x%02x, 0x%02x)\n" % (addr+i, ord(blkin[i]), ord(blkout[i])))
+                        sys.stderr.flush()
+                        raise BSLException(self.ERR_VERIFY_FAILED)      #Verify failed!
+                    continue
+                elif action & self.ACTION_ERASE_CHECK:
+                    #Compare data in blkin with erase pattern
+                    if blkin[i] != chr(0xff):
+                        sys.stderr.write("Erase Check failed at 0x%04x (0x%02x)\n" % (addr+i, ord(blkin[i])))
+                        sys.stderr.flush()
+                        raise BSLException(self.ERR_ERASE_CHECK_FAILED) #Erase Check failed!
+                    continue
+
+    def programBlk(self, addr, blkout, action):
+        """programm a memory block"""
+        if DEBUG > 1: sys.stderr.write("* programBlk()\n")
+
+        #Check, if specified range is erased
+        self.verifyBlk(addr, blkout, action & self.ACTION_ERASE_CHECK)
+
+        if action & self.ACTION_PROGRAM:
+            if DEBUG: sys.stderr.write("  Program starting at 0x%04x, %i bytes ...\n" % (addr, len(blkout)))
+            self.preparePatch()
+            #Program block
+            self.bslTxRx(self.BSL_TXBLK, addr, len(blkout), blkout)
+            self.postPatch()
+
+        #Verify block
+        self.verifyBlk(addr, blkout, action & self.ACTION_VERIFY)
+
+    #segments:
+    #list of tuples or lists:
+    #segements = [ (addr1, [d0,d1,d2,...]), (addr2, [e0,e1,e2,...])]
+    def programData(self, segments, action):
+        """programm or verify data"""
+        if DEBUG > 1: sys.stderr.write("* programData()\n")
+        for seg in segments:
+            currentAddr = seg.startaddress
+            pstart = 0
+            while pstart<len(seg.data):
+                length = self.MAXDATA
+                if pstart+length > len(seg.data):
+                    length = len(seg.data) - pstart
+                self.programBlk(currentAddr, seg.data[pstart:pstart+length], action)
+                pstart = pstart + length
+                currentAddr = currentAddr + length
+                self.byteCtr = self.byteCtr + length #total sum
+
+    def uploadData(self, startaddress, size, wait=0):
+        """upload a datablock"""
+        if DEBUG > 1: sys.stderr.write("* uploadData()\n")
+        data = ''
+        pstart = 0
+        while pstart<size:
+            length = self.maxData
+            if pstart+length > size:
+                length = size - pstart
+            data = data + self.bslTxRx(self.BSL_RXBLK,
+                                       pstart+startaddress,
+                                       length,
+                                       wait=wait)[:-2] #cut away checksum
+            pstart = pstart + length
+        return data
+
+    def txPasswd(self, passwd=None, wait=0):
+        """transmit password, default if None is given."""
+        if DEBUG > 1: sys.stderr.write("* txPassword(%r)\n" % passwd)
+        if passwd is None:
+            #Send "standard" password to get access to protected functions.
+            sys.stderr.write("Transmit default password ...\n")
+            sys.stderr.flush()
+            #Flash is completely erased, the contents of all Flash cells is 0xff
+            passwd = chr(0xff)*32
+        else:
+            #sanity check of password
+            if len(passwd) != 32:
+                raise ValueError, "password has wrong length (%d)\n" % len(passwd)
+            sys.stderr.write('Transmit password ...\n')
+            sys.stderr.flush()
+        #send the password
+        self.bslTxRx(self.BSL_TXPWORD,      #Command: Transmit Password
+                       0xffe0,              #Address of interupt vectors
+                       0x0020,              #Number of bytes
+                       passwd,              #password
+                       wait=wait)           #if wait is 1, try to sync forever
+
+
+    #-----------------------------------------------------------------
+
+    def actionMassErase(self):
+        """Erase the flash memory completely (with mass erase command)"""
+        sys.stderr.write("Mass Erase...\n")
+        sys.stderr.flush()
+        self.bslReset(1)                            #Invoke the boot loader.
+        for i in range(self.meraseCycles):
+            if i == 1: sys.stderr.write("Additional Mass Erase Cycles...\n")
+            self.bslTxRx(self.BSL_MERAS,            #Command: Mass Erase
+                                0xff00,             #Any address within flash memory.
+                                0xa506)             #Required setting for mass erase!
+        self.passwd = None                          #No password file required!
+        #print "Mass Erase complete"
+        #Transmit password to get access to protected BSL functions.
+        self.txPasswd()
+
+    def actionStartBSL(self, usepatch=1, adjsp=1, replacementBSL=None, forceBSL=0, mayuseBSL=0, speed=None, bslreset=1):
+        """start BSL, download patch if desired and needed, adjust SP if desired"""
+        sys.stderr.write("Invoking BSL...\n")
+        sys.stderr.flush()
+        if bslreset:
+            self.bslReset(1)                        #Invoke the boot loader.
+        self.txPasswd(self.passwd)                  #transmit password
+
+        #Read actual bootstrap loader version.
+        #sys.stderr.write("Reading BSL version ...\n")
+        blkin = self.bslTxRx(self.BSL_RXBLK,        #Command: Read/Receive Block
+                          0x0ff0,                   #Start address
+                          16)                       #No. of bytes to read
+        dev_id, bslVerHi, bslVerLo = struct.unpack(">H8xBB4x", blkin[:-2]) #cut away checksum and extract data
+
+        if self.cpu is None:                        #cpy type forced?
+            if deviceids.has_key(dev_id):
+                self.cpu = deviceids[dev_id]        #try to autodectect CPU type
+                if DEBUG:
+                    sys.stderr.write("Autodetect successful: %04x -> %s\n" % (dev_id, self.cpu))
+            else:
+                sys.stderr.write("Autodetect failed! Unkown ID: %04x. Trying to continue anyway.\n" % dev_id)
+                self.cpu = F1x                      #assume something and try anyway..
+
+        sys.stderr.write("Current bootstrap loader version: %x.%x (Device ID: %04x)\n" % (bslVerHi, bslVerLo, dev_id))
+        sys.stderr.flush()
+        self.bslVer = (bslVerHi << 8) | bslVerLo
+
+        if self.bslVer <= 0x0110:                   #check if patch is needed
+            self.BSLMemAccessWarning = 1
+        else:
+            self.BSLMemAccessWarning = 0 #Fixed in newer versions of BSL.
+
+        if self.bslVer <= 0x0130 and adjsp:
+            #only do this on BSL where it's needed to prevent
+            #malfunction with F4xx devices/ newer ROM-BSLs
+            
+            #Execute function within bootstrap loader
+            #to prepare stack pointer for the following patch.
+            #This function will lock the protected functions again.
+            sys.stderr.write("Adjust SP. Load PC with 0x0C22 ...\n")
+            self.bslTxRx(self.BSL_LOADPC,           #Command: Load PC
+                                0x0C22)             #Address to load into PC
+            #Re-send password to re-gain access to protected functions.
+            self.txPasswd(self.passwd)
+
+        #get internal BSL replacement if needed or forced by the user
+        #required if speed is set but an old BSL is in the device
+        #if a BSL is given by the user, that one is used and not the internal one
+        if ((mayuseBSL and speed and self.bslVer < 0x0150) or forceBSL) and replacementBSL is None:
+            replacementBSL = Memory() #File to program
+            if self.cpu == F4x:
+                if DEBUG:
+                    sys.stderr.write("Using built in BSL replacement for F4x devices\n")
+                    sys.stderr.flush()
+                replacementBSL.loadTIText(cStringIO.StringIO(F4X_BSL))  #parse embedded BSL
+            else:
+                if DEBUG:
+                    sys.stderr.write("Using built in BSL replacement for F1x devices\n")
+                    sys.stderr.flush()
+                replacementBSL.loadTIText(cStringIO.StringIO(F1X_BSL))  #parse embedded BSL
+    
+        #now download the new BSL, if allowed and needed (version lower than the
+        #the replacement) or forced
+        if replacementBSL is not None:
+            self.actionDownloadBSL(replacementBSL)
+
+        #debug message with the real BSL version in use (may have changed after replacement BSL)
+        if DEBUG:
+            sys.stderr.write("Current bootstrap loader version: 0x%04x\n" % (self.bslVer,))
+            sys.stderr.flush()
+
+        #now apply workarounds or patches if BSL in use requires that
+        if self.bslVer <= 0x0110:                   #check if patch is needed
+            if usepatch:                            #test if patch is desired
+                sys.stderr.write("Patch for flash programming required!\n")
+                self.patchRequired = 1
+
+                sys.stderr.write("Load and verify patch ...\n")
+                sys.stderr.flush()
+                #Programming and verification is done in one pass.
+                #The patch file is only read and parsed once.
+                segments = Memory()                     #data to program
+                segments.loadTIText(cStringIO.StringIO(PATCH))  #parse embedded patch
+                #program patch
+                self.programData(segments, self.ACTION_PROGRAM | self.ACTION_VERIFY)
+                self.patchLoaded = 1
+            else:
+                if DEBUG:
+                    sys.stderr.write("Device needs patch, but not applied (usepatch is false).\n")    #message if not patched
+
+        #should the baudrate be changed?
+        if speed is not None:
+            self.actionChangeBaudrate(speed)            #change baudrate
+
+    def actionDownloadBSL(self, bslsegments):
+        sys.stderr.write("Load new BSL into RAM...\n")
+        sys.stderr.flush()
+        self.programData(bslsegments, self.ACTION_PROGRAM)
+        sys.stderr.write("Verify new BSL...\n")
+        sys.stderr.flush()
+        self.programData(bslsegments, self.ACTION_VERIFY) #File to verify
+
+        #Read startvector of bootstrap loader
+        #blkin = self.bslTxRx(self.BSL_RXBLK, 0x0300, 2)
+        #blkin = self.bslTxRx(self.BSL_RXBLK, 0x0220, 2)
+        blkin = self.bslTxRx(self.BSL_RXBLK, bslsegments[0].startaddress, 2)
+        startaddr = struct.unpack("<H", blkin[:2])[0]
+
+        sys.stderr.write("Starting new BSL at 0x%04x...\n" % startaddr)
+        sys.stderr.flush()
+        self.bslTxRx(self.BSL_LOADPC,  #Command: Load PC
+                     startaddr)        #Address to load into PC
+
+        #BSL-Bugs should be fixed within "new" BSL
+        self.BSLMemAccessWarning = 0
+        self.patchRequired = 0
+        self.patchLoaded   = 0
+
+        #Re-send password to re-gain access to protected functions.
+        self.txPasswd(self.passwd)
+
+        #update version info
+        #verison only valid for the internal ones, but it also makes sure 
+        #that the patches are not applied if the user d/ls one
+        self.bslVer = 0x0150
+
+    def actionEraseCheck(self):
+        """check the erasure of required flash cells."""
+        sys.stderr.write("Erase Check by file ...\n")
+        sys.stderr.flush()
+        if self.data is not None:
+            self.programData(self.data, self.ACTION_ERASE_CHECK)
+        else:
+            raise BSLException, "cannot do erase check against data with not knowing the actual data"
+
+    def actionProgram(self):
+        """program data into flash memory."""
+        if self.data is not None:
+            sys.stderr.write("Program ...\n")
+            sys.stderr.flush()
+            self.programData(self.data, self.ACTION_PROGRAM)
+            sys.stderr.write("%i bytes programmed.\n" % self.byteCtr)
+            sys.stderr.flush()
+        else:
+            raise BSLException, "programming without data not possible"
+
+    def actionVerify(self):
+        """Verify programmed data"""
+        if self.data is not None:
+            sys.stderr.write("Verify ...\n")
+            sys.stderr.flush()
+            self.programData(self.data, self.ACTION_VERIFY)
+        else:
+            raise BSLException, "verify without data not possible"
+
+    def actionReset(self):
+        """perform a reset, start user programm"""
+        sys.stderr.write("Reset device ...\n")
+        sys.stderr.flush()
+        self.bslReset(0) #only reset
+
+    def actionRun(self, address=0x220):
+        """start program at specified address"""
+        sys.stderr.write("Load PC with 0x%04x ...\n" % address)
+        sys.stderr.flush()
+        self.bslTxRx(self.BSL_LOADPC, #Command: Load PC
+                            address)  #Address to load into PC
+
+    #table with values from slaa089a.pdf
+    bauratetable = {
+        F1x: {
+             9600:[0x8580, 0x0000],
+            19200:[0x86e0, 0x0001],
+            38400:[0x87e0, 0x0002],
+        },
+        F4x: {
+             9600:[0x9800, 0x0000],
+            19200:[0xb000, 0x0001],
+            38400:[0xc800, 0x0002],
+        },
+    }
+    def actionChangeBaudrate(self, baudrate=9600):
+        """change baudrate. first the command is sent, then the comm
+        port is reprogrammed. only possible with newer MSP430-BSL versions.
+        (ROM >=1.6, downloadable >=1.5)"""
+        try:
+            baudconfigs = self.bauratetable[self.cpu]
+        except KeyError:
+            raise ValueError, "unknown CPU type %s, can't switch baudrate" % self.cpu
+        try:
+            a,l = baudconfigs[baudrate]
+        except KeyError:
+            raise ValueError, "baudrate not valid. valid values are %r" % baudconfigs.keys()
+        
+        sys.stderr.write("Changing baudrate to %d ...\n" % baudrate)
+        sys.stderr.flush()
+        self.bslTxRx(self.BSL_CHANGEBAUD,   #Command: change baudrate
+                    a, l)                   #args are coded in adr and len
+        time.sleep(0.010)                   #recomended delay
+        self.serialport.setBaudrate(baudrate)
+
+    def actionReadBSLVersion(self):
+        """informational output of BSL version number.
+        (newer MSP430-BSLs only)"""
+        ans = self.bslTxRx(self.BSL_TXVERSION, 0) #Command: receive version info
+        #the following values are in big endian style!!!
+        family_type, bsl_version = struct.unpack(">H8xH4x", ans[:-2]) #cut away checksum and extract data
+        print "Device Type: 0x%04x\nBSL version: 0x%04x\n" % (family_type, bsl_version)
+
+
+def usage():
+    """print some help message"""
+    sys.stderr.write("""
+USAGE: %s [options] [file]
+Version: %s
+
+If "-" is specified as file the data is read from the stdinput.
+A file ending with ".txt" is considered to be in TIText format,
+'.a43' and '.hex' as IntelHex and all other filenames are
+considered as ELF files.
+
+General options:
+  -h, --help            Show this help screen.
+  -c, --comport=port    Specify the communication port to be used.
+                        (Default is 0)
+                                0->COM1 / ttyS0
+                                1->COM2 / ttyS1
+                                etc.
+  -P, --password=file   Specify a file with the interrupt vectors that
+                        are used as password. This can be any file that
+                        has previously been used to program the device.
+                        (e.g. -P INT_VECT.TXT).
+  -f, --framesize=num   Max. number of data bytes within one transmitted
+                        frame (16 to 240 in steps of 16) (e.g. -f 240).
+  -m, --erasecycles=num Number of mass erase cycles (default is 1). Some
+                        old F149 devices need additional erase cycles.
+                        On newer devices it is no longer needed. (e.g. for
+                        an old F149: -m20)
+  -U, --unpatched       Do not download the BSL patch, even when it is
+                        needed. This is used when a program is downloaded
+                        into RAM and executed from there (and where flash
+                        programming is not needed.)
+  -D, --debug           Increase level of debug messages. This won't be
+                        very useful for the average user...
+  -I, --intelhex        Force fileformat to IntelHex
+  -T, --titext          Force fileformat to be TIText
+  -N, --notimeout       Don't use timeout on serial port (use with care)
+  -B, --bsl=bsl.txt     Load and use new BSL from the TI Text file
+  -S, --speed=baud      Reconfigure speed, only possible with newer
+                        MSP403-BSL versions (>1.5, read slaa089a.pdf for
+                        details). If the --bsl option is not used, an
+                        internal BSL replacement will be loaded.
+                        Needs a target with at least 2kB RAM!
+                        Possible values are 9600, 19200, 38400
+                        (default 9600)
+  -1, --f1x             Specify CPU family, in case autodetect fails
+  -4, --f4x             Specify CPU family, in case autodetect fails
+                        --F1x and --f2x are only needed when the "change
+                        baudrate" feature is used and the autodetect feature
+                        fails. If the device ID that is uploaded is known, it
+                        has precedence to the command line option.
+  --invert-reset        Invert signal on RST pin (used for some BSL hardware)
+  --invert-test         Invert signal on TEST/TCK pin (used for some BSL
+                        hardware)
+  --swap-reset-test     Swap the RST and TEST pins (used for some BSL hardware)
+  --telos-latch         Special twiddle in BSL reset for Telos hardware
+  --telos-i2c           DTR/RTS map via an I2C switch to TCK/RST in Telos Rev.B
+  --telos               Implies options --invert-reset, --invert-test, 
+                        --swap-reset-test, and --telos-latch
+  --telosb              Implies options --swap-reset-test, --telos-i2c,
+                        --no-BSL-download, and --speed=38400
+  --tmote               Identical operation to --telosb
+  --no-BSL-download     Do not download replacement BSL (disable automatic)
+  --force-BSL-download  Download replacement BSL even if not needed (the one
+                        in the device would have the required features)
+  --slow                Add delays when operating the conrol pins. Useful if
+                        the pins/circuit has high capacitance.
+
+Program Flow Specifiers:
+  -e, --masserase       Mass Erase (clear all flash memory)
+  -E, --erasecheck      Erase Check by file
+  -p, --program         Program file
+  -v, --verify          Verify by file
+
+The order of the above options matters! The table is ordered by normal
+execution order. For the options "Epv" a file must be specified.
+Program flow specifiers default to "pvr" if a file is given.
+Don't forget to specify "e" or "eE" when programming flash!
+
+Data retreiving:
+  -u, --upload=addr     Upload a datablock (see also: -s).
+  -s, --size=num        Size of the data block do upload. (Default is 2)
+  -x, --hex             Show a hexadecimal display of the uploaded data.
+                        (Default)
+  -b, --bin             Get binary uploaded data. This can be used
+                        to redirect the output into a file.
+
+Do before exit:
+  -g, --go=address      Start programm execution at specified address.
+                        This implies option --wait.
+  -r, --reset           Reset connected MSP430. Starts application.
+                        This is a normal device reset and will start
+                        the programm that is specified in the reset
+                        vector. (see also -g)
+  -w, --wait            Wait for <ENTER> before closing serial port.
+
+If it says "NAK received" it's probably because you specified no or a
+wrong password.
+""" % (sys.argv[0], VERSION))
+
+#add some arguments to a function, but don't call it yet, instead return
+#a wrapper object for later invocation
+class curry:
+    """create a callable with some arguments specified in advance"""
+    def __init__(self, fun, *args, **kwargs):
+        self.fun = fun
+        self.pending = args[:]
+        self.kwargs = kwargs.copy()
+
+    def __call__(self, *args, **kwargs):
+        if kwargs and self.kwargs:
+            kw = self.kwargs.copy()
+            kw.update(kwargs)
+        else:
+            kw = kwargs or self.kwargs
+        return apply(self.fun, self.pending + args, kw)
+
+    def __repr__(self):
+        #first try if it a function
+        try:
+            return "curry(%s, %r, %r)" % (self.fun.func_name, self.pending, self.kwargs)
+        except AttributeError:
+            #fallback for callable classes
+            return "curry(%s, %r, %r)" % (self.fun, self.pending, self.kwargs)
+
+def hexify(line, bytes, width=16):
+    return  '%04x  %s%s %s' % (
+        line,
+        ('%02x '*len(bytes)) % tuple(bytes),
+        '   '* (width-len(bytes)),
+        ('%c'*len(bytes)) % tuple(map(lambda x: (x>=32 and x<127) and x or ord('.'), bytes))
+        )
+
+#Main:
+def main():
+    global DEBUG
+    import getopt
+    filetype    = None
+    filename    = None
+    comPort     = 0     #Default setting.
+    speed       = None
+    unpatched   = 0
+    reset       = 0
+    wait        = 0     #wait at the end
+    goaddr      = None
+    bsl         = BootStrapLoader()
+    toinit      = []
+    todo        = []
+    startaddr   = None
+    size        = 2
+    hexoutput   = 1
+    notimeout   = 0
+    bslrepl     = None
+    mayuseBSL   = 1
+    forceBSL    = 0
+
+    sys.stderr.write("MSP430 Bootstrap Loader Version: %s\n" % VERSION)
+
+    try:
+        opts, args = getopt.getopt(sys.argv[1:],
+            "hc:P:wf:m:eEpvrg:UDu:ds:xbITNB:S:V14",
+            ["help", "comport=", "password=", "wait", "framesize=",
+             "erasecycles=", "masserase", "erasecheck", "program",
+             "verify", "reset", "go=", "unpatched", "debug",
+             "upload=", "download=", "size=", "hex", "bin",
+             "intelhex", "titext", "notimeout", "bsl=", "speed=",
+             "bslversion", "f1x", "f4x", "invert-reset", "invert-test",
+	     "swap-reset-test", "telos-latch", "telos-i2c", "telos", "telosb",
+             "tmote","no-BSL-download", "force-BSL-download", "slow"]
+        )
+    except getopt.GetoptError:
+        # print help information and exit:
+        usage()
+        sys.exit(2)
+
+    for o, a in opts:
+        if o in ("-h", "--help"):
+            usage()
+            sys.exit()
+        elif o in ("-c", "--comport"):
+            try:
+                comPort = int(a)                    #try to convert decimal
+            except ValueError:
+                comPort = a                         #take the string and let serial driver decide
+        elif o in ("-P", "--password"):
+            #extract password from file
+            bsl.passwd = Memory(a).getMemrange(0xffe0, 0xffff)
+        elif o in ("-w", "--wait"):
+            wait = 1
+        elif o in ("-f", "--framesize"):
+            try:
+                maxData = int(a)                    #try to convert decimal
+            except ValueError:
+                sys.stderr.write("framesize must be a valid number\n")
+                sys.exit(2)
+            #Make sure that conditions for maxData are met:
+            #( >= 16 and == n*16 and <= MAX_DATA_BYTES!)
+            if maxData > BootStrapLoader.MAX_DATA_BYTES:
+                maxData = BootStrapLoader.MAX_DATA_BYTES
+            elif maxData < 16:
+                maxData = 16
+            bsl.maxData = maxData - (maxData % 16)
+            sys.stderr.write( "Max. number of data bytes within one frame set to %i.\n" % maxData)
+        elif o in ("-m", "--erasecycles"):
+            try:
+                meraseCycles = int(a)               #try to convert decimal
+            except ValueError:
+                sys.stderr.write("erasecycles must be a valid number\n")
+                sys.exit(2)
+            #sanity check of value
+            if meraseCycles < 1:
+                sys.stderr.write("erasecycles must be a positive number\n")
+                sys.exit(2)
+            if meraseCycles > 20:
+                sys.stderr.write("warning: erasecycles set to a large number (>20): %d\n" % meraseCycles)
+            sys.stderr.write( "Number of mass erase cycles set to %i.\n" % meraseCycles)
+            bsl.meraseCycles = meraseCycles
+        elif o in ("-e", "--masserase"):
+            toinit.append(bsl.actionMassErase)        #Erase Flash
+        elif o in ("-E", "--erasecheck"):
+            toinit.append(bsl.actionEraseCheck)       #Erase Check (by file)
+        elif o in ("-p", "--programm"):
+            todo.append(bsl.actionProgram)          #Program file
+        elif o in ("-v", "--verify"):
+            todo.append(bsl.actionVerify)           #Verify file
+        elif o in ("-r", "--reset"):
+            reset = 1
+        elif o in ("-g", "--go"):
+            try:
+                goaddr = int(a)                    #try to convert decimal
+            except ValueError:
+                try:
+                    goaddr = int(a[2:],16)         #try to convert hex
+                except ValueError:
+                    sys.stderr.write("go address must be a valid number\n")
+                    sys.exit(2)
+            wait = 1
+        elif o in ("-U", "--unpatched"):
+            unpatched = 1
+        elif o in ("-D", "--debug"):
+            DEBUG = DEBUG + 1
+        elif o in ("-u", "--upload"):
+            try:
+                startaddr = int(a)                  #try to convert decimal
+            except ValueError:
+                try:
+                    startaddr = int(a,16)           #try to convert hex
+                except ValueError:
+                    sys.stderr.write("upload address must be a valid number\n")
+                    sys.exit(2)
+        elif o in ("-s", "--size"):
+            try:
+                size = int(a)
+            except ValueError:
+                try:
+                    size = int(a,16)
+                except ValueError:
+                    sys.stderr.write("size must be a valid number\n")
+                    sys.exit(2)
+        elif o in ("-x", "--hex"):
+            hexoutput = 1
+        elif o in ("-b", "--bin"):
+            hexoutput = 0
+        elif o in ("-I", "--intelhex"):
+            filetype = 0
+        elif o in ("-T", "--titext"):
+            filetype = 1
+        elif o in ("-N", "--notimeout"):
+            notimeout = 1
+        elif o in ("-B", "--bsl"):
+            bslrepl = Memory() #File to program
+            bslrepl.loadFile(a)
+        elif o in ("-V", "--bslversion"):
+            todo.append(bsl.actionReadBSLVersion) #load replacement BSL as first item
+        elif o in ("-S", "--speed"):
+            try:
+                speed = int(a)                    #try to convert decimal
+            except ValueError:
+                sys.stderr.write("speed must be decimal number\n")
+                sys.exit(2)
+        elif o in ("-1", "--f1x"):
+            bsl.cpu = F1x
+        elif o in ("-4", "--f4x"):
+            bsl.cpu = F4x
+        elif o in ("--invert-reset", ):
+            bsl.invertRST = 1
+        elif o in ("--invert-test", ):
+            bsl.invertTEST = 1
+        elif o in ("--swap-reset-test", ):
+            bsl.swapRSTTEST = 1
+        elif o in ("--telos-latch", ):
+            bsl.telosLatch = 1
+        elif o in ("--telos-i2c", ):
+            bsl.telosI2C = 1
+        elif o in ("--telos", ):
+            bsl.invertRST = 1
+            bsl.invertTEST = 1
+            bsl.swapRSTTEST = 1
+            bsl.telosLatch = 1
+        elif o in ("--telosb", ):
+            bsl.swapRSTTEST = 1
+            bsl.telosI2C = 1
+            mayuseBSL = 0
+	    speed = 38400
+        elif o in ("--tmote", ):
+            bsl.swapRSTTEST = 1
+            bsl.telosI2C = 1
+            mayuseBSL = 0
+	    speed = 38400
+        elif o in ("--no-BSL-download", ):
+            mayuseBSL = 0
+        elif o in ("--force-BSL-download", ):
+            forceBSL = 1
+        elif o in ("--slow", ):
+            bsl.slowmode = 1
+
+    if len(args) == 0:
+        sys.stderr.write("Use -h for help\n")
+    elif len(args) == 1:                            #a filename is given
+        if not todo:                                #if there are no actions yet
+            todo.extend([                           #add some useful actions...
+                bsl.actionProgram,
+                bsl.actionVerify,
+            ])
+        filename = args[0]
+    else:                                           #number of args is wrong
+        usage()
+        sys.exit(2)
+
+    if DEBUG:   #debug infos
+        sys.stderr.write("Debug level set to %d\n" % DEBUG)
+        sys.stderr.write("Python version: %s\n" % sys.version)
+
+    #sanity check of options
+    if notimeout and goaddr is not None and startaddr is not None:
+        sys.stderr.write("Option --notimeout can not be used together with both --upload and --go\n")
+        sys.exit(1)
+
+    if notimeout:
+        sys.stderr.write("Warning: option --notimeout can cause improper function in some cases!\n")
+        bsl.timeout = 0
+
+    if goaddr and reset:
+        sys.stderr.write("Warning: option --reset ignored as --go is specified!\n")
+        reset = 0
+
+    if startaddr and reset:
+        sys.stderr.write("Warning: option --reset ignored as --upload is specified!\n")
+        reset = 0
+
+    sys.stderr.flush()
+    
+    #prepare data to download
+    bsl.data = Memory()                             #prepare downloaded data
+    if filetype is not None:                        #if the filetype is given...
+        if filename is None:
+            raise ValueError("no filename but filetype specified")
+        if filename == '-':                         #get data from stdin
+            file = sys.stdin
+        else:
+            file = open(filename, "rb")             #or from a file
+        if filetype == 0:                           #select load function
+            bsl.data.loadIHex(file)                 #intel hex
+        elif filetype == 1:
+            bsl.data.loadTIText(file)               #TI's format
+        else:
+            raise ValueError("illegal filetype specified")
+    else:                                           #no filetype given...
+        if filename == '-':                         #for stdin:
+            bsl.data.loadIHex(sys.stdin)            #assume intel hex
+        elif filename:
+            bsl.data.loadFile(filename)             #autodetect otherwise
+
+    if DEBUG > 3: sys.stderr.write("File: %r" % filename)
+
+    bsl.comInit(comPort)                            #init port
+
+    #initialization list
+    if toinit:  #erase and erase check
+        if DEBUG: sys.stderr.write("Preparing device ...\n")
+        #bsl.actionStartBSL(usepatch=0, adjsp=0)     #no workarounds needed
+        #if speed: bsl.actionChangeBaudrate(speed)   #change baud rate as fast as possible
+        for f in toinit: f()
+
+    if todo or goaddr or startaddr:
+        if DEBUG: sys.stderr.write("Actions ...\n")
+        #connect to the BSL
+        bsl.actionStartBSL(
+            usepatch=not unpatched,
+            replacementBSL=bslrepl,
+            forceBSL=forceBSL,
+            mayuseBSL=mayuseBSL,
+            speed=speed,
+        )
+
+    #work list
+    if todo:
+        if DEBUG > 0:       #debug
+            #show a nice list of sheduled actions
+            sys.stderr.write("TODO list:\n")
+            for f in todo:
+                try:
+                    sys.stderr.write("   %s\n" % f.func_name)
+                except AttributeError:
+                    sys.stderr.write("   %r\n" % f)
+        for f in todo: f()                          #work through todo list
+
+    if reset:                                       #reset device first if desired
+        bsl.actionReset()
+
+    if goaddr is not None:                          #start user programm at specified address
+        bsl.actionRun(goaddr)                       #load PC and execute
+
+    #upload datablock and output
+    if startaddr is not None:
+        if goaddr:                                  #if a program was started...
+            #don't restart BSL but wait for the device to enter it itself
+            sys.stderr.write("Waiting for device to reconnect for upload: ")
+            sys.stderr.flush()
+            bsl.txPasswd(bsl.passwd, wait=1)        #synchronize, try forever...
+            data = bsl.uploadData(startaddr, size)  #upload data
+        else:
+            data = bsl.uploadData(startaddr, size)  #upload data
+        if hexoutput:                               #depending on output format
+            m = 0
+            while m < len(data):                    #print a hex display
+                print hexify(startaddr+m, map(ord,data[m:m+16]))
+                m = m + 16
+        else:
+            sys.stdout.write(data)                  #binary output w/o newline!
+        wait = 0    #wait makes no sense as after the upload the device is still in BSL
+
+    if wait:                                        #wait at the end if desired
+        sys.stderr.write("Press <ENTER> ...\n")     #display a prompt
+        sys.stderr.flush()
+        raw_input()                                 #wait for newline
+
+    bsl.comDone()           #Release serial communication port
+
+if __name__ == '__main__':
+    try:
+        main()
+    except SystemExit:
+        raise               #let pass exit() calls
+    except KeyboardInterrupt:
+        if DEBUG: raise     #show full trace in debug mode
+        sys.stderr.write("user abort.\n")   #short messy in user mode
+        sys.exit(1)         #set errorlevel for script usage
+    except Exception, msg:  #every Exception is caught and displayed
+        if DEBUG: raise     #show full trace in debug mode
+        sys.stderr.write("\nAn error occoured:\n%s\n" % msg) #short messy in user mode
+        sys.exit(1)         #set errorlevel for script usage
diff --git a/tools/platforms/msp430/pybsl/tos-bsl.txt b/tools/platforms/msp430/pybsl/tos-bsl.txt
new file mode 100644
index 00000000..8f7c5fa4
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/tos-bsl.txt
@@ -0,0 +1,279 @@
+tos-bsl
+-------
+
+BootStrapLoader software for the flash devices MSP430F1xx 
+(maybe F4xx too, but its not tested).
+Based on the example provided by TI but with more features.
+
+This version is a modification of Chris Liechti's original
+pybsl, with support for the telos, telosb and tmote devices
+from Moteiv (www.moteiv.com).
+
+It is released under a free software license,
+see tos-bsl-license.txt for more details.
+
+(C) 2001-2003 Chris Liechti <cliechti@gmx.net>
+
+Features
+--------
+
+- understands TI-Text and Intel-hex
+- download to Flash and/or RAM, erase, verify
+- reset and wait for keypress (to run a device directly from the port
+  power)
+- load addres into R0/PC and run
+- password file can be any data file, e.g. the one used to program the
+  device in an earlier session
+- upload a memory block MSP->PC (output as binary data or hex dump)
+- written in Python, runs on Win32, Linux, BSD (other unices have other
+  device names but should be faisible), Jython (Python in Java)
+- use per command line, or in a Python script
+- download a program, execute it, resynchronize and upload results.
+  (for testing and callibration)
+- downladable BSL for larger devices
+- baudrate change for newer MSP430-BSLs
+- test and reset lines can be inverted for non standard BSL hardware
+
+Requirements
+------------
+- Linux, BSD, Un*x or Windows PC
+- Python 2.0 or newer (1.5.2 untested), 2.2 recomeded
+- win32all extensions to Python on Windows
+- BSL hardware with an MSP430 device connected to a serial port 
+
+Installation
+------------
+Python installations are available from www.python.org. On Windows simply
+use the installer. The win32all package has an installer too. These
+installations should run fine with the deafults.
+
+On Linux just Python is needed. On many distributions is Python 1.5.2
+incuded. I suggest that an upgrade to 2.2 or newer. There are rpm and deb
+binary packages and a source tarball availabe through the Python homepage.
+
+The pybsl archive can simply be unpacked to a directory, Windows users
+can use WinZip or WinRar among others to extract the gzipped tar file.
+If you want to run it from everywhere the directory where the file bsl.py
+is, should be added to the PATH.
+Look at "/etc/profile" on Linux, "autoexec.bat" on Win9x/ME,
+System Properties/Environment in Win2000/NT/XP.
+
+For Jython you need to have installed the "Java Communications API"
+(JavaComm).
+
+Short introduction
+------------------
+First the MSP430 BSL hardware is needed. An example schematics can be found
+in the application note "slaa96b" from TI (see references). Then this
+programm can be used to communicate between the PC and the MSP430 device.
+
+The program can be started by typing "python bsl.py" in a console. Often
+it works also with just "bsl.py" or "./bsl.py".
+
+USAGE: bsl.py [options] [file]
+
+If "-" is specified as file the data is read from the stdinput.
+A file ending with ".txt" is considered to be in TIText format,
+'.a43' and '.hex' as IntelHex and all other filenames are
+considered as ELF files.
+
+General options:
+  -h, --help            Show this help screen.
+  -c, --comport=port    Specify the communication port to be used.
+                        (Default is 0)
+                                0->COM1 / ttyS0
+                                1->COM2 / ttyS1
+                                etc.
+  -P, --password=file   Specify a file with the interrupt vectors that
+                        are used as password. This can be any file that
+                        has previously been used to program the device.
+                        (e.g. -P INT_VECT.TXT).
+  -f, --framesize=num   Max. number of data bytes within one transmitted
+                        frame (16 to 240 in steps of 16) (e.g. -f 240).
+  -m, --erasecycles=num Number of mass erase cycles (default is 1). Some
+                        old F149 devices need additional erase cycles.
+                        On newer devices it is no longer needed. (e.g. for
+                        an old F149: -m20)
+  -U, --unpatched       Do not download the BSL patch, even when it is
+                        needed. This is used when a program is downloaded
+                        into RAM and executed from there (and where flash
+                        programming is not needed.)
+  -D, --debug           Increase level of debug messages. This won't be
+                        very useful for the average user...
+  -I, --intelhex        Force fileformat to IntelHex
+  -T, --titext          Force fileformat to be TIText
+  -N, --notimeout       Don't use timeout on serial port (use with care)
+  -B, --bsl=bsl.txt     Load and use new BSL from the TI Text file
+  -S, --speed=baud      Reconfigure speed, only possible with newer
+                        MSP403-BSL versions (>1.5, read slaa089a.pdf for
+                        details). If the --bsl option is not used, an
+                        internal BSL replacement will be loaded.
+                        Needs a target with at least 2kB RAM!
+                        Possible values are 9600, 19200, 38400
+                        (default 9600)
+  -1, --f1x             Specify CPU family, in case autodetect fails
+  -4, --f4x             Specify CPU family, in case autodetect fails
+                        --F1x and --f2x are only needed when the "change
+                        baudrate" feature is used and the autodetect feature
+                        fails. If the device ID that is uploaded is known, it
+                        has precedence to the command line option.
+  --invert-reset        Invert signal on RST pin (used for some BSL hardware)
+  --invert-test         Invert signal on TEST/TCK pin (used for some BSL
+                        hardware)
+  --slow                Add delays when operating the conrol pins. Useful if
+                        the pins/circuit has high capacitance.
+
+Program Flow Specifiers:
+  -e, --masserase       Mass Erase (clear all flash memory)
+  -E, --erasecheck      Erase Check by file
+  -p, --program         Program file
+  -v, --verify          Verify by file
+
+The order of the above options matters! The table is ordered by normal
+execution order. For the options "Epv" a file must be specified.
+Program flow specifiers default to "pvr" if a file is given.
+Don't forget to specify "e" or "eE" when programming flash!
+
+Data retreiving:
+  -u, --upload=addr     Upload a datablock (see also: -s).
+  -s, --size=num        Size of the data block do upload. (Default is 2)
+  -x, --hex             Show a hexadecimal display of the uploaded data.
+                        (Default)
+  -b, --bin             Get binary uploaded data. This can be used
+                        to redirect the output into a file.
+
+Do before exit:
+  -g, --go=address      Start programm execution at specified address.
+                        This implies option --wait.
+  -r, --reset           Reset connected MSP430. Starts application.
+                        This is a normal device reset and will start
+                        the programm that is specified in the reset
+                        vector. (see also -g)
+  -w, --wait            Wait for <ENTER> before closing serial port.
+
+If it says "NAK received" it's probably because you specified no or a
+wrong password.
+
+
+Examples
+--------
+These exaples assume that you have added the installation directory to
+the PATH. type the full path to bsl.py otherwise and maybe use
+"python bsl.py".
+
+bsl.py -e
+        Only erase flash.
+
+bsl.py -eErw 6port.a43
+        Erase flash, erase check, download an executable, run it (reset)
+        and wait.
+        
+        Old F149 devices need addidional erase cycles! Use the -m
+        option in this case (-m20 will be OK is most cases):
+        "python bsl.py -eErwm20 6port.a43"
+
+bsl.py 6port.a43
+        Download of an executable to en empty (new or erased) device.
+        (Note that in new devices some of the first bytes in the
+        information memory are random data. If data should be
+        downloaded there, specify -eE.)
+
+bsl.py -erwB BL_150S_14x.txt -S 38400 6port.a43
+        Erase device, change baudrate and download a new BSL, then
+        download the specified file. After that, reset the device and
+        wait for user input.
+
+bsl.py --go=0x220 ramtest.a43
+        Download a program into RAM and run it (on an erased device)
+
+bsl.py --go=0x200 -P 6port.a43 ramtest.a43
+        Download a program into RAM and run it (on a device that was
+        previously programmed with 6port.a43 and therefore needs a
+        specific password).
+
+        For old devices that use the patch the above command gives a
+        conflict with the patch. But as the patch is only needed to
+        programm flash, it can be left out when running a program solely
+        from RAM:
+        "python bsl.py --go=0x200 -u -P 6port.a43 ramtest.a43"
+
+bsl.py -u 0x0c00 -s 1024 -P 6port.a43
+        Get a memory dump in HEX, from the bootstrap loader (on a device
+        that was previously programmed with 6port.a43 and therefore needs
+        a specific password):
+
+        or on unix with the use of "hexdump":
+        "python bsl.py -u 0x0c00 -s 1024 -P 6port.a43 -b | hexdump"
+
+        or save the binary in a file:
+        "python bsl.py -u 0x0c00 -s 1024 -P 6port.a43 -b >dump.bin"
+
+bsl.py --go=0x220 --upload=0x200 --size=256 ramtest.a43
+        Download the file ramtest.a43 to an empty device, execute its
+        main function at 0x0220. The BSL then tries to reconnect to the
+        device. This does only work when the program on the MSP430
+        does enter the BSL by jumping at address 0x0c00. It is not
+        forced to enter the BSL by a reset as this would stop the
+        program excution.
+        When the reconnection was successful, the data, specified with
+        the --upload and --size parameters, is loaded and printed.
+        
+        This configuration can be useful for software tests, getting
+        callibration data, etc.
+        
+        PS: dont specify -r when using -g. A reset starts the user
+        program which possibly destroys a program that was downloaded
+        to RAM.
+
+bsl.py -rw
+        Just start the user program (with a reset) and wait.
+
+bsl.py -rwc1
+        Reset the device on the second serial/COM port and wait.
+
+cat 6port.a43|bsl.py -eE -
+        Pipe the data from "cat" to the BSL to erase and program the
+        flash. (un*x example, don't forget the dash at the end of the
+        line)
+
+bsl.py -e -S 38400 6port.a43
+        First download the internal replacement BSL and then use it
+        to program at 38400 baud. Only works with targets with more
+        than 1kB of RAM.
+
+bsl.py -e -B BL_150S_14x.txt -S 38400 6port.a43
+        First download the given replacement BSL and then use it to
+        program at 38400 baud. Only works with targets with more
+        than 1kB of RAM.
+
+History
+-------
+  V1.4
+        uses improved serial library
+        support for BSL download to MSP
+        support for higher baudrates (up to 38400)
+
+  V1.5
+        ELF file support
+        replacement BSLs are now internal
+
+References
+----------
+- Python: http://www.python.org
+
+- Jython: http://www.jython.org
+
+- Serial Extension for Python: http://pyserial.sourceforge.net
+
+- win32all: http://starship.python.net/crew/mhammond/
+  and http://www.activestate.com/Products/ActivePython/win32all.html
+
+- slaa89.pdf: "Features of the MSP430 Bootstrap Loader in the
+  MSP430F1121", TI
+
+- slaa96b.pdf: "Application of Bootstrap Loader in MSP430 With Flash
+  Hardware and Software Proposal", TI
+
+- Texas Instruments MSP430 Homepage, links to Datasheets and Application
+  Notes: http://www.ti.com/sc/docs/products/micro/msp430/msp430.htm
+
diff --git a/tools/platforms/msp430/pybsl/winexe/Makefile b/tools/platforms/msp430/pybsl/winexe/Makefile
new file mode 100644
index 00000000..7a419969
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/winexe/Makefile
@@ -0,0 +1,12 @@
+
+.PHONY: all FORCE clean windist
+
+all: windist
+
+#wrap py to exe and build windows installer
+windist:
+	sh build-windist
+
+#clean up the mess...
+clean:
+	rm -r dist build bin
diff --git a/tools/platforms/msp430/pybsl/winexe/README.windows b/tools/platforms/msp430/pybsl/winexe/README.windows
new file mode 100644
index 00000000..5c0dcacf
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/winexe/README.windows
@@ -0,0 +1,24 @@
+$Id: README.windows,v 1.4 2006-12-12 18:23:02 vlahan Exp $
+@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+Follow these directions to recreate the standalone tos-bsl.exe. After doing
+this, you should recreate ../tos-bsl-win.tar.gz with the contents of the
+generated bin directory.
+
+--
+
+To build a binary executable msp430-bsl.exe for Windows, first download
+and install Python 2.3 for Windows [1][2], the version included with
+Cygwin is insufficient.  Then install py2exe [3][4].
+
+  [1] http://www.python.org/download/
+  [2] http://www.python.org/ftp/python/2.3.4/Python-2.3.4.exe
+  [3] http://starship.python.net/crew/theller/py2exe/
+  [4] http://prdownloads.sourceforge.net/py2exe/py2exe-0.5.3.win32-py2.3.exe?download
+
+To compile msp430-bsl, make sure the Windows version of python is
+first in your path (i.e., before any cygwin version), then run
+make. When successful, that command creates a bin/ directory, which
+contains tos-bsl.exe and its supporting files.  You must install
+bin/ and bin/lib/ all together, or it won't work.  I installed it into
+c:/mspgcc/bin, directly over the version that came with MSPGCC.
diff --git a/tools/platforms/msp430/pybsl/winexe/build-windist b/tools/platforms/msp430/pybsl/winexe/build-windist
new file mode 100644
index 00000000..7fb3565b
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/winexe/build-windist
@@ -0,0 +1,5 @@
+rm -rf bin
+cd ..
+python winexe/setup.py py2exe
+mv bin winexe/bin
+rm -rf build
diff --git a/tools/platforms/msp430/pybsl/winexe/setup.py b/tools/platforms/msp430/pybsl/winexe/setup.py
new file mode 100644
index 00000000..5acef03c
--- /dev/null
+++ b/tools/platforms/msp430/pybsl/winexe/setup.py
@@ -0,0 +1,24 @@
+# setup.py
+from distutils.core import setup
+import glob, sys, py2exe, os
+
+sys.argv.append("sdist")
+sys.argv.append("py2exe")
+
+setup(
+    name='pybsl',
+    version='0.5',
+    options = {"py2exe":
+        {
+            'dist_dir': 'bin',
+            'excludes': ['javax.comm'],
+        }
+    },
+    console = ["tos-bsl"],
+    zipfile = "lib/shared-bsl.zip",
+)
+
+if os.path.exists('bin/bsl.exe'):
+    if os.path.exists('bin/msp430-bsl.exe'):
+        os.remove('bin/msp430-bsl.exe')
+    os.rename('bin/bsl.exe', 'bin/msp430-bsl.exe')
diff --git a/tools/platforms/sam3/Makefile.am b/tools/platforms/sam3/Makefile.am
new file mode 100644
index 00000000..e40bfea7
--- /dev/null
+++ b/tools/platforms/sam3/Makefile.am
@@ -0,0 +1,16 @@
+AUTOMAKE_OPTIONS = foreign
+
+if CYGWIN
+# Windows currently not supported
+
+
+else
+# Linux support
+
+bin_SCRIPTS = sam3u-samba-program.py
+
+sam3u:
+	
+
+
+endif
diff --git a/tools/platforms/sam3/samba-program.py b/tools/platforms/sam3/samba-program.py
new file mode 100755
index 00000000..9239a804
--- /dev/null
+++ b/tools/platforms/sam3/samba-program.py
@@ -0,0 +1,212 @@
+#!/usr/bin/env python
+
+# Script to program the Atmel SAM3U using the sam-ba tool.
+
+import os
+import re
+import sys
+import time
+import signal
+import optparse
+import tempfile
+import subprocess
+
+parser = optparse.OptionParser()
+
+parser.add_option("-p", "--port",
+        action="store",
+        type="string",
+        dest="port",
+        default="/dev/ttyUSB0",
+        help="Port where the SAM3U can be found.")
+parser.add_option("-b", "--binfile",
+        action="store",
+        type="string",
+        dest="binfile",
+        default="build/sam3u_ek/main.bin.out",
+        help="Binary file that should be programmed into the flash.")
+parser.add_option("-t", "--target",
+        action="store",
+        type="string",
+        dest="target",
+        default="AT91SAM3U4-EK",
+        help="Target board type.")
+parser.add_option("-c", "--check",
+        action="store_true",
+        dest="check",
+        default=False,
+        help="Checks and verifies the programmed flash")
+parser.add_option("-r", "--run",
+        action="store_true",
+        dest="run",
+        default=False,
+        help="Starts executing the binary after flashing it")
+parser.add_option("-s", "--start-addr",
+        action="store",
+        type="string",
+        dest="start_addr",
+        default="0x80000",
+        help="Determines the start address where the binary is loaded")
+parser.add_option("-d", "--debug",
+        action="store_true",
+        dest="DEBUG",
+        default=False,
+        help="Set the debug mode.")
+
+(cmdOptions, args) = parser.parse_args()
+class samba:
+    def __init__(self):
+        self.expect_timeout = False
+
+        # check to make sure binary file exists
+        if not os.path.isfile(cmdOptions.binfile):
+            print '"%s" does not exist. Exiting.' % cmdOptions.binfile
+            sys.exit(1)
+        # once we switch to python 2.6, we should do this
+        #self.f = tempfile.NamedTemporaryFile(delete=False)
+
+        #if sam3s, use different TCL script
+        r = re.compile("sam3s")
+        matches = r.findall(cmdOptions.target)
+        if(len(matches) != 0):
+            print "Found SAM3S"
+
+            self.f = file('/tmp/samba.tcl', 'w+')
+            self.f.write("""FLASH::Init
+        send_file {Flash} "%s" %s 0
+        FLASH::ScriptGPNMV 2
+        """%(cmdOptions.binfile,cmdOptions.start_addr))
+            if cmdOptions.check:
+                # verify flash
+                self.f.write('compare_file {Flash} "%s" %s 0\n'%(cmdOptions.binfile,cmdOptions.start_addr))
+            if cmdOptions.run:
+                # automatically run the code after writing
+                self.f.write("TCL_Go $target(handle) 0 0\n")
+        else:
+
+            if( int(cmdOptions.start_addr, 16) >= 0x80000 and int(cmdOptions.start_addr, 16) < 0x100000):
+                flash_id = 0
+            else:
+                flash_id = 1
+            self.f = file('/tmp/samba.tcl', 'w+')
+            self.f.write("""FLASH::Init %d
+        send_file {Flash %d} "%s" %s 0
+        FLASH::ScriptGPNMV 2
+        """%(flash_id,flash_id,cmdOptions.binfile,cmdOptions.start_addr))
+            if cmdOptions.check:
+                # verify flash
+                self.f.write('compare_file {Flash %d} "%s" %s 0\n'%(flash_id, cmdOptions.binfile,cmdOptions.start_addr))
+            if cmdOptions.run:
+                # automatically run the code after writing
+                self.f.write("TCL_Go $target(handle) 0 0\n")
+        self.f.flush()
+
+        try:
+            error = False
+
+            # check if SAMBA bootloader is here
+            foundBootloader = False
+            while not foundBootloader:
+                print "Checking for programmer"
+                lsusb_proc = subprocess.Popen('lsusb -d 03eb:6124', shell=True,
+                        stdout=subprocess.PIPE)
+                r = re.compile("SAMBA bootloader")
+                lsusb_proc.wait()
+                matches = r.findall(lsusb_proc.stdout.readline())
+                if len(matches) == 0:
+                    print """\n Couldn't find SAM-BA bootloader device on the USB bus.
+     Please close JP1 on the development kit and reboot the system (hit NRSTB button)!\n"""
+                    time.sleep(2)
+                else:
+                    foundBootloader = True
+
+            print "Programmer Found!"
+
+            print "Programming..."
+            #print "Remove JP1 and hit [Enter]"
+            #a = raw_input()
+
+            samba_cmd = "DISPLAY=:0 sam-ba %s %s %s"%(cmdOptions.port, cmdOptions.target,
+                    self.f.name)
+            if(cmdOptions.DEBUG):
+                print "DEBUG: ", samba_cmd
+            samba_proc = subprocess.Popen(samba_cmd, shell=True, stdout=subprocess.PIPE,
+                    stderr=subprocess.PIPE)
+            r = re.compile("sam-ba: not found")
+            e = samba_proc.stderr.readline()
+
+            if len(r.findall(samba_proc.stderr.readline())) != 0:
+                print "Couldn't find 'sam-ba'. Please make sure it is in your PATH!"
+                self.cleanup()
+                sys.exit(1)
+            try:
+                self.expect(samba_proc.stdout, "-I- Found processor : at91sam3")
+            except RuntimeError:
+                print "Couldn't find processor! Make sure the port '%s' is correct."%(cmdOptions.port)
+                self.cleanup()
+                sys.exit(1)
+            try:
+                self.expect(samba_proc.stdout, "-I- Command line mode : Execute script file")
+            except:
+                print "Couldn't execute script!"
+                self.cleanup()
+                sys.exit(1)
+            try:
+                self.expect(samba_proc.stdout, "-I- GPNVM1 set")
+            except:
+                print "Couldn't program the device!"
+                self.cleanup()
+                sys.exit(1)
+
+            if cmdOptions.check:
+                try:
+                    self.expect(samba_proc.stdout, "match exactly")
+                except:
+                    print "Verification failed!"
+                    self.cleanup()
+                    sys.exit(1)
+
+            if cmdOptions.run:
+                print "Done! Your code should be running now."
+            else:
+                print "Done! Reboot your system (hit NRSTB button)."
+
+        finally:
+            pass
+
+    def cleanup(self):
+        self.f.close()
+        os.unlink(self.f.name)
+
+
+    def alarmHandler(self, signum, frame):
+        self.expect_timeout = True
+
+    # Wait until expected pattern is received on the given filehandle.
+    def expect(self, fh, pat, timeout=3):
+        r = re.compile(pat)
+
+        expect_found = False
+
+        if (timeout != -1):
+            signal.signal(signal.SIGALRM, self.alarmHandler)
+            signal.alarm(timeout)
+
+        while (not expect_found and not self.expect_timeout):
+            line = fh.readline().strip()
+            if cmdOptions.DEBUG:
+                print line
+                time.sleep(0.1)
+            matches = r.findall(line)
+            if (len(matches) != 0):
+                expect_found = True
+                break
+
+        signal.alarm(0)
+        if (not expect_found):
+            raise RuntimeError, "Did not receive expected pattern '%s'" % pat
+
+
+if __name__ == "__main__":
+    s = samba()
+
diff --git a/tools/release/build-rpms b/tools/release/build-rpms
new file mode 100755
index 00000000..1cdb2c29
--- /dev/null
+++ b/tools/release/build-rpms
@@ -0,0 +1,24 @@
+#!/bin/bash
+
+RPMS="`rpm --eval=\"%_topdir\"`"
+
+TOS_NAME="tinyos"
+TOS_VERSION=2.1.1
+
+TOS_TOOLS_NAME="tinyos-tools"
+TOS_TOOLS_VERSION=1.4.0
+
+TOS_DEPUTY_NAME="tinyos-deputy"
+TOS_DEPUTY_VERSION=1.1-1
+
+echo "*** Building tarballs"
+bash tinyos.files $TOS_NAME $TOS_VERSION $RPMS/SOURCES/$TOS_NAME-$TOS_VERSION.tar.gz
+bash tinyos-tools.files $TOS_TOOLS_NAME $TOS_TOOLS_VERSION $RPMS/SOURCES/$TOS_TOOLS_NAME-$TOS_TOOLS_VERSION.tar.gz
+#sh deputy.files
+
+echo "*** Creating rpms"
+rpmbuild -bb tinyos.spec
+rpmbuild -bb tinyos-tools.spec
+#rpmbuild -bb deputy.spec
+
+
diff --git a/tools/release/build.xml b/tools/release/build.xml
new file mode 100644
index 00000000..916073c0
--- /dev/null
+++ b/tools/release/build.xml
@@ -0,0 +1,8 @@
+<project name="tinyos-2.x tools" default="all">
+
+	<target name="all" >
+		<echo message = "Building tinyos-2.x release" />
+		<exec executable="./build-rpms" failonerror="false">
+		</exec>
+	</target>
+</project>
diff --git a/tools/release/deputy.files b/tools/release/deputy.files
new file mode 100755
index 00000000..f9753587
--- /dev/null
+++ b/tools/release/deputy.files
@@ -0,0 +1,11 @@
+NAME=tinyos-deputy
+VERSION=1.1
+RELEASE=1
+
+cd ../..
+rm -rf $NAME-$VERSION
+svn checkout svn://hal.cs.berkeley.edu/home/svn/projects/trunk/deputy
+mv deputy $NAME-$VERSION
+tar czvf ../$NAME-$VERSION-$RELEASE.tar.gz $NAME-$VERSION
+wget -O ../$NAME-$VERSION-$RELEASE.patch http://www.cs.utah.edu/~coop/safetinyos/files/deputy.patch
+
diff --git a/tools/release/deputy.spec b/tools/release/deputy.spec
new file mode 100644
index 00000000..c96f501d
--- /dev/null
+++ b/tools/release/deputy.spec
@@ -0,0 +1,44 @@
+%define deputy_name deputy
+%define tinyos_deputy_version 1.1
+%define tinyos_deputy_release 1
+
+Summary: Deputy compiler for Safe TinyOS.
+Name: tinyos-%{deputy_name}
+Version: %{tinyos_deputy_version}
+Release: %{tinyos_deputy_release}%{dist}
+Source: http://deputy.cs.berkeley.edu/%{name}-%{tinyos_deputy_version}-%{tinyos_deputy_release}.tar.gz
+Patch0: tinyos-%{deputy_name}-%{tinyos_deputy_version}-%{tinyos_deputy_release}.patch
+Vendor: Deputy
+URL: http://deputy.cs.berkeley.edu/
+License: LGPL
+Group: Developement tool
+BuildRoot: %{_tmppath}/%{name}-root
+
+%description
+This package is the deputy compiler for Safe TinyOS.
+
+%prep
+%setup -q
+%patch0 -p0
+
+%build
+touch configure
+./configure --prefix=/usr
+make
+
+%install
+rm -rf $RPM_BUILD_ROOT
+make DESTDIR=$RPM_BUILD_ROOT install
+rm -rf $RPM_BUILD_ROOT/usr/lib/deputy/bin/deputy.byte.exe
+
+%clean
+rm -rf $RPM_BUILD_ROOT
+
+%files
+%defattr(-,root,root)
+/usr/bin/*
+/usr/lib/*
+/usr/man/man1/*
+
+
+%changelog
diff --git a/tools/release/external-tools/avarice.spec b/tools/release/external-tools/avarice.spec
new file mode 100755
index 00000000..74f2d7a4
--- /dev/null
+++ b/tools/release/external-tools/avarice.spec
@@ -0,0 +1,48 @@
+%define theprefix /usr
+
+Summary: AVaRICE - an interface for Atmel JTAG ICE to GDB
+Name: avarice
+Version: 2.4
+Release: 1
+Packager: kwright, TinyOS Group, UC Berkeley
+License: GNU GPL
+Group: Development/Tools 
+URL: http://sourceforge.net/projects/avarice/
+Source0: avarice-%{version}.tar.bz2
+BuildRoot: %{_tmppath}/%{name}-root
+
+%description
+AVaRICE compiled for the %{target} platform.
+AVaRICE is a program interfacing the Atmel JTAG ICE to GDB. 
+Users can debug their embedded AVR target via the Atmel JTAG 
+ICE using GDB.
+
+%prep
+%setup -q
+
+%build
+./configure --prefix=/usr
+make
+
+%install
+rm -rf %{buildroot}%{theprefix}
+make prefix=%{buildroot}%{theprefix} install
+
+%clean
+rm -rf $RPM_BUILD_DIR/%(name)-%(version)
+rm -rf $RPM_SOURCE_DIR/%(name)-%(version)
+
+%files
+%defattr(-,root,root,-)
+%{theprefix}
+%doc
+
+%changelog
+* Fri Feb 3 2006 kwright <kwright@cs.berkeley.edu>
+- Update to avarice 2.4; create multi-platform file
+* Tue Mar 1 2005 kwright <kwright@cs.berkeley.edu>
+- Update for TinyOS 1.2 build.
+* Mon Aug 18 2003 kwright <kwright@cs.berkeley.edu>
+- Initial build.
+
+
diff --git a/tools/release/external-tools/avr-gcc.spec b/tools/release/external-tools/avr-gcc.spec
new file mode 100755
index 00000000..8dbd323e
--- /dev/null
+++ b/tools/release/external-tools/avr-gcc.spec
@@ -0,0 +1,65 @@
+# 
+# The source must be in a tgz with the 
+# name %{target}-%{version}-binutils.tgz.
+# When unfolded, the top-level directory 
+# must be %{target}-%{version}.
+# 
+#
+# 03/14/2005 xscale
+# target: xscale-elf
+# version: 3.4.3
+# release: 1
+# 
+
+%define target avr 
+%define version  4.1.2
+%define release  1
+%define name     %{target}-gcc
+%define theprefix /usr
+%define source %{name}-%{version}.tgz
+%define __strip avr-strip
+
+Summary: gcc compiled for the %{target} platform 
+Name: %{name}
+Version: %{version}
+Release: %{release}
+Packager: kwright, TinyOS Group, UC Berkeley
+License: GNU GPL
+Group: Development/Tools
+URL: ftp://ftp.gnu.org/pub/gnu/gcc/gcc-3.4.3/gcc-3.4.3.tar.bz2
+Source0: %{name}-%{version}.tgz
+BuildRoot: %{_tmppath}/%{name}-root
+
+%description
+gcc compiled for the %{target} platform. The tarfile was renamed 
+to %{target}-gcc* to reflect the purpose. 
+
+%prep
+%setup -q
+
+%build
+./configure --target=%{target} --enable-languages=c --disable-nls --prefix=/usr --disable-libssp
+make
+
+%install
+rm -rf %{buildroot}%{theprefix}
+make prefix=%{buildroot}%{theprefix} install
+cd %{buildroot}%{theprefix}
+rm lib/libiberty.a
+sed -i -e "s|%{buildroot}||g" lib/gcc/avr/*/install-tools/mkheaders.conf
+
+%clean
+rm -rf $RPM_BUILD_DIR/%{name}-%{version}
+rm -rf $RPM_SOURCE_DIR/%{name}-%{version}
+
+%files
+%defattr(-,root,root,-)
+%{theprefix}
+%doc
+
+%changelog
+* Sun Aug 10 2008 pal <pal@cs.stanford.edu> 4.1.2, avr
+* Mon Mar 14 2005 root <kwright@cs.berkeley.edu> 3.4.3
+- Initial build for multi-platform, multi-target
+
+
diff --git a/tools/release/external-tools/avr-insight.spec b/tools/release/external-tools/avr-insight.spec
new file mode 100755
index 00000000..458b004e
--- /dev/null
+++ b/tools/release/external-tools/avr-insight.spec
@@ -0,0 +1,47 @@
+%define theprefix /usr
+
+Summary: Insight GDB GUI	
+Name: avr-insight
+Version: 6.3
+Release: 1
+Packager: TinyOS Group, UC Berkeley
+License: GNU GPL
+Group: Development/Tools
+URL: httphttp://ftp.gnu.org/gnu/gdb/gdb-6.2.tar.gz 
+Source0: %{name}-%{version}.tar.gz
+BuildRoot: %{_tmppath}/%{name}-root
+
+%description
+This package includes gdb and insight, a graphical user interface to GDB
+written in Tcl/Tk originally by Red Hat and Cygnus.
+
+%prep
+%setup -q
+
+%build
+./configure --prefix=%{theprefix} --target=avr --with-gnu-ld --with-gnu-as --disable-nls 
+make
+
+%install
+rm -rf %{buildroot}/usr/local
+make prefix=%{buildroot}/usr/local install
+cd %{buildroot}/usr/local
+rm info/bfd.info* info/configure.info* info/dir info/standards.info
+rm lib/libiberty.a
+
+%clean
+rm -rf $RPM_BUILD_DIR/%{name}-%{version}
+rm -rf $RPM_SOURCE_DIR/%{name}-%{version}
+
+%files
+%defattr(-,root,root,-)
+/usr/local
+%doc
+
+%changelog
+* Thu Aug 28 2003 root <kwright@cs.berkeley.edu> pre6.0cvs-1.2
+- Removed last of the file conflicts and changed name to avr-insight
+* Fri Aug 15 2003 root <kwright@cs.berkeley.edu> pre6.0cvs-1
+- Initial build.
+
+
diff --git a/tools/release/external-tools/avr-libc.spec b/tools/release/external-tools/avr-libc.spec
new file mode 100644
index 00000000..f59ab99c
--- /dev/null
+++ b/tools/release/external-tools/avr-libc.spec
@@ -0,0 +1,59 @@
+# 
+# The source must be in a tgz with the 
+# name %{target}-%{version}-binutils.tgz.
+# When unfolded, the top-level directory 
+# must be %{target}-%{version}.
+# 
+
+%define target avr
+%define libname libc
+%define version 1.4.7
+%define release 1
+%define url http://savannah.nongnu.org/download/
+%define name     %{target}-%{libname}
+%define theprefix /usr
+%define source   %{name}-%{version}.tgz
+%define __strip avr-strip
+%define debug_package %{nil}
+
+Summary: C library for the %{target} platform
+Name: %{name}
+Version: %{version}
+Release: %{release}
+Packager: TinyOS Group, UC Berkeley
+License: GNU GPL-compatible
+Group: Development/Tools
+URL: %{url}
+Source0: %{source}
+BuildRoot: %{_tmppath}/%{name}-root
+
+%description
+C library for the %{target} platform.
+
+%prep
+%setup -q
+
+%build
+./configure --prefix=%{theprefix}  --build=`./config.guess` --host=avr
+make
+
+%install
+rm -rf %{buildroot}%{theprefix}
+make prefix=%{buildroot}%{theprefix} install
+
+%clean
+rm -rf $RPM_BUILD_DIR/%{name}-%{version}
+rm -rf $RPM_SOURCE_DIR/%{name}-%{version}
+
+%files
+%{theprefix}
+%defattr(-,root,root,-)
+%doc
+
+
+%changelog
+* Fri Mar 10 2005 root <kwright@cs.berkeley.edu> 1.2.3-1
+- Initial version for multi-platform, multi-target
+
+
+
diff --git a/tools/release/external-tools/binutils.spec b/tools/release/external-tools/binutils.spec
new file mode 100755
index 00000000..d539cbf9
--- /dev/null
+++ b/tools/release/external-tools/binutils.spec
@@ -0,0 +1,73 @@
+# 
+# The source must be in a tgz with the 
+# name %{target}-%{version}-binutils.tgz.
+# When unfolded, the top-level directory 
+# must be %{target}-%{version}.
+# 
+# 03/14/2005 xscale
+# target: xscale-elf
+# version: 2.15
+# release: 1
+#
+# 03/25/2005 avr
+# target: avr
+# version: 2.15tinyos
+# release: 3
+# 
+
+%define target   avr
+%define version  2.17tinyos
+%define release  3
+%define name     %{target}-binutils
+%define theprefix /usr
+%define source   %{name}-%{version}.tgz
+
+Summary: GNU binutils for the %{target} platform
+Name: %{name}
+Version: %{version}
+Release: %{release}
+Packager: kwright, TinyOS Group, UC Berkeley
+URL: http://ftp.gnu.org/gnu/binutils/
+Source0: %{source}
+License: GNU GPL
+Group: Development/Tools 
+BuildRoot: %{_tmppath}/%{name}-root
+
+%description
+The GNU Binutils are a collection of binary tools. The main tools are 
+ld and as. This particular collection  contains a patched as for 
+use with TinyOS 1.2+ on the %{target} platform. The patch allows 
+NesC to use the $ character within symbols to separate component
+names and variable names. 
+
+%prep
+%setup -q
+
+%build
+./configure --target=%{target} --prefix=%{theprefix}
+make
+
+%install
+rm -rf %{buildroot}%{theprefix}
+make prefix=%{buildroot}%{theprefix} install
+cd %{buildroot}%{theprefix}
+rm -rf info share 
+rm lib/libiberty.a
+
+%clean
+rm -rf $RPM_BUILD_DIR/%{name}-%{version}
+rm -rf $RPM_SOURCE_DIR/%{name}-%{version}
+
+%files
+%defattr(-,root,root)
+%{theprefix}
+%doc
+
+%changelog
+* Tue Jul 26 2005 kwright <kwright@cs.berkeley.edu>
+- Increase release version for avr; old version did not have the $
+  patch
+* Tue Mar 11 2005 kwright <kwright@cs.berkeley.edu>
+- Initial version for multi-platform, multi-target.
+
+
diff --git a/tools/release/external-tools/make.spec b/tools/release/external-tools/make.spec
new file mode 100644
index 00000000..53da77e0
--- /dev/null
+++ b/tools/release/external-tools/make.spec
@@ -0,0 +1,57 @@
+Summary: GNU Make 3.80 patched for use with TinyOS
+Name: make
+Version: 3.80tinyos
+Release: 1
+Packager: TinyOS Group, UC Berkeley
+License: GNU GPL
+Group: Development/Tools
+URL: http://www.tinyos.net/dist-2.0.0
+Source0: %{name}-%{version}.tar.bz2
+BuildRoot: %{_tmppath}/%{name}-root
+
+%description
+GNU make 3.80 patched for use with TinyOS. 
+
+%prep
+%setup -q
+
+%build
+./configure --prefix=/usr
+make
+
+%pre
+# This worked in linux, but not in cygwin:
+#   cp: `/usr/bin/make' and `/usr/bin/make-unpatched' are the same file
+#   error: %pre(make-3.80tinyos-1) scriptlet failed, exit status 1
+#   error:   install: %pre scriptlet failed (2), skipping make-3.80tinyos-1
+# cp /usr/bin/make /usr/bin/make-unpatched
+
+%install
+rm -rf %{buildroot}/usr
+make prefix=%{buildroot}/usr install
+cd %{buildroot}/usr
+# just install the modified make
+rm -rf man share info
+
+%clean
+rm -rf $RPM_BUILD_DIR/%{name}-%{version}
+rm -rf $RPM_SOURCE_DIR/%{name}-%{version}
+
+%files
+%defattr(-,root,root,-)
+/usr
+%doc
+
+%changelog
+* Mon May 23 2005 kwright <kwright@cs.berkeley.edu> 
+- Initial build.
+
+#
+# Use Phil's tgz to build make. Before installing,
+# move existing to /usr/bin/make-unpatched. 
+#
+# In order to not generate the debuginfo for this, the 
+# users's .rpmmacro must have this line:
+#    %debug_package %{nil}
+#
+
diff --git a/tools/release/external-tools/msp430-libc.spec b/tools/release/external-tools/msp430-libc.spec
new file mode 100755
index 00000000..5cd0c072
--- /dev/null
+++ b/tools/release/external-tools/msp430-libc.spec
@@ -0,0 +1,76 @@
+# 
+# The source must be in a tgz with the 
+# name %{target}-%{version}-binutils.tgz.
+# When unfolded, the top-level directory 
+# must be %{target}-%{version}.
+# 
+# avr:
+# target: avr
+# libname: libc
+# version: 1.2.3
+# release: 1
+# url: http://savannah.nongnu.org/download/avr-libc/
+# 
+# xscale-elf:
+# target: xscale-elf
+# libname: newlib
+# version: 1.11tinyos
+# release: 1
+# url: ftp://sources.redhat.com/pub/newlib/newlib-1.11.0.tar.gz
+
+%define target msp430tools 
+%define libname libc
+%define version 20080808
+%define release 1
+%define url http://savannah.nongnu.org/download/
+%define name     %{target}-%{libname}
+%define theprefix /opt
+%define source   %{name}-%{version}.tgz
+%define __strip msp430-strip
+%define debug_package %{nil}
+
+Summary: C library for the %{target} platform
+Name: %{name}
+Version: %{version}
+Release: %{release}
+Packager: TinyOS Group, UC Berkeley
+License: GNU GPL-compatible
+Group: Development/Tools
+URL: %{url}
+Source0: %{source}
+BuildRoot: %{_tmppath}/%{name}-root
+
+%description
+C library for the %{target} platform.
+
+%prep
+%setup -q
+
+%build
+# doconf can have additional configuration parameters
+cd src
+make
+
+%install
+rm -rf %{buildroot}%{theprefix}
+cd src
+make prefix=%{buildroot}%{theprefix}/msp430 install
+cd %{buildroot}%{theprefix}
+rm -rf info
+
+%clean
+rm -rf $RPM_BUILD_DIR/%{name}-%{version}
+rm -rf $RPM_SOURCE_DIR/%{name}-%{version}
+
+%files
+%{theprefix}
+%defattr(-,root,root,-)
+%doc
+
+
+%changelog
+* Fri Mar 10 2005 root <kwright@cs.berkeley.edu> 1.2.3-1
+- Initial version for multi-platform, multi-target
+
+
+
diff --git a/tools/release/external-tools/xscale-elf.gcc.spec b/tools/release/external-tools/xscale-elf.gcc.spec
new file mode 100755
index 00000000..13e95261
--- /dev/null
+++ b/tools/release/external-tools/xscale-elf.gcc.spec
@@ -0,0 +1,62 @@
+# 
+# The source must be in a tgz with the 
+# name %{target}-%{version}-binutils.tgz.
+# When unfolded, the top-level directory 
+# must be %{target}-%{version}.
+# 
+#
+# 03/14/2005 xscale
+# target: xscale-elf
+# version: 3.4.3
+# release: 1
+# 
+
+%define target xscale-elf
+%define version  3.4.3
+%define release  1
+%define name     %{target}-gcc
+%define theprefix /usr
+%define source %{name}-%{version}.tgz
+
+Summary: gcc compiled for the %{target} platform 
+Name: %{name}
+Version: %{version}
+Release: %{release}
+Packager: kwright, TinyOS Group, UC Berkeley
+License: GNU GPL
+Group: Development/Tools
+URL: ftp://ftp.gnu.org/pub/gnu/gcc/gcc-3.4.3/gcc-3.4.3.tar.bz2
+Source0: %{name}-%{version}.tgz
+BuildRoot: %{_tmppath}/%{name}-root
+
+%description
+gcc compiled for the %{target} platform. The tarfile was renamed 
+to %{target}-gcc* to reflect the purpose. 
+
+%prep
+%setup -q
+
+%build
+./configure --target=%{target} --enable-languages=c --disable-nls --prefix=/usr
+make
+
+%install
+rm -rf %{buildroot}%{theprefix}
+make prefix=%{buildroot}%{theprefix} install
+cd %{buildroot}%{theprefix}
+rm lib/libiberty.a
+
+%clean
+rm -rf $RPM_BUILD_DIR/%{name}-%{version}
+rm -rf $RPM_SOURCE_DIR/%{name}-%{version}
+
+%files
+%defattr(-,root,root,-)
+%{theprefix}
+%doc
+
+%changelog
+* Mon Mar 14 2005 root <kwright@cs.berkeley.edu> 3.4.3
+- Initial build for multi-platform, multi-target
+
+
diff --git a/tools/release/extractor b/tools/release/extractor
new file mode 100755
index 00000000..97679f5b
--- /dev/null
+++ b/tools/release/extractor
@@ -0,0 +1,27 @@
+#!/usr/bin/perl
+$name = $ARGV[0];
+$file_path = $ARGV[1];
+
+@files = split /\n/, `find .`;
+@result = @files;
+
+while (<STDIN>) {
+    if (/^!(.*)/) { # exclude
+	$pat = $1;
+	@result = grep !/$pat/, @result;
+    }
+    else { # include
+	$pat = $_;
+	chop $pat;
+	push @result, grep /$pat/, @files;
+    }
+}
+
+mkdir $name;
+open TAR, "|tar cf - -T - --no-recursion | tar xf - -C $name";
+print TAR join("\n", @result);
+close TAR;
+system("tar cfz $file_path $name");
+system("rm -rf $name");
+
+
diff --git a/tools/release/nesc.spec b/tools/release/nesc.spec
new file mode 100644
index 00000000..15f065b0
--- /dev/null
+++ b/tools/release/nesc.spec
@@ -0,0 +1,64 @@
+%define version 1.3.0
+%define theprefix /usr
+
+Summary: nesC compiler 
+Name: nesc
+Version: 1.3.0
+Release: 1%{dist}
+License: GNU GPL Version 2
+Packager: TinyOS Group, UC Berkeley
+Group: Development/Tools
+URL: http://sourceforge.net/projects/nescc
+Source0: %{name}-%{version}.tar.gz
+BuildRoot: %{_tmppath}/%{name}-root
+
+%description
+nesC is a compiler for a C-based language designed to support embedded
+systems including TinyOS. nesC provides several advantages for the
+TinyOS compiler infrastructure: improved syntax, support for full type
+safety, abundant error reporting, generic components, and Java-like
+interfaces.
+
+%prep
+%setup -q
+
+%build
+./configure --prefix=%{theprefix}
+make 
+
+%install
+rm -rf %{buildroot}%{theprefix}
+make prefix=%{buildroot}%{theprefix} install
+
+%clean
+rm -rf $RPM_BUILD_DIR/%{name}-%{version}
+
+%files
+%defattr(-,root,root,-)
+%{theprefix}
+%doc
+
+%changelog
+* Wed Aug 6 2008  <david.e.gay@intel.com> 1.3.0
+- Deputy support
+* Tue Jul 3 2007  <david.e.gay@intel.com> 1.2.9
+* Wed Dec 20 2006  <david.e.gay@intel.com> 1.2.8a
+* Fri Dec 1 2006  <david.e.gay@intel.com> 1.2.8
+* Thu Jul 6 2006  <kwright@archrock.com> 1.2.7a
+* Wed Jun 28 2006  <kwright@archrock.com> 1.2.7
+- Version 1.2.7
+* Fri Feb 3 2006  <kwright@cs.berkeley.edu> 1.2.4
+- Version 1.2.4
+* Mon Mar 14 2005  <kwright@cs.berkeley.edu> 1.1.2b
+- Version 1.1.2b; use buildroot
+* Tue Jul 27 2004  <dgay@intel-research.net> 1.1.2-1w
+- Version 1.1.2
+* Fri Sep 26 2003 root <kwright@cs.utah.edu> 1.1-1
+- New source
+* Fri Sep 19 2003 root <kwright@cs.utah.edu> 1.1pre4-2
+- Removed set-mote-id
+* Fri Sep 12 2003 root <kwright@cs.utah.edu> 1.1pre4-1
+- New source
+* Fri Aug 15 2003 root <kwright@cs.utah.edu> 1.1pre2-1
+- Initial build.
+
diff --git a/tools/release/tinyos-tools.files b/tools/release/tinyos-tools.files
new file mode 100755
index 00000000..20145b9e
--- /dev/null
+++ b/tools/release/tinyos-tools.files
@@ -0,0 +1,19 @@
+NAME="$1"
+VERSION="$2"
+OUTPUT_FILE="$3"
+
+pushd ../../
+./tools/release/extractor $NAME-$VERSION $OUTPUT_FILE <<'EOF'
+!^./apps
+!^./doc
+!^./support
+!^./tools/release
+!^./tos
+!^./README|overall-todo.txt|release-notes.txt
+!/.cvsignore
+!/CVS/
+!/CVS$
+!~$
+!#
+EOF
+popd
diff --git a/tools/release/tinyos-tools.spec b/tools/release/tinyos-tools.spec
new file mode 100644
index 00000000..0fe0968f
--- /dev/null
+++ b/tools/release/tinyos-tools.spec
@@ -0,0 +1,102 @@
+%define debug_package %{nil}
+
+Summary: TinyOS tools 
+Name: tinyos-tools
+Version: 1.4.0
+Release: 1%{dist}
+License: Please see source
+Group: Development/System
+URL: http://www.tinyos.net/
+BuildRoot: %{_tmppath}/%{name}-root
+Source0: %{name}-%{version}.tar.gz
+# This makes cygwin happy
+Provides: /bin/sh /bin/bash
+Requires: nesc >= 1.3
+
+%description
+Tools for use with tinyos. Includes, for example: uisp, motelist, pybsl, mig,
+ncc and nesdoc. The source for these tools is found in the TinyOS CVS
+repository under tinyos-2.x/tools.
+
+%prep
+%setup -q -n %{name}-%{version}
+
+%build
+cd tools
+./Bootstrap
+NESCC_PREFIX=/usr TOSDIR=/opt/tinyos-2.x/tos ./configure --prefix=/usr
+make
+
+%install
+rm -rf %{buildroot}
+cd tools
+make install prefix=%{buildroot}/usr
+
+%clean
+rm -rf $RPM_BUILD_DIR/%{name}-%{version}
+rm -rf $RPM_SOURCE_DIR/%{name}-%{version}
+
+%files
+%defattr(-,root,root,-)
+/usr/
+%attr(4755, root, root) /usr/bin/uisp*
+
+%post
+if [ -z "$RPM_INSTALL_PREFIX" ]; then
+  RPM_INSTALL_PREFIX=/usr
+fi
+
+# Install giveio (windows only)
+if [ -f $RPM_INSTALL_PREFIX/lib/tinyos/giveio-install ]; then
+  (cd $RPM_INSTALL_PREFIX/lib/tinyos; ./giveio-install --install)
+fi
+# Install the JNI;  we can't call tos-install-jni 
+# directly because it isn't in the path yet. Stick
+# a temporary script in /etc/profile.d and then delete.
+jni=`$RPM_INSTALL_PREFIX/bin/tos-locate-jre --jni`
+if [ $? -ne 0 ]; then
+  echo "Java not found, not installing JNI code"
+  exit 0
+fi
+%ifos linux
+java=`$RPM_INSTALL_PREFIX/bin/tos-locate-jre --java`
+tinyoslibdir=$RPM_INSTALL_PREFIX/lib/tinyos
+bits=32
+if [ $? -ne 0 ]; then
+  echo "java command not found - assuming 32 bits"
+elif file -L $java/java | grep -q 64-bit; then
+  bits=64
+fi
+echo "Installing $bits-bit Java JNI code in $jni ... "
+for lib in $tinyoslibdir/*-$bits.so; do 
+  realname=`basename $lib | sed -e s/-$bits\.so/.so/`
+  install $lib "$jni/$realname" || exit 1
+done
+%else
+echo "Installing Java JNI code in $jni ... "
+for lib in $RPM_INSTALL_PREFIX/lib/tinyos/*.dll; do 
+  install --group=SYSTEM $lib "$jni" || exit 0
+done
+%endif
+echo "done."
+
+%preun
+# Remove JNI code on uninstall
+
+%changelog
+* Sun Jul 29 2007 <pal@cs.stanford.edu> 1.2.4-2
+- Add 64-bit support for Java VMs and deluge tools.
+* Wed Jul 5 2006 <kwright@archrock.com> 1.2.2-1
+* Thu Feb 9 2006 <david.e.gay@intel.com> 1.2.1-2
+* Sat Feb 4 2006 <kwright@cs.berkeley.edu> 1.2.1-1
+- 1.2.1
+* Wed Aug 26 2005 <kwright@cs.berkeley.edu> 1.2.0-beta2.1
+- includes dgay fixes for uisp and calling tos-locate-jre from post script
+* Wed Aug 17 2005 <kwright@cs.berkeley.edu> 1.2.0-internal2.1
+- include fixes/improvements to tos-locate-jre and switch prefix to /usr
+* Fri Aug 12 2005  <kwright@cs.berkeley.edu> 1.2.0-internal1.1
+- 1.2
+* Wed Sep  3 2003  <dgay@barnowl.research.intel-research.net> 1.1.0-internal2.1
+- All tools, no java
+* Sun Aug 31 2003 root <kwright@cs.berkeley.edu> 1.1.0-internal1.1
+- Initial build.
diff --git a/tools/release/tinyos.files b/tools/release/tinyos.files
new file mode 100644
index 00000000..7f562471
--- /dev/null
+++ b/tools/release/tinyos.files
@@ -0,0 +1,48 @@
+NAME="$1"
+VERSION="$2"
+OUTPUT_FILE="$3"
+
+pushd ../../
+./tools/release/extractor $NAME-$VERSION $OUTPUT_FILE <<'EOF' 
+!^./apps/tests/(eyesIFX|mica2|msp430|rf230|mts300|telosb)
+!^./apps/tests/(RadioStress|TestAlarm|TestAM|TestAMOnOff|TestAMService|TestBroadcast|TestCollection|TestLocalTime|TestMultihopLqi|TestOscilloscopeLQI|TestPowerManager|TestPowerup|TestPrintf|TestRadioPM|TestScheduler|TestSerialBandwidth|TestSharedResource|TestSimTimers|TestSleep|TestTimerSync|TestTreeRouting|TestTrickleTimer|TestTymo)
+!^/apps/(BlinkAlarm|BlinkMSP430|BlinkTask|BlinkToRadio|Test|TestADC|TestArbiter|TestCC2420|TestRadio|TestSPI|TestScheduler|TestSchedulerTemp|TestSerial)
+!^./doc
+!^./overall-todo.txt
+!^./support/make/Makelocal
+!^./support/make/btnode3.target
+!^./tests
+!^./tools
+!^./tos/chips/Atmega128
+!^./tos/chips/cc2420_pm
+!^./tos/chips/cc1000_pm
+!^./tos/lib/adc
+!^./tos/lib/ByteRadio
+!^./tos/lib/deluge
+!^./tos/lib/net/collection
+!^./tos/lib/net/zigbee
+!^./tos/lib/net/tymo
+!^./tos/lib/oski
+!^./tos/platforms/btnode3
+!/.cvsignore
+!/CVS/
+!/CVS$
+!~$
+!/build/
+!/build$
+!#
+!.class$
+./RadioSenseToLeds/RadioSenseMsg.class
+./MViz/MVizMsg.class
+./tests/cc2420/TestPacketLink/TestPacketLink.class
+./tests/cc2420/TestPacketLink/PacketLinkMsg.class
+./tests/cc2420/TxThroughput/ThroughputMsg.class
+./tests/cc2420/TxThroughput/TxThroughput.class
+./tests/cc2420/LplBroadcastCountToLeds/RadioCountMsg.class
+./tests/cc2420/RssiToSerial/SpecAnalyzer.class
+./tests/cc2420/RssiToSerial/RssiSerialMsg.class
+./tests/TestSerial/TestSerialMsg.class
+./tests/TestSerial/TestSerial.class
+./RadioCountToLeds/RadioCountMsg.class
+EOF
+popd
diff --git a/tools/release/tinyos.spec b/tools/release/tinyos.spec
new file mode 100644
index 00000000..ca01f7b4
--- /dev/null
+++ b/tools/release/tinyos.spec
@@ -0,0 +1,49 @@
+Summary: An event-based operating environment designed for use with embedded networked sensors.
+Name: tinyos
+BuildArchitectures: noarch
+Version: 2.1.1
+Release: 1%{dist}
+License: Please see source
+Packager: TinyOS Group, UC Berkeley
+Group: Development/System
+URL: www.tinyos.net
+Source0: %{name}-%{version}.tar.gz
+BuildRoot: %{_tmppath}/%{name}-root
+Prefix: /opt
+Requires: tinyos-tools >= 1.4, nesc >= 1.3
+
+%description
+TinyOS is an event based operating environment designed for use with 
+embedded networked sensors.  It is designed to support the concurrency
+intensive operations required by networked sensors while requiring minimal
+hardware resources. For a full analysis and description of the
+TinyOS system, its component model, and its implications for Networked
+Sensor Architectures please see: "Architectural Directions for Networked
+Sensors" which can be found off of http://www.tinyos.net
+
+%prep
+%setup -q
+
+%install
+rm -rf %{buildroot}/opt/tinyos-2.x
+mkdir -p %{buildroot}/opt
+export TOSROOT=$RPM_BUILD_DIR/%{name}-%{version}
+export TOSDIR=$TOSROOT/tos
+%ifos linux
+export CLASSPATH=$TOSROOT/support/sdk/java:.
+%else
+export CLASSPATH=`cygpath -w $TOSROOT/support/sdk/java`\;.
+%endif
+cd support/sdk/java
+pwd
+ls
+make tinyos.jar; make clean
+cp -a $RPM_BUILD_DIR/%{name}-%{version} %{buildroot}/opt/tinyos-2.x
+
+%clean
+rm -rf %{buildroot}
+
+%files
+%defattr(-,root, root,-)
+/opt/tinyos-2.x/
+
diff --git a/tools/tinyos/.cvsignore b/tools/tinyos/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/tinyos/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/tinyos/Makefile.am b/tools/tinyos/Makefile.am
new file mode 100644
index 00000000..875fca72
--- /dev/null
+++ b/tools/tinyos/Makefile.am
@@ -0,0 +1,4 @@
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = java misc ncc tosthreads safe
+
diff --git a/tools/tinyos/java/.cvsignore b/tools/tinyos/java/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/tinyos/java/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/tinyos/java/Makefile.am b/tools/tinyos/java/Makefile.am
new file mode 100644
index 00000000..75d91fdc
--- /dev/null
+++ b/tools/tinyos/java/Makefile.am
@@ -0,0 +1,4 @@
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = env serial
+
diff --git a/tools/tinyos/java/README b/tools/tinyos/java/README
new file mode 100644
index 00000000..3148ae7d
--- /dev/null
+++ b/tools/tinyos/java/README
@@ -0,0 +1,2 @@
+JNI libraries for TinyOS's java SDK
+
diff --git a/tools/tinyos/java/env/.cvsignore b/tools/tinyos/java/env/.cvsignore
new file mode 100644
index 00000000..a885461b
--- /dev/null
+++ b/tools/tinyos/java/env/.cvsignore
@@ -0,0 +1,6 @@
+Makefile
+Makefile.in
+.deps
+getenv.dll
+libgetenv.so
+libgetenv-32.so
diff --git a/tools/tinyos/java/env/Makefile.am b/tools/tinyos/java/env/Makefile.am
new file mode 100644
index 00000000..f451e806
--- /dev/null
+++ b/tools/tinyos/java/env/Makefile.am
@@ -0,0 +1,30 @@
+JDK = @JDK@
+
+EXEEXT=
+
+tinyoslibdir=$(libdir)/tinyos
+
+tinyoslib_PROGRAMS = @GETENVLIB@
+
+EXTRA_PROGRAMS = libgetenv-32.so libgetenv-64.so getenv.dll libgetenv.jnilib
+
+SOFLAGS = "-I$(JDK)/include/linux" "-I$(JDK)/include" -shared -fpic
+
+libgetenv_32_so_SOURCES = net_tinyos_util_Env.h net_tinyos_util_Env.c
+libgetenv_64_so_SOURCES = $(libgetenv_32_so_SOURCES)
+
+libgetenv-32.so : net_tinyos_util_Env.h net_tinyos_util_Env.c
+	$(CC) $(SOFLAGS) -m32 net_tinyos_util_Env.c -o$@ || \
+	(echo 32-bit libgetenv.so NOT GENERATED - DO NOT USE THIS RUN TO BUILD AN RPM; echo Press return to continue; read; rm -f $@)
+
+libgetenv-64.so : net_tinyos_util_Env.h net_tinyos_util_Env.c
+	@echo $(CC) $(SOFLAGS) -m64 net_tinyos_util_Env.c -o$@
+	@$(CC) $(SOFLAGS) -m64 net_tinyos_util_Env.c -o$@ || \
+	(echo 64-bit libgetenv.so NOT GENERATED - DO NOT USE THIS RUN TO BUILD AN RPM; echo Press return to continue; read; rm -f $@)
+
+getenv.dll: net_tinyos_util_Env.h net_tinyos_util_Env.c
+	gcc -shared -o$@ -mno-cygwin "-I$(JDK)/include" "-I$(JDK)/include/win32" -D_JNI_IMPLEMENTATION -Wl,--kill-at net_tinyos_util_Env.c
+
+libgetenv.jnilib : net_tinyos_util_Env.h net_tinyos_util_Env.c
+	gcc "-I$(JDK)/Headers" -bundle -fPIC net_tinyos_util_Env.c -o $@
+
diff --git a/tools/tinyos/java/env/net_tinyos_util_Env.c b/tools/tinyos/java/env/net_tinyos_util_Env.c
new file mode 100644
index 00000000..73571878
--- /dev/null
+++ b/tools/tinyos/java/env/net_tinyos_util_Env.c
@@ -0,0 +1,22 @@
+// $Id: net_tinyos_util_Env.c,v 1.4 2006-12-12 18:23:02 vlahan Exp $
+
+#include "net_tinyos_util_Env.h"
+#include <stdlib.h>
+
+
+JNIEXPORT jstring JNICALL Java_net_tinyos_util_Env_igetenv
+  (JNIEnv *env, jclass c, jstring jname)
+{
+  const char *name, *value;
+
+  if (jname == NULL)
+    return NULL;
+
+  name = (*env)->GetStringUTFChars(env, jname, (jboolean *)NULL);
+
+  value = getenv(name) ;
+
+  (*env)->ReleaseStringUTFChars(env, jname, name);
+
+  return value ? (*env)->NewStringUTF(env, value) : NULL;
+}
diff --git a/tools/tinyos/java/env/net_tinyos_util_Env.h b/tools/tinyos/java/env/net_tinyos_util_Env.h
new file mode 100644
index 00000000..16782ef2
--- /dev/null
+++ b/tools/tinyos/java/env/net_tinyos_util_Env.h
@@ -0,0 +1,24 @@
+// $Id: net_tinyos_util_Env.h,v 1.4 2006-12-12 18:23:02 vlahan Exp $
+
+/* DO NOT EDIT THIS FILE - it is machine generated */
+#include <jni.h>
+/* Header for class net_tinyos_util_Env */
+
+#ifndef _Included_net_tinyos_util_Env
+#define _Included_net_tinyos_util_Env
+#ifdef __cplusplus
+extern "C" {
+#endif
+/* Inaccessible static: loaded */
+/*
+ * Class:     net_tinyos_util_Env
+ * Method:    igetenv
+ * Signature: (Ljava/lang/String;)Ljava/lang/String;
+ */
+JNIEXPORT jstring JNICALL Java_net_tinyos_util_Env_igetenv
+  (JNIEnv *, jclass, jstring);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/tools/tinyos/java/serial/.cvsignore b/tools/tinyos/java/serial/.cvsignore
new file mode 100644
index 00000000..6a32e9de
--- /dev/null
+++ b/tools/tinyos/java/serial/.cvsignore
@@ -0,0 +1,6 @@
+Makefile
+Makefile.in
+.deps
+toscomm.dll
+libtoscomm.so
+libtoscomm-32.so
diff --git a/tools/tinyos/java/serial/Makefile.am b/tools/tinyos/java/serial/Makefile.am
new file mode 100644
index 00000000..5b63d8b7
--- /dev/null
+++ b/tools/tinyos/java/serial/Makefile.am
@@ -0,0 +1,48 @@
+JDK = @JDK@
+
+EXEEXT=
+
+tinyoslibdir=$(libdir)/tinyos
+
+tinyoslib_PROGRAMS = @TOSCOMMLIB@
+
+EXTRA_PROGRAMS = libtoscomm-32.so libtoscomm-64.so toscomm.dll libtoscomm.jnilib
+
+# Compiling libtoscomm.so with -O2 generates bad code with gcc 4.1.x on x86_64
+# (the -O1 code is slightly weird, but works at least ;-))
+SOFLAGS = -O1 -shared -fPIC "-I$(JDK)/include" "-I$(JDK)/include/linux"
+
+libtoscomm_32_so_SOURCES = \
+  NativeSerialEnums.h \
+  NativeSerial_linux.cpp \
+  TOSComm_wrap.cxx
+
+libtoscomm_64_so_SOURCES = $(libtoscomm_32_so_SOURCES)
+
+toscomm_dll_SOURCES = \
+  NativeSerialEnums.h \
+  NativeSerial_win32.cpp \
+  TOSComm_wrap.cxx
+
+libtoscomm_jnilib_SOURCES = \
+  NativeSerialEnums.h \
+  NativeSerial_darwin.cpp \
+  TOSComm_wrap.cxx
+
+libtoscomm.jnilib:  $(libtoscomm_jnilib_SOURCES)
+	$(CXX) -O2 -bundle "-I$(JDK)/Headers" \
+	 -o $@ NativeSerial_darwin.cpp
+
+libtoscomm-32.so: $(libtoscomm_so_SOURCES)
+	$(CXX) -m32 $(SOFLAGS) -o $@ NativeSerial_linux.cpp || \
+	(echo 32-bit libtoscomm.so NOT GENERATED - DO NOT USE THIS RUN TO BUILD AN RPM; echo Press return to continue; read; rm -f $@)
+
+libtoscomm-64.so: $(libtoscomm_so_SOURCES)
+	@echo $(CXX) -m64 $(SOFLAGS) -o $@ NativeSerial_linux.cpp
+	@$(CXX) -m64 $(SOFLAGS) -o $@ NativeSerial_linux.cpp || \
+	(echo 64-bit libtoscomm.so NOT GENERATED - DO NOT USE THIS RUN TO BUILD AN RPM; echo Press return to continue; read; rm -f $@)
+
+toscomm.dll: $(toscomm_dll_SOURCES)
+	$(CXX) -O2 -s -mno-cygwin -shared "-I$(JDK)/include" "-I$(JDK)/include/win32" -D_JNI_IMPLEMENTATION -Wl,--kill-at \
+	  -o $@ NativeSerial_win32.cpp
+
diff --git a/tools/tinyos/java/serial/NativeSerial.h b/tools/tinyos/java/serial/NativeSerial.h
new file mode 100644
index 00000000..1016afd9
--- /dev/null
+++ b/tools/tinyos/java/serial/NativeSerial.h
@@ -0,0 +1,77 @@
+//$Id: NativeSerial.h,v 1.5 2010-06-29 22:07:42 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+#include <stdexcept>
+
+class NativeSerial
+{
+public:
+  void setSerialPortParams( int baudrate, int databits, int stopbits, bool parity );
+  int getBaudRate();
+  int getDataBits();
+  int getStopBits();
+  bool getParity();
+
+  void notifyOn( int event, bool enable );
+  bool isNotifyOn( int event );
+  bool waitForEvent();
+  bool cancelWait();
+  bool didEventOccur( int event );
+
+  void setDTR( bool high );
+  void setRTS( bool high );
+  bool isDTR();
+  bool isRTS();
+  bool isCTS();
+  bool isDSR();
+  bool isRI();
+  bool isCD();
+
+  void sendBreak( int millis );
+
+  NativeSerial( const char* portname );
+  ~NativeSerial();
+
+  void close();
+
+  int available();
+  int read();
+  int read( signed char buffer_out[], int off, int len );
+  int write( int b );
+  int write( const signed char buffer_in[], int off, int len );
+
+  static std::string getTOSCommMap();
+};
+
diff --git a/tools/tinyos/java/serial/NativeSerialEnums.h b/tools/tinyos/java/serial/NativeSerialEnums.h
new file mode 100644
index 00000000..a46dd99c
--- /dev/null
+++ b/tools/tinyos/java/serial/NativeSerialEnums.h
@@ -0,0 +1,66 @@
+//$Id: NativeSerialEnums.h,v 1.5 2010-06-29 22:07:42 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+namespace NativeSerialEnums
+{
+  enum event_type
+  {
+    DATA_AVAILABLE = (1<<0),
+    OUTPUT_EMPTY = (1<<1),
+    CTS = (1<<2),
+    DSR = (1<<3),
+    RING_INDICATOR = (1<<4),
+    CARRIER_DETECT = (1<<5),
+    OVERRUN_ERROR = (1<<6),
+    PARITY_ERROR = (1<<7),
+    FRAMING_ERROR = (1<<8),
+    BREAK_INTERRUPT = (1<<9),
+  };
+
+  enum parity_type
+  {
+    NPARITY_NONE = 0,
+    NPARITY_EVEN = 1,
+    NPARITY_ODD = 2,
+  };
+
+  enum stop_type
+  {
+    STOPBITS_1 = 1,
+    STOPBITS_2 = 2,
+    STOPBITS_1_5 = 3,
+  };
+};
+
diff --git a/tools/tinyos/java/serial/NativeSerial_darwin.cpp b/tools/tinyos/java/serial/NativeSerial_darwin.cpp
new file mode 100644
index 00000000..cfbb89f1
--- /dev/null
+++ b/tools/tinyos/java/serial/NativeSerial_darwin.cpp
@@ -0,0 +1,522 @@
+//$Id: NativeSerial_darwin.cpp,v 1.2 2010-06-29 22:07:42 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+#include <stdexcept>
+#include <sstream>
+#include <iostream>
+#include <fstream>
+
+#include <stdio.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <sys/ioctl.h>
+#include <termios.h>
+#include <signal.h>
+#include <errno.h>
+
+#include "NativeSerialEnums.h"
+using namespace NativeSerialEnums;
+
+
+class comm_port_error : public std::runtime_error
+{
+  public:
+    comm_port_error( const char* msg ): std::runtime_error(msg) { }
+};
+
+
+class NativeSerial
+{
+public:
+  typedef std::string String;
+
+private:
+
+  std::string m_portname;
+  int m_fd;
+  int m_events_in;
+  int m_events_out;
+  bool m_wait_for_events;
+
+protected:
+
+  void note( std::string s )
+  {
+    //std::cout << "NativeSerial_linux " << m_portname << ": " << s << std::endl;
+  }
+
+  String cat( const char* prefix, const String& err )
+  {
+    return (prefix == NULL ? "" : String(prefix)+": ") + err;
+  }
+
+  void errno_wrap( bool error, const char* extra_err = NULL )
+  {
+    if( error && (errno != 0) )
+      throw comm_port_error( cat(extra_err, strerror(errno)).c_str() );
+  }
+
+  void block_on_read( bool block )
+  {
+note( "block_on_read begin" );
+    fcntl( m_fd, F_SETFL, (block ? 0 : FNDELAY) );
+note( "block_on_read end" );
+  }
+
+  struct termios get_comm_state()
+  {
+note( "get_comm_state begin" );
+    struct termios options;
+    errno_wrap( tcgetattr( m_fd, &options ) == -1, "get_comm_state" );
+note( "get_comm_state end" );
+    return options;
+  }
+
+
+  int get_modem_status()
+  {
+note( "get_modem_status begin" );
+    int status = 0;
+    errno_wrap( ioctl( m_fd, TIOCMGET, &status ) == -1, "get_modem_status" );
+note( "get_modem_status end" );
+    return status;
+  }
+
+  void set_modem_status( int status )
+  {
+note( "set_modem_status begin" );
+    errno_wrap( ioctl( m_fd, TIOCMSET, &status ) == -1, "set_modem_status" );
+note( "set_modem_status end" );
+  }
+
+  int baud_to_enum( int baud )
+  {
+    switch( baud )
+    {
+      case 0: return B0;
+      case 50: return B50;
+      case 75: return B75;
+      case 110: return B110;
+      case 134: return B134;
+      case 150: return B150;
+      case 200: return B200;
+      case 300: return B300;
+      case 600: return B600;
+      case 1200: return B1200;
+      case 1800: return B1800;
+      case 2400: return B2400;
+      case 4800: return B4800;
+      case 9600: return B9600;
+      case 19200: return B19200;
+      case 38400: return B38400;
+      case 57600: return B57600;
+      case 115200: return B115200;
+      case 230400: return B230400;
+    }
+    throw comm_port_error("baud_to_enum, bad baud rate");
+  }
+
+  int enum_to_baud( int baudenum )
+  {
+    switch( baudenum )
+    {
+      case B0: return 0;
+      case B50: return 50;
+      case B75: return 75;
+      case B110: return 110;
+      case B134: return 134;
+      case B150: return 150;
+      case B200: return 200;
+      case B300: return 300;
+      case B600: return 600;
+      case B1200: return 1200;
+      case B1800: return 1800;
+      case B2400: return 2400;
+      case B4800: return 4800;
+      case B9600: return 9600;
+      case B19200: return 19200;
+      case B38400: return 38400;
+      case B57600: return 57600;
+      case B115200: return 115200;
+      case B230400: return 230400;
+    }
+    throw comm_port_error("enum_to_baud, bad baud rate");
+  }
+
+/*
+  static DWORD map_events_to_win32( int event )
+  {
+    DWORD ev = 0;
+    if( event & DATA_AVAILABLE ) ev |= EV_RXCHAR;
+    if( event & OUTPUT_EMPTY ) ev |= EV_TXEMPTY;
+    if( event & CTS ) ev |= EV_CTS;
+    if( event & DSR ) ev |= EV_DSR;
+    if( event & RING_INDICATOR ) ev |= EV_RING;
+    if( event & CARRIER_DETECT ) ev |= EV_RLSD;
+    if( event & OVERRUN_ERROR ) ev |= EV_ERR;
+    if( event & PARITY_ERROR ) ev |= EV_ERR;
+    if( event & FRAMING_ERROR ) ev |= EV_ERR;
+    if( event & BREAK_INTERRUPT ) ev |= EV_BREAK;
+    return ev;
+  }
+
+  static int map_events_from_win32( DWORD ev, DWORD errors )
+  {
+    int event = 0;
+    if( ev & EV_RXCHAR ) event |= DATA_AVAILABLE;
+    if( ev & EV_TXEMPTY ) event |= OUTPUT_EMPTY;
+    if( ev & EV_CTS ) event |= CTS;
+    if( ev & EV_DSR ) event |= DSR;
+    if( ev & EV_RING ) event |= RING_INDICATOR;
+    if( ev & EV_RLSD ) event |= CARRIER_DETECT;
+    if( ev & EV_ERR )
+    {
+      if( errors & CE_BREAK ) event |= BREAK_INTERRUPT;
+      if( errors & CE_FRAME ) event |= FRAMING_ERROR;
+      if( errors & CE_IOE ) throw comm_port_error("Win32 Comm IO Error");
+      if( errors & CE_MODE ) throw comm_port_error("Win32 Comm Invalid Mode");
+      if( errors & CE_OVERRUN ) event |= OVERRUN_ERROR;
+      if( errors & CE_RXOVER ) event |= OVERRUN_ERROR; //?? okay
+      if( errors & CE_RXPARITY ) event |= PARITY_ERROR;
+      if( errors & CE_TXFULL ) event |= OVERRUN_ERROR; //?? okay
+    }
+    if( ev & EV_BREAK ) event |= BREAK_INTERRUPT;
+    return event;
+  }
+*/
+
+public:
+
+  void setSerialPortParams( int baudrate, int databits, int stopbits, int parity )
+  {
+note( "setSerialPortParams begin" );
+    struct termios state = get_comm_state();
+
+    int baudenum = baud_to_enum(baudrate);
+    errno_wrap( cfsetispeed( &state, baudenum ) == -1, "baudrate" );
+    errno_wrap( cfsetospeed( &state, baudenum ) == -1, "baudrate" );
+
+    //throw comm_port_error("nuthin");
+
+    state.c_cflag &= ~CSIZE;
+    switch( databits )
+    {
+      case 5: state.c_cflag |= CS5; break;
+      case 6: state.c_cflag |= CS6; break;
+      case 7: state.c_cflag |= CS7; break;
+      case 8: default: state.c_cflag |= CS8;
+    }
+
+    if( stopbits == STOPBITS_2 )
+      state.c_cflag |= CSTOPB;
+    else
+      state.c_cflag &= ~CSTOPB;
+
+    state.c_cflag |= PARENB;
+    switch( parity )
+    {
+      case NPARITY_EVEN: state.c_cflag &= ~PARODD; break;
+      case NPARITY_ODD: state.c_cflag |= PARODD; break;
+      case NPARITY_NONE: default: state.c_cflag &= ~PARENB;
+    }
+
+    errno_wrap( tcsetattr( m_fd, TCSANOW, &state ) == -1, "set_comm_state" );
+note( "setSerialPortParams end" );
+  }
+
+  int getBaudRate()
+  {
+    struct termios state = get_comm_state();
+    return enum_to_baud( cfgetospeed( &state ) );
+  }
+
+  int getDataBits()
+  {
+    switch( get_comm_state().c_cflag & CSIZE )
+    {
+      case CS5: return 5;
+      case CS6: return 6;
+      case CS7: return 7;
+      case CS8: default: return 8;
+    }
+  }
+
+  int getStopBits()
+  {
+    int stop = get_comm_state().c_cflag;
+    return (stop & CSTOPB) ? STOPBITS_2 : STOPBITS_1;
+  }
+
+  int getParity()
+  {
+    int parity = get_comm_state().c_cflag;
+    if( parity & PARENB )
+      return (parity & PARODD) ? NPARITY_ODD : NPARITY_EVEN;
+    return NPARITY_NONE;
+  }
+
+  int read( signed char* buffer, int off, int len )
+  {
+note( "read begin" );
+    int nread = ::read( m_fd, buffer+off, len );
+    errno_wrap( nread == -1, "read" );
+#if 0
+printf("   ...  read:");
+for( int i=0; i<nread; i++ )
+  printf(" %02x",buffer[off+i]&255);
+printf("\n");
+#endif
+note( "read end" );
+    return nread;
+  }
+
+  int write( const signed char* buffer, int off, int len )
+  {
+note( "write begin" );
+    int nwritten = ::write( m_fd, buffer+off, len );
+    errno_wrap( nwritten == -1, "write" );
+#if 0
+printf("   ... wrote:");
+for( int i=0; i<nwritten; i++ )
+  printf(" %02x",buffer[off+i]&255);
+printf("\n");
+#endif
+note( "write end" );
+    return nwritten;
+  }
+
+  int read()
+  {
+    signed char byte;
+    return (read(&byte,0,1) > 0) ? ((unsigned char)byte) : -1;
+  }
+
+  int write( int b )
+  {
+    signed char byte = b;
+    return write( &byte, 0, 1 );
+  }
+
+  int available()
+  {
+note( "available begin" );
+    int navail = 0;
+    int rv = 0;
+    errno_wrap( rv=ioctl( m_fd, FIONREAD, &navail ) == -1, "available" );
+//printf("... fionread=%d, rv=%d\n",navail,rv);
+note( "available end" );
+    return navail;
+  }
+
+  void notifyOn( int event, bool enable )
+  {
+    if( enable )
+      m_events_in |= event;
+    else
+      m_events_in &= ~event;
+  }
+
+  bool isNotifyOn( int event )
+  {
+    return (m_events_in & event) != 0;
+  }
+
+  bool waitForEvent()
+  {
+note( "waitForEvent begin" );
+    fd_set input;
+    struct timeval tv;
+    m_events_out = 0;
+
+    while( m_wait_for_events && (m_fd != -1) && (m_events_out == 0) )
+    {
+      FD_ZERO( &input );
+      FD_SET( m_fd, &input );
+      tv.tv_sec = 0;
+      tv.tv_usec = 100*1000; // 1ms is the minimum resolution, at best
+
+      if( select( m_fd+1, &input, NULL, NULL, &tv ) == -1 )
+      {
+	if( errno == EINTR )
+	  break;
+	errno_wrap( true, "waitForEvent.select" );
+      }
+
+      if( FD_ISSET( m_fd, &input ) )
+	m_events_out |= DATA_AVAILABLE;
+    }
+
+    m_wait_for_events = true;
+note( "waitForEvent end" );
+    return (m_events_out != 0);
+  }
+
+  bool cancelWait()
+  {
+note( "cancelWait begin" );
+    m_wait_for_events = false;
+note( "cancelWait end" );
+  }
+
+  bool didEventOccur( int event )
+  {
+    return (m_events_out & event) != 0;
+  }
+
+  void setDTR( bool high )
+  {
+    if( high )
+      set_modem_status( get_modem_status() | TIOCM_DTR );
+    else
+      set_modem_status( get_modem_status() & ~TIOCM_DTR );
+  }
+
+  void setRTS( bool high )
+  {
+    if( high )
+      set_modem_status( get_modem_status() | TIOCM_RTS );
+    else
+      set_modem_status( get_modem_status() & ~TIOCM_RTS );
+  }
+
+  bool isDTR()
+  {
+    return (get_modem_status() & TIOCM_DTR) != 0;
+  }
+
+  bool isRTS()
+  {
+    return (get_modem_status() & TIOCM_RTS) != 0;
+  }
+
+  bool isCTS()
+  {
+    return (get_modem_status() & TIOCM_CTS) != 0;
+  }
+
+  bool isDSR()
+  {
+    return (get_modem_status() & TIOCM_DSR) != 0;
+  }
+
+  bool isRI()
+  {
+    return (get_modem_status() & TIOCM_RI) != 0;
+  }
+
+  bool isCD()
+  {
+    return (get_modem_status() & TIOCM_CD) != 0;
+  }
+
+  void sendBreak( int millis )
+  {
+  }
+
+  NativeSerial( const char* portname ):
+    m_fd(-1),
+    m_events_in(0), 
+    m_events_out(0),
+    m_wait_for_events(true)
+  {
+    m_portname = portname;
+note( "constructor begin" );
+    m_fd = open( portname, O_RDWR | O_NOCTTY | O_NONBLOCK );
+    errno_wrap( m_fd == -1, "open" );
+
+//std::cout << "NativeSerial constructor [1] " << portname << std::endl;
+
+    block_on_read(false);
+
+    // set default port parmeters
+    struct termios options = get_comm_state();
+
+    // disable rts/cts, no parity bits, one stop bit, clear databits mask
+    //local mode, enable receiver, 8 databits
+    options.c_cflag = CLOCAL | CREAD | CS8;
+
+    //raw mode
+    options.c_lflag = 0;
+
+    //disable software flow control, etc
+    options.c_iflag = IGNPAR | IGNBRK;
+
+    //raw output mode
+    options.c_oflag = 0;
+
+    //set thresholds
+    options.c_cc[VMIN] = 0;
+    options.c_cc[VTIME] = 0;
+
+    errno_wrap( tcflush( m_fd, TCIOFLUSH ) == -1, "flush" );
+    errno_wrap( tcsetattr( m_fd, TCSANOW, &options ) == -1, "setattr" );
+
+    setDTR(false);
+    setRTS(false);
+note( "constructor end" );
+  }
+
+  ~NativeSerial()
+  {
+note( "destructor begin" );
+    close();
+note( "destructor end" );
+  }
+
+  void close()
+  {
+note( "close begin" );
+//std::cout << "NativeSerial_linux close fd=" << m_fd << std::endl;
+    if( m_fd != -1 )
+    {
+      cancelWait();
+      struct timeval tv = { tv_sec:0, tv_usec:1100 };
+      select( 0, NULL, NULL, NULL, &tv );
+      ::close( m_fd );
+      m_fd = -1;
+    }
+note( "close end" );
+  }
+
+  static std::string getTOSCommMap()
+  {
+    const char* env = getenv( "TOSCOMMMAP" );
+    return (env == NULL) ? "com1=/dev/ttyS0:usb1=/dev/ttyUSB0" : env;
+  }
+};
+
+
+#include "TOSComm_wrap.cxx"
+
diff --git a/tools/tinyos/java/serial/NativeSerial_linux.cpp b/tools/tinyos/java/serial/NativeSerial_linux.cpp
new file mode 100644
index 00000000..98fc1f2d
--- /dev/null
+++ b/tools/tinyos/java/serial/NativeSerial_linux.cpp
@@ -0,0 +1,527 @@
+//$Id: NativeSerial_linux.cpp,v 1.7 2010-06-29 22:07:42 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+#include <stdexcept>
+#include <sstream>
+#include <iostream>
+#include <fstream>
+
+#include <stdio.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <termio.h>
+#include <termios.h>
+#include <signal.h>
+#include <errno.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "NativeSerialEnums.h"
+using namespace NativeSerialEnums;
+
+
+class comm_port_error : public std::runtime_error
+{
+  public:
+    comm_port_error( const char* msg ): std::runtime_error(msg) { }
+};
+
+
+class NativeSerial
+{
+public:
+  typedef std::string String;
+
+private:
+
+  std::string m_portname;
+  int m_fd;
+  int m_events_in;
+  int m_events_out;
+  bool m_wait_for_events;
+
+protected:
+
+  void note( std::string s )
+  {
+    //std::cout << "NativeSerial_linux " << m_portname << ": " << s << std::endl;
+  }
+
+  String cat( const char* prefix, const String& err )
+  {
+    return (prefix == NULL ? "" : String(prefix)+": ") + err;
+  }
+
+  void errno_wrap( bool error, const char* extra_err = NULL )
+  {
+    if( error && (errno != 0) )
+      throw comm_port_error( cat(extra_err, strerror(errno)).c_str() );
+  }
+
+  void block_on_read( bool block )
+  {
+note( "block_on_read begin" );
+    fcntl( m_fd, F_SETFL, (block ? 0 : FNDELAY) );
+note( "block_on_read end" );
+  }
+
+  struct termios get_comm_state()
+  {
+note( "get_comm_state begin" );
+    struct termios options;
+    errno_wrap( tcgetattr( m_fd, &options ) == -1, "get_comm_state" );
+note( "get_comm_state end" );
+    return options;
+  }
+
+
+  int get_modem_status()
+  {
+note( "get_modem_status begin" );
+    int status = 0;
+    errno_wrap( ioctl( m_fd, TIOCMGET, &status ) == -1, "get_modem_status" );
+note( "get_modem_status end" );
+    return status;
+  }
+
+  void set_modem_status( int status )
+  {
+note( "set_modem_status begin" );
+    errno_wrap( ioctl( m_fd, TIOCMSET, &status ) == -1, "set_modem_status" );
+note( "set_modem_status end" );
+  }
+
+  int baud_to_enum( int baud )
+  {
+    switch( baud )
+    {
+      case 0: return B0;
+      case 50: return B50;
+      case 75: return B75;
+      case 110: return B110;
+      case 134: return B134;
+      case 150: return B150;
+      case 200: return B200;
+      case 300: return B300;
+      case 600: return B600;
+      case 1200: return B1200;
+      case 1800: return B1800;
+      case 2400: return B2400;
+      case 4800: return B4800;
+      case 9600: return B9600;
+      case 19200: return B19200;
+      case 38400: return B38400;
+      case 57600: return B57600;
+      case 115200: return B115200;
+      case 230400: return B230400;
+    }
+    throw comm_port_error("baud_to_enum, bad baud rate");
+  }
+
+  int enum_to_baud( int baudenum )
+  {
+    switch( baudenum )
+    {
+      case B0: return 0;
+      case B50: return 50;
+      case B75: return 75;
+      case B110: return 110;
+      case B134: return 134;
+      case B150: return 150;
+      case B200: return 200;
+      case B300: return 300;
+      case B600: return 600;
+      case B1200: return 1200;
+      case B1800: return 1800;
+      case B2400: return 2400;
+      case B4800: return 4800;
+      case B9600: return 9600;
+      case B19200: return 19200;
+      case B38400: return 38400;
+      case B57600: return 57600;
+      case B115200: return 115200;
+      case B230400: return 230400;
+    }
+    throw comm_port_error("enum_to_baud, bad baud rate");
+  }
+
+/*
+  static DWORD map_events_to_win32( int event )
+  {
+    DWORD ev = 0;
+    if( event & DATA_AVAILABLE ) ev |= EV_RXCHAR;
+    if( event & OUTPUT_EMPTY ) ev |= EV_TXEMPTY;
+    if( event & CTS ) ev |= EV_CTS;
+    if( event & DSR ) ev |= EV_DSR;
+    if( event & RING_INDICATOR ) ev |= EV_RING;
+    if( event & CARRIER_DETECT ) ev |= EV_RLSD;
+    if( event & OVERRUN_ERROR ) ev |= EV_ERR;
+    if( event & PARITY_ERROR ) ev |= EV_ERR;
+    if( event & FRAMING_ERROR ) ev |= EV_ERR;
+    if( event & BREAK_INTERRUPT ) ev |= EV_BREAK;
+    return ev;
+  }
+
+  static int map_events_from_win32( DWORD ev, DWORD errors )
+  {
+    int event = 0;
+    if( ev & EV_RXCHAR ) event |= DATA_AVAILABLE;
+    if( ev & EV_TXEMPTY ) event |= OUTPUT_EMPTY;
+    if( ev & EV_CTS ) event |= CTS;
+    if( ev & EV_DSR ) event |= DSR;
+    if( ev & EV_RING ) event |= RING_INDICATOR;
+    if( ev & EV_RLSD ) event |= CARRIER_DETECT;
+    if( ev & EV_ERR )
+    {
+      if( errors & CE_BREAK ) event |= BREAK_INTERRUPT;
+      if( errors & CE_FRAME ) event |= FRAMING_ERROR;
+      if( errors & CE_IOE ) throw comm_port_error("Win32 Comm IO Error");
+      if( errors & CE_MODE ) throw comm_port_error("Win32 Comm Invalid Mode");
+      if( errors & CE_OVERRUN ) event |= OVERRUN_ERROR;
+      if( errors & CE_RXOVER ) event |= OVERRUN_ERROR; //?? okay
+      if( errors & CE_RXPARITY ) event |= PARITY_ERROR;
+      if( errors & CE_TXFULL ) event |= OVERRUN_ERROR; //?? okay
+    }
+    if( ev & EV_BREAK ) event |= BREAK_INTERRUPT;
+    return event;
+  }
+*/
+
+public:
+
+  void setSerialPortParams( int baudrate, int databits, int stopbits, int parity )
+  {
+note( "setSerialPortParams begin" );
+    struct termios state = get_comm_state();
+
+    int baudenum = baud_to_enum(baudrate);
+    errno_wrap( cfsetispeed( &state, baudenum ) == -1, "baudrate" );
+    errno_wrap( cfsetospeed( &state, baudenum ) == -1, "baudrate" );
+
+    //throw comm_port_error("nuthin");
+
+    state.c_cflag &= ~CSIZE;
+    switch( databits )
+    {
+      case 5: state.c_cflag |= CS5; break;
+      case 6: state.c_cflag |= CS6; break;
+      case 7: state.c_cflag |= CS7; break;
+      case 8: default: state.c_cflag |= CS8;
+    }
+
+    if( stopbits == STOPBITS_2 )
+      state.c_cflag |= CSTOPB;
+    else
+      state.c_cflag &= ~CSTOPB;
+
+    state.c_cflag |= PARENB;
+    switch( parity )
+    {
+      case NPARITY_EVEN: state.c_cflag &= ~PARODD; break;
+      case NPARITY_ODD: state.c_cflag |= PARODD; break;
+      case NPARITY_NONE: default: state.c_cflag &= ~PARENB;
+    }
+
+    errno_wrap( tcsetattr( m_fd, TCSANOW, &state ) == -1, "set_comm_state" );
+note( "setSerialPortParams end" );
+  }
+
+  int getBaudRate()
+  {
+    struct termios state = get_comm_state();
+    return enum_to_baud( cfgetospeed( &state ) );
+  }
+
+  int getDataBits()
+  {
+    switch( get_comm_state().c_cflag & CSIZE )
+    {
+      case CS5: return 5;
+      case CS6: return 6;
+      case CS7: return 7;
+      case CS8: default: return 8;
+    }
+  }
+
+  int getStopBits()
+  {
+    int stop = get_comm_state().c_cflag;
+    return (stop & CSTOPB) ? STOPBITS_2 : STOPBITS_1;
+  }
+
+  int getParity()
+  {
+    int parity = get_comm_state().c_cflag;
+    if( parity & PARENB )
+      return (parity & PARODD) ? NPARITY_ODD : NPARITY_EVEN;
+    return NPARITY_NONE;
+  }
+
+  int read( signed char* buffer, int off, int len )
+  {
+note( "read begin" );
+    int nread = ::read( m_fd, buffer+off, len );
+    errno_wrap( nread == -1, "read" );
+#if 0
+printf("   ...  read:");
+for( int i=0; i<nread; i++ )
+  printf(" %02x",buffer[off+i]&255);
+printf("\n");
+#endif
+note( "read end" );
+    return nread;
+  }
+
+  int write( const signed char* buffer, int off, int len )
+  {
+note( "write begin" );
+    int nwritten = ::write( m_fd, buffer+off, len );
+    errno_wrap( nwritten == -1, "write" );
+#if 0
+printf("   ... wrote:");
+for( int i=0; i<nwritten; i++ )
+  printf(" %02x",buffer[off+i]&255);
+printf("\n");
+#endif
+note( "write end" );
+    return nwritten;
+  }
+
+  int read()
+  {
+    signed char byte;
+    return (read(&byte,0,1) > 0) ? ((unsigned char)byte) : -1;
+  }
+
+  int write( int b )
+  {
+    signed char byte = b;
+    return write( &byte, 0, 1 );
+  }
+
+  int available()
+  {
+note( "available begin" );
+    int navail = 0;
+    int rv = 0;
+    errno_wrap( rv=ioctl( m_fd, FIONREAD, &navail ) == -1, "available" );
+//printf("... fionread=%d, rv=%d\n",navail,rv);
+note( "available end" );
+    return navail;
+  }
+
+  void notifyOn( int event, bool enable )
+  {
+    if( enable )
+      m_events_in |= event;
+    else
+      m_events_in &= ~event;
+  }
+
+  bool isNotifyOn( int event )
+  {
+    return (m_events_in & event) != 0;
+  }
+
+  bool waitForEvent()
+  {
+note( "waitForEvent begin" );
+    fd_set input;
+    struct timeval tv;
+    m_events_out = 0;
+    int fd = m_fd;
+
+    while( m_wait_for_events && (m_fd != -1) && (m_events_out == 0) )
+    {
+      FD_ZERO( &input );
+      FD_SET( fd, &input );
+      tv.tv_sec = 0;
+      tv.tv_usec = 100*1000; // 1ms is the minimum resolution, at best
+
+      if( select( fd+1, &input, NULL, NULL, &tv ) == -1 )
+      {
+	if( errno == EINTR )
+	  break;
+	errno_wrap( true, "waitForEvent.select" );
+      }
+
+      if( FD_ISSET( fd, &input ) )
+	m_events_out |= DATA_AVAILABLE;
+    }
+
+    m_wait_for_events = true;
+note( "waitForEvent end" );
+    return (m_events_out != 0);
+  }
+
+  bool cancelWait()
+  {
+note( "cancelWait begin" );
+    m_wait_for_events = false;
+note( "cancelWait end" );
+  }
+
+  bool didEventOccur( int event )
+  {
+    return (m_events_out & event) != 0;
+  }
+
+  void setDTR( bool high )
+  {
+    if( high )
+      set_modem_status( get_modem_status() | TIOCM_DTR );
+    else
+      set_modem_status( get_modem_status() & ~TIOCM_DTR );
+  }
+
+  void setRTS( bool high )
+  {
+    if( high )
+      set_modem_status( get_modem_status() | TIOCM_RTS );
+    else
+      set_modem_status( get_modem_status() & ~TIOCM_RTS );
+  }
+
+  bool isDTR()
+  {
+    return (get_modem_status() & TIOCM_DTR) != 0;
+  }
+
+  bool isRTS()
+  {
+    return (get_modem_status() & TIOCM_RTS) != 0;
+  }
+
+  bool isCTS()
+  {
+    return (get_modem_status() & TIOCM_CTS) != 0;
+  }
+
+  bool isDSR()
+  {
+    return (get_modem_status() & TIOCM_DSR) != 0;
+  }
+
+  bool isRI()
+  {
+    return (get_modem_status() & TIOCM_RI) != 0;
+  }
+
+  bool isCD()
+  {
+    return (get_modem_status() & TIOCM_CD) != 0;
+  }
+
+  void sendBreak( int millis )
+  {
+  }
+
+  NativeSerial( const char* portname ):
+    m_fd(-1),
+    m_events_in(0), 
+    m_events_out(0),
+    m_wait_for_events(true)
+  {
+    m_portname = portname;
+note( "constructor begin" );
+    m_fd = open( portname, O_RDWR | O_NOCTTY | O_NONBLOCK );
+    errno_wrap( m_fd == -1, "open" );
+
+//std::cout << "NativeSerial constructor [1] " << portname << std::endl;
+
+    block_on_read(false);
+
+    // set default port parmeters
+    //struct termios options = get_comm_state();
+    struct termios options;
+    memset( &options, 0, sizeof(options) );
+
+    // disable rts/cts, no parity bits, one stop bit, clear databits mask
+    //local mode, enable receiver, 8 databits
+    options.c_cflag = CLOCAL | CREAD | CS8;
+
+    //raw mode
+    options.c_lflag = 0;
+
+    //disable software flow control, etc
+    options.c_iflag = IGNPAR | IGNBRK;
+
+    //raw output mode
+    options.c_oflag = 0;
+
+    //set thresholds
+    options.c_cc[VMIN] = 0;
+    options.c_cc[VTIME] = 0;
+
+    errno_wrap( tcflush( m_fd, TCIOFLUSH ) == -1, "flush" );
+    errno_wrap( tcsetattr( m_fd, TCSANOW, &options ) == -1, "setattr" );
+
+    setDTR(false);
+    setRTS(false);
+note( "constructor end" );
+  }
+
+  ~NativeSerial()
+  {
+note( "destructor begin" );
+    close();
+note( "destructor end" );
+  }
+
+  void close()
+  {
+note( "close begin" );
+//std::cout << "NativeSerial_linux close fd=" << m_fd << std::endl;
+    if( m_fd != -1 )
+    {
+      cancelWait();
+      struct timeval tv = { tv_sec:0, tv_usec:1100 };
+      select( 0, NULL, NULL, NULL, &tv );
+      ::close( m_fd );
+      m_fd = -1;
+    }
+note( "close end" );
+  }
+
+  static std::string getTOSCommMap()
+  {
+    const char* env = getenv( "TOSCOMMMAP" );
+    return (env == NULL) ? "com1=/dev/ttyS0:usb1=/dev/ttyUSB0" : env;
+  }
+};
+
+
+#include "TOSComm_wrap.cxx"
+
diff --git a/tools/tinyos/java/serial/NativeSerial_win32.cpp b/tools/tinyos/java/serial/NativeSerial_win32.cpp
new file mode 100644
index 00000000..f9a7138c
--- /dev/null
+++ b/tools/tinyos/java/serial/NativeSerial_win32.cpp
@@ -0,0 +1,426 @@
+//$Id: NativeSerial_win32.cpp,v 1.5 2010-06-29 22:07:42 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+#include <windows.h>
+#include <stdexcept>
+#include <sstream>
+#include <iostream>
+
+#include "NativeSerialEnums.h"
+using namespace NativeSerialEnums;
+
+
+class comm_port_error : public std::runtime_error
+{
+  public:
+    comm_port_error( const char* msg ): std::runtime_error(msg) { }
+};
+
+
+class W32Overlapped
+{
+public:
+  OVERLAPPED o;
+
+  W32Overlapped()
+  {
+    o.hEvent = CreateEvent( NULL, FALSE, FALSE, NULL );
+    o.Internal = 0;
+    o.InternalHigh = 0;
+    o.Offset = 0;
+    o.OffsetHigh = 0;
+    if( o.hEvent == NULL )
+      throw comm_port_error("could not create Overlapped event");
+  }
+
+  ~W32Overlapped()
+  {
+    if( o.hEvent != NULL )
+      CloseHandle( o.hEvent );
+  }
+};
+
+
+class NativeSerial
+{
+private:
+
+  HANDLE hComm;
+  W32Overlapped oread;
+  W32Overlapped owrite;
+  W32Overlapped owait;
+  W32Overlapped oavail;
+
+  std::string m_portname;
+  int m_events_in;
+  int m_events_out;
+  bool m_dtr;
+  bool m_rts;
+
+protected:
+
+  void test_comm_success( bool success, const char* extra_msg )
+  {
+    if( !success )
+    {
+      DWORD err = GetLastError();
+      std::ostringstream os;
+      char msg[1024];
+      FormatMessage( FORMAT_MESSAGE_FROM_SYSTEM, NULL, err, 0, msg, sizeof(msg), NULL );
+      os << "Error " << err << ".\n   " << msg;
+      if( extra_msg != NULL ) { os << "   in " << extra_msg; }
+      throw comm_port_error(os.str().c_str());
+    }
+  }
+
+  DCB get_comm_state()
+  {
+    DCB dcb;
+    test_comm_success( GetCommState( hComm, &dcb ), "get_comm_state.GetCommState" );
+    return dcb;
+  }
+
+  DWORD get_modem_status()
+  {
+    DWORD status = 0;
+    test_comm_success( GetCommModemStatus( hComm, &status ), "get_modem_stauts.GetCommModemStatus" );
+    return status;
+  }
+
+  static DWORD map_events_to_win32( int event )
+  {
+    DWORD ev = 0;
+    if( event & DATA_AVAILABLE ) ev |= EV_RXCHAR;
+    if( event & OUTPUT_EMPTY ) ev |= EV_TXEMPTY;
+    if( event & CTS ) ev |= EV_CTS;
+    if( event & DSR ) ev |= EV_DSR;
+    if( event & RING_INDICATOR ) ev |= EV_RING;
+    if( event & CARRIER_DETECT ) ev |= EV_RLSD;
+    if( event & OVERRUN_ERROR ) ev |= EV_ERR;
+    if( event & PARITY_ERROR ) ev |= EV_ERR;
+    if( event & FRAMING_ERROR ) ev |= EV_ERR;
+    if( event & BREAK_INTERRUPT ) ev |= EV_BREAK;
+    return ev;
+  }
+
+  static int map_events_from_win32( DWORD ev, DWORD errors )
+  {
+    int event = 0;
+    if( ev & EV_RXCHAR ) event |= DATA_AVAILABLE;
+    if( ev & EV_TXEMPTY ) event |= OUTPUT_EMPTY;
+    if( ev & EV_CTS ) event |= CTS;
+    if( ev & EV_DSR ) event |= DSR;
+    if( ev & EV_RING ) event |= RING_INDICATOR;
+    if( ev & EV_RLSD ) event |= CARRIER_DETECT;
+    if( ev & EV_ERR )
+    {
+      if( errors & CE_BREAK ) event |= BREAK_INTERRUPT;
+      if( errors & CE_FRAME ) event |= FRAMING_ERROR;
+      if( errors & CE_IOE ) throw comm_port_error("Win32 Comm IO Error");
+      if( errors & CE_MODE ) throw comm_port_error("Win32 Comm Invalid Mode");
+      if( errors & CE_OVERRUN ) event |= OVERRUN_ERROR;
+      if( errors & CE_RXOVER ) event |= OVERRUN_ERROR; //?? okay
+      if( errors & CE_RXPARITY ) event |= PARITY_ERROR;
+      if( errors & CE_TXFULL ) event |= OVERRUN_ERROR; //?? okay
+    }
+    if( ev & EV_BREAK ) event |= BREAK_INTERRUPT;
+    return event;
+  }
+
+public:
+
+  void setSerialPortParams( int baudrate, int databits, int stopbits, bool parity )
+  {
+    DCB dcb = get_comm_state();
+    dcb.BaudRate = baudrate;
+    dcb.ByteSize = databits;
+    switch( stopbits )
+    {
+      case 0: dcb.StopBits = ONE5STOPBITS; break;
+      case 2: dcb.StopBits = TWOSTOPBITS; break;
+      default: dcb.StopBits = ONESTOPBIT;
+    }
+    dcb.Parity = (parity ? 1 : 0);
+    test_comm_success( SetCommState( hComm, &dcb ), "set_params.SetCommState" );
+  }
+
+  int getBaudRate()
+  {
+    int baud_rate = get_comm_state().BaudRate;
+    switch( baud_rate )
+    {
+      case CBR_110:    return 110;
+      case CBR_300:    return 300;
+      case CBR_600:    return 600;
+      case CBR_1200:   return 1200;
+      case CBR_2400:   return 2400;
+      case CBR_4800:   return 4800;
+      case CBR_9600:   return 9600;
+      case CBR_14400:  return 14400;
+      case CBR_19200:  return 19200;
+      case CBR_38400:  return 38400;
+      case CBR_56000:  return 56000;
+      case CBR_57600:  return 57600;
+      case CBR_115200: return 115200;
+      case CBR_128000: return 128000;
+      case CBR_256000: return 256000;
+    }
+    return baud_rate;
+  }
+
+  int getDataBits()
+  {
+    return get_comm_state().ByteSize;
+  }
+
+  int getStopBits()
+  {
+    switch( get_comm_state().StopBits )
+    {
+      case ONESTOPBIT: return 0;
+      case ONE5STOPBITS: return 1;
+      case TWOSTOPBITS: return 2;
+    }
+    return 0;
+  }
+
+  bool getParity()
+  {
+    return (get_comm_state().fParity != 0);
+  }
+
+  int read( signed char* buffer, int off, int len )
+  {
+    DWORD nread = 0;
+    if( !ReadFile( hComm, buffer+off, len, &nread, &oread.o ) )
+    {
+      test_comm_success( GetLastError() == ERROR_IO_PENDING, "read.WriteFile" );
+      DWORD rvwait = WaitForSingleObject(oread.o.hEvent,INFINITE);
+      test_comm_success( rvwait != WAIT_FAILED, "read.WaitForSingleObject" );
+      if( rvwait != WAIT_OBJECT_0 )
+	return 0;
+      test_comm_success( GetOverlappedResult(hComm,&oread.o,&nread,TRUE), "read.GetOverlappedresult" );
+    }
+    return nread;
+  }
+
+  int write( const signed char* buffer, int off, int len )
+  {
+    DWORD nread = 0;
+    DWORD nwritten = 0;
+    if( !WriteFile( hComm, buffer+off, len, &nwritten, &owrite.o ) )
+    {
+      test_comm_success( GetLastError() == ERROR_IO_PENDING, "write.WriteFile" );
+      DWORD rvwait = WaitForSingleObject(owrite.o.hEvent,INFINITE);
+      test_comm_success( rvwait != WAIT_FAILED, "write.WaitForSingleObject" );
+      if( rvwait != WAIT_OBJECT_0 )
+	return 0;
+      test_comm_success( GetOverlappedResult(hComm,&owrite.o,&nwritten,TRUE), "write.GetOverlappedresult" );
+    }
+    return nwritten;
+  }
+
+  int read()
+  {
+    signed char byte;
+    return (read(&byte,0,1) > 0) ? ((unsigned char)byte) : -1;
+  }
+
+  int write( int b )
+  {
+    signed char byte = b;
+    return write( &byte, 0, 1 );
+  }
+
+  int available()
+  {
+    COMSTAT cs;
+    DWORD errors = 0;
+    test_comm_success( ClearCommError( hComm, &errors, &cs ), "available.ClearCommError" );
+    return cs.cbInQue;
+  }
+
+  void notifyOn( int event, bool enable )
+  {
+    if( enable )
+      m_events_in |= event;
+    else
+      m_events_in &= ~event;
+    test_comm_success( SetEvent( owait.o.hEvent ), "enable_event.SetEvent" );
+  }
+
+  bool isNotifyOn( int event )
+  {
+    return (m_events_in & event) != 0;
+  }
+
+  bool waitForEvent()
+  {
+    DWORD evMaskIn = map_events_to_win32( m_events_in );
+    DWORD evMaskOut = 0;
+    m_events_out = 0;
+    if( evMaskIn != 0 )
+    {
+      test_comm_success( SetCommMask( hComm, evMaskIn ), "wait_for_event.SetCommMask" );
+      if( !WaitCommEvent(hComm,&evMaskOut,&owait.o) )
+      {
+	DWORD nbytes = 0;
+	test_comm_success( GetLastError() == ERROR_IO_PENDING, "wait_for_event.WaitCommEvent" );
+	DWORD rvwait = WaitForSingleObject(owait.o.hEvent,INFINITE);
+	test_comm_success( rvwait != WAIT_FAILED, "wait_for_event.WaitForSingleObject" );
+	if( rvwait != WAIT_OBJECT_0 )
+	  return 0;
+	test_comm_success( GetOverlappedResult(hComm,&owait.o,&nbytes,TRUE), "write.GetOverlappedresult" );
+      }
+      //evMaskOut &= evMaskIn;
+      DWORD errors = 0;
+      test_comm_success( ClearCommError( hComm, &errors, NULL ), "wait_for_event.ClearCommError" );
+      m_events_out = map_events_from_win32( evMaskOut, errors );
+    }
+    else
+    {
+      test_comm_success( ResetEvent( owait.o.hEvent ), "wait_for_event.ResetEvent" );
+      DWORD rvwait = WaitForSingleObject( owait.o.hEvent, INFINITE );
+      test_comm_success( rvwait != WAIT_FAILED, "wait_for_event.WaitForSingleObject" );
+    }
+    return (m_events_out != 0);
+  }
+
+  bool cancelWait()
+  {
+    test_comm_success( SetEvent( owait.o.hEvent ), "cancel_wait.SetEvent" );
+    return true;
+  }
+
+  bool didEventOccur( int event )
+  {
+    return (m_events_out & event) != 0;
+  }
+
+  void setDTR( bool high )
+  {
+    test_comm_success( EscapeCommFunction( hComm, (high ? SETDTR : CLRDTR) ), "setDTR.EscapeCommFunction" );
+    m_dtr = high;
+  }
+
+  void setRTS( bool high )
+  {
+    test_comm_success( EscapeCommFunction( hComm, (high ? SETRTS : CLRRTS) ), "setRTS.EscapeCommFunction" );
+    m_rts = high;
+  }
+
+  bool isDTR()
+  {
+    return m_dtr;
+  }
+
+  bool isRTS()
+  {
+    return m_rts;
+  }
+
+  bool isCTS()
+  {
+    return (get_modem_status() & MS_CTS_ON) != 0;
+  }
+
+  bool isDSR()
+  {
+    return (get_modem_status() & MS_DSR_ON) != 0;
+  }
+
+  bool isRI()
+  {
+    return (get_modem_status() & MS_RING_ON) != 0;
+  }
+
+  bool isCD()
+  {
+    return (get_modem_status() & MS_RLSD_ON) != 0;
+  }
+
+  void sendBreak( int millis )
+  {
+  }
+
+  NativeSerial( const char* portname ):
+    m_events_in(0), 
+    m_events_out(0),
+    m_dtr(false),
+    m_rts(false)
+  {
+    hComm = CreateFile( portname,
+      GENERIC_READ | GENERIC_WRITE,
+      0,  // exclusive access
+      NULL,  // default security attributes
+      OPEN_EXISTING,
+      FILE_FLAG_OVERLAPPED,
+      NULL
+    );
+
+    test_comm_success( hComm != INVALID_HANDLE_VALUE, "NativeSerialPort.CreateFile" );
+
+    setDTR(false);
+    setRTS(false);
+
+    DWORD errors;
+    test_comm_success( PurgeComm( hComm, PURGE_TXABORT | PURGE_RXABORT | PURGE_TXCLEAR | PURGE_RXCLEAR ), "NativeSerialPort.PurgeComm" );
+    test_comm_success( ClearCommError( hComm, &errors, NULL ), "NativeSerialPort.ClearCommErrors" );
+  }
+
+  ~NativeSerial()
+  {
+    close();
+  }
+
+  void close()
+  {
+    CloseHandle( hComm );
+    SetEvent( oread.o.hEvent );
+    SetEvent( owrite.o.hEvent );
+    SetEvent( owait.o.hEvent );
+    SetEvent( oavail.o.hEvent );
+  }
+
+  static std::string getTOSCommMap()
+  {
+    const char* env = getenv( "TOSCOMMMAP" );
+    return (env == NULL) ? "com1=COM1:com10=\\\\.\\COM10" : env;
+  }
+};
+
+
+#include "TOSComm_wrap.cxx"
+
diff --git a/tools/tinyos/java/serial/TOSComm.i b/tools/tinyos/java/serial/TOSComm.i
new file mode 100644
index 00000000..a17c6104
--- /dev/null
+++ b/tools/tinyos/java/serial/TOSComm.i
@@ -0,0 +1,60 @@
+//$Id: TOSComm.i,v 1.5 2010-06-29 22:07:42 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+%module TOSComm
+
+%{
+%}
+
+%include "arrays_java.i";
+%include "std_string.i";
+
+%pragma(java) jniclasscode=%{
+  static { TOSCommLibraryLoader.load(); }
+%}
+
+%exception {
+  try {
+    $action
+  } catch (comm_port_error &e) {
+    jclass clazz = jenv->FindClass("java/lang/Exception");
+    std::string s = "TOSComm JNI library runtime error: ";
+    s += + e.what();
+    jenv->ThrowNew( clazz, s.c_str() );
+    return $null;
+  }
+}
+
+%include "NativeSerial.h"
diff --git a/tools/tinyos/java/serial/TOSComm_wrap.cxx b/tools/tinyos/java/serial/TOSComm_wrap.cxx
new file mode 100644
index 00000000..e6b6b4c9
--- /dev/null
+++ b/tools/tinyos/java/serial/TOSComm_wrap.cxx
@@ -0,0 +1,1488 @@
+/* ----------------------------------------------------------------------------
+ * This file was automatically generated by SWIG (http://www.swig.org).
+ * Version 1.3.21
+ * 
+ * This file is not intended to be easily readable and contains a number of 
+ * coding conventions designed to improve portability and efficiency. Do not make
+ * changes to this file unless you know what you are doing--modify the SWIG 
+ * interface file instead. 
+ * ----------------------------------------------------------------------------- */
+
+
+#ifdef __cplusplus
+template<class T> class SwigValueWrapper {
+    T *tt;
+public:
+    SwigValueWrapper() : tt(0) { }
+    SwigValueWrapper(const SwigValueWrapper<T>& rhs) : tt(new T(*rhs.tt)) { }
+    SwigValueWrapper(const T& t) : tt(new T(t)) { }
+    ~SwigValueWrapper() { delete tt; } 
+    SwigValueWrapper& operator=(const T& t) { delete tt; tt = new T(t); return *this; }
+    operator T&() const { return *tt; }
+    T *operator&() { return tt; }
+private:
+    SwigValueWrapper& operator=(const SwigValueWrapper<T>& rhs);
+};                                                    
+#endif
+
+
+#if defined(__GNUC__)
+//    typedef long long __int64; /*For gcc on Windows */
+#endif
+#include <jni.h>
+#include <stdlib.h>
+#include <string.h>
+
+
+/* Support for throwing Java exceptions */
+typedef enum {
+  SWIG_JavaOutOfMemoryError = 1, 
+  SWIG_JavaIOException, 
+  SWIG_JavaRuntimeException, 
+  SWIG_JavaIndexOutOfBoundsException,
+  SWIG_JavaArithmeticException,
+  SWIG_JavaIllegalArgumentException,
+  SWIG_JavaNullPointerException,
+  SWIG_JavaDirectorPureVirtual,
+  SWIG_JavaUnknownError
+} SWIG_JavaExceptionCodes;
+
+typedef struct {
+  SWIG_JavaExceptionCodes code;
+  const char *java_exception;
+} SWIG_JavaExceptions_t;
+
+
+static void SWIG_JavaThrowException(JNIEnv *jenv, SWIG_JavaExceptionCodes code, const char *msg) {
+  jclass excep;
+  static const SWIG_JavaExceptions_t java_exceptions[] = {
+    { SWIG_JavaOutOfMemoryError, "java/lang/OutOfMemoryError" },
+    { SWIG_JavaIOException, "java/io/IOException" },
+    { SWIG_JavaRuntimeException, "java/lang/RuntimeException" },
+    { SWIG_JavaIndexOutOfBoundsException, "java/lang/IndexOutOfBoundsException" },
+    { SWIG_JavaArithmeticException, "java/lang/ArithmeticException" },
+    { SWIG_JavaIllegalArgumentException, "java/lang/IllegalArgumentException" },
+    { SWIG_JavaNullPointerException, "java/lang/NullPointerException" },
+    { SWIG_JavaDirectorPureVirtual, "java/lang/RuntimeException" },
+    { SWIG_JavaUnknownError,  "java/lang/UnknownError" },
+    { (SWIG_JavaExceptionCodes)0,  "java/lang/UnknownError" } };
+  const SWIG_JavaExceptions_t *except_ptr = java_exceptions;
+
+  while (except_ptr->code != code && except_ptr->code)
+    except_ptr++;
+
+  jenv->ExceptionClear();
+  excep = jenv->FindClass(except_ptr->java_exception);
+  if (excep)
+    jenv->ThrowNew(excep, msg);
+}
+
+
+/* Contract support */
+
+#define SWIG_contract_assert(nullreturn, expr, msg) if (!(expr)) {SWIG_JavaThrowException(jenv, SWIG_JavaIllegalArgumentException, msg); return nullreturn; } else
+
+
+
+
+#if defined(SWIG_NOINCLUDE) || defined(SWIG_NOARRAYS)
+
+
+int SWIG_JavaArrayInBool (JNIEnv *jenv, jboolean **jarr, bool **carr, jbooleanArray input);
+void SWIG_JavaArrayArgoutBool (JNIEnv *jenv, jboolean *jarr, bool *carr, jbooleanArray input);
+jbooleanArray SWIG_JavaArrayOutBool (JNIEnv *jenv, bool *result, jsize sz);
+
+
+int SWIG_JavaArrayInSchar (JNIEnv *jenv, jbyte **jarr, signed char **carr, jbyteArray input);
+void SWIG_JavaArrayArgoutSchar (JNIEnv *jenv, jbyte *jarr, signed char *carr, jbyteArray input);
+jbyteArray SWIG_JavaArrayOutSchar (JNIEnv *jenv, signed char *result, jsize sz);
+
+
+int SWIG_JavaArrayInUchar (JNIEnv *jenv, jshort **jarr, unsigned char **carr, jshortArray input);
+void SWIG_JavaArrayArgoutUchar (JNIEnv *jenv, jshort *jarr, unsigned char *carr, jshortArray input);
+jshortArray SWIG_JavaArrayOutUchar (JNIEnv *jenv, unsigned char *result, jsize sz);
+
+
+int SWIG_JavaArrayInShort (JNIEnv *jenv, jshort **jarr, short **carr, jshortArray input);
+void SWIG_JavaArrayArgoutShort (JNIEnv *jenv, jshort *jarr, short *carr, jshortArray input);
+jshortArray SWIG_JavaArrayOutShort (JNIEnv *jenv, short *result, jsize sz);
+
+
+int SWIG_JavaArrayInUshort (JNIEnv *jenv, jint **jarr, unsigned short **carr, jintArray input);
+void SWIG_JavaArrayArgoutUshort (JNIEnv *jenv, jint *jarr, unsigned short *carr, jintArray input);
+jintArray SWIG_JavaArrayOutUshort (JNIEnv *jenv, unsigned short *result, jsize sz);
+
+
+int SWIG_JavaArrayInInt (JNIEnv *jenv, jint **jarr, int **carr, jintArray input);
+void SWIG_JavaArrayArgoutInt (JNIEnv *jenv, jint *jarr, int *carr, jintArray input);
+jintArray SWIG_JavaArrayOutInt (JNIEnv *jenv, int *result, jsize sz);
+
+
+int SWIG_JavaArrayInUint (JNIEnv *jenv, jlong **jarr, unsigned int **carr, jlongArray input);
+void SWIG_JavaArrayArgoutUint (JNIEnv *jenv, jlong *jarr, unsigned int *carr, jlongArray input);
+jlongArray SWIG_JavaArrayOutUint (JNIEnv *jenv, unsigned int *result, jsize sz);
+
+
+int SWIG_JavaArrayInLong (JNIEnv *jenv, jint **jarr, long **carr, jintArray input);
+void SWIG_JavaArrayArgoutLong (JNIEnv *jenv, jint *jarr, long *carr, jintArray input);
+jintArray SWIG_JavaArrayOutLong (JNIEnv *jenv, long *result, jsize sz);
+
+
+int SWIG_JavaArrayInUlong (JNIEnv *jenv, jlong **jarr, unsigned long **carr, jlongArray input);
+void SWIG_JavaArrayArgoutUlong (JNIEnv *jenv, jlong *jarr, unsigned long *carr, jlongArray input);
+jlongArray SWIG_JavaArrayOutUlong (JNIEnv *jenv, unsigned long *result, jsize sz);
+
+
+int SWIG_JavaArrayInLonglong (JNIEnv *jenv, jlong **jarr, jlong **carr, jlongArray input);
+void SWIG_JavaArrayArgoutLonglong (JNIEnv *jenv, jlong *jarr, jlong *carr, jlongArray input);
+jlongArray SWIG_JavaArrayOutLonglong (JNIEnv *jenv, jlong *result, jsize sz);
+
+
+int SWIG_JavaArrayInFloat (JNIEnv *jenv, jfloat **jarr, float **carr, jfloatArray input);
+void SWIG_JavaArrayArgoutFloat (JNIEnv *jenv, jfloat *jarr, float *carr, jfloatArray input);
+jfloatArray SWIG_JavaArrayOutFloat (JNIEnv *jenv, float *result, jsize sz);
+
+
+int SWIG_JavaArrayInDouble (JNIEnv *jenv, jdouble **jarr, double **carr, jdoubleArray input);
+void SWIG_JavaArrayArgoutDouble (JNIEnv *jenv, jdouble *jarr, double *carr, jdoubleArray input);
+jdoubleArray SWIG_JavaArrayOutDouble (JNIEnv *jenv, double *result, jsize sz);
+
+
+#else
+
+
+/* bool[] support */
+int SWIG_JavaArrayInBool (JNIEnv *jenv, jboolean **jarr, bool **carr, jbooleanArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetBooleanArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new bool[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = ((*jarr)[i] != 0);
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutBool (JNIEnv *jenv, jboolean *jarr, bool *carr, jbooleanArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jboolean)carr[i];
+  jenv->ReleaseBooleanArrayElements(input, jarr, 0);
+}
+
+jbooleanArray SWIG_JavaArrayOutBool (JNIEnv *jenv, bool *result, jsize sz) {
+  jboolean *arr;
+  int i;
+  jbooleanArray jresult = jenv->NewBooleanArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetBooleanArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jboolean)result[i];
+  jenv->ReleaseBooleanArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* signed char[] support */
+int SWIG_JavaArrayInSchar (JNIEnv *jenv, jbyte **jarr, signed char **carr, jbyteArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetByteArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new signed char[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (signed char)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutSchar (JNIEnv *jenv, jbyte *jarr, signed char *carr, jbyteArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jbyte)carr[i];
+  jenv->ReleaseByteArrayElements(input, jarr, 0);
+}
+
+jbyteArray SWIG_JavaArrayOutSchar (JNIEnv *jenv, signed char *result, jsize sz) {
+  jbyte *arr;
+  int i;
+  jbyteArray jresult = jenv->NewByteArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetByteArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jbyte)result[i];
+  jenv->ReleaseByteArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned char[] support */
+int SWIG_JavaArrayInUchar (JNIEnv *jenv, jshort **jarr, unsigned char **carr, jshortArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetShortArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned char[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (unsigned char)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutUchar (JNIEnv *jenv, jshort *jarr, unsigned char *carr, jshortArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jshort)carr[i];
+  jenv->ReleaseShortArrayElements(input, jarr, 0);
+}
+
+jshortArray SWIG_JavaArrayOutUchar (JNIEnv *jenv, unsigned char *result, jsize sz) {
+  jshort *arr;
+  int i;
+  jshortArray jresult = jenv->NewShortArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetShortArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jshort)result[i];
+  jenv->ReleaseShortArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* short[] support */
+int SWIG_JavaArrayInShort (JNIEnv *jenv, jshort **jarr, short **carr, jshortArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetShortArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new short[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (short)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutShort (JNIEnv *jenv, jshort *jarr, short *carr, jshortArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jshort)carr[i];
+  jenv->ReleaseShortArrayElements(input, jarr, 0);
+}
+
+jshortArray SWIG_JavaArrayOutShort (JNIEnv *jenv, short *result, jsize sz) {
+  jshort *arr;
+  int i;
+  jshortArray jresult = jenv->NewShortArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetShortArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jshort)result[i];
+  jenv->ReleaseShortArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned short[] support */
+int SWIG_JavaArrayInUshort (JNIEnv *jenv, jint **jarr, unsigned short **carr, jintArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetIntArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned short[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (unsigned short)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutUshort (JNIEnv *jenv, jint *jarr, unsigned short *carr, jintArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jint)carr[i];
+  jenv->ReleaseIntArrayElements(input, jarr, 0);
+}
+
+jintArray SWIG_JavaArrayOutUshort (JNIEnv *jenv, unsigned short *result, jsize sz) {
+  jint *arr;
+  int i;
+  jintArray jresult = jenv->NewIntArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetIntArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jint)result[i];
+  jenv->ReleaseIntArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* int[] support */
+int SWIG_JavaArrayInInt (JNIEnv *jenv, jint **jarr, int **carr, jintArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetIntArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new int[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (int)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutInt (JNIEnv *jenv, jint *jarr, int *carr, jintArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jint)carr[i];
+  jenv->ReleaseIntArrayElements(input, jarr, 0);
+}
+
+jintArray SWIG_JavaArrayOutInt (JNIEnv *jenv, int *result, jsize sz) {
+  jint *arr;
+  int i;
+  jintArray jresult = jenv->NewIntArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetIntArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jint)result[i];
+  jenv->ReleaseIntArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned int[] support */
+int SWIG_JavaArrayInUint (JNIEnv *jenv, jlong **jarr, unsigned int **carr, jlongArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetLongArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned int[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (unsigned int)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutUint (JNIEnv *jenv, jlong *jarr, unsigned int *carr, jlongArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jlong)carr[i];
+  jenv->ReleaseLongArrayElements(input, jarr, 0);
+}
+
+jlongArray SWIG_JavaArrayOutUint (JNIEnv *jenv, unsigned int *result, jsize sz) {
+  jlong *arr;
+  int i;
+  jlongArray jresult = jenv->NewLongArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetLongArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jlong)result[i];
+  jenv->ReleaseLongArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* long[] support */
+int SWIG_JavaArrayInLong (JNIEnv *jenv, jint **jarr, long **carr, jintArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetIntArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new long[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (long)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutLong (JNIEnv *jenv, jint *jarr, long *carr, jintArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jint)carr[i];
+  jenv->ReleaseIntArrayElements(input, jarr, 0);
+}
+
+jintArray SWIG_JavaArrayOutLong (JNIEnv *jenv, long *result, jsize sz) {
+  jint *arr;
+  int i;
+  jintArray jresult = jenv->NewIntArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetIntArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jint)result[i];
+  jenv->ReleaseIntArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned long[] support */
+int SWIG_JavaArrayInUlong (JNIEnv *jenv, jlong **jarr, unsigned long **carr, jlongArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetLongArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned long[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (unsigned long)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutUlong (JNIEnv *jenv, jlong *jarr, unsigned long *carr, jlongArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jlong)carr[i];
+  jenv->ReleaseLongArrayElements(input, jarr, 0);
+}
+
+jlongArray SWIG_JavaArrayOutUlong (JNIEnv *jenv, unsigned long *result, jsize sz) {
+  jlong *arr;
+  int i;
+  jlongArray jresult = jenv->NewLongArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetLongArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jlong)result[i];
+  jenv->ReleaseLongArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* jlong[] support */
+int SWIG_JavaArrayInLonglong (JNIEnv *jenv, jlong **jarr, jlong **carr, jlongArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetLongArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new jlong[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (jlong)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutLonglong (JNIEnv *jenv, jlong *jarr, jlong *carr, jlongArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jlong)carr[i];
+  jenv->ReleaseLongArrayElements(input, jarr, 0);
+}
+
+jlongArray SWIG_JavaArrayOutLonglong (JNIEnv *jenv, jlong *result, jsize sz) {
+  jlong *arr;
+  int i;
+  jlongArray jresult = jenv->NewLongArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetLongArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jlong)result[i];
+  jenv->ReleaseLongArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* float[] support */
+int SWIG_JavaArrayInFloat (JNIEnv *jenv, jfloat **jarr, float **carr, jfloatArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetFloatArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new float[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (float)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutFloat (JNIEnv *jenv, jfloat *jarr, float *carr, jfloatArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jfloat)carr[i];
+  jenv->ReleaseFloatArrayElements(input, jarr, 0);
+}
+
+jfloatArray SWIG_JavaArrayOutFloat (JNIEnv *jenv, float *result, jsize sz) {
+  jfloat *arr;
+  int i;
+  jfloatArray jresult = jenv->NewFloatArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetFloatArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jfloat)result[i];
+  jenv->ReleaseFloatArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* double[] support */
+int SWIG_JavaArrayInDouble (JNIEnv *jenv, jdouble **jarr, double **carr, jdoubleArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetDoubleArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new double[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (double)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutDouble (JNIEnv *jenv, jdouble *jarr, double *carr, jdoubleArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jdouble)carr[i];
+  jenv->ReleaseDoubleArrayElements(input, jarr, 0);
+}
+
+jdoubleArray SWIG_JavaArrayOutDouble (JNIEnv *jenv, double *result, jsize sz) {
+  jdouble *arr;
+  int i;
+  jdoubleArray jresult = jenv->NewDoubleArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetDoubleArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jdouble)result[i];
+  jenv->ReleaseDoubleArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+#endif
+
+
+#define  SWIG_MemoryError    1
+#define  SWIG_IOError        2
+#define  SWIG_RuntimeError   3
+#define  SWIG_IndexError     4
+#define  SWIG_TypeError      5
+#define  SWIG_DivisionByZero 6
+#define  SWIG_OverflowError  7
+#define  SWIG_SyntaxError    8
+#define  SWIG_ValueError     9
+#define  SWIG_SystemError   10
+#define  SWIG_UnknownError  99
+
+
+static void SWIG_JavaException(JNIEnv *jenv, int code, const char *msg) {
+  SWIG_JavaExceptionCodes exception_code = SWIG_JavaUnknownError;
+  switch(code) {
+  case SWIG_MemoryError:
+    exception_code = SWIG_JavaOutOfMemoryError;
+    break;
+  case SWIG_IOError:
+    exception_code = SWIG_JavaIOException;
+    break;
+  case SWIG_SystemError:
+  case SWIG_RuntimeError:
+    exception_code = SWIG_JavaRuntimeException;
+    break;
+  case SWIG_OverflowError:
+  case SWIG_IndexError:
+    exception_code = SWIG_JavaIndexOutOfBoundsException;
+    break;
+  case SWIG_DivisionByZero:
+    exception_code = SWIG_JavaArithmeticException;
+    break;
+  case SWIG_SyntaxError:
+  case SWIG_ValueError:
+  case SWIG_TypeError:
+    exception_code = SWIG_JavaIllegalArgumentException;
+    break;
+  case SWIG_UnknownError:
+  default:
+    exception_code = SWIG_JavaUnknownError;
+    break;
+  }
+  SWIG_JavaThrowException(jenv, exception_code, msg);
+}
+#define SWIG_exception(code, msg) { SWIG_JavaException(jenv, code, msg); }
+
+
+#include <string>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1setSerialPortParams(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2, jint jarg3, jint jarg4, jboolean jarg5) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    int arg3 ;
+    int arg4 ;
+    bool arg5 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    arg3 = (int)jarg3; 
+    arg4 = (int)jarg4; 
+    arg5 = jarg5 ? true : false; 
+    {
+        try {
+            (arg1)->setSerialPortParams(arg2,arg3,arg4,arg5);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getBaudRate(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->getBaudRate();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getDataBits(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->getDataBits();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getStopBits(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->getStopBits();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getParity(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->getParity();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1notifyOn(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2, jboolean jarg3) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    bool arg3 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    arg3 = jarg3 ? true : false; 
+    {
+        try {
+            (arg1)->notifyOn(arg2,arg3);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isNotifyOn(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            result = (bool)(arg1)->isNotifyOn(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1waitForEvent(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->waitForEvent();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1cancelWait(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->cancelWait();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1didEventOccur(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            result = (bool)(arg1)->didEventOccur(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1setDTR(JNIEnv *jenv, jclass jcls, jlong jarg1, jboolean jarg2) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool arg2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = jarg2 ? true : false; 
+    {
+        try {
+            (arg1)->setDTR(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1setRTS(JNIEnv *jenv, jclass jcls, jlong jarg1, jboolean jarg2) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool arg2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = jarg2 ? true : false; 
+    {
+        try {
+            (arg1)->setRTS(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isDTR(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isDTR();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isRTS(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isRTS();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isCTS(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isCTS();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isDSR(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isDSR();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isRI(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isRI();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isCD(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isCD();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1sendBreak(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            (arg1)->sendBreak(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jlong JNICALL Java_net_tinyos_comm_TOSCommJNI_new_1NativeSerial(JNIEnv *jenv, jclass jcls, jstring jarg1) {
+    jlong jresult = 0 ;
+    char *arg1 ;
+    NativeSerial *result;
+    
+    (void)jenv;
+    (void)jcls;
+    {
+        arg1 = 0;
+        if (jarg1) {
+            arg1 = (char *)jenv->GetStringUTFChars(jarg1, 0);
+            if (!arg1) return 0;
+        }
+    }
+    {
+        try {
+            result = (NativeSerial *)new NativeSerial((char const *)arg1);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    *(NativeSerial **)&jresult = result; 
+    {
+        if (arg1) jenv->ReleaseStringUTFChars(jarg1, arg1); 
+    }
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_delete_1NativeSerial(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            delete arg1;
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT void JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1close(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            (arg1)->close();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1available(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->available();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1read_1_1SWIG_10(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->read();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1read_1_1SWIG_11(JNIEnv *jenv, jclass jcls, jlong jarg1, jbyteArray jarg2, jint jarg3, jint jarg4) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    signed char *arg2 ;
+    int arg3 ;
+    int arg4 ;
+    int result;
+    jbyte *jarr2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    if (!SWIG_JavaArrayInSchar(jenv, &jarr2, &arg2, jarg2)) return 0; 
+    arg3 = (int)jarg3; 
+    arg4 = (int)jarg4; 
+    {
+        try {
+            result = (int)(arg1)->read(arg2,arg3,arg4);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    SWIG_JavaArrayArgoutSchar(jenv, jarr2, arg2, jarg2); 
+    delete [] arg2; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1write_1_1SWIG_10(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            result = (int)(arg1)->write(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1write_1_1SWIG_11(JNIEnv *jenv, jclass jcls, jlong jarg1, jbyteArray jarg2, jint jarg3, jint jarg4) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    signed char *arg2 ;
+    int arg3 ;
+    int arg4 ;
+    int result;
+    jbyte *jarr2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    if (!SWIG_JavaArrayInSchar(jenv, &jarr2, &arg2, jarg2)) return 0; 
+    arg3 = (int)jarg3; 
+    arg4 = (int)jarg4; 
+    {
+        try {
+            result = (int)(arg1)->write((signed char const (*))arg2,arg3,arg4);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    SWIG_JavaArrayArgoutSchar(jenv, jarr2, arg2, jarg2); 
+    delete [] arg2; 
+    return jresult;
+}
+
+
+JNIEXPORT jstring JNICALL Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getTOSCommMap(JNIEnv *jenv, jclass jcls) {
+    jstring jresult = 0 ;
+    std::string result;
+    
+    (void)jenv;
+    (void)jcls;
+    {
+        try {
+            result = NativeSerial::getTOSCommMap();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = jenv->NewStringUTF((&result)->c_str()); 
+    return jresult;
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
diff --git a/tools/tinyos/java/serial/TOSComm_wrap_win32.cxx b/tools/tinyos/java/serial/TOSComm_wrap_win32.cxx
new file mode 100644
index 00000000..e353f3b2
--- /dev/null
+++ b/tools/tinyos/java/serial/TOSComm_wrap_win32.cxx
@@ -0,0 +1,1488 @@
+/* ----------------------------------------------------------------------------
+ * This file was automatically generated by SWIG (http://www.swig.org).
+ * Version 1.3.21
+ * 
+ * This file is not intended to be easily readable and contains a number of 
+ * coding conventions designed to improve portability and efficiency. Do not make
+ * changes to this file unless you know what you are doing--modify the SWIG 
+ * interface file instead. 
+ * ----------------------------------------------------------------------------- */
+
+
+#ifdef __cplusplus
+template<class T> class SwigValueWrapper {
+    T *tt;
+public:
+    SwigValueWrapper() : tt(0) { }
+    SwigValueWrapper(const SwigValueWrapper<T>& rhs) : tt(new T(*rhs.tt)) { }
+    SwigValueWrapper(const T& t) : tt(new T(t)) { }
+    ~SwigValueWrapper() { delete tt; } 
+    SwigValueWrapper& operator=(const T& t) { delete tt; tt = new T(t); return *this; }
+    operator T&() const { return *tt; }
+    T *operator&() { return tt; }
+private:
+    SwigValueWrapper& operator=(const SwigValueWrapper<T>& rhs);
+};                                                    
+#endif
+
+
+#if defined(__GNUC__)
+//    typedef long long __int64; /*For gcc on Windows */
+#endif
+#include <jni.h>
+#include <stdlib.h>
+#include <string.h>
+
+
+/* Support for throwing Java exceptions */
+typedef enum {
+  SWIG_JavaOutOfMemoryError = 1, 
+  SWIG_JavaIOException, 
+  SWIG_JavaRuntimeException, 
+  SWIG_JavaIndexOutOfBoundsException,
+  SWIG_JavaArithmeticException,
+  SWIG_JavaIllegalArgumentException,
+  SWIG_JavaNullPointerException,
+  SWIG_JavaDirectorPureVirtual,
+  SWIG_JavaUnknownError
+} SWIG_JavaExceptionCodes;
+
+typedef struct {
+  SWIG_JavaExceptionCodes code;
+  const char *java_exception;
+} SWIG_JavaExceptions_t;
+
+
+static void SWIG_JavaThrowException(JNIEnv *jenv, SWIG_JavaExceptionCodes code, const char *msg) {
+  jclass excep;
+  static const SWIG_JavaExceptions_t java_exceptions[] = {
+    { SWIG_JavaOutOfMemoryError, "java/lang/OutOfMemoryError" },
+    { SWIG_JavaIOException, "java/io/IOException" },
+    { SWIG_JavaRuntimeException, "java/lang/RuntimeException" },
+    { SWIG_JavaIndexOutOfBoundsException, "java/lang/IndexOutOfBoundsException" },
+    { SWIG_JavaArithmeticException, "java/lang/ArithmeticException" },
+    { SWIG_JavaIllegalArgumentException, "java/lang/IllegalArgumentException" },
+    { SWIG_JavaNullPointerException, "java/lang/NullPointerException" },
+    { SWIG_JavaDirectorPureVirtual, "java/lang/RuntimeException" },
+    { SWIG_JavaUnknownError,  "java/lang/UnknownError" },
+    { (SWIG_JavaExceptionCodes)0,  "java/lang/UnknownError" } };
+  const SWIG_JavaExceptions_t *except_ptr = java_exceptions;
+
+  while (except_ptr->code != code && except_ptr->code)
+    except_ptr++;
+
+  jenv->ExceptionClear();
+  excep = jenv->FindClass(except_ptr->java_exception);
+  if (excep)
+    jenv->ThrowNew(excep, msg);
+}
+
+
+/* Contract support */
+
+#define SWIG_contract_assert(nullreturn, expr, msg) if (!(expr)) {SWIG_JavaThrowException(jenv, SWIG_JavaIllegalArgumentException, msg); return nullreturn; } else
+
+
+
+
+#if defined(SWIG_NOINCLUDE) || defined(SWIG_NOARRAYS)
+
+
+int SWIG_JavaArrayInBool (JNIEnv *jenv, jboolean **jarr, bool **carr, jbooleanArray input);
+void SWIG_JavaArrayArgoutBool (JNIEnv *jenv, jboolean *jarr, bool *carr, jbooleanArray input);
+jbooleanArray SWIG_JavaArrayOutBool (JNIEnv *jenv, bool *result, jsize sz);
+
+
+int SWIG_JavaArrayInSchar (JNIEnv *jenv, jbyte **jarr, signed char **carr, jbyteArray input);
+void SWIG_JavaArrayArgoutSchar (JNIEnv *jenv, jbyte *jarr, signed char *carr, jbyteArray input);
+jbyteArray SWIG_JavaArrayOutSchar (JNIEnv *jenv, signed char *result, jsize sz);
+
+
+int SWIG_JavaArrayInUchar (JNIEnv *jenv, jshort **jarr, unsigned char **carr, jshortArray input);
+void SWIG_JavaArrayArgoutUchar (JNIEnv *jenv, jshort *jarr, unsigned char *carr, jshortArray input);
+jshortArray SWIG_JavaArrayOutUchar (JNIEnv *jenv, unsigned char *result, jsize sz);
+
+
+int SWIG_JavaArrayInShort (JNIEnv *jenv, jshort **jarr, short **carr, jshortArray input);
+void SWIG_JavaArrayArgoutShort (JNIEnv *jenv, jshort *jarr, short *carr, jshortArray input);
+jshortArray SWIG_JavaArrayOutShort (JNIEnv *jenv, short *result, jsize sz);
+
+
+int SWIG_JavaArrayInUshort (JNIEnv *jenv, jint **jarr, unsigned short **carr, jintArray input);
+void SWIG_JavaArrayArgoutUshort (JNIEnv *jenv, jint *jarr, unsigned short *carr, jintArray input);
+jintArray SWIG_JavaArrayOutUshort (JNIEnv *jenv, unsigned short *result, jsize sz);
+
+
+int SWIG_JavaArrayInInt (JNIEnv *jenv, jint **jarr, int **carr, jintArray input);
+void SWIG_JavaArrayArgoutInt (JNIEnv *jenv, jint *jarr, int *carr, jintArray input);
+jintArray SWIG_JavaArrayOutInt (JNIEnv *jenv, int *result, jsize sz);
+
+
+int SWIG_JavaArrayInUint (JNIEnv *jenv, jlong **jarr, unsigned int **carr, jlongArray input);
+void SWIG_JavaArrayArgoutUint (JNIEnv *jenv, jlong *jarr, unsigned int *carr, jlongArray input);
+jlongArray SWIG_JavaArrayOutUint (JNIEnv *jenv, unsigned int *result, jsize sz);
+
+
+int SWIG_JavaArrayInLong (JNIEnv *jenv, jint **jarr, long **carr, jintArray input);
+void SWIG_JavaArrayArgoutLong (JNIEnv *jenv, jint *jarr, long *carr, jintArray input);
+jintArray SWIG_JavaArrayOutLong (JNIEnv *jenv, long *result, jsize sz);
+
+
+int SWIG_JavaArrayInUlong (JNIEnv *jenv, jlong **jarr, unsigned long **carr, jlongArray input);
+void SWIG_JavaArrayArgoutUlong (JNIEnv *jenv, jlong *jarr, unsigned long *carr, jlongArray input);
+jlongArray SWIG_JavaArrayOutUlong (JNIEnv *jenv, unsigned long *result, jsize sz);
+
+
+int SWIG_JavaArrayInLonglong (JNIEnv *jenv, jlong **jarr, jlong **carr, jlongArray input);
+void SWIG_JavaArrayArgoutLonglong (JNIEnv *jenv, jlong *jarr, jlong *carr, jlongArray input);
+jlongArray SWIG_JavaArrayOutLonglong (JNIEnv *jenv, jlong *result, jsize sz);
+
+
+int SWIG_JavaArrayInFloat (JNIEnv *jenv, jfloat **jarr, float **carr, jfloatArray input);
+void SWIG_JavaArrayArgoutFloat (JNIEnv *jenv, jfloat *jarr, float *carr, jfloatArray input);
+jfloatArray SWIG_JavaArrayOutFloat (JNIEnv *jenv, float *result, jsize sz);
+
+
+int SWIG_JavaArrayInDouble (JNIEnv *jenv, jdouble **jarr, double **carr, jdoubleArray input);
+void SWIG_JavaArrayArgoutDouble (JNIEnv *jenv, jdouble *jarr, double *carr, jdoubleArray input);
+jdoubleArray SWIG_JavaArrayOutDouble (JNIEnv *jenv, double *result, jsize sz);
+
+
+#else
+
+
+/* bool[] support */
+int SWIG_JavaArrayInBool (JNIEnv *jenv, jboolean **jarr, bool **carr, jbooleanArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetBooleanArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new bool[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = ((*jarr)[i] != 0);
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutBool (JNIEnv *jenv, jboolean *jarr, bool *carr, jbooleanArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jboolean)carr[i];
+  jenv->ReleaseBooleanArrayElements(input, jarr, 0);
+}
+
+jbooleanArray SWIG_JavaArrayOutBool (JNIEnv *jenv, bool *result, jsize sz) {
+  jboolean *arr;
+  int i;
+  jbooleanArray jresult = jenv->NewBooleanArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetBooleanArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jboolean)result[i];
+  jenv->ReleaseBooleanArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* signed char[] support */
+int SWIG_JavaArrayInSchar (JNIEnv *jenv, jbyte **jarr, signed char **carr, jbyteArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetByteArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new signed char[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (signed char)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutSchar (JNIEnv *jenv, jbyte *jarr, signed char *carr, jbyteArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jbyte)carr[i];
+  jenv->ReleaseByteArrayElements(input, jarr, 0);
+}
+
+jbyteArray SWIG_JavaArrayOutSchar (JNIEnv *jenv, signed char *result, jsize sz) {
+  jbyte *arr;
+  int i;
+  jbyteArray jresult = jenv->NewByteArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetByteArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jbyte)result[i];
+  jenv->ReleaseByteArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned char[] support */
+int SWIG_JavaArrayInUchar (JNIEnv *jenv, jshort **jarr, unsigned char **carr, jshortArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetShortArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned char[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (unsigned char)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutUchar (JNIEnv *jenv, jshort *jarr, unsigned char *carr, jshortArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jshort)carr[i];
+  jenv->ReleaseShortArrayElements(input, jarr, 0);
+}
+
+jshortArray SWIG_JavaArrayOutUchar (JNIEnv *jenv, unsigned char *result, jsize sz) {
+  jshort *arr;
+  int i;
+  jshortArray jresult = jenv->NewShortArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetShortArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jshort)result[i];
+  jenv->ReleaseShortArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* short[] support */
+int SWIG_JavaArrayInShort (JNIEnv *jenv, jshort **jarr, short **carr, jshortArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetShortArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new short[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (short)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutShort (JNIEnv *jenv, jshort *jarr, short *carr, jshortArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jshort)carr[i];
+  jenv->ReleaseShortArrayElements(input, jarr, 0);
+}
+
+jshortArray SWIG_JavaArrayOutShort (JNIEnv *jenv, short *result, jsize sz) {
+  jshort *arr;
+  int i;
+  jshortArray jresult = jenv->NewShortArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetShortArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jshort)result[i];
+  jenv->ReleaseShortArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned short[] support */
+int SWIG_JavaArrayInUshort (JNIEnv *jenv, jint **jarr, unsigned short **carr, jintArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetIntArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned short[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (unsigned short)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutUshort (JNIEnv *jenv, jint *jarr, unsigned short *carr, jintArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jint)carr[i];
+  jenv->ReleaseIntArrayElements(input, jarr, 0);
+}
+
+jintArray SWIG_JavaArrayOutUshort (JNIEnv *jenv, unsigned short *result, jsize sz) {
+  jint *arr;
+  int i;
+  jintArray jresult = jenv->NewIntArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetIntArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jint)result[i];
+  jenv->ReleaseIntArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* int[] support */
+int SWIG_JavaArrayInInt (JNIEnv *jenv, jint **jarr, int **carr, jintArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetIntArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new int[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (int)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutInt (JNIEnv *jenv, jint *jarr, int *carr, jintArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jint)carr[i];
+  jenv->ReleaseIntArrayElements(input, jarr, 0);
+}
+
+jintArray SWIG_JavaArrayOutInt (JNIEnv *jenv, int *result, jsize sz) {
+  jint *arr;
+  int i;
+  jintArray jresult = jenv->NewIntArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetIntArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jint)result[i];
+  jenv->ReleaseIntArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned int[] support */
+int SWIG_JavaArrayInUint (JNIEnv *jenv, jlong **jarr, unsigned int **carr, jlongArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetLongArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned int[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (unsigned int)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutUint (JNIEnv *jenv, jlong *jarr, unsigned int *carr, jlongArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jlong)carr[i];
+  jenv->ReleaseLongArrayElements(input, jarr, 0);
+}
+
+jlongArray SWIG_JavaArrayOutUint (JNIEnv *jenv, unsigned int *result, jsize sz) {
+  jlong *arr;
+  int i;
+  jlongArray jresult = jenv->NewLongArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetLongArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jlong)result[i];
+  jenv->ReleaseLongArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* long[] support */
+int SWIG_JavaArrayInLong (JNIEnv *jenv, jint **jarr, long **carr, jintArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetIntArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new long[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (long)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutLong (JNIEnv *jenv, jint *jarr, long *carr, jintArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jint)carr[i];
+  jenv->ReleaseIntArrayElements(input, jarr, 0);
+}
+
+jintArray SWIG_JavaArrayOutLong (JNIEnv *jenv, long *result, jsize sz) {
+  jint *arr;
+  int i;
+  jintArray jresult = jenv->NewIntArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetIntArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jint)result[i];
+  jenv->ReleaseIntArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* unsigned long[] support */
+int SWIG_JavaArrayInUlong (JNIEnv *jenv, jlong **jarr, unsigned long **carr, jlongArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetLongArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new unsigned long[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (unsigned long)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutUlong (JNIEnv *jenv, jlong *jarr, unsigned long *carr, jlongArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jlong)carr[i];
+  jenv->ReleaseLongArrayElements(input, jarr, 0);
+}
+
+jlongArray SWIG_JavaArrayOutUlong (JNIEnv *jenv, unsigned long *result, jsize sz) {
+  jlong *arr;
+  int i;
+  jlongArray jresult = jenv->NewLongArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetLongArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jlong)result[i];
+  jenv->ReleaseLongArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* jlong[] support */
+int SWIG_JavaArrayInLonglong (JNIEnv *jenv, jlong **jarr, jlong **carr, jlongArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetLongArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new jlong[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (jlong)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutLonglong (JNIEnv *jenv, jlong *jarr, jlong *carr, jlongArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jlong)carr[i];
+  jenv->ReleaseLongArrayElements(input, jarr, 0);
+}
+
+jlongArray SWIG_JavaArrayOutLonglong (JNIEnv *jenv, jlong *result, jsize sz) {
+  jlong *arr;
+  int i;
+  jlongArray jresult = jenv->NewLongArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetLongArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jlong)result[i];
+  jenv->ReleaseLongArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* float[] support */
+int SWIG_JavaArrayInFloat (JNIEnv *jenv, jfloat **jarr, float **carr, jfloatArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetFloatArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new float[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (float)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutFloat (JNIEnv *jenv, jfloat *jarr, float *carr, jfloatArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jfloat)carr[i];
+  jenv->ReleaseFloatArrayElements(input, jarr, 0);
+}
+
+jfloatArray SWIG_JavaArrayOutFloat (JNIEnv *jenv, float *result, jsize sz) {
+  jfloat *arr;
+  int i;
+  jfloatArray jresult = jenv->NewFloatArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetFloatArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jfloat)result[i];
+  jenv->ReleaseFloatArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+/* double[] support */
+int SWIG_JavaArrayInDouble (JNIEnv *jenv, jdouble **jarr, double **carr, jdoubleArray input) {
+  int i;
+  jsize sz;
+  if (!input) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaNullPointerException, "null array");
+    return 0;
+  }
+  sz = jenv->GetArrayLength(input);
+  *jarr = jenv->GetDoubleArrayElements(input, 0);
+  if (!*jarr)
+    return 0; 
+  *carr = new double[sz]; 
+  if (!*carr) {
+    SWIG_JavaThrowException(jenv, SWIG_JavaOutOfMemoryError, "array memory allocation failed");
+    return 0;
+  }
+  for (i=0; i<sz; i++)
+    (*carr)[i] = (double)(*jarr)[i];
+  return 1;
+}
+
+void SWIG_JavaArrayArgoutDouble (JNIEnv *jenv, jdouble *jarr, double *carr, jdoubleArray input) {
+  int i;
+  jsize sz = jenv->GetArrayLength(input);
+  for (i=0; i<sz; i++)
+    jarr[i] = (jdouble)carr[i];
+  jenv->ReleaseDoubleArrayElements(input, jarr, 0);
+}
+
+jdoubleArray SWIG_JavaArrayOutDouble (JNIEnv *jenv, double *result, jsize sz) {
+  jdouble *arr;
+  int i;
+  jdoubleArray jresult = jenv->NewDoubleArray(sz);
+  if (!jresult)
+    return NULL;
+  arr = jenv->GetDoubleArrayElements(jresult, 0);
+  if (!arr)
+    return NULL;
+  for (i=0; i<sz; i++)
+    arr[i] = (jdouble)result[i];
+  jenv->ReleaseDoubleArrayElements(jresult, arr, 0);
+  return jresult;
+}
+
+
+#endif
+
+
+#define  SWIG_MemoryError    1
+#define  SWIG_IOError        2
+#define  SWIG_RuntimeError   3
+#define  SWIG_IndexError     4
+#define  SWIG_TypeError      5
+#define  SWIG_DivisionByZero 6
+#define  SWIG_OverflowError  7
+#define  SWIG_SyntaxError    8
+#define  SWIG_ValueError     9
+#define  SWIG_SystemError   10
+#define  SWIG_UnknownError  99
+
+
+static void SWIG_JavaException(JNIEnv *jenv, int code, const char *msg) {
+  SWIG_JavaExceptionCodes exception_code = SWIG_JavaUnknownError;
+  switch(code) {
+  case SWIG_MemoryError:
+    exception_code = SWIG_JavaOutOfMemoryError;
+    break;
+  case SWIG_IOError:
+    exception_code = SWIG_JavaIOException;
+    break;
+  case SWIG_SystemError:
+  case SWIG_RuntimeError:
+    exception_code = SWIG_JavaRuntimeException;
+    break;
+  case SWIG_OverflowError:
+  case SWIG_IndexError:
+    exception_code = SWIG_JavaIndexOutOfBoundsException;
+    break;
+  case SWIG_DivisionByZero:
+    exception_code = SWIG_JavaArithmeticException;
+    break;
+  case SWIG_SyntaxError:
+  case SWIG_ValueError:
+  case SWIG_TypeError:
+    exception_code = SWIG_JavaIllegalArgumentException;
+    break;
+  case SWIG_UnknownError:
+  default:
+    exception_code = SWIG_JavaUnknownError;
+    break;
+  }
+  SWIG_JavaThrowException(jenv, exception_code, msg);
+}
+#define SWIG_exception(code, msg) { SWIG_JavaException(jenv, code, msg); }
+
+
+#include <string>
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1setSerialPortParams(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2, jint jarg3, jint jarg4, jboolean jarg5) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    int arg3 ;
+    int arg4 ;
+    bool arg5 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    arg3 = (int)jarg3; 
+    arg4 = (int)jarg4; 
+    arg5 = jarg5 ? true : false; 
+    {
+        try {
+            (arg1)->setSerialPortParams(arg2,arg3,arg4,arg5);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getBaudRate(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->getBaudRate();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getDataBits(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->getDataBits();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getStopBits(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->getStopBits();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getParity(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->getParity();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1notifyOn(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2, jboolean jarg3) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    bool arg3 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    arg3 = jarg3 ? true : false; 
+    {
+        try {
+            (arg1)->notifyOn(arg2,arg3);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isNotifyOn(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            result = (bool)(arg1)->isNotifyOn(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1waitForEvent(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->waitForEvent();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1cancelWait(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->cancelWait();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1didEventOccur(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            result = (bool)(arg1)->didEventOccur(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1setDTR(JNIEnv *jenv, jclass jcls, jlong jarg1, jboolean jarg2) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool arg2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = jarg2 ? true : false; 
+    {
+        try {
+            (arg1)->setDTR(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1setRTS(JNIEnv *jenv, jclass jcls, jlong jarg1, jboolean jarg2) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool arg2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = jarg2 ? true : false; 
+    {
+        try {
+            (arg1)->setRTS(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isDTR(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isDTR();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isRTS(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isRTS();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isCTS(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isCTS();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isDSR(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isDSR();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isRI(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isRI();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jboolean JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1isCD(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jboolean jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    bool result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (bool)(arg1)->isCD();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jboolean)result; 
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1sendBreak(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            (arg1)->sendBreak(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jlong JNICALL _Java_net_tinyos_comm_TOSCommJNI_new_1NativeSerial(JNIEnv *jenv, jclass jcls, jstring jarg1) {
+    jlong jresult = 0 ;
+    char *arg1 ;
+    NativeSerial *result;
+    
+    (void)jenv;
+    (void)jcls;
+    {
+        arg1 = 0;
+        if (jarg1) {
+            arg1 = (char *)jenv->GetStringUTFChars(jarg1, 0);
+            if (!arg1) return 0;
+        }
+    }
+    {
+        try {
+            result = (NativeSerial *)new NativeSerial((char const *)arg1);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    *(NativeSerial **)&jresult = result; 
+    {
+        if (arg1) jenv->ReleaseStringUTFChars(jarg1, arg1); 
+    }
+    return jresult;
+}
+
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_delete_1NativeSerial(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            delete arg1;
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT void JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1close(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            (arg1)->close();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return ;
+        }
+    }
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1available(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->available();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1read_1_1SWIG_10(JNIEnv *jenv, jclass jcls, jlong jarg1) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    {
+        try {
+            result = (int)(arg1)->read();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1read_1_1SWIG_11(JNIEnv *jenv, jclass jcls, jlong jarg1, jbyteArray jarg2, jint jarg3, jint jarg4) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    signed char *arg2 ;
+    int arg3 ;
+    int arg4 ;
+    int result;
+    jbyte *jarr2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    if (!SWIG_JavaArrayInSchar(jenv, &jarr2, &arg2, jarg2)) return 0; 
+    arg3 = (int)jarg3; 
+    arg4 = (int)jarg4; 
+    {
+        try {
+            result = (int)(arg1)->read(arg2,arg3,arg4);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    SWIG_JavaArrayArgoutSchar(jenv, jarr2, arg2, jarg2); 
+    delete [] arg2; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1write_1_1SWIG_10(JNIEnv *jenv, jclass jcls, jlong jarg1, jint jarg2) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    int arg2 ;
+    int result;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    arg2 = (int)jarg2; 
+    {
+        try {
+            result = (int)(arg1)->write(arg2);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    return jresult;
+}
+
+
+JNIEXPORT jint JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1write_1_1SWIG_11(JNIEnv *jenv, jclass jcls, jlong jarg1, jbyteArray jarg2, jint jarg3, jint jarg4) {
+    jint jresult = 0 ;
+    NativeSerial *arg1 = (NativeSerial *) 0 ;
+    signed char *arg2 ;
+    int arg3 ;
+    int arg4 ;
+    int result;
+    jbyte *jarr2 ;
+    
+    (void)jenv;
+    (void)jcls;
+    arg1 = *(NativeSerial **)&jarg1; 
+    if (!SWIG_JavaArrayInSchar(jenv, &jarr2, &arg2, jarg2)) return 0; 
+    arg3 = (int)jarg3; 
+    arg4 = (int)jarg4; 
+    {
+        try {
+            result = (int)(arg1)->write((signed char const (*))arg2,arg3,arg4);
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = (jint)result; 
+    SWIG_JavaArrayArgoutSchar(jenv, jarr2, arg2, jarg2); 
+    delete [] arg2; 
+    return jresult;
+}
+
+
+JNIEXPORT jstring JNICALL _Java_net_tinyos_comm_TOSCommJNI_NativeSerial_1getTOSCommMap(JNIEnv *jenv, jclass jcls) {
+    jstring jresult = 0 ;
+    std::string result;
+    
+    (void)jenv;
+    (void)jcls;
+    {
+        try {
+            result = NativeSerial::getTOSCommMap();
+            
+        } catch (comm_port_error &e) {
+            jclass clazz = jenv->FindClass("java/lang/Exception");
+            std::string s = "TOSComm JNI library runtime error: ";
+            s += + e.what();
+            jenv->ThrowNew( clazz, s.c_str() );
+            return 0;
+        }
+    }
+    jresult = jenv->NewStringUTF((&result)->c_str()); 
+    return jresult;
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
diff --git a/tools/tinyos/java/serial/reswig b/tools/tinyos/java/serial/reswig
new file mode 100755
index 00000000..ebe77f20
--- /dev/null
+++ b/tools/tinyos/java/serial/reswig
@@ -0,0 +1,5 @@
+#!/bin/sh
+swig -java -package net.tinyos.comm -c++ TOSComm.i
+perl -pe 's{^}{//} if /For gcc on Windows/; s/\b(JNICALL) (Java_)/$1 _$2/' TOSComm_wrap.cxx >TOSComm_wrap_win32.cxx
+rm TOSComm.java
+mv *.java ../../../../support/sdk/java/net/tinyos/comm
diff --git a/tools/tinyos/misc/.cvsignore b/tools/tinyos/misc/.cvsignore
new file mode 100644
index 00000000..96d9e8a2
--- /dev/null
+++ b/tools/tinyos/misc/.cvsignore
@@ -0,0 +1,12 @@
+Makefile
+Makefile.in
+.deps
+tos-ident-flags
+tos-install-jni
+tos-serial-debug
+tos-set-symbols
+tos-write-image
+tos-storage-at45db
+tos-storage-stm25p
+tos-storage-pxa27xp30
+tos-write-buildinfo
diff --git a/tools/tinyos/misc/Makefile.am b/tools/tinyos/misc/Makefile.am
new file mode 100644
index 00000000..0fc584d5
--- /dev/null
+++ b/tools/tinyos/misc/Makefile.am
@@ -0,0 +1,37 @@
+AUTOMAKE_OPTIONS = foreign
+
+dist_man_MANS = tos-check-env.1 	\
+		tos-ident-flags.1	\
+                tos-install-jni.1	\
+                tos-locate-jre.1	\
+                tos-mote-key.1		\
+                tos-mviz.1              \
+                tos-serial-configure.1	\
+                tos-serial-debug.1	\
+                tos-set-symbols.1	\
+                tos-storage-at45db.1	\
+                tos-storage-stm25p.1	\
+                tos-storage-pxa27xp30.1	\
+                tos-write-image.1	\
+		tos-build-deluge-image.1 \
+		tos-deluge.1
+
+
+bin_SCRIPTS = tos-ident-flags \
+	      tos-install-jni \
+	      tos-locate-jre \
+	      tos-mote-key \
+              tos-mviz    \
+	      tos-serial-configure \
+	      tos-set-symbols \
+	      tos-write-buildinfo \
+	      tos-write-image \
+	      tos-check-env \
+	      tos-storage-stm25p \
+	      tos-storage-at45db \
+	      tos-storage-pxa27xp30	\
+	      tos-build-deluge-image \
+	      tos-deluge \
+	      tos-dump.py
+
+bin_PROGRAMS = tos-serial-debug
diff --git a/tools/tinyos/misc/tos-build-deluge-image b/tools/tinyos/misc/tos-build-deluge-image
new file mode 100755
index 00000000..c44cf499
--- /dev/null
+++ b/tools/tinyos/misc/tos-build-deluge-image
@@ -0,0 +1,196 @@
+#!/usr/bin/env python
+
+# Copyright (c) 2007 Johns Hopkins University.
+# All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+# @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+
+import sys, struct, operator
+from xml.dom.minidom import parse
+
+DELUGE_PKTS_PER_PAGE = 48
+DELUGE_PKT_PAYLOAD_SIZE = 23
+DELUGE_BYTES_PER_PAGE = DELUGE_PKTS_PER_PAGE * DELUGE_PKT_PAYLOAD_SIZE
+DELUGE_MAX_PAGES = 128
+
+DELUGE_IDENT_SIZE = 128
+
+def sencode(s, dim):
+  s = [ord(c) for c in s]
+  if len(s) > dim:
+    return s[:dim]
+  return s + [0] * (dim - len(s))
+
+# Encode to big endian
+def encode(val, dim):
+  output = []
+  for i in range(dim):
+      output.append(val & 0xFF)
+      val = val >> 8
+  output.reverse()
+  return output
+
+def int2byte(v):
+    return "".join([struct.pack("B", i) for i in v])
+
+def crc16(data):
+  crc = 0
+  for b in data:
+      crc = crc ^ (b << 8)
+      for i in range(0, 8):
+          if crc & 0x8000 == 0x8000:
+              crc = (crc << 1) ^ 0x1021
+          else:
+              crc = crc << 1
+          crc = crc & 0xffff
+  return crc
+
+def pages(data):
+  l = len(data) - 2*DELUGE_MAX_PAGES
+  if l % DELUGE_BYTES_PER_PAGE != 0:
+    sys.stderr.write("ERROR: Bug in padding!")
+    sys.exit()
+  return l / DELUGE_BYTES_PER_PAGE
+
+def align(data):
+  mod = len(data) % DELUGE_BYTES_PER_PAGE
+  if mod == 0:
+    return data
+  return data + [0] * (DELUGE_BYTES_PER_PAGE - mod)
+
+def deluge_ident(data):
+  tmp = encode(ident['uidhash'], 4) + \
+        encode(ident['size'], 4) + \
+        [pages(data), 0]
+  crc = crc16(tmp)
+  tmp += encode(crc, 2) + \
+         sencode(ident['appname'], 16) + \
+         sencode(ident['username'], 16) + \
+         sencode(ident['hostname'], 16) + \
+         sencode(ident['platform'], 16) + \
+         encode(ident['timestamp'], 4) + \
+         encode(ident['userhash'], 4)
+  return tmp + [0] * (DELUGE_IDENT_SIZE - len(tmp))
+
+def deluge_crc(data):
+  crc = [0] * DELUGE_MAX_PAGES
+  j = 0
+  sys.stderr.write("CRCs:\n  ")
+  for i in range(0, len(data)-1, DELUGE_BYTES_PER_PAGE):
+    crc[j] = crc16(data[i:i+DELUGE_BYTES_PER_PAGE])
+    sys.stderr.write("0x%04X " % (crc[j]))
+    if (j + 1) % 7 == 0:
+      sys.stderr.write("\n  ")
+    j += 1
+  sys.stderr.write("\n")
+  return reduce(operator.add, [encode(i, 2) for i in crc]) + data
+
+for i in range(len(sys.argv)):
+  if sys.argv[i] == '-i':
+    img_num = int(sys.argv[i+1])
+    
+dom = parse(sys.argv[-1])
+ident = {}
+ident_list = [(n.localName, n.firstChild.nodeValue)
+              for n in dom.getElementsByTagName('ident')[0].childNodes if n.localName != None]
+for (k, v) in ident_list:
+  ident[k] = v
+for p in ['timestamp', 'userhash', 'uidhash']:
+  ident[p] = int(ident[p][:-1], 16)
+
+error = "ERROR: getting the image from the XML file failed."
+try:
+  image_element = dom.getElementsByTagName('image')[0]
+  if image_element.getAttribute('format') != 'ihex':
+    error = "ERROR: image format is %s instead of ihex" % image_element.getAttribute('format')
+    sys.exit()
+  image = image_element.firstChild.nodeValue
+except:
+  sys.stderr.write(error + '\n')
+  sys.exit()
+
+all = []
+section = []
+end_addr = None
+offset = 0
+for line in image.split():
+    #print "DEBUG:", line
+    length = int(line[1:3], 16)
+    addr = int(line[3:7], 16) + offset
+    rectype = int(line[7:9], 16)
+    data = []
+    if len(line) > 11:
+        data = [int(line[i:i+2], 16) for i in range(9, len(line)-2, 2)]
+    crc = int(line[-2:], 16)
+    if rectype in [0x00, 0x03]:
+        if not end_addr:
+            end_addr = addr
+            start_addr = addr
+        if end_addr != addr:
+            all.append((start_addr, section))
+            if rectype == 0x03:
+                # This last record updates the first 4 bytes which
+                # holds some low level configuration. They are the
+                # same all the time so I guess that's why they are
+                # skipped.
+                break
+            section = []
+            start_addr = addr
+        section += data
+        end_addr = addr + length
+    elif rectype == 0x02:
+        offset = int(line[9:9+4], 16) << 4
+    elif rectype == 0x01:
+        all.append((start_addr, section))
+        section = []
+        start_addr = addr
+
+sys.stderr.write('Ihex read complete:\n')
+sys.stderr.write('  ' + '\n  '.join(["%5d bytes starting at 0x%X" % (len(l), a) for (a, l) in all]))
+sys.stderr.write('\n')
+sys.stderr.write('  %d bytes in %d sections\n' % (reduce(operator.add, [len(l) for (_, l) in all]), len(all)))
+
+# Usually, there are two sections: one for the code and one for the
+# interrupt vector.
+
+all_data = []
+for (addr, data) in all:
+  all_data += encode(addr, 4) + \
+              encode(len(data), 4) + \
+              data
+all_data += encode(0, 4) + encode(0, 4) # Add the marker for the end of an image
+padding = [0] * (DELUGE_BYTES_PER_PAGE - len(all_data) % DELUGE_BYTES_PER_PAGE)
+if len(padding) < DELUGE_BYTES_PER_PAGE:
+  all_data += padding
+all_data = deluge_crc(all_data)
+ident['size'] = DELUGE_IDENT_SIZE + len(all_data)
+sys.stdout.write(int2byte(deluge_ident(all_data)) + int2byte(all_data))
+
diff --git a/tools/tinyos/misc/tos-build-deluge-image.1 b/tools/tinyos/misc/tos-build-deluge-image.1
new file mode 100644
index 00000000..4a40bc60
--- /dev/null
+++ b/tools/tinyos/misc/tos-build-deluge-image.1
@@ -0,0 +1,12 @@
+.TH tos-build-deluge-image 1 "Jul 16, 2007"
+.LO 1
+.SH NAME
+
+tos-build-deluge-image \- internal tool for Deluge T2
+
+.SH DESCRIPTION
+
+\fBtos-build-deluge-image\fR is used by \fBtos-deluge\fR to construct the binary image needed by tosboot.
+
+.SH "SEE ALSO"
+\fItos-deluge\fR(1)
\ No newline at end of file
diff --git a/tools/tinyos/misc/tos-check-env b/tools/tinyos/misc/tos-check-env
new file mode 100755
index 00000000..dbe558a9
--- /dev/null
+++ b/tools/tinyos/misc/tos-check-env
@@ -0,0 +1,586 @@
+#!/usr/bin/perl -w
+#
+# $Id: tos-check-env,v 1.5 2008-02-14 20:31:21 regehr Exp $ 
+#
+
+
+sub which {
+    my ($cmd, $found, $warning);
+    $cmd = $_[0]; 
+    $pw = $_[1]; # do we print a warning or not?
+    open WHICH, "which $cmd 2>&1 |" or die "could not which $cmd: something is very wrong";
+    while (<WHICH>) {
+	if (/which: no $cmd/ || /^no $cmd/ || /^$cmd: Command not found/) { 
+	    if ($pw) {
+		$warning = "--> WARNING: No $cmd in current path.\n";
+		print "\n$warning"; 
+		$errorstr .= "$warning";
+		$errors = 1;
+	    }
+	    $found = 0;
+	} else {
+	    print "\t$_";
+	    $found = 1;
+	}
+    }
+    close WHICH;
+    return $found;
+}
+
+sub is_windows() {
+    return 1 if (grep { /cygwin/i } `uname`);
+    return 0;
+}
+
+sub chk_uisp() {
+    my $found;
+    my $version = "20050519tinyos";
+    my $versionok = 0;
+    print "uisp:\n";
+    $found = which("uisp", 1);
+    if ($found) {
+	open UISP, "uisp --version 2>&1 |" or die "could not execute uisp --version: is it in your PATH?";
+	while (<UISP>) {
+	    if (/version/) {
+		print "\t$_";
+		$versionok = 1 if /20050519tinyos/;
+	    }
+	}
+	close UISP;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The uisp version found by $program is not $version. " .
+		"Please update your uisp version. The source for uisp version $version " .
+		"can be found in the tinyos-tools 1.2 rpm.\n";
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}
+    } else {
+	$warning = "--> WARNING: $program couldn't find the uisp program. Uisp is used to " . 
+	    "program the motes. Please install uisp version $version which can be found " .
+	    " in the tinyos-tools 1.2 rpm.\n";
+	
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n";
+}
+
+sub chk_cygwin() {
+    my $system;
+    return if !is_windows();
+    print "Cygwin:\n";
+    open CYGCHECK, "cygcheck -s 2>&1 |" or die "could not execute cygcheck -s";
+    while (<CYGCHECK>) {
+	print "\t$_";;
+    }
+    print "\n";
+}
+
+#
+# Look for the phrase 'version 1.4' or 'version 1.5' in the first line
+#
+sub chk_java() {
+    my $found;
+    my $versionok = 0;
+    print "java:\n";
+    $found = which("java", 1);
+    if ($found) {
+	open JAVA, "java -version 2>&1 |" or die "could not execute java -version: is it in your PATH?\n";
+	while (<JAVA>) {
+	    if ($_ =~ /version \"1\.[45]/) {
+		print "\t$_";
+		$versionok = 1;
+	    }
+	}
+	close JAVA;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The JAVA version found first by $program may not be version 1.4 or version 1.5" .
+		"one of which is required by TOS. Please " .
+		"ensure that the located Java version is 1.4 or 1.5\n";
+	    if (is_windows()) {
+		$warning .= "Depending on your PATH environment variable, there is often another " .
+		    " version of java.exe in c:\\windows\\system32 that is " .
+		    "\"seen\" first. Check that this is version 1.4 or 1.5 or reconfigure your PATH " .
+		    "environment variable if this is the case.\n";
+	    }
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}
+
+    } else {
+	$errors = 1;
+    }
+    print "\n";
+};
+
+sub chk_perl() {
+    my $found;
+    print "perl:\n";
+    $found = which("perl", 1);
+    if ($found) {
+	print "\tVersion: ";
+	open PERL, "perl --version 2>&1 |" or die "could not execute perl --version: is it in your PATH?\n";
+	while (<PERL>) {
+	    print $1 if /(v[\d|\.]+.*$)/;
+	}
+	close PERL;
+    } else {
+	$errors = 1;
+    }
+    print "\n\n";
+};
+
+sub chk_lex {
+    my $found;
+    print "flex:\n";
+    which("flex", 1);
+    print "\n";
+}
+
+sub chk_yacc {
+    my $found;
+    print "bison:\n";
+    which("bison", 1);
+    print "\n";
+}
+
+sub chk_nesc {
+    my $found;
+    my $nescversion = ">=1.2.4";
+    print "nesc:\n";
+    $found = which("nescc", 1);
+    if ($found ne "") {
+	print "\tVersion: ";
+	open NESC, "nescc --version 2>&1 |" or die "could not execute nescc --version: is it in your PATH?\n";
+	while (<NESC>) {
+	    if (/nescc:/) {
+		print $_;
+		$versionok = 1 if (/1\.2/ || /1\.3/);
+	    } elsif (/Unknown target /) {
+		$warning = "--> WARNING: nescc (nesc) was found, but the version could " .
+		    "not be verified. Verify that the ncc version that you have is $nescversion " .
+		    "by running nescc --version. If you get an error regarding platforms, " .
+		    "please see the TinyOS FAQ for help: www.tinyos.net/faq.html\n";
+		print "\n$warning";
+		$errorstr .= $warning;
+		$errors = 1;
+	    }
+	}
+	close NESC;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The nescc found by $program is not $nescversion. " .
+		"Please update your nesc version to $nescversion.\n";
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}
+    } else {
+	my $warning = "--> WARNING: nescc not found. Please install nesc $nescversion.\n";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n\n";
+}
+
+sub chk_avrgcc {
+    my $found;
+    my $version = "3.4.3";
+    print "avr-gcc:\n";
+    $found = which("avr-gcc", 1);
+    if ($found) {
+	print "\tVersion: ";
+	open AVRGCC, "avr-gcc --version 2>&1 |" or die "couldn't execute avr-gcc --version: is it in your PATH?\n";
+	while (<AVRGCC>) {
+	    if (/avr-gcc/) {
+		print "$_";
+		$versionok = 1 if /3\.4\.3/;
+	    }
+	}
+	close AVRGCC;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The avr-gcc found by $program is not $version. " .
+		"Please update your avr-gcc compiler to $version.\n";
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}    
+
+    } else {
+	my $warning = "--> WARNING: avr-gcc not found.\n";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n\n";
+}
+
+sub chk_mspgcc {
+    my $found;
+    print "msp430-gcc:\n";
+    $found = which("msp430-gcc", 1);
+    if ($found) {
+	print "\tVersion: ";
+	open MSPGCC, "msp430-gcc --version 2>&1 |" or die "couldn't execute msp430-gcc --version: is it in your PATH?\n";
+	while (<MSPGCC>) {
+	    if (/msp430-gcc/) {
+		print "$_";
+		$versionok = 1 if /3\.2\.3/;
+	    }
+	}
+	close MSPGCC;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The msp430-gcc found by $program is not 3.2.3. " .
+		"If you intend to use any msp430 platforms (such as tmote), " .
+		"please update your msp430-gcc compiler to 3.2.3.\n";
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}    
+
+    } else {
+	my $warning = "--> WARNING: msp430-gcc not found. Won't be able to " .
+	    "compile to any msp430 platforms (tmote).\n";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n\n";
+}
+
+sub chk_mspas {
+    my $found;
+    my $version = "2.16";
+    print "msp430-as:\n";
+    $found = which("msp430-as", 1);
+    if ($found) {
+	print "\tVersion: ";
+	open MSPAS, "msp430-as --version 2>&1 |" or die "couldn't execute msp430-as --version: is it in your PATH?\n";
+	while (<MSPAS>) {
+	    if (/GNU assembler/) {
+		print "$_";
+		$versionok = 1 if /2\.16/;
+	    }
+	}
+	close MSPAS;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The msp430-as found by $program is not $version. " .
+		"If you intend to use any msp430 platforms (such as tmote), " .
+		"please update your msp430 binutils to $version.\n";
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}    
+
+    } else {
+	my $warning = "--> WARNING: msp430-as not found. Won't be able to " .
+	    "compile to any msp430 platforms (tmote).\n";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n\n";
+}
+
+sub chk_path {
+    my @dirs;
+    print "Path:\n";
+    if (exists $ENV{PATH}) {
+	@dirs = split /:/, $ENV{PATH};
+	foreach $dir (@dirs) {
+	    print "\t$dir\n"
+	}
+	
+    } else {
+	my $warning = "--> WARNING: PATH environment variable doesn't exist.\n";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n";
+}
+
+#
+# - should include $TOSROOT/support/sdk/java/tinyos.jar
+#   (we look for just support/sdk/java/tinyos.jar)
+# - '.' is recommended
+# 
+sub chk_classpath {
+    my @dirs;
+    my $warning; 
+    my $tosjarfound = 0;
+    my $dotfound = 0;
+    my $tosjarpath = "";
+    print "Classpath:\n";
+    if (exists $ENV{CLASSPATH}) {
+	$tosjarpath="$ENV{TOSROOT}/support/sdk/java/tinyos.jar";
+	if (is_windows()) {
+	    open CYGPATH, "cygpath -w $tosjarpath 2>&1 |" or die "couldn't execute cygpath: it is not PATH.";
+	    while (<CYGPATH>) {
+		$tosjarpath = $_;
+	    }
+	    close CYGPATH;
+	    $separator = ';';
+	} else {
+	    $separator = ':';
+	}
+	@dirs = split /$separator/, $ENV{CLASSPATH};
+	foreach $dir (@dirs) {
+	    print "\t$dir\n";
+	    if ($dir =~ /[\\\/]support[\\\/]sdk[\\\/]java[\\\/]tinyos\.jar/) {
+		$tosjarfound = 1;
+	    }
+	    if ($dir =~ /^\.$/) {
+		$dotfound = 1;
+	    }
+	}
+	print "\n";
+	if ($tosjarfound == 0) {
+	    $warning = "--> WARNING: CLASSPATH may not include $tosjarpath. " . 
+		          "Please ensure that $tosjarpath is in your CLASSPATH or you may " .
+			      "experience configuration problems\n";
+	    print "$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}
+	if ($dotfound == 0) {
+	    $warning = "--> WARNING: CLASSPATH may not include '.' (that is, " .
+		          " the symbol for the current working directory). Please add " .
+		              "'.' to your CLASSPATH or you may " .
+			          "experience configuration problems.\n";
+	    print "$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}
+    } else {
+	my $warning = "--> WARNING: CLASSPATH environment variable doesn't exist.\n" .
+	                 "Your classpath should contain $tosjarpath and a pointer \n" .
+			 "to the cwd (a dot)\n";
+ 
+	print "$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n\n";
+}
+
+# List the rpms 
+sub chk_rpms {
+    my $found;
+    print "rpms:\n";
+    $found = which("rpm", 0);
+    if ($found) {
+	open RPM, "rpm -qa 2>&1 |" or die "couldn't execute rpm: is it in your PATH?\n";
+	while (<RPM>) {
+	    if (/avr/ || /tinyos/ || /nesc/ || /avarice/ || /msp430/ || /make/ || /xscale/ ) {
+		print "\t$_";
+	    }
+	}
+    }
+    print "\n\n";
+}
+
+sub chk_graphviz {
+    my $found;
+    my $versionok = 0;
+    print "graphviz:\n";
+    $found = which("dot", 1);
+    if ($found) {
+	open GRAPHVIZ, "dot -V 2>&1 |" or die "couldn't execute dot -V to check graphviz: is it in your PATH?\n";
+	while (<GRAPHVIZ>) {
+	    if (/version/) {
+		print "\t$_";
+		$versionok = 1 if /1\.10/;
+	    }
+	}
+	close GRAPHVIZ;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The graphviz (dot) version found by $program is not 1.10. " .
+		"Please update your graphviz version if you'd like to use the nescdoc " .
+		"documentation generator.\n";
+	    print "\n$warning";
+	    $errorstr .= $warning;
+	    $errors = 1;
+	}
+    } else {
+	$warning = "--> WARNING: $program could not find the 'dot' executable which is part " .
+	    "of the AT&T Graphviz package. Please install version 1.1.0 of Graphviz if you'd " .
+	    "like to use the nescdoc documentation generator. If Graphviz is already installed, ".
+	     "then dot may not be in your PATH.\n";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n";
+}
+
+sub chk_avarice {
+    my $found;
+    my $version="2.3.20041206";
+    my $versionok = 0;
+    print "avarice:\n";
+    $found = which("avarice", 0);
+    if ($found) {
+	open AVARICE, "avarice --version 2>&1 |" or die "could not execute avarice --version: is it in your PATH?\n";
+	while (<AVARICE>) {
+	    if (/version/) {
+		print "\t$_";
+		$versionok = 1 if /2\.4/;
+	    }
+	}
+	close AVARICE;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The avarice version found by $program is not $version. " .
+		"Please update your avarice version.";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+	}
+    }
+    print "\n";
+}
+
+sub chk_avras {
+    my $found = 0;
+    my $version = "2.15";
+    my $versionok = 0;
+    print "avr-as:\n";
+    $found = which("avr-as", 1);
+    if ($found) {
+	open AVRAS, "avr-as --version 2>&1 |" or die "could not execute avr-as --version: is it in your PATH?\n";
+	while (<AVRAS>) {
+	    if (/GNU assembler/) {
+		print "\t$_";
+		$versionok = 1 if /2\.15/;
+	    }
+	}
+	close AVRAS;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The avr-as version found by $program is not $version " .
+		"Please update your avr-as version by updating your avr-binutils package.";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+	}
+    } else {
+	my $warning = "--> WARNING: Couldn't find avr-as. Please install avr-binutils " .
+	    "version $version \n";
+	print "$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    print "\n";
+}
+
+sub chk_avrgdb {
+    my $found;
+    my $versionok = 0;
+    print "avr-gdb:\n";
+    $found = which("avr-gdb", 0);
+    if ($found) {
+	open AVRGDB, "avr-gdb --version 2>&1 |" or die "could not execute avr-gdb --version: is it in your PATH?\n";
+	while (<AVRGDB>) {
+	    if (/GNU gdb/) {
+		print "\t$_";
+		$versionok = 1 if /6\.3/;
+	    }
+	}
+	close AVRGDB;
+	if (!$versionok) {
+	    $warning = "--> WARNING: The avr-gdb version found by $program is not 6.3. " .
+		"Please update your avr-gdb version.";
+	print "\n$warning";
+	$errorstr .= $warning;
+	$errors = 1;
+	}
+    }
+    print "\n";
+}
+
+# as of 1.2, no longer used
+sub chk_javacomm {
+    print "javax.comm:\n";
+    $ok = open TMP, ">testcomm.java";
+    $ok = $ok && print TMP "class Test { javax.comm.CommPortIdentifier x; }";
+    $ok = $ok && close TMP;
+    $ok = $ok && open JAVAC, "javac testcomm.java 2>&1 |";
+    @result = <JAVAC> if $ok;
+    $ok = $ok && close JAVAC;
+    unlink "testcomm.java";
+
+    if (!$ok || join('', @result) =~ /error/) {
+	$warning = "--> WARNING: Could not find the javax.comm classes.\n" .
+	    "Please ensure the java Comm API is installed correctly.\n";
+	print "$warning";
+	if ($ok) {
+	    print "Compiler output was:\n";
+	    print @result;
+	    print "\n";
+	}
+	else {
+	    print "Couldn't invoke javac on test program\n";
+	}
+	$errorstr .= $warning;
+	$errors = 1;
+    }
+    else {
+	print "\tjavax.comm ok\n"
+    }
+    print "\n";
+}
+
+$errorstr = "";
+$errors = 0;    # binary, not a counting var #
+$program = "tos-check-env";
+
+chdir "/tmp";
+
+for ($i = 0; $i <= $#ARGV; $i++) {
+    $_ = $ARGV[$i];
+    if (/^-/) {
+	if (/^-avr$/) {
+	    $avr = 1;
+	}
+	elsif (/^-msp$/) {
+	    $msp = 1;
+	}
+        else {
+	    print "Usage: tos-check-env [-avr][-msp]\n";
+	    exit 0;
+	}
+    }
+}
+$avr = 0 if !defined($avr);
+$msp = 0 if !defined($msp);
+
+chk_path();
+chk_classpath();
+chk_rpms();
+chk_nesc();
+chk_perl();
+chk_lex();
+chk_yacc();
+chk_java();
+chk_cygwin();
+chk_graphviz();
+if ($avr) {
+    chk_avras();
+    chk_avarice();
+    chk_avrgcc();
+    chk_avrgdb();
+    chk_uisp();
+}
+if ($msp) {
+    chk_mspgcc();
+    chk_mspas();
+}
+if ($errors) {
+    print "\n$program completed with errors:\n\n$errorstr\n";
+} else {
+    print "\n$program completed without error.\n\n";
+}
+
+__END__
diff --git a/tools/tinyos/misc/tos-check-env.1 b/tools/tinyos/misc/tos-check-env.1
new file mode 100644
index 00000000..d09af040
--- /dev/null
+++ b/tools/tinyos/misc/tos-check-env.1
@@ -0,0 +1,30 @@
+.TH tos-check-env 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-check-env - Check that your environment is properly configured for TinyOS development
+.SH SYNOPSIS
+
+\fBtos-check-env\fR [\fB-avr\fR] [\fB-msp\fR]
+.SH DESCRIPTION
+
+\fBtos-check-env\fR checks that your environment is properly configured for
+TinyOS development. The script checks for the existence of compilers, 
+java, environment variables, graphics tools for nesdoc, 
+and more, and then check that the versions and settings are adequate for
+TinyOS development. Information is printed to STDOUT for each check 
+as the checks are made. 
+
+After \fBtos-check-env\fR checks the environment, any descrepances found will 
+be printed to STDOUT along with hints on how to fix the descrepencies.
+
+\fBtos-check-env\fR takes an optional argument that specifies a specific compiler
+chain (avr or msp) to check. \fB-avr\fR will check for only the avr toolchain and
+exclude msp checks; \fB-msp\fR will check for only the msp toolchain and exclude
+avr checks. 
+
+
+
+
+
+
diff --git a/tools/tinyos/misc/tos-deluge b/tools/tinyos/misc/tos-deluge
new file mode 100755
index 00000000..6536c7fa
--- /dev/null
+++ b/tools/tinyos/misc/tos-deluge
@@ -0,0 +1,474 @@
+#!/usr/bin/env python
+
+# Copyright (c) 2007 Johns Hopkins University.
+# All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+# @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+
+import sys, stat, struct, subprocess, time, os.path
+try:
+    import tos
+except ImportError:
+    import posix
+    sys.path = [os.path.join(posix.environ['TOSROOT'], 'support', 'sdk', 'python')] + sys.path
+    import tos
+from datetime import datetime
+
+# Path to the python script that builds Deluge image from XML
+PATH_PY_BUILD_IMAGE  = os.path.join(os.path.dirname(sys.argv[0]), 'tos-build-deluge-image')
+
+# TinyOS serial communication parameters
+FM_AMID = 0x53
+DM_AMID = 0x54
+SERIAL_DATA_LENGTH = 28 - (1+1+4+2)  # See definition of FMReqPacket below
+
+# Commands for FlashManager
+FM_CMD_ERASE     = 0
+FM_CMD_WRITE     = 1
+FM_CMD_READ      = 2
+FM_CMD_CRC       = 3
+FM_CMD_ADDR      = 4
+FM_CMD_SYNC      = 5
+FM_CMD_IDENT     = 6
+
+# Commands for DelugeManager
+DM_CMD_STOP             = 1
+DM_CMD_LOCAL_STOP       = 2
+DM_CMD_ONLY_DISSEMINATE = 3
+DM_CMD_DISSEMINATE_AND_REPROGRAM = 4
+DM_CMD_REPROGRAM        = 5
+DM_CMD_BOOT             = 6
+
+ERROR_SUCCESS = 0   # T2-compatible
+ERROR_FAIL    = 1   # T2-compatible
+
+# Deluge parameters
+DELUGE_MAX_PAGES    = 128
+DELUGE_IDENT_OFFSET = 0
+DELUGE_IDENT_SIZE   = 128
+
+class FMReqPacket(tos.Packet):
+    def __init__(self, packet = None):
+        tos.Packet.__init__(self,
+                            [('cmd',    'int',  1),
+                             ('imgNum', 'int',  1),
+                             ('offset', 'int',  4),
+                             ('length', 'int',  2),
+                             ('data',   'blob', None)],
+                            packet)
+
+class DMReqPacket(tos.Packet):
+    def __init__(self, packet = None):
+        tos.Packet.__init__(self,
+                            [('cmd',    'int',  1),
+                             ('imgNum', 'int',  1)],
+                            packet)
+
+class SerialReplyPacket(tos.Packet):
+   def __init__(self, packet = None):
+       tos.Packet.__init__(self,
+                           [('error', 'int',  1),
+                            ('data',  'blob', None)],
+                           packet)
+
+class Ident(tos.Packet):
+    def __init__(self, packet = None):
+        tos.Packet.__init__(self,
+                            [('uidhash',  'int', 4),
+                             ('size',     'int', 4),
+                             ('pages',    'int', 1),
+                             ('reserved', 'int', 1),
+                             ('crc',      'int', 2),
+                             ('appname', 'string', 16),
+                             ('username', 'string', 16),
+                             ('hostname', 'string', 16),
+                             ('platform', 'string', 16),
+                             ('timestamp','int', 4),
+                             ('userhash', 'int', 4)],
+                            packet)
+
+class ShortIdent(tos.Packet):
+    def __init__(self, packet = None):
+        tos.Packet.__init__(self,
+                            [('appname',  'string', 16),
+                             ('timestamp','int', 4),
+                             ('uidhash',  'int', 4),
+                             ('nodeid',   'int', 2)],
+                            packet)
+
+
+# Computes 16-bit CRC
+def crc16(data):
+    crc = 0
+    for b in data:
+        crc = crc ^ (b << 8)
+        for i in range(0, 8):
+            if crc & 0x8000 == 0x8000:
+                crc = (crc << 1) ^ 0x1021
+            else:
+                crc = crc << 1
+            crc = crc & 0xffff
+
+    return crc
+
+def handleResponse(success, msg):
+    if success == True:
+        packet = am.read(timeout=2)
+        while packet and packet.type == 100:
+            print "".join([chr(i) for i in packet.data])
+            packet = am.read()
+        if not packet:
+            print "No response"
+            return False
+        reply = SerialReplyPacket(packet.data)
+        if reply.error == ERROR_SUCCESS:
+            return True
+        else:
+            print msg, reply
+            return False
+
+    print "ERROR: Unable to send the command"
+    return False
+
+def ident(timeout=None):
+    sreqpkt = FMReqPacket((FM_CMD_IDENT, 0, 0, 0, []))
+    if am.write(sreqpkt, FM_AMID, timeout=timeout):
+        packet = am.read(timeout=timeout)
+        reply = SerialReplyPacket(packet.data)
+        if reply.error == ERROR_SUCCESS:
+            return ShortIdent(reply.data)
+    return 0
+
+def read(imgNum, offset, length):
+    r = []
+
+    sreqpkt = FMReqPacket((FM_CMD_READ, imgNum, offset, length, []))
+    while True:
+        if sreqpkt.length > SERIAL_DATA_LENGTH:
+            sreqpkt.length = SERIAL_DATA_LENGTH
+
+        if am.write(sreqpkt, FM_AMID):
+            packet = am.read()
+            reply = SerialReplyPacket(packet.data)
+            if reply.error == ERROR_SUCCESS:
+                r.extend(reply.data)
+            else:
+                r = None
+                break
+        else:
+            r = None
+            break
+
+        sreqpkt.offset += sreqpkt.length
+        if sreqpkt.offset >= (offset + length):
+            break
+        sreqpkt.length = (offset + length) - sreqpkt.offset
+
+    return r
+
+def erase(imgNum):
+    # Note: the normal erase doesn't work properly on AT45DB. A
+    # workaround is to do the normal erase (to make happy STM25P)
+    # and then overwrite the metadata (to make happy AT45DB).
+
+    sreqpkt = FMReqPacket((FM_CMD_ERASE, imgNum, 0, 0, []))
+    success = am.write(sreqpkt, FM_AMID)
+    result = handleResponse(success, "ERROR: Unable to erase the flash volume")
+    if result: return True;
+
+    print 'Attempt the workaround for AT45DB...'
+    sreqpkt = FMReqPacket((FM_CMD_WRITE, imgNum, 0, 0, []))
+    sreqpkt.data = [0xFF] * DELUGE_IDENT_SIZE
+    sreqpkt.length = DELUGE_IDENT_SIZE
+    success = am.write(sreqpkt, FM_AMID)
+    result = handleResponse(success, "ERROR: Unable to erase the flash volume")
+    if not result: return False;
+    return sync(imgNum)
+
+def sync(imgNum):
+    sreqpkt = FMReqPacket((FM_CMD_SYNC, imgNum, 0, 0, []))
+    success = am.write(sreqpkt, FM_AMID)
+    return handleResponse(success, "ERROR: Unable to sync the flash volume")
+
+def write(imgNum, data):
+    sreqpkt = FMReqPacket((FM_CMD_WRITE, imgNum, 0, 0, []))
+    length = len(data)
+    total_length = length   # For progress bar
+    next_tick = 100         # For progress bar
+    start_time = time.time()
+
+    print "[0%        25%         50%         75%         100%]\r[",
+
+    sreqpkt.offset = 0
+    while length > 0:
+        if ((length * 100) / total_length) < next_tick:
+            next_tick = next_tick - 2
+            sys.stdout.write('-')
+            sys.stdout.flush()
+
+        # Calculates the payload size for the current packet
+        if length >= SERIAL_DATA_LENGTH:
+            sreqpkt.length = SERIAL_DATA_LENGTH
+        else:
+            sreqpkt.length = length
+        sreqpkt.data = data[sreqpkt.offset:sreqpkt.offset+sreqpkt.length]
+
+        # Sends over serial to the mote
+        if not am.write(sreqpkt, FM_AMID):
+            print
+            print "ERROR: Unable to send the last serial packet (file offset: %d)" % sreqpkt.offset
+            return False
+
+        # Waiting for confirmation
+        packet = am.read()
+        reply = SerialReplyPacket(packet.data)
+        if reply.error != ERROR_SUCCESS:
+            print
+            print "ERROR: Unable to write to the flash volume (file offset: %d)" % sreqpkt.offset
+            return False
+
+        length -= sreqpkt.length
+        sreqpkt.offset += sreqpkt.length
+
+    print '\r' + ' ' * 52,
+    elasped_time = time.time() - start_time
+    print "\r%s bytes in %.2f seconds (%.4f bytes/s)" % (total_length, elasped_time, int(total_length) / (elasped_time))
+    return True
+
+# Checks for valid CRC and timestamp
+def verifyIdent(i):
+    if i != None:
+        if crc16(i.payload()[0:10]) == i.crc and i.timestamp != 0xFFFFFFFF:
+            return True
+        else:
+            print "No valid image was detected."
+    return False
+
+def getIdent(imgNum):
+    r = read(imgNum, DELUGE_IDENT_OFFSET, DELUGE_IDENT_SIZE)
+    if r:
+        return Ident(r)
+    print "ERROR: Unable to retrieve the ident."
+    return None
+
+def formatIdent(i):
+    r  = "  Prog Name:   %s\n" % (i.appname)
+    r += "  UID:         0x%08X\n" % (i.uidhash)
+    r += "  Compiled On: %s\n" % (datetime.fromtimestamp(i.timestamp).strftime('%a %h %d %T %Y'))
+    r += "  Platform:    %s\n" % (i.platform)
+    r += "  User ID:     %s\n" % (i.username)
+    r += "  Host Name:   %s\n" % (i.hostname)
+    r += "  User Hash:   0x%08X\n" % (i.userhash)
+    r += "  Size:        %d\n" % (i.size)
+    r += "  Num Pages:   %d" % (i.pages)
+    return r
+
+def formatShortIdent(i):
+    r  = "  Prog Name:   %s\n" % (i.appname)
+    r += "  UID:         0x%08X\n" % (i.uidhash)
+    r += "  Compiled On: %s\n" % (datetime.fromtimestamp(i.timestamp).strftime('%a %h %d %T %Y'))
+    r += "  Node ID:     %d\n" % (i.nodeid)
+    return r
+
+# Injects an image (specified by tos_image_xml) to an image volume
+def inject(imgNum, tos_image_xml):
+    # Checks for valid file path
+    try:
+        os.stat(tos_image_xml)         # Checks whether tos_image_xml is a valid file
+    except:
+        print "ERROR: Unable to find the TOS image XML, \"%s\"" % tos_image_xml
+        return False
+    try:
+        os.stat(PATH_PY_BUILD_IMAGE)   # Checks whether PATH_PY_BUILD_IMAGE is a valid file
+    except:
+        print "ERROR: Unable to find the image building utility, \"%s\"" % PATH_PY_BUILD_IMAGE
+        return False
+
+    # Gets status information of stored image
+    i = getIdent(imgNum)
+    if ident:
+        print "Connected to Deluge nodes."
+        if verifyIdent(i):
+            print "--------------------------------------------------"
+            print "Stored image %d" % imgNum
+            print formatIdent(i)
+    else:
+        return False
+
+    # Creates binary image from the TOS image XML
+    print "--------------------------------------------------"
+    cmd = [PATH_PY_BUILD_IMAGE, "-i", str(imgNum), tos_image_xml]
+    print "Create image:", ' '.join(cmd)
+    p = subprocess.Popen(cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+    (out, err) = p.communicate(None)
+    print err,
+    print "--------------------------------------------------"
+
+    # Writes the new binary image
+    image = [struct.unpack("B", c)[0] for c in out]
+    if len(image) > 0 and erase(imgNum):
+        if write(imgNum, image):
+            if sync(imgNum):
+                print "--------------------------------------------------"
+                print "Replace image with:"
+                print formatIdent(getIdent(imgNum))
+                print "--------------------------------------------------"
+
+    return False
+
+def ping(imgNum):
+    uid = ident()
+    # Prints out image status
+    print "--------------------------------------------------"
+    print "Currently Executing:"
+    print formatShortIdent(ident())
+    i = getIdent(imgNum)
+    if verifyIdent(i):
+        print "Stored image %d" % imgNum
+        print formatIdent(i)
+        print "--------------------------------------------------"
+        return True
+
+    print "--------------------------------------------------"
+    return False
+
+def boot():
+    sreqpkt = DMReqPacket((DM_CMD_BOOT, 0))
+    success = am.write(sreqpkt, DM_AMID)
+    return handleResponse(success, "ERROR: Unable to boot the mote")
+
+def reprogram(imgNum):
+    sreqpkt = DMReqPacket((DM_CMD_REPROGRAM, imgNum))
+    success = am.write(sreqpkt, DM_AMID)
+    return handleResponse(success, "ERROR: Unable to reprogram the mote")
+
+def disseminate(imgNum):
+    sreqpkt = DMReqPacket((DM_CMD_ONLY_DISSEMINATE, imgNum))
+    success = am.write(sreqpkt, DM_AMID)
+    return handleResponse(success, "ERROR: Unable to disseminate")
+
+def disseminateAndReboot(imgNum):
+    sreqpkt = DMReqPacket((DM_CMD_DISSEMINATE_AND_REPROGRAM, imgNum))
+    success = am.write(sreqpkt, DM_AMID)
+    return handleResponse(success, "ERROR: Unable to disseminate-and-reboot")
+
+def stop():
+    sreqpkt = DMReqPacket((DM_CMD_STOP, 0))
+    success = am.write(sreqpkt, DM_AMID)
+    return handleResponse(success, "ERROR: Unable to initiate the stop")
+
+def localstop():
+    sreqpkt = DMReqPacket((DM_CMD_LOCAL_STOP, 0))
+    success = am.write(sreqpkt, DM_AMID)
+    return handleResponse(success, "ERROR: Unable to initiate the local stop")
+
+def print_usage():
+    print "Usage: %s <source> <-p|-i|-r|-d|-e|-s> image_number [options]" % sys.argv[0]
+    print "  <source> can be:"
+    print "     serial@PORT:SPEED   Serial ports"
+    print "     network@HOST:PORT   MIB600"
+    print "  -p --ping        Provide status of the image in the external flash"
+    print "  -i --inject      Inject a compiled TinyOS application"
+    print "                   [options]: tos_image.xml file path"
+    print "  -e --erase       Erase an image in the external flash"
+    print "  -b --boot        Force a reboot of the mote"
+    print "  -r --reprogram   Reprogram the mote"
+    print "  -d --disseminate Disseminate the image in the external flash to the network"
+    print "  -dr --disseminate-and-reprogram"
+    print "  -s --stop        Stop the dissemination "
+    print "  -ls --local-stop Stop the dissemination only on the local mote"
+
+#     print "  -b --reprogram_bs\n     Reprogram only the directly-connected mote"
+#     print "  -s --reset\n     Reset the versioning information for a given image"
+
+def checkImgNum():
+    global imgNum
+    # Checks for valid image number format
+    try:
+        imgNum = int(sys.argv[3])
+    except:
+        print "ERROR: Image number is not valid"
+        sys.exit(-1)
+    return imgNum
+
+# ======== MAIN ======== #
+if len(sys.argv) >= 3:
+
+    am = tos.AM()
+
+    try:
+        print "Checking if node is a Deluge T2 base station ..."
+        ident(timeout=1)
+    except tos.Timeout:
+        print "ERROR: Timeout. Is the node a Deluge T2 base station?"
+        sys.exit(-1)
+
+    if sys.argv[2] in ["-p", "--ping"]:
+        checkImgNum()
+        print "Pinging node ..."
+        ping(imgNum)
+    elif sys.argv[2] in ["-i", "--inject"] and len(sys.argv) == 5:
+        checkImgNum()
+        print "Pinging node ..."
+        inject(imgNum, sys.argv[4])
+    elif sys.argv[2] in ["-e", "--erase"]:
+        checkImgNum()
+        if erase(imgNum):
+            print "Image number %d erased" % imgNum
+    elif sys.argv[2] in ["-b", "--boot"]:
+        if boot():
+            print "Command sent"
+    elif sys.argv[2] in ["-r", "--reprogram"]:
+        checkImgNum()
+        if reprogram(imgNum):
+            print "Command sent"
+    elif sys.argv[2] in ["-d", "--disseminate"]:
+        checkImgNum()
+        if disseminate(imgNum):
+            print "Command sent"
+    elif sys.argv[2] in ["-dr", "--disseminate-and-reboot"]:
+        checkImgNum()
+        if disseminateAndReboot(imgNum):
+            print "Command sent"
+    elif sys.argv[2] in ["-s", "--stop"]:
+        if stop():
+            print "Command sent"
+    elif sys.argv[2] in ["-ls", "--local-stop"]:
+        if localstop():
+            print "Command sent"
+    else:
+        print_usage()
+
+else:
+    print_usage()
+
+sys.exit()
+
diff --git a/tools/tinyos/misc/tos-deluge.1 b/tools/tinyos/misc/tos-deluge.1
new file mode 100644
index 00000000..b8037cf4
--- /dev/null
+++ b/tools/tinyos/misc/tos-deluge.1
@@ -0,0 +1,58 @@
+.TH tos-deluge 1 "Jul 16, 2007"
+.SH NAME
+tos-deluge \- Management tool for Deluge T2
+
+.SH SYNOPSIS
+\fBtos-deluge\fR \fIdevice\fR \fIbaudrate\fR <\fB-p\fR|\fB-r\fR|\fB-d\fR|\fB-e\fR|\fB-s\fR> \fIimage_number\fR
+
+\fBtos-deluge\fR \fIdevice\fR \fIbaudrate\fR \fB-i\fR \fIimage_number\fR \fItos_image.xml\fR
+
+.SH DESCRIPTION
+
+\fBtos-deluge\fR is the management tool for Deluge T2. The available operations are: 
+
+.SH ARGUMENTS
+.TP
+.I device
+Any device accepted by PySerial. Examples:
+.RS
+.IP \(bu 4
+/dev/ttyUSB0
+.IP \(bu 4
+COM10
+.IP \(bu 4
+11
+.RE
+
+.TP
+.I baudrate
+Three shortcuts are available: \fBmicaz\fR and \fBiris\fR for 57600 and \fBtelosb\fR for 115200.
+.TP
+.I image_number
+A integer number. 0 is the first image.
+
+.SH OPTIONS
+.TP
+.B -p, --ping
+This command is useful for checking the status of program images on a mote. It provides information such as program name, compile time, size of the image, and so on.
+.TP
+.B -i, --inject
+This command creates a program image from the supplied tos_image.xml file, and it injects the image into specified volume on the mote.
+.TP
+.B -r, --reprogram
+This command sets up the directly-connected mote to reprogram itself after reboot, and then it reboots the mote.
+.TP
+.B -d, --disseminate
+This command instructs the base station mote to disseminate an image to the network. This image is specified by the volume ID.
+.TP
+.B -dr, --disseminate-and-reprogram
+This command asks the motes in the network not only to disseminate an image but also to start running it. This is accomplish using a reboot.
+.TP
+.B -e, --erase
+This command erases a flash volume on the base station mote.
+.TP
+.B -s, --stop
+The effect of -d and -dr is continuous which means a new mote will become infected if he is nearby. This command stops the infection.
+.TP
+.B -ls, --local-stop
+When -d or -dr are in effect, the volume used by them is locked. This command can be used to unlock the volume in order to erase or inject a new image. 
diff --git a/tools/tinyos/misc/tos-dump.py b/tools/tinyos/misc/tos-dump.py
new file mode 100644
index 00000000..1d669e1c
--- /dev/null
+++ b/tools/tinyos/misc/tos-dump.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python
+
+import sys
+import tos
+
+if '-h' in sys.argv:
+    print "Usage:", sys.argv[0], "serial@/dev/ttyUSB0:57600"
+    print "      ", sys.argv[0], "network@host:port"
+    sys.exit()
+
+am = tos.AM()
+
+while True:
+    p = am.read()
+    if p:
+	print p
+
diff --git a/tools/tinyos/misc/tos-ident-flags.1 b/tools/tinyos/misc/tos-ident-flags.1
new file mode 100644
index 00000000..e784a95f
--- /dev/null
+++ b/tools/tinyos/misc/tos-ident-flags.1
@@ -0,0 +1,13 @@
+.TH tos-ident-flags 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-ident-flags - generate compile-time flags identifying a program build
+.SH SYNOPSIS
+
+\fBtos-ident-flags\fR \fIprogram-name\fR
+.SH DESCRIPTION
+
+\fBtos-ident-flags\fR prints a set of \fB-D\fIname\fB=\fIvalue\fR options
+that identify a build of \fIprogram-name\fR. It is used to embed build
+information in a TinyOS executable.
diff --git a/tools/tinyos/misc/tos-ident-flags.in b/tools/tinyos/misc/tos-ident-flags.in
new file mode 100644
index 00000000..5397227c
--- /dev/null
+++ b/tools/tinyos/misc/tos-ident-flags.in
@@ -0,0 +1,54 @@
+#!@pathperl@ -w
+#$Id: tos-ident-flags.in,v 1.6 2008-05-29 20:08:03 razvanm Exp $
+#@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+use strict;
+
+my $MaxNameLength = 16;
+
+if( @ARGV != 1 ) {
+  print "usage: tos-ident-flags program_name\n";
+  exit 0;
+}
+
+my $name = $ARGV[0];
+my $time = sprintf( "0x%08x", `date +%s` );
+
+(my $whoami = `whoami`) =~ s/\s//g;
+(my $hostname = `hostname`) =~ s/\s//g;
+my ($uidhash, $idhash);
+if( `uname` =~ /Darwin/ ) {
+  $uidhash = `echo "$name$time$whoami$hostname" | md5`;
+  $idhash = `echo "$whoami$hostname" | md5`;
+} else {
+  $uidhash = `echo "$name$time$whoami$hostname" | sha1sum`;
+  $idhash = `echo "$whoami$hostname" | sha1sum`;
+}
+my $uid = ($uidhash =~/^(.{8})/) ? "0x$1" : 0;
+my $id = ($idhash =~/^(.{8})/) ? "0x$1" : 0;
+
+my @defs = ();
+my $qname = "";
+if( defined $name && $name !~ /^\s*$/ ) {
+  ($qname = $name) =~ s/['"]//g;
+  substr( $qname, $MaxNameLength-1 ) = "" if length $qname >= $MaxNameLength;
+  my @bytes = unpack( "C*", $qname );
+  push( @defs, "-DIDENT_APPNAME=\\\"$qname\\\"" );
+}
+if( defined $whoami && $whoami !~ /^\s*$/ ) {
+  ($qname = $whoami) =~ s/['"]//g;
+  substr( $qname, $MaxNameLength-1 ) = "" if length $qname >= $MaxNameLength;
+  my @bytes = unpack( "C*", $qname );
+  push( @defs, "-DIDENT_USERNAME=\\\"$qname\\\"" );
+}
+if( defined $hostname && $hostname !~ /^\s*$/ ) {
+  ($qname = $hostname) =~ s/['"]//g;
+  substr( $qname, $MaxNameLength-1 ) = "" if length $qname >= $MaxNameLength;
+  my @bytes = unpack( "C*", $qname );
+  push( @defs, "-DIDENT_HOSTNAME=\\\"$qname\\\"" );
+}
+push( @defs, "-DIDENT_USERHASH=${id}L" );
+push( @defs, "-DIDENT_TIMESTAMP=${time}L" );
+push( @defs, "-DIDENT_UIDHASH=${uid}L" );
+
+print join(" ",@defs) . "\n";
diff --git a/tools/tinyos/misc/tos-install-jni.1 b/tools/tinyos/misc/tos-install-jni.1
new file mode 100644
index 00000000..bdcdf349
--- /dev/null
+++ b/tools/tinyos/misc/tos-install-jni.1
@@ -0,0 +1,19 @@
+.TH tos-install-jni 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-install-jni - Install TinyOS JNI libraries
+.SH SYNOPSIS
+
+\fBtos-install-jni\fR
+.SH DESCRIPTION
+
+\fBtos-install-jni\fR install's TinyOS's JNI libraries in your Java
+installation. On Linux and other similar operating systems,
+\fBtos-install-jni\fR should be run as root. If \fBtos-install-jni\fR has
+problems (fails to find Java, or installs files in an unexpected place),
+see the \fBtos-locate-jre\fR man page for information on how your Java
+installation is located.
+.SH SEE ALSO
+
+.IR tos-locate-jre (1)
diff --git a/tools/tinyos/misc/tos-install-jni.in b/tools/tinyos/misc/tos-install-jni.in
new file mode 100644
index 00000000..9af97177
--- /dev/null
+++ b/tools/tinyos/misc/tos-install-jni.in
@@ -0,0 +1,32 @@
+#!/bin/sh
+prefix=@prefix@
+exec_prefix=@exec_prefix@
+libdir=@libdir@
+tinyoslibdir=$libdir/tinyos
+
+jni=`tos-locate-jre --jni`
+if [ $? -ne 0 ]; then
+  echo "Java not found, not installing JNI code"
+  exit 1
+fi
+
+if [ cygpath -w / >/dev/null 2>/dev/null ] || [ `uname` = "Darwin" ]; then
+  echo "Installing Java JNI code in $jni ... "
+  for lib in $tinyoslibdir/*.@JNISUFFIX@; do 
+    @INSTALLJNI@ $lib "$jni" || exit 1
+  done
+else
+  java=`tos-locate-jre --java`
+  bits=32
+  if [ $? -ne 0 ]; then
+    echo "java command not found - assuming 32 bits"
+  elif file -L $java/java | grep -q 64-bit; then
+    bits=64
+  fi
+  echo "Installing $bits-bit Java JNI code in $jni ... "
+  for lib in $tinyoslibdir/*-$bits.@JNISUFFIX@; do 
+    realname=`basename $lib | sed -e s/-$bits\.@JNISUFFIX@/.@JNISUFFIX@/`
+    @INSTALLJNI@ $lib "$jni/$realname" || exit 1
+  done
+fi
+echo "done."
diff --git a/tools/tinyos/misc/tos-locate-jre b/tools/tinyos/misc/tos-locate-jre
new file mode 100755
index 00000000..de04978b
--- /dev/null
+++ b/tools/tinyos/misc/tos-locate-jre
@@ -0,0 +1,148 @@
+#!/bin/sh
+# This script attempts to locate the jre directory of the current
+# Java installation, even when java is not in the path
+# It works with  the following rpm files:
+#       Sun's Java Software Development Kit (Linux/Windows)
+#       Sun's Java Runtime Environment (Linux)
+#       IBM's Java Software Development Kit (linux)
+
+# We require an option to specify which directory is desired:
+# --java: directory with java executable
+# --javac: directory with javac executable
+# --jni: directory where JNI code is placed
+
+if [ "$1" = "--jni" ]; then
+    jni=yes
+elif [ "$1" = "--java" ]; then
+    java=yes
+elif [ "$1" = "--javac" ]; then
+    javac=yes
+else
+    echo "Usage: tos-locate-jre --java|--javac|--jni" >&2
+    exit 2
+fi
+
+rpmlocate () {
+    javarpm=$1
+    javapath=`rpm -ql $1 2>/dev/null | grep "bin/$2$"`
+}
+
+pathlocate () {
+    javapath=`which $1 2>/dev/null`
+    while [ -n "$javapath" -a -h "$javapath" ]; do
+	javapath=`readlink -q $javapath`
+    done
+    test -n "$javapath"
+}
+
+case `uname` in
+    CYGWIN*)
+    # Hopefully this will always work on cygwin with Sun's Java
+	jversion=`regtool -q -w get '\\HKLM\\SOFTWARE\\JavaSoft\\Java Development Kit\\CurrentVersion'`
+    if [ $? != 0 ]; then
+	exit 1
+    fi
+    jhome=`regtool -q get '\\HKLM\SOFTWARE\\JavaSoft\\Java Development Kit\\'$jversion'\\JavaHome'`
+    if [ $? != 0 ]; then
+	exit 1
+    fi
+    jhome=`cygpath -u "$jhome"`
+    ;;
+
+    Darwin)
+    #Just statically typed in, uses default location of installation for XTools.  May need to be fixed
+    jhome=/System/Library/Frameworks/JavaVM.framework/Versions/CurrentJDK
+    ;;
+
+    Linux)
+    # Check gentoo java configuration
+    javapath=`java-config -c 2>/dev/null`
+    # We check the path first, on the assumption that that's the preferred
+    # version.
+    if [ -z "$javapath" ]; then
+        pathlocate javac || { test -z "$javac" && pathlocate java; }
+    fi
+    if [ -z "$javapath" ]; then
+	# We try a bunch of standard names, before resorting to rpm -qa
+	rpmlocate IBMJava2-SDK javac || \
+	    rpmlocate IBMJava2-142-ia32-SDK javac || \
+	    rpmlocate j2sdk javac || \
+	    rpmlocate jdk javac || \
+	    { test -z "$javac" && rpmlocate j2re java; } || \
+	    { test -z "$javac" && rpmlocate jre java; }
+
+	if [ -z "$javapath" ]; then
+	    # lastly, check for a weirdly named IBMJava2
+	    name=`rpm -qa | grep IBMJava2 | head -1`
+	    if [ -n "$name" ]; then
+		rpmlocate $name javac
+	    fi
+	fi
+    fi
+    if [ -z "$javapath" ]; then
+	exit 1
+    fi
+    jbin=`dirname "$javapath"`
+    jhome=`dirname "$jbin"`
+    ;;
+
+    FreeBSD)
+    # We check the path first, on the assumption that that's the preferred
+    # version.
+    pathlocate javac || { test -z "$javac" && pathlocate java; }
+    if [ -n "$javapath" ]; then
+	jbin=`dirname "$javapath"`
+    else
+	if [ -f /usr/local/jdk1.4*/bin/java ]; then
+	    jbin=/usr/local/jdk1.4*/bin
+	else
+	    exit 1
+	fi
+    fi
+    jhome=`dirname $jbin`
+    ;;
+esac
+
+# These are correct for Sun and IBM's x86 Java versions
+if [ "$jni" = "yes" ]; then
+    jnilocate () {
+	dir="$1"
+	test -d "$1"
+    }
+
+    # Look for a likely JNI directory
+    # Windows, and IBM Java: in jre/bin
+    # Sun Java on Linux: in jre/lib/i386
+    if [ `uname` = "Darwin" ]; then 
+	jnilocate "/Library/java/Extensions"
+    elif "$jhome/bin/java" -version 2>&1 | grep -q IBM || cygpath -w / >/dev/null 2>/dev/null; then
+	jnilocate "$jhome/jre/bin" || jnilocate "$jhome/bin"
+    else
+	arch=`uname -m`
+	jnilocate "$jhome/jre/lib/$arch" || \
+	    jnilocate "$jhome/jre/lib/i386" || \
+	    jnilocate "$jhome/jre/lib/amd64" || \
+	    jnilocate "$jhome/lib/$arch" || \
+	    jnilocate "$jhome/lib/i386" || \
+	    jnilocate "$jhome/lib/amd64"
+    fi
+elif [ "$javac" = "yes" ]; then
+ if [ `uname` = "Darwin" ]; then
+   dir="$jhome/Commands"
+ else 
+   dir="$jhome/bin"
+ fi
+elif [ "$java" = "yes" ]; then
+ if [ `uname` = "Darwin" ]; then  
+   dir="$jhome/Commands"
+ else 
+   dir="$jhome/bin"
+ fi
+fi
+
+# Check that what we found actually exists
+if [ -d "$dir" ]; then
+ echo $dir
+else
+ exit 1
+fi
diff --git a/tools/tinyos/misc/tos-locate-jre.1 b/tools/tinyos/misc/tos-locate-jre.1
new file mode 100644
index 00000000..55222418
--- /dev/null
+++ b/tools/tinyos/misc/tos-locate-jre.1
@@ -0,0 +1,37 @@
+.TH tos-locate-jre 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-locate-jre - Locate a Java installation
+.SH SYNOPSIS
+
+\fBtos-locate-jre\fR \fB--jni\fR
+\fBtos-locate-jre\fR \fB--java\fR
+\fBtos-locate-jre\fR \fB--javac\fR
+.SH DESCRIPTION
+
+\fBtos-locate-jre\fR locates your Java installation. It is used by other tools
+to decide where to install files, and is useful for setting up your shell
+path.
+
+Under cygwin, \fBtos-locate-jre\fR checks the registry for the installation
+point of Sun's JVM. It will not find any other versions of Java.
+
+Under Linux, \fBtos-locate-jre\fR looks for an executable named javac or
+java in the path. If none is found, it looks for IBM's and Sun's Java RPMs
+(in that order).
+
+Once \fBtos-locate-jre\fR has located your Java directory, it can return 
+the directory containing the \fBjava\fR executable (\fB--java\fR option),
+the directory containing the \fBjavac\fR executable (\fB--javac\fR option),
+or the directory where JNI libraries should be installed (\fB--jni\fR option).
+
+\fBtos-locate-jre\fR has only been tested with recent IBM and Sun JVMs. If
+you use something else, it will likely fail.
+.SH EXAMPLES
+
+Add java and javac to your path:
+  PATH=`/usr/local/bin/locate-jre --java`:$PATH
+  PATH=`/usr/local/bin/locate-jre --javac`:$PATH
+.SH SEE ALSO
+.IR tos-install-jni (1)
diff --git a/tools/tinyos/misc/tos-mote-key b/tools/tinyos/misc/tos-mote-key
new file mode 100644
index 00000000..0d348bfd
--- /dev/null
+++ b/tools/tinyos/misc/tos-mote-key
@@ -0,0 +1,124 @@
+#!/usr/bin/perl
+
+# Copyright (c) 2000-2002 The Regents of the University  of California.  
+# All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Naveen Sastry
+# Date:    11/11/02
+#
+#
+# Script to manage the tinysec keyfile
+
+
+# default keyfile and default key name (\w+ matches first valid key)
+$KEYFILE=".keyfile";
+$KEYNAME="\\w+";
+
+# if no keyfile is found, we'll need to create it and populate it with data
+# from /dev/random. This function returns the text taht should go into the 
+# new keyfile. We store the key in a hex-form.
+sub generateKey {
+    print STDERR "Generating default TinySec Key...\n";
+    
+    $a = "\n# TinySec Keyfile. By default, the first key will be used.\n";
+    $a = $a . "# You can import other keys by appending them to the file.\n";
+    $a = $a . "\ndefault ";
+
+    open RND, "</dev/urandom" or open "</dev/urandom" or 
+        die("Couldn't open random file.");
+    read RND, $r, 16;
+    @chars = split //, $r;
+    while (@chars) {
+        $a = $a . sprintf("%02lX", (ord shift @chars));
+    }
+    return $a;
+};
+
+# Returns the binary version of the key (passed as the first arg)
+sub recoverKey {
+    $s = "";
+    @chars = split /(..)/g, shift(@_);
+    while (@chars) {
+        $a = hex shift @chars;
+        if ($a != 0 ) {
+            $s = $s . chr ($a);
+        }
+    }
+    return $s;
+}
+
+# Returns a text version of the key (passed as the key) suitable for use in c
+# programs (ie returns "0x32,0xAB, ..." when given 32AB...)
+sub splitKey {
+    $s = "";
+    $delim = "";
+    @chars = split /(..)/g, shift(@_);
+    while (@chars) {
+        $a = shift @chars;
+        if (! $a eq "" ) {
+            $s = $s . $delim . "0x" . $a ;
+            $delim = ",";
+        }
+    }
+    return $s;
+}
+
+# prints the usage string and exits
+sub usage {
+    print "usage: TinySecKey [-kf keyfile] [-kn keyname]\n";
+    print "       where \n";
+    print "         [-kf keyfile] specifies an optional keyfile (default /home/$USER/.keyfile)\n";
+    print "         [-kn keyname] specifies an optional keyname (default uses first) \n";
+    exit 1;
+}
+
+# parse the args
+while ($_ = $ARGV[0], /^-/) {
+    shift;
+    if (/^-kf/) { $KEYFILE = $ARGV[0]; shift; next;  }
+    if (/^-kn/) { $KEYNAME = $ARGV[0] ; shift; next;  }
+    usage();
+}
+
+# open the keyfile. if new, generate key data and reposition file pointer
+open KEYFILE, '+<', $KEYFILE or
+    (open KEYFILE, '+>', $KEYFILE and print KEYFILE generateKey() and
+     seek KEYFILE, 0, 0) or
+      die ("couldn't open file " . $KEYFILE);
+
+# find the matching key and print.
+while ( <KEYFILE> )  {
+    if ($_ =~ /^$KEYNAME\s+([a-fA-F0-9]+)/) {
+        $KEY = $1;
+        last;
+    }
+}
+
+print splitKey($KEY) . "\n";
diff --git a/tools/tinyos/misc/tos-mote-key.1 b/tools/tinyos/misc/tos-mote-key.1
new file mode 100644
index 00000000..4cf4f83f
--- /dev/null
+++ b/tools/tinyos/misc/tos-mote-key.1
@@ -0,0 +1,13 @@
+.TH tos-mote-key 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-mote-key - Manage TinySec keys
+.SH SYNOPSIS
+
+\fBtos-mote-key\fR [\fB-kf \fIkeyfile\fR] [\fB-kn \fIkeyname\fR]
+.SH DESCRIPTION
+
+\fBtos-mote-key\fR manages TinySec keys. TinySec is an encryption system
+for mica and mica2 motes under TinyOS 1.1. See the TinySec documentation
+for more details.
diff --git a/tools/tinyos/misc/tos-mviz b/tools/tinyos/misc/tos-mviz
new file mode 100755
index 00000000..0dd8ee13
--- /dev/null
+++ b/tools/tinyos/misc/tos-mviz
@@ -0,0 +1,8 @@
+#!/bin/bash
+#
+# $Id: tos-mviz,v 1.4 2006-12-12 18:23:02 vlahan Exp $ 
+#
+
+printenv CLASSPATH
+java net.tinyos.mviz.DDocument $*
+
diff --git a/tools/tinyos/misc/tos-mviz.1 b/tools/tinyos/misc/tos-mviz.1
new file mode 100644
index 00000000..a619c293
--- /dev/null
+++ b/tools/tinyos/misc/tos-mviz.1
@@ -0,0 +1,18 @@
+.TH tos-mviz 1 "Oct 24, 2006"
+.LO 1
+.SH NAME
+
+tos-mviz - Launch MViz, the TinyOS network visualizer 
+.SH SYNOPSIS
+
+\fBtos-mviz\fR [\fB-comm\fR \fIserial-source\fR] \fImig-class\fR [\fImig-class]...
+.SH DESCRIPTION
+
+\fBtos-mviz\fR launches MViz, the TinyOS network visualizer. MViz is a replacement
+for the Surge application of earlier TinyOS versions. MViz reads packets from
+a packet source and displays their data in a GUI. MViz takes the class names of
+mig-generated Java classes as parameters; it parses these packets and displays their
+fields. For MViz to be able to understand a mig packet, it must have an \fIorigin\fR
+field which denotes which node the data is from. Please see TinyOS tutorial 12: MViz,
+for more detail.
+
diff --git a/tools/tinyos/misc/tos-nwprog b/tools/tinyos/misc/tos-nwprog
new file mode 100755
index 00000000..4e69226e
--- /dev/null
+++ b/tools/tinyos/misc/tos-nwprog
@@ -0,0 +1,318 @@
+#!/usr/bin/env python
+
+# Copyright (c) 2007 Johns Hopkins University.
+# All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+# @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+
+# b6lowpan/nwprog port:
+# @author Stephen Dawson-Haggerty <stevedh@cs.berkeley.edu>
+
+import sys, stat, struct, subprocess, time, os.path, socket, getopt, re
+try:
+    import tos
+except ImportError:
+    import posix
+    sys.path = [os.path.join(posix.environ['TOSROOT'], 'support', 'sdk', 'python')] + sys.path
+    import tos
+from datetime import datetime
+
+# Path to the python script that builds Deluge image from XML
+PATH_PY_BUILD_IMAGE  = os.path.join(os.path.dirname(sys.argv[0]), 'tos-build-deluge-image')
+
+# Commands for NWProg
+NWPROG_CMD_ERASE = 1
+NWPROG_CMD_WRITE = 2
+NWPROG_CMD_READ  = 3
+
+
+# Deluge parameters
+DELUGE_MAX_PAGES    = 128
+DELUGE_IDENT_OFFSET = 0
+DELUGE_IDENT_SIZE   = 128
+
+NWPROG_PORT = 5213
+NWPROG_PKT_SIZE = 64
+NWPROG_REQ_FMT = "!BBL"
+NWPROG_REPLY_FMT = "!BBBBL"
+
+ERROR_SUCCESS = 0
+nRetries = 3
+
+class CommandFailedException:
+    pass
+
+def send_command(cmd_str, retries):
+    s.sendto(cmd_str, (remote, NWPROG_PORT))
+    s.settimeout(3)
+    (real_cmd, real_imgno, real_offset) = struct.unpack(NWPROG_REQ_FMT, cmd_str[0:6])
+    try:
+        data, addr = s.recvfrom(1024)
+        # make sure this is the guy we're programming
+        if (addr[0] == remote):
+            (error, pack, cmd, imgno, offset) = struct.unpack(NWPROG_REPLY_FMT, data)
+            if error != ERROR_SUCCESS or real_offset != offset or real_imgno != imgno:
+                print "WARNING: received error while sending block; retrying"
+                raise socket.timeout
+            else: return data
+        else:
+            print "WARNING: received unexpected reply from", addr[0]
+            return False
+    except socket.timeout:
+        # socket timeout out try again
+        if retries > 0:
+            return send_command(cmd_str, retries - 1)
+        else:
+            return False
+
+def erase(imgNum, none=None):
+    e_req = struct.pack(NWPROG_REQ_FMT, NWPROG_CMD_ERASE, imgNum, 0)
+    return send_command(e_req, 1)
+
+def read(imgNum, unused=None):
+    length = 40000
+    pkt_offset = 0
+    while length > 0:
+        sreqpkt = struct.pack(NWPROG_REQ_FMT, NWPROG_CMD_READ, imgNum, pkt_offset)
+
+        data = send_command(sreqpkt, 5)
+        if data != False:
+            (error, pack, cmd, imgno, offset) = struct.unpack(NWPROG_REPLY_FMT, data[0:8])
+            if offset == pkt_offset:
+                for c in data[6:]:
+                    print >>sys.stderr, ord(c)
+            else:
+                print "ERROR: Out of sequence data: aborting"
+                sys.exit(1)
+        pkt_offset += len(data) - 6
+        length -= (len(data) - 6)
+    return True
+            
+
+def write(imgNum, data):
+    length = len(data)
+    total_length = length   # For progress bar
+    next_tick = 100         # For progress bar
+    start_time = time.time()
+
+    print "[0%        25%         50%         75%         100%]\r[",
+
+    pkt_offset = 0
+    pkt_length = 0
+
+    while length > 0:
+        if ((length * 100) / total_length) < next_tick:
+            next_tick = next_tick - 2
+            sys.stdout.write('-')
+            sys.stdout.flush()
+
+        # Calculates the payload size for the current packet
+        if length >= NWPROG_PKT_SIZE:
+            pkt_length = NWPROG_PKT_SIZE
+        else:
+            pkt_length = length
+
+        sreqpkt = struct.pack(NWPROG_REQ_FMT,
+                              NWPROG_CMD_WRITE, imgNum, pkt_offset)
+
+        for i in data[pkt_offset:pkt_offset+pkt_length]:
+            sreqpkt += chr(i)
+
+        # Sends packet to serial
+        if not send_command(sreqpkt, 5):
+            print "\nReceived error from mote while programming"
+            print "Perhaps the block size is too large, or the flash is broken?"
+            return False
+
+        length -= pkt_length
+        pkt_offset += pkt_length
+
+
+    print '\r' + ' ' * 52,
+    elasped_time = time.time() - start_time
+    print "\r%s bytes in %.2f seconds (%.4f bytes/s)" % (total_length, elasped_time, int(total_length) / (elasped_time))
+
+    return True
+
+
+# Injects an image (specified by tos_image_xml) to an image volume
+def upload(imgNum, tos_image_xml):
+    # Checks for valid file path
+    try:
+        os.stat(tos_image_xml)         # Checks whether tos_image_xml is a valid file
+    except:
+        print "ERROR: Unable to find the TOS image XML, \"%s\"" % tos_image_xml
+        return False
+    try:
+        os.stat(PATH_PY_BUILD_IMAGE)   # Checks whether PATH_PY_BUILD_IMAGE is a valid file
+    except:
+        print "ERROR: Unable to find the image building utility, \"%s\"" % PATH_PY_BUILD_IMAGE
+        return False
+
+    # Creates binary image from the TOS image XML
+    print "--------------------------------------------------"
+    cmd = [PATH_PY_BUILD_IMAGE, "-i", str(imgNum), tos_image_xml]
+    print "Create image:", ' '.join(cmd)
+    p = subprocess.Popen(cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+    (out, err) = p.communicate(None)
+    print err,
+    print "--------------------------------------------------"
+
+    # Writes the new binary image
+    image = [struct.unpack("B", c)[0] for c in out]
+    if len(image) > 0 and erase(imgNum):
+        return write(imgNum, image)
+    else:
+        print "Could not proceed: image size is zero or erase failed"
+
+    return False
+
+
+def print_usage():
+    print
+    print "Usage: %s <(-e|-u) image_number> <-f app_xml> [options] [ip_address]" % sys.argv[0]
+    print "  -u --upload      Upload a compiled TinyOS application"
+    print "  -r --read        Read back a volume"
+    print "  -e --erase       Erase an image in the external flash"
+    print "  -f --appfile     The tos_image.xml file to upload"
+    print "  -m --motelist    A file containing a list of IPv6 addresses to upload to"
+    print "  -r --retries     The number of times to retry each operation (currently %i)" % nRetries
+    print "  -p --payload-sz  How much payload to include in every packet (currently %i)" % NWPROG_PKT_SIZE
+    print "  -d --dudfile     File to write list of motes which did not program (default: stdout)"
+    print
+
+def checkImgNum(imgNum):
+    # Checks for valid image number format
+    try:
+        imgNum = int(imgNum)
+    except:
+        print "ERROR: Image number is not valid"
+        sys.exit(-1)
+    return imgNum
+
+# ======== MAIN ======== #
+if __name__ == '__main__':
+
+    try:
+        opts, args = getopt.getopt(sys.argv[1:], "e:u:m:f:r:p:d:r:",
+                                   ["--erase", "--upload", "--motelist", "--appfile",
+                                    "--retries", "--payload", "--dudfile",
+                                    "--upload"])
+    except getopt.GetoptError, err:
+        print str(err)
+        print_usage()
+        sys.exit(1)
+
+    imgNum = None
+    uploadFile = None
+    appFile = None
+    dudFile = None
+    
+    for o, a in opts:
+        if o in ["-e", "--erase"]:
+            imgNum = checkImgNum(a)
+            cmd = "eras"
+        elif o in ["-u", "--upload"]:
+            imgNum = checkImgNum(a)
+            cmd = "upload"
+        elif o in ["-r", "--read"]:
+            imgNum = checkImgNum(a)
+            cmd = "read"
+        elif o in ["-m", "--motelist"]:
+            uploadFile = a
+        elif o in ["-f", "--appfile"]:
+            appFile = a
+        elif o in ["-r", "--retries"]:
+            nRetries = int(a)
+        elif o in ["-p", "--payload-sz"]:
+            NWPROG_PKT_SIZE = int(a)
+        elif o in ["-d", "--dudfile"]:
+            dudFile = a
+
+    if imgNum == None or (cmd != "eras" and cmd != "read" and appFile == None):
+        print_usage()
+        sys.exit(1)
+
+    upload_list = []
+    if uploadFile == None:
+        upload_list = [(ip, nRetries) for ip in args]
+    else:
+        fp = open(uploadFile, "r")
+        rexp = re.compile("^.*#")
+        for ip in fp.readlines():
+            if re.match(rexp,ip): continue
+            upload_list.append( (ip.strip().lower(), nRetries) )
+        fp.close()
+
+    if cmd == 'upload': cmd_fn = upload
+    elif cmd == 'read': cmd_fn = read
+    else: cmd_fn = erase
+
+    print "%sing %i motes" % (cmd, len(upload_list))
+    print "retries: %i payload: %i" % (nRetries, NWPROG_PKT_SIZE)
+
+    for t in range(0, nRetries):
+        for i in range(0, len(upload_list)):
+            remote, tries_left = upload_list[i]
+            if tries_left <= 0: continue
+            print "%sing %s, %i tries remaining ..." % (cmd, remote, tries_left)
+            try:
+                s = socket.socket(socket.AF_INET6, socket.SOCK_DGRAM)
+                if not cmd_fn(imgNum, appFile):
+                    upload_list[i] = (remote, tries_left - 1)
+                else:
+                    upload_list[i] = (remote, -1)
+                    print "Success!"
+                s.close()
+            except KeyboardInterrupt:
+                print "Interrupted; exiting"
+                sys.exit(2)
+            except Exception, e:
+                print "Received unexpected exception while programming"
+                print str(e)
+                s.close()
+                pass
+
+    printedHeading = False
+    if dudFile != None:
+        dudFp = open(dudFile, "w")
+    else: dudFp = sys.stdout
+    
+    for i in range(0, len(upload_list)):
+        remote, tries_left = upload_list[i]
+        if tries_left == 0 and not printedHeading:
+            printedHeading = True
+            print "WARNING: not all motes were succesfully %sed!" % cmd
+        if tries_left == 0:
+            print >>dudFp, remote
+
+    if dudFp != sys.stdout:
+        dudFp.close()
diff --git a/tools/tinyos/misc/tos-serial-configure b/tools/tinyos/misc/tos-serial-configure
new file mode 100644
index 00000000..ded492d8
--- /dev/null
+++ b/tools/tinyos/misc/tos-serial-configure
@@ -0,0 +1,3 @@
+#!/bin/sh
+num=$((`echo $1 | sed -e s/COM//` - 1))
+stty -F /dev/ttyS$num raw
diff --git a/tools/tinyos/misc/tos-serial-configure.1 b/tools/tinyos/misc/tos-serial-configure.1
new file mode 100644
index 00000000..4080621f
--- /dev/null
+++ b/tools/tinyos/misc/tos-serial-configure.1
@@ -0,0 +1,31 @@
+.TH tos-serial-configure 1 "Feb 2, 2006"
+.LO 1
+.SH NAME
+
+tos-serial-configure - reset serial port settings for raw data
+.SH SYNOPSIS
+
+\fBtos-serial-configure\fR \fInumber\fR
+.SH DESCRIPTION
+
+\fBtos-serial-configure\fR is a tool that resets a serial port
+to read raw bytes. Some devices, such as terminals, require
+serial ports to interpret bytes in some fashion or another.
+For example, in "cooked" mode, a read on a serial port
+returns only after a newline character.
+
+\fBtos-serial-debug\fR takes a required \fInumber\fR argument,
+an integer which refers to which serial port to configure.
+This is appended to "/dev/ttyS" to determine the terminal
+device name. 
+
+.SH EXAMPLE
+Executing
+  
+  tos-serial-configure 0
+
+configures /dev/ttyS0.
+
+.SH SEE ALSO
+
+.IR tos-serial-debug (1),
diff --git a/tools/tinyos/misc/tos-serial-debug.1 b/tools/tinyos/misc/tos-serial-debug.1
new file mode 100644
index 00000000..1f236ee0
--- /dev/null
+++ b/tools/tinyos/misc/tos-serial-debug.1
@@ -0,0 +1,39 @@
+.TH tos-serial-debug 1 "Feb 2, 2006"
+.LO 1
+.SH NAME
+
+tos-serial-debug - print the raw bytes read from a serial port
+.SH SYNOPSIS
+
+\fBtos-serial-debug\fR [\fIserial port\fR] [\fIbaud rate\fR]
+.SH DESCRIPTION
+
+\fBtos-serial-debug\fR is a tool that reads raw bytes from a
+serial port and prints them to stdout in hexidecimal format.
+It is typically used to determine whether failure to communicate
+with a node over the serial port is due to an inability to receive
+anything or whether it is due to disagreement on the packet format.
+
+\fBtos-serial-debug\fR takes optional \fIserial port\fR and
+\fIbaud rate\fR arguments. The latter cannot be specified unless
+the former is as well. The \fIserial port\fR argument names a serial 
+port device and defaults to /dev/ttyS0. The \fIbaud rate\fR argument
+is an ASCII string describing a baud rate, and must be one of
+50, 75, 110, 134, 150, 200, 600, 1200, 2400, 4800, 9600, 19200,
+38400, 57600, 115200, 230400, 460800k, 500000, 576000, 921600,
+1000000, 1152000, 1500000, 2000000, 2500000, 3000000, 3500000, 
+or 4000000. It defaults to 19200. Particular software distributions
+may vary, but the default speeds for current motes platforms
+are as follows:
+
+\fBeyesIFXv2\fR, \fBintelmote2\fR, \fBtelosb\fR, \fBtmote\fR: 115200
+.br
+\fBmica2\fR, \fBmicaz\fR: 57600
+
+.SH EXAMPLE
+  tos-serial-debug 
+  tos-serial-debug /dev/ttyS1 
+  tos-serial-debug /dev/ttyS1 57600
+.SH SEE ALSO
+
+.IR tos-serial-configure (1)
diff --git a/tools/tinyos/misc/tos-serial-debug.c b/tools/tinyos/misc/tos-serial-debug.c
new file mode 100644
index 00000000..ce13520e
--- /dev/null
+++ b/tools/tinyos/misc/tos-serial-debug.c
@@ -0,0 +1,233 @@
+// $Id: tos-serial-debug.c,v 1.5 2010-06-29 22:07:42 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <termios.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#ifdef __CYGWIN__
+#include <windows.h>
+#endif
+
+#define BAUDRATE B19200 //the baudrate that the device is talking
+#define SERIAL_DEVICE "/dev/ttyS0" //the port to use.
+
+int input_stream;
+
+void print_usage(char *name);
+void open_input(int argc, char **argv);
+
+int main(int argc, char ** argv) {
+    int n = 0;
+
+    if (argc > 3 || argc > 1 && argv[1][0] == '-') {
+	print_usage(argv[0]);
+	exit(2);
+    }
+    open_input(argc, argv);
+    while(1) { 
+	unsigned char c;
+	int cnt = read(input_stream, &c, 1);
+
+	if (cnt < 0) {
+	    perror("error reading from serial port");
+	    exit(2);
+	}
+	if (cnt == 1) {
+	    if (c == 0x7e || ++n == 26) {
+		n = 0;
+		printf("\n");
+	    }
+	    printf("%02x ", c);
+	    fflush(stdout);
+	}
+    }
+}
+
+void print_usage(char *name){
+    //usage...
+    fprintf(stderr, "usage: %s [serial port] [baudrate]\n", name);
+    fprintf(stderr, "Default serial port is " SERIAL_DEVICE ", default baud rate is 19200\n");
+}
+
+
+void open_input(int argc, char **argv) {
+    /* open input_stream for read/write */ 
+    struct termios newtio;
+    const char *name = SERIAL_DEVICE;
+    unsigned long baudrate = BAUDRATE;
+
+    if (argc > 1)
+	name = argv[1];
+    if (argc > 2) {
+	int reqrate = atoi(argv[2]);
+
+	switch (reqrate) {
+#ifdef B50
+	case 50: baudrate = B50; break;
+#endif
+#ifdef B75
+	case 75: baudrate = B75; break;
+#endif
+#ifdef B110
+	case 110: baudrate = B110; break;
+#endif
+#ifdef B134
+	case 134: baudrate = B134; break;
+#endif
+#ifdef B150
+	case 150: baudrate = B150; break;
+#endif
+#ifdef B200
+	case 200: baudrate = B200; break;
+#endif
+#ifdef B300
+	case 300: baudrate = B300; break;
+#endif
+#ifdef B600
+	case 600: baudrate = B600; break;
+#endif
+#ifdef B1200
+	case 1200: baudrate = B1200; break;
+#endif
+#ifdef B1800
+	case 1800: baudrate = B1800; break;
+#endif
+#ifdef B2400
+	case 2400: baudrate = B2400; break;
+#endif
+#ifdef B4800
+	case 4800: baudrate = B4800; break;
+#endif
+#ifdef B9600
+	case 9600: baudrate = B9600; break;
+#endif
+#ifdef B19200
+	case 19200: baudrate = B19200; break;
+#endif
+#ifdef B38400
+	case 38400: baudrate = B38400; break;
+#endif
+#ifdef B57600
+	case 57600: baudrate = B57600; break;
+#endif
+#ifdef B115200
+	case 115200: baudrate = B115200; break;
+#endif
+#ifdef B230400
+	case 230400: baudrate = B230400; break;
+#endif
+#ifdef B460800
+	case 460800: baudrate = B460800; break;
+#endif
+#ifdef B500000
+	case 500000: baudrate = B500000; break;
+#endif
+#ifdef B576000
+	case 576000: baudrate = B576000; break;
+#endif
+#ifdef B921600
+	case 921600: baudrate = B921600; break;
+#endif
+#ifdef B1000000
+	case 1000000: baudrate = B1000000; break;
+#endif
+#ifdef B1152000
+	case 1152000: baudrate = B1152000; break;
+#endif
+#ifdef B1500000
+	case 1500000: baudrate = B1500000; break;
+#endif
+#ifdef B2000000
+	case 2000000: baudrate = B2000000; break;
+#endif
+#ifdef B2500000
+	case 2500000: baudrate = B2500000; break;
+#endif
+#ifdef B3000000
+	case 3000000: baudrate = B3000000; break;
+#endif
+#ifdef B3500000
+	case 3500000: baudrate = B3500000; break;
+#endif
+#ifdef B4000000
+	case 4000000: baudrate = B4000000; break;
+#endif
+	default:
+	    fprintf(stderr, "Unknown baudrate %s, defaulting to 19200\n",
+		    argv[2]);
+	}
+    }
+    
+    input_stream = open(name, O_RDWR|O_NOCTTY);
+    if (input_stream == -1) {
+	fprintf(stderr, "Failed to open %s", name);
+	perror("");
+	fprintf(stderr, "Make sure the user has permission to open device.\n");
+	exit(2);
+    }
+    printf("%s input_stream opened\n", name);
+#ifdef __CYGWIN__
+    /* For some very mysterious reason, this incantation is necessary to make
+       the serial port work under some windows machines */
+    HANDLE handle = (HANDLE)get_osfhandle(input_stream);
+    DCB dcb;
+    if (!(GetCommState(handle, &dcb) &&
+	  SetCommState(handle, &dcb))) {
+      fprintf(stderr, "serial port initialisation problem\n");
+      exit(2);
+    }
+#endif
+
+    /* Serial port setting */
+    memset(&newtio, 0, sizeof(newtio));
+    newtio.c_cflag = CS8 | CLOCAL | CREAD;
+    newtio.c_iflag = IGNPAR | IGNBRK;
+    cfsetispeed(&newtio, baudrate);
+    cfsetospeed(&newtio, baudrate);
+
+    tcflush(input_stream, TCIFLUSH);
+    tcsetattr(input_stream, TCSANOW, &newtio);
+}
diff --git a/tools/tinyos/misc/tos-set-symbols.1 b/tools/tinyos/misc/tos-set-symbols.1
new file mode 100644
index 00000000..8199363c
--- /dev/null
+++ b/tools/tinyos/misc/tos-set-symbols.1
@@ -0,0 +1,60 @@
+.TH tos-set-symbols 1 "Feb 2, 2006"
+.LO 1
+.SH NAME
+
+tos-set-symbols - set initialized variable values in a binary
+.SH SYNOPSIS
+
+\fBtos-set-symbols\fR [\fB--objcopy=\fR\fIOBJCOPY\fR] [\fB--objdump=\fR\fIOBJDUMP\fR] 
+                [\fB--target=\fR\fITARGET\fR] 
+                \fIINPUTFILE\fR \fIOUTPUTFILE\fR [\fISYMBOL\fR=]VALUE...
+
+\fBtos-set-symbols\fR --srec [\fB--objcopy=\fR\fIOBJCOPY\fR] [\fB--objdump=\fR\fIOBJDUMP\fR] 
+                [\fB--target=\fR\fITARGET\fR] 
+                \fIINPUTFILE\fR \fIOUTPUTFILE\fR [\fISYMBOL\fR=]VALUE...
+
+\fBtos-set-symbols\fR --exe [\fB--objcopy=\fR\fIOBJCOPY\fR] [\fB--objdump=\fR\fIOBJDUMP\fR] 
+                \fIINPUTFILE\fR \fIOUTPUTFILE\fR [\fISYMBOL\fR=]VALUE...
+
+\fBtos-set-symbols\fR --read [\fB--objdump=\fR...] \fIINPUTFILE\fR \fISYMBOL\fR...
+
+.SH DESCRIPTION
+
+\fBtos-set-symbols\fR is a tool to inspect and modify the initial values
+of variables in a binary. It is used by the TinyOS build system to set
+a node's ID and AM address, for example, when using \fBinstall.X\fR or
+\fBreinstall.X\fR. 
+
+\fBtos-set-symbols\fI takes an optional first argument that specifies
+the format of the binary being modified or whether it is only being read.
+By default, it acts as if \fB--srec\fR was passed. Instead of passing
+\fB--srec\fR, \fB--exe\fR, the \fB--target\fR option can be used to
+specify a target format. This option is passed to objcopy. The \fB--objdump\fR
+and \fB--objcopy\fR options allow you to specify which binary tools
+to use. By default, \fBtos-set-symbols\fR uses \fBavr-objcopy\fR and
+\fBavr-objdump\fR.
+
+The \fISYMBOL\fR parameter refers to a variable in the image to 
+modify or print. If the variable is in a component, its name is of
+the form \fIcomponent\fR$\fIvariable\fR. If the \fISYMBOL\fR is
+omitted, it defaults to \fBTOS_LOCAL_ADDRESS\fR, for compatibility
+with the TinyOS 1.x \fBset-mode-id\fR tool.
+
+.SH EXAMPLE
+. 
+This reads in a micaZ .srec file, changes the value of TOS_NODE_ID 
+to 4, and writes out a new binary to main.srec.out-4.
+
+  tos-set-symbols build/micaz/main.srec build/micaz/main.srec.out-4 \\
+  TOS_NODE_ID=4
+  
+This reads in a Telos .srec file, changes the value of TOS_NODE_ID and
+ActiveMessageAddressC$addr to 3, and writes out a new binary to 
+main.srec.out-3. It uses the msp430, rather than the avr, binary tools,
+and outputs an ihex format executable.
+
+  tos-set-symbols --objcopy=msp430-objcopy --objdump=msp430-objdump \\
+  --target=ihex build/telosa/main.ihex build/telosa/main.ihex.out-3 \\
+  TOS_NODE_ID=3 ActiveMessageAddressC\$addr=3 
+
+
diff --git a/tools/tinyos/misc/tos-set-symbols.in b/tools/tinyos/misc/tos-set-symbols.in
new file mode 100644
index 00000000..ea483a7e
--- /dev/null
+++ b/tools/tinyos/misc/tos-set-symbols.in
@@ -0,0 +1,163 @@
+#!@pathperl@ -w
+#
+# This program changes the mote ID of a TinyOS image. It is used to 
+# install a program for a specific mote.
+use strict;
+
+my %G_opts = (
+  compat => 1,
+  objdump => 'avr-objdump',
+  objcopy => 'avr-objcopy',
+  target => 'srec',
+  readdata => 0,
+);
+
+# default to backward compatability mode
+while( @ARGV && $ARGV[0] =~ /^-/ ) {
+  (my $opt = shift @ARGV) =~ s/^-+//;
+  if( $opt eq "srec" ) { $G_opts{compat} = 1; }
+  elsif( $opt eq "exe" ) { $G_opts{compat} = 0; }
+  elsif( $opt eq "read" ) { $G_opts{readdata} = 1; $G_opts{compat} = 0; }
+  elsif( exists $G_opts{$opt} ) { $G_opts{$opt} = shift @ARGV; }
+  else { die "Unknown command line option $opt\n"; }
+}
+
+# print usage if we have the wrong number of arguments
+if( @ARGV < ($G_opts{readdata} ? 1 : 3) ) {
+    print "usage: tos-set-symbols --srec [--objcopy=...] [--objdump=...]\n";
+    print "                       [--target=TARGETFILETYPE]\n";
+    print "                       INFILE OUTFILE [SYMBOL=]VALUE...\n";
+    print "       tos-set-symbols --exe [--objcopy=...] [--objdump=...]\n";
+    print "                       INFILE OUTFILE [SYMBOL]=VALUE...\n";
+    print "       tos-set-symbols --read [--objdump=...] INFILE SYMBOL...\n";
+    print "\nNote: If omitted, SYMBOL defaults to TOS_LOCAL_ADDRESS.\n";
+    print "(for TinyOS 1.x compatibility).\n";
+    exit 0;
+}
+
+# get the args and default variables set up
+my $exein = shift @ARGV;
+my $exeout = $G_opts{readdata} ? $exein : shift @ARGV;
+my %user_symbols = ();
+if( $G_opts{readdata} ) {
+  for my $name (@ARGV) {
+    $name =~ s/\./\$/g;
+    $user_symbols{$name} = 1;
+  }
+} else {
+  for my $value (@ARGV) {
+    my $name = 'TOS_LOCAL_ADDRESS';
+    ($name,$value) = ($1,$2) if $value =~ /^([^=]+)=(.*)/;
+    $value = hex $value if $value =~ /^0x/;
+    $user_symbols{$name} = $value;
+  }
+}
+my $segment_vma = undef;
+my $segment_lma = undef;
+my $segment_off = undef;
+
+# if in compatability mode, derive the names of the exes from the srecs
+my $srecin = undef;
+my $srecout = undef;
+if( $G_opts{compat} ) {
+  $srecin = $exein;
+  $srecout = $exeout;
+  $exein =~ s/$G_opts{target}/exe/;
+  $exeout =~ s/$G_opts{target}/exe/;
+}
+
+# find the data section
+open( SECTS, "$G_opts{objdump} -h $exein |" )
+  or die "Cannot extract section information: $!\n";
+while(<SECTS>) {
+  if( /^\s*\d+\s+\.data\s+\S+\s+(\S+)\s+(\S+)\s+(\S+)/ ) {
+    $segment_vma = hex $1;
+    $segment_lma = hex $2;
+    $segment_off = hex $3;
+    last;
+  }
+}
+close(SECTS);
+warn "Could not find data section in $exein, aborting.\n"
+  unless defined $segment_vma && defined $segment_lma && defined $segment_off;
+
+# build a hash of all data segment symbols to their address and size
+my %exe_symbols = ();
+open( SYMBOL, "$G_opts{objdump} -t $exein |" )
+  or die "Cannot extract symbol information: $!\n";
+while(<SYMBOL>) {
+  if( /^(\S+)\s+\S+\s+\S+\s+\.data\s+(\S+)\s+(\S+)\s*$/ ) {
+    $exe_symbols{$3} = { addr => hex($1), size => hex($2) };
+  }
+}
+close(SYMBOL);
+
+# slurp the input exe
+open (FILE_IN, "<$exein") or die "Could not open $exein: $!\n";
+binmode FILE_IN;
+my $exe = join("",<FILE_IN>);
+close( FILE_IN );
+
+if( $G_opts{readdata} ) {
+
+  my %nums = ( 1 => 'C', 2 => 'v', 4 => 'V' );
+  %user_symbols = %exe_symbols unless %user_symbols;
+
+  my $maxlen = 0;
+  for (keys %user_symbols) { $maxlen = length if length > $maxlen; }
+
+  for my $symbol (sort keys %user_symbols) {
+
+    if( defined $exe_symbols{$symbol} ) {
+
+      my $addr = $exe_symbols{$symbol}->{addr};
+      my $size = $exe_symbols{$symbol}->{size};
+      my $filepos = $segment_off + ($addr - $segment_vma);
+      my $value = substr( $exe, $filepos, $size );
+
+      (my $valbytes = $value) =~ s/(.)/sprintf('%02x ',ord $1)/eg;
+      $valbytes =~ s/\s+$//;
+      (my $valstr = $value) =~ s/[^\040-\200]/./g;
+      (my $symstr = $symbol) =~ s/\$/./g;
+      my $numstr = "";
+      if( $nums{length($value)} ) {
+	$numstr = sprintf( '  (%d)', unpack($nums{length($value)},$value) );
+      }
+
+      print sprintf("%-${maxlen}s  :  %s  %s\n", $symstr, $valbytes, "[$valstr]$numstr" );
+
+    } else {
+      warn "Could not find symbol $symbol in $exein, ignoring symbol.\n";
+    }
+  }
+
+} else {
+
+  # change the desired symbols at their file offsets
+  for my $symbol (sort keys %user_symbols) {
+    my $value = $user_symbols{$symbol};
+    if( defined $exe_symbols{$symbol} ) {
+      my $addr = $exe_symbols{$symbol}->{addr};
+      my $size = $exe_symbols{$symbol}->{size};
+      my $filepos = $segment_off + ($addr - $segment_vma);
+      my $bytes = substr( pack("V", $value) . ("\000" x $size), 0, $size );
+      substr( $exe, $filepos, $size ) = $bytes;
+    } else {
+      warn "Could not find symbol $symbol in $exein, ignoring symbol.\n";
+    }
+  }
+
+  # barf the output exe
+  open (FILE_OUT, ">$exeout") or die "Could not open $exeout: $!\n";
+  binmode FILE_OUT;
+  print FILE_OUT $exe;
+  close( FILE_OUT );
+
+  # if in compatability mode, convert the output exe to the output srec
+  if( $G_opts{compat} ) {
+    my $cmd = "$G_opts{objcopy} --output-target=$G_opts{target} $exeout $srecout";
+    system( $cmd ) == 0 or die "Command \"$cmd\" failed";
+  }
+
+}
+
diff --git a/tools/tinyos/misc/tos-storage-at45db.1 b/tools/tinyos/misc/tos-storage-at45db.1
new file mode 100644
index 00000000..22af233e
--- /dev/null
+++ b/tools/tinyos/misc/tos-storage-at45db.1
@@ -0,0 +1,34 @@
+.TH tos-storage-at45db 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-storage-at45db - Generate storage volume description code
+.SH SYNOPSIS
+
+\fBtos-storage-at45db\fR [\fB-t\fR] [\fB-s\fR <sector size>] [\fB-f\fR <flash size in sectors>] \fIplatform-directory\fR
+.SH DESCRIPTION
+
+\fBtos-storage-at45db\fR reads a user specification describing the layout
+of storage volumes on an Atmel AT45DB-family flash chip, and generates code
+describing that layout for use by the TinyOS 2.0 storage subsystem.  The
+user specification is in XML and is read from standard input. With all options,
+the code for a header file is written to standard output.  With the 
+optional \fB-t\fR flag specified, a VolumeMapC.nc file is generated that provides 
+interfaces to all the storage volume abstractions defined in the XML file.
+The optional \fB-s\fR flag specifies the sector size on the flash, the default is 256.
+The optional \fB-f\fR flag specifies the total number of sectors on the flash, the default is 2048.
+
+The mandatory \fIplatform-directory\fR argument should specify the platform 
+directory for the current compilation target; this is necessary for the correct 
+handling of file include statements in the XML input.
+
+This program is normally invoked automatically by the TinyOS build system
+when your application directory contains a \fBvolumes-at45db.xml\fR file.
+.SH EXAMPLES
+
+  tos-storage-at45db -t /opt/tinyos-2.x/tos/platforms/mica2 \\
+      <volumes-at45db.xml >build/mica2/StorageVolumes.h
+.SH SEE ALSO
+
+.IR tos-storage-stm25p (1) 
+.IR tos-storage-pxa27xp30 (1)
diff --git a/tools/tinyos/misc/tos-storage-at45db.in b/tools/tinyos/misc/tos-storage-at45db.in
new file mode 100644
index 00000000..614c4107
--- /dev/null
+++ b/tools/tinyos/misc/tos-storage-at45db.in
@@ -0,0 +1,270 @@
+#!@pathpython@
+# Copyright (c) 2006-2007 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+from xml.dom import *
+from xml.dom.minidom import *
+from re import match
+from sys import *
+from subprocess import Popen, PIPE
+
+from getopt import *
+import string
+import commands
+#New way of handling arguments........
+try:
+  opts, args = getopt(argv[1:], "ts:f:", [])
+except GetoptError, err:
+  print str(err) # will print something like "option -a not recognized"
+  stderr.write("Usage: tos-storage-at45db [-t] [-s <sector size>] [-f <flash size in sectors>] <platform directory>\n")
+  
+sector_size = 256
+flash_size = 2048 # in sectors
+
+cthreads = False
+for o, a in opts:
+  if o == "-t":
+    cthreads = True
+  elif o == "-s":
+    sector_size = int(a)
+  elif o == "-f":
+    flash_size = int(a)
+  else:
+    assert False, "unhandled option"
+
+if len( args ) == 1:
+  platformdir = args[0]
+  # This gives the whole string when there's no / in platformdir
+  platform = platformdir[platformdir.rfind( "/" ) + 1:]
+elif len( args ) == 0:
+  platformdir = ""
+  platform = ""
+else:
+  stderr.write("Usage: tos-storage-at45db [-t] <platform directory>\n")
+
+# print an error message and exit
+def nfail(s):
+  stderr.write(s + "\n")
+  exit(2)
+
+volumes = {}
+volmap = []
+volumeNames = []
+volumeTypes = dict()
+volumeOptions = dict()
+
+def check_volume(name, base, size):
+  if base == "":
+    base = None
+  else:
+    try:
+      base = int(base)
+    except ValueError:
+      nfail("invalid base for volume %s" % name)
+    if (base & (sector_size - 1)) != 0:
+      nfail("base of volume %s is not a multiple of %d" % (name, sector_size))
+    base /= sector_size
+
+  try:
+    size = int(size)
+  except ValueError:
+    nfail("invalid size for volume %s" % name)
+  if (size & (sector_size - 1)) != 0:
+    nfail("size of volume %s is not a multiple of %d" % (name, sector_size))
+  size /= sector_size
+
+  name = name.upper()
+  if volumes.has_key(name):
+    nfail("duplicate definition of volume %s" % name)
+  if not match("^[a-zA-Z0-9_]+$", name):
+    nfail("invalid volume name %s" % name)
+  volumes[name] = (base, size)
+
+def allocate_at(name, base, size):
+  # check for overlap of existing allocations
+  for (vname, vbase, vsize) in volmap:
+    if base in range(vbase, vbase + vsize) or base + size - 1 in range(vbase, vbase + vsize) or vbase in range(base, base + size) or vbase + vsize - 1 in range(base, base + size):
+      nfail("volume %s overlaps volume %s" % (name, vname))
+
+  # insert at correct position
+  for i in range(len(volmap)):
+    if base < volmap[i][1]:
+      volmap.insert(i, (name, base, size))
+      return
+
+  # it's the last volume...
+  volmap.append((name, base, size))
+
+def allocate(name, size):
+  # We just do first fit. We could spend endless effort doing better.
+  base = 0
+  for i in range(len(volmap)):
+    (vname, vbase, vsize) = volmap[i]
+    if base < vbase and size <= vbase - base:
+      volmap.insert(i, (name, base, size))
+      return
+    base = vbase + vsize
+  volmap.append((name, base, size))
+
+def expand_path(path):
+  substrs = path.split("%")
+  path = substrs[0]
+  i = 1
+  while i < len(substrs):
+    if substrs[i] == "":
+      # There was a %%, leading to a blank substring, and the next string
+      # should just be appended
+      path += "%"
+      i = i + 1
+      if i < len(substrs):
+        path += substrs[i]
+    else:
+      # The first character of the string is the one that followed %
+      c = substrs[i][0]
+      if c == 'p':
+        sub = platform
+      elif c == 'P':
+        sub = platformdir
+      elif c == 'T':
+        sub = Popen(["ncc", "-print-tosdir"], stdout=PIPE).communicate()[0]
+        sub = sub[:-1] # remove newline
+      else:
+        nfail("unknown include-path substitution character " + c)
+      path += sub
+      path += substrs[i][1:]
+    i = i + 1
+  return path
+
+def volumeparse(file, fname, depth):
+  if depth > 10:
+    nfail("include nesting too deep - check for cycles")
+  try:
+    dom = parse(file)
+  except xml.parsers.expat.ExpatError:
+    nfail(fname + " is not a valid input file")
+  except IOError:
+    nfail("couldn't open file " + fname)
+
+  for volume in dom.documentElement.getElementsByTagName("volume"):
+    name = volume.getAttribute("name")
+    size = volume.getAttribute("size")
+    base = volume.getAttribute("base")
+    type = string.lower(volume.getAttribute("type"))
+    isCircular = string.upper(volume.getAttribute("circular"))
+    if isCircular == "":
+      isCircular = "FALSE"
+    if name == None:
+      nfail("name omitted in volume " + fname)
+    if size == None:
+      nfail("size omitted in volume %s %s" % (name, fname))
+    check_volume(name, base, size)
+    
+    volumeNames.append( "VOLUME_" + name )
+    volumeTypes["VOLUME_" + name] = type
+    volumeOptions["VOLUME_" + name] = isCircular
+    
+  for include in dom.documentElement.getElementsByTagName("include"):
+    included = include.firstChild
+    if included != None and included.nodeType == included.TEXT_NODE:
+      included = expand_path(included.data)
+      volumeparse(included, "(file %s)" % included, depth + 1)
+    else:
+      nfail("invalid include directive " + fname)
+  dom.unlink()
+
+volumeparse(stdin, "(standard input)", 0)
+
+# allocate fixed-address volumes
+for name in volumes.keys():
+  (base, size) = volumes[name]
+  if base != None:
+    allocate_at(name, base, size)
+
+# allocate movable volumes
+for name in volumes.keys():
+  (base, size) = volumes[name]
+  if base == None:
+    allocate(name, size)
+
+if len(volmap) == 0:
+  nfail("no volumes")
+
+(lastname, lastbase, lastsize) = volmap[len(volmap) - 1]
+if lastbase + lastsize > flash_size:
+  nfail("out of space (using %d bytes, have only %d)" %
+        ((lastbase + lastsize) * sector_size, flash_size * sector_size))
+
+# print some code
+print "#ifndef STORAGE_VOLUMES_H"
+print "#define STORAGE_VOLUMES_H"
+print
+print "enum {"
+for (vname, vbase, vsize) in volmap:
+  print "  VOLUME_%s, " % vname
+print "};"
+print
+print "#endif"
+
+print "#if defined(VS)"
+for (vname, vbase, vsize) in volmap:
+  print "VS(VOLUME_%s, %d)" % (vname, vsize)
+print "#undef VS"
+print "#endif"
+
+print "#if defined(VB)"
+for (vname, vbase, vsize) in volmap:
+  print "VB(VOLUME_%s, %d)" % (vname, vbase)
+print "#undef VB"
+print "#endif"
+
+# output nc file for threads
+if cthreads == True:
+  outFile = open(commands.getstatusoutput("pwd")[1] + "/VolumeMapC.nc", "w")
+  outFile.write("#include \"StorageVolumes.h\" \n")
+  outFile.write("\n")
+  outFile.write("configuration VolumeMapC { \n")
+  outFile.write("  provides { \n")
+  outFile.write("    interface BlockRead[uint8_t volume_id]; \n")
+  outFile.write("    interface BlockWrite[uint8_t volume_id]; \n")
+  outFile.write("    interface LogRead[uint8_t volumeId]; \n")
+  outFile.write("    interface LogWrite[uint8_t volumeId]; \n")
+  outFile.write("    interface Mount[uint8_t volumeId]; \n")
+  outFile.write("    interface ConfigStorage[uint8_t volumeId]; \n")
+  outFile.write("  } \n")
+  outFile.write("} \n")
+  outFile.write("\n")
+  outFile.write("implementation { \n")
+  outFile.write("  components VolumeMapP; \n")
+  outFile.write("\n")
+  outFile.write("  BlockRead = VolumeMapP; \n")
+  outFile.write("  BlockWrite = VolumeMapP; \n")
+  outFile.write("  LogRead = VolumeMapP; \n")
+  outFile.write("  LogWrite = VolumeMapP; \n")
+  outFile.write("  Mount = VolumeMapP; \n")
+  outFile.write("  ConfigStorage = VolumeMapP; \n")
+
+  for i in range(len(volumeNames)):
+    if volumeTypes[volumeNames[i]] == "block":
+      outFile.write("\n")
+      outFile.write("  components new BlockStorageC(" + volumeNames[i] + ") as BlockStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  VolumeMapP.SubBlockRead[" + volumeNames[i] + "] -> BlockStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  VolumeMapP.SubBlockWrite[" + volumeNames[i] + "] -> BlockStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("\n")
+      
+    elif volumeTypes[volumeNames[i]] == "log":
+      outFile.write("\n")      
+      outFile.write("  components new LogStorageC(" + volumeNames[i] + ", " + volumeOptions[volumeNames[i]] + ") as LogStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  VolumeMapP.SubLogRead[" + volumeNames[i] + "] -> LogStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  VolumeMapP.SubLogWrite[" + volumeNames[i] + "] -> LogStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("\n")
+
+    elif volumeTypes[volumeNames[i]] == "config":
+      outFile.write("  components new ConfigStorageC(" + volumeNames[i] + ") as ConfigStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  Mount[" + volumeNames[i] + "] = ConfigStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  ConfigStorage[" + volumeNames[i] + "] = ConfigStorageC_" + volumeNames[i] + "; \n")
+  outFile.write("} \n")
diff --git a/tools/tinyos/misc/tos-storage-pxa27xp30.1 b/tools/tinyos/misc/tos-storage-pxa27xp30.1
new file mode 100644
index 00000000..47e42f3c
--- /dev/null
+++ b/tools/tinyos/misc/tos-storage-pxa27xp30.1
@@ -0,0 +1,33 @@
+.TH tos-storage-pxa27xp30 1 "July 26, 2006"
+.LO 1
+.SH NAME
+
+tos-storage-pxa27xp30 - Generate storage volume description code
+.SH SYNOPSIS
+
+\fBtos-storage-pxa27xp30\fR
+.SH DESCRIPTION
+
+\fBtos-storage-pxa27xp30\fR reads a user specification describing the layout of
+storage volumes on an embedded P30 flash in the Intel Xscale PXA27X series
+processor, and generates code describing that layout for use by the TinyOS 2.0
+storage subsystem.  The user specification is in XML and is read from standard
+input. With all options, the code for a header file is written to standard
+output.  With the optional \fB-t\fR flag specified, a VolumeMapC.nc file is
+generated that provides interfaces to all the storage volume abstractions
+defined in the XML file.
+
+The mandatory \fIplatform-directory\fR argument should specify the platform 
+directory for the current compilation target; this is necessary for the correct 
+handling of file include statements in the XML input.
+
+This program is normally invoked automatically by the TinyOS build system
+when your application directory contains a \fBvolumes-pxa27xp30.xml\fR file.
+.SH EXAMPLES
+
+  tos-storage-pxa27xp30 -t /opt/tinyos-2.x/tos/platforms/intelmote2 \\
+      <volumes-pxa27xp30.xml >build/telosb/StorageVolumes.h
+.SH SEE ALSO
+
+.IR tos-storage-stm25p (1) 
+.IR tos-storage-at45db (1) 
\ No newline at end of file
diff --git a/tools/tinyos/misc/tos-storage-pxa27xp30.in b/tools/tinyos/misc/tos-storage-pxa27xp30.in
new file mode 100755
index 00000000..862afb64
--- /dev/null
+++ b/tools/tinyos/misc/tos-storage-pxa27xp30.in
@@ -0,0 +1,237 @@
+#!@pathpython@
+# -*- python -*-
+# Copyright (c) 2005-2006 Arch Rock Corporation
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of the Arch Rock Corporation nor the names of
+#   its contributors may be used to endorse or promote products derived
+#   from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+# ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE
+#
+# @author Jonathan Hui <jhui@archedrock.com>
+# @author Kaisen Lin
+#
+# $Revision: 1.7 $
+# $Date: 2009-10-28 04:19:20 $
+#
+                                  
+from re import match
+from sys import *
+from xml.dom import minidom
+
+from getopt import *
+import string
+import commands
+#New way of handling arguments........
+try:
+  opts, args = getopt(argv[1:], "t", [])
+except GetoptError, err:
+  print str(err) # will print something like "option -a not recognized"
+  stderr.write( "Usage: tos-storage-stm25p [-t] <platform directory>\n" )
+  
+if len( args ) == 1:
+  platformdir = args[0]
+  # This gives the whole string when there's no / in platformdir
+  platform = platformdir[platformdir.rfind( "/" ) + 1:]
+elif len( args ) == 0:
+  platformdir = ""
+  platform = ""
+else:
+  stderr.write( "Usage: tos-storage-stm25p [-t] <platform directory>\n" )
+  
+cthreads = False
+for o, a in opts:
+  if o == "-t":
+    cthreads = True
+  else:
+    assert False, "unhandled option"
+
+NUM_SECTORS = 16
+SECTOR_SIZE = 2097152
+
+volumes = {}
+
+volumeNames = []
+volumeSizes = []
+volumeOffsets = []
+volumeTypes = dict()
+volumeOptions = dict()
+freeSectors = NUM_SECTORS*[ True ]
+
+def error_exit( s ):
+    stderr.write( "ERROR: " + s + "\n" )
+    exit( 2 )
+
+try:
+    dom = minidom.parse( stdin )
+except xml.parsers.expat.ExpatError:
+    error_exit( "input invalid" )
+
+# initialize reserved piece
+volumes [ "PXARESERVED" ] = "blah"
+volumeNames.append( "VOLUME_PXARESERVED" )
+volumeSizes.append( 1 )
+volumeOffsets.append( 0 )
+volumeTypes[ "VOLUME_PXARESERVED" ] = ""
+freeSectors[ 0 ] = False
+
+# extract information
+for volume in dom.documentElement.getElementsByTagName( "volume" ):
+    name = volume.getAttribute( "name" )
+    size = volume.getAttribute( "size" )
+    base = volume.getAttribute( "base" )
+    type = string.lower(volume.getAttribute("type"))
+    isCircular = string.upper(volume.getAttribute("circular"))
+    if isCircular == "":
+      isCircular = "FALSE"
+          
+    if name == "":
+        error_exit( "volume has no name" )
+    elif not match( "^[a-zA-Z0-9_]+$", name ):
+        error_exit( "volume has invalid name '%s'" % name )
+    elif volumes.has_key( name ):
+        error_exit( "duplicate volume definition '%s'" % name )
+    else:
+        volumes[ name ] = "blah"
+    
+    if size == "":
+        error_exit( "volume '%s' has no size" % name )
+    try:
+        size = int( size )
+    except ValueError:
+        error_exit( "volume '%s' has invalid size" % name )
+    if base != "":
+        try:
+            base = int( base )
+        except ValueError:
+            error_exit( "volume '%s' has invalid base" % name )
+
+    if ( size & ( SECTOR_SIZE - 1 ) ) != 0:
+        error_exit( "size of volume '%s' is not a multiple of %d" % \
+                    ( name, SECTOR_SIZE ) )
+    if base != "" and ( base & ( SECTOR_SIZE - 1 ) ) != 0:
+        error_exit( "base of volume '%s' is not a multiple of %d" % \
+                    ( name, SECTOR_SIZE ) )
+
+    volumeNames.append( "VOLUME_" + name )
+    volumeSizes.append( size / SECTOR_SIZE )
+    volumeTypes["VOLUME_" + name] = type
+    volumeOptions["VOLUME_" + name] = isCircular
+      
+    if base == "":
+        volumeOffsets.append( -1 )
+    else:
+        base = base / SECTOR_SIZE
+        volumeOffsets.append( base )
+        for i in range( size / SECTOR_SIZE ):
+            freeSectors[ i + base ] = False
+
+# allocate with first fit policy
+for i in range( len( volumeOffsets ) ):
+    size = volumeSizes[ i ]
+    if volumeOffsets[ i ] == -1:
+        for j in range( NUM_SECTORS ):
+            if freeSectors[ j ]:
+                size -= 1
+                if size == 0:
+                    volumeOffsets[ i ] = j - ( volumeSizes[ i ] - 1 )
+                    break
+            else:
+                size = volumeSizes[ i ]
+        if volumeOffsets[ i ] == -1:
+            raise "Unable to satisfy allocation request."
+        else:
+            for j in range( volumeSizes[ i ] ):
+                freeSectors[ volumeOffsets[ i ] + j ] = False
+
+# output C file
+
+print "#ifndef __STORAGE_VOLUME_H__"
+print "#define __STORAGE_VOLUME_H__"
+print ""
+print "#include \"P30.h\""
+print ""
+
+for i in range( len( volumeNames ) ):
+    print "#define %s %d" % ( volumeNames[ i ], i )
+    print "#define %s %s" % ( volumeNames[ i ] + "_UQ", "unique(\"pxa27xp30.Volume\")" )
+print "#define _V_NUMVOLS_ %d" % ( len( volumeNames ))
+print ""
+        
+print "static const p30_volume_info_t P30_VMAP[ %d ] = {" % \
+      len( volumeNames )
+for i in range( len( volumeNames ) ):
+    print "    { base : %d, size : %d }," % \
+          ( volumeOffsets[ i ], volumeSizes[ i ] )
+print "};"
+
+print ""
+print "#endif"
+
+# output nc file for threads
+if cthreads == True:
+  outFile = open(commands.getstatusoutput("pwd")[1] + "/VolumeMapC.nc", "w")
+  outFile.write("#include \"StorageVolumes.h\" \n")
+  outFile.write("\n")
+  outFile.write("configuration VolumeMapC { \n")
+  outFile.write("  provides { \n")
+  outFile.write("    interface BlockRead[uint8_t volume_id]; \n")
+  outFile.write("    interface BlockWrite[uint8_t volume_id]; \n")
+  outFile.write("    interface LogRead[uint8_t volumeId]; \n")
+  outFile.write("    interface LogWrite[uint8_t volumeId]; \n")
+   outFile.write("    interface Mount[uint8_t volumeId]; \n")
+   outFile.write("    interface ConfigStorage[uint8_t volumeId]; \n")
+  outFile.write("  } \n")
+  outFile.write("} \n")
+  outFile.write("\n")
+  outFile.write("implementation { \n")
+  outFile.write("  components VolumeMapP; \n")
+  outFile.write("\n")
+  outFile.write("  BlockRead = VolumeMapP; \n")
+  outFile.write("  BlockWrite = VolumeMapP; \n")
+  outFile.write("  LogRead = VolumeMapP; \n")
+  outFile.write("  LogWrite = VolumeMapP; \n")
+  outFile.write("  Mount = VolumeMapP; \n")
+  outFile.write("  ConfigStorage = VolumeMapP; \n")
+
+  for i in range(len(volumeNames)):
+    if volumeTypes[volumeNames[i]] == "block":
+      outFile.write("\n")
+      outFile.write("  components new BlockStorageC(" + volumeNames[i] + ") as BlockStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  VolumeMapP.SubBlockRead[" + volumeNames[i] + "] -> BlockStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  VolumeMapP.SubBlockWrite[" + volumeNames[i] + "] -> BlockStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("\n")
+      
+    elif volumeTypes[volumeNames[i]] == "log":
+      outFile.write("\n")      
+      outFile.write("  components new LogStorageC(" + volumeNames[i] + ", " + volumeOptions[volumeNames[i]] + ") as LogStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  VolumeMapP.SubLogRead[" + volumeNames[i] + "] -> LogStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  VolumeMapP.SubLogWrite[" + volumeNames[i] + "] -> LogStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("\n")
+
+     elif volumeTypes[volumeNames[i]] == "config":
+       outFile.write("  components new ConfigStorageC(" + volumeNames[i] + ") as ConfigStorageC_" + volumeNames[i] + "; \n")
+       outFile.write("  Mount[" + volumeNames[i] + "] = ConfigStorageC_" + volumeNames[i] + "; \n")
+       outFile.write("  ConfigStorage[" + volumeNames[i] + "] = ConfigStorageC_" + volumeNames[i] + "; \n")
+  outFile.write("} \n")
diff --git a/tools/tinyos/misc/tos-storage-stm25p.1 b/tools/tinyos/misc/tos-storage-stm25p.1
new file mode 100644
index 00000000..a7f04a0c
--- /dev/null
+++ b/tools/tinyos/misc/tos-storage-stm25p.1
@@ -0,0 +1,32 @@
+.TH tos-storage-stm25p 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-storage-stm25p - Generate storage volume description code
+.SH SYNOPSIS
+
+\fBtos-storage-stm25p\fR \fIplatform-directory\fR
+.SH DESCRIPTION
+
+\fBtos-storage-stm25p\fR reads a user specification describing the layout
+of storage volumes on an ST M25P80 flash chip, and generates code
+describing that layout for use by the TinyOS 2.0 storage subsystem.  The
+user specification is in XML and is read from standard input. With all options,
+the code for a header file is written to standard output.  With the 
+optional \fB-t\fR flag specified, a VolumeMapC.nc file is generated that provides 
+interfaces to all the storage volume abstractions defined in the XML file.
+
+The mandatory \fIplatform-directory\fR argument should specify the platform 
+directory for the current compilation target; this is necessary for the correct 
+handling of file include statements in the XML input.
+
+This program is normally invoked automatically by the TinyOS build system
+when your application directory contains a \fBvolumes-stm25p.xml\fR file.
+.SH EXAMPLES
+
+  tos-storage-stm25p -t /opt/tinyos-2.x/tos/platforms/telosb \\
+      <volumes-stm25p.xml >build/telosb/StorageVolumes.h
+.SH SEE ALSO
+
+.IR tos-storage-pxa27xp30 (1)
+.IR tos-storage-at45db (1) 
diff --git a/tools/tinyos/misc/tos-storage-stm25p.in b/tools/tinyos/misc/tos-storage-stm25p.in
new file mode 100644
index 00000000..e552743b
--- /dev/null
+++ b/tools/tinyos/misc/tos-storage-stm25p.in
@@ -0,0 +1,284 @@
+#!@pathpython@
+# -*- python -*-
+# Copyright (c) 2005-2006 Arched Rock Corporation
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of the Arched Rock Corporation nor the names of
+#   its contributors may be used to endorse or promote products derived
+#   from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+# ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE
+#
+# Copyright (c) 2006-2007 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# @author Jonathan Hui <jhui@archedrock.com>
+# @author David Gay
+# @author Kevin Klues <klueska@cs.stanford.edu>
+#
+# $Revision: 1.8 $
+# $Date: 2009-10-28 04:19:20 $
+#
+                                  
+from re import match
+from sys import *
+from xml.dom import *
+from xml.dom.minidom import *
+from subprocess import Popen, PIPE
+
+from getopt import *
+import string
+import commands
+#New way of handling arguments........
+try:
+  opts, args = getopt(argv[1:], "t", [])
+except GetoptError, err:
+  print str(err) # will print something like "option -a not recognized"
+  stderr.write( "Usage: tos-storage-stm25p [-t] <platform directory>\n" )
+  
+if len( args ) == 1:
+  platformdir = args[0]
+  # This gives the whole string when there's no / in platformdir
+  platform = platformdir[platformdir.rfind( "/" ) + 1:]
+elif len( args ) == 0:
+  platformdir = ""
+  platform = ""
+else:
+  stderr.write( "Usage: tos-storage-stm25p [-t] <platform directory>\n" )
+  
+cthreads = False
+for o, a in opts:
+  if o == "-t":
+    cthreads = True
+  else:
+    assert False, "unhandled option"
+
+def error_exit( s ):
+    stderr.write( "ERROR: " + s + "\n" )
+    exit( 2 )
+
+def expand_path( path ):
+  substrs = path.split( "%" )
+  path = substrs[0]
+  i = 1
+  while i < len( substrs ):
+    if substrs[i] == "":
+      # There was a %%, leading to a blank substring, and the next string
+      # should just be appended
+      path += "%"
+      i = i + 1
+      if i < len( substrs ):
+        path += substrs[i]
+    else:
+      # The first character of the string is the one that followed %
+      c = substrs[i][0]
+      if c == 'p':
+        sub = platform
+      elif c == 'P':
+        sub = platformdir
+      elif c == 'T':
+        sub = Popen( ["ncc", "-print-tosdir"], stdout=PIPE ).communicate( )[0]
+        sub = sub[:-1] # remove newline
+      else:
+        nfail( "unknown include-path substitution character " + c )
+      path += sub
+      path += substrs[i][1:]
+    i = i + 1
+  return path
+
+
+NUM_SECTORS = 16
+SECTOR_SIZE = 65536
+
+volumes = {}
+
+volumeNames = []
+volumeSizes = []
+volumeOffsets = []
+volumeTypes = dict()
+volumeOptions = dict()
+freeSectors = NUM_SECTORS*[ True ]
+
+def volumeparse( file, fname, depth ):
+  if depth > 10:
+    error_exit( "include nesting too deep - check for cycles" )
+  try:
+    dom = parse( file )
+  except xml.parsers.expat.ExpatError:
+    error_exit( fname + " is not a valid input file" )
+  except IOError:
+    error_exit( "couldn't open file " + fname )
+
+  # extract information
+  for volume in dom.documentElement.getElementsByTagName( "volume" ):
+      name = volume.getAttribute( "name" )
+      size = volume.getAttribute( "size" )
+      base = volume.getAttribute( "base" )
+      type = string.lower(volume.getAttribute("type"))
+      isCircular = string.upper(volume.getAttribute("circular"))
+      if isCircular == "":
+          isCircular = "FALSE"
+      
+      if name == "":
+          error_exit( "volume has no name" )
+      elif not match( "^[a-zA-Z0-9_]+$", name ):
+          error_exit( "volume has invalid name '%s'" % name )
+      elif volumes.has_key( name ):
+          error_exit( "duplicate volume definition '%s'" % name )
+      else:
+          volumes[ name ] = "blah"
+
+      if size == "":
+          error_exit( "volume '%s' has no size" % name )
+      try:
+          size = int( size )
+      except ValueError:
+          error_exit( "volume '%s' has invalid size" % name )
+      if base != "":
+          try:
+              base = int( base )
+          except ValueError:
+              error_exit( "volume '%s' has invalid base" % name )
+      if ( size & ( SECTOR_SIZE - 1 ) ) != 0:
+          error_exit( "size of volume '%s' is not a multiple of %d" % \
+                      ( name, SECTOR_SIZE ) )
+      if base != "" and ( base & ( SECTOR_SIZE - 1 ) ) != 0:
+          error_exit( "base of volume '%s' is not a multiple of %d" % \
+                      ( name, SECTOR_SIZE ) )
+
+      volumeNames.append( "VOLUME_" + name )
+      volumeSizes.append( size / SECTOR_SIZE )
+      volumeTypes["VOLUME_" + name] = type
+      volumeOptions["VOLUME_" + name] = isCircular
+      
+      if base == "":
+          volumeOffsets.append( -1 )
+      else:
+          base = base / SECTOR_SIZE
+          size = size / SECTOR_SIZE
+          volumeOffsets.append( base )
+          for i in range( size ):
+              freeSectors[ i + base ] = False
+
+  for include in dom.documentElement.getElementsByTagName( "include" ):
+    included = include.firstChild
+    if included != None and included.nodeType == included.TEXT_NODE:
+      included = expand_path( included.data )
+      volumeparse( included, "(file %s)" % included, depth + 1 )
+    else:
+      error_exit( "invalid include directive " + fname )
+  dom.unlink( )
+
+volumeparse( stdin, "(standard input)", 0 )
+
+# allocate with first fit policy
+for i in range( len( volumeOffsets ) ):
+    size = volumeSizes[ i ]
+    if volumeOffsets[ i ] == -1:
+        for j in range( NUM_SECTORS ):
+            if freeSectors[ j ]:
+                size -= 1
+                if size == 0:
+                    volumeOffsets[ i ] = j - ( volumeSizes[ i ] - 1 )
+                    break
+            else:
+                size = volumeSizes[ i ]
+        if volumeOffsets[ i ] == -1:
+            raise "Unable to satisfy allocation request."
+        else:
+            for j in range( volumeSizes[ i ] ):
+                freeSectors[ volumeOffsets[ i ] + j ] = False
+
+# output C file
+
+print "#ifndef __STORAGE_VOLUME_H__"
+print "#define __STORAGE_VOLUME_H__"
+print ""
+print "#include \"Stm25p.h\""
+print ""
+
+for i in range( len( volumeNames ) ):
+    print "#define %s %d" % ( volumeNames[ i ], i )
+print ""
+        
+print "static const stm25p_volume_info_t STM25P_VMAP[ %d ] = {" % \
+      len( volumeNames )
+for i in range( len( volumeNames ) ):
+    print "    { base : %d, size : %d }," % \
+          ( volumeOffsets[ i ], volumeSizes[ i ] )
+print "};"
+
+print ""
+print "#endif"
+
+# output nc file for threads
+if cthreads == True:
+  outFile = open(commands.getstatusoutput("pwd")[1] + "/VolumeMapC.nc", "w")
+  outFile.write("#include \"StorageVolumes.h\" \n")
+  outFile.write("\n")
+  outFile.write("configuration VolumeMapC { \n")
+  outFile.write("  provides { \n")
+  outFile.write("    interface BlockRead[uint8_t volume_id]; \n")
+  outFile.write("    interface BlockWrite[uint8_t volume_id]; \n")
+  outFile.write("    interface LogRead[uint8_t volumeId]; \n")
+  outFile.write("    interface LogWrite[uint8_t volumeId]; \n")
+  outFile.write("    interface Mount[uint8_t volumeId]; \n")
+  outFile.write("    interface ConfigStorage[uint8_t volumeId]; \n")
+  outFile.write("  } \n")
+  outFile.write("} \n")
+  outFile.write("\n")
+  outFile.write("implementation { \n")
+  outFile.write("  components VolumeMapP; \n")
+  outFile.write("\n")
+  outFile.write("  BlockRead = VolumeMapP; \n")
+  outFile.write("  BlockWrite = VolumeMapP; \n")
+  outFile.write("  LogRead = VolumeMapP; \n")
+  outFile.write("  LogWrite = VolumeMapP; \n")
+  outFile.write("  Mount = VolumeMapP; \n")
+  outFile.write("  ConfigStorage = VolumeMapP; \n")
+
+  for i in range(len(volumeNames)):
+    if volumeTypes[volumeNames[i]] == "block":
+      outFile.write("\n")
+      outFile.write("  components new BlockStorageC(" + volumeNames[i] + ") as BlockStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  VolumeMapP.SubBlockRead[" + volumeNames[i] + "] -> BlockStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  VolumeMapP.SubBlockWrite[" + volumeNames[i] + "] -> BlockStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("\n")
+      
+    elif volumeTypes[volumeNames[i]] == "log":
+      outFile.write("\n")      
+      outFile.write("  components new LogStorageC(" + volumeNames[i] + ", " + volumeOptions[volumeNames[i]] + ") as LogStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  VolumeMapP.SubLogRead[" + volumeNames[i] + "] -> LogStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  VolumeMapP.SubLogWrite[" + volumeNames[i] + "] -> LogStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("\n")
+
+    elif volumeTypes[volumeNames[i]] == "config":
+      outFile.write("  components new ConfigStorageC(" + volumeNames[i] + ") as ConfigStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  Mount[" + volumeNames[i] + "] = ConfigStorageC_" + volumeNames[i] + "; \n")
+      outFile.write("  ConfigStorage[" + volumeNames[i] + "] = ConfigStorageC_" + volumeNames[i] + "; \n")
+  outFile.write("} \n")
diff --git a/tools/tinyos/misc/tos-write-buildinfo.in b/tools/tinyos/misc/tos-write-buildinfo.in
new file mode 100644
index 00000000..0fd4bb93
--- /dev/null
+++ b/tools/tinyos/misc/tos-write-buildinfo.in
@@ -0,0 +1,67 @@
+#!@pathperl@ -w
+#
+# This script generates an XML description of the buildinformation. This is 
+# primarily used by other tools such as checkers, tests and continuous 
+# integration.
+#
+#$Id: tos-write-buildinfo.in,v 1.6 2007-09-03 14:02:48 beutel Exp $
+#@author Jan Beutel <j.beutel@ieee.org>
+#
+use strict;
+
+my $MaxNameLength = 10;
+
+if ( @ARGV == 0 ) {
+  print "usage: tos-write-buildinfo [ident_flags] [exe_file]\n";
+  exit 0;
+}
+
+my %ident_flags = ();
+my $exe = "";
+my $size = "avr-size";
+my $platform = "";
+
+for my $arg (@ARGV) {
+  if ($arg =~ /^-DIDENT_(.+)=0x(.+)$/) {
+    $ident_flags{lc($1)} = uc($2);
+  }
+  elsif ($arg =~ /^-DIDENT_(.+)="(.+)"$/) {
+    $ident_flags{lc($1)} = $2;
+  }
+  elsif ($arg =~ /^--exe=(.+)$/) {
+    $exe = $1;
+  }
+  elsif ($arg =~ /^--size=(.+)$/) {
+    $size = $1;
+  }
+  elsif ($arg =~ /^--platform=(.+)$/) {
+    $platform = $1;
+  }
+}
+
+my @text;
+my $rc2 = qx"$size $exe |grep main ";
+#print $rc2;
+#print $size;
+@text =  split(' ', $rc2);
+
+print "<metrics>\n";
+print "  <ram>";
+print $text[1];
+print "</ram>\n";
+print "  <$platform-ram>";
+print $text[1];
+print "</$platform-ram>\n";
+print "  <flash>";
+print $text[0];
+print "</flash>\n";
+print "  <$platform-flash>";
+print $text[0];
+print "</$platform-flash>\n";
+print "  <stack>";
+print $text[2];
+print "</stack>\n";
+print "  <$platform-stack>";
+print $text[2];
+print "</$platform-stack>\n";
+print "</metrics>\n";
diff --git a/tools/tinyos/misc/tos-write-image.1 b/tools/tinyos/misc/tos-write-image.1
new file mode 100644
index 00000000..c1894ef3
--- /dev/null
+++ b/tools/tinyos/misc/tos-write-image.1
@@ -0,0 +1,20 @@
+.TH tos-write-image 1 "Feb 3, 2006"
+.LO 1
+.SH NAME
+
+tos-write-image - Generate executable description for Deluge
+.SH SYNOPSIS
+
+\fBtos-write-image\fR [\fB-DIDENT_\fIname\fB=\fIvalue\fR...] [\fB--objdump=\fIobjdump\fR]
+                \fB--exe=\fIexefile\fR \fB--ihex=\fIhexfile\fR
+.SH DESCRIPTION
+
+\fBtos-write-image\fR writes an XML description of an executable file to
+standard output, based on the contents of a compiled file and the
+identifying options generated by \fBtos-ident-flags\fR.
+
+\fBtos-write-image\fR is normally invoked by the TinyOS build system. See
+the Deluge documentation for more details.
+.SH SEE ALSO
+
+.IR tos-ident-flags (1)
diff --git a/tools/tinyos/misc/tos-write-image.in b/tools/tinyos/misc/tos-write-image.in
new file mode 100644
index 00000000..2d3f9ad1
--- /dev/null
+++ b/tools/tinyos/misc/tos-write-image.in
@@ -0,0 +1,73 @@
+#!@pathperl@ -w
+#
+# This script generates an ihex binary image and XML description
+# from an srec binary image. These are used by the Deluge binary
+# image dissemination service.
+#
+#$Id: tos-write-image.in,v 1.5 2007-04-27 05:01:25 prabal Exp $
+#@author Jonathan Hui <jwhui@cs.berkeley.edu>
+#
+use strict;
+
+my $MaxNameLength = 10;
+
+if ( @ARGV == 0 ) {
+  print "usage: tos-write-image [ident_flags] [exe_file]\n";
+  exit 0;
+}
+
+my %ident_flags = ();
+my $exe = "";
+my $ihex = "";
+my $objdump = "avr-objdump";
+my $platform = "";
+
+for my $arg (@ARGV) {
+  if ($arg =~ /^-DIDENT_(.+)=0x(.+)$/) {
+    $ident_flags{lc($1)} = uc($2);
+  }
+  elsif ($arg =~ /^-DIDENT_(.+)="(.+)"$/) {
+    $ident_flags{lc($1)} = $2;
+  }
+  elsif ($arg =~ /^--ihex=(.+)$/) {
+    $ihex = $1;
+  }
+  elsif ($arg =~ /^--exe=(.+)$/) {
+    $exe = $1;
+  }
+  elsif ($arg =~ /^--objdump=(.+)$/) {
+    $objdump = $1;
+  }
+  elsif ($arg =~ /^--platform=(.+)$/) {
+    $platform = $1;
+  }
+}
+
+my $deluge_support = "no";
+# See if app has deluge included
+open( EXE, "$objdump -t $exe |") or die "Cannot open exe file: $!\n";
+while(<EXE>) {
+  if ( /Deluge/ ) {
+    $deluge_support = "yes";
+  }
+}
+close(EXE);
+$ident_flags{"deluge_support"} = $deluge_support;
+$ident_flags{"platform"} = $platform;
+
+open ( IHEX, $ihex ) or die "Cannot open ihex file: $!\n";
+
+print "<tos_image>\n";
+print "  <ident>\n";
+for my $flag (keys %ident_flags) {
+  print "    <$flag>$ident_flags{$flag}</$flag>\n";
+}
+print "  </ident>\n";
+print "  <image format=\"ihex\">\n";
+
+while ( my $line = <IHEX> ) {
+  print $line;
+}
+
+print "  </image>\n";
+print "</tos_image>\n";
diff --git a/tools/tinyos/ncc/.cvsignore b/tools/tinyos/ncc/.cvsignore
new file mode 100644
index 00000000..9f7e8b9e
--- /dev/null
+++ b/tools/tinyos/ncc/.cvsignore
@@ -0,0 +1,6 @@
+Makefile
+Makefile.in
+mig
+ncc
+ncg
+nesdoc
diff --git a/tools/tinyos/ncc/Makefile.am b/tools/tinyos/ncc/Makefile.am
new file mode 100644
index 00000000..38a27c75
--- /dev/null
+++ b/tools/tinyos/ncc/Makefile.am
@@ -0,0 +1,15 @@
+# Copyright (c) 2002-2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+AUTOMAKE_OPTIONS = foreign
+
+SUBDIRS = nesdoc-py
+
+dist_man_MANS = mig.1 ncc.1 ncg.1 nesdoc.1
+
+bin_SCRIPTS = mig ncg ncc nesdoc
diff --git a/tools/tinyos/ncc/mig.1 b/tools/tinyos/ncc/mig.1
new file mode 100644
index 00000000..4bf8d848
--- /dev/null
+++ b/tools/tinyos/ncc/mig.1
@@ -0,0 +1,30 @@
+.TH mig 1 "April 27, 2004"
+.LO 1
+.SH NAME
+
+mig - message interface generator for TinyOS
+.SH SYNOPSIS
+
+\fBmig\fR [any ncc option] [tool-specific options]
+    [\fB-o\fR \fIoutput-file\fR]
+    \fItool\fR \fImsg-format-file\fR \fImessage-type\fR
+.SH DESCRIPTION
+
+\fBmig\fR is a tool to generate code to process TinyOS messages (which
+are specified by C types). 
+
+\fBmig \fIoptions\fR is equivalent to \fBnescc-mig -nescc=ncc
+\fIoptions\fR. For details on \fBmig\fR's output and options, please read
+see the \fBnescc-mig\fR man page.
+
+.SH EXAMPLE
+
+    APPDIR=`ncc -print-tosdir`/../apps/Ident
+    mig java -I $APPDIR -target=mica2 \\
+      -java-classname=net.tinyos.ident.IdentMsg \\
+      $APPDIR/App.nc IdentMsg -o IdentMsg.java
+.SH SEE ALSO
+
+.IR ncc (1),
+.IR nescc-mig (1),
+.IR ncg (1)
diff --git a/tools/tinyos/ncc/mig.in b/tools/tinyos/ncc/mig.in
new file mode 100644
index 00000000..3dc87127
--- /dev/null
+++ b/tools/tinyos/ncc/mig.in
@@ -0,0 +1,16 @@
+#!/bin/sh
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+
+prefix="@prefix@";
+exec_prefix="@exec_prefix@";
+exec "@nescc_prefix@/bin/nescc-mig" "-nescc=$exec_prefix/bin/ncc" "$@"
+err=$?
+echo "Couldn't execute @nescc_prefix@/bin/nescc-mig" >&2
+exit $err
diff --git a/tools/tinyos/ncc/ncc.1 b/tools/tinyos/ncc/ncc.1
new file mode 100644
index 00000000..5655b318
--- /dev/null
+++ b/tools/tinyos/ncc/ncc.1
@@ -0,0 +1,171 @@
+.TH ncc 1 "April 27, 2004"
+.LO 1
+.SH NAME
+ncc - nesC compiler for TinyOS
+.SH SYNOPSIS
+
+\fBncc\fR [\fB-target=\fIpc|mica|mica2|mica2dot|...\fR] [\fB-tossim\fR]
+    [\fB-board=\fImicasb|basicsb|micawb|...\fR]
+    [\fB-tosdir=\fIdir\fR] [\fB-tosscheduler=...\fR] [\fB-nostdinc\fR]
+    [\fB--version\fR] [\fB-print-tosdir\fR] [\fB-print-platforms\fR] [\fB-print-target\fR]
+    [any nescc option] [any gcc option] \fIfiles\fR...
+.SH DESCRIPTION
+
+\fBncc\fR is an extension to \fBnescc\fR that knows how to compile nesC
+applications for a TinyOS environment. If invoked on regular C files, it
+behaves like \fBgcc\fR. When invoked on a nesC component or
+interface (\fB.nc\fR extension) file it compiles and links (except if the
+usual \fB-c\fR, \fB-S\fR, \fB-E\fR or \fB-fsyntax-only\fR options are used)
+that component with the other files specified on the command line.
+
+\fBncc\fR just invokes \fBnescc\fR with extra options based on the 
+selected platform and sensorboard(s). And \fBnescc\fR itself just
+invokes \fBgcc\fR. Thus, for a full understanding of possible \fBncc\fR
+options you should read the \fBnescc\fR and \fBgcc\fR man pages.
+.SH OPTIONS
+
+\fBncc\fR accepts all \fBgcc\fR and \fBnescc\fR options, and some additional 
+TinyOS specific options:
+.TP
+\fB-target=\fIX\fR 
+Specify the target architecture for this compilation. If \fB-tossim\fR is
+also specified, the compilation uses the tossim environment and produces a
+locally executable file. The default target is specified in the
+\fB.default-platform\fR file in your TinyOS directory (see \fB-tosdir\fR
+option), and defaults to \fBmica\fR if that file is absent. A platform that 
+is not in the TinyOS distribution can be used
+if its directory is specified with an explicit -I directive (the platform
+name is taken from the directory's name, platform directories are
+recognised by the presence of a \fB.platform\fR file).
+.TP
+\fB-tosdir=\fIdir\fR 
+Specify the location of TinyOS. This location can also be specified with
+the \fBTOSDIR\fR environment variable. If the variable and the option are both
+given, \fBncc\fR uses the value specified with the option. If neither the
+environment variable or option are specified, ncc uses its compiled-in
+TinyOS directory.
+.TP
+\fB-tosscheduler=\fIcomponent,unique-string,interface-name,interface-definition,run-event,post-command\fR 
+By  default,  nesC  compiles uses of \fBtask void\fR \fItaskname\fR\fB() ...\fR to \fBvoid\fR 
+\fItaskname\fR\fB()\fR, 
+and \fBpost\fR \fItaskname\fR\fB()\fR to \fBTOS_post\fR\fB(\fR\fItaskname\fR\fB)\fR.
+.IP
+With this option, each task gets  its  own  \fIinterface-definition\fR interface, 
+the task implementation is transformed into a \fIrun-event event\fR and posts becomes a 
+call to the \fIpost-command\fR  command.  This per-task interface is automatically 
+connected to the parameterised \fIinterface-name\fR interface of scheduler 
+\fIcomponent\fR component.  The parameter id for the connection is chosen with 
+\fBunique\fR("\fIunique-string\fR").
+.IP
+If this option is not set explicity, its parameters are assigned by default as follows:
+.IP
+-tosscheduler=\fITinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask\fR
+.TP
+\fB-tossim\fR
+Compile for the TOSSIM environment rather than a native platform. Every
+directory in the search path will be duplicated, with the first copy having
+\fB/sim\fR appended to it.
+.TP
+\fB-print-tosdir\fR
+Print the TinyOS directory to be used and exit, taking into account the
+\fB-tosdir\fR option and \fBTOSDIR\fR environment variable. No compilation
+occurs when \fB-print-tosdir\fR is used.
+.TP
+\fB-print-platforms\fR
+Print the valid TinyOS platforms, including those made available by
+explicit \fB-I\fR directives (see \fB-target\fR option).
+.TP
+\fB-print-target\fR
+Print the name of the selected target. Most useful when \fB-target\fR is not
+specified.
+.TP
+\fB-nostdinc\fR
+Do not automatically include the TinyOS directories in the search path. See
+the discussion of search paths below for more details.
+.TP
+\fB-board=\fIY\fR
+Specify one (or more) sensor boards. This effects the search path and
+preprocessor symbols. The set of boards is set by the TinyOS distribution
+(see the \fBtos/sensorboards\fR directory). As with targets, a sensorboard
+directory can be made available via an explicit \fB-I\fR directive
+(sensorboard directories are recognised by the presence of a \fB.sensor\fR
+file).
+.TP
+\fB--version\fR
+Print the version of \fBncc\fR, \fBnescc\fR and of the gcc compiler
+used for the selected target.
+.SH EXAMPLES
+
+If you wish to compile a component Bar.nc to a C file, you can do:
+.IP
+ncc -c -o /dev/null -fnesc-cfile=Bar.c Bar.nc
+.SH SEARCH PATH
+
+\fBncc\fR performs the following substitutions on the directories
+specified with the \fB-I\fR option: \fB%T\fR is replaced by the TinyOS
+directory, \fB%p\fR is replaced by the selected target, \fB%P\fR is
+replaced by the target's platform directory, \fB%%\fR is replaced by
+\fB%\fR.
+
+Except when \fB-nostdinc\fR is specified, the search path for nesC
+components is as follows, where \fItosdir\fR is the TinyOS directory
+requested and \fItarget\fR is the selected target:
+.IP *
+The current directory
+.IP *
+\fB-I\fR directives (in option order)
+.IP *
+%T/sensorboards/\fIboardname\fR, for each
+\fB-board=\fIboardname\fR option specified (in option order) -
+except if the sensorboard was found via an explicit -I directive
+.IP *
+%T/platform/%p  - except if the platform was found via an
+explicit -I directive
+.IP *
+Additional directories requested by the selected target (e.g.,
+%T/platform/avrmote for the mica target)
+.IP *
+%T/interfaces
+.IP *
+%T/system
+.IP *
+%T/lib
+.IP *
+\fBNESCPATH\fR environment variable directories (note that %T and %p
+subsitution is not performed on these directories).
+.PP
+When \fB-nostdinc\fR is specified, the search path is simply:
+.IP *
+The current directory
+.IP *
+\fB-I\fR directives
+.IP *
+\fBNESCPATH\fR environment variable directories
+.SH PREPROCESSOR SYMBOLS
+
+In addition to the preprocessor symbols defined by \fBgcc\fR and
+\fBnescc\fR, \fBncc\fR defines:
+.TP
+\fBPLATFORM_\fItarget\fR 
+where \fItarget\fR is the selected target name, converted to upper case
+.TP
+\fBBOARD_\fIboardname\fR 
+for each \fB-board=\fIboardname\fR option (the
+boardname is converted to upper case)
+.SH ENVIRONMENT VARIABLES
+
+.TP
+.B TOSDIR
+If the \fB-tosdir=\fIdir\fR option is not used, the \fBTOSDIR\fR
+environment variable specifies the location of TinyOS.
+.SH SEE ALSO
+
+.IR gcc (1),
+platform-specific gcc,
+.IR nescc (1)
+.SH NOTES
+
+\fBncc\fR is built over \fBnescc\fR, which handles the non-TinyOS-specific
+functionality of \fBncc\fR. Users of nesC in a non-TinyOS context may
+prefer to use \fBnescc\fR (see the source code of ncc and nescc for
+details).
diff --git a/tools/tinyos/ncc/ncc.in b/tools/tinyos/ncc/ncc.in
new file mode 100644
index 00000000..2f1b5b99
--- /dev/null
+++ b/tools/tinyos/ncc/ncc.in
@@ -0,0 +1,335 @@
+#!@pathperl@
+# -*- perl -*-
+
+# Copyright (c) 2002-2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Configuration
+$TOSDIR = "@TOSDIR@";
+$TOSDIR = $ENV{"TOSDIR"} if defined($ENV{"TOSDIR"});
+$nescc = "@nescc_prefix@/bin/nescc";
+$tossim = 0;
+$is_tos_1 = 0;
+$with_scheduler_flag = 1;
+
+# Support platform directory renaming for 2.x
+if (-d "$TOSDIR/platform") {
+    $platform = "platform";
+    $is_tos_1 = 1;
+}
+else {
+    $platform = "platforms";
+}
+
+my $exeflag=0;
+my $libs = "";
+
+# Have fun with the arguments
+
+for ($i = 0; $i <= $#ARGV; $i++) {
+    $strip = 0;
+    $_ = $ARGV[$i];
+    if (/^-/) {
+	if (/^-target=(.*)/) {
+	    &fail("multiple targets specified") if defined($target);
+	    $target = $1;
+	    $strip = 1;
+	}
+	elsif (/^-tosdir=(.*)/) {
+	    $TOSDIR = $1;
+	    $strip = 1;
+	}
+	elsif (/^-tosscheduler=(.*)/) {
+	    $scheduler = $1;
+	    $strip = 1;
+	}
+	elsif (/^-nostdinc$/) {
+	    $nostdinc = 1;
+	}
+	elsif (/^-board=(.*)/) {
+	    push @boards, $1;
+	    $strip = 1;
+	}
+	elsif (/^-print-tosdir$/) {
+	    $print_tosdir = 1;
+	    $strip = 1;
+	}
+	elsif (/^-print-target$/) {
+	    $print_target = 1;
+	    $strip = 1;
+	}
+	elsif (/^-print-platforms$/) {
+	    $print_platforms = 1;
+	    $strip = 1;
+	}
+	elsif (/^-g$/) {
+	    $debugging = 1;
+	}
+	elsif (/^-v$/) {
+	    $verbose = 1;
+	}
+	elsif (/^-tossim$/) {
+	    $tossim = 1;
+            $strip = 1;
+	}
+	elsif (/^-I/) {
+	    ($i, $file) = &extractarg($i);
+	    $strip = 1;
+	    push @includes, $file;
+	}
+	elsif (/^-fnesc-cfile=(.*)/){
+	    $appfilename=$1;
+	}
+	elsif (/^-o$/){
+	    $exeflag=1;
+	}
+        elsif (/^-l/) {
+            $libs = $libs . " " . $_;
+        } 
+	elsif (/^--version$/) {
+	    $print_version = 1;
+	}
+    } elsif ($exeflag) {
+	$exefilename =$_;
+	$exeflag=0;
+    }
+
+    push @new_args, $_ if !$strip;
+}
+
+if ($print_version) {
+    print "ncc: @PACKAGE_VERSION@\n";
+}
+
+# Remove trailing / from TOSDIR, if any (it confuses the topdir stuff)
+chop $TOSDIR if $TOSDIR =~ m!./$!;
+
+if ($print_tosdir)
+{
+    print $TOSDIR, "\n";
+    exit 0;
+}
+
+if ($print_platforms)
+{
+    print join(" ", all_platforms()), "\n";
+    exit 0;
+}
+
+if ($tossim) {
+  push @new_args, "-DTOSSIM";
+}
+
+if (!defined $target) {
+    if (open DEFTARGET, "$TOSDIR/.default-platform") {
+	$target = <DEFTARGET>;
+	chomp $target;
+    }
+    else {
+	$target = "@default_target@";
+    }
+}
+
+if (!defined $scheduler && !$is_tos_1) {
+	$scheduler = "TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask";
+}
+
+if ($print_target) {
+    print $target, "\n";
+    exit 0;
+}
+
+# First see if the directory for this platform was explicitly specified
+foreach $dir (@includes) {
+    if ($dir =~ m!/$target/?$! && -f "$dir/.platform") {
+	$platform_def = "$dir/.platform";
+	last;
+    }
+}
+
+if (!-f $platform_def) {
+    # Next, check if it's a "plain" platform
+    if (-f "$TOSDIR/$platform/$target/.platform") {
+	$platform_def = "$TOSDIR/$platform/$target/.platform";
+    }
+    else {
+	# Finally, see if it's in a platform family
+	opendir PLATFORMS, "$TOSDIR/$platform";
+	foreach $dir (readdir PLATFORMS) {
+	    if (-f "$TOSDIR/$platform/$dir/.family") {
+		if (-f "$TOSDIR/$platform/$dir/$target/.platform") {
+		    $platform_def = "$TOSDIR/$platform/$dir/$target/.platform";
+		    $family_def = "$TOSDIR/$platform/$dir/.family";
+		    last;
+		}
+	    }
+	}
+	closedir PLATFORMS;
+    }
+}
+
+# Use sim directory with tossim
+$platform_def =~ s!\.platform$!sim/.platform! if $tossim;
+$family_def =~ s!\.family$!sim/.family! if $tossim && $family_def;
+
+if (!-f $platform_def) {
+    print STDERR "Unknown target $target\n";
+    print STDERR "Known targets for TinyOS directory $TOSDIR\n";
+    print STDERR "and the specified include directories are:\n";
+
+    @platforms = all_platforms();
+    if (@platforms) {
+	print STDERR "  ", join(" ", @platforms);
+    }
+    else {
+	print STDERR "none.";
+    }
+    print STDERR "\n";
+    exit 2;
+}
+
+# Setup sensor boards
+push @includes, map "%T/sensorboards/$_", @boards unless $nostdinc;
+unshift @new_args, map "-DBOARD_\U$_", @boards;
+# Execute .sensor file in selected sensor board directories if it exists
+$i = 0;
+BOARD: while ($i <= $#boards) {
+    $board = $boards[$i];
+
+    # First check include path for a .sensor file for this board
+    foreach $dir (@includes) {
+	if ($dir =~ m!/$board/?$! && -f "$dir/.sensor") {
+	    # Remove from @boards so that we don't add sensorboards/$board
+	    # to the search path
+	    splice @boards, $i, 1;
+	    do "$dir/.sensor";
+	    next BOARD;
+	}
+    }
+
+    # If none found, check the standard sensorboards directory
+    $bspec = &idir_subst("%T/sensorboards/$board/.sensor");
+    do $bspec if -f $bspec;
+
+    $i++;
+}
+
+# Setup platform
+$platform_dir = $platform_def;
+$platform_dir =~ s!/\.platform$!!;
+push @includes, $platform_dir unless $nostdinc;
+do $platform_def;
+do $family_def if -f $family_def;
+unshift @new_args, "-DPLATFORM_\U$target";
+
+push @new_args, @opts;
+if(!$is_tos_1) {
+  unshift @new_args, "-fnesc-scheduler=$scheduler";
+}
+
+# old nesdoc: set the default topdir based on TOSDIR
+my ($tosparent) = ($TOSDIR =~ m!^(.*)/.*?$!);
+unshift @new_args, "-topdir=$tosparent";
+
+unshift @new_args, "-fnesc-include=tos";
+unshift @new_args, "$nescc";
+
+if (!$nostdinc) {
+    push @includes, map "%T/$platform/$_", @commonplatforms;
+    push @includes, "%T/interfaces";
+    push @includes, "%T/types";
+    push @includes, "%T/system";
+}
+
+
+if ($tossim) {
+  foreach $idir (@includes) {
+    $idir = &idir_subst($idir);
+    push @new_args, "-I$idir/sim";
+  }
+  $tossim_dir = &idir_subst("-I%T/lib/tossim");
+  push @new_args, $tossim_dir;
+}
+foreach $idir (@includes) {
+    $idir = &idir_subst($idir);
+    push @new_args, "-I$idir";
+}
+
+
+
+
+print STDERR join(' ', @new_args), "\n" if $verbose;
+exec @new_args;
+print STDERR "Couldn't execute nescc\n";
+exit 2;
+
+sub extractarg {
+    local ($i) = @_;
+
+    if (length($ARGV[$i]) == 2) {
+	$arg = $ARGV[++$i];
+    }
+    else {
+	$arg = substr($ARGV[$i], 2);
+    }
+    return ($i, $arg);
+}
+
+sub idir_subst {
+    local ($idir) = @_;
+    local $idx = 0;
+
+    while (($idx = index $idir, "%", $idx) >= 0) {
+	$char = substr $idir, $idx + 1, 1;
+	$rep = 0;
+	$rep = "%" if $char eq "%";
+	$rep = $TOSDIR if $char eq "T";
+	$rep = $target if $char eq "p";
+	$rep = $platform_dir if $char eq "P";
+	&fail("unknown include-path substitution %" . $char) if !$rep;
+	substr($idir, $idx, 2) = $rep;
+	$idx += length $rep;
+    }
+    return $idir;
+}
+
+sub fail {
+    print STDERR "$_[0]\n";
+    exit 2;
+}
+
+sub push_platform {
+    my ($p) = @_;
+
+    push @platforms, $p unless grep $_ eq $p, @platforms;
+}
+
+sub all_platforms() {
+  local(@platforms);
+
+  foreach $dir (@includes) {
+    push_platform($1) if -f "$dir/.platform" && $dir =~ m!/([^/]*)/?$!;
+  }
+
+  if (opendir PLATFORMS, "$TOSDIR/$platform") {
+      foreach $d (readdir PLATFORMS) {
+	  push_platform($d) if (-f "$TOSDIR/$platform/$d/.platform");
+	  if (-f "$TOSDIR/$platform/$d/.family") {
+	      if (opendir SUBPLATFORMS, "$TOSDIR/$platform/$d") {
+		  foreach $subdir (readdir SUBPLATFORMS) {
+		      push_platform($subdir) if (-f "$TOSDIR/$platform/$d/$subdir/.platform");
+		  }
+	      }
+	      closedir SUBPLATFORMS;
+	  }
+      }
+      closedir PLATFORMS;
+  }
+
+  return @platforms;
+}
diff --git a/tools/tinyos/ncc/ncg.1 b/tools/tinyos/ncc/ncg.1
new file mode 100644
index 00000000..ef2bf896
--- /dev/null
+++ b/tools/tinyos/ncc/ncg.1
@@ -0,0 +1,30 @@
+.TH ncg 1 "April 27, 2004"
+.LO 1
+.SH NAME
+
+ncg - extract constants from TinyOS files
+.SH SYNOPSIS
+
+\fBncg\fR [any ncc option] [tool-specific options]
+    [\fB-o\fR \fIoutput-file\fR]
+    \fItool\fR \fInesC-file\fR \fIfilenames-or-constant-names...\fR
+.SH DESCRIPTION
+
+\fBnescc-ncg\fR is a tool to extract constants from TinyOS files for use with
+other applications. It is typically used in conjunction with
+\fBmig\fR (which generates code to process TinyOS messages) to extract
+constants that are used in particular messages (e.g., constants
+representing various commands).
+
+\fBncg \fIoptions\fR is equivalent to \fBnescc-ncg -nescc=ncc
+\fIoptions\fR. For details on \fBncg\fR's output and options, please read
+see the \fBnescc-ncg\fR man page.
+.SH EXAMPLE
+    APPDIR=`ncc -print-tosdir`/lib/FS<br>
+    ncg -I%T/lib/FS -java-classname=net.tinyos.matchbox.FS \\
+      java $APPDIR/Remote.nc Matchbox.h Remote.h -oFS.java
+.SH SEE ALSO
+
+.IR ncc (1),
+.IR nescc-ncg (1),
+.IR mig (1)
diff --git a/tools/tinyos/ncc/ncg.in b/tools/tinyos/ncc/ncg.in
new file mode 100644
index 00000000..6bcb50d2
--- /dev/null
+++ b/tools/tinyos/ncc/ncg.in
@@ -0,0 +1,16 @@
+#!/bin/sh
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+
+prefix="@prefix@";
+exec_prefix="@exec_prefix@";
+exec "@nescc_prefix@/bin/nescc-ncg" "-nescc=$exec_prefix/bin/ncc" "$@"
+err=$?
+echo "Couldn't execute @nescc_prefix@/bin/nescc-ncg" >&2
+exit $err
diff --git a/tools/tinyos/ncc/nesdoc-py/.cvsignore b/tools/tinyos/ncc/nesdoc-py/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/tinyos/ncc/nesdoc-py/Makefile.am b/tools/tinyos/ncc/nesdoc-py/Makefile.am
new file mode 100644
index 00000000..28e01153
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/Makefile.am
@@ -0,0 +1,23 @@
+# Copyright (c) 2002-2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+AUTOMAKE_OPTIONS = foreign
+
+nesdocdir=$(libdir)/tinyos/nesdoc
+
+nesdoc_DATA = 	__init__.py 	\
+		archive.py	\
+		components.py	\
+		generators.py	\
+		genhtml.py	\
+		graph.py	\
+		html.py		\
+		index.py	\
+		interfaces.py	\
+		utils.py	\
+                nesdoc.css
diff --git a/tools/tinyos/ncc/nesdoc-py/__init__.py b/tools/tinyos/ncc/nesdoc-py/__init__.py
new file mode 100644
index 00000000..e69de29b
diff --git a/tools/tinyos/ncc/nesdoc-py/archive.py b/tools/tinyos/ncc/nesdoc-py/archive.py
new file mode 100644
index 00000000..88fba77e
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/archive.py
@@ -0,0 +1,298 @@
+# -*- python -*-
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Archive nesdoc information from a given compilation in a nesdoc repository.
+#
+# A nesdoc repository is a directory containing separate XML files for each
+# known interface and component (in the "interfaces" and "components"
+# subdirectories respectively). These files have basically the same format
+# as a single interfacedef and component element from the nesC XML dump
+# format, with the following changes:
+#  - all "interfacedef", "interfacedef-ref", "component" and "component-ref"
+#    elements have an extra "nicename" attribute which stores the full
+#    `package name' for the corresponding element (see below for details)
+#  - components have two extra sub-elements:
+#    o "specification": a list of the "interface" and "function"
+#       elements that form the components specification
+#    o "referenced": the "interface" and "function" elements referenced
+#      from the wiring graph
+#      the "component" elements referenced from these "interface" and
+#      "function" elements
+#      (but the "referenced" list excludes self-references, i.e., the
+#      component itself and the "interface" and "function" elements
+#      already found in "specification")
+
+# A `package name' is a component or interface name prefixed with its path
+# relative to a set of "top directories", and with path separators replaced
+# by dots. The root of a TinyOS installation is usually the single top
+# directory, but more can be specified with the -topdir option.
+
+
+from xml.dom import *
+from xml.dom.minidom import *
+from sys import *
+from getopt import getopt
+from string import *
+from nesdoc.utils import *
+from nesdoc.graph import generate_graph
+from nesdoc.html import *
+import os
+
+def check(x):
+  if not x:
+    print "%s is not a nesC documentation file" % argv[1]
+    exit(2)
+  return x
+
+def get1(x, tag):
+  return check(xml_tagfind(x, tag))
+
+def usage():
+  print "Usage: %s [-t dir] [--topdir dir] [--preserve] [--app] [--quiet] repository" % argv[0]
+  print "  where -t/--topdir specify prefixes to remove from file names"
+  print "  to create nice, package-like names for interface and components"
+  print "  (based on their full filename)."
+  print "  If --preserve is specified, existing XML files are preserved."
+  print "  If --app is specified, a page for this application is created in the"
+  print "  current directory."
+  print "  If --quiet is specified, the program is less verbose."
+  print "  The XML input is read from stdin."
+
+# Return package name for elem, or None if no valid name is found
+# (i.e., if the element's file name does not match any known topdir)
+def packagename(elem):
+  loc = elem.getAttribute("loc")
+  colon = index(loc, ":")
+  filename = canonicalise(loc[colon + 1:])
+  for dir in topdir:
+    dirlen = len(dir)
+    if filename[0:dirlen] == dir:
+      filename = filename[dirlen:]
+      break
+  if filename[0] == "/":
+    return None
+  else:
+    return replace(replace(filename, ".nc", ""), "/", ".")
+
+# simplify file names (for generating package names, so no need to
+# preserve path validity):
+#  empty strings become ./
+#  windows paths are made unix-like:
+#    c: becomes /c/
+#    all \ become /
+def canonicalise(name):
+  if name == "":
+    name = "."
+  if (name[1:2] == ":"): # windows disk names
+    name = "/%s/%s" %(name[0], name[2:])
+  name = replace(name, "\\", "/")
+  return name
+  
+# canonicalise a directory. like canonicalise, but ensures
+# there is trailing /
+def canonicalisedir(dirname):
+  dirname = canonicalise(dirname)
+  if dirname[-1] != "/":
+    return dirname + "/"
+  else:
+    return dirname
+
+# option processing. See usage string for details.
+def process_opts(argv):
+  options = {
+    "topdir":	 (True,  lambda (x): topdir + [canonicalisedir(x)]),
+    "preserve":	 (False, lambda x: True),
+    "app":	 (False, lambda x: True),
+    "quiet":	 (False, lambda x: True),
+  }
+  getopt_args = []
+  for p in options:
+    globals()[p] = False
+    opt = p
+    if options[p][0]:
+      opt += "="
+    getopt_args += [ opt ]
+  (opts, args) = getopt(argv, "", getopt_args)
+  topdir = []
+  highlight = ""
+  for o, a in opts:
+    opt = o[2:]
+    globals()[opt] = options[opt][1](a)
+  return args
+
+args = process_opts(argv[1:])
+if len(args) != 1:
+  usage()
+  exit(2)
+
+repository = args[0]
+try:
+  dom = parse(stdin)
+except xml.parsers.expat.ExpatError:
+  nfail("nesdoc failed: no valid input")
+creator = xml.dom.minidom.getDOMImplementation()
+check(dom.documentElement.tagName == "nesc")
+
+interfacedefs = get1(dom, "interfacedefs")
+components = get1(dom, "components")
+interfaces = get1(dom, "interfaces")
+functions = get1(dom, "functions")
+
+# index everything
+refidx = {}
+qnameidx = {}
+for x in interfaces.getElementsByTagName("interface"):
+  refidx[x.getAttribute("ref")] = x
+for x in functions.getElementsByTagName("function"):
+  refidx[x.getAttribute("ref")] = x
+for x in components.getElementsByTagName("component"):
+  qnameidx[x.getAttribute("qname")] = x
+for x in interfacedefs.getElementsByTagName("interfacedef"):
+  qnameidx[x.getAttribute("qname")] = x
+
+# collect specification elements by component
+speclist = {}
+# interfaces
+for x in interfaces.getElementsByTagName("interface"):
+  incomponent = get1(x, "component-ref").getAttribute("qname")
+  if speclist.has_key(incomponent):
+    speclist[incomponent].append(x)
+  else:
+    speclist[incomponent] = [x]
+# and bare commands, events
+for x in functions.getElementsByTagName("function"):
+  # hack: tasks don't show up with a command/event attribute
+  # don't include commands/events from interfaces
+  if (x.hasAttribute("event") or x.hasAttribute("command")) and (not xml_tag(x, "interface-ref")):
+    incomponent = get1(x, "component-ref").getAttribute("qname")
+    if speclist.has_key(incomponent):
+      speclist[incomponent].append(x)
+    else:
+      speclist[incomponent] = [x]
+
+# add nicename (i.e., with package prefix) attributes to all interfacedef,
+# interfacedef-ref, component and component-ref elements
+nicenames = {}
+def define_nicename(x):
+  name = x.getAttribute("qname")
+  nicename = packagename(x)
+  if nicename == None:
+    nicename = name
+  nicenames[name] = nicename
+def set_nicename(x):
+  x.setAttribute("nicename", nicenames[x.getAttribute("qname")])
+for x in interfacedefs.getElementsByTagName("interfacedef"):
+  define_nicename(x)
+  set_nicename(x)
+for x in components.getElementsByTagName("component"):
+  define_nicename(x)
+  set_nicename(x)
+for x in dom.getElementsByTagName("interfacedef-ref"):
+  set_nicename(x)
+for x in dom.getElementsByTagName("component-ref"):
+  set_nicename(x)
+
+# Do the app stuff if requested
+if app:
+  # The firt component is the main application component.
+  toplevel = xml_idx(components, 0)
+  name = toplevel.getAttribute("qname")
+  nicename = toplevel.getAttribute("nicename")
+  wiring = xml_tag(xml_tag(dom, "nesc"), "wiring")
+  generate_graph(".", repository, dom, wiring, name, nicename)
+
+  ht = Html("%s.html" % nicename)
+  ht.title("Application: " + nicename)
+  ht.body()
+  ht.push("h2");
+  ht.p("Application: " + nicename)
+  ht.popln();
+  ht.pushln("map", 'name="comp"')
+  cmap = file("%s.cmap" % nicename)
+  for line in cmap.readlines():
+    ht.pln(line)
+  cmap.close()
+  ht.popln()
+  ht.tag("img", 'src="%s.png"' % nicename, 'usemap="#comp"', 'id=imgwiring')
+  ht.close()
+
+# save xml information per-interface and per-component in the specified
+# repository
+nmkdir(repository)
+chdir(repository)
+nmkdir("interfaces")
+nmkdir("components")
+
+# save interface definitions
+for x in interfacedefs.getElementsByTagName("interfacedef"):
+  name = x.getAttribute("qname")
+  nicename = x.getAttribute("nicename")
+  filename = "interfaces/%s.xml" % nicename
+  if preserve and os.path.exists(filename):
+    continue
+  if not quiet:
+    print "interface %s (%s)" % (name, nicename)
+  doc = creator.createDocument(None, None, None)
+  copy = x.cloneNode(True)
+  doc.appendChild(copy)
+  ifile = file(filename, "w")
+  doc.writexml(ifile)
+  doc.unlink()
+  ifile.close()
+
+# save component definitions, excluding instantiations
+for x in components.getElementsByTagName("component"):
+  if len(x.getElementsByTagName("instance")) == 0:
+    # not an instance
+    name = x.getAttribute("qname")
+    nicename = x.getAttribute("nicename")
+    filename = "components/%s.xml" % nicename
+    if preserve and os.path.exists(filename):
+      continue
+    if not quiet:
+      print "component %s (%s)" % (name, nicename)
+    doc = creator.createDocument(None, None, None)
+    # copy component and create its specification
+    copy = x.cloneNode(True)
+    spec = dom.createElement("specification")
+    copy.appendChild(spec)
+    try:
+      for intf in speclist[name]:
+        spec.appendChild(intf.cloneNode(True))
+    except KeyError:
+      0
+
+    # collect information used in wiring graph
+    allelems = {}
+    allcomps = {}
+    def addelem(wireref):
+      actualref = xml_tagset(wireref, ["interface-ref", "function-ref"])
+      elemref = actualref.getAttribute("ref")
+      elem = refidx[elemref]
+      compname = xml_tag(elem, "component-ref").getAttribute("qname")
+      # exclude self-references, those are in the specification already
+      if compname != name:
+        allelems[elemref] = True
+        allcomps[compname] = True
+    for wireref in x.getElementsByTagName("from"): addelem(wireref)
+    for wireref in x.getElementsByTagName("to"): addelem(wireref)
+
+    # create the referenced element which will store the wiring information
+    refd = dom.createElement("referenced")
+    copy.appendChild(refd)
+    for ref in allelems.keys():
+      refd.appendChild(refidx[ref].cloneNode(True))
+    for qname in allcomps.keys():
+      refd.appendChild(qnameidx[qname].cloneNode(True))
+    
+    doc.appendChild(copy)
+    ifile = file(filename, "w")
+    doc.writexml(ifile)
+    doc.unlink()
+    ifile.close()
diff --git a/tools/tinyos/ncc/nesdoc-py/components.py b/tools/tinyos/ncc/nesdoc-py/components.py
new file mode 100644
index 00000000..e27ac18d
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/components.py
@@ -0,0 +1,120 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Generate HTML file for a component
+
+from nesdoc.utils import *
+from nesdoc.generators import *
+from nesdoc.html import *
+
+__all__ = [ "generate_component" ]
+
+# Output HTML describing a specification element
+def spec_signature_html(ht, elem):
+  if elem.tagName == "function":
+    ht.pfnsig(elem, lambda (name): "<b>%s</b>" % name)
+  else:
+    assert elem.tagName == "interface"
+    instance = xml_tag(elem, "instance")
+    idef = xml_tag(instance, "interfacedef-ref")
+    arguments = xml_tag(instance, "arguments")
+    parameters = xml_tag(elem, "interface-parameters")
+    instance_name = elem.getAttribute("name")
+    def_name = idef.getAttribute("qname")
+    fullname = idef.getAttribute("nicename")
+
+    sig = 'interface <a href="../ihtml/%s.html">%s</a>' % (fullname, def_name)
+    if arguments:
+      iargs = join(map(lambda (arg): typename_str(arg, ""),
+                       xml_elements(arguments)), ", ")
+      sig += "&lt;" + iargs + "&gt;"
+    if instance_name != def_name:
+      sig += " as <b>%s</b>" % instance_name
+    if parameters:
+      iparms = join(map(lambda (arg): typename_str(arg, ""),
+                        xml_elements(parameters)),  ", ")
+      sig += "[" + iparms + "]"
+    ht.p(sig)
+
+# Output HTML for specification elements elems, with heading name
+# If elems list is empty, do nothing.
+def generate_speclist(ht, name, elems):
+  if len(elems) > 0:
+    ht.tag("p")
+    ht.heading(name)
+    for elem in elems:
+      ht.func_sig_start();
+      spec_signature_html(ht, elem)
+      doc = nd_doc_short(elem)
+      if doc != None:
+        ht.push("menu")
+        ht.pln(doc)
+        ht.popln()
+      ht.func_sig_stop();
+
+def interface_compare(x, y):
+  if cmp(x.getAttribute("qname").lower(), y.getAttribute("qname").lower()) == 0 :
+    return cmp(x.getAttribute("name").lower(), y.getAttribute("name").lower())
+  return cmp(x.getAttribute("qname").lower(), y.getAttribute("qname").lower())
+
+def generate_component(comp):
+  nicename = comp.getAttribute("nicename")
+  ht = Html("chtml/%s.html" % nicename )
+  if xml_tag(comp, "module"):
+    kind = "module"
+  else:
+    kind = "configuration"
+  ht.title("Component: " + nicename)
+  ht.body()
+  ht.push("h2");
+  ht.p("Component: " + nicename)
+  ht.popln();
+  
+  # The source code name and documentation
+  ht.push("b")
+  parameters = xml_tag(comp, "parameters")
+  if parameters:
+    ht.p("generic ")
+  ht.p(kind + " " + comp.getAttribute("qname"))
+  if parameters:
+    ht.p(parameter_str(parameters))
+  ht.pop()
+  ht.startline()
+  idoc =  nd_doc_long(comp)
+  if idoc != None:
+    ht.tag("p")
+    ht.pdoc(idoc)
+  ht.tag("p")
+
+  spec = xml_tag(comp, "specification")
+  interfaces = spec.getElementsByTagName("interface")
+  functions = spec.getElementsByTagName("function")
+  spec = interfaces + functions
+  provided = filter(lambda (x): x.getAttribute("provided") == "1", spec)
+  used = filter(lambda (x): x.getAttribute("provided") == "0", spec)
+
+  # sort arrays
+  provided.sort(interface_compare)
+  used.sort(interface_compare)
+
+  generate_speclist(ht, "Provides", provided)
+  generate_speclist(ht, "Uses", used)
+
+  # wiring graph for configurations
+  if xml_tag(comp, "configuration"):
+    ht.tag("p")
+    ht.heading("Wiring")
+    ht.tag("p")
+    ht.pushln("map", 'name="comp"')
+    cmap = file("chtml/%s.cmap" % nicename)
+    for line in cmap.readlines():
+      ht.pln(line)
+    cmap.close()
+    ht.popln()
+    ht.tag("img", 'src="%s.png"' % nicename, 'usemap="#comp"', 'id=imgwiring')
+  ht.close()
diff --git a/tools/tinyos/ncc/nesdoc-py/generators.py b/tools/tinyos/ncc/nesdoc-py/generators.py
new file mode 100644
index 00000000..d89f4135
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/generators.py
@@ -0,0 +1,230 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Two groups of functions
+# A) Some functions to generate strings or HTML for various nesdoc entities
+#    (end in _str or _html respectively)
+# B) Utility functions and values for the nesdoc XML format
+
+from xml.dom.minidom import *
+from string import *
+from nesdoc.utils import *
+
+# All possible tags for types
+type_tags = [
+  "type-int",
+  "type-float",
+  "type-complex-int",
+  "type-complex-float",
+  "type-void",
+  "type-qualified",
+  "type-pointer",
+  "type-array",
+  "type-function",
+  "type-tag",
+  "type-interface",
+  "type-component",
+  "type-var" ]
+
+# Return the long nesdoc string in x. If none is present, return the short
+# nesdoc string. If no nesdoc string at all, return None.
+def nd_doc_long(x):
+  doc = xml_tag(x, "documentation")
+  if not doc:
+    return None
+  str = xml_tag(doc, "long")
+  if not str:
+    str = xml_tag(doc, "short")
+  return xml_text(str)
+
+# Return the short nesdoc string in x. None if none present.
+def nd_doc_short(x):
+  doc = xml_tag(x, "documentation")
+  if not doc:
+    return None
+  return xml_text(xml_tag(doc, "short"))
+
+# find the first docstring in 's' at or after 'index'
+# a docstring is an @ preceded by whitespace and followed by
+# at least one letter
+def _find_docstring_tag(s, index):
+  while True:
+    at = find(s, "@", index)
+    if at <= 0: return at
+    if at == len(s) - 1: return -1
+    if s[at - 1].isspace() and s[at + 1].isalpha(): return at
+    index = at + 1
+
+# process a docstring s. returns a tuple of
+#  - base documentation
+#  - list of (tag, description) pairs (in the same order as in s)
+def nd_docstring(s):
+  tags = []
+  at = _find_docstring_tag(s, 0)
+  if at < 0:
+    return (s, tags)
+  base = s[:at]
+  while at >= 0:
+    # find end of tag
+    tagend = at + 1
+    while tagend < len(s) and not s[tagend].isspace():
+      tagend += 1
+    nextat = _find_docstring_tag(s, tagend)
+    if nextat == -1:
+      tagvalend = len(s)
+    else:
+      tagvalend = nextat
+    tags.append((s[at + 1:tagend], s[tagend + 1:tagvalend]))
+    at = nextat
+  return (base, tags)
+
+# return a string for contstant cstr (from a nesdoc XML constant attribute)
+def nd_constant_str(cstr):
+  if cstr[0] == 'I' or cstr[0] == 'F':
+    return cstr[1:]
+  elif cstr[0] == 'S':
+    # XXX: should do a lot more.
+    s = cstr[1:].replace('"', '\\"')
+    return '"' + s + '"'
+  elif cstr[0] == 'U':
+    return "/* unknown */"
+  elif cstr[0] == 'V':
+    return "/* not-constant */"
+  else:
+    assert False
+
+# Type encoders for the various kinds of types
+
+def _typename_simple(xmltype, name, quals, isstar):
+  return (quals + xmltype.getAttribute("cname"), name)
+
+def _typename_void(xmltype, name, quals, isstar):
+  return (quals + "void", name)
+
+def _typename_qualified(xmltype, name, quals, isstar):
+  silly = [quals]
+  def add_qualifier(q):
+    if xmltype.hasAttribute(q):
+      silly[0] += q + " "
+  add_qualifier("volatile")
+  add_qualifier("const")
+  add_qualifier("__restrict")
+  return typename_full(xml_tagset(xmltype, type_tags), name, silly[0], isstar)
+
+def _typename_ptr(xmltype, name, quals, isstar):
+  name = "*" + quals + name
+  return typename_full(xml_tagset(xmltype, type_tags), name, "", True)
+
+def _typename_array(xmltype, name, quals, isstar):
+  assert quals == ""
+  if isstar:
+    name = "(" + name + ")"
+  size = xml_tag(xmltype, "elements")
+  if size == "V":
+    name += "[]"
+  else:
+    name += "[%s]" % constant_str(size)
+  return typename_full(xml_tagset(xmltype, type_tags), name, "", False)
+
+def _typename_tag(xmltype, name, quals, isstar):
+  tagref = xml_idx(xmltype, 0)
+  # the embedded element is named <tagkind>-ref
+  head = "%s %s" % (tagref.tagName[:-4], tagref.getAttribute("name"))
+  return (quals + head, name)
+
+def _typename_var(xmltype, name, quals, isstar):
+  varref = xml_idx(xmltype, 0)
+  return (quals + varref.getAttribute("name"), name)
+
+def _typename_fn(xmltype, name, quals, isstar):
+  returntype = xml_idx(xmltype, 0)
+  parameters = xml_idx(xmltype, 1)
+  if isstar:
+    name = "(" + name + ")"
+  args = ""
+  if parameters != None:
+    for x in parameters.childNodes:
+      if x.nodeType == Node.ELEMENT_NODE:
+        ptype = typename_str(x, "")
+        if args != "":
+          args = args + ", "
+        args += ptype
+    if xmltype.hasAttribute("varargs"):
+      args += ", ..."
+  name += "(" + args + ")"
+  if quals != "":
+    name += quals[:-1] # remove trailing space
+  return typename_full(returntype, name, "", False)
+
+_type_printers = {
+  "type-int" : _typename_simple,
+  "type-float" : _typename_simple,
+  "type-complex-int" : _typename_simple,
+  "type-complex-float" : _typename_simple,
+  "type-void" : _typename_void,
+  "type-qualified" : _typename_qualified,
+  "type-pointer" : _typename_ptr,
+  "type-array" : _typename_array,
+  "type-function" : _typename_fn,
+  "type-tag" : _typename_tag,
+  "type-interface" : _typename_tag,
+  "type-component" : _typename_tag,
+  "type-var" : _typename_var
+  };
+
+# Return a (head, body) pair for type xmltype, declaring name (a string)
+# with type qualifiers quals (a string). isstar should be true if name
+# starts with a *.
+# The user-friendly representation for this type is head + " " + body
+def typename_full(xmltype, name, quals, isstar):
+  # hack around nesC 1.2.1 schema bug (uses typedef, not typename here)
+  tdef = xml_tagset(xmltype, ["typedef", "typename"])
+  if tdef:
+    return (quals + xml_tag(tdef, "typedef-ref").getAttribute("name"), name)
+  else:
+    return _type_printers[xmltype.tagName](xmltype, name, quals, isstar)
+
+# Return a user-friendly string for a C declaration of name with type xmltype
+def typename_str(xmltype, name):
+  (head, body) = typename_full(xmltype, name, "", False)
+  if body == "":
+    return head
+  else:
+    return head + " " + body
+
+# Return a user-friendly string for a parameter list
+def parameter_str(xmlparameters):
+  args = ""
+  if xmlparameters != None:
+    for parm in xmlparameters.childNodes:
+      if parm.nodeType == Node.ELEMENT_NODE:
+        if args != "":
+          args = args + ", "
+        if parm.tagName == "variable" or parm.tagName == "constant":
+          vtype = xml_tagset(parm, type_tags)
+          args += typename_str(vtype, parm.getAttribute("name"))
+        elif parm.tagName == "typedef":
+          args += "typedef " + parm.getAttribute("name")
+        elif parm.tagName == "varargs":
+          args += ", ..."
+  return "(" + args + ")"
+
+# Return a user-friendly string for function xmlfn. The namedecorator
+# function is called with the xmlfn's name as argument to get the final
+# form of the function's name. Use this to, e.g., make the name an HTML link.
+def function_signature_str(xmlfn, namedecorator):
+  sig = ""
+  if xmlfn.hasAttribute("command"):
+    sig += "command "
+  if xmlfn.hasAttribute("event"):
+    sig += "event "
+  type = xml_tag(xmlfn, "type-function")
+  returntype = xml_idx(type, 0)
+  name = xmlfn.getAttribute("name")
+  parameters = xml_tag(xmlfn, "parameters")
+  return sig + typename_str(returntype, namedecorator(name) + parameter_str(parameters))
diff --git a/tools/tinyos/ncc/nesdoc-py/genhtml.py b/tools/tinyos/ncc/nesdoc-py/genhtml.py
new file mode 100644
index 00000000..4f4886de
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/genhtml.py
@@ -0,0 +1,99 @@
+# -*- python -*-
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# HTML generation from the XML files in a nesdoc repository.
+#
+# The HTML files are placed in three directories:
+# - ihtml: HTML files for interfaces
+# - chtml: HTML (and support) files for components
+# - index: HTML index files
+#
+# HTML files for configurations include a wiring graph. Graphviz version 1.10
+# (and, hopefully, later versions) are supported.
+#
+# Only components and interfaces in "packages" (i.e., with a package prefix
+# in their nicename attribute - see nesdoc-archive) are indexed - files
+# from applications are skipped. However, these files are still present in
+# the ihtml and chtml directories
+
+from nesdoc.utils import *
+from nesdoc.interfaces import generate_interface
+from nesdoc.components import generate_component
+from nesdoc.graph import generate_component_graph
+from nesdoc.index import generate_indices
+from sys import *
+from re import search, compile
+from shutil import copyfile
+import os
+from nesdoc.html import *
+
+param_pattern = compile("^\s*([a-zA-Z0-9_]+)")
+
+# Print @param doc tags as Parameters:, and put parameter name as <code>
+def param_doctag(val):
+  name = param_pattern.search(val)
+  if name:
+    val = "<code>" + name.group(1) + "</code> - " + val[name.end():]
+  return ("parameters", val)
+
+# Print @return tags as Returns:
+def return_doctag(val):
+  return ("returns", val)
+  
+register_doctag("param", param_doctag)
+register_doctag("return", return_doctag)
+
+# Generate HTML files, and a global index for all interfaces and components
+# in the specified repository
+if argv[1] == "--quiet":
+  repository = argv[2]
+  quiet = True
+else:
+  repository = argv[1]
+  quiet = False
+
+try:
+  chdir(repository)
+  
+  # set up directories
+  nmkdir("ihtml")
+  nmkdir("chtml")
+  nmkdir("index")
+
+  # copy stylesheet
+  pathname = os.path.abspath(os.path.dirname(argv[0]))
+  copyfile(pathname + "/nesdoc.css", "chtml/nesdoc.css")
+  copyfile(pathname + "/nesdoc.css", "ihtml/nesdoc.css")
+  copyfile(pathname + "/nesdoc.css", "index/nesdoc.css")
+  copyfile(pathname + "/nesdoc.css", "nesdoc.css")
+
+  compfiles = listdir("components")
+  intffiles = listdir("interfaces")
+  
+except OSError:
+  nfail("Couldn't access nesdoc repository " + repository)
+
+for intf in intffiles:
+  if search("\\.xml$", intf):
+    if not quiet:
+      stderr.write("interface " + intf + "\n")
+    ixml = parse("interfaces/" + intf)
+    generate_interface(ixml.documentElement)
+    ixml.unlink()
+
+for comp in compfiles:
+  if search("\\.xml$", comp):
+    if not quiet:
+      stderr.write("component " + comp + "\n")
+    ixml = parse("components/" + comp)
+    generate_component_graph(ixml.documentElement)
+    generate_component(ixml.documentElement)
+    ixml.unlink()
+
+generate_indices(compfiles, intffiles)
diff --git a/tools/tinyos/ncc/nesdoc-py/graph.py b/tools/tinyos/ncc/nesdoc-py/graph.py
new file mode 100644
index 00000000..0fe7238d
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/graph.py
@@ -0,0 +1,154 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Generate the picture and cmap for a configuration's wiring
+
+from xml.dom.minidom import *
+from nesdoc.utils import *
+from nesdoc.generators import *
+from sys import *
+from os import system
+
+def generate_component_graph(comp):
+  generate_graph("chtml", "..", comp, xml_tag(comp, "wiring"),
+                 comp.getAttribute("qname"), comp.getAttribute("nicename"))
+  
+def generate_graph(dir, repository, xml, wiring, name, nicename):
+  if not wiring:
+    return
+
+  # Return the element definition for a given wiring endpoint
+  def lookup_elem(endpoint):
+    elemref = xml_tagset(endpoint, [ "interface-ref", "function-ref" ])
+    return refidx[elemref.getAttribute("ref")]
+
+  # Define nodes in a dot graph file. Each node is given a name, a graphic
+  # style and a label. The elements map is updated to record the mapping
+  # from XML node names ("ref" attribute) and dot-file node names.
+  #   gf is the dot graph file
+  #   wire is a wiring graph edge
+  #   tag specifies which node to extract from wire (either "to" or "from")
+  # Does nothing if the node has already been added.
+  def add_node(gf, wire, tag):
+    endpoint = xml_tag(wire, tag)
+    elem = lookup_elem(endpoint)
+    ref = elem.getAttribute("ref")
+    if endpoints.has_key(ref): return
+    
+    compref = xml_tag(lookup_elem(endpoint), "component-ref")
+    if compref.getAttribute("qname") == name:
+      # reference to one's own interfaces become ellipses
+      endpoints[ref] = "n%s" % ref
+      gf.write('  %s [shape=ellipse, style=filled, label="%s", fontsize=12];\n' % (endpoints[ref], elem.getAttribute("name")))
+    else:
+      # references to interfaces or functions of other components become
+      # a reference to a box representing that component.
+      # each instance of a generic component gets a separate box.
+      # there is a link to the component's own HTML file.
+
+      ncompname = compref.getAttribute("qname")
+      ncomp = compidx[ncompname]
+      # Map this function or interface to the component (note that different
+      # instances of generic components have different qnames)
+      endpoints[ref] = ncompname
+
+      # Define the component style. We may define it several times, but all
+      # definitions are identical...
+      gf.write('  "%s" ' % ncompname)
+      styles = ["fontsize=12"]
+      if xml_tag(ncomp, "configuration"):
+        # configurations gets a double box
+        styles.append("shape=box,peripheries=2")
+      else:
+        styles.append("shape=box")
+
+      # Check for generic component instances
+      instance = xml_tag(ncomp, "instance")
+      if instance:
+        # Make these dashed, with a label showing the generic component
+        # and the instance name
+        styles.append("style=dashed")
+        iname = ncompname[find(ncompname, ".") + 1:]
+        instanceof = xml_tag(instance, "component-ref")
+        instanceof_name = instanceof.getAttribute("qname")
+        if iname == instanceof_name:
+          styles.append('label="%s"' % instanceof_name)
+        else:
+          styles.append('label="%s\\n(%s)"' % (instanceof_name, iname))
+        styles.append('URL="%s/chtml/%s.html"' % (repository, instanceof.getAttribute("nicename")))
+      else:
+        # Just a regular component
+        styles.append('URL="%s/chtml/%s.html"' % (repository, ncomp.getAttribute("nicename")))
+      if styles != []:
+        gf.write("[%s]" % join(styles, ", "))
+      gf.write(";\n")
+    
+  
+  def compname(endpoint):
+    return endpoints[lookup_elem(endpoint).getAttribute("ref")]
+
+  def wirestyle(endpoint):
+    elem = lookup_elem(endpoint)
+    if elem.tagName == "function":
+      # missing: bold style for parameterised functions
+      styles = ['label="%s"' % function_signature_str(elem, lambda (name): "X")]
+    else:
+      assert elem.tagName == "interface"
+      instance = xml_tag(elem, "instance")
+      idef = xml_tag(instance, "interfacedef-ref")
+      arguments = xml_tag(instance, "arguments")
+      parameters = xml_tag(elem, "interface-parameters")
+      def_name = idef.getAttribute("qname")
+
+      sig = def_name
+      if arguments:
+        iargs = join(map(lambda (arg): typename_str(arg, ""),
+                         xml_elements(arguments)), ", ")
+        sig += "<" + iargs + ">"
+      if parameters:
+        iparms = join(map(lambda (arg): typename_str(arg, ""),
+                          xml_elements(parameters)),  ", ")
+        sig += "[" + iparms + "]"
+      styles = [ 'label="%s"' % sig ]
+      if xml_tag(elem, "interface-parameters"):
+        styles.append('style=bold')
+      styles.append('URL="%s/ihtml/%s.html"' % (repository, idef.getAttribute("nicename")))
+    styles.append("fontsize=10")
+    return styles
+
+
+  # build indices from ref attribute values to the corresponding elements
+  refidx = {}
+  compidx = {}
+  for intf in xml.getElementsByTagName("interface"):
+    refidx[intf.getAttribute("ref")] = intf
+  for fn in xml.getElementsByTagName("function"):
+    refidx[fn.getAttribute("ref")] = fn
+  for ncomp in xml.getElementsByTagName("component"):
+    compidx[ncomp.getAttribute("qname")] = ncomp
+  
+  # create the dot graph specification
+  gf = file("%s/%s.dot" % (dir, nicename), "w")
+  gf.write('digraph "%s" {\n' % nicename)
+  
+  endpoints = {}
+  for wire in wiring.getElementsByTagName("wire"):
+    add_node(gf, wire, "from")
+    add_node(gf, wire, "to")
+    
+  for wire in wiring.getElementsByTagName("wire"):
+    src = xml_tag(wire, "from")
+    dest = xml_tag(wire, "to")
+    gf.write('  "%s" -> "%s"' % (compname(src), compname(dest)))
+    gf.write(' [%s];\n' % join(wirestyle(src), ", "))
+  gf.write("}\n")
+  gf.close()
+
+  # Run dot twice to get a picture and cmap
+  system("dot -Tpng -o%s/%s.png %s/%s.dot" % (dir, nicename, dir, nicename))
+  system("dot -Tcmap -o%s/%s.cmap %s/%s.dot" % (dir, nicename, dir, nicename))
diff --git a/tools/tinyos/ncc/nesdoc-py/html.py b/tools/tinyos/ncc/nesdoc-py/html.py
new file mode 100644
index 00000000..343c4b1d
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/html.py
@@ -0,0 +1,172 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# An HTML output class, with convenience routines for handling tags and
+# indentation.
+
+from string import *
+from nesdoc.generators import *
+from re import search
+
+_doctags = {}
+
+def register_doctag(name, handler):
+  _doctags[name] = handler
+
+class Html:
+  # create a new HTML output file in filename
+  def __init__(self, filename):
+    self.f = file(filename, "w")
+    self.tags = []
+    self.ind = 0
+    self.at0 = True
+    self.pushln("html");
+    self.pushln("head");
+    # include stylesheet
+    self.tag("LINK", "rel=\"stylesheet\"", "href=\"nesdoc.css\"", "type=\"text/css\"", "media=\"screen\"")
+
+  # end of html generation. cleanup and close the underlying file.
+  def close(self):
+    self.popln()
+    self.popln()
+    assert self.ind == 0 and self.tags == []
+    self.f.close()
+
+  def indent(self):
+    self.ind += 2
+
+  def unindent(self, ):
+    self.ind -= 2
+
+  # print a string
+  def p(self, s):
+    if self.at0:
+      self.f.write(" " * self.ind)
+      self.at0 = False
+    self.f.write(s)
+
+  # print a string and end the line
+  def pln(self, s):
+    self.p(s)
+    self.f.write("\n")
+    self.at0 = True
+
+  # print a string, quoting the characters with meaning in HTML
+  def pq(self, s):
+    s.replace("<", "&lt;")
+    s.replace(">", "&gt;")
+    s.replace("&", "&amp;")
+    s.replace('"', "&quot;")
+    self.p(s)
+
+  # newline if not at the start of a line
+  def startline(self):
+    if not self.at0:
+      self.pln("")
+
+  # start a new tag
+  def push(self, tag, *attrs):
+    self.tag(tag, *attrs)
+    self.tags.append(tag)
+    self.indent()
+
+  # start a new tag on a new line
+  def pushln(self, tag, *attrs):
+    self.startline();
+    self.tag(tag, *attrs)
+    self.pln("")
+    self.tags.append(tag)
+    self.indent()
+
+  # print a tag, but don't save it on the tag stack
+  def tag(self, tag, *attrs):
+    if attrs == ():
+      self.p("<%s>" % tag)
+    else:
+      self.p("<%s %s>" % (tag, join(attrs)))
+
+  # print a tag on a new line, but don't save it on the tag stack
+  def tagln(self, tag, *attrs):
+    self.tag(tag, *attrs)
+    self.pln("")
+    
+  # pop and print a terminator the most recent tag from the tag stack
+  def pop(self):
+    self.unindent()
+    self.p("</%s>" % self.tags.pop())
+
+  # pop and print (on a new line) a terminator the most recent tag from the
+  # tag stack
+  def popln(self):
+    self.unindent()
+    self.startline()
+    self.pln("</%s>" % self.tags.pop())
+
+  # print the HTML title
+  def title(self, s):
+    self.push("title");
+    self.pq(s);
+    self.pop();
+
+  # start the body section
+  def body(self):
+    self.popln() # pop head
+    self.pushln("body")
+
+  # Highlevel methods
+
+  # escape <> enclosed email addresses
+  def escape_email(self, s):
+    while True:
+      email = search("<\S+@\S+>", s)
+      if not email:
+        break
+      start = email.start()
+      end = email.end()
+      s = s[:start] + "&lt;" + s[start + 1 : end - 1] + "&gt;" + s[end:]
+    return s
+
+  # print a nesdoc string. @ entries go in a table
+  def pdoc(self, docstr):
+    (base, tags) = nd_docstring(docstr)
+    self.pln(self.escape_email(base))
+    if tags:
+      self.tag("p")
+      self.pushln("dl")
+      lasttag = None
+      for (tag, val) in tags:
+        if _doctags.has_key(tag):
+          (tag, val) = _doctags[tag](val)
+        if tag != lasttag:
+          self.tag("dt");
+          self.push("b"); self.pq(capitalize(tag) + ":"); self.pop()
+        self.pushln("dd");
+        self.p(self.escape_email(val))
+        self.popln() #dd
+        lasttag = tag
+      self.popln() #dl
+
+  # print a nice fancy heading
+  def heading(self, s):
+    self.push("div", "id=heading")
+    self.pq(s)
+    self.pop();
+
+  def func_sig_start(self) :
+    self.push("div", "id=funcsig")
+
+  def func_sig_stop(self) :
+    self.pop();
+
+  # print a function signature. namedecorator is called with the function
+  # name as argument so that you can decorate the actual function name
+  # (e.g., bold, a link)
+  def pfnsig(self, fn, namedecorator):
+    self.push("span", "id=funcnameshort")
+    self.pln(function_signature_str(fn, namedecorator))
+    self.pop()
diff --git a/tools/tinyos/ncc/nesdoc-py/index.py b/tools/tinyos/ncc/nesdoc-py/index.py
new file mode 100644
index 00000000..36cf51a1
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/index.py
@@ -0,0 +1,159 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Generate indices for all packages
+# Components and interfaces not in a package are ignored.
+
+from re import match
+from nesdoc.utils import *
+from nesdoc.generators import *
+from nesdoc.html import *
+from sys import *
+from string import *
+
+def generate_indices(compfiles, intffiles):
+  # Add filename to the per-package (to) and global (all) lists
+  def add_page(filename, to, all):
+    fmatch = match("^(.*)\\.(.*)\\.xml$", filename)
+    if fmatch:
+      package = fmatch.group(1)
+      entity = fmatch.group(2)
+      packages[package] = True
+      if not to.has_key(package):
+        to[package] = []
+      to[package].append((package, entity))
+      all.append((package, entity))
+    else:
+      fmatch = match("^(.*)\\.xml$", filename)
+      if fmatch:
+        entity = fmatch.group(1)
+        all.append(('', entity))
+
+  # start a list (of interfaces, components or packages)
+  def tableforlist_start(ht):
+    ht.pushln("table", 'border="0"', 'width="100%"', 'summary=""')
+    ht.pushln("tr")
+    ht.pushln("td", "nowrap")
+
+  # end a list
+  def tableforlist_end(ht):
+    ht.popln()
+    ht.popln()
+    ht.popln()
+
+  # output a list (l) of interfaces or components (kind)
+  def entitylist(ht, l, kind):
+    tableforlist_start(ht)
+    ht.push('div', 'id="heading"')
+    ht.p(capitalize(kind))
+    ht.pop();
+    l.sort(lambda x, y: cmp(x[1].lower(), y[1].lower()))
+    ht.push('span', 'id="funcnameshort"')
+    for x in l:
+      if (x[0] != ''):
+        ht.push("a", 'href="../%shtml/%s.%s.html"' % (kind[0], x[0], x[1]),
+                'target="bodyFrame"')
+      else:
+        ht.push("a", 'href="../%shtml/%s.html"' % (kind[0], x[1]),
+                'target="bodyFrame"')
+      ht.p(x[1])
+      ht.pop()
+      ht.pln("")
+      ht.tagln("br")
+    ht.pop()
+    ht.tag("p")
+    tableforlist_end(ht)
+
+  # Per-package index
+  def pkglist(l, pkg, kind):
+    if l.has_key(pkg):
+      entitylist(pkgfile, l[pkg], kind)
+
+  # collect packages
+  allcomponents = []
+  allinterfaces = []
+  packages = {}
+  components = {}
+  interfaces = {}
+  for x in compfiles: add_page(x, components, allcomponents)
+  for x in intffiles: add_page(x, interfaces, allinterfaces)
+  packages = packages.keys()
+  packages.sort(lambda x, y: cmp(x.lower(), y.lower()))
+    
+  # Package index
+  idxfile = Html("index/packages.html")
+  idxfile.title("Package overview")
+  idxfile.body()
+  tableforlist_start(idxfile)
+  idxfile.push("a", 'href="all-.html"', 'target="packageFrame"')
+  idxfile.p("Everything")
+  idxfile.popln()
+  idxfile.tag("p")
+  idxfile.pln("Packages")
+  for pkg in packages:
+    idxfile.tagln("br")
+    idxfile.push("a", 'href="%s.html"' % pkg, 'target="packageFrame"')
+    idxfile.p(pkg)
+    idxfile.pop()
+    idxfile.pln("")
+  tableforlist_end(idxfile)
+  idxfile.close()
+
+  for pkg in packages:
+    pkgfile = Html("index/%s.html" % pkg)
+    pkgfile.title(pkg)
+    pkgfile.body()
+    pkgfile.pln(pkg)
+    pkgfile.tag("p")
+    pkglist(interfaces, pkg, "interfaces")
+    pkglist(components, pkg, "components")
+    pkgfile.close()
+
+  # Global index
+  allfile = Html("index/all-.html")
+  allfile.title("All interfaces and components")
+  allfile.body()
+  entitylist(allfile, allinterfaces, "interfaces")
+  entitylist(allfile, allcomponents, "components")
+  allfile.close()
+
+  # The actual index, with its three javadoc-style frames
+  frame = Html("index.html")
+  frame.title("Interfaces and components")
+  frame.popln()
+  frame.pushln("frameset", 'cols="20%,80%"')
+  frame.pushln("frameset", 'rows="30%,70%"')
+  frame.tagln("frame", 'src="index/packages.html"', 'name="packageListFrame"',
+              'title="Package List"')
+  frame.tagln("frame", 'src="index/all-.html"', 'name="packageFrame"',
+              'title="All interfaces and components"')
+  frame.popln()
+  # start on the main application
+  frame.tagln("frame", 'src="initial.html"', 'name="bodyFrame"',
+              'title="Summary"', 'scrolling="yes"')
+  frame.pushln("noframes")
+  frame.push("h2")
+  frame.p("Warning")
+  frame.popln()
+  frame.p("nesdoc is designed to be viewed using frames.")
+  frame.tag("p")
+  frame.p("Click ")
+  frame.push("a", 'href="index/packages.html"')
+  frame.p("here")
+  frame.pop()
+  frame.p(" for a minimalistic non-frame interface.")
+  frame.popln()
+  frame.close()
+
+  # Initial file
+  initial = Html("initial.html")
+  initial.title("nesdoc introduction")
+  initial.body()
+  initial.pln("Please select a package from the top-left frame, or an")
+  initial.pln("interface or componenent from the bottom-left frame.")
+  initial.close()
diff --git a/tools/tinyos/ncc/nesdoc-py/interfaces.py b/tools/tinyos/ncc/nesdoc-py/interfaces.py
new file mode 100644
index 00000000..b299f1cb
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/interfaces.py
@@ -0,0 +1,85 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Generate HTML file for an interface
+
+from nesdoc.utils import *
+from nesdoc.generators import *
+from nesdoc.html import *
+
+__all__ = [ "generate_interface" ]
+
+# A list of all functions with their short description, with links to the
+# long description
+def generate_fnlist_short(ht, name, fns):
+  if len(fns) > 0:
+    ht.tag("p")
+    ht.heading(name)
+    for fn in fns:
+      ht.func_sig_start();
+      ht.pfnsig(fn, lambda (name): '<a href="#%s">%s</a>' % (name, name))
+      doc = nd_doc_short(fn)
+      if doc != None:
+        ht.push("menu")
+        ht.pln(doc)
+        ht.popln()
+      ht.func_sig_stop();
+
+# A list of all functions with their long description
+def generate_fnlist_long(ht, name, fns):
+  if len(fns) > 0:
+    ht.tag("p")
+    ht.heading(name + " - Details")
+    first = True
+    for fn in fns:
+      if not first:
+        ht.tag("hr")
+      ht.startline()
+      name = fn.getAttribute("name")
+      ht.pln('<a name="%s"></a>' % name)
+      ht.push("h4"); ht.p(name); ht.popln()
+      ht.pfnsig(fn, lambda (name): '<b>%s</b>' % name)
+      doc = nd_doc_long(fn)
+      if doc:
+        ht.startline(); ht.tag("p")
+        ht.pushln("menu")
+        ht.pdoc(doc)
+        ht.popln()
+      first = False
+
+def generate_interface(intf):
+  nicename = intf.getAttribute("nicename")
+  ht = Html("ihtml/%s.html" % nicename )
+  ht.title("Interface: " + nicename)
+  ht.body()
+  ht.push("h2");
+  ht.pq("Interface: " + nicename)
+  ht.pop()
+  ht.startline()
+  ht.push("b")
+  parameters = xml_tag(intf, "parameters")
+  ht.p("interface " + intf.getAttribute("qname"))
+  if parameters:
+    ht.p("&lt;" + parameter_str(parameters)[1:-1] + "&gt;")
+  ht.pop()
+  idoc =  nd_doc_long(intf)
+  if idoc != None:
+    ht.tag("p")
+    ht.pdoc(idoc)
+  ht.tag("p")
+
+  functions = intf.getElementsByTagName("function")
+  commands = filter(lambda (x): x.hasAttribute("command"), functions)
+  events = filter(lambda (x): x.hasAttribute("event"), functions)
+  commands.sort(lambda x, y: cmp(x.getAttribute("name").lower(), y.getAttribute("name").lower()));
+  events.sort(lambda x, y: cmp(x.getAttribute("name").lower(), y.getAttribute("name").lower()));
+  generate_fnlist_short(ht, "Commands", commands)
+  generate_fnlist_short(ht, "Events", events)
+  generate_fnlist_long(ht, "Commands", commands)
+  generate_fnlist_long(ht, "Events", events)
+  ht.close()
diff --git a/tools/tinyos/ncc/nesdoc-py/nesdoc.css b/tools/tinyos/ncc/nesdoc-py/nesdoc.css
new file mode 100644
index 00000000..84014e5d
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/nesdoc.css
@@ -0,0 +1,33 @@
+/* @author Joe Polastre <info@moteiv.com> */
+
+body { background-color: #FFFFFF }
+
+#heading {
+  background-color: #CCCCFF;
+  font-size: 13pt;
+  font-weight: bold;
+  color: #000000;
+  border: 1px;
+  border-style: solid;
+  border-color: #000000;
+  padding: 3px;
+  width: 100%-8px;
+}
+
+#funcsig { 
+  background-color: #FFFFFF;
+  border: 1px;
+  border-style: solid;
+  border-color: #bbbbbb;
+  padding: 1px;
+  width: 100%-8px;
+}
+
+#funcnameshort { 
+  font-size: 11pt;
+  color: #000000;
+}
+
+#imgwiring { 
+  border: 0px;
+}
\ No newline at end of file
diff --git a/tools/tinyos/ncc/nesdoc-py/utils.py b/tools/tinyos/ncc/nesdoc-py/utils.py
new file mode 100644
index 00000000..9af06df2
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc-py/utils.py
@@ -0,0 +1,79 @@
+# Copyright (c) 2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# Miscellaneous utility functions (mostly for extracting information from XML)
+from os import *
+from xml.dom.minidom import *
+from sys import *
+
+# print an error message and exit
+def nfail(s):
+  stderr.write(s + "\n")
+  exit(2)
+
+# Create a directory without failing
+def nmkdir(dir):
+  try:
+    mkdir(dir)
+  except OSError:
+    0
+
+# Find the first element x of l for which f(x) is true
+def nfind(f, l):
+  for a in l:
+    if f(a):
+      return True
+  return False
+
+# True if a is in l
+def nmember(a, l):
+  return nfind(lambda (b): a == b, l)
+
+# Return a sub-element with the specified tag
+def xml_tag(x, tag):
+  for child in x.childNodes:
+    if child.nodeType == Node.ELEMENT_NODE and child.tagName == tag:
+      return child
+  return None
+
+# Return some descendant with the specified tag
+def xml_tagfind(x, tag):
+  tmp = x.getElementsByTagName(tag)
+  if len(tmp) == 1:
+    return tmp[0]
+  else:
+    return None
+
+# Return a sub-element with one of the specified tags
+def xml_tagset(x, tags):
+  for child in x.childNodes:
+    if child.nodeType == Node.ELEMENT_NODE and nmember(child.tagName, tags):
+      return child
+  return None
+
+# Return the ith sub-element
+def xml_idx(x, i):
+  for child in x.childNodes:
+    if child.nodeType == Node.ELEMENT_NODE:
+      if i == 0:
+        return child
+      i = i - 1
+  return None
+
+# Return all element children
+def xml_elements(x):
+  return filter(lambda (child): child.nodeType == Node.ELEMENT_NODE, x.childNodes)
+
+# Join all CDATA children into a single string
+def xml_text(x):
+  str = ""
+  for child in x.childNodes:
+    if child.nodeType == Node.TEXT_NODE or child.nodeType == Node.CDATA_SECTION_NODE:
+      str += child.data
+  return str
+
diff --git a/tools/tinyos/ncc/nesdoc.1 b/tools/tinyos/ncc/nesdoc.1
new file mode 100644
index 00000000..ba4b0631
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc.1
@@ -0,0 +1,86 @@
+.TH nesdoc 1 "April 27, 2004"
+.LO 1
+.SH NAME
+
+nesdoc - generate TinyOS documentation
+.SH SYNOPSIS
+
+TinyOS 1.x usage:
+.br
+\fBnesdoc\fR [\fIdocumentation-directory\fR] [\fIncc-options\fR] \fIfiles...\fR
+
+TinyOS 2.x: collect documentation from a program:
+.br
+\fBnesdoc\fR -o \fIdocumentation-directory\fR [\fB-preserve\fR]
+       [\fB-new\fR] [\fB-quiet\fR] [\fB-target=\fIplatform\fR] [\fB-topdir=\fIdirectory\fR] [\fB-app\fR] 
+       [\fIncc-options\fR] \fIfiles...\fR
+
+TinyOS 2.x: generate nesdoc HTML pages:
+.br
+\fBnesdoc\fR -o \fIdocumentation-directory\fR \fB-html\fR
+       [\fB-new\fR] [\fB-quiet\fR] [\fB-target=\fIplatform\fR]
+
+.SH DESCRIPTION
+
+\fBnesdoc\fR is a tool to automatically extract documentation from nesC
+files and applications. There are two implementations of nesdoc: an old
+one that is used by default with TinyOS 1.x trees, and a new used with
+TinyOS 2.x trees or when the \fB-new\fR option is specified. It is not
+possible to use the old implementation with TinyOS 2.x.
+
+Documentation directories have a subdirectory for each platform, and
+contain HTML files describing the components and interfaces in TinyOS.
+nesdoc generates these files by compiling nesC programs and extracting the
+documentation information.
+
+When invoked, \fBnesdoc\fR generates documentation for the program that
+would be compiled with
+    \fBncc\fR \fIncc-options\fR \fIfiles...\fR
+
+The old nesdoc adds an HTML file for each component, interface in the
+compiled application to the documentation directory, and updates several
+indices. The old nesdoc does not support generic components or interfaces.
+
+The new nesdoc separates HTML generation into two phases. First, an
+application is compiled and XML descriptions of its components and 
+interfaces are added to the documentation directory. Once XML descriptions
+have been extracted for all components of interest, HTML pages are
+generated from this repository by running \fBnesdoc\fR with the \fB-html\fR
+option.
+
+For more details, see the separate \fBnesdoc\fR documentation.
+
+.SH OPTIONS
+
+.TP
+\fB-target=\fIplatform\fR
+Specify the platform for which documentation is generated.
+.TP
+\fB-preserve\fR
+By default, when collecting information, nesdoc overwrites existing XML
+descriptions of interfaces and components to ensure that they are up to 
+date. However, this is slow when generating documentation on a large 
+number of applications. If you pass the \fB-preserve\fR option, existing
+XML descriptions are not replaced.
+.TP
+\fB-html\fR
+Generate HTML pages for all the nesdoc information collected in 
+\fIdocumentation-directory\fR.
+\fB-new\fR
+Force the use of the new nesdoc even when using a TinyOS 1.x source tree.
+.TP
+\fB-quiet\fR
+Don't print informational messages.
+.TP
+\fB-topdir=\fIdir\fR 
+Specify directory paths that should be stripped from the source file names
+when generating "package names" for the documentation files.  The directory
+above \fBTOSDIR\fR is automatically added, so this option is only needed for
+directories outside the main TinyOS distribution.
+.TP
+\fB-app\fR
+Also generate a graph for the whole application in the current directory -
+this is useful to check the wiring of a particular application.
+.SH SEE ALSO
+
+.IR ncc (1)
diff --git a/tools/tinyos/ncc/nesdoc.in b/tools/tinyos/ncc/nesdoc.in
new file mode 100644
index 00000000..8c76fbc4
--- /dev/null
+++ b/tools/tinyos/ncc/nesdoc.in
@@ -0,0 +1,208 @@
+#!@pathperl@
+# -*- perl -*-
+
+# Copyright (c) 2002-2005 Intel Corporation
+# All rights reserved.
+#
+# This file is distributed under the terms in the attached INTEL-LICENSE     
+# file. If you do not find these files, copies can be found by writing to
+# Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+# 94704.  Attention:  Intel License Inquiry.
+
+# The new nesdoc implementation. When run with a TinyOS 1.x setup, just runs
+# the old nesdoc except if the -new option is given.
+#
+# The new nesdoc implementation is based on the XML dump facilities in nesC
+# 1.2 (version 1.2.1 of the nesC compiler is required). Documenation
+# generation is broken into two phases:
+# - nesdoc data collection: nesdoc information for all interfaces and 
+#   components is saved to a nesdoc repository, which is just a collection
+#   of XML files. See archive.py for more details.
+# - HTML generation from the XML files: once a repository is complete,
+#   you run nesdoc with the -html option to generate HTML files for
+#   each interface and component, along with an index. See genhtml.py
+#   for details.
+#
+# Differences between the old and new nesdocs (summary):
+# - the new nesdoc is currently only targeted at generating API documentation;
+#   it doesn't generate HTML files describing applications
+# - the old nesdoc does not support generic components or interfaces
+# - the per-component HTML files, the index and wiring graphs are hopefully
+#   more readable
+# - information on module implementations is not included (it should not
+#   be part of an API documentation)
+
+
+$prefix = "@prefix@";
+$exec_prefix = "@exec_prefix@";
+$libprogs = "@libdir@/tinyos";
+$python = "@pathpython@";
+
+$tosdir = `ncc -print-tosdir`;
+chomp($tosdir);
+
+# If using a TinyOS 1.x tree, assume old-style nesdoc except if there is a
+# -new argument somewhere.
+if (-d "$tosdir/platform" && !grep /^-new$/, @ARGV) {
+    # nesdoc for TinyOS 1.x, support old style docs
+    if ($#ARGV < 1) {
+	&fail("Usage: nesdoc <documentation directory> <options and nesC files>");
+    }
+
+    $docdir = shift @ARGV;
+
+    unshift @ARGV, "-docdir=$docdir";
+    unshift @ARGV, "-fsyntax-only";
+    unshift @ARGV, "$exec_prefix/bin/ncc";
+
+    exec @ARGV;
+    fail("Couldn't execute $ARGV[0]");
+}
+
+# nesdoc for TinyOS 2.x 
+# parse arguments
+$target = `ncc -print-target`;
+chomp $target;
+for ($i = 0; $i <= $#ARGV; $i++) {
+    $strip = 0;
+    $_ = $ARGV[$i];
+    if (/^-/) {
+	if (/^-topdir=(.*)/) {
+            push @archive_args, "--topdir=$1";
+	    $strip = 1;
+	}
+	elsif (/^--version$/) {
+	    $print_version = 1;
+	    $strip = 1;
+	}
+	elsif (/^-v$/) {
+	    $verbose = 1;
+	}
+	elsif (/^-target=(.*)/) {
+	    $target = $1;
+	}
+	elsif (/^-o/) {
+	    ($i, $docdir) = extractarg($i);
+	    $strip = 1;
+	}
+	elsif (/^-html$/) {
+	    $genhtml = 1;
+	    $strip = 1;
+	}
+	elsif (/^-preserve$/) {
+	    $preserve = 1;
+	    $strip = 1;
+	}
+	elsif (/^-app$/) {
+	    $app = 1;
+	    $strip = 1;
+	}
+	elsif (/^-quiet$/) {
+	    $quiet = 1;
+	    $strip = 1;
+	}
+    }
+    push @ncc_args, $_ if !$strip;
+}
+
+if ($print_version) {
+    print "nesdoc: @PACKAGE_VERSION@\n";
+    exit 0;
+}
+
+fail("No documentation directory specified") if !defined $docdir;
+$docdir = "$docdir/$target";
+
+if (defined $ENV{PYTHONPATH}) {
+    $ENV{PYTHONPATH} = "$libprogs:$PYTHONPATH";
+}
+else {
+    $ENV{PYTHONPATH} = "$libprogs";
+}
+
+if ($genhtml) {
+    push @html_args, $python;
+    push @html_args, "$libprogs/nesdoc/genhtml.py";
+    push @html_args, "--quiet" if $quiet;
+    push @html_args, $docdir;
+    execorfail(@html_args);
+}
+
+# Collecting nesdoc data. Run ncc, then process the results with
+# nesdoc-archive
+
+unshift @ncc_args, "-fsyntax-only";
+unshift @ncc_args, "-fnesc-dump=wiring" if $app;
+unshift @ncc_args, "-fnesc-dump=interfacedefs";
+unshift @ncc_args, "-fnesc-dump=components(wiring)";
+unshift @ncc_args, "-fnesc-dump=interfaces";
+unshift @ncc_args, "-fnesc-dump=functions(!global())";
+unshift @ncc_args, "-fnesc-dump=referenced(interfaces,components,functions)";
+unshift @ncc_args, "$exec_prefix/bin/ncc";
+
+print STDERR join(' ', @ncc_args), "\n" if $verbose;
+
+pipe FORARCHIVE, FORNCC;
+
+if (!($pid = fork())) {
+    close STDOUT;
+    open STDOUT, ">&FORNCC";
+    execorfail(@ncc_args);
+}
+fail("fork failed") if $pid < 0;
+close STDIN;
+open STDIN, "<&FORARCHIVE";
+# Top of TinyOS tree is a default "topdir" (for package emulation)
+$toscontainer = `dirname $tosdir`;
+chomp $toscontainer;
+push @archive_args, "--topdir=$toscontainer";
+push @archive_args, "--preserve" if $preserve;
+push @archive_args, "--app" if $app;
+push @archive_args, "--quiet" if $quiet;
+push @archive_args, "$docdir";
+unshift @archive_args, "$libprogs/nesdoc/archive.py";
+unshift @archive_args, $python;
+
+print STDERR join(' ', @archive_args), "\n" if $verbose;
+
+fail("Couldn't create directory $docdir") if system("mkdir -p \"$docdir\"");
+execorfail(@archive_args);
+
+sub fail {
+    print STDERR "$_[0]\n";
+    exit 2;
+}
+
+sub execorfail {
+    exec @_;
+    fail("Couldn't execute $_[0]");
+}
+
+sub usage {
+    fail(<<EOM
+Usage: nesdoc -o <documentation directory> <ncc options and nesC files>
+         Compile specified files and archive the resulting nesdoc
+	 information in <documentation directory>
+         Note: This does not generate the nesdoc html pages.
+
+       nesdoc -o <documentation directory> -html
+	 Generate nesdoc html pages from archived nesdoc information.
+
+       nesdoc -o <documentation directory> -app <ncc options and nesC file>
+         Compile specified nesC application and generate a wiring graph
+	 for the whole program in the current directory.
+EOM
+)
+}
+
+sub extractarg {
+    local ($i) = @_;
+
+    if (length($ARGV[$i]) == 2) {
+	$arg = $ARGV[++$i];
+    }
+    else {
+	$arg = substr($ARGV[$i], 2);
+    }
+    return ($i, $arg);
+}
diff --git a/tools/tinyos/safe/.cvsignore b/tools/tinyos/safe/.cvsignore
new file mode 100644
index 00000000..282522db
--- /dev/null
+++ b/tools/tinyos/safe/.cvsignore
@@ -0,0 +1,2 @@
+Makefile
+Makefile.in
diff --git a/tools/tinyos/safe/Makefile.am b/tools/tinyos/safe/Makefile.am
new file mode 100644
index 00000000..4f777210
--- /dev/null
+++ b/tools/tinyos/safe/Makefile.am
@@ -0,0 +1,5 @@
+AUTOMAKE_OPTIONS = foreign
+
+dist_man_MANS = tos-decode-flid.1 tos-ramsize.1
+
+bin_SCRIPTS = tos-decode-flid tos-ramsize
diff --git a/tools/tinyos/safe/tos-decode-flid b/tools/tinyos/safe/tos-decode-flid
new file mode 100755
index 00000000..0356ddc1
--- /dev/null
+++ b/tools/tinyos/safe/tos-decode-flid
@@ -0,0 +1,75 @@
+#!/usr/bin/perl -w
+
+use strict;
+
+sub decode ($$) {
+    my $a = shift;
+    my $b = shift;
+    die if ($a<0 || $a>3);
+    die if ($b<0 || $b>3);
+    my $c = ($a << 2) + $b;
+    my $h = sprintf "%X", $c;
+    return $h;
+}
+
+sub usage() {
+    print "Usage: tos-decode-flid flid-file flid\n";
+    exit 2;
+}
+
+sub make_flid () {
+
+    my $flid = $ARGV[1];
+    die "expected 8 characters" if (length($flid) != 8);
+    
+    my $flidstr =
+	"0x" .
+	decode(substr($flid,0,1),substr($flid,1,1)) .
+	decode(substr($flid,2,1),substr($flid,3,1)) .
+	decode(substr($flid,4,1),substr($flid,5,1)) .
+	decode(substr($flid,6,1),substr($flid,7,1));
+}
+
+usage() if (scalar(@ARGV)!=2);
+
+my $flidstr = make_flid();
+
+my $fn = $ARGV[0];
+my $found = 0;
+
+if (defined ($fn)) {
+    open INF, "<$fn" or die;
+    while (my $line = <INF>) {
+	chomp $line;
+
+	my @fields = split /\#\#\#/, $line;
+	foreach (@fields) {
+	    (s/^\s*//g);
+	    (s/\s*$//g);
+	    (s/^\"//g);
+	    (s/\"$//g);
+	}
+	if (hex($fields[0]) == hex($flidstr)) {
+	    my $check = $fields[1];
+	    my $text = $fields[2];
+	    my $loc = $fields[3];
+	    my $func = $fields[4];
+
+
+	    $found = 1;
+
+	    print "Deputy error message for flid $flidstr:\n\n";
+
+	    printf "%s: %s: Assertion failed in %s:\n  %s\n", 
+	      $loc, $func, $check, $text;
+	}
+    }
+    close INF;
+}
+else {
+    usage();
+}
+
+if (!$found) {
+    print "oops -- flid $flidstr not found in file\n";
+}
diff --git a/tools/tinyos/safe/tos-decode-flid.1 b/tools/tinyos/safe/tos-decode-flid.1
new file mode 100755
index 00000000..245371dd
--- /dev/null
+++ b/tools/tinyos/safe/tos-decode-flid.1
@@ -0,0 +1,33 @@
+.TH tos-decode-flid 1 "Jun 30, 2008"
+.LO 1
+.SH NAME
+
+tos-decode-flid - Turn a base-4 Safe TinyOS error code into a human-readable error message
+.SH SYNOPSIS
+
+\fBtos-decode-flid\fR flid-file flid
+.SH DESCRIPTION
+
+By default, a mote that encounters a safety violation repeatedly
+blinks a failure code (also called flid, or fault-location identifier)
+on its LEDs.  \fBtos-decode-flid\fR can be used to turn this code into
+a readable error message.
+
+A flid is a sequence of 8 digits each in the range 0-3. To read this
+code, wait for the mote's LEDs to "roll," or rapidly blink several
+times in a 1-2-3 sequence. Next, some number of LEDs will be lit--
+write down this number. Usually the first digit or two of the flid
+will be zero. Following each digit of the flid, all three LEDs will be
+very briefly illuminated to serve as a separator. After all 8 digits
+have been presented the LEDs will roll and then the FLID is
+repeated. Once you have the sequence of 8 digits, it can be decoded
+using tos-decode-flid.
+
+The flid-file argument specifies a file that helps the script map from
+the flid to an error message.  The flid file is create as a side
+effect of compiling a safe application; it is placed into the
+application's build directory and is named flids.txt.
+
+
+
+
diff --git a/tools/tinyos/safe/tos-ramsize b/tools/tinyos/safe/tos-ramsize
new file mode 100755
index 00000000..023e88eb
--- /dev/null
+++ b/tools/tinyos/safe/tos-ramsize
@@ -0,0 +1,1710 @@
+#!/usr/bin/perl -w
+
+# Copyright (c) 2003-2009 University of Utah and the Flux Group.
+# All rights reserved.
+# 
+# Permission to use, copy, modify, distribute, and sell this software
+# and its documentation is hereby granted without fee, provided that the
+# above copyright notice and this permission/disclaimer notice is
+# retained in all copies or modified versions, and that both notices
+# appear in supporting documentation.  THE COPYRIGHT HOLDERS PROVIDE
+# THIS SOFTWARE "AS IS" AND WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES,
+# INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE COPYRIGHT
+# HOLDERS DISCLAIM ANY LIABILITY OF ANY KIND FOR ANY DAMAGES WHATSOEVER
+# RESULTING FROM THE USE OF THIS SOFTWARE.
+# 
+# Users are requested, but not required, to send to csl-dist@cs.utah.edu
+# any improvements that they make and grant redistribution rights to the
+# University of Utah.
+# 
+# Author: John Regehr (regehr@cs.utah.edu)
+# Revised by: Xuejun Yang on 01/10/2009 
+
+# For more information:
+#   http://docs.tinyos.net/index.php/Stack_Analysis
+
+use strict;
+use warnings;
+use Getopt::Long;
+
+# TODO: 
+#
+# support TOSThreads
+#
+# support msp430
+#
+# optionally don't do recursion checking
+#
+# print path to WC stack depth, perhaps graphically
+#
+# make it possible to specify chips individually
+#
+# make it possible to explicitly specify which interrupts are atomic
+# or not
+#
+# tighten results by keeping track of depths inside and out of
+# atomic sections
+#
+# print stack used at thread blocking points
+#
+# support overriding the default heuristic for detecting atomic
+# interrupts
+#
+# get rid of hard-coded non-terminating functions, just derive this
+# when no "ret" is executed
+#
+# test for tightness / soundness using randprog + Avrora
+#
+# read config info from a file
+#   chip parameters
+#   libc information
+#   recursion and interrupt info
+
+##########################################################################
+
+my %VEC_SIZE = (
+    "mica2" => 4,
+    "micaz" => 4,
+    "iris" => 4,
+    );
+
+my %PC_SIZE = (
+    "mica2" => 2,
+    "micaz" => 2,
+    "iris" => 2,
+    );
+
+my %NUM_VECTORS = (
+    "mica2" => 35,
+    "micaz" => 35,
+    "iris" => 51,
+    );
+
+my %RAM_SIZE = (
+    "mica2" => 4096,
+    "micaz" => 4096,
+    "iris" => 8192,
+    );
+
+my %DEV_SIZE = (
+    "mica2" => 256,
+    "micaz" => 256,
+    "iris" => 512,
+    );
+
+my %NORETURN = (
+    "deputy_fail_noreturn_fast" => 1,
+    );
+
+# any icall in the function on the left is assumed to go to the
+# function on the right
+my %ICALL_TARGETS = (
+    "fputc" => "uart_putchar",
+    "puts" => "uart_putchar",
+    );    
+
+# also look below for __prologue_saves__ and __epilogue_restores__
+my %SPECIAL = (
+
+    "TinyThreadSchedulerP__switchThreads" => 10,
+
+    # these have icalls
+    #"__eewr_block" => 35,
+    #"__eerd_block" => 35,
+
+    # these peel a return address off the stack before calling into a
+    # function that returns to the caller's caller
+    "__fp_split1" => 0,
+    "__fp_split2" => 0,
+    "__fp_split3" => 0,
+    "__fp_split_a" => 0,
+    );
+
+##########################################################################
+
+my $verbosity = 1;
+
+my $ORIGIN = 0;
+my $ZERO_STACK = -999999;
+
+my $platform;
+my %insns;
+my %args;
+my %addr_to_label;
+my %label_to_addr;
+my %lines;
+my %line_to_addr;
+my %stack_effect;
+my %successors;
+my %call_targets;
+my %insn_size;
+my %diehere;
+my %raw_text;
+my %jump_lists;
+my $initial_stack_depth;
+
+sub bynum {
+    return $a <=> $b;
+}
+
+sub parse_pair ($) {
+    (my $pair) = @_;
+    if ($pair =~ /^([a-zA-Z0-9]+)\, ([a-zA-Z0-9\+]+)$/) {
+	return ($1, $2);
+    } else {
+	die "tos-ramsize FAIL: expected 'x, y' got '$pair'";
+    }
+}
+
+sub get_relative_address ($) {
+    (my $addr) = @_;
+    my $code = $args{$addr};
+    die "tos-ramsize FAIL" if (!($code =~ /.(\-?[0-9]+)/));
+    return 2+$1;
+}
+
+sub add_insn ($$$$) {
+    (my $addr, my $code, my $size, my $linenum) = @_;
+    if (($code =~ /^([a-zA-Z]+)\s*(.*)?$/)) { 
+	if ($verbosity > 7) {
+	    print "$code\n";
+	}
+	$line_to_addr{$linenum} = $addr; 
+	my $insn = $1;
+	my $arg = $2;
+	$insns{$addr} = $insn;
+	$args{$addr} = $arg;
+	
+	if ($verbosity > 7) {
+	    print "'$insn' '$arg' @ $addr\n";
+	}
+
+	$insn_size{$addr} = $size;
+    } else {
+	if ($verbosity > 7) {
+	    print "???? $code\n";
+	}
+    }
+}
+
+sub disassemble ($) {
+    (my $fn) = @_;
+    open INF, "avr-objdump -zsD $fn |" or die "tos-ramsize FAIL: can't open input file $fn";
+    my $linenum = 0;
+    my $text_go = 0;
+    my $raw_text_go = 0;
+    my $raw_addr;
+    
+    while (my $line = <INF>) {
+	chomp $line;
+
+	$linenum++;
+	$lines{$linenum} = $line;
+
+	if ($line =~ m/Disassembly of section \.text/) {
+	    $text_go = 1;
+	    $raw_text_go = 0;
+	    next;
+	}
+
+	if ($line =~ m/Contents of section \.text/) {
+	    $text_go = 0;
+	    $raw_text_go = 1;
+	    next;
+	}
+
+	if ($line =~ m/Contents of section /) {
+	    $text_go = 0;
+	    $raw_text_go = 0;
+	    next;
+	}
+
+	if ($line =~ m/Disassembly of section /) {
+	    $text_go = 0;
+	    $raw_text_go = 0;
+	    next;
+	}
+
+	# skip blank line and obvious junk
+	next if ($line eq "" or $line =~ /^\s*\.*$/);
+	
+	# kill comments
+	($line =~ s/\s*;.*$//);
+	
+	if ($verbosity > 7) {
+	    print "$line\n";
+	}
+
+	if ($raw_text_go) {
+	    $line = substr $line, 0, 43;
+	    $line .= " ";
+	    if ($line =~ /^\s*([0-9a-f]{4}) ((([0-9a-f][0-9a-f]){1,4} ){1,4})\s*$/) {
+		my $address = hex($1);
+		my $bytes = $2;
+		if (!defined($raw_addr)) {
+		    $raw_addr = $address;
+		} else {
+		    die "tos-ramsize FAIL" if ($raw_addr != $address);
+		}
+		($bytes =~ s/\s//g);
+		while (length($bytes)>0) {
+		    die "tos-ramsize FAIL" if (length($bytes)==1);
+		    my $b = substr $bytes, 0, 2;
+		    $bytes = substr $bytes, 2, length($bytes)-2;
+		    $raw_text{$raw_addr} = $b;
+		    $raw_addr++;
+		}
+	    } else {
+		print "cannot parse raw text: '$line'\n";
+		die "tos-ramsize FAIL";
+	    }
+	}
+	
+	if ($text_go) {
+	    # label
+	    if ($line =~ /^0*([0-9a-f]+) <(.+)>:$/) {
+		my $addr = hex($1);
+		my $label = $2;
+		$addr_to_label{$addr} = $label;
+		$label_to_addr{$label} = $addr;
+		next;
+	    }
+	    
+	    # data in code segment
+	    if ($line =~ /^\s+([0-9a-f]+):\s+([0-9a-fA-F][0-9a-fA-F] ){16}\s+/) {
+		next;
+	    }
+	    
+	    # regular code
+	    
+	    my $a;
+	    my $code;
+
+	    if ($line =~ /^\s+([0-9a-f]+):\s+([0-9a-f][0-9a-f]\s){4}\s*(.*)$/) {
+		$a = hex($1);
+		$code = $3;
+		add_insn ($a, $code, 4, $linenum);
+		next;
+	    }
+	    
+	    if ($line =~ /^\s+([0-9a-f]+):\s+([0-9a-f][0-9a-f][ \t]){2}\s*(.*)$/) {
+		$a = hex($1);
+		$code = $3;
+		add_insn ($a, $code, 2, $linenum);
+		next;
+	    }
+	    
+	    # paranoid: don't ignore lines that look funny
+	    die "tos-ramsize FAIL: can't understand '$line'";
+	}
+    }
+
+    if ($verbosity >= 2) {
+	print "there are:\n";
+	print "  ".scalar(keys %addr_to_label)." labels\n";
+	print "  ".scalar(keys %insns)." instructions\n";
+    }
+    
+    close INF;
+}
+
+sub is_branch ($) {
+    (my $addr) = @_;
+    my $insn = $insns{$addr};
+    return ($insn eq "breq" || $insn eq "brge" || $insn eq "brne" ||
+	    $insn eq "brcs" || $insn eq "brcc" || $insn eq "brlt" ||
+	    $insn eq "brhc" || $insn eq "brhs" || $insn eq "brid" ||
+	    $insn eq "brie" || $insn eq "brmi" || $insn eq "brpl" ||
+	    $insn eq "brtc" || $insn eq "brts" || $insn eq "brvc" ||
+	    $insn eq "brvs" || $insn eq "brbc" || $insn eq "brbs");
+}
+
+sub is_skip ($) {
+    (my $addr) = @_;
+    my $insn = $insns{$addr};
+    return ($insn eq "sbrs" || $insn eq "sbrc" || $insn eq "cpse" ||
+	    $insn eq "sbic" || $insn eq "sbis");
+}
+
+sub is_fallthrough ($) {
+    (my $addr) = @_;
+    my $insn = $insns{$addr};
+    return (
+	$insn eq "prologue_saves" || $insn eq "epilogue_restores" ||
+	$insn eq "init_sp" || $insn eq "constant_push" || $insn eq "constant_pop" ||
+	$insn eq "adc" || $insn eq "add" || $insn eq "adiw" ||
+	$insn eq "and" || $insn eq "andi" || $insn eq "asr" ||
+	$insn eq "bld" || $insn eq "break" || $insn eq "bst" ||
+	$insn eq "cbi" || $insn eq "clh" || $insn eq "cli" ||
+	$insn eq "cln" || $insn eq "cls" || $insn eq "clt" ||
+	$insn eq "clv" || $insn eq "clz" || $insn eq "com" ||
+	$insn eq "cp" || $insn eq "cpc" || $insn eq "cpi" ||
+	$insn eq "dec" || $insn eq "elpm" || $insn eq "eor" ||
+	$insn eq "fmul" || $insn eq "fmuls" || $insn eq "fmulsu" ||
+	$insn eq "in" || $insn eq "inc" || $insn eq "ldi" ||
+	$insn eq "lpm" || $insn eq "lsr" || $insn eq "mov" ||
+	$insn eq "movw" || $insn eq "mul" || $insn eq "muls" ||
+	$insn eq "mulsu" || $insn eq "neg" || $insn eq "nop" ||
+	$insn eq "or" || $insn eq "ori" || $insn eq "out" ||
+	$insn eq "pop" || $insn eq "push" || $insn eq "ror" ||
+	$insn eq "sbc" || $insn eq "sbci" || $insn eq "sbi" ||
+	$insn eq "sbiw" || $insn eq "seh" || $insn eq "sei" ||
+	$insn eq "sen" || $insn eq "ses" || $insn eq "set" ||
+	$insn eq "sev" || $insn eq "sez" || $insn eq "sleep" ||
+	$insn eq "spm" || $insn eq "sub" || $insn eq "subi" ||
+	$insn eq "swap" || $insn eq "wdr" || $insn eq "ld" ||
+	$insn eq "ldd" || $insn eq "sec" || $insn eq "st" ||
+	$insn eq "std" || $insn eq "lds" || $insn eq "sts"
+	);
+}
+
+sub is_jmp ($) {
+    (my $addr) = @_;
+    my $insn = $insns{$addr};
+    return ($insn eq "jmp" || $insn eq "rjmp");
+}
+
+sub is_direct_call ($) {
+    (my $addr) = @_;
+    my $insn = $insns{$addr};
+    return ($insn eq "call" || $insn eq "rcall");
+}
+
+sub insn_stack_effects () {
+    foreach my $addr (keys %insns) {
+	my $insn = $insns{$addr};
+	if ($insn eq "push") {
+	    $stack_effect{$addr} = 1;
+	} elsif ($insn eq "pop") {
+	    $stack_effect{$addr} = -1;
+	} elsif ($insn eq "ret" || $insn eq "reti") {
+	    $stack_effect{$addr} = -$PC_SIZE{$platform};
+	} else {
+	    $stack_effect{$addr} = 0;
+	}
+    }
+}
+
+sub make16($$) {
+    (my $l, my $h) = @_;
+    return (hex($h) << 8) + hex($l);
+}
+
+sub jmp_call_target ($) {
+    (my $addr) = @_;
+    die "tos-ramsize FAIL" if ($insns{$addr} ne "jmp" && $insns{$addr} ne "call");
+    my $code = $args{$addr};
+    die "tos-ramsize FAIL" if (!($code =~ /0x([0-9a-f]+)/) && $code != 0);
+    if (($code =~ /0x([0-9a-f]+)/)) {
+	return hex ($1);
+    } else {
+	return 0;
+    }
+}
+
+sub get_target ($) {
+    (my $addr) = @_;
+    my $insn = $insns{$addr};
+    my $hex_addr = sprintf "%x", $addr;
+    
+    if (is_jmp ($addr) || is_direct_call ($addr)) {
+        if ($insn eq "rjmp" || $insn eq "rcall") {
+            return $addr + get_relative_address ($addr);
+        } else {
+	    return jmp_call_target ($addr);
+        }
+    }
+
+    if (is_branch ($addr)) {
+	return $addr + get_relative_address ($addr);
+    }
+
+    # skip size depends on size of subsequent insn
+    if (is_skip ($addr)) {
+	die "tos-ramsize FAIL: $hex_addr" if (!defined($insn_size{$addr}));
+	my $next = $addr + $insn_size{$addr};
+	if (!defined($insn_size{$next})) {
+	    return $next + 2;
+	} else {
+	    return $next + $insn_size{$next};
+	}
+    }
+
+    die "tos-ramsize FAIL";
+}
+
+sub match_branch ($$) {
+    (my $addr, my $instruction) = @_;
+    if (defined($insns{$addr}) && $insns{$addr} eq $instruction) { 
+	return (1, get_target ($addr));
+    } else {
+	return (0, 0);
+    }
+}
+
+sub match_2args ($$) {
+    (my $addr, my $instruction) = @_;
+    if (defined($insns{$addr}) && $insns{$addr} eq $instruction) { 
+        (my $a, my $b) = parse_pair ($args{$addr});
+	return (1, $a, $b);
+    } else {
+	return (0, 0, 0);
+    }
+}
+
+sub match_0args ($$) {
+    (my $addr, my $instruction) = @_;
+    if (defined($insns{$addr}) && $insns{$addr} eq $instruction) { 
+	return 1;
+    } else {
+	return 0;
+    }
+}
+
+# ldi	r28, 0xFF	; 255
+# ldi	r29, 0x21	; 33
+# out	0x3e, r29	; 62
+# out	0x3d, r28	; 61
+
+sub match_init_sp ($) {
+    (my $addr) = @_;
+    my $match;
+    my $reg;
+    my $immed;
+    ($match, $reg, my $sp_lo) = match_2args ($addr, "ldi");
+    return (0,0,0) if (!$match || $reg ne "r28");
+    ($match, $reg, my $sp_hi) = match_2args ($addr+2, "ldi");
+    return (0,0,0) if (!$match || $reg ne "r29");
+    ($match, $immed, $reg) = match_2args ($addr+4, "out");
+    return (0,0,0) if (!$match || $reg ne "r29" || $immed ne "0x3e");
+    ($match, $immed, $reg) = match_2args ($addr+6, "out");
+    return (0,0,0) if (!$match || $reg ne "r28" || $immed ne "0x3d");
+    my $init = make16($sp_lo,$sp_hi);
+    my $init_stack = $RAM_SIZE{$platform} + $DEV_SIZE{$platform} - $init - 1;
+    if ($verbosity > 3) {
+	print "init = $sp_lo $sp_hi = $init = ${init_stack}\n";
+    }
+    return (1,8,$init_stack);
+}
+
+# cpi	r30, 0x12	; 18
+# cpc	r31, r1
+# brcs	.+2      	; 0x1a88 <SchedulerBasicP_xx_TaskBasic_xx_runTask+0x3e>
+# rjmp	.+2218   	; 0x2332 <SchedulerBasicP_xx_TaskBasic_xx_runTask+0x8e8>
+# subi	r30, 0xBA	; 186
+# sbci	r31, 0xFF	; 255
+# add	r30, r30
+# adc	r31, r31
+# lpm	r0, Z+
+# lpm	r31, Z
+# mov	r30, r0
+# ijmp
+
+# cpi	r16, 0x80	; 128
+# cpc	r17, r1
+# brcs	.+2      	; 0x13ec <__stack+0x2ed>
+# rjmp	.+148    	; 0x1480 <__stack+0x381>
+# subi	r16, 0xBA	; 186
+# sbci	r17, 0xFF	; 255
+# movw	r30, r16
+# add	r30, r30
+# adc	r31, r31
+# lpm	r0, Z+
+# lpm	r31, Z
+# mov	r30, r0
+# ijmp
+
+# cpi	r30, 0x1E	; 30
+# cpc	r31, r1
+# brcc	.+78     	; 0x19ce <main+0x626>
+# subi	r30, 0xBA	; 186
+# sbci	r31, 0xFF	; 255
+# add	r30, r30
+# adc	r31, r31
+# lpm	r0, Z+
+# lpm	r31, Z
+# mov	r30, r0
+# ijmp
+
+# cpi	r26, 0x48	; 72
+# cpc	r27, r1
+# brcc	.+38     	; 0x1954 <__stack+0x855>
+# subi	r26, 0xBA	; 186
+# sbci	r27, 0xFF	; 255
+# movw	r30, r26
+# add	r30, r30
+# adc	r31, r31
+# lpm	r0, Z+
+# lpm	r31, Z
+# mov	r30, r0
+# ijmp
+
+sub match_jump_table_1 ($) {
+    (my $addr) = @_;
+    my $match;
+    my $reg1;
+    my $reg2;
+    my $immed;
+    my $oob_target;
+    my @targets;
+    my $inc = 0;
+
+    ($match, $reg1, my $table_size) = match_2args ($addr+$inc, "cpi");
+    return (0, \@targets, 0) if (!$match);
+    $inc += 2;
+    
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "cpc");
+    return (0, \@targets, 0) if (!$match);
+    $inc += 2;
+
+    ($match, $immed) = match_branch ($addr+$inc, "brcs");
+    if ($match) {
+	$inc += 2;
+	($match, $oob_target) = match_branch ($addr+$inc, "rjmp");
+	return (0, \@targets, 0) if (!$match);
+	$inc += 2;
+    } else {
+	($match, $oob_target) = match_branch ($addr+$inc, "brcc");
+	return (0, \@targets, 0) if (!$match);	
+	$inc += 2;
+    }
+
+    ($match, $reg1, my $sublo) = match_2args ($addr+$inc, "subi");
+    return (0, \@targets, 0) if (!$match);
+    $inc += 2;
+
+    ($match, $reg1, my $subhi) = match_2args ($addr+$inc, "sbci");
+    return (0, \@targets, 0) if (!$match);
+    $inc += 2;
+
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "movw");
+    if ($match) {
+	$inc += 2;
+    }
+
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "add");
+    return (0, \@targets, 0) if (!$match);    
+    $inc += 2;
+
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "adc");
+    return (0, \@targets, 0) if (!$match);    
+    $inc += 2;
+
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "lpm");
+    return (0, \@targets, 0) if (!$match || $reg1 ne "r0" || $reg2 ne "Z+");    
+    $inc += 2;
+
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "lpm");
+    return (0, \@targets, 0) if (!$match || $reg1 ne "r31" || $reg2 ne "Z");    
+    $inc += 2;
+
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "mov");
+    return (0, \@targets, 0) if (!$match || $reg1 ne "r30" || $reg2 ne "r0");    
+    $inc += 2;
+
+    if (match_0args ($addr+$inc, "ijmp")) {
+	$inc += 2;
+	push @targets, $oob_target;
+	if ($verbosity > 3) {
+	    printf "found a jump table of size %d\n", hex($table_size);
+	}
+	for (my $i=0; $i<hex($table_size); $i++) {
+	    my $index = 2*($i+65536-make16($sublo,$subhi));
+	    my $l = $raw_text{$index};
+	    my $h = $raw_text{$index+1};
+	    my $targ = 2*make16($l,$h);
+	    
+	    if ($verbosity > 3) {
+		printf "  entry at %x pointing to %x (%s,%s)\n", $index, $targ, $l, $h;
+	    }
+	    
+	    # this is a strong sanity check-- if we've got something
+	    # wrong it's highly unlikely that all jump table entries
+	    # will point to actual instructions
+	    die "tos-ramsize FAIL" if (!defined($insns{$targ}));
+
+	    push @targets, $targ;
+	}
+	return (1, \@targets, $inc);
+    } else {
+	return (0, \@targets, 0);
+    }
+}
+
+# cpi	r30, 0x1D	; 29
+# cpc	r31, r1
+# brcs	.+4      	; 0x39d2 <SchedulerBasicP__TaskBasic__runTask+0x38>
+# jmp	0x547c	; 0x547c <SchedulerBasicP__TaskBasic__runTask+0x1ae2>
+# subi	r30, 0xBA	; 186
+# sbci	r31, 0xFF	; 255
+# add	r30, r30
+# adc	r31, r31
+# lpm	r0, Z+
+# lpm	r31, Z
+# mov	r30, r0
+# ijmp
+
+sub match_jump_table_2 ($) {
+    (my $addr) = @_;
+    my $match;
+    my $reg1;
+    my $reg2;
+    my $immed;
+    my $oob_target;
+    my @targets;
+    my $inc = 0;
+
+    ($match, $reg1, my $table_size) = match_2args ($addr+$inc, "cpi");
+    return (0, \@targets, 0) if (!$match);
+    $inc += 2;
+    
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "cpc");
+    return (0, \@targets, 0) if (!$match);
+    $inc += 2;
+
+    ($match, $immed) = match_branch ($addr+$inc, "brcs");
+    return (0, \@targets, 0) if (!$match);
+    $inc += 2;
+
+    ($match, $oob_target) = match_branch ($addr+$inc, "jmp");
+    return (0, \@targets, 0) if (!$match);
+    $inc += 4;
+
+    ($match, $reg1, my $sublo) = match_2args ($addr+$inc, "subi");
+    return (0, \@targets, 0) if (!$match);
+    $inc += 2;
+
+    ($match, $reg1, my $subhi) = match_2args ($addr+$inc, "sbci");
+    return (0, \@targets, 0) if (!$match);
+    $inc += 2;
+
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "movw");
+    if ($match) {
+	$inc += 2;
+    }
+
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "add");
+    return (0, \@targets, 0) if (!$match);    
+    $inc += 2;
+
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "adc");
+    return (0, \@targets, 0) if (!$match);    
+    $inc += 2;
+
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "lpm");
+    return (0, \@targets, 0) if (!$match || $reg1 ne "r0" || $reg2 ne "Z+");    
+    $inc += 2;
+
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "lpm");
+    return (0, \@targets, 0) if (!$match || $reg1 ne "r31" || $reg2 ne "Z");    
+    $inc += 2;
+
+    ($match, $reg1, $reg2) = match_2args ($addr+$inc, "mov");
+    return (0, \@targets, 0) if (!$match || $reg1 ne "r30" || $reg2 ne "r0");    
+    $inc += 2;
+
+    if (match_0args ($addr+$inc, "ijmp")) {
+	$inc += 2;
+	push @targets, $oob_target;
+	if ($verbosity > 3) {
+	    printf "found a jump table of size %d\n", hex($table_size);
+	}
+	for (my $i=0; $i<hex($table_size); $i++) {
+	    my $index = 2*($i+65536-make16($sublo,$subhi));
+	    my $l = $raw_text{$index};
+	    my $h = $raw_text{$index+1};
+	    my $targ = 2*make16($l,$h);
+	    
+	    if ($verbosity > 3) {
+		printf "  entry at %x pointing to %x (%s,%s)\n", $index, $targ, $l, $h;
+	    }
+	    
+	    # this is a strong sanity check-- if we've got something
+	    # wrong it's highly unlikely that all jump table entries
+	    # will point to actual instructions
+	    die "tos-ramsize FAIL" if (!defined($insns{$targ}));
+
+	    push @targets, $targ;
+	}
+	return (1, \@targets, $inc);
+    } else {
+	return (0, \@targets, 0);
+    }
+}
+
+# in	r28, 0x3d	; 61 
+# in	r29, 0x3e	; 62
+# subi	r28, 0x9D	; 157
+# sbci	r29, 0x00	; 0
+# in	r0, 0x3f	; 63
+# cli
+# out	0x3e, r29	; 62
+# out	0x3f, r0	; 63
+# out	0x3d, r28	; 61
+
+# in	r28, 0x3d	; 61
+# in	r29, 0x3e	; 62
+# sbiw	r28, 0x14	; 20
+# in	r0, 0x3f	; 63
+# cli
+# out	0x3e, r29	; 62
+# out	0x3f, r0	; 63
+# out	0x3d, r28	; 61
+
+sub match_constant_push_1 ($) {
+    (my $addr) = @_;
+    my $hex_addr = sprintf "%x", $addr;
+    my $match;
+    my $reg;
+    my $immed;
+    my $dec;
+    my $inc = 0;
+
+    ($match, $reg, $immed) = match_2args ($addr+$inc, "in");
+    return (0, 0) if (!$match || $reg ne "r28" || $immed ne "0x3d");
+    $inc +=2;
+
+    ($match, $reg, $immed) = match_2args ($addr+$inc, "in");
+    return (0, 0) if (!$match || $reg ne "r29" || $immed ne "0x3e");
+    $inc +=2;
+
+    ($match, $reg, $dec) = match_2args ($addr+$inc, "sbiw");
+    if ($match && $reg eq "r28") {
+	$dec = hex($dec);
+	$inc +=2;
+    } else {
+	($match, $reg, my $dec1) = match_2args ($addr+$inc, "subi");
+	return (0, 0) if (!$match || $reg ne "r28");
+	$inc +=2;
+
+	($match, $reg, my $dec2) = match_2args ($addr+$inc, "sbci");
+	return (0, 0) if (!$match || $reg ne "r29");	
+	$inc +=2;
+
+	$dec = make16($dec1,$dec2);
+    }
+
+    ($match, $reg, $immed) = match_2args ($addr+$inc, "in");
+    return (0, 0) if (!$match || $reg ne "r0" || $immed ne "0x3f");
+    $inc +=2;
+
+    return (0, 0) if (!match_0args($addr+$inc, "cli"));
+    $inc +=2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0) if (!$match || $reg ne "r29" || $immed ne "0x3e");
+    $inc +=2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0) if (!$match || $reg ne "r0" || $immed ne "0x3f");
+    $inc +=2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0) if (!$match || $reg ne "r28" || $immed ne "0x3d");
+    $inc +=2;
+
+    return (1, $dec, $inc);
+}
+
+# in	r28, 0x3d	; 61
+# in	r29, 0x3e	; 62
+# sbiw	r28, 0x05	; 5
+# out	0x3e, r29	; 62
+# out	0x3d, r28	; 61
+
+sub match_constant_push_2 ($) {
+    (my $addr) = @_;
+    my $hex_addr = sprintf "%x", $addr;
+    my $match;
+    my $reg;
+    my $immed;
+    my $dec;
+    my $inc = 0;
+
+    ($match, $reg, $immed) = match_2args ($addr+$inc, "in");
+    return (0, 0) if (!$match || $reg ne "r28" || $immed ne "0x3d");
+    $inc +=2;
+
+    ($match, $reg, $immed) = match_2args ($addr+$inc, "in");
+    return (0, 0) if (!$match || $reg ne "r29" || $immed ne "0x3e");
+    $inc +=2;
+
+    ($match, $reg, $dec) = match_2args ($addr+$inc, "sbiw");
+    return (0, 0) if (!$match || $reg ne "r28");
+    $inc +=2;
+    $dec = hex($dec);
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0) if (!$match || $reg ne "r29" || $immed ne "0x3e");
+    $inc +=2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0) if (!$match || $reg ne "r28" || $immed ne "0x3d");
+    $inc +=2;
+
+    return (1, $dec, $inc);
+}
+
+# rcall	.+0      	; 0x2792 <IPP__icmpv6_input+0x1e>
+
+sub match_constant_push_3 ($) {
+    (my $addr) = @_;
+    my $hex_addr = sprintf "%x", $addr;
+    my $match;
+    my $reg;
+    my $immed;
+    my $dec;
+    my $inc = 0;
+
+    ($match, $reg, $immed) = match_0args ($addr+$inc, "rcall");
+    return (0, 0) if (!$match);
+    return (0, 0) if (get_target($addr) != $addr+$PC_SIZE{$platform});
+    $inc +=2;
+
+    return (1, $PC_SIZE{$platform}, $inc);
+}
+
+# adiw	r28, 0x14	; 20
+# in	r0, 0x3f	; 63
+# cli
+# out	0x3e, r29	; 62
+# out	0x3f, r0	; 63
+# out	0x3d, r28	; 61
+
+sub match_constant_pop_1 ($) {
+    (my $addr) = @_;
+    my $hex_addr = sprintf "%x", $addr;
+    my $match;
+    my $reg;
+    my $immed;
+    my $dec;
+    my $inc = 0;
+
+    ($match, $reg, $immed) = match_2args ($addr+$inc, "adiw");
+    return (0, 0, 0) if (!$match || $reg ne "r28");
+    $dec = -hex($immed);
+    $inc += 2;
+
+    ($match, $reg, $immed) = match_2args ($addr+$inc, "in");
+    return (0, 0, 0) if (!$match || $reg ne "r0" || $immed ne "0x3f");
+    $inc += 2;
+
+    return (0, 0, 0) if (!match_0args($addr+$inc, "cli"));
+    $inc += 2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0, 0) if (!$match || $reg ne "r29" || $immed ne "0x3e");
+    $inc += 2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0, 0) if (!$match || $reg ne "r0" || $immed ne "0x3f");
+    $inc += 2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0, 0) if (!$match || $reg ne "r28" || $immed ne "0x3d");
+    $inc += 2;
+
+    return (1, $dec, $inc);
+}
+
+# adiw	r28, 0x05	; 5
+# out	0x3e, r29	; 62
+# out	0x3d, r28	; 61
+
+sub match_constant_pop_2 ($) {
+    (my $addr) = @_;
+    my $hex_addr = sprintf "%x", $addr;
+    my $match;
+    my $reg;
+    my $immed;
+    my $dec;
+    my $inc = 0;
+
+    ($match, $reg, $immed) = match_2args ($addr+$inc, "adiw");
+    return (0, 0, 0) if (!$match || $reg ne "r28");
+    $dec = -hex($immed);
+    $inc += 2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0, 0) if (!$match || $reg ne "r29" || $immed ne "0x3e");
+    $inc += 2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0, 0) if (!$match || $reg ne "r28" || $immed ne "0x3d");
+    $inc += 2;
+
+    return (1, $dec, $inc);
+}
+
+# in	r28, 0x3d	; 61
+# in	r29, 0x3e	; 62
+# subi	r28, 0x9E	; 158
+# sbci	r29, 0xFF	; 255
+# in	r0, 0x3f	; 63
+# cli
+# out	0x3e, r29	; 62
+# out	0x3f, r0	; 63
+# out	0x3d, r28	; 61
+
+sub match_constant_stack_op ($) {
+    (my $addr) = @_;
+    my $hex_addr = sprintf "%x", $addr;
+    my $match;
+    my $reg;
+    my $immed;
+    my $inc = 0;
+
+    ($match, $reg, my $dec_lo) = match_2args ($addr+$inc, "subi");
+    return (0, 0, 0) if (!$match || $reg ne "r28");
+    $inc += 2;
+
+    ($match, $reg, my $dec_hi) = match_2args ($addr+$inc, "sbci");
+    return (0, 0, 0) if (!$match || $reg ne "r29");
+    $inc += 2;
+    my $dec = make16($dec_lo,$dec_hi);
+    if ($dec > 32768) {
+	$dec = - (65536 - $dec);
+    }
+
+    ($match, $reg, $immed) = match_2args ($addr+$inc, "in");
+    return (0, 0, 0) if (!$match || $reg ne "r0" || $immed ne "0x3f");
+    $inc += 2;
+
+    return (0, 0, 0) if (!match_0args($addr+$inc, "cli"));
+    $inc += 2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0, 0) if (!$match || $reg ne "r29" || $immed ne "0x3e");
+    $inc += 2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0, 0) if (!$match || $reg ne "r0" || $immed ne "0x3f");
+    $inc += 2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0, 0) if (!$match || $reg ne "r28" || $immed ne "0x3d");
+    $inc += 2;
+
+    return (1, $dec, $inc);
+}
+
+# in	r24, 0x3d	; 61
+# in	r25, 0x3e	; 62
+# adiw	r24, 0x06	; 6
+# in	r0, 0x3f	; 63
+# cli
+# out	0x3e, r25	; 62
+# out	0x3f, r0	; 63
+# out	0x3d, r24	; 61
+
+sub match_constant_pop_4 ($) {
+    (my $addr) = @_;
+    my $hex_addr = sprintf "%x", $addr;
+    my $match;
+    my $reg;
+    my $immed;
+    my $stack_inc;
+    my $inc = 0;
+
+    ($match, $reg, $immed) = match_2args ($addr+$inc, "in");
+    return (0, 0) if (!$match || $reg ne "r24" || $immed ne "0x3d");
+    $inc +=2;
+
+    ($match, $reg, $immed) = match_2args ($addr+$inc, "in");
+    return (0, 0) if (!$match || $reg ne "r25" || $immed ne "0x3e");
+    $inc +=2;
+
+    ($match, $reg, $stack_inc) = match_2args ($addr+$inc, "adiw");
+    return (0, 0) if (!$match || $reg ne "r24");
+    $stack_inc = -hex($stack_inc);
+    $inc +=2;
+
+    ($match, $reg, $immed) = match_2args ($addr+$inc, "in");
+    return (0, 0) if (!$match || $reg ne "r0" || $immed ne "0x3f");
+    $inc +=2;
+
+    return (0, 0) if (!match_0args($addr+$inc, "cli"));
+    $inc +=2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0) if (!$match || $reg ne "r25" || $immed ne "0x3e");
+    $inc +=2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0) if (!$match || $reg ne "r0" || $immed ne "0x3f");
+    $inc +=2;
+
+    ($match, $immed, $reg) = match_2args ($addr+$inc, "out");
+    return (0, 0) if (!$match || $reg ne "r24" || $immed ne "0x3d");
+    $inc +=2;
+
+    return (1, $stack_inc, $inc);
+}
+
+# ldi	r26, 0x00	; 0
+# ldi	r27, 0x00	; 0
+# ldi	r30, 0x97	; 151
+# ldi	r31, 0x06	; 6
+# jmp	0x19dc	; 0x19dc <__prologue_saves__+0x4>
+
+sub match_prologue_saves ($) {
+    (my $addr) = @_;
+    my $hex_addr = sprintf "%x", $addr;
+    my $match;
+    my $reg;
+    my $immed;
+    ($match, $reg, my $im_lo) = match_2args ($addr, "ldi");
+    return (0, 0, 0) if (!$match || $reg ne "r26");
+    ($match, $reg, my $im_hi) = match_2args ($addr+2, "ldi");
+    return (0, 0, 0) if (!$match || $reg ne "r27");
+    ($match, $reg, $immed) = match_2args ($addr+4, "ldi");
+    return (0, 0, 0) if (!$match || $reg ne "r30");
+    ($match, $reg, $immed) = match_2args ($addr+6, "ldi");
+    return (0, 0, 0) if (!$match || $reg ne "r31");
+    ($match, my $target) = match_branch ($addr+8, "jmp");
+    return (0, 0, 0) if (!$match);
+    my $ps = $label_to_addr{"__prologue_saves__"};
+    if (defined($ps) &&
+	$target >= $ps &&
+	$target <= ($ps+38)) {
+	# this is a little conservative since we may jump into the middle
+	my $st = 18+make16($im_lo, $im_hi);
+	return (1, $st, 12);
+    }
+    return (0, 0, 0);
+}
+
+# jmp	0x2598	; 0x2598 <__epilogue_restores__+0x14>
+
+sub match_epilogue_restores ($) {
+    (my $addr) = @_;
+    my $hex_addr = sprintf "%x", $addr;
+    my $match;
+    my $reg;
+    my $inc = 0;
+
+    ($match, my $target) = match_branch ($addr+$inc, "jmp");
+    return (0,0) if (!$match);
+    my $er = $label_to_addr{"__epilogue_restores__"};
+    if (defined($er) &&
+	$target >= $er &&
+	$target <= ($er+38)) {
+	$addr += 4;
+	return (1, $ZERO_STACK, $inc);
+    } else {
+	return (0,0);
+    }
+}
+
+sub replace_insn ($$$$) {
+    (my $addr, my $size, my $se, my $name) = @_;
+    $insns{$addr} = $name;
+    $insn_size{$addr} = $size;
+    $stack_effect{$addr} = $se;
+    for (my $i=1; $i<$size; $i++) {
+	delete ($insns{$addr+$i});
+    }
+}
+
+sub make_macro_insns () {
+    foreach my $addr (keys %insns) {
+
+	my $res;
+	my $stack;
+	my $listref;
+	my $size;
+
+	# todo-- factor this into list of function 
+
+	($res, $size, my $initial_depth) = match_init_sp($addr);
+	if ($res) {
+	    if (defined($initial_stack_depth)) {
+		# FIXME: avr-gcc-412 initializes SP both in
+		# crt0 and in main(), we can believe the second one
+		#die "tos-ramsize FAIL: multiple initialization of SP?";
+	    }
+	    die "tos-ramsize FAIL" if ($initial_depth < 0 || $initial_depth >= $RAM_SIZE{$platform});
+	    $initial_stack_depth = $initial_depth;
+	    replace_insn ($addr, $size, 0, "init_sp");
+	}
+
+	($res, $listref, $size) = match_jump_table_1($addr);
+	if ($res) {
+	    replace_insn ($addr, $size, 0, "jump_table");
+	    $jump_lists{$addr} = $listref;
+	}	
+
+	($res, $listref, $size) = match_jump_table_2($addr);
+	if ($res) {
+	    replace_insn ($addr, $size, 0, "jump_table");
+	    $jump_lists{$addr} = $listref;
+	}	
+
+	($res, $stack, $size) = match_constant_push_1 ($addr);
+	if ($res) {
+	    replace_insn ($addr, $size, $stack, "constant_push");
+	}
+
+	($res, $stack, $size) = match_constant_push_2 ($addr);
+	if ($res) {
+	    replace_insn ($addr, $size, $stack, "constant_push");
+	}
+
+	($res, $stack, $size) = match_constant_push_3 ($addr);
+	if ($res) {
+	    replace_insn ($addr, $size, $stack, "constant_push");
+	}
+
+	($res, $stack, $size) = match_constant_pop_1($addr);
+	if ($res) {
+	    replace_insn ($addr, $size, $stack, "constant_pop");
+	}
+
+	($res, $stack, $size) = match_constant_pop_2($addr);
+	if ($res) {
+	    replace_insn ($addr, $size, $stack, "constant_pop");
+	}
+
+	($res, $stack, $size) = match_constant_stack_op($addr);
+	if ($res) {
+	    if ($size > 0) {
+		replace_insn ($addr, $size, $stack, "constant_push");
+	    } else {
+		replace_insn ($addr, $size, $stack, "constant_pop");
+	    }
+	}
+
+	($res, $stack, $size) = match_constant_pop_4 ($addr);
+	if ($res) {
+	    replace_insn ($addr, $size, $stack, "constant_pop");
+	}
+
+	($res, $stack, $size) = match_prologue_saves($addr);
+	if ($res) {
+	    replace_insn ($addr, $size, $stack, "prologue_saves");
+	}
+
+	($res, $stack, $size) = match_epilogue_restores($addr);
+	if ($res) {
+	    # here we ignore the stack effect of epilogue_restores
+	    # since the code includes a "ret" that terminates a thread
+	    # of the analysis
+	    replace_insn ($addr, $size, $stack, "ret");
+	}
+    }
+}
+
+sub make_fine_grain_cfg () {
+    my $last_label;
+    foreach my $addr (sort bynum keys %insns) {
+	my $insn = $insns{$addr};
+	my $hex_addr = sprintf "%x", $addr;
+	my @succ = ();
+	my @callees = ();
+
+	# hack-- we're going to assume this is the name of the
+	# function to which this instruction belongs
+	if (defined($addr_to_label{$addr})) {
+	    $last_label = $addr_to_label{$addr};
+	}
+
+	if ($insn eq "ijmp") {
+	    $diehere{$addr} = "cannot process raw indirect jump at $hex_addr";
+	} elsif ($insn eq "ret" || $insn eq "reti") {
+	    # no control flow from here in our model
+	} elsif (is_branch ($addr) || is_skip ($addr) || is_jmp ($addr)) {
+	    if (is_jmp ($addr) && get_target ($addr) == $ORIGIN) {
+		# jump to origin-- nothing to do since this resets the stack
+	    } else {
+		push @succ, get_target ($addr);
+		if (!is_jmp($addr)) {
+		    push @succ, ($addr + $insn_size{$addr});
+		}
+	    }
+	} elsif ($insn eq "jump_table") {
+	    my $listref = $jump_lists{$addr};
+	    die "tos-ramsize FAIL" if (!defined($listref));
+	    @succ = @{$listref};
+	} elsif (is_fallthrough ($addr)) {
+	    push @succ, ($addr + $insn_size{$addr});
+	    if ($insn eq "out") {
+		(my $immed, my $reg) = parse_pair ($args{$addr});
+		if ($immed eq "0x3d" || $immed eq "0x3e") {
+		    $diehere{$addr} = "cannot process raw store to SP at $hex_addr";
+		}
+	    }
+	} elsif (is_direct_call ($addr) || $insn eq "icall") {
+	    my $target;
+	    if (is_direct_call ($addr)) {
+		$target = get_target ($addr);
+		die "tos-ramsize FAIL" if (!defined($target));
+	    } else {
+		my $target_func = $ICALL_TARGETS{$last_label};
+		if (defined($target_func)) {
+		    $target = $label_to_addr{$target_func};
+		    die "tos-ramsize FAIL" if (!defined($target));
+		} else {
+		    $diehere{$addr} = "cannot process raw indirect call at $hex_addr";
+		}
+	    }
+	    if (defined($target)) {
+		push @callees, $target;
+		my $l = $addr_to_label{$target};
+		if (!defined($l) || !$NORETURN{$addr_to_label{$target}}) {
+		    push @succ, ($addr + $insn_size{$addr});
+		}
+	    }
+	} else {
+	    # data interpreted as instruction; this happens sometimes
+	    delete ($insns{$addr})
+	}
+	
+	$successors{$addr} = \@succ;
+	$call_targets{$addr}= \@callees;
+    }
+}
+
+sub compute_global_size($) {
+    (my $fn) = @_;
+    open INF, "avr-objdump -h $fn |" or die "tos-ramsize FAIL: can't open input file $fn";
+    my $data_size = 0;
+    my $bss_size = 0;
+
+    while (my $line = <INF>) {
+        chomp $line;
+        if ($line =~ /^\s+[0-9]\s.([a-z]+)\s+([0-9a-f]+)/) {
+            if ($1 eq "bss") {
+                $bss_size = hex($2);
+            }
+            if ($1 eq "data") {
+                $data_size = hex($2);
+            }
+        }
+    }
+    close INF;
+    return ($data_size, $bss_size);
+}
+
+sub max ($$) {
+    (my $a, my $b) = @_;
+    if ($a > $b) {
+	return $a;
+    } else {
+	return $b;
+    }
+}
+
+sub min ($$) {
+    (my $a, my $b) = @_;
+    if ($a < $b) {
+	return $a;
+    } else {
+	return $b;
+    }
+}
+
+# $addr is the address of the current instruction
+# $vec is the name of the interrupt vector we're currently looking at
+# $old_depth is the stack depth before executing this instruction
+
+my %stack_map;
+my %max_stack;
+my %visited;
+my %enables_ints;
+
+sub compute_function_stack ($$) {
+    (my $start_addr, my $vec_type) = @_;
+    
+    my $func_name = $addr_to_label{$start_addr};
+    my @worklist = ();
+    my $start_stack;
+    if ($vec_type eq "intr" || $vec_type eq "func") {
+	$start_stack = $PC_SIZE{$platform};
+    } else {
+	die if ($vec_type ne "main");
+	$start_stack = 0;
+    }
+    my @tmpl = ($start_addr, $start_stack);
+    push @worklist, \@tmpl;
+    my %depths;
+    my %callees;
+
+    while (scalar(@worklist) > 0) {
+	my $lref = pop (@worklist);
+	(my $addr, my $old_depth) = @{$lref};
+
+	die "tos-ramsize FAIL" if (!defined $addr);
+	my $hex_addr = sprintf "%x", $addr;
+
+	if (!defined($insns{$addr})) {
+	    die "tos-ramsize FAIL: no instruction at address $hex_addr";
+	}
+
+	my $insn = $insns{$addr};	
+	my $xxx = $diehere{$addr};
+	if (defined ($xxx)) {
+	    die "tos-ramsize FAIL: $xxx";
+	}
+
+	$visited{$addr} = 1;
+
+	# FIXME: nonportable AVR
+	if ($insns{$addr} eq "sei") {
+	    $enables_ints{$start_addr} = 1;
+	}
+
+	my $se = $stack_effect{$addr};
+	die "tos-ramsize FAIL: no stack effect for $insn" if (!defined($se));
+	my $new_depth;
+	if ($se == $ZERO_STACK) {
+	    $new_depth = 0;
+	} else {
+	    $new_depth = $old_depth + $se;
+	}
+
+	if ($verbosity > 5) {
+	    print "  $hex_addr $insn $new_depth\n";
+	}
+	
+	# something is very wrong
+	if ($new_depth > $RAM_SIZE{$platform}) {
+	    printf "tos-ramsize FAIL: stack depth exceeds RAM size at %x\n", $hex_addr;
+	    die;
+	}
+
+	# require balanced stack #1
+	if ($insn eq "reti") {
+	    die "tos-ramsize FAIL" if ($vec_type ne "intr");
+	    die "tos-ramsize FAIL" if ($new_depth != 0);
+	    next;
+	}
+
+	# require balanced stack #2
+	if ($insn eq "ret") {
+	    die "tos-ramsize FAIL" if ($vec_type ne "func");
+	    die "tos-ramsize FAIL -- unbalanced stack on return from $func_name" if ($new_depth != 0);
+	    next;
+	}
+
+	# terminate if we're not learning something new about this address
+	next if (defined($depths{$addr}) && $depths{$addr} >= $new_depth);
+
+	# record new depth
+	$depths{$addr} = $new_depth;
+	if (defined($max_stack{$start_addr})) {
+	    $max_stack{$start_addr} = 
+		max ($new_depth, $max_stack{$start_addr});
+	} else {
+	    $max_stack{$start_addr} = $new_depth;
+	}
+
+	# handle control flow except function calls
+	my $succ_ref = $successors{$addr};
+	my @succ = @{$succ_ref};
+	foreach my $succ_addr (@succ) {
+	    my @ll = ($succ_addr, $new_depth);
+	    push @worklist, \@ll;
+	}
+
+	# handle function calls
+	my $callee_ref = $call_targets{$addr};
+	my @callees = @{$callee_ref};
+	foreach my $callee_addr (@callees) {
+	    $callees{$callee_addr} = 1;
+	    my $my_max;
+	    if (defined($stack_map{$start_addr}{$callee_addr})) {
+		$my_max = max ($stack_map{$start_addr}{$callee_addr}, $new_depth);
+	    } else {
+		$my_max = $new_depth;
+	    }
+	    $stack_map{$start_addr}{$callee_addr} = $my_max;
+	}
+    }
+
+    my @callee_list = keys %callees;
+
+    if ($verbosity > 2) {
+	print "$func_name (max = $max_stack{$start_addr})\n";
+	foreach my $callee (@callee_list) {
+	    print "  -> $addr_to_label{$callee} ";
+	    print "depth $stack_map{$start_addr}{$callee}\n";
+	}
+    }
+    
+    return \@callee_list;
+}
+
+sub analyze_functions () {
+    my @worklist = ();
+    my %seen = ();
+    for (my $vec = 0; $vec < $NUM_VECTORS{$platform}; $vec++) {
+	my $addr = $vec * $VEC_SIZE{$platform};
+	my $label = "vector_$vec";
+	$addr_to_label{$addr} = $label;
+	$label_to_addr{$label} = $addr;
+	my $vec_type;
+	if ($vec == 0) {
+	    $vec_type = "main";
+	} else {
+	    $vec_type = "intr";
+	}
+	my @ll = ($addr, $vec_type);
+	push @worklist, \@ll;
+    }
+    while (scalar(@worklist) > 0) {
+	my $lref = pop @worklist;
+	(my $addr, my $vec_type) = @{$lref};
+	my $hex_addr = sprintf "%x", $addr;
+	next if ($seen{$addr});
+	my $label = $addr_to_label{$addr};
+	if (defined($label) && defined($SPECIAL{$label})) {
+	    $max_stack{$addr} = $SPECIAL{$label};
+	    next;
+	}
+	$seen{$addr} = 1;
+	my $l;
+	my $lab = $addr_to_label{$addr};
+	if (defined($lab)) {
+	    $l = $lab;
+	} else {
+	    $l = "[no label]";
+	}
+
+	my $xlref = compute_function_stack ($addr, $vec_type);
+	my @l = @{$xlref};
+	foreach $addr (@l) {
+	    my @ll = ($addr, "func");
+	    push @worklist, \@ll;
+	}
+    }
+}
+
+# floyd
+sub find_cycles() {
+    my @func_list = keys %max_stack;
+    my %path;
+    my $INFINITY = 9999999;
+    foreach my $x (@func_list) {
+	foreach my $y (@func_list) {
+	    if (defined($stack_map{$x}{$y})) {
+		$path{$x}{$y} = 1;
+	    } else {
+		$path{$x}{$y} = $INFINITY;
+	    }
+	}
+    }
+    foreach my $k (@func_list) {
+	foreach my $i (@func_list) {
+	    foreach my $j(@func_list) {
+		$path{$i}{$j} = 
+		    min ($path{$i}{$j},$path{$i}{$k}+$path{$k}{$j});
+	    }
+	}
+    }
+    my $min_path = $INFINITY;
+    my $min_func;
+    if ($verbosity > 2) {
+	print "self-path lengths in the callgraph:\n";
+    }
+    foreach my $z (@func_list) {
+	my $len = $path{$z}{$z};
+	if ($verbosity > 2) {
+	    print "  $addr_to_label{$z} $len\n";
+	}
+	if ($len < $min_path) {
+	    $min_path = $len;
+	    $min_func = $z;
+	}
+    }
+    if ($min_path != $INFINITY) {
+	print "cannot estimate stack depth due to recursive loop of length $min_path:\n";
+	my $f = $min_func;
+	for (my $i=$min_path-1; $i>0; $i--) {
+	    my @next_list = keys (%{$path{$f}});
+	    my $found;
+	    foreach my $n (@next_list) {
+		if ($path{$n}{$min_func} == $i &&
+		    $path{$n}{$n} == $min_path) {
+		    $found = $n;
+		}
+	    }
+	    die "tos-ramsize FAIL graph algo bug" if (!$found);
+	    printf "  %s @ %x -> %s @ %x\n", $addr_to_label{$f}, $f, $addr_to_label{$found}, $found;
+	    $f = $found;
+	}
+	printf "  %s @ %x -> %s @ %x\n", $addr_to_label{$f}, $f, $addr_to_label{$min_func}, $min_func;
+
+	die "tos-ramsize FAIL";
+    }
+}
+
+my %reachable;
+
+sub find_reachable {
+    (my $addr) = @_;
+    $reachable{$addr} = 1;
+    foreach my $callee (keys (%{$stack_map{$addr}})) {
+	find_reachable($callee);
+    }
+}
+
+my %vector_depth = ();
+my %atomic_vector = ();
+
+sub analyze_vector($$$) {
+    (my $addr, my $vec, my $lref) = @_;
+    my @topo = @{$lref};
+    %reachable = ();
+    $atomic_vector{$vec} = 1;
+    find_reachable ($addr);
+    my %depth = ();
+    my $maxd = 0;
+    my $FAKE = -999;
+    foreach my $v (@topo) {
+	next if (!defined($reachable{$v}));
+	my @edge_list = keys %{$stack_map{$v}};
+	# if any reachable function enables interrupts, the whole vector
+	# in non-atomic
+	if (defined($enables_ints{$v}) && $enables_ints{$v}) {
+	    $atomic_vector{$vec} = 0;
+	}
+	push @edge_list, $FAKE;
+	foreach my $w (@edge_list) {
+	    my $d = $depth{$w};
+	    $d = 0 if (!defined($d));
+	    my $d2 = $depth{$v};
+	    $d2 = 0 if (!defined($d2));
+	    my $edge_weight;
+	    if ($w eq $FAKE) {
+		$edge_weight = $max_stack{$v};
+	    } else {
+		$edge_weight = $stack_map{$v}{$w};
+	    }
+	    $d = max ($d, $d2 + $edge_weight);
+	    $depth{$w} = $d;
+	    $maxd = max ($maxd, $d);
+	}
+	
+    }
+    $vector_depth{$vec} = $maxd;
+}
+
+sub analyze_vectors() {
+    my @topo = ();
+    my %stack_map2 = %stack_map;
+    my @func_list = keys %stack_map2;
+    do {
+        foreach my $f (keys %stack_map2) {
+	    my $in_edges = 0;
+	    foreach my $f2 (keys %stack_map2) {
+		if (defined($stack_map2{$f2}{$f})) {
+		    $in_edges++;
+		}
+	    }
+	    if ($in_edges == 0) {
+		push @topo, $f;
+		delete ($stack_map2{$f});
+	    }
+	}
+    } while (scalar(keys %stack_map2) > 0);
+
+    if ($verbosity > 3) {
+	foreach my $f (@topo) {
+	    my $hex = sprintf "%x", $f;
+	    my $s = $addr_to_label{$f};
+	    print "  $s $hex\n";
+	}
+    }
+    for (my $vec = 0; $vec < $NUM_VECTORS{$platform}; $vec++) {
+	my $addr = $vec * $VEC_SIZE{$platform};
+	analyze_vector ($addr, $vec, \@topo);
+    }
+}
+
+sub analyze_global_stack_usage() {
+    my $max_atomic = 0;
+    my $total_nonatomic = 0;
+    if ($verbosity > 1) {
+	print "\n";
+	print "per-vector results:\n";
+    }
+    for (my $vec = 0; $vec < $NUM_VECTORS{$platform}; $vec++) {
+	my $addr = $vec * $VEC_SIZE{$platform};
+	my $maxd = $vector_depth{$vec};
+	my $s = "";
+	$s .= sprintf "  vector %d max depth = %d", $vec, $maxd;
+	my $atom = $atomic_vector{$vec};
+	if (defined($atom) && $atom) {
+	    $s .= " (atomic)";
+	    $max_atomic = max ($max_atomic, $maxd);
+	} else {
+	    $s .= " (not atomic)";
+	    $total_nonatomic += $maxd;
+	}
+	if ($verbosity > 1 && $maxd != $PC_SIZE{$platform}) {
+	    print "$s\n";
+	}
+    }
+    
+    my $depth = $total_nonatomic + $max_atomic;
+    return $depth;
+}
+
+##########################################################################
+################################ MAIN ####################################
+##########################################################################
+
+# redirect stderr to stdout, don't buffer stdout
+open(STDERR,'>&', STDOUT);
+$|=1;
+
+my $result = GetOptions ("verbosity=i" => \$verbosity);
+die "tos-ramsize FAIL" if (!$result);
+
+if (scalar(@ARGV) != 2) {
+    die "usage: ramsize.pl [-verbosity 0-9] mica2|micaz|iris avr_file.elf";
+}
+
+$platform = $ARGV[0];
+die "tos-ramsize FAIL: unknown platform '$platform'" if (!defined($RAM_SIZE{$platform}));
+
+my $file = $ARGV[1];
+die "tos-ramsize FAIL: '$file' not found" if (!(-f $file));
+
+if ($verbosity > 1) {
+    print "analyzing elf file '$file' for platform '$platform'\n";
+}
+
+disassemble ($file);
+insn_stack_effects();
+make_macro_insns();
+make_fine_grain_cfg();
+analyze_functions();
+find_cycles();
+analyze_vectors();
+my $total_depth = analyze_global_stack_usage();
+
+(my $data_size, my $bss_size) = compute_global_size($file);
+my $ramused = $data_size + $bss_size + $total_depth;
+my $free_mem = $RAM_SIZE{$platform} - $ramused;
+
+if ($verbosity > 2) {
+    foreach my $addr (sort bynum keys %insns) {
+	if (!$visited{$addr}) {
+	    my $l = $addr_to_label{$addr};
+	    if (defined($l) && !defined($SPECIAL{$l})) {
+		printf "unreachable label: %x %s\n", $addr, $l;
+	    }
+	}
+    }
+}
+
+if ($verbosity > 0) {
+    print "BSS segment size is ${bss_size}, data segment size is ${data_size}\n";
+}
+print "The upper bound on stack size is ${total_depth}\n";
+print "The upper bound on RAM usage is $ramused\n";
+print "There are $free_mem unused bytes of RAM\n";
+
+##########################################################################
diff --git a/tools/tinyos/safe/tos-ramsize.1 b/tools/tinyos/safe/tos-ramsize.1
new file mode 100755
index 00000000..20ddd7b5
--- /dev/null
+++ b/tools/tinyos/safe/tos-ramsize.1
@@ -0,0 +1,16 @@
+.TH tos-ramsize 1 "Apr 10, 2009"
+.LO 1
+.SH NAME
+
+tos-ramsize - Compute RAM usage of a TinyOS application including the stack
+.SH SYNOPSIS
+
+\fBtos-ramsize\fR [-verbosity=n] mica2|micaz|iris elf-file
+.SH DESCRIPTION
+
+This tool disassembles an elf file for AVR-based TinyOS platforms and
+estimates the maximum extent of its call stack.  This number is
+reported, along with the total static and dynamic RAM usage.
+
+The primary documentation for this tool can be found on the TinyOS
+Documentation Wiki.
diff --git a/tools/tinyos/tosthreads/.cvsignore b/tools/tinyos/tosthreads/.cvsignore
new file mode 100644
index 00000000..57e12bf3
--- /dev/null
+++ b/tools/tinyos/tosthreads/.cvsignore
@@ -0,0 +1,3 @@
+Makefile
+Makefile.in
+tosthreads-dynamic-app
diff --git a/tools/tinyos/tosthreads/Makefile.am b/tools/tinyos/tosthreads/Makefile.am
new file mode 100644
index 00000000..c2266150
--- /dev/null
+++ b/tools/tinyos/tosthreads/Makefile.am
@@ -0,0 +1,15 @@
+AUTOMAKE_OPTIONS = foreign
+
+dist_man_MANS = tosthreads-dynamic-app.1
+
+tosthreadslibdir=$(libdir)/tinyos/tosthreads
+
+bin_SCRIPTS = tosthreads-dynamic-app \
+              tosthreads-gen-dynamic-app
+
+tosthreadslib_DATA = tosthreads_standard_api.py
+                     
+tosthreads-dynamic-app: tosthreads-dynamic-app.in
+	sed -e 's,@tosthreadslibdir\@,$(tosthreadslibdir),g' tosthreads-dynamic-app.in >$@      
+	sed -e 's,@pathpython\@,$(pathpython),g' $@ > $@.temp 
+	mv $@.temp $@
diff --git a/tools/tinyos/tosthreads/tosthreads-dynamic-app.1 b/tools/tinyos/tosthreads/tosthreads-dynamic-app.1
new file mode 100644
index 00000000..8e80076b
--- /dev/null
+++ b/tools/tinyos/tosthreads/tosthreads-dynamic-app.1
@@ -0,0 +1,16 @@
+.TH tosthreads-dynamic-app 1 "May 29, 2008"
+.LO 1
+.SH NAME
+
+tosthreads-dynamic-app - Generate a TOSThreads dynamically loadable binary
+from an ELF object file
+.SH SYNOPSIS
+
+\fBtosthreads-dynamic-app\fR [\fB-a --array --api=<standard, tenet>\fR] \fI<obj_file> <bin_file> <tos_file>\fR
+.SH DESCRIPTION
+
+\fBtosthreads-dynamic-app\fR generates a TOSThreads dynamically loadable binary
+from an ELF object file.
+.SH EXAMPLES
+
+ tosthreads-dynamic-app -a --api=standard  main.o main.bin main.tos
diff --git a/tools/tinyos/tosthreads/tosthreads-dynamic-app.in b/tools/tinyos/tosthreads/tosthreads-dynamic-app.in
new file mode 100644
index 00000000..7ab960d5
--- /dev/null
+++ b/tools/tinyos/tosthreads/tosthreads-dynamic-app.in
@@ -0,0 +1,342 @@
+#!@pathpython@
+
+# Copyright (c) 2008 Johns Hopkins University.
+# All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+# @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+# @author Kevin Klues <klueska@cs.stanford.edu>
+
+import sys, subprocess
+import struct
+sys.path.append("@tosthreadslibdir@")
+
+def error_exit( s ):
+    sys.stderr.write("\n" + s + "\n\n")
+    exit( 2 )
+    
+def exit_usage():
+  error_exit( "Usage: tosthreads-dynamic-app [-a --array --api=<standard, tenet> ] <obj_file> <bin_file> <tos_file>" )
+
+#Handle arguments........
+from getopt import *
+try:
+  opts, args = getopt(sys.argv[1:], "a" ,['array', 'api='])
+except GetoptError, err:
+  print str(err) # will print something like "option -a not recognized"
+  exit_usage()
+
+array_opt = False
+api_opt = False
+valid_apis = ["standard", "tenet"];
+for o, a in opts:
+  if o == "--api" and (a not in valid_apis):
+    exit_usage()
+  elif o == "--api" and a == "tenet":
+    api_opt = True
+    import tosthreads_tenet_api as tosthread_slcs_extfun
+  elif o == "--api" and a == "standard":
+    api_opt = True
+    import tosthreads_standard_api as tosthread_slcs_extfun
+  elif o == "-a" or o == "--array":
+    array_opt = True
+  else:
+    exit_usage()
+
+if api_opt == False:
+  import tosthreads_standard_api as tosthread_slcs_extfun
+
+if len( args ) != 3:
+  exit_usage()
+
+def slice(v, s):
+    r = []
+    for i in range(0, len(v), s):
+        r.append(v[i:i+s])
+    return r
+
+def cmp(x, y):
+    if int(x[0]) > int(y[0]):
+      return 1
+    elif int(x[0]) == int(y[0]):
+      if x[1] > y[1]:
+        return 1
+      elif x[1] == y[1]:
+        return 0
+      else:
+        return -1
+    else:
+      return -1
+
+# ===== STEP 0: Prepares function-ID maps ===== #
+map_extfun = tosthread_slcs_extfun.map_extfun
+
+map_hook = {"tosthread_main":0}
+map_intfun = dict()
+map_intfun_counter = 0
+
+# ===== STEP 1: Reads in the binary of the loadable program ===== #
+s = open(args[1]).read()
+code = ["0x%02x" % (struct.unpack("B", i)) for i in s]
+
+# ===== STEP 2: Allocation Table ===== #
+var = {}   # var[variable_name] = (variable_size, allocated_addr)
+alloc = {}   # alloc[variable_name] = ((offset, addr), (offset, addr), ...)
+compact_alloc = []   # Final allocation table: [("real" addr, next patching addr), ...]
+compact_alloc_binary = []
+dataSection = {}
+dataSection_values = []
+dataSection_values_binary = []
+
+# Gets variables' name and size
+p = subprocess.Popen(["msp430-readelf", "-W", "-s", args[0]], stdout=subprocess.PIPE)
+line = p.stdout.readline()
+fm_addr = 0
+while line:
+    v = line.split()
+    if len(v) == 8 and v[4] == "GLOBAL" and (v[6] == "COM" or v[6] == "3"):
+        name = v[-1]
+        if name != "TOS_NODE_ID":
+            size = int(v[2])
+            var[name] = [size, fm_addr]
+            alloc[name] = []   # Filled later
+            
+            if v[6] == "3":
+                dataSection[name] = [int(v[1], 16)]
+                
+            fm_addr += size
+    line = p.stdout.readline()
+
+# Gets the variables' location in the loadable program
+p = subprocess.Popen(["msp430-readelf", "-W", "-r", args[0]], stdout=subprocess.PIPE)
+line = p.stdout.readline()
+while line:
+    v = line.split()
+    if len(v) == 7:
+        name = v[4]
+        if name in var and name != "TOS_NODE_ID":
+            addr = int(v[0], 16)
+            offset = int(v[-1], 16)
+            alloc[name].append([offset, addr])
+    line = p.stdout.readline()
+
+# Patches the binary for address-chaining, and compacts the allocation table
+for name in alloc.keys():
+    alloc[name].sort(cmp)   # Sort by offset, then addr
+    for i in range(len(alloc[name])):
+        # Sees if address-chaining if necessary
+        if (i + 1) < len(alloc[name]) and alloc[name][i][0] == alloc[name][i + 1][0]:
+            code[alloc[name][i][1]] = "0x%02x" % ((alloc[name][i + 1][1]) & 0xFF)
+            code[alloc[name][i][1] + 1] = "0x%02x" % ((alloc[name][i + 1][1] >> 8) & 0xFF)
+        
+        # Sees if the current entry should be included
+        if i == 0 or (alloc[name][i - 1][0] != alloc[name][i][0]):
+            real_addr = var[name][1] + alloc[name][i][0]   # "real" address = FM + offset
+            compact_alloc.append("{%d, (void*)0x%04x}   /* %s + %d */" % (real_addr, alloc[name][i][1], name, alloc[name][i][0]))   # ["real" addr, next patching addr]
+            compact_alloc_binary.append("0x%02x" % (real_addr & 0xFF))
+            compact_alloc_binary.append("0x%02x" % ((real_addr >> 8) & 0xFF))
+            compact_alloc_binary.append("0x%02x" % (alloc[name][i][1] & 0xFF))
+            compact_alloc_binary.append("0x%02x" % ((alloc[name][i][1] >> 8) & 0xFF))
+            
+            if name in dataSection.keys():
+                #print ".data:", real_addr, dataSection[name][0], var[name][0]
+                dataSection_values_binary.append("0x%02x" % (real_addr & 0xFF))
+                dataSection_values_binary.append("0x%02x" % ((real_addr >> 8) & 0xFF))
+                dataSection_values_binary.append("0x%02x" % (dataSection[name][0] & 0xFF))
+                dataSection_values_binary.append("0x%02x" % ((dataSection[name][0] >> 8) & 0xFF))
+                dataSection_values_binary.append("0x%02x" % (var[name][0] & 0xFF))
+                dataSection_values_binary.append("0x%02x" % ((var[name][0] >> 8) & 0xFF))
+
+# ===== STEP 3: Full relocation table (compacted in step 5) ===== #
+fun = []
+global_fun = []
+local_fun = []
+# Gets both where functions are called and where it is located
+p = subprocess.Popen(["msp430-readelf", "-W", "-s", args[0]], stdout=subprocess.PIPE)
+line = p.stdout.readline()
+while line:
+    v = line.split()
+    if len(v) == 8 and v[4] == "GLOBAL":
+        if v[3] == "NOTYPE" or v[3] == "FUNC":
+            fun.append(v[-1])
+    line = p.stdout.readline()
+
+# Gets global and local function calls and their locations in the loadable program
+p = subprocess.Popen(["msp430-readelf", "-W", "-r", args[0]], stdout=subprocess.PIPE)
+line = p.stdout.readline()
+while line and line != "There are no relocations in this file.\n":
+    v = line.split()
+    if len(v) == 7:
+        name = v[4]
+        addr = int(v[0], 16)
+        offset = int(v[-1], 16)
+        if name in fun:
+            if offset != 0:
+                print "ERROR: Non zero offset for", name, "at", offset
+            
+            if map_extfun.has_key(name):
+                global_fun.append([map_extfun[name], addr, name])
+            else:
+                if not map_intfun.has_key(name):
+                  map_intfun[name] = [map_intfun_counter, 0]   # fun_id, addr
+                  map_intfun_counter += 1
+                local_fun.append([map_intfun[name][0], addr, name])
+    line = p.stdout.readline()
+
+# ===== STEP 4: Global and local symbol tables ===== #
+global_sym = []
+local_sym = []
+global_sym_binary = []
+compact_global_sym_binary = ["0x00", "0x00"]   # Just have address to one symbol (should be to main())
+p = subprocess.Popen(["msp430-objdump", "-t", args[0]], stdout=subprocess.PIPE)
+line = p.stdout.readline()
+while line:
+    v = line.split()
+    if len(v) == 6 and \
+       v[1] == "g" and v[2] == 'F' and v[3] == '.text':
+        name = v[5]
+        addr = int(v[0], 16)
+        if map_hook.has_key(name):
+            global_sym.append('{%d, (void*)0x%04x}   /* %s */' % (map_hook[name], addr, name))
+            global_sym_binary.append("0x%02x" % (map_hook[name] & 0xFF))
+            global_sym_binary.append("0x%02x" % ((map_hook[name] >> 8) & 0xFF))
+            global_sym_binary.append("0x%02x" % (addr & 0xFF))
+            global_sym_binary.append("0x%02x" % ((addr >> 8) & 0xFF))
+            compact_global_sym_binary = ["0x%02x" % (addr & 0xFF)]
+            compact_global_sym_binary.append("0x%02x" % ((addr >> 8) & 0xFF))
+        else:
+            if map_intfun.has_key(name):
+                local_sym.append('{%s, (void*)0x%04x}   /* %s */' % (map_intfun[name][0], addr, name))
+                map_intfun[name] = [map_intfun[name][0], addr]
+    line = p.stdout.readline()
+
+# ===== STEP 5: Patches the binary for address-chaining, and compacts the relocation table ===== #
+global_fun_binary = []
+local_fun_binary = []
+# Patches the binary code
+global_fun.sort(cmp)
+for i in range(len(global_fun)):
+    # Sees if address-chaining if necessary
+    if (i + 1) < len(global_fun) and global_fun[i][0] == global_fun[i + 1][0]:
+        code[global_fun[i][1]] = "0x%02x" % ((global_fun[i + 1][1]) & 0xFF)
+        code[global_fun[i][1] + 1] = "0x%02x" % ((global_fun[i + 1][1] >> 8) & 0xFF)
+local_fun.sort(cmp)
+for i in range(len(local_fun)):
+    # Sees if address-chaining if necessary
+    if (i + 1) < len(local_fun) and local_fun[i][0] == local_fun[i + 1][0]:
+        code[local_fun[i][1]] = "0x%02x" % ((local_fun[i + 1][1]) & 0xFF)
+        code[local_fun[i][1] + 1] = "0x%02x" % ((local_fun[i + 1][1] >> 8) & 0xFF)
+
+# Compacts the relocation table
+i = 0
+while True:
+    if i >= len(global_fun):
+        break
+    
+    if (i + 1) < len(global_fun) and (global_fun[i][0] == global_fun[i + 1][0]):
+        del global_fun[i + 1]
+    else:
+        global_fun_binary.append("0x%02x" % (global_fun[i][0] & 0xFF))
+        global_fun_binary.append("0x%02x" % ((global_fun[i][0] >> 8) & 0xFF))
+        global_fun_binary.append("0x%02x" % (global_fun[i][1] & 0xFF))
+        global_fun_binary.append("0x%02x" % ((global_fun[i][1] >> 8) & 0xFF))
+        global_fun[i] = '{%d, (void*)0x%04x}   /* %s */' % (global_fun[i][0], global_fun[i][1], global_fun[i][2])
+        i += 1
+i = 0
+while True:
+    if i >= len(local_fun):
+        break
+    
+    if (i + 1) < len(local_fun) and (local_fun[i][0] == local_fun[i + 1][0]):
+        del local_fun[i + 1]
+    else:
+        local_fun_binary.append("0x%02x" % (map_intfun[local_fun[i][2]][1] & 0xFF))
+        local_fun_binary.append("0x%02x" % ((map_intfun[local_fun[i][2]][1] >> 8) & 0xFF))
+        local_fun_binary.append("0x%02x" % (local_fun[i][1] & 0xFF))
+        local_fun_binary.append("0x%02x" % ((local_fun[i][1] >> 8) & 0xFF))
+        local_fun[i] = '{%d, (void*)0x%04x}   /* %s */' % (map_intfun[local_fun[i][2]][1], local_fun[i][1], local_fun[i][2])
+        i += 1
+
+# ===== STEP 6: Prints out the image ===== #
+#print "uint16_t g_sym_count = %d;" % (len(global_sym))
+#print "uint16_t alloc_count = %d;" % (len(compact_alloc))
+#print "uint16_t g_reloc_count = %d;" % (len(global_fun))
+#print "uint16_t l_reloc_count = %d;" % (len(local_fun))
+#print "uint16_t code_count = %d;" % (len(code))
+#print
+#
+#print "uint8_t patch_table[] = {"
+#print "\t%s,\n" % (",\n\t".join([", ".join(l) for l in slice(compact_alloc_binary, 16)]))   # Allocation table
+#print "\t%s,\n" % (",\n\t".join([", ".join(l) for l in slice(global_fun_binary, 16)]))      # Global relocation table
+#print "\t%s\n};" % (",\n\t".join([", ".join(l) for l in slice(local_fun_binary, 16)]))      # Local relocation table
+#print
+#print "struct value_addr_pair patch_table[] = {"
+#print "\t%s,\n" % (",\n\t".join(compact_alloc))   # Allocation table
+#print "\t%s,\n" % (",\n\t".join(global_fun))      # Global relocation table
+#print "\t%s\n};" % (",\n\t".join(local_fun))      # Local relocation table
+#print
+#
+#print "struct value_addr_pair g_syma[] = {\n\t%s\n};" % (",\n\t".join(global_sym))   # Global symbol table
+#print "uint8_t g_sym[] = {\n\t%s\n};" % (",\n\t".join([", ".join(l) for l in slice(global_sym_binary, 16)]))
+#print
+#
+#print "uint8_t code[] = {\n\t%s\n};" % (",\n\t".join([", ".join(l) for l in slice(code, 16)]))   # The binary code of the loadable program
+#print
+
+# Don't need it because local_fun has the following information already
+## Local symbol table
+#print "uint16_t l_sym_count = %d;" % (len(local_sym))
+#print "struct addr_addr_pair l_sym[] = {\n\t%s\n};" % (",\n\t".join(local_sym))
+#print
+
+binary_image = compact_global_sym_binary
+binary_image.extend(["0x%02x" % (i) for i in [#len(global_sym) & 0xFF, (len(global_sym) >> 8) & 0xFF,
+                                              len(compact_alloc) & 0xFF, (len(compact_alloc) >> 8) & 0xFF,
+                                              fm_addr & 0xFF, (fm_addr >> 8) & 0xFF,
+                                              len(global_fun) & 0xFF, (len(global_fun) >> 8) & 0xFF,
+                                              len(local_fun) & 0xFF, (len(local_fun) >> 8) & 0xFF,
+                                              (len(dataSection_values_binary) / 6) & 0xFF, ((len(dataSection_values_binary) / 6) >> 8) & 0xFF,
+                                              len(code) & 0xFF, (len(code) >> 8) & 0xFF]])
+
+#binary_image.extend(global_sym_binary)
+binary_image.extend(compact_alloc_binary)
+binary_image.extend(global_fun_binary)
+binary_image.extend(local_fun_binary)
+binary_image.extend(dataSection_values_binary)
+binary_image.extend(code)
+
+#print len(code)
+
+f = open(args[2], 'wb')
+for i in binary_image:
+    f.write(struct.pack("B", int(i, 16)))
+
+if array_opt:
+  print "uint8_t code[] = {\n\t%s\n};" % (",\n\t".join([", ".join(l) for l in slice(binary_image, 16)]))
diff --git a/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app b/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app
new file mode 100755
index 00000000..413b6623
--- /dev/null
+++ b/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app
@@ -0,0 +1,95 @@
+#!/bin/bash
+
+# Copyright (c) 2008 Johns Hopkins University.
+# All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+
+if [ $# -ne 1 -a $# -ne 2 ]
+then
+  echo "Usage: `basename $0` path_to_cthread_app [options]"
+  echo ""
+  echo "-a --array"
+  echo "     Print out the loadable binary code as a byte array."
+  exit -1
+fi
+
+CFILE=$1
+FLAG=$2
+
+GCC="msp430-gcc"
+OBJCOPY="msp430-objcopy"
+NESCFLAGS="-target=telosb -x nesc -fnesc-target=msp430"
+CFLAGS="-c -gcc=$GCC -mmcu=msp430x1611 -Os -mdisable-hwmul -Wall -Wshadow"
+
+OBJFILE=`basename $CFILE .c`.o
+BINFILE=`basename $CFILE .c`.bin
+TOSFILE=`basename $CFILE .c`.tos
+
+TOS_THREADS_DIR=$TOSDIR/lib/tosthreads
+THREADS_CSYSTEM_DIR=$TOS_THREADS_DIR/csystem
+THREADS_SYSTEM_DIR=$TOS_THREADS_DIR/system
+THREADS_INTERFACES_DIR=$TOS_THREADS_DIR/interfaces
+THREADS_TYPES_DIR=$TOS_THREADS_DIR/types
+THREADS_MSP430_DIR=$TOS_THREADS_DIR/chips/msp430
+THREADS_TMOTE_SENSORS_DIR=$TOS_THREADS_DIR/tos/sensorboards/tmote_onboard
+THREADS_PRINTF_DIR=$TOS_THREADS_DIR/tos/lib/printf
+TOS_TELOSA_DIR=$TOSDIR/platforms/telosa
+TOS_TELOSB_DIR=$TOSDIR/platforms/telosb
+TOS_CC2420_DIR=$TOSDIR/chips/cc2420
+TOS_SERIAL_DIR=$TOSDIR/lib/serial
+TOS_SYSTEM_DIR=$TOSDIR/system
+TOS_TYPES_DIR=$TOSDIR/types
+
+#Set up includes 
+CFLAGS="$CFLAGS -I$THREADS_CSYSTEM_DIR -I$THREADS_SYSTEM_DIR -I$THREADS_INTERFACES_DIR -I$THREADS_TYPES_DIR -I$THREADS_MSP430_DIR"
+CFLAGS="$CFLAGS -I$THREADS_PRINTF_DIR"
+CFLAGS="$CFLAGS -I$THREADS_TMOTE_SENSORS_DIR"
+CFLAGS="$CFLAGS -DTOSTHREAD_EXTERNAL_BINARY"
+
+#Set up the proper scheduler
+NESCFLAGS="$NESCFLAGS -tosscheduler=TinyTaskSchedulerC,TinyTaskSchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask"
+
+rm -rf $OBJFILE
+rm -rf $TOSFILE
+
+COMMAND="ncc $CFLAGS $NESCFLAGS $CFILE"
+echo $COMMAND
+command  $COMMAND
+
+COMMAND="$OBJCOPY --output-target=binary $OBJFILE $BINFILE"
+echo $COMMAND
+command  $COMMAND
+
+COMMAND="tosthreads-dynamic-app $FLAG $OBJFILE $BINFILE $TOSFILE"
+echo $COMMAND
+command $COMMAND
+rm $BINFILE
+rm $OBJFILE
diff --git a/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1 b/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1
new file mode 100755
index 00000000..5f6abc29
--- /dev/null
+++ b/tools/tinyos/tosthreads/tosthreads-gen-dynamic-app.1
@@ -0,0 +1,63 @@
+#!/bin/bash
+
+if [ $# -ne 1 -a $# -ne 2 ]
+then
+  echo "Usage: `basename $0` path_to_cthread_app [options]"
+  echo ""
+  echo "-a --array"
+  echo "     Print out the loadable binary code as a byte array."
+  exit -1
+fi
+
+CFILE=$1
+FLAG=$2
+
+GCC="msp430-gcc"
+OBJCOPY="msp430-objcopy"
+NESCFLAGS="-target=telosb -x nesc -fnesc-target=msp430"
+CFLAGS="-c -gcc=$GCC -mmcu=msp430x1611 -Os -mdisable-hwmul -Wall -Wshadow"
+
+OBJFILE=`basename $CFILE .c`.o
+BINFILE=`basename $CFILE .c`.bin
+TOSFILE=`basename $CFILE .c`.tos
+
+TOS_THREADS_DIR=$TOSDIR/lib/tosthreads
+THREADS_CSYSTEM_DIR=$TOS_THREADS_DIR/csystem
+THREADS_SYSTEM_DIR=$TOS_THREADS_DIR/system
+THREADS_INTERFACES_DIR=$TOS_THREADS_DIR/interfaces
+THREADS_TYPES_DIR=$TOS_THREADS_DIR/types
+THREADS_MSP430_DIR=$TOS_THREADS_DIR/chips/msp430
+THREADS_TMOTE_SENSORS_DIR=$TOS_THREADS_DIR/tos/sensorboards/tmote_onboard
+THREADS_PRINTF_DIR=$TOS_THREADS_DIR/tos/lib/printf
+TOS_TELOSA_DIR=$TOSDIR/platforms/telosa
+TOS_TELOSB_DIR=$TOSDIR/platforms/telosb
+TOS_CC2420_DIR=$TOSDIR/chips/cc2420
+TOS_SERIAL_DIR=$TOSDIR/lib/serial
+TOS_SYSTEM_DIR=$TOSDIR/system
+TOS_TYPES_DIR=$TOSDIR/types
+
+#Set up includes 
+CFLAGS="$CFLAGS -I$THREADS_CSYSTEM_DIR -I$THREADS_SYSTEM_DIR -I$THREADS_INTERFACES_DIR -I$THREADS_TYPES_DIR -I$THREADS_MSP430_DIR"
+CFLAGS="$CFLAGS -I$THREADS_PRINTF_DIR"
+CFLAGS="$CFLAGS -I$THREADS_TMOTE_SENSORS_DIR"
+CFLAGS="$CFLAGS -DTOSTHREAD_EXTERNAL_BINARY"
+
+#Set up the proper scheduler
+NESCFLAGS="$NESCFLAGS -tosscheduler=TinyTaskSchedulerC,TinyTaskSchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask"
+
+rm -rf $OBJFILE
+rm -rf $TOSFILE
+
+COMMAND="ncc $CFLAGS $NESCFLAGS $CFILE"
+echo $COMMAND
+command  $COMMAND
+
+COMMAND="$OBJCOPY --output-target=binary $OBJFILE $BINFILE"
+echo $COMMAND
+command  $COMMAND
+
+COMMAND="tosthreads-dynamic-app $FLAG $OBJFILE $BINFILE $TOSFILE"
+echo $COMMAND
+command $COMMAND
+rm $BINFILE
+rm $OBJFILE
diff --git a/tools/tinyos/tosthreads/tosthreads_standard_api.py b/tools/tinyos/tosthreads/tosthreads_standard_api.py
new file mode 100644
index 00000000..5f94893b
--- /dev/null
+++ b/tools/tinyos/tosthreads/tosthreads_standard_api.py
@@ -0,0 +1,108 @@
+#!/usr/bin/python
+
+# Copyright (c) 2008 Johns Hopkins University.
+# All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+# @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+
+import sys, subprocess
+import struct
+
+
+# ===== STEP 0: Prepares function-ID maps ===== #
+map_extfun = {
+              "tosthread_sleep":0, "tosthread_create":1,
+
+              "led0On":2, "led1On":3, "led2On":4, 
+              "led0Off":5, "led1Off":6, "led2Off":7, 
+              "led0Toggle":8, "led1Toggle":9, "led2Toggle":10,
+
+              "amSerialStart":11, "amSerialStop":12, "amSerialReceive":13,
+              "amSerialSend":14, "amSerialLocalAddress":15, "amSerialGetLocalGroup":16,
+              "amSerialGetDestination":17, "amSerialGetSource":18, "amSerialSetDestination":19,
+              "amSerialSetSource":20, "amSerialIsForMe":21, "amSerialGetType":22,
+              "amSerialSetType":23, "amSerialGetGroup":24, "amSerialSetGroup":25,
+              "serialClear":26, "serialGetPayloadLength":27, "serialSetPayloadLength":28,
+              "serialMaxPayloadLength":29, "serialGetPayload":30, "serialRequestAck":31,
+              "serialNoAck":32, "serialWasAcked":33,
+              
+              "amRadioStart":34, "amRadioStop":35, "amRadioReceive":36,
+              "amRadioSend":37, "amRadioGetLocalAddress":38, "amRadioGetLocalGroup":39,
+              "amRadioGetDestination":40, "amRadioGetSource":41, "amRadioSetDestination":42,
+              "amRadioSetSource":43, "amRadioIsForMe":44, "amRadioGetType":45,
+              "amRadioSetType":46, "amRadioGetGroup":47, "amRadioSetGroup":48,
+              "radioClear":49, "radioGetPayloadLength":50, "radioSetPayloadLength":51,
+              "radioMaxPayloadLength":52, "radioGetPayload":53, "radioRequestAck":54,
+              "radioNoAck":55, "radioWasAcked":56,
+                
+              "semaphore_reset":57, "semaphore_acquire":58, "semaphore_release":59,
+                
+              "barrier_reset":60, "barrier_block":61, "barrier_isBlocking":62,
+                
+              "condvar_init":63, "condvar_wait":64, "condvar_signalNext":65,
+              "condvar_signalAll":66, "condvar_isBlocking":67,
+                
+              "mutex_init":68, "mutex_lock":69, "mutex_unlock":70,
+                
+              "volumeBlockRead":71, "volumeBlockWrite":72, "volumeBlockCrc":73,
+              "volumeBlockErase":74, "volumeBlockSync":75,
+                
+              "refcounter_init":76, "refcounter_increment":77, "refcounter_decrement":78,
+              "refcounter_waitOnValue":79, "refcounter_count":80,
+              
+              "amRadioSnoop":81,
+              
+              "queue_init":82, "queue_clear":83, "queue_push":84,
+              "queue_pop":85, "queue_remove":86, "queue_size":87,
+              "queue_is_empty":88,
+              
+              "sensirionSht11_humidity_read":89, "sensirionSht11_humidity_getNumBits":90, "sensirionSht11_temperature_read":91,
+              "sensirionSht11_temperature_getNumBits":92,
+  
+              "hamamatsuS10871_tsr_read":93, "hamamatsuS10871_tsr_readStream":94, "hamamatsuS10871_tsr_getNumBits":95,
+  
+              "hamamatsuS1087_par_read":96, "hamamatsuS1087_par_readStream":97, "hamamatsuS1087_par_getNumBits":98,
+              
+              "volumeLogRead":99, "volumeLogCurrentReadOffset":100, "volumeLogSeek":101,
+              "volumeLogGetSize":102,
+              
+              "volumeLogAppend":103, "volumeLogCurrentWriteOffset":104, "volumeLogErase":105,
+              "volumeLogSync":106,
+
+              "getLeds":107, "setLeds":108,
+
+              "__divmodhi4":109,
+              
+              "tosthread_join":110,
+              
+              "volumeConfigMount":111, "volumeConfigRead":112, "volumeConfigWrite":113,
+              "volumeConfigCommit":114, "volumeConfigGetSize":115, "volumeConfigValid":116}
+
diff --git a/tos/.default-platform b/tos/.default-platform
new file mode 100644
index 00000000..19765bd5
--- /dev/null
+++ b/tos/.default-platform
@@ -0,0 +1 @@
+null
diff --git a/tos/chips/README b/tos/chips/README
new file mode 100644
index 00000000..57469ab2
--- /dev/null
+++ b/tos/chips/README
@@ -0,0 +1,70 @@
+==============================================
+Directory Description:     tos/chips 
+==============================================
+:$Id: README,v 1.4 2006-12-12 18:23:02 vlahan Exp $
+
+:TinyOS-Version: 2.0
+:Author: Martin Turon
+
+:Created: 14-Feb-2005
+:Version: $Revision: 1.4 $
+:Modified: $Date: 2006-12-12 18:23:02 $
+
+1. Introduction
+====================================================================
+
+Platform dependant code independent of a specific platform
+----------------------------------------------------------
+
+The tos/chips directory is designed to house code to drive a 
+particular chip in a way that can be shared across disparate 
+platforms that share that particular chip.  
+
+One of the main issues in tinyos-1.x that limited portability 
+was that similar platforms would often copy code files hard-code 
+customizations, rather than rigorously share common code.  By
+placing chip-specific code here in a designated chips directory,
+and enforcing a policy of making this code specific to the chip
+but not the platform, code reuse will be promoted.
+
+2. Microcontrollers
+====================================================================
+
+ATmega128	
+---------
+    Part of the AVR 8-bit series by Atmel corporation.  Atmel's AVR® microcontrollers have a RISC core running single cycle instructions and a well-defined I/O structure that limits the need for external components. Internal oscillators, timers, UART, SPI, pull-up resistors, pulse width modulation, ADC, analog comparator and watch-dog timers are some of the features you will find in AVR devices.
+
+    	128-Kbyte self-programming Flash Program Memory, 
+	4-Kbyte SRAM, 4-Kbyte EEPROM, 8 Channel 10-bit A/D-converter. 
+	JTAG interface for on-chip-debug. Up to 16 MIPS throughput at 16 MHz. 
+	2.7 - 5.5 Volt operation.
+
+    http://atmel.com/dyn/products/product_card.asp?part_id=2018
+
+msp430
+------
+    The MSP430 family of ultra-low-power 16-bit RISC mixed-signal processors from Texas Instruments provides the ultimate solution for battery-powered measurement applications.
+
+    http://focus.ti.com/mcu/docs/overview.tsp?familyId=342&templateId=5246&navigationId=11466&path=templatedata/cm/mcuovw/data/msp430_ovw
+
+
+3. Radio Chips
+====================================================================
+
+cc2420
+------
+    The CC2420 is a low-cost transceiver designed specifically
+for low-power, low-voltage RF applications in the 2.4 GHz unlicensed ISM band. It is the first commercially available RF Transceiver compliant with the IEEE 802.15.4 standard and the first RF-IC that can be qualified for use in 2.4 GHz ZigBeetm products.
+
+    http://www.chipcon.com/index.cfm?kat_id=2&subkat_id=12&dok_id=115
+
+cc1000
+------
+    The CC1000 is a true ultra-low-power single-chip RF transceiver for e.g. the 315, 433, 868, 915 MHz bands. It has been specifically designed to comply with the most stringent demands of the low power radio market.  Based on a pure CMOS technology this is the first product in the market that offers a unique combination of low cost and high integration, performance and flexibility, thus setting a new standard for short-range wireless communication.
+
+    http://www.chipcon.com/index.cfm?kat_id=2&subkat_id=12&dok_id=14
+
+
+4. Volatile Flash Chips
+====================================================================
+
diff --git a/tos/chips/ad5200/AD5200C.nc b/tos/chips/ad5200/AD5200C.nc
new file mode 100644
index 00000000..5f037777
--- /dev/null
+++ b/tos/chips/ad5200/AD5200C.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:02 $
+ * ========================================================================
+ */
+
+/**
+ * There is currently no TEP for describing devices of this type.<br><br>
+ *
+ * This component provides the implementation of the ad5200 potentiometer
+ * chip.  It is currently the only chip of its type, and does not conform to
+ * any existing TEP standard.  This component will be updated as a TEP for
+ * potentiometers is developed in the near future.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+configuration AD5200C {
+provides {
+  interface Pot;
+  interface Resource;
+  interface StdControl;
+}
+}
+
+implementation {
+  components AD5200P
+      , AD5200SpiC
+      , AD5200PotIO
+      , MainC
+      ;
+
+      StdControl = AD5200P;
+      Pot = AD5200P;
+      Resource = AD5200SpiC;
+
+
+      MainC.SoftwareInit-> AD5200P.Init;
+      AD5200P.ENPOT -> AD5200PotIO.AD5200PotENPOT;
+      AD5200P.SDPOT -> AD5200PotIO.AD5200PotSDPOT;
+      AD5200P.SpiByte -> AD5200SpiC;
+}
diff --git a/tos/chips/ad5200/AD5200P.nc b/tos/chips/ad5200/AD5200P.nc
new file mode 100644
index 00000000..f5f09117
--- /dev/null
+++ b/tos/chips/ad5200/AD5200P.nc
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:02 $
+ * ========================================================================
+ */
+
+/**
+ * There is currently no TEP for describing devices of this type.<br><br>
+ *
+ * This component provides the internal implementation of the ad5200 potentiometer
+ * chip.  It is currently the only chip of its type, and does not conform to
+ * any existing TEP standard.  This component will be updated as a TEP for
+ * potentiometers is developed in the near future.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+  module AD5200P {
+  provides {
+    interface Init;
+    interface Pot;
+    interface StdControl;
+  }
+  uses {
+    interface GeneralIO as ENPOT;
+    interface GeneralIO as SDPOT;
+    interface SpiByte;
+  }
+  }
+  implementation {
+    uint8_t Pot_value = -1;
+
+    /************** interface commands **************/
+    command error_t Init.init() {
+      call ENPOT.makeOutput();
+      call SDPOT.makeOutput();
+      call ENPOT.set();
+      call SDPOT.set();
+      return SUCCESS;
+    }
+
+    command error_t StdControl.start() {
+      call SDPOT.set();
+      call ENPOT.set();
+      return SUCCESS;
+    }
+    command error_t StdControl.stop() {
+      call ENPOT.set();
+      call SDPOT.clr();
+      return SUCCESS;
+    }
+
+    async command error_t Pot.set(uint8_t setting) {
+      call ENPOT.clr();
+      call SpiByte.write(setting);
+      call ENPOT.set();
+      atomic Pot_value = setting;
+      return SUCCESS;
+    }
+
+    async command uint8_t Pot.get() {
+      return Pot_value;
+    }
+
+    async command error_t Pot.increase() {
+      if (Pot_value < 255 && Pot_value >= 0) {
+        Pot_value++;
+        return call Pot.set(Pot_value);
+      }
+      else return FAIL;
+    }
+
+    async command error_t Pot.decrease() {
+      if (Pot_value > 0) {
+        Pot_value--;
+        return call Pot.set(Pot_value);
+      }
+      else return FAIL;
+    }
+  }
diff --git a/tos/chips/ad5200/AD5200SpiC.nc b/tos/chips/ad5200/AD5200SpiC.nc
new file mode 100644
index 00000000..a0dc7b0b
--- /dev/null
+++ b/tos/chips/ad5200/AD5200SpiC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:02 $
+ * ========================================================================
+ */
+
+/**
+ * There is currently no TEP for describing components of this type.<br><br>
+ *
+ * Configuration file for using the default Spi implementation for writing
+ * a value to the Ad5200 Potentiometer. This file can be shadowed in the
+ * application or platform directory in order to use a different Spi
+ * implementation.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+configuration AD5200SpiC {
+    provides {
+      interface Resource;
+      interface SpiByte;
+    }
+}
+
+implementation {
+  components new Spi0C() as Spi;
+  Resource = Spi;
+  SpiByte = Spi;
+}
diff --git a/tos/chips/ad5200/Pot.nc b/tos/chips/ad5200/Pot.nc
new file mode 100644
index 00000000..c28e1685
--- /dev/null
+++ b/tos/chips/ad5200/Pot.nc
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:02 $
+ * ========================================================================
+ */
+ 
+/**
+ * There is currently no TEP for describing this interface.<br><br>
+ *
+ * This interface is an attempt at describing the HIL abstraction for
+ * potentiomter devices. Since there is currently no TEP describing the
+ * abstractions for potentiometers, this interface will need to be updated
+ * once one is created.
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ * @author Kevin Klues (klues@tkn.tu-berlin.de) -- modified for TinyOS-2.x
+ */
+
+interface Pot {
+
+    /**
+     * Set the potentiometer value.
+     *
+     * @param <b>setting</b> -- The new value of the potentiometer.
+     * @return SUCCESS if the setting was successful<br>
+     *         FAIL if the component has not been initialized or the desired
+     *              setting is outside of the valid range. 
+     */ 
+  async command error_t set(uint8_t setting);
+
+    /** 
+     * Increment the potentiometer value by 1. This function proves to be
+     * quite useful in active potentiometer control scenarios.
+     * 
+     * @return SUCCESS if the increment was successful.<br>
+     *         FAIL if the component has not been initialized or if the
+     *              potentiometer cannot be incremented further.
+     */ 
+  async command error_t increase();
+
+    /** 
+     * Decrement the potentiometer value by 1. This function proves to be
+     * quite useful in active potentiometer control scenarios.
+     *
+     * @return SUCCESS if the decrement was successful.
+     *         FAIL if the component has not been initialized or if the
+     *              potentiometer cannot be decremented further.
+     */ 
+  async command error_t decrease();
+
+    /**
+     * Return the current setting of the potentiometer. 
+     * @return An unsigned 8-bit value denoting the current setting of the
+     *         potentiometer. 
+     */
+  async command uint8_t get();
+}
+
diff --git a/tos/chips/ad5200/PotC.nc b/tos/chips/ad5200/PotC.nc
new file mode 100644
index 00000000..bbd71497
--- /dev/null
+++ b/tos/chips/ad5200/PotC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:02 $
+ * ========================================================================
+ */
+
+/**
+ * There is currently no TEP for describing devices of this type.<br><br>
+ *
+ * This component provides the HIL abstraction for the Ad5200 potentiomter.
+ * Since there is currently no TEP describing the abstractions for
+ * potentiometers, this component will need to be updated once one is created.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+configuration PotC {
+    provides {
+      interface Resource;
+      interface Pot;
+      interface StdControl;
+    }
+}
+
+implementation {
+  components Ad5200C;
+
+  Pot = Ad5200C;
+  StdControl = Ad5200C;
+  Resource = Ad5200C;
+}
diff --git a/tos/chips/at45db/At45db.h b/tos/chips/at45db/At45db.h
new file mode 100644
index 00000000..707ea259
--- /dev/null
+++ b/tos/chips/at45db/At45db.h
@@ -0,0 +1,55 @@
+// $Id: At45db.h,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#ifndef AT45DB_H
+#define AT45DB_H
+
+#define UQ_AT45DB "at45db.resource"
+
+#include <HplAt45db.h>
+
+enum {
+  AT45_ERASE,
+  AT45_DONT_ERASE,
+  AT45_PREVIOUSLY_ERASED
+};
+
+#endif
diff --git a/tos/chips/at45db/At45db.nc b/tos/chips/at45db/At45db.nc
new file mode 100644
index 00000000..a84a67d8
--- /dev/null
+++ b/tos/chips/at45db/At45db.nc
@@ -0,0 +1,195 @@
+// $Id: At45db.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "At45db.h"
+
+/**
+ * HAL for Atmel's AT45DB family of serial dataflash chips. This provides
+ * reasonably high-level operations on AT45DB pages, including automatic
+ * buffer management. Writes are only guaranteed to happen after a flush,
+ * flushAll, sync or syncAll.
+ * <p>
+ * When buffers are flushed to the flash (either explicitly or implicitly),
+ * their contents are checked to ensure the write was succesful. If this
+ * check fails, the flush is retried some number of times. If this fails
+ * more than some number of times, all access to the flash is disabled
+ * (all requests will report FAIL in their completion event).
+ * <p>
+ * This interface only supports one operation at a time - components offering
+ * At45db should use the <code>Resource</code> interface for resource sharing.
+ *
+ * @author David Gay
+ */
+
+interface At45db {
+  /**
+   * Write some data to an AT45DB page. writeDone will be signaled.
+   * @param page Flash page to write to. Must be less than AT45_MAX_PAGES.
+   * @param offset Offset in page at which to start writing - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param data Data to write. The buffer is "returned" at writeDone time.
+   * @param n Number of bytes to write (> 0). offset + n must be <= 
+   *   AT45_PAGE_SIZE
+   */
+  command void write(at45page_t page, at45pageoffset_t offset,
+		     void *PASS COUNT(n) data, at45pageoffset_t n);
+  /**
+   * Signal completion of a write operation. The buffer passed to write
+   * is implictly returned.
+   * @param error SUCCESS for a successful write, FAIL otherwise
+   */
+  event void writeDone(error_t error);
+
+  /**
+   * Copy one flash page to another. copyDone will be signaled. If page
+   * from had been modified, it is first flushed to flash. Page
+   * <code>to</code> will only actually be written when the buffer holding
+   * it is flushed (see flush, flushAll, sync, syncAll).
+   *
+   * @param from Flash page to copy. Must be less than AT45_MAX_PAGES.
+   * @param to Flash page to overwrite. Must be less than AT45_MAX_PAGES.
+   */
+  command void copyPage(at45page_t from, at45page_t to);
+  /**
+   * Signal completion of a copyPage operation. 
+   * @param error SUCCESS if the copy was successful, FAIL otherwise
+   */
+  event void copyPageDone(error_t error);
+
+  /**
+   * Erase an AT45DB page. eraseDone will be signaled.
+   * @param page Flash page to erase. Must be less than AT45_MAX_PAGES.
+   * @param eraseKind How to handle the erase:
+   *   <br><code>AT45_ERASE</code>: actually erase the page in the flash chip
+   *   <br><code>AT45_DONT_ERASE</code>: don't erase the page in the flash 
+   *     chip, but reserve a buffer for this page - subsequent writes to this
+   *     page will be faster because the old contents need not be read
+   *   <br><code>AT45_PREVIOUSLY_ERASED</code>: assume the page was previously
+   *     erased in the flash and reserve a buffer for this page - subsequent
+   *     writes to page will be faster because the old contents need not be 
+   *     read and the write itself will be faster
+   */
+  command void erase(at45page_t page, uint8_t eraseKind);
+  /**
+   * Signal completion of an erase operation. 
+   * @param error SUCCESS if the erase was successful, FAIL otherwise
+   */
+  event void eraseDone(error_t error);
+
+  /**
+   * Flush an AT45DB page from the buffers to the actual flash. syncDone
+   * will be signaled once the flush has been completed and the buffer 
+   * contents successfully compared with the flash. If the page is not
+   * in the buffers, syncDone will succeed "immediately".
+   * @param page Flash page to sync. Must be less than AT45_MAX_PAGES.
+   */
+  command void sync(at45page_t page);
+  /**
+   * Flush all AT45DB buffers to the actual flash. syncDone
+   * will be signaled once the flush has been completed and the buffer 
+   * contents successfully compared with the flash. 
+   */
+  command void syncAll();
+  /**
+   * Signal completion of a sync or syncAll operation. 
+   * @param error SUCCESS if the sync was successful, FAIL otherwise
+   */
+  event void syncDone(error_t error);
+
+  /**
+   * Flush an AT45DB page from the buffers to the actual flash. flushDone
+   * will be signaled once the flush has been initiated. If the page is not
+   * in the buffers, flushDone will succeed "immediately".
+   * @param page Flash page to sync. Must be less than AT45_MAX_PAGES.
+   */
+  command void flush(at45page_t page);
+  /**
+   * Flush all AT45DB buffers to the actual flash. flushDone
+   * will be signaled once the flushes have been initiated. 
+   */
+  command void flushAll();
+  /**
+   * Signal completion of an flush or flushAll operation. 
+   * @param error SUCCESS if the flush was successful, FAIL otherwise
+   */
+  event void flushDone(error_t error);
+
+  /**
+   * Read some data from an AT45DB page. readDone will be signaled.
+   * @param page Flash page to read from. Must be less than AT45_MAX_PAGES.
+   * @param offset Offset in page at which to start reading - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param data Buffer in which to place read data. The buffer is "returned"
+   *   at readDone time.
+   * @param n Number of bytes to read (> 0). offset + n must be <= 
+   *   AT45_PAGE_SIZE
+   */
+  command void read(at45page_t page, at45pageoffset_t offset,
+		    void *PASS COUNT(n) data, at45pageoffset_t n);
+  /**
+   * Signal completion of a read operation. The buffer passed to read
+   * is implictly returned.
+   * @param error SUCCESS for a successful read, FAIL otherwise
+   */
+  event void readDone(error_t error);
+
+  /**
+   * Compute the CRC of some data from an AT45DB page (using the CRC
+   * function from crc.h). computeCrcDone will be signaled.
+   * @param page Flash page to read from. Must be less than AT45_MAX_PAGES.
+   * @param offset Offset in page at which to start reading - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param n Number of bytes to read (> 0). offset + n must be <= 
+   *   AT45_PAGE_SIZE
+   * @param baseCrc initial CRC value - use 0 if computing a "standalone"
+   *   CRC, or a previous computeCrc result if computing a CRC over several
+   *   flash pages
+   */
+  command void computeCrc(at45page_t page, at45pageoffset_t offset,
+			  at45pageoffset_t n, uint16_t baseCrc);
+  /**
+   * Signal completion of a CRC computation.
+   * @param error SUCCESS if the CRC was successfully computed, FAIL otherwise
+   * @param crc CRC value (valid only if error == SUCCESS)
+   */
+  event void computeCrcDone(error_t error, uint16_t crc);
+}
diff --git a/tos/chips/at45db/At45dbBlockConfig.nc b/tos/chips/at45db/At45dbBlockConfig.nc
new file mode 100644
index 00000000..f567ea43
--- /dev/null
+++ b/tos/chips/at45db/At45dbBlockConfig.nc
@@ -0,0 +1,59 @@
+// $Id: At45dbBlockConfig.nc,v 1.5 2008-06-11 00:46:23 razvanm Exp $
+
+/*
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Private interface between the AT45DB implementations of config and block storage
+ *
+ * @author: David Gay <dgay@acm.org>
+ */
+
+interface At45dbBlockConfig {
+  /**
+   * Check if this block is a config volumes
+   * @return TRUE for config volumes, FALSE for block volumes
+   */
+  command int isConfig();
+
+  /**
+   * Query which half of the block is used by the current config state
+   * @return TRUE for 2nd half, FALSE for 1st half
+   */
+  command int flipped();
+
+  /**
+   * Hook called by block storage just before the start of each write
+   * @return TRUE to delay the write until <code>writeContinue</code>
+   *    is called, FALSE to proceed immediately.
+   */
+  command int writeHook();
+  /**
+   * Continue or abort write suspended as a result of a <code>writeHook</code>
+   * event
+   * @param error SUCCESS to continue write, anything else to abort write 
+   *   returning that error code
+   */
+  event void writeContinue(error_t error);
+
+  /**
+   * Return size of a config volume in pages (half of the actual block)
+   * @return Config volume size
+   */
+  event at45page_t npages();
+
+  /**
+   * Map a volume-relative page to an absolute flash page, taking account
+   * of the current flipped status
+   * @param page Volume-relative page
+   * @return Actual flash page for <code>page</code>
+   */
+  event at45page_t remap(at45page_t page);
+}
diff --git a/tos/chips/at45db/At45dbC.nc b/tos/chips/at45db/At45dbC.nc
new file mode 100644
index 00000000..da3287dc
--- /dev/null
+++ b/tos/chips/at45db/At45dbC.nc
@@ -0,0 +1,44 @@
+// $Id: HALAT45DBC.nc,v 1.1 2005/01/22 00:26:31 idgay Exp 
+/*
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * HAL for Atmel's AT45DB family of serial dataflash chips. Access to the HAL
+ * is controlled by a parameterised Resource interface - client ids are 
+ * obtained with unique(UQ_AT45DB).
+ *
+ * @author David Gay
+ */
+
+#include "At45db.h"
+
+configuration At45dbC
+{
+  provides {
+    interface At45db;
+    interface Resource[uint8_t client];
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+}
+implementation
+{
+  components At45dbP, HplAt45dbC, MainC, BusyWaitMicroC;
+  components new FcfsArbiterC(UQ_AT45DB) as Arbiter;
+
+  At45db = At45dbP;
+  Resource = Arbiter;
+  ResourceDefaultOwner = Arbiter;
+  ArbiterInfo = Arbiter;
+
+  MainC.SoftwareInit -> At45dbP;
+  At45dbP.HplAt45db -> HplAt45dbC;
+  At45dbP.BusyWait -> BusyWaitMicroC;
+}
diff --git a/tos/chips/at45db/At45dbP.nc b/tos/chips/at45db/At45dbP.nc
new file mode 100644
index 00000000..be2989ba
--- /dev/null
+++ b/tos/chips/at45db/At45dbP.nc
@@ -0,0 +1,484 @@
+// $Id: At45dbP.nc,v 1.11 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "crc.h"
+#include "At45db.h"
+#include "Timer.h"
+
+/**
+ * Private componenent for the Atmel's AT45DB HAL.
+ *
+ * @author David Gay
+ */
+
+module At45dbP @safe() {
+  provides {
+    interface Init;
+    interface At45db;
+  }
+  uses {
+    interface HplAt45db;
+    interface BusyWait<TMicro, uint16_t>;
+  }
+}
+implementation
+{
+#define CHECKARGS
+
+#if 0
+  uint8_t work[20];
+  uint8_t woffset;
+
+  void wdbg(uint8_t x) {
+    work[woffset++] = x;
+    if (woffset == sizeof work)
+      woffset = 0;
+  }
+#else
+#define wdbg(n)
+#endif
+
+  enum { // requests
+    IDLE,
+    R_READ,
+    R_READCRC,
+    R_WRITE,
+    R_ERASE,
+    R_COPY,
+    R_SYNC,
+    R_SYNCALL,
+    R_FLUSH,
+    R_FLUSHALL,
+    BROKEN // Write failed. Fail all subsequent requests.
+  };
+  uint8_t request;
+  at45pageoffset_t reqOffset, reqBytes;
+  uint8_t * COUNT_NOK(reqBytes) reqBuf;
+  at45page_t reqPage;
+
+  enum {
+    P_READ,
+    P_READCRC,
+    P_WRITE,
+    P_FLUSH,
+    P_FILL,
+    P_ERASE,
+    P_COMPARE,
+    P_COMPARE_CHECK
+  };
+  
+  struct {
+    at45page_t page;
+    bool busy : 1;
+    bool clean : 1;
+    bool erased : 1;
+    uint8_t unchecked : 2;
+  } buffer[2];
+  uint8_t selected; // buffer used by the current op
+  uint8_t checking;
+  bool flashBusy;
+
+  // Select a command for the current buffer
+#define OPN(n, name) ((n) ? name ## 1 : name ## 2)
+#define OP(name) OPN(selected, name)
+
+  command error_t Init.init() {
+    request = IDLE;
+    flashBusy = TRUE;
+      
+    // pretend we're on an invalid non-existent page
+    buffer[0].page = buffer[1].page = AT45_MAX_PAGES;
+    buffer[0].busy = buffer[1].busy = FALSE;
+    buffer[0].clean = buffer[1].clean = TRUE;
+    buffer[0].unchecked = buffer[1].unchecked = 0;
+    buffer[0].erased = buffer[1].erased = FALSE;
+
+    return SUCCESS;
+  }
+  
+  void flashIdle() {
+    flashBusy = buffer[0].busy = buffer[1].busy = FALSE;
+  }
+
+  void requestDone(error_t result, uint16_t computedCrc, uint8_t newState);
+  void handleRWRequest();
+
+  task void taskSuccess() {
+    requestDone(SUCCESS, 0, IDLE);
+  }
+  task void taskFail() {
+    requestDone(FAIL, 0, IDLE);
+  }
+
+  void checkBuffer(uint8_t buf) {
+    if (flashBusy)
+      {
+	call HplAt45db.waitIdle();
+	return;
+      }
+    call HplAt45db.compare(OPN(buf, AT45_C_COMPARE_BUFFER), buffer[buf].page);
+    checking = buf;
+  }
+
+  void flushBuffer() {
+    if (flashBusy)
+      {
+	call HplAt45db.waitIdle();
+	return;
+      }
+    call HplAt45db.flush(buffer[selected].erased ?
+			 OP(AT45_C_QFLUSH_BUFFER) :
+			 OP(AT45_C_FLUSH_BUFFER), 
+			 buffer[selected].page);
+  }
+
+  event void HplAt45db.waitIdleDone() {
+    flashIdle();
+    // Eager compare - this steals the current command
+#if 0
+    if ((buffer[0].unchecked || buffer[1].unchecked) &&
+	cmdPhase != P_COMPARE)
+      checkBuffer(buffer[0].unchecked ? 0 : 1);
+    else
+#endif
+      handleRWRequest();
+  }
+
+  event void HplAt45db.waitCompareDone(bool ok) {
+    flashIdle();
+
+    if (ok)
+      buffer[checking].unchecked = 0;
+    else if (buffer[checking].unchecked < 2)
+      buffer[checking].clean = FALSE;
+    else
+      {
+	requestDone(FAIL, 0, BROKEN);
+	return;
+      }
+    handleRWRequest();
+  }
+
+  event void HplAt45db.readDone() {
+    requestDone(SUCCESS, 0, IDLE);
+  }
+
+  event void HplAt45db.writeDone() {
+    buffer[selected].clean = FALSE;
+    buffer[selected].unchecked = 0;
+    requestDone(SUCCESS, 0, IDLE);
+  }
+
+  event void HplAt45db.crcDone(uint16_t crc) {
+    requestDone(SUCCESS, crc, IDLE);
+  }
+
+  event void HplAt45db.flushDone() {
+    flashBusy = TRUE;
+    buffer[selected].clean = buffer[selected].busy = TRUE;
+    buffer[selected].unchecked++;
+    buffer[selected].erased = FALSE;
+    handleRWRequest();
+  }
+
+  event void HplAt45db.compareDone() {
+    flashBusy = TRUE;
+    buffer[checking].busy = TRUE;
+    // The 10us wait makes old mica motes (Atmega 103) happy, for
+    // some mysterious reason (w/o this wait, the first compare
+    // always fails, even though the compare after the rewrite
+    // succeeds...)
+    call BusyWait.wait(10);
+    call HplAt45db.waitCompare();
+  }
+
+  event void HplAt45db.fillDone() {
+    flashBusy = TRUE;
+    buffer[selected].page = reqPage;
+    buffer[selected].clean = buffer[selected].busy = TRUE;
+    buffer[selected].erased = FALSE;
+    handleRWRequest();
+  }
+
+  event void HplAt45db.eraseDone() {
+    flashBusy = TRUE;
+    // The buffer contains garbage, but we don't care about the state
+    // of bits on this page anyway (if we do, we'll perform a 
+    // subsequent write)
+    buffer[selected].page = reqPage;
+    buffer[selected].clean = TRUE;
+    buffer[selected].erased = TRUE;
+    requestDone(SUCCESS, 0, IDLE);
+  }
+
+  void syncOrFlushAll(uint8_t newReq);
+
+  void handleRWRequest() {
+    if (reqPage == buffer[selected].page)
+      switch (request)
+	{
+	case R_ERASE:
+	  switch (reqOffset)
+	    {
+	    case AT45_ERASE:
+	      if (flashBusy)
+		call HplAt45db.waitIdle();
+	      else
+		call HplAt45db.erase(AT45_C_ERASE_PAGE, reqPage);
+	      break;
+	    case AT45_PREVIOUSLY_ERASED:
+	      // We believe the user...
+	      buffer[selected].erased = TRUE;
+	      /* Fallthrough */
+	    case AT45_DONT_ERASE:
+	      // The buffer contains garbage, but we don't care about the state
+	      // of bits on this page anyway (if we do, we'll perform a 
+	      // subsequent write)
+	      buffer[selected].clean = TRUE;
+	      requestDone(SUCCESS, 0, IDLE);
+	      break;
+	    }
+	  break;
+
+	case R_COPY:
+	  if (!buffer[selected].clean) // flush any modifications
+	    flushBuffer();
+	  else
+	    {
+	      // Just redesignate as destination page, and mark it dirty.
+	      // It will eventually be flushed, completing the copy.
+	      buffer[selected].page = reqOffset;
+	      buffer[selected].clean = FALSE;
+	      post taskSuccess();
+	    }
+	  break;
+
+	case R_SYNC: case R_SYNCALL:
+	  if (buffer[selected].clean && buffer[selected].unchecked)
+	    {
+	      checkBuffer(selected);
+	      return;
+	    }
+	  /* fall through */
+	case R_FLUSH: case R_FLUSHALL:
+	  if (!buffer[selected].clean)
+	    flushBuffer();
+	  else if (request == R_FLUSH || request == R_SYNC)
+	    post taskSuccess();
+	  else
+	    {
+	      // Check for more dirty pages
+	      uint8_t oreq = request;
+
+	      request = IDLE;
+	      syncOrFlushAll(oreq);
+	    }
+	  break;
+
+	case R_READ:
+	  if (buffer[selected].busy)
+	    call HplAt45db.waitIdle();
+	  else
+	    call HplAt45db.readBuffer(OP(AT45_C_READ_BUFFER), reqOffset,
+				      reqBuf, reqBytes);
+	  break;
+
+	case R_READCRC:
+	  if (buffer[selected].busy)
+	    call HplAt45db.waitIdle();
+	  else
+	    /* Hack: baseCrc was stored in reqBuf */
+	    call HplAt45db.crc(OP(AT45_C_READ_BUFFER), 0, reqOffset, reqBytes,
+			       (uint16_t)reqBuf);
+	  break;
+
+	case R_WRITE:
+	  if (buffer[selected].busy)
+	    call HplAt45db.waitIdle();
+	  else
+	    call HplAt45db.write(OP(AT45_C_WRITE_BUFFER), 0, reqOffset,
+				 reqBuf, reqBytes);
+	  break;
+	}
+    else if (!buffer[selected].clean)
+      flushBuffer();
+    else if (buffer[selected].unchecked)
+      checkBuffer(selected);
+    else
+      {
+	// just get the new page (except for erase)
+	if (request == R_ERASE)
+	  {
+	    buffer[selected].page = reqPage;
+	    handleRWRequest();
+	  }
+	else if (flashBusy)
+	  call HplAt45db.waitIdle();
+	else
+	  call HplAt45db.fill(OP(AT45_C_FILL_BUFFER), reqPage);
+      }
+  }
+
+  void requestDone(error_t result, uint16_t computedCrc, uint8_t newState) {
+    uint8_t orequest = request;
+
+    request = newState;
+    switch (orequest)
+      {
+      case R_READ: signal At45db.readDone(result); break;
+      case R_READCRC: signal At45db.computeCrcDone(result, computedCrc); break;
+      case R_WRITE: signal At45db.writeDone(result); break;
+      case R_SYNC: case R_SYNCALL: signal At45db.syncDone(result); break;
+      case R_FLUSH: case R_FLUSHALL: signal At45db.flushDone(result); break;
+      case R_ERASE: signal At45db.eraseDone(result); break;
+      case R_COPY: signal At45db.copyPageDone(result); break;
+      }
+  }
+
+  void newRequest(uint8_t req, at45page_t page, at45pageoffset_t offset,
+		  void * COUNT_NOK(n) reqdata, at45pageoffset_t n) {
+    request = req;
+
+    reqBuf = NULL;
+    reqBytes = n;
+    reqBuf = reqdata;
+    reqPage = page;
+    reqOffset = offset;
+
+    if (page == buffer[0].page)
+      selected = 0;
+    else if (page == buffer[1].page)
+      selected = 1;
+    else
+      selected = !selected; // LRU with 2 buffers...
+
+#ifdef CHECKARGS
+    if (page >= AT45_MAX_PAGES ||
+	n > AT45_PAGE_SIZE ||
+	(req != R_COPY && offset >= AT45_PAGE_SIZE) ||
+	(req != R_COPY && offset + n > AT45_PAGE_SIZE) ||
+	(req == R_COPY && offset >= AT45_MAX_PAGES)) {
+      post taskFail();
+    }
+    else
+#endif
+      handleRWRequest();
+  }
+
+  command void At45db.read(at45page_t page, at45pageoffset_t offset,
+				   void *reqdata, at45pageoffset_t n) {
+    newRequest(R_READ, page, offset, reqdata, n);
+  }
+
+  command void At45db.computeCrc(at45page_t page,
+					at45pageoffset_t offset,
+					at45pageoffset_t n,
+					uint16_t baseCrc) {
+    /* This is a hack (store crc in reqBuf), but it saves 2 bytes of RAM */
+    newRequest(R_READCRC, page, offset, TCAST(uint8_t * COUNT(n), baseCrc), n);
+  }
+
+  command void At45db.write(at45page_t page, at45pageoffset_t offset,
+				    void *reqdata, at45pageoffset_t n) {
+    newRequest(R_WRITE, page, offset, reqdata, n);
+  }
+
+
+  command void At45db.erase(at45page_t page, uint8_t eraseKind) {
+    newRequest(R_ERASE, page, eraseKind, NULL, 0);
+  }
+
+  command void At45db.copyPage(at45page_t from, at45page_t to) {
+    /* Assumes at45pageoffset_t can hold an at45page_t. A little icky */
+    newRequest(R_COPY, from, to, NULL, 0);
+  }
+
+  void syncOrFlush(at45page_t page, uint8_t newReq) {
+    request = newReq;
+
+    if (buffer[0].page == page)
+      selected = 0;
+    else if (buffer[1].page == page)
+      selected = 1;
+    else
+      {
+	post taskSuccess();
+	return;
+      }
+
+    buffer[selected].unchecked = 0;
+    handleRWRequest();
+  }
+
+  command void At45db.sync(at45page_t page) {
+    syncOrFlush(page, R_SYNC);
+  }
+
+  command void At45db.flush(at45page_t page) {
+    syncOrFlush(page, R_FLUSH);
+  }
+
+  void syncOrFlushAll(uint8_t newReq) {
+    request = newReq;
+
+    if (!buffer[0].clean)
+      selected = 0;
+    else if (!buffer[1].clean)
+      selected = 1;
+    else
+      {
+	post taskSuccess();
+	return;
+      }
+
+    buffer[selected].unchecked = 0;
+    handleRWRequest();
+  }
+
+  command void At45db.syncAll() {
+    syncOrFlushAll(R_SYNCALL);
+  }
+
+  command void At45db.flushAll() {
+    syncOrFlushAll(R_FLUSHALL);
+  }
+}
diff --git a/tos/chips/at45db/At45dbStorageManagerC.nc b/tos/chips/at45db/At45dbStorageManagerC.nc
new file mode 100644
index 00000000..15dfcc42
--- /dev/null
+++ b/tos/chips/at45db/At45dbStorageManagerC.nc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * HAL component providing information on the flash volumes.
+ *
+ * @author: David Gay <dgay@acm.org>
+ */
+
+module At45dbStorageManagerC @safe() {
+  provides interface At45dbVolume[volume_id_t volid];
+}
+implementation {
+  command at45page_t At45dbVolume.remap[volume_id_t volid](at45page_t volumePage) {
+    switch (volid)
+      {
+#define VB(id, base) case id: return volumePage + base;
+#include "StorageVolumes.h"
+      default: return AT45_MAX_PAGES;
+      }
+  }
+
+  command at45page_t At45dbVolume.volumeSize[volume_id_t volid]() {
+    switch (volid)
+      {
+#define VS(id, size) case id: return size;
+#include "StorageVolumes.h"
+      default: return 0;
+      }
+  }
+}
diff --git a/tos/chips/at45db/At45dbVolume.nc b/tos/chips/at45db/At45dbVolume.nc
new file mode 100644
index 00000000..8c8c8eb2
--- /dev/null
+++ b/tos/chips/at45db/At45dbVolume.nc
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "At45db.h"
+
+/**
+ * AT45DB interface for managing flash volumes.
+ *
+ * @author David Gay
+ */
+interface At45dbVolume {
+  /**
+   * Map a volume page to the corresponding page in the whole flash
+   * @return What flash page this volume page maps to, or 
+   *   AT45_MAX_PAGES for invalid volumes
+   */
+  command at45page_t remap(at45page_t volumePage);
+
+  /**
+   * Find the flash volume size
+   * @return Flash volume size in pages
+   */
+  command at45page_t volumeSize();
+}
diff --git a/tos/chips/at45db/BlockStorageC.nc b/tos/chips/at45db/BlockStorageC.nc
new file mode 100644
index 00000000..2d5491bd
--- /dev/null
+++ b/tos/chips/at45db/BlockStorageC.nc
@@ -0,0 +1,42 @@
+// $Id: BlockStorageC.nc,v 1.4 2006-12-12 18:23:02 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Implementation of the block storage abstraction from TEP103 for the
+ * Atmel AT45DB serial data flash.
+ *
+ * @param volid Volume to use for block storage
+ *
+ * @author David Gay
+ */
+
+#include "Storage.h"
+
+generic configuration BlockStorageC(volume_id_t volid) {
+  provides {
+    interface BlockWrite;
+    interface BlockRead;
+  }
+}
+implementation {
+  enum {
+    BLOCK_ID = unique(UQ_BLOCK_STORAGE) + uniqueCount(UQ_CONFIG_STORAGE),
+    RESOURCE_ID = unique(UQ_AT45DB)
+  };
+    
+  components BlockStorageP, WireBlockStorageP, At45dbStorageManagerC, At45dbC;
+
+  BlockWrite = BlockStorageP.BlockWrite[BLOCK_ID];
+  BlockRead = BlockStorageP.BlockRead[BLOCK_ID];
+
+  BlockStorageP.At45dbVolume[BLOCK_ID] -> At45dbStorageManagerC.At45dbVolume[volid];
+  BlockStorageP.Resource[BLOCK_ID] -> At45dbC.Resource[RESOURCE_ID];
+}
diff --git a/tos/chips/at45db/BlockStorageP.nc b/tos/chips/at45db/BlockStorageP.nc
new file mode 100644
index 00000000..37bc249d
--- /dev/null
+++ b/tos/chips/at45db/BlockStorageP.nc
@@ -0,0 +1,404 @@
+// $Id: BlockStorageP.nc,v 1.10 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Private component of the AT45DB implementation of the block storage
+ * abstraction.
+ *
+ * @author: Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author: David Gay <dgay@acm.org>
+ */
+
+#include "Storage.h"
+
+module BlockStorageP @safe() {
+  provides {
+    interface BlockWrite[uint8_t blockId];
+    interface BlockRead[uint8_t blockId];
+  }
+  uses {
+    interface At45db;
+    interface At45dbVolume[uint8_t blockId];
+    interface Resource[uint8_t blockId];
+    interface At45dbBlockConfig as BConfig[uint8_t blockId];
+  }
+}
+implementation 
+{
+  /* The AT45DB block storage implementation simply provides direct
+     read/write access to the underlying pages of the volume. Random
+     writes to the block storage will thus lead to pages being 
+     erased/programmed many times (there is a 2 page cache, but
+     random writes are unlikely to hit in it).
+
+     The cache is only flushed on sync.
+
+     The first page of a block storage volume stores the maximum address
+     written in the block and a CRC of the block's contents (up to that
+     maximum address). This CRC is written at sync time and verified at
+     validate time.
+
+     This BlockStorage code is reused in the implementation of
+     ConfigStorage.  See the ConfigStorageP component and the
+     At45dbBlockConfig interface for more discussion. If there are m
+     ConfigStorage volumes and n BlockStorage volumes, the ids 0..m-1 are
+     for ConfigStorage and m..m+n-1 are for BlockStorage.
+  */
+
+  enum {
+    R_IDLE,
+    R_WRITE,
+    R_ERASE,
+    R_SYNC,
+    R_READ,
+    R_CRC,
+  };
+
+  enum {
+    N = uniqueCount(UQ_BLOCK_STORAGE) + uniqueCount(UQ_CONFIG_STORAGE),
+    NO_CLIENT = 0xff
+  };
+
+  uint8_t client = NO_CLIENT;
+  storage_addr_t currentOffset;
+
+  struct {
+    /* The latest request made for this client, and it's arguments */
+    uint8_t request; /* automatically initialised to R_IDLE */
+    uint8_t * COUNT_NOK(len) buf;
+    storage_addr_t addr;
+    storage_len_t len;
+  } s[N];
+
+
+  /* ------------------------------------------------------------------ */
+  /* Interface with ConfigStorageP (see also writeHook call below)	*/
+  /* ------------------------------------------------------------------ */
+
+  at45page_t pageRemap(at45page_t p) {
+    return signal BConfig.remap[client](p);
+  }
+
+  event at45page_t BConfig.npages[uint8_t id]() {
+    return call At45dbVolume.volumeSize[id]() >> 1;
+  }
+
+  event at45page_t BConfig.remap[uint8_t id](at45page_t page) {
+    if (call BConfig.isConfig[id]() && call BConfig.flipped[id]())
+      page += signal BConfig.npages[id]();
+    return call At45dbVolume.remap[id](page);
+  }
+
+  default command int BConfig.isConfig[uint8_t blockId]() {
+    return FALSE;
+  }
+
+  default command int BConfig.flipped[uint8_t blockId]() {
+    return FALSE;
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Queue and initiate user requests					*/
+  /* ------------------------------------------------------------------ */
+
+  void eraseStart();
+  void syncStart();
+  void multipageStart(uint16_t crc);
+
+  void startRequest() {
+    switch (s[client].request)
+      {
+      case R_ERASE:
+	eraseStart();
+	break;
+      case R_SYNC:
+	syncStart();
+	break;
+      default:
+	multipageStart((uint16_t)s[client].buf);
+      }
+  }
+
+  void endRequest(error_t result, uint16_t crc) {
+    uint8_t c = client;
+    uint8_t tmpState = s[c].request;
+    
+    client = NO_CLIENT;
+    s[c].request = R_IDLE;
+    call Resource.release[c]();
+
+    switch(tmpState)
+      {
+      case R_READ:
+	signal BlockRead.readDone[c](s[c].addr, s[c].buf, currentOffset, result);
+	break;
+      case R_WRITE:
+	signal BlockWrite.writeDone[c](s[c].addr, s[c].buf, currentOffset, result);
+	break;
+      case R_ERASE:
+	signal BlockWrite.eraseDone[c](result);
+	break;
+      case R_CRC:
+	signal BlockRead.computeCrcDone[c](s[c].addr, currentOffset, crc, result);
+	break;
+      case R_SYNC:
+	signal BlockWrite.syncDone[c](result);
+	break;
+      }
+  }
+
+  error_t newRequest(uint8_t newState, uint8_t id,
+		       storage_addr_t addr, uint8_t* COUNT_NOK(len) buf, storage_len_t len) {
+    storage_len_t vsize;
+
+    if (s[id].request != R_IDLE)
+      return EBUSY;
+
+    vsize = call BlockRead.getSize[id]();
+    if (addr > vsize || len > vsize - addr)
+      return EINVAL;
+
+    s[id].request = newState;
+    s[id].addr = addr;
+    /* With deputy, updating a buffer/length pair requires nulling-out the 
+       buffer first (setting the buffer first would fail if the new buffer
+       is shorter than the old, setting the length first would fail if the
+       new buffer is longer than the old) */
+    s[id].buf = NULL;
+    s[id].len = len;
+    s[id].buf = buf;
+
+    call Resource.request[id]();
+
+    return SUCCESS;
+  }
+
+  event void Resource.granted[uint8_t blockId]() {
+    client = blockId;
+
+    if (s[blockId].request == R_WRITE &&
+	call BConfig.writeHook[blockId]())
+      {
+	/* Config write intercept. We'll get a writeContinue when it's
+	   time to resume. */
+	client = NO_CLIENT;
+	return;
+      }
+    startRequest();
+  }
+
+  default command int BConfig.writeHook[uint8_t blockId]() {
+    return FALSE;
+  }
+
+  event void BConfig.writeContinue[uint8_t blockId](error_t error) {
+    /* Config intercept complete. Resume operation. */
+    client = blockId;
+    if (error == SUCCESS)
+      startRequest();
+    else
+      endRequest(error, 0);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Multipage operations            					*/
+  /* ------------------------------------------------------------------ */
+
+  void multipageContinue(uint16_t crc) {
+    storage_addr_t remaining = s[client].len - currentOffset, addr;
+    at45page_t page;
+    at45pageoffset_t pageOffset, count;
+    uint8_t *buf = s[client].buf;
+
+    if (remaining == 0)
+      {
+	endRequest(SUCCESS, crc);
+	return;
+      }
+
+    addr = s[client].addr + currentOffset;
+    page = pageRemap(addr >> AT45_PAGE_SIZE_LOG2);
+    pageOffset = addr & ((1 << AT45_PAGE_SIZE_LOG2) - 1);
+    count = (1 << AT45_PAGE_SIZE_LOG2) - pageOffset;
+    if (remaining < count)
+      count = remaining;
+
+    switch (s[client].request)
+      {
+      case R_WRITE:
+	call At45db.write(page, pageOffset, buf + currentOffset, count);
+	break;
+      case R_READ:
+	call At45db.read(page, pageOffset, buf + currentOffset, count);
+	break;
+      case R_CRC:
+	call At45db.computeCrc(page, pageOffset, count, crc);
+	break;
+      }
+    currentOffset += count;
+  }
+
+  void multipageStart(uint16_t crc) {
+    currentOffset = 0;
+    multipageContinue(crc);
+  }
+
+  void multipageOpDone(error_t result, uint16_t crc) {
+    if (result != SUCCESS)
+      endRequest(result, 0);
+    else
+      multipageContinue(crc);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Erase								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t BlockWrite.erase[uint8_t id]() {
+    return newRequest(R_ERASE, id, 0, NULL, 0);
+  }
+
+  void eraseStart() {
+    call At45db.erase(pageRemap(0), AT45_ERASE);
+  }
+
+  void eraseEraseDone(error_t error) {
+    endRequest(error, 0);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Write								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t BlockWrite.write[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) {
+    return newRequest(R_WRITE, id, addr, buf, len);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Sync								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t BlockWrite.sync[uint8_t id]() {
+    return newRequest(R_SYNC, id, 0, NULL, 0);
+  }
+
+  void syncStart() {
+    call At45db.syncAll();
+  }
+
+  void syncSyncDone(error_t error) {
+    endRequest(error, 0);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Read								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t BlockRead.read[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) {
+    return newRequest(R_READ, id, addr, buf, len);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Compute CRC							*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t BlockRead.computeCrc[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t basecrc) {
+    return newRequest(R_CRC, id, addr, TCAST(void * COUNT(len),basecrc), len);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Get Size								*/
+  /* ------------------------------------------------------------------ */
+
+  command storage_len_t BlockRead.getSize[uint8_t blockId]() {
+    storage_len_t vsize;
+
+    if (call BConfig.isConfig[blockId]())
+      vsize = signal BConfig.npages[blockId]();
+    else
+      vsize = call At45dbVolume.volumeSize[blockId]();
+
+    return vsize << AT45_PAGE_SIZE_LOG2;
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Dispatch HAL operations to current user op				*/
+  /* ------------------------------------------------------------------ */
+
+  event void At45db.writeDone(error_t result) {
+    if (client != NO_CLIENT)
+      multipageOpDone(result, 0);
+  }
+
+  event void At45db.readDone(error_t result) {
+    if (client != NO_CLIENT)
+      multipageOpDone(result, 0);
+  }
+
+  event void At45db.computeCrcDone(error_t result, uint16_t newCrc) {
+    if (client != NO_CLIENT)
+      multipageOpDone(result, newCrc);
+  }
+
+  event void At45db.eraseDone(error_t result) {
+    if (client != NO_CLIENT)
+      eraseEraseDone(result);
+  }
+
+  event void At45db.syncDone(error_t result) {
+    if (client != NO_CLIENT)
+      syncSyncDone(result);
+  }
+
+  event void At45db.flushDone(error_t result) { }
+  event void At45db.copyPageDone(error_t error) { }
+  default event void BlockWrite.writeDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t result) { }
+  default event void BlockWrite.eraseDone[uint8_t id](error_t result) { }
+  default event void BlockWrite.syncDone[uint8_t id](error_t result) { }
+  default event void BlockRead.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t result) { }
+  default event void BlockRead.computeCrcDone[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t x, error_t result) { }
+  
+  default command at45page_t At45dbVolume.remap[uint8_t id](at45page_t volumePage) { return 0; }
+  default command at45page_t At45dbVolume.volumeSize[uint8_t id]() { return 0; }
+  default async command error_t Resource.request[uint8_t id]() { return FAIL; }
+  default async command error_t Resource.release[uint8_t id]() { return FAIL; }
+}
diff --git a/tos/chips/at45db/ConfigStorageC.nc b/tos/chips/at45db/ConfigStorageC.nc
new file mode 100644
index 00000000..d0f7ff8e
--- /dev/null
+++ b/tos/chips/at45db/ConfigStorageC.nc
@@ -0,0 +1,43 @@
+// $Id: ConfigStorageC.nc,v 1.4 2006-12-12 18:23:02 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Implementation of the config storage abstraction from TEP103 for the
+ * Atmel AT45DB serial data flash.
+ *
+ * @param volid Volume to use for config storage
+ *
+ * @author David Gay
+ */
+
+#include "Storage.h"
+
+generic configuration ConfigStorageC(volume_id_t volid) {
+  provides {
+    interface Mount;
+    interface ConfigStorage;
+  }
+}
+implementation {
+  enum {
+    CONFIG_ID = unique(UQ_CONFIG_STORAGE),
+    RESOURCE_ID = unique(UQ_AT45DB)
+  };
+    
+  components ConfigStorageP, WireConfigStorageP, At45dbStorageManagerC, At45dbC;
+  components BlockStorageP, WireBlockStorageP;
+
+  Mount = ConfigStorageP.Mount[CONFIG_ID];
+  ConfigStorage = ConfigStorageP.ConfigStorage[CONFIG_ID];
+
+  BlockStorageP.At45dbVolume[CONFIG_ID] -> At45dbStorageManagerC.At45dbVolume[volid];
+  BlockStorageP.Resource[CONFIG_ID] -> At45dbC.Resource[RESOURCE_ID];
+}
diff --git a/tos/chips/at45db/ConfigStorageP.nc b/tos/chips/at45db/ConfigStorageP.nc
new file mode 100644
index 00000000..79cbaaa1
--- /dev/null
+++ b/tos/chips/at45db/ConfigStorageP.nc
@@ -0,0 +1,407 @@
+// $Id: ConfigStorageP.nc,v 1.7 2008-06-23 20:25:15 regehr Exp $
+
+/*
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Private component of the AT45DB implementation of the config storage
+ * abstraction.
+ *
+ * @author: David Gay <dgay@acm.org>
+ */
+
+#include "Storage.h"
+#include "crc.h"
+
+module ConfigStorageP @safe() {
+  provides {
+    interface Mount[uint8_t id];
+    interface ConfigStorage[uint8_t id];
+    interface At45dbBlockConfig as BConfig[uint8_t id];
+  }
+  uses {
+    interface At45db;
+    interface BlockRead[uint8_t id];
+    interface BlockWrite[uint8_t id];
+  }
+}
+implementation 
+{
+  /* A config storage is built on top of a block storage volume, with
+     the block storage volume divided into two and the first 4 bytes of
+     each half holding a (>0) version number. The valid half with the
+     highest version number is the current version.
+
+     Transactional behaviour is achieved by copying the current half
+     into the other, then increment its version number. Writes then
+     proceed in that new half until a commit, which just uses the 
+     underlying BlockStorage commit's operation.
+
+     Note: all of this depends on the at45db's implementation of 
+     BlockStorageP. It will not work over an arbitrary BlockStorageP
+     implementation (additionally, it uses hooks in BlockStorageP to
+     support the half-volume operation). Additionally, the code assumes
+     that the config volumes all have lower ids than the block volumes.
+  */
+
+  enum {
+    S_STOPPED,
+    S_MOUNT,
+    S_COMMIT,
+    S_CLEAN,
+    S_DIRTY,
+    S_INVALID
+  };
+
+  enum {
+    N = uniqueCount(UQ_CONFIG_STORAGE),
+    NO_CLIENT = 0xff,
+  };
+
+  /* Per-client state. We could keep just the state and current version
+     in an array, but this requires more complex arbitration (don't
+     release block storage during mount or commit). As I don't expect
+     many config volumes, this doesn't seem worth the trouble. */
+  struct {
+    uint8_t state : 3;
+    uint8_t committing : 1;
+  } s[N];
+  nx_struct {
+    nx_uint16_t crc;
+    nx_uint32_t version;
+  } low[N], high[N];
+
+
+  /* Bit n is true if client n is using upper block */
+  uint8_t flipState[(N + 7) / 8]; 
+
+  uint8_t client = NO_CLIENT;
+  at45page_t nextPage;
+
+  void setFlip(uint8_t id, bool flip) {
+    if (flip)
+      flipState[id >> 3] |= 1 << (id & 7);
+    else
+      flipState[id >> 3] &= ~(1 << (id & 7));
+  }
+
+  bool flipped(uint8_t id) {
+    return call BConfig.flipped[id]();
+  }
+
+  void flip(uint8_t id) {
+    setFlip(id, !flipped(id));
+  }
+
+  storage_len_t volumeSize(uint8_t id) {
+    return call BlockRead.getSize[id]();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Mounting								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t Mount.mount[uint8_t id]() {
+    /* Read version on both halves. Validate higher. Validate lower if
+       higher invalid. Use lower if both invalid. */
+    if (s[id].state != S_STOPPED)
+      return FAIL;
+
+    s[id].state = S_MOUNT;
+    setFlip(id, FALSE);
+    call BlockRead.read[id](0, &low[id], sizeof low[id]);
+
+    return SUCCESS;
+  }
+
+  void computeCrc(uint8_t id) {
+    call BlockRead.computeCrc[id](sizeof(nx_uint16_t),
+				  volumeSize(id) - sizeof(nx_uint16_t),
+				  0);
+  }
+
+  void mountReadDone(uint8_t id, error_t error) {
+    if (error != SUCCESS)
+      {
+	s[id].state = S_STOPPED;
+	signal Mount.mountDone[id](FAIL);
+      }
+    else if (!call BConfig.flipped[id]())
+      {
+	/* Just read low-half version. Read high-half version */
+	setFlip(id, TRUE);
+	call BlockRead.read[id](0, &high[id], sizeof high[id]);
+      }
+    else
+      {
+	/* Verify the half with the largest version */
+	setFlip(id, high[id].version > low[id].version);
+	computeCrc(id);
+      }
+  }
+
+  void mountCrcDone(uint8_t id, uint16_t crc, error_t error) {
+    bool isflipped = call BConfig.flipped[id]();
+
+    if (error == SUCCESS &&
+	crc == (isflipped ? high[id].crc : low[id].crc))
+      {
+	/* We just use the low data once mounted */
+	if (isflipped)
+	  low[id].version = high[id].version;
+	s[id].state = S_CLEAN;
+      }
+    else
+      {
+	// try the other half?
+	if ((high[id].version > low[id].version) == isflipped)
+	  {
+	    /* Verification of the half with the highest version failed. Try
+	       the other half. */
+	    setFlip(id, !isflipped);
+	    computeCrc(id);
+	    return;
+	  }
+	/* Both halves bad, terminate. Reads will fail. */
+	s[id].state = S_INVALID;
+	low[id].version = 0;
+      }
+    signal Mount.mountDone[id](SUCCESS);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Read								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t ConfigStorage.read[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) {
+    /* Read from current half using BlockRead */
+    if (s[id].state < S_CLEAN)
+      return EOFF;
+    if (s[id].state == S_INVALID) // nothing to read
+      return FAIL;
+
+    return call BlockRead.read[id](addr + sizeof low[0], buf, len);
+  }
+
+  void readReadDone(uint8_t id, storage_addr_t addr, void* COUNT(len) buf, storage_len_t len, error_t error) {
+    signal ConfigStorage.readDone[id](addr - sizeof low[0], buf, len, error);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Write								*/
+  /* ------------------------------------------------------------------ */
+
+  command error_t ConfigStorage.write[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) {
+    /* 1: If first write:
+         copy to other half with incremented version number
+       2: Write to other half using BlockWrite */
+
+    if (s[id].state < S_CLEAN)
+      return EOFF;
+    return call BlockWrite.write[id](addr + sizeof low[0], buf, len);
+  }
+
+  void copyCopyPageDone(error_t error);
+  void writeContinue(error_t error);
+
+  command int BConfig.writeHook[uint8_t id]() {
+    if (s[id].committing)
+      return FALSE;
+
+    flip(id); /* We write to the non-current half... */
+    if (s[id].state != S_CLEAN) // no copy if dirty or invalid
+      return FALSE;
+
+    /* Time to do the copy dance */
+    client = id;
+    nextPage = signal BConfig.npages[id]();
+    copyCopyPageDone(SUCCESS);
+
+    return TRUE;
+  }
+
+  void copyCopyPageDone(error_t error) {
+    if (error != SUCCESS)
+      writeContinue(error);
+    else if (nextPage == 0) // copy done
+      {
+	s[client].state = S_DIRTY;
+	writeContinue(SUCCESS);
+      }
+    else
+      {
+	// copy next page
+	at45page_t from, to, npages = signal BConfig.npages[client]();
+
+	to = from = signal BConfig.remap[client](--nextPage);
+	if (flipped(client))
+	  from -= npages;
+	else
+	  from += npages;
+
+	call At45db.copyPage(from, to);
+      }
+  }
+
+  void writeContinue(error_t error) {
+    uint8_t id = client;
+
+    client = NO_CLIENT;
+    signal BConfig.writeContinue[id](error);
+  }
+
+  void writeWriteDone(uint8_t id, storage_addr_t addr, void* COUNT(len) buf, storage_len_t len, error_t error) {
+    flip(id); // flip back to current half
+    signal ConfigStorage.writeDone[id](addr - sizeof low[0], buf, len, error);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Commit								*/
+  /* ------------------------------------------------------------------ */
+
+  void commitSyncDone(uint8_t id, error_t error);
+
+  command error_t ConfigStorage.commit[uint8_t id]() {
+    error_t ok;
+    uint16_t crc;
+    uint8_t i;
+
+    if (s[id].state < S_CLEAN)
+      return EOFF;
+
+    if (s[id].state == S_CLEAN)
+      /* A dummy CRC call to avoid signaling a completion event from here */
+      return call BlockRead.computeCrc[id](0, 1, 0);
+
+    /* Compute CRC for new version and current contents */
+    flip(id);
+    low[id].version++;
+    for (crc = 0, i = 0; i < sizeof low[id].version; i++)
+      crc = crcByte(crc, ((uint8_t *)&low[id] + sizeof(nx_uint16_t))[i]);
+    ok = call BlockRead.computeCrc[id](sizeof low[id],
+				       volumeSize(id) - sizeof low[id],
+				       crc);
+    if (ok == SUCCESS)
+      s[id].committing = TRUE;
+
+    return ok;
+  }
+
+  void commitCrcDone(uint8_t id, uint16_t crc, error_t error) {
+    /* Weird commit of clean volume hack: we just complete now, w/o
+       really doing anything. Ideally we should short-circuit out in the
+       commit call, but that would break the "no-signal-from-command"
+       rule. So we just waste the CRC computation effort instead - the
+       assumption is people don't regularly commit clean volumes. */
+    if (s[id].state == S_CLEAN)
+      signal ConfigStorage.commitDone[id](error);
+    else if (error != SUCCESS)
+      commitSyncDone(id, error);
+    else
+      {
+	low[id].crc = crc;
+	call BlockWrite.write[id](0, &low[id], sizeof low[id]);
+      }
+  }
+
+  void commitWriteDone(uint8_t id, error_t error) {
+    if (error != SUCCESS)
+      commitSyncDone(id, error);
+    else
+      call BlockWrite.sync[id]();
+  }
+
+  void commitSyncDone(uint8_t id, error_t error) {
+    s[id].committing = FALSE;
+    if (error == SUCCESS)
+      s[id].state = S_CLEAN;
+    else
+      flip(id); // revert to old block
+    signal ConfigStorage.commitDone[id](error);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Get Size								*/
+  /* ------------------------------------------------------------------ */
+
+  command storage_len_t ConfigStorage.getSize[uint8_t id]() {
+    return volumeSize(id) - sizeof low[0];
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Valid								*/
+  /* ------------------------------------------------------------------ */
+
+  command bool ConfigStorage.valid[uint8_t id]() {
+    return s[id].state != S_INVALID;
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Interface with BlockStorageP					*/
+  /* ------------------------------------------------------------------ */
+
+  /* The config volumes use the low block volume numbers. So a volume is a
+     config volume iff its its id is less than N */
+
+  command int BConfig.isConfig[uint8_t id]() {
+    return id < N;
+  }
+
+  inline command int BConfig.flipped[uint8_t id]() {
+    return (flipState[id >> 3] & (1 << (id & 7))) != 0;
+  }
+
+  event void BlockRead.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {
+    if (id < N)
+      if (s[id].state == S_MOUNT)
+	mountReadDone(id, error);
+      else
+	readReadDone(id, addr, buf, len, error);
+  }
+
+  event void BlockWrite.writeDone[uint8_t id]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {
+    if (id < N)
+      if (s[id].committing)
+	commitWriteDone(id, error);
+      else
+	writeWriteDone(id, addr, buf, len, error);
+  }
+
+  event void BlockWrite.syncDone[uint8_t id]( error_t error ) {
+    if (id < N)
+      commitSyncDone(id, error);
+  }
+
+  event void BlockRead.computeCrcDone[uint8_t id]( storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error ) {
+    if (id < N)
+      if (s[id].state == S_MOUNT)
+	mountCrcDone(id, crc, error);
+      else
+	commitCrcDone(id, crc, error);
+  }
+
+  event void At45db.copyPageDone(error_t error) {
+    if (client != NO_CLIENT)
+      copyCopyPageDone(error);
+  }
+
+  event void BlockWrite.eraseDone[uint8_t id](error_t error) {}
+  event void At45db.eraseDone(error_t error) {}
+  event void At45db.syncDone(error_t error) {}
+  event void At45db.flushDone(error_t error) {}
+  event void At45db.readDone(error_t error) {}
+  event void At45db.computeCrcDone(error_t error, uint16_t crc) {}
+  event void At45db.writeDone(error_t error) {}
+
+  default event void Mount.mountDone[uint8_t id](error_t error) { }
+  default event void ConfigStorage.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void ConfigStorage.writeDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void ConfigStorage.commitDone[uint8_t id](error_t error) {}
+}
diff --git a/tos/chips/at45db/HplAt45db.h b/tos/chips/at45db/HplAt45db.h
new file mode 100644
index 00000000..8c83bad0
--- /dev/null
+++ b/tos/chips/at45db/HplAt45db.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef HPLAT45DB_H
+#define HPLAT45DB_H
+
+#include "HplAt45db_chip.h"
+
+enum { // commands we're executing (all SPI Mode 0 or 3)
+  AT45_C_READ_BUFFER1 = 0xd4,
+  AT45_C_READ_BUFFER2 = 0xd6,
+  AT45_C_READ_CONTINUOUS = 0xe8,
+  AT45_C_READ_PAGE = 0xd2,
+  AT45_C_WRITE_BUFFER1 = 0x84,
+  AT45_C_WRITE_BUFFER2 = 0x87,
+  AT45_C_WRITE_MEM_BUFFER1 = 0x82,
+  AT45_C_WRITE_MEM_BUFFER2 = 0x85,
+  AT45_C_FILL_BUFFER1 = 0x53, 
+  AT45_C_FILL_BUFFER2 = 0x55, 
+  AT45_C_FLUSH_BUFFER1 = 0x83,
+  AT45_C_FLUSH_BUFFER2 = 0x86,
+  AT45_C_QFLUSH_BUFFER1 = 0x88,
+  AT45_C_QFLUSH_BUFFER2 = 0x89,
+  AT45_C_COMPARE_BUFFER1 = 0x60,
+  AT45_C_COMPARE_BUFFER2 = 0x61,
+  AT45_C_REQ_STATUS = 0xd7,
+  AT45_C_ERASE_PAGE = 0x81,
+};
+
+
+#endif
diff --git a/tos/chips/at45db/HplAt45db.nc b/tos/chips/at45db/HplAt45db.nc
new file mode 100644
index 00000000..afe70ce6
--- /dev/null
+++ b/tos/chips/at45db/HplAt45db.nc
@@ -0,0 +1,186 @@
+/*
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * HPL for Atmel's AT45DB family of serial dataflash chips. 
+ * Provides access to all basic AT45DB operations plus operations to 
+ * wait for the flash to go idle or finish a comparison. See the AT45DB
+ * family datasheets for full details on these operations.
+ * <p>
+ * This interface only supports one operation at a time.
+ *
+ * @author David Gay
+ */
+
+#include "HplAt45db.h"
+
+interface HplAt45db {
+  /**
+   * Wait for a "Group A" operation to complete (essentially all non-buffer
+   * operations). You should use waitComapre if you are waiting for a
+   * comparison to complete. waitIdleDone will be signaled when the operation
+   * is complete.
+   */
+  command void waitIdle();
+
+  /**
+   * Signaled when the flash is idle.
+   */
+  event void waitIdleDone();
+
+  /**
+   * Wait for a buffer-flash comparison to complete. waitCompareDone will
+   * be signaled when that occurs.
+   */
+  command void waitCompare();
+
+  /**
+   * Signaled when the buffer-flash comparison is complete.
+   * @param compareOk TRUE if the comparison succeeded, FALSE otherwise.
+   */
+  event void waitCompareDone(bool compareOk);
+
+  /**
+   * Read a page from flash into a buffer. fillDone will be signaled.
+   * @param cmd AT45_C_FILL_BUFFER1 to read into buffer 1, 
+   *   AT45_C_FILL_BUFFER2 to read into buffer 2
+   * @param page Page to read (must be less than AT45_MAX_PAGES)
+   */
+  command void fill(uint8_t cmd, at45page_t page);
+
+  /**
+   * Signaled when fill command sent (use waitIdle to detect when
+   * fill command completes)
+   */
+  event void fillDone();
+
+  /**
+   * Write a buffer to a flash page. flushDone will be signaled.
+   * @param cmd AT45_C_FLUSH_BUFFER1 to write buffer 1 to flash,
+   *   AT45_C_FLUSH_BUFFER2 to write buffer 2 to flash,
+   *   AT45_C_QFLUSH_BUFFER1 to write buffer 1 to flash w/o erase
+   *   (page must have been previously erased),
+   *   AT45_C_QFLUSH_BUFFER2 to write buffer 2 to flash w/o erase
+   *   (page must have been previously erased),
+   * @param page Page to write (must be less than AT45_MAX_PAGES)
+   */
+  command void flush(uint8_t cmd, at45page_t page);
+
+  /**
+   * Signaled when flush command sent (use waitIdle to detect when
+   * flush command completes)
+   */
+  event void flushDone();
+
+  /**
+   * Compare a page from flash with a buffer. compareDone will be signaled.
+   * @param cmd AT45_C_COMPARE_BUFFER1 to compare buffer 1, 
+   *   AT45_C_COMPARE_BUFFER2 to compare buffer 2
+   * @param page Page to compare with (must be less than AT45_MAX_PAGES)
+   */
+  command void compare(uint8_t cmd, at45page_t page);
+
+  /**
+   * Signaled when compare command sent (use waitCompare to detect when
+   * compare command completes and find out comparison result)
+   */
+  event void compareDone();
+
+  /**
+   * Erase a flash page. eraseDone will be signaled.
+   * @param cmd must be AT45_C_ERASE_PAGE
+   * @param page Page to compare with (must be less than AT45_MAX_PAGES)
+   */
+  command void erase(uint8_t cmd, at45page_t page);
+
+  /**
+   * Signaled when erase command sent (use waitIdle to detect when
+   * erase command completes)
+   */
+  event void eraseDone();
+
+  /**
+   * Read from a flash buffer. readDone will be signaled.
+   * @param cmd AT45_C_READ_BUFFER1 to read from buffer 1,
+   *   AT45_C_READ_BUFFER2 to read from buffer 2
+   * @param offset Offset in page at which to start reading - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param data Buffer in which to place read data. The buffer is "returned"
+   *   at readDone time.
+   * @param n Number of bytes to read (> 0). offset + n must be <= 
+   *   AT45_PAGE_SIZE
+   */
+  command void readBuffer(uint8_t cmd, at45pageoffset_t offset,
+  		    uint8_t *PASS COUNT_NOK(n) data, uint16_t n);
+
+  /**
+   * Read directly from flash. readDone will be signaled.
+   * @param cmd AT45_C_READ_CONTINUOUS or AT45_C_READ_PAGE. When the end of
+   *   a page is read, AT45_C_READ_CONTINUOUS continues on the next page,
+   *   while AT45_C_READ_PAGE continues at the start of the same page.
+   * @param page Page to read from
+   * @param offset Offset in page at which to start reading - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param data Buffer in which to place read data. The buffer is "returned"
+   *   at readDone time.
+   * @param n Number of bytes to read (> 0).
+   */
+  command void read(uint8_t cmd, at45page_t page, at45pageoffset_t offset,
+  		    uint8_t *PASS COUNT_NOK(n) data, at45pageoffset_t n);
+
+  /**
+   * Signaled when data has been read from the buffer. The data buffer
+   * is "returned".
+   */
+  event void readDone();
+
+  /**
+   * Compute CRC of data in a flash buffer (using the CRC function from crc.h).
+   * crcDone will be signaled.
+   * @param cmd AT45_C_READ_BUFFER1 to compute CRC from buffer 1,
+   *   AT45_C_READ_BUFFER2 to compute CRC from buffer 2
+   * @param page ignored (reserved for future use)
+   * @param offset Offset in page at which to start reading - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param n Number of bytes to read (> 0). offset + n must be <= 
+   *   AT45_PAGE_SIZE
+   * @param baseCrc initial CRC value - use 0 if computing a "standalone"
+   *   CRC, or a previous crc result if computing a CRC over several
+   *   flash pages
+   */
+  command void crc(uint8_t cmd, at45page_t page, at45pageoffset_t offset,
+		   at45pageoffset_t n, uint16_t baseCrc);
+  /**
+   * Signaled when CRC has been computed.
+   * @param computedCrc CRC value
+   */
+  event void crcDone(uint16_t computedCrc);
+
+  /**
+   * Write some data to a flash buffer, and optionally the flash itself. 
+   * writeDone will be signaled.
+   * @param cmd One of AT45_C_WRITE_BUFFER1/2 or AT45_C_WRITE_MEM_BUFFER1/2
+   *   to write respectively to buffer 1/2, or to buffer 1/2 and the 
+   *   specified main memory page.
+   * @param page Page to write when cmd is AT45_C_WRITE_MEM_BUFFER1/2
+   * @param offset Offset in page at which to start writing - must be between
+   *   0 and AT45_PAGE_SIZE - 1 
+   * @param data Data to write. The buffer is "returned" at writeDone time.
+   * @param n Number of bytes to write (> 0). offset + n must be <= 
+   *   AT45_PAGE_SIZE
+   */
+  command void write(uint8_t cmd, at45page_t page, at45pageoffset_t offset,
+  		     uint8_t *PASS COUNT_NOK(n) data, at45pageoffset_t n);
+
+  /**
+   * Signaled when data has been written to the buffer. The data buffer
+   * is "returned".
+   */
+  event void writeDone();
+}
diff --git a/tos/chips/at45db/HplAt45dbByte.nc b/tos/chips/at45db/HplAt45dbByte.nc
new file mode 100644
index 00000000..047e4f27
--- /dev/null
+++ b/tos/chips/at45db/HplAt45dbByte.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Interface between generic byte-at-a-time AT45DB HPL implementation and
+ * its platform specific aspects.
+ * <p>
+ * Each platform must provide its own HPL implementation for its AT45DB
+ * flash chip. To simplify this task, this directory provides a generic HPL
+ * implementation (HplAt45dbByteC) which can easily be used to build an
+ * AT45DB HPL by connecting it to a byte-at-a-time SPI interface, and an
+ * implementation of the operations of this interface.
+ *
+ * @author David Gay
+ */
+
+interface HplAt45dbByte {
+  /**
+   * Wait for the flash chip to report that it is idle. This command is
+   * called immediately after sending a status request command to the
+   * flash, so it is sufficient to wait for the flash's data pin to go
+   * high.
+   */
+  command void waitIdle();
+  /**
+   * Signaled when the flash chip is idle.
+   */
+  event void idle();
+
+  /**
+   * This command may be called immediately after idle is signaled. It
+   * must report the flash's current compare status.
+   * @return TRUE if the last compare succeeded, FALSE if it failed.
+   */
+  command bool getCompareStatus();
+
+  /**
+   * Assert the flash's select pin.
+   */
+  command void select();
+
+  /**
+   * Deassert the flash's select pin.
+   */
+  command void deselect();
+}
diff --git a/tos/chips/at45db/HplAt45dbByteC.nc b/tos/chips/at45db/HplAt45dbByteC.nc
new file mode 100644
index 00000000..46f0a520
--- /dev/null
+++ b/tos/chips/at45db/HplAt45dbByteC.nc
@@ -0,0 +1,256 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Generic byte-at-a-time implementation of the AT45DB HPL.
+ * 
+ * Each platform must provide its own HPL implementation for its AT45DB
+ * flash chip. To simplify this task, this component can easily be used to
+ * build an AT45DB HPL by connecting it to a byte-at-a-time SPI interface,
+ * and an HplAt45dbByte interface.
+ *
+ * @param The number of bits needed to represent a sector size, e.g., 9
+ *   for the AT45DB041B.
+ *
+ * @author David Gay
+ */
+
+generic module HplAt45dbByteC(int sectorSizeLog2) @safe() {
+  provides interface HplAt45db;
+  uses {
+    interface Resource;
+    interface SpiByte as FlashSpi;
+    interface HplAt45dbByte;
+  }
+}
+implementation 
+{
+  enum {
+    P_IDLE,
+    P_SEND_CMD, 
+    P_READ,
+    P_READ_CRC,
+    P_WRITE,
+    P_WAIT_IDLE,
+    P_WAIT_COMPARE,
+    P_WAIT_COMPARE_OK,
+    P_FILL,
+    P_FLUSH,
+    P_COMPARE,
+    P_ERASE
+  };
+  uint8_t status = P_IDLE;
+  uint8_t flashCmd[9];
+  at45pageoffset_t dataCount;
+  uint8_t * COUNT_NOK(dataCount) data;
+  uint8_t dontCare;
+
+  void complete(uint16_t crc) {
+    uint8_t s = status;
+
+    status = P_IDLE;
+    switch (s)
+      {
+      default: break;
+      case P_READ_CRC:
+	signal HplAt45db.crcDone(crc);
+	break;
+      case P_FILL:
+	signal HplAt45db.fillDone();
+	break;
+      case P_FLUSH:
+	signal HplAt45db.flushDone();
+	break;
+      case P_COMPARE:
+	signal HplAt45db.compareDone();
+	break;
+      case P_ERASE:
+	signal HplAt45db.eraseDone();
+	break;
+      case P_READ:
+	signal HplAt45db.readDone();
+	break;
+      case P_WRITE:
+	signal HplAt45db.writeDone();
+	break;
+      }
+  }
+
+  void requestFlashStatus() {
+    call HplAt45dbByte.select();
+    call FlashSpi.write(AT45_C_REQ_STATUS);
+    call HplAt45dbByte.waitIdle();
+  }
+
+  void doCommand() {
+    uint8_t in = 0, out = 0;
+    uint8_t *ptr;
+    at45pageoffset_t count;
+    uint8_t lphase;
+    uint16_t crc = (uint16_t)data;
+
+    if (dataCount) // skip 0-byte ops
+      {
+	/* For a 3% speedup, we could use labels and goto *.
+	   But: very gcc-specific. Also, need to do
+	   asm ("ijmp" : : "z" (state))
+	   instead of goto *state
+	*/
+
+	ptr = flashCmd;
+	lphase = P_SEND_CMD;
+	count = 4 + dontCare;
+
+	call HplAt45dbByte.select();
+	for (;;)
+	  {
+	    if (lphase == P_READ_CRC)
+	      {
+		crc = crcByte(crc, in);
+
+		--count;
+		if (!count)
+		  break;
+	      }
+	    else if (lphase == P_SEND_CMD)
+	      {
+		// Note: the dontCare bytes are read after the end of cmd...
+		out = *ptr++;
+		count--;
+		if (!count)
+		  {
+		    lphase = status;
+		    ptr = data;
+		    count = dataCount;
+		  }
+	      }
+	    else if (lphase == P_READ)
+	      {
+		*ptr++ = in;
+		--count;
+		if (!count)
+		  break;
+	      }
+	    else if (lphase == P_WRITE)
+	      {
+		if (!count)
+		  break;
+
+		out = *ptr++;
+		--count;
+	      }
+	    else /* P_COMMAND */
+	      break;
+	
+	    in = call FlashSpi.write(out);
+	  }
+	call HplAt45dbByte.deselect();
+      }
+
+    call Resource.release();
+    complete(crc);
+  }
+
+  event void Resource.granted() {
+    switch (status)
+      {
+      case P_WAIT_COMPARE: case P_WAIT_IDLE:
+	requestFlashStatus();
+	break;
+      default:
+	doCommand();
+	break;
+      }
+  }
+
+  void execCommand(uint8_t op, uint8_t reqCmd, uint8_t reqDontCare,
+		   at45page_t reqPage, at45pageoffset_t reqOffset,
+		   uint8_t * COUNT_NOK(reqCount) reqData, at45pageoffset_t reqCount) {
+    status = op;
+
+    // page (2 bytes) and highest bit of offset
+    flashCmd[0] = reqCmd;
+    flashCmd[1] = reqPage >> (16 - sectorSizeLog2);
+    flashCmd[2] = reqPage << (sectorSizeLog2 - 8) | reqOffset >> 8;
+    flashCmd[3] = reqOffset; // low-order 8 bits
+    data = NULL;
+    dataCount = reqCount;
+    data = reqData;
+    dontCare = reqDontCare;
+
+    call Resource.request();
+  }
+
+  command void HplAt45db.waitIdle() {
+    status = P_WAIT_IDLE;
+    call Resource.request();
+  }
+
+  command void HplAt45db.waitCompare() {
+    status = P_WAIT_COMPARE;
+    call Resource.request();
+  }
+
+  event void HplAt45dbByte.idle() {
+    if (status == P_WAIT_COMPARE)
+      {
+	bool cstatus = call HplAt45dbByte.getCompareStatus();
+	call HplAt45dbByte.deselect();
+	call Resource.release();
+	signal HplAt45db.waitCompareDone(cstatus);
+      }
+    else
+      {
+	call HplAt45dbByte.deselect();
+	call Resource.release();
+	signal HplAt45db.waitIdleDone();
+      }
+  }
+
+  command void HplAt45db.fill(uint8_t cmd, at45page_t page) {
+    execCommand(P_FILL, cmd, 0, page, 0, NULL, 1);
+  }
+
+  command void HplAt45db.flush(uint8_t cmd, at45page_t page) {
+    execCommand(P_FLUSH, cmd, 0, page, 0, NULL, 1);
+  }
+
+  command void HplAt45db.compare(uint8_t cmd, at45page_t page) {
+    execCommand(P_COMPARE, cmd, 0, page, 0, NULL, 1);
+  }
+
+  command void HplAt45db.erase(uint8_t cmd, at45page_t page) {
+    execCommand(P_ERASE, cmd, 0, page, 0, NULL, 1);
+  }
+
+  command void HplAt45db.read(uint8_t cmd,
+			      at45page_t page, at45pageoffset_t offset,
+			      uint8_t *pdata, at45pageoffset_t count) {
+    execCommand(P_READ, cmd, 5, page, offset, pdata, count);
+  }
+
+  command void HplAt45db.readBuffer(uint8_t cmd, at45pageoffset_t offset,
+				    uint8_t *pdata, at45pageoffset_t count) {
+    execCommand(P_READ, cmd, 2, 0, offset, pdata, count);
+  }
+
+  command void HplAt45db.crc(uint8_t cmd,
+			     at45page_t page, at45pageoffset_t offset,
+			     at45pageoffset_t count,
+			     uint16_t baseCrc) {
+    execCommand(P_READ_CRC, cmd, 2, page, offset, TCAST(uint8_t * COUNT(count), baseCrc), count);
+  }
+
+  command void HplAt45db.write(uint8_t cmd,
+			       at45page_t page, at45pageoffset_t offset,
+			       uint8_t *pdata, at45pageoffset_t count) {
+    execCommand(P_WRITE, cmd, 0, page, offset, pdata, count);
+  }
+}
diff --git a/tos/chips/at45db/LogStorageC.nc b/tos/chips/at45db/LogStorageC.nc
new file mode 100644
index 00000000..d011562c
--- /dev/null
+++ b/tos/chips/at45db/LogStorageC.nc
@@ -0,0 +1,44 @@
+// $Id: LogStorageC.nc,v 1.4 2006-12-12 18:23:02 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Implementation of the log storage abstraction from TEP103 for the
+ * Atmel AT45DB serial data flash.
+ *
+ * @param volid Volume to use for log storage
+ * @param circular TRUE if you want a circular log, FALSE for a linear log
+ *
+ * @author David Gay
+ */
+
+#include "Storage.h"
+
+generic configuration LogStorageC(volume_id_t volid, bool circular) {
+  provides {
+    interface LogWrite;
+    interface LogRead;
+  }
+}
+implementation {
+  enum {
+    LOG_ID = unique(UQ_LOG_STORAGE),
+    INTF_ID = LOG_ID << 1 | circular,
+    RESOURCE_ID = unique(UQ_AT45DB)
+  };
+    
+  components LogStorageP, WireLogStorageP, At45dbStorageManagerC, At45dbC;
+
+  LogWrite = LogStorageP.LogWrite[INTF_ID];
+  LogRead = LogStorageP.LogRead[INTF_ID];
+
+  LogStorageP.At45dbVolume[LOG_ID] -> At45dbStorageManagerC.At45dbVolume[volid];
+  LogStorageP.Resource[LOG_ID] -> At45dbC.Resource[RESOURCE_ID];
+}
diff --git a/tos/chips/at45db/LogStorageP.nc b/tos/chips/at45db/LogStorageP.nc
new file mode 100644
index 00000000..d85a3e28
--- /dev/null
+++ b/tos/chips/at45db/LogStorageP.nc
@@ -0,0 +1,1004 @@
+/*
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include <Storage.h>
+#include <crc.h>
+
+/**
+ * Private component of the AT45DB implementation of the log storage
+ * abstraction.
+ *
+ * @author: David Gay <dgay@acm.org>
+ * @author: Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module LogStorageP @safe() {
+  provides {
+    interface LogRead[uint8_t logId];
+    interface LogWrite[uint8_t logId];
+  }
+  uses {
+    interface At45db;
+    interface At45dbVolume[uint8_t logId];
+    interface Resource[uint8_t logId];
+  }
+}
+implementation
+{
+  /* Some design notes.
+
+  - The logId's in the LogRead and LogWrites are shifted left by 1 bit.
+    The low-order bit is 1 for circular logs, 0 for linear ones
+    (see newRequest and endRequest, and the LogStorageC configuration)
+
+  - Data is written sequentially to the pages of a log volume. Each page
+    ends with a footer (nx_struct pageinfo) recording metadata on the
+    current page:
+    o a cookie
+    o the "position" of the current page in the log (see below)
+    o the offset of the last record on this page (i.e., the offset
+      at which the last append ended) - only valid if flags & F_LASTVALID
+    o flags: 
+      x F_SYNC page was synchronised - data after lastRecordOffset
+        is not log data; implies F_LASTVALID
+      x F_CIRCLED this page is not from the first run through the log's
+        pages (never set in linear logs)
+      x F_LASTVALID not set if no record ended on this page
+    o a CRC
+
+  - "Positions" are stored in the metadata, used as cookies by
+    currentOffset and seek, and stored in the wpos and rpos fields of the
+    volume state structure.  They represent the number of bytes that
+    writing has advanced in the log since the log was erased, with
+    PAGE_SIZE added. Note that this is basically the number of bytes
+    written, except that when a page is synchronised unused bytes in the
+    page count towards increasing the position.
+
+    As a result, on page p, the following equation holds:
+      (metadata(p).pos - PAGE_SIZE) % volume-size == p * PAGE_SIZE
+    (this also means that the "position" metadata field could be replaced
+    by a count of the number of times writing has cycled through the log,
+    reducing the metadata size)
+
+    The PAGE_SIZE offset on positions is caused by Invariant 2 below: to
+    ensure that Invariant 2 is respected, at flash erase time, we write a
+    valid page with position 0 to the last block of the flash. As a result,
+    the first writes to the flash, in page 0, are at "position" PAGE_SIZE.
+
+  - This code is designed to deal with "one-at-a-time" failures (i.e.,
+    the system will not modify any blocks after a previous failed
+    write). This should allow recovery from:
+    o arbitrary reboots
+    o write failure (the underlying PageEEPROM shuts down after any
+      write fails; all pages are flushed before moving on to the next
+      page)
+    It will not recover from arbitrary data corruption
+
+  - When sync is called, the current write page is written to flash with an
+    F_SYNC flag and writing continues on the next page (wasting on average
+    half a flasg page)
+
+  - We maintain the following invariants on log volumes, even in the face
+    of the "one-at-a-time" failures described above:
+    1) at least one of the first and last blocks are valid
+    2) the last block, if valid, has the F_SYNC flag
+
+  - Locating the log boundary page (the page with the greatest position):
+
+    Invariant 1, the one-at-a-time failure model and the metadata position
+    definition guarantees that the physical flash pages have the following
+    properties:
+      an initial set of V1 valid pages,
+      followed by a set of I invalid pages,
+      followed by a set of V2 valid pages
+    with V1+i+V2=total-number-of-pages, and V1, V2, I >= 0
+    Additionally, the position of all pages in V1 is greater than in V2,
+    and consecutive pages in V1 (respectively V2) have greater positions
+    than their predecessors.
+
+    From this, it's possible to locate the log boundary page (the page with
+    the greatest position) using the following algorithm:
+    o let basepos=metadata(lastpage).pos, or 0 if the last page is invalid
+    o locate (using a binary search) the page p with the largest position
+      greater than basepos
+      invalid pages can be assumed to have positions less than basepos
+      if there is no such page p, let p = lastpage
+
+    Once the log boundary page is known, we resume writing at the last
+    page before p with a record boundary (Invariant 2, combined with
+    limiting individual records to volumesize - PAGE_SIZE ensures there
+    will be such a page).
+
+  - The read pointer has a special "invalid" state which represents the
+    current beginning of the log. In that state, LogRead.currentOffset()
+    returns SEEK_BEGINNING rather than a regular position.
+
+    The read pointer is invalidated:
+    o at boot time
+    o after the volume is erased
+    o after the write position "catches up" with the read position
+    o after a failed seek
+
+    Reads from an invalid pointer:
+    o start reading from the beginning of the flash if we are on the
+      first run through the log volume
+    o start reading at the first valid page after the write page with
+      an F_LASTVALID flag; the read offset is set to the lastRecordOffset
+      value
+      if this page has the SYNC flag, we start at the beginning of the
+      next page
+  */
+             
+
+  enum {
+    F_SYNC = 1,
+    F_CIRCLED = 2,
+    F_LASTVALID = 4
+  };
+
+  nx_struct pageinfo {
+    nx_uint16_t magic;
+    nx_uint32_t pos;
+    nx_uint8_t lastRecordOffset;
+    nx_uint8_t flags;
+    nx_uint16_t crc;
+  };
+
+  enum {
+    N = uniqueCount(UQ_LOG_STORAGE),
+    NO_CLIENT = 0xff,
+    PAGE_SIZE = AT45_PAGE_SIZE - sizeof(nx_struct pageinfo),
+    PERSISTENT_MAGIC = 0x4256,
+  };
+
+  enum {
+    R_IDLE,
+    R_ERASE,
+    R_APPEND,
+    R_SYNC,
+    R_READ,
+    R_SEEK
+  };
+
+  enum {
+    META_IDLE,
+    META_LOCATEFIRST,
+    META_LOCATE,
+    META_LOCATELAST,
+    META_SEEK,
+    META_READ,
+    META_WRITE
+  };
+
+  uint8_t client = NO_CLIENT;
+  uint8_t metaState;
+  bool recordsLost;
+  at45page_t firstPage, lastPage;
+  storage_len_t pos;
+  nx_struct pageinfo metadata;
+
+  struct {
+    /* The latest request made for this client, and it's arguments */
+    uint8_t request; 
+    uint8_t *COUNT_NOK(len) buf;
+    storage_len_t len;
+
+    /* Log r/w positions */
+    bool positionKnown : 1;
+    bool circular : 1;
+    bool circled : 1;
+    bool rvalid : 1;
+    uint32_t wpos;		/* Bytes since start of logging */
+    at45page_t wpage;		/* Current write page */
+    at45pageoffset_t woffset;	/* Offset on current write page */
+    uint32_t rpos;		/* Bytes since start of logging */
+    at45page_t rpage;		/* Current read page */
+    at45pageoffset_t roffset;	/* Offset on current read page */
+    at45pageoffset_t rend;	/* Last valid offset on current read page */
+  } s[N];
+
+  at45page_t firstVolumePage() {
+    return call At45dbVolume.remap[client](0);
+  }
+
+  at45page_t npages() {
+    return call At45dbVolume.volumeSize[client]();
+  }
+
+  at45page_t lastVolumePage() {
+    return call At45dbVolume.remap[client](npages());
+  }
+
+  void setWritePage(at45page_t page) {
+    if (s[client].circular && page == lastVolumePage())
+      {
+	s[client].circled = TRUE;
+	page = firstVolumePage();
+      }
+    s[client].wpage = page;
+    s[client].woffset = 0;
+  }
+
+  void invalidateReadPointer() {
+    s[client].rvalid = FALSE;
+  }
+
+  void crcPage(at45page_t page) {
+    call At45db.computeCrc(page, 0,
+			   PAGE_SIZE + offsetof(nx_struct pageinfo, crc), 0);
+  }
+
+  void readMetadata(at45page_t page) {
+    call At45db.read(page, PAGE_SIZE, &metadata, sizeof metadata);
+  }
+
+  void writeMetadata(at45page_t page) {
+    call At45db.write(page, PAGE_SIZE, &metadata, sizeof metadata);
+  }
+
+  void wmetadataStart();
+
+  void sync() {
+    metadata.flags = F_SYNC | F_LASTVALID;
+    metadata.lastRecordOffset = s[client].woffset;
+    /* rend is now no longer the end of the page */
+    if (s[client].rpage == s[client].wpage)
+      s[client].rend = s[client].woffset;
+    wmetadataStart();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Queue and initiate user requests					*/
+  /* ------------------------------------------------------------------ */
+
+  void eraseStart();
+  void appendStart();
+  void syncStart();
+  void readStart();
+  void locateStart();
+  void rmetadataStart();
+  void seekStart();
+
+  void startRequest() {
+    if (!s[client].positionKnown && s[client].request != R_ERASE)
+      {
+	locateStart();
+	return;
+      }
+
+    metaState = META_IDLE;
+    switch (s[client].request)
+      {
+      case R_ERASE: eraseStart(); break;
+      case R_APPEND: appendStart(); break;
+      case R_SYNC: syncStart(); break;
+      case R_READ: readStart(); break;
+      case R_SEEK: seekStart(); break;
+      }
+  }
+
+  void endRequest(error_t ok) {
+    uint8_t c = client;
+    uint8_t request = s[c].request;
+    storage_len_t actualLen = pos;
+    void *ptr = s[c].buf;
+    
+    client = NO_CLIENT;
+    s[c].request = R_IDLE;
+    call Resource.release[c]();
+
+    c = c << 1 | s[c].circular;
+    switch (request)
+      {
+      case R_ERASE: signal LogWrite.eraseDone[c](ok); break;
+      case R_APPEND: signal LogWrite.appendDone[c](ptr, actualLen, recordsLost, ok); break;
+      case R_SYNC: signal LogWrite.syncDone[c](ok); break;
+      case R_READ: signal LogRead.readDone[c](ptr, actualLen, ok); break;
+      case R_SEEK: signal LogRead.seekDone[c](ok); break;
+      }
+  }
+
+  /* Enqueue request and request the underlying flash */
+  error_t newRequest(uint8_t newRequest, uint8_t id,
+		     uint8_t *COUNT_NOK(length) buf, storage_len_t length) {
+    s[id >> 1].circular = id & 1;
+    id >>= 1;
+
+    if (s[id].request != R_IDLE)
+      return EBUSY;
+
+    s[id].request = newRequest;
+    s[id].buf = NULL;
+    s[id].len = length;
+    s[id].buf = buf;
+    call Resource.request[id]();
+
+    return SUCCESS;
+  }
+
+  event void Resource.granted[uint8_t id]() {
+    client = id;
+    pos = 0;
+    startRequest();
+  }
+
+  command error_t LogWrite.append[uint8_t id](void* buf, storage_len_t length) {
+    if (length > call LogRead.getSize[id]() - PAGE_SIZE)
+      /* Writes greater than the volume size are invalid.
+	 Writes equal to the volume size could break the log volume
+	 invariant (see next comment).
+	 Writes that span the whole volume could lead to problems
+	 at boot time (no valid block with a record boundary).
+	 Refuse them all. */
+      return EINVAL;
+    else
+      return newRequest(R_APPEND, id, buf, length);
+  }
+
+  command storage_cookie_t LogWrite.currentOffset[uint8_t id]() {
+    return s[id >> 1].wpos;
+  }
+
+  command error_t LogWrite.erase[uint8_t id]() {
+    return newRequest(R_ERASE, id, NULL, 0);
+  }
+
+  command error_t LogWrite.sync[uint8_t id]() {
+    return newRequest(R_SYNC, id, NULL, 0);
+  }
+
+  command error_t LogRead.read[uint8_t id](void* buf, storage_len_t length) {
+    return newRequest(R_READ, id, buf, length);
+  }
+
+  command storage_cookie_t LogRead.currentOffset[uint8_t id]() {
+    id >>= 1;
+    return s[id].rvalid ? s[id].rpos : SEEK_BEGINNING;
+  }
+
+  command error_t LogRead.seek[uint8_t id](storage_cookie_t offset) {
+    return newRequest(R_SEEK, id, TCAST(void *COUNT(offset), ((uint16_t)(offset >> 16))), offset);
+  }
+
+  command storage_len_t LogRead.getSize[uint8_t id]() {
+    return call At45dbVolume.volumeSize[id >> 1]() * (storage_len_t)PAGE_SIZE;
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Erase								*/
+  /* ------------------------------------------------------------------ */
+
+  void eraseMetadataDone() {
+    /* Set write pointer to the beginning of the flash */
+    s[client].wpos = PAGE_SIZE; // last page has offset 0 and is before us
+    s[client].circled = FALSE;
+    setWritePage(firstVolumePage()); 
+
+    invalidateReadPointer();
+
+    s[client].positionKnown = TRUE;
+    endRequest(SUCCESS);
+  }
+
+  void eraseEraseDone() {
+    if (firstPage == lastPage - 1)
+      {
+	/* We create a valid, synced last page (see invariants) */
+	metadata.flags = F_SYNC | F_LASTVALID;
+	metadata.lastRecordOffset = 0;
+	setWritePage(firstPage);
+	s[client].circled = FALSE;
+	s[client].wpos = 0;
+	wmetadataStart();
+      }
+    else
+      call At45db.erase(firstPage++, AT45_ERASE);
+  }
+
+  void eraseStart() {
+    s[client].positionKnown = FALSE; // in case erase fails
+    firstPage = firstVolumePage();
+    lastPage = lastVolumePage();
+    eraseEraseDone();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Locate log boundaries						*/
+  /* ------------------------------------------------------------------ */
+
+  void locateLastRecord();
+
+  void locateLastCrcDone(uint16_t crc) {
+    if (crc != metadata.crc)
+      {
+	locateLastRecord();
+	return;
+      }
+
+    /* We've found the last valid page with a record-end. Set up
+       the read and write positions. */
+    invalidateReadPointer();
+
+    if (metadata.flags & F_SYNC) /* must start on next page */
+      {
+	/* We need to special case the empty log, as we don't want
+	   to wrap around in the case of a full, non-circular log
+	   with a sync on its last page. */
+	if (firstPage == lastPage && !metadata.pos)
+	  setWritePage(firstVolumePage());
+	else
+	  setWritePage(firstPage + 1);
+	s[client].wpos = metadata.pos + PAGE_SIZE;
+      }
+    else
+      {
+	s[client].wpage = firstPage;
+	s[client].woffset = metadata.lastRecordOffset;
+	s[client].wpos = metadata.pos + metadata.lastRecordOffset;
+      }
+
+    s[client].circled = (metadata.flags & F_CIRCLED) != 0;
+    if (s[client].circled && !s[client].circular) // oops
+      {
+	endRequest(FAIL);
+	return;
+      }
+
+    /* And we can now proceed to the real request */
+    s[client].positionKnown = TRUE;
+    startRequest();
+  }
+
+  void locateLastReadDone() {
+    if (metadata.magic == PERSISTENT_MAGIC && metadata.flags & F_LASTVALID)
+      crcPage(firstPage);
+    else
+      locateLastRecord();
+  }
+
+  void locateLastRecord() {
+    if (firstPage == lastPage)
+      {
+	/* We walked all the way back to the last page, and it's not 
+	   valid. The log-volume invariant is not holding. Fail out. */
+	endRequest(FAIL);
+	return;
+      }
+
+    if (firstPage == firstVolumePage())
+      firstPage = lastPage;
+    else
+      firstPage--;
+
+    readMetadata(firstPage);
+  }
+
+  void located() {
+    metaState = META_LOCATELAST;
+    /* firstPage is one after last valid page, but the last page with
+       a record end may be some pages earlier. Search for it. */
+    lastPage = lastVolumePage() - 1;
+    locateLastRecord();
+  }
+
+  at45page_t locateCurrentPage() {
+    return firstPage + ((lastPage - firstPage) >> 1);
+  }
+
+  void locateBinarySearch() {
+    if (lastPage <= firstPage)
+      located();
+    else
+      readMetadata(locateCurrentPage());
+  }
+
+  void locateGreaterThan() {
+    firstPage = locateCurrentPage() + 1;
+    locateBinarySearch();
+  }
+
+  void locateLessThan() {
+    lastPage = locateCurrentPage();
+    locateBinarySearch();
+  }
+
+  void locateCrcDone(uint16_t crc) {
+    if (crc == metadata.crc)
+      {
+	s[client].wpos = metadata.pos;
+	locateGreaterThan();
+      }
+    else
+      locateLessThan();
+  }
+
+  void locateReadDone() {
+    if (metadata.magic == PERSISTENT_MAGIC && s[client].wpos < metadata.pos)
+      crcPage(locateCurrentPage());
+    else
+      locateLessThan();
+  }
+
+  void locateFirstCrcDone(uint16_t crc) {
+    if (metadata.magic == PERSISTENT_MAGIC && crc == metadata.crc)
+      s[client].wpos = metadata.pos;
+    else
+      s[client].wpos = 0;
+
+    metaState = META_LOCATE;
+    locateBinarySearch();
+  }
+
+  void locateFirstReadDone() {
+    crcPage(lastPage);
+  }
+
+  /* Locate log beginning and ending. See description at top of file. */
+  void locateStart() {
+    metaState = META_LOCATEFIRST;
+    firstPage = firstVolumePage();
+    lastPage = lastVolumePage() - 1;
+    readMetadata(lastPage);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Append								*/
+  /* ------------------------------------------------------------------ */
+
+  void appendContinue() {
+    uint8_t *buf = s[client].buf + pos;
+    at45pageoffset_t offset = s[client].woffset, count;
+    storage_len_t len = s[client].len - pos;
+    
+    if (len == 0)
+      {
+	endRequest(SUCCESS);
+	return;
+      }
+
+    if (s[client].wpage == lastVolumePage())
+      {
+	/* We reached the end of a linear log */
+	endRequest(ESIZE);
+	return;
+      }
+
+    if (offset + len <= PAGE_SIZE)
+      count = len;
+    else
+      count = PAGE_SIZE - offset;
+
+    s[client].wpos += count;
+    s[client].woffset += count;
+    pos += count;
+
+    /* We normally lose data at the point we make the first write to a
+       page in a log that has circled. */
+    if (offset == 0 && s[client].circled)
+      recordsLost = TRUE;
+
+    call At45db.write(s[client].wpage, offset, buf, count);
+  }
+  
+  void appendWriteDone() {
+    if (s[client].woffset == PAGE_SIZE) /* Time to write metadata */
+      wmetadataStart();
+    else
+      endRequest(SUCCESS);
+  }
+
+  void appendMetadataDone() { // metadata of previous page flushed
+    /* Setup metadata in case we overflow this page too */
+    metadata.flags = 0;
+    appendContinue();
+  }
+
+  void appendSyncDone() {
+    s[client].wpos = metadata.pos + PAGE_SIZE;
+    appendStart();
+  }
+
+  void appendStart() {
+    storage_len_t len = s[client].len - pos;
+    storage_len_t vlen = (storage_len_t)npages() * PAGE_SIZE;
+
+    recordsLost = FALSE;
+
+    /* If request would span the end of the flash, sync, to maintain the
+       invariant that the last flash page is synced and that either
+       the first or last pages are valid.
+
+       Note that >= in the if below means we won't write a record that
+       would end on the last byte of the last page, as this would mean that
+       we would not sync the last page, breaking the log volume
+       invariant */
+    if ((s[client].wpos - PAGE_SIZE) % vlen >= vlen - len)
+      sync();
+    else
+      {
+	/* Set lastRecordOffset in case we need to write metadata (see
+	   wmetadataStart) */
+	metadata.lastRecordOffset = s[client].woffset;
+	metadata.flags = F_LASTVALID;
+	appendContinue();
+      }
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Sync								*/
+  /* ------------------------------------------------------------------ */
+
+  void syncStart() {
+    if (s[client].woffset == 0) /* we can't lose any writes */
+      endRequest(SUCCESS);
+    else
+      sync();
+  }
+
+  void syncMetadataDone() {
+    /* Write position reflect the absolute position in the flash, not
+       user-bytes written. So update wpos to reflect sync effects. */
+    s[client].wpos = metadata.pos + PAGE_SIZE;
+    endRequest(SUCCESS);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Write block metadata						*/
+  /* ------------------------------------------------------------------ */
+
+  void wmetadataStart() {
+    /* The caller ensures that metadata.flags (except F_CIRCLED) and
+       metadata.lastRecordOffset are set correctly. */
+    metaState = META_WRITE;
+    firstPage = s[client].wpage; // remember page to commit
+    metadata.pos = s[client].wpos - s[client].woffset;
+    metadata.magic = PERSISTENT_MAGIC;
+    if (s[client].circled)
+      metadata.flags |= F_CIRCLED;
+
+    call At45db.computeCrc(firstPage, 0, PAGE_SIZE, 0);
+
+    /* We move to the next page now. If writing the metadata fails, we'll
+       simply leave the invalid page in place. Trying to recover seems
+       complicated, and of little benefit (note that in practice, At45dbC
+       shuts down after a failed write, so nothing is really going to
+       happen after that anyway). */
+    setWritePage(s[client].wpage + 1);
+
+    /* Invalidate read pointer if we reach it's page */
+    if (s[client].wpage == s[client].rpage)
+      invalidateReadPointer();
+  }
+
+  void wmetadataCrcDone(uint16_t crc) {
+    uint8_t i, *md;
+
+    // Include metadata in crc
+    md = (uint8_t *)&metadata;
+    for (i = 0; i < offsetof(nx_struct pageinfo, crc); i++)
+      crc = crcByte(crc, md[i]);
+    metadata.crc = crc;
+
+    // And save it
+    writeMetadata(firstPage);
+  }
+
+  void wmetadataWriteDone() {
+    metaState = META_IDLE;
+    if (metadata.flags & F_SYNC)
+      call At45db.sync(firstPage);
+    else
+      call At45db.flush(firstPage);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Read 								*/
+  /* ------------------------------------------------------------------ */
+
+  void readContinue() {
+    uint8_t *buf = s[client].buf + pos;
+    at45pageoffset_t offset = s[client].roffset, count;
+    at45pageoffset_t end = s[client].rend;
+    storage_len_t len = s[client].len - pos;
+    
+    if (len == 0)
+      {
+	endRequest(SUCCESS);
+	return;
+      }
+
+    if (!s[client].rvalid)
+      {
+	if (s[client].circled)
+	  /* Find a valid page after wpage, skipping invalid pages */
+	  s[client].rpage = s[client].wpage;
+	else
+	  {
+	    /* resume reading at the beginning of the first page */
+	    s[client].rvalid = TRUE;
+	    s[client].rpage = lastVolumePage() - 1;
+	  }
+
+	rmetadataStart();
+	return;
+      }
+
+    if (s[client].rpage == s[client].wpage)
+      end = s[client].woffset;
+
+    if (offset == end)
+      {
+	if ((s[client].rpage + 1 == lastVolumePage() && !s[client].circular) ||
+	    s[client].rpage == s[client].wpage)
+	  endRequest(SUCCESS); // end of log
+	else
+	  rmetadataStart();
+	return;
+      }
+
+    if (offset + len <= end)
+      count = len;
+    else
+      count = end - offset;
+
+    pos += count;
+    s[client].rpos += count;
+    s[client].roffset = offset + count;
+
+    call At45db.read(s[client].rpage, offset, buf, count);
+  }
+
+  void readStart() {
+    readContinue();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Read block metadata						*/
+  /* ------------------------------------------------------------------ */
+
+  void continueReadAt(at45pageoffset_t roffset) {
+    /* Resume reading at firstPage whose metadata is currently available
+       in the metadata variable */
+    metaState = META_IDLE;
+    s[client].rpos = metadata.pos + roffset;
+    s[client].rpage = firstPage;
+    s[client].roffset = roffset;
+    s[client].rend =
+      metadata.flags & F_SYNC ? metadata.lastRecordOffset : PAGE_SIZE;
+    s[client].rvalid = TRUE;
+    readContinue();
+  }
+
+  void rmetadataContinue() {
+    if (++firstPage == lastVolumePage())
+      firstPage = firstVolumePage();
+    if (firstPage == s[client].wpage)
+      if (!s[client].rvalid)
+	/* We cannot find a record boundary to start at (we've just
+	   walked through the whole log...). Give up. */
+	endRequest(SUCCESS);
+      else
+	{
+	  /* The current write page has no metadata yet, so we fake it */
+	  metadata.flags = 0;
+	  metadata.pos = s[client].wpos - s[client].woffset;
+	  continueReadAt(0);
+	}
+    else
+      readMetadata(firstPage);
+  }
+
+  void rmetadataReadDone() {
+    if (metadata.magic == PERSISTENT_MAGIC)
+      crcPage(firstPage);
+    else
+      endRequest(SUCCESS);
+  }
+
+  void rmetadataCrcDone(uint16_t crc) {
+    if (!s[client].rvalid)
+      if (crc == metadata.crc && metadata.flags & F_LASTVALID)
+	continueReadAt(metadata.lastRecordOffset);
+      else
+	rmetadataContinue();
+    else 
+      if (crc == metadata.crc)
+	continueReadAt(0);
+      else
+	endRequest(SUCCESS);
+  }
+
+  void rmetadataStart() {
+    metaState = META_READ;
+    firstPage = s[client].rpage;
+    rmetadataContinue();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Seek.								*/
+  /* ------------------------------------------------------------------ */
+
+  void seekCrcDone(uint16_t crc) {
+    if (metadata.magic == PERSISTENT_MAGIC && crc == metadata.crc &&
+	metadata.pos == s[client].rpos - s[client].roffset)
+      {
+	s[client].rvalid = TRUE;
+	if (metadata.flags & F_SYNC)
+	  s[client].rend = metadata.lastRecordOffset;
+      }
+    endRequest(SUCCESS);
+  }
+
+  void seekReadDone() {
+    crcPage(s[client].rpage);
+  }
+
+  /* Move to position specified by cookie. */
+  void seekStart() {
+    uint32_t offset = (uint32_t)(uint16_t)s[client].buf << 16 | s[client].len;
+
+    invalidateReadPointer(); // default to beginning of log
+
+    /* The write positions are offset by PAGE_SIZE (see emptyLog) */
+
+    if (offset == SEEK_BEGINNING)
+      offset = PAGE_SIZE;
+
+    if (offset > s[client].wpos || offset < PAGE_SIZE)
+      {
+	endRequest(EINVAL);
+	return;
+      }
+
+    /* Cookies are just flash positions which continue incrementing as
+       you circle around and around. So we can just check the requested
+       page's metadata.pos field matches the cookie's value */
+    s[client].rpos = offset;
+    s[client].roffset = (offset - PAGE_SIZE) % PAGE_SIZE;
+    s[client].rpage = firstVolumePage() + ((offset - PAGE_SIZE) / PAGE_SIZE) % npages();
+    s[client].rend = PAGE_SIZE; // default to no sync flag
+
+    // The last page's metadata isn't written to flash yet. Special case it.
+    if (s[client].rpage == s[client].wpage)
+      {
+	/* If we're seeking within the current write page, just go there.
+	   Otherwise, we're asking for an old version of the current page
+	   so just keep the invalidated read pointer, i.e., read from
+	   the beginning. */
+	if (offset >= s[client].wpos - s[client].woffset)
+	  s[client].rvalid = TRUE;
+	endRequest(SUCCESS);
+      }
+    else
+      {
+	metaState = META_SEEK;
+	readMetadata(s[client].rpage);
+      }
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Dispatch HAL operations to current user op				*/
+  /* ------------------------------------------------------------------ */
+
+  event void At45db.eraseDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	eraseEraseDone();
+  }
+
+  event void At45db.writeDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	switch (metaState)
+	  {
+	  case META_WRITE: wmetadataWriteDone(); break;
+	  case META_IDLE: appendWriteDone(); break;
+	  }
+  }
+
+  event void At45db.syncDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else switch (s[client].request)
+	{
+	case R_ERASE: eraseMetadataDone(); break;
+	case R_APPEND: appendSyncDone(); break;
+	case R_SYNC: syncMetadataDone(); break;
+	}
+  }
+
+  event void At45db.flushDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	appendMetadataDone();
+  }
+
+  event void At45db.readDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	switch (metaState)
+	  {
+	  case META_LOCATEFIRST: locateFirstReadDone(); break;
+	  case META_LOCATE: locateReadDone(); break;
+	  case META_LOCATELAST: locateLastReadDone(); break;
+	  case META_SEEK: seekReadDone(); break;
+	  case META_READ: rmetadataReadDone(); break;
+	  case META_IDLE: readContinue(); break;
+	  }					    
+  }
+
+  event void At45db.computeCrcDone(error_t error, uint16_t crc) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	switch (metaState)
+	  {
+	  case META_LOCATEFIRST: locateFirstCrcDone(crc); break;
+	  case META_LOCATE: locateCrcDone(crc); break;
+	  case META_LOCATELAST: locateLastCrcDone(crc); break;
+	  case META_SEEK: seekCrcDone(crc); break;
+	  case META_WRITE: wmetadataCrcDone(crc); break;
+	  case META_READ: rmetadataCrcDone(crc); break;
+	  }
+  }
+
+  event void At45db.copyPageDone(error_t error) { }
+
+  default event void LogWrite.appendDone[uint8_t logId](void* buf, storage_len_t l, bool rLost, error_t error) { }
+  default event void LogWrite.eraseDone[uint8_t logId](error_t error) { }
+  default event void LogWrite.syncDone[uint8_t logId](error_t error) { }
+  default event void LogRead.readDone[uint8_t logId](void* buf, storage_len_t l, error_t error) { }
+  default event void LogRead.seekDone[uint8_t logId](error_t error) {}
+
+  default command at45page_t At45dbVolume.remap[uint8_t logId](at45page_t volumePage) {return 0;}
+  default command at45page_t At45dbVolume.volumeSize[uint8_t logId]() {return 0;}
+  default async command error_t Resource.request[uint8_t logId]() {return SUCCESS;}
+  default async command error_t Resource.release[uint8_t logId]() { return FAIL; }
+}
diff --git a/tos/chips/at45db/Storage_chip.h b/tos/chips/at45db/Storage_chip.h
new file mode 100644
index 00000000..68d5cc75
--- /dev/null
+++ b/tos/chips/at45db/Storage_chip.h
@@ -0,0 +1,12 @@
+// $Id: Storage_chip.h,v 1.4 2006-12-12 18:23:02 vlahan Exp $
+
+#ifndef STORAGE_CHIP_H
+#define STORAGE_CHIP_H
+
+#include "At45db.h"
+
+#define UQ_BLOCK_STORAGE "BlockStorageP.BlockRead"
+#define UQ_LOG_STORAGE "LogStorageP.LogRead"
+#define UQ_CONFIG_STORAGE "ConfigStorageP.ConfigRead"
+
+#endif
diff --git a/tos/chips/at45db/WireBlockStorageP.nc b/tos/chips/at45db/WireBlockStorageP.nc
new file mode 100644
index 00000000..6e745904
--- /dev/null
+++ b/tos/chips/at45db/WireBlockStorageP.nc
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Private component of the AT45DB implementation of the block storage
+ * abstraction.
+ *
+ * @author: David Gay <dgay@acm.org>
+ */
+
+configuration WireBlockStorageP { }
+implementation {
+  components BlockStorageP, At45dbC;
+
+  BlockStorageP.At45db -> At45dbC;
+}
diff --git a/tos/chips/at45db/WireConfigStorageP.nc b/tos/chips/at45db/WireConfigStorageP.nc
new file mode 100644
index 00000000..26886f7c
--- /dev/null
+++ b/tos/chips/at45db/WireConfigStorageP.nc
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Private component of the AT45DB implementation of the config storage
+ * abstraction.
+ *
+ * @author: David Gay <dgay@acm.org>
+ */
+
+configuration WireConfigStorageP { }
+implementation {
+  components ConfigStorageP, BlockStorageP, At45dbC;
+
+  ConfigStorageP.At45db -> At45dbC;
+  ConfigStorageP.BlockRead -> BlockStorageP;
+  ConfigStorageP.BlockWrite -> BlockStorageP;
+  ConfigStorageP.BConfig <- BlockStorageP;
+}
diff --git a/tos/chips/at45db/WireLogStorageP.nc b/tos/chips/at45db/WireLogStorageP.nc
new file mode 100644
index 00000000..c3de0fd2
--- /dev/null
+++ b/tos/chips/at45db/WireLogStorageP.nc
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Private component of the AT45DB implementation of the log storage
+ * abstraction.
+ *
+ * @author: David Gay <dgay@acm.org>
+ */
+
+configuration WireLogStorageP { }
+implementation {
+  components LogStorageP, At45dbC;
+
+  LogStorageP.At45db -> At45dbC;
+}
diff --git a/tos/chips/atm128/Atm128Clock.h b/tos/chips/atm128/Atm128Clock.h
new file mode 100644
index 00000000..73669cbd
--- /dev/null
+++ b/tos/chips/atm128/Atm128Clock.h
@@ -0,0 +1,79 @@
+// $Id: Atm128Clock.h,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Martin Turon <mturon@xbow.com>
+
+#ifndef _H_ATM128CLOCK_H
+#define _H_ATM128CLOCK_H
+
+//====================== Oscillators ==================================
+
+/* Timer Clock Select -- set via Fuses only through ISP */
+enum {
+  ATM128_CKSEL_EXT_CLK = 0,        //!< External clock source
+  ATM128_CKSEL_INT_1MHZ = 1,       //!< Internal RC oscillator
+  ATM128_CKSEL_INT_2MHZ,
+  ATM128_CKSEL_INT_4MHZ,
+  ATM128_CKSEL_INT_8MHZ,
+  ATM128_CKSEL_EXT_RC_1MHZ = 5,    //!< External RC oscillator
+  ATM128_CKSEL_EXT_RC_3MHZ,
+  ATM128_CKSEL_EXT_RC_8MHZ,
+  ATM128_CKSEL_EXT_RC_12MHZ,
+  ATM128_CKSEL_EXT_CRYSTAL = 9,     //!< External low freq crystal
+  ATM128_CKSEL_EXT_RES_1MHZ = 10,   //!< External resonator
+  ATM128_CKSEL_EXT_RES_3MHZ,
+  ATM128_CKSEL_EXT_RES_8MHZ
+};
+
+/* 
+ * Calibration Register for Internal Oscillator
+ *
+ * OSCCAL      Min Freq         Max Freq
+ * 0x00        50%              100%
+ * 0x7F        75%              150%
+ * 0xFF        100%             200%
+ */
+typedef uint8_t Atm128_OSCCAL_t;  //!< Internal Oscillator Calibration Register
+
+/* 8-bit Clock Divider Register */
+typedef struct
+{
+  uint8_t xdiven : 1;  //!< Enable clock divider
+  uint8_t xdiv   : 7;  //!< fCLK = Source Clock / 129 - xdiv
+} Atm128ClockDivider_t;
+
+typedef Atm128ClockDivider_t Atm128_XTAL_t;  //!< Asynchronous Clock Divider
+
+
+#endif //_H_ATM128CLOCK_H
+
diff --git a/tos/chips/atm128/Atm128I2C.h b/tos/chips/atm128/Atm128I2C.h
new file mode 100644
index 00000000..862cc78b
--- /dev/null
+++ b/tos/chips/atm128/Atm128I2C.h
@@ -0,0 +1,92 @@
+// $Id: Atm128I2C.h,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Martin Turon <mturon@xbow.com>
+
+#ifndef _H_Atm128I2C_h
+#define _H_Atm128I2C_h
+
+//====================== I2C Bus ==================================
+
+/* SCL freq = CPU freq / (16 + 2(TWBR) * pow(4, TWPR)) */
+enum {
+  ATM128_I2C_RATE_DIVIDE_16 = 0,
+  ATM128_I2C_RATE_DIVIDE_24 = 1,
+  ATM128_I2C_RATE_DIVIDE_80 = 2,
+}
+
+  typedef uint8_t Atm128_TWBR_t;  //!< Two Wire Bit Rate Register
+
+/* I2C Control Register */
+typedef struct
+{
+  uint8_t twie  : 1;  //!< Two Wire Interrupt Enable
+  uint8_t rsvd  : 1;  //!< Reserved
+  uint8_t twen  : 1;  //!< Two Wire Enable Bit
+  uint8_t twwc  : 1;  //!< Two Wire Write Collision Flag
+  uint8_t twsto : 1;  //!< Two Wire Stop Condition Bit
+  uint8_t twsta : 1;  //!< Two Wire Start Condition Bit
+  uint8_t twea  : 1;  //!< Two Wire Enable Acknowledge Bit
+  uint8_t twint : 1;  //!< Two Wire Interrupt Flag
+} Atm128I2CControl_t;
+
+
+typedef Atm128I2CControl_t Atm128_TWCR_t;  //!< Two Wire Control Register
+
+/* SCL freq = CPU freq / (16 + 2(TWBR) * pow(4, TWPR)) */
+enum {
+  ATM128_I2C_PRESCALE_1 = 0,
+  ATM128_I2C_PRESCALE_4 = 1,
+  ATM128_I2C_PRESCALE_16 = 2,
+  ATM128_I2C_PRESCALE_64 = 3,
+};
+
+enum {
+  ATM128_I2C_STATUS_START = 1,
+};
+
+/* I2C Status Register */
+typedef struct
+{
+  uint8_t twps  : 2;  //!< Two Wire Prescaler Bits
+  uint8_t rsvd  : 1;  //!< Reserved
+  uint8_t tws   : 5;  //!< Two Wire Status
+} Atm128I2CStatus_t;
+
+
+typedef Atm128I2CStatus_t Atm128_TWCR_t;  //!< Two Wire Status Register
+
+typedef uint8_t Atm128_TWDR_t;  //!< Two Wire Data Register
+typedef uint8_t Atm128_TWAR_t;  //!< Two Wire Slave Address Register
+
+#endif //_H_Atm128I2C_h
diff --git a/tos/chips/atm128/Atm128Power.h b/tos/chips/atm128/Atm128Power.h
new file mode 100644
index 00000000..dba10bd5
--- /dev/null
+++ b/tos/chips/atm128/Atm128Power.h
@@ -0,0 +1,53 @@
+// $Id: Atm128Power.h,v 1.7 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Martin Turon <mturon@xbow.com>
+
+#ifndef _H_Atm128Power_h
+#define _H_Atm128Power_h
+
+//================== ATmega128 Power Management ==========================
+
+/* MCU Control Register */
+typedef struct
+{
+  uint8_t ivce  : 1;  //!< Interrupt Vector Change Enable
+  uint8_t ivsel : 1;  //!< Interrupt Vector Select 
+  uint8_t stdby : 1;  //!< Standby Enable (sm2) 
+  uint8_t sm    : 2;  //!< Sleep Mode
+  uint8_t se    : 1;  //!< Sleep Enable
+  uint8_t srw10 : 1;  //!< SRAM wait state enable
+  uint8_t srw   : 1;  //!< External SRAM enable
+} Atm128_MCUCR_t;
+
+#endif //_H_Atm128Power_h
diff --git a/tos/chips/atm128/Atm128Uart.h b/tos/chips/atm128/Atm128Uart.h
new file mode 100644
index 00000000..2394e078
--- /dev/null
+++ b/tos/chips/atm128/Atm128Uart.h
@@ -0,0 +1,163 @@
+// $Id: Atm128Uart.h,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Martin Turon <mturon@xbow.com>
+
+#ifndef _H_Atm128Uart_h
+#define _H_Atm128Uart_h
+
+//====================== UART Bus ==================================
+
+typedef uint8_t Atm128_UDR0_t;  //!< USART0 I/O Data Register
+typedef uint8_t Atm128_UDR1_t;  //!< USART1 I/O Data Register
+
+/* UART Status Register */
+typedef union {
+  struct Atm128_UCSRA_t {
+    uint8_t mpcm : 1;  //!< UART Multiprocessor Communication Mode
+    uint8_t u2x  : 1;  //!< UART Double Transmission Speed 
+    uint8_t upe  : 1;  //!< UART Parity Error
+    uint8_t dor  : 1;  //!< UART Data Overrun
+    uint8_t fe   : 1;  //!< UART Frame Error
+    uint8_t udre : 1;  //!< USART Data Register Empty
+    uint8_t txc  : 1;  //!< USART Transfer Complete
+    uint8_t rxc  : 1;  //!< USART Receive Complete
+  } bits;
+  uint8_t flat;
+} Atm128UartStatus_t;
+
+typedef Atm128UartStatus_t Atm128_UCSR0A_t;  //!< UART 0 Status Register
+typedef Atm128UartStatus_t Atm128_UCSR1A_t;  //!< UART 1 Status Register
+
+/* UART Control Register */
+typedef union {
+  struct Atm128_UCSRB_t {
+    uint8_t txb8  : 1;  //!< UART Transmit Data Bit 8
+    uint8_t rxb8  : 1;  //!< UART Receive Data Bit 8
+    uint8_t ucsz2 : 1;  //!< UART Character Size (Bit 2)
+    uint8_t txen  : 1;  //!< UART Transmitter Enable
+    uint8_t rxen  : 1;  //!< UART Receiver Enable
+    uint8_t udrie : 1;  //!< USART Data Register Enable
+    uint8_t txcie : 1;  //!< UART TX Complete Interrupt Enable
+    uint8_t rxcie : 1;  //!< UART RX Complete Interrupt Enable 
+  } bits;
+  uint8_t flat;
+} Atm128UartControl_t;
+
+typedef Atm128UartControl_t Atm128_UCSR0B_t;  //!< UART 0 Control Register
+typedef Atm128UartControl_t Atm128_UCSR1B_t;  //!< UART 1 Control Register
+
+enum {
+  ATM128_UART_DATA_SIZE_5_BITS = 0,
+  ATM128_UART_DATA_SIZE_6_BITS = 1,
+  ATM128_UART_DATA_SIZE_7_BITS = 2,
+  ATM128_UART_DATA_SIZE_8_BITS = 3,
+};
+
+/* UART Control Register */
+typedef union {
+  uint8_t flat;
+  struct Atm128_UCSRC_t {
+    uint8_t ucpol : 1;  //!< UART Clock Polarity
+    uint8_t ucsz  : 2;  //!< UART Character Size (Bits 0 and 1)
+    uint8_t usbs  : 1;  //!< UART Stop Bit Select
+    uint8_t upm   : 2;  //!< UART Parity Mode
+    uint8_t umsel : 1;  //!< USART Mode Select
+    uint8_t rsvd  : 1;  //!< Reserved
+  } bits;
+} Atm128UartMode_t;
+
+typedef Atm128UartMode_t Atm128_UCSR0C_t;  //!< UART 0 Mode Register
+typedef Atm128UartMode_t Atm128_UCSR1C_t;  //!< UART 1 Mode Register
+
+/*
+ * ATmega1128 UART baud register settings:
+ *      ATM128_<baudRate>_BAUD_<cpuSpeed>
+ */
+enum {
+  ATM128_19200_BAUD_4MHZ  = 12,
+  ATM128_38400_BAUD_4MHZ  = 6,
+  ATM128_57600_BAUD_4MHZ  = 3,
+
+  ATM128_19200_BAUD_4MHZ_2X  = 25,
+  ATM128_38400_BAUD_4MHZ_2X  = 12,
+  ATM128_57600_BAUD_4MHZ_2X  = 8,
+
+  ATM128_19200_BAUD_7MHZ  = 23,
+  ATM128_38400_BAUD_7MHZ  = 11,
+  ATM128_57600_BAUD_7MHZ  = 7,
+
+  ATM128_19200_BAUD_7MHZ_2X  = 47,
+  ATM128_38400_BAUD_7MHZ_2X  = 23,
+  ATM128_57600_BAUD_7MHZ_2X  = 15,
+
+  ATM128_19200_BAUD_8MHZ  = 25,
+  ATM128_38400_BAUD_8MHZ  = 12,
+  ATM128_57600_BAUD_8MHZ  = 8,
+
+  ATM128_19200_BAUD_8MHZ_2X  = 51,
+  ATM128_38400_BAUD_8MHZ_2X  = 34,
+  ATM128_57600_BAUD_8MHZ_2X  = 11,
+};
+
+typedef uint8_t Atm128_UBRR0L_t;  //!< UART 0 Baud Register (Low)
+typedef uint8_t Atm128_UBRR0H_t;  //!< UART 0 Baud Register (High)
+
+typedef uint8_t Atm128_UBRR1L_t;  //!< UART 1 Baud Register (Low)
+typedef uint8_t Atm128_UBRR1H_t;  //!< UART 1 Baud Register (High)
+
+typedef uint8_t uart_parity_t;
+typedef uint8_t uart_speed_t;
+typedef uint8_t uart_duplex_t;
+
+enum {
+  TOS_UART_PARITY_NONE = 0,
+  TOS_UART_PARITY_EVEN = 1,
+  TOS_UART_PARITY_ODD  = 2,
+};
+
+enum {
+  TOS_UART_19200  = 0,
+  TOS_UART_38400  = 1,
+  TOS_UART_57600  = 2,
+};
+
+enum {
+  TOS_UART_OFF    = 0,
+  TOS_UART_RONLY  = 1,
+  TOS_UART_TONLY  = 2,
+  TOS_UART_DUPLEX = 3,
+};
+
+#endif //_H_Atm128UART_h
+
diff --git a/tos/chips/atm128/Atm128Uart0C.nc b/tos/chips/atm128/Atm128Uart0C.nc
new file mode 100644
index 00000000..dad67e3f
--- /dev/null
+++ b/tos/chips/atm128/Atm128Uart0C.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:02 $
+ */
+
+configuration Atm128Uart0C {
+  
+  provides interface StdControl;
+  provides interface UartByte;
+  provides interface UartStream;
+  uses interface Counter<TMicro, uint32_t>;
+  
+}
+
+implementation{
+  
+  components new Atm128UartP() as UartP;
+  StdControl = UartP;
+  UartByte = UartP;
+  UartStream = UartP;
+  UartP.Counter = Counter;
+  
+  components HplAtm128UartC as HplUartC;
+  UartP.HplUartTxControl -> HplUartC.Uart0TxControl;
+  UartP.HplUartRxControl -> HplUartC.Uart0RxControl;
+  UartP.HplUart -> HplUartC.HplUart0;
+  
+  components MainC;
+  MainC.SoftwareInit -> UartP;
+  
+}
diff --git a/tos/chips/atm128/Atm128Uart1C.nc b/tos/chips/atm128/Atm128Uart1C.nc
new file mode 100644
index 00000000..6ef6d2a5
--- /dev/null
+++ b/tos/chips/atm128/Atm128Uart1C.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2010-06-16 21:45:58 $
+ */
+
+configuration Atm128Uart1C {
+  
+  provides interface StdControl;
+  provides interface UartByte;
+  provides interface UartStream;
+  uses interface Counter<TMicro, uint32_t>;
+  
+}
+
+implementation{
+  
+  components new Atm128UartP() as UartP;
+  StdControl = UartP;
+  UartByte = UartP;
+  UartStream = UartP;
+  UartP.Counter = Counter;
+  
+  components HplAtm128UartC as HplUartC;
+  UartP.HplUartTxControl -> HplUartC.Uart1TxControl;
+  UartP.HplUartRxControl -> HplUartC.Uart1RxControl;
+  UartP.HplUart -> HplUartC.HplUart1;
+  
+  components MainC;
+  MainC.SoftwareInit -> UartP;
+  
+}
diff --git a/tos/chips/atm128/Atm128UartP.nc b/tos/chips/atm128/Atm128UartP.nc
new file mode 100644
index 00000000..44550a2b
--- /dev/null
+++ b/tos/chips/atm128/Atm128UartP.nc
@@ -0,0 +1,222 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Philip Levis <pal@cs.stanford.edu> (maintainer)
+ * @version $Revision: 1.7 $ $Date: 2008-06-23 20:25:15 $
+ *
+ * Modification @ 11/27 (pal): Folded in Alec's reimplementation
+ * from the -devel branch. Fixed bug in RX interrupts, where
+ * they were not enabled on start. Possibly due to alternative
+ * ARC TEP113 implementation that uses UartStream?
+ */
+
+#include <Timer.h>
+
+generic module Atm128UartP() @safe() {
+  
+  provides interface Init;
+  provides interface StdControl;
+  provides interface UartByte;
+  provides interface UartStream;
+  
+  uses interface StdControl as HplUartTxControl;
+  uses interface StdControl as HplUartRxControl;
+  uses interface HplAtm128Uart as HplUart;
+  uses interface Counter<TMicro, uint32_t>;
+  
+}
+
+implementation{
+  
+  norace uint16_t m_tx_len, m_rx_len;
+  norace uint8_t *COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf;
+  norace uint16_t m_tx_pos, m_rx_pos;
+  norace uint16_t m_byte_time;
+  norace uint8_t m_rx_intr;
+  norace uint8_t m_tx_intr;
+  
+  command error_t Init.init() {
+    if (PLATFORM_BAUDRATE == 19200UL)
+      m_byte_time = 200; // 1 TMicor ~= 2.12 us, one byte = 417us ~= 200
+    else if (PLATFORM_BAUDRATE == 57600UL)
+      m_byte_time = 68;  // 1 TMicor ~= 2.12 us, one byte = 138us ~= 65
+    return SUCCESS;
+  }
+  
+  command error_t StdControl.start(){
+    /* make sure interupts are off and set flags */
+    call HplUart.disableTxIntr();
+    call HplUart.disableRxIntr();
+    m_rx_intr = 0;
+    m_tx_intr = 0;
+
+    /* enable tx/rx */
+    call HplUartTxControl.start();
+    call HplUartRxControl.start();
+
+    // Bug fix: pal 11/26/07: RX interrupts should be enabled on start
+    call HplUart.enableRxIntr();
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop(){
+    call HplUartTxControl.stop();
+    call HplUartRxControl.stop();
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.enableReceiveInterrupt(){
+    atomic{
+      m_rx_intr = 3;
+      call HplUart.enableRxIntr();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.disableReceiveInterrupt(){
+    atomic{
+      call HplUart.disableRxIntr();
+      m_rx_intr = 0;
+    }
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.receive( uint8_t* buf, uint16_t len ){
+    
+    if ( len == 0 )
+      return FAIL;
+    atomic {
+      if ( m_rx_buf )
+	return EBUSY;
+      m_rx_buf = buf;
+      m_rx_len = len;
+      m_rx_pos = 0;
+      m_rx_intr |= 1;
+      call HplUart.enableRxIntr();
+    }
+    
+    return SUCCESS;
+    
+  }
+
+  async event void HplUart.rxDone( uint8_t data ) {
+
+    if ( m_rx_buf ) {
+      m_rx_buf[ m_rx_pos++ ] = data;
+      if ( m_rx_pos >= m_rx_len ) {
+	uint8_t* buf = m_rx_buf;
+	atomic{
+	  m_rx_buf = NULL;
+	  if(m_rx_intr != 3){
+	    call HplUart.disableRxIntr();
+	    m_rx_intr = 0;
+	  }
+	}
+	signal UartStream.receiveDone( buf, m_rx_len, SUCCESS );
+      }
+    }
+    else {
+      signal UartStream.receivedByte( data );
+    }
+    
+  }
+
+  async command error_t UartStream.send( uint8_t *buf, uint16_t len){
+    
+    if ( len == 0 )
+      return FAIL;
+    else if ( m_tx_buf )
+      return EBUSY;
+    
+    m_tx_len = len;
+    m_tx_buf = buf;
+    m_tx_pos = 0;
+    m_tx_intr = 1;
+    call HplUart.enableTxIntr();
+    call HplUart.tx( buf[ m_tx_pos++ ] );
+    
+    return SUCCESS;
+    
+  }
+
+  async event void HplUart.txDone() {
+    
+    if ( m_tx_pos < m_tx_len ) {
+      call HplUart.tx( m_tx_buf[ m_tx_pos++ ] );
+    }
+    else {
+      uint8_t* buf = m_tx_buf;
+      m_tx_buf = NULL;
+      m_tx_intr = 0;
+      call HplUart.disableTxIntr();
+      signal UartStream.sendDone( buf, m_tx_len, SUCCESS );
+    }
+    
+  }
+
+  async command error_t UartByte.send( uint8_t byte ){
+    if(m_tx_intr)
+      return FAIL;
+
+    call HplUart.tx( byte );
+    while ( !call HplUart.isTxEmpty() );
+    return SUCCESS;
+  }
+  
+  async command error_t UartByte.receive( uint8_t * byte, uint8_t timeout){
+
+    uint16_t timeout_micro = m_byte_time * timeout + 1;
+    uint16_t start;
+    
+    if(m_rx_intr)
+      return FAIL;
+
+    start = call Counter.get();
+    while ( call HplUart.isRxEmpty() ) {
+      if ( ( (uint16_t)call Counter.get() - start ) >= timeout_micro )
+	return FAIL;
+    }
+    *byte = call HplUart.rx();
+    
+    return SUCCESS;
+    
+  }
+  
+  async event void Counter.overflow() {}
+
+  default async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ){}
+  default async event void UartStream.receivedByte( uint8_t byte ){}
+  default  async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ){}
+
+}
diff --git a/tos/chips/atm128/HplAtm128Uart.nc b/tos/chips/atm128/HplAtm128Uart.nc
new file mode 100644
index 00000000..f9c34023
--- /dev/null
+++ b/tos/chips/atm128/HplAtm128Uart.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:03 $
+ */
+
+interface HplAtm128Uart {
+  
+  async command error_t enableTxIntr();
+  async command error_t disableTxIntr();
+  async command error_t enableRxIntr();
+  async command error_t disableRxIntr();
+  async command bool isTxEmpty();
+  async command bool isRxEmpty();
+  async command void tx( uint8_t data );
+  async event void txDone();
+  async command uint8_t rx();
+  async event void rxDone( uint8_t data );
+
+}
diff --git a/tos/chips/atm128/HplAtm128UartC.nc b/tos/chips/atm128/HplAtm128UartC.nc
new file mode 100644
index 00000000..e3d31fc8
--- /dev/null
+++ b/tos/chips/atm128/HplAtm128UartC.nc
@@ -0,0 +1,75 @@
+/// $Id: HplAtm128UartC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/// 
+
+#include <Atm128Uart.h>
+
+/**
+ * HPL for the Atmega 128 serial ports.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay
+ */
+configuration HplAtm128UartC
+{
+  provides {
+    interface StdControl as Uart0TxControl;
+    interface StdControl as Uart0RxControl;
+    interface HplAtm128Uart as HplUart0;
+    
+    interface StdControl as Uart1TxControl;
+    interface StdControl as Uart1RxControl;
+    interface HplAtm128Uart as HplUart1;
+  }
+}
+implementation
+{
+  components HplAtm128UartP, PlatformC, McuSleepC;
+  
+  Uart0TxControl = HplAtm128UartP.Uart0TxControl;
+  Uart0RxControl = HplAtm128UartP.Uart0RxControl;
+  HplUart0 = HplAtm128UartP.HplUart0;
+  
+  Uart1TxControl = HplAtm128UartP.Uart1TxControl;
+  Uart1RxControl = HplAtm128UartP.Uart1RxControl;
+  HplUart1 = HplAtm128UartP.HplUart1;
+  
+  HplAtm128UartP.Atm128Calibrate -> PlatformC;
+  HplAtm128UartP.McuPowerState -> McuSleepC;
+  
+  components MainC;
+  MainC.SoftwareInit -> HplAtm128UartP.Uart0Init;
+  MainC.SoftwareInit -> HplAtm128UartP.Uart1Init;
+  
+}
diff --git a/tos/chips/atm128/HplAtm128UartP.nc b/tos/chips/atm128/HplAtm128UartP.nc
new file mode 100644
index 00000000..e18ea908
--- /dev/null
+++ b/tos/chips/atm128/HplAtm128UartP.nc
@@ -0,0 +1,288 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:43 $
+ */
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** 
+ * Private component of the Atmega128 serial port HPL.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay
+ */
+
+#include <Atm128Uart.h>
+
+module HplAtm128UartP {
+  
+  provides interface Init as Uart0Init;
+  provides interface StdControl as Uart0TxControl;
+  provides interface StdControl as Uart0RxControl;
+  provides interface HplAtm128Uart as HplUart0;
+    
+  provides interface Init as Uart1Init;
+  provides interface StdControl as Uart1TxControl;
+  provides interface StdControl as Uart1RxControl;
+  provides interface HplAtm128Uart as HplUart1;
+  
+  uses interface Atm128Calibrate;
+  uses interface McuPowerState;
+}
+implementation {
+  
+  //=== Uart Init Commands. ====================================
+  command error_t Uart0Init.init() {
+    Atm128UartMode_t    mode;
+    Atm128UartStatus_t  stts;
+    Atm128UartControl_t ctrl;
+    uint16_t ubrr0;
+
+    ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0};
+    stts.bits = (struct Atm128_UCSRA_t) {u2x:1};
+    mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS};
+
+    ubrr0 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE);
+    UBRR0L = ubrr0;
+    UBRR0H = ubrr0 >> 8;
+    UCSR0A = stts.flat;
+    UCSR0C = mode.flat;
+    UCSR0B = ctrl.flat;
+
+    return SUCCESS;
+  }
+
+  command error_t Uart0TxControl.start() {
+    SET_BIT(UCSR0B, TXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart0TxControl.stop() {
+    CLR_BIT(UCSR0B, TXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart0RxControl.start() {
+    SET_BIT(UCSR0B, RXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart0RxControl.stop() {
+    CLR_BIT(UCSR0B, RXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart0.enableTxIntr() {
+    SET_BIT(UCSR0A, TXC);
+    SET_BIT(UCSR0B, TXCIE);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart0.disableTxIntr(){
+    CLR_BIT(UCSR0B, TXCIE);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart0.enableRxIntr(){
+    SET_BIT(UCSR0B, RXCIE);
+    return SUCCESS;
+  }
+
+  async command error_t HplUart0.disableRxIntr(){
+    CLR_BIT(UCSR0B, RXCIE);
+    return SUCCESS;
+  }
+  
+  async command bool HplUart0.isTxEmpty(){
+    return READ_BIT(UCSR0A, TXC);
+  }
+
+  async command bool HplUart0.isRxEmpty(){
+    return !READ_BIT(UCSR0A, RXC);
+  }
+  
+  async command uint8_t HplUart0.rx(){
+    return UDR0;
+  }
+
+  async command void HplUart0.tx(uint8_t data) {
+    atomic{
+      UDR0 = data; 
+      SET_BIT(UCSR0A, TXC);
+    }
+  }
+  
+  AVR_ATOMIC_HANDLER(SIG_UART0_RECV) {
+    if (READ_BIT(UCSR0A, RXC)) {
+      signal HplUart0.rxDone(UDR0);
+    }
+  }
+  
+  AVR_NONATOMIC_HANDLER(SIG_UART0_TRANS) {
+    signal HplUart0.txDone();
+  }
+  
+  command error_t Uart1Init.init() {
+    Atm128UartMode_t    mode;
+    Atm128UartStatus_t  stts;
+    Atm128UartControl_t ctrl;
+    uint16_t ubrr1;
+    
+    ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0};
+    stts.bits = (struct Atm128_UCSRA_t) {u2x:1};
+    mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS};
+
+    ubrr1 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE);
+    UBRR1L = ubrr1;
+    UBRR1H = ubrr1 >> 8;
+    UCSR1A = stts.flat;
+    UCSR1C = mode.flat;
+    UCSR1B = ctrl.flat;
+
+    return SUCCESS;
+  }
+
+  command error_t Uart1TxControl.start() {
+    SET_BIT(UCSR1B, TXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart1TxControl.stop() {
+    CLR_BIT(UCSR1B, TXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart1RxControl.start() {
+    SET_BIT(UCSR1B, RXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart1RxControl.stop() {
+    CLR_BIT(UCSR1B, RXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart1.enableTxIntr() {
+    SET_BIT(UCSR1A, TXC);
+    SET_BIT(UCSR1B, TXCIE);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart1.disableTxIntr(){
+    CLR_BIT(UCSR1B, TXCIE);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart1.enableRxIntr(){
+    SET_BIT(UCSR1B, RXCIE);
+    return SUCCESS;
+  }
+
+  async command error_t HplUart1.disableRxIntr(){
+    CLR_BIT(UCSR1B, RXCIE);
+    return SUCCESS;
+  }
+  
+  async command bool HplUart1.isTxEmpty() {
+    return READ_BIT(UCSR1A, TXC);
+  }
+
+  async command bool HplUart1.isRxEmpty() {
+    return !READ_BIT(UCSR1A, RXC);
+  }
+  
+  async command uint8_t HplUart1.rx(){
+    return UDR1;
+  }
+
+  async command void HplUart1.tx(uint8_t data) {
+    atomic{
+      UDR1 = data; 
+      SET_BIT(UCSR1A, TXC);
+    }
+  }
+  
+  AVR_ATOMIC_HANDLER(SIG_UART1_RECV) {
+    if (READ_BIT(UCSR1A, RXC))
+      signal HplUart1.rxDone(UDR1);
+  }
+  
+  AVR_NONATOMIC_HANDLER(SIG_UART1_TRANS) {
+    signal HplUart1.txDone();
+  }
+  
+  default async event void HplUart0.txDone() {} 
+  default async event void HplUart0.rxDone(uint8_t data) {}
+  default async event void HplUart1.txDone() {}
+  default async event void HplUart1.rxDone(uint8_t data) {}
+  
+}
diff --git a/tos/chips/atm128/McuSleepC.nc b/tos/chips/atm128/McuSleepC.nc
new file mode 100644
index 00000000..5930e7b7
--- /dev/null
+++ b/tos/chips/atm128/McuSleepC.nc
@@ -0,0 +1,124 @@
+/// $Id: McuSleepC.nc,v 1.11 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of TEP 112 (Microcontroller Power Management) for
+ * the Atmega128. Power state calculation code copied from Rob
+ * Szewczyk's 1.x code in HPLPowerManagementM.nc.
+ *
+ * <pre>
+ *  $Id: McuSleepC.nc,v 1.11 2010-06-29 22:07:43 scipio Exp $
+ * </pre>
+ *
+ * @author Philip Levis
+ * @author Robert Szewczyk
+ * @date   October 26, 2005
+ */
+
+module McuSleepC @safe() {
+  provides {
+    interface McuSleep;
+    interface McuPowerState;
+  }
+  uses {
+    interface McuPowerOverride;
+  }
+}
+implementation {
+  /* There is no dirty bit management because the sleep mode depends on
+     the amount of time remaining in timer0. Note also that the
+     sleep cost depends typically depends on waiting for ASSR to clear. */
+
+  /* Note that the power values are maintained in an order
+   * based on their active components, NOT on their values.
+   * Look at atm128hardware.h and page 42 of the ATmeg128
+   * manual (table 17).*/
+  const_uint8_t atm128PowerBits[ATM128_POWER_DOWN + 1] = {
+    0,				/* idle */
+    (1 << SM0),			/* adc */
+    (1 << SM2) | (1 << SM1) | (1 << SM0), /* ext standby */
+    (1 << SM1) | (1 << SM0),	/* power save */
+    (1 << SM2) | (1 << SM1),	/* standby */
+    (1 << SM1)};		/* power down */
+
+  mcu_power_t getPowerState() {
+    // Note: we go to sleep even if timer 1, 2, or 3's overflow interrupt
+    // is enabled - this allows using these timers as TinyOS "Alarm"s
+    // while still having power management.
+
+    // Are external timers running?  
+    if (TIMSK & ~(1 << OCIE0 | 1 << TOIE0 | 1 << TOIE1 | 1 << TOIE2) ||
+	ETIMSK & ~(1 << TOIE3)) {
+      return ATM128_POWER_IDLE;
+    }
+    // SPI (Radio stack on mica/micaZ
+    else if (bit_is_set(SPCR, SPE)) { 
+      return ATM128_POWER_IDLE;
+    }
+    // A UART is active
+    else if ((UCSR0B | UCSR1B) & (1 << TXCIE | 1 << RXCIE)) { // UART
+      return ATM128_POWER_IDLE;
+    }
+    // I2C (Two-wire) is active
+    else if (bit_is_set(TWCR, TWEN)){
+      return ATM128_POWER_IDLE;
+    }
+    // ADC is enabled
+    else if (bit_is_set(ADCSR, ADEN)) { 
+      return ATM128_POWER_ADC_NR;
+    }
+    else {
+      return ATM128_POWER_DOWN;
+    }
+  }
+  
+  async command void McuSleep.sleep() {
+    uint8_t powerState;
+
+    powerState = mcombine(getPowerState(), call McuPowerOverride.lowestState());
+    MCUCR =
+      (MCUCR & 0xe3) | 1 << SE | read_uint8_t(&atm128PowerBits[powerState]);
+
+    sei();
+    // All of memory may change at this point...
+    asm volatile ("sleep" : : : "memory");
+    cli();
+  }
+
+  async command void McuPowerState.update() {
+  }
+
+  default async command mcu_power_t McuPowerOverride.lowestState() {
+    return ATM128_POWER_DOWN;
+  }
+}
diff --git a/tos/chips/atm128/adc/Adc.h b/tos/chips/atm128/adc/Adc.h
new file mode 100644
index 00000000..a3f14aa4
--- /dev/null
+++ b/tos/chips/atm128/adc/Adc.h
@@ -0,0 +1,23 @@
+/* $Id: Adc.h,v 1.4 2006-12-12 18:23:03 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ * @author David Gay
+ */
+#ifndef ADC_H
+#define ADC_H
+
+#include "Atm128Adc.h"
+
+/* Read and ReadNow share client ids */
+#define UQ_ADC_READ "adc.read"
+#define UQ_ADC_READNOW UQ_ADC_READ
+#define UQ_ADC_READSTREAM "adc.readstream"
+
+#endif
diff --git a/tos/chips/atm128/adc/AdcP.nc b/tos/chips/atm128/adc/AdcP.nc
new file mode 100644
index 00000000..2ae998c1
--- /dev/null
+++ b/tos/chips/atm128/adc/AdcP.nc
@@ -0,0 +1,151 @@
+/* $Id: AdcP.nc,v 1.6 2008-06-26 04:39:03 regehr Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Convert ATmega128 HAL A/D interface to the HIL interfaces.
+ * @author David Gay
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ */
+#include "Timer.h"
+
+module AdcP @safe() {
+  provides {
+    interface Read<uint16_t>[uint8_t client];
+    interface ReadNow<uint16_t>[uint8_t client];
+  }
+  uses {
+    interface Atm128AdcSingle;
+    interface Atm128AdcConfig[uint8_t client];
+  }
+}
+implementation {
+  enum {
+    IDLE,
+    ACQUIRE_DATA,
+    ACQUIRE_DATA_NOW,
+  };
+
+  /* Resource reservation is required, and it's incorrect to call getData
+     again before dataReady is signaled, so there are no races in correct
+     programs */
+  norace uint8_t state;
+  norace uint8_t client;
+  norace uint16_t val;
+
+  uint8_t channel() {
+    return call Atm128AdcConfig.getChannel[client]();
+  }
+
+  uint8_t refVoltage() {
+    return call Atm128AdcConfig.getRefVoltage[client]();
+  }
+
+  uint8_t prescaler() {
+    return call Atm128AdcConfig.getPrescaler[client]();
+  }
+
+  void sample() {
+    call Atm128AdcSingle.getData(channel(), refVoltage(), FALSE, prescaler());
+  }
+
+  error_t startGet(uint8_t newState, uint8_t newClient) {
+    /* Note: we retry imprecise results in dataReady */
+    state = newState;
+    client = newClient;
+    sample();
+
+    return SUCCESS;
+  }
+
+  command error_t Read.read[uint8_t c]() {
+    return startGet(ACQUIRE_DATA, c);
+  }
+
+  async command error_t ReadNow.read[uint8_t c]() {
+    return startGet(ACQUIRE_DATA_NOW, c);
+  }
+
+  task void acquiredData() {
+    state = IDLE;
+    signal Read.readDone[client](SUCCESS, val);
+  }
+
+  async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) {
+    switch (state)
+      {
+      case ACQUIRE_DATA:
+	if (!precise)
+	  sample();
+	else
+	  {
+	    val = data;
+	    post acquiredData();
+	  }
+	break;
+
+      case ACQUIRE_DATA_NOW:
+	if (!precise)
+	  sample();
+	else
+	  {
+	    state = IDLE;
+	    signal ReadNow.readDone[client](SUCCESS, data);
+	  }
+	break;
+
+      default:
+	break;
+      }
+  }
+
+  /* Configuration defaults. Read ground fast! ;-) */
+  default async command uint8_t Atm128AdcConfig.getChannel[uint8_t c]() {
+    return ATM128_ADC_SNGL_GND;
+  }
+
+  default async command uint8_t Atm128AdcConfig.getRefVoltage[uint8_t c]() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  default async command uint8_t Atm128AdcConfig.getPrescaler[uint8_t c]() {
+    return ATM128_ADC_PRESCALE_2;
+  }
+
+  default event void Read.readDone[uint8_t c](error_t e, uint16_t d) { }
+  default async event void ReadNow.readDone[uint8_t c](error_t e, uint16_t d) { }
+}
diff --git a/tos/chips/atm128/adc/AdcReadClientC.nc b/tos/chips/atm128/adc/AdcReadClientC.nc
new file mode 100644
index 00000000..d6495234
--- /dev/null
+++ b/tos/chips/atm128/adc/AdcReadClientC.nc
@@ -0,0 +1,40 @@
+/* $Id: AdcReadClientC.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Provide, as per TEP101, arbitrated access via a Read interface to the
+ * Atmega128 ADC.  Users of this component must link it to an
+ * implementation of Atm128AdcConfig which provides the ADC parameters
+ * (channel, etc).
+ * 
+ * @author David Gay
+ */
+
+#include "Adc.h"
+
+generic configuration AdcReadClientC() {
+  provides interface Read<uint16_t>;
+  uses {
+    interface Atm128AdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components WireAdcP, Atm128AdcC;
+
+  enum {
+    ID = unique(UQ_ADC_READ),
+    HAL_ID = unique(UQ_ATM128ADC_RESOURCE)
+  };
+
+  Read = WireAdcP.Read[ID];
+  Atm128AdcConfig = WireAdcP.Atm128AdcConfig[ID];
+  WireAdcP.Resource[ID] -> Atm128AdcC.Resource[HAL_ID];
+  ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID];
+}
diff --git a/tos/chips/atm128/adc/AdcReadNowClientC.nc b/tos/chips/atm128/adc/AdcReadNowClientC.nc
new file mode 100644
index 00000000..152eeb29
--- /dev/null
+++ b/tos/chips/atm128/adc/AdcReadNowClientC.nc
@@ -0,0 +1,43 @@
+/* $Id: AdcReadNowClientC.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Provide, as per TEP101, Resource-based access to the Atmega128 ADC via a
+ * ReadNow interface.  Users of this component must link it to an
+ * implementation of Atm128AdcConfig which provides the ADC parameters
+ * (channel, etc).
+ * 
+ * @author David Gay
+ */
+
+#include "Adc.h"
+
+generic configuration AdcReadNowClientC() {
+  provides {
+    interface Resource;
+    interface ReadNow<uint16_t>;
+  }
+  uses {
+    interface Atm128AdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components WireAdcP, Atm128AdcC;
+
+  enum {
+    ID = unique(UQ_ADC_READNOW),
+    HAL_ID = unique(UQ_ATM128ADC_RESOURCE)
+  };
+
+  ReadNow = WireAdcP.ReadNow[ID];
+  Atm128AdcConfig = WireAdcP.Atm128AdcConfig[ID];
+  Resource = Atm128AdcC.Resource[HAL_ID];
+  ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID];
+}
diff --git a/tos/chips/atm128/adc/AdcReadStreamClientC.nc b/tos/chips/atm128/adc/AdcReadStreamClientC.nc
new file mode 100644
index 00000000..27454eb8
--- /dev/null
+++ b/tos/chips/atm128/adc/AdcReadStreamClientC.nc
@@ -0,0 +1,40 @@
+/* $Id: AdcReadStreamClientC.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Provide, as per TEP101, arbitrated access via a ReadStream interface to
+ * the Atmega128 ADC.  Users of this component must link it to an
+ * implementation of Atm128AdcConfig which provides the ADC parameters
+ * (channel, etc).
+ * 
+ * @author David Gay
+ */
+
+#include "Adc.h"
+
+generic configuration AdcReadStreamClientC() {
+  provides interface ReadStream<uint16_t>;
+  uses {
+    interface Atm128AdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components WireAdcStreamP, Atm128AdcC;
+
+  enum {
+    ID = unique(UQ_ADC_READSTREAM),
+    HAL_ID = unique(UQ_ATM128ADC_RESOURCE)
+  };
+
+  ReadStream = WireAdcStreamP.ReadStream[ID];
+  Atm128AdcConfig = WireAdcStreamP.Atm128AdcConfig[ID];
+  WireAdcStreamP.Resource[ID] -> Atm128AdcC.Resource[HAL_ID];
+  ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID];
+}
diff --git a/tos/chips/atm128/adc/AdcStreamP.nc b/tos/chips/atm128/adc/AdcStreamP.nc
new file mode 100644
index 00000000..9fe85795
--- /dev/null
+++ b/tos/chips/atm128/adc/AdcStreamP.nc
@@ -0,0 +1,270 @@
+/* $Id: AdcStreamP.nc,v 1.12 2008-06-23 23:38:28 idgay Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Convert ATmega128 HAL A/D interface to the HIL interfaces.
+ * @author David Gay
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ */
+#include "Timer.h"
+
+module AdcStreamP @safe() {
+  provides {
+    interface Init @atleastonce();
+    interface ReadStream<uint16_t>[uint8_t client];
+  }
+  uses {
+    interface Atm128AdcSingle;
+    interface Atm128AdcConfig[uint8_t client];
+    interface Atm128Calibrate;
+    interface Alarm<TMicro, uint32_t>;
+  }
+}
+implementation {
+  enum {
+    NSTREAM = uniqueCount(UQ_ADC_READSTREAM)
+  };
+
+  /* Resource reservation is required, and it's incorrect to call getData
+     again before dataReady is signaled, so there are no races in correct
+     programs */
+  norace uint8_t client = NSTREAM;
+
+  /* Stream data */
+  struct list_entry_t {
+    uint16_t count;
+    struct list_entry_t * ONE_NOK next;
+  };
+  struct list_entry_t *bufferQueue[NSTREAM];
+  struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM];
+  uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount;
+
+  norace uint16_t count;
+  norace uint16_t * COUNT_NOK(count) buffer; 
+  norace uint16_t * BND_NOK(buffer, buffer+count) pos;
+  norace uint32_t now, period;
+
+
+  command error_t Init.init() {
+    uint8_t i;
+
+    for (i = 0; i != NSTREAM; i++)
+      bufferQueueEnd[i] = &bufferQueue[i];
+    
+    return SUCCESS;
+  }
+
+  uint8_t channel() {
+    return call Atm128AdcConfig.getChannel[client]();
+  }
+
+  uint8_t refVoltage() {
+    return call Atm128AdcConfig.getRefVoltage[client]();
+  }
+
+  uint8_t prescaler() {
+    return call Atm128AdcConfig.getPrescaler[client]();
+  }
+
+  void sample() {
+    call Atm128AdcSingle.getData(channel(), refVoltage(), FALSE, prescaler());
+  }
+
+  command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) {
+    if (n < sizeof(struct list_entry_t))
+      return ESIZE;
+    atomic
+      {
+	struct list_entry_t * ONE newEntry = TCAST(struct list_entry_t * ONE, buf);
+
+	if (!bufferQueueEnd[c]) // Can't post right now.
+	  return FAIL;
+
+	newEntry->count = n;
+	newEntry->next = NULL;
+	*bufferQueueEnd[c] = newEntry;
+	bufferQueueEnd[c] = &newEntry->next;
+      }
+    return SUCCESS;
+  }
+
+  task void readStreamDone() {
+    uint8_t c = client;
+    uint32_t actualPeriod = call Atm128Calibrate.actualMicro(period);
+
+    atomic
+      {
+	bufferQueue[c] = NULL;
+	bufferQueueEnd[c] = &bufferQueue[c];
+      }
+
+    client = NSTREAM;
+    signal ReadStream.readDone[c](SUCCESS, actualPeriod);
+  }
+
+  task void readStreamFail() {
+    /* By now, the pending bufferDone has been signaled (see readStream). */
+    struct list_entry_t *entry;
+    uint8_t c = client;
+
+    atomic entry = bufferQueue[c];
+    for (; entry; entry = entry->next){
+      uint16_t tmp_count __DEPUTY_UNUSED__ = entry->count;
+      signal ReadStream.bufferDone[c](FAIL, TCAST(uint16_t * COUNT_NOK(tmp_count),entry), entry->count);
+    }
+
+    atomic
+      {
+	bufferQueue[c] = NULL;
+	bufferQueueEnd[c] = &bufferQueue[c];
+      }
+
+    client = NSTREAM;
+    signal ReadStream.readDone[c](FAIL, 0);
+  }
+
+  task void bufferDone() {
+    uint16_t *b, c;
+    atomic
+      {
+	b = lastBuffer;
+	c = lastCount;
+	lastBuffer = NULL;
+      }
+
+    signal ReadStream.bufferDone[client](SUCCESS, b, c);
+  }
+
+  void nextAlarm() {
+    call Alarm.startAt(now, period);
+    now += period;
+  }
+
+  async event void Alarm.fired() {
+    sample();
+  }
+
+  command error_t ReadStream.read[uint8_t c](uint32_t usPeriod)
+  {
+    /* The first reading may be imprecise. So we just do a dummy read
+       to get things rolling - this is indicated by setting count to 0 */
+    buffer = pos = NULL;
+    count = 0;
+    period = call Atm128Calibrate.calibrateMicro(usPeriod);
+    client = c;
+    sample();
+
+    return SUCCESS;
+  }
+
+  void nextBuffer() {
+    atomic
+      {
+	struct list_entry_t *entry = bufferQueue[client];
+
+	if (!entry)
+	  {
+	    // all done
+	    bufferQueueEnd[client] = NULL; // prevent post
+	    post readStreamDone();
+	  }
+	else
+	  {
+            uint16_t tmp_count;
+	    bufferQueue[client] = entry->next;
+	    if (!bufferQueue[client])
+	      bufferQueueEnd[client] = &bufferQueue[client];
+	    pos = buffer = NULL;
+	    count = entry->count;
+            tmp_count = count;
+	    pos = buffer = TCAST(uint16_t * COUNT_NOK(tmp_count), entry);
+	    nextAlarm();
+	  }
+      }
+  }
+
+  async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) {
+    if (client == NSTREAM)
+      return;
+
+    if (count == 0)
+      {
+	now = call Alarm.getNow();
+	nextBuffer();
+      }
+    else
+      {
+	*pos++ = data;
+	if (pos == buffer + count)
+	  {
+	    atomic
+	      {
+		if (lastBuffer)
+		  {
+		    /* We failed to signal bufferDone in time. Fail. */
+		    bufferQueueEnd[client] = NULL; // prevent post
+		    post readStreamFail();
+		    return;
+		  }
+		else
+		  {
+		    lastCount = count;
+		    lastBuffer = buffer;
+		  }
+	      }
+	    post bufferDone();
+	    nextBuffer();
+	  }
+	else
+	  nextAlarm();
+      }       
+  }
+
+  /* Configuration defaults. Read ground fast! ;-) */
+  default async command uint8_t Atm128AdcConfig.getChannel[uint8_t c]() {
+    return ATM128_ADC_SNGL_GND;
+  }
+
+  default async command uint8_t Atm128AdcConfig.getRefVoltage[uint8_t c]() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  default async command uint8_t Atm128AdcConfig.getPrescaler[uint8_t c]() {
+    return ATM128_ADC_PRESCALE_2;
+  }
+}
diff --git a/tos/chips/atm128/adc/Atm128Adc.h b/tos/chips/atm128/adc/Atm128Adc.h
new file mode 100644
index 00000000..b9e6bf99
--- /dev/null
+++ b/tos/chips/atm128/adc/Atm128Adc.h
@@ -0,0 +1,167 @@
+// $Id: Atm128Adc.h,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Martin Turon <mturon@xbow.com>
+// @author Hu Siquan <husq@xbow.com>
+
+#ifndef _H_Atm128ADC_h
+#define _H_Atm128ADC_h
+
+//================== 8 channel 10-bit ADC ==============================
+
+/* Voltage Reference Settings */
+enum {
+    ATM128_ADC_VREF_OFF = 0, //!< VR+ = AREF   and VR- = GND
+    ATM128_ADC_VREF_AVCC = 1,//!< VR+ = AVcc   and VR- = GND
+    ATM128_ADC_VREF_RSVD,
+    ATM128_ADC_VREF_2_56 = 3,//!< VR+ = 2.56V  and VR- = GND
+};
+
+/* Voltage Reference Settings */
+enum {
+    ATM128_ADC_RIGHT_ADJUST = 0, 
+    ATM128_ADC_LEFT_ADJUST = 1,
+};
+
+
+/* ADC Multiplexer Settings */
+enum {
+    ATM128_ADC_SNGL_ADC0 = 0,
+    ATM128_ADC_SNGL_ADC1,
+    ATM128_ADC_SNGL_ADC2,
+    ATM128_ADC_SNGL_ADC3,
+    ATM128_ADC_SNGL_ADC4,
+    ATM128_ADC_SNGL_ADC5,
+    ATM128_ADC_SNGL_ADC6,
+    ATM128_ADC_SNGL_ADC7,
+    ATM128_ADC_DIFF_ADC00_10x,
+    ATM128_ADC_DIFF_ADC10_10x,
+    ATM128_ADC_DIFF_ADC00_200x,
+    ATM128_ADC_DIFF_ADC10_200x,
+    ATM128_ADC_DIFF_ADC22_10x,
+    ATM128_ADC_DIFF_ADC32_10x,
+    ATM128_ADC_DIFF_ADC22_200x,
+    ATM128_ADC_DIFF_ADC32_200x,
+    ATM128_ADC_DIFF_ADC01_1x,
+    ATM128_ADC_DIFF_ADC11_1x,
+    ATM128_ADC_DIFF_ADC21_1x,
+    ATM128_ADC_DIFF_ADC31_1x,
+    ATM128_ADC_DIFF_ADC41_1x,
+    ATM128_ADC_DIFF_ADC51_1x,
+    ATM128_ADC_DIFF_ADC61_1x,
+    ATM128_ADC_DIFF_ADC71_1x,
+    ATM128_ADC_DIFF_ADC02_1x,
+    ATM128_ADC_DIFF_ADC12_1x,
+    ATM128_ADC_DIFF_ADC22_1x,
+    ATM128_ADC_DIFF_ADC32_1x,
+    ATM128_ADC_DIFF_ADC42_1x,
+    ATM128_ADC_DIFF_ADC52_1x,
+    ATM128_ADC_SNGL_1_23,
+    ATM128_ADC_SNGL_GND,
+};
+
+/* ADC Multiplexer Selection Register */
+typedef struct
+{
+    uint8_t mux   : 5;  //!< Analog Channel and Gain Selection Bits
+    uint8_t adlar : 1;  //!< ADC Left Adjust Result
+    uint8_t refs  : 2;  //!< Reference Selection Bits
+} Atm128Admux_t;
+
+/* ADC Prescaler Settings */
+/* Note: each platform must define ATM128_ADC_PRESCALE to the smallest
+   prescaler which guarantees full A/D precision. */
+enum {
+    ATM128_ADC_PRESCALE_2 = 0,
+    ATM128_ADC_PRESCALE_2b,
+    ATM128_ADC_PRESCALE_4,
+    ATM128_ADC_PRESCALE_8,
+    ATM128_ADC_PRESCALE_16,
+    ATM128_ADC_PRESCALE_32,
+    ATM128_ADC_PRESCALE_64,
+    ATM128_ADC_PRESCALE_128,
+
+    // This special value is used to ask the platform for the prescaler
+    // which gives full precision.
+    ATM128_ADC_PRESCALE
+};
+
+/* ADC Enable Settings */
+enum {
+    ATM128_ADC_ENABLE_OFF = 0,
+    ATM128_ADC_ENABLE_ON,
+};
+
+/* ADC Start Conversion Settings */
+enum {
+    ATM128_ADC_START_CONVERSION_OFF = 0,
+    ATM128_ADC_START_CONVERSION_ON,
+};
+
+/* ADC Free Running Select Settings */
+enum {
+    ATM128_ADC_FREE_RUNNING_OFF = 0,
+    ATM128_ADC_FREE_RUNNING_ON,
+};
+
+/* ADC Interrupt Flag Settings */
+enum {
+    ATM128_ADC_INT_FLAG_OFF = 0,
+    ATM128_ADC_INT_FLAG_ON,
+};
+
+/* ADC Interrupt Enable Settings */
+enum {
+    ATM128_ADC_INT_ENABLE_OFF = 0,
+    ATM128_ADC_INT_ENABLE_ON,
+};
+
+/* ADC Multiplexer Selection Register */
+typedef struct
+{
+    uint8_t adps  : 3;  //!< ADC Prescaler Select Bits
+    uint8_t adie  : 1;  //!< ADC Interrupt Enable
+    uint8_t adif  : 1;  //!< ADC Interrupt Flag
+    uint8_t adfr  : 1;  //!< ADC Free Running Select
+    uint8_t adsc  : 1;  //!< ADC Start Conversion
+    uint8_t aden  : 1;  //!< ADC Enable
+} Atm128Adcsra_t;
+
+typedef uint8_t Atm128_ADCH_t;         //!< ADC data register high
+typedef uint8_t Atm128_ADCL_t;         //!< ADC data register low
+
+// The resource identifier string for the ADC subsystem
+#define UQ_ATM128ADC_RESOURCE "atm128adc.resource"
+
+#endif //_H_Atm128ADC_h
+
diff --git a/tos/chips/atm128/adc/Atm128AdcC.nc b/tos/chips/atm128/adc/Atm128AdcC.nc
new file mode 100644
index 00000000..bec4560e
--- /dev/null
+++ b/tos/chips/atm128/adc/Atm128AdcC.nc
@@ -0,0 +1,78 @@
+/// $Id: Atm128AdcC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * HAL for the Atmega128 A/D conversion susbsystem.
+ *
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */
+
+configuration Atm128AdcC
+{
+  provides {
+    interface Resource[uint8_t client];
+    interface Atm128AdcSingle;
+    interface Atm128AdcMultiple;
+  }
+  uses interface ResourceConfigure[uint8_t client];
+}
+implementation
+{
+  components Atm128AdcP, HplAtm128AdcC, PlatformC, MainC,
+    new RoundRobinArbiterC(UQ_ATM128ADC_RESOURCE) as AdcArbiter,
+    new AsyncStdControlPowerManagerC() as PM;
+
+  Resource = AdcArbiter;
+  ResourceConfigure = AdcArbiter;
+  Atm128AdcSingle = Atm128AdcP;
+  Atm128AdcMultiple = Atm128AdcP;
+
+  PlatformC.SubInit -> Atm128AdcP;
+
+  Atm128AdcP.HplAtm128Adc -> HplAtm128AdcC;
+  Atm128AdcP.Atm128Calibrate -> PlatformC;
+
+  PM.AsyncStdControl -> Atm128AdcP;
+  PM.ResourceDefaultOwner -> AdcArbiter;
+}
diff --git a/tos/chips/atm128/adc/Atm128AdcConfig.nc b/tos/chips/atm128/adc/Atm128AdcConfig.nc
new file mode 100644
index 00000000..3faa6dd5
--- /dev/null
+++ b/tos/chips/atm128/adc/Atm128AdcConfig.nc
@@ -0,0 +1,40 @@
+/* $Id: Atm128AdcConfig.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * Clients of the higher-level A/D system must implement this interface to
+ * specify which channel to sample, and with what parameters.
+ *
+ * @author David Gay
+ */
+interface Atm128AdcConfig {
+  /**
+   * Obtain channel.
+   * @return The A/D channel to use. Must be one of the ATM128_ADC_SNGL_xxx
+   *   or ATM128_ADC_DIFF_xxx values from Atm128Adc.h.
+   */
+  async command uint8_t getChannel();
+
+  /**
+   * Obtain reference voltage
+   * @return The reference voltage to use. Must be one of the 
+   *   ATM128_ADC_VREF_xxx values from Atm128Adc.h.
+   */
+  async command uint8_t getRefVoltage();
+
+  /**
+   * Obtain prescaler value.
+   * @return The prescaler value to use. Must be one of the 
+   *   ATM128_ADC_PRESCALE_xxx values from Atm128Adc.h.
+   */
+  async command uint8_t getPrescaler();
+}
diff --git a/tos/chips/atm128/adc/Atm128AdcMultiple.nc b/tos/chips/atm128/adc/Atm128AdcMultiple.nc
new file mode 100644
index 00000000..ec11f046
--- /dev/null
+++ b/tos/chips/atm128/adc/Atm128AdcMultiple.nc
@@ -0,0 +1,129 @@
+/// $Id: Atm128AdcMultiple.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Hardware Abstraction Layer interface of Atmega128 for acquiring data
+ * from multiple channels using the ATmega128's free-running mode.
+ * <p>
+ * Because of the possibility that samples may be imprecise after 
+ * switching channels and/or reference voltages, and because there
+ * is a one sample delay on swithcing channels and reference voltages,
+ * Atm128ADCMultiple is complex. Two straightforward uses are:
+ * <ol type="A">
+ * <li>Acquire N samples from channel C:
+ *    <ol>
+ *    <li>call getData to start sampling on channel C at the desired rate
+ *       (note that the choice of prescalers is very limited, so you
+ *       don't have many choices for sampling rate)
+ *    <li>ignore the first dataReady event
+ *    <li>use the results of the next N dataReady() events, return FALSE
+ *       on the last one
+ *    </ol>
+ * <li>Acquire one sample each from channels C1, ..., Cn (this pseudocode
+ *    assumes that none of these channels are differential)
+ *    <ol>
+ *    <li>call getData to start sampling on channel C1
+ *    <li>on the ith dataReady event switch to channel Ci+1 by changing
+ *       *newChannel
+ *    <li>the data passed to the ith dataReady event is for channel Ci-1
+ *       (the data from the first dataReady event is ignored)
+ *    </ol>
+ * </ol>
+ *
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */        
+
+#include "Atm128Adc.h"
+
+interface Atm128AdcMultiple
+{
+  /**
+   * Initiates free-running ADC conversions, with the ability to switch 
+   * channels and reference-voltage with a one sample delay.
+   *
+   * @param channel Initial A/D conversion channel. The channel can 
+   *   be changed in the dataReady event, though these changes happen
+   *   with a one-sample delay (this is a hardware restriction).
+   * @param refVoltage Initial A/D reference voltage. See the
+   *   ATM128_ADC_VREF_xxx constants in Atm128ADC.h. Like the channel,
+   *   the reference voltage can be changed in the dataReady event with
+   *   a one-sample delay.
+   * @param leftJustify TRUE to place A/D result in high-order bits 
+   *   (i.e., shifted left by 6 bits), low to place it in the low-order bits
+   * @param prescaler Prescaler value for the A/D conversion clock. If you 
+   *  specify ATM128_ADC_PRESCALE, a prescaler will be chosen that guarantees
+   *  full precision. Other prescalers can be used to get faster conversions. 
+   *  See the ATmega128 manual for details.
+   * @return TRUE if the conversion will be precise, FALSE if it will be 
+   *   imprecise (due to a change in reference voltage, or switching to a
+   *   differential input channel)
+   */
+  async command bool getData(uint8_t channel, uint8_t refVoltage,
+			     bool leftJustify, uint8_t prescaler);
+  
+  /**
+   * Returns the next sample in a free-running conversion. Allow the user
+   * to switch channels and/or reference voltages with a one sample delay.
+   *
+   * @param data a 2 byte unsigned data value sampled by the ADC.
+   * @param precise if this conversion was precise, FALSE if it wasn't 
+   *   (we assume that the second conversion after a change of reference
+   *   voltage or after switching to a differential channel is precise)
+   * @param channel Channel this sample was from.
+   * @param newChannel Change this parameter to switch to a new channel
+   *   for the second next sample.
+   * @param newRefVoltage Change this parameter to change the reference 
+   *   voltage for the second next sample.
+   *
+   * @return TRUE to continue sampling, FALSE to stop.
+   */	
+  async event bool dataReady(uint16_t data, bool precise, uint8_t channel,
+			     uint8_t *newChannel, uint8_t *newRefVoltage);
+
+
+  /* Note: there is no cancel in free-running mode because you cannot tell
+     from a successful (or unsuccessful) cancellation whether there will
+     be another dataReady event. Thus you cannot tell when you can safely
+     reuse the ADC (short of waiting one ADC conversion period, in which
+     case you might as well use the result of dataReady to cancel).
+  */
+}
diff --git a/tos/chips/atm128/adc/Atm128AdcP.nc b/tos/chips/atm128/adc/Atm128AdcP.nc
new file mode 100644
index 00000000..c078a47b
--- /dev/null
+++ b/tos/chips/atm128/adc/Atm128AdcP.nc
@@ -0,0 +1,266 @@
+/* $Id: Atm128AdcP.nc,v 1.8 2010-06-29 22:07:43 scipio Exp $
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * Internal component of the Atmega128 A/D HAL.
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ * @author Phil Buonadonna
+ * @author Hu Siquan <husq@xbow.com>
+ */
+
+module Atm128AdcP @safe()
+{
+  provides {
+    interface Init;
+    interface AsyncStdControl;
+    interface Atm128AdcSingle;
+    interface Atm128AdcMultiple;
+  }
+  uses {
+    interface HplAtm128Adc;
+    interface Atm128Calibrate;
+  }
+}
+implementation
+{  
+  /* State for the current and next (multiple-sampling only) conversion */
+  struct {
+    bool multiple : 1;		/* single and multiple-sampling mode */
+    bool precise : 1;		/* is this result going to be precise? */
+    uint8_t channel : 5;	/* what channel did this sample come from? */
+  } f, nextF;
+  
+  command error_t Init.init() {
+    atomic
+      {
+	Atm128Adcsra_t adcsr;
+
+	adcsr.aden = ATM128_ADC_ENABLE_OFF;
+	adcsr.adsc = ATM128_ADC_START_CONVERSION_OFF;  
+	adcsr.adfr = ATM128_ADC_FREE_RUNNING_OFF; 
+	adcsr.adif = ATM128_ADC_INT_FLAG_OFF;               
+	adcsr.adie = ATM128_ADC_INT_ENABLE_OFF;       
+	adcsr.adps = ATM128_ADC_PRESCALE_2;
+	call HplAtm128Adc.setAdcsra(adcsr);
+      }
+    return SUCCESS;
+  }
+
+  /* We enable the A/D when start is called, and disable it when stop is
+     called. This drops A/D conversion latency by a factor of two (but
+     increases idle mode power consumption a little). 
+  */
+  async command error_t AsyncStdControl.start() {
+    atomic call HplAtm128Adc.enableAdc();
+    return SUCCESS;
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    atomic call HplAtm128Adc.disableAdc();
+
+    return SUCCESS;
+  }
+
+  /* Return TRUE if switching to 'channel' with reference voltage 'refVoltage'
+     will give a precise result (the first sample after changing reference
+     voltage or switching to/between a differential channel is imprecise)
+  */
+  inline bool isPrecise(Atm128Admux_t admux, uint8_t channel, uint8_t refVoltage) {
+    return refVoltage == admux.refs &&
+      (channel <= ATM128_ADC_SNGL_ADC7 || channel >= ATM128_ADC_SNGL_1_23 || channel == admux.mux);
+  }
+
+  async event void HplAtm128Adc.dataReady(uint16_t data) {
+    bool precise, multiple;
+    uint8_t channel;
+
+    atomic 
+      {
+	channel = f.channel;
+	precise = f.precise;
+	multiple = f.multiple;
+      }
+
+    if (!multiple)
+      {
+	/* A single sample. Disable the ADC interrupt to avoid starting
+	   a new sample at the next "sleep" instruction. */
+	call HplAtm128Adc.disableInterruption();
+	signal Atm128AdcSingle.dataReady(data, precise);
+      }
+    else
+      {
+	/* Multiple sampling. The user can:
+	   - tell us to stop sampling
+	   - or, to continue sampling on a new channel, possibly with a
+	     new reference voltage; however this change applies not to
+	     the next sample (the hardware has already started working on
+	     that), but on the one after.
+	*/
+	bool cont;
+	uint8_t nextChannel, nextVoltage;
+	Atm128Admux_t admux;
+
+	atomic 
+	  {
+	    admux = call HplAtm128Adc.getAdmux();
+	    nextVoltage = admux.refs;
+	    nextChannel = admux.mux;
+	  }
+
+	cont = signal Atm128AdcMultiple.dataReady(data, precise, channel,
+						  &nextChannel, &nextVoltage);
+	atomic
+	  if (cont)
+	    {
+	      /* Switch channels and update our internal channel+precision
+		 tracking state (f and nextF). Note that this tracking will
+		 be incorrect if we take too long to get to this point. */
+	      admux.refs = nextVoltage;
+	      admux.mux = nextChannel;
+	      call HplAtm128Adc.setAdmux(admux);
+
+	      f = nextF;
+	      nextF.channel = nextChannel;
+	      nextF.precise = isPrecise(admux, nextChannel, nextVoltage);
+	    }
+	  else
+	    call HplAtm128Adc.cancel();
+      }
+  }
+
+  /* Start sampling based on request parameters */
+  void getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler) {
+    Atm128Admux_t admux;
+    Atm128Adcsra_t adcsr;
+
+    admux = call HplAtm128Adc.getAdmux();
+    f.precise = isPrecise(admux, channel, refVoltage);
+    f.channel = channel;
+
+    admux.refs = refVoltage;
+    admux.adlar = leftJustify;
+    admux.mux = channel;
+    call HplAtm128Adc.setAdmux(admux);
+
+    adcsr.aden = ATM128_ADC_ENABLE_ON;
+    adcsr.adsc = ATM128_ADC_START_CONVERSION_ON;
+    adcsr.adfr = f.multiple;
+    adcsr.adif = ATM128_ADC_INT_FLAG_ON; // clear any stale flag
+    adcsr.adie = ATM128_ADC_INT_ENABLE_ON;
+    if (prescaler == ATM128_ADC_PRESCALE)
+      prescaler = call Atm128Calibrate.adcPrescaler();
+    adcsr.adps = prescaler;
+    call HplAtm128Adc.setAdcsra(adcsr);
+  }
+
+  async command bool Atm128AdcSingle.getData(uint8_t channel, uint8_t refVoltage,
+					     bool leftJustify, uint8_t prescaler) {
+    atomic
+      {
+	f.multiple = FALSE;
+	getData(channel, refVoltage, leftJustify, prescaler);
+
+	return f.precise;
+      }
+  }
+
+  async command bool Atm128AdcSingle.cancel() {
+    /* There is no Atm128AdcMultiple.cancel, for reasons discussed in that
+       interface */
+    return call HplAtm128Adc.cancel();
+  }
+
+  async command bool Atm128AdcMultiple.getData(uint8_t channel, uint8_t refVoltage,
+					       bool leftJustify, uint8_t prescaler) {
+    atomic
+      {
+	f.multiple = TRUE;
+	getData(channel, refVoltage, leftJustify, prescaler);
+	nextF = f;
+	/* We assume the 2nd sample is precise */
+	nextF.precise = TRUE;
+
+	return f.precise;
+      }
+  }
+
+  default async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) {
+  }
+
+  default async event bool Atm128AdcMultiple.dataReady(uint16_t data, bool precise, uint8_t channel,
+						       uint8_t *newChannel, uint8_t *newRefVoltage) {
+    return FALSE; // stop conversion if we somehow end up here.
+  }
+}
diff --git a/tos/chips/atm128/adc/Atm128AdcSingle.nc b/tos/chips/atm128/adc/Atm128AdcSingle.nc
new file mode 100644
index 00000000..e97f0896
--- /dev/null
+++ b/tos/chips/atm128/adc/Atm128AdcSingle.nc
@@ -0,0 +1,92 @@
+/// $Id: Atm128AdcSingle.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Hardware Abstraction Layer interface of Atmega128 for acquiring
+ * a single sample from a channel.
+ *
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */
+
+#include "Atm128Adc.h"
+
+interface Atm128AdcSingle
+{
+  /**
+   * Initiates an ADC conversion on a given channel.
+   *
+   * @param channel A/D conversion channel.
+   * @param refVoltage Select reference voltage for A/D conversion. See
+   *   the ATM128_ADC_VREF_xxx constants in Atm128ADC.h
+   * @param leftJustify TRUE to place A/D result in high-order bits 
+   *   (i.e., shifted left by 6 bits), low to place it in the low-order bits
+   * @param prescaler Prescaler value for the A/D conversion clock. If you 
+   *  specify ATM128_ADC_PRESCALE, a prescaler will be chosen that guarantees
+   *  full precision. Other prescalers can be used to get faster conversions. 
+   *  See the ATmega128 manual for details.
+   * @return TRUE if the conversion will be precise, FALSE if it will be 
+   *   imprecise (due to a change in refernce voltage, or switching to a
+   *   differential input channel)
+   */
+  async command bool getData(uint8_t channel, uint8_t refVoltage,
+			     bool leftJustify, uint8_t prescaler);
+  
+  /**
+   * Indicates a sample has been recorded by the ADC as the result
+   * of a <code>getData()</code> command.
+   *
+   * @param data a 2 byte unsigned data value sampled by the ADC.
+   * @param precise if the conversion precise, FALSE if it wasn't. This
+   *   values matches the result from the <code>getData</code> call.
+   */	
+  async event void dataReady(uint16_t data, bool precise);
+
+  /**
+   * Cancel an outstanding getData operation. Use with care, to
+   * avoid problems with races between the dataReady event and cancel.
+   * @return TRUE if a conversion was in-progress or an interrupt
+   *   was pending. dataReady will not be signaled. FALSE if the
+   *   conversion was already complete. dataReady will be (or has
+   *   already been) signaled.
+   */
+  async command bool cancel();
+}
diff --git a/tos/chips/atm128/adc/HplAtm128Adc.nc b/tos/chips/atm128/adc/HplAtm128Adc.nc
new file mode 100644
index 00000000..56ed2207
--- /dev/null
+++ b/tos/chips/atm128/adc/HplAtm128Adc.nc
@@ -0,0 +1,157 @@
+/// $Id: HplAtm128Adc.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * HPL interface to the Atmega128 A/D conversion subsystem. Please see the
+ * Atmega128 manual for full details on the functioning of this subsystem.
+ * <p>
+ * A word of warning: the Atmega128 SLEEP instruction initiates an A/D
+ * conversion when the ADC and ADC interrupt are enabled.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */
+
+interface HplAtm128Adc {
+  /**
+   * Read the ADMUX (ADC selection) register
+   * @return Current ADMUX value
+   */
+  async command Atm128Admux_t getAdmux();
+  /**
+   * Set the ADMUX (ADC selection) register
+   * @param admux New ADMUX value
+   */
+  async command void setAdmux(Atm128Admux_t admux);
+
+  /**
+   * Read the ADCSRA (ADC control) register
+   * @return Current ADCSRA value
+   */
+  async command Atm128Adcsra_t getAdcsra();
+  /**
+   * Set the ADCSRA (ADC control) register
+   * @param adcsra New ADCSRA value
+   */
+  async command void setAdcsra(Atm128Adcsra_t adcsra);
+
+  /**
+   * Read the latest A/D conversion result
+   * @return A/D value
+   */
+  async command uint16_t getValue();
+
+  /// A/D control utilities. All of these clear any pending A/D interrupt.
+
+  /**
+   * Enable ADC sampling
+   */
+  async command void enableAdc();
+  /**
+   * Disable ADC sampling
+   */
+  async command void disableAdc();
+
+  /**
+   * Enable ADC interrupt
+   */
+  async command void enableInterruption();
+  /**
+   * Disable ADC interrupt
+   */
+  async command void disableInterruption();
+  /**
+   * Clear the ADC interrupt flag
+   */
+  async command void resetInterrupt();
+
+  /**
+   * Start ADC conversion. If ADC interrupts are enabled, the dataReady event
+   * will be signaled once (in non-continuous mode) or repeatedly (in
+   * continuous mode).
+   */
+  async command void startConversion();
+  /**
+   * Enable continuous sampling
+   */
+  async command void setContinuous();
+  /**
+   * Disable continuous sampling
+   */
+  async command void setSingle();
+
+  /* A/D status checks */
+
+  /**
+   * Is ADC enabled?
+   * @return TRUE if the ADC is enabled, FALSE otherwise
+   */
+  async command bool isEnabled();
+  /**
+   * Is A/D conversion in progress?
+   * @return TRUE if the A/D conversion is in progress, FALSE otherwise
+   */
+  async command bool isStarted();
+  /**
+   * Is A/D conversion complete? Note that this flag is automatically
+   * cleared when an A/D interrupt occurs.
+   * @return TRUE if the A/D conversion is complete, FALSE otherwise
+   */
+  async command bool isComplete();
+
+  /**
+   * Set ADC prescaler selection bits
+   * @param scale New ADC prescaler. Must be one of the ATM128_ADC_PRESCALE_xxx
+   *   values from Atm128Adc.h
+   */
+  async command void setPrescaler(uint8_t scale);
+
+  /**
+   * Cancel A/D conversion and any pending A/D interrupt. Also disables the
+   * ADC interruption (otherwise a sample might start at the next sleep
+   * instruction). This command can assume that the A/D converter is enabled. 
+   * @return TRUE if an A/D conversion was in progress or an A/D interrupt
+   *   was pending, FALSE otherwise. In single conversion mode, a return
+   *   of TRUE implies that the dataReady event will not be signaled.
+   */
+  async command bool cancel();
+
+  /**
+   * A/D interrupt occured
+   * @param data Latest A/D conversion result
+   */
+  async event void dataReady(uint16_t data);     
+}
diff --git a/tos/chips/atm128/adc/HplAtm128AdcC.nc b/tos/chips/atm128/adc/HplAtm128AdcC.nc
new file mode 100644
index 00000000..f359a9cd
--- /dev/null
+++ b/tos/chips/atm128/adc/HplAtm128AdcC.nc
@@ -0,0 +1,52 @@
+/// $Id: HplAtm128AdcC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * HPL for the Atmega128 A/D conversion susbsystem.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */
+
+configuration HplAtm128AdcC {
+  provides interface HplAtm128Adc;
+}
+implementation {
+  components HplAtm128AdcP, McuSleepC;
+
+  HplAtm128Adc = HplAtm128AdcP;
+  HplAtm128AdcP.McuPowerState -> McuSleepC;
+}
diff --git a/tos/chips/atm128/adc/HplAtm128AdcP.nc b/tos/chips/atm128/adc/HplAtm128AdcP.nc
new file mode 100644
index 00000000..09068a41
--- /dev/null
+++ b/tos/chips/atm128/adc/HplAtm128AdcP.nc
@@ -0,0 +1,141 @@
+/// $Id: HplAtm128AdcP.nc,v 1.9 2010-06-29 22:07:43 scipio Exp $
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * HPL for the Atmega128 A/D conversion susbsystem.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */
+
+module HplAtm128AdcP @safe() {
+  provides interface HplAtm128Adc;
+  uses interface McuPowerState;
+}
+implementation {
+  //=== Direct read of HW registers. =================================
+  async command Atm128Admux_t HplAtm128Adc.getAdmux() { 
+    return *(Atm128Admux_t*)&ADMUX; 
+  }
+  async command Atm128Adcsra_t HplAtm128Adc.getAdcsra() { 
+    return *(Atm128Adcsra_t*)&ADCSRA; 
+  }
+  async command uint16_t HplAtm128Adc.getValue() { 
+    return ADC; 
+  }
+
+  DEFINE_UNION_CAST(Admux2int, Atm128Admux_t, uint8_t);
+  DEFINE_UNION_CAST(Adcsra2int, Atm128Adcsra_t, uint8_t);
+
+  //=== Direct write of HW registers. ================================
+  async command void HplAtm128Adc.setAdmux( Atm128Admux_t x ) { 
+    ADMUX = Admux2int(x); 
+  }
+  async command void HplAtm128Adc.setAdcsra( Atm128Adcsra_t x ) { 
+    ADCSRA = Adcsra2int(x); 
+  }
+
+  async command void HplAtm128Adc.setPrescaler(uint8_t scale){
+    Atm128Adcsra_t  current_val = call HplAtm128Adc.getAdcsra(); 
+    current_val.adif = FALSE;
+    current_val.adps = scale;
+    call HplAtm128Adc.setAdcsra(current_val);
+  }
+
+  // Individual bit manipulation. These all clear any pending A/D interrupt.
+  async command void HplAtm128Adc.enableAdc() {
+    SET_BIT(ADCSRA, ADEN); 
+    call McuPowerState.update();
+  }
+  async command void HplAtm128Adc.disableAdc() {
+    CLR_BIT(ADCSRA, ADEN); 
+    call McuPowerState.update();
+  }
+  async command void HplAtm128Adc.enableInterruption() { SET_BIT(ADCSRA, ADIE); }
+  async command void HplAtm128Adc.disableInterruption() { CLR_BIT(ADCSRA, ADIE); }
+  async command void HplAtm128Adc.setContinuous() { SET_BIT(ADCSRA, ADFR); }
+  async command void HplAtm128Adc.setSingle() { CLR_BIT(ADCSRA, ADFR); }
+  async command void HplAtm128Adc.resetInterrupt() { SET_BIT(ADCSRA, ADIF); }
+  async command void HplAtm128Adc.startConversion() { SET_BIT(ADCSRA, ADSC); }
+
+
+  /* A/D status checks */
+  async command bool HplAtm128Adc.isEnabled()     {       
+    return (call HplAtm128Adc.getAdcsra()).aden; 
+  }
+
+  async command bool HplAtm128Adc.isStarted()     {
+    return (call HplAtm128Adc.getAdcsra()).adsc; 
+  }
+  
+  async command bool HplAtm128Adc.isComplete()    {
+    return (call HplAtm128Adc.getAdcsra()).adif; 
+  }
+
+  /* A/D interrupt handlers. Signals dataReady event with interrupts enabled */
+  AVR_ATOMIC_HANDLER(SIG_ADC) {
+    uint16_t data = call HplAtm128Adc.getValue();
+    
+    __nesc_enable_interrupt();
+    signal HplAtm128Adc.dataReady(data);
+  }
+
+  default async event void HplAtm128Adc.dataReady(uint16_t done) { }
+
+  async command bool HplAtm128Adc.cancel() { 
+    /* This is tricky */
+    atomic
+      {
+	Atm128Adcsra_t oldSr = call HplAtm128Adc.getAdcsra(), newSr;
+
+	/* To cancel a conversion, first turn off ADEN, then turn off
+	   ADSC. We also cancel any pending interrupt.
+	   Finally we reenable the ADC.
+	*/
+	newSr = oldSr;
+	newSr.aden = FALSE;
+	newSr.adif = TRUE; /* This clears a pending interrupt... */
+	newSr.adie = FALSE; /* We don't want to start sampling again at the
+			       next sleep */
+	call HplAtm128Adc.setAdcsra(newSr);
+	newSr.adsc = FALSE;
+	call HplAtm128Adc.setAdcsra(newSr);
+	newSr.aden = TRUE;
+	call HplAtm128Adc.setAdcsra(newSr);
+
+	return oldSr.adif || oldSr.adsc;
+      }
+  }
+}
diff --git a/tos/chips/atm128/adc/WireAdcP.nc b/tos/chips/atm128/adc/WireAdcP.nc
new file mode 100644
index 00000000..ed7336f6
--- /dev/null
+++ b/tos/chips/atm128/adc/WireAdcP.nc
@@ -0,0 +1,37 @@
+/* $Id: WireAdcP.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Support component for AdcReadClientC and AdcReadNowClientC.
+ *
+ * @author David Gay
+ */
+
+configuration WireAdcP {
+  provides {
+    interface Read<uint16_t>[uint8_t client]; 
+    interface ReadNow<uint16_t>[uint8_t client];
+  }
+  uses {
+    interface Atm128AdcConfig[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  components Atm128AdcC, AdcP,
+    new ArbitratedReadC(uint16_t) as ArbitrateRead;
+
+  Read = ArbitrateRead;
+  ReadNow = AdcP;
+  Resource = ArbitrateRead.Resource;
+  Atm128AdcConfig = AdcP;
+
+  ArbitrateRead.Service -> AdcP.Read;
+  AdcP.Atm128AdcSingle -> Atm128AdcC;
+}
diff --git a/tos/chips/atm128/adc/WireAdcStreamP.nc b/tos/chips/atm128/adc/WireAdcStreamP.nc
new file mode 100644
index 00000000..96a9e47f
--- /dev/null
+++ b/tos/chips/atm128/adc/WireAdcStreamP.nc
@@ -0,0 +1,40 @@
+/* $Id: WireAdcStreamP.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Support component for AdcReadStreamClientC.
+ *
+ * @author David Gay
+ */
+
+#include "Adc.h"
+
+configuration WireAdcStreamP {
+  provides interface ReadStream<uint16_t>[uint8_t client];
+  uses {
+    interface Atm128AdcConfig[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  components Atm128AdcC, AdcStreamP, PlatformC, MainC,
+    new AlarmMicro32C(), 
+    new ArbitratedReadStreamC(uniqueCount(UQ_ADC_READSTREAM), uint16_t) as ArbitrateReadStream;
+
+  Resource = ArbitrateReadStream;
+  ReadStream = ArbitrateReadStream;
+  Atm128AdcConfig = AdcStreamP;
+
+  ArbitrateReadStream.Service -> AdcStreamP;
+
+  AdcStreamP.Init <- MainC;
+  AdcStreamP.Atm128AdcSingle -> Atm128AdcC;
+  AdcStreamP.Atm128Calibrate -> PlatformC;
+  AdcStreamP.Alarm -> AlarmMicro32C;
+}
diff --git a/tos/chips/atm128/atm128const.h b/tos/chips/atm128/atm128const.h
new file mode 100644
index 00000000..516e9bfb
--- /dev/null
+++ b/tos/chips/atm128/atm128const.h
@@ -0,0 +1,41 @@
+// $Id: atm128const.h,v 1.4 2006-12-12 18:23:03 vlahan Exp $
+
+/* 
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * const_[u]int[8/16/32]_t types are used to declare single and array
+ * constants that should live in ROM/FLASH. These constants must be read
+ * via the corresponding read_[u]int[8/16/32]_t functions.
+ * 
+ * This file defines the ATmega128 version of these types and functions.
+ * @author David Gay
+ */
+
+#ifndef ATMEGA128CONST_H
+#define ATMEGA128CONST_H
+
+typedef uint8_t const_uint8_t PROGMEM;
+typedef uint16_t const_uint16_t PROGMEM;
+typedef uint32_t const_uint32_t PROGMEM;
+typedef int8_t const_int8_t PROGMEM;
+typedef int16_t const_int16_t PROGMEM;
+typedef int32_t const_int32_t PROGMEM;
+
+#define read_uint8_t(x) pgm_read_byte(x)
+#define read_uint16_t(x) pgm_read_word(x)
+#define read_uint32_t(x) pgm_read_dword(x)
+
+#define read_int8_t(x) ((int8_t)pgm_read_byte(x))
+#define read_int16_t(x) ((int16_t)pgm_read_word(x))
+#define read_int32_t(x) ((int32_t)pgm_read_dword(x))
+
+
+#endif
diff --git a/tos/chips/atm128/atm128hardware.h b/tos/chips/atm128/atm128hardware.h
new file mode 100644
index 00000000..2ecb9c24
--- /dev/null
+++ b/tos/chips/atm128/atm128hardware.h
@@ -0,0 +1,163 @@
+//  $Id: atm128hardware.h,v 1.12 2010-06-29 22:07:43 scipio Exp $
+
+/*                                                                     
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Martin Turon <mturon@xbow.com>
+ */
+
+#ifndef _H_atmega128hardware_H
+#define _H_atmega128hardware_H
+
+#include <avr/io.h>
+#if __AVR_LIBC_VERSION__ >= 10400UL
+#include <avr/interrupt.h>
+#else
+#include <avr/interrupt.h>
+#include <avr/signal.h>
+#endif
+#include <avr/wdt.h>
+#include <avr/pgmspace.h>
+#include "atm128const.h"
+
+/* We need slightly different defs than SIGNAL, INTERRUPT */
+#define AVR_ATOMIC_HANDLER(signame) \
+  void signame() __attribute__ ((signal)) @atomic_hwevent() @C()
+
+#define AVR_NONATOMIC_HANDLER(signame) \
+  void signame() __attribute__ ((interrupt)) @hwevent() @C()
+
+/* Macro to create union casting functions. */
+#define DEFINE_UNION_CAST(func_name, from_type, to_type) \
+  to_type func_name(from_type x) { \
+  union {from_type f; to_type t;} c = {f:x}; return c.t; }
+
+// Bit operators using bit number
+#define SET_BIT(port, bit)    ((port) |= _BV(bit))
+#define CLR_BIT(port, bit)    ((port) &= ~_BV(bit))
+#define READ_BIT(port, bit)   (((port) & _BV(bit)) != 0)
+#define FLIP_BIT(port, bit)   ((port) ^= _BV(bit))
+#define WRITE_BIT(port, bit, value) \
+   if (value) SET_BIT((port), (bit)); \
+   else CLR_BIT((port), (bit))
+
+// Bit operators using bit flag mask
+#define SET_FLAG(port, flag)  ((port) |= (flag))
+#define CLR_FLAG(port, flag)  ((port) &= ~(flag))
+#define READ_FLAG(port, flag) ((port) & (flag))
+
+/* Enables interrupts. */
+inline void __nesc_enable_interrupt() @safe() {
+    sei();
+}
+/* Disables all interrupts. */
+inline void __nesc_disable_interrupt() @safe() {
+    cli();
+}
+
+/* Defines data type for storing interrupt mask state during atomic. */
+typedef uint8_t __nesc_atomic_t;
+__nesc_atomic_t __nesc_atomic_start(void);
+void __nesc_atomic_end(__nesc_atomic_t original_SREG);
+
+#ifndef NESC_BUILD_BINARY
+/* @spontaneous() functions should not be included when NESC_BUILD_BINARY
+   is #defined, to avoid duplicate functions definitions wheb binary
+   components are used. Such functions do need a prototype in all cases,
+   though. */
+
+/* Saves current interrupt mask state and disables interrupts. */
+inline __nesc_atomic_t 
+__nesc_atomic_start(void) @spontaneous() @safe()
+{
+    __nesc_atomic_t result = SREG;
+    __nesc_disable_interrupt();
+    asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
+    return result;
+}
+
+/* Restores interrupt mask to original state. */
+inline void 
+__nesc_atomic_end(__nesc_atomic_t original_SREG) @spontaneous() @safe()
+{
+  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
+  SREG = original_SREG;
+}
+#endif
+
+/* Defines the mcu_power_t type for atm128 power management. */
+typedef uint8_t mcu_power_t @combine("mcombine");
+
+
+enum {
+  ATM128_POWER_IDLE        = 0,
+  ATM128_POWER_ADC_NR      = 1,
+  ATM128_POWER_EXT_STANDBY = 2,
+  ATM128_POWER_SAVE        = 3,
+  ATM128_POWER_STANDBY     = 4,
+  ATM128_POWER_DOWN        = 5, 
+};
+
+/* Combine function.  */
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() {
+  return (m1 < m2)? m1: m2;
+}
+
+/* Floating-point network-type support.
+   These functions must convert to/from a 32-bit big-endian integer that follows
+   the layout of Java's java.lang.float.floatToRawIntBits method.
+   Conveniently, for the AVR family, this is a straight byte copy...
+*/
+
+typedef float nx_float __attribute__((nx_base_be(afloat)));
+
+inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() {
+  float f;
+  memcpy(&f, source, sizeof(float));
+  return f;
+}
+
+inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() {
+  memcpy(target, &value, sizeof(float));
+  return value;
+}
+
+#endif //_H_atmega128hardware_H
diff --git a/tos/chips/atm128/crc.h b/tos/chips/atm128/crc.h
new file mode 100644
index 00000000..fe43bd9c
--- /dev/null
+++ b/tos/chips/atm128/crc.h
@@ -0,0 +1,119 @@
+// $Id: crc.h,v 1.7 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#ifndef CRC_H
+#define CRC_H
+
+/* We don't want to duplicate this fairly large function inside binary
+   components. */
+#ifdef NESC_BUILD_BINARY
+uint16_t crcByte(uint16_t oldCrc, uint8_t byte);
+#else
+uint16_t crcTable[256] PROGMEM = {
+  0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+  0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+  0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+  0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+  0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+  0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+  0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+  0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+  0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+  0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+  0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+  0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+  0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+  0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+  0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+  0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+  0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+  0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+  0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+  0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+  0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+  0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+  0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+  0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+  0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+  0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+  0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+  0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+  0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+  0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+  0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+  0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
+};
+
+/*
+ * Optimised Atmega128 ITU-T CRC function.
+ *
+ * @param crc Running CRC value
+ * @param b Byte to "add" to the CRC
+ * @return New CRC value
+ */
+uint16_t crcByte(uint16_t oldCrc, uint8_t byte) __attribute__((noinline)) @safe()
+{
+#if 1
+  uint16_t *table = crcTable;
+  uint16_t newCrc;
+
+  asm ("eor %1,%B3\n"
+       "\tlsl %1\n"
+       "\tadc %B2, __zero_reg__\n"
+       "\tadd %A2, %1\n"
+       "\tadc %B2, __zero_reg__\n"
+       "\tlpm\n"
+       "\tmov %B0, %A3\n"
+       "\tmov %A0, r0\n"
+       "\tadiw r30,1\n"
+       "\tlpm\n"
+       "\teor %B0, r0"
+       : "=r" (newCrc), "+r" (byte), "+z" (table) : "r" (oldCrc));
+  return newCrc;
+#else
+  uint8_t *magic = (uint8_t *)&crcTable[oldCrc >> 8 ^ byte];
+
+  return PRG_RDB(magic) | ((uint8_t)oldCrc ^ PRG_RDB(magic + 1)) << 8;
+#endif
+}
+#endif
+
+#endif
diff --git a/tos/chips/atm128/i2c/Atm128I2C.h b/tos/chips/atm128/i2c/Atm128I2C.h
new file mode 100644
index 00000000..398b7b1a
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2C.h
@@ -0,0 +1,63 @@
+// $Id: Atm128I2C.h,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Martin Turon <mturon@xbow.com>
+
+#ifndef _H_Atm128I2C_h
+#define _H_Atm128I2C_h
+
+#define ATM128_I2C_SLA_WRITE 0x00
+#define ATM128_I2C_SLA_READ 0x01
+
+#define UQ_ATM128_I2CMASTER "Atm128I2CMasterC.I2CPacket"
+
+enum {
+    ATM128_I2C_BUSERROR         = 0x00,
+    ATM128_I2C_START            = 0x08,
+    ATM128_I2C_RSTART           = 0x10,
+    ATM128_I2C_MW_SLA_ACK       = 0x18,
+    ATM128_I2C_MW_SLA_NACK      = 0x20,
+    ATM128_I2C_MW_DATA_ACK      = 0x28,
+    ATM128_I2C_MW_DATA_NACK     = 0x30,
+    ATM128_I2C_M_ARB_LOST       = 0x38,
+    ATM128_I2C_MR_SLA_ACK       = 0x40,
+    ATM128_I2C_MR_SLA_NACK      = 0x48,
+    ATM128_I2C_MR_DATA_ACK      = 0x50,
+    ATM128_I2C_MR_DATA_NACK     = 0x58
+};
+
+#ifndef ATM128_I2C_EXTERNAL_PULLDOWN
+#define ATM128_I2C_EXTERNAL_PULLDOWN FALSE
+#endif
+
+#endif // _H_Atm128I2C_h
diff --git a/tos/chips/atm128/i2c/Atm128I2C.nc b/tos/chips/atm128/i2c/Atm128I2C.nc
new file mode 100644
index 00000000..7685f611
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2C.nc
@@ -0,0 +1,47 @@
+/// $Id: Atm128I2C.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128I2C.h"
+
+/**
+ * An interface for stopping the I2C bus. Needed by the resource
+ * reservation system, so that when a client releases you're sure
+ * there's a stop.
+ *
+ * @author Philip Levis
+ *
+ * @version  $Id: Atm128I2C.nc,v 1.4 2006-12-12 18:23:03 vlahan Exp $
+ */
+interface Atm128I2C {
+
+  async command void stop();
+}
diff --git a/tos/chips/atm128/i2c/Atm128I2CMaster.nc b/tos/chips/atm128/i2c/Atm128I2CMaster.nc
new file mode 100644
index 00000000..2987dc33
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2CMaster.nc
@@ -0,0 +1,61 @@
+/// $Id: Atm128I2CMaster.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128I2C.h"
+
+/**
+ * Interface for non-blocking I2C master engine.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+interface Atm128I2CMaster
+{
+    /** Ping the I2C device. */
+    command error_t ping  ();
+
+    /** Write the given data buffer the I2C device. */
+    command error_t write (uint8_t *data, uint8_t length);
+
+    /** Read from the I2C device. */
+    command error_t read  (uint8_t *data, uint8_t length);
+
+    /** Signal that the ping to the I2C device is done. */
+    event void pingDone  (error_t result);
+
+    /** Signal that the read from the I2C device is done. */
+    event void readDone  ();
+
+    /** Signal that the write to the I2C device is done. */
+    event void writeDone ();
+}
diff --git a/tos/chips/atm128/i2c/Atm128I2CMasterC.nc b/tos/chips/atm128/i2c/Atm128I2CMasterC.nc
new file mode 100644
index 00000000..191a73ad
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2CMasterC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD 
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The basic client abstraction of the I2C on the Atmega128. I2C
+ * device drivers should instantiate one of these to ensure
+ * exclusive access to the I2C bus.
+ *
+ * @author Philip Levis
+ * @date   May 28, 2006
+ */
+
+#include "Atm128I2C.h"
+
+generic configuration Atm128I2CMasterC() {
+  provides interface Resource;
+  provides interface I2CPacket<TI2CBasicAddr>;
+}
+implementation {
+  enum {
+    CLIENT_ID = unique(UQ_ATM128_I2CMASTER),
+  };
+  
+  components Atm128I2CMasterP as I2C; 
+  Resource = I2C.Resource[CLIENT_ID];
+  I2CPacket = I2C.I2CPacket[CLIENT_ID]; 
+}
diff --git a/tos/chips/atm128/i2c/Atm128I2CMasterImplP.nc b/tos/chips/atm128/i2c/Atm128I2CMasterImplP.nc
new file mode 100644
index 00000000..bb4125c9
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2CMasterImplP.nc
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The configuration that takes the underlying I2C driver on the 
+ * Atmega128 and turns it into a shared abstraction.
+ *
+ * @date May 28 2006
+ * @author Philip Levis
+ */
+
+generic module Atm128I2CMasterImplP() {
+  provides interface Resource[uint8_t client];
+  provides interface I2CPacket<TI2CBasicAddr>[uint8_t client];
+  uses interface Resource as SubResource[uint8_t];
+  uses interface I2CPacket<TI2CBasicAddr> as SubPacket;
+  uses interface Atm128I2C;
+  uses interface Leds;
+}
+implementation {
+
+  enum {
+    NO_CLIENT = 0xff
+  };
+  
+  uint8_t currentClient = NO_CLIENT;
+
+  async command error_t Resource.request[uint8_t id]() {
+    return call SubResource.request[id]();
+  }
+
+  async command error_t Resource.immediateRequest[uint8_t id]() {
+    error_t rval = call SubResource.immediateRequest[id]();
+    if (rval == SUCCESS) {
+      atomic currentClient = id;
+    }
+    return rval;
+  }
+
+  event void SubResource.granted[uint8_t id]() {
+    atomic currentClient = id;
+    signal Resource.granted[id]();
+  }
+
+  async command error_t Resource.release[uint8_t id]() {
+    call Atm128I2C.stop(); // Always stop if someone has released.
+    return call SubResource.release[id]();
+  }
+
+  async command bool Resource.isOwner[uint8_t id]() {
+    return call SubResource.isOwner[id]();
+  }
+  
+  async command error_t I2CPacket.write[uint8_t id](i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* data) {
+    atomic {
+      if (currentClient != id) {
+	return FAIL;
+      }
+    }
+    return call SubPacket.write(flags, addr, len, data);
+  }
+  
+  async command error_t I2CPacket.read[uint8_t id](i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* data) {
+    atomic {
+      if (currentClient != id) {
+	return FAIL;
+      }
+    }
+    return call SubPacket.read(flags, addr, len, data);
+  }
+
+  async event void SubPacket.readDone(error_t error, uint16_t addr, uint8_t len, uint8_t* data) {
+    signal I2CPacket.readDone[currentClient](error, addr, len, data);
+  }
+  async event void SubPacket.writeDone(error_t error, uint16_t addr, uint8_t len, uint8_t* data) {
+    signal I2CPacket.writeDone[currentClient](error, addr, len, data);
+  }
+  
+  default event void Resource.granted[uint8_t id]() {}
+ default async event void I2CPacket.writeDone[uint8_t id](error_t error, uint16_t addr, uint8_t len, uint8_t* data) {}
+ default async event void I2CPacket.readDone[uint8_t id](error_t error, uint16_t addr, uint8_t len, uint8_t* data) {}
+}
+
diff --git a/tos/chips/atm128/i2c/Atm128I2CMasterP.nc b/tos/chips/atm128/i2c/Atm128I2CMasterP.nc
new file mode 100644
index 00000000..8f077e29
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2CMasterP.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The configuration that takes the underlying I2C driver on the 
+ * Atmega128 and turns it into a shared abstraction.
+ *
+ * @date May 28 2006
+ * @author Philip Levis
+ */
+
+#include "Atm128I2C.h"
+
+
+
+configuration Atm128I2CMasterP {
+  provides interface Resource[uint8_t client];
+  provides interface I2CPacket<TI2CBasicAddr>[uint8_t client];
+}
+implementation {
+  enum {
+    ATM128_I2C_CLIENT_COUNT = uniqueCount(UQ_ATM128_I2CMASTER),
+  };
+  
+  components new FcfsArbiterC(UQ_ATM128_I2CMASTER) as Arbiter;
+  components new AsyncPowerManagerP() as Power;
+  components new Atm128I2CMasterImplP() as I2C;
+  components new Atm128I2CMasterPacketP() as Master;
+  components HplAtm128I2CBusC;
+  components LedsC, NoLedsC;
+    
+  Resource  = I2C;
+  I2CPacket = I2C;
+  
+  I2C.SubResource -> Arbiter;
+  I2C.SubPacket   -> Master;
+  I2C.Atm128I2C -> Master;
+  
+  Power.AsyncStdControl -> Master;
+  Power.ResourceDefaultOwner -> Arbiter;
+
+  Master.I2C -> HplAtm128I2CBusC;
+  Master.ReadDebugLeds -> NoLedsC;
+  Master.WriteDebugLeds -> NoLedsC;
+  
+}
+
diff --git a/tos/chips/atm128/i2c/Atm128I2CMasterPacketP.nc b/tos/chips/atm128/i2c/Atm128I2CMasterPacketP.nc
new file mode 100644
index 00000000..aac369b7
--- /dev/null
+++ b/tos/chips/atm128/i2c/Atm128I2CMasterPacketP.nc
@@ -0,0 +1,391 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ * Copyright (c) 2009, Distributed Computing Group (DCG), ETH Zurich.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holders nor the names of
+ *     contributors may be used to endorse or promote products derived
+ *     from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA,
+ * OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * */
+  
+#include "Atm128I2C.h"
+
+/**
+ * This driver implements an interupt driven I2C Master controller 
+ * Hardware Abstraction Layer (HAL) to the ATmega128 
+ * two-wire-interface (TWI) hardware subsystem.
+ *
+ * @author Philip Levis
+ * @author Philipp Sommer, ETH Zurich, sommer@tik.ee.ethz.ch
+ * @author Roland Flury, ETH Zurich, rflury@tik.ee.ethz.ch
+ * @author Thomas Fahrni, ETH Zurich, tfahrni@ee.ethz.ch
+ * @author Richard Huber, ETH Zurich, rihuber@ee.ethz.ch
+ * @author Lars Schor, ETH Zurich, lschor@ee.ethz.ch
+ *
+ */
+
+generic module Atm128I2CMasterPacketP() {
+  provides interface AsyncStdControl;
+  provides interface I2CPacket<TI2CBasicAddr>;
+  provides interface Atm128I2C;
+  
+  uses interface HplAtm128I2CBus as I2C;
+  uses interface Leds as ReadDebugLeds;
+  uses interface Leds as WriteDebugLeds;
+}
+implementation {
+
+  enum {
+    I2C_OFF          = 0,
+    I2C_IDLE         = 1,
+    I2C_BUSY         = 2,      
+    I2C_ADDR         = 3,
+    I2C_DATA         = 4,
+    I2C_STARTING     = 5,
+    I2C_STOPPING     = 6,
+    I2C_SLAVE_ACK	 = 7
+  } atm128_i2c_state_t;
+
+  uint8_t state = I2C_OFF;
+  i2c_flags_t packetFlags; 
+  uint8_t* packetPtr;
+  uint8_t packetLen;
+  uint8_t index;
+  uint16_t packetAddr;
+  bool reading = FALSE;
+
+  void i2c_abort(error_t err) {
+    atomic {
+      // Cycle the I2C
+      call I2C.readCurrent();
+      call I2C.enableInterrupt(FALSE);
+      call I2C.enable(FALSE);
+      call I2C.sendCommand();
+      call I2C.readCurrent();
+      call I2C.enable(TRUE);
+      call I2C.sendCommand();
+      state = I2C_IDLE;
+      if (reading) {
+	signal I2CPacket.readDone(err, packetAddr, packetLen, packetPtr);
+      }
+      else {
+	signal I2CPacket.writeDone(err, packetAddr, packetLen, packetPtr);
+      }
+    }
+  }
+  
+  async command error_t AsyncStdControl.start() {
+    atomic {
+      if (state == I2C_OFF) {
+	call I2C.init(ATM128_I2C_EXTERNAL_PULLDOWN);
+	call I2C.readCurrent();
+	call I2C.enable(TRUE);
+	call I2C.enableInterrupt(FALSE);
+	call I2C.sendCommand();
+	state = I2C_IDLE;
+	return SUCCESS;
+      }
+      else {
+	return FAIL;
+      }
+    }
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    atomic {
+      if (state == I2C_IDLE) {
+	call I2C.readCurrent();
+	call I2C.enable(FALSE);
+	call I2C.enableInterrupt(FALSE);
+	call I2C.setInterruptPending(FALSE);
+	call I2C.sendCommand();
+	call I2C.off();
+	state = I2C_OFF;
+	return SUCCESS;
+      }
+      else {
+	return FAIL;
+      }
+    }
+  }
+
+  async command error_t I2CPacket.read(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* data) {
+    atomic {
+      if (state == I2C_IDLE) {
+	state = I2C_BUSY;
+      }
+      else if (state == I2C_OFF) {
+	return EOFF;
+      }
+      else {
+	return EBUSY;
+      }
+    }
+    /* This follows the procedure described on page 209 of the atmega128L
+     * data sheet. It is synchronous (does not handle interrupts).*/
+    atomic {
+      packetAddr = addr;
+      packetPtr = data;
+      packetLen = len;
+      packetFlags = flags;
+      index = 0;
+      reading = TRUE;
+    }
+    /* Clear interrupt pending, send the I2C start command and abort
+       if we're not in the start state.*/
+    call I2C.readCurrent();
+    atomic {
+      call I2C.enableInterrupt(TRUE);
+      call I2C.setInterruptPending(TRUE);
+      call I2C.enableAck(FALSE);
+      
+      if (flags & I2C_START) {
+        call I2C.setStart(TRUE);
+        state = I2C_STARTING;
+      }
+      else if (len > 1 || (len > 0 && flags & I2C_ACK_END)) {
+        call I2C.enableAck(TRUE);
+        state = I2C_DATA;
+      }
+      else if (len == 1) { // length is 1
+        state = I2C_DATA;
+      }
+      else if (flags & I2C_STOP) {
+        state = I2C_STOPPING;
+        call I2C.enableAck(FALSE);
+        call I2C.setStop(TRUE);
+      }
+      call I2C.sendCommand();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t I2CPacket.write(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* data) {
+    atomic {
+      if (state == I2C_IDLE) {
+	state = I2C_BUSY;
+      }
+      else if (state == I2C_OFF) {
+	return EOFF;
+      }
+      else {
+	return EBUSY;
+      }
+    }
+    /* This follows the procedure described on page 209 of the atmega128L
+     * data sheet. It is synchronous (does not handle interrupts).*/
+    atomic {
+      packetAddr = addr;
+      packetPtr = data;
+      packetLen = len;
+      packetFlags = flags;
+      index = 0;
+      reading = FALSE;
+    }
+    call I2C.readCurrent();
+    atomic {
+      call I2C.setInterruptPending(TRUE);
+      call I2C.enableAck(TRUE);
+      call I2C.enableInterrupt(TRUE);
+      
+      if (flags & I2C_START) {
+        call I2C.setStart(TRUE);
+	//	call WriteDebugLeds.led0On();
+        state = I2C_STARTING;
+      }
+      else if (len > 0) {
+        state = I2C_DATA;
+	call I2C.write(data[index]);
+      }
+      else if (flags & I2C_STOP) {
+        state = I2C_STOPPING;
+        call I2C.enableAck(FALSE);
+        call I2C.setStop(TRUE);
+      }
+      else { // A 0-length packet with no start and no stop....
+	state = I2C_IDLE;
+	return FAIL;
+      }
+      call I2C.sendCommand();
+    }
+    return SUCCESS;
+  }
+  
+  /**
+   * A command has been sent over the I2C.
+   * The diversity of I2C options and modes means that there are a
+   * plethora of cases to consider. To simplify reading the code,
+   * they're described here and the corresponding statements
+   * are only labelled with identifying comments.
+   *
+   * When reading:
+   *  R1) A start condition has been requested. This requires 
+   *      sending the start signal. When the interrupt comes in,
+   *      send the first byte of the packet. This driver
+   *      detects this condition by the START flag being set. 
+   *      A successful send of the start clears the local copy of
+   *      the flag. The driver does not distinguish between start
+   *      and repeated start.
+   *  R2) Sending the address byte with the read bit set.
+   *  R3) Sending the first byte of a two-byte address with the
+   *      read bit set. 
+   *  R4) Sending the second byte of a two-byte address.
+   *  R5) Reading any byte except the last byte of a packet.
+   *  R6) Reading the last byte of the packet, with ACK_END requested.
+   *  R7) Reading the last byte of the packet, with ACK_END cleared.
+   *  R8) Sending a stop condition.
+   */
+  async event void I2C.commandComplete() {
+    call I2C.readCurrent();
+    atomic {
+      if (state == I2C_SLAVE_ACK) {        
+        if (reading == TRUE) {        	
+        	state = I2C_DATA;
+        	call I2C.setInterruptPending(TRUE);
+        	call I2C.enableAck(TRUE);
+        	call I2C.sendCommand();
+        }                        	      	
+      } else if (state == I2C_DATA) {
+		
+		if (reading == TRUE) {
+			if (index < packetLen) {
+	    		packetPtr[index] = call I2C.read();
+	    		if (index == packetLen - 1 &&
+	    		    !(packetFlags & I2C_ACK_END)) { 
+          		  call I2C.enableAck(FALSE);
+        		}
+        		//state = I2C_SLAVE_ACK;
+      		}
+      		else {
+	    		call I2C.enableInterrupt(FALSE);
+	    		if (packetFlags & I2C_STOP) {
+	      			packetFlags &= ~I2C_STOP;
+	      			call I2C.setStop(TRUE);
+	      			call I2C.status();
+	    		}
+	    		else {
+	      			call I2C.setInterruptPending(FALSE);
+	    		}
+	    		
+	    		call I2C.sendCommand();
+	    		state = I2C_IDLE;
+	    		signal I2CPacket.readDone(SUCCESS, packetAddr, packetLen, packetPtr);
+	    		return;
+	  		}
+	  		index++;
+	  		call I2C.sendCommand();
+	  		return;
+        }
+        else { // Writing
+	  		if (index < packetLen) {
+	    		call I2C.write(packetPtr[index]);
+	    		index++;
+	    		call I2C.sendCommand();
+	  		}
+	  		else {
+	    		call I2C.enableInterrupt(FALSE);
+	    		if (packetFlags & I2C_STOP) {
+	      			packetFlags &= ~I2C_STOP;
+	      			call I2C.setStop(TRUE);
+	      			call WriteDebugLeds.led1On();
+	   			 }
+	    		else {
+	      			call I2C.setInterruptPending(FALSE);
+	    		}
+	    		call I2C.sendCommand();
+	    		state = I2C_IDLE;
+	    		call WriteDebugLeds.led2On();
+	    		signal I2CPacket.writeDone(SUCCESS, packetAddr, packetLen, packetPtr);
+	    		return;
+	  		}
+		}
+  	}
+    else if (state == I2C_STARTING) {
+		packetFlags &= ~I2C_START;
+		call I2C.setStart(FALSE);
+		if (call I2C.status() != ATM128_I2C_START &&
+		    call I2C.status() != ATM128_I2C_RSTART) {
+	  		if (reading) {
+	    		//call ReadDebugLeds.set(call I2C.status() >> 4);
+	  		}
+	  		//call ReadDebugLeds.led2On();
+	  		i2c_abort(FAIL);
+	  		return;
+		}
+		state = I2C_ADDR;
+		call I2C.enableAck(TRUE);
+      }
+      if (state == I2C_ADDR) {
+		if (reading == TRUE) {
+	  		call I2C.write(((packetAddr & 0x7f) << 1) | ATM128_I2C_SLA_READ);
+	  		state = I2C_SLAVE_ACK;
+	  		//state = I2C_DATA;
+		}
+		else {
+	  		call I2C.write(((packetAddr & 0x7f) << 1) | ATM128_I2C_SLA_WRITE);
+			state = I2C_DATA;
+		}
+	
+		call I2C.sendCommand();
+      }
+    }
+  }
+
+  async command void Atm128I2C.stop() {
+    atomic {
+      call I2C.readCurrent();
+      call I2C.enableInterrupt(FALSE);
+      call I2C.setStop(TRUE);
+      call I2C.setInterruptPending(TRUE);
+      call I2C.sendCommand();
+    }
+  }
+}
diff --git a/tos/chips/atm128/i2c/HplAtm128I2CBus.nc b/tos/chips/atm128/i2c/HplAtm128I2CBus.nc
new file mode 100644
index 00000000..8d4c7d99
--- /dev/null
+++ b/tos/chips/atm128/i2c/HplAtm128I2CBus.nc
@@ -0,0 +1,93 @@
+/// $Id: HplAtm128I2CBus.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128I2C.h"
+
+/**
+ * This driver implements direct I2C register access and a blocking master
+ * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its  
+ * two-wire-interface (TWI) hardware subsystem.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Philip Levis
+ *
+ * @version  $Id: HplAtm128I2CBus.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+ */
+interface HplAtm128I2CBus {
+
+  async command void init(bool hasExternalPulldown);
+  async command void off();
+  
+  async command uint8_t status();
+
+  async command void readCurrent();
+  async command void sendCommand();
+  async event void commandComplete();
+
+  
+  // Transaction interface
+  async command void setStart(bool on);
+  async command bool hasStart();
+  async command void setStop(bool on);   
+  async command bool hasStop();
+  async command void enableAck(bool enable);
+  async command bool hasAcks();
+  
+  async command void enableInterrupt(bool enable);
+  async command bool isInterruptEnabled();
+
+  // Examines actual register. Included so that code which needs
+  // to spin in TWINT does not have to read out cached copies.
+  async command bool isRealInterruptPending();
+
+  // Operates on cached copy (from readCurrent)
+  async command bool isInterruptPending(); 
+  
+  // NOTE: writing a 1 in the interrupt pending bit (TWINT) of the
+  // atm128 I2C control register (TWCR) will *clear* the bit if it
+  // is set. This is how you tell the I2C to take the next action,
+  // as when the bit is cleared it starts the next operation.
+  async command void setInterruptPending(bool on);
+
+  async command void enable(bool on);
+  async command bool isEnabled();
+  async command bool hasWriteCollided();
+  
+  // Data interface to TWDR
+  async command void write(uint8_t data);
+  async command uint8_t read();
+  
+  
+
+}
diff --git a/tos/chips/atm128/i2c/HplAtm128I2CBusC.nc b/tos/chips/atm128/i2c/HplAtm128I2CBusC.nc
new file mode 100644
index 00000000..326384c1
--- /dev/null
+++ b/tos/chips/atm128/i2c/HplAtm128I2CBusC.nc
@@ -0,0 +1,56 @@
+/// $Id: HplAtm128I2CBusC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ *  Copyright (c) 2004-2006 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This driver implements direct I2C register access and a blocking master
+ * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its  
+ * two-wire-interface (TWI) hardware subsystem.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Philip Levis
+ *
+ * @version    $Id: HplAtm128I2CBusC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+ */
+
+configuration HplAtm128I2CBusC {
+  provides interface HplAtm128I2CBus as I2C;
+}
+implementation {
+
+  components HplAtm128GeneralIOC as IO, HplAtm128I2CBusP as Bus;
+  
+  I2C         = Bus.I2C;
+  Bus.I2CClk  -> IO.PortD0;
+  Bus.I2CData -> IO.PortD1;
+}
diff --git a/tos/chips/atm128/i2c/HplAtm128I2CBusP.nc b/tos/chips/atm128/i2c/HplAtm128I2CBusP.nc
new file mode 100644
index 00000000..27b4e026
--- /dev/null
+++ b/tos/chips/atm128/i2c/HplAtm128I2CBusP.nc
@@ -0,0 +1,192 @@
+/// $Id: HplAtm128I2CBusP.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#define F_CPU       7372800
+
+#include "Atm128I2C.h"
+
+/**
+ * This driver implements direct I2C register access and a blocking master
+ * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its  
+ * two-wire-interface (TWI) hardware subsystem.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Philip Levis
+ *
+ * @version $Id: HplAtm128I2CBusP.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+ */
+module HplAtm128I2CBusP {
+  provides interface HplAtm128I2CBus as I2C;
+
+  uses {
+    interface GeneralIO as I2CClk;
+    interface GeneralIO as I2CData;
+  }
+}
+implementation {
+  uint8_t current;
+  
+  async command void I2C.init(bool hasExternalPulldown) {
+    // Set the internal pullup resisters
+    if (hasExternalPulldown) {
+      //call I2CClk.makeOutput();
+      //call I2CData.makeOutput();
+      call I2CClk.set();
+      call I2CData.set();
+    }
+    call I2CClk.makeInput();
+    call I2CData.makeInput();
+    TWSR = 0;                             // set prescaler == 0
+    TWBR = (F_CPU / 50000UL - 16) / 2;   // set I2C baud rate
+    //TWBR = 50;
+    TWAR = 0;
+    TWCR = 0;
+  }
+
+  async command void I2C.off() {
+    call I2CClk.clr();
+    call I2CData.clr();
+  }
+  
+  async command uint8_t I2C.status() {
+    return TWSR & 0xf8;
+  }
+
+  async command void I2C.sendCommand() {
+    atomic TWCR = current;
+  }
+
+  async command void I2C.readCurrent() {
+    atomic current = TWCR;
+  }
+  
+  /** Send START symbol and begin I2C bus transaction. */
+  async command void I2C.setStart(bool on) {
+    if (on) {
+      atomic SET_BIT(current, TWSTA);
+    }
+    else {
+      atomic CLR_BIT(current, TWSTA);
+    }
+  }
+  async command bool I2C.hasStart() {
+    return READ_BIT(current, TWSTA);
+  }
+
+  async command void I2C.setStop(bool on) {
+    if (on) {
+      atomic SET_BIT(current, TWSTO);
+    }
+    else {
+      atomic CLR_BIT(current, TWSTO);
+    }
+  }
+  async command bool I2C.hasStop() {
+    return READ_BIT(current, TWSTO);
+  }
+  
+  /** Write a byte to an I2C slave device. */
+  async command void I2C.write(uint8_t data) {
+    TWDR = data;
+  }
+
+  async command uint8_t I2C.read() {
+    return TWDR;
+  }
+
+  async command void I2C.enableAck(bool enable) {
+    if (enable) {
+      atomic SET_BIT(current, TWEA);
+    }
+    else {
+      atomic CLR_BIT(current, TWEA);
+    }
+  }
+  
+  async command bool I2C.hasAcks() {
+    return READ_BIT(current, TWEA);
+  }
+  
+  async command void I2C.enableInterrupt(bool enable) {
+    if (enable) {
+      atomic SET_BIT(current, TWIE);
+    }
+    else {
+      atomic CLR_BIT(current, TWIE);
+    }
+  }
+
+  async command bool I2C.isInterruptEnabled() {
+    return READ_BIT(current, TWIE);
+  }
+  
+  async command bool I2C.isRealInterruptPending() {
+    return READ_BIT(TWCR, TWINT);
+  }
+
+  async command bool I2C.isInterruptPending() {
+    return READ_BIT(current, TWINT);
+  }
+
+  async command void I2C.setInterruptPending(bool on) {
+    if (on) {
+      atomic SET_BIT(current, TWINT);
+    }
+    else {
+      atomic CLR_BIT(current, TWINT);
+    }
+  }
+  
+  async command void I2C.enable(bool enable) {
+    if (enable) {
+      atomic SET_BIT(current, TWEN);
+    }
+    else {
+      atomic CLR_BIT(current, TWEN);
+    }
+  }
+
+  async command bool I2C.isEnabled() {
+    return READ_BIT(current, TWEN);
+  }
+
+  async command bool I2C.hasWriteCollided() {
+    return READ_BIT(current, TWWC);
+  }
+
+  default async event void I2C.commandComplete() { }
+  AVR_ATOMIC_HANDLER(SIG_2WIRE_SERIAL) {
+    signal I2C.commandComplete();
+  }
+}
diff --git a/tos/chips/atm128/pins/Atm128GpioInterruptC.nc b/tos/chips/atm128/pins/Atm128GpioInterruptC.nc
new file mode 100644
index 00000000..c003ceb6
--- /dev/null
+++ b/tos/chips/atm128/pins/Atm128GpioInterruptC.nc
@@ -0,0 +1,43 @@
+/// $Id: Atm128GpioInterruptC.nc,v 1.6 2010-05-14 13:16:55 mmaroti Exp $
+
+/**
+ * @author Phil Levis
+ */
+generic module Atm128GpioInterruptC() @safe() {
+
+  provides interface GpioInterrupt as Interrupt;
+  uses interface HplAtm128Interrupt as Atm128Interrupt;
+
+}
+
+implementation {
+
+  error_t enable( bool rising ) {
+    atomic {
+      call Atm128Interrupt.disable();
+      call Atm128Interrupt.clear();
+      call Atm128Interrupt.edge( rising );
+      call Atm128Interrupt.enable();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t Interrupt.enableRisingEdge() {
+    return enable( TRUE );
+  }
+
+  async command error_t Interrupt.enableFallingEdge() {
+    return enable( FALSE );
+  }
+
+  async command error_t Interrupt.disable() {
+    call Atm128Interrupt.disable();
+    return SUCCESS;
+  }
+
+  async event void Atm128Interrupt.fired() {
+    signal Interrupt.fired();
+  }
+
+  default async event void Interrupt.fired() { }
+}
diff --git a/tos/chips/atm128/pins/Atm128Interrupt.h b/tos/chips/atm128/pins/Atm128Interrupt.h
new file mode 100644
index 00000000..a937d930
--- /dev/null
+++ b/tos/chips/atm128/pins/Atm128Interrupt.h
@@ -0,0 +1,65 @@
+// $Id: Atm128Interrupt.h,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Martin Turon <mturon@xbow.com>
+
+#ifndef _H_Atm128Interrupt_h
+#define _H_Atm128Interrupt_h
+
+//====================== External Interrupts ===============================
+
+/* Sleep modes */
+enum {
+  ATM128_IRQ_ON_LOW    = 0, 
+  ATM128_IRQ_ON_CHANGE = 1, 
+  ATM128_IRQ_ON_FALL   = 2, 
+  ATM128_IRQ_ON_RISE   = 3, 
+};
+
+/* Interrupt Control Register */
+typedef struct
+{
+  uint8_t isc0  : 2;  //!< Interrupt Sense Control
+  uint8_t isc1  : 2;  //!< Interrupt Sense Control
+  uint8_t isc2  : 2;  //!< Interrupt Sense Control
+  uint8_t isc3  : 2;  //!< Interrupt Sense Control
+} Atm128_InterruptCtrl_t;
+
+typedef Atm128_InterruptCtrl_t Atm128_EICRA_t;   //!< Ext Interrupt Control A
+typedef Atm128_InterruptCtrl_t Atm128_EICRB_t;   //!< Ext Interrupt Control B
+
+typedef uint8_t Atm128_EIMSK_t;         //!< External Interrupt Mask Register
+typedef uint8_t Atm128_EIFR_t;          //!< External Interrupt Flag Register
+
+#endif //_H_Atm128Interrupt_h
+
diff --git a/tos/chips/atm128/pins/Atm128InterruptC.nc b/tos/chips/atm128/pins/Atm128InterruptC.nc
new file mode 100644
index 00000000..5a1c3653
--- /dev/null
+++ b/tos/chips/atm128/pins/Atm128InterruptC.nc
@@ -0,0 +1,77 @@
+/// $Id: Atm128InterruptC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ * @author Martin Turon
+ */
+
+generic module Atm128InterruptC() {
+  provides interface Interrupt;
+  uses interface HplAtm128Interrupt;
+}
+implementation {
+  /**
+   * enable an edge interrupt on the Interrupt pin
+   */
+  async command error_t Interrupt.startWait(bool low_to_high) {
+    atomic {
+      call HplAtm128Interrupt.disable();
+      call HplAtm128Interrupt.clear();
+      call HplAtm128Interrupt.edge(low_to_high);
+      call HplAtm128Interrupt.enable();
+    }
+    return SUCCESS;
+  }
+
+  /**
+   * disables Interrupt interrupts
+   */
+  async command error_t Interrupt.disable() {
+    atomic {
+      call HplAtm128Interrupt.disable();
+      call HplAtm128Interrupt.clear();
+    }
+    return SUCCESS;
+  }
+
+  /**
+   * Event fired by lower level interrupt dispatch for Interrupt
+   */
+  async event void HplAtm128Interrupt.fired() {
+    call HplAtm128Interrupt.clear();
+    signal Interrupt.fired();
+  }
+
+  default async event void Interrupt.fired() { }
+}
diff --git a/tos/chips/atm128/pins/HplAtm128GeneralIOC.nc b/tos/chips/atm128/pins/HplAtm128GeneralIOC.nc
new file mode 100644
index 00000000..3641a360
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128GeneralIOC.nc
@@ -0,0 +1,196 @@
+/// $Id: HplAtm128GeneralIOC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <atm128hardware.h>
+
+/**
+ * Provide GeneralIO interfaces for all of the ATmega128's pins.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+configuration HplAtm128GeneralIOC
+{
+  // provides all the ports as raw ports
+  provides {
+    interface GeneralIO as PortA0;
+    interface GeneralIO as PortA1;
+    interface GeneralIO as PortA2;
+    interface GeneralIO as PortA3;
+    interface GeneralIO as PortA4;
+    interface GeneralIO as PortA5;
+    interface GeneralIO as PortA6;
+    interface GeneralIO as PortA7;
+
+    interface GeneralIO as PortB0;
+    interface GeneralIO as PortB1;
+    interface GeneralIO as PortB2;
+    interface GeneralIO as PortB3;
+    interface GeneralIO as PortB4;
+    interface GeneralIO as PortB5;
+    interface GeneralIO as PortB6;
+    interface GeneralIO as PortB7;
+
+    interface GeneralIO as PortC0;
+    interface GeneralIO as PortC1;
+    interface GeneralIO as PortC2;
+    interface GeneralIO as PortC3;
+    interface GeneralIO as PortC4;
+    interface GeneralIO as PortC5;
+    interface GeneralIO as PortC6;
+    interface GeneralIO as PortC7;
+
+    interface GeneralIO as PortD0;
+    interface GeneralIO as PortD1;
+    interface GeneralIO as PortD2;
+    interface GeneralIO as PortD3;
+    interface GeneralIO as PortD4;
+    interface GeneralIO as PortD5;
+    interface GeneralIO as PortD6;
+    interface GeneralIO as PortD7;
+
+    interface GeneralIO as PortE0;
+    interface GeneralIO as PortE1;
+    interface GeneralIO as PortE2;
+    interface GeneralIO as PortE3;
+    interface GeneralIO as PortE4;
+    interface GeneralIO as PortE5;
+    interface GeneralIO as PortE6;
+    interface GeneralIO as PortE7;
+
+    interface GeneralIO as PortF0;
+    interface GeneralIO as PortF1;
+    interface GeneralIO as PortF2;
+    interface GeneralIO as PortF3;
+    interface GeneralIO as PortF4;
+    interface GeneralIO as PortF5;
+    interface GeneralIO as PortF6;
+    interface GeneralIO as PortF7;
+
+    interface GeneralIO as PortG0;
+    interface GeneralIO as PortG1;
+    interface GeneralIO as PortG2;
+    interface GeneralIO as PortG3;
+    interface GeneralIO as PortG4;
+  }
+}
+
+implementation
+{
+  components 
+  new HplAtm128GeneralIOPortP((uint8_t)&PORTA, (uint8_t)&DDRA, (uint8_t)&PINA) as PortA,
+    new HplAtm128GeneralIOPortP((uint8_t)&PORTB, (uint8_t)&DDRB, (uint8_t)&PINB) as PortB,
+    new HplAtm128GeneralIOPortP((uint8_t)&PORTC, (uint8_t)&DDRC, (uint8_t)&PINC) as PortC,
+    new HplAtm128GeneralIOPortP((uint8_t)&PORTD, (uint8_t)&DDRD, (uint8_t)&PIND) as PortD,
+    new HplAtm128GeneralIOPortP((uint8_t)&PORTE, (uint8_t)&DDRE, (uint8_t)&PINE) as PortE,
+    new HplAtm128GeneralIOPortP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF) as PortF,
+
+  // PortF cannot use sbi, cbi
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 0) as F0,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 1) as F1,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 2) as F2,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 3) as F3,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 4) as F4,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 5) as F5,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 6) as F6,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTF, (uint8_t)&DDRF, (uint8_t)&PINF, 7) as F7,
+
+
+  // PortG only exposes 5 bits and cannot use sbi, cbi
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 0) as G0,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 1) as G1,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 2) as G2,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 3) as G3,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)&PORTG, (uint8_t)&DDRG, (uint8_t)&PING, 4) as G4
+    ;
+
+  PortA0 = PortA.Pin0;
+  PortA1 = PortA.Pin1;
+  PortA2 = PortA.Pin2;
+  PortA3 = PortA.Pin3;
+  PortA4 = PortA.Pin4;
+  PortA5 = PortA.Pin5;
+  PortA6 = PortA.Pin6;
+  PortA7 = PortA.Pin7;
+
+  PortB0 = PortB.Pin0;
+  PortB1 = PortB.Pin1;
+  PortB2 = PortB.Pin2;
+  PortB3 = PortB.Pin3;
+  PortB4 = PortB.Pin4;
+  PortB5 = PortB.Pin5;
+  PortB6 = PortB.Pin6;
+  PortB7 = PortB.Pin7;
+
+  PortC0 = PortC.Pin0;
+  PortC1 = PortC.Pin1;
+  PortC2 = PortC.Pin2;
+  PortC3 = PortC.Pin3;
+  PortC4 = PortC.Pin4;
+  PortC5 = PortC.Pin5;
+  PortC6 = PortC.Pin6;
+  PortC7 = PortC.Pin7;
+
+  PortD0 = PortD.Pin0;
+  PortD1 = PortD.Pin1;
+  PortD2 = PortD.Pin2;
+  PortD3 = PortD.Pin3;
+  PortD4 = PortD.Pin4;
+  PortD5 = PortD.Pin5;
+  PortD6 = PortD.Pin6;
+  PortD7 = PortD.Pin7;
+
+  PortE0 = PortE.Pin0;
+  PortE1 = PortE.Pin1;
+  PortE2 = PortE.Pin2;
+  PortE3 = PortE.Pin3;
+  PortE4 = PortE.Pin4;
+  PortE5 = PortE.Pin5;
+  PortE6 = PortE.Pin6;
+  PortE7 = PortE.Pin7;
+
+  PortF0 = PortF.Pin0;
+  PortF1 = PortF.Pin1;
+  PortF2 = PortF.Pin2;
+  PortF3 = PortF.Pin3;
+  PortF4 = PortF.Pin4;
+  PortF5 = PortF.Pin5;
+  PortF6 = PortF.Pin6;
+  PortF7 = PortF.Pin7;
+
+  PortG0 = G0;
+  PortG1 = G1;
+  PortG2 = G2;
+  PortG3 = G3;
+  PortG4 = G4;
+}
diff --git a/tos/chips/atm128/pins/HplAtm128GeneralIOPinP.nc b/tos/chips/atm128/pins/HplAtm128GeneralIOPinP.nc
new file mode 100644
index 00000000..d2abcb14
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128GeneralIOPinP.nc
@@ -0,0 +1,64 @@
+/// $Id: HplAtm128GeneralIOPinP.nc,v 1.8 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Generic pin access for pins mapped into I/O space (for which the sbi, cbi
+ * instructions give atomic updates). This can be used for ports A-E.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+generic module HplAtm128GeneralIOPinP (uint8_t port_addr, 
+				 uint8_t ddr_addr, 
+				 uint8_t pin_addr,
+				 uint8_t bit) @safe()
+{
+  provides interface GeneralIO as IO;
+}
+implementation
+{
+#define pin (*TCAST(volatile uint8_t * ONE, pin_addr))
+#define port (*TCAST(volatile uint8_t * ONE, port_addr))
+#define ddr (*TCAST(volatile uint8_t * ONE, ddr_addr))
+
+  inline async command bool IO.get()        { return READ_BIT (pin, bit); }
+  inline async command void IO.set()        { SET_BIT  (port, bit); }
+  inline async command void IO.clr()        { CLR_BIT  (port, bit); }
+  async command void IO.toggle()     { atomic FLIP_BIT (port, bit); }
+    
+  inline async command void IO.makeInput()  { CLR_BIT  (ddr, bit);  }
+  inline async command bool IO.isInput() { return !READ_BIT(ddr, bit); }
+  inline async command void IO.makeOutput() { SET_BIT  (ddr, bit);  }
+  inline async command bool IO.isOutput() { return READ_BIT(ddr, bit); }
+}
+
diff --git a/tos/chips/atm128/pins/HplAtm128GeneralIOPortP.nc b/tos/chips/atm128/pins/HplAtm128GeneralIOPortP.nc
new file mode 100644
index 00000000..a71838a7
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128GeneralIOPortP.nc
@@ -0,0 +1,74 @@
+/// $Id: HplAtm128GeneralIOPortP.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Generic component to expose a full 8-bit port of GPIO pins.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+generic configuration HplAtm128GeneralIOPortP (uint8_t port_addr, uint8_t ddr_addr, uint8_t pin_addr)
+{
+  // provides all the ports as raw ports
+  provides {
+    interface GeneralIO as Pin0;
+    interface GeneralIO as Pin1;
+    interface GeneralIO as Pin2;
+    interface GeneralIO as Pin3;
+    interface GeneralIO as Pin4;
+    interface GeneralIO as Pin5;
+    interface GeneralIO as Pin6;
+    interface GeneralIO as Pin7;
+  }
+}
+implementation
+{
+  components 
+  new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 0) as Bit0,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 1) as Bit1,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 2) as Bit2,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 3) as Bit3,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 4) as Bit4,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 5) as Bit5,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 6) as Bit6,
+    new HplAtm128GeneralIOPinP (port_addr, ddr_addr, pin_addr, 7) as Bit7;
+
+  Pin0 = Bit0;
+  Pin1 = Bit1;
+  Pin2 = Bit2;
+  Pin3 = Bit3;
+  Pin4 = Bit4;
+  Pin5 = Bit5;
+  Pin6 = Bit6;
+  Pin7 = Bit7;
+}
diff --git a/tos/chips/atm128/pins/HplAtm128GeneralIOSlowPinP.nc b/tos/chips/atm128/pins/HplAtm128GeneralIOSlowPinP.nc
new file mode 100644
index 00000000..1593bb0f
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128GeneralIOSlowPinP.nc
@@ -0,0 +1,64 @@
+/// $Id: HplAtm128GeneralIOSlowPinP.nc,v 1.8 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Generic pin access for pins not mapped into I/O space (for which the
+ * sbi, cbi instructions cannot be used). This can be used for ports F-G.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+generic module HplAtm128GeneralIOSlowPinP (uint8_t port_addr, 
+				     uint8_t ddr_addr, 
+				     uint8_t pin_addr,
+				     uint8_t bit) @safe()
+{
+  provides interface GeneralIO as IO;
+}
+implementation
+{
+#define pin (*TCAST(volatile uint8_t * ONE, pin_addr))
+#define port (*TCAST(volatile uint8_t * ONE, port_addr))
+#define ddr (*TCAST(volatile uint8_t * ONE, ddr_addr))
+
+  inline async command bool IO.get()        { return READ_BIT (pin, bit); }
+  inline async command void IO.set()        { atomic SET_BIT  (port, bit); }
+  inline async command void IO.clr()        { atomic CLR_BIT  (port, bit); }
+  inline async command void IO.toggle()     { atomic FLIP_BIT (port, bit); }
+    
+  inline async command void IO.makeInput()  { atomic CLR_BIT  (ddr, bit);  }
+  inline async command bool IO.isInput() { return !READ_BIT(ddr, bit); }
+  inline async command void IO.makeOutput() { atomic SET_BIT  (ddr, bit);  }
+  inline async command bool IO.isOutput() { return READ_BIT(ddr, bit); }
+}
diff --git a/tos/chips/atm128/pins/HplAtm128Interrupt.nc b/tos/chips/atm128/pins/HplAtm128Interrupt.nc
new file mode 100644
index 00000000..370ef14a
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128Interrupt.nc
@@ -0,0 +1,76 @@
+/// $Id: HplAtm128Interrupt.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to an Atmega128 external interrupt pin
+ *
+ * @author Joe Polastre
+ * @author Martin Turon
+ */
+
+interface HplAtm128Interrupt
+{
+  /** 
+   * Enables ATmega128 hardware interrupt on a particular port
+   */
+  async command void enable();
+
+  /** 
+   * Disables ATmega128 hardware interrupt on a particular port
+   */
+  async command void disable();
+
+  /** 
+   * Clears the ATmega128 Interrupt Pending Flag for a particular port
+   */
+  async command void clear();
+
+  /** 
+   * Gets the current value of the input voltage of a port
+   *
+   * @return TRUE if the pin is set high, FALSE if it is set low
+   */
+  async command bool getValue();
+
+  /** 
+   * Sets whether the edge should be high to low or low to high.
+   * @param TRUE if the interrupt should be triggered on a low to high
+   *        edge transition, false for interrupts on a high to low transition
+   */
+  async command void edge(bool low_to_high);
+
+  /**
+   * Signalled when an interrupt occurs on a port
+   */
+  async event void fired();
+}
diff --git a/tos/chips/atm128/pins/HplAtm128InterruptC.nc b/tos/chips/atm128/pins/HplAtm128InterruptC.nc
new file mode 100644
index 00000000..44ba54cc
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128InterruptC.nc
@@ -0,0 +1,90 @@
+/// $Id: HplAtm128InterruptC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <atm128hardware.h>
+
+/**
+ * Component providing access to all external interrupt pins on ATmega128.
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+configuration HplAtm128InterruptC
+{
+  // provides all the ports as raw ports
+  provides {
+    interface HplAtm128Interrupt as Int0;
+    interface HplAtm128Interrupt as Int1;
+    interface HplAtm128Interrupt as Int2;
+    interface HplAtm128Interrupt as Int3;
+    interface HplAtm128Interrupt as Int4;
+    interface HplAtm128Interrupt as Int5;
+    interface HplAtm128Interrupt as Int6;
+    interface HplAtm128Interrupt as Int7;
+  }
+}
+implementation
+{
+#define IRQ_PORT_D_PIN(bit) (uint8_t)&EICRA, ISC##bit##0, ISC##bit##1, bit
+#define IRQ_PORT_E_PIN(bit) (uint8_t)&EICRB, ISC##bit##0, ISC##bit##1, bit
+
+  components 
+    HplAtm128InterruptSigP as IrqVector,
+    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(0)) as IntPin0,
+    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(1)) as IntPin1,
+    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(2)) as IntPin2,
+    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(3)) as IntPin3,
+    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(4)) as IntPin4,
+    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(5)) as IntPin5,
+    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(6)) as IntPin6,
+    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(7)) as IntPin7;
+  
+  Int0 = IntPin0;
+  Int1 = IntPin1;
+  Int2 = IntPin2;
+  Int3 = IntPin3;
+  Int4 = IntPin4;
+  Int5 = IntPin5;
+  Int6 = IntPin6;
+  Int7 = IntPin7;
+
+  IntPin0.IrqSignal -> IrqVector.IntSig0;
+  IntPin1.IrqSignal -> IrqVector.IntSig1;
+  IntPin2.IrqSignal -> IrqVector.IntSig2;
+  IntPin3.IrqSignal -> IrqVector.IntSig3;
+  IntPin4.IrqSignal -> IrqVector.IntSig4;
+  IntPin5.IrqSignal -> IrqVector.IntSig5;
+  IntPin6.IrqSignal -> IrqVector.IntSig6;
+  IntPin7.IrqSignal -> IrqVector.IntSig7;
+
+}
+
diff --git a/tos/chips/atm128/pins/HplAtm128InterruptPinP.nc b/tos/chips/atm128/pins/HplAtm128InterruptPinP.nc
new file mode 100644
index 00000000..f3601457
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128InterruptPinP.nc
@@ -0,0 +1,73 @@
+/// $Id: HplAtm128InterruptPinP.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interrupt interface access for interrupt capable GPIO pins.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+generic module HplAtm128InterruptPinP (uint8_t ctrl_addr, 
+				 uint8_t edge0bit, 
+				 uint8_t edge1bit, 
+				 uint8_t bit) @safe()
+{
+  provides interface HplAtm128Interrupt as Irq;
+  uses interface HplAtm128InterruptSig as IrqSignal;
+}
+implementation
+{
+  inline async command bool Irq.getValue() { return (EIFR & (1 << bit)) != 0; }
+  inline async command void Irq.clear()    { EIFR = 1 << bit; }
+  inline async command void Irq.enable()   { EIMSK |= 1 << bit; }
+  inline async command void Irq.disable()  { EIMSK &= ~(1 << bit); }
+
+#define ctrl  (*TCAST(volatile uint8_t * ONE, ctrl_addr))
+
+  inline async command void Irq.edge(bool low_to_high) {
+    ctrl |= 1 << edge1bit; // use edge mode
+    // and select rising vs falling
+    if (low_to_high)
+      ctrl |= 1 << edge0bit;
+    else
+      ctrl &= ~(1 << edge0bit);
+  }
+
+  /** 
+   * Forward the external interrupt event.  This ties the statically
+   * allocated interrupt vector SIG_INTERRUPT##bit to a particular
+   * pin passed in via the generic component instantiation.
+   */
+  async event void IrqSignal.fired() { signal Irq.fired(); }
+
+  default async event void Irq.fired() { }
+}
diff --git a/tos/chips/atm128/pins/HplAtm128InterruptSig.nc b/tos/chips/atm128/pins/HplAtm128InterruptSig.nc
new file mode 100644
index 00000000..15de081e
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128InterruptSig.nc
@@ -0,0 +1,50 @@
+/// $Id: HplAtm128InterruptSig.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to an Atmega128 external interrupt pin that exposes just the
+ * interrupt vector routine for easy linking to generic components (see
+ * HplAtm128Interrupt for the full interface).
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @see HplAtm128Interrupt
+ */
+interface HplAtm128InterruptSig
+{
+  /**
+   * Signalled when an interrupt occurs on a pin
+   */
+  async event void fired();
+}
+
diff --git a/tos/chips/atm128/pins/HplAtm128InterruptSigP.nc b/tos/chips/atm128/pins/HplAtm128InterruptSigP.nc
new file mode 100644
index 00000000..52606115
--- /dev/null
+++ b/tos/chips/atm128/pins/HplAtm128InterruptSigP.nc
@@ -0,0 +1,93 @@
+/// $Id: HplAtm128InterruptSigP.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interrupt interface access for interrupt capable GPIO pins.
+ * Exposes just the interrupt vector routine for 
+ * easy linking to generic components.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+module HplAtm128InterruptSigP @safe()
+{
+  provides interface HplAtm128InterruptSig as IntSig0;
+  provides interface HplAtm128InterruptSig as IntSig1;
+  provides interface HplAtm128InterruptSig as IntSig2;
+  provides interface HplAtm128InterruptSig as IntSig3;
+  provides interface HplAtm128InterruptSig as IntSig4;
+  provides interface HplAtm128InterruptSig as IntSig5;
+  provides interface HplAtm128InterruptSig as IntSig6;
+  provides interface HplAtm128InterruptSig as IntSig7;
+}
+implementation
+{
+  default async event void IntSig0.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT0 ) {
+    signal IntSig0.fired();
+  }
+
+  default async event void IntSig1.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT1 ) {
+    signal IntSig1.fired();
+  }
+
+  default async event void IntSig2.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT2 ) {
+    signal IntSig2.fired();
+  }
+
+  default async event void IntSig3.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT3 ) {
+    signal IntSig3.fired();
+  }
+
+  default async event void IntSig4.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT4 ) {
+    signal IntSig4.fired();
+  }
+
+  default async event void IntSig5.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT5 ) {
+    signal IntSig5.fired();
+  }
+
+  default async event void IntSig6.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT6 ) {
+    signal IntSig6.fired();
+  }
+
+  default async event void IntSig7.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT7 ) {
+    signal IntSig7.fired();
+  }
+}
diff --git a/tos/chips/atm128/pins/sim/HplAtm128GeneralIOC.nc b/tos/chips/atm128/pins/sim/HplAtm128GeneralIOC.nc
new file mode 100644
index 00000000..265e24d3
--- /dev/null
+++ b/tos/chips/atm128/pins/sim/HplAtm128GeneralIOC.nc
@@ -0,0 +1,196 @@
+// $Id: HplAtm128GeneralIOC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/// @author Martin Turon <mturon@xbow.com>
+
+/**
+ * Provide GeneralIO interfaces for all of the ATmega128's pins.
+ */
+
+#include <atm128hardware.h>
+
+configuration HplAtm128GeneralIOC
+{
+  // provides all the ports as raw ports
+  provides {
+    interface GeneralIO as PortA0;
+    interface GeneralIO as PortA1;
+    interface GeneralIO as PortA2;
+    interface GeneralIO as PortA3;
+    interface GeneralIO as PortA4;
+    interface GeneralIO as PortA5;
+    interface GeneralIO as PortA6;
+    interface GeneralIO as PortA7;
+
+    interface GeneralIO as PortB0;
+    interface GeneralIO as PortB1;
+    interface GeneralIO as PortB2;
+    interface GeneralIO as PortB3;
+    interface GeneralIO as PortB4;
+    interface GeneralIO as PortB5;
+    interface GeneralIO as PortB6;
+    interface GeneralIO as PortB7;
+
+    interface GeneralIO as PortC0;
+    interface GeneralIO as PortC1;
+    interface GeneralIO as PortC2;
+    interface GeneralIO as PortC3;
+    interface GeneralIO as PortC4;
+    interface GeneralIO as PortC5;
+    interface GeneralIO as PortC6;
+    interface GeneralIO as PortC7;
+
+    interface GeneralIO as PortD0;
+    interface GeneralIO as PortD1;
+    interface GeneralIO as PortD2;
+    interface GeneralIO as PortD3;
+    interface GeneralIO as PortD4;
+    interface GeneralIO as PortD5;
+    interface GeneralIO as PortD6;
+    interface GeneralIO as PortD7;
+
+    interface GeneralIO as PortE0;
+    interface GeneralIO as PortE1;
+    interface GeneralIO as PortE2;
+    interface GeneralIO as PortE3;
+    interface GeneralIO as PortE4;
+    interface GeneralIO as PortE5;
+    interface GeneralIO as PortE6;
+    interface GeneralIO as PortE7;
+
+    interface GeneralIO as PortF0;
+    interface GeneralIO as PortF1;
+    interface GeneralIO as PortF2;
+    interface GeneralIO as PortF3;
+    interface GeneralIO as PortF4;
+    interface GeneralIO as PortF5;
+    interface GeneralIO as PortF6;
+    interface GeneralIO as PortF7;
+
+    interface GeneralIO as PortG0;
+    interface GeneralIO as PortG1;
+    interface GeneralIO as PortG2;
+    interface GeneralIO as PortG3;
+    interface GeneralIO as PortG4;
+  }
+}
+
+implementation
+{
+  components 
+  new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTA, (uint8_t)ATM128_DDRA, (uint8_t)ATM128_PINA) as PortA,
+    new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTB, (uint8_t)ATM128_DDRB, (uint8_t)ATM128_PINB) as PortB,
+    new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTC, (uint8_t)ATM128_DDRC, (uint8_t)ATM128_PINC) as PortC,
+    new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTD, (uint8_t)ATM128_DDRD, (uint8_t)ATM128_PIND) as PortD,
+    new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTE, (uint8_t)ATM128_DDRE, (uint8_t)ATM128_PINE) as PortE,
+    new HplAtm128GeneralIOPortP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF) as PortF,
+
+  // PortF cannot use sbi, cbi
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 0) as F0,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 1) as F1,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 2) as F2,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 3) as F3,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 4) as F4,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 5) as F5,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 6) as F6,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTF, (uint8_t)ATM128_DDRF, (uint8_t)ATM128_PINF, 7) as F7,
+
+
+  // PortG only exposes 5 bits and cannot use sbi, cbi
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 0) as G0,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 1) as G1,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 2) as G2,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 3) as G3,
+    new HplAtm128GeneralIOSlowPinP((uint8_t)ATM128_PORTG, (uint8_t)ATM128_DDRG, (uint8_t)ATM128_PING, 4) as G4
+    ;
+
+  PortA0 = PortA.Pin0;
+  PortA1 = PortA.Pin1;
+  PortA2 = PortA.Pin2;
+  PortA3 = PortA.Pin3;
+  PortA4 = PortA.Pin4;
+  PortA5 = PortA.Pin5;
+  PortA6 = PortA.Pin6;
+  PortA7 = PortA.Pin7;
+
+  PortB0 = PortB.Pin0;
+  PortB1 = PortB.Pin1;
+  PortB2 = PortB.Pin2;
+  PortB3 = PortB.Pin3;
+  PortB4 = PortB.Pin4;
+  PortB5 = PortB.Pin5;
+  PortB6 = PortB.Pin6;
+  PortB7 = PortB.Pin7;
+
+  PortC0 = PortC.Pin0;
+  PortC1 = PortC.Pin1;
+  PortC2 = PortC.Pin2;
+  PortC3 = PortC.Pin3;
+  PortC4 = PortC.Pin4;
+  PortC5 = PortC.Pin5;
+  PortC6 = PortC.Pin6;
+  PortC7 = PortC.Pin7;
+
+  PortD0 = PortD.Pin0;
+  PortD1 = PortD.Pin1;
+  PortD2 = PortD.Pin2;
+  PortD3 = PortD.Pin3;
+  PortD4 = PortD.Pin4;
+  PortD5 = PortD.Pin5;
+  PortD6 = PortD.Pin6;
+  PortD7 = PortD.Pin7;
+
+  PortE0 = PortE.Pin0;
+  PortE1 = PortE.Pin1;
+  PortE2 = PortE.Pin2;
+  PortE3 = PortE.Pin3;
+  PortE4 = PortE.Pin4;
+  PortE5 = PortE.Pin5;
+  PortE6 = PortE.Pin6;
+  PortE7 = PortE.Pin7;
+
+  PortF0 = PortF.Pin0;
+  PortF1 = PortF.Pin1;
+  PortF2 = PortF.Pin2;
+  PortF3 = PortF.Pin3;
+  PortF4 = PortF.Pin4;
+  PortF5 = PortF.Pin5;
+  PortF6 = PortF.Pin6;
+  PortF7 = PortF.Pin7;
+
+  PortG0 = G0;
+  PortG1 = G1;
+  PortG2 = G2;
+  PortG3 = G3;
+  PortG4 = G4;
+}
diff --git a/tos/chips/atm128/pins/sim/HplAtm128GeneralIOPinP.nc b/tos/chips/atm128/pins/sim/HplAtm128GeneralIOPinP.nc
new file mode 100644
index 00000000..8523beb3
--- /dev/null
+++ b/tos/chips/atm128/pins/sim/HplAtm128GeneralIOPinP.nc
@@ -0,0 +1,67 @@
+// $Id: HplAtm128GeneralIOPinP.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/// @author Martin Turon <mturon@xbow.com>
+/// @author David Gay <dgay@intel-research.net>
+
+/**
+ * Generic pin access for pins mapped into I/O space (for which the sbi, cbi
+ * instructions give atomic updates). This can be used for ports A-E.
+ */
+generic module HplAtm128GeneralIOPinP (uint8_t port_addr, 
+				 uint8_t ddr_addr, 
+				 uint8_t pin_addr,
+				 uint8_t bit)
+{
+  provides interface GeneralIO as IO;
+}
+implementation
+{
+#define pin  pin_addr
+#define port port_addr
+#define ddr  ddr_addr
+
+  inline async command bool IO.get()        { return READ_BIT (port, bit); }
+  inline async command void IO.set()        {
+    dbg("Pins", "Setting bit %i of port %i.\n", (int)bit, (int)port);
+    SET_BIT  (port, bit);
+  }
+  inline async command void IO.clr()        { CLR_BIT  (port, bit); }
+  inline async command void IO.toggle()     { atomic FLIP_BIT (port, bit); }
+    
+  inline async command void IO.makeInput()  { CLR_BIT  (ddr, bit);  }
+  inline async command void IO.makeOutput() { SET_BIT  (ddr, bit);  }
+  inline async command bool IO.isInput() { return !READ_BIT  (ddr, bit);  }
+  inline async command bool IO.isOutput() { return READ_BIT  (ddr, bit);  }
+}
+
diff --git a/tos/chips/atm128/sim/McuSleepC.nc b/tos/chips/atm128/sim/McuSleepC.nc
new file mode 100644
index 00000000..7ef1e146
--- /dev/null
+++ b/tos/chips/atm128/sim/McuSleepC.nc
@@ -0,0 +1,134 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * TOSSIM Implementation of TEP 112 (Microcontroller Power Management)
+ * for the Atmega128. It currently does nothing.
+ *
+ * <pre>
+ *  $Id: McuSleepC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
+ * </pre>
+ *
+ * @author Philip Levis
+ * @date   October 26, 2005
+ *
+ */
+
+module McuSleepC {
+  provides {
+    interface McuSleep;
+    interface McuPowerState;
+  }
+  uses {
+    interface McuPowerOverride;
+  }
+}
+implementation {
+  bool dirty = TRUE;
+  mcu_power_t powerState = ATM128_POWER_IDLE;
+
+  /* Note that the power values are maintained in an order
+   * based on their active components, NOT on their values.
+   * Look at atm128hardware.h and page 42 of the ATmeg128
+   * manual (figure 17).*/
+  // NOTE: This table should be in progmem.
+  const uint8_t atm128PowerBits[ATM128_POWER_DOWN + 1] = {
+    0,
+    (1 << SM0),
+    (1 << SM2) | (1 << SM1) | (1 << SM0),
+    (1 << SM1) | (1 << SM0),
+    (1 << SM2) | (1 << SM1),
+    (1 << SM1)};
+    
+  mcu_power_t getPowerState() {
+    uint8_t diff;
+    // Are external timers running?  
+    if (TIMSK & ~((1 << OCIE0) | ( 1 << TOIE0))) {
+      return ATM128_POWER_IDLE;
+    }
+    // SPI (Radio stack on mica/micaZ
+    else if (READ_BIT(SPCR, SPIE)) { 
+      return ATM128_POWER_IDLE;
+    }
+    // UARTs are active
+    else if (UCSR0B & ((1 << TXCIE) | (1 << RXCIE))) { // UART
+      return ATM128_POWER_IDLE;
+    }
+    else if (UCSR1B & ((1 << TXCIE) | (1 << RXCIE))) { // UART
+      return ATM128_POWER_IDLE;
+    }
+    // ADC is enbaled
+    else if (READ_BIT(ADCSR, ADEN)) { 
+      return ATM128_POWER_ADC_NR;
+    }
+    // How soon for the timer to go off?
+    else if (TIMSK & ((1<<OCIE0) | (1<<TOIE0))) {
+      diff = OCR0 - TCNT0;
+      if (diff < 16) 
+	return ATM128_POWER_IDLE;
+      return ATM128_POWER_SAVE;
+    }
+    else {
+      return ATM128_POWER_DOWN;
+    }
+  }
+  
+  void computePowerState() {
+    powerState = mcombine(getPowerState(),
+			  call McuPowerOverride.lowestState());
+  }
+  
+  async command void McuSleep.sleep() {
+    if (dirty) {
+      uint8_t temp;
+      computePowerState();
+      //dirty = 0;
+      temp = MCUCR;
+      temp &= 0xe3;
+      temp |= atm128PowerBits[powerState] | (1 << SE);
+      MCUCR = temp;
+    }
+    sei();
+    // All of memory may change at this point...
+    asm volatile ("sleep" : : : "memory");
+    cli();
+  }
+
+  async command void McuPowerState.update() {
+    atomic dirty = 1;
+  }
+
+ default async command mcu_power_t McuPowerOverride.lowestState() {
+   return ATM128_POWER_IDLE;
+ }
+
+}
diff --git a/tos/chips/atm128/sim/atm128_sim.h b/tos/chips/atm128/sim/atm128_sim.h
new file mode 100644
index 00000000..67201a6a
--- /dev/null
+++ b/tos/chips/atm128/sim/atm128_sim.h
@@ -0,0 +1,1303 @@
+#ifndef ATM128_SIM_H_INCLUDED
+#define ATM128_SIM_H_INCLUDED
+
+/*
+ * In normal avr code, the address and identifier of a register can be
+ * the same. In a parallel simulation, this runs into issues with C typing,
+ * as there are actually many copies of a register. So in TOSSIM the standard
+ * name (e.g., PINE) refers to the actual memory location of the register while
+ * ATM128_ (e.g., ATM128_PINE) refers to the register identifier.
+ *
+ */
+
+//uint8_t atm128RegFile[100][0xa0];
+
+#define _BV(bit) (1 << (bit))
+//#define __SFR_OFFSET 0x20
+
+#define _MMIO_BYTE(mem_addr) (*((volatile uint8_t *)(&atm128RegFile[sim_node()][mem_addr])))
+#define _MMIO_WORD(mem_addr) (*((volatile uint16_t *)(&atm128RegFile[sim_node()][mem_addr])))
+#define _SFR_MEM8(mem_addr) _MMIO_BYTE(mem_addr)
+#define _SFR_MEM16(mem_addr) _MMIO_WORD(mem_addr)
+#define _SFR_IO8(io_addr) _MMIO_BYTE((io_addr) )
+#define _SFR_IO16(io_addr) _MMIO_WORD((io_addr) )
+
+enum {
+/* Input Pins, Port F */
+  ATM128_PINF    = 0x00,
+
+/* Input Pins, Port E */
+  ATM128_PINE    = 0x01,
+
+/* Data Direction Register, Port E */
+  ATM128_DDRE    = 0x02,
+
+/* Data Register, Port E */
+  ATM128_PORTE   = 0x03,
+
+/* ADC Data Register */
+  ATM128_ADCW    = 0x04, /* for backwards compatibility */
+#ifndef __ASSEMBLER__
+  ATM128_ADC     = 0x04,
+#endif
+  ATM128_ADCL    = 0x04,
+  ATM128_ADCH    = 0x05,
+
+/* ADC Control and status register */
+  ATM128_ADCSR   = 0x06,
+  ATM128_ADCSRA  = 0x06, /* new name in datasheet (2467E-AVR-05/02) */
+
+/* ADC Multiplexer select */
+  ATM128_ADMUX   = 0x07,
+
+/* Analog Comparator Control and Status Register */
+  ATM128_ACSR    = 0x08,
+
+/* USART0 Baud Rate Register Low */
+  ATM128_UBRR0L  = 0x09,
+
+/* USART0 Control and Status Register B */
+  ATM128_UCSR0B  = 0x0A,
+
+/* USART0 Control and Status Register A */
+  ATM128_UCSR0A  = 0x0B,
+
+/* USART0 I/O Data Register */
+  ATM128_UDR0    = 0x0C,
+
+/* SPI Control Register */
+  ATM128_SPCR    = 0x0D,
+
+/* SPI Status Register */
+  ATM128_SPSR    = 0x0E,
+
+/* SPI I/O Data Register */
+  ATM128_SPDR    = 0x0F,
+
+/* Input Pins, Port D */
+  ATM128_PIND    = 0x10,
+
+/* Data Direction Register, Port D */
+  ATM128_DDRD    = 0x11,
+
+/* Data Register, Port D */
+  ATM128_PORTD   = 0x12,
+
+/* Input Pins, Port C */
+  ATM128_PINC    = 0x13,
+
+/* Data Direction Register, Port C */
+  ATM128_DDRC    = 0x14,
+
+/* Data Register, Port C */
+  ATM128_PORTC   = 0x15,
+
+/* Input Pins, Port B */
+  ATM128_PINB    = 0x16,
+
+/* Data Direction Register, Port B */
+  ATM128_DDRB    = 0x17,
+
+/* Data Register, Port B */
+  ATM128_PORTB   = 0x18,
+
+/* Input Pins, Port A */
+  ATM128_PINA    = 0x19,
+
+/* Data Direction Register, Port A */
+  ATM128_DDRA    = 0x1A,
+
+/* Data Register, Port A */
+  ATM128_PORTA   = 0x1B,
+
+/* 0x1C..0x1F EEPROM */
+
+/* Special Function I/O Register */
+  ATM128_SFIOR   = 0x20,
+
+/* Watchdog Timer Control Register */
+  ATM128_WDTCR   = 0x21,
+
+/* On-chip Debug Register */
+  ATM128_OCDR    = 0x22,
+
+/* Timer2 Output Compare Register */
+  ATM128_OCR2    = 0x23,
+
+/* Timer/Counter 2 */
+  ATM128_TCNT2   = 0x24,
+
+/* Timer/Counter 2 Control register */
+  ATM128_TCCR2   = 0x25,
+
+/* T/C 1 Input Capture Register */
+  ATM128_ICR1    = 0x26,
+  ATM128_ICR1L   = 0x26,
+  ATM128_ICR1H   = 0x27,
+
+/* Timer/Counter1 Output Compare Register B */
+  ATM128_OCR1B   = 0x28,
+  ATM128_OCR1BL  = 0x28,
+  ATM128_OCR1BH  = 0x29,
+
+/* Timer/Counter1 Output Compare Register A */
+  ATM128_OCR1A   = 0x2A,
+  ATM128_OCR1AL  = 0x2A,
+  ATM128_OCR1AH  = 0x2B,
+
+/* Timer/Counter 1 */
+  ATM128_TCNT1   = 0x2C,
+  ATM128_TCNT1L  = 0x2C,
+  ATM128_TCNT1H  = 0x2D,
+
+/* Timer/Counter 1 Control and Status Register */
+  ATM128_TCCR1B  = 0x2E,
+
+/* Timer/Counter 1 Control Register */
+  ATM128_TCCR1A  = 0x2F,
+
+/* Timer/Counter 0 Asynchronous Control & Status Register */
+  ATM128_ASSR    = 0x30,
+
+/* Output Compare Register 0 */
+  ATM128_OCR0    = 0x31,
+
+/* Timer/Counter 0 */
+  ATM128_TCNT0   = 0x32,
+
+/* Timer/Counter 0 Control Register */
+  ATM128_TCCR0   = 0x33,
+
+/* MCU Status Register */
+  ATM128_MCUSR   = 0x34,
+  ATM128_MCUCSR  = 0x34, /* new name in datasheet (2467E-AVR-05/02) */
+
+/* MCU general Control Register */
+  ATM128_MCUCR   = 0x35,
+
+/* Timer/Counter Interrupt Flag Register */
+  ATM128_TIFR    = 0x36,
+
+/* Timer/Counter Interrupt MaSK register */
+  ATM128_TIMSK   = 0x37,
+
+/* External Interrupt Flag Register */
+  ATM128_EIFR    = 0x38,
+
+/* External Interrupt MaSK register */
+  ATM128_EIMSK   = 0x39,
+
+/* External Interrupt Control Register B */
+  ATM128_EICRB   = 0x3A,
+
+/* RAM Page Z select register */
+  ATM128_RAMPZ   = 0x3B,
+
+/* XDIV Divide control register */
+  ATM128_XDIV    = 0x3C,
+
+/* 0x3D..0x3E SP */
+
+/* 0x3F SREG */
+  ATM128_SREG    = 0x3F,
+
+/* Extended I/O registers */
+
+/* Data Direction Register, Port F */
+  ATM128_DDRF    = 0x61,
+
+/* Data Register, Port F */
+  ATM128_PORTF   = 0x62,
+
+/* Input Pins, Port G */
+  ATM128_PING    = 0x63,
+
+/* Data Direction Register, Port G */
+  ATM128_DDRG    = 0x64,
+
+/* Data Register, Port G */
+  ATM128_PORTG   = 0x65,
+
+/* Store Program Memory Control and Status Register */
+  ATM128_SPMCR   = 0x68,
+  ATM128_SPMCSR  = 0x68, /* new name in datasheet (2467E-AVR-05/02) */
+
+/* External Interrupt Control Register A */
+  ATM128_EICRA   = 0x6A,
+
+/* External Memory Control Register B */
+  ATM128_XMCRB   = 0x6C,
+
+/* External Memory Control Register A */
+  ATM128_XMCRA   = 0x6D,
+
+/* Oscillator Calibration Register */
+  ATM128_OSCCAL  = 0x6F,
+
+/* 2-wire Serial Interface Bit Rate Register */
+  ATM128_TWBR    = 0x70,
+
+/* 2-wire Serial Interface Status Register */
+  ATM128_TWSR    = 0x71,
+
+/* 2-wire Serial Interface Address Register */
+  ATM128_TWAR    = 0x72,
+
+/* 2-wire Serial Interface Data Register */
+  ATM128_TWDR    = 0x73,
+
+/* 2-wire Serial Interface Control Register */
+  ATM128_TWCR    = 0x74,
+
+/* Time Counter 1 Output Compare Register C */
+  ATM128_OCR1C   = 0x78,
+  ATM128_OCR1CL  = 0x78,
+  ATM128_OCR1CH  = 0x79,
+
+/* Timer/Counter 1 Control Register C */
+  ATM128_TCCR1C  = 0x7A,
+
+/* Extended Timer Interrupt Flag Register */
+  ATM128_ETIFR   = 0x7C,
+
+/* Extended Timer Interrupt Mask Register */
+  ATM128_ETIMSK  = 0x7D,
+
+/* Timer/Counter 3 Input Capture Register */
+  ATM128_ICR3    = 0x80,
+  ATM128_ICR3L   = 0x80,
+  ATM128_ICR3H   = 0x81,
+
+/* Timer/Counter 3 Output Compare Register C */
+  ATM128_OCR3C   = 0x82,
+  ATM128_OCR3CL  = 0x82,
+  ATM128_OCR3CH  = 0x83,
+
+/* Timer/Counter 3 Output Compare Register B */
+  ATM128_OCR3B   = 0x84,
+  ATM128_OCR3BL  = 0x84,
+  ATM128_OCR3BH  = 0x85,
+
+/* Timer/Counter 3 Output Compare Register A */
+  ATM128_OCR3A   = 0x86,
+  ATM128_OCR3AL  = 0x86,
+  ATM128_OCR3AH  = 0x87,
+
+/* Timer/Counter 3 Counter Register */
+  ATM128_TCNT3   = 0x88,
+  ATM128_TCNT3L  = 0x88,
+  ATM128_TCNT3H  = 0x89,
+
+/* Timer/Counter 3 Control Register B */
+  ATM128_TCCR3B  = 0x8A,
+
+/* Timer/Counter 3 Control Register A */
+  ATM128_TCCR3A  = 0x8B,
+
+/* Timer/Counter 3 Control Register C */
+  ATM128_TCCR3C  = 0x8C,
+
+/* USART0 Baud Rate Register High */
+  ATM128_UBRR0H  = 0x90,
+
+/* USART0 Control and Status Register C */
+  ATM128_UCSR0C  = 0x95,
+
+/* USART1 Baud Rate Register High */
+  ATM128_UBRR1H  = 0x98,
+
+/* USART1 Baud Rate Register Low*/
+  ATM128_UBRR1L  = 0x99,
+
+/* USART1 Control and Status Register B */
+  ATM128_UCSR1B  = 0x9A,
+
+/* USART1 Control and Status Register A */
+  ATM128_UCSR1A  = 0x9B,
+
+/* USART1 I/O Data Register */
+  ATM128_UDR1    = 0x9C,
+
+/* USART1 Control and Status Register C */
+  ATM128_UCSR1C  = 0x9D,
+};
+
+/* Input Pins, Port F */
+#define PINF      _SFR_IO8(0x00)
+
+/* Input Pins, Port E */
+#define PINE      _SFR_IO8(0x01)
+
+/* Data Direction Register, Port E */
+#define DDRE      _SFR_IO8(0x02)
+
+/* Data Register, Port E */
+#define PORTE     _SFR_IO8(0x03)
+
+/* ADC Data Register */
+#define ADCW      _SFR_IO16(0x04) /* for backwards compatibility */
+#ifndef __ASSEMBLER__
+#define ADC       _SFR_IO16(0x04)
+#endif
+#define ADCL      _SFR_IO8(0x04)
+#define ADCH      _SFR_IO8(0x05)
+
+/* ADC Control and status register */
+#define ADCSR     _SFR_IO8(0x06)
+#define ADCSRA    _SFR_IO8(0x06) /* new name in datasheet (2467E-AVR-05/02) */
+
+/* ADC Multiplexer select */
+#define ADMUX     _SFR_IO8(0x07)
+
+/* Analog Comparator Control and Status Register */
+#define ACSR      _SFR_IO8(0x08)
+
+/* USART0 Baud Rate Register Low */
+#define UBRR0L    _SFR_IO8(0x09)
+
+/* USART0 Control and Status Register B */
+#define UCSR0B    _SFR_IO8(0x0A)
+
+/* USART0 Control and Status Register A */
+#define UCSR0A    _SFR_IO8(0x0B)
+
+/* USART0 I/O Data Register */
+#define UDR0      _SFR_IO8(0x0C)
+
+/* SPI Control Register */
+#define SPCR      _SFR_IO8(0x0D)
+
+/* SPI Status Register */
+#define SPSR      _SFR_IO8(0x0E)
+
+/* SPI I/O Data Register */
+#define SPDR      _SFR_IO8(0x0F)
+
+/* Input Pins, Port D */
+#define PIND      _SFR_IO8(0x10)
+
+/* Data Direction Register, Port D */
+#define DDRD      _SFR_IO8(0x11)
+
+/* Data Register, Port D */
+#define PORTD     _SFR_IO8(0x12)
+
+/* Input Pins, Port C */
+#define PINC      _SFR_IO8(0x13)
+
+/* Data Direction Register, Port C */
+#define DDRC      _SFR_IO8(0x14)
+
+/* Data Register, Port C */
+#define PORTC     _SFR_IO8(0x15)
+
+/* Input Pins, Port B */
+#define PINB      _SFR_IO8(0x16)
+
+/* Data Direction Register, Port B */
+#define DDRB      _SFR_IO8(0x17)
+
+/* Data Register, Port B */
+#define PORTB     _SFR_IO8(0x18)
+
+/* Input Pins, Port A */
+#define PINA      _SFR_IO8(0x19)
+
+/* Data Direction Register, Port A */
+#define DDRA      _SFR_IO8(0x1A)
+
+/* Data Register, Port A */
+#define PORTA     _SFR_IO8(0x1B)
+
+/* 0x1C..0x1F EEPROM */
+
+/* Special Function I/O Register */
+#define SFIOR     _SFR_IO8(0x20)
+
+/* Watchdog Timer Control Register */
+#define WDTCR     _SFR_IO8(0x21)
+
+/* On-chip Debug Register */
+#define OCDR      _SFR_IO8(0x22)
+
+/* Timer2 Output Compare Register */
+#define OCR2      _SFR_IO8(0x23)
+
+/* Timer/Counter 2 */
+#define TCNT2     _SFR_IO8(0x24)
+
+/* Timer/Counter 2 Control register */
+#define TCCR2     _SFR_IO8(0x25)
+
+/* T/C 1 Input Capture Register */
+#define ICR1      _SFR_IO16(0x26)
+#define ICR1L     _SFR_IO8(0x26)
+#define ICR1H     _SFR_IO8(0x27)
+
+/* Timer/Counter1 Output Compare Register B */
+#define OCR1B     _SFR_IO16(0x28)
+#define OCR1BL    _SFR_IO8(0x28)
+#define OCR1BH    _SFR_IO8(0x29)
+
+/* Timer/Counter1 Output Compare Register A */
+#define OCR1A     _SFR_IO16(0x2A)
+#define OCR1AL    _SFR_IO8(0x2A)
+#define OCR1AH    _SFR_IO8(0x2B)
+
+/* Timer/Counter 1 */
+#define TCNT1     _SFR_IO16(0x2C)
+#define TCNT1L    _SFR_IO8(0x2C)
+#define TCNT1H    _SFR_IO8(0x2D)
+
+/* Timer/Counter 1 Control and Status Register */
+#define TCCR1B    _SFR_IO8(0x2E)
+
+/* Timer/Counter 1 Control Register */
+#define TCCR1A    _SFR_IO8(0x2F)
+
+/* Timer/Counter 0 Asynchronous Control & Status Register */
+#define ASSR      _SFR_IO8(0x30)
+
+/* Output Compare Register 0 */
+#define OCR0      _SFR_IO8(0x31)
+
+/* Timer/Counter 0 */
+#define TCNT0     _SFR_IO8(0x32)
+
+/* Timer/Counter 0 Control Register */
+#define TCCR0     _SFR_IO8(0x33)
+
+/* MCU Status Register */
+#define MCUSR     _SFR_IO8(0x34)
+#define MCUCSR    _SFR_IO8(0x34) /* new name in datasheet (2467E-AVR-05/02) */
+
+/* MCU general Control Register */
+#define MCUCR     _SFR_IO8(0x35)
+
+/* Timer/Counter Interrupt Flag Register */
+#define TIFR      _SFR_IO8(0x36)
+
+/* Timer/Counter Interrupt MaSK register */
+#define TIMSK     _SFR_IO8(0x37)
+
+/* External Interrupt Flag Register */
+#define EIFR      _SFR_IO8(0x38)
+
+/* External Interrupt MaSK register */
+#define EIMSK     _SFR_IO8(0x39)
+
+/* External Interrupt Control Register B */
+#define EICRB     _SFR_IO8(0x3A)
+
+/* RAM Page Z select register */
+#define RAMPZ     _SFR_IO8(0x3B)
+
+/* XDIV Divide control register */
+#define XDIV      _SFR_IO8(0x3C)
+
+/* 0x3D..0x3E SP */
+
+/* 0x3F SREG */
+#define SREG      _SFR_IO8(0x3F)
+
+/* Extended I/O registers */
+
+/* Data Direction Register, Port F */
+#define DDRF      _SFR_MEM8(0x61)
+
+/* Data Register, Port F */
+#define PORTF     _SFR_MEM8(0x62)
+
+/* Input Pins, Port G */
+#define PING      _SFR_MEM8(0x63)
+
+/* Data Direction Register, Port G */
+#define DDRG      _SFR_MEM8(0x64)
+
+/* Data Register, Port G */
+#define PORTG     _SFR_MEM8(0x65)
+
+/* Store Program Memory Control and Status Register */
+#define SPMCR     _SFR_MEM8(0x68)
+#define SPMCSR    _SFR_MEM8(0x68) /* new name in datasheet (2467E-AVR-05/02) */
+
+/* External Interrupt Control Register A */
+#define EICRA     _SFR_MEM8(0x6A)
+
+/* External Memory Control Register B */
+#define XMCRB     _SFR_MEM8(0x6C)
+
+/* External Memory Control Register A */
+#define XMCRA     _SFR_MEM8(0x6D)
+
+/* Oscillator Calibration Register */
+#define OSCCAL    _SFR_MEM8(0x6F)
+
+/* 2-wire Serial Interface Bit Rate Register */
+#define TWBR      _SFR_MEM8(0x70)
+
+/* 2-wire Serial Interface Status Register */
+#define TWSR      _SFR_MEM8(0x71)
+
+/* 2-wire Serial Interface Address Register */
+#define TWAR      _SFR_MEM8(0x72)
+
+/* 2-wire Serial Interface Data Register */
+#define TWDR      _SFR_MEM8(0x73)
+
+/* 2-wire Serial Interface Control Register */
+#define TWCR      _SFR_MEM8(0x74)
+
+/* Time Counter 1 Output Compare Register C */
+#define OCR1C     _SFR_MEM16(0x78)
+#define OCR1CL    _SFR_MEM8(0x78)
+#define OCR1CH    _SFR_MEM8(0x79)
+
+/* Timer/Counter 1 Control Register C */
+#define TCCR1C    _SFR_MEM8(0x7A)
+
+/* Extended Timer Interrupt Flag Register */
+#define ETIFR     _SFR_MEM8(0x7C)
+
+/* Extended Timer Interrupt Mask Register */
+#define ETIMSK    _SFR_MEM8(0x7D)
+
+/* Timer/Counter 3 Input Capture Register */
+#define ICR3      _SFR_MEM16(0x80)
+#define ICR3L     _SFR_MEM8(0x80)
+#define ICR3H     _SFR_MEM8(0x81)
+
+/* Timer/Counter 3 Output Compare Register C */
+#define OCR3C     _SFR_MEM16(0x82)
+#define OCR3CL    _SFR_MEM8(0x82)
+#define OCR3CH    _SFR_MEM8(0x83)
+
+/* Timer/Counter 3 Output Compare Register B */
+#define OCR3B     _SFR_MEM16(0x84)
+#define OCR3BL    _SFR_MEM8(0x84)
+#define OCR3BH    _SFR_MEM8(0x85)
+
+/* Timer/Counter 3 Output Compare Register A */
+#define OCR3A     _SFR_MEM16(0x86)
+#define OCR3AL    _SFR_MEM8(0x86)
+#define OCR3AH    _SFR_MEM8(0x87)
+
+/* Timer/Counter 3 Counter Register */
+#define TCNT3     _SFR_MEM16(0x88)
+#define TCNT3L    _SFR_MEM8(0x88)
+#define TCNT3H    _SFR_MEM8(0x89)
+
+/* Timer/Counter 3 Control Register B */
+#define TCCR3B    _SFR_MEM8(0x8A)
+
+/* Timer/Counter 3 Control Register A */
+#define TCCR3A    _SFR_MEM8(0x8B)
+
+/* Timer/Counter 3 Control Register C */
+#define TCCR3C    _SFR_MEM8(0x8C)
+
+/* USART0 Baud Rate Register High */
+#define UBRR0H    _SFR_MEM8(0x90)
+
+/* USART0 Control and Status Register C */
+#define UCSR0C    _SFR_MEM8(0x95)
+
+/* USART1 Baud Rate Register High */
+#define UBRR1H    _SFR_MEM8(0x98)
+
+/* USART1 Baud Rate Register Low*/
+#define UBRR1L    _SFR_MEM8(0x99)
+
+/* USART1 Control and Status Register B */
+#define UCSR1B    _SFR_MEM8(0x9A)
+
+/* USART1 Control and Status Register A */
+#define UCSR1A    _SFR_MEM8(0x9B)
+
+/* USART1 I/O Data Register */
+#define UDR1      _SFR_MEM8(0x9C)
+
+/* USART1 Control and Status Register C */
+#define UCSR1C    _SFR_MEM8(0x9D)
+
+/* Interrupt vectors */
+
+#define _VECTOR(x) INTERRUPT_##x
+
+#define SIG_INTERRUPT0          _VECTOR(1)
+#define SIG_INTERRUPT1          _VECTOR(2)
+#define SIG_INTERRUPT2          _VECTOR(3)
+#define SIG_INTERRUPT3          _VECTOR(4)
+#define SIG_INTERRUPT4          _VECTOR(5)
+#define SIG_INTERRUPT5          _VECTOR(6)
+#define SIG_INTERRUPT6          _VECTOR(7)
+#define SIG_INTERRUPT7          _VECTOR(8)
+#define SIG_OUTPUT_COMPARE2     _VECTOR(9)
+#define SIG_OVERFLOW2           _VECTOR(10)
+#define SIG_INPUT_CAPTURE1      _VECTOR(11)
+#define SIG_OUTPUT_COMPARE1A    _VECTOR(12)
+#define SIG_OUTPUT_COMPARE1B    _VECTOR(13)
+#define SIG_OVERFLOW1           _VECTOR(14)
+#define SIG_OUTPUT_COMPARE0     _VECTOR(15)
+#define SIG_OVERFLOW0           _VECTOR(16)
+#define SIG_SPI                 _VECTOR(17)
+#define SIG_USART0_RECV         _VECTOR(18)
+#define SIG_UART0_RECV          _VECTOR(18) /* Keep for compatibility */
+#define SIG_USART0_DATA         _VECTOR(19)
+#define SIG_UART0_DATA          _VECTOR(19) /* Keep for compatibility */
+#define SIG_USART0_TRANS        _VECTOR(20)
+#define SIG_UART0_TRANS         _VECTOR(20) /* Keep for compatibility */
+#define SIG_ADC                 _VECTOR(21)
+#define SIG_EEPROM_READY        _VECTOR(22)
+#define SIG_COMPARATOR          _VECTOR(23)
+#define SIG_OUTPUT_COMPARE1C    _VECTOR(24)
+#define SIG_INPUT_CAPTURE3      _VECTOR(25)
+#define SIG_OUTPUT_COMPARE3A    _VECTOR(26)
+#define SIG_OUTPUT_COMPARE3B    _VECTOR(27)
+#define SIG_OUTPUT_COMPARE3C    _VECTOR(28)
+#define SIG_OVERFLOW3           _VECTOR(29)
+#define SIG_USART1_RECV         _VECTOR(30)
+#define SIG_UART1_RECV          _VECTOR(30) /* Keep for compatibility */
+#define SIG_USART1_DATA         _VECTOR(31)
+#define SIG_UART1_DATA          _VECTOR(31) /* Keep for compatibility */
+#define SIG_USART1_TRANS        _VECTOR(32)
+#define SIG_UART1_TRANS         _VECTOR(32) /* Keep for compatibility */
+#define SIG_2WIRE_SERIAL        _VECTOR(33)
+#define SIG_SPM_READY           _VECTOR(34)
+
+#define _VECTORS_SIZE 140
+
+/*
+   The Register Bit names are represented by their bit number (0-7).
+*/
+enum {
+/* 2-wire Control Register - TWCR */
+  TWINT  = 7,
+  TWEA   = 6,
+  TWSTA  = 5,
+  TWSTO  = 4,
+  TWWC   = 3,
+  TWEN   = 2,
+  TWIE   = 0,
+
+/* 2-wire Address Register - TWAR */
+  TWA6   = 7,
+  TWA5   = 6,
+  TWA4   = 5,
+  TWA3   = 4,
+  TWA2   = 3,
+  TWA1   = 2,
+  TWA0   = 1,
+  TWGCE  = 0,
+
+/* 2-wire Status Register - TWSR */
+  TWS7   = 7,
+  TWS6   = 6,
+  TWS5   = 5,
+  TWS4   = 4,
+  TWS3   = 3,
+  TWPS1  = 1,
+  TWPS0  = 0,
+
+/* External Memory Control Register A - XMCRA */
+  SRL2   = 6,
+  SRL1   = 5,
+  SRL0   = 4,
+  SRW01  = 3,
+  SRW00  = 2,
+  SRW11  = 1,
+
+/* External Memory Control Register B - XMCRA */
+  XMBK   = 7,
+  XMM2   = 2,
+  XMM1   = 1,
+  XMM0   = 0,
+
+/* XDIV Divide control register - XDIV */
+  XDIVEN = 7,
+  XDIV6  = 6,
+  XDIV5  = 5,
+  XDIV4  = 4,
+  XDIV3  = 3,
+  XDIV2  = 2,
+  XDIV1  = 1,
+  XDIV0  = 0,
+
+/* RAM Page Z select register - RAMPZ */
+  RAMPZ0= 0,
+
+/* External Interrupt Control Register A - EICRA */
+  ISC31  = 7,
+  ISC30  = 6,
+  ISC21  = 5,
+  ISC20  = 4,
+  ISC11  = 3,
+  ISC10  = 2,
+  ISC01  = 1,
+  ISC00  = 0,
+
+/* External Interrupt Control Register B - EICRB */
+  ISC71  = 7,
+  ISC70  = 6,
+  ISC61  = 5,
+  ISC60  = 4,
+  ISC51  = 3,
+  ISC50  = 2,
+  ISC41  = 1,
+  ISC40  = 0,
+
+/* Store Program Memory Control Register - SPMCSR, SPMCR */
+  SPMIE  = 7,
+  RWWSB  = 6,
+  RWWSRE = 4,
+  BLBSET = 3,
+  PGWRT  = 2,
+  PGERS  = 1,
+  SPMEN  = 0,
+
+/* External Interrupt MaSK register - EIMSK */
+  INT7   = 7,
+  INT6   = 6,
+  INT5   = 5,
+  INT4   = 4,
+  INT3   = 3,
+  INT2   = 2,
+  INT1   = 1,
+  INT0   = 0,
+
+/* External Interrupt Flag Register - EIFR */
+  INTF7  = 7,
+  INTF6  = 6,
+  INTF5  = 5,
+  INTF4  = 4,
+  INTF3  = 3,
+  INTF2  = 2,
+  INTF1  = 1,
+  INTF0  = 0,
+
+/* Timer/Counter Interrupt MaSK register - TIMSK */
+  OCIE2  = 7,
+  TOIE2  = 6,
+  TICIE1 = 5,
+  OCIE1A = 4,
+  OCIE1B = 3,
+  TOIE1  = 2,
+  OCIE0  = 1,
+  TOIE0  = 0,
+
+/* Timer/Counter Interrupt Flag Register - TIFR */
+  OCF2   = 7,
+  TOV2   = 6,
+  ICF1   = 5,
+  OCF1A  = 4,
+  OCF1B  = 3,
+  TOV1   = 2,
+  OCF0   = 1,
+  TOV0   = 0,
+
+/* Extended Timer Interrupt MaSK register - ETIMSK */
+  TICIE3 = 5,
+  OCIE3A = 4,
+  OCIE3B = 3,
+  TOIE3  = 2,
+  OCIE3C = 1,
+  OCIE1C = 0,
+
+/* Extended Timer Interrupt Flag Register - ETIFR */
+  ICF3  =  5,
+  OCF3A =  4,
+  OCF3B =  3,
+  TOV3  =  2,
+  OCF3C =  1,
+  OCF1C =  0,
+
+/* MCU general Control Register - MCUCR */
+  SRE   =  7,
+  SRW   =  6,
+  SRW10 =  6,      /* new name in datasheet (2467E-AVR-05/02) */
+  SE    =  5,
+  SM1   =  4,
+  SM0   =  3,
+  SM2   =  2,
+  IVSEL =  1,
+  IVCE  =  0,
+
+/* MCU Status Register - MCUSR, MCUCSR */
+  JTD  =   7,
+  JTRF =   4,
+  WDRF =   3,
+  BORF =   2,
+  EXTRF=   1,
+  PORF =   0,
+
+/* Timer/Counter Control Register (generic) */
+  FOC   =  7,
+  WGM0  =  6,
+  COM1  =  5,
+  COM0  =  4,
+  WGM1  =  3,
+  CS2   =  2,
+  CS1   =  1,
+  CS0   =  0,
+
+/* Timer/Counter 0 Control Register - TCCR0 */
+  FOC0  =  7,
+  WGM00 =  6,
+  COM01 =  5,
+  COM00 =  4,
+  WGM01 =  3,
+  CS02  =  2,
+  CS01  =  1,
+  CS00  =  0,
+
+/* Timer/Counter 2 Control Register - TCCR2 */
+  FOC2   = 7,
+  WGM20  = 6,
+  COM21  = 5,
+  COM20  = 4,
+  WGM21  = 3,
+  CS22   = 2,
+  CS21   = 1,
+  CS20   = 0,
+
+/* Timer/Counter 0 Asynchronous Control & Status Register - ASSR */
+  AS0    = 3,
+  TCN0UB = 2,
+  OCR0UB = 1,
+  TCR0UB = 0,
+  
+/* Timer/Counter Control Register A (generic) */
+  COMA1 =  7,
+  COMA0 =  6,
+  COMB1 =  5,
+  COMB0 =  4,
+  COMC1 =  3,
+  COMC0 =  2,
+  WGMA1 =  1,
+  WGMA0 =  0,
+
+/* Timer/Counter 1 Control and Status Register A - TCCR1A */
+  COM1A1=  7,
+  COM1A0=  6,
+  COM1B1=  5,
+  COM1B0=  4,
+  COM1C1=  3,
+  COM1C0=  2,
+  WGM11 =  1,
+  WGM10 =  0,
+
+/* Timer/Counter 3 Control and Status Register A - TCCR3A */
+  COM3A1=  7,
+  COM3A0=  6,
+  COM3B1=  5,
+  COM3B0=  4,
+  COM3C1=  3,
+  COM3C0=  2,
+  WGM31 =  1,
+  WGM30 =  0,
+
+/* Timer/Counter Control and Status Register B (generic) */
+  ICNC  =  7,
+  ICES  =  6,
+  WGMB3 =  4,
+  WGMB2 =  3,
+  CSB2  =  2,
+  CSB1  =  1,
+  CSB0  =  0,
+
+/* Timer/Counter 1 Control and Status Register B - TCCR1B */
+  ICNC1 =  7,
+  ICES1 =  6,
+  WGM13 =  4,
+  WGM12 =  3,
+  CS12  =  2,
+  CS11  =  1,
+  CS10  =  0,
+
+/* Timer/Counter 3 Control and Status Register B - TCCR3B */
+  ICNC3 =  7,
+  ICES3 =  6,
+  WGM33 =  4,
+  WGM32 =  3,
+  CS32  =  2,
+  CS31  =  1,
+  CS30  =  0,
+
+/* Timer/Counter Control Register C (generic) */
+  FOCA  =  7,
+  FOCB  =  6,
+  FOCC  =  5,
+
+/* Timer/Counter 3 Control Register C - TCCR3C */
+  FOC3A =  7,
+  FOC3B =  6,
+  FOC3C =  5,
+
+/* Timer/Counter 1 Control Register C - TCCR1C */
+  FOC1A =  7,
+  FOC1B =  6,
+  FOC1C =  5,
+
+/* On-chip Debug Register - OCDR */
+  IDRD  =  7,
+  OCDR7 =  7,
+  OCDR6 =  6,
+  OCDR5 =  5,
+  OCDR4 =  4,
+  OCDR3 =  3,
+  OCDR2 =  2,
+  OCDR1 =  1,
+  OCDR0 =  0,
+  
+/* Watchdog Timer Control Register - WDTCR */
+  WDCE  =  4,
+  WDE   =  3,
+  WDP2  =  2,
+  WDP1  =  1,
+  WDP0  =  0,
+
+/* Special Function I/O Register - SFIOR */
+  TSM   =  7,
+  ADHSM =  4,
+  ACME  =  3,
+  PUD   =  2,
+  PSR0  =  1,
+  PSR321=  0,
+
+/* SPI Status Register - SPSR */
+  SPIF  =  7,
+  WCOL  =  6,
+  SPI2X =  0,
+
+/* SPI Control Register - SPCR */
+  SPIE   = 7,
+  SPE    = 6,
+  DORD   = 5,
+  MSTR   = 4,
+  CPOL   = 3,
+  CPHA   = 2,
+  SPR1   = 1,
+  SPR0   = 0,
+
+/* USART Register C (generic) */
+  UMSEL  = 6,
+  UPM1   = 5,
+  UPM0   = 4,
+  USBS   = 3,
+  UCSZ1  = 2,
+  UCSZ0  = 1,
+  UCPOL  = 0,
+
+/* USART1 Register C - UCSR1C */
+  UMSEL1 = 6,
+  UPM11  = 5,
+  UPM10  = 4,
+  USBS1  = 3,
+  UCSZ11 = 2,
+  UCSZ10 = 1,
+  UCPOL1 = 0,
+
+/* USART0 Register C - UCSR0C */
+  UMSEL0 = 6,
+  UPM01  = 5,
+  UPM00  = 4,
+  USBS0  = 3,
+  UCSZ01 = 2,
+  UCSZ00 = 1,
+  UCPOL0 = 0,
+
+/* USART Status Register A (generic) */
+  RXC   =  7,
+  TXC   =  6,
+  UDRE  =  5,
+  FE    =  4,
+  DOR   =  3,
+  UPE   =  2,
+  U2X   =  1,
+  MPCM  =  0,
+
+/* USART1 Status Register A - UCSR1A */
+  RXC1  =  7,
+  TXC1  =  6,
+  UDRE1 =  5,
+  FE1   =  4,
+  DOR1  =  3,
+  UPE1  =  2,
+  U2X1  =  1,
+  MPCM1 =  0,
+
+/* USART0 Status Register A - UCSR0A */
+  RXC0  =  7,
+  TXC0  =  6,
+  UDRE0 =  5,
+  FE0   =  4,
+  DOR0  =  3,
+  UPE0  =  2,
+  U2X0  =  1,
+  MPCM0 =  0,
+
+/* USART Control Register B (generic) */
+  RXCIE =  7,
+  TXCIE =  6,
+  UDRIE =  5,
+  RXEN  =  4,
+  TXEN  =  3,
+  UCSZ  =  2,
+  UCSZ2 =  2,      /* new name in datasheet (2467E-AVR-05/02) */
+  RXB8  =  1,
+  TXB8  =  0,
+
+/* USART1 Control Register B - UCSR1B */
+  RXCIE1 = 7,
+  TXCIE1 = 6,
+  UDRIE1 = 5,
+  RXEN1  = 4,
+  TXEN1  = 3,
+  UCSZ12 = 2,
+  RXB81  = 1,
+  TXB81  = 0,
+
+/* USART0 Control Register B - UCSR0B */
+  RXCIE0 = 7,
+  TXCIE0 = 6,
+  UDRIE0 = 5,
+  RXEN0  = 4,
+  TXEN0  = 3,
+  UCSZ02 = 2,
+  RXB80  = 1,
+  TXB80  = 0,
+
+/* Analog Comparator Control and Status Register - ACSR */
+  ACD    = 7,
+  ACBG   = 6,
+  ACO    = 5,
+  ACI    = 4,
+  ACIE   = 3,
+  ACIC   = 2,
+  ACIS1  = 1,
+  ACIS0  = 0,
+
+/* ADC Control and status register - ADCSRA */
+  ADEN  =  7,
+  ADSC  =  6,
+  ADFR  =  5,
+  ADIF  =  4,
+  ADIE  =  3,
+  ADPS2 =  2,
+  ADPS1 =  1,
+  ADPS0 =  0,
+
+/* ADC Multiplexer select - ADMUX */
+  REFS1 =  7,
+  REFS0 =  6,
+  ADLAR =  5,
+  MUX4  =  4,
+  MUX3  =  3,
+  MUX2  =  2,
+  MUX1  =  1,
+  MUX0  =  0,
+
+/* Port A Data Register - PORTA */
+  PA7 = 7,
+  PA6 = 6,
+  PA5 = 5,
+  PA4 = 4,
+  PA3 = 3,
+  PA2 = 2,
+  PA1 = 1,
+  PA0 = 0,
+
+/* Port A Data Direction Register - DDRA */
+  DDA7 =   7,
+  DDA6 =   6,
+  DDA5 =   5,
+  DDA4 =   4,
+  DDA3 =   3,
+  DDA2 =   2,
+  DDA1 =   1,
+  DDA0 =   0,
+
+/* Port A Input Pins - PINA */
+  PINA7 =  7,
+  PINA6 =  6,
+  PINA5 =  5,
+  PINA4 =  4,
+  PINA3 =  3,
+  PINA2 =  2,
+  PINA1 =  1,
+  PINA0 =  0,
+
+/* Port B Data Register - PORTB */
+  PB7 = 7,
+  PB6 = 6,
+  PB5 = 5,
+  PB4 = 4,
+  PB3 = 3,
+  PB2 = 2,
+  PB1 = 1,
+  PB0 = 0,
+
+/* Port B Data Direction Register - DDRB */
+  DDB7 =   7,
+  DDB6 =   6,
+  DDB5 =   5,
+  DDB4 =   4,
+  DDB3 =   3,
+  DDB2 =   2,
+  DDB1 =   1,
+  DDB0 =   0,
+
+/* Port B Input Pins - PINB */
+  PINB7 =  7,
+  PINB6 =  6,
+  PINB5 =  5,
+  PINB4 =  4,
+  PINB3 =  3,
+  PINB2 =  2,
+  PINB1 =  1,
+  PINB0 =  0,
+
+/* Port C Data Register - PORTC */
+  PC7 = 7,
+  PC6 = 6,
+  PC5 = 5,
+  PC4 = 4,
+  PC3 = 3,
+  PC2 = 2,
+  PC1 = 1,
+  PC0 = 0,
+
+/* Port C Data Direction Register - DDRC */
+  DDC7 =   7,
+  DDC6 =   6,
+  DDC5 =   5,
+  DDC4 =   4,
+  DDC3 =   3,
+  DDC2 =   2,
+  DDC1 =   1,
+  DDC0 =   0,
+
+/* Port C Input Pins - PINC */
+  PINC7=   7,
+  PINC6=   6,
+  PINC5 =  5,
+  PINC4 =  4,
+  PINC3 =  3,
+  PINC2 =  2,
+  PINC1 =  1,
+  PINC0 =  0,
+
+/* Port D Data Register - PORTD */
+  PD7 = 7,
+  PD6 = 6,
+  PD5 = 5,
+  PD4 = 4,
+  PD3 = 3,
+  PD2 = 2,
+  PD1 = 1,
+  PD0 = 0,
+
+/* Port D Data Direction Register - DDRD */
+  DDD7 =   7,
+  DDD6 =   6,
+  DDD5 =   5,
+  DDD4 =   4,
+  DDD3 =   3,
+  DDD2 =   2,
+  DDD1 =   1,
+  DDD0 =   0,
+
+/* Port D Input Pins - PIND */
+  PIND7 =  7,
+  PIND6 =  6,
+  PIND5 =  5,
+  PIND4 =  4,
+  PIND3 =  3,
+  PIND2 =  2,
+  PIND1 =  1,
+  PIND0 =  0,
+
+/* Port E Data Register - PORTE */
+  PE7 = 7,
+  PE6 = 6,
+  PE5 = 5,
+  PE4 = 4,
+  PE3 = 3,
+  PE2 = 2,
+  PE1 = 1,
+  PE0 = 0,
+
+/* Port E Data Direction Register - DDRE */
+  DDE7  =  7,
+  DDE6  =  6,
+  DDE5  =  5,
+  DDE4  =  4,
+  DDE3  =  3,
+  DDE2  =  2,
+  DDE1  =  1,
+  DDE0  =  0,
+
+/* Port E Input Pins - PINE */
+  PINE7 =  7,
+  PINE6 =  6,
+  PINE5 =  5,
+  PINE4 =  4,
+  PINE3 =  3,
+  PINE2 =  2,
+  PINE1 =  1,
+  PINE0 =  0,
+
+/* Port F Data Register - PORTF */
+  PF7 = 7,
+  PF6 = 6,
+  PF5 = 5,
+  PF4 = 4,
+  PF3 = 3,
+  PF2 = 2,
+  PF1 = 1,
+  PF0 = 0,
+
+/* Port F Data Direction Register - DDRF */
+  DDF7   = 7,
+  DDF6   = 6,
+  DDF5   = 5,
+  DDF4   = 4,
+  DDF3   = 3,
+  DDF2   = 2,
+  DDF1   = 1,
+  DDF0   = 0,
+
+/* Port F Input Pins - PINF */
+  PINF7  = 7,
+  PINF6  = 6,
+  PINF5  = 5,
+  PINF4  = 4,
+  PINF3  = 3,
+  PINF2  = 2,
+  PINF1  = 1,
+  PINF0  = 0,
+
+/* Port G Data Register - PORTG */
+  PG4    = 4,
+  PG3    = 3,
+  PG2    = 2,
+  PG1    = 1,
+  PG0    = 0,
+
+/* Port G Data Direction Register - DDRG */
+  DDG4   = 4,
+  DDG3   = 3,
+  DDG2   = 2,
+  DDG1   = 1,
+  DDG0   = 0,
+
+/* Port G Input Pins - PING */
+  PING4  = 4,
+  PING3  = 3,
+  PING2  = 2,
+  PING1  = 1,
+  PING0  = 0,
+};
+
+
+#endif
diff --git a/tos/chips/atm128/sim/atm128const.h b/tos/chips/atm128/sim/atm128const.h
new file mode 100644
index 00000000..5c75df18
--- /dev/null
+++ b/tos/chips/atm128/sim/atm128const.h
@@ -0,0 +1,38 @@
+/* $Id: atm128const.h,v 1.4 2006-12-12 18:23:04 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ * const_[u]int[8/16/32]_t types are used to declare single and array
+ * constants that should live in ROM/FLASH. These constants must be read
+ * via the corresponding read_[u]int[8/16/32]_t functions.
+ * 
+ * This file defines the ATmega128 version of these types and functions.
+ * @author David Gay
+ */
+
+#ifndef ATMEGA128CONST_H
+#define ATMEGA128CONST_H
+
+typedef uint8_t const_uint8_t PROGMEM;
+typedef uint16_t const_uint16_t PROGMEM;
+typedef uint32_t const_uint32_t PROGMEM;
+typedef int8_t const_int8_t PROGMEM;
+typedef int16_t const_int16_t PROGMEM;
+typedef int32_t const_int32_t PROGMEM;
+
+#define read_uint8_t(x) pgm_read_byte(x)
+#define read_uint16_t(x) pgm_read_word(x)
+#define read_uint32_t(x) pgm_read_dword(x)
+
+#define read_int8_t(x) ((int8_t)pgm_read_byte(x))
+#define read_int16_t(x) ((int16_t)pgm_read_word(x))
+#define read_int32_t(x) ((int32_t)pgm_read_dword(x))
+
+
+#endif
diff --git a/tos/chips/atm128/sim/atm128hardware.h b/tos/chips/atm128/sim/atm128hardware.h
new file mode 100644
index 00000000..966ee339
--- /dev/null
+++ b/tos/chips/atm128/sim/atm128hardware.h
@@ -0,0 +1,135 @@
+/*                                                                     
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Martin Turon <mturon@xbow.com>
+ *
+ *  $Id: atm128hardware.h,v 1.8 2010-06-29 22:07:43 scipio Exp $
+ */
+
+#ifndef _H_atmega128hardware_H
+#define _H_atmega128hardware_H
+
+#include <atm128_sim.h>
+#include <sim_tossim.h>
+
+uint8_t atm128RegFile[TOSSIM_MAX_NODES][0xa0];
+
+#define REG_ACCESS(x) atm128RegFile[sim_node()][x]
+
+/* We need slightly different defs than SIGNAL, INTERRUPT */
+#define AVR_ATOMIC_HANDLER(signame) \
+  void signame() @spontaneous() @C()
+
+#define AVR_NONATOMIC_HANDLER(signame) \
+  void signame() @spontaneous() @C()
+
+/* Macro to create union casting functions. */
+#define DEFINE_UNION_CAST(func_name, from_type, to_type) \
+  to_type func_name(from_type x_type) { \
+    union {from_type f_type; to_type t_type;} c_type = {f_type:x_type}; return c_type.t_type; }
+
+// Bit operators using bit number
+#define SET_BIT(port, bit)    ((REG_ACCESS(port)) |= _BV(bit))
+#define CLR_BIT(port, bit)    ((REG_ACCESS(port)) &= ~_BV(bit))
+#define READ_BIT(port, bit)   (((REG_ACCESS(port)) & _BV(bit)) != 0)
+#define FLIP_BIT(port, bit)   ((REG_ACCESS(port)) ^= _BV(bit))
+#define WRITE_BIT(port, bit, value) \
+   if (value) SET_BIT((port), (bit)); \
+   else CLR_BIT((port), (bit))
+
+// Bit operators using bit flag mask
+#define SET_FLAG(port, flag)  ((REG_ACCESS(port)) |= (flag))
+#define CLR_FLAG(port, flag)  ((REG_ACCESS(port)) &= ~(flag))
+#define READ_FLAG(port, flag) ((REG_ACCESS(port)) & (flag))
+
+#define sei() (SET_BIT(SREG, 7))
+#define cli() (CLR_BIT(SREG, 7))
+
+/* Enables interrupts. */
+inline void __nesc_enable_interrupt() {
+    sei();
+}
+/* Disables all interrupts. */
+inline void __nesc_disable_interrupt() {
+    cli();
+}
+
+/* Defines data type for storing interrupt mask state during atomic. */
+typedef uint8_t __nesc_atomic_t;
+
+/* Saves current interrupt mask state and disables interrupts. */
+inline __nesc_atomic_t 
+__nesc_atomic_start(void) @spontaneous()
+{
+    __nesc_atomic_t result = SREG;
+    __nesc_disable_interrupt();
+    return result;
+}
+
+/* Restores interrupt mask to original state. */
+inline void 
+__nesc_atomic_end(__nesc_atomic_t original_SREG) @spontaneous()
+{
+  SREG = original_SREG;
+}
+
+inline void
+__nesc_atomic_sleep()
+{
+  //sbi(MCUCR, SE);  power manager will enable/disable sleep
+  sei();  // Make sure interrupts are on, so we can wake up!
+  asm volatile ("sleep");
+}
+
+typedef uint8_t mcu_power_t @combine("mcombine");
+/* Combine function.  */
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) {
+  return (m1 < m2)? m1: m2;
+}
+
+enum {
+  ATM128_POWER_IDLE        = 0,
+  ATM128_POWER_ADC_NR      = 1,
+  ATM128_POWER_EXT_STANDBY = 2,
+  ATM128_POWER_SAVE        = 3,
+  ATM128_POWER_STANDBY     = 4,
+  ATM128_POWER_DOWN        = 5, 
+};
+
+#endif //_H_atmega128hardware_H
diff --git a/tos/chips/atm128/sim/crc.h b/tos/chips/atm128/sim/crc.h
new file mode 100644
index 00000000..06ee75e7
--- /dev/null
+++ b/tos/chips/atm128/sim/crc.h
@@ -0,0 +1,106 @@
+// $Id: crc.h,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#ifndef CRC_H
+#define CRC_H
+
+uint16_t crcTable[256] = {
+  0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+  0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+  0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+  0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+  0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+  0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+  0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+  0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+  0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+  0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+  0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+  0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+  0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+  0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+  0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+  0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+  0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+  0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+  0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+  0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+  0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+  0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+  0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+  0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+  0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+  0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+  0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+  0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+  0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+  0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+  0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+  0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
+};
+
+uint16_t crcByte(uint16_t oldCrc, uint8_t byte)
+{
+#if 0
+  uint16_t *table = crcTable;
+  uint16_t newCrc;
+
+  asm ("eor %1,%B3\n"
+       "\tlsl %1\n"
+       "\tadc %B2, __zero_reg__\n"
+       "\tadd %A2, %1\n"
+       "\tadc %B2, __zero_reg__\n"
+       "\tlpm\n"
+       "\tmov %B0, %A3\n"
+       "\tmov %A0, r0\n"
+       "\tadiw r30,1\n"
+       "\tlpm\n"
+       "\teor %B0, r0"
+       : "=r" (newCrc), "+r" (byte), "+z" (table) : "r" (oldCrc));
+  return newCrc;
+#else
+  uint8_t *magic = (uint8_t *)&crcTable[oldCrc >> 8 ^ byte];
+
+  return *magic | ((uint8_t)oldCrc ^ *(magic + 1)) << 8;
+#endif
+}
+
+#endif
diff --git a/tos/chips/atm128/spi/Atm128Spi.h b/tos/chips/atm128/spi/Atm128Spi.h
new file mode 100644
index 00000000..52043049
--- /dev/null
+++ b/tos/chips/atm128/spi/Atm128Spi.h
@@ -0,0 +1,83 @@
+// $Id: Atm128Spi.h,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Martin Turon <mturon@xbow.com>
+
+#ifndef _H_Atm128SPI_h
+#define _H_Atm128SPI_h
+
+//====================== SPI Bus ==================================
+
+enum {
+  ATM128_SPI_CLK_DIVIDE_4 = 0,
+  ATM128_SPI_CLK_DIVIDE_16 = 1,
+  ATM128_SPI_CLK_DIVIDE_64 = 2,
+  ATM128_SPI_CLK_DIVIDE_128 = 3,
+};
+
+/* SPI Control Register */
+typedef struct {
+  uint8_t spie  : 1;  //!< SPI Interrupt Enable
+  uint8_t spe   : 1;  //!< SPI Enable
+  uint8_t dord  : 1;  //!< SPI Data Order
+  uint8_t mstr  : 1;  //!< SPI Master/Slave Select
+  uint8_t cpol  : 1;  //!< SPI Clock Polarity
+  uint8_t cpha  : 1;  //!< SPI Clock Phase
+  uint8_t spr   : 2;  //!< SPI Clock Rate
+
+} Atm128SPIControl_s;
+typedef union {
+  uint8_t flat;
+  Atm128SPIControl_s bits;
+} Atm128SPIControl_t;
+
+typedef Atm128SPIControl_t Atm128_SPCR_t;  //!< SPI Control Register
+
+/* SPI Status Register */
+typedef struct {
+  uint8_t spif  : 1;  //!< SPI Interrupt Flag
+  uint8_t wcol  : 1;  //!< SPI Write COLision flag
+  uint8_t rsvd  : 5;  //!< Reserved
+  uint8_t spi2x : 1;  //!< Whether we are in double speed
+
+} Atm128SPIStatus_s;
+typedef union {
+  uint8_t flat;
+  Atm128SPIStatus_s bits;
+} Atm128SPIStatus_t;
+
+typedef Atm128SPIStatus_t Atm128_SPSR_t;  //!< SPI Status Register
+
+typedef uint8_t Atm128_SPDR_t;  //!< SPI Data Register
+
+#endif //_H_Atm128SPI_h
diff --git a/tos/chips/atm128/spi/Atm128Spi.nc b/tos/chips/atm128/spi/Atm128Spi.nc
new file mode 100644
index 00000000..4767cf3a
--- /dev/null
+++ b/tos/chips/atm128/spi/Atm128Spi.nc
@@ -0,0 +1,143 @@
+/// $Id: Atm128Spi.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $ 
+
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL-level access to the Atmega128 SPI bus. Refer to pages 162-9
+ * of the Atmega128 datasheet (rev. 2467M-AVR-11/04) for details.
+ *
+ * <pre>
+ *  $Id: Atm128Spi.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+ * </pre>
+ *
+ * @author Philip Levis
+ * @author Martin Turon <mturon@xbow.com>
+ * @date   September 8 2005
+ */
+
+#include "Atm128Spi.h"
+
+interface Atm128Spi {
+
+  /* Modal functions */
+
+  /** Initialize the ATmega128 SPI bus into master mode. */
+  async command void initMaster();
+
+  /** Initialize the ATmega128 SPI bus into slave mode. */
+  async command void initSlave();
+
+  /** Disable and sleep the ATmega128 SPI bus. */
+  async command void sleep();
+  
+  /* SPDR: SPI Data Register */
+
+  /** 
+   * Read the SPI data register 
+   * @return last data byte
+   */
+  async command uint8_t read();
+
+  /** 
+   * Write the SPI data register 
+   * @param data   next data byte
+   */
+  async command void write(uint8_t data);
+
+  /**
+   * Interrupt signalling SPI data cycle is complete. 
+   * @param data   data byte from data register
+   */
+  async event   void dataReady(uint8_t data);
+  
+  /* SPCR: SPI Control Register */
+  /* SPIE bit */
+  async command void enableInterrupt(bool enabled);
+  async command bool isInterruptEnabled();
+  /* SPI bit */
+  async command void enableSpi(bool busOn);
+  async command bool isSpiEnabled();
+  /* DORD bit */
+  async command void setDataOrder(bool lsbFirst);
+  async command bool isOrderLsbFirst();
+  /* MSTR bit */
+  async command void setMasterBit(bool isMaster);
+  async command bool isMasterBitSet();
+  /* CPOL bit */
+  async command void setClockPolarity(bool highWhenIdle);
+  async command bool getClockPolarity();
+  /* CPHA bit */
+  async command void setClockPhase(bool sampleOnTrailing);
+  async command bool getClockPhase();
+  /* SPR1 and SPR0 bits */
+  async command void  setClock(uint8_t speed);
+  async command uint8_t getClock();
+  
+  /* SPSR: SPI Status Register */
+  
+  /* SPIF bit */
+  async command bool isInterruptPending();
+  /* WCOL bit */
+  async command bool hasWriteCollided();
+  /* SPI2X bit */
+  async command bool isMasterDoubleSpeed();
+  async command void setMasterDoubleSpeed(bool on);
+}
diff --git a/tos/chips/atm128/spi/Atm128SpiC.nc b/tos/chips/atm128/spi/Atm128SpiC.nc
new file mode 100644
index 00000000..28b1066c
--- /dev/null
+++ b/tos/chips/atm128/spi/Atm128SpiC.nc
@@ -0,0 +1,103 @@
+/// $Id: Atm128SpiC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2000-2005 The Regents of the University  of California.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * The HAL of the SPI bus on the atm128.
+ *
+ * <pre>
+ *  $Id: Atm128SpiC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $
+ * </pre>
+ *
+ *
+ * @author Philip Levis
+ * @author Martin Turon
+ * @author Joe Polastre
+ * @date   September 7 2005
+ */
+
+configuration Atm128SpiC {
+  provides interface Init;
+  provides interface SpiByte;
+  provides interface FastSpiByte;
+  provides interface SpiPacket;
+  provides interface Resource[uint8_t id];
+}
+implementation {
+  components Atm128SpiP as SpiMaster, HplAtm128SpiC as HplSpi;
+  components new SimpleFcfsArbiterC("Atm128SpiC.Resource") as Arbiter;
+  components McuSleepC;
+  
+  Init         = SpiMaster;
+  
+  SpiByte      = SpiMaster;
+  FastSpiByte  = SpiMaster;
+  SpiPacket    = SpiMaster;
+  Resource     = SpiMaster;
+
+  SpiMaster.ResourceArbiter -> Arbiter;
+  SpiMaster.ArbiterInfo     -> Arbiter;
+  SpiMaster.Spi             -> HplSpi;
+  SpiMaster.McuPowerState   -> McuSleepC;
+}
diff --git a/tos/chips/atm128/spi/Atm128SpiP.nc b/tos/chips/atm128/spi/Atm128SpiP.nc
new file mode 100644
index 00000000..e243591b
--- /dev/null
+++ b/tos/chips/atm128/spi/Atm128SpiP.nc
@@ -0,0 +1,392 @@
+/// $Id: Atm128SpiP.nc,v 1.12 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2000-2005 The Regents of the University  of California.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ */
+
+/**
+ * Primitives for accessing the SPI module on ATmega128
+ * microcontroller.  This module assumes the bus has been reserved and
+ * checks that the bus owner is in fact the person using the bus.
+ * SpiPacket provides an asynchronous send interface where the
+ * transmit data length is equal to the receive data length, while
+ * SpiByte provides an interface for sending a single byte
+ * synchronously. SpiByte allows a component to send a few bytes
+ * in a simple fashion: if more than a handful need to be sent,
+ * SpiPacket should be used.
+ *
+ *
+ * <pre>
+ *  $Id: Atm128SpiP.nc,v 1.12 2010-06-29 22:07:43 scipio Exp $
+ * </pre>
+ *
+ * @author Philip Levis
+ * @author Joe Polastre
+ * @author Martin Turon <mturon@xbow.com>
+ *
+ */
+
+module Atm128SpiP @safe() {
+  provides {
+    interface Init;
+    interface SpiByte;
+    interface FastSpiByte;
+    interface SpiPacket;
+    interface Resource[uint8_t id];
+  }
+  uses {
+    interface Atm128Spi as Spi;
+    interface Resource as ResourceArbiter[uint8_t id];
+    interface ArbiterInfo;
+    interface McuPowerState;
+  }
+}
+implementation {
+  uint16_t len;
+  uint8_t* COUNT_NOK(len) txBuffer;
+  uint8_t* COUNT_NOK(len) rxBuffer;
+  uint16_t pos;
+  
+  enum {
+    SPI_IDLE,
+    SPI_BUSY,
+    SPI_ATOMIC_SIZE = 10,
+  };
+
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+  
+  void startSpi() {
+    call Spi.enableSpi(FALSE);
+    atomic {
+      call Spi.initMaster();
+      call Spi.enableInterrupt(FALSE);
+      call Spi.setMasterDoubleSpeed(TRUE);
+      call Spi.setClockPolarity(FALSE);
+      call Spi.setClockPhase(FALSE);
+      call Spi.setClock(0);
+      call Spi.enableSpi(TRUE);
+    }
+    call McuPowerState.update();
+  }
+
+  void stopSpi() {
+    call Spi.enableSpi(FALSE);
+    atomic {
+      call Spi.sleep();
+    }
+    call McuPowerState.update();
+  }
+
+  async command uint8_t SpiByte.write( uint8_t tx ) {
+    /* There is no need to enable the SPI bus and update the power state
+       here since that must have been done when the resource was granted. 
+       However there seems to be a bug somewhere in the radio driver for 
+       the MicaZ platform so we cannot remove the following two lines 
+       before that problem is resolved. (Miklos Maroti) */
+#ifdef PLATFORM_MICAZ
+    call Spi.enableSpi(TRUE);
+    call McuPowerState.update();
+#endif
+
+    call Spi.write( tx );
+    while ( !( SPSR & 0x80 ) );
+    return call Spi.read();
+  }
+
+  inline async command void FastSpiByte.splitWrite(uint8_t data) {
+    call Spi.write(data);
+  }
+
+  inline async command uint8_t FastSpiByte.splitRead() {
+    while( !( SPSR & 0x80 ) )
+      ;
+    return call Spi.read();
+  }
+
+  inline async command uint8_t FastSpiByte.splitReadWrite(uint8_t data) {
+    uint8_t b;
+
+    while( !( SPSR & 0x80 ) )
+	;
+    b = call Spi.read();
+    call Spi.write(data);
+
+    return b;
+  }
+
+  inline async command uint8_t FastSpiByte.write(uint8_t data) {
+    call Spi.write(data);
+    while( !( SPSR & 0x80 ) )
+      ;
+    return call Spi.read();
+  }
+
+  /**
+   * This component sends SPI packets in chunks of size SPI_ATOMIC_SIZE
+   * (which is normally 5). The tradeoff is between SPI performance
+   * (throughput) and how much the component limits concurrency in the
+   * rest of the system. Handling an interrupt on each byte is
+   * very expensive: the context saving/register spilling constrains
+   * the rate at which one can write out bytes. A more efficient
+   * approach is to write out a byte and wait for a few cycles until
+   * the byte is written (a tiny spin loop). This leads to greater
+   * throughput, but blocks the system and prevents it from doing
+   * useful work.
+   *
+   * This component takes a middle ground. When asked to transmit X
+   * bytes in a packet, it transmits those X bytes in 10-byte parts.
+   * <tt>sendNextPart()</tt> is responsible for sending one such
+   * part. It transmits bytes with the SpiByte interface, which
+   * disables interrupts and spins on the SPI control register for
+   * completion. On the last byte, however, <tt>sendNextPart</tt>
+   * re-enables SPI interrupts and sends the byte through the
+   * underlying split-phase SPI interface. When this component handles
+   * the SPI transmit completion event (handles the SPI interrupt),
+   * it calls sendNextPart() again. As the SPI interrupt does
+   * not disable interrupts, this allows processing in the rest of the
+   * system to continue.
+   */
+   
+  error_t sendNextPart() {
+    uint16_t end;
+    uint16_t tmpPos;
+    uint16_t myLen;
+    uint8_t* COUNT_NOK(myLen) tx;
+    uint8_t* COUNT_NOK(myLen) rx;
+    
+    atomic {
+      myLen = len;
+      tx = txBuffer;
+      rx = rxBuffer;
+      tmpPos = pos;
+      end = pos + SPI_ATOMIC_SIZE;
+      end = (end > len)? len:end;
+    }
+
+    for (;tmpPos < (end - 1) ; tmpPos++) {
+      uint8_t val;
+      if (tx != NULL) 
+	val = call SpiByte.write( tx[tmpPos] );
+      else
+	val = call SpiByte.write( 0 );
+    
+      if (rx != NULL) {
+	rx[tmpPos] = val;
+      }
+    }
+
+    // For the last byte, we re-enable interrupts.
+
+   call Spi.enableInterrupt(TRUE);
+   atomic {
+     if (tx != NULL)
+       call Spi.write(tx[tmpPos]);
+     else
+       call Spi.write(0);
+     
+     pos = tmpPos;
+      // The final increment will be in the interrupt
+      // handler.
+    }
+    return SUCCESS;
+  }
+
+
+  task void zeroTask() {
+     uint16_t  myLen;
+     uint8_t* COUNT_NOK(myLen) rx;
+     uint8_t* COUNT_NOK(myLen) tx;
+
+     atomic {
+       myLen = len;
+       rx = rxBuffer;
+       tx = txBuffer;
+       rxBuffer = NULL;
+       txBuffer = NULL;
+       len = 0;
+       pos = 0;
+       signal SpiPacket.sendDone(tx, rx, myLen, SUCCESS);
+     }
+  }
+
+  /**
+   * Send bufLen bytes in <tt>writeBuf</tt> and receive bufLen bytes
+   * into <tt>readBuf</tt>. If <tt>readBuf</tt> is NULL, bytes will be
+   * read out of the SPI, but they will be discarded. A byte is read
+   * from the SPI before writing and discarded (to clear any buffered
+   * bytes that might have been left around).
+   *
+   * This command only sets up the state variables and clears the SPI:
+   * <tt>sendNextPart()</tt> does the real work.
+   * 
+   * If there's a send of zero bytes, short-circuit and just post
+   * a task to signal the sendDone. This generally occurs due to an
+   * error in the caler, but signaling an event will hopefully let
+   * it recover better than returning FAIL.
+   */
+
+  
+  async command error_t SpiPacket.send(uint8_t* writeBuf, 
+				       uint8_t* readBuf, 
+				       uint16_t  bufLen) {
+    uint8_t discard;
+    atomic {
+      len = bufLen;
+      txBuffer = writeBuf;
+      rxBuffer = readBuf;
+      pos = 0;
+    }
+    if (bufLen > 0) {
+      discard = call Spi.read();
+      return sendNextPart();
+    }
+    else {
+      post zeroTask();
+      return SUCCESS;
+    }
+  }
+
+ default async event void SpiPacket.sendDone
+      (uint8_t* _txbuffer, uint8_t* _rxbuffer, 
+       uint16_t _length, error_t _success) { }
+
+ async event void Spi.dataReady(uint8_t data) {
+   bool again;
+   
+   atomic {
+     if (rxBuffer != NULL) {
+       rxBuffer[pos] = data;
+       // Increment position
+     }
+     pos++;
+   }
+   call Spi.enableInterrupt(FALSE);
+   
+   atomic {
+     again = (pos < len);
+   }
+   
+   if (again) {
+     sendNextPart();
+   }
+   else {
+     uint8_t discard;
+     uint16_t  myLen;
+     uint8_t* COUNT_NOK(myLen) rx;
+     uint8_t* COUNT_NOK(myLen) tx;
+     
+     atomic {
+       myLen = len;
+       rx = rxBuffer;
+       tx = txBuffer;
+       rxBuffer = NULL;
+       txBuffer = NULL;
+       len = 0;
+       pos = 0;
+     }
+     discard = call Spi.read();
+
+     signal SpiPacket.sendDone(tx, rx, myLen, SUCCESS);
+   }
+ }
+
+ async command error_t Resource.immediateRequest[ uint8_t id ]() {
+   error_t result = call ResourceArbiter.immediateRequest[ id ]();
+   if ( result == SUCCESS ) {
+     startSpi();
+   }
+   return result;
+ }
+ 
+ async command error_t Resource.request[ uint8_t id ]() {
+   atomic {
+     if (!call ArbiterInfo.inUse()) {
+       startSpi();
+     }
+   }
+   return call ResourceArbiter.request[ id ]();
+ }
+
+ async command error_t Resource.release[ uint8_t id ]() {
+   error_t error = call ResourceArbiter.release[ id ]();
+   atomic {
+     if (!call ArbiterInfo.inUse()) {
+       stopSpi();
+     }
+   }
+   return error;
+ }
+
+ async command uint8_t Resource.isOwner[uint8_t id]() {
+   return call ResourceArbiter.isOwner[id]();
+ }
+ 
+ event void ResourceArbiter.granted[ uint8_t id ]() {
+   signal Resource.granted[ id ]();
+ }
+ 
+ default event void Resource.granted[ uint8_t id ]() {}
+ 
+}
diff --git a/tos/chips/atm128/spi/HplAtm128SpiC.nc b/tos/chips/atm128/spi/HplAtm128SpiC.nc
new file mode 100644
index 00000000..3f01d967
--- /dev/null
+++ b/tos/chips/atm128/spi/HplAtm128SpiC.nc
@@ -0,0 +1,90 @@
+/// $Id: HplAtm128SpiC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Configuration encapsulating the basic SPI HPL for the atm128.
+ *
+ * <pre>
+ * $Id: HplAtm128SpiC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+ * </pre>
+ *
+ * @author Philip Levis
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+
+configuration HplAtm128SpiC {
+    provides interface Atm128Spi as SpiBus;
+}
+implementation
+{
+  components HplAtm128GeneralIOC as IO, HplAtm128SpiP as HplSpi;
+  components McuSleepC;
+  
+  SpiBus = HplSpi;
+
+  HplSpi.Mcu -> McuSleepC;
+  HplSpi.SS   -> IO.PortB0;  // Slave set line
+  HplSpi.SCK  -> IO.PortB1;  // SPI clock line
+  HplSpi.MOSI -> IO.PortB2;  // Master out, slave in
+  HplSpi.MISO -> IO.PortB3;  // Master in, slave out
+}
diff --git a/tos/chips/atm128/spi/HplAtm128SpiP.nc b/tos/chips/atm128/spi/HplAtm128SpiP.nc
new file mode 100644
index 00000000..f6537836
--- /dev/null
+++ b/tos/chips/atm128/spi/HplAtm128SpiP.nc
@@ -0,0 +1,238 @@
+/// $Id: HplAtm128SpiP.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the SPI bus abstraction for the atm128
+ * microcontroller.
+ *
+ * @author Philip Levis
+ * @author Martin Turon
+ */
+
+#include "Atm128Spi.h"
+
+module HplAtm128SpiP @safe() {
+  provides interface Atm128Spi as SPI;
+  provides interface AsyncStdControl;
+  
+  uses {
+    interface GeneralIO as SS;   // Slave set line
+    interface GeneralIO as SCK;  // SPI clock line
+    interface GeneralIO as MOSI; // Master out, slave in
+    interface GeneralIO as MISO; // Master in, slave out
+    interface McuPowerState as Mcu;
+  }
+}
+implementation {
+
+  async command error_t AsyncStdControl.start() {
+    call SPI.enableSpi(TRUE);
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    call SPI.enableInterrupt(FALSE);
+    call SPI.enableSpi(FALSE);
+  }
+  
+  async command void SPI.initMaster() {
+    call MOSI.makeOutput();
+    call MISO.makeInput();
+    call SCK.makeOutput();
+    call SPI.setMasterBit(TRUE);
+  }
+
+  async command void SPI.initSlave() {
+    call MISO.makeOutput();
+    call MOSI.makeInput();
+    call SCK.makeInput();
+    call SS.makeInput();
+    call SPI.setMasterBit(FALSE);
+  }
+  
+  async command void SPI.sleep() {
+//    call SS.set();	// why was this needed?
+  }
+  
+  async command uint8_t SPI.read()        { return SPDR; }
+  async command void SPI.write(uint8_t d) { SPDR = d; }
+    
+  default async event void SPI.dataReady(uint8_t d) {}
+  AVR_ATOMIC_HANDLER(SIG_SPI) {
+      signal SPI.dataReady(call SPI.read());
+  }
+
+  //=== SPI Bus utility routines. ====================================
+  async command bool SPI.isInterruptPending() {
+    return READ_BIT(SPSR, SPIF);
+  }
+
+  async command bool SPI.isInterruptEnabled () {                
+    return READ_BIT(SPCR, SPIE);
+  }
+
+  async command void SPI.enableInterrupt(bool enabled) {
+    if (enabled) {
+      SET_BIT(SPCR, SPIE);
+      call Mcu.update();
+    }
+    else {
+      CLR_BIT(SPCR, SPIE);
+      call Mcu.update();
+    }
+  }
+
+  async command bool SPI.isSpiEnabled() {
+    return READ_BIT(SPCR, SPE);
+  }
+  
+  async command void SPI.enableSpi(bool enabled) {
+    if (enabled) {
+      SET_BIT(SPCR, SPE);
+      call Mcu.update();
+    }
+    else {
+      CLR_BIT(SPCR, SPE);
+      call Mcu.update();
+    }
+  }
+
+  /* DORD bit */
+  async command void SPI.setDataOrder(bool lsbFirst) {
+    if (lsbFirst) {
+      SET_BIT(SPCR, DORD);
+    }
+    else {
+      CLR_BIT(SPCR, DORD);
+    }
+  }
+  
+  async command bool SPI.isOrderLsbFirst() {
+    return READ_BIT(SPCR, DORD);
+  }
+  
+  /* MSTR bit */
+  async command void SPI.setMasterBit(bool isMaster) {
+    if (isMaster) {
+      SET_BIT(SPCR, MSTR);
+    }
+    else {
+      CLR_BIT(SPCR, MSTR);
+    }
+  }
+  async command bool SPI.isMasterBitSet() {
+    return READ_BIT(SPCR, MSTR);
+  }
+  
+  /* CPOL bit */
+  async command void SPI.setClockPolarity(bool highWhenIdle) {
+    if (highWhenIdle) {
+      SET_BIT(SPCR, CPOL);
+    }
+    else {
+      CLR_BIT(SPCR, CPOL);
+    }
+  }
+  
+  async command bool SPI.getClockPolarity() {
+    return READ_BIT(SPCR, CPOL);
+  }
+  
+  /* CPHA bit */
+  async command void SPI.setClockPhase(bool sampleOnTrailing) {
+    if (sampleOnTrailing) {
+      SET_BIT(SPCR, CPHA);
+    }
+    else {
+      CLR_BIT(SPCR, CPHA);
+    }
+  }
+  async command bool SPI.getClockPhase() {
+    return READ_BIT(SPCR, CPHA);
+  }
+
+  
+  async command uint8_t SPI.getClock () {                
+    return READ_FLAG(SPCR, ((1 << SPR1) | (1 <<SPR0)));
+  }
+  
+  async command void SPI.setClock (uint8_t v) {
+    v &= (SPR1) | (SPR0);
+    SPCR = (SPCR & ~(SPR1 | SPR0)) | v;
+  }
+
+  async command bool SPI.hasWriteCollided() {
+    return READ_BIT(SPSR, WCOL);
+  }
+
+  async command bool SPI.isMasterDoubleSpeed() {
+    return READ_BIT(SPSR, SPI2X);
+  }
+
+  async command void SPI.setMasterDoubleSpeed(bool on) {
+   if (on) {
+      SET_BIT(SPSR, SPI2X);
+    }
+    else {
+      CLR_BIT(SPSR, SPI2X);
+    }
+  }
+}
diff --git a/tos/chips/atm128/spi/sim/Atm128SpiC.nc b/tos/chips/atm128/spi/sim/Atm128SpiC.nc
new file mode 100644
index 00000000..caff2148
--- /dev/null
+++ b/tos/chips/atm128/spi/sim/Atm128SpiC.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The simulated HAL of the SPI bus on the atm128, which just maps to
+ * the platform-specific implementation of the device end point.
+ *
+ * <pre>
+ *  $Id: Atm128SpiC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+ * </pre>
+ *
+ *
+ * @author Philip Levis
+ * @date   November 22 2005
+ */
+
+configuration Atm128SpiC {
+  provides interface Init;
+  provides interface SPIByte;
+  provides interface SPIPacket;
+  provides interface Resource[uint8_t id];
+}
+implementation {
+  components SimAtm128SpiDeviceC as Device;
+  components new SimpleFcfsArbiterC("Atm128SpiC.Resource") as Arbiter;
+  components McuSleepC;
+  
+  Init         = Device;
+  
+  SPIByte      = Device;
+  SPIPacket    = Device;
+  Resource     = Arbiter;
+
+  Device.McuPowerState   -> McuSleepC;
+}
diff --git a/tos/chips/atm128/timer/Atm128AlarmAsyncC.nc b/tos/chips/atm128/timer/Atm128AlarmAsyncC.nc
new file mode 100644
index 00000000..9e2c663c
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128AlarmAsyncC.nc
@@ -0,0 +1,43 @@
+// $Id: Atm128AlarmAsyncC.nc,v 1.3 2007-05-23 22:49:08 idgay Exp $
+/*
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Build a 32-bit alarm and counter from the atmega128's 8-bit timer 0
+ * in asynchronous mode. Attempting to use the generic Atm128AlarmC
+ * component and the generic timer components runs into problems
+ * apparently related to letting timer 0 overflow.
+ * 
+ * So, instead, this version (inspired by the 1.x code and a remark from
+ * Martin Turon) directly builds a 32-bit alarm and counter on top of timer 0
+ * and never lets timer 0 overflow.
+ *
+ * @author David Gay
+ */
+generic configuration Atm128AlarmAsyncC(typedef precision, int divider) {
+  provides {
+    interface Init @atleastonce();
+    interface Alarm<precision, uint32_t>;
+    interface Counter<precision, uint32_t>;
+  }
+}
+implementation
+{
+  components new Atm128AlarmAsyncP(precision, divider),
+    HplAtm128Timer0AsyncC;
+
+  Init = Atm128AlarmAsyncP;
+  Alarm = Atm128AlarmAsyncP;
+  Counter = Atm128AlarmAsyncP;
+
+  Atm128AlarmAsyncP.Timer -> HplAtm128Timer0AsyncC;
+  Atm128AlarmAsyncP.TimerCtrl -> HplAtm128Timer0AsyncC;
+  Atm128AlarmAsyncP.Compare -> HplAtm128Timer0AsyncC;
+  Atm128AlarmAsyncP.TimerAsync -> HplAtm128Timer0AsyncC;
+}
diff --git a/tos/chips/atm128/timer/Atm128AlarmAsyncP.nc b/tos/chips/atm128/timer/Atm128AlarmAsyncP.nc
new file mode 100644
index 00000000..fb5b9457
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128AlarmAsyncP.nc
@@ -0,0 +1,231 @@
+// $Id: Atm128AlarmAsyncP.nc,v 1.8 2008-06-26 03:38:27 regehr Exp $
+/*
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Build a 32-bit alarm and counter from the atmega128's 8-bit timer 0
+ * in asynchronous mode. Attempting to use the generic Atm128AlarmC
+ * component and the generic timer components runs into problems
+ * apparently related to letting timer 0 overflow.
+ * 
+ * So, instead, this version (inspired by the 1.x code and a remark from
+ * Martin Turon) directly builds a 32-bit alarm and counter on top of timer 0
+ * and never lets timer 0 overflow.
+ *
+ * @author David Gay
+ */
+generic module Atm128AlarmAsyncP(typedef precision, int divider) @safe() {
+  provides {
+    interface Init;
+    interface Alarm<precision, uint32_t>;
+    interface Counter<precision, uint32_t>;
+  }
+  uses {
+    interface HplAtm128Timer<uint8_t> as Timer;
+    interface HplAtm128TimerCtrl8 as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface HplAtm128TimerAsync as TimerAsync;
+  }
+}
+implementation
+{
+  uint8_t set; 			/* Is the alarm set? */
+  uint32_t t0, dt;		/* Time of the next alarm */
+  norace uint32_t base;		/* base+TCNT0 is the current time if no
+				   interrupt is pending. See Counter.get()
+				   for the full details. */
+
+  enum {
+    MINDT = 2,			/* Minimum interval between interrupts */
+    MAXT = 230			/* Maximum value to let timer 0 reach
+				   (from Joe Polastre and Robert Szewczyk's
+				   painful experiences with the 1.x timer ;-)) */
+  };
+
+  void setInterrupt();
+
+  /* Configure timer 0 */
+  command error_t Init.init() {
+    atomic
+      {
+	Atm128TimerControl_t x;
+
+	call TimerAsync.setTimer0Asynchronous();
+	x.flat = 0;
+	x.bits.cs = divider;
+	x.bits.wgm1 = 1; /* We use the clear-on-compare mode */
+	call TimerCtrl.setControl(x);
+	call Compare.set(MAXT); /* setInterrupt needs a valid value here */
+	call Compare.start();
+      }
+    setInterrupt();
+    return SUCCESS;
+  }
+
+  /* Set compare register for timer 0 to n. But increment n by 1 if TCNT0 
+     reaches this value before we can set the compare register.
+  */
+  void setOcr0(uint8_t n) {
+    while (call TimerAsync.compareBusy())
+      ;
+    if (n == call Timer.get())
+      n++;
+    /* Support for overflow. Force interrupt at wrap around value. 
+       This does not cause a backwards-in-time value as we do this
+       every time we set OCR0. */
+    if (base + n + 1 < base)
+      n = -base - 1;
+    call Compare.set(n);
+  }
+
+  /* Update the compare register to trigger an interrupt at the
+     appropriate time based on the current alarm settings
+   */
+  void setInterrupt() {
+    bool fired = FALSE;
+
+    atomic
+      {
+	/* interrupt_in is the time to the next interrupt. Note that
+	   compare register values are off by 1 (i.e., if you set OCR0 to
+	   3, the interrupt will happen whjen TCNT0 is 4) */
+	uint8_t interrupt_in = 1 + call Compare.get() - call Timer.get();
+	uint8_t newOcr0;
+	uint8_t tifr = (uint8_t)((call TimerCtrl.getInterruptFlag()).flat);
+	dbg("Atm128AlarmAsyncP", "Atm128AlarmAsyncP: TIFR is %hhx\n", tifr);
+	if ((interrupt_in != 0 && interrupt_in < MINDT) || (tifr & (1 << OCF0))) {
+	  if (interrupt_in < MINDT) {
+	    dbg("Atm128AlarmAsyncP", "Atm128AlarmAsyncP: under min: %hhu.\n", interrupt_in);
+	  }
+	  else {
+	    dbg("Atm128AlarmAsyncP", "Atm128AlarmAsyncP: OCF set.\n");
+	  }
+	  return; // wait for next interrupt
+	}
+
+	/* When no alarm is set, we just ask for an interrupt every MAXT */
+	if (!set) {
+	  newOcr0 = MAXT;
+	  dbg("Atm128AlarmAsyncP", "Atm128AlarmAsyncP: no alarm set, set at max.\n");
+	}
+	else
+	  {
+	    uint32_t now = call Counter.get();
+	    dbg("Atm128AlarmAsyncP", "Atm128AlarmAsyncP: now-t0 = %llu, dt = %llu\n", (now-t0), dt);
+	    /* Check if alarm expired */
+	    if ((uint32_t)(now - t0) >= dt)
+	      {
+		set = FALSE;
+		fired = TRUE;
+		newOcr0 = MAXT;
+	      }
+	    else
+	      {
+		/* No. Set compare register to time of next alarm if it's
+		   within the next MAXT units */
+		uint32_t alarm_in = (t0 + dt) - base;
+
+		if (alarm_in > MAXT)
+		  newOcr0 = MAXT;
+		else if ((uint8_t)alarm_in < MINDT) // alarm_in < MAXT ...
+		  newOcr0 = MINDT;
+		else
+		  newOcr0 = alarm_in;
+	      }
+	  }
+	newOcr0--; // interrupt is 1ms late
+	setOcr0(newOcr0);
+      }
+    if (fired)
+      signal Alarm.fired();
+  }
+
+  async event void Compare.fired() {
+    int overflowed;
+
+    /* Compare register fired. Update time knowledge */
+    base += call Compare.get() + 1U; // interrupt is 1ms late
+    overflowed = !base;
+    __nesc_enable_interrupt();
+    setInterrupt();
+    if (overflowed)
+      signal Counter.overflow();
+  }  
+
+  async command uint32_t Counter.get() {
+    uint32_t now;
+
+    atomic
+      {
+	/* Current time is base+TCNT0 if no interrupt is pending. But if
+	   an interrupt is pending, then it's base + compare value + 1 + TCNT0 */
+	uint8_t now8 = call Timer.get();
+
+	if ((call TimerCtrl.getInterruptFlag()).bits.ocf0)
+	  /* We need to reread TCNT0 as it might've overflowed after we
+	     read TCNT0 the first time */
+	  now = base + call Compare.get() + 1 + call Timer.get();
+	else
+	  /* We need to use the value of TCNT0 from before we check the
+	     interrupt flag, as it might wrap around after the check */
+	  now = base + now8;
+      }
+    return now;
+  }
+
+  async command bool Counter.isOverflowPending() {
+    atomic
+      return (call TimerCtrl.getInterruptFlag()).bits.ocf0 &&
+	!(base + call Compare.get() + 1);
+  }
+
+  async command void Counter.clearOverflow() { 
+    atomic
+      if (call Counter.isOverflowPending())
+	{
+	  base = 0;
+	  call Compare.reset();
+	}
+      else
+	return;
+    setInterrupt();
+  }
+
+  async command void Alarm.start(uint32_t ndt) {
+    call Alarm.startAt(call Counter.get(), ndt);
+  }
+
+  async command void Alarm.stop() {
+    atomic set = FALSE;
+  }
+
+  async command bool Alarm.isRunning() {
+    atomic return set;
+  }
+
+  async command void Alarm.startAt(uint32_t nt0, uint32_t ndt) {
+    atomic
+      {
+	set = TRUE;
+	t0 = nt0;
+	dt = ndt;
+      }
+    setInterrupt();
+  }
+
+  async command uint32_t Alarm.getNow() {
+    return call Counter.get();
+  }
+
+  async command uint32_t Alarm.getAlarm() {
+    atomic return t0 + dt;
+  }
+
+  async event void Timer.overflow() { }
+}
diff --git a/tos/chips/atm128/timer/Atm128AlarmC.nc b/tos/chips/atm128/timer/Atm128AlarmC.nc
new file mode 100644
index 00000000..45d46746
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128AlarmC.nc
@@ -0,0 +1,128 @@
+/// $Id: Atm128AlarmC.nc,v 1.9 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Build a TEP102 Alarm from an Atmega128 hardware timer and one of its
+ * compare registers.
+ * @param frequency_tag The frequency tag for this Alarm
+ * @param timer_size The width of this Alarm
+ * @param mindt The shortest time in the future this Alarm can be set
+ *   (in its own time units). Has to be at least 2, as setting a compare
+ *   register one above the current counter value is unreliable. Has to be
+ *   large enough that the Alarm time does not pass between the computation
+ *   of <code>expires</code> and actually setting the compare register.
+ *   Check this (for high-frequency timers) by inspecting the generated
+ *   assembly code...
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <david.e.gay@intel.com>
+ */
+
+generic module Atm128AlarmC(typedef frequency_tag, 
+			    typedef timer_size @integer(),
+			    int mindt) @safe()
+{
+  provides interface Alarm<frequency_tag, timer_size> as Alarm @atmostonce();
+
+  uses interface HplAtm128Timer<timer_size>;
+  uses interface HplAtm128Compare<timer_size>;
+}
+implementation
+{
+  async command timer_size Alarm.getNow() {
+    return call HplAtm128Timer.get();
+  }
+
+  async command timer_size Alarm.getAlarm() {
+    return call HplAtm128Compare.get();
+  }
+
+  async command bool Alarm.isRunning() {
+    return call HplAtm128Compare.isOn();
+  }
+
+  async command void Alarm.stop() {
+    call HplAtm128Compare.stop();
+  }
+
+  async command void Alarm.start( timer_size dt ) 
+  {
+    call Alarm.startAt( call HplAtm128Timer.get(), dt);
+  }
+
+  async command void Alarm.startAt( timer_size t0, timer_size dt ) {
+    /* We don't set an interrupt before "now" + mindt to avoid setting
+       an interrupt which is in the past by the time we actually set
+       it. mindt should always be at least 2, because you cannot
+       reliably set an interrupt one cycle in the future. mindt should
+       also be large enough to cover the execution time of this
+       function. */
+    atomic
+      {
+	timer_size now, elapsed, expires;
+
+	dbg("Atm128AlarmC", "   starting timer at %llu with dt %llu\n",
+	    (uint64_t)t0, (uint64_t) dt);
+
+	now = call HplAtm128Timer.get();
+	elapsed = now + mindt - t0;
+	if (elapsed >= dt)
+	  expires = now + mindt;
+	else
+	  expires = t0 + dt;
+
+	/* Setting the compare register to "-1" is a bad idea
+	   (interrupt fires before counter overflow is detected, and all
+	   the "current time" stuff goes bad) */
+	if (expires == 0)
+	  expires = 1;
+
+	/* Note: all HplAtm128Compare.set values have one subtracted,
+	   because the comparisons are continuous, but the actual
+	   interrupt is signalled at the next timer clock cycle. */
+	call HplAtm128Compare.set(expires - 1);
+	call HplAtm128Compare.reset();
+	call HplAtm128Compare.start();
+      }
+  }
+
+  async event void HplAtm128Compare.fired() {
+    call HplAtm128Compare.stop();
+    dbg("Atm128AlarmC", " Compare fired, signal alarm above.\n");
+    __nesc_enable_interrupt();
+    signal Alarm.fired();
+  }
+
+  async event void HplAtm128Timer.overflow() {
+  }
+}
diff --git a/tos/chips/atm128/timer/Atm128Calibrate.nc b/tos/chips/atm128/timer/Atm128Calibrate.nc
new file mode 100644
index 00000000..7b21f3ab
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128Calibrate.nc
@@ -0,0 +1,61 @@
+// $Id: Atm128Calibrate.nc,v 1.4 2006-12-12 18:23:04 vlahan Exp $
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * This interface provides functions to compute ATmega128 configuration
+ * values that are clock-rate dependent. These include:<ul>
+ * <li>the ADC prescaler value necessary for full precision
+ * <li>values for the UBRR registers to achieve a specific baud rate
+ * <li>any adjustment necessary to values passed to some platform-provided
+ *   AlarmMicroXXC components to get more accurate timing
+ * <li>the number of cycles per 1/32768s (a typical implementation of this
+ *   interface will measure this value at boot time and use it to compute
+ *   the values above)
+ * </ul>
+ *
+ * @author David Gay
+ */
+
+interface Atm128Calibrate {
+  /**
+   * Return CPU cycles per 1/32768s.
+   * @return CPU cycles.
+   */
+  async command uint16_t cyclesPerJiffy();
+
+  /**
+   * Convert n microseconds into a value suitable for use with
+   * AlarmMicro32C Alarms.
+   * @param n Time in microseconds.
+   * @return AlarmMicro argument that best approximates n microseconds.
+   */
+  async command uint32_t calibrateMicro(uint32_t n);
+
+  /**
+   * Convert values used by AlarmMicro32C Alarms into actual microseconds.
+   * @param n A time expressed in AlarmMicro time units.
+   * @return Time in microseconds that corresponds to AlarmMicro argument n.
+   */
+  async command uint32_t actualMicro(uint32_t n);
+
+  /**
+   * Return the smallest ADC prescaler value which guaranteers full
+   * ADC precision.
+   * @return ADC prescaler value.
+   */
+  async command uint8_t adcPrescaler();
+
+  /**
+   * Return the value to use for the baudrate register to achieve a
+   * particular baud rate. Assumes U2X=1 (the USART is being run at
+   * double speed).
+   */
+  async command uint16_t baudrateRegister(uint32_t baudrate);
+}
diff --git a/tos/chips/atm128/timer/Atm128CaptureC.nc b/tos/chips/atm128/timer/Atm128CaptureC.nc
new file mode 100644
index 00000000..3bf67b77
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128CaptureC.nc
@@ -0,0 +1,104 @@
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  $Id: Atm128CaptureC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+ */
+
+/**
+ * Exposes Capture capability of hardware as general interface, 
+ * with some ATmega128 specific dependencies including:
+ *     Only available with the two 16-bit timers.
+ *     Each Timer has only one dedicated capture pin.
+ *         Timer1 == PortD.Pin4 [D4]
+ *         Timer3 == PortE.Pin7 [E7]
+ * So selection of 16-bit timer gives implicit wiring of actual Pin to capture.
+ *
+ *  @author Alan Broad, Crossbow <abroad@xbow.com>
+ *  @author Matt Miller, Crossbow <mmiller@xbow.com>
+ *  @author Martin Turon, Crossbow <mturon@xbow.com>
+ */
+generic module Atm128CaptureC () 
+{
+  provides {
+    interface Capture as CapturePin;
+  }
+  uses {
+    interface HplAtm128Capture<uint16_t>;
+    // interface HplAtm128Timer<uint16_t> as Timer;
+    // interface GeneralIO as PinToCapture;       // implicit to timer used
+  }
+}
+implementation
+{
+  // ************* CapturePin Interrupt handlers and dispatch *************
+
+  /**
+   *  CapturePin.enableCapture
+   *
+   * Configure Atmega128 TIMER to capture edge input of CapturePin signal.
+   * This will cause an interrupt and save TIMER count.
+   * TIMER Timebase is set by stdControl.start
+   *  -- see HplAtm128Capture interface and HplAtm128TimerM implementation
+   */
+  async command error_t CapturePin.enableCapture(bool low_to_high) {
+    atomic {
+      call HplAtm128Capture.stop();  // clear any capture interrupt
+      call HplAtm128Capture.setEdge(low_to_high);
+      call HplAtm128Capture.reset();
+      call HplAtm128Capture.start();
+    }
+    return SUCCESS;
+  }
+    
+  async command error_t CapturePin.disable() {
+    call HplAtm128Capture.stop();
+    return SUCCESS;
+  }
+    
+  /**
+   * Handle signal from HplAtm128Capture interface indicating an external 
+   * event has been timestamped. 
+   * Signal client with time and disable capture timer if nolonger needed.
+   */
+  async event void HplAtm128Capture.captured(uint16_t time) {
+    // first, signal client
+    error_t val = signal CapturePin.captured(time);     
+
+    if (val == FAIL) {
+      // if client returns failure, stop time capture
+      call HplAtm128Capture.stop();
+    } else { 
+      // otherwise, time capture keeps running, reset if needed
+      if (call HplAtm128Capture.test()) 
+	call HplAtm128Capture.reset();
+    }         
+  }
+}
diff --git a/tos/chips/atm128/timer/Atm128CounterC.nc b/tos/chips/atm128/timer/Atm128CounterC.nc
new file mode 100644
index 00000000..da2250b8
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128CounterC.nc
@@ -0,0 +1,70 @@
+//$Id: Atm128CounterC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Build a TEP102 Counter from an Atmega128 hardware timer.
+ * @param frequency_tag The frequency tag for this Counter
+ * @param timer_size The width of this Counter
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+generic module Atm128CounterC(typedef frequency_tag,
+			      typedef timer_size @integer()) @safe()
+{
+  provides interface Counter<frequency_tag,timer_size> as Counter;
+  uses interface HplAtm128Timer<timer_size> as Timer;
+}
+implementation
+{
+  async command timer_size Counter.get()
+  {
+    return call Timer.get();
+  }
+
+  async command bool Counter.isOverflowPending()
+  {
+    return call Timer.test();
+  }
+
+  async command void Counter.clearOverflow()
+  {
+    call Timer.reset();
+  }
+
+  async event void Timer.overflow()
+  {
+    signal Counter.overflow();
+  }
+}
+
diff --git a/tos/chips/atm128/timer/Atm128GpioCaptureC.nc b/tos/chips/atm128/timer/Atm128GpioCaptureC.nc
new file mode 100644
index 00000000..ed8e084c
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128GpioCaptureC.nc
@@ -0,0 +1,76 @@
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  $Id: Atm128GpioCaptureC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
+ */
+
+/**
+ * Expose capture capability as a GpioCapture interface from TEP117.
+ *
+ * @author Martin Turon, Crossbow <mturon@xbow.com>
+ */
+generic module Atm128GpioCaptureC() @safe() {
+
+  provides interface GpioCapture as Capture;
+  uses interface HplAtm128Capture<uint16_t> as Atm128Capture;
+
+}
+
+implementation {
+
+  error_t enableCapture( uint8_t mode ) {
+    atomic {
+      call Atm128Capture.stop();
+      call Atm128Capture.reset();
+      call Atm128Capture.setEdge( mode );
+      call Atm128Capture.start();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t Capture.captureRisingEdge() {
+    return enableCapture( TRUE );
+  }
+
+  async command error_t Capture.captureFallingEdge() {
+    return enableCapture( FALSE );
+  }
+
+  async command void Capture.disable() {
+    call Atm128Capture.stop();
+  }
+
+  async event void Atm128Capture.captured( uint16_t time ) {
+    call Atm128Capture.reset();
+    signal Capture.captured( time );
+  }
+
+}
diff --git a/tos/chips/atm128/timer/Atm128Timer.h b/tos/chips/atm128/timer/Atm128Timer.h
new file mode 100644
index 00000000..2a494505
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128Timer.h
@@ -0,0 +1,331 @@
+// $Id: Atm128Timer.h,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file contains the configuration constants for the Atmega128
+ * clocks and timers.
+ *
+ * @author Philip Levis
+ * @author Martin Turon
+ * @date   September 21 2005
+ */
+
+#ifndef _H_Atm128Timer_h
+#define _H_Atm128Timer_h
+
+//====================== 8 bit Timers ==================================
+
+// Timer0 and Timer2 are 8-bit timers.
+
+/* 8-bit Timer0 clock source select bits CS02, CS01, CS0 (page 103,
+   ATmega128L data sheet Rev. 2467M-AVR-11/04 */
+enum {
+  ATM128_CLK8_OFF         = 0x0,
+  ATM128_CLK8_NORMAL      = 0x1,
+  ATM128_CLK8_DIVIDE_8    = 0x2,
+  ATM128_CLK8_DIVIDE_32   = 0x3,
+  ATM128_CLK8_DIVIDE_64   = 0x4,
+  ATM128_CLK8_DIVIDE_128  = 0x5,
+  ATM128_CLK8_DIVIDE_256  = 0x6,
+  ATM128_CLK8_DIVIDE_1024 = 0x7,
+};
+
+enum {
+  ATM128_CLK16_OFF           = 0x0,
+  ATM128_CLK16_NORMAL        = 0x1,
+  ATM128_CLK16_DIVIDE_8      = 0x2,
+  ATM128_CLK16_DIVIDE_64     = 0x3,
+  ATM128_CLK16_DIVIDE_256    = 0x4,
+  ATM128_CLK16_DIVIDE_1024   = 0x5,
+  ATM128_CLK16_EXTERNAL_FALL = 0x6,
+  ATM128_CLK16_EXTERNAL_RISE = 0x7,
+};
+
+/* Common scales across both 8-bit and 16-bit clocks. */
+enum {
+    AVR_CLOCK_OFF = 0,
+    AVR_CLOCK_ON  = 1,
+    AVR_CLOCK_DIVIDE_8 = 2,
+};
+
+/* 8-bit Waveform Generation Modes */
+enum {
+    ATM128_WAVE8_NORMAL = 0,
+    ATM128_WAVE8_PWM,
+    ATM128_WAVE8_CTC,
+    ATM128_WAVE8_PWM_FAST,
+};
+
+/* 8-bit Timer compare settings */
+enum {
+    ATM128_COMPARE_OFF = 0,  //!< compare disconnected
+    ATM128_COMPARE_TOGGLE,   //!< toggle on match (PWM reserved
+    ATM128_COMPARE_CLEAR,    //!< clear on match  (PWM downcount)
+    ATM128_COMPARE_SET,      //!< set on match    (PWN upcount)
+};
+
+/* 8-bit Timer Control Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t cs    : 3;  //!< Clock Source Select
+    uint8_t wgm1  : 1;  //!< Waveform generation mode (high bit)
+    uint8_t com   : 2;  //!< Compare Match Output
+    uint8_t wgm0  : 1;  //!< Waveform generation mode (low bit)
+    uint8_t foc   : 1;  //!< Force Output Compare
+  } bits;
+} Atm128TimerControl_t;
+
+typedef Atm128TimerControl_t Atm128_TCCR0_t;  //!< Timer0 Control Register
+typedef uint8_t Atm128_TCNT0_t;               //!< Timer0 Control Register
+typedef uint8_t Atm128_OCR0_t;         //!< Timer0 Output Compare Register
+
+typedef Atm128TimerControl_t Atm128_TCCR2_t;  //!< Timer2 Control Register
+typedef uint8_t Atm128_TCNT2_t;               //!< Timer2 Control Register
+typedef uint8_t Atm128_OCR2_t;         //!< Timer2 Output Compare Register
+// Timer2 shares compare lines with Timer1C
+
+/* Asynchronous Status Register -- Timer0 */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t tcr0ub : 1;  //!< Timer0 Control Resgister Update Busy
+    uint8_t ocr0ub : 1;  //!< Timer0 Output Compare Register Update Busy
+    uint8_t tcn0ub : 1;  //!< Timer0 Update Busy
+    uint8_t as0    : 1;  //!< Asynchronous Timer/Counter (off=CPU,on=32KHz osc)
+    uint8_t rsvd   : 4;  //!< Reserved
+  } bits;
+} Atm128Assr_t;
+
+/* Timer/Counter Interrupt Mask Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t toie0 : 1; //!< Timer0 Overflow Interrupt Enable
+    uint8_t ocie0 : 1; //!< Timer0 Output Compare Interrupt Enable
+    uint8_t toie1 : 1; //!< Timer1 Overflow Interrupt Enable
+    uint8_t ocie1b: 1; //!< Timer1 Output Compare B Interrupt Enable
+    uint8_t ocie1a: 1; //!< Timer1 Output Compare A Interrupt Enable
+    uint8_t ticie1: 1; //!< Timer1 Input Capture Enable
+    uint8_t toie2 : 1; //!< Timer2 Overflow Interrupt Enable
+    uint8_t ocie2 : 1; //!< Timer2 Output Compare Interrupt Enable
+  } bits;
+} Atm128_TIMSK_t;
+// + Note: Contains some 16-bit Timer flags
+
+/* Timer/Counter Interrupt Flag Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t tov0  : 1; //!< Timer0 Overflow Flag
+    uint8_t ocf0  : 1; //!< Timer0 Output Compare Flag
+    uint8_t tov1  : 1; //!< Timer1 Overflow Flag
+    uint8_t ocf1b : 1; //!< Timer1 Output Compare B Flag
+    uint8_t ocf1a : 1; //!< Timer1 Output Compare A Flag
+    uint8_t icf1  : 1; //!< Timer1 Input Capture Flag 
+    uint8_t tov2  : 1; //!< Timer2 Overflow Flag
+    uint8_t ocf2  : 1; //!< Timer2 Output Compare Flag
+  } bits;
+} Atm128_TIFR_t;
+// + Note: Contains some 16-bit Timer flags
+
+/* Timer/Counter Interrupt Flag Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t psr321 : 1; //!< Prescaler Reset Timer1,2,3
+    uint8_t psr0   : 1; //!< Prescaler Reset Timer0
+    uint8_t pud    : 1; //!< 
+    uint8_t acme   : 1; //!< 
+    uint8_t rsvd   : 3; //!< Reserved
+    uint8_t tsm    : 1; //!< Timer/Counter Synchronization Mode
+  } bits;
+} Atm128_SFIOR_t;
+
+
+//====================== 16 bit Timers ==================================
+
+// Timer1 and Timer3 are both 16-bit, and have three compare channels: (A,B,C)
+
+enum {
+    ATM128_TIMER_COMPARE_NORMAL = 0,
+    ATM128_TIMER_COMPARE_TOGGLE,
+    ATM128_TIMER_COMPARE_CLEAR,
+    ATM128_TIMER_COMPARE_SET
+};
+
+/* Timer/Counter Control Register A Type */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t wgm10 : 2;   //!< Waveform generation mode
+    uint8_t comC  : 2;   //!< Compare Match Output C
+    uint8_t comB  : 2;   //!< Compare Match Output B
+    uint8_t comA  : 2;   //!< Compare Match Output A
+  } bits;
+} Atm128TimerCtrlCompare_t;
+
+/* Timer1 Compare Control Register A */
+typedef Atm128TimerCtrlCompare_t Atm128_TCCR1A_t;
+
+/* Timer3 Compare Control Register A */
+typedef Atm128TimerCtrlCompare_t Atm128_TCCR3A_t;
+
+/* 16-bit Waveform Generation Modes */
+enum {
+    ATM128_WAVE16_NORMAL = 0,
+    ATM128_WAVE16_PWM_8BIT,
+    ATM128_WAVE16_PWM_9BIT,
+    ATM128_WAVE16_PWM_10BIT,
+    ATM128_WAVE16_CTC_COMPARE,
+    ATM128_WAVE16_PWM_FAST_8BIT,
+    ATM128_WAVE16_PWM_FAST_9BIT,
+    ATM128_WAVE16_PWM_FAST_10BIT,
+    ATM128_WAVE16_PWM_CAPTURE_LOW,
+    ATM128_WAVE16_PWM_COMPARE_LOW,
+    ATM128_WAVE16_PWM_CAPTURE_HIGH,
+    ATM128_WAVE16_PWM_COMPARE_HIGH,
+    ATM128_WAVE16_CTC_CAPTURE,
+    ATM128_WAVE16_RESERVED,
+    ATM128_WAVE16_PWM_FAST_CAPTURE,
+    ATM128_WAVE16_PWM_FAST_COMPARE,
+};
+
+/* Timer/Counter Control Register B Type */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t cs    : 3;   //!< Clock Source Select
+    uint8_t wgm32 : 2;   //!< Waveform generation mode
+    uint8_t rsvd  : 1;   //!< Reserved
+    uint8_t ices1 : 1;   //!< Input Capture Edge Select (1=rising, 0=falling)
+    uint8_t icnc1 : 1;   //!< Input Capture Noise Canceler
+  } bits;
+} Atm128TimerCtrlCapture_t;
+
+/* Timer1 Control Register B */
+typedef Atm128TimerCtrlCapture_t Atm128_TCCR1B_t;
+
+/* Timer3 Control Register B */
+typedef Atm128TimerCtrlCapture_t Atm128_TCCR3B_t;
+
+/* Timer/Counter Control Register C Type */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t rsvd  : 5;   //!< Reserved
+    uint8_t focC  : 1;   //!< Force Output Compare Channel C
+    uint8_t focB  : 1;   //!< Force Output Compare Channel B
+    uint8_t focA  : 1;   //!< Force Output Compare Channel A
+  } bits;
+} Atm128TimerCtrlClock_t;
+
+/* Timer1 Control Register B */
+typedef Atm128TimerCtrlClock_t Atm128_TCCR1C_t;
+
+/* Timer3 Control Register B */
+typedef Atm128TimerCtrlClock_t Atm128_TCCR3C_t;
+
+// Read/Write these 16-bit Timer registers according to p.112:
+// Access as bytes.  Read low before high.  Write high before low. 
+typedef uint8_t Atm128_TCNT1H_t;  //!< Timer1 Register
+typedef uint8_t Atm128_TCNT1L_t;  //!< Timer1 Register
+typedef uint8_t Atm128_TCNT3H_t;  //!< Timer3 Register
+typedef uint8_t Atm128_TCNT3L_t;  //!< Timer3 Register
+
+/* Contains value to continuously compare with Timer1 */
+typedef uint8_t Atm128_OCR1AH_t;  //!< Output Compare Register 1A
+typedef uint8_t Atm128_OCR1AL_t;  //!< Output Compare Register 1A
+typedef uint8_t Atm128_OCR1BH_t;  //!< Output Compare Register 1B
+typedef uint8_t Atm128_OCR1BL_t;  //!< Output Compare Register 1B
+typedef uint8_t Atm128_OCR1CH_t;  //!< Output Compare Register 1C
+typedef uint8_t Atm128_OCR1CL_t;  //!< Output Compare Register 1C
+
+/* Contains value to continuously compare with Timer3 */
+typedef uint8_t Atm128_OCR3AH_t;  //!< Output Compare Register 3A
+typedef uint8_t Atm128_OCR3AL_t;  //!< Output Compare Register 3A
+typedef uint8_t Atm128_OCR3BH_t;  //!< Output Compare Register 3B
+typedef uint8_t Atm128_OCR3BL_t;  //!< Output Compare Register 3B
+typedef uint8_t Atm128_OCR3CH_t;  //!< Output Compare Register 3C
+typedef uint8_t Atm128_OCR3CL_t;  //!< Output Compare Register 3C
+
+/* Contains counter value when event occurs on ICPn pin. */
+typedef uint8_t Atm128_ICR1H_t;  //!< Input Capture Register 1
+typedef uint8_t Atm128_ICR1L_t;  //!< Input Capture Register 1
+typedef uint8_t Atm128_ICR3H_t;  //!< Input Capture Register 3
+typedef uint8_t Atm128_ICR3L_t;  //!< Input Capture Register 3
+
+/* Extended Timer/Counter Interrupt Mask Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t ocie1c: 1; //!< Timer1 Output Compare C Interrupt Enable
+    uint8_t ocie3c: 1; //!< Timer3 Output Compare C Interrupt Enable
+    uint8_t toie3 : 1; //!< Timer3 Overflow Interrupt Enable
+    uint8_t ocie3b: 1; //!< Timer3 Output Compare B Interrupt Enable
+    uint8_t ocie3a: 1; //!< Timer3 Output Compare A Interrupt Enable
+    uint8_t ticie3: 1; //!< Timer3 Input Capture Interrupt Enable
+    uint8_t rsvd  : 2; //!< Timer2 Output Compare Interrupt Enable
+  } bits;
+} Atm128_ETIMSK_t;
+
+/* Extended Timer/Counter Interrupt Flag Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t ocf1c : 1; //!< Timer1 Output Compare C Flag
+    uint8_t ocf3c : 1; //!< Timer3 Output Compare C Flag
+    uint8_t tov3  : 1; //!< Timer/Counter Overflow Flag
+    uint8_t ocf3b : 1; //!< Timer3 Output Compare B Flag
+    uint8_t ocf3a : 1; //!< Timer3 Output Compare A Flag
+    uint8_t icf3  : 1; //!< Timer3 Input Capture Flag 
+    uint8_t rsvd  : 2; //!< Reserved
+  } bits;
+} Atm128_ETIFR_t;
+
+/* Resource strings for timer 1 and 3 compare registers */
+#define UQ_TIMER1_COMPARE "atm128.timer1"
+#define UQ_TIMER3_COMPARE "atm128.timer3"
+
+#endif //_H_Atm128Timer_h
+
diff --git a/tos/chips/atm128/timer/Atm128TimerInitC.nc b/tos/chips/atm128/timer/Atm128TimerInitC.nc
new file mode 100644
index 00000000..60f9c5e8
--- /dev/null
+++ b/tos/chips/atm128/timer/Atm128TimerInitC.nc
@@ -0,0 +1,62 @@
+/// $Id: Atm128TimerInitC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Initialise an Atmega128 timer to a particular prescaler. Expected to be
+ * used at boot time.
+ * @param timer_size Integer type of the timer
+ * @param prescaler Desired prescaler value
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <david.e.gay@intel.com>
+ */
+
+generic module Atm128TimerInitC(typedef timer_size @integer(), uint8_t prescaler) @safe()
+{
+  provides interface Init @atleastonce();
+  uses interface HplAtm128Timer<timer_size> as Timer;
+}
+implementation
+{
+  command error_t Init.init() {
+    atomic {
+      call Timer.set(0);
+      call Timer.start();
+      call Timer.setScale(prescaler);
+    }
+    return SUCCESS;
+  }
+
+  async event void Timer.overflow() {
+  }
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Capture.nc b/tos/chips/atm128/timer/HplAtm128Capture.nc
new file mode 100644
index 00000000..dfae8f7a
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Capture.nc
@@ -0,0 +1,89 @@
+/// $Id: HplAtm128Capture.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL Interface to Atmega128 capture capabilities.
+ * @param size_type Integer type of capture register
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+interface HplAtm128Capture<size_type>
+{
+  // ==== Capture value register: Direct access ======================
+  /** 
+   * Get the time to be captured.
+   * @return  the capture time
+   */
+  async command size_type get();
+
+  /** 
+   * Set the time to be captured.
+   * @param t     the time of the next capture event
+   */
+  async command void      set(size_type t);
+
+  // ==== Interrupt signals ==========================================
+  /** 
+   * Signalled on capture interrupt.
+   * @param t     the time of the capture event
+   */
+  async event void captured(size_type t);
+
+  // ==== Interrupt flag utilites: Bit level set/clr =================
+  /** Clear the capture interrupt flag. */
+  async command void reset();
+
+  /** Enable the capture interrupt. */
+  async command void start();          
+
+  /** Turn off capture interrupts. */
+  async command void stop();
+
+  /** 
+   * Did a capture interrupt occur?
+   * @return TRUE if capture triggered, FALSE otherwise
+   */
+  async command bool test();           
+
+  /** 
+   * Is capture interrupt on? 
+   * @return TRUE if capture enabled, FALSE otherwise
+   */
+  async command bool isOn();           
+
+  /** 
+   * Sets the capture edge.
+   * @param up   TRUE = detect rising edge, FALSE = detect falling edge
+   */
+  async command void setEdge(bool up);
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Compare.nc b/tos/chips/atm128/timer/HplAtm128Compare.nc
new file mode 100644
index 00000000..a946348b
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Compare.nc
@@ -0,0 +1,82 @@
+/// $Id: HplAtm128Compare.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL Interface to Atmega128 compare registers.
+ * @param size_type Integer type of compare register
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+interface HplAtm128Compare<size_type>
+{
+  // ==== Compare value register: Direct access ======================
+  /** 
+   * Get the compare time to fire on.
+   * @return  the compare time value
+   */
+  async command size_type get();
+
+  /** 
+   * Set the compare time to fire on.
+   * @param t     the compare time to set
+   */
+  async command void set(size_type t);
+
+  // ==== Interrupt signals ==========================================
+  /** Signalled on  interrupt. */
+  async event void fired();           //<! Signalled on compare interrupt
+
+  // ==== Interrupt flag utilites: Bit level set/clr =================
+  /** Clear the compare interrupt flag. */
+  async command void reset();         
+
+  /** Enable the compare interrupt. */
+  async command void start();         
+
+  /** Turn off comparee interrupts. */
+  async command void stop();          
+
+  /** 
+   * Did compare interrupt occur? 
+   * @return TRUE if compare triggered, FALSE otherwise
+   */
+  async command bool test();          
+
+  /** 
+   * Is compare interrupt on?
+   * @return TRUE if compare enabled, FALSE otherwise
+   */
+  async command bool isOn();
+}
+
diff --git a/tos/chips/atm128/timer/HplAtm128Timer.nc b/tos/chips/atm128/timer/HplAtm128Timer.nc
new file mode 100644
index 00000000..7882661e
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer.nc
@@ -0,0 +1,111 @@
+/// $Id: HplAtm128Timer.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic interface to the hardware timers on an ATmega128.  
+ * <p>
+ * This interface is designed to be independent of whether the underlying 
+ * hardware is an 8-bit or 16-bit wide counter.  As such, timer_size is 
+ * specified via a generics parameter.  Because this is exposing a common 
+ * subset of functionality that all ATmega128 hardware timers share, all 
+ * that is exposed is access to the overflow capability.  Compare and capture
+ * functionality are exposed on separate interfaces to allow easy 
+ * configurability via wiring.
+ * <p>
+ * This interface provides four major groups of functionality:<ol>
+ *      <li>Timer Value: get/set current time
+ *      <li>Overflow Interrupt event
+ *      <li>Control of Overflow Interrupt: start/stop/clear...
+ *      <li>Timer Initialization: turn on/off clock source
+ * </ol>
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+interface HplAtm128Timer<timer_size>
+{
+  /** 
+   * Get the current time.
+   * @return  the current time
+   */
+  async command timer_size get();
+
+  /** 
+   * Set the current time.
+   * @param t     the time to set
+   */
+  async command void       set( timer_size t );
+
+  /** Signalled on timer overflow interrupt. */
+  async event void overflow();
+
+  // ==== Interrupt flag utilites: Bit level set/clr =================
+
+  /** Clear the overflow interrupt flag. */
+  async command void reset();
+
+  /** Enable the overflow interrupt. */
+  async command void start();
+
+  /** Turn off overflow interrupts. */
+  async command void stop();
+
+  /** 
+   * Did an overflow interrupt occur?
+   * @return TRUE if overflow triggered, FALSE otherwise
+   */
+  async command bool test();
+
+  /** 
+   * Is overflow interrupt on? 
+   * @return TRUE if overflow enabled, FALSE otherwise
+   */
+  async command bool isOn();
+
+  // ==== Clock initialization interface =============================
+
+  /** Turn off the clock. */
+  async command void    off();
+
+  /** 
+   * Turn on the clock.
+   * @param scale   Prescaler setting of clock -- see Atm128Timer.h
+   */
+  async command void    setScale( uint8_t scale);
+
+  /** 
+   * Get prescaler setting.
+   * @return  Prescaler setting of clock -- see Atm128Timer.h
+   */
+  async command uint8_t getScale();
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer0AsyncC.nc b/tos/chips/atm128/timer/HplAtm128Timer0AsyncC.nc
new file mode 100644
index 00000000..e69d9497
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer0AsyncC.nc
@@ -0,0 +1,64 @@
+/// $Id: HplAtm128Timer0AsyncC.nc,v 1.7 2007-03-29 21:07:25 idgay Exp $
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple wrapper around the actual timer implementation that automatically
+ * wires it to McuSleepC for low-power calculations..
+ *
+ * @author Philip Levis
+ * @author David Gay
+ */
+
+#include <Atm128Timer.h>
+
+configuration HplAtm128Timer0AsyncC
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface HplAtm128TimerAsync       as TimerAsync;
+  }
+}
+implementation
+{
+  components HplAtm128Timer0AsyncP;
+  components McuSleepC;
+
+  McuSleepC.McuPowerOverride -> HplAtm128Timer0AsyncP;
+
+  Timer = HplAtm128Timer0AsyncP;
+  TimerCtrl = HplAtm128Timer0AsyncP;
+  Compare = HplAtm128Timer0AsyncP;
+  TimerAsync = HplAtm128Timer0AsyncP;
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer0AsyncP.nc b/tos/chips/atm128/timer/HplAtm128Timer0AsyncP.nc
new file mode 100644
index 00000000..6bd04b41
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer0AsyncP.nc
@@ -0,0 +1,222 @@
+/// $Id: HplAtm128Timer0AsyncP.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to Atmega128 timer 0 in ASYNC mode. This is a specialised
+ * HPL component that assumes that timer 0 is used in ASYNC mode and
+ * includes some workarounds for some of the weirdnesses (delayed overflow
+ * interrupt) of that mode.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm128Timer0AsyncP @safe() {
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface McuPowerOverride;
+    interface HplAtm128TimerAsync       as TimerAsync;
+  }
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer.get() { return TCNT0; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint8_t t)  {
+    TCNT0 = t;
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR0 & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128TimerControl_t x = call TimerCtrl.getControl();
+    x.bits.cs = s;
+    call TimerCtrl.setControl(x);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t TimerCtrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR0; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setControl( Atm128TimerControl_t x ) { 
+    TCCR0 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t TimerCtrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t TimerCtrl.getInterruptFlag() { 
+    return *(Atm128_TIFR_t*)&TIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer.reset() { TIFR = 1 << TOV0; }
+  async command void Timer.start() { SET_BIT(TIMSK, TOIE0); }
+  async command void Timer.stop()  { CLR_BIT(TIMSK, TOIE0); }
+
+  bool overflowed() {
+    return (call TimerCtrl.getInterruptFlag()).bits.tov0; 
+  }
+
+  async command bool Timer.test()  { 
+    return overflowed();
+  }
+  async command bool Timer.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.toie0; 
+  }
+  async command void Compare.reset() { TIFR = 1 << OCF0; }
+  async command void Compare.start() { SET_BIT(TIMSK,OCIE0); }
+  async command void Compare.stop()  { CLR_BIT(TIMSK,OCIE0); }
+  async command bool Compare.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf0; 
+  }
+  async command bool Compare.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.ocie0; 
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint8_t Compare.get()   { return OCR0; }
+
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(uint8_t t)   { 
+    OCR0 = t; 
+  }
+
+  //=== Timer interrupts signals ========================================
+  inline void stabiliseTimer0() {
+    TCCR0 = TCCR0;
+    while (ASSR & 1 << TCR0UB)
+      ;
+  }
+
+  /**
+   * On the atm128, there is a small latency when waking up from
+   * POWER_SAVE mode. So if a timer is going to go off very soon, it's
+   * better to drop down until EXT_STANDBY, which has a 6 cycle wakeup
+   * latency. This function calculates whether staying in EXT_STANDBY
+   * is needed. If the timer is not running it returns POWER_DOWN.
+   * Please refer to TEP 112 and the atm128 datasheet for details.
+   */
+  
+  async command mcu_power_t McuPowerOverride.lowestState() {
+    uint8_t diff;
+    // We need to make sure that the sleep wakeup latency will not
+    // cause us to miss a timer. POWER_SAVE 
+    if (TIMSK & (1 << OCIE0 | 1 << TOIE0)) {
+      // need to wait for timer 0 updates propagate before sleeping
+      // (we don't need to worry about reentering sleep mode too early,
+      // as the wake ups from timer0 wait at least one TOSC1 cycle
+      // anyway - see the stabiliseTimer0 function)
+      while (ASSR & (1 << TCN0UB | 1 << OCR0UB | 1 << TCR0UB))
+	;
+      diff = OCR0 - TCNT0;
+      if (diff < EXT_STANDBY_T0_THRESHOLD ||
+	  TCNT0 > 256 - EXT_STANDBY_T0_THRESHOLD) 
+	return ATM128_POWER_EXT_STANDBY;
+      return ATM128_POWER_SAVE;
+    }
+    else {
+      return ATM128_POWER_DOWN;
+    }
+  }
+  
+  default async event void Compare.fired() { }
+  AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) {
+    stabiliseTimer0();
+    signal Compare.fired();
+  }
+
+  default async event void Timer.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) {
+    stabiliseTimer0();
+    signal Timer.overflow();
+  }
+
+  // Asynchronous status register support
+  async command Atm128Assr_t TimerAsync.getAssr() {
+    return *(Atm128Assr_t *)&ASSR;
+  }
+
+  async command void TimerAsync.setAssr(Atm128Assr_t x) {
+    ASSR = x.flat;
+  }
+
+  async command void TimerAsync.setTimer0Asynchronous() {
+    ASSR |= 1 << AS0;
+  }
+
+  async command int TimerAsync.controlBusy() {
+    return (ASSR & (1 << TCR0UB)) != 0;
+  }
+
+  async command int TimerAsync.compareBusy() {
+    return (ASSR & (1 << OCR0UB)) != 0;
+  }
+
+  async command int TimerAsync.countBusy() {
+    return (ASSR & (1 << TCN0UB)) != 0;
+  }
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer1C.nc b/tos/chips/atm128/timer/HplAtm128Timer1C.nc
new file mode 100644
index 00000000..757ebc43
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer1C.nc
@@ -0,0 +1,64 @@
+/// $Id: HplAtm128Timer1C.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to Atmega128 timer 1.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+configuration HplAtm128Timer1C
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as Compare[uint8_t id];
+  }
+}
+implementation
+{
+  components HplAtm128Timer0AsyncC, HplAtm128Timer1P;
+
+  Timer = HplAtm128Timer1P;
+  TimerCtrl = HplAtm128Timer1P;
+  Capture = HplAtm128Timer1P;
+
+  Compare[0] = HplAtm128Timer1P.CompareA; 
+  Compare[1] = HplAtm128Timer1P.CompareB;
+  Compare[2] = HplAtm128Timer1P.CompareC;
+
+  HplAtm128Timer1P.Timer0Ctrl -> HplAtm128Timer0AsyncC;
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer1P.nc b/tos/chips/atm128/timer/HplAtm128Timer1P.nc
new file mode 100644
index 00000000..c8276125
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer1P.nc
@@ -0,0 +1,223 @@
+/// $Id: HplAtm128Timer1P.nc,v 1.8 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Internal component of the HPL interface to Atmega128 timer 1.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm128Timer1P @safe()
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as CompareA;
+    interface HplAtm128Compare<uint16_t> as CompareB;
+    interface HplAtm128Compare<uint16_t> as CompareC;
+  }
+  uses interface HplAtm128TimerCtrl8     as Timer0Ctrl;
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint16_t Timer.get() { return TCNT1; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint16_t t) { TCNT1 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR1B & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128TimerCtrlCapture_t x = call TimerCtrl.getCtrlCapture();
+    x.bits.cs = s;
+    call TimerCtrl.setCtrlCapture(x);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerCtrlCompare_t TimerCtrl.getCtrlCompare() { 
+    return *(Atm128TimerCtrlCompare_t*ONE)&TCCR1A; 
+  }
+  async command Atm128TimerCtrlCapture_t TimerCtrl.getCtrlCapture() { 
+    return *(Atm128TimerCtrlCapture_t*ONE)&TCCR1B; 
+  }
+  async command Atm128TimerCtrlClock_t TimerCtrl.getCtrlClock() { 
+    return *(Atm128TimerCtrlClock_t*ONE)&TCCR1C; 
+  }
+
+
+  //=== Control registers utilities. ==================================
+  DEFINE_UNION_CAST(TimerCtrlCompare2int, Atm128TimerCtrlCompare_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t);
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setCtrlCompare( Atm128_TCCR1A_t x ) { 
+    TCCR1A = TimerCtrlCompare2int(x); 
+  }
+  async command void TimerCtrl.setCtrlCapture( Atm128_TCCR1B_t x ) { 
+    TCCR1B = TimerCtrlCapture2int(x); 
+  }
+  async command void TimerCtrl.setCtrlClock( Atm128_TCCR1C_t x ) { 
+    TCCR1C = TimerCtrlClock2int(x); 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_ETIMSK_t TimerCtrl.getInterruptMask() { 
+    return *(Atm128_ETIMSK_t*)&ETIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptMask( Atm128_ETIMSK_t x ) { 
+    ETIMSK = TimerMask16_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_ETIFR_t TimerCtrl.getInterruptFlag() { 
+    return *(Atm128_ETIFR_t*ONE)&ETIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptFlag( Atm128_ETIFR_t x ) { 
+    ETIFR = TimerFlags16_2int(x); 
+  }
+
+  //=== Capture 16-bit implementation. ===================================
+  async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR1B,ICES1, up); }
+
+  //=== Timer 16-bit implementation. ===================================
+  async command void Timer.reset()    { TIFR = 1 << TOV1; }
+  async command void Capture.reset()  { TIFR = 1 << ICF1; }
+  async command void CompareA.reset() { TIFR = 1 << OCF1A; }
+  async command void CompareB.reset() { TIFR = 1 << OCF1B; }
+  async command void CompareC.reset() { ETIFR = 1 << OCF1C; }
+
+  async command void Timer.start()    { SET_BIT(TIMSK,TOIE1); }
+  async command void Capture.start()  { SET_BIT(TIMSK,TICIE1); }
+  async command void CompareA.start() { SET_BIT(TIMSK,OCIE1A); }
+  async command void CompareB.start() { SET_BIT(TIMSK,OCIE1B); }
+  async command void CompareC.start() { SET_BIT(ETIMSK,OCIE1C); }
+
+  async command void Timer.stop()    { CLR_BIT(TIMSK,TOIE1); }
+  async command void Capture.stop()  { CLR_BIT(TIMSK,TICIE1); }
+  async command void CompareA.stop() { CLR_BIT(TIMSK,OCIE1A); }
+  async command void CompareB.stop() { CLR_BIT(TIMSK,OCIE1B); }
+  async command void CompareC.stop() { CLR_BIT(ETIMSK,OCIE1C); }
+
+  // Note: Many Timer interrupt flags are on Timer0 register
+  async command bool Timer.test() { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.tov1; 
+  }
+  async command bool Capture.test()  { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.icf1; 
+  }
+  async command bool CompareA.test() { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.ocf1a; 
+  }
+  async command bool CompareB.test() { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.ocf1b; 
+  }
+  async command bool CompareC.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf1c; 
+  }
+
+  // Note: Many Timer interrupt mask bits are on Timer0 register
+  async command bool Timer.isOn() {
+    return (call Timer0Ctrl.getInterruptMask()).bits.toie1;
+  }
+  async command bool Capture.isOn()  {
+    return (call Timer0Ctrl.getInterruptMask()).bits.ticie1;
+  }
+  async command bool CompareA.isOn() {
+    return (call Timer0Ctrl.getInterruptMask()).bits.ocie1a;
+  }
+  async command bool CompareB.isOn() {
+    return (call Timer0Ctrl.getInterruptMask()).bits.ocie1b;
+  }
+  async command bool CompareC.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.ocie1c;
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint16_t CompareA.get() { return OCR1A; }
+  async command uint16_t CompareB.get() { return OCR1B; }
+  async command uint16_t CompareC.get() { return OCR1C; }
+
+  //=== Write the compare registers. ====================================
+  async command void CompareA.set(uint16_t t) { OCR1A = t; }
+  async command void CompareB.set(uint16_t t) { OCR1B = t; }
+  async command void CompareC.set(uint16_t t) { OCR1C = t; }
+
+  //=== Read the capture registers. =====================================
+  async command uint16_t Capture.get() { return ICR1; }
+
+  //=== Write the capture registers. ====================================
+  async command void Capture.set(uint16_t t)  { ICR1 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void CompareA.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1A) {
+    signal CompareA.fired();
+  }
+  default async event void CompareB.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1B) {
+    signal CompareB.fired();
+  }
+  default async event void CompareC.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1C) {
+    signal CompareC.fired();
+  }
+  default async event void Capture.captured(uint16_t time) { }
+  AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE1) {
+    signal Capture.captured(call Capture.get());
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW1) {
+    signal Timer.overflow();
+  }
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer2C.nc b/tos/chips/atm128/timer/HplAtm128Timer2C.nc
new file mode 100644
index 00000000..44518940
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer2C.nc
@@ -0,0 +1,145 @@
+/// $Id: HplAtm128Timer2C.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to Atmega128 timer 2.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm128Timer2C
+{
+  provides {
+    interface HplAtm128Timer<uint8_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+  }
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer.get() { return TCNT2; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint8_t t)  { TCNT2 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR2 & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128TimerControl_t x = call TimerCtrl.getControl();
+    x.bits.cs = s;
+    call TimerCtrl.setControl(x);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t TimerCtrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR2; 
+  }
+
+  //=== Control registers utilities. ==================================
+  DEFINE_UNION_CAST(TimerCtrlCompareint, Atm128TimerCtrlCompare_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t);
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setControl( Atm128TimerControl_t x ) { 
+    TCCR2 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t TimerCtrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t TimerCtrl.getInterruptFlag() { 
+    return *(Atm128_TIFR_t*)&TIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer.reset() { TIFR = 1 << TOV2; }
+  async command void Timer.start() { SET_BIT(TIMSK,TOIE2); }
+  async command void Timer.stop()  { CLR_BIT(TIMSK,TOIE2); }
+  async command bool Timer.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.tov2; 
+  }
+  async command bool Timer.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.toie2; 
+  }
+  async command void Compare.reset() { TIFR = 1 << OCF2; }
+  async command void Compare.start() { SET_BIT(TIMSK,OCIE2); }
+  async command void Compare.stop()  { CLR_BIT(TIMSK,OCIE2); }
+  async command bool Compare.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf2; 
+  }
+  async command bool Compare.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.ocie2; 
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint8_t Compare.get()   { return OCR2; }
+
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(uint8_t t)   { OCR2 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void Compare.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE2) {
+    signal Compare.fired();
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW2) {
+    signal Timer.overflow();
+  }
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer3C.nc b/tos/chips/atm128/timer/HplAtm128Timer3C.nc
new file mode 100644
index 00000000..ec8829e3
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer3C.nc
@@ -0,0 +1,62 @@
+/// $Id: HplAtm128Timer3C.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to Atmega128 timer 2.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <david.e.gay@intel.com>
+ */
+
+configuration HplAtm128Timer3C
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as Compare[uint8_t id];
+  }
+}
+implementation
+{
+  components HplAtm128Timer3P;
+
+  Timer = HplAtm128Timer3P;
+  TimerCtrl = HplAtm128Timer3P;
+  Capture = HplAtm128Timer3P;
+
+  Compare[0] = HplAtm128Timer3P.CompareA; 
+  Compare[1] = HplAtm128Timer3P.CompareB;
+  Compare[2] = HplAtm128Timer3P.CompareC;
+}
diff --git a/tos/chips/atm128/timer/HplAtm128Timer3P.nc b/tos/chips/atm128/timer/HplAtm128Timer3P.nc
new file mode 100644
index 00000000..eaa5c175
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128Timer3P.nc
@@ -0,0 +1,217 @@
+/// $Id: HplAtm128Timer3P.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Internal componentr of the HPL interface to Atmega128 timer 3.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm128Timer3P
+{
+  provides {
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as CompareA;
+    interface HplAtm128Compare<uint16_t> as CompareB;
+    interface HplAtm128Compare<uint16_t> as CompareC;
+  }
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint16_t Timer.get() { return TCNT3; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint16_t t) { TCNT3 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR3B & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128TimerCtrlCapture_t x = call TimerCtrl.getCtrlCapture();
+    x.bits.cs = s;
+    call TimerCtrl.setCtrlCapture(x);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerCtrlCompare_t TimerCtrl.getCtrlCompare() { 
+    return *(Atm128TimerCtrlCompare_t*)&TCCR3A; 
+  }
+  async command Atm128TimerCtrlCapture_t TimerCtrl.getCtrlCapture() { 
+    return *(Atm128TimerCtrlCapture_t*)&TCCR3B; 
+  }
+  async command Atm128TimerCtrlClock_t TimerCtrl.getCtrlClock() { 
+    return *(Atm128TimerCtrlClock_t*)&TCCR3C; 
+  }
+
+
+  //=== Control registers utilities. ==================================
+  DEFINE_UNION_CAST(TimerCtrlCompare2int, Atm128TimerCtrlCompare_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t);
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setCtrlCompare( Atm128_TCCR3A_t x ) { 
+    TCCR3A = TimerCtrlCompare2int(x); 
+  }
+  async command void TimerCtrl.setCtrlCapture( Atm128_TCCR3B_t x ) { 
+    TCCR3B = TimerCtrlCapture2int(x); 
+  }
+  async command void TimerCtrl.setCtrlClock( Atm128_TCCR3C_t x ) { 
+    TCCR3C = TimerCtrlClock2int(x); 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_ETIMSK_t TimerCtrl.getInterruptMask() { 
+    return *(Atm128_ETIMSK_t*)&ETIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptMask( Atm128_ETIMSK_t x ) { 
+    ETIMSK = TimerMask16_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_ETIFR_t TimerCtrl.getInterruptFlag() { 
+    return *(Atm128_ETIFR_t*)&ETIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptFlag( Atm128_ETIFR_t x ) { 
+    ETIFR = TimerFlags16_2int(x); 
+  }
+
+  //=== Capture 16-bit implementation. ===================================
+  async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR3B,ICES3, up); }
+
+  //=== Timer 16-bit implementation. ===================================
+  async command void Timer.reset()    { ETIFR = 1 << TOV3; }
+  async command void Capture.reset()  { ETIFR = 1 << ICF3; }
+  async command void CompareA.reset() { ETIFR = 1 << OCF3A; }
+  async command void CompareB.reset() { ETIFR = 1 << OCF3B; }
+  async command void CompareC.reset() { ETIFR = 1 << OCF3C; }
+
+  async command void Timer.start()    { SET_BIT(ETIMSK,TOIE3); }
+  async command void Capture.start()  { SET_BIT(ETIMSK,TICIE3); }
+  async command void CompareA.start() { SET_BIT(ETIMSK,OCIE3A); }
+  async command void CompareB.start() { SET_BIT(ETIMSK,OCIE3B); }
+  async command void CompareC.start() { SET_BIT(ETIMSK,OCIE3C); }
+
+  async command void Timer.stop()    { CLR_BIT(ETIMSK,TOIE3); }
+  async command void Capture.stop()  { CLR_BIT(ETIMSK,TICIE3); }
+  async command void CompareA.stop() { CLR_BIT(ETIMSK,OCIE3A); }
+  async command void CompareB.stop() { CLR_BIT(ETIMSK,OCIE3B); }
+  async command void CompareC.stop() { CLR_BIT(ETIMSK,OCIE3C); }
+
+  async command bool Timer.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.tov3; 
+  }
+  async command bool Capture.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.icf3; 
+  }
+  async command bool CompareA.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf3a; 
+  }
+  async command bool CompareB.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf3b; 
+  }
+  async command bool CompareC.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf3c; 
+  }
+
+  async command bool Timer.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.toie3;
+  }
+  async command bool Capture.isOn()  {
+    return (call TimerCtrl.getInterruptMask()).bits.ticie3;
+  }
+  async command bool CompareA.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.ocie3a;
+  }
+  async command bool CompareB.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.ocie3b;
+  }
+  async command bool CompareC.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.ocie3c;
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint16_t CompareA.get() { return OCR3A; }
+  async command uint16_t CompareB.get() { return OCR3B; }
+  async command uint16_t CompareC.get() { return OCR3C; }
+
+  //=== Write the compare registers. ====================================
+  async command void CompareA.set(uint16_t t) { OCR3A = t; }
+  async command void CompareB.set(uint16_t t) { OCR3B = t; }
+  async command void CompareC.set(uint16_t t) { OCR3C = t; }
+
+  //=== Read the capture registers. =====================================
+  async command uint16_t Capture.get() { return ICR3; }
+
+  //=== Write the capture registers. ====================================
+  async command void Capture.set(uint16_t t)  { ICR3 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void CompareA.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3A) {
+    signal CompareA.fired();
+  }
+  default async event void CompareB.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3B) {
+    signal CompareB.fired();
+  }
+  default async event void CompareC.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3C) {
+    signal CompareC.fired();
+  }
+  default async event void Capture.captured(uint16_t time) { }
+  AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE3) {
+    signal Capture.captured(call Capture.get());
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW3) {
+    signal Timer.overflow();
+  }
+}
diff --git a/tos/chips/atm128/timer/HplAtm128TimerAsync.nc b/tos/chips/atm128/timer/HplAtm128TimerAsync.nc
new file mode 100644
index 00000000..ab3115eb
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128TimerAsync.nc
@@ -0,0 +1,52 @@
+// $Id: HplAtm128TimerAsync.nc,v 1.2 2007-03-29 21:29:33 idgay Exp $
+/*
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ *
+ * @author David Gay
+ */
+interface HplAtm128TimerAsync
+{
+  /**
+   * Read timer0 asynchronous status register (ASSR)
+   * @return Current value of ASSR
+   */
+  async command Atm128Assr_t getAssr();
+
+  /**
+   * Set timer0 asynchronous status register (ASSR)
+   * @param x New value for ASSR
+   */
+  async command void setAssr(Atm128Assr_t x);
+
+  /**
+   * Turn on timer 0 asynchronous mode
+   */
+  async command void setTimer0Asynchronous();
+
+  /**
+   * Check if control register TCCR0 is busy (should not be updated if true)
+   * @return TRUE if TCCR0 is busy, FALSE otherwise (can be updated)
+   */
+  async command int controlBusy();
+
+  /**
+   * Check if compare register OCR0 is busy (should not be updated if true)
+   * @return TRUE if OCR0 is busy, FALSE otherwise (can be updated)
+   */
+  async command int compareBusy();
+
+  /**
+   * Check if current timer value (TCNT0) is busy (should not be updated if true)
+   * @return TRUE if TCNT0 is busy, FALSE otherwise (can be updated)
+   */
+  async command int countBusy();
+
+}
diff --git a/tos/chips/atm128/timer/HplAtm128TimerCtrl16.nc b/tos/chips/atm128/timer/HplAtm128TimerCtrl16.nc
new file mode 100644
index 00000000..4110aaa5
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128TimerCtrl16.nc
@@ -0,0 +1,61 @@
+/// $Id: HplAtm128TimerCtrl16.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL Interface to Atmega128 16-bit timer control registers
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include <Atm128Timer.h>
+
+interface HplAtm128TimerCtrl16
+{
+  /// Timer control registers: Direct access
+  async command Atm128TimerCtrlCompare_t getCtrlCompare();
+  async command Atm128TimerCtrlCapture_t getCtrlCapture();
+  async command Atm128TimerCtrlClock_t   getCtrlClock();
+
+  async command void setCtrlCompare( Atm128TimerCtrlCompare_t control );
+  async command void setCtrlCapture( Atm128TimerCtrlCapture_t control );
+  async command void setCtrlClock  ( Atm128TimerCtrlClock_t   control );
+
+  /// Interrupt mask register: Direct access
+  async command Atm128_ETIMSK_t getInterruptMask();
+  async command void setInterruptMask( Atm128_ETIMSK_t mask);
+
+  /// Interrupt flag register: Direct access
+  async command Atm128_ETIFR_t getInterruptFlag();
+  async command void setInterruptFlag( Atm128_ETIFR_t flags );
+}
+
diff --git a/tos/chips/atm128/timer/HplAtm128TimerCtrl8.nc b/tos/chips/atm128/timer/HplAtm128TimerCtrl8.nc
new file mode 100644
index 00000000..214dbb05
--- /dev/null
+++ b/tos/chips/atm128/timer/HplAtm128TimerCtrl8.nc
@@ -0,0 +1,55 @@
+/// $Id: HplAtm128TimerCtrl8.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL Interface to Atmega128 8-bit timer control registers
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include <Atm128Timer.h>
+
+interface HplAtm128TimerCtrl8
+{
+  /// Timer control register: Direct access
+  async command Atm128TimerControl_t getControl();
+  async command void setControl( Atm128TimerControl_t control );
+
+  /// Interrupt mask register: Direct access
+  async command Atm128_TIMSK_t getInterruptMask();
+  async command void setInterruptMask( Atm128_TIMSK_t mask);
+
+  /// Interrupt flag register: Direct access
+  async command Atm128_TIFR_t getInterruptFlag();
+  async command void setInterruptFlag( Atm128_TIFR_t flags );
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128CompareC.nc b/tos/chips/atm128/timer/sim/HplAtm128CompareC.nc
new file mode 100644
index 00000000..1cc9ca68
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128CompareC.nc
@@ -0,0 +1,286 @@
+/// $Id: HplAtm128CompareC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic compare abstraction that builds on top of a counter.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id: HplAtm128CompareC.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $
+
+#include <Atm128Timer.h>
+
+generic module HplAtm128CompareC(typedef width_t @integer(),
+				 uint8_t valueRegister,
+				 uint8_t interruptRegister,
+				 uint8_t interruptBit,
+				 uint8_t flagRegister,
+				 uint8_t flagBit) 
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Compare<width_t> as Compare;
+  }
+  uses {
+    interface HplAtm128Timer<width_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128TimerNotify as Notify;
+  }
+}
+implementation {
+  /* lastZero keeps track of the phase of the clock. It denotes the sim
+   * time at which the underlying clock started, which is needed to
+   * calculate when compares will occur. */
+  sim_time_t lastZero = 0;
+
+  /** This variable is needed to keep track of when the underlying
+   *  timer starts, in order to reset lastZero. When oldScale is
+   *  AVR_CLOCK_OFF and the scale is set to something else, the
+   *  clock starts ticking. */
+  uint8_t oldScale = AVR_CLOCK_OFF;
+  
+  void adjust_zero(width_t currentCounter);
+
+  void cancel_compare();
+  sim_event_t* allocate_compare();
+  void configure_compare(sim_event_t* e);
+  void schedule_new_compare();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+
+  sim_time_t last_zero() {
+    if (lastZero == 0) {
+      lastZero = sim_mote_start_time(sim_node());
+    }
+    return lastZero;
+  }
+
+
+  async event void Notify.changed() {
+    uint8_t newScale = call Timer.getScale();
+    if (newScale != AVR_CLOCK_OFF &&
+	oldScale == AVR_CLOCK_OFF) {
+      lastZero = sim_time();
+    }
+    oldScale = newScale;
+    
+    schedule_new_compare();
+  }
+  
+  async command void Compare.reset() { REG_ACCESS(flagRegister) &= ~(1 << flagBit); }
+  async command void Compare.start() { SET_BIT(interruptRegister,interruptBit); }
+  async command void Compare.stop()  { CLR_BIT(interruptRegister,interruptBit); }
+  async command bool Compare.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf0; 
+  }
+  async command bool Compare.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.ocie0; 
+  }
+
+  //=== Read the compare registers. =====================================
+  async command width_t Compare.get()   { return (width_t)REG_ACCESS(valueRegister); }
+
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(width_t t)   { 
+    atomic {
+	/* Re the comment above: it's a bad idea to wake up at time 0, as
+	   we'll just spin when setting the next deadline. Try and reduce
+	   the likelihood by delaying the interrupt...
+	*/
+      if (t == 0 || t >= 0xfe)
+	t = 1;
+      
+      if (t != REG_ACCESS(valueRegister)) {
+	REG_ACCESS(valueRegister) = t;
+	schedule_new_compare();
+      }
+    }
+  }
+
+  //=== Timer interrupts signals ========================================
+  default async event void Compare.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) {
+    signal Compare.fired();
+  }
+
+
+  /**
+   * If the clock was stopped and has restarted, then
+   * we need to move the time when the clock was last
+   * zero to a time that reflects the current settings.
+   * For example, if the clock was stopped when the counter
+   * was 52 and then later restarted, then <tt>lastZero</tt>
+   * needs to be moved forward in time so that the 52
+   * reflects the current time.
+   */ 
+  void adjust_zero(width_t currentCounter) {
+    sim_time_t now = sim_time();
+    sim_time_t adjust = currentCounter;
+    adjust = adjust << shiftFromScale();
+    adjust = clock_to_sim(adjust);
+    lastZero = now - adjust;
+  }
+  
+  sim_time_t clock_to_sim(sim_time_t t) {
+    t *= sim_ticks_per_sec();
+    t /= call Notify.clockTicksPerSec();
+    return t;
+  }
+
+  sim_time_t sim_to_clock(sim_time_t t) {
+    t *= call Notify.clockTicksPerSec();
+    t /= sim_ticks_per_sec();
+    return t;
+  }
+  
+  uint16_t shiftFromScale() {
+    uint8_t scale = call Timer.getScale();
+    switch (scale) {
+    case 0:
+      return 0;
+    case 1:
+      return 0;
+    case 2:
+      return 3;
+    case 3:
+      return 5;
+    case 4:
+      return 6;
+    case 5:
+      return 7;
+    case 6:
+      return 8;
+    case 7:
+      return 10;
+    default:
+      return 255;
+    }
+    
+  }
+
+  sim_event_t* compare;
+
+  void timer0_compare_handle(sim_event_t* evt) {
+    dbg("HplAtm128CompareC", "%s Beginning compare at 0x%p\n", __FUNCTION__, evt);
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      dbg("HplAtm128CompareC", "%s Handling compare at 0x%p @ %s\n",__FUNCTION__,  evt, sim_time_string());
+	    
+      if (READ_BIT(interruptRegister, interruptBit)) {
+	CLR_BIT(flagRegister, flagBit);
+	dbg("HplAtm128CompareC", "%s Compare interrupt @ %s\n", __FUNCTION__, sim_time_string());
+	SIG_OUTPUT_COMPARE0();
+      }
+      else {
+	SET_BIT(flagRegister, flagBit);
+      }
+      // If we haven't been cancelled
+      if (!evt->cancelled) {
+	configure_compare(evt);
+	sim_queue_insert(evt);
+      }
+    }
+  }
+
+  sim_event_t* allocate_compare() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+    dbg("HplAtm128CompareC", "Allocated compare at 0x%p\n", newEvent);
+    newEvent->handle = timer0_compare_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_compare(sim_event_t* evt) {
+    sim_time_t compareTime = 0;
+    sim_time_t phaseOffset = 0;
+    uint8_t timerVal = call Timer.get();
+    uint8_t compareVal = call Compare.get();
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    compareTime = ((compareVal - timerVal) & 0xff);
+    if (compareTime == 0) {
+      compareTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    compareTime = compareTime << shiftFromScale();
+    compareTime = clock_to_sim(compareTime);
+    compareTime += sim_time();
+
+    // How long into a timer tick was the clock actually reset?
+    // This covers the case when the compare is set midway between
+    // a tick, so it will go off a little early
+    phaseOffset = sim_time();
+    phaseOffset -= last_zero();
+    phaseOffset %= clock_to_sim(1 << shiftFromScale());
+    compareTime -= phaseOffset;
+      
+    dbg("HplAtm128CompareC", "Configuring new compare of %i for %i at time %llu  (@ %llu)\n", (int)compareVal, sim_node(), compareTime, sim_time());
+    
+    evt->time = compareTime;    
+  }
+  
+  void schedule_new_compare() {
+    if (compare != NULL) {
+      cancel_compare();
+    }
+    if (call Timer.getScale() != AVR_CLOCK_OFF) {
+      sim_event_t* newEvent = allocate_compare();
+      configure_compare(newEvent);
+
+      compare = newEvent;
+      sim_queue_insert(newEvent);
+    }
+  }
+
+  void cancel_compare() {
+    dbg("HplAtm128CompareC", "Cancelling compare at 0x%p\n", compare);
+    if (compare != NULL) {
+      compare->cancelled = 1;
+      compare->cleanup = sim_queue_cleanup_total;
+    }
+  }
+
+  async event void Timer.overflow() {}
+  
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128Counter0C.nc b/tos/chips/atm128/timer/sim/HplAtm128Counter0C.nc
new file mode 100644
index 00000000..3b8a5f6c
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128Counter0C.nc
@@ -0,0 +1,386 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer0 counter. It handles
+ * overflow, scaling, and phase considerations.
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis <pal@cs.stanford.edu>
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+// $Id: HplAtm128Counter0C.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $/// $Id: HplAtm128Timer2C.nc,
+
+#include <Atm128Timer.h>
+#include <hardware.h>
+
+module HplAtm128Counter0C {
+  provides {
+    interface Init @atleastonce();
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer0;
+    interface HplAtm128TimerNotify      as Notify;
+    interface HplAtm128TimerCtrl8       as Timer0Ctrl;
+  }
+}
+implementation
+{
+  bool inOverflow = 0;
+  uint8_t savedCounter = 0;
+  sim_time_t lastZero = 0;
+
+  void adjust_zero(uint8_t currentCounter);
+
+  void cancel_overflow();
+  sim_event_t* allocate_overflow();
+  void configure_overflow(sim_event_t* e);
+  void schedule_new_overflow();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+  command error_t Init.init() {
+    /* Do nothing. On a standard mote this configures Timer0 to
+     * operating in asynchronous mode off an external crystal. Here in
+     * TOSSIM it's assumed that's the case. */
+    return SUCCESS;
+  }
+    
+  async command sim_time_t Notify.clockTicksPerSec() {
+    return ATM128_TIMER0_TICKSPPS;
+  }
+  
+  sim_time_t last_zero() {
+    if (lastZero == 0) {
+      lastZero = sim_mote_start_time(sim_node());
+    }
+    return lastZero;
+  }
+  
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer0.get() {
+    uint8_t rval;
+    sim_time_t elapsed = sim_time() - last_zero();
+    elapsed = sim_to_clock(elapsed);
+    elapsed = elapsed >> shiftFromScale();
+    rval = (uint8_t)(elapsed & 0xff);
+    dbg("HplAtm128Counter0C", "HplAtm128Counter0C: Getting timer: %hhu\n", rval);
+    return rval;
+  }
+
+  //=== Set/clear the current timer value. ==============================
+  /**
+   * Set/clear the current timer value.
+   *
+   * This code is pretty tricky.  */
+  async command void Timer0.set(uint8_t newVal)  {
+    uint8_t curVal = call Timer0.get();
+    if (newVal == curVal) {
+      return;
+    }
+    else {
+      sim_time_t adjustment = curVal - newVal;
+      adjustment = adjustment << shiftFromScale();
+      adjustment = clock_to_sim(adjustment);
+
+      if (newVal < curVal) {
+	lastZero += adjustment;
+      }
+      else { // newVal > curVal
+	lastZero -= adjustment;
+      }
+
+      schedule_new_overflow();
+      signal Notify.changed();
+    }
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer0.getScale() {
+    return TCCR0 & 0x7;
+  }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer0.off() {
+    call Timer0.setScale(AVR_CLOCK_OFF);
+    savedCounter = call Timer0.get();
+    cancel_overflow();
+    signal Notify.changed();
+  }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer0.setScale(uint8_t s)  {
+    Atm128TimerControl_t ctrl;
+    uint8_t currentScale = call Timer0.getScale();
+    uint8_t currentCounter;
+    dbg("HplAtm128Counter0C", "Timer0 scale set to %i\n", (int)s);
+    if (currentScale == 0) {
+      currentCounter = savedCounter;
+    }
+    else {
+      currentCounter = call Timer0.get();
+    }
+    
+    ctrl = call Timer0Ctrl.getControl();
+    ctrl.flat &= ~(0x7);
+    ctrl.flat |= (s & 0x7);
+    call Timer0Ctrl.setControl(ctrl);  
+
+    if (currentScale != s) {
+      adjust_zero(currentCounter);
+      schedule_new_overflow();
+    }
+    signal Notify.changed();
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t Timer0Ctrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR0; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void Timer0Ctrl.setControl( Atm128TimerControl_t x ) { 
+    TCCR0 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t Timer0Ctrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void Timer0Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t Timer0Ctrl.getInterruptFlag() { 
+    return *(Atm128_TIFR_t*)&TIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void Timer0Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer0.reset() {
+    // Clear TOV0. On real hardware, this is a write.
+    TIFR &= ~(1 << TOV0);
+  }
+  async command void Timer0.start() {
+    SET_BIT(ATM128_TIMSK, TOIE0);
+    dbg("HplAtm128Counter0C", "Enabling TOIE0 at %llu\n", sim_time());
+    schedule_new_overflow();
+  }
+  async command void Timer0.stop()  {
+    dbg("HplAtm128Counter0C", "Timer stopped @ %llu\n", sim_time());
+    CLR_BIT(ATM128_TIMSK, TOIE0);
+    cancel_overflow();
+  }
+
+  bool overflowed() {
+    return READ_BIT(ATM128_TIFR, TOV0); 
+  }
+
+  inline void stabiliseOverflow() {
+    /* From the atmel manual:
+
+    During asynchronous operation, the synchronization of the interrupt
+    flags for the asynchronous timer takes three processor cycles plus one
+    timer cycle.  The timer is therefore advanced by at least one before
+    the processor can read the timer value causing the setting of the
+    interrupt flag. The output compare pin is changed on the timer clock
+    and is not synchronized to the processor clock.
+
+    So: if the timer is = 0, wait till it's = 1, except if
+    - we're currently in the overflow interrupt handler
+    - or, the overflow flag is already set
+    */
+
+    //if (!inOverflow)
+    //  while (!TCNT0 && !overflowed())
+    //;
+  }
+
+  async command bool Timer0.test()  { 
+    stabiliseOverflow();
+    return overflowed();
+  }
+  async command bool Timer0.isOn()  { 
+    return (call Timer0Ctrl.getInterruptMask()).bits.toie0; 
+  }
+
+  default async event void Timer0.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) {
+    inOverflow = TRUE;
+    signal Timer0.overflow();
+    inOverflow = FALSE;
+  }
+
+  /**
+   * If the clock was stopped and has restarted, then
+   * we need to move the time when the clock was last
+   * zero to a time that reflects the current settings.
+   * For example, if the clock was stopped when the counter
+   * was 52 and then later restarted, then <tt>lastZero</tt>
+   * needs to be moved forward in time so that the 52
+   * reflects the current time.
+   */ 
+  void adjust_zero(uint8_t currentCounter) {
+    sim_time_t now = sim_time();
+    sim_time_t adjust = currentCounter;
+    adjust = adjust << shiftFromScale();
+    adjust = clock_to_sim(adjust);
+    lastZero = now - adjust;
+  }
+  
+  sim_time_t clock_to_sim(sim_time_t t) {
+    t *= sim_ticks_per_sec();
+    t /= call Notify.clockTicksPerSec();
+    return t;
+  }
+
+  sim_time_t sim_to_clock(sim_time_t t) {
+    t *= call Notify.clockTicksPerSec();
+    t /= sim_ticks_per_sec();
+    return t;
+  }
+  
+  uint16_t shiftFromScale() {
+    uint8_t scale = call Timer0.getScale();
+    switch (scale) {
+    case 0:
+      return 0;
+    case 1:
+      return 0;
+    case 2:
+      return 3;
+    case 3:
+      return 5;
+    case 4:
+      return 6;
+    case 5:
+      return 7;
+    case 6:
+      return 8;
+    case 7:
+      return 10;
+    default:
+      return 255;
+    }
+    
+  }
+
+  sim_event_t* overflow;
+
+  void timer0_overflow_handle(sim_event_t* evt) {
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      if (READ_BIT(ATM128_TIMSK, TOIE0)) {
+	CLR_BIT(ATM128_TIFR, TOV0);
+	dbg("HplAtm128Counter0C", "Overflow interrupt at %s\n", sim_time_string());
+	SIG_OVERFLOW0();
+      }
+      else {
+	dbg("HplAtm128Counter0C", "Setting overflow bit at %s\n", sim_time_string());
+	SET_BIT(ATM128_TIFR, TOV0);
+      }
+      configure_overflow(evt);
+      sim_queue_insert(evt);
+    }
+  }
+  
+  sim_event_t* allocate_overflow() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+
+    newEvent->handle = timer0_overflow_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_overflow(sim_event_t* evt) {
+    sim_time_t overflowTime = 0;
+    uint8_t timerVal = call Timer0.get();
+    uint8_t overflowVal = 0;
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    overflowTime = ((overflowVal - timerVal) & 0xff);
+    if (overflowTime == 0) {
+      overflowTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    overflowTime = overflowTime << shiftFromScale();
+    overflowTime = clock_to_sim(overflowTime);
+    overflowTime += sim_time();
+    overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale());
+
+    dbg("HplAtm128Counter0C", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime);
+    
+    evt->time = overflowTime;
+  }
+  
+  void schedule_new_overflow() {
+    sim_event_t* newEvent = allocate_overflow();
+    configure_overflow(newEvent);
+
+    if (overflow != NULL) {
+      cancel_overflow();
+    }
+    overflow = newEvent;
+    sim_queue_insert(newEvent);
+  }
+  
+  void cancel_overflow() {
+    if (overflow != NULL) {
+      overflow->cancelled = 1;
+      dbg("HplAtm128Counter0C", "Cancelling overflow %p.\n", overflow);
+      overflow->cleanup = sim_queue_cleanup_total;
+    }
+  }
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128Counter2C.nc b/tos/chips/atm128/timer/sim/HplAtm128Counter2C.nc
new file mode 100644
index 00000000..f9eae1a2
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128Counter2C.nc
@@ -0,0 +1,384 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer2 counter. It handles
+ * overflow, scaling, and phase considerations.
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis <pal@cs.stanford.edu>
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+// $Id: HplAtm128Counter2C.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $/// $Id: HplAtm128Timer2C.nc,
+
+#include <Atm128Timer.h>
+#include <hardware.h>
+
+enum {
+  ATM128_TIMER2_TICKSPPS = (1 << 13)
+};
+
+module HplAtm128Counter2C {
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer2;
+    interface HplAtm128TimerNotify      as Notify;
+    interface HplAtm128TimerCtrl8       as Timer2Ctrl;
+  }
+}
+implementation
+{
+  bool inOverflow = 0;
+  uint8_t savedCounter = 0;
+  sim_time_t lastZero = 0;
+
+  void adjust_zero(uint8_t currentCounter);
+
+  void cancel_overflow();
+  sim_event_t* allocate_overflow();
+  void configure_overflow(sim_event_t* e);
+  void schedule_new_overflow();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+
+  async command sim_time_t Notify.clockTicksPerSec() {
+    return ATM128_TIMER2_TICKSPPS;
+  }
+  
+  sim_time_t last_zero() {
+    if (lastZero == 0) {
+      lastZero = sim_mote_start_time(sim_node());
+    }
+    return lastZero;
+  }
+  
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer2.get() {
+    uint8_t rval;
+    sim_time_t elapsed = sim_time() - last_zero();
+    elapsed = sim_to_clock(elapsed);
+    elapsed = elapsed >> shiftFromScale();
+    rval = (uint8_t)(elapsed & 0xff);
+    dbg("HplAtm128Counter2C", "HplAtm128Counter2C: Getting timer: %hhu\n", rval);
+    return rval;
+  }
+
+  //=== Set/clear the current timer value. ==============================
+  /**
+   * Set/clear the current timer value.
+   *
+   * This code is pretty tricky.  */
+  async command void Timer2.set(uint8_t newVal)  {
+    uint8_t curVal = call Timer2.get();
+    if (newVal == curVal) {
+      return;
+    }
+    else {
+      sim_time_t adjustment = curVal - newVal;
+      adjustment = adjustment << shiftFromScale();
+      adjustment = clock_to_sim(adjustment);
+
+      if (newVal < curVal) {
+	lastZero += adjustment;
+      }
+      else { // newVal > curVal
+	lastZero -= adjustment;
+      }
+
+      schedule_new_overflow();
+      signal Notify.changed();
+    }
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer2.getScale() {
+    return TCCR2 & 0x7;
+  }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer2.off() {
+    call Timer2.setScale(AVR_CLOCK_OFF);
+    savedCounter = call Timer2.get();
+    cancel_overflow();
+    signal Notify.changed();
+  }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer2.setScale(uint8_t s)  {
+    Atm128TimerControl_t ctrl;
+    uint8_t currentScale = call Timer2.getScale();
+    uint8_t currentCounter;
+    dbg("HplAtm128Counter2C", "Timer2 scale set to %i\n", (int)s);
+    if (currentScale == 0) {
+      currentCounter = savedCounter;
+    }
+    else {
+      currentCounter = call Timer2.get();
+    }
+    
+    ctrl = call Timer2Ctrl.getControl();
+    ctrl.bits.cs = s;
+    call Timer2Ctrl.setControl(ctrl);  
+
+    if (currentScale != s) {
+      adjust_zero(currentCounter);
+      schedule_new_overflow();
+    }
+    signal Notify.changed();
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t Timer2Ctrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR2; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void Timer2Ctrl.setControl( Atm128TimerControl_t x ) { 
+    TCCR2 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t Timer2Ctrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void Timer2Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t Timer2Ctrl.getInterruptFlag() { 
+    return *(Atm128_TIFR_t*)&TIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void Timer2Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer2.reset() {
+    // Clear TOV0. On real hardware, this is a write.
+    TIFR &= ~(1 << TOV2);
+  }
+  async command void Timer2.start() {
+    SET_BIT(ATM128_TIMSK, TOIE2);
+    dbg("HplAtm128Counter2C", "Enabling TOIE0 at %llu\n", sim_time());
+    schedule_new_overflow();
+  }
+  async command void Timer2.stop()  {
+    dbg("HplAtm128Counter2C", "Timer stopped @ %llu\n", sim_time());
+    CLR_BIT(ATM128_TIMSK, TOIE2);
+    cancel_overflow();
+  }
+
+  bool overflowed() {
+    return READ_BIT(ATM128_TIFR, TOV2); 
+  }
+
+  inline void stabiliseOverflow() {
+    /* From the atmel manual:
+
+    During asynchronous operation, the synchronization of the interrupt
+    flags for the asynchronous timer takes three processor cycles plus one
+    timer cycle.  The timer is therefore advanced by at least one before
+    the processor can read the timer value causing the setting of the
+    interrupt flag. The output compare pin is changed on the timer clock
+    and is not synchronized to the processor clock.
+
+    So: if the timer is = 0, wait till it's = 1, except if
+    - we're currently in the overflow interrupt handler
+    - or, the overflow flag is already set
+    */
+
+    //if (!inOverflow)
+    //  while (!TCNT0 && !overflowed())
+    //;
+  }
+
+  async command bool Timer2.test()  { 
+    stabiliseOverflow();
+    return overflowed();
+  }
+  async command bool Timer2.isOn()  { 
+    return (call Timer2Ctrl.getInterruptMask()).bits.toie2; 
+  }
+
+  default async event void Timer2.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW2) {
+    inOverflow = TRUE;
+    signal Timer2.overflow();
+    inOverflow = FALSE;
+  }
+
+  /**
+   * If the clock was stopped and has restarted, then
+   * we need to move the time when the clock was last
+   * zero to a time that reflects the current settings.
+   * For example, if the clock was stopped when the counter
+   * was 52 and then later restarted, then <tt>lastZero</tt>
+   * needs to be moved forward in time so that the 52
+   * reflects the current time.
+   */ 
+  void adjust_zero(uint8_t currentCounter) {
+    sim_time_t now = sim_time();
+    sim_time_t adjust = currentCounter;
+    adjust = adjust << shiftFromScale();
+    adjust = clock_to_sim(adjust);
+    lastZero = now - adjust;
+  }
+  
+  sim_time_t clock_to_sim(sim_time_t t) {
+    t *= sim_ticks_per_sec();
+    t /= call Notify.clockTicksPerSec();
+    return t;
+  }
+
+  sim_time_t sim_to_clock(sim_time_t t) {
+    t *= call Notify.clockTicksPerSec();
+    t /= sim_ticks_per_sec();
+    return t;
+  }
+  
+  uint16_t shiftFromScale() {
+    uint8_t scale = call Timer2.getScale();
+    switch (scale) {
+    case 0:
+      return 0;
+    case 1:
+      return 0;
+    case 2:
+      return 3;
+    case 3:
+      return 5;
+    case 4:
+      return 6;
+    case 5:
+      return 7;
+    case 6:
+      return 8;
+    case 7:
+      return 10;
+    default:
+      return 255;
+    }
+    
+  }
+
+  sim_event_t* overflow;
+
+  void timer2_overflow_handle(sim_event_t* evt) {
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      char time[128];
+      sim_print_now(time, 128);
+      if (READ_BIT(ATM128_TIMSK, TOIE2)) {
+	CLR_BIT(ATM128_TIFR, TOV2);
+	dbg("HplAtm128Counter2C", "Overflow interrupt at %s\n", time);
+	SIG_OVERFLOW2();
+      }
+      else {
+	dbg("HplAtm128Counter2C", "Setting overflow bit at %s\n", time);
+	SET_BIT(ATM128_TIFR, TOV2);
+      }
+      configure_overflow(evt);
+      sim_queue_insert(evt);
+    }
+  }
+  
+  sim_event_t* allocate_overflow() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+
+    newEvent->handle = timer2_overflow_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_overflow(sim_event_t* evt) {
+    sim_time_t overflowTime = 0;
+    uint8_t timerVal = call Timer2.get();
+    uint8_t overflowVal = 0;
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    overflowTime = ((overflowVal - timerVal) & 0xff);
+    if (overflowTime == 0) {
+      overflowTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    overflowTime = overflowTime << shiftFromScale();
+    overflowTime = clock_to_sim(overflowTime);
+    overflowTime += sim_time();
+    overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale());
+
+    dbg("HplAtm128Counter2C", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime);
+    
+    evt->time = overflowTime;
+  }
+  
+  void schedule_new_overflow() {
+    sim_event_t* newEvent = allocate_overflow();
+    configure_overflow(newEvent);
+
+    if (overflow != NULL) {
+      cancel_overflow();
+    }
+    overflow = newEvent;
+    sim_queue_insert(newEvent);
+  }
+  
+  void cancel_overflow() {
+    if (overflow != NULL) {
+      overflow->cancelled = 1;
+      dbg("HplAtm128Counter2C", "Cancelling overflow %p.\n", overflow);
+      overflow->cleanup = sim_queue_cleanup_total;
+    }
+  }
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128Timer0AsyncC.nc b/tos/chips/atm128/timer/sim/HplAtm128Timer0AsyncC.nc
new file mode 100644
index 00000000..6f07591d
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128Timer0AsyncC.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer0. It is built from a
+ * timer-specific counter component and a generic compare
+ * component. The counter component has an additional simulation-only
+ * interface to let the compare component know when its state has
+ * changed (e.g., TCNTX was set).
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis <pal@cs.stanford.edu>
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+// $Id: HplAtm128Timer0AsyncC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $/// $Id: HplAtm128Timer2C.nc,
+
+#include <Atm128Timer.h>
+
+configuration HplAtm128Timer0AsyncC
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface HplAtm128TimerAsync       as TimerAsync;
+  }
+}
+implementation {
+  components HplAtm128Timer0AsyncP;
+  Timer = HplAtm128Timer0AsyncP;
+  TimerCtrl = HplAtm128Timer0AsyncP;
+  Compare = HplAtm128Timer0AsyncP;
+  TimerAsync = HplAtm128Timer0AsyncP;
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128Timer0AsyncP.nc b/tos/chips/atm128/timer/sim/HplAtm128Timer0AsyncP.nc
new file mode 100644
index 00000000..5310bef2
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128Timer0AsyncP.nc
@@ -0,0 +1,584 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer0 counter. It handles
+ * overflow, scaling, and phase considerations.
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis <pal@cs.stanford.edu>
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+// $Id: HplAtm128Timer0AsyncP.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $/// $Id: HplAtm128Timer2C.nc,
+
+#include <Atm128Timer.h>
+#include <hardware.h>
+
+module HplAtm128Timer0AsyncP {
+  provides {
+    interface HplAtm128Timer<uint8_t>   as Timer0;
+    interface HplAtm128TimerCtrl8       as Timer0Ctrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface HplAtm128TimerAsync       as TimerAsync;
+  }
+}
+implementation {
+  bool inOverflow = 0;
+  uint8_t savedCounter = 0;
+
+  void adjust_zero(uint8_t currentCounter);
+
+  void cancel_overflow();
+  sim_event_t* allocate_overflow();
+  void configure_overflow(sim_event_t* e);
+  void schedule_new_overflow();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+  /* lastZero keeps track of the phase of the clock. It denotes the sim
+   * time at which the underlying clock started, which is needed to
+   * calculate when compares will occur. */
+  sim_time_t lastZero = 0;
+
+  /** This variable is needed to keep track of when the underlying
+   *  timer starts, in order to reset lastZero. When oldScale is
+   *  AVR_CLOCK_OFF and the scale is set to something else, the
+   *  clock starts ticking. */
+  uint8_t oldScale = AVR_CLOCK_OFF;
+  
+  void adjust_zero(uint8_t currentCounter);
+  
+  void cancel_compare();
+  sim_event_t* allocate_compare();
+  void configure_compare(sim_event_t* e);
+  void schedule_new_compare();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+  default async event void Compare.fired() { }
+  AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) {
+    //stabiliseTimer0();
+    signal Compare.fired();
+  }
+ 
+  default async event void Timer0.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) {
+    inOverflow = TRUE;
+    signal Timer0.overflow();
+    inOverflow = FALSE;
+  }
+
+
+  
+  sim_time_t last_zero() {
+    if (lastZero == 0) {
+      lastZero = sim_mote_start_time(sim_node());
+    }
+    return lastZero;
+  }
+
+
+  void notify_changed() {
+    uint8_t newScale = call Timer0.getScale();
+    if (newScale != AVR_CLOCK_OFF &&
+	oldScale == AVR_CLOCK_OFF) {
+      lastZero = sim_time();
+    }
+    oldScale = newScale;
+    
+    schedule_new_compare();
+  }
+
+  sim_time_t notify_clockTicksPerSec() {
+    return ATM128_TIMER0_TICKSPPS;
+  }
+  
+  /**
+   * If the clock was stopped and has restarted, then
+   * we need to move the time when the clock was last
+   * zero to a time that reflects the current settings.
+   * For example, if the clock was stopped when the counter
+   * was 52 and then later restarted, then <tt>lastZero</tt>
+   * needs to be moved forward in time so that the 52
+   * reflects the current time.
+   */ 
+  void adjust_zero(uint8_t currentCounter) {
+    sim_time_t now = sim_time();
+    sim_time_t adjust = currentCounter;
+    adjust = adjust << shiftFromScale();
+    adjust = clock_to_sim(adjust);
+    lastZero = now - adjust;
+  }
+  
+  sim_time_t clock_to_sim(sim_time_t t) {
+    t *= sim_ticks_per_sec();
+    t /= notify_clockTicksPerSec();
+    return t;
+  }
+
+  sim_time_t sim_to_clock(sim_time_t t) {
+    t *= notify_clockTicksPerSec();
+    t /= sim_ticks_per_sec();
+    return t;
+  }
+  
+  uint16_t shiftFromScale() {
+    uint8_t scale = call Timer0.getScale();
+    switch (scale) {
+    case 0:
+      return 0;
+    case 1:
+      return 0;
+    case 2:
+      return 3;
+    case 3:
+      return 5;
+    case 4:
+      return 6;
+    case 5:
+      return 7;
+    case 6:
+      return 8;
+    case 7:
+      return 10;
+    default:
+      return 255;
+    }
+    
+  }
+
+  sim_event_t* compare;
+
+  void timer0_compare_handle(sim_event_t* evt) {
+    dbg("HplAtm128Timer0AsyncP", "Beginning compare 0x%p at %s\n", evt, sim_time_string());
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      char timeStr[128];
+      sim_print_now(timeStr, 128);
+      dbg("HplAtm128Timer0AsyncP", "Handling compare at 0x%p @ %s\n", evt, sim_time_string());
+      
+      if (READ_BIT(ATM128_TCCR0, WGM01) && !READ_BIT(ATM128_TCCR0, WGM00)) {
+	dbg("HplAtm128Timer0AsyncP", "%s: CTC is set, clear timer.\n", __FUNCTION__);
+	call Timer0.set(0);
+      }
+      else {
+	dbg("HplAtm128Timer0AsyncP", "%s: TCCR is 0x%hhx, %i, %i\n", __FUNCTION__, TCCR0, (int)READ_BIT(ATM128_TCCR0, WGM01), (int)READ_BIT(ATM128_TCCR0, WGM00));
+      }
+      
+      if (READ_BIT(ATM128_TIMSK, OCIE0)) {
+	dbg("HplAtm128Timer0AsyncP", "TIFR is %hhx\n", TIFR);
+	CLR_BIT(ATM128_TIFR, OCF0);
+	dbg("HplAtm128Timer0AsyncP", "TIFR is %hhx\n", TIFR);
+	dbg("HplAtm128Timer0AsyncP", "Compare interrupt @ %s\n", timeStr);
+	SIG_OUTPUT_COMPARE0();
+      }
+      else {
+	SET_BIT(ATM128_TIFR, OCF0);
+      }
+      // If we haven't been cancelled
+      if (!evt->cancelled) {
+	configure_compare(evt);
+	sim_queue_insert(evt);
+      }
+    }
+  }
+
+  sim_event_t* allocate_compare() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+    dbg("HplAtm128Timer0AsyncP", "Allocated compare at 0x%p\n", newEvent);
+    newEvent->handle = timer0_compare_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_compare(sim_event_t* evt) {
+    sim_time_t compareTime = 0;
+    sim_time_t phaseOffset = 0;
+    uint8_t timerVal = call Timer0.get();
+    uint8_t compareVal = call Compare.get();
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    compareTime = ((compareVal - timerVal) & 0xff);
+    if (compareTime == 0) {
+      compareTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    // The +1 is from the timer behavior: if you set OCR0 to be X,
+    // it will actually fire when TCNT is X+1
+    compareTime = (compareTime + 1) << shiftFromScale();
+    compareTime = clock_to_sim(compareTime);
+    compareTime += sim_time();
+
+    // How long into a timer tick was the clock actually reset?
+    // This covers the case when the compare is set midway between
+    // a tick, so it will go off a little early
+    phaseOffset = sim_time();
+    phaseOffset -= last_zero();
+    phaseOffset %= clock_to_sim(1 << shiftFromScale());
+    compareTime -= phaseOffset;
+      
+    dbg("HplAtm128Timer0AsyncP", "Configuring new compare of %i for %i at time %llu  (@ %llu)\n", (int)compareVal, sim_node(), compareTime, sim_time());
+    
+    evt->time = compareTime;    
+  }
+  
+  void schedule_new_compare() {
+    if (compare != NULL) {
+      cancel_compare();
+    }
+    if (call Timer0.getScale() != AVR_CLOCK_OFF) {
+      sim_event_t* newEvent = allocate_compare();
+      configure_compare(newEvent);
+
+      compare = newEvent;
+      sim_queue_insert(newEvent);
+    }
+  }
+
+  
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer0.get() {
+    uint8_t rval;
+    sim_time_t elapsed = sim_time() - last_zero();
+    elapsed = sim_to_clock(elapsed);
+    elapsed = elapsed >> shiftFromScale();
+    rval = (uint8_t)(elapsed & 0xff);
+    dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Getting timer: %hhu\n", rval);
+    return rval;
+  }
+
+  //=== Set/clear the current timer value. ==============================
+  /**
+   * Set/clear the current timer value.
+   *
+   * This code is pretty tricky.  */
+  async command void Timer0.set(uint8_t newVal)  {
+    uint8_t curVal = call Timer0.get();
+    dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Setting timer: %hhu\n", newVal);
+    if (newVal == curVal) {
+      return;
+    }
+    else {
+      sim_time_t adjustment = curVal - newVal;
+      adjustment = adjustment << shiftFromScale();
+      adjustment = clock_to_sim(adjustment);
+
+      if (newVal < curVal) {
+	lastZero += adjustment;
+      }
+      else { // newVal > curVal
+	lastZero -= adjustment;
+      }
+
+      schedule_new_overflow();
+      notify_changed();
+    }
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer0.getScale() {
+    return TCCR0 & 0x7;
+  }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer0.off() {
+    call Timer0.setScale(AVR_CLOCK_OFF);
+    savedCounter = call Timer0.get();
+    cancel_overflow();
+    notify_changed();
+  }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer0.setScale(uint8_t s)  {
+    Atm128TimerControl_t ctrl;
+    uint8_t currentScale = call Timer0.getScale();
+    uint8_t currentCounter;
+    dbg("HplAtm128Timer0AsyncP", "Timer0 scale set to %i\n", (int)s);
+    if (currentScale == 0) {
+      currentCounter = savedCounter;
+    }
+    else {
+      currentCounter = call Timer0.get();
+    }
+    
+    ctrl = call Timer0Ctrl.getControl();
+    ctrl.flat &= ~(0x7);
+    ctrl.flat |= (s & 0x7);
+    call Timer0Ctrl.setControl(ctrl);  
+
+    if (currentScale != s) {
+      adjust_zero(currentCounter);
+      schedule_new_overflow();
+    }
+    notify_changed();
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t Timer0Ctrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR0; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void Timer0Ctrl.setControl( Atm128TimerControl_t x ) {
+    dbg("HplAtm128Timer0AsyncP", "Setting control to be 0x%hhx\n", x.flat);
+    TCCR0 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t Timer0Ctrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void Timer0Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t Timer0Ctrl.getInterruptFlag() {
+    Atm128_TIFR_t at;
+    at.flat = TIFR;
+    return at;
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void Timer0Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer0.reset() {
+    // Clear TOV0. On real hardware, this is a write.
+    TIFR &= ~(1 << TOV0);
+  }
+  async command void Timer0.start() {
+    SET_BIT(ATM128_TIMSK, TOIE0);
+    dbg("HplAtm128Timer0AsyncP", "Enabling TOIE0 at %llu\n", sim_time());
+    schedule_new_overflow();
+  }
+  async command void Timer0.stop()  {
+    dbg("HplAtm128Timer0AsyncP", "Timer stopped @ %llu\n", sim_time());
+    CLR_BIT(ATM128_TIMSK, TOIE0);
+    cancel_overflow();
+  }
+
+  bool overflowed() {
+    return READ_BIT(ATM128_TIFR, TOV0); 
+  }
+
+  inline void stabiliseOverflow() {
+    /* From the atmel manual:
+
+    During asynchronous operation, the synchronization of the interrupt
+    flags for the asynchronous timer takes three processor cycles plus one
+    timer cycle.  The timer is therefore advanced by at least one before
+    the processor can read the timer value causing the setting of the
+    interrupt flag. The output compare pin is changed on the timer clock
+    and is not synchronized to the processor clock.
+
+    So: if the timer is = 0, wait till it's = 1, except if
+    - we're currently in the overflow interrupt handler
+    - or, the overflow flag is already set
+    */
+
+    //if (!inOverflow)
+    //  while (!TCNT0 && !overflowed())
+    //;
+  }
+  
+  async command bool Timer0.test()  { 
+    stabiliseOverflow();
+    return overflowed();
+  }
+
+  async command bool Timer0.isOn()  { 
+    return (call Timer0Ctrl.getInterruptMask()).bits.toie0; 
+  }
+
+  async command void Compare.reset() { TIFR = 1 << OCF0; }
+  async command void Compare.start() { SET_BIT(ATM128_TIMSK,OCIE0); }
+  async command void Compare.stop()  { CLR_BIT(ATM128_TIMSK,OCIE0); }
+  async command bool Compare.test()  { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.ocf0; 
+  }
+  async command bool Compare.isOn()  { 
+    return (call Timer0Ctrl.getInterruptMask()).bits.ocie0; 
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint8_t Compare.get()   {
+    dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Getting compare: %hhu\n", OCR0);
+    return OCR0;
+  }
+  
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(uint8_t t)   {
+    dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Setting compare: %hhu\n", t);
+    atomic {
+	/* Re the comment above: it's a bad idea to wake up at time 0, as
+	   we'll just spin when setting the next deadline. Try and reduce
+	   the likelihood by delaying the interrupt...
+	*/
+      if (t == 0 || t >= 0xfe)
+	t = 1;
+      
+      if (t != OCR0) {
+	OCR0 = t;
+	schedule_new_compare();
+      }
+    }
+  }
+
+  sim_event_t* overflow;  
+  void timer0_overflow_handle(sim_event_t* evt) {
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      if (READ_BIT(ATM128_TIMSK, TOIE0)) {
+	CLR_BIT(ATM128_TIFR, TOV0);
+	dbg("HplAtm128Timer0AsyncP", "Overflow interrupt at %s\n", sim_time_string());
+	SIG_OVERFLOW0();
+      }
+      else {
+	dbg("HplAtm128Timer0AsyncP", "Setting overflow bit at %s\n", sim_time_string());
+	SET_BIT(ATM128_TIFR, TOV0);
+      }
+      configure_overflow(evt);
+      sim_queue_insert(evt);
+    }
+  }
+  
+  sim_event_t* allocate_overflow() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+
+    newEvent->handle = timer0_overflow_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_overflow(sim_event_t* evt) {
+    sim_time_t overflowTime = 0;
+    uint8_t timerVal = call Timer0.get();
+    uint8_t overflowVal = 0;
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    overflowTime = ((overflowVal - timerVal) & 0xff);
+    if (overflowTime == 0) {
+      overflowTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    overflowTime = overflowTime << shiftFromScale();
+    overflowTime = clock_to_sim(overflowTime);
+    overflowTime += sim_time();
+    overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale());
+
+    dbg("HplAtm128Timer0AsyncP", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime);
+    
+    evt->time = overflowTime;
+  }
+  
+  void schedule_new_overflow() {
+    sim_event_t* newEvent = allocate_overflow();
+    configure_overflow(newEvent);
+
+    if (overflow != NULL) {
+      cancel_overflow();
+    }
+    overflow = newEvent;
+    sim_queue_insert(newEvent);
+  }
+  
+  void cancel_overflow() {
+    if (overflow != NULL) {
+      overflow->cancelled = 1;
+      dbg("HplAtm128Timer0AsyncP", "Cancelling overflow %p.\n", overflow);
+      overflow->cleanup = sim_queue_cleanup_total;
+    }
+  }
+
+  async command Atm128Assr_t TimerAsync.getAssr() {
+    return *(Atm128Assr_t *)&ASSR;
+  }
+
+  async command void TimerAsync.setAssr(Atm128Assr_t x) {
+    ASSR = x.flat;
+  }
+
+  async command void TimerAsync.setTimer0Asynchronous() {
+    ASSR |= 1 << AS0;
+  }
+
+  async command int TimerAsync.controlBusy() {
+    return (ASSR & (1 << TCR0UB)) != 0;
+  }
+
+  async command int TimerAsync.compareBusy() {
+    return (ASSR & (1 << OCR0UB)) != 0;
+  }
+
+  async command int TimerAsync.countBusy() {
+    return (ASSR & (1 << TCN0UB)) != 0;
+  }
+
+  void cancel_compare() {
+    dbg("HplAtm128CompareC", "Cancelling compare at 0x%p\n", compare);
+    if (compare != NULL) {
+      compare->cancelled = 1;
+      compare->cleanup = sim_queue_cleanup_total;
+    }
+  }
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128Timer2C.nc b/tos/chips/atm128/timer/sim/HplAtm128Timer2C.nc
new file mode 100644
index 00000000..9e96df39
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128Timer2C.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer2. It is built from a
+ * timer-specific counter component and a generic compare
+ * component. The counter component has an additional simulation-only
+ * interface to let the compare component know when its state has
+ * changed (e.g., TCNTX was set).
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis <pal@cs.stanford.edu>
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+// $Id: HplAtm128Timer2C.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $/// $Id: HplAtm128Timer2C.nc,
+
+
+#include <Atm128Timer.h>
+
+configuration HplAtm128Timer2C
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer2;
+    interface HplAtm128TimerCtrl8       as Timer2Ctrl;
+    interface HplAtm128Compare<uint8_t> as Compare2;
+  }
+}
+implementation {
+  components HplAtm128Counter0C, new HplAtm128CompareC(uint8_t,
+						 ATM128_OCR2,
+						 ATM128_TIMSK,
+						 OCIE2,
+						 ATM128_TIFR,
+						 OCF2);
+
+  Timer2 = HplAtm128Counter2C;
+  Timer2Ctrl = HplAtm128Counter2C;
+  Compare2 = HplAtm128CompareC;
+
+  HplAtm128CompareC.Timer -> HplAtm128Counter2C;
+  HplAtm128CompareC.TimerCtrl -> HplAtm128Counter2C;
+  HplAtm128CompareC.Notify -> HplAtm128Counter2C;
+  
+}
diff --git a/tos/chips/atm128/timer/sim/HplAtm128TimerNotify.nc b/tos/chips/atm128/timer/sim/HplAtm128TimerNotify.nc
new file mode 100644
index 00000000..13e8dd6b
--- /dev/null
+++ b/tos/chips/atm128/timer/sim/HplAtm128TimerNotify.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM-specific timer interface needed to notify when the state
+ * of the underlying timer has changed. E.g., if a compare is built on top
+ * of the timer, but someone sets the counter register, the compare will need
+ * adjust its event timing.
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis <pal@cs.stanford.edu>
+ */
+
+// $Id: HplAtm128TimerNotify.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $/// $Id: HplAtm128Timer2C.nc,
+
+
+interface HplAtm128TimerNotify {
+
+  /**
+   * Signaled whenever the state of the counter has changed. Dependent
+   * abstractions should recalculate.
+   */
+   
+  async event void changed();
+
+  /**
+   * Basic utility function so the counter itself can specify the
+   * ticks pps. */
+  
+  async command sim_time_t clockTicksPerSec();
+
+}
+
diff --git a/tos/chips/atm1281/HplAtm128UartP.nc b/tos/chips/atm1281/HplAtm128UartP.nc
new file mode 100644
index 00000000..acffaca4
--- /dev/null
+++ b/tos/chips/atm1281/HplAtm128UartP.nc
@@ -0,0 +1,322 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:43 $
+ */
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** 
+ * Private component of the Atmega1281 serial port HPL.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <Atm128Uart.h>
+
+module HplAtm128UartP {
+  
+  provides interface Init as Uart0Init;
+  provides interface StdControl as Uart0TxControl;
+  provides interface StdControl as Uart0RxControl;
+  provides interface HplAtm128Uart as HplUart0;
+    
+  provides interface Init as Uart1Init;
+  provides interface StdControl as Uart1TxControl;
+  provides interface StdControl as Uart1RxControl;
+  provides interface HplAtm128Uart as HplUart1;
+  
+  uses interface Atm128Calibrate;
+  uses interface McuPowerState;
+}
+implementation {
+  
+  //=== Uart Init Commands. ====================================
+  command error_t Uart0Init.init() {
+    Atm128UartMode_t    mode;
+    Atm128UartStatus_t  stts;
+    Atm128UartControl_t ctrl;
+    uint16_t ubrr0;
+
+    ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0};
+    stts.bits = (struct Atm128_UCSRA_t) {u2x:1};
+    mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS};
+
+    ubrr0 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE);
+    UBRR0L = ubrr0;
+    UBRR0H = ubrr0 >> 8;
+    UCSR0A = stts.flat;
+    UCSR0C = mode.flat;
+    UCSR0B = ctrl.flat;
+
+    return SUCCESS;
+  }
+
+  command error_t Uart0TxControl.start() {
+    SET_BIT(UCSR0B, TXEN0);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart0TxControl.stop() {
+    CLR_BIT(UCSR0B, TXEN0);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart0RxControl.start() {
+    SET_BIT(UCSR0B, RXEN0);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart0RxControl.stop() {
+    CLR_BIT(UCSR0B, RXEN0);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart0.enableTxIntr() {
+    SET_BIT(UCSR0A, TXC0);
+    SET_BIT(UCSR0B, TXCIE0);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart0.disableTxIntr(){
+    CLR_BIT(UCSR0B, TXCIE0);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart0.enableRxIntr(){
+    SET_BIT(UCSR0B, RXCIE0);
+    return SUCCESS;
+  }
+
+  async command error_t HplUart0.disableRxIntr(){
+    CLR_BIT(UCSR0B, RXCIE0);
+    return SUCCESS;
+  }
+  
+  async command bool HplUart0.isTxEmpty(){
+    return READ_BIT(UCSR0A, TXC0);
+  }
+
+  async command bool HplUart0.isRxEmpty(){
+    return !READ_BIT(UCSR0A, RXC0);
+  }
+  
+  async command uint8_t HplUart0.rx(){
+    return UDR0;
+  }
+
+  async command void HplUart0.tx(uint8_t data) {
+    atomic{
+      UDR0 = data; 
+      SET_BIT(UCSR0A, TXC0);
+    }
+  }
+  
+  AVR_ATOMIC_HANDLER(SIG_USART0_RECV) {
+    if (READ_BIT(UCSR0A, RXC0)) {
+      signal HplUart0.rxDone(UDR0);
+    }
+  }
+  
+  AVR_NONATOMIC_HANDLER(SIG_USART0_TRANS) {
+    signal HplUart0.txDone();
+  }
+  
+  command error_t Uart1Init.init() {
+    Atm128UartMode_t    mode;
+    Atm128UartStatus_t  stts;
+    Atm128UartControl_t ctrl;
+    uint16_t ubrr1;
+    
+    ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0};
+    stts.bits = (struct Atm128_UCSRA_t) {u2x:1};
+    mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS};
+
+    ubrr1 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE);
+    UBRR1L = ubrr1;
+    UBRR1H = ubrr1 >> 8;
+    UCSR1A = stts.flat;
+    UCSR1C = mode.flat;
+    UCSR1B = ctrl.flat;
+
+    return SUCCESS;
+  }
+
+  command error_t Uart1TxControl.start() {
+    SET_BIT(UCSR1B, TXEN1);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart1TxControl.stop() {
+    CLR_BIT(UCSR1B, TXEN1);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart1RxControl.start() {
+    SET_BIT(UCSR1B, RXEN1);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart1RxControl.stop() {
+    CLR_BIT(UCSR1B, RXEN1);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart1.enableTxIntr() {
+    SET_BIT(UCSR1A, TXC1);
+    SET_BIT(UCSR1B, TXCIE1);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart1.disableTxIntr(){
+    CLR_BIT(UCSR1B, TXCIE1);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart1.enableRxIntr(){
+    SET_BIT(UCSR1B, RXCIE1);
+    return SUCCESS;
+  }
+
+  async command error_t HplUart1.disableRxIntr(){
+    CLR_BIT(UCSR1B, RXCIE1);
+    return SUCCESS;
+  }
+  
+  async command bool HplUart1.isTxEmpty() {
+    return READ_BIT(UCSR1A, TXC1);
+  }
+
+  async command bool HplUart1.isRxEmpty() {
+    return !READ_BIT(UCSR1A, RXC1);
+  }
+  
+  async command uint8_t HplUart1.rx(){
+    return UDR1;
+  }
+
+  async command void HplUart1.tx(uint8_t data) {
+    atomic{
+      UDR1 = data; 
+      SET_BIT(UCSR1A, TXC1);
+    }
+  }
+  
+  AVR_ATOMIC_HANDLER(SIG_USART1_RECV) {
+    if (READ_BIT(UCSR1A, RXC1))
+      signal HplUart1.rxDone(UDR1);
+  }
+  
+  AVR_NONATOMIC_HANDLER(SIG_USART1_TRANS) {
+    signal HplUart1.txDone();
+  }
+  
+  default async event void HplUart0.txDone() {} 
+  default async event void HplUart0.rxDone(uint8_t data) {}
+  default async event void HplUart1.txDone() {}
+  default async event void HplUart1.rxDone(uint8_t data) {}
+  
+}
diff --git a/tos/chips/atm1281/McuSleepC.nc b/tos/chips/atm1281/McuSleepC.nc
new file mode 100644
index 00000000..283171d5
--- /dev/null
+++ b/tos/chips/atm1281/McuSleepC.nc
@@ -0,0 +1,167 @@
+/// $Id: McuSleepC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Implementation of TEP 112 (Microcontroller Power Management) for
+ * the Atmega128. Power state calculation code copied from Rob
+ * Szewczyk's 1.x code in HPLPowerManagementM.nc.
+ *
+ * <pre>
+ *  $Id: McuSleepC.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
+ * </pre>
+ *
+ * @author Philip Levis
+ * @author Robert Szewczyk
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ * @date   October 30, 2007
+ */
+
+module McuSleepC @safe() {
+  provides {
+    interface McuSleep;
+    interface McuPowerState;
+  }
+  uses {
+    interface McuPowerOverride;
+  }
+}
+implementation {
+  /* There is no dirty bit management because the sleep mode depends on
+     the amount of time remaining in timer2. */
+
+  /* Note that the power values are maintained in an order
+   * based on their active components, NOT on their values.
+   * Look at atm1281hardware.h and page 54 of the ATmeg1281
+   * manual (Table 25).*/
+  const_uint8_t atm128PowerBits[ATM128_POWER_DOWN + 1] = {
+    0,
+    (1 << SM0),
+    (1 << SM2) | (1 << SM1) | (1 << SM0),
+    (1 << SM1) | (1 << SM0),
+    (1 << SM2) | (1 << SM1),
+    (1 << SM1)};
+
+  mcu_power_t getPowerState() {
+    // Note: we go to sleep even if timer 0, 1, 3, 4,  or 5's overflow
+    // interrupt is enabled - this allows using timers 0, 1 and 3 as TinyOS
+    // "Alarm"s while still having power management. (see TEP102 Appendix C)
+    // Input capture and output compare for timer 4 and 5 are not functional
+    // on the atm1281.
+
+    // Are there any input capture or output compare interrupts enabled
+    // for timers 0, 1 or 3?
+    if (
+        TIMSK0 & (1 << OCIE0A | 1 << OCIE0B ) ||
+        TIMSK1 & (1 << ICIE1  | 1 << OCIE1A | 1 << OCIE1B | 1 << OCIE1C) ||
+        TIMSK3 & (1 << ICIE3  | 1 << OCIE3A | 1 << OCIE3B | 1 << OCIE3C)
+    ) {
+      return ATM128_POWER_IDLE;
+    }
+    // SPI (Radio stack)
+    else if (bit_is_set(SPCR, SPIE)) {
+      return ATM128_POWER_IDLE;
+    }
+    // UARTs are active
+    else if (UCSR0B & (1 << TXCIE0 | 1 << RXCIE0 | 1 << UDRIE0)) { // UART
+      return ATM128_POWER_IDLE;
+    }
+    else if (UCSR1B & (1 << TXCIE1 | 1 << RXCIE1 | 1 << UDRIE1)) { // UART
+      return ATM128_POWER_IDLE;
+    }
+    // I2C (Two-wire) is active
+    else if (bit_is_set(TWCR, TWEN)){
+      return ATM128_POWER_IDLE;
+    }
+    // ADC is enabled
+    else if (bit_is_set(ADCSRA, ADEN)) {
+      return ATM128_POWER_ADC_NR;
+    }
+    else {
+      return ATM128_POWER_DOWN;
+    }
+  }
+
+  async command void McuSleep.sleep() {
+    uint8_t powerState;
+
+    powerState = mcombine(getPowerState(), call McuPowerOverride.lowestState());
+    SMCR =
+      (SMCR & 0xf0) | 1 << SE | read_uint8_t(&atm128PowerBits[powerState]);
+    sei();
+    // All of memory may change at this point...
+    asm volatile ("sleep" : : : "memory");
+    cli();
+
+    CLR_BIT(SMCR, SE);
+  }
+
+  async command void McuPowerState.update() {
+  }
+
+  default async command mcu_power_t McuPowerOverride.lowestState() {
+    return ATM128_POWER_DOWN;
+  }
+}
diff --git a/tos/chips/atm1281/adc/Atm128Adc.h b/tos/chips/atm1281/adc/Atm128Adc.h
new file mode 100644
index 00000000..068e6786
--- /dev/null
+++ b/tos/chips/atm1281/adc/Atm128Adc.h
@@ -0,0 +1,217 @@
+// $Id: Atm128Adc.h,v 1.3 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Martin Turon <mturon@xbow.com>
+// @author Hu Siquan <husq@xbow.com>
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+// @author Janos Sallai <janos.sallai@vanderbilt.edu>
+
+/*
+   Updated chips/atm128 to include atm1281's ADCSRB register.
+*/
+
+#ifndef _H_Atm128ADC_h
+#define _H_Atm128ADC_h
+
+//================== 8 channel 10-bit ADC ==============================
+
+/* Voltage Reference Settings */
+enum {
+    ATM128_ADC_VREF_OFF = 0, //!< VR+ = AREF   and VR- = GND
+    ATM128_ADC_VREF_AVCC = 1,//!< VR+ = AVcc   and VR- = GND
+    ATM128_ADC_VREF_1_1 = 2,  //!< VR+ = 1.1V and VR- = GND    
+    ATM128_ADC_VREF_2_56 = 3,//!< VR+ = 2.56V  and VR- = GND
+};
+
+/* Voltage Reference Settings */
+enum {
+    ATM128_ADC_RIGHT_ADJUST = 0, 
+    ATM128_ADC_LEFT_ADJUST = 1,
+};
+
+
+/* ADC Multiplexer Settings */
+enum {
+    ATM128_ADC_SNGL_ADC0 = 0,
+    ATM128_ADC_SNGL_ADC1,
+    ATM128_ADC_SNGL_ADC2,
+    ATM128_ADC_SNGL_ADC3,
+    ATM128_ADC_SNGL_ADC4,
+    ATM128_ADC_SNGL_ADC5,
+    ATM128_ADC_SNGL_ADC6,
+    ATM128_ADC_SNGL_ADC7,
+    ATM128_ADC_DIFF_ADC00_10x,
+    ATM128_ADC_DIFF_ADC10_10x,
+    ATM128_ADC_DIFF_ADC00_200x,
+    ATM128_ADC_DIFF_ADC10_200x,
+    ATM128_ADC_DIFF_ADC22_10x,
+    ATM128_ADC_DIFF_ADC32_10x,
+    ATM128_ADC_DIFF_ADC22_200x,
+    ATM128_ADC_DIFF_ADC32_200x,
+    ATM128_ADC_DIFF_ADC01_1x,
+    ATM128_ADC_DIFF_ADC11_1x,
+    ATM128_ADC_DIFF_ADC21_1x,
+    ATM128_ADC_DIFF_ADC31_1x,
+    ATM128_ADC_DIFF_ADC41_1x,
+    ATM128_ADC_DIFF_ADC51_1x,
+    ATM128_ADC_DIFF_ADC61_1x,
+    ATM128_ADC_DIFF_ADC71_1x,
+    ATM128_ADC_DIFF_ADC02_1x,
+    ATM128_ADC_DIFF_ADC12_1x,
+    ATM128_ADC_DIFF_ADC22_1x,
+    ATM128_ADC_DIFF_ADC32_1x,
+    ATM128_ADC_DIFF_ADC42_1x,
+    ATM128_ADC_DIFF_ADC52_1x,
+    ATM128_ADC_SNGL_1_23,
+    ATM128_ADC_SNGL_GND,
+};
+
+/* ADC Multiplexer Selection Register */
+typedef struct
+{
+    uint8_t mux   : 5;  //!< Analog Channel and Gain Selection Bits
+    uint8_t adlar : 1;  //!< ADC Left Adjust Result
+    uint8_t refs  : 2;  //!< Reference Selection Bits
+} Atm128Admux_t;
+
+/* ADC Prescaler Settings */
+/* Note: each platform must define ATM128_ADC_PRESCALE to the smallest
+   prescaler which guarantees full A/D precision. */
+enum {
+    ATM128_ADC_PRESCALE_2 = 0,
+    ATM128_ADC_PRESCALE_2b,
+    ATM128_ADC_PRESCALE_4,
+    ATM128_ADC_PRESCALE_8,
+    ATM128_ADC_PRESCALE_16,
+    ATM128_ADC_PRESCALE_32,
+    ATM128_ADC_PRESCALE_64,
+    ATM128_ADC_PRESCALE_128,
+
+    // This special value is used to ask the platform for the prescaler
+    // which gives full precision.
+    ATM128_ADC_PRESCALE
+};
+
+/* ADC Enable Settings */
+enum {
+    ATM128_ADC_ENABLE_OFF = 0,
+    ATM128_ADC_ENABLE_ON,
+};
+
+/* ADC Start Conversion Settings */
+enum {
+    ATM128_ADC_START_CONVERSION_OFF = 0,
+    ATM128_ADC_START_CONVERSION_ON,
+};
+
+/* ADC Free Running Select Settings */
+enum {
+    ATM128_ADC_FREE_RUNNING_OFF = 0,
+    ATM128_ADC_FREE_RUNNING_ON,
+};
+
+/* ADC Interrupt Flag Settings */
+enum {
+    ATM128_ADC_INT_FLAG_OFF = 0,
+    ATM128_ADC_INT_FLAG_ON,
+};
+
+/* ADC Interrupt Enable Settings */
+enum {
+    ATM128_ADC_INT_ENABLE_OFF = 0,
+    ATM128_ADC_INT_ENABLE_ON,
+};
+
+/* ADC Multiplexer Selection Register */
+typedef struct
+{
+    uint8_t adps  : 3;  //!< ADC Prescaler Select Bits
+    uint8_t adie  : 1;  //!< ADC Interrupt Enable
+    uint8_t adif  : 1;  //!< ADC Interrupt Flag
+    uint8_t adate : 1;  //!< ADC Auto Trigger Enable
+    uint8_t adsc  : 1;  //!< ADC Start Conversion
+    uint8_t aden  : 1;  //!< ADC Enable
+} Atm128Adcsra_t;
+
+/* ADC Multiplexer Selection Register */
+typedef struct
+{
+    uint8_t adts  : 3;  //!< ADC Trigger Select
+    uint8_t mux5  : 1;  //!< Analog Channel and Gain Selection Bit
+    uint8_t resv1 : 2;  //!< Reserved
+    uint8_t acme  : 1;  //!< Analog Comparator Multiplexer Enable
+    uint8_t resv2 : 1;  //!< Reserved
+} Atm128Adcsrb_t;
+
+
+typedef uint8_t Atm128_ADCH_t;         //!< ADC data register high
+typedef uint8_t Atm128_ADCL_t;         //!< ADC data register low
+
+// The resource identifier string for the ADC subsystem
+#define UQ_ATM128ADC_RESOURCE "atm128adc.resource"
+
+#endif //_H_Atm128ADC_h
+
diff --git a/tos/chips/atm1281/adc/Atm128AdcP.nc b/tos/chips/atm1281/adc/Atm128AdcP.nc
new file mode 100644
index 00000000..e32b2028
--- /dev/null
+++ b/tos/chips/atm1281/adc/Atm128AdcP.nc
@@ -0,0 +1,235 @@
+/* $Id: Atm128AdcP.nc,v 1.3 2010-06-29 22:07:43 scipio Exp $
+ *
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * Copyright (c) 2002-2005 Intel Corporation.
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ * Copyright (c) 2007, Vanderbilt University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include "Atm128Adc.h"
+
+/**
+ * Internal component of the Atmega1281 A/D HAL.
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ * @author Phil Buonadonna
+ * @author Hu Siquan <husq@xbow.com>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+module Atm128AdcP @safe()
+{
+  provides {
+    interface Init;
+    interface AsyncStdControl;
+    interface Atm128AdcSingle;
+    interface Atm128AdcMultiple;
+  }
+  uses {
+    interface HplAtm128Adc;
+    interface Atm128Calibrate;
+  }
+}
+implementation
+{
+  /* State for the current and next (multiple-sampling only) conversion */
+  struct {
+    bool multiple : 1;		/* single and multiple-sampling mode */
+    bool precise : 1;		/* is this result going to be precise? */
+    uint8_t channel : 5;	/* what channel did this sample come from? */
+  } f, nextF;
+
+  command error_t Init.init() {
+    atomic
+      {
+	Atm128Adcsra_t adcsr;
+
+	adcsr.aden = ATM128_ADC_ENABLE_OFF;
+	adcsr.adsc = ATM128_ADC_START_CONVERSION_OFF;
+	adcsr.adate= ATM128_ADC_FREE_RUNNING_OFF;
+	adcsr.adif = ATM128_ADC_INT_FLAG_OFF;
+	adcsr.adie = ATM128_ADC_INT_ENABLE_OFF;
+	adcsr.adps = ATM128_ADC_PRESCALE_2;
+	call HplAtm128Adc.setAdcsra(adcsr);
+      }
+    return SUCCESS;
+  }
+
+  /* We enable the A/D when start is called, and disable it when stop is
+     called. This drops A/D conversion latency by a factor of two (but
+     increases idle mode power consumption a little).
+  */
+  async command error_t AsyncStdControl.start() {
+    atomic call HplAtm128Adc.enableAdc();
+    return SUCCESS;
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    atomic call HplAtm128Adc.disableAdc();
+
+    return SUCCESS;
+  }
+
+  /* Return TRUE if switching to 'channel' with reference voltage 'refVoltage'
+     will give a precise result (the first sample after changing reference
+     voltage or switching to/between a differential channel is imprecise)
+  */
+  inline bool isPrecise(Atm128Admux_t admux, uint8_t channel, uint8_t refVoltage) {
+    return refVoltage == admux.refs &&
+      (channel <= ATM128_ADC_SNGL_ADC7 || channel >= ATM128_ADC_SNGL_1_23 || channel == admux.mux);
+  }
+
+  async event void HplAtm128Adc.dataReady(uint16_t data) {
+    bool precise, multiple;
+    uint8_t channel;
+
+    atomic
+      {
+	channel = f.channel;
+	precise = f.precise;
+	multiple = f.multiple;
+      }
+
+    if (!multiple)
+      {
+	/* A single sample. Disable the ADC interrupt to avoid starting
+	   a new sample at the next "sleep" instruction. */
+	call HplAtm128Adc.disableInterruption();
+	signal Atm128AdcSingle.dataReady(data, precise);
+      }
+    else
+      {
+	/* Multiple sampling. The user can:
+	   - tell us to stop sampling
+	   - or, to continue sampling on a new channel, possibly with a
+	     new reference voltage; however this change applies not to
+	     the next sample (the hardware has already started working on
+	     that), but on the one after.
+	*/
+	bool cont;
+	uint8_t nextChannel, nextVoltage;
+	Atm128Admux_t admux;
+
+	atomic
+	  {
+	    admux = call HplAtm128Adc.getAdmux();
+	    nextVoltage = admux.refs;
+	    nextChannel = admux.mux;
+	  }
+
+	cont = signal Atm128AdcMultiple.dataReady(data, precise, channel,
+						  &nextChannel, &nextVoltage);
+	atomic
+	  if (cont)
+	    {
+	      /* Switch channels and update our internal channel+precision
+		 tracking state (f and nextF). Note that this tracking will
+		 be incorrect if we take too long to get to this point. */
+	      admux.refs = nextVoltage;
+	      admux.mux = nextChannel;
+	      call HplAtm128Adc.setAdmux(admux);
+
+	      f = nextF;
+	      nextF.channel = nextChannel;
+	      nextF.precise = isPrecise(admux, nextChannel, nextVoltage);
+	    }
+	  else
+	    call HplAtm128Adc.cancel();
+      }
+  }
+
+  /* Start sampling based on request parameters */
+  void getData(uint8_t channel, uint8_t refVoltage, bool leftJustify, uint8_t prescaler) {
+    Atm128Admux_t admux;
+    Atm128Adcsra_t adcsr;
+
+    admux = call HplAtm128Adc.getAdmux();
+    f.precise = isPrecise(admux, channel, refVoltage);
+    f.channel = channel;
+
+    admux.refs = refVoltage;
+    admux.adlar = leftJustify;
+    admux.mux = channel;
+    call HplAtm128Adc.setAdmux(admux);
+
+    adcsr.aden = ATM128_ADC_ENABLE_ON;
+    adcsr.adsc = ATM128_ADC_START_CONVERSION_ON;
+    adcsr.adate= f.multiple;
+    adcsr.adif = ATM128_ADC_INT_FLAG_ON; // clear any stale flag
+    adcsr.adie = ATM128_ADC_INT_ENABLE_ON;
+    if (prescaler == ATM128_ADC_PRESCALE)
+      prescaler = call Atm128Calibrate.adcPrescaler();
+    adcsr.adps = prescaler;
+    call HplAtm128Adc.setAdcsra(adcsr);
+  }
+
+  async command bool Atm128AdcSingle.getData(uint8_t channel, uint8_t refVoltage,
+					     bool leftJustify, uint8_t prescaler) {
+    atomic
+      {
+	f.multiple = FALSE;
+	getData(channel, refVoltage, leftJustify, prescaler);
+
+	return f.precise;
+      }
+  }
+
+  async command bool Atm128AdcSingle.cancel() {
+    /* There is no Atm128AdcMultiple.cancel, for reasons discussed in that
+       interface */
+    return call HplAtm128Adc.cancel();
+  }
+
+  async command bool Atm128AdcMultiple.getData(uint8_t channel, uint8_t refVoltage,
+					       bool leftJustify, uint8_t prescaler) {
+    atomic
+      {
+	f.multiple = TRUE;
+	getData(channel, refVoltage, leftJustify, prescaler);
+	nextF = f;
+	/* We assume the 2nd sample is precise */
+	nextF.precise = TRUE;
+
+	return f.precise;
+      }
+  }
+
+  default async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise) {
+  }
+
+  default async event bool Atm128AdcMultiple.dataReady(uint16_t data, bool precise, uint8_t channel,
+						       uint8_t *newChannel, uint8_t *newRefVoltage) {
+    return FALSE; // stop conversion if we somehow end up here.
+  }
+}
diff --git a/tos/chips/atm1281/adc/HplAtm128AdcP.nc b/tos/chips/atm1281/adc/HplAtm128AdcP.nc
new file mode 100644
index 00000000..3d8b6d6c
--- /dev/null
+++ b/tos/chips/atm1281/adc/HplAtm128AdcP.nc
@@ -0,0 +1,149 @@
+/// $Id: HplAtm128AdcP.nc,v 1.3 2010-06-29 22:07:43 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include "Atm128Adc.h"
+
+/**
+ * HPL for the Atmega1281 A/D conversion susbsystem.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+module HplAtm128AdcP @safe() {
+  provides interface HplAtm128Adc;
+  uses interface McuPowerState;
+}
+implementation {
+  //=== Direct read of HW registers. =================================
+  async command Atm128Admux_t HplAtm128Adc.getAdmux() {
+    return *(Atm128Admux_t*)&ADMUX;
+  }
+  async command Atm128Adcsra_t HplAtm128Adc.getAdcsra() {
+    return *(Atm128Adcsra_t*)&ADCSRA;
+  }
+  async command uint16_t HplAtm128Adc.getValue() {
+    return ADC;
+  }
+
+  DEFINE_UNION_CAST(Admux2int, Atm128Admux_t, uint8_t);
+  DEFINE_UNION_CAST(Adcsra2int, Atm128Adcsra_t, uint8_t);
+
+  //=== Direct write of HW registers. ================================
+  async command void HplAtm128Adc.setAdmux( Atm128Admux_t x ) {
+    ADMUX = Admux2int(x);
+  }
+  async command void HplAtm128Adc.setAdcsra( Atm128Adcsra_t x ) {
+    ADCSRA = Adcsra2int(x);
+  }
+
+  async command void HplAtm128Adc.setPrescaler(uint8_t scale){
+    Atm128Adcsra_t  current_val = call HplAtm128Adc.getAdcsra();
+    current_val.adif = FALSE;
+    current_val.adps = scale;
+    call HplAtm128Adc.setAdcsra(current_val);
+  }
+
+  // Individual bit manipulation. These all clear any pending A/D interrupt.
+  // It's not clear these are that useful...
+  async command void HplAtm128Adc.enableAdc() {
+    SET_BIT(ADCSRA, ADEN);
+    call McuPowerState.update();
+  }
+  async command void HplAtm128Adc.disableAdc() {
+    CLR_BIT(ADCSRA, ADEN);
+    call McuPowerState.update();
+  }
+  async command void HplAtm128Adc.enableInterruption() { SET_BIT(ADCSRA, ADIE); }
+  async command void HplAtm128Adc.disableInterruption() { CLR_BIT(ADCSRA, ADIE); }
+  async command void HplAtm128Adc.setContinuous() {
+    ((Atm128Adcsrb_t*)&ADCSRB)->adts = 0;
+    SET_BIT(ADCSRA, ADATE);
+  }
+  async command void HplAtm128Adc.setSingle() { CLR_BIT(ADCSRA, ADATE); }
+  async command void HplAtm128Adc.resetInterrupt() { SET_BIT(ADCSRA, ADIF); }
+  async command void HplAtm128Adc.startConversion() { SET_BIT(ADCSRA, ADSC); }
+
+
+  /* A/D status checks */
+  async command bool HplAtm128Adc.isEnabled()     {
+    return (call HplAtm128Adc.getAdcsra()).aden;
+  }
+
+  async command bool HplAtm128Adc.isStarted()     {
+    return (call HplAtm128Adc.getAdcsra()).adsc;
+  }
+
+  async command bool HplAtm128Adc.isComplete()    {
+    return (call HplAtm128Adc.getAdcsra()).adif;
+  }
+
+  /* A/D interrupt handlers. Signals dataReady event with interrupts enabled */
+  AVR_ATOMIC_HANDLER(SIG_ADC) {
+    uint16_t data = call HplAtm128Adc.getValue();
+
+    __nesc_enable_interrupt();
+    signal HplAtm128Adc.dataReady(data);
+  }
+
+  default async event void HplAtm128Adc.dataReady(uint16_t done) { }
+
+  async command bool HplAtm128Adc.cancel() {
+    /* This is tricky */
+    atomic
+      {
+	Atm128Adcsra_t oldSr = call HplAtm128Adc.getAdcsra(), newSr;
+
+	/* To cancel a conversion, first turn off ADEN, then turn off
+	   ADSC. We also cancel any pending interrupt.
+	   Finally we reenable the ADC.
+	*/
+	newSr = oldSr;
+	newSr.aden = FALSE;
+	newSr.adif = TRUE; /* This clears a pending interrupt... */
+	newSr.adie = FALSE; /* We don't want to start sampling again at the
+			       next sleep */
+	call HplAtm128Adc.setAdcsra(newSr);
+	newSr.adsc = FALSE;
+	call HplAtm128Adc.setAdcsra(newSr);
+	newSr.aden = TRUE;
+	call HplAtm128Adc.setAdcsra(newSr);
+
+	return oldSr.adif || oldSr.adsc;
+      }
+  }
+}
diff --git a/tos/chips/atm1281/atm128hardware.h b/tos/chips/atm1281/atm128hardware.h
new file mode 100644
index 00000000..241fef26
--- /dev/null
+++ b/tos/chips/atm1281/atm128hardware.h
@@ -0,0 +1,195 @@
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.
+ *  Copyright (c) 2007, Vanderbilt University
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ *  Updated chips/atm128/atm128hardware.h with atm1281's MCU status and
+ *  memory control registers.
+ *
+ *  @author Janos Sallai, Martin Turon, Jason Hill, Philip Levis, Nelson Lee, David Gay
+ */
+
+
+#ifndef _H_atmega128hardware_H
+#define _H_atmega128hardware_H
+
+#include <avr/io.h>
+#if __AVR_LIBC_VERSION__ >= 10400UL
+#include <avr/interrupt.h>
+#else
+#include <avr/interrupt.h>
+#include <avr/signal.h>
+#endif
+#include <avr/wdt.h>
+#include <avr/pgmspace.h>
+#include "atm128const.h"
+
+/* We need slightly different defs than SIGNAL, INTERRUPT */
+#define AVR_ATOMIC_HANDLER(signame) \
+  void signame() __attribute__ ((signal)) @atomic_hwevent() @C()
+
+#define AVR_NONATOMIC_HANDLER(signame) \
+  void signame() __attribute__ ((interrupt)) @hwevent() @C()
+
+/* Macro to create union casting functions. */
+#define DEFINE_UNION_CAST(func_name, from_type, to_type) \
+  to_type func_name(from_type x) { \
+  union {from_type f; to_type t;} c = {f:x}; return c.t; }
+
+// Bit operators using bit number
+#define SET_BIT(port, bit)    ((port) |= _BV(bit))
+#define CLR_BIT(port, bit)    ((port) &= ~_BV(bit))
+#define READ_BIT(port, bit)   (((port) & _BV(bit)) != 0)
+#define FLIP_BIT(port, bit)   ((port) ^= _BV(bit))
+#define WRITE_BIT(port, bit, value) \
+   if (value) SET_BIT((port), (bit)); \
+   else CLR_BIT((port), (bit))
+
+// Bit operators using bit flag mask
+#define SET_FLAG(port, flag)  ((port) |= (flag))
+#define CLR_FLAG(port, flag)  ((port) &= ~(flag))
+#define READ_FLAG(port, flag) ((port) & (flag))
+
+/* Enables interrupts. */
+inline void __nesc_enable_interrupt() @safe() {
+    sei();
+}
+/* Disables all interrupts. */
+inline void __nesc_disable_interrupt() @safe() {
+    cli();
+}
+
+/* Defines data type for storing interrupt mask state during atomic. */
+typedef uint8_t __nesc_atomic_t;
+__nesc_atomic_t __nesc_atomic_start(void);
+void __nesc_atomic_end(__nesc_atomic_t original_SREG);
+
+#ifndef NESC_BUILD_BINARY
+/* @spontaneous() functions should not be included when NESC_BUILD_BINARY
+   is #defined, to avoid duplicate functions definitions wheb binary
+   components are used. Such functions do need a prototype in all cases,
+   though. */
+
+/* Saves current interrupt mask state and disables interrupts. */
+inline __nesc_atomic_t
+__nesc_atomic_start(void) @spontaneous() @safe()
+{
+    __nesc_atomic_t result = SREG;
+    __nesc_disable_interrupt();
+    asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
+    return result;
+}
+
+/* Restores interrupt mask to original state. */
+inline void
+__nesc_atomic_end(__nesc_atomic_t original_SREG) @spontaneous() @safe()
+{
+  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
+  SREG = original_SREG;
+}
+#endif
+
+/* Defines the mcu_power_t type for atm128 power management. */
+typedef uint8_t mcu_power_t @combine("mcombine");
+
+
+enum {
+  ATM128_POWER_IDLE        = 0,
+  ATM128_POWER_ADC_NR      = 1,
+  ATM128_POWER_EXT_STANDBY = 2,
+  ATM128_POWER_SAVE        = 3,
+  ATM128_POWER_STANDBY     = 4,
+  ATM128_POWER_DOWN        = 5,
+};
+
+/* Combine function.  */
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() {
+  return (m1 < m2)? m1: m2;
+}
+
+/* MCU Status Register*/
+typedef struct
+{
+  uint8_t porf  : 1;    //!< Power-on Reset Flag
+  uint8_t extrf : 1;    //!< External Reset Flag
+  uint8_t borf  : 1;    //!< Brown-out Reset Flag
+  uint8_t wdrf  : 1;    //!< Watchdog Reset Flag
+  uint8_t jtrf  : 1;    //!< JTAG Reset Flag
+  uint8_t resv1 : 3;    //!< Reserved
+} Atm128_MCUSR_t;
+
+/* External Memory Control Register A*/
+typedef struct
+{
+  uint8_t srw00 : 1;    //!< Wait-state Select Bits for Lower Sector
+  uint8_t srw01 : 1;    //!< Wait-state Select Bits for Lower Sector
+  uint8_t srw10 : 1;    //!< Wait-state Select Bits for Upper Sector
+  uint8_t srw11 : 1;    //!< Wait-state Select Bits for Upper Sector
+  uint8_t srl   : 3;    //!< Wait-state Sector Limit
+  uint8_t sre   : 1;    //!< External SRAM/XMEM Enable
+} Atm128_XMCRA_t;
+
+/* External Memory Control Register B*/
+typedef struct
+{
+  uint8_t xmm    : 3;    //!< External Memory High Mask
+  uint8_t resv1  : 4;    //!< Reserved
+  uint8_t xmbk   : 1;    //!< External Memory Bus-keeper Enable
+} Atm128_XMCRB_t;
+
+/* Floating-point network-type support.
+   These functions must convert to/from a 32-bit big-endian integer that follows
+   the layout of Java's java.lang.float.floatToRawIntBits method.
+   Conveniently, for the AVR family, this is a straight byte copy...
+*/
+
+typedef float nx_float __attribute__((nx_base_be(afloat)));
+
+inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() {
+  float f;
+  memcpy(&f, source, sizeof(float));
+  return f;
+}
+
+inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() {
+  memcpy(target, &value, sizeof(float));
+  return value;
+}
+
+#endif //_H_atmega128hardware_H
diff --git a/tos/chips/atm1281/timer/Atm1281AlarmAsyncP.nc b/tos/chips/atm1281/timer/Atm1281AlarmAsyncP.nc
new file mode 100644
index 00000000..d367abd9
--- /dev/null
+++ b/tos/chips/atm1281/timer/Atm1281AlarmAsyncP.nc
@@ -0,0 +1,269 @@
+// $Id: Atm1281AlarmAsyncP.nc,v 1.3 2010-06-29 22:07:43 scipio Exp $
+/*
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Build a 32-bit alarm and counter from the atmega1281's 8-bit timer 2
+ * in asynchronous mode. Attempting to use the generic Atm128AlarmC
+ * component and the generic timer components runs into problems
+ * apparently related to letting timer 2 overflow.
+ *
+ * So, instead, this version (inspired by the 1.x code and a remark from
+ * Martin Turon) directly builds a 32-bit alarm and counter on top of timer 2
+ * and never lets timer 2 overflow.
+ *
+ * @author David Gay
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+generic module Atm1281AlarmAsyncP(typedef precision, int divider) @safe() {
+  provides {
+    interface Init;
+    interface Alarm<precision, uint32_t>;
+    interface Counter<precision, uint32_t>;
+  }
+  uses {
+    interface HplAtm128Timer<uint8_t> as Timer;
+    interface HplAtm128TimerCtrl8 as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface HplAtm128TimerAsync as TimerAsync;
+  }
+}
+implementation
+{
+  uint8_t set; 			/* Is the alarm set? */
+  uint32_t t0, dt;		/* Time of the next alarm */
+  norace uint32_t base;		/* base+TCNT2 is the current time if no
+				   interrupt is pending. See Counter.get()
+				   for the full details. */
+
+  enum {
+    MINDT = 2,			/* Minimum interval between interrupts */
+    MAXT = 230			/* Maximum value to let timer 2 reach
+				   (from Joe Polastre and Robert Szewczyk's
+				   painful experiences with the 1.x timer ;-)) */
+  };
+
+  void setInterrupt();
+
+  /* Configure timer 2 */
+  command error_t Init.init() {
+    atomic
+      {
+	Atm128_TCCR2A_t x;
+	Atm128_TCCR2B_t y;
+
+	call TimerAsync.setTimer2Asynchronous();
+	x.flat = 0;
+	x.bits.wgm21 = 1; /* We use the clear-on-compare mode */
+	call TimerCtrl.setControlA(x.flat);
+	y.flat = 0;
+	y.bits.cs = divider;
+	call TimerCtrl.setControlB(y.flat);
+	call Compare.set(MAXT); /* setInterrupt needs a valid value here */
+	call Compare.start();
+      }
+    setInterrupt();
+    return SUCCESS;
+  }
+
+  /* Set compare register for timer 2 to n. But increment n by 1 if TCNT2
+     reaches this value before we can set the compare register.
+  */
+  void setOcr2A(uint8_t n) {
+    while (call TimerAsync.compareABusy())
+      ;
+    if (n == call Timer.get())
+      n++;
+    /* Support for overflow. Force interrupt at wrap around value.
+       This does not cause a backwards-in-time value as we do this
+       every time we set OCR2A. */
+    if (base + n + 1 < base)
+      n = -base - 1;
+    call Compare.set(n);
+  }
+
+  /* Update the compare register to trigger an interrupt at the
+     appropriate time based on the current alarm settings
+   */
+  void setInterrupt() {
+    bool fired = FALSE;
+
+    atomic
+      {
+	/* interrupt_in is the time to the next interrupt. Note that
+	   compare register values are off by 1 (i.e., if you set OCR2A to
+	   3, the interrupt will happen when TCNT2 is 4) */
+	uint8_t interrupt_in = 1 + call Compare.get() - call Timer.get();
+	uint8_t newOcr2A;
+	uint8_t tifr2 = call TimerCtrl.getInterruptFlag();
+	dbg("Atm1281AlarmAsyncP", "Atm1281AlarmAsyncP: TIFR is %hhx\n", tifr2);
+	if ((interrupt_in != 0 && interrupt_in < MINDT) || (tifr2 & (1 << OCF2A))) {
+	  if (interrupt_in < MINDT) {
+	    dbg("Atm1281AlarmAsyncP", "Atm1281AlarmAsyncP: under min: %hhu.\n", interrupt_in);
+	  }
+	  else {
+	    dbg("Atm1281AlarmAsyncP", "Atm1281AlarmAsyncP: OCF2A set.\n");
+	  }
+	  return; // wait for next interrupt
+	}
+
+	/* When no alarm is set, we just ask for an interrupt every MAXT */
+	if (!set) {
+	  newOcr2A = MAXT;
+	  dbg("Atm1281AlarmAsyncP", "Atm1281AlarmAsyncP: no alarm set, set at max.\n");
+	}
+	else
+	  {
+	    uint32_t now = call Counter.get();
+	    dbg("Atm1281AlarmAsyncP", "Atm1281AlarmAsyncP: now-t0 = %llu, dt = %llu\n", (now-t0), dt);
+	    /* Check if alarm expired */
+	    if ((uint32_t)(now - t0) >= dt)
+	      {
+		set = FALSE;
+		fired = TRUE;
+		newOcr2A = MAXT;
+	      }
+	    else
+	      {
+		/* No. Set compare register to time of next alarm if it's
+		   within the next MAXT units */
+		uint32_t alarm_in = (t0 + dt) - base;
+
+		if (alarm_in > MAXT)
+		  newOcr2A = MAXT;
+		else if ((uint8_t)alarm_in < MINDT) // alarm_in < MAXT ...
+		  newOcr2A = MINDT;
+		else
+		  newOcr2A = alarm_in;
+	      }
+	  }
+	newOcr2A--; // interrupt is 1ms late
+	setOcr2A(newOcr2A);
+      }
+    if (fired)
+      signal Alarm.fired();
+  }
+
+  async event void Compare.fired() {
+    int overflowed;
+
+    /* Compare register fired. Update time knowledge */
+    base += call Compare.get() + 1U; // interrupt is 1ms late
+    overflowed = !base;
+    __nesc_enable_interrupt();
+    setInterrupt();
+    if (overflowed)
+      signal Counter.overflow();
+  }
+
+  async command uint32_t Counter.get() {
+    uint32_t now;
+
+    atomic
+      {
+	/* Current time is base+TCNT2 if no interrupt is pending. But if
+	   an interrupt is pending, then it's base + compare value + 1 + TCNT2 */
+	uint8_t now8 = call Timer.get();
+
+	if ((((Atm128_TIFR2_t)call TimerCtrl.getInterruptFlag())).bits.ocfa)
+	  /* We need to reread TCNT2 as it might've overflowed after we
+	     read TCNT2 the first time */
+	  now = base + call Compare.get() + 1 + call Timer.get();
+	else
+	  /* We need to use the value of TCNT2 from before we check the
+	     interrupt flag, as it might wrap around after the check */
+	  now = base + now8;
+      }
+    return now;
+  }
+
+  async command bool Counter.isOverflowPending() {
+    atomic
+      return (((Atm128_TIFR2_t)call TimerCtrl.getInterruptFlag())).bits.ocfa &&
+	!(base + call Compare.get() + 1);
+  }
+
+  async command void Counter.clearOverflow() {
+    atomic
+      if (call Counter.isOverflowPending())
+	{
+	  base = 0;
+	  call Compare.reset();
+	}
+      else
+	return;
+    setInterrupt();
+  }
+
+  async command void Alarm.start(uint32_t ndt) {
+    call Alarm.startAt(call Counter.get(), ndt);
+  }
+
+  async command void Alarm.stop() {
+    atomic set = FALSE;
+  }
+
+  async command bool Alarm.isRunning() {
+    atomic return set;
+  }
+
+  async command void Alarm.startAt(uint32_t nt0, uint32_t ndt) {
+    atomic
+      {
+	set = TRUE;
+	t0 = nt0;
+	dt = ndt;
+      }
+    setInterrupt();
+  }
+
+  async command uint32_t Alarm.getNow() {
+    return call Counter.get();
+  }
+
+  async command uint32_t Alarm.getAlarm() {
+    atomic return t0 + dt;
+  }
+
+  async event void Timer.overflow() { }
+}
diff --git a/tos/chips/atm1281/timer/Atm128AlarmAsyncC.nc b/tos/chips/atm1281/timer/Atm128AlarmAsyncC.nc
new file mode 100644
index 00000000..4c112e8e
--- /dev/null
+++ b/tos/chips/atm1281/timer/Atm128AlarmAsyncC.nc
@@ -0,0 +1,78 @@
+// $Id: Atm128AlarmAsyncC.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $
+/*
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * Build a 32-bit alarm and counter from the atmega1281's 8-bit timer 2
+ * in asynchronous mode. Attempting to use the generic Atm128AlarmC
+ * component and the generic timer components runs into problems
+ * apparently related to letting timer 2 overflow.
+ * 
+ * So, instead, this version (inspired by the 1.x code and a remark from
+ * Martin Turon) directly builds a 32-bit alarm and counter on top of timer 2
+ * and never lets timer 2 overflow.
+ *
+ * @author David Gay
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+generic configuration Atm128AlarmAsyncC(typedef precision, int divider) {
+  provides {
+    interface Init @atleastonce();
+    interface Alarm<precision, uint32_t>;
+    interface Counter<precision, uint32_t>;
+  }
+}
+implementation
+{
+  components new Atm1281AlarmAsyncP(precision, divider),
+    HplAtm1281Timer2AsyncC;
+
+  Init = Atm1281AlarmAsyncP;
+  Alarm = Atm1281AlarmAsyncP;
+  Counter = Atm1281AlarmAsyncP;
+
+  Atm1281AlarmAsyncP.Timer -> HplAtm1281Timer2AsyncC;
+  Atm1281AlarmAsyncP.TimerCtrl -> HplAtm1281Timer2AsyncC;
+  Atm1281AlarmAsyncP.Compare -> HplAtm1281Timer2AsyncC;
+  Atm1281AlarmAsyncP.TimerAsync -> HplAtm1281Timer2AsyncC;
+}
diff --git a/tos/chips/atm1281/timer/Atm128Timer.h b/tos/chips/atm1281/timer/Atm128Timer.h
new file mode 100644
index 00000000..f0d2a87a
--- /dev/null
+++ b/tos/chips/atm1281/timer/Atm128Timer.h
@@ -0,0 +1,413 @@
+// $Id: Atm128Timer.h,v 1.2 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+/*
+ * This file contains the configuration constants for the Atmega1281
+ * clocks and timers.
+ *
+ * @author Philip Levis
+ * @author Martin Turon
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#ifndef _H_Atm128Timer_h
+#define _H_Atm128Timer_h
+
+/* Prescaler values for Timer/Counter 2 (8-bit asynchronous ) */
+enum {
+  ATM128_CLK8_OFF         = 0x0,
+  ATM128_CLK8_NORMAL      = 0x1,
+  ATM128_CLK8_DIVIDE_8    = 0x2,
+  ATM128_CLK8_DIVIDE_32   = 0x3,
+  ATM128_CLK8_DIVIDE_64   = 0x4,
+  ATM128_CLK8_DIVIDE_128  = 0x5,
+  ATM128_CLK8_DIVIDE_256  = 0x6,
+  ATM128_CLK8_DIVIDE_1024 = 0x7,
+};
+
+/* Prescaler values for Timer/Counter 0 (8-bit) and 1, 3, 4, 5 (16-bit) */
+enum {
+  ATM128_CLK16_OFF           = 0x0,
+  ATM128_CLK16_NORMAL        = 0x1,
+  ATM128_CLK16_DIVIDE_8      = 0x2,
+  ATM128_CLK16_DIVIDE_64     = 0x3,
+  ATM128_CLK16_DIVIDE_256    = 0x4,
+  ATM128_CLK16_DIVIDE_1024   = 0x5,
+  ATM128_CLK16_EXTERNAL_FALL = 0x6,
+  ATM128_CLK16_EXTERNAL_RISE = 0x7,
+};
+
+/* Common scales across both 8-bit and 16-bit clocks. */
+enum {
+    AVR_CLOCK_OFF = 0,
+    AVR_CLOCK_ON  = 1,
+    AVR_CLOCK_DIVIDE_8 = 2,
+};
+
+enum {
+    ATM128_TIMER_COMPARE_NORMAL = 0,
+    ATM128_TIMER_COMPARE_TOGGLE,
+    ATM128_TIMER_COMPARE_CLEAR,
+    ATM128_TIMER_COMPARE_SET
+};
+
+
+/* 8-bit Waveform Generation Modes */
+enum {
+    ATM128_WAVE8_NORMAL = 0,
+    ATM128_WAVE8_PWM,
+    ATM128_WAVE8_CTC,
+    ATM128_WAVE8_PWM_FAST,
+};
+
+/* 16-bit Waveform Generation Modes */
+enum {
+    ATM128_WAVE16_NORMAL = 0,
+    ATM128_WAVE16_PWM_8BIT,
+    ATM128_WAVE16_PWM_9BIT,
+    ATM128_WAVE16_PWM_10BIT,
+    ATM128_WAVE16_CTC_COMPARE,
+    ATM128_WAVE16_PWM_FAST_8BIT,
+    ATM128_WAVE16_PWM_FAST_9BIT,
+    ATM128_WAVE16_PWM_FAST_10BIT,
+    ATM128_WAVE16_PWM_CAPTURE_LOW,
+    ATM128_WAVE16_PWM_COMPARE_LOW,
+    ATM128_WAVE16_PWM_CAPTURE_HIGH,
+    ATM128_WAVE16_PWM_COMPARE_HIGH,
+    ATM128_WAVE16_CTC_CAPTURE,
+    ATM128_WAVE16_RESERVED,
+    ATM128_WAVE16_PWM_FAST_CAPTURE,
+    ATM128_WAVE16_PWM_FAST_COMPARE,
+};
+
+/* 8-bit Timer compare settings */
+enum {
+    ATM128_COMPARE_OFF = 0,  //!< compare disconnected
+    ATM128_COMPARE_TOGGLE,   //!< toggle on match (PWM reserved
+    ATM128_COMPARE_CLEAR,    //!< clear on match  (PWM downcount)
+    ATM128_COMPARE_SET,      //!< set on match    (PWN upcount)
+};
+
+/* 8-bit Timer/Counter 0 Control Register A*/
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t wgm00 : 1;  //!< Waveform generation mode (low bit)
+    uint8_t wgm01 : 1;  //!< Waveform generation mode (high bit)
+    uint8_t resv1 : 2;  //!< Compare Match Output
+    uint8_t com0b0: 1;  //!< Compare Match Output
+    uint8_t com0b1: 1;  //!< Compare Match Output
+    uint8_t com0a0: 1;  //!< Compare Match Output
+    uint8_t com0a1: 1;  //!< Compare Match Output
+  } bits;
+} Atm128_TCCR0A_t;
+
+/* 8-bit Timer/Counter 0 Control Register B*/
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t cs00  : 1;  //!< Clock Select 0
+    uint8_t cs01  : 1;  //!< Clock Select 1
+    uint8_t cs02  : 2;  //!< Clock Select 2
+    uint8_t wgm02 : 1;  //!< Waveform Generation Mode
+    uint8_t resv1 : 2;  //!< Reserved
+    uint8_t foc0b : 1;  //!< Force Output Compare B
+    uint8_t foc0a : 1;  //!< Force Output Compare A
+  } bits;
+} Atm128_TCCR0B_t;
+
+/* Timer/Counter 0 Interrupt Mask Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t toie0 : 1; //!< Timer/Counter0 Overflow Interrupt Enable
+    uint8_t ocie0a: 1; //!< Timer/Counter0 Output Compare Match A Interrupt Enable
+    uint8_t ocie0e: 1; //!< Timer/Counter Output Compare Match B Interrupt Enable
+    uint8_t resv1 : 5; //!< Reserved
+  } bits;
+} Atm128_TIMSK0_t;
+
+/* Timer/Counter 0 Interrupt Flag Register*/
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t tov0  : 1; //!< Timer/Counter0 Overflow Flag
+    uint8_t ocf0a : 1; //!< Timer/Counter 0 Output Compare A Match Flag
+    uint8_t ocf0b : 1; //!< Timer/Counter 0 Output Compare B Match Flag
+    uint8_t resv1 : 5; //!< Reserved
+  } bits;
+} Atm128_TIFR0_t;
+
+/* Asynchronous Status Register -- Timer2 */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t tcr2bub: 1;  //!< Timer/Counter Control Register2 Update Busy
+    uint8_t tcr2aub: 1;  //!< Timer/Counter Control Register2 Update Busy
+    uint8_t ocr2bub: 1;  //!< Output Compare Register2 Update Busy
+    uint8_t ocr2aub: 1;  //!< Output Compare Register2 Update Busy
+    uint8_t tcn2ub : 1;  //!< Timer/Counter2 Update Busy
+    uint8_t as2    : 1;  //!< Asynchronous Timer/Counter2 (off=CLK_IO,on=TOSC1)
+    uint8_t exclk  : 1;  //!< Enable External Clock Input
+    uint8_t resv1  : 1;  //!< Reserved
+  } bits;
+} Atm128_ASSR_t;
+
+/* Timer/Counter 2 Control Register A*/
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t wgm20 : 1; //!< Waveform Generation Mode
+    uint8_t wgm21 : 1; //!< Waveform Generation Mode
+    uint8_t resv1 : 2; //!< Reserved
+    uint8_t comb: 2; //!< Compare Output Mode for Channel B
+    uint8_t coma: 2; //!< Compare Output Mode for Channel A
+  } bits;
+} Atm128_TCCR2A_t;
+
+/* Timer/Counter 2 Control Register B*/
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t cs    : 3; //!< Clock Select
+    uint8_t wgm22 : 1; //!< Waveform Generation Mode
+    uint8_t resv1 : 2; //!< Reserved
+    uint8_t foc2b : 1; //!< Force Output Compare B
+    uint8_t foc2a : 1; //!< Force Output Compare A
+  } bits;
+} Atm128_TCCR2B_t;
+
+/* Timer/Counter 2 Interrupt Mask Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t toie : 1; //!< Timer/Counter2 Overflow Interrupt Enable
+    uint8_t ociea: 1; //!< Timer/Counter2 Output Compare Match A Interrupt Enable
+    uint8_t ocieb: 1; //!< Timer/Counter Output Compare Match B Interrupt Enable
+    uint8_t resv1 : 5; //!< Reserved
+  } bits;
+} Atm128_TIMSK2_t;
+
+/* Timer/Counter 2 Interrupt Flag Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t tov  : 1; //!< Timer1 Overflow Flag
+    uint8_t ocfa : 1; //!< Timer1 Output Compare Flag A
+    uint8_t ocfb : 1; //!< Timer1 Output Compare Flag B
+    uint8_t resv1 : 5; //!< Reserved
+  } bits;
+} Atm128_TIFR2_t;
+
+
+/* Timer/Counter 1,3,4,5 Control Register A*/
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t wgm01  : 2; //!< Waveform Generation Mode
+    uint8_t comc   : 2; //!< Compare Output Mode for Channel C
+    uint8_t comb   : 2; //!< Compare Output Mode for Channel B
+    uint8_t coma   : 2; //!< Compare Output Mode for Channel A
+  } bits;
+} Atm128_TCCRA_t;
+
+/* Timer/Counter 1,3,4,5 Control Register B*/
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t cs    : 3; //!< Clock Select
+    uint8_t wgm23 : 2; //!< Waveform Generation Mode
+    uint8_t resv1 : 1; //!< Reserved
+    uint8_t ices  : 1; //!< Input Capture Edge Select
+    uint8_t icnc  : 1; //!< Input Capture Noise Canceler
+  } bits;
+} Atm128_TCCRB_t;
+
+/* Timer/Counter 1,3,4,5 Control Register C*/
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t resv1 : 5; //!< Reserved
+    uint8_t focc : 1; //!< Force Output Compare for Channel A
+    uint8_t focb : 1; //!< Force Output Compare for Channel A
+    uint8_t foca : 1; //!< Force Output Compare for Channel A
+  } bits;
+} Atm128_TCCRC_t;
+
+/* Timer/Counter 1,3,4,5 Interrupt Mask Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t toie : 1; //!< Timer/Counter1 Overflow Interrupt Enable
+    uint8_t ociea: 1; //!< Timer/Counter1 Output Compare Match A Interrupt Enable
+    uint8_t ocieb: 1; //!< Timer/Counter1 Output Compare Match B Interrupt Enable
+    uint8_t ociec: 1; //!< Timer/Counter1 Output Compare Match C Interrupt Enable
+    uint8_t resv1: 1; //!< Reserved
+    uint8_t icie : 1; //!< Timer/Counter1, Input Capture Interrupt Enable
+    uint8_t resv2 : 2; //!< Reserved
+  } bits;
+} Atm128_TIMSK_t;
+
+/* Timer/Counter 1,3,4,5 Interrupt Flag Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t tov  : 1; //!< Timer1 Overflow Flag
+    uint8_t ocfa : 1; //!< Timer1 Output Compare Flag A
+    uint8_t ocfb : 1; //!< Timer1 Output Compare Flag B
+    uint8_t ocfc : 1; //!< Timer1 Output Compare Flag C
+    uint8_t resv1: 1; //!< Reserved
+    uint8_t icf  : 1; //!< Timer1 Input Capture Flag 
+    uint8_t resv2: 2; //!< Reserved
+  } bits;
+} Atm128_TIFR_t;
+
+/* General Timer/Counter Control Register */
+typedef union
+{
+  uint8_t flat;
+  struct {
+    uint8_t psrsync: 1; //!< Prescaler Reset for Synchronous Timer/Counters 0,1,3,4,5
+    uint8_t psrasy : 1; //!< Prescaler Reset Timer/Counter2
+    uint8_t resv1  : 5; //!< Reserved
+    uint8_t tsm    : 1; //!< Timer/Counter Synchronization Mode
+  } bits;
+} Atm128_GTCCR_t;
+
+// Read/Write these 16-bit Timer registers
+// Access as bytes.  Read low before high.  Write high before low. 
+typedef uint8_t Atm128_TCNT1H_t;  //!< Timer1 Register
+typedef uint8_t Atm128_TCNT1L_t;  //!< Timer1 Register
+typedef uint8_t Atm128_TCNT3H_t;  //!< Timer3 Register
+typedef uint8_t Atm128_TCNT3L_t;  //!< Timer3 Register
+typedef uint8_t Atm128_TCNT4H_t;  //!< Timer4 Register
+typedef uint8_t Atm128_TCNT4L_t;  //!< Timer4 Register
+typedef uint8_t Atm128_TCNT5H_t;  //!< Timer5 Register
+typedef uint8_t Atm128_TCNT5L_t;  //!< Timer5 Register
+
+/* Contains value to continuously compare with Timer1 */
+typedef uint8_t Atm128_OCR1AH_t;  //!< Output Compare Register 1A
+typedef uint8_t Atm128_OCR1AL_t;  //!< Output Compare Register 1A
+typedef uint8_t Atm128_OCR1BH_t;  //!< Output Compare Register 1B
+typedef uint8_t Atm128_OCR1BL_t;  //!< Output Compare Register 1B
+typedef uint8_t Atm128_OCR1CH_t;  //!< Output Compare Register 1C
+typedef uint8_t Atm128_OCR1CL_t;  //!< Output Compare Register 1C
+
+/* Contains value to continuously compare with Timer3 */
+typedef uint8_t Atm128_OCR3AH_t;  //!< Output Compare Register 3A
+typedef uint8_t Atm128_OCR3AL_t;  //!< Output Compare Register 3A
+typedef uint8_t Atm128_OCR3BH_t;  //!< Output Compare Register 3B
+typedef uint8_t Atm128_OCR3BL_t;  //!< Output Compare Register 3B
+typedef uint8_t Atm128_OCR3CH_t;  //!< Output Compare Register 3C
+typedef uint8_t Atm128_OCR3CL_t;  //!< Output Compare Register 3C
+
+/* Contains value to continuously compare with Timer4 */
+typedef uint8_t Atm128_OCR4AH_t;  //!< Output Compare Register 4A
+typedef uint8_t Atm128_OCR4AL_t;  //!< Output Compare Register 4A
+typedef uint8_t Atm128_OCR4BH_t;  //!< Output Compare Register 4B
+typedef uint8_t Atm128_OCR4BL_t;  //!< Output Compare Register 4B
+typedef uint8_t Atm128_OCR4CH_t;  //!< Output Compare Register 4C
+typedef uint8_t Atm128_OCR4CL_t;  //!< Output Compare Register 4C
+
+/* Contains value to continuously compare with Timer5 */
+typedef uint8_t Atm128_OCR5AH_t;  //!< Output Compare Register 5A
+typedef uint8_t Atm128_OCR5AL_t;  //!< Output Compare Register 5A
+typedef uint8_t Atm128_OCR5BH_t;  //!< Output Compare Register 5B
+typedef uint8_t Atm128_OCR5BL_t;  //!< Output Compare Register 5B
+typedef uint8_t Atm128_OCR5CH_t;  //!< Output Compare Register 5C
+typedef uint8_t Atm128_OCR5CL_t;  //!< Output Compare Register 5C
+
+/* Contains counter value when event occurs on ICPn pin. */
+typedef uint8_t Atm128_ICR1H_t;  //!< Input Capture Register 1
+typedef uint8_t Atm128_ICR1L_t;  //!< Input Capture Register 1
+typedef uint8_t Atm128_ICR3H_t;  //!< Input Capture Register 3
+typedef uint8_t Atm128_ICR3L_t;  //!< Input Capture Register 3
+typedef uint8_t Atm128_ICR4H_t;  //!< Input Capture Register 4
+typedef uint8_t Atm128_ICR4L_t;  //!< Input Capture Register 4
+typedef uint8_t Atm128_ICR5H_t;  //!< Input Capture Register 5
+typedef uint8_t Atm128_ICR5L_t;  //!< Input Capture Register 5
+
+/* Resource strings for timer 1 and 3 compare registers */
+#define UQ_TIMER1_COMPARE "atm128.timer1"
+#define UQ_TIMER3_COMPARE "atm128.timer3" 
+
+#endif //_H_Atm128Timer_h
+
diff --git a/tos/chips/atm1281/timer/HplAtm1281Timer1P.nc b/tos/chips/atm1281/timer/HplAtm1281Timer1P.nc
new file mode 100644
index 00000000..50386209
--- /dev/null
+++ b/tos/chips/atm1281/timer/HplAtm1281Timer1P.nc
@@ -0,0 +1,245 @@
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Internal component of the HPL interface to Atmega1281 timer 1.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm1281Timer1P @safe()
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as CompareA;
+    interface HplAtm128Compare<uint16_t> as CompareB;
+    interface HplAtm128Compare<uint16_t> as CompareC;
+  }
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint16_t Timer.get() { return TCNT1; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint16_t t) { TCNT1 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR1B & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  {
+    Atm128_TCCRB_t x = (Atm128_TCCRB_t) call TimerCtrl.getControlB();
+    x.bits.cs = s;
+    call TimerCtrl.setControlB(x.flat);
+  }
+
+  //=== Read the control registers. =====================================
+  async command uint8_t TimerCtrl.getControlA() {
+    return TCCR1A;
+  }
+
+  async command uint8_t TimerCtrl.getControlB() {
+    return TCCR1B;
+  }
+
+  async command uint8_t TimerCtrl.getControlC() {
+    return TCCR1C;
+  }
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setControlA( uint8_t x ) {
+    TCCR1A = x;
+  }
+
+  async command void TimerCtrl.setControlB( uint8_t x ) {
+    TCCR1B = x;
+  }
+
+  async command void TimerCtrl.setControlC( uint8_t x ) {
+    TCCR1C = x;
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command uint8_t TimerCtrl.getInterruptMask() {
+    return TIMSK1;
+  }
+
+  //=== Write the interrupt mask. ====================================
+  async command void TimerCtrl.setInterruptMask( uint8_t x ) {
+    TIMSK1 = x;
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command uint8_t TimerCtrl.getInterruptFlag() {
+    return TIFR1;
+  }
+
+  //=== Write the interrupt flags. ====================================
+  async command void TimerCtrl.setInterruptFlag( uint8_t x ) {
+    TIFR1 = x;
+  }
+
+  //=== Capture 16-bit implementation. ===================================
+  async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR1B,ICES1, up); }
+
+  //=== Timer 16-bit implementation. ===================================
+  async command void Timer.reset()    { TIFR1 = 1 << TOV1; }
+  async command void Capture.reset()  { TIFR1 = 1 << ICF1; }
+  async command void CompareA.reset() { TIFR1 = 1 << OCF1A; }
+  async command void CompareB.reset() { TIFR1 = 1 << OCF1B; }
+  async command void CompareC.reset() { TIFR1 = 1 << OCF1C; }
+
+  async command void Timer.start()    { SET_BIT(TIMSK1,TOIE1); }
+  async command void Capture.start()  { SET_BIT(TIMSK1,ICIE1); }
+  async command void CompareA.start() { SET_BIT(TIMSK1,OCIE1A); }
+  async command void CompareB.start() { SET_BIT(TIMSK1,OCIE1B); }
+  async command void CompareC.start() { SET_BIT(TIMSK1,OCIE1C); }
+
+  async command void Timer.stop()    { CLR_BIT(TIMSK1,TOIE1); }
+  async command void Capture.stop()  { CLR_BIT(TIMSK1,ICIE1); }
+  async command void CompareA.stop() { CLR_BIT(TIMSK1,OCIE1A); }
+  async command void CompareB.stop() { CLR_BIT(TIMSK1,OCIE1B); }
+  async command void CompareC.stop() { CLR_BIT(TIMSK1,OCIE1C); }
+
+  async command bool Timer.test() {
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.tov;
+  }
+  async command bool Capture.test()  {
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.icf;
+  }
+  async command bool CompareA.test() {
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfa;
+  }
+  async command bool CompareB.test() {
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfb;
+  }
+  async command bool CompareC.test() {
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfc;
+  }
+
+  async command bool Timer.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.toie;
+  }
+  async command bool Capture.isOn()  {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.icie;
+  }
+  async command bool CompareA.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociea;
+  }
+  async command bool CompareB.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ocieb;
+  }
+  async command bool CompareC.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociec;
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint16_t CompareA.get() { return OCR1A; }
+  async command uint16_t CompareB.get() { return OCR1B; }
+  async command uint16_t CompareC.get() { return OCR1C; }
+
+  //=== Write the compare registers. ====================================
+  async command void CompareA.set(uint16_t t) { OCR1A = t; }
+  async command void CompareB.set(uint16_t t) { OCR1B = t; }
+  async command void CompareC.set(uint16_t t) { OCR1C = t; }
+
+  //=== Read the capture registers. =====================================
+  async command uint16_t Capture.get() { return ICR1; }
+
+  //=== Write the capture registers. ====================================
+  async command void Capture.set(uint16_t t)  { ICR1 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void CompareA.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1A) {
+    signal CompareA.fired();
+  }
+  default async event void CompareB.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1B) {
+    signal CompareB.fired();
+  }
+  default async event void CompareC.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1C) {
+    signal CompareC.fired();
+  }
+  default async event void Capture.captured(uint16_t time) { }
+  AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE1) {
+    signal Capture.captured(call Capture.get());
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW1) {
+    signal Timer.overflow();
+  }
+}
diff --git a/tos/chips/atm1281/timer/HplAtm1281Timer2AsyncC.nc b/tos/chips/atm1281/timer/HplAtm1281Timer2AsyncC.nc
new file mode 100644
index 00000000..10f07b3c
--- /dev/null
+++ b/tos/chips/atm1281/timer/HplAtm1281Timer2AsyncC.nc
@@ -0,0 +1,98 @@
+/// $Id: HplAtm1281Timer2AsyncC.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Simple wrapper around the actual timer implementation that automatically
+ * wires it to McuSleepC for low-power calculations..
+ *
+ * @author Philip Levis
+ * @author David Gay
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <Atm128Timer.h>
+
+configuration HplAtm1281Timer2AsyncC
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface HplAtm128TimerAsync       as TimerAsync;
+  }
+}
+implementation
+{
+  components HplAtm1281Timer2AsyncP;
+  components McuSleepC;
+
+  McuSleepC.McuPowerOverride -> HplAtm1281Timer2AsyncP;
+
+  Timer = HplAtm1281Timer2AsyncP;
+  TimerCtrl = HplAtm1281Timer2AsyncP;
+  Compare = HplAtm1281Timer2AsyncP;
+  TimerAsync = HplAtm1281Timer2AsyncP;
+}
diff --git a/tos/chips/atm1281/timer/HplAtm1281Timer2AsyncP.nc b/tos/chips/atm1281/timer/HplAtm1281Timer2AsyncP.nc
new file mode 100644
index 00000000..0f99a432
--- /dev/null
+++ b/tos/chips/atm1281/timer/HplAtm1281Timer2AsyncP.nc
@@ -0,0 +1,290 @@
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * HPL interface to Atmega1281 timer 2 in ASYNC mode. This is a specialised
+ * HPL component that assumes that timer 2 is used in ASYNC mode and
+ * includes some workarounds for some of the weirdnesses (delayed overflow
+ * interrupt) of that mode.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm1281Timer2AsyncP @safe()
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface McuPowerOverride;
+    interface HplAtm128TimerAsync       as TimerAsync;
+  }
+}
+implementation
+{
+//  bool inOverflow;
+
+//  command error_t Init.init() {
+//    SET_BIT(ASSR, AS2);  // set Timer/Counter2 to asynchronous mode
+//    return SUCCESS;
+//  }
+
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer.get() { return TCNT2; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint8_t t)  {
+    while (ASSR & 1 << TCN2UB)
+      ;
+    TCNT2 = t;
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR2B & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  {
+    Atm128_TCCR2B_t x = (Atm128_TCCR2B_t) call TimerCtrl.getControlB();
+    x.bits.cs = s;
+    call TimerCtrl.setControlB(x.flat);
+  }
+
+  //=== Read the control registers. =====================================
+  async command uint8_t TimerCtrl.getControlA() {
+    return TCCR2A;
+  }
+
+  async command uint8_t TimerCtrl.getControlB() {
+    return TCCR2B;
+  }
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setControlA( uint8_t x ) {
+    while (ASSR & 1 << TCR2AUB)
+      ;
+    TCCR2A = ((Atm128_TCCR2A_t)x).flat;
+  }
+
+  async command void TimerCtrl.setControlB( uint8_t x ) {
+    while (ASSR & 1 << TCR2BUB)
+      ;
+    TCCR2B = ((Atm128_TCCR2B_t)x).flat;
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command uint8_t TimerCtrl.getInterruptMask() {
+    return TIMSK2;
+  }
+
+  //=== Write the interrupt mask. ====================================
+  async command void TimerCtrl.setInterruptMask( uint8_t x ) {
+    TIMSK2 = x;
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command uint8_t TimerCtrl.getInterruptFlag() {
+    return TIFR2;
+  }
+
+  //=== Write the interrupt flags. ====================================
+  async command void TimerCtrl.setInterruptFlag( uint8_t x ) {
+    TIFR2 = x;
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer.reset() { TIFR2 = 1 << TOV2; }
+  async command void Timer.start() { SET_BIT(TIMSK2, TOIE2); }
+  async command void Timer.stop()  { CLR_BIT(TIMSK2, TOIE2); }
+
+  bool overflowed() {
+    return ((Atm128_TIFR2_t)call TimerCtrl.getInterruptFlag()).bits.tov;
+  }
+
+  async command bool Timer.test()  {
+    return overflowed();
+  }
+
+  async command bool Timer.isOn()  {
+    return ((Atm128_TIMSK2_t)call TimerCtrl.getInterruptMask()).bits.toie;
+  }
+
+  async command void Compare.reset() { TIFR2 = 1 << OCF2A; }
+  async command void Compare.start() { SET_BIT(TIMSK2,OCIE2A); }
+  async command void Compare.stop()  { CLR_BIT(TIMSK2,OCIE2A); }
+  async command bool Compare.test()  {
+    return ((Atm128_TIFR2_t)call TimerCtrl.getInterruptFlag()).bits.ocfa;
+  }
+  async command bool Compare.isOn()  {
+    return ((Atm128_TIMSK2_t)call TimerCtrl.getInterruptMask()).bits.ociea;
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint8_t Compare.get(){ return OCR2A; }
+
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(uint8_t t)   {
+    atomic
+      {
+	while (ASSR & 1 << OCR2AUB)
+	  ;
+	OCR2A = t;
+      }
+  }
+
+  //=== Timer interrupts signals ========================================
+  inline void stabiliseTimer2() {
+    TCCR2A = TCCR2A;
+    while (ASSR & 1 << TCR2AUB)
+      ;
+  }
+
+  /**
+   * On the atm128, there is a small latency when waking up from
+   * POWER_SAVE mode. So if a timer is going to go off very soon, it's
+   * better to drop down until EXT_STANDBY, which has a 6 cycle wakeup
+   * latency. This function calculates whether staying in EXT_STANDBY
+   * is needed. If the timer is not running it returns POWER_DOWN.
+   * Please refer to TEP 112 and the atm128 datasheet for details.
+   */
+
+  async command mcu_power_t McuPowerOverride.lowestState() {
+    uint8_t diff;
+    // We need to make sure that the sleep wakeup latency will not
+    // cause us to miss a timer. POWER_SAVE
+    if (TIMSK2 & (1 << OCIE2A | 1 << TOIE2)) {
+      // need to wait for timer 2 updates propagate before sleeping
+      // (we don't need to worry about reentering sleep mode too early,
+      // as the wake ups from timer2 wait at least one TOSC1 cycle
+      // anyway - see the stabiliseTimer2 function)
+      while (ASSR & (1 << TCN2UB | 1 << OCR2AUB | 1 << TCR2AUB))
+	;
+      diff = OCR2A - TCNT2;
+      if (diff < EXT_STANDBY_T0_THRESHOLD ||
+	  TCNT2 > 256 - EXT_STANDBY_T0_THRESHOLD)
+	return ATM128_POWER_EXT_STANDBY;
+      return ATM128_POWER_SAVE;
+    }
+    else {
+      return ATM128_POWER_DOWN;
+    }
+  }
+
+  default async event void Compare.fired() { }
+  AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE2A) {
+    stabiliseTimer2();
+//    __nesc_enable_interrupt();
+
+    signal Compare.fired();
+  }
+
+  default async event void Timer.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW2) {
+    stabiliseTimer2();
+//    inOverflow = TRUE;
+    signal Timer.overflow();
+//    inOverflow = FALSE;
+  }
+
+  // Asynchronous status register support
+  async command Atm128_ASSR_t TimerAsync.getAssr() {
+    return *(Atm128_ASSR_t *)&ASSR;
+  }
+
+  async command void TimerAsync.setAssr(Atm128_ASSR_t x) {
+    ASSR = x.flat;
+  }
+
+  async command void TimerAsync.setTimer2Asynchronous() {
+    ASSR |= 1 << AS2;
+  }
+
+  async command int TimerAsync.controlABusy() {
+    return (ASSR & (1 << TCR2AUB)) != 0;
+  }
+
+  async command int TimerAsync.controlBBusy() {
+    return (ASSR & (1 << TCR2BUB)) != 0;
+  }
+
+  async command int TimerAsync.compareABusy() {
+    return (ASSR & (1 << OCR2AUB)) != 0;
+  }
+
+  async command int TimerAsync.compareBBusy() {
+    return (ASSR & (1 << OCR2BUB)) != 0;
+  }
+
+  async command int TimerAsync.countBusy() {
+    return (ASSR & (1 << TCN2UB)) != 0;
+  }
+
+}
diff --git a/tos/chips/atm1281/timer/HplAtm1281Timer3P.nc b/tos/chips/atm1281/timer/HplAtm1281Timer3P.nc
new file mode 100644
index 00000000..9540e949
--- /dev/null
+++ b/tos/chips/atm1281/timer/HplAtm1281Timer3P.nc
@@ -0,0 +1,245 @@
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Internal component of the HPL interface to Atmega1281 timer 3.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm1281Timer3P @safe()
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as CompareA;
+    interface HplAtm128Compare<uint16_t> as CompareB;
+    interface HplAtm128Compare<uint16_t> as CompareC;
+  }
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint16_t Timer.get() { return TCNT3; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint16_t t) { TCNT3 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR3B & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  {
+    Atm128_TCCRB_t x = (Atm128_TCCRB_t) call TimerCtrl.getControlB();
+    x.bits.cs = s;
+    call TimerCtrl.setControlB(x.flat);
+  }
+
+  //=== Read the control registers. =====================================
+  async command uint8_t TimerCtrl.getControlA() {
+    return TCCR3A;
+  }
+
+  async command uint8_t TimerCtrl.getControlB() {
+    return TCCR3B;
+  }
+
+  async command uint8_t TimerCtrl.getControlC() {
+    return TCCR3C;
+  }
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setControlA( uint8_t x ) {
+    TCCR3A = x;
+  }
+
+  async command void TimerCtrl.setControlB( uint8_t x ) {
+    TCCR3B = x;
+  }
+
+  async command void TimerCtrl.setControlC( uint8_t x ) {
+    TCCR3C = x;
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command uint8_t TimerCtrl.getInterruptMask() {
+    return TIMSK3;
+  }
+
+  //=== Write the interrupt mask. ====================================
+  async command void TimerCtrl.setInterruptMask( uint8_t x ) {
+    TIMSK3 = x;
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command uint8_t TimerCtrl.getInterruptFlag() {
+    return TIFR3;
+  }
+
+  //=== Write the interrupt flags. ====================================
+  async command void TimerCtrl.setInterruptFlag( uint8_t x ) {
+    TIFR3 = x;
+  }
+
+  //=== Capture 16-bit implementation. ===================================
+  async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR3B, ICES3, up); }
+
+  //=== Timer 16-bit implementation. ===================================
+  async command void Timer.reset()    { TIFR3 = 1 << TOV3; }
+  async command void Capture.reset()  { TIFR3 = 1 << ICF3; }
+  async command void CompareA.reset() { TIFR3 = 1 << OCF3A; }
+  async command void CompareB.reset() { TIFR3 = 1 << OCF3B; }
+  async command void CompareC.reset() { TIFR3 = 1 << OCF3C; }
+
+  async command void Timer.start()    { SET_BIT(TIMSK3,TOIE3); }
+  async command void Capture.start()  { SET_BIT(TIMSK3,ICIE3); }
+  async command void CompareA.start() { SET_BIT(TIMSK3,OCIE3A); }
+  async command void CompareB.start() { SET_BIT(TIMSK3,OCIE3B); }
+  async command void CompareC.start() { SET_BIT(TIMSK3,OCIE3C); }
+
+  async command void Timer.stop()    { CLR_BIT(TIMSK3,TOIE3); }
+  async command void Capture.stop()  { CLR_BIT(TIMSK3,ICIE3); }
+  async command void CompareA.stop() { CLR_BIT(TIMSK3,OCIE3A); }
+  async command void CompareB.stop() { CLR_BIT(TIMSK3,OCIE3B); }
+  async command void CompareC.stop() { CLR_BIT(TIMSK3,OCIE3C); }
+
+  async command bool Timer.test() {
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.tov;
+  }
+  async command bool Capture.test()  {
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.icf;
+  }
+  async command bool CompareA.test() {
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfa;
+  }
+  async command bool CompareB.test() {
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfb;
+  }
+  async command bool CompareC.test() {
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfc;
+  }
+
+  async command bool Timer.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.toie;
+  }
+  async command bool Capture.isOn()  {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.icie;
+  }
+  async command bool CompareA.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociea;
+  }
+  async command bool CompareB.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ocieb;
+  }
+  async command bool CompareC.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociec;
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint16_t CompareA.get() { return OCR3A; }
+  async command uint16_t CompareB.get() { return OCR3B; }
+  async command uint16_t CompareC.get() { return OCR3C; }
+
+  //=== Write the compare registers. ====================================
+  async command void CompareA.set(uint16_t t) { OCR3A = t; }
+  async command void CompareB.set(uint16_t t) { OCR3B = t; }
+  async command void CompareC.set(uint16_t t) { OCR3C = t; }
+
+  //=== Read the capture registers. =====================================
+  async command uint16_t Capture.get() { return ICR3; }
+
+  //=== Write the capture registers. ====================================
+  async command void Capture.set(uint16_t t)  { ICR3 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void CompareA.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3A) {
+    signal CompareA.fired();
+  }
+  default async event void CompareB.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3B) {
+    signal CompareB.fired();
+  }
+  default async event void CompareC.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3C) {
+    signal CompareC.fired();
+  }
+  default async event void Capture.captured(uint16_t time) { }
+  AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE3) {
+    signal Capture.captured(call Capture.get());
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW3) {
+    signal Timer.overflow();
+  }
+}
diff --git a/tos/chips/atm1281/timer/HplAtm128Timer1C.nc b/tos/chips/atm1281/timer/HplAtm128Timer1C.nc
new file mode 100644
index 00000000..99885e1c
--- /dev/null
+++ b/tos/chips/atm1281/timer/HplAtm128Timer1C.nc
@@ -0,0 +1,96 @@
+/// $Id: HplAtm128Timer1C.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * HPL interface to Atmega1281 timer 1.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+configuration HplAtm128Timer1C
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as Compare[uint8_t id];
+  }
+}
+implementation
+{
+  components HplAtm1281Timer1P;
+
+  Timer = HplAtm1281Timer1P;
+  TimerCtrl = HplAtm1281Timer1P;
+  Capture = HplAtm1281Timer1P;
+
+  Compare[0] = HplAtm1281Timer1P.CompareA; 
+  Compare[1] = HplAtm1281Timer1P.CompareB;
+  Compare[2] = HplAtm1281Timer1P.CompareC;
+}
diff --git a/tos/chips/atm1281/timer/HplAtm128Timer3C.nc b/tos/chips/atm1281/timer/HplAtm128Timer3C.nc
new file mode 100644
index 00000000..0241b8e6
--- /dev/null
+++ b/tos/chips/atm1281/timer/HplAtm128Timer3C.nc
@@ -0,0 +1,96 @@
+/// $Id: HplAtm128Timer3C.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * HPL interface to Atmega1281 timer 3.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+configuration HplAtm128Timer3C
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as Compare[uint8_t id];
+  }
+}
+implementation
+{
+  components HplAtm1281Timer3P;
+
+  Timer = HplAtm1281Timer3P;
+  TimerCtrl = HplAtm1281Timer3P;
+  Capture = HplAtm1281Timer3P;
+
+  Compare[0] = HplAtm1281Timer3P.CompareA; 
+  Compare[1] = HplAtm1281Timer3P.CompareB;
+  Compare[2] = HplAtm1281Timer3P.CompareC;
+}
diff --git a/tos/chips/atm1281/timer/HplAtm128TimerAsync.nc b/tos/chips/atm1281/timer/HplAtm128TimerAsync.nc
new file mode 100644
index 00000000..8b37aeea
--- /dev/null
+++ b/tos/chips/atm1281/timer/HplAtm128TimerAsync.nc
@@ -0,0 +1,100 @@
+// $Id: HplAtm128TimerAsync.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $
+/*
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * HPL Interface to Atmega1281 8-bit asynchronous timer control registers
+ *
+ * @author David Gay
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+interface HplAtm128TimerAsync
+{
+  /**
+   * Read timer2 asynchronous status register (ASSR)
+   * @return Current value of ASSR
+   */
+  async command Atm128_ASSR_t getAssr();
+
+  /**
+   * Set timer2 asynchronous status register (ASSR)
+   * @param x New value for ASSR
+   */
+  async command void setAssr(Atm128_ASSR_t x);
+
+  /**
+   * Turn on timer 2 asynchronous mode
+   */
+  async command void setTimer2Asynchronous();
+
+  /**
+   * Check if control register TCCR2A is busy (should not be updated if true)
+   * @return TRUE if TCCR2A is busy, FALSE otherwise (can be updated)
+   */
+  async command int controlABusy();
+
+  /**
+   * Check if control register TCCR2B is busy (should not be updated if true)
+   * @return TRUE if TCCR2B is busy, FALSE otherwise (can be updated)
+   */
+  async command int controlBBusy();
+
+  /**
+   * Check if compare register OCR2A is busy (should not be updated if true)
+   * @return TRUE if OCR2A is busy, FALSE otherwise (can be updated)
+   */
+  async command int compareABusy();
+
+  /**
+   * Check if compare register OCR2B is busy (should not be updated if true)
+   * @return TRUE if OCR2B is busy, FALSE otherwise (can be updated)
+   */
+  async command int compareBBusy();
+
+  /**
+   * Check if current timer value (TCNT2) is busy (should not be updated if true)
+   * @return TRUE if TCNT2 is busy, FALSE otherwise (can be updated)
+   */
+  async command int countBusy();
+
+}
diff --git a/tos/chips/atm1281/timer/HplAtm128TimerCtrl16.nc b/tos/chips/atm1281/timer/HplAtm128TimerCtrl16.nc
new file mode 100644
index 00000000..cf5b0319
--- /dev/null
+++ b/tos/chips/atm1281/timer/HplAtm128TimerCtrl16.nc
@@ -0,0 +1,94 @@
+/// $Id: HplAtm128TimerCtrl16.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * HPL Interface to Atmega1281 16-bit timer control registers
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <Atm128Timer.h>
+
+interface HplAtm128TimerCtrl16
+{
+  /// Timer control register: Direct access
+  async command uint8_t getControlA();
+  async command uint8_t getControlB();
+  async command uint8_t getControlC();
+  async command void setControlA( uint8_t control );
+  async command void setControlB( uint8_t control );
+  async command void setControlC( uint8_t control );
+    
+  /// Interrupt mask register: Direct access
+  async command uint8_t getInterruptMask();
+  async command void setInterruptMask( uint8_t mask);
+
+  /// Interrupt flag register: Direct access
+  async command uint8_t getInterruptFlag();
+  async command void setInterruptFlag( uint8_t flags );
+}
+
diff --git a/tos/chips/atm1281/timer/HplAtm128TimerCtrl8.nc b/tos/chips/atm1281/timer/HplAtm128TimerCtrl8.nc
new file mode 100644
index 00000000..f9591afc
--- /dev/null
+++ b/tos/chips/atm1281/timer/HplAtm128TimerCtrl8.nc
@@ -0,0 +1,91 @@
+/// $Id: HplAtm128TimerCtrl8.nc,v 1.2 2010-06-29 22:07:43 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * HPL Interface to Atmega1281 8-bit timer control registers
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <Atm128Timer.h>
+
+interface HplAtm128TimerCtrl8
+{
+  /// Timer control register: Direct access
+  async command uint8_t getControlA();
+  async command uint8_t getControlB();
+  async command void setControlA( uint8_t control );
+  async command void setControlB( uint8_t control );
+
+  /// Interrupt mask register: Direct access
+  async command uint8_t getInterruptMask();
+  async command void setInterruptMask( uint8_t mask);
+
+  /// Interrupt flag register: Direct access
+  async command uint8_t getInterruptFlag();
+  async command void setInterruptFlag( uint8_t flags );
+}
diff --git a/tos/chips/cc1000/ByteRadio.nc b/tos/chips/cc1000/ByteRadio.nc
new file mode 100644
index 00000000..5f082112
--- /dev/null
+++ b/tos/chips/cc1000/ByteRadio.nc
@@ -0,0 +1,96 @@
+/* $Id: ByteRadio.nc,v 1.5 2008-06-03 04:08:34 regehr Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Radio logic is split between Csma (media-access control, low-power
+ * listening and general control) and SendReceive (packet reception and
+ * transmission). This interface specifies the interaction between these
+ * two components.
+ *
+ * @author David Gay
+ */
+  
+interface ByteRadio
+{
+  /**
+   * SendReceive wants to send a packet.
+   * @param msg Message to be sent.
+   */
+  event void rts(message_t * ONE msg);
+
+  /**
+   * Access to the media granted. Start sending. SendReceive must signal
+   * sendDone when transmission is complete. Note: the media-access-contro
+   * layer must have enabled listening before calling cts().
+   */
+  async command void cts();
+
+  /**
+   * Between the rts() and sendDone() events, this must return the
+   * message under transmission.
+   * @return Message being transmitted.
+   */
+  async command message_t *getTxMessage();
+
+  /**
+   * Transmission complete.
+   */
+  async event void sendDone();
+
+  /**
+   * Set message preamble length.
+   * @param bytes Preamble length in bytes
+   */
+  async command void setPreambleLength(uint16_t bytes);
+
+  /**
+   * Get message preamble length.
+   * @return Preamble length in bytes
+   */
+  async command uint16_t getPreambleLength();
+
+  /**
+   * Enable listening for incoming packets.
+   */
+  async command void listen();
+
+  /**
+   * Disable listening for incoming packets.
+   */
+  async command void off();
+
+  /**
+   * SendReceive signals this event for every radio-byte-time while
+   * listening is enabled and a message isn't being received or
+   * transmitted.
+   * @param preamble TRUE if a message preamble byte has been received
+   */
+  async event void idleByte(bool preamble);
+
+  /**
+   * Detect if SendReceive is attempting to sync with an incoming packet.
+   * During sync, idleByte events are not signaled. If sync is successful,
+   * an rx() event will be signaled, if it fails, idleByte events will
+   * resume. If syncing() returns TRUE, the last idleByte() event must
+   * have had preamble = TRUE.
+   *
+   * @return TRUE if a sync attempt is in progress, FALSE if not.
+   */
+  async command bool syncing();
+
+  /**
+   * A message is being received
+   */
+  async event void rx();
+
+  /**
+   * Message reception is complete.
+   */
+  async event void rxDone();
+}
diff --git a/tos/chips/cc1000/CC1000ActiveMessageC.nc b/tos/chips/cc1000/CC1000ActiveMessageC.nc
new file mode 100644
index 00000000..3209bcc7
--- /dev/null
+++ b/tos/chips/cc1000/CC1000ActiveMessageC.nc
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *
+ * The Active Message layer for the CC1000 radio. This configuration
+ * just layers the AM dispatch (CC1000ActiveMessageM) on top of the
+ * underlying CC1000 radio packet (CC1000CsmaRadioC), which is
+ * inherently an AM packet (acknowledgements based on AM destination
+ * addr and group).
+ * 
+ * @author Philip Levis
+ * @author Marco Langerwisch (Packet timestamping)
+ */
+
+configuration CC1000ActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+    interface PacketTimeSyncOffset;
+    interface LowPowerListening;
+  }
+}
+implementation {
+
+  components CC1000ActiveMessageP as AM, CC1000CsmaRadioC as Radio;
+  components ActiveMessageAddressC as Address;
+  
+  SplitControl = Radio;
+  Packet       = Radio;
+  PacketAcknowledgements = Radio;
+  LinkPacketMetadata = Radio;
+  
+  AMSend   = AM;
+  Receive  = AM.Receive;
+  Snoop    = AM.Snoop;
+  AMPacket = AM;
+
+  AM.SubSend    -> Radio.Send;
+  AM.SubReceive -> Radio.Receive;
+  AM.amAddress -> Address;
+  AM.Packet     -> Radio;
+  
+  PacketTimeStamp32khz = Radio;
+  PacketTimeStampMilli = Radio;
+  PacketTimeSyncOffset = Radio;
+  LowPowerListening    = Radio;
+}
diff --git a/tos/chips/cc1000/CC1000ActiveMessageP.nc b/tos/chips/cc1000/CC1000ActiveMessageP.nc
new file mode 100644
index 00000000..92ed3a84
--- /dev/null
+++ b/tos/chips/cc1000/CC1000ActiveMessageP.nc
@@ -0,0 +1,182 @@
+// $Id: CC1000ActiveMessageP.nc,v 1.13 2010-06-29 22:07:44 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Implementation component for CC1000ActiveMessageC.
+ *
+ * @author Philip Levis
+ * @date June 19 2006
+ */
+
+module CC1000ActiveMessageP @safe() {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+  }
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    interface Packet as Packet;
+    command am_addr_t amAddress();
+  }
+}
+implementation {
+
+  cc1000_header_t* ONE getHeader(message_t* ONE amsg) {
+    return TCAST(cc1000_header_t* ONE, (uint8_t*)amsg + offsetof(message_t, data) - sizeof(cc1000_header_t));
+  }
+
+  cc1000_footer_t *getFooter(message_t *amsg) {
+    return (cc1000_footer_t *)(amsg->footer);
+  }
+  
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+					  message_t* amsg,
+					  uint8_t len) {
+    cc1000_header_t* header = getHeader(amsg);
+    header->type = id;
+    header->dest = addr;
+    header->source = call AMPacket.address();
+    header->group = TOS_AM_GROUP;
+    return call SubSend.send(amsg, len);
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  /* Receiving a packet */
+
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    cc1000_footer_t* msg_footer = getFooter(msg);
+    if(msg_footer->crc == 1) {
+      if (call AMPacket.isForMe(msg)) {
+        return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len);
+      }
+      else {
+        return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len);
+      }
+    }
+    return msg;
+  }
+  
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    cc1000_header_t* header = getHeader(amsg);
+    return header->dest;
+  }
+
+  command am_addr_t AMPacket.source(message_t* amsg) {
+    cc1000_header_t* header = getHeader(amsg);
+    return header->source;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    cc1000_header_t* header = getHeader(amsg);
+    header->dest = addr;
+  }
+
+  command void AMPacket.setSource(message_t* amsg, am_addr_t addr) {
+    cc1000_header_t* header = getHeader(amsg);
+    header->source = addr;
+  }
+  
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+	    call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    cc1000_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t type) {
+    cc1000_header_t* header = getHeader(amsg);
+    header->type = type;
+  }
+  
+  command void AMPacket.setGroup(message_t* msg, am_group_t group) {
+    cc1000_header_t* header = getHeader(msg);
+    header->group = group;
+  }
+
+  command am_group_t AMPacket.group(message_t* msg) {
+    cc1000_header_t* header = getHeader(msg);
+    return header->group;
+  }
+
+  command am_group_t AMPacket.localGroup() {
+    return TOS_AM_GROUP;
+  }
+  
+ default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+   return;
+ }
+
+  
+
+}
diff --git a/tos/chips/cc1000/CC1000Const.h b/tos/chips/cc1000/CC1000Const.h
new file mode 100644
index 00000000..65668d73
--- /dev/null
+++ b/tos/chips/cc1000/CC1000Const.h
@@ -0,0 +1,468 @@
+// $Id: CC1000Const.h,v 1.5 2008-06-11 00:46:23 razvanm Exp $
+
+/* -*- Mode: C; c-basic-indent: 2; indent-tabs-mode: nil -*- */ 
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+/*
+ * Constants for CC1000 radio
+ *
+ * @author Phil Buonadonna
+ */
+
+#ifndef CC1000CONST_H
+#define CC1000CONST_H
+
+/* Constants defined for CC1K */
+/* Register addresses */
+
+enum {
+  CC1K_MAIN =           0x00,
+  CC1K_FREQ_2A =        0x01,
+  CC1K_FREQ_1A =        0x02,
+  CC1K_FREQ_0A =        0x03,
+  CC1K_FREQ_2B =        0x04,
+  CC1K_FREQ_1B =        0x05,
+  CC1K_FREQ_0B =        0x06,
+  CC1K_FSEP1 =          0x07,
+  CC1K_FSEP0 =          0x08,
+  CC1K_CURRENT =        0x09,
+  CC1K_FRONT_END =      0x0A, //10
+  CC1K_PA_POW =         0x0B, //11
+  CC1K_PLL =            0x0C, //12
+  CC1K_LOCK =           0x0D, //13
+  CC1K_CAL =            0x0E, //14
+  CC1K_MODEM2 =         0x0F, //15
+  CC1K_MODEM1 =         0x10, //16
+  CC1K_MODEM0 =         0x11, //17
+  CC1K_MATCH =          0x12, //18
+  CC1K_FSCTRL =         0x13, //19
+  CC1K_FSHAPE7 =        0x14, //20
+  CC1K_FSHAPE6 =        0x15, //21
+  CC1K_FSHAPE5 =        0x16, //22
+  CC1K_FSHAPE4 =        0x17, //23
+  CC1K_FSHAPE3 =        0x18, //24
+  CC1K_FSHAPE2 =        0x19, //25
+  CC1K_FSHAPE1 =        0x1A, //26
+  CC1K_FSDELAY =        0x1B, //27
+  CC1K_PRESCALER =      0x1C, //28
+  CC1K_TEST6 =          0x40, //64
+  CC1K_TEST5 =          0x41, //66
+  CC1K_TEST4 =          0x42, //67
+  CC1K_TEST3 =          0x43, //68
+  CC1K_TEST2 =          0x44, //69
+  CC1K_TEST1 =          0x45, //70
+  CC1K_TEST0 =          0x46, //71
+
+  // MAIN Register Bit Posititions
+  CC1K_RXTX =		7,
+  CC1K_F_REG =		6,
+  CC1K_RX_PD =		5,
+  CC1K_TX_PD =		4,
+  CC1K_FS_PD =		3,
+  CC1K_CORE_PD =	2,
+  CC1K_BIAS_PD =	1,
+  CC1K_RESET_N =	0,
+
+  // CURRENT Register Bit Positions
+  CC1K_VCO_CURRENT =	4,
+  CC1K_LO_DRIVE =	2,
+  CC1K_PA_DRIVE =	0,
+
+  // FRONT_END Register Bit Positions
+  CC1K_BUF_CURRENT =	5,
+  CC1K_LNA_CURRENT =	3,
+  CC1K_IF_RSSI =	1,
+  CC1K_XOSC_BYPASS =	0,
+
+  // PA_POW Register Bit Positions
+  CC1K_PA_HIGHPOWER =	4,
+  CC1K_PA_LOWPOWER =	0,
+
+  // PLL Register Bit Positions
+  CC1K_EXT_FILTER =	7,
+  CC1K_REFDIV =		3,
+  CC1K_ALARM_DISABLE =	2,
+  CC1K_ALARM_H =	1,
+  CC1K_ALARM_L =	0,
+
+  // LOCK Register Bit Positions
+  CC1K_LOCK_SELECT =		4,
+  CC1K_PLL_LOCK_ACCURACY =	3,
+  CC1K_PLL_LOCK_LENGTH =	2,
+  CC1K_LOCK_INSTANT =		1,
+  CC1K_LOCK_CONTINUOUS =	0,
+
+  // CAL Register Bit Positions
+  CC1K_CAL_START =	7,
+  CC1K_CAL_DUAL =	6,
+  CC1K_CAL_WAIT =	5,
+  CC1K_CAL_CURRENT =	4,
+  CC1K_CAL_COMPLETE =	3,
+  CC1K_CAL_ITERATE =	0,
+
+  // MODEM2 Register Bit Positions
+  CC1K_PEAKDETECT =		7,
+  CC1K_PEAK_LEVEL_OFFSET =	0,
+
+  // MODEM1 Register Bit Positions
+  CC1K_MLIMIT =		5,
+  CC1K_LOCK_AVG_IN =	4,
+  CC1K_LOCK_AVG_MODE =	3,
+  CC1K_SETTLING =	1,
+  CC1K_MODEM_RESET_N =	0,
+
+  // MODEM0 Register Bit Positions
+  CC1K_BAUDRATE =	4,
+  CC1K_DATA_FORMAT =	2,
+  CC1K_XOSC_FREQ =	0,
+
+  // MATCH Register Bit Positions
+  CC1K_RX_MATCH =	4,
+  CC1K_TX_MATCH =	0,
+
+  // FSCTLR Register Bit Positions
+  CC1K_DITHER1 =	3,
+  CC1K_DITHER0 =	2,
+  CC1K_SHAPE =		1,
+  CC1K_FS_RESET_N =	0,
+
+  // PRESCALER Register Bit Positions
+  CC1K_PRE_SWING =	6,
+  CC1K_PRE_CURRENT =	4,
+  CC1K_IF_INPUT =	3,
+  CC1K_IF_FRONT =	2,
+
+  // TEST6 Register Bit Positions
+  CC1K_LOOPFILTER_TP1 =	7,
+  CC1K_LOOPFILTER_TP2 =	6,
+  CC1K_CHP_OVERRIDE =	5,
+  CC1K_CHP_CO =		0,
+
+  // TEST5 Register Bit Positions
+  CC1K_CHP_DISABLE =	5,
+  CC1K_VCO_OVERRIDE =	4,
+  CC1K_VCO_AO =		0,
+
+  // TEST3 Register Bit Positions
+  CC1K_BREAK_LOOP =	4,
+  CC1K_CAL_DAC_OPEN =	0,
+
+
+  /* 
+   * CC1K Register Parameters Table
+   *
+   * This table follows the same format order as the CC1K register 
+   * set EXCEPT for the last entry in the table which is the 
+   * CURRENT register value for TX mode.
+   *  
+   * NOTE: To save RAM space, this table resides in program memory (flash). 
+   * This has two important implications:
+   *	1) You can't write to it (duh!)
+   *	2) You must read it using the PRG_RDB(addr) macro. IT CANNOT BE ACCESSED AS AN ORDINARY C ARRAY.  
+   * 
+   * Add/remove individual entries below to suit your RF tastes.
+   * 
+   */
+  CC1K_433_002_MHZ =	0x00,
+  CC1K_915_998_MHZ =	0x01,
+  CC1K_434_845_MHZ =    0x02,
+  CC1K_914_077_MHZ =    0x03,
+  CC1K_315_178_MHZ =    0x04,
+
+  //#define CC1K_SquelchInit        0x02F8 // 0.90V using the bandgap reference
+  CC1K_SquelchInit =        0x120,
+  CC1K_SquelchTableSize =   9,
+  CC1K_MaxRSSISamples =     5,
+  CC1K_Settling =           1,
+  CC1K_ValidPrecursor =     2,
+  CC1K_SquelchIntervalFast = 128,
+  CC1K_SquelchIntervalSlow = 2560,
+  CC1K_SquelchCount =       30,
+  CC1K_SquelchBuffer =      12,
+
+  CC1K_LPL_STATES =         9,
+
+  CC1K_LPL_PACKET_TIME =    16,
+
+  CC1K_LPL_CHECK_TIME =     16, /* In tenth's of milliseconds, this should
+				  be an approximation of the on-time for
+			          a LPL check rather than the total check
+			          time. */
+  CC1K_LPL_MIN_INTERVAL =    5, /* In milliseconds, the minimum interval
+				   between low-power-listening checks */
+  CC1K_LPL_MAX_INTERVAL =    10000  /* In milliseconds, the maximum interval
+				       between low-power-listening checks.
+				       Arbitrary value, but must be at
+				       most 32767 because of the way
+				       sleep interval is stored in outgoing
+				       messages */
+};
+
+#ifdef CC1K_DEFAULT_FREQ
+#define CC1K_DEF_PRESET (CC1K_DEFAULT_FREQ)
+#endif
+#ifdef CC1K_MANUAL_FREQ
+#define CC1K_DEF_FREQ (CC1K_MANUAL_FREQ)
+#endif
+
+#ifndef CC1K_DEF_PRESET
+#define CC1K_DEF_PRESET	(CC1K_434_845_MHZ)
+#endif 
+
+static const_uint8_t CC1K_Params[6][20] = {
+  // (0) 433.002 MHz channel, 19.2 Kbps data, Manchester Encoding, High Side LO
+  { // MAIN   0x00
+    0x31,
+    // FREQ2A,FREQ1A,FREQ0A  0x01-0x03
+    0x58,0x00,0x00,					
+    // FREQ2B,FREQ1B,FREQ0B  0x04-0x06
+    0x57,0xf6,0x85,    //XBOW
+    // FSEP1, FSEP0     0x07-0x08
+    0X03,0x55,
+    // CURRENT RX MODE VALUE   0x09 also see below
+    4 << CC1K_VCO_CURRENT | 1 << CC1K_LO_DRIVE,	
+    // FRONT_END  0x0a
+    1 << CC1K_IF_RSSI,
+    // PA_POW  0x0b
+    0x0 << CC1K_PA_HIGHPOWER | 0xf << CC1K_PA_LOWPOWER, 
+    // PLL  0x0c
+    12 << CC1K_REFDIV,		
+    // LOCK  0x0d
+    0xe << CC1K_LOCK_SELECT,
+    // CAL  0x0e
+    1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE,	
+    // MODEM2  0x0f
+    0 << CC1K_PEAKDETECT | 28 << CC1K_PEAK_LEVEL_OFFSET,
+    // MODEM1  0x10
+    3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, 
+    // MODEM0  0x11
+    5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ,
+    // MATCH  0x12
+    0x7 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH,
+    // tx current (extra)
+    8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE,
+  },
+
+  // 1 915.9988 MHz channel, 19.2 Kbps data, Manchester Encoding, High Side LO
+  { // MAIN   0x00 
+    0x31,
+    // FREQ2A,FREQ1A,FREQ0A  0x01-0x03
+    0x7c,0x00,0x00,					
+    // FREQ2B,FREQ1B,FREQ0B  0x04-0x06
+    0x7b,0xf9,0xae,					
+    // FSEP1, FSEP0     0x07-0x8
+    0x02,0x38,
+    // CURRENT RX MODE VALUE   0x09 also see below
+    8 << CC1K_VCO_CURRENT | 3 << CC1K_LO_DRIVE,
+    //0x8C,	
+    // FRONT_END  0x0a
+    1 << CC1K_BUF_CURRENT | 2 << CC1K_LNA_CURRENT | 1 << CC1K_IF_RSSI,
+    //0x32,
+    // PA_POW  0x0b
+    0x8 << CC1K_PA_HIGHPOWER | 0x0 << CC1K_PA_LOWPOWER, 
+    //0xff,
+    // PLL  0xc
+    8 << CC1K_REFDIV,		
+    //0x40,
+    // LOCK  0xd
+    0x1 << CC1K_LOCK_SELECT,
+    //0x10,
+    // CAL  0xe
+    1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE,	
+    //0x26,
+    // MODEM2  0xf
+    1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET,
+    //0xA1,
+    // MODEM1  0x10
+    3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, 
+    //0x6f, 
+    // MODEM0  0x11
+    5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ,
+    //0x55,
+    // MATCH 0x12
+    0x1 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH,
+    // tx current (extra)
+    15 << CC1K_VCO_CURRENT | 3 << CC1K_PA_DRIVE,
+  },
+
+  // 2 434.845200 MHz channel, 19.2 Kbps data, Manchester Encoding, High Side LO
+  { // MAIN   0x00
+    0x31,
+    // FREQ2A,FREQ1A,FREQ0A  0x01-0x03
+    0x51,0x00,0x00,					
+    // FREQ2B,FREQ1B,FREQ0B  0x04-0x06
+    0x50,0xf7,0x4F,    //XBOW
+    // FSEP1, FSEP0     0x07-0x08
+    0X03,0x0E,
+    // CURRENT RX MODE VALUE   0x09 also see below
+    4 << CC1K_VCO_CURRENT | 1 << CC1K_LO_DRIVE,	
+    // FRONT_END  0x0a
+    1 << CC1K_IF_RSSI,
+    // PA_POW  0x0b
+    0x0 << CC1K_PA_HIGHPOWER | 0xf << CC1K_PA_LOWPOWER, 
+    // PLL  0x0c
+    11 << CC1K_REFDIV,		
+    // LOCK  0x0d
+    0xe << CC1K_LOCK_SELECT,
+    // CAL  0x0e
+    1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE,	
+    // MODEM2  0x0f
+    1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET,
+    // MODEM1  0x10
+    3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, 
+    // MODEM0  0x11
+    5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ,
+    // MATCH  0x12
+    0x7 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH,
+    // tx current (extra)
+    8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE,
+  },
+
+ 
+  // 3 914.077 MHz channel, 19.2 Kbps data, Manchester Encoding, High Side LO
+  { // MAIN   0x00 
+    0x31,
+    // FREQ2A,FREQ1A,FREQ0A  0x01-0x03
+    0x5c,0xe0,0x00,					
+    // FREQ2B,FREQ1B,FREQ0B  0x04-0x06
+    0x5c,0xdb,0x42,					
+    // FSEP1, FSEP0     0x07-0x8
+    0x01,0xAA,
+    // CURRENT RX MODE VALUE   0x09 also see below
+    8 << CC1K_VCO_CURRENT | 3 << CC1K_LO_DRIVE,
+    //0x8C,	
+    // FRONT_END  0x0a
+    1 << CC1K_BUF_CURRENT | 2 << CC1K_LNA_CURRENT | 1 << CC1K_IF_RSSI,
+    //0x32,
+    // PA_POW  0x0b
+    0x8 << CC1K_PA_HIGHPOWER | 0x0 << CC1K_PA_LOWPOWER, 
+    //0xff,
+    // PLL  0xc
+    6 << CC1K_REFDIV,		
+    //0x40,
+    // LOCK  0xd
+    0x1 << CC1K_LOCK_SELECT,
+    //0x10,
+    // CAL  0xe
+    1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE,	
+    //0x26,
+    // MODEM2  0xf
+    1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET,
+    //0xA1,
+    // MODEM1  0x10
+    3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, 
+    //0x6f, 
+    // MODEM0  0x11
+    5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ,
+    //0x55,
+    // MATCH 0x12
+    0x1 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH,
+    // tx current (extra)
+    15 << CC1K_VCO_CURRENT | 3 << CC1K_PA_DRIVE,
+  },
+
+  // 4 315.178985 MHz channel, 38.4 Kbps data, Manchester Encoding, High Side LO
+  { // MAIN   0x00
+    0x31,
+    // FREQ2A,FREQ1A,FREQ0A  0x01-0x03
+    0x45,0x60,0x00,					
+    // FREQ2B,FREQ1B,FREQ0B  0x04-0x06
+    0x45,0x55,0xBB,
+    // FSEP1, FSEP0     0x07-0x08
+    0X03,0x9C,
+    // CURRENT RX MODE VALUE   0x09 also see below
+    8 << CC1K_VCO_CURRENT | 0 << CC1K_LO_DRIVE,	
+    // FRONT_END  0x0a
+    1 << CC1K_IF_RSSI,
+    // PA_POW  0x0b
+    0x0 << CC1K_PA_HIGHPOWER | 0xf << CC1K_PA_LOWPOWER, 
+    // PLL  0x0c
+    13 << CC1K_REFDIV,		
+    // LOCK  0x0d
+    0xe << CC1K_LOCK_SELECT,
+    // CAL  0x0e
+    1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE,	
+    // MODEM2  0x0f
+    1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET,
+    // MODEM1  0x10
+    3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N, 
+    // MODEM0  0x11
+    5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 0 << CC1K_XOSC_FREQ,
+    // MATCH  0x12
+    0x7 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH,
+    // tx current (extra)
+    8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE,
+  },
+
+  // 5 Spare
+  { // MAIN   0x00
+    0x31,
+    // FREQ2A,FREQ1A,FREQ0A  0x01-0x03
+    0x58,0x00,0x00,					
+    // FREQ2B,FREQ1B,FREQ0B  0x04-0x06
+    0x57,0xf6,0x85,    //XBOW
+    // FSEP1, FSEP0     0x07-0x08
+    0X03,0x55,
+    // CURRENT RX MODE VALUE   0x09 also see below
+    8 << CC1K_VCO_CURRENT | 4 << CC1K_LO_DRIVE,	
+    // FRONT_END  0x0a
+    1 << CC1K_IF_RSSI,
+    // PA_POW  0x0b
+    0x0 << CC1K_PA_HIGHPOWER | 0xf << CC1K_PA_LOWPOWER, 
+    // PLL  0x0c
+    12 << CC1K_REFDIV,		
+    // LOCK  0x0d
+    0xe << CC1K_LOCK_SELECT,
+    // CAL  0x0e
+    1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE,	
+    // MODEM2  0x0f
+    1 << CC1K_PEAKDETECT | 33 << CC1K_PEAK_LEVEL_OFFSET,
+    // MODEM1  0x10
+    3 << CC1K_MLIMIT | 1 << CC1K_LOCK_AVG_MODE | CC1K_Settling << CC1K_SETTLING | 1 << CC1K_MODEM_RESET_N,    // MODEM0  0x11
+    5 << CC1K_BAUDRATE | 1 << CC1K_DATA_FORMAT | 1 << CC1K_XOSC_FREQ,
+    // MATCH  0x12
+    0x7 << CC1K_RX_MATCH | 0x0 << CC1K_TX_MATCH,
+    // tx current (extra)
+    8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE,
+  },
+};
+
+#define UQ_CC1000_RSSI "CC1000RssiP.Rssi"
+
+#endif /* CC1000CONST_H */
diff --git a/tos/chips/cc1000/CC1000Control.nc b/tos/chips/cc1000/CC1000Control.nc
new file mode 100644
index 00000000..f53ea84d
--- /dev/null
+++ b/tos/chips/cc1000/CC1000Control.nc
@@ -0,0 +1,148 @@
+/* $Id: CC1000Control.nc,v 1.5 2010-06-29 22:07:44 scipio Exp $
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * CC1000 internal radio control interface.
+ * @author Philip Buonadonna
+ * @aythor Jaein Jeong
+ */
+interface CC1000Control
+{
+  /**
+   * Initialise the radio to its default state.
+   */
+  command void init();
+
+  /**
+   * Tune the radio to one of the frequencies available in the CC1K_Params
+   * table.  Calling Tune will allso reset the rfpower and LockVal
+   * selections to the table values.
+   * 
+   * @param freq The index into the CC1K_Params table that holds the
+   * desired preset frequency parameters.
+   */
+  command void tunePreset(uint8_t freq); 
+
+  /**
+   * Tune the radio to a given frequency. Since the CC1000 uses a digital
+   * frequency synthesizer, it cannot tune to just an arbitrary frequency.
+   * This routine will determine the closest achievable channel, compute
+   * the necessary parameters and tune the radio.
+   * 
+   * @param The desired channel frequency, in Hz.
+   * 
+   * @return The actual computed channel frequency, in Hz.  A return value
+   * of '0' indicates that no frequency was computed and the radio was not
+   * tuned.
+   */
+  command uint32_t tuneManual(uint32_t DesiredFreq);
+
+  /**
+   * Turn the CC1000 off
+   */
+  async command void off();
+
+  /**
+   * Shift the CC1000 Radio into transmit mode.
+   */
+  async command void txMode();
+
+  /**
+   * Shift the CC1000 Radio in receive mode.
+   */
+  async command void rxMode();
+
+  /**
+   * Turn off the bias power on the CC1000 radio, but leave the core and
+   * crystal oscillator powered.  This will result in approximately a 750
+   * uA power savings.
+   */
+  async command void coreOn();			
+
+  /**
+   * Turn the bias power on. This function must be followed by a call to
+   * either rxMode() or txMode() to place the radio in a recieve/transmit
+   * state respectively. There is approximately a 200us delay when
+   * restoring bias power.
+   */
+  async command void biasOn();
+
+  /**
+   * Set the transmit RF power value.  The input value is simply an
+   * arbitrary index that is programmed into the CC1000 registers.  Consult
+   * the CC1000 datasheet for the resulting power output/current
+   * consumption values.
+   *
+   * @param power A power index between 1 and 255.
+   */
+  command void setRFPower(uint8_t power);	
+
+  /**
+   * Get the present RF power index.
+   *
+   * @return The power index value.
+   */
+  command uint8_t getRFPower();		
+
+  /** 
+   * Select the signal to monitor at the CHP_OUT pin of the CC1000.  See
+   * the CC1000 data sheet for the available signals.
+   * 
+   * @param LockVal The index of the signal to monitor at the CHP_OUT pin
+   */
+  command void selectLock(uint8_t LockVal); 
+
+  /**
+   * Get the binary value from the CHP_OUT pin.  Analog signals cannot be
+   * read using function.
+   *
+   * @return 1 - Pin is high or 0 - Pin is low
+   */
+  command uint8_t getLock();
+
+  /**
+   * Returns whether the present frequency set is using high-side LO
+   * injection or not.  This information is used to determine if the data
+   * from the CC1000 needs to be inverted or not.
+   *
+   * @return TRUE if high-side LO injection is being used (i.e. data does NOT need to be inverted
+   * at the receiver.
+   */
+  command bool getLOStatus();
+}
diff --git a/tos/chips/cc1000/CC1000ControlP.nc b/tos/chips/cc1000/CC1000ControlP.nc
new file mode 100644
index 00000000..4f987c27
--- /dev/null
+++ b/tos/chips/cc1000/CC1000ControlP.nc
@@ -0,0 +1,398 @@
+/* $Id: CC1000ControlP.nc,v 1.6 2010-06-29 22:07:44 scipio Exp $
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#include "CC1000Const.h"
+#include "Timer.h"
+
+/**
+ * This module provides the CONTROL functionality for the Chipcon1000
+ * series radio.  It exports a custom interface to control CC1000
+ * operation.
+ *
+ * @author Philip Buonadonna
+ * @author Jaein Jeong
+ * @author David Gay
+ */
+module CC1000ControlP @safe() {
+  provides {
+    interface CC1000Control;
+  }
+  uses {
+    interface HplCC1000 as CC;
+    interface BusyWait<TMicro, uint16_t>;
+  }
+}
+implementation
+{
+  uint8_t txCurrent, rxCurrent, power;
+
+  enum {
+    IF = 150000,
+    FREQ_MIN = 4194304,
+    FREQ_MAX = 16751615
+  };
+
+  const_uint32_t fRefTbl[9] = {2457600,
+			       2106514,
+			       1843200,
+			       1638400,
+			       1474560,
+			       1340509,
+			       1228800,
+			       1134277,
+			       1053257};
+  
+  const_uint16_t corTbl[9] = {1213,
+			      1416,
+			      1618,
+			      1820,
+			      2022,
+			      2224,
+			      2427,
+			      2629,
+			      2831};
+  
+  const_uint16_t fSepTbl[9] = {0x1AA,
+			       0x1F1,
+			       0x238,
+			       0x280,
+			       0x2C7,
+			       0x30E,
+			       0x355,
+			       0x39C,
+			       0x3E3};
+  
+  void calibrateNow() {
+    // start cal
+    call CC.write(CC1K_CAL,
+		  1 << CC1K_CAL_START |
+		  1 << CC1K_CAL_WAIT |
+		  6 << CC1K_CAL_ITERATE);
+    while ((call CC.read(CC1K_CAL) & 1 << CC1K_CAL_COMPLETE) == 0)
+      ;
+
+    //exit cal mode
+    call CC.write(CC1K_CAL, 1 << CC1K_CAL_WAIT | 6 << CC1K_CAL_ITERATE);
+  }
+
+  void calibrate() {
+    call CC.write(CC1K_PA_POW, 0x00);  // turn off rf amp
+    call CC.write(CC1K_TEST4, 0x3f);   // chip rate >= 38.4kb
+
+    // RX - configure main freq A
+    call CC.write(CC1K_MAIN, 1 << CC1K_TX_PD | 1 << CC1K_RESET_N);
+
+    calibrateNow();
+
+    // TX - configure main freq B
+    call CC.write(CC1K_MAIN,
+		  1 << CC1K_RXTX |
+		  1 << CC1K_F_REG |
+		  1 << CC1K_RX_PD | 
+		  1 << CC1K_RESET_N);
+    // Set TX current
+    call CC.write(CC1K_CURRENT, txCurrent);
+    call CC.write(CC1K_PA_POW, 0);
+
+    calibrateNow();
+    
+    call CC1000Control.rxMode();
+  }
+
+  /*
+   * cc1000ComputeFreq(uint32_t desiredFreq);
+   *
+   * Compute an achievable frequency and the necessary CC1K parameters from
+   * a given desired frequency (Hz). The function returns the actual achieved
+   * channel frequency in Hz.
+   *
+   * This routine assumes the following:
+   *  - Crystal Freq: 14.7456 MHz
+   *  - LO Injection: High
+   *  - Separation: 64 KHz
+   *  - IF: 150 KHz
+   * 
+   * Approximate costs for this function:
+   *  - ~870 bytes FLASH
+   *  - ~32 bytes RAM
+   *  - 9400 cycles
+   */
+  uint32_t cc1000SetFrequency(uint32_t desiredFreq) {
+    uint32_t ActualChannel = 0;
+    uint32_t RXFreq = 0, TXFreq = 0;
+    int32_t Offset = 0x7fffffff;
+    uint16_t FSep = 0;
+    uint8_t RefDiv = 0;
+    uint8_t i, match, frontend;
+
+    for (i = 0; i < 9; i++)
+      {
+	uint32_t NRef = desiredFreq + IF;
+	uint32_t FRef = read_uint32_t(&fRefTbl[i]);
+	uint32_t Channel = 0;
+	uint32_t RXCalc = 0, TXCalc = 0;
+	int32_t  diff;
+
+	NRef = ((desiredFreq + IF)  <<  2) / FRef;
+	if (NRef & 0x1)
+	  NRef++;
+
+	if (NRef & 0x2)
+	  {
+	    RXCalc = 16384 >> 1;
+	    Channel = FRef >> 1;
+	  }
+
+	NRef >>= 2;
+
+	RXCalc += (NRef * 16384) - 8192;
+	if ((RXCalc < FREQ_MIN) || (RXCalc > FREQ_MAX)) 
+	  continue;
+    
+	TXCalc = RXCalc - read_uint16_t(&corTbl[i]);
+	if (TXCalc < FREQ_MIN || TXCalc > FREQ_MAX)
+	  continue;
+
+	Channel += NRef * FRef;
+	Channel -= IF;
+
+	diff = Channel - desiredFreq;
+	if (diff < 0)
+	  diff = -diff;
+
+	if (diff < Offset)
+	  {
+	    RXFreq = RXCalc;
+	    TXFreq = TXCalc;
+	    ActualChannel = Channel;
+	    FSep = read_uint16_t(&fSepTbl[i]);
+	    RefDiv = i + 6;
+	    Offset = diff;
+	  }
+      }
+
+    if (RefDiv != 0)
+      {
+	call CC.write(CC1K_FREQ_0A, RXFreq);
+	call CC.write(CC1K_FREQ_1A, RXFreq >> 8);
+	call CC.write(CC1K_FREQ_2A, RXFreq >> 16);
+
+	call CC.write(CC1K_FREQ_0B, TXFreq);
+	call CC.write(CC1K_FREQ_1B, TXFreq >> 8);
+	call CC.write(CC1K_FREQ_2B, TXFreq >> 16);
+
+	call CC.write(CC1K_FSEP0, FSep);
+	call CC.write(CC1K_FSEP1, FSep >> 8);
+
+	if (ActualChannel < 500000000)
+	  {
+	    if (ActualChannel < 400000000)
+	      {
+		rxCurrent = 8 << CC1K_VCO_CURRENT | 1 << CC1K_LO_DRIVE;
+		txCurrent = 9 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE;
+	      }
+	    else
+	      {
+		rxCurrent = 4 << CC1K_VCO_CURRENT | 1 << CC1K_LO_DRIVE;
+		txCurrent = 8 << CC1K_VCO_CURRENT | 1 << CC1K_PA_DRIVE;
+	      }
+	    frontend = 1 << CC1K_IF_RSSI;
+	    match = 7 << CC1K_RX_MATCH;
+	  }
+	else
+	  {
+	    rxCurrent = 8 << CC1K_VCO_CURRENT | 3 << CC1K_LO_DRIVE;
+	    txCurrent = 15 << CC1K_VCO_CURRENT | 3 << CC1K_PA_DRIVE;
+
+	    frontend =
+	      1 << CC1K_BUF_CURRENT | 2 << CC1K_LNA_CURRENT | 
+	      1 << CC1K_IF_RSSI;
+	    match = 2 << CC1K_RX_MATCH; // datasheet says to use 1...
+	  }
+	call CC.write(CC1K_CURRENT, rxCurrent);
+	call CC.write(CC1K_MATCH, match);
+	call CC.write(CC1K_FRONT_END, frontend);
+	call CC.write(CC1K_PLL, RefDiv << CC1K_REFDIV);
+      }
+
+    return ActualChannel;
+  }
+
+  command void CC1000Control.init() {
+    call CC.init();
+
+    // wake up xtal and reset unit
+    call CC.write(CC1K_MAIN,
+		  1 << CC1K_RX_PD | 1 << CC1K_TX_PD | 
+		  1 << CC1K_FS_PD | 1 << CC1K_BIAS_PD); 
+    // clear reset.
+    call CC1000Control.coreOn();
+    call BusyWait.wait(2000);
+
+    // Set default parameter values
+    // POWER: 0dbm (~900MHz), 6dbm (~430MHz)
+    power = 8 << CC1K_PA_HIGHPOWER | 0 << CC1K_PA_LOWPOWER;
+    call CC.write(CC1K_PA_POW, power);
+
+    // select Manchester Violation for CHP_OUT
+    call CC.write(CC1K_LOCK_SELECT, 9 << CC1K_LOCK_SELECT);
+
+    // Default modem values = 19.2 Kbps (38.4 kBaud), Manchester encoded
+    call CC.write(CC1K_MODEM2, 0);
+    call CC.write(CC1K_MODEM1, 
+		  3 << CC1K_MLIMIT |
+		  1 << CC1K_LOCK_AVG_MODE | 
+		  3 << CC1K_SETTLING |
+		  1 << CC1K_MODEM_RESET_N);
+    call CC.write(CC1K_MODEM0, 
+		  5 << CC1K_BAUDRATE |
+		  1 << CC1K_DATA_FORMAT | 
+		  1 << CC1K_XOSC_FREQ);
+
+    call CC.write(CC1K_FSCTRL, 1 << CC1K_FS_RESET_N);
+
+#ifdef CC1K_DEF_FREQ
+    call CC1000Control.tuneManual(CC1K_DEF_FREQ);
+#else
+    call CC1000Control.tunePreset(CC1K_DEF_PRESET);
+#endif
+    call CC1000Control.off();
+  }
+
+  command void CC1000Control.tunePreset(uint8_t freq) {
+    int i;
+
+    // FREQA, FREQB, FSEP, CURRENT(RX), FRONT_END, POWER, PLL
+    for (i = CC1K_FREQ_2A; i <= CC1K_PLL; i++)
+      call CC.write(i, read_uint8_t(&CC1K_Params[freq][i]));
+    call CC.write(CC1K_MATCH, read_uint8_t(&CC1K_Params[freq][CC1K_MATCH]));
+    rxCurrent = read_uint8_t(&CC1K_Params[freq][CC1K_CURRENT]);
+    txCurrent = read_uint8_t(&CC1K_Params[freq][CC1K_MATCH + 1]);
+    power = read_uint8_t(&CC1K_Params[freq][CC1K_PA_POW]);
+
+    calibrate();
+  }
+
+  command uint32_t CC1000Control.tuneManual(uint32_t DesiredFreq) {
+    uint32_t actualFreq;
+
+    actualFreq = cc1000SetFrequency(DesiredFreq);
+
+    calibrate();
+
+    return actualFreq;
+  }
+
+  async command void CC1000Control.txMode() {
+    // MAIN register to TX mode
+    call CC.write(CC1K_MAIN,
+		  1 << CC1K_RXTX |
+		  1 << CC1K_F_REG |
+		  1 << CC1K_RX_PD | 
+		  1 << CC1K_RESET_N);
+    // Set the TX mode VCO Current
+    call CC.write(CC1K_CURRENT, txCurrent);
+    call BusyWait.wait(250);
+    call CC.write(CC1K_PA_POW, power);
+    call BusyWait.wait(20);
+  }
+
+  async command void CC1000Control.rxMode() {
+    // MAIN register to RX mode
+    // Powerup Freqency Synthesizer and Receiver
+    call CC.write(CC1K_CURRENT, rxCurrent);
+    call CC.write(CC1K_PA_POW, 0); // turn off power amp
+    call CC.write(CC1K_MAIN, 1 << CC1K_TX_PD | 1 << CC1K_RESET_N);
+    call BusyWait.wait(125);
+  }
+
+  async command void CC1000Control.coreOn() {
+    // MAIN register to SLEEP mode
+    call CC.write(CC1K_MAIN,
+		  1 << CC1K_RX_PD |
+		  1 << CC1K_TX_PD | 
+		  1 << CC1K_FS_PD |
+		  1 << CC1K_BIAS_PD |
+		  1 << CC1K_RESET_N);
+  }
+
+  async command void CC1000Control.biasOn() {
+    call CC.write(CC1K_MAIN,
+		  1 << CC1K_RX_PD |
+		  1 << CC1K_TX_PD | 
+		  1 << CC1K_FS_PD | 
+		  1 << CC1K_RESET_N);
+  }
+
+
+  async command void CC1000Control.off() {
+    // MAIN register to power down mode. Shut everything off
+    call CC.write(CC1K_MAIN,
+		  1 << CC1K_RX_PD |
+		  1 << CC1K_TX_PD | 
+		  1 << CC1K_FS_PD |
+		  1 << CC1K_CORE_PD |
+		  1 << CC1K_BIAS_PD |
+		  1 << CC1K_RESET_N);
+    call CC.write(CC1K_PA_POW, 0);  // turn off rf amp
+  }
+
+  command void CC1000Control.setRFPower(uint8_t newPower) {
+    power = newPower;
+  }
+
+  command uint8_t CC1000Control.getRFPower() {
+    return power;
+  }
+
+  command void CC1000Control.selectLock(uint8_t fn) {
+    // Select function of CHP_OUT pin (readable via getLock)
+    call CC.write(CC1K_LOCK, fn << CC1K_LOCK_SELECT);
+  }
+
+  command uint8_t CC1000Control.getLock() {
+    return call CC.getLOCK(); 
+  }
+
+  command bool CC1000Control.getLOStatus() {
+    // We use a high-side LO (local oscillator) frequency -> data will be
+    // inverted. See cc1000ComputeFreq and CC1000 datasheet p.23.
+    return TRUE;
+  }
+}
diff --git a/tos/chips/cc1000/CC1000CsmaP.nc b/tos/chips/cc1000/CC1000CsmaP.nc
new file mode 100644
index 00000000..bd0d5097
--- /dev/null
+++ b/tos/chips/cc1000/CC1000CsmaP.nc
@@ -0,0 +1,561 @@
+// $Id: CC1000CsmaP.nc,v 1.11 2010-06-29 22:07:44 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "message.h"
+#include "crc.h"
+#include "CC1000Const.h"
+#include "Timer.h"
+
+/**
+ * A rewrite of the low-power-listening CC1000 radio stack.
+ * This file contains the CSMA and low-power listening logic. Actual
+ * packet transmission and reception is in SendReceive.
+ * <p>
+ * This code has some degree of platform-independence, via the
+ * CC1000Control, RSSIADC and SpiByteFifo interfaces which must be provided
+ * by the platform. However, these interfaces may still reflect some
+ * particularities of the mica2 hardware implementation.
+ *
+ * @author Philip Buonadonna
+ * @author Jaein Jeong
+ * @author Joe Polastre
+ * @author David Gay
+ */
+  
+module CC1000CsmaP @safe() {
+  provides {
+    interface Init;
+    interface SplitControl;
+    interface CsmaControl;
+    interface CsmaBackoff;
+    interface LowPowerListening;
+  }
+  uses {
+    interface Init as ByteRadioInit;
+    interface StdControl as ByteRadioControl;
+    interface ByteRadio;
+
+    //interface PowerManagement;
+    interface CC1000Control;
+    interface CC1000Squelch;
+    interface Random;
+    interface Timer<TMilli> as WakeupTimer;
+    interface BusyWait<TMicro, uint16_t>;
+
+    interface ReadNow<uint16_t> as RssiNoiseFloor;
+    interface ReadNow<uint16_t> as RssiCheckChannel;
+    interface ReadNow<uint16_t> as RssiPulseCheck;
+    async command void cancelRssi();
+  }
+}
+implementation 
+{
+  enum {
+    DISABLED_STATE,
+    IDLE_STATE,
+    RX_STATE,
+    TX_STATE,
+    POWERDOWN_STATE,
+    PULSECHECK_STATE
+  };
+
+  enum {
+    TIME_AFTER_CHECK =  30,
+  };
+
+  uint8_t radioState = DISABLED_STATE;
+  struct {
+    uint8_t ccaOff : 1;
+    uint8_t txPending : 1;
+  } f; // f for flags
+  uint8_t count;
+  uint8_t clearCount;
+
+  int16_t macDelay;
+
+  uint16_t sleepTime;
+
+  uint16_t rssiForSquelch;
+
+  task void setWakeupTask();
+
+  cc1000_metadata_t * ONE getMetadata(message_t * ONE amsg) {
+    return TCAST(cc1000_metadata_t * ONE, (uint8_t*)amsg + offsetof(message_t, footer) + sizeof(cc1000_footer_t));
+  }
+  
+  void enterIdleState() {
+    call cancelRssi();
+    radioState = IDLE_STATE;
+  }
+
+  void enterIdleStateSetWakeup() {
+    enterIdleState();
+    post setWakeupTask();
+  }
+
+  void enterDisabledState() {
+    call cancelRssi();
+    radioState = DISABLED_STATE;
+  }
+
+  void enterPowerDownState() {
+    call cancelRssi();
+    radioState = POWERDOWN_STATE;
+  }
+
+  void enterPulseCheckState() {
+    radioState = PULSECHECK_STATE;
+    count = 0;
+  }
+
+  void enterRxState() {
+    call cancelRssi();
+    radioState = RX_STATE;
+  }
+
+  void enterTxState() {
+    radioState = TX_STATE;
+  }
+
+  /* Basic radio power control */
+
+  void radioOn() {
+    call CC1000Control.coreOn();
+    call BusyWait.wait(2000);
+    call CC1000Control.biasOn();
+    call BusyWait.wait(200);
+    atomic call ByteRadio.listen();
+  }
+
+  void radioOff() {
+    call CC1000Control.off();
+    call ByteRadio.off();
+  }
+
+  void setPreambleLength(message_t * ONE msg);
+
+  /* Initialisation, startup and stopping */
+  /*--------------------------------------*/
+
+  command error_t Init.init() {
+    call ByteRadioInit.init();
+    call CC1000Control.init();
+
+    return SUCCESS;
+  }
+
+  task void startStopDone() {
+    uint8_t s;
+
+    // Save a byte of RAM by sharing start/stopDone task
+    atomic s = radioState;
+    if (s == DISABLED_STATE)
+      signal SplitControl.stopDone(SUCCESS);
+    else
+      signal SplitControl.startDone(SUCCESS);
+  }
+
+  command error_t SplitControl.start() {
+    atomic 
+      if (radioState == DISABLED_STATE)
+	{
+	  call ByteRadioControl.start();
+	  enterIdleStateSetWakeup();
+	  f.txPending = FALSE;
+	}
+      else
+	return SUCCESS;
+
+    radioOn();
+
+    post startStopDone();
+
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.stop() {
+    atomic 
+      {
+	call ByteRadioControl.stop();
+	enterDisabledState();
+	radioOff();
+      }
+    call WakeupTimer.stop();
+    post startStopDone();
+    return SUCCESS;
+  }
+
+  /* Wakeup timer */
+  /*-------------*/
+
+  /* All timer setting code is placed in setWakeup, for consistency. */
+  void setWakeup() {
+    switch (radioState)
+      {
+      case IDLE_STATE:
+	/* Timer already running means that we have a noise floor
+	   measurement scheduled. If we just set a new alarm here, we
+	   might indefinitely delay noise floor measurements if we're,
+	   e,g, transmitting frequently. */
+	if (!call WakeupTimer.isRunning())
+	  if (call CC1000Squelch.settled())
+	    {
+	      if (sleepTime == 0)
+		call WakeupTimer.startOneShot(CC1K_SquelchIntervalSlow);
+	      else
+		// timeout for receiving a message after an lpl check
+		// indicates channel activity.
+		call WakeupTimer.startOneShot(TIME_AFTER_CHECK);
+	    }
+	  else
+	    call WakeupTimer.startOneShot(CC1K_SquelchIntervalFast);
+	break;
+      case PULSECHECK_STATE:
+	// Radio warm-up time.
+	call WakeupTimer.startOneShot(1);
+	break;
+      case POWERDOWN_STATE:
+	// low-power listening check interval
+	call WakeupTimer.startOneShot(sleepTime);
+	break;
+      }
+  }
+
+  task void setWakeupTask() {
+    atomic setWakeup();
+  }
+
+  event void WakeupTimer.fired() {
+    atomic 
+      {
+	switch (radioState)
+	  {
+	  case IDLE_STATE:
+	    /* If we appear to be receiving a packet we don't check the
+	       noise floor. For LPL, this means that going to sleep will
+	       be delayed by another TIME_AFTER_CHECK ms. */
+	    if (!call ByteRadio.syncing())
+	      {
+		call cancelRssi();
+		call RssiNoiseFloor.read();
+	      }
+	    break;
+
+	  case POWERDOWN_STATE:
+	    // Turn radio on, wait for 1ms
+	    enterPulseCheckState();
+	    call CC1000Control.biasOn();
+	    break;
+
+	  case PULSECHECK_STATE:
+	    // Switch to RX mode and get RSSI output
+	    call CC1000Control.rxMode();
+	    call RssiPulseCheck.read();
+	    call BusyWait.wait(80);
+	    return; // don't set wakeup timer
+	  }
+	setWakeup();
+      }
+  }
+
+  /* Low-power listening stuff */
+  /*---------------------------*/
+
+  /* Should we go to sleep, or turn the radio fully on? */
+  task void sleepCheck() {
+    bool turnOn = FALSE;
+
+    atomic
+      if (f.txPending || !sleepTime)
+	{
+	  if (radioState == PULSECHECK_STATE || radioState == POWERDOWN_STATE)
+	    {
+	      enterIdleStateSetWakeup();
+	      turnOn = TRUE;
+	    }
+	}
+      else if (call CC1000Squelch.settled() && !call ByteRadio.syncing())
+	{
+	  radioOff();
+	  enterPowerDownState();
+	  setWakeup();
+	}
+
+    if (turnOn)
+      radioOn();
+  }
+
+  task void adjustSquelch();
+
+  async event void RssiPulseCheck.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS)
+      {
+	/* Just give up on this interval. */
+	post sleepCheck();
+	return;
+      }
+
+    /* We got some RSSI data for our LPL check. Decide whether to:
+       - go back to sleep (quiet)
+       - wake up (channel active)
+       - get more RSSI data
+    */
+    if (data > call CC1000Squelch.get() - (call CC1000Squelch.get() >> 2))
+      {
+	post sleepCheck();
+	// don't be too agressive (ignore really quiet thresholds).
+	if (data < call CC1000Squelch.get() + (call CC1000Squelch.get() >> 3))
+	  {
+	    // adjust the noise floor level, go back to sleep.
+	    rssiForSquelch = data;
+	    post adjustSquelch();
+	  }
+      }
+    else if (count++ > 5)
+      {
+	//go to the idle state since no outliers were found
+	enterIdleStateSetWakeup();
+	call ByteRadio.listen();
+      }
+    else
+      {
+	call RssiPulseCheck.read();
+	call BusyWait.wait(80);
+      }
+  }
+
+  /* CSMA */
+  /*------*/
+
+  event void ByteRadio.rts(message_t * ONE msg) {
+    atomic
+      {
+	f.txPending = TRUE;
+
+	if (radioState == POWERDOWN_STATE)
+	  post sleepCheck();
+	if (!f.ccaOff)
+	  macDelay = signal CsmaBackoff.initial(call ByteRadio.getTxMessage());
+	else
+	  macDelay = 1;
+
+	setPreambleLength(msg);
+      }
+  }
+
+  async event void ByteRadio.sendDone() {
+    f.txPending = FALSE;
+    enterIdleStateSetWakeup();
+  }
+
+  void congestion() {
+    macDelay = signal CsmaBackoff.congestion(call ByteRadio.getTxMessage());
+  }
+
+  async event void ByteRadio.idleByte(bool preamble) {
+    if (f.txPending)
+      {
+	if (!f.ccaOff && preamble)
+	  congestion();
+	else if (macDelay && !--macDelay)
+	  {
+	    call cancelRssi();
+	    count = 0;
+	    call RssiCheckChannel.read();
+	  }
+      }
+  }
+
+  async event void RssiCheckChannel.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS)
+      {
+	/* We'll retry the transmission at the next SPI event. */
+	atomic macDelay = 1;
+	return;
+      }
+
+    count++;
+    if (data > call CC1000Squelch.get() + CC1K_SquelchBuffer)
+      clearCount++;
+    else
+      clearCount = 0;
+
+    // if the channel is clear or CCA is disabled, GO GO GO!
+    if (clearCount >= 1 || f.ccaOff)
+      {
+	enterTxState();
+	call ByteRadio.cts();
+      }
+    else if (count == CC1K_MaxRSSISamples)
+      congestion();
+    else 
+      call RssiCheckChannel.read();
+  }
+
+  /* Message being received. We basically just go inactive. */
+  /*--------------------------------------------------------*/
+
+  async event void ByteRadio.rx() {
+    enterRxState();
+  }
+
+  async event void ByteRadio.rxDone() {
+    if (radioState == RX_STATE)
+      enterIdleStateSetWakeup();
+  }
+
+  /* Noise floor */
+  /*-------------*/
+
+  task void adjustSquelch() {
+    uint16_t squelchData;
+
+    atomic squelchData = rssiForSquelch;
+    call CC1000Squelch.adjust(squelchData);
+  }
+
+  async event void RssiNoiseFloor.readDone(error_t result, uint16_t data) {
+    if (result != SUCCESS)
+      {
+	/* We just ignore failed noise floor measurements */
+	post sleepCheck();
+	return;
+      }
+
+    rssiForSquelch = data;
+    post adjustSquelch();
+    post sleepCheck();
+  }
+
+  /* Options */
+  /*---------*/
+
+  async command error_t CsmaControl.enableCca() {
+    atomic f.ccaOff = FALSE;
+    return SUCCESS;
+  }
+
+  async command error_t CsmaControl.disableCca() {
+    atomic f.ccaOff = TRUE;
+    return SUCCESS;
+  }
+
+  /* Default MAC backoff parameters */
+  /*--------------------------------*/
+
+  default async event uint16_t CsmaBackoff.initial(message_t *m) { 
+    // initially back off [1,32] bytes (approx 2/3 packet)
+    return (call Random.rand16() & 0x1F) + 1;
+  }
+
+  default async event uint16_t CsmaBackoff.congestion(message_t *m) { 
+    return (call Random.rand16() & 0xF) + 1;
+  }
+
+  /* LowPowerListening setup */
+  /* ----------------------- */
+
+  uint16_t validateSleepInterval(uint16_t sleepIntervalMs) {
+    if (sleepIntervalMs < CC1K_LPL_MIN_INTERVAL)
+      return 0;
+    else if (sleepIntervalMs > CC1K_LPL_MAX_INTERVAL)
+      return CC1K_LPL_MAX_INTERVAL;
+    else
+      return sleepIntervalMs;
+  }
+
+  uint16_t dutyToSleep(uint16_t dutyCycle) {
+    /* Scaling factors on CC1K_LPL_CHECK_TIME and dutyCycle are identical */
+    uint16_t interval = (1000 * CC1K_LPL_CHECK_TIME) / dutyCycle;
+
+    return interval < CC1K_LPL_MIN_INTERVAL ? 0 : interval;
+  }
+
+  uint16_t sleepToDuty(uint16_t sleepInterval) {
+    if (sleepInterval < CC1K_LPL_MIN_INTERVAL)
+      return 10000;
+
+    /* Scaling factors on CC1K_LPL_CHECK_TIME and dutyCycle are identical */
+    return (1000 * CC1K_LPL_CHECK_TIME) / sleepInterval;
+  }
+
+  command void LowPowerListening.setLocalWakeupInterval(uint16_t s) {
+    sleepTime = validateSleepInterval(s);
+  }
+
+  command uint16_t LowPowerListening.getLocalWakeupInterval() {
+    return sleepTime;
+  }
+
+  command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t sleepIntervalMs) {
+    cc1000_metadata_t *meta = getMetadata(msg);
+
+    meta->strength_or_preamble = -(int16_t)validateSleepInterval(sleepIntervalMs) - 1;
+  }
+
+  command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) {
+    cc1000_metadata_t *meta = getMetadata(msg);
+
+    if (meta->strength_or_preamble >= 0)
+      return sleepTime;
+    else
+      return -(meta->strength_or_preamble + 1);
+  }
+
+  void setPreambleLength(message_t * ONE msg) {
+    cc1000_metadata_t *meta = getMetadata(msg);
+    uint16_t s;
+    uint32_t plen;
+
+    if (meta->strength_or_preamble >= 0)
+      s = sleepTime;
+    else
+      s = -(meta->strength_or_preamble + 1);
+    meta->strength_or_preamble = 0; /* Destroy setting */
+
+    if (s == 0)
+      plen = 6;
+    else
+      plen = ((s * 614UL) >> 8) + 22; /* ~ s * 2.4 + 22 */
+    call ByteRadio.setPreambleLength(plen);
+  }
+}
diff --git a/tos/chips/cc1000/CC1000CsmaRadioC.nc b/tos/chips/cc1000/CC1000CsmaRadioC.nc
new file mode 100644
index 00000000..c2f56be0
--- /dev/null
+++ b/tos/chips/cc1000/CC1000CsmaRadioC.nc
@@ -0,0 +1,143 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * A low-power-listening CC1000 radio stack.
+ *
+ * Radio logic is split between Csma (media-access control, low-power
+ * listening and general control) and SendReceive (packet reception and
+ * transmission). 
+ *
+ * CC1000RssiP (RSSI sharing), CC1000SquelchP (noise-floor estimation)
+ * and CC1000ControlP (radio configuration) provide supporting roles.
+ *
+ * This code has some degree of platform-independence, via the HplCC1000,
+ * RssiAdc and HplCC1000Spi interfaces which must be provided by the
+ * platform. However, these interfaces may still reflect some
+ * particularities of the mica2 hardware implementation.
+ *
+ * @author Joe Polastre
+ * @author David Gay
+ * @author Marco Langerwisch (Packet timestamping)
+ */
+
+#include "CC1000Const.h"
+#include "message.h"
+
+configuration CC1000CsmaRadioC {
+  provides {
+    interface SplitControl;
+    interface Send;
+    interface Receive;
+
+    interface Packet;
+    interface CsmaControl;
+    interface CsmaBackoff;
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+
+    interface LowPowerListening;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+    interface PacketTimeSyncOffset;
+  }
+}
+implementation {
+  components CC1000CsmaP as Csma;
+  components CC1000SendReceiveP as SendReceive;
+  components CC1000RssiP as Rssi;
+  components CC1000SquelchP as Squelch;
+  components CC1000ControlP as Control;
+  components HplCC1000C as Hpl;
+
+  components MainC, RandomC, new TimerMilliC(), ActiveMessageAddressC, BusyWaitMicroC;
+
+  MainC.SoftwareInit -> Csma;
+  MainC.SoftwareInit -> Squelch;
+
+  SplitControl = Csma;
+  Send = SendReceive;
+  Receive = SendReceive;
+  Packet = SendReceive;
+
+  CsmaControl = Csma;
+  CsmaBackoff = Csma;
+  LowPowerListening = Csma;
+  PacketAcknowledgements = SendReceive;
+  LinkPacketMetadata = SendReceive;
+
+  Csma.CC1000Control -> Control;
+  Csma.Random -> RandomC;
+  Csma.CC1000Squelch -> Squelch;
+  Csma.WakeupTimer -> TimerMilliC;
+  Csma.ByteRadio -> SendReceive;
+  Csma.ByteRadioInit -> SendReceive;
+  Csma.ByteRadioControl -> SendReceive;
+
+  SendReceive.CC1000Control -> Control;
+  SendReceive.HplCC1000Spi -> Hpl;
+  SendReceive.amAddress -> ActiveMessageAddressC;
+  SendReceive.RssiRx -> Rssi.Rssi[unique(UQ_CC1000_RSSI)];
+  SendReceive.CC1000Squelch -> Squelch;
+
+  Csma.RssiNoiseFloor -> Rssi.Rssi[unique(UQ_CC1000_RSSI)];
+  Csma.RssiCheckChannel -> Rssi.Rssi[unique(UQ_CC1000_RSSI)];
+  Csma.RssiPulseCheck -> Rssi.Rssi[unique(UQ_CC1000_RSSI)];
+  Csma.cancelRssi -> Rssi;
+  Csma.BusyWait -> BusyWaitMicroC;
+
+  Rssi.ActualRssi -> Hpl;
+  Rssi.Resource -> Hpl;
+  Control.CC -> Hpl;
+  Control.BusyWait -> BusyWaitMicroC;
+
+  PacketTimeStamp32khz = SendReceive;
+  PacketTimeStampMilli = SendReceive;
+  PacketTimeSyncOffset = SendReceive;
+
+  components Counter32khz32C, new CounterToLocalTimeC(T32khz);
+  CounterToLocalTimeC.Counter -> Counter32khz32C;
+  SendReceive.LocalTime32khz -> CounterToLocalTimeC;
+
+  //DummyTimer is introduced to compile apps that use no timers
+  components HilTimerMilliC, new TimerMilliC() as DummyTimer;
+  SendReceive.LocalTimeMilli -> HilTimerMilliC;
+}
diff --git a/tos/chips/cc1000/CC1000Msg.h b/tos/chips/cc1000/CC1000Msg.h
new file mode 100644
index 00000000..c106b7a0
--- /dev/null
+++ b/tos/chips/cc1000/CC1000Msg.h
@@ -0,0 +1,43 @@
+#ifndef CC1K_RADIO_MSG_H
+#define CC1K_RADIO_MSG_H
+
+#include "AM.h"
+
+typedef nx_struct CC1KHeader {
+  nx_am_addr_t dest;
+  nx_am_addr_t source;
+  nx_uint8_t length;
+  nx_am_group_t group;
+  nx_am_id_t type;
+} cc1000_header_t;
+
+typedef nx_struct CC1KFooter {
+  nxle_uint16_t crc;  
+} cc1000_footer_t;
+
+typedef enum {
+  CC1000_ACK_BIT   = 0x1,
+  CC1000_WHITE_BIT = 0x2,
+  /* 60 comes from the mica2 data sheet (MPR/MIB guide) and Dongjin Son's work in SenSys 2006.
+     Son's work showed that a SINR of 6dB is sufficient for > 90% PRR. Figure 7-2 of the data
+     sheet shows that a 6dB difference is approximately equal to a VRSSI voltage difference of
+     0.15V. Since the battery voltage is 2.8V (approximately), 60/1024 * 2.8 is roughly equal
+     to 0.15. This deserves some experimental testing. -pal */
+  CC1000_WHITE_BIT_THRESH = 60
+} CC1KMetadataBits;
+
+typedef nx_struct CC1KMetadata {
+  nx_int16_t strength_or_preamble; /* negative when used for preamble length */
+  nx_uint8_t metadataBits;
+  nx_bool timesync;
+  nx_uint32_t timestamp;
+  nx_uint8_t sendSecurityMode;
+  nx_uint8_t receiveSecurityMode;  
+} cc1000_metadata_t;
+
+enum
+{
+  CC1000_INVALID_TIMESTAMP  = 0x80000000L,
+};
+
+#endif
diff --git a/tos/chips/cc1000/CC1000RssiP.nc b/tos/chips/cc1000/CC1000RssiP.nc
new file mode 100644
index 00000000..67807d2f
--- /dev/null
+++ b/tos/chips/cc1000/CC1000RssiP.nc
@@ -0,0 +1,121 @@
+/* $Id: CC1000RssiP.nc,v 1.8 2010-06-29 22:07:44 scipio Exp $
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *   RSSI fun. It's used for lots of things, and a request to read it
+ *   for one purpose may have to be discarded if conditions change. For
+ *   example, if we've initiated a noise-floor measure, but start 
+ *   receiving a packet, we have to:<ul>
+ *   <li>cancel the noise-floor measure (we don't know if the value will
+ *     reflect the received packet or the previous idle state)
+ *   <li>start an RSSI measurement so that we can report signal strength
+ *     to the application
+ *   </ul><p>
+ *   This module hides the complexities of cancellation from the rest of
+ *   the stack.
+ */
+
+module CC1000RssiP @safe()
+{
+  provides {
+    interface ReadNow<uint16_t> as Rssi[uint8_t reason];
+    async command void cancel();
+  }
+  uses {
+    interface Resource;
+    interface ReadNow<uint16_t> as ActualRssi;
+  }
+}
+implementation
+{
+  enum {
+    IDLE = unique(UQ_CC1000_RSSI),
+    CANCELLED = unique(UQ_CC1000_RSSI)
+  };
+
+  /* All commands are called within atomic sections */
+  uint8_t currentOp = IDLE;
+  uint8_t nextOp;
+
+  async command void cancel() {
+    if (currentOp != IDLE)
+      currentOp = CANCELLED;
+  }
+
+  event void Resource.granted() {
+    call ActualRssi.read();
+  }
+
+  async command error_t Rssi.read[uint8_t reason]() {
+    if (currentOp == IDLE)
+      {
+	currentOp = reason;
+	if (call Resource.immediateRequest() == SUCCESS)
+	  call ActualRssi.read();
+	else
+	  call Resource.request();
+      }
+    else
+      nextOp = reason;
+    return SUCCESS;
+  }
+
+  void startNextOp() {
+    currentOp = nextOp;
+    if (nextOp != IDLE)
+      {
+	nextOp = IDLE;
+	call ActualRssi.read();
+      }
+    else
+      call Resource.release();
+  }
+
+  async event void ActualRssi.readDone(error_t result, uint16_t data) {
+    atomic
+      {
+	/* The RSSI measurements are assumed to be 10-bits */
+	signal Rssi.readDone[currentOp](result, data);
+	startNextOp();
+      }
+  }
+
+  default async event void Rssi.readDone[uint8_t reason](error_t result, uint16_t data) { }
+}
diff --git a/tos/chips/cc1000/CC1000SendReceiveP.nc b/tos/chips/cc1000/CC1000SendReceiveP.nc
new file mode 100644
index 00000000..5bd2d893
--- /dev/null
+++ b/tos/chips/cc1000/CC1000SendReceiveP.nc
@@ -0,0 +1,795 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#include "message.h"
+#include "crc.h"
+#include "CC1000Const.h"
+#include "Timer.h"
+#include "CC1000TimeSyncMessage.h"
+
+/**
+ * A rewrite of the low-power-listening CC1000 radio stack.
+ * This file contains the send and receive logic for the CC1000 radio.
+ * It does not do any media-access control. It requests the channel
+ * via the ready-to-send event (rts) and starts transmission on reception
+ * of the clear-to-send command (cts). It listens for packets if the
+ * listen() command is called, and stops listening when off() is called.
+ * <p>
+ * This code has some degree of platform-independence, via the
+ * CC1000Control, RSSIADC and SpiByteFifo interfaces which must be provided
+ * by the platform. However, these interfaces may still reflect some
+ * particularities of the mica2 hardware implementation.
+ *
+ * @author Philip Buonadonna
+ * @author Jaein Jeong
+ * @author Joe Polastre
+ * @author David Gay
+ * @author Marco Langerwisch (Packet timestamping)
+ */
+  
+module CC1000SendReceiveP @safe() {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface Send;
+    interface Receive;
+    interface Packet;
+    interface ByteRadio;
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+    interface PacketTimeSyncOffset;
+  }
+  uses {
+    //interface PowerManagement;
+    interface CC1000Control;
+    interface HplCC1000Spi;
+    interface CC1000Squelch;
+    interface ReadNow<uint16_t> as RssiRx;
+    async command am_addr_t amAddress();
+
+    interface LocalTime<T32khz> as LocalTime32khz;
+    interface LocalTime<TMilli> as LocalTimeMilli;
+  }
+}
+implementation 
+{
+#ifdef PLATFORM_MICA2
+  // estimated calibration, 19.2 Kbps data, Manchester Encoding, time in jiffies (32768 Hz)
+  static const int8_t BIT_CORRECTION[8] = { 27, 28, 30, 32, 34, 36, 38, 40 };
+#else
+  // other platforms not calibrated yet
+  static const uint8_t BIT_CORRECTION[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
+#endif
+
+  enum {
+    OFF_STATE,
+
+    INACTIVE_STATE,		/* Not listening, but will accept sends */
+
+    LISTEN_STATE,		/* Listening for packets */
+
+    /* Reception states */
+    SYNC_STATE,
+    RX_STATE,
+    RECEIVED_STATE,
+    SENDING_ACK,
+
+    /* Transmission states */
+    TXPREAMBLE_STATE,
+    TXSYNC_STATE,
+    TXDATA_STATE,
+    TXCRC_STATE,
+    TXFLUSH_STATE,
+    TXWAITFORACK_STATE,
+    TXREADACK_STATE,
+    TXDONE_STATE,
+  };
+
+  enum {
+    SYNC_BYTE1 =	0x33,
+    SYNC_BYTE2 =	0xcc,
+    SYNC_WORD =		SYNC_BYTE1 << 8 | SYNC_BYTE2,
+    ACK_BYTE1 =		0xba,
+    ACK_BYTE2 =		0x83,
+    ACK_WORD = 		ACK_BYTE1 << 8 | ACK_BYTE2,
+    ACK_LENGTH =	16,
+    MAX_ACK_WAIT =	18
+  };
+
+  uint8_t radioState;
+  struct {
+    uint8_t ack : 1; 		/* acks enabled? */
+    uint8_t txBusy : 1;		/* send pending? */
+    uint8_t invert : 1;		/* data inverted? (see cc1000 datasheet) */
+    uint8_t rxBitOffset : 3;	/* bit-offset of received bytes */
+  } f; // f for flags
+  uint16_t count;
+  uint16_t runningCrc;
+
+  uint16_t rxShiftBuf;
+  message_t rxBuf;
+  message_t * ONE rxBufPtr = &rxBuf;
+
+  uint16_t preambleLength;
+  message_t * ONE_NOK txBufPtr;
+  uint8_t nextTxByte;
+
+  const_uint8_t ackCode[5] = { 0xab, ACK_BYTE1, ACK_BYTE2, 0xaa, 0xaa };
+
+  /* Packet structure accessor functions. Note that everything is
+   * relative to the data field. */
+  cc1000_header_t * ONE getHeader(message_t * ONE amsg) {
+    return TCAST(cc1000_header_t * ONE, (uint8_t *)amsg + offsetof(message_t, data) - sizeof(cc1000_header_t));
+  }
+
+  cc1000_footer_t *getFooter(message_t * ONE amsg) {
+    return (cc1000_footer_t *)(amsg->footer);
+  }
+  
+  cc1000_metadata_t * ONE getMetadata(message_t * ONE amsg) {
+    return TCAST(cc1000_metadata_t * ONE, (uint8_t *)amsg + offsetof(message_t, footer) + sizeof(cc1000_footer_t));
+  }
+  
+  /* State transition functions */
+  /*----------------------------*/
+
+  void enterOffState() {
+    radioState = OFF_STATE;
+  }
+
+  void enterInactiveState() {
+    radioState = INACTIVE_STATE;
+  }
+
+  void enterListenState() {
+    radioState = LISTEN_STATE;
+    count = 0;
+  }
+
+  void enterSyncState() {
+    radioState = SYNC_STATE;
+    count = 0;
+    rxShiftBuf = 0;
+  }
+
+  void enterRxState() {
+    cc1000_header_t *header = getHeader(rxBufPtr);
+    radioState = RX_STATE;
+    header->length = sizeof rxBufPtr->data;
+    count = sizeof(message_header_t) - sizeof(cc1000_header_t);
+    runningCrc = 0;
+  }
+
+  void enterReceivedState() {
+    radioState = RECEIVED_STATE;
+  }
+
+  void enterAckState() {
+    radioState = SENDING_ACK;
+    count = 0;
+  }
+
+  void enterTxPreambleState() {
+    radioState = TXPREAMBLE_STATE;
+    count = 0;
+    runningCrc = 0;
+    nextTxByte = 0xaa;
+  }
+
+  void enterTxSyncState() {
+    radioState = TXSYNC_STATE;
+  }
+
+  void enterTxDataState() {
+    radioState = TXDATA_STATE;
+    // The count increment happens before the first byte is read from the
+    // packet, so we subtract one from the real packet start point to
+    // compensate.
+    count = (sizeof(message_header_t) - sizeof(cc1000_header_t)) -1; 
+  }
+
+  void enterTxCrcState() {
+    radioState = TXCRC_STATE;
+  }
+    
+  void enterTxFlushState() {
+    radioState = TXFLUSH_STATE;
+    count = 0;
+  }
+    
+  void enterTxWaitForAckState() {
+    radioState = TXWAITFORACK_STATE;
+    count = 0;
+  }
+    
+  void enterTxReadAckState() {
+    radioState = TXREADACK_STATE;
+    rxShiftBuf = 0;
+    count = 0;
+  }
+    
+  void enterTxDoneState() {
+    radioState = TXDONE_STATE;
+  }
+
+  command error_t Init.init() {
+    f.ack = TRUE; /* We always ack, for now at least */
+    call HplCC1000Spi.initSlave();
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start() {
+    atomic 
+      {
+	enterInactiveState();
+	f.txBusy = FALSE;
+	f.invert = call CC1000Control.getLOStatus();
+      }
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    atomic enterOffState();
+    return SUCCESS;
+  }
+
+  /* Send side. Outside requests, SPI handlers for each state */
+  /*----------------------------------------------------------*/
+
+  command error_t Send.send(message_t *msg, uint8_t len) {
+    atomic
+      {
+	if (f.txBusy || radioState == OFF_STATE)
+	  return FAIL;
+	else {
+	  cc1000_header_t *header = getHeader(msg);
+          cc1000_metadata_t *metadata = getMetadata(msg);
+
+	  f.txBusy = TRUE;
+	  header->length = len;
+	  txBufPtr = msg;
+
+          metadata->timesync = FALSE;
+          metadata->timestamp = CC1000_INVALID_TIMESTAMP;
+	}
+      }
+    signal ByteRadio.rts(msg);
+
+    return SUCCESS;
+  }
+
+  async command void ByteRadio.cts() {
+    /* We're set to go! Start with our exciting preamble... */
+    enterTxPreambleState();
+    call HplCC1000Spi.writeByte(0xaa);
+    call CC1000Control.txMode();
+    call HplCC1000Spi.txMode();
+  }
+
+  command error_t Send.cancel(message_t *msg) {
+    /* We simply ignore cancellations. */
+    return FAIL;
+  }
+
+  void sendNextByte() {
+    call HplCC1000Spi.writeByte(nextTxByte);
+    count++;
+  }
+
+  void txPreamble() {
+    sendNextByte();
+    if (count >= preambleLength)
+      {
+	nextTxByte = SYNC_BYTE1;
+	enterTxSyncState();
+      }
+  }
+
+  void txSync() {
+    sendNextByte();
+    nextTxByte = SYNC_BYTE2;
+    enterTxDataState();
+  }
+
+  void txData() {
+    cc1000_header_t *txHeader = getHeader(txBufPtr);
+    sendNextByte();
+
+    if (nextTxByte == SYNC_BYTE2) {
+      // SYNC_WORD has just been sent
+      uint32_t time32khz = call LocalTime32khz.get();
+      call PacketTimeStamp32khz.set(txBufPtr, time32khz);
+
+      if (call PacketTimeSyncOffset.isSet(txBufPtr)) {
+        timesync_radio_t *timesync = (timesync_radio_t*)((void*)txBufPtr + call PacketTimeSyncOffset.get(txBufPtr));
+        // set timesync event time as the offset between the event time and the SFD interrupt time (TEP 133)
+        *timesync  -= time32khz;
+      }
+    }
+    
+    if (count < txHeader->length + sizeof(message_header_t))
+      {
+	nextTxByte = ((uint8_t *)txBufPtr)[count];
+	runningCrc = crcByte(runningCrc, nextTxByte);
+      }
+    else
+      {
+	nextTxByte = runningCrc;
+	enterTxCrcState();
+      }
+  }
+
+  void txCrc() {
+    sendNextByte();
+    nextTxByte = runningCrc >> 8;
+    enterTxFlushState();
+  }
+
+  void txFlush() {
+    sendNextByte();
+    if (count > 3)
+      if (f.ack)
+	enterTxWaitForAckState();
+      else
+	{
+	  call HplCC1000Spi.rxMode();
+	  call CC1000Control.rxMode();
+	  enterTxDoneState();
+	}
+  }
+
+  void txWaitForAck() {
+    sendNextByte();
+    if (count == 1)
+      {
+	call HplCC1000Spi.rxMode();
+	call CC1000Control.rxMode();
+      }
+    else if (count > 3)
+      enterTxReadAckState();
+  }
+
+  void txReadAck(uint8_t in) {
+    uint8_t i;
+
+    sendNextByte();
+
+    for (i = 0; i < 8; i ++)
+      {
+	rxShiftBuf <<= 1;
+	if (in & 0x80)
+	  rxShiftBuf |=  0x1;
+	in <<= 1;
+
+	if (rxShiftBuf == ACK_WORD)
+	  {
+	    getMetadata(txBufPtr)->metadataBits |= CC1000_ACK_BIT;
+	    enterTxDoneState();
+	    return;
+	  }
+      }
+    if (count >= MAX_ACK_WAIT)
+      {
+	getMetadata(txBufPtr)->metadataBits &= ~CC1000_ACK_BIT;
+	enterTxDoneState();
+      }
+  }
+
+  task void signalPacketSent() {
+    message_t *pBuf;
+
+    atomic
+      {
+	pBuf = txBufPtr;
+	f.txBusy = FALSE;
+	enterListenState();
+      }
+    signal Send.sendDone(pBuf, SUCCESS);
+  }
+
+  void txDone() {
+    post signalPacketSent();
+    signal ByteRadio.sendDone();
+  }
+
+  /* Receive */
+  /*---------*/
+
+  void packetReceived();
+  void packetReceiveDone();
+
+  async command void ByteRadio.listen() {
+    enterListenState();
+    call CC1000Control.rxMode();
+    call HplCC1000Spi.rxMode();
+    call HplCC1000Spi.enableIntr();
+  }
+
+  async command void ByteRadio.off() {
+    enterInactiveState();
+    call HplCC1000Spi.disableIntr();
+  }
+
+  void listenData(uint8_t in) {
+    bool preamble = in == 0xaa || in == 0x55;
+
+    // Look for enough preamble bytes
+    if (preamble)
+      {
+	count++;
+	if (count > CC1K_ValidPrecursor)
+	  enterSyncState();
+      }
+    else
+      count = 0;
+
+    signal ByteRadio.idleByte(preamble);
+  }
+
+  void syncData(uint8_t in) {
+    // draw in the preamble bytes and look for a sync byte
+    // save the data in a short with last byte received as msbyte
+    //    and current byte received as the lsbyte.
+    // use a bit shift compare to find the byte boundary for the sync byte
+    // retain the shift value and use it to collect all of the packet data
+    // check for data inversion, and restore proper polarity 
+    // XXX-PB: Don't do this.
+
+    if (in == 0xaa || in == 0x55)
+      // It is actually possible to have the LAST BIT of the incoming
+      // data be part of the Sync Byte.  SO, we need to store that
+      // However, the next byte should definitely not have this pattern.
+      // XXX-PB: Do we need to check for excessive preamble?
+      rxShiftBuf = in << 8;
+    else if (count++ == 0)
+      rxShiftBuf |= in;
+    else if (count <= 6)
+      {
+	// TODO: Modify to be tolerant of bad bits in the preamble...
+        uint32_t time;
+	uint16_t tmp;
+	uint8_t i;
+
+        time = call LocalTime32khz.get();
+
+	// bit shift the data in with previous sample to find sync
+	tmp = rxShiftBuf;
+	rxShiftBuf = rxShiftBuf << 8 | in;
+
+	for(i = 0; i < 8; i++)
+	  {
+	    tmp <<= 1;
+	    if (in & 0x80)
+	      tmp  |=  0x1;
+	    in <<= 1;
+	    // check for sync bytes
+	    if (tmp == SYNC_WORD)
+	      {
+		enterRxState();
+		signal ByteRadio.rx();
+		f.rxBitOffset = 7 - i;
+                // correct receive time according to bit offset and set timestamp
+                time -= BIT_CORRECTION[f.rxBitOffset];
+                call PacketTimeStamp32khz.set(rxBufPtr, time);
+
+		call RssiRx.read();
+	      }
+	  }
+      }
+    else // We didn't find it after a reasonable number of tries, so....
+      enterListenState();
+  }
+  
+  async event void RssiRx.readDone(error_t result, uint16_t data) {
+    cc1000_metadata_t *rxMetadata = getMetadata(rxBufPtr);
+
+    if (result != SUCCESS)
+      rxMetadata->strength_or_preamble = 0;
+    else
+      rxMetadata->strength_or_preamble = data;
+  }
+
+  void rxData(uint8_t in) {
+    uint8_t nextByte;
+    cc1000_header_t *rxHeader = getHeader(rxBufPtr);
+    uint8_t rxLength = rxHeader->length;
+
+    // Reject invalid length packets
+    if (rxLength > TOSH_DATA_LENGTH)
+      {
+	// The packet's screwed up, so just dump it
+	enterListenState();
+	signal ByteRadio.rxDone();
+	return;
+      }
+
+    rxShiftBuf = rxShiftBuf << 8 | in;
+    nextByte = rxShiftBuf >> f.rxBitOffset;
+    ((uint8_t *COUNT(sizeof(message_t)))rxBufPtr)[count++] = nextByte;
+
+    // Adjust rxLength to correspond to the corresponding offset in message_t
+    rxLength += offsetof(message_t, data);
+    if (count <= rxLength)
+      runningCrc = crcByte(runningCrc, nextByte);
+
+    // Jump to CRC when we reach the end of data
+    if (count == rxLength) {
+      count = offsetof(message_t, footer) + offsetof(cc1000_footer_t, crc);
+    }
+
+    if (count == (offsetof(message_t, footer) + sizeof(cc1000_footer_t)))
+      packetReceived();
+  }
+
+  void packetReceived() {
+    cc1000_footer_t *rxFooter = getFooter(rxBufPtr);
+    cc1000_header_t *rxHeader = getHeader(rxBufPtr);
+    // Packet filtering based on bad CRC's is done at higher layers.
+    // So sayeth the TOS weenies.
+    rxFooter->crc = (rxFooter->crc == runningCrc);
+
+    if (f.ack &&
+	rxFooter->crc &&
+	rxHeader->dest == call amAddress())
+      {
+	enterAckState();
+	call CC1000Control.txMode();
+	call HplCC1000Spi.txMode();
+	call HplCC1000Spi.writeByte(0xaa);
+      }
+    else
+      packetReceiveDone();
+  }
+
+  void ackData(uint8_t in) {
+    if (++count >= ACK_LENGTH)
+      { 
+	call CC1000Control.rxMode();
+	call HplCC1000Spi.rxMode();
+	packetReceiveDone();
+      }
+    else if (count >= ACK_LENGTH - sizeof ackCode)
+      call HplCC1000Spi.writeByte(read_uint8_t(&ackCode[count + sizeof ackCode - ACK_LENGTH]));
+  }
+
+  task void signalPacketReceived() {
+    message_t *pBuf;
+    cc1000_header_t *pHeader;
+    atomic
+      {
+	if (radioState != RECEIVED_STATE)
+	  return;
+
+	pBuf = rxBufPtr;
+      }
+    pHeader = getHeader(pBuf);
+    pBuf = signal Receive.receive(pBuf, pBuf->data, pHeader->length);
+    atomic
+      {
+	if (pBuf) 
+	  rxBufPtr = pBuf;
+	if (radioState == RECEIVED_STATE) // receiver might've done something
+	  enterListenState();
+	signal ByteRadio.rxDone();
+      }
+  }
+
+  void packetReceiveDone() {
+    uint16_t snr;
+
+    snr = (uint16_t) getMetadata(rxBufPtr)->strength_or_preamble;
+    /* Higher signal strengths have lower voltages. So see if we're
+       CC1000_WHITE_BIT_THRESH *below* the noise floor. */
+    if ((snr + CC1000_WHITE_BIT_THRESH) < ((call CC1000Squelch.get()))) {
+      getMetadata(rxBufPtr)->metadataBits |= CC1000_WHITE_BIT;
+    }
+    else {
+      getMetadata(rxBufPtr)->metadataBits &= ~CC1000_WHITE_BIT;
+    }
+    
+    post signalPacketReceived();
+    enterReceivedState();
+  }
+
+  async event void HplCC1000Spi.dataReady(uint8_t data) {
+    if (f.invert)
+      data = ~data;
+
+    switch (radioState)
+      {
+      default: break;
+      case TXPREAMBLE_STATE: txPreamble(); break;
+      case TXSYNC_STATE: txSync(); break;
+      case TXDATA_STATE: txData(); break;
+      case TXCRC_STATE: txCrc(); break;
+      case TXFLUSH_STATE: txFlush(); break;
+      case TXWAITFORACK_STATE: txWaitForAck(); break;
+      case TXREADACK_STATE: txReadAck(data); break;
+      case TXDONE_STATE: txDone(); break;
+
+      case LISTEN_STATE: listenData(data); break;
+      case SYNC_STATE: syncData(data); break;
+      case RX_STATE: rxData(data); break;
+      case SENDING_ACK: ackData(data); break;
+      }
+  }
+
+  /* Interaction with rest of stack */
+  /*--------------------------------*/
+
+  async command void ByteRadio.setPreambleLength(uint16_t bytes) {
+    atomic preambleLength = bytes;
+  }
+
+  async command uint16_t ByteRadio.getPreambleLength() {
+    atomic return preambleLength;
+  }
+
+  async command message_t *ByteRadio.getTxMessage() {
+    return txBufPtr;
+  }
+
+  async command bool ByteRadio.syncing() {
+    return radioState == SYNC_STATE;
+  }
+
+  /* Abstract packet layout */
+
+  command void Packet.clear(message_t *msg) {
+    memset(getHeader(msg), 0x0, sizeof(cc1000_header_t));
+    memset(getFooter(msg), 0x0, sizeof(cc1000_footer_t));
+    memset(getMetadata(msg), 0x0, sizeof(cc1000_metadata_t));
+  }
+
+  command uint8_t Packet.payloadLength(message_t *msg) {
+    cc1000_header_t *header = getHeader(msg);
+    return header->length;
+  }
+ 
+  command void Packet.setPayloadLength(message_t *msg, uint8_t len) {
+    getHeader(msg)->length  = len;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+
+  command void* Packet.getPayload(message_t *msg, uint8_t len) {
+    if (len <= TOSH_DATA_LENGTH) {
+      return (void* COUNT_NOK(len))msg->data;
+    }
+    else {
+      return NULL;
+    }
+  }
+
+  async command error_t PacketAcknowledgements.requestAck(message_t *msg) {
+    return SUCCESS;		/* We always ack. */
+  }
+
+  async command error_t PacketAcknowledgements.noAck(message_t *msg) {
+    return FAIL;		/* We always ack */
+  }
+
+  command uint8_t Send.maxPayloadLength() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* Send.getPayload(message_t *m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  async command bool PacketAcknowledgements.wasAcked(message_t *msg) {
+    return getMetadata(msg)->metadataBits & CC1000_ACK_BIT;
+  }
+
+  async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) {
+    return getMetadata(msg)->metadataBits & CC1000_WHITE_BIT;
+  }
+
+  /***************** PacketTimeStamp32khz Commands ****************/
+  async command bool PacketTimeStamp32khz.isValid(message_t* msg)
+  {
+    return (getMetadata(msg)->timestamp != CC1000_INVALID_TIMESTAMP);
+  }
+
+  async command uint32_t PacketTimeStamp32khz.timestamp(message_t* msg)
+  {
+    return getMetadata(msg)->timestamp;
+  }
+
+  async command void PacketTimeStamp32khz.clear(message_t* msg)
+  {
+    getMetadata(msg)->timesync = FALSE;
+    getMetadata(msg)->timestamp = CC1000_INVALID_TIMESTAMP;
+  }
+
+  async command void PacketTimeStamp32khz.set(message_t* msg, uint32_t value)
+  {
+    getMetadata(msg)->timestamp = value;
+  }
+
+  /***************** PacketTimeStampMilli Commands ****************/
+  // over the air value is always T32khz
+  async command bool PacketTimeStampMilli.isValid(message_t* msg)
+  {
+    return call PacketTimeStamp32khz.isValid(msg);
+  }
+
+  async command uint32_t PacketTimeStampMilli.timestamp(message_t* msg)
+  {
+    int32_t offset = call PacketTimeStamp32khz.timestamp(msg) - call LocalTime32khz.get();
+    return (offset >> 5) + call LocalTimeMilli.get();
+  }
+
+  async command void PacketTimeStampMilli.clear(message_t* msg)
+  {
+    call PacketTimeStamp32khz.clear(msg);
+  }
+
+  async command void PacketTimeStampMilli.set(message_t* msg, uint32_t value)
+  {
+    int32_t offset = (value - call LocalTimeMilli.get()) << 5;
+    call PacketTimeStamp32khz.set(msg, offset + call LocalTime32khz.get());
+  }
+
+  /*----------------- PacketTimeSyncOffset -----------------*/
+  async command bool PacketTimeSyncOffset.isSet(message_t* msg)
+  {
+    return getMetadata(msg)->timesync;
+  }
+
+  async command uint8_t PacketTimeSyncOffset.get(message_t* msg)
+  {
+    return sizeof(cc1000_header_t) + getHeader(msg)->length - sizeof(timesync_radio_t);
+  }
+
+  async command void PacketTimeSyncOffset.set(message_t* msg)
+  {
+    getMetadata(msg)->timesync = TRUE;
+  }
+
+  async command void PacketTimeSyncOffset.cancel(message_t* msg)
+  {
+    getMetadata(msg)->timesync = FALSE;
+  }
+}
diff --git a/tos/chips/cc1000/CC1000Squelch.nc b/tos/chips/cc1000/CC1000Squelch.nc
new file mode 100644
index 00000000..72ea9bb6
--- /dev/null
+++ b/tos/chips/cc1000/CC1000Squelch.nc
@@ -0,0 +1,65 @@
+/* $Id: CC1000Squelch.nc,v 1.5 2010-06-29 22:07:44 scipio Exp $
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * CC1000 internal noise floor (aka squelch value) interface
+ * @author David Gay
+ */
+interface CC1000Squelch
+{
+  /**
+   * Adjust noise floor based on new noise measurement
+   * @param data noise measurement
+   */
+  command void adjust(uint16_t data);
+
+  /**
+   * Return current estimated noise floor
+   * @return Noise floor value
+   */
+  async command uint16_t get();
+
+  /**
+   * Check if noise floor estimate is considered stable (typically after
+   * some number of measurements)
+   * @return TRUE if noise floor estimate considered stable, FALSE otherwise
+   */
+  command bool settled();
+}
diff --git a/tos/chips/cc1000/CC1000SquelchP.nc b/tos/chips/cc1000/CC1000SquelchP.nc
new file mode 100644
index 00000000..1a100fab
--- /dev/null
+++ b/tos/chips/cc1000/CC1000SquelchP.nc
@@ -0,0 +1,109 @@
+/* $Id: CC1000SquelchP.nc,v 1.6 2010-06-29 22:07:44 scipio Exp $
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#include "CC1000Const.h"
+
+/**
+ * Clear threshold estimation based on RSSI measurements.
+ *
+ * @author Philip Buonadonna
+ * @author Jaein Jeong
+ * @author Joe Polastre
+ * @author David Gay
+ */
+  
+module CC1000SquelchP @safe()
+{
+  provides {
+    interface Init;
+    interface CC1000Squelch;
+  }
+}
+implementation
+{
+  uint16_t clearThreshold = CC1K_SquelchInit;
+  uint16_t squelchTable[CC1K_SquelchTableSize];
+  uint8_t squelchIndex, squelchCount;
+
+  command error_t Init.init() {
+    uint8_t i;
+
+    for (i = 0; i < CC1K_SquelchTableSize; i++)
+      squelchTable[i] = CC1K_SquelchInit;
+
+    return SUCCESS;
+  }
+
+  command void CC1000Squelch.adjust(uint16_t data) {
+    uint16_t squelchTab[CC1K_SquelchTableSize];
+    uint8_t i, j, min; 
+    uint32_t newThreshold;
+
+    squelchTable[squelchIndex++] = data;
+    if (squelchIndex >= CC1K_SquelchTableSize)
+      squelchIndex = 0;
+    if (squelchCount <= CC1K_SquelchCount)
+      squelchCount++;  
+
+    // Find 3rd highest (aka lowest signal strength) value
+    memcpy(squelchTab, squelchTable, sizeof squelchTable);
+    for (j = 0; ; j++)
+      {
+	min = 0;
+	for (i = 1; i < CC1K_SquelchTableSize; i++)
+	  if (squelchTab[i] > squelchTab[min])
+	    min = i;
+	if (j == 3)
+	  break;
+	squelchTab[min] = 0;
+      }
+
+    newThreshold = ((uint32_t)clearThreshold << 5) +
+      ((uint32_t)squelchTab[min] << 1);
+    atomic clearThreshold = newThreshold / 34;
+  }
+
+  async command uint16_t CC1000Squelch.get() {
+    return clearThreshold;
+  }
+
+  command bool CC1000Squelch.settled() {
+    return squelchCount > CC1K_SquelchCount;
+  }
+}
diff --git a/tos/chips/cc1000/CC1000TimeSyncMessage.h b/tos/chips/cc1000/CC1000TimeSyncMessage.h
new file mode 100644
index 00000000..f3f8f7f9
--- /dev/null
+++ b/tos/chips/cc1000/CC1000TimeSyncMessage.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __TIMESYNCMESSAGE_H__
+#define __TIMESYNCMESSAGE_H__
+
+// this value is sent in the air
+typedef nx_uint32_t timesync_radio_t;
+
+#endif//__TIMESYNCMESSAGE_H__
diff --git a/tos/chips/cc1000/CC1000TimeSyncMessageC.nc b/tos/chips/cc1000/CC1000TimeSyncMessageC.nc
new file mode 100644
index 00000000..af718870
--- /dev/null
+++ b/tos/chips/cc1000/CC1000TimeSyncMessageC.nc
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The Active Message layer for the CC1000 radio with timesync support. This
+ * configuration is just layer above CC1000ActiveMessageC that supports
+ * TimeSyncPacket and TimeSyncAMSend interfaces (TEP 133)
+ *
+ * @author: Miklos Maroti
+ * @author: Brano Kusy (CC2420 port)
+ * @author: Marco Langerwisch (CC1000 port)
+ */
+
+#include <Timer.h>
+#include <AM.h>
+
+configuration CC1000TimeSyncMessageC
+{
+    provides
+    {
+        interface SplitControl;
+        interface Receive[am_id_t id];
+        interface Receive as Snoop[am_id_t id];
+        interface Packet;
+        interface AMPacket;
+
+        interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+        interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+
+        interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[am_id_t id];
+        interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+
+        interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+        interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+    }
+}
+
+implementation
+{
+        components CC1000TimeSyncMessageP, CC1000ActiveMessageC, LedsC;
+
+        PacketTimeStamp32khz = CC1000ActiveMessageC;
+        PacketTimeStampMilli = CC1000ActiveMessageC;
+
+        TimeSyncAMSend32khz = CC1000TimeSyncMessageP;
+        TimeSyncPacket32khz = CC1000TimeSyncMessageP;
+
+        TimeSyncAMSendMilli = CC1000TimeSyncMessageP;
+        TimeSyncPacketMilli = CC1000TimeSyncMessageP;
+
+        Packet = CC1000TimeSyncMessageP;
+        CC1000TimeSyncMessageP.SubSend -> CC1000ActiveMessageC.AMSend;
+        CC1000TimeSyncMessageP.SubPacket -> CC1000ActiveMessageC.Packet;
+        CC1000TimeSyncMessageP.PacketTimeStamp32khz -> CC1000ActiveMessageC;
+        CC1000TimeSyncMessageP.PacketTimeStampMilli -> CC1000ActiveMessageC;
+        CC1000TimeSyncMessageP.PacketTimeSyncOffset -> CC1000ActiveMessageC;
+
+        components Counter32khz32C,
+            new CounterToLocalTimeC(T32khz) as LocalTime32khzC, LocalTimeMilliC;
+        LocalTime32khzC.Counter -> Counter32khz32C;
+        CC1000TimeSyncMessageP.LocalTime32khz -> LocalTime32khzC;
+        CC1000TimeSyncMessageP.LocalTimeMilli -> LocalTimeMilliC;
+        CC1000TimeSyncMessageP.Leds -> LedsC;
+
+        SplitControl = CC1000ActiveMessageC;
+        Receive = CC1000ActiveMessageC.Receive;
+        Snoop = CC1000ActiveMessageC.Snoop;
+        AMPacket = CC1000ActiveMessageC;
+}
diff --git a/tos/chips/cc1000/CC1000TimeSyncMessageP.nc b/tos/chips/cc1000/CC1000TimeSyncMessageP.nc
new file mode 100644
index 00000000..74f46f39
--- /dev/null
+++ b/tos/chips/cc1000/CC1000TimeSyncMessageP.nc
@@ -0,0 +1,189 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti
+ * @author: Brano Kusy (CC2420 port)
+ * @author: Marco Langerwisch (CC1000 port)
+ */
+#include "CC1000TimeSyncMessage.h"
+
+module CC1000TimeSyncMessageP
+{
+    provides
+    {
+        interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[uint8_t id];
+        interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[uint8_t id];
+        interface Packet;
+
+        interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+        interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+    }
+
+    uses
+    {
+        interface AMSend as SubSend[uint8_t id];
+        interface Packet as SubPacket;
+
+        interface PacketTimeStamp<T32khz,uint32_t> as PacketTimeStamp32khz;
+        interface PacketTimeStamp<TMilli,uint32_t> as PacketTimeStampMilli;
+        interface PacketTimeSyncOffset;
+
+        interface LocalTime<T32khz> as LocalTime32khz;
+        interface LocalTime<TMilli> as LocalTimeMilli;
+        interface Leds;
+    }
+}
+
+implementation
+{
+    // TODO: change the Packet.payloadLength and Packet.maxPayloadLength commands to async
+    inline void* getFooter(message_t* msg)
+    {
+        // we use the payload length that we export (the smaller one)
+        return msg->data + call Packet.payloadLength(msg);
+    }
+
+/*----------------- Packet -----------------*/
+    command void Packet.clear(message_t* msg)
+    {
+        call PacketTimeSyncOffset.cancel(msg);
+        call SubPacket.clear(msg);
+    }
+
+    command void Packet.setPayloadLength(message_t* msg, uint8_t len)
+    {
+        call SubPacket.setPayloadLength(msg, len + sizeof(timesync_radio_t));
+    }
+
+    command uint8_t Packet.payloadLength(message_t* msg)
+    {
+        return call SubPacket.payloadLength(msg) - sizeof(timesync_radio_t);
+    }
+
+    command uint8_t Packet.maxPayloadLength()
+    {
+        return call SubPacket.maxPayloadLength() - sizeof(timesync_radio_t);
+    }
+
+    command void* Packet.getPayload(message_t* msg, uint8_t len)
+    {
+        return call SubPacket.getPayload(msg, len + sizeof(timesync_radio_t));
+    }
+
+/*----------------- TimeSyncAMSend32khz -----------------*/
+    command error_t TimeSyncAMSend32khz.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time)
+    {
+        error_t err;
+        timesync_radio_t* timesync = (timesync_radio_t*)(msg->data + len);
+        *timesync = event_time;
+
+        err = call SubSend.send[id](addr, msg, len + sizeof(timesync_radio_t));
+        call PacketTimeSyncOffset.set(msg);
+        return err;
+    }
+
+    command error_t TimeSyncAMSend32khz.cancel[am_id_t id](message_t* msg)
+    {
+        call PacketTimeSyncOffset.cancel(msg);
+        return call SubSend.cancel[id](msg);
+    }
+
+    default event void TimeSyncAMSend32khz.sendDone[am_id_t id](message_t* msg, error_t error) {}
+
+    command uint8_t TimeSyncAMSend32khz.maxPayloadLength[am_id_t id]()
+    {
+        return call SubSend.maxPayloadLength[id]() - sizeof(timesync_radio_t);
+    }
+
+    command void* TimeSyncAMSend32khz.getPayload[am_id_t id](message_t* msg, uint8_t len)
+    {
+        return call SubSend.getPayload[id](msg, len + sizeof(timesync_radio_t));
+    }
+
+/*----------------- TimeSyncAMSendMilli -----------------*/
+    command error_t TimeSyncAMSendMilli.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time)
+    {
+        // compute elapsed time in millisecond
+        event_time = ((event_time - call LocalTimeMilli.get()) << 5) + call LocalTime32khz.get();
+        return call TimeSyncAMSend32khz.send[id](addr, msg, len, event_time);
+    }
+
+    command error_t TimeSyncAMSendMilli.cancel[am_id_t id](message_t* msg)
+    {
+        return call TimeSyncAMSend32khz.cancel[id](msg);
+    }
+
+    default event void TimeSyncAMSendMilli.sendDone[am_id_t id](message_t* msg, error_t error){}
+
+    command uint8_t TimeSyncAMSendMilli.maxPayloadLength[am_id_t id]()
+    {
+        return call TimeSyncAMSend32khz.maxPayloadLength[id]();
+    }
+
+    command void* TimeSyncAMSendMilli.getPayload[am_id_t id](message_t* msg, uint8_t len)
+    {
+        return call TimeSyncAMSend32khz.getPayload[id](msg, len);
+    }
+
+/*----------------- SubSend.sendDone -------------------*/
+    event void SubSend.sendDone[am_id_t id](message_t* msg, error_t error)
+    {
+        signal TimeSyncAMSend32khz.sendDone[id](msg, error);
+        signal TimeSyncAMSendMilli.sendDone[id](msg, error);
+    }
+
+/*----------------- TimeSyncPacket32khz -----------------*/
+    command bool TimeSyncPacket32khz.isValid(message_t* msg)
+    {
+        timesync_radio_t* timesync = getFooter(msg);
+        return call PacketTimeStamp32khz.isValid(msg) && *timesync != CC1000_INVALID_TIMESTAMP;
+    }
+
+    command uint32_t TimeSyncPacket32khz.eventTime(message_t* msg)
+    {
+        timesync_radio_t* timesync = getFooter(msg);
+
+        return (uint32_t)(*timesync) + call PacketTimeStamp32khz.timestamp(msg);
+    }
+
+/*----------------- TimeSyncPacketMilli -----------------*/
+    command bool TimeSyncPacketMilli.isValid(message_t* msg)
+    {
+        timesync_radio_t* timesync = getFooter(msg);
+        return call PacketTimeStampMilli.isValid(msg) && *timesync != CC1000_INVALID_TIMESTAMP;
+    }
+
+    command uint32_t TimeSyncPacketMilli.eventTime(message_t* msg)
+    {
+        timesync_radio_t* timesync = getFooter(msg);
+        return ((int32_t)(*timesync) >> 5) + call PacketTimeStampMilli.timestamp(msg);
+    }
+}
diff --git a/tos/chips/cc1000/CsmaControl.nc b/tos/chips/cc1000/CsmaControl.nc
new file mode 100644
index 00000000..92b2ac28
--- /dev/null
+++ b/tos/chips/cc1000/CsmaControl.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**
+ * Interface for activating/deactivating congestion control.
+ *
+ * @author Philip Levis
+ * @author Joe Polastre
+ * @date   August 31 2005
+ */
+interface CsmaControl {
+  /**
+   * Enable congestion control.
+   * @return SUCCESS if congestion control enabled, FAIL otherwise.
+   */
+  async command error_t enableCca();
+
+  /**
+   * Disable congestion control.
+   * @return SUCCESS if congestion control disabled, FAIL otherwise.
+   */
+  async command error_t disableCca();
+}
diff --git a/tos/chips/cc1000/HplCC1000.nc b/tos/chips/cc1000/HplCC1000.nc
new file mode 100644
index 00000000..4037be22
--- /dev/null
+++ b/tos/chips/cc1000/HplCC1000.nc
@@ -0,0 +1,84 @@
+// $Id: HplCC1000.nc,v 1.6 2010-06-29 22:07:44 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ * Authors:		Jason Hill, David Gay, Philip Levis
+ * Date last modified:  6/25/02
+ *
+ *
+ */
+
+/**
+ * Low-level CC1000 radio-access operations that must be provided by a
+ * platform wishing to use this CC1000 implementation.
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ */
+
+
+interface HplCC1000 {
+  /**
+   * Initialize CC1K pins
+   */
+  command void init();
+
+  /**
+   * Write a value to a CC1000 register.
+   * @param addr Which CC1000 register
+   * @param data Value to write
+   */
+  async command void write(uint8_t addr, uint8_t data);
+
+  /**
+   * Read a value from a CC1000 register.
+   * @param addr Which CC1000 register
+   * @return Value of register
+   */
+  async command uint8_t read(uint8_t addr);
+
+  /**
+   * Read the state of the CHP_OUT pin
+   * @return State of CHP_OUT as a boolean (TRUE for high)
+   */
+  async command bool getLOCK();
+}
diff --git a/tos/chips/cc1000/HplCC1000Spi.nc b/tos/chips/cc1000/HplCC1000Spi.nc
new file mode 100644
index 00000000..93297a01
--- /dev/null
+++ b/tos/chips/cc1000/HplCC1000Spi.nc
@@ -0,0 +1,104 @@
+// $Id: HplCC1000Spi.nc,v 1.6 2010-06-29 22:07:44 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Interface to the CC1000 chip's serial bus. This isn't really an SPI,
+ * but the mica2 interface was done using the Atmega128 SPI hardware. Hence
+ * the name.
+ *
+ * @author Jaein Jeong
+ * @author Philip buonadonna
+ */
+interface HplCC1000Spi
+{
+  /**
+   * Write a byte to the CC1000 bus.
+   * @param data Byte to write.
+   */
+  async command void writeByte(uint8_t data);
+
+  /**
+   * Is write buffer busy with the last transmission?
+   * @return TRUE if the buffer is busy, FALSE otherwise.
+   */
+  async command bool isBufBusy();
+
+  /**
+   * Get the last byte received from the CC1000 bus.
+   * @return Last byte received.
+   */
+  async command uint8_t readByte();
+
+  /**
+   * Enable dataReady events on every byte sent or received from the CC1000
+   * bus. After this is called, dataReady events will be signaled every
+   * 8 CC1000 data clocks.
+   */
+  async command void enableIntr();
+
+  /**
+   * Disable CC1000 bus interrupts.
+   */
+  async command void disableIntr();
+
+  /**
+   * Initialise the interface to the CC1000 bus.
+   */
+  async command void initSlave();
+
+  /**
+   * Switch the interface to the CC1000 bus "transmit" mode.
+   */
+  async command void txMode();
+
+  /**
+   * Switch the interface to the CC1000 bus to "receive" mode.
+   */
+  async command void rxMode();
+
+  /**
+   * If enableIntr() is called, this event will be signaled every 8 CC1000
+   * data clocks. 
+   * @param data In "receive" mode, the last value received from the CC1000 
+   *   bus.
+   */
+  async event void dataReady(uint8_t data);
+}
diff --git a/tos/chips/cc1000/PacketTimeSyncOffset.nc b/tos/chips/cc1000/PacketTimeSyncOffset.nc
new file mode 100644
index 00000000..553430ef
--- /dev/null
+++ b/tos/chips/cc1000/PacketTimeSyncOffset.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti, Brano Kusy
+ *
+ * Interface for one hop time synchronization. Allows to modify timesync
+ * messages in the MAC layer with elapsed time of an event (ETA timesync
+ * primitive). Interface also provides a command to determine offset within
+ * a CC1000 packet, where the timesync ETA value is stored. word 'timestamping'
+ * used in describing commands does not refer to metadata.timestamp value,
+ * rather it refers to the timesync ETA timestamp which is part of data
+ * payload and is transmitted over the air.
+ */
+
+interface PacketTimeSyncOffset
+{
+    /**
+     * @param 'message_t *ONE msg' message to examine.
+     *
+     * Returns TRUE if the current message should be timestamped.
+     */
+    async command bool isSet(message_t* msg);
+
+    /**
+     * @param 'message_t *ONE msg' message to examine.
+     *
+     * Returns the offset of where the timesync timestamp is sotred in a
+     * CC2420 packet
+     */
+    async command uint8_t get(message_t* msg);
+
+    /**
+     * @param 'message_t *ONE msg' message to modify.
+     *
+     *  Sets the current message to be timestamped in the MAC layer.
+     */
+    async command void set(message_t* msg);
+
+    /**
+     * @param 'message_t *ONE msg' message to modify.
+     *
+     * Cancels any pending requests to timestamp the message in MAC.
+     */
+    async command void cancel(message_t* msg);
+}
+
diff --git a/tos/chips/cc2420/CC2420.h b/tos/chips/cc2420/CC2420.h
new file mode 100644
index 00000000..95523622
--- /dev/null
+++ b/tos/chips/cc2420/CC2420.h
@@ -0,0 +1,441 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @version $Revision: 1.19 $ $Date: 2009-09-17 23:36:36 $
+ */
+
+#ifndef __CC2420_H__
+#define __CC2420_H__
+
+typedef uint8_t cc2420_status_t;
+
+#if defined(TFRAMES_ENABLED) && defined(IEEE154FRAMES_ENABLED)
+#error "Both TFRAMES and IEEE154FRAMES enabled!"
+#endif
+
+/**
+ * CC2420 header definition.
+ * 
+ * An I-frame (interoperability frame) header has an extra network 
+ * byte specified by 6LowPAN
+ * 
+ * Length = length of the header + payload of the packet, minus the size
+ *   of the length byte itself (1).  This is what allows for variable 
+ *   length packets.
+ * 
+ * FCF = Frame Control Field, defined in the 802.15.4 specs and the
+ *   CC2420 datasheet.
+ *
+ * DSN = Data Sequence Number, a number incremented for each packet sent
+ *   by a particular node.  This is used in acknowledging that packet, 
+ *   and also filtering out duplicate packets.
+ *
+ * DestPan = The destination PAN (personal area network) ID, so your 
+ *   network can sit side by side with another TinyOS network and not
+ *   interfere.
+ * 
+ * Dest = The destination address of this packet. 0xFFFF is the broadcast
+ *   address.
+ *
+ * Src = The local node ID that generated the message.
+ * 
+ * Network = The TinyOS network ID, for interoperability with other types
+ *   of 802.15.4 networks. 
+ * 
+ * Type = TinyOS AM type.  When you create a new AMSenderC(AM_MYMSG), 
+ *   the AM_MYMSG definition is the type of packet.
+ * 
+ * TOSH_DATA_LENGTH defaults to 28, it represents the maximum size of 
+ * the payload portion of the packet, and is specified in the 
+ * tos/types/message.h file.
+ *
+ * All of these fields will be filled in automatically by the radio stack 
+ * when you attempt to send a message.
+ */
+/**
+ * CC2420 Security Header
+ */
+typedef nx_struct security_header_t {
+  nx_uint8_t secLevel:3;
+  nx_uint8_t keyMode:2;
+  nx_uint8_t reserved:3;
+  nx_uint32_t frameCounter;
+  nx_uint8_t keyID[1]; // One byte for now
+} security_header_t;
+
+typedef nx_struct cc2420_header_t {
+  nxle_uint8_t length;
+  nxle_uint16_t fcf;
+  nxle_uint8_t dsn;
+  nxle_uint16_t destpan;
+  nxle_uint16_t dest;
+  nxle_uint16_t src;
+  /** CC2420 802.15.4 header ends here */
+#ifdef CC2420_HW_SECURITY
+  security_header_t secHdr;
+#endif
+  
+#ifndef TFRAMES_ENABLED
+  /** I-Frame 6LowPAN interoperability byte */
+  nxle_uint8_t network;
+#endif
+
+  nxle_uint8_t type;
+} cc2420_header_t;
+
+/**
+ * CC2420 Packet Footer
+ */
+typedef nx_struct cc2420_footer_t {
+} cc2420_footer_t;
+
+/**
+ * CC2420 Packet metadata. Contains extra information about the message
+ * that will not be transmitted.
+ *
+ * Note that the first two bytes automatically take in the values of the
+ * FCS when the payload is full. Do not modify the first two bytes of metadata.
+ */
+typedef nx_struct cc2420_metadata_t {
+  nx_uint8_t rssi;
+  nx_uint8_t lqi;
+  nx_uint8_t tx_power;
+  nx_bool crc;
+  nx_bool ack;
+  nx_bool timesync;
+  nx_uint32_t timestamp;
+  nx_uint16_t rxInterval;
+
+  /** Packet Link Metadata */
+#ifdef PACKET_LINK
+  nx_uint16_t maxRetries;
+  nx_uint16_t retryDelay;
+#endif
+} cc2420_metadata_t;
+
+
+typedef nx_struct cc2420_packet_t {
+  cc2420_header_t packet;
+  nx_uint8_t data[];
+} cc2420_packet_t;
+
+
+#ifndef TOSH_DATA_LENGTH
+#define TOSH_DATA_LENGTH 28
+#endif
+
+#ifndef CC2420_DEF_CHANNEL
+#define CC2420_DEF_CHANNEL 26
+#endif
+
+#ifndef CC2420_DEF_RFPOWER
+#define CC2420_DEF_RFPOWER 31
+#endif
+
+/**
+ * Ideally, your receive history size should be equal to the number of
+ * RF neighbors your node will have
+ */
+#ifndef RECEIVE_HISTORY_SIZE
+#define RECEIVE_HISTORY_SIZE 4
+#endif
+
+/** 
+ * The 6LowPAN NALP ID for a TinyOS network is 63 (TEP 125).
+ */
+#ifndef TINYOS_6LOWPAN_NETWORK_ID
+#define TINYOS_6LOWPAN_NETWORK_ID 0x3f
+#endif
+
+enum {
+  // size of the header not including the length byte
+  MAC_HEADER_SIZE = sizeof( cc2420_header_t ) - 1,
+  // size of the footer (FCS field)
+  MAC_FOOTER_SIZE = sizeof( uint16_t ),
+  // MDU
+  MAC_PACKET_SIZE = MAC_HEADER_SIZE + TOSH_DATA_LENGTH + MAC_FOOTER_SIZE,
+
+  CC2420_SIZE = MAC_HEADER_SIZE + MAC_FOOTER_SIZE,
+};
+
+enum cc2420_enums {
+  CC2420_TIME_ACK_TURNAROUND = 7, // jiffies
+  CC2420_TIME_VREN = 20,          // jiffies
+  CC2420_TIME_SYMBOL = 2,         // 2 symbols / jiffy
+  CC2420_BACKOFF_PERIOD = ( 20 / CC2420_TIME_SYMBOL ), // symbols
+  CC2420_MIN_BACKOFF = ( 20 / CC2420_TIME_SYMBOL ),  // platform specific?
+  CC2420_ACK_WAIT_DELAY = 256,    // jiffies
+};
+
+enum cc2420_status_enums {
+  CC2420_STATUS_RSSI_VALID = 1 << 1,
+  CC2420_STATUS_LOCK = 1 << 2,
+  CC2420_STATUS_TX_ACTIVE = 1 << 3,
+  CC2420_STATUS_ENC_BUSY = 1 << 4,
+  CC2420_STATUS_TX_UNDERFLOW = 1 << 5,
+  CC2420_STATUS_XOSC16M_STABLE = 1 << 6,
+};
+
+enum cc2420_config_reg_enums {
+  CC2420_SNOP = 0x00,
+  CC2420_SXOSCON = 0x01,
+  CC2420_STXCAL = 0x02,
+  CC2420_SRXON = 0x03,
+  CC2420_STXON = 0x04,
+  CC2420_STXONCCA = 0x05,
+  CC2420_SRFOFF = 0x06,
+  CC2420_SXOSCOFF = 0x07,
+  CC2420_SFLUSHRX = 0x08,
+  CC2420_SFLUSHTX = 0x09,
+  CC2420_SACK = 0x0a,
+  CC2420_SACKPEND = 0x0b,
+  CC2420_SRXDEC = 0x0c,
+  CC2420_STXENC = 0x0d,
+  CC2420_SAES = 0x0e,
+  CC2420_MAIN = 0x10,
+  CC2420_MDMCTRL0 = 0x11,
+  CC2420_MDMCTRL1 = 0x12,
+  CC2420_RSSI = 0x13,
+  CC2420_SYNCWORD = 0x14,
+  CC2420_TXCTRL = 0x15,
+  CC2420_RXCTRL0 = 0x16,
+  CC2420_RXCTRL1 = 0x17,
+  CC2420_FSCTRL = 0x18,
+  CC2420_SECCTRL0 = 0x19,
+  CC2420_SECCTRL1 = 0x1a,
+  CC2420_BATTMON = 0x1b,
+  CC2420_IOCFG0 = 0x1c,
+  CC2420_IOCFG1 = 0x1d,
+  CC2420_MANFIDL = 0x1e,
+  CC2420_MANFIDH = 0x1f,
+  CC2420_FSMTC = 0x20,
+  CC2420_MANAND = 0x21,
+  CC2420_MANOR = 0x22,
+  CC2420_AGCCTRL = 0x23,
+  CC2420_AGCTST0 = 0x24,
+  CC2420_AGCTST1 = 0x25,
+  CC2420_AGCTST2 = 0x26,
+  CC2420_FSTST0 = 0x27,
+  CC2420_FSTST1 = 0x28,
+  CC2420_FSTST2 = 0x29,
+  CC2420_FSTST3 = 0x2a,
+  CC2420_RXBPFTST = 0x2b,
+  CC2420_FMSTATE = 0x2c,
+  CC2420_ADCTST = 0x2d,
+  CC2420_DACTST = 0x2e,
+  CC2420_TOPTST = 0x2f,
+  CC2420_TXFIFO = 0x3e,
+  CC2420_RXFIFO = 0x3f,
+};
+
+enum cc2420_ram_addr_enums {
+  CC2420_RAM_TXFIFO = 0x000,
+  CC2420_RAM_RXFIFO = 0x080,
+  CC2420_RAM_KEY0 = 0x100,
+  CC2420_RAM_RXNONCE = 0x110,
+  CC2420_RAM_SABUF = 0x120,
+  CC2420_RAM_KEY1 = 0x130,
+  CC2420_RAM_TXNONCE = 0x140,
+  CC2420_RAM_CBCSTATE = 0x150,
+  CC2420_RAM_IEEEADR = 0x160,
+  CC2420_RAM_PANID = 0x168,
+  CC2420_RAM_SHORTADR = 0x16a,
+};
+
+enum cc2420_nonce_enums {
+  CC2420_NONCE_BLOCK_COUNTER = 0,
+  CC2420_NONCE_KEY_SEQ_COUNTER = 2,
+  CC2420_NONCE_FRAME_COUNTER = 3,
+  CC2420_NONCE_SOURCE_ADDRESS = 7,
+  CC2420_NONCE_FLAGS = 15,
+};
+
+enum cc2420_main_enums {
+  CC2420_MAIN_RESETn = 15,
+  CC2420_MAIN_ENC_RESETn = 14,
+  CC2420_MAIN_DEMOD_RESETn = 13,
+  CC2420_MAIN_MOD_RESETn = 12,
+  CC2420_MAIN_FS_RESETn = 11,
+  CC2420_MAIN_XOSC16M_BYPASS = 0,
+};
+
+enum cc2420_mdmctrl0_enums {
+  CC2420_MDMCTRL0_RESERVED_FRAME_MODE = 13,
+  CC2420_MDMCTRL0_PAN_COORDINATOR = 12,
+  CC2420_MDMCTRL0_ADR_DECODE = 11,
+  CC2420_MDMCTRL0_CCA_HYST = 8,
+  CC2420_MDMCTRL0_CCA_MOD = 6,
+  CC2420_MDMCTRL0_AUTOCRC = 5,
+  CC2420_MDMCTRL0_AUTOACK = 4,
+  CC2420_MDMCTRL0_PREAMBLE_LENGTH = 0,
+};
+
+enum cc2420_mdmctrl1_enums {
+  CC2420_MDMCTRL1_CORR_THR = 6,
+  CC2420_MDMCTRL1_DEMOD_AVG_MODE = 5,
+  CC2420_MDMCTRL1_MODULATION_MODE = 4,
+  CC2420_MDMCTRL1_TX_MODE = 2,
+  CC2420_MDMCTRL1_RX_MODE = 0,
+};
+
+enum cc2420_rssi_enums {
+  CC2420_RSSI_CCA_THR = 8,
+  CC2420_RSSI_RSSI_VAL = 0,
+};
+
+enum cc2420_syncword_enums {
+  CC2420_SYNCWORD_SYNCWORD = 0,
+};
+
+enum cc2420_txctrl_enums {
+  CC2420_TXCTRL_TXMIXBUF_CUR = 14,
+  CC2420_TXCTRL_TX_TURNAROUND = 13,
+  CC2420_TXCTRL_TXMIX_CAP_ARRAY = 11,
+  CC2420_TXCTRL_TXMIX_CURRENT = 9,
+  CC2420_TXCTRL_PA_CURRENT = 6,
+  CC2420_TXCTRL_RESERVED = 5,
+  CC2420_TXCTRL_PA_LEVEL = 0,
+};
+
+enum cc2420_rxctrl0_enums {
+  CC2420_RXCTRL0_RXMIXBUF_CUR = 12,
+  CC2420_RXCTRL0_HIGH_LNA_GAIN = 10,
+  CC2420_RXCTRL0_MED_LNA_GAIN = 8,
+  CC2420_RXCTRL0_LOW_LNA_GAIN = 6,
+  CC2420_RXCTRL0_HIGH_LNA_CURRENT = 4,
+  CC2420_RXCTRL0_MED_LNA_CURRENT = 2,
+  CC2420_RXCTRL0_LOW_LNA_CURRENT = 0,
+};
+
+enum cc2420_rxctrl1_enums {
+  CC2420_RXCTRL1_RXBPF_LOCUR = 13,
+  CC2420_RXCTRL1_RXBPF_MIDCUR = 12,
+  CC2420_RXCTRL1_LOW_LOWGAIN = 11,
+  CC2420_RXCTRL1_MED_LOWGAIN = 10,
+  CC2420_RXCTRL1_HIGH_HGM = 9,
+  CC2420_RXCTRL1_MED_HGM = 8,
+  CC2420_RXCTRL1_LNA_CAP_ARRAY = 6,
+  CC2420_RXCTRL1_RXMIX_TAIL = 4,
+  CC2420_RXCTRL1_RXMIX_VCM = 2,
+  CC2420_RXCTRL1_RXMIX_CURRENT = 0,
+};
+
+enum cc2420_rsctrl_enums {
+  CC2420_FSCTRL_LOCK_THR = 14,
+  CC2420_FSCTRL_CAL_DONE = 13,
+  CC2420_FSCTRL_CAL_RUNNING = 12,
+  CC2420_FSCTRL_LOCK_LENGTH = 11,
+  CC2420_FSCTRL_LOCK_STATUS = 10,
+  CC2420_FSCTRL_FREQ = 0,
+};
+
+enum cc2420_secctrl0_enums {
+  CC2420_SECCTRL0_RXFIFO_PROTECTION = 9,
+  CC2420_SECCTRL0_SEC_CBC_HEAD = 8,
+  CC2420_SECCTRL0_SEC_SAKEYSEL = 7,
+  CC2420_SECCTRL0_SEC_TXKEYSEL = 6,
+  CC2420_SECCTRL0_SEC_RXKEYSEL = 5,
+  CC2420_SECCTRL0_SEC_M = 2,
+  CC2420_SECCTRL0_SEC_MODE = 0,
+};
+
+enum cc2420_secctrl1_enums {
+  CC2420_SECCTRL1_SEC_TXL = 8,
+  CC2420_SECCTRL1_SEC_RXL = 0,
+};
+
+enum cc2420_battmon_enums {
+  CC2420_BATTMON_BATT_OK = 6,
+  CC2420_BATTMON_BATTMON_EN = 5,
+  CC2420_BATTMON_BATTMON_VOLTAGE = 0,
+};
+
+enum cc2420_iocfg0_enums {
+  CC2420_IOCFG0_BCN_ACCEPT = 11,
+  CC2420_IOCFG0_FIFO_POLARITY = 10,
+  CC2420_IOCFG0_FIFOP_POLARITY = 9,
+  CC2420_IOCFG0_SFD_POLARITY = 8,
+  CC2420_IOCFG0_CCA_POLARITY = 7,
+  CC2420_IOCFG0_FIFOP_THR = 0,
+};
+
+enum cc2420_iocfg1_enums {
+  CC2420_IOCFG1_HSSD_SRC = 10,
+  CC2420_IOCFG1_SFDMUX = 5,
+  CC2420_IOCFG1_CCAMUX = 0,
+};
+
+enum cc2420_manfidl_enums {
+  CC2420_MANFIDL_PARTNUM = 12,
+  CC2420_MANFIDL_MANFID = 0,
+};
+
+enum cc2420_manfidh_enums {
+  CC2420_MANFIDH_VERSION = 12,
+  CC2420_MANFIDH_PARTNUM = 0,
+};
+
+enum cc2420_fsmtc_enums {
+  CC2420_FSMTC_TC_RXCHAIN2RX = 13,
+  CC2420_FSMTC_TC_SWITCH2TX = 10,
+  CC2420_FSMTC_TC_PAON2TX = 6,
+  CC2420_FSMTC_TC_TXEND2SWITCH = 3,
+  CC2420_FSMTC_TC_TXEND2PAOFF = 0,
+};
+
+enum cc2420_sfdmux_enums {
+  CC2420_SFDMUX_SFD = 0,
+  CC2420_SFDMUX_XOSC16M_STABLE = 24,
+};
+
+enum cc2420_security_enums{
+  CC2420_NO_SEC = 0,
+  CC2420_CBC_MAC = 1,
+  CC2420_CTR = 2,
+  CC2420_CCM = 3,
+  NO_SEC = 0,
+  CBC_MAC_4 = 1,
+  CBC_MAC_8 = 2,
+  CBC_MAC_16 = 3,
+  CTR = 4,
+  CCM_4 = 5,
+  CCM_8 = 6,
+  CCM_16 = 7
+};
+norace uint8_t SECURITYLOCK = 0;
+
+enum
+{
+  CC2420_INVALID_TIMESTAMP  = 0x80000000L,
+};
+
+#endif
diff --git a/tos/chips/cc2420/CC2420ActiveMessageC.nc b/tos/chips/cc2420/CC2420ActiveMessageC.nc
new file mode 100644
index 00000000..3a4d11b2
--- /dev/null
+++ b/tos/chips/cc2420/CC2420ActiveMessageC.nc
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The Active Message layer for the CC2420 radio. This configuration
+ * just layers the AM dispatch (CC2420ActiveMessageM) on top of the
+ * underlying CC2420 radio packet (CC2420CsmaCsmaCC), which is
+ * inherently an AM packet (acknowledgements based on AM destination
+ * addr and group). Note that snooping may not work, due to CC2420
+ * early packet rejection if acknowledgements are enabled.
+ *
+ * @author Philip Levis
+ * @author David Moss
+ * @version $Revision: 1.16 $ $Date: 2010-06-29 22:07:44 $
+ */
+
+#include "CC2420.h"
+#include "AM.h"
+#include "Ieee154.h"
+
+#ifdef IEEE154FRAMES_ENABLED
+#error "CC2420 AM layer cannot work when IEEE 802.15.4 frames only are used"
+#endif
+
+configuration CC2420ActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface CC2420Packet;
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+    interface RadioBackoff[am_id_t amId];
+    interface LowPowerListening;
+    interface PacketLink;
+    interface SendNotifier[am_id_t amId];
+  }
+}
+implementation {
+  enum {
+    CC2420_AM_SEND_ID     = unique(RADIO_SEND_RESOURCE),
+  };
+
+  components CC2420RadioC as Radio;
+  components CC2420ActiveMessageP as AM;
+  components ActiveMessageAddressC;
+  components CC2420CsmaC as CsmaC;
+  components CC2420ControlC;
+  components CC2420PacketC;
+  
+  SplitControl = Radio;
+  RadioBackoff = AM;
+  Packet = AM;
+  AMSend = AM;
+  SendNotifier = AM;
+  Receive = AM.Receive;
+  Snoop = AM.Snoop;
+  AMPacket = AM;
+  PacketLink = Radio;
+  LowPowerListening = Radio;
+  CC2420Packet = Radio;
+  PacketAcknowledgements = Radio;
+  LinkPacketMetadata = Radio;
+  
+  // Radio resource for the AM layer
+  AM.RadioResource -> Radio.Resource[CC2420_AM_SEND_ID];
+  AM.SubSend -> Radio.ActiveSend;
+  AM.SubReceive -> Radio.ActiveReceive;
+
+  AM.ActiveMessageAddress -> ActiveMessageAddressC;
+  AM.CC2420Packet -> CC2420PacketC;
+  AM.CC2420PacketBody -> CC2420PacketC;
+  AM.CC2420Config -> CC2420ControlC;
+  
+  AM.SubBackoff -> CsmaC;
+
+  components LedsC;
+  AM.Leds -> LedsC;
+}
diff --git a/tos/chips/cc2420/CC2420ActiveMessageP.nc b/tos/chips/cc2420/CC2420ActiveMessageP.nc
new file mode 100644
index 00000000..d97e6b6b
--- /dev/null
+++ b/tos/chips/cc2420/CC2420ActiveMessageP.nc
@@ -0,0 +1,305 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ * Active message implementation on top of the CC2420 radio. This
+ * implementation uses the 16-bit addressing mode of 802.15.4: the
+ * only additional byte it adds is the AM id byte, as the first byte
+ * of the data payload.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.22 $ $Date: 2010-06-29 22:07:44 $
+ */
+
+#include <Ieee154.h> 
+#include "CC2420.h"
+
+module CC2420ActiveMessageP @safe() {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface SendNotifier[am_id_t id];
+    interface RadioBackoff[am_id_t id];
+  }
+  
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    interface CC2420Packet;
+    interface CC2420PacketBody;
+    interface CC2420Config;
+    interface ActiveMessageAddress;
+    interface RadioBackoff as SubBackoff;
+
+    interface Resource as RadioResource;
+    interface Leds;
+  }
+}
+implementation {
+  uint16_t pending_length;
+  message_t *pending_message = NULL;
+  /***************** Resource event  ****************/
+  event void RadioResource.granted() {
+    uint8_t rc;
+    cc2420_header_t* header = call CC2420PacketBody.getHeader( pending_message );
+
+    signal SendNotifier.aboutToSend[header->type](header->dest, pending_message);
+    rc = call SubSend.send( pending_message, pending_length );
+    if (rc != SUCCESS) {
+      call RadioResource.release();
+      signal AMSend.sendDone[header->type]( pending_message, rc );
+    }
+  }
+
+  /***************** AMSend Commands ****************/
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+					  message_t* msg,
+					  uint8_t len) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader( msg );
+    
+    if (len > call Packet.maxPayloadLength()) {
+      return ESIZE;
+    }
+    
+    header->type = id;
+    header->dest = addr;
+    header->destpan = call CC2420Config.getPanAddr();
+    header->src = call AMPacket.address();
+    header->fcf |= ( 1 << IEEE154_FCF_INTRAPAN ) |
+      ( IEEE154_ADDR_SHORT << IEEE154_FCF_DEST_ADDR_MODE ) |
+      ( IEEE154_ADDR_SHORT << IEEE154_FCF_SRC_ADDR_MODE ) ;
+    header->length = len + CC2420_SIZE;
+    
+    if (call RadioResource.immediateRequest() == SUCCESS) {
+      error_t rc;
+      signal SendNotifier.aboutToSend[id](addr, msg);
+      
+      rc = call SubSend.send( msg, len );
+      if (rc != SUCCESS) {
+        call RadioResource.release();
+      }
+
+      return rc;
+    } else {
+      pending_length  = len;
+      pending_message = msg;
+      return call RadioResource.request();
+    }
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  /***************** AMPacket Commands ****************/
+  command am_addr_t AMPacket.address() {
+    return call ActiveMessageAddress.amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg);
+    return header->dest;
+  }
+ 
+  command am_addr_t AMPacket.source(message_t* amsg) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg);
+    return header->src;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg);
+    header->dest = addr;
+  }
+
+  command void AMPacket.setSource(message_t* amsg, am_addr_t addr) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg);
+    header->src = addr;
+  }
+
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+	    call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t type) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg);
+    header->type = type;
+  }
+  
+  command am_group_t AMPacket.group(message_t* amsg) {
+    return (call CC2420PacketBody.getHeader(amsg))->destpan;
+  }
+
+  command void AMPacket.setGroup(message_t* amsg, am_group_t grp) {
+    // Overridden intentionally when we send()
+    (call CC2420PacketBody.getHeader(amsg))->destpan = grp;
+  }
+
+  command am_group_t AMPacket.localGroup() {
+    return call CC2420Config.getPanAddr();
+  }
+  
+
+  /***************** Packet Commands ****************/
+  command void Packet.clear(message_t* msg) {
+    memset(call CC2420PacketBody.getHeader(msg), 0x0, sizeof(cc2420_header_t));
+    memset(call CC2420PacketBody.getMetadata(msg), 0x0, sizeof(cc2420_metadata_t));
+  }
+  
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return (call CC2420PacketBody.getHeader(msg))->length - CC2420_SIZE;
+  }
+  
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    (call CC2420PacketBody.getHeader(msg))->length  = len + CC2420_SIZE;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return call SubSend.maxPayloadLength();
+  }
+  
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    return call SubSend.getPayload(msg, len);
+  }
+
+  
+  /***************** SubSend Events ****************/
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    call RadioResource.release();
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+  
+  /***************** SubReceive Events ****************/
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    
+    if (call AMPacket.isForMe(msg)) {
+      return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+    else {
+      return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+  }
+  
+
+  /***************** ActiveMessageAddress Events ****************/
+  async event void ActiveMessageAddress.changed() {
+  }
+  
+  /***************** CC2420Config Events ****************/
+  event void CC2420Config.syncDone( error_t error ) {
+  }
+  
+  
+  /***************** RadioBackoff ***********************/
+
+  async event void SubBackoff.requestInitialBackoff(message_t *msg) {
+    signal RadioBackoff.requestInitialBackoff[(TCAST(cc2420_header_t* ONE,
+        (uint8_t*)msg + offsetof(message_t, data) - sizeof(cc2420_header_t)))->type](msg);
+  }
+
+  async event void SubBackoff.requestCongestionBackoff(message_t *msg) {
+    signal RadioBackoff.requestCongestionBackoff[(TCAST(cc2420_header_t* ONE,
+        (uint8_t*)msg + offsetof(message_t, data) - sizeof(cc2420_header_t)))->type](msg);
+  }
+  async event void SubBackoff.requestCca(message_t *msg) {
+    // Lower layers than this do not configure the CCA settings
+    signal RadioBackoff.requestCca[(TCAST(cc2420_header_t* ONE,
+        (uint8_t*)msg + offsetof(message_t, data) - sizeof(cc2420_header_t)))->type](msg);
+  }
+
+  async command void RadioBackoff.setInitialBackoff[am_id_t amId](uint16_t backoffTime) {
+    call SubBackoff.setInitialBackoff(backoffTime);
+  }
+  
+  /**
+   * Must be called within a requestCongestionBackoff event
+   * @param backoffTime the amount of time in some unspecified units to backoff
+   */
+  async command void RadioBackoff.setCongestionBackoff[am_id_t amId](uint16_t backoffTime) {
+    call SubBackoff.setCongestionBackoff(backoffTime);
+  }
+
+      
+  /**
+   * Enable CCA for the outbound packet.  Must be called within a requestCca
+   * event
+   * @param ccaOn TRUE to enable CCA, which is the default.
+   */
+  async command void RadioBackoff.setCca[am_id_t amId](bool useCca) {
+    call SubBackoff.setCca(useCca);
+  }
+  
+  /***************** Defaults ****************/
+  default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+  default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+    call RadioResource.release();
+  }
+
+  default event void SendNotifier.aboutToSend[am_id_t amId](am_addr_t addr, message_t *msg) {
+  }
+  default async event void RadioBackoff.requestInitialBackoff[am_id_t id](
+      message_t *msg) {
+  }
+
+  default async event void RadioBackoff.requestCongestionBackoff[am_id_t id](
+      message_t *msg) {
+  }
+  
+  default async event void RadioBackoff.requestCca[am_id_t id](
+      message_t *msg) {
+  }
+  
+}
diff --git a/tos/chips/cc2420/CC2420Ieee154MessageC.nc b/tos/chips/cc2420/CC2420Ieee154MessageC.nc
new file mode 100644
index 00000000..9dd7aa15
--- /dev/null
+++ b/tos/chips/cc2420/CC2420Ieee154MessageC.nc
@@ -0,0 +1,130 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/*									tab:4
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * IEEE 802.15.4 layer for the cc2420.  Provides a simplistic 
+ *       link layer with dispatching on the 6lowpan "network" field
+ *
+ * @author Philip Levis
+ * @author David Moss
+ * @author Stephen Dawson-Haggerty
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:44 $
+ */
+
+#include "CC2420.h"
+#ifdef TFRAMES_ENABLED
+#error "The CC2420 Ieee 802.15.4 layer does not work with TFRAMES"
+#endif
+
+configuration CC2420Ieee154MessageC {
+  provides {
+    interface SplitControl;
+
+    interface Resource as SendResource[uint8_t clientId];
+    interface Ieee154Send;
+    interface Receive as Ieee154Receive;
+
+    interface Ieee154Packet;
+    interface Packet;
+
+    interface CC2420Packet;
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+    interface LowPowerListening;
+    interface CC2420Config;
+    interface PacketLink;
+  }
+}
+implementation {
+
+  components CC2420RadioC as Radio;
+  components CC2420Ieee154MessageP as Msg;
+  components CC2420PacketC;
+  components CC2420ControlC;
+
+  SendResource = Radio.Resource;
+  Ieee154Receive = Msg;
+  Ieee154Send = Msg;
+  Ieee154Packet = Msg;
+  Packet = Msg;
+  CC2420Packet = CC2420PacketC;
+
+  SplitControl = Radio;
+  CC2420Packet = Radio;
+  PacketAcknowledgements = Radio;
+  LinkPacketMetadata = Radio;
+  LowPowerListening = Radio;
+  CC2420Config = CC2420ControlC;
+  PacketLink = Radio;
+
+  Msg.SubSend -> Radio.BareSend;
+  Msg.SubReceive -> Radio.BareReceive;
+#ifdef CC2420_IEEE154_RESOURCE_SEND
+  Msg.Resource -> Radio.Resource[unique(RADIO_SEND_RESOURCE)];
+#endif
+
+  Msg.CC2420Packet -> CC2420PacketC;
+  Msg.CC2420PacketBody -> CC2420PacketC;
+  Msg.CC2420Config -> CC2420ControlC;
+
+}
diff --git a/tos/chips/cc2420/CC2420Ieee154MessageP.nc b/tos/chips/cc2420/CC2420Ieee154MessageP.nc
new file mode 100644
index 00000000..96195687
--- /dev/null
+++ b/tos/chips/cc2420/CC2420Ieee154MessageP.nc
@@ -0,0 +1,246 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/*									tab:4
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ *
+ * @author Stephen Dawson-Haggerty
+ * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:44 $
+ */
+ 
+#include "CC2420.h"
+#include "IEEE802154.h"
+
+module CC2420Ieee154MessageP {
+
+  provides {
+    interface Ieee154Send;
+    interface Receive as Ieee154Receive;
+    interface Ieee154Packet;
+    interface Packet;
+  }
+  
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    interface CC2420Packet;
+    interface CC2420PacketBody;
+    interface CC2420Config;
+#ifdef CC2420_IEEE154_RESOURCE_SEND
+    interface Resource;
+#endif
+  }
+}
+implementation {
+  message_t *m_pending_msg;
+  enum {
+    EXTRA_OVERHEAD = sizeof(cc2420_header_t) - offsetof(cc2420_header_t, network),
+  };
+
+  /***************** Ieee154Send Commands ****************/
+  command error_t Ieee154Send.send(ieee154_saddr_t addr,
+                                   message_t* msg,
+                                   uint8_t len) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader( msg );
+
+    header->length = len + CC2420_SIZE - EXTRA_OVERHEAD;
+    header->dest = addr;
+    header->destpan = call CC2420Config.getPanAddr();
+    header->src = call CC2420Config.getShortAddr();
+    header->fcf = ( 1 << IEEE154_FCF_INTRAPAN ) |
+      ( IEEE154_ADDR_SHORT << IEEE154_FCF_DEST_ADDR_MODE ) |
+      ( IEEE154_ADDR_SHORT << IEEE154_FCF_SRC_ADDR_MODE ) ;
+
+#ifdef CC2420_IEEE154_RESOURCE_SEND
+    if (call Resource.isOwner())
+      return EBUSY;
+
+    if (call Resource.immediateRequest() == SUCCESS) {
+      error_t rc;
+      rc = call SubSend.send( msg, header->length - 1 );
+      if (rc != SUCCESS) {
+        call Resource.release();
+      }
+      return rc;
+    } else {
+      m_pending_msg = msg;
+      return call Resource.request();
+    }
+#else
+    return call SubSend.send( msg, header->length - 1 );
+#endif
+  }
+
+#ifdef CC2420_IEEE154_RESOURCE_SEND
+  event void Resource.granted() {
+    error_t rc;
+    cc2420_header_t* header = call CC2420PacketBody.getHeader( m_pending_msg );
+    rc = call SubSend.send(m_pending_msg, header->length - 1);
+    if (rc != SUCCESS) {
+      call Resource.release();
+      signal Ieee154Send.sendDone(m_pending_msg, rc);
+    }
+  }
+#endif
+
+  command error_t Ieee154Send.cancel(message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  command uint8_t Ieee154Send.maxPayloadLength() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* Ieee154Send.getPayload(message_t* m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  event message_t *SubReceive.receive(message_t *msg, void *payload, uint8_t len) {
+    return signal Ieee154Receive.receive(msg,
+                                         call Packet.getPayload(msg, 0),
+                                         call Packet.payloadLength(msg));
+  }
+
+  /***************** Ieee154Packet Commands ****************/
+  command ieee154_saddr_t Ieee154Packet.address() {
+    return call CC2420Config.getShortAddr();
+  }
+ 
+  command ieee154_saddr_t Ieee154Packet.destination(message_t* msg) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(msg);
+    return header->dest;
+  }
+ 
+  command ieee154_saddr_t Ieee154Packet.source(message_t* msg) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(msg);
+    return header->src;
+  }
+
+  command void Ieee154Packet.setDestination(message_t* msg, ieee154_saddr_t addr) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(msg);
+    header->dest = addr;
+  }
+
+  command void Ieee154Packet.setSource(message_t* msg, ieee154_saddr_t addr) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(msg);
+    header->src = addr;
+  }
+
+  command bool Ieee154Packet.isForMe(message_t* msg) {
+    return (call Ieee154Packet.destination(msg) == call Ieee154Packet.address() ||
+	    call Ieee154Packet.destination(msg) == IEEE154_BROADCAST_ADDR);
+  }
+
+  command ieee154_panid_t Ieee154Packet.pan(message_t* msg) {
+    return (call CC2420PacketBody.getHeader(msg))->destpan;
+  }
+
+  command void Ieee154Packet.setPan(message_t* msg, ieee154_panid_t grp) {
+    // Overridden intentionally when we send()
+    (call CC2420PacketBody.getHeader(msg))->destpan = grp;
+  }
+
+  command ieee154_panid_t Ieee154Packet.localPan() {
+    return call CC2420Config.getPanAddr();
+  }
+
+
+  /***************** Packet Commands ****************/
+  command void Packet.clear(message_t* msg) {
+    memset(call CC2420PacketBody.getHeader(msg), sizeof(cc2420_header_t) - EXTRA_OVERHEAD, 0);
+    memset(call CC2420PacketBody.getMetadata(msg), sizeof(cc2420_metadata_t), 0);
+  }
+  
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return (call CC2420PacketBody.getHeader(msg))->length - CC2420_SIZE + EXTRA_OVERHEAD;
+  }
+  
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    (call CC2420PacketBody.getHeader(msg))->length  = len + CC2420_SIZE - EXTRA_OVERHEAD;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return TOSH_DATA_LENGTH + EXTRA_OVERHEAD;
+  }
+  
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    return msg->data - EXTRA_OVERHEAD;
+  }
+
+  
+  /***************** SubSend Events ****************/
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+#ifdef CC2420_IEEE154_RESOURCE_SEND
+    call Resource.release();
+#endif
+    signal Ieee154Send.sendDone(msg, result);
+  }
+
+  /***************** CC2420Config Events ****************/
+  event void CC2420Config.syncDone( error_t error ) {
+  }
+
+  default event void Ieee154Send.sendDone(message_t *msg, error_t e) {
+
+  }
+}
diff --git a/tos/chips/cc2420/CC2420RadioC.nc b/tos/chips/cc2420/CC2420RadioC.nc
new file mode 100644
index 00000000..5bbcc086
--- /dev/null
+++ b/tos/chips/cc2420/CC2420RadioC.nc
@@ -0,0 +1,111 @@
+/*
+ * "Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose, without fee, and without written
+ * agreement is hereby granted, provided that the above copyright
+ * notice, the following two paragraphs and the author appear in all
+ * copies of this software.
+ * 
+ * IN NO EVENT SHALL STANFORD UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
+ * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN
+ * IF STANFORD UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ * 
+ * STANFORD UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE
+ * PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND STANFORD UNIVERSITY
+ * HAS NO OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
+ * ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Radio wiring for the CC2420.  This layer seperates the common
+ * wiring of the lower-layer components of the CC2420 stack and makes
+ * them available to clients like the AM stack and the IEEE802.15.4
+ * stack.
+ *
+ * This component provides the highest-level internal interface to
+ * other components of the CC2420 stack.
+ *
+ * @author Philip Levis
+ * @author David Moss
+ * @author Stephen Dawson-Haggerty
+ * @version $Revision: 1.2 $ $Date: 2009/08/20 01:37:44 $
+ */
+
+#include "CC2420.h"
+
+configuration CC2420RadioC {
+  provides {
+    interface SplitControl;
+
+    interface Resource[uint8_t clientId];
+    interface Send as BareSend;
+    interface Receive as BareReceive;
+    interface Packet as BarePacket;
+
+    interface Send    as ActiveSend;
+    interface Receive as ActiveReceive;
+
+    interface CC2420Packet;
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+    interface LowPowerListening;
+    interface PacketLink;
+
+  }
+}
+implementation {
+
+  components CC2420CsmaC as CsmaC;
+  components UniqueSendC;
+  components UniqueReceiveC;
+  components CC2420TinyosNetworkC;
+  components CC2420PacketC;
+  components CC2420ControlC;
+  
+#if defined(LOW_POWER_LISTENING) || defined(ACK_LOW_POWER_LISTENING)
+  components DefaultLplC as LplC;
+#else
+  components DummyLplC as LplC;
+#endif
+
+#if defined(PACKET_LINK)
+  components PacketLinkC as LinkC;
+#else
+  components PacketLinkDummyC as LinkC;
+#endif
+  
+  PacketLink = LinkC;
+  LowPowerListening = LplC;
+  CC2420Packet = CC2420PacketC;
+  PacketAcknowledgements = CC2420PacketC;
+  LinkPacketMetadata = CC2420PacketC;
+  
+  Resource = CC2420TinyosNetworkC;
+  BareSend = CC2420TinyosNetworkC.Send;
+  BareReceive = CC2420TinyosNetworkC.Receive;
+  BarePacket = CC2420TinyosNetworkC.BarePacket;
+  
+  ActiveSend = CC2420TinyosNetworkC.ActiveSend;
+  ActiveReceive = CC2420TinyosNetworkC.ActiveReceive;
+
+  // SplitControl Layers
+  SplitControl = LplC;
+  LplC.SubControl -> CsmaC;
+  
+  // Send Layers
+  CC2420TinyosNetworkC.SubSend -> UniqueSendC;
+  UniqueSendC.SubSend -> LinkC;
+  LinkC.SubSend -> LplC.Send;
+  LplC.SubSend -> CsmaC;
+  
+  // Receive Layers
+  CC2420TinyosNetworkC.SubReceive -> LplC;
+  LplC.SubReceive -> UniqueReceiveC.Receive;
+  UniqueReceiveC.SubReceive ->  CsmaC;
+  
+}
diff --git a/tos/chips/cc2420/CC2420TimeSyncMessage.h b/tos/chips/cc2420/CC2420TimeSyncMessage.h
new file mode 100644
index 00000000..c5c7d5a6
--- /dev/null
+++ b/tos/chips/cc2420/CC2420TimeSyncMessage.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __TIMESYNCMESSAGE_H__
+#define __TIMESYNCMESSAGE_H__
+
+#ifndef AM_TIMESYNCMSG
+#define AM_TIMESYNCMSG 0x3D
+#endif
+
+// this value is sent in the air
+typedef nx_uint32_t timesync_radio_t;
+
+typedef nx_struct timesync_footer_t
+{
+	nx_am_id_t type;
+  timesync_radio_t timestamp;
+} timesync_footer_t;
+
+
+#endif//__TIMESYNCMESSAGE_H__
diff --git a/tos/chips/cc2420/CC2420TimeSyncMessageC.nc b/tos/chips/cc2420/CC2420TimeSyncMessageC.nc
new file mode 100644
index 00000000..98a9c0e4
--- /dev/null
+++ b/tos/chips/cc2420/CC2420TimeSyncMessageC.nc
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The Active Message layer for the CC2420 radio with timesync support. This
+ * configuration is just layer above CC2420ActiveMessageC that supports
+ * TimeSyncPacket and TimeSyncAMSend interfaces (TEP 133)
+ *
+ * @author: Miklos Maroti
+ * @author: Brano Kusy (CC2420 port)
+ */
+
+#include <Timer.h>
+#include <AM.h>
+#include "CC2420TimeSyncMessage.h"
+
+configuration CC2420TimeSyncMessageC
+{
+    provides
+    {
+        interface SplitControl;
+        interface Receive[am_id_t id];
+        interface Receive as Snoop[am_id_t id];
+        interface Packet;
+        interface AMPacket;
+        interface PacketAcknowledgements;
+        interface LowPowerListening;
+    
+        interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[am_id_t id];
+        interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+
+        interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+        interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+    }
+}
+
+implementation
+{
+        components CC2420TimeSyncMessageP, CC2420ActiveMessageC, CC2420PacketC, LedsC;
+
+        TimeSyncAMSend32khz = CC2420TimeSyncMessageP;
+        TimeSyncPacket32khz = CC2420TimeSyncMessageP;
+
+        TimeSyncAMSendMilli = CC2420TimeSyncMessageP;
+        TimeSyncPacketMilli = CC2420TimeSyncMessageP;
+
+        Packet = CC2420TimeSyncMessageP;
+        // use the AMSenderC infrastructure to avoid concurrent send clashes
+        components new AMSenderC(AM_TIMESYNCMSG);
+        CC2420TimeSyncMessageP.SubSend -> AMSenderC;
+      	CC2420TimeSyncMessageP.SubAMPacket -> AMSenderC;
+        CC2420TimeSyncMessageP.SubPacket -> AMSenderC;
+
+        CC2420TimeSyncMessageP.PacketTimeStamp32khz -> CC2420PacketC;
+        CC2420TimeSyncMessageP.PacketTimeStampMilli -> CC2420PacketC;
+        CC2420TimeSyncMessageP.PacketTimeSyncOffset -> CC2420PacketC;
+        components Counter32khz32C, new CounterToLocalTimeC(T32khz) as LocalTime32khzC, LocalTimeMilliC;
+        LocalTime32khzC.Counter -> Counter32khz32C;
+        CC2420TimeSyncMessageP.LocalTime32khz -> LocalTime32khzC;
+        CC2420TimeSyncMessageP.LocalTimeMilli -> LocalTimeMilliC;
+        CC2420TimeSyncMessageP.Leds -> LedsC;
+
+        components ActiveMessageC;
+        SplitControl = CC2420ActiveMessageC;
+        PacketAcknowledgements = CC2420ActiveMessageC;
+        LowPowerListening = CC2420ActiveMessageC;
+        
+        Receive = CC2420TimeSyncMessageP.Receive;
+        Snoop = CC2420TimeSyncMessageP.Snoop;
+        AMPacket = CC2420TimeSyncMessageP;
+        CC2420TimeSyncMessageP.SubReceive -> ActiveMessageC.Receive[AM_TIMESYNCMSG];
+        CC2420TimeSyncMessageP.SubSnoop -> ActiveMessageC.Snoop[AM_TIMESYNCMSG];
+}
diff --git a/tos/chips/cc2420/CC2420TimeSyncMessageP.nc b/tos/chips/cc2420/CC2420TimeSyncMessageP.nc
new file mode 100644
index 00000000..37966c73
--- /dev/null
+++ b/tos/chips/cc2420/CC2420TimeSyncMessageP.nc
@@ -0,0 +1,270 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti
+ * @author: Brano Kusy (CC2420 port)
+ */
+#include "CC2420TimeSyncMessage.h"
+
+module CC2420TimeSyncMessageP
+{
+    provides
+    {
+        interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[uint8_t id];
+        interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[uint8_t id];
+        interface Packet;
+        interface AMPacket;
+
+        interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+        interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+        
+        interface Receive[am_id_t id];
+        interface Receive as Snoop[am_id_t id];
+    }
+
+    uses
+    {
+          interface AMSend as SubSend;
+        interface Packet as SubPacket;
+        interface AMPacket as SubAMPacket;
+
+        interface Receive as SubReceive;
+        interface Receive as SubSnoop;
+
+        interface PacketTimeStamp<T32khz,uint32_t> as PacketTimeStamp32khz;
+        interface PacketTimeStamp<TMilli,uint32_t> as PacketTimeStampMilli;
+        interface PacketTimeSyncOffset;
+
+        interface LocalTime<T32khz> as LocalTime32khz;
+        interface LocalTime<TMilli> as LocalTimeMilli;
+        interface Leds;
+    }
+}
+
+implementation
+{
+    // TODO: change the Packet.payloadLength and Packet.maxPayloadLength commands to async
+    inline timesync_footer_t* getFooter(message_t* msg)
+    {
+        // we use the payload length that we export (the smaller one)
+        return (timesync_footer_t*)(msg->data + call Packet.payloadLength(msg));
+    }
+
+/*----------------- Packet -----------------*/
+    command void Packet.clear(message_t* msg)
+    {
+        call PacketTimeSyncOffset.cancel(msg);
+        call SubPacket.clear(msg);
+    }
+
+    command void Packet.setPayloadLength(message_t* msg, uint8_t len)
+    {
+        call SubPacket.setPayloadLength(msg, len + sizeof(timesync_footer_t));
+    }
+
+    command uint8_t Packet.payloadLength(message_t* msg)
+    {
+        return call SubPacket.payloadLength(msg) - sizeof(timesync_footer_t);
+    }
+
+    command uint8_t Packet.maxPayloadLength()
+    {
+        return call SubPacket.maxPayloadLength() - sizeof(timesync_footer_t);
+    }
+
+    command void* Packet.getPayload(message_t* msg, uint8_t len)
+    {
+        return call SubPacket.getPayload(msg, len + sizeof(timesync_footer_t));
+    }
+
+/*----------------- AMPacket -----------------*/
+
+	inline command am_addr_t AMPacket.address()
+	{
+		return call SubAMPacket.address();
+	}
+
+	inline command am_group_t AMPacket.localGroup()
+	{
+		return call SubAMPacket.localGroup();
+	}
+
+	inline command bool AMPacket.isForMe(message_t* msg)
+	{
+		return call SubAMPacket.isForMe(msg) && call SubAMPacket.type(msg) == AM_TIMESYNCMSG;
+	}
+
+	inline command am_addr_t AMPacket.destination(message_t* msg)
+	{
+		return call SubAMPacket.destination(msg);
+	}
+
+	inline command void AMPacket.setDestination(message_t* msg, am_addr_t addr)
+	{
+		call SubAMPacket.setDestination(msg, addr);
+	}
+
+	inline command am_addr_t AMPacket.source(message_t* msg)
+	{
+		return call SubAMPacket.source(msg);
+	}
+
+	inline command void AMPacket.setSource(message_t* msg, am_addr_t addr)
+	{
+		call SubAMPacket.setSource(msg, addr);
+	}
+
+	inline command am_id_t AMPacket.type(message_t* msg)
+	{
+		return getFooter(msg)->type;
+	}
+
+	inline command void AMPacket.setType(message_t* msg, am_id_t type)
+	{
+		getFooter(msg)->type = type;
+	}
+
+	inline command am_group_t AMPacket.group(message_t* msg)
+	{
+		return call SubAMPacket.group(msg);
+	}
+
+	inline command void AMPacket.setGroup(message_t* msg, am_group_t grp)
+	{
+		call SubAMPacket.setGroup(msg, grp);
+	}
+
+/*----------------- TimeSyncAMSend32khz -----------------*/
+    command error_t TimeSyncAMSend32khz.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time)
+    {
+        error_t err;
+        timesync_footer_t* footer = (timesync_footer_t*)(msg->data + len);
+        footer->type = id;
+        footer->timestamp = event_time;
+
+        err = call SubSend.send(addr, msg, len + sizeof(timesync_footer_t));
+        call PacketTimeSyncOffset.set(msg);
+        return err;
+    }
+
+    command error_t TimeSyncAMSend32khz.cancel[am_id_t id](message_t* msg)
+    {
+        call PacketTimeSyncOffset.cancel(msg);
+        return call SubSend.cancel(msg);
+    }
+
+    default event void TimeSyncAMSend32khz.sendDone[am_id_t id](message_t* msg, error_t error) {}
+
+    command uint8_t TimeSyncAMSend32khz.maxPayloadLength[am_id_t id]()
+    {
+        return call SubSend.maxPayloadLength() - sizeof(timesync_footer_t);
+    }
+
+    command void* TimeSyncAMSend32khz.getPayload[am_id_t id](message_t* msg, uint8_t len)
+    {
+        return call SubSend.getPayload(msg, len + sizeof(timesync_footer_t));
+    }
+
+/*----------------- TimeSyncAMSendMilli -----------------*/
+    command error_t TimeSyncAMSendMilli.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time)
+    {
+        // compute elapsed time in millisecond
+        event_time = ((event_time - call LocalTimeMilli.get()) << 5) + call LocalTime32khz.get();
+        return call TimeSyncAMSend32khz.send[id](addr, msg, len, event_time);
+    }
+
+    command error_t TimeSyncAMSendMilli.cancel[am_id_t id](message_t* msg)
+    {
+        return call TimeSyncAMSend32khz.cancel[id](msg);
+    }
+
+    default event void TimeSyncAMSendMilli.sendDone[am_id_t id](message_t* msg, error_t error){}
+
+    command uint8_t TimeSyncAMSendMilli.maxPayloadLength[am_id_t id]()
+    {
+        return call TimeSyncAMSend32khz.maxPayloadLength[id]();
+    }
+
+    command void* TimeSyncAMSendMilli.getPayload[am_id_t id](message_t* msg, uint8_t len)
+    {
+        return call TimeSyncAMSend32khz.getPayload[id](msg, len);
+    }
+
+/*----------------- SubReceive -------------------*/
+
+    event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len)
+    {
+        am_id_t id = call AMPacket.type(msg);
+        return signal Receive.receive[id](msg, payload, len - sizeof(timesync_footer_t));
+    }
+
+    default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; }
+
+/*----------------- SubSnoop -------------------*/
+
+    event message_t* SubSnoop.receive(message_t* msg, void* payload, uint8_t len)
+    {
+        am_id_t id = call AMPacket.type(msg);
+        return signal Snoop.receive[id](msg, payload, len - sizeof(timesync_footer_t));
+    }
+
+    default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; }
+
+/*----------------- SubSend.sendDone -------------------*/
+    event void SubSend.sendDone(message_t* msg, error_t error)
+    {
+        am_id_t id = call AMPacket.type(msg);
+        signal TimeSyncAMSend32khz.sendDone[id](msg, error);
+        signal TimeSyncAMSendMilli.sendDone[id](msg, error);
+    }
+
+/*----------------- TimeSyncPacket32khz -----------------*/
+    command bool TimeSyncPacket32khz.isValid(message_t* msg)
+    {
+        return call PacketTimeStamp32khz.isValid(msg) && getFooter(msg)->timestamp != CC2420_INVALID_TIMESTAMP;
+    }
+
+    command uint32_t TimeSyncPacket32khz.eventTime(message_t* msg)
+    {
+        return (uint32_t)(getFooter(msg)->timestamp) + call PacketTimeStamp32khz.timestamp(msg);
+    }
+
+/*----------------- TimeSyncPacketMilli -----------------*/
+    command bool TimeSyncPacketMilli.isValid(message_t* msg)
+    {
+        return call PacketTimeStampMilli.isValid(msg) && getFooter(msg)->timestamp != CC2420_INVALID_TIMESTAMP;
+    }
+
+    command uint32_t TimeSyncPacketMilli.eventTime(message_t* msg)
+    {
+        return ((int32_t)(getFooter(msg)->timestamp) >> 5) + call PacketTimeStampMilli.timestamp(msg);
+    }
+}
diff --git a/tos/chips/cc2420/IEEE802154.h b/tos/chips/cc2420/IEEE802154.h
new file mode 100644
index 00000000..d8be0daa
--- /dev/null
+++ b/tos/chips/cc2420/IEEE802154.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.7 $ $Date: 2007-07-04 00:37:14 $
+ */
+
+#ifndef __IEEE802154_H__
+#define __IEEE802154_H__
+
+#include <Ieee154.h>
+
+#endif
diff --git a/tos/chips/cc2420/README.txt b/tos/chips/cc2420/README.txt
new file mode 100644
index 00000000..e9409be1
--- /dev/null
+++ b/tos/chips/cc2420/README.txt
@@ -0,0 +1,119 @@
+
+To compile in the default Ack LPL version, #define the preprocessor variable:
+  LOW_POWER_LISTENING
+  
+To compile in the PacketLink (auto-retransmission) layer, #define:
+  PACKET_LINK
+  
+To remove all acknowledgements, #define (or use CC2420Config in 2.0.2)
+  CC2420_NO_ACKNOWLEDGEMENTS
+  
+To use hardware auto-acks instead of software acks, #define:
+  CC2420_HW_ACKNOWLEDGEMENTS
+
+To stop using address recognition on the radio hardware, #define:
+  CC2420_NO_ADDRESS_RECOGNITION
+
+
+
+============================================================
+CC2420 2.0.2 Release Notes 7/2/07
+
+Updates (Moss)
+__________________________________________
+* New chip SPI bus arbitration working with Receive and Transmit.
+
+* Applied TUnit automated unit testing to CC2420 development
+  > Caught lots of bugs, especially through regression testing
+  > Source code in tinyos-2.x-contribs/tunit/
+
+* Applied TEP115 behavior to CC2420 SplitControl in Csma and Lpl
+
+* Updated ActiveMessageAddressC to provide the ActiveMessageAddress interface
+  > Updated CC2420ConfigP to handle ActiveMessageAddress.addressChanged() and
+    sync automatically upon address change events.
+
+* Updated CC2420Config interface to enable/disable sw/hw acknowledgements
+
+* Updated CC2420ConfigP to share register editing through single functions
+
+* Acknowledge after packet length and FCF check out valid.  
+  > The destination address is confirmed in hardware, so we don't need 
+    to download the entire header before acking.
+
+* Moved the getHeader() and getMetadata() commands to an internal interface
+  called CC2420PacketBody, provided by CC2420PacketC
+
+* Separated core functionality into different sub-packages/directories
+  > Updated micaz, telosb, intelmote2 .platform files
+  > Logically organizes code
+
+* Updated some LPL architecture
+  > Removed continuous modulation because it didn't work 100% and I don't have 
+    time to make it work.  
+  > Decreased backoffs and decreased on-time for detects, saving energy.
+
+* Updated to the new AMPacket interface; made the radio set the outbound
+  packet's destpan after send().
+
+
+7/5/07:
+* Added two methods to enable/disable automatic address recognition:
+  - Preprocessor CC2420_NO_ADDRESS_RECOGNITION to disable address recognition at
+    compile time
+  - CC2420Config.setAddressRecognition(bool on) through CC2420ControlC
+
+* Allowed the CC2420ReceiveP to perform software address checks to support
+  the case where a base station type application must sniff packets from other 
+  address, but also SACK packets destined for its address
+  
+* Updated CC2420Config interface to provide an async getShortAddr() and getPanAddr()
+
+
+Known issues
+__________________________________________
+
+
+
+
+============================================================
+CC2420 Release Notes 4/11/07
+
+This CC2420 stack contains two low power listening strategies,
+a packet retransmission layer, unique send and receive layers,
+ability to specify backoff and use of clear channel assessments
+on outbound messages, direct RSSI readings, ability to change 
+channels on the fly, an experimental 6LowPAN layer (not
+implemented by default), general bug fixes, and more.
+
+
+Known Issues
+__________________________________________
+ > LPL Lockups when the node is also accessing the USART.
+   This is a SPI bus issue, where shutting off the SPI
+   bus in the middle of an operation may cause the node
+   to hang.  Look to future versions on CVS for the fix.
+
+ > NoAck LPL doesn't ack at the end properly, and also isn't
+   finished being implemented. The CRC of the packet needs to 
+   manually be loaded into TXFIFO before continuous modulation.
+
+ > LPL stack is optimized for reliability at this point, since
+   SFD sampling is not implemented in this version. 
+ 
+
+Low Power Listening Schemes and Preprocessor Variables
+__________________________________________
+There are two low power listening schemes.  
+The default is called "AckLpl", because it inserts acknowledgement gaps andshort backoffs during the packet retransmission process. 
+This allows the transmitter to stop transmitting early, but increases the 
+power consumption per receive check.  This is better for slow receive
+check, high transmission rate networks.
+
+The second is called "NoAckLpl", because it does not insert acknowledgement
+gaps or backoffs in the retransmission process, so the receive checks are 
+shorter but the transmissions are longer.  This is more experimental than
+the Ack LPL version.  The radio continuously modulates the channel when
+delivering its packetized preamble.  This is better for fast receive check,
+low transmission rate networks.
+
diff --git a/tos/chips/cc2420/alarm/AlarmMultiplexC.nc b/tos/chips/cc2420/alarm/AlarmMultiplexC.nc
new file mode 100644
index 00000000..775d2c2e
--- /dev/null
+++ b/tos/chips/cc2420/alarm/AlarmMultiplexC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * A component that multiplexes the use of an alarm. The assumption is
+ * that its use is mutually exclusive and users check whether the
+ * events are for them.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2007-07-04 00:37:14 $
+ */
+
+#include <Timer.h>
+
+configuration AlarmMultiplexC {
+
+  provides interface Init;
+  provides interface Alarm<T32khz,uint32_t> as Alarm32khz32;
+
+}
+
+implementation {
+
+  components new HplCC2420AlarmC() as Alarm;
+
+  Init = Alarm;
+  Alarm32khz32 = Alarm;
+
+}
diff --git a/tos/chips/cc2420/control/CC2420ControlC.nc b/tos/chips/cc2420/control/CC2420ControlC.nc
new file mode 100644
index 00000000..2bf37beb
--- /dev/null
+++ b/tos/chips/cc2420/control/CC2420ControlC.nc
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation for configuring a ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.3 $ $Date: 2008/05/14 21:33:07 $
+ */
+
+#include "CC2420.h"
+#include "IEEE802154.h"
+
+configuration CC2420ControlC {
+
+  provides interface Resource;
+  provides interface CC2420Config;
+  provides interface CC2420Power;
+  provides interface Read<uint16_t> as ReadRssi;
+  
+}
+
+implementation {
+  
+  components CC2420ControlP;
+  Resource = CC2420ControlP;
+  CC2420Config = CC2420ControlP;
+  CC2420Power = CC2420ControlP;
+  ReadRssi = CC2420ControlP;
+
+  components MainC;
+  MainC.SoftwareInit -> CC2420ControlP;
+  
+  components AlarmMultiplexC as Alarm;
+  CC2420ControlP.StartupTimer -> Alarm;
+
+  components HplCC2420PinsC as Pins;
+  CC2420ControlP.CSN -> Pins.CSN;
+  CC2420ControlP.RSTN -> Pins.RSTN;
+  CC2420ControlP.VREN -> Pins.VREN;
+
+  components HplCC2420InterruptsC as Interrupts;
+  CC2420ControlP.InterruptCCA -> Interrupts.InterruptCCA;
+
+  components new CC2420SpiC() as Spi;
+  CC2420ControlP.SpiResource -> Spi;
+  CC2420ControlP.SRXON -> Spi.SRXON;
+  CC2420ControlP.SRFOFF -> Spi.SRFOFF;
+  CC2420ControlP.SXOSCON -> Spi.SXOSCON;
+  CC2420ControlP.SXOSCOFF -> Spi.SXOSCOFF;
+  CC2420ControlP.FSCTRL -> Spi.FSCTRL;
+  CC2420ControlP.IOCFG0 -> Spi.IOCFG0;
+  CC2420ControlP.IOCFG1 -> Spi.IOCFG1;
+  CC2420ControlP.MDMCTRL0 -> Spi.MDMCTRL0;
+  CC2420ControlP.MDMCTRL1 -> Spi.MDMCTRL1;
+  CC2420ControlP.PANID -> Spi.PANID;
+  CC2420ControlP.IEEEADR -> Spi.IEEEADR;
+  CC2420ControlP.RXCTRL1 -> Spi.RXCTRL1;
+  CC2420ControlP.RSSI  -> Spi.RSSI;
+
+  components new CC2420SpiC() as SyncSpiC;
+  CC2420ControlP.SyncResource -> SyncSpiC;
+
+  components new CC2420SpiC() as RssiResource;
+  CC2420ControlP.RssiResource -> RssiResource;
+  
+  components ActiveMessageAddressC;
+  CC2420ControlP.ActiveMessageAddress -> ActiveMessageAddressC;
+
+  components LocalIeeeEui64C;
+  CC2420ControlP.LocalIeeeEui64 -> LocalIeeeEui64C;
+
+}
+
diff --git a/tos/chips/cc2420/control/CC2420ControlP.nc b/tos/chips/cc2420/control/CC2420ControlP.nc
new file mode 100644
index 00000000..3f5efaf7
--- /dev/null
+++ b/tos/chips/cc2420/control/CC2420ControlP.nc
@@ -0,0 +1,533 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Urs Hunkeler (ReadRssi implementation)
+ * @version $Revision: 1.7 $ $Date: 2008/06/24 04:07:28 $
+ */
+
+#include <Ieee154.h>
+#include "Timer.h"
+
+module CC2420ControlP @safe() {
+
+  provides interface Init;
+  provides interface Resource;
+  provides interface CC2420Config;
+  provides interface CC2420Power;
+  provides interface Read<uint16_t> as ReadRssi;
+
+  uses interface LocalIeeeEui64;
+
+  uses interface Alarm<T32khz,uint32_t> as StartupTimer;
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as RSTN;
+  uses interface GeneralIO as VREN;
+  uses interface GpioInterrupt as InterruptCCA;
+  uses interface ActiveMessageAddress;
+
+  uses interface CC2420Ram as IEEEADR;
+  uses interface CC2420Ram as PANID;
+  uses interface CC2420Register as FSCTRL;
+  uses interface CC2420Register as IOCFG0;
+  uses interface CC2420Register as IOCFG1;
+  uses interface CC2420Register as MDMCTRL0;
+  uses interface CC2420Register as MDMCTRL1;
+  uses interface CC2420Register as RXCTRL1;
+  uses interface CC2420Register as RSSI;
+  uses interface CC2420Strobe as SRXON;
+  uses interface CC2420Strobe as SRFOFF;
+  uses interface CC2420Strobe as SXOSCOFF;
+  uses interface CC2420Strobe as SXOSCON;
+  
+  uses interface Resource as SpiResource;
+  uses interface Resource as RssiResource;
+  uses interface Resource as SyncResource;
+
+  uses interface Leds;
+
+}
+
+implementation {
+
+  typedef enum {
+    S_VREG_STOPPED,
+    S_VREG_STARTING,
+    S_VREG_STARTED,
+    S_XOSC_STARTING,
+    S_XOSC_STARTED,
+  } cc2420_control_state_t;
+
+  uint8_t m_channel;
+  
+  uint8_t m_tx_power;
+  
+  uint16_t m_pan;
+  
+  uint16_t m_short_addr;
+
+  ieee_eui64_t m_ext_addr;
+  
+  bool m_sync_busy;
+  
+  /** TRUE if acknowledgments are enabled */
+  bool autoAckEnabled;
+  
+  /** TRUE if acknowledgments are generated in hardware only */
+  bool hwAutoAckDefault;
+  
+  /** TRUE if software or hardware address recognition is enabled */
+  bool addressRecognition;
+  
+  /** TRUE if address recognition should also be performed in hardware */
+  bool hwAddressRecognition;
+  
+  norace cc2420_control_state_t m_state = S_VREG_STOPPED;
+  
+  /***************** Prototypes ****************/
+
+  void writeFsctrl();
+  void writeMdmctrl0();
+  void writeId();
+
+  task void sync();
+  task void syncDone();
+    
+  /***************** Init Commands ****************/
+  command error_t Init.init() {
+    int i, t;
+    call CSN.makeOutput();
+    call RSTN.makeOutput();
+    call VREN.makeOutput();
+    
+    m_short_addr = call ActiveMessageAddress.amAddress();
+    m_ext_addr = call LocalIeeeEui64.getId();
+    m_pan = call ActiveMessageAddress.amGroup();
+    m_tx_power = CC2420_DEF_RFPOWER;
+    m_channel = CC2420_DEF_CHANNEL;
+    
+    m_ext_addr = call LocalIeeeEui64.getId();
+    for (i = 0; i < 4; i++) {
+      t = m_ext_addr.data[i];
+      m_ext_addr.data[i] = m_ext_addr.data[7-i];
+      m_ext_addr.data[7-i] = t;
+    }
+
+
+#if defined(CC2420_NO_ADDRESS_RECOGNITION)
+    addressRecognition = FALSE;
+#else
+    addressRecognition = TRUE;
+#endif
+    
+#if defined(CC2420_HW_ADDRESS_RECOGNITION)
+    hwAddressRecognition = TRUE;
+#else
+    hwAddressRecognition = FALSE;
+#endif
+    
+    
+#if defined(CC2420_NO_ACKNOWLEDGEMENTS)
+    autoAckEnabled = FALSE;
+#else
+    autoAckEnabled = TRUE;
+#endif
+    
+#if defined(CC2420_HW_ACKNOWLEDGEMENTS)
+    hwAutoAckDefault = TRUE;
+    hwAddressRecognition = TRUE;
+#else
+    hwAutoAckDefault = FALSE;
+#endif
+    
+    
+    return SUCCESS;
+  }
+
+  /***************** Resource Commands ****************/
+  async command error_t Resource.immediateRequest() {
+    error_t error = call SpiResource.immediateRequest();
+    if ( error == SUCCESS ) {
+      call CSN.clr();
+    }
+    return error;
+  }
+
+  async command error_t Resource.request() {
+    return call SpiResource.request();
+  }
+
+  async command uint8_t Resource.isOwner() {
+    return call SpiResource.isOwner();
+  }
+
+  async command error_t Resource.release() {
+    atomic {
+      call CSN.set();
+      return call SpiResource.release();
+    }
+  }
+
+  /***************** CC2420Power Commands ****************/
+  async command error_t CC2420Power.startVReg() {
+    atomic {
+      if ( m_state != S_VREG_STOPPED ) {
+        return FAIL;
+      }
+      m_state = S_VREG_STARTING;
+    }
+    call VREN.set();
+    call StartupTimer.start( CC2420_TIME_VREN );
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.stopVReg() {
+    m_state = S_VREG_STOPPED;
+    call RSTN.clr();
+    call VREN.clr();
+    call RSTN.set();
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.startOscillator() {
+    atomic {
+      if ( m_state != S_VREG_STARTED ) {
+        return FAIL;
+      }
+        
+      m_state = S_XOSC_STARTING;
+      call IOCFG1.write( CC2420_SFDMUX_XOSC16M_STABLE << 
+                         CC2420_IOCFG1_CCAMUX );
+                         
+      call InterruptCCA.enableRisingEdge();
+      call SXOSCON.strobe();
+      
+      call IOCFG0.write( ( 1 << CC2420_IOCFG0_FIFOP_POLARITY ) |
+          ( 127 << CC2420_IOCFG0_FIFOP_THR ) );
+                         
+      writeFsctrl();
+      writeMdmctrl0();
+  
+      call RXCTRL1.write( ( 1 << CC2420_RXCTRL1_RXBPF_LOCUR ) |
+          ( 1 << CC2420_RXCTRL1_LOW_LOWGAIN ) |
+          ( 1 << CC2420_RXCTRL1_HIGH_HGM ) |
+          ( 1 << CC2420_RXCTRL1_LNA_CAP_ARRAY ) |
+          ( 1 << CC2420_RXCTRL1_RXMIX_TAIL ) |
+          ( 1 << CC2420_RXCTRL1_RXMIX_VCM ) |
+          ( 2 << CC2420_RXCTRL1_RXMIX_CURRENT ) );
+    }
+    return SUCCESS;
+  }
+
+
+  async command error_t CC2420Power.stopOscillator() {
+    atomic {
+      if ( m_state != S_XOSC_STARTED ) {
+        return FAIL;
+      }
+      m_state = S_VREG_STARTED;
+      call SXOSCOFF.strobe();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.rxOn() {
+    atomic {
+      if ( m_state != S_XOSC_STARTED ) {
+        return FAIL;
+      }
+      call SRXON.strobe();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.rfOff() {
+    atomic {  
+      if ( m_state != S_XOSC_STARTED ) {
+        return FAIL;
+      }
+      call SRFOFF.strobe();
+    }
+    return SUCCESS;
+  }
+
+  
+  /***************** CC2420Config Commands ****************/
+  command uint8_t CC2420Config.getChannel() {
+    atomic return m_channel;
+  }
+
+  command void CC2420Config.setChannel( uint8_t channel ) {
+    atomic m_channel = channel;
+  }
+
+  command ieee_eui64_t CC2420Config.getExtAddr() {
+    return m_ext_addr;
+  }
+
+  async command uint16_t CC2420Config.getShortAddr() {
+    atomic return m_short_addr;
+  }
+
+  command void CC2420Config.setShortAddr( uint16_t addr ) {
+    atomic m_short_addr = addr;
+  }
+
+  async command uint16_t CC2420Config.getPanAddr() {
+    atomic return m_pan;
+  }
+
+  command void CC2420Config.setPanAddr( uint16_t pan ) {
+    atomic m_pan = pan;
+  }
+
+  /**
+   * Sync must be called to commit software parameters configured on
+   * the microcontroller (through the CC2420Config interface) to the
+   * CC2420 radio chip.
+   */
+  command error_t CC2420Config.sync() {
+    atomic {
+      if ( m_sync_busy ) {
+        return FAIL;
+      }
+      
+      m_sync_busy = TRUE;
+      if ( m_state == S_XOSC_STARTED ) {
+        call SyncResource.request();
+      } else {
+        post syncDone();
+      }
+    }
+    return SUCCESS;
+  }
+
+  /**
+   * @param enableAddressRecognition TRUE to turn address recognition on
+   * @param useHwAddressRecognition TRUE to perform address recognition first
+   *     in hardware. This doesn't affect software address recognition. The
+   *     driver must sync with the chip after changing this value.
+   */
+  command void CC2420Config.setAddressRecognition(bool enableAddressRecognition, bool useHwAddressRecognition) {
+    atomic {
+      addressRecognition = enableAddressRecognition;
+      hwAddressRecognition = useHwAddressRecognition;
+    }
+  }
+  
+  /**
+   * @return TRUE if address recognition is enabled
+   */
+  async command bool CC2420Config.isAddressRecognitionEnabled() {
+    atomic return addressRecognition;
+  }
+  
+  /**
+   * @return TRUE if address recognition is performed first in hardware.
+   */
+  async command bool CC2420Config.isHwAddressRecognitionDefault() {
+    atomic return hwAddressRecognition;
+  }
+  
+  
+  /**
+   * Sync must be called for acknowledgement changes to take effect
+   * @param enableAutoAck TRUE to enable auto acknowledgements
+   * @param hwAutoAck TRUE to default to hardware auto acks, FALSE to
+   *     default to software auto acknowledgements
+   */
+  command void CC2420Config.setAutoAck(bool enableAutoAck, bool hwAutoAck) {
+    atomic autoAckEnabled = enableAutoAck;
+    atomic hwAutoAckDefault = hwAutoAck;
+  }
+  
+  /**
+   * @return TRUE if hardware auto acks are the default, FALSE if software
+   *     acks are the default
+   */
+  async command bool CC2420Config.isHwAutoAckDefault() {
+    atomic return hwAutoAckDefault;    
+  }
+  
+  /**
+   * @return TRUE if auto acks are enabled
+   */
+  async command bool CC2420Config.isAutoAckEnabled() {
+    atomic return autoAckEnabled;
+  }
+  
+  /***************** ReadRssi Commands ****************/
+  command error_t ReadRssi.read() { 
+    return call RssiResource.request();
+  }
+  
+  /***************** Spi Resources Events ****************/
+  event void SyncResource.granted() {
+    call CSN.clr();
+    call SRFOFF.strobe();
+    writeFsctrl();
+    writeMdmctrl0();
+    writeId();
+    call CSN.set();
+    call CSN.clr();
+    call SRXON.strobe();
+    call CSN.set();
+    call SyncResource.release();
+    post syncDone();
+  }
+
+  event void SpiResource.granted() {
+    call CSN.clr();
+    signal Resource.granted();
+  }
+
+  event void RssiResource.granted() { 
+    uint16_t data = 0;
+    call CSN.clr();
+    call RSSI.read(&data);
+    call CSN.set();
+    
+    call RssiResource.release();
+    data += 0x7f;
+    data &= 0x00ff;
+    signal ReadRssi.readDone(SUCCESS, data); 
+  }
+  
+  /***************** StartupTimer Events ****************/
+  async event void StartupTimer.fired() {
+    if ( m_state == S_VREG_STARTING ) {
+      m_state = S_VREG_STARTED;
+      call RSTN.clr();
+      call RSTN.set();
+      signal CC2420Power.startVRegDone();
+    }
+  }
+
+  /***************** InterruptCCA Events ****************/
+  async event void InterruptCCA.fired() {
+    m_state = S_XOSC_STARTED;
+    call InterruptCCA.disable();
+    call IOCFG1.write( 0 );
+    writeId();
+    call CSN.set();
+    call CSN.clr();
+    signal CC2420Power.startOscillatorDone();
+  }
+ 
+  /***************** ActiveMessageAddress Events ****************/
+  async event void ActiveMessageAddress.changed() {
+    atomic {
+      m_short_addr = call ActiveMessageAddress.amAddress();
+      m_pan = call ActiveMessageAddress.amGroup();
+    }
+    
+    post sync();
+  }
+  
+  /***************** Tasks ****************/
+  /**
+   * Attempt to synchronize our current settings with the CC2420
+   */
+  task void sync() {
+    call CC2420Config.sync();
+  }
+  
+  task void syncDone() {
+    atomic m_sync_busy = FALSE;
+    signal CC2420Config.syncDone( SUCCESS );
+  }
+  
+  
+  /***************** Functions ****************/
+  /**
+   * Write teh FSCTRL register
+   */
+  void writeFsctrl() {
+    uint8_t channel;
+    
+    atomic {
+      channel = m_channel;
+    }
+    
+    call FSCTRL.write( ( 1 << CC2420_FSCTRL_LOCK_THR ) |
+          ( ( (channel - 11)*5+357 ) << CC2420_FSCTRL_FREQ ) );
+  }
+
+  /**
+   * Write the MDMCTRL0 register
+   * Disabling hardware address recognition improves acknowledgment success
+   * rate and low power communications reliability by causing the local node
+   * to do work while the real destination node of the packet is acknowledging.
+   */
+  void writeMdmctrl0() {
+    atomic {
+      call MDMCTRL0.write( ( 1 << CC2420_MDMCTRL0_RESERVED_FRAME_MODE ) |
+          ( ((addressRecognition && hwAddressRecognition) ? 1 : 0) << CC2420_MDMCTRL0_ADR_DECODE ) |
+          ( 2 << CC2420_MDMCTRL0_CCA_HYST ) |
+          ( 3 << CC2420_MDMCTRL0_CCA_MOD ) |
+          ( 1 << CC2420_MDMCTRL0_AUTOCRC ) |
+          ( (autoAckEnabled && hwAutoAckDefault) << CC2420_MDMCTRL0_AUTOACK ) |
+          ( 0 << CC2420_MDMCTRL0_AUTOACK ) |
+          ( 2 << CC2420_MDMCTRL0_PREAMBLE_LENGTH ) );
+    }
+    // Jon Green:
+    // MDMCTRL1.CORR_THR is defaulted to 20 instead of 0 like the datasheet says
+    // If we add in changes to MDMCTRL1, be sure to include this fix.
+  }
+  
+  /**
+   * Write the PANID register
+   */
+  void writeId() {
+    nxle_uint16_t id[ 6 ];
+
+    atomic {
+      /* Eui-64 is stored in big endian */
+      memcpy((uint8_t *)id, m_ext_addr.data, 8);
+      id[ 4 ] = m_pan;
+      id[ 5 ] = m_short_addr;
+    }
+
+    call IEEEADR.write(0, (uint8_t *)&id, 12);
+  }
+
+
+  
+  /***************** Defaults ****************/
+  default event void CC2420Config.syncDone( error_t error ) {
+  }
+
+  default event void ReadRssi.readDone(error_t error, uint16_t data) {
+  }
+  
+}
diff --git a/tos/chips/cc2420/csma/CC2420CsmaC.nc b/tos/chips/cc2420/csma/CC2420CsmaC.nc
new file mode 100644
index 00000000..1ae5146a
--- /dev/null
+++ b/tos/chips/cc2420/csma/CC2420CsmaC.nc
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Basic implementation of a CSMA MAC for the ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2008-05-14 21:33:07 $
+ */
+
+#include "CC2420.h"
+#include "IEEE802154.h"
+
+configuration CC2420CsmaC {
+
+  provides interface SplitControl;
+  provides interface Send;
+  provides interface Receive;
+  provides interface RadioBackoff;
+
+}
+
+implementation {
+
+  components CC2420CsmaP as CsmaP;
+  RadioBackoff = CsmaP;
+  SplitControl = CsmaP;
+  Send = CsmaP;
+  
+  components CC2420ControlC;
+  CsmaP.Resource -> CC2420ControlC;
+  CsmaP.CC2420Power -> CC2420ControlC;
+
+  components CC2420TransmitC;
+  CsmaP.SubControl -> CC2420TransmitC;
+  CsmaP.CC2420Transmit -> CC2420TransmitC;
+  CsmaP.SubBackoff -> CC2420TransmitC;
+
+  components CC2420ReceiveC;
+  Receive = CC2420ReceiveC;
+  CsmaP.SubControl -> CC2420ReceiveC;
+
+  components CC2420PacketC;
+  CsmaP.CC2420Packet -> CC2420PacketC;
+  CsmaP.CC2420PacketBody -> CC2420PacketC;
+  
+  components RandomC;
+  CsmaP.Random -> RandomC;
+
+  components new StateC();
+  CsmaP.SplitControlState -> StateC;
+  
+  components LedsC as Leds;
+  CsmaP.Leds -> Leds;
+  
+}
diff --git a/tos/chips/cc2420/csma/CC2420CsmaP.nc b/tos/chips/cc2420/csma/CC2420CsmaP.nc
new file mode 100644
index 00000000..5f23c997
--- /dev/null
+++ b/tos/chips/cc2420/csma/CC2420CsmaP.nc
@@ -0,0 +1,299 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.12 $ $Date: 2009/09/17 23:36:36 $
+ */
+
+module CC2420CsmaP @safe() {
+
+  provides interface SplitControl;
+  provides interface Send;
+  provides interface RadioBackoff;
+
+  uses interface Resource;
+  uses interface CC2420Power;
+  uses interface StdControl as SubControl;
+  uses interface CC2420Transmit;
+  uses interface RadioBackoff as SubBackoff;
+  uses interface Random;
+  uses interface Leds;
+  uses interface CC2420Packet;
+  uses interface CC2420PacketBody;
+  uses interface State as SplitControlState;
+
+}
+
+implementation {
+
+  enum {
+    S_STOPPED,
+    S_STARTING,
+    S_STARTED,
+    S_STOPPING,
+    S_TRANSMITTING,
+  };
+
+  message_t* ONE_NOK m_msg;
+  
+  error_t sendErr = SUCCESS;
+  
+  /** TRUE if we are to use CCA when sending the current packet */
+  norace bool ccaOn;
+  
+  /****************** Prototypes ****************/
+  task void startDone_task();
+  task void stopDone_task();
+  task void sendDone_task();
+  
+  void shutdown();
+
+  /***************** SplitControl Commands ****************/
+  command error_t SplitControl.start() {
+    if(call SplitControlState.requestState(S_STARTING) == SUCCESS) {
+      call CC2420Power.startVReg();
+      return SUCCESS;
+    
+    } else if(call SplitControlState.isState(S_STARTED)) {
+      return EALREADY;
+      
+    } else if(call SplitControlState.isState(S_STARTING)) {
+      return SUCCESS;
+    }
+    
+    return EBUSY;
+  }
+
+  command error_t SplitControl.stop() {
+    if (call SplitControlState.isState(S_STARTED)) {
+      call SplitControlState.forceState(S_STOPPING);
+      shutdown();
+      return SUCCESS;
+      
+    } else if(call SplitControlState.isState(S_STOPPED)) {
+      return EALREADY;
+    
+    } else if(call SplitControlState.isState(S_TRANSMITTING)) {
+      call SplitControlState.forceState(S_STOPPING);
+      // At sendDone, the radio will shut down
+      return SUCCESS;
+    
+    } else if(call SplitControlState.isState(S_STOPPING)) {
+      return SUCCESS;
+    }
+    
+    return EBUSY;
+  }
+
+  /***************** Send Commands ****************/
+  command error_t Send.cancel( message_t* p_msg ) {
+    return call CC2420Transmit.cancel();
+  }
+
+  command error_t Send.send( message_t* p_msg, uint8_t len ) {
+    
+    cc2420_header_t* header = call CC2420PacketBody.getHeader( p_msg );
+    cc2420_metadata_t* metadata = call CC2420PacketBody.getMetadata( p_msg );
+
+    atomic {
+      if (!call SplitControlState.isState(S_STARTED)) {
+        return FAIL;
+      }
+      
+      call SplitControlState.forceState(S_TRANSMITTING);
+      m_msg = p_msg;
+    }
+
+    // header->length = len + CC2420_SIZE;
+#ifdef CC2420_HW_SECURITY
+    header->fcf &= ((1 << IEEE154_FCF_ACK_REQ)|
+                    (1 << IEEE154_FCF_SECURITY_ENABLED)|
+                    (0x3 << IEEE154_FCF_SRC_ADDR_MODE) |
+                    (0x3 << IEEE154_FCF_DEST_ADDR_MODE));
+#else
+    header->fcf &= ((1 << IEEE154_FCF_ACK_REQ) | 
+                    (0x3 << IEEE154_FCF_SRC_ADDR_MODE) |
+                    (0x3 << IEEE154_FCF_DEST_ADDR_MODE));
+#endif
+    header->fcf |= ( ( IEEE154_TYPE_DATA << IEEE154_FCF_FRAME_TYPE ) |
+		     ( 1 << IEEE154_FCF_INTRAPAN ) ); 
+
+    metadata->ack = FALSE;
+    metadata->rssi = 0;
+    metadata->lqi = 0;
+    //metadata->timesync = FALSE;
+    metadata->timestamp = CC2420_INVALID_TIMESTAMP;
+
+    ccaOn = TRUE;
+    signal RadioBackoff.requestCca(m_msg);
+
+    call CC2420Transmit.send( m_msg, ccaOn );
+    return SUCCESS;
+
+  }
+
+  command void* Send.getPayload(message_t* m, uint8_t len) {
+    if (len <= call Send.maxPayloadLength()) {
+      return (void* COUNT_NOK(len ))(m->data);
+    }
+    else {
+      return NULL;
+    }
+  }
+
+  command uint8_t Send.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+
+  /**************** RadioBackoff Commands ****************/
+  /**
+   * Must be called within a requestInitialBackoff event
+   * @param backoffTime the amount of time in some unspecified units to backoff
+   */
+  async command void RadioBackoff.setInitialBackoff(uint16_t backoffTime) {
+    call SubBackoff.setInitialBackoff(backoffTime);
+  }
+  
+  /**
+   * Must be called within a requestCongestionBackoff event
+   * @param backoffTime the amount of time in some unspecified units to backoff
+   */
+  async command void RadioBackoff.setCongestionBackoff(uint16_t backoffTime) {
+    call SubBackoff.setCongestionBackoff(backoffTime);
+  }
+      
+  /**
+   * Enable CCA for the outbound packet.  Must be called within a requestCca
+   * event
+   * @param ccaOn TRUE to enable CCA, which is the default.
+   */
+  async command void RadioBackoff.setCca(bool useCca) {
+    ccaOn = useCca;
+  }
+  
+
+  /**************** Events ****************/
+  async event void CC2420Transmit.sendDone( message_t* p_msg, error_t err ) {
+    atomic sendErr = err;
+    post sendDone_task();
+  }
+
+  async event void CC2420Power.startVRegDone() {
+    call Resource.request();
+  }
+  
+  event void Resource.granted() {
+    call CC2420Power.startOscillator();
+  }
+
+  async event void CC2420Power.startOscillatorDone() {
+    post startDone_task();
+  }
+  
+  /***************** SubBackoff Events ****************/
+  async event void SubBackoff.requestInitialBackoff(message_t *msg) {
+    call SubBackoff.setInitialBackoff ( call Random.rand16() 
+        % (0x1F * CC2420_BACKOFF_PERIOD) + CC2420_MIN_BACKOFF);
+        
+    signal RadioBackoff.requestInitialBackoff(msg);
+  }
+
+  async event void SubBackoff.requestCongestionBackoff(message_t *msg) {
+    call SubBackoff.setCongestionBackoff( call Random.rand16() 
+        % (0x7 * CC2420_BACKOFF_PERIOD) + CC2420_MIN_BACKOFF);
+
+    signal RadioBackoff.requestCongestionBackoff(msg);
+  }
+  
+  async event void SubBackoff.requestCca(message_t *msg) {
+    // Lower layers than this do not configure the CCA settings
+    signal RadioBackoff.requestCca(msg);
+  }
+  
+  
+  /***************** Tasks ****************/
+  task void sendDone_task() {
+    error_t packetErr;
+    atomic packetErr = sendErr;
+    if(call SplitControlState.isState(S_STOPPING)) {
+      shutdown();
+      
+    } else {
+      call SplitControlState.forceState(S_STARTED);
+    }
+    
+    signal Send.sendDone( m_msg, packetErr );
+  }
+
+  task void startDone_task() {
+    call SubControl.start();
+    call CC2420Power.rxOn();
+    call Resource.release();
+    call SplitControlState.forceState(S_STARTED);
+    signal SplitControl.startDone( SUCCESS );
+  }
+  
+  task void stopDone_task() {
+    call SplitControlState.forceState(S_STOPPED);
+    signal SplitControl.stopDone( SUCCESS );
+  }
+  
+  
+  /***************** Functions ****************/
+  /**
+   * Shut down all sub-components and turn off the radio
+   */
+  void shutdown() {
+    call SubControl.stop();
+    call CC2420Power.stopVReg();
+    post stopDone_task();
+  }
+
+  /***************** Defaults ***************/
+  default event void SplitControl.startDone(error_t error) {
+  }
+  
+  default event void SplitControl.stopDone(error_t error) {
+  }
+  
+  default async event void RadioBackoff.requestInitialBackoff(message_t *msg) {
+  }
+
+  default async event void RadioBackoff.requestCongestionBackoff(message_t *msg) {
+  }
+  
+  default async event void RadioBackoff.requestCca(message_t *msg) {
+  }
+  
+  
+}
+
diff --git a/tos/chips/cc2420/htmlreport.tar.gz b/tos/chips/cc2420/htmlreport.tar.gz
new file mode 100644
index 00000000..19c8971c
Binary files /dev/null and b/tos/chips/cc2420/htmlreport.tar.gz differ
diff --git a/tos/chips/cc2420/interfaces/CC2420Config.nc b/tos/chips/cc2420/interfaces/CC2420Config.nc
new file mode 100644
index 00000000..9065e4ef
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/CC2420Config.nc
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An HAL abstraction of the ChipCon CC2420 radio. This abstraction
+ * deals specifically with radio configurations. All get() and set()
+ * commands are single-phase. After setting some values, a call to
+ * sync() is required for the changes to propagate to the cc2420
+ * hardware chip. This interface allows setting multiple parameters
+ * before calling sync().
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.3 $ $Date: 2008/06/16 15:33:32 $
+ */
+
+interface CC2420Config {
+
+  /**
+   * Sync configuration changes with the radio hardware. This only
+   * applies to set commands below.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  command error_t sync();
+  event void syncDone( error_t error );
+
+  /**
+   * Change the channel of the radio, between 11 and 26
+   */
+  command uint8_t getChannel();
+  command void setChannel( uint8_t channel );
+
+  /**
+   * Get the long address of the radio: set in hardware
+   */
+  command ieee_eui64_t getExtAddr();
+
+  /**
+   * Change the short address of the radio.
+   */
+  async command uint16_t getShortAddr();
+  command void setShortAddr( uint16_t address );
+
+  /**
+   * Change the PAN address of the radio.
+   */
+  async command uint16_t getPanAddr();
+  command void setPanAddr( uint16_t address );
+
+  
+  /**
+   * @param enableAddressRecognition TRUE to turn address recognition on
+   * @param useHwAddressRecognition TRUE to perform address recognition first
+   *     in hardware. This doesn't affect software address recognition. The
+   *     driver must sync with the chip after changing this value.
+   */
+  command void setAddressRecognition(bool enableAddressRecognition, bool useHwAddressRecognition);
+  
+  
+  /**
+   * @return TRUE if address recognition is enabled
+   */
+  async command bool isAddressRecognitionEnabled();
+  
+  /**
+   * @return TRUE if address recognition is performed first in hardware.
+   */
+  async command bool isHwAddressRecognitionDefault();
+  
+  /**
+   * Sync must be called for acknowledgement changes to take effect
+   * @param enableAutoAck TRUE to enable auto acknowledgements
+   * @param hwAutoAck TRUE to default to hardware auto acks, FALSE to
+   *     default to software auto acknowledgements
+   */
+  command void setAutoAck(bool enableAutoAck, bool hwAutoAck);
+  
+  /**
+   * @return TRUE if hardware auto acks are the default, FALSE if software
+   *     acks are the default
+   */
+  async command bool isHwAutoAckDefault();
+  
+  /**
+   * @return TRUE if auto acks are enabled
+   */
+  async command bool isAutoAckEnabled();
+  
+
+  
+}
diff --git a/tos/chips/cc2420/interfaces/CC2420Fifo.nc b/tos/chips/cc2420/interfaces/CC2420Fifo.nc
new file mode 100644
index 00000000..54cfd592
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/CC2420Fifo.nc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HAL abstraction for accessing the FIFO registers of a ChipCon
+ * CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2008-06-03 04:43:03 $
+ */
+
+interface CC2420Fifo {
+
+  /**
+   * Start reading from the FIFO. The <code>readDone</code> event will
+   * be signalled upon completion.
+   *
+   * @param data a pointer to the receive buffer.
+   * @param length number of bytes to read.
+   * @return status byte returned when sending the last address byte
+   * of the SPI transaction.
+   */
+  async command cc2420_status_t beginRead( uint8_t* COUNT_NOK(length) data, uint8_t length );
+
+  /**
+   * Continue reading from the FIFO without having to send the address
+   * byte again. The <code>readDone</code> event will be signalled
+   * upon completion.
+   *
+   * @param data a pointer to the receive buffer.
+   * @param length number of bytes to read.
+   * @return SUCCESS always.
+   */
+  async command error_t continueRead( uint8_t* COUNT_NOK(length) data, uint8_t length );
+
+  /**
+   * Signals the completion of a read operation.
+   *
+   * @param data a pointer to the receive buffer.
+   * @param length number of bytes read.
+   * @param error notification of how the operation went
+   */
+  async event void readDone( uint8_t* COUNT_NOK(length) data, uint8_t length, error_t error );
+
+  /**
+   * Start writing the FIFO. The <code>writeDone</code> event will be
+   * signalled upon completion.
+   *
+   * @param data a pointer to the send buffer.
+   * @param length number of bytes to write.
+   * @return status byte returned when sending the last address byte
+   * of the SPI transaction.
+   */
+  async command cc2420_status_t write( uint8_t* COUNT_NOK(length) data, uint8_t length );
+
+  /**
+   * Signals the completion of a write operation.
+   *
+   * @param data a pointer to the send buffer.
+   * @param length number of bytes written.
+   * @param error notification of how the operation went
+   */
+  async event void writeDone( uint8_t* COUNT_NOK(length) data, uint8_t length, error_t error );
+
+}
diff --git a/tos/chips/cc2420/interfaces/CC2420Keys.nc b/tos/chips/cc2420/interfaces/CC2420Keys.nc
new file mode 100644
index 00000000..154d57eb
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/CC2420Keys.nc
@@ -0,0 +1,43 @@
+/*
+* Copyright (c) 2008 Johns Hopkins University.
+* All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author JeongGil Ko
+ * @author Razvan Musaloiu-E.
+ * @author Jong Hyun Lim
+ */
+
+interface CC2420Keys
+{
+  command error_t setKey(uint8_t keyNo, uint8_t* key);
+  event void setKeyDone(uint8_t keyNo, uint8_t* key);
+}
diff --git a/tos/chips/cc2420/interfaces/CC2420Packet.nc b/tos/chips/cc2420/interfaces/CC2420Packet.nc
new file mode 100644
index 00000000..1c403fe9
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/CC2420Packet.nc
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Chad Metcalf
+ */
+
+#include "message.h"
+
+interface CC2420Packet {
+  
+  /**
+   * Get transmission power setting for current packet.
+   *
+   * @param the message
+   */
+  async command uint8_t getPower( message_t* p_msg );
+
+  /**
+   * Set transmission power for a given packet. Valid ranges are
+   * between 0 and 31.
+   *
+   * @param p_msg the message.
+   * @param power transmission power.
+   */
+  async command void setPower( message_t* p_msg, uint8_t power );
+  
+  /**
+   * Get rssi value for a given packet. For received packets, it is
+   * the received signal strength when receiving that packet. For sent
+   * packets, it is the received signal strength of the ack if an ack
+   * was received.
+   */
+  async command int8_t getRssi( message_t* p_msg );
+
+  /**
+   * Get lqi value for a given packet. For received packets, it is the
+   * link quality indicator value when receiving that packet. For sent
+   * packets, it is the link quality indicator value of the ack if an
+   * ack was received.
+   */
+  async command uint8_t getLqi( message_t* p_msg );
+
+
+  async command uint8_t getNetwork( message_t* p_msg );
+
+  async command void setNetwork( message_t* p_msg, uint8_t networkId );
+  
+}
diff --git a/tos/chips/cc2420/interfaces/CC2420PacketBody.nc b/tos/chips/cc2420/interfaces/CC2420PacketBody.nc
new file mode 100644
index 00000000..664c7ed2
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/CC2420PacketBody.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Internal interface for the CC2420 to get portions of a packet.
+ * @author David Moss
+ */
+ 
+interface CC2420PacketBody {
+
+  /**
+   * @return pointer to the cc2420_header_t of the given message
+   */
+  async command cc2420_header_t * ONE getHeader(message_t * ONE msg);
+
+
+  /**
+   * @return pointer to the payload region of the message, after any headers
+   *    works with extended addressing mode
+   */
+  async command uint8_t * getPayload( message_t* msg);  
+  /**
+   * @return pointer to the cc2420_metadata_t of the given message
+   */
+  async command cc2420_metadata_t * ONE getMetadata(message_t * ONE msg);
+  
+}
+
diff --git a/tos/chips/cc2420/interfaces/CC2420Power.nc b/tos/chips/cc2420/interfaces/CC2420Power.nc
new file mode 100644
index 00000000..3366bf27
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/CC2420Power.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An HAL abstraction of the ChipCon CC2420 radio. This abstraction
+ * deals specifically with radio power operations (e.g. voltage
+ * regulator, oscillator, etc). However, it does not include
+ * transmission power, see the CC2420Config interface.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2007-07-04 00:37:14 $
+ */
+
+interface CC2420Power {
+
+  /**
+   * Start the voltage regulator on the CC2420. On SUCCESS,
+   * <code>startVReg()</code> will be signalled when the voltage
+   * regulator is fully on.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t startVReg();
+
+  /**
+   * Signals that the voltage regulator has been started.
+   */
+  async event void startVRegDone();
+  
+  /**
+   * Stop the voltage regulator immediately.
+   *
+   * @return SUCCESS always
+   */
+  async command error_t stopVReg();
+
+  /**
+   * Start the oscillator. On SUCCESS, <code>startOscillator</code>
+   * will be signalled when the oscillator has been started.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t startOscillator();
+
+  /**
+   * Signals that the oscillator has been started.
+   */
+  async event void startOscillatorDone();
+
+  /**
+   * Stop the oscillator.
+   *
+   * @return SUCCESS if the oscillator was stopped, FAIL otherwise.
+   */
+  async command error_t stopOscillator();
+
+  /**
+   * Enable RX.
+   *
+   * @return SUCCESS if receive mode has been enabled, FAIL otherwise.
+   */
+  async command error_t rxOn();
+
+  /**
+   * Disable RX.
+   *
+   * @return SUCCESS if receive mode has been disabled, FAIL otherwise.
+   */
+  async command error_t rfOff();
+
+}
diff --git a/tos/chips/cc2420/interfaces/CC2420Ram.nc b/tos/chips/cc2420/interfaces/CC2420Ram.nc
new file mode 100644
index 00000000..8edfdc3f
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/CC2420Ram.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HAL abstraction for accessing theRAM of a ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2008-06-03 04:43:03 $
+ */
+
+#include "CC2420.h"
+
+interface CC2420Ram {
+
+  /**
+   * Read data from a RAM. This operation is sychronous.
+   *
+   * @param offset within the field.
+   * @param data a pointer to the receive buffer.
+   * @param length number of bytes to read.
+   * @return status byte returned when sending the last byte
+   * of the SPI transaction.
+   */
+  async command cc2420_status_t read( uint8_t offset, uint8_t* COUNT_NOK(length) data, uint8_t length );
+
+  /**
+   * Write data to RAM. This operation is sychronous.
+   *
+   * @param offset within the field.
+   * @param data a pointer to the send buffer.
+   * @param length number of bytes to write.
+   * @return status byte returned when sending the last address byte
+   * of the SPI transaction.
+   */
+  async command cc2420_status_t write( uint8_t offset, uint8_t* COUNT_NOK(length) data, uint8_t length );
+
+}
diff --git a/tos/chips/cc2420/interfaces/CC2420Receive.nc b/tos/chips/cc2420/interfaces/CC2420Receive.nc
new file mode 100644
index 00000000..7c13ae62
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/CC2420Receive.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Low-level abstraction of the receive path implementation for the
+ * ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2008-06-17 07:28:24 $
+ */
+
+#include "message.h"
+
+interface CC2420Receive {
+
+  /**
+   * Notification that an SFD capture has occured.
+   *
+   * @param time at which the capture happened.
+   */
+  async command void sfd( uint32_t time );
+
+  /**
+   * Notification that the packet has been dropped by the radio
+   * (e.g. due to address rejection).
+   */
+  async command void sfd_dropped();
+
+  /**
+   * Signals that a message has been received.
+   *
+   * @param type of the message received.
+   * @param message pointer to message received.
+   */
+  async event void receive( uint8_t type, message_t* ONE_NOK message );
+
+}
+
diff --git a/tos/chips/cc2420/interfaces/CC2420Register.nc b/tos/chips/cc2420/interfaces/CC2420Register.nc
new file mode 100644
index 00000000..dc8c043b
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/CC2420Register.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Interface representing one of the Read/Write registers on the
+ * CC2420 radio. The return values (when appropriate) refer to the
+ * status byte returned on the CC2420 SO pin. A full list of RW
+ * registers can be found on page 61 of the CC2420 datasheet (rev
+ * 1.2). Page 25 of the same document describes the protocol for
+ * interacting with these registers over the CC2420 SPI bus.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:44 $
+ */
+
+#include "CC2420.h"
+
+interface CC2420Register {
+
+  /**
+   * Read a 16-bit data word from the register.
+   *
+   * @param data pointer to place the register value.
+   * @return status byte from the read.
+   */
+  async command cc2420_status_t read(uint16_t* data);
+
+  /**
+   * Write a 16-bit data word to the register.
+   * 
+   * @param data value to write to register.
+   * @return status byte from the write.
+   */
+  async command cc2420_status_t write(uint16_t data);
+
+}
diff --git a/tos/chips/cc2420/interfaces/CC2420SecurityMode.nc b/tos/chips/cc2420/interfaces/CC2420SecurityMode.nc
new file mode 100644
index 00000000..ca652d5a
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/CC2420SecurityMode.nc
@@ -0,0 +1,45 @@
+/*
+* Copyright (c) 2008 Johns Hopkins University.
+* All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author JeongGil Ko
+ * @author Razvan Musaloiu-E.
+ * @author Jong Hyun Lim
+ */
+
+interface CC2420SecurityMode
+{
+  command error_t setCtr(message_t* msg, uint8_t setKey, uint8_t setSkip);
+  // Valid sizes are: 4, 6, 8, 10, 12, 14, 16
+  command error_t setCbcMac(message_t* msg, uint8_t setKey, uint8_t setSkip, uint8_t size);
+  command error_t setCcm(message_t* msg, uint8_t setKey, uint8_t setSkip, uint8_t size);
+}
diff --git a/tos/chips/cc2420/interfaces/CC2420Strobe.nc b/tos/chips/cc2420/interfaces/CC2420Strobe.nc
new file mode 100644
index 00000000..ee35ecf5
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/CC2420Strobe.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Interface representing one of the CC2420 command strobe registers.
+ * Writing to one of these registers enacts a command on the CC2420,
+ * such as power-up, transmission, or clear a FIFO.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:44 $
+ */
+
+#include "CC2420.h"
+
+interface CC2420Strobe {
+
+  /**
+   * Send a command strobe to the register. The return value is the
+   * CC2420 status register. Table 5 on page 27 of the CC2420
+   * datasheet (v1.2) describes the contents of this register.
+   * 
+   * @return Status byte from the CC2420.
+   */
+  async command cc2420_status_t strobe();
+
+}
diff --git a/tos/chips/cc2420/interfaces/CC2420Transmit.nc b/tos/chips/cc2420/interfaces/CC2420Transmit.nc
new file mode 100644
index 00000000..3d608ffe
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/CC2420Transmit.nc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Low-level abstraction for the transmit path implementaiton of the
+ * ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2008-06-03 04:43:03 $
+ */
+
+#include "message.h"
+
+interface CC2420Transmit {
+
+  /**
+   * Send a message
+   *
+   * @param p_msg message to send.
+   * @param useCca TRUE if this Tx should use clear channel assessments
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t send( message_t* ONE p_msg, bool useCca );
+
+  /**
+   * Send the previous message again
+   * @param useCca TRUE if this re-Tx should use clear channel assessments
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t resend(bool useCca);
+
+  /**
+   * Cancel sending of the message.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t cancel();
+
+  /**
+   * Signal that a message has been sent
+   *
+   * @param p_msg message to send.
+   * @param error notifaction of how the operation went.
+   */
+  async event void sendDone( message_t* ONE_NOK p_msg, error_t error );
+
+  /**
+   * Modify the contents of a packet. This command can only be used
+   * when an SFD capture event for the sending packet is signalled.
+   *
+   * @param offset in the message to start modifying.
+   * @param buf to data to write
+   * @param len of bytes to write
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t modify( uint8_t offset, uint8_t* COUNT_NOK(len) buf, uint8_t len );
+
+}
+
diff --git a/tos/chips/cc2420/interfaces/ChipSpiResource.nc b/tos/chips/cc2420/interfaces/ChipSpiResource.nc
new file mode 100644
index 00000000..385a0024
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/ChipSpiResource.nc
@@ -0,0 +1,41 @@
+
+/**
+ * Interface for the SPI resource for an entire chip.  The chip accesses
+ * the platform SPI resource one time, but can have multiple clients 
+ * using the SPI bus on top.  When all of the clients are released, the
+ * chip will normally try to release itself from the platforms SPI bus.
+ * In some cases, this isn't desirable - so even though upper components
+ * aren't actively using the SPI bus, they can tell the chip to hold onto
+ * it so they can have immediate access when they need. 
+ *
+ * Any component that aborts a release MUST attempt the release at a later
+ * time if they don't acquire and release the SPI bus naturally after the
+ * abort.
+ * 
+ * @author David Moss
+ */
+interface ChipSpiResource {
+  
+  /**
+   * The SPI bus is about to be automatically released.  Modules that aren't
+   * using the SPI bus but still want the SPI bus to stick around must call
+   * abortRelease() within the event.
+   */
+  async event void releasing();
+
+  
+  /**
+   * Abort the release of the SPI bus.  This must be called only with the
+   * releasing() event
+   */
+  async command void abortRelease();
+  
+  /**
+   * Release the SPI bus if there are no objections
+   * @return SUCCESS if the SPI bus is released from the chip.
+   *      FAIL if the SPI bus is already in use.
+   *      EBUSY if some component aborted the release.
+   */
+  async command error_t attemptRelease();
+  
+}
diff --git a/tos/chips/cc2420/interfaces/PacketTimeSyncOffset.nc b/tos/chips/cc2420/interfaces/PacketTimeSyncOffset.nc
new file mode 100644
index 00000000..29b8e51f
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/PacketTimeSyncOffset.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti, Brano Kusy
+ *
+ * Interface for one hop time synchronization. Allows to modify timesync
+ * messages in the MAC layer with elapsed time of an event (ETA timesync
+ * primitive). Interface also provides a command to determine offset within
+ * a CC2420 packet, where the timesync ETA value is stored. word 'timestamping'
+ * used in describing commands does not refer to metadata.timestamp value,
+ *  rather it refers to the timesync ETA timestamp which is part of data
+ *  payload and is transmitted over the air.
+ */
+
+interface PacketTimeSyncOffset
+{
+    /**
+     * @param 'message_t *ONE msg' message to examine.
+     *
+     * Returns TRUE if the current message should be timestamped.
+     */
+    async command bool isSet(message_t* msg);
+
+    /**
+     * @param 'message_t *ONE msg' message to examine.
+     *
+     * Returns the offset of where the timesync timestamp is sotred in a
+     * CC2420 packet
+     */
+    async command uint8_t get(message_t* msg);
+
+    /**
+     * @param 'message_t *ONE msg' message to modify.
+     *
+     *  Sets the current message to be timestamped in the MAC layer.
+     */
+    async command void set(message_t* msg);
+
+    /**
+     * @param 'message_t *ONE msg' message to modify.
+     *
+     * Cancels any pending requests to timestamp the message in MAC.
+     */
+    async command void cancel(message_t* msg);
+}
diff --git a/tos/chips/cc2420/interfaces/PowerCycle.nc b/tos/chips/cc2420/interfaces/PowerCycle.nc
new file mode 100644
index 00000000..aef2dab8
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/PowerCycle.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Manage the CC2420's duty cycle and power management
+ * @author David Moss
+ */
+ 
+interface PowerCycle {
+  
+  /**
+   * Set the sleep interval, in binary milliseconds
+   * @param sleepIntervalMs the sleep interval in [ms]
+   */
+  command void setSleepInterval(uint16_t sleepIntervalMs);
+  
+  /**
+   * @return the sleep interval in [ms]
+   */
+  command uint16_t getSleepInterval();
+  
+  /**
+   * @deprecated Should be removed in the future when the PowerCycle
+   *     component does packet-level detects and is in full control of radio
+   *     power.
+   */
+  event void detected();
+  
+}
+
diff --git a/tos/chips/cc2420/interfaces/RadioBackoff.nc b/tos/chips/cc2420/interfaces/RadioBackoff.nc
new file mode 100644
index 00000000..a9cb5ec8
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/RadioBackoff.nc
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Interface to request and specify backoff periods for messages
+ * 
+ * We use a call back method for setting the backoff as opposed to 
+ * events that return backoff values.  
+ * 
+ * This is because of fan-out issues with multiple components wanting to
+ * affect backoffs for whatever they're interested in:
+ * If you signal out an *event* to request an initial backoff and
+ * several components happen to be listening, then those components
+ * would be required to return a backoff value.  We don't want that
+ * behavior.
+ 
+ * With this strategy, components can listen for the requests and then
+ * decide if they want to affect the behavior.  If the component wants to
+ * affect the behavior, it calls back using the setXYZBackoff(..) command.
+ * If several components call back, then the last component to get its 
+ * word in has the final say. 
+ *
+ * @author David Moss
+ */
+ 
+interface RadioBackoff {
+
+  /**
+   * Must be called within a requestInitialBackoff event
+   * @param backoffTime the amount of time in some unspecified units to backoff
+   */
+  async command void setInitialBackoff(uint16_t backoffTime);
+  
+  /**
+   * Must be called within a requestCongestionBackoff event
+   * @param backoffTime the amount of time in some unspecified units to backoff
+   */
+  async command void setCongestionBackoff(uint16_t backoffTime);
+  
+  /**
+   * Enable CCA for the outbound packet.  Must be called within a requestCca
+   * event
+   * @param ccaOn TRUE to enable CCA, which is the default.
+   */
+  async command void setCca(bool ccaOn);
+
+
+  /**  
+   * Request for input on the initial backoff
+   * Reply using setInitialBackoff(..)
+   * @param msg pointer to the message being sent
+   */
+  async event void requestInitialBackoff(message_t * ONE msg);
+  
+  /**
+   * Request for input on the congestion backoff
+   * Reply using setCongestionBackoff(..)
+   * @param msg pointer to the message being sent
+   */
+  async event void requestCongestionBackoff(message_t * ONE msg);
+  
+  /**
+   * Request for input on whether or not to use CCA on the outbound packet.
+   * Replies should come in the form of setCca(..)
+   * @param msg pointer to the message being sent
+   */
+  async event void requestCca(message_t * ONE msg);
+}
+
diff --git a/tos/chips/cc2420/interfaces/ReceiveIndicator.nc b/tos/chips/cc2420/interfaces/ReceiveIndicator.nc
new file mode 100644
index 00000000..db2807fc
--- /dev/null
+++ b/tos/chips/cc2420/interfaces/ReceiveIndicator.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Interface to obtain energy, byte, and packet receive check readings
+ * @author David Moss
+ */
+ 
+interface ReceiveIndicator {
+  
+  /**
+   * @return TRUE if the indicator is showing we are actively receiving at this
+   * level
+   */
+  command bool isReceiving();
+  
+}
+
diff --git a/tos/chips/cc2420/link/PacketLinkC.nc b/tos/chips/cc2420/link/PacketLinkC.nc
new file mode 100644
index 00000000..829d32bc
--- /dev/null
+++ b/tos/chips/cc2420/link/PacketLinkC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Reliable Packet Link Functionality
+ * @author David Moss
+ * @author Jon Wyant
+ */
+
+#warning "*** USING PACKET LINK LAYER"
+
+configuration PacketLinkC {
+  provides {
+    interface Send;
+    interface PacketLink;
+  }
+  
+  uses {
+    interface Send as SubSend;
+  }
+}
+
+implementation {
+
+  components PacketLinkP,
+      CC2420PacketC,
+      RandomC,
+      new StateC() as SendStateC,
+      new TimerMilliC() as DelayTimerC;
+  
+  PacketLink = PacketLinkP;
+  Send = PacketLinkP.Send;
+  SubSend = PacketLinkP.SubSend;
+  
+  PacketLinkP.SendState -> SendStateC;
+  PacketLinkP.DelayTimer -> DelayTimerC;
+  PacketLinkP.PacketAcknowledgements -> CC2420PacketC;
+  PacketLinkP.CC2420PacketBody -> CC2420PacketC;
+
+}
diff --git a/tos/chips/cc2420/link/PacketLinkDummyC.nc b/tos/chips/cc2420/link/PacketLinkDummyC.nc
new file mode 100644
index 00000000..de1ef6d8
--- /dev/null
+++ b/tos/chips/cc2420/link/PacketLinkDummyC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Dummy configuration for PacketLink Layer
+ * @author David Moss
+ * @author Jon Wyant
+ */
+ 
+configuration PacketLinkDummyC {
+  provides {
+    interface Send;
+    interface PacketLink;
+  }
+  
+  uses {
+    interface Send as SubSend;
+  }
+}
+
+implementation {
+  components PacketLinkDummyP,
+      CC2420RadioC;
+  
+  PacketLink = PacketLinkDummyP;
+  Send = SubSend;
+  
+  PacketLinkDummyP.PacketAcknowledgements -> CC2420RadioC;
+  
+}
+
diff --git a/tos/chips/cc2420/link/PacketLinkDummyP.nc b/tos/chips/cc2420/link/PacketLinkDummyP.nc
new file mode 100644
index 00000000..1688da67
--- /dev/null
+++ b/tos/chips/cc2420/link/PacketLinkDummyP.nc
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Dummy module for Packet Link layer
+ * @author David Moss
+ * @author Jon Wyant
+ */
+
+module PacketLinkDummyP {
+  provides {
+    interface PacketLink;
+  }
+  
+  uses {
+    interface PacketAcknowledgements;
+  }
+}
+
+implementation {
+  
+  /***************** PacketLink Commands ***************/
+  /**
+   * Set the maximum number of times attempt message delivery
+   * Default is 0
+   * @param msg
+   * @param maxRetries the maximum number of attempts to deliver
+   *     the message
+   */
+  command void PacketLink.setRetries(message_t *msg, uint16_t maxRetries) {
+  }
+
+  /**
+   * Set a delay between each retry attempt
+   * @param msg
+   * @param retryDelay the delay betweeen retry attempts, in milliseconds
+   */
+  command void PacketLink.setRetryDelay(message_t *msg, uint16_t retryDelay) {
+  }
+
+  /** 
+   * @return the maximum number of retry attempts for this message
+   */
+  command uint16_t PacketLink.getRetries(message_t *msg) {
+    return 0;
+  }
+
+  /**
+   * @return the delay between retry attempts in ms for this message
+   */
+  command uint16_t PacketLink.getRetryDelay(message_t *msg) {
+    return 0;
+  }
+
+  /**
+   * @return TRUE if the message was delivered.
+   *     This should always be TRUE if the message was sent to the
+   *     AM_BROADCAST_ADDR
+   */
+  command bool PacketLink.wasDelivered(message_t *msg) {
+    return call PacketAcknowledgements.wasAcked(msg);
+  }
+}
+
diff --git a/tos/chips/cc2420/link/PacketLinkP.nc b/tos/chips/cc2420/link/PacketLinkP.nc
new file mode 100644
index 00000000..9cccab03
--- /dev/null
+++ b/tos/chips/cc2420/link/PacketLinkP.nc
@@ -0,0 +1,231 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Reliable Packet Link Functionality
+ * @author David Moss
+ * @author Jon Wyant
+ */
+ 
+#include "CC2420.h"
+
+module PacketLinkP {
+  provides {
+    interface Send;
+    interface PacketLink;
+  }
+  
+  uses {
+    interface Send as SubSend;
+    interface State as SendState;
+    interface PacketAcknowledgements;
+    interface Timer<TMilli> as DelayTimer;
+    interface CC2420PacketBody;
+  }
+}
+
+implementation {
+  
+  /** The message currently being sent */
+  message_t *currentSendMsg;
+  
+  /** Length of the current send message */
+  uint8_t currentSendLen;
+  
+  /** The length of the current send message */
+  uint16_t totalRetries;
+  
+  
+  /**
+   * Send States
+   */
+  enum {
+    S_IDLE,
+    S_SENDING,
+  };
+  
+  
+  /***************** Prototypes ***************/
+  task void send();
+  void signalDone(error_t error);
+    
+  /***************** PacketLink Commands ***************/
+  /**
+   * Set the maximum number of times attempt message delivery
+   * Default is 0
+   * @param msg
+   * @param maxRetries the maximum number of attempts to deliver
+   *     the message
+   */
+  command void PacketLink.setRetries(message_t *msg, uint16_t maxRetries) {
+    (call CC2420PacketBody.getMetadata(msg))->maxRetries = maxRetries;
+  }
+
+  /**
+   * Set a delay between each retry attempt
+   * @param msg
+   * @param retryDelay the delay betweeen retry attempts, in milliseconds
+   */
+  command void PacketLink.setRetryDelay(message_t *msg, uint16_t retryDelay) {
+    (call CC2420PacketBody.getMetadata(msg))->retryDelay = retryDelay;
+  }
+
+  /** 
+   * @return the maximum number of retry attempts for this message
+   */
+  command uint16_t PacketLink.getRetries(message_t *msg) {
+    return (call CC2420PacketBody.getMetadata(msg))->maxRetries;
+  }
+
+  /**
+   * @return the delay between retry attempts in ms for this message
+   */
+  command uint16_t PacketLink.getRetryDelay(message_t *msg) {
+    return (call CC2420PacketBody.getMetadata(msg))->retryDelay;
+  }
+
+  /**
+   * @return TRUE if the message was delivered.
+   */
+  command bool PacketLink.wasDelivered(message_t *msg) {
+    return call PacketAcknowledgements.wasAcked(msg);
+  }
+  
+  /***************** Send Commands ***************/
+  /**
+   * Each call to this send command gives the message a single
+   * DSN that does not change for every copy of the message
+   * sent out.  For messages that are not acknowledged, such as
+   * a broadcast address message, the receiving end does not
+   * signal receive() more than once for that message.
+   */
+  command error_t Send.send(message_t *msg, uint8_t len) {
+    error_t error;
+    if(call SendState.requestState(S_SENDING) == SUCCESS) {
+    
+      currentSendMsg = msg;
+      currentSendLen = len;
+      totalRetries = 0;
+
+      if(call PacketLink.getRetries(msg) > 0) {
+        call PacketAcknowledgements.requestAck(msg);
+      }
+     
+      if((error = call SubSend.send(msg, len)) != SUCCESS) {
+        call SendState.toIdle();
+      }
+      
+      return error;
+    }
+    return EBUSY;
+  }
+
+  command error_t Send.cancel(message_t *msg) {
+    if(currentSendMsg == msg) {
+      call SendState.toIdle();
+      return call SubSend.cancel(msg);
+    }
+    
+    return FAIL;
+  }
+  
+  
+  command uint8_t Send.maxPayloadLength() {
+    return call SubSend.maxPayloadLength();
+  }
+
+  command void *Send.getPayload(message_t* msg, uint8_t len) {
+    return call SubSend.getPayload(msg, len);
+  }
+  
+  
+  /***************** SubSend Events ***************/
+  event void SubSend.sendDone(message_t* msg, error_t error) {
+    if(call SendState.getState() == S_SENDING) {
+      totalRetries++;
+      if(call PacketAcknowledgements.wasAcked(msg)) {
+        signalDone(SUCCESS);
+        return;
+        
+      } else if(totalRetries < call PacketLink.getRetries(currentSendMsg)) {
+        
+        if(call PacketLink.getRetryDelay(currentSendMsg) > 0) {
+          // Resend after some delay
+          call DelayTimer.startOneShot(call PacketLink.getRetryDelay(currentSendMsg));
+          
+        } else {
+          // Resend immediately
+          post send();
+        }
+        
+        return;
+      }
+    }
+    
+    signalDone(error);
+  }
+  
+  
+  /***************** Timer Events ****************/  
+  /**
+   * When this timer is running, that means we're sending repeating messages
+   * to a node that is receive check duty cycling.
+   */
+  event void DelayTimer.fired() {
+    if(call SendState.getState() == S_SENDING) {
+      post send();
+    }
+  }
+  
+  /***************** Tasks ***************/
+  task void send() {
+    if(call PacketLink.getRetries(currentSendMsg) > 0) {
+      call PacketAcknowledgements.requestAck(currentSendMsg);
+    }
+    
+    if(call SubSend.send(currentSendMsg, currentSendLen) != SUCCESS) {
+      post send();
+    }
+  }
+  
+  /***************** Functions ***************/  
+  void signalDone(error_t error) {
+    call DelayTimer.stop();
+    call SendState.toIdle();
+
+    // update only if retries were explicitly asked for
+    if((call CC2420PacketBody.getMetadata(currentSendMsg))->maxRetries > 0)
+	    (call CC2420PacketBody.getMetadata(currentSendMsg))->maxRetries = totalRetries;
+
+    signal Send.sendDone(currentSendMsg, error);
+  }
+}
+
diff --git a/tos/chips/cc2420/link/readme.txt b/tos/chips/cc2420/link/readme.txt
new file mode 100644
index 00000000..6793e1d1
--- /dev/null
+++ b/tos/chips/cc2420/link/readme.txt
@@ -0,0 +1,6 @@
+PacketLink is used for link-layer retransmissions guided by your own
+application requirements.  It will fail if it receives false-acknowledgements,
+which is completely possible in 802.15.4.
+
+See TEP 127 for more details.
+
diff --git a/tos/chips/cc2420/lowpan/CC2420TinyosNetworkC.nc b/tos/chips/cc2420/lowpan/CC2420TinyosNetworkC.nc
new file mode 100644
index 00000000..cddff061
--- /dev/null
+++ b/tos/chips/cc2420/lowpan/CC2420TinyosNetworkC.nc
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Original TinyOS T-Frames use a packet header that is not compatible with
+ * other 6LowPAN networks.  They do not include the network byte 
+ * responsible for identifying the packing as being sourced from a TinyOS
+ * network.
+ *
+ * TinyOS I-Frames are interoperability packets that do include a network
+ * byte as defined by 6LowPAN specifications.  The I-Frame header type is
+ * the default packet header used in TinyOS networks.
+ *
+ * Since either packet header is acceptable, this layer must do some 
+ * preprocessing (sorry) to figure out whether or not it needs to include 
+ * the functionality to process I-frames.  If I-Frames are used, then
+ * the network byte is added on the way out and checked on the way in.
+ * If the packet came from a network different from a TinyOS network, the
+ * user may access it through the DispatchP's NonTinyosReceive[] Receive 
+ * interface and process it in a different radio stack.
+ *
+ * If T-Frames are used instead, this layer is simply pass-through wiring to the
+ * layer beneath.  
+ *
+ * Define "CC2420_IFRAME_TYPE" to use the interoperability frame and 
+ * this layer
+ * 
+ * @author David Moss
+ */
+ 
+#include "CC2420.h"
+#include "Ieee154.h"
+
+configuration CC2420TinyosNetworkC {
+  provides {
+    interface Resource[uint8_t clientId];
+    interface Send;
+    interface Receive;
+
+    interface Send as ActiveSend;
+    interface Receive as ActiveReceive;
+
+    interface Packet as BarePacket;
+  }
+  
+  uses {
+    interface Receive as SubReceive;
+    interface Send as SubSend;
+  }
+}
+
+implementation {
+
+  enum {
+    TINYOS_N_NETWORKS = uniqueCount(RADIO_SEND_RESOURCE),
+  };
+
+  components MainC;
+  components CC2420TinyosNetworkP;
+  components CC2420PacketC;
+  components new FcfsResourceQueueC(TINYOS_N_NETWORKS);
+
+  CC2420TinyosNetworkP.BareSend = Send;
+  CC2420TinyosNetworkP.BareReceive = Receive;
+  CC2420TinyosNetworkP.BarePacket = BarePacket;
+  CC2420TinyosNetworkP.SubSend = SubSend;
+  CC2420TinyosNetworkP.SubReceive = SubReceive;
+  CC2420TinyosNetworkP.Resource = Resource;
+  CC2420TinyosNetworkP.ActiveSend = ActiveSend;
+  CC2420TinyosNetworkP.ActiveReceive = ActiveReceive;
+
+  CC2420TinyosNetworkP.CC2420Packet -> CC2420PacketC;
+  CC2420TinyosNetworkP.CC2420PacketBody -> CC2420PacketC;
+  CC2420TinyosNetworkP.Queue -> FcfsResourceQueueC;
+
+  MainC.SoftwareInit -> FcfsResourceQueueC;
+}
+
diff --git a/tos/chips/cc2420/lowpan/CC2420TinyosNetworkP.nc b/tos/chips/cc2420/lowpan/CC2420TinyosNetworkP.nc
new file mode 100644
index 00000000..a8ddc14f
--- /dev/null
+++ b/tos/chips/cc2420/lowpan/CC2420TinyosNetworkP.nc
@@ -0,0 +1,257 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Fills in the network ID byte for outgoing packets for compatibility with
+ * other 6LowPAN networks.  Filters incoming packets that are not
+ * TinyOS network compatible.  Provides the 6LowpanSnoop interface to
+ * sniff for packets that were not originated from TinyOS.
+ *
+ * @author David Moss
+ */
+
+#include "CC2420.h"
+#include "Ieee154.h"
+
+module CC2420TinyosNetworkP @safe() {
+  provides {
+    interface Resource[uint8_t client];
+
+    interface Send as BareSend;
+    interface Receive as BareReceive;
+
+    interface Send as ActiveSend;
+    interface Receive as ActiveReceive;
+
+    interface Packet as BarePacket;
+  }
+  
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    interface CC2420Packet;
+    interface CC2420PacketBody;
+    interface ResourceQueue as Queue;
+  }
+}
+
+implementation {
+
+  enum {
+    OWNER_NONE = 0xff,
+    TINYOS_N_NETWORKS = uniqueCount("RADIO_SEND_RESOURCE"),
+  } state;
+
+  enum {
+    CLIENT_AM,
+    CLIENT_BARE,
+  } m_busy_client;
+
+  norace uint8_t resource_owner = OWNER_NONE, next_owner;
+
+  command error_t ActiveSend.send(message_t* msg, uint8_t len) {
+    call CC2420Packet.setNetwork(msg, TINYOS_6LOWPAN_NETWORK_ID);
+    m_busy_client = CLIENT_AM;
+    return call SubSend.send(msg, len);
+  }
+
+  command error_t ActiveSend.cancel(message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  command uint8_t ActiveSend.maxPayloadLength() {
+    return call SubSend.maxPayloadLength();
+  }
+
+  command void* ActiveSend.getPayload(message_t* msg, uint8_t len) {
+    if (len <= call ActiveSend.maxPayloadLength()) {
+      return msg->data;
+    } else {
+      return NULL;
+    }
+  }
+  /***************** BarePacket Commands ****************/
+  command void BarePacket.clear(message_t *msg) {
+    memset(msg, 0, sizeof(message_t));
+  }
+
+  command uint8_t BarePacket.payloadLength(message_t *msg) {
+    cc2420_header_t *hdr = call CC2420PacketBody.getHeader(msg);
+    return hdr->length + 1 - MAC_FOOTER_SIZE;
+  }
+
+  command void BarePacket.setPayloadLength(message_t* msg, uint8_t len) {
+    cc2420_header_t *hdr = call CC2420PacketBody.getHeader(msg);
+    hdr->length = len - 1 + MAC_FOOTER_SIZE;
+  }
+
+  command uint8_t BarePacket.maxPayloadLength() {
+    return TOSH_DATA_LENGTH + sizeof(cc2420_header_t);
+  }
+
+  command void* BarePacket.getPayload(message_t* msg, uint8_t len) {
+
+  }
+  /***************** Send Commands ****************/
+  command error_t BareSend.send(message_t* msg, uint8_t len) {
+    call BarePacket.setPayloadLength(msg, len);
+    m_busy_client = CLIENT_BARE;
+    return call SubSend.send(msg, 0);
+  }
+
+  command error_t BareSend.cancel(message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  command uint8_t BareSend.maxPayloadLength() {
+    return call BarePacket.maxPayloadLength();
+  }
+
+  command void* BareSend.getPayload(message_t* msg, uint8_t len) {
+#ifndef TFRAMES_ENABLED                      
+    cc2420_header_t *hdr = call CC2420PacketBody.getHeader(msg);
+    return hdr;
+#else
+    // you really can't use BareSend with TFRAMES
+#endif
+  }
+  
+  /***************** SubSend Events *****************/
+  event void SubSend.sendDone(message_t* msg, error_t error) {
+    if (m_busy_client == CLIENT_AM) {
+      signal ActiveSend.sendDone(msg, error);
+    } else {
+      signal BareSend.sendDone(msg, error);
+    }
+  }
+
+  /***************** SubReceive Events ***************/
+  event message_t *SubReceive.receive(message_t *msg, void *payload, uint8_t len) {
+    uint8_t network = call CC2420Packet.getNetwork(msg);
+
+    if(!(call CC2420PacketBody.getMetadata(msg))->crc) {
+      return msg;
+    }
+#ifndef TFRAMES_ENABLED
+    if (network == TINYOS_6LOWPAN_NETWORK_ID) {
+      return signal ActiveReceive.receive(msg, payload, len);
+    } else {
+      return signal BareReceive.receive(msg, 
+                                        call BareSend.getPayload(msg, len), 
+                                        len + sizeof(cc2420_header_t));
+    }
+#else
+    return signal ActiveReceive.receive(msg, payload, len);
+#endif
+  }
+
+  /***************** Resource ****************/
+  // SDH : 8-7-2009 : testing if there's more then one client allows
+  // the compiler to eliminate most of the logic when there's only one
+  // client.
+  task void grantTask() {
+
+
+    if (TINYOS_N_NETWORKS > 1) {
+      if (resource_owner == OWNER_NONE && !(call Queue.isEmpty())) {
+        resource_owner = call Queue.dequeue();
+
+        if (resource_owner != OWNER_NONE) {
+          signal Resource.granted[resource_owner]();
+        }
+      }
+    } else {
+      if (next_owner != resource_owner) {
+        resource_owner = next_owner;
+        signal Resource.granted[resource_owner]();
+      }
+    }
+  }
+
+  async command error_t Resource.request[uint8_t id]() {
+
+    post grantTask();
+
+    if (TINYOS_N_NETWORKS > 1) {
+      return call Queue.enqueue(id);
+    } else {
+      if (id == resource_owner) {
+        return EALREADY;
+      } else {
+        next_owner = id;
+        return SUCCESS;
+      }
+    }
+  }
+
+  async command error_t Resource.immediateRequest[uint8_t id]() {
+    if (resource_owner == id) return EALREADY;
+
+    if (TINYOS_N_NETWORKS > 1) {
+      if (resource_owner == OWNER_NONE && call Queue.isEmpty()) {
+        resource_owner = id;
+        return SUCCESS;
+      }
+      return FAIL;
+    } else {
+      resource_owner = id;
+      return SUCCESS;
+    }
+  }
+  async command error_t Resource.release[uint8_t id]() {
+    if (TINYOS_N_NETWORKS > 1) {
+      post grantTask();
+    }
+    resource_owner = OWNER_NONE;
+    return SUCCESS;
+  }
+  async command bool Resource.isOwner[uint8_t id]() {
+    return (id == resource_owner);
+  }
+
+  /***************** Defaults ****************/
+  default event message_t *BareReceive.receive(message_t *msg, void *payload, uint8_t len) {
+    return msg;
+  }
+  default event void BareSend.sendDone(message_t *msg, error_t error) {
+
+  }
+  default event message_t *ActiveReceive.receive(message_t *msg, void *payload, uint8_t len) {
+    return msg;
+  }
+  default event void ActiveSend.sendDone(message_t *msg, error_t error) {
+
+  }
+  default event void Resource.granted[uint8_t client]() {
+    call Resource.release[client]();
+  }
+
+}
diff --git a/tos/chips/cc2420/lowpan/readme.txt b/tos/chips/cc2420/lowpan/readme.txt
new file mode 100644
index 00000000..70812778
--- /dev/null
+++ b/tos/chips/cc2420/lowpan/readme.txt
@@ -0,0 +1 @@
+See TEP 125 for more information.
diff --git a/tos/chips/cc2420/lpl/DefaultLpl.h b/tos/chips/cc2420/lpl/DefaultLpl.h
new file mode 100644
index 00000000..760ece79
--- /dev/null
+++ b/tos/chips/cc2420/lpl/DefaultLpl.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+ /**
+  * @author David Moss
+  * @author Tony O'Donovan
+  */
+#ifndef DEFAULTLPL_H
+#define DEFAULTLPL_H
+
+/**
+ * Low Power Listening Send States
+ */
+typedef enum {
+  S_LPL_NOT_SENDING,    // DEFAULT
+  S_LPL_FIRST_MESSAGE,  // 1. Sending the first message
+  S_LPL_SENDING,        // 2. Sending all other messages
+  S_LPL_CLEAN_UP,       // 3. Clean up the transmission
+} lpl_sendstate_t;
+
+
+/**
+ * This is a measured value of the time in ms the radio is actually on
+ * We round this up to err on the side of better performance ratios
+ * This includes the acknowledgement wait period and backoffs,
+ * which can typically be much longer than the transmission.
+ * 
+ * Measured by Tony O'Donovan
+ */
+#ifndef DUTY_ON_TIME
+#define DUTY_ON_TIME 11 
+#endif
+
+/**
+ * The maximum number of CCA checks performed on each wakeup.
+ * If there are too few, the receiver may wake up between messages
+ * and not detect the transmitter.
+ *
+ * The on-time had to increase from the original version to allow multiple
+ * transmitters to co-exist.  This is due to using ack's, which then requires us
+ * to extend the backoff period.  In networks that transmit frequently, possibly
+ * with multiple transmitters, this power scheme makes sense.  
+ *
+ * In networks that transmit very infrequently or without multiple transmitters,
+ * it makes more sense to go with no acks and no backoffs and make the
+ * receive check as short as possible.
+ */
+#ifndef MAX_LPL_CCA_CHECKS
+
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_TMOTE)
+#define MAX_LPL_CCA_CHECKS 400
+#else
+#define MAX_LPL_CCA_CHECKS 400
+#endif
+
+#endif
+
+/**
+ * The minimum number of samples that must be taken in CC2420DutyCycleP
+ * that show the channel is not clear before a detection event is issued
+ */
+#ifndef MIN_SAMPLES_BEFORE_DETECT
+#define MIN_SAMPLES_BEFORE_DETECT 3
+#endif
+
+#endif
+
diff --git a/tos/chips/cc2420/lpl/DefaultLplC.nc b/tos/chips/cc2420/lpl/DefaultLplC.nc
new file mode 100644
index 00000000..b18b08a5
--- /dev/null
+++ b/tos/chips/cc2420/lpl/DefaultLplC.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Low Power Listening for the CC2420
+ * @author David Moss
+ */
+
+
+#include "DefaultLpl.h"
+#warning "*** USING DEFAULT LOW POWER COMMUNICATIONS ***"
+
+configuration DefaultLplC {
+  provides {
+    interface LowPowerListening;
+    interface Send;
+    interface Receive;
+    interface SplitControl;
+    interface State as SendState;
+  }
+  
+  uses { 
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    interface SplitControl as SubControl;
+  }
+}
+
+implementation {
+  components MainC,
+      DefaultLplP,
+      PowerCycleC,
+      CC2420RadioC,
+      CC2420CsmaC,
+      CC2420TransmitC,
+      CC2420PacketC,
+      RandomC,
+      new StateC() as SendStateC,
+      new TimerMilliC() as OffTimerC,
+      new TimerMilliC() as SendDoneTimerC,
+      SystemLowPowerListeningC,
+      LedsC;
+  
+  LowPowerListening = DefaultLplP;
+  Send = DefaultLplP;
+  Receive = DefaultLplP;
+  SplitControl = PowerCycleC;
+  SendState = SendStateC;
+  
+  SubControl = DefaultLplP.SubControl;
+  SubReceive = DefaultLplP.SubReceive;
+  SubSend = DefaultLplP.SubSend;
+  
+  
+  MainC.SoftwareInit -> DefaultLplP;
+  
+  
+  DefaultLplP.SplitControlState -> PowerCycleC.SplitControlState;
+  DefaultLplP.RadioPowerState -> PowerCycleC.RadioPowerState;
+  DefaultLplP.SendState -> SendStateC;
+  DefaultLplP.OffTimer -> OffTimerC;
+  DefaultLplP.SendDoneTimer -> SendDoneTimerC;
+  DefaultLplP.PowerCycle -> PowerCycleC;
+  DefaultLplP.Resend -> CC2420TransmitC;
+  DefaultLplP.PacketAcknowledgements -> CC2420RadioC;
+  DefaultLplP.CC2420PacketBody -> CC2420PacketC;
+  DefaultLplP.RadioBackoff -> CC2420CsmaC;
+  DefaultLplP.Random -> RandomC;
+  DefaultLplP.Leds -> LedsC;
+  DefaultLplP.SystemLowPowerListening -> SystemLowPowerListeningC;
+}
diff --git a/tos/chips/cc2420/lpl/DefaultLplP.nc b/tos/chips/cc2420/lpl/DefaultLplP.nc
new file mode 100644
index 00000000..4c5c63b4
--- /dev/null
+++ b/tos/chips/cc2420/lpl/DefaultLplP.nc
@@ -0,0 +1,415 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Low Power Listening for the CC2420.  This component is responsible for
+ * delivery of an LPL packet, and for turning off the radio when the radio
+ * has run out of tasks.
+ *
+ * The PowerCycle component is responsible for duty cycling the radio
+ * and performing receive detections.
+ *
+ * @author David Moss
+ */
+
+#include "Lpl.h"
+#include "DefaultLpl.h"
+#include "AM.h"
+
+module DefaultLplP {
+  provides {
+    interface Init;
+    interface LowPowerListening;
+    interface Send;
+    interface Receive;
+  }
+  
+  uses {
+    interface Send as SubSend;
+    interface CC2420Transmit as Resend;
+    interface RadioBackoff;
+    interface Receive as SubReceive;
+    interface SplitControl as SubControl;
+    interface PowerCycle;
+    interface CC2420PacketBody;
+    interface PacketAcknowledgements;
+    interface State as SendState;
+    interface State as RadioPowerState;
+    interface State as SplitControlState;
+    interface Timer<TMilli> as OffTimer;
+    interface Timer<TMilli> as SendDoneTimer;
+    interface Random;
+    interface Leds;
+    interface SystemLowPowerListening;
+  }
+}
+
+implementation {
+  
+  /** The message currently being sent */
+  norace message_t *currentSendMsg;
+  
+  /** The length of the current send message */
+  uint8_t currentSendLen;
+  
+  /** TRUE if the radio is duty cycling and not always on */
+  bool dutyCycling;
+
+  /**
+   * Radio Power State
+   */
+  enum {
+    S_OFF, // off by default
+    S_TURNING_ON,
+    S_ON,
+    S_TURNING_OFF,
+  };
+  
+  /**
+   * Send States
+   */
+  enum {
+    S_IDLE,
+    S_SENDING,
+  };
+  
+  enum {
+    ONE_MESSAGE = 0,
+  };
+  
+  /***************** Prototypes ***************/
+  task void send();
+  task void resend();
+  task void startRadio();
+  task void stopRadio();
+  
+  void initializeSend();
+  void startOffTimer();
+  
+  /***************** Init Commands ***************/
+  command error_t Init.init() {
+    dutyCycling = FALSE;
+    return SUCCESS;
+  }
+  
+  /***************** LowPowerListening Commands ***************/
+  /**
+   * Set this this node's radio wakeup interval, in milliseconds.
+   * Once every interval, the node will sleep and perform an Rx check 
+   * on the radio.  Setting the wakeup interval to 0 will keep the radio
+   * always on.
+   *
+   * @param intervalMs the length of this node's wakeup interval, in [ms]
+   */
+  command void LowPowerListening.setLocalWakeupInterval(uint16_t intervalMs) {
+    call PowerCycle.setSleepInterval(intervalMs);
+  }
+  
+  /**
+   * @return the local node's wakeup interval, in [ms]
+   */
+  command uint16_t LowPowerListening.getLocalWakeupInterval() {
+    return call PowerCycle.getSleepInterval();
+  }
+  
+  /**
+   * Configure this outgoing message so it can be transmitted to a neighbor mote
+   * with the specified wakeup interval.
+   * @param msg Pointer to the message that will be sent
+   * @param intervalMs The receiving node's wakeup interval, in [ms]
+   */
+  command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, 
+      uint16_t intervalMs) {
+    (call CC2420PacketBody.getMetadata(msg))->rxInterval = intervalMs;
+  }
+  
+  /**
+   * @return the destination node's wakeup interval configured in this message
+   */
+  command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) {
+    return (call CC2420PacketBody.getMetadata(msg))->rxInterval;
+  }
+  
+  /***************** Send Commands ***************/
+  /**
+   * Each call to this send command gives the message a single
+   * DSN that does not change for every copy of the message
+   * sent out.  For messages that are not acknowledged, such as
+   * a broadcast address message, the receiving end does not
+   * signal receive() more than once for that message.
+   */
+  command error_t Send.send(message_t *msg, uint8_t len) {
+    if(call SplitControlState.getState() == S_OFF) {
+      // Everything is off right now, start SplitControl and try again
+      return EOFF;
+    }
+    
+    if(call SendState.requestState(S_LPL_SENDING) == SUCCESS) {
+      currentSendMsg = msg;
+      currentSendLen = len;
+      
+      // In case our off timer is running...
+      call OffTimer.stop();
+      call SendDoneTimer.stop();
+      
+      if(call RadioPowerState.getState() == S_ON) {
+        initializeSend();
+        return SUCCESS;
+        
+      } else {
+        post startRadio();
+      }
+      
+      return SUCCESS;
+    }
+    
+    return EBUSY;
+  }
+
+  command error_t Send.cancel(message_t *msg) {
+    if(currentSendMsg == msg) {
+      call SendState.toIdle();
+      call SendDoneTimer.stop();
+      startOffTimer();
+      return call SubSend.cancel(msg);
+    }
+    
+    return FAIL;
+  }
+  
+  
+  command uint8_t Send.maxPayloadLength() {
+    return call SubSend.maxPayloadLength();
+  }
+
+  command void *Send.getPayload(message_t* msg, uint8_t len) {
+    return call SubSend.getPayload(msg, len);
+  }
+  
+  
+  /***************** RadioBackoff Events ****************/
+  async event void RadioBackoff.requestInitialBackoff(message_t *msg) {
+    if((call CC2420PacketBody.getMetadata(msg))->rxInterval 
+        > ONE_MESSAGE) {
+      call RadioBackoff.setInitialBackoff( call Random.rand16() 
+          % (0x4 * CC2420_BACKOFF_PERIOD) + CC2420_MIN_BACKOFF);
+    }
+  }
+  
+  async event void RadioBackoff.requestCongestionBackoff(message_t *msg) {
+    if((call CC2420PacketBody.getMetadata(msg))->rxInterval 
+        > ONE_MESSAGE) {
+      call RadioBackoff.setCongestionBackoff( call Random.rand16() 
+          % (0x3 * CC2420_BACKOFF_PERIOD) + CC2420_MIN_BACKOFF);
+    }
+  }
+  
+  async event void RadioBackoff.requestCca(message_t *msg) {
+  }
+  
+
+  /***************** DutyCycle Events ***************/
+  /**
+   * A transmitter was detected.  You must now take action to
+   * turn the radio off when the transaction is complete.
+   */
+  event void PowerCycle.detected() {
+    // At this point, the duty cycling has been disabled temporary
+    // and it will be this component's job to turn the radio back off
+    // Wait long enough to see if we actually receive a packet, which is
+    // just a little longer in case there is more than one lpl transmitter on
+    // the channel.
+    
+    startOffTimer();
+  }
+  
+  
+  /***************** SubControl Events ***************/
+  event void SubControl.startDone(error_t error) {
+    if(!error) {
+      call RadioPowerState.forceState(S_ON);
+      
+      if(call SendState.getState() == S_LPL_FIRST_MESSAGE
+          || call SendState.getState() == S_LPL_SENDING) {
+        initializeSend();
+      }
+    }
+  }
+    
+  event void SubControl.stopDone(error_t error) {
+    if(!error) {
+
+      if(call SendState.getState() == S_LPL_FIRST_MESSAGE
+          || call SendState.getState() == S_LPL_SENDING) {
+        // We're in the middle of sending a message; start the radio back up
+        post startRadio();
+        
+      } else {        
+        call OffTimer.stop();
+        call SendDoneTimer.stop();
+      }
+    }
+  }
+  
+  /***************** SubSend Events ***************/
+  event void SubSend.sendDone(message_t* msg, error_t error) {
+   
+    switch(call SendState.getState()) {
+    case S_LPL_SENDING:
+      if(call SendDoneTimer.isRunning()) {
+        if(!call PacketAcknowledgements.wasAcked(msg)) {
+          post resend();
+          return;
+        }
+      }
+      break;
+      
+    case S_LPL_CLEAN_UP:
+      /**
+       * We include this state so upper layers can't send a different message
+       * before the last message gets done sending
+       */
+      break;
+      
+    default:
+      break;
+    }  
+    
+    call SendState.toIdle();
+    call SendDoneTimer.stop();
+    startOffTimer();
+    signal Send.sendDone(msg, error);
+  }
+  
+  /***************** SubReceive Events ***************/
+  /**
+   * If the received message is new, we signal the receive event and
+   * start the off timer.  If the last message we received had the same
+   * DSN as this message, then the chances are pretty good
+   * that this message should be ignored, especially if the destination address
+   * as the broadcast address
+   */
+  event message_t *SubReceive.receive(message_t* msg, void* payload, 
+      uint8_t len) {
+    startOffTimer();
+    return signal Receive.receive(msg, payload, len);
+  }
+  
+  /***************** Timer Events ****************/
+  event void OffTimer.fired() {    
+    /*
+     * Only stop the radio if the radio is supposed to be off permanently
+     * or if the duty cycle is on and our sleep interval is not 0
+     */
+    if(call SplitControlState.getState() == S_OFF
+        || (call PowerCycle.getSleepInterval() > 0
+            && call SplitControlState.getState() != S_OFF
+                && call SendState.getState() == S_LPL_NOT_SENDING)) { 
+      post stopRadio();
+    }
+  }
+  
+  /**
+   * When this timer is running, that means we're sending repeating messages
+   * to a node that is receive check duty cycling.
+   */
+  event void SendDoneTimer.fired() {
+    if(call SendState.getState() == S_LPL_SENDING) {
+      // The next time SubSend.sendDone is signaled, send is complete.
+      call SendState.forceState(S_LPL_CLEAN_UP);
+    }
+  }
+  
+  /***************** Resend Events ****************/
+  /**
+   * Signal that a message has been sent
+   *
+   * @param p_msg message to send.
+   * @param error notifaction of how the operation went.
+   */
+  async event void Resend.sendDone( message_t* p_msg, error_t error ) {
+    // This is actually caught by SubSend.sendDone
+  }
+  
+  
+  /***************** Tasks ***************/
+  task void send() {
+    if(call SubSend.send(currentSendMsg, currentSendLen) != SUCCESS) {
+      post send();
+    }
+  }
+  
+  task void resend() {
+    if(call Resend.resend(TRUE) != SUCCESS) {
+      post resend();
+    }
+  }
+  
+  task void startRadio() {
+    if(call SubControl.start() != SUCCESS) {
+      post startRadio();
+    }
+  }
+  
+  task void stopRadio() {
+    if(call SendState.getState() == S_LPL_NOT_SENDING) {
+      if(call SubControl.stop() != SUCCESS) {
+        post stopRadio();
+      }
+    }
+  }
+  
+  /***************** Functions ***************/
+  void initializeSend() {
+    if(call LowPowerListening.getRemoteWakeupInterval(currentSendMsg) 
+      > ONE_MESSAGE) {
+    
+      if((call CC2420PacketBody.getHeader(currentSendMsg))->dest == IEEE154_BROADCAST_ADDR) {
+        call PacketAcknowledgements.noAck(currentSendMsg);
+      } else {
+        // Send it repetitively within our transmit window
+        call PacketAcknowledgements.requestAck(currentSendMsg);
+      }
+
+      call SendDoneTimer.startOneShot(
+          call LowPowerListening.getRemoteWakeupInterval(currentSendMsg) + 20);
+    }
+        
+    post send();
+  }
+  
+  
+  void startOffTimer() {
+    call OffTimer.startOneShot(call SystemLowPowerListening.getDelayAfterReceive());
+  }
+  
+}
+
diff --git a/tos/chips/cc2420/lpl/DummyLplC.nc b/tos/chips/cc2420/lpl/DummyLplC.nc
new file mode 100644
index 00000000..3d9683bd
--- /dev/null
+++ b/tos/chips/cc2420/lpl/DummyLplC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Dummy low power listening interface used when LowPowerListening is not
+ * compiled in with the application.
+ * Sleep interval is always 0, and duty cycle is always 100%
+ * @author David Moss
+ */
+
+#warning "*** LOW POWER COMMUNICATIONS DISABLED ***"
+
+configuration DummyLplC {
+  provides {
+    interface Send;
+    interface Receive;
+    interface LowPowerListening;
+    interface SplitControl;
+    interface State as SendState;
+  }
+  
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    interface SplitControl as SubControl;
+  }
+}
+
+implementation {
+  components DummyLplP;
+  components new StateC();
+  
+  Send = SubSend;
+  Receive = SubReceive;
+  SplitControl = SubControl;
+  LowPowerListening = DummyLplP;
+  SendState = StateC;
+  
+}
+
diff --git a/tos/chips/cc2420/lpl/DummyLplP.nc b/tos/chips/cc2420/lpl/DummyLplP.nc
new file mode 100644
index 00000000..36a79ffa
--- /dev/null
+++ b/tos/chips/cc2420/lpl/DummyLplP.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Dummy low power listening interface used when LowPowerListening is not
+ * compiled in with the application.
+ * Wakeup interval is always 0 (always on)
+ * @author David Moss
+ */
+ 
+module DummyLplP {
+  provides {
+    interface LowPowerListening;
+  }
+}
+
+implementation {
+
+  command void LowPowerListening.setLocalWakeupInterval(uint16_t intervalMs) {
+  }
+  
+  command uint16_t LowPowerListening.getLocalWakeupInterval() {
+    return 0;
+  }
+  
+  command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t intervalMs) {
+  }
+  
+  command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) {
+    return 0;
+  }
+  
+}
+
diff --git a/tos/chips/cc2420/lpl/PowerCycleC.nc b/tos/chips/cc2420/lpl/PowerCycleC.nc
new file mode 100644
index 00000000..971cf15a
--- /dev/null
+++ b/tos/chips/cc2420/lpl/PowerCycleC.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Use this component to duty cycle the radio. When a message is heard, 
+ * disable DutyCycling.
+ *
+ * @author David Moss dmm@rincon.com
+ */
+
+configuration PowerCycleC {
+  provides {
+    interface PowerCycle;
+    interface SplitControl;
+    interface State as SplitControlState;
+    interface State as RadioPowerState;
+  }
+}
+
+implementation {
+  components PowerCycleP,
+      CC2420TransmitC,
+      CC2420ReceiveC,
+      CC2420CsmaC,
+      LedsC,
+      new StateC() as RadioPowerStateC,
+      new StateC() as SplitControlStateC,
+      new TimerMilliC() as OnTimerC,
+      new TimerMilliC() as CheckTimerC;
+
+#if defined(LOW_POWER_LISTENING) || defined(ACK_LOW_POWER_LISTENING)
+  components DefaultLplC as LplC;
+#else
+  components DummyLplC as LplC;
+#endif
+
+  PowerCycle = PowerCycleP;
+  SplitControl = PowerCycleP;
+  SplitControlState = SplitControlStateC;
+  RadioPowerState = RadioPowerStateC;
+  
+  PowerCycleP.EnergyIndicator -> CC2420TransmitC.EnergyIndicator;
+  PowerCycleP.ByteIndicator -> CC2420TransmitC.ByteIndicator;
+  PowerCycleP.PacketIndicator -> CC2420ReceiveC.PacketIndicator;
+  PowerCycleP.SubControl -> CC2420CsmaC;
+  PowerCycleP.SendState -> LplC;
+  PowerCycleP.RadioPowerState -> RadioPowerStateC;
+  PowerCycleP.SplitControlState -> SplitControlStateC;
+  PowerCycleP.OnTimer -> OnTimerC;
+  PowerCycleP.Leds -> LedsC;
+}
+
+
diff --git a/tos/chips/cc2420/lpl/PowerCycleP.nc b/tos/chips/cc2420/lpl/PowerCycleP.nc
new file mode 100644
index 00000000..741224ce
--- /dev/null
+++ b/tos/chips/cc2420/lpl/PowerCycleP.nc
@@ -0,0 +1,312 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/** 
+ * Module to duty cycle the radio on and off, performing CCA receive checks.
+ * When a carrier is sensed, this will leave the radio on. It is then up
+ * to higher layers to turn the radio off again.  Once the radio is turned
+ * off, this module will automatically continue duty cycling and looking for
+ * a modulated signal.
+ *
+ * Suggested TODO's:
+ *  > TransmitC and ReceiveC provide Energy, Byte, and Packet indicators.
+ *    Tap into those to add more detection levels and granularity. Only let
+ *    the radio turn off when we're not actively receiving bytes.  Right now
+ *    the packet indicator is a little backwards.
+ *  > Let one component be in charge of maintaining State information about
+ *    the power of the radio, probably lower in the stack.
+ *  > Wire SplitControl, Send, and Receive through this component.  Make it
+ *    responsible for packet-level detections and being completely responsible
+ *    for controlling the power of the radio without the use of upper layers
+ *  > Remove unnecessary State components and Timers.
+ *
+ * @author David Moss
+ */
+
+#include "DefaultLpl.h"
+
+module PowerCycleP {
+  provides {
+    interface PowerCycle;
+    interface SplitControl;
+  }
+
+  uses {
+    interface Timer<TMilli> as OnTimer;
+    interface SplitControl as SubControl;
+    interface State as RadioPowerState;
+    interface State as SplitControlState;
+    interface State as SendState;
+    interface Leds;
+    interface ReceiveIndicator as EnergyIndicator;
+    interface ReceiveIndicator as ByteIndicator;
+    interface ReceiveIndicator as PacketIndicator;
+  }
+}
+
+implementation {
+  
+  /** The current period of the duty cycle, equivalent of wakeup interval */
+  uint16_t sleepInterval = LPL_DEF_LOCAL_WAKEUP;
+  
+  /** The number of times the CCA has been sampled in this wakeup period */
+  uint16_t ccaChecks;
+  
+  /**
+   * Radio Power, Check State, and Duty Cycling State
+   */
+  enum {
+    S_OFF, // off by default
+    S_TURNING_ON,
+    S_ON,
+    S_TURNING_OFF,
+  };
+  
+  
+  /***************** Prototypes ****************/
+  task void stopRadio();
+  task void startRadio();
+  task void getCca();
+  
+  bool finishSplitControlRequests();
+  bool isDutyCycling();
+  
+  /***************** PowerCycle Commands ****************/
+  /**
+   * Set the sleep interval, in binary milliseconds
+   * @param sleepIntervalMs the sleep interval in [ms]
+   */
+  command void PowerCycle.setSleepInterval(uint16_t sleepIntervalMs) {
+    if (!sleepInterval && sleepIntervalMs) {
+      // We were always on, now lets duty cycle
+      post stopRadio();  // Might want to delay turning off the radio
+    }
+    
+    sleepInterval = sleepIntervalMs;
+    
+    if(sleepInterval == 0 && call SplitControlState.isState(S_ON)) {
+      /*
+       * Leave the radio on permanently if sleepInterval == 0 and the radio is 
+       * supposed to be enabled
+       */
+      if(call RadioPowerState.getState() == S_OFF) {
+        call SubControl.start();
+      }
+    }
+  }
+  
+  /**
+   * @return the sleep interval in [ms]
+   */
+  command uint16_t PowerCycle.getSleepInterval() {
+    return sleepInterval;
+  }
+  
+  
+  /***************** SplitControl Commands ****************/
+  command error_t SplitControl.start() {
+    if(call SplitControlState.isState(S_ON)) {
+      return EALREADY;
+      
+    } else if(call SplitControlState.isState(S_TURNING_ON)) {
+      return SUCCESS;
+    
+    } else if(!call SplitControlState.isState(S_OFF)) {
+      return EBUSY;
+    }
+    
+    // Radio was off, now has been told to turn on or duty cycle.
+    call SplitControlState.forceState(S_TURNING_ON);
+    
+    if(sleepInterval > 0) {
+      // Begin duty cycling
+      post stopRadio();
+      return SUCCESS;
+      
+    } else {
+      post startRadio();
+      return SUCCESS;
+    }
+  }
+  
+  command error_t SplitControl.stop() {
+    if(call SplitControlState.isState(S_OFF)) {
+      return EALREADY;
+      
+    } else if(call SplitControlState.isState(S_TURNING_OFF)) {
+      return SUCCESS;
+    
+    } else if(!call SplitControlState.isState(S_ON)) {
+      return EBUSY;
+    }
+    
+    call SplitControlState.forceState(S_TURNING_OFF);
+    post stopRadio();
+    return SUCCESS;
+  }
+  
+  /***************** Timer Events ****************/
+  event void OnTimer.fired() {
+    if(isDutyCycling()) {
+      if(call RadioPowerState.getState() == S_OFF) {
+        ccaChecks = 0;
+        
+         /*
+          * Turn on the radio only after the uC is fully awake.  ATmega128's 
+          * have this issue when running on an external crystal.
+          */
+         post getCca();
+        
+      } else {
+        // Someone else turned on the radio, try again in awhile
+        call OnTimer.startOneShot(sleepInterval);
+      }
+    }
+  }
+  
+  /***************** SubControl Events ****************/
+  event void SubControl.startDone(error_t error) {
+    call RadioPowerState.forceState(S_ON);
+    //call Leds.led2On();
+    
+    if(finishSplitControlRequests()) {
+      return;
+      
+    } else if(isDutyCycling()) {
+      post getCca();
+    }
+  }
+  
+  event void SubControl.stopDone(error_t error) {
+    call RadioPowerState.forceState(S_OFF);
+    //call Leds.led2Off();
+    
+    if(finishSplitControlRequests()) {
+      return;
+      
+    } else if(isDutyCycling()) {
+      call OnTimer.startOneShot(sleepInterval);
+    }
+    
+  }
+  
+  
+  /***************** Tasks ****************/
+  task void stopRadio() {
+    error_t error = call SubControl.stop();
+    if(error != SUCCESS) {
+      // Already stopped?
+      finishSplitControlRequests();
+      call OnTimer.startOneShot(sleepInterval);
+    }
+  }
+  
+  task void startRadio() {
+    if(call SubControl.start() != SUCCESS) {
+      post startRadio();
+    }
+  }
+  
+  task void getCca() {
+    uint8_t detects = 0;
+    if(isDutyCycling()) {
+      
+      ccaChecks++;
+      if(ccaChecks == 1) {
+        // Microcontroller is ready, turn on the radio and sample a few times
+        post startRadio();
+        return;
+      }
+
+      atomic {
+        for( ; ccaChecks < MAX_LPL_CCA_CHECKS && call SendState.isIdle(); ccaChecks++) {
+          if(call PacketIndicator.isReceiving()) {
+            signal PowerCycle.detected();
+            return;
+          }
+          
+          if(call EnergyIndicator.isReceiving()) {
+            detects++;
+            if(detects > MIN_SAMPLES_BEFORE_DETECT) {
+              signal PowerCycle.detected(); 
+              return;
+            }
+            // Leave the radio on for upper layers to perform some transaction
+          }
+        }
+      }
+      
+      if(call SendState.isIdle()) {
+        post stopRadio();
+      }
+    }  
+  }
+  
+  /**
+   * @return TRUE if the radio should be actively duty cycling
+   */
+  bool isDutyCycling() {
+    return sleepInterval > 0 && call SplitControlState.isState(S_ON);
+  }
+  
+  
+  /**
+   * @return TRUE if we successfully handled a SplitControl request
+   */
+  bool finishSplitControlRequests() {
+    if(call SplitControlState.isState(S_TURNING_OFF)) {
+      call SplitControlState.forceState(S_OFF);
+      signal SplitControl.stopDone(SUCCESS);
+      return TRUE;
+      
+    } else if(call SplitControlState.isState(S_TURNING_ON)) {
+      // Starting while we're duty cycling first turns off the radio
+      call SplitControlState.forceState(S_ON);
+      signal SplitControl.startDone(SUCCESS);
+      return TRUE;
+    }
+    
+    return FALSE;
+  }
+  
+  /**************** Defaults ****************/
+  default event void PowerCycle.detected() {
+  }
+
+
+  default event void SplitControl.startDone(error_t error) {
+  }
+  
+  default event void SplitControl.stopDone(error_t error) {
+  }
+}
+
+
diff --git a/tos/chips/cc2420/lpl/readme.txt b/tos/chips/cc2420/lpl/readme.txt
new file mode 100644
index 00000000..4fe5dc65
--- /dev/null
+++ b/tos/chips/cc2420/lpl/readme.txt
@@ -0,0 +1,98 @@
+
+ARCHITECTURE
+=======================================================
+The default LPL implementation uses a packet train with acknowledgements
+enabled, shortened backoffs, and a spinning energy checking loop.
+
+The default strategy can be improved by implementing a different architecture.
+Right now the architecture looks like this:
+
+
+  +----------------------------------+
+  |           DefaultLplP            | -> To lower level Send
+  | Responsible for retransmissions  | -> To lower level SplitControl
+  | and turning the radio off when   | <- From lower level Receive
+  | done, or on when starting to     |
+  | transmit                         |
+  +----------------------------------+
+  |           PowerCycleP            |
+  | Responsible for performing       | -> To lower level SplitControl
+  | receive checks and leaving the   |
+  | radio on                         |
+  +----------------------------------+
+  
+I think the architecture should be changed.  If you're interested in doing work 
+in this area, there's lots of development and research to be done.
+
+First, take a look at tinyos-2.x-contrib/wustl/upma.  The architecture of the
+CC2420 stack there is implemented to define a low-level abstraction layer
+which separates radio-specific functionality from radio-independent
+functionality.  This is nice.  By providing certain interfaces from the 
+radio-dependant functionality, it makes it easier to maintain MAC layer 
+stuff independent of the radio.  And that includes LPL.
+
+One of the things that radio stack uses is an Alarm instead of a spinning
+task/while loop.  Whereas the implementation here uses a static number of 
+loops to detect if energy is on the channel, we would be better able
+to achieve the smallest radio asynchronous receive check on-time by using an 
+alarm.  After all, the radio only has to be on to span the quiet gaps in a 
+transmitter's transmission, and we know approximately the duration of those
+quiet gaps based on the backoff period, which the stack defines.
+
+I recommend we redo some of the LPL architecture to look more like this:
+
+  +----------------------------------+
+  |          DefaultLplP             |
+  | Responsible for retransmissions  |
+  +----------------------------------+
+           |   |   |       (Send, Receive, SplitControl goes through PowerCycle)
+  +----------------------------------+
+  |          PowerCycleP             |
+  | Responsible for managing radio   | -> To lower level Send
+  | on/off power, and telling        | -> To lower level SplitControl
+  | PacketDetectP when to start/stop | <- From lower level Receive
+  | its job                          |
+  +----------------------------------+
+  |         PacketDetectP            |
+  | Responsible for detecting        | <- EnergyIndicator
+  | energy, bytes, and/or packets.   | <- ByteIndicator
+  | Notify PowerCycle when packets   | <- PacketIndicator
+  | are detected                     |
+  +----------------------------------+
+  
+This is pretty radio independent.
+
+OTHER LOW POWER LISTENING STRATEGIES
+=============================================================
+Other low power listening layers can be implemented as well:
+  * Continuous modulation / No Acknowledgements:
+     > Allows the receiver to achieve the lowest possible receive check
+       on time.  It's shown to be several times more efficient on the receive 
+       check than the default.  This is a radio-dependent LPL strategy
+       and the CC2420 can acheive it by putting some transmit register into
+       test mode where it continually retransmits the contents of the TXFIFO.
+       The CRC of the packet must be uploaded into the TXFIFO because it won't
+       be calculated by the CC2420.  Not sure if the preamble and sync bytes
+       need to be uploaded as well.  The transmitter takes a hit because it
+       cannot receive acks in the middle of its packet train.   But since
+       the receiver's energy consumption is so low, it's possible to increase
+       the number of receive checks in order to lower the duration of the 
+       transmission.
+     > This strategy would be a good match for networks that must get data
+       through quickly when there is data, but doesn't see too many
+       transmissions in any given geographical area of the network.  Also
+       a good strategy where your transmitters have more power.
+       
+  * 802.15.4/ZigBee End Node:
+     > Queue up packets to Send to a particular destination until that node 
+       checks in at some random time.  Use fields in the ack frame to let the 
+       node know that packets are available.  Good match for networks where one 
+       node has access to line power and other nodes are on batteries.
+       
+   * Low throughput acknowledgement LPL:
+     > Just like the default, only it uses the ByteIndicator to turn off
+       the radio as soon as it stops receiving bytes and no packet was
+       received.  Able to get a much shorter receive check at the expense
+       of decreased probability that you'll receive messages in a congested
+       network.
+       
diff --git a/tos/chips/cc2420/packet/CC2420PacketC.nc b/tos/chips/cc2420/packet/CC2420PacketC.nc
new file mode 100644
index 00000000..9e341554
--- /dev/null
+++ b/tos/chips/cc2420/packet/CC2420PacketC.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Chad Metcalf
+ */
+
+configuration CC2420PacketC {
+
+  provides {
+    interface CC2420Packet;
+    interface PacketAcknowledgements as Acks;
+    interface CC2420PacketBody;
+    interface LinkPacketMetadata;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+    interface PacketTimeSyncOffset;
+  }
+
+}
+
+implementation {
+  components CC2420PacketP;
+  CC2420Packet         = CC2420PacketP;
+  Acks                 = CC2420PacketP;
+  CC2420PacketBody     = CC2420PacketP;
+  LinkPacketMetadata   = CC2420PacketP;
+  PacketTimeStamp32khz = CC2420PacketP;
+  PacketTimeStampMilli = CC2420PacketP;
+  PacketTimeSyncOffset = CC2420PacketP;
+
+  components Counter32khz32C, new CounterToLocalTimeC(T32khz);
+  CounterToLocalTimeC.Counter -> Counter32khz32C;
+  CC2420PacketP.LocalTime32khz -> CounterToLocalTimeC;
+
+  //DummyTimer is introduced to compile apps that use no timers
+  components HilTimerMilliC, new TimerMilliC() as DummyTimer;
+  CC2420PacketP.LocalTimeMilli -> HilTimerMilliC;
+}
diff --git a/tos/chips/cc2420/packet/CC2420PacketP.nc b/tos/chips/cc2420/packet/CC2420PacketP.nc
new file mode 100644
index 00000000..e340b922
--- /dev/null
+++ b/tos/chips/cc2420/packet/CC2420PacketP.nc
@@ -0,0 +1,237 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Chad Metcalf
+ */
+
+#include "IEEE802154.h"
+#include "message.h"
+#include "CC2420.h"
+#include "CC2420TimeSyncMessage.h"
+
+module CC2420PacketP @safe() {
+
+  provides {
+    interface CC2420Packet;
+    interface PacketAcknowledgements as Acks;
+    interface CC2420PacketBody;
+    interface LinkPacketMetadata;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+    interface PacketTimeSyncOffset;
+  }
+
+  uses interface Packet;
+  uses interface LocalTime<T32khz> as LocalTime32khz;
+  uses interface LocalTime<TMilli> as LocalTimeMilli;
+}
+
+implementation {
+
+
+  /***************** PacketAcknowledgement Commands ****************/
+  async command error_t Acks.requestAck( message_t* p_msg ) {
+    (call CC2420PacketBody.getHeader( p_msg ))->fcf |= 1 << IEEE154_FCF_ACK_REQ;
+    return SUCCESS;
+  }
+
+  async command error_t Acks.noAck( message_t* p_msg ) {
+    (call CC2420PacketBody.getHeader( p_msg ))->fcf &= ~(1 << IEEE154_FCF_ACK_REQ);
+    return SUCCESS;
+  }
+
+  async command bool Acks.wasAcked( message_t* p_msg ) {
+    return (call CC2420PacketBody.getMetadata( p_msg ))->ack;
+  }
+
+  /***************** CC2420Packet Commands ****************/
+  
+  int getAddressLength(int type) {
+    switch (type) {
+    case IEEE154_ADDR_SHORT: return 2;
+    case IEEE154_ADDR_EXT: return 8;
+    case IEEE154_ADDR_NONE: return 0;
+    default: return -100;
+    }
+  }
+  
+  uint8_t *getNetwork(message_t *msg) {
+    cc2420_header_t *hdr = (call CC2420PacketBody.getHeader( msg ));
+    int offset;
+    
+    offset = getAddressLength((hdr->fcf >> IEEE154_FCF_DEST_ADDR_MODE) & 0x3) +
+      getAddressLength((hdr->fcf >> IEEE154_FCF_SRC_ADDR_MODE) & 0x3) + 
+      offsetof(cc2420_header_t, dest);
+
+    return ((uint8_t *)hdr) + offset;
+  }
+
+  async command void CC2420Packet.setPower( message_t* p_msg, uint8_t power ) {
+    if ( power > 31 )
+      power = 31;
+    (call CC2420PacketBody.getMetadata( p_msg ))->tx_power = power;
+  }
+
+  async command uint8_t CC2420Packet.getPower( message_t* p_msg ) {
+    return (call CC2420PacketBody.getMetadata( p_msg ))->tx_power;
+  }
+   
+  async command int8_t CC2420Packet.getRssi( message_t* p_msg ) {
+    return (call CC2420PacketBody.getMetadata( p_msg ))->rssi;
+  }
+
+  async command uint8_t CC2420Packet.getLqi( message_t* p_msg ) {
+    return (call CC2420PacketBody.getMetadata( p_msg ))->lqi;
+  }
+
+  async command uint8_t CC2420Packet.getNetwork( message_t* p_msg ) {
+#if defined(TFRAMES_ENABLED)
+    return TINYOS_6LOWPAN_NETWORK_ID;
+#else
+    atomic 
+      return *(getNetwork(p_msg));
+#endif
+  }
+
+  async command void CC2420Packet.setNetwork( message_t* p_msg , uint8_t networkId ) {
+#if ! defined(TFRAMES_ENABLED)
+    atomic 
+      *(getNetwork(p_msg)) = networkId;
+#endif
+  }    
+
+
+  /***************** CC2420PacketBody Commands ****************/
+  async command cc2420_header_t * ONE CC2420PacketBody.getHeader( message_t* ONE msg ) {
+    return TCAST(cc2420_header_t* ONE, (uint8_t *)msg + offsetof(message_t, data) - sizeof( cc2420_header_t ));
+  }
+
+  async command uint8_t * CC2420PacketBody.getPayload( message_t* msg) {
+    cc2420_header_t *hdr = (call CC2420PacketBody.getHeader( msg ));
+    int offset;
+    
+    offset = getAddressLength((hdr->fcf >> IEEE154_FCF_DEST_ADDR_MODE) & 0x3) +
+      getAddressLength((hdr->fcf >> IEEE154_FCF_SRC_ADDR_MODE) & 0x3) + 
+      offsetof(cc2420_header_t, dest);
+
+    return ((uint8_t *)hdr) + offset;
+  }
+
+  async command cc2420_metadata_t *CC2420PacketBody.getMetadata( message_t* msg ) {
+    return (cc2420_metadata_t*)msg->metadata;
+  }
+
+  async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) {
+    return call CC2420Packet.getLqi(msg) > 105;
+  }
+
+  /***************** PacketTimeStamp32khz Commands ****************/
+  async command bool PacketTimeStamp32khz.isValid(message_t* msg)
+  {
+    return ((call CC2420PacketBody.getMetadata( msg ))->timestamp != CC2420_INVALID_TIMESTAMP);
+  }
+
+  async command uint32_t PacketTimeStamp32khz.timestamp(message_t* msg)
+  {
+    return (call CC2420PacketBody.getMetadata( msg ))->timestamp;
+  }
+
+  async command void PacketTimeStamp32khz.clear(message_t* msg)
+  {
+    (call CC2420PacketBody.getMetadata( msg ))->timesync = FALSE;
+    (call CC2420PacketBody.getMetadata( msg ))->timestamp = CC2420_INVALID_TIMESTAMP;
+  }
+
+  async command void PacketTimeStamp32khz.set(message_t* msg, uint32_t value)
+  {
+    (call CC2420PacketBody.getMetadata( msg ))->timestamp = value;
+  }
+
+  /***************** PacketTimeStampMilli Commands ****************/
+  // over the air value is always T32khz, which is used to capture SFD interrupt
+  // (Timer1 on micaZ, B1 on telos)
+  async command bool PacketTimeStampMilli.isValid(message_t* msg)
+  {
+    return call PacketTimeStamp32khz.isValid(msg);
+  }
+
+  //timestmap is always represented in 32khz
+  //28.1 is coefficient difference between T32khz and TMilli on MicaZ
+  async command uint32_t PacketTimeStampMilli.timestamp(message_t* msg)
+  {
+    int32_t offset = (call LocalTime32khz.get()-call PacketTimeStamp32khz.timestamp(msg));
+    offset/=28.1;
+    return call LocalTimeMilli.get() - offset;
+  }
+
+  async command void PacketTimeStampMilli.clear(message_t* msg)
+  {
+    call PacketTimeStamp32khz.clear(msg);
+  }
+
+  async command void PacketTimeStampMilli.set(message_t* msg, uint32_t value)
+  {
+    int32_t offset = (value - call LocalTimeMilli.get()) << 5;
+    call PacketTimeStamp32khz.set(msg, offset + call LocalTime32khz.get());
+  }
+  /*----------------- PacketTimeSyncOffset -----------------*/
+  async command bool PacketTimeSyncOffset.isSet(message_t* msg)
+  {
+    return ((call CC2420PacketBody.getMetadata( msg ))->timesync);
+  }
+
+  //returns offset of timestamp from the beginning of cc2420 header which is
+  //          sizeof(cc2420_header_t)+datalen-sizeof(timesync_radio_t)
+  //uses packet length of the message which is
+  //          MAC_HEADER_SIZE+MAC_FOOTER_SIZE+datalen
+  async command uint8_t PacketTimeSyncOffset.get(message_t* msg)
+  {
+    return (call CC2420PacketBody.getHeader(msg))->length
+            + (sizeof(cc2420_header_t) - MAC_HEADER_SIZE)
+            - MAC_FOOTER_SIZE
+            - sizeof(timesync_radio_t);
+  }
+  
+  async command void PacketTimeSyncOffset.set(message_t* msg)
+  {
+    (call CC2420PacketBody.getMetadata( msg ))->timesync = TRUE;
+  }
+
+  async command void PacketTimeSyncOffset.cancel(message_t* msg)
+  {
+    (call CC2420PacketBody.getMetadata( msg ))->timesync = FALSE;
+  }
+
+}
diff --git a/tos/chips/cc2420/receive/CC2420ReceiveC.nc b/tos/chips/cc2420/receive/CC2420ReceiveC.nc
new file mode 100644
index 00000000..b9036322
--- /dev/null
+++ b/tos/chips/cc2420/receive/CC2420ReceiveC.nc
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the receive path for the ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2009-08-14 20:33:43 $
+ */
+
+configuration CC2420ReceiveC {
+
+  provides interface StdControl;
+  provides interface CC2420Receive;
+  provides interface Receive;
+  provides interface ReceiveIndicator as PacketIndicator;
+
+}
+
+implementation {
+  components MainC;
+  components CC2420ReceiveP;
+  components CC2420PacketC;
+  components new CC2420SpiC() as Spi;
+  components CC2420ControlC;
+  
+  components HplCC2420PinsC as Pins;
+  components HplCC2420InterruptsC as InterruptsC;
+
+  components LedsC as Leds;
+  CC2420ReceiveP.Leds -> Leds;
+
+  StdControl = CC2420ReceiveP;
+  CC2420Receive = CC2420ReceiveP;
+  Receive = CC2420ReceiveP;
+  PacketIndicator = CC2420ReceiveP.PacketIndicator;
+
+  MainC.SoftwareInit -> CC2420ReceiveP;
+  
+  CC2420ReceiveP.CSN -> Pins.CSN;
+  CC2420ReceiveP.FIFO -> Pins.FIFO;
+  CC2420ReceiveP.FIFOP -> Pins.FIFOP;
+  CC2420ReceiveP.InterruptFIFOP -> InterruptsC.InterruptFIFOP;
+  CC2420ReceiveP.SpiResource -> Spi;
+  CC2420ReceiveP.RXFIFO -> Spi.RXFIFO;
+  CC2420ReceiveP.SFLUSHRX -> Spi.SFLUSHRX;
+  CC2420ReceiveP.SACK -> Spi.SACK;
+  CC2420ReceiveP.CC2420Packet -> CC2420PacketC;
+  CC2420ReceiveP.CC2420PacketBody -> CC2420PacketC;
+  CC2420ReceiveP.PacketTimeStamp -> CC2420PacketC;
+  CC2420ReceiveP.CC2420Config -> CC2420ControlC;
+
+  CC2420ReceiveP.SECCTRL0 -> Spi.SECCTRL0;
+  CC2420ReceiveP.SECCTRL1 -> Spi.SECCTRL1;
+  CC2420ReceiveP.SRXDEC -> Spi.SRXDEC;
+  CC2420ReceiveP.RXNONCE -> Spi.RXNONCE;
+  CC2420ReceiveP.KEY0 -> Spi.KEY0;
+  CC2420ReceiveP.KEY1 -> Spi.KEY1;
+  CC2420ReceiveP.RXFIFO_RAM -> Spi.RXFIFO_RAM;
+  CC2420ReceiveP.SNOP -> Spi.SNOP;
+
+}
diff --git a/tos/chips/cc2420/receive/CC2420ReceiveP.nc b/tos/chips/cc2420/receive/CC2420ReceiveP.nc
new file mode 100644
index 00000000..4cd80971
--- /dev/null
+++ b/tos/chips/cc2420/receive/CC2420ReceiveP.nc
@@ -0,0 +1,841 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Jung Il Choi
+ * @author JeongGil Ko
+ * @author Razvan Musaloiu-E
+ * @version $Revision: 1.21 $ $Date: 2009/09/17 23:36:36 $
+ */
+
+#include "IEEE802154.h"
+#include "message.h"
+#include "AM.h"
+
+module CC2420ReceiveP @safe() {
+
+  provides interface Init;
+  provides interface StdControl;
+  provides interface CC2420Receive;
+  provides interface Receive;
+  provides interface ReceiveIndicator as PacketIndicator;
+
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as FIFO;
+  uses interface GeneralIO as FIFOP;
+  uses interface GpioInterrupt as InterruptFIFOP;
+
+  uses interface Resource as SpiResource;
+  uses interface CC2420Fifo as RXFIFO;
+  uses interface CC2420Strobe as SACK;
+  uses interface CC2420Strobe as SFLUSHRX;
+  uses interface CC2420Packet;
+  uses interface CC2420PacketBody;
+  uses interface CC2420Config;
+  uses interface PacketTimeStamp<T32khz,uint32_t>;
+
+  uses interface CC2420Strobe as SRXDEC;
+  uses interface CC2420Register as SECCTRL0;
+  uses interface CC2420Register as SECCTRL1;
+  uses interface CC2420Ram as KEY0;
+  uses interface CC2420Ram as KEY1;
+  uses interface CC2420Ram as RXNONCE;
+  uses interface CC2420Ram as RXFIFO_RAM;
+  uses interface CC2420Strobe as SNOP;
+
+  uses interface Leds;
+}
+
+implementation {
+
+  typedef enum {
+    S_STOPPED,
+    S_STARTED,
+    S_RX_LENGTH,
+    S_RX_DEC,
+    S_RX_DEC_WAIT,
+    S_RX_FCF,
+    S_RX_PAYLOAD,
+  } cc2420_receive_state_t;
+
+  enum {
+    RXFIFO_SIZE = 128,
+    TIMESTAMP_QUEUE_SIZE = 8,
+    SACK_HEADER_LENGTH = 7,
+  };
+
+  uint32_t m_timestamp_queue[ TIMESTAMP_QUEUE_SIZE ];
+
+  uint8_t m_timestamp_head;
+  
+  uint8_t m_timestamp_size;
+  
+  /** Number of packets we missed because we were doing something else */
+#ifdef CC2420_HW_SECURITY
+  norace uint8_t m_missed_packets;
+#else
+  uint8_t m_missed_packets;
+#endif
+
+  /** TRUE if we are receiving a valid packet into the stack */
+  bool receivingPacket;
+  
+  /** The length of the frame we're currently receiving */
+  norace uint8_t rxFrameLength;
+  
+  norace uint8_t m_bytes_left;
+  
+  norace message_t* ONE_NOK m_p_rx_buf;
+
+  message_t m_rx_buf;
+#ifdef CC2420_HW_SECURITY
+  norace cc2420_receive_state_t m_state;
+  norace uint8_t packetLength = 0;
+  norace uint8_t pos = 0;
+  norace uint8_t secHdrPos = 0;
+  uint8_t nonceValue[16] = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01};
+  norace uint8_t skip;
+  norace uint8_t securityOn = 0;
+  norace uint8_t authentication = 0;
+  norace uint8_t micLength = 0;
+  uint8_t flush_flag = 0;
+  uint16_t startTime = 0;
+
+  void beginDec();
+  void dec();
+#else
+  cc2420_receive_state_t m_state;
+#endif
+
+  /***************** Prototypes ****************/
+  void reset_state();
+  void beginReceive();
+  void receive();
+  void waitForNextPacket();
+  void flush();
+  bool passesAddressCheck(message_t * ONE msg);
+
+  task void receiveDone_task();
+
+  /***************** Init Commands ****************/
+  command error_t Init.init() {
+    m_p_rx_buf = &m_rx_buf;
+    return SUCCESS;
+  }
+
+  /***************** StdControl ****************/
+  command error_t StdControl.start() {
+    atomic {
+      reset_state();
+      m_state = S_STARTED;
+      atomic receivingPacket = FALSE;
+      /* Note:
+         We use the falling edge because the FIFOP polarity is reversed. 
+         This is done in CC2420Power.startOscillator from CC2420ControlP.nc.
+       */
+      call InterruptFIFOP.enableFallingEdge();
+    }
+    return SUCCESS;
+  }
+  
+  command error_t StdControl.stop() {
+    atomic {
+      m_state = S_STOPPED;
+      reset_state();
+      call CSN.set();
+      call InterruptFIFOP.disable();
+    }
+    return SUCCESS;
+  }
+
+  /***************** CC2420Receive Commands ****************/
+  /**
+   * Start frame delimiter signifies the beginning/end of a packet
+   * See the CC2420 datasheet for details.
+   */
+  async command void CC2420Receive.sfd( uint32_t time ) {
+    if ( m_timestamp_size < TIMESTAMP_QUEUE_SIZE ) {
+      uint8_t tail =  ( ( m_timestamp_head + m_timestamp_size ) % 
+                        TIMESTAMP_QUEUE_SIZE );
+      m_timestamp_queue[ tail ] = time;
+      m_timestamp_size++;
+    }
+  }
+
+  async command void CC2420Receive.sfd_dropped() {
+    if ( m_timestamp_size ) {
+      m_timestamp_size--;
+    }
+  }
+
+  /***************** PacketIndicator Commands ****************/
+  command bool PacketIndicator.isReceiving() {
+    bool receiving;
+    atomic {
+      receiving = receivingPacket;
+    }
+    return receiving;
+  }
+  
+  
+  /***************** InterruptFIFOP Events ****************/
+  async event void InterruptFIFOP.fired() {
+    if ( m_state == S_STARTED ) {
+#ifndef CC2420_HW_SECURITY
+      m_state = S_RX_LENGTH;
+      beginReceive();
+#else
+      m_state = S_RX_DEC;
+      atomic receivingPacket = TRUE;
+      beginDec();
+#endif
+    } else {
+      m_missed_packets++;
+    }
+  }
+
+  /*****************Decryption Options*********************/
+#ifdef CC2420_HW_SECURITY
+  task void waitTask(){
+
+    if(SECURITYLOCK == 1){
+      post waitTask();
+    }else{
+      m_state = S_RX_DEC;
+      beginDec();
+    }
+  }
+
+  void beginDec(){
+    if(call SpiResource.isOwner()) {
+      dec();
+    } else if (call SpiResource.immediateRequest() == SUCCESS) {
+      dec();
+    } else {
+      call SpiResource.request();
+    }
+  }
+
+  norace uint8_t decLoopCount = 0;
+
+  task void waitDecTask(){
+
+    cc2420_status_t status;
+
+    call CSN.clr();
+    status = call SNOP.strobe();
+    call CSN.set();
+
+    atomic decLoopCount ++;
+
+    if(decLoopCount > 10){
+      call CSN.clr();
+      atomic call SECCTRL0.write((0 << CC2420_SECCTRL0_SEC_MODE) |
+				 (0 << CC2420_SECCTRL0_SEC_M) |
+				 (0 << CC2420_SECCTRL0_SEC_RXKEYSEL) |
+				 (1 << CC2420_SECCTRL0_SEC_CBC_HEAD) |
+				 (1 << CC2420_SECCTRL0_RXFIFO_PROTECTION)) ;
+      call CSN.set();
+      SECURITYLOCK = 0;
+      call SpiResource.release();
+      atomic flush_flag = 1;
+      beginReceive();
+    }else if(status & CC2420_STATUS_ENC_BUSY){
+      post waitDecTask();
+    }else{
+      call CSN.clr();
+      atomic call SECCTRL0.write((0 << CC2420_SECCTRL0_SEC_MODE) |
+				 (0 << CC2420_SECCTRL0_SEC_M) |
+				 (0 << CC2420_SECCTRL0_SEC_RXKEYSEL) |
+				 (1 << CC2420_SECCTRL0_SEC_CBC_HEAD) |
+				 (1 << CC2420_SECCTRL0_RXFIFO_PROTECTION)) ;
+      call CSN.set();
+      SECURITYLOCK = 0;
+      call SpiResource.release();
+      beginReceive();
+    }
+
+  }
+
+  void waitDec(){
+    cc2420_status_t status;
+    call CSN.clr();
+    status = call SNOP.strobe();
+    call CSN.set();
+
+    if(status & CC2420_STATUS_ENC_BUSY){
+      atomic decLoopCount = 1;
+      post waitDecTask();
+    }else{
+      call CSN.clr();
+      atomic call SECCTRL0.write((0 << CC2420_SECCTRL0_SEC_MODE) |
+				 (0 << CC2420_SECCTRL0_SEC_M) |
+				 (0 << CC2420_SECCTRL0_SEC_RXKEYSEL) |
+				 (1 << CC2420_SECCTRL0_SEC_CBC_HEAD) |
+				 (1 << CC2420_SECCTRL0_RXFIFO_PROTECTION)) ;
+      call CSN.set();
+      SECURITYLOCK = 0;
+      call SpiResource.release();
+      beginReceive();
+    }
+  }
+
+  void dec(){
+    cc2420_header_t header;
+    security_header_t secHdr;
+    uint8_t mode, key, temp, crc;
+
+    atomic pos = (packetLength+pos)%RXFIFO_SIZE;
+    atomic secHdrPos = (pos+10)%RXFIFO_SIZE;
+
+    if (pos + 3 > RXFIFO_SIZE){
+      temp = RXFIFO_SIZE - pos;
+      call CSN.clr();
+      atomic call RXFIFO_RAM.read(pos,(uint8_t*)&header, temp);
+      call CSN.set();
+      call CSN.clr();
+      atomic call RXFIFO_RAM.read(0,(uint8_t*)&header+temp, 3-temp);
+      call CSN.set();
+    }else{
+      call CSN.clr();
+      atomic call RXFIFO_RAM.read(pos,(uint8_t*)&header, 3);
+      call CSN.set();
+    }
+
+    packetLength = header.length+1;
+
+    if(packetLength == 6){ // ACK packet
+      m_state = S_RX_LENGTH;
+      call SpiResource.release();
+      beginReceive();
+      return;
+    }
+
+    if (pos + sizeof(cc2420_header_t) > RXFIFO_SIZE){
+      temp = RXFIFO_SIZE - pos;
+      call CSN.clr();
+      atomic call RXFIFO_RAM.read(pos,(uint8_t*)&header, temp);
+      call CSN.set();
+      call CSN.clr();
+      atomic call RXFIFO_RAM.read(0,(uint8_t*)&header+temp, sizeof(cc2420_header_t)-temp);
+      call CSN.set();
+    }else{
+      call CSN.clr();
+      atomic call RXFIFO_RAM.read(pos,(uint8_t*)&header, sizeof(cc2420_header_t));
+      call CSN.set();
+    }
+
+    if (pos+header.length+1 > RXFIFO_SIZE){
+      temp = header.length - (RXFIFO_SIZE - pos);
+      call CSN.clr();
+      atomic call RXFIFO_RAM.read(temp,&crc, 1);
+      call CSN.set();
+    }else{
+      call CSN.clr();
+      atomic call RXFIFO_RAM.read(pos+header.length,&crc, 1);
+      call CSN.set();
+    }
+
+    if(header.length+1 > RXFIFO_SIZE || !(crc << 7)){
+      atomic flush_flag = 1;
+      m_state = S_RX_LENGTH;
+      call SpiResource.release();
+      beginReceive();
+      return;
+    }
+    if( (header.fcf & (1 << IEEE154_FCF_SECURITY_ENABLED)) && (crc << 7) ){
+      if(call CC2420Config.isAddressRecognitionEnabled()){
+	if(!(header.dest==call CC2420Config.getShortAddr() || header.dest==AM_BROADCAST_ADDR)){
+	  packetLength = header.length + 1;
+	  m_state = S_RX_LENGTH;
+	  call SpiResource.release();
+	  beginReceive();
+	  return;
+	}
+      }
+      if(SECURITYLOCK == 1){
+	call SpiResource.release();
+	post waitTask();
+	return;
+      }else{
+	//We are going to decrypt so lock the registers
+	atomic SECURITYLOCK = 1;
+
+	if (secHdrPos + sizeof(security_header_t) > RXFIFO_SIZE){
+	  temp = RXFIFO_SIZE - secHdrPos;
+	  call CSN.clr();
+	  atomic call RXFIFO_RAM.read(secHdrPos,(uint8_t*)&secHdr, temp);
+	  call CSN.set();
+	  call CSN.clr();
+	  atomic call RXFIFO_RAM.read(0,(uint8_t*)&secHdr+temp, sizeof(security_header_t) - temp);
+	  call CSN.set();
+	} else {
+	  call CSN.clr();
+	  atomic call RXFIFO_RAM.read(secHdrPos,(uint8_t*)&secHdr, sizeof(security_header_t));
+	  call CSN.set();
+	}
+
+	key = secHdr.keyID[0];
+
+	if (secHdr.secLevel == NO_SEC){
+	  mode = CC2420_NO_SEC;
+	  micLength = 0;
+	}else if (secHdr.secLevel == CBC_MAC_4){
+	  mode = CC2420_CBC_MAC;
+	  micLength = 4;
+	}else if (secHdr.secLevel == CBC_MAC_8){
+	  mode = CC2420_CBC_MAC;
+	  micLength = 8;
+	}else if (secHdr.secLevel == CBC_MAC_16){
+	  mode = CC2420_CBC_MAC;
+	  micLength = 16;
+	}else if (secHdr.secLevel == CTR){
+	  mode = CC2420_CTR;
+	  micLength = 0;
+	}else if (secHdr.secLevel == CCM_4){
+	  mode = CC2420_CCM;
+	  micLength = 4;
+	}else if (secHdr.secLevel == CCM_8){
+	  mode = CC2420_CCM;
+	  micLength = 8;
+	}else if (secHdr.secLevel == CCM_16){
+	  mode = CC2420_CCM;
+	  micLength = 16;
+	}else{
+	  atomic SECURITYLOCK = 0;
+	  packetLength = header.length + 1;
+	  m_state = S_RX_LENGTH;
+	  call SpiResource.release();
+	  beginReceive();
+	  return;
+	}
+
+	if(mode < 4 && mode > 0) { // if mode is valid
+  
+	  securityOn = 1;
+
+	  memcpy(&nonceValue[3], &(secHdr.frameCounter), 4);
+	  skip = secHdr.reserved;
+
+	  if(mode == CC2420_CBC_MAC || mode == CC2420_CCM){
+	    authentication = 1;
+	    call CSN.clr();
+	    atomic call SECCTRL0.write((mode << CC2420_SECCTRL0_SEC_MODE) |
+				       ((micLength-2)/2 << CC2420_SECCTRL0_SEC_M) |
+				       (key << CC2420_SECCTRL0_SEC_RXKEYSEL) |
+				       (1 << CC2420_SECCTRL0_SEC_CBC_HEAD) |
+				       (1 << CC2420_SECCTRL0_RXFIFO_PROTECTION)) ;
+	    call CSN.set();
+	  }else{
+	    call CSN.clr();
+	    atomic call SECCTRL0.write((mode << CC2420_SECCTRL0_SEC_MODE) |
+				       (1 << CC2420_SECCTRL0_SEC_M) |
+				       (key << CC2420_SECCTRL0_SEC_RXKEYSEL) |
+				       (1 << CC2420_SECCTRL0_SEC_CBC_HEAD) |
+				       (1 << CC2420_SECCTRL0_RXFIFO_PROTECTION)) ;
+	    call CSN.set();
+	  }
+
+	  call CSN.clr();
+#ifndef TFRAMES_ENABLED
+	  atomic call SECCTRL1.write(skip+11+sizeof(security_header_t)+((skip+11+sizeof(security_header_t))<<8));
+#else
+	  atomic call SECCTRL1.write(skip+10+sizeof(security_header_t)+((skip+10+sizeof(security_header_t))<<8));
+#endif
+	  call CSN.set();
+
+	  call CSN.clr();
+	  atomic call RXNONCE.write(0, nonceValue, 16);
+	  call CSN.set();
+
+	  call CSN.clr();
+	  atomic call SRXDEC.strobe();
+	  call CSN.set();
+
+	  atomic decLoopCount = 0;
+	  post waitDecTask();
+	  return;
+
+	}else{
+	  atomic SECURITYLOCK = 0;
+	  packetLength = header.length + 1;
+	  m_state = S_RX_LENGTH;
+	  call SpiResource.release();
+	  beginReceive();
+	  return;
+	}
+      }
+    }else{
+      packetLength = header.length + 1;
+      m_state = S_RX_LENGTH;
+      call SpiResource.release();
+      beginReceive();
+      return;
+    }
+  }
+#endif
+  /***************** SpiResource Events ****************/
+  event void SpiResource.granted() {
+#ifdef CC2420_HW_SECURITY
+    if(m_state == S_RX_DEC){
+      dec();
+    }else{
+      receive();
+    }
+#else
+    receive();
+#endif
+  }
+  
+  /***************** RXFIFO Events ****************/
+  /**
+   * We received some bytes from the SPI bus.  Process them in the context
+   * of the state we're in.  Remember the length byte is not part of the length
+   */
+  async event void RXFIFO.readDone( uint8_t* rx_buf, uint8_t rx_len,
+                                    error_t error ) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader( m_p_rx_buf );
+    uint8_t tmpLen __DEPUTY_UNUSED__ = sizeof(message_t) - (offsetof(message_t, data) - sizeof(cc2420_header_t));
+    uint8_t* COUNT(tmpLen) buf = TCAST(uint8_t* COUNT(tmpLen), header);
+    rxFrameLength = buf[ 0 ];
+
+    switch( m_state ) {
+
+    case S_RX_LENGTH:
+      m_state = S_RX_FCF;
+#ifdef CC2420_HW_SECURITY
+      packetLength = rxFrameLength+1;
+#endif
+      if ( rxFrameLength + 1 > m_bytes_left
+#ifdef CC2420_HW_SECURITY
+           || flush_flag == 1
+#endif
+           ) {
+        // Length of this packet is bigger than the RXFIFO, flush it out.
+        flush();
+        
+      } else {
+        if ( !call FIFO.get() && !call FIFOP.get() ) {
+          m_bytes_left -= rxFrameLength + 1;
+        }
+        
+        if(rxFrameLength <= MAC_PACKET_SIZE) {
+          if(rxFrameLength > 0) {
+            if(rxFrameLength > SACK_HEADER_LENGTH) {
+              // This packet has an FCF byte plus at least one more byte to read
+              call RXFIFO.continueRead(buf + 1, SACK_HEADER_LENGTH);
+              
+            } else {
+              // This is really a bad packet, skip FCF and get it out of here.
+              m_state = S_RX_PAYLOAD;
+              call RXFIFO.continueRead(buf + 1, rxFrameLength);
+            }
+                            
+          } else {
+            // Length == 0; start reading the next packet
+            atomic receivingPacket = FALSE;
+            call CSN.set();
+            call SpiResource.release();
+            waitForNextPacket();
+          }
+          
+        } else {
+          // Length is too large; we have to flush the entire Rx FIFO
+          flush();
+        }
+      }
+      break;
+      
+    case S_RX_FCF:
+      m_state = S_RX_PAYLOAD;
+      
+      /*
+       * The destination address check here is not completely optimized. If you 
+       * are seeing issues with dropped acknowledgements, try removing
+       * the address check and decreasing SACK_HEADER_LENGTH to 2.
+       * The length byte and the FCF byte are the only two bytes required
+       * to know that the packet is valid and requested an ack.  The destination
+       * address is useful when we want to sniff packets from other transmitters
+       * while acknowledging packets that were destined for our local address.
+       */
+      if(call CC2420Config.isAutoAckEnabled() && !call CC2420Config.isHwAutoAckDefault()) {
+        if (((( header->fcf >> IEEE154_FCF_ACK_REQ ) & 0x01) == 1)
+            && ((header->dest == call CC2420Config.getShortAddr())
+                || (header->dest == AM_BROADCAST_ADDR))
+            && ((( header->fcf >> IEEE154_FCF_FRAME_TYPE ) & 7) == IEEE154_TYPE_DATA)) {
+          // CSn flippage cuts off our FIFO; SACK and begin reading again
+          call CSN.set();
+          call CSN.clr();
+          call SACK.strobe();
+          call CSN.set();
+          call CSN.clr();
+	  call RXFIFO.beginRead(buf + 1 + SACK_HEADER_LENGTH,
+				rxFrameLength - SACK_HEADER_LENGTH);
+          return;
+        }
+      }
+      // Didn't flip CSn, we're ok to continue reading.
+      call RXFIFO.continueRead(buf + 1 + SACK_HEADER_LENGTH, 
+			       rxFrameLength - SACK_HEADER_LENGTH);
+      break;
+
+    case S_RX_PAYLOAD:
+
+      call CSN.set();
+      if(!m_missed_packets) {
+        // Release the SPI only if there are no more frames to download
+        call SpiResource.release();
+      }
+      
+      //new packet is buffered up, or we don't have timestamp in fifo, or ack
+      if ( ( m_missed_packets && call FIFO.get() ) || !call FIFOP.get()
+            || !m_timestamp_size
+            || rxFrameLength <= 10) {
+        call PacketTimeStamp.clear(m_p_rx_buf);
+      }
+      else {
+          if (m_timestamp_size==1)
+            call PacketTimeStamp.set(m_p_rx_buf, m_timestamp_queue[ m_timestamp_head ]);
+          m_timestamp_head = ( m_timestamp_head + 1 ) % TIMESTAMP_QUEUE_SIZE;
+          m_timestamp_size--;
+
+          if (m_timestamp_size>0) {
+            call PacketTimeStamp.clear(m_p_rx_buf);
+            m_timestamp_head = 0;
+            m_timestamp_size = 0;
+          }
+      }
+
+      // We may have received an ack that should be processed by Transmit
+      // buf[rxFrameLength] >> 7 checks the CRC
+      if ( ( buf[ rxFrameLength ] >> 7 ) && rx_buf ) {
+        uint8_t type = ( header->fcf >> IEEE154_FCF_FRAME_TYPE ) & 7;
+        signal CC2420Receive.receive( type, m_p_rx_buf );
+        if ( type == IEEE154_TYPE_DATA ) {
+          post receiveDone_task();
+          return;
+        }
+      }
+      
+      waitForNextPacket();
+      break;
+
+    default:
+      atomic receivingPacket = FALSE;
+      call CSN.set();
+      call SpiResource.release();
+      break;
+      
+    }
+    
+  }
+
+  async event void RXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len, error_t error ) {
+  }  
+  
+  /***************** Tasks *****************/
+  /**
+   * Fill in metadata details, pass the packet up the stack, and
+   * get the next packet.
+   */
+  task void receiveDone_task() {
+    cc2420_metadata_t* metadata = call CC2420PacketBody.getMetadata( m_p_rx_buf );
+    cc2420_header_t* header = call CC2420PacketBody.getHeader( m_p_rx_buf);
+    uint8_t length = header->length;
+    uint8_t tmpLen __DEPUTY_UNUSED__ = sizeof(message_t) - (offsetof(message_t, data) - sizeof(cc2420_header_t));
+    uint8_t* COUNT(tmpLen) buf = TCAST(uint8_t* COUNT(tmpLen), header);
+
+    metadata->crc = buf[ length ] >> 7;
+    metadata->lqi = buf[ length ] & 0x7f;
+    metadata->rssi = buf[ length - 1 ];
+
+    if (passesAddressCheck(m_p_rx_buf) && length >= CC2420_SIZE) {
+#ifdef CC2420_HW_SECURITY
+      if(securityOn == 1){
+	if(m_missed_packets > 0){
+	  m_missed_packets --;
+	}
+	if(authentication){
+	  length -= micLength;
+	}
+      }
+      micLength = 0;
+      securityOn = 0;
+      authentication = 0;
+#endif
+      m_p_rx_buf = signal Receive.receive( m_p_rx_buf, m_p_rx_buf->data,
+					   length - CC2420_SIZE);
+    }
+    atomic receivingPacket = FALSE;
+    waitForNextPacket();
+  }
+
+  /****************** CC2420Config Events ****************/
+  event void CC2420Config.syncDone( error_t error ) {
+  }
+  
+  /****************** Functions ****************/
+  /**
+   * Attempt to acquire the SPI bus to receive a packet.
+   */
+  void beginReceive() { 
+    m_state = S_RX_LENGTH;
+    atomic receivingPacket = TRUE;
+    if(call SpiResource.isOwner()) {
+      receive();
+      
+    } else if (call SpiResource.immediateRequest() == SUCCESS) {
+      receive();
+      
+    } else {
+      call SpiResource.request();
+    }
+  }
+  
+  /**
+   * Flush out the Rx FIFO
+   */
+  void flush() {
+#ifdef CC2420_HW_SECURITY
+    flush_flag = 0;
+    pos =0;
+    packetLength =0;
+    micLength = 0;
+    securityOn = 0;
+    authentication = 0;
+#endif
+    reset_state();
+
+    call CSN.set();
+    call CSN.clr();
+    call SFLUSHRX.strobe();
+    call SFLUSHRX.strobe();
+    call CSN.set();
+    call SpiResource.release();
+    waitForNextPacket();
+  }
+  
+  /**
+   * The first byte of each packet is the length byte.  Read in that single
+   * byte, and then read in the rest of the packet.  The CC2420 could contain
+   * multiple packets that have been buffered up, so if something goes wrong, 
+   * we necessarily want to flush out the FIFO unless we have to.
+   */
+  void receive() {
+    call CSN.clr();
+    call RXFIFO.beginRead( (uint8_t*)(call CC2420PacketBody.getHeader( m_p_rx_buf )), 1 );
+  }
+
+
+  /**
+   * Determine if there's a packet ready to go, or if we should do nothing
+   * until the next packet arrives
+   */
+  void waitForNextPacket() {
+    atomic {
+      if ( m_state == S_STOPPED ) {
+        call SpiResource.release();
+        return;
+      }
+      
+      atomic receivingPacket = FALSE;
+      
+      /*
+       * The FIFOP pin here is high when there are 0 bytes in the RX FIFO
+       * and goes low as soon as there are bytes in the RX FIFO.  The pin
+       * is inverted from what the datasheet says, and its threshold is 127.
+       * Whenever the FIFOP line goes low, as you can see from the interrupt
+       * handler elsewhere in this module, it means we received a new packet.
+       * If the line stays low without generating an interrupt, that means
+       * there's still more data to be received.
+       */
+
+      if ( ( m_missed_packets && call FIFO.get() ) || !call FIFOP.get() ) {
+        // A new packet is buffered up and ready to go
+        if ( m_missed_packets ) {
+          m_missed_packets--;
+        }
+#ifdef CC2420_HW_SECURITY
+	call SpiResource.release();
+	m_state = S_RX_DEC;
+	beginDec();
+#else
+	beginReceive();
+#endif
+
+      } else {
+        // Wait for the next packet to arrive
+        m_state = S_STARTED;
+        m_missed_packets = 0;
+        call SpiResource.release();
+      }
+    }
+  }
+  
+  /**
+   * Reset this component
+   */
+  void reset_state() {
+    m_bytes_left = RXFIFO_SIZE;
+    atomic receivingPacket = FALSE;
+    m_timestamp_head = 0;
+    m_timestamp_size = 0;
+    m_missed_packets = 0;
+  }
+
+  /**
+   * @return TRUE if the given message passes address recognition
+   */
+  bool passesAddressCheck(message_t *msg) {
+    cc2420_header_t *header = call CC2420PacketBody.getHeader( msg );
+    int mode = (header->fcf >> IEEE154_FCF_DEST_ADDR_MODE) & 3;
+    ieee_eui64_t *ext_addr;  
+
+    if(!(call CC2420Config.isAddressRecognitionEnabled())) {
+      return TRUE;
+    }
+
+    if (mode == IEEE154_ADDR_SHORT) {
+      return (header->dest == call CC2420Config.getShortAddr()
+              || header->dest == IEEE154_BROADCAST_ADDR);
+    } else if (mode == IEEE154_ADDR_EXT) {
+      ieee_eui64_t local_addr = (call CC2420Config.getExtAddr());
+      ext_addr = (ieee_eui64_t *)&header->dest;
+      return (memcmp(ext_addr->data, local_addr.data, IEEE_EUI64_LENGTH) == 0);
+    } else {
+      /* reject frames with either no address or invalid type */
+      return FALSE;
+    }
+  }
+
+}
diff --git a/tos/chips/cc2420/security/CC2420KeysC.nc b/tos/chips/cc2420/security/CC2420KeysC.nc
new file mode 100644
index 00000000..afac7962
--- /dev/null
+++ b/tos/chips/cc2420/security/CC2420KeysC.nc
@@ -0,0 +1,56 @@
+/*
+* Copyright (c) 2008 Johns Hopkins University.
+* All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author JeongGil Ko
+ * @author Razvan Musaloiu-E.
+ * @author Jong Hyun Lim
+ */
+
+configuration CC2420KeysC
+{
+  provides interface CC2420Keys;
+}
+
+implementation
+{
+  components new CC2420SpiC();
+  components HplCC2420PinsC as Pins;
+  components CC2420KeysP;
+
+  CC2420Keys = CC2420KeysP;
+
+  CC2420KeysP.CSN -> Pins.CSN;
+  CC2420KeysP.KEY0 -> CC2420SpiC.KEY0;
+  CC2420KeysP.KEY1 -> CC2420SpiC.KEY1;
+  CC2420KeysP.Resource -> CC2420SpiC.Resource;
+}
diff --git a/tos/chips/cc2420/security/CC2420KeysP.nc b/tos/chips/cc2420/security/CC2420KeysP.nc
new file mode 100644
index 00000000..d4d6420a
--- /dev/null
+++ b/tos/chips/cc2420/security/CC2420KeysP.nc
@@ -0,0 +1,95 @@
+/*
+* Copyright (c) 2008 Johns Hopkins University.
+* All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author JeongGil Ko
+ * @author Razvan Musaloiu-E.
+ * @author Jong Hyun Lim
+ */
+
+module CC2420KeysP
+{
+  provides interface CC2420Keys;
+
+  uses {
+    interface GeneralIO as CSN;
+    interface CC2420Ram as KEY0;
+    interface CC2420Ram as KEY1;
+    interface Resource;
+  }
+}
+
+implementation
+{
+  uint8_t *currentKey = NULL;
+  bool currentKeyNo;
+
+  task void resourceReq()
+  {
+    error_t error;
+    error = call Resource.immediateRequest();
+    if(error != SUCCESS){
+      post resourceReq();
+    }
+  }
+
+  command error_t CC2420Keys.setKey(uint8_t keyNo, uint8_t* key)
+  {
+    if (currentKey != NULL || keyNo > 1) {
+      return FAIL;
+    }
+    currentKey = key;
+    currentKeyNo = keyNo;
+
+    if(call Resource.request() != SUCCESS){
+      post resourceReq();
+    }
+
+    return SUCCESS;
+  }
+
+  event void Resource.granted()
+  {
+    if (currentKeyNo) {
+      call CSN.clr();
+      call KEY1.write(0, currentKey, 16);
+      call CSN.set();
+    } else {
+      call CSN.clr();
+      call KEY0.write(0, currentKey, 16);
+      call CSN.set();
+    }
+    call Resource.release();
+    currentKey = NULL;
+    signal CC2420Keys.setKeyDone(currentKeyNo, currentKey);
+  }
+}
diff --git a/tos/chips/cc2420/security/SecAMSenderC.nc b/tos/chips/cc2420/security/SecAMSenderC.nc
new file mode 100644
index 00000000..ddc93f60
--- /dev/null
+++ b/tos/chips/cc2420/security/SecAMSenderC.nc
@@ -0,0 +1,69 @@
+/*
+* Copyright (c) 2008 Johns Hopkins University.
+* All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author JeongGil Ko
+ * @author Razvan Musaloiu-E.
+ * @author Jong Hyun Lim
+ */
+
+generic configuration SecAMSenderC(am_id_t id)
+{
+  provides {
+    interface AMSend;
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+    interface CC2420SecurityMode;
+  }
+}
+
+implementation
+{
+  components ActiveMessageC;
+  components NoLedsC;
+  components LedsC;
+  components new CC2420SpiC();
+  components CC2420ActiveMessageC;
+  components new AMSenderC(id);
+  components new SecAMSenderP(id);
+
+  AMSend = SecAMSenderP.AMSend;
+  Packet = AMSenderC;
+  Acks = CC2420ActiveMessageC;
+  AMPacket = CC2420ActiveMessageC;
+  CC2420SecurityMode = SecAMSenderP;
+
+  SecAMSenderP.SubAMSend -> AMSenderC;
+  SecAMSenderP.SecurityPacket -> AMSenderC;
+  SecAMSenderP.Leds -> NoLedsC;
+}
diff --git a/tos/chips/cc2420/security/SecAMSenderP.nc b/tos/chips/cc2420/security/SecAMSenderP.nc
new file mode 100644
index 00000000..96c8f132
--- /dev/null
+++ b/tos/chips/cc2420/security/SecAMSenderP.nc
@@ -0,0 +1,184 @@
+/*
+* Copyright (c) 2008 Johns Hopkins University.
+* All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author JeongGil Ko
+ * @author Razvan Musaloiu-E.
+ * @author Jong Hyun Lim
+ */
+
+generic module SecAMSenderP(am_id_t id)
+{
+  provides {
+    interface AMSend;
+    interface CC2420SecurityMode;
+  }
+
+  uses {
+    interface AMSend as SubAMSend;
+    interface Packet as SecurityPacket;
+    interface AMPacket;
+    interface Leds;
+  }
+}
+
+implementation
+{
+  uint32_t nonceCounter = 0;
+  uint8_t secLevel = NO_SEC;
+  uint8_t keyIndex = 0;
+  uint8_t reserved = 0; // skip in cc2420 implementations
+  uint8_t micLength = 0;
+  uint8_t length;
+
+  command error_t AMSend.send(am_addr_t addr, message_t* msg, uint8_t len)
+  {
+    cc2420_header_t* hdr = (cc2420_header_t*)msg->header;
+    security_header_t* secHdr = (security_header_t*)&hdr->secHdr;
+
+    if(secHdr->secLevel == CBC_MAC_4 || secHdr->secLevel == CCM_4){
+      micLength = 4;
+    }else if(secHdr->secLevel == CBC_MAC_8 || secHdr->secLevel == CCM_8){
+      micLength = 8;
+    }else if(secHdr->secLevel == CBC_MAC_16 || secHdr->secLevel == CCM_16){
+      micLength = 16;
+    }
+
+    return call SubAMSend.send(addr, msg, len + (((secHdr->secLevel >= CBC_MAC_4 && secHdr->secLevel <= CBC_MAC_16) || (secHdr->secLevel >= CCM_4 && secHdr->secLevel <= CCM_16)) ? micLength : 0));
+  }
+
+  command uint8_t AMSend.maxPayloadLength()
+  {
+    return call SecurityPacket.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload(message_t* msg, uint8_t len)
+  {
+    return call SecurityPacket.getPayload(msg, len);
+  }
+
+  command error_t AMSend.cancel(message_t* msg) { return call SubAMSend.cancel(msg); }
+  event void SubAMSend.sendDone(message_t *msg, error_t error) { signal AMSend.sendDone(msg, error); }
+
+
+
+
+  command error_t CC2420SecurityMode.setCtr(message_t* msg, uint8_t setKey, uint8_t setSkip)
+  {
+    cc2420_header_t* hdr = (cc2420_header_t*)msg->header;
+    security_header_t* secHdr = (security_header_t*)&hdr->secHdr;
+
+    if (setKey > 1 || setSkip > 7){
+      return FAIL;
+    }
+    secLevel = CTR;
+    keyIndex = setKey;
+    reserved = setSkip;
+
+    nonceCounter++;
+
+    secHdr->secLevel = secLevel;
+    secHdr->keyMode = 1; // Fixed to 1 for now
+    secHdr->reserved = reserved; //skip in cc2420
+    secHdr->frameCounter = nonceCounter;
+    secHdr->keyID[0] = keyIndex; // Always first position for now due to fixed keyMode
+    hdr->fcf |= 1 << IEEE154_FCF_SECURITY_ENABLED;
+    return SUCCESS;
+  }
+
+
+
+  command error_t CC2420SecurityMode.setCbcMac(message_t* msg, uint8_t setKey, uint8_t setSkip, uint8_t size)
+  {
+    cc2420_header_t* hdr = (cc2420_header_t*)msg->header;
+    security_header_t* secHdr = (security_header_t*)&hdr->secHdr;
+
+    if (setKey > 1 || (size != 4 && size != 8 && size != 16) || (setSkip > 7)){
+      return FAIL;
+    }
+
+    if(size == 4)
+      secLevel = CBC_MAC_4;
+    else if (size == 8)
+      secLevel = CBC_MAC_8;
+    else if (size == 16)
+      secLevel = CBC_MAC_16;
+    else
+      return FAIL;
+    keyIndex = setKey;
+    reserved = setSkip;
+
+    nonceCounter++;
+
+    secHdr->secLevel = secLevel;
+    secHdr->keyMode = 1; // Fixed to 1 for now
+    secHdr->reserved = reserved; //skip in cc2420
+    secHdr->frameCounter = nonceCounter;
+    secHdr->keyID[0] = keyIndex; // Always first position for now due to fixed keyMode
+    hdr->fcf |= 1 << IEEE154_FCF_SECURITY_ENABLED;
+
+    return SUCCESS;
+  }
+
+
+  command error_t CC2420SecurityMode.setCcm(message_t* msg, uint8_t setKey, uint8_t setSkip, uint8_t size)
+  {
+    cc2420_header_t* hdr = (cc2420_header_t*)msg->header;
+    security_header_t* secHdr = (security_header_t*)&hdr->secHdr;
+
+    if (setKey > 1 || (size != 4 && size != 8 && size != 16) || (setSkip > 7)){
+      return FAIL;
+    }
+
+    if(size == 4)
+      secLevel = CCM_4;
+    else if (size == 8)
+      secLevel = CCM_8;
+    else if (size == 16)
+      secLevel = CCM_16;
+    else
+      return FAIL;
+    keyIndex = setKey;
+    reserved = setSkip;
+
+    nonceCounter++;
+
+    secHdr->secLevel = secLevel;
+    secHdr->keyMode = 1; // Fixed to 1 for now
+    secHdr->reserved = reserved; //skip in cc2420
+    secHdr->frameCounter = nonceCounter;
+    secHdr->keyID[0] = keyIndex; // Always first position for now due to fixed keyMode
+    hdr->fcf |= 1 << IEEE154_FCF_SECURITY_ENABLED;
+
+    return SUCCESS;
+  }
+}
diff --git a/tos/chips/cc2420/spi/CC2420SpiC.nc b/tos/chips/cc2420/spi/CC2420SpiC.nc
new file mode 100644
index 00000000..feaf3760
--- /dev/null
+++ b/tos/chips/cc2420/spi/CC2420SpiC.nc
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of basic SPI primitives for the ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2009-08-14 20:33:43 $
+ */
+
+generic configuration CC2420SpiC() {
+
+  provides interface Resource;
+  provides interface ChipSpiResource;
+
+  // commands
+  provides interface CC2420Strobe as SNOP;
+  provides interface CC2420Strobe as SXOSCON;
+  provides interface CC2420Strobe as STXCAL;
+  provides interface CC2420Strobe as SRXON;
+  provides interface CC2420Strobe as STXON;
+  provides interface CC2420Strobe as STXONCCA;
+  provides interface CC2420Strobe as SRFOFF;
+  provides interface CC2420Strobe as SXOSCOFF;
+  provides interface CC2420Strobe as SFLUSHRX;
+  provides interface CC2420Strobe as SFLUSHTX;
+  provides interface CC2420Strobe as SACK;
+  provides interface CC2420Strobe as SACKPEND;
+  provides interface CC2420Strobe as SRXDEC;
+  provides interface CC2420Strobe as STXENC;
+  provides interface CC2420Strobe as SAES;
+
+  // registers
+  provides interface CC2420Register as MAIN;
+  provides interface CC2420Register as MDMCTRL0;
+  provides interface CC2420Register as MDMCTRL1;
+  provides interface CC2420Register as RSSI;
+  provides interface CC2420Register as SYNCWORD;
+  provides interface CC2420Register as TXCTRL;
+  provides interface CC2420Register as RXCTRL0;
+  provides interface CC2420Register as RXCTRL1;
+  provides interface CC2420Register as FSCTRL;
+  provides interface CC2420Register as SECCTRL0;
+  provides interface CC2420Register as SECCTRL1;
+  provides interface CC2420Register as BATTMON;
+  provides interface CC2420Register as IOCFG0;
+  provides interface CC2420Register as IOCFG1;
+  provides interface CC2420Register as MANFIDL;
+  provides interface CC2420Register as MANFIDH;
+  provides interface CC2420Register as FSMTC;
+  provides interface CC2420Register as MANAND;
+  provides interface CC2420Register as MANOR;
+  provides interface CC2420Register as AGCCTRL;
+  provides interface CC2420Register as RXFIFO_REGISTER;
+
+  // ram
+  provides interface CC2420Ram as IEEEADR;
+  provides interface CC2420Ram as PANID;
+  provides interface CC2420Ram as SHORTADR;
+  provides interface CC2420Ram as TXFIFO_RAM;
+  provides interface CC2420Ram as RXFIFO_RAM;
+  provides interface CC2420Ram as KEY0;
+  provides interface CC2420Ram as KEY1;
+  provides interface CC2420Ram as SABUF;
+  provides interface CC2420Ram as TXNONCE;
+  provides interface CC2420Ram as RXNONCE;
+
+  // fifos
+  provides interface CC2420Fifo as RXFIFO;
+  provides interface CC2420Fifo as TXFIFO;
+
+}
+
+implementation {
+
+  enum {
+    CLIENT_ID = unique( "CC2420Spi.Resource" ),
+  };
+  
+  components HplCC2420PinsC as Pins;
+  components CC2420SpiWireC as Spi;
+  
+  ChipSpiResource = Spi.ChipSpiResource;
+  Resource = Spi.Resource[ CLIENT_ID ];
+  
+  // commands
+  SNOP = Spi.Strobe[ CC2420_SNOP ];
+  SXOSCON = Spi.Strobe[ CC2420_SXOSCON ];
+  STXCAL = Spi.Strobe[ CC2420_STXCAL ];
+  SRXON = Spi.Strobe[ CC2420_SRXON ];
+  STXON = Spi.Strobe[ CC2420_STXON ];
+  STXONCCA = Spi.Strobe[ CC2420_STXONCCA ];
+  SRFOFF = Spi.Strobe[ CC2420_SRFOFF ];
+  SXOSCOFF = Spi.Strobe[ CC2420_SXOSCOFF ];
+  SFLUSHRX = Spi.Strobe[ CC2420_SFLUSHRX ];
+  SFLUSHTX = Spi.Strobe[ CC2420_SFLUSHTX ];
+  SACK = Spi.Strobe[ CC2420_SACK ];
+  SACKPEND = Spi.Strobe[ CC2420_SACKPEND ];
+  SRXDEC = Spi.Strobe[ CC2420_SRXDEC ];
+  STXENC = Spi.Strobe[ CC2420_STXENC ];
+  SAES = Spi.Strobe[ CC2420_SAES ];
+  
+  // registers
+  MAIN = Spi.Reg[ CC2420_MAIN ];
+  MDMCTRL0 = Spi.Reg[ CC2420_MDMCTRL0 ];
+  MDMCTRL1 = Spi.Reg[ CC2420_MDMCTRL1 ];
+  RSSI = Spi.Reg[ CC2420_RSSI ];
+  SYNCWORD = Spi.Reg[ CC2420_SYNCWORD ];
+  TXCTRL = Spi.Reg[ CC2420_TXCTRL ];
+  RXCTRL0 = Spi.Reg[ CC2420_RXCTRL0 ];
+  RXCTRL1 = Spi.Reg[ CC2420_RXCTRL1 ];
+  FSCTRL = Spi.Reg[ CC2420_FSCTRL ];
+  SECCTRL0 = Spi.Reg[ CC2420_SECCTRL0 ];
+  SECCTRL1 = Spi.Reg[ CC2420_SECCTRL1 ];
+  BATTMON = Spi.Reg[ CC2420_BATTMON ];
+  IOCFG0 = Spi.Reg[ CC2420_IOCFG0 ];
+  IOCFG1 = Spi.Reg[ CC2420_IOCFG1 ];
+  MANFIDL = Spi.Reg[ CC2420_MANFIDL ];
+  MANFIDH = Spi.Reg[ CC2420_MANFIDH ];
+  FSMTC = Spi.Reg[ CC2420_FSMTC ];
+  MANAND = Spi.Reg[ CC2420_MANAND ];
+  MANOR = Spi.Reg[ CC2420_MANOR ];
+  AGCCTRL = Spi.Reg[ CC2420_AGCCTRL ];
+  RXFIFO_REGISTER = Spi.Reg[ CC2420_RXFIFO ];
+  
+  // ram
+  IEEEADR = Spi.Ram[ CC2420_RAM_IEEEADR ];
+  PANID = Spi.Ram[ CC2420_RAM_PANID ];
+  SHORTADR = Spi.Ram[ CC2420_RAM_SHORTADR ];
+  TXFIFO_RAM = Spi.Ram[ CC2420_RAM_TXFIFO ];
+  RXFIFO_RAM = Spi.Ram[ CC2420_RAM_RXFIFO ];
+  KEY0 = Spi.Ram[ CC2420_RAM_KEY0 ];
+  KEY1 = Spi.Ram[ CC2420_RAM_KEY1 ];
+  SABUF = Spi.Ram[ CC2420_RAM_SABUF ];
+  TXNONCE = Spi.Ram[ CC2420_RAM_TXNONCE ];
+  RXNONCE = Spi.Ram[ CC2420_RAM_RXNONCE ];
+
+  // fifos
+  RXFIFO = Spi.Fifo[ CC2420_RXFIFO ];
+  TXFIFO = Spi.Fifo[ CC2420_TXFIFO ];
+
+}
+
diff --git a/tos/chips/cc2420/spi/CC2420SpiP.nc b/tos/chips/cc2420/spi/CC2420SpiP.nc
new file mode 100644
index 00000000..b95fcfdd
--- /dev/null
+++ b/tos/chips/cc2420/spi/CC2420SpiP.nc
@@ -0,0 +1,379 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Roman Lim
+ * @author Razvan Musaloie-E.
+ * @author Jeonggil Ko
+ * @version $Revision: 1.4 $ $Date: 2008-06-23 20:25:15 $
+ */
+
+module CC2420SpiP @safe() {
+
+  provides {
+    interface ChipSpiResource;
+    interface Resource[ uint8_t id ];
+    interface CC2420Fifo as Fifo[ uint8_t id ];
+    interface CC2420Ram as Ram[ uint16_t id ];
+    interface CC2420Register as Reg[ uint8_t id ];
+    interface CC2420Strobe as Strobe[ uint8_t id ];
+  }
+  
+  uses {
+    interface Resource as SpiResource;
+    interface SpiByte;
+    interface SpiPacket;
+    interface State as WorkingState;
+    interface Leds;
+  }
+}
+
+implementation {
+
+  enum {
+    RESOURCE_COUNT = uniqueCount( "CC2420Spi.Resource" ),
+    NO_HOLDER = 0xFF,
+  };
+
+  /** WorkingStates */
+  enum {
+    S_IDLE,
+    S_BUSY,
+  };
+
+  /** Address to read/write on the CC2420, also maintains caller's client id */
+  norace uint16_t m_addr;
+  
+  /** Each bit represents a client ID that is requesting SPI bus access */
+  uint8_t m_requests = 0;
+  
+  /** The current client that owns the SPI bus */
+  uint8_t m_holder = NO_HOLDER;
+  
+  /** TRUE if it is safe to release the SPI bus after all users say ok */
+  bool release;
+  
+  /***************** Prototypes ****************/
+  error_t attemptRelease();
+  task void grant();
+  
+  /***************** ChipSpiResource Commands ****************/
+  /**
+   * Abort the release of the SPI bus.  This must be called only with the
+   * releasing() event
+   */
+  async command void ChipSpiResource.abortRelease() {
+    atomic release = FALSE;
+  }
+  
+  /**
+   * Release the SPI bus if there are no objections
+   */
+  async command error_t ChipSpiResource.attemptRelease() {
+    return attemptRelease();
+  }
+  
+  /***************** Resource Commands *****************/
+  async command error_t Resource.request[ uint8_t id ]() {
+        
+    atomic {
+      if ( call WorkingState.requestState(S_BUSY) == SUCCESS ) {
+        m_holder = id;
+        if(call SpiResource.isOwner()) {
+          post grant();
+          
+        } else {
+          call SpiResource.request();
+        }
+        
+      } else {
+        m_requests |= 1 << id;
+      }
+    }
+    return SUCCESS;
+  }
+  
+  async command error_t Resource.immediateRequest[ uint8_t id ]() {
+    error_t error;
+        
+    atomic {
+      if ( call WorkingState.requestState(S_BUSY) != SUCCESS ) {
+        return EBUSY;
+      }
+      
+      
+      if(call SpiResource.isOwner()) {
+        m_holder = id;
+        error = SUCCESS;
+      
+      } else if ((error = call SpiResource.immediateRequest()) == SUCCESS ) {
+        m_holder = id;
+        
+      } else {
+        call WorkingState.toIdle();
+      }
+    }
+    return error;
+  }
+
+  async command error_t Resource.release[ uint8_t id ]() {
+    uint8_t i;
+    atomic {
+      if ( m_holder != id ) {
+        return FAIL;
+      }
+
+      m_holder = NO_HOLDER;
+      if ( !m_requests ) {
+        call WorkingState.toIdle();
+        attemptRelease();
+        
+      } else {
+        for ( i = m_holder + 1; ; i++ ) {
+          i %= RESOURCE_COUNT;
+          
+          if ( m_requests & ( 1 << i ) ) {
+            m_holder = i;
+            m_requests &= ~( 1 << i );
+            post grant();
+            return SUCCESS;
+          }
+        }
+      }
+    }
+    
+    return SUCCESS;
+  }
+  
+  async command uint8_t Resource.isOwner[ uint8_t id ]() {
+    atomic return (m_holder == id);
+  }
+
+
+  /***************** SpiResource Events ****************/
+  event void SpiResource.granted() {
+    post grant();
+  }
+  
+  /***************** Fifo Commands ****************/
+  async command cc2420_status_t Fifo.beginRead[ uint8_t addr ]( uint8_t* data, 
+                                                                uint8_t len ) {
+    
+    cc2420_status_t status = 0;
+
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return status;
+      }
+    }
+    
+    m_addr = addr | 0x40;
+        
+    status = call SpiByte.write( m_addr );
+    call Fifo.continueRead[ addr ]( data, len );
+    
+    return status;
+    
+  }
+
+  async command error_t Fifo.continueRead[ uint8_t addr ]( uint8_t* data,
+                                                           uint8_t len ) {
+    return call SpiPacket.send( NULL, data, len );
+  }
+
+  async command cc2420_status_t Fifo.write[ uint8_t addr ]( uint8_t* data, 
+                                                            uint8_t len ) {
+
+    uint8_t status = 0;
+ 
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return status;
+      }
+    }
+    
+    m_addr = addr;
+
+    status = call SpiByte.write( m_addr );
+    call SpiPacket.send( data, NULL, len );
+
+    return status;
+
+  }
+
+  /***************** RAM Commands ****************/
+  async command cc2420_status_t Ram.read[ uint16_t addr ]( uint8_t offset,
+                                                           uint8_t* data, 
+                                                           uint8_t len ) {
+
+    cc2420_status_t status = 0;
+
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return status;
+      }
+    }
+    
+    addr += offset;
+
+    status = call SpiByte.write( addr | 0x80 );
+    call SpiByte.write( ( ( addr >> 1 ) & 0xC0 ) | 0x20 );
+    for ( ; len; len-- ) {
+      *data++ = call SpiByte.write( 0 );
+    }
+
+    return status;
+
+  }
+
+
+  async command cc2420_status_t Ram.write[ uint16_t addr ]( uint8_t offset,
+                                                            uint8_t* data, 
+                                                            uint8_t len ) {
+
+    cc2420_status_t status = 0;
+    uint8_t tmpLen = len;
+    uint8_t * COUNT(tmpLen) tmpData = (uint8_t * COUNT(tmpLen))data;
+
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return status;
+      }
+    }
+    
+    addr += offset;
+
+    status = call SpiByte.write( addr | 0x80 );
+    call SpiByte.write( ( addr >> 1 ) & 0xc0 );
+    for ( ; len; len-- ) {
+      call SpiByte.write( tmpData[tmpLen-len] );
+    }
+
+    return status;
+
+  }
+
+  /***************** Register Commands ****************/
+  async command cc2420_status_t Reg.read[ uint8_t addr ]( uint16_t* data ) {
+
+    cc2420_status_t status = 0;
+    
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return status;
+      }
+    }
+    
+    status = call SpiByte.write( addr | 0x40 );
+    *data = (uint16_t)call SpiByte.write( 0 ) << 8;
+    *data |= call SpiByte.write( 0 );
+    
+    return status;
+
+  }
+
+  async command cc2420_status_t Reg.write[ uint8_t addr ]( uint16_t data ) {
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return 0;
+      }
+    }
+    call SpiByte.write( addr );
+    call SpiByte.write( data >> 8 );
+    return call SpiByte.write( data & 0xff );
+  }
+
+  
+  /***************** Strobe Commands ****************/
+  async command cc2420_status_t Strobe.strobe[ uint8_t addr ]() {
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return 0;
+      }
+    }
+    
+    return call SpiByte.write( addr );
+  }
+
+  /***************** SpiPacket Events ****************/
+  async event void SpiPacket.sendDone( uint8_t* tx_buf, uint8_t* rx_buf, 
+                                       uint16_t len, error_t error ) {
+    if ( m_addr & 0x40 ) {
+      signal Fifo.readDone[ m_addr & ~0x40 ]( rx_buf, len, error );
+    } else {
+      signal Fifo.writeDone[ m_addr ]( tx_buf, len, error );
+    }
+  }
+  
+  /***************** Functions ****************/
+  error_t attemptRelease() {
+    if(m_requests > 0 
+        || m_holder != NO_HOLDER 
+        || !call WorkingState.isIdle()) {
+      return FAIL;
+    }
+    
+    atomic release = TRUE;
+    signal ChipSpiResource.releasing();
+    atomic {
+      if(release) {
+        call SpiResource.release();
+        return SUCCESS;
+      }
+    }
+    
+    return EBUSY;
+  }
+  
+  task void grant() {
+    uint8_t holder;
+    atomic { 
+      holder = m_holder;
+    }
+    signal Resource.granted[ holder ]();
+  }
+
+  /***************** Defaults ****************/
+  default event void Resource.granted[ uint8_t id ]() {
+  }
+
+  default async event void Fifo.readDone[ uint8_t addr ]( uint8_t* rx_buf, uint8_t rx_len, error_t error ) {
+  }
+  
+  default async event void Fifo.writeDone[ uint8_t addr ]( uint8_t* tx_buf, uint8_t tx_len, error_t error ) {
+  }
+
+  default async event void ChipSpiResource.releasing() {
+  }
+  
+}
diff --git a/tos/chips/cc2420/spi/CC2420SpiWireC.nc b/tos/chips/cc2420/spi/CC2420SpiWireC.nc
new file mode 100644
index 00000000..117664f2
--- /dev/null
+++ b/tos/chips/cc2420/spi/CC2420SpiWireC.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2007-07-04 00:37:16 $
+ */
+
+configuration CC2420SpiWireC {
+  
+  provides interface Resource[ uint8_t id ];
+  provides interface ChipSpiResource;
+  provides interface CC2420Fifo as Fifo[ uint8_t id ];
+  provides interface CC2420Ram as Ram[ uint16_t id ];
+  provides interface CC2420Register as Reg[ uint8_t id ];
+  provides interface CC2420Strobe as Strobe[ uint8_t id ];
+
+}
+
+implementation {
+
+  components CC2420SpiP as SpiP;
+  Resource = SpiP;
+  Fifo = SpiP;
+  Ram = SpiP;
+  Reg = SpiP;
+  Strobe = SpiP;
+  ChipSpiResource = SpiP;
+
+  components new StateC() as WorkingStateC;
+  SpiP.WorkingState -> WorkingStateC;
+  
+  components new HplCC2420SpiC();
+  SpiP.SpiResource -> HplCC2420SpiC;
+  SpiP.SpiByte -> HplCC2420SpiC;
+  SpiP.SpiPacket -> HplCC2420SpiC;
+
+  components LedsC;
+  SpiP.Leds -> LedsC;
+
+}
diff --git a/tos/chips/cc2420/transmit/CC2420TransmitC.nc b/tos/chips/cc2420/transmit/CC2420TransmitC.nc
new file mode 100644
index 00000000..45afbb0f
--- /dev/null
+++ b/tos/chips/cc2420/transmit/CC2420TransmitC.nc
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the transmit path for the ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.3 $ $Date: 2009-08-14 20:33:43 $
+ */
+
+#include "IEEE802154.h"
+
+configuration CC2420TransmitC {
+
+  provides {
+    interface StdControl;
+    interface CC2420Transmit;
+    interface RadioBackoff;
+    interface ReceiveIndicator as EnergyIndicator;
+    interface ReceiveIndicator as ByteIndicator;
+  }
+}
+
+implementation {
+
+  components CC2420TransmitP;
+  StdControl = CC2420TransmitP;
+  CC2420Transmit = CC2420TransmitP;
+  RadioBackoff = CC2420TransmitP;
+  EnergyIndicator = CC2420TransmitP.EnergyIndicator;
+  ByteIndicator = CC2420TransmitP.ByteIndicator;
+
+  components MainC;
+  MainC.SoftwareInit -> CC2420TransmitP;
+  MainC.SoftwareInit -> Alarm;
+  
+  components AlarmMultiplexC as Alarm;
+  CC2420TransmitP.BackoffTimer -> Alarm;
+
+  components HplCC2420PinsC as Pins;
+  CC2420TransmitP.CCA -> Pins.CCA;
+  CC2420TransmitP.CSN -> Pins.CSN;
+  CC2420TransmitP.SFD -> Pins.SFD;
+
+  components HplCC2420InterruptsC as Interrupts;
+  CC2420TransmitP.CaptureSFD -> Interrupts.CaptureSFD;
+
+  components new CC2420SpiC() as Spi;
+  CC2420TransmitP.SpiResource -> Spi;
+  CC2420TransmitP.ChipSpiResource -> Spi;
+  CC2420TransmitP.SNOP        -> Spi.SNOP;
+  CC2420TransmitP.STXON       -> Spi.STXON;
+  CC2420TransmitP.STXONCCA    -> Spi.STXONCCA;
+  CC2420TransmitP.SFLUSHTX    -> Spi.SFLUSHTX;
+  CC2420TransmitP.TXCTRL      -> Spi.TXCTRL;
+  CC2420TransmitP.TXFIFO      -> Spi.TXFIFO;
+  CC2420TransmitP.TXFIFO_RAM  -> Spi.TXFIFO_RAM;
+  CC2420TransmitP.MDMCTRL1    -> Spi.MDMCTRL1;
+  CC2420TransmitP.SECCTRL0 -> Spi.SECCTRL0;
+  CC2420TransmitP.SECCTRL1 -> Spi.SECCTRL1;
+  CC2420TransmitP.STXENC -> Spi.STXENC;
+  CC2420TransmitP.TXNONCE -> Spi.TXNONCE;
+  CC2420TransmitP.KEY0 -> Spi.KEY0;
+  CC2420TransmitP.KEY1 -> Spi.KEY1;
+  
+  components CC2420ReceiveC;
+  CC2420TransmitP.CC2420Receive -> CC2420ReceiveC;
+  
+  components CC2420PacketC;
+  CC2420TransmitP.CC2420Packet -> CC2420PacketC;
+  CC2420TransmitP.CC2420PacketBody -> CC2420PacketC;
+  CC2420TransmitP.PacketTimeStamp -> CC2420PacketC;
+  CC2420TransmitP.PacketTimeSyncOffset -> CC2420PacketC;
+
+  components LedsC;
+  CC2420TransmitP.Leds -> LedsC;
+
+}
diff --git a/tos/chips/cc2420/transmit/CC2420TransmitP.nc b/tos/chips/cc2420/transmit/CC2420TransmitP.nc
new file mode 100644
index 00000000..8bb579bb
--- /dev/null
+++ b/tos/chips/cc2420/transmit/CC2420TransmitP.nc
@@ -0,0 +1,852 @@
+/* 
+ * Copyright (c) 2005-2006 Arch Rock Corporation 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Jung Il Choi Initial SACK implementation
+ * @author JeongGil Ko
+ * @author Razvan Musaloiu-E
+ * @version $Revision: 1.18 $ $Date: 2010-04-13 20:27:05 $
+ */
+
+#include "CC2420.h"
+#include "CC2420TimeSyncMessage.h"
+#include "crc.h"
+#include "message.h"
+
+module CC2420TransmitP @safe() {
+
+  provides interface Init;
+  provides interface StdControl;
+  provides interface CC2420Transmit as Send;
+  provides interface RadioBackoff;
+  provides interface ReceiveIndicator as EnergyIndicator;
+  provides interface ReceiveIndicator as ByteIndicator;
+  
+  uses interface Alarm<T32khz,uint32_t> as BackoffTimer;
+  uses interface CC2420Packet;
+  uses interface CC2420PacketBody;
+  uses interface PacketTimeStamp<T32khz,uint32_t>;
+  uses interface PacketTimeSyncOffset;
+  uses interface GpioCapture as CaptureSFD;
+  uses interface GeneralIO as CCA;
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as SFD;
+
+  uses interface Resource as SpiResource;
+  uses interface ChipSpiResource;
+  uses interface CC2420Fifo as TXFIFO;
+  uses interface CC2420Ram as TXFIFO_RAM;
+  uses interface CC2420Register as TXCTRL;
+  uses interface CC2420Strobe as SNOP;
+  uses interface CC2420Strobe as STXON;
+  uses interface CC2420Strobe as STXONCCA;
+  uses interface CC2420Strobe as SFLUSHTX;
+  uses interface CC2420Register as MDMCTRL1;
+
+  uses interface CC2420Strobe as STXENC;
+  uses interface CC2420Register as SECCTRL0;
+  uses interface CC2420Register as SECCTRL1;
+  uses interface CC2420Ram as KEY0;
+  uses interface CC2420Ram as KEY1;
+  uses interface CC2420Ram as TXNONCE;
+
+  uses interface CC2420Receive;
+  uses interface Leds;
+}
+
+implementation {
+
+  typedef enum {
+    S_STOPPED,
+    S_STARTED,
+    S_LOAD,
+    S_SAMPLE_CCA,
+    S_BEGIN_TRANSMIT,
+    S_SFD,
+    S_EFD,
+    S_ACK_WAIT,
+    S_CANCEL,
+  } cc2420_transmit_state_t;
+
+  // This specifies how many jiffies the stack should wait after a
+  // TXACTIVE to receive an SFD interrupt before assuming something is
+  // wrong and aborting the send. There seems to be a condition
+  // on the micaZ where the SFD interrupt is never handled.
+  enum {
+    CC2420_ABORT_PERIOD = 320
+  };
+
+#ifdef CC2420_HW_SECURITY
+  uint16_t startTime = 0;
+  norace uint8_t secCtrlMode = 0;
+  norace uint8_t nonceValue[16] = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01};
+  norace uint8_t skip;
+  norace uint16_t CTR_SECCTRL0, CTR_SECCTRL1;
+  uint8_t securityChecked = 0;
+  
+  void securityCheck();
+#endif
+  
+  norace message_t * ONE_NOK m_msg;
+  
+  norace bool m_cca;
+  
+  norace uint8_t m_tx_power;
+  
+  cc2420_transmit_state_t m_state = S_STOPPED;
+
+  bool m_receiving = FALSE;
+  
+  uint16_t m_prev_time;
+  
+  /** Byte reception/transmission indicator */
+  bool sfdHigh;
+  
+  /** Let the CC2420 driver keep a lock on the SPI while waiting for an ack */
+  bool abortSpiRelease;
+  
+  /** Total CCA checks that showed no activity before the NoAck LPL send */
+  norace int8_t totalCcaChecks;
+  
+  /** The initial backoff period */
+  norace uint16_t myInitialBackoff;
+  
+  /** The congestion backoff period */
+  norace uint16_t myCongestionBackoff;
+  
+
+  /***************** Prototypes ****************/
+  error_t send( message_t * ONE p_msg, bool cca );
+  error_t resend( bool cca );
+  void loadTXFIFO();
+  void attemptSend();
+  void congestionBackoff();
+  error_t acquireSpiResource();
+  error_t releaseSpiResource();
+  void signalDone( error_t err );
+  
+  
+  /***************** Init Commands *****************/
+  command error_t Init.init() {
+    call CCA.makeInput();
+    call CSN.makeOutput();
+    call SFD.makeInput();
+    return SUCCESS;
+  }
+
+  /***************** StdControl Commands ****************/
+  command error_t StdControl.start() {
+    atomic {
+      call CaptureSFD.captureRisingEdge();
+      m_state = S_STARTED;
+      m_receiving = FALSE;
+      abortSpiRelease = FALSE;
+      m_tx_power = 0;
+    }
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    atomic {
+      m_state = S_STOPPED;
+      call BackoffTimer.stop();
+      call CaptureSFD.disable();
+      call SpiResource.release();  // REMOVE
+      call CSN.set();
+    }
+    return SUCCESS;
+  }
+
+
+  /**************** Send Commands ****************/
+  async command error_t Send.send( message_t* ONE p_msg, bool useCca ) {
+    return send( p_msg, useCca );
+  }
+
+  async command error_t Send.resend(bool useCca) {
+    return resend( useCca );
+  }
+
+  async command error_t Send.cancel() {
+    atomic {
+      switch( m_state ) {
+      case S_LOAD:
+      case S_SAMPLE_CCA:
+      case S_BEGIN_TRANSMIT:
+        m_state = S_CANCEL;
+        break;
+        
+      default:
+        // cancel not allowed while radio is busy transmitting
+        return FAIL;
+      }
+    }
+
+    return SUCCESS;
+  }
+
+  async command error_t Send.modify( uint8_t offset, uint8_t* buf, 
+                                     uint8_t len ) {
+    call CSN.clr();
+    call TXFIFO_RAM.write( offset, buf, len );
+    call CSN.set();
+    return SUCCESS;
+  }
+  
+  /***************** Indicator Commands ****************/
+  command bool EnergyIndicator.isReceiving() {
+    return !(call CCA.get());
+  }
+  
+  command bool ByteIndicator.isReceiving() {
+    bool high;
+    atomic high = sfdHigh;
+    return high;
+  }
+  
+
+  /***************** RadioBackoff Commands ****************/
+  /**
+   * Must be called within a requestInitialBackoff event
+   * @param backoffTime the amount of time in some unspecified units to backoff
+   */
+  async command void RadioBackoff.setInitialBackoff(uint16_t backoffTime) {
+    myInitialBackoff = backoffTime + 1;
+  }
+  
+  /**
+   * Must be called within a requestCongestionBackoff event
+   * @param backoffTime the amount of time in some unspecified units to backoff
+   */
+  async command void RadioBackoff.setCongestionBackoff(uint16_t backoffTime) {
+    myCongestionBackoff = backoffTime + 1;
+  }
+  
+  async command void RadioBackoff.setCca(bool useCca) {
+  }
+  
+  // this method converts a 16-bit timestamp into a 32-bit one
+  inline uint32_t getTime32(uint16_t captured_time)
+  {
+    uint32_t now = call BackoffTimer.getNow();
+
+    // the captured_time is always in the past
+    return now - (uint16_t)(now - captured_time);
+  }
+
+  /**
+   * The CaptureSFD event is actually an interrupt from the capture pin
+   * which is connected to timing circuitry and timer modules.  This
+   * type of interrupt allows us to see what time (being some relative value)
+   * the event occurred, and lets us accurately timestamp our packets.  This
+   * allows higher levels in our system to synchronize with other nodes.
+   *
+   * Because the SFD events can occur so quickly, and the interrupts go
+   * in both directions, we set up the interrupt but check the SFD pin to
+   * determine if that interrupt condition has already been met - meaning,
+   * we should fall through and continue executing code where that interrupt
+   * would have picked up and executed had our microcontroller been fast enough.
+   */
+  async event void CaptureSFD.captured( uint16_t time ) {
+    uint32_t time32;
+    uint8_t sfd_state = 0;
+    atomic {
+      time32 = getTime32(time);
+      switch( m_state ) {
+        
+      case S_SFD:
+        m_state = S_EFD;
+        sfdHigh = TRUE;
+        // in case we got stuck in the receive SFD interrupts, we can reset
+        // the state here since we know that we are not receiving anymore
+        m_receiving = FALSE;
+        call CaptureSFD.captureFallingEdge();
+        call PacketTimeStamp.set(m_msg, time32);
+        if (call PacketTimeSyncOffset.isSet(m_msg)) {
+           uint8_t absOffset = sizeof(message_header_t)-sizeof(cc2420_header_t)+call PacketTimeSyncOffset.get(m_msg);
+           timesync_radio_t *timesync = (timesync_radio_t *)((nx_uint8_t*)m_msg+absOffset);
+           // set timesync event time as the offset between the event time and the SFD interrupt time (TEP  133)
+           *timesync  -= time32;
+           call CSN.clr();
+           call TXFIFO_RAM.write( absOffset, (uint8_t*)timesync, sizeof(timesync_radio_t) );
+           call CSN.set();
+           //restoring the event time to the original value
+           *timesync  += time32;
+        }
+
+        if ( (call CC2420PacketBody.getHeader( m_msg ))->fcf & ( 1 << IEEE154_FCF_ACK_REQ ) ) {
+          // This is an ack packet, don't release the chip's SPI bus lock.
+          abortSpiRelease = TRUE;
+        }
+        releaseSpiResource();
+        call BackoffTimer.stop();
+
+        if ( call SFD.get() ) {
+          break;
+        }
+        /** Fall Through because the next interrupt was already received */
+
+      case S_EFD:
+        sfdHigh = FALSE;
+        call CaptureSFD.captureRisingEdge();
+        
+        if ( (call CC2420PacketBody.getHeader( m_msg ))->fcf & ( 1 << IEEE154_FCF_ACK_REQ ) ) {
+          m_state = S_ACK_WAIT;
+          call BackoffTimer.start( CC2420_ACK_WAIT_DELAY );
+        } else {
+          signalDone(SUCCESS);
+        }
+        
+        if ( !call SFD.get() ) {
+          break;
+        }
+        /** Fall Through because the next interrupt was already received */
+        
+      default:
+        /* this is the SFD for received messages */
+        if ( !m_receiving && sfdHigh == FALSE ) {
+          sfdHigh = TRUE;
+          call CaptureSFD.captureFallingEdge();
+          // safe the SFD pin status for later use
+          sfd_state = call SFD.get();
+          call CC2420Receive.sfd( time32 );
+          m_receiving = TRUE;
+          m_prev_time = time;
+          if ( call SFD.get() ) {
+            // wait for the next interrupt before moving on
+            return;
+          }
+          // if SFD.get() = 0, then an other interrupt happened since we
+          // reconfigured CaptureSFD! Fall through
+        }
+        
+        if ( sfdHigh == TRUE ) {
+          sfdHigh = FALSE;
+          call CaptureSFD.captureRisingEdge();
+          m_receiving = FALSE;
+          /* if sfd_state is 1, then we fell through, but at the time of
+           * saving the time stamp the SFD was still high. Thus, the timestamp
+           * is valid.
+           * if the sfd_state is 0, then either we fell through and SFD
+           * was low while we safed the time stamp, or we didn't fall through.
+           * Thus, we check for the time between the two interrupts.
+           * FIXME: Why 10 tics? Seams like some magic number...
+           */
+          if ((sfd_state == 0) && (time - m_prev_time < 10) ) {
+            call CC2420Receive.sfd_dropped();
+            if (m_msg)
+              call PacketTimeStamp.clear(m_msg);
+          }
+          break;
+        }
+      }
+    }
+  }
+
+  /***************** ChipSpiResource Events ****************/
+  async event void ChipSpiResource.releasing() {
+    if(abortSpiRelease) {
+      call ChipSpiResource.abortRelease();
+    }
+  }
+  
+  
+  /***************** CC2420Receive Events ****************/
+  /**
+   * If the packet we just received was an ack that we were expecting,
+   * our send is complete.
+   */
+  async event void CC2420Receive.receive( uint8_t type, message_t* ack_msg ) {
+    cc2420_header_t* ack_header;
+    cc2420_header_t* msg_header;
+    cc2420_metadata_t* msg_metadata;
+    uint8_t* ack_buf;
+    uint8_t length;
+
+    if ( type == IEEE154_TYPE_ACK && m_msg) {
+      ack_header = call CC2420PacketBody.getHeader( ack_msg );
+      msg_header = call CC2420PacketBody.getHeader( m_msg );
+      
+      if ( m_state == S_ACK_WAIT && msg_header->dsn == ack_header->dsn ) {
+        call BackoffTimer.stop();
+        
+        msg_metadata = call CC2420PacketBody.getMetadata( m_msg );
+        ack_buf = (uint8_t *) ack_header;
+        length = ack_header->length;
+        
+        msg_metadata->ack = TRUE;
+        msg_metadata->rssi = ack_buf[ length - 1 ];
+        msg_metadata->lqi = ack_buf[ length ] & 0x7f;
+        signalDone(SUCCESS);
+      }
+    }
+  }
+
+  /***************** SpiResource Events ****************/
+  event void SpiResource.granted() {
+    uint8_t cur_state;
+
+    atomic {
+      cur_state = m_state;
+    }
+
+    switch( cur_state ) {
+    case S_LOAD:
+      loadTXFIFO();
+      break;
+      
+    case S_BEGIN_TRANSMIT:
+      attemptSend();
+      break;
+      
+    case S_CANCEL:
+      call CSN.clr();
+      call SFLUSHTX.strobe();
+      call CSN.set();
+      releaseSpiResource();
+      atomic {
+        m_state = S_STARTED;
+      }
+      signal Send.sendDone( m_msg, ECANCEL );
+      break;
+      
+    default:
+      releaseSpiResource();
+      break;
+    }
+  }
+  
+  /***************** TXFIFO Events ****************/
+  /**
+   * The TXFIFO is used to load packets into the transmit buffer on the
+   * chip
+   */
+  async event void TXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len,
+                                     error_t error ) {
+
+    call CSN.set();
+    if ( m_state == S_CANCEL ) {
+      atomic {
+        call CSN.clr();
+        call SFLUSHTX.strobe();
+        call CSN.set();
+      }
+      releaseSpiResource();
+      m_state = S_STARTED;
+      signal Send.sendDone( m_msg, ECANCEL );
+      
+    } else if ( !m_cca ) {
+      atomic {
+        m_state = S_BEGIN_TRANSMIT;
+      }
+      attemptSend();
+      
+    } else {
+      releaseSpiResource();
+      atomic {
+        m_state = S_SAMPLE_CCA;
+      }
+      
+      signal RadioBackoff.requestInitialBackoff(m_msg);
+      call BackoffTimer.start(myInitialBackoff);
+    }
+  }
+
+  
+  async event void TXFIFO.readDone( uint8_t* tx_buf, uint8_t tx_len, 
+      error_t error ) {
+  }
+  
+  
+  /***************** Timer Events ****************/
+  /**
+   * The backoff timer is mainly used to wait for a moment before trying
+   * to send a packet again. But we also use it to timeout the wait for
+   * an acknowledgement, and timeout the wait for an SFD interrupt when
+   * we should have gotten one.
+   */
+  async event void BackoffTimer.fired() {
+    atomic {
+      switch( m_state ) {
+        
+      case S_SAMPLE_CCA : 
+        // sample CCA and wait a little longer if free, just in case we
+        // sampled during the ack turn-around window
+        if ( call CCA.get() ) {
+          m_state = S_BEGIN_TRANSMIT;
+          call BackoffTimer.start( CC2420_TIME_ACK_TURNAROUND );
+          
+        } else {
+          congestionBackoff();
+        }
+        break;
+        
+      case S_BEGIN_TRANSMIT:
+      case S_CANCEL:
+        if ( acquireSpiResource() == SUCCESS ) {
+          attemptSend();
+        }
+        break;
+        
+      case S_ACK_WAIT:
+        signalDone( SUCCESS );
+        break;
+
+      case S_SFD:
+        // We didn't receive an SFD interrupt within CC2420_ABORT_PERIOD
+        // jiffies. Assume something is wrong.
+        call SFLUSHTX.strobe();
+        call CaptureSFD.captureRisingEdge();
+        releaseSpiResource();
+        signalDone( ERETRY );
+        break;
+
+      default:
+        break;
+      }
+    }
+  }
+      
+  /***************** Functions ****************/
+  /**
+   * Set up a message to be sent. First load it into the outbound tx buffer
+   * on the chip, then attempt to send it.
+   * @param *p_msg Pointer to the message that needs to be sent
+   * @param cca TRUE if this transmit should use clear channel assessment
+   */
+  error_t send( message_t* ONE p_msg, bool cca ) {
+    atomic {
+      if (m_state == S_CANCEL) {
+        return ECANCEL;
+      }
+      
+      if ( m_state != S_STARTED ) {
+        return FAIL;
+      }
+      
+#ifdef CC2420_HW_SECURITY
+      securityChecked = 0;
+#endif
+      m_state = S_LOAD;
+      m_cca = cca;
+      m_msg = p_msg;
+      totalCcaChecks = 0;
+    }
+    
+    if ( acquireSpiResource() == SUCCESS ) {
+      loadTXFIFO();
+    }
+
+    return SUCCESS;
+  }
+  
+  /**
+   * Resend a packet that already exists in the outbound tx buffer on the
+   * chip
+   * @param cca TRUE if this transmit should use clear channel assessment
+   */
+  error_t resend( bool cca ) {
+
+    atomic {
+      if (m_state == S_CANCEL) {
+        return ECANCEL;
+      }
+      
+      if ( m_state != S_STARTED ) {
+        return FAIL;
+      }
+      
+      m_cca = cca;
+      m_state = cca ? S_SAMPLE_CCA : S_BEGIN_TRANSMIT;
+      totalCcaChecks = 0;
+    }
+    
+    if(m_cca) {
+      signal RadioBackoff.requestInitialBackoff(m_msg);
+      call BackoffTimer.start( myInitialBackoff );
+      
+    } else if ( acquireSpiResource() == SUCCESS ) {
+      attemptSend();
+    }
+    
+    return SUCCESS;
+  }
+#ifdef CC2420_HW_SECURITY
+
+  task void waitTask(){
+    call Leds.led2Toggle();
+    if(SECURITYLOCK == 1){
+      post waitTask();
+    }else{
+      securityCheck();
+    }
+  }
+
+  void securityCheck(){
+
+    cc2420_header_t* msg_header;
+    cc2420_status_t status;
+    security_header_t* secHdr;
+    uint8_t mode;
+    uint8_t key;
+    uint8_t micLength;
+
+    msg_header = call CC2420PacketBody.getHeader( m_msg );
+
+    if(!(msg_header->fcf & (1 << IEEE154_FCF_SECURITY_ENABLED))){
+      // Security is not used for this packet
+      // Make sure to set mode to 0 and the others to the default values
+      CTR_SECCTRL0 = ((0 << CC2420_SECCTRL0_SEC_MODE) |
+		      (1 << CC2420_SECCTRL0_SEC_M) |
+		      (1 << CC2420_SECCTRL0_SEC_TXKEYSEL) |
+		      (1 << CC2420_SECCTRL0_SEC_CBC_HEAD)) ;
+      
+      call CSN.clr();
+      call SECCTRL0.write(CTR_SECCTRL0);
+      call CSN.set();
+
+      return;
+    }
+
+    if(SECURITYLOCK == 1){
+      post waitTask();
+    }else {
+      //Will perform encryption lock registers
+      atomic SECURITYLOCK = 1;
+
+      secHdr = (security_header_t*) &msg_header->secHdr;
+      memcpy(&nonceValue[3], &(secHdr->frameCounter), 4);
+
+      skip = secHdr->reserved;
+      key = secHdr->keyID[0]; // For now this is the only key selection mode.
+
+      if (secHdr->secLevel == NO_SEC){
+	mode = CC2420_NO_SEC;
+	micLength = 4;
+      }else if (secHdr->secLevel == CBC_MAC_4){
+	mode = CC2420_CBC_MAC;
+	micLength = 4;
+      }else if (secHdr->secLevel == CBC_MAC_8){
+	mode = CC2420_CBC_MAC;
+	micLength = 8;
+      }else if (secHdr->secLevel == CBC_MAC_16){
+	mode = CC2420_CBC_MAC;
+	micLength = 16;
+      }else if (secHdr->secLevel == CTR){
+	mode = CC2420_CTR;
+	micLength = 4;
+      }else if (secHdr->secLevel == CCM_4){
+	mode = CC2420_CCM;
+	micLength = 4;
+      }else if (secHdr->secLevel == CCM_8){
+	mode = CC2420_CCM;
+	micLength = 8;
+      }else if (secHdr->secLevel == CCM_16){
+	mode = CC2420_CCM;
+	micLength = 16;
+      }else{
+	return;
+      }
+
+      CTR_SECCTRL0 = ((mode << CC2420_SECCTRL0_SEC_MODE) |
+		      ((micLength-2)/2 << CC2420_SECCTRL0_SEC_M) |
+		      (key << CC2420_SECCTRL0_SEC_TXKEYSEL) |
+		      (1 << CC2420_SECCTRL0_SEC_CBC_HEAD)) ;
+#ifndef TFRAMES_ENABLED
+      CTR_SECCTRL1 = (skip+11+sizeof(security_header_t)+((skip+11+sizeof(security_header_t))<<8));
+#else
+      CTR_SECCTRL1 = (skip+10+sizeof(security_header_t)+((skip+10+sizeof(security_header_t))<<8));
+#endif
+
+      call CSN.clr();
+      call SECCTRL0.write(CTR_SECCTRL0);
+      call CSN.set();
+
+      call CSN.clr();
+      call SECCTRL1.write(CTR_SECCTRL1);
+      call CSN.set();
+
+      call CSN.clr();
+      call TXNONCE.write(0, nonceValue, 16);
+      call CSN.set();
+
+      call CSN.clr();
+      status = call SNOP.strobe();
+      call CSN.set();
+
+      while(status & CC2420_STATUS_ENC_BUSY){
+	call CSN.clr();
+	status = call SNOP.strobe();
+	call CSN.set();
+      }
+      
+      // Inline security will be activated by STXON or STXONCCA strobes
+
+      atomic SECURITYLOCK = 0;
+
+    }
+  }
+#endif
+
+  /**
+   * Attempt to send the packet we have loaded into the tx buffer on 
+   * the radio chip.  The STXONCCA will send the packet immediately if
+   * the channel is clear.  If we're not concerned about whether or not
+   * the channel is clear (i.e. m_cca == FALSE), then STXON will send the
+   * packet without checking for a clear channel.
+   *
+   * If the packet didn't get sent, then congestion == TRUE.  In that case,
+   * we reset the backoff timer and try again in a moment.
+   *
+   * If the packet got sent, we should expect an SFD interrupt to take
+   * over, signifying the packet is getting sent.
+   * 
+   * If security is enabled, STXONCCA or STXON will perform inline security
+   * options before transmitting the packet.
+   */
+  void attemptSend() {
+    uint8_t status;
+    bool congestion = TRUE;
+
+    atomic {
+      if (m_state == S_CANCEL) {
+        call SFLUSHTX.strobe();
+        releaseSpiResource();
+        call CSN.set();
+        m_state = S_STARTED;
+        signal Send.sendDone( m_msg, ECANCEL );
+        return;
+      }
+#ifdef CC2420_HW_SECURITY
+      if(securityChecked != 1){
+	securityCheck();
+      }
+      securityChecked = 1;
+#endif
+      call CSN.clr();
+      status = m_cca ? call STXONCCA.strobe() : call STXON.strobe();
+      if ( !( status & CC2420_STATUS_TX_ACTIVE ) ) {
+        status = call SNOP.strobe();
+        if ( status & CC2420_STATUS_TX_ACTIVE ) {
+          congestion = FALSE;
+        }
+      }
+
+      m_state = congestion ? S_SAMPLE_CCA : S_SFD;
+      call CSN.set();
+    }
+
+    if ( congestion ) {
+      totalCcaChecks = 0;
+      releaseSpiResource();
+      congestionBackoff();
+    } else {
+      call BackoffTimer.start(CC2420_ABORT_PERIOD);
+    }
+  }
+  
+  
+  /**  
+   * Congestion Backoff
+   */
+  void congestionBackoff() {
+    atomic {
+      signal RadioBackoff.requestCongestionBackoff(m_msg);
+      call BackoffTimer.start(myCongestionBackoff);
+    }
+  }
+  
+  error_t acquireSpiResource() {
+    error_t error = call SpiResource.immediateRequest();
+    if ( error != SUCCESS ) {
+      call SpiResource.request();
+    }
+    return error;
+  }
+
+  error_t releaseSpiResource() {
+    call SpiResource.release();
+    return SUCCESS;
+  }
+
+
+  /** 
+   * Setup the packet transmission power and load the tx fifo buffer on
+   * the chip with our outbound packet.  
+   *
+   * Warning: the tx_power metadata might not be initialized and
+   * could be a value other than 0 on boot.  Verification is needed here
+   * to make sure the value won't overstep its bounds in the TXCTRL register
+   * and is transmitting at max power by default.
+   *
+   * It should be possible to manually calculate the packet's CRC here and
+   * tack it onto the end of the header + payload when loading into the TXFIFO,
+   * so the continuous modulation low power listening strategy will continually
+   * deliver valid packets.  This would increase receive reliability for
+   * mobile nodes and lossy connections.  The crcByte() function should use
+   * the same CRC polynomial as the CC2420's AUTOCRC functionality.
+   */
+  void loadTXFIFO() {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader( m_msg );
+    uint8_t tx_power = (call CC2420PacketBody.getMetadata( m_msg ))->tx_power;
+
+    if ( !tx_power ) {
+      tx_power = CC2420_DEF_RFPOWER;
+    }
+    
+    call CSN.clr();
+    
+    if ( m_tx_power != tx_power ) {
+      call TXCTRL.write( ( 2 << CC2420_TXCTRL_TXMIXBUF_CUR ) |
+                         ( 3 << CC2420_TXCTRL_PA_CURRENT ) |
+                         ( 1 << CC2420_TXCTRL_RESERVED ) |
+                         ( (tx_power & 0x1F) << CC2420_TXCTRL_PA_LEVEL ) );
+    }
+    
+    m_tx_power = tx_power;
+    
+    {
+      uint8_t tmpLen __DEPUTY_UNUSED__ = header->length - 1;
+      call TXFIFO.write(TCAST(uint8_t * COUNT(tmpLen), header), header->length - 1);
+    }
+  }
+  
+  void signalDone( error_t err ) {
+    atomic m_state = S_STARTED;
+    abortSpiRelease = FALSE;
+    call ChipSpiResource.attemptRelease();
+    signal Send.sendDone( m_msg, err );
+  }
+
+}
+
diff --git a/tos/chips/cc2420/unique/UniqueReceiveC.nc b/tos/chips/cc2420/unique/UniqueReceiveC.nc
new file mode 100644
index 00000000..303ef546
--- /dev/null
+++ b/tos/chips/cc2420/unique/UniqueReceiveC.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * This layer keeps a history of the past RECEIVE_HISTORY_SIZE received messages
+ * If the source address and dsn number of a newly received message matches
+ * our recent history, we drop the message because we've already seen it.
+ * This should sit at the bottom of the stack
+ * @author David Moss
+ */
+ 
+configuration UniqueReceiveC {
+  provides {
+    interface Receive;
+    interface Receive as DuplicateReceive;
+  }
+  
+  uses {
+    interface Receive as SubReceive;
+  }
+}
+
+implementation {
+  components UniqueReceiveP,
+      CC2420PacketC,
+      MainC;
+  
+  Receive = UniqueReceiveP.Receive;
+  DuplicateReceive = UniqueReceiveP.DuplicateReceive;
+  SubReceive = UniqueReceiveP.SubReceive;
+      
+  MainC.SoftwareInit -> UniqueReceiveP;
+  
+  UniqueReceiveP.CC2420PacketBody -> CC2420PacketC;
+  
+}
+
diff --git a/tos/chips/cc2420/unique/UniqueReceiveP.nc b/tos/chips/cc2420/unique/UniqueReceiveP.nc
new file mode 100644
index 00000000..a80a5a96
--- /dev/null
+++ b/tos/chips/cc2420/unique/UniqueReceiveP.nc
@@ -0,0 +1,196 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/** 
+ * This layer keeps a history of the past RECEIVE_HISTORY_SIZE received messages
+ * If the source address and dsn number of a newly received message matches
+ * our recent history, we drop the message because we've already seen it.
+ * @author David Moss
+ */
+ 
+#include "CC2420.h"
+
+module UniqueReceiveP @safe() {
+  provides {
+    interface Receive;
+    interface Receive as DuplicateReceive;
+    interface Init;
+  }
+  
+  uses {
+    interface Receive as SubReceive;
+    interface CC2420PacketBody;
+  }
+}
+
+implementation {
+  
+  struct {
+    uint16_t source;
+    uint8_t dsn;
+  } receivedMessages[RECEIVE_HISTORY_SIZE];
+  
+  uint8_t writeIndex = 0;
+  
+  /** History element containing info on a source previously received from */
+  uint8_t recycleSourceElement;
+  
+  enum {
+    INVALID_ELEMENT = 0xFF,
+  };
+  
+  /***************** Init Commands *****************/
+  command error_t Init.init() {
+    int i;
+    for(i = 0; i < RECEIVE_HISTORY_SIZE; i++) {
+      receivedMessages[i].source = (am_addr_t) 0xFFFF;
+      receivedMessages[i].dsn = 0;
+    }
+    return SUCCESS;
+  }
+  
+  /***************** Prototypes Commands ***************/
+  bool hasSeen(uint16_t msgSource, uint8_t msgDsn);
+  void insert(uint16_t msgSource, uint8_t msgDsn);
+  uint16_t getSourceKey(message_t *msg);
+  
+  /***************** SubReceive Events *****************/
+  event message_t *SubReceive.receive(message_t* msg, void* payload, 
+      uint8_t len) {
+
+    uint16_t msgSource = getSourceKey(msg);
+    uint8_t msgDsn = (call CC2420PacketBody.getHeader(msg))->dsn;
+
+    if(hasSeen(msgSource, msgDsn)) {
+      return signal DuplicateReceive.receive(msg, payload, len);
+    } else {
+      insert(msgSource, msgDsn);
+      return signal Receive.receive(msg, payload, len);
+    }
+  }
+  
+  /****************** Functions ****************/  
+  /**
+   * This function does two things:
+   *  1. It loops through our entire receive history and detects if we've 
+   *     seen this DSN before from the given source (duplicate packet)
+   *  2. It detects if we've seen messages from this source before, so we know
+   *     where to update our history if it turns out this is a new message.
+   *
+   * The global recycleSourceElement variable stores the location of the next insert
+   * if we've received a packet from that source before.  Otherwise, it's up 
+   * to the insert() function to decide who to kick out of our history.
+   */
+  bool hasSeen(uint16_t msgSource, uint8_t msgDsn) {
+    int i;
+    recycleSourceElement = INVALID_ELEMENT;
+
+    atomic {
+      for(i = 0; i < RECEIVE_HISTORY_SIZE; i++) {
+        if(receivedMessages[i].source == msgSource) {
+          if(receivedMessages[i].dsn == msgDsn) {
+            // Only exit this loop if we found a duplicate packet
+            return TRUE;
+          }
+          
+          recycleSourceElement = i;
+        }
+      }
+    }
+      
+    return FALSE;
+  }
+  
+  /**
+   * Insert the message into the history.  If we received a message from this
+   * source before, insert it into the same location as last time and verify
+   * that the "writeIndex" is not pointing to that location. Otherwise,
+   * insert it into the "writeIndex" location.
+   */
+  void insert(uint16_t msgSource, uint8_t msgDsn) {
+    uint8_t element = recycleSourceElement;
+    bool increment = FALSE;
+   
+    atomic {
+      if(element == INVALID_ELEMENT || writeIndex == element) {
+        // Use the writeIndex element to insert this new message into
+        element = writeIndex;
+        increment = TRUE;
+      }
+
+      receivedMessages[element].source = msgSource;
+      receivedMessages[element].dsn = msgDsn;
+      if(increment) {
+        writeIndex++;
+        writeIndex %= RECEIVE_HISTORY_SIZE;
+      }
+    }
+  }
+
+  /**
+   * Derive a key to to store the source address with.
+   *
+   * For long (EUI64) addresses, use the sum of the word in the
+   * address as a key in the table to avoid manipulating the full
+   * address.
+   */
+  uint16_t getSourceKey(message_t *msg) {
+    cc2420_header_t *hdr = call CC2420PacketBody.getHeader(msg);
+    int s_mode = (hdr->fcf >> IEEE154_FCF_SRC_ADDR_MODE) & 0x3;
+    int d_mode = (hdr->fcf >> IEEE154_FCF_DEST_ADDR_MODE) & 0x3;
+    int s_offset = 2, s_len = 2;
+    uint16_t key = 0;
+    uint8_t *current = (uint8_t *)&hdr->dest;
+    int i;
+
+    if (s_mode == IEEE154_ADDR_EXT) {
+      s_len = 8;
+    }
+    if (d_mode == IEEE154_ADDR_EXT) {
+      s_offset = 8;
+    }
+
+    current += s_offset;
+    
+    for (i = 0; i < s_len; i++) {
+        key += current[i];
+    }
+    return key;
+  }
+
+
+  
+  /***************** Defaults ****************/
+  default event message_t *DuplicateReceive.receive(message_t *msg, void *payload, uint8_t len) {
+    return msg;
+  }
+}
+
diff --git a/tos/chips/cc2420/unique/UniqueSendC.nc b/tos/chips/cc2420/unique/UniqueSendC.nc
new file mode 100644
index 00000000..615a4599
--- /dev/null
+++ b/tos/chips/cc2420/unique/UniqueSendC.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Generate a unique dsn byte for this outgoing packet
+ * This should sit at the top of the stack
+ * @author David Moss
+ */
+ 
+configuration UniqueSendC {
+  provides {
+    interface Send;
+  }
+  
+  uses {
+    interface Send as SubSend;
+  }
+}
+
+implementation {
+  components UniqueSendP,
+      new StateC(),
+      RandomC,
+      CC2420PacketC,
+      MainC;
+      
+  Send = UniqueSendP.Send;
+  SubSend = UniqueSendP.SubSend;
+  
+  MainC.SoftwareInit -> UniqueSendP;
+  
+  UniqueSendP.State -> StateC;
+  UniqueSendP.Random -> RandomC;
+  UniqueSendP.CC2420PacketBody -> CC2420PacketC;
+  
+}
+
diff --git a/tos/chips/cc2420/unique/UniqueSendP.nc b/tos/chips/cc2420/unique/UniqueSendP.nc
new file mode 100644
index 00000000..64cbfda0
--- /dev/null
+++ b/tos/chips/cc2420/unique/UniqueSendP.nc
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * This layer is responsible for supplying a unique data sequence number (dsn)
+ * to each outgoing message.
+ * @author David Moss
+ */
+ 
+module UniqueSendP @safe() {
+  provides {
+    interface Send;
+    interface Init;
+  }
+  
+  uses {
+    interface Send as SubSend;
+    interface State;
+    interface Random;
+    interface CC2420PacketBody;
+  }
+}
+
+implementation {
+
+  uint8_t localSendId;
+  
+  enum {
+    S_IDLE,
+    S_SENDING,
+  };
+  
+  /***************** Init Commands ****************/
+  command error_t Init.init() {
+    localSendId = call Random.rand16();
+    return SUCCESS;
+  }
+
+  /***************** Send Commands ****************/
+  /**
+   * Each call to this send command gives the message a single
+   * DSN that does not change for every copy of the message
+   * sent out.  For messages that are not acknowledged, such as
+   * a broadcast address message, the receiving end does not
+   * signal receive() more than once for that message.
+   */
+  command error_t Send.send(message_t *msg, uint8_t len) {
+    error_t error;
+    if(call State.requestState(S_SENDING) == SUCCESS) {
+      (call CC2420PacketBody.getHeader(msg))->dsn = localSendId++;
+      
+      if((error = call SubSend.send(msg, len)) != SUCCESS) {
+        call State.toIdle();
+      }
+      
+      return error;
+    }
+    
+    return EBUSY;
+  }
+
+  command error_t Send.cancel(message_t *msg) {
+    return call SubSend.cancel(msg);
+  }
+  
+  
+  command uint8_t Send.maxPayloadLength() {
+    return call SubSend.maxPayloadLength();
+  }
+
+  command void *Send.getPayload(message_t* msg, uint8_t len) {
+    return call SubSend.getPayload(msg, len);
+  }
+  
+  /***************** SubSend Events ****************/
+  event void SubSend.sendDone(message_t *msg, error_t error) {
+    call State.toIdle();
+    signal Send.sendDone(msg, error);
+  }
+  
+}
+
diff --git a/tos/chips/cc2420_tkn154/CC2420AsyncSplitControl.nc b/tos/chips/cc2420_tkn154/CC2420AsyncSplitControl.nc
new file mode 100644
index 00000000..714c4635
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CC2420AsyncSplitControl.nc
@@ -0,0 +1,134 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $ $Date: 2010-06-29 22:07:45 $ 
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This interface is a mixture of a SplitControl/AsyncStdControl interface.
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ */
+
+interface CC2420AsyncSplitControl
+{
+  /**
+   * Start this component and all of its subcomponents.  
+   *
+   * @return SUCCESS if the component was started successfully.<br>
+   *         FAIL Otherwise
+   */
+  async command error_t start();
+
+  /**
+   * Stop this component and all of its subcomponents - iff this command
+   * succeeds then <tt>stopDone</tt> will signal the result of the stop
+   * operation.
+   *
+   * @return SUCCESS Stop operation was started, <tt>stopDone</tt> will be signalled
+   *         FAIL Otherwise (<tt>stopDone</tt> will not be signalled)
+   */
+  async command error_t stop();
+
+  /**
+   * Notify caller that the component has been stopped. This event
+   * completes the <tt>stop()</tt> operation.
+   *
+  * @param <b>error</b> -- SUCCESS if the component was successfully
+  *                        turned off, FAIL otherwise
+   */
+  async event void stopDone(error_t error);
+}
+
diff --git a/tos/chips/cc2420_tkn154/CC2420Config.nc b/tos/chips/cc2420_tkn154/CC2420Config.nc
new file mode 100644
index 00000000..8df5c423
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CC2420Config.nc
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An HAL abstraction of the ChipCon CC2420 radio. This abstraction
+ * deals specifically with radio configurations. All get() and set()
+ * commands are single-phase. After setting some values, a call to
+ * sync() is required for the changes to propagate to the cc2420
+ * hardware chip. This interface allows setting multiple parameters
+ * before calling sync().
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de> (added some commands)
+ * @version $Revision: 1.1 $ $Date: 2008-06-16 18:02:40 $
+ */
+
+interface CC2420Config {
+
+  /**
+   * Sync configuration changes with the radio hardware. This only
+   * applies to set commands below.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t sync();
+
+  /**
+   * Whether changes have been made that should be sync-ed.
+   *
+   * @return TRUE if changes have been made, FALSE otherwise.
+   */
+  async command bool needsSync();
+
+  /**
+   * Change the channel of the radio, between 11 and 26
+   */
+  command uint8_t getChannel();
+  command void setChannel( uint8_t channel );
+
+  /**
+   * Change the short address of the radio.
+   */
+  async command uint16_t getShortAddr();
+  command void setShortAddr( uint16_t address );
+
+  /**
+   * Change the PAN address of the radio.
+   */
+  async command uint16_t getPanAddr();
+  command void setPanAddr( uint16_t address );
+
+  /**
+   * Change the PAN address of the radio.
+   */
+  async command bool getPanCoordinator();
+  command void setPanCoordinator( bool pcoord );  
+
+  /**
+   * Change to promiscuous mode.
+   */
+  command void setPromiscuousMode(bool on);
+  async command bool isPromiscuousModeEnabled();
+
+  /**
+   * Change the CCA mode.
+   */
+  async command uint8_t getCCAMode();
+  command void setCCAMode(uint8_t mode);
+
+  /**
+   * Change the transmission power.
+   */
+  async command uint8_t getTxPower();
+  command void setTxPower(uint8_t txPower);
+  
+}
diff --git a/tos/chips/cc2420_tkn154/CC2420ControlP.nc b/tos/chips/cc2420_tkn154/CC2420ControlP.nc
new file mode 100644
index 00000000..95a2c9e7
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CC2420ControlP.nc
@@ -0,0 +1,512 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Urs Hunkeler (ReadRssi implementation)
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * @version $Revision: 1.5 $ $Date: 2009-05-05 16:56:49 $
+ */
+
+#include "Timer.h"
+#include "AM.h"
+#include "TKN154_PIB.h"
+
+module CC2420ControlP {
+
+  provides interface Init;
+  provides interface Resource;
+  provides interface CC2420Config;
+  provides interface CC2420Power;
+
+  uses interface Alarm<T62500hz,uint32_t> as StartupAlarm;
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as RSTN;
+  uses interface GeneralIO as VREN;
+  uses interface GpioInterrupt as InterruptCCA;
+  uses interface GeneralIO as FIFO;
+
+  uses interface CC2420Ram as IEEEADR;
+  uses interface CC2420Register as FSCTRL;
+  uses interface CC2420Register as IOCFG0;
+  uses interface CC2420Register as IOCFG1;
+  uses interface CC2420Register as MDMCTRL0;
+  uses interface CC2420Register as MDMCTRL1;
+  uses interface CC2420Register as RXCTRL1;
+  uses interface CC2420Register as RSSI;
+  uses interface CC2420Register as RXFIFO_REGISTER;
+  uses interface CC2420Strobe as SNOP;
+  uses interface CC2420Strobe as SRXON;
+  uses interface CC2420Strobe as SRFOFF;
+  uses interface CC2420Strobe as SXOSCOFF;
+  uses interface CC2420Strobe as SXOSCON;
+  uses interface CC2420Strobe as SACKPEND;
+  uses interface CC2420Strobe as SFLUSHRX;
+  uses interface CC2420Register as TXCTRL;
+  uses interface AMPacket;
+  uses interface Resource as SpiResource;
+  uses interface FrameUtility;
+}
+
+implementation {
+
+  typedef enum {
+    S_VREG_STOPPED,
+    S_VREG_STARTING,
+    S_VREG_STARTED,
+    S_XOSC_STARTING,
+    S_XOSC_STARTED,
+  } cc2420_control_state_t;
+
+  uint8_t m_channel;
+  uint16_t m_pan;
+  uint16_t m_short_addr;
+  bool autoAckEnabled;
+  bool hwAutoAckDefault;
+  bool addressRecognition;
+  bool acceptReservedFrames;
+  bool m_isPanCoord;
+  uint8_t m_CCAMode;
+  uint8_t m_txPower;
+
+  bool m_needsSync;
+
+  norace cc2420_control_state_t m_state = S_VREG_STOPPED;
+  
+  /***************** Prototypes ****************/
+
+  void writeFsctrl();
+  void writeMdmctrl0();
+  void writeId();
+  void writeTxPower();
+
+  /***************** Init Commands ****************/
+  command error_t Init.init() {
+    call CSN.makeOutput();
+    call RSTN.makeOutput();
+    call VREN.makeOutput();
+    autoAckEnabled = TRUE;
+    hwAutoAckDefault = TRUE;
+    addressRecognition = TRUE;
+    acceptReservedFrames = FALSE;
+    m_needsSync = FALSE;
+    return SUCCESS;
+  }
+
+  /***************** Resource Commands ****************/
+  /* This module never actively requests the SPI resource,
+   * instead the caller MUST request the SPI through this module
+   * before it calls any of the provided commands and it must
+   * release it afterwards (the caller can call multiple  
+   * commands in this module before it releases the SPI, though).
+   */ 
+  async command error_t Resource.immediateRequest() {
+    error_t error = call SpiResource.immediateRequest();
+    if ( error == SUCCESS ) {
+/*      call CSN.clr();*/
+    }
+    return error;
+  }
+
+  async command error_t Resource.request() {
+    return call SpiResource.request();
+  }
+
+  async command uint8_t Resource.isOwner() {
+    return call SpiResource.isOwner();
+  }
+
+  async command error_t Resource.release() {
+    atomic {
+/*      call CSN.set();*/
+      return call SpiResource.release();
+    }
+  }
+
+  event void SpiResource.granted() {
+/*    call CSN.clr();*/
+    signal Resource.granted();
+  }
+
+  /***************** CC2420Power Commands ****************/
+  async command error_t CC2420Power.startVReg() {
+    atomic {
+      if ( m_state != S_VREG_STOPPED ) {
+        return FAIL;
+      }
+      m_state = S_VREG_STARTING;
+    }
+    call VREN.set();
+    call StartupAlarm.start( CC2420_TIME_VREN * 2 ); // JH: changed from 32khz jiffies
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.stopVReg() {
+    m_state = S_VREG_STOPPED;
+    call RSTN.clr();
+    call VREN.clr();
+    call RSTN.set();
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.startOscillator() {
+    atomic {
+      if ( m_state != S_VREG_STARTED ) {
+        return FAIL;
+      }
+        
+      m_state = S_XOSC_STARTING;
+      call CSN.set();
+      call CSN.clr();
+      call IOCFG1.write( CC2420_SFDMUX_XOSC16M_STABLE << 
+                         CC2420_IOCFG1_CCAMUX );
+                         
+      call InterruptCCA.enableRisingEdge();
+      call SXOSCON.strobe();
+      
+      call IOCFG0.write( ( 1 << CC2420_IOCFG0_FIFOP_POLARITY ) |
+          ( 127 << CC2420_IOCFG0_FIFOP_THR ) );
+                         
+      writeFsctrl();
+      writeMdmctrl0();
+  
+      call RXCTRL1.write( ( 1 << CC2420_RXCTRL1_RXBPF_LOCUR ) |
+          ( 1 << CC2420_RXCTRL1_LOW_LOWGAIN ) |
+          ( 1 << CC2420_RXCTRL1_HIGH_HGM ) |
+          ( 1 << CC2420_RXCTRL1_LNA_CAP_ARRAY ) |
+          ( 1 << CC2420_RXCTRL1_RXMIX_TAIL ) |
+          ( 1 << CC2420_RXCTRL1_RXMIX_VCM ) |
+          ( 2 << CC2420_RXCTRL1_RXMIX_CURRENT ) );
+      call CSN.set();
+    }
+    return SUCCESS;
+  }
+
+
+  async command error_t CC2420Power.stopOscillator() {
+    atomic {
+      if ( m_state != S_XOSC_STARTED ) {
+        return FAIL;
+      }
+      m_state = S_VREG_STARTED;
+      call CSN.set();
+      call CSN.clr();
+      call SXOSCOFF.strobe();
+      call CSN.set();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.rxOn() {
+    atomic {
+      if ( !call SpiResource.isOwner() )
+        return FAIL;
+      call CSN.set();
+      call CSN.clr();
+      call SRXON.strobe();
+      call SACKPEND.strobe();  // JH: ACKs need the pending bit set
+      call CSN.set();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.rfOff() {
+    atomic {
+      if ( !call SpiResource.isOwner() )
+        return FAIL;
+      call CSN.set();
+      call CSN.clr();
+      call SRFOFF.strobe();
+      call CSN.set();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.flushRxFifo()
+  {
+    uint16_t dummy;
+    atomic {
+      if ( !call SpiResource.isOwner() )
+        return FAIL;
+      if ( call FIFO.get() ){ // check if there is something in the RXFIFO
+        // SFLUSHRX: "Flush the RX FIFO buffer and reset the demodulator. 
+        // Always read at least one byte from the RXFIFO before 
+        // issuing the SFLUSHRX command strobe" (CC2420 Datasheet)
+        call CSN.clr();
+        call RXFIFO_REGISTER.read(&dummy); // reading the byte
+        call CSN.set();
+        call CSN.clr();
+        // "SFLUSHRX command strobe should be issued twice to ensure 
+        // that the SFD pin goes back to its idle state." (CC2420 Datasheet)
+        call SFLUSHRX.strobe();
+        call SFLUSHRX.strobe();
+        call CSN.set();
+      }
+    }
+    return SUCCESS;
+  }
+  
+  /***************** CC2420Config Commands ****************/
+  command uint8_t CC2420Config.getChannel() {
+    atomic return m_channel;
+  }
+
+  command void CC2420Config.setChannel( uint8_t channel ) {
+    atomic {
+      m_needsSync = TRUE;
+      m_channel = channel;
+    }
+  }
+
+  async command uint16_t CC2420Config.getShortAddr() {
+    atomic return m_short_addr;
+  }
+
+  command void CC2420Config.setShortAddr( uint16_t addr ) {
+    atomic {
+      m_needsSync = TRUE;
+      m_short_addr = addr;
+    }
+  }
+
+  async command uint16_t CC2420Config.getPanAddr() {
+    atomic return m_pan;
+  }
+
+  command void CC2420Config.setPanAddr( uint16_t pan ) {
+    atomic {
+      m_needsSync = TRUE;
+      m_pan = pan;
+    }
+  }
+
+  async command bool CC2420Config.getPanCoordinator() {
+    atomic return m_isPanCoord;
+  }
+
+  command void CC2420Config.setPanCoordinator( bool pCoord ) {
+    atomic {
+      m_needsSync = TRUE;
+      m_isPanCoord = pCoord;
+    }
+  }
+
+  command void CC2420Config.setPromiscuousMode(bool on)
+  {
+    atomic {
+      m_needsSync = TRUE;
+      if (on){
+        addressRecognition = FALSE;
+        acceptReservedFrames = TRUE;
+        autoAckEnabled = FALSE;
+      } else {
+        addressRecognition = TRUE;
+        acceptReservedFrames = FALSE;
+        autoAckEnabled = TRUE;
+      }
+    }
+  }
+
+  async command bool CC2420Config.isPromiscuousModeEnabled()
+  {
+    return acceptReservedFrames;
+  }
+
+  async command uint8_t CC2420Config.getCCAMode()
+  {
+    atomic return m_CCAMode;
+  }
+
+  command void CC2420Config.setCCAMode(uint8_t mode)
+  {
+    atomic {
+      m_needsSync = TRUE;
+      m_CCAMode = mode;
+    }
+  }
+
+  async command uint8_t CC2420Config.getTxPower()
+  {
+    atomic return m_txPower;
+  }
+
+  command void CC2420Config.setTxPower(uint8_t txPower)
+  {
+    atomic {
+      m_needsSync = TRUE;
+      m_txPower = txPower;
+    }
+  }
+
+  async command bool CC2420Config.needsSync(){
+    atomic return m_needsSync;
+  }
+
+  /**
+   * Sync must be called to commit software parameters configured on
+   * the microcontroller (through the CC2420Config interface) to the
+   * CC2420 radio chip.
+   */
+  async command error_t CC2420Config.sync() {
+    atomic {
+      if ( !call SpiResource.isOwner() )
+        return FAIL;
+      if (m_needsSync){
+        call CSN.set();
+        call CSN.clr();
+        call SRFOFF.strobe();
+        call CSN.set();
+        call CSN.clr();
+        writeFsctrl();
+        writeMdmctrl0();
+        writeTxPower();
+        call CSN.set();
+        call CSN.clr();
+        writeId();
+        call CSN.set();
+        m_needsSync = FALSE;
+      }
+    }
+    return SUCCESS;
+  }
+
+  /***************** ReadRssi Commands ****************/
+  
+  async command error_t CC2420Power.rssi(int8_t *rssi) {
+    uint16_t data;
+    cc2420_status_t status;
+    atomic {
+      if ( !call SpiResource.isOwner() )
+        return FAIL;
+      call CSN.set();
+      call CSN.clr();
+      status = call RSSI.read(&data);
+      call CSN.set();
+      if ((status & 0x02)){
+        *rssi = (data & 0x00FF);
+        return SUCCESS;
+      } else
+        return FAIL;
+    }
+  }
+  
+  /***************** StartupAlarm Events ****************/
+  async event void StartupAlarm.fired() {
+    if ( m_state == S_VREG_STARTING ) {
+      m_state = S_VREG_STARTED;
+      call RSTN.clr();
+      call RSTN.set();
+      signal CC2420Power.startVRegDone();
+    }
+  }
+
+  /***************** InterruptCCA Events ****************/
+  async event void InterruptCCA.fired() {
+    m_state = S_XOSC_STARTED;
+    call InterruptCCA.disable();
+    call CSN.set();
+    call CSN.clr();
+    call IOCFG1.write( 0 );
+    writeId();
+    call CSN.set();
+    signal CC2420Power.startOscillatorDone();
+  }
+  
+  /***************** Functions ****************/
+  /**
+   * Write teh FSCTRL register
+   */
+  void writeFsctrl() {
+    uint8_t channel;
+    
+    atomic {
+      channel = m_channel;
+    }
+    
+    call FSCTRL.write( ( 1 << CC2420_FSCTRL_LOCK_THR ) |
+          ( ( (channel - 11)*5+357 ) << CC2420_FSCTRL_FREQ ) );
+  }
+
+  /**
+   * Write the MDMCTRL0 register
+   */
+  void writeMdmctrl0() {
+    atomic {
+      uint8_t _acceptReservedFrames = (acceptReservedFrames ? 1: 0);
+      uint8_t _panCoord = (m_isPanCoord ? 1: 0);
+      uint8_t _addressRecognition = (addressRecognition ? 1: 0);
+      uint8_t _autoAck = ((autoAckEnabled && hwAutoAckDefault) ? 1 : 0);
+      call MDMCTRL0.write( ( _acceptReservedFrames << CC2420_MDMCTRL0_RESERVED_FRAME_MODE ) |
+          ( _panCoord << CC2420_MDMCTRL0_PAN_COORDINATOR ) | 
+          ( _addressRecognition << CC2420_MDMCTRL0_ADR_DECODE ) |
+          ( 2 << CC2420_MDMCTRL0_CCA_HYST ) |
+          ( m_CCAMode << CC2420_MDMCTRL0_CCA_MOD ) |
+          ( 1 << CC2420_MDMCTRL0_AUTOCRC ) |
+          ( _autoAck << CC2420_MDMCTRL0_AUTOACK ) |
+          ( 2 << CC2420_MDMCTRL0_PREAMBLE_LENGTH ) );
+    }
+    // Jon Green:
+    // MDMCTRL1.CORR_THR is defaulted to 20 instead of 0 like the datasheet says
+    // If we add in changes to MDMCTRL1, be sure to include this fix.
+  }
+  
+  /**
+   * Write the IEEEADR register
+   */
+  void writeId() {
+    uint16_t bcnAccept = 0;
+    nxle_uint16_t id[ 6 ];
+
+    atomic {
+      call FrameUtility.copyLocalExtendedAddressLE((uint8_t*) &id);
+      id[ 4 ] = m_pan;
+      id[ 5 ] = m_short_addr;
+    }
+    if (m_pan == 0xFFFF)
+      bcnAccept = 1;
+    
+    
+    call IOCFG0.write( (bcnAccept << CC2420_IOCFG0_BCN_ACCEPT) |
+        ( 1 << CC2420_IOCFG0_FIFOP_POLARITY ) |
+          ( 127 << CC2420_IOCFG0_FIFOP_THR ) );
+    // ext.adr, PANID and short adr are located at consecutive addresses in RAM
+    call IEEEADR.write(0, (uint8_t*)&id, sizeof(id));
+  }
+
+  void writeTxPower(){
+    call TXCTRL.write( 
+        ( 2 << CC2420_TXCTRL_TXMIXBUF_CUR ) |
+        ( 3 << CC2420_TXCTRL_PA_CURRENT ) |
+        ( 1 << CC2420_TXCTRL_RESERVED ) |
+      ( (m_txPower & 0x1F) << CC2420_TXCTRL_PA_LEVEL ) );
+  }
+}
diff --git a/tos/chips/cc2420_tkn154/CC2420ControlTransmitC.nc b/tos/chips/cc2420_tkn154/CC2420ControlTransmitC.nc
new file mode 100644
index 00000000..746fbaab
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CC2420ControlTransmitC.nc
@@ -0,0 +1,142 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2009-03-04 18:31:04 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * This configuration combines CC2420ControlC and CC2420TransmitC
+ * and uses only one instance of CC2420SpiC.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Jan-Hinrich Hauer
+ * @version $Revision: 1.4 $ $Date: 2009-03-04 18:31:04 $
+ */
+
+#include "CC2420.h"
+
+configuration CC2420ControlTransmitC {
+
+  provides {
+    // CC2420ControlC
+    interface Resource;
+    interface CC2420Config;
+    interface CC2420Power;
+
+    // CC2420TransmitC
+    interface AsyncStdControl as TxControl;
+    interface CC2420Tx;
+  } uses {
+    // CC2420ControlC
+    interface Alarm<T62500hz,uint32_t> as StartupAlarm;
+    interface FrameUtility;
+
+    // CC2420TransmitC
+    interface Alarm<T62500hz,uint32_t> as AckAlarm;
+  }
+}
+
+implementation {
+  
+  // CC2420ControlC
+  components CC2420ControlP;
+  Resource = CC2420ControlP;
+  CC2420Config = CC2420ControlP;
+  CC2420Power = CC2420ControlP;
+  FrameUtility = CC2420ControlP;
+
+  components MainC;
+  MainC.SoftwareInit -> CC2420ControlP;
+  CC2420ControlP.StartupAlarm = StartupAlarm;
+
+  components HplCC2420PinsC as Pins;
+  CC2420ControlP.CSN -> Pins.CSN;
+  CC2420ControlP.RSTN -> Pins.RSTN;
+  CC2420ControlP.VREN -> Pins.VREN;
+  CC2420ControlP.FIFO -> Pins.FIFO;
+
+  components HplCC2420InterruptsC as Interrupts;
+  CC2420ControlP.InterruptCCA -> Interrupts.InterruptCCA;
+
+  components new CC2420SpiC() as Spi;
+  CC2420ControlP.SpiResource -> Spi;
+  CC2420ControlP.SRXON -> Spi.SRXON;
+  CC2420ControlP.SACKPEND -> Spi.SACKPEND;
+  CC2420ControlP.SRFOFF -> Spi.SRFOFF;
+  CC2420ControlP.SXOSCON -> Spi.SXOSCON;
+  CC2420ControlP.SXOSCOFF -> Spi.SXOSCOFF;
+  CC2420ControlP.FSCTRL -> Spi.FSCTRL;
+  CC2420ControlP.IOCFG0 -> Spi.IOCFG0;
+  CC2420ControlP.IOCFG1 -> Spi.IOCFG1;
+  CC2420ControlP.MDMCTRL0 -> Spi.MDMCTRL0;
+  CC2420ControlP.MDMCTRL1 -> Spi.MDMCTRL1;
+/*  CC2420ControlP.PANID -> Spi.PANID;*/
+  CC2420ControlP.TXCTRL      -> Spi.TXCTRL;
+  CC2420ControlP.IEEEADR -> Spi.IEEEADR;
+  CC2420ControlP.RXCTRL1 -> Spi.RXCTRL1;
+  CC2420ControlP.SFLUSHRX-> Spi.SFLUSHRX;
+  CC2420ControlP.RSSI  -> Spi.RSSI;
+  CC2420ControlP.RXFIFO_REGISTER -> Spi.RXFIFO_REGISTER;
+  CC2420ControlP.SNOP -> Spi.SNOP;
+
+  // CC2420TransmitC
+  components CC2420TransmitP;
+  TxControl = CC2420TransmitP;
+  CC2420Tx = CC2420TransmitP;
+  AckAlarm = CC2420TransmitP;
+
+  MainC.SoftwareInit -> CC2420TransmitP;
+  CC2420TransmitP.CCA -> Pins.CCA;
+  CC2420TransmitP.CSN -> Pins.CSN;
+  CC2420TransmitP.SFD -> Pins.SFD;
+  CC2420TransmitP.CaptureSFD -> Interrupts.CaptureSFD;
+  CC2420TransmitP.FIFOP -> Pins.FIFOP;
+  CC2420TransmitP.FIFO -> Pins.FIFO;
+
+  CC2420TransmitP.ChipSpiResource -> Spi;
+  CC2420TransmitP.SNOP        -> Spi.SNOP;
+  CC2420TransmitP.STXON       -> Spi.STXON;
+  CC2420TransmitP.STXONCCA    -> Spi.STXONCCA;
+  CC2420TransmitP.SFLUSHTX    -> Spi.SFLUSHTX;
+  CC2420TransmitP.TXCTRL      -> Spi.TXCTRL;
+  CC2420TransmitP.TXFIFO      -> Spi.TXFIFO;
+  CC2420TransmitP.TXFIFO_RAM  -> Spi.TXFIFO_RAM;
+  CC2420TransmitP.MDMCTRL1    -> Spi.MDMCTRL1;
+  CC2420TransmitP.SRXON -> Spi.SRXON;
+  CC2420TransmitP.SRFOFF -> Spi.SRFOFF;
+  CC2420TransmitP.SFLUSHRX-> Spi.SFLUSHRX;
+  CC2420TransmitP.SACKPEND -> Spi.SACKPEND;
+  
+  components CC2420ReceiveC;
+  CC2420TransmitP.CC2420Receive -> CC2420ReceiveC;
+}
+
diff --git a/tos/chips/cc2420_tkn154/CC2420Power.nc b/tos/chips/cc2420_tkn154/CC2420Power.nc
new file mode 100644
index 00000000..2ccaa9fc
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CC2420Power.nc
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An HAL abstraction of the ChipCon CC2420 radio. This abstraction
+ * deals specifically with radio power operations (e.g. voltage
+ * regulator, oscillator, etc). However, it does not include
+ * transmission power, see the CC2420Config interface.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * @version $Revision: 1.3 $ $Date: 2009-03-04 18:31:04 $
+ */
+
+interface CC2420Power {
+
+  /**
+   * Start the voltage regulator on the CC2420. On SUCCESS,
+   * <code>startVReg()</code> will be signalled when the voltage
+   * regulator is fully on.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t startVReg();
+
+  /**
+   * Signals that the voltage regulator has been started.
+   */
+  async event void startVRegDone();
+  
+  /**
+   * Stop the voltage regulator immediately.
+   *
+   * @return SUCCESS always
+   */
+  async command error_t stopVReg();
+
+  /**
+   * Start the oscillator. On SUCCESS, <code>startOscillator</code>
+   * will be signalled when the oscillator has been started.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t startOscillator();
+
+  /**
+   * Signals that the oscillator has been started.
+   */
+  async event void startOscillatorDone();
+
+  /**
+   * Stop the oscillator.
+   *
+   * @return SUCCESS if the oscillator was stopped, FAIL otherwise.
+   */
+  async command error_t stopOscillator();
+
+  /**
+   * Enable RX.
+   *
+   * @return SUCCESS if receive mode has been enabled, FAIL otherwise.
+   */
+  async command error_t rxOn();
+
+  /**
+   * Disable RX.
+   *
+   * @return SUCCESS if receive mode has been disabled, FAIL otherwise.
+   */
+  async command error_t rfOff();
+
+  /**
+   * Read RSSI from the radio. 
+   * @return SUCCESS if RSSI was read successfully, FAIL otherwise.
+   */
+  async command error_t rssi(int8_t *rssi);
+ 
+  /**
+   * Flush the RXFIFO if it is not empty. 
+   * Radio SHOULD be disabled (off) when calling this command.
+   *
+   * @return SUCCESS if fifo was flushed (or it was empty), FAIL otherwise.
+   */
+  async command error_t flushRxFifo(); 
+}
diff --git a/tos/chips/cc2420_tkn154/CC2420ReceiveC.nc b/tos/chips/cc2420_tkn154/CC2420ReceiveC.nc
new file mode 100644
index 00000000..f0b3a2eb
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CC2420ReceiveC.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the receive path for the ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * @version $Revision: 1.2 $ $Date: 2009-03-04 18:31:04 $
+ */
+
+configuration CC2420ReceiveC {
+
+  provides interface CC2420AsyncSplitControl;
+  provides interface CC2420Receive; // to CC2420TransmitP for ACK
+  provides interface CC2420Rx;      // to the driver
+  uses interface FrameUtility;
+  uses interface CC2420Config;
+}
+
+implementation {
+  components MainC;
+  components CC2420ReceiveP;
+  components new CC2420SpiC() as Spi;
+  
+  components HplCC2420PinsC as Pins;
+  components HplCC2420InterruptsC as InterruptsC;
+
+  CC2420AsyncSplitControl = CC2420ReceiveP;
+  CC2420Receive = CC2420ReceiveP;
+  CC2420Rx = CC2420ReceiveP;
+  FrameUtility = CC2420ReceiveP;
+  CC2420Config = CC2420ReceiveP;
+
+  MainC.SoftwareInit -> CC2420ReceiveP;
+  
+  CC2420ReceiveP.CSN -> Pins.CSN;
+  CC2420ReceiveP.FIFO -> Pins.FIFO;
+  CC2420ReceiveP.FIFOP -> Pins.FIFOP;
+  CC2420ReceiveP.InterruptFIFOP -> InterruptsC.InterruptFIFOP;
+  CC2420ReceiveP.SpiResource -> Spi;
+  CC2420ReceiveP.RXFIFO -> Spi.RXFIFO;
+  CC2420ReceiveP.SFLUSHRX -> Spi.SFLUSHRX;
+  CC2420ReceiveP.SACK -> Spi.SACK;
+  CC2420ReceiveP.SACKPEND -> Spi.SACKPEND;
+  CC2420ReceiveP.SRXON -> Spi.SRXON;
+  CC2420ReceiveP.MDMCTRL1 -> Spi.MDMCTRL1;
+
+}
diff --git a/tos/chips/cc2420_tkn154/CC2420ReceiveP.nc b/tos/chips/cc2420_tkn154/CC2420ReceiveP.nc
new file mode 100644
index 00000000..915bc42f
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CC2420ReceiveP.nc
@@ -0,0 +1,522 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Jung Il Choi
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * @version $Revision: 1.4 $ $Date: 2009-05-05 16:56:49 $
+ */
+module CC2420ReceiveP {
+
+  provides interface Init;
+  provides interface CC2420AsyncSplitControl as AsyncSplitControl; 
+  provides interface CC2420Receive;
+  provides interface CC2420Rx;
+
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as FIFO;
+  uses interface GeneralIO as FIFOP;
+  uses interface GpioInterrupt as InterruptFIFOP;
+
+  uses interface Resource as SpiResource;
+  uses interface CC2420Fifo as RXFIFO;
+  uses interface CC2420Strobe as SACK;
+  uses interface CC2420Strobe as SFLUSHRX;
+  uses interface CC2420Strobe as SRXON;
+  uses interface CC2420Strobe as SACKPEND; 
+  uses interface CC2420Register as MDMCTRL1;
+  uses interface FrameUtility;
+  uses interface CC2420Config;
+  uses interface CC2420Ram as RXFIFO_RAM;
+}
+
+implementation {
+
+  typedef enum {
+    S_STOPPED,
+    S_STARTING,
+    S_STARTED,
+    S_RX_LENGTH,
+    S_RX_FCF,
+    S_RX_HEADER,
+    S_RX_PAYLOAD,
+  } cc2420_receive_state_t;
+
+  enum {
+    RXFIFO_SIZE = 128,
+    TIMESTAMP_QUEUE_SIZE = 8,
+    //SACK_HEADER_LENGTH = 7,
+    SACK_HEADER_LENGTH = 3,
+  };
+
+  uint32_t m_timestamp_queue[ TIMESTAMP_QUEUE_SIZE ];
+  uint8_t m_timestamp_head;
+  
+  uint8_t m_timestamp_size;
+  
+  /** Number of packets we missed because we were doing something else */
+  uint8_t m_missed_packets;
+  
+  /** TRUE if we are receiving a valid packet into the stack */
+  norace bool receivingPacket;
+  
+  /** The length of the frame we're currently receiving */
+  norace uint8_t rxFrameLength;
+  
+  norace uint8_t m_bytes_left;
+
+  // norace message_t* m_p_rx_buf;
+
+  // message_t m_rx_buf;
+  
+  cc2420_receive_state_t m_state;
+  
+  // new packet format:
+  message_t m_frame;
+  norace message_t *m_rxFramePtr;
+  norace uint8_t m_mhrLen;
+  uint8_t m_dummy;
+  norace bool m_stop;
+  
+  /***************** Prototypes ****************/
+  void reset_state();
+  void beginReceive();
+  void receive();
+  void waitForNextPacket();
+  void flush();
+  void switchToUnbufferedMode();
+  void switchToBufferedMode();
+  void continueStart();
+  void continueStop();
+  task void stopContinueTask();
+  
+  task void receiveDone_task();
+  
+  /***************** Init Commands ****************/
+  command error_t Init.init() {
+    m_rxFramePtr = &m_frame;
+    atomic m_state = S_STOPPED;
+    return SUCCESS;
+  }
+
+  /***************** AsyncSplitControl ****************/
+  /* NOTE: AsyncSplitControl does not switch the state of the radio 
+   * hardware (i.e. it does not put the radio in Rx mode, this has to
+   * be done by the caller through a separate interface/component). 
+   */
+
+  /** 
+   * AsyncSplitControl.start should be called before radio
+   * is switched to Rx mode (or at least early enough before
+   * a packet has been received, i.e. before FIFOP changes)
+   */
+  async command error_t AsyncSplitControl.start()
+  {
+    atomic {
+      if ( !call FIFO.get() && !call FIFOP.get() ){
+        // RXFIFO has some data (remember: FIFOP is inverted)
+        // the problem is that this messses up the timestamping
+        // so why don't we flush here ourselves? 
+        // because we don't own the SPI...
+        return FAIL; 
+      }
+      ASSERT(m_state == S_STOPPED);
+      reset_state();
+      m_state = S_STARTED;
+      call InterruptFIFOP.enableFallingEdge(); // ready!
+    }
+    return SUCCESS;
+  }
+
+  /* AsyncSplitControl.stop:
+   *
+   * IMPORTANT: when AsyncSplitControl.stop is called, 
+   * then either
+   * 1) the radio MUST still be in RxMode
+   * 2) it was never put in RxMode after  
+   *    AsyncSplitControl.start() was called
+   *
+   * => The radio may be switched off only *after* the
+   * stopDone() event was signalled.
+   */
+  async command error_t AsyncSplitControl.stop()
+  {
+    atomic {
+      if (m_state == S_STOPPED)
+        return EALREADY;
+      else {
+        m_stop = TRUE;
+        call InterruptFIFOP.disable();
+        if (!receivingPacket)
+          continueStop(); // it is safe to stop now
+        // else continueStop will be called after 
+        // current Rx operation is finished
+      }
+    }
+    return SUCCESS;
+  }
+
+  void continueStop()
+  {
+    atomic {
+      if (!m_stop){
+        return;
+      }
+      m_stop = FALSE;
+      m_state = S_STOPPED;
+    }
+    post stopContinueTask();
+  }
+
+  task void stopContinueTask()
+  {
+    ASSERT(receivingPacket != TRUE);
+    call SpiResource.release(); // may fail
+    atomic m_state = S_STOPPED;
+    signal AsyncSplitControl.stopDone(SUCCESS);
+  }
+
+  /***************** CC2420Receive Commands ****************/
+  /**
+   * Start frame delimiter signifies the beginning/end of a packet
+   * See the CC2420 datasheet for details.
+   */
+  async command void CC2420Receive.sfd( uint32_t time ) {
+    if (m_state == S_STOPPED)
+      return;
+    if ( m_timestamp_size < TIMESTAMP_QUEUE_SIZE ) {
+      uint8_t tail =  ( ( m_timestamp_head + m_timestamp_size ) % TIMESTAMP_QUEUE_SIZE );
+      m_timestamp_queue[ tail ] = time;
+      m_timestamp_size++;
+    }
+  }
+
+  async command void CC2420Receive.sfd_dropped() {
+    if (m_state == S_STOPPED)
+      return;    
+    if ( m_timestamp_size ) {
+      m_timestamp_size--;
+    }
+  }
+  
+  /***************** InterruptFIFOP Events ****************/
+  async event void InterruptFIFOP.fired() {
+    atomic {
+      if ( m_state == S_STARTED ) {
+        beginReceive();
+
+      } else {
+        m_missed_packets++;
+      }
+    }
+  }
+  
+  
+  /***************** SpiResource Events ****************/
+  event void SpiResource.granted() {
+    atomic {
+      switch (m_state)
+      {
+        case S_STOPPED: ASSERT(0); break; // this should never happen!
+        default: receive();
+      }
+    }
+  }
+  
+  /***************** RXFIFO Events ****************/
+  /**
+   * We received some bytes from the SPI bus.  Process them in the context
+   * of the state we're in.  Remember the length byte is not part of the length
+   */
+  async event void RXFIFO.readDone( uint8_t* rx_buf, uint8_t rx_len,
+                                    error_t error ) {
+    uint8_t* buf;
+
+   atomic {
+    buf = (uint8_t*) &((ieee154_header_t*) m_rxFramePtr->header)->length; 
+    rxFrameLength = ((ieee154_header_t*) m_rxFramePtr->header)->length;
+
+     switch( m_state ) {
+
+    case S_RX_LENGTH:
+      m_state = S_RX_FCF;
+      if ( rxFrameLength + 1 > m_bytes_left ) {
+        // Length of this packet is bigger than the RXFIFO, flush it out.
+        flush();
+        
+      } else {
+        if ( !call FIFO.get() && !call FIFOP.get() ) {
+          //m_bytes_left -= rxFrameLength + 1;
+          flush(); 
+        }
+        
+        //if(rxFrameLength <= MAC_PACKET_SIZE) {
+        if(rxFrameLength <= (sizeof(ieee154_header_t) - 1 + TOSH_DATA_LENGTH + 2)){
+          if(rxFrameLength > 0) {
+            if(rxFrameLength > SACK_HEADER_LENGTH) {
+              // This packet has an FCF byte plus at least one more byte to read
+              call RXFIFO.continueRead(buf + 1, SACK_HEADER_LENGTH);
+              
+            } else {
+              // This is really a bad packet, skip FCF and get it out of here.
+              flush(); 
+              //m_state = S_RX_PAYLOAD;
+              //call RXFIFO.continueRead(buf + 1, rxFrameLength);
+            }
+                            
+          } else {
+            // Length == 0; start reading the next packet
+            flush();  
+/*            atomic receivingPacket = FALSE;*/
+/*            call CSN.set();*/
+/*            call SpiResource.release();*/
+/*            waitForNextPacket();*/
+          }
+          
+        } else {
+          // Length is too large; we have to flush the entire Rx FIFO
+          flush();
+        }
+      }
+      break;
+      
+    case S_RX_FCF:
+      if (call FrameUtility.getMHRLength(buf[1], buf[2], &m_mhrLen) != SUCCESS ||
+          m_mhrLen > rxFrameLength - 2) {
+        // header size incorrect
+        flush();
+        break;
+      } else if (m_mhrLen > SACK_HEADER_LENGTH) {
+        m_state = S_RX_HEADER;
+        call RXFIFO.continueRead(buf + 1 + SACK_HEADER_LENGTH, 
+          m_mhrLen - SACK_HEADER_LENGTH);
+        break;
+      } else {
+        // complete header has been read: fall through
+      }
+      // fall through
+
+    case S_RX_HEADER:
+      // JH: we are either using HW ACKs (normal receive mode) or don't ACK any
+      // packets (promiscuous mode)
+      // Didn't flip CSn, we're ok to continue reading.
+      if ((rxFrameLength - m_mhrLen - 2) > TOSH_DATA_LENGTH) // 2 for CRC
+        flush();
+      else {
+        m_state = S_RX_PAYLOAD;
+        call RXFIFO.continueRead((uint8_t*) m_rxFramePtr->data, rxFrameLength - m_mhrLen);
+      }
+      break;
+    
+    case S_RX_PAYLOAD:
+      call CSN.set();
+      
+      if(!m_missed_packets) {
+        // Release the SPI only if there are no more frames to download
+        call SpiResource.release();
+      }
+      
+      if ( m_timestamp_size ) {
+        if ( rxFrameLength > 4 ) {
+          ((ieee154_metadata_t*) m_rxFramePtr->metadata)->timestamp = m_timestamp_queue[ m_timestamp_head ];
+          m_timestamp_head = ( m_timestamp_head + 1 ) % TIMESTAMP_QUEUE_SIZE;
+          m_timestamp_size--;
+        }
+      } else {
+        ((ieee154_metadata_t*) m_rxFramePtr->metadata)->timestamp = IEEE154_INVALID_TIMESTAMP;
+      }
+      
+      // We may have received an ack that should be processed by Transmit
+      // buf[rxFrameLength] >> 7 checks the CRC
+      if ( ( m_rxFramePtr->data[ rxFrameLength - m_mhrLen - 1 ] >> 7 ) && rx_buf ) {
+        uint8_t type = ((ieee154_header_t*) m_rxFramePtr->header)->mhr[0] & 0x07;
+/*        signal CC2420Receive.receive( type, m_p_rx_buf );*/
+        signal CC2420Receive.receive( type, m_rxFramePtr );
+/*        if ( type == IEEE154_TYPE_DATA ) {*/
+        if ( (type != IEEE154_TYPE_ACK || call CC2420Config.isPromiscuousModeEnabled())
+            && !m_stop) { 
+          post receiveDone_task();
+          return;
+        }
+      }
+      
+      waitForNextPacket();
+      break;
+
+    default:
+      atomic receivingPacket = FALSE;
+      call CSN.set();
+      call SpiResource.release();
+      if (m_stop){
+        continueStop();
+        return;
+      }
+      break;
+      
+    }
+    }
+    
+  }
+
+  async event void RXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len, error_t error ) {
+  }  
+  
+  /***************** Tasks *****************/
+  /**
+   * Fill in metadata details, pass the packet up the stack, and
+   * get the next packet.
+   */
+  task void receiveDone_task() {
+    uint8_t payloadLen = ((ieee154_header_t*) m_rxFramePtr->header)->length - m_mhrLen - 2;
+    ieee154_metadata_t *metadata = (ieee154_metadata_t*) m_rxFramePtr->metadata;
+
+    atomic ASSERT(m_state != S_STOPPED);
+    ((ieee154_header_t*) m_rxFramePtr->header)->length = m_rxFramePtr->data[payloadLen+1] & 0x7f; // temp. LQI
+    metadata->rssi = m_rxFramePtr->data[payloadLen];
+    metadata->linkQuality = ((ieee154_header_t*) m_rxFramePtr->header)->length; // copy back
+    ((ieee154_header_t*) m_rxFramePtr->header)->length = payloadLen;
+    m_rxFramePtr = signal CC2420Rx.received(m_rxFramePtr);
+
+/*    cc2420_metadata_t* metadata = call CC2420PacketBody.getMetadata( m_p_rx_buf );*/
+/*    uint8_t* buf = (uint8_t*) call CC2420PacketBody.getHeader( m_p_rx_buf );;*/
+/*    */
+/*    metadata->crc = buf[ rxFrameLength ] >> 7;*/
+/*    metadata->rssi = buf[ rxFrameLength - 1 ];*/
+/*    metadata->lqi = buf[ rxFrameLength ] & 0x7f;*/
+    // async event message_t* receiveDone( message_t *data );
+
+/*    m_p_rx_buf = signal Receive.receive( m_rxFramePtrm_p_rx_buf, m_p_rx_buf->data, */
+/*                                         rxFrameLength );*/
+
+    atomic receivingPacket = FALSE;
+    waitForNextPacket();
+  }
+  
+  
+  /****************** Functions ****************/
+  /**
+   * Attempt to acquire the SPI bus to receive a packet.
+   */
+  void beginReceive() { 
+    atomic {
+      if (m_state == S_STOPPED || m_stop){
+        return;
+      }
+      m_state = S_RX_LENGTH;
+      receivingPacket = TRUE;
+    
+      if(call SpiResource.isOwner()) {
+        receive();
+
+      } else if (call SpiResource.immediateRequest() == SUCCESS) {
+        receive();
+
+      } else {
+        call SpiResource.request();
+      }
+    }
+  }
+  
+  /**
+   * Flush out the Rx FIFO
+   */
+  void flush() {
+    reset_state();
+    call CSN.set();
+    call CSN.clr();
+    call SFLUSHRX.strobe();
+    call SFLUSHRX.strobe();
+    call CSN.set();
+    call SpiResource.release();
+    waitForNextPacket();
+  }
+  
+  /**
+   * The first byte of each packet is the length byte.  Read in that single
+   * byte, and then read in the rest of the packet.  The CC2420 could contain
+   * multiple packets that have been buffered up, so if something goes wrong, 
+   * we necessarily want to flush out the FIFO unless we have to.
+   */
+  void receive() {
+    call CSN.set();
+    call CSN.clr();
+    //call RXFIFO.beginRead( (uint8_t*)(call CC2420PacketBody.getHeader( m_p_rx_buf )), 1 );
+    call RXFIFO.beginRead( &((ieee154_header_t*) m_rxFramePtr->header)->length, 1 );
+  }
+
+
+  /**
+   * Determine if there's a packet ready to go, or if we should do nothing
+   * until the next packet arrives
+   */
+  void waitForNextPacket() {
+    atomic {
+      if ( m_state == S_STOPPED) {
+        call SpiResource.release();
+        return;
+      }
+      receivingPacket = FALSE;
+      if (m_stop){
+        continueStop();
+        return;
+      }
+      
+      if ( ( m_missed_packets && call FIFO.get() ) || !call FIFOP.get() ) {
+        // A new packet is buffered up and ready to go
+        if ( m_missed_packets ) {
+          m_missed_packets--;
+        }
+        
+        beginReceive();
+        
+      } else {
+        // Wait for the next packet to arrive
+        m_state = S_STARTED;
+        m_missed_packets = 0;
+        call SpiResource.release();
+      }
+    }
+  }
+  
+  /**
+   * Reset this component
+   */
+  void reset_state() {
+    m_bytes_left = RXFIFO_SIZE;
+    atomic receivingPacket = FALSE;
+    m_timestamp_head = 0;
+    m_timestamp_size = 0;
+    m_missed_packets = 0;
+  }
+
+}
diff --git a/tos/chips/cc2420_tkn154/CC2420Rx.nc b/tos/chips/cc2420_tkn154/CC2420Rx.nc
new file mode 100644
index 00000000..7e85efd0
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CC2420Rx.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:07 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154_MAC.h"
+#include "TKN154_platform.h"
+
+interface CC2420Rx {
+
+  /**
+   * Receive a packet buffer, returning a buffer for the signaling
+   * component to use for the next reception. 
+   */
+  event message_t* received(message_t *data);
+
+}
+
diff --git a/tos/chips/cc2420_tkn154/CC2420TKN154C.nc b/tos/chips/cc2420_tkn154/CC2420TKN154C.nc
new file mode 100644
index 00000000..e7692e9d
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CC2420TKN154C.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:07 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "Timer62500hz.h"
+configuration CC2420TKN154C
+{
+  provides
+  {
+    interface SplitControl;
+    interface RadioRx;
+    interface RadioTx;
+    interface SlottedCsmaCa;
+    interface UnslottedCsmaCa;
+    interface EnergyDetection;
+    interface RadioOff;
+    interface Set<bool> as RadioPromiscuousMode;
+    interface Timestamp;
+    interface GetNow<bool> as CCA;
+  } uses {
+    interface Notify<const void*> as PIBUpdate[uint8_t attributeID];
+    interface LocalTime<T62500hz>;
+    interface Alarm<T62500hz,uint32_t> as Alarm1;
+    interface Alarm<T62500hz,uint32_t> as Alarm2;
+    interface FrameUtility;
+    interface ReliableWait;
+    interface TimeCalc;
+    interface Random;
+  }
+} implementation {
+
+  components MainC, CC2420TKN154P as PHY;
+
+  SplitControl = PHY;
+  RadioRx = PHY;
+  RadioTx = PHY;
+  SlottedCsmaCa = PHY;
+  UnslottedCsmaCa = PHY;
+  RadioOff = PHY;
+  EnergyDetection = PHY;
+  PIBUpdate = PHY;
+  RadioPromiscuousMode = PHY;
+  Timestamp = PHY;
+  LocalTime = PHY;
+  ReliableWait = PHY;
+  TimeCalc = PHY;
+  CCA = PHY;
+
+  PHY.Random = Random;
+
+  components CC2420ControlTransmitC;
+  PHY.SpiResource -> CC2420ControlTransmitC;
+  PHY.CC2420Power -> CC2420ControlTransmitC;
+  PHY.CC2420Config -> CC2420ControlTransmitC;
+  CC2420ControlTransmitC.StartupAlarm = Alarm2;
+  FrameUtility = CC2420ControlTransmitC;
+
+  PHY.TxControl -> CC2420ControlTransmitC;
+  PHY.CC2420Tx -> CC2420ControlTransmitC;
+  CC2420ControlTransmitC.AckAlarm = Alarm1;
+
+  components CC2420ReceiveC;
+  PHY.RxControl -> CC2420ReceiveC;
+  PHY.CC2420Rx -> CC2420ReceiveC.CC2420Rx;
+  FrameUtility = CC2420ReceiveC;
+  CC2420ReceiveC.CC2420Config -> CC2420ControlTransmitC;
+}
+
diff --git a/tos/chips/cc2420_tkn154/CC2420TKN154P.nc b/tos/chips/cc2420_tkn154/CC2420TKN154P.nc
new file mode 100644
index 00000000..434a9678
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CC2420TKN154P.nc
@@ -0,0 +1,902 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2009/10/20 09:21:39 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154_MAC.h"
+#include "TKN154_PHY.h"
+#include <CC2420.h>
+#include "Timer62500hz.h"
+
+module CC2420TKN154P 
+{
+
+  provides {
+    interface SplitControl;
+    interface RadioOff;
+    interface RadioRx;
+    interface RadioTx;
+    interface SlottedCsmaCa;
+    interface UnslottedCsmaCa;
+    interface EnergyDetection;
+    interface Set<bool> as RadioPromiscuousMode;
+    interface Timestamp;
+    interface GetNow<bool> as CCA;
+  } uses {
+    interface Notify<const void*> as PIBUpdate[uint8_t attributeID];
+    interface LocalTime<T62500hz> as LocalTime;
+    interface Resource as SpiResource;
+    interface AsyncStdControl as TxControl;        
+    interface CC2420AsyncSplitControl as RxControl; 
+    interface CC2420Power;
+    interface CC2420Config;
+    interface CC2420Rx;
+    interface CC2420Tx;
+    interface Random;
+    interface Leds;
+    interface ReliableWait;
+    interface TimeCalc;
+  }
+
+} implementation {
+
+  typedef enum {
+    S_STOPPED,
+    S_STOPPING,
+    S_STARTING,
+    S_ED,
+    S_RADIO_OFF,
+
+    S_RESERVE_RX_SPI,
+    S_RX_PENDING,
+    S_RECEIVING,
+    S_OFF_PENDING,
+
+    S_LOAD_TXFIFO_NO_CSMA,
+    S_LOAD_TXFIFO_UNSLOTTED,
+    S_LOAD_TXFIFO_SLOTTED,
+    S_TX_PENDING,
+    S_TX_BACKOFF_UNSLOTTED,
+    S_TX_BACKOFF_SLOTTED,
+    S_TX_ACTIVE_NO_CSMA,
+    S_TX_ACTIVE_UNSLOTTED_CSMA,
+    S_TX_ACTIVE_SLOTTED_CSMA,
+  } m_state_t;
+
+  norace m_state_t m_state = S_STOPPED;
+  norace ieee154_txframe_t *m_txframe;
+  norace error_t m_txResult;
+  norace bool m_ackFramePending;
+  norace uint16_t m_remainingBackoff;
+  norace bool m_resume;
+  norace ieee154_csma_t *m_csma;
+  bool m_pibUpdated;
+
+  /* timing */
+  norace uint32_t m_dt;
+  norace uint32_t m_t0;
+
+
+  /* energy detection */
+  int8_t m_maxEnergy;
+  uint32_t m_edDuration;
+  uint32_t m_edStartTime;
+
+  /* task prototypes */
+  task void energyDetectionTask();
+  task void startDoneTask();
+  task void rxControlStopDoneTask();
+  task void configSyncTask();
+
+  /* function prototypes */
+  uint8_t dBmToPA_LEVEL(int dbm);
+  void txDoneRxControlStopped();
+  void rxSpiReserved();
+  void txSpiReserved();
+  void sendDoneSpiReserved();
+  void offSpiReserved();
+  void offStopRxDone();
+  uint16_t getRandomBackoff(uint8_t BE);
+  void loadTxFrame(ieee154_txframe_t *frame);
+  void checkEnableRxForACK();
+
+  /* ----------------------- StdControl Operations ----------------------- */
+
+  command error_t SplitControl.start()
+  {
+    atomic {
+      if (m_state == S_RADIO_OFF)
+        return EALREADY;
+      else if (m_state != S_STOPPED)
+        return FAIL;
+      m_state = S_STARTING;
+    }
+    call SpiResource.request(); /* continue in startSpiReserved() */
+    return SUCCESS;
+  }
+
+  void startSpiReserved()
+  {
+    /* we own the SPI bus */
+    call CC2420Power.startVReg();
+  }
+
+  async event void CC2420Power.startVRegDone() 
+  {
+    call CC2420Power.startOscillator();
+  }
+
+  async event void CC2420Power.startOscillatorDone() 
+  {
+    call CC2420Power.rfOff();
+    call CC2420Power.flushRxFifo();
+    call CC2420Tx.unlockChipSpi();
+    post startDoneTask();
+  }
+
+  task void startDoneTask() 
+  {
+    // in case this is a restart: we just set the channel to the same value
+    // it had before  in order to set m_needsSync to TRUE and then call sync
+    // to populate the registers on the chip with the values already in memory
+    call CC2420Config.setChannel(call CC2420Config.getChannel());
+    call CC2420Config.sync();
+    call SpiResource.release();
+    m_state = S_RADIO_OFF;
+    signal SplitControl.startDone(SUCCESS);
+  }
+
+  command error_t SplitControl.stop() 
+  {
+    atomic {
+      if (m_state == S_STOPPED)
+        return EALREADY;
+      else if (m_state != S_RADIO_OFF)
+        return FAIL;
+      m_state = S_STOPPING;
+    }
+    call SpiResource.request();
+    return SUCCESS;
+  }
+
+  void stopSpiReserved()
+  {
+    /* we own the SPI bus */
+    call CC2420Power.rfOff();
+    call CC2420Power.flushRxFifo();
+    call CC2420Power.stopOscillator(); 
+    call CC2420Power.stopVReg();
+    call CC2420Tx.unlockChipSpi();
+    call SpiResource.release();
+    m_state  = S_STOPPED;
+    signal SplitControl.stopDone(SUCCESS);
+  }
+
+  /* ----------------------- Helpers / PIB Updates ----------------------- */
+
+  /* Returns a random number [0,(2^BE) - 1] (uniform distr.) */
+  /* multiplied by backoff period time (in symbols)          */
+  uint16_t getRandomBackoff(uint8_t BE)
+  {
+    uint16_t res = call Random.rand16();
+    uint16_t mask = 0xFFFF;
+    mask <<= BE;
+    mask = ~mask;
+    res &= mask;
+    return (res * IEEE154_aUnitBackoffPeriod);
+  }
+
+  /* input: power in dBm, output: PA_LEVEL setting for CC2420 TXCTRL register */
+  uint8_t dBmToPA_LEVEL(int dBm)
+  {
+    uint8_t result;
+    /* the cc2420 has 8 discrete (documented) values */
+    if (dBm >= 0)
+      result = 31;
+    else if (dBm > -2)
+      result = 27;
+    else if (dBm > -4)
+      result = 23;
+    else if (dBm > -6)
+      result = 19;
+    else if (dBm > -9)
+      result = 15;
+    else if (dBm > -13)
+      result = 11;
+    else if (dBm > -20)
+      result = 7;
+    else
+      result = 3;
+    return result;
+  }
+
+  event void PIBUpdate.notify[uint8_t PIBAttribute](const void* PIBAttributeValue)
+  {
+    uint8_t txpower;
+    switch (PIBAttribute)
+    {
+      case IEEE154_macShortAddress:
+        call CC2420Config.setShortAddr(*((ieee154_macShortAddress_t*) PIBAttributeValue));
+        break;
+      case IEEE154_macPANId:
+        call CC2420Config.setPanAddr(*((ieee154_macPANId_t*) PIBAttributeValue));
+        break;
+      case IEEE154_phyCurrentChannel:
+        call CC2420Config.setChannel(*((ieee154_phyCurrentChannel_t*) PIBAttributeValue));
+        break;
+      case IEEE154_macPanCoordinator:
+        call CC2420Config.setPanCoordinator(*((ieee154_macPanCoordinator_t*) PIBAttributeValue));
+        break;
+      case IEEE154_phyTransmitPower:
+        /* lower 6 bits are twos-complement in dBm (range -32 to +31 dBm) */
+        txpower = (*((ieee154_phyTransmitPower_t*) PIBAttributeValue)) & 0x3F;
+        if (txpower & 0x20)
+          txpower |= 0xC0; /* make it negative, to be interpreted as int8_t */
+        call CC2420Config.setTxPower(dBmToPA_LEVEL((int8_t) txpower));
+        break;
+      case IEEE154_phyCCAMode:
+        call CC2420Config.setCCAMode(*((ieee154_phyCCAMode_t*) PIBAttributeValue));
+        break;
+    }
+    if (m_state == S_RECEIVING || m_state == S_RX_PENDING)
+      post configSyncTask();
+  }
+
+  task void configSyncTask()
+  {
+    if (call SpiResource.immediateRequest() == SUCCESS) {
+      call CC2420Config.sync(); 
+      if (m_state == S_RECEIVING) {
+        // need to toggle radio state to make changes effective now
+        call CC2420Power.rfOff();
+        call CC2420Power.rxOn();
+      }
+      call SpiResource.release();
+    } else
+      post configSyncTask(); // spin (should be short time, until packet is received)
+  }
+
+  command void RadioPromiscuousMode.set( bool val )
+  {
+    call CC2420Config.setPromiscuousMode(val);
+  }
+
+  /* ----------------------- Energy Detection ----------------------- */
+
+  command error_t EnergyDetection.start(uint32_t duration)
+  {
+    atomic {
+      if (m_state == S_ED)
+        return EALREADY;
+      else if (m_state != S_RADIO_OFF)
+        return FAIL;
+      m_state = S_ED;
+    }
+    m_edDuration = duration;
+    m_maxEnergy = -128 + 45; /* initialization (45 will be substracted below) */
+    call SpiResource.request();
+    return SUCCESS;
+  }
+
+  void edReserved()
+  {
+    call CC2420Config.sync(); /* put PIB changes into operation (if any) */
+    call CC2420Power.rxOn();
+    m_edStartTime = call LocalTime.get();
+    post energyDetectionTask();
+  }
+
+  task void energyDetectionTask()
+  {
+    int8_t value;
+    if (call CC2420Power.rssi(&value) == SUCCESS)
+      if (value > m_maxEnergy)
+        m_maxEnergy = value;
+
+    if (call TimeCalc.hasExpired(m_edStartTime, m_edDuration)) {
+      /* P = RSSI_VAL + RSSI_OFFSET [dBm]  */
+      /* RSSI_OFFSET is approximately -45. */
+      m_maxEnergy -= 45; 
+      call CC2420Power.rfOff();
+      call CC2420Power.flushRxFifo();
+      call SpiResource.release();
+      m_state = S_RADIO_OFF;
+      signal EnergyDetection.done(SUCCESS, m_maxEnergy);
+    } else
+      post energyDetectionTask();
+  }
+
+  /* ----------------------- RadioOff ----------------------- */
+
+  async command error_t RadioOff.off()
+  {
+    error_t result;
+    atomic {
+      if (m_state == S_RADIO_OFF)
+        return EALREADY;
+      else if (m_state != S_RECEIVING)
+        return FAIL;
+      m_state = S_OFF_PENDING;
+    }
+    result = call RxControl.stop();
+    ASSERT(result == SUCCESS);
+    return result;
+  }
+  
+  void offStopRxDone()
+  {
+    if (call SpiResource.immediateRequest() == SUCCESS)
+      offSpiReserved();
+    else
+      call SpiResource.request();  /* will continue in offSpiReserved() */
+  }
+
+  void offSpiReserved()
+  {
+    call TxControl.stop();
+    call CC2420Power.rfOff();
+    call CC2420Power.flushRxFifo();
+    call CC2420Tx.unlockChipSpi();
+    call SpiResource.release();
+    m_state = S_RADIO_OFF;
+    signal RadioOff.offDone();
+  }
+
+  async command bool RadioOff.isOff()
+  {
+    return m_state == S_RADIO_OFF;
+  }
+
+  /* ----------------------- RadioRx ----------------------- */
+
+  async command error_t RadioRx.enableRx(uint32_t t0, uint32_t dt)
+  {
+    error_t result;
+    atomic {
+      if (m_state != S_RADIO_OFF)
+        return FAIL;
+      m_state = S_RESERVE_RX_SPI;
+    }
+    m_t0 = t0;
+    m_dt = dt;
+    result = call RxControl.start(); 
+    ASSERT(result == SUCCESS);
+    if (result == SUCCESS)
+      if (call SpiResource.immediateRequest() == SUCCESS)
+        rxSpiReserved();
+      else
+        call SpiResource.request();   /* will continue in rxSpiReserved()  */
+    return result; 
+  }
+
+  void rxSpiReserved()
+  {
+    m_state = S_RX_PENDING;
+    call CC2420Config.sync(); /* put any pending PIB changes into operation      */
+    call TxControl.stop();    /* reset Tx logic for timestamping (SFD interrupt) */
+    call TxControl.start();   
+    atomic {
+      if (call TimeCalc.hasExpired(m_t0, m_dt))
+        signal ReliableWait.waitRxDone();
+      else
+        call ReliableWait.waitRx(m_t0, m_dt); /* will signal waitRxDone() just in time */
+    }
+  }
+
+  async event void ReliableWait.waitRxDone()
+  {
+    error_t result;
+    atomic {
+      m_state = S_RECEIVING;
+      result = call CC2420Power.rxOn(); 
+    }
+    ASSERT(result == SUCCESS);
+    call CC2420Tx.lockChipSpi();
+    call SpiResource.release();
+    signal RadioRx.enableRxDone();
+  }
+
+  event message_t* CC2420Rx.received(message_t *frame) 
+  {
+    if (m_state == S_RECEIVING)
+      return signal RadioRx.received(frame);
+    else
+      return frame;
+  }
+
+  async command bool RadioRx.isReceiving()
+  {
+    return m_state == S_RECEIVING;
+  }
+
+  /* ----------------------- RadioTx ----------------------- */
+
+  async command error_t RadioTx.transmit( ieee154_txframe_t *frame, uint32_t t0, uint32_t dt )
+  {
+    if( frame == NULL || frame->header == NULL || 
+        ((frame->payload == NULL) && (frame->payloadLen != 0)) || frame->metadata == NULL || 
+        (frame->headerLen + frame->payloadLen + 2) > IEEE154_aMaxPHYPacketSize )
+      return EINVAL;
+
+    atomic {
+      if( m_state != S_RADIO_OFF )
+        return FAIL;
+      m_state = S_LOAD_TXFIFO_NO_CSMA;
+    }
+    m_txframe = frame;
+    m_t0 = t0;
+    m_dt = dt;
+    loadTxFrame(frame); /* will continue in loadDoneRadioTx() */
+    return SUCCESS;
+  }
+
+  void loadDoneRadioTx()
+  {
+    /* frame was loaded into TXFIFO */
+    atomic {
+      m_state = S_TX_PENDING;
+      if (m_dt == 0)
+        signal ReliableWait.waitTxDone();
+      else
+        call ReliableWait.waitTx(m_t0, m_dt); /* will signal waitTxDone() just in time */
+    }
+  }
+
+  async event void ReliableWait.waitTxDone()
+  {
+    error_t result;
+    ASSERT(m_state == S_TX_PENDING);
+    atomic {
+      m_state = S_TX_ACTIVE_NO_CSMA;
+      result = call CC2420Tx.send(FALSE); /* transmit without CCA, this must succeed */ 
+      checkEnableRxForACK();
+    }
+    ASSERT(result == SUCCESS); 
+  }
+
+  inline void txDoneRadioTx(ieee154_txframe_t *frame, error_t result)
+  {
+    /* transmission completed */
+    signal RadioTx.transmitDone(frame, result);
+  }
+
+  /* ----------------------- UnslottedCsmaCa ----------------------- */
+
+  async command error_t UnslottedCsmaCa.transmit(ieee154_txframe_t *frame, ieee154_csma_t *csma)
+  {
+    if( frame == NULL || frame->header == NULL || 
+        ((frame->payload == NULL) && (frame->payloadLen != 0)) || frame->metadata == NULL || 
+        (frame->headerLen + frame->payloadLen + 2) > IEEE154_aMaxPHYPacketSize )
+      return EINVAL;
+    atomic {
+      if( m_state != S_RADIO_OFF )
+        return FAIL;
+      m_state = S_LOAD_TXFIFO_UNSLOTTED;
+    }
+    m_txframe = frame;
+    m_csma = csma;
+    loadTxFrame(frame); /* will continue in nextIterationUnslottedCsma()  */
+    return SUCCESS;
+  }
+
+  void nextIterationUnslottedCsma()
+  {
+    /* wait for a random time of [0,(2^BE) - 1] backoff slots */
+    uint16_t backoff = getRandomBackoff(m_csma->BE); 
+    m_state = S_TX_BACKOFF_UNSLOTTED;
+    call ReliableWait.waitBackoff(backoff);  /* will continue in waitBackoffDoneUnslottedCsma()  */
+  }
+
+  void waitBackoffDoneUnslottedCsma()
+  {
+    /* backoff finished, try to transmit now */
+    int8_t dummy;
+    ieee154_txframe_t *frame = NULL;
+    ieee154_csma_t *csma = NULL;
+
+    atomic {
+      /* The CC2420 needs to be in an Rx mode for STXONCCA strobe */
+      /* Note: the receive logic of the CC2420 driver is not yet  */
+      /* started, i.e. we cannot (yet) receive any packets        */
+      call CC2420Power.rxOn();
+      m_state = S_TX_ACTIVE_UNSLOTTED_CSMA;
+
+      /* wait for CC2420 Rx to calibrate + CCA valid time */
+      while (call CC2420Power.rssi(&dummy) != SUCCESS)
+        ;
+
+      /* transmit with a single CCA done in hardware (STXONCCA strobe) */
+      if (call CC2420Tx.send(TRUE) == SUCCESS) {
+        /* frame is being sent now, do we need Rx logic ready for an ACK? */
+        checkEnableRxForACK();
+      } else {
+        /* channel is busy */
+        call CC2420Power.rfOff();
+        /* we might have accidentally caught something during CCA, flush it out */
+        call CC2420Power.flushRxFifo(); 
+        m_csma->NB += 1;
+        if (m_csma->NB > m_csma->macMaxCsmaBackoffs) {
+          /* CSMA-CA failure, we're done. The MAC may decide to retransmit. */
+          frame = m_txframe;
+          csma = m_csma;
+          /* continue below */
+        } else {
+          /* Retry -> next iteration of the unslotted CSMA-CA */
+          m_csma->BE += 1;
+          if (m_csma->BE > m_csma->macMaxBE)
+            m_csma->BE = m_csma->macMaxBE;
+          nextIterationUnslottedCsma();
+        }
+      }
+    }
+    if (frame != NULL) {
+      call CC2420Tx.unlockChipSpi();
+      call TxControl.stop();
+      call SpiResource.release();
+      m_state = S_RADIO_OFF;
+      signal UnslottedCsmaCa.transmitDone(frame, csma, FALSE, FAIL);
+    }
+  }
+
+  inline void txDoneUnslottedCsma(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, error_t result)
+  {
+    /* transmission completed */
+    signal UnslottedCsmaCa.transmitDone(frame, csma, ackPendingFlag, result);
+  }
+
+  /* ----------------------- SlottedCsmaCa ----------------------- */
+
+    /* The slotted CSMA-CA requires very exact timing, because transmissions
+     * must start on 320 us backoff boundaries. Because it is accessed over SPI
+     * the CC2420 is not good at meeting these timing requirements, so consider 
+     * the "SlottedCsmaCa"-code below as experimental. */
+
+  async command error_t SlottedCsmaCa.transmit(ieee154_txframe_t *frame, ieee154_csma_t *csma,
+      uint32_t slot0Time, uint32_t dtMax, bool resume, uint16_t remainingBackoff)
+  {
+    if( frame == NULL || frame->header == NULL || 
+        ((frame->payload == NULL) && (frame->payloadLen != 0)) || frame->metadata == NULL || 
+        (frame->headerLen + frame->payloadLen + 2) > IEEE154_aMaxPHYPacketSize)
+      return EINVAL;
+    atomic {
+      if( m_state != S_RADIO_OFF )
+        return FAIL;
+      m_state = S_LOAD_TXFIFO_SLOTTED;
+    }
+    m_txframe = frame;
+    m_csma = csma;
+    m_t0 = slot0Time;
+    m_dt = dtMax;
+    m_resume = resume;
+    m_remainingBackoff = remainingBackoff;
+    loadTxFrame(frame); /* will continue in nextIterationSlottedCsma()  */
+    return SUCCESS;
+  }
+
+  void nextIterationSlottedCsma()
+  {
+    uint32_t dtTxTarget;
+    uint16_t backoff;
+    ieee154_txframe_t *frame = NULL;
+    ieee154_csma_t *csma = NULL;
+
+    atomic {
+      if (m_resume) {
+        backoff = m_remainingBackoff;
+        m_resume = FALSE;
+      } else
+        backoff = getRandomBackoff(m_csma->BE);
+      dtTxTarget = call TimeCalc.timeElapsed(m_t0, call LocalTime.get());
+      dtTxTarget += backoff;
+      if (dtTxTarget > m_dt) {
+        /* frame doesn't fit into remaining CAP */
+        uint32_t overlap = dtTxTarget - m_dt;
+        overlap = overlap + (IEEE154_aUnitBackoffPeriod - (overlap % IEEE154_aUnitBackoffPeriod));
+        backoff = overlap;
+        frame = m_txframe;
+        csma = m_csma;
+      } else {
+        /* backoff now */
+        m_state = S_TX_BACKOFF_SLOTTED;
+        call ReliableWait.waitBackoff(backoff);  /* will continue in waitBackoffDoneSlottedCsma()  */
+      }
+    }
+    if (frame != NULL) { /* frame didn't fit in the remaining CAP */
+      call CC2420Tx.unlockChipSpi();
+      call TxControl.stop();
+      call SpiResource.release();
+      m_state = S_RADIO_OFF;
+      signal SlottedCsmaCa.transmitDone(frame, csma, FALSE, backoff, ERETRY);
+    }
+  }
+
+  void waitBackoffDoneSlottedCsma()
+  {
+    int8_t dummy;
+    bool ccaFailure = FALSE;
+    error_t result = FAIL;
+    ieee154_txframe_t *frame = NULL;
+    ieee154_csma_t *csma = NULL;
+
+    atomic {
+      /* The CC2420 needs to be in an Rx mode for STXONCCA strobe */
+      /* Note: the receive logic of the CC2420 driver is not yet  */
+      /* started, i.e. we cannot (yet) receive any packets        */
+      call CC2420Power.rxOn();
+      m_state = S_TX_ACTIVE_SLOTTED_CSMA;
+
+      /* wait for CC2420 Rx to calibrate + CCA valid time */
+      while (call CC2420Power.rssi(&dummy) != SUCCESS)
+        ;
+
+      /* perform CCA on slot boundary (i.e. 8 symbols after backoff bounday);    */
+      /* this platform-specific command is supposed to return just in time, so   */
+      /* that the frame will be transmitted exactly on the next backoff boundary */
+      if (call ReliableWait.ccaOnBackoffBoundary(m_t0)) {
+        /* first CCA succeeded */
+        if (call CC2420Tx.send(TRUE) == SUCCESS) {
+          /* frame is being sent now, do we need Rx logic ready for an ACK? */
+          checkEnableRxForACK();
+          return;
+        } else
+          ccaFailure = TRUE; /* second CCA failed */
+      } else
+        ccaFailure = TRUE; /* first CCA failed */
+
+      /* did not transmit the frame */
+      call CC2420Power.rfOff();
+      call CC2420Power.flushRxFifo(); /* we might have (accidentally) caught something */
+      m_state = S_LOAD_TXFIFO_SLOTTED;
+      if (ccaFailure) {
+        m_csma->NB += 1;
+        if (m_csma->NB > m_csma->macMaxCsmaBackoffs) {
+          /* CSMA-CA failure, we're done. The MAC may decide to retransmit. */
+          frame = m_txframe;
+          csma = m_csma;
+          result = FAIL;
+        } else {
+          /* next iteration of slotted CSMA-CA */
+          m_csma->BE += 1;
+          if (m_csma->BE > m_csma->macMaxBE)
+            m_csma->BE = m_csma->macMaxBE;
+          nextIterationSlottedCsma();
+        }
+      } else {
+        /* frame didn't fit into remaining CAP, this can only happen */
+        /* if the runtime overhead was too high. this should actually not happen.  */
+        /* (in principle the frame should have fitted, because we checked before) */
+        frame = m_txframe;
+        csma = m_csma;
+        result = ERETRY;
+      }
+    }
+    if (frame != NULL) {
+      call CC2420Tx.unlockChipSpi();
+      call TxControl.stop();
+      call SpiResource.release();
+      m_state = S_RADIO_OFF;
+      signal SlottedCsmaCa.transmitDone(frame, csma, FALSE, 0, result);
+    }
+  }
+
+  inline void txDoneSlottedCsmaCa(ieee154_txframe_t *frame, ieee154_csma_t *csma, 
+      bool ackPendingFlag, uint16_t remainingBackoff, error_t result)
+  {
+    /* transmission completed */
+    signal SlottedCsmaCa.transmitDone(frame, csma, ackPendingFlag, remainingBackoff, result);
+  }
+
+  /* ----------------------- Common Tx Operations ----------------------- */
+
+  void loadTxFrame(ieee154_txframe_t *frame)
+  {
+    if (call SpiResource.isOwner() || call SpiResource.immediateRequest() == SUCCESS) 
+      txSpiReserved();
+    else
+      call SpiResource.request(); /* will continue in txSpiReserved() */
+  }
+
+  void txSpiReserved()
+  {
+    error_t result;
+    call CC2420Config.sync();
+    call TxControl.start();
+    result = call CC2420Tx.loadTXFIFO(m_txframe);
+    ASSERT(result == SUCCESS);
+  }
+
+  async event void CC2420Tx.loadTXFIFODone(ieee154_txframe_t *data, error_t error)
+  {
+    atomic {
+      switch (m_state)
+      {
+        case S_LOAD_TXFIFO_NO_CSMA: loadDoneRadioTx(); break;
+        case S_LOAD_TXFIFO_UNSLOTTED: nextIterationUnslottedCsma(); break;
+        case S_LOAD_TXFIFO_SLOTTED: nextIterationSlottedCsma(); break;
+        default: ASSERT(0); break;
+      }
+    }
+  }
+
+  void checkEnableRxForACK()
+  {
+    /* A frame is currently being transmitted, check if we  */
+    /* need the Rx logic ready for the ACK                  */
+    bool ackRequest = (m_txframe->header->mhr[MHR_INDEX_FC1] & FC1_ACK_REQUEST) ? TRUE : FALSE;
+    error_t result = SUCCESS;
+
+    if (ackRequest) {
+      /* release SpiResource and start Rx logic, so the latter  */
+      /* can take over after Tx is finished to receive the ACK */
+      call SpiResource.release();
+      result = call RxControl.start();
+    }
+    ASSERT(result == SUCCESS);
+  }
+
+  async event void CC2420Tx.sendDone(ieee154_txframe_t *frame, bool ackPendingFlag, error_t result)
+  {
+    m_ackFramePending = ackPendingFlag;
+    m_txResult = result;
+    if (!call SpiResource.isOwner()) {
+      /* this means an ACK was requested and during the transmission */
+      /* we released the Spi to allow the Rx part to take over */
+      ASSERT((frame->header->mhr[MHR_INDEX_FC1] & FC1_ACK_REQUEST));
+      result = call RxControl.stop();
+      ASSERT(result == SUCCESS); /* will continue in txDoneRxControlStopped() */
+    } else
+      sendDoneSpiReserved();
+  }
+
+  void txDoneRxControlStopped()
+  {
+    /* get the Spi to switch radio off */
+    if (call SpiResource.isOwner() || call SpiResource.immediateRequest() == SUCCESS) 
+      sendDoneSpiReserved();
+    else
+      call SpiResource.request(); /* will continue in sendDoneSpiReserved() */
+  }
+
+  void sendDoneSpiReserved()
+  {
+    /* transmission completed, we're owning the Spi, Rx logic is disabled */
+    m_state_t state = m_state;
+    ieee154_txframe_t *frame = m_txframe;
+    ieee154_csma_t *csma = m_csma;
+
+    call CC2420Power.rfOff();
+    call CC2420Power.flushRxFifo();
+    call CC2420Tx.unlockChipSpi();
+    call TxControl.stop();
+    call SpiResource.release();
+    m_state = S_RADIO_OFF;
+
+    if (state == S_TX_ACTIVE_NO_CSMA)
+      txDoneRadioTx(frame, m_txResult); 
+    else if (state == S_TX_ACTIVE_UNSLOTTED_CSMA)
+      txDoneUnslottedCsma(frame, csma, m_ackFramePending, m_txResult);
+    else if (state == S_TX_ACTIVE_SLOTTED_CSMA)
+      txDoneSlottedCsmaCa(frame, csma, m_ackFramePending, m_remainingBackoff, m_txResult);
+    else
+      ASSERT(0);
+  }
+
+  async event void CC2420Tx.transmissionStarted( ieee154_txframe_t *frame )
+  {
+    uint8_t frameType = frame->header->mhr[0] & FC1_FRAMETYPE_MASK;
+    uint8_t token = frame->headerLen;
+    signal Timestamp.transmissionStarted(frameType, frame->handle, frame->payload, token);
+  }
+
+  async event void CC2420Tx.transmittedSFD( uint32_t time, ieee154_txframe_t *frame )
+  {
+    uint8_t frameType = frame->header->mhr[0] & FC1_FRAMETYPE_MASK;
+    uint8_t token = frame->headerLen;
+    signal Timestamp.transmittedSFD( time, frameType, frame->handle, frame->payload, token );
+  }
+
+  async command void Timestamp.modifyMACPayload( uint8_t token, uint8_t offset, uint8_t* buf, uint8_t len )
+  {
+    if (m_state == S_TX_ACTIVE_NO_CSMA || 
+        m_state == S_TX_ACTIVE_SLOTTED_CSMA ||
+        m_state == S_LOAD_TXFIFO_UNSLOTTED )
+      call CC2420Tx.modify( offset+1+token, buf, len );
+  }
+
+  async event void ReliableWait.waitBackoffDone()
+  {
+    switch (m_state)
+    {
+      case S_TX_BACKOFF_SLOTTED: waitBackoffDoneSlottedCsma(); break;
+      case S_TX_BACKOFF_UNSLOTTED: waitBackoffDoneUnslottedCsma(); break;
+      default: ASSERT(0); break;
+    }
+  }
+
+  /* ----------------------- RxControl ----------------------- */
+
+  async event void RxControl.stopDone(error_t error)
+  {
+    post rxControlStopDoneTask();
+  }
+
+  task void rxControlStopDoneTask()
+  {
+    switch (m_state)
+    {
+      case S_OFF_PENDING:              offStopRxDone(); break;
+      case S_TX_ACTIVE_NO_CSMA:        /* fall through */
+      case S_TX_ACTIVE_UNSLOTTED_CSMA: /* fall through */
+      case S_TX_ACTIVE_SLOTTED_CSMA:   txDoneRxControlStopped(); break;
+      default:                         ASSERT(0); break;
+    }
+  }
+
+  /* ----------------------- SPI Bus Arbitration ----------------------- */
+
+  event void SpiResource.granted() 
+  {
+    switch (m_state)
+    {
+      case S_STARTING:                 startSpiReserved(); break;
+      case S_ED:                       edReserved(); break;
+      case S_RESERVE_RX_SPI:           rxSpiReserved(); break;
+      case S_LOAD_TXFIFO_NO_CSMA:      /* fall through */
+      case S_LOAD_TXFIFO_UNSLOTTED:    /* fall through */
+      case S_LOAD_TXFIFO_SLOTTED:      txSpiReserved(); break;
+      case S_TX_ACTIVE_NO_CSMA:        /* fall through */
+      case S_TX_ACTIVE_UNSLOTTED_CSMA: /* fall through */
+      case S_TX_ACTIVE_SLOTTED_CSMA:   sendDoneSpiReserved(); break;
+      case S_STOPPING:                 stopSpiReserved(); break;
+      case S_OFF_PENDING:              offSpiReserved(); break;
+      default:                         ASSERT(0); break;
+    }
+  }
+
+  async command bool CCA.getNow()
+  {
+    return call CC2420Tx.cca();
+  }
+
+  default event void SplitControl.startDone(error_t error) {}
+  default event void SplitControl.stopDone(error_t error) {}
+  
+  default async event void UnslottedCsmaCa.transmitDone(ieee154_txframe_t *frame, 
+      ieee154_csma_t *csma, bool ackPendingFlag, error_t result) {}
+  default async event void SlottedCsmaCa.transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, 
+      bool ackPendingFlag,  uint16_t remainingBackoff, error_t result) {}
+
+  default async event void Timestamp.transmissionStarted(uint8_t frameType, uint8_t msduHandle, uint8_t *msdu, uint8_t token) {}
+  default async event void Timestamp.transmittedSFD(uint32_t time, uint8_t frameType, uint8_t msduHandle, uint8_t *msdu, uint8_t token) {}
+}
+
diff --git a/tos/chips/cc2420_tkn154/CC2420TransmitP.nc b/tos/chips/cc2420_tkn154/CC2420TransmitP.nc
new file mode 100644
index 00000000..98e960c7
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CC2420TransmitP.nc
@@ -0,0 +1,425 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Jung Il Choi Initial SACK implementation
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ *
+ * IMPORTANT: this module does not use the SPI Resource interface,
+ * instead the caller must take care of the resource arbitration
+ * (i.e. the caller must own the resource before calling commands
+ * like CC2420Tx.loadTXFIFO())
+ * Note: on TelosB there seems to be a problem if BackoffAlarm
+ * is virtualized - i.e. BackoffAlarm should be a dedicated Alarm.
+ *
+ * @version $Revision: 1.4 $ $Date: 2009-03-04 18:31:11 $
+ */
+
+#include "CC2420.h"
+#include "crc.h"
+#include "message.h"
+
+module CC2420TransmitP {
+
+  provides interface Init;
+  provides interface AsyncStdControl;
+  provides interface CC2420Tx;
+  uses interface Alarm<T62500hz,uint32_t> as BackoffAlarm;
+  uses interface GpioCapture as CaptureSFD;
+  uses interface GeneralIO as CCA;
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as SFD;
+  uses interface GeneralIO as FIFO;
+  uses interface GeneralIO as FIFOP;
+
+  uses interface ChipSpiResource;
+  uses interface CC2420Fifo as TXFIFO;
+  uses interface CC2420Ram as TXFIFO_RAM;
+  uses interface CC2420Register as TXCTRL;
+  uses interface CC2420Strobe as SNOP;
+  uses interface CC2420Strobe as STXON;
+  uses interface CC2420Strobe as STXONCCA;
+  uses interface CC2420Strobe as SFLUSHTX;
+  uses interface CC2420Strobe as SRXON;
+  uses interface CC2420Strobe as SRFOFF;
+  uses interface CC2420Strobe as SFLUSHRX;
+  uses interface CC2420Strobe as SACKPEND;
+  uses interface CC2420Register as MDMCTRL1;
+  uses interface CaptureTime;
+
+  uses interface CC2420Receive;
+  uses interface Leds;
+}
+
+implementation {
+
+  typedef enum {
+    S_STOPPED,
+    S_STARTED,
+    S_LOAD,
+    S_READY_TX,
+    S_SFD,
+    S_EFD,
+    S_ACK_WAIT,
+  } cc2420_transmit_state_t;
+
+  // This specifies how many symbols the stack should wait after a
+  // TXACTIVE to receive an SFD interrupt before assuming something is
+  // wrong and aborting the send. There seems to be a condition
+  // on the micaZ where the SFD interrupt is never handled.
+  enum {
+    CC2420_ABORT_PERIOD = 320*3,
+  };
+  
+  norace ieee154_txframe_t *m_frame;
+  
+  cc2420_transmit_state_t m_state = S_STOPPED;
+  
+  bool m_receiving = FALSE;
+  
+  uint16_t m_prev_time;
+  
+  /** Byte reception/transmission indicator */
+  bool sfdHigh;
+  
+  /** Let the CC2420 driver keep a lock on the SPI while waiting for an ack */
+  norace bool abortSpiRelease;
+
+  /***************** Prototypes ****************/
+  void signalDone( bool ackFramePending, error_t err );
+  
+  /***************** Init Commands *****************/
+  command error_t Init.init() {
+    call CCA.makeInput();
+    call CSN.makeOutput();
+    call SFD.makeInput();
+    return SUCCESS;
+  }
+
+  /***************** AsyncStdControl Commands ****************/
+  async command error_t AsyncStdControl.start() {
+    atomic {
+      if (m_state == S_STARTED)
+        return EALREADY;
+      call CaptureSFD.captureRisingEdge();
+      m_state = S_STARTED;
+      m_receiving = FALSE;
+    }
+    return SUCCESS;
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    atomic {
+      m_state = S_STOPPED;
+      call BackoffAlarm.stop();
+      call CaptureSFD.disable();
+      call CSN.set();
+    }
+    return SUCCESS;
+  }
+
+
+  /**************** Load/Send Commands ****************/
+
+  async command error_t CC2420Tx.loadTXFIFO(ieee154_txframe_t *data) 
+  {
+    atomic {
+      if ( m_state != S_STARTED )
+        return FAIL;
+      m_state = S_LOAD;
+      m_frame = data;
+      m_frame->header->length = m_frame->headerLen + m_frame->payloadLen + 2; // 2 for CRC
+      call CSN.set();
+      call CSN.clr();
+      call SFLUSHTX.strobe(); // flush out anything that was in TXFIFO
+      call CSN.set();
+      call CSN.clr();
+      call TXFIFO.write( &(m_frame->header->length), 1 );
+    }
+    return SUCCESS;
+  }   
+
+  async event void TXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len, error_t error) 
+  {
+    atomic {
+      call CSN.set();
+      if (tx_buf == &(m_frame->header->length)){
+        call CSN.clr();
+        call TXFIFO.write( m_frame->header->mhr, m_frame->headerLen );
+        return;
+      } else if (tx_buf == m_frame->header->mhr) {
+        call CSN.clr();
+        call TXFIFO.write( m_frame->payload, m_frame->payloadLen );
+        return;
+      }
+    }
+    m_state = S_READY_TX;
+    signal CC2420Tx.loadTXFIFODone(m_frame, error);
+  }
+
+  async command error_t CC2420Tx.send(bool cca)
+  {
+    cc2420_status_t status;
+    bool congestion = TRUE;
+
+    atomic {
+      if (m_state != S_READY_TX)
+        return EOFF;
+      call CSN.set();
+      call CSN.clr();
+
+      // DEBUG
+      //P2OUT |= 0x40;      // P2.6 high
+      status = cca ? call STXONCCA.strobe() : call STXON.strobe();
+      //status = call STXON.strobe();
+      //U0TXBUF = 0x04; // strobe STXON
+      //while (!(IFG1 & URXIFG0));
+      //status = U0RXBUF;
+      //call CSN.set();
+
+      if ( !( status & CC2420_STATUS_TX_ACTIVE ) ) {
+        status = call SNOP.strobe();
+        if ( status & CC2420_STATUS_TX_ACTIVE ) {
+          congestion = FALSE;
+        }
+      }
+      
+      call CSN.set();
+      // DEBUG: on telosb SFD is connected to Pin P4.1
+      //if (!congestion) {while (!(P4IN & 0x02)) ;  P6OUT &= ~0x80;}
+
+      if (congestion){
+        return FAIL; // channel busy
+      } else {
+        m_state = S_SFD;
+        m_frame->metadata->timestamp = IEEE154_INVALID_TIMESTAMP; // pessimistic
+        call BackoffAlarm.start(CC2420_ABORT_PERIOD); 
+        return SUCCESS;
+      }
+    }
+  }
+    // this method converts a 16-bit timestamp into a 32-bit one
+  inline uint32_t getTime32(uint16_t captured_time)
+  {
+    uint32_t now = call BackoffAlarm.getNow();
+
+    // the captured_time is always in the past
+    // We assume that capture_time from the 32 KHz quartz, in
+    // order to transform it to symbols we multiply by 2
+    return now - (uint16_t)(now - captured_time * 2);
+  }
+  
+  /**
+   * The CaptureSFD event is actually an interrupt from the capture pin
+   * which is connected to timing circuitry and timer modules.  This
+   * type of interrupt allows us to see what time (being some relative value)
+   * the event occurred, and lets us accurately timestamp our packets.  This
+   * allows higher levels in our system to synchronize with other nodes.
+   *
+   * Because the SFD events can occur so quickly, and the interrupts go
+   * in both directions, we set up the interrupt but check the SFD pin to
+   * determine if that interrupt condition has already been met - meaning,
+   * we should fall through and continue executing code where that interrupt
+   * would have picked up and executed had our microcontroller been fast enough.
+   */
+  async event void CaptureSFD.captured( uint16_t time ) {
+    uint32_t time32;
+    uint8_t sfd_state = 0;
+    atomic {
+      // Our timestamp represents time of first bit (chip) of PPDU on the channel
+      // (not SFD!), so we apply an offset: -10 for 5 bytes (preamble+SFD)
+      time32 = getTime32(time) - 10;
+      switch( m_state ) {
+
+        case S_SFD:
+          m_state = S_EFD;
+          sfdHigh = TRUE;
+          // in case we got stuck in the receive SFD interrupts, we can reset
+          // the state here since we know that we are not receiving anymore
+          m_receiving = FALSE;
+          call CaptureSFD.captureFallingEdge();
+          m_frame->metadata->timestamp = time32; 
+
+          call BackoffAlarm.stop();
+
+          if ( call SFD.get() ) {
+            break;
+          }
+          /** Fall Through because the next interrupt was already received */
+
+        case S_EFD:
+          sfdHigh = FALSE;
+          call CaptureSFD.captureRisingEdge();
+
+          signal CC2420Tx.transmissionStarted(m_frame);
+          if ( (m_frame->header->mhr)[0] & ( 1 << IEEE154_FCF_ACK_REQ ) ) {
+            // wait for the ACK
+            m_state = S_ACK_WAIT;
+            // we need to have *completely* received the ACK, 32+22 symbols
+            // should theroretically be enough, but there can be delays in 
+            // servicing the FIFOP interrupt, so we use 100 symbols here
+            call BackoffAlarm.start( 100 ); 
+          } else {
+            signalDone(FALSE, SUCCESS);
+          }
+
+          if ( !call SFD.get() ) {
+            break;
+          }
+          /** Fall Through because the next interrupt was already received */
+
+        default:
+          /* this is the SFD for received messages */
+          if ( !m_receiving && sfdHigh == FALSE ) {
+            sfdHigh = TRUE;
+            call CaptureSFD.captureFallingEdge();
+            // safe the SFD pin status for later use
+            sfd_state = call SFD.get();
+
+            call CC2420Receive.sfd(time32);
+            m_receiving = TRUE;
+            m_prev_time = time;
+            if ( call SFD.get() ) {
+              // wait for the next interrupt before moving on
+              return;
+            }
+          }
+
+          if ( sfdHigh == TRUE ) {
+            sfdHigh = FALSE;
+            call CaptureSFD.captureRisingEdge();
+            m_receiving = FALSE;
+            /* if sfd_state is 1, then we fell through, but at the time of
+             * saving the time stamp the SFD was still high. Thus, the timestamp
+             * is valid.
+             * if the sfd_state is 0, then either we fell through and SFD
+             * was low while we safed the time stamp, or we didn't fall through.
+             * Thus, we check for the time between the two interrupts.
+             * FIXME: Why 10 tics? Seems like some magic number...
+              */
+            if ((sfd_state == 0) && (time - m_prev_time < 10) )
+              call CC2420Receive.sfd_dropped();
+            break;
+          }
+      }
+    }
+  }
+
+  async command bool CC2420Tx.cca()
+  {
+    return call CCA.get();
+  }
+
+  async command error_t CC2420Tx.modify( uint8_t offset, uint8_t* buf, uint8_t len ) 
+  {
+    call CSN.set();
+    call CSN.clr();
+    call TXFIFO_RAM.write( offset, buf, len );
+    call CSN.set();
+    return SUCCESS;
+  }
+  
+  async command void CC2420Tx.lockChipSpi()
+  {
+    abortSpiRelease = TRUE;
+  }
+
+  async command void CC2420Tx.unlockChipSpi()
+  {
+    abortSpiRelease = FALSE;
+  }
+
+  async event void ChipSpiResource.releasing() {
+    if(abortSpiRelease) {
+      call ChipSpiResource.abortRelease();
+    }
+  }
+  
+  
+  /***************** CC2420Receive Events ****************/
+  /**
+   * If the packet we just received was an ack that we were expecting,
+   * our send is complete.
+   */
+  async event void CC2420Receive.receive(  uint8_t type, message_t *ackFrame ){
+    atomic {
+      if ( type == IEEE154_TYPE_ACK ) {
+        if (  m_state == S_ACK_WAIT && 
+            m_frame->header->mhr[2] == ((ieee154_header_t*) ackFrame->header)->mhr[2] ) { // compare seqno
+          call BackoffAlarm.stop();
+          signalDone(( ((ieee154_header_t*) ackFrame->header)->mhr[0] & 0x10) ? TRUE: FALSE, SUCCESS);
+        }
+      }
+    }
+  }
+  
+  async event void BackoffAlarm.fired() {
+    atomic {
+      switch( m_state ) {
+
+        case S_SFD:
+        case S_EFD: // fall through
+          // We didn't receive an SFD interrupt within CC2420_ABORT_PERIOD
+          // jiffies. Assume something is wrong.
+          atomic {
+            call CSN.set();
+            call CSN.clr();
+            call SFLUSHTX.strobe();
+            call CSN.set();
+          }
+          signalDone( FALSE, ERETRY );
+          break;
+
+        case S_ACK_WAIT:
+          /*        signalDone( SUCCESS );*/
+          signalDone( FALSE, ENOACK );
+          break;
+
+
+        default:
+          break;
+      }
+    }
+  }
+
+  void signalDone( bool ackFramePending, error_t err ) {
+    atomic m_state = S_STARTED;
+    signal CC2420Tx.sendDone( m_frame, ackFramePending, err );
+    call ChipSpiResource.attemptRelease();
+  }
+
+  async event void TXFIFO.readDone( uint8_t* tx_buf, uint8_t tx_len, 
+      error_t error ) {
+  }
+}
+
diff --git a/tos/chips/cc2420_tkn154/CC2420Tx.nc b/tos/chips/cc2420_tkn154/CC2420Tx.nc
new file mode 100644
index 00000000..48b2b07a
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CC2420Tx.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:12 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154_MAC.h"
+#include "TKN154_PHY.h"
+interface CC2420Tx {
+
+  async command error_t loadTXFIFO(ieee154_txframe_t *data);
+  async event void loadTXFIFODone(ieee154_txframe_t *data, error_t error );
+
+  async command error_t send(bool cca);
+  async event void sendDone(ieee154_txframe_t *frame, bool ackPendingFlag, error_t error);
+
+  async command bool cca();
+  async command void lockChipSpi();
+  async command void unlockChipSpi();  
+
+  async event void transmissionStarted ( ieee154_txframe_t *data );
+  // timestamp denotes first bit of preamble (not SFD byte)!
+  async event void transmittedSFD(uint32_t timestamp, ieee154_txframe_t *data);
+
+  /**
+   * Modify the contents of a packet. This command can only be used
+   * when an SFD capture event for the sending packet is signalled.
+   *
+   * @param offset in the message to start modifying.
+   * @param buf to data to write
+   * @param len of bytes to write
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */  
+  async command error_t modify( uint8_t offset, uint8_t* buf, uint8_t len );
+
+}
+
diff --git a/tos/chips/cc2420_tkn154/CaptureTime.nc b/tos/chips/cc2420_tkn154/CaptureTime.nc
new file mode 100644
index 00000000..ba112502
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/CaptureTime.nc
@@ -0,0 +1,57 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:00 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+interface CaptureTime
+{
+  /**
+   * Convert a capture time (+ symbol offset) to local time.
+   *
+   * @param   time  capture time
+   * @param   localTime capture time converted to local time + offset symbols
+   * @param   offset time in symbols (16 us) to add to capture time
+   * @return  SUCCESS if conversion was made successfully, FAIL otherwise
+   */
+  async command error_t convert(uint16_t time, uint32_t *localTime, int16_t offset);
+
+  /**
+   * Tells whether the timestamp is valid. On the CC2420 an SFD transition
+   * does not necessarily mean that the packet is put in the RXFIFO.
+   * This command should return FALSE iff the time between the rising SFD
+   * and the falling SFD is too short for the smallest possible frame, i.e.
+   * ACK frame (see CC2420 datasheet for details on SFD timing).
+   *
+   * @param  risingSFDTime capture time of rising SFD
+   * @param  fallingSFDTime capture time of falling SFD
+   * @return FALSE if time offset is too small for a valid packet
+   */
+  async command bool isValidTimestamp(uint16_t risingSFDTime, uint16_t fallingSFDTime);
+}
diff --git a/tos/chips/cc2420_tkn154/ReliableWait.nc b/tos/chips/cc2420_tkn154/ReliableWait.nc
new file mode 100644
index 00000000..1ab086bc
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/ReliableWait.nc
@@ -0,0 +1,42 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:12 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+interface ReliableWait
+{
+  async command void waitRx(uint32_t t0, uint32_t dt);
+  async event void waitRxDone();
+  async command void waitTx(uint32_t t0, uint32_t dt);
+  async event void waitTxDone();
+  async command void waitBackoff(uint32_t dt);
+  async event void waitBackoffDone();
+  async command bool ccaOnBackoffBoundary(uint32_t slot0);
+}
diff --git a/tos/chips/cc2420_tkn154/TKN154_PHY.h b/tos/chips/cc2420_tkn154/TKN154_PHY.h
new file mode 100644
index 00000000..d5b93ece
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/TKN154_PHY.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-09-08 09:04:42 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+// PHY constants for the CC2420
+#ifndef __TKN154_PHY_H
+#define __TKN154_PHY_H
+
+#include "TKN154_MAC.h"
+
+enum {
+
+  IEEE154_SUPPORTED_CHANNELS  = 0x07FFF800,
+  IEEE154_SYMBOLS_PER_OCTET   = 2,
+  IEEE154_TXPOWER_TOLERANCE   = 0x80,
+  IEEE154_SHR_DURATION        = (5 * IEEE154_SYMBOLS_PER_OCTET),
+  IEEE154_MAX_FRAME_DURATION  = (IEEE154_SHR_DURATION + ((IEEE154_aMaxPHYPacketSize + 1) * IEEE154_SYMBOLS_PER_OCTET)),
+  IEEE154_PREAMBLE_LENGTH     = (4*IEEE154_SYMBOLS_PER_OCTET),
+  IEEE154_SYNC_SYMBOL_OFFSET  = (1 * IEEE154_SYMBOLS_PER_OCTET),
+  IEEE154_MIN_LIFS_PERIOD     = 40,
+  IEEE154_MIN_SIFS_PERIOD     = 12,
+  IEEE154_ACK_WAIT_DURATION   = (20 + 12 + IEEE154_SHR_DURATION + 6 * IEEE154_SYMBOLS_PER_OCTET),
+  IEEE154_TIMESTAMP_SUPPORTED = TRUE,
+};
+
+#include "Timer62500hz.h"
+#define TSymbolIEEE802154 T62500hz
+
+#endif
+
diff --git a/tos/chips/cc2420_tkn154/Timestamp.nc b/tos/chips/cc2420_tkn154/Timestamp.nc
new file mode 100644
index 00000000..68899b8b
--- /dev/null
+++ b/tos/chips/cc2420_tkn154/Timestamp.nc
@@ -0,0 +1,84 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $ $Date: 2009-03-04 18:31:12 $ 
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "IEEE802154.h"
+interface Timestamp
+{
+  /**
+   * The transmission of a packet has started (the PHY preamble is being 
+   * transmitted).
+   * Within the event handler the <code>modifyPayload()<\code> command can 
+   * be called to modify the contents of the frame's payload.
+   *
+   * @param frameType     the type of frame (BEACON=0, DATA=1, ACK=2, COMMAND=3)
+   * @param msduHandle    for DATA frames the handle associated with the MSDU,
+   *                      otherwise undefined
+   * @param payload       the MAC payload (e.g. in a DATA frame this is the msdu,
+   *                      in a BEACON frame this is the first byte of the SFSpec)
+   * @param token         a token to be used as parameter for the
+   *                      <code>modifyPayload()<\code> command
+   */
+  async event void transmissionStarted(uint8_t frameType, uint8_t msduHandle, uint8_t *payload, uint8_t token);
+
+  /**
+   * The Start-of-Frame Delimiter of an outgoing frame has been transmitted.
+   * Within the event handler the <code>modifyPayload()<\code> command may
+   * be called to modify the contents of the frame's payload.
+   *
+   * @param time          the time when the SFD was transmitted, expressed
+   *                      in 15.4 symbols as determined by a call to a T62500hz
+   *                      Alarm/Timer.getNow()
+   * @param frameType     the type of frame (BEACON=0, DATA=1, ACK=2, COMMAND=3)
+   * @param msduHandle    for DATA frames the handle associated with the MSDU,
+   *                      otherwise undefined
+   * @param payload       the MAC payload (e.g. in a DATA frame this is the msdu,
+   *                      in a BEACON frame this is the first byte of the SFSpec)
+   * @param token         a token to be used as parameter for the
+   *                      <code>modifyPayload()<\code> command
+   */
+  async event void transmittedSFD(uint32_t time, uint8_t frameType, uint8_t msduHandle, uint8_t *payload, uint8_t token);
+
+  /**
+   * Modify (overwrite) the contents of the MAC payload. This command must only
+   * be called in an <code>transmittedSFD()<\code> eventhandler, which should
+   * return fast. Note: the smaller the offset, the faster the
+   * <code>transmittedSFD()<\code> eventhandler must be finished (offset of
+   * zero might not work), because you are modifying a packet, whose first 
+   * bytes have already been transmitted.
+   *
+   * @param token   the token signalled by <code>transmittedSFD()<\code>
+   * @param offset  the offset in the frame's payload to start modifying; 
+   *                an offset of zero means the first byte of the MAC payload field
+   * @param buf     data to write
+   * @param len     number of bytes to write
+   */
+  async command void modifyMACPayload(uint8_t token, uint8_t offset, uint8_t* buf, uint8_t len);
+}
diff --git a/tos/chips/cc2420x/CC2420XActiveMessageC.nc b/tos/chips/cc2420x/CC2420XActiveMessageC.nc
new file mode 100644
index 00000000..be1b1499
--- /dev/null
+++ b/tos/chips/cc2420x/CC2420XActiveMessageC.nc
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai, Miklos Maroti
+ */
+ 
+#include <RadioConfig.h>
+
+#ifdef IEEE154FRAMES_ENABLED
+#error "You cannot use CC2420XActiveMessageC with IEEE154FRAMES_ENABLED defined"
+#endif
+
+configuration CC2420XActiveMessageC
+{
+	provides 
+	{
+		interface SplitControl;
+
+		interface AMSend[am_id_t id];
+		interface Receive[am_id_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface SendNotifier[am_id_t id];
+
+		// for TOSThreads
+		interface Receive as ReceiveDefault[am_id_t id];
+		interface Receive as SnoopDefault[am_id_t id];
+
+		interface Packet;
+		interface AMPacket;
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+#ifdef PACKET_LINK
+		interface PacketLink;
+#endif
+
+		interface RadioChannel;
+
+		interface PacketField<uint8_t> as PacketLinkQuality;
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+
+		interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+	}
+
+	uses
+	{
+		interface PacketTimeStamp<T32khz, uint32_t> as UnimplementedPacketTimeStamp32khz;
+	}
+}
+
+implementation
+{
+	components CC2420XRadioC as RadioC;
+
+	SplitControl = RadioC;
+
+	AMSend = RadioC;
+	Receive = RadioC.Receive;
+	Snoop = RadioC.Snoop;
+	SendNotifier = RadioC;
+
+	ReceiveDefault = RadioC.ReceiveDefault;
+	SnoopDefault = RadioC.SnoopDefault;
+
+	Packet = RadioC.PacketForActiveMessage;
+	AMPacket = RadioC;
+
+	PacketAcknowledgements = RadioC;
+	LowPowerListening = RadioC;
+#ifdef PACKET_LINK
+	PacketLink = RadioC;
+#endif
+
+	RadioChannel = RadioC;
+
+	PacketLinkQuality = RadioC.PacketLinkQuality;
+	PacketTransmitPower = RadioC.PacketTransmitPower;
+	PacketRSSI = RadioC.PacketRSSI;
+
+	LocalTimeRadio = RadioC;
+	PacketTimeStampMilli = RadioC;
+	PacketTimeStampRadio = RadioC;
+
+	PacketTimeStamp32khz = UnimplementedPacketTimeStamp32khz;
+}
diff --git a/tos/chips/cc2420x/CC2420XDriverConfig.nc b/tos/chips/cc2420x/CC2420XDriverConfig.nc
new file mode 100644
index 00000000..f6d8164c
--- /dev/null
+++ b/tos/chips/cc2420x/CC2420XDriverConfig.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai, Miklos Maroti
+ */
+
+interface CC2420XDriverConfig
+{
+	/**
+	 * Returns the length of a dummy header to align the payload properly.
+	 */
+	async command uint8_t headerLength(message_t* msg);
+
+	/**
+	 * Returns the maximum length of the PHY payload including the 
+	 * length field but not counting the FCF field.
+	 */
+	async command uint8_t maxPayloadLength();
+
+	/**
+	 * Returns the length of a dummy metadata section to align the
+	 * metadata section properly.
+	 */
+	async command uint8_t metadataLength(message_t* msg);
+
+	/**
+	 * Gets the number of bytes we should read before the RadioReceive.header
+	 * event is fired. If the length of the packet is less than this amount, 
+	 * then that event is fired earlier. The header length must be at least one.
+	 */
+	async command uint8_t headerPreloadLength();
+
+	/**
+	 * Returns TRUE if before sending this message we should make sure that
+	 * the channel is clear via a very basic (and quick) RSSI check.
+	 */
+	async command bool requiresRssiCca(message_t* msg);
+}
diff --git a/tos/chips/cc2420x/CC2420XDriverLayer.h b/tos/chips/cc2420x/CC2420XDriverLayer.h
new file mode 100644
index 00000000..c433b564
--- /dev/null
+++ b/tos/chips/cc2420x/CC2420XDriverLayer.h
@@ -0,0 +1,227 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai
+ */
+ 
+#ifndef __CC2420XDRIVERLAYER_H__
+#define __CC2420XDRIVERLAYER_H__
+
+
+typedef nx_struct cc2420x_header_t
+{
+	nxle_uint8_t length;
+} cc2420x_header_t;
+
+typedef struct cc2420x_metadata_t
+{
+	uint8_t lqi;
+	union
+	{
+		uint8_t power;
+		uint8_t rssi;
+	}; 
+} cc2420x_metadata_t; 
+
+enum cc2420X_timing_enums {
+	CC2420X_SYMBOL_TIME = 16, // 16us	
+	IDLE_2_RX_ON_TIME = 12 * CC2420X_SYMBOL_TIME, 
+	PD_2_IDLE_TIME = 860, // .86ms
+};
+
+enum cc2420X_reg_access_enums {
+	CC2420X_CMD_REGISTER_MASK = 0x3f,
+	CC2420X_CMD_REGISTER_READ = 0x40,
+	CC2420X_CMD_REGISTER_WRITE = 0x00,
+	CC2420X_CMD_TXRAM_WRITE	= 0x80,
+};
+
+typedef union cc2420X_status {
+	uint16_t value;
+	struct {
+	  unsigned  reserved0:1;
+	  unsigned  rssi_valid:1;
+	  unsigned  lock:1;
+	  unsigned  tx_active:1;
+	  
+	  unsigned  enc_busy:1;
+	  unsigned  tx_underflow:1;
+	  unsigned  xosc16m_stable:1;
+	  unsigned  reserved7:1;
+	};
+} cc2420X_status_t;
+
+typedef union cc2420X_iocfg0 {
+	uint16_t value;
+	struct {
+	  unsigned  fifop_thr:7;
+	  unsigned  cca_polarity:1;
+	  unsigned  sfd_polarity:1;
+	  unsigned  fifop_polarity:1;
+	  unsigned  fifo_polarity:1;
+	  unsigned  bcn_accept:1;
+	  unsigned  reserved:4; // write as 0
+	} f;
+} cc2420X_iocfg0_t;
+
+// TODO: make sure that we avoid wasting RAM
+static const cc2420X_iocfg0_t cc2420X_iocfg0_default = {.f.fifop_thr = 64, .f.cca_polarity = 0, .f.sfd_polarity = 0, .f.fifop_polarity = 0, .f.fifo_polarity = 0, .f.bcn_accept = 0, .f.reserved = 0};
+
+typedef union cc2420X_iocfg1 {
+	uint16_t value;
+	struct {
+	  unsigned  ccamux:5;
+	  unsigned  sfdmux:5;
+	  unsigned  hssd_src:3;
+	  unsigned  reserved:3; // write as 0
+	} f;
+} cc2420X_iocfg1_t;
+
+static const cc2420X_iocfg1_t cc2420X_iocfg1_default = {.value = 0};
+
+typedef union cc2420X_fsctrl {
+	uint16_t value;
+	struct {
+	  unsigned  freq:10;
+	  unsigned  lock_status:1;
+	  unsigned  lock_length:1;
+	  unsigned  cal_running:1;
+	  unsigned  cal_done:1;
+	  unsigned  lock_thr:2;
+	} f;
+} cc2420X_fsctrl_t;
+
+static const cc2420X_fsctrl_t cc2420X_fsctrl_default = {.f.lock_thr = 1, .f.freq = 357, .f.lock_status = 0, .f.lock_length = 0, .f.cal_running = 0, .f.cal_done = 0};
+
+typedef union cc2420X_mdmctrl0 {
+	uint16_t value;
+	struct {
+	  unsigned  preamble_length:4;
+	  unsigned  autoack:1;
+	  unsigned  autocrc:1;
+	  unsigned  cca_mode:2;
+	  unsigned  cca_hyst:3;
+	  unsigned  adr_decode:1;
+	  unsigned  pan_coordinator:1;
+	  unsigned  reserved_frame_mode:1;
+	  unsigned  reserved:2;
+	} f;
+} cc2420X_mdmctrl0_t;
+
+static const cc2420X_mdmctrl0_t cc2420X_mdmctrl0_default = {.f.preamble_length = 2, .f.autocrc = 1, .f.cca_mode = 3, .f.cca_hyst = 2, .f.adr_decode = 1};
+
+typedef union cc2420X_txctrl {
+	uint16_t value;
+	struct {
+	  unsigned  pa_level:5;
+	  unsigned reserved:1;
+	  unsigned pa_current:3;
+	  unsigned txmix_current:2;
+	  unsigned txmix_caparray:2;
+  	  unsigned tx_turnaround:1;
+  	  unsigned txmixbuf_cur:2;
+	} f;
+} cc2420X_txctrl_t;
+
+static const cc2420X_txctrl_t cc2420X_txctrl_default = {.f.pa_level = 31, .f.reserved = 1, .f.pa_current = 3, .f.tx_turnaround = 1, .f.txmixbuf_cur = 2};
+
+
+#ifndef CC2420X_DEF_CHANNEL
+#define CC2420X_DEF_CHANNEL 11
+#endif
+
+#ifndef CC2420X_DEF_RFPOWER
+#define CC2420X_DEF_RFPOWER 31
+#endif
+
+enum {
+	CC2420X_TX_PWR_MASK = 0x1f,
+	CC2420X_CHANNEL_MASK = 0x1f,
+};
+
+enum cc2420X_config_reg_enums {
+  CC2420X_SNOP = 0x00,
+  CC2420X_SXOSCON = 0x01,
+  CC2420X_STXCAL = 0x02,
+  CC2420X_SRXON = 0x03,
+  CC2420X_STXON = 0x04,
+  CC2420X_STXONCCA = 0x05,
+  CC2420X_SRFOFF = 0x06,
+  CC2420X_SXOSCOFF = 0x07,
+  CC2420X_SFLUSHRX = 0x08,
+  CC2420X_SFLUSHTX = 0x09,
+  CC2420X_SACK = 0x0a,
+  CC2420X_SACKPEND = 0x0b,
+  CC2420X_SRXDEC = 0x0c,
+  CC2420X_STXENC = 0x0d,
+  CC2420X_SAES = 0x0e,
+  CC2420X_MAIN = 0x10,
+  CC2420X_MDMCTRL0 = 0x11,
+  CC2420X_MDMCTRL1 = 0x12,
+  CC2420X_RSSI = 0x13,
+  CC2420X_SYNCWORD = 0x14,
+  CC2420X_TXCTRL = 0x15,
+  CC2420X_RXCTRL0 = 0x16,
+  CC2420X_RXCTRL1 = 0x17,
+  CC2420X_FSCTRL = 0x18,
+  CC2420X_SECCTRL0 = 0x19,
+  CC2420X_SECCTRL1 = 0x1a,
+  CC2420X_BATTMON = 0x1b,
+  CC2420X_IOCFG0 = 0x1c,
+  CC2420X_IOCFG1 = 0x1d,
+  CC2420X_MANFIDL = 0x1e,
+  CC2420X_MANFIDH = 0x1f,
+  CC2420X_FSMTC = 0x20,
+  CC2420X_MANAND = 0x21,
+  CC2420X_MANOR = 0x22,
+  CC2420X_AGCCTRL = 0x23,
+  CC2420X_AGCTST0 = 0x24,
+  CC2420X_AGCTST1 = 0x25,
+  CC2420X_AGCTST2 = 0x26,
+  CC2420X_FSTST0 = 0x27,
+  CC2420X_FSTST1 = 0x28,
+  CC2420X_FSTST2 = 0x29,
+  CC2420X_FSTST3 = 0x2a,
+  CC2420X_RXBPFTST = 0x2b,
+  CC2420X_FSMSTATE = 0x2c,
+  CC2420X_ADCTST = 0x2d,
+  CC2420X_DACTST = 0x2e,
+  CC2420X_TOPTST = 0x2f,
+  CC2420X_TXFIFO = 0x3e,
+  CC2420X_RXFIFO = 0x3f,
+};
+
+enum cc2420X_ram_addr_enums {
+  CC2420X_RAM_TXFIFO = 0x000,
+  CC2420X_RAM_TXFIFO_END = 0x7f,  
+  CC2420X_RAM_RXFIFO = 0x080,
+  CC2420X_RAM_KEY0 = 0x100,
+  CC2420X_RAM_RXNONCE = 0x110,
+  CC2420X_RAM_SABUF = 0x120,
+  CC2420X_RAM_KEY1 = 0x130,
+  CC2420X_RAM_TXNONCE = 0x140,
+  CC2420X_RAM_CBCSTATE = 0x150,
+  CC2420X_RAM_IEEEADR = 0x160,
+  CC2420X_RAM_PANID = 0x168,
+  CC2420X_RAM_SHORTADR = 0x16a,
+};
+
+
+#endif // __CC2420XDRIVERLAYER_H__
diff --git a/tos/chips/cc2420x/CC2420XDriverLayerC.nc b/tos/chips/cc2420x/CC2420XDriverLayerC.nc
new file mode 100644
index 00000000..9b2c450e
--- /dev/null
+++ b/tos/chips/cc2420x/CC2420XDriverLayerC.nc
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai, Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+#include <CC2420XDriverLayer.h>
+
+configuration CC2420XDriverLayerC
+{
+	provides
+	{
+		interface RadioState;
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioCCA;
+		interface RadioPacket;
+
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+		interface PacketField<uint8_t> as PacketTimeSyncOffset;
+		interface PacketField<uint8_t> as PacketLinkQuality;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface Alarm<TRadio, tradio_size>;
+	}
+
+	uses
+	{
+		interface CC2420XDriverConfig as Config;
+		interface PacketTimeStamp<TRadio, uint32_t>;
+
+		interface PacketFlag as TransmitPowerFlag;
+		interface PacketFlag as RSSIFlag;
+		interface PacketFlag as TimeSyncFlag;
+		interface RadioAlarm;
+	}
+}
+
+implementation
+{
+	components CC2420XDriverLayerP as DriverLayerP,
+		BusyWaitMicroC,
+		TaskletC,
+		MainC,
+		HplCC2420XC as HplC;
+
+	MainC.SoftwareInit -> DriverLayerP.SoftwareInit;
+	MainC.SoftwareInit -> HplC.Init;
+
+	RadioState = DriverLayerP;
+	RadioSend = DriverLayerP;
+	RadioReceive = DriverLayerP;
+	RadioCCA = DriverLayerP;
+	RadioPacket = DriverLayerP;
+
+	LocalTimeRadio = HplC;
+	Config = DriverLayerP;
+
+	DriverLayerP.VREN -> HplC.VREN;
+	DriverLayerP.CSN -> HplC.CSN;
+	DriverLayerP.CCA -> HplC.CCA;
+	DriverLayerP.RSTN -> HplC.RSTN;
+	DriverLayerP.FIFO -> HplC.FIFO;
+	DriverLayerP.FIFOP -> HplC.FIFOP;
+	DriverLayerP.SFD -> HplC.SFD;
+
+	PacketTransmitPower = DriverLayerP.PacketTransmitPower;
+	TransmitPowerFlag = DriverLayerP.TransmitPowerFlag;
+
+	PacketRSSI = DriverLayerP.PacketRSSI;
+	RSSIFlag = DriverLayerP.RSSIFlag;
+
+	PacketTimeSyncOffset = DriverLayerP.PacketTimeSyncOffset;
+	TimeSyncFlag = DriverLayerP.TimeSyncFlag;
+
+	PacketLinkQuality = DriverLayerP.PacketLinkQuality;
+	PacketTimeStamp = DriverLayerP.PacketTimeStamp;
+
+	Alarm = HplC.Alarm;
+	RadioAlarm = DriverLayerP.RadioAlarm;
+
+	DriverLayerP.SpiResource -> HplC.SpiResource;
+	DriverLayerP.FastSpiByte -> HplC;
+
+	DriverLayerP.SfdCapture -> HplC;
+	DriverLayerP.FifopInterrupt -> HplC;
+
+	DriverLayerP.Tasklet -> TaskletC;
+	DriverLayerP.BusyWait -> BusyWaitMicroC;
+
+	DriverLayerP.LocalTime-> HplC.LocalTimeRadio;
+
+#ifdef RADIO_DEBUG
+	components DiagMsgC;
+	DriverLayerP.DiagMsg -> DiagMsgC;
+#endif
+
+	components LedsC;
+	DriverLayerP.Leds -> LedsC;
+}
diff --git a/tos/chips/cc2420x/CC2420XDriverLayerP.nc b/tos/chips/cc2420x/CC2420XDriverLayerP.nc
new file mode 100644
index 00000000..81faf6dd
--- /dev/null
+++ b/tos/chips/cc2420x/CC2420XDriverLayerP.nc
@@ -0,0 +1,1315 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai
+ */
+
+#include <CC2420XDriverLayer.h>
+#include <Tasklet.h>
+#include <RadioAssert.h>
+#include <TimeSyncMessageLayer.h>
+#include <RadioConfig.h>
+#define spi_atomic
+module CC2420XDriverLayerP
+{
+	provides
+	{
+		interface Init as SoftwareInit @exactlyonce();
+
+		interface RadioState;
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioCCA;
+		interface RadioPacket;
+
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+		interface PacketField<uint8_t> as PacketTimeSyncOffset;
+		interface PacketField<uint8_t> as PacketLinkQuality;
+	}
+
+	uses
+	{
+		interface Resource as SpiResource;
+		interface BusyWait<TMicro, uint16_t>;
+		interface LocalTime<TRadio>;
+		interface CC2420XDriverConfig as Config;
+
+		interface FastSpiByte;
+		interface GeneralIO as CSN;
+		interface GeneralIO as VREN;
+		interface GeneralIO as CCA;
+		interface GeneralIO as RSTN;
+		interface GeneralIO as FIFO;
+		interface GeneralIO as FIFOP;
+		interface GeneralIO as SFD;
+		interface GpioCapture as SfdCapture;
+		interface GpioInterrupt as FifopInterrupt;
+
+		interface PacketFlag as TransmitPowerFlag;
+		interface PacketFlag as RSSIFlag;
+		interface PacketFlag as TimeSyncFlag;
+
+		interface PacketTimeStamp<TRadio, uint32_t>;
+
+		interface Tasklet;
+		interface RadioAlarm;
+
+#ifdef RADIO_DEBUG
+		interface DiagMsg;
+#endif
+		interface Leds;
+	}
+}
+
+implementation
+{
+	cc2420x_header_t* getHeader(message_t* msg)
+	{
+		return ((void*)msg) + call Config.headerLength(msg);
+	}
+
+	void* getPayload(message_t* msg)
+	{
+		return ((void*)msg);
+	}
+
+	cc2420x_metadata_t* getMeta(message_t* msg)
+	{
+		return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg);
+	}
+
+/*----------------- STATE -----------------*/
+
+	enum
+	{
+		STATE_VR_ON = 0,
+		STATE_PD = 1,
+		STATE_PD_2_IDLE = 2,
+		STATE_IDLE = 3,
+		STATE_IDLE_2_RX_ON = 4,
+		STATE_RX_ON = 5,
+		STATE_BUSY_TX_2_RX_ON = 6,
+		STATE_IDLE_2_TX_ON = 7,
+		STATE_TX_ON = 8,
+		STATE_RX_DOWNLOAD = 9,
+	};
+	norace uint8_t state = STATE_VR_ON;
+
+	enum
+	{
+		CMD_NONE = 0,			// the state machine has stopped
+		CMD_TURNOFF = 1,		// goto SLEEP state
+		CMD_STANDBY = 2,		// goto TRX_OFF state
+		CMD_TURNON = 3,			// goto RX_ON state
+		CMD_TRANSMIT = 4,		// currently transmitting a message
+		CMD_RECEIVE = 5,		// currently receiving a message
+		CMD_CCA = 6,			// performing clear chanel assesment
+		CMD_CHANNEL = 7,		// changing the channel
+		CMD_SIGNAL_DONE = 8,		// signal the end of the state transition
+		CMD_DOWNLOAD = 9,		// download the received message
+	};
+	tasklet_norace uint8_t cmd = CMD_NONE;
+
+	norace bool radioIrq = 0;
+
+	tasklet_norace uint8_t txPower;
+	tasklet_norace uint8_t channel;
+
+	tasklet_norace message_t* rxMsg;
+#ifdef RADIO_DEBUG_MESSAGES	
+	tasklet_norace message_t* txMsg;
+#endif	
+	message_t rxMsgBuffer;
+
+	uint16_t capturedTime;	// time when the last SFD interrupt has occured
+
+
+	enum
+	{
+		// TODO: this value needs to be calibrated
+		TX_SFD_DELAY = 0,
+		// TODO: this value needs to be calibrated
+		RX_SFD_DELAY = 0,
+	};
+
+	inline cc2420X_status_t getStatus();
+
+/*----------------- ALARM -----------------*/
+	tasklet_async event void RadioAlarm.fired()
+	{		
+		if( state == STATE_PD_2_IDLE ) {
+			state = STATE_IDLE;
+			if( cmd == CMD_STANDBY )
+				cmd = CMD_SIGNAL_DONE;
+		}
+		else if( state == STATE_IDLE_2_RX_ON ) {
+			state = STATE_RX_ON;
+			cmd = CMD_SIGNAL_DONE;
+			// in receive mode, enable SFD capture
+      			call SfdCapture.captureRisingEdge();	
+		}
+		else
+			RADIO_ASSERT(FALSE);
+
+		// make sure the rest of the command processing is called
+		call Tasklet.schedule();
+	}
+
+/*----------------- REGISTER -----------------*/
+
+	inline uint16_t readRegister(uint8_t reg)
+	{		
+		uint16_t value = 0;
+		
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & CC2420X_CMD_REGISTER_MASK) );
+
+		call CSN.set();
+		call CSN.clr();
+		
+		call FastSpiByte.splitWrite(CC2420X_CMD_REGISTER_READ | reg);
+		call FastSpiByte.splitReadWrite(0);
+		value = ((uint16_t)call FastSpiByte.splitReadWrite(0) << 8);
+		value += call FastSpiByte.splitRead();
+		call CSN.set();
+
+		return value;
+	}
+
+	inline cc2420X_status_t strobe(uint8_t reg)
+	{
+		cc2420X_status_t status;
+		
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & CC2420X_CMD_REGISTER_MASK) );
+
+		call CSN.set();
+		call CSN.clr();
+
+		call FastSpiByte.splitWrite(CC2420X_CMD_REGISTER_WRITE | reg);
+		status.value = call FastSpiByte.splitRead();
+
+		call CSN.set();
+		return status;
+		
+	}
+
+	inline cc2420X_status_t getStatus() {
+		return strobe(CC2420X_SNOP);
+	}
+
+	inline cc2420X_status_t writeRegister(uint8_t reg, uint16_t value)
+	{
+		cc2420X_status_t status;
+		
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & CC2420X_CMD_REGISTER_MASK) );
+
+		call CSN.set();
+		call CSN.clr();
+
+		call FastSpiByte.splitWrite(CC2420X_CMD_REGISTER_WRITE | reg);
+		call FastSpiByte.splitReadWrite(value >> 8);
+		call FastSpiByte.splitReadWrite(value & 0xff);
+		status.value = call FastSpiByte.splitRead();
+
+		call CSN.set();
+		return status;		
+	}
+
+	inline cc2420X_status_t writeTxFifo(uint8_t* data, uint8_t length)
+	{
+		cc2420X_status_t status;
+		uint8_t idx;
+		
+		RADIO_ASSERT( call SpiResource.isOwner() );
+
+		call CSN.set();
+		call CSN.clr();
+
+		call FastSpiByte.splitWrite(CC2420X_CMD_REGISTER_WRITE | CC2420X_TXFIFO);
+		for(idx = 0; idx<length; idx++)
+			call FastSpiByte.splitReadWrite(data[idx]);
+		status.value = call FastSpiByte.splitRead();
+
+		call CSN.set();
+		return status;		
+	}
+
+	inline uint8_t waitForRxFifoNoTimeout() {
+		// spin until fifo goes high
+		while(call FIFO.get() == 0);
+		
+		return call FIFO.get();
+	}
+
+	inline uint8_t waitForRxFifo() {
+
+		// wait for fifo to go high or timeout
+		// timeout is now + 2 byte time (4 symbol time)
+		uint16_t timeout = call RadioAlarm.getNow() + 4 * CC2420X_SYMBOL_TIME;
+			
+		while(call FIFO.get() == 0 && (timeout - call RadioAlarm.getNow() < 0x7fff));
+		return call FIFO.get();
+	}
+
+	inline cc2420X_status_t readLengthFromRxFifo(uint8_t* lengthPtr)
+	{
+		cc2420X_status_t status;
+
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( call CSN.get() == 1 );
+
+
+		call CSN.set();	// set CSN, just in clase it's not set
+		call CSN.clr(); // clear CSN, starting a multi-byte SPI command
+
+		// wait for fifo to go high
+		waitForRxFifoNoTimeout();
+		
+		// issue SPI command
+		call FastSpiByte.splitWrite(CC2420X_CMD_REGISTER_READ | CC2420X_RXFIFO);
+		status.value = call FastSpiByte.splitRead();
+		call FastSpiByte.splitWrite(0);
+		
+		*lengthPtr = call FastSpiByte.splitRead();
+		
+		// start reading the next byte
+		// important! fifo pin must be checked after the previous SPI read completed
+		waitForRxFifo();
+		call FastSpiByte.splitWrite(0);
+		return status;		
+	}
+
+	inline void readPayloadFromRxFifo(uint8_t* data, uint8_t length)
+	{
+		uint8_t idx;
+		
+		// readLengthFromRxFifo was called before, so CSN is cleared and spi is ours
+		RADIO_ASSERT( call CSN.get() == 0 );
+
+
+		for(idx = 0; idx<length; idx++) {
+			data[idx] = call FastSpiByte.splitRead();
+			waitForRxFifo();
+			call FastSpiByte.splitWrite(0);
+		}
+	}
+	
+	inline void readRssiFromRxFifo(uint8_t* rssiPtr)
+	{
+		// readLengthFromRxFifo was called before, so CSN is cleared and spi is ours
+		RADIO_ASSERT( call CSN.get() == 0 );
+
+		*rssiPtr = call FastSpiByte.splitRead();
+		waitForRxFifo();
+		call FastSpiByte.splitWrite(0);
+	}
+	
+	inline void readCrcOkAndLqiFromRxFifo(uint8_t* crcOkAndLqiPtr)
+	{
+		// readLengthFromRxFifo was called before, so CSN is cleared and spi is ours
+		RADIO_ASSERT( call CSN.get() == 0 );
+		
+		*crcOkAndLqiPtr = call FastSpiByte.splitRead();	
+		
+		// end RxFifo read operation
+		call CSN.set();
+	}
+
+	inline void flushRxFifo() {
+		// make sure that at least one byte has been read 
+		// from the rx fifo before calling this function
+		strobe(CC2420X_SFLUSHRX);
+		strobe(CC2420X_SFLUSHRX);
+	}
+	
+/*----------------- INIT -----------------*/
+
+	command error_t SoftwareInit.init()
+	{
+		// set pin directions
+    		call CSN.makeOutput();
+    		call VREN.makeOutput(); 		
+    		call RSTN.makeOutput(); 		
+    		call CCA.makeInput();
+    		call SFD.makeInput();
+    		call FIFO.makeInput();
+    		call FIFOP.makeInput();    		
+
+		call FifopInterrupt.disable();
+		call SfdCapture.disable();
+
+		// CSN is active low		
+    		call CSN.set();
+
+		// start up voltage regulator
+    		call VREN.set();
+    		call BusyWait.wait( 600 ); // .6ms VR startup time
+    		
+    		// do a reset
+		call RSTN.clr();
+		call RSTN.set();
+    
+		rxMsg = &rxMsgBuffer;
+
+		state = STATE_VR_ON;
+
+		// request SPI, rest of the initialization will be done from
+		// the granted event
+		return call SpiResource.request();
+	}
+
+	inline void resetRadio() {
+		
+		cc2420X_iocfg0_t iocfg0;
+		cc2420X_mdmctrl0_t mdmctrl0;
+
+    		// do a reset
+		call RSTN.clr();
+		call RSTN.set();
+
+		// set up fifop polarity and threshold
+		iocfg0 = cc2420X_iocfg0_default;
+		iocfg0.f.fifop_thr = 127;
+      		writeRegister(CC2420X_IOCFG0, iocfg0.value);
+		      
+		// set up modem control
+		mdmctrl0 = cc2420X_mdmctrl0_default;
+		mdmctrl0.f.reserved_frame_mode = 1; //accept reserved frames
+		mdmctrl0.f.adr_decode = 0; // disable
+      		writeRegister(CC2420X_MDMCTRL0, mdmctrl0.value);		
+
+		state = STATE_PD;
+	}
+
+
+	void initRadio()
+	{
+		resetRadio();		
+		
+		txPower = CC2420X_DEF_RFPOWER & CC2420X_TX_PWR_MASK;
+		channel = CC2420X_DEF_CHANNEL & CC2420X_CHANNEL_MASK;		
+
+	}
+
+/*----------------- SPI -----------------*/
+
+	event void SpiResource.granted()
+	{
+		
+		call CSN.makeOutput();
+		call CSN.set();
+
+		if( state == STATE_VR_ON )
+		{
+			initRadio();
+			call SpiResource.release();
+		}
+		else
+			call Tasklet.schedule();
+	}
+
+	bool isSpiAcquired()
+	{
+		if( call SpiResource.isOwner() )
+			return TRUE;
+
+		if( call SpiResource.immediateRequest() == SUCCESS )
+		{
+			call CSN.makeOutput();
+			call CSN.set();
+
+			return TRUE;
+		}
+
+		call SpiResource.request();
+		return FALSE;
+	}
+
+/*----------------- CHANNEL -----------------*/
+
+	tasklet_async command uint8_t RadioState.getChannel()
+	{
+		return channel;
+	}
+
+	tasklet_async command error_t RadioState.setChannel(uint8_t c)
+	{
+		c &= CC2420X_CHANNEL_MASK;
+
+		if( cmd != CMD_NONE )
+			return EBUSY;
+		else if( channel == c )
+			return EALREADY;
+
+		channel = c;
+		cmd = CMD_CHANNEL;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	inline void setChannel()
+	{
+		cc2420X_fsctrl_t fsctrl;
+		// set up freq
+		fsctrl= cc2420X_fsctrl_default;
+		fsctrl.f.freq = 357+5*(channel - 11);
+		
+      		writeRegister(CC2420X_FSCTRL, fsctrl.value);
+	}
+
+	inline void changeChannel()
+	{
+		RADIO_ASSERT( cmd == CMD_CHANNEL );
+		RADIO_ASSERT( state == STATE_PD || state == STATE_IDLE || ( state == STATE_RX_ON && call RadioAlarm.isFree()));
+
+		if( isSpiAcquired() )
+		{
+			setChannel();
+
+			if( state == STATE_RX_ON ) {
+				call RadioAlarm.wait(IDLE_2_RX_ON_TIME); // 12 symbol periods
+				state = STATE_IDLE_2_RX_ON;				
+			}
+			else
+				cmd = CMD_SIGNAL_DONE;
+		}
+	}
+
+/*----------------- TURN ON/OFF -----------------*/
+
+	inline void changeState()
+	{
+
+		if( (cmd == CMD_STANDBY || cmd == CMD_TURNON)
+			&& state == STATE_PD  && isSpiAcquired() && call RadioAlarm.isFree() )
+		{
+			// start oscillator
+      			strobe(CC2420X_SXOSCON); 
+
+			call RadioAlarm.wait(PD_2_IDLE_TIME); // .86ms OSC startup time
+			state = STATE_PD_2_IDLE;
+		}
+		else if( cmd == CMD_TURNON && state == STATE_IDLE && isSpiAcquired() && call RadioAlarm.isFree())
+		{
+			// setChannel was ignored in SLEEP because the SPI was not working, so do it here
+			setChannel();
+
+			// start receiving
+      			strobe(CC2420X_SRXON); 
+			call RadioAlarm.wait(IDLE_2_RX_ON_TIME); // 12 symbol periods      			
+			state = STATE_IDLE_2_RX_ON;
+		}
+		else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) 
+			&& state == STATE_RX_ON && isSpiAcquired() )
+		{
+			// disable SFD capture
+      			call SfdCapture.disable();	
+
+			// stop receiving
+      			strobe(CC2420X_SRFOFF); 			
+			state = STATE_IDLE;
+		}
+
+		if( cmd == CMD_TURNOFF && state == STATE_IDLE  && isSpiAcquired() )
+		{
+      			// stop oscillator
+      			strobe(CC2420X_SXOSCOFF); 
+
+			// do a reset
+			initRadio();
+			state = STATE_PD;
+			cmd = CMD_SIGNAL_DONE;
+		}
+		else if( cmd == CMD_STANDBY && state == STATE_IDLE )
+			cmd = CMD_SIGNAL_DONE;
+	}
+
+	tasklet_async command error_t RadioState.turnOff()
+	{
+		if( cmd != CMD_NONE )
+			return EBUSY;
+		else if( state == STATE_PD )
+			return EALREADY;
+
+#ifdef RADIO_DEBUG_STATE
+		if( call DiagMsg.record() )
+		{
+			call DiagMsg.str("turnOff");
+			call DiagMsg.uint16(call RadioAlarm.getNow());			
+			call DiagMsg.send();
+		}
+#endif
+
+		cmd = CMD_TURNOFF;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+	
+	tasklet_async command error_t RadioState.standby()
+	{
+		if( cmd != CMD_NONE || (state == STATE_PD && ! call RadioAlarm.isFree()) )
+			return EBUSY;
+		else if( state == STATE_IDLE )
+			return EALREADY;
+
+#ifdef RADIO_DEBUG_STATE
+		if( call DiagMsg.record() )
+		{
+			call DiagMsg.str("standBy");
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.send();
+		}
+#endif
+
+		cmd = CMD_STANDBY;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	// TODO: turn on SFD capture when turning off radio
+	tasklet_async command error_t RadioState.turnOn()
+	{
+		if( cmd != CMD_NONE || (state == STATE_PD && ! call RadioAlarm.isFree()) )
+			return EBUSY;
+		else if( state == STATE_RX_ON )
+			return EALREADY;
+
+#ifdef RADIO_DEBUG_STATE
+		if( call DiagMsg.record() )
+		{
+			call DiagMsg.str("turnOn");
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.send();
+		}
+#endif
+
+		cmd = CMD_TURNON;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioState.done() { }
+
+/*----------------- TRANSMIT -----------------*/
+
+	tasklet_async command error_t RadioSend.send(message_t* msg)
+	{
+		uint16_t time;
+		uint8_t p;
+		uint8_t length;
+		uint8_t* data;
+		uint8_t header;
+		uint32_t time32;
+		void* timesync;
+		timesync_relative_t timesync_relative;
+		uint32_t sfdTime;
+
+		if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || ! isSpiAcquired() || radioIrq )
+			return EBUSY;
+
+		p = (call PacketTransmitPower.isSet(msg) ?
+			call PacketTransmitPower.get(msg) : CC2420X_DEF_RFPOWER) & CC2420X_TX_PWR_MASK;
+
+		if( p != txPower )
+		{
+			cc2420X_txctrl_t txctrl = cc2420X_txctrl_default;
+
+			txPower = p;
+
+			txctrl.f.pa_level = txPower;
+			writeRegister(CC2420X_TXCTRL, txctrl.value);
+		}
+
+		if( call Config.requiresRssiCca(msg) && !call CCA.get() )
+			return EBUSY;
+			
+		data = getPayload(msg);
+		length = getHeader(msg)->length;
+		
+		// length | data[0] ... data[length-3] | automatically generated FCS
+
+		header = call Config.headerPreloadLength();
+		if( header > length )
+			header = length;
+
+		length -= header;
+
+		// disable SFD interrupt
+		call SfdCapture.disable();
+
+		// first upload the header to gain some time
+		spi_atomic writeTxFifo(data, header);
+
+		// there's a chance that there was a receive SFD interrupt in such a short time
+		// we probably didn't cover all possibilities, but that's OK: downloadMessage() can 
+		// clean up the RXFIFO if necessary
+		if( cmd != CMD_NONE || (state != STATE_IDLE && state != STATE_RX_ON) || radioIrq || call SFD.get() == 1 ) {
+			// discard header we wrote to TXFIFO
+			strobe(CC2420X_SFLUSHTX);
+			// re-enable SFD interrupt
+			call SfdCapture.captureRisingEdge();
+			// and bail out
+			return EBUSY;
+		}
+
+		// there's _still_ a chance that there was a receive SFD interrupt in such a short
+		// time , but that's OK: downloadMessage() can clean up the RXFIFO if necessary
+		
+		atomic {
+			// zero out capturedTime
+			// the SFD interrupt will set it again _while_ this function is running
+			capturedTime = 0;
+
+			// start transmission
+			strobe(CC2420X_STXON);
+			
+			// get a timestamp right after strobe returns
+			time = call RadioAlarm.getNow();
+
+			cmd = CMD_TRANSMIT;			
+			state = STATE_TX_ON;
+			call SfdCapture.captureFallingEdge();
+		}
+
+		timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0;
+
+		if( timesync == 0 ) {
+			// no timesync: write the entire payload to the fifo
+			spi_atomic writeTxFifo(data+header, length - 1);
+			state = STATE_BUSY_TX_2_RX_ON;
+		} else {
+			// timesync required: write the payload before the timesync bytes to the fifo
+			// TODO: we're assuming here that the timestamp is at the end of the message
+			spi_atomic writeTxFifo(data+header, length - sizeof(timesync_relative) - 1);
+		}
+		
+		
+		// compute timesync
+		sfdTime = time + TX_SFD_DELAY;
+		
+		// read both clocks
+		// TODO: how can atomic be removed???
+		atomic {
+			time = call RadioAlarm.getNow();
+			time32 = call LocalTime.get();
+		}
+			
+		// adjust time32 with the time elapsed since the SFD event
+		time -= sfdTime;
+		time32 -= time;
+
+                call PacketTimeStamp.set(msg, time32);
+                
+		if( timesync != 0 ) {
+			// read and adjust the timestamp field
+			timesync_relative = (*(timesync_absolute_t*)timesync) - time32;
+
+			// write it to the fifo
+			// TODO: we're assuming here that the timestamp is at the end of the message			
+			spi_atomic writeTxFifo((uint8_t*)(&timesync_relative), sizeof(timesync_relative));
+			state = STATE_BUSY_TX_2_RX_ON;
+		}
+
+#ifdef RADIO_DEBUG_MESSAGES
+		txMsg = msg;
+		
+		if( call DiagMsg.record() )
+		{
+			length = getHeader(msg)->length;
+
+			call DiagMsg.chr('t');
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.uint32(call PacketTimeStamp.isValid(msg) ? call PacketTimeStamp.timestamp(msg) : 0);
+			call DiagMsg.int8(length);
+			call DiagMsg.hex8s(getPayload(msg), length);
+			call DiagMsg.send();
+		}
+#endif
+
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioSend.sendDone(error_t error) { }
+	default tasklet_async event void RadioSend.ready() { }
+
+/*----------------- CCA -----------------*/
+
+	tasklet_async command error_t RadioCCA.request()
+	{
+		if( cmd != CMD_NONE || state != STATE_RX_ON )
+			return EBUSY;
+
+		if(call CCA.get()) {
+			signal RadioCCA.done(SUCCESS);		
+		} else {
+			signal RadioCCA.done(EBUSY);		
+		}
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioCCA.done(error_t error) { }
+
+/*----------------- RECEIVE -----------------*/
+
+	// recover from an error
+	// rx fifo flush does not always work
+	inline void recover() {
+		cc2420X_status_t status;
+		
+		call SfdCapture.disable();	
+
+		// reset the radio, initialize registers to default values
+		resetRadio();
+		
+		RADIO_ASSERT(state == STATE_PD);		
+		
+		// start oscillator
+      		strobe(CC2420X_SXOSCON); 
+      		
+      		// going idle in PD_2_IDLE_TIME
+      		state = STATE_PD_2_IDLE;
+      		
+		call BusyWait.wait(PD_2_IDLE_TIME); // .86ms OSC startup time
+
+		// get status
+		status = getStatus();
+		RADIO_ASSERT(status.rssi_valid == 0);
+		RADIO_ASSERT(status.lock == 0);
+		RADIO_ASSERT(status.tx_active == 0);
+		RADIO_ASSERT(status.enc_busy == 0);
+		RADIO_ASSERT(status.tx_underflow == 0);
+		RADIO_ASSERT(status.xosc16m_stable == 1);
+		
+		// we're idle now	
+		state = STATE_IDLE;		
+		
+		// download current channel to the radio
+		setChannel();
+
+      		// start receiving
+      		strobe(CC2420X_SRXON); 
+      		state = STATE_IDLE_2_RX_ON;		
+      		
+		call SfdCapture.captureRisingEdge();	
+      		
+		// we will be able to receive packets in 12 symbol periods  
+		state = STATE_RX_ON;		
+	}
+
+	inline void downloadMessage()
+	{
+		uint8_t length;
+		uint16_t crc = 1;
+		uint8_t* data;
+		uint8_t rssi;
+		uint8_t crc_ok_lqi;
+		uint16_t sfdTime;
+				
+						
+		state = STATE_RX_DOWNLOAD;
+		
+		atomic sfdTime = capturedTime;
+		
+		// data starts after the length field
+		data = getPayload(rxMsg) + sizeof(cc2420x_header_t);
+
+		// read the length byte
+		spi_atomic readLengthFromRxFifo(&length);
+
+		// check for too short lengths
+		if (length == 0) {
+			// stop reading RXFIFO
+			call CSN.set();
+
+			RADIO_ASSERT( call FIFOP.get() == 0 );
+			RADIO_ASSERT( call FIFO.get() == 0 );
+						
+			state = STATE_RX_ON;
+			cmd = CMD_NONE;
+			call SfdCapture.captureRisingEdge();			
+			return;
+		}
+		
+		if (length == 1) {
+			// skip payload and rssi
+			spi_atomic readCrcOkAndLqiFromRxFifo(&crc_ok_lqi);	
+
+			RADIO_ASSERT( call FIFOP.get() == 0 );
+			RADIO_ASSERT( call FIFO.get() == 0 );
+			
+			state = STATE_RX_ON;
+			cmd = CMD_NONE;
+			call SfdCapture.captureRisingEdge();			
+			return;
+		}
+
+		if (length == 2) {
+			// skip payload
+			spi_atomic {
+			  readRssiFromRxFifo(&rssi);
+			  readCrcOkAndLqiFromRxFifo(&crc_ok_lqi);	
+			}
+			
+			RADIO_ASSERT( call FIFOP.get() == 0 );
+			RADIO_ASSERT( call FIFO.get() == 0 );
+			
+			state = STATE_RX_ON;
+			cmd = CMD_NONE;
+			call SfdCapture.captureRisingEdge();			
+			return;	
+		}
+
+		// check for too long lengths		
+		if( length > 127 ) {
+			
+			recover();
+
+			RADIO_ASSERT( call FIFOP.get() == 0 );
+			RADIO_ASSERT( call FIFO.get() == 0 );
+			
+			state = STATE_RX_ON;
+			cmd = CMD_NONE;
+			call SfdCapture.captureRisingEdge();			
+			return;	
+		}
+		
+		if( length > call RadioPacket.maxPayloadLength() + 2 )
+		{
+			while( length-- > 2 ) {
+				readPayloadFromRxFifo(data, 1);
+			}
+
+			spi_atomic {
+			  readRssiFromRxFifo(&rssi);
+			  readCrcOkAndLqiFromRxFifo(&crc_ok_lqi);	
+			}
+			
+			RADIO_ASSERT( call FIFOP.get() == 0 );
+			
+			state = STATE_RX_ON;
+			cmd = CMD_NONE;
+			call SfdCapture.captureRisingEdge();			
+			return;	
+		}
+
+		// if we're here, length must be correct
+		RADIO_ASSERT(length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2);
+
+		getHeader(rxMsg)->length = length;
+
+		// we'll read the FCS/CRC separately
+		length -= 2;		
+
+		spi_atomic {
+		// download the whole payload
+		readPayloadFromRxFifo(data, length );
+
+		// the last two bytes are not the fsc, but RSSI(8), CRC_ON(1)+LQI(7)
+		readRssiFromRxFifo(&rssi);
+		readCrcOkAndLqiFromRxFifo(&crc_ok_lqi);
+		}
+		
+		// there are still bytes in the fifo or if there's an overflow, recover
+		// TODO: actually, we can signal that a message was received, without timestamp set
+		if (call FIFOP.get() == 1 || call FIFO.get() == 1) {
+			recover();
+			state = STATE_RX_ON;
+			cmd = CMD_NONE;
+			call SfdCapture.captureRisingEdge();			
+			return;
+		}
+		
+		state = STATE_RX_ON;
+		cmd = CMD_NONE;
+
+		// ready to receive new message: enable SFD interrupts
+		call SfdCapture.captureRisingEdge();
+		
+		if( signal RadioReceive.header(rxMsg) )
+		{
+			// set RSSI, CRC and LQI only if we're accepting the message
+			call PacketRSSI.set(rxMsg, rssi);
+			call PacketLinkQuality.set(rxMsg, crc_ok_lqi & 0x7f);
+			crc = (crc_ok_lqi > 0x7f) ? 0 : 1;
+		}
+			
+		// signal only if it has passed the CRC check
+		if( crc == 0 ) {
+			uint32_t time32;
+			uint16_t time;
+			atomic {
+				time = call RadioAlarm.getNow();
+				time32 = call LocalTime.get();
+			}
+
+				
+			time -= sfdTime;
+			time32 -= time;
+
+			call PacketTimeStamp.set(rxMsg, time32);
+
+			
+#ifdef RADIO_DEBUG_MESSAGES
+			if( call DiagMsg.record() )
+			{
+				call DiagMsg.str("r");
+				call DiagMsg.uint16(call RadioAlarm.getNow() - (uint16_t)call PacketTimeStamp.timestamp(rxMsg) );
+				call DiagMsg.uint16(call RadioAlarm.getNow());
+				call DiagMsg.uint16(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
+				call DiagMsg.int8(length);
+				call DiagMsg.hex8s(getPayload(rxMsg), length);				
+				call DiagMsg.send();
+			}
+#endif			
+			rxMsg = signal RadioReceive.receive(rxMsg);
+
+		}
+						
+	}
+
+
+/*----------------- IRQ -----------------*/
+	
+	// RX SFD (rising edge), disabled for TX
+	async event void SfdCapture.captured( uint16_t time )
+	{
+
+#ifdef RADIO_DEBUG_IRQ
+		if( call DiagMsg.record() )
+		{
+			call DiagMsg.str("SFD");
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.str("s=");
+			call DiagMsg.uint8(state);
+			if(call FIFO.get())
+				call DiagMsg.str("FIFO");
+			if(call FIFOP.get())
+				call DiagMsg.str("FIFOP");
+			if(call SFD.get())
+				call DiagMsg.str("SFD");
+					
+			call DiagMsg.send();
+		}
+#endif
+
+
+		RADIO_ASSERT( ! radioIrq );
+		RADIO_ASSERT(state == STATE_RX_ON || state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON);
+
+		atomic capturedTime = time;
+		
+		radioIrq = TRUE;
+		call SfdCapture.disable();
+
+
+		// do the rest of the processing
+		call Tasklet.schedule();
+	}
+
+	// FIFOP interrupt, last byte received
+	async event void FifopInterrupt.fired()
+	{		
+		// not used
+	}
+
+	inline void serviceRadio()
+	{
+		atomic if( isSpiAcquired() )
+		{
+			radioIrq = FALSE;
+
+			if( state == STATE_RX_ON && cmd == CMD_NONE )
+			{
+				// it's an RX SFD
+				cmd = CMD_DOWNLOAD;
+			}
+			else if( (state == STATE_TX_ON || state == STATE_BUSY_TX_2_RX_ON) && cmd == CMD_TRANSMIT)
+			{
+				cc2420X_status_t status;
+				
+				// it's a TX_END
+				state = STATE_RX_ON;
+				cmd = CMD_NONE;
+#if defined(RADIO_DEBUG_IRQ) && defined(RADIO_DEBUG_MESSAGES)
+			if( call DiagMsg.record() )
+			{
+				call DiagMsg.str("txdone");
+				call DiagMsg.uint16(call RadioAlarm.getNow());
+				call DiagMsg.uint16(capturedTime - (uint16_t)call PacketTimeStamp.timestamp(txMsg));
+				if(call FIFO.get())
+					call DiagMsg.str("FIFO");
+				if(call FIFOP.get())
+					call DiagMsg.str("FIFOP");
+				if(call SFD.get())
+					call DiagMsg.str("SFD");
+					
+				call DiagMsg.send();
+			}
+#endif
+				
+				call SfdCapture.captureRisingEdge();
+
+				// get status
+				status = getStatus();
+
+				if ( status.tx_underflow == 1) {
+					// flush tx fifo
+					strobe(CC2420X_SFLUSHTX);
+					signal RadioSend.sendDone(FAIL);
+				} else {
+					signal RadioSend.sendDone(SUCCESS);
+				}
+	
+			}
+			
+			else
+				RADIO_ASSERT(FALSE);
+		}
+	}
+
+	default tasklet_async event bool RadioReceive.header(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	default tasklet_async event message_t* RadioReceive.receive(message_t* msg)
+	{
+		return msg;
+	}
+
+/*----------------- TASKLET -----------------*/
+
+	task void releaseSpi()
+	{
+		call SpiResource.release();
+	}
+
+	tasklet_async event void Tasklet.run()
+	{
+#ifdef RADIO_DEBUG_TASKLET
+		if( call DiagMsg.record() )
+		{
+			call DiagMsg.str("tsk_str");
+			call DiagMsg.uint16(call RadioAlarm.getNow());	
+			call DiagMsg.str("s=");
+			call DiagMsg.uint8(state);
+			call DiagMsg.str("c=");
+			call DiagMsg.uint8(cmd);
+			if(radioIrq)
+				call DiagMsg.str("IRQ");
+			if(call FIFO.get())
+				call DiagMsg.str("FIFO");
+			if(call FIFOP.get())
+				call DiagMsg.str("FIFOP");
+			if(call SFD.get())
+				call DiagMsg.str("SFD");
+					
+			call DiagMsg.send();
+		}
+#endif
+
+		if( radioIrq )
+			serviceRadio();
+
+		if( cmd != CMD_NONE )
+		{
+			if( cmd == CMD_DOWNLOAD && state == STATE_RX_ON)
+				downloadMessage();
+			else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON )
+				changeState();
+			else if( cmd == CMD_CHANNEL )
+				changeChannel();
+			
+			if( cmd == CMD_SIGNAL_DONE )
+			{
+				cmd = CMD_NONE;
+				signal RadioState.done();
+			}
+		}
+
+		if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq )
+			signal RadioSend.ready();
+
+		if( cmd == CMD_NONE )
+			post releaseSpi();
+			
+#ifdef RADIO_DEBUG_TASKLET
+		if( call DiagMsg.record() )
+		{
+			call DiagMsg.uint16(call RadioAlarm.getNow());	
+			call DiagMsg.str("tsk_end");
+			call DiagMsg.str("s=");
+			call DiagMsg.uint8(state);
+			call DiagMsg.str("c=");
+			call DiagMsg.uint8(cmd);
+			if(radioIrq)
+				call DiagMsg.str("IRQ");
+			if(call FIFO.get())
+				call DiagMsg.str("FIFO");
+			if(call FIFOP.get())
+				call DiagMsg.str("FIFOP");
+			if(call SFD.get())
+				call DiagMsg.str("SFD");
+					
+			call DiagMsg.send();
+		}
+#endif
+	}
+
+/*----------------- RadioPacket -----------------*/
+	
+	async command uint8_t RadioPacket.headerLength(message_t* msg)
+	{
+		return call Config.headerLength(msg) + sizeof(cc2420x_header_t);
+	}
+
+	async command uint8_t RadioPacket.payloadLength(message_t* msg)
+	{
+		return getHeader(msg)->length - 2;
+	}
+
+	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		RADIO_ASSERT( 1 <= length && length <= 125 );
+		RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) );
+
+		// we add the length of the CRC, which is automatically generated
+		getHeader(msg)->length = length + 2;
+	}
+
+	async command uint8_t RadioPacket.maxPayloadLength()
+	{
+		RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(cc2420x_header_t) <= 125 );
+
+		return call Config.maxPayloadLength() - sizeof(cc2420x_header_t);
+	}
+
+	async command uint8_t RadioPacket.metadataLength(message_t* msg)
+	{
+		return call Config.metadataLength(msg) + sizeof(cc2420x_metadata_t);
+	}
+
+	async command void RadioPacket.clear(message_t* msg)
+	{
+		// all flags are automatically cleared
+	}
+
+/*----------------- PacketTransmitPower -----------------*/
+
+	async command bool PacketTransmitPower.isSet(message_t* msg)
+	{
+		return call TransmitPowerFlag.get(msg);
+	}
+
+	async command uint8_t PacketTransmitPower.get(message_t* msg)
+	{
+		return getMeta(msg)->power;
+	}
+
+	async command void PacketTransmitPower.clear(message_t* msg)
+	{
+		call TransmitPowerFlag.clear(msg);
+	}
+
+	async command void PacketTransmitPower.set(message_t* msg, uint8_t value)
+	{
+		call TransmitPowerFlag.set(msg);
+		getMeta(msg)->power = value;
+	}
+
+/*----------------- PacketRSSI -----------------*/
+
+	async command bool PacketRSSI.isSet(message_t* msg)
+	{
+		return call RSSIFlag.get(msg);
+	}
+
+	async command uint8_t PacketRSSI.get(message_t* msg)
+	{
+		return getMeta(msg)->rssi;
+	}
+
+	async command void PacketRSSI.clear(message_t* msg)
+	{
+		call RSSIFlag.clear(msg);
+	}
+
+	async command void PacketRSSI.set(message_t* msg, uint8_t value)
+	{
+		// just to be safe if the user fails to clear the packet
+		call TransmitPowerFlag.clear(msg);
+
+		call RSSIFlag.set(msg);
+		getMeta(msg)->rssi = value;
+	}
+
+/*----------------- PacketTimeSyncOffset -----------------*/
+
+	async command bool PacketTimeSyncOffset.isSet(message_t* msg)
+	{
+		return call TimeSyncFlag.get(msg);
+	}
+
+	async command uint8_t PacketTimeSyncOffset.get(message_t* msg)
+	{
+		return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t);
+	}
+
+	async command void PacketTimeSyncOffset.clear(message_t* msg)
+	{
+		call TimeSyncFlag.clear(msg);
+	}
+
+	async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value)
+	{
+		// we do not store the value, the time sync field is always the last 4 bytes
+		RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value );
+
+		call TimeSyncFlag.set(msg);
+	}
+
+/*----------------- PacketLinkQuality -----------------*/
+
+	async command bool PacketLinkQuality.isSet(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	async command uint8_t PacketLinkQuality.get(message_t* msg)
+	{
+		return getMeta(msg)->lqi;
+	}
+
+	async command void PacketLinkQuality.clear(message_t* msg)
+	{
+	}
+
+	async command void PacketLinkQuality.set(message_t* msg, uint8_t value)
+	{
+		getMeta(msg)->lqi = value;
+	}
+}
diff --git a/tos/chips/cc2420x/CC2420XRadio.h b/tos/chips/cc2420x/CC2420XRadio.h
new file mode 100644
index 00000000..3be5b86e
--- /dev/null
+++ b/tos/chips/cc2420x/CC2420XRadio.h
@@ -0,0 +1,67 @@
+ /*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai
+ */
+
+#ifndef __CC2420XRADIO_H__
+#define __CC2420XRADIO_H__
+
+#include <RadioConfig.h>
+#include <TinyosNetworkLayer.h>
+#include <Ieee154PacketLayer.h>
+#include <ActiveMessageLayer.h>
+#include <MetadataFlagsLayer.h>
+#include <CC2420XDriverLayer.h>
+#include <TimeStampingLayer.h>
+#include <LowPowerListeningLayer.h>
+#include <PacketLinkLayer.h>
+
+typedef nx_struct cc2420xpacket_header_t
+{
+	cc2420x_header_t cc2420x;
+	ieee154_header_t ieee154;
+#ifndef TFRAMES_ENABLED
+	network_header_t network;
+#endif
+#ifndef IEEE154FRAMES_ENABLED
+	activemessage_header_t am;
+#endif
+} cc2420xpacket_header_t;
+
+typedef nx_struct cc2420xpacket_footer_t
+{
+	// the time stamp is not recorded here, time stamped messaged cannot have max length
+} cc2420xpacket_footer_t;
+
+typedef struct cc2420xpacket_metadata_t
+{
+#ifdef LOW_POWER_LISTENING
+	lpl_metadata_t lpl;
+#endif
+#ifdef PACKET_LINK
+	link_metadata_t link;
+#endif
+	timestamp_metadata_t timestamp;
+	flags_metadata_t flags;
+	cc2420x_metadata_t cc2420x;
+} cc2420xpacket_metadata_t;
+
+#endif//__CC2420XRADIO_H__
diff --git a/tos/chips/cc2420x/CC2420XRadioC.nc b/tos/chips/cc2420x/CC2420XRadioC.nc
new file mode 100644
index 00000000..dfbb3b98
--- /dev/null
+++ b/tos/chips/cc2420x/CC2420XRadioC.nc
@@ -0,0 +1,283 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai, Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+configuration CC2420XRadioC
+{
+	provides 
+	{
+		interface SplitControl;
+
+#ifndef IEEE154FRAMES_ENABLED
+		interface AMSend[am_id_t id];
+		interface Receive[am_id_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface SendNotifier[am_id_t id];
+
+		// for TOSThreads
+		interface Receive as ReceiveDefault[am_id_t id];
+		interface Receive as SnoopDefault[am_id_t id];
+
+		interface AMPacket;
+		interface Packet as PacketForActiveMessage;
+#endif
+
+#ifndef TFRAMES_ENABLED
+		interface Ieee154Send;
+		interface Receive as Ieee154Receive;
+		interface SendNotifier as Ieee154Notifier;
+
+		interface Resource as SendResource[uint8_t clint];
+
+		interface Ieee154Packet;
+		interface Packet as PacketForIeee154Message;
+#endif
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+
+#ifdef PACKET_LINK
+		interface PacketLink;
+#endif
+
+		interface RadioChannel;
+
+		interface PacketField<uint8_t> as PacketLinkQuality;
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	#define UQ_METADATA_FLAGS	"UQ_CC2420X_METADATA_FLAGS"
+	#define UQ_RADIO_ALARM		"UQ_CC2420X_RADIO_ALARM"
+
+// -------- CC2420X RadioP
+
+	components CC2420XRadioP;
+
+#ifdef RADIO_DEBUG
+	components AssertC;
+#endif
+
+	CC2420XRadioP.Ieee154PacketLayer -> Ieee154PacketLayerC;
+	CC2420XRadioP.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+	CC2420XRadioP.PacketTimeStamp -> TimeStampingLayerC;
+	CC2420XRadioP.CC2420XPacket -> CC2420XDriverLayerC;
+
+// -------- RadioAlarm
+
+	components new RadioAlarmC();
+	RadioAlarmC.Alarm -> CC2420XDriverLayerC;
+
+// -------- Active Message
+
+#ifndef IEEE154FRAMES_ENABLED
+	components new ActiveMessageLayerC();
+	ActiveMessageLayerC.Config -> CC2420XRadioP;
+	ActiveMessageLayerC.SubSend -> AutoResourceAcquireLayerC;
+	ActiveMessageLayerC.SubReceive -> TinyosNetworkLayerC.TinyosReceive;
+	ActiveMessageLayerC.SubPacket -> TinyosNetworkLayerC.TinyosPacket;
+
+	AMSend = ActiveMessageLayerC;
+	Receive = ActiveMessageLayerC.Receive;
+	Snoop = ActiveMessageLayerC.Snoop;
+	SendNotifier = ActiveMessageLayerC;
+	AMPacket = ActiveMessageLayerC;
+	PacketForActiveMessage = ActiveMessageLayerC;
+
+	ReceiveDefault = ActiveMessageLayerC.ReceiveDefault;
+	SnoopDefault = ActiveMessageLayerC.SnoopDefault;
+#endif
+
+// -------- Automatic RadioSend Resource
+
+#ifndef IEEE154FRAMES_ENABLED
+#ifndef TFRAMES_ENABLED
+	components new AutoResourceAcquireLayerC();
+	AutoResourceAcquireLayerC.Resource -> SendResourceC.Resource[unique(RADIO_SEND_RESOURCE)];
+#else
+	components new DummyLayerC() as AutoResourceAcquireLayerC;
+#endif
+	AutoResourceAcquireLayerC -> TinyosNetworkLayerC.TinyosSend;
+#endif
+
+// -------- RadioSend Resource
+
+#ifndef TFRAMES_ENABLED
+	components new SimpleFcfsArbiterC(RADIO_SEND_RESOURCE) as SendResourceC;
+	SendResource = SendResourceC;
+
+// -------- Ieee154 Message
+
+	components new Ieee154MessageLayerC();
+	Ieee154MessageLayerC.Ieee154PacketLayer -> Ieee154PacketLayerC;
+	Ieee154MessageLayerC.SubSend -> TinyosNetworkLayerC.Ieee154Send;
+	Ieee154MessageLayerC.SubReceive -> TinyosNetworkLayerC.Ieee154Receive;
+	Ieee154MessageLayerC.RadioPacket -> TinyosNetworkLayerC.Ieee154Packet;
+
+	Ieee154Send = Ieee154MessageLayerC;
+	Ieee154Receive = Ieee154MessageLayerC;
+	Ieee154Notifier = Ieee154MessageLayerC;
+	Ieee154Packet = Ieee154PacketLayerC;
+	PacketForIeee154Message = Ieee154MessageLayerC;
+#endif
+
+// -------- Tinyos Network
+
+	components new TinyosNetworkLayerC();
+
+	TinyosNetworkLayerC.SubSend -> UniqueLayerC;
+	TinyosNetworkLayerC.SubReceive -> LowPowerListeningLayerC;
+	TinyosNetworkLayerC.SubPacket -> Ieee154PacketLayerC;
+
+// -------- IEEE 802.15.4 Packet
+
+	components new Ieee154PacketLayerC();
+	Ieee154PacketLayerC.SubPacket -> LowPowerListeningLayerC;
+
+// -------- UniqueLayer Send part (wired twice)
+
+	components new UniqueLayerC();
+	UniqueLayerC.Config -> CC2420XRadioP;
+	UniqueLayerC.SubSend -> LowPowerListeningLayerC;
+
+// -------- Low Power Listening 
+
+#ifdef LOW_POWER_LISTENING
+	#warning "*** USING LOW POWER LISTENING LAYER"
+	components new LowPowerListeningLayerC();
+	LowPowerListeningLayerC.Config -> CC2420XRadioP;
+	LowPowerListeningLayerC.PacketAcknowledgements -> SoftwareAckLayerC;
+#else	
+	components new LowPowerListeningDummyC() as LowPowerListeningLayerC;
+#endif
+	LowPowerListeningLayerC.SubControl -> MessageBufferLayerC;
+	LowPowerListeningLayerC.SubSend -> PacketLinkLayerC;
+	LowPowerListeningLayerC.SubReceive -> PacketLinkLayerC;
+	LowPowerListeningLayerC.SubPacket -> PacketLinkLayerC;
+	SplitControl = LowPowerListeningLayerC;
+	LowPowerListening = LowPowerListeningLayerC;
+
+// -------- Packet Link
+
+#ifdef PACKET_LINK
+	components new PacketLinkLayerC();
+	PacketLink = PacketLinkLayerC;
+	PacketLinkLayerC.PacketAcknowledgements -> SoftwareAckLayerC;
+#else
+	components new DummyLayerC() as PacketLinkLayerC;
+#endif
+	PacketLinkLayerC -> MessageBufferLayerC.Send;
+	PacketLinkLayerC -> MessageBufferLayerC.Receive;
+	PacketLinkLayerC -> TimeStampingLayerC.RadioPacket;
+
+// -------- MessageBuffer
+
+	components new MessageBufferLayerC();
+	MessageBufferLayerC.RadioSend -> TrafficMonitorLayerC;
+	MessageBufferLayerC.RadioReceive -> UniqueLayerC;
+	MessageBufferLayerC.RadioState -> TrafficMonitorLayerC;
+	RadioChannel = MessageBufferLayerC;
+
+// -------- UniqueLayer receive part (wired twice)
+
+	UniqueLayerC.SubReceive -> TrafficMonitorLayerC;
+
+// -------- Traffic Monitor
+
+#ifdef TRAFFIC_MONITOR
+	components new TrafficMonitorLayerC();
+#else
+	components new DummyLayerC() as TrafficMonitorLayerC;
+#endif
+	TrafficMonitorLayerC.Config -> CC2420XRadioP;
+	TrafficMonitorLayerC -> CollisionAvoidanceLayerC.RadioSend;
+	TrafficMonitorLayerC -> CollisionAvoidanceLayerC.RadioReceive;
+	TrafficMonitorLayerC -> CC2420XDriverLayerC.RadioState;
+
+// -------- CollisionAvoidance
+
+#ifdef SLOTTED_MAC
+	components new SlottedCollisionLayerC() as CollisionAvoidanceLayerC;
+#else
+	components new RandomCollisionLayerC() as CollisionAvoidanceLayerC;
+#endif
+	CollisionAvoidanceLayerC.Config -> CC2420XRadioP;
+	CollisionAvoidanceLayerC.SubSend -> SoftwareAckLayerC;
+	CollisionAvoidanceLayerC.SubReceive -> SoftwareAckLayerC;
+	CollisionAvoidanceLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+
+// -------- SoftwareAcknowledgement
+
+	components new SoftwareAckLayerC();
+	SoftwareAckLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	SoftwareAckLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+	PacketAcknowledgements = SoftwareAckLayerC;
+	SoftwareAckLayerC.Config -> CC2420XRadioP;
+	SoftwareAckLayerC.SubSend -> CsmaLayerC;
+	SoftwareAckLayerC.SubReceive -> CsmaLayerC;
+
+// -------- Carrier Sense
+
+	components new DummyLayerC() as CsmaLayerC;
+	CsmaLayerC.Config -> CC2420XRadioP;
+	CsmaLayerC -> CC2420XDriverLayerC.RadioSend;
+	CsmaLayerC -> CC2420XDriverLayerC.RadioReceive;
+	CsmaLayerC -> CC2420XDriverLayerC.RadioCCA;
+
+// -------- TimeStamping
+
+	components new TimeStampingLayerC();
+	TimeStampingLayerC.LocalTimeRadio -> CC2420XDriverLayerC;
+	TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC;
+	PacketTimeStampRadio = TimeStampingLayerC;
+	PacketTimeStampMilli = TimeStampingLayerC;
+	TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+
+// -------- MetadataFlags
+
+	components new MetadataFlagsLayerC();
+	MetadataFlagsLayerC.SubPacket -> CC2420XDriverLayerC;
+
+// -------- CC2420X Driver
+
+	components CC2420XDriverLayerC;
+	CC2420XDriverLayerC.Config -> CC2420XRadioP;
+	CC2420XDriverLayerC.PacketTimeStamp -> TimeStampingLayerC;
+	PacketTransmitPower = CC2420XDriverLayerC.PacketTransmitPower;
+	PacketLinkQuality = CC2420XDriverLayerC.PacketLinkQuality;
+	PacketRSSI = CC2420XDriverLayerC.PacketRSSI;
+	LocalTimeRadio = CC2420XDriverLayerC;
+
+	CC2420XDriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	CC2420XDriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	CC2420XDriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	CC2420XDriverLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+}
diff --git a/tos/chips/cc2420x/CC2420XRadioP.nc b/tos/chips/cc2420x/CC2420XRadioP.nc
new file mode 100644
index 00000000..2f99f62d
--- /dev/null
+++ b/tos/chips/cc2420x/CC2420XRadioP.nc
@@ -0,0 +1,359 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Miklos Maroti, Janos Sallai
+ */
+
+#include <CC2420XRadio.h>
+#include <RadioConfig.h>
+#include <Tasklet.h>
+
+module CC2420XRadioP
+{
+	provides
+	{
+		interface CC2420XDriverConfig;
+		interface SoftwareAckConfig;
+		interface UniqueConfig;
+		interface CsmaConfig;
+		interface TrafficMonitorConfig;
+		interface RandomCollisionConfig;
+		interface SlottedCollisionConfig;
+		interface ActiveMessageConfig;
+		interface DummyConfig;
+
+#ifdef LOW_POWER_LISTENING
+		interface LowPowerListeningConfig;
+#endif
+	}
+
+	uses
+	{
+		interface Ieee154PacketLayer;
+		interface RadioAlarm;
+		interface RadioPacket as CC2420XPacket;
+
+		interface PacketTimeStamp<TRadio, uint32_t>;
+	}
+}
+
+implementation
+{
+
+/*----------------- CC2420XDriverConfig -----------------*/
+
+	async command uint8_t CC2420XDriverConfig.headerLength(message_t* msg)
+	{
+		return offsetof(message_t, data) - sizeof(cc2420xpacket_header_t);
+	}
+
+	async command uint8_t CC2420XDriverConfig.maxPayloadLength()
+	{
+		return sizeof(cc2420xpacket_header_t) + TOSH_DATA_LENGTH;
+	}
+
+	async command uint8_t CC2420XDriverConfig.metadataLength(message_t* msg)
+	{
+		return 0;
+	}
+
+	async command uint8_t CC2420XDriverConfig.headerPreloadLength()
+	{
+		// we need the fcf, dsn, destpan and dest
+		return 7;
+	}
+
+	async command bool CC2420XDriverConfig.requiresRssiCca(message_t* msg)
+	{
+		return call Ieee154PacketLayer.isDataFrame(msg);
+	}
+
+/*----------------- SoftwareAckConfig -----------------*/
+
+	async command bool SoftwareAckConfig.requiresAckWait(message_t* msg)
+	{
+		return call Ieee154PacketLayer.requiresAckWait(msg);
+	}
+
+	async command bool SoftwareAckConfig.isAckPacket(message_t* msg)
+	{
+		return call Ieee154PacketLayer.isAckFrame(msg);
+	}
+
+	async command bool SoftwareAckConfig.verifyAckPacket(message_t* data, message_t* ack)
+	{
+		return call Ieee154PacketLayer.verifyAckReply(data, ack);
+	}
+
+	async command void SoftwareAckConfig.setAckRequired(message_t* msg, bool ack)
+	{
+		call Ieee154PacketLayer.setAckRequired(msg, ack);
+	}
+
+	async command bool SoftwareAckConfig.requiresAckReply(message_t* msg)
+	{
+		return call Ieee154PacketLayer.requiresAckReply(msg);
+	}
+
+	async command void SoftwareAckConfig.createAckPacket(message_t* data, message_t* ack)
+	{
+		call Ieee154PacketLayer.createAckReply(data, ack);
+	}
+
+#ifndef SOFTWAREACK_TIMEOUT
+#define SOFTWAREACK_TIMEOUT	1000
+#endif
+
+	async command uint16_t SoftwareAckConfig.getAckTimeout()
+	{
+		return (uint16_t)(SOFTWAREACK_TIMEOUT * RADIO_ALARM_MICROSEC);
+	}
+
+	tasklet_async command void SoftwareAckConfig.reportChannelError()
+	{
+#ifdef TRAFFIC_MONITOR
+		signal TrafficMonitorConfig.channelError();
+#endif
+	}
+
+/*----------------- UniqueConfig -----------------*/
+
+	async command uint8_t UniqueConfig.getSequenceNumber(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDSN(msg);
+	}
+
+	async command void UniqueConfig.setSequenceNumber(message_t* msg, uint8_t dsn)
+	{
+		call Ieee154PacketLayer.setDSN(msg, dsn);
+	}
+
+	async command am_addr_t UniqueConfig.getSender(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getSrcAddr(msg);
+	}
+
+	tasklet_async command void UniqueConfig.reportChannelError()
+	{
+#ifdef TRAFFIC_MONITOR
+		signal TrafficMonitorConfig.channelError();
+#endif
+	}
+
+/*----------------- ActiveMessageConfig -----------------*/
+
+	command am_addr_t ActiveMessageConfig.destination(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDestAddr(msg);
+	}
+
+	command void ActiveMessageConfig.setDestination(message_t* msg, am_addr_t addr)
+	{
+		call Ieee154PacketLayer.setDestAddr(msg, addr);
+	}
+
+	command am_addr_t ActiveMessageConfig.source(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getSrcAddr(msg);
+	}
+
+	command void ActiveMessageConfig.setSource(message_t* msg, am_addr_t addr)
+	{
+		call Ieee154PacketLayer.setSrcAddr(msg, addr);
+	}
+
+	command am_group_t ActiveMessageConfig.group(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDestPan(msg);
+	}
+
+	command void ActiveMessageConfig.setGroup(message_t* msg, am_group_t grp)
+	{
+		call Ieee154PacketLayer.setDestPan(msg, grp);
+	}
+
+	command error_t ActiveMessageConfig.checkFrame(message_t* msg)
+	{
+		if( ! call Ieee154PacketLayer.isDataFrame(msg) )
+			call Ieee154PacketLayer.createDataFrame(msg);
+
+		return SUCCESS;
+	}
+
+/*----------------- CsmaConfig -----------------*/
+
+	async command bool CsmaConfig.requiresSoftwareCCA(message_t* msg)
+	{
+		return call Ieee154PacketLayer.isDataFrame(msg);
+	}
+
+/*----------------- TrafficMonitorConfig -----------------*/
+
+	enum
+	{
+		TRAFFIC_UPDATE_PERIOD = 100,	// in milliseconds
+		TRAFFIC_MAX_BYTES = (uint16_t)(TRAFFIC_UPDATE_PERIOD * 1000UL / 32),	// 3125
+	};
+
+	async command uint16_t TrafficMonitorConfig.getUpdatePeriod()
+	{
+		return TRAFFIC_UPDATE_PERIOD;
+	}
+
+	async command uint16_t TrafficMonitorConfig.getChannelTime(message_t* msg)
+	{
+		/* We count in bytes, one byte is 32 microsecond. We are conservative here.
+		 *
+		 * pure airtime: preable (4 bytes), SFD (1 byte), length (1 byte), payload + CRC (len bytes)
+		 * frame separation: 5-10 bytes
+		 * ack required: 8-16 byte separation, 11 bytes airtime, 5-10 bytes separation
+		 */
+
+		uint8_t len = call CC2420XPacket.payloadLength(msg);
+		return call Ieee154PacketLayer.getAckRequired(msg) ? len + 6 + 16 + 11 + 10 : len + 6 + 10;
+	}
+
+	async command am_addr_t TrafficMonitorConfig.getSender(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getSrcAddr(msg);
+	}
+
+/*----------------- RandomCollisionConfig -----------------*/
+
+	/*
+	 * We try to use the same values as in CC2420
+	 *
+	 * CC2420_MIN_BACKOFF = 10 jiffies = 320 microsec
+	 * CC2420_BACKOFF_PERIOD = 10 jiffies
+	 * initial backoff = 0x1F * CC2420_BACKOFF_PERIOD = 310 jiffies = 9920 microsec
+	 * congestion backoff = 0x7 * CC2420_BACKOFF_PERIOD = 70 jiffies = 2240 microsec
+	 */
+
+#ifndef LOW_POWER_LISTENING
+
+	async command uint16_t RandomCollisionConfig.getMinimumBackoff()
+	{
+		return (uint16_t)(320 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg)
+	{
+		return (uint16_t)(9920 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg)
+	{
+		return (uint16_t)(2240 * RADIO_ALARM_MICROSEC);
+	}
+
+#endif
+
+	async command uint16_t RandomCollisionConfig.getTransmitBarrier(message_t* msg)
+	{
+		uint16_t time;
+
+		// TODO: maybe we should use the embedded timestamp of the message
+		time = call RadioAlarm.getNow();
+
+		// estimated response time (download the message, etc) is 5-8 bytes
+		if( call Ieee154PacketLayer.requiresAckReply(msg) )
+			time += (uint16_t)(32 * (-5 + 16 + 11 + 5) * RADIO_ALARM_MICROSEC);
+		else
+			time += (uint16_t)(32 * (-5 + 5) * RADIO_ALARM_MICROSEC);
+
+		return time;
+	}
+
+	tasklet_async event void RadioAlarm.fired()
+	{
+	}
+
+/*----------------- SlottedCollisionConfig -----------------*/
+
+	async command uint16_t SlottedCollisionConfig.getInitialDelay()
+	{
+		return 300;
+	}
+
+	async command uint8_t SlottedCollisionConfig.getScheduleExponent()
+	{
+		return 1 + RADIO_ALARM_MILLI_EXP;
+	}
+
+	async command uint16_t SlottedCollisionConfig.getTransmitTime(message_t* msg)
+	{
+		// TODO: check if the timestamp is correct
+		return call PacketTimeStamp.timestamp(msg);
+	}
+
+	async command uint16_t SlottedCollisionConfig.getCollisionWindowStart(message_t* msg)
+	{
+		// the preamble (4 bytes), SFD (1 byte), plus two extra for safety
+		return (call PacketTimeStamp.timestamp(msg)) - (uint16_t)(7 * 32 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t SlottedCollisionConfig.getCollisionWindowLength(message_t* msg)
+	{
+		return (uint16_t)(2 * 7 * 32 * RADIO_ALARM_MICROSEC);
+	}
+
+/*----------------- Dummy -----------------*/
+
+	async command void DummyConfig.nothing()
+	{
+	}
+
+/*----------------- LowPowerListening -----------------*/
+
+#ifdef LOW_POWER_LISTENING
+
+	command bool LowPowerListeningConfig.needsAutoAckRequest(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDestAddr(msg) != TOS_BCAST_ADDR;
+	}
+
+	command bool LowPowerListeningConfig.ackRequested(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getAckRequired(msg);
+	}
+
+	command uint16_t LowPowerListeningConfig.getListenLength()
+	{
+		return 5;
+	}
+
+	async command uint16_t RandomCollisionConfig.getMinimumBackoff()
+	{
+		return (uint16_t)(320 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg)
+	{
+		return (uint16_t)(1600 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg)
+	{
+		return (uint16_t)(3200 * RADIO_ALARM_MICROSEC);
+	}
+
+#endif
+
+}
diff --git a/tos/chips/cc2420x/CC2420XTimeSyncMessageC.nc b/tos/chips/cc2420x/CC2420XTimeSyncMessageC.nc
new file mode 100644
index 00000000..12751111
--- /dev/null
+++ b/tos/chips/cc2420x/CC2420XTimeSyncMessageC.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Miklos Maroti, Janos Sallai
+ */
+
+#include <RadioConfig.h>
+
+configuration CC2420XTimeSyncMessageC
+{
+	provides
+	{
+		interface SplitControl;
+
+		interface Receive[uint8_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface Packet;
+		interface AMPacket;
+
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface TimeSyncAMSend<TRadio, uint32_t> as TimeSyncAMSendRadio[am_id_t id];
+		interface TimeSyncPacket<TRadio, uint32_t> as TimeSyncPacketRadio;
+
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+		interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+		interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+	}
+}
+
+implementation
+{
+	components CC2420XActiveMessageC as ActiveMessageC, new TimeSyncMessageLayerC();
+  
+	SplitControl	= ActiveMessageC;
+	AMPacket	= TimeSyncMessageLayerC;
+  	Receive		= TimeSyncMessageLayerC.Receive;
+	Snoop		= TimeSyncMessageLayerC.Snoop;
+	Packet		= TimeSyncMessageLayerC;
+
+	PacketTimeStampRadio	= ActiveMessageC;
+	TimeSyncAMSendRadio	= TimeSyncMessageLayerC;
+	TimeSyncPacketRadio	= TimeSyncMessageLayerC;
+
+	PacketTimeStampMilli	= ActiveMessageC;
+	TimeSyncAMSendMilli	= TimeSyncMessageLayerC;
+	TimeSyncPacketMilli	= TimeSyncMessageLayerC;
+
+	TimeSyncMessageLayerC.PacketTimeStampRadio -> ActiveMessageC;
+	TimeSyncMessageLayerC.PacketTimeStampMilli -> ActiveMessageC;
+
+	components CC2420XDriverLayerC as DriverLayerC;
+
+	TimeSyncMessageLayerC.LocalTimeRadio -> DriverLayerC;
+	TimeSyncMessageLayerC.PacketTimeSyncOffset -> DriverLayerC.PacketTimeSyncOffset;
+}
diff --git a/tos/chips/cc2420x/README.txt b/tos/chips/cc2420x/README.txt
new file mode 100644
index 00000000..21c078b6
--- /dev/null
+++ b/tos/chips/cc2420x/README.txt
@@ -0,0 +1,7 @@
+CC2420X is an alternative radio stack for the TI CC2420 radio, using the
+rfxlink library (lib/rfxlink). The stack is IEEE802.15.4 compliant. It does
+not support hardware acknowledgements or security. All the rfxlink features
+are supported. See lib/rfxlink/README.txt for details.
+
+To use this stack, simply wire against CC2420XActiveMessageC instead of
+ActiveMessageC.
diff --git a/tos/chips/cortex/m3/cortexm3hardware.h b/tos/chips/cortex/m3/cortexm3hardware.h
new file mode 100644
index 00000000..0a3762fc
--- /dev/null
+++ b/tos/chips/cortex/m3/cortexm3hardware.h
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Definitions specific to the Cortex-M3 MCU.
+ * Includes interrupt enable/disable routines for nesC.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ * @author Thomas Schmid
+ */
+
+#ifndef CORTEXM3_HARDWARE_H
+#define CORTEXM3_HARDWARE_H
+
+#define ROUNDDOWN(a, n)                                         \
+({                                                              \
+        uint32_t __a = (uint32_t) (a);                          \
+        (typeof(a)) (__a - __a % (n));                          \
+})
+// Round up to the nearest multiple of n
+#define ROUNDUP(a, n)                                           \
+({                                                              \
+        uint32_t __n = (uint32_t) (n);                          \
+        (typeof(a)) (ROUNDDOWN((uint32_t) (a) + __n - 1, __n)); \
+})
+
+typedef uint32_t __nesc_atomic_t;
+
+inline __nesc_atomic_t __nesc_atomic_start() @spontaneous() __attribute__((always_inline))
+{
+	__nesc_atomic_t oldState = 0;
+	__nesc_atomic_t newState = 1;
+	asm volatile(
+		"mrs %[old], primask\n"
+		"msr primask, %[new]\n"
+		: [old] "=&r" (oldState) // output, assure write only!
+		: [new] "r"  (newState)  // input
+        : "cc", "memory"         // clobber condition code flag and memory
+	);
+	return oldState;
+}
+ 
+inline void __nesc_atomic_end(__nesc_atomic_t oldState) @spontaneous() __attribute__((always_inline))
+{
+	asm volatile("" : : : "memory"); // memory barrier
+ 
+	asm volatile(
+		"msr primask, %[old]"
+		:                      // no output
+		: [old] "r" (oldState) // input
+	);
+}
+
+// See definitive guide to Cortex-M3, p. 141, 142
+// Enables all exceptions except hard fault and NMI
+inline void __nesc_enable_interrupt() __attribute__((always_inline))
+{
+	__nesc_atomic_t newState = 0;
+
+	asm volatile(
+		"msr primask, %0"
+		: // output
+		: "r" (newState) // input
+	);
+}
+
+// See definitive guide to Cortex-M3, p. 141, 142
+// Disables all exceptions except hard fault and NMI
+inline void __nesc_disable_interrupt() __attribute__((always_inline))
+{
+	__nesc_atomic_t newState = 1;
+
+	asm volatile(
+		"msr primask, %0"
+		: // output
+		: "r" (newState) // input
+	);
+}
+
+#endif // CORTEXM3_HARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/FunctionWrapper.nc b/tos/chips/cortex/m3/sam3/FunctionWrapper.nc
new file mode 100644
index 00000000..3a6912ca
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/FunctionWrapper.nc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the CSIRO nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Kevin Klues <Kevin.Klues@csiro.au>
+ */
+
+interface FunctionWrapper {
+  async command void preamble();
+  async command void postamble();
+}
diff --git a/tos/chips/cortex/m3/sam3/Sam3LowPower.nc b/tos/chips/cortex/m3/sam3/Sam3LowPower.nc
new file mode 100644
index 00000000..cb4258b3
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/Sam3LowPower.nc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * @author Kevin Klues <Kevin.Klues@csiro.au>
+ */
+
+interface Sam3LowPower {
+  async command void configure();
+  async event void customizePio();
+}
diff --git a/tos/chips/cortex/m3/sam3/eefc/HplSam3Eefc.nc b/tos/chips/cortex/m3/sam3/eefc/HplSam3Eefc.nc
new file mode 100644
index 00000000..5fb52d32
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/eefc/HplSam3Eefc.nc
@@ -0,0 +1,41 @@
+/*                                                                      
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Kevin Klues <Kevin.Klues@csiro.au>
+ */
+interface HplSam3Eefc {
+  command error_t read(void* addr, void* buf, uint16_t size);
+  command error_t write(void* addr, void* buf, uint16_t size);
+  command error_t erase();
+}
diff --git a/tos/chips/cortex/m3/sam3/eefc/HplSam3EefcC.nc b/tos/chips/cortex/m3/sam3/eefc/HplSam3EefcC.nc
new file mode 100644
index 00000000..22d9e384
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/eefc/HplSam3EefcC.nc
@@ -0,0 +1,181 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Kevin Klues <Kevin.Klues@csiro.au>
+ */
+
+#include "sam3eefchardware.h"
+
+generic module HplSam3EefcC(uint32_t eefc_base, uint32_t base_addr, uint32_t page_size, uint32_t total_size) {
+  provides interface Init;
+  provides interface InternalFlash;
+  provides interface HplSam3Eefc;
+}
+
+implementation {
+  volatile eefc_t *EEFC;
+  // Temporary holder as we build the flash cmd register
+  eefc_fcr_t fcr;
+  // Shouldn't need this temp_buf (i.e. we should be able to write 
+  // directly to the base_addr)
+  // Doesn't seem to work without it though...
+  uint8_t temp_buf[page_size]; 
+  
+  __attribute__((noinline)) uint32_t sendCommand(uint8_t cmd, uint32_t arg) {
+    while(!EEFC->fsr.bits.frdy);
+    fcr.bits.fkey = EFFC_FCR_KEY; // Set the key required to send commands
+    fcr.bits.farg = arg;
+    fcr.bits.fcmd = cmd;
+    EEFC->fcr = fcr;
+    while(!EEFC->fsr.bits.frdy);
+    return EEFC->frr.flat;
+  }
+
+  bool getGpnvmBit(uint8_t bit) {
+    return sendCommand(EFFC_FCMD_GET_GPNVM, 0) & (1 << bit);
+  }
+
+  void eraseIFlash() {
+    sendCommand(EFFC_FCMD_ERASE_ALL, 0);
+  }
+
+  void eraseWriteIFlashPage(void* buf, uint32_t page) {
+    // Write the buffer into the internal flash's latch buffer
+    // by writing it to the base address for this flash region
+    memcpy((void*)base_addr, buf, page_size);
+    sendCommand(EFFC_FCMD_ERASE_PAGE_WRITE_PAGE, page);
+  }
+
+  __attribute__((noinline)) error_t doIFlashWrite(void* saddr, void* buf, uint16_t size) {
+    int i;
+    uint8_t *aligned_saddr = ROUNDDOWN(saddr, page_size);
+    uint8_t *aligned_eaddr = ROUNDDOWN(saddr+size-1, page_size);
+    uint16_t soffset = (uint32_t)saddr - (uint32_t)aligned_saddr;
+    uint16_t next_page = ((uint32_t)aligned_saddr - base_addr)/page_size;
+    uint16_t npages = ((uint32_t)(aligned_eaddr-aligned_saddr))/page_size + 1;
+
+    // If nothing to write, just return SUCCESS
+    if(size == 0)
+      return SUCCESS;
+
+    if(((uint32_t)saddr + size) > (base_addr + total_size))
+      return ESIZE;
+
+    // Make sure there are no outstanding requests
+    while(!EEFC->fsr.bits.frdy);
+
+    // Prepare the temporary buffer with the contents of the first page
+    // Preserve original contents at the front
+    memcpy(temp_buf, aligned_saddr, soffset); 
+    // If the whole buffer fits within the first page
+    if(aligned_saddr == aligned_eaddr) {
+      //Write new contents to the middle
+      memcpy(temp_buf+soffset, buf, size); 
+      // Preserve contents to the end
+      memcpy(temp_buf+soffset+size, aligned_saddr+soffset+size, page_size-soffset-size); 
+    }
+    else 
+      // Write new contents to the end
+      memcpy(temp_buf+soffset, buf, page_size-soffset); 
+
+    // Write the first page
+    eraseWriteIFlashPage(temp_buf, next_page);
+
+    // If there was only one page, we're done
+    if(aligned_saddr == aligned_eaddr)
+      return SUCCESS;
+
+    // Otherwise update variables and move onto the next page
+    buf+=page_size-soffset;
+    size-=page_size-soffset;
+    next_page++;
+
+    // Write all remaining pages except for the last one which may
+    // have some alignment issues
+    for(i=0; i<npages-2; i++) {
+      eraseWriteIFlashPage(buf, next_page);
+      buf+=page_size;
+      size-=page_size;
+      next_page++;
+    }
+
+    // Write the last page like this if the remainder of the buffer
+    // doesn't fill the whole page
+    if(size < page_size) {
+      memcpy(temp_buf, buf, size);
+      memcpy(temp_buf+size, aligned_eaddr+size, page_size-size);
+      eraseWriteIFlashPage(temp_buf, next_page);
+    }
+    // Otherwise just write the whole last page from the buffer
+    else 
+      eraseWriteIFlashPage(buf, next_page);
+
+    return SUCCESS;
+  }
+
+  error_t doIFlashErase() {
+  }
+
+  command error_t Init.init() {
+    EEFC = (volatile eefc_t*) eefc_base;
+    EEFC->fmr.bits.frdy = 0;   // Don't generate an frdy interrupt
+    EEFC->fmr.bits.fws = 2;    // use 3 wait states
+    EEFC->fmr.bits.fam = 0;    // enhance for performance
+    return SUCCESS;
+  }
+
+  command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) {
+    return doIFlashWrite(addr, buf, size);
+  }
+
+  command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) {
+    memcpy(buf, addr, size);
+    return SUCCESS;
+  }
+
+  command error_t HplSam3Eefc.write(void* addr, void* buf, uint16_t size) {
+    return doIFlashWrite(addr, buf, size);
+  }
+
+  command error_t HplSam3Eefc.read(void* addr, void* buf, uint16_t size) {
+    memcpy(buf, addr, size);
+    return SUCCESS;
+  }
+
+  command error_t HplSam3Eefc.erase() {
+    eraseIFlash();
+    return SUCCESS;
+  }
+}
+
diff --git a/tos/chips/cortex/m3/sam3/eefc/Sam3EefcC.nc b/tos/chips/cortex/m3/sam3/eefc/Sam3EefcC.nc
new file mode 100644
index 00000000..0b696b2f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/eefc/Sam3EefcC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Kevin Klues <Kevin.Klues@csiro.au>
+ */
+
+#include "AT91SAM3U4.h"
+#include "sam3eefchardware.h"
+
+configuration Sam3EefcC {
+  provides {
+    interface Init as InitIFlash0;
+    interface Init as InitIFlash1;
+    interface InternalFlash as InternalFlash0;
+    interface InternalFlash as InternalFlash1;
+  }
+}
+implementation {
+  components new HplSam3EefcC((uint32_t)AT91C_BASE_EFC0, AT91C_IFLASH0, 
+                               AT91C_IFLASH0_PAGE_SIZE, AT91C_IFLASH0_SIZE) as IFlash0;
+  components new HplSam3EefcC((uint32_t)AT91C_BASE_EFC1, AT91C_IFLASH1, 
+                               AT91C_IFLASH1_PAGE_SIZE, AT91C_IFLASH1_SIZE) as IFlash1;
+  InitIFlash0 = IFlash0;
+  InitIFlash1 = IFlash1;
+  InternalFlash0 = IFlash0;
+  InternalFlash1 = IFlash1;
+}
diff --git a/tos/chips/cortex/m3/sam3/eefc/eefchardware.h b/tos/chips/cortex/m3/sam3/eefc/eefchardware.h
new file mode 100644
index 00000000..17e4dff7
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/eefc/eefchardware.h
@@ -0,0 +1,139 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Enhanced Embedded Flash Controller register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef _EFFCHARDWARE_H
+#define _EFFCHARDWARE_H
+
+/**
+ * EEFC Flash Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 315
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t frdy        :  1; // ready interrupt enable
+        uint8_t reserved0   :  7;
+        uint8_t fws         :  4; // flash wait state
+        uint8_t reserved1   :  4;
+        uint8_t reserved2   :  8;
+        uint8_t fam         :  1; // flash access mode
+        uint8_t reserved3   :  7;
+    } __attribute__((__packed__)) bits;
+} eefc_fmr_t;
+
+/**
+ * EEFC Flash Command Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 316
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t  fcmd       :  8; // flash command
+        uint16_t farg       : 16; // flash command argument
+        uint8_t  fkey       :  8; // flash writing protection key, has to be written as 0x5A!
+    } __attribute__((__packed__)) bits;
+} eefc_fcr_t;
+
+// For more details on the flash commands, see AT91 ARM Cortex-M3 based
+// Microcontrollers SAM3U Series, Preliminary, p. 309
+#define EFFC_FCMD_GET_FLASH_DESCRIPTOR         0x0
+#define EFFC_FCMD_WRITE_PAGE                   0x1
+#define EFFC_FCMD_WRITE_PAGE_LOCK              0x2
+#define EFFC_FCMD_ERASE_PAGE_WRITE_PAGE        0x3
+#define EFFC_FCMD_ERASE_PAGE_WRITE_PAGE_LOCK   0x4
+#define EFFC_FCMD_ERASE_ALL                    0x5
+#define EFFC_FCMD_SET_LOCK                     0x8
+#define EFFC_FCMD_CLEAR_LOCK                   0x9
+#define EFFC_FCMD_GET_LOCK                     0xA
+#define EFFC_FCMD_SET_GPNVM                    0xB
+#define EFFC_FCMD_CLEAR_GPNVM                  0xC
+#define EFFC_FCMD_GET_GPNVM                    0xD
+#define EFFC_FCMD_START_READ_UNIQUE_ID         0xE
+#define EFFC_FCMD_STOP_READ_UNIQUE_ID          0xF
+
+#define EFFC_FCR_KEY                           0x5A
+ 
+/**
+ * EEFC Flash Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 317
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t frdy              :  1; // flash ready status
+        uint8_t fcmde             :  1; // flash command error status
+        uint8_t flocke            :  1; // flash lock error status
+        uint8_t reserved0         :  5;
+        uint8_t reserved1         :  8;
+        uint16_t reserved2        : 16;
+    } __attribute__((__packed__)) bits;
+} eefc_fsr_t;
+ 
+/**
+ * EEFC Flash Result Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 318
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t fvalue  : 32; // flash result value
+    } __attribute__((__packed__)) bits;
+} eefc_frr_t;
+ 
+/**
+ * EEFC Register definition, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary, p. 314
+ */
+
+typedef struct effc
+{
+    volatile eefc_fmr_t fmr; // EEFC Flash Mode Register
+    volatile eefc_fcr_t fcr; // EEFC Flash Command Register
+    volatile eefc_fsr_t fsr; // EEFC Flash Status Register
+    volatile eefc_frr_t frr; // EEFC Flash Result Register
+} eefc_t;
+
+
+#endif // _EFFCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/matrix/matrixhardware.h b/tos/chips/cortex/m3/sam3/matrix/matrixhardware.h
new file mode 100644
index 00000000..8f3cceb2
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/matrix/matrixhardware.h
@@ -0,0 +1,167 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Bus Matrix register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef _MATRIXHARDWARE_H
+#define _MATRIXHARDWARE_H
+
+
+/**
+ * Bus Matrix Master Configuration Register, AT91 ARM Cortex-M3 based
+ * Microcontrollers SAM3U Series, Preliminary, p. 341
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t ulbt       :  3; // undefined length burst type
+        uint8_t reserved0  :  5;
+        uint8_t reserved1  :  8;
+        uint16_t reserved2 : 16;
+    }__attribute__((__packed__)) bits;
+} matrix_mcfg_t;
+
+#define MATRIX_MCFG_ULBT_INFINITE_BURST      0x0
+#define MATRIX_MCFG_ULBT_SINGLE_ACCESS       0x1
+#define MATRIX_MCFG_ULBT_FOUR_BEAT_BURST     0x2
+#define MATRIX_MCFG_ULBT_EIGHT_BEAT_BURST    0x3
+#define MATRIX_MCFG_ULBT_SIXTEEN_BEAT_BURST  0x4
+
+/**
+ * Bus Matrix Slave Configuration Register, AT91 ARM Cortex-M3 based
+ * Microcontrollers SAM3U Series, Preliminary, p. 342
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t slot_cycle   :  8; // maximum number of allowed cycles for a burst
+        uint8_t reserved0    :  8;
+        uint8_t defmstr_type :  2; // default master type
+        uint8_t fixed_defmstr:  3; // fixed default master
+        uint8_t reserved1    :  3;
+        uint8_t arbt         :  2; // arbitration type
+        uint8_t reserved2    :  6;
+    }__attribute__((__packed__)) bits;
+} matrix_scfg_t;
+
+#define MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT     0x0
+#define MATRIX_SCFG_MASTER_TYPE_LAST_DEFAULT   0x1
+#define MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT  0x2
+
+#define MATRIX_SCFG_ARBT_ROUND_ROBINT          0x0
+#define MATRIX_SCFG_ARBT_FIXED_PRIO            0x1
+
+
+/**
+ * Bus Matrix Priority Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 343
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t m0pr         : 2; // master 0 priority
+        uint8_t reserved0    : 2;
+        uint8_t m1pr         : 2; // master 1 priority
+        uint8_t reserved1    : 2;
+        uint8_t m2pr         : 2; // master 2 priority
+        uint8_t reserved2    : 2;
+        uint8_t m3pr         : 2; // master 3 priority
+        uint8_t reserved3    : 2;
+        uint8_t m4pr         : 2; // master 4 priority
+        uint8_t reserved4    : 6;
+        uint8_t reserved5    : 8;
+    }__attribute__((__packed__)) bits;
+} matrix_pras_t;
+
+/**
+ * Bus Matrix Master Remap Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 344
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t rcb0        :  1; // remap command bit for ahb master 0
+        uint8_t rcb1        :  1; // remap command bit for ahb master 1
+        uint8_t rcb2        :  1; // remap command bit for ahb master 2
+        uint8_t rcb3        :  1; // remap command bit for ahb master 3
+        uint8_t rcb4        :  1; // remap command bit for ahb master 4
+        uint8_t reserved0   :  3;
+        uint8_t reserved1   :  8;
+        uint16_t reserved2  : 16;
+    }__attribute__((__packed__)) bits;
+} matrix_mrcr_t;
+
+/**
+ * Bus Matrix Write Protection Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 350
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+      uint32_t wpen       :  1;
+      uint32_t reserved0  :  7;
+      uint32_t wpkey      : 24;
+    }__attribute__((__packed__)) bits;
+} matrix_wpmr_t;
+
+/**
+ * Bus Matrix Write Protection Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 350
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+      uint8_t wpvs       :  1;
+      uint8_t reserved0  :  7;
+      uint16_t wpkey     : 16;
+      uint8_t reserved1  :  8;
+    }__attribute__((__packed__)) bits;
+} matrix_wpsr_t;
+
+
+
+#endif // _MATRIXHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/nvic/HplNVICCntl.nc b/tos/chips/cortex/m3/sam3/nvic/HplNVICCntl.nc
new file mode 100644
index 00000000..60a07978
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/nvic/HplNVICCntl.nc
@@ -0,0 +1,65 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Control interface for the NVIC.
+ *
+ * @author Thomas Schmid
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+interface HplNVICCntl
+{
+    command void setPriorityGrouping(uint32_t priority_grouping);
+
+	async command void enableUsageFault();
+	async command void disableUsageFault();
+	async command void enableBusFault();
+	async command void disableBusFault();
+	async command void enableMemoryProtectionFault();
+	async command void disableMemoryProtectionFault();
+
+	async command bool isSVCallPended();
+	async command bool isUsageFaultPended();
+	async command bool isBusFaultPended();
+	async command bool isMemoryProtectionFaultPended();
+
+	async command bool isSysTickActive();
+	async command bool isPendSVActive();
+	async command bool isMonitorActive();
+	async command bool isSVCallActive();
+	async command bool isUsageFaultActive();
+	async command bool isBusFaultActive();
+	async command bool isMemoryProtectionFaultActive();
+
+	command void setSVCallPrio(uint8_t prio);
+	command void setPendSVPrio(uint8_t prio);
+}
diff --git a/tos/chips/cortex/m3/sam3/nvic/HplNVICCntlP.nc b/tos/chips/cortex/m3/sam3/nvic/HplNVICCntlP.nc
new file mode 100644
index 00000000..df6f3cc2
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/nvic/HplNVICCntlP.nc
@@ -0,0 +1,163 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * NVIC Controller
+ *
+ * @author Thomas Schmid
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#include "nvichardware.h"
+
+module HplNVICCntlP
+{
+    provides interface HplNVICCntl;
+    provides interface Init;
+}
+
+implementation{
+    command void HplNVICCntl.setPriorityGrouping(uint32_t priority_grouping)
+    {
+        uint32_t reg_value=0;
+
+        reg_value  = SCB->AIRCR;                                                                            /* read old register configuration    */
+        reg_value &= ~((0xFFFFU << 16) | (0x0F << 8));                                                      /* clear bits to change               */
+        reg_value  = ((reg_value | NVIC_AIRCR_VECTKEY | (priority_grouping << 8)));                         /* Insert write key and priorty group */
+        SCB->AIRCR = reg_value;
+    }
+
+	async command void HplNVICCntl.enableUsageFault()
+	{
+		SCB->SHCSR.bits.usgfaultena = 1;
+	}
+
+	async command void HplNVICCntl.disableUsageFault()
+	{
+		SCB->SHCSR.bits.usgfaultena = 0;
+	}
+
+	async command void HplNVICCntl.enableBusFault()
+	{
+		SCB->SHCSR.bits.busfaultena = 1;
+	}
+
+	async command void HplNVICCntl.disableBusFault()
+	{
+		SCB->SHCSR.bits.busfaultena = 0;
+	}
+
+	async command void HplNVICCntl.enableMemoryProtectionFault()
+	{
+		SCB->SHCSR.bits.memfaultena = 1;
+	}
+
+	async command void HplNVICCntl.disableMemoryProtectionFault()
+	{
+		SCB->SHCSR.bits.memfaultena = 0;
+	}
+
+
+	async command bool HplNVICCntl.isSVCallPended()
+	{
+		return (SCB->SHCSR.bits.svcallpended == 0x1);
+	}
+
+	async command bool HplNVICCntl.isUsageFaultPended()
+	{
+		return (SCB->SHCSR.bits.usgfaultpended == 0x1);
+	}
+
+	async command bool HplNVICCntl.isBusFaultPended()
+	{
+		return (SCB->SHCSR.bits.busfaultpended == 0x1);
+	}
+
+	async command bool HplNVICCntl.isMemoryProtectionFaultPended()
+	{
+		return (SCB->SHCSR.bits.memfaultpended == 0x1);
+	}
+
+
+	async command bool HplNVICCntl.isSysTickActive()
+	{
+		return (SCB->SHCSR.bits.systickact == 0x1);
+	}
+
+	async command bool HplNVICCntl.isPendSVActive()
+	{
+		return (SCB->SHCSR.bits.pendsvact == 0x1);
+	}
+
+	async command bool HplNVICCntl.isMonitorActive()
+	{
+		return (SCB->SHCSR.bits.monitoract == 0x1);
+	}
+
+	async command bool HplNVICCntl.isSVCallActive()
+	{
+		return (SCB->SHCSR.bits.svcallact == 0x1);
+	}
+
+	async command bool HplNVICCntl.isUsageFaultActive()
+	{
+		return (SCB->SHCSR.bits.usgfaultact == 0x1);
+	}
+
+	async command bool HplNVICCntl.isBusFaultActive()
+	{
+		return (SCB->SHCSR.bits.busfaultact == 0x1);
+	}
+
+	async command bool HplNVICCntl.isMemoryProtectionFaultActive()
+	{
+		return (SCB->SHCSR.bits.memfaultact == 0x1);
+	}
+
+	command void HplNVICCntl.setSVCallPrio(uint8_t prio)
+	{
+		(SCB->SHP)[7] = prio;
+	}
+
+	command void HplNVICCntl.setPendSVPrio(uint8_t prio)
+	{
+		(SCB->SHP)[10] = prio;
+	}
+
+	command error_t Init.init()
+	{
+		// both SVCall and PendSV have the same, lowest prio in the system
+		call HplNVICCntl.setSVCallPrio(0xff);
+		call HplNVICCntl.setPendSVPrio(0xff);
+
+		return SUCCESS;
+	}
+}
diff --git a/tos/chips/cortex/m3/sam3/nvic/HplNVICInterruptCntl.nc b/tos/chips/cortex/m3/sam3/nvic/HplNVICInterruptCntl.nc
new file mode 100644
index 00000000..3f01d35a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/nvic/HplNVICInterruptCntl.nc
@@ -0,0 +1,58 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is an interface to configure one particular interrupt of the Nested
+ * Vectored Interrupt Controller.
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplNVICInterruptCntl
+{
+    async command void configure(uint32_t priority);
+
+    async command void enable();
+
+    async command void disable();
+
+    async command bool isPending();
+
+    async command void setPending();
+
+    async command void clearPending();
+
+    async command uint32_t getActive();
+
+    async command void setPriority(uint32_t priority);
+
+    async command uint32_t getPriority();
+}
diff --git a/tos/chips/cortex/m3/sam3/nvic/HplNVICInterruptP.nc b/tos/chips/cortex/m3/sam3/nvic/HplNVICInterruptP.nc
new file mode 100644
index 00000000..7de1b137
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/nvic/HplNVICInterruptP.nc
@@ -0,0 +1,109 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Generic module representing an NVIC interrupt.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "nvichardware.h"
+
+generic module HplNVICInterruptP (irqn_t irqn) @safe()
+{
+        provides
+        {
+            interface HplNVICInterruptCntl as Cntl;
+        }
+}
+
+implementation
+{
+
+    async command void Cntl.configure(uint32_t priority){
+        unsigned int priGroup = __NVIC_PRIO_BITS;
+        unsigned int nPre = 8 - priGroup;
+        unsigned int nSub = priGroup;
+        unsigned int preemptionPriority;
+        unsigned int subPriority;
+        unsigned int IRQpriority;
+
+        preemptionPriority = (priority & 0xff00) >> 8;
+        subPriority = (priority & 0xff);
+
+        // Disable the interrupt first
+        call Cntl.disable();
+
+        // Clear any pending status
+        call Cntl.clearPending();
+
+        if (subPriority >= (0x01 << nSub))
+            subPriority = (0x01 << nSub) - 1;
+        if (preemptionPriority >= (0x01 << nPre))
+            preemptionPriority = (0x01 << nPre) - 1;
+
+        IRQpriority = (subPriority | (preemptionPriority << nSub));
+        call Cntl.setPriority(IRQpriority);
+    }
+
+    inline async command void Cntl.enable(){
+        NVIC->iser0 = (1 << ((uint32_t)(irqn) & 0x1F));                             /* enable interrupt */
+    }
+
+    inline async command void Cntl.disable(){
+        NVIC->icer0 = (1 << ((uint32_t)(irqn) & 0x1F));                             /* disable interrupt */
+    }
+
+    inline async command bool Cntl.isPending(){
+        return((irqn_t) (NVIC->ispr0 & (1 << ((uint32_t)(irqn) & 0x1F))));         /* Return Interrupt bit or 'zero' */
+    }
+
+    inline async command void Cntl.setPending(){
+        NVIC->ispr0 = (1 << ((uint32_t)(irqn) & 0x1F));                             /* set interrupt pending */
+    }
+
+    inline async command void Cntl.clearPending(){
+        NVIC->icpr0 = (1 << ((uint32_t)(irqn) & 0x1F));
+    }
+
+    inline async command uint32_t Cntl.getActive(){
+        return((irqn_t)(NVIC->iabr0 & (1 << ((uint32_t)(irqn) & 0x1F))));                        /* Return Interruptnumber or 'zero' */
+    }
+
+    inline async command void Cntl.setPriority(uint32_t priority){
+        NVIC->ip[(uint32_t)(irqn)] = (priority & 0xff);
+    }
+
+    inline async command uint32_t Cntl.getPriority(){
+        return((uint32_t)(NVIC->ip[(uint32_t)(irqn)] >> (8 - __NVIC_PRIO_BITS)));
+    }
+
+}
diff --git a/tos/chips/cortex/m3/sam3/nvic/nvichardware.h b/tos/chips/cortex/m3/sam3/nvic/nvichardware.h
new file mode 100644
index 00000000..d1642929
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/nvic/nvichardware.h
@@ -0,0 +1,149 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Header definition for the Nested Vector Interrupt Controller.
+ *
+ * @author Thomas Schmid
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#ifndef NVICHARDWARE_H
+#define NVICHARDWARE_H
+
+#define __NVIC_PRIO_BITS    4               /*!< standard definition for NVIC Priority Bits */
+
+#define NVIC_AIRCR_VECTKEY    (0x5FA << 16)   /*!< AIRCR Key for write access   */
+
+/**
+ *  IO definitions
+ * 
+ * define access restrictions to peripheral registers
+ **/
+
+#define     __I     volatile const            /*!< defines 'read only' permissions      */
+#define     __O     volatile                  /*!< defines 'write only' permissions     */
+#define     __IO    volatile                  /*!< defines 'read / write' permissions   */
+
+
+/* memory mapping struct for Nested Vectored Interrupt Controller (NVIC) */
+typedef struct
+{
+  volatile uint32_t iser0;              // Interrupt Set Enable
+           uint32_t reserved[31];
+  volatile uint32_t icer0;              // Interrupt Clear-enable
+           uint32_t reserved1[31];
+  volatile uint32_t ispr0;              // Interrupt Set-pending
+           uint32_t reserved2[31];
+  volatile uint32_t icpr0;              // Interrupt Clear-pending
+           uint32_t reserved3[31];
+  volatile uint32_t iabr0;              // Interrupt Active Bit
+           uint32_t reserved4[63];
+  volatile uint8_t  ip[32];             // Interrupt Priority Registers
+           uint32_t reserved5[696];
+  volatile uint32_t stir;               // Software Trigger Interrupt
+}  nvic_t;
+
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint8_t		memfaultact:	1;
+		uint8_t		busfaultact:	1;
+		uint8_t		reserved0:		1;
+		uint8_t		usgfaultact:	1;
+		uint8_t		reserved1:		3;
+		uint8_t		svcallact:		1;
+		uint8_t		monitoract:		1;
+		uint8_t		reserved2:		1;
+		uint8_t		pendsvact:		1;
+		uint8_t		systickact:		1;
+		uint8_t		usgfaultpended:	1;
+		uint8_t		memfaultpended:	1;
+		uint8_t		busfaultpended:	1;
+		uint8_t		svcallpended:	1;
+		uint8_t		memfaultena:	1;
+		uint8_t		busfaultena:	1;
+		uint8_t		usgfaultena:	1;
+		uint16_t	reserved3:	13;
+	} __attribute__((__packed__)) bits;
+} nvic_shcsr_t;
+
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t reserved0        : 1;
+        uint32_t sleeonexit       : 1;
+        uint32_t sleepdeep        : 1;
+        uint32_t reserved1        : 1;
+        uint32_t sevonpend        : 1;
+        uint32_t reserved2        : 27;
+    } __attribute__((__packed__)) bits;
+} scr_t;
+
+/* memory mapping struct for System Control Block */
+typedef struct
+{
+    __I  uint32_t CPUID;                        /*!< CPU ID Base Register                                     */
+    __IO uint32_t ICSR;                         /*!< Interrupt Control State Register                         */
+    __IO uint32_t VTOR;                         /*!< Vector Table Offset Register                             */
+    __IO uint32_t AIRCR;                        /*!< Application Interrupt / Reset Control Register           */
+    __IO scr_t scr;                             /*!< System Control Register                                  */
+    __IO uint32_t CCR;                          /*!< Configuration Control Register                           */
+    __IO uint8_t  SHP[12];                      /*!< System Handlers Priority Registers (4-7, 8-11, 12-15)    */
+    __IO nvic_shcsr_t SHCSR;                    /*!< System Handler Control and State Register                */
+    __IO uint32_t CFSR;                         /*!< Configurable Fault Status Register                       */
+    __IO uint32_t HFSR;                         /*!< Hard Fault Status Register                               */
+    __IO uint32_t DFSR;                         /*!< Debug Fault Status Register                              */
+    __IO uint32_t MMFAR;                        /*!< Mem Manage Address Register                              */
+    __IO uint32_t BFAR;                         /*!< Bus Fault Address Register                               */
+    __IO uint32_t AFSR;                         /*!< Auxiliary Fault Status Register                          */
+    __I  uint32_t PFR[2];                       /*!< Processor Feature Register                               */
+    __I  uint32_t DFR;                          /*!< Debug Feature Register                                   */
+    __I  uint32_t ADR;                          /*!< Auxiliary Feature Register                               */
+    __I  uint32_t MMFR[4];                      /*!< Memory Model Feature Register                            */
+    __I  uint32_t ISAR[5];                      /*!< ISA Feature Register                                     */
+} scb_t;
+
+
+/* Memory mapping of Cortex-M3 Hardware */
+volatile nvic_t* NVIC = (volatile nvic_t *) 0xE000E100; // NVIC Base Address
+
+#define SCS_BASE            (0xE000E000)                  /*!< System Control Space Base Address    */
+#define SCB_BASE            (SCS_BASE +  0x0D00)          /*!< System Control Block Base Address    */
+
+#define SCB                 ((scb_t*)   SCB_BASE)         /*!< SCB configuration struct             */
+
+
+#endif // SAM3UNVICHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/pdc/HplSam3Pdc.nc b/tos/chips/cortex/m3/sam3/pdc/HplSam3Pdc.nc
new file mode 100644
index 00000000..7f8519a0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pdc/HplSam3Pdc.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+interface HplSam3Pdc {
+
+  /* Pointer Registers */
+  async command void setRxPtr(void* addr);
+  async command void setTxPtr(void* addr);
+  async command void setNextRxPtr(void* addr);
+  async command void setNextTxPtr(void* addr);
+
+  async command uint32_t getRxPtr();
+  async command uint32_t getTxPtr();
+  async command uint32_t getNextRxPtr();
+  async command uint32_t getNextTxPtr();
+
+  /* Counter Registers */
+  async command void setRxCounter(uint16_t counter);
+  async command void setTxCounter(uint16_t counter);
+  async command void setNextRxCounter(uint16_t counter);
+  async command void setNextTxCounter(uint16_t counter);
+
+  async command uint16_t getRxCounter();
+  async command uint16_t getTxCounter();
+  async command uint16_t getNextRxCounter();
+  async command uint16_t getNextTxCounter();
+
+  /* Enable / Disable Register */
+  async command void enablePdcRx();
+  async command void enablePdcTx();
+  async command void disablePdcRx();
+  async command void disablePdcTx();
+
+  /* Status Registers  - Checks status */
+  async command bool rxEnabled();
+  async command bool txEnabled();
+
+}
diff --git a/tos/chips/cortex/m3/sam3/pdc/HplSam3PdcP.nc b/tos/chips/cortex/m3/sam3/pdc/HplSam3PdcP.nc
new file mode 100644
index 00000000..e1f20674
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pdc/HplSam3PdcP.nc
@@ -0,0 +1,189 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "pdchardware.h"
+
+generic module HplSam3PdcP(uint32_t BASE_ADDR){
+  provides interface HplSam3Pdc as Pdc;
+}
+implementation{
+
+  uint32_t PDC_BASE_ADDR = (BASE_ADDR + 0x100);
+
+  async command void Pdc.setRxPtr(void* addr){
+    volatile periph_rpr_t* RPR = (volatile periph_rpr_t*) (PDC_BASE_ADDR + 0x0);
+    periph_rpr_t rpr;
+    rpr.bits.rxptr = (uint32_t)addr;
+    *RPR = rpr;
+  }
+
+  async command void Pdc.setTxPtr(void* addr){
+    volatile periph_tpr_t* TPR = (volatile periph_tpr_t*) (PDC_BASE_ADDR + 0x8);
+    periph_tpr_t tpr;
+    tpr.bits.txptr = (uint32_t)addr;
+    *TPR = tpr;
+  }
+
+  async command void Pdc.setNextRxPtr(void* addr){
+    volatile periph_rnpr_t* RNPR = (volatile periph_rnpr_t*) (PDC_BASE_ADDR + 0x10);
+    periph_rnpr_t rnpr;
+    rnpr.bits.rxnptr = (uint32_t)addr;
+    *RNPR = rnpr;
+  }
+
+  async command void Pdc.setNextTxPtr(void* addr){
+    volatile periph_tnpr_t* TNPR = (volatile periph_tnpr_t*) (PDC_BASE_ADDR + 0x18);
+    periph_tnpr_t tnpr;
+    tnpr.bits.txnptr = (uint32_t)addr;
+    *TNPR = tnpr;
+  }
+
+  async command uint32_t Pdc.getRxPtr(){
+    volatile periph_rpr_t* RPR = (volatile periph_rpr_t*) (PDC_BASE_ADDR + 0x0);
+    return RPR->bits.rxptr;
+  }
+
+  async command uint32_t Pdc.getTxPtr(){
+    volatile periph_tpr_t* TPR = (volatile periph_tpr_t*) (PDC_BASE_ADDR + 0x8);
+    return TPR->bits.txptr;
+  }
+
+  async command uint32_t Pdc.getNextRxPtr(){
+    volatile periph_rnpr_t* RNPR = (volatile periph_rnpr_t*) (PDC_BASE_ADDR + 0x10);
+    return RNPR->bits.rxnptr;
+  }
+
+  async command uint32_t Pdc.getNextTxPtr(){
+    volatile periph_tnpr_t* TNPR = (volatile periph_tnpr_t*) (PDC_BASE_ADDR + 0x18);
+    return TNPR->bits.txnptr;
+  }
+
+  async command uint16_t Pdc.getRxCounter(){
+    volatile periph_rcr_t* RCR = (volatile periph_rcr_t*) (PDC_BASE_ADDR + 0x4);
+    return RCR->bits.rxctr;
+  }
+
+  async command uint16_t Pdc.getTxCounter(){
+    volatile periph_tcr_t* TCR = (volatile periph_tcr_t*) (PDC_BASE_ADDR + 0xC);
+    return TCR->bits.txctr;
+  }
+
+  async command uint16_t Pdc.getNextRxCounter(){
+    volatile periph_rncr_t* RNCR = (volatile periph_rncr_t*) (PDC_BASE_ADDR + 0x14);
+    return RNCR->bits.rxnctr;
+  }
+
+  async command uint16_t Pdc.getNextTxCounter(){
+    volatile periph_tncr_t* TNCR = (volatile periph_tncr_t*) (PDC_BASE_ADDR + 0x1C);
+    return TNCR->bits.txnctr;
+  }
+
+  async command void Pdc.setRxCounter(uint16_t counter){
+    volatile periph_rcr_t* RCR = (volatile periph_rcr_t*) (PDC_BASE_ADDR + 0x4);
+    periph_rcr_t rcr;
+    rcr.bits.rxctr = counter;
+    *RCR = rcr;
+  }
+
+  async command void Pdc.setTxCounter(uint16_t counter){
+    volatile periph_tcr_t* TCR = (volatile periph_tcr_t*) (PDC_BASE_ADDR + 0xC);
+    periph_tcr_t tcr;
+    tcr.bits.txctr = counter;
+    *TCR = tcr;
+  }
+
+  async command void Pdc.setNextRxCounter(uint16_t counter){
+    volatile periph_rncr_t* RNCR = (volatile periph_rncr_t*) (PDC_BASE_ADDR + 0x14);
+    periph_rncr_t rncr;
+    rncr.bits.rxnctr = counter;
+    *RNCR = rncr;
+  }
+
+  async command void Pdc.setNextTxCounter(uint16_t counter){
+    volatile periph_tncr_t* TNCR = (volatile periph_tncr_t*) (PDC_BASE_ADDR + 0x1C);
+    periph_tncr_t tncr;
+    tncr.bits.txnctr = counter;
+    *TNCR = tncr;
+  }
+
+  async command void Pdc.enablePdcRx(){
+    volatile periph_ptcr_t* PTCR = (volatile periph_ptcr_t*) (PDC_BASE_ADDR + 0x20);
+    periph_ptcr_t ptcr;
+    ptcr.bits.rxten = 1;
+    *PTCR = ptcr;
+  }
+
+  async command void Pdc.enablePdcTx(){
+    volatile periph_ptcr_t* PTCR = (volatile periph_ptcr_t*) (PDC_BASE_ADDR + 0x20);
+    periph_ptcr_t ptcr;
+    ptcr.bits.txten = 1;
+    *PTCR = ptcr;
+  }
+
+  async command void Pdc.disablePdcRx(){
+    volatile periph_ptcr_t* PTCR = (volatile periph_ptcr_t*) (PDC_BASE_ADDR + 0x20);
+    periph_ptcr_t ptcr;
+    ptcr.bits.rxtdis = 1;
+    *PTCR = ptcr;
+  }
+
+  async command void Pdc.disablePdcTx(){
+    volatile periph_ptcr_t* PTCR = (volatile periph_ptcr_t*) (PDC_BASE_ADDR + 0x20);
+    periph_ptcr_t ptcr;
+    ptcr.bits.txtdis = 1;
+    *PTCR = ptcr;
+  }
+
+  async command bool Pdc.rxEnabled(){
+    volatile periph_ptsr_t* PTSR = (volatile periph_ptsr_t*) (PDC_BASE_ADDR + 0x24);
+    periph_ptsr_t ptsr = *PTSR;
+    if(ptsr.bits.rxten){
+      return TRUE;
+    }else{
+      return FALSE;
+    }
+  }
+
+  async command bool Pdc.txEnabled(){
+    volatile periph_ptsr_t* PTSR = (volatile periph_ptsr_t*) (PDC_BASE_ADDR + 0x24);
+    periph_ptsr_t ptsr = *PTSR;
+    if(ptsr.bits.txten){
+      return TRUE;
+    }else{
+      return FALSE;
+    }
+  }
+
+}
diff --git a/tos/chips/cortex/m3/sam3/pdc/README b/tos/chips/cortex/m3/sam3/pdc/README
new file mode 100644
index 00000000..8771c25f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pdc/README
@@ -0,0 +1,14 @@
+Generic PDC implementation for SAM3 
+
+@author JeongGil Ko <jgko@cs.jhu.edu>
+@author Thomas Schmid
+
+The implementation is based on the preliminary specifications and the
+MSP430 implementations.
+
+- Each PDC supporting user interface (uart, usart, twi, pwm, etc.)
+  should wire to the PDC component for the user interface.
+
+- Be sure to enable the peripheral clock for each peripheral's user
+  interface before writing to the PDC registers. If the clock is not
+  active, some registers will be inactive.
diff --git a/tos/chips/cortex/m3/sam3/pdc/pdchardware.h b/tos/chips/cortex/m3/sam3/pdc/pdchardware.h
new file mode 100644
index 00000000..9685e044
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pdc/pdchardware.h
@@ -0,0 +1,209 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * PDC register definitions.
+ *
+ * @author JeongGil Ko
+ */
+
+#ifndef _PDCHARDWARE_H
+#define _PDCHARDWARE_H
+
+/**
+ *  PDC Received Pointer Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 462
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t rxptr    : 32;
+  } __attribute__((__packed__)) bits;
+} periph_rpr_t; 
+
+
+/**
+ *  PDC Receive Counter Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 463
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t rxctr     : 16;
+    uint16_t reserved0 : 16;
+  } __attribute__((__packed__)) bits;
+} periph_rcr_t; 
+
+/**
+ *  PDC Transmit Pointer Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 464
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t txptr   :  32;
+  } __attribute__((__packed__)) bits;
+} periph_tpr_t; 
+
+
+/**
+ *  PDC Transmit Counter Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 464
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t txctr     : 16;
+    uint16_t reserved0 : 16;
+  } __attribute__((__packed__)) bits;
+} periph_tcr_t; 
+
+/**
+ *  PDC Received Next Pointer Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 465
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t rxnptr      :  32;
+  } __attribute__((__packed__)) bits;
+} periph_rnpr_t; 
+
+
+/**
+ *  PDC Receive Next Counter Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 465
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t rxnctr     : 16;
+    uint16_t reserved0 : 16;
+  } __attribute__((__packed__)) bits;
+} periph_rncr_t; 
+
+/**
+ *  PDC Transmit Pointer Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 466
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t txnptr    : 32;
+  } __attribute__((__packed__)) bits;
+} periph_tnpr_t; 
+
+
+/**
+ *  PDC Transmit Next Counter Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 466
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t txnctr    : 16;
+    uint16_t reserved0 : 16;
+  } __attribute__((__packed__)) bits;
+} periph_tncr_t; 
+
+/**
+ *  PDC Transfer Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 467
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t rxten      :  1;
+    uint8_t rxtdis     :  1;
+    uint8_t reserved0  :  6;
+    uint8_t txten      :  1;
+    uint8_t txtdis     :  1;
+    uint8_t reserved1  :  6;
+    uint16_t reserved2 : 16;
+  } __attribute__((__packed__)) bits;
+} periph_ptcr_t; 
+
+/**
+ *  PDC Transfer Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 468
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t rxten       :  1;
+    uint8_t reserved0  :  7;
+    uint8_t txten       :  1;
+    uint8_t reserved1  :  7;
+    uint16_t reserved2 : 16;
+  } __attribute__((__packed__)) bits;
+} periph_ptsr_t; 
+
+
+/**
+ * PDC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary, p. 461
+ */
+typedef struct pdc
+{
+  volatile periph_rpr_t rpr;
+  volatile periph_rcr_t rcr;
+  volatile periph_tpr_t tpr;
+  volatile periph_tcr_t tcr;
+  volatile periph_rnpr_t rnpr;
+  volatile periph_rncr_t rncr;
+  volatile periph_tnpr_t tnpr;
+  volatile periph_tncr_t tncr;
+  volatile periph_ptcr_t ptcr;
+  volatile periph_ptsr_t ptsr;
+} periph_t;
+
+
+#endif // _PDCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOP.nc b/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOP.nc
new file mode 100644
index 00000000..49c3ad39
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOP.nc
@@ -0,0 +1,129 @@
+/**
+ * "Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This module is only used to dispatch the IRQ to the correct module.
+ * @author Thomas Schmid
+ */
+
+module HplSam3GeneralIOP
+{
+    provides
+    {
+        interface HplSam3GeneralIOPort as HplPortA;
+        interface HplSam3GeneralIOPort as HplPortB;
+        interface HplSam3GeneralIOPort as HplPortC;
+    }
+    uses 
+    {
+        interface FunctionWrapper as PioAInterruptWrapper;
+        interface FunctionWrapper as PioBInterruptWrapper;
+        interface FunctionWrapper as PioCInterruptWrapper;
+    }
+}
+implementation
+{
+    __attribute__((interrupt)) void PioAIrqHandler() @C() @spontaneous()
+    {
+        uint32_t time = 0;
+        call PioAInterruptWrapper.preamble();
+        signal HplPortA.fired(time);
+        call PioAInterruptWrapper.postamble();
+    }
+
+    __attribute__((interrupt)) void PioBIrqHandler() @C() @spontaneous()
+    {
+        uint32_t time = 0;
+        call PioBInterruptWrapper.preamble();
+        signal HplPortB.fired(time);
+        call PioBInterruptWrapper.postamble();
+    }
+
+    __attribute__((interrupt)) void PioCIrqHandler() @C() @spontaneous()
+    {
+        uint32_t time = 0;
+        call PioCInterruptWrapper.preamble();
+        signal HplPortC.fired(time);
+        call PioCInterruptWrapper.postamble();
+    }
+
+    /**
+     * Does nothing!
+     */
+    async command void HplPortA.enableInterrupt()
+    {
+    }
+    async command void HplPortA.disableInterrupt()
+    {
+    }
+    async command void HplPortA.enableClock()
+    {
+    }
+    async command void HplPortA.disableClock()
+    {
+    }
+
+    /**
+     * Does nothing!
+     */
+    async command void HplPortB.enableInterrupt()
+    {
+    }
+    async command void HplPortB.disableInterrupt()
+    {
+    }
+    async command void HplPortB.enableClock()
+    {
+    }
+    async command void HplPortB.disableClock()
+    {
+    }
+
+    /**
+     * Does nothing!
+     */
+    async command void HplPortC.enableInterrupt()
+    {
+    }
+    async command void HplPortC.disableInterrupt()
+    {
+    }
+    async command void HplPortC.enableClock()
+    {
+    }
+    async command void HplPortC.disableClock()
+    {
+    }
+
+    default async event void HplPortA.fired(uint32_t time) {}
+    default async event void HplPortB.fired(uint32_t time) {}
+    default async event void HplPortC.fired(uint32_t time) {}
+}
diff --git a/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPin.nc b/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPin.nc
new file mode 100644
index 00000000..bcf8b32a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPin.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+interface HplSam3GeneralIOPin
+{
+	async command void enablePioControl();
+	/**
+	 * Disables the PIO controller from driving the pin. The connected
+	 * peripheral (if any) will do that.
+	 */
+	async command void disablePioControl();
+	async command bool isEnabledPioControl();
+
+	async command void enableMultiDrive();
+	async command void disableMultiDrive();
+	async command bool isEnabledMultiDrive();
+
+	async command void enablePullUpResistor();
+	async command void disablePullUpResistor();
+	async command bool isEnabledPullUpResistor();
+
+	async command void selectPeripheralA();
+	async command void selectPeripheralB();
+#ifdef CHIP_SAM3_HAS_PERIPHERAL_CD
+	async command void selectPeripheralC();
+	async command void selectPeripheralD();
+#endif
+
+	/**
+	 * Returns TRUE if peripheral A is selected, returns FALSE if
+	 * peripheral B is selected.
+	 */
+	async command bool isSelectedPeripheralA();
+
+    // interrupt
+    async command void enableInterrupt();
+    async command void disableInterrupt();
+    async command bool isEnabledInterrupt();
+
+    // edge selection
+    async command void enableEdgeDetection();
+    async command bool isEnabledEdgeDetection();
+    async command void fallingEdgeDetection();
+    async command bool isFallingEdgeDetection();
+    async command void risingEdgeDetection();
+
+	/* TODO: input, and filter functions */
+}
diff --git a/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPinP.nc b/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPinP.nc
new file mode 100644
index 00000000..cdf2d0d3
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPinP.nc
@@ -0,0 +1,356 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Pin abstraction on the SAM3.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+generic module HplSam3GeneralIOPinP(uint32_t pio_addr, uint8_t bit)
+{
+	provides
+	{
+		interface GeneralIO as IO;
+        interface GpioInterrupt as Interrupt;
+        interface GpioCapture as Capture;
+		interface HplSam3GeneralIOPin as HplPin;
+	}
+    uses
+    {
+        interface HplSam3GeneralIOPort as HplPort;
+    }
+}
+implementation
+{
+	async command bool IO.get()
+	{
+		if ((call IO.isInput()) == 1) {
+			/* Read bit from Pin Data Status Register */
+			uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x03c));
+			uint32_t currentpin = (currentport & (1 << bit)) >> bit;
+			return ((currentpin & 1) == 1);
+		} else {
+			/* Read bit from Output Data Status Register */
+			uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x038));
+			uint32_t currentpin = (currentport & (1 << bit)) >> bit;
+			return ((currentpin & 1) == 1);
+		}
+	}
+
+	async command void IO.set()
+	{
+		/* Set bit in Set Output Data Register */
+		*((volatile uint32_t *) (pio_addr + 0x030)) = (1 << bit);
+	}
+
+	async command void IO.clr()
+	{
+		/* Set bit in Clear Output Data Register */
+		*((volatile uint32_t *) (pio_addr + 0x034)) = (1 << bit);
+	}
+
+	async command void IO.toggle()
+	{
+		if ((call IO.get()) == 1) {
+			call IO.clr();
+		} else {
+			call IO.set();
+		}
+	}
+
+	async command void IO.makeInput()
+	{
+		/* Set bit in Output Disable Register */
+		*((volatile uint32_t *) (pio_addr + 0x014)) = (1 << bit);
+
+        call HplPort.enableClock();
+    }
+
+	async command void IO.makeOutput()
+	{
+		/* Set bit in Output Enable Register */
+		*((volatile uint32_t *) (pio_addr + 0x010)) = (1 << bit);
+
+        // we don't need the clock in output mode
+        call HplPort.disableClock();
+    }
+
+	async command bool IO.isOutput()
+	{
+		/* Read bit from Output Status Register */
+		uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x018));
+		uint32_t currentpin = (currentport & (1 << bit)) >> bit;
+		return ((currentpin & 1) == 1);
+	}
+
+	async command bool IO.isInput()
+	{
+		return (! (call IO.isOutput()));
+	}
+
+	async command void HplPin.enablePioControl()
+	{
+		/* Set bit in PIO Enable Register */
+		*((volatile uint32_t *) (pio_addr + 0x000)) = (1 << bit);
+	}
+
+	async command void HplPin.disablePioControl()
+	{
+		/* Set bit in PIO Disable Register */
+		*((volatile uint32_t *) (pio_addr + 0x004)) = (1 << bit);
+	}
+
+	async command bool HplPin.isEnabledPioControl()
+	{
+		/* Read bit from PIO Status Register */
+		uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x008));
+		uint32_t currentpin = (currentport & (1 << bit)) >> bit;
+		return ((currentpin & 1) == 1);
+	}
+
+	async command void HplPin.enableMultiDrive()
+	{
+		/* Set bit in Multi-Driver Enable Register */
+		*((volatile uint32_t *) (pio_addr + 0x050)) = (1 << bit);
+	}
+
+	async command void HplPin.disableMultiDrive()
+	{
+		/* Set bit in Multi-Driver Disable Register */
+		*((volatile uint32_t *) (pio_addr + 0x054)) = (1 << bit);
+	}
+
+	async command bool HplPin.isEnabledMultiDrive()
+	{
+		/* Read bit from Multi-Driver Status Register */
+		uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x058));
+		uint32_t currentpin = (currentport & (1 << bit)) >> bit;
+		return ((currentpin & 1) == 1);
+	}
+
+	async command void HplPin.enablePullUpResistor()
+	{
+		/* Set bit in Pull-Up Enable Register */
+		*((volatile uint32_t *) (pio_addr + 0x064)) = (1 << bit);
+	}
+
+	async command void HplPin.disablePullUpResistor()
+	{
+		/* Set bit in Pull-Up Disable Register */
+		*((volatile uint32_t *) (pio_addr + 0x060)) = (1 << bit);
+	}
+
+	async command bool HplPin.isEnabledPullUpResistor()
+	{
+		/* Read bit from Pull-Up Status Register */
+		uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x068));
+		uint32_t currentpin = (currentport & (1 << bit)) >> bit;
+		return ((currentpin & 1) == 0);
+	}
+
+	async command void HplPin.selectPeripheralA()
+	{
+		/* Read in Peripheral AB Select Register */
+		uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x070));
+		/* Clear bit */
+		currentport &= ~ (1 << bit);
+		/* Write back to register */
+		*((volatile uint32_t *) (pio_addr + 0x070)) = currentport;
+#ifdef CHIP_SAM3_HAS_PERIPHERAL_CD
+		currentport = *((volatile uint32_t *) (pio_addr + 0x074));
+		currentport &= ~ (1 << bit);
+		*((volatile uint32_t *) (pio_addr + 0x074)) = currentport;
+#endif
+	}
+
+	async command void HplPin.selectPeripheralB()
+	{
+		/* Read in Peripheral AB Select Register */
+		uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x070));
+		/* Set bit */
+		currentport |= (1 << bit);
+		/* Write back to register */
+		*((volatile uint32_t *) (pio_addr + 0x070)) = currentport;
+#ifdef CHIP_SAM3_HAS_PERIPHERAL_CD
+		currentport = *((volatile uint32_t *) (pio_addr + 0x074));
+		/* clear bit */
+		currentport &= ~(1 << bit);
+		/* Write back to register */
+		*((volatile uint32_t *) (pio_addr + 0x074)) = currentport;
+#endif
+	}
+
+#ifdef CHIP_SAM3_HAS_PERIPHERAL_CD
+	async command void HplPin.selectPeripheralC()
+	{
+		/* Read in Peripheral AB Select Register */
+		uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x070));
+		/* clear bit */
+		currentport &= ~(1 << bit);
+		/* Write back to register */
+		*((volatile uint32_t *) (pio_addr + 0x070)) = currentport;
+		currentport = *((volatile uint32_t *) (pio_addr + 0x074));
+		/* set bit */
+		currentport |= (1 << bit);
+		/* Write back to register */
+		*((volatile uint32_t *) (pio_addr + 0x074)) = currentport;
+	}
+
+	async command void HplPin.selectPeripheralD()
+	{
+		/* Read in Peripheral AB Select Register */
+		uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x070));
+		/* set bit */
+		currentport |= (1 << bit);
+		/* Write back to register */
+		*((volatile uint32_t *) (pio_addr + 0x070)) = currentport;
+		currentport = *((volatile uint32_t *) (pio_addr + 0x074));
+		/* set bit */
+		currentport |= (1 << bit);
+		/* Write back to register */
+		*((volatile uint32_t *) (pio_addr + 0x074)) = currentport;
+	}
+#endif
+
+	async command bool HplPin.isSelectedPeripheralA()
+	{
+		/* Read bit from Peripheral AB Select Register */
+		uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x070));
+		uint32_t currentpin = (currentport & (1 << bit)) >> bit;
+#ifdef CHIP_SAM3_HAS_PERIPHERAL_CD
+		uint32_t currentport2 = *((volatile uint32_t *) (pio_addr + 0x074));
+        uint32_t currentpin2 = (currentport2 & (1 << bit)) >> bit;
+        return (((currentpin & 1) == 0) && (currentpin2 & 1) == 0);
+#else
+		return ((currentpin & 1) == 0);
+#endif
+	}
+
+    // interrupt
+    async command void HplPin.enableInterrupt()
+    {
+        *((volatile uint32_t *) (pio_addr + 0x040)) = 1 << bit;
+        call HplPort.enableInterrupt();
+    }
+    async command void HplPin.disableInterrupt()
+    {
+        *((volatile uint32_t *) (pio_addr + 0x044)) = 1 << bit;
+        call HplPort.disableInterrupt();
+    }
+    async command bool HplPin.isEnabledInterrupt()
+    {
+		uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x048));
+        uint32_t currentpin = (currentport & (1 << bit)) >> bit;
+        return ((currentpin & 1) == 1);
+    }
+
+    // edge selection
+    async command void HplPin.enableEdgeDetection()
+    {
+        *((volatile uint32_t *) (pio_addr + 0x0C0)) = 1 << bit;
+        // for precaution, reset additional interrupt modes register
+        // so that we can do just edge detection (rising and falling)
+        *((volatile uint32_t *) (pio_addr + 0x0B4)) = 1 << bit;
+
+    }
+    async command bool HplPin.isEnabledEdgeDetection()
+    {
+		uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x0C8));
+        uint32_t currentpin = (currentport & (1 << bit)) >> bit;
+        return ((currentpin & 1) == 0);
+    }
+    async command void HplPin.fallingEdgeDetection()
+    {
+        // set the bit in falling edge register
+        *((volatile uint32_t *) (pio_addr + 0x0D0)) = 1 << bit;
+        // enable additional interrupt modes
+        *((volatile uint32_t *) (pio_addr + 0x0B0)) = 1 << bit;
+    }
+    async command bool HplPin.isFallingEdgeDetection()
+    {
+		uint32_t currentport = *((volatile uint32_t *) (pio_addr + 0x0D8));
+        uint32_t currentpin = (currentport & (1 << bit)) >> bit;
+        return ((currentpin & 1) == 0);
+    }
+    async command void HplPin.risingEdgeDetection()
+    {
+        // set the bit in the rising edge detection
+		*((volatile uint32_t *) (pio_addr + 0x0D4)) = 1 << bit;
+        // enable additional interrupt modes
+        *((volatile uint32_t *) (pio_addr + 0x0B0)) = 1 << bit;
+    }
+
+    async event void HplPort.fired(uint32_t time)
+    {
+        signal Interrupt.fired();
+        signal Capture.captured((uint16_t)time);
+    }
+
+    async command error_t Interrupt.disable()
+    {
+        call HplPin.disableInterrupt();
+        return SUCCESS;
+    }
+    async command error_t Interrupt.enableFallingEdge()
+    {
+        call HplPin.enablePioControl();
+        call HplPin.enableEdgeDetection();
+        call HplPin.fallingEdgeDetection();
+        call HplPin.enableInterrupt();
+        return SUCCESS;
+    }
+    async command error_t Interrupt.enableRisingEdge()
+    {
+        call HplPin.enablePioControl();
+        call HplPin.enableEdgeDetection();
+        call HplPin.risingEdgeDetection();
+        call HplPin.enableInterrupt();
+        return SUCCESS;
+    }
+
+    async command error_t Capture.captureRisingEdge()
+    {
+        return call Interrupt.enableRisingEdge();
+    }
+    async command error_t Capture.captureFallingEdge()
+    {
+        return call Interrupt.enableFallingEdge();
+    }
+    async command void Capture.disable()
+    {
+        call Interrupt.disable();
+    }
+
+    default async event void Interrupt.fired() {}
+    default async event void Capture.captured(uint16_t time) {}
+}
+
diff --git a/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPioC.nc b/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPioC.nc
new file mode 100644
index 00000000..10f5b72e
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPioC.nc
@@ -0,0 +1,387 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Abstraction of a PIO controller on the SAM3. Has 32 pins.
+ *
+ * @author wanja@cs.fau.de
+ */
+
+generic configuration HplSam3GeneralIOPioC(uint32_t pio_addr)
+{
+	provides {
+		interface GeneralIO as Pin0;
+		interface GeneralIO as Pin1;
+		interface GeneralIO as Pin2;
+		interface GeneralIO as Pin3;
+		interface GeneralIO as Pin4;
+		interface GeneralIO as Pin5;
+		interface GeneralIO as Pin6;
+		interface GeneralIO as Pin7;
+		interface GeneralIO as Pin8;
+		interface GeneralIO as Pin9;
+		interface GeneralIO as Pin10;
+		interface GeneralIO as Pin11;
+		interface GeneralIO as Pin12;
+		interface GeneralIO as Pin13;
+		interface GeneralIO as Pin14;
+		interface GeneralIO as Pin15;
+		interface GeneralIO as Pin16;
+		interface GeneralIO as Pin17;
+		interface GeneralIO as Pin18;
+		interface GeneralIO as Pin19;
+		interface GeneralIO as Pin20;
+		interface GeneralIO as Pin21;
+		interface GeneralIO as Pin22;
+		interface GeneralIO as Pin23;
+		interface GeneralIO as Pin24;
+		interface GeneralIO as Pin25;
+		interface GeneralIO as Pin26;
+		interface GeneralIO as Pin27;
+		interface GeneralIO as Pin28;
+		interface GeneralIO as Pin29;
+		interface GeneralIO as Pin30;
+		interface GeneralIO as Pin31;
+
+		interface HplSam3GeneralIOPin as HplPin0;
+		interface HplSam3GeneralIOPin as HplPin1;
+		interface HplSam3GeneralIOPin as HplPin2;
+		interface HplSam3GeneralIOPin as HplPin3;
+		interface HplSam3GeneralIOPin as HplPin4;
+		interface HplSam3GeneralIOPin as HplPin5;
+		interface HplSam3GeneralIOPin as HplPin6;
+		interface HplSam3GeneralIOPin as HplPin7;
+		interface HplSam3GeneralIOPin as HplPin8;
+		interface HplSam3GeneralIOPin as HplPin9;
+		interface HplSam3GeneralIOPin as HplPin10;
+		interface HplSam3GeneralIOPin as HplPin11;
+		interface HplSam3GeneralIOPin as HplPin12;
+		interface HplSam3GeneralIOPin as HplPin13;
+		interface HplSam3GeneralIOPin as HplPin14;
+		interface HplSam3GeneralIOPin as HplPin15;
+		interface HplSam3GeneralIOPin as HplPin16;
+		interface HplSam3GeneralIOPin as HplPin17;
+		interface HplSam3GeneralIOPin as HplPin18;
+		interface HplSam3GeneralIOPin as HplPin19;
+		interface HplSam3GeneralIOPin as HplPin20;
+		interface HplSam3GeneralIOPin as HplPin21;
+		interface HplSam3GeneralIOPin as HplPin22;
+		interface HplSam3GeneralIOPin as HplPin23;
+		interface HplSam3GeneralIOPin as HplPin24;
+		interface HplSam3GeneralIOPin as HplPin25;
+		interface HplSam3GeneralIOPin as HplPin26;
+		interface HplSam3GeneralIOPin as HplPin27;
+		interface HplSam3GeneralIOPin as HplPin28;
+		interface HplSam3GeneralIOPin as HplPin29;
+		interface HplSam3GeneralIOPin as HplPin30;
+		interface HplSam3GeneralIOPin as HplPin31;
+
+		interface GpioInterrupt as InterruptPin0;
+		interface GpioInterrupt as InterruptPin1;
+		interface GpioInterrupt as InterruptPin2;
+		interface GpioInterrupt as InterruptPin3;
+		interface GpioInterrupt as InterruptPin4;
+		interface GpioInterrupt as InterruptPin5;
+		interface GpioInterrupt as InterruptPin6;
+		interface GpioInterrupt as InterruptPin7;
+		interface GpioInterrupt as InterruptPin8;
+		interface GpioInterrupt as InterruptPin9;
+		interface GpioInterrupt as InterruptPin10;
+		interface GpioInterrupt as InterruptPin11;
+		interface GpioInterrupt as InterruptPin12;
+		interface GpioInterrupt as InterruptPin13;
+		interface GpioInterrupt as InterruptPin14;
+		interface GpioInterrupt as InterruptPin15;
+		interface GpioInterrupt as InterruptPin16;
+		interface GpioInterrupt as InterruptPin17;
+		interface GpioInterrupt as InterruptPin18;
+		interface GpioInterrupt as InterruptPin19;
+		interface GpioInterrupt as InterruptPin20;
+		interface GpioInterrupt as InterruptPin21;
+		interface GpioInterrupt as InterruptPin22;
+		interface GpioInterrupt as InterruptPin23;
+		interface GpioInterrupt as InterruptPin24;
+		interface GpioInterrupt as InterruptPin25;
+		interface GpioInterrupt as InterruptPin26;
+		interface GpioInterrupt as InterruptPin27;
+		interface GpioInterrupt as InterruptPin28;
+		interface GpioInterrupt as InterruptPin29;
+		interface GpioInterrupt as InterruptPin30;
+		interface GpioInterrupt as InterruptPin31;
+
+		interface GpioCapture as CapturePin0;
+		interface GpioCapture as CapturePin1;
+		interface GpioCapture as CapturePin2;
+		interface GpioCapture as CapturePin3;
+		interface GpioCapture as CapturePin4;
+		interface GpioCapture as CapturePin5;
+		interface GpioCapture as CapturePin6;
+		interface GpioCapture as CapturePin7;
+		interface GpioCapture as CapturePin8;
+		interface GpioCapture as CapturePin9;
+		interface GpioCapture as CapturePin10;
+		interface GpioCapture as CapturePin11;
+		interface GpioCapture as CapturePin12;
+		interface GpioCapture as CapturePin13;
+		interface GpioCapture as CapturePin14;
+		interface GpioCapture as CapturePin15;
+		interface GpioCapture as CapturePin16;
+		interface GpioCapture as CapturePin17;
+		interface GpioCapture as CapturePin18;
+		interface GpioCapture as CapturePin19;
+		interface GpioCapture as CapturePin20;
+		interface GpioCapture as CapturePin21;
+		interface GpioCapture as CapturePin22;
+		interface GpioCapture as CapturePin23;
+		interface GpioCapture as CapturePin24;
+		interface GpioCapture as CapturePin25;
+		interface GpioCapture as CapturePin26;
+		interface GpioCapture as CapturePin27;
+		interface GpioCapture as CapturePin28;
+		interface GpioCapture as CapturePin29;
+		interface GpioCapture as CapturePin30;
+		interface GpioCapture as CapturePin31;
+	}
+    uses
+    {
+        interface HplSam3GeneralIOPort as HplPort;
+        interface HplNVICInterruptCntl as PIOIrqControl;
+        interface HplSam3PeripheralClockCntl as PIOClockControl;
+    }
+}
+implementation
+{
+	components 
+	new HplSam3GeneralIOPinP(pio_addr, 0) as Bit0,
+	new HplSam3GeneralIOPinP(pio_addr, 1) as Bit1,
+	new HplSam3GeneralIOPinP(pio_addr, 2) as Bit2,
+	new HplSam3GeneralIOPinP(pio_addr, 3) as Bit3,
+	new HplSam3GeneralIOPinP(pio_addr, 4) as Bit4,
+	new HplSam3GeneralIOPinP(pio_addr, 5) as Bit5,
+	new HplSam3GeneralIOPinP(pio_addr, 6) as Bit6,
+	new HplSam3GeneralIOPinP(pio_addr, 7) as Bit7,
+	new HplSam3GeneralIOPinP(pio_addr, 8) as Bit8,
+	new HplSam3GeneralIOPinP(pio_addr, 9) as Bit9,
+	new HplSam3GeneralIOPinP(pio_addr, 10) as Bit10,
+	new HplSam3GeneralIOPinP(pio_addr, 11) as Bit11,
+	new HplSam3GeneralIOPinP(pio_addr, 12) as Bit12,
+	new HplSam3GeneralIOPinP(pio_addr, 13) as Bit13,
+	new HplSam3GeneralIOPinP(pio_addr, 14) as Bit14,
+	new HplSam3GeneralIOPinP(pio_addr, 15) as Bit15,
+	new HplSam3GeneralIOPinP(pio_addr, 16) as Bit16,
+	new HplSam3GeneralIOPinP(pio_addr, 17) as Bit17,
+	new HplSam3GeneralIOPinP(pio_addr, 18) as Bit18,
+	new HplSam3GeneralIOPinP(pio_addr, 19) as Bit19,
+	new HplSam3GeneralIOPinP(pio_addr, 20) as Bit20,
+	new HplSam3GeneralIOPinP(pio_addr, 21) as Bit21,
+	new HplSam3GeneralIOPinP(pio_addr, 22) as Bit22,
+	new HplSam3GeneralIOPinP(pio_addr, 23) as Bit23,
+	new HplSam3GeneralIOPinP(pio_addr, 24) as Bit24,
+	new HplSam3GeneralIOPinP(pio_addr, 25) as Bit25,
+	new HplSam3GeneralIOPinP(pio_addr, 26) as Bit26,
+	new HplSam3GeneralIOPinP(pio_addr, 27) as Bit27,
+	new HplSam3GeneralIOPinP(pio_addr, 28) as Bit28,
+	new HplSam3GeneralIOPinP(pio_addr, 29) as Bit29,
+	new HplSam3GeneralIOPinP(pio_addr, 30) as Bit30,
+	new HplSam3GeneralIOPinP(pio_addr, 31) as Bit31;
+
+	Pin0 = Bit0;
+	Pin1 = Bit1;
+	Pin2 = Bit2;
+	Pin3 = Bit3;
+	Pin4 = Bit4;
+	Pin5 = Bit5;
+	Pin6 = Bit6;
+	Pin7 = Bit7;
+	Pin8 = Bit8;
+	Pin9 = Bit9;
+	Pin10 = Bit10;
+	Pin11 = Bit11;
+	Pin12 = Bit12;
+	Pin13 = Bit13;
+	Pin14 = Bit14;
+	Pin15 = Bit15;
+	Pin16 = Bit16;
+	Pin17 = Bit17;
+	Pin18 = Bit18;
+	Pin19 = Bit19;
+	Pin20 = Bit20;
+	Pin21 = Bit21;
+	Pin22 = Bit22;
+	Pin23 = Bit23;
+	Pin24 = Bit24;
+	Pin25 = Bit25;
+	Pin26 = Bit26;
+	Pin27 = Bit27;
+	Pin28 = Bit28;
+	Pin29 = Bit29;
+	Pin30 = Bit30;
+	Pin31 = Bit31;
+
+	HplPin0 = Bit0;
+	HplPin1 = Bit1;
+	HplPin2 = Bit2;
+	HplPin3 = Bit3;
+	HplPin4 = Bit4;
+	HplPin5 = Bit5;
+	HplPin6 = Bit6;
+	HplPin7 = Bit7;
+	HplPin8 = Bit8;
+	HplPin9 = Bit9;
+	HplPin10 = Bit10;
+	HplPin11 = Bit11;
+	HplPin12 = Bit12;
+	HplPin13 = Bit13;
+	HplPin14 = Bit14;
+	HplPin15 = Bit15;
+	HplPin16 = Bit16;
+	HplPin17 = Bit17;
+	HplPin18 = Bit18;
+	HplPin19 = Bit19;
+	HplPin20 = Bit20;
+	HplPin21 = Bit21;
+	HplPin22 = Bit22;
+	HplPin23 = Bit23;
+	HplPin24 = Bit24;
+	HplPin25 = Bit25;
+	HplPin26 = Bit26;
+	HplPin27 = Bit27;
+	HplPin28 = Bit28;
+	HplPin29 = Bit29;
+	HplPin30 = Bit30;
+	HplPin31 = Bit31;
+
+	InterruptPin0 = Bit0;
+	InterruptPin1 = Bit1;
+	InterruptPin2 = Bit2;
+	InterruptPin3 = Bit3;
+	InterruptPin4 = Bit4;
+	InterruptPin5 = Bit5;
+	InterruptPin6 = Bit6;
+	InterruptPin7 = Bit7;
+	InterruptPin8 = Bit8;
+	InterruptPin9 = Bit9;
+	InterruptPin10 = Bit10;
+	InterruptPin11 = Bit11;
+	InterruptPin12 = Bit12;
+	InterruptPin13 = Bit13;
+	InterruptPin14 = Bit14;
+	InterruptPin15 = Bit15;
+	InterruptPin16 = Bit16;
+	InterruptPin17 = Bit17;
+	InterruptPin18 = Bit18;
+	InterruptPin19 = Bit19;
+	InterruptPin20 = Bit20;
+	InterruptPin21 = Bit21;
+	InterruptPin22 = Bit22;
+	InterruptPin23 = Bit23;
+	InterruptPin24 = Bit24;
+	InterruptPin25 = Bit25;
+	InterruptPin26 = Bit26;
+	InterruptPin27 = Bit27;
+	InterruptPin28 = Bit28;
+	InterruptPin29 = Bit29;
+	InterruptPin30 = Bit30;
+	InterruptPin31 = Bit31;
+
+	CapturePin0 = Bit0;
+	CapturePin1 = Bit1;
+	CapturePin2 = Bit2;
+	CapturePin3 = Bit3;
+	CapturePin4 = Bit4;
+	CapturePin5 = Bit5;
+	CapturePin6 = Bit6;
+	CapturePin7 = Bit7;
+	CapturePin8 = Bit8;
+	CapturePin9 = Bit9;
+	CapturePin10 = Bit10;
+	CapturePin11 = Bit11;
+	CapturePin12 = Bit12;
+	CapturePin13 = Bit13;
+	CapturePin14 = Bit14;
+	CapturePin15 = Bit15;
+	CapturePin16 = Bit16;
+	CapturePin17 = Bit17;
+	CapturePin18 = Bit18;
+	CapturePin19 = Bit19;
+	CapturePin20 = Bit20;
+	CapturePin21 = Bit21;
+	CapturePin22 = Bit22;
+	CapturePin23 = Bit23;
+	CapturePin24 = Bit24;
+	CapturePin25 = Bit25;
+	CapturePin26 = Bit26;
+	CapturePin27 = Bit27;
+	CapturePin28 = Bit28;
+	CapturePin29 = Bit29;
+	CapturePin30 = Bit30;
+	CapturePin31 = Bit31;
+
+    components new HplSam3GeneralIOPortP(pio_addr) as Port;
+
+    HplPort = Port.HplPort;
+    PIOIrqControl = Port.PIOIrqControl;
+    PIOClockControl = Port.PIOClockControl;
+
+
+    Bit0.HplPort -> Port.Bits[0];
+    Bit1.HplPort -> Port.Bits[1];
+    Bit2.HplPort -> Port.Bits[2];
+    Bit3.HplPort -> Port.Bits[3];
+    Bit4.HplPort -> Port.Bits[4];
+    Bit5.HplPort -> Port.Bits[5];
+    Bit6.HplPort -> Port.Bits[6];
+    Bit7.HplPort -> Port.Bits[7];
+    Bit8.HplPort -> Port.Bits[8];
+    Bit9.HplPort -> Port.Bits[9];
+    Bit10.HplPort -> Port.Bits[10];
+    Bit11.HplPort -> Port.Bits[11];
+    Bit12.HplPort -> Port.Bits[12];
+    Bit13.HplPort -> Port.Bits[13];
+    Bit14.HplPort -> Port.Bits[14];
+    Bit15.HplPort -> Port.Bits[15];
+    Bit16.HplPort -> Port.Bits[16];
+    Bit17.HplPort -> Port.Bits[17];
+    Bit18.HplPort -> Port.Bits[18];
+    Bit19.HplPort -> Port.Bits[19];
+    Bit20.HplPort -> Port.Bits[20];
+    Bit21.HplPort -> Port.Bits[21];
+    Bit22.HplPort -> Port.Bits[22];
+    Bit23.HplPort -> Port.Bits[23];
+    Bit24.HplPort -> Port.Bits[24];
+    Bit25.HplPort -> Port.Bits[25];
+    Bit26.HplPort -> Port.Bits[26];
+    Bit27.HplPort -> Port.Bits[27];
+    Bit28.HplPort -> Port.Bits[28];
+    Bit29.HplPort -> Port.Bits[29];
+    Bit30.HplPort -> Port.Bits[30];
+    Bit31.HplPort -> Port.Bits[31];
+}
diff --git a/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPort.nc b/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPort.nc
new file mode 100644
index 00000000..84ba87d9
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPort.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+interface HplSam3GeneralIOPort
+{
+    // signals that the interrupt for a specific pin happened
+    async event void fired(uint32_t time);
+
+    // enables the interrupt on this port
+    async command void enableInterrupt();
+
+    // disable the interrupt on this port
+    async command void disableInterrupt();
+
+    // enables the peripheral clock
+    async command void enableClock();
+
+    // disables the clock if it is not used by anyone
+    async command void disableClock();
+}
diff --git a/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPortP.nc b/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPortP.nc
new file mode 100644
index 00000000..8d467c0f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pins/HplSam3GeneralIOPortP.nc
@@ -0,0 +1,139 @@
+/**
+ * "Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+uint32_t clocks = 0;
+generic module HplSam3GeneralIOPortP(uint32_t pio_addr)
+{
+    provides
+    {
+        interface HplSam3GeneralIOPort as Bits [uint8_t bit];
+    }
+    uses
+    {
+        interface HplSam3GeneralIOPort as HplPort;
+        interface HplNVICInterruptCntl as PIOIrqControl;
+        interface HplSam3PeripheralClockCntl as PIOClockControl;
+    }
+}
+implementation
+{
+    uint32_t isr = 0;
+
+    bool isPending(uint8_t bit)
+    {
+        uint32_t currentpin;
+        // make sure to not loose state for other bits!
+        atomic
+        {
+            isr |= *((volatile uint32_t *) (pio_addr + 0x04C));
+            currentpin = (isr & (1 << bit)) >> bit;
+            // remove bit
+            isr &= ~( 1 << bit);
+        }
+        return ((currentpin & 1) == 1);
+    }
+
+    async event void HplPort.fired(uint32_t time)
+    {
+        uint8_t i;
+        uint32_t isrMasked;
+
+        atomic
+        {
+            // make sure to not loose state for other bits!
+            isr |= *((volatile uint32_t *) (pio_addr + 0x04C));
+
+            // only look at pins where the interrupt is enabled
+            isrMasked = isr & *((volatile uint32_t *) (pio_addr + 0x048));
+
+            // find out which port
+            for(i=0; i<32; i++){
+                if(isrMasked & (1 << i))
+                {
+                    signal Bits.fired[i](time);
+                }
+            } 
+            // remove signaled bits from isr
+            isr &= ~isrMasked;
+        }
+    }
+
+    async command void Bits.enableInterrupt[uint8_t bit]()
+    {
+        // Enable the PIO clock if not already enabled (state checked internally)
+        call Bits.enableClock[bit]();
+        // check if the NVIC is already enabled
+        if(call PIOIrqControl.getActive() == 0)
+        {
+            call PIOIrqControl.configure(IRQ_PRIO_PIO);
+            call PIOIrqControl.enable();
+        }
+    }
+
+    async command void Bits.disableInterrupt[uint8_t bit]()
+    {
+        // Disable the PIO clock if no one else needs it (state checked internally)
+        call Bits.disableClock[bit]();
+        // if all the interrupts are disabled, disable the NVIC.
+        if(*((volatile uint32_t *) (pio_addr + 0x048)) == 0)
+        {
+            call PIOIrqControl.disable();
+        }
+    }
+
+    async command void Bits.enableClock[uint8_t bit]()
+    {
+        atomic 
+        {
+            // only enable the peripheral clock if no one else has enabled it.
+            if(!clocks)
+              call PIOClockControl.enable();
+            clocks |= (1<<bit);
+        }
+    }
+
+    async command void Bits.disableClock[uint8_t bit]()
+    {
+        atomic
+        {
+            clocks &= ~(1<<bit);
+            // only disable the peripheral clock if no one else uses it.
+            if(!clocks)
+                call PIOClockControl.disable();
+        }
+    }
+
+    default async event void Bits.fired[uint8_t bit](uint32_t time) {}
+}
diff --git a/tos/chips/cortex/m3/sam3/pmc/HplSam3Clock.nc b/tos/chips/cortex/m3/sam3/pmc/HplSam3Clock.nc
new file mode 100644
index 00000000..7e42f199
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pmc/HplSam3Clock.nc
@@ -0,0 +1,86 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is an interface to configure the master clock system
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3Clock
+{
+    /**
+     * Select the external oscillator as the slow clock source.
+     */
+    async command error_t slckExternalOsc();
+
+    /**
+     * Select the internal RC oscillator as slow clock source.
+     */
+    async command error_t slckRCOsc();
+
+    /**
+     * Initialize the clock to MCK=48MHz sourced from external Oscillator
+     */
+    async command error_t mckInit48();
+
+    /**
+     * Initialize the clock to MCK=84MHz sourced from external Oscillator
+     */
+    async command error_t mckInit84();
+
+    /**
+     * Initialize the clock to MCK=96MHz sourced from external Oscillator
+     */
+    async command error_t mckInit96();
+
+    /**
+     * Initialize the clock to MCK=12MHz sourced from internal RC for fast
+     * startup
+     */
+    async command error_t mckInit12RC();
+
+    /**
+     * Initialize the clock to MCK=4MHz sourced from internal RC for fast
+     * startup
+     */
+    async command error_t mckInit4RC();
+
+    /**
+     * Returns the main clock speed in kHz.
+     */
+    async command uint32_t getMainClockSpeed();
+
+    /**
+     * Fires if the main clock has been changed.
+     */
+    async event void mainClockChanged();
+}
diff --git a/tos/chips/cortex/m3/sam3/pmc/HplSam3PeripheralClockCntl.nc b/tos/chips/cortex/m3/sam3/pmc/HplSam3PeripheralClockCntl.nc
new file mode 100644
index 00000000..973fce09
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pmc/HplSam3PeripheralClockCntl.nc
@@ -0,0 +1,46 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is an interface to configure one particular peripheral clock.
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3PeripheralClockCntl
+{
+    async command void enable();
+
+    async command void disable();
+
+    async command bool status();
+
+}
diff --git a/tos/chips/cortex/m3/sam3/pmc/HplSam3PeripheralClockP.nc b/tos/chips/cortex/m3/sam3/pmc/HplSam3PeripheralClockP.nc
new file mode 100644
index 00000000..804d70ed
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pmc/HplSam3PeripheralClockP.nc
@@ -0,0 +1,72 @@
+/* 
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Generic module representing a peripheral clock.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "pmchardware.h"
+
+generic module HplSam3PeripheralClockP (uint8_t pid, uint32_t pio_addr) @safe()
+{
+    provides
+    {
+        interface HplSam3PeripheralClockCntl as Cntl;
+    }
+}
+
+implementation
+{
+    async command void Cntl.enable()
+    {
+        pmc_pcer_t pcer = ((volatile pmc_pc_t *) (pio_addr))->pcer;
+        pcer.flat |= ( 1 << pid );
+        ((volatile pmc_pc_t *) (pio_addr))->pcer = pcer;
+    }
+
+    async command void Cntl.disable()
+    {
+        pmc_pcdr_t pcdr = ((volatile pmc_pc_t *) (pio_addr))->pcdr;
+        pcdr.flat |= ( 1 << pid );
+        ((volatile pmc_pc_t *) (pio_addr))->pcdr = pcdr;
+
+    }
+
+    async command bool Cntl.status()
+    {
+        if(((volatile pmc_pc_t *) (pio_addr))->pcsr.flat & (1 << pid))
+            return TRUE;
+        else
+            return FALSE;
+    }
+}
diff --git a/tos/chips/cortex/m3/sam3/pmc/pmchardware.h b/tos/chips/cortex/m3/sam3/pmc/pmchardware.h
new file mode 100644
index 00000000..cc4b81ca
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/pmc/pmchardware.h
@@ -0,0 +1,457 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Power Management Controller register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef PMCHARDWARE_H
+#define PMCHARDWARE_H
+
+/**
+ * PMC System Clock Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 482
+ * 0: no effect
+ * 1: enable clock
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t reserved0 : 8;
+        uint8_t pck0      : 1; // enables clock output 0
+        uint8_t pck1      : 1; // enables clock output 1
+        uint8_t pck2      : 1; // enables clock output 2
+        uint8_t reserved1 : 5;
+        uint16_t reserved2 : 16;
+    } __attribute__((__packed__)) bits;
+} pmc_scer_t;
+
+/**
+ * PMC System Clock Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 483
+ * 0: no effect
+ * 1: disable clock
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t reserved0 : 8;
+        uint8_t pck0      : 1; // disables clock output 0
+        uint8_t pck1      : 1; // disables clock output 1
+        uint8_t pck2      : 1; // disables clock output 2
+        uint8_t reserved1 : 5;
+        uint16_t reserved2 : 16;
+    } __attribute__((__packed__))  bits;
+} pmc_scdr_t;
+
+/**
+ * PMC System Clock Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 484
+ * 0: clock disabled
+ * 1: clock enabled
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t reserved0 : 8;
+        uint8_t pck0      : 1; // status of clock output 0
+        uint8_t pck1      : 1; // status of clock output 1
+        uint8_t pck2      : 1; // status of clock output 2
+        uint8_t reserved1 : 5;
+        uint16_t reserved2 : 16;
+    } __attribute__((__packed__)) bits;
+} pmc_scsr_t;
+
+/**
+ * PMC Clock Generator Main Oscillator Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 489
+ *
+ * Note: You have to write 'key' together with every other operation, or else
+ * the write gets aborted.
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t moscxten   : 1; // main crtystal oscillator enable
+        uint8_t moscxtby   : 1; // main crystal oscillator bypass
+        uint8_t waitmode   : 1; // wait mode command
+        uint8_t moscrcen   : 1; // main on-chip rc oscillator enable
+        uint8_t moscrcf    : 3; // main on-chip rc oscillator frequency selection (0: 4MHz, 1: 8MHz, 2: 12MHz, 3: reserved)
+        uint8_t reserved0  : 1;
+        uint8_t moscxtst   : 8; // main crystal oscillator start-up time (in slow clock cycles times 8
+        uint8_t key        : 8; // should be written at value 0x37
+        uint8_t moscsel    : 1; // main oscillator selection (0: on-chip RC, 1: main crystal)
+        uint8_t cfden      : 1; // clock failure detector enable
+        uint8_t reserved1  : 6;
+    } __attribute__((__packed__)) bits;
+} pmc_mor_t;
+
+#define PMC_MOR_KEY 0x37
+
+/**
+ * PMC Clock Generator Main Clock Frequency Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 490
+ * read-only
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint16_t mainf     : 16; // gives the number of main clock cycles within 16 slow clock periods
+        uint8_t mainfrdy   :  1; // main clock ready
+        uint16_t reserved0 : 15;
+    } __attribute__((__packed__)) bits;
+} pmc_mcfr_t;
+
+
+/**
+ * PMC Clock Generator PLLA Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 491
+ * Note: bit 29 must always be set to 1 when writing this register! 
+ */ 
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t diva      :  8; // divider
+        uint32_t pllacount :  6; // plla counter, specifies the number of slow clock cycles times 8
+        uint32_t reserved0 :  2; // was start mode. no longer exists!
+        uint32_t mula      : 11; // PLLA Multiplier
+        uint32_t reserved1 :  2;
+        uint32_t bit29     :  1; // ALWAYS SET THIS TO 1!!!!!!
+        uint32_t reserved2 :  2;
+    } __attribute__((__packed__)) bits;
+} pmc_pllar_t;
+
+#define PMC_PLLAR_STMODE_FAST_STARTUP 0
+#define PMC_PLLAR_STMODE_NORMAL_STARTUP 2
+
+/**
+ * PMC Master Clock Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 493
+ */ 
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t css        :  2; // master clock source select
+        uint8_t reserved0  :  2;
+        uint8_t pres       :  3; // processor clock prescaler
+        uint8_t reserved1  :  1;
+        uint8_t reserved2  :  5;
+        uint8_t uplldiv    :  1; // upll clock divider by 1 or 2
+        uint8_t reserved3  :  2;
+        uint16_t reserved4 : 16;
+    } __attribute__((__packed__)) bits;
+} pmc_mckr_t;
+
+#define PMC_MCKR_CSS_SLOW_CLOCK 0
+#define PMC_MCKR_CSS_MAIN_CLOCK 1
+#define PMC_MCKR_CSS_PLLA_CLOCK 2
+#define PMC_MCKR_CSS_UPLL_CLOCK 3
+
+#define PMC_MCKR_PRES_DIV_1     0
+#define PMC_MCKR_PRES_DIV_2     1
+#define PMC_MCKR_PRES_DIV_4     2
+#define PMC_MCKR_PRES_DIV_8     3
+#define PMC_MCKR_PRES_DIV_16    4
+#define PMC_MCKR_PRES_DIV_32    5
+#define PMC_MCKR_PRES_DIV_64    6
+#define PMC_MCKR_PRES_DIV_3     7
+
+#define PMC_MCKR_UPLLDIV_1      0
+#define PMC_MCKR_UPLLDIV_2      1
+
+/**
+ * PMC Programmable Clock Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 494
+ */ 
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t css       :  3; // programmable clock source selection
+        uint8_t reserved0 :  1;
+        uint8_t pres      :  3; // programmable clock prescaler
+        uint8_t reserved1 :  1;
+        uint8_t reserved2 :  8;
+        uint16_t reserved3: 16;
+    } __attribute__((__packed__)) bits;
+} pmc_pck_t;
+
+#define PMC_PCKX_CSS_SLOW_CLOCK   0
+#define PMC_PCKX_CSS_MAIN_CLOCK   1
+#define PMC_PCKX_CSS_PLLA_CLOCK   2
+#define PMC_PCKX_CSS_UPLL_CLOCK   3
+#define PMC_PCKX_CSS_MASTER_CLOCK 4
+
+#define PMC_PCKX_PRES_DIV_1       0
+#define PMC_PCKX_PRES_DIV_2       1
+#define PMC_PCKX_PRES_DIV_4       2
+#define PMC_PCKX_PRES_DIV_8       3
+#define PMC_PCKX_PRES_DIV_16      4
+#define PMC_PCKX_PRES_DIV_32      5
+#define PMC_PCKX_PRES_DIV_64      6
+
+/**
+ * PMC Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 495
+ */ 
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t moscxts     :  1; // main crystal oscillator status interrupt enable
+        uint8_t locka       :  1; // pll a lock interrupt enable
+        uint8_t reserved0   :  1;
+        uint8_t mckrdy      :  1; // master clock ready interrupt enable
+        uint8_t reserved1   :  2;
+        uint8_t locku       :  1; // utmi pll lock interrupt enable
+        uint8_t reserved2   :  1;
+        uint8_t pckrdy0     :  1; // programmable clock 0 ready interrupt enable
+        uint8_t pckrdy1     :  1; // programmable clock 1 ready interrupt enable
+        uint8_t pckrdy2     :  1; // programmable clock 2 ready interrupt enable
+        uint8_t reserved3   :  5;
+        uint8_t moscsels    :  1; // main oscillator selection status interrupt enable
+        uint8_t moscrcs     :  1; // main on-chip rc status interrupt enable
+        uint8_t cfdev       :  1; // clock failure detector event interrupt enable
+        uint16_t reserved4  : 13;
+    } __attribute__((__packed__)) bits;
+} pmc_ier_t;
+
+/**
+ * PMC Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 496
+ */ 
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t moscxts     :  1; // main crystal oscillator status interrupt disable
+        uint8_t locka       :  1; // pll a lock interrupt disable
+        uint8_t reserved0   :  1;
+        uint8_t mckrdy      :  1; // master clock ready interrupt disable
+        uint8_t reserved1   :  2;
+        uint8_t locku       :  1; // utmi pll lock interrupt disable
+        uint8_t reserved2   :  1;
+        uint8_t pckrdy0     :  1; // programmable clock 0 ready interrupt disable
+        uint8_t pckrdy1     :  1; // programmable clock 1 ready interrupt disable
+        uint8_t pckrdy2     :  1; // programmable clock 2 ready interrupt disable
+        uint8_t reserved3   :  5;
+        uint8_t moscsels    :  1; // main oscillator selection status interrupt disable
+        uint8_t moscrcs     :  1; // main on-chip rc status interrupt disable
+        uint8_t cfdev       :  1; // clock failure detector event interrupt disable
+        uint16_t reserved4  : 13;
+    } __attribute__((__packed__)) bits;
+} pmc_idr_t;
+
+/**
+ * PMC Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 497
+ */ 
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t moscxts     :  1; // main crystal oscillator stabilized
+        uint8_t locka       :  1; // pll a locked
+        uint8_t reserved0   :  1;
+        uint8_t mckrdy      :  1; // master clock ready
+        uint8_t reserved1   :  2;
+        uint8_t locku       :  1; // utmi pll locked
+        uint8_t oscsels     :  1; // Slow clock oscillator selection (0: rc osc, 1: external clock)
+        uint8_t pckrdy0     :  1; // programmable clock 0 ready
+        uint8_t pckrdy1     :  1; // programmable clock 1 ready
+        uint8_t pckrdy2     :  1; // programmable clock 2 ready
+        uint8_t reserved2   :  5;
+        uint8_t moscsels    :  1; // main oscillator selection (0: done, 1: in progress
+        uint8_t moscrcs     :  1; // main on-chip rc stabilized
+        uint8_t cfdev       :  1; // clock failure detector event since last read
+        uint8_t cfds        :  1; // clock failure detected
+        uint8_t fos         :  1; // clock failure detector fault output status
+        uint16_t reserved3  : 11;
+    } __attribute__((__packed__)) bits;
+} pmc_sr_t;
+
+/**
+ * PMC Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 499
+ */ 
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t moscxts     :  1; // main crystal oscillator status interrupt mask
+        uint8_t locka       :  1; // pll a lock interrupt mask
+        uint8_t reserved0   :  1;
+        uint8_t mckrdy      :  1; // master clock ready interrupt mask
+        uint8_t reserved1   :  2;
+        uint8_t locku       :  1; // utmi pll lock interrupt mask
+        uint8_t reserved2   :  1;
+        uint8_t pckrdy0     :  1; // programmable clock 0 ready interrupt mask
+        uint8_t pckrdy1     :  1; // programmable clock 1 ready interrupt mask
+        uint8_t pckrdy2     :  1; // programmable clock 2 ready interrupt mask
+        uint8_t reserved3   :  5;
+        uint8_t moscsels    :  1; // main oscillator selection status interrupt mask
+        uint8_t moscrcs     :  1; // main on-chip rc status interrupt mask
+        uint8_t cfdev       :  1; // clock failure detector event interrupt mask
+        uint16_t reserved4  : 13;
+    } __attribute__((__packed__)) bits;
+} pmc_imr_t;
+
+/**
+ * PMC Fast Startup Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 500
+ */ 
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t fstt0       :  1; // fast startup input enable 0
+        uint8_t fstt1       :  1; // fast startup input enable 1
+        uint8_t fstt2       :  1; // fast startup input enable 2
+        uint8_t fstt3       :  1; // fast startup input enable 3
+        uint8_t fstt4       :  1; // fast startup input enable 4
+        uint8_t fstt5       :  1; // fast startup input enable 5
+        uint8_t fstt6       :  1; // fast startup input enable 6
+        uint8_t fstt7       :  1; // fast startup input enable 7
+        uint8_t fstt8       :  1; // fast startup input enable 8
+        uint8_t fstt9       :  1; // fast startup input enable 9
+        uint8_t fstt10      :  1; // fast startup input enable 10
+        uint8_t fstt11      :  1; // fast startup input enable 11
+        uint8_t fstt12      :  1; // fast startup input enable 12
+        uint8_t fstt13      :  1; // fast startup input enable 13
+        uint8_t fstt14      :  1; // fast startup input enable 14
+        uint8_t fstt15      :  1; // fast startup input enable 15
+        uint8_t rttal       :  1; // RTT alarm enable
+        uint8_t rtcal       :  1; // RTC alarm enable
+        uint8_t usbal       :  1; // USB alarm enable
+        uint8_t reserved0   :  1;
+        uint8_t lpm         :  1; // low power mode (0: wfi or wfe makes processor go into idle mode, 1: wfe makes processor go into wait mode)
+        uint16_t reserved1  : 11;
+    } __attribute__((__packed__)) bits;
+} pmc_fsmr_t;
+
+/**
+ * PMC Fast Startup Polarity Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 501
+ */ 
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t fstt0       :  1; // fast startup input 0
+        uint8_t fstt1       :  1; // fast startup input 1
+        uint8_t fstt2       :  1; // fast startup input 2
+        uint8_t fstt3       :  1; // fast startup input 3
+        uint8_t fstt4       :  1; // fast startup input 4
+        uint8_t fstt5       :  1; // fast startup input 5
+        uint8_t fstt6       :  1; // fast startup input 6
+        uint8_t fstt7       :  1; // fast startup input 7
+        uint8_t fstt8       :  1; // fast startup input 8
+        uint8_t fstt9       :  1; // fast startup input 9
+        uint8_t fstt10      :  1; // fast startup input 10
+        uint8_t fstt11      :  1; // fast startup input 11
+        uint8_t fstt12      :  1; // fast startup input 12
+        uint8_t fstt13      :  1; // fast startup input 13
+        uint8_t fstt14      :  1; // fast startup input 14
+        uint8_t fstt15      :  1; // fast startup input 15
+        uint16_t reserved0  : 16;
+    } __attribute__((__packed__)) bits;
+} pmc_fspr_t;
+
+/**
+ * PMC Fault Output Clear Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 502
+ */ 
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t foclr       :  1; // fault output clear
+        uint32_t reserved0  : 31;
+    } __attribute__((__packed__)) bits;
+} pmc_focr_t;
+
+
+/**
+ * PMC Write Protect Mode Register.
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t wpen       :  1; // Write Protect Enable
+        uint32_t reserved0  :  7;
+        uint32_t wpkey      : 24; // Write Protect Key
+    } __attribute__((__packed__)) bits;
+} pmc_wpmr_t;
+
+#define PMC_WPMR_WPKEY 0x504D43
+
+/**
+ * PMC Write Protect Status Register.
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t wpvs       :  1; // Write Protect Violation Status
+        uint32_t reserved0  :  7;
+        uint32_t wpvsrc     : 16; // Write Protect Violation Source
+        uint32_t reserved1  :  8;
+    } __attribute__((__packed__)) bits;
+} pmc_wpsr_t;
+
+#endif // PMCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/s/McuSleepC.nc b/tos/chips/cortex/m3/sam3/s/McuSleepC.nc
new file mode 100644
index 00000000..b4ebd6cf
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/McuSleepC.nc
@@ -0,0 +1,290 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas schmid
+ */
+
+#include "hardware.h"
+#include "sam3snvichardware.h"
+#include "sam3spmchardware.h"
+#include "sam3ssupchardware.h"
+#include "sam3rtthardware.h"
+//#include "sam3stchardware.h"
+
+module McuSleepC
+{
+  provides{
+    interface McuSleep;
+    interface McuPowerState;
+    interface Sam3LowPower;
+    interface FunctionWrapper as InterruptWrapper;
+  }
+  uses {
+    interface HplSam3Clock;
+  }
+}
+implementation{
+  #define PMC_PIO_CLOCK_MASK 0x3FFFFFFC
+
+  enum {
+    S_AWAKE,
+    S_SLEEP,
+    S_WAIT,
+    S_BACKUP,
+  };
+  norace uint32_t ps;
+
+  norace struct {
+  } wait_restore;
+  
+  // This C function is defined so that we can call it
+  // from platform_bootstrap(), as defined in platform.h
+  void sam3LowPowerConfigure() @C() @spontaneous() {
+
+    call Sam3LowPower.configure();
+  }
+
+  async command void Sam3LowPower.configure() {
+    // Customize pio settings as appropriate for the platform
+    signal Sam3LowPower.customizePio();
+  }
+
+  uint32_t getPowerState() {
+    //if (PMC->pcsr.flat & PMC_PIO_CLOCK_MASK)
+    if ((PMC->pc.pcsr.flat > 0) || (PMC->pc1.pcsr.flat > 0))
+      return S_SLEEP;
+    else 
+      return S_WAIT;
+  }
+
+  void commonSleep() {
+    // Check if any alarms are set for the tc2 alarm hardware.  
+    // If not, turn off its peripheral clock
+    // This is necessary because the TMicro alarm is linked to tc2.
+    // More logic will need to be added here later, as more alarms are set up
+    // for use.
+    //if(!(TC->ch2.imr.bits.cpcs & 0x01))
+    //  PMC->pcdr.bits.tc2 = 1;
+  }
+
+  void commonResume() {
+    // Turn the periperhal clock for tc2 back on so that its alarm can be
+    // set and times can be read from it
+    //PMC->pcer.bits.tc2 = 1;
+  }
+
+  void setupSleepMode() {
+    // Nothing special to do here yet
+  }
+  void resumeFromSleepMode() {
+    // Nothing special to do here yet
+  }
+
+  void setupWaitMode() {
+    // Save the state of the cpu we are about to change
+    /*
+    wait_restore.mck = call HplSam3Clock.getMainClockSpeed();
+    wait_restore.adc_emr = ADC12B->emr;
+    wait_restore.pmc_pcsr = PMC->pcsr;
+    wait_restore.pmc_uckr = PMC->uckr;
+    wait_restore.supc_mr = SUPC->mr;
+    wait_restore.pioa_psr = AT91C_BASE_PIOA->PIO_PSR;
+    wait_restore.piob_psr = AT91C_BASE_PIOB->PIO_PSR;
+    wait_restore.pioc_psr = AT91C_BASE_PIOC->PIO_PSR;
+    wait_restore.pioa_osr = AT91C_BASE_PIOA->PIO_OSR;
+    wait_restore.piob_osr = AT91C_BASE_PIOB->PIO_OSR;
+    wait_restore.pioc_osr = AT91C_BASE_PIOC->PIO_OSR;
+    wait_restore.pioa_pusr = AT91C_BASE_PIOA->PIO_PPUSR;
+    wait_restore.piob_pusr = AT91C_BASE_PIOB->PIO_PPUSR;
+    wait_restore.pioc_pusr = AT91C_BASE_PIOC->PIO_PPUSR;
+    */
+    // Turn off all clocks to peripheral IO and configure pins
+    // appropriately, so that when we go to sleep we are
+    // drawing the least amount of current possible 
+    call Sam3LowPower.configure();
+    // Force us into 4 MHz with the RC Oscillator
+    /*
+    call HplSam3Clock.mckInit4RC(); 
+    // Setup for wait mode 
+    PMC->fsmr.bits.lpm = 1;
+    // Only resume from wait mode with an input from the RTT
+    PMC->fsmr.bits.rttal = 1;
+    // Make sure we DON'T go into deep sleep (i.e. backup mode)
+    SCB->scr.bits.sleepdeep = 0;
+    */
+  }
+
+  void resumeFromWaitMode() {
+    // Restore the old clock settings
+    /*
+    uint32_t oldMck = wait_restore.mck;
+    if(oldMck > 13000 && oldMck < 49000){
+      call HplSam3Clock.mckInit48();
+    }else if(oldMck > 49000 && oldMck < 90000){
+      call HplSam3Clock.mckInit84();
+    }else if(oldMck > 90000){
+      call HplSam3Clock.mckInit96();
+    }
+    // Restore the ADC to its previous mode
+    ADC12B->emr = wait_restore.adc_emr;
+    // Reenable peripheral clocks, as appropriate
+    PMC->pcer.flat = wait_restore.pmc_pcsr.flat;
+    PMC->pcdr.flat = ~wait_restore.pmc_pcsr.flat;
+    // Reenable the UTMI clock, as appropriate
+    PMC->uckr = wait_restore.pmc_uckr;
+    // Reenable brownout detector, as appropriate
+    {
+      supc_mr_t mr;
+      mr = wait_restore.supc_mr;
+      mr.bits.key  = 0xA5;
+      SUPC->mr = mr;
+    }
+    */
+    // Restore the PIO output/input pin and pullup resistor
+    // settings to the values they had before entering wait mode
+    /*
+    AT91C_BASE_PIOA->PIO_PER = wait_restore.pioa_psr; 
+    AT91C_BASE_PIOB->PIO_PER = wait_restore.piob_psr; 
+    AT91C_BASE_PIOC->PIO_PER = wait_restore.pioc_psr; 
+    AT91C_BASE_PIOA->PIO_PDR = ~wait_restore.pioa_psr; 
+    AT91C_BASE_PIOB->PIO_PDR = ~wait_restore.piob_psr; 
+    AT91C_BASE_PIOC->PIO_PDR = ~wait_restore.pioc_psr; 
+
+    AT91C_BASE_PIOA->PIO_OER = wait_restore.pioa_osr; 
+    AT91C_BASE_PIOB->PIO_OER = wait_restore.piob_osr; 
+    AT91C_BASE_PIOC->PIO_OER = wait_restore.pioc_osr; 
+    AT91C_BASE_PIOA->PIO_ODR = ~wait_restore.pioa_osr; 
+    AT91C_BASE_PIOB->PIO_ODR = ~wait_restore.piob_osr; 
+    AT91C_BASE_PIOC->PIO_ODR = ~wait_restore.pioc_osr; 
+
+    // Notice the reverse logic below - its on purpose, check the data sheet
+    // 0 means active, 1 means inactive
+    AT91C_BASE_PIOA->PIO_PPUER = ~wait_restore.pioa_pusr;
+    AT91C_BASE_PIOB->PIO_PPUER = ~wait_restore.piob_pusr;
+    AT91C_BASE_PIOC->PIO_PPUER = ~wait_restore.pioc_pusr;
+    AT91C_BASE_PIOA->PIO_PPUDR = wait_restore.pioa_pusr;
+    AT91C_BASE_PIOB->PIO_PPUDR = wait_restore.piob_pusr;
+    AT91C_BASE_PIOC->PIO_PPUDR = wait_restore.pioc_pusr;
+    */
+  }
+
+  void setupBackupMode() {
+    // Not yet supported....
+    // Need to think more about how to do this since it is essentially a "hibernate"
+    //  mode, meaning we will have to save all register and memory state into 
+    //  non-volatile memory. Possibly more state will need to be saved as well.
+  }
+  void resumeFromBackupMode() {
+    // Not yet supported....
+    // Need to think more about how to do this since it is essentially a "hibernate"
+    //  mode and resuming will be from a reboot, not a simple interrupt service routine
+    // Consider changing vectors.c to call out to this after checking some state variable
+    // stored in the internal EEFC.
+  }
+
+  async command void McuSleep.sleep()
+  {
+    commonSleep();
+    switch(ps = getPowerState()) {
+      case S_AWAKE:
+        //Just stay awake...
+        break; 
+      case S_SLEEP:
+        // Setup for sleep mode
+        setupSleepMode();
+        break;
+      case S_WAIT:
+        // Setup for wait mode
+        setupWaitMode();
+        break;
+      case S_BACKUP:
+        // Setup for backup mode
+        setupBackupMode();
+        break;
+      default:
+        // Default setup
+        setupSleepMode();
+    }
+
+    __nesc_enable_interrupt();
+
+    // Enter appropriate idle mode
+    if(ps != S_AWAKE)
+      __asm volatile ("wfe");
+
+    // Normally, at this point we can only be woken up by an interrupt, so execution continues
+    // in the body of the InterruptWrapper.preamble() command before returning to here
+    // However, if we never actually went to sleep, we need to force this command to run.
+    if(ps == S_AWAKE)
+      call InterruptWrapper.preamble();
+  
+    // all of memory may change at this point, because an IRQ handler
+    // may have posted a task!
+    asm volatile("" : : : "memory");
+
+    __nesc_disable_interrupt();
+  }
+
+  async command void InterruptWrapper.preamble() {
+    atomic {
+      switch(ps) {
+        case S_AWAKE:
+          // Stayed awake the whole time, so do nothing
+          break; 
+        case S_SLEEP:
+          // Resume from sleep mode
+          resumeFromSleepMode();
+          break;
+        case S_WAIT:
+          // Resume from wait mode
+          resumeFromWaitMode();
+          break;
+        case S_BACKUP:
+          // Resume from backup mode
+          resumeFromBackupMode();
+          break;
+        default:
+          // Default resume
+          resumeFromSleepMode();
+      }
+      if(ps != S_AWAKE)
+        commonResume();
+      ps = S_AWAKE;
+    }
+  }
+  async command void InterruptWrapper.postamble() { /* Do nothing */ }
+  async command void McuPowerState.update(){}
+  async event void HplSam3Clock.mainClockChanged(){}
+
+  default async event void Sam3LowPower.customizePio() {}
+}
+
diff --git a/tos/chips/cortex/m3/sam3/s/adc/AdcP.nc b/tos/chips/cortex/m3/sam3/s/adc/AdcP.nc
new file mode 100644
index 00000000..c0f3dafc
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/adc/AdcP.nc
@@ -0,0 +1,243 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+#include "sam3sadchardware.h"
+
+module AdcP {
+  provides {
+    interface Read<uint16_t> as Read[uint8_t client];
+    interface ReadNow<uint16_t> as ReadNow[uint8_t client];
+    interface Resource as ResourceReadNow[uint8_t client];
+  }
+  uses {
+    // for Read only:
+    interface Resource as ResourceRead[uint8_t client];
+    // for ReadNow only:
+    interface Resource as SubResourceReadNow[uint8_t client];
+    // for Read and ReadNow:
+    interface Sam3sGetAdc as GetAdc[uint8_t client];
+    interface AdcConfigure<const sam3s_adc_channel_config_t*> as Config[uint8_t client];
+    interface Leds;
+  }
+}
+
+implementation
+{
+
+  norace uint8_t state;
+  norace uint8_t readNowClient;
+  norace uint8_t setClient;
+  norace uint16_t adcResult;
+
+  enum {
+    S_READ,
+    S_READNOW,
+  };
+
+  error_t configureAdcRegisters(uint8_t client)
+  {
+    const sam3s_adc_channel_config_t * ONE config;
+    config = call Config.getConfiguration[client]();
+    return call GetAdc.configureAdc[client](config);
+  }
+
+  /** Read.read - TEP 114 **/
+  command error_t Read.read[uint8_t client]()
+  {
+    state = S_READ;
+    call Leds.led1Toggle();
+    return call ResourceRead.request[client]();
+  }
+
+  event void ResourceRead.granted[uint8_t client]() 
+  {
+
+    error_t result = configureAdcRegisters(client);
+
+    if(result == SUCCESS){
+      //call actual read!
+      call GetAdc.getData[client]();
+    }else{
+      //configure failed!
+      call ResourceRead.release[client]();
+      signal Read.readDone[client](result, 0);
+    }
+  }
+
+  /************************************************/
+
+  /** ReadNow.read **/    
+  async command error_t ReadNow.read[uint8_t nowClient]()
+  {
+    if(call SubResourceReadNow.isOwner[nowClient]()){
+      return call GetAdc.getData[nowClient]();
+    }else{
+      return FAIL;
+    }
+  }
+
+  task void signalGranted(){
+    error_t error =  configureAdcRegisters(readNowClient);
+    if(error == SUCCESS){
+      state = S_READNOW;
+    }else{
+      // config error
+    }
+    signal ResourceReadNow.granted[readNowClient]();    
+  }
+
+  async command error_t ResourceReadNow.request[uint8_t nowClient]()
+  {
+    if(!call SubResourceReadNow.isOwner[nowClient]())
+      return call SubResourceReadNow.request[nowClient]();
+    else{
+      atomic readNowClient = nowClient;
+      post signalGranted();
+      return SUCCESS;
+    }
+  }
+
+  event void SubResourceReadNow.granted[uint8_t nowClient]()
+  {
+    error_t error =  configureAdcRegisters(nowClient);
+    if(error == SUCCESS){
+      state = S_READNOW;
+    }else{
+      // config error
+    }
+    signal ResourceReadNow.granted[nowClient]();
+  }
+
+  async command error_t ResourceReadNow.immediateRequest[uint8_t nowClient]()
+  {
+    error_t result = call SubResourceReadNow.immediateRequest[nowClient]();
+    if (result == SUCCESS){
+      result = configureAdcRegisters(nowClient);
+      if (result == SUCCESS)
+        state = S_READNOW;
+    }
+    return result;
+  }
+
+  async command error_t ResourceReadNow.release[uint8_t nowClient]()
+  {
+    return call SubResourceReadNow.release[nowClient]();
+  }
+
+  async command bool ResourceReadNow.isOwner[uint8_t nowClient]()
+  {
+    return call SubResourceReadNow.isOwner[nowClient]();
+  }
+
+  /** Read Done **/
+  void task readDone()
+  {
+    call ResourceRead.release[setClient]();
+    signal Read.readDone[setClient](SUCCESS, adcResult);
+  }
+
+  void task readDoneNow()
+  {
+    signal ReadNow.readDone[setClient](SUCCESS, adcResult);
+  }
+
+  /************************************************/
+
+  /** Data is ready! **/
+  async event error_t GetAdc.dataReady[uint8_t client](uint16_t data)
+  {
+    atomic setClient = client;
+    atomic adcResult = data;
+
+    switch (state)
+    {
+    case S_READ:
+      call ResourceRead.release[client]();
+      post readDone();
+      break;
+    case S_READNOW:
+      post readDoneNow();
+      break;
+    default:
+      break;
+    }
+    return SUCCESS;
+  }
+  /************************************************/
+
+  const sam3s_adc_channel_config_t defaultConfig = {
+    channel: 0,
+  trgen    : 0, // 0: trigger disabled
+  trgsel   : 0, // 0: external trigger
+  lowres   : 0, // 0: 12-bit
+  sleep    : 0, // 0: normal, adc core and vref are kept on between conversions
+  fwup     : 0, // 0: normal, sleep mode is defined by sleep bit
+  freerun  : 0, // 0: normal mode, wait for trigger
+  prescal  : 2, // ADCClock = MCK / ((prescal + 1)*2)
+  startup  : 7, // 112 periods of ADCClock
+  settling : 1, // 5 periods of ADCClock
+  anach    : 0, // 0: no analog changed on channel switching
+  tracktim : 1, // Tracking Time = (tracktim + 1) * ADCClock periods
+  transfer : 1, // Transfer Period = (transfer*1+3) * ADCClock periods
+  useq     : 0, // 0: normal, converts channel in sequence
+  ibctl    : 1,
+  diff     : 0,
+  gain     : 0,
+  offset   : 0,
+  };
+
+ default async command error_t ResourceRead.request[uint8_t client]() { return FAIL; }
+ default async command error_t ResourceRead.immediateRequest[uint8_t client]() { return FAIL; }
+ default async command error_t ResourceRead.release[uint8_t client]() { return FAIL; }
+ default async command bool ResourceRead.isOwner[uint8_t client]() { return FALSE; }
+ default event void Read.readDone[uint8_t client]( error_t result, uint16_t val ){}
+ default async command error_t SubResourceReadNow.release[uint8_t nowClient](){ return FAIL;}
+ default async command error_t SubResourceReadNow.request[uint8_t nowClient](){ return FAIL; }
+ default async command bool SubResourceReadNow.isOwner[uint8_t client]() { return FALSE; }
+ default event void ResourceReadNow.granted[uint8_t nowClient](){}
+ default async event void ReadNow.readDone[uint8_t client]( error_t result, uint16_t val ){}
+ default async command error_t SubResourceReadNow.immediateRequest[uint8_t nowClient]() { return FAIL; }
+ default async command error_t GetAdc.getData[uint8_t client](){ return EINVAL; }
+  
+ default async command const sam3s_adc_channel_config_t*
+ Config.getConfiguration[uint8_t client]()
+  { 
+    return &defaultConfig;
+  }  
+  
+ default async command error_t GetAdc.configureAdc[uint8_t client](const sam3s_adc_channel_config_t *config){ return FAIL; }
+
+}
diff --git a/tos/chips/cortex/m3/sam3/s/adc/AdcReadClientC.nc b/tos/chips/cortex/m3/sam3/s/adc/AdcReadClientC.nc
new file mode 100644
index 00000000..bf7ef0d6
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/adc/AdcReadClientC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+#include "sam3sadchardware.h"
+generic configuration AdcReadClientC()
+{
+  provides {
+    interface Read<uint16_t>;
+  }
+  uses interface AdcConfigure<const sam3s_adc_channel_config_t*>;
+} 
+
+implementation {
+  components AdcP;
+  components new Sam3sAdcClientC();
+
+  enum {
+    CLIENT = unique(ADCC_SERVICE),
+  };
+
+  Read = AdcP.Read[CLIENT];
+  AdcConfigure = AdcP.Config[CLIENT];
+
+  AdcP.GetAdc[CLIENT] -> Sam3sAdcClientC.Sam3sGetAdc;
+  AdcP.ResourceRead[CLIENT] -> Sam3sAdcClientC.Resource;  
+
+  components NoLedsC as Leds;
+  AdcP.Leds -> Leds;
+}
diff --git a/tos/chips/cortex/m3/sam3/s/adc/AdcReadNowClientC.nc b/tos/chips/cortex/m3/sam3/s/adc/AdcReadNowClientC.nc
new file mode 100644
index 00000000..b3a888a0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/adc/AdcReadNowClientC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+#include "sam3sadchardware.h"
+generic configuration AdcReadNowClientC() 
+{ 
+  provides {
+    interface ReadNow<uint16_t>;
+    interface Resource;
+  }
+  uses interface AdcConfigure<const sam3s_adc_channel_config_t*>;
+} 
+
+implementation {
+  components AdcP;
+  components new Sam3sAdcClientC();
+
+  enum {
+    CLIENT = unique(ADCC_SERVICE),
+  };
+
+  ReadNow = AdcP.ReadNow[CLIENT];
+  AdcConfigure = AdcP.Config[CLIENT];
+  Resource = AdcP.ResourceReadNow[CLIENT];
+
+  AdcP.GetAdc[CLIENT] -> Sam3sAdcClientC.Sam3sGetAdc;
+  AdcP.SubResourceReadNow[CLIENT] -> Sam3sAdcClientC.Resource;
+}
diff --git a/tos/chips/cortex/m3/sam3/s/adc/AdcReadStreamClientC.nc b/tos/chips/cortex/m3/sam3/s/adc/AdcReadStreamClientC.nc
new file mode 100644
index 00000000..f904f851
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/adc/AdcReadStreamClientC.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+#include "sam3sadchardware.h"
+generic configuration AdcReadStreamClientC()
+{ 
+  provides {
+    interface ReadStream<uint16_t>;
+  }
+  uses interface AdcConfigure<const sam3s_adc_channel_config_t*>;
+} 
+
+implementation {
+
+#ifndef SAM3S_ADC_PDC
+  components AdcStreamP;
+#else
+  components AdcStreamPDCP as AdcStreamP;
+#endif
+  components new Sam3sAdcClientC();
+  components WireAdcStreamP;
+
+  enum {
+    CLIENT = unique(ADCC_READ_STREAM_SERVICE),
+  };
+
+  ReadStream = WireAdcStreamP.ReadStream[CLIENT];
+  AdcConfigure = WireAdcStreamP.AdcConfigure[CLIENT];
+
+  WireAdcStreamP.Resource[CLIENT] -> Sam3sAdcClientC.Resource;
+  WireAdcStreamP.Sam3sGetAdc[CLIENT] -> Sam3sAdcClientC.Sam3sGetAdc;
+}
diff --git a/tos/chips/cortex/m3/sam3/s/adc/AdcStreamP.nc b/tos/chips/cortex/m3/sam3/s/adc/AdcStreamP.nc
new file mode 100644
index 00000000..38101964
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/adc/AdcStreamP.nc
@@ -0,0 +1,261 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation for ReadStream interface in Sam3u
+ * (Coverted msp430 and atm128 code)
+ * @author JeongGil Ko
+ * @author Thomas Schmid
+ */
+
+#include "sam3sadchardware.h"
+module AdcStreamP {
+  provides {
+    interface Init @atleastonce();
+    interface ReadStream<uint16_t>[uint8_t client];
+  }
+  uses {
+    interface Sam3sGetAdc as GetAdc[uint8_t client];
+    interface AdcConfigure<const sam3s_adc_channel_config_t*> as Config[uint8_t client];
+    interface Alarm<TMicro, uint16_t>;
+    interface Leds;
+  }
+}
+implementation {
+  enum {
+    NSTREAM = uniqueCount(ADCC_READ_STREAM_SERVICE)
+  };
+
+  norace uint8_t client = NSTREAM;
+
+  struct list_entry_t {
+    uint16_t count;
+    struct list_entry_t * ONE_NOK next;
+  };
+  struct list_entry_t *bufferQueue[NSTREAM];
+  struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM];
+  uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount;
+
+  norace uint16_t count;
+  norace uint16_t * COUNT_NOK(count) buffer; 
+  norace uint16_t * BND_NOK(buffer, buffer+count) pos;
+  norace uint32_t now, period;
+
+  command error_t Init.init() {
+    uint8_t i;
+
+    for (i = 0; i != NSTREAM; i++)
+      bufferQueueEnd[i] = &bufferQueue[i];
+
+    return SUCCESS;
+  }
+
+  void sampleSingle() {
+    call GetAdc.getData[client]();
+  }
+
+  error_t postBuffer(uint8_t c, uint16_t *buf, uint16_t n)
+  {
+    if (n < sizeof(struct list_entry_t))
+      return ESIZE;
+    atomic
+    {
+      struct list_entry_t * ONE newEntry = TCAST(struct list_entry_t * ONE, buf);
+
+      if (!bufferQueueEnd[c])
+        return FAIL;
+
+      newEntry->count = n;
+      newEntry->next = NULL;
+      *bufferQueueEnd[c] = newEntry;
+      bufferQueueEnd[c] = &newEntry->next;
+    }
+
+    return SUCCESS;
+  }
+
+  command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) {
+    return postBuffer(c, buf, n);
+  }
+
+  task void readStreamDone() {
+    uint8_t c = client;
+    uint32_t actualPeriod = period;
+
+    atomic
+    {
+      bufferQueue[c] = NULL;
+      bufferQueueEnd[c] = &bufferQueue[c];
+    }
+
+    client = NSTREAM;
+    signal ReadStream.readDone[c](SUCCESS, actualPeriod);
+  }
+
+  task void readStreamFail() {
+    struct list_entry_t *entry;
+    uint8_t c = client;
+
+    atomic entry = bufferQueue[c];
+    for (; entry; entry = entry->next) {
+      uint16_t tmp_count __DEPUTY_UNUSED__ = entry->count;
+      signal ReadStream.bufferDone[c](FAIL, TCAST(uint16_t * COUNT_NOK(tmp_count),entry), entry->count);
+    }
+
+    atomic
+    {
+      bufferQueue[c] = NULL;
+      bufferQueueEnd[c] = &bufferQueue[c];
+    }
+
+    client = NSTREAM;
+    signal ReadStream.readDone[c](FAIL, 0);
+  }
+
+  task void bufferDone() {
+    uint16_t *b, c;
+    atomic
+    {
+      b = lastBuffer;
+      c = lastCount;
+      lastBuffer = NULL;
+    }
+    signal ReadStream.bufferDone[client](SUCCESS, b, c);
+  }
+
+  void nextAlarm() {
+    call Alarm.startAt(now, period);
+    now += period;
+  }
+
+  async event void Alarm.fired() {
+    call Leds.led2Toggle();
+    sampleSingle();
+  }
+
+  error_t nextBuffer(bool startNextAlarm) {
+    atomic
+    {
+      struct list_entry_t *entry = bufferQueue[client];
+
+      if (!entry)
+      {
+        // all done
+        bufferQueueEnd[client] = NULL; // prevent post
+        post readStreamDone();
+        return FAIL;
+      }
+      else
+      {
+        uint16_t tmp_count;
+        bufferQueue[client] = entry->next;
+        if (!bufferQueue[client])
+          bufferQueueEnd[client] = &bufferQueue[client];
+	pos = buffer = NULL;
+        count = entry->count;
+        tmp_count = count;
+	pos = buffer = TCAST(uint16_t * COUNT_NOK(tmp_count), entry);
+        if (startNextAlarm)
+          nextAlarm();
+        return SUCCESS;
+      }
+    }
+  }
+
+  command error_t ReadStream.read[uint8_t c](uint32_t usPeriod)
+  {
+    /* not exactly microseconds                 */
+    /* ADC is currently based on a 1.5MHz clock */
+    period = usPeriod; 
+    client = c;
+    now = call Alarm.getNow();
+    call GetAdc.configureAdc[c](call Config.getConfiguration[c]());
+    if (nextBuffer(FALSE) == SUCCESS){
+       sampleSingle();
+    }
+    return SUCCESS;
+  }
+
+  async event error_t GetAdc.dataReady[uint8_t streamClient](uint16_t data)
+  {
+    call Leds.led1Toggle();
+    if (client == NSTREAM)
+      return FAIL;
+
+    if (count == 0)
+    {
+      now = call Alarm.getNow();
+      nextBuffer(TRUE);
+    }
+    else
+    {
+      *pos++ = data;
+      if (pos == buffer + count)
+      {
+        atomic
+        {
+          if (lastBuffer)
+          {
+            /* We failed to signal bufferDone in time. Fail. */
+            bufferQueueEnd[client] = NULL; // prevent post
+            post readStreamFail();
+            return FAIL;
+          }
+          else
+          {
+            lastCount = count;
+            lastBuffer = buffer;
+          }
+        }
+        post bufferDone();
+        nextBuffer(TRUE);
+      }
+      else
+        nextAlarm();
+    }
+    return FAIL;
+  }
+
+  const sam3s_adc_channel_config_t defaultConfig = {
+  };
+
+  default async command const sam3s_adc_channel_config_t* Config.getConfiguration[uint8_t c]()
+  { 
+    return &defaultConfig;
+  }
+
+  default async command error_t GetAdc.getData[uint8_t c]()
+  {
+    return FAIL;
+  }  
+  default async command error_t GetAdc.configureAdc[uint8_t c](
+      const sam3s_adc_channel_config_t *config){ return FAIL; }
+}
diff --git a/tos/chips/cortex/m3/sam3/s/adc/AdcStreamPDCP.nc b/tos/chips/cortex/m3/sam3/s/adc/AdcStreamPDCP.nc
new file mode 100644
index 00000000..50db57b0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/adc/AdcStreamPDCP.nc
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation for ReadStream interface with PDC in Sam3
+ * @author JeongGil Ko
+ */
+
+#include "sam3sadchardware.h"
+module AdcStreamPDCP {
+  provides {
+    interface Init @atleastonce();
+    interface ReadStream<uint16_t>[uint8_t client];
+  }
+  uses {
+    interface Sam3sGetAdc as GetAdc[uint8_t client];
+    interface AdcConfigure<const sam3s_adc_channel_config_t*> as Config[uint8_t client];
+    interface HplSam3Pdc as HplPdc;
+    interface Leds;
+  }
+}
+implementation {
+  enum {
+    NSTREAM = uniqueCount(ADCC_READ_STREAM_SERVICE)
+  };
+
+  norace uint8_t client = NSTREAM;
+  adc_cr_t cr;
+
+  struct list_entry_t {
+    uint16_t count;
+    struct list_entry_t * ONE_NOK next;
+  };
+  struct list_entry_t *bufferQueue[NSTREAM];
+  struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM];
+  uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount;
+
+  norace uint16_t count;
+  norace uint16_t * COUNT_NOK(count) buffer; 
+  norace uint16_t * BND_NOK(buffer, buffer+count) pos;
+  norace uint32_t now, period;
+  norace uint16_t originalLength;
+  norace uint16_t *originalPointer;
+  norace uint8_t state;
+
+  enum{
+    S_READ,
+    S_IDLE,
+  };
+
+  command error_t Init.init() {
+    uint8_t i;
+    state = S_IDLE;
+    for (i = 0; i != NSTREAM; i++)
+      bufferQueueEnd[i] = &bufferQueue[i];
+
+    return SUCCESS;
+  }
+
+  void samplePdc() {
+    // switch this to pdc enable
+    call HplPdc.enablePdcRx();
+    atomic cr.bits.start = 1; // enable software trigger
+    atomic ADC->cr = cr;  
+
+  }
+
+  command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) {
+    // set parameters here!!!!
+    // set pdc buffers and set the length as a global parameter
+    originalLength = n;
+    originalPointer = buf;
+    call HplPdc.setRxPtr(buf);
+    call HplPdc.setRxCounter(n);
+    return SUCCESS;
+  }
+
+  command error_t ReadStream.read[uint8_t c](uint32_t usPeriod)
+  {
+    period = usPeriod; 
+    client = c;
+    call GetAdc.configureAdc[c](call Config.getConfiguration[c]());
+    state = S_READ;
+    //samplePdc();
+    call GetAdc.getData[c]();
+    call HplPdc.enablePdcRx();
+    return SUCCESS;
+  }
+
+  task void signalReadDone(){
+    signal ReadStream.readDone[client](SUCCESS, period);
+  }
+
+  task void signalBufferDone(){
+    signal ReadStream.bufferDone[client](SUCCESS, originalPointer, originalLength);
+  }
+
+  async event error_t GetAdc.dataReady[uint8_t streamClient](uint16_t data)
+  {
+    if(state == S_READ){
+      atomic state = S_IDLE;
+      call HplPdc.disablePdcRx();
+      post signalReadDone();
+      post signalBufferDone();
+    }
+    return SUCCESS;
+  }
+
+  const sam3s_adc_channel_config_t defaultConfig = {
+  };
+
+  default async command const sam3s_adc_channel_config_t* Config.getConfiguration[uint8_t c]()
+  { 
+    return &defaultConfig;
+  }
+
+  default async command error_t GetAdc.getData[uint8_t c]()
+  {
+    return FAIL;
+  }  
+  default async command error_t GetAdc.configureAdc[uint8_t c](
+      const sam3s_adc_channel_config_t *config){ return FAIL; }
+}
diff --git a/tos/chips/cortex/m3/sam3/s/adc/Sam3sAdcClientC.nc b/tos/chips/cortex/m3/sam3/s/adc/Sam3sAdcClientC.nc
new file mode 100644
index 00000000..b739ca61
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/adc/Sam3sAdcClientC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ * @author Thomas Schmid
+ */
+
+#include "sam3sadchardware.h"
+
+generic configuration Sam3sAdcClientC()
+{
+  provides {
+    interface Resource;
+    interface Sam3sGetAdc;
+  }
+} 
+
+implementation {
+
+  components Sam3sAdcP;
+
+  enum {
+    ID = unique(SAM3SADC_RESOURCE),
+  };
+
+  Resource = Sam3sAdcP.Resource[ID];
+  Sam3sGetAdc = Sam3sAdcP.Sam3sGetAdc[ID];
+
+}
diff --git a/tos/chips/cortex/m3/sam3/s/adc/Sam3sAdcImplP.nc b/tos/chips/cortex/m3/sam3/s/adc/Sam3sAdcImplP.nc
new file mode 100644
index 00000000..e097dfe0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/adc/Sam3sAdcImplP.nc
@@ -0,0 +1,260 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+#include "sam3sadchardware.h"
+module Sam3sAdcImplP
+{
+  provides {
+    interface Init;
+    interface Sam3sGetAdc as Sam3sAdc[uint8_t id];
+  }
+
+  uses {
+    interface HplNVICInterruptCntl as ADCInterrupt;
+    interface HplSam3GeneralIOPin as AdcPin;
+    interface HplSam3PeripheralClockCntl as AdcClockControl;
+    interface HplSam3Clock as ClockConfig;
+    interface FunctionWrapper as AdcInterruptWrapper;
+#ifdef SAM3S_ADC_PDC
+    interface HplSam3Pdc as HplPdc;
+#endif
+    interface Leds;
+  }
+}
+
+implementation
+{
+
+  norace uint8_t clientID;
+
+  norace uint8_t state;
+
+  norace uint8_t channel;
+
+  enum{
+    S_ADC,
+    S_IDLE,
+  };
+
+  command error_t Init.init(){
+
+    /* Enable clock */
+    call AdcClockControl.enable();
+
+    ADC->idr.flat = 0x1f00ffff; // disable all interrupt sources
+    ADC->idr.flat = 0x1f00ffff; // disable all interrupt sources
+
+    /* Reset ADC */
+    ADC->cr.flat = 0x1;
+
+    /* Configure interrupts */
+    call ADCInterrupt.configure(IRQ_PRIO_ADC);
+
+    /* Set IO line */
+    call AdcPin.disablePioControl(); // Disable whatever is set currently
+    call AdcPin.selectPeripheralD(); // set to peripheral D. All ADC pins are on D
+
+    state = S_IDLE;
+
+    return SUCCESS;
+  }
+
+  async command error_t Sam3sAdc.configureAdc[uint8_t id](const sam3s_adc_channel_config_t *config){
+
+    adc_chdr_t chdr;
+    adc_idr_t idr;
+    adc_cr_t cr;
+    adc_mr_t mr;
+    adc_acr_t acr;
+    adc_cgr_t cgr = ADC->cgr;
+    adc_cor_t cor = ADC->cor;
+
+    adc_cher_t cher;
+    adc_ier_t ier;
+
+    channel = config->channel;
+
+    //cher.flat = ADC->chsr.flat; // read from status
+    cher.flat = 0;
+    //ier.flat = ADC->imr.flat;   // read from mask to see who is enabled
+    ier.flat = 0;
+
+    chdr.flat = 0x0000FFFF;
+    ADC->chdr = chdr; // disable all channels during setup
+    idr.flat = 0x1f00FFFF;
+    ADC->idr = idr; // disable all interrupts during setup
+
+    cher.flat |= (1 << config->channel);
+#ifndef SAM3S_ADC_PDC 
+    // enable channel interrupt
+    ier.flat |= (1 << config->channel);
+#else
+    // enable PDC channel interrupt
+    ier.bits.rxbuff = 1;
+#endif
+
+    cr.bits.swrst = 0;
+    cr.bits.start = 0; // disable start bit for the configuration stage
+
+    mr.bits.trgen    = config->trgen;
+    mr.bits.trgsel   = config->trgsel  ;
+    mr.bits.lowres   = config->lowres  ;
+    mr.bits.sleep    = config->sleep   ;
+    mr.bits.fwup     = config->fwup    ;
+    mr.bits.freerun  = config->freerun ;
+    mr.bits.prescal  = config->prescal ;
+    mr.bits.startup  = config->startup ;
+    mr.bits.settling = config->settling;
+    mr.bits.anach    = config->anach   ;
+    mr.bits.tracktim = config->tracktim;
+    mr.bits.transfer = config->transfer;
+    mr.bits.useq     = config->useq    ;
+
+    acr.bits.ibctl   = config->ibctl;
+
+    cgr.flat &= (3 << (config->channel << 1)); 
+    cgr.flat |= (config->gain << (config->channel << 1));
+    
+    if(config->diff)
+    {
+        cor.flat |= ((1 << config->channel) << 16);
+    } else {
+        cor.flat &= ~ ((1 << config->channel) << 16);
+    }
+    if(config->offset)
+    {
+        cor.flat |= ((1 << config->channel));
+    } else {
+        cor.flat &= ~ (1 << config->channel);
+    }
+
+    call ADCInterrupt.enable();
+    call ADCInterrupt.clearPending();
+
+    // We have now locally modified all the register values
+    // Write the register back in its respective memory space
+    ADC->cher = cher;
+    ADC->cr   = cr;
+    ADC->mr   = mr;
+    ADC->acr  = acr;
+    ADC->cgr  = cgr;
+    ADC->cor  = cor;
+
+    ADC->ier  = ier;
+
+    call Leds.led0Toggle();
+
+    return SUCCESS;
+  }
+
+  async command error_t Sam3sAdc.getData[uint8_t id](){
+    adc_cr_t cr;
+    cr.flat = 0;
+
+    call AdcClockControl.enable();
+    //call ADCInterrupt.enable();
+    //call ADCInterrupt.clearPending();
+
+    atomic clientID = id;
+    if(state != S_IDLE){
+      return EBUSY;
+    }else{
+      cr.bits.start = 1; // enable software trigger
+      ADC->cr = cr;
+      atomic state = S_ADC;
+      call Leds.led1Toggle();
+      return SUCCESS;
+    }
+  }
+
+  async event void ClockConfig.mainClockChanged(){}
+
+  /* Get events (signals) from chips here! */
+  void handler() @spontaneous() {
+    adc_cr_t cr;
+    adc_isr_t isr = ADC->isr;
+
+
+    uint16_t data = 0;
+
+    call Leds.led2Toggle();
+
+#ifndef SAM3S_ADC_PDC
+    call ADCInterrupt.disable();
+    
+    // read eoc for the current channel
+    if(isr.flat & (1 << channel)){
+      data = ADC->cdr[channel].bits.data;
+      cr.bits.start = 0; // disable software trigger
+      ADC->cr = cr;
+      //get data from register
+      atomic state = S_IDLE;
+      call AdcClockControl.disable();
+      signal Sam3sAdc.dataReady[clientID](data);
+    }
+#else
+    if(isr.bits.rxbuff){
+      //call ADCInterrupt.disable();
+      atomic {
+          state = S_IDLE;
+          cr.bits.start = 0; // enable software trigger
+          ADC->cr = cr;        
+      }
+      signal Sam3sAdc.dataReady[clientID](data);
+    }else{
+      call HplPdc.enablePdcRx();
+      atomic 
+      {
+          cr.bits.start = 1; // enable software trigger
+          ADC->cr = cr;        
+      }
+    }
+#endif
+  }
+
+  void AdcIrqHandler() @C() @spontaneous() {
+    call AdcInterruptWrapper.preamble();
+    handler();
+    call AdcInterruptWrapper.postamble();
+  }
+
+
+  /* Default functions */
+ default async event error_t Sam3sAdc.dataReady[uint8_t id](uint16_t data){
+   return SUCCESS;
+ }
+
+}
diff --git a/tos/chips/cortex/m3/sam3/s/adc/Sam3sAdcP.nc b/tos/chips/cortex/m3/sam3/s/adc/Sam3sAdcP.nc
new file mode 100644
index 00000000..6b9727fd
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/adc/Sam3sAdcP.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+#include "sam3sadchardware.h"
+ 
+configuration Sam3sAdcP 
+{ 
+  provides {
+    interface Resource[uint8_t id]; 
+    interface Sam3sGetAdc[uint8_t id]; 
+  }
+} 
+
+implementation {
+  components Sam3sAdcImplP as AdcImpl;
+  components MainC;
+  components HplNVICC, HplSam3sClockC, HplSam3sGeneralIOC;
+  //components new Resource[uint8_t id];
+  components new SimpleRoundRobinArbiterC(SAM3SADC_RESOURCE) as Arbiter;
+
+  AdcImpl.ADCInterrupt -> HplNVICC.ADCInterrupt;
+
+  AdcImpl.AdcPin -> HplSam3sGeneralIOC.HplPioB1;
+  AdcImpl.AdcClockControl -> HplSam3sClockC.ADCCntl;
+  Resource = Arbiter; // set this!?!
+  Sam3sGetAdc = AdcImpl.Sam3sAdc;
+
+  MainC.SoftwareInit -> AdcImpl.Init;
+  components LedsC, NoLedsC;
+  AdcImpl.Leds -> LedsC;
+
+  components McuSleepC;
+  AdcImpl.AdcInterruptWrapper -> McuSleepC;
+
+#ifdef SAM3S_ADC_PDC
+  components HplSam3sPdcC;
+  AdcImpl.HplPdc -> HplSam3sPdcC.AdcPdcControl;
+#endif
+
+
+}
diff --git a/tos/chips/cortex/m3/sam3/s/adc/Sam3sGetAdc.nc b/tos/chips/cortex/m3/sam3/s/adc/Sam3sGetAdc.nc
new file mode 100644
index 00000000..b8203062
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/adc/Sam3sGetAdc.nc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+#include "sam3sadchardware.h"
+
+interface Sam3sGetAdc
+{
+  async command error_t configureAdc(const sam3s_adc_channel_config_t *config);
+  async command error_t getData();
+  async event error_t dataReady(uint16_t data);
+}
diff --git a/tos/chips/cortex/m3/sam3/s/adc/WireAdcStreamP.nc b/tos/chips/cortex/m3/sam3/s/adc/WireAdcStreamP.nc
new file mode 100644
index 00000000..2a9df72c
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/adc/WireAdcStreamP.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ * @author Thomas Schmid
+ */
+
+#include "sam3sadchardware.h"
+
+configuration WireAdcStreamP {
+  provides interface ReadStream<uint16_t>[uint8_t client];
+  uses {
+    interface AdcConfigure<const sam3s_adc_channel_config_t*>[uint8_t client];
+    interface Sam3sGetAdc[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+#ifndef SAM3S_ADC_PDC
+  components AdcStreamP;
+#else
+  components AdcStreamPDCP as AdcStreamP;
+#endif
+  components MainC, new AlarmTMicro16C() as Alarm,
+    new ArbitratedReadStreamC(uniqueCount(ADCC_READ_STREAM_SERVICE), uint16_t) as ArbitrateReadStream;
+
+  ReadStream = ArbitrateReadStream;
+  AdcConfigure = AdcStreamP;
+  Resource = ArbitrateReadStream;
+
+  ArbitrateReadStream.Service -> AdcStreamP;
+
+#ifdef SAM3S_ADC_PDC
+  components HplSam3sPdcC;
+  AdcStreamP.HplPdc -> HplSam3sPdcC.AdcPdcControl;
+#else
+  AdcStreamP.Alarm -> Alarm;
+#endif
+
+  AdcStreamP.Init <- MainC;
+  Sam3sGetAdc = AdcStreamP.GetAdc;
+
+  components LedsC, NoLedsC;
+  AdcStreamP.Leds -> LedsC;
+}
diff --git a/tos/chips/cortex/m3/sam3/s/adc/sam3sadchardware.h b/tos/chips/cortex/m3/sam3/s/adc/sam3sadchardware.h
new file mode 100644
index 00000000..2ca7450d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/adc/sam3sadchardware.h
@@ -0,0 +1,628 @@
+/*
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Sam3s ADC register definitions
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3SADCHARDWARE_H
+#define SAM3SADCHARDWARE_H
+
+/**
+ * ADC Control Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t swrst      :  1; // Software Reset
+        uint32_t start      :  1; // Start Conversion
+        uint32_t reserved   : 30;
+    } __attribute__((__packed__)) bits;
+} adc_cr_t;
+
+/**
+ * ADC Mode Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t trgen      : 1; // Trigger Enable
+        uint32_t trgsel     : 3; // Trigger Selection
+        uint32_t lowres     : 1; // Resolution
+        uint32_t sleep      : 1; // Sleep Mode
+        uint32_t fwup       : 1; // Fast Wake Up
+        uint32_t freerun    : 1; // Free Run Mode
+        uint32_t prescal    : 8; // Prescaler Rate Selection
+        uint32_t startup    : 4; // Start Up Time
+        uint32_t settling   : 2; // Analog Settling Time
+        uint32_t reserved0  : 1;
+        uint32_t anach      : 1; // Analog change
+        uint32_t tracktim   : 4; // Tracking Time
+        uint32_t transfer   : 2; // Transfer Period
+        uint32_t reserved1  : 1;
+        uint32_t useq       : 1; // Use Sequence Enable
+    } __attribute__((__packed__)) bits;
+} adc_mr_t;
+
+/**
+ * ADC Channel Sequence 1 Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t usch1     : 3; // User Sequence Number
+        uint32_t reserved0 : 1;
+        uint32_t usch2     : 3; // User Sequence Number
+        uint32_t reserved1 : 1;
+        uint32_t usch3     : 3; // User Sequence Number
+        uint32_t reserved2 : 1;
+        uint32_t usch4     : 3; // User Sequence Number
+        uint32_t reserved3 : 1;
+        uint32_t usch5     : 3; // User Sequence Number
+        uint32_t reserved4 : 1;
+        uint32_t usch6     : 3; // User Sequence Number
+        uint32_t reserved5 : 1;
+        uint32_t usch7     : 3; // User Sequence Number
+        uint32_t reserved6 : 1;
+        uint32_t usch8     : 3; // User Sequence Number
+        uint32_t reserved7 : 1;
+    } __attribute__((__packed__)) bits;
+} adc_seqr1_t;
+
+/**
+ * ADC Channel Sequence 2 Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t usch9     : 3; // User Sequence Number
+        uint32_t reserved0 : 1;
+        uint32_t usch10    : 3; // User Sequence Number
+        uint32_t reserved1 : 1;
+        uint32_t usch11    : 3; // User Sequence Number
+        uint32_t reserved2 : 1;
+        uint32_t usch12    : 3; // User Sequence Number
+        uint32_t reserved3 : 1;
+        uint32_t usch13    : 3; // User Sequence Number
+        uint32_t reserved4 : 1;
+        uint32_t usch14    : 3; // User Sequence Number
+        uint32_t reserved5 : 1;
+        uint32_t usch15    : 3; // User Sequence Number
+        uint32_t reserved6 : 1;
+        uint32_t usch16    : 3; // User Sequence Number
+        uint32_t reserved7 : 1;
+    } __attribute__((__packed__)) bits;
+} adc_seqr2_t;
+
+/**
+ * ADC Channel Enable Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t ch0      :  1; // Channel Enable
+        uint32_t ch1      :  1; // Channel Enable
+        uint32_t ch2      :  1; // Channel Enable
+        uint32_t ch3      :  1; // Channel Enable
+        uint32_t ch4      :  1; // Channel Enable
+        uint32_t ch5      :  1; // Channel Enable
+        uint32_t ch6      :  1; // Channel Enable
+        uint32_t ch7      :  1; // Channel Enable
+        uint32_t ch8      :  1; // Channel Enable
+        uint32_t ch9      :  1; // Channel Enable
+        uint32_t ch10     :  1; // Channel Enable
+        uint32_t ch11     :  1; // Channel Enable
+        uint32_t ch12     :  1; // Channel Enable
+        uint32_t ch13     :  1; // Channel Enable
+        uint32_t ch14     :  1; // Channel Enable
+        uint32_t ch15     :  1; // Channel Enable
+        uint32_t reserved : 16; 
+    } __attribute__((__packed__)) bits;
+} adc_cher_t;
+
+/**
+ * ADC Channel Disable Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t ch0      :  1; // Channel Disable
+        uint32_t ch1      :  1; // Channel Disable
+        uint32_t ch2      :  1; // Channel Disable
+        uint32_t ch3      :  1; // Channel Disable
+        uint32_t ch4      :  1; // Channel Disable
+        uint32_t ch5      :  1; // Channel Disable
+        uint32_t ch6      :  1; // Channel Disable
+        uint32_t ch7      :  1; // Channel Disable
+        uint32_t ch8      :  1; // Channel Disable
+        uint32_t ch9      :  1; // Channel Disable
+        uint32_t ch10     :  1; // Channel Disable
+        uint32_t ch11     :  1; // Channel Disable
+        uint32_t ch12     :  1; // Channel Disable
+        uint32_t ch13     :  1; // Channel Disable
+        uint32_t ch14     :  1; // Channel Disable
+        uint32_t ch15     :  1; // Channel Disable
+        uint32_t reserved : 16; 
+    } __attribute__((__packed__)) bits;
+} adc_chdr_t;
+
+/**
+ * ADC Channel Status Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t ch0      :  1; // Channel Status
+        uint32_t ch1      :  1; // Channel Status 
+        uint32_t ch2      :  1; // Channel Status 
+        uint32_t ch3      :  1; // Channel Status 
+        uint32_t ch4      :  1; // Channel Status 
+        uint32_t ch5      :  1; // Channel Status 
+        uint32_t ch6      :  1; // Channel Status 
+        uint32_t ch7      :  1; // Channel Status 
+        uint32_t ch8      :  1; // Channel Status 
+        uint32_t ch9      :  1; // Channel Status 
+        uint32_t ch10     :  1; // Channel Status 
+        uint32_t ch11     :  1; // Channel Status 
+        uint32_t ch12     :  1; // Channel Status 
+        uint32_t ch13     :  1; // Channel Status 
+        uint32_t ch14     :  1; // Channel Status 
+        uint32_t ch15     :  1; // Channel Status 
+        uint32_t reserved : 16; 
+    } __attribute__((__packed__)) bits;
+} adc_chsr_t;
+
+/**
+ * ADC Last Converted Data Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t ldata    : 12; // Last Data Converted
+        uint32_t chnb     :  4; // Channel Number
+        uint32_t reserved : 16;
+    } __attribute__((__packed__)) bits;
+} adc_lcdr_t;
+
+/**
+ * ADC Interrupt Enable Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t eoc0      : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc1      : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc2      : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc3      : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc4      : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc5      : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc6      : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc7      : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc8      : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc9      : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc10     : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc11     : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc12     : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc13     : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc14     : 1; // End of Conversion Interrupt Enable x
+        uint32_t eoc15     : 1; // End of Conversion Interrupt Enable x
+        uint32_t reserved0 : 8;
+        uint32_t drdy      : 1; // Data Ready Interrupt Enable
+        uint32_t govre     : 1; // General Overrun Error Interrupt Enable
+        uint32_t compe     : 1; // comparison Event Interrupt Enable
+        uint32_t endrx     : 1; // End of Receive Buffer Interrupt Enable
+        uint32_t rxbuff    : 1; // Receive Buffer Full Interrupt Enable
+        uint32_t reserved1 : 3;
+    } __attribute__((__packed__)) bits;
+} adc_ier_t;
+
+/**
+ * ADC Interrupt Disable Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t eoc0      : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc1      : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc2      : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc3      : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc4      : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc5      : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc6      : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc7      : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc8      : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc9      : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc10     : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc11     : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc12     : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc13     : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc14     : 1; // End of Conversion Interrupt Disable x
+        uint32_t eoc15     : 1; // End of Conversion Interrupt Disable x
+        uint32_t reserved0 : 8;
+        uint32_t drdy      : 1; // Data Ready Interrupt Disable
+        uint32_t govre     : 1; // General Overrun Error Interrupt Disable
+        uint32_t compe     : 1; // comparison Event Interrupt Disable
+        uint32_t endrx     : 1; // End of Receive Buffer Interrupt Disable
+        uint32_t rxbuff    : 1; // Receive Buffer Full Interrupt Disable
+        uint32_t reserved1 : 3;
+    } __attribute__((__packed__)) bits;
+} adc_idr_t;
+
+/**
+ * ADC Interrupt Mask Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t eoc0      : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc1      : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc2      : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc3      : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc4      : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc5      : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc6      : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc7      : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc8      : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc9      : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc10     : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc11     : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc12     : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc13     : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc14     : 1; // End of Conversion Interrupt Mask x
+        uint32_t eoc15     : 1; // End of Conversion Interrupt Mask x
+        uint32_t reserved0 : 8;
+        uint32_t drdy      : 1; // Data Ready Interrupt Mask
+        uint32_t govre     : 1; // General Overrun Error Interrupt Mask
+        uint32_t compe     : 1; // comparison Event Interrupt Mask
+        uint32_t endrx     : 1; // End of Receive Buffer Interrupt Mask
+        uint32_t rxbuff    : 1; // Receive Buffer Full Interrupt Mask
+        uint32_t reserved1 : 3;
+    } __attribute__((__packed__)) bits;
+} adc_imr_t;
+
+/**
+ * ADC Interrupt Status Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t eoc0      : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc1      : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc2      : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc3      : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc4      : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc5      : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc6      : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc7      : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc8      : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc9      : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc10     : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc11     : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc12     : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc13     : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc14     : 1; // End of Conversion Interrupt Status x
+        uint32_t eoc15     : 1; // End of Conversion Interrupt Status x
+        uint32_t reserved0 : 8;
+        uint32_t drdy      : 1; // Data Ready Interrupt Status
+        uint32_t govre     : 1; // General Overrun Error Interrupt Status
+        uint32_t compe     : 1; // comparison Event Interrupt Status
+        uint32_t endrx     : 1; // End of Receive Buffer Interrupt Status
+        uint32_t rxbuff    : 1; // Receive Buffer Full Interrupt Status
+        uint32_t reserved1 : 3;
+    } __attribute__((__packed__)) bits;
+} adc_isr_t;
+
+/**
+ * ADC Overrun Status Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t ovre0      :  1; // Overrun Error x
+        uint32_t ovre1      :  1; // Overrun Error x
+        uint32_t ovre2      :  1; // Overrun Error x
+        uint32_t ovre3      :  1; // Overrun Error x
+        uint32_t ovre4      :  1; // Overrun Error x
+        uint32_t ovre5      :  1; // Overrun Error x
+        uint32_t ovre6      :  1; // Overrun Error x
+        uint32_t ovre7      :  1; // Overrun Error x
+        uint32_t ovre8      :  1; // Overrun Error x
+        uint32_t ovre9      :  1; // Overrun Error x
+        uint32_t ovre10     :  1; // Overrun Error x
+        uint32_t ovre11     :  1; // Overrun Error x
+        uint32_t ovre12     :  1; // Overrun Error x
+        uint32_t ovre13     :  1; // Overrun Error x
+        uint32_t ovre14     :  1; // Overrun Error x
+        uint32_t ovre15     :  1; // Overrun Error x
+        uint32_t reserved   : 16;
+    } __attribute__((__packed__)) bits;
+} adc_over_t;
+
+/**
+ * ADC Extended Mode Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t cmpmode    :  2; // Comparison Mode
+        uint32_t reserved0  :  2;
+        uint32_t cmpsel     :  4; // Comparison Selected Channel
+        uint32_t reserved1  :  1;
+        uint32_t cmpall     :  1; //Compare All Channels
+        uint32_t reserved2  : 14;
+        uint32_t tag        :  1; // TAG of ADC_LDCR register
+        uint32_t reserved3  :  7;
+    } __attribute__((__packed__)) bits;
+} adc_emr_t;
+
+/**
+ * ADC Compare Window Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t lowthres   : 12; // Low Threshold
+        uint32_t reserved0  :  4;
+        uint32_t highthres  : 12; // High Threshold
+        uint32_t reserved1  :  4;
+    } __attribute__((__packed__)) bits;
+} adc_cwr_t;
+
+/**
+ * ADC Channel Gain Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t gain0    : 2; // Gain Channel x
+        uint32_t gain1    : 2; // Gain Channel x
+        uint32_t gain2    : 2; // Gain Channel x
+        uint32_t gain3    : 2; // Gain Channel x
+        uint32_t gain4    : 2; // Gain Channel x
+        uint32_t gain5    : 2; // Gain Channel x
+        uint32_t gain6    : 2; // Gain Channel x
+        uint32_t gain7    : 2; // Gain Channel x
+        uint32_t gain8    : 2; // Gain Channel x
+        uint32_t gain9    : 2; // Gain Channel x
+        uint32_t gain10   : 2; // Gain Channel x
+        uint32_t gain11   : 2; // Gain Channel x
+        uint32_t gain12   : 2; // Gain Channel x
+        uint32_t gain13   : 2; // Gain Channel x
+        uint32_t gain14   : 2; // Gain Channel x
+        uint32_t gain15   : 2; // Gain Channel x
+    } __attribute__((__packed__)) bits;
+} adc_cgr_t;
+
+/**
+ * ADC Channel Offset Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t off0   : 1; // Offset for Channel x
+        uint32_t off1   : 1; // Offset for Channel x
+        uint32_t off2   : 1; // Offset for Channel x
+        uint32_t off3   : 1; // Offset for Channel x
+        uint32_t off4   : 1; // Offset for Channel x
+        uint32_t off5   : 1; // Offset for Channel x
+        uint32_t off6   : 1; // Offset for Channel x
+        uint32_t off7   : 1; // Offset for Channel x
+        uint32_t off8   : 1; // Offset for Channel x
+        uint32_t off9   : 1; // Offset for Channel x
+        uint32_t off10  : 1; // Offset for Channel x
+        uint32_t off11  : 1; // Offset for Channel x
+        uint32_t off12  : 1; // Offset for Channel x
+        uint32_t off13  : 1; // Offset for Channel x
+        uint32_t off14  : 1; // Offset for Channel x
+        uint32_t off15  : 1; // Offset for Channel x
+        uint32_t diff0  : 1; // Differential inputs for channel x
+        uint32_t diff1  : 1; // Differential inputs for channel x
+        uint32_t diff2  : 1; // Differential inputs for channel x
+        uint32_t diff3  : 1; // Differential inputs for channel x
+        uint32_t diff4  : 1; // Differential inputs for channel x
+        uint32_t diff5  : 1; // Differential inputs for channel x
+        uint32_t diff6  : 1; // Differential inputs for channel x
+        uint32_t diff7  : 1; // Differential inputs for channel x
+        uint32_t diff8  : 1; // Differential inputs for channel x
+        uint32_t diff9  : 1; // Differential inputs for channel x
+        uint32_t diff10 : 1; // Differential inputs for channel x
+        uint32_t diff11 : 1; // Differential inputs for channel x
+        uint32_t diff12 : 1; // Differential inputs for channel x
+        uint32_t diff13 : 1; // Differential inputs for channel x
+        uint32_t diff14 : 1; // Differential inputs for channel x
+        uint32_t diff15 : 1; // Differential inputs for channel x
+    } __attribute__((__packed__)) bits;
+} adc_cor_t;
+
+/**
+ * ADC Channel Data Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t data     : 12; // converted Data
+        uint32_t reserved : 20;
+    } __attribute__((__packed__)) bits;
+} adc_cdr_t;
+
+/**
+ * ADC Analog Control Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t reserved0 :  4;
+        uint32_t tson      :  1; // Temperature Sensor On
+        uint32_t reserved1 :  3;
+        uint32_t ibctl     :  2; // ADC Bias Current Control
+        uint32_t reserved2 : 22;
+    } __attribute__((__packed__)) bits;
+} adc_acr_t;
+
+/**
+ * ADC Write Protect Mode Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t wpen      :  1; // Write Protect Enable
+        uint32_t reserved0 :  7;
+        uint32_t wpkey     : 24; // Write Protect key
+    } __attribute__((__packed__)) bits;
+} adc_wpmr_t;
+
+#define ADC_WPMR_KEY 0x414443
+
+/**
+ * ADC Write Protect Status Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t wpvs      :  1; // Write Protect Violation Status
+        uint32_t reserved0 :  7;
+        uint32_t wpvsrc    : 16; // Write Protect Violation Source
+        uint32_t reserved1 :  8;
+    } __attribute__((__packed__)) bits;
+} adc_wpsr_t;
+
+/**
+ * ADC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3S
+ * Series, Preliminary, p. 989
+ */
+typedef struct adc
+{
+    volatile adc_cr_t cr; // Control Register
+    volatile adc_mr_t mr; // Mode Register
+    volatile adc_seqr1_t seqr1; // Channel Sequence Register 1
+    volatile adc_seqr2_t seqr2; // Channel Sequence Register 2
+    volatile adc_cher_t  cher;  // Channel Enable Register
+    volatile adc_chdr_t  chdr;  // Channel Disable Register
+    volatile adc_chsr_t  chsr;  // channel Status Register
+    uint32_t reserved0;
+    volatile adc_lcdr_t  lcdr;  // Last Converted Data Register
+    volatile adc_ier_t   ier;   // Interrupt Enable Register
+    volatile adc_idr_t   idr;   // Interrupt Disable Register
+    volatile adc_imr_t   imr;   // Interrupt Mask Register
+    volatile adc_isr_t   isr;   // Interrupt Status Register
+    uint32_t reserved1;
+    uint32_t reserved2;
+    volatile adc_over_t  over;  // Overrun Status Register
+    volatile adc_emr_t   emr;   // Extended Mode Register
+    volatile adc_cwr_t   cwr;   // Compare Window Register
+    volatile adc_cgr_t   cgr;   // Channel Gain Register
+    volatile adc_cor_t   cor;   // Channel Offset Register
+    volatile adc_cdr_t   cdr[16];  // Channel Data Register x
+    uint32_t reserved3;
+    volatile adc_acr_t   acr;   // Analog Control Register
+    uint32_t reserved4[76];
+    volatile adc_wpmr_t  wpmr;  // Write Protect Mode Register
+    volatile adc_wpsr_t  wpsr;  // Write Protect Status Register
+} adc_t;
+
+/**
+ * Memory mapping for the ADC
+ */
+#define ADC_BASE_ADDRESS 0x40038000
+volatile adc_t* ADC = (volatile adc_t *) ADC_BASE_ADDRESS; // ADC Base Address
+
+#define SAM3SADC_RESOURCE "Sam3AdcC.Resource"
+#define ADCC_SERVICE "AdcC.Service"
+#define ADCC_READ_STREAM_SERVICE "AdcC.ReadStream.Client"
+
+typedef struct { 
+  uint32_t channel  : 4;
+  uint32_t trgen    : 1;
+  uint32_t trgsel   : 3;
+  uint32_t lowres   : 1;
+  uint32_t sleep    : 1;
+  uint32_t fwup     : 1;
+  uint32_t freerun  : 1;
+  uint32_t prescal  : 8;
+  uint32_t startup  : 4;
+  uint32_t settling : 2;
+  uint32_t anach    : 1;
+  uint32_t tracktim : 4;
+  uint32_t transfer : 2;
+  uint32_t useq     : 1; 
+  uint32_t ibctl    : 2;
+  uint32_t diff     : 1;
+  uint32_t gain     : 2;
+  uint32_t offset   : 1;
+} sam3s_adc_channel_config_t;
+
+#endif //SAM3SADCHARDWARE_H
+
+
diff --git a/tos/chips/cortex/m3/sam3/s/dacc/Sam3sDac.nc b/tos/chips/cortex/m3/sam3/s/dacc/Sam3sDac.nc
new file mode 100644
index 00000000..6b763726
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/dacc/Sam3sDac.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+interface Sam3sDac
+{
+  /**
+   * triggerEn: enable external trigger mode
+   * triggerSel: select trigger source
+   * wordTransfer: 1: word transfer, 0: half-word
+   * sleep: 1: sleep mode, 0: normal mode
+   * userSel: select channel
+   * tagSelection: 1: bits 13-12 in data select channel
+   * maxSpeed: 1: max speed mode enabled
+   */
+  command error_t configure(
+      bool triggerEn,     
+      uint8_t triggerSel, 
+      bool wordTransfer,  
+      bool sleep,         
+      bool fastWakeUp,
+      uint8_t refreshPeriod,
+      uint8_t userSel,    
+      bool tagSelection,  
+      bool maxSpeed,      
+      uint8_t startupTime);
+
+
+  async command error_t enable(uint8_t channel);
+
+  async command error_t disable(uint8_t channel);
+
+  /**
+   * Sets the DAC value. If wordTransfer is selected in the configuration,
+   * then the lower half-word of data is one conversion value, and the upper
+   * half-word a second. The DAC has a FIFO of up to 4 conversion values.
+   *
+   * If tagSelection is set, then the upper 15-13 bits of each half-word
+   * indicate the channel.
+   *
+   * @return SUCCESS if ok, EBUSY if the DAC if the FIFO is full.
+   */
+  async command error_t set(uint32_t data);
+
+}
diff --git a/tos/chips/cortex/m3/sam3/s/dacc/Sam3sDacC.nc b/tos/chips/cortex/m3/sam3/s/dacc/Sam3sDacC.nc
new file mode 100644
index 00000000..87a46ada
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/dacc/Sam3sDacC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+configuration Sam3sDacC
+{
+  provides
+  {
+    interface StdControl;
+    interface Sam3sDac;
+  }
+}
+implementation
+{
+  components Sam3sDacP as DacP,
+             LedsC, NoLedsC,
+             HplNVICC,
+             HplSam3sClockC,
+             HplSam3sGeneralIOC;
+
+  StdControl = DacP;
+  Sam3sDac = DacP;
+
+  DacP.DacInterrupt -> HplNVICC.DACCInterrupt;
+  DacP.DacPin0 -> HplSam3sGeneralIOC.HplPioB13;
+  DacP.DacPin1 -> HplSam3sGeneralIOC.HplPioB14;
+  DacP.DacClockControl -> HplSam3sClockC.DACCCntl;
+  DacP.ClockConfig -> HplSam3sClockC;
+
+  components McuSleepC;
+  DacP.DacInterruptWrapper -> McuSleepC;
+
+  components HplSam3sPdcC;
+  DacP.HplPdc -> HplSam3sPdcC.DacPdcControl;
+
+}
diff --git a/tos/chips/cortex/m3/sam3/s/dacc/Sam3sDacP.nc b/tos/chips/cortex/m3/sam3/s/dacc/Sam3sDacP.nc
new file mode 100644
index 00000000..5e1f8edc
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/dacc/Sam3sDacP.nc
@@ -0,0 +1,152 @@
+/*
+ * Copyright (c) 2011 University of Utah. 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS
+ * IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDER OR ITS
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+#include "sam3sdacchardware.h"
+
+module Sam3sDacP
+{
+
+  provides
+  {
+    interface StdControl;
+    interface Sam3sDac;
+  }
+  uses
+  {
+    interface HplNVICInterruptCntl as DacInterrupt;
+    interface HplSam3GeneralIOPin as DacPin0;
+    interface HplSam3GeneralIOPin as DacPin1;
+    interface HplSam3PeripheralClockCntl as DacClockControl;
+    interface HplSam3Clock as ClockConfig;
+    interface FunctionWrapper as DacInterruptWrapper;
+    interface HplSam3Pdc as HplPdc;
+    interface Leds;
+  }
+}
+implementation
+{
+
+  command error_t StdControl.start()
+  {
+    atomic
+    {
+      DACC->cr.flat = 0x1; // software reset
+      call DacClockControl.enable();
+
+      /* Configure interrupts */
+      call DacInterrupt.configure(IRQ_PRIO_DAC);
+
+      /* Set IO line */
+      call DacPin0.disablePioControl(); // Disable whatever is set currently
+      call DacPin0.selectPeripheralD();
+
+      call DacPin1.disablePioControl(); // Disable whatever is set currently
+      call DacPin1.selectPeripheralD();
+    }
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop()
+  {
+    atomic
+    {
+      call DacClockControl.disable();
+      call DacInterrupt.disable();
+    }
+    return SUCCESS;
+  }
+
+  command error_t Sam3sDac.configure(
+      bool triggerEn,     // enable external trigger mode
+      uint8_t triggerSel, // select trigger source
+      bool wordTransfer,  // 1: word transfer, 0: half-word
+      bool sleep,         // 1: sleep mode, 0: normal mode
+      bool fastWakeUp,
+      uint8_t refreshPeriod,
+      uint8_t userSel,    // select channel
+      bool tagSelection,  // 1: bits 13-12 in data select channel
+      bool maxSpeed,      // 1: max speed mode enabled
+      uint8_t startupTime)
+  {
+    dacc_mr_t mr;
+
+    mr.bits.trgen = triggerEn;
+    mr.bits.trgsel = triggerSel & 0x7;
+    mr.bits.word = wordTransfer;
+    mr.bits.sleep = sleep;
+    mr.bits.fastwkup = fastWakeUp;
+    mr.bits.refresh = refreshPeriod;
+    mr.bits.user_sel = userSel;
+    mr.bits.tag = tagSelection;
+    mr.bits.maxs = maxSpeed;
+    mr.bits.startup = startupTime & 0x3F;
+
+    DACC->mr = mr;
+
+    return SUCCESS;
+  }
+
+  async command error_t Sam3sDac.enable(uint8_t channel)
+  {
+    if(channel >= DACC_MAX_CHANNELS)
+      return FAIL;
+
+    DACC->cher.flat = (1 << channel);
+    return SUCCESS;
+  }
+
+  async command error_t Sam3sDac.disable(uint8_t channel)
+  {
+    if(channel >= DACC_MAX_CHANNELS)
+      return FAIL;
+
+    DACC->chdr.flat = (1 << channel);
+  }
+
+  async command error_t Sam3sDac.set(uint32_t data)
+  {
+    if(DACC->isr.bits.txrdy)
+    {
+      DACC->cdr.bits.data = data;
+      return SUCCESS;
+    } else {
+      return EBUSY;
+    }
+  }
+
+  async event void ClockConfig.mainClockChanged(){}
+
+}
+
diff --git a/tos/chips/cortex/m3/sam3/s/dacc/sam3sdacchardware.h b/tos/chips/cortex/m3/sam3/s/dacc/sam3sdacchardware.h
new file mode 100644
index 00000000..b04887d0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/dacc/sam3sdacchardware.h
@@ -0,0 +1,280 @@
+/*
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Sam3s DACC register definitions
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3SDACCHARDWARE_H
+#define SAM3SDACCHARDWARE_H
+
+/**
+ * DACC Control Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t swrst    :  1; // Software Reset
+        uint32_t reserved : 31;
+    } __attribute__((__packed__)) bits;
+} dacc_cr_t;
+
+/**
+ * DACC Mode Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t trgen     : 1; // Trigger Enable
+        uint32_t trgsel    : 3; // Trigger Selection
+        uint32_t word      : 1; // Word Transfer
+        uint32_t sleep     : 1; // Sleep Mode
+        uint32_t fastwkup  : 1; // Fast Wake Up Mode
+        uint32_t reserved0 : 1;
+        uint32_t refresh   : 8; // Refresh Period
+        uint32_t user_sel  : 2; // User Channel Selection
+        uint32_t reserved1 : 2;
+        uint32_t tag       : 1; // Tag Selection Mode
+        uint32_t maxs      : 1; // Max Speed Mode
+        uint32_t reserved2 : 2;
+        uint32_t startup   : 6; // Startup Time Selection
+        uint32_t reserved3 : 2;
+    } __attribute__((__packed__)) bits;
+} dacc_mr_t;
+
+/**
+ * DACC Channel Enable Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t ch0      :  1; // Channel 0 enable
+        uint32_t ch1      :  1; // Channel 1 enable
+        uint32_t reserved : 30;
+    } __attribute__((__packed__)) bits;
+} dacc_cher_t;
+
+/**
+ * DACC Channel Disable Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t ch0      :  1; // Channel 0 disable
+        uint32_t ch1      :  1; // Channel 1 disable
+        uint32_t reserved : 30;
+    } __attribute__((__packed__)) bits;
+} dacc_chdr_t;
+
+/**
+ * DACC Channel Status Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t ch0      :  1; // Channel 0 Status 
+        uint32_t ch1      :  1; // Channel 1 Status
+        uint32_t reserved : 30;
+    } __attribute__((__packed__)) bits;
+} dacc_chsr_t;
+
+/**
+ * DACC Conversion Data Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t data    : 32; // Data to Convert
+    } __attribute__((__packed__)) bits;
+} dacc_cdr_t;
+
+/**
+ * DACC Interrupt Enable Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t txrdy     :  1; // Transmit Ready Interrupt Enable
+        uint32_t eoc       :  1; // End of Conversion Interrupt Enable
+        uint32_t endtx     :  1; // End of Transmit Buffer Interrupt Enable
+        uint32_t txbufe    :  1; // Transmit Buffer Empty Interrupt Enable
+        uint32_t reserved  : 28;
+    } __attribute__((__packed__)) bits;
+} dacc_ier_t;
+
+/**
+ * DACC Interrupt Disable Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t txrdy     :  1; // Transmit Ready Interrupt Disable
+        uint32_t eoc       :  1; // End of Conversion Interrupt Disable
+        uint32_t endtx     :  1; // End of Transmit Buffer Interrupt Disable
+        uint32_t txbufe    :  1; // Transmit Buffer Empty Interrupt Disable
+        uint32_t reserved  : 28;
+    } __attribute__((__packed__)) bits;
+} dacc_idr_t;
+
+/**
+ * DACC Interrupt Mask Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t txrdy     :  1; // Transmit Ready Interrupt Mask
+        uint32_t eoc       :  1; // End of Conversion Interrupt Mask
+        uint32_t endtx     :  1; // End of Transmit Buffer Interrupt Mask
+        uint32_t txbufe    :  1; // Transmit Buffer Empty Interrupt Mask
+        uint32_t reserved  : 28;
+    } __attribute__((__packed__)) bits;
+} dacc_imr_t;
+
+/**
+ * DACC Interrupt Status Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t txrdy     :  1; // Transmit Ready Interrupt Status
+        uint32_t eoc       :  1; // End of Conversion Interrupt Status
+        uint32_t endtx     :  1; // End of Transmit Buffer Interrupt Status
+        uint32_t txbufe    :  1; // Transmit Buffer Empty Interrupt Status
+        uint32_t reserved  : 28;
+    } __attribute__((__packed__)) bits;
+} dacc_isr_t;
+
+/**
+ * DACC Analog Current Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t ibctlch0     :  2; // Analog Output Current Control Channel 0
+        uint32_t ibctlch1     :  2; // Analog Output Current Control Channel 1
+        uint32_t reserved0    :  4;
+        uint32_t ibctldaccore :  2; // Bias Current Control for DAC Core
+        uint32_t reserved1    : 22;
+    } __attribute__((__packed__)) bits;
+} dacc_acr_t;
+
+/**
+ * DACC Write Protect Mode Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t wpen      :  1; // Write Protect Enable
+        uint32_t reserved0 :  7;
+        uint32_t wpkey     : 24; // Write Protect key
+    } __attribute__((__packed__)) bits;
+} dacc_wpmr_t;
+
+#define DACC_WPMR_KEY 0x444143
+
+/**
+ * DACC Write Protect Status Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t wproterr   :  1; // Write Protection error
+        uint32_t reserved0  :  7;
+        uint32_t wprotaddr  :  8; // Write protection error address
+        uint32_t reserved1  : 16;
+    } __attribute__((__packed__)) bits;
+} dacc_wpsr_t;
+
+/**
+ * DACC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3S
+ * Series, Preliminary, p. 1019
+ */
+typedef struct dacc
+{
+    volatile dacc_cr_t   cr;   // Control Register
+    volatile dacc_mr_t   mr;   // Mode Register
+    uint32_t reserved0;
+    uint32_t reserved1;
+    volatile dacc_cher_t cher; // Channel Enable Register
+    volatile dacc_chdr_t chdr; // Channel Disable Register
+    volatile dacc_chsr_t chsr; // Channel Status Register
+    uint32_t reserved2;
+    volatile dacc_cdr_t  cdr;  // Channel Data Register
+    volatile dacc_ier_t  ier;  // Ineterrupt Enable Register
+    volatile dacc_idr_t  idr;  // Interrupt Disable Register
+    volatile dacc_imr_t  imr;  // Interrupt Mask Register
+    volatile dacc_isr_t  isr;  // Interrupt Status Register
+    uint32_t reserved3[96];
+    volatile dacc_acr_t  acr;  // Analog current Register
+    uint32_t reserved4[76];
+    volatile dacc_wpmr_t wpmr; // Write Protect Mode Register
+    volatile dacc_wpsr_t wpsr; // Write Protect Status Register
+} dacc_t;
+
+/**
+ * Memory mapping for the DACC
+ */
+#define DACC_BASE_ADDRESS 0x4003C000
+volatile dacc_t* DACC = (volatile dacc_t *) DACC_BASE_ADDRESS; // DACC Base Address
+
+#define DACC_MAX_CHANNELS 2
+
+#endif //SAM3SADCHARDWARE_H
+
+
diff --git a/tos/chips/cortex/m3/sam3/s/eefc/sam3eefchardware.h b/tos/chips/cortex/m3/sam3/s/eefc/sam3eefchardware.h
new file mode 100644
index 00000000..e67bec91
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/eefc/sam3eefchardware.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ /**
+  * @author Thomas Schmid
+  */
+
+#ifndef SAM3SEEFCHARDWARE_H
+#define SAM3SEEFCHARDWARE_H
+
+#include "eefchardware.h"
+
+/**
+ * Memory mapping for the EEFC0. No EEFC1 on the Sam3S.
+ */
+volatile eefc_t* EEFC0 = (volatile eefc_t*) 0x400E0A00; // EEFC0 Base Address
+
+#endif // SAM3SEEFCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/s/matrix/sam3matrixhardware.h b/tos/chips/cortex/m3/sam3/s/matrix/sam3matrixhardware.h
new file mode 100644
index 00000000..8e8256ec
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/matrix/sam3matrixhardware.h
@@ -0,0 +1,122 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Bus Matrix register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef _SAM3SMATRIXHARDWARE_H
+#define _SAM3SMATRIXHARDWARE_H
+
+#include "matrixhardware.h"
+
+
+/**
+ * System I/O Configuration Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t reserved0  :  4;
+        uint32_t sysio4     :  1;
+        uint32_t sysio5     :  1;
+        uint32_t sysio6     :  1;
+        uint32_t sysio7     :  1;
+        uint32_t reserved1  :  2;
+        uint32_t sysio10    :  1;
+        uint32_t sysio11    :  1;
+        uint32_t sysio12    :  1;
+        uint32_t reserved2  : 19;
+    }__attribute__((__packed__)) bits;
+} ccfg_sysio_t;
+
+/**
+ * SMC NAND Flash Chip select Configuration Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t smc_nfcs0   :  1;
+        uint32_t smc_nfcs1   :  1;
+        uint32_t smc_nfcs2   :  1;
+        uint32_t smc_nfcs3   :  1;
+        uint32_t reserved    : 28;
+    }__attribute__((__packed__)) bits;
+} ccfg_smcnfcs_t;
+
+
+/**
+ * Bus Matrix Register definitions,  AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3S Series, Preliminary, p. 352
+ */
+typedef struct matrix
+{
+    volatile matrix_mcfg_t mcfg0; // master configuration register 0
+    volatile matrix_mcfg_t mcfg1; // master configuration register 1
+    volatile matrix_mcfg_t mcfg2; // master configuration register 2
+    volatile matrix_mcfg_t mcfg3; // master configuration register 3
+    uint32_t reserved0[12];
+    volatile matrix_scfg_t scfg0; // slave confgiruation register 0
+    volatile matrix_scfg_t scfg1; // slave confgiruation register 1
+    volatile matrix_scfg_t scfg2; // slave confgiruation register 2
+    volatile matrix_scfg_t scfg3; // slave confgiruation register 3
+    volatile matrix_scfg_t scfg4; // slave confgiruation register 4
+    uint32_t reserved1[11];
+    volatile matrix_pras_t pras0; // priority register A for slave 0
+    uint32_t reserved2;
+    volatile matrix_pras_t pras1; // priority register A for slave 0
+    uint32_t reserved3;
+    volatile matrix_pras_t pras2; // priority register A for slave 0
+    uint32_t reserved4;
+    volatile matrix_pras_t pras3; // priority register A for slave 0
+    uint32_t reserved5;
+    volatile matrix_pras_t pras4; // priority register A for slave 0
+    uint32_t reserved6[28];
+    volatile ccfg_sysio_t sysio; // System I/O Configuration register
+    uint32_t reserved7;
+    volatile ccfg_smcnfcs_t smcnfcs; // SMC Chip Select NAND Flash Assignment Register
+    uint32_t reserved8[49];
+    volatile matrix_wpmr_t wpmr; // Write Protect Mode Register
+    volatile matrix_wpsr_t wpsr; // Write Protect Status Register
+} matrix_t;
+
+/**
+ * Memory mapping for the MATRIX
+ */
+volatile matrix_t* MATRIX = (volatile matrix_t*) 0x400E0200; // MATRIX Base Address
+
+#endif // _SAM3SMATRIXHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/s/nvic/HplNVICC.nc b/tos/chips/cortex/m3/sam3/s/nvic/HplNVICC.nc
new file mode 100644
index 00000000..cdfffc31
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/nvic/HplNVICC.nc
@@ -0,0 +1,161 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+#include "sam3snvichardware.h"
+
+configuration HplNVICC
+{
+    provides
+    {
+        interface HplNVICCntl;
+		interface Init;
+
+        interface HplNVICInterruptCntl as SUPCInterrupt;   // SUPPLY CONTROLLER
+        interface HplNVICInterruptCntl as RSTCInterrupt;   // RESET CONTROLLER
+        interface HplNVICInterruptCntl as RTCInterrupt;    // REAL TIME CLOCK
+        interface HplNVICInterruptCntl as RTTInterrupt;    // REAL TIME TIMER
+        interface HplNVICInterruptCntl as WDGInterrupt;    // WATCHDOG TIMER
+        interface HplNVICInterruptCntl as PMCInterrupt;    // PMC
+        interface HplNVICInterruptCntl as EFC0Interrupt;   // EFC
+        interface HplNVICInterruptCntl as RES0Interrupt;   // Reserved
+        interface HplNVICInterruptCntl as UART0Interrupt;  // UART0
+        interface HplNVICInterruptCntl as UART1Interrupt;  // UART1
+        interface HplNVICInterruptCntl as SMCInterrupt;    // SMC
+        interface HplNVICInterruptCntl as PIOAInterrupt;   // PARALLEL I/O CONTROLLER A
+        interface HplNVICInterruptCntl as PIOBInterrupt;   // PARALLEL I/O CONTROLLER B
+        interface HplNVICInterruptCntl as PIOCInterrupt;   // PARALLEL I/O CONTROLLER C
+        interface HplNVICInterruptCntl as USART0Interrupt; // USART0
+        interface HplNVICInterruptCntl as USART1Interrupt; // USART1
+        interface HplNVICInterruptCntl as RES1Interrupt;   // Reserved
+        interface HplNVICInterruptCntl as RES2Interrupt;   // Reserved
+        interface HplNVICInterruptCntl as HSMCIInterrupt;  // HIGH SPEED MULTIMEDIA CARD INTERFACE
+        interface HplNVICInterruptCntl as TWI0Interrupt;   // TWO WIRE INTERFACE 0
+        interface HplNVICInterruptCntl as TWI1Interrupt;   // TWO WIRE INTERFACE 1
+        interface HplNVICInterruptCntl as SPIInterrupt;    // SERIAL PERIPHERAL INTERFACE
+        interface HplNVICInterruptCntl as SSCInterrupt;    // SYNCHRONOUS SERIAL CONTROLLER
+        interface HplNVICInterruptCntl as TC0Interrupt;    // TIMER/COUNTER 0
+        interface HplNVICInterruptCntl as TC1Interrupt;    // TIMER/COUNTER 1
+        interface HplNVICInterruptCntl as TC2Interrupt;    // TIMER/COUNTER 2
+        interface HplNVICInterruptCntl as TC3Interrupt;    // TIMER/COUNTER 3
+        interface HplNVICInterruptCntl as TC4Interrupt;    // TIMER/COUNTER 4
+        interface HplNVICInterruptCntl as TC5Interrupt;    // TIMER/COUNTER 5
+        interface HplNVICInterruptCntl as ADCInterrupt;    // ANALOG-TO-DIGITAL CONVERTER
+        interface HplNVICInterruptCntl as DACCInterrupt;   // DIGITAL-TO-ANALOG CONVERTE
+        interface HplNVICInterruptCntl as PWMInterrupt;    // PULSE WIDTH MODULATION
+        interface HplNVICInterruptCntl as CRCCUInterrupt;  // CRC CALCULATION UNIT
+        interface HplNVICInterruptCntl as ACCInterrupt;    // ANALOG COMPARATOR
+        interface HplNVICInterruptCntl as UDPInterrupt;    // USB DEVICE PORT
+    }
+}
+
+implementation
+{
+    components HplNVICCntlP,
+        new HplNVICInterruptP(AT91C_ID_SUPC)   as SUPC  , 
+        new HplNVICInterruptP(AT91C_ID_RSTC)   as RSTC  , 
+        new HplNVICInterruptP(AT91C_ID_RTC)    as RTC   , 
+        new HplNVICInterruptP(AT91C_ID_RTT)    as RTT   , 
+        new HplNVICInterruptP(AT91C_ID_WDG)    as WDG   , 
+        new HplNVICInterruptP(AT91C_ID_PMC)    as PMC   , 
+        new HplNVICInterruptP(AT91C_ID_EFC0)   as EFC0  , 
+        new HplNVICInterruptP(AT91C_ID_RES0)   as RES0  , 
+        new HplNVICInterruptP(AT91C_ID_UART0)  as UART0 , 
+        new HplNVICInterruptP(AT91C_ID_UART1)  as UART1 , 
+        new HplNVICInterruptP(AT91C_ID_SMC)    as SMC   , 
+        new HplNVICInterruptP(AT91C_ID_PIOA)   as PIOA  , 
+        new HplNVICInterruptP(AT91C_ID_PIOB)   as PIOB  , 
+        new HplNVICInterruptP(AT91C_ID_PIOC)   as PIOC  , 
+        new HplNVICInterruptP(AT91C_ID_USART0) as USART0, 
+        new HplNVICInterruptP(AT91C_ID_USART1) as USART1, 
+        new HplNVICInterruptP(AT91C_ID_RES1)   as RES1  , 
+        new HplNVICInterruptP(AT91C_ID_RES2)   as RES2  , 
+        new HplNVICInterruptP(AT91C_ID_HSMCI)  as HSMCI , 
+        new HplNVICInterruptP(AT91C_ID_TWI0)   as TWI0  , 
+        new HplNVICInterruptP(AT91C_ID_TWI1)   as TWI1  , 
+        new HplNVICInterruptP(AT91C_ID_SPI)    as SPI   , 
+        new HplNVICInterruptP(AT91C_ID_SSC)    as SSC   , 
+        new HplNVICInterruptP(AT91C_ID_TC0)    as TC0   , 
+        new HplNVICInterruptP(AT91C_ID_TC1)    as TC1   , 
+        new HplNVICInterruptP(AT91C_ID_TC2)    as TC2   , 
+        new HplNVICInterruptP(AT91C_ID_TC3)    as TC3   , 
+        new HplNVICInterruptP(AT91C_ID_TC4)    as TC4   , 
+        new HplNVICInterruptP(AT91C_ID_TC5)    as TC5   , 
+        new HplNVICInterruptP(AT91C_ID_ADC)    as ADC   , 
+        new HplNVICInterruptP(AT91C_ID_DACC)   as DACC  , 
+        new HplNVICInterruptP(AT91C_ID_PWM)    as PWM   , 
+        new HplNVICInterruptP(AT91C_ID_CRCCU)  as CRCCU , 
+        new HplNVICInterruptP(AT91C_ID_ACC)    as ACC   , 
+        new HplNVICInterruptP(AT91C_ID_UDP)    as UDP   ;
+
+
+    HplNVICCntl = HplNVICCntlP;
+    Init = HplNVICCntlP;
+
+    SUPCInterrupt   = SUPC.Cntl;
+    RSTCInterrupt   = RSTC.Cntl;
+    RTCInterrupt    = RTC.Cntl;
+    RTTInterrupt    = RTT.Cntl;
+    WDGInterrupt    = WDG.Cntl;
+    PMCInterrupt    = PMC.Cntl;
+    EFC0Interrupt   = EFC0.Cntl;
+    RES0Interrupt   = RES0.Cntl;
+    UART0Interrupt  = UART0.Cntl;
+    UART1Interrupt  = UART1.Cntl;
+    SMCInterrupt    = SMC.Cntl;
+    PIOAInterrupt   = PIOA.Cntl;
+    PIOBInterrupt   = PIOB.Cntl;
+    PIOCInterrupt   = PIOC.Cntl;
+    USART0Interrupt = USART0.Cntl;
+    USART1Interrupt = USART1.Cntl;
+    RES1Interrupt   = RES1.Cntl;
+    RES2Interrupt   = RES2.Cntl;
+    HSMCIInterrupt  = HSMCI.Cntl;
+    TWI0Interrupt   = TWI0.Cntl;
+    TWI1Interrupt   = TWI1.Cntl;
+    SPIInterrupt    = SPI.Cntl;
+    SSCInterrupt    = SSC.Cntl;
+    TC0Interrupt    = TC0.Cntl;
+    TC1Interrupt    = TC1.Cntl;
+    TC2Interrupt    = TC2.Cntl;
+    TC3Interrupt    = TC3.Cntl;
+    TC4Interrupt    = TC4.Cntl;
+    TC5Interrupt    = TC5.Cntl;
+    ADCInterrupt    = ADC.Cntl;
+    DACCInterrupt   = DACC.Cntl;
+    PWMInterrupt    = PWM.Cntl;
+    CRCCUInterrupt  = CRCCU.Cntl;
+    ACCInterrupt    = ACC.Cntl;
+    UDPInterrupt    = UDP.Cntl;
+}
diff --git a/tos/chips/cortex/m3/sam3/s/nvic/sam3snvichardware.h b/tos/chips/cortex/m3/sam3/s/nvic/sam3snvichardware.h
new file mode 100644
index 00000000..15727986
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/nvic/sam3snvichardware.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3SNVICHARDWARE_H
+#define SAM3SNVICHARDWARE_H
+
+#include "nvichardware.h"
+#include "sam3shardware.h"
+
+/// Interrupt sources
+typedef enum irqn
+{
+/******  Cortex-M3 Processor Exceptions Numbers ***************************************************/
+  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                             */
+  MemoryManagement_IRQn       = -12,    /*!< 4 Cortex-M3 Memory Management Interrupt              */
+  BusFault_IRQn               = -11,    /*!< 5 Cortex-M3 Bus Fault Interrupt                      */
+  UsageFault_IRQn             = -10,    /*!< 6 Cortex-M3 Usage Fault Interrupt                    */
+  SVCall_IRQn                 = -5,     /*!< 11 Cortex-M3 SV Call Interrupt                       */
+  DebugMonitor_IRQn           = -4,     /*!< 12 Cortex-M3 Debug Monitor Interrupt                 */
+  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M3 Pend SV Interrupt                       */
+  SysTick_IRQn                = -1,     /*!< 15 Cortex-M3 System Tick Interrupt                   */
+
+/******  AT91SAM3U4 specific Interrupt Numbers *********************************************************/
+ IRQn_SUPC                  = AT91C_ID_SUPC  , // SUPPLY CONTROLLER
+ IRQn_RSTC                  = AT91C_ID_RSTC  , // RESET CONTROLLER
+ IRQn_RTC                   = AT91C_ID_RTC   , // REAL TIME CLOCK
+ IRQn_RTT                   = AT91C_ID_RTT   , // REAL TIME TIMER
+ IRQn_WDG                   = AT91C_ID_WDG   , // WATCHDOG TIMER
+ IRQn_PMC                   = AT91C_ID_PMC   , // PMC
+ IRQn_EFC0                  = AT91C_ID_EFC0  , // EFC
+ IRQn_RES0                  = AT91C_ID_RES0  , // Reserved
+ IRQn_UART0                 = AT91C_ID_UART0 , // UART0
+ IRQn_UART1                 = AT91C_ID_UART1 , // UART1
+ IRQn_SMC                   = AT91C_ID_SMC   , // SMC
+ IRQn_PIOA                  = AT91C_ID_PIOA  , // PARALLEL I/O CONTROLLER A
+ IRQn_PIOB                  = AT91C_ID_PIOB  , // PARALLEL I/O CONTROLLER B
+ IRQn_PIOC                  = AT91C_ID_PIOC  , // PARALLEL I/O CONTROLLER C
+ IRQn_USART0                = AT91C_ID_USART0, // USART0
+ IRQn_USART1                = AT91C_ID_USART1, // USART1
+ IRQn_RES1                  = AT91C_ID_RES1  , // Reserved
+ IRQn_RES2                  = AT91C_ID_RES2  , // Reserved
+ IRQn_HSMCI                 = AT91C_ID_HSMCI , // HIGH SPEED MULTIMEDIA CARD INTERFACE
+ IRQn_TWI0                  = AT91C_ID_TWI0  , // TWO WIRE INTERFACE 0
+ IRQn_TWI1                  = AT91C_ID_TWI1  , // TWO WIRE INTERFACE 1
+ IRQn_SPI                   = AT91C_ID_SPI   , // SERIAL PERIPHERAL INTERFACE
+ IRQn_SSC                   = AT91C_ID_SSC   , // SYNCHRONOUS SERIAL CONTROLLER
+ IRQn_TC0                   = AT91C_ID_TC0   , // TIMER/COUNTER 0
+ IRQn_TC1                   = AT91C_ID_TC1   , // TIMER/COUNTER 1
+ IRQn_TC2                   = AT91C_ID_TC2   , // TIMER/COUNTER 2
+ IRQn_TC3                   = AT91C_ID_TC3   , // TIMER/COUNTER 3
+ IRQn_TC4                   = AT91C_ID_TC4   , // TIMER/COUNTER 4
+ IRQn_TC5                   = AT91C_ID_TC5   , // TIMER/COUNTER 5
+ IRQn_ADC                   = AT91C_ID_ADC   , // ANALOG-TO-DIGITAL CONVERTER
+ IRQn_DACC                  = AT91C_ID_DACC  , // DIGITAL-TO-ANALOG CONVERTE
+ IRQn_PWM                   = AT91C_ID_PWM   , // PULSE WIDTH MODULATION
+ IRQn_CRCCU                 = AT91C_ID_CRCCU , // CRC CALCULATION UNIT
+ IRQn_ACC                   = AT91C_ID_ACC   , // ANALOG COMPARATOR
+ IRQn_UDP                   = AT91C_ID_UDP    // USB DEVICE PORT
+} irqn_t;
+
+#endif // SAM3SNVICHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/s/pdc/HplSam3sPdcC.nc b/tos/chips/cortex/m3/sam3/s/pdc/HplSam3sPdcC.nc
new file mode 100644
index 00000000..7eecf6b3
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/pdc/HplSam3sPdcC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ * @author Thomas Schmid
+ */
+
+#include "sam3sadchardware.h"
+#include "sam3sdacchardware.h"
+
+configuration HplSam3sPdcC {
+  provides 
+  {
+    interface HplSam3Pdc as AdcPdcControl;
+    interface HplSam3Pdc as DacPdcControl;
+  }
+}
+
+implementation {
+
+  components new HplSam3PdcP(ADC_BASE_ADDRESS) as AdcPdc;
+  components new HplSam3PdcP(DACC_BASE_ADDRESS) as DacPdc;
+
+  AdcPdcControl = AdcPdc;
+  DacPdcControl = DacPdc;
+}
diff --git a/tos/chips/cortex/m3/sam3/s/pins/HplSam3sGeneralIOC.nc b/tos/chips/cortex/m3/sam3/s/pins/HplSam3sGeneralIOC.nc
new file mode 100644
index 00000000..e958d93d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/pins/HplSam3sGeneralIOC.nc
@@ -0,0 +1,865 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * General-purpose I/O abstraction for the SAM3S.
+ * Includes PIO controllers A, B, C with 32 pins each.
+ * TODO: There are other capabilities that are not integrated yet:
+ *  - pull down
+ *  - shitt trigger
+ *  - parallel capture
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ * @author Thomas Schmid
+ */
+
+configuration HplSam3sGeneralIOC
+{
+	provides {
+		interface GeneralIO as PioA0;
+		interface GeneralIO as PioA1;
+		interface GeneralIO as PioA2;
+		interface GeneralIO as PioA3;
+		interface GeneralIO as PioA4;
+		interface GeneralIO as PioA5;
+		interface GeneralIO as PioA6;
+		interface GeneralIO as PioA7;
+		interface GeneralIO as PioA8;
+		interface GeneralIO as PioA9;
+		interface GeneralIO as PioA10;
+		interface GeneralIO as PioA11;
+		interface GeneralIO as PioA12;
+		interface GeneralIO as PioA13;
+		interface GeneralIO as PioA14;
+		interface GeneralIO as PioA15;
+		interface GeneralIO as PioA16;
+		interface GeneralIO as PioA17;
+		interface GeneralIO as PioA18;
+		interface GeneralIO as PioA19;
+		interface GeneralIO as PioA20;
+		interface GeneralIO as PioA21;
+		interface GeneralIO as PioA22;
+		interface GeneralIO as PioA23;
+		interface GeneralIO as PioA24;
+		interface GeneralIO as PioA25;
+		interface GeneralIO as PioA26;
+		interface GeneralIO as PioA27;
+		interface GeneralIO as PioA28;
+		interface GeneralIO as PioA29;
+		interface GeneralIO as PioA30;
+		interface GeneralIO as PioA31;
+
+		interface GeneralIO as PioB0;
+		interface GeneralIO as PioB1;
+		interface GeneralIO as PioB2;
+		interface GeneralIO as PioB3;
+		interface GeneralIO as PioB4;
+		interface GeneralIO as PioB5;
+		interface GeneralIO as PioB6;
+		interface GeneralIO as PioB7;
+		interface GeneralIO as PioB8;
+		interface GeneralIO as PioB9;
+		interface GeneralIO as PioB10;
+		interface GeneralIO as PioB11;
+		interface GeneralIO as PioB12;
+		interface GeneralIO as PioB13;
+		interface GeneralIO as PioB14;
+		interface GeneralIO as PioB15;
+		interface GeneralIO as PioB16;
+		interface GeneralIO as PioB17;
+		interface GeneralIO as PioB18;
+		interface GeneralIO as PioB19;
+		interface GeneralIO as PioB20;
+		interface GeneralIO as PioB21;
+		interface GeneralIO as PioB22;
+		interface GeneralIO as PioB23;
+		interface GeneralIO as PioB24;
+		interface GeneralIO as PioB25;
+		interface GeneralIO as PioB26;
+		interface GeneralIO as PioB27;
+		interface GeneralIO as PioB28;
+		interface GeneralIO as PioB29;
+		interface GeneralIO as PioB30;
+		interface GeneralIO as PioB31;
+
+		interface GeneralIO as PioC0;
+		interface GeneralIO as PioC1;
+		interface GeneralIO as PioC2;
+		interface GeneralIO as PioC3;
+		interface GeneralIO as PioC4;
+		interface GeneralIO as PioC5;
+		interface GeneralIO as PioC6;
+		interface GeneralIO as PioC7;
+		interface GeneralIO as PioC8;
+		interface GeneralIO as PioC9;
+		interface GeneralIO as PioC10;
+		interface GeneralIO as PioC11;
+		interface GeneralIO as PioC12;
+		interface GeneralIO as PioC13;
+		interface GeneralIO as PioC14;
+		interface GeneralIO as PioC15;
+		interface GeneralIO as PioC16;
+		interface GeneralIO as PioC17;
+		interface GeneralIO as PioC18;
+		interface GeneralIO as PioC19;
+		interface GeneralIO as PioC20;
+		interface GeneralIO as PioC21;
+		interface GeneralIO as PioC22;
+		interface GeneralIO as PioC23;
+		interface GeneralIO as PioC24;
+		interface GeneralIO as PioC25;
+		interface GeneralIO as PioC26;
+		interface GeneralIO as PioC27;
+		interface GeneralIO as PioC28;
+		interface GeneralIO as PioC29;
+		interface GeneralIO as PioC30;
+		interface GeneralIO as PioC31;
+
+		interface GpioInterrupt as InterruptPioA0;
+		interface GpioInterrupt as InterruptPioA1;
+		interface GpioInterrupt as InterruptPioA2;
+		interface GpioInterrupt as InterruptPioA3;
+		interface GpioInterrupt as InterruptPioA4;
+		interface GpioInterrupt as InterruptPioA5;
+		interface GpioInterrupt as InterruptPioA6;
+		interface GpioInterrupt as InterruptPioA7;
+		interface GpioInterrupt as InterruptPioA8;
+		interface GpioInterrupt as InterruptPioA9;
+		interface GpioInterrupt as InterruptPioA10;
+		interface GpioInterrupt as InterruptPioA11;
+		interface GpioInterrupt as InterruptPioA12;
+		interface GpioInterrupt as InterruptPioA13;
+		interface GpioInterrupt as InterruptPioA14;
+		interface GpioInterrupt as InterruptPioA15;
+		interface GpioInterrupt as InterruptPioA16;
+		interface GpioInterrupt as InterruptPioA17;
+		interface GpioInterrupt as InterruptPioA18;
+		interface GpioInterrupt as InterruptPioA19;
+		interface GpioInterrupt as InterruptPioA20;
+		interface GpioInterrupt as InterruptPioA21;
+		interface GpioInterrupt as InterruptPioA22;
+		interface GpioInterrupt as InterruptPioA23;
+		interface GpioInterrupt as InterruptPioA24;
+		interface GpioInterrupt as InterruptPioA25;
+		interface GpioInterrupt as InterruptPioA26;
+		interface GpioInterrupt as InterruptPioA27;
+		interface GpioInterrupt as InterruptPioA28;
+		interface GpioInterrupt as InterruptPioA29;
+		interface GpioInterrupt as InterruptPioA30;
+		interface GpioInterrupt as InterruptPioA31;
+                                               
+		interface GpioInterrupt as InterruptPioB0;
+		interface GpioInterrupt as InterruptPioB1;
+		interface GpioInterrupt as InterruptPioB2;
+		interface GpioInterrupt as InterruptPioB3;
+		interface GpioInterrupt as InterruptPioB4;
+		interface GpioInterrupt as InterruptPioB5;
+		interface GpioInterrupt as InterruptPioB6;
+		interface GpioInterrupt as InterruptPioB7;
+		interface GpioInterrupt as InterruptPioB8;
+		interface GpioInterrupt as InterruptPioB9;
+		interface GpioInterrupt as InterruptPioB10;
+		interface GpioInterrupt as InterruptPioB11;
+		interface GpioInterrupt as InterruptPioB12;
+		interface GpioInterrupt as InterruptPioB13;
+		interface GpioInterrupt as InterruptPioB14;
+		interface GpioInterrupt as InterruptPioB15;
+		interface GpioInterrupt as InterruptPioB16;
+		interface GpioInterrupt as InterruptPioB17;
+		interface GpioInterrupt as InterruptPioB18;
+		interface GpioInterrupt as InterruptPioB19;
+		interface GpioInterrupt as InterruptPioB20;
+		interface GpioInterrupt as InterruptPioB21;
+		interface GpioInterrupt as InterruptPioB22;
+		interface GpioInterrupt as InterruptPioB23;
+		interface GpioInterrupt as InterruptPioB24;
+		interface GpioInterrupt as InterruptPioB25;
+		interface GpioInterrupt as InterruptPioB26;
+		interface GpioInterrupt as InterruptPioB27;
+		interface GpioInterrupt as InterruptPioB28;
+		interface GpioInterrupt as InterruptPioB29;
+		interface GpioInterrupt as InterruptPioB30;
+		interface GpioInterrupt as InterruptPioB31;
+                                               
+		interface GpioInterrupt as InterruptPioC0;
+		interface GpioInterrupt as InterruptPioC1;
+		interface GpioInterrupt as InterruptPioC2;
+		interface GpioInterrupt as InterruptPioC3;
+		interface GpioInterrupt as InterruptPioC4;
+		interface GpioInterrupt as InterruptPioC5;
+		interface GpioInterrupt as InterruptPioC6;
+		interface GpioInterrupt as InterruptPioC7;
+		interface GpioInterrupt as InterruptPioC8;
+		interface GpioInterrupt as InterruptPioC9;
+		interface GpioInterrupt as InterruptPioC10;
+		interface GpioInterrupt as InterruptPioC11;
+		interface GpioInterrupt as InterruptPioC12;
+		interface GpioInterrupt as InterruptPioC13;
+		interface GpioInterrupt as InterruptPioC14;
+		interface GpioInterrupt as InterruptPioC15;
+		interface GpioInterrupt as InterruptPioC16;
+		interface GpioInterrupt as InterruptPioC17;
+		interface GpioInterrupt as InterruptPioC18;
+		interface GpioInterrupt as InterruptPioC19;
+		interface GpioInterrupt as InterruptPioC20;
+		interface GpioInterrupt as InterruptPioC21;
+		interface GpioInterrupt as InterruptPioC22;
+		interface GpioInterrupt as InterruptPioC23;
+		interface GpioInterrupt as InterruptPioC24;
+		interface GpioInterrupt as InterruptPioC25;
+		interface GpioInterrupt as InterruptPioC26;
+		interface GpioInterrupt as InterruptPioC27;
+		interface GpioInterrupt as InterruptPioC28;
+		interface GpioInterrupt as InterruptPioC29;
+		interface GpioInterrupt as InterruptPioC30;
+		interface GpioInterrupt as InterruptPioC31;
+
+		interface GpioCapture as CapturePioA0;
+		interface GpioCapture as CapturePioA1;
+		interface GpioCapture as CapturePioA2;
+		interface GpioCapture as CapturePioA3;
+		interface GpioCapture as CapturePioA4;
+		interface GpioCapture as CapturePioA5;
+		interface GpioCapture as CapturePioA6;
+		interface GpioCapture as CapturePioA7;
+		interface GpioCapture as CapturePioA8;
+		interface GpioCapture as CapturePioA9;
+		interface GpioCapture as CapturePioA10;
+		interface GpioCapture as CapturePioA11;
+		interface GpioCapture as CapturePioA12;
+		interface GpioCapture as CapturePioA13;
+		interface GpioCapture as CapturePioA14;
+		interface GpioCapture as CapturePioA15;
+		interface GpioCapture as CapturePioA16;
+		interface GpioCapture as CapturePioA17;
+		interface GpioCapture as CapturePioA18;
+		interface GpioCapture as CapturePioA19;
+		interface GpioCapture as CapturePioA20;
+		interface GpioCapture as CapturePioA21;
+		interface GpioCapture as CapturePioA22;
+		interface GpioCapture as CapturePioA23;
+		interface GpioCapture as CapturePioA24;
+		interface GpioCapture as CapturePioA25;
+		interface GpioCapture as CapturePioA26;
+		interface GpioCapture as CapturePioA27;
+		interface GpioCapture as CapturePioA28;
+		interface GpioCapture as CapturePioA29;
+		interface GpioCapture as CapturePioA30;
+		interface GpioCapture as CapturePioA31;
+                                           
+		interface GpioCapture as CapturePioB0;
+		interface GpioCapture as CapturePioB1;
+		interface GpioCapture as CapturePioB2;
+		interface GpioCapture as CapturePioB3;
+		interface GpioCapture as CapturePioB4;
+		interface GpioCapture as CapturePioB5;
+		interface GpioCapture as CapturePioB6;
+		interface GpioCapture as CapturePioB7;
+		interface GpioCapture as CapturePioB8;
+		interface GpioCapture as CapturePioB9;
+		interface GpioCapture as CapturePioB10;
+		interface GpioCapture as CapturePioB11;
+		interface GpioCapture as CapturePioB12;
+		interface GpioCapture as CapturePioB13;
+		interface GpioCapture as CapturePioB14;
+		interface GpioCapture as CapturePioB15;
+		interface GpioCapture as CapturePioB16;
+		interface GpioCapture as CapturePioB17;
+		interface GpioCapture as CapturePioB18;
+		interface GpioCapture as CapturePioB19;
+		interface GpioCapture as CapturePioB20;
+		interface GpioCapture as CapturePioB21;
+		interface GpioCapture as CapturePioB22;
+		interface GpioCapture as CapturePioB23;
+		interface GpioCapture as CapturePioB24;
+		interface GpioCapture as CapturePioB25;
+		interface GpioCapture as CapturePioB26;
+		interface GpioCapture as CapturePioB27;
+		interface GpioCapture as CapturePioB28;
+		interface GpioCapture as CapturePioB29;
+		interface GpioCapture as CapturePioB30;
+		interface GpioCapture as CapturePioB31;
+                                           
+		interface GpioCapture as CapturePioC0;
+		interface GpioCapture as CapturePioC1;
+		interface GpioCapture as CapturePioC2;
+		interface GpioCapture as CapturePioC3;
+		interface GpioCapture as CapturePioC4;
+		interface GpioCapture as CapturePioC5;
+		interface GpioCapture as CapturePioC6;
+		interface GpioCapture as CapturePioC7;
+		interface GpioCapture as CapturePioC8;
+		interface GpioCapture as CapturePioC9;
+		interface GpioCapture as CapturePioC10;
+		interface GpioCapture as CapturePioC11;
+		interface GpioCapture as CapturePioC12;
+		interface GpioCapture as CapturePioC13;
+		interface GpioCapture as CapturePioC14;
+		interface GpioCapture as CapturePioC15;
+		interface GpioCapture as CapturePioC16;
+		interface GpioCapture as CapturePioC17;
+		interface GpioCapture as CapturePioC18;
+		interface GpioCapture as CapturePioC19;
+		interface GpioCapture as CapturePioC20;
+		interface GpioCapture as CapturePioC21;
+		interface GpioCapture as CapturePioC22;
+		interface GpioCapture as CapturePioC23;
+		interface GpioCapture as CapturePioC24;
+		interface GpioCapture as CapturePioC25;
+		interface GpioCapture as CapturePioC26;
+		interface GpioCapture as CapturePioC27;
+		interface GpioCapture as CapturePioC28;
+		interface GpioCapture as CapturePioC29;
+		interface GpioCapture as CapturePioC30;
+		interface GpioCapture as CapturePioC31;
+
+		interface HplSam3GeneralIOPin as HplPioA0;
+		interface HplSam3GeneralIOPin as HplPioA1;
+		interface HplSam3GeneralIOPin as HplPioA2;
+		interface HplSam3GeneralIOPin as HplPioA3;
+		interface HplSam3GeneralIOPin as HplPioA4;
+		interface HplSam3GeneralIOPin as HplPioA5;
+		interface HplSam3GeneralIOPin as HplPioA6;
+		interface HplSam3GeneralIOPin as HplPioA7;
+		interface HplSam3GeneralIOPin as HplPioA8;
+		interface HplSam3GeneralIOPin as HplPioA9;
+		interface HplSam3GeneralIOPin as HplPioA10;
+		interface HplSam3GeneralIOPin as HplPioA11;
+		interface HplSam3GeneralIOPin as HplPioA12;
+		interface HplSam3GeneralIOPin as HplPioA13;
+		interface HplSam3GeneralIOPin as HplPioA14;
+		interface HplSam3GeneralIOPin as HplPioA15;
+		interface HplSam3GeneralIOPin as HplPioA16;
+		interface HplSam3GeneralIOPin as HplPioA17;
+		interface HplSam3GeneralIOPin as HplPioA18;
+		interface HplSam3GeneralIOPin as HplPioA19;
+		interface HplSam3GeneralIOPin as HplPioA20;
+		interface HplSam3GeneralIOPin as HplPioA21;
+		interface HplSam3GeneralIOPin as HplPioA22;
+		interface HplSam3GeneralIOPin as HplPioA23;
+		interface HplSam3GeneralIOPin as HplPioA24;
+		interface HplSam3GeneralIOPin as HplPioA25;
+		interface HplSam3GeneralIOPin as HplPioA26;
+		interface HplSam3GeneralIOPin as HplPioA27;
+		interface HplSam3GeneralIOPin as HplPioA28;
+		interface HplSam3GeneralIOPin as HplPioA29;
+		interface HplSam3GeneralIOPin as HplPioA30;
+		interface HplSam3GeneralIOPin as HplPioA31;
+
+		interface HplSam3GeneralIOPin as HplPioB0;
+		interface HplSam3GeneralIOPin as HplPioB1;
+		interface HplSam3GeneralIOPin as HplPioB2;
+		interface HplSam3GeneralIOPin as HplPioB3;
+		interface HplSam3GeneralIOPin as HplPioB4;
+		interface HplSam3GeneralIOPin as HplPioB5;
+		interface HplSam3GeneralIOPin as HplPioB6;
+		interface HplSam3GeneralIOPin as HplPioB7;
+		interface HplSam3GeneralIOPin as HplPioB8;
+		interface HplSam3GeneralIOPin as HplPioB9;
+		interface HplSam3GeneralIOPin as HplPioB10;
+		interface HplSam3GeneralIOPin as HplPioB11;
+		interface HplSam3GeneralIOPin as HplPioB12;
+		interface HplSam3GeneralIOPin as HplPioB13;
+		interface HplSam3GeneralIOPin as HplPioB14;
+		interface HplSam3GeneralIOPin as HplPioB15;
+		interface HplSam3GeneralIOPin as HplPioB16;
+		interface HplSam3GeneralIOPin as HplPioB17;
+		interface HplSam3GeneralIOPin as HplPioB18;
+		interface HplSam3GeneralIOPin as HplPioB19;
+		interface HplSam3GeneralIOPin as HplPioB20;
+		interface HplSam3GeneralIOPin as HplPioB21;
+		interface HplSam3GeneralIOPin as HplPioB22;
+		interface HplSam3GeneralIOPin as HplPioB23;
+		interface HplSam3GeneralIOPin as HplPioB24;
+		interface HplSam3GeneralIOPin as HplPioB25;
+		interface HplSam3GeneralIOPin as HplPioB26;
+		interface HplSam3GeneralIOPin as HplPioB27;
+		interface HplSam3GeneralIOPin as HplPioB28;
+		interface HplSam3GeneralIOPin as HplPioB29;
+		interface HplSam3GeneralIOPin as HplPioB30;
+		interface HplSam3GeneralIOPin as HplPioB31;
+
+		interface HplSam3GeneralIOPin as HplPioC0;
+		interface HplSam3GeneralIOPin as HplPioC1;
+		interface HplSam3GeneralIOPin as HplPioC2;
+		interface HplSam3GeneralIOPin as HplPioC3;
+		interface HplSam3GeneralIOPin as HplPioC4;
+		interface HplSam3GeneralIOPin as HplPioC5;
+		interface HplSam3GeneralIOPin as HplPioC6;
+		interface HplSam3GeneralIOPin as HplPioC7;
+		interface HplSam3GeneralIOPin as HplPioC8;
+		interface HplSam3GeneralIOPin as HplPioC9;
+		interface HplSam3GeneralIOPin as HplPioC10;
+		interface HplSam3GeneralIOPin as HplPioC11;
+		interface HplSam3GeneralIOPin as HplPioC12;
+		interface HplSam3GeneralIOPin as HplPioC13;
+		interface HplSam3GeneralIOPin as HplPioC14;
+		interface HplSam3GeneralIOPin as HplPioC15;
+		interface HplSam3GeneralIOPin as HplPioC16;
+		interface HplSam3GeneralIOPin as HplPioC17;
+		interface HplSam3GeneralIOPin as HplPioC18;
+		interface HplSam3GeneralIOPin as HplPioC19;
+		interface HplSam3GeneralIOPin as HplPioC20;
+		interface HplSam3GeneralIOPin as HplPioC21;
+		interface HplSam3GeneralIOPin as HplPioC22;
+		interface HplSam3GeneralIOPin as HplPioC23;
+		interface HplSam3GeneralIOPin as HplPioC24;
+		interface HplSam3GeneralIOPin as HplPioC25;
+		interface HplSam3GeneralIOPin as HplPioC26;
+		interface HplSam3GeneralIOPin as HplPioC27;
+		interface HplSam3GeneralIOPin as HplPioC28;
+		interface HplSam3GeneralIOPin as HplPioC29;
+		interface HplSam3GeneralIOPin as HplPioC30;
+		interface HplSam3GeneralIOPin as HplPioC31;
+	}
+}
+
+implementation
+{
+	components 
+	new HplSam3GeneralIOPioC(0x400e0e00) as PioA,
+	new HplSam3GeneralIOPioC(0x400e1000) as PioB,
+	new HplSam3GeneralIOPioC(0x400e1200) as PioC;
+
+    components HplSam3GeneralIOP;
+    PioA.HplPort -> HplSam3GeneralIOP.HplPortA;
+    PioB.HplPort -> HplSam3GeneralIOP.HplPortB;
+    PioC.HplPort -> HplSam3GeneralIOP.HplPortC;
+
+    components McuSleepC;
+    HplSam3GeneralIOP.PioAInterruptWrapper -> McuSleepC;
+    HplSam3GeneralIOP.PioBInterruptWrapper -> McuSleepC;
+    HplSam3GeneralIOP.PioCInterruptWrapper -> McuSleepC;
+
+    components HplNVICC, HplSam3sClockC;
+    PioA.PIOIrqControl -> HplNVICC.PIOAInterrupt;
+    PioA.PIOClockControl -> HplSam3sClockC.PIOACntl;
+    PioB.PIOIrqControl -> HplNVICC.PIOBInterrupt;
+    PioB.PIOClockControl -> HplSam3sClockC.PIOBCntl;
+    PioC.PIOIrqControl -> HplNVICC.PIOCInterrupt;
+    PioC.PIOClockControl -> HplSam3sClockC.PIOCCntl;
+
+	PioA0 = PioA.Pin0;
+	PioA1 = PioA.Pin1;
+	PioA2 = PioA.Pin2;
+	PioA3 = PioA.Pin3;
+	PioA4 = PioA.Pin4;
+	PioA5 = PioA.Pin5;
+	PioA6 = PioA.Pin6;
+	PioA7 = PioA.Pin7;
+	PioA8 = PioA.Pin8;
+	PioA9 = PioA.Pin9;
+	PioA10 = PioA.Pin10;
+	PioA11 = PioA.Pin11;
+	PioA12 = PioA.Pin12;
+	PioA13 = PioA.Pin13;
+	PioA14 = PioA.Pin14;
+	PioA15 = PioA.Pin15;
+	PioA16 = PioA.Pin16;
+	PioA17 = PioA.Pin17;
+	PioA18 = PioA.Pin18;
+	PioA19 = PioA.Pin19;
+	PioA20 = PioA.Pin20;
+	PioA21 = PioA.Pin21;
+	PioA22 = PioA.Pin22;
+	PioA23 = PioA.Pin23;
+	PioA24 = PioA.Pin24;
+	PioA25 = PioA.Pin25;
+	PioA26 = PioA.Pin26;
+	PioA27 = PioA.Pin27;
+	PioA28 = PioA.Pin28;
+	PioA29 = PioA.Pin29;
+	PioA30 = PioA.Pin30;
+	PioA31 = PioA.Pin31;
+
+	PioB0 = PioB.Pin0;
+	PioB1 = PioB.Pin1;
+	PioB2 = PioB.Pin2;
+	PioB3 = PioB.Pin3;
+	PioB4 = PioB.Pin4;
+	PioB5 = PioB.Pin5;
+	PioB6 = PioB.Pin6;
+	PioB7 = PioB.Pin7;
+	PioB8 = PioB.Pin8;
+	PioB9 = PioB.Pin9;
+	PioB10 = PioB.Pin10;
+	PioB11 = PioB.Pin11;
+	PioB12 = PioB.Pin12;
+	PioB13 = PioB.Pin13;
+	PioB14 = PioB.Pin14;
+	PioB15 = PioB.Pin15;
+	PioB16 = PioB.Pin16;
+	PioB17 = PioB.Pin17;
+	PioB18 = PioB.Pin18;
+	PioB19 = PioB.Pin19;
+	PioB20 = PioB.Pin20;
+	PioB21 = PioB.Pin21;
+	PioB22 = PioB.Pin22;
+	PioB23 = PioB.Pin23;
+	PioB24 = PioB.Pin24;
+	PioB25 = PioB.Pin25;
+	PioB26 = PioB.Pin26;
+	PioB27 = PioB.Pin27;
+	PioB28 = PioB.Pin28;
+	PioB29 = PioB.Pin29;
+	PioB30 = PioB.Pin30;
+	PioB31 = PioB.Pin31;
+
+	PioC0 = PioC.Pin0;
+	PioC1 = PioC.Pin1;
+	PioC2 = PioC.Pin2;
+	PioC3 = PioC.Pin3;
+	PioC4 = PioC.Pin4;
+	PioC5 = PioC.Pin5;
+	PioC6 = PioC.Pin6;
+	PioC7 = PioC.Pin7;
+	PioC8 = PioC.Pin8;
+	PioC9 = PioC.Pin9;
+	PioC10 = PioC.Pin10;
+	PioC11 = PioC.Pin11;
+	PioC12 = PioC.Pin12;
+	PioC13 = PioC.Pin13;
+	PioC14 = PioC.Pin14;
+	PioC15 = PioC.Pin15;
+	PioC16 = PioC.Pin16;
+	PioC17 = PioC.Pin17;
+	PioC18 = PioC.Pin18;
+	PioC19 = PioC.Pin19;
+	PioC20 = PioC.Pin20;
+	PioC21 = PioC.Pin21;
+	PioC22 = PioC.Pin22;
+	PioC23 = PioC.Pin23;
+	PioC24 = PioC.Pin24;
+	PioC25 = PioC.Pin25;
+	PioC26 = PioC.Pin26;
+	PioC27 = PioC.Pin27;
+	PioC28 = PioC.Pin28;
+	PioC29 = PioC.Pin29;
+	PioC30 = PioC.Pin30;
+	PioC31 = PioC.Pin31;
+
+	InterruptPioA0 = PioA.InterruptPin0;
+	InterruptPioA1 = PioA.InterruptPin1;
+	InterruptPioA2 = PioA.InterruptPin2;
+	InterruptPioA3 = PioA.InterruptPin3;
+	InterruptPioA4 = PioA.InterruptPin4;
+	InterruptPioA5 = PioA.InterruptPin5;
+	InterruptPioA6 = PioA.InterruptPin6;
+	InterruptPioA7 = PioA.InterruptPin7;
+	InterruptPioA8 = PioA.InterruptPin8;
+	InterruptPioA9 = PioA.InterruptPin9;
+	InterruptPioA10 = PioA.InterruptPin10;
+	InterruptPioA11 = PioA.InterruptPin11;
+	InterruptPioA12 = PioA.InterruptPin12;
+	InterruptPioA13 = PioA.InterruptPin13;
+	InterruptPioA14 = PioA.InterruptPin14;
+	InterruptPioA15 = PioA.InterruptPin15;
+	InterruptPioA16 = PioA.InterruptPin16;
+	InterruptPioA17 = PioA.InterruptPin17;
+	InterruptPioA18 = PioA.InterruptPin18;
+	InterruptPioA19 = PioA.InterruptPin19;
+	InterruptPioA20 = PioA.InterruptPin20;
+	InterruptPioA21 = PioA.InterruptPin21;
+	InterruptPioA22 = PioA.InterruptPin22;
+	InterruptPioA23 = PioA.InterruptPin23;
+	InterruptPioA24 = PioA.InterruptPin24;
+	InterruptPioA25 = PioA.InterruptPin25;
+	InterruptPioA26 = PioA.InterruptPin26;
+	InterruptPioA27 = PioA.InterruptPin27;
+	InterruptPioA28 = PioA.InterruptPin28;
+	InterruptPioA29 = PioA.InterruptPin29;
+	InterruptPioA30 = PioA.InterruptPin30;
+	InterruptPioA31 = PioA.InterruptPin31;
+                
+	InterruptPioB0 = PioB.InterruptPin0;
+	InterruptPioB1 = PioB.InterruptPin1;
+	InterruptPioB2 = PioB.InterruptPin2;
+	InterruptPioB3 = PioB.InterruptPin3;
+	InterruptPioB4 = PioB.InterruptPin4;
+	InterruptPioB5 = PioB.InterruptPin5;
+	InterruptPioB6 = PioB.InterruptPin6;
+	InterruptPioB7 = PioB.InterruptPin7;
+	InterruptPioB8 = PioB.InterruptPin8;
+	InterruptPioB9 = PioB.InterruptPin9;
+	InterruptPioB10 = PioB.InterruptPin10;
+	InterruptPioB11 = PioB.InterruptPin11;
+	InterruptPioB12 = PioB.InterruptPin12;
+	InterruptPioB13 = PioB.InterruptPin13;
+	InterruptPioB14 = PioB.InterruptPin14;
+	InterruptPioB15 = PioB.InterruptPin15;
+	InterruptPioB16 = PioB.InterruptPin16;
+	InterruptPioB17 = PioB.InterruptPin17;
+	InterruptPioB18 = PioB.InterruptPin18;
+	InterruptPioB19 = PioB.InterruptPin19;
+	InterruptPioB20 = PioB.InterruptPin20;
+	InterruptPioB21 = PioB.InterruptPin21;
+	InterruptPioB22 = PioB.InterruptPin22;
+	InterruptPioB23 = PioB.InterruptPin23;
+	InterruptPioB24 = PioB.InterruptPin24;
+	InterruptPioB25 = PioB.InterruptPin25;
+	InterruptPioB26 = PioB.InterruptPin26;
+	InterruptPioB27 = PioB.InterruptPin27;
+	InterruptPioB28 = PioB.InterruptPin28;
+	InterruptPioB29 = PioB.InterruptPin29;
+	InterruptPioB30 = PioB.InterruptPin30;
+	InterruptPioB31 = PioB.InterruptPin31;
+                
+	InterruptPioC0 = PioC.InterruptPin0;
+	InterruptPioC1 = PioC.InterruptPin1;
+	InterruptPioC2 = PioC.InterruptPin2;
+	InterruptPioC3 = PioC.InterruptPin3;
+	InterruptPioC4 = PioC.InterruptPin4;
+	InterruptPioC5 = PioC.InterruptPin5;
+	InterruptPioC6 = PioC.InterruptPin6;
+	InterruptPioC7 = PioC.InterruptPin7;
+	InterruptPioC8 = PioC.InterruptPin8;
+	InterruptPioC9 = PioC.InterruptPin9;
+	InterruptPioC10 = PioC.InterruptPin10;
+	InterruptPioC11 = PioC.InterruptPin11;
+	InterruptPioC12 = PioC.InterruptPin12;
+	InterruptPioC13 = PioC.InterruptPin13;
+	InterruptPioC14 = PioC.InterruptPin14;
+	InterruptPioC15 = PioC.InterruptPin15;
+	InterruptPioC16 = PioC.InterruptPin16;
+	InterruptPioC17 = PioC.InterruptPin17;
+	InterruptPioC18 = PioC.InterruptPin18;
+	InterruptPioC19 = PioC.InterruptPin19;
+	InterruptPioC20 = PioC.InterruptPin20;
+	InterruptPioC21 = PioC.InterruptPin21;
+	InterruptPioC22 = PioC.InterruptPin22;
+	InterruptPioC23 = PioC.InterruptPin23;
+	InterruptPioC24 = PioC.InterruptPin24;
+	InterruptPioC25 = PioC.InterruptPin25;
+	InterruptPioC26 = PioC.InterruptPin26;
+	InterruptPioC27 = PioC.InterruptPin27;
+	InterruptPioC28 = PioC.InterruptPin28;
+	InterruptPioC29 = PioC.InterruptPin29;
+	InterruptPioC30 = PioC.InterruptPin30;
+	InterruptPioC31 = PioC.InterruptPin31;
+
+	CapturePioA0 = PioA.CapturePin0;
+	CapturePioA1 = PioA.CapturePin1;
+	CapturePioA2 = PioA.CapturePin2;
+	CapturePioA3 = PioA.CapturePin3;
+	CapturePioA4 = PioA.CapturePin4;
+	CapturePioA5 = PioA.CapturePin5;
+	CapturePioA6 = PioA.CapturePin6;
+	CapturePioA7 = PioA.CapturePin7;
+	CapturePioA8 = PioA.CapturePin8;
+	CapturePioA9 = PioA.CapturePin9;
+	CapturePioA10 = PioA.CapturePin10;
+	CapturePioA11 = PioA.CapturePin11;
+	CapturePioA12 = PioA.CapturePin12;
+	CapturePioA13 = PioA.CapturePin13;
+	CapturePioA14 = PioA.CapturePin14;
+	CapturePioA15 = PioA.CapturePin15;
+	CapturePioA16 = PioA.CapturePin16;
+	CapturePioA17 = PioA.CapturePin17;
+	CapturePioA18 = PioA.CapturePin18;
+	CapturePioA19 = PioA.CapturePin19;
+	CapturePioA20 = PioA.CapturePin20;
+	CapturePioA21 = PioA.CapturePin21;
+	CapturePioA22 = PioA.CapturePin22;
+	CapturePioA23 = PioA.CapturePin23;
+	CapturePioA24 = PioA.CapturePin24;
+	CapturePioA25 = PioA.CapturePin25;
+	CapturePioA26 = PioA.CapturePin26;
+	CapturePioA27 = PioA.CapturePin27;
+	CapturePioA28 = PioA.CapturePin28;
+	CapturePioA29 = PioA.CapturePin29;
+	CapturePioA30 = PioA.CapturePin30;
+	CapturePioA31 = PioA.CapturePin31;
+              
+	CapturePioB0 = PioB.CapturePin0;
+	CapturePioB1 = PioB.CapturePin1;
+	CapturePioB2 = PioB.CapturePin2;
+	CapturePioB3 = PioB.CapturePin3;
+	CapturePioB4 = PioB.CapturePin4;
+	CapturePioB5 = PioB.CapturePin5;
+	CapturePioB6 = PioB.CapturePin6;
+	CapturePioB7 = PioB.CapturePin7;
+	CapturePioB8 = PioB.CapturePin8;
+	CapturePioB9 = PioB.CapturePin9;
+	CapturePioB10 = PioB.CapturePin10;
+	CapturePioB11 = PioB.CapturePin11;
+	CapturePioB12 = PioB.CapturePin12;
+	CapturePioB13 = PioB.CapturePin13;
+	CapturePioB14 = PioB.CapturePin14;
+	CapturePioB15 = PioB.CapturePin15;
+	CapturePioB16 = PioB.CapturePin16;
+	CapturePioB17 = PioB.CapturePin17;
+	CapturePioB18 = PioB.CapturePin18;
+	CapturePioB19 = PioB.CapturePin19;
+	CapturePioB20 = PioB.CapturePin20;
+	CapturePioB21 = PioB.CapturePin21;
+	CapturePioB22 = PioB.CapturePin22;
+	CapturePioB23 = PioB.CapturePin23;
+	CapturePioB24 = PioB.CapturePin24;
+	CapturePioB25 = PioB.CapturePin25;
+	CapturePioB26 = PioB.CapturePin26;
+	CapturePioB27 = PioB.CapturePin27;
+	CapturePioB28 = PioB.CapturePin28;
+	CapturePioB29 = PioB.CapturePin29;
+	CapturePioB30 = PioB.CapturePin30;
+	CapturePioB31 = PioB.CapturePin31;
+              
+	CapturePioC0 = PioC.CapturePin0;
+	CapturePioC1 = PioC.CapturePin1;
+	CapturePioC2 = PioC.CapturePin2;
+	CapturePioC3 = PioC.CapturePin3;
+	CapturePioC4 = PioC.CapturePin4;
+	CapturePioC5 = PioC.CapturePin5;
+	CapturePioC6 = PioC.CapturePin6;
+	CapturePioC7 = PioC.CapturePin7;
+	CapturePioC8 = PioC.CapturePin8;
+	CapturePioC9 = PioC.CapturePin9;
+	CapturePioC10 = PioC.CapturePin10;
+	CapturePioC11 = PioC.CapturePin11;
+	CapturePioC12 = PioC.CapturePin12;
+	CapturePioC13 = PioC.CapturePin13;
+	CapturePioC14 = PioC.CapturePin14;
+	CapturePioC15 = PioC.CapturePin15;
+	CapturePioC16 = PioC.CapturePin16;
+	CapturePioC17 = PioC.CapturePin17;
+	CapturePioC18 = PioC.CapturePin18;
+	CapturePioC19 = PioC.CapturePin19;
+	CapturePioC20 = PioC.CapturePin20;
+	CapturePioC21 = PioC.CapturePin21;
+	CapturePioC22 = PioC.CapturePin22;
+	CapturePioC23 = PioC.CapturePin23;
+	CapturePioC24 = PioC.CapturePin24;
+	CapturePioC25 = PioC.CapturePin25;
+	CapturePioC26 = PioC.CapturePin26;
+	CapturePioC27 = PioC.CapturePin27;
+	CapturePioC28 = PioC.CapturePin28;
+	CapturePioC29 = PioC.CapturePin29;
+	CapturePioC30 = PioC.CapturePin30;
+	CapturePioC31 = PioC.CapturePin31;
+
+	HplPioA0 = PioA.HplPin0;
+	HplPioA1 = PioA.HplPin1;
+	HplPioA2 = PioA.HplPin2;
+	HplPioA3 = PioA.HplPin3;
+	HplPioA4 = PioA.HplPin4;
+	HplPioA5 = PioA.HplPin5;
+	HplPioA6 = PioA.HplPin6;
+	HplPioA7 = PioA.HplPin7;
+	HplPioA8 = PioA.HplPin8;
+	HplPioA9 = PioA.HplPin9;
+	HplPioA10 = PioA.HplPin10;
+	HplPioA11 = PioA.HplPin11;
+	HplPioA12 = PioA.HplPin12;
+	HplPioA13 = PioA.HplPin13;
+	HplPioA14 = PioA.HplPin14;
+	HplPioA15 = PioA.HplPin15;
+	HplPioA16 = PioA.HplPin16;
+	HplPioA17 = PioA.HplPin17;
+	HplPioA18 = PioA.HplPin18;
+	HplPioA19 = PioA.HplPin19;
+	HplPioA20 = PioA.HplPin20;
+	HplPioA21 = PioA.HplPin21;
+	HplPioA22 = PioA.HplPin22;
+	HplPioA23 = PioA.HplPin23;
+	HplPioA24 = PioA.HplPin24;
+	HplPioA25 = PioA.HplPin25;
+	HplPioA26 = PioA.HplPin26;
+	HplPioA27 = PioA.HplPin27;
+	HplPioA28 = PioA.HplPin28;
+	HplPioA29 = PioA.HplPin29;
+	HplPioA30 = PioA.HplPin30;
+	HplPioA31 = PioA.HplPin31;
+
+	HplPioB0 = PioB.HplPin0;
+	HplPioB1 = PioB.HplPin1;
+	HplPioB2 = PioB.HplPin2;
+	HplPioB3 = PioB.HplPin3;
+	HplPioB4 = PioB.HplPin4;
+	HplPioB5 = PioB.HplPin5;
+	HplPioB6 = PioB.HplPin6;
+	HplPioB7 = PioB.HplPin7;
+	HplPioB8 = PioB.HplPin8;
+	HplPioB9 = PioB.HplPin9;
+	HplPioB10 = PioB.HplPin10;
+	HplPioB11 = PioB.HplPin11;
+	HplPioB12 = PioB.HplPin12;
+	HplPioB13 = PioB.HplPin13;
+	HplPioB14 = PioB.HplPin14;
+	HplPioB15 = PioB.HplPin15;
+	HplPioB16 = PioB.HplPin16;
+	HplPioB17 = PioB.HplPin17;
+	HplPioB18 = PioB.HplPin18;
+	HplPioB19 = PioB.HplPin19;
+	HplPioB20 = PioB.HplPin20;
+	HplPioB21 = PioB.HplPin21;
+	HplPioB22 = PioB.HplPin22;
+	HplPioB23 = PioB.HplPin23;
+	HplPioB24 = PioB.HplPin24;
+	HplPioB25 = PioB.HplPin25;
+	HplPioB26 = PioB.HplPin26;
+	HplPioB27 = PioB.HplPin27;
+	HplPioB28 = PioB.HplPin28;
+	HplPioB29 = PioB.HplPin29;
+	HplPioB30 = PioB.HplPin30;
+	HplPioB31 = PioB.HplPin31;
+
+	HplPioC0 = PioC.HplPin0;
+	HplPioC1 = PioC.HplPin1;
+	HplPioC2 = PioC.HplPin2;
+	HplPioC3 = PioC.HplPin3;
+	HplPioC4 = PioC.HplPin4;
+	HplPioC5 = PioC.HplPin5;
+	HplPioC6 = PioC.HplPin6;
+	HplPioC7 = PioC.HplPin7;
+	HplPioC8 = PioC.HplPin8;
+	HplPioC9 = PioC.HplPin9;
+	HplPioC10 = PioC.HplPin10;
+	HplPioC11 = PioC.HplPin11;
+	HplPioC12 = PioC.HplPin12;
+	HplPioC13 = PioC.HplPin13;
+	HplPioC14 = PioC.HplPin14;
+	HplPioC15 = PioC.HplPin15;
+	HplPioC16 = PioC.HplPin16;
+	HplPioC17 = PioC.HplPin17;
+	HplPioC18 = PioC.HplPin18;
+	HplPioC19 = PioC.HplPin19;
+	HplPioC20 = PioC.HplPin20;
+	HplPioC21 = PioC.HplPin21;
+	HplPioC22 = PioC.HplPin22;
+	HplPioC23 = PioC.HplPin23;
+	HplPioC24 = PioC.HplPin24;
+	HplPioC25 = PioC.HplPin25;
+	HplPioC26 = PioC.HplPin26;
+	HplPioC27 = PioC.HplPin27;
+	HplPioC28 = PioC.HplPin28;
+	HplPioC29 = PioC.HplPin29;
+	HplPioC30 = PioC.HplPin30;
+	HplPioC31 = PioC.HplPin31;
+}
diff --git a/tos/chips/cortex/m3/sam3/s/pmc/HplSam3sClockC.nc b/tos/chips/cortex/m3/sam3/s/pmc/HplSam3sClockC.nc
new file mode 100644
index 00000000..e41a162b
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/pmc/HplSam3sClockC.nc
@@ -0,0 +1,157 @@
+/**
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is the main configuration for the low-layer clock module.
+ *
+ * @author Thomas Schmid
+ */
+
+configuration HplSam3sClockC
+{
+    provides
+    {
+        interface HplSam3Clock;
+
+        interface HplSam3PeripheralClockCntl as RTCCntl;
+        interface HplSam3PeripheralClockCntl as RTTCntl;
+        interface HplSam3PeripheralClockCntl as WDGCntl;
+        interface HplSam3PeripheralClockCntl as PMCCntl;
+        interface HplSam3PeripheralClockCntl as EFC0Cntl;
+        interface HplSam3PeripheralClockCntl as RES0Cntl;
+        interface HplSam3PeripheralClockCntl as UART0Cntl;
+        interface HplSam3PeripheralClockCntl as UART1Cntl;
+        interface HplSam3PeripheralClockCntl as SMCCntl;
+        interface HplSam3PeripheralClockCntl as PIOACntl;
+        interface HplSam3PeripheralClockCntl as PIOBCntl;
+        interface HplSam3PeripheralClockCntl as PIOCCntl;
+        interface HplSam3PeripheralClockCntl as USART0Cntl;
+        interface HplSam3PeripheralClockCntl as USART1Cntl;
+        interface HplSam3PeripheralClockCntl as RES1Cntl;
+        interface HplSam3PeripheralClockCntl as RES2Cntl;
+        interface HplSam3PeripheralClockCntl as HSMCICntl;
+        interface HplSam3PeripheralClockCntl as TWI0Cntl;
+        interface HplSam3PeripheralClockCntl as TWI1Cntl;
+        interface HplSam3PeripheralClockCntl as SPICntl;
+        interface HplSam3PeripheralClockCntl as SSCCntl;
+        interface HplSam3PeripheralClockCntl as TC0Cntl;
+        interface HplSam3PeripheralClockCntl as TC1Cntl;
+        interface HplSam3PeripheralClockCntl as TC2Cntl;
+        interface HplSam3PeripheralClockCntl as TC3Cntl;
+        interface HplSam3PeripheralClockCntl as TC4Cntl;
+        interface HplSam3PeripheralClockCntl as TC5Cntl;
+        interface HplSam3PeripheralClockCntl as ADCCntl;
+        interface HplSam3PeripheralClockCntl as DACCCntl;
+        interface HplSam3PeripheralClockCntl as PWMCntl;
+        interface HplSam3PeripheralClockCntl as CRCCUCntl;
+        interface HplSam3PeripheralClockCntl as ACCCntl;
+        interface HplSam3PeripheralClockCntl as UDPCntl;
+    }
+}
+implementation
+{
+#define PMC_PC_BASE  0x400e0410
+#define PMC_PC1_BASE 0x400e0500
+
+    components HplSam3sClockP,
+               new HplSam3PeripheralClockP(AT91C_ID_RTC   ,PMC_PC_BASE ) as RTC, 
+               new HplSam3PeripheralClockP(AT91C_ID_RTT   ,PMC_PC_BASE ) as RTT, 
+               new HplSam3PeripheralClockP(AT91C_ID_WDG   ,PMC_PC_BASE ) as WDG, 
+               new HplSam3PeripheralClockP(AT91C_ID_PMC   ,PMC_PC_BASE ) as PMC, 
+               new HplSam3PeripheralClockP(AT91C_ID_EFC0  ,PMC_PC_BASE ) as EFC0, 
+               new HplSam3PeripheralClockP(AT91C_ID_RES0  ,PMC_PC_BASE ) as RES0, 
+               new HplSam3PeripheralClockP(AT91C_ID_UART0 ,PMC_PC_BASE ) as UART0, 
+               new HplSam3PeripheralClockP(AT91C_ID_UART1 ,PMC_PC_BASE ) as UART1, 
+               new HplSam3PeripheralClockP(AT91C_ID_SMC   ,PMC_PC_BASE ) as SMC, 
+               new HplSam3PeripheralClockP(AT91C_ID_PIOA  ,PMC_PC_BASE ) as PIOA, 
+               new HplSam3PeripheralClockP(AT91C_ID_PIOB  ,PMC_PC_BASE ) as PIOB, 
+               new HplSam3PeripheralClockP(AT91C_ID_PIOC  ,PMC_PC_BASE ) as PIOC, 
+               new HplSam3PeripheralClockP(AT91C_ID_USART0,PMC_PC_BASE ) as USART0, 
+               new HplSam3PeripheralClockP(AT91C_ID_USART1,PMC_PC_BASE ) as USART1, 
+               new HplSam3PeripheralClockP(AT91C_ID_RES1  ,PMC_PC_BASE ) as RES1, 
+               new HplSam3PeripheralClockP(AT91C_ID_RES2  ,PMC_PC_BASE ) as RES2, 
+               new HplSam3PeripheralClockP(AT91C_ID_HSMCI ,PMC_PC_BASE ) as HSMCI, 
+               new HplSam3PeripheralClockP(AT91C_ID_TWI0  ,PMC_PC_BASE ) as TWI0, 
+               new HplSam3PeripheralClockP(AT91C_ID_TWI1  ,PMC_PC_BASE ) as TWI1, 
+               new HplSam3PeripheralClockP(AT91C_ID_SPI   ,PMC_PC_BASE ) as SPI, 
+               new HplSam3PeripheralClockP(AT91C_ID_SSC   ,PMC_PC_BASE ) as SSC, 
+               new HplSam3PeripheralClockP(AT91C_ID_TC0   ,PMC_PC_BASE ) as TC0, 
+               new HplSam3PeripheralClockP(AT91C_ID_TC1   ,PMC_PC_BASE ) as TC1, 
+               new HplSam3PeripheralClockP(AT91C_ID_TC2   ,PMC_PC_BASE ) as TC2, 
+               new HplSam3PeripheralClockP(AT91C_ID_TC3   ,PMC_PC_BASE ) as TC3, 
+               new HplSam3PeripheralClockP(AT91C_ID_TC4   ,PMC_PC_BASE ) as TC4, 
+               new HplSam3PeripheralClockP(AT91C_ID_TC5   ,PMC_PC_BASE ) as TC5, 
+               new HplSam3PeripheralClockP(AT91C_ID_ADC   ,PMC_PC_BASE ) as ADC, 
+               new HplSam3PeripheralClockP(AT91C_ID_DACC  ,PMC_PC_BASE ) as DACC, 
+               new HplSam3PeripheralClockP(AT91C_ID_PWM   ,PMC_PC_BASE ) as PWM, 
+               new HplSam3PeripheralClockP(AT91C_ID_CRCCU ,PMC_PC1_BASE) as CRCCU, 
+               new HplSam3PeripheralClockP(AT91C_ID_ACC   ,PMC_PC1_BASE) as ACC, 
+               new HplSam3PeripheralClockP(AT91C_ID_UDP   ,PMC_PC1_BASE) as UDP; 
+
+    HplSam3Clock = HplSam3sClockP;
+
+    RTCCntl    = RTC.Cntl;
+    RTTCntl    = RTT.Cntl;
+    WDGCntl    = WDG.Cntl;
+    PMCCntl    = PMC.Cntl;
+    EFC0Cntl   = EFC0.Cntl;
+    RES0Cntl   = RES0.Cntl;
+    UART0Cntl  = UART0.Cntl;
+    UART1Cntl  = UART1.Cntl;
+    SMCCntl    = SMC.Cntl;
+    PIOACntl   = PIOA.Cntl;
+    PIOBCntl   = PIOB.Cntl;
+    PIOCCntl   = PIOC.Cntl;
+    USART0Cntl = USART0.Cntl;
+    USART1Cntl = USART1.Cntl;
+    RES1Cntl   = RES1.Cntl;
+    RES2Cntl   = RES2.Cntl;
+    HSMCICntl  = HSMCI.Cntl;
+    TWI0Cntl   = TWI0.Cntl;
+    TWI1Cntl   = TWI1.Cntl;
+    SPICntl    = SPI.Cntl;
+    SSCCntl    = SSC.Cntl;
+    TC0Cntl    = TC0.Cntl;
+    TC1Cntl    = TC1.Cntl;
+    TC2Cntl    = TC2.Cntl;
+    TC3Cntl    = TC3.Cntl;
+    TC4Cntl    = TC4.Cntl;
+    TC5Cntl    = TC5.Cntl;
+    ADCCntl    = ADC.Cntl;
+    DACCCntl   = DACC.Cntl;
+    PWMCntl    = PWM.Cntl;
+    CRCCUCntl  = CRCCU.Cntl;
+    ACCCntl    = ACC.Cntl;
+    UDPCntl    = UDP.Cntl;
+
+    components McuSleepC;
+    McuSleepC.HplSam3Clock -> HplSam3sClockP;
+}
diff --git a/tos/chips/cortex/m3/sam3/s/pmc/HplSam3sClockP.nc b/tos/chips/cortex/m3/sam3/s/pmc/HplSam3sClockP.nc
new file mode 100644
index 00000000..b1026a93
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/pmc/HplSam3sClockP.nc
@@ -0,0 +1,422 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is a low-level clock component controlling the different clock
+ * systems.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "sam3spmchardware.h"
+#include "sam3ssupchardware.h"
+
+#define CLOCK_TIMEOUT 0xFFFFFFFF
+
+module HplSam3sClockP
+{
+    provides
+    {
+        interface HplSam3Clock;
+    }
+}
+
+implementation
+{
+
+    async command error_t HplSam3Clock.slckExternalOsc()
+    {
+        uint32_t timeout = 0;
+
+        if(SUPC->sr.bits.oscsel == 0)
+        {
+            supc_cr_t cr;
+            cr.flat = 0; // assure it is all zero!
+            cr.bits.xtalsel = 1;
+            cr.bits.key = SUPC_CR_KEY;
+
+            SUPC->cr = cr;
+
+            timeout = 0;
+            while (!(SUPC->sr.bits.oscsel) && (timeout++ < CLOCK_TIMEOUT));
+        }
+
+        return SUCCESS;
+    }
+
+    async command error_t HplSam3Clock.slckRCOsc()
+    {
+        uint32_t timeout = 0;
+
+        if(SUPC->sr.bits.oscsel == 1)
+        {
+            supc_cr_t cr;
+            cr.flat = 0; // assure it is all zero!
+            cr.bits.xtalsel = 0;
+            cr.bits.key = SUPC_CR_KEY;
+
+            SUPC->cr = cr;
+
+            timeout = 0;
+            while (!(SUPC->sr.bits.oscsel) && (timeout++ < CLOCK_TIMEOUT));
+        }
+
+       return SUCCESS;
+    }
+
+    async command error_t HplSam3Clock.mckInit48()
+    {
+        pmc_mor_t mor;
+        pmc_mckr_t mckr;
+        pmc_pllar_t pllar;
+        uint32_t timeout = 0;
+
+       // Check if MCK source is RC or XT
+        if(PMC->mor.bits.moscsel == 0)
+        {
+            // it is RC, turn on XT
+            mor.flat = 0; // make sure it is zreoed out
+            mor.bits.key = PMC_MOR_KEY;
+            mor.bits.moscxtst = 0x3F; // main oscillator startup time
+            mor.bits.moscrcen = 1;    // enable the on-chip rc oscillator
+            mor.bits.moscxten = 1;    // main crystal oscillator enable
+            PMC->mor = mor;
+
+            timeout = 0;
+            while (!(PMC->sr.bits.moscxts) && (timeout++ < CLOCK_TIMEOUT));
+        }
+
+        // Switch to XT
+        mor.flat = 0; // make sure it is zeroed
+        mor.bits.key = PMC_MOR_KEY;
+        mor.bits.moscxtst = 0x3F;
+        mor.bits.moscrcen = 1;
+        mor.bits.moscxten = 1;
+        mor.bits.moscsel = 1;
+        PMC->mor = mor;
+        timeout = 0;
+        while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT));
+        mckr = PMC->mckr;
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        // Initialize PLLA
+        pllar.flat = 0; // make sure it is zeroed out
+        pllar.bits.bit29 = 1; // we always have to do this!
+        pllar.bits.mula = 0x3; // multiplication is MULA+1 => 12x4 = 48MHz
+        pllar.bits.pllacount = 0x3F;
+        pllar.bits.diva = 0x1; // divider is bypassed
+        PMC->pllar = pllar;
+        timeout = 0;
+        while (!(PMC->sr.bits.locka) && (timeout++ < CLOCK_TIMEOUT));
+
+        // Switch to fast clock
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        mckr.bits.pres = PMC_MCKR_PRES_DIV_1;
+        mckr.bits.css = PMC_MCKR_CSS_PLLA_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        signal HplSam3Clock.mainClockChanged();
+
+        return SUCCESS;
+    }
+
+    async command error_t HplSam3Clock.mckInit84()
+    {
+        pmc_mor_t mor;
+        pmc_mckr_t mckr;
+        pmc_pllar_t pllar;
+        uint32_t timeout = 0;
+
+       // Check if MCK source is RC or XT
+        if(PMC->mor.bits.moscsel == 0)
+        {
+            // it is RC, turn on XT
+            mor.flat = 0; // make sure it is zreoed out
+            mor.bits.key = PMC_MOR_KEY;
+            mor.bits.moscxtst = 0x3F; // main oscillator startup time
+            mor.bits.moscrcen = 1;    // enable the on-chip rc oscillator
+            mor.bits.moscxten = 1;    // main crystal oscillator enable
+            PMC->mor = mor;
+
+            timeout = 0;
+            while (!(PMC->sr.bits.moscxts) && (timeout++ < CLOCK_TIMEOUT));
+        }
+
+        // Switch to XT
+        mor.flat = 0; // make sure it is zeroed
+        mor.bits.key = PMC_MOR_KEY;
+        mor.bits.moscxtst = 0x3F;
+        mor.bits.moscrcen = 1;
+        mor.bits.moscxten = 1;
+        mor.bits.moscsel = 1;
+        PMC->mor = mor;
+        timeout = 0;
+        while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT));
+        mckr = PMC->mckr;
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        // Initialize PLLA
+        pllar.flat = 0; // make sure it is zeroed out
+        pllar.bits.bit29 = 1; // we always have to do this!
+        pllar.bits.mula = 0x6; // multiplication is MULA+1 => 12x7 = 84MHz
+        pllar.bits.pllacount = 0x3F;
+        pllar.bits.diva = 0x1; // divider is bypassed
+        PMC->pllar = pllar;
+        timeout = 0;
+        while (!(PMC->sr.bits.locka) && (timeout++ < CLOCK_TIMEOUT));
+
+        // Switch to fast clock
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        mckr.bits.pres = PMC_MCKR_PRES_DIV_1;
+        mckr.bits.css = PMC_MCKR_CSS_PLLA_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        signal HplSam3Clock.mainClockChanged();
+        return SUCCESS;
+    }
+
+    async command error_t HplSam3Clock.mckInit96()
+    {
+        pmc_mor_t mor;
+        pmc_mckr_t mckr;
+        pmc_pllar_t pllar;
+        uint32_t timeout = 0;
+
+       // Check if MCK source is RC or XT
+        if(PMC->mor.bits.moscsel == 0)
+        {
+            // it is RC, turn on XT
+            mor.flat = 0; // make sure it is zreoed out
+            mor.bits.key = PMC_MOR_KEY;
+            mor.bits.moscxtst = 0x3F; // main oscillator startup time
+            mor.bits.moscrcen = 1;    // enable the on-chip rc oscillator
+            mor.bits.moscxten = 1;    // main crystal oscillator enable
+            PMC->mor = mor;
+
+            timeout = 0;
+            while (!(PMC->sr.bits.moscxts) && (timeout++ < CLOCK_TIMEOUT));
+        }
+
+        // Switch to XT
+        mor.flat = 0; // make sure it is zeroed
+        mor.bits.key = PMC_MOR_KEY;
+        mor.bits.moscxtst = 0x3F;
+        mor.bits.moscrcen = 1;
+        mor.bits.moscxten = 1;
+        mor.bits.moscsel = 1;
+        PMC->mor = mor;
+        timeout = 0;
+        while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT));
+        mckr = PMC->mckr;
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        // Initialize PLLA
+        pllar.flat = 0; // make sure it is zeroed out
+        pllar.bits.bit29 = 1; // we always have to do this!
+        pllar.bits.mula = 0x7; // multiplication is MULA+1 => 12x8 = 96MHz
+        pllar.bits.pllacount = 0x3F;
+        pllar.bits.diva = 0x1; // divider is bypassed
+        PMC->pllar = pllar;
+        timeout = 0;
+        while (!(PMC->sr.bits.locka) && (timeout++ < CLOCK_TIMEOUT));
+
+        // Switch to fast clock
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        mckr.bits.pres = PMC_MCKR_PRES_DIV_1;
+        mckr.bits.css = PMC_MCKR_CSS_PLLA_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        signal HplSam3Clock.mainClockChanged();
+        return SUCCESS;
+    }
+
+
+    async command error_t HplSam3Clock.mckInit4RC(){
+      pmc_mor_t mor;
+      pmc_mckr_t mckr;
+      pmc_pllar_t pllar;
+      uint32_t timeout = 0;
+
+      // Check if MCK source is RC or XT
+      if(PMC->mor.bits.moscsel == 1){
+	// it is XT, turn on RC
+	mor.flat = 0; // make sure it is zreoed out
+	mor.bits.key = PMC_MOR_KEY;
+	mor.bits.moscrcf = 0;     // select 4 MHz RC 
+	mor.bits.moscrcen = 1;    // enable the on-chip rc oscillator
+	mor.bits.moscxten = 1;    // main crystal oscillator enable
+	PMC->mor = mor;
+	timeout = 0;
+	while (!(PMC->sr.bits.moscrcs) && (timeout++ < 0xFFFFFFFF));
+      }
+
+      // Switch to RC
+      mor.flat = 0; // make sure it is zeroed
+      mor.bits.key = PMC_MOR_KEY;
+      mor.bits.moscrcf = 0;     // select 4 MHz RC 
+      mor.bits.moscrcen = 1;
+      mor.bits.moscxten = 1;
+      mor.bits.moscsel = 0;
+      PMC->mor = mor;
+      timeout = 0;
+      while (!(PMC->sr.bits.moscsels) && (timeout++ < 0xFFFFFFFF));
+      mckr = PMC->mckr;
+      mckr.bits.pres = PMC_MCKR_PRES_DIV_1;
+      mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+      PMC->mckr = mckr;
+      timeout = 0;
+      while (!(PMC->sr.bits.mckrdy) && (timeout++ < 0xFFFFFFFF));
+
+      // turn off external clock
+      mor.bits.moscxten = 0;
+      PMC->mor = mor;
+
+      // Turn off PLL
+      pllar.flat = 0; // make sure it is zeroed out
+      pllar.bits.bit29 = 1; // this always has to be written as 1!
+      PMC->pllar = pllar;
+
+      signal HplSam3Clock.mainClockChanged();
+      return SUCCESS;
+
+    }
+
+
+    async command error_t HplSam3Clock.mckInit12RC()
+    {
+        pmc_mor_t mor;
+        pmc_mckr_t mckr;
+        pmc_pllar_t pllar;
+        uint32_t timeout = 0;
+
+        // Check if MCK source is RC or XT
+        if(PMC->mor.bits.moscsel == 1)
+        {
+            // it is XT, turn on RC
+            mor.flat = 0; // make sure it is zreoed out
+            mor.bits.key = PMC_MOR_KEY;
+            mor.bits.moscrcf = 3;     // select 12 MHz RC 
+            mor.bits.moscrcen = 1;    // enable the on-chip rc oscillator
+            mor.bits.moscxten = 1;    // main crystal oscillator enable
+            PMC->mor = mor;
+
+            timeout = 0;
+            while (!(PMC->sr.bits.moscrcs) && (timeout++ < CLOCK_TIMEOUT));
+        }
+
+        // Switch to RC
+        mor.flat = 0; // make sure it is zeroed
+        mor.bits.key = PMC_MOR_KEY;
+        mor.bits.moscrcf = 3;     // select 12 MHz RC 
+        mor.bits.moscrcen = 1;
+        mor.bits.moscxten = 1;
+        mor.bits.moscsel = 0;
+        PMC->mor = mor;
+        timeout = 0;
+        while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT));
+        mckr = PMC->mckr;
+        mckr.bits.pres = PMC_MCKR_PRES_DIV_1;
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        // turn off external clock
+        mor.bits.moscxten = 0;
+        PMC->mor = mor;
+        
+        // Turn off PLL
+        pllar.flat = 0; // make sure it is zeroed out
+        pllar.bits.bit29 = 1; // this always has to be written as 1!
+        PMC->pllar = pllar;
+
+        signal HplSam3Clock.mainClockChanged();
+        return SUCCESS;
+    }
+
+    async command uint32_t HplSam3Clock.getMainClockSpeed()
+    {
+        uint32_t speed = 0;
+        switch(PMC->mckr.bits.css)
+        {
+            case PMC_MCKR_CSS_SLOW_CLOCK:
+                speed = 32;
+                break;
+
+            case PMC_MCKR_CSS_MAIN_CLOCK:
+                speed = PMC->mcfr.bits.mainf*2048/1000; // 0.48828 corresponds to 16 clock ticks of a 32kHz crystal.
+                break;
+
+            case PMC_MCKR_CSS_PLLA_CLOCK:
+                if(PMC->pllar.bits.diva != 0)
+                {
+                    // note, the PLL multiplier is (mula + 1)
+                    speed = PMC->mcfr.bits.mainf*2048/1000 * (PMC->pllar.bits.mula + 1) / PMC->pllar.bits.diva;
+                    //speed = PMC->mcfr.bits.mainf*1000/488 * (PMC->pllar.bits.mula + 1) / PMC->pllar.bits.diva;
+                } else
+                    speed = 0;
+                break;
+            default:
+                speed = 0;
+        }
+
+        return speed;
+    }
+
+    default async event void HplSam3Clock.mainClockChanged(){}
+}
diff --git a/tos/chips/cortex/m3/sam3/s/pmc/sam3spmchardware.h b/tos/chips/cortex/m3/sam3/s/pmc/sam3spmchardware.h
new file mode 100644
index 00000000..09c88087
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/pmc/sam3spmchardware.h
@@ -0,0 +1,290 @@
+/*
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Sam3s specific PMC registers
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3SPMCHARDWARE_H
+#define SAM3SPMCHARDWARE_H
+
+#include "pmchardware.h"
+
+/**
+ * PMC Peripheral Clock Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3S Series,
+ * 0: no effect
+ * 1: enable corresponding peripheral clock
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t b0     : 1; 
+        uint8_t b1     : 1; 
+        uint8_t b2     : 1; 
+        uint8_t b3     : 1; 
+        uint8_t b4     : 1; 
+        uint8_t b5     : 1; 
+        uint8_t b6     : 1; 
+        uint8_t b7     : 1; 
+        uint8_t b8     : 1; 
+        uint8_t b9     : 1;
+        uint8_t b10    : 1;
+        uint8_t b11    : 1;
+        uint8_t b12    : 1;
+        uint8_t b13    : 1;
+        uint8_t b14    : 1;
+        uint8_t b15    : 1;
+        uint8_t b16    : 1;
+        uint8_t b17    : 1;
+        uint8_t b18    : 1;
+        uint8_t b19    : 1;
+        uint8_t b20    : 1;
+        uint8_t b21    : 1;
+        uint8_t b22    : 1;
+        uint8_t b23    : 1;
+        uint8_t b24    : 1;
+        uint8_t b25    : 1;
+        uint8_t b26    : 1;
+        uint8_t b27    : 1;
+        uint8_t b28    : 1;
+        uint8_t b29    : 1;
+        uint8_t b30    : 1; 
+        uint8_t b31    : 1; 
+    } __attribute__((__packed__)) bits;
+} pmc_pcer_t;
+
+/**
+ * PMC Peripheral Clock Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 486
+ * 0: no effect
+ * 1: disable corresponding peripheral clock
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t b0     : 1; 
+        uint8_t b1     : 1; 
+        uint8_t b2     : 1; 
+        uint8_t b3     : 1; 
+        uint8_t b4     : 1; 
+        uint8_t b5     : 1; 
+        uint8_t b6     : 1; 
+        uint8_t b7     : 1; 
+        uint8_t b8     : 1; 
+        uint8_t b9     : 1;
+        uint8_t b10    : 1;
+        uint8_t b11    : 1;
+        uint8_t b12    : 1;
+        uint8_t b13    : 1;
+        uint8_t b14    : 1;
+        uint8_t b15    : 1;
+        uint8_t b16    : 1;
+        uint8_t b17    : 1;
+        uint8_t b18    : 1;
+        uint8_t b19    : 1;
+        uint8_t b20    : 1;
+        uint8_t b21    : 1;
+        uint8_t b22    : 1;
+        uint8_t b23    : 1;
+        uint8_t b24    : 1;
+        uint8_t b25    : 1;
+        uint8_t b26    : 1;
+        uint8_t b27    : 1;
+        uint8_t b28    : 1;
+        uint8_t b29    : 1;
+        uint8_t b30    : 1; 
+        uint8_t b31    : 1; 
+    } __attribute__((__packed__)) bits;
+} pmc_pcdr_t;
+
+/**
+ * PMC Peripheral Clock Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 487
+ * 0: peripheral clock disabled
+ * 1: peripheral clock enabled
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t b0     : 1; 
+        uint8_t b1     : 1; 
+        uint8_t b2     : 1; 
+        uint8_t b3     : 1; 
+        uint8_t b4     : 1; 
+        uint8_t b5     : 1; 
+        uint8_t b6     : 1; 
+        uint8_t b7     : 1; 
+        uint8_t b8     : 1; 
+        uint8_t b9     : 1;
+        uint8_t b10    : 1;
+        uint8_t b11    : 1;
+        uint8_t b12    : 1;
+        uint8_t b13    : 1;
+        uint8_t b14    : 1;
+        uint8_t b15    : 1;
+        uint8_t b16    : 1;
+        uint8_t b17    : 1;
+        uint8_t b18    : 1;
+        uint8_t b19    : 1;
+        uint8_t b20    : 1;
+        uint8_t b21    : 1;
+        uint8_t b22    : 1;
+        uint8_t b23    : 1;
+        uint8_t b24    : 1;
+        uint8_t b25    : 1;
+        uint8_t b26    : 1;
+        uint8_t b27    : 1;
+        uint8_t b28    : 1;
+        uint8_t b29    : 1;
+        uint8_t b30    : 1; 
+        uint8_t b31    : 1; 
+    } __attribute__((__packed__)) bits;
+} pmc_pcsr_t;
+
+typedef struct
+{
+    volatile pmc_pcer_t pcer; // Peripheral Clock Enable Register
+    volatile pmc_pcdr_t pcdr; // Peripheral Clock Disable Register
+    volatile pmc_pcsr_t pcsr; // Peripheral Clock Status Register
+} pmc_pc_t;
+
+/**
+ * PMC Clock Generator PLLA Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 491
+ * Note: bit 29 must always be set to 1 when writing this register! 
+ */ 
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t divb       :  8; // divider
+        uint8_t pllbcount  :  6; // pllb counter, specifies the number of slow clock cycles times 8
+        uint8_t stmode     :  2; // start mode
+        uint16_t mulb      : 11; // PLLB Multiplier
+        uint8_t reserved0  :  5;
+    } __attribute__((__packed__)) bits;
+} pmc_pllbr_t;
+
+#define PMC_PLLBR_STMODE_FAST_STARTUP 0
+#define PMC_PLLBR_STMODE_NORMAL_STARTUP 2
+
+/**
+ * PMC USB Clock Register
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t usbs      :  1; // USB Input Clock Selection
+        uint32_t reserved0 :  7;
+        uint32_t usbdiv    :  4; // Divider for USB Clock
+        uint32_t reserved1 : 20;
+    } __attribute__((__packed__)) bits;
+} pmc_usb_t;
+
+/**
+ * PMC Oscillator Calibration Register.
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t cal4       : 7; // RC Oscillator Calibration bits for 4MHz
+        uint32_t sel4       : 1; // Selection of RC Oscillator Calibration bits for 4 MHz
+        uint32_t cal8       : 7; // RC Oscillator Calibration bits for 8MHz
+        uint32_t sel8       : 1; // Selection of RC Oscillator Calibration bits for 8 MHz
+        uint32_t cal12      : 7; // RC Oscillator Calibration bits for 12MHz
+        uint32_t sel12      : 1; // Selection of RC Oscillator Calibration bits for 12 MHz
+        uint32_t reserved0  : 8;
+    } __attribute__((__packed__)) bits;
+} pmc_ocr_t;
+
+
+/**
+ * PMC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary, p. 481
+ */
+typedef struct pmc
+{
+    volatile pmc_scer_t   scer;  // System Clock Enable Register
+    volatile pmc_scdr_t   scdr;  // System Clock Disable Register
+    volatile pmc_scsr_t   scsr;  // System Clock Status Register
+    uint32_t reserved0;
+    volatile pmc_pc_t     pc;    // Peripheral Clock Control Registers 0
+    uint32_t reserved1;
+    volatile pmc_mor_t    mor;   // Main Oscillator Register
+    volatile pmc_mcfr_t   mcfr;  // Main Clock Frequency Register
+    volatile pmc_pllar_t  pllar; // PLLA Register
+    volatile pmc_pllbr_t  pllbr; // PLLB Register
+    volatile pmc_mckr_t   mckr;  // Master Clock Register
+    uint32_t reserved2;
+    volatile pmc_usb_t    usb;   // USB Clock Register
+    uint32_t reserved3;
+    volatile pmc_pck_t   pck0;  // Programmable Clock 0 Register
+    volatile pmc_pck_t   pck1;  // Programmable Clock 1 Register
+    volatile pmc_pck_t   pck2;  // Programmable Clock 2 Register
+    uint32_t reserved4[5];
+    volatile pmc_ier_t    ier;   // Interrupt Enable Register
+    volatile pmc_idr_t    idr;   // Interrupt Disable Register
+    volatile pmc_sr_t     sr;    // Status Register
+    volatile pmc_imr_t    imr;   // Interrupt Mask Register
+    volatile pmc_fsmr_t   fsmr;  // Fast Startup Mode Register
+    volatile pmc_fspr_t   fspr;  // Fast Startup Polarity Register
+    volatile pmc_focr_t   focr;  // Fault Output Clear Register
+    uint32_t reserved5[26];
+    volatile pmc_wpmr_t   wpmr;  // Write Protect Mode Register
+    volatile pmc_wpsr_t   wpsr;  // Write Protect Status Register
+    uint32_t reserved6[5];
+    volatile pmc_pc_t     pc1;   // Peripheral Clock Control Registers 1
+    uint32_t reserved7;
+    volatile pmc_ocr_t    ocr;   // Oscillator Calibration Register
+} pmc_t;
+
+/**
+ * Memory mapping for the PMC
+ */
+volatile pmc_t* PMC = (volatile pmc_t *) 0x400E0400; // PMC Base Address
+
+#endif //SAM3UPMCHARDWARE_H
+
+
diff --git a/tos/chips/cortex/m3/sam3/s/sam3shardware.h b/tos/chips/cortex/m3/sam3/s/sam3shardware.h
new file mode 100644
index 00000000..87268bef
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/sam3shardware.h
@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2010 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Definitions specific to the SAM3S MCU.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3S_HARDWARE_H
+#define SAM3S_HARDWARE_H
+
+#include <cortexm3hardware.h>
+
+// The Sam3s has more I/O Muxing than the Sam3u.
+#define CHIP_SAM3_HAS_PERIPHERAL_CD 1
+
+// Peripheral ID definitions for the SAM3S
+//  Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3S Series, Preliminary, p. 34
+#define AT91C_ID_SUPC   ( 0) // SUPPLY CONTROLLER
+#define AT91C_ID_RSTC   ( 1) // RESET CONTROLLER
+#define AT91C_ID_RTC    ( 2) // REAL TIME CLOCK
+#define AT91C_ID_RTT    ( 3) // REAL TIME TIMER
+#define AT91C_ID_WDG    ( 4) // WATCHDOG TIMER
+#define AT91C_ID_PMC    ( 5) // PMC
+#define AT91C_ID_EFC0   ( 6) // EFC
+#define AT91C_ID_RES0   ( 7) // Reserved
+#define AT91C_ID_UART0  ( 8) // UART0
+#define AT91C_ID_UART1  ( 9) // UART1
+#define AT91C_ID_SMC    (10) // SMC
+#define AT91C_ID_PIOA   (11) // PARALLEL I/O CONTROLLER A
+#define AT91C_ID_PIOB   (12) // PARALLEL I/O CONTROLLER B
+#define AT91C_ID_PIOC   (13) // PARALLEL I/O CONTROLLER C
+#define AT91C_ID_USART0 (14) // USART0
+#define AT91C_ID_USART1 (15) // USART1
+#define AT91C_ID_RES1   (16) // Reserved
+#define AT91C_ID_RES2   (17) // Reserved
+#define AT91C_ID_HSMCI  (18) // HIGH SPEED MULTIMEDIA CARD INTERFACE
+#define AT91C_ID_TWI0   (19) // TWO WIRE INTERFACE 0
+#define AT91C_ID_TWI1   (20) // TWO WIRE INTERFACE 1
+#define AT91C_ID_SPI    (21) // SERIAL PERIPHERAL INTERFACE
+#define AT91C_ID_SSC    (22) // SYNCHRONOUS SERIAL CONTROLLER
+#define AT91C_ID_TC0    (23) // TIMER/COUNTER 0
+#define AT91C_ID_TC1    (24) // TIMER/COUNTER 1
+#define AT91C_ID_TC2    (25) // TIMER/COUNTER 2
+#define AT91C_ID_TC3    (26) // TIMER/COUNTER 3
+#define AT91C_ID_TC4    (27) // TIMER/COUNTER 4
+#define AT91C_ID_TC5    (28) // TIMER/COUNTER 5
+#define AT91C_ID_ADC    (29) // ANALOG-TO-DIGITAL CONVERTER
+#define AT91C_ID_DACC   (30) // DIGITAL-TO-ANALOG CONVERTE
+#define AT91C_ID_PWM    (31) // PULSE WIDTH MODULATION
+#define AT91C_ID_CRCCU  (32) // CRC CALCULATION UNIT
+#define AT91C_ID_ACC    (33) // ANALOG COMPARATOR
+#define AT91C_ID_UDP    (34) // USB DEVICE PORT
+
+#define SAM3S_PERIPHERALA (0x400e0e00)
+#define SAM3S_PERIPHERALB (0x400e1000)
+#define SAM3S_PERIPHERALC (0x400e1200)
+
+#define TOSH_ASSIGN_PIN(name, port, bit) \
+static inline void TOSH_SET_##name##_PIN() \
+  {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x030)) = (1 << bit);} \
+static inline void TOSH_CLR_##name##_PIN() \
+  {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x034)) = (1 << bit);} \
+static inline int TOSH_READ_##name##_PIN() \
+  { \
+    /* Read bit from Output Status Register */ \
+    uint32_t currentport = *((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x018)); \
+    uint32_t currentpin = (currentport & (1 << bit)) >> bit; \
+    bool isInput = ((currentpin & 1) == 0); \
+    if (isInput == 1) { \
+            /* Read bit from Pin Data Status Register */ \
+            currentport = *((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x03c)); \
+            currentpin = (currentport & (1 << bit)) >> bit; \
+            return ((currentpin & 1) == 1); \
+    } else { \
+            /* Read bit from Output Data Status Register */ \
+            currentport = *((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x038)); \
+            currentpin = (currentport & (1 << bit)) >> bit; \
+            return ((currentpin & 1) == 1); \
+    } \
+  } \
+static inline void TOSH_MAKE_##name##_OUTPUT() \
+  {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x010)) = (1 << bit);} \
+static inline void TOSH_MAKE_##name##_INPUT() \
+  {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x014)) = (1 << bit);}
+
+#define TOSH_ASSIGN_OUTPUT_ONLY_PIN(name, port, bit) \
+static inline void TOSH_SET_##name##_PIN() \
+  {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x030)) = (1 << bit);} \
+static inline void TOSH_CLR_##name##_PIN() \
+  {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x034)) = (1 << bit);} \
+static inline void TOSH_MAKE_##name##_OUTPUT() \
+  {*((volatile uint32_t *) (SAM3S_PERIPHERAL##port + 0x010)) = (1 << bit);} \
+
+#define TOSH_ALIAS_OUTPUT_ONLY_PIN(alias, connector)\
+static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \
+static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \
+static inline void TOSH_MAKE_##alias##_OUTPUT() {} \
+
+#define TOSH_ALIAS_PIN(alias, connector) \
+static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \
+static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \
+static inline char TOSH_READ_##alias##_PIN() {return TOSH_READ_##connector##_PIN();} \
+static inline void TOSH_MAKE_##alias##_OUTPUT() {TOSH_MAKE_##connector##_OUTPUT();} \
+
+#endif // SAM3S_HARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/s/smc/sam3smchardware.h b/tos/chips/cortex/m3/sam3/s/smc/sam3smchardware.h
new file mode 100644
index 00000000..00c77ec6
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/smc/sam3smchardware.h
@@ -0,0 +1,84 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Static Memory Controller Register Definitions
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef _SAM3SSMCHARDWARE_H
+#define _SAM3SSMCHARDWARE_H
+
+#include "smchardware.h"
+
+/**
+ *  SMC MODE Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3S Series, Preliminary 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t read_mode    : 1; // read mode
+        uint32_t write_mode   : 1; // write mode
+        uint32_t reserved0    : 2;
+        uint32_t exnw_mode    : 2; // nwait mode
+        uint32_t reserved1    : 2;
+        uint32_t reserved2    : 4;
+        uint32_t dbw          : 2; // data bus width
+        uint32_t reserved3    : 2;
+        uint32_t tdf_cycles   : 4; // data float time
+        uint32_t tdf_mode     : 1; // tdf optimization
+        uint32_t reserved4    : 3;
+        uint32_t pmen         : 1; // page mode enable (note, not in documentation, but in code at91lib!)
+        uint32_t reserved5    : 3;
+        uint32_t ps           : 2; // page mode size (note: not in documentation, but in code at91lib!)
+        uint32_t reserved6    : 2;
+    } __attribute__((__packed__)) bits;
+} smc_mode_t;
+
+typedef struct
+{
+    volatile smc_setup_t setup;
+    volatile smc_pulse_t pulse;
+    volatile smc_cycle_t cycle;
+    volatile smc_mode_t mode;
+} smc_cs_t;
+
+volatile smc_cs_t* SMC_CS0 = (volatile smc_cs_t*)0x400E0000; 
+volatile smc_cs_t* SMC_CS1 = (volatile smc_cs_t*)0x400E0010; 
+volatile smc_cs_t* SMC_CS2 = (volatile smc_cs_t*)0x400E0020; 
+volatile smc_cs_t* SMC_CS3 = (volatile smc_cs_t*)0x400E0030; 
+volatile smc_cs_t* SMC_CS4 = (volatile smc_cs_t*)0x400E0040; // questionable...  
+
+#endif //_SAM3USMCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/s/supc/sam3ssupchardware.h b/tos/chips/cortex/m3/sam3/s/supc/sam3ssupchardware.h
new file mode 100644
index 00000000..1bc458ff
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/supc/sam3ssupchardware.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3SSUPCHARDWARE_H
+#define SAM3SSUPCHARDWARE_H
+
+#include "supchardware.h"
+
+/**
+ * Memory mappin gofr the SUPC
+ */
+volatile supc_t* SUPC = (volatile supc_t *) 0x400E1410;
+
+#endif //SAM3SSUPCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/s/timer/HplSam3TCC.nc b/tos/chips/cortex/m3/sam3/s/timer/HplSam3TCC.nc
new file mode 100644
index 00000000..466b704d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/timer/HplSam3TCC.nc
@@ -0,0 +1,194 @@
+/*
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Top level configuration of the timer counter peripheral.
+ *
+ * @author Thomas Schmid
+ */
+
+#include <sam3tchardware.h>
+
+configuration HplSam3TCC
+{
+
+    provides
+    {
+        interface Init;
+
+        interface HplSam3TC as TC0;
+        interface HplSam3TC as TC1;
+
+        interface HplSam3TCChannel as TCH0;
+        interface HplSam3TCChannel as TCH1;
+        interface HplSam3TCChannel as TCH2;
+        interface HplSam3TCChannel as TCH3;
+        interface HplSam3TCChannel as TCH4;
+        interface HplSam3TCChannel as TCH5;
+
+        interface HplSam3TCCapture as TC0Capture;
+        interface HplSam3TCCompare as TC0CompareA;
+        interface HplSam3TCCompare as TC0CompareB;
+        interface HplSam3TCCompare as TC0CompareC;
+
+        interface HplSam3TCCapture as TC1Capture;
+        interface HplSam3TCCompare as TC1CompareA;
+        interface HplSam3TCCompare as TC1CompareB;
+        interface HplSam3TCCompare as TC1CompareC;
+        
+        interface HplSam3TCCapture as TC2Capture;
+        interface HplSam3TCCompare as TC2CompareA;
+        interface HplSam3TCCompare as TC2CompareB;
+        interface HplSam3TCCompare as TC2CompareC;
+        
+        interface HplSam3TCCapture as TC3Capture;
+        interface HplSam3TCCompare as TC3CompareA;
+        interface HplSam3TCCompare as TC3CompareB;
+        interface HplSam3TCCompare as TC3CompareC;
+        
+        interface HplSam3TCCapture as TC4Capture;
+        interface HplSam3TCCompare as TC4CompareA;
+        interface HplSam3TCCompare as TC4CompareB;
+        interface HplSam3TCCompare as TC4CompareC;
+        
+        interface HplSam3TCCapture as TC5Capture;
+        interface HplSam3TCCompare as TC5CompareA;
+        interface HplSam3TCCompare as TC5CompareB;
+        interface HplSam3TCCompare as TC5CompareC;
+    }
+}
+
+implementation
+{
+    components HplNVICC,
+               HplSam3TCEventP,
+               HplSam3sClockC,
+               new HplSam3TCChannelP( TC_CH0_BASE )  as TCCH0,
+               new HplSam3TCChannelP( TC_CH1_BASE )  as TCCH1,
+               new HplSam3TCChannelP( TC_CH2_BASE )  as TCCH2,
+               new HplSam3TCChannelP( TC1_CH0_BASE ) as TCCH3,
+               new HplSam3TCChannelP( TC1_CH1_BASE ) as TCCH4,
+               new HplSam3TCChannelP( TC1_CH2_BASE ) as TCCH5;
+
+    components McuSleepC;
+    HplSam3TCEventP.TC0InterruptWrapper -> McuSleepC;
+    HplSam3TCEventP.TC1InterruptWrapper -> McuSleepC;
+    HplSam3TCEventP.TC2InterruptWrapper -> McuSleepC;
+    HplSam3TCEventP.TC3InterruptWrapper -> McuSleepC;
+    HplSam3TCEventP.TC4InterruptWrapper -> McuSleepC;
+    HplSam3TCEventP.TC5InterruptWrapper -> McuSleepC;
+
+    TCH0 = TCCH0;
+    TCH1 = TCCH1;
+    TCH2 = TCCH2;
+    TCH3 = TCCH3;
+    TCH4 = TCCH4;
+    TCH5 = TCCH5;
+
+    TCCH0.NVICTCInterrupt -> HplNVICC.TC0Interrupt;
+    TCCH0.TimerEvent -> HplSam3TCEventP.TC0Event;
+    TCCH0.TCPClockCntl -> HplSam3sClockC.TC0Cntl;
+    TCCH0.ClockConfig -> HplSam3sClockC;
+
+    TCCH1.NVICTCInterrupt -> HplNVICC.TC1Interrupt;
+    TCCH1.TimerEvent -> HplSam3TCEventP.TC1Event;
+    TCCH1.TCPClockCntl -> HplSam3sClockC.TC1Cntl;
+    TCCH1.ClockConfig -> HplSam3sClockC;
+
+    TCCH2.NVICTCInterrupt -> HplNVICC.TC2Interrupt;
+    TCCH2.TimerEvent -> HplSam3TCEventP.TC2Event;
+    TCCH2.TCPClockCntl -> HplSam3sClockC.TC2Cntl;
+    TCCH2.ClockConfig -> HplSam3sClockC;
+
+    TCCH3.NVICTCInterrupt -> HplNVICC.TC3Interrupt;
+    TCCH3.TimerEvent -> HplSam3TCEventP.TC3Event;
+    TCCH3.TCPClockCntl -> HplSam3sClockC.TC3Cntl;
+    TCCH3.ClockConfig -> HplSam3sClockC;
+
+    TCCH4.NVICTCInterrupt -> HplNVICC.TC4Interrupt;
+    TCCH4.TimerEvent -> HplSam3TCEventP.TC4Event;
+    TCCH4.TCPClockCntl -> HplSam3sClockC.TC4Cntl;
+    TCCH4.ClockConfig -> HplSam3sClockC;
+
+    TCCH5.NVICTCInterrupt -> HplNVICC.TC5Interrupt;
+    TCCH5.TimerEvent -> HplSam3TCEventP.TC5Event;
+    TCCH5.TCPClockCntl -> HplSam3sClockC.TC5Cntl;
+    TCCH5.ClockConfig -> HplSam3sClockC;
+
+    TC0Capture = TCCH0.Capture; 
+    TC0CompareA = TCCH0.CompareA;
+    TC0CompareB = TCCH0.CompareB;
+    TC0CompareC = TCCH0.CompareC;
+
+    TC1Capture = TCCH1.Capture; 
+    TC1CompareA = TCCH1.CompareA;
+    TC1CompareB = TCCH1.CompareB;
+    TC1CompareC = TCCH1.CompareC;
+
+    TC2Capture = TCCH2.Capture; 
+    TC2CompareA = TCCH2.CompareA;
+    TC2CompareB = TCCH2.CompareB;
+    TC2CompareC = TCCH2.CompareC;
+
+    TC3Capture = TCCH3.Capture; 
+    TC3CompareA = TCCH3.CompareA;
+    TC3CompareB = TCCH3.CompareB;
+    TC3CompareC = TCCH3.CompareC;
+
+    TC4Capture = TCCH4.Capture; 
+    TC4CompareA = TCCH4.CompareA;
+    TC4CompareB = TCCH4.CompareB;
+    TC4CompareC = TCCH4.CompareC;
+
+    TC5Capture = TCCH5.Capture; 
+    TC5CompareA = TCCH5.CompareA;
+    TC5CompareB = TCCH5.CompareB;
+    TC5CompareC = TCCH5.CompareC;
+
+    components new HplSam3TCP() as HplTC0;
+    components new HplSam3TCP() as HplTC1;
+    Init = HplTC0;
+    Init = HplTC1;
+
+    HplTC0.ClockConfig -> HplSam3sClockC;
+    HplTC1.ClockConfig -> HplSam3sClockC;
+
+    HplTC0.TC0 -> TCCH0;
+    HplTC0.TC1 -> TCCH1;
+    HplTC0.TC2 -> TCCH2;
+
+    HplTC1.TC0 -> TCCH3;
+    HplTC1.TC1 -> TCCH4;
+    HplTC1.TC2 -> TCCH5;
+
+    HplTC0 = TC0;
+    HplTC1 = TC1;
+}
diff --git a/tos/chips/cortex/m3/sam3/s/timer/HplSam3TCEventP.nc b/tos/chips/cortex/m3/sam3/s/timer/HplSam3TCEventP.nc
new file mode 100644
index 00000000..964a45e0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/timer/HplSam3TCEventP.nc
@@ -0,0 +1,111 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SAM3U TC Event dispatcher.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "sam3tchardware.h"
+
+module HplSam3TCEventP @safe()
+{
+    provides {
+        interface HplSam3TCEvent as TC0Event;
+        interface HplSam3TCEvent as TC1Event;
+        interface HplSam3TCEvent as TC2Event;
+        interface HplSam3TCEvent as TC3Event;
+        interface HplSam3TCEvent as TC4Event;
+        interface HplSam3TCEvent as TC5Event;
+    }
+    uses {
+      interface FunctionWrapper as TC0InterruptWrapper;
+      interface FunctionWrapper as TC1InterruptWrapper;
+      interface FunctionWrapper as TC2InterruptWrapper;
+      interface FunctionWrapper as TC3InterruptWrapper;
+      interface FunctionWrapper as TC4InterruptWrapper;
+      interface FunctionWrapper as TC5InterruptWrapper;
+    }
+}
+implementation
+{
+
+    void TC0IrqHandler() @C() @spontaneous() 
+    {
+        call TC0InterruptWrapper.preamble();
+        signal TC0Event.fired();
+        call TC0InterruptWrapper.postamble();
+    }
+
+    void TC1IrqHandler() @C() @spontaneous() 
+    {
+        call TC1InterruptWrapper.preamble();
+        signal TC1Event.fired();
+        call TC1InterruptWrapper.postamble();
+    }
+
+    void TC2IrqHandler() @C() @spontaneous() 
+    {
+        call TC2InterruptWrapper.preamble();
+        signal TC2Event.fired();
+        call TC2InterruptWrapper.postamble();
+    }
+
+    void TC3IrqHandler() @C() @spontaneous() 
+    {
+        call TC3InterruptWrapper.preamble();
+        signal TC3Event.fired();
+        call TC3InterruptWrapper.postamble();
+    }
+
+    void TC4IrqHandler() @C() @spontaneous() 
+    {
+        call TC4InterruptWrapper.preamble();
+        signal TC4Event.fired();
+        call TC4InterruptWrapper.postamble();
+    }
+
+    void TC5IrqHandler() @C() @spontaneous() 
+    {
+        call TC5InterruptWrapper.preamble();
+        signal TC5Event.fired();
+        call TC5InterruptWrapper.postamble();
+    }
+
+    default async event void TC0Event.fired() {}
+    default async event void TC1Event.fired() {}
+    default async event void TC2Event.fired() {}
+    default async event void TC3Event.fired() {}
+    default async event void TC4Event.fired() {}
+    default async event void TC5Event.fired() {}
+}
+
diff --git a/tos/chips/cortex/m3/sam3/s/timer/sam3rtthardware.h b/tos/chips/cortex/m3/sam3/s/timer/sam3rtthardware.h
new file mode 100644
index 00000000..0eaac61d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/timer/sam3rtthardware.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Real-Time Timer register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3SRTTHARDWARE_H
+#define SAM3SRTTHARDWARE_H
+
+#include "rtthardware.h"
+
+// Defined in AT91 ARM Coretx-M3 based Microcontrollers, SAM3S Series,
+volatile rtt_t* RTT = (volatile rtt_t*) 0x400E1430;
+
+#endif // SAM3SRTTHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/s/timer/sam3tchardware.h b/tos/chips/cortex/m3/sam3/s/timer/sam3tchardware.h
new file mode 100644
index 00000000..40120938
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/timer/sam3tchardware.h
@@ -0,0 +1,79 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Timer Counter register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3STCHARDWARE_H
+#define SAM3STCHARDWARE_H
+
+#include "tchardware.h"
+
+/**
+ * TC definition capture mode
+ */
+typedef struct
+{
+    volatile tc_channel_capture_t ch0;
+    uint32_t reserved0[4];
+    volatile tc_channel_capture_t ch1;
+    uint32_t reserved1[4];
+    volatile tc_channel_capture_t ch2;
+    uint32_t reserved2[4];
+    volatile tc_bcr_t bcr;
+    volatile tc_bmr_t bmr;
+    volatile tc_qier_t qier;
+    volatile tc_qidr_t qidr;
+    volatile tc_qimr_t qimr;
+    volatile tc_qisr_t qisr;
+} tc_t;
+
+/**
+ * TC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary 9/1/09, p. 827
+ */
+#define TC_BASE      0x40010000
+#define TC1_BASE     0x40014000
+#define TC_CH0_BASE  0x40010000
+#define TC_CH1_BASE  0x40010040
+#define TC_CH2_BASE  0x40010080
+#define TC1_CH0_BASE 0x40014000
+#define TC1_CH1_BASE 0x40014040
+#define TC1_CH2_BASE 0x40014080
+
+volatile tc_t* TC  = (volatile tc_t*)TC_BASE;
+volatile tc_t* TC1 = (volatile tc_t*)TC1_BASE;
+
+#endif //SAM3UTCHARDWARE_H
+
diff --git a/tos/chips/cortex/m3/sam3/s/uart/HilSam3UartC.nc b/tos/chips/cortex/m3/sam3/s/uart/HilSam3UartC.nc
new file mode 100644
index 00000000..3baf77a1
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/uart/HilSam3UartC.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2011 University of Utah. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:  
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+configuration HilSam3UartC
+{
+	provides
+	{
+		interface StdControl;
+		interface UartByte;
+		interface UartStream;
+	}
+}
+implementation
+{
+	components HilSam3UartP;
+	StdControl = HilSam3UartP;
+	UartByte = HilSam3UartP;
+	UartStream = HilSam3UartP;
+
+	components HplSam3UartC;
+	HilSam3UartP.HplSam3UartInterrupts -> HplSam3UartC;
+	HilSam3UartP.HplSam3UartStatus -> HplSam3UartC;
+	HilSam3UartP.HplSam3UartControl -> HplSam3UartC;
+	HilSam3UartP.HplSam3UartConfig -> HplSam3UartC;
+
+#ifdef THREADS
+	components PlatformInterruptC;
+	HplSam3UartC.PlatformInterrupt -> PlatformInterruptC;
+#endif
+
+	components MainC;
+	MainC.SoftwareInit -> HilSam3UartP.Init;
+
+	components HplNVICC;
+	HilSam3UartP.UartIrqControl -> HplNVICC.UART0Interrupt;
+
+	components HplSam3sGeneralIOC;
+	HilSam3UartP.UartPin1 -> HplSam3sGeneralIOC.HplPioA9;
+	HilSam3UartP.UartPin2 -> HplSam3sGeneralIOC.HplPioA10;
+
+	components HplSam3sClockC;
+	HilSam3UartP.UartClockControl -> HplSam3sClockC.UART0Cntl;
+	HilSam3UartP.ClockConfig -> HplSam3sClockC;
+}
diff --git a/tos/chips/cortex/m3/sam3/s/uart/sam3uarthardware.h b/tos/chips/cortex/m3/sam3/s/uart/sam3uarthardware.h
new file mode 100644
index 00000000..cfbdf905
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/uart/sam3uarthardware.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Definitions specific to the SAM3S UART chip.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3SUARTHARDWARE_H
+#define SAM3SUARTHARDWARE_H
+
+#include "uarthardware.h"
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3S Series, Preliminary, p. 663
+volatile uint32_t*    UART_BASE = (volatile uint32_t *)   0x400e0600;
+volatile uart_cr_t*   UART_CR   = (volatile uart_cr_t*)   0x400e0600; // control, wo
+volatile uart_mr_t*   UART_MR   = (volatile uart_mr_t*)   0x400e0604; // mode, rw, reset 0x0
+volatile uart_ier_t*  UART_IER  = (volatile uart_ier_t*)  0x400e0608; // interrupt enable, wo
+volatile uart_idr_t*  UART_IDR  = (volatile uart_idr_t*)  0x400e060c; // interrupt disable, wo
+volatile uart_imr_t*  UART_IMR  = (volatile uart_imr_t*)  0x400e0610; // interrupt mask, ro, reset 0x0
+volatile uart_sr_t*   UART_SR   = (volatile uart_sr_t*)   0x400e0614; // status, ro
+volatile uart_rhr_t*  UART_RHR  = (volatile uart_rhr_t*)  0x400e0618; // receive holding, ro, reset 0x0
+volatile uart_thr_t*  UART_THR  = (volatile uart_thr_t*)  0x400e061c; // transmit holding, wo
+volatile uart_brgr_t* UART_BRGR = (volatile uart_brgr_t*) 0x400e0620; // baud rate generator, rw, reset 0x0
+
+#endif // SAM3SUARTHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/s/wdtc/sam3wdtchardware.h b/tos/chips/cortex/m3/sam3/s/wdtc/sam3wdtchardware.h
new file mode 100644
index 00000000..080df0d0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/s/wdtc/sam3wdtchardware.h
@@ -0,0 +1,50 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Watchdog Timer register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef _SAM3SWDTCHARDWARE_H
+#define _SAM3SWDTCHARDWARE_H
+
+#include "wdtchardware.h"
+
+/**
+ * Memory mapping for the WDTC
+ * Note that it is NOT 0x400e1440 as mentioned in sam3s preliminary from
+ * Aug-10
+ */
+volatile wdtc_t* WDTC = (volatile wdtc_t *) 0x400E1450; // WDTC Base Address
+
+#endif // _SAM3SWDTCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/smc/smchardware.h b/tos/chips/cortex/m3/sam3/smc/smchardware.h
new file mode 100644
index 00000000..6c172545
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/smc/smchardware.h
@@ -0,0 +1,98 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Static Memory Controller Register Definitions
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef _SAM3SMCHARDWARE_H
+#define _SAM3SMCHARDWARE_H
+
+/**
+ *  SMC SETUP Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t nwe_setup     : 6; // NWE Setup length
+        uint32_t reserved0     : 2;
+        uint32_t ncs_wr_setup  : 6; // ncs setup length in write access
+        uint32_t reserved1     : 2;
+        uint32_t nrd_setup     : 6; // nrd setup length
+        uint32_t reserved2     : 2;
+        uint32_t ncs_rd_setup  : 6; // ncs setup length in read access
+        uint32_t reserved3     : 2;
+    } __attribute__((__packed__)) bits;
+} smc_setup_t;
+
+/**
+ *  SMC PULSE Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t nwe_pulse     : 6; // NWE setup length
+        uint32_t reserved0     : 2;
+        uint32_t ncs_wr_pulse  : 6; // ncs setup length in write access
+        uint32_t reserved1     : 2;
+        uint32_t nrd_pulse     : 6; // nrd setup length
+        uint32_t reserved2     : 2;
+        uint32_t ncs_rd_pulse  : 6; // ncs setup length in read access
+        uint32_t reserved3     : 2;
+    } __attribute__((__packed__)) bits;
+} smc_pulse_t;
+
+/**
+ *  SMC CYCLE Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t nwe_cycle    : 9; // total write cycle length
+        uint32_t reserved0    : 7;
+        uint32_t nrd_cycle    : 9; // total read cycle length
+        uint32_t reserved1    : 7;
+    } __attribute__((__packed__)) bits;
+} smc_cycle_t;
+
+
+#endif //_SAM3SMCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/supc/supchardware.h b/tos/chips/cortex/m3/sam3/supc/supchardware.h
new file mode 100644
index 00000000..eba4aa2a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/supc/supchardware.h
@@ -0,0 +1,261 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Supply Controller register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SUPCHARDWARE_H
+#define SUPCHARDWARE_H
+
+/**
+ * SUPC Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 291
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t reserved0  :  2;
+        uint8_t vroff      :  1; // voltage regulator off (1: stop regularot if key correct)
+        uint8_t xtalsel    :  1; // crystal oscillator select (1: select crystal if key correct)
+        uint8_t reserved1  :  4;
+        uint16_t reserved2 : 16;
+        uint8_t key        :  8; // key shoulc be written to value 0xA5
+    } __attribute__((__packed__)) bits;
+} supc_cr_t;
+
+#define SUPC_CR_KEY 0xA5
+
+/**
+ * SUPC Supply Monitor Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 292
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t smth      :  4; // supply monitor threshold
+        uint8_t reserved0 :  4;
+        uint8_t smsmpl    :  3; // supply monitor sampling period
+        uint8_t reserved1 :  1;
+        uint8_t smrsten   :  1; // supply monitor reset enable
+        uint8_t smien     :  1; // supply monitor interrupt enable
+        uint8_t reserved2 :  2;
+        uint16_t reserved3: 16;
+    }  __attribute__((__packed__)) bits;
+} supc_smmr_t;
+
+#define SUPC_SMMR_SMTH_1_9V 0x0
+#define SUPC_SMMR_SMTH_2_0V 0x1
+#define SUPC_SMMR_SMTH_2_1V 0x2
+#define SUPC_SMMR_SMTH_2_2V 0x3
+#define SUPC_SMMR_SMTH_2_3V 0x4
+#define SUPC_SMMR_SMTH_2_4V 0x5
+#define SUPC_SMMR_SMTH_2_5V 0x6
+#define SUPC_SMMR_SMTH_2_6V 0x7
+#define SUPC_SMMR_SMTH_2_7V 0x8
+#define SUPC_SMMR_SMTH_2_8V 0x9
+#define SUPC_SMMR_SMTH_2_9V 0xA
+#define SUPC_SMMR_SMTH_3_0V 0xB
+#define SUPC_SMMR_SMTH_3_1V 0xC
+#define SUPC_SMMR_SMTH_3_2V 0xD
+#define SUPC_SMMR_SMTH_3_3V 0xE
+#define SUPC_SMMR_SMTH_3_4V 0xF
+
+#define SUPC_SMMR_SMSMPL_SMD      0x0
+#define SUPC_SMMR_SMSMPL_CSM      0x1
+#define SUPC_SMMR_SMSMPL_32SLCK   0x2
+#define SUPC_SMMR_SMSMPL_256SLCK  0x3
+#define SUPC_SMMR_SMSMPL_2048SLCK 0x4
+
+/**
+ * SUPC  Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 294
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint16_t reserved0  : 12;
+        uint8_t bodrsten    :  1; // brownout detector reset enable
+        uint8_t boddis      :  1; // brownout detector disable
+        uint8_t vddiordy    :  1; // VDDIO ready
+        uint8_t reserved1   :  1;
+        uint8_t reserved2   :  4;
+        uint8_t oscbypass   :  1; // oscillator bypass
+        uint8_t reserved3   :  3;
+        uint8_t key         :  8; // key should be written to value 0xA5
+    } __attribute__((__packed__)) bits;
+} supc_mr_t;
+
+#define SUPC_MR_KEY 0xA5
+
+/**
+ * SUPC Wake Up Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 295
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t fwupen      :  1; // force wake up enable
+        uint8_t smen        :  1; // supply monitor wake up enable
+        uint8_t rtten       :  1; // real time timer wake up enable
+        uint8_t rtcen       :  1; // real time clock waek up enable
+        uint8_t reserved0   :  4;
+        uint8_t fwupdbc     :  3; // force wake up debouncer
+        uint8_t reserved1   :  1;
+        uint8_t wkupdbc     :  3; // wake up inputs debouncer
+        uint8_t reserved2   :  1;
+        uint16_t reserved3  : 16;
+    } __attribute__((__packed__)) bits;
+} supc_wumr_t;
+
+#define SUPC_WUMR_FWUPDBC_1SCLK     0x0
+#define SUPC_WUMR_FWUPDBC_3SCLK     0x1
+#define SUPC_WUMR_FWUPDBC_32SCLK    0x2
+#define SUPC_WUMR_FWUPDBC_512SCLK   0x3
+#define SUPC_WUMR_FWUPDBC_4096SCLK  0x4
+#define SUPC_WUMR_FWUPDBC_32768SCLK 0x5
+
+#define SUPC_WUMR_WKUPDBC_1SCLK     0x0
+#define SUPC_WUMR_WKUPDBC_3SCLK     0x1
+#define SUPC_WUMR_WKUPDBC_32SCLK    0x2
+#define SUPC_WUMR_WKUPDBC_512SCLK   0x3
+#define SUPC_WUMR_WUKPDBC_4096SCLK  0x4
+#define SUPC_WUMR_WKUPDBC_32768SCLK 0x5
+
+/**
+ * SUPC System Controller wake up inputs Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 297
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t wkupen0  : 1; // wake up input enable 0
+        uint8_t wkupen1  : 1; // wake up input enable 1
+        uint8_t wkupen2  : 1; // wake up input enable 2
+        uint8_t wkupen3  : 1; // wake up input enable 3
+        uint8_t wkupen4  : 1; // wake up input enable 4
+        uint8_t wkupen5  : 1; // wake up input enable 5
+        uint8_t wkupen6  : 1; // wake up input enable 6
+        uint8_t wkupen7  : 1; // wake up input enable 7
+        uint8_t wkupen8  : 1; // wake up input enable 8
+        uint8_t wkupen9  : 1; // wake up input enable 9
+        uint8_t wkupen10 : 1; // wake up input enable 10
+        uint8_t wkupen11 : 1; // wake up input enable 11
+        uint8_t wkupen12 : 1; // wake up input enable 12
+        uint8_t wkupen13 : 1; // wake up input enable 13
+        uint8_t wkupen14 : 1; // wake up input enable 14
+        uint8_t wkupen15 : 1; // wake up input enable 15
+        uint8_t wkupt0   : 1; // wake up input transition 0
+        uint8_t wkupt1   : 1; // wake up input transition 1
+        uint8_t wkupt2   : 1; // wake up input transition 2
+        uint8_t wkupt3   : 1; // wake up input transition 3
+        uint8_t wkupt4   : 1; // wake up input transition 4
+        uint8_t wkupt5   : 1; // wake up input transition 5
+        uint8_t wkupt6   : 1; // wake up input transition 6
+        uint8_t wkupt7   : 1; // wake up input transition 7
+        uint8_t wkupt8   : 1; // wake up input transition 8
+        uint8_t wkupt9   : 1; // wake up input transition 9
+        uint8_t wkupt10  : 1; // wake up input transition 10
+        uint8_t wkupt11  : 1; // wake up input transition 11
+        uint8_t wkupt12  : 1; // wake up input transition 12
+        uint8_t wkupt13  : 1; // wake up input transition 13
+        uint8_t wkupt14  : 1; // wake up input transition 14
+        uint8_t wkupt15  : 1; // wake up input transition 15
+    } __attribute__((__packed__)) bits;
+} supc_wuir_t;
+
+/**
+ * SUPC Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 298
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t fwups      :  1; // fwup wake up status
+        uint8_t wkups      :  1; // wkup wake up status
+        uint8_t smws       :  1; // supply monitor detection wake up status
+        uint8_t bodrsts    :  1; // brownout detector reset status
+        uint8_t smrsts     :  1; // supply monitor reset status
+        uint8_t sms        :  1; // supply monitor status
+        uint8_t smos       :  1; // supply monitor output status
+        uint8_t oscsel     :  1; // 32-khz oscillator selection status
+        uint8_t reserved0  :  4;
+        uint8_t fwupis     :  1; // fwup input status
+        uint8_t reserved1  :  3;
+        uint8_t wkupis0    :  1; // wkup input status 0
+        uint8_t wkupis1    :  1; // wkup input status 1
+        uint8_t wkupis2    :  1; // wkup input status 2
+        uint8_t wkupis3    :  1; // wkup input status 3
+        uint8_t wkupis4    :  1; // wkup input status 4
+        uint8_t wkupis5    :  1; // wkup input status 5
+        uint8_t wkupis6    :  1; // wkup input status 6
+        uint8_t wkupis7    :  1; // wkup input status 7
+        uint8_t wkupis8    :  1; // wkup input status 8
+        uint8_t wkupis9    :  1; // wkup input status 9
+        uint8_t wkupis10   :  1; // wkup input status 10
+        uint8_t wkupis11   :  1; // wkup input status 11
+        uint8_t wkupis12   :  1; // wkup input status 12
+        uint8_t wkupis13   :  1; // wkup input status 13
+        uint8_t wkupis14   :  1; // wkup input status 14
+        uint8_t wkupis15   :  1; // wkup input status 15
+    } __attribute__((__packed__)) bits;
+} supc_sr_t;
+
+/**
+ * SUPC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary, p. 290
+ */
+typedef struct supc
+{
+    volatile supc_cr_t cr;     // Control Register
+    volatile supc_smmr_t smmr; // Supply Monitor Mode Register
+    volatile supc_mr_t mr;     // Mode Register
+    volatile supc_wumr_t wumr; // Wake Up Mode Register
+    volatile supc_wuir_t wuir; // Wake Up Inputs Register
+    volatile supc_sr_t sr;     // Status Register
+} supc_t;
+
+
+#endif // SUPCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/timer/Alarm32khz16C.nc b/tos/chips/cortex/m3/sam3/timer/Alarm32khz16C.nc
new file mode 100644
index 00000000..9dd00879
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/Alarm32khz16C.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Alarm32khzC is the alarm for async 32khz alarms
+ * @author Thomas Schmid
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+generic configuration Alarm32khz16C()
+{
+  provides interface Init;
+  provides interface Alarm<T32khz,uint16_t>;
+}
+implementation
+{
+  components HplSam3TC32khzC as HplSam3TCChannel;
+  components new HilSam3TCAlarmC(T32khz, 32) as HilSam3TCAlarm;
+
+  Init = HilSam3TCAlarm;
+  Alarm = HilSam3TCAlarm;
+
+  HilSam3TCAlarm.HplSam3TCChannel -> HplSam3TCChannel;
+  HilSam3TCAlarm.HplSam3TCCompare -> HplSam3TCChannel;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/Alarm32khz32C.nc b/tos/chips/cortex/m3/sam3/timer/Alarm32khz32C.nc
new file mode 100644
index 00000000..0dbd9bf4
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/Alarm32khz32C.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Alarm32khzC is the alarm for async 32khz alarms
+ * @author Thomas Schmid
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+generic configuration Alarm32khz32C()
+{
+  provides interface Init;
+  provides interface Alarm<T32khz,uint32_t>;
+}
+implementation
+{
+  #error The existing implementation that is in here was broken and doesn't work. Check it with an Oscilloscope!
+  components HplSam3TC32khzC as HplSam3TCChannel;
+  components new HilSam3TCAlarmC(T32khz, 32) as HilSam3TCAlarm;
+
+  Init = HilSam3TCAlarm;
+  Alarm = HilSam3TCAlarm;
+
+  HilSam3TCAlarm.HplSam3TCChannel -> HplSam3TCChannel;
+  HilSam3TCAlarm.HplSam3TCCompare -> HplSam3TCChannel;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/AlarmMilli16C.nc b/tos/chips/cortex/m3/sam3/timer/AlarmMilli16C.nc
new file mode 100644
index 00000000..fc4f1d15
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/AlarmMilli16C.nc
@@ -0,0 +1,57 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * AlarmMilliC is the alarm for async millisecond alarms
+ *
+ * @author Thomas Schmid
+ */
+ 
+generic configuration AlarmMilli16C()
+{
+  provides 
+  {
+      interface Init;
+      interface Alarm<TMilli,uint16_t>;
+  }
+}
+implementation
+{
+  components new Alarm32khz32C() as AlarmC;
+  components CounterMilli16C as Counter;
+  components new TransformAlarmC(TMilli,uint16_t,T32khz,uint32_t,5) as Transform;
+
+  Init = AlarmC;
+  Alarm = Transform;
+
+  Transform.AlarmFrom -> AlarmC;
+  Transform.Counter -> Counter;
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/AlarmMilliC.nc b/tos/chips/cortex/m3/sam3/timer/AlarmMilliC.nc
new file mode 100644
index 00000000..349f77a5
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/AlarmMilliC.nc
@@ -0,0 +1,49 @@
+/**
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues
+ */
+
+#define UQ_ALARM_TMILLI "AlarmMilliC.Alarm"
+ 
+generic configuration AlarmMilliC()
+{
+  provides 
+  {
+      interface Alarm<TMilli,uint32_t>;
+  }
+}
+implementation
+{
+  components AlarmMilliP;
+  Alarm = AlarmMilliP.AlarmMilli[unique(UQ_ALARM_TMILLI)];
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/AlarmMilliP.nc b/tos/chips/cortex/m3/sam3/timer/AlarmMilliP.nc
new file mode 100644
index 00000000..89a67293
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/AlarmMilliP.nc
@@ -0,0 +1,48 @@
+/**
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues
+ */
+ 
+configuration AlarmMilliP
+{
+  provides 
+  {
+      interface Alarm<TMilli,uint32_t> as AlarmMilli[uint8_t id];
+  }
+}
+implementation {
+  components HilAlarmMilliC, MainC;
+  MainC.SoftwareInit -> HilAlarmMilliC;
+  AlarmMilli = HilAlarmMilliC;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/AlarmTMicro16C.nc b/tos/chips/cortex/m3/sam3/timer/AlarmTMicro16C.nc
new file mode 100644
index 00000000..c6230cc1
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/AlarmTMicro16C.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <Kevin.Klues@csiro.au>
+ */
+
+#define UQ_ALARM_TMICRO16 "HilAlarmTMicro16.Alarm"
+
+generic configuration AlarmTMicro16C()
+{
+  provides {
+    interface Alarm<TMicro,uint16_t>;
+  }
+}
+implementation
+{
+  components AlarmTMicro16P;
+  Alarm = AlarmTMicro16P.Alarm[unique(UQ_ALARM_TMICRO16)];
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/AlarmTMicro16P.nc b/tos/chips/cortex/m3/sam3/timer/AlarmTMicro16P.nc
new file mode 100644
index 00000000..7b34659e
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/AlarmTMicro16P.nc
@@ -0,0 +1,46 @@
+/* 
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <Kevin.Klues@csiro.au>
+ */
+
+configuration AlarmTMicro16P {
+  provides {
+    interface Alarm<TMicro, uint16_t> as Alarm[uint8_t id];
+  }
+}
+implementation {
+  components HilAlarmTMicro16C, MainC;
+  MainC.SoftwareInit -> HilAlarmTMicro16C;
+  Alarm = HilAlarmTMicro16C;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/AlarmTMicro32C.nc b/tos/chips/cortex/m3/sam3/timer/AlarmTMicro32C.nc
new file mode 100644
index 00000000..b16da0a5
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/AlarmTMicro32C.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * AlarmTMicroC is the alarm for TMicro alarms
+ * @author Thomas Schmid
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+generic configuration AlarmTMicro32C()
+{
+  provides interface Init;
+  provides interface Alarm<TMicro,uint32_t>;
+}
+implementation
+{
+  #error The existing implementation that is in here was broken and doesn't work. Check it with an Oscilloscope!
+  components HilSam3TCCounterTMicroC as HplSam3TCChannel;
+  components new HilSam3TCAlarmC(TMicro, 1000) as HilSam3TCAlarm;
+
+  Init = HilSam3TCAlarm;
+  Alarm = HilSam3TCAlarm;
+
+  HilSam3TCAlarm.HplSam3TCChannel -> HplSam3TCChannel;
+  HilSam3TCAlarm.HplSam3TCCompare -> HplSam3TCChannel;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/BusyWaitMicroC.nc b/tos/chips/cortex/m3/sam3/timer/BusyWaitMicroC.nc
new file mode 100644
index 00000000..1e941c6f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/BusyWaitMicroC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration BusyWaitMicroC
+{
+  provides interface BusyWait<TMicro,uint16_t>;
+}
+implementation
+{
+  components new BusyWaitCounterC(TMicro,uint16_t)
+           , CounterTMicro16C
+           ;
+
+  BusyWait = BusyWaitCounterC;
+  BusyWaitCounterC.Counter -> CounterTMicro16C;
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/Counter32khz16C.nc b/tos/chips/cortex/m3/sam3/timer/Counter32khz16C.nc
new file mode 100644
index 00000000..0103d22d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/Counter32khz16C.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Counter32khz16C provides at 16-bit counter at 32768 ticks per second.
+ *
+ * @author Thomas Schmid
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration Counter32khz16C
+{
+  provides interface Counter<T32khz,uint16_t>;
+}
+implementation
+{
+  components HilSam3TCCounter32khzC as CounterFrom;
+
+  Counter = CounterFrom;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/Counter32khz32C.nc b/tos/chips/cortex/m3/sam3/timer/Counter32khz32C.nc
new file mode 100644
index 00000000..d855dfd2
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/Counter32khz32C.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Counter32khz32C provides at 32-bit counter at 32768 ticks per second.
+ *
+ * @author Thomas Schmid
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration Counter32khz32C
+{
+  provides interface Counter<T32khz,uint32_t>;
+}
+implementation
+{
+  components HilSam3TCCounter32khzC as CounterFrom;
+  components new TransformCounterC(T32khz,uint32_t,T32khz,uint16_t,0,uint16_t) as Transform;
+
+  Counter = Transform;
+
+  Transform.CounterFrom -> CounterFrom;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/Counter32khz64C.nc b/tos/chips/cortex/m3/sam3/timer/Counter32khz64C.nc
new file mode 100644
index 00000000..044262e9
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/Counter32khz64C.nc
@@ -0,0 +1,53 @@
+/* 
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Counter32khz32C provides at 32-bit counter at 32768 ticks per second.
+ *
+ * @author Thomas Schmid
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration Counter32khz64C
+{
+  provides interface Counter<T32khz,uint64_t>;
+}
+implementation
+{
+  components Counter32khz32C as CounterFrom;
+  components new TransformCounterC(T32khz,uint64_t,T32khz,uint32_t,0,uint32_t) as Transform;
+
+  Counter = Transform;
+
+  Transform.CounterFrom -> CounterFrom;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/CounterMilli16C.nc b/tos/chips/cortex/m3/sam3/timer/CounterMilli16C.nc
new file mode 100644
index 00000000..4656249f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/CounterMilli16C.nc
@@ -0,0 +1,53 @@
+/* 
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * CounterMilli16C provides at 32-bit counter at 1024 ticks per second.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+    
+configuration CounterMilli16C
+{
+  provides interface Counter<TMilli,uint16_t>;
+}
+implementation
+{
+  components Counter32khz16C as CounterFrom;
+  components new TransformCounterC(TMilli,uint16_t,T32khz,uint16_t,5,uint8_t) as Transform;
+
+  Counter = Transform.Counter;
+
+  Transform.CounterFrom -> CounterFrom;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/CounterTMicro16C.nc b/tos/chips/cortex/m3/sam3/timer/CounterTMicro16C.nc
new file mode 100644
index 00000000..61c0dc3b
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/CounterTMicro16C.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * CounterTMicroC provides at 16-bit counter at at approximately 1us
+ * resolution. However, to get the accurate frequency inquire the
+ * getTimerFrequency() function.
+ *
+ * @author Thomas Schmid
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration CounterTMicro16C
+{
+  provides {
+      interface Counter<TMicro,uint16_t>;
+  }
+}
+implementation
+{
+  components HilSam3TCCounterTMicroC as CounterFrom;
+
+  Counter = CounterFrom;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/CounterTMicro32C.nc b/tos/chips/cortex/m3/sam3/timer/CounterTMicro32C.nc
new file mode 100644
index 00000000..3f801176
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/CounterTMicro32C.nc
@@ -0,0 +1,53 @@
+/* 
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * CounterTMicro32C provides a 32-bit counter about 1M ticks per second.
+ *
+ * @author Thomas Schmid
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration CounterTMicro32C
+{
+  provides interface Counter<TMicro,uint32_t>;
+}
+implementation
+{
+  components HilSam3TCCounterTMicroC as CounterFrom;
+  components new TransformCounterC(TMicro,uint32_t,TMicro,uint16_t,0,uint16_t) as Transform;
+
+  Counter = Transform;
+
+  Transform.CounterFrom -> CounterFrom;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/CounterToLocalTime64C.nc b/tos/chips/cortex/m3/sam3/timer/CounterToLocalTime64C.nc
new file mode 100644
index 00000000..8f7cf50e
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/CounterToLocalTime64C.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Timer.h"
+
+/**
+ * CounterToLocalTimeC converts a 32-bit LocalTime to a Counter.  
+ *
+ * <p>See TEP102 for more details.
+ * @param precision_tag A type indicating the precision of the LocalTime and
+ * Counter being converted.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+generic module CounterToLocalTime64C(typedef precision_tag) @safe()
+{
+  provides interface LocalTime64<precision_tag>;
+  uses interface Counter<precision_tag,uint64_t>;
+}
+implementation
+{
+  async command uint64_t LocalTime64.get()
+  {
+    return call Counter.get();
+  }
+
+  async event void Counter.overflow()
+  {
+  }
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/GpioCaptureC.nc b/tos/chips/cortex/m3/sam3/timer/GpioCaptureC.nc
new file mode 100644
index 00000000..5e9e4f46
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/GpioCaptureC.nc
@@ -0,0 +1,91 @@
+/* 
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Jonathan Hui
+ * @author Joe Polastre
+ */
+
+generic module GpioCaptureC() @safe() {
+
+  provides 
+  {
+      interface GpioCapture as Capture;
+  }
+  uses 
+  {
+      interface HplSam3TCCapture as TCCapture;
+      interface HplSam3GeneralIOPin as GeneralIO;
+  }
+
+}
+
+implementation {
+
+  error_t enableCapture( uint8_t mode ) {
+    atomic {
+      call TCCapture.disable();
+      call GeneralIO.disablePioControl();
+      call GeneralIO.selectPeripheralA();
+
+      call TCCapture.setEdge( mode );
+      call TCCapture.clearPendingEvent();
+      call TCCapture.clearOverrun();
+      call TCCapture.enable();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t Capture.captureRisingEdge() {
+    return enableCapture( TC_CMR_ETRGEDG_RISING );
+  }
+
+  async command error_t Capture.captureFallingEdge() {
+    return enableCapture( TC_CMR_ETRGEDG_FALLING );
+  }
+
+  async command void Capture.disable() {
+    atomic {
+      call TCCapture.disable();
+    }
+  }
+
+  async event void TCCapture.captured( uint16_t time ) {
+    call TCCapture.clearPendingEvent();
+    call TCCapture.clearOverrun();
+    signal Capture.captured( time );
+  }
+
+  async event void TCCapture.overrun()
+  {
+  }
+
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/HalSam3RttC.nc b/tos/chips/cortex/m3/sam3/timer/HalSam3RttC.nc
new file mode 100644
index 00000000..80de68c8
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HalSam3RttC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+configuration HalSam3RttC
+{
+    provides
+    {
+        interface Init;
+        interface Alarm<TMilli,uint32_t> as Alarm;
+        interface LocalTime<TMilli> as LocalTime;
+    }
+}
+
+implementation
+{
+    components HplSam3RttC, HalSam3RttP;
+
+    HalSam3RttP.HplSam3Rtt -> HplSam3RttC;
+    HalSam3RttP.RttInit -> HplSam3RttC.Init;
+
+    Init = HalSam3RttP;
+    Alarm = HalSam3RttP;
+    LocalTime = HalSam3RttP;
+}    
+
+
diff --git a/tos/chips/cortex/m3/sam3/timer/HalSam3RttP.nc b/tos/chips/cortex/m3/sam3/timer/HalSam3RttP.nc
new file mode 100644
index 00000000..367d4e6f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HalSam3RttP.nc
@@ -0,0 +1,136 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Provides an alarm, counter, and local time with TMilli resolution using the
+ * SAM3's RTT.
+ *
+ * @author Thomas Schmid
+ */
+
+module HalSam3RttP @safe()
+{
+    provides {
+        interface Init;
+        interface Alarm<TMilli,uint32_t> as Alarm;
+        interface LocalTime<TMilli> as LocalTime;
+    }
+    uses {
+        interface HplSam3Rtt;
+        interface Init as RttInit;
+    }
+}
+
+implementation
+{
+    bool running;
+
+    command error_t Init.init()
+    {
+        running = FALSE;
+
+        call RttInit.init();
+        // make the counter count in milliseconds. This restarts the RTT and
+        // resets the counter.
+        call HplSam3Rtt.setPrescaler(32);
+        return SUCCESS;
+    }
+
+    async command void Alarm.start(uint32_t dt)
+    {
+        atomic running = TRUE;
+        call Alarm.startAt(call Alarm.getNow(), dt);
+    }
+
+    async command void Alarm.stop()
+    {
+        atomic running = FALSE;
+        call HplSam3Rtt.disableAlarmInterrupt();
+    }
+
+    async command bool Alarm.isRunning()
+    {
+        return running;
+    }
+
+    async command void Alarm.startAt( uint32_t t0, uint32_t dt)
+    {
+        atomic {
+            uint32_t now = call Alarm.getNow();
+            uint32_t elapsed = now-t0;
+            if(elapsed >= dt )
+            {
+                // l.et the timer expire at the next tic of the RTT
+                call HplSam3Rtt.setAlarm(now+1);
+            } else {
+                uint32_t remaining = dt - elapsed;
+                if(remaining <= 1)
+                {
+                    call HplSam3Rtt.setAlarm(now + 1);
+                } else {
+                    call HplSam3Rtt.setAlarm(now + remaining);
+                }
+            }
+            call HplSam3Rtt.enableAlarmInterrupt();
+        }
+    }
+
+    async command uint32_t Alarm.getNow()
+    {
+        uint32_t c;
+        c = call HplSam3Rtt.getTime();
+        return c;
+    }
+
+    async command uint32_t Alarm.getAlarm()
+    {
+        uint32_t c;
+        c = call HplSam3Rtt.getAlarm();
+        return c;
+    }
+
+    async command uint32_t LocalTime.get()
+    {
+        return call Alarm.getNow();
+    }
+
+    async event void HplSam3Rtt.alarmFired() 
+    {
+        call Alarm.stop();
+	call HplSam3Rtt.disableAlarmInterrupt();
+        signal Alarm.fired();
+    }
+
+    async event void HplSam3Rtt.incrementFired()
+    {
+    }
+
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/HilAlarmMilliC.nc b/tos/chips/cortex/m3/sam3/timer/HilAlarmMilliC.nc
new file mode 100644
index 00000000..54a460b0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HilAlarmMilliC.nc
@@ -0,0 +1,52 @@
+/**
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues 
+ */
+ 
+configuration HilAlarmMilliC
+{
+  provides 
+  {
+      interface Init;
+      interface Alarm<TMilli,uint32_t> as AlarmMilli[uint8_t id];
+  }
+}
+implementation
+{
+  components HalSam3RttC as AlarmC;
+  components new VirtualizeAlarmC(TMilli, uint32_t, uniqueCount(UQ_ALARM_TMILLI)) as VirtAlarmsTMilli;
+
+  Init = AlarmC;
+  AlarmMilli = VirtAlarmsTMilli.Alarm;
+  VirtAlarmsTMilli.AlarmFrom -> AlarmC;
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/HilAlarmTMicro16C.nc b/tos/chips/cortex/m3/sam3/timer/HilAlarmTMicro16C.nc
new file mode 100644
index 00000000..445d0f08
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HilAlarmTMicro16C.nc
@@ -0,0 +1,59 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** 
+ * @author Kevin Klues <Kevin.Klues@csiro.au>
+ *
+ */
+
+configuration HilAlarmTMicro16C
+{
+  provides 
+  {
+      interface Init;
+      interface Alarm<TMicro, uint16_t> as Alarm[ uint8_t num ];
+  }
+}
+
+implementation
+{
+  components new VirtualizeAlarmC(TMicro, uint16_t, uniqueCount(UQ_ALARM_TMICRO16)) as VirtAlarmsTMicro16;
+  components HilSam3TCCounterTMicroC as HplSam3TCChannel;
+  components new HilSam3TCAlarmC(TMicro, 1000) as HilSam3TCAlarm;
+
+  Init = HilSam3TCAlarm;
+  Alarm = VirtAlarmsTMicro16.Alarm;
+
+  VirtAlarmsTMicro16.AlarmFrom -> HilSam3TCAlarm;
+  HilSam3TCAlarm.HplSam3TCChannel -> HplSam3TCChannel;
+  HilSam3TCAlarm.HplSam3TCCompare -> HplSam3TCChannel;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/HilSam3TCAlarmC.nc b/tos/chips/cortex/m3/sam3/timer/HilSam3TCAlarmC.nc
new file mode 100644
index 00000000..19025275
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HilSam3TCAlarmC.nc
@@ -0,0 +1,123 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HilSam3TCAlarmC is a generic component that wraps the SAM3U HPL timers and
+ * compares into a TinyOS Alarm.
+ *
+ * @author Thomas Schmid
+ * @author Kevin Klues
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+generic module HilSam3TCAlarmC(typedef frequency_tag, uint16_t freq_divisor) @safe()
+{
+  provides 
+  {
+      interface Init;
+      interface Alarm<frequency_tag,uint16_t> as Alarm;
+  }
+  uses
+  {
+      interface HplSam3TCChannel;
+      interface HplSam3TCCompare;
+  }
+}
+implementation
+{
+  command error_t Init.init()
+  {
+    call HplSam3TCCompare.disable();
+    return SUCCESS;
+  }
+
+  async command void Alarm.start( uint16_t dt )
+  {
+    call Alarm.startAt( call Alarm.getNow(), dt );
+  }
+
+  async command void Alarm.stop()
+  {
+    call HplSam3TCCompare.disable();
+  }
+
+  async event void HplSam3TCCompare.fired()
+  {
+    call HplSam3TCCompare.disable();
+    signal Alarm.fired();
+  }
+
+  async command bool Alarm.isRunning()
+  {
+    return call HplSam3TCCompare.isEnabled();
+  }
+
+  async command void Alarm.startAt( uint16_t t0, uint16_t dt )
+  {
+    uint32_t freq = call HplSam3TCChannel.getTimerFrequency();
+    dt = (dt*freq)/(uint32_t)freq_divisor + 1;
+    atomic
+    {
+      uint16_t now = call HplSam3TCChannel.get();
+      uint16_t elapsed = now - t0;
+      if( elapsed >= dt )
+      {
+        call HplSam3TCCompare.setEventFromNow(2);
+      }
+      else
+      {
+        uint16_t remaining = dt - elapsed;
+        if( remaining <= 2 )
+          call HplSam3TCCompare.setEventFromNow(2);
+        else
+          call HplSam3TCCompare.setEvent( now+remaining );
+      }
+      call HplSam3TCCompare.clearPendingEvent();
+      call HplSam3TCCompare.enable();
+    }
+  }
+
+  async command uint16_t Alarm.getNow()
+  {
+    return call HplSam3TCChannel.get();
+  }
+
+  async command uint16_t Alarm.getAlarm()
+  {
+    return call HplSam3TCCompare.getEvent();
+  }
+
+  async event void HplSam3TCChannel.overflow()
+  {
+  }
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/HilSam3TCCounter32khzC.nc b/tos/chips/cortex/m3/sam3/timer/HilSam3TCCounter32khzC.nc
new file mode 100644
index 00000000..5c487c05
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HilSam3TCCounter32khzC.nc
@@ -0,0 +1,52 @@
+/* 
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HilSam3TCCounter32khC provides the standard 32khz counter for the SAM3U.
+ *
+ * @author Thomas Schmid
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration HilSam3TCCounter32khzC
+{
+  provides interface Counter<T32khz,uint16_t> as HilSam3TCCounter32khz;
+}
+implementation
+{
+  components HplSam3TCC;
+  components new HilSam3TCCounterC(T32khz) as Counter;
+
+  HilSam3TCCounter32khz = Counter;
+  Counter.HplSam3TCChannel -> HplSam3TCC.TC0;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/HilSam3TCCounterC.nc b/tos/chips/cortex/m3/sam3/timer/HilSam3TCCounterC.nc
new file mode 100644
index 00000000..c347d052
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HilSam3TCCounterC.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HilSam3TCCounter is a generic component that wraps the SAM3U HPL timers into a
+ * TinyOS Counter.
+ *
+ * @author Thomas Schmid
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic module HilSam3TCCounterC( typedef frequency_tag ) @safe()
+{
+  provides interface Counter<frequency_tag,uint16_t> as Counter;
+  uses interface HplSam3TCChannel;
+}
+implementation
+{
+  async command uint16_t Counter.get()
+  {
+    return call HplSam3TCChannel.get();
+  }
+
+  async command bool Counter.isOverflowPending()
+  {
+    return call HplSam3TCChannel.isOverflowPending();
+  }
+
+  async command void Counter.clearOverflow()
+  {
+    call HplSam3TCChannel.clearOverflow();
+  }
+
+  async event void HplSam3TCChannel.overflow()
+  {
+    signal Counter.overflow();
+  }
+  default async event void Counter.overflow() {}
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/HilSam3TCCounterTMicroC.nc b/tos/chips/cortex/m3/sam3/timer/HilSam3TCCounterTMicroC.nc
new file mode 100644
index 00000000..e00930b3
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HilSam3TCCounterTMicroC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HilSam3TCCounterTMicroC provides the an approximate TMicro counter for the
+ * SAM3U.
+ *
+ * @author Thomas Schmid
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration HilSam3TCCounterTMicroC
+{
+  provides {
+      interface Counter<TMicro,uint16_t> as HilSam3TCCounterTMicro;
+      interface HplSam3TCChannel;
+      interface HplSam3TCCompare;
+  }
+}
+implementation
+{
+  components HplSam3TCC;
+  components new HilSam3TCCounterC(TMicro) as Counter;
+
+  HilSam3TCCounterTMicro = Counter;
+  Counter.HplSam3TCChannel -> HplSam3TCC.TCH2;
+
+  HplSam3TCChannel = HplSam3TCC.TCH2;
+  HplSam3TCCompare = HplSam3TCC.TC2CompareC;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/HilTimerMilliC.nc b/tos/chips/cortex/m3/sam3/timer/HilTimerMilliC.nc
new file mode 100644
index 00000000..a0e641c2
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HilTimerMilliC.nc
@@ -0,0 +1,62 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** 
+ * @author Thomas Schmid
+ *
+ */
+
+#include "Timer.h"
+
+configuration HilTimerMilliC
+{
+  provides 
+  {
+      interface Init;
+      interface Timer<TMilli> as TimerMilli[ uint8_t num ];
+      interface LocalTime<TMilli>;
+  }
+}
+
+implementation
+{
+  components new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI)) as VirtTimersMilli32;
+  components new AlarmToTimerC(TMilli) as AlarmToTimerMilli32;
+  components new AlarmMilliC() as AlarmMilli32;
+  components HalSam3RttC;
+
+  Init = HalSam3RttC;
+  TimerMilli = VirtTimersMilli32.Timer;
+  LocalTime = HalSam3RttC;
+  
+  VirtTimersMilli32.TimerFrom -> AlarmToTimerMilli32.Timer;
+  AlarmToTimerMilli32.Alarm -> AlarmMilli32.Alarm;
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/HplSam3Rtt.nc b/tos/chips/cortex/m3/sam3/timer/HplSam3Rtt.nc
new file mode 100644
index 00000000..04d0cfda
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HplSam3Rtt.nc
@@ -0,0 +1,104 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface for the SAM3 Real-Time Timer.
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3Rtt {
+
+    /**
+     * Sets the prescaler value of the RTT and restart it. This function
+     * disables all interrupt sources!
+     *
+     * @par prescaler 16-bit prescaler for the counter. The RTT is fed by a
+     * 32.768 Hz clock.
+     */
+    async command error_t setPrescaler(uint16_t prescaler);
+
+    /**
+     * Retrieves the current time of the timer.
+     *
+     * @return The 32-bit counter value.
+     */
+    async command uint32_t getTime();
+
+    /**
+     * Enables the alarm interrupt of the RTT.
+     */
+    async command error_t enableAlarmInterrupt();
+
+    /**
+     * Disables the alarm interrupt of the RTT.
+     */
+    async command error_t disableAlarmInterrupt();
+
+    /**
+     * Enables the incremental interrupt of the RTT. 
+     */
+    async command error_t enableIncrementalInterrupt();
+
+    /**
+     * Disables the incremental interrupt of the RTT.
+     */
+    async command error_t disableIncrementalInterrupt();
+
+    /**
+     * Restart the RTT and resets the counter value.
+     */
+    async command error_t restart();
+
+    /**
+     * Set the alarm for the RTT.
+     *
+     * @par time The 32-bit time value at which the alarm interrupt should
+     * happen.
+     */
+    async command error_t setAlarm(uint32_t time);
+
+    /**
+     * Returns the current alarm time.
+     */
+    async command uint32_t getAlarm();
+
+    /**
+     * Event indicating that the increment interrupt fired.
+     */
+    async event void incrementFired();
+
+    /**
+     * Event indicating that the alarm interrupt fired.
+     */
+    async event void alarmFired();
+
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/HplSam3RttC.nc b/tos/chips/cortex/m3/sam3/timer/HplSam3RttC.nc
new file mode 100644
index 00000000..867c4041
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HplSam3RttC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2009 The Regents of the University of California.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+configuration HplSam3RttC {
+  provides {
+    interface Init;
+    interface HplSam3Rtt;
+  }
+}
+
+implementation {
+  components HplSam3RttP;
+  Init = HplSam3RttP;
+  HplSam3Rtt = HplSam3RttP;
+
+  components HplNVICC;
+  HplSam3RttP.HplNVICCntl -> HplNVICC;
+  HplSam3RttP.NVICRTTInterrupt -> HplNVICC.RTTInterrupt;
+
+  components McuSleepC;
+  HplSam3RttP.RttInterruptWrapper -> McuSleepC;
+
+  components LedsC;
+  HplSam3RttP.Leds -> LedsC;
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/HplSam3RttP.nc b/tos/chips/cortex/m3/sam3/timer/HplSam3RttP.nc
new file mode 100644
index 00000000..66df491f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HplSam3RttP.nc
@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2009 The Regents of the University of California.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+// Chip specific include that defines the RTT variable
+#include "sam3rtthardware.h"
+
+module HplSam3RttP @safe()
+{
+    provides {
+        interface Init;
+        interface HplSam3Rtt;
+    }
+    uses {
+        interface HplNVICCntl;
+        interface HplNVICInterruptCntl as NVICRTTInterrupt;
+        interface FunctionWrapper as RttInterruptWrapper;
+	interface Leds;
+    }
+}
+implementation
+{
+    command error_t Init.init()
+    {
+        call NVICRTTInterrupt.configure(0);
+        // now enable the IRQ
+        call NVICRTTInterrupt.enable();
+        return SUCCESS;
+    }
+
+    /**
+     * Sets the prescaler value of the RTT and restart it. This function
+     * disables all interrupt sources!
+     */
+    async command error_t HplSam3Rtt.setPrescaler(uint16_t prescaler)
+    {
+        rtt_mr_t mr = RTT->mr;
+        // after changing the prescaler, we have to restart the RTT
+        mr.bits.rtpres = prescaler;
+        RTT->mr = mr;
+        return call HplSam3Rtt.restart();
+    }
+
+    async command uint32_t HplSam3Rtt.getTime()
+    {
+        return RTT->vr;
+    }
+
+    async command error_t HplSam3Rtt.enableAlarmInterrupt()
+    {
+        rtt_mr_t mr = RTT->mr;
+        mr.bits.almien = 1;;
+        RTT->mr = mr;
+        return SUCCESS;
+    }
+
+    async command error_t HplSam3Rtt.disableAlarmInterrupt()
+    {
+        rtt_mr_t mr = RTT->mr;
+        mr.bits.almien = 0;
+        RTT->mr = mr;
+        return SUCCESS;
+    }
+
+    async command error_t HplSam3Rtt.enableIncrementalInterrupt()
+    {
+        rtt_mr_t mr = RTT->mr;
+        mr.bits.rttincien = 1;
+        RTT->mr = mr;
+        return SUCCESS;
+    }
+
+    async command error_t HplSam3Rtt.disableIncrementalInterrupt()
+    {
+        rtt_mr_t mr = RTT->mr;
+        mr.bits.rttincien = 0;
+        RTT->mr = mr;
+        return SUCCESS;
+    }
+
+    async command error_t HplSam3Rtt.restart()
+    {
+        rtt_mr_t mr = RTT->mr;
+        mr.bits.rttrst = 1;
+        RTT->mr = mr;
+        return SUCCESS;
+    }
+
+    async command error_t HplSam3Rtt.setAlarm(uint32_t time)
+    {
+        if(time > 0)
+        {
+            RTT->ar = time - 1;
+            return SUCCESS;
+        } else {
+            return FAIL;
+        }
+    }
+
+    async command uint32_t HplSam3Rtt.getAlarm()
+    {
+        return RTT->ar;
+    }
+
+    void RttIrqHandler() @C() @spontaneous()
+    {
+        rtt_sr_t status;
+
+        call RttInterruptWrapper.preamble();
+        atomic {
+            //PMC->pc.pcer.bits.tc2 = 1; // FIXME: what is this????
+            // clear pending interrupt
+            call NVICRTTInterrupt.clearPending();
+
+            status = RTT->sr;
+
+            if (status.bits.rttinc) {
+                // we got an increment interrupt
+                signal HplSam3Rtt.incrementFired();
+            }
+
+            if (status.bits.alms) {
+                // we got an alarm
+                //call Leds.led2Toggle();
+                signal HplSam3Rtt.alarmFired();
+            }
+        }
+        call RttInterruptWrapper.postamble();
+    }
+
+    default async event void HplSam3Rtt.incrementFired() {}
+    default async event void HplSam3Rtt.alarmFired() {}
+
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/HplSam3TC.nc b/tos/chips/cortex/m3/sam3/timer/HplSam3TC.nc
new file mode 100644
index 00000000..237c957a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HplSam3TC.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3TC{
+  command void enableTC0(); // slclk
+  command void enableTC1(); // slclk
+  command void enableTC2(); // used for TMicro
+
+  command void disableTC0();
+  command void disableTC1();
+  command void disableTC2();
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/HplSam3TC32khzC.nc b/tos/chips/cortex/m3/sam3/timer/HplSam3TC32khzC.nc
new file mode 100644
index 00000000..cf02f838
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HplSam3TC32khzC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+configuration HplSam3TC32khzC
+{
+  provides interface HplSam3TCChannel;
+  provides interface HplSam3TCCompare;
+}
+implementation
+{
+  components HplSam3TC32khzMapC as Map;
+
+  enum { ALARM_ID = unique("Sam3TC32khzMapC") };
+  HplSam3TCChannel = Map.HplSam3TCChannel[ ALARM_ID ];
+  HplSam3TCCompare = Map.HplSam3TCCompare[ ALARM_ID ];
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/HplSam3TC32khzMapC.nc b/tos/chips/cortex/m3/sam3/timer/HplSam3TC32khzMapC.nc
new file mode 100644
index 00000000..409fa308
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HplSam3TC32khzMapC.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HplSam3TC32khzMapC presents as paramaterized interfaces all of the 32khz
+ * channels on the SAM3U that are available for compile time allocation
+ * by "new Alarm32khz16C()", "new AlarmMilli32C()", and so on.
+ *
+ * Platforms based on the SAM3U are encouraged to copy in and override this
+ * file, presenting only the hardware timers that are available for allocation
+ * on that platform.
+ *
+ * @author Thomas Schmid
+ */
+
+configuration HplSam3TC32khzMapC
+{
+  provides interface HplSam3TCChannel[ uint8_t id ];
+  provides interface HplSam3TCCompare[ uint8_t id ];
+}
+implementation
+{
+  components HplSam3TCC;
+
+  HplSam3TCChannel[0] = HplSam3TCC.TC0;
+  HplSam3TCCompare[0] = HplSam3TCC.TC0CompareC;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/HplSam3TCCapture.nc b/tos/chips/cortex/m3/sam3/timer/HplSam3TCCapture.nc
new file mode 100644
index 00000000..0aeddfe9
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HplSam3TCCapture.nc
@@ -0,0 +1,113 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SAM3 TC capture interface.
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3TCCapture
+{
+    /**
+     * Enable the capture event interrupt.
+     */
+    async command void enable();
+
+    /**
+     * Disable the capture event interrupt.
+     */
+    async command void disable();
+
+    /**
+     * Reads the value of the last capture event in RA 
+     */
+    async command uint16_t getEventRA();
+
+    /**
+     * Reads the value of the last capture event in RB 
+     */
+    async command uint16_t getEventRB();
+
+    /**
+     * Clear any pending event.
+     */
+    async command void clearPendingEvent();
+
+    /**
+     * Set the edge that the capture should occur
+     *
+     * @param cm Capture Mode for edge capture.
+     * enums exist for:
+     *   TC_CMR_ETRGEDG_NONE is no capture.
+     *   TC_CMR_ETRGEDG_RISING is rising edge capture.
+     *   TC_CMR_ETRGEDG_FALLING is a falling edge capture.
+     *   TC_CMR_ETRGEDG_EACH captures on both rising and falling edges.
+     */
+    async command void setEdge(uint8_t cm);
+
+    /**
+     * Select the external trigger source. Allowed values:
+     *   TC_CMR_ABETRG_TIOA
+     *   TC_CMR_ABETRG_TIOB
+     */
+    async command void setExternalTrigger(uint8_t cm);
+
+    /**
+     * Set external trigger edge.
+     */
+    async command void setExternalTriggerEdge(uint8_t cm);
+
+    /**
+     * Determine if a capture load overrun is pending.
+     *
+     * @return TRUE if the capture register has was loaded twice since last read
+     */
+    async command bool isOverrunPending();
+
+    /**
+     * Clear the capture overrun flag for when multiple captures occur
+     */
+    async command void clearOverrun();
+
+    /**
+     * Signalled when an event is captured.
+     *
+     * @param time The time of the capture event
+     */
+    async event void captured(uint16_t time);
+
+    /**
+     * Signalled when an overrun occures.
+     */
+    async event void overrun();
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/HplSam3TCChannel.nc b/tos/chips/cortex/m3/sam3/timer/HplSam3TCChannel.nc
new file mode 100644
index 00000000..43569f2a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HplSam3TCChannel.nc
@@ -0,0 +1,82 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SAM3U TC Channel interface.
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3TCChannel
+{
+    async command uint16_t get();
+    async command bool isOverflowPending();
+    async command void clearOverflow();
+    async event void overflow();
+
+    /**
+     * FIXME: this currently only selects between wave mode or non-wave mode.
+     * This should be extended to all the different posibilities of modes!
+     *
+     * allowed arguments:
+     *   TC_CMR_WAVE: selects wave mode. Allows compare on A, B, and C or wave
+     *                generation
+     *   TC_CMR_CAPTURE: selects capture mode (disables wave mode!). Allows
+     *                   capture on A, B, and compare on C. (DEFAULT)
+     */
+    async command void setMode(uint8_t mode);
+
+    async command uint8_t getMode();
+
+    async command void enableEvents();
+    async command void disableEvents();
+    async command void enableClock();
+    async command void disableClock();
+
+    /**
+     * Allowed clock sources:
+     * TC_CMR_CLK_TC1: selects MCK/2 
+     * TC_CMR_CLK_TC2: selects MCK/8
+     * TC_CMR_CLK_TC3: selects MCK/32
+     * TC_CMR_CLK_TC4: selects MCK/128
+     * TC_CMR_CLK_SLOW: selects SLCK. if MCK=SLCK, then this clock will be
+     *                  modified by PRES and MDIV!
+     * TC_CMR_CLK_XC0: selects external clock input 0
+     * TC_CMR_CLK_XC1: selects external clock input 1
+     * TC_CMR_CLK_XC2: selects external clock input 2
+     */
+    async command void setClockSource(uint8_t clockSource);
+
+    /**
+     * Returns the current timer frequency in kHz.
+     */
+    async command uint32_t getTimerFrequency();
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/HplSam3TCChannelP.nc b/tos/chips/cortex/m3/sam3/timer/HplSam3TCChannelP.nc
new file mode 100644
index 00000000..5e2dd240
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HplSam3TCChannelP.nc
@@ -0,0 +1,511 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Provides a bare bone interface to the SAM3 TC.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "sam3tchardware.h"
+
+generic module HplSam3TCChannelP(uint32_t tc_channel_base) @safe()
+{
+    provides {
+        interface HplSam3TCChannel;
+        interface HplSam3TCCapture as Capture;
+        interface HplSam3TCCompare as CompareA;
+        interface HplSam3TCCompare as CompareB;
+        interface HplSam3TCCompare as CompareC;
+    }
+    uses {
+        interface HplSam3Clock as ClockConfig;
+
+        interface HplSam3TCEvent as TimerEvent;
+        interface HplNVICInterruptCntl as NVICTCInterrupt;
+        interface HplSam3PeripheralClockCntl as TCPClockCntl;
+
+    }
+}
+implementation
+{
+    // the CMR registers have slightly different meanings in the two modes!
+    volatile tc_channel_capture_t *CH_CAPTURE = (volatile tc_channel_capture_t*)tc_channel_base;
+    volatile tc_channel_wave_t *CH_WAVE = (volatile tc_channel_wave_t*)tc_channel_base;
+
+    // interrupt status
+    tc_sr_t sr;
+
+    /******************************************
+     * General TC Channel functions
+     ******************************************/
+
+    async command uint16_t HplSam3TCChannel.get()
+    {
+        return CH_CAPTURE->cv.bits.cv;
+    }
+
+    async command bool HplSam3TCChannel.isOverflowPending()
+    {
+        sr.flat |= CH_CAPTURE->sr.flat;
+        return (sr.bits.covfs && 1);
+    }
+
+    async command void HplSam3TCChannel.clearOverflow()
+    {
+        // read the sr register to clear it
+        sr.flat |= CH_CAPTURE->sr.flat;
+        // assure that the overlof is cleared
+        sr.bits.covfs = 0;
+    }
+
+    /**
+     * FIXME: this currently only selects between wave mode or non-wave mode.
+     * This should be extended to all the different posibilities of modes!
+     *
+     * allowed arguments:
+     *   TC_CMR_WAVE: selects wave mode. Allows compare on A, B, and C or wave
+     *                generation
+     *   TC_CMR_CAPTURE: selects capture mode (disables wave mode!). Allows
+     *                   capture on A, B, and compare on C. (DEFAULT)
+     */
+    async command void HplSam3TCChannel.setMode(uint8_t mode)
+    {
+        switch(mode)
+        {
+            case TC_CMR_WAVE:
+                {
+                    tc_cmr_wave_t cmr = CH_WAVE->cmr;
+                    cmr.bits.wave = (mode & 0x01);
+                    CH_WAVE->cmr = cmr;
+                }
+            case TC_CMR_CAPTURE:
+                {
+                    tc_cmr_capture_t cmr = CH_CAPTURE->cmr;
+                    cmr.bits.wave = (mode & 0x01);
+                    CH_CAPTURE->cmr = cmr;
+                }
+        }
+    }
+
+    async command uint8_t HplSam3TCChannel.getMode()
+    {
+        // the wave field is the same in capture and wave mode!
+        return CH_CAPTURE->cmr.bits.wave;
+    }
+
+    /**
+     * This enables the events for this channel and the peripheral clock!
+     */
+    async command void HplSam3TCChannel.enableEvents()
+    {
+        tc_ier_t ier;
+        tc_ccr_t ccr;
+        ier.flat = 0;
+        ccr.flat = 0;
+
+        // enable the peripheral clock to this channel
+        call TCPClockCntl.enable();
+
+        call NVICTCInterrupt.configure(0);
+        // now enable the IRQ
+        call NVICTCInterrupt.enable();
+        
+        // by default, we enable at least overflows
+        ier.bits.covfs = 1;
+        CH_CAPTURE->ier = ier;
+
+        // enable the clock
+        ccr.bits.clken = 1;
+        // start the clock!
+        ccr.bits.swtrg = 1;
+        CH_CAPTURE->ccr = ccr;
+    }
+
+    /**
+     * This enables the peripheral clock for this channel
+     */
+    async command void HplSam3TCChannel.enableClock() {
+        // enable the peripheral clock to this channel
+        call TCPClockCntl.enable();
+    }
+
+    /**
+     * This disables the events for this channel and the peripheral clock!
+     */
+    async command void HplSam3TCChannel.disableEvents()
+    {
+        tc_idr_t idr;
+        idr.flat = 0;
+
+        call NVICTCInterrupt.disable();
+        call TCPClockCntl.disable();
+
+        // disable overruns
+        idr.bits.covfs = 1;
+        CH_CAPTURE->idr = idr;
+    }
+
+    /**
+     * This disables the peripheral clock for this channel
+     */
+    async command void HplSam3TCChannel.disableClock() {
+        // disable the peripheral clock to this channel
+        call TCPClockCntl.disable();
+    }
+
+    /**
+     * Allowed clock sources:
+     * TC_CMR_CLK_TC1: selects MCK/2 
+     * TC_CMR_CLK_TC2: selects MCK/8
+     * TC_CMR_CLK_TC3: selects MCK/32
+     * TC_CMR_CLK_TC4: selects MCK/128
+     * TC_CMR_CLK_SLOW: selects SLCK. if MCK=SLCK, then this clock will be
+     *                  modified by PRES and MDIV!
+     * TC_CMR_CLK_XC0: selects external clock input 0
+     * TC_CMR_CLK_XC1: selects external clock input 1
+     * TC_CMR_CLK_XC2: selects external clock input 2
+     */
+    async command void HplSam3TCChannel.setClockSource(uint8_t clockSource)
+    {
+        // the tcclks is the same in capture and wave!
+        tc_cmr_capture_t cmr = CH_CAPTURE->cmr;
+        cmr.bits.tcclks = clockSource;
+        CH_CAPTURE->cmr = cmr;
+    }
+
+    async event void TimerEvent.fired()
+    {
+        atomic{
+
+            sr.flat |= CH_CAPTURE->sr.flat; // combine the current state for everyone to;
+
+            if(sr.bits.covfs){
+                signal HplSam3TCChannel.overflow();
+                sr.bits.covfs = 0;
+            }
+            if(sr.bits.lovrs){
+                // only signal if the corresponding capture is enabled
+                if(CH_CAPTURE->imr.bits.ldras)
+                    signal Capture.overrun();
+                if(CH_CAPTURE->imr.bits.ldrbs)
+                    signal Capture.overrun();
+                sr.bits.lovrs = 0;
+            }
+            if(sr.bits.cpas){
+                signal CompareA.fired();
+                sr.bits.cpas = 0;
+            }
+            if(sr.bits.cpbs){
+                signal CompareB.fired();
+                sr.bits.cpbs = 0;
+            }
+            if(sr.bits.cpcs){
+	      signal CompareC.fired();
+	      sr.bits.cpcs = 0;
+            }
+            if(sr.bits.ldras){
+                signal Capture.captured(call Capture.getEventRA());
+                sr.bits.ldras = 0;
+            }
+            if(sr.bits.ldrbs){
+                signal Capture.captured(call Capture.getEventRB());
+                sr.bits.ldrbs = 0;
+            }
+        }
+    }
+
+    async command uint32_t HplSam3TCChannel.getTimerFrequency()
+    {
+        uint32_t mck;
+
+        if(CH_CAPTURE->cmr.bits.tcclks == TC_CMR_CLK_SLOW)
+            return 32;
+
+        mck = call ClockConfig.getMainClockSpeed();
+        return mck >> ((CH_CAPTURE->cmr.bits.tcclks* 2) + 1);
+    }
+
+    async event void ClockConfig.mainClockChanged()
+    {
+        // in the best case, we would now inform the user!
+    }
+
+    default async event void HplSam3TCChannel.overflow(){ }
+
+    /******************************************
+     * Capture
+     ******************************************/
+
+    async command void Capture.enable()
+    {
+        tc_ier_t ier;
+        ier.bits.ldras = 1;
+        ier.bits.ldrbs = 1;
+        ier.bits.lovrs = 1;
+        CH_CAPTURE->ier = ier;
+    }
+
+    async command void Capture.disable()
+    {
+        tc_idr_t idr;
+        // disable interrupt plus overrun
+        idr.bits.ldras = 1;
+        idr.bits.ldrbs = 1;
+        idr.bits.lovrs = 1;
+        CH_CAPTURE->idr = idr;
+    }
+
+    async command uint16_t Capture.getEventRA()
+    {
+        return CH_CAPTURE->ra.bits.ra;
+    }
+
+    async command uint16_t Capture.getEventRB()
+    {
+        return CH_CAPTURE->rb.bits.rb;
+    }
+
+    async command void Capture.clearPendingEvent()
+    {
+        sr.flat |= CH_CAPTURE->sr.flat;
+        sr.bits.ldras = 0;
+        sr.bits.ldrbs = 0;
+    }
+
+    async command void Capture.setEdge(uint8_t cm)
+    {
+        tc_cmr_capture_t cmr = CH_CAPTURE->cmr;
+        cmr.bits.ldra = (cm & 0x3);
+        cmr.bits.ldrb = (cm & 0x3);
+        CH_CAPTURE->cmr = cmr;
+    }
+
+    async command void Capture.setExternalTriggerEdge(uint8_t cm)
+    {
+        tc_cmr_capture_t cmr = CH_CAPTURE->cmr;
+        cmr.bits.etrgedg = (cm & 0x3);
+        CH_CAPTURE->cmr = cmr;
+    }
+
+    async command void Capture.setExternalTrigger(uint8_t cm )
+    {
+        tc_cmr_capture_t cmr = CH_CAPTURE->cmr;
+        cmr.bits.abetrg = (cm & 0x1);
+        CH_CAPTURE->cmr = cmr;
+    }
+
+    async command bool Capture.isOverrunPending()
+    {
+        sr.flat |= CH_CAPTURE->sr.flat;
+        return (sr.bits.lovrs & 0x01);
+    }
+
+    async command void Capture.clearOverrun()
+    {
+        sr.flat |= CH_CAPTURE->sr.flat;
+        sr.bits.lovrs = 0;
+    }
+
+    default async event void Capture.overrun() { }
+    default async event void Capture.captured(uint16_t time) { }
+
+    /******************************************
+     * Compare A
+     ******************************************/
+    async command void CompareA.enable()
+    {
+        tc_ier_t ier = CH_WAVE->ier;
+        ier.bits.cpas = 1;
+        CH_WAVE->ier = ier;
+    }
+
+    async command void CompareA.disable()
+    {
+        tc_idr_t idr = CH_WAVE->idr;
+        idr.bits.cpas = 1;
+        CH_WAVE->idr = idr;
+    }
+
+    async command bool CompareA.isEnabled()
+    {
+        return (CH_WAVE->imr.bits.cpas & 0x01);
+    }
+
+    async command void CompareA.clearPendingEvent()
+    {
+        sr.flat |= CH_WAVE->sr.flat;
+        sr.bits.cpas = 0;
+    }
+
+    async command uint16_t CompareA.getEvent()
+    {
+        return CH_WAVE->ra.bits.ra;
+    }
+
+    async command void CompareA.setEvent( uint16_t time )
+    {
+        tc_ra_t ra = CH_WAVE->ra;
+        ra.bits.ra = time;
+        CH_WAVE->ra = ra;
+    }
+
+    async command void CompareA.setEventFromPrev( uint16_t delta )
+    {
+        tc_ra_t ra = CH_WAVE->ra;
+        ra.bits.ra += delta;
+        CH_WAVE->ra = ra;
+    }
+
+    async command void CompareA.setEventFromNow( uint16_t delta )
+    {
+        tc_ra_t ra = CH_WAVE->ra;
+        ra.bits.ra = CH_WAVE->cv.bits.cv + delta;
+        CH_WAVE->ra = ra;
+    }
+
+    default async event void CompareA.fired() { }
+
+
+    /******************************************
+     * Compare B
+     ******************************************/
+    async command void CompareB.enable()
+    {
+        tc_ier_t ier = CH_WAVE->ier;
+        ier.bits.cpbs = 1;
+        CH_WAVE->ier = ier;
+    }
+
+    async command void CompareB.disable()
+    {
+        tc_idr_t idr = CH_WAVE->idr;
+        idr.bits.cpbs = 1;
+        CH_WAVE->idr = idr;
+    }
+
+    async command bool CompareB.isEnabled()
+    {
+        return (CH_WAVE->imr.bits.cpbs & 0x01);
+    }
+
+    async command void CompareB.clearPendingEvent()
+    {
+        sr.flat |= CH_WAVE->sr.flat;
+        sr.bits.cpbs = 0;
+    }
+
+    async command uint16_t CompareB.getEvent()
+    {
+        return CH_WAVE->rb.bits.rb;
+    }
+
+    async command void CompareB.setEvent( uint16_t time )
+    {
+        tc_rb_t rb = CH_WAVE->rb;
+        rb.bits.rb = time;
+        CH_WAVE->rb = rb;
+    }
+
+    async command void CompareB.setEventFromPrev( uint16_t delta )
+    {
+        tc_rb_t rb = CH_WAVE->rb;
+        rb.bits.rb += delta;
+        CH_WAVE->rb = rb;
+    }
+
+    async command void CompareB.setEventFromNow( uint16_t delta )
+    {
+        tc_rb_t rb = CH_WAVE->rb;
+        rb.bits.rb = CH_WAVE->cv.bits.cv + delta;
+        CH_WAVE->rb = rb;
+    }
+
+    default async event void CompareB.fired() { }
+
+
+    /******************************************
+     * Compare C
+     ******************************************/
+    async command void CompareC.enable()
+    {
+        tc_ier_t ier = CH_WAVE->ier;
+        ier.bits.cpcs = 1;
+        CH_WAVE->ier = ier;
+    }
+
+    async command void CompareC.disable()
+    {
+        tc_idr_t idr = CH_WAVE->idr;
+        idr.bits.cpcs = 1;
+        CH_WAVE->idr = idr;
+    }
+
+    async command bool CompareC.isEnabled()
+    {
+        return (CH_WAVE->imr.bits.cpcs & 0x01);
+    }
+
+    async command void CompareC.clearPendingEvent()
+    {
+        sr.flat |= CH_WAVE->sr.flat;
+        sr.bits.cpcs = 0;
+    }
+
+    async command uint16_t CompareC.getEvent()
+    {
+        return CH_WAVE->rc.bits.rc;
+    }
+
+    async command void CompareC.setEvent( uint16_t time )
+    {
+        tc_rc_t rc = CH_WAVE->rc;
+        rc.bits.rc = time;
+        CH_WAVE->rc = rc;
+    }
+
+    async command void CompareC.setEventFromPrev( uint16_t delta )
+    {
+        tc_rc_t rc = CH_WAVE->rc;
+        rc.bits.rc += delta;
+        CH_WAVE->rc = rc;
+    }
+
+    async command void CompareC.setEventFromNow( uint16_t delta )
+    {
+        tc_rc_t rc = CH_WAVE->rc;
+        rc.bits.rc = CH_WAVE->cv.bits.cv + delta;
+        CH_WAVE->rc = rc;
+    }
+
+    default async event void CompareC.fired() { }
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/HplSam3TCCompare.nc b/tos/chips/cortex/m3/sam3/timer/HplSam3TCCompare.nc
new file mode 100644
index 00000000..ca50feb3
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HplSam3TCCompare.nc
@@ -0,0 +1,51 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SAM3 TC compare interface.
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3TCCompare
+{
+    async command void enable();
+    async command void disable();
+    async command bool isEnabled();
+    async command void clearPendingEvent();
+    async command uint16_t getEvent();
+    async command void setEvent( uint16_t time );
+    async command void setEventFromPrev( uint16_t delta );
+    async command void setEventFromNow( uint16_t delta );
+
+    async event void fired();
+
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/HplSam3TCEvent.nc b/tos/chips/cortex/m3/sam3/timer/HplSam3TCEvent.nc
new file mode 100644
index 00000000..dcabda07
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HplSam3TCEvent.nc
@@ -0,0 +1,41 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SAM3 TC general event interface.
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3TCEvent
+{
+    async event void fired();
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/HplSam3TCP.nc b/tos/chips/cortex/m3/sam3/timer/HplSam3TCP.nc
new file mode 100644
index 00000000..89df3aa3
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/HplSam3TCP.nc
@@ -0,0 +1,137 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Provides the functionality of the SAM3U TC. It enables and disables the
+ * whole unit and initializes the default configuration.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "sam3tchardware.h"
+
+generic module HplSam3TCP() @safe()
+{
+    provides {
+        interface Init;
+        interface HplSam3TC as TC;
+    }
+    uses {
+        interface HplSam3TCChannel as TC0;
+        interface HplSam3TCChannel as TC1;
+        interface HplSam3TCChannel as TC2;
+
+        interface HplSam3Clock as ClockConfig;
+    }
+}
+implementation
+{
+    command error_t Init.init()
+    {
+        uint32_t mck;
+
+        call TC2.setMode(TC_CMR_CAPTURE);
+
+        // check the speed of the master clock
+        mck = call ClockConfig.getMainClockSpeed(); // in kHz
+        // convert to MHz to find the right divider
+        mck = mck / 1000;
+
+        if(mck >= 128)
+            call TC2.setClockSource(TC_CMR_CLK_TC4);
+        else if (mck >= 32)
+            call TC2.setClockSource(TC_CMR_CLK_TC3);
+        else if (mck >= 8)
+            call TC2.setClockSource(TC_CMR_CLK_TC2);
+        else if (mck >= 2)
+            call TC2.setClockSource(TC_CMR_CLK_TC1);
+        else
+            call TC2.setClockSource(TC_CMR_CLK_SLOW);
+
+        call TC2.enableEvents();
+
+        return SUCCESS;
+    }
+
+  command void TC.enableTC0(){
+    call TC0.setMode(TC_CMR_CAPTURE);
+    call TC0.setClockSource(TC_CMR_CLK_SLOW);
+    call TC0.enableEvents();
+  }
+
+  command void TC.enableTC1(){
+    call TC1.setMode(TC_CMR_CAPTURE);
+    call TC1.setClockSource(TC_CMR_CLK_SLOW);
+    call TC1.enableEvents();
+  }
+
+  command void TC.enableTC2(){
+    uint32_t mck;
+    call TC2.setMode(TC_CMR_CAPTURE);
+
+    // check the speed of the master clock
+    mck = call ClockConfig.getMainClockSpeed(); // in kHz
+    // convert to MHz to find the right divider
+    mck = mck / 1000;
+
+    if(mck >= 128)
+      call TC2.setClockSource(TC_CMR_CLK_TC4);
+    else if (mck >= 32)
+      call TC2.setClockSource(TC_CMR_CLK_TC3);
+    else if (mck >= 8)
+      call TC2.setClockSource(TC_CMR_CLK_TC2);
+    else if (mck >= 2)
+      call TC2.setClockSource(TC_CMR_CLK_TC1);
+    else
+      call TC2.setClockSource(TC_CMR_CLK_SLOW);
+
+    call TC2.enableEvents();
+  }
+
+  command void TC.disableTC0(){
+    call TC0.disableEvents();
+  }
+
+  command void TC.disableTC1(){
+    call TC1.disableEvents();
+  }
+
+  command void TC.disableTC2(){
+     call TC2.disableEvents();
+  }
+
+    async event void ClockConfig.mainClockChanged() {};
+    async event void TC0.overflow() {};
+    async event void TC1.overflow() {};
+    async event void TC2.overflow() {};
+}
+
+
diff --git a/tos/chips/cortex/m3/sam3/timer/LocalTime64.nc b/tos/chips/cortex/m3/sam3/timer/LocalTime64.nc
new file mode 100644
index 00000000..f33d627d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/LocalTime64.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Timer.h"
+
+/**
+ * A LocalTime interface counts time in some units. If you need to detect
+ * time overflow, you should use a component offering the Counter
+ * interface.
+ *
+ * <p>The LocalTime interface is parameterised by its "precision"
+ * (milliseconds, microseconds, etc), identified by a type. This prevents,
+ * e.g., unintentionally mixing components expecting milliseconds with
+ * those expecting microseconds as those interfaces have a different type.
+ *
+ * <p>See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of this Counter.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+interface LocalTime64<precision_tag>
+{
+  /** 
+   * Return current time. Time starts counting at boot - some time sources
+   * may stop counting while the processor is in low-power mode.
+   *
+   * @return Current time.
+   */
+  async command uint64_t get();
+}
+
diff --git a/tos/chips/cortex/m3/sam3/timer/LocalTimeMicroC.nc b/tos/chips/cortex/m3/sam3/timer/LocalTimeMicroC.nc
new file mode 100644
index 00000000..e5356e2d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/LocalTimeMicroC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ * Author: Thomas Schmid (adapted to sam3)
+ */
+
+#include <Timer.h>
+
+configuration LocalTimeMicroC
+{
+	provides interface LocalTime<TMicro>;
+}
+
+implementation
+{
+	components CounterTMicro32C;
+	components new CounterToLocalTimeC(TMicro);
+
+	LocalTime = CounterToLocalTimeC;
+	CounterToLocalTimeC.Counter -> CounterTMicro32C;
+}
diff --git a/tos/chips/cortex/m3/sam3/timer/rtthardware.h b/tos/chips/cortex/m3/sam3/timer/rtthardware.h
new file mode 100644
index 00000000..974cb928
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/rtthardware.h
@@ -0,0 +1,80 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Real-Time Timer register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef RTTHARDWARE_H
+#define RTTHARDWARE_H
+
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint16_t rtpres    : 16; // RTT prescaler
+        uint8_t almien     :  1; // alarm interrupt enable
+        uint8_t rttincien  :  1; // RTT increment interrupt enable
+        uint8_t rttrst     :  1; // RTT restart
+        uint8_t reserved1  :  5;
+        uint8_t reserved0  :  8;
+    } bits;
+} rtt_mr_t;
+
+/* Note: Never read directly the status register since it gets reset after
+ * each read. Thus, you migh tmiss an interrupt!
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t alms       :  1; // RT alarm status
+        uint8_t rttinc     :  1; // RTT increment status
+        uint8_t reserved2  :  6;
+        uint8_t reserved1  :  8;
+        uint16_t reserved0 : 16;
+    } bits;
+} rtt_sr_t;
+
+// Real Time Timer Register definition
+typedef struct rtt 
+{
+    volatile rtt_mr_t mr;	// Real Time Mode Register
+    volatile uint32_t   ar;	// Real Time Alarm Register
+    volatile uint32_t   vr;	// Real Time Value Register
+    volatile rtt_sr_t sr;	// Real Time Status Register
+} rtt_t;
+
+#endif // RTTHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/timer/tchardware.h b/tos/chips/cortex/m3/sam3/timer/tchardware.h
new file mode 100644
index 00000000..ff0f7b67
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/timer/tchardware.h
@@ -0,0 +1,439 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Timer Counter register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef TCHARDWARE_H
+#define TCHARDWARE_H
+
+/**
+ *  TC Block Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 828
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t sync      : 1; // synchro command
+        uint32_t reserved0 : 7;
+        uint32_t reserved1 : 8;
+        uint32_t reserved2 : 8;
+    } __attribute__((packed)) bits;
+} tc_bcr_t;
+
+/**
+ *  TC Block Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 829
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t tc0xc0s    : 2; // external clock signal 0 selection
+        uint32_t tc1xc1s    : 2; // external clock signal 1 selection
+        uint32_t tc2xc2s    : 2; // external clock signal 2 selection
+        uint32_t reserved0  : 2;
+        uint32_t qden       : 1; // quadrature decoder enabled
+        uint32_t posen      : 1; // position enabled
+        uint32_t speeden    : 1; // speed enabled
+        uint32_t qdtrans    : 1; // quadrature decoding transparent
+        uint32_t edgpha     : 1; // edge on pha count mode
+        uint32_t inva       : 1; // invert pha
+        uint32_t invb       : 1; // invert phb
+        uint32_t invidx     : 1; // swap pha and phb
+        uint32_t swap       : 1; // inverted index
+        uint32_t idxphb     : 1; // index pin is phb pin
+        uint32_t reserved1  : 1;
+        uint32_t filter     : 1; // filter
+        uint32_t maxfilt    : 6; // maximum filter
+        uint32_t reserved2  : 6;
+    } __attribute__((packed)) bits;
+} tc_bmr_t;
+
+/**
+ *  TC Channel Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 831 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t clken      :  1; // counter clock enable command
+        uint32_t clkdis     :  1; // counter clock disable command
+        uint32_t swtrg      :  1; // software trigger command
+        uint32_t reserved0  :  5;
+        uint32_t reserved1  :  8;
+        uint32_t reserved2  : 16;
+    } __attribute__((packed)) bits;
+} tc_ccr_t;
+
+/**
+ *  TC QDEC Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 832 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t idx        :  1; // index
+        uint32_t dirchg     :  1; // direction change
+        uint32_t qerr       :  1; // quadrature error
+        uint32_t reserved0  :  5;
+        uint32_t reserved1  :  8;
+        uint32_t reserved2  : 16;
+    } __attribute__((packed)) bits;
+} tc_qier_t;
+
+/**
+ *  TC QDEC Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 833
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t idx        :  1; // index
+        uint32_t dirchg     :  1; // direction change
+        uint32_t qerr       :  1; // quadrature error
+        uint32_t reserved0  :  5;
+        uint32_t reserved1  :  8;
+        uint32_t reserved2  : 16;
+    } __attribute__((packed)) bits;
+} tc_qidr_t;
+
+/**
+ *  TC QDEC Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 834
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t idx        :  1; // index
+        uint32_t dirchg     :  1; // direction change
+        uint32_t qerr       :  1; // quadrature error
+        uint32_t reserved0  :  5;
+        uint32_t reserved1  :  8;
+        uint32_t reserved2  : 16;
+    } __attribute__((packed)) bits;
+} tc_qimr_t;
+
+/**
+ *  TC QDEC Interrupt Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 835 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t idx        :  1; // index
+        uint32_t dirchg     :  1; // direction change
+        uint32_t qerr       :  1; // quadrature error
+        uint32_t reserved0  :  5;
+        uint32_t dir        :  1; // direction
+        uint32_t reserved1  :  7;
+        uint32_t reserved2 : 16;
+    } __attribute__((packed)) bits;
+} tc_qisr_t;
+
+/**
+ *  TC Channel Mode Register Capture Mode, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 836
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t tcclks    : 3; // clock selection
+        uint32_t clki      : 1; // clock invert
+        uint32_t burst     : 2; // burst signal selection
+        uint32_t ldbstop   : 1; // counter clock stopped with rb loading
+        uint32_t ldbdis    : 1; // counter clock disable with rb loading
+        uint32_t etrgedg   : 1; // external trigger edge selection
+        uint32_t abetrg    : 1; // tioa or tiob external trigger selection
+        uint32_t reserved0 : 3;
+        uint32_t cpctrg    : 1; // rc compare trigger enable
+        uint32_t wave      : 1; // wave
+        uint32_t ldra      : 2; // ra loading selection
+        uint32_t ldrb      : 2; // rb loading selection
+        uint32_t reserved1 : 4;
+        uint32_t reserved2 : 8;
+    } __attribute__((packed)) bits;
+} tc_cmr_capture_t;
+
+#define TC_CMR_ETRGEDG_NONE     0 
+#define TC_CMR_ETRGEDG_RISING   1
+#define TC_CMR_ETRGEDG_FALLING  2
+#define TC_CMR_ETRGEDG_EACH     3
+
+#define TC_CMR_CAPTURE          0
+#define TC_CMR_WAVE             1
+
+#define TC_CMR_CLK_TC1          0
+#define TC_CMR_CLK_TC2          1
+#define TC_CMR_CLK_TC3          2
+#define TC_CMR_CLK_TC4          3
+#define TC_CMR_CLK_SLOW         4
+#define TC_CMR_CLK_XC0          5
+#define TC_CMR_CLK_XC1          6
+#define TC_CMR_CLK_XC2          7
+
+#define TC_CMR_ABETRG_TIOA      0
+#define TC_CMR_ABETRG_TIOB      1
+
+/**
+ *  TC Channel Mode Register Waveform Mode, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 838
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t tcclks    : 3; // clock selection
+        uint32_t clki      : 1; // clock invert
+        uint32_t burst     : 2; // burst signal selection
+        uint32_t cpcstop   : 1; // counter clock stopped with rc compare
+        uint32_t cpcdis    : 1; // counter clock disable with rc compare
+        uint32_t eevtedg   : 2; // external event edge selection
+        uint32_t eevt      : 2; // external event selection
+        uint32_t enetrg    : 1; // external event trigger enable
+        uint32_t wavsel    : 2; // waveform selection
+        uint32_t wave      : 1; // wave
+        uint32_t acpa      : 2; // ra compare effect on tioa
+        uint32_t acpc      : 2; // rc compare effect on tioa
+        uint32_t aeevt     : 2; // external event effect on tioa
+        uint32_t aswtrg    : 2; // software trigger effect on tioa
+        uint32_t bcpb      : 2; // rb compare effect on tiob
+        uint32_t bcpc      : 2; // rc compare effect on tiob
+        uint32_t beevt     : 2; // external event effect on tiob
+        uint32_t bswtrg    : 2; // software trigger effect on tiob
+    } __attribute__((packed)) bits;
+} tc_cmr_wave_t;
+
+/**
+ *  TC Counter Value Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 842 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t cv       : 16; // counter value
+        uint32_t reserved : 16;
+    } __attribute__((packed)) bits;
+} tc_cv_t;
+
+/**
+ *  TC Register A, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 842 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t ra        : 16; // register a
+        uint32_t reserved  : 16;
+    } __attribute__((packed)) bits;
+} tc_ra_t;
+
+/**
+ *  TC Register B, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 843 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t rb        : 16; // register b
+        uint32_t reserved  : 16;
+    } __attribute__((packed)) bits;
+} tc_rb_t;
+
+/**
+ *  TC Register C, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 843 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t rc        : 16; // register c
+        uint32_t reserved  : 16;
+    } __attribute__((packed)) bits;
+} tc_rc_t;
+
+/**
+ *  TC Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 844
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t covfs      : 1; // counter overflow status
+        uint32_t lovrs      : 1; // load overrun status
+        uint32_t cpas       : 1; // ra compare status
+        uint32_t cpbs       : 1; // rb compare status
+        uint32_t cpcs       : 1; // rc compare status
+        uint32_t ldras      : 1; // ra loading status
+        uint32_t ldrbs      : 1; // rb loading status
+        uint32_t etrgs      : 1; // external trigger status
+        uint32_t reserved0  : 8;
+        uint32_t clksta     : 1; // clock enable status
+        uint32_t mtioa      : 1; // tioa mirror
+        uint32_t mtiob      : 1; // tiob mirror
+        uint32_t reserved1  : 5;
+        uint32_t reserved2  : 8;
+    } __attribute__((packed)) bits;
+} tc_sr_t;
+
+/**
+ *  TC Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 846 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t covfs      : 1; // counter overflow 
+        uint32_t lovrs      : 1; // load overrun 
+        uint32_t cpas       : 1; // ra compare 
+        uint32_t cpbs       : 1; // rb compare 
+        uint32_t cpcs       : 1; // rc compare 
+        uint32_t ldras      : 1; // ra loading 
+        uint32_t ldrbs      : 1; // rb loading 
+        uint32_t etrgs      : 1; // external trigger 
+        uint32_t reserved0  : 8;
+        uint32_t reserved1  :16;
+    } __attribute__((packed)) bits;
+} tc_ier_t;
+
+/**
+ *  TC Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 847 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t covfs      : 1; // counter overflow 
+        uint32_t lovrs      : 1; // load overrun 
+        uint32_t cpas       : 1; // ra compare 
+        uint32_t cpbs       : 1; // rb compare 
+        uint32_t cpcs       : 1; // rc compare 
+        uint32_t ldras      : 1; // ra loading 
+        uint32_t ldrbs      : 1; // rb loading 
+        uint32_t etrgs      : 1; // external trigger 
+        uint32_t reserved0  : 8;
+        uint32_t reserved1  :16;
+    } __attribute__((packed)) bits;
+} tc_idr_t;
+
+/**
+ *  TC Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 848 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t covfs      : 1; // counter overflow 
+        uint32_t lovrs      : 1; // load overrun 
+        uint32_t cpas       : 1; // ra compare 
+        uint32_t cpbs       : 1; // rb compare 
+        uint32_t cpcs       : 1; // rc compare 
+        uint32_t ldras      : 1; // ra loading 
+        uint32_t ldrbs      : 1; // rb loading 
+        uint32_t etrgs      : 1; // external trigger 
+        uint32_t reserved0  : 8;
+        uint32_t reserved1  :16;
+    } __attribute__((packed)) bits;
+} tc_imr_t;
+
+/**
+ * Channel definition capture mode
+ */
+typedef struct
+{
+    volatile tc_ccr_t ccr;
+    volatile tc_cmr_capture_t cmr;
+    uint32_t reserved[2];
+    volatile tc_cv_t cv;
+    volatile tc_ra_t ra;
+    volatile tc_rb_t rb;
+    volatile tc_rc_t rc;
+    volatile tc_sr_t sr;
+    volatile tc_ier_t ier;
+    volatile tc_idr_t idr;
+    volatile tc_imr_t imr;
+} tc_channel_capture_t;
+
+/**
+ * Channel definition wave mode
+ */
+typedef struct
+{
+    volatile tc_ccr_t ccr;
+    volatile tc_cmr_wave_t cmr;
+    uint32_t reserved[2];
+    volatile tc_cv_t cv;
+    volatile tc_ra_t ra;
+    volatile tc_rb_t rb;
+    volatile tc_rc_t rc;
+    volatile tc_sr_t sr;
+    volatile tc_ier_t ier;
+    volatile tc_idr_t idr;
+    volatile tc_imr_t imr;
+} tc_channel_wave_t;
+
+#endif //TCHARDWARE_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/AT91SAM3U4.h b/tos/chips/cortex/m3/sam3/u/AT91SAM3U4.h
new file mode 100644
index 00000000..d896fae0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/AT91SAM3U4.h
@@ -0,0 +1,6868 @@
+//  ----------------------------------------------------------------------------
+//          ATMEL Microcontroller Software Support  -  ROUSSET  -
+//  ----------------------------------------------------------------------------
+//  Copyright (c) 2008, Atmel Corporation
+//  All rights reserved.
+// 
+//  Redistribution and use in source and binary forms, with or without
+//  modification, are permitted provided that the following conditions
+//  are met:
+//  - Redistributions of source code must retain the above copyright
+//    notice, this list of conditions and the following disclaimer.
+//  - Redistributions in binary form must reproduce the above copyright
+//    notice, this list of conditions and the following disclaimer in the
+//    documentation and/or other materials provided with the
+//    distribution.
+//  - Neither the name of the copyright holders nor the names of its
+//    contributors may be used to endorse or promote products derived
+//    from this software without specific prior written permission.
+// 
+//  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+//  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+//  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+//  A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+//  HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+//  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+//  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+//  AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+//  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+//  WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+//  POSSIBILITY OF SUCH DAMAGE.
+// 
+//  ----------------------------------------------------------------------------
+// File Name           : AT91SAM3U4.h
+// Object              : AT91SAM3U4 definitions
+// Generated           : AT91 SW Application Group  06/26/2009 (09:26:22)
+// 
+// CVS Reference       : /AT91SAM3U4.pl/1.38/Thu Jun  4 08:57:57 2009//
+// CVS Reference       : /SYS_SAM3U4.pl/1.4/Fri Oct 17 13:27:57 2008//
+// CVS Reference       : /HMATRIX2_SAM3U4.pl/1.5/Fri Jun 26 07:25:14 2009//
+// CVS Reference       : /PMC_SAM3U4.pl/1.7/Fri Oct 17 13:27:54 2008//
+// CVS Reference       : /EBI_SAM9260.pl/1.1/Fri Sep 30 12:12:14 2005//
+// CVS Reference       : /EFC2_SAM3U4.pl/1.3/Mon Mar  2 10:12:06 2009//
+// CVS Reference       : /HSDRAMC1_6100A.pl/1.2/Mon Aug  9 10:52:25 2004//
+// CVS Reference       : /HSMC4_xxxx.pl/1.9/Fri Oct 17 13:27:56 2008//
+// CVS Reference       : /HECC_6143A.pl/1.1/Wed Feb  9 17:16:57 2005//
+// CVS Reference       : /CORTEX_M3_NVIC.pl/1.8/Fri Jun 19 12:00:55 2009//
+// CVS Reference       : /CORTEX_M3_MPU.pl/1.3/Fri Oct 17 13:27:48 2008//
+// CVS Reference       : /CORTEX_M3.pl/1.1/Mon Sep 15 15:22:06 2008//
+// CVS Reference       : /PDC_6074C.pl/1.2/Thu Feb  3 09:02:11 2005//
+// CVS Reference       : /DBGU_SAM3U4.pl/1.3/Tue May  5 11:28:09 2009//
+// CVS Reference       : /PIO3_xxxx.pl/1.6/Mon Mar  9 10:43:37 2009//
+// CVS Reference       : /RSTC_6098A.pl/1.4/Fri Oct 17 13:27:55 2008//
+// CVS Reference       : /SHDWC_6122A.pl/1.3/Wed Oct  6 14:16:58 2004//
+// CVS Reference       : /SUPC by datasheet
+// CVS Reference       : /RTTC_6081A.pl/1.2/Thu Nov  4 13:57:22 2004//
+// CVS Reference       : /PITC_6079A.pl/1.2/Thu Nov  4 13:56:22 2004//
+// CVS Reference       : /WDTC_6080A.pl/1.3/Thu Nov  4 13:58:52 2004//
+// CVS Reference       : /TC_6082A.pl/1.8/Fri Oct 17 13:27:58 2008//
+// CVS Reference       : /MCI_6101F.pl/1.3/Fri Jan 23 09:15:32 2009//
+// CVS Reference       : /TWI_6061B.pl/1.3/Fri Oct 17 13:27:59 2008//
+// CVS Reference       : /US_6089J.pl/1.3/Fri Oct 17 13:27:59 2008//
+// CVS Reference       : /SSC_SAM3U4.pl/1.1/Thu Jun  4 09:02:35 2009//
+// CVS Reference       : /SPI2.pl/1.5/Thu Jun  4 08:58:10 2009//
+// CVS Reference       : /PWM_6343B_V400.pl/1.3/Fri Oct 17 13:27:54 2008//
+// CVS Reference       : /DMAC by datasheet
+// CVS Reference       : /UDPHS_SAM9_7ept6dma4iso.pl/1.4/Tue Jun 24 13:05:14 2008//
+// CVS Reference       : /ADC_SAM3UE.pl/1.4/Fri Feb 20 12:19:18 2009//
+// CVS Reference       : /ADC12B by datasheet
+// CVS Reference       : /RTC_1245D.pl/1.3/Fri Sep 17 14:01:31 2004//
+//  ----------------------------------------------------------------------------
+
+#ifndef AT91SAM3U4_H
+#define AT91SAM3U4_H
+
+#ifndef __ASSEMBLY__
+typedef volatile unsigned int AT91_REG;// Hardware register definition
+#define AT91_CAST(a) (a)
+#else
+#define AT91_CAST(a)
+#endif
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR System Peripherals
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_SYS {
+	AT91_REG	 HSMC4_CFG; 	// Configuration Register
+	AT91_REG	 HSMC4_CTRL; 	// Control Register
+	AT91_REG	 HSMC4_SR; 	// Status Register
+	AT91_REG	 HSMC4_IER; 	// Interrupt Enable Register
+	AT91_REG	 HSMC4_IDR; 	// Interrupt Disable Register
+	AT91_REG	 HSMC4_IMR; 	// Interrupt Mask Register
+	AT91_REG	 HSMC4_ADDR; 	// Address Cycle Zero Register
+	AT91_REG	 HSMC4_BANK; 	// Bank Register
+	AT91_REG	 HSMC4_ECCCR; 	// ECC reset register
+	AT91_REG	 HSMC4_ECCCMD; 	// ECC Page size register
+	AT91_REG	 HSMC4_ECCSR1; 	// ECC Status register 1
+	AT91_REG	 HSMC4_ECCPR0; 	// ECC Parity register 0
+	AT91_REG	 HSMC4_ECCPR1; 	// ECC Parity register 1
+	AT91_REG	 HSMC4_ECCSR2; 	// ECC Status register 2
+	AT91_REG	 HSMC4_ECCPR2; 	// ECC Parity register 2
+	AT91_REG	 HSMC4_ECCPR3; 	// ECC Parity register 3
+	AT91_REG	 HSMC4_ECCPR4; 	// ECC Parity register 4
+	AT91_REG	 HSMC4_ECCPR5; 	// ECC Parity register 5
+	AT91_REG	 HSMC4_ECCPR6; 	// ECC Parity register 6
+	AT91_REG	 HSMC4_ECCPR7; 	// ECC Parity register 7
+	AT91_REG	 HSMC4_ECCPR8; 	// ECC Parity register 8
+	AT91_REG	 HSMC4_ECCPR9; 	// ECC Parity register 9
+	AT91_REG	 HSMC4_ECCPR10; 	// ECC Parity register 10
+	AT91_REG	 HSMC4_ECCPR11; 	// ECC Parity register 11
+	AT91_REG	 HSMC4_ECCPR12; 	// ECC Parity register 12
+	AT91_REG	 HSMC4_ECCPR13; 	// ECC Parity register 13
+	AT91_REG	 HSMC4_ECCPR14; 	// ECC Parity register 14
+	AT91_REG	 HSMC4_Eccpr15; 	// ECC Parity register 15
+	AT91_REG	 Reserved0[40]; 	// 
+	AT91_REG	 HSMC4_OCMS; 	// OCMS MODE register
+	AT91_REG	 HSMC4_KEY1; 	// KEY1 Register
+	AT91_REG	 HSMC4_KEY2; 	// KEY2 Register
+	AT91_REG	 Reserved1[50]; 	// 
+	AT91_REG	 HSMC4_WPCR; 	// Write Protection Control register
+	AT91_REG	 HSMC4_WPSR; 	// Write Protection Status Register
+	AT91_REG	 HSMC4_ADDRSIZE; 	// Write Protection Status Register
+	AT91_REG	 HSMC4_IPNAME1; 	// Write Protection Status Register
+	AT91_REG	 HSMC4_IPNAME2; 	// Write Protection Status Register
+	AT91_REG	 HSMC4_FEATURES; 	// Write Protection Status Register
+	AT91_REG	 HSMC4_VER; 	// HSMC4 Version Register
+	AT91_REG	 HMATRIX_MCFG0; 	//  Master Configuration Register 0 : ARM I and D
+	AT91_REG	 HMATRIX_MCFG1; 	//  Master Configuration Register 1 : ARM S
+	AT91_REG	 HMATRIX_MCFG2; 	//  Master Configuration Register 2
+	AT91_REG	 HMATRIX_MCFG3; 	//  Master Configuration Register 3
+	AT91_REG	 HMATRIX_MCFG4; 	//  Master Configuration Register 4
+	AT91_REG	 HMATRIX_MCFG5; 	//  Master Configuration Register 5
+	AT91_REG	 HMATRIX_MCFG6; 	//  Master Configuration Register 6
+	AT91_REG	 HMATRIX_MCFG7; 	//  Master Configuration Register 7
+	AT91_REG	 Reserved2[8]; 	// 
+	AT91_REG	 HMATRIX_SCFG0; 	//  Slave Configuration Register 0
+	AT91_REG	 HMATRIX_SCFG1; 	//  Slave Configuration Register 1
+	AT91_REG	 HMATRIX_SCFG2; 	//  Slave Configuration Register 2
+	AT91_REG	 HMATRIX_SCFG3; 	//  Slave Configuration Register 3
+	AT91_REG	 HMATRIX_SCFG4; 	//  Slave Configuration Register 4
+	AT91_REG	 HMATRIX_SCFG5; 	//  Slave Configuration Register 5
+	AT91_REG	 HMATRIX_SCFG6; 	//  Slave Configuration Register 6
+	AT91_REG	 HMATRIX_SCFG7; 	//  Slave Configuration Register 5
+	AT91_REG	 HMATRIX_SCFG8; 	//  Slave Configuration Register 8
+	AT91_REG	 HMATRIX_SCFG9; 	//  Slave Configuration Register 9
+	AT91_REG	 Reserved3[42]; 	// 
+	AT91_REG	 HMATRIX_SFR0 ; 	//  Special Function Register 0
+	AT91_REG	 HMATRIX_SFR1 ; 	//  Special Function Register 1
+	AT91_REG	 HMATRIX_SFR2 ; 	//  Special Function Register 2
+	AT91_REG	 HMATRIX_SFR3 ; 	//  Special Function Register 3
+	AT91_REG	 HMATRIX_SFR4 ; 	//  Special Function Register 4
+	AT91_REG	 HMATRIX_SFR5 ; 	//  Special Function Register 5
+	AT91_REG	 HMATRIX_SFR6 ; 	//  Special Function Register 6
+	AT91_REG	 HMATRIX_SFR7 ; 	//  Special Function Register 7
+	AT91_REG	 HMATRIX_SFR8 ; 	//  Special Function Register 8
+	AT91_REG	 HMATRIX_SFR9 ; 	//  Special Function Register 9
+	AT91_REG	 HMATRIX_SFR10; 	//  Special Function Register 10
+	AT91_REG	 HMATRIX_SFR11; 	//  Special Function Register 11
+	AT91_REG	 HMATRIX_SFR12; 	//  Special Function Register 12
+	AT91_REG	 HMATRIX_SFR13; 	//  Special Function Register 13
+	AT91_REG	 HMATRIX_SFR14; 	//  Special Function Register 14
+	AT91_REG	 HMATRIX_SFR15; 	//  Special Function Register 15
+	AT91_REG	 Reserved4[39]; 	// 
+	AT91_REG	 HMATRIX_ADDRSIZE; 	// HMATRIX2 ADDRSIZE REGISTER 
+	AT91_REG	 HMATRIX_IPNAME1; 	// HMATRIX2 IPNAME1 REGISTER 
+	AT91_REG	 HMATRIX_IPNAME2; 	// HMATRIX2 IPNAME2 REGISTER 
+	AT91_REG	 HMATRIX_FEATURES; 	// HMATRIX2 FEATURES REGISTER 
+	AT91_REG	 HMATRIX_VER; 	// HMATRIX2 VERSION REGISTER 
+	AT91_REG	 PMC_SCER; 	// System Clock Enable Register
+	AT91_REG	 PMC_SCDR; 	// System Clock Disable Register
+	AT91_REG	 PMC_SCSR; 	// System Clock Status Register
+	AT91_REG	 Reserved5[1]; 	// 
+	AT91_REG	 PMC_PCER; 	// Peripheral Clock Enable Register
+	AT91_REG	 PMC_PCDR; 	// Peripheral Clock Disable Register
+	AT91_REG	 PMC_PCSR; 	// Peripheral Clock Status Register
+	AT91_REG	 PMC_UCKR; 	// UTMI Clock Configuration Register
+	AT91_REG	 PMC_MOR; 	// Main Oscillator Register
+	AT91_REG	 PMC_MCFR; 	// Main Clock  Frequency Register
+	AT91_REG	 PMC_PLLAR; 	// PLL Register
+	AT91_REG	 Reserved6[1]; 	// 
+	AT91_REG	 PMC_MCKR; 	// Master Clock Register
+	AT91_REG	 Reserved7[3]; 	// 
+	AT91_REG	 PMC_PCKR[8]; 	// Programmable Clock Register
+	AT91_REG	 PMC_IER; 	// Interrupt Enable Register
+	AT91_REG	 PMC_IDR; 	// Interrupt Disable Register
+	AT91_REG	 PMC_SR; 	// Status Register
+	AT91_REG	 PMC_IMR; 	// Interrupt Mask Register
+	AT91_REG	 PMC_FSMR; 	// Fast Startup Mode Register
+	AT91_REG	 PMC_FSPR; 	// Fast Startup Polarity Register
+	AT91_REG	 PMC_FOCR; 	// Fault Output Clear Register
+	AT91_REG	 Reserved8[28]; 	// 
+	AT91_REG	 PMC_ADDRSIZE; 	// PMC ADDRSIZE REGISTER 
+	AT91_REG	 PMC_IPNAME1; 	// PMC IPNAME1 REGISTER 
+	AT91_REG	 PMC_IPNAME2; 	// PMC IPNAME2 REGISTER 
+	AT91_REG	 PMC_FEATURES; 	// PMC FEATURES REGISTER 
+	AT91_REG	 PMC_VER; 	// APMC VERSION REGISTER
+	AT91_REG	 Reserved9[64]; 	// 
+	AT91_REG	 DBGU_CR; 	// Control Register
+	AT91_REG	 DBGU_MR; 	// Mode Register
+	AT91_REG	 DBGU_IER; 	// Interrupt Enable Register
+	AT91_REG	 DBGU_IDR; 	// Interrupt Disable Register
+	AT91_REG	 DBGU_IMR; 	// Interrupt Mask Register
+	AT91_REG	 DBGU_CSR; 	// Channel Status Register
+	AT91_REG	 DBGU_RHR; 	// Receiver Holding Register
+	AT91_REG	 DBGU_THR; 	// Transmitter Holding Register
+	AT91_REG	 DBGU_BRGR; 	// Baud Rate Generator Register
+	AT91_REG	 Reserved10[9]; 	// 
+	AT91_REG	 DBGU_FNTR; 	// Force NTRST Register
+	AT91_REG	 Reserved11[40]; 	// 
+	AT91_REG	 DBGU_ADDRSIZE; 	// DBGU ADDRSIZE REGISTER 
+	AT91_REG	 DBGU_IPNAME1; 	// DBGU IPNAME1 REGISTER 
+	AT91_REG	 DBGU_IPNAME2; 	// DBGU IPNAME2 REGISTER 
+	AT91_REG	 DBGU_FEATURES; 	// DBGU FEATURES REGISTER 
+	AT91_REG	 DBGU_VER; 	// DBGU VERSION REGISTER 
+	AT91_REG	 DBGU_RPR; 	// Receive Pointer Register
+	AT91_REG	 DBGU_RCR; 	// Receive Counter Register
+	AT91_REG	 DBGU_TPR; 	// Transmit Pointer Register
+	AT91_REG	 DBGU_TCR; 	// Transmit Counter Register
+	AT91_REG	 DBGU_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 DBGU_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 DBGU_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 DBGU_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 DBGU_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 DBGU_PTSR; 	// PDC Transfer Status Register
+	AT91_REG	 Reserved12[6]; 	// 
+	AT91_REG	 DBGU_CIDR; 	// Chip ID Register
+	AT91_REG	 DBGU_EXID; 	// Chip ID Extension Register
+	AT91_REG	 Reserved13[46]; 	// 
+	AT91_REG	 EFC0_FMR; 	// EFC Flash Mode Register
+	AT91_REG	 EFC0_FCR; 	// EFC Flash Command Register
+	AT91_REG	 EFC0_FSR; 	// EFC Flash Status Register
+	AT91_REG	 EFC0_FRR; 	// EFC Flash Result Register
+	AT91_REG	 Reserved14[1]; 	// 
+	AT91_REG	 EFC0_FVR; 	// EFC Flash Version Register
+	AT91_REG	 Reserved15[122]; 	// 
+	AT91_REG	 EFC1_FMR; 	// EFC Flash Mode Register
+	AT91_REG	 EFC1_FCR; 	// EFC Flash Command Register
+	AT91_REG	 EFC1_FSR; 	// EFC Flash Status Register
+	AT91_REG	 EFC1_FRR; 	// EFC Flash Result Register
+	AT91_REG	 Reserved16[1]; 	// 
+	AT91_REG	 EFC1_FVR; 	// EFC Flash Version Register
+	AT91_REG	 Reserved17[122]; 	// 
+	AT91_REG	 PIOA_PER; 	// PIO Enable Register
+	AT91_REG	 PIOA_PDR; 	// PIO Disable Register
+	AT91_REG	 PIOA_PSR; 	// PIO Status Register
+	AT91_REG	 Reserved18[1]; 	// 
+	AT91_REG	 PIOA_OER; 	// Output Enable Register
+	AT91_REG	 PIOA_ODR; 	// Output Disable Registerr
+	AT91_REG	 PIOA_OSR; 	// Output Status Register
+	AT91_REG	 Reserved19[1]; 	// 
+	AT91_REG	 PIOA_IFER; 	// Input Filter Enable Register
+	AT91_REG	 PIOA_IFDR; 	// Input Filter Disable Register
+	AT91_REG	 PIOA_IFSR; 	// Input Filter Status Register
+	AT91_REG	 Reserved20[1]; 	// 
+	AT91_REG	 PIOA_SODR; 	// Set Output Data Register
+	AT91_REG	 PIOA_CODR; 	// Clear Output Data Register
+	AT91_REG	 PIOA_ODSR; 	// Output Data Status Register
+	AT91_REG	 PIOA_PDSR; 	// Pin Data Status Register
+	AT91_REG	 PIOA_IER; 	// Interrupt Enable Register
+	AT91_REG	 PIOA_IDR; 	// Interrupt Disable Register
+	AT91_REG	 PIOA_IMR; 	// Interrupt Mask Register
+	AT91_REG	 PIOA_ISR; 	// Interrupt Status Register
+	AT91_REG	 PIOA_MDER; 	// Multi-driver Enable Register
+	AT91_REG	 PIOA_MDDR; 	// Multi-driver Disable Register
+	AT91_REG	 PIOA_MDSR; 	// Multi-driver Status Register
+	AT91_REG	 Reserved21[1]; 	// 
+	AT91_REG	 PIOA_PPUDR; 	// Pull-up Disable Register
+	AT91_REG	 PIOA_PPUER; 	// Pull-up Enable Register
+	AT91_REG	 PIOA_PPUSR; 	// Pull-up Status Register
+	AT91_REG	 Reserved22[1]; 	// 
+	AT91_REG	 PIOA_ABSR; 	// Peripheral AB Select Register
+	AT91_REG	 Reserved23[3]; 	// 
+	AT91_REG	 PIOA_SCIFSR; 	// System Clock Glitch Input Filter Select Register
+	AT91_REG	 PIOA_DIFSR; 	// Debouncing Input Filter Select Register
+	AT91_REG	 PIOA_IFDGSR; 	// Glitch or Debouncing Input Filter Clock Selection Status Register
+	AT91_REG	 PIOA_SCDR; 	// Slow Clock Divider Debouncing Register
+	AT91_REG	 Reserved24[4]; 	// 
+	AT91_REG	 PIOA_OWER; 	// Output Write Enable Register
+	AT91_REG	 PIOA_OWDR; 	// Output Write Disable Register
+	AT91_REG	 PIOA_OWSR; 	// Output Write Status Register
+	AT91_REG	 Reserved25[1]; 	// 
+	AT91_REG	 PIOA_AIMER; 	// Additional Interrupt Modes Enable Register
+	AT91_REG	 PIOA_AIMDR; 	// Additional Interrupt Modes Disables Register
+	AT91_REG	 PIOA_AIMMR; 	// Additional Interrupt Modes Mask Register
+	AT91_REG	 Reserved26[1]; 	// 
+	AT91_REG	 PIOA_ESR; 	// Edge Select Register
+	AT91_REG	 PIOA_LSR; 	// Level Select Register
+	AT91_REG	 PIOA_ELSR; 	// Edge/Level Status Register
+	AT91_REG	 Reserved27[1]; 	// 
+	AT91_REG	 PIOA_FELLSR; 	// Falling Edge/Low Level Select Register
+	AT91_REG	 PIOA_REHLSR; 	// Rising Edge/ High Level Select Register
+	AT91_REG	 PIOA_FRLHSR; 	// Fall/Rise - Low/High Status Register
+	AT91_REG	 Reserved28[1]; 	// 
+	AT91_REG	 PIOA_LOCKSR; 	// Lock Status Register
+	AT91_REG	 Reserved29[6]; 	// 
+	AT91_REG	 PIOA_VER; 	// PIO VERSION REGISTER 
+	AT91_REG	 Reserved30[8]; 	// 
+	AT91_REG	 PIOA_KER; 	// Keypad Controller Enable Register
+	AT91_REG	 PIOA_KRCR; 	// Keypad Controller Row Column Register
+	AT91_REG	 PIOA_KDR; 	// Keypad Controller Debouncing Register
+	AT91_REG	 Reserved31[1]; 	// 
+	AT91_REG	 PIOA_KIER; 	// Keypad Controller Interrupt Enable Register
+	AT91_REG	 PIOA_KIDR; 	// Keypad Controller Interrupt Disable Register
+	AT91_REG	 PIOA_KIMR; 	// Keypad Controller Interrupt Mask Register
+	AT91_REG	 PIOA_KSR; 	// Keypad Controller Status Register
+	AT91_REG	 PIOA_KKPR; 	// Keypad Controller Key Press Register
+	AT91_REG	 PIOA_KKRR; 	// Keypad Controller Key Release Register
+	AT91_REG	 Reserved32[46]; 	// 
+	AT91_REG	 PIOB_PER; 	// PIO Enable Register
+	AT91_REG	 PIOB_PDR; 	// PIO Disable Register
+	AT91_REG	 PIOB_PSR; 	// PIO Status Register
+	AT91_REG	 Reserved33[1]; 	// 
+	AT91_REG	 PIOB_OER; 	// Output Enable Register
+	AT91_REG	 PIOB_ODR; 	// Output Disable Registerr
+	AT91_REG	 PIOB_OSR; 	// Output Status Register
+	AT91_REG	 Reserved34[1]; 	// 
+	AT91_REG	 PIOB_IFER; 	// Input Filter Enable Register
+	AT91_REG	 PIOB_IFDR; 	// Input Filter Disable Register
+	AT91_REG	 PIOB_IFSR; 	// Input Filter Status Register
+	AT91_REG	 Reserved35[1]; 	// 
+	AT91_REG	 PIOB_SODR; 	// Set Output Data Register
+	AT91_REG	 PIOB_CODR; 	// Clear Output Data Register
+	AT91_REG	 PIOB_ODSR; 	// Output Data Status Register
+	AT91_REG	 PIOB_PDSR; 	// Pin Data Status Register
+	AT91_REG	 PIOB_IER; 	// Interrupt Enable Register
+	AT91_REG	 PIOB_IDR; 	// Interrupt Disable Register
+	AT91_REG	 PIOB_IMR; 	// Interrupt Mask Register
+	AT91_REG	 PIOB_ISR; 	// Interrupt Status Register
+	AT91_REG	 PIOB_MDER; 	// Multi-driver Enable Register
+	AT91_REG	 PIOB_MDDR; 	// Multi-driver Disable Register
+	AT91_REG	 PIOB_MDSR; 	// Multi-driver Status Register
+	AT91_REG	 Reserved36[1]; 	// 
+	AT91_REG	 PIOB_PPUDR; 	// Pull-up Disable Register
+	AT91_REG	 PIOB_PPUER; 	// Pull-up Enable Register
+	AT91_REG	 PIOB_PPUSR; 	// Pull-up Status Register
+	AT91_REG	 Reserved37[1]; 	// 
+	AT91_REG	 PIOB_ABSR; 	// Peripheral AB Select Register
+	AT91_REG	 Reserved38[3]; 	// 
+	AT91_REG	 PIOB_SCIFSR; 	// System Clock Glitch Input Filter Select Register
+	AT91_REG	 PIOB_DIFSR; 	// Debouncing Input Filter Select Register
+	AT91_REG	 PIOB_IFDGSR; 	// Glitch or Debouncing Input Filter Clock Selection Status Register
+	AT91_REG	 PIOB_SCDR; 	// Slow Clock Divider Debouncing Register
+	AT91_REG	 Reserved39[4]; 	// 
+	AT91_REG	 PIOB_OWER; 	// Output Write Enable Register
+	AT91_REG	 PIOB_OWDR; 	// Output Write Disable Register
+	AT91_REG	 PIOB_OWSR; 	// Output Write Status Register
+	AT91_REG	 Reserved40[1]; 	// 
+	AT91_REG	 PIOB_AIMER; 	// Additional Interrupt Modes Enable Register
+	AT91_REG	 PIOB_AIMDR; 	// Additional Interrupt Modes Disables Register
+	AT91_REG	 PIOB_AIMMR; 	// Additional Interrupt Modes Mask Register
+	AT91_REG	 Reserved41[1]; 	// 
+	AT91_REG	 PIOB_ESR; 	// Edge Select Register
+	AT91_REG	 PIOB_LSR; 	// Level Select Register
+	AT91_REG	 PIOB_ELSR; 	// Edge/Level Status Register
+	AT91_REG	 Reserved42[1]; 	// 
+	AT91_REG	 PIOB_FELLSR; 	// Falling Edge/Low Level Select Register
+	AT91_REG	 PIOB_REHLSR; 	// Rising Edge/ High Level Select Register
+	AT91_REG	 PIOB_FRLHSR; 	// Fall/Rise - Low/High Status Register
+	AT91_REG	 Reserved43[1]; 	// 
+	AT91_REG	 PIOB_LOCKSR; 	// Lock Status Register
+	AT91_REG	 Reserved44[6]; 	// 
+	AT91_REG	 PIOB_VER; 	// PIO VERSION REGISTER 
+	AT91_REG	 Reserved45[8]; 	// 
+	AT91_REG	 PIOB_KER; 	// Keypad Controller Enable Register
+	AT91_REG	 PIOB_KRCR; 	// Keypad Controller Row Column Register
+	AT91_REG	 PIOB_KDR; 	// Keypad Controller Debouncing Register
+	AT91_REG	 Reserved46[1]; 	// 
+	AT91_REG	 PIOB_KIER; 	// Keypad Controller Interrupt Enable Register
+	AT91_REG	 PIOB_KIDR; 	// Keypad Controller Interrupt Disable Register
+	AT91_REG	 PIOB_KIMR; 	// Keypad Controller Interrupt Mask Register
+	AT91_REG	 PIOB_KSR; 	// Keypad Controller Status Register
+	AT91_REG	 PIOB_KKPR; 	// Keypad Controller Key Press Register
+	AT91_REG	 PIOB_KKRR; 	// Keypad Controller Key Release Register
+	AT91_REG	 Reserved47[46]; 	// 
+	AT91_REG	 PIOC_PER; 	// PIO Enable Register
+	AT91_REG	 PIOC_PDR; 	// PIO Disable Register
+	AT91_REG	 PIOC_PSR; 	// PIO Status Register
+	AT91_REG	 Reserved48[1]; 	// 
+	AT91_REG	 PIOC_OER; 	// Output Enable Register
+	AT91_REG	 PIOC_ODR; 	// Output Disable Registerr
+	AT91_REG	 PIOC_OSR; 	// Output Status Register
+	AT91_REG	 Reserved49[1]; 	// 
+	AT91_REG	 PIOC_IFER; 	// Input Filter Enable Register
+	AT91_REG	 PIOC_IFDR; 	// Input Filter Disable Register
+	AT91_REG	 PIOC_IFSR; 	// Input Filter Status Register
+	AT91_REG	 Reserved50[1]; 	// 
+	AT91_REG	 PIOC_SODR; 	// Set Output Data Register
+	AT91_REG	 PIOC_CODR; 	// Clear Output Data Register
+	AT91_REG	 PIOC_ODSR; 	// Output Data Status Register
+	AT91_REG	 PIOC_PDSR; 	// Pin Data Status Register
+	AT91_REG	 PIOC_IER; 	// Interrupt Enable Register
+	AT91_REG	 PIOC_IDR; 	// Interrupt Disable Register
+	AT91_REG	 PIOC_IMR; 	// Interrupt Mask Register
+	AT91_REG	 PIOC_ISR; 	// Interrupt Status Register
+	AT91_REG	 PIOC_MDER; 	// Multi-driver Enable Register
+	AT91_REG	 PIOC_MDDR; 	// Multi-driver Disable Register
+	AT91_REG	 PIOC_MDSR; 	// Multi-driver Status Register
+	AT91_REG	 Reserved51[1]; 	// 
+	AT91_REG	 PIOC_PPUDR; 	// Pull-up Disable Register
+	AT91_REG	 PIOC_PPUER; 	// Pull-up Enable Register
+	AT91_REG	 PIOC_PPUSR; 	// Pull-up Status Register
+	AT91_REG	 Reserved52[1]; 	// 
+	AT91_REG	 PIOC_ABSR; 	// Peripheral AB Select Register
+	AT91_REG	 Reserved53[3]; 	// 
+	AT91_REG	 PIOC_SCIFSR; 	// System Clock Glitch Input Filter Select Register
+	AT91_REG	 PIOC_DIFSR; 	// Debouncing Input Filter Select Register
+	AT91_REG	 PIOC_IFDGSR; 	// Glitch or Debouncing Input Filter Clock Selection Status Register
+	AT91_REG	 PIOC_SCDR; 	// Slow Clock Divider Debouncing Register
+	AT91_REG	 Reserved54[4]; 	// 
+	AT91_REG	 PIOC_OWER; 	// Output Write Enable Register
+	AT91_REG	 PIOC_OWDR; 	// Output Write Disable Register
+	AT91_REG	 PIOC_OWSR; 	// Output Write Status Register
+	AT91_REG	 Reserved55[1]; 	// 
+	AT91_REG	 PIOC_AIMER; 	// Additional Interrupt Modes Enable Register
+	AT91_REG	 PIOC_AIMDR; 	// Additional Interrupt Modes Disables Register
+	AT91_REG	 PIOC_AIMMR; 	// Additional Interrupt Modes Mask Register
+	AT91_REG	 Reserved56[1]; 	// 
+	AT91_REG	 PIOC_ESR; 	// Edge Select Register
+	AT91_REG	 PIOC_LSR; 	// Level Select Register
+	AT91_REG	 PIOC_ELSR; 	// Edge/Level Status Register
+	AT91_REG	 Reserved57[1]; 	// 
+	AT91_REG	 PIOC_FELLSR; 	// Falling Edge/Low Level Select Register
+	AT91_REG	 PIOC_REHLSR; 	// Rising Edge/ High Level Select Register
+	AT91_REG	 PIOC_FRLHSR; 	// Fall/Rise - Low/High Status Register
+	AT91_REG	 Reserved58[1]; 	// 
+	AT91_REG	 PIOC_LOCKSR; 	// Lock Status Register
+	AT91_REG	 Reserved59[6]; 	// 
+	AT91_REG	 PIOC_VER; 	// PIO VERSION REGISTER 
+	AT91_REG	 Reserved60[8]; 	// 
+	AT91_REG	 PIOC_KER; 	// Keypad Controller Enable Register
+	AT91_REG	 PIOC_KRCR; 	// Keypad Controller Row Column Register
+	AT91_REG	 PIOC_KDR; 	// Keypad Controller Debouncing Register
+	AT91_REG	 Reserved61[1]; 	// 
+	AT91_REG	 PIOC_KIER; 	// Keypad Controller Interrupt Enable Register
+	AT91_REG	 PIOC_KIDR; 	// Keypad Controller Interrupt Disable Register
+	AT91_REG	 PIOC_KIMR; 	// Keypad Controller Interrupt Mask Register
+	AT91_REG	 PIOC_KSR; 	// Keypad Controller Status Register
+	AT91_REG	 PIOC_KKPR; 	// Keypad Controller Key Press Register
+	AT91_REG	 PIOC_KKRR; 	// Keypad Controller Key Release Register
+	AT91_REG	 Reserved62[46]; 	// 
+	AT91_REG	 RSTC_RCR; 	// Reset Control Register
+	AT91_REG	 RSTC_RSR; 	// Reset Status Register
+	AT91_REG	 RSTC_RMR; 	// Reset Mode Register
+	AT91_REG	 Reserved63[1]; 	// 
+    AT91_REG SUPC_CR;   // Supply Controller Control Register
+    AT91_REG SUPC_SMMR; // Supply Controller Supply Monitor Mode Register
+    AT91_REG SUPC_MR;   // Supply Controller Mode Register
+    AT91_REG SUPC_WUMR; // Supply Controller Wake Up Mode Register
+    AT91_REG SUPC_WUIR; // Supply Controller Wake Up Inputs Register
+    AT91_REG SUPC_SR;   // Supply Controller Status Register
+	AT91_REG	 Reserved64[2]; 	// 
+	AT91_REG	 RTTC_RTMR; 	// Real-time Mode Register
+	AT91_REG	 RTTC_RTAR; 	// Real-time Alarm Register
+	AT91_REG	 RTTC_RTVR; 	// Real-time Value Register
+	AT91_REG	 RTTC_RTSR; 	// Real-time Status Register
+	AT91_REG	 Reserved65[4]; 	// 
+	AT91_REG	 WDTC_WDCR; 	// Watchdog Control Register
+	AT91_REG	 WDTC_WDMR; 	// Watchdog Mode Register
+	AT91_REG	 WDTC_WDSR; 	// Watchdog Status Register
+	AT91_REG	 Reserved66[1]; 	// 
+	AT91_REG	 RTC_CR; 	// Control Register
+	AT91_REG	 RTC_MR; 	// Mode Register
+	AT91_REG	 RTC_TIMR; 	// Time Register
+	AT91_REG	 RTC_CALR; 	// Calendar Register
+	AT91_REG	 RTC_TIMALR; 	// Time Alarm Register
+	AT91_REG	 RTC_CALALR; 	// Calendar Alarm Register
+	AT91_REG	 RTC_SR; 	// Status Register
+	AT91_REG	 RTC_SCCR; 	// Status Clear Command Register
+	AT91_REG	 RTC_IER; 	// Interrupt Enable Register
+	AT91_REG	 RTC_IDR; 	// Interrupt Disable Register
+	AT91_REG	 RTC_IMR; 	// Interrupt Mask Register
+	AT91_REG	 RTC_VER; 	// Valid Entry Register
+	AT91_REG	 SYS_GPBR[8]; 	// General Purpose Register
+	AT91_REG	 Reserved67[19]; 	// 
+	AT91_REG	 RSTC_VER; 	// Version Register
+} AT91S_SYS, *AT91PS_SYS;
+#else
+#define GPBR            (AT91_CAST(AT91_REG *) 	0x00001290) // (GPBR) General Purpose Register
+
+#endif
+// -------- GPBR : (SYS Offset: 0x1290) GPBR General Purpose Register -------- 
+#define AT91C_GPBR_GPRV       (0x0 <<  0) // (SYS) General Purpose Register Value
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR HSMC4 Chip Select interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_HSMC4_CS {
+	AT91_REG	 HSMC4_SETUP; 	// Setup Register
+	AT91_REG	 HSMC4_PULSE; 	// Pulse Register
+	AT91_REG	 HSMC4_CYCLE; 	// Cycle Register
+	AT91_REG	 HSMC4_TIMINGS; 	// Timmings Register
+	AT91_REG	 HSMC4_MODE; 	// Mode Register
+} AT91S_HSMC4_CS, *AT91PS_HSMC4_CS;
+#else
+#define HSMC4_SETUP     (AT91_CAST(AT91_REG *) 	0x00000000) // (HSMC4_SETUP) Setup Register
+#define HSMC4_PULSE     (AT91_CAST(AT91_REG *) 	0x00000004) // (HSMC4_PULSE) Pulse Register
+#define HSMC4_CYCLE     (AT91_CAST(AT91_REG *) 	0x00000008) // (HSMC4_CYCLE) Cycle Register
+#define HSMC4_TIMINGS   (AT91_CAST(AT91_REG *) 	0x0000000C) // (HSMC4_TIMINGS) Timmings Register
+#define HSMC4_MODE      (AT91_CAST(AT91_REG *) 	0x00000010) // (HSMC4_MODE) Mode Register
+
+#endif
+// -------- HSMC4_SETUP : (HSMC4_CS Offset: 0x0) HSMC4 SETUP -------- 
+#define AT91C_HSMC4_NWE_SETUP (0x3F <<  0) // (HSMC4_CS) NWE Setup length
+#define AT91C_HSMC4_NCS_WR_SETUP (0x3F <<  8) // (HSMC4_CS) NCS Setup length in Write access
+#define AT91C_HSMC4_NRD_SETUP (0x3F << 16) // (HSMC4_CS) NRD Setup length
+#define AT91C_HSMC4_NCS_RD_SETUP (0x3F << 24) // (HSMC4_CS) NCS Setup legnth in Read access
+// -------- HSMC4_PULSE : (HSMC4_CS Offset: 0x4) HSMC4 PULSE -------- 
+#define AT91C_HSMC4_NWE_PULSE (0x3F <<  0) // (HSMC4_CS) NWE Pulse Length
+#define AT91C_HSMC4_NCS_WR_PULSE (0x3F <<  8) // (HSMC4_CS) NCS Pulse length in WRITE access
+#define AT91C_HSMC4_NRD_PULSE (0x3F << 16) // (HSMC4_CS) NRD Pulse length
+#define AT91C_HSMC4_NCS_RD_PULSE (0x3F << 24) // (HSMC4_CS) NCS Pulse length in READ access
+// -------- HSMC4_CYCLE : (HSMC4_CS Offset: 0x8) HSMC4 CYCLE -------- 
+#define AT91C_HSMC4_NWE_CYCLE (0x1FF <<  0) // (HSMC4_CS) Total Write Cycle Length
+#define AT91C_HSMC4_NRD_CYCLE (0x1FF << 16) // (HSMC4_CS) Total Read Cycle Length
+// -------- HSMC4_TIMINGS : (HSMC4_CS Offset: 0xc) HSMC4 TIMINGS -------- 
+#define AT91C_HSMC4_TCLR      (0xF <<  0) // (HSMC4_CS) CLE to REN low delay
+#define AT91C_HSMC4_TADL      (0xF <<  4) // (HSMC4_CS) ALE to data start
+#define AT91C_HSMC4_TAR       (0xF <<  8) // (HSMC4_CS) ALE to REN low delay
+#define AT91C_HSMC4_OCMSEN    (0x1 << 12) // (HSMC4_CS) Off Chip Memory Scrambling Enable
+#define AT91C_HSMC4_TRR       (0xF << 16) // (HSMC4_CS) Ready to REN low delay
+#define AT91C_HSMC4_TWB       (0xF << 24) // (HSMC4_CS) WEN high to REN to busy
+#define AT91C_HSMC4_RBNSEL    (0x7 << 28) // (HSMC4_CS) Ready/Busy Line Selection
+#define AT91C_HSMC4_NFSEL     (0x1 << 31) // (HSMC4_CS) Nand Flash Selection
+// -------- HSMC4_MODE : (HSMC4_CS Offset: 0x10) HSMC4 MODE -------- 
+#define AT91C_HSMC4_READ_MODE (0x1 <<  0) // (HSMC4_CS) Read Mode
+#define AT91C_HSMC4_WRITE_MODE (0x1 <<  1) // (HSMC4_CS) Write Mode
+#define AT91C_HSMC4_EXNW_MODE (0x3 <<  4) // (HSMC4_CS) NWAIT Mode
+#define 	AT91C_HSMC4_EXNW_MODE_NWAIT_DISABLE        (0x0 <<  4) // (HSMC4_CS) External NWAIT disabled.
+#define 	AT91C_HSMC4_EXNW_MODE_NWAIT_ENABLE_FROZEN  (0x2 <<  4) // (HSMC4_CS) External NWAIT enabled in frozen mode.
+#define 	AT91C_HSMC4_EXNW_MODE_NWAIT_ENABLE_READY   (0x3 <<  4) // (HSMC4_CS) External NWAIT enabled in ready mode.
+#define AT91C_HSMC4_BAT       (0x1 <<  8) // (HSMC4_CS) Byte Access Type
+#define 	AT91C_HSMC4_BAT_BYTE_SELECT          (0x0 <<  8) // (HSMC4_CS) Write controled by ncs, nbs0, nbs1, nbs2, nbs3. Read controled by ncs, nrd, nbs0, nbs1, nbs2, nbs3.
+#define 	AT91C_HSMC4_BAT_BYTE_WRITE           (0x1 <<  8) // (HSMC4_CS) Write controled by ncs, nwe0, nwe1, nwe2, nwe3. Read controled by ncs and nrd.
+#define AT91C_HSMC4_DBW       (0x3 << 12) // (HSMC4_CS) Data Bus Width
+#define 	AT91C_HSMC4_DBW_WIDTH_EIGTH_BITS     (0x0 << 12) // (HSMC4_CS) 8 bits.
+#define 	AT91C_HSMC4_DBW_WIDTH_SIXTEEN_BITS   (0x1 << 12) // (HSMC4_CS) 16 bits.
+#define 	AT91C_HSMC4_DBW_WIDTH_THIRTY_TWO_BITS (0x2 << 12) // (HSMC4_CS) 32 bits.
+#define AT91C_HSMC4_TDF_CYCLES (0xF << 16) // (HSMC4_CS) Data Float Time.
+#define AT91C_HSMC4_TDF_MODE  (0x1 << 20) // (HSMC4_CS) TDF Enabled.
+#define AT91C_HSMC4_PMEN      (0x1 << 24) // (HSMC4_CS) Page Mode Enabled.
+#define AT91C_HSMC4_PS        (0x3 << 28) // (HSMC4_CS) Page Size
+#define 	AT91C_HSMC4_PS_SIZE_FOUR_BYTES      (0x0 << 28) // (HSMC4_CS) 4 bytes.
+#define 	AT91C_HSMC4_PS_SIZE_EIGHT_BYTES     (0x1 << 28) // (HSMC4_CS) 8 bytes.
+#define 	AT91C_HSMC4_PS_SIZE_SIXTEEN_BYTES   (0x2 << 28) // (HSMC4_CS) 16 bytes.
+#define 	AT91C_HSMC4_PS_SIZE_THIRTY_TWO_BYTES (0x3 << 28) // (HSMC4_CS) 32 bytes.
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR AHB Static Memory Controller 4 Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_HSMC4 {
+	AT91_REG	 HSMC4_CFG; 	// Configuration Register
+	AT91_REG	 HSMC4_CTRL; 	// Control Register
+	AT91_REG	 HSMC4_SR; 	// Status Register
+	AT91_REG	 HSMC4_IER; 	// Interrupt Enable Register
+	AT91_REG	 HSMC4_IDR; 	// Interrupt Disable Register
+	AT91_REG	 HSMC4_IMR; 	// Interrupt Mask Register
+	AT91_REG	 HSMC4_ADDR; 	// Address Cycle Zero Register
+	AT91_REG	 HSMC4_BANK; 	// Bank Register
+	AT91_REG	 HSMC4_ECCCR; 	// ECC reset register
+	AT91_REG	 HSMC4_ECCCMD; 	// ECC Page size register
+	AT91_REG	 HSMC4_ECCSR1; 	// ECC Status register 1
+	AT91_REG	 HSMC4_ECCPR0; 	// ECC Parity register 0
+	AT91_REG	 HSMC4_ECCPR1; 	// ECC Parity register 1
+	AT91_REG	 HSMC4_ECCSR2; 	// ECC Status register 2
+	AT91_REG	 HSMC4_ECCPR2; 	// ECC Parity register 2
+	AT91_REG	 HSMC4_ECCPR3; 	// ECC Parity register 3
+	AT91_REG	 HSMC4_ECCPR4; 	// ECC Parity register 4
+	AT91_REG	 HSMC4_ECCPR5; 	// ECC Parity register 5
+	AT91_REG	 HSMC4_ECCPR6; 	// ECC Parity register 6
+	AT91_REG	 HSMC4_ECCPR7; 	// ECC Parity register 7
+	AT91_REG	 HSMC4_ECCPR8; 	// ECC Parity register 8
+	AT91_REG	 HSMC4_ECCPR9; 	// ECC Parity register 9
+	AT91_REG	 HSMC4_ECCPR10; 	// ECC Parity register 10
+	AT91_REG	 HSMC4_ECCPR11; 	// ECC Parity register 11
+	AT91_REG	 HSMC4_ECCPR12; 	// ECC Parity register 12
+	AT91_REG	 HSMC4_ECCPR13; 	// ECC Parity register 13
+	AT91_REG	 HSMC4_ECCPR14; 	// ECC Parity register 14
+	AT91_REG	 HSMC4_Eccpr15; 	// ECC Parity register 15
+	AT91_REG	 Reserved0[40]; 	// 
+	AT91_REG	 HSMC4_OCMS; 	// OCMS MODE register
+	AT91_REG	 HSMC4_KEY1; 	// KEY1 Register
+	AT91_REG	 HSMC4_KEY2; 	// KEY2 Register
+	AT91_REG	 Reserved1[50]; 	// 
+	AT91_REG	 HSMC4_WPCR; 	// Write Protection Control register
+	AT91_REG	 HSMC4_WPSR; 	// Write Protection Status Register
+	AT91_REG	 HSMC4_ADDRSIZE; 	// Write Protection Status Register
+	AT91_REG	 HSMC4_IPNAME1; 	// Write Protection Status Register
+	AT91_REG	 HSMC4_IPNAME2; 	// Write Protection Status Register
+	AT91_REG	 HSMC4_FEATURES; 	// Write Protection Status Register
+	AT91_REG	 HSMC4_VER; 	// HSMC4 Version Register
+	AT91_REG	 HSMC4_DUMMY; 	// This rtegister was created only ti have AHB constants
+} AT91S_HSMC4, *AT91PS_HSMC4;
+#else
+#define HSMC4_CFG       (AT91_CAST(AT91_REG *) 	0x00000000) // (HSMC4_CFG) Configuration Register
+#define HSMC4_CTRL      (AT91_CAST(AT91_REG *) 	0x00000004) // (HSMC4_CTRL) Control Register
+#define HSMC4_SR        (AT91_CAST(AT91_REG *) 	0x00000008) // (HSMC4_SR) Status Register
+#define HSMC4_IER       (AT91_CAST(AT91_REG *) 	0x0000000C) // (HSMC4_IER) Interrupt Enable Register
+#define HSMC4_IDR       (AT91_CAST(AT91_REG *) 	0x00000010) // (HSMC4_IDR) Interrupt Disable Register
+#define HSMC4_IMR       (AT91_CAST(AT91_REG *) 	0x00000014) // (HSMC4_IMR) Interrupt Mask Register
+#define HSMC4_ADDR      (AT91_CAST(AT91_REG *) 	0x00000018) // (HSMC4_ADDR) Address Cycle Zero Register
+#define HSMC4_BANK      (AT91_CAST(AT91_REG *) 	0x0000001C) // (HSMC4_BANK) Bank Register
+#define HSMC4_ECCCR     (AT91_CAST(AT91_REG *) 	0x00000020) // (HSMC4_ECCCR) ECC reset register
+#define HSMC4_ECCCMD    (AT91_CAST(AT91_REG *) 	0x00000024) // (HSMC4_ECCCMD) ECC Page size register
+#define HSMC4_ECCSR1    (AT91_CAST(AT91_REG *) 	0x00000028) // (HSMC4_ECCSR1) ECC Status register 1
+#define HSMC4_ECCPR0    (AT91_CAST(AT91_REG *) 	0x0000002C) // (HSMC4_ECCPR0) ECC Parity register 0
+#define HSMC4_ECCPR1    (AT91_CAST(AT91_REG *) 	0x00000030) // (HSMC4_ECCPR1) ECC Parity register 1
+#define HSMC4_ECCSR2    (AT91_CAST(AT91_REG *) 	0x00000034) // (HSMC4_ECCSR2) ECC Status register 2
+#define HSMC4_ECCPR2    (AT91_CAST(AT91_REG *) 	0x00000038) // (HSMC4_ECCPR2) ECC Parity register 2
+#define HSMC4_ECCPR3    (AT91_CAST(AT91_REG *) 	0x0000003C) // (HSMC4_ECCPR3) ECC Parity register 3
+#define HSMC4_ECCPR4    (AT91_CAST(AT91_REG *) 	0x00000040) // (HSMC4_ECCPR4) ECC Parity register 4
+#define HSMC4_ECCPR5    (AT91_CAST(AT91_REG *) 	0x00000044) // (HSMC4_ECCPR5) ECC Parity register 5
+#define HSMC4_ECCPR6    (AT91_CAST(AT91_REG *) 	0x00000048) // (HSMC4_ECCPR6) ECC Parity register 6
+#define HSMC4_ECCPR7    (AT91_CAST(AT91_REG *) 	0x0000004C) // (HSMC4_ECCPR7) ECC Parity register 7
+#define HSMC4_ECCPR8    (AT91_CAST(AT91_REG *) 	0x00000050) // (HSMC4_ECCPR8) ECC Parity register 8
+#define HSMC4_ECCPR9    (AT91_CAST(AT91_REG *) 	0x00000054) // (HSMC4_ECCPR9) ECC Parity register 9
+#define HSMC4_ECCPR10   (AT91_CAST(AT91_REG *) 	0x00000058) // (HSMC4_ECCPR10) ECC Parity register 10
+#define HSMC4_ECCPR11   (AT91_CAST(AT91_REG *) 	0x0000005C) // (HSMC4_ECCPR11) ECC Parity register 11
+#define HSMC4_ECCPR12   (AT91_CAST(AT91_REG *) 	0x00000060) // (HSMC4_ECCPR12) ECC Parity register 12
+#define HSMC4_ECCPR13   (AT91_CAST(AT91_REG *) 	0x00000064) // (HSMC4_ECCPR13) ECC Parity register 13
+#define HSMC4_ECCPR14   (AT91_CAST(AT91_REG *) 	0x00000068) // (HSMC4_ECCPR14) ECC Parity register 14
+#define Hsmc4_Eccpr15   (AT91_CAST(AT91_REG *) 	0x0000006C) // (Hsmc4_Eccpr15) ECC Parity register 15
+#define HSMC4_OCMS      (AT91_CAST(AT91_REG *) 	0x00000110) // (HSMC4_OCMS) OCMS MODE register
+#define HSMC4_KEY1      (AT91_CAST(AT91_REG *) 	0x00000114) // (HSMC4_KEY1) KEY1 Register
+#define HSMC4_KEY2      (AT91_CAST(AT91_REG *) 	0x00000118) // (HSMC4_KEY2) KEY2 Register
+#define HSMC4_WPCR      (AT91_CAST(AT91_REG *) 	0x000001E4) // (HSMC4_WPCR) Write Protection Control register
+#define HSMC4_WPSR      (AT91_CAST(AT91_REG *) 	0x000001E8) // (HSMC4_WPSR) Write Protection Status Register
+#define HSMC4_ADDRSIZE  (AT91_CAST(AT91_REG *) 	0x000001EC) // (HSMC4_ADDRSIZE) Write Protection Status Register
+#define HSMC4_IPNAME1   (AT91_CAST(AT91_REG *) 	0x000001F0) // (HSMC4_IPNAME1) Write Protection Status Register
+#define HSMC4_IPNAME2   (AT91_CAST(AT91_REG *) 	0x000001F4) // (HSMC4_IPNAME2) Write Protection Status Register
+#define HSMC4_FEATURES  (AT91_CAST(AT91_REG *) 	0x000001F8) // (HSMC4_FEATURES) Write Protection Status Register
+#define HSMC4_VER       (AT91_CAST(AT91_REG *) 	0x000001FC) // (HSMC4_VER) HSMC4 Version Register
+#define HSMC4_DUMMY     (AT91_CAST(AT91_REG *) 	0x00000200) // (HSMC4_DUMMY) This rtegister was created only ti have AHB constants
+
+#endif
+// -------- HSMC4_CFG : (HSMC4 Offset: 0x0) Configuration Register -------- 
+#define AT91C_HSMC4_PAGESIZE  (0x3 <<  0) // (HSMC4) PAGESIZE field description
+#define 	AT91C_HSMC4_PAGESIZE_528_Bytes            (0x0) // (HSMC4) 512 bytes plus 16 bytes page size
+#define 	AT91C_HSMC4_PAGESIZE_1056_Bytes           (0x1) // (HSMC4) 1024 bytes plus 32 bytes page size
+#define 	AT91C_HSMC4_PAGESIZE_2112_Bytes           (0x2) // (HSMC4) 2048 bytes plus 64 bytes page size
+#define 	AT91C_HSMC4_PAGESIZE_4224_Bytes           (0x3) // (HSMC4) 4096 bytes plus 128 bytes page size
+#define AT91C_HSMC4_WSPARE    (0x1 <<  8) // (HSMC4) Spare area access in Write Mode
+#define AT91C_HSMC4_RSPARE    (0x1 <<  9) // (HSMC4) Spare area access in Read Mode
+#define AT91C_HSMC4_EDGECTRL  (0x1 << 12) // (HSMC4) Rising/Falling Edge Detection Control
+#define AT91C_HSMC4_RBEDGE    (0x1 << 13) // (HSMC4) Ready/Busy Signal edge Detection
+#define AT91C_HSMC4_DTOCYC    (0xF << 16) // (HSMC4) Data Timeout Cycle Number
+#define AT91C_HSMC4_DTOMUL    (0x7 << 20) // (HSMC4) Data Timeout Multiplier
+#define 	AT91C_HSMC4_DTOMUL_1                    (0x0 << 20) // (HSMC4) DTOCYC x 1
+#define 	AT91C_HSMC4_DTOMUL_16                   (0x1 << 20) // (HSMC4) DTOCYC x 16
+#define 	AT91C_HSMC4_DTOMUL_128                  (0x2 << 20) // (HSMC4) DTOCYC x 128
+#define 	AT91C_HSMC4_DTOMUL_256                  (0x3 << 20) // (HSMC4) DTOCYC x 256
+#define 	AT91C_HSMC4_DTOMUL_1024                 (0x4 << 20) // (HSMC4) DTOCYC x 1024
+#define 	AT91C_HSMC4_DTOMUL_4096                 (0x5 << 20) // (HSMC4) DTOCYC x 4096
+#define 	AT91C_HSMC4_DTOMUL_65536                (0x6 << 20) // (HSMC4) DTOCYC x 65536
+#define 	AT91C_HSMC4_DTOMUL_1048576              (0x7 << 20) // (HSMC4) DTOCYC x 1048576
+// -------- HSMC4_CTRL : (HSMC4 Offset: 0x4) Control Register -------- 
+#define AT91C_HSMC4_NFCEN     (0x1 <<  0) // (HSMC4) Nand Flash Controller Host Enable
+#define AT91C_HSMC4_NFCDIS    (0x1 <<  1) // (HSMC4) Nand Flash Controller Host Disable
+#define AT91C_HSMC4_HOSTEN    (0x1 <<  8) // (HSMC4) If set to one, the Host controller is activated and perform a data transfer phase.
+#define AT91C_HSMC4_HOSTWR    (0x1 << 11) // (HSMC4) If this field is set to one, the host transfers data from the internal SRAM to the Memory Device.
+#define AT91C_HSMC4_HOSTCSID  (0x7 << 12) // (HSMC4) Host Controller Chip select Id
+#define 	AT91C_HSMC4_HOSTCSID_0                    (0x0 << 12) // (HSMC4) CS0
+#define 	AT91C_HSMC4_HOSTCSID_1                    (0x1 << 12) // (HSMC4) CS1
+#define 	AT91C_HSMC4_HOSTCSID_2                    (0x2 << 12) // (HSMC4) CS2
+#define 	AT91C_HSMC4_HOSTCSID_3                    (0x3 << 12) // (HSMC4) CS3
+#define 	AT91C_HSMC4_HOSTCSID_4                    (0x4 << 12) // (HSMC4) CS4
+#define 	AT91C_HSMC4_HOSTCSID_5                    (0x5 << 12) // (HSMC4) CS5
+#define 	AT91C_HSMC4_HOSTCSID_6                    (0x6 << 12) // (HSMC4) CS6
+#define 	AT91C_HSMC4_HOSTCSID_7                    (0x7 << 12) // (HSMC4) CS7
+#define AT91C_HSMC4_VALID     (0x1 << 15) // (HSMC4) When set to 1, a write operation modifies both HOSTCSID and HOSTWR fields.
+// -------- HSMC4_SR : (HSMC4 Offset: 0x8) HSMC4 Status Register -------- 
+#define AT91C_HSMC4_NFCSTS    (0x1 <<  0) // (HSMC4) Nand Flash Controller status
+#define AT91C_HSMC4_RBRISE    (0x1 <<  4) // (HSMC4) Selected Ready Busy Rising Edge Detected flag
+#define AT91C_HSMC4_RBFALL    (0x1 <<  5) // (HSMC4) Selected Ready Busy Falling Edge Detected flag
+#define AT91C_HSMC4_HOSTBUSY  (0x1 <<  8) // (HSMC4) Host Busy
+#define AT91C_HSMC4_HOSTW     (0x1 << 11) // (HSMC4) Host Write/Read Operation
+#define AT91C_HSMC4_HOSTCS    (0x7 << 12) // (HSMC4) Host Controller Chip select Id
+#define 	AT91C_HSMC4_HOSTCS_0                    (0x0 << 12) // (HSMC4) CS0
+#define 	AT91C_HSMC4_HOSTCS_1                    (0x1 << 12) // (HSMC4) CS1
+#define 	AT91C_HSMC4_HOSTCS_2                    (0x2 << 12) // (HSMC4) CS2
+#define 	AT91C_HSMC4_HOSTCS_3                    (0x3 << 12) // (HSMC4) CS3
+#define 	AT91C_HSMC4_HOSTCS_4                    (0x4 << 12) // (HSMC4) CS4
+#define 	AT91C_HSMC4_HOSTCS_5                    (0x5 << 12) // (HSMC4) CS5
+#define 	AT91C_HSMC4_HOSTCS_6                    (0x6 << 12) // (HSMC4) CS6
+#define 	AT91C_HSMC4_HOSTCS_7                    (0x7 << 12) // (HSMC4) CS7
+#define AT91C_HSMC4_XFRDONE   (0x1 << 16) // (HSMC4) Host Data Transfer Terminated
+#define AT91C_HSMC4_CMDDONE   (0x1 << 17) // (HSMC4) Command Done
+#define AT91C_HSMC4_ECCRDY    (0x1 << 18) // (HSMC4) ECC ready
+#define AT91C_HSMC4_DTOE      (0x1 << 20) // (HSMC4) Data timeout Error
+#define AT91C_HSMC4_UNDEF     (0x1 << 21) // (HSMC4) Undefined Area Error
+#define AT91C_HSMC4_AWB       (0x1 << 22) // (HSMC4) Accessing While Busy Error
+#define AT91C_HSMC4_HASE      (0x1 << 23) // (HSMC4) Host Controller Access Size Error
+#define AT91C_HSMC4_RBEDGE0   (0x1 << 24) // (HSMC4) Ready Busy line 0 Edge detected
+#define AT91C_HSMC4_RBEDGE1   (0x1 << 25) // (HSMC4) Ready Busy line 1 Edge detected
+#define AT91C_HSMC4_RBEDGE2   (0x1 << 26) // (HSMC4) Ready Busy line 2 Edge detected
+#define AT91C_HSMC4_RBEDGE3   (0x1 << 27) // (HSMC4) Ready Busy line 3 Edge detected
+#define AT91C_HSMC4_RBEDGE4   (0x1 << 28) // (HSMC4) Ready Busy line 4 Edge detected
+#define AT91C_HSMC4_RBEDGE5   (0x1 << 29) // (HSMC4) Ready Busy line 5 Edge detected
+#define AT91C_HSMC4_RBEDGE6   (0x1 << 30) // (HSMC4) Ready Busy line 6 Edge detected
+#define AT91C_HSMC4_RBEDGE7   (0x1 << 31) // (HSMC4) Ready Busy line 7 Edge detected
+// -------- HSMC4_IER : (HSMC4 Offset: 0xc) HSMC4 Interrupt Enable Register -------- 
+// -------- HSMC4_IDR : (HSMC4 Offset: 0x10) HSMC4 Interrupt Disable Register -------- 
+// -------- HSMC4_IMR : (HSMC4 Offset: 0x14) HSMC4 Interrupt Mask Register -------- 
+// -------- HSMC4_ADDR : (HSMC4 Offset: 0x18) Address Cycle Zero Register -------- 
+#define AT91C_HSMC4_ADDRCYCLE0 (0xFF <<  0) // (HSMC4) Nand Flash Array Address cycle 0
+// -------- HSMC4_BANK : (HSMC4 Offset: 0x1c) Bank Register -------- 
+#define AT91C_BANK            (0x7 <<  0) // (HSMC4) Bank identifier
+#define 	AT91C_BANK_0                    (0x0) // (HSMC4) BANK0
+#define 	AT91C_BANK_1                    (0x1) // (HSMC4) BANK1
+#define 	AT91C_BANK_2                    (0x2) // (HSMC4) BANK2
+#define 	AT91C_BANK_3                    (0x3) // (HSMC4) BANK3
+#define 	AT91C_BANK_4                    (0x4) // (HSMC4) BANK4
+#define 	AT91C_BANK_5                    (0x5) // (HSMC4) BANK5
+#define 	AT91C_BANK_6                    (0x6) // (HSMC4) BANK6
+#define 	AT91C_BANK_7                    (0x7) // (HSMC4) BANK7
+// -------- HSMC4_ECCCR : (HSMC4 Offset: 0x20) ECC Control Register -------- 
+#define AT91C_HSMC4_ECCRESET  (0x1 <<  0) // (HSMC4) Reset ECC
+// -------- HSMC4_ECCCMD : (HSMC4 Offset: 0x24) ECC mode register -------- 
+#define AT91C_ECC_PAGE_SIZE   (0x3 <<  0) // (HSMC4) Nand Flash page size
+#define AT91C_ECC_TYPCORRECT  (0x3 <<  4) // (HSMC4) Nand Flash page size
+#define 	AT91C_ECC_TYPCORRECT_ONE_PER_PAGE         (0x0 <<  4) // (HSMC4) 
+#define 	AT91C_ECC_TYPCORRECT_ONE_EVERY_256_BYTES  (0x1 <<  4) // (HSMC4) 
+#define 	AT91C_ECC_TYPCORRECT_ONE_EVERY_512_BYTES  (0x2 <<  4) // (HSMC4) 
+// -------- HSMC4_ECCSR1 : (HSMC4 Offset: 0x28) ECC Status Register 1 -------- 
+#define AT91C_HSMC4_ECC_RECERR0 (0x1 <<  0) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR0 (0x1 <<  1) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR0 (0x1 <<  2) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR1 (0x1 <<  4) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR1 (0x1 <<  5) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR1 (0x1 <<  6) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR2 (0x1 <<  8) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR2 (0x1 <<  9) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR2 (0x1 << 10) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR3 (0x1 << 12) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR3 (0x1 << 13) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR3 (0x1 << 14) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR4 (0x1 << 16) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR4 (0x1 << 17) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR4 (0x1 << 18) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR5 (0x1 << 20) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR5 (0x1 << 21) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR5 (0x1 << 22) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR6 (0x1 << 24) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR6 (0x1 << 25) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR6 (0x1 << 26) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR7 (0x1 << 28) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR7 (0x1 << 29) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR7 (0x1 << 30) // (HSMC4) Multiple Error
+// -------- HSMC4_ECCPR0 : (HSMC4 Offset: 0x2c) HSMC4 ECC parity Register 0 -------- 
+#define AT91C_HSMC4_ECC_BITADDR (0x7 <<  0) // (HSMC4) Corrupted Bit Address in the page
+#define AT91C_HSMC4_ECC_WORDADDR (0xFF <<  3) // (HSMC4) Corrupted Word Address in the page
+#define AT91C_HSMC4_ECC_NPARITY (0x7FF << 12) // (HSMC4) Parity N
+// -------- HSMC4_ECCPR1 : (HSMC4 Offset: 0x30) HSMC4 ECC parity Register 1 -------- 
+// -------- HSMC4_ECCSR2 : (HSMC4 Offset: 0x34) ECC Status Register 2 -------- 
+#define AT91C_HSMC4_ECC_RECERR8 (0x1 <<  0) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR8 (0x1 <<  1) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR8 (0x1 <<  2) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR9 (0x1 <<  4) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR9 (0x1 <<  5) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR9 (0x1 <<  6) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR10 (0x1 <<  8) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR10 (0x1 <<  9) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR10 (0x1 << 10) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR11 (0x1 << 12) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR11 (0x1 << 13) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR11 (0x1 << 14) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR12 (0x1 << 16) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR12 (0x1 << 17) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR12 (0x1 << 18) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR13 (0x1 << 20) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR13 (0x1 << 21) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR13 (0x1 << 22) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR14 (0x1 << 24) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR14 (0x1 << 25) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR14 (0x1 << 26) // (HSMC4) Multiple Error
+#define AT91C_HSMC4_ECC_RECERR15 (0x1 << 28) // (HSMC4) Recoverable Error
+#define AT91C_HSMC4_ECC_ECCERR15 (0x1 << 29) // (HSMC4) ECC Error
+#define AT91C_HSMC4_ECC_MULERR15 (0x1 << 30) // (HSMC4) Multiple Error
+// -------- HSMC4_ECCPR2 : (HSMC4 Offset: 0x38) HSMC4 ECC parity Register 2 -------- 
+// -------- HSMC4_ECCPR3 : (HSMC4 Offset: 0x3c) HSMC4 ECC parity Register 3 -------- 
+// -------- HSMC4_ECCPR4 : (HSMC4 Offset: 0x40) HSMC4 ECC parity Register 4 -------- 
+// -------- HSMC4_ECCPR5 : (HSMC4 Offset: 0x44) HSMC4 ECC parity Register 5 -------- 
+// -------- HSMC4_ECCPR6 : (HSMC4 Offset: 0x48) HSMC4 ECC parity Register 6 -------- 
+// -------- HSMC4_ECCPR7 : (HSMC4 Offset: 0x4c) HSMC4 ECC parity Register 7 -------- 
+// -------- HSMC4_ECCPR8 : (HSMC4 Offset: 0x50) HSMC4 ECC parity Register 8 -------- 
+// -------- HSMC4_ECCPR9 : (HSMC4 Offset: 0x54) HSMC4 ECC parity Register 9 -------- 
+// -------- HSMC4_ECCPR10 : (HSMC4 Offset: 0x58) HSMC4 ECC parity Register 10 -------- 
+// -------- HSMC4_ECCPR11 : (HSMC4 Offset: 0x5c) HSMC4 ECC parity Register 11 -------- 
+// -------- HSMC4_ECCPR12 : (HSMC4 Offset: 0x60) HSMC4 ECC parity Register 12 -------- 
+// -------- HSMC4_ECCPR13 : (HSMC4 Offset: 0x64) HSMC4 ECC parity Register 13 -------- 
+// -------- HSMC4_ECCPR14 : (HSMC4 Offset: 0x68) HSMC4 ECC parity Register 14 -------- 
+// -------- HSMC4_ECCPR15 : (HSMC4 Offset: 0x6c) HSMC4 ECC parity Register 15 -------- 
+// -------- HSMC4_OCMS : (HSMC4 Offset: 0x110) HSMC4 OCMS Register -------- 
+#define AT91C_HSMC4_OCMS_SRSE (0x1 <<  0) // (HSMC4) Static Memory Controller Scrambling Enable
+#define AT91C_HSMC4_OCMS_SMSE (0x1 <<  1) // (HSMC4) SRAM Scramling Enable
+// -------- HSMC4_KEY1 : (HSMC4 Offset: 0x114) HSMC4 OCMS KEY1 Register -------- 
+#define AT91C_HSMC4_OCMS_KEY1 (0x0 <<  0) // (HSMC4) OCMS Key 2
+// -------- HSMC4_OCMS_KEY2 : (HSMC4 Offset: 0x118) HSMC4 OCMS KEY2 Register -------- 
+#define AT91C_HSMC4_OCMS_KEY2 (0x0 <<  0) // (HSMC4) OCMS Key 2
+// -------- HSMC4_WPCR : (HSMC4 Offset: 0x1e4) HSMC4 Witre Protection Control Register -------- 
+#define AT91C_HSMC4_WP_EN     (0x1 <<  0) // (HSMC4) Write Protection Enable
+#define AT91C_HSMC4_WP_KEY    (0xFFFFFF <<  8) // (HSMC4) Protection Password
+// -------- HSMC4_WPSR : (HSMC4 Offset: 0x1e8) HSMC4 WPSR Register -------- 
+#define AT91C_HSMC4_WP_VS     (0xF <<  0) // (HSMC4) Write Protection Violation Status
+#define 	AT91C_HSMC4_WP_VS_WP_VS0               (0x0) // (HSMC4) No write protection violation since the last read of this register
+#define 	AT91C_HSMC4_WP_VS_WP_VS1               (0x1) // (HSMC4) write protection detected unauthorized attempt to write a control register had occured (since the last read)
+#define 	AT91C_HSMC4_WP_VS_WP_VS2               (0x2) // (HSMC4) Software reset had been performed while write protection was enabled (since the last read)
+#define 	AT91C_HSMC4_WP_VS_WP_VS3               (0x3) // (HSMC4) Both write protection violation and software reset with write protection enabled had occured since the last read
+#define AT91C_                (0x0 <<  8) // (HSMC4) 
+// -------- HSMC4_VER : (HSMC4 Offset: 0x1fc) HSMC4 VERSION Register -------- 
+// -------- HSMC4_DUMMY : (HSMC4 Offset: 0x200) HSMC4 DUMMY REGISTER -------- 
+#define AT91C_HSMC4_CMD1      (0xFF <<  2) // (HSMC4) Command Register Value for Cycle 1
+#define AT91C_HSMC4_CMD2      (0xFF << 10) // (HSMC4) Command Register Value for Cycle 2
+#define AT91C_HSMC4_VCMD2     (0x1 << 18) // (HSMC4) Valid Cycle 2 Command
+#define AT91C_HSMC4_ACYCLE    (0x7 << 19) // (HSMC4) Number of Address required for the current command
+#define 	AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_NONE    (0x0 << 19) // (HSMC4) No address cycle
+#define 	AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_ONE     (0x1 << 19) // (HSMC4) One address cycle
+#define 	AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_TWO     (0x2 << 19) // (HSMC4) Two address cycles
+#define 	AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_THREE   (0x3 << 19) // (HSMC4) Three address cycles
+#define 	AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_FOUR    (0x4 << 19) // (HSMC4) Four address cycles
+#define 	AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_FIVE    (0x5 << 19) // (HSMC4) Five address cycles
+#define AT91C_HSMC4_CSID      (0x7 << 22) // (HSMC4) Chip Select Identifier
+#define 	AT91C_HSMC4_CSID_0                    (0x0 << 22) // (HSMC4) CS0
+#define 	AT91C_HSMC4_CSID_1                    (0x1 << 22) // (HSMC4) CS1
+#define 	AT91C_HSMC4_CSID_2                    (0x2 << 22) // (HSMC4) CS2
+#define 	AT91C_HSMC4_CSID_3                    (0x3 << 22) // (HSMC4) CS3
+#define 	AT91C_HSMC4_CSID_4                    (0x4 << 22) // (HSMC4) CS4
+#define 	AT91C_HSMC4_CSID_5                    (0x5 << 22) // (HSMC4) CS5
+#define 	AT91C_HSMC4_CSID_6                    (0x6 << 22) // (HSMC4) CS6
+#define 	AT91C_HSMC4_CSID_7                    (0x7 << 22) // (HSMC4) CS7
+#define AT91C_HSMC4_HOST_EN   (0x1 << 25) // (HSMC4) Host Main Controller Enable
+#define AT91C_HSMC4_HOST_WR   (0x1 << 26) // (HSMC4) HOSTWR : Host Main Controller Write Enable
+#define AT91C_HSMC4_HOSTCMD   (0x1 << 27) // (HSMC4) Host Command Enable
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR AHB Matrix2 Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_HMATRIX2 {
+	AT91_REG	 HMATRIX2_MCFG0; 	//  Master Configuration Register 0 : ARM I and D
+	AT91_REG	 HMATRIX2_MCFG1; 	//  Master Configuration Register 1 : ARM S
+	AT91_REG	 HMATRIX2_MCFG2; 	//  Master Configuration Register 2
+	AT91_REG	 HMATRIX2_MCFG3; 	//  Master Configuration Register 3
+	AT91_REG	 HMATRIX2_MCFG4; 	//  Master Configuration Register 4
+	AT91_REG	 HMATRIX2_MCFG5; 	//  Master Configuration Register 5
+	AT91_REG	 HMATRIX2_MCFG6; 	//  Master Configuration Register 6
+	AT91_REG	 HMATRIX2_MCFG7; 	//  Master Configuration Register 7
+	AT91_REG	 Reserved0[8]; 	// 
+	AT91_REG	 HMATRIX2_SCFG0; 	//  Slave Configuration Register 0
+	AT91_REG	 HMATRIX2_SCFG1; 	//  Slave Configuration Register 1
+	AT91_REG	 HMATRIX2_SCFG2; 	//  Slave Configuration Register 2
+	AT91_REG	 HMATRIX2_SCFG3; 	//  Slave Configuration Register 3
+	AT91_REG	 HMATRIX2_SCFG4; 	//  Slave Configuration Register 4
+	AT91_REG	 HMATRIX2_SCFG5; 	//  Slave Configuration Register 5
+	AT91_REG	 HMATRIX2_SCFG6; 	//  Slave Configuration Register 6
+	AT91_REG	 HMATRIX2_SCFG7; 	//  Slave Configuration Register 5
+	AT91_REG	 HMATRIX2_SCFG8; 	//  Slave Configuration Register 8
+	AT91_REG	 HMATRIX2_SCFG9; 	//  Slave Configuration Register 9
+	AT91_REG	 Reserved1[42]; 	// 
+	AT91_REG	 HMATRIX2_SFR0 ; 	//  Special Function Register 0
+	AT91_REG	 HMATRIX2_SFR1 ; 	//  Special Function Register 1
+	AT91_REG	 HMATRIX2_SFR2 ; 	//  Special Function Register 2
+	AT91_REG	 HMATRIX2_SFR3 ; 	//  Special Function Register 3
+	AT91_REG	 HMATRIX2_SFR4 ; 	//  Special Function Register 4
+	AT91_REG	 HMATRIX2_SFR5 ; 	//  Special Function Register 5
+	AT91_REG	 HMATRIX2_SFR6 ; 	//  Special Function Register 6
+	AT91_REG	 HMATRIX2_SFR7 ; 	//  Special Function Register 7
+	AT91_REG	 HMATRIX2_SFR8 ; 	//  Special Function Register 8
+	AT91_REG	 HMATRIX2_SFR9 ; 	//  Special Function Register 9
+	AT91_REG	 HMATRIX2_SFR10; 	//  Special Function Register 10
+	AT91_REG	 HMATRIX2_SFR11; 	//  Special Function Register 11
+	AT91_REG	 HMATRIX2_SFR12; 	//  Special Function Register 12
+	AT91_REG	 HMATRIX2_SFR13; 	//  Special Function Register 13
+	AT91_REG	 HMATRIX2_SFR14; 	//  Special Function Register 14
+	AT91_REG	 HMATRIX2_SFR15; 	//  Special Function Register 15
+	AT91_REG	 Reserved2[39]; 	// 
+	AT91_REG	 HMATRIX2_ADDRSIZE; 	// HMATRIX2 ADDRSIZE REGISTER 
+	AT91_REG	 HMATRIX2_IPNAME1; 	// HMATRIX2 IPNAME1 REGISTER 
+	AT91_REG	 HMATRIX2_IPNAME2; 	// HMATRIX2 IPNAME2 REGISTER 
+	AT91_REG	 HMATRIX2_FEATURES; 	// HMATRIX2 FEATURES REGISTER 
+	AT91_REG	 HMATRIX2_VER; 	// HMATRIX2 VERSION REGISTER 
+} AT91S_HMATRIX2, *AT91PS_HMATRIX2;
+#else
+#define MATRIX_MCFG0    (AT91_CAST(AT91_REG *) 	0x00000000) // (MATRIX_MCFG0)  Master Configuration Register 0 : ARM I and D
+#define MATRIX_MCFG1    (AT91_CAST(AT91_REG *) 	0x00000004) // (MATRIX_MCFG1)  Master Configuration Register 1 : ARM S
+#define MATRIX_MCFG2    (AT91_CAST(AT91_REG *) 	0x00000008) // (MATRIX_MCFG2)  Master Configuration Register 2
+#define MATRIX_MCFG3    (AT91_CAST(AT91_REG *) 	0x0000000C) // (MATRIX_MCFG3)  Master Configuration Register 3
+#define MATRIX_MCFG4    (AT91_CAST(AT91_REG *) 	0x00000010) // (MATRIX_MCFG4)  Master Configuration Register 4
+#define MATRIX_MCFG5    (AT91_CAST(AT91_REG *) 	0x00000014) // (MATRIX_MCFG5)  Master Configuration Register 5
+#define MATRIX_MCFG6    (AT91_CAST(AT91_REG *) 	0x00000018) // (MATRIX_MCFG6)  Master Configuration Register 6
+#define MATRIX_MCFG7    (AT91_CAST(AT91_REG *) 	0x0000001C) // (MATRIX_MCFG7)  Master Configuration Register 7
+#define MATRIX_SCFG0    (AT91_CAST(AT91_REG *) 	0x00000040) // (MATRIX_SCFG0)  Slave Configuration Register 0
+#define MATRIX_SCFG1    (AT91_CAST(AT91_REG *) 	0x00000044) // (MATRIX_SCFG1)  Slave Configuration Register 1
+#define MATRIX_SCFG2    (AT91_CAST(AT91_REG *) 	0x00000048) // (MATRIX_SCFG2)  Slave Configuration Register 2
+#define MATRIX_SCFG3    (AT91_CAST(AT91_REG *) 	0x0000004C) // (MATRIX_SCFG3)  Slave Configuration Register 3
+#define MATRIX_SCFG4    (AT91_CAST(AT91_REG *) 	0x00000050) // (MATRIX_SCFG4)  Slave Configuration Register 4
+#define MATRIX_SCFG5    (AT91_CAST(AT91_REG *) 	0x00000054) // (MATRIX_SCFG5)  Slave Configuration Register 5
+#define MATRIX_SCFG6    (AT91_CAST(AT91_REG *) 	0x00000058) // (MATRIX_SCFG6)  Slave Configuration Register 6
+#define MATRIX_SCFG7    (AT91_CAST(AT91_REG *) 	0x0000005C) // (MATRIX_SCFG7)  Slave Configuration Register 5
+#define MATRIX_SCFG8    (AT91_CAST(AT91_REG *) 	0x00000060) // (MATRIX_SCFG8)  Slave Configuration Register 8
+#define MATRIX_SCFG9    (AT91_CAST(AT91_REG *) 	0x00000064) // (MATRIX_SCFG9)  Slave Configuration Register 9
+#define MATRIX_SFR0     (AT91_CAST(AT91_REG *) 	0x00000110) // (MATRIX_SFR0 )  Special Function Register 0
+#define MATRIX_SFR1     (AT91_CAST(AT91_REG *) 	0x00000114) // (MATRIX_SFR1 )  Special Function Register 1
+#define MATRIX_SFR2     (AT91_CAST(AT91_REG *) 	0x00000118) // (MATRIX_SFR2 )  Special Function Register 2
+#define MATRIX_SFR3     (AT91_CAST(AT91_REG *) 	0x0000011C) // (MATRIX_SFR3 )  Special Function Register 3
+#define MATRIX_SFR4     (AT91_CAST(AT91_REG *) 	0x00000120) // (MATRIX_SFR4 )  Special Function Register 4
+#define MATRIX_SFR5     (AT91_CAST(AT91_REG *) 	0x00000124) // (MATRIX_SFR5 )  Special Function Register 5
+#define MATRIX_SFR6     (AT91_CAST(AT91_REG *) 	0x00000128) // (MATRIX_SFR6 )  Special Function Register 6
+#define MATRIX_SFR7     (AT91_CAST(AT91_REG *) 	0x0000012C) // (MATRIX_SFR7 )  Special Function Register 7
+#define MATRIX_SFR8     (AT91_CAST(AT91_REG *) 	0x00000130) // (MATRIX_SFR8 )  Special Function Register 8
+#define MATRIX_SFR9     (AT91_CAST(AT91_REG *) 	0x00000134) // (MATRIX_SFR9 )  Special Function Register 9
+#define MATRIX_SFR10    (AT91_CAST(AT91_REG *) 	0x00000138) // (MATRIX_SFR10)  Special Function Register 10
+#define MATRIX_SFR11    (AT91_CAST(AT91_REG *) 	0x0000013C) // (MATRIX_SFR11)  Special Function Register 11
+#define MATRIX_SFR12    (AT91_CAST(AT91_REG *) 	0x00000140) // (MATRIX_SFR12)  Special Function Register 12
+#define MATRIX_SFR13    (AT91_CAST(AT91_REG *) 	0x00000144) // (MATRIX_SFR13)  Special Function Register 13
+#define MATRIX_SFR14    (AT91_CAST(AT91_REG *) 	0x00000148) // (MATRIX_SFR14)  Special Function Register 14
+#define MATRIX_SFR15    (AT91_CAST(AT91_REG *) 	0x0000014C) // (MATRIX_SFR15)  Special Function Register 15
+#define HMATRIX2_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x000001EC) // (HMATRIX2_ADDRSIZE) HMATRIX2 ADDRSIZE REGISTER 
+#define HMATRIX2_IPNAME1 (AT91_CAST(AT91_REG *) 	0x000001F0) // (HMATRIX2_IPNAME1) HMATRIX2 IPNAME1 REGISTER 
+#define HMATRIX2_IPNAME2 (AT91_CAST(AT91_REG *) 	0x000001F4) // (HMATRIX2_IPNAME2) HMATRIX2 IPNAME2 REGISTER 
+#define HMATRIX2_FEATURES (AT91_CAST(AT91_REG *) 	0x000001F8) // (HMATRIX2_FEATURES) HMATRIX2 FEATURES REGISTER 
+#define HMATRIX2_VER    (AT91_CAST(AT91_REG *) 	0x000001FC) // (HMATRIX2_VER) HMATRIX2 VERSION REGISTER 
+
+#endif
+// -------- MATRIX_MCFG0 : (HMATRIX2 Offset: 0x0) Master Configuration Register ARM bus I and D -------- 
+#define AT91C_MATRIX_ULBT     (0x7 <<  0) // (HMATRIX2) Undefined Length Burst Type
+#define 	AT91C_MATRIX_ULBT_INFINIT_LENGTH       (0x0) // (HMATRIX2) infinite length burst
+#define 	AT91C_MATRIX_ULBT_SINGLE_ACCESS        (0x1) // (HMATRIX2) Single Access
+#define 	AT91C_MATRIX_ULBT_4_BEAT               (0x2) // (HMATRIX2) 4 Beat Burst
+#define 	AT91C_MATRIX_ULBT_8_BEAT               (0x3) // (HMATRIX2) 8 Beat Burst
+#define 	AT91C_MATRIX_ULBT_16_BEAT              (0x4) // (HMATRIX2) 16 Beat Burst
+#define 	AT91C_MATRIX_ULBT_32_BEAT              (0x5) // (HMATRIX2) 32 Beat Burst
+#define 	AT91C_MATRIX_ULBT_64_BEAT              (0x6) // (HMATRIX2) 64 Beat Burst
+#define 	AT91C_MATRIX_ULBT_128_BEAT             (0x7) // (HMATRIX2) 128 Beat Burst
+// -------- MATRIX_MCFG1 : (HMATRIX2 Offset: 0x4) Master Configuration Register ARM bus S -------- 
+// -------- MATRIX_MCFG2 : (HMATRIX2 Offset: 0x8) Master Configuration Register -------- 
+// -------- MATRIX_MCFG3 : (HMATRIX2 Offset: 0xc) Master Configuration Register -------- 
+// -------- MATRIX_MCFG4 : (HMATRIX2 Offset: 0x10) Master Configuration Register -------- 
+// -------- MATRIX_MCFG5 : (HMATRIX2 Offset: 0x14) Master Configuration Register -------- 
+// -------- MATRIX_MCFG6 : (HMATRIX2 Offset: 0x18) Master Configuration Register -------- 
+// -------- MATRIX_MCFG7 : (HMATRIX2 Offset: 0x1c) Master Configuration Register -------- 
+// -------- MATRIX_SCFG0 : (HMATRIX2 Offset: 0x40) Slave Configuration Register 0 -------- 
+#define AT91C_MATRIX_SLOT_CYCLE (0xFF <<  0) // (HMATRIX2) Maximum Number of Allowed Cycles for a Burst
+#define AT91C_MATRIX_DEFMSTR_TYPE (0x3 << 16) // (HMATRIX2) Default Master Type
+#define 	AT91C_MATRIX_DEFMSTR_TYPE_NO_DEFMSTR           (0x0 << 16) // (HMATRIX2) No Default Master. At the end of current slave access, if no other master request is pending, the slave is deconnected from all masters. This results in having a one cycle latency for the first transfer of a burst.
+#define 	AT91C_MATRIX_DEFMSTR_TYPE_LAST_DEFMSTR         (0x1 << 16) // (HMATRIX2) Last Default Master. At the end of current slave access, if no other master request is pending, the slave stay connected with the last master having accessed it. This results in not having the one cycle latency when the last master re-trying access on the slave.
+#define 	AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR        (0x2 << 16) // (HMATRIX2) Fixed Default Master. At the end of current slave access, if no other master request is pending, the slave connects with fixed which number is in FIXED_DEFMSTR field. This results in not having the one cycle latency when the fixed master re-trying access on the slave.
+#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG0 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master
+#define 	AT91C_MATRIX_FIXED_DEFMSTR_SCFG0_ARMS                 (0x1 << 18) // (HMATRIX2) ARMS is Default Master
+// -------- MATRIX_SCFG1 : (HMATRIX2 Offset: 0x44) Slave Configuration Register 1 -------- 
+#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG1 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master
+#define 	AT91C_MATRIX_FIXED_DEFMSTR_SCFG1_ARMS                 (0x1 << 18) // (HMATRIX2) ARMS is Default Master
+// -------- MATRIX_SCFG2 : (HMATRIX2 Offset: 0x48) Slave Configuration Register 2 -------- 
+#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG2 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master
+#define 	AT91C_MATRIX_FIXED_DEFMSTR_SCFG2_ARMS                 (0x1 << 18) // (HMATRIX2) ARMS is Default Master
+// -------- MATRIX_SCFG3 : (HMATRIX2 Offset: 0x4c) Slave Configuration Register 3 -------- 
+#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG3 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master
+#define 	AT91C_MATRIX_FIXED_DEFMSTR_SCFG3_ARMC                 (0x0 << 18) // (HMATRIX2) ARMC is Default Master
+// -------- MATRIX_SCFG4 : (HMATRIX2 Offset: 0x50) Slave Configuration Register 4 -------- 
+#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG4 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master
+#define 	AT91C_MATRIX_FIXED_DEFMSTR_SCFG4_ARMC                 (0x0 << 18) // (HMATRIX2) ARMC is Default Master
+// -------- MATRIX_SCFG5 : (HMATRIX2 Offset: 0x54) Slave Configuration Register 5 -------- 
+#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG5 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master
+#define 	AT91C_MATRIX_FIXED_DEFMSTR_SCFG5_ARMS                 (0x1 << 18) // (HMATRIX2) ARMS is Default Master
+// -------- MATRIX_SCFG6 : (HMATRIX2 Offset: 0x58) Slave Configuration Register 6 -------- 
+#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG6 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master
+#define 	AT91C_MATRIX_FIXED_DEFMSTR_SCFG6_ARMS                 (0x1 << 18) // (HMATRIX2) ARMS is Default Master
+// -------- MATRIX_SCFG7 : (HMATRIX2 Offset: 0x5c) Slave Configuration Register 7 -------- 
+#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG7 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master
+#define 	AT91C_MATRIX_FIXED_DEFMSTR_SCFG7_ARMS                 (0x1 << 18) // (HMATRIX2) ARMS is Default Master
+// -------- MATRIX_SCFG8 : (HMATRIX2 Offset: 0x60) Slave Configuration Register 8 -------- 
+#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG8 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master
+#define 	AT91C_MATRIX_FIXED_DEFMSTR_SCFG8_ARMS                 (0x1 << 18) // (HMATRIX2) ARMS is Default Master
+#define 	AT91C_MATRIX_FIXED_DEFMSTR_SCFG8_HDMA                 (0x4 << 18) // (HMATRIX2) HDMA is Default Master
+// -------- MATRIX_SCFG9 : (HMATRIX2 Offset: 0x64) Slave Configuration Register 9 -------- 
+#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG9 (0x7 << 18) // (HMATRIX2) Fixed Index of Default Master
+#define 	AT91C_MATRIX_FIXED_DEFMSTR_SCFG9_ARMS                 (0x1 << 18) // (HMATRIX2) ARMS is Default Master
+#define 	AT91C_MATRIX_FIXED_DEFMSTR_SCFG9_HDMA                 (0x4 << 18) // (HMATRIX2) HDMA is Default Master
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x110) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x114) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x118) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x11c) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x120) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x124) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x128) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x12c) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x130) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x134) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x138) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x13c) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x140) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x144) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x148) Special Function Register 0 -------- 
+// -------- MATRIX_SFR0 : (HMATRIX2 Offset: 0x14c) Special Function Register 0 -------- 
+// -------- HMATRIX2_VER : (HMATRIX2 Offset: 0x1fc)  VERSION  Register -------- 
+#define AT91C_HMATRIX2_VER    (0xF <<  0) // (HMATRIX2)  VERSION  Register
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR NESTED vector Interrupt Controller
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_NVIC {
+	AT91_REG	 Reserved0[1]; 	// 
+	AT91_REG	 NVIC_ICTR; 	// Interrupt Control Type Register
+	AT91_REG	 Reserved1[2]; 	// 
+	AT91_REG	 NVIC_STICKCSR; 	// SysTick Control and Status Register
+	AT91_REG	 NVIC_STICKRVR; 	// SysTick Reload Value Register
+	AT91_REG	 NVIC_STICKCVR; 	// SysTick Current Value Register
+	AT91_REG	 NVIC_STICKCALVR; 	// SysTick Calibration Value Register
+	AT91_REG	 Reserved2[56]; 	// 
+	AT91_REG	 NVIC_ISER[8]; 	// Set Enable Register
+	AT91_REG	 Reserved3[24]; 	// 
+	AT91_REG	 NVIC_ICER[8]; 	// Clear enable Register
+	AT91_REG	 Reserved4[24]; 	// 
+	AT91_REG	 NVIC_ISPR[8]; 	// Set Pending Register
+	AT91_REG	 Reserved5[24]; 	// 
+	AT91_REG	 NVIC_ICPR[8]; 	// Clear Pending Register
+	AT91_REG	 Reserved6[24]; 	// 
+	AT91_REG	 NVIC_ABR[8]; 	// Active Bit Register
+	AT91_REG	 Reserved7[56]; 	// 
+	AT91_REG	 NVIC_IPR[60]; 	// Interrupt Mask Register
+	AT91_REG	 Reserved8[516]; 	// 
+	AT91_REG	 NVIC_CPUID; 	// CPUID Base Register
+	AT91_REG	 NVIC_ICSR; 	// Interrupt Control State Register
+	AT91_REG	 NVIC_VTOFFR; 	// Vector Table Offset Register
+	AT91_REG	 NVIC_AIRCR; 	// Application Interrupt/Reset Control Reg
+	AT91_REG	 NVIC_SCR; 	// System Control Register
+	AT91_REG	 NVIC_CCR; 	// Configuration Control Register
+	AT91_REG	 NVIC_HAND4PR; 	// System Handlers 4-7 Priority Register
+	AT91_REG	 NVIC_HAND8PR; 	// System Handlers 8-11 Priority Register
+	AT91_REG	 NVIC_HAND12PR; 	// System Handlers 12-15 Priority Register
+	AT91_REG	 NVIC_HANDCSR; 	// System Handler Control and State Register
+	AT91_REG	 NVIC_CFSR; 	// Configurable Fault Status Register
+	AT91_REG	 NVIC_HFSR; 	// Hard Fault Status Register
+	AT91_REG	 NVIC_DFSR; 	// Debug Fault Status Register
+	AT91_REG	 NVIC_MMAR; 	// Mem Manage Address Register
+	AT91_REG	 NVIC_BFAR; 	// Bus Fault Address Register
+	AT91_REG	 NVIC_AFSR; 	// Auxiliary Fault Status Register
+	AT91_REG	 NVIC_PFR0; 	// Processor Feature register0
+	AT91_REG	 NVIC_PFR1; 	// Processor Feature register1
+	AT91_REG	 NVIC_DFR0; 	// Debug Feature register0
+	AT91_REG	 NVIC_AFR0; 	// Auxiliary Feature register0
+	AT91_REG	 NVIC_MMFR0; 	// Memory Model Feature register0
+	AT91_REG	 NVIC_MMFR1; 	// Memory Model Feature register1
+	AT91_REG	 NVIC_MMFR2; 	// Memory Model Feature register2
+	AT91_REG	 NVIC_MMFR3; 	// Memory Model Feature register3
+	AT91_REG	 NVIC_ISAR0; 	// ISA Feature register0
+	AT91_REG	 NVIC_ISAR1; 	// ISA Feature register1
+	AT91_REG	 NVIC_ISAR2; 	// ISA Feature register2
+	AT91_REG	 NVIC_ISAR3; 	// ISA Feature register3
+	AT91_REG	 NVIC_ISAR4; 	// ISA Feature register4
+	AT91_REG	 Reserved9[99]; 	// 
+	AT91_REG	 NVIC_STIR; 	// Software Trigger Interrupt Register
+	AT91_REG	 Reserved10[51]; 	// 
+	AT91_REG	 NVIC_PID4; 	// Peripheral identification register
+	AT91_REG	 NVIC_PID5; 	// Peripheral identification register
+	AT91_REG	 NVIC_PID6; 	// Peripheral identification register
+	AT91_REG	 NVIC_PID7; 	// Peripheral identification register
+	AT91_REG	 NVIC_PID0; 	// Peripheral identification register b7:0
+	AT91_REG	 NVIC_PID1; 	// Peripheral identification register b15:8
+	AT91_REG	 NVIC_PID2; 	// Peripheral identification register b23:16
+	AT91_REG	 NVIC_PID3; 	// Peripheral identification register b31:24
+	AT91_REG	 NVIC_CID0; 	// Component identification register b7:0
+	AT91_REG	 NVIC_CID1; 	// Component identification register b15:8
+	AT91_REG	 NVIC_CID2; 	// Component identification register b23:16
+	AT91_REG	 NVIC_CID3; 	// Component identification register b31:24
+} AT91S_NVIC, *AT91PS_NVIC;
+#else
+#define NVIC_ICTR       (AT91_CAST(AT91_REG *) 	0x00000004) // (NVIC_ICTR) Interrupt Control Type Register
+#define NVIC_STICKCSR   (AT91_CAST(AT91_REG *) 	0x00000010) // (NVIC_STICKCSR) SysTick Control and Status Register
+#define NVIC_STICKRVR   (AT91_CAST(AT91_REG *) 	0x00000014) // (NVIC_STICKRVR) SysTick Reload Value Register
+#define NVIC_STICKCVR   (AT91_CAST(AT91_REG *) 	0x00000018) // (NVIC_STICKCVR) SysTick Current Value Register
+#define NVIC_STICKCALVR (AT91_CAST(AT91_REG *) 	0x0000001C) // (NVIC_STICKCALVR) SysTick Calibration Value Register
+#define NVIC_ISER       (AT91_CAST(AT91_REG *) 	0x00000100) // (NVIC_ISER) Set Enable Register
+#define NVIC_ICER       (AT91_CAST(AT91_REG *) 	0x00000180) // (NVIC_ICER) Clear enable Register
+#define NVIC_ISPR       (AT91_CAST(AT91_REG *) 	0x00000200) // (NVIC_ISPR) Set Pending Register
+#define NVIC_ICPR       (AT91_CAST(AT91_REG *) 	0x00000280) // (NVIC_ICPR) Clear Pending Register
+#define NVIC_IABR       (AT91_CAST(AT91_REG *) 	0x00000300) // (NVIC_IABR) Active Bit Register
+#define NVIC_IPR        (AT91_CAST(AT91_REG *) 	0x00000400) // (NVIC_IPR) Interrupt Mask Register
+#define NVIC_CPUID      (AT91_CAST(AT91_REG *) 	0x00000D00) // (NVIC_CPUID) CPUID Base Register
+#define NVIC_ICSR       (AT91_CAST(AT91_REG *) 	0x00000D04) // (NVIC_ICSR) Interrupt Control State Register
+#define NVIC_VTOFFR     (AT91_CAST(AT91_REG *) 	0x00000D08) // (NVIC_VTOFFR) Vector Table Offset Register
+#define NVIC_AIRCR      (AT91_CAST(AT91_REG *) 	0x00000D0C) // (NVIC_AIRCR) Application Interrupt/Reset Control Reg
+#define NVIC_SCR        (AT91_CAST(AT91_REG *) 	0x00000D10) // (NVIC_SCR) System Control Register
+#define NVIC_CCR        (AT91_CAST(AT91_REG *) 	0x00000D14) // (NVIC_CCR) Configuration Control Register
+#define NVIC_HAND4PR    (AT91_CAST(AT91_REG *) 	0x00000D18) // (NVIC_HAND4PR) System Handlers 4-7 Priority Register
+#define NVIC_HAND8PR    (AT91_CAST(AT91_REG *) 	0x00000D1C) // (NVIC_HAND8PR) System Handlers 8-11 Priority Register
+#define NVIC_HAND12PR   (AT91_CAST(AT91_REG *) 	0x00000D20) // (NVIC_HAND12PR) System Handlers 12-15 Priority Register
+#define NVIC_HANDCSR    (AT91_CAST(AT91_REG *) 	0x00000D24) // (NVIC_HANDCSR) System Handler Control and State Register
+#define NVIC_CFSR       (AT91_CAST(AT91_REG *) 	0x00000D28) // (NVIC_CFSR) Configurable Fault Status Register
+#define NVIC_HFSR       (AT91_CAST(AT91_REG *) 	0x00000D2C) // (NVIC_HFSR) Hard Fault Status Register
+#define NVIC_DFSR       (AT91_CAST(AT91_REG *) 	0x00000D30) // (NVIC_DFSR) Debug Fault Status Register
+#define NVIC_MMAR       (AT91_CAST(AT91_REG *) 	0x00000D34) // (NVIC_MMAR) Mem Manage Address Register
+#define NVIC_BFAR       (AT91_CAST(AT91_REG *) 	0x00000D38) // (NVIC_BFAR) Bus Fault Address Register
+#define NVIC_AFSR       (AT91_CAST(AT91_REG *) 	0x00000D3C) // (NVIC_AFSR) Auxiliary Fault Status Register
+#define NVIC_PFR0       (AT91_CAST(AT91_REG *) 	0x00000D40) // (NVIC_PFR0) Processor Feature register0
+#define NVIC_PFR1       (AT91_CAST(AT91_REG *) 	0x00000D44) // (NVIC_PFR1) Processor Feature register1
+#define NVIC_DFR0       (AT91_CAST(AT91_REG *) 	0x00000D48) // (NVIC_DFR0) Debug Feature register0
+#define NVIC_AFR0       (AT91_CAST(AT91_REG *) 	0x00000D4C) // (NVIC_AFR0) Auxiliary Feature register0
+#define NVIC_MMFR0      (AT91_CAST(AT91_REG *) 	0x00000D50) // (NVIC_MMFR0) Memory Model Feature register0
+#define NVIC_MMFR1      (AT91_CAST(AT91_REG *) 	0x00000D54) // (NVIC_MMFR1) Memory Model Feature register1
+#define NVIC_MMFR2      (AT91_CAST(AT91_REG *) 	0x00000D58) // (NVIC_MMFR2) Memory Model Feature register2
+#define NVIC_MMFR3      (AT91_CAST(AT91_REG *) 	0x00000D5C) // (NVIC_MMFR3) Memory Model Feature register3
+#define NVIC_ISAR0      (AT91_CAST(AT91_REG *) 	0x00000D60) // (NVIC_ISAR0) ISA Feature register0
+#define NVIC_ISAR1      (AT91_CAST(AT91_REG *) 	0x00000D64) // (NVIC_ISAR1) ISA Feature register1
+#define NVIC_ISAR2      (AT91_CAST(AT91_REG *) 	0x00000D68) // (NVIC_ISAR2) ISA Feature register2
+#define NVIC_ISAR3      (AT91_CAST(AT91_REG *) 	0x00000D6C) // (NVIC_ISAR3) ISA Feature register3
+#define NVIC_ISAR4      (AT91_CAST(AT91_REG *) 	0x00000D70) // (NVIC_ISAR4) ISA Feature register4
+#define NVIC_STIR       (AT91_CAST(AT91_REG *) 	0x00000F00) // (NVIC_STIR) Software Trigger Interrupt Register
+#define NVIC_PID4       (AT91_CAST(AT91_REG *) 	0x00000FD0) // (NVIC_PID4) Peripheral identification register
+#define NVIC_PID5       (AT91_CAST(AT91_REG *) 	0x00000FD4) // (NVIC_PID5) Peripheral identification register
+#define NVIC_PID6       (AT91_CAST(AT91_REG *) 	0x00000FD8) // (NVIC_PID6) Peripheral identification register
+#define NVIC_PID7       (AT91_CAST(AT91_REG *) 	0x00000FDC) // (NVIC_PID7) Peripheral identification register
+#define NVIC_PID0       (AT91_CAST(AT91_REG *) 	0x00000FE0) // (NVIC_PID0) Peripheral identification register b7:0
+#define NVIC_PID1       (AT91_CAST(AT91_REG *) 	0x00000FE4) // (NVIC_PID1) Peripheral identification register b15:8
+#define NVIC_PID2       (AT91_CAST(AT91_REG *) 	0x00000FE8) // (NVIC_PID2) Peripheral identification register b23:16
+#define NVIC_PID3       (AT91_CAST(AT91_REG *) 	0x00000FEC) // (NVIC_PID3) Peripheral identification register b31:24
+#define NVIC_CID0       (AT91_CAST(AT91_REG *) 	0x00000FF0) // (NVIC_CID0) Component identification register b7:0
+#define NVIC_CID1       (AT91_CAST(AT91_REG *) 	0x00000FF4) // (NVIC_CID1) Component identification register b15:8
+#define NVIC_CID2       (AT91_CAST(AT91_REG *) 	0x00000FF8) // (NVIC_CID2) Component identification register b23:16
+#define NVIC_CID3       (AT91_CAST(AT91_REG *) 	0x00000FFC) // (NVIC_CID3) Component identification register b31:24
+
+#endif
+// -------- NVIC_ICTR : (NVIC Offset: 0x4) Interrupt Controller Type Register -------- 
+#define AT91C_NVIC_INTLINESNUM (0xF <<  0) // (NVIC) Total number of interrupt lines
+#define 	AT91C_NVIC_INTLINESNUM_32                   (0x0) // (NVIC) up to 32 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_64                   (0x1) // (NVIC) up to 64 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_96                   (0x2) // (NVIC) up to 96 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_128                  (0x3) // (NVIC) up to 128 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_160                  (0x4) // (NVIC) up to 160 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_192                  (0x5) // (NVIC) up to 192 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_224                  (0x6) // (NVIC) up to 224 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_256                  (0x7) // (NVIC) up to 256 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_288                  (0x8) // (NVIC) up to 288 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_320                  (0x9) // (NVIC) up to 320 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_352                  (0xA) // (NVIC) up to 352 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_384                  (0xB) // (NVIC) up to 384 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_416                  (0xC) // (NVIC) up to 416 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_448                  (0xD) // (NVIC) up to 448 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_480                  (0xE) // (NVIC) up to 480 interrupt lines supported
+#define 	AT91C_NVIC_INTLINESNUM_496                  (0xF) // (NVIC) up to 496 interrupt lines supported)
+// -------- NVIC_STICKCSR : (NVIC Offset: 0x10) SysTick Control and Status Register -------- 
+#define AT91C_NVIC_STICKENABLE (0x1 <<  0) // (NVIC) SysTick counter enable.
+#define AT91C_NVIC_STICKINT   (0x1 <<  1) // (NVIC) SysTick interrupt enable.
+#define AT91C_NVIC_STICKCLKSOURCE (0x1 <<  2) // (NVIC) Reference clock selection.
+#define AT91C_NVIC_STICKCOUNTFLAG (0x1 << 16) // (NVIC) Return 1 if timer counted to 0 since last read.
+// -------- NVIC_STICKRVR : (NVIC Offset: 0x14) SysTick Reload Value Register -------- 
+#define AT91C_NVIC_STICKRELOAD (0xFFFFFF <<  0) // (NVIC) SysTick reload value.
+// -------- NVIC_STICKCVR : (NVIC Offset: 0x18) SysTick Current Value Register -------- 
+#define AT91C_NVIC_STICKCURRENT (0x7FFFFFFF <<  0) // (NVIC) SysTick current value.
+// -------- NVIC_STICKCALVR : (NVIC Offset: 0x1c) SysTick Calibration Value Register -------- 
+#define AT91C_NVIC_STICKTENMS (0xFFFFFF <<  0) // (NVIC) Reload value to use for 10ms timing.
+#define AT91C_NVIC_STICKSKEW  (0x1 << 30) // (NVIC) Read as 1 if the calibration value is not exactly 10ms because of clock frequency.
+#define AT91C_NVIC_STICKNOREF (0x1 << 31) // (NVIC) Read as 1 if the reference clock is not provided.
+// -------- NVIC_IPR : (NVIC Offset: 0x400) Interrupt Priority Registers -------- 
+#define AT91C_NVIC_PRI_N      (0xFF <<  0) // (NVIC) Priority of interrupt N (0, 4, 8, etc)
+#define AT91C_NVIC_PRI_N1     (0xFF <<  8) // (NVIC) Priority of interrupt N+1 (1, 5, 9, etc)
+#define AT91C_NVIC_PRI_N2     (0xFF << 16) // (NVIC) Priority of interrupt N+2 (2, 6, 10, etc)
+#define AT91C_NVIC_PRI_N3     (0xFF << 24) // (NVIC) Priority of interrupt N+3 (3, 7, 11, etc)
+// -------- NVIC_CPUID : (NVIC Offset: 0xd00) CPU ID Base Register -------- 
+#define AT91C_NVIC_REVISION   (0xF <<  0) // (NVIC) Implementation defined revision number.
+#define AT91C_NVIC_PARTNO     (0xFFF <<  4) // (NVIC) Number of processor within family
+#define AT91C_NVIC_CONSTANT   (0xF << 16) // (NVIC) Reads as 0xF
+#define AT91C_NVIC_VARIANT    (0xF << 20) // (NVIC) Implementation defined variant number.
+#define AT91C_NVIC_IMPLEMENTER (0xFF << 24) // (NVIC) Implementer code. ARM is 0x41
+// -------- NVIC_ICSR : (NVIC Offset: 0xd04) Interrupt Control State Register -------- 
+#define AT91C_NVIC_VECTACTIVE (0x1FF <<  0) // (NVIC) Read-only Active ISR number field
+#define AT91C_NVIC_RETTOBASE  (0x1 << 11) // (NVIC) Read-only
+#define AT91C_NVIC_VECTPENDING (0x1FF << 12) // (NVIC) Read-only Pending ISR number field
+#define AT91C_NVIC_ISRPENDING (0x1 << 22) // (NVIC) Read-only Interrupt pending flag.
+#define AT91C_NVIC_ISRPREEMPT (0x1 << 23) // (NVIC) Read-only You must only use this at debug time
+#define AT91C_NVIC_PENDSTCLR  (0x1 << 25) // (NVIC) Write-only Clear pending SysTick bit
+#define AT91C_NVIC_PENDSTSET  (0x1 << 26) // (NVIC) Read/write Set a pending SysTick bit
+#define AT91C_NVIC_PENDSVCLR  (0x1 << 27) // (NVIC) Write-only Clear pending pendSV bit
+#define AT91C_NVIC_PENDSVSET  (0x1 << 28) // (NVIC) Read/write Set pending pendSV bit
+#define AT91C_NVIC_NMIPENDSET (0x1 << 31) // (NVIC) Read/write Set pending NMI
+// -------- NVIC_VTOFFR : (NVIC Offset: 0xd08) Vector Table Offset Register -------- 
+#define AT91C_NVIC_TBLOFF     (0x3FFFFF <<  7) // (NVIC) Vector table base offset field
+#define AT91C_NVIC_TBLBASE    (0x1 << 29) // (NVIC) Table base is in Code (0) or RAM (1)
+#define 	AT91C_NVIC_TBLBASE_CODE                 (0x0 << 29) // (NVIC) Table base is in CODE
+#define 	AT91C_NVIC_TBLBASE_RAM                  (0x1 << 29) // (NVIC) Table base is in RAM
+// -------- NVIC_AIRCR : (NVIC Offset: 0xd0c) Application Interrupt and Reset Control Register -------- 
+#define AT91C_NVIC_VECTRESET  (0x1 <<  0) // (NVIC) System Reset bit
+#define AT91C_NVIC_VECTCLRACTIVE (0x1 <<  1) // (NVIC) Clear active vector bit
+#define AT91C_NVIC_SYSRESETREQ (0x1 <<  2) // (NVIC) Causes a signal to be asserted to the outer system that indicates a reset is requested
+#define AT91C_NVIC_PRIGROUP   (0x7 <<  8) // (NVIC) Interrupt priority grouping field
+#define 	AT91C_NVIC_PRIGROUP_3                    (0x3 <<  8) // (NVIC) indicates four bits of pre-emption priority, none bit of subpriority
+#define 	AT91C_NVIC_PRIGROUP_4                    (0x4 <<  8) // (NVIC) indicates three bits of pre-emption priority, one bit of subpriority
+#define 	AT91C_NVIC_PRIGROUP_5                    (0x5 <<  8) // (NVIC) indicates two bits of pre-emption priority, two bits of subpriority
+#define 	AT91C_NVIC_PRIGROUP_6                    (0x6 <<  8) // (NVIC) indicates one bit of pre-emption priority, three bits of subpriority
+#define 	AT91C_NVIC_PRIGROUP_7                    (0x7 <<  8) // (NVIC) indicates no pre-emption priority, four bits of subpriority
+#define AT91C_NVIC_ENDIANESS  (0x1 << 15) // (NVIC) Data endianness bit
+#define AT91C_NVIC_VECTKEY    (0xFFFF << 16) // (NVIC) Register key
+// -------- NVIC_SCR : (NVIC Offset: 0xd10) System Control Register -------- 
+#define AT91C_NVIC_SLEEPONEXIT (0x1 <<  1) // (NVIC) Sleep on exit when returning from Handler mode to Thread mode
+#define AT91C_NVIC_SLEEPDEEP  (0x1 <<  2) // (NVIC) Sleep deep bit
+#define AT91C_NVIC_SEVONPEND  (0x1 <<  4) // (NVIC) When enabled, this causes WFE to wake up when an interrupt moves from inactive to pended
+// -------- NVIC_CCR : (NVIC Offset: 0xd14) Configuration Control Register -------- 
+#define AT91C_NVIC_NONEBASETHRDENA (0x1 <<  0) // (NVIC) When 0, default, It is only possible to enter Thread mode when returning from the last exception
+#define AT91C_NVIC_USERSETMPEND (0x1 <<  1) // (NVIC) 
+#define AT91C_NVIC_UNALIGN_TRP (0x1 <<  3) // (NVIC) Trap for unaligned access
+#define AT91C_NVIC_DIV_0_TRP  (0x1 <<  4) // (NVIC) Trap on Divide by 0
+#define AT91C_NVIC_BFHFNMIGN  (0x1 <<  8) // (NVIC) 
+#define AT91C_NVIC_STKALIGN   (0x1 <<  9) // (NVIC) 
+// -------- NVIC_HAND4PR : (NVIC Offset: 0xd18) System Handlers 4-7 Priority Register -------- 
+#define AT91C_NVIC_PRI_4      (0xFF <<  0) // (NVIC) 
+#define AT91C_NVIC_PRI_5      (0xFF <<  8) // (NVIC) 
+#define AT91C_NVIC_PRI_6      (0xFF << 16) // (NVIC) 
+#define AT91C_NVIC_PRI_7      (0xFF << 24) // (NVIC) 
+// -------- NVIC_HAND8PR : (NVIC Offset: 0xd1c) System Handlers 8-11 Priority Register -------- 
+#define AT91C_NVIC_PRI_8      (0xFF <<  0) // (NVIC) 
+#define AT91C_NVIC_PRI_9      (0xFF <<  8) // (NVIC) 
+#define AT91C_NVIC_PRI_10     (0xFF << 16) // (NVIC) 
+#define AT91C_NVIC_PRI_11     (0xFF << 24) // (NVIC) 
+// -------- NVIC_HAND12PR : (NVIC Offset: 0xd20) System Handlers 12-15 Priority Register -------- 
+#define AT91C_NVIC_PRI_12     (0xFF <<  0) // (NVIC) 
+#define AT91C_NVIC_PRI_13     (0xFF <<  8) // (NVIC) 
+#define AT91C_NVIC_PRI_14     (0xFF << 16) // (NVIC) 
+#define AT91C_NVIC_PRI_15     (0xFF << 24) // (NVIC) 
+// -------- NVIC_HANDCSR : (NVIC Offset: 0xd24) System Handler Control and State Register -------- 
+#define AT91C_NVIC_MEMFAULTACT (0x1 <<  0) // (NVIC) 
+#define AT91C_NVIC_BUSFAULTACT (0x1 <<  1) // (NVIC) 
+#define AT91C_NVIC_USGFAULTACT (0x1 <<  3) // (NVIC) 
+#define AT91C_NVIC_SVCALLACT  (0x1 <<  7) // (NVIC) 
+#define AT91C_NVIC_MONITORACT (0x1 <<  8) // (NVIC) 
+#define AT91C_NVIC_PENDSVACT  (0x1 << 10) // (NVIC) 
+#define AT91C_NVIC_SYSTICKACT (0x1 << 11) // (NVIC) 
+#define AT91C_NVIC_USGFAULTPENDED (0x1 << 12) // (NVIC) 
+#define AT91C_NVIC_MEMFAULTPENDED (0x1 << 13) // (NVIC) 
+#define AT91C_NVIC_BUSFAULTPENDED (0x1 << 14) // (NVIC) 
+#define AT91C_NVIC_SVCALLPENDED (0x1 << 15) // (NVIC) 
+#define AT91C_NVIC_MEMFAULTENA (0x1 << 16) // (NVIC) 
+#define AT91C_NVIC_BUSFAULTENA (0x1 << 17) // (NVIC) 
+#define AT91C_NVIC_USGFAULTENA (0x1 << 18) // (NVIC) 
+// -------- NVIC_CFSR : (NVIC Offset: 0xd28) Configurable Fault Status Registers -------- 
+#define AT91C_NVIC_MEMMANAGE  (0xFF <<  0) // (NVIC) 
+#define AT91C_NVIC_BUSFAULT   (0xFF <<  8) // (NVIC) 
+#define AT91C_NVIC_USAGEFAULT (0xFF << 16) // (NVIC) 
+// -------- NVIC_BFAR : (NVIC Offset: 0xd38) Bus Fault Address Register -------- 
+#define AT91C_NVIC_IBUSERR    (0x1 <<  0) // (NVIC) This bit indicates a bus fault on an instruction prefetch
+#define AT91C_NVIC_PRECISERR  (0x1 <<  1) // (NVIC) Precise data access error. The BFAR is written with the faulting address
+#define AT91C_NVIC_IMPRECISERR (0x1 <<  2) // (NVIC) Imprecise data access error
+#define AT91C_NVIC_UNSTKERR   (0x1 <<  3) // (NVIC) This bit indicates a derived bus fault has occurred on exception return
+#define AT91C_NVIC_STKERR     (0x1 <<  4) // (NVIC) This bit indicates a derived bus fault has occurred on exception entry
+#define AT91C_NVIC_BFARVALID  (0x1 <<  7) // (NVIC) This bit is set if the BFAR register has valid contents
+// -------- NVIC_PFR0 : (NVIC Offset: 0xd40) Processor Feature register0 (ID_PFR0) -------- 
+#define AT91C_NVIC_ID_PFR0_0  (0xF <<  0) // (NVIC) State0 (T-bit == 0)
+#define AT91C_NVIC_ID_PRF0_1  (0xF <<  4) // (NVIC) State1 (T-bit == 1)
+// -------- NVIC_PFR1 : (NVIC Offset: 0xd44) Processor Feature register1 (ID_PFR1) -------- 
+#define AT91C_NVIC_ID_PRF1_MODEL (0xF <<  8) // (NVIC) Microcontroller programmer’s model
+// -------- NVIC_DFR0 : (NVIC Offset: 0xd48) Debug Feature register0 (ID_DFR0) -------- 
+#define AT91C_NVIC_ID_DFR0_MODEL (0xF << 20) // (NVIC) Microcontroller Debug Model – memory mapped
+// -------- NVIC_MMFR0 : (NVIC Offset: 0xd50) Memory Model Feature register0 (ID_MMFR0) -------- 
+#define AT91C_NVIC_ID_MMFR0_PMSA (0xF <<  4) // (NVIC) Microcontroller Debug Model – memory mapped
+#define AT91C_NVIC_ID_MMFR0_CACHE (0xF <<  8) // (NVIC) Microcontroller Debug Model – memory mapped
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR NESTED vector Interrupt Controller
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_MPU {
+	AT91_REG	 MPU_TYPE; 	// MPU Type Register
+	AT91_REG	 MPU_CTRL; 	// MPU Control Register
+	AT91_REG	 MPU_REG_NB; 	// MPU Region Number Register
+	AT91_REG	 MPU_REG_BASE_ADDR; 	// MPU Region Base Address Register
+	AT91_REG	 MPU_ATTR_SIZE; 	// MPU  Attribute and Size Register
+	AT91_REG	 MPU_REG_BASE_ADDR1; 	// MPU Region Base Address Register alias 1
+	AT91_REG	 MPU_ATTR_SIZE1; 	// MPU  Attribute and Size Register alias 1
+	AT91_REG	 MPU_REG_BASE_ADDR2; 	// MPU Region Base Address Register alias 2
+	AT91_REG	 MPU_ATTR_SIZE2; 	// MPU  Attribute and Size Register alias 2
+	AT91_REG	 MPU_REG_BASE_ADDR3; 	// MPU Region Base Address Register alias 3
+	AT91_REG	 MPU_ATTR_SIZE3; 	// MPU  Attribute and Size Register alias 3
+} AT91S_MPU, *AT91PS_MPU;
+#else
+#define MPU_TYPE        (AT91_CAST(AT91_REG *) 	0x00000000) // (MPU_TYPE) MPU Type Register
+#define MPU_CTRL        (AT91_CAST(AT91_REG *) 	0x00000004) // (MPU_CTRL) MPU Control Register
+#define MPU_REG_NB      (AT91_CAST(AT91_REG *) 	0x00000008) // (MPU_REG_NB) MPU Region Number Register
+#define MPU_REG_BASE_ADDR (AT91_CAST(AT91_REG *) 	0x0000000C) // (MPU_REG_BASE_ADDR) MPU Region Base Address Register
+#define MPU_ATTR_SIZE   (AT91_CAST(AT91_REG *) 	0x00000010) // (MPU_ATTR_SIZE) MPU  Attribute and Size Register
+#define MPU_REG_BASE_ADDR1 (AT91_CAST(AT91_REG *) 	0x00000014) // (MPU_REG_BASE_ADDR1) MPU Region Base Address Register alias 1
+#define MPU_ATTR_SIZE1  (AT91_CAST(AT91_REG *) 	0x00000018) // (MPU_ATTR_SIZE1) MPU  Attribute and Size Register alias 1
+#define MPU_REG_BASE_ADDR2 (AT91_CAST(AT91_REG *) 	0x0000001C) // (MPU_REG_BASE_ADDR2) MPU Region Base Address Register alias 2
+#define MPU_ATTR_SIZE2  (AT91_CAST(AT91_REG *) 	0x00000020) // (MPU_ATTR_SIZE2) MPU  Attribute and Size Register alias 2
+#define MPU_REG_BASE_ADDR3 (AT91_CAST(AT91_REG *) 	0x00000024) // (MPU_REG_BASE_ADDR3) MPU Region Base Address Register alias 3
+#define MPU_ATTR_SIZE3  (AT91_CAST(AT91_REG *) 	0x00000028) // (MPU_ATTR_SIZE3) MPU  Attribute and Size Register alias 3
+
+#endif
+// -------- MPU_TYPE : (MPU Offset: 0x0)  -------- 
+#define AT91C_MPU_SEPARATE    (0x1 <<  0) // (MPU) 
+#define AT91C_MPU_DREGION     (0xFF <<  8) // (MPU) 
+#define AT91C_MPU_IREGION     (0xFF << 16) // (MPU) 
+// -------- MPU_CTRL : (MPU Offset: 0x4)  -------- 
+#define AT91C_MPU_ENABLE      (0x1 <<  0) // (MPU) 
+#define AT91C_MPU_HFNMIENA    (0x1 <<  1) // (MPU) 
+#define AT91C_MPU_PRIVDEFENA  (0x1 <<  2) // (MPU) 
+// -------- MPU_REG_NB : (MPU Offset: 0x8)  -------- 
+#define AT91C_MPU_REGION      (0xFF <<  0) // (MPU) 
+// -------- MPU_REG_BASE_ADDR : (MPU Offset: 0xc)  -------- 
+#define AT91C_MPU_REG         (0xF <<  0) // (MPU) 
+#define AT91C_MPU_VALID       (0x1 <<  4) // (MPU) 
+#define AT91C_MPU_ADDR        (0x3FFFFFF <<  5) // (MPU) 
+// -------- MPU_ATTR_SIZE : (MPU Offset: 0x10)  -------- 
+#define AT91C_MPU_ENA         (0x1 <<  0) // (MPU) 
+#define AT91C_MPU_SIZE        (0xF <<  1) // (MPU) 
+#define AT91C_MPU_SRD         (0xFF <<  8) // (MPU) 
+#define AT91C_MPU_B           (0x1 << 16) // (MPU) 
+#define AT91C_MPU_C           (0x1 << 17) // (MPU) 
+#define AT91C_MPU_S           (0x1 << 18) // (MPU) 
+#define AT91C_MPU_TEX         (0x7 << 19) // (MPU) 
+#define AT91C_MPU_AP          (0x7 << 24) // (MPU) 
+#define AT91C_MPU_XN          (0x7 << 28) // (MPU) 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR CORTEX_M3 Registers
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_CM3 {
+	AT91_REG	 CM3_CPUID; 	// CPU ID Base Register
+	AT91_REG	 CM3_ICSR; 	// Interrupt Control State Register
+	AT91_REG	 CM3_VTOR; 	// Vector Table Offset Register
+	AT91_REG	 CM3_AIRCR; 	// Application Interrupt and Reset Control Register
+	AT91_REG	 CM3_SCR; 	// System Controller Register
+	AT91_REG	 CM3_CCR; 	// Configuration Control Register
+	AT91_REG	 CM3_SHPR[3]; 	// System Handler Priority Register
+	AT91_REG	 CM3_SHCSR; 	// System Handler Control and State Register
+} AT91S_CM3, *AT91PS_CM3;
+#else
+#define CM3_CPUID       (AT91_CAST(AT91_REG *) 	0x00000000) // (CM3_CPUID) CPU ID Base Register
+#define CM3_ICSR        (AT91_CAST(AT91_REG *) 	0x00000004) // (CM3_ICSR) Interrupt Control State Register
+#define CM3_VTOR        (AT91_CAST(AT91_REG *) 	0x00000008) // (CM3_VTOR) Vector Table Offset Register
+#define CM3_AIRCR       (AT91_CAST(AT91_REG *) 	0x0000000C) // (CM3_AIRCR) Application Interrupt and Reset Control Register
+#define CM3_SCR         (AT91_CAST(AT91_REG *) 	0x00000010) // (CM3_SCR) System Controller Register
+#define CM3_CCR         (AT91_CAST(AT91_REG *) 	0x00000014) // (CM3_CCR) Configuration Control Register
+#define CM3_SHPR        (AT91_CAST(AT91_REG *) 	0x00000018) // (CM3_SHPR) System Handler Priority Register
+#define CM3_SHCSR       (AT91_CAST(AT91_REG *) 	0x00000024) // (CM3_SHCSR) System Handler Control and State Register
+
+#endif
+// -------- CM3_CPUID : (CM3 Offset: 0x0)  -------- 
+// -------- CM3_AIRCR : (CM3 Offset: 0xc)  -------- 
+#define AT91C_CM3_SYSRESETREQ (0x1 <<  2) // (CM3) A reset is requested by the processor.
+// -------- CM3_SCR : (CM3 Offset: 0x10)  -------- 
+#define AT91C_CM3_SLEEPONEXIT (0x1 <<  1) // (CM3) Sleep on exit when returning from Handler mode to Thread mode. Enables interrupt driven applications to avoid returning to empty main application.
+#define AT91C_CM3_SLEEPDEEP   (0x1 <<  2) // (CM3) Sleep deep bit.
+#define AT91C_CM3_SEVONPEND   (0x1 <<  4) // (CM3) When enabled, this causes WFE to wake up when an interrupt moves from inactive to pended.
+// -------- CM3_SHCSR : (CM3 Offset: 0x24)  -------- 
+#define AT91C_CM3_SYSTICKACT  (0x1 << 11) // (CM3) Reads as 1 if SysTick is active.
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Peripheral DMA Controller
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_PDC {
+	AT91_REG	 PDC_RPR; 	// Receive Pointer Register
+	AT91_REG	 PDC_RCR; 	// Receive Counter Register
+	AT91_REG	 PDC_TPR; 	// Transmit Pointer Register
+	AT91_REG	 PDC_TCR; 	// Transmit Counter Register
+	AT91_REG	 PDC_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 PDC_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 PDC_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 PDC_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 PDC_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 PDC_PTSR; 	// PDC Transfer Status Register
+} AT91S_PDC, *AT91PS_PDC;
+#else
+#define PDC_RPR         (AT91_CAST(AT91_REG *) 	0x00000000) // (PDC_RPR) Receive Pointer Register
+#define PDC_RCR         (AT91_CAST(AT91_REG *) 	0x00000004) // (PDC_RCR) Receive Counter Register
+#define PDC_TPR         (AT91_CAST(AT91_REG *) 	0x00000008) // (PDC_TPR) Transmit Pointer Register
+#define PDC_TCR         (AT91_CAST(AT91_REG *) 	0x0000000C) // (PDC_TCR) Transmit Counter Register
+#define PDC_RNPR        (AT91_CAST(AT91_REG *) 	0x00000010) // (PDC_RNPR) Receive Next Pointer Register
+#define PDC_RNCR        (AT91_CAST(AT91_REG *) 	0x00000014) // (PDC_RNCR) Receive Next Counter Register
+#define PDC_TNPR        (AT91_CAST(AT91_REG *) 	0x00000018) // (PDC_TNPR) Transmit Next Pointer Register
+#define PDC_TNCR        (AT91_CAST(AT91_REG *) 	0x0000001C) // (PDC_TNCR) Transmit Next Counter Register
+#define PDC_PTCR        (AT91_CAST(AT91_REG *) 	0x00000020) // (PDC_PTCR) PDC Transfer Control Register
+#define PDC_PTSR        (AT91_CAST(AT91_REG *) 	0x00000024) // (PDC_PTSR) PDC Transfer Status Register
+
+#endif
+// -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register -------- 
+#define AT91C_PDC_RXTEN       (0x1 <<  0) // (PDC) Receiver Transfer Enable
+#define AT91C_PDC_RXTDIS      (0x1 <<  1) // (PDC) Receiver Transfer Disable
+#define AT91C_PDC_TXTEN       (0x1 <<  8) // (PDC) Transmitter Transfer Enable
+#define AT91C_PDC_TXTDIS      (0x1 <<  9) // (PDC) Transmitter Transfer Disable
+// -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Debug Unit
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_DBGU {
+	AT91_REG	 DBGU_CR; 	// Control Register
+	AT91_REG	 DBGU_MR; 	// Mode Register
+	AT91_REG	 DBGU_IER; 	// Interrupt Enable Register
+	AT91_REG	 DBGU_IDR; 	// Interrupt Disable Register
+	AT91_REG	 DBGU_IMR; 	// Interrupt Mask Register
+	AT91_REG	 DBGU_CSR; 	// Channel Status Register
+	AT91_REG	 DBGU_RHR; 	// Receiver Holding Register
+	AT91_REG	 DBGU_THR; 	// Transmitter Holding Register
+	AT91_REG	 DBGU_BRGR; 	// Baud Rate Generator Register
+	AT91_REG	 Reserved0[9]; 	// 
+	AT91_REG	 DBGU_FNTR; 	// Force NTRST Register
+	AT91_REG	 Reserved1[40]; 	// 
+	AT91_REG	 DBGU_ADDRSIZE; 	// DBGU ADDRSIZE REGISTER 
+	AT91_REG	 DBGU_IPNAME1; 	// DBGU IPNAME1 REGISTER 
+	AT91_REG	 DBGU_IPNAME2; 	// DBGU IPNAME2 REGISTER 
+	AT91_REG	 DBGU_FEATURES; 	// DBGU FEATURES REGISTER 
+	AT91_REG	 DBGU_VER; 	// DBGU VERSION REGISTER 
+	AT91_REG	 DBGU_RPR; 	// Receive Pointer Register
+	AT91_REG	 DBGU_RCR; 	// Receive Counter Register
+	AT91_REG	 DBGU_TPR; 	// Transmit Pointer Register
+	AT91_REG	 DBGU_TCR; 	// Transmit Counter Register
+	AT91_REG	 DBGU_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 DBGU_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 DBGU_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 DBGU_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 DBGU_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 DBGU_PTSR; 	// PDC Transfer Status Register
+	AT91_REG	 Reserved2[6]; 	// 
+	AT91_REG	 DBGU_CIDR; 	// Chip ID Register
+	AT91_REG	 DBGU_EXID; 	// Chip ID Extension Register
+} AT91S_DBGU, *AT91PS_DBGU;
+#else
+#define DBGU_CR         (AT91_CAST(AT91_REG *) 	0x00000000) // (DBGU_CR) Control Register
+#define DBGU_MR         (AT91_CAST(AT91_REG *) 	0x00000004) // (DBGU_MR) Mode Register
+#define DBGU_IER        (AT91_CAST(AT91_REG *) 	0x00000008) // (DBGU_IER) Interrupt Enable Register
+#define DBGU_IDR        (AT91_CAST(AT91_REG *) 	0x0000000C) // (DBGU_IDR) Interrupt Disable Register
+#define DBGU_IMR        (AT91_CAST(AT91_REG *) 	0x00000010) // (DBGU_IMR) Interrupt Mask Register
+#define DBGU_CSR        (AT91_CAST(AT91_REG *) 	0x00000014) // (DBGU_CSR) Channel Status Register
+#define DBGU_RHR        (AT91_CAST(AT91_REG *) 	0x00000018) // (DBGU_RHR) Receiver Holding Register
+#define DBGU_THR        (AT91_CAST(AT91_REG *) 	0x0000001C) // (DBGU_THR) Transmitter Holding Register
+#define DBGU_BRGR       (AT91_CAST(AT91_REG *) 	0x00000020) // (DBGU_BRGR) Baud Rate Generator Register
+#define DBGU_FNTR       (AT91_CAST(AT91_REG *) 	0x00000048) // (DBGU_FNTR) Force NTRST Register
+#define DBGU_ADDRSIZE   (AT91_CAST(AT91_REG *) 	0x000000EC) // (DBGU_ADDRSIZE) DBGU ADDRSIZE REGISTER 
+#define DBGU_IPNAME1    (AT91_CAST(AT91_REG *) 	0x000000F0) // (DBGU_IPNAME1) DBGU IPNAME1 REGISTER 
+#define DBGU_IPNAME2    (AT91_CAST(AT91_REG *) 	0x000000F4) // (DBGU_IPNAME2) DBGU IPNAME2 REGISTER 
+#define DBGU_FEATURES   (AT91_CAST(AT91_REG *) 	0x000000F8) // (DBGU_FEATURES) DBGU FEATURES REGISTER 
+#define DBGU_VER        (AT91_CAST(AT91_REG *) 	0x000000FC) // (DBGU_VER) DBGU VERSION REGISTER 
+#define DBGU_CIDR       (AT91_CAST(AT91_REG *) 	0x00000140) // (DBGU_CIDR) Chip ID Register
+#define DBGU_EXID       (AT91_CAST(AT91_REG *) 	0x00000144) // (DBGU_EXID) Chip ID Extension Register
+
+#endif
+// -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register -------- 
+#define AT91C_DBGU_RSTRX      (0x1 <<  2) // (DBGU) Reset Receiver
+#define AT91C_DBGU_RSTTX      (0x1 <<  3) // (DBGU) Reset Transmitter
+#define AT91C_DBGU_RXEN       (0x1 <<  4) // (DBGU) Receiver Enable
+#define AT91C_DBGU_RXDIS      (0x1 <<  5) // (DBGU) Receiver Disable
+#define AT91C_DBGU_TXEN       (0x1 <<  6) // (DBGU) Transmitter Enable
+#define AT91C_DBGU_TXDIS      (0x1 <<  7) // (DBGU) Transmitter Disable
+#define AT91C_DBGU_RSTSTA     (0x1 <<  8) // (DBGU) Reset Status Bits
+// -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register -------- 
+#define AT91C_DBGU_PAR        (0x7 <<  9) // (DBGU) Parity type
+#define 	AT91C_DBGU_PAR_EVEN                 (0x0 <<  9) // (DBGU) Even Parity
+#define 	AT91C_DBGU_PAR_ODD                  (0x1 <<  9) // (DBGU) Odd Parity
+#define 	AT91C_DBGU_PAR_SPACE                (0x2 <<  9) // (DBGU) Parity forced to 0 (Space)
+#define 	AT91C_DBGU_PAR_MARK                 (0x3 <<  9) // (DBGU) Parity forced to 1 (Mark)
+#define 	AT91C_DBGU_PAR_NONE                 (0x4 <<  9) // (DBGU) No Parity
+#define AT91C_DBGU_CHMODE     (0x3 << 14) // (DBGU) Channel Mode
+#define 	AT91C_DBGU_CHMODE_NORMAL               (0x0 << 14) // (DBGU) Normal Mode: The debug unit channel operates as an RX/TX debug unit.
+#define 	AT91C_DBGU_CHMODE_AUTO                 (0x1 << 14) // (DBGU) Automatic Echo: Receiver Data Input is connected to the TXD pin.
+#define 	AT91C_DBGU_CHMODE_LOCAL                (0x2 << 14) // (DBGU) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
+#define 	AT91C_DBGU_CHMODE_REMOTE               (0x3 << 14) // (DBGU) Remote Loopback: RXD pin is internally connected to TXD pin.
+// -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+#define AT91C_DBGU_RXRDY      (0x1 <<  0) // (DBGU) RXRDY Interrupt
+#define AT91C_DBGU_TXRDY      (0x1 <<  1) // (DBGU) TXRDY Interrupt
+#define AT91C_DBGU_ENDRX      (0x1 <<  3) // (DBGU) End of Receive Transfer Interrupt
+#define AT91C_DBGU_ENDTX      (0x1 <<  4) // (DBGU) End of Transmit Interrupt
+#define AT91C_DBGU_OVRE       (0x1 <<  5) // (DBGU) Overrun Interrupt
+#define AT91C_DBGU_FRAME      (0x1 <<  6) // (DBGU) Framing Error Interrupt
+#define AT91C_DBGU_PARE       (0x1 <<  7) // (DBGU) Parity Error Interrupt
+#define AT91C_DBGU_TXEMPTY    (0x1 <<  9) // (DBGU) TXEMPTY Interrupt
+#define AT91C_DBGU_TXBUFE     (0x1 << 11) // (DBGU) TXBUFE Interrupt
+#define AT91C_DBGU_RXBUFF     (0x1 << 12) // (DBGU) RXBUFF Interrupt
+#define AT91C_DBGU_COMM_TX    (0x1 << 30) // (DBGU) COMM_TX Interrupt
+#define AT91C_DBGU_COMM_RX    (0x1 << 31) // (DBGU) COMM_RX Interrupt
+// -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+// -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+// -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register -------- 
+// -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register -------- 
+#define AT91C_DBGU_FORCE_NTRST (0x1 <<  0) // (DBGU) Force NTRST in JTAG
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Parallel Input Output Controler
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_PIO {
+	AT91_REG	 PIO_PER; 	// PIO Enable Register
+	AT91_REG	 PIO_PDR; 	// PIO Disable Register
+	AT91_REG	 PIO_PSR; 	// PIO Status Register
+	AT91_REG	 Reserved0[1]; 	// 
+	AT91_REG	 PIO_OER; 	// Output Enable Register
+	AT91_REG	 PIO_ODR; 	// Output Disable Registerr
+	AT91_REG	 PIO_OSR; 	// Output Status Register
+	AT91_REG	 Reserved1[1]; 	// 
+	AT91_REG	 PIO_IFER; 	// Input Filter Enable Register
+	AT91_REG	 PIO_IFDR; 	// Input Filter Disable Register
+	AT91_REG	 PIO_IFSR; 	// Input Filter Status Register
+	AT91_REG	 Reserved2[1]; 	// 
+	AT91_REG	 PIO_SODR; 	// Set Output Data Register
+	AT91_REG	 PIO_CODR; 	// Clear Output Data Register
+	AT91_REG	 PIO_ODSR; 	// Output Data Status Register
+	AT91_REG	 PIO_PDSR; 	// Pin Data Status Register
+	AT91_REG	 PIO_IER; 	// Interrupt Enable Register
+	AT91_REG	 PIO_IDR; 	// Interrupt Disable Register
+	AT91_REG	 PIO_IMR; 	// Interrupt Mask Register
+	AT91_REG	 PIO_ISR; 	// Interrupt Status Register
+	AT91_REG	 PIO_MDER; 	// Multi-driver Enable Register
+	AT91_REG	 PIO_MDDR; 	// Multi-driver Disable Register
+	AT91_REG	 PIO_MDSR; 	// Multi-driver Status Register
+	AT91_REG	 Reserved3[1]; 	// 
+	AT91_REG	 PIO_PPUDR; 	// Pull-up Disable Register
+	AT91_REG	 PIO_PPUER; 	// Pull-up Enable Register
+	AT91_REG	 PIO_PPUSR; 	// Pull-up Status Register
+	AT91_REG	 Reserved4[1]; 	// 
+	AT91_REG	 PIO_ABSR; 	// Peripheral AB Select Register
+	AT91_REG	 Reserved5[3]; 	// 
+	AT91_REG	 PIO_SCIFSR; 	// System Clock Glitch Input Filter Select Register
+	AT91_REG	 PIO_DIFSR; 	// Debouncing Input Filter Select Register
+	AT91_REG	 PIO_IFDGSR; 	// Glitch or Debouncing Input Filter Clock Selection Status Register
+	AT91_REG	 PIO_SCDR; 	// Slow Clock Divider Debouncing Register
+	AT91_REG	 Reserved6[4]; 	// 
+	AT91_REG	 PIO_OWER; 	// Output Write Enable Register
+	AT91_REG	 PIO_OWDR; 	// Output Write Disable Register
+	AT91_REG	 PIO_OWSR; 	// Output Write Status Register
+	AT91_REG	 Reserved7[1]; 	// 
+	AT91_REG	 PIO_AIMER; 	// Additional Interrupt Modes Enable Register
+	AT91_REG	 PIO_AIMDR; 	// Additional Interrupt Modes Disables Register
+	AT91_REG	 PIO_AIMMR; 	// Additional Interrupt Modes Mask Register
+	AT91_REG	 Reserved8[1]; 	// 
+	AT91_REG	 PIO_ESR; 	// Edge Select Register
+	AT91_REG	 PIO_LSR; 	// Level Select Register
+	AT91_REG	 PIO_ELSR; 	// Edge/Level Status Register
+	AT91_REG	 Reserved9[1]; 	// 
+	AT91_REG	 PIO_FELLSR; 	// Falling Edge/Low Level Select Register
+	AT91_REG	 PIO_REHLSR; 	// Rising Edge/ High Level Select Register
+	AT91_REG	 PIO_FRLHSR; 	// Fall/Rise - Low/High Status Register
+	AT91_REG	 Reserved10[1]; 	// 
+	AT91_REG	 PIO_LOCKSR; 	// Lock Status Register
+	AT91_REG	 Reserved11[6]; 	// 
+	AT91_REG	 PIO_VER; 	// PIO VERSION REGISTER 
+	AT91_REG	 Reserved12[8]; 	// 
+	AT91_REG	 PIO_KER; 	// Keypad Controller Enable Register
+	AT91_REG	 PIO_KRCR; 	// Keypad Controller Row Column Register
+	AT91_REG	 PIO_KDR; 	// Keypad Controller Debouncing Register
+	AT91_REG	 Reserved13[1]; 	// 
+	AT91_REG	 PIO_KIER; 	// Keypad Controller Interrupt Enable Register
+	AT91_REG	 PIO_KIDR; 	// Keypad Controller Interrupt Disable Register
+	AT91_REG	 PIO_KIMR; 	// Keypad Controller Interrupt Mask Register
+	AT91_REG	 PIO_KSR; 	// Keypad Controller Status Register
+	AT91_REG	 PIO_KKPR; 	// Keypad Controller Key Press Register
+	AT91_REG	 PIO_KKRR; 	// Keypad Controller Key Release Register
+} AT91S_PIO, *AT91PS_PIO;
+#else
+#define PIO_PER         (AT91_CAST(AT91_REG *) 	0x00000000) // (PIO_PER) PIO Enable Register
+#define PIO_PDR         (AT91_CAST(AT91_REG *) 	0x00000004) // (PIO_PDR) PIO Disable Register
+#define PIO_PSR         (AT91_CAST(AT91_REG *) 	0x00000008) // (PIO_PSR) PIO Status Register
+#define PIO_OER         (AT91_CAST(AT91_REG *) 	0x00000010) // (PIO_OER) Output Enable Register
+#define PIO_ODR         (AT91_CAST(AT91_REG *) 	0x00000014) // (PIO_ODR) Output Disable Registerr
+#define PIO_OSR         (AT91_CAST(AT91_REG *) 	0x00000018) // (PIO_OSR) Output Status Register
+#define PIO_IFER        (AT91_CAST(AT91_REG *) 	0x00000020) // (PIO_IFER) Input Filter Enable Register
+#define PIO_IFDR        (AT91_CAST(AT91_REG *) 	0x00000024) // (PIO_IFDR) Input Filter Disable Register
+#define PIO_IFSR        (AT91_CAST(AT91_REG *) 	0x00000028) // (PIO_IFSR) Input Filter Status Register
+#define PIO_SODR        (AT91_CAST(AT91_REG *) 	0x00000030) // (PIO_SODR) Set Output Data Register
+#define PIO_CODR        (AT91_CAST(AT91_REG *) 	0x00000034) // (PIO_CODR) Clear Output Data Register
+#define PIO_ODSR        (AT91_CAST(AT91_REG *) 	0x00000038) // (PIO_ODSR) Output Data Status Register
+#define PIO_PDSR        (AT91_CAST(AT91_REG *) 	0x0000003C) // (PIO_PDSR) Pin Data Status Register
+#define PIO_IER         (AT91_CAST(AT91_REG *) 	0x00000040) // (PIO_IER) Interrupt Enable Register
+#define PIO_IDR         (AT91_CAST(AT91_REG *) 	0x00000044) // (PIO_IDR) Interrupt Disable Register
+#define PIO_IMR         (AT91_CAST(AT91_REG *) 	0x00000048) // (PIO_IMR) Interrupt Mask Register
+#define PIO_ISR         (AT91_CAST(AT91_REG *) 	0x0000004C) // (PIO_ISR) Interrupt Status Register
+#define PIO_MDER        (AT91_CAST(AT91_REG *) 	0x00000050) // (PIO_MDER) Multi-driver Enable Register
+#define PIO_MDDR        (AT91_CAST(AT91_REG *) 	0x00000054) // (PIO_MDDR) Multi-driver Disable Register
+#define PIO_MDSR        (AT91_CAST(AT91_REG *) 	0x00000058) // (PIO_MDSR) Multi-driver Status Register
+#define PIO_PPUDR       (AT91_CAST(AT91_REG *) 	0x00000060) // (PIO_PPUDR) Pull-up Disable Register
+#define PIO_PPUER       (AT91_CAST(AT91_REG *) 	0x00000064) // (PIO_PPUER) Pull-up Enable Register
+#define PIO_PPUSR       (AT91_CAST(AT91_REG *) 	0x00000068) // (PIO_PPUSR) Pull-up Status Register
+#define PIO_ABSR        (AT91_CAST(AT91_REG *) 	0x00000070) // (PIO_ABSR) Peripheral AB Select Register
+#define PIO_SCIFSR      (AT91_CAST(AT91_REG *) 	0x00000080) // (PIO_SCIFSR) System Clock Glitch Input Filter Select Register
+#define PIO_DIFSR       (AT91_CAST(AT91_REG *) 	0x00000084) // (PIO_DIFSR) Debouncing Input Filter Select Register
+#define PIO_IFDGSR      (AT91_CAST(AT91_REG *) 	0x00000088) // (PIO_IFDGSR) Glitch or Debouncing Input Filter Clock Selection Status Register
+#define PIO_SCDR        (AT91_CAST(AT91_REG *) 	0x0000008C) // (PIO_SCDR) Slow Clock Divider Debouncing Register
+#define PIO_OWER        (AT91_CAST(AT91_REG *) 	0x000000A0) // (PIO_OWER) Output Write Enable Register
+#define PIO_OWDR        (AT91_CAST(AT91_REG *) 	0x000000A4) // (PIO_OWDR) Output Write Disable Register
+#define PIO_OWSR        (AT91_CAST(AT91_REG *) 	0x000000A8) // (PIO_OWSR) Output Write Status Register
+#define PIO_AIMER       (AT91_CAST(AT91_REG *) 	0x000000B0) // (PIO_AIMER) Additional Interrupt Modes Enable Register
+#define PIO_AIMDR       (AT91_CAST(AT91_REG *) 	0x000000B4) // (PIO_AIMDR) Additional Interrupt Modes Disables Register
+#define PIO_AIMMR       (AT91_CAST(AT91_REG *) 	0x000000B8) // (PIO_AIMMR) Additional Interrupt Modes Mask Register
+#define PIO_ESR         (AT91_CAST(AT91_REG *) 	0x000000C0) // (PIO_ESR) Edge Select Register
+#define PIO_LSR         (AT91_CAST(AT91_REG *) 	0x000000C4) // (PIO_LSR) Level Select Register
+#define PIO_ELSR        (AT91_CAST(AT91_REG *) 	0x000000C8) // (PIO_ELSR) Edge/Level Status Register
+#define PIO_FELLSR      (AT91_CAST(AT91_REG *) 	0x000000D0) // (PIO_FELLSR) Falling Edge/Low Level Select Register
+#define PIO_REHLSR      (AT91_CAST(AT91_REG *) 	0x000000D4) // (PIO_REHLSR) Rising Edge/ High Level Select Register
+#define PIO_FRLHSR      (AT91_CAST(AT91_REG *) 	0x000000D8) // (PIO_FRLHSR) Fall/Rise - Low/High Status Register
+#define PIO_LOCKSR      (AT91_CAST(AT91_REG *) 	0x000000E0) // (PIO_LOCKSR) Lock Status Register
+#define PIO_VER         (AT91_CAST(AT91_REG *) 	0x000000FC) // (PIO_VER) PIO VERSION REGISTER 
+#define PIO_KER         (AT91_CAST(AT91_REG *) 	0x00000120) // (PIO_KER) Keypad Controller Enable Register
+#define PIO_KRCR        (AT91_CAST(AT91_REG *) 	0x00000124) // (PIO_KRCR) Keypad Controller Row Column Register
+#define PIO_KDR         (AT91_CAST(AT91_REG *) 	0x00000128) // (PIO_KDR) Keypad Controller Debouncing Register
+#define PIO_KIER        (AT91_CAST(AT91_REG *) 	0x00000130) // (PIO_KIER) Keypad Controller Interrupt Enable Register
+#define PIO_KIDR        (AT91_CAST(AT91_REG *) 	0x00000134) // (PIO_KIDR) Keypad Controller Interrupt Disable Register
+#define PIO_KIMR        (AT91_CAST(AT91_REG *) 	0x00000138) // (PIO_KIMR) Keypad Controller Interrupt Mask Register
+#define PIO_KSR         (AT91_CAST(AT91_REG *) 	0x0000013C) // (PIO_KSR) Keypad Controller Status Register
+#define PIO_KKPR        (AT91_CAST(AT91_REG *) 	0x00000140) // (PIO_KKPR) Keypad Controller Key Press Register
+#define PIO_KKRR        (AT91_CAST(AT91_REG *) 	0x00000144) // (PIO_KKRR) Keypad Controller Key Release Register
+
+#endif
+// -------- PIO_KER : (PIO Offset: 0x120) Keypad Controller Enable Register -------- 
+#define AT91C_PIO_KCE         (0x1 <<  0) // (PIO) Keypad Controller Enable
+// -------- PIO_KRCR : (PIO Offset: 0x124) Keypad Controller Row Column Register -------- 
+#define AT91C_PIO_NBR         (0x7 <<  0) // (PIO) Number of Columns of the Keypad Matrix
+#define AT91C_PIO_NBC         (0x7 <<  8) // (PIO) Number of Rows of the Keypad Matrix
+// -------- PIO_KDR : (PIO Offset: 0x128) Keypad Controller Debouncing Register -------- 
+#define AT91C_PIO_DBC         (0x3FF <<  0) // (PIO) Debouncing Value
+// -------- PIO_KIER : (PIO Offset: 0x130) Keypad Controller Interrupt Enable Register -------- 
+#define AT91C_PIO_KPR         (0x1 <<  0) // (PIO) Key Press Interrupt Enable
+#define AT91C_PIO_KRL         (0x1 <<  1) // (PIO) Key Release Interrupt Enable
+// -------- PIO_KIDR : (PIO Offset: 0x134) Keypad Controller Interrupt Disable Register -------- 
+// -------- PIO_KIMR : (PIO Offset: 0x138) Keypad Controller Interrupt Mask Register -------- 
+// -------- PIO_KSR : (PIO Offset: 0x13c) Keypad Controller Status Register -------- 
+#define AT91C_PIO_NBKPR       (0x3 <<  8) // (PIO) Number of Simultaneous Key Presses
+#define AT91C_PIO_NBKRL       (0x3 << 16) // (PIO) Number of Simultaneous Key Releases
+// -------- PIO_KKPR : (PIO Offset: 0x140) Keypad Controller Key Press Register -------- 
+#define AT91C_KEY0ROW         (0x7 <<  0) // (PIO) Row index of the first detected Key Press
+#define AT91C_KEY0COL         (0x7 <<  4) // (PIO) Column index of the first detected Key Press
+#define AT91C_KEY1ROW         (0x7 <<  8) // (PIO) Row index of the second detected Key Press
+#define AT91C_KEY1COL         (0x7 << 12) // (PIO) Column index of the second detected Key Press
+#define AT91C_KEY2ROW         (0x7 << 16) // (PIO) Row index of the third detected Key Press
+#define AT91C_KEY2COL         (0x7 << 20) // (PIO) Column index of the third detected Key Press
+#define AT91C_KEY3ROW         (0x7 << 24) // (PIO) Row index of the fourth detected Key Press
+#define AT91C_KEY3COL         (0x7 << 28) // (PIO) Column index of the fourth detected Key Press
+// -------- PIO_KKRR : (PIO Offset: 0x144) Keypad Controller Key Release Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Power Management Controler
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_PMC {
+	AT91_REG	 PMC_SCER; 	// System Clock Enable Register
+	AT91_REG	 PMC_SCDR; 	// System Clock Disable Register
+	AT91_REG	 PMC_SCSR; 	// System Clock Status Register
+	AT91_REG	 Reserved0[1]; 	// 
+	AT91_REG	 PMC_PCER; 	// Peripheral Clock Enable Register
+	AT91_REG	 PMC_PCDR; 	// Peripheral Clock Disable Register
+	AT91_REG	 PMC_PCSR; 	// Peripheral Clock Status Register
+	AT91_REG	 PMC_UCKR; 	// UTMI Clock Configuration Register
+	AT91_REG	 PMC_MOR; 	// Main Oscillator Register
+	AT91_REG	 PMC_MCFR; 	// Main Clock  Frequency Register
+	AT91_REG	 PMC_PLLAR; 	// PLL Register
+	AT91_REG	 Reserved1[1]; 	// 
+	AT91_REG	 PMC_MCKR; 	// Master Clock Register
+	AT91_REG	 Reserved2[3]; 	// 
+	AT91_REG	 PMC_PCKR[8]; 	// Programmable Clock Register
+	AT91_REG	 PMC_IER; 	// Interrupt Enable Register
+	AT91_REG	 PMC_IDR; 	// Interrupt Disable Register
+	AT91_REG	 PMC_SR; 	// Status Register
+	AT91_REG	 PMC_IMR; 	// Interrupt Mask Register
+	AT91_REG	 PMC_FSMR; 	// Fast Startup Mode Register
+	AT91_REG	 PMC_FSPR; 	// Fast Startup Polarity Register
+	AT91_REG	 PMC_FOCR; 	// Fault Output Clear Register
+	AT91_REG	 Reserved3[28]; 	// 
+	AT91_REG	 PMC_ADDRSIZE; 	// PMC ADDRSIZE REGISTER 
+	AT91_REG	 PMC_IPNAME1; 	// PMC IPNAME1 REGISTER 
+	AT91_REG	 PMC_IPNAME2; 	// PMC IPNAME2 REGISTER 
+	AT91_REG	 PMC_FEATURES; 	// PMC FEATURES REGISTER 
+	AT91_REG	 PMC_VER; 	// APMC VERSION REGISTER
+} AT91S_PMC, *AT91PS_PMC;
+#else
+#define PMC_SCER        (AT91_CAST(AT91_REG *) 	0x00000000) // (PMC_SCER) System Clock Enable Register
+#define PMC_SCDR        (AT91_CAST(AT91_REG *) 	0x00000004) // (PMC_SCDR) System Clock Disable Register
+#define PMC_SCSR        (AT91_CAST(AT91_REG *) 	0x00000008) // (PMC_SCSR) System Clock Status Register
+#define PMC_PCER        (AT91_CAST(AT91_REG *) 	0x00000010) // (PMC_PCER) Peripheral Clock Enable Register
+#define PMC_PCDR        (AT91_CAST(AT91_REG *) 	0x00000014) // (PMC_PCDR) Peripheral Clock Disable Register
+#define PMC_PCSR        (AT91_CAST(AT91_REG *) 	0x00000018) // (PMC_PCSR) Peripheral Clock Status Register
+#define CKGR_UCKR       (AT91_CAST(AT91_REG *) 	0x0000001C) // (CKGR_UCKR) UTMI Clock Configuration Register
+#define CKGR_MOR        (AT91_CAST(AT91_REG *) 	0x00000020) // (CKGR_MOR) Main Oscillator Register
+#define CKGR_MCFR       (AT91_CAST(AT91_REG *) 	0x00000024) // (CKGR_MCFR) Main Clock  Frequency Register
+#define CKGR_PLLAR      (AT91_CAST(AT91_REG *) 	0x00000028) // (CKGR_PLLAR) PLL Register
+#define PMC_MCKR        (AT91_CAST(AT91_REG *) 	0x00000030) // (PMC_MCKR) Master Clock Register
+#define PMC_PCKR        (AT91_CAST(AT91_REG *) 	0x00000040) // (PMC_PCKR) Programmable Clock Register
+#define PMC_IER         (AT91_CAST(AT91_REG *) 	0x00000060) // (PMC_IER) Interrupt Enable Register
+#define PMC_IDR         (AT91_CAST(AT91_REG *) 	0x00000064) // (PMC_IDR) Interrupt Disable Register
+#define PMC_SR          (AT91_CAST(AT91_REG *) 	0x00000068) // (PMC_SR) Status Register
+#define PMC_IMR         (AT91_CAST(AT91_REG *) 	0x0000006C) // (PMC_IMR) Interrupt Mask Register
+#define PMC_FSMR        (AT91_CAST(AT91_REG *) 	0x00000070) // (PMC_FSMR) Fast Startup Mode Register
+#define PMC_FSPR        (AT91_CAST(AT91_REG *) 	0x00000074) // (PMC_FSPR) Fast Startup Polarity Register
+#define PMC_FOCR        (AT91_CAST(AT91_REG *) 	0x00000078) // (PMC_FOCR) Fault Output Clear Register
+#define PMC_ADDRSIZE    (AT91_CAST(AT91_REG *) 	0x000000EC) // (PMC_ADDRSIZE) PMC ADDRSIZE REGISTER 
+#define PMC_IPNAME1     (AT91_CAST(AT91_REG *) 	0x000000F0) // (PMC_IPNAME1) PMC IPNAME1 REGISTER 
+#define PMC_IPNAME2     (AT91_CAST(AT91_REG *) 	0x000000F4) // (PMC_IPNAME2) PMC IPNAME2 REGISTER 
+#define PMC_FEATURES    (AT91_CAST(AT91_REG *) 	0x000000F8) // (PMC_FEATURES) PMC FEATURES REGISTER 
+#define PMC_VER         (AT91_CAST(AT91_REG *) 	0x000000FC) // (PMC_VER) APMC VERSION REGISTER
+
+#endif
+// -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register -------- 
+#define AT91C_PMC_PCK         (0x1 <<  0) // (PMC) Processor Clock
+#define AT91C_PMC_PCK0        (0x1 <<  8) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK1        (0x1 <<  9) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK2        (0x1 << 10) // (PMC) Programmable Clock Output
+// -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register -------- 
+// -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register -------- 
+// -------- CKGR_UCKR : (PMC Offset: 0x1c) UTMI Clock Configuration Register -------- 
+#define AT91C_CKGR_UPLLEN     (0x1 << 16) // (PMC) UTMI PLL Enable
+#define 	AT91C_CKGR_UPLLEN_DISABLED             (0x0 << 16) // (PMC) The UTMI PLL is disabled
+#define 	AT91C_CKGR_UPLLEN_ENABLED              (0x1 << 16) // (PMC) The UTMI PLL is enabled
+#define AT91C_CKGR_UPLLCOUNT  (0xF << 20) // (PMC) UTMI Oscillator Start-up Time
+#define AT91C_CKGR_BIASEN     (0x1 << 24) // (PMC) UTMI BIAS Enable
+#define 	AT91C_CKGR_BIASEN_DISABLED             (0x0 << 24) // (PMC) The UTMI BIAS is disabled
+#define 	AT91C_CKGR_BIASEN_ENABLED              (0x1 << 24) // (PMC) The UTMI BIAS is enabled
+#define AT91C_CKGR_BIASCOUNT  (0xF << 28) // (PMC) UTMI BIAS Start-up Time
+// -------- CKGR_MOR : (PMC Offset: 0x20) Main Oscillator Register -------- 
+#define AT91C_CKGR_MOSCXTEN   (0x1 <<  0) // (PMC) Main Crystal Oscillator Enable
+#define AT91C_CKGR_MOSCXTBY   (0x1 <<  1) // (PMC) Main Crystal Oscillator Bypass
+#define AT91C_CKGR_WAITMODE   (0x1 <<  2) // (PMC) Main Crystal Oscillator Bypass
+#define AT91C_CKGR_MOSCRCEN   (0x1 <<  3) // (PMC) Main On-Chip RC Oscillator Enable
+#define AT91C_CKGR_MOSCRCF    (0x7 <<  4) // (PMC) Main On-Chip RC Oscillator Frequency Selection
+#define AT91C_CKGR_MOSCXTST   (0xFF <<  8) // (PMC) Main Crystal Oscillator Start-up Time
+#define AT91C_CKGR_KEY        (0xFF << 16) // (PMC) Clock Generator Controller Writing Protection Key
+#define AT91C_CKGR_MOSCSEL    (0x1 << 24) // (PMC) Main Oscillator Selection
+#define AT91C_CKGR_CFDEN      (0x1 << 25) // (PMC) Clock Failure Detector Enable
+// -------- CKGR_MCFR : (PMC Offset: 0x24) Main Clock Frequency Register -------- 
+#define AT91C_CKGR_MAINF      (0xFFFF <<  0) // (PMC) Main Clock Frequency
+#define AT91C_CKGR_MAINRDY    (0x1 << 16) // (PMC) Main Clock Ready
+// -------- CKGR_PLLAR : (PMC Offset: 0x28) PLL A Register -------- 
+#define AT91C_CKGR_DIVA       (0xFF <<  0) // (PMC) Divider Selected
+#define 	AT91C_CKGR_DIVA_0                    (0x0) // (PMC) Divider output is 0
+#define 	AT91C_CKGR_DIVA_BYPASS               (0x1) // (PMC) Divider is bypassed
+#define AT91C_CKGR_PLLACOUNT  (0x3F <<  8) // (PMC) PLLA Counter
+#define AT91C_CKGR_STMODE     (0x3 << 14) // (PMC) Start Mode
+#define 	AT91C_CKGR_STMODE_0                    (0x0 << 14) // (PMC) Fast startup
+#define 	AT91C_CKGR_STMODE_1                    (0x1 << 14) // (PMC) Reserved
+#define 	AT91C_CKGR_STMODE_2                    (0x2 << 14) // (PMC) Normal startup
+#define 	AT91C_CKGR_STMODE_3                    (0x3 << 14) // (PMC) Reserved
+#define AT91C_CKGR_MULA       (0x7FF << 16) // (PMC) PLL Multiplier
+#define AT91C_CKGR_SRC        (0x1 << 29) // (PMC) 
+// -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register -------- 
+#define AT91C_PMC_CSS         (0x7 <<  0) // (PMC) Programmable Clock Selection
+#define 	AT91C_PMC_CSS_SLOW_CLK             (0x0) // (PMC) Slow Clock is selected
+#define 	AT91C_PMC_CSS_MAIN_CLK             (0x1) // (PMC) Main Clock is selected
+#define 	AT91C_PMC_CSS_PLLA_CLK             (0x2) // (PMC) Clock from PLL A is selected
+#define 	AT91C_PMC_CSS_UPLL_CLK             (0x3) // (PMC) Clock from UPLL is selected
+#define 	AT91C_PMC_CSS_SYS_CLK              (0x4) // (PMC) System clock is selected
+#define AT91C_PMC_PRES        (0x7 <<  4) // (PMC) Programmable Clock Prescaler
+#define 	AT91C_PMC_PRES_CLK                  (0x0 <<  4) // (PMC) Selected clock
+#define 	AT91C_PMC_PRES_CLK_2                (0x1 <<  4) // (PMC) Selected clock divided by 2
+#define 	AT91C_PMC_PRES_CLK_4                (0x2 <<  4) // (PMC) Selected clock divided by 4
+#define 	AT91C_PMC_PRES_CLK_8                (0x3 <<  4) // (PMC) Selected clock divided by 8
+#define 	AT91C_PMC_PRES_CLK_16               (0x4 <<  4) // (PMC) Selected clock divided by 16
+#define 	AT91C_PMC_PRES_CLK_32               (0x5 <<  4) // (PMC) Selected clock divided by 32
+#define 	AT91C_PMC_PRES_CLK_64               (0x6 <<  4) // (PMC) Selected clock divided by 64
+#define 	AT91C_PMC_PRES_CLK_3                (0x7 <<  4) // (PMC) Selected clock divided by 3
+// -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register -------- 
+// -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------- 
+#define AT91C_PMC_MOSCXTS     (0x1 <<  0) // (PMC) Main Crystal Oscillator Status/Enable/Disable/Mask
+#define AT91C_PMC_LOCKA       (0x1 <<  1) // (PMC) PLL A Status/Enable/Disable/Mask
+#define AT91C_PMC_MCKRDY      (0x1 <<  3) // (PMC) Master Clock Status/Enable/Disable/Mask
+#define AT91C_PMC_LOCKU       (0x1 <<  6) // (PMC) PLL UTMI Status/Enable/Disable/Mask
+#define AT91C_PMC_PCKRDY0     (0x1 <<  8) // (PMC) PCK0_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCKRDY1     (0x1 <<  9) // (PMC) PCK1_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCKRDY2     (0x1 << 10) // (PMC) PCK2_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_MOSCSELS    (0x1 << 16) // (PMC) Main Oscillator Selection Status
+#define AT91C_PMC_MOSCRCS     (0x1 << 17) // (PMC) Main On-Chip RC Oscillator Status
+#define AT91C_PMC_CFDEV       (0x1 << 18) // (PMC) Clock Failure Detector Event
+// -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register -------- 
+// -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register -------- 
+#define AT91C_PMC_OSCSELS     (0x1 <<  7) // (PMC) Slow Clock Oscillator Selection
+#define AT91C_PMC_CFDS        (0x1 << 19) // (PMC) Clock Failure Detector Status
+#define AT91C_PMC_FOS         (0x1 << 20) // (PMC) Clock Failure Detector Fault Output Status
+// -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register -------- 
+// -------- PMC_FSMR : (PMC Offset: 0x70) Fast Startup Mode Register -------- 
+#define AT91C_PMC_FSTT        (0xFFFF <<  0) // (PMC) Fast Start-up Input Enable 0 to 15
+#define AT91C_PMC_RTTAL       (0x1 << 16) // (PMC) RTT Alarm Enable
+#define AT91C_PMC_RTCAL       (0x1 << 17) // (PMC) RTC Alarm Enable
+#define AT91C_PMC_USBAL       (0x1 << 18) // (PMC) USB Alarm Enable
+#define AT91C_PMC_LPM         (0x1 << 20) // (PMC) Low Power Mode
+// -------- PMC_FSPR : (PMC Offset: 0x74) Fast Startup Polarity Register -------- 
+#define AT91C_PMC_FSTP        (0xFFFF <<  0) // (PMC) Fast Start-up Input Polarity 0 to 15
+// -------- PMC_FOCR : (PMC Offset: 0x78) Fault Output Clear Register -------- 
+#define AT91C_PMC_FOCLR       (0x1 <<  0) // (PMC) Fault Output Clear
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Clock Generator Controler
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_CKGR {
+	AT91_REG	 CKGR_UCKR; 	// UTMI Clock Configuration Register
+	AT91_REG	 CKGR_MOR; 	// Main Oscillator Register
+	AT91_REG	 CKGR_MCFR; 	// Main Clock  Frequency Register
+	AT91_REG	 CKGR_PLLAR; 	// PLL Register
+} AT91S_CKGR, *AT91PS_CKGR;
+#else
+
+#endif
+// -------- CKGR_UCKR : (CKGR Offset: 0x0) UTMI Clock Configuration Register -------- 
+// -------- CKGR_MOR : (CKGR Offset: 0x4) Main Oscillator Register -------- 
+// -------- CKGR_MCFR : (CKGR Offset: 0x8) Main Clock Frequency Register -------- 
+// -------- CKGR_PLLAR : (CKGR Offset: 0xc) PLL A Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Reset Controller Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_RSTC {
+	AT91_REG	 RSTC_RCR; 	// Reset Control Register
+	AT91_REG	 RSTC_RSR; 	// Reset Status Register
+	AT91_REG	 RSTC_RMR; 	// Reset Mode Register
+	AT91_REG	 Reserved0[60]; 	// 
+	AT91_REG	 RSTC_VER; 	// Version Register
+} AT91S_RSTC, *AT91PS_RSTC;
+#else
+#define RSTC_RCR        (AT91_CAST(AT91_REG *) 	0x00000000) // (RSTC_RCR) Reset Control Register
+#define RSTC_RSR        (AT91_CAST(AT91_REG *) 	0x00000004) // (RSTC_RSR) Reset Status Register
+#define RSTC_RMR        (AT91_CAST(AT91_REG *) 	0x00000008) // (RSTC_RMR) Reset Mode Register
+#define RSTC_VER        (AT91_CAST(AT91_REG *) 	0x000000FC) // (RSTC_VER) Version Register
+
+#endif
+// -------- RSTC_RCR : (RSTC Offset: 0x0) Reset Control Register -------- 
+#define AT91C_RSTC_PROCRST    (0x1 <<  0) // (RSTC) Processor Reset
+#define AT91C_RSTC_ICERST     (0x1 <<  1) // (RSTC) ICE Interface Reset
+#define AT91C_RSTC_PERRST     (0x1 <<  2) // (RSTC) Peripheral Reset
+#define AT91C_RSTC_EXTRST     (0x1 <<  3) // (RSTC) External Reset
+#define AT91C_RSTC_KEY        (0xA5 << 24) // (RSTC) Password
+// -------- RSTC_RSR : (RSTC Offset: 0x4) Reset Status Register -------- 
+#define AT91C_RSTC_URSTS      (0x1 <<  0) // (RSTC) User Reset Status
+#define AT91C_RSTC_RSTTYP     (0x7 <<  8) // (RSTC) Reset Type
+#define 	AT91C_RSTC_RSTTYP_GENERAL              (0x0 <<  8) // (RSTC) General reset. Both VDDCORE and VDDBU rising.
+#define 	AT91C_RSTC_RSTTYP_WAKEUP               (0x1 <<  8) // (RSTC) WakeUp Reset. VDDCORE rising.
+#define 	AT91C_RSTC_RSTTYP_WATCHDOG             (0x2 <<  8) // (RSTC) Watchdog Reset. Watchdog overflow occured.
+#define 	AT91C_RSTC_RSTTYP_SOFTWARE             (0x3 <<  8) // (RSTC) Software Reset. Processor reset required by the software.
+#define 	AT91C_RSTC_RSTTYP_USER                 (0x4 <<  8) // (RSTC) User Reset. NRST pin detected low.
+#define AT91C_RSTC_NRSTL      (0x1 << 16) // (RSTC) NRST pin level
+#define AT91C_RSTC_SRCMP      (0x1 << 17) // (RSTC) Software Reset Command in Progress.
+// -------- RSTC_RMR : (RSTC Offset: 0x8) Reset Mode Register -------- 
+#define AT91C_RSTC_URSTEN     (0x1 <<  0) // (RSTC) User Reset Enable
+#define AT91C_RSTC_URSTIEN    (0x1 <<  4) // (RSTC) User Reset Interrupt Enable
+#define AT91C_RSTC_ERSTL      (0xF <<  8) // (RSTC) User Reset Enable
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Supply Controller Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_SUPC {
+  AT91_REG SUPC_CR;   // Supply Controller Control Register
+  AT91_REG SUPC_SMMR; // Supply Controller Supply Monitor Mode Register
+  AT91_REG SUPC_MR;   // Supply Controller Mode Register
+  AT91_REG SUPC_WUMR; // Supply Controller Wake Up Mode Register
+  AT91_REG SUPC_WUIR; // Supply Controller Wake Up Inputs Register
+  AT91_REG SUPC_SR;   // Supply Controller Status Register
+} AT91S_SUPC, *AT91PS_SUPC;
+#else
+#define SUPC_CR   (AT91_CAST(AT91_REG *) 0x00000000) // Supply Controller Control Register
+#define SUPC_SMMR (AT91_CAST(AT91_REG *) 0x00000004) // Supply Controller Supply Monitor Mode Register
+#define SUPC_MR   (AT91_CAST(AT91_REG *) 0x00000008) // Supply Controller Mode Register
+#define SUPC_WUMR (AT91_CAST(AT91_REG *) 0x0000000C) // Supply Controller Wake Up Mode Register
+#define SUPC_WUIR (AT91_CAST(AT91_REG *) 0x00000010) // Supply Controller Wake Up Inputs Register
+#define SUPC_SR   (AT91_CAST(AT91_REG *) 0x00000014) // Supply Controller Status Register
+#endif
+// -------- SUPC_CR : (SUPC Offset: 0x00) Supply Controller Control Register --------
+#define AT91C_SUPC_CR_VROFF (0x1 << 2) // (SUPC) Voltage Regulator Off
+#define   AT91C_SUPC_CR_VROFF_NO_EFFECT (0x0 << 2) // (SUPC) no effect.
+#define   AT91C_SUPC_CR_VROFF_STOP_VREG (0x1 << 2) // (SUPC) if KEY is correct, asserts vddcore_nreset and stops the voltage regulator.
+#define AT91C_SUPC_CR_XTALSEL (0x1 << 3) // (SUPC) Crystal Oscillator Select
+#define   AT91C_SUPC_CR_XTALSEL_NO_EFFECT (0x0 << 3) // (SUPC) no effect.
+#define   AT91C_SUPC_CR_XTALSEL_CRYSTAL_SEL (0x1 << 3) // (SUPC) if KEY is correct, switches the slow clock on the crystal oscillator output.
+#define AT91C_SUPC_CR_KEY (0xA5 << 24) // (SUPC) Password
+// -------- SUPC_SMMR : (SUPC Offset: 0x04) Supply Controller Supply Monitor Mode Register --------
+#define AT91C_SUPC_SMMR_SMTH (0xf << 0) // (SUPC) Supply Monitor Threshold
+#define   AT91C_SUPC_SMMR_SMTH_1_9V (0x0 << 0) // (SUPC) 1.9 V
+#define   AT91C_SUPC_SMMR_SMTH_2_0V (0x1 << 0) // (SUPC) 2.0 V
+#define   AT91C_SUPC_SMMR_SMTH_2_1V (0x2 << 0) // (SUPC) 2.1 V
+#define   AT91C_SUPC_SMMR_SMTH_2_2V (0x3 << 0) // (SUPC) 2.2 V
+#define   AT91C_SUPC_SMMR_SMTH_2_3V (0x4 << 0) // (SUPC) 2.3 V
+#define   AT91C_SUPC_SMMR_SMTH_2_4V (0x5 << 0) // (SUPC) 2.4 V
+#define   AT91C_SUPC_SMMR_SMTH_2_5V (0x6 << 0) // (SUPC) 2.5 V
+#define   AT91C_SUPC_SMMR_SMTH_2_6V (0x7 << 0) // (SUPC) 2.6 V
+#define   AT91C_SUPC_SMMR_SMTH_2_7V (0x8 << 0) // (SUPC) 2.7 V
+#define   AT91C_SUPC_SMMR_SMTH_2_8V (0x9 << 0) // (SUPC) 2.8 V
+#define   AT91C_SUPC_SMMR_SMTH_2_9V (0xA << 0) // (SUPC) 2.9 V
+#define   AT91C_SUPC_SMMR_SMTH_3_0V (0xB << 0) // (SUPC) 3.0 V
+#define   AT91C_SUPC_SMMR_SMTH_3_1V (0xC << 0) // (SUPC) 3.1 V
+#define   AT91C_SUPC_SMMR_SMTH_3_2V (0xD << 0) // (SUPC) 3.2 V
+#define   AT91C_SUPC_SMMR_SMTH_3_3V (0xE << 0) // (SUPC) 3.3 V
+#define   AT91C_SUPC_SMMR_SMTH_3_4V (0xF << 0) // (SUPC) 3.4 V
+#define AT91C_SUPC_SMMR_SMSMPL (0x7 << 8) // (SUPC) Supply Monitor Sampling Period
+#define   AT91C_SUPC_SMMR_SMSMPL_SMD (0x0 << 8) // (SUPC) Supply Monitor disabled
+#define   AT91C_SUPC_SMMR_SMSMPL_CSM (0x1 << 8) // (SUPC) Continuous Supply Monitor
+#define   AT91C_SUPC_SMMR_SMSMPL_32SLCK (0x2 << 8) // (SUPC) Supply Monitor enabled one SLCK period every 32 SLCK periods
+#define   AT91C_SUPC_SMMR_SMSMPL_256SLCK (0x3 << 8) // (SUPC) Supply Monitor enabled one SLCK period every 256 SLCK periods
+#define   AT91C_SUPC_SMMR_SMSMPL_2048SLCK (0x4 << 8) // (SUPC) Supply Monitor enabled one SLCK period every 2,048 SLCK periods
+#define AT91C_SUPC_SMMR_SMRSTEN (0x1 << 12) // (SUPC) Supply Monitor Reset Enable
+#define   AT91C_SUPC_SMMR_SMRSTEN_NOT_ENABLE (0x0 << 12) // (SUPC) the core reset signal "vddcore_nreset" is not affected when a supply monitor detection occurs.
+#define   AT91C_SUPC_SMMR_SMRSTEN_ENABLE (0x1 << 12) // (SUPC) the core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs.
+#define AT91C_SUPC_SMMR_SMIEN (0x1 << 13) // (SUPC) Supply Monitor Interrupt Enable
+#define   AT91C_SUPC_SMMR_SMIEN_NOT_ENABLE (0x0 << 13) // (SUPC) the SUPC interrupt signal is not affected when a supply monitor detection occurs.
+#define   AT91C_SUPC_SMMR_SMIEN_ENABLE (0x1 << 13) // (SUPC) the SUPC interrupt signal is asserted when a supply monitor detection occurs.
+// -------- SUPC_MR : (SUPC Offset: 0x08) Supply Controller Mode Register --------
+#define AT91C_SUPC_MR_BODRSTEN (0x1 << 12) // (SUPC) Brownout Detector Reset Enable
+#define   AT91C_SUPC_MR_BODRSTEN_NOT_ENABLE (0x0 << 12) // (SUPC) the core reset signal "vddcore_nreset" is not affected when a brownout detection occurs.
+#define   AT91C_SUPC_MR_BODRSTEN_ENABLE (0x1 << 12) // (SUPC) the core reset signal, vddcore_nreset is asserted when a brownout detection occurs.
+#define AT91C_SUPC_MR_BODDIS (0x1 << 13) // (SUPC) Brownout Detector Disable
+#define   AT91C_SUPC_MR_BODDIS_ENABLE (0x0 << 13) // (SUPC) the core brownout detector is enabled.
+#define   AT91C_SUPC_MR_BODDIS_DISABLE (0x1 << 13) // (SUPC) the core brownout detector is disabled.
+#define AT91C_SUPC_MR_VDDIORDY (0x1 << 14) // (SUPC) VDDIO Ready
+#define   AT91C_SUPC_MR_VDDIORDY_VDDIO_REMOVED (0x0 << 14) // (SUPC) VDDIO is removed (used before going to backup mode when backup batteries are used)
+#define   AT91C_SUPC_MR_VDDIORDY_VDDIO_PRESENT (0x1 << 14) // (SUPC) VDDIO is present (used before going to backup mode when backup batteries are used)
+#define AT91C_SUPC_MR_OSCBYPASS (0x1 << 20) // (SUPC) Oscillator Bypass
+#define   AT91C_SUPC_MR_OSCBYPASS_NO_EFFECT (0x0 << 20) // (SUPC) no effect. Clock selection depends on XTALSEL value.
+#define   AT91C_SUPC_MR_OSCBYPASS_BYPASS (0x1 << 20) // (SUPC) the 32-KHz XTAL oscillator is selected and is put in bypass mode.
+#define AT91C_SUPC_MR_KEY (0xff << 24) // (SUPC) Password Key
+// -------- SUPC_WUMR : (SUPC Offset: 0x0C) Supply Controller Wake Up Mode Register --------
+#define AT91C_SUPC_WUMR_FWUPEN (0x1 << 0) // (SUPC) Force Wake Up Enable
+#define   AT91C_SUPC_WUMR_FWUPEN_NOT_ENABLE (0x0 << 0) // (SUPC) the Force Wake Up pin has no wake up effect.
+#define   AT91C_SUPC_WUMR_FWUPEN_ENABLE (0x1 << 0) // (SUPC) the Force Wake Up pin low forces the wake up of the core power supply.
+#define AT91C_SUPC_WUMR_SMEN (0x1 << 1) // (SUPC) Supply Monitor Wake Up Enable
+#define   AT91C_SUPC_WUMR_SMEN_NOT_ENABLE (0x0 << 1) // (SUPC) the supply monitor detection has no wake up effect.
+#define   AT91C_SUPC_WUMR_SMEN_ENABLE (0x1 << 1) // (SUPC) the supply monitor detection forces the wake up of the core power supply.
+#define AT91C_SUPC_WUMR_RTTEN (0x1 << 2) // (SUPC) Real Time Timer Wake Up Enable
+#define   AT91C_SUPC_WUMR_RTTEN_NOT_ENABLE (0x0 << 2) // (SUPC) the RTT alarm signal has no wake up effect.
+#define   AT91C_SUPC_WUMR_RTTEN_ENABLE (0x1 << 2) // (SUPC) the RTT alarm signal forces the wake up of the core power supply.
+#define AT91C_SUPC_WUMR_RTCEN (0x1 << 3) // (SUPC) Real Time Clock Wake Up Enable
+#define   AT91C_SUPC_WUMR_RTCEN_NOT_ENABLE (0x0 << 3) // (SUPC) the RTC alarm signal has no wake up effect.
+#define   AT91C_SUPC_WUMR_RTCEN_ENABLE (0x1 << 3) // (SUPC) the RTC alarm signal forces the wake up of the core power supply.
+#define AT91C_SUPC_WUMR_FWUPDBC (0x7 << 8) // (SUPC) Force Wake Up Debouncer
+#define   AT91C_SUPC_WUMR_FWUPDBC_1SCLK (0x0 << 8) // (SUPC) Immediate, no debouncing, detected active at least on one Slow Clock edge.
+#define   AT91C_SUPC_WUMR_FWUPDBC_3SCLK (0x1 << 8) // (SUPC) FWUP shall be low for at least 3 SLCK periods
+#define   AT91C_SUPC_WUMR_FWUPDBC_32SCLK (0x2 << 8) // (SUPC) FWUP shall be low for at least 32 SLCK periods
+#define   AT91C_SUPC_WUMR_FWUPDBC_512SCLK (0x3 << 8) // (SUPC) FWUP shall be low for at least 512 SLCK periods
+#define   AT91C_SUPC_WUMR_FWUPDBC_4096SCLK (0x4 << 8) // (SUPC) FWUP shall be low for at least 4,096 SLCK periods
+#define   AT91C_SUPC_WUMR_FWUPDBC_32768SCLK (0x5 << 8) // (SUPC) FWUP shall be low for at least 32,768 SLCK periods
+#define AT91C_SUPC_WUMR_WKUPDBC (0x7 << 12) // (SUPC) Wake Up Inputs Debouncer
+#define   AT91C_SUPC_WUMR_WKUPDBC_1SCLK (0x0 << 12) // (SUPC) Immediate, no debouncing, detected active at least on one Slow Clock edge.
+#define   AT91C_SUPC_WUMR_WKUPDBC_3SCLK (0x1 << 12) // (SUPC) An enabled wake-up input shall be active for at least 3 SLCK periods
+#define   AT91C_SUPC_WUMR_WKUPDBC_32SCLK (0x2 << 12) // (SUPC) An enabled wake-up input shall be active for at least 32 SLCK periods
+#define   AT91C_SUPC_WUMR_WKUPDBC_512SCLK (0x3 << 12) // (SUPC) An enabled wake-up input shall be active for at least 512 SLCK periods
+#define   AT91C_SUPC_WUMR_WKUPDBC_4096SCLK (0x4 << 12) // (SUPC) An enabled wake-up input shall be active for at least 4,096 SLCK periods
+#define   AT91C_SUPC_WUMR_WKUPDBC_32768SCLK (0x5 << 12) // (SUPC) An enabled wake-up input shall be active for at least 32,768 SLCK periods
+// -------- SUPC_WUIR : (SUPC Offset: 0x10) Supply Controller Wake Up Inputs Register --------
+#define AT91C_SUPC_WUIR_WKUPEN0 (0x1 << 0) // (SUPC) Wake Up Input Enable 0
+#define   AT91C_SUPC_WUIR_WKUPEN0_NOT_ENABLE (0x0 << 0) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN0_ENABLE (0x1 << 0) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN1 (0x1 << 1) // (SUPC) Wake Up Input Enable 1
+#define   AT91C_SUPC_WUIR_WKUPEN1_NOT_ENABLE (0x0 << 1) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN1_ENABLE (0x1 << 1) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN2 (0x1 << 2) // (SUPC) Wake Up Input Enable 2
+#define   AT91C_SUPC_WUIR_WKUPEN2_NOT_ENABLE (0x0 << 2) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN2_ENABLE (0x1 << 2) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN3 (0x1 << 3) // (SUPC) Wake Up Input Enable 3
+#define   AT91C_SUPC_WUIR_WKUPEN3_NOT_ENABLE (0x0 << 3) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN3_ENABLE (0x1 << 3) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN4 (0x1 << 4) // (SUPC) Wake Up Input Enable 4
+#define   AT91C_SUPC_WUIR_WKUPEN4_NOT_ENABLE (0x0 << 4) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN4_ENABLE (0x1 << 4) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN5 (0x1 << 5) // (SUPC) Wake Up Input Enable 5
+#define   AT91C_SUPC_WUIR_WKUPEN5_NOT_ENABLE (0x0 << 5) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN5_ENABLE (0x1 << 5) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN6 (0x1 << 6) // (SUPC) Wake Up Input Enable 6
+#define   AT91C_SUPC_WUIR_WKUPEN6_NOT_ENABLE (0x0 << 6) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN6_ENABLE (0x1 << 6) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN7 (0x1 << 7) // (SUPC) Wake Up Input Enable 7
+#define   AT91C_SUPC_WUIR_WKUPEN7_NOT_ENABLE (0x0 << 7) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN7_ENABLE (0x1 << 7) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN8 (0x1 << 8) // (SUPC) Wake Up Input Enable 8
+#define   AT91C_SUPC_WUIR_WKUPEN8_NOT_ENABLE (0x0 << 8) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN8_ENABLE (0x1 << 8) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN9 (0x1 << 9) // (SUPC) Wake Up Input Enable 9
+#define   AT91C_SUPC_WUIR_WKUPEN9_NOT_ENABLE (0x0 << 9) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN9_ENABLE (0x1 << 9) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN10 (0x1 << 10) // (SUPC) Wake Up Input Enable 10
+#define   AT91C_SUPC_WUIR_WKUPEN10_NOT_ENABLE (0x0 << 10) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN10_ENABLE (0x1 << 10) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN11 (0x1 << 11) // (SUPC) Wake Up Input Enable 11
+#define   AT91C_SUPC_WUIR_WKUPEN11_NOT_ENABLE (0x0 << 11) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN11_ENABLE (0x1 << 11) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN12 (0x1 << 12) // (SUPC) Wake Up Input Enable 12
+#define   AT91C_SUPC_WUIR_WKUPEN12_NOT_ENABLE (0x0 << 12) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN12_ENABLE (0x1 << 12) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN13 (0x1 << 13) // (SUPC) Wake Up Input Enable 13
+#define   AT91C_SUPC_WUIR_WKUPEN13_NOT_ENABLE (0x0 << 13) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN13_ENABLE (0x1 << 13) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN14 (0x1 << 14) // (SUPC) Wake Up Input Enable 14
+#define   AT91C_SUPC_WUIR_WKUPEN14_NOT_ENABLE (0x0 << 14) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN14_ENABLE (0x1 << 14) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPEN15 (0x1 << 15) // (SUPC) Wake Up Input Enable 15
+#define   AT91C_SUPC_WUIR_WKUPEN15_NOT_ENABLE (0x0 << 15) // (SUPC) the corresponding wake-up input has no wake up effect.
+#define   AT91C_SUPC_WUIR_WKUPEN15_ENABLE (0x1 << 15) // (SUPC) the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT0 (0x1 << 16) // (SUPC) Wake Up Input Transition 0
+#define   AT91C_SUPC_WUIR_WKUPT0_HIGH_TO_LOW (0x0 << 16) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT0_LOW_TO_HIGH (0x1 << 16) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT1 (0x1 << 17) // (SUPC) Wake Up Input Transition 1
+#define   AT91C_SUPC_WUIR_WKUPT1_HIGH_TO_LOW (0x0 << 17) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT1_LOW_TO_HIGH (0x1 << 17) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT2 (0x1 << 18) // (SUPC) Wake Up Input Transition 2
+#define   AT91C_SUPC_WUIR_WKUPT2_HIGH_TO_LOW (0x0 << 18) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT2_LOW_TO_HIGH (0x1 << 18) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT3 (0x1 << 19) // (SUPC) Wake Up Input Transition 3
+#define   AT91C_SUPC_WUIR_WKUPT3_HIGH_TO_LOW (0x0 << 19) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT3_LOW_TO_HIGH (0x1 << 19) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT4 (0x1 << 20) // (SUPC) Wake Up Input Transition 4
+#define   AT91C_SUPC_WUIR_WKUPT4_HIGH_TO_LOW (0x0 << 20) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT4_LOW_TO_HIGH (0x1 << 20) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT5 (0x1 << 21) // (SUPC) Wake Up Input Transition 5
+#define   AT91C_SUPC_WUIR_WKUPT5_HIGH_TO_LOW (0x0 << 21) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT5_LOW_TO_HIGH (0x1 << 21) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT6 (0x1 << 22) // (SUPC) Wake Up Input Transition 6
+#define   AT91C_SUPC_WUIR_WKUPT6_HIGH_TO_LOW (0x0 << 22) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT6_LOW_TO_HIGH (0x1 << 22) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT7 (0x1 << 23) // (SUPC) Wake Up Input Transition 7
+#define   AT91C_SUPC_WUIR_WKUPT7_HIGH_TO_LOW (0x0 << 23) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT7_LOW_TO_HIGH (0x1 << 23) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT8 (0x1 << 24) // (SUPC) Wake Up Input Transition 8
+#define   AT91C_SUPC_WUIR_WKUPT8_HIGH_TO_LOW (0x0 << 24) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT8_LOW_TO_HIGH (0x1 << 24) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT9 (0x1 << 25) // (SUPC) Wake Up Input Transition 9
+#define   AT91C_SUPC_WUIR_WKUPT9_HIGH_TO_LOW (0x0 << 25) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT9_LOW_TO_HIGH (0x1 << 25) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT10 (0x1 << 26) // (SUPC) Wake Up Input Transition 10
+#define   AT91C_SUPC_WUIR_WKUPT10_HIGH_TO_LOW (0x0 << 26) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT10_LOW_TO_HIGH (0x1 << 26) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT11 (0x1 << 27) // (SUPC) Wake Up Input Transition 11
+#define   AT91C_SUPC_WUIR_WKUPT11_HIGH_TO_LOW (0x0 << 27) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT11_LOW_TO_HIGH (0x1 << 27) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT12 (0x1 << 28) // (SUPC) Wake Up Input Transition 12
+#define   AT91C_SUPC_WUIR_WKUPT12_HIGH_TO_LOW (0x0 << 28) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT12_LOW_TO_HIGH (0x1 << 28) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT13 (0x1 << 29) // (SUPC) Wake Up Input Transition 13
+#define   AT91C_SUPC_WUIR_WKUPT13_HIGH_TO_LOW (0x0 << 29) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT13_LOW_TO_HIGH (0x1 << 29) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT14 (0x1 << 30) // (SUPC) Wake Up Input Transition 14
+#define   AT91C_SUPC_WUIR_WKUPT14_HIGH_TO_LOW (0x0 << 30) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT14_LOW_TO_HIGH (0x1 << 30) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define AT91C_SUPC_WUIR_WKUPT15 (0x1 << 31) // (SUPC) Wake Up Input Transition 15
+#define   AT91C_SUPC_WUIR_WKUPT15_HIGH_TO_LOW (0x0 << 31) // (SUPC) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply.
+#define   AT91C_SUPC_WUIR_WKUPT15_LOW_TO_HIGH (0x1 << 31) // (SUPC) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply.
+// -------- SUPC_SR : (SUPC Offset: 0x14) Supply Controller Status Register --------
+#define AT91C_SUPC_SR_FWUPS (0x1 << 0) // (SUPC) FWUP Wake Up Status
+#define   AT91C_SUPC_SR_FWUPS_NO (0x0 << 0) // (SUPC) no wake up due to the assertion of the FWUP pin has occurred since the last read of SUPC_SR.
+#define   AT91C_SUPC_SR_FWUPS_PRESENT (0x1 << 0) // (SUPC) at least one wake up due to the assertion of the FWUP pin has occurred since the last read of SUPC_SR.
+#define AT91C_SUPC_SR_WKUPS (0x1 << 1) // (SUPC) WKUP Wake Up Status
+#define   AT91C_SUPC_SR_WKUPS_NO (0x0 << 1) // (SUPC) no wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR.
+#define   AT91C_SUPC_SR_WKUPS_PRESENT (0x1 << 1) // (SUPC) at least one wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR.
+#define AT91C_SUPC_SR_SMWS (0x1 << 2) // (SUPC) Supply Monitor Detection Wake Up Status
+#define   AT91C_SUPC_SR_SMWS_NO (0x0 << 2) // (SUPC) no wake up due to a supply monitor detection has occurred since the last read of SUPC_SR.
+#define   AT91C_SUPC_SR_SMWS_PRESENT (0x1 << 2) // (SUPC) at least one wake up due to a supply monitor detection has occurred since the last read of SUPC_SR.
+#define AT91C_SUPC_SR_BODRSTS (0x1 << 3) // (SUPC) Brownout Detector Reset Status
+#define   AT91C_SUPC_SR_BODRSTS_NO (0x0 << 3) // (SUPC) no core brownout detection has generated a core reset since the last read of the SUPC_SR.
+#define   AT91C_SUPC_SR_BODRSTS_PRESENT (0x1 << 3) // (SUPC) at least one core brownout detection has generated a core reset since the last read of the SUPC_SR.
+#define AT91C_SUPC_SR_SMRSTS (0x1 << 4) // (SUPC) Supply Monitor Reset Status
+#define   AT91C_SUPC_SR_SMRSTS_NO (0x0 << 4) // (SUPC) no supply monitor detection has generated a core reset since the last read of the SUPC_SR.
+#define   AT91C_SUPC_SR_SMRSTS_PRESENT (0x1 << 4) // (SUPC) at least one supply monitor detection has generated a core reset since the last read of the SUPC_SR.
+#define AT91C_SUPC_SR_SMS (0x1 << 5) // (SUPC) Supply Monitor Status
+#define   AT91C_SUPC_SR_SMS_NO (0x0 << 5) // (SUPC) no supply monitor detection since the last read of SUPC_SR.
+#define   AT91C_SUPC_SR_SMS_PRESENT (0x1 << 5) // (SUPC) at least one supply monitor detection since the last read of SUPC_SR.
+#define AT91C_SUPC_SR_SMOS (0x1 << 6) // (SUPC) Supply Monitor Output Status
+#define   AT91C_SUPC_SR_SMOS_HIGH (0x0 << 6) // (SUPC) the supply monitor detected VDDUTMI higher than its threshold at its last measurement.
+#define   AT91C_SUPC_SR_SMOS_LOW (0x1 << 6) // (SUPC) the supply monitor detected VDDUTMI lower than its threshold at its last measurement.
+#define AT91C_SUPC_SR_OSCSEL (0x1 << 7) // (SUPC) 32-kHz Oscillator Selection Status
+#define   AT91C_SUPC_SR_OSCSEL_RC (0x0 << 7) // (SUPC) the slow clock, SLCK is generated by the embedded 32-kHz RC oscillator.
+#define   AT91C_SUPC_SR_OSCSEL_CRYST (0x1 << 7) // (SUPC) the slow clock, SLCK is generated by the 32-kHz crystal oscillator.
+#define AT91C_SUPC_SR_FWUPIS (0x1 << 12) // (SUPC) FWUP Input Status
+#define   AT91C_SUPC_SR_FWUPIS_LOW (0x0 << 12) // (SUPC) FWUP input is tied low.
+#define   AT91C_SUPC_SR_FWUPIS_HIGH (0x1 << 12) // (SUPC) FWUP input is tied high.
+#define AT91C_SUPC_SR_WKUPIS0 (0x1 << 16) // (SUPC) WKUP Input Status 0
+#define   AT91C_SUPC_SR_WKUPIS0_DIS (0x0 << 16) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS0_EN (0x1 << 16) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS1 (0x1 << 17) // (SUPC) WKUP Input Status 1
+#define   AT91C_SUPC_SR_WKUPIS1_DIS (0x0 << 17) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS1_EN (0x1 << 17) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS2 (0x1 << 18) // (SUPC) WKUP Input Status 2
+#define   AT91C_SUPC_SR_WKUPIS2_DIS (0x0 << 18) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS2_EN (0x1 << 18) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS3 (0x1 << 19) // (SUPC) WKUP Input Status 3
+#define   AT91C_SUPC_SR_WKUPIS3_DIS (0x0 << 19) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS3_EN (0x1 << 19) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS4 (0x1 << 20) // (SUPC) WKUP Input Status 4
+#define   AT91C_SUPC_SR_WKUPIS4_DIS (0x0 << 20) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS4_EN (0x1 << 20) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS5 (0x1 << 21) // (SUPC) WKUP Input Status 5
+#define   AT91C_SUPC_SR_WKUPIS5_DIS (0x0 << 21) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS5_EN (0x1 << 21) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS6 (0x1 << 22) // (SUPC) WKUP Input Status 6
+#define   AT91C_SUPC_SR_WKUPIS6_DIS (0x0 << 22) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS6_EN (0x1 << 22) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS7 (0x1 << 23) // (SUPC) WKUP Input Status 7
+#define   AT91C_SUPC_SR_WKUPIS7_DIS (0x0 << 23) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS7_EN (0x1 << 23) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS8 (0x1 << 24) // (SUPC) WKUP Input Status 8
+#define   AT91C_SUPC_SR_WKUPIS8_DIS (0x0 << 24) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS8_EN (0x1 << 24) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS9 (0x1 << 25) // (SUPC) WKUP Input Status 9
+#define   AT91C_SUPC_SR_WKUPIS9_DIS (0x0 << 25) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS9_EN (0x1 << 25) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS10 (0x1 << 26) // (SUPC) WKUP Input Status 10
+#define   AT91C_SUPC_SR_WKUPIS10_DIS (0x0 << 26) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS10_EN (0x1 << 26) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS11 (0x1 << 27) // (SUPC) WKUP Input Status 11
+#define   AT91C_SUPC_SR_WKUPIS11_DIS (0x0 << 27) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS11_EN (0x1 << 27) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS12 (0x1 << 28) // (SUPC) WKUP Input Status 12
+#define   AT91C_SUPC_SR_WKUPIS12_DIS (0x0 << 28) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS12_EN (0x1 << 28) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS13 (0x1 << 29) // (SUPC) WKUP Input Status 13
+#define   AT91C_SUPC_SR_WKUPIS13_DIS (0x0 << 29) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS13_EN (0x1 << 29) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS14 (0x1 << 30) // (SUPC) WKUP Input Status 14
+#define   AT91C_SUPC_SR_WKUPIS14_DIS (0x0 << 30) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS14_EN (0x1 << 30) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+#define AT91C_SUPC_SR_WKUPIS15 (0x1 << 31) // (SUPC) WKUP Input Status 15
+#define   AT91C_SUPC_SR_WKUPIS15_DIS (0x0 << 31) // (SUPC) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event.
+#define   AT91C_SUPC_SR_WKUPIS15_EN (0x1 << 31) // (SUPC) the corresponding wake-up input was active at the time the debouncer triggered a wake up event.
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Real Time Timer Controller Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_RTTC {
+	AT91_REG	 RTTC_RTMR; 	// Real-time Mode Register
+	AT91_REG	 RTTC_RTAR; 	// Real-time Alarm Register
+	AT91_REG	 RTTC_RTVR; 	// Real-time Value Register
+	AT91_REG	 RTTC_RTSR; 	// Real-time Status Register
+} AT91S_RTTC, *AT91PS_RTTC;
+#else
+#define RTTC_RTMR       (AT91_CAST(AT91_REG *) 	0x00000000) // (RTTC_RTMR) Real-time Mode Register
+#define RTTC_RTAR       (AT91_CAST(AT91_REG *) 	0x00000004) // (RTTC_RTAR) Real-time Alarm Register
+#define RTTC_RTVR       (AT91_CAST(AT91_REG *) 	0x00000008) // (RTTC_RTVR) Real-time Value Register
+#define RTTC_RTSR       (AT91_CAST(AT91_REG *) 	0x0000000C) // (RTTC_RTSR) Real-time Status Register
+
+#endif
+// -------- RTTC_RTMR : (RTTC Offset: 0x0) Real-time Mode Register -------- 
+#define AT91C_RTTC_RTPRES     (0xFFFF <<  0) // (RTTC) Real-time Timer Prescaler Value
+#define AT91C_RTTC_ALMIEN     (0x1 << 16) // (RTTC) Alarm Interrupt Enable
+#define AT91C_RTTC_RTTINCIEN  (0x1 << 17) // (RTTC) Real Time Timer Increment Interrupt Enable
+#define AT91C_RTTC_RTTRST     (0x1 << 18) // (RTTC) Real Time Timer Restart
+// -------- RTTC_RTAR : (RTTC Offset: 0x4) Real-time Alarm Register -------- 
+#define AT91C_RTTC_ALMV       (0x0 <<  0) // (RTTC) Alarm Value
+// -------- RTTC_RTVR : (RTTC Offset: 0x8) Current Real-time Value Register -------- 
+#define AT91C_RTTC_CRTV       (0x0 <<  0) // (RTTC) Current Real-time Value
+// -------- RTTC_RTSR : (RTTC Offset: 0xc) Real-time Status Register -------- 
+#define AT91C_RTTC_ALMS       (0x1 <<  0) // (RTTC) Real-time Alarm Status
+#define AT91C_RTTC_RTTINC     (0x1 <<  1) // (RTTC) Real-time Timer Increment
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Watchdog Timer Controller Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_WDTC {
+	AT91_REG	 WDTC_WDCR; 	// Watchdog Control Register
+	AT91_REG	 WDTC_WDMR; 	// Watchdog Mode Register
+	AT91_REG	 WDTC_WDSR; 	// Watchdog Status Register
+} AT91S_WDTC, *AT91PS_WDTC;
+#else
+#define WDTC_WDCR       (AT91_CAST(AT91_REG *) 	0x00000000) // (WDTC_WDCR) Watchdog Control Register
+#define WDTC_WDMR       (AT91_CAST(AT91_REG *) 	0x00000004) // (WDTC_WDMR) Watchdog Mode Register
+#define WDTC_WDSR       (AT91_CAST(AT91_REG *) 	0x00000008) // (WDTC_WDSR) Watchdog Status Register
+
+#endif
+// -------- WDTC_WDCR : (WDTC Offset: 0x0) Periodic Interval Image Register -------- 
+#define AT91C_WDTC_WDRSTT     (0x1 <<  0) // (WDTC) Watchdog Restart
+#define AT91C_WDTC_KEY        (0xFF << 24) // (WDTC) Watchdog KEY Password
+// -------- WDTC_WDMR : (WDTC Offset: 0x4) Watchdog Mode Register -------- 
+#define AT91C_WDTC_WDV        (0xFFF <<  0) // (WDTC) Watchdog Timer Restart
+#define AT91C_WDTC_WDFIEN     (0x1 << 12) // (WDTC) Watchdog Fault Interrupt Enable
+#define AT91C_WDTC_WDRSTEN    (0x1 << 13) // (WDTC) Watchdog Reset Enable
+#define AT91C_WDTC_WDRPROC    (0x1 << 14) // (WDTC) Watchdog Timer Restart
+#define AT91C_WDTC_WDDIS      (0x1 << 15) // (WDTC) Watchdog Disable
+#define AT91C_WDTC_WDD        (0xFFF << 16) // (WDTC) Watchdog Delta Value
+#define AT91C_WDTC_WDDBGHLT   (0x1 << 28) // (WDTC) Watchdog Debug Halt
+#define AT91C_WDTC_WDIDLEHLT  (0x1 << 29) // (WDTC) Watchdog Idle Halt
+// -------- WDTC_WDSR : (WDTC Offset: 0x8) Watchdog Status Register -------- 
+#define AT91C_WDTC_WDUNF      (0x1 <<  0) // (WDTC) Watchdog Underflow
+#define AT91C_WDTC_WDERR      (0x1 <<  1) // (WDTC) Watchdog Error
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Real-time Clock Alarm and Parallel Load Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_RTC {
+	AT91_REG	 RTC_CR; 	// Control Register
+	AT91_REG	 RTC_MR; 	// Mode Register
+	AT91_REG	 RTC_TIMR; 	// Time Register
+	AT91_REG	 RTC_CALR; 	// Calendar Register
+	AT91_REG	 RTC_TIMALR; 	// Time Alarm Register
+	AT91_REG	 RTC_CALALR; 	// Calendar Alarm Register
+	AT91_REG	 RTC_SR; 	// Status Register
+	AT91_REG	 RTC_SCCR; 	// Status Clear Command Register
+	AT91_REG	 RTC_IER; 	// Interrupt Enable Register
+	AT91_REG	 RTC_IDR; 	// Interrupt Disable Register
+	AT91_REG	 RTC_IMR; 	// Interrupt Mask Register
+	AT91_REG	 RTC_VER; 	// Valid Entry Register
+} AT91S_RTC, *AT91PS_RTC;
+#else
+#define RTC_CR          (AT91_CAST(AT91_REG *) 	0x00000000) // (RTC_CR) Control Register
+#define RTC_MR          (AT91_CAST(AT91_REG *) 	0x00000004) // (RTC_MR) Mode Register
+#define RTC_TIMR        (AT91_CAST(AT91_REG *) 	0x00000008) // (RTC_TIMR) Time Register
+#define RTC_CALR        (AT91_CAST(AT91_REG *) 	0x0000000C) // (RTC_CALR) Calendar Register
+#define RTC_TIMALR      (AT91_CAST(AT91_REG *) 	0x00000010) // (RTC_TIMALR) Time Alarm Register
+#define RTC_CALALR      (AT91_CAST(AT91_REG *) 	0x00000014) // (RTC_CALALR) Calendar Alarm Register
+#define RTC_SR          (AT91_CAST(AT91_REG *) 	0x00000018) // (RTC_SR) Status Register
+#define RTC_SCCR        (AT91_CAST(AT91_REG *) 	0x0000001C) // (RTC_SCCR) Status Clear Command Register
+#define RTC_IER         (AT91_CAST(AT91_REG *) 	0x00000020) // (RTC_IER) Interrupt Enable Register
+#define RTC_IDR         (AT91_CAST(AT91_REG *) 	0x00000024) // (RTC_IDR) Interrupt Disable Register
+#define RTC_IMR         (AT91_CAST(AT91_REG *) 	0x00000028) // (RTC_IMR) Interrupt Mask Register
+#define RTC_VER         (AT91_CAST(AT91_REG *) 	0x0000002C) // (RTC_VER) Valid Entry Register
+
+#endif
+// -------- RTC_CR : (RTC Offset: 0x0) RTC Control Register -------- 
+#define AT91C_RTC_UPDTIM      (0x1 <<  0) // (RTC) Update Request Time Register
+#define AT91C_RTC_UPDCAL      (0x1 <<  1) // (RTC) Update Request Calendar Register
+#define AT91C_RTC_TIMEVSEL    (0x3 <<  8) // (RTC) Time Event Selection
+#define 	AT91C_RTC_TIMEVSEL_MINUTE               (0x0 <<  8) // (RTC) Minute change.
+#define 	AT91C_RTC_TIMEVSEL_HOUR                 (0x1 <<  8) // (RTC) Hour change.
+#define 	AT91C_RTC_TIMEVSEL_DAY24                (0x2 <<  8) // (RTC) Every day at midnight.
+#define 	AT91C_RTC_TIMEVSEL_DAY12                (0x3 <<  8) // (RTC) Every day at noon.
+#define AT91C_RTC_CALEVSEL    (0x3 << 16) // (RTC) Calendar Event Selection
+#define 	AT91C_RTC_CALEVSEL_WEEK                 (0x0 << 16) // (RTC) Week change (every Monday at time 00:00:00).
+#define 	AT91C_RTC_CALEVSEL_MONTH                (0x1 << 16) // (RTC) Month change (every 01 of each month at time 00:00:00).
+#define 	AT91C_RTC_CALEVSEL_YEAR                 (0x2 << 16) // (RTC) Year change (every January 1 at time 00:00:00).
+// -------- RTC_MR : (RTC Offset: 0x4) RTC Mode Register -------- 
+#define AT91C_RTC_HRMOD       (0x1 <<  0) // (RTC) 12-24 hour Mode
+// -------- RTC_TIMR : (RTC Offset: 0x8) RTC Time Register -------- 
+#define AT91C_RTC_SEC         (0x7F <<  0) // (RTC) Current Second
+#define AT91C_RTC_MIN         (0x7F <<  8) // (RTC) Current Minute
+#define AT91C_RTC_HOUR        (0x3F << 16) // (RTC) Current Hour
+#define AT91C_RTC_AMPM        (0x1 << 22) // (RTC) Ante Meridiem, Post Meridiem Indicator
+// -------- RTC_CALR : (RTC Offset: 0xc) RTC Calendar Register -------- 
+#define AT91C_RTC_CENT        (0x3F <<  0) // (RTC) Current Century
+#define AT91C_RTC_YEAR        (0xFF <<  8) // (RTC) Current Year
+#define AT91C_RTC_MONTH       (0x1F << 16) // (RTC) Current Month
+#define AT91C_RTC_DAY         (0x7 << 21) // (RTC) Current Day
+#define AT91C_RTC_DATE        (0x3F << 24) // (RTC) Current Date
+// -------- RTC_TIMALR : (RTC Offset: 0x10) RTC Time Alarm Register -------- 
+#define AT91C_RTC_SECEN       (0x1 <<  7) // (RTC) Second Alarm Enable
+#define AT91C_RTC_MINEN       (0x1 << 15) // (RTC) Minute Alarm
+#define AT91C_RTC_HOUREN      (0x1 << 23) // (RTC) Current Hour
+// -------- RTC_CALALR : (RTC Offset: 0x14) RTC Calendar Alarm Register -------- 
+#define AT91C_RTC_MONTHEN     (0x1 << 23) // (RTC) Month Alarm Enable
+#define AT91C_RTC_DATEEN      (0x1 << 31) // (RTC) Date Alarm Enable
+// -------- RTC_SR : (RTC Offset: 0x18) RTC Status Register -------- 
+#define AT91C_RTC_ACKUPD      (0x1 <<  0) // (RTC) Acknowledge for Update
+#define AT91C_RTC_ALARM       (0x1 <<  1) // (RTC) Alarm Flag
+#define AT91C_RTC_SECEV       (0x1 <<  2) // (RTC) Second Event
+#define AT91C_RTC_TIMEV       (0x1 <<  3) // (RTC) Time Event
+#define AT91C_RTC_CALEV       (0x1 <<  4) // (RTC) Calendar event
+// -------- RTC_SCCR : (RTC Offset: 0x1c) RTC Status Clear Command Register -------- 
+// -------- RTC_IER : (RTC Offset: 0x20) RTC Interrupt Enable Register -------- 
+// -------- RTC_IDR : (RTC Offset: 0x24) RTC Interrupt Disable Register -------- 
+// -------- RTC_IMR : (RTC Offset: 0x28) RTC Interrupt Mask Register -------- 
+// -------- RTC_VER : (RTC Offset: 0x2c) RTC Valid Entry Register -------- 
+#define AT91C_RTC_NVTIM       (0x1 <<  0) // (RTC) Non valid Time
+#define AT91C_RTC_NVCAL       (0x1 <<  1) // (RTC) Non valid Calendar
+#define AT91C_RTC_NVTIMALR    (0x1 <<  2) // (RTC) Non valid time Alarm
+#define AT91C_RTC_NVCALALR    (0x1 <<  3) // (RTC) Nonvalid Calendar Alarm
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Analog to Digital Convertor
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_ADC {
+	AT91_REG	 ADC_CR; 	// ADC Control Register
+	AT91_REG	 ADC_MR; 	// ADC Mode Register
+	AT91_REG	 Reserved0[2]; 	// 
+	AT91_REG	 ADC_CHER; 	// ADC Channel Enable Register
+	AT91_REG	 ADC_CHDR; 	// ADC Channel Disable Register
+	AT91_REG	 ADC_CHSR; 	// ADC Channel Status Register
+	AT91_REG	 ADC_SR; 	// ADC Status Register
+	AT91_REG	 ADC_LCDR; 	// ADC Last Converted Data Register
+	AT91_REG	 ADC_IER; 	// ADC Interrupt Enable Register
+	AT91_REG	 ADC_IDR; 	// ADC Interrupt Disable Register
+	AT91_REG	 ADC_IMR; 	// ADC Interrupt Mask Register
+	AT91_REG	 ADC_CDR0; 	// ADC Channel Data Register 0
+	AT91_REG	 ADC_CDR1; 	// ADC Channel Data Register 1
+	AT91_REG	 ADC_CDR2; 	// ADC Channel Data Register 2
+	AT91_REG	 ADC_CDR3; 	// ADC Channel Data Register 3
+	AT91_REG	 ADC_CDR4; 	// ADC Channel Data Register 4
+	AT91_REG	 ADC_CDR5; 	// ADC Channel Data Register 5
+	AT91_REG	 ADC_CDR6; 	// ADC Channel Data Register 6
+	AT91_REG	 ADC_CDR7; 	// ADC Channel Data Register 7
+	AT91_REG	 Reserved1[5]; 	// 
+	AT91_REG	 ADC_ACR; 	// Analog Control Register
+	AT91_REG	 ADC_EMR; 	// Extended Mode Register
+	AT91_REG	 Reserved2[32]; 	// 
+	AT91_REG	 ADC_ADDRSIZE; 	// ADC ADDRSIZE REGISTER 
+	AT91_REG	 ADC_IPNAME1; 	// ADC IPNAME1 REGISTER 
+	AT91_REG	 ADC_IPNAME2; 	// ADC IPNAME2 REGISTER 
+	AT91_REG	 ADC_FEATURES; 	// ADC FEATURES REGISTER 
+	AT91_REG	 ADC_VER; 	// ADC VERSION REGISTER
+	AT91_REG	 ADC_RPR; 	// Receive Pointer Register
+	AT91_REG	 ADC_RCR; 	// Receive Counter Register
+	AT91_REG	 ADC_TPR; 	// Transmit Pointer Register
+	AT91_REG	 ADC_TCR; 	// Transmit Counter Register
+	AT91_REG	 ADC_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 ADC_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 ADC_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 ADC_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 ADC_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 ADC_PTSR; 	// PDC Transfer Status Register
+} AT91S_ADC, *AT91PS_ADC;
+#else
+#define ADC_CR          (AT91_CAST(AT91_REG *) 	0x00000000) // (ADC_CR) ADC Control Register
+#define ADC_MR          (AT91_CAST(AT91_REG *) 	0x00000004) // (ADC_MR) ADC Mode Register
+#define ADC_CHER        (AT91_CAST(AT91_REG *) 	0x00000010) // (ADC_CHER) ADC Channel Enable Register
+#define ADC_CHDR        (AT91_CAST(AT91_REG *) 	0x00000014) // (ADC_CHDR) ADC Channel Disable Register
+#define ADC_CHSR        (AT91_CAST(AT91_REG *) 	0x00000018) // (ADC_CHSR) ADC Channel Status Register
+#define ADC_SR          (AT91_CAST(AT91_REG *) 	0x0000001C) // (ADC_SR) ADC Status Register
+#define ADC_LCDR        (AT91_CAST(AT91_REG *) 	0x00000020) // (ADC_LCDR) ADC Last Converted Data Register
+#define ADC_IER         (AT91_CAST(AT91_REG *) 	0x00000024) // (ADC_IER) ADC Interrupt Enable Register
+#define ADC_IDR         (AT91_CAST(AT91_REG *) 	0x00000028) // (ADC_IDR) ADC Interrupt Disable Register
+#define ADC_IMR         (AT91_CAST(AT91_REG *) 	0x0000002C) // (ADC_IMR) ADC Interrupt Mask Register
+#define ADC_CDR0        (AT91_CAST(AT91_REG *) 	0x00000030) // (ADC_CDR0) ADC Channel Data Register 0
+#define ADC_CDR1        (AT91_CAST(AT91_REG *) 	0x00000034) // (ADC_CDR1) ADC Channel Data Register 1
+#define ADC_CDR2        (AT91_CAST(AT91_REG *) 	0x00000038) // (ADC_CDR2) ADC Channel Data Register 2
+#define ADC_CDR3        (AT91_CAST(AT91_REG *) 	0x0000003C) // (ADC_CDR3) ADC Channel Data Register 3
+#define ADC_CDR4        (AT91_CAST(AT91_REG *) 	0x00000040) // (ADC_CDR4) ADC Channel Data Register 4
+#define ADC_CDR5        (AT91_CAST(AT91_REG *) 	0x00000044) // (ADC_CDR5) ADC Channel Data Register 5
+#define ADC_CDR6        (AT91_CAST(AT91_REG *) 	0x00000048) // (ADC_CDR6) ADC Channel Data Register 6
+#define ADC_CDR7        (AT91_CAST(AT91_REG *) 	0x0000004C) // (ADC_CDR7) ADC Channel Data Register 7
+#define ADC_ACR         (AT91_CAST(AT91_REG *) 	0x00000064) // (ADC_ACR) Analog Control Register
+#define ADC_EMR         (AT91_CAST(AT91_REG *) 	0x00000068) // (ADC_EMR) Extended Mode Register
+#define ADC_ADDRSIZE    (AT91_CAST(AT91_REG *) 	0x000000EC) // (ADC_ADDRSIZE) ADC ADDRSIZE REGISTER 
+#define ADC_IPNAME1     (AT91_CAST(AT91_REG *) 	0x000000F0) // (ADC_IPNAME1) ADC IPNAME1 REGISTER 
+#define ADC_IPNAME2     (AT91_CAST(AT91_REG *) 	0x000000F4) // (ADC_IPNAME2) ADC IPNAME2 REGISTER 
+#define ADC_FEATURES    (AT91_CAST(AT91_REG *) 	0x000000F8) // (ADC_FEATURES) ADC FEATURES REGISTER 
+#define ADC_VER         (AT91_CAST(AT91_REG *) 	0x000000FC) // (ADC_VER) ADC VERSION REGISTER
+
+#endif
+// -------- ADC_CR : (ADC Offset: 0x0) ADC Control Register -------- 
+#define AT91C_ADC_SWRST       (0x1 <<  0) // (ADC) Software Reset
+#define AT91C_ADC_START       (0x1 <<  1) // (ADC) Start Conversion
+// -------- ADC_MR : (ADC Offset: 0x4) ADC Mode Register -------- 
+#define AT91C_ADC_TRGEN       (0x1 <<  0) // (ADC) Trigger Enable
+#define 	AT91C_ADC_TRGEN_DIS                  (0x0) // (ADC) Hradware triggers are disabled. Starting a conversion is only possible by software
+#define 	AT91C_ADC_TRGEN_EN                   (0x1) // (ADC) Hardware trigger selected by TRGSEL field is enabled.
+#define AT91C_ADC_TRGSEL      (0x7 <<  1) // (ADC) Trigger Selection
+#define 	AT91C_ADC_TRGSEL_EXT                  (0x0 <<  1) // (ADC) Selected TRGSEL = External Trigger
+#define 	AT91C_ADC_TRGSEL_TIOA0                (0x1 <<  1) // (ADC) Selected TRGSEL = TIAO0
+#define 	AT91C_ADC_TRGSEL_TIOA1                (0x2 <<  1) // (ADC) Selected TRGSEL = TIAO1
+#define 	AT91C_ADC_TRGSEL_TIOA2                (0x3 <<  1) // (ADC) Selected TRGSEL = TIAO2
+#define 	AT91C_ADC_TRGSEL_PWM0_TRIG            (0x4 <<  1) // (ADC) Selected TRGSEL = PWM trigger
+#define 	AT91C_ADC_TRGSEL_PWM1_TRIG            (0x5 <<  1) // (ADC) Selected TRGSEL = PWM Trigger
+#define 	AT91C_ADC_TRGSEL_RESERVED             (0x6 <<  1) // (ADC) Selected TRGSEL = Reserved
+#define AT91C_ADC_LOWRES      (0x1 <<  4) // (ADC) Resolution.
+#define 	AT91C_ADC_LOWRES_10_BIT               (0x0 <<  4) // (ADC) 10-bit resolution
+#define 	AT91C_ADC_LOWRES_8_BIT                (0x1 <<  4) // (ADC) 8-bit resolution
+#define AT91C_ADC_SLEEP       (0x1 <<  5) // (ADC) Sleep Mode
+#define 	AT91C_ADC_SLEEP_NORMAL_MODE          (0x0 <<  5) // (ADC) Normal Mode
+#define 	AT91C_ADC_SLEEP_MODE                 (0x1 <<  5) // (ADC) Sleep Mode
+#define AT91C_ADC_PRESCAL     (0x3F <<  8) // (ADC) Prescaler rate selection
+#define AT91C_ADC_STARTUP     (0x1F << 16) // (ADC) Startup Time
+#define AT91C_ADC_SHTIM       (0xF << 24) // (ADC) Sample & Hold Time
+// -------- 	ADC_CHER : (ADC Offset: 0x10) ADC Channel Enable Register -------- 
+#define AT91C_ADC_CH0         (0x1 <<  0) // (ADC) Channel 0
+#define AT91C_ADC_CH1         (0x1 <<  1) // (ADC) Channel 1
+#define AT91C_ADC_CH2         (0x1 <<  2) // (ADC) Channel 2
+#define AT91C_ADC_CH3         (0x1 <<  3) // (ADC) Channel 3
+#define AT91C_ADC_CH4         (0x1 <<  4) // (ADC) Channel 4
+#define AT91C_ADC_CH5         (0x1 <<  5) // (ADC) Channel 5
+#define AT91C_ADC_CH6         (0x1 <<  6) // (ADC) Channel 6
+#define AT91C_ADC_CH7         (0x1 <<  7) // (ADC) Channel 7
+// -------- 	ADC_CHDR : (ADC Offset: 0x14) ADC Channel Disable Register -------- 
+// -------- 	ADC_CHSR : (ADC Offset: 0x18) ADC Channel Status Register -------- 
+// -------- ADC_SR : (ADC Offset: 0x1c) ADC Status Register -------- 
+#define AT91C_ADC_EOC0        (0x1 <<  0) // (ADC) End of Conversion
+#define AT91C_ADC_EOC1        (0x1 <<  1) // (ADC) End of Conversion
+#define AT91C_ADC_EOC2        (0x1 <<  2) // (ADC) End of Conversion
+#define AT91C_ADC_EOC3        (0x1 <<  3) // (ADC) End of Conversion
+#define AT91C_ADC_EOC4        (0x1 <<  4) // (ADC) End of Conversion
+#define AT91C_ADC_EOC5        (0x1 <<  5) // (ADC) End of Conversion
+#define AT91C_ADC_EOC6        (0x1 <<  6) // (ADC) End of Conversion
+#define AT91C_ADC_EOC7        (0x1 <<  7) // (ADC) End of Conversion
+#define AT91C_ADC_OVRE0       (0x1 <<  8) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE1       (0x1 <<  9) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE2       (0x1 << 10) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE3       (0x1 << 11) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE4       (0x1 << 12) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE5       (0x1 << 13) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE6       (0x1 << 14) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE7       (0x1 << 15) // (ADC) Overrun Error
+#define AT91C_ADC_DRDY        (0x1 << 16) // (ADC) Data Ready
+#define AT91C_ADC_GOVRE       (0x1 << 17) // (ADC) General Overrun
+#define AT91C_ADC_ENDRX       (0x1 << 18) // (ADC) End of Receiver Transfer
+#define AT91C_ADC_RXBUFF      (0x1 << 19) // (ADC) RXBUFF Interrupt
+// -------- ADC_LCDR : (ADC Offset: 0x20) ADC Last Converted Data Register -------- 
+#define AT91C_ADC_LDATA       (0x3FF <<  0) // (ADC) Last Data Converted
+// -------- ADC_IER : (ADC Offset: 0x24) ADC Interrupt Enable Register -------- 
+// -------- ADC_IDR : (ADC Offset: 0x28) ADC Interrupt Disable Register -------- 
+// -------- ADC_IMR : (ADC Offset: 0x2c) ADC Interrupt Mask Register -------- 
+// -------- ADC_CDR0 : (ADC Offset: 0x30) ADC Channel Data Register 0 -------- 
+#define AT91C_ADC_DATA        (0x3FF <<  0) // (ADC) Converted Data
+// -------- ADC_CDR1 : (ADC Offset: 0x34) ADC Channel Data Register 1 -------- 
+// -------- ADC_CDR2 : (ADC Offset: 0x38) ADC Channel Data Register 2 -------- 
+// -------- ADC_CDR3 : (ADC Offset: 0x3c) ADC Channel Data Register 3 -------- 
+// -------- ADC_CDR4 : (ADC Offset: 0x40) ADC Channel Data Register 4 -------- 
+// -------- ADC_CDR5 : (ADC Offset: 0x44) ADC Channel Data Register 5 -------- 
+// -------- ADC_CDR6 : (ADC Offset: 0x48) ADC Channel Data Register 6 -------- 
+// -------- ADC_CDR7 : (ADC Offset: 0x4c) ADC Channel Data Register 7 -------- 
+// -------- ADC_ACR : (ADC Offset: 0x64) ADC Analog Controler Register -------- 
+#define AT91C_ADC_GAIN        (0x3 <<  0) // (ADC) Input Gain
+#define AT91C_ADC_IBCTL       (0x3 <<  6) // (ADC) Bias Current Control
+#define 	AT91C_ADC_IBCTL_00                   (0x0 <<  6) // (ADC) typ - 20%
+#define 	AT91C_ADC_IBCTL_01                   (0x1 <<  6) // (ADC) typ
+#define 	AT91C_ADC_IBCTL_10                   (0x2 <<  6) // (ADC) typ + 20%
+#define 	AT91C_ADC_IBCTL_11                   (0x3 <<  6) // (ADC) typ + 40%
+#define AT91C_ADC_DIFF        (0x1 << 16) // (ADC) Differential Mode
+#define AT91C_ADC_OFFSET      (0x1 << 17) // (ADC) Input OFFSET
+// -------- ADC_EMR : (ADC Offset: 0x68) ADC Extended Mode Register -------- 
+#define AT91C_OFFMODES        (0x1 <<  0) // (ADC) Off Mode if
+#define AT91C_OFF_MODE_STARTUP_TIME (0x1 << 16) // (ADC) Startup Time
+// -------- ADC_VER : (ADC Offset: 0xfc) ADC VER -------- 
+#define AT91C_ADC_VER         (0xF <<  0) // (ADC) ADC VER
+
+// *****************************************************************************
+//   SOFTWARE API DEFINITION FOR Analog-to Digital Converter
+// *****************************************************************************
+
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_ADC12B {
+  AT91_REG ADC12B_CR;     // Control Register
+  AT91_REG ADC12B_MR;     // Mode Register
+  AT91_REG Reserved1[2]; 
+  AT91_REG ADC12B_CHER;   // Channel Enable Register
+  AT91_REG ADC12B_CHDR;   // Channel Disable Register
+  AT91_REG ADC12B_CHSR;   // Channel Status Register
+  AT91_REG ADC12B_SR;     // Status Register
+  AT91_REG ADC12B_LCDR;   // Last Converted Data Register
+  AT91_REG ADC12B_IER;    // Interrupt Enable Register
+  AT91_REG ADC12B_IDR;    // Interrupt Disable Register
+  AT91_REG ADC12B_IMR;    // Interrupt Mask Register
+  AT91_REG ADC12B_CDR[8]; // Channel Data Register
+  AT91_REG Reserved2[5]; 
+  AT91_REG ADC12B_ACR;    // Analog Control Register
+  AT91_REG ADC12B_EMR;    // Extended Mode Register
+} AT91S_ADC12B, *AT91PS_ADC12B;
+#else
+#define ADC12B_CR   (AT91_CAST(AT91_REG *) 0x00000000) // Control Register
+#define ADC12B_MR   (AT91_CAST(AT91_REG *) 0x00000004) // Mode Register
+#define ADC12B_CHER (AT91_CAST(AT91_REG *) 0x00000010) // Channel Enable Register
+#define ADC12B_CHDR (AT91_CAST(AT91_REG *) 0x00000014) // Channel Disable Register
+#define ADC12B_CHSR (AT91_CAST(AT91_REG *) 0x00000018) // Channel Status Register
+#define ADC12B_SR   (AT91_CAST(AT91_REG *) 0x0000001C) // Status Register
+#define ADC12B_LCDR (AT91_CAST(AT91_REG *) 0x00000020) // Last Converted Data Register
+#define ADC12B_IER  (AT91_CAST(AT91_REG *) 0x00000024) // Interrupt Enable Register
+#define ADC12B_IDR  (AT91_CAST(AT91_REG *) 0x00000028) // Interrupt Disable Register
+#define ADC12B_IMR  (AT91_CAST(AT91_REG *) 0x0000002C) // Interrupt Mask Register
+#define ADC12B_CDR  (AT91_CAST(AT91_REG *) 0x00000030) // Channel Data Register
+#define ADC12B_ACR  (AT91_CAST(AT91_REG *) 0x00000064) // Analog Control Register
+#define ADC12B_EMR  (AT91_CAST(AT91_REG *) 0x00000068) // Extended Mode Register
+#endif
+// -------- ADC12B_CR : (ADC12B Offset: 0x00) Control Register --------
+#define AT91C_ADC12B_CR_SWRST (0x1 << 0) // (ADC12B) Software Reset
+#define   AT91C_ADC12B_CR_SWRST_NO_EFFECT (0x0 << 0) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CR_SWRST_RESET (0x1 << 0) // (ADC12B) Resets the ADC12B simulating a hardware reset.
+#define AT91C_ADC12B_CR_START (0x1 << 1) // (ADC12B) Start Conversion
+#define   AT91C_ADC12B_CR_START_NO_EFFECT (0x0 << 1) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CR_START_BEGIN_ADC (0x1 << 1) // (ADC12B) Begins analog-to-digital conversion.
+// -------- ADC12B_MR : (ADC12B Offset: 0x04) Mode Register --------
+#define AT91C_ADC12B_MR_TRGEN (0x1 << 0) // (ADC12B) Trigger Enable
+#define   AT91C_ADC12B_MR_TRGEN_DIS (0x0 << 0) // (ADC12B) Hardware triggers are disabled. Starting a conversion is only possible by software.
+#define   AT91C_ADC12B_MR_TRGEN_EN (0x1 << 0) // (ADC12B) Hardware trigger selected by TRGSEL field is enabled.
+#define AT91C_ADC12B_MR_TRGSEL (0x7 << 1) // (ADC12B) Trigger Selection
+#define   AT91C_ADC12B_MR_TRGSEL_EXT_TRIG (0x0 << 1) // (ADC12B) External trigger
+#define   AT91C_ADC12B_MR_TRGSEL_TIOA_0 (0x1 << 1) // (ADC12B) TIO Output of the Timer Counter Channel 0
+#define   AT91C_ADC12B_MR_TRGSEL_TIOA_1 (0x2 << 1) // (ADC12B) TIO Output of the Timer Counter Channel 1
+#define   AT91C_ADC12B_MR_TRGSEL_TIOA_2 (0x3 << 1) // (ADC12B) TIO Output of the Timer Counter Channel 2
+#define   AT91C_ADC12B_MR_TRGSEL_TIOA_3 (0x4 << 1) // (ADC12B) PWM Event Line 0
+#define   AT91C_ADC12B_MR_TRGSEL_TIOA_4 (0x5 << 1) // (ADC12B) PWM Event Line 1
+#define AT91C_ADC12B_MR_LOWRES (0x1 << 4) // (ADC12B) Resolution
+#define   AT91C_ADC12B_MR_LOWRES_12_BIT (0x0 << 4) // (ADC12B) 12-bit resolution
+#define   AT91C_ADC12B_MR_LOWRES_10_BIT (0x1 << 4) // (ADC12B) 10-bit resolution
+#define AT91C_ADC12B_MR_SLEEP (0x1 << 5) // (ADC12B) Sleep Mode
+#define   AT91C_ADC12B_MR_SLEEP_NORMAL (0x0 << 5) // (ADC12B) Normal Mode
+#define   AT91C_ADC12B_MR_SLEEP_SLEEP (0x1 << 5) // (ADC12B) Sleep Modes (see OFFMODES register)
+#define AT91C_ADC12B_MR_PRESCAL (0xff << 8) // (ADC12B) Prescaler Rate Selection
+#define AT91C_ADC12B_MR_STARTUP (0xff << 16) // (ADC12B) Start Up Time
+#define AT91C_ADC12B_MR_SHTIM (0xf << 24) // (ADC12B) Sample & Hold Time
+// -------- ADC12B_CHER : (ADC12B Offset: 0x10) Channel Enable Register --------
+#define AT91C_ADC12B_CHER_CH0 (0x1 << 0) // (ADC12B) Channel 0 Enable
+#define   AT91C_ADC12B_CHER_CH0_NO_EFFECT (0x0 << 0) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHER_CH0_ENABLE (0x1 << 0) // (ADC12B) Enables the corresponding channel.
+#define AT91C_ADC12B_CHER_CH1 (0x1 << 1) // (ADC12B) Channel 1 Enable
+#define   AT91C_ADC12B_CHER_CH1_NO_EFFECT (0x0 << 1) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHER_CH1_ENABLE (0x1 << 1) // (ADC12B) Enables the corresponding channel.
+#define AT91C_ADC12B_CHER_CH2 (0x1 << 2) // (ADC12B) Channel 2 Enable
+#define   AT91C_ADC12B_CHER_CH2_NO_EFFECT (0x0 << 2) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHER_CH2_ENABLE (0x1 << 2) // (ADC12B) Enables the corresponding channel.
+#define AT91C_ADC12B_CHER_CH3 (0x1 << 3) // (ADC12B) Channel 3 Enable
+#define   AT91C_ADC12B_CHER_CH3_NO_EFFECT (0x0 << 3) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHER_CH3_ENABLE (0x1 << 3) // (ADC12B) Enables the corresponding channel.
+#define AT91C_ADC12B_CHER_CH4 (0x1 << 4) // (ADC12B) Channel 4 Enable
+#define   AT91C_ADC12B_CHER_CH4_NO_EFFECT (0x0 << 4) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHER_CH4_ENABLE (0x1 << 4) // (ADC12B) Enables the corresponding channel.
+#define AT91C_ADC12B_CHER_CH5 (0x1 << 5) // (ADC12B) Channel 5 Enable
+#define   AT91C_ADC12B_CHER_CH5_NO_EFFECT (0x0 << 5) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHER_CH5_ENABLE (0x1 << 5) // (ADC12B) Enables the corresponding channel.
+#define AT91C_ADC12B_CHER_CH6 (0x1 << 6) // (ADC12B) Channel 6 Enable
+#define   AT91C_ADC12B_CHER_CH6_NO_EFFECT (0x0 << 6) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHER_CH6_ENABLE (0x1 << 6) // (ADC12B) Enables the corresponding channel.
+#define AT91C_ADC12B_CHER_CH7 (0x1 << 7) // (ADC12B) Channel 7 Enable
+#define   AT91C_ADC12B_CHER_CH7_NO_EFFECT (0x0 << 7) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHER_CH7_ENABLE (0x1 << 7) // (ADC12B) Enables the corresponding channel.
+// -------- ADC12B_CHDR : (ADC12B Offset: 0x14) Channel Disable Register --------
+#define AT91C_ADC12B_CHDR_CH0 (0x1 << 0) // (ADC12B) Channel 0 Disable
+#define   AT91C_ADC12B_CHDR_CH0_NO_EFFECT (0x0 << 0) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHDR_CH0_DISABLE (0x1 << 0) // (ADC12B) Disables the corresponding channel.
+#define AT91C_ADC12B_CHDR_CH1 (0x1 << 1) // (ADC12B) Channel 1 Disable
+#define   AT91C_ADC12B_CHDR_CH1_NO_EFFECT (0x0 << 1) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHDR_CH1_DISABLE (0x1 << 1) // (ADC12B) Disables the corresponding channel.
+#define AT91C_ADC12B_CHDR_CH2 (0x1 << 2) // (ADC12B) Channel 2 Disable
+#define   AT91C_ADC12B_CHDR_CH2_NO_EFFECT (0x0 << 2) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHDR_CH2_DISABLE (0x1 << 2) // (ADC12B) Disables the corresponding channel.
+#define AT91C_ADC12B_CHDR_CH3 (0x1 << 3) // (ADC12B) Channel 3 Disable
+#define   AT91C_ADC12B_CHDR_CH3_NO_EFFECT (0x0 << 3) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHDR_CH3_DISABLE (0x1 << 3) // (ADC12B) Disables the corresponding channel.
+#define AT91C_ADC12B_CHDR_CH4 (0x1 << 4) // (ADC12B) Channel 4 Disable
+#define   AT91C_ADC12B_CHDR_CH4_NO_EFFECT (0x0 << 4) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHDR_CH4_DISABLE (0x1 << 4) // (ADC12B) Disables the corresponding channel.
+#define AT91C_ADC12B_CHDR_CH5 (0x1 << 5) // (ADC12B) Channel 5 Disable
+#define   AT91C_ADC12B_CHDR_CH5_NO_EFFECT (0x0 << 5) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHDR_CH5_DISABLE (0x1 << 5) // (ADC12B) Disables the corresponding channel.
+#define AT91C_ADC12B_CHDR_CH6 (0x1 << 6) // (ADC12B) Channel 6 Disable
+#define   AT91C_ADC12B_CHDR_CH6_NO_EFFECT (0x0 << 6) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHDR_CH6_DISABLE (0x1 << 6) // (ADC12B) Disables the corresponding channel.
+#define AT91C_ADC12B_CHDR_CH7 (0x1 << 7) // (ADC12B) Channel 7 Disable
+#define   AT91C_ADC12B_CHDR_CH7_NO_EFFECT (0x0 << 7) // (ADC12B) No effect.
+#define   AT91C_ADC12B_CHDR_CH7_DISABLE (0x1 << 7) // (ADC12B) Disables the corresponding channel.
+// -------- ADC12B_CHSR : (ADC12B Offset: 0x18) Channel Status Register --------
+#define AT91C_ADC12B_CHSR_CH0 (0x1 << 0) // (ADC12B) Channel 0 Status
+#define   AT91C_ADC12B_CHSR_CH0_DISABLED (0x0 << 0) // (ADC12B) Corresponding channel is disabled.
+#define   AT91C_ADC12B_CHSR_CH0_ENABLED (0x1 << 0) // (ADC12B) Corresponding channel is enabled.
+#define AT91C_ADC12B_CHSR_CH1 (0x1 << 1) // (ADC12B) Channel 1 Status
+#define   AT91C_ADC12B_CHSR_CH1_DISABLED (0x0 << 1) // (ADC12B) Corresponding channel is disabled.
+#define   AT91C_ADC12B_CHSR_CH1_ENABLED (0x1 << 1) // (ADC12B) Corresponding channel is enabled.
+#define AT91C_ADC12B_CHSR_CH2 (0x1 << 2) // (ADC12B) Channel 2 Status
+#define   AT91C_ADC12B_CHSR_CH2_DISABLED (0x0 << 2) // (ADC12B) Corresponding channel is disabled.
+#define   AT91C_ADC12B_CHSR_CH2_ENABLED (0x1 << 2) // (ADC12B) Corresponding channel is enabled.
+#define AT91C_ADC12B_CHSR_CH3 (0x1 << 3) // (ADC12B) Channel 3 Status
+#define   AT91C_ADC12B_CHSR_CH3_DISABLED (0x0 << 3) // (ADC12B) Corresponding channel is disabled.
+#define   AT91C_ADC12B_CHSR_CH3_ENABLED (0x1 << 3) // (ADC12B) Corresponding channel is enabled.
+#define AT91C_ADC12B_CHSR_CH4 (0x1 << 4) // (ADC12B) Channel 4 Status
+#define   AT91C_ADC12B_CHSR_CH4_DISABLED (0x0 << 4) // (ADC12B) Corresponding channel is disabled.
+#define   AT91C_ADC12B_CHSR_CH4_ENABLED (0x1 << 4) // (ADC12B) Corresponding channel is enabled.
+#define AT91C_ADC12B_CHSR_CH5 (0x1 << 5) // (ADC12B) Channel 5 Status
+#define   AT91C_ADC12B_CHSR_CH5_DISABLED (0x0 << 5) // (ADC12B) Corresponding channel is disabled.
+#define   AT91C_ADC12B_CHSR_CH5_ENABLED (0x1 << 5) // (ADC12B) Corresponding channel is enabled.
+#define AT91C_ADC12B_CHSR_CH6 (0x1 << 6) // (ADC12B) Channel 6 Status
+#define   AT91C_ADC12B_CHSR_CH6_DISABLED (0x0 << 6) // (ADC12B) Corresponding channel is disabled.
+#define   AT91C_ADC12B_CHSR_CH6_ENABLED (0x1 << 6) // (ADC12B) Corresponding channel is enabled.
+#define AT91C_ADC12B_CHSR_CH7 (0x1 << 7) // (ADC12B) Channel 7 Status
+#define   AT91C_ADC12B_CHSR_CH7_DISABLED (0x0 << 7) // (ADC12B) Corresponding channel is disabled.
+#define   AT91C_ADC12B_CHSR_CH7_ENABLED (0x1 << 7) // (ADC12B) Corresponding channel is enabled.
+// -------- ADC12B_SR : (ADC12B Offset: 0x1C) Status Register --------
+#define AT91C_ADC12B_SR_EOC0 (0x1 << 0) // (ADC12B) End of Conversion 0
+#define   AT91C_ADC12B_SR_EOC0_DISABLE (0x0 << 0) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished.
+#define   AT91C_ADC12B_SR_EOC0_ENABLE (0x1 << 0) // (ADC12B) Corresponding analog channel is enabled and conversion is complete.
+#define AT91C_ADC12B_SR_EOC1 (0x1 << 1) // (ADC12B) End of Conversion 1
+#define   AT91C_ADC12B_SR_EOC1_DISABLE (0x0 << 1) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished.
+#define   AT91C_ADC12B_SR_EOC1_ENABLE (0x1 << 1) // (ADC12B) Corresponding analog channel is enabled and conversion is complete.
+#define AT91C_ADC12B_SR_EOC2 (0x1 << 2) // (ADC12B) End of Conversion 2
+#define   AT91C_ADC12B_SR_EOC2_DISABLE (0x0 << 2) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished.
+#define   AT91C_ADC12B_SR_EOC2_ENABLE (0x1 << 2) // (ADC12B) Corresponding analog channel is enabled and conversion is complete.
+#define AT91C_ADC12B_SR_EOC3 (0x1 << 3) // (ADC12B) End of Conversion 3
+#define   AT91C_ADC12B_SR_EOC3_DISABLE (0x0 << 3) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished.
+#define   AT91C_ADC12B_SR_EOC3_ENABLE (0x1 << 3) // (ADC12B) Corresponding analog channel is enabled and conversion is complete.
+#define AT91C_ADC12B_SR_EOC4 (0x1 << 4) // (ADC12B) End of Conversion 4
+#define   AT91C_ADC12B_SR_EOC4_DISABLE (0x0 << 4) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished.
+#define   AT91C_ADC12B_SR_EOC4_ENABLE (0x1 << 4) // (ADC12B) Corresponding analog channel is enabled and conversion is complete.
+#define AT91C_ADC12B_SR_EOC5 (0x1 << 5) // (ADC12B) End of Conversion 5
+#define   AT91C_ADC12B_SR_EOC5_DISABLE (0x0 << 5) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished.
+#define   AT91C_ADC12B_SR_EOC5_ENABLE (0x1 << 5) // (ADC12B) Corresponding analog channel is enabled and conversion is complete.
+#define AT91C_ADC12B_SR_EOC6 (0x1 << 6) // (ADC12B) End of Conversion 6
+#define   AT91C_ADC12B_SR_EOC6_DISABLE (0x0 << 6) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished.
+#define   AT91C_ADC12B_SR_EOC6_ENABLE (0x1 << 6) // (ADC12B) Corresponding analog channel is enabled and conversion is complete.
+#define AT91C_ADC12B_SR_EOC7 (0x1 << 7) // (ADC12B) End of Conversion 7
+#define   AT91C_ADC12B_SR_EOC7_DISABLE (0x0 << 7) // (ADC12B) Corresponding analog channel is disabled, or the conversion is not finished.
+#define   AT91C_ADC12B_SR_EOC7_ENABLE (0x1 << 7) // (ADC12B) Corresponding analog channel is enabled and conversion is complete.
+#define AT91C_ADC12B_SR_OVRE0 (0x1 << 8) // (ADC12B) Overrun Error 0
+#define   AT91C_ADC12B_SR_OVRE0_NO_ERROR (0x0 << 8) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define   AT91C_ADC12B_SR_OVRE0_ERROR (0x1 << 8) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define AT91C_ADC12B_SR_OVRE1 (0x1 << 9) // (ADC12B) Overrun Error 1
+#define   AT91C_ADC12B_SR_OVRE1_NO_ERROR (0x0 << 9) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define   AT91C_ADC12B_SR_OVRE1_ERROR (0x1 << 9) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define AT91C_ADC12B_SR_OVRE2 (0x1 << 10) // (ADC12B) Overrun Error 2
+#define   AT91C_ADC12B_SR_OVRE2_NO_ERROR (0x0 << 10) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define   AT91C_ADC12B_SR_OVRE2_ERROR (0x1 << 10) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define AT91C_ADC12B_SR_OVRE3 (0x1 << 11) // (ADC12B) Overrun Error 3
+#define   AT91C_ADC12B_SR_OVRE3_NO_ERROR (0x0 << 11) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define   AT91C_ADC12B_SR_OVRE3_ERROR (0x1 << 11) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define AT91C_ADC12B_SR_OVRE4 (0x1 << 12) // (ADC12B) Overrun Error 4
+#define   AT91C_ADC12B_SR_OVRE4_NO_ERROR (0x0 << 12) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define   AT91C_ADC12B_SR_OVRE4_ERROR (0x1 << 12) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define AT91C_ADC12B_SR_OVRE5 (0x1 << 13) // (ADC12B) Overrun Error 5
+#define   AT91C_ADC12B_SR_OVRE5_NO_ERROR (0x0 << 13) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define   AT91C_ADC12B_SR_OVRE5_ERROR (0x1 << 13) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define AT91C_ADC12B_SR_OVRE6 (0x1 << 14) // (ADC12B) Overrun Error 6
+#define   AT91C_ADC12B_SR_OVRE6_NO_ERROR (0x0 << 14) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define   AT91C_ADC12B_SR_OVRE6_ERROR (0x1 << 14) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define AT91C_ADC12B_SR_OVRE7 (0x1 << 15) // (ADC12B) Overrun Error 7
+#define   AT91C_ADC12B_SR_OVRE7_NO_ERROR (0x0 << 15) // (ADC12B) No overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define   AT91C_ADC12B_SR_OVRE7_ERROR (0x1 << 15) // (ADC12B) There has been an overrun error on the corresponding channel since the last read of ADC12B_SR.
+#define AT91C_ADC12B_SR_DRDY (0x1 << 16) // (ADC12B) Data Ready
+#define   AT91C_ADC12B_SR_DRDY_NO_CONV (0x0 << 16) // (ADC12B) No data has been converted since the last read of ADC12B_LCDR.
+#define   AT91C_ADC12B_SR_DRDY_CONV (0x1 << 16) // (ADC12B) At least one data has been converted and is available in ADC12B_LCDR.
+#define AT91C_ADC12B_SR_GOVRE (0x1 << 17) // (ADC12B) General Overrun Error
+#define   AT91C_ADC12B_SR_GOVRE_NO_ERROR (0x0 << 17) // (ADC12B) No General Overrun Error occurred since the last read of ADC12B_SR.
+#define   AT91C_ADC12B_SR_GOVRE_ERROR (0x1 << 17) // (ADC12B) At least one General Overrun Error has occurred since the last read of ADC12B_SR.
+#define AT91C_ADC12B_SR_ENDRX (0x1 << 18) // (ADC12B) End of RX Buffer
+#define   AT91C_ADC12B_SR_ENDRX_NOT_REACH (0x0 << 18) // (ADC12B) The Receive Counter Register has not reached 0 since the last write in ADC12B_RCR or ADC12B_RNCR.
+#define   AT91C_ADC12B_SR_ENDRX_REACH_0 (0x1 << 18) // (ADC12B) The Receive Counter Register has reached 0 since the last write in ADC12B_RCR or ADC12B_RNCR.
+#define AT91C_ADC12B_SR_RXBUFF (0x1 << 19) // (ADC12B) RX Buffer Full
+#define   AT91C_ADC12B_SR_RXBUFF_NO_ZERO (0x0 << 19) // (ADC12B) ADC12B_RCR or ADC12B_RNCR have a value other than 0.
+#define   AT91C_ADC12B_SR_RXBUFF_ZERO (0x1 << 19) // (ADC12B) Both ADC12B_RCR and ADC12B_RNCR have a value of 0.
+// -------- ADC12B_LCDR : (ADC12B Offset: 0x20) Last Converted Data Register --------
+#define AT91C_ADC12B_LCDR_LDATA (0xfff << 0) // (ADC12B) Last Data Converted
+// -------- ADC12B_IER : (ADC12B Offset: 0x24) Interrupt Enable Register --------
+#define AT91C_ADC12B_IER_EOC0 (0x1 << 0) // (ADC12B) End of Conversion Interrupt Enable 0
+#define   AT91C_ADC12B_IER_EOC0_NO_EFFECT (0x0 << 0) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_EOC0_ENABLE (0x1 << 0) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_EOC1 (0x1 << 1) // (ADC12B) End of Conversion Interrupt Enable 1
+#define   AT91C_ADC12B_IER_EOC1_NO_EFFECT (0x0 << 1) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_EOC1_ENABLE (0x1 << 1) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_EOC2 (0x1 << 2) // (ADC12B) End of Conversion Interrupt Enable 2
+#define   AT91C_ADC12B_IER_EOC2_NO_EFFECT (0x0 << 2) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_EOC2_ENABLE (0x1 << 2) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_EOC3 (0x1 << 3) // (ADC12B) End of Conversion Interrupt Enable 3
+#define   AT91C_ADC12B_IER_EOC3_NO_EFFECT (0x0 << 3) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_EOC3_ENABLE (0x1 << 3) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_EOC4 (0x1 << 4) // (ADC12B) End of Conversion Interrupt Enable 4
+#define   AT91C_ADC12B_IER_EOC4_NO_EFFECT (0x0 << 4) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_EOC4_ENABLE (0x1 << 4) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_EOC5 (0x1 << 5) // (ADC12B) End of Conversion Interrupt Enable 5
+#define   AT91C_ADC12B_IER_EOC5_NO_EFFECT (0x0 << 5) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_EOC5_ENABLE (0x1 << 5) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_EOC6 (0x1 << 6) // (ADC12B) End of Conversion Interrupt Enable 6
+#define   AT91C_ADC12B_IER_EOC6_NO_EFFECT (0x0 << 6) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_EOC6_ENABLE (0x1 << 6) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_EOC7 (0x1 << 7) // (ADC12B) End of Conversion Interrupt Enable 7
+#define   AT91C_ADC12B_IER_EOC7_NO_EFFECT (0x0 << 7) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_EOC7_ENABLE (0x1 << 7) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_OVRE0 (0x1 << 8) // (ADC12B) Overrun Error Interrupt Enable 0
+#define   AT91C_ADC12B_IER_OVRE0_NO_EFFECT (0x0 << 8) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_OVRE0_ENABLE (0x1 << 8) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_OVRE1 (0x1 << 9) // (ADC12B) Overrun Error Interrupt Enable 1
+#define   AT91C_ADC12B_IER_OVRE1_NO_EFFECT (0x0 << 9) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_OVRE1_ENABLE (0x1 << 9) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_OVRE2 (0x1 << 10) // (ADC12B) Overrun Error Interrupt Enable 2
+#define   AT91C_ADC12B_IER_OVRE2_NO_EFFECT (0x0 << 10) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_OVRE2_ENABLE (0x1 << 10) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_OVRE3 (0x1 << 11) // (ADC12B) Overrun Error Interrupt Enable 3
+#define   AT91C_ADC12B_IER_OVRE3_NO_EFFECT (0x0 << 11) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_OVRE3_ENABLE (0x1 << 11) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_OVRE4 (0x1 << 12) // (ADC12B) Overrun Error Interrupt Enable 4
+#define   AT91C_ADC12B_IER_OVRE4_NO_EFFECT (0x0 << 12) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_OVRE4_ENABLE (0x1 << 12) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_OVRE5 (0x1 << 13) // (ADC12B) Overrun Error Interrupt Enable 5
+#define   AT91C_ADC12B_IER_OVRE5_NO_EFFECT (0x0 << 13) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_OVRE5_ENABLE (0x1 << 13) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_OVRE6 (0x1 << 14) // (ADC12B) Overrun Error Interrupt Enable 6
+#define   AT91C_ADC12B_IER_OVRE6_NO_EFFECT (0x0 << 14) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_OVRE6_ENABLE (0x1 << 14) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_OVRE7 (0x1 << 15) // (ADC12B) Overrun Error Interrupt Enable 7
+#define   AT91C_ADC12B_IER_OVRE7_NO_EFFECT (0x0 << 15) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_OVRE7_ENABLE (0x1 << 15) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_DRDY (0x1 << 16) // (ADC12B) Data Ready Interrupt Enable
+#define   AT91C_ADC12B_IER_DRDY_NO_EFFECT (0x0 << 16) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_DRDY_ENABLE (0x1 << 16) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_GOVRE (0x1 << 17) // (ADC12B) General Overrun Error Interrupt Enable
+#define   AT91C_ADC12B_IER_GOVRE_NO_EFFECT (0x0 << 17) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_GOVRE_ENABLE (0x1 << 17) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_ENDRX (0x1 << 18) // (ADC12B) End of Receive Buffer Interrupt Enable
+#define   AT91C_ADC12B_IER_ENDRX_NO_EFFECT (0x0 << 18) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_ENDRX_ENABLE (0x1 << 18) // (ADC12B) Enables the corresponding interrupt.
+#define AT91C_ADC12B_IER_RXBUFF (0x1 << 19) // (ADC12B) Receive Buffer Full Interrupt Enable
+#define   AT91C_ADC12B_IER_RXBUFF_NO_EFFECT (0x0 << 19) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IER_RXBUFF_ENABLE (0x1 << 19) // (ADC12B) Enables the corresponding interrupt.
+// -------- ADC12B_IDR : (ADC12B Offset: 0x28) Interrupt Disable Register --------
+#define AT91C_ADC12B_IDR_EOC0 (0x1 << 0) // (ADC12B) End of Conversion Interrupt Disable 0
+#define   AT91C_ADC12B_IDR_EOC0_NO_EFFECT (0x0 << 0) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_EOC0_DISABLE (0x1 << 0) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_EOC1 (0x1 << 1) // (ADC12B) End of Conversion Interrupt Disable 1
+#define   AT91C_ADC12B_IDR_EOC1_NO_EFFECT (0x0 << 1) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_EOC1_DISABLE (0x1 << 1) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_EOC2 (0x1 << 2) // (ADC12B) End of Conversion Interrupt Disable 2
+#define   AT91C_ADC12B_IDR_EOC2_NO_EFFECT (0x0 << 2) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_EOC2_DISABLE (0x1 << 2) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_EOC3 (0x1 << 3) // (ADC12B) End of Conversion Interrupt Disable 3
+#define   AT91C_ADC12B_IDR_EOC3_NO_EFFECT (0x0 << 3) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_EOC3_DISABLE (0x1 << 3) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_EOC4 (0x1 << 4) // (ADC12B) End of Conversion Interrupt Disable 4
+#define   AT91C_ADC12B_IDR_EOC4_NO_EFFECT (0x0 << 4) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_EOC4_DISABLE (0x1 << 4) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_EOC5 (0x1 << 5) // (ADC12B) End of Conversion Interrupt Disable 5
+#define   AT91C_ADC12B_IDR_EOC5_NO_EFFECT (0x0 << 5) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_EOC5_DISABLE (0x1 << 5) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_EOC6 (0x1 << 6) // (ADC12B) End of Conversion Interrupt Disable 6
+#define   AT91C_ADC12B_IDR_EOC6_NO_EFFECT (0x0 << 6) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_EOC6_DISABLE (0x1 << 6) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_EOC7 (0x1 << 7) // (ADC12B) End of Conversion Interrupt Disable 7
+#define   AT91C_ADC12B_IDR_EOC7_NO_EFFECT (0x0 << 7) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_EOC7_DISABLE (0x1 << 7) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_OVRE0 (0x1 << 8) // (ADC12B) Overrun Error Interrupt Disable 0
+#define   AT91C_ADC12B_IDR_OVRE0_NO_EFFECT (0x0 << 8) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_OVRE0_DISABLE (0x1 << 8) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_OVRE1 (0x1 << 9) // (ADC12B) Overrun Error Interrupt Disable 1
+#define   AT91C_ADC12B_IDR_OVRE1_NO_EFFECT (0x0 << 9) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_OVRE1_DISABLE (0x1 << 9) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_OVRE2 (0x1 << 10) // (ADC12B) Overrun Error Interrupt Disable 2
+#define   AT91C_ADC12B_IDR_OVRE2_NO_EFFECT (0x0 << 10) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_OVRE2_DISABLE (0x1 << 10) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_OVRE3 (0x1 << 11) // (ADC12B) Overrun Error Interrupt Disable 3
+#define   AT91C_ADC12B_IDR_OVRE3_NO_EFFECT (0x0 << 11) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_OVRE3_DISABLE (0x1 << 11) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_OVRE4 (0x1 << 12) // (ADC12B) Overrun Error Interrupt Disable 4
+#define   AT91C_ADC12B_IDR_OVRE4_NO_EFFECT (0x0 << 12) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_OVRE4_DISABLE (0x1 << 12) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_OVRE5 (0x1 << 13) // (ADC12B) Overrun Error Interrupt Disable 5
+#define   AT91C_ADC12B_IDR_OVRE5_NO_EFFECT (0x0 << 13) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_OVRE5_DISABLE (0x1 << 13) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_OVRE6 (0x1 << 14) // (ADC12B) Overrun Error Interrupt Disable 6
+#define   AT91C_ADC12B_IDR_OVRE6_NO_EFFECT (0x0 << 14) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_OVRE6_DISABLE (0x1 << 14) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_OVRE7 (0x1 << 15) // (ADC12B) Overrun Error Interrupt Disable 7
+#define   AT91C_ADC12B_IDR_OVRE7_NO_EFFECT (0x0 << 15) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_OVRE7_DISABLE (0x1 << 15) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_DRDY (0x1 << 16) // (ADC12B) Data Ready Interrupt Disable
+#define   AT91C_ADC12B_IDR_DRDY_NO_EFFECT (0x0 << 16) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_DRDY_DISABLE (0x1 << 16) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_GOVRE (0x1 << 17) // (ADC12B) General Overrun Error Interrupt Disable
+#define   AT91C_ADC12B_IDR_GOVRE_NO_EFFECT (0x0 << 17) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_GOVRE_DISABLE (0x1 << 17) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_ENDRX (0x1 << 18) // (ADC12B) End of Receive Buffer Interrupt Disable
+#define   AT91C_ADC12B_IDR_ENDRX_NO_EFFECT (0x0 << 18) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_ENDRX_DISABLE (0x1 << 18) // (ADC12B) Disables the corresponding interrupt.
+#define AT91C_ADC12B_IDR_RXBUFF (0x1 << 19) // (ADC12B) Receive Buffer Full Interrupt Disable
+#define   AT91C_ADC12B_IDR_RXBUFF_NO_EFFECT (0x0 << 19) // (ADC12B) No effect.
+#define   AT91C_ADC12B_IDR_RXBUFF_DISABLE (0x1 << 19) // (ADC12B) Disables the corresponding interrupt.
+// -------- ADC12B_IMR : (ADC12B Offset: 0x2C) Interrupt Mask Register --------
+#define AT91C_ADC12B_IMR_EOC0 (0x1 << 0) // (ADC12B) End of Conversion Interrupt Mask 0
+#define   AT91C_ADC12B_IMR_EOC0_DIS (0x0 << 0) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_EOC0_EN (0x1 << 0) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_EOC1 (0x1 << 1) // (ADC12B) End of Conversion Interrupt Mask 1
+#define   AT91C_ADC12B_IMR_EOC1_DIS (0x0 << 1) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_EOC1_EN (0x1 << 1) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_EOC2 (0x1 << 2) // (ADC12B) End of Conversion Interrupt Mask 2
+#define   AT91C_ADC12B_IMR_EOC2_DIS (0x0 << 2) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_EOC2_EN (0x1 << 2) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_EOC3 (0x1 << 3) // (ADC12B) End of Conversion Interrupt Mask 3
+#define   AT91C_ADC12B_IMR_EOC3_DIS (0x0 << 3) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_EOC3_EN (0x1 << 3) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_EOC4 (0x1 << 4) // (ADC12B) End of Conversion Interrupt Mask 4
+#define   AT91C_ADC12B_IMR_EOC4_DIS (0x0 << 4) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_EOC4_EN (0x1 << 4) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_EOC5 (0x1 << 5) // (ADC12B) End of Conversion Interrupt Mask 5
+#define   AT91C_ADC12B_IMR_EOC5_DIS (0x0 << 5) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_EOC5_EN (0x1 << 5) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_EOC6 (0x1 << 6) // (ADC12B) End of Conversion Interrupt Mask 6
+#define   AT91C_ADC12B_IMR_EOC6_DIS (0x0 << 6) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_EOC6_EN (0x1 << 6) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_EOC7 (0x1 << 7) // (ADC12B) End of Conversion Interrupt Mask 7
+#define   AT91C_ADC12B_IMR_EOC7_DIS (0x0 << 7) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_EOC7_EN (0x1 << 7) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_OVRE0 (0x1 << 8) // (ADC12B) Overrun Error Interrupt Mask 0
+#define   AT91C_ADC12B_IMR_OVRE0_DIS (0x0 << 8) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_OVRE0_EN (0x1 << 8) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_OVRE1 (0x1 << 9) // (ADC12B) Overrun Error Interrupt Mask 1
+#define   AT91C_ADC12B_IMR_OVRE1_DIS (0x0 << 9) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_OVRE1_EN (0x1 << 9) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_OVRE2 (0x1 << 10) // (ADC12B) Overrun Error Interrupt Mask 2
+#define   AT91C_ADC12B_IMR_OVRE2_DIS (0x0 << 10) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_OVRE2_EN (0x1 << 10) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_OVRE3 (0x1 << 11) // (ADC12B) Overrun Error Interrupt Mask 3
+#define   AT91C_ADC12B_IMR_OVRE3_DIS (0x0 << 11) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_OVRE3_EN (0x1 << 11) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_OVRE4 (0x1 << 12) // (ADC12B) Overrun Error Interrupt Mask 4
+#define   AT91C_ADC12B_IMR_OVRE4_DIS (0x0 << 12) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_OVRE4_EN (0x1 << 12) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_OVRE5 (0x1 << 13) // (ADC12B) Overrun Error Interrupt Mask 5
+#define   AT91C_ADC12B_IMR_OVRE5_DIS (0x0 << 13) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_OVRE5_EN (0x1 << 13) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_OVRE6 (0x1 << 14) // (ADC12B) Overrun Error Interrupt Mask 6
+#define   AT91C_ADC12B_IMR_OVRE6_DIS (0x0 << 14) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_OVRE6_EN (0x1 << 14) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_OVRE7 (0x1 << 15) // (ADC12B) Overrun Error Interrupt Mask 7
+#define   AT91C_ADC12B_IMR_OVRE7_DIS (0x0 << 15) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_OVRE7_EN (0x1 << 15) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_DRDY (0x1 << 16) // (ADC12B) Data Ready Interrupt Mask
+#define   AT91C_ADC12B_IMR_DRDY_DIS (0x0 << 16) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_DRDY_EN (0x1 << 16) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_GOVRE (0x1 << 17) // (ADC12B) General Overrun Error Interrupt Mask
+#define   AT91C_ADC12B_IMR_GOVRE_DIS (0x0 << 17) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_GOVRE_EN (0x1 << 17) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_ENDRX (0x1 << 18) // (ADC12B) End of Receive Buffer Interrupt Mask
+#define   AT91C_ADC12B_IMR_ENDRX_DIS (0x0 << 18) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_ENDRX_EN (0x1 << 18) // (ADC12B) The corresponding interrupt is enabled.
+#define AT91C_ADC12B_IMR_RXBUFF (0x1 << 19) // (ADC12B) Receive Buffer Full Interrupt Mask
+#define   AT91C_ADC12B_IMR_RXBUFF_DIS (0x0 << 19) // (ADC12B) The corresponding interrupt is disabled.
+#define   AT91C_ADC12B_IMR_RXBUFF_EN (0x1 << 19) // (ADC12B) The corresponding interrupt is enabled.
+// -------- ADC12B_CDR[8] : (ADC12B Offset: 0x30) Channel Data Register --------
+#define AT91C_ADC12B_CDR_DATA (0xfff << 0) // (ADC12B) Converted Data
+// -------- ADC12B_ACR : (ADC12B Offset: 0x64) Analog Control Register --------
+#define AT91C_ADC12B_ACR_GAIN (0x3 << 0) // (ADC12B) Input Gain
+#define AT91C_ADC12B_ACR_IBCTL (0x3 << 6) // (ADC12B) Bias Current Control
+#define   AT91C_ADC12B_ACR_IBCTL_MIN20 (0x0 << 6) // (ADC12B) typ - 20%
+#define   AT91C_ADC12B_ACR_IBCTL_TYP (0x1 << 6) // (ADC12B) typ
+#define   AT91C_ADC12B_ACR_IBCTL_PLUS20 (0x2 << 6) // (ADC12B) typ + 20%
+#define   AT91C_ADC12B_ACR_IBCTL_PLUS40 (0x3 << 6) // (ADC12B) typ + 40%
+#define AT91C_ADC12B_ACR_DIFF (0x1 << 16) // (ADC12B) Differential Mode
+#define   AT91C_ADC12B_ACR_DIFF_SINGLE (0x0 << 16) // (ADC12B) Single Ended Mode
+#define   AT91C_ADC12B_ACR_DIFF_FULLY (0x1 << 16) // (ADC12B) Fully Differential Mode
+#define AT91C_ADC12B_ACR_OFFSET (0x1 << 17) // (ADC12B) Input OFFSET
+// -------- ADC12B_EMR : (ADC12B Offset: 0x68) Extended Mode Register --------
+#define AT91C_ADC12B_EMR_OFFMODES (0x1 << 0) // (ADC12B) Off Mode if Sleep Bit (ADC12B_MR) = 1
+#define   AT91C_ADC12B_EMR_OFFMODES_STBY (0x0 << 0) // (ADC12B) Standby Mode
+#define   AT91C_ADC12B_EMR_OFFMODES_OFF (0x1 << 0) // (ADC12B) Off Mode
+#define AT91C_ADC12B_EMR_OFF_MODE_STARTUP_TIME (0xff << 16) // (ADC12B) Startup Time
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Timer Counter Channel Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_TC {
+	AT91_REG	 TC_CCR; 	// Channel Control Register
+	AT91_REG	 TC_CMR; 	// Channel Mode Register (Capture Mode / Waveform Mode)
+	AT91_REG	 Reserved0[2]; 	// 
+	AT91_REG	 TC_CV; 	// Counter Value
+	AT91_REG	 TC_RA; 	// Register A
+	AT91_REG	 TC_RB; 	// Register B
+	AT91_REG	 TC_RC; 	// Register C
+	AT91_REG	 TC_SR; 	// Status Register
+	AT91_REG	 TC_IER; 	// Interrupt Enable Register
+	AT91_REG	 TC_IDR; 	// Interrupt Disable Register
+	AT91_REG	 TC_IMR; 	// Interrupt Mask Register
+} AT91S_TC, *AT91PS_TC;
+#else
+#define TC_CCR          (AT91_CAST(AT91_REG *) 	0x00000000) // (TC_CCR) Channel Control Register
+#define TC_CMR          (AT91_CAST(AT91_REG *) 	0x00000004) // (TC_CMR) Channel Mode Register (Capture Mode / Waveform Mode)
+#define TC_CV           (AT91_CAST(AT91_REG *) 	0x00000010) // (TC_CV) Counter Value
+#define TC_RA           (AT91_CAST(AT91_REG *) 	0x00000014) // (TC_RA) Register A
+#define TC_RB           (AT91_CAST(AT91_REG *) 	0x00000018) // (TC_RB) Register B
+#define TC_RC           (AT91_CAST(AT91_REG *) 	0x0000001C) // (TC_RC) Register C
+#define TC_SR           (AT91_CAST(AT91_REG *) 	0x00000020) // (TC_SR) Status Register
+#define TC_IER          (AT91_CAST(AT91_REG *) 	0x00000024) // (TC_IER) Interrupt Enable Register
+#define TC_IDR          (AT91_CAST(AT91_REG *) 	0x00000028) // (TC_IDR) Interrupt Disable Register
+#define TC_IMR          (AT91_CAST(AT91_REG *) 	0x0000002C) // (TC_IMR) Interrupt Mask Register
+
+#endif
+// -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register -------- 
+#define AT91C_TC_CLKEN        (0x1 <<  0) // (TC) Counter Clock Enable Command
+#define AT91C_TC_CLKDIS       (0x1 <<  1) // (TC) Counter Clock Disable Command
+#define AT91C_TC_SWTRG        (0x1 <<  2) // (TC) Software Trigger Command
+// -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode -------- 
+#define AT91C_TC_CLKS         (0x7 <<  0) // (TC) Clock Selection
+#define 	AT91C_TC_CLKS_TIMER_DIV1_CLOCK     (0x0) // (TC) Clock selected: TIMER_DIV1_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV2_CLOCK     (0x1) // (TC) Clock selected: TIMER_DIV2_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV3_CLOCK     (0x2) // (TC) Clock selected: TIMER_DIV3_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV4_CLOCK     (0x3) // (TC) Clock selected: TIMER_DIV4_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV5_CLOCK     (0x4) // (TC) Clock selected: TIMER_DIV5_CLOCK
+#define 	AT91C_TC_CLKS_XC0                  (0x5) // (TC) Clock selected: XC0
+#define 	AT91C_TC_CLKS_XC1                  (0x6) // (TC) Clock selected: XC1
+#define 	AT91C_TC_CLKS_XC2                  (0x7) // (TC) Clock selected: XC2
+#define AT91C_TC_CLKI         (0x1 <<  3) // (TC) Clock Invert
+#define AT91C_TC_BURST        (0x3 <<  4) // (TC) Burst Signal Selection
+#define 	AT91C_TC_BURST_NONE                 (0x0 <<  4) // (TC) The clock is not gated by an external signal
+#define 	AT91C_TC_BURST_XC0                  (0x1 <<  4) // (TC) XC0 is ANDed with the selected clock
+#define 	AT91C_TC_BURST_XC1                  (0x2 <<  4) // (TC) XC1 is ANDed with the selected clock
+#define 	AT91C_TC_BURST_XC2                  (0x3 <<  4) // (TC) XC2 is ANDed with the selected clock
+#define AT91C_TC_CPCSTOP      (0x1 <<  6) // (TC) Counter Clock Stopped with RC Compare
+#define AT91C_TC_LDBSTOP      (0x1 <<  6) // (TC) Counter Clock Stopped with RB Loading
+#define AT91C_TC_CPCDIS       (0x1 <<  7) // (TC) Counter Clock Disable with RC Compare
+#define AT91C_TC_LDBDIS       (0x1 <<  7) // (TC) Counter Clock Disabled with RB Loading
+#define AT91C_TC_ETRGEDG      (0x3 <<  8) // (TC) External Trigger Edge Selection
+#define 	AT91C_TC_ETRGEDG_NONE                 (0x0 <<  8) // (TC) Edge: None
+#define 	AT91C_TC_ETRGEDG_RISING               (0x1 <<  8) // (TC) Edge: rising edge
+#define 	AT91C_TC_ETRGEDG_FALLING              (0x2 <<  8) // (TC) Edge: falling edge
+#define 	AT91C_TC_ETRGEDG_BOTH                 (0x3 <<  8) // (TC) Edge: each edge
+#define AT91C_TC_EEVTEDG      (0x3 <<  8) // (TC) External Event Edge Selection
+#define 	AT91C_TC_EEVTEDG_NONE                 (0x0 <<  8) // (TC) Edge: None
+#define 	AT91C_TC_EEVTEDG_RISING               (0x1 <<  8) // (TC) Edge: rising edge
+#define 	AT91C_TC_EEVTEDG_FALLING              (0x2 <<  8) // (TC) Edge: falling edge
+#define 	AT91C_TC_EEVTEDG_BOTH                 (0x3 <<  8) // (TC) Edge: each edge
+#define AT91C_TC_EEVT         (0x3 << 10) // (TC) External Event  Selection
+#define 	AT91C_TC_EEVT_TIOB                 (0x0 << 10) // (TC) Signal selected as external event: TIOB TIOB direction: input
+#define 	AT91C_TC_EEVT_XC0                  (0x1 << 10) // (TC) Signal selected as external event: XC0 TIOB direction: output
+#define 	AT91C_TC_EEVT_XC1                  (0x2 << 10) // (TC) Signal selected as external event: XC1 TIOB direction: output
+#define 	AT91C_TC_EEVT_XC2                  (0x3 << 10) // (TC) Signal selected as external event: XC2 TIOB direction: output
+#define AT91C_TC_ABETRG       (0x1 << 10) // (TC) TIOA or TIOB External Trigger Selection
+#define AT91C_TC_ENETRG       (0x1 << 12) // (TC) External Event Trigger enable
+#define AT91C_TC_WAVESEL      (0x3 << 13) // (TC) Waveform  Selection
+#define 	AT91C_TC_WAVESEL_UP                   (0x0 << 13) // (TC) UP mode without atomatic trigger on RC Compare
+#define 	AT91C_TC_WAVESEL_UPDOWN               (0x1 << 13) // (TC) UPDOWN mode without automatic trigger on RC Compare
+#define 	AT91C_TC_WAVESEL_UP_AUTO              (0x2 << 13) // (TC) UP mode with automatic trigger on RC Compare
+#define 	AT91C_TC_WAVESEL_UPDOWN_AUTO          (0x3 << 13) // (TC) UPDOWN mode with automatic trigger on RC Compare
+#define AT91C_TC_CPCTRG       (0x1 << 14) // (TC) RC Compare Trigger Enable
+#define AT91C_TC_WAVE         (0x1 << 15) // (TC) 
+#define AT91C_TC_ACPA         (0x3 << 16) // (TC) RA Compare Effect on TIOA
+#define 	AT91C_TC_ACPA_NONE                 (0x0 << 16) // (TC) Effect: none
+#define 	AT91C_TC_ACPA_SET                  (0x1 << 16) // (TC) Effect: set
+#define 	AT91C_TC_ACPA_CLEAR                (0x2 << 16) // (TC) Effect: clear
+#define 	AT91C_TC_ACPA_TOGGLE               (0x3 << 16) // (TC) Effect: toggle
+#define AT91C_TC_LDRA         (0x3 << 16) // (TC) RA Loading Selection
+#define 	AT91C_TC_LDRA_NONE                 (0x0 << 16) // (TC) Edge: None
+#define 	AT91C_TC_LDRA_RISING               (0x1 << 16) // (TC) Edge: rising edge of TIOA
+#define 	AT91C_TC_LDRA_FALLING              (0x2 << 16) // (TC) Edge: falling edge of TIOA
+#define 	AT91C_TC_LDRA_BOTH                 (0x3 << 16) // (TC) Edge: each edge of TIOA
+#define AT91C_TC_ACPC         (0x3 << 18) // (TC) RC Compare Effect on TIOA
+#define 	AT91C_TC_ACPC_NONE                 (0x0 << 18) // (TC) Effect: none
+#define 	AT91C_TC_ACPC_SET                  (0x1 << 18) // (TC) Effect: set
+#define 	AT91C_TC_ACPC_CLEAR                (0x2 << 18) // (TC) Effect: clear
+#define 	AT91C_TC_ACPC_TOGGLE               (0x3 << 18) // (TC) Effect: toggle
+#define AT91C_TC_LDRB         (0x3 << 18) // (TC) RB Loading Selection
+#define 	AT91C_TC_LDRB_NONE                 (0x0 << 18) // (TC) Edge: None
+#define 	AT91C_TC_LDRB_RISING               (0x1 << 18) // (TC) Edge: rising edge of TIOA
+#define 	AT91C_TC_LDRB_FALLING              (0x2 << 18) // (TC) Edge: falling edge of TIOA
+#define 	AT91C_TC_LDRB_BOTH                 (0x3 << 18) // (TC) Edge: each edge of TIOA
+#define AT91C_TC_AEEVT        (0x3 << 20) // (TC) External Event Effect on TIOA
+#define 	AT91C_TC_AEEVT_NONE                 (0x0 << 20) // (TC) Effect: none
+#define 	AT91C_TC_AEEVT_SET                  (0x1 << 20) // (TC) Effect: set
+#define 	AT91C_TC_AEEVT_CLEAR                (0x2 << 20) // (TC) Effect: clear
+#define 	AT91C_TC_AEEVT_TOGGLE               (0x3 << 20) // (TC) Effect: toggle
+#define AT91C_TC_ASWTRG       (0x3 << 22) // (TC) Software Trigger Effect on TIOA
+#define 	AT91C_TC_ASWTRG_NONE                 (0x0 << 22) // (TC) Effect: none
+#define 	AT91C_TC_ASWTRG_SET                  (0x1 << 22) // (TC) Effect: set
+#define 	AT91C_TC_ASWTRG_CLEAR                (0x2 << 22) // (TC) Effect: clear
+#define 	AT91C_TC_ASWTRG_TOGGLE               (0x3 << 22) // (TC) Effect: toggle
+#define AT91C_TC_BCPB         (0x3 << 24) // (TC) RB Compare Effect on TIOB
+#define 	AT91C_TC_BCPB_NONE                 (0x0 << 24) // (TC) Effect: none
+#define 	AT91C_TC_BCPB_SET                  (0x1 << 24) // (TC) Effect: set
+#define 	AT91C_TC_BCPB_CLEAR                (0x2 << 24) // (TC) Effect: clear
+#define 	AT91C_TC_BCPB_TOGGLE               (0x3 << 24) // (TC) Effect: toggle
+#define AT91C_TC_BCPC         (0x3 << 26) // (TC) RC Compare Effect on TIOB
+#define 	AT91C_TC_BCPC_NONE                 (0x0 << 26) // (TC) Effect: none
+#define 	AT91C_TC_BCPC_SET                  (0x1 << 26) // (TC) Effect: set
+#define 	AT91C_TC_BCPC_CLEAR                (0x2 << 26) // (TC) Effect: clear
+#define 	AT91C_TC_BCPC_TOGGLE               (0x3 << 26) // (TC) Effect: toggle
+#define AT91C_TC_BEEVT        (0x3 << 28) // (TC) External Event Effect on TIOB
+#define 	AT91C_TC_BEEVT_NONE                 (0x0 << 28) // (TC) Effect: none
+#define 	AT91C_TC_BEEVT_SET                  (0x1 << 28) // (TC) Effect: set
+#define 	AT91C_TC_BEEVT_CLEAR                (0x2 << 28) // (TC) Effect: clear
+#define 	AT91C_TC_BEEVT_TOGGLE               (0x3 << 28) // (TC) Effect: toggle
+#define AT91C_TC_BSWTRG       (0x3 << 30) // (TC) Software Trigger Effect on TIOB
+#define 	AT91C_TC_BSWTRG_NONE                 (0x0 << 30) // (TC) Effect: none
+#define 	AT91C_TC_BSWTRG_SET                  (0x1 << 30) // (TC) Effect: set
+#define 	AT91C_TC_BSWTRG_CLEAR                (0x2 << 30) // (TC) Effect: clear
+#define 	AT91C_TC_BSWTRG_TOGGLE               (0x3 << 30) // (TC) Effect: toggle
+// -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register -------- 
+#define AT91C_TC_COVFS        (0x1 <<  0) // (TC) Counter Overflow
+#define AT91C_TC_LOVRS        (0x1 <<  1) // (TC) Load Overrun
+#define AT91C_TC_CPAS         (0x1 <<  2) // (TC) RA Compare
+#define AT91C_TC_CPBS         (0x1 <<  3) // (TC) RB Compare
+#define AT91C_TC_CPCS         (0x1 <<  4) // (TC) RC Compare
+#define AT91C_TC_LDRAS        (0x1 <<  5) // (TC) RA Loading
+#define AT91C_TC_LDRBS        (0x1 <<  6) // (TC) RB Loading
+#define AT91C_TC_ETRGS        (0x1 <<  7) // (TC) External Trigger
+#define AT91C_TC_CLKSTA       (0x1 << 16) // (TC) Clock Enabling
+#define AT91C_TC_MTIOA        (0x1 << 17) // (TC) TIOA Mirror
+#define AT91C_TC_MTIOB        (0x1 << 18) // (TC) TIOA Mirror
+// -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register -------- 
+// -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register -------- 
+// -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Timer Counter Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_TCB {
+	AT91S_TC	 TCB_TC0; 	// TC Channel 0
+	AT91_REG	 Reserved0[4]; 	// 
+	AT91S_TC	 TCB_TC1; 	// TC Channel 1
+	AT91_REG	 Reserved1[4]; 	// 
+	AT91S_TC	 TCB_TC2; 	// TC Channel 2
+	AT91_REG	 Reserved2[4]; 	// 
+	AT91_REG	 TCB_BCR; 	// TC Block Control Register
+	AT91_REG	 TCB_BMR; 	// TC Block Mode Register
+	AT91_REG	 Reserved3[9]; 	// 
+	AT91_REG	 TCB_ADDRSIZE; 	// TC ADDRSIZE REGISTER 
+	AT91_REG	 TCB_IPNAME1; 	// TC IPNAME1 REGISTER 
+	AT91_REG	 TCB_IPNAME2; 	// TC IPNAME2 REGISTER 
+	AT91_REG	 TCB_FEATURES; 	// TC FEATURES REGISTER 
+	AT91_REG	 TCB_VER; 	//  Version Register
+} AT91S_TCB, *AT91PS_TCB;
+#else
+#define TCB_BCR         (AT91_CAST(AT91_REG *) 	0x000000C0) // (TCB_BCR) TC Block Control Register
+#define TCB_BMR         (AT91_CAST(AT91_REG *) 	0x000000C4) // (TCB_BMR) TC Block Mode Register
+#define TC_ADDRSIZE     (AT91_CAST(AT91_REG *) 	0x000000EC) // (TC_ADDRSIZE) TC ADDRSIZE REGISTER 
+#define TC_IPNAME1      (AT91_CAST(AT91_REG *) 	0x000000F0) // (TC_IPNAME1) TC IPNAME1 REGISTER 
+#define TC_IPNAME2      (AT91_CAST(AT91_REG *) 	0x000000F4) // (TC_IPNAME2) TC IPNAME2 REGISTER 
+#define TC_FEATURES     (AT91_CAST(AT91_REG *) 	0x000000F8) // (TC_FEATURES) TC FEATURES REGISTER 
+#define TC_VER          (AT91_CAST(AT91_REG *) 	0x000000FC) // (TC_VER)  Version Register
+
+#endif
+// -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register -------- 
+#define AT91C_TCB_SYNC        (0x1 <<  0) // (TCB) Synchro Command
+// -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register -------- 
+#define AT91C_TCB_TC0XC0S     (0x3 <<  0) // (TCB) External Clock Signal 0 Selection
+#define 	AT91C_TCB_TC0XC0S_TCLK0                (0x0) // (TCB) TCLK0 connected to XC0
+#define 	AT91C_TCB_TC0XC0S_NONE                 (0x1) // (TCB) None signal connected to XC0
+#define 	AT91C_TCB_TC0XC0S_TIOA1                (0x2) // (TCB) TIOA1 connected to XC0
+#define 	AT91C_TCB_TC0XC0S_TIOA2                (0x3) // (TCB) TIOA2 connected to XC0
+#define AT91C_TCB_TC1XC1S     (0x3 <<  2) // (TCB) External Clock Signal 1 Selection
+#define 	AT91C_TCB_TC1XC1S_TCLK1                (0x0 <<  2) // (TCB) TCLK1 connected to XC1
+#define 	AT91C_TCB_TC1XC1S_NONE                 (0x1 <<  2) // (TCB) None signal connected to XC1
+#define 	AT91C_TCB_TC1XC1S_TIOA0                (0x2 <<  2) // (TCB) TIOA0 connected to XC1
+#define 	AT91C_TCB_TC1XC1S_TIOA2                (0x3 <<  2) // (TCB) TIOA2 connected to XC1
+#define AT91C_TCB_TC2XC2S     (0x3 <<  4) // (TCB) External Clock Signal 2 Selection
+#define 	AT91C_TCB_TC2XC2S_TCLK2                (0x0 <<  4) // (TCB) TCLK2 connected to XC2
+#define 	AT91C_TCB_TC2XC2S_NONE                 (0x1 <<  4) // (TCB) None signal connected to XC2
+#define 	AT91C_TCB_TC2XC2S_TIOA0                (0x2 <<  4) // (TCB) TIOA0 connected to XC2
+#define 	AT91C_TCB_TC2XC2S_TIOA1                (0x3 <<  4) // (TCB) TIOA2 connected to XC2
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Embedded Flash Controller 2.0
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_EFC {
+	AT91_REG	 EFC_FMR; 	// EFC Flash Mode Register
+	AT91_REG	 EFC_FCR; 	// EFC Flash Command Register
+	AT91_REG	 EFC_FSR; 	// EFC Flash Status Register
+	AT91_REG	 EFC_FRR; 	// EFC Flash Result Register
+	AT91_REG	 Reserved0[1]; 	// 
+	AT91_REG	 EFC_FVR; 	// EFC Flash Version Register
+} AT91S_EFC, *AT91PS_EFC;
+#else
+#define EFC_FMR         (AT91_CAST(AT91_REG *) 	0x00000000) // (EFC_FMR) EFC Flash Mode Register
+#define EFC_FCR         (AT91_CAST(AT91_REG *) 	0x00000004) // (EFC_FCR) EFC Flash Command Register
+#define EFC_FSR         (AT91_CAST(AT91_REG *) 	0x00000008) // (EFC_FSR) EFC Flash Status Register
+#define EFC_FRR         (AT91_CAST(AT91_REG *) 	0x0000000C) // (EFC_FRR) EFC Flash Result Register
+#define EFC_FVR         (AT91_CAST(AT91_REG *) 	0x00000014) // (EFC_FVR) EFC Flash Version Register
+
+#endif
+// -------- EFC_FMR : (EFC Offset: 0x0) EFC Flash Mode Register -------- 
+#define AT91C_EFC_FRDY        (0x1 <<  0) // (EFC) Ready Interrupt Enable
+#define AT91C_EFC_FWS         (0xF <<  8) // (EFC) Flash Wait State.
+#define 	AT91C_EFC_FWS_0WS                  (0x0 <<  8) // (EFC) 0 Wait State
+#define 	AT91C_EFC_FWS_1WS                  (0x1 <<  8) // (EFC) 1 Wait State
+#define 	AT91C_EFC_FWS_2WS                  (0x2 <<  8) // (EFC) 2 Wait States
+#define 	AT91C_EFC_FWS_3WS                  (0x3 <<  8) // (EFC) 3 Wait States
+// -------- EFC_FCR : (EFC Offset: 0x4) EFC Flash Command Register -------- 
+#define AT91C_EFC_FCMD        (0xFF <<  0) // (EFC) Flash Command
+#define 	AT91C_EFC_FCMD_GETD                 (0x0) // (EFC) Get Flash Descriptor
+#define 	AT91C_EFC_FCMD_WP                   (0x1) // (EFC) Write Page
+#define 	AT91C_EFC_FCMD_WPL                  (0x2) // (EFC) Write Page and Lock
+#define 	AT91C_EFC_FCMD_EWP                  (0x3) // (EFC) Erase Page and Write Page
+#define 	AT91C_EFC_FCMD_EWPL                 (0x4) // (EFC) Erase Page and Write Page then Lock
+#define 	AT91C_EFC_FCMD_EA                   (0x5) // (EFC) Erase All
+#define 	AT91C_EFC_FCMD_EPL                  (0x6) // (EFC) Erase Plane
+#define 	AT91C_EFC_FCMD_EPA                  (0x7) // (EFC) Erase Pages
+#define 	AT91C_EFC_FCMD_SLB                  (0x8) // (EFC) Set Lock Bit
+#define 	AT91C_EFC_FCMD_CLB                  (0x9) // (EFC) Clear Lock Bit
+#define 	AT91C_EFC_FCMD_GLB                  (0xA) // (EFC) Get Lock Bit
+#define 	AT91C_EFC_FCMD_SFB                  (0xB) // (EFC) Set Fuse Bit
+#define 	AT91C_EFC_FCMD_CFB                  (0xC) // (EFC) Clear Fuse Bit
+#define 	AT91C_EFC_FCMD_GFB                  (0xD) // (EFC) Get Fuse Bit
+#define 	AT91C_EFC_FCMD_STUI                 (0xE) // (EFC) Start Read Unique ID
+#define 	AT91C_EFC_FCMD_SPUI                 (0xF) // (EFC) Stop Read Unique ID
+#define AT91C_EFC_FARG        (0xFFFF <<  8) // (EFC) Flash Command Argument
+#define AT91C_EFC_FKEY        (0x5A << 24) // (EFC) Flash Writing Protection Key
+// -------- EFC_FSR : (EFC Offset: 0x8) EFC Flash Status Register -------- 
+#define AT91C_EFC_FRDY_S      (0x1 <<  0) // (EFC) Flash Ready Status
+#define AT91C_EFC_FCMDE       (0x1 <<  1) // (EFC) Flash Command Error Status
+#define AT91C_EFC_LOCKE       (0x1 <<  2) // (EFC) Flash Lock Error Status
+// -------- EFC_FRR : (EFC Offset: 0xc) EFC Flash Result Register -------- 
+#define AT91C_EFC_FVALUE      (0x0 <<  0) // (EFC) Flash Result Value
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Multimedia Card Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_MCI {
+	AT91_REG	 MCI_CR; 	// MCI Control Register
+	AT91_REG	 MCI_MR; 	// MCI Mode Register
+	AT91_REG	 MCI_DTOR; 	// MCI Data Timeout Register
+	AT91_REG	 MCI_SDCR; 	// MCI SD/SDIO Card Register
+	AT91_REG	 MCI_ARGR; 	// MCI Argument Register
+	AT91_REG	 MCI_CMDR; 	// MCI Command Register
+	AT91_REG	 MCI_BLKR; 	// MCI Block Register
+	AT91_REG	 MCI_CSTOR; 	// MCI Completion Signal Timeout Register
+	AT91_REG	 MCI_RSPR[4]; 	// MCI Response Register
+	AT91_REG	 MCI_RDR; 	// MCI Receive Data Register
+	AT91_REG	 MCI_TDR; 	// MCI Transmit Data Register
+	AT91_REG	 Reserved0[2]; 	// 
+	AT91_REG	 MCI_SR; 	// MCI Status Register
+	AT91_REG	 MCI_IER; 	// MCI Interrupt Enable Register
+	AT91_REG	 MCI_IDR; 	// MCI Interrupt Disable Register
+	AT91_REG	 MCI_IMR; 	// MCI Interrupt Mask Register
+	AT91_REG	 MCI_DMA; 	// MCI DMA Configuration Register
+	AT91_REG	 MCI_CFG; 	// MCI Configuration Register
+	AT91_REG	 Reserved1[35]; 	// 
+	AT91_REG	 MCI_WPCR; 	// MCI Write Protection Control Register
+	AT91_REG	 MCI_WPSR; 	// MCI Write Protection Status Register
+	AT91_REG	 MCI_ADDRSIZE; 	// MCI ADDRSIZE REGISTER 
+	AT91_REG	 MCI_IPNAME1; 	// MCI IPNAME1 REGISTER 
+	AT91_REG	 MCI_IPNAME2; 	// MCI IPNAME2 REGISTER 
+	AT91_REG	 MCI_FEATURES; 	// MCI FEATURES REGISTER 
+	AT91_REG	 MCI_VER; 	// MCI VERSION REGISTER 
+	AT91_REG	 MCI_RPR; 	// Receive Pointer Register
+	AT91_REG	 MCI_RCR; 	// Receive Counter Register
+	AT91_REG	 MCI_TPR; 	// Transmit Pointer Register
+	AT91_REG	 MCI_TCR; 	// Transmit Counter Register
+	AT91_REG	 MCI_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 MCI_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 MCI_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 MCI_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 MCI_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 MCI_PTSR; 	// PDC Transfer Status Register
+	AT91_REG	 Reserved2[54]; 	// 
+	AT91_REG	 MCI_FIFO; 	// MCI FIFO Aperture Register
+} AT91S_MCI, *AT91PS_MCI;
+#else
+#define MCI_CR          (AT91_CAST(AT91_REG *) 	0x00000000) // (MCI_CR) MCI Control Register
+#define MCI_MR          (AT91_CAST(AT91_REG *) 	0x00000004) // (MCI_MR) MCI Mode Register
+#define MCI_DTOR        (AT91_CAST(AT91_REG *) 	0x00000008) // (MCI_DTOR) MCI Data Timeout Register
+#define MCI_SDCR        (AT91_CAST(AT91_REG *) 	0x0000000C) // (MCI_SDCR) MCI SD/SDIO Card Register
+#define MCI_ARGR        (AT91_CAST(AT91_REG *) 	0x00000010) // (MCI_ARGR) MCI Argument Register
+#define MCI_CMDR        (AT91_CAST(AT91_REG *) 	0x00000014) // (MCI_CMDR) MCI Command Register
+#define MCI_BLKR        (AT91_CAST(AT91_REG *) 	0x00000018) // (MCI_BLKR) MCI Block Register
+#define MCI_CSTOR       (AT91_CAST(AT91_REG *) 	0x0000001C) // (MCI_CSTOR) MCI Completion Signal Timeout Register
+#define MCI_RSPR        (AT91_CAST(AT91_REG *) 	0x00000020) // (MCI_RSPR) MCI Response Register
+#define MCI_RDR         (AT91_CAST(AT91_REG *) 	0x00000030) // (MCI_RDR) MCI Receive Data Register
+#define MCI_TDR         (AT91_CAST(AT91_REG *) 	0x00000034) // (MCI_TDR) MCI Transmit Data Register
+#define MCI_SR          (AT91_CAST(AT91_REG *) 	0x00000040) // (MCI_SR) MCI Status Register
+#define MCI_IER         (AT91_CAST(AT91_REG *) 	0x00000044) // (MCI_IER) MCI Interrupt Enable Register
+#define MCI_IDR         (AT91_CAST(AT91_REG *) 	0x00000048) // (MCI_IDR) MCI Interrupt Disable Register
+#define MCI_IMR         (AT91_CAST(AT91_REG *) 	0x0000004C) // (MCI_IMR) MCI Interrupt Mask Register
+#define MCI_DMA         (AT91_CAST(AT91_REG *) 	0x00000050) // (MCI_DMA) MCI DMA Configuration Register
+#define MCI_CFG         (AT91_CAST(AT91_REG *) 	0x00000054) // (MCI_CFG) MCI Configuration Register
+#define MCI_WPCR        (AT91_CAST(AT91_REG *) 	0x000000E4) // (MCI_WPCR) MCI Write Protection Control Register
+#define MCI_WPSR        (AT91_CAST(AT91_REG *) 	0x000000E8) // (MCI_WPSR) MCI Write Protection Status Register
+#define MCI_ADDRSIZE    (AT91_CAST(AT91_REG *) 	0x000000EC) // (MCI_ADDRSIZE) MCI ADDRSIZE REGISTER 
+#define MCI_IPNAME1     (AT91_CAST(AT91_REG *) 	0x000000F0) // (MCI_IPNAME1) MCI IPNAME1 REGISTER 
+#define MCI_IPNAME2     (AT91_CAST(AT91_REG *) 	0x000000F4) // (MCI_IPNAME2) MCI IPNAME2 REGISTER 
+#define MCI_FEATURES    (AT91_CAST(AT91_REG *) 	0x000000F8) // (MCI_FEATURES) MCI FEATURES REGISTER 
+#define MCI_VER         (AT91_CAST(AT91_REG *) 	0x000000FC) // (MCI_VER) MCI VERSION REGISTER 
+#define MCI_FIFO        (AT91_CAST(AT91_REG *) 	0x00000200) // (MCI_FIFO) MCI FIFO Aperture Register
+
+#endif
+// -------- MCI_CR : (MCI Offset: 0x0) MCI Control Register -------- 
+#define AT91C_MCI_MCIEN       (0x1 <<  0) // (MCI) Multimedia Interface Enable
+#define 	AT91C_MCI_MCIEN_0                    (0x0) // (MCI) No effect
+#define 	AT91C_MCI_MCIEN_1                    (0x1) // (MCI) Enable the MultiMedia Interface if MCIDIS is 0
+#define AT91C_MCI_MCIDIS      (0x1 <<  1) // (MCI) Multimedia Interface Disable
+#define 	AT91C_MCI_MCIDIS_0                    (0x0 <<  1) // (MCI) No effect
+#define 	AT91C_MCI_MCIDIS_1                    (0x1 <<  1) // (MCI) Disable the MultiMedia Interface
+#define AT91C_MCI_PWSEN       (0x1 <<  2) // (MCI) Power Save Mode Enable
+#define 	AT91C_MCI_PWSEN_0                    (0x0 <<  2) // (MCI) No effect
+#define 	AT91C_MCI_PWSEN_1                    (0x1 <<  2) // (MCI) Enable the Power-saving mode if PWSDIS is 0.
+#define AT91C_MCI_PWSDIS      (0x1 <<  3) // (MCI) Power Save Mode Disable
+#define 	AT91C_MCI_PWSDIS_0                    (0x0 <<  3) // (MCI) No effect
+#define 	AT91C_MCI_PWSDIS_1                    (0x1 <<  3) // (MCI) Disable the Power-saving mode.
+#define AT91C_MCI_IOWAITEN    (0x1 <<  4) // (MCI) SDIO Read Wait Enable
+#define 	AT91C_MCI_IOWAITEN_0                    (0x0 <<  4) // (MCI) No effect
+#define 	AT91C_MCI_IOWAITEN_1                    (0x1 <<  4) // (MCI) Enables the SDIO Read Wait Operation.
+#define AT91C_MCI_IOWAITDIS   (0x1 <<  5) // (MCI) SDIO Read Wait Disable
+#define 	AT91C_MCI_IOWAITDIS_0                    (0x0 <<  5) // (MCI) No effect
+#define 	AT91C_MCI_IOWAITDIS_1                    (0x1 <<  5) // (MCI) Disables the SDIO Read Wait Operation.
+#define AT91C_MCI_SWRST       (0x1 <<  7) // (MCI) MCI Software reset
+#define 	AT91C_MCI_SWRST_0                    (0x0 <<  7) // (MCI) No effect
+#define 	AT91C_MCI_SWRST_1                    (0x1 <<  7) // (MCI) Resets the MCI
+// -------- MCI_MR : (MCI Offset: 0x4) MCI Mode Register -------- 
+#define AT91C_MCI_CLKDIV      (0xFF <<  0) // (MCI) Clock Divider
+#define AT91C_MCI_PWSDIV      (0x7 <<  8) // (MCI) Power Saving Divider
+#define AT91C_MCI_RDPROOF     (0x1 << 11) // (MCI) Read Proof Enable
+#define 	AT91C_MCI_RDPROOF_DISABLE              (0x0 << 11) // (MCI) Disables Read Proof
+#define 	AT91C_MCI_RDPROOF_ENABLE               (0x1 << 11) // (MCI) Enables Read Proof
+#define AT91C_MCI_WRPROOF     (0x1 << 12) // (MCI) Write Proof Enable
+#define 	AT91C_MCI_WRPROOF_DISABLE              (0x0 << 12) // (MCI) Disables Write Proof
+#define 	AT91C_MCI_WRPROOF_ENABLE               (0x1 << 12) // (MCI) Enables Write Proof
+#define AT91C_MCI_PDCFBYTE    (0x1 << 13) // (MCI) PDC Force Byte Transfer
+#define 	AT91C_MCI_PDCFBYTE_DISABLE              (0x0 << 13) // (MCI) Disables PDC Force Byte Transfer
+#define 	AT91C_MCI_PDCFBYTE_ENABLE               (0x1 << 13) // (MCI) Enables PDC Force Byte Transfer
+#define AT91C_MCI_PDCPADV     (0x1 << 14) // (MCI) PDC Padding Value
+#define AT91C_MCI_PDCMODE     (0x1 << 15) // (MCI) PDC Oriented Mode
+#define 	AT91C_MCI_PDCMODE_DISABLE              (0x0 << 15) // (MCI) Disables PDC Transfer
+#define 	AT91C_MCI_PDCMODE_ENABLE               (0x1 << 15) // (MCI) Enables PDC Transfer
+#define AT91C_MCI_BLKLEN      (0xFFFF << 16) // (MCI) Data Block Length
+// -------- MCI_DTOR : (MCI Offset: 0x8) MCI Data Timeout Register -------- 
+#define AT91C_MCI_DTOCYC      (0xF <<  0) // (MCI) Data Timeout Cycle Number
+#define AT91C_MCI_DTOMUL      (0x7 <<  4) // (MCI) Data Timeout Multiplier
+#define 	AT91C_MCI_DTOMUL_1                    (0x0 <<  4) // (MCI) DTOCYC x 1
+#define 	AT91C_MCI_DTOMUL_16                   (0x1 <<  4) // (MCI) DTOCYC x 16
+#define 	AT91C_MCI_DTOMUL_128                  (0x2 <<  4) // (MCI) DTOCYC x 128
+#define 	AT91C_MCI_DTOMUL_256                  (0x3 <<  4) // (MCI) DTOCYC x 256
+#define 	AT91C_MCI_DTOMUL_1024                 (0x4 <<  4) // (MCI) DTOCYC x 1024
+#define 	AT91C_MCI_DTOMUL_4096                 (0x5 <<  4) // (MCI) DTOCYC x 4096
+#define 	AT91C_MCI_DTOMUL_65536                (0x6 <<  4) // (MCI) DTOCYC x 65536
+#define 	AT91C_MCI_DTOMUL_1048576              (0x7 <<  4) // (MCI) DTOCYC x 1048576
+// -------- MCI_SDCR : (MCI Offset: 0xc) MCI SD Card Register -------- 
+#define AT91C_MCI_SCDSEL      (0x3 <<  0) // (MCI) SD Card/SDIO Selector
+#define 	AT91C_MCI_SCDSEL_SLOTA                (0x0) // (MCI) Slot A selected
+#define 	AT91C_MCI_SCDSEL_SLOTB                (0x1) // (MCI) Slot B selected
+#define 	AT91C_MCI_SCDSEL_SLOTC                (0x2) // (MCI) Slot C selected
+#define 	AT91C_MCI_SCDSEL_SLOTD                (0x3) // (MCI) Slot D selected
+#define AT91C_MCI_SCDBUS      (0x3 <<  6) // (MCI) SDCard/SDIO Bus Width
+#define 	AT91C_MCI_SCDBUS_1BIT                 (0x0 <<  6) // (MCI) 1-bit data bus
+#define 	AT91C_MCI_SCDBUS_4BITS                (0x2 <<  6) // (MCI) 4-bits data bus
+#define 	AT91C_MCI_SCDBUS_8BITS                (0x3 <<  6) // (MCI) 8-bits data bus
+// -------- MCI_CMDR : (MCI Offset: 0x14) MCI Command Register -------- 
+#define AT91C_MCI_CMDNB       (0x3F <<  0) // (MCI) Command Number
+#define AT91C_MCI_RSPTYP      (0x3 <<  6) // (MCI) Response Type
+#define 	AT91C_MCI_RSPTYP_NO                   (0x0 <<  6) // (MCI) No response
+#define 	AT91C_MCI_RSPTYP_48                   (0x1 <<  6) // (MCI) 48-bit response
+#define 	AT91C_MCI_RSPTYP_136                  (0x2 <<  6) // (MCI) 136-bit response
+#define 	AT91C_MCI_RSPTYP_R1B                  (0x3 <<  6) // (MCI) R1b response
+#define AT91C_MCI_SPCMD       (0x7 <<  8) // (MCI) Special CMD
+#define 	AT91C_MCI_SPCMD_NONE                 (0x0 <<  8) // (MCI) Not a special CMD
+#define 	AT91C_MCI_SPCMD_INIT                 (0x1 <<  8) // (MCI) Initialization CMD
+#define 	AT91C_MCI_SPCMD_SYNC                 (0x2 <<  8) // (MCI) Synchronized CMD
+#define 	AT91C_MCI_SPCMD_CE_ATA               (0x3 <<  8) // (MCI) CE-ATA Completion Signal disable CMD
+#define 	AT91C_MCI_SPCMD_IT_CMD               (0x4 <<  8) // (MCI) Interrupt command
+#define 	AT91C_MCI_SPCMD_IT_REP               (0x5 <<  8) // (MCI) Interrupt response
+#define AT91C_MCI_OPDCMD      (0x1 << 11) // (MCI) Open Drain Command
+#define 	AT91C_MCI_OPDCMD_PUSHPULL             (0x0 << 11) // (MCI) Push/pull command
+#define 	AT91C_MCI_OPDCMD_OPENDRAIN            (0x1 << 11) // (MCI) Open drain command
+#define AT91C_MCI_MAXLAT      (0x1 << 12) // (MCI) Maximum Latency for Command to respond
+#define 	AT91C_MCI_MAXLAT_5                    (0x0 << 12) // (MCI) 5 cycles maximum latency
+#define 	AT91C_MCI_MAXLAT_64                   (0x1 << 12) // (MCI) 64 cycles maximum latency
+#define AT91C_MCI_TRCMD       (0x3 << 16) // (MCI) Transfer CMD
+#define 	AT91C_MCI_TRCMD_NO                   (0x0 << 16) // (MCI) No transfer
+#define 	AT91C_MCI_TRCMD_START                (0x1 << 16) // (MCI) Start transfer
+#define 	AT91C_MCI_TRCMD_STOP                 (0x2 << 16) // (MCI) Stop transfer
+#define AT91C_MCI_TRDIR       (0x1 << 18) // (MCI) Transfer Direction
+#define 	AT91C_MCI_TRDIR_WRITE                (0x0 << 18) // (MCI) Write
+#define 	AT91C_MCI_TRDIR_READ                 (0x1 << 18) // (MCI) Read
+#define AT91C_MCI_TRTYP       (0x7 << 19) // (MCI) Transfer Type
+#define 	AT91C_MCI_TRTYP_BLOCK                (0x0 << 19) // (MCI) MMC/SDCard Single Block Transfer type
+#define 	AT91C_MCI_TRTYP_MULTIPLE             (0x1 << 19) // (MCI) MMC/SDCard Multiple Block transfer type
+#define 	AT91C_MCI_TRTYP_STREAM               (0x2 << 19) // (MCI) MMC Stream transfer type
+#define 	AT91C_MCI_TRTYP_SDIO_BYTE            (0x4 << 19) // (MCI) SDIO Byte transfer type
+#define 	AT91C_MCI_TRTYP_SDIO_BLOCK           (0x5 << 19) // (MCI) SDIO Block transfer type
+#define AT91C_MCI_IOSPCMD     (0x3 << 24) // (MCI) SDIO Special Command
+#define 	AT91C_MCI_IOSPCMD_NONE                 (0x0 << 24) // (MCI) NOT a special command
+#define 	AT91C_MCI_IOSPCMD_SUSPEND              (0x1 << 24) // (MCI) SDIO Suspend Command
+#define 	AT91C_MCI_IOSPCMD_RESUME               (0x2 << 24) // (MCI) SDIO Resume Command
+#define AT91C_MCI_ATACS       (0x1 << 26) // (MCI) ATA with command completion signal
+#define 	AT91C_MCI_ATACS_NORMAL               (0x0 << 26) // (MCI) normal operation mode
+#define 	AT91C_MCI_ATACS_COMPLETION           (0x1 << 26) // (MCI) completion signal is expected within MCI_CSTOR
+// -------- MCI_BLKR : (MCI Offset: 0x18) MCI Block Register -------- 
+#define AT91C_MCI_BCNT        (0xFFFF <<  0) // (MCI) MMC/SDIO Block Count / SDIO Byte Count
+// -------- MCI_CSTOR : (MCI Offset: 0x1c) MCI Completion Signal Timeout Register -------- 
+#define AT91C_MCI_CSTOCYC     (0xF <<  0) // (MCI) Completion Signal Timeout Cycle Number
+#define AT91C_MCI_CSTOMUL     (0x7 <<  4) // (MCI) Completion Signal Timeout Multiplier
+#define 	AT91C_MCI_CSTOMUL_1                    (0x0 <<  4) // (MCI) CSTOCYC x 1
+#define 	AT91C_MCI_CSTOMUL_16                   (0x1 <<  4) // (MCI) CSTOCYC x  16
+#define 	AT91C_MCI_CSTOMUL_128                  (0x2 <<  4) // (MCI) CSTOCYC x  128
+#define 	AT91C_MCI_CSTOMUL_256                  (0x3 <<  4) // (MCI) CSTOCYC x  256
+#define 	AT91C_MCI_CSTOMUL_1024                 (0x4 <<  4) // (MCI) CSTOCYC x  1024
+#define 	AT91C_MCI_CSTOMUL_4096                 (0x5 <<  4) // (MCI) CSTOCYC x  4096
+#define 	AT91C_MCI_CSTOMUL_65536                (0x6 <<  4) // (MCI) CSTOCYC x  65536
+#define 	AT91C_MCI_CSTOMUL_1048576              (0x7 <<  4) // (MCI) CSTOCYC x  1048576
+// -------- MCI_SR : (MCI Offset: 0x40) MCI Status Register -------- 
+#define AT91C_MCI_CMDRDY      (0x1 <<  0) // (MCI) Command Ready flag
+#define AT91C_MCI_RXRDY       (0x1 <<  1) // (MCI) RX Ready flag
+#define AT91C_MCI_TXRDY       (0x1 <<  2) // (MCI) TX Ready flag
+#define AT91C_MCI_BLKE        (0x1 <<  3) // (MCI) Data Block Transfer Ended flag
+#define AT91C_MCI_DTIP        (0x1 <<  4) // (MCI) Data Transfer in Progress flag
+#define AT91C_MCI_NOTBUSY     (0x1 <<  5) // (MCI) Data Line Not Busy flag
+#define AT91C_MCI_ENDRX       (0x1 <<  6) // (MCI) End of RX Buffer flag
+#define AT91C_MCI_ENDTX       (0x1 <<  7) // (MCI) End of TX Buffer flag
+#define AT91C_MCI_SDIOIRQA    (0x1 <<  8) // (MCI) SDIO Interrupt for Slot A
+#define AT91C_MCI_SDIOIRQB    (0x1 <<  9) // (MCI) SDIO Interrupt for Slot B
+#define AT91C_MCI_SDIOIRQC    (0x1 << 10) // (MCI) SDIO Interrupt for Slot C
+#define AT91C_MCI_SDIOIRQD    (0x1 << 11) // (MCI) SDIO Interrupt for Slot D
+#define AT91C_MCI_SDIOWAIT    (0x1 << 12) // (MCI) SDIO Read Wait operation flag
+#define AT91C_MCI_CSRCV       (0x1 << 13) // (MCI) CE-ATA Completion Signal flag
+#define AT91C_MCI_RXBUFF      (0x1 << 14) // (MCI) RX Buffer Full flag
+#define AT91C_MCI_TXBUFE      (0x1 << 15) // (MCI) TX Buffer Empty flag
+#define AT91C_MCI_RINDE       (0x1 << 16) // (MCI) Response Index Error flag
+#define AT91C_MCI_RDIRE       (0x1 << 17) // (MCI) Response Direction Error flag
+#define AT91C_MCI_RCRCE       (0x1 << 18) // (MCI) Response CRC Error flag
+#define AT91C_MCI_RENDE       (0x1 << 19) // (MCI) Response End Bit Error flag
+#define AT91C_MCI_RTOE        (0x1 << 20) // (MCI) Response Time-out Error flag
+#define AT91C_MCI_DCRCE       (0x1 << 21) // (MCI) data CRC Error flag
+#define AT91C_MCI_DTOE        (0x1 << 22) // (MCI) Data timeout Error flag
+#define AT91C_MCI_CSTOE       (0x1 << 23) // (MCI) Completion Signal timeout Error flag
+#define AT91C_MCI_BLKOVRE     (0x1 << 24) // (MCI) DMA Block Overrun Error flag
+#define AT91C_MCI_DMADONE     (0x1 << 25) // (MCI) DMA Transfer Done flag
+#define AT91C_MCI_FIFOEMPTY   (0x1 << 26) // (MCI) FIFO Empty flag
+#define AT91C_MCI_XFRDONE     (0x1 << 27) // (MCI) Transfer Done flag
+#define AT91C_MCI_OVRE        (0x1 << 30) // (MCI) Overrun flag
+#define AT91C_MCI_UNRE        (0x1 << 31) // (MCI) Underrun flag
+// -------- MCI_IER : (MCI Offset: 0x44) MCI Interrupt Enable Register -------- 
+// -------- MCI_IDR : (MCI Offset: 0x48) MCI Interrupt Disable Register -------- 
+// -------- MCI_IMR : (MCI Offset: 0x4c) MCI Interrupt Mask Register -------- 
+// -------- MCI_DMA : (MCI Offset: 0x50) MCI DMA Configuration Register -------- 
+#define AT91C_MCI_OFFSET      (0x3 <<  0) // (MCI) DMA Write Buffer Offset
+#define AT91C_MCI_CHKSIZE     (0x7 <<  4) // (MCI) DMA Channel Read/Write Chunk Size
+#define 	AT91C_MCI_CHKSIZE_1                    (0x0 <<  4) // (MCI) Number of data transferred is 1
+#define 	AT91C_MCI_CHKSIZE_4                    (0x1 <<  4) // (MCI) Number of data transferred is 4
+#define 	AT91C_MCI_CHKSIZE_8                    (0x2 <<  4) // (MCI) Number of data transferred is 8
+#define 	AT91C_MCI_CHKSIZE_16                   (0x3 <<  4) // (MCI) Number of data transferred is 16
+#define 	AT91C_MCI_CHKSIZE_32                   (0x4 <<  4) // (MCI) Number of data transferred is 32
+#define AT91C_MCI_DMAEN       (0x1 <<  8) // (MCI) DMA Hardware Handshaking Enable
+#define 	AT91C_MCI_DMAEN_DISABLE              (0x0 <<  8) // (MCI) DMA interface is disabled
+#define 	AT91C_MCI_DMAEN_ENABLE               (0x1 <<  8) // (MCI) DMA interface is enabled
+// -------- MCI_CFG : (MCI Offset: 0x54) MCI Configuration Register -------- 
+#define AT91C_MCI_FIFOMODE    (0x1 <<  0) // (MCI) MCI Internal FIFO Control Mode
+#define 	AT91C_MCI_FIFOMODE_AMOUNTDATA           (0x0) // (MCI) A write transfer starts when a sufficient amount of datas is written into the FIFO
+#define 	AT91C_MCI_FIFOMODE_ONEDATA              (0x1) // (MCI) A write transfer starts as soon as one data is written into the FIFO
+#define AT91C_MCI_FERRCTRL    (0x1 <<  4) // (MCI) Flow Error Flag Reset Control Mode
+#define 	AT91C_MCI_FERRCTRL_RWCMD                (0x0 <<  4) // (MCI) When an underflow/overflow condition flag is set, a new Write/Read command is needed to reset the flag
+#define 	AT91C_MCI_FERRCTRL_READSR               (0x1 <<  4) // (MCI) When an underflow/overflow condition flag is set, a read status resets the flag
+#define AT91C_MCI_HSMODE      (0x1 <<  8) // (MCI) High Speed Mode
+#define 	AT91C_MCI_HSMODE_DISABLE              (0x0 <<  8) // (MCI) Default Bus Timing Mode
+#define 	AT91C_MCI_HSMODE_ENABLE               (0x1 <<  8) // (MCI) High Speed Mode
+#define AT91C_MCI_LSYNC       (0x1 << 12) // (MCI) Synchronize on last block
+#define 	AT91C_MCI_LSYNC_CURRENT              (0x0 << 12) // (MCI) Pending command sent at end of current data block
+#define 	AT91C_MCI_LSYNC_INFINITE             (0x1 << 12) // (MCI) Pending command sent at end of block transfer when transfer length is not infinite
+// -------- MCI_WPCR : (MCI Offset: 0xe4) Write Protection Control Register -------- 
+#define AT91C_MCI_WP_EN       (0x1 <<  0) // (MCI) Write Protection Enable
+#define 	AT91C_MCI_WP_EN_DISABLE              (0x0) // (MCI) Write Operation is disabled (if WP_KEY corresponds)
+#define 	AT91C_MCI_WP_EN_ENABLE               (0x1) // (MCI) Write Operation is enabled (if WP_KEY corresponds)
+#define AT91C_MCI_WP_KEY      (0xFFFFFF <<  8) // (MCI) Write Protection Key
+// -------- MCI_WPSR : (MCI Offset: 0xe8) Write Protection Status Register -------- 
+#define AT91C_MCI_WP_VS       (0xF <<  0) // (MCI) Write Protection Violation Status
+#define 	AT91C_MCI_WP_VS_NO_VIOLATION         (0x0) // (MCI) No Write Protection Violation detected since last read
+#define 	AT91C_MCI_WP_VS_ON_WRITE             (0x1) // (MCI) Write Protection Violation detected since last read
+#define 	AT91C_MCI_WP_VS_ON_RESET             (0x2) // (MCI) Software Reset Violation detected since last read
+#define 	AT91C_MCI_WP_VS_ON_BOTH              (0x3) // (MCI) Write Protection and Software Reset Violation detected since last read
+#define AT91C_MCI_WP_VSRC     (0xF <<  8) // (MCI) Write Protection Violation Source
+#define 	AT91C_MCI_WP_VSRC_NO_VIOLATION         (0x0 <<  8) // (MCI) No Write Protection Violation detected since last read
+#define 	AT91C_MCI_WP_VSRC_MCI_MR               (0x1 <<  8) // (MCI) Write Protection Violation detected on MCI_MR since last read
+#define 	AT91C_MCI_WP_VSRC_MCI_DTOR             (0x2 <<  8) // (MCI) Write Protection Violation detected on MCI_DTOR since last read
+#define 	AT91C_MCI_WP_VSRC_MCI_SDCR             (0x3 <<  8) // (MCI) Write Protection Violation detected on MCI_SDCR since last read
+#define 	AT91C_MCI_WP_VSRC_MCI_CSTOR            (0x4 <<  8) // (MCI) Write Protection Violation detected on MCI_CSTOR since last read
+#define 	AT91C_MCI_WP_VSRC_MCI_DMA              (0x5 <<  8) // (MCI) Write Protection Violation detected on MCI_DMA since last read
+#define 	AT91C_MCI_WP_VSRC_MCI_CFG              (0x6 <<  8) // (MCI) Write Protection Violation detected on MCI_CFG since last read
+#define 	AT91C_MCI_WP_VSRC_MCI_DEL              (0x7 <<  8) // (MCI) Write Protection Violation detected on MCI_DEL since last read
+// -------- MCI_VER : (MCI Offset: 0xfc)  VERSION  Register -------- 
+#define AT91C_MCI_VER         (0xF <<  0) // (MCI)  VERSION  Register
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Two-wire Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_TWI {
+	AT91_REG	 TWI_CR; 	// Control Register
+	AT91_REG	 TWI_MMR; 	// Master Mode Register
+	AT91_REG	 TWI_SMR; 	// Slave Mode Register
+	AT91_REG	 TWI_IADR; 	// Internal Address Register
+	AT91_REG	 TWI_CWGR; 	// Clock Waveform Generator Register
+	AT91_REG	 Reserved0[3]; 	// 
+	AT91_REG	 TWI_SR; 	// Status Register
+	AT91_REG	 TWI_IER; 	// Interrupt Enable Register
+	AT91_REG	 TWI_IDR; 	// Interrupt Disable Register
+	AT91_REG	 TWI_IMR; 	// Interrupt Mask Register
+	AT91_REG	 TWI_RHR; 	// Receive Holding Register
+	AT91_REG	 TWI_THR; 	// Transmit Holding Register
+	AT91_REG	 Reserved1[45]; 	// 
+	AT91_REG	 TWI_ADDRSIZE; 	// TWI ADDRSIZE REGISTER 
+	AT91_REG	 TWI_IPNAME1; 	// TWI IPNAME1 REGISTER 
+	AT91_REG	 TWI_IPNAME2; 	// TWI IPNAME2 REGISTER 
+	AT91_REG	 TWI_FEATURES; 	// TWI FEATURES REGISTER 
+	AT91_REG	 TWI_VER; 	// Version Register
+	AT91_REG	 TWI_RPR; 	// Receive Pointer Register
+	AT91_REG	 TWI_RCR; 	// Receive Counter Register
+	AT91_REG	 TWI_TPR; 	// Transmit Pointer Register
+	AT91_REG	 TWI_TCR; 	// Transmit Counter Register
+	AT91_REG	 TWI_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 TWI_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 TWI_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 TWI_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 TWI_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 TWI_PTSR; 	// PDC Transfer Status Register
+} AT91S_TWI, *AT91PS_TWI;
+#else
+#define TWI_CR          (AT91_CAST(AT91_REG *) 	0x00000000) // (TWI_CR) Control Register
+#define TWI_MMR         (AT91_CAST(AT91_REG *) 	0x00000004) // (TWI_MMR) Master Mode Register
+#define TWI_SMR         (AT91_CAST(AT91_REG *) 	0x00000008) // (TWI_SMR) Slave Mode Register
+#define TWI_IADR        (AT91_CAST(AT91_REG *) 	0x0000000C) // (TWI_IADR) Internal Address Register
+#define TWI_CWGR        (AT91_CAST(AT91_REG *) 	0x00000010) // (TWI_CWGR) Clock Waveform Generator Register
+#define TWI_SR          (AT91_CAST(AT91_REG *) 	0x00000020) // (TWI_SR) Status Register
+#define TWI_IER         (AT91_CAST(AT91_REG *) 	0x00000024) // (TWI_IER) Interrupt Enable Register
+#define TWI_IDR         (AT91_CAST(AT91_REG *) 	0x00000028) // (TWI_IDR) Interrupt Disable Register
+#define TWI_IMR         (AT91_CAST(AT91_REG *) 	0x0000002C) // (TWI_IMR) Interrupt Mask Register
+#define TWI_RHR         (AT91_CAST(AT91_REG *) 	0x00000030) // (TWI_RHR) Receive Holding Register
+#define TWI_THR         (AT91_CAST(AT91_REG *) 	0x00000034) // (TWI_THR) Transmit Holding Register
+#define TWI_ADDRSIZE    (AT91_CAST(AT91_REG *) 	0x000000EC) // (TWI_ADDRSIZE) TWI ADDRSIZE REGISTER 
+#define TWI_IPNAME1     (AT91_CAST(AT91_REG *) 	0x000000F0) // (TWI_IPNAME1) TWI IPNAME1 REGISTER 
+#define TWI_IPNAME2     (AT91_CAST(AT91_REG *) 	0x000000F4) // (TWI_IPNAME2) TWI IPNAME2 REGISTER 
+#define TWI_FEATURES    (AT91_CAST(AT91_REG *) 	0x000000F8) // (TWI_FEATURES) TWI FEATURES REGISTER 
+#define TWI_VER         (AT91_CAST(AT91_REG *) 	0x000000FC) // (TWI_VER) Version Register
+
+#endif
+// -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- 
+#define AT91C_TWI_START       (0x1 <<  0) // (TWI) Send a START Condition
+#define AT91C_TWI_STOP        (0x1 <<  1) // (TWI) Send a STOP Condition
+#define AT91C_TWI_MSEN        (0x1 <<  2) // (TWI) TWI Master Transfer Enabled
+#define AT91C_TWI_MSDIS       (0x1 <<  3) // (TWI) TWI Master Transfer Disabled
+#define AT91C_TWI_SVEN        (0x1 <<  4) // (TWI) TWI Slave mode Enabled
+#define AT91C_TWI_SVDIS       (0x1 <<  5) // (TWI) TWI Slave mode Disabled
+#define AT91C_TWI_SWRST       (0x1 <<  7) // (TWI) Software Reset
+// -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- 
+#define AT91C_TWI_IADRSZ      (0x3 <<  8) // (TWI) Internal Device Address Size
+#define 	AT91C_TWI_IADRSZ_NO                   (0x0 <<  8) // (TWI) No internal device address
+#define 	AT91C_TWI_IADRSZ_1_BYTE               (0x1 <<  8) // (TWI) One-byte internal device address
+#define 	AT91C_TWI_IADRSZ_2_BYTE               (0x2 <<  8) // (TWI) Two-byte internal device address
+#define 	AT91C_TWI_IADRSZ_3_BYTE               (0x3 <<  8) // (TWI) Three-byte internal device address
+#define AT91C_TWI_MREAD       (0x1 << 12) // (TWI) Master Read Direction
+#define AT91C_TWI_DADR        (0x7F << 16) // (TWI) Device Address
+// -------- TWI_SMR : (TWI Offset: 0x8) TWI Slave Mode Register -------- 
+#define AT91C_TWI_SADR        (0x7F << 16) // (TWI) Slave Address
+// -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- 
+#define AT91C_TWI_CLDIV       (0xFF <<  0) // (TWI) Clock Low Divider
+#define AT91C_TWI_CHDIV       (0xFF <<  8) // (TWI) Clock High Divider
+#define AT91C_TWI_CKDIV       (0x7 << 16) // (TWI) Clock Divider
+// -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- 
+#define AT91C_TWI_TXCOMP_SLAVE (0x1 <<  0) // (TWI) Transmission Completed
+#define AT91C_TWI_TXCOMP_MASTER (0x1 <<  0) // (TWI) Transmission Completed
+#define AT91C_TWI_RXRDY       (0x1 <<  1) // (TWI) Receive holding register ReaDY
+#define AT91C_TWI_TXRDY_MASTER (0x1 <<  2) // (TWI) Transmit holding register ReaDY
+#define AT91C_TWI_TXRDY_SLAVE (0x1 <<  2) // (TWI) Transmit holding register ReaDY
+#define AT91C_TWI_SVREAD      (0x1 <<  3) // (TWI) Slave READ (used only in Slave mode)
+#define AT91C_TWI_SVACC       (0x1 <<  4) // (TWI) Slave ACCess (used only in Slave mode)
+#define AT91C_TWI_GACC        (0x1 <<  5) // (TWI) General Call ACcess (used only in Slave mode)
+#define AT91C_TWI_OVRE        (0x1 <<  6) // (TWI) Overrun Error (used only in Master and Multi-master mode)
+#define AT91C_TWI_NACK_SLAVE  (0x1 <<  8) // (TWI) Not Acknowledged
+#define AT91C_TWI_NACK_MASTER (0x1 <<  8) // (TWI) Not Acknowledged
+#define AT91C_TWI_ARBLST_MULTI_MASTER (0x1 <<  9) // (TWI) Arbitration Lost (used only in Multimaster mode)
+#define AT91C_TWI_SCLWS       (0x1 << 10) // (TWI) Clock Wait State (used only in Slave mode)
+#define AT91C_TWI_EOSACC      (0x1 << 11) // (TWI) End Of Slave ACCess (used only in Slave mode)
+#define AT91C_TWI_ENDRX       (0x1 << 12) // (TWI) End of Receiver Transfer
+#define AT91C_TWI_ENDTX       (0x1 << 13) // (TWI) End of Receiver Transfer
+#define AT91C_TWI_RXBUFF      (0x1 << 14) // (TWI) RXBUFF Interrupt
+#define AT91C_TWI_TXBUFE      (0x1 << 15) // (TWI) TXBUFE Interrupt
+// -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register -------- 
+// -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register -------- 
+// -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Usart
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_USART {
+	AT91_REG	 US_CR; 	// Control Register
+	AT91_REG	 US_MR; 	// Mode Register
+	AT91_REG	 US_IER; 	// Interrupt Enable Register
+	AT91_REG	 US_IDR; 	// Interrupt Disable Register
+	AT91_REG	 US_IMR; 	// Interrupt Mask Register
+	AT91_REG	 US_CSR; 	// Channel Status Register
+	AT91_REG	 US_RHR; 	// Receiver Holding Register
+	AT91_REG	 US_THR; 	// Transmitter Holding Register
+	AT91_REG	 US_BRGR; 	// Baud Rate Generator Register
+	AT91_REG	 US_RTOR; 	// Receiver Time-out Register
+	AT91_REG	 US_TTGR; 	// Transmitter Time-guard Register
+	AT91_REG	 Reserved0[5]; 	// 
+	AT91_REG	 US_FIDI; 	// FI_DI_Ratio Register
+	AT91_REG	 US_NER; 	// Nb Errors Register
+	AT91_REG	 Reserved1[1]; 	// 
+	AT91_REG	 US_IF; 	// IRDA_FILTER Register
+	AT91_REG	 US_MAN; 	// Manchester Encoder Decoder Register
+	AT91_REG	 Reserved2[38]; 	// 
+	AT91_REG	 US_ADDRSIZE; 	// US ADDRSIZE REGISTER 
+	AT91_REG	 US_IPNAME1; 	// US IPNAME1 REGISTER 
+	AT91_REG	 US_IPNAME2; 	// US IPNAME2 REGISTER 
+	AT91_REG	 US_FEATURES; 	// US FEATURES REGISTER 
+	AT91_REG	 US_VER; 	// VERSION Register
+	AT91_REG	 US_RPR; 	// Receive Pointer Register
+	AT91_REG	 US_RCR; 	// Receive Counter Register
+	AT91_REG	 US_TPR; 	// Transmit Pointer Register
+	AT91_REG	 US_TCR; 	// Transmit Counter Register
+	AT91_REG	 US_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 US_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 US_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 US_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 US_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 US_PTSR; 	// PDC Transfer Status Register
+} AT91S_USART, *AT91PS_USART;
+#else
+#define US_CR           (AT91_CAST(AT91_REG *) 	0x00000000) // (US_CR) Control Register
+#define US_MR           (AT91_CAST(AT91_REG *) 	0x00000004) // (US_MR) Mode Register
+#define US_IER          (AT91_CAST(AT91_REG *) 	0x00000008) // (US_IER) Interrupt Enable Register
+#define US_IDR          (AT91_CAST(AT91_REG *) 	0x0000000C) // (US_IDR) Interrupt Disable Register
+#define US_IMR          (AT91_CAST(AT91_REG *) 	0x00000010) // (US_IMR) Interrupt Mask Register
+#define US_CSR          (AT91_CAST(AT91_REG *) 	0x00000014) // (US_CSR) Channel Status Register
+#define US_RHR          (AT91_CAST(AT91_REG *) 	0x00000018) // (US_RHR) Receiver Holding Register
+#define US_THR          (AT91_CAST(AT91_REG *) 	0x0000001C) // (US_THR) Transmitter Holding Register
+#define US_BRGR         (AT91_CAST(AT91_REG *) 	0x00000020) // (US_BRGR) Baud Rate Generator Register
+#define US_RTOR         (AT91_CAST(AT91_REG *) 	0x00000024) // (US_RTOR) Receiver Time-out Register
+#define US_TTGR         (AT91_CAST(AT91_REG *) 	0x00000028) // (US_TTGR) Transmitter Time-guard Register
+#define US_FIDI         (AT91_CAST(AT91_REG *) 	0x00000040) // (US_FIDI) FI_DI_Ratio Register
+#define US_NER          (AT91_CAST(AT91_REG *) 	0x00000044) // (US_NER) Nb Errors Register
+#define US_IF           (AT91_CAST(AT91_REG *) 	0x0000004C) // (US_IF) IRDA_FILTER Register
+#define US_MAN          (AT91_CAST(AT91_REG *) 	0x00000050) // (US_MAN) Manchester Encoder Decoder Register
+#define US_ADDRSIZE     (AT91_CAST(AT91_REG *) 	0x000000EC) // (US_ADDRSIZE) US ADDRSIZE REGISTER 
+#define US_IPNAME1      (AT91_CAST(AT91_REG *) 	0x000000F0) // (US_IPNAME1) US IPNAME1 REGISTER 
+#define US_IPNAME2      (AT91_CAST(AT91_REG *) 	0x000000F4) // (US_IPNAME2) US IPNAME2 REGISTER 
+#define US_FEATURES     (AT91_CAST(AT91_REG *) 	0x000000F8) // (US_FEATURES) US FEATURES REGISTER 
+#define US_VER          (AT91_CAST(AT91_REG *) 	0x000000FC) // (US_VER) VERSION Register
+
+#endif
+// -------- US_CR : (USART Offset: 0x0)  Control Register -------- 
+#define AT91C_US_RSTRX        (0x1 <<  2) // (USART) Reset Receiver
+#define AT91C_US_RSTTX        (0x1 <<  3) // (USART) Reset Transmitter
+#define AT91C_US_RXEN         (0x1 <<  4) // (USART) Receiver Enable
+#define AT91C_US_RXDIS        (0x1 <<  5) // (USART) Receiver Disable
+#define AT91C_US_TXEN         (0x1 <<  6) // (USART) Transmitter Enable
+#define AT91C_US_TXDIS        (0x1 <<  7) // (USART) Transmitter Disable
+#define AT91C_US_RSTSTA       (0x1 <<  8) // (USART) Reset Status Bits
+#define AT91C_US_STTBRK       (0x1 <<  9) // (USART) Start Break
+#define AT91C_US_STPBRK       (0x1 << 10) // (USART) Stop Break
+#define AT91C_US_STTTO        (0x1 << 11) // (USART) Start Time-out
+#define AT91C_US_SENDA        (0x1 << 12) // (USART) Send Address
+#define AT91C_US_RSTIT        (0x1 << 13) // (USART) Reset Iterations
+#define AT91C_US_RSTNACK      (0x1 << 14) // (USART) Reset Non Acknowledge
+#define AT91C_US_RETTO        (0x1 << 15) // (USART) Rearm Time-out
+#define AT91C_US_DTREN        (0x1 << 16) // (USART) Data Terminal ready Enable
+#define AT91C_US_DTRDIS       (0x1 << 17) // (USART) Data Terminal ready Disable
+#define AT91C_US_RTSEN        (0x1 << 18) // (USART) Request to Send enable
+#define AT91C_US_RTSDIS       (0x1 << 19) // (USART) Request to Send Disable
+// -------- US_MR : (USART Offset: 0x4)  Mode Register -------- 
+#define AT91C_US_USMODE       (0xF <<  0) // (USART) Usart mode
+#define 	AT91C_US_USMODE_NORMAL               (0x0) // (USART) Normal
+#define 	AT91C_US_USMODE_RS485                (0x1) // (USART) RS485
+#define 	AT91C_US_USMODE_HWHSH                (0x2) // (USART) Hardware Handshaking
+#define 	AT91C_US_USMODE_MODEM                (0x3) // (USART) Modem
+#define 	AT91C_US_USMODE_ISO7816_0            (0x4) // (USART) ISO7816 protocol: T = 0
+#define 	AT91C_US_USMODE_ISO7816_1            (0x6) // (USART) ISO7816 protocol: T = 1
+#define 	AT91C_US_USMODE_IRDA                 (0x8) // (USART) IrDA
+#define 	AT91C_US_USMODE_SWHSH                (0xC) // (USART) Software Handshaking
+#define AT91C_US_CLKS         (0x3 <<  4) // (USART) Clock Selection (Baud Rate generator Input Clock
+#define 	AT91C_US_CLKS_CLOCK                (0x0 <<  4) // (USART) Clock
+#define 	AT91C_US_CLKS_FDIV1                (0x1 <<  4) // (USART) fdiv1
+#define 	AT91C_US_CLKS_SLOW                 (0x2 <<  4) // (USART) slow_clock (ARM)
+#define 	AT91C_US_CLKS_EXT                  (0x3 <<  4) // (USART) External (SCK)
+#define AT91C_US_CHRL         (0x3 <<  6) // (USART) Clock Selection (Baud Rate generator Input Clock
+#define 	AT91C_US_CHRL_5_BITS               (0x0 <<  6) // (USART) Character Length: 5 bits
+#define 	AT91C_US_CHRL_6_BITS               (0x1 <<  6) // (USART) Character Length: 6 bits
+#define 	AT91C_US_CHRL_7_BITS               (0x2 <<  6) // (USART) Character Length: 7 bits
+#define 	AT91C_US_CHRL_8_BITS               (0x3 <<  6) // (USART) Character Length: 8 bits
+#define AT91C_US_SYNC         (0x1 <<  8) // (USART) Synchronous Mode Select
+#define AT91C_US_PAR          (0x7 <<  9) // (USART) Parity type
+#define 	AT91C_US_PAR_EVEN                 (0x0 <<  9) // (USART) Even Parity
+#define 	AT91C_US_PAR_ODD                  (0x1 <<  9) // (USART) Odd Parity
+#define 	AT91C_US_PAR_SPACE                (0x2 <<  9) // (USART) Parity forced to 0 (Space)
+#define 	AT91C_US_PAR_MARK                 (0x3 <<  9) // (USART) Parity forced to 1 (Mark)
+#define 	AT91C_US_PAR_NONE                 (0x4 <<  9) // (USART) No Parity
+#define 	AT91C_US_PAR_MULTI_DROP           (0x6 <<  9) // (USART) Multi-drop mode
+#define AT91C_US_NBSTOP       (0x3 << 12) // (USART) Number of Stop bits
+#define 	AT91C_US_NBSTOP_1_BIT                (0x0 << 12) // (USART) 1 stop bit
+#define 	AT91C_US_NBSTOP_15_BIT               (0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
+#define 	AT91C_US_NBSTOP_2_BIT                (0x2 << 12) // (USART) 2 stop bits
+#define AT91C_US_CHMODE       (0x3 << 14) // (USART) Channel Mode
+#define 	AT91C_US_CHMODE_NORMAL               (0x0 << 14) // (USART) Normal Mode: The USART channel operates as an RX/TX USART.
+#define 	AT91C_US_CHMODE_AUTO                 (0x1 << 14) // (USART) Automatic Echo: Receiver Data Input is connected to the TXD pin.
+#define 	AT91C_US_CHMODE_LOCAL                (0x2 << 14) // (USART) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
+#define 	AT91C_US_CHMODE_REMOTE               (0x3 << 14) // (USART) Remote Loopback: RXD pin is internally connected to TXD pin.
+#define AT91C_US_MSBF         (0x1 << 16) // (USART) Bit Order
+#define AT91C_US_MODE9        (0x1 << 17) // (USART) 9-bit Character length
+#define AT91C_US_CKLO         (0x1 << 18) // (USART) Clock Output Select
+#define AT91C_US_OVER         (0x1 << 19) // (USART) Over Sampling Mode
+#define AT91C_US_INACK        (0x1 << 20) // (USART) Inhibit Non Acknowledge
+#define AT91C_US_DSNACK       (0x1 << 21) // (USART) Disable Successive NACK
+#define AT91C_US_VAR_SYNC     (0x1 << 22) // (USART) Variable synchronization of command/data sync Start Frame Delimiter
+#define AT91C_US_MAX_ITER     (0x1 << 24) // (USART) Number of Repetitions
+#define AT91C_US_FILTER       (0x1 << 28) // (USART) Receive Line Filter
+#define AT91C_US_MANMODE      (0x1 << 29) // (USART) Manchester Encoder/Decoder Enable
+#define AT91C_US_MODSYNC      (0x1 << 30) // (USART) Manchester Synchronization mode
+#define AT91C_US_ONEBIT       (0x1 << 31) // (USART) Start Frame Delimiter selector
+// -------- US_IER : (USART Offset: 0x8)  Interrupt Enable Register -------- 
+#define AT91C_US_RXRDY        (0x1 <<  0) // (USART) RXRDY Interrupt
+#define AT91C_US_TXRDY        (0x1 <<  1) // (USART) TXRDY Interrupt
+#define AT91C_US_RXBRK        (0x1 <<  2) // (USART) Break Received/End of Break
+#define AT91C_US_ENDRX        (0x1 <<  3) // (USART) End of Receive Transfer Interrupt
+#define AT91C_US_ENDTX        (0x1 <<  4) // (USART) End of Transmit Interrupt
+#define AT91C_US_OVRE         (0x1 <<  5) // (USART) Overrun Interrupt
+#define AT91C_US_FRAME        (0x1 <<  6) // (USART) Framing Error Interrupt
+#define AT91C_US_PARE         (0x1 <<  7) // (USART) Parity Error Interrupt
+#define AT91C_US_TIMEOUT      (0x1 <<  8) // (USART) Receiver Time-out
+#define AT91C_US_TXEMPTY      (0x1 <<  9) // (USART) TXEMPTY Interrupt
+#define AT91C_US_ITERATION    (0x1 << 10) // (USART) Max number of Repetitions Reached
+#define AT91C_US_TXBUFE       (0x1 << 11) // (USART) TXBUFE Interrupt
+#define AT91C_US_RXBUFF       (0x1 << 12) // (USART) RXBUFF Interrupt
+#define AT91C_US_NACK         (0x1 << 13) // (USART) Non Acknowledge
+#define AT91C_US_RIIC         (0x1 << 16) // (USART) Ring INdicator Input Change Flag
+#define AT91C_US_DSRIC        (0x1 << 17) // (USART) Data Set Ready Input Change Flag
+#define AT91C_US_DCDIC        (0x1 << 18) // (USART) Data Carrier Flag
+#define AT91C_US_CTSIC        (0x1 << 19) // (USART) Clear To Send Input Change Flag
+#define AT91C_US_MANE         (0x1 << 20) // (USART) Manchester Error Interrupt
+// -------- US_IDR : (USART Offset: 0xc)  Interrupt Disable Register -------- 
+// -------- US_IMR : (USART Offset: 0x10)  Interrupt Mask Register -------- 
+// -------- US_CSR : (USART Offset: 0x14)  Channel Status Register -------- 
+#define AT91C_US_RI           (0x1 << 20) // (USART) Image of RI Input
+#define AT91C_US_DSR          (0x1 << 21) // (USART) Image of DSR Input
+#define AT91C_US_DCD          (0x1 << 22) // (USART) Image of DCD Input
+#define AT91C_US_CTS          (0x1 << 23) // (USART) Image of CTS Input
+#define AT91C_US_MANERR       (0x1 << 24) // (USART) Manchester Error
+// -------- US_MAN : (USART Offset: 0x50) Manchester Encoder Decoder Register -------- 
+#define AT91C_US_TX_PL        (0xF <<  0) // (USART) Transmitter Preamble Length
+#define AT91C_US_TX_PP        (0x3 <<  8) // (USART) Transmitter Preamble Pattern
+#define 	AT91C_US_TX_PP_ALL_ONE              (0x0 <<  8) // (USART) ALL_ONE
+#define 	AT91C_US_TX_PP_ALL_ZERO             (0x1 <<  8) // (USART) ALL_ZERO
+#define 	AT91C_US_TX_PP_ZERO_ONE             (0x2 <<  8) // (USART) ZERO_ONE
+#define 	AT91C_US_TX_PP_ONE_ZERO             (0x3 <<  8) // (USART) ONE_ZERO
+#define AT91C_US_TX_MPOL      (0x1 << 12) // (USART) Transmitter Manchester Polarity
+#define AT91C_US_RX_PL        (0xF << 16) // (USART) Receiver Preamble Length
+#define AT91C_US_RX_PP        (0x3 << 24) // (USART) Receiver Preamble Pattern detected
+#define 	AT91C_US_RX_PP_ALL_ONE              (0x0 << 24) // (USART) ALL_ONE
+#define 	AT91C_US_RX_PP_ALL_ZERO             (0x1 << 24) // (USART) ALL_ZERO
+#define 	AT91C_US_RX_PP_ZERO_ONE             (0x2 << 24) // (USART) ZERO_ONE
+#define 	AT91C_US_RX_PP_ONE_ZERO             (0x3 << 24) // (USART) ONE_ZERO
+#define AT91C_US_RX_MPOL      (0x1 << 28) // (USART) Receiver Manchester Polarity
+#define AT91C_US_DRIFT        (0x1 << 30) // (USART) Drift compensation
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Synchronous Serial Controller Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_SSC {
+	AT91_REG	 SSC_CR; 	// Control Register
+	AT91_REG	 SSC_CMR; 	// Clock Mode Register
+	AT91_REG	 Reserved0[2]; 	// 
+	AT91_REG	 SSC_RCMR; 	// Receive Clock ModeRegister
+	AT91_REG	 SSC_RFMR; 	// Receive Frame Mode Register
+	AT91_REG	 SSC_TCMR; 	// Transmit Clock Mode Register
+	AT91_REG	 SSC_TFMR; 	// Transmit Frame Mode Register
+	AT91_REG	 SSC_RHR; 	// Receive Holding Register
+	AT91_REG	 SSC_THR; 	// Transmit Holding Register
+	AT91_REG	 Reserved1[2]; 	// 
+	AT91_REG	 SSC_RSHR; 	// Receive Sync Holding Register
+	AT91_REG	 SSC_TSHR; 	// Transmit Sync Holding Register
+	AT91_REG	 SSC_RC0R; 	// Receive Compare 0 Register
+	AT91_REG	 SSC_RC1R; 	// Receive Compare 1 Register
+	AT91_REG	 SSC_SR; 	// Status Register
+	AT91_REG	 SSC_IER; 	// Interrupt Enable Register
+	AT91_REG	 SSC_IDR; 	// Interrupt Disable Register
+	AT91_REG	 SSC_IMR; 	// Interrupt Mask Register
+} AT91S_SSC, *AT91PS_SSC;
+#else
+#define SSC_CR          (AT91_CAST(AT91_REG *) 	0x00000000) // (SSC_CR) Control Register
+#define SSC_CMR         (AT91_CAST(AT91_REG *) 	0x00000004) // (SSC_CMR) Clock Mode Register
+#define SSC_RCMR        (AT91_CAST(AT91_REG *) 	0x00000010) // (SSC_RCMR) Receive Clock ModeRegister
+#define SSC_RFMR        (AT91_CAST(AT91_REG *) 	0x00000014) // (SSC_RFMR) Receive Frame Mode Register
+#define SSC_TCMR        (AT91_CAST(AT91_REG *) 	0x00000018) // (SSC_TCMR) Transmit Clock Mode Register
+#define SSC_TFMR        (AT91_CAST(AT91_REG *) 	0x0000001C) // (SSC_TFMR) Transmit Frame Mode Register
+#define SSC_RHR         (AT91_CAST(AT91_REG *) 	0x00000020) // (SSC_RHR) Receive Holding Register
+#define SSC_THR         (AT91_CAST(AT91_REG *) 	0x00000024) // (SSC_THR) Transmit Holding Register
+#define SSC_RSHR        (AT91_CAST(AT91_REG *) 	0x00000030) // (SSC_RSHR) Receive Sync Holding Register
+#define SSC_TSHR        (AT91_CAST(AT91_REG *) 	0x00000034) // (SSC_TSHR) Transmit Sync Holding Register
+#define SSC_RC0R        (AT91_CAST(AT91_REG *) 	0x00000038) // (SSC_RC0R) Receive Compare 0 Register
+#define SSC_RC1R        (AT91_CAST(AT91_REG *) 	0x0000003C) // (SSC_RC1R) Receive Compare 1 Register
+#define SSC_SR          (AT91_CAST(AT91_REG *) 	0x00000040) // (SSC_SR) Status Register
+#define SSC_IER         (AT91_CAST(AT91_REG *) 	0x00000044) // (SSC_IER) Interrupt Enable Register
+#define SSC_IDR         (AT91_CAST(AT91_REG *) 	0x00000048) // (SSC_IDR) Interrupt Disable Register
+#define SSC_IMR         (AT91_CAST(AT91_REG *) 	0x0000004C) // (SSC_IMR) Interrupt Mask Register
+
+#endif
+// -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register -------- 
+#define AT91C_SSC_RXEN        (0x1 <<  0) // (SSC) Receive Enable
+#define AT91C_SSC_RXDIS       (0x1 <<  1) // (SSC) Receive Disable
+#define AT91C_SSC_TXEN        (0x1 <<  8) // (SSC) Transmit Enable
+#define AT91C_SSC_TXDIS       (0x1 <<  9) // (SSC) Transmit Disable
+#define AT91C_SSC_SWRST       (0x1 << 15) // (SSC) Software Reset
+// -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register -------- 
+#define AT91C_SSC_CKS         (0x3 <<  0) // (SSC) Receive/Transmit Clock Selection
+#define 	AT91C_SSC_CKS_DIV                  (0x0) // (SSC) Divided Clock
+#define 	AT91C_SSC_CKS_TK                   (0x1) // (SSC) TK Clock signal
+#define 	AT91C_SSC_CKS_RK                   (0x2) // (SSC) RK pin
+#define AT91C_SSC_CKO         (0x7 <<  2) // (SSC) Receive/Transmit Clock Output Mode Selection
+#define 	AT91C_SSC_CKO_NONE                 (0x0 <<  2) // (SSC) Receive/Transmit Clock Output Mode: None RK pin: Input-only
+#define 	AT91C_SSC_CKO_CONTINOUS            (0x1 <<  2) // (SSC) Continuous Receive/Transmit Clock RK pin: Output
+#define 	AT91C_SSC_CKO_DATA_TX              (0x2 <<  2) // (SSC) Receive/Transmit Clock only during data transfers RK pin: Output
+#define AT91C_SSC_CKI         (0x1 <<  5) // (SSC) Receive/Transmit Clock Inversion
+#define AT91C_SSC_CKG         (0x3 <<  6) // (SSC) Receive/Transmit Clock Gating Selection
+#define 	AT91C_SSC_CKG_NONE                 (0x0 <<  6) // (SSC) Receive/Transmit Clock Gating: None, continuous clock
+#define 	AT91C_SSC_CKG_LOW                  (0x1 <<  6) // (SSC) Receive/Transmit Clock enabled only if RF Low
+#define 	AT91C_SSC_CKG_HIGH                 (0x2 <<  6) // (SSC) Receive/Transmit Clock enabled only if RF High
+#define AT91C_SSC_START       (0xF <<  8) // (SSC) Receive/Transmit Start Selection
+#define 	AT91C_SSC_START_CONTINOUS            (0x0 <<  8) // (SSC) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.
+#define 	AT91C_SSC_START_TX                   (0x1 <<  8) // (SSC) Transmit/Receive start
+#define 	AT91C_SSC_START_LOW_RF               (0x2 <<  8) // (SSC) Detection of a low level on RF input
+#define 	AT91C_SSC_START_HIGH_RF              (0x3 <<  8) // (SSC) Detection of a high level on RF input
+#define 	AT91C_SSC_START_FALL_RF              (0x4 <<  8) // (SSC) Detection of a falling edge on RF input
+#define 	AT91C_SSC_START_RISE_RF              (0x5 <<  8) // (SSC) Detection of a rising edge on RF input
+#define 	AT91C_SSC_START_LEVEL_RF             (0x6 <<  8) // (SSC) Detection of any level change on RF input
+#define 	AT91C_SSC_START_EDGE_RF              (0x7 <<  8) // (SSC) Detection of any edge on RF input
+#define 	AT91C_SSC_START_0                    (0x8 <<  8) // (SSC) Compare 0
+#define AT91C_SSC_STOP        (0x1 << 12) // (SSC) Receive Stop Selection
+#define AT91C_SSC_STTOUT      (0x1 << 15) // (SSC) Receive/Transmit Start Output Selection
+#define AT91C_SSC_STTDLY      (0xFF << 16) // (SSC) Receive/Transmit Start Delay
+#define AT91C_SSC_PERIOD      (0xFF << 24) // (SSC) Receive/Transmit Period Divider Selection
+// -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register -------- 
+#define AT91C_SSC_DATLEN      (0x1F <<  0) // (SSC) Data Length
+#define AT91C_SSC_LOOP        (0x1 <<  5) // (SSC) Loop Mode
+#define AT91C_SSC_MSBF        (0x1 <<  7) // (SSC) Most Significant Bit First
+#define AT91C_SSC_DATNB       (0xF <<  8) // (SSC) Data Number per Frame
+#define AT91C_SSC_FSLEN       (0xF << 16) // (SSC) Receive/Transmit Frame Sync length
+#define AT91C_SSC_FSOS        (0x7 << 20) // (SSC) Receive/Transmit Frame Sync Output Selection
+#define 	AT91C_SSC_FSOS_NONE                 (0x0 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: None RK pin Input-only
+#define 	AT91C_SSC_FSOS_NEGATIVE             (0x1 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Negative Pulse
+#define 	AT91C_SSC_FSOS_POSITIVE             (0x2 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Positive Pulse
+#define 	AT91C_SSC_FSOS_LOW                  (0x3 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver Low during data transfer
+#define 	AT91C_SSC_FSOS_HIGH                 (0x4 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver High during data transfer
+#define 	AT91C_SSC_FSOS_TOGGLE               (0x5 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Toggling at each start of data transfer
+#define AT91C_SSC_FSEDGE      (0x1 << 24) // (SSC) Frame Sync Edge Detection
+// -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register -------- 
+// -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register -------- 
+#define AT91C_SSC_DATDEF      (0x1 <<  5) // (SSC) Data Default Value
+#define AT91C_SSC_FSDEN       (0x1 << 23) // (SSC) Frame Sync Data Enable
+// -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register -------- 
+#define AT91C_SSC_TXRDY       (0x1 <<  0) // (SSC) Transmit Ready
+#define AT91C_SSC_TXEMPTY     (0x1 <<  1) // (SSC) Transmit Empty
+#define AT91C_SSC_ENDTX       (0x1 <<  2) // (SSC) End Of Transmission
+#define AT91C_SSC_TXBUFE      (0x1 <<  3) // (SSC) Transmit Buffer Empty
+#define AT91C_SSC_RXRDY       (0x1 <<  4) // (SSC) Receive Ready
+#define AT91C_SSC_OVRUN       (0x1 <<  5) // (SSC) Receive Overrun
+#define AT91C_SSC_ENDRX       (0x1 <<  6) // (SSC) End of Reception
+#define AT91C_SSC_RXBUFF      (0x1 <<  7) // (SSC) Receive Buffer Full
+#define AT91C_SSC_CP0         (0x1 <<  8) // (SSC) Compare 0
+#define AT91C_SSC_CP1         (0x1 <<  9) // (SSC) Compare 1
+#define AT91C_SSC_TXSYN       (0x1 << 10) // (SSC) Transmit Sync
+#define AT91C_SSC_RXSYN       (0x1 << 11) // (SSC) Receive Sync
+#define AT91C_SSC_TXENA       (0x1 << 16) // (SSC) Transmit Enable
+#define AT91C_SSC_RXENA       (0x1 << 17) // (SSC) Receive Enable
+// -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register -------- 
+// -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register -------- 
+// -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR PWMC Channel Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_PWMC_CH {
+	AT91_REG	 PWMC_CMR; 	// Channel Mode Register
+	AT91_REG	 PWMC_CDTYR; 	// Channel Duty Cycle Register
+	AT91_REG	 PWMC_CDTYUPDR; 	// Channel Duty Cycle Update Register
+	AT91_REG	 PWMC_CPRDR; 	// Channel Period Register
+	AT91_REG	 PWMC_CPRDUPDR; 	// Channel Period Update Register
+	AT91_REG	 PWMC_CCNTR; 	// Channel Counter Register
+	AT91_REG	 PWMC_DTR; 	// Channel Dead Time Value Register
+	AT91_REG	 PWMC_DTUPDR; 	// Channel Dead Time Update Value Register
+} AT91S_PWMC_CH, *AT91PS_PWMC_CH;
+#else
+#define PWMC_CMR        (AT91_CAST(AT91_REG *) 	0x00000000) // (PWMC_CMR) Channel Mode Register
+#define PWMC_CDTYR      (AT91_CAST(AT91_REG *) 	0x00000004) // (PWMC_CDTYR) Channel Duty Cycle Register
+#define PWMC_CDTYUPDR   (AT91_CAST(AT91_REG *) 	0x00000008) // (PWMC_CDTYUPDR) Channel Duty Cycle Update Register
+#define PWMC_CPRDR      (AT91_CAST(AT91_REG *) 	0x0000000C) // (PWMC_CPRDR) Channel Period Register
+#define PWMC_CPRDUPDR   (AT91_CAST(AT91_REG *) 	0x00000010) // (PWMC_CPRDUPDR) Channel Period Update Register
+#define PWMC_CCNTR      (AT91_CAST(AT91_REG *) 	0x00000014) // (PWMC_CCNTR) Channel Counter Register
+#define PWMC_DTR        (AT91_CAST(AT91_REG *) 	0x00000018) // (PWMC_DTR) Channel Dead Time Value Register
+#define PWMC_DTUPDR     (AT91_CAST(AT91_REG *) 	0x0000001C) // (PWMC_DTUPDR) Channel Dead Time Update Value Register
+
+#endif
+// -------- PWMC_CMR : (PWMC_CH Offset: 0x0) PWMC Channel Mode Register -------- 
+#define AT91C_PWMC_CPRE       (0xF <<  0) // (PWMC_CH) Channel Pre-scaler : PWMC_CLKx
+#define 	AT91C_PWMC_CPRE_MCK                  (0x0) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCK_DIV_2            (0x1) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCK_DIV_4            (0x2) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCK_DIV_8            (0x3) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCK_DIV_16           (0x4) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCK_DIV_32           (0x5) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCK_DIV_64           (0x6) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCK_DIV_128          (0x7) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCK_DIV_256          (0x8) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCK_DIV_512          (0x9) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCK_DIV_1024         (0xA) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCKA                 (0xB) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCKB                 (0xC) // (PWMC_CH) 
+#define AT91C_PWMC_CALG       (0x1 <<  8) // (PWMC_CH) Channel Alignment
+#define AT91C_PWMC_CPOL       (0x1 <<  9) // (PWMC_CH) Channel Polarity
+#define AT91C_PWMC_CES        (0x1 << 10) // (PWMC_CH) Counter Event Selection
+#define AT91C_PWMC_DTE        (0x1 << 16) // (PWMC_CH) Dead Time Genrator Enable
+#define AT91C_PWMC_DTHI       (0x1 << 17) // (PWMC_CH) Dead Time PWMHx Output Inverted
+#define AT91C_PWMC_DTLI       (0x1 << 18) // (PWMC_CH) Dead Time PWMLx Output Inverted
+// -------- PWMC_CDTYR : (PWMC_CH Offset: 0x4) PWMC Channel Duty Cycle Register -------- 
+#define AT91C_PWMC_CDTY       (0xFFFFFF <<  0) // (PWMC_CH) Channel Duty Cycle
+// -------- PWMC_CDTYUPDR : (PWMC_CH Offset: 0x8) PWMC Channel Duty Cycle Update Register -------- 
+#define AT91C_PWMC_CDTYUPD    (0xFFFFFF <<  0) // (PWMC_CH) Channel Duty Cycle Update
+// -------- PWMC_CPRDR : (PWMC_CH Offset: 0xc) PWMC Channel Period Register -------- 
+#define AT91C_PWMC_CPRD       (0xFFFFFF <<  0) // (PWMC_CH) Channel Period
+// -------- PWMC_CPRDUPDR : (PWMC_CH Offset: 0x10) PWMC Channel Period Update Register -------- 
+#define AT91C_PWMC_CPRDUPD    (0xFFFFFF <<  0) // (PWMC_CH) Channel Period Update
+// -------- PWMC_CCNTR : (PWMC_CH Offset: 0x14) PWMC Channel Counter Register -------- 
+#define AT91C_PWMC_CCNT       (0xFFFFFF <<  0) // (PWMC_CH) Channel Counter
+// -------- PWMC_DTR : (PWMC_CH Offset: 0x18) Channel Dead Time Value Register -------- 
+#define AT91C_PWMC_DTL        (0xFFFF <<  0) // (PWMC_CH) Channel Dead Time for PWML
+#define AT91C_PWMC_DTH        (0xFFFF << 16) // (PWMC_CH) Channel Dead Time for PWMH
+// -------- PWMC_DTUPDR : (PWMC_CH Offset: 0x1c) Channel Dead Time Value Register -------- 
+#define AT91C_PWMC_DTLUPD     (0xFFFF <<  0) // (PWMC_CH) Channel Dead Time Update for PWML.
+#define AT91C_PWMC_DTHUPD     (0xFFFF << 16) // (PWMC_CH) Channel Dead Time Update for PWMH.
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Pulse Width Modulation Controller Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_PWMC {
+	AT91_REG	 PWMC_MR; 	// PWMC Mode Register
+	AT91_REG	 PWMC_ENA; 	// PWMC Enable Register
+	AT91_REG	 PWMC_DIS; 	// PWMC Disable Register
+	AT91_REG	 PWMC_SR; 	// PWMC Status Register
+	AT91_REG	 PWMC_IER1; 	// PWMC Interrupt Enable Register 1
+	AT91_REG	 PWMC_IDR1; 	// PWMC Interrupt Disable Register 1
+	AT91_REG	 PWMC_IMR1; 	// PWMC Interrupt Mask Register 1
+	AT91_REG	 PWMC_ISR1; 	// PWMC Interrupt Status Register 1
+	AT91_REG	 PWMC_SYNC; 	// PWM Synchronized Channels Register
+	AT91_REG	 Reserved0[1]; 	// 
+	AT91_REG	 PWMC_UPCR; 	// PWM Update Control Register
+	AT91_REG	 PWMC_SCUP; 	// PWM Update Period Register
+	AT91_REG	 PWMC_SCUPUPD; 	// PWM Update Period Update Register
+	AT91_REG	 PWMC_IER2; 	// PWMC Interrupt Enable Register 2
+	AT91_REG	 PWMC_IDR2; 	// PWMC Interrupt Disable Register 2
+	AT91_REG	 PWMC_IMR2; 	// PWMC Interrupt Mask Register 2
+	AT91_REG	 PWMC_ISR2; 	// PWMC Interrupt Status Register 2
+	AT91_REG	 PWMC_OOV; 	// PWM Output Override Value Register
+	AT91_REG	 PWMC_OS; 	// PWM Output Selection Register
+	AT91_REG	 PWMC_OSS; 	// PWM Output Selection Set Register
+	AT91_REG	 PWMC_OSC; 	// PWM Output Selection Clear Register
+	AT91_REG	 PWMC_OSSUPD; 	// PWM Output Selection Set Update Register
+	AT91_REG	 PWMC_OSCUPD; 	// PWM Output Selection Clear Update Register
+	AT91_REG	 PWMC_FMR; 	// PWM Fault Mode Register
+	AT91_REG	 PWMC_FSR; 	// PWM Fault Mode Status Register
+	AT91_REG	 PWMC_FCR; 	// PWM Fault Mode Clear Register
+	AT91_REG	 PWMC_FPV; 	// PWM Fault Protection Value Register
+	AT91_REG	 PWMC_FPER1; 	// PWM Fault Protection Enable Register 1
+	AT91_REG	 PWMC_FPER2; 	// PWM Fault Protection Enable Register 2
+	AT91_REG	 PWMC_FPER3; 	// PWM Fault Protection Enable Register 3
+	AT91_REG	 PWMC_FPER4; 	// PWM Fault Protection Enable Register 4
+	AT91_REG	 PWMC_EL0MR; 	// PWM Event Line 0 Mode Register
+	AT91_REG	 PWMC_EL1MR; 	// PWM Event Line 1 Mode Register
+	AT91_REG	 PWMC_EL2MR; 	// PWM Event Line 2 Mode Register
+	AT91_REG	 PWMC_EL3MR; 	// PWM Event Line 3 Mode Register
+	AT91_REG	 PWMC_EL4MR; 	// PWM Event Line 4 Mode Register
+	AT91_REG	 PWMC_EL5MR; 	// PWM Event Line 5 Mode Register
+	AT91_REG	 PWMC_EL6MR; 	// PWM Event Line 6 Mode Register
+	AT91_REG	 PWMC_EL7MR; 	// PWM Event Line 7 Mode Register
+	AT91_REG	 Reserved1[18]; 	// 
+	AT91_REG	 PWMC_WPCR; 	// PWM Write Protection Enable Register
+	AT91_REG	 PWMC_WPSR; 	// PWM Write Protection Status Register
+	AT91_REG	 PWMC_ADDRSIZE; 	// PWMC ADDRSIZE REGISTER 
+	AT91_REG	 PWMC_IPNAME1; 	// PWMC IPNAME1 REGISTER 
+	AT91_REG	 PWMC_IPNAME2; 	// PWMC IPNAME2 REGISTER 
+	AT91_REG	 PWMC_FEATURES; 	// PWMC FEATURES REGISTER 
+	AT91_REG	 PWMC_VER; 	// PWMC Version Register
+	AT91_REG	 PWMC_RPR; 	// Receive Pointer Register
+	AT91_REG	 PWMC_RCR; 	// Receive Counter Register
+	AT91_REG	 PWMC_TPR; 	// Transmit Pointer Register
+	AT91_REG	 PWMC_TCR; 	// Transmit Counter Register
+	AT91_REG	 PWMC_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 PWMC_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 PWMC_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 PWMC_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 PWMC_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 PWMC_PTSR; 	// PDC Transfer Status Register
+	AT91_REG	 Reserved2[2]; 	// 
+	AT91_REG	 PWMC_CMP0V; 	// PWM Comparison Value 0 Register
+	AT91_REG	 PWMC_CMP0VUPD; 	// PWM Comparison Value 0 Update Register
+	AT91_REG	 PWMC_CMP0M; 	// PWM Comparison Mode 0 Register
+	AT91_REG	 PWMC_CMP0MUPD; 	// PWM Comparison Mode 0 Update Register
+	AT91_REG	 PWMC_CMP1V; 	// PWM Comparison Value 1 Register
+	AT91_REG	 PWMC_CMP1VUPD; 	// PWM Comparison Value 1 Update Register
+	AT91_REG	 PWMC_CMP1M; 	// PWM Comparison Mode 1 Register
+	AT91_REG	 PWMC_CMP1MUPD; 	// PWM Comparison Mode 1 Update Register
+	AT91_REG	 PWMC_CMP2V; 	// PWM Comparison Value 2 Register
+	AT91_REG	 PWMC_CMP2VUPD; 	// PWM Comparison Value 2 Update Register
+	AT91_REG	 PWMC_CMP2M; 	// PWM Comparison Mode 2 Register
+	AT91_REG	 PWMC_CMP2MUPD; 	// PWM Comparison Mode 2 Update Register
+	AT91_REG	 PWMC_CMP3V; 	// PWM Comparison Value 3 Register
+	AT91_REG	 PWMC_CMP3VUPD; 	// PWM Comparison Value 3 Update Register
+	AT91_REG	 PWMC_CMP3M; 	// PWM Comparison Mode 3 Register
+	AT91_REG	 PWMC_CMP3MUPD; 	// PWM Comparison Mode 3 Update Register
+	AT91_REG	 PWMC_CMP4V; 	// PWM Comparison Value 4 Register
+	AT91_REG	 PWMC_CMP4VUPD; 	// PWM Comparison Value 4 Update Register
+	AT91_REG	 PWMC_CMP4M; 	// PWM Comparison Mode 4 Register
+	AT91_REG	 PWMC_CMP4MUPD; 	// PWM Comparison Mode 4 Update Register
+	AT91_REG	 PWMC_CMP5V; 	// PWM Comparison Value 5 Register
+	AT91_REG	 PWMC_CMP5VUPD; 	// PWM Comparison Value 5 Update Register
+	AT91_REG	 PWMC_CMP5M; 	// PWM Comparison Mode 5 Register
+	AT91_REG	 PWMC_CMP5MUPD; 	// PWM Comparison Mode 5 Update Register
+	AT91_REG	 PWMC_CMP6V; 	// PWM Comparison Value 6 Register
+	AT91_REG	 PWMC_CMP6VUPD; 	// PWM Comparison Value 6 Update Register
+	AT91_REG	 PWMC_CMP6M; 	// PWM Comparison Mode 6 Register
+	AT91_REG	 PWMC_CMP6MUPD; 	// PWM Comparison Mode 6 Update Register
+	AT91_REG	 PWMC_CMP7V; 	// PWM Comparison Value 7 Register
+	AT91_REG	 PWMC_CMP7VUPD; 	// PWM Comparison Value 7 Update Register
+	AT91_REG	 PWMC_CMP7M; 	// PWM Comparison Mode 7 Register
+	AT91_REG	 PWMC_CMP7MUPD; 	// PWM Comparison Mode 7 Update Register
+	AT91_REG	 Reserved3[20]; 	// 
+	AT91S_PWMC_CH	 PWMC_CH[8]; 	// PWMC Channel 0
+} AT91S_PWMC, *AT91PS_PWMC;
+#else
+#define PWMC_MR         (AT91_CAST(AT91_REG *) 	0x00000000) // (PWMC_MR) PWMC Mode Register
+#define PWMC_ENA        (AT91_CAST(AT91_REG *) 	0x00000004) // (PWMC_ENA) PWMC Enable Register
+#define PWMC_DIS        (AT91_CAST(AT91_REG *) 	0x00000008) // (PWMC_DIS) PWMC Disable Register
+#define PWMC_SR         (AT91_CAST(AT91_REG *) 	0x0000000C) // (PWMC_SR) PWMC Status Register
+#define PWMC_IER1       (AT91_CAST(AT91_REG *) 	0x00000010) // (PWMC_IER1) PWMC Interrupt Enable Register 1
+#define PWMC_IDR1       (AT91_CAST(AT91_REG *) 	0x00000014) // (PWMC_IDR1) PWMC Interrupt Disable Register 1
+#define PWMC_IMR1       (AT91_CAST(AT91_REG *) 	0x00000018) // (PWMC_IMR1) PWMC Interrupt Mask Register 1
+#define PWMC_ISR1       (AT91_CAST(AT91_REG *) 	0x0000001C) // (PWMC_ISR1) PWMC Interrupt Status Register 1
+#define PWMC_SYNC       (AT91_CAST(AT91_REG *) 	0x00000020) // (PWMC_SYNC) PWM Synchronized Channels Register
+#define PWMC_UPCR       (AT91_CAST(AT91_REG *) 	0x00000028) // (PWMC_UPCR) PWM Update Control Register
+#define PWMC_SCUP       (AT91_CAST(AT91_REG *) 	0x0000002C) // (PWMC_SCUP) PWM Update Period Register
+#define PWMC_SCUPUPD    (AT91_CAST(AT91_REG *) 	0x00000030) // (PWMC_SCUPUPD) PWM Update Period Update Register
+#define PWMC_IER2       (AT91_CAST(AT91_REG *) 	0x00000034) // (PWMC_IER2) PWMC Interrupt Enable Register 2
+#define PWMC_IDR2       (AT91_CAST(AT91_REG *) 	0x00000038) // (PWMC_IDR2) PWMC Interrupt Disable Register 2
+#define PWMC_IMR2       (AT91_CAST(AT91_REG *) 	0x0000003C) // (PWMC_IMR2) PWMC Interrupt Mask Register 2
+#define PWMC_ISR2       (AT91_CAST(AT91_REG *) 	0x00000040) // (PWMC_ISR2) PWMC Interrupt Status Register 2
+#define PWMC_OOV        (AT91_CAST(AT91_REG *) 	0x00000044) // (PWMC_OOV) PWM Output Override Value Register
+#define PWMC_OS         (AT91_CAST(AT91_REG *) 	0x00000048) // (PWMC_OS) PWM Output Selection Register
+#define PWMC_OSS        (AT91_CAST(AT91_REG *) 	0x0000004C) // (PWMC_OSS) PWM Output Selection Set Register
+#define PWMC_OSC        (AT91_CAST(AT91_REG *) 	0x00000050) // (PWMC_OSC) PWM Output Selection Clear Register
+#define PWMC_OSSUPD     (AT91_CAST(AT91_REG *) 	0x00000054) // (PWMC_OSSUPD) PWM Output Selection Set Update Register
+#define PWMC_OSCUPD     (AT91_CAST(AT91_REG *) 	0x00000058) // (PWMC_OSCUPD) PWM Output Selection Clear Update Register
+#define PWMC_FMR        (AT91_CAST(AT91_REG *) 	0x0000005C) // (PWMC_FMR) PWM Fault Mode Register
+#define PWMC_FSR        (AT91_CAST(AT91_REG *) 	0x00000060) // (PWMC_FSR) PWM Fault Mode Status Register
+#define PWMC_FCR        (AT91_CAST(AT91_REG *) 	0x00000064) // (PWMC_FCR) PWM Fault Mode Clear Register
+#define PWMC_FPV        (AT91_CAST(AT91_REG *) 	0x00000068) // (PWMC_FPV) PWM Fault Protection Value Register
+#define PWMC_FPER1      (AT91_CAST(AT91_REG *) 	0x0000006C) // (PWMC_FPER1) PWM Fault Protection Enable Register 1
+#define PWMC_FPER2      (AT91_CAST(AT91_REG *) 	0x00000070) // (PWMC_FPER2) PWM Fault Protection Enable Register 2
+#define PWMC_FPER3      (AT91_CAST(AT91_REG *) 	0x00000074) // (PWMC_FPER3) PWM Fault Protection Enable Register 3
+#define PWMC_FPER4      (AT91_CAST(AT91_REG *) 	0x00000078) // (PWMC_FPER4) PWM Fault Protection Enable Register 4
+#define PWMC_EL0MR      (AT91_CAST(AT91_REG *) 	0x0000007C) // (PWMC_EL0MR) PWM Event Line 0 Mode Register
+#define PWMC_EL1MR      (AT91_CAST(AT91_REG *) 	0x00000080) // (PWMC_EL1MR) PWM Event Line 1 Mode Register
+#define PWMC_EL2MR      (AT91_CAST(AT91_REG *) 	0x00000084) // (PWMC_EL2MR) PWM Event Line 2 Mode Register
+#define PWMC_EL3MR      (AT91_CAST(AT91_REG *) 	0x00000088) // (PWMC_EL3MR) PWM Event Line 3 Mode Register
+#define PWMC_EL4MR      (AT91_CAST(AT91_REG *) 	0x0000008C) // (PWMC_EL4MR) PWM Event Line 4 Mode Register
+#define PWMC_EL5MR      (AT91_CAST(AT91_REG *) 	0x00000090) // (PWMC_EL5MR) PWM Event Line 5 Mode Register
+#define PWMC_EL6MR      (AT91_CAST(AT91_REG *) 	0x00000094) // (PWMC_EL6MR) PWM Event Line 6 Mode Register
+#define PWMC_EL7MR      (AT91_CAST(AT91_REG *) 	0x00000098) // (PWMC_EL7MR) PWM Event Line 7 Mode Register
+#define PWMC_WPCR       (AT91_CAST(AT91_REG *) 	0x000000E4) // (PWMC_WPCR) PWM Write Protection Enable Register
+#define PWMC_WPSR       (AT91_CAST(AT91_REG *) 	0x000000E8) // (PWMC_WPSR) PWM Write Protection Status Register
+#define PWMC_ADDRSIZE   (AT91_CAST(AT91_REG *) 	0x000000EC) // (PWMC_ADDRSIZE) PWMC ADDRSIZE REGISTER 
+#define PWMC_IPNAME1    (AT91_CAST(AT91_REG *) 	0x000000F0) // (PWMC_IPNAME1) PWMC IPNAME1 REGISTER 
+#define PWMC_IPNAME2    (AT91_CAST(AT91_REG *) 	0x000000F4) // (PWMC_IPNAME2) PWMC IPNAME2 REGISTER 
+#define PWMC_FEATURES   (AT91_CAST(AT91_REG *) 	0x000000F8) // (PWMC_FEATURES) PWMC FEATURES REGISTER 
+#define PWMC_VER        (AT91_CAST(AT91_REG *) 	0x000000FC) // (PWMC_VER) PWMC Version Register
+#define PWMC_CMP0V      (AT91_CAST(AT91_REG *) 	0x00000130) // (PWMC_CMP0V) PWM Comparison Value 0 Register
+#define PWMC_CMP0VUPD   (AT91_CAST(AT91_REG *) 	0x00000134) // (PWMC_CMP0VUPD) PWM Comparison Value 0 Update Register
+#define PWMC_CMP0M      (AT91_CAST(AT91_REG *) 	0x00000138) // (PWMC_CMP0M) PWM Comparison Mode 0 Register
+#define PWMC_CMP0MUPD   (AT91_CAST(AT91_REG *) 	0x0000013C) // (PWMC_CMP0MUPD) PWM Comparison Mode 0 Update Register
+#define PWMC_CMP1V      (AT91_CAST(AT91_REG *) 	0x00000140) // (PWMC_CMP1V) PWM Comparison Value 1 Register
+#define PWMC_CMP1VUPD   (AT91_CAST(AT91_REG *) 	0x00000144) // (PWMC_CMP1VUPD) PWM Comparison Value 1 Update Register
+#define PWMC_CMP1M      (AT91_CAST(AT91_REG *) 	0x00000148) // (PWMC_CMP1M) PWM Comparison Mode 1 Register
+#define PWMC_CMP1MUPD   (AT91_CAST(AT91_REG *) 	0x0000014C) // (PWMC_CMP1MUPD) PWM Comparison Mode 1 Update Register
+#define PWMC_CMP2V      (AT91_CAST(AT91_REG *) 	0x00000150) // (PWMC_CMP2V) PWM Comparison Value 2 Register
+#define PWMC_CMP2VUPD   (AT91_CAST(AT91_REG *) 	0x00000154) // (PWMC_CMP2VUPD) PWM Comparison Value 2 Update Register
+#define PWMC_CMP2M      (AT91_CAST(AT91_REG *) 	0x00000158) // (PWMC_CMP2M) PWM Comparison Mode 2 Register
+#define PWMC_CMP2MUPD   (AT91_CAST(AT91_REG *) 	0x0000015C) // (PWMC_CMP2MUPD) PWM Comparison Mode 2 Update Register
+#define PWMC_CMP3V      (AT91_CAST(AT91_REG *) 	0x00000160) // (PWMC_CMP3V) PWM Comparison Value 3 Register
+#define PWMC_CMP3VUPD   (AT91_CAST(AT91_REG *) 	0x00000164) // (PWMC_CMP3VUPD) PWM Comparison Value 3 Update Register
+#define PWMC_CMP3M      (AT91_CAST(AT91_REG *) 	0x00000168) // (PWMC_CMP3M) PWM Comparison Mode 3 Register
+#define PWMC_CMP3MUPD   (AT91_CAST(AT91_REG *) 	0x0000016C) // (PWMC_CMP3MUPD) PWM Comparison Mode 3 Update Register
+#define PWMC_CMP4V      (AT91_CAST(AT91_REG *) 	0x00000170) // (PWMC_CMP4V) PWM Comparison Value 4 Register
+#define PWMC_CMP4VUPD   (AT91_CAST(AT91_REG *) 	0x00000174) // (PWMC_CMP4VUPD) PWM Comparison Value 4 Update Register
+#define PWMC_CMP4M      (AT91_CAST(AT91_REG *) 	0x00000178) // (PWMC_CMP4M) PWM Comparison Mode 4 Register
+#define PWMC_CMP4MUPD   (AT91_CAST(AT91_REG *) 	0x0000017C) // (PWMC_CMP4MUPD) PWM Comparison Mode 4 Update Register
+#define PWMC_CMP5V      (AT91_CAST(AT91_REG *) 	0x00000180) // (PWMC_CMP5V) PWM Comparison Value 5 Register
+#define PWMC_CMP5VUPD   (AT91_CAST(AT91_REG *) 	0x00000184) // (PWMC_CMP5VUPD) PWM Comparison Value 5 Update Register
+#define PWMC_CMP5M      (AT91_CAST(AT91_REG *) 	0x00000188) // (PWMC_CMP5M) PWM Comparison Mode 5 Register
+#define PWMC_CMP5MUPD   (AT91_CAST(AT91_REG *) 	0x0000018C) // (PWMC_CMP5MUPD) PWM Comparison Mode 5 Update Register
+#define PWMC_CMP6V      (AT91_CAST(AT91_REG *) 	0x00000190) // (PWMC_CMP6V) PWM Comparison Value 6 Register
+#define PWMC_CMP6VUPD   (AT91_CAST(AT91_REG *) 	0x00000194) // (PWMC_CMP6VUPD) PWM Comparison Value 6 Update Register
+#define PWMC_CMP6M      (AT91_CAST(AT91_REG *) 	0x00000198) // (PWMC_CMP6M) PWM Comparison Mode 6 Register
+#define PWMC_CMP6MUPD   (AT91_CAST(AT91_REG *) 	0x0000019C) // (PWMC_CMP6MUPD) PWM Comparison Mode 6 Update Register
+#define PWMC_CMP7V      (AT91_CAST(AT91_REG *) 	0x000001A0) // (PWMC_CMP7V) PWM Comparison Value 7 Register
+#define PWMC_CMP7VUPD   (AT91_CAST(AT91_REG *) 	0x000001A4) // (PWMC_CMP7VUPD) PWM Comparison Value 7 Update Register
+#define PWMC_CMP7M      (AT91_CAST(AT91_REG *) 	0x000001A8) // (PWMC_CMP7M) PWM Comparison Mode 7 Register
+#define PWMC_CMP7MUPD   (AT91_CAST(AT91_REG *) 	0x000001AC) // (PWMC_CMP7MUPD) PWM Comparison Mode 7 Update Register
+
+#endif
+// -------- PWMC_MR : (PWMC Offset: 0x0) PWMC Mode Register -------- 
+#define AT91C_PWMC_DIVA       (0xFF <<  0) // (PWMC) CLKA divide factor.
+#define AT91C_PWMC_PREA       (0xF <<  8) // (PWMC) Divider Input Clock Prescaler A
+#define 	AT91C_PWMC_PREA_MCK                  (0x0 <<  8) // (PWMC) 
+#define 	AT91C_PWMC_PREA_MCK_DIV_2            (0x1 <<  8) // (PWMC) 
+#define 	AT91C_PWMC_PREA_MCK_DIV_4            (0x2 <<  8) // (PWMC) 
+#define 	AT91C_PWMC_PREA_MCK_DIV_8            (0x3 <<  8) // (PWMC) 
+#define 	AT91C_PWMC_PREA_MCK_DIV_16           (0x4 <<  8) // (PWMC) 
+#define 	AT91C_PWMC_PREA_MCK_DIV_32           (0x5 <<  8) // (PWMC) 
+#define 	AT91C_PWMC_PREA_MCK_DIV_64           (0x6 <<  8) // (PWMC) 
+#define 	AT91C_PWMC_PREA_MCK_DIV_128          (0x7 <<  8) // (PWMC) 
+#define 	AT91C_PWMC_PREA_MCK_DIV_256          (0x8 <<  8) // (PWMC) 
+#define AT91C_PWMC_DIVB       (0xFF << 16) // (PWMC) CLKB divide factor.
+#define AT91C_PWMC_PREB       (0xF << 24) // (PWMC) Divider Input Clock Prescaler B
+#define 	AT91C_PWMC_PREB_MCK                  (0x0 << 24) // (PWMC) 
+#define 	AT91C_PWMC_PREB_MCK_DIV_2            (0x1 << 24) // (PWMC) 
+#define 	AT91C_PWMC_PREB_MCK_DIV_4            (0x2 << 24) // (PWMC) 
+#define 	AT91C_PWMC_PREB_MCK_DIV_8            (0x3 << 24) // (PWMC) 
+#define 	AT91C_PWMC_PREB_MCK_DIV_16           (0x4 << 24) // (PWMC) 
+#define 	AT91C_PWMC_PREB_MCK_DIV_32           (0x5 << 24) // (PWMC) 
+#define 	AT91C_PWMC_PREB_MCK_DIV_64           (0x6 << 24) // (PWMC) 
+#define 	AT91C_PWMC_PREB_MCK_DIV_128          (0x7 << 24) // (PWMC) 
+#define 	AT91C_PWMC_PREB_MCK_DIV_256          (0x8 << 24) // (PWMC) 
+#define AT91C_PWMC_CLKSEL     (0x1 << 31) // (PWMC) CCK Source Clock Selection
+// -------- PWMC_ENA : (PWMC Offset: 0x4) PWMC Enable Register -------- 
+#define AT91C_PWMC_CHID0      (0x1 <<  0) // (PWMC) Channel ID 0
+#define AT91C_PWMC_CHID1      (0x1 <<  1) // (PWMC) Channel ID 1
+#define AT91C_PWMC_CHID2      (0x1 <<  2) // (PWMC) Channel ID 2
+#define AT91C_PWMC_CHID3      (0x1 <<  3) // (PWMC) Channel ID 3
+#define AT91C_PWMC_CHID4      (0x1 <<  4) // (PWMC) Channel ID 4
+#define AT91C_PWMC_CHID5      (0x1 <<  5) // (PWMC) Channel ID 5
+#define AT91C_PWMC_CHID6      (0x1 <<  6) // (PWMC) Channel ID 6
+#define AT91C_PWMC_CHID7      (0x1 <<  7) // (PWMC) Channel ID 7
+#define AT91C_PWMC_CHID8      (0x1 <<  8) // (PWMC) Channel ID 8
+#define AT91C_PWMC_CHID9      (0x1 <<  9) // (PWMC) Channel ID 9
+#define AT91C_PWMC_CHID10     (0x1 << 10) // (PWMC) Channel ID 10
+#define AT91C_PWMC_CHID11     (0x1 << 11) // (PWMC) Channel ID 11
+#define AT91C_PWMC_CHID12     (0x1 << 12) // (PWMC) Channel ID 12
+#define AT91C_PWMC_CHID13     (0x1 << 13) // (PWMC) Channel ID 13
+#define AT91C_PWMC_CHID14     (0x1 << 14) // (PWMC) Channel ID 14
+#define AT91C_PWMC_CHID15     (0x1 << 15) // (PWMC) Channel ID 15
+// -------- PWMC_DIS : (PWMC Offset: 0x8) PWMC Disable Register -------- 
+// -------- PWMC_SR : (PWMC Offset: 0xc) PWMC Status Register -------- 
+// -------- PWMC_IER1 : (PWMC Offset: 0x10) PWMC Interrupt Enable Register -------- 
+#define AT91C_PWMC_FCHID0     (0x1 << 16) // (PWMC) Fault Event Channel ID 0
+#define AT91C_PWMC_FCHID1     (0x1 << 17) // (PWMC) Fault Event Channel ID 1
+#define AT91C_PWMC_FCHID2     (0x1 << 18) // (PWMC) Fault Event Channel ID 2
+#define AT91C_PWMC_FCHID3     (0x1 << 19) // (PWMC) Fault Event Channel ID 3
+#define AT91C_PWMC_FCHID4     (0x1 << 20) // (PWMC) Fault Event Channel ID 4
+#define AT91C_PWMC_FCHID5     (0x1 << 21) // (PWMC) Fault Event Channel ID 5
+#define AT91C_PWMC_FCHID6     (0x1 << 22) // (PWMC) Fault Event Channel ID 6
+#define AT91C_PWMC_FCHID7     (0x1 << 23) // (PWMC) Fault Event Channel ID 7
+#define AT91C_PWMC_FCHID8     (0x1 << 24) // (PWMC) Fault Event Channel ID 8
+#define AT91C_PWMC_FCHID9     (0x1 << 25) // (PWMC) Fault Event Channel ID 9
+#define AT91C_PWMC_FCHID10    (0x1 << 26) // (PWMC) Fault Event Channel ID 10
+#define AT91C_PWMC_FCHID11    (0x1 << 27) // (PWMC) Fault Event Channel ID 11
+#define AT91C_PWMC_FCHID12    (0x1 << 28) // (PWMC) Fault Event Channel ID 12
+#define AT91C_PWMC_FCHID13    (0x1 << 29) // (PWMC) Fault Event Channel ID 13
+#define AT91C_PWMC_FCHID14    (0x1 << 30) // (PWMC) Fault Event Channel ID 14
+#define AT91C_PWMC_FCHID15    (0x1 << 31) // (PWMC) Fault Event Channel ID 15
+// -------- PWMC_IDR1 : (PWMC Offset: 0x14) PWMC Interrupt Disable Register -------- 
+// -------- PWMC_IMR1 : (PWMC Offset: 0x18) PWMC Interrupt Mask Register -------- 
+// -------- PWMC_ISR1 : (PWMC Offset: 0x1c) PWMC Interrupt Status Register -------- 
+// -------- PWMC_SYNC : (PWMC Offset: 0x20) PWMC Synchronous Channels Register -------- 
+#define AT91C_PWMC_SYNC0      (0x1 <<  0) // (PWMC) Synchronous Channel ID 0
+#define AT91C_PWMC_SYNC1      (0x1 <<  1) // (PWMC) Synchronous Channel ID 1
+#define AT91C_PWMC_SYNC2      (0x1 <<  2) // (PWMC) Synchronous Channel ID 2
+#define AT91C_PWMC_SYNC3      (0x1 <<  3) // (PWMC) Synchronous Channel ID 3
+#define AT91C_PWMC_SYNC4      (0x1 <<  4) // (PWMC) Synchronous Channel ID 4
+#define AT91C_PWMC_SYNC5      (0x1 <<  5) // (PWMC) Synchronous Channel ID 5
+#define AT91C_PWMC_SYNC6      (0x1 <<  6) // (PWMC) Synchronous Channel ID 6
+#define AT91C_PWMC_SYNC7      (0x1 <<  7) // (PWMC) Synchronous Channel ID 7
+#define AT91C_PWMC_SYNC8      (0x1 <<  8) // (PWMC) Synchronous Channel ID 8
+#define AT91C_PWMC_SYNC9      (0x1 <<  9) // (PWMC) Synchronous Channel ID 9
+#define AT91C_PWMC_SYNC10     (0x1 << 10) // (PWMC) Synchronous Channel ID 10
+#define AT91C_PWMC_SYNC11     (0x1 << 11) // (PWMC) Synchronous Channel ID 11
+#define AT91C_PWMC_SYNC12     (0x1 << 12) // (PWMC) Synchronous Channel ID 12
+#define AT91C_PWMC_SYNC13     (0x1 << 13) // (PWMC) Synchronous Channel ID 13
+#define AT91C_PWMC_SYNC14     (0x1 << 14) // (PWMC) Synchronous Channel ID 14
+#define AT91C_PWMC_SYNC15     (0x1 << 15) // (PWMC) Synchronous Channel ID 15
+#define AT91C_PWMC_UPDM       (0x3 << 16) // (PWMC) Synchronous Channels Update mode
+#define 	AT91C_PWMC_UPDM_MODE0                (0x0 << 16) // (PWMC) Manual write of data and manual trigger of the update
+#define 	AT91C_PWMC_UPDM_MODE1                (0x1 << 16) // (PWMC) Manual write of data and automatic trigger of the update
+#define 	AT91C_PWMC_UPDM_MODE2                (0x2 << 16) // (PWMC) Automatic write of data and automatic trigger of the update
+// -------- PWMC_UPCR : (PWMC Offset: 0x28) PWMC Update Control Register -------- 
+#define AT91C_PWMC_UPDULOCK   (0x1 <<  0) // (PWMC) Synchronized Channels Duty Cycle Update Unlock
+// -------- PWMC_SCUP : (PWMC Offset: 0x2c) PWM Update Period Register -------- 
+#define AT91C_PWMC_UPR        (0xF <<  0) // (PWMC) PWM Update Period.
+#define AT91C_PWMC_UPRCNT     (0xF <<  4) // (PWMC) PWM Update Period Counter.
+// -------- PWMC_SCUPUPD : (PWMC Offset: 0x30) PWM Update Period Update Register -------- 
+#define AT91C_PWMC_UPVUPDAL   (0xF <<  0) // (PWMC) PWM Update Period Update.
+// -------- PWMC_IER2 : (PWMC Offset: 0x34) PWMC Interrupt Enable Register -------- 
+#define AT91C_PWMC_WRDY       (0x1 <<  0) // (PWMC) PDC Write Ready
+#define AT91C_PWMC_ENDTX      (0x1 <<  1) // (PWMC) PDC End of TX Buffer
+#define AT91C_PWMC_TXBUFE     (0x1 <<  2) // (PWMC) PDC End of TX Buffer
+#define AT91C_PWMC_UNRE       (0x1 <<  3) // (PWMC) PDC End of TX Buffer
+// -------- PWMC_IDR2 : (PWMC Offset: 0x38) PWMC Interrupt Disable Register -------- 
+// -------- PWMC_IMR2 : (PWMC Offset: 0x3c) PWMC Interrupt Mask Register -------- 
+// -------- PWMC_ISR2 : (PWMC Offset: 0x40) PWMC Interrupt Status Register -------- 
+#define AT91C_PWMC_CMPM0      (0x1 <<  8) // (PWMC) Comparison x Match
+#define AT91C_PWMC_CMPM1      (0x1 <<  9) // (PWMC) Comparison x Match
+#define AT91C_PWMC_CMPM2      (0x1 << 10) // (PWMC) Comparison x Match
+#define AT91C_PWMC_CMPM3      (0x1 << 11) // (PWMC) Comparison x Match
+#define AT91C_PWMC_CMPM4      (0x1 << 12) // (PWMC) Comparison x Match
+#define AT91C_PWMC_CMPM5      (0x1 << 13) // (PWMC) Comparison x Match
+#define AT91C_PWMC_CMPM6      (0x1 << 14) // (PWMC) Comparison x Match
+#define AT91C_PWMC_CMPM7      (0x1 << 15) // (PWMC) Comparison x Match
+#define AT91C_PWMC_CMPU0      (0x1 << 16) // (PWMC) Comparison x Update
+#define AT91C_PWMC_CMPU1      (0x1 << 17) // (PWMC) Comparison x Update
+#define AT91C_PWMC_CMPU2      (0x1 << 18) // (PWMC) Comparison x Update
+#define AT91C_PWMC_CMPU3      (0x1 << 19) // (PWMC) Comparison x Update
+#define AT91C_PWMC_CMPU4      (0x1 << 20) // (PWMC) Comparison x Update
+#define AT91C_PWMC_CMPU5      (0x1 << 21) // (PWMC) Comparison x Update
+#define AT91C_PWMC_CMPU6      (0x1 << 22) // (PWMC) Comparison x Update
+#define AT91C_PWMC_CMPU7      (0x1 << 23) // (PWMC) Comparison x Update
+// -------- PWMC_OOV : (PWMC Offset: 0x44) PWM Output Override Value Register -------- 
+#define AT91C_PWMC_OOVH0      (0x1 <<  0) // (PWMC) Output Override Value for PWMH output of the channel 0
+#define AT91C_PWMC_OOVH1      (0x1 <<  1) // (PWMC) Output Override Value for PWMH output of the channel 1
+#define AT91C_PWMC_OOVH2      (0x1 <<  2) // (PWMC) Output Override Value for PWMH output of the channel 2
+#define AT91C_PWMC_OOVH3      (0x1 <<  3) // (PWMC) Output Override Value for PWMH output of the channel 3
+#define AT91C_PWMC_OOVH4      (0x1 <<  4) // (PWMC) Output Override Value for PWMH output of the channel 4
+#define AT91C_PWMC_OOVH5      (0x1 <<  5) // (PWMC) Output Override Value for PWMH output of the channel 5
+#define AT91C_PWMC_OOVH6      (0x1 <<  6) // (PWMC) Output Override Value for PWMH output of the channel 6
+#define AT91C_PWMC_OOVH7      (0x1 <<  7) // (PWMC) Output Override Value for PWMH output of the channel 7
+#define AT91C_PWMC_OOVH8      (0x1 <<  8) // (PWMC) Output Override Value for PWMH output of the channel 8
+#define AT91C_PWMC_OOVH9      (0x1 <<  9) // (PWMC) Output Override Value for PWMH output of the channel 9
+#define AT91C_PWMC_OOVH10     (0x1 << 10) // (PWMC) Output Override Value for PWMH output of the channel 10
+#define AT91C_PWMC_OOVH11     (0x1 << 11) // (PWMC) Output Override Value for PWMH output of the channel 11
+#define AT91C_PWMC_OOVH12     (0x1 << 12) // (PWMC) Output Override Value for PWMH output of the channel 12
+#define AT91C_PWMC_OOVH13     (0x1 << 13) // (PWMC) Output Override Value for PWMH output of the channel 13
+#define AT91C_PWMC_OOVH14     (0x1 << 14) // (PWMC) Output Override Value for PWMH output of the channel 14
+#define AT91C_PWMC_OOVH15     (0x1 << 15) // (PWMC) Output Override Value for PWMH output of the channel 15
+#define AT91C_PWMC_OOVL0      (0x1 << 16) // (PWMC) Output Override Value for PWML output of the channel 0
+#define AT91C_PWMC_OOVL1      (0x1 << 17) // (PWMC) Output Override Value for PWML output of the channel 1
+#define AT91C_PWMC_OOVL2      (0x1 << 18) // (PWMC) Output Override Value for PWML output of the channel 2
+#define AT91C_PWMC_OOVL3      (0x1 << 19) // (PWMC) Output Override Value for PWML output of the channel 3
+#define AT91C_PWMC_OOVL4      (0x1 << 20) // (PWMC) Output Override Value for PWML output of the channel 4
+#define AT91C_PWMC_OOVL5      (0x1 << 21) // (PWMC) Output Override Value for PWML output of the channel 5
+#define AT91C_PWMC_OOVL6      (0x1 << 22) // (PWMC) Output Override Value for PWML output of the channel 6
+#define AT91C_PWMC_OOVL7      (0x1 << 23) // (PWMC) Output Override Value for PWML output of the channel 7
+#define AT91C_PWMC_OOVL8      (0x1 << 24) // (PWMC) Output Override Value for PWML output of the channel 8
+#define AT91C_PWMC_OOVL9      (0x1 << 25) // (PWMC) Output Override Value for PWML output of the channel 9
+#define AT91C_PWMC_OOVL10     (0x1 << 26) // (PWMC) Output Override Value for PWML output of the channel 10
+#define AT91C_PWMC_OOVL11     (0x1 << 27) // (PWMC) Output Override Value for PWML output of the channel 11
+#define AT91C_PWMC_OOVL12     (0x1 << 28) // (PWMC) Output Override Value for PWML output of the channel 12
+#define AT91C_PWMC_OOVL13     (0x1 << 29) // (PWMC) Output Override Value for PWML output of the channel 13
+#define AT91C_PWMC_OOVL14     (0x1 << 30) // (PWMC) Output Override Value for PWML output of the channel 14
+#define AT91C_PWMC_OOVL15     (0x1 << 31) // (PWMC) Output Override Value for PWML output of the channel 15
+// -------- PWMC_OS : (PWMC Offset: 0x48) PWM Output Selection Register -------- 
+#define AT91C_PWMC_OSH0       (0x1 <<  0) // (PWMC) Output Selection for PWMH output of the channel 0
+#define AT91C_PWMC_OSH1       (0x1 <<  1) // (PWMC) Output Selection for PWMH output of the channel 1
+#define AT91C_PWMC_OSH2       (0x1 <<  2) // (PWMC) Output Selection for PWMH output of the channel 2
+#define AT91C_PWMC_OSH3       (0x1 <<  3) // (PWMC) Output Selection for PWMH output of the channel 3
+#define AT91C_PWMC_OSH4       (0x1 <<  4) // (PWMC) Output Selection for PWMH output of the channel 4
+#define AT91C_PWMC_OSH5       (0x1 <<  5) // (PWMC) Output Selection for PWMH output of the channel 5
+#define AT91C_PWMC_OSH6       (0x1 <<  6) // (PWMC) Output Selection for PWMH output of the channel 6
+#define AT91C_PWMC_OSH7       (0x1 <<  7) // (PWMC) Output Selection for PWMH output of the channel 7
+#define AT91C_PWMC_OSH8       (0x1 <<  8) // (PWMC) Output Selection for PWMH output of the channel 8
+#define AT91C_PWMC_OSH9       (0x1 <<  9) // (PWMC) Output Selection for PWMH output of the channel 9
+#define AT91C_PWMC_OSH10      (0x1 << 10) // (PWMC) Output Selection for PWMH output of the channel 10
+#define AT91C_PWMC_OSH11      (0x1 << 11) // (PWMC) Output Selection for PWMH output of the channel 11
+#define AT91C_PWMC_OSH12      (0x1 << 12) // (PWMC) Output Selection for PWMH output of the channel 12
+#define AT91C_PWMC_OSH13      (0x1 << 13) // (PWMC) Output Selection for PWMH output of the channel 13
+#define AT91C_PWMC_OSH14      (0x1 << 14) // (PWMC) Output Selection for PWMH output of the channel 14
+#define AT91C_PWMC_OSH15      (0x1 << 15) // (PWMC) Output Selection for PWMH output of the channel 15
+#define AT91C_PWMC_OSL0       (0x1 << 16) // (PWMC) Output Selection for PWML output of the channel 0
+#define AT91C_PWMC_OSL1       (0x1 << 17) // (PWMC) Output Selection for PWML output of the channel 1
+#define AT91C_PWMC_OSL2       (0x1 << 18) // (PWMC) Output Selection for PWML output of the channel 2
+#define AT91C_PWMC_OSL3       (0x1 << 19) // (PWMC) Output Selection for PWML output of the channel 3
+#define AT91C_PWMC_OSL4       (0x1 << 20) // (PWMC) Output Selection for PWML output of the channel 4
+#define AT91C_PWMC_OSL5       (0x1 << 21) // (PWMC) Output Selection for PWML output of the channel 5
+#define AT91C_PWMC_OSL6       (0x1 << 22) // (PWMC) Output Selection for PWML output of the channel 6
+#define AT91C_PWMC_OSL7       (0x1 << 23) // (PWMC) Output Selection for PWML output of the channel 7
+#define AT91C_PWMC_OSL8       (0x1 << 24) // (PWMC) Output Selection for PWML output of the channel 8
+#define AT91C_PWMC_OSL9       (0x1 << 25) // (PWMC) Output Selection for PWML output of the channel 9
+#define AT91C_PWMC_OSL10      (0x1 << 26) // (PWMC) Output Selection for PWML output of the channel 10
+#define AT91C_PWMC_OSL11      (0x1 << 27) // (PWMC) Output Selection for PWML output of the channel 11
+#define AT91C_PWMC_OSL12      (0x1 << 28) // (PWMC) Output Selection for PWML output of the channel 12
+#define AT91C_PWMC_OSL13      (0x1 << 29) // (PWMC) Output Selection for PWML output of the channel 13
+#define AT91C_PWMC_OSL14      (0x1 << 30) // (PWMC) Output Selection for PWML output of the channel 14
+#define AT91C_PWMC_OSL15      (0x1 << 31) // (PWMC) Output Selection for PWML output of the channel 15
+// -------- PWMC_OSS : (PWMC Offset: 0x4c) PWM Output Selection Set Register -------- 
+#define AT91C_PWMC_OSSH0      (0x1 <<  0) // (PWMC) Output Selection Set for PWMH output of the channel 0
+#define AT91C_PWMC_OSSH1      (0x1 <<  1) // (PWMC) Output Selection Set for PWMH output of the channel 1
+#define AT91C_PWMC_OSSH2      (0x1 <<  2) // (PWMC) Output Selection Set for PWMH output of the channel 2
+#define AT91C_PWMC_OSSH3      (0x1 <<  3) // (PWMC) Output Selection Set for PWMH output of the channel 3
+#define AT91C_PWMC_OSSH4      (0x1 <<  4) // (PWMC) Output Selection Set for PWMH output of the channel 4
+#define AT91C_PWMC_OSSH5      (0x1 <<  5) // (PWMC) Output Selection Set for PWMH output of the channel 5
+#define AT91C_PWMC_OSSH6      (0x1 <<  6) // (PWMC) Output Selection Set for PWMH output of the channel 6
+#define AT91C_PWMC_OSSH7      (0x1 <<  7) // (PWMC) Output Selection Set for PWMH output of the channel 7
+#define AT91C_PWMC_OSSH8      (0x1 <<  8) // (PWMC) Output Selection Set for PWMH output of the channel 8
+#define AT91C_PWMC_OSSH9      (0x1 <<  9) // (PWMC) Output Selection Set for PWMH output of the channel 9
+#define AT91C_PWMC_OSSH10     (0x1 << 10) // (PWMC) Output Selection Set for PWMH output of the channel 10
+#define AT91C_PWMC_OSSH11     (0x1 << 11) // (PWMC) Output Selection Set for PWMH output of the channel 11
+#define AT91C_PWMC_OSSH12     (0x1 << 12) // (PWMC) Output Selection Set for PWMH output of the channel 12
+#define AT91C_PWMC_OSSH13     (0x1 << 13) // (PWMC) Output Selection Set for PWMH output of the channel 13
+#define AT91C_PWMC_OSSH14     (0x1 << 14) // (PWMC) Output Selection Set for PWMH output of the channel 14
+#define AT91C_PWMC_OSSH15     (0x1 << 15) // (PWMC) Output Selection Set for PWMH output of the channel 15
+#define AT91C_PWMC_OSSL0      (0x1 << 16) // (PWMC) Output Selection Set for PWML output of the channel 0
+#define AT91C_PWMC_OSSL1      (0x1 << 17) // (PWMC) Output Selection Set for PWML output of the channel 1
+#define AT91C_PWMC_OSSL2      (0x1 << 18) // (PWMC) Output Selection Set for PWML output of the channel 2
+#define AT91C_PWMC_OSSL3      (0x1 << 19) // (PWMC) Output Selection Set for PWML output of the channel 3
+#define AT91C_PWMC_OSSL4      (0x1 << 20) // (PWMC) Output Selection Set for PWML output of the channel 4
+#define AT91C_PWMC_OSSL5      (0x1 << 21) // (PWMC) Output Selection Set for PWML output of the channel 5
+#define AT91C_PWMC_OSSL6      (0x1 << 22) // (PWMC) Output Selection Set for PWML output of the channel 6
+#define AT91C_PWMC_OSSL7      (0x1 << 23) // (PWMC) Output Selection Set for PWML output of the channel 7
+#define AT91C_PWMC_OSSL8      (0x1 << 24) // (PWMC) Output Selection Set for PWML output of the channel 8
+#define AT91C_PWMC_OSSL9      (0x1 << 25) // (PWMC) Output Selection Set for PWML output of the channel 9
+#define AT91C_PWMC_OSSL10     (0x1 << 26) // (PWMC) Output Selection Set for PWML output of the channel 10
+#define AT91C_PWMC_OSSL11     (0x1 << 27) // (PWMC) Output Selection Set for PWML output of the channel 11
+#define AT91C_PWMC_OSSL12     (0x1 << 28) // (PWMC) Output Selection Set for PWML output of the channel 12
+#define AT91C_PWMC_OSSL13     (0x1 << 29) // (PWMC) Output Selection Set for PWML output of the channel 13
+#define AT91C_PWMC_OSSL14     (0x1 << 30) // (PWMC) Output Selection Set for PWML output of the channel 14
+#define AT91C_PWMC_OSSL15     (0x1 << 31) // (PWMC) Output Selection Set for PWML output of the channel 15
+// -------- PWMC_OSC : (PWMC Offset: 0x50) PWM Output Selection Clear Register -------- 
+#define AT91C_PWMC_OSCH0      (0x1 <<  0) // (PWMC) Output Selection Clear for PWMH output of the channel 0
+#define AT91C_PWMC_OSCH1      (0x1 <<  1) // (PWMC) Output Selection Clear for PWMH output of the channel 1
+#define AT91C_PWMC_OSCH2      (0x1 <<  2) // (PWMC) Output Selection Clear for PWMH output of the channel 2
+#define AT91C_PWMC_OSCH3      (0x1 <<  3) // (PWMC) Output Selection Clear for PWMH output of the channel 3
+#define AT91C_PWMC_OSCH4      (0x1 <<  4) // (PWMC) Output Selection Clear for PWMH output of the channel 4
+#define AT91C_PWMC_OSCH5      (0x1 <<  5) // (PWMC) Output Selection Clear for PWMH output of the channel 5
+#define AT91C_PWMC_OSCH6      (0x1 <<  6) // (PWMC) Output Selection Clear for PWMH output of the channel 6
+#define AT91C_PWMC_OSCH7      (0x1 <<  7) // (PWMC) Output Selection Clear for PWMH output of the channel 7
+#define AT91C_PWMC_OSCH8      (0x1 <<  8) // (PWMC) Output Selection Clear for PWMH output of the channel 8
+#define AT91C_PWMC_OSCH9      (0x1 <<  9) // (PWMC) Output Selection Clear for PWMH output of the channel 9
+#define AT91C_PWMC_OSCH10     (0x1 << 10) // (PWMC) Output Selection Clear for PWMH output of the channel 10
+#define AT91C_PWMC_OSCH11     (0x1 << 11) // (PWMC) Output Selection Clear for PWMH output of the channel 11
+#define AT91C_PWMC_OSCH12     (0x1 << 12) // (PWMC) Output Selection Clear for PWMH output of the channel 12
+#define AT91C_PWMC_OSCH13     (0x1 << 13) // (PWMC) Output Selection Clear for PWMH output of the channel 13
+#define AT91C_PWMC_OSCH14     (0x1 << 14) // (PWMC) Output Selection Clear for PWMH output of the channel 14
+#define AT91C_PWMC_OSCH15     (0x1 << 15) // (PWMC) Output Selection Clear for PWMH output of the channel 15
+#define AT91C_PWMC_OSCL0      (0x1 << 16) // (PWMC) Output Selection Clear for PWML output of the channel 0
+#define AT91C_PWMC_OSCL1      (0x1 << 17) // (PWMC) Output Selection Clear for PWML output of the channel 1
+#define AT91C_PWMC_OSCL2      (0x1 << 18) // (PWMC) Output Selection Clear for PWML output of the channel 2
+#define AT91C_PWMC_OSCL3      (0x1 << 19) // (PWMC) Output Selection Clear for PWML output of the channel 3
+#define AT91C_PWMC_OSCL4      (0x1 << 20) // (PWMC) Output Selection Clear for PWML output of the channel 4
+#define AT91C_PWMC_OSCL5      (0x1 << 21) // (PWMC) Output Selection Clear for PWML output of the channel 5
+#define AT91C_PWMC_OSCL6      (0x1 << 22) // (PWMC) Output Selection Clear for PWML output of the channel 6
+#define AT91C_PWMC_OSCL7      (0x1 << 23) // (PWMC) Output Selection Clear for PWML output of the channel 7
+#define AT91C_PWMC_OSCL8      (0x1 << 24) // (PWMC) Output Selection Clear for PWML output of the channel 8
+#define AT91C_PWMC_OSCL9      (0x1 << 25) // (PWMC) Output Selection Clear for PWML output of the channel 9
+#define AT91C_PWMC_OSCL10     (0x1 << 26) // (PWMC) Output Selection Clear for PWML output of the channel 10
+#define AT91C_PWMC_OSCL11     (0x1 << 27) // (PWMC) Output Selection Clear for PWML output of the channel 11
+#define AT91C_PWMC_OSCL12     (0x1 << 28) // (PWMC) Output Selection Clear for PWML output of the channel 12
+#define AT91C_PWMC_OSCL13     (0x1 << 29) // (PWMC) Output Selection Clear for PWML output of the channel 13
+#define AT91C_PWMC_OSCL14     (0x1 << 30) // (PWMC) Output Selection Clear for PWML output of the channel 14
+#define AT91C_PWMC_OSCL15     (0x1 << 31) // (PWMC) Output Selection Clear for PWML output of the channel 15
+// -------- PWMC_OSSUPD : (PWMC Offset: 0x54) Output Selection Set for PWMH / PWML output of the channel x -------- 
+#define AT91C_PWMC_OSSUPDH0   (0x1 <<  0) // (PWMC) Output Selection Set for PWMH output of the channel 0
+#define AT91C_PWMC_OSSUPDH1   (0x1 <<  1) // (PWMC) Output Selection Set for PWMH output of the channel 1
+#define AT91C_PWMC_OSSUPDH2   (0x1 <<  2) // (PWMC) Output Selection Set for PWMH output of the channel 2
+#define AT91C_PWMC_OSSUPDH3   (0x1 <<  3) // (PWMC) Output Selection Set for PWMH output of the channel 3
+#define AT91C_PWMC_OSSUPDH4   (0x1 <<  4) // (PWMC) Output Selection Set for PWMH output of the channel 4
+#define AT91C_PWMC_OSSUPDH5   (0x1 <<  5) // (PWMC) Output Selection Set for PWMH output of the channel 5
+#define AT91C_PWMC_OSSUPDH6   (0x1 <<  6) // (PWMC) Output Selection Set for PWMH output of the channel 6
+#define AT91C_PWMC_OSSUPDH7   (0x1 <<  7) // (PWMC) Output Selection Set for PWMH output of the channel 7
+#define AT91C_PWMC_OSSUPDH8   (0x1 <<  8) // (PWMC) Output Selection Set for PWMH output of the channel 8
+#define AT91C_PWMC_OSSUPDH9   (0x1 <<  9) // (PWMC) Output Selection Set for PWMH output of the channel 9
+#define AT91C_PWMC_OSSUPDH10  (0x1 << 10) // (PWMC) Output Selection Set for PWMH output of the channel 10
+#define AT91C_PWMC_OSSUPDH11  (0x1 << 11) // (PWMC) Output Selection Set for PWMH output of the channel 11
+#define AT91C_PWMC_OSSUPDH12  (0x1 << 12) // (PWMC) Output Selection Set for PWMH output of the channel 12
+#define AT91C_PWMC_OSSUPDH13  (0x1 << 13) // (PWMC) Output Selection Set for PWMH output of the channel 13
+#define AT91C_PWMC_OSSUPDH14  (0x1 << 14) // (PWMC) Output Selection Set for PWMH output of the channel 14
+#define AT91C_PWMC_OSSUPDH15  (0x1 << 15) // (PWMC) Output Selection Set for PWMH output of the channel 15
+#define AT91C_PWMC_OSSUPDL0   (0x1 << 16) // (PWMC) Output Selection Set for PWML output of the channel 0
+#define AT91C_PWMC_OSSUPDL1   (0x1 << 17) // (PWMC) Output Selection Set for PWML output of the channel 1
+#define AT91C_PWMC_OSSUPDL2   (0x1 << 18) // (PWMC) Output Selection Set for PWML output of the channel 2
+#define AT91C_PWMC_OSSUPDL3   (0x1 << 19) // (PWMC) Output Selection Set for PWML output of the channel 3
+#define AT91C_PWMC_OSSUPDL4   (0x1 << 20) // (PWMC) Output Selection Set for PWML output of the channel 4
+#define AT91C_PWMC_OSSUPDL5   (0x1 << 21) // (PWMC) Output Selection Set for PWML output of the channel 5
+#define AT91C_PWMC_OSSUPDL6   (0x1 << 22) // (PWMC) Output Selection Set for PWML output of the channel 6
+#define AT91C_PWMC_OSSUPDL7   (0x1 << 23) // (PWMC) Output Selection Set for PWML output of the channel 7
+#define AT91C_PWMC_OSSUPDL8   (0x1 << 24) // (PWMC) Output Selection Set for PWML output of the channel 8
+#define AT91C_PWMC_OSSUPDL9   (0x1 << 25) // (PWMC) Output Selection Set for PWML output of the channel 9
+#define AT91C_PWMC_OSSUPDL10  (0x1 << 26) // (PWMC) Output Selection Set for PWML output of the channel 10
+#define AT91C_PWMC_OSSUPDL11  (0x1 << 27) // (PWMC) Output Selection Set for PWML output of the channel 11
+#define AT91C_PWMC_OSSUPDL12  (0x1 << 28) // (PWMC) Output Selection Set for PWML output of the channel 12
+#define AT91C_PWMC_OSSUPDL13  (0x1 << 29) // (PWMC) Output Selection Set for PWML output of the channel 13
+#define AT91C_PWMC_OSSUPDL14  (0x1 << 30) // (PWMC) Output Selection Set for PWML output of the channel 14
+#define AT91C_PWMC_OSSUPDL15  (0x1 << 31) // (PWMC) Output Selection Set for PWML output of the channel 15
+// -------- PWMC_OSCUPD : (PWMC Offset: 0x58) Output Selection Clear for PWMH / PWML output of the channel x -------- 
+#define AT91C_PWMC_OSCUPDH0   (0x1 <<  0) // (PWMC) Output Selection Clear for PWMH output of the channel 0
+#define AT91C_PWMC_OSCUPDH1   (0x1 <<  1) // (PWMC) Output Selection Clear for PWMH output of the channel 1
+#define AT91C_PWMC_OSCUPDH2   (0x1 <<  2) // (PWMC) Output Selection Clear for PWMH output of the channel 2
+#define AT91C_PWMC_OSCUPDH3   (0x1 <<  3) // (PWMC) Output Selection Clear for PWMH output of the channel 3
+#define AT91C_PWMC_OSCUPDH4   (0x1 <<  4) // (PWMC) Output Selection Clear for PWMH output of the channel 4
+#define AT91C_PWMC_OSCUPDH5   (0x1 <<  5) // (PWMC) Output Selection Clear for PWMH output of the channel 5
+#define AT91C_PWMC_OSCUPDH6   (0x1 <<  6) // (PWMC) Output Selection Clear for PWMH output of the channel 6
+#define AT91C_PWMC_OSCUPDH7   (0x1 <<  7) // (PWMC) Output Selection Clear for PWMH output of the channel 7
+#define AT91C_PWMC_OSCUPDH8   (0x1 <<  8) // (PWMC) Output Selection Clear for PWMH output of the channel 8
+#define AT91C_PWMC_OSCUPDH9   (0x1 <<  9) // (PWMC) Output Selection Clear for PWMH output of the channel 9
+#define AT91C_PWMC_OSCUPDH10  (0x1 << 10) // (PWMC) Output Selection Clear for PWMH output of the channel 10
+#define AT91C_PWMC_OSCUPDH11  (0x1 << 11) // (PWMC) Output Selection Clear for PWMH output of the channel 11
+#define AT91C_PWMC_OSCUPDH12  (0x1 << 12) // (PWMC) Output Selection Clear for PWMH output of the channel 12
+#define AT91C_PWMC_OSCUPDH13  (0x1 << 13) // (PWMC) Output Selection Clear for PWMH output of the channel 13
+#define AT91C_PWMC_OSCUPDH14  (0x1 << 14) // (PWMC) Output Selection Clear for PWMH output of the channel 14
+#define AT91C_PWMC_OSCUPDH15  (0x1 << 15) // (PWMC) Output Selection Clear for PWMH output of the channel 15
+#define AT91C_PWMC_OSCUPDL0   (0x1 << 16) // (PWMC) Output Selection Clear for PWML output of the channel 0
+#define AT91C_PWMC_OSCUPDL1   (0x1 << 17) // (PWMC) Output Selection Clear for PWML output of the channel 1
+#define AT91C_PWMC_OSCUPDL2   (0x1 << 18) // (PWMC) Output Selection Clear for PWML output of the channel 2
+#define AT91C_PWMC_OSCUPDL3   (0x1 << 19) // (PWMC) Output Selection Clear for PWML output of the channel 3
+#define AT91C_PWMC_OSCUPDL4   (0x1 << 20) // (PWMC) Output Selection Clear for PWML output of the channel 4
+#define AT91C_PWMC_OSCUPDL5   (0x1 << 21) // (PWMC) Output Selection Clear for PWML output of the channel 5
+#define AT91C_PWMC_OSCUPDL6   (0x1 << 22) // (PWMC) Output Selection Clear for PWML output of the channel 6
+#define AT91C_PWMC_OSCUPDL7   (0x1 << 23) // (PWMC) Output Selection Clear for PWML output of the channel 7
+#define AT91C_PWMC_OSCUPDL8   (0x1 << 24) // (PWMC) Output Selection Clear for PWML output of the channel 8
+#define AT91C_PWMC_OSCUPDL9   (0x1 << 25) // (PWMC) Output Selection Clear for PWML output of the channel 9
+#define AT91C_PWMC_OSCUPDL10  (0x1 << 26) // (PWMC) Output Selection Clear for PWML output of the channel 10
+#define AT91C_PWMC_OSCUPDL11  (0x1 << 27) // (PWMC) Output Selection Clear for PWML output of the channel 11
+#define AT91C_PWMC_OSCUPDL12  (0x1 << 28) // (PWMC) Output Selection Clear for PWML output of the channel 12
+#define AT91C_PWMC_OSCUPDL13  (0x1 << 29) // (PWMC) Output Selection Clear for PWML output of the channel 13
+#define AT91C_PWMC_OSCUPDL14  (0x1 << 30) // (PWMC) Output Selection Clear for PWML output of the channel 14
+#define AT91C_PWMC_OSCUPDL15  (0x1 << 31) // (PWMC) Output Selection Clear for PWML output of the channel 15
+// -------- PWMC_FMR : (PWMC Offset: 0x5c) PWM Fault Mode Register -------- 
+#define AT91C_PWMC_FPOL0      (0x1 <<  0) // (PWMC) Fault Polarity on fault input 0
+#define AT91C_PWMC_FPOL1      (0x1 <<  1) // (PWMC) Fault Polarity on fault input 1
+#define AT91C_PWMC_FPOL2      (0x1 <<  2) // (PWMC) Fault Polarity on fault input 2
+#define AT91C_PWMC_FPOL3      (0x1 <<  3) // (PWMC) Fault Polarity on fault input 3
+#define AT91C_PWMC_FPOL4      (0x1 <<  4) // (PWMC) Fault Polarity on fault input 4
+#define AT91C_PWMC_FPOL5      (0x1 <<  5) // (PWMC) Fault Polarity on fault input 5
+#define AT91C_PWMC_FPOL6      (0x1 <<  6) // (PWMC) Fault Polarity on fault input 6
+#define AT91C_PWMC_FPOL7      (0x1 <<  7) // (PWMC) Fault Polarity on fault input 7
+#define AT91C_PWMC_FMOD0      (0x1 <<  8) // (PWMC) Fault Activation Mode on fault input 0
+#define AT91C_PWMC_FMOD1      (0x1 <<  9) // (PWMC) Fault Activation Mode on fault input 1
+#define AT91C_PWMC_FMOD2      (0x1 << 10) // (PWMC) Fault Activation Mode on fault input 2
+#define AT91C_PWMC_FMOD3      (0x1 << 11) // (PWMC) Fault Activation Mode on fault input 3
+#define AT91C_PWMC_FMOD4      (0x1 << 12) // (PWMC) Fault Activation Mode on fault input 4
+#define AT91C_PWMC_FMOD5      (0x1 << 13) // (PWMC) Fault Activation Mode on fault input 5
+#define AT91C_PWMC_FMOD6      (0x1 << 14) // (PWMC) Fault Activation Mode on fault input 6
+#define AT91C_PWMC_FMOD7      (0x1 << 15) // (PWMC) Fault Activation Mode on fault input 7
+#define AT91C_PWMC_FFIL00     (0x1 << 16) // (PWMC) Fault Filtering on fault input 0
+#define AT91C_PWMC_FFIL01     (0x1 << 17) // (PWMC) Fault Filtering on fault input 1
+#define AT91C_PWMC_FFIL02     (0x1 << 18) // (PWMC) Fault Filtering on fault input 2
+#define AT91C_PWMC_FFIL03     (0x1 << 19) // (PWMC) Fault Filtering on fault input 3
+#define AT91C_PWMC_FFIL04     (0x1 << 20) // (PWMC) Fault Filtering on fault input 4
+#define AT91C_PWMC_FFIL05     (0x1 << 21) // (PWMC) Fault Filtering on fault input 5
+#define AT91C_PWMC_FFIL06     (0x1 << 22) // (PWMC) Fault Filtering on fault input 6
+#define AT91C_PWMC_FFIL07     (0x1 << 23) // (PWMC) Fault Filtering on fault input 7
+// -------- PWMC_FSR : (PWMC Offset: 0x60) Fault Input x Value -------- 
+#define AT91C_PWMC_FIV0       (0x1 <<  0) // (PWMC) Fault Input 0 Value
+#define AT91C_PWMC_FIV1       (0x1 <<  1) // (PWMC) Fault Input 1 Value
+#define AT91C_PWMC_FIV2       (0x1 <<  2) // (PWMC) Fault Input 2 Value
+#define AT91C_PWMC_FIV3       (0x1 <<  3) // (PWMC) Fault Input 3 Value
+#define AT91C_PWMC_FIV4       (0x1 <<  4) // (PWMC) Fault Input 4 Value
+#define AT91C_PWMC_FIV5       (0x1 <<  5) // (PWMC) Fault Input 5 Value
+#define AT91C_PWMC_FIV6       (0x1 <<  6) // (PWMC) Fault Input 6 Value
+#define AT91C_PWMC_FIV7       (0x1 <<  7) // (PWMC) Fault Input 7 Value
+#define AT91C_PWMC_FS0        (0x1 <<  8) // (PWMC) Fault 0 Status
+#define AT91C_PWMC_FS1        (0x1 <<  9) // (PWMC) Fault 1 Status
+#define AT91C_PWMC_FS2        (0x1 << 10) // (PWMC) Fault 2 Status
+#define AT91C_PWMC_FS3        (0x1 << 11) // (PWMC) Fault 3 Status
+#define AT91C_PWMC_FS4        (0x1 << 12) // (PWMC) Fault 4 Status
+#define AT91C_PWMC_FS5        (0x1 << 13) // (PWMC) Fault 5 Status
+#define AT91C_PWMC_FS6        (0x1 << 14) // (PWMC) Fault 6 Status
+#define AT91C_PWMC_FS7        (0x1 << 15) // (PWMC) Fault 7 Status
+// -------- PWMC_FCR : (PWMC Offset: 0x64) Fault y Clear -------- 
+#define AT91C_PWMC_FCLR0      (0x1 <<  0) // (PWMC) Fault 0 Clear
+#define AT91C_PWMC_FCLR1      (0x1 <<  1) // (PWMC) Fault 1 Clear
+#define AT91C_PWMC_FCLR2      (0x1 <<  2) // (PWMC) Fault 2 Clear
+#define AT91C_PWMC_FCLR3      (0x1 <<  3) // (PWMC) Fault 3 Clear
+#define AT91C_PWMC_FCLR4      (0x1 <<  4) // (PWMC) Fault 4 Clear
+#define AT91C_PWMC_FCLR5      (0x1 <<  5) // (PWMC) Fault 5 Clear
+#define AT91C_PWMC_FCLR6      (0x1 <<  6) // (PWMC) Fault 6 Clear
+#define AT91C_PWMC_FCLR7      (0x1 <<  7) // (PWMC) Fault 7 Clear
+// -------- PWMC_FPV : (PWMC Offset: 0x68) PWM Fault Protection Value -------- 
+#define AT91C_PWMC_FPVH0      (0x1 <<  0) // (PWMC) Fault Protection Value for PWMH output on channel 0
+#define AT91C_PWMC_FPVH1      (0x1 <<  1) // (PWMC) Fault Protection Value for PWMH output on channel 1
+#define AT91C_PWMC_FPVH2      (0x1 <<  2) // (PWMC) Fault Protection Value for PWMH output on channel 2
+#define AT91C_PWMC_FPVH3      (0x1 <<  3) // (PWMC) Fault Protection Value for PWMH output on channel 3
+#define AT91C_PWMC_FPVH4      (0x1 <<  4) // (PWMC) Fault Protection Value for PWMH output on channel 4
+#define AT91C_PWMC_FPVH5      (0x1 <<  5) // (PWMC) Fault Protection Value for PWMH output on channel 5
+#define AT91C_PWMC_FPVH6      (0x1 <<  6) // (PWMC) Fault Protection Value for PWMH output on channel 6
+#define AT91C_PWMC_FPVH7      (0x1 <<  7) // (PWMC) Fault Protection Value for PWMH output on channel 7
+#define AT91C_PWMC_FPVL0      (0x1 << 16) // (PWMC) Fault Protection Value for PWML output on channel 0
+#define AT91C_PWMC_FPVL1      (0x1 << 17) // (PWMC) Fault Protection Value for PWML output on channel 1
+#define AT91C_PWMC_FPVL2      (0x1 << 18) // (PWMC) Fault Protection Value for PWML output on channel 2
+#define AT91C_PWMC_FPVL3      (0x1 << 19) // (PWMC) Fault Protection Value for PWML output on channel 3
+#define AT91C_PWMC_FPVL4      (0x1 << 20) // (PWMC) Fault Protection Value for PWML output on channel 4
+#define AT91C_PWMC_FPVL5      (0x1 << 21) // (PWMC) Fault Protection Value for PWML output on channel 5
+#define AT91C_PWMC_FPVL6      (0x1 << 22) // (PWMC) Fault Protection Value for PWML output on channel 6
+#define AT91C_PWMC_FPVL7      (0x1 << 23) // (PWMC) Fault Protection Value for PWML output on channel 7
+// -------- PWMC_FPER1 : (PWMC Offset: 0x6c) PWM Fault Protection Enable Register 1 -------- 
+#define AT91C_PWMC_FPE0       (0xFF <<  0) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 0
+#define AT91C_PWMC_FPE1       (0xFF <<  8) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 1
+#define AT91C_PWMC_FPE2       (0xFF << 16) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 2
+#define AT91C_PWMC_FPE3       (0xFF << 24) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 3
+// -------- PWMC_FPER2 : (PWMC Offset: 0x70) PWM Fault Protection Enable Register 2 -------- 
+#define AT91C_PWMC_FPE4       (0xFF <<  0) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 4
+#define AT91C_PWMC_FPE5       (0xFF <<  8) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 5
+#define AT91C_PWMC_FPE6       (0xFF << 16) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 6
+#define AT91C_PWMC_FPE7       (0xFF << 24) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 7
+// -------- PWMC_FPER3 : (PWMC Offset: 0x74) PWM Fault Protection Enable Register 3 -------- 
+#define AT91C_PWMC_FPE8       (0xFF <<  0) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 8
+#define AT91C_PWMC_FPE9       (0xFF <<  8) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 9
+#define AT91C_PWMC_FPE10      (0xFF << 16) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 10
+#define AT91C_PWMC_FPE11      (0xFF << 24) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 11
+// -------- PWMC_FPER4 : (PWMC Offset: 0x78) PWM Fault Protection Enable Register 4 -------- 
+#define AT91C_PWMC_FPE12      (0xFF <<  0) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 12
+#define AT91C_PWMC_FPE13      (0xFF <<  8) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 13
+#define AT91C_PWMC_FPE14      (0xFF << 16) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 14
+#define AT91C_PWMC_FPE15      (0xFF << 24) // (PWMC) Fault Protection Enable with Fault Input y for PWM channel 15
+// -------- PWMC_EL0MR : (PWMC Offset: 0x7c) PWM Event Line 0 Mode Register -------- 
+#define AT91C_PWMC_L0CSEL0    (0x1 <<  0) // (PWMC) Comparison 0 Selection
+#define AT91C_PWMC_L0CSEL1    (0x1 <<  1) // (PWMC) Comparison 1 Selection
+#define AT91C_PWMC_L0CSEL2    (0x1 <<  2) // (PWMC) Comparison 2 Selection
+#define AT91C_PWMC_L0CSEL3    (0x1 <<  3) // (PWMC) Comparison 3 Selection
+#define AT91C_PWMC_L0CSEL4    (0x1 <<  4) // (PWMC) Comparison 4 Selection
+#define AT91C_PWMC_L0CSEL5    (0x1 <<  5) // (PWMC) Comparison 5 Selection
+#define AT91C_PWMC_L0CSEL6    (0x1 <<  6) // (PWMC) Comparison 6 Selection
+#define AT91C_PWMC_L0CSEL7    (0x1 <<  7) // (PWMC) Comparison 7 Selection
+// -------- PWMC_EL1MR : (PWMC Offset: 0x80) PWM Event Line 1 Mode Register -------- 
+#define AT91C_PWMC_L1CSEL0    (0x1 <<  0) // (PWMC) Comparison 0 Selection
+#define AT91C_PWMC_L1CSEL1    (0x1 <<  1) // (PWMC) Comparison 1 Selection
+#define AT91C_PWMC_L1CSEL2    (0x1 <<  2) // (PWMC) Comparison 2 Selection
+#define AT91C_PWMC_L1CSEL3    (0x1 <<  3) // (PWMC) Comparison 3 Selection
+#define AT91C_PWMC_L1CSEL4    (0x1 <<  4) // (PWMC) Comparison 4 Selection
+#define AT91C_PWMC_L1CSEL5    (0x1 <<  5) // (PWMC) Comparison 5 Selection
+#define AT91C_PWMC_L1CSEL6    (0x1 <<  6) // (PWMC) Comparison 6 Selection
+#define AT91C_PWMC_L1CSEL7    (0x1 <<  7) // (PWMC) Comparison 7 Selection
+// -------- PWMC_EL2MR : (PWMC Offset: 0x84) PWM Event line 2 Mode Register -------- 
+#define AT91C_PWMC_L2CSEL0    (0x1 <<  0) // (PWMC) Comparison 0 Selection
+#define AT91C_PWMC_L2CSEL1    (0x1 <<  1) // (PWMC) Comparison 1 Selection
+#define AT91C_PWMC_L2CSEL2    (0x1 <<  2) // (PWMC) Comparison 2 Selection
+#define AT91C_PWMC_L2CSEL3    (0x1 <<  3) // (PWMC) Comparison 3 Selection
+#define AT91C_PWMC_L2CSEL4    (0x1 <<  4) // (PWMC) Comparison 4 Selection
+#define AT91C_PWMC_L2CSEL5    (0x1 <<  5) // (PWMC) Comparison 5 Selection
+#define AT91C_PWMC_L2CSEL6    (0x1 <<  6) // (PWMC) Comparison 6 Selection
+#define AT91C_PWMC_L2CSEL7    (0x1 <<  7) // (PWMC) Comparison 7 Selection
+// -------- PWMC_EL3MR : (PWMC Offset: 0x88) PWM Event line 3 Mode Register -------- 
+#define AT91C_PWMC_L3CSEL0    (0x1 <<  0) // (PWMC) Comparison 0 Selection
+#define AT91C_PWMC_L3CSEL1    (0x1 <<  1) // (PWMC) Comparison 1 Selection
+#define AT91C_PWMC_L3CSEL2    (0x1 <<  2) // (PWMC) Comparison 2 Selection
+#define AT91C_PWMC_L3CSEL3    (0x1 <<  3) // (PWMC) Comparison 3 Selection
+#define AT91C_PWMC_L3CSEL4    (0x1 <<  4) // (PWMC) Comparison 4 Selection
+#define AT91C_PWMC_L3CSEL5    (0x1 <<  5) // (PWMC) Comparison 5 Selection
+#define AT91C_PWMC_L3CSEL6    (0x1 <<  6) // (PWMC) Comparison 6 Selection
+#define AT91C_PWMC_L3CSEL7    (0x1 <<  7) // (PWMC) Comparison 7 Selection
+// -------- PWMC_EL4MR : (PWMC Offset: 0x8c) PWM Event line 4 Mode Register -------- 
+#define AT91C_PWMC_L4CSEL0    (0x1 <<  0) // (PWMC) Comparison 0 Selection
+#define AT91C_PWMC_L4CSEL1    (0x1 <<  1) // (PWMC) Comparison 1 Selection
+#define AT91C_PWMC_L4CSEL2    (0x1 <<  2) // (PWMC) Comparison 2 Selection
+#define AT91C_PWMC_L4CSEL3    (0x1 <<  3) // (PWMC) Comparison 3 Selection
+#define AT91C_PWMC_L4CSEL4    (0x1 <<  4) // (PWMC) Comparison 4 Selection
+#define AT91C_PWMC_L4CSEL5    (0x1 <<  5) // (PWMC) Comparison 5 Selection
+#define AT91C_PWMC_L4CSEL6    (0x1 <<  6) // (PWMC) Comparison 6 Selection
+#define AT91C_PWMC_L4CSEL7    (0x1 <<  7) // (PWMC) Comparison 7 Selection
+// -------- PWMC_EL5MR : (PWMC Offset: 0x90) PWM Event line 5 Mode Register -------- 
+#define AT91C_PWMC_L5CSEL0    (0x1 <<  0) // (PWMC) Comparison 0 Selection
+#define AT91C_PWMC_L5CSEL1    (0x1 <<  1) // (PWMC) Comparison 1 Selection
+#define AT91C_PWMC_L5CSEL2    (0x1 <<  2) // (PWMC) Comparison 2 Selection
+#define AT91C_PWMC_L5CSEL3    (0x1 <<  3) // (PWMC) Comparison 3 Selection
+#define AT91C_PWMC_L5CSEL4    (0x1 <<  4) // (PWMC) Comparison 4 Selection
+#define AT91C_PWMC_L5CSEL5    (0x1 <<  5) // (PWMC) Comparison 5 Selection
+#define AT91C_PWMC_L5CSEL6    (0x1 <<  6) // (PWMC) Comparison 6 Selection
+#define AT91C_PWMC_L5CSEL7    (0x1 <<  7) // (PWMC) Comparison 7 Selection
+// -------- PWMC_EL6MR : (PWMC Offset: 0x94) PWM Event line 6 Mode Register -------- 
+#define AT91C_PWMC_L6CSEL0    (0x1 <<  0) // (PWMC) Comparison 0 Selection
+#define AT91C_PWMC_L6CSEL1    (0x1 <<  1) // (PWMC) Comparison 1 Selection
+#define AT91C_PWMC_L6CSEL2    (0x1 <<  2) // (PWMC) Comparison 2 Selection
+#define AT91C_PWMC_L6CSEL3    (0x1 <<  3) // (PWMC) Comparison 3 Selection
+#define AT91C_PWMC_L6CSEL4    (0x1 <<  4) // (PWMC) Comparison 4 Selection
+#define AT91C_PWMC_L6CSEL5    (0x1 <<  5) // (PWMC) Comparison 5 Selection
+#define AT91C_PWMC_L6CSEL6    (0x1 <<  6) // (PWMC) Comparison 6 Selection
+#define AT91C_PWMC_L6CSEL7    (0x1 <<  7) // (PWMC) Comparison 7 Selection
+// -------- PWMC_EL7MR : (PWMC Offset: 0x98) PWM Event line 7 Mode Register -------- 
+#define AT91C_PWMC_L7CSEL0    (0x1 <<  0) // (PWMC) Comparison 0 Selection
+#define AT91C_PWMC_L7CSEL1    (0x1 <<  1) // (PWMC) Comparison 1 Selection
+#define AT91C_PWMC_L7CSEL2    (0x1 <<  2) // (PWMC) Comparison 2 Selection
+#define AT91C_PWMC_L7CSEL3    (0x1 <<  3) // (PWMC) Comparison 3 Selection
+#define AT91C_PWMC_L7CSEL4    (0x1 <<  4) // (PWMC) Comparison 4 Selection
+#define AT91C_PWMC_L7CSEL5    (0x1 <<  5) // (PWMC) Comparison 5 Selection
+#define AT91C_PWMC_L7CSEL6    (0x1 <<  6) // (PWMC) Comparison 6 Selection
+#define AT91C_PWMC_L7CSEL7    (0x1 <<  7) // (PWMC) Comparison 7 Selection
+// -------- PWMC_WPCR : (PWMC Offset: 0xe4) PWM Write Protection Control Register -------- 
+#define AT91C_PWMC_WPCMD      (0x3 <<  0) // (PWMC) Write Protection Command
+#define AT91C_PWMC_WPRG0      (0x1 <<  2) // (PWMC) Write Protect Register Group 0
+#define AT91C_PWMC_WPRG1      (0x1 <<  3) // (PWMC) Write Protect Register Group 1
+#define AT91C_PWMC_WPRG2      (0x1 <<  4) // (PWMC) Write Protect Register Group 2
+#define AT91C_PWMC_WPRG3      (0x1 <<  5) // (PWMC) Write Protect Register Group 3
+#define AT91C_PWMC_WPRG4      (0x1 <<  6) // (PWMC) Write Protect Register Group 4
+#define AT91C_PWMC_WPRG5      (0x1 <<  7) // (PWMC) Write Protect Register Group 5
+#define AT91C_PWMC_WPKEY      (0xFFFFFF <<  8) // (PWMC) Protection Password
+// -------- PWMC_WPVS : (PWMC Offset: 0xe8) Write Protection Status Register -------- 
+#define AT91C_PWMC_WPSWS0     (0x1 <<  0) // (PWMC) Write Protect SW Group 0 Status 
+#define AT91C_PWMC_WPSWS1     (0x1 <<  1) // (PWMC) Write Protect SW Group 1 Status 
+#define AT91C_PWMC_WPSWS2     (0x1 <<  2) // (PWMC) Write Protect SW Group 2 Status 
+#define AT91C_PWMC_WPSWS3     (0x1 <<  3) // (PWMC) Write Protect SW Group 3 Status 
+#define AT91C_PWMC_WPSWS4     (0x1 <<  4) // (PWMC) Write Protect SW Group 4 Status 
+#define AT91C_PWMC_WPSWS5     (0x1 <<  5) // (PWMC) Write Protect SW Group 5 Status 
+#define AT91C_PWMC_WPVS       (0x1 <<  7) // (PWMC) Write Protection Enable
+#define AT91C_PWMC_WPHWS0     (0x1 <<  8) // (PWMC) Write Protect HW Group 0 Status 
+#define AT91C_PWMC_WPHWS1     (0x1 <<  9) // (PWMC) Write Protect HW Group 1 Status 
+#define AT91C_PWMC_WPHWS2     (0x1 << 10) // (PWMC) Write Protect HW Group 2 Status 
+#define AT91C_PWMC_WPHWS3     (0x1 << 11) // (PWMC) Write Protect HW Group 3 Status 
+#define AT91C_PWMC_WPHWS4     (0x1 << 12) // (PWMC) Write Protect HW Group 4 Status 
+#define AT91C_PWMC_WPHWS5     (0x1 << 13) // (PWMC) Write Protect HW Group 5 Status 
+#define AT91C_PWMC_WPVSRC     (0xFFFF << 16) // (PWMC) Write Protection Violation Source
+// -------- PWMC_CMP0V : (PWMC Offset: 0x130) PWM Comparison Value 0 Register -------- 
+#define AT91C_PWMC_CV         (0xFFFFFF <<  0) // (PWMC) PWM Comparison Value 0.
+#define AT91C_PWMC_CVM        (0x1 << 24) // (PWMC) Comparison Value 0 Mode.
+// -------- PWMC_CMP0VUPD : (PWMC Offset: 0x134) PWM Comparison Value 0 Update Register -------- 
+#define AT91C_PWMC_CVUPD      (0xFFFFFF <<  0) // (PWMC) PWM Comparison Value Update.
+#define AT91C_PWMC_CVMUPD     (0x1 << 24) // (PWMC) Comparison Value Update Mode.
+// -------- PWMC_CMP0M : (PWMC Offset: 0x138) PWM Comparison 0 Mode Register -------- 
+#define AT91C_PWMC_CEN        (0x1 <<  0) // (PWMC) Comparison Enable.
+#define AT91C_PWMC_CTR        (0xF <<  4) // (PWMC) PWM Comparison Trigger.
+#define AT91C_PWMC_CPR        (0xF <<  8) // (PWMC) PWM Comparison Period.
+#define AT91C_PWMC_CPRCNT     (0xF << 12) // (PWMC) PWM Comparison Period Counter.
+#define AT91C_PWMC_CUPR       (0xF << 16) // (PWMC) PWM Comparison Update Period.
+#define AT91C_PWMC_CUPRCNT    (0xF << 20) // (PWMC) PWM Comparison Update Period Counter.
+// -------- PWMC_CMP0MUPD : (PWMC Offset: 0x13c) PWM Comparison 0 Mode Update Register -------- 
+#define AT91C_PWMC_CENUPD     (0x1 <<  0) // (PWMC) Comparison Enable Update.
+#define AT91C_PWMC_CTRUPD     (0xF <<  4) // (PWMC) PWM Comparison Trigger Update.
+#define AT91C_PWMC_CPRUPD     (0xF <<  8) // (PWMC) PWM Comparison Period Update.
+#define AT91C_PWMC_CUPRUPD    (0xF << 16) // (PWMC) PWM Comparison Update Period Update.
+// -------- PWMC_CMP1V : (PWMC Offset: 0x140) PWM Comparison Value 1 Register -------- 
+// -------- PWMC_CMP1VUPD : (PWMC Offset: 0x144) PWM Comparison Value 1 Update Register -------- 
+// -------- PWMC_CMP1M : (PWMC Offset: 0x148) PWM Comparison 1 Mode Register -------- 
+// -------- PWMC_CMP1MUPD : (PWMC Offset: 0x14c) PWM Comparison 1 Mode Update Register -------- 
+// -------- PWMC_CMP2V : (PWMC Offset: 0x150) PWM Comparison Value 2 Register -------- 
+// -------- PWMC_CMP2VUPD : (PWMC Offset: 0x154) PWM Comparison Value 2 Update Register -------- 
+// -------- PWMC_CMP2M : (PWMC Offset: 0x158) PWM Comparison 2 Mode Register -------- 
+// -------- PWMC_CMP2MUPD : (PWMC Offset: 0x15c) PWM Comparison 2 Mode Update Register -------- 
+// -------- PWMC_CMP3V : (PWMC Offset: 0x160) PWM Comparison Value 3 Register -------- 
+// -------- PWMC_CMP3VUPD : (PWMC Offset: 0x164) PWM Comparison Value 3 Update Register -------- 
+// -------- PWMC_CMP3M : (PWMC Offset: 0x168) PWM Comparison 3 Mode Register -------- 
+// -------- PWMC_CMP3MUPD : (PWMC Offset: 0x16c) PWM Comparison 3 Mode Update Register -------- 
+// -------- PWMC_CMP4V : (PWMC Offset: 0x170) PWM Comparison Value 4 Register -------- 
+// -------- PWMC_CMP4VUPD : (PWMC Offset: 0x174) PWM Comparison Value 4 Update Register -------- 
+// -------- PWMC_CMP4M : (PWMC Offset: 0x178) PWM Comparison 4 Mode Register -------- 
+// -------- PWMC_CMP4MUPD : (PWMC Offset: 0x17c) PWM Comparison 4 Mode Update Register -------- 
+// -------- PWMC_CMP5V : (PWMC Offset: 0x180) PWM Comparison Value 5 Register -------- 
+// -------- PWMC_CMP5VUPD : (PWMC Offset: 0x184) PWM Comparison Value 5 Update Register -------- 
+// -------- PWMC_CMP5M : (PWMC Offset: 0x188) PWM Comparison 5 Mode Register -------- 
+// -------- PWMC_CMP5MUPD : (PWMC Offset: 0x18c) PWM Comparison 5 Mode Update Register -------- 
+// -------- PWMC_CMP6V : (PWMC Offset: 0x190) PWM Comparison Value 6 Register -------- 
+// -------- PWMC_CMP6VUPD : (PWMC Offset: 0x194) PWM Comparison Value 6 Update Register -------- 
+// -------- PWMC_CMP6M : (PWMC Offset: 0x198) PWM Comparison 6 Mode Register -------- 
+// -------- PWMC_CMP6MUPD : (PWMC Offset: 0x19c) PWM Comparison 6 Mode Update Register -------- 
+// -------- PWMC_CMP7V : (PWMC Offset: 0x1a0) PWM Comparison Value 7 Register -------- 
+// -------- PWMC_CMP7VUPD : (PWMC Offset: 0x1a4) PWM Comparison Value 7 Update Register -------- 
+// -------- PWMC_CMP7M : (PWMC Offset: 0x1a8) PWM Comparison 7 Mode Register -------- 
+// -------- PWMC_CMP7MUPD : (PWMC Offset: 0x1ac) PWM Comparison 7 Mode Update Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Serial Parallel Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_SPI {
+	AT91_REG	 SPI_CR; 	// Control Register
+	AT91_REG	 SPI_MR; 	// Mode Register
+	AT91_REG	 SPI_RDR; 	// Receive Data Register
+	AT91_REG	 SPI_TDR; 	// Transmit Data Register
+	AT91_REG	 SPI_SR; 	// Status Register
+	AT91_REG	 SPI_IER; 	// Interrupt Enable Register
+	AT91_REG	 SPI_IDR; 	// Interrupt Disable Register
+	AT91_REG	 SPI_IMR; 	// Interrupt Mask Register
+	AT91_REG	 Reserved0[4]; 	// 
+	AT91_REG	 SPI_CSR[4]; 	// Chip Select Register
+	AT91_REG	 Reserved1[43]; 	// 
+	AT91_REG	 SPI_ADDRSIZE; 	// SPI ADDRSIZE REGISTER 
+	AT91_REG	 SPI_IPNAME1; 	// SPI IPNAME1 REGISTER 
+	AT91_REG	 SPI_IPNAME2; 	// SPI IPNAME2 REGISTER 
+	AT91_REG	 SPI_FEATURES; 	// SPI FEATURES REGISTER 
+	AT91_REG	 SPI_VER; 	// Version Register
+} AT91S_SPI, *AT91PS_SPI;
+#else
+#define SPI_CR          (AT91_CAST(AT91_REG *) 	0x00000000) // (SPI_CR) Control Register
+#define SPI_MR          (AT91_CAST(AT91_REG *) 	0x00000004) // (SPI_MR) Mode Register
+#define SPI_RDR         (AT91_CAST(AT91_REG *) 	0x00000008) // (SPI_RDR) Receive Data Register
+#define SPI_TDR         (AT91_CAST(AT91_REG *) 	0x0000000C) // (SPI_TDR) Transmit Data Register
+#define SPI_SR          (AT91_CAST(AT91_REG *) 	0x00000010) // (SPI_SR) Status Register
+#define SPI_IER         (AT91_CAST(AT91_REG *) 	0x00000014) // (SPI_IER) Interrupt Enable Register
+#define SPI_IDR         (AT91_CAST(AT91_REG *) 	0x00000018) // (SPI_IDR) Interrupt Disable Register
+#define SPI_IMR         (AT91_CAST(AT91_REG *) 	0x0000001C) // (SPI_IMR) Interrupt Mask Register
+#define SPI_CSR         (AT91_CAST(AT91_REG *) 	0x00000030) // (SPI_CSR) Chip Select Register
+#define SPI_ADDRSIZE    (AT91_CAST(AT91_REG *) 	0x000000EC) // (SPI_ADDRSIZE) SPI ADDRSIZE REGISTER 
+#define SPI_IPNAME1     (AT91_CAST(AT91_REG *) 	0x000000F0) // (SPI_IPNAME1) SPI IPNAME1 REGISTER 
+#define SPI_IPNAME2     (AT91_CAST(AT91_REG *) 	0x000000F4) // (SPI_IPNAME2) SPI IPNAME2 REGISTER 
+#define SPI_FEATURES    (AT91_CAST(AT91_REG *) 	0x000000F8) // (SPI_FEATURES) SPI FEATURES REGISTER 
+#define SPI_VER         (AT91_CAST(AT91_REG *) 	0x000000FC) // (SPI_VER) Version Register
+
+#endif
+// -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register -------- 
+#define AT91C_SPI_SPIEN       (0x1 <<  0) // (SPI) SPI Enable
+#define AT91C_SPI_SPIDIS      (0x1 <<  1) // (SPI) SPI Disable
+#define AT91C_SPI_SWRST       (0x1 <<  7) // (SPI) SPI Software reset
+#define AT91C_SPI_LASTXFER    (0x1 << 24) // (SPI) SPI Last Transfer
+// -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register -------- 
+#define AT91C_SPI_MSTR        (0x1 <<  0) // (SPI) Master/Slave Mode
+#define AT91C_SPI_PS          (0x1 <<  1) // (SPI) Peripheral Select
+#define 	AT91C_SPI_PS_FIXED                (0x0 <<  1) // (SPI) Fixed Peripheral Select
+#define 	AT91C_SPI_PS_VARIABLE             (0x1 <<  1) // (SPI) Variable Peripheral Select
+#define AT91C_SPI_PCSDEC      (0x1 <<  2) // (SPI) Chip Select Decode
+#define AT91C_SPI_FDIV        (0x1 <<  3) // (SPI) Clock Selection
+#define AT91C_SPI_MODFDIS     (0x1 <<  4) // (SPI) Mode Fault Detection
+#define AT91C_SPI_LLB         (0x1 <<  7) // (SPI) Clock Selection
+#define AT91C_SPI_PCS         (0xF << 16) // (SPI) Peripheral Chip Select
+#define AT91C_SPI_DLYBCS      (0xFF << 24) // (SPI) Delay Between Chip Selects
+// -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register -------- 
+#define AT91C_SPI_RD          (0xFFFF <<  0) // (SPI) Receive Data
+#define AT91C_SPI_RPCS        (0xF << 16) // (SPI) Peripheral Chip Select Status
+// -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register -------- 
+#define AT91C_SPI_TD          (0xFFFF <<  0) // (SPI) Transmit Data
+#define AT91C_SPI_TPCS        (0xF << 16) // (SPI) Peripheral Chip Select Status
+// -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- 
+#define AT91C_SPI_RDRF        (0x1 <<  0) // (SPI) Receive Data Register Full
+#define AT91C_SPI_TDRE        (0x1 <<  1) // (SPI) Transmit Data Register Empty
+#define AT91C_SPI_MODF        (0x1 <<  2) // (SPI) Mode Fault Error
+#define AT91C_SPI_OVRES       (0x1 <<  3) // (SPI) Overrun Error Status
+#define AT91C_SPI_ENDRX       (0x1 <<  4) // (SPI) End of Receiver Transfer
+#define AT91C_SPI_ENDTX       (0x1 <<  5) // (SPI) End of Receiver Transfer
+#define AT91C_SPI_RXBUFF      (0x1 <<  6) // (SPI) RXBUFF Interrupt
+#define AT91C_SPI_TXBUFE      (0x1 <<  7) // (SPI) TXBUFE Interrupt
+#define AT91C_SPI_NSSR        (0x1 <<  8) // (SPI) NSSR Interrupt
+#define AT91C_SPI_TXEMPTY     (0x1 <<  9) // (SPI) TXEMPTY Interrupt
+#define AT91C_SPI_SPIENS      (0x1 << 16) // (SPI) Enable Status
+// -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- 
+// -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- 
+// -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- 
+// -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- 
+#define AT91C_SPI_CPOL        (0x1 <<  0) // (SPI) Clock Polarity
+#define AT91C_SPI_NCPHA       (0x1 <<  1) // (SPI) Clock Phase
+#define AT91C_SPI_CSNAAT      (0x1 <<  2) // (SPI) Chip Select Not Active After Transfer (Ignored if CSAAT = 1)
+#define AT91C_SPI_CSAAT       (0x1 <<  3) // (SPI) Chip Select Active After Transfer
+#define AT91C_SPI_BITS        (0xF <<  4) // (SPI) Bits Per Transfer
+#define 	AT91C_SPI_BITS_8                    (0x0 <<  4) // (SPI) 8 Bits Per transfer
+#define 	AT91C_SPI_BITS_9                    (0x1 <<  4) // (SPI) 9 Bits Per transfer
+#define 	AT91C_SPI_BITS_10                   (0x2 <<  4) // (SPI) 10 Bits Per transfer
+#define 	AT91C_SPI_BITS_11                   (0x3 <<  4) // (SPI) 11 Bits Per transfer
+#define 	AT91C_SPI_BITS_12                   (0x4 <<  4) // (SPI) 12 Bits Per transfer
+#define 	AT91C_SPI_BITS_13                   (0x5 <<  4) // (SPI) 13 Bits Per transfer
+#define 	AT91C_SPI_BITS_14                   (0x6 <<  4) // (SPI) 14 Bits Per transfer
+#define 	AT91C_SPI_BITS_15                   (0x7 <<  4) // (SPI) 15 Bits Per transfer
+#define 	AT91C_SPI_BITS_16                   (0x8 <<  4) // (SPI) 16 Bits Per transfer
+#define AT91C_SPI_SCBR        (0xFF <<  8) // (SPI) Serial Clock Baud Rate
+#define AT91C_SPI_DLYBS       (0xFF << 16) // (SPI) Serial Clock Baud Rate
+#define AT91C_SPI_DLYBCT      (0xFF << 24) // (SPI) Delay Between Consecutive Transfers
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR UDPHS Enpoint FIFO data register
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_UDPHS_EPTFIFO {
+	AT91_REG	 UDPHS_READEPT0[16384]; 	// FIFO Endpoint Data Register 0
+	AT91_REG	 UDPHS_READEPT1[16384]; 	// FIFO Endpoint Data Register 1
+	AT91_REG	 UDPHS_READEPT2[16384]; 	// FIFO Endpoint Data Register 2
+	AT91_REG	 UDPHS_READEPT3[16384]; 	// FIFO Endpoint Data Register 3
+	AT91_REG	 UDPHS_READEPT4[16384]; 	// FIFO Endpoint Data Register 4
+	AT91_REG	 UDPHS_READEPT5[16384]; 	// FIFO Endpoint Data Register 5
+	AT91_REG	 UDPHS_READEPT6[16384]; 	// FIFO Endpoint Data Register 6
+} AT91S_UDPHS_EPTFIFO, *AT91PS_UDPHS_EPTFIFO;
+#else
+#define UDPHS_READEPT0  (AT91_CAST(AT91_REG *) 	0x00000000) // (UDPHS_READEPT0) FIFO Endpoint Data Register 0
+#define UDPHS_READEPT1  (AT91_CAST(AT91_REG *) 	0x00010000) // (UDPHS_READEPT1) FIFO Endpoint Data Register 1
+#define UDPHS_READEPT2  (AT91_CAST(AT91_REG *) 	0x00020000) // (UDPHS_READEPT2) FIFO Endpoint Data Register 2
+#define UDPHS_READEPT3  (AT91_CAST(AT91_REG *) 	0x00030000) // (UDPHS_READEPT3) FIFO Endpoint Data Register 3
+#define UDPHS_READEPT4  (AT91_CAST(AT91_REG *) 	0x00040000) // (UDPHS_READEPT4) FIFO Endpoint Data Register 4
+#define UDPHS_READEPT5  (AT91_CAST(AT91_REG *) 	0x00050000) // (UDPHS_READEPT5) FIFO Endpoint Data Register 5
+#define UDPHS_READEPT6  (AT91_CAST(AT91_REG *) 	0x00060000) // (UDPHS_READEPT6) FIFO Endpoint Data Register 6
+
+#endif
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR UDPHS Endpoint struct
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_UDPHS_EPT {
+	AT91_REG	 UDPHS_EPTCFG; 	// UDPHS Endpoint Config Register
+	AT91_REG	 UDPHS_EPTCTLENB; 	// UDPHS Endpoint Control Enable Register
+	AT91_REG	 UDPHS_EPTCTLDIS; 	// UDPHS Endpoint Control Disable Register
+	AT91_REG	 UDPHS_EPTCTL; 	// UDPHS Endpoint Control Register
+	AT91_REG	 Reserved0[1]; 	// 
+	AT91_REG	 UDPHS_EPTSETSTA; 	// UDPHS Endpoint Set Status Register
+	AT91_REG	 UDPHS_EPTCLRSTA; 	// UDPHS Endpoint Clear Status Register
+	AT91_REG	 UDPHS_EPTSTA; 	// UDPHS Endpoint Status Register
+} AT91S_UDPHS_EPT, *AT91PS_UDPHS_EPT;
+#else
+#define UDPHS_EPTCFG    (AT91_CAST(AT91_REG *) 	0x00000000) // (UDPHS_EPTCFG) UDPHS Endpoint Config Register
+#define UDPHS_EPTCTLENB (AT91_CAST(AT91_REG *) 	0x00000004) // (UDPHS_EPTCTLENB) UDPHS Endpoint Control Enable Register
+#define UDPHS_EPTCTLDIS (AT91_CAST(AT91_REG *) 	0x00000008) // (UDPHS_EPTCTLDIS) UDPHS Endpoint Control Disable Register
+#define UDPHS_EPTCTL    (AT91_CAST(AT91_REG *) 	0x0000000C) // (UDPHS_EPTCTL) UDPHS Endpoint Control Register
+#define UDPHS_EPTSETSTA (AT91_CAST(AT91_REG *) 	0x00000014) // (UDPHS_EPTSETSTA) UDPHS Endpoint Set Status Register
+#define UDPHS_EPTCLRSTA (AT91_CAST(AT91_REG *) 	0x00000018) // (UDPHS_EPTCLRSTA) UDPHS Endpoint Clear Status Register
+#define UDPHS_EPTSTA    (AT91_CAST(AT91_REG *) 	0x0000001C) // (UDPHS_EPTSTA) UDPHS Endpoint Status Register
+
+#endif
+// -------- UDPHS_EPTCFG : (UDPHS_EPT Offset: 0x0) UDPHS Endpoint Config Register -------- 
+#define AT91C_UDPHS_EPT_SIZE  (0x7 <<  0) // (UDPHS_EPT) Endpoint Size
+#define 	AT91C_UDPHS_EPT_SIZE_8                    (0x0) // (UDPHS_EPT)    8 bytes
+#define 	AT91C_UDPHS_EPT_SIZE_16                   (0x1) // (UDPHS_EPT)   16 bytes
+#define 	AT91C_UDPHS_EPT_SIZE_32                   (0x2) // (UDPHS_EPT)   32 bytes
+#define 	AT91C_UDPHS_EPT_SIZE_64                   (0x3) // (UDPHS_EPT)   64 bytes
+#define 	AT91C_UDPHS_EPT_SIZE_128                  (0x4) // (UDPHS_EPT)  128 bytes
+#define 	AT91C_UDPHS_EPT_SIZE_256                  (0x5) // (UDPHS_EPT)  256 bytes (if possible)
+#define 	AT91C_UDPHS_EPT_SIZE_512                  (0x6) // (UDPHS_EPT)  512 bytes (if possible)
+#define 	AT91C_UDPHS_EPT_SIZE_1024                 (0x7) // (UDPHS_EPT) 1024 bytes (if possible)
+#define AT91C_UDPHS_EPT_DIR   (0x1 <<  3) // (UDPHS_EPT) Endpoint Direction 0:OUT, 1:IN
+#define 	AT91C_UDPHS_EPT_DIR_OUT                  (0x0 <<  3) // (UDPHS_EPT) Direction OUT
+#define 	AT91C_UDPHS_EPT_DIR_IN                   (0x1 <<  3) // (UDPHS_EPT) Direction IN
+#define AT91C_UDPHS_EPT_TYPE  (0x3 <<  4) // (UDPHS_EPT) Endpoint Type
+#define 	AT91C_UDPHS_EPT_TYPE_CTL_EPT              (0x0 <<  4) // (UDPHS_EPT) Control endpoint
+#define 	AT91C_UDPHS_EPT_TYPE_ISO_EPT              (0x1 <<  4) // (UDPHS_EPT) Isochronous endpoint
+#define 	AT91C_UDPHS_EPT_TYPE_BUL_EPT              (0x2 <<  4) // (UDPHS_EPT) Bulk endpoint
+#define 	AT91C_UDPHS_EPT_TYPE_INT_EPT              (0x3 <<  4) // (UDPHS_EPT) Interrupt endpoint
+#define AT91C_UDPHS_BK_NUMBER (0x3 <<  6) // (UDPHS_EPT) Number of Banks
+#define 	AT91C_UDPHS_BK_NUMBER_0                    (0x0 <<  6) // (UDPHS_EPT) Zero Bank, the EndPoint is not mapped in memory
+#define 	AT91C_UDPHS_BK_NUMBER_1                    (0x1 <<  6) // (UDPHS_EPT) One Bank (Bank0)
+#define 	AT91C_UDPHS_BK_NUMBER_2                    (0x2 <<  6) // (UDPHS_EPT) Double bank (Ping-Pong : Bank0 / Bank1)
+#define 	AT91C_UDPHS_BK_NUMBER_3                    (0x3 <<  6) // (UDPHS_EPT) Triple Bank (Bank0 / Bank1 / Bank2) (if possible)
+#define AT91C_UDPHS_NB_TRANS  (0x3 <<  8) // (UDPHS_EPT) Number Of Transaction per Micro-Frame (High-Bandwidth iso only)
+#define AT91C_UDPHS_EPT_MAPD  (0x1 << 31) // (UDPHS_EPT) Endpoint Mapped (read only
+// -------- UDPHS_EPTCTLENB : (UDPHS_EPT Offset: 0x4) UDPHS Endpoint Control Enable Register -------- 
+#define AT91C_UDPHS_EPT_ENABL (0x1 <<  0) // (UDPHS_EPT) Endpoint Enable
+#define AT91C_UDPHS_AUTO_VALID (0x1 <<  1) // (UDPHS_EPT) Packet Auto-Valid Enable/Disable
+#define AT91C_UDPHS_INTDIS_DMA (0x1 <<  3) // (UDPHS_EPT) Endpoint Interrupts DMA Request Enable/Disable
+#define AT91C_UDPHS_NYET_DIS  (0x1 <<  4) // (UDPHS_EPT) NYET Enable/Disable
+#define AT91C_UDPHS_DATAX_RX  (0x1 <<  6) // (UDPHS_EPT) DATAx Interrupt Enable/Disable
+#define AT91C_UDPHS_MDATA_RX  (0x1 <<  7) // (UDPHS_EPT) MDATA Interrupt Enabled/Disable
+#define AT91C_UDPHS_ERR_OVFLW (0x1 <<  8) // (UDPHS_EPT) OverFlow Error Interrupt Enable/Disable/Status
+#define AT91C_UDPHS_RX_BK_RDY (0x1 <<  9) // (UDPHS_EPT) Received OUT Data
+#define AT91C_UDPHS_TX_COMPLT (0x1 << 10) // (UDPHS_EPT) Transmitted IN Data Complete Interrupt Enable/Disable or Transmitted IN Data Complete (clear)
+#define AT91C_UDPHS_ERR_TRANS (0x1 << 11) // (UDPHS_EPT) Transaction Error Interrupt Enable/Disable
+#define AT91C_UDPHS_TX_PK_RDY (0x1 << 11) // (UDPHS_EPT) TX Packet Ready Interrupt Enable/Disable
+#define AT91C_UDPHS_RX_SETUP  (0x1 << 12) // (UDPHS_EPT) Received SETUP Interrupt Enable/Disable
+#define AT91C_UDPHS_ERR_FL_ISO (0x1 << 12) // (UDPHS_EPT) Error Flow Clear/Interrupt Enable/Disable
+#define AT91C_UDPHS_STALL_SNT (0x1 << 13) // (UDPHS_EPT) Stall Sent Clear
+#define AT91C_UDPHS_ERR_CRISO (0x1 << 13) // (UDPHS_EPT) CRC error / Error NB Trans / Interrupt Enable/Disable
+#define AT91C_UDPHS_NAK_IN    (0x1 << 14) // (UDPHS_EPT) NAKIN ERROR FLUSH / Clear / Interrupt Enable/Disable
+#define AT91C_UDPHS_NAK_OUT   (0x1 << 15) // (UDPHS_EPT) NAKOUT / Clear / Interrupt Enable/Disable
+#define AT91C_UDPHS_BUSY_BANK (0x1 << 18) // (UDPHS_EPT) Busy Bank Interrupt Enable/Disable
+#define AT91C_UDPHS_SHRT_PCKT (0x1 << 31) // (UDPHS_EPT) Short Packet / Interrupt Enable/Disable
+// -------- UDPHS_EPTCTLDIS : (UDPHS_EPT Offset: 0x8) UDPHS Endpoint Control Disable Register -------- 
+#define AT91C_UDPHS_EPT_DISABL (0x1 <<  0) // (UDPHS_EPT) Endpoint Disable
+// -------- UDPHS_EPTCTL : (UDPHS_EPT Offset: 0xc) UDPHS Endpoint Control Register -------- 
+// -------- UDPHS_EPTSETSTA : (UDPHS_EPT Offset: 0x14) UDPHS Endpoint Set Status Register -------- 
+#define AT91C_UDPHS_FRCESTALL (0x1 <<  5) // (UDPHS_EPT) Stall Handshake Request Set/Clear/Status
+#define AT91C_UDPHS_KILL_BANK (0x1 <<  9) // (UDPHS_EPT) KILL Bank
+// -------- UDPHS_EPTCLRSTA : (UDPHS_EPT Offset: 0x18) UDPHS Endpoint Clear Status Register -------- 
+#define AT91C_UDPHS_TOGGLESQ  (0x1 <<  6) // (UDPHS_EPT) Data Toggle Clear
+// -------- UDPHS_EPTSTA : (UDPHS_EPT Offset: 0x1c) UDPHS Endpoint Status Register -------- 
+#define AT91C_UDPHS_TOGGLESQ_STA (0x3 <<  6) // (UDPHS_EPT) Toggle Sequencing
+#define 	AT91C_UDPHS_TOGGLESQ_STA_00                   (0x0 <<  6) // (UDPHS_EPT) Data0
+#define 	AT91C_UDPHS_TOGGLESQ_STA_01                   (0x1 <<  6) // (UDPHS_EPT) Data1
+#define 	AT91C_UDPHS_TOGGLESQ_STA_10                   (0x2 <<  6) // (UDPHS_EPT) Data2 (only for High-Bandwidth Isochronous EndPoint)
+#define 	AT91C_UDPHS_TOGGLESQ_STA_11                   (0x3 <<  6) // (UDPHS_EPT) MData (only for High-Bandwidth Isochronous EndPoint)
+#define AT91C_UDPHS_CONTROL_DIR (0x3 << 16) // (UDPHS_EPT) 
+#define 	AT91C_UDPHS_CONTROL_DIR_00                   (0x0 << 16) // (UDPHS_EPT) Bank 0
+#define 	AT91C_UDPHS_CONTROL_DIR_01                   (0x1 << 16) // (UDPHS_EPT) Bank 1
+#define 	AT91C_UDPHS_CONTROL_DIR_10                   (0x2 << 16) // (UDPHS_EPT) Bank 2
+#define 	AT91C_UDPHS_CONTROL_DIR_11                   (0x3 << 16) // (UDPHS_EPT) Invalid
+#define AT91C_UDPHS_CURRENT_BANK (0x3 << 16) // (UDPHS_EPT) 
+#define 	AT91C_UDPHS_CURRENT_BANK_00                   (0x0 << 16) // (UDPHS_EPT) Bank 0
+#define 	AT91C_UDPHS_CURRENT_BANK_01                   (0x1 << 16) // (UDPHS_EPT) Bank 1
+#define 	AT91C_UDPHS_CURRENT_BANK_10                   (0x2 << 16) // (UDPHS_EPT) Bank 2
+#define 	AT91C_UDPHS_CURRENT_BANK_11                   (0x3 << 16) // (UDPHS_EPT) Invalid
+#define AT91C_UDPHS_BUSY_BANK_STA (0x3 << 18) // (UDPHS_EPT) Busy Bank Number
+#define 	AT91C_UDPHS_BUSY_BANK_STA_00                   (0x0 << 18) // (UDPHS_EPT) All banks are free
+#define 	AT91C_UDPHS_BUSY_BANK_STA_01                   (0x1 << 18) // (UDPHS_EPT) 1 busy bank
+#define 	AT91C_UDPHS_BUSY_BANK_STA_10                   (0x2 << 18) // (UDPHS_EPT) 2 busy banks
+#define 	AT91C_UDPHS_BUSY_BANK_STA_11                   (0x3 << 18) // (UDPHS_EPT) 3 busy banks (if possible)
+#define AT91C_UDPHS_BYTE_COUNT (0x7FF << 20) // (UDPHS_EPT) UDPHS Byte Count
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR UDPHS DMA struct
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_UDPHS_DMA {
+	AT91_REG	 UDPHS_DMANXTDSC; 	// UDPHS DMA Channel Next Descriptor Address
+	AT91_REG	 UDPHS_DMAADDRESS; 	// UDPHS DMA Channel Address Register
+	AT91_REG	 UDPHS_DMACONTROL; 	// UDPHS DMA Channel Control Register
+	AT91_REG	 UDPHS_DMASTATUS; 	// UDPHS DMA Channel Status Register
+} AT91S_UDPHS_DMA, *AT91PS_UDPHS_DMA;
+#else
+#define UDPHS_DMANXTDSC (AT91_CAST(AT91_REG *) 	0x00000000) // (UDPHS_DMANXTDSC) UDPHS DMA Channel Next Descriptor Address
+#define UDPHS_DMAADDRESS (AT91_CAST(AT91_REG *) 	0x00000004) // (UDPHS_DMAADDRESS) UDPHS DMA Channel Address Register
+#define UDPHS_DMACONTROL (AT91_CAST(AT91_REG *) 	0x00000008) // (UDPHS_DMACONTROL) UDPHS DMA Channel Control Register
+#define UDPHS_DMASTATUS (AT91_CAST(AT91_REG *) 	0x0000000C) // (UDPHS_DMASTATUS) UDPHS DMA Channel Status Register
+
+#endif
+// -------- UDPHS_DMANXTDSC : (UDPHS_DMA Offset: 0x0) UDPHS DMA Next Descriptor Address Register -------- 
+#define AT91C_UDPHS_NXT_DSC_ADD (0xFFFFFFF <<  4) // (UDPHS_DMA) next Channel Descriptor
+// -------- UDPHS_DMAADDRESS : (UDPHS_DMA Offset: 0x4) UDPHS DMA Channel Address Register -------- 
+#define AT91C_UDPHS_BUFF_ADD  (0x0 <<  0) // (UDPHS_DMA) starting address of a DMA Channel transfer
+// -------- UDPHS_DMACONTROL : (UDPHS_DMA Offset: 0x8) UDPHS DMA Channel Control Register -------- 
+#define AT91C_UDPHS_CHANN_ENB (0x1 <<  0) // (UDPHS_DMA) Channel Enabled
+#define AT91C_UDPHS_LDNXT_DSC (0x1 <<  1) // (UDPHS_DMA) Load Next Channel Transfer Descriptor Enable
+#define AT91C_UDPHS_END_TR_EN (0x1 <<  2) // (UDPHS_DMA) Buffer Close Input Enable
+#define AT91C_UDPHS_END_B_EN  (0x1 <<  3) // (UDPHS_DMA) End of DMA Buffer Packet Validation
+#define AT91C_UDPHS_END_TR_IT (0x1 <<  4) // (UDPHS_DMA) End Of Transfer Interrupt Enable
+#define AT91C_UDPHS_END_BUFFIT (0x1 <<  5) // (UDPHS_DMA) End Of Channel Buffer Interrupt Enable
+#define AT91C_UDPHS_DESC_LD_IT (0x1 <<  6) // (UDPHS_DMA) Descriptor Loaded Interrupt Enable
+#define AT91C_UDPHS_BURST_LCK (0x1 <<  7) // (UDPHS_DMA) Burst Lock Enable
+#define AT91C_UDPHS_BUFF_LENGTH (0xFFFF << 16) // (UDPHS_DMA) Buffer Byte Length (write only)
+// -------- UDPHS_DMASTATUS : (UDPHS_DMA Offset: 0xc) UDPHS DMA Channelx Status Register -------- 
+#define AT91C_UDPHS_CHANN_ACT (0x1 <<  1) // (UDPHS_DMA) 
+#define AT91C_UDPHS_END_TR_ST (0x1 <<  4) // (UDPHS_DMA) 
+#define AT91C_UDPHS_END_BF_ST (0x1 <<  5) // (UDPHS_DMA) 
+#define AT91C_UDPHS_DESC_LDST (0x1 <<  6) // (UDPHS_DMA) 
+#define AT91C_UDPHS_BUFF_COUNT (0xFFFF << 16) // (UDPHS_DMA) 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR UDPHS High Speed Device Interface
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_UDPHS {
+	AT91_REG	 UDPHS_CTRL; 	// UDPHS Control Register
+	AT91_REG	 UDPHS_FNUM; 	// UDPHS Frame Number Register
+	AT91_REG	 Reserved0[2]; 	// 
+	AT91_REG	 UDPHS_IEN; 	// UDPHS Interrupt Enable Register
+	AT91_REG	 UDPHS_INTSTA; 	// UDPHS Interrupt Status Register
+	AT91_REG	 UDPHS_CLRINT; 	// UDPHS Clear Interrupt Register
+	AT91_REG	 UDPHS_EPTRST; 	// UDPHS Endpoints Reset Register
+	AT91_REG	 Reserved1[44]; 	// 
+	AT91_REG	 UDPHS_TSTSOFCNT; 	// UDPHS Test SOF Counter Register
+	AT91_REG	 UDPHS_TSTCNTA; 	// UDPHS Test A Counter Register
+	AT91_REG	 UDPHS_TSTCNTB; 	// UDPHS Test B Counter Register
+	AT91_REG	 UDPHS_TSTMODREG; 	// UDPHS Test Mode Register
+	AT91_REG	 UDPHS_TST; 	// UDPHS Test Register
+	AT91_REG	 Reserved2[2]; 	// 
+	AT91_REG	 UDPHS_RIPPADDRSIZE; 	// UDPHS PADDRSIZE Register
+	AT91_REG	 UDPHS_RIPNAME1; 	// UDPHS Name1 Register
+	AT91_REG	 UDPHS_RIPNAME2; 	// UDPHS Name2 Register
+	AT91_REG	 UDPHS_IPFEATURES; 	// UDPHS Features Register
+	AT91_REG	 UDPHS_IPVERSION; 	// UDPHS Version Register
+	AT91S_UDPHS_EPT	 UDPHS_EPT[7]; 	// UDPHS Endpoint struct
+	AT91_REG	 Reserved3[72]; 	// 
+	AT91S_UDPHS_DMA	 UDPHS_DMA[6]; 	// UDPHS DMA channel struct (not use [0])
+} AT91S_UDPHS, *AT91PS_UDPHS;
+#else
+#define UDPHS_CTRL      (AT91_CAST(AT91_REG *) 	0x00000000) // (UDPHS_CTRL) UDPHS Control Register
+#define UDPHS_FNUM      (AT91_CAST(AT91_REG *) 	0x00000004) // (UDPHS_FNUM) UDPHS Frame Number Register
+#define UDPHS_IEN       (AT91_CAST(AT91_REG *) 	0x00000010) // (UDPHS_IEN) UDPHS Interrupt Enable Register
+#define UDPHS_INTSTA    (AT91_CAST(AT91_REG *) 	0x00000014) // (UDPHS_INTSTA) UDPHS Interrupt Status Register
+#define UDPHS_CLRINT    (AT91_CAST(AT91_REG *) 	0x00000018) // (UDPHS_CLRINT) UDPHS Clear Interrupt Register
+#define UDPHS_EPTRST    (AT91_CAST(AT91_REG *) 	0x0000001C) // (UDPHS_EPTRST) UDPHS Endpoints Reset Register
+#define UDPHS_TSTSOFCNT (AT91_CAST(AT91_REG *) 	0x000000D0) // (UDPHS_TSTSOFCNT) UDPHS Test SOF Counter Register
+#define UDPHS_TSTCNTA   (AT91_CAST(AT91_REG *) 	0x000000D4) // (UDPHS_TSTCNTA) UDPHS Test A Counter Register
+#define UDPHS_TSTCNTB   (AT91_CAST(AT91_REG *) 	0x000000D8) // (UDPHS_TSTCNTB) UDPHS Test B Counter Register
+#define UDPHS_TSTMODREG (AT91_CAST(AT91_REG *) 	0x000000DC) // (UDPHS_TSTMODREG) UDPHS Test Mode Register
+#define UDPHS_TST       (AT91_CAST(AT91_REG *) 	0x000000E0) // (UDPHS_TST) UDPHS Test Register
+#define UDPHS_RIPPADDRSIZE (AT91_CAST(AT91_REG *) 	0x000000EC) // (UDPHS_RIPPADDRSIZE) UDPHS PADDRSIZE Register
+#define UDPHS_RIPNAME1  (AT91_CAST(AT91_REG *) 	0x000000F0) // (UDPHS_RIPNAME1) UDPHS Name1 Register
+#define UDPHS_RIPNAME2  (AT91_CAST(AT91_REG *) 	0x000000F4) // (UDPHS_RIPNAME2) UDPHS Name2 Register
+#define UDPHS_IPFEATURES (AT91_CAST(AT91_REG *) 	0x000000F8) // (UDPHS_IPFEATURES) UDPHS Features Register
+#define UDPHS_IPVERSION (AT91_CAST(AT91_REG *) 	0x000000FC) // (UDPHS_IPVERSION) UDPHS Version Register
+
+#endif
+// -------- UDPHS_CTRL : (UDPHS Offset: 0x0) UDPHS Control Register -------- 
+#define AT91C_UDPHS_DEV_ADDR  (0x7F <<  0) // (UDPHS) UDPHS Address
+#define AT91C_UDPHS_FADDR_EN  (0x1 <<  7) // (UDPHS) Function Address Enable
+#define AT91C_UDPHS_EN_UDPHS  (0x1 <<  8) // (UDPHS) UDPHS Enable
+#define AT91C_UDPHS_DETACH    (0x1 <<  9) // (UDPHS) Detach Command
+#define AT91C_UDPHS_REWAKEUP  (0x1 << 10) // (UDPHS) Send Remote Wake Up
+#define AT91C_UDPHS_PULLD_DIS (0x1 << 11) // (UDPHS) PullDown Disable
+// -------- UDPHS_FNUM : (UDPHS Offset: 0x4) UDPHS Frame Number Register -------- 
+#define AT91C_UDPHS_MICRO_FRAME_NUM (0x7 <<  0) // (UDPHS) Micro Frame Number
+#define AT91C_UDPHS_FRAME_NUMBER (0x7FF <<  3) // (UDPHS) Frame Number as defined in the Packet Field Formats
+#define AT91C_UDPHS_FNUM_ERR  (0x1 << 31) // (UDPHS) Frame Number CRC Error
+// -------- UDPHS_IEN : (UDPHS Offset: 0x10) UDPHS Interrupt Enable Register -------- 
+#define AT91C_UDPHS_DET_SUSPD (0x1 <<  1) // (UDPHS) Suspend Interrupt Enable/Clear/Status
+#define AT91C_UDPHS_MICRO_SOF (0x1 <<  2) // (UDPHS) Micro-SOF Interrupt Enable/Clear/Status
+#define AT91C_UDPHS_IEN_SOF   (0x1 <<  3) // (UDPHS) SOF Interrupt Enable/Clear/Status
+#define AT91C_UDPHS_ENDRESET  (0x1 <<  4) // (UDPHS) End Of Reset Interrupt Enable/Clear/Status
+#define AT91C_UDPHS_WAKE_UP   (0x1 <<  5) // (UDPHS) Wake Up CPU Interrupt Enable/Clear/Status
+#define AT91C_UDPHS_ENDOFRSM  (0x1 <<  6) // (UDPHS) End Of Resume Interrupt Enable/Clear/Status
+#define AT91C_UDPHS_UPSTR_RES (0x1 <<  7) // (UDPHS) Upstream Resume Interrupt Enable/Clear/Status
+#define AT91C_UDPHS_EPT_INT_0 (0x1 <<  8) // (UDPHS) Endpoint 0 Interrupt Enable/Status
+#define AT91C_UDPHS_EPT_INT_1 (0x1 <<  9) // (UDPHS) Endpoint 1 Interrupt Enable/Status
+#define AT91C_UDPHS_EPT_INT_2 (0x1 << 10) // (UDPHS) Endpoint 2 Interrupt Enable/Status
+#define AT91C_UDPHS_EPT_INT_3 (0x1 << 11) // (UDPHS) Endpoint 3 Interrupt Enable/Status
+#define AT91C_UDPHS_EPT_INT_4 (0x1 << 12) // (UDPHS) Endpoint 4 Interrupt Enable/Status
+#define AT91C_UDPHS_EPT_INT_5 (0x1 << 13) // (UDPHS) Endpoint 5 Interrupt Enable/Status
+#define AT91C_UDPHS_EPT_INT_6 (0x1 << 14) // (UDPHS) Endpoint 6 Interrupt Enable/Status
+#define AT91C_UDPHS_DMA_INT_1 (0x1 << 25) // (UDPHS) DMA Channel 1 Interrupt Enable/Status
+#define AT91C_UDPHS_DMA_INT_2 (0x1 << 26) // (UDPHS) DMA Channel 2 Interrupt Enable/Status
+#define AT91C_UDPHS_DMA_INT_3 (0x1 << 27) // (UDPHS) DMA Channel 3 Interrupt Enable/Status
+#define AT91C_UDPHS_DMA_INT_4 (0x1 << 28) // (UDPHS) DMA Channel 4 Interrupt Enable/Status
+#define AT91C_UDPHS_DMA_INT_5 (0x1 << 29) // (UDPHS) DMA Channel 5 Interrupt Enable/Status
+#define AT91C_UDPHS_DMA_INT_6 (0x1 << 30) // (UDPHS) DMA Channel 6 Interrupt Enable/Status
+// -------- UDPHS_INTSTA : (UDPHS Offset: 0x14) UDPHS Interrupt Status Register -------- 
+#define AT91C_UDPHS_SPEED     (0x1 <<  0) // (UDPHS) Speed Status
+// -------- UDPHS_CLRINT : (UDPHS Offset: 0x18) UDPHS Clear Interrupt Register -------- 
+// -------- UDPHS_EPTRST : (UDPHS Offset: 0x1c) UDPHS Endpoints Reset Register -------- 
+#define AT91C_UDPHS_RST_EPT_0 (0x1 <<  0) // (UDPHS) Endpoint Reset 0
+#define AT91C_UDPHS_RST_EPT_1 (0x1 <<  1) // (UDPHS) Endpoint Reset 1
+#define AT91C_UDPHS_RST_EPT_2 (0x1 <<  2) // (UDPHS) Endpoint Reset 2
+#define AT91C_UDPHS_RST_EPT_3 (0x1 <<  3) // (UDPHS) Endpoint Reset 3
+#define AT91C_UDPHS_RST_EPT_4 (0x1 <<  4) // (UDPHS) Endpoint Reset 4
+#define AT91C_UDPHS_RST_EPT_5 (0x1 <<  5) // (UDPHS) Endpoint Reset 5
+#define AT91C_UDPHS_RST_EPT_6 (0x1 <<  6) // (UDPHS) Endpoint Reset 6
+// -------- UDPHS_TSTSOFCNT : (UDPHS Offset: 0xd0) UDPHS Test SOF Counter Register -------- 
+#define AT91C_UDPHS_SOFCNTMAX (0x3 <<  0) // (UDPHS) SOF Counter Max Value
+#define AT91C_UDPHS_SOFCTLOAD (0x1 <<  7) // (UDPHS) SOF Counter Load
+// -------- UDPHS_TSTCNTA : (UDPHS Offset: 0xd4) UDPHS Test A Counter Register -------- 
+#define AT91C_UDPHS_CNTAMAX   (0x7FFF <<  0) // (UDPHS) A Counter Max Value
+#define AT91C_UDPHS_CNTALOAD  (0x1 << 15) // (UDPHS) A Counter Load
+// -------- UDPHS_TSTCNTB : (UDPHS Offset: 0xd8) UDPHS Test B Counter Register -------- 
+#define AT91C_UDPHS_CNTBMAX   (0x7FFF <<  0) // (UDPHS) B Counter Max Value
+#define AT91C_UDPHS_CNTBLOAD  (0x1 << 15) // (UDPHS) B Counter Load
+// -------- UDPHS_TSTMODREG : (UDPHS Offset: 0xdc) UDPHS Test Mode Register -------- 
+#define AT91C_UDPHS_TSTMODE   (0x1F <<  1) // (UDPHS) UDPHS Core TestModeReg
+// -------- UDPHS_TST : (UDPHS Offset: 0xe0) UDPHS Test Register -------- 
+#define AT91C_UDPHS_SPEED_CFG (0x3 <<  0) // (UDPHS) Speed Configuration
+#define 	AT91C_UDPHS_SPEED_CFG_NM                   (0x0) // (UDPHS) Normal Mode
+#define 	AT91C_UDPHS_SPEED_CFG_RS                   (0x1) // (UDPHS) Reserved
+#define 	AT91C_UDPHS_SPEED_CFG_HS                   (0x2) // (UDPHS) Force High Speed
+#define 	AT91C_UDPHS_SPEED_CFG_FS                   (0x3) // (UDPHS) Force Full-Speed
+#define AT91C_UDPHS_TST_J     (0x1 <<  2) // (UDPHS) TestJMode
+#define AT91C_UDPHS_TST_K     (0x1 <<  3) // (UDPHS) TestKMode
+#define AT91C_UDPHS_TST_PKT   (0x1 <<  4) // (UDPHS) TestPacketMode
+#define AT91C_UDPHS_OPMODE2   (0x1 <<  5) // (UDPHS) OpMode2
+// -------- UDPHS_RIPPADDRSIZE : (UDPHS Offset: 0xec) UDPHS PADDRSIZE Register -------- 
+#define AT91C_UDPHS_IPPADDRSIZE (0x0 <<  0) // (UDPHS) 2^UDPHSDEV_PADDR_SIZE
+// -------- UDPHS_RIPNAME1 : (UDPHS Offset: 0xf0) UDPHS Name Register -------- 
+#define AT91C_UDPHS_IPNAME1   (0x0 <<  0) // (UDPHS) ASCII string HUSB
+// -------- UDPHS_RIPNAME2 : (UDPHS Offset: 0xf4) UDPHS Name Register -------- 
+#define AT91C_UDPHS_IPNAME2   (0x0 <<  0) // (UDPHS) ASCII string 2DEV
+// -------- UDPHS_IPFEATURES : (UDPHS Offset: 0xf8) UDPHS Features Register -------- 
+#define AT91C_UDPHS_EPT_NBR_MAX (0xF <<  0) // (UDPHS) Max Number of Endpoints
+#define AT91C_UDPHS_DMA_CHANNEL_NBR (0x7 <<  4) // (UDPHS) Number of DMA Channels
+#define AT91C_UDPHS_DMA_B_SIZ (0x1 <<  7) // (UDPHS) DMA Buffer Size
+#define AT91C_UDPHS_DMA_FIFO_WORD_DEPTH (0xF <<  8) // (UDPHS) DMA FIFO Depth in words
+#define AT91C_UDPHS_FIFO_MAX_SIZE (0x7 << 12) // (UDPHS) DPRAM size
+#define AT91C_UDPHS_BW_DPRAM  (0x1 << 15) // (UDPHS) DPRAM byte write capability
+#define AT91C_UDPHS_DATAB16_8 (0x1 << 16) // (UDPHS) UTMI DataBus16_8
+#define AT91C_UDPHS_ISO_EPT_1 (0x1 << 17) // (UDPHS) Endpoint 1 High Bandwidth Isochronous Capability
+#define AT91C_UDPHS_ISO_EPT_2 (0x1 << 18) // (UDPHS) Endpoint 2 High Bandwidth Isochronous Capability
+#define AT91C_UDPHS_ISO_EPT_5 (0x1 << 21) // (UDPHS) Endpoint 5 High Bandwidth Isochronous Capability
+#define AT91C_UDPHS_ISO_EPT_6 (0x1 << 22) // (UDPHS) Endpoint 6 High Bandwidth Isochronous Capability
+// -------- UDPHS_IPVERSION : (UDPHS Offset: 0xfc) UDPHS Version Register -------- 
+#define AT91C_UDPHS_VERSION_NUM (0xFFFF <<  0) // (UDPHS) Give the IP version
+#define AT91C_UDPHS_METAL_FIX_NUM (0x7 << 16) // (UDPHS) Give the number of metal fixes
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR HDMA Channel structure
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_HDMA_CH {
+	AT91_REG	 HDMA_SADDR; 	// HDMA Channel Source Address Register
+	AT91_REG	 HDMA_DADDR; 	// HDMA Channel Destination Address Register
+	AT91_REG	 HDMA_DSCR; 	// HDMA Channel Descriptor Address Register
+	AT91_REG	 HDMA_CTRLA; 	// HDMA Channel Control A Register
+	AT91_REG	 HDMA_CTRLB; 	// HDMA Channel Control B Register
+	AT91_REG	 HDMA_CFG;	// HDMA Channel Configuration Register
+	AT91_REG	 Reserved[4];   // Change for address alignment
+} AT91S_HDMA_CH, *AT91PS_HDMA_CH;
+#else
+#define HDMA_SADDR      (AT91_CAST(AT91_REG *) 	0x00000000) // (HDMA_SADDR) HDMA Channel Source Address Register
+#define HDMA_DADDR      (AT91_CAST(AT91_REG *) 	0x00000004) // (HDMA_DADDR) HDMA Channel Destination Address Register
+#define HDMA_DSCR       (AT91_CAST(AT91_REG *) 	0x00000008) // (HDMA_DSCR) HDMA Channel Descriptor Address Register
+#define HDMA_CTRLA      (AT91_CAST(AT91_REG *) 	0x0000000C) // (HDMA_CTRLA) HDMA Channel Control A Register
+#define HDMA_CTRLB      (AT91_CAST(AT91_REG *) 	0x00000010) // (HDMA_CTRLB) HDMA Channel Control B Register
+#define HDMA_CFG        (AT91_CAST(AT91_REG *) 	0x00000014) // (HDMA_CFG) HDMA Channel Configuration Register
+
+#endif
+// -------- HDMA_SADDR : (HDMA_CH Offset: 0x0)  -------- 
+#define AT91C_SADDR           (0x0 <<  0) // (HDMA_CH) 
+// -------- HDMA_DADDR : (HDMA_CH Offset: 0x4)  -------- 
+#define AT91C_DADDR           (0x0 <<  0) // (HDMA_CH) 
+// -------- HDMA_DSCR : (HDMA_CH Offset: 0x8)  -------- 
+#define AT91C_HDMA_DSCR       (0x3FFFFFFF <<  2) // (HDMA_CH) Buffer Transfer descriptor address. This address is word aligned.
+// -------- HDMA_CTRLA : (HDMA_CH Offset: 0xc)  -------- 
+#define AT91C_HDMA_BTSIZE     (0xFFFF <<  0) // (HDMA_CH) Buffer Transfer Size.
+#define AT91C_HDMA_SCSIZE     (0x1 << 16) // (HDMA_CH) Source Chunk Transfer Size.
+#define 	AT91C_HDMA_SCSIZE_1                    (0x0 << 16) // (HDMA_CH) 1.
+#define 	AT91C_HDMA_SCSIZE_4                    (0x1 << 16) // (HDMA_CH) 4.
+#define AT91C_HDMA_DCSIZE     (0x1 << 20) // (HDMA_CH) Destination Chunk Transfer Size
+#define 	AT91C_HDMA_DCSIZE_1                    (0x0 << 20) // (HDMA_CH) 1.
+#define 	AT91C_HDMA_DCSIZE_4                    (0x1 << 20) // (HDMA_CH) 4.
+#define AT91C_HDMA_SRC_WIDTH  (0x3 << 24) // (HDMA_CH) Source Single Transfer Size
+#define 	AT91C_HDMA_SRC_WIDTH_BYTE                 (0x0 << 24) // (HDMA_CH) BYTE.
+#define 	AT91C_HDMA_SRC_WIDTH_HALFWORD             (0x1 << 24) // (HDMA_CH) HALF-WORD.
+#define 	AT91C_HDMA_SRC_WIDTH_WORD                 (0x2 << 24) // (HDMA_CH) WORD.
+#define AT91C_HDMA_DST_WIDTH  (0x3 << 28) // (HDMA_CH) Destination Single Transfer Size
+#define 	AT91C_HDMA_DST_WIDTH_BYTE                 (0x0 << 28) // (HDMA_CH) BYTE.
+#define 	AT91C_HDMA_DST_WIDTH_HALFWORD             (0x1 << 28) // (HDMA_CH) HALF-WORD.
+#define 	AT91C_HDMA_DST_WIDTH_WORD                 (0x2 << 28) // (HDMA_CH) WORD.
+#define AT91C_HDMA_DONE       (0x1 << 31) // (HDMA_CH) 
+// -------- HDMA_CTRLB : (HDMA_CH Offset: 0x10)  -------- 
+#define AT91C_HDMA_SRC_DSCR   (0x1 << 16) // (HDMA_CH) Source Buffer Descriptor Fetch operation
+#define 	AT91C_HDMA_SRC_DSCR_FETCH_FROM_MEM       (0x0 << 16) // (HDMA_CH) Source address is updated when the descriptor is fetched from the memory.
+#define 	AT91C_HDMA_SRC_DSCR_FETCH_DISABLE        (0x1 << 16) // (HDMA_CH) Buffer Descriptor Fetch operation is disabled for the Source.
+#define AT91C_HDMA_DST_DSCR   (0x1 << 20) // (HDMA_CH) Destination Buffer Descriptor operation
+#define 	AT91C_HDMA_DST_DSCR_FETCH_FROM_MEM       (0x0 << 20) // (HDMA_CH) Destination address is updated when the descriptor is fetched from the memory.
+#define 	AT91C_HDMA_DST_DSCR_FETCH_DISABLE        (0x1 << 20) // (HDMA_CH) Buffer Descriptor Fetch operation is disabled for the destination.
+#define AT91C_HDMA_FC         (0x7 << 21) // (HDMA_CH) This field defines which devices controls the size of the buffer transfer, also referred as to the Flow Controller.
+#define 	AT91C_HDMA_FC_MEM2MEM              (0x0 << 21) // (HDMA_CH) Memory-to-Memory (DMA Controller).
+#define 	AT91C_HDMA_FC_MEM2PER              (0x1 << 21) // (HDMA_CH) Memory-to-Peripheral (DMA Controller).
+#define 	AT91C_HDMA_FC_PER2MEM              (0x2 << 21) // (HDMA_CH) Peripheral-to-Memory (DMA Controller).
+#define 	AT91C_HDMA_FC_PER2PER              (0x3 << 21) // (HDMA_CH) Peripheral-to-Peripheral (DMA Controller).
+#define AT91C_HDMA_SRC_ADDRESS_MODE (0x3 << 24) // (HDMA_CH) Type of addressing mode
+#define 	AT91C_HDMA_SRC_ADDRESS_MODE_INCR                 (0x0 << 24) // (HDMA_CH) Incrementing Mode.
+#define 	AT91C_HDMA_SRC_ADDRESS_MODE_DECR                 (0x1 << 24) // (HDMA_CH) Decrementing Mode.
+#define 	AT91C_HDMA_SRC_ADDRESS_MODE_FIXED                (0x2 << 24) // (HDMA_CH) Fixed Mode.
+#define AT91C_HDMA_DST_ADDRESS_MODE (0x3 << 28) // (HDMA_CH) Type of addressing mode
+#define 	AT91C_HDMA_DST_ADDRESS_MODE_INCR                 (0x0 << 28) // (HDMA_CH) Incrementing Mode.
+#define 	AT91C_HDMA_DST_ADDRESS_MODE_DECR                 (0x1 << 28) // (HDMA_CH) Decrementing Mode.
+#define 	AT91C_HDMA_DST_ADDRESS_MODE_FIXED                (0x2 << 28) // (HDMA_CH) Fixed Mode.
+#define AT91C_HDMA_IEN        (0x1 << 30) // (HDMA_CH) buffer transfer completed
+// -------- HDMA_CFG : (HDMA_CH Offset: 0x14)  -------- 
+#define AT91C_HDMA_SRC_PER    (0xF <<  0) // (HDMA_CH) Channel Source Request is associated with peripheral identifier coded SRC_PER handshaking interface.
+#define 	AT91C_HDMA_SRC_PER_0                    (0x0) // (HDMA_CH) HW Handshaking Interface number 0.
+#define 	AT91C_HDMA_SRC_PER_1                    (0x1) // (HDMA_CH) HW Handshaking Interface number 1.
+#define 	AT91C_HDMA_SRC_PER_2                    (0x2) // (HDMA_CH) HW Handshaking Interface number 2.
+#define 	AT91C_HDMA_SRC_PER_3                    (0x3) // (HDMA_CH) HW Handshaking Interface number 3.
+#define 	AT91C_HDMA_SRC_PER_4                    (0x4) // (HDMA_CH) HW Handshaking Interface number 4.
+#define 	AT91C_HDMA_SRC_PER_5                    (0x5) // (HDMA_CH) HW Handshaking Interface number 5.
+#define 	AT91C_HDMA_SRC_PER_6                    (0x6) // (HDMA_CH) HW Handshaking Interface number 6.
+#define 	AT91C_HDMA_SRC_PER_7                    (0x7) // (HDMA_CH) HW Handshaking Interface number 7.
+#define AT91C_HDMA_DST_PER    (0xF <<  4) // (HDMA_CH) Channel Destination Request is associated with peripheral identifier coded DST_PER handshaking interface.
+#define 	AT91C_HDMA_DST_PER_0                    (0x0 <<  4) // (HDMA_CH) HW Handshaking Interface number 0.
+#define 	AT91C_HDMA_DST_PER_1                    (0x1 <<  4) // (HDMA_CH) HW Handshaking Interface number 1.
+#define 	AT91C_HDMA_DST_PER_2                    (0x2 <<  4) // (HDMA_CH) HW Handshaking Interface number 2.
+#define 	AT91C_HDMA_DST_PER_3                    (0x3 <<  4) // (HDMA_CH) HW Handshaking Interface number 3.
+#define 	AT91C_HDMA_DST_PER_4                    (0x4 <<  4) // (HDMA_CH) HW Handshaking Interface number 4.
+#define 	AT91C_HDMA_DST_PER_5                    (0x5 <<  4) // (HDMA_CH) HW Handshaking Interface number 5.
+#define 	AT91C_HDMA_DST_PER_6                    (0x6 <<  4) // (HDMA_CH) HW Handshaking Interface number 6.
+#define 	AT91C_HDMA_DST_PER_7                    (0x7 <<  4) // (HDMA_CH) HW Handshaking Interface number 7.
+#define AT91C_HDMA_SRC_H2SEL  (0x1 <<  9) // (HDMA_CH) Source Handshaking Mode
+#define 	AT91C_HDMA_SRC_H2SEL_SW                   (0x0 <<  9) // (HDMA_CH) Software handshaking interface is used to trigger a transfer request.
+#define 	AT91C_HDMA_SRC_H2SEL_HW                   (0x1 <<  9) // (HDMA_CH) Hardware handshaking interface is used to trigger a transfer request.
+#define AT91C_HDMA_DST_H2SEL  (0x1 << 13) // (HDMA_CH) Destination Handshaking Mode
+#define 	AT91C_HDMA_DST_H2SEL_SW                   (0x0 << 13) // (HDMA_CH) Software handshaking interface is used to trigger a transfer request.
+#define 	AT91C_HDMA_DST_H2SEL_HW                   (0x1 << 13) // (HDMA_CH) Hardware handshaking interface is used to trigger a transfer request.
+#define AT91C_HDMA_SOD        (0x1 << 16) // (HDMA_CH) STOP ON DONE
+#define 	AT91C_HDMA_SOD_DISABLE              (0x0 << 16) // (HDMA_CH) STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.
+#define 	AT91C_HDMA_SOD_ENABLE               (0x1 << 16) // (HDMA_CH) STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.
+#define AT91C_HDMA_LOCK_IF    (0x1 << 20) // (HDMA_CH) Interface Lock
+#define 	AT91C_HDMA_LOCK_IF_DISABLE              (0x0 << 20) // (HDMA_CH) Interface Lock capability is disabled.
+#define 	AT91C_HDMA_LOCK_IF_ENABLE               (0x1 << 20) // (HDMA_CH) Interface Lock capability is enabled.
+#define AT91C_HDMA_LOCK_B     (0x1 << 21) // (HDMA_CH) AHB Bus Lock
+#define 	AT91C_HDMA_LOCK_B_DISABLE              (0x0 << 21) // (HDMA_CH) AHB Bus Locking capability is disabled.
+#define 	AT91C_HDMA_LOCK_B_ENABLE               (0x1 << 21) // (HDMA_CH) AHB Bus Locking capability is enabled.
+#define AT91C_HDMA_LOCK_IF_L  (0x1 << 22) // (HDMA_CH) Master Interface Arbiter Lock
+#define 	AT91C_HDMA_LOCK_IF_L_CHUNK                (0x0 << 22) // (HDMA_CH) The Master Interface Arbiter is locked by the channel x for a chunk transfer.
+#define 	AT91C_HDMA_LOCK_IF_L_BUFFER               (0x1 << 22) // (HDMA_CH) The Master Interface Arbiter is locked by the channel x for a buffer transfer.
+#define AT91C_HDMA_AHB_PROT   (0x7 << 24) // (HDMA_CH) AHB Prot
+#define AT91C_HDMA_FIFOCFG    (0x3 << 28) // (HDMA_CH) FIFO Request Configuration
+#define 	AT91C_HDMA_FIFOCFG_LARGESTBURST         (0x0 << 28) // (HDMA_CH) The largest defined length AHB burst is performed on the destination AHB interface.
+#define 	AT91C_HDMA_FIFOCFG_HALFFIFO             (0x1 << 28) // (HDMA_CH) When half fifo size is available/filled a source/destination request is serviced.
+#define 	AT91C_HDMA_FIFOCFG_ENOUGHSPACE          (0x2 << 28) // (HDMA_CH) When there is enough space/data available to perfom a single AHB access then the request is serviced.
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR HDMA controller
+// *****************************************************************************
+#ifndef __ASSEMBLY__
+typedef struct _AT91S_HDMA {
+	AT91_REG	 HDMA_GCFG; 	// HDMA Global Configuration Register
+	AT91_REG	 HDMA_EN; 	// HDMA Controller Enable Register
+	AT91_REG	 HDMA_SREQ; 	// HDMA Software Single Request Register
+	AT91_REG	 HDMA_CREQ; 	// HDMA Software Chunk Transfer Request Register
+	AT91_REG	 HDMA_LAST; 	// HDMA Software Last Transfer Flag Register
+	AT91_REG	 Reserved0[1]; 	// 
+	AT91_REG	 HDMA_EBCIER; 	// HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Enable register
+	AT91_REG	 HDMA_EBCIDR; 	// HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Disable register
+	AT91_REG	 HDMA_EBCIMR; 	// HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Mask Register
+	AT91_REG	 HDMA_EBCISR; 	// HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Status Register
+	AT91_REG	 HDMA_CHER; 	// HDMA Channel Handler Enable Register
+	AT91_REG	 HDMA_CHDR; 	// HDMA Channel Handler Disable Register
+	AT91_REG	 HDMA_CHSR; 	// HDMA Channel Handler Status Register
+	AT91_REG	 Reserved1[2]; 	// 
+	AT91S_HDMA_CH	 HDMA_CH[4]; 	// HDMA Channel structure
+	AT91_REG	 Reserved2[68]; 	// 
+	AT91_REG	 HDMA_ADDRSIZE; 	// HDMA ADDRSIZE REGISTER 
+	AT91_REG	 HDMA_IPNAME1; 	// HDMA IPNAME1 REGISTER 
+	AT91_REG	 HDMA_IPNAME2; 	// HDMA IPNAME2 REGISTER 
+	AT91_REG	 HDMA_FEATURES; 	// HDMA FEATURES REGISTER 
+	AT91_REG	 HDMA_VER; 	// HDMA VERSION REGISTER 
+} AT91S_HDMA, *AT91PS_HDMA;
+#else
+#define HDMA_GCFG       (AT91_CAST(AT91_REG *) 	0x00000000) // (HDMA_GCFG) HDMA Global Configuration Register
+#define HDMA_EN         (AT91_CAST(AT91_REG *) 	0x00000004) // (HDMA_EN) HDMA Controller Enable Register
+#define HDMA_SREQ       (AT91_CAST(AT91_REG *) 	0x00000008) // (HDMA_SREQ) HDMA Software Single Request Register
+#define HDMA_CREQ       (AT91_CAST(AT91_REG *) 	0x0000000C) // (HDMA_CREQ) HDMA Software Chunk Transfer Request Register
+#define HDMA_LAST       (AT91_CAST(AT91_REG *) 	0x00000010) // (HDMA_LAST) HDMA Software Last Transfer Flag Register
+#define HDMA_EBCIER     (AT91_CAST(AT91_REG *) 	0x00000018) // (HDMA_EBCIER) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Enable register
+#define HDMA_EBCIDR     (AT91_CAST(AT91_REG *) 	0x0000001C) // (HDMA_EBCIDR) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Disable register
+#define HDMA_EBCIMR     (AT91_CAST(AT91_REG *) 	0x00000020) // (HDMA_EBCIMR) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Mask Register
+#define HDMA_EBCISR     (AT91_CAST(AT91_REG *) 	0x00000024) // (HDMA_EBCISR) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Status Register
+#define HDMA_CHER       (AT91_CAST(AT91_REG *) 	0x00000028) // (HDMA_CHER) HDMA Channel Handler Enable Register
+#define HDMA_CHDR       (AT91_CAST(AT91_REG *) 	0x0000002C) // (HDMA_CHDR) HDMA Channel Handler Disable Register
+#define HDMA_CHSR       (AT91_CAST(AT91_REG *) 	0x00000030) // (HDMA_CHSR) HDMA Channel Handler Status Register
+#define HDMA_ADDRSIZE   (AT91_CAST(AT91_REG *) 	0x000001EC) // (HDMA_ADDRSIZE) HDMA ADDRSIZE REGISTER 
+#define HDMA_IPNAME1    (AT91_CAST(AT91_REG *) 	0x000001F0) // (HDMA_IPNAME1) HDMA IPNAME1 REGISTER 
+#define HDMA_IPNAME2    (AT91_CAST(AT91_REG *) 	0x000001F4) // (HDMA_IPNAME2) HDMA IPNAME2 REGISTER 
+#define HDMA_FEATURES   (AT91_CAST(AT91_REG *) 	0x000001F8) // (HDMA_FEATURES) HDMA FEATURES REGISTER 
+#define HDMA_VER        (AT91_CAST(AT91_REG *) 	0x000001FC) // (HDMA_VER) HDMA VERSION REGISTER 
+
+#endif
+// -------- HDMA_GCFG : (HDMA Offset: 0x0)  -------- 
+#define AT91C_HDMA_ARB_CFG    (0x1 <<  4) // (HDMA) Arbiter mode.
+#define 	AT91C_HDMA_ARB_CFG_FIXED                (0x0 <<  4) // (HDMA) Fixed priority arbiter.
+#define 	AT91C_HDMA_ARB_CFG_ROUND_ROBIN          (0x1 <<  4) // (HDMA) Modified round robin arbiter.
+// -------- HDMA_EN : (HDMA Offset: 0x4)  -------- 
+#define AT91C_HDMA_ENABLE     (0x1 <<  0) // (HDMA) 
+#define 	AT91C_HDMA_ENABLE_DISABLE              (0x0) // (HDMA) Disables HDMA.
+#define 	AT91C_HDMA_ENABLE_ENABLE               (0x1) // (HDMA) Enables HDMA.
+// -------- HDMA_SREQ : (HDMA Offset: 0x8)  -------- 
+#define AT91C_HDMA_SSREQ0     (0x1 <<  0) // (HDMA) Request a source single transfer on channel 0
+#define 	AT91C_HDMA_SSREQ0_0                    (0x0) // (HDMA) No effect.
+#define 	AT91C_HDMA_SSREQ0_1                    (0x1) // (HDMA) Request a source single transfer on channel 0.
+#define AT91C_HDMA_DSREQ0     (0x1 <<  1) // (HDMA) Request a destination single transfer on channel 0
+#define 	AT91C_HDMA_DSREQ0_0                    (0x0 <<  1) // (HDMA) No effect.
+#define 	AT91C_HDMA_DSREQ0_1                    (0x1 <<  1) // (HDMA) Request a destination single transfer on channel 0.
+#define AT91C_HDMA_SSREQ1     (0x1 <<  2) // (HDMA) Request a source single transfer on channel 1
+#define 	AT91C_HDMA_SSREQ1_0                    (0x0 <<  2) // (HDMA) No effect.
+#define 	AT91C_HDMA_SSREQ1_1                    (0x1 <<  2) // (HDMA) Request a source single transfer on channel 1.
+#define AT91C_HDMA_DSREQ1     (0x1 <<  3) // (HDMA) Request a destination single transfer on channel 1
+#define 	AT91C_HDMA_DSREQ1_0                    (0x0 <<  3) // (HDMA) No effect.
+#define 	AT91C_HDMA_DSREQ1_1                    (0x1 <<  3) // (HDMA) Request a destination single transfer on channel 1.
+#define AT91C_HDMA_SSREQ2     (0x1 <<  4) // (HDMA) Request a source single transfer on channel 2
+#define 	AT91C_HDMA_SSREQ2_0                    (0x0 <<  4) // (HDMA) No effect.
+#define 	AT91C_HDMA_SSREQ2_1                    (0x1 <<  4) // (HDMA) Request a source single transfer on channel 2.
+#define AT91C_HDMA_DSREQ2     (0x1 <<  5) // (HDMA) Request a destination single transfer on channel 2
+#define 	AT91C_HDMA_DSREQ2_0                    (0x0 <<  5) // (HDMA) No effect.
+#define 	AT91C_HDMA_DSREQ2_1                    (0x1 <<  5) // (HDMA) Request a destination single transfer on channel 2.
+#define AT91C_HDMA_SSREQ3     (0x1 <<  6) // (HDMA) Request a source single transfer on channel 3
+#define 	AT91C_HDMA_SSREQ3_0                    (0x0 <<  6) // (HDMA) No effect.
+#define 	AT91C_HDMA_SSREQ3_1                    (0x1 <<  6) // (HDMA) Request a source single transfer on channel 3.
+#define AT91C_HDMA_DSREQ3     (0x1 <<  7) // (HDMA) Request a destination single transfer on channel 3
+#define 	AT91C_HDMA_DSREQ3_0                    (0x0 <<  7) // (HDMA) No effect.
+#define 	AT91C_HDMA_DSREQ3_1                    (0x1 <<  7) // (HDMA) Request a destination single transfer on channel 3.
+// -------- HDMA_CREQ : (HDMA Offset: 0xc)  -------- 
+#define AT91C_HDMA_SCREQ0     (0x1 <<  0) // (HDMA) Request a source chunk transfer on channel 0
+#define 	AT91C_HDMA_SCREQ0_0                    (0x0) // (HDMA) No effect.
+#define 	AT91C_HDMA_SCREQ0_1                    (0x1) // (HDMA) Request a source chunk transfer on channel 0.
+#define AT91C_HDMA_DCREQ0     (0x1 <<  1) // (HDMA) Request a destination chunk transfer on channel 0
+#define 	AT91C_HDMA_DCREQ0_0                    (0x0 <<  1) // (HDMA) No effect.
+#define 	AT91C_HDMA_DCREQ0_1                    (0x1 <<  1) // (HDMA) Request a destination chunk transfer on channel 0.
+#define AT91C_HDMA_SCREQ1     (0x1 <<  2) // (HDMA) Request a source chunk transfer on channel 1
+#define 	AT91C_HDMA_SCREQ1_0                    (0x0 <<  2) // (HDMA) No effect.
+#define 	AT91C_HDMA_SCREQ1_1                    (0x1 <<  2) // (HDMA) Request a source chunk transfer on channel 1.
+#define AT91C_HDMA_DCREQ1     (0x1 <<  3) // (HDMA) Request a destination chunk transfer on channel 1
+#define 	AT91C_HDMA_DCREQ1_0                    (0x0 <<  3) // (HDMA) No effect.
+#define 	AT91C_HDMA_DCREQ1_1                    (0x1 <<  3) // (HDMA) Request a destination chunk transfer on channel 1.
+#define AT91C_HDMA_SCREQ2     (0x1 <<  4) // (HDMA) Request a source chunk transfer on channel 2
+#define 	AT91C_HDMA_SCREQ2_0                    (0x0 <<  4) // (HDMA) No effect.
+#define 	AT91C_HDMA_SCREQ2_1                    (0x1 <<  4) // (HDMA) Request a source chunk transfer on channel 2.
+#define AT91C_HDMA_DCREQ2     (0x1 <<  5) // (HDMA) Request a destination chunk transfer on channel 2
+#define 	AT91C_HDMA_DCREQ2_0                    (0x0 <<  5) // (HDMA) No effect.
+#define 	AT91C_HDMA_DCREQ2_1                    (0x1 <<  5) // (HDMA) Request a destination chunk transfer on channel 2.
+#define AT91C_HDMA_SCREQ3     (0x1 <<  6) // (HDMA) Request a source chunk transfer on channel 3
+#define 	AT91C_HDMA_SCREQ3_0                    (0x0 <<  6) // (HDMA) No effect.
+#define 	AT91C_HDMA_SCREQ3_1                    (0x1 <<  6) // (HDMA) Request a source chunk transfer on channel 3.
+#define AT91C_HDMA_DCREQ3     (0x1 <<  7) // (HDMA) Request a destination chunk transfer on channel 3
+#define 	AT91C_HDMA_DCREQ3_0                    (0x0 <<  7) // (HDMA) No effect.
+#define 	AT91C_HDMA_DCREQ3_1                    (0x1 <<  7) // (HDMA) Request a destination chunk transfer on channel 3.
+// -------- HDMA_LAST : (HDMA Offset: 0x10)  -------- 
+#define AT91C_HDMA_SLAST0     (0x1 <<  0) // (HDMA) Indicates that this source request is the last transfer of the buffer on channel 0
+#define 	AT91C_HDMA_SLAST0_0                    (0x0) // (HDMA) No effect.
+#define 	AT91C_HDMA_SLAST0_1                    (0x1) // (HDMA) Writing one to SLASTx prior to writing one to SSREQx or SCREQx indicates that this source request is the last transfer of the buffer on channel 0.
+#define AT91C_HDMA_DLAST0     (0x1 <<  1) // (HDMA) Indicates that this destination request is the last transfer of the buffer on channel 0
+#define 	AT91C_HDMA_DLAST0_0                    (0x0 <<  1) // (HDMA) No effect.
+#define 	AT91C_HDMA_DLAST0_1                    (0x1 <<  1) // (HDMA) Writing one to DLASTx prior to writing one to DSREQx or DCREQx indicates that this destination request is the last transfer of the buffer on channel 0.
+#define AT91C_HDMA_SLAST1     (0x1 <<  2) // (HDMA) Indicates that this source request is the last transfer of the buffer on channel 1
+#define 	AT91C_HDMA_SLAST1_0                    (0x0 <<  2) // (HDMA) No effect.
+#define 	AT91C_HDMA_SLAST1_1                    (0x1 <<  2) // (HDMA) Writing one to SLASTx prior to writing one to SSREQx or SCREQx indicates that this source request is the last transfer of the buffer on channel 1.
+#define AT91C_HDMA_DLAST1     (0x1 <<  3) // (HDMA) Indicates that this destination request is the last transfer of the buffer on channel 1
+#define 	AT91C_HDMA_DLAST1_0                    (0x0 <<  3) // (HDMA) No effect.
+#define 	AT91C_HDMA_DLAST1_1                    (0x1 <<  3) // (HDMA) Writing one to DLASTx prior to writing one to DSREQx or DCREQx indicates that this destination request is the last transfer of the buffer on channel 1.
+#define AT91C_HDMA_SLAST2     (0x1 <<  4) // (HDMA) Indicates that this source request is the last transfer of the buffer on channel 2
+#define 	AT91C_HDMA_SLAST2_0                    (0x0 <<  4) // (HDMA) No effect.
+#define 	AT91C_HDMA_SLAST2_1                    (0x1 <<  4) // (HDMA) Writing one to SLASTx prior to writing one to SSREQx or SCREQx indicates that this source request is the last transfer of the buffer on channel 2.
+#define AT91C_HDMA_DLAST2     (0x1 <<  5) // (HDMA) Indicates that this destination request is the last transfer of the buffer on channel 2
+#define 	AT91C_HDMA_DLAST2_0                    (0x0 <<  5) // (HDMA) No effect.
+#define 	AT91C_HDMA_DLAST2_1                    (0x1 <<  5) // (HDMA) Writing one to DLASTx prior to writing one to DSREQx or DCREQx indicates that this destination request is the last transfer of the buffer on channel 2.
+#define AT91C_HDMA_SLAST3     (0x1 <<  6) // (HDMA) Indicates that this source request is the last transfer of the buffer on channel 3
+#define 	AT91C_HDMA_SLAST3_0                    (0x0 <<  6) // (HDMA) No effect.
+#define 	AT91C_HDMA_SLAST3_1                    (0x1 <<  6) // (HDMA) Writing one to SLASTx prior to writing one to SSREQx or SCREQx indicates that this source request is the last transfer of the buffer on channel 3.
+#define AT91C_HDMA_DLAST3     (0x1 <<  7) // (HDMA) Indicates that this destination request is the last transfer of the buffer on channel 3
+#define 	AT91C_HDMA_DLAST3_0                    (0x0 <<  7) // (HDMA) No effect.
+#define 	AT91C_HDMA_DLAST3_1                    (0x1 <<  7) // (HDMA) Writing one to DLASTx prior to writing one to DSREQx or DCREQx indicates that this destination request is the last transfer of the buffer on channel 3.
+// -------- HDMA_EBCIER : (HDMA Offset: 0x18) Buffer Transfer Completed/Chained Buffer Transfer Completed/Access Error Interrupt Enable Register -------- 
+#define AT91C_HDMA_BTC0       (0x1 <<  0) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_BTC1       (0x1 <<  1) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_BTC2       (0x1 <<  2) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_BTC3       (0x1 <<  3) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_BTC4       (0x1 <<  4) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_BTC5       (0x1 <<  5) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_BTC6       (0x1 <<  6) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_BTC7       (0x1 <<  7) // (HDMA) Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_CBTC0      (0x1 <<  8) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_CBTC1      (0x1 <<  9) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_CBTC2      (0x1 << 10) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_CBTC3      (0x1 << 11) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_CBTC4      (0x1 << 12) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_CBTC5      (0x1 << 13) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_CBTC6      (0x1 << 14) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_CBTC7      (0x1 << 15) // (HDMA) Chained Buffer Transfer Completed Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_ERR0       (0x1 << 16) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_ERR1       (0x1 << 17) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_ERR2       (0x1 << 18) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_ERR3       (0x1 << 19) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_ERR4       (0x1 << 20) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_ERR5       (0x1 << 21) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_ERR6       (0x1 << 22) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register
+#define AT91C_HDMA_ERR7       (0x1 << 23) // (HDMA) Access HDMA_Error Interrupt Enable/Disable/Status Register
+// -------- HDMA_EBCIDR : (HDMA Offset: 0x1c)  -------- 
+// -------- HDMA_EBCIMR : (HDMA Offset: 0x20)  -------- 
+// -------- HDMA_EBCISR : (HDMA Offset: 0x24)  -------- 
+// -------- HDMA_CHER : (HDMA Offset: 0x28)  -------- 
+#define AT91C_HDMA_ENA0       (0x1 <<  0) // (HDMA) When set, channel 0 enabled.
+#define 	AT91C_HDMA_ENA0_0                    (0x0) // (HDMA) No effect.
+#define 	AT91C_HDMA_ENA0_1                    (0x1) // (HDMA) Channel 0 enabled.
+#define AT91C_HDMA_ENA1       (0x1 <<  1) // (HDMA) When set, channel 1 enabled.
+#define 	AT91C_HDMA_ENA1_0                    (0x0 <<  1) // (HDMA) No effect.
+#define 	AT91C_HDMA_ENA1_1                    (0x1 <<  1) // (HDMA) Channel 1 enabled.
+#define AT91C_HDMA_ENA2       (0x1 <<  2) // (HDMA) When set, channel 2 enabled.
+#define 	AT91C_HDMA_ENA2_0                    (0x0 <<  2) // (HDMA) No effect.
+#define 	AT91C_HDMA_ENA2_1                    (0x1 <<  2) // (HDMA) Channel 2 enabled.
+#define AT91C_HDMA_ENA3       (0x1 <<  3) // (HDMA) When set, channel 3 enabled.
+#define 	AT91C_HDMA_ENA3_0                    (0x0 <<  3) // (HDMA) No effect.
+#define 	AT91C_HDMA_ENA3_1                    (0x1 <<  3) // (HDMA) Channel 3 enabled.
+#define AT91C_HDMA_ENA4       (0x1 <<  4) // (HDMA) When set, channel 4 enabled.
+#define 	AT91C_HDMA_ENA4_0                    (0x0 <<  4) // (HDMA) No effect.
+#define 	AT91C_HDMA_ENA4_1                    (0x1 <<  4) // (HDMA) Channel 4 enabled.
+#define AT91C_HDMA_ENA5       (0x1 <<  5) // (HDMA) When set, channel 5 enabled.
+#define 	AT91C_HDMA_ENA5_0                    (0x0 <<  5) // (HDMA) No effect.
+#define 	AT91C_HDMA_ENA5_1                    (0x1 <<  5) // (HDMA) Channel 5 enabled.
+#define AT91C_HDMA_ENA6       (0x1 <<  6) // (HDMA) When set, channel 6 enabled.
+#define 	AT91C_HDMA_ENA6_0                    (0x0 <<  6) // (HDMA) No effect.
+#define 	AT91C_HDMA_ENA6_1                    (0x1 <<  6) // (HDMA) Channel 6 enabled.
+#define AT91C_HDMA_ENA7       (0x1 <<  7) // (HDMA) When set, channel 7 enabled.
+#define 	AT91C_HDMA_ENA7_0                    (0x0 <<  7) // (HDMA) No effect.
+#define 	AT91C_HDMA_ENA7_1                    (0x1 <<  7) // (HDMA) Channel 7 enabled.
+#define AT91C_HDMA_SUSP0      (0x1 <<  8) // (HDMA) When set, channel 0 freezed and its current context.
+#define 	AT91C_HDMA_SUSP0_0                    (0x0 <<  8) // (HDMA) No effect.
+#define 	AT91C_HDMA_SUSP0_1                    (0x1 <<  8) // (HDMA) Channel 0 freezed.
+#define AT91C_HDMA_SUSP1      (0x1 <<  9) // (HDMA) When set, channel 1 freezed and its current context.
+#define 	AT91C_HDMA_SUSP1_0                    (0x0 <<  9) // (HDMA) No effect.
+#define 	AT91C_HDMA_SUSP1_1                    (0x1 <<  9) // (HDMA) Channel 1 freezed.
+#define AT91C_HDMA_SUSP2      (0x1 << 10) // (HDMA) When set, channel 2 freezed and its current context.
+#define 	AT91C_HDMA_SUSP2_0                    (0x0 << 10) // (HDMA) No effect.
+#define 	AT91C_HDMA_SUSP2_1                    (0x1 << 10) // (HDMA) Channel 2 freezed.
+#define AT91C_HDMA_SUSP3      (0x1 << 11) // (HDMA) When set, channel 3 freezed and its current context.
+#define 	AT91C_HDMA_SUSP3_0                    (0x0 << 11) // (HDMA) No effect.
+#define 	AT91C_HDMA_SUSP3_1                    (0x1 << 11) // (HDMA) Channel 3 freezed.
+#define AT91C_HDMA_SUSP4      (0x1 << 12) // (HDMA) When set, channel 4 freezed and its current context.
+#define 	AT91C_HDMA_SUSP4_0                    (0x0 << 12) // (HDMA) No effect.
+#define 	AT91C_HDMA_SUSP4_1                    (0x1 << 12) // (HDMA) Channel 4 freezed.
+#define AT91C_HDMA_SUSP5      (0x1 << 13) // (HDMA) When set, channel 5 freezed and its current context.
+#define 	AT91C_HDMA_SUSP5_0                    (0x0 << 13) // (HDMA) No effect.
+#define 	AT91C_HDMA_SUSP5_1                    (0x1 << 13) // (HDMA) Channel 5 freezed.
+#define AT91C_HDMA_SUSP6      (0x1 << 14) // (HDMA) When set, channel 6 freezed and its current context.
+#define 	AT91C_HDMA_SUSP6_0                    (0x0 << 14) // (HDMA) No effect.
+#define 	AT91C_HDMA_SUSP6_1                    (0x1 << 14) // (HDMA) Channel 6 freezed.
+#define AT91C_HDMA_SUSP7      (0x1 << 15) // (HDMA) When set, channel 7 freezed and its current context.
+#define 	AT91C_HDMA_SUSP7_0                    (0x0 << 15) // (HDMA) No effect.
+#define 	AT91C_HDMA_SUSP7_1                    (0x1 << 15) // (HDMA) Channel 7 freezed.
+#define AT91C_HDMA_KEEP0      (0x1 << 24) // (HDMA) When set, it resumes the channel 0 from an automatic stall state.
+#define 	AT91C_HDMA_KEEP0_0                    (0x0 << 24) // (HDMA) No effect.
+#define 	AT91C_HDMA_KEEP0_1                    (0x1 << 24) // (HDMA) Resumes the channel 0.
+#define AT91C_HDMA_KEEP1      (0x1 << 25) // (HDMA) When set, it resumes the channel 1 from an automatic stall state.
+#define 	AT91C_HDMA_KEEP1_0                    (0x0 << 25) // (HDMA) No effect.
+#define 	AT91C_HDMA_KEEP1_1                    (0x1 << 25) // (HDMA) Resumes the channel 1.
+#define AT91C_HDMA_KEEP2      (0x1 << 26) // (HDMA) When set, it resumes the channel 2 from an automatic stall state.
+#define 	AT91C_HDMA_KEEP2_0                    (0x0 << 26) // (HDMA) No effect.
+#define 	AT91C_HDMA_KEEP2_1                    (0x1 << 26) // (HDMA) Resumes the channel 2.
+#define AT91C_HDMA_KEEP3      (0x1 << 27) // (HDMA) When set, it resumes the channel 3 from an automatic stall state.
+#define 	AT91C_HDMA_KEEP3_0                    (0x0 << 27) // (HDMA) No effect.
+#define 	AT91C_HDMA_KEEP3_1                    (0x1 << 27) // (HDMA) Resumes the channel 3.
+#define AT91C_HDMA_KEEP4      (0x1 << 28) // (HDMA) When set, it resumes the channel 4 from an automatic stall state.
+#define 	AT91C_HDMA_KEEP4_0                    (0x0 << 28) // (HDMA) No effect.
+#define 	AT91C_HDMA_KEEP4_1                    (0x1 << 28) // (HDMA) Resumes the channel 4.
+#define AT91C_HDMA_KEEP5      (0x1 << 29) // (HDMA) When set, it resumes the channel 5 from an automatic stall state.
+#define 	AT91C_HDMA_KEEP5_0                    (0x0 << 29) // (HDMA) No effect.
+#define 	AT91C_HDMA_KEEP5_1                    (0x1 << 29) // (HDMA) Resumes the channel 5.
+#define AT91C_HDMA_KEEP6      (0x1 << 30) // (HDMA) When set, it resumes the channel 6 from an automatic stall state.
+#define 	AT91C_HDMA_KEEP6_0                    (0x0 << 30) // (HDMA) No effect.
+#define 	AT91C_HDMA_KEEP6_1                    (0x1 << 30) // (HDMA) Resumes the channel 6.
+#define AT91C_HDMA_KEEP7      (0x1 << 31) // (HDMA) When set, it resumes the channel 7 from an automatic stall state.
+#define 	AT91C_HDMA_KEEP7_0                    (0x0 << 31) // (HDMA) No effect.
+#define 	AT91C_HDMA_KEEP7_1                    (0x1 << 31) // (HDMA) Resumes the channel 7.
+// -------- HDMA_CHDR : (HDMA Offset: 0x2c)  -------- 
+#define AT91C_HDMA_DIS0       (0x1 <<  0) // (HDMA) Write one to this field to disable the channel 0.
+#define 	AT91C_HDMA_DIS0_0                    (0x0) // (HDMA) No effect.
+#define 	AT91C_HDMA_DIS0_1                    (0x1) // (HDMA) Disables the channel 0.
+#define AT91C_HDMA_DIS1       (0x1 <<  1) // (HDMA) Write one to this field to disable the channel 1.
+#define 	AT91C_HDMA_DIS1_0                    (0x0 <<  1) // (HDMA) No effect.
+#define 	AT91C_HDMA_DIS1_1                    (0x1 <<  1) // (HDMA) Disables the channel 1.
+#define AT91C_HDMA_DIS2       (0x1 <<  2) // (HDMA) Write one to this field to disable the channel 2.
+#define 	AT91C_HDMA_DIS2_0                    (0x0 <<  2) // (HDMA) No effect.
+#define 	AT91C_HDMA_DIS2_1                    (0x1 <<  2) // (HDMA) Disables the channel 2.
+#define AT91C_HDMA_DIS3       (0x1 <<  3) // (HDMA) Write one to this field to disable the channel 3.
+#define 	AT91C_HDMA_DIS3_0                    (0x0 <<  3) // (HDMA) No effect.
+#define 	AT91C_HDMA_DIS3_1                    (0x1 <<  3) // (HDMA) Disables the channel 3.
+#define AT91C_HDMA_DIS4       (0x1 <<  4) // (HDMA) Write one to this field to disable the channel 4.
+#define 	AT91C_HDMA_DIS4_0                    (0x0 <<  4) // (HDMA) No effect.
+#define 	AT91C_HDMA_DIS4_1                    (0x1 <<  4) // (HDMA) Disables the channel 4.
+#define AT91C_HDMA_DIS5       (0x1 <<  5) // (HDMA) Write one to this field to disable the channel 5.
+#define 	AT91C_HDMA_DIS5_0                    (0x0 <<  5) // (HDMA) No effect.
+#define 	AT91C_HDMA_DIS5_1                    (0x1 <<  5) // (HDMA) Disables the channel 5.
+#define AT91C_HDMA_DIS6       (0x1 <<  6) // (HDMA) Write one to this field to disable the channel 6.
+#define 	AT91C_HDMA_DIS6_0                    (0x0 <<  6) // (HDMA) No effect.
+#define 	AT91C_HDMA_DIS6_1                    (0x1 <<  6) // (HDMA) Disables the channel 6.
+#define AT91C_HDMA_DIS7       (0x1 <<  7) // (HDMA) Write one to this field to disable the channel 7.
+#define 	AT91C_HDMA_DIS7_0                    (0x0 <<  7) // (HDMA) No effect.
+#define 	AT91C_HDMA_DIS7_1                    (0x1 <<  7) // (HDMA) Disables the channel 7.
+#define AT91C_HDMA_RES0       (0x1 <<  8) // (HDMA) Write one to this field to resume the channel 0 transfer restoring its context.
+#define 	AT91C_HDMA_RES0_0                    (0x0 <<  8) // (HDMA) No effect.
+#define 	AT91C_HDMA_RES0_1                    (0x1 <<  8) // (HDMA) Resumes the channel 0.
+#define AT91C_HDMA_RES1       (0x1 <<  9) // (HDMA) Write one to this field to resume the channel 1 transfer restoring its context.
+#define 	AT91C_HDMA_RES1_0                    (0x0 <<  9) // (HDMA) No effect.
+#define 	AT91C_HDMA_RES1_1                    (0x1 <<  9) // (HDMA) Resumes the channel 1.
+#define AT91C_HDMA_RES2       (0x1 << 10) // (HDMA) Write one to this field to resume the channel 2 transfer restoring its context.
+#define 	AT91C_HDMA_RES2_0                    (0x0 << 10) // (HDMA) No effect.
+#define 	AT91C_HDMA_RES2_1                    (0x1 << 10) // (HDMA) Resumes the channel 2.
+#define AT91C_HDMA_RES3       (0x1 << 11) // (HDMA) Write one to this field to resume the channel 3 transfer restoring its context.
+#define 	AT91C_HDMA_RES3_0                    (0x0 << 11) // (HDMA) No effect.
+#define 	AT91C_HDMA_RES3_1                    (0x1 << 11) // (HDMA) Resumes the channel 3.
+#define AT91C_HDMA_RES4       (0x1 << 12) // (HDMA) Write one to this field to resume the channel 4 transfer restoring its context.
+#define 	AT91C_HDMA_RES4_0                    (0x0 << 12) // (HDMA) No effect.
+#define 	AT91C_HDMA_RES4_1                    (0x1 << 12) // (HDMA) Resumes the channel 4.
+#define AT91C_HDMA_RES5       (0x1 << 13) // (HDMA) Write one to this field to resume the channel 5 transfer restoring its context.
+#define 	AT91C_HDMA_RES5_0                    (0x0 << 13) // (HDMA) No effect.
+#define 	AT91C_HDMA_RES5_1                    (0x1 << 13) // (HDMA) Resumes the channel 5.
+#define AT91C_HDMA_RES6       (0x1 << 14) // (HDMA) Write one to this field to resume the channel 6 transfer restoring its context.
+#define 	AT91C_HDMA_RES6_0                    (0x0 << 14) // (HDMA) No effect.
+#define 	AT91C_HDMA_RES6_1                    (0x1 << 14) // (HDMA) Resumes the channel 6.
+#define AT91C_HDMA_RES7       (0x1 << 15) // (HDMA) Write one to this field to resume the channel 7 transfer restoring its context.
+#define 	AT91C_HDMA_RES7_0                    (0x0 << 15) // (HDMA) No effect.
+#define 	AT91C_HDMA_RES7_1                    (0x1 << 15) // (HDMA) Resumes the channel 7.
+// -------- HDMA_CHSR : (HDMA Offset: 0x30)  -------- 
+#define AT91C_HDMA_EMPT0      (0x1 << 16) // (HDMA) When set, channel 0 is empty.
+#define 	AT91C_HDMA_EMPT0_0                    (0x0 << 16) // (HDMA) No effect.
+#define 	AT91C_HDMA_EMPT0_1                    (0x1 << 16) // (HDMA) Channel 0 empty.
+#define AT91C_HDMA_EMPT1      (0x1 << 17) // (HDMA) When set, channel 1 is empty.
+#define 	AT91C_HDMA_EMPT1_0                    (0x0 << 17) // (HDMA) No effect.
+#define 	AT91C_HDMA_EMPT1_1                    (0x1 << 17) // (HDMA) Channel 1 empty.
+#define AT91C_HDMA_EMPT2      (0x1 << 18) // (HDMA) When set, channel 2 is empty.
+#define 	AT91C_HDMA_EMPT2_0                    (0x0 << 18) // (HDMA) No effect.
+#define 	AT91C_HDMA_EMPT2_1                    (0x1 << 18) // (HDMA) Channel 2 empty.
+#define AT91C_HDMA_EMPT3      (0x1 << 19) // (HDMA) When set, channel 3 is empty.
+#define 	AT91C_HDMA_EMPT3_0                    (0x0 << 19) // (HDMA) No effect.
+#define 	AT91C_HDMA_EMPT3_1                    (0x1 << 19) // (HDMA) Channel 3 empty.
+#define AT91C_HDMA_EMPT4      (0x1 << 20) // (HDMA) When set, channel 4 is empty.
+#define 	AT91C_HDMA_EMPT4_0                    (0x0 << 20) // (HDMA) No effect.
+#define 	AT91C_HDMA_EMPT4_1                    (0x1 << 20) // (HDMA) Channel 4 empty.
+#define AT91C_HDMA_EMPT5      (0x1 << 21) // (HDMA) When set, channel 5 is empty.
+#define 	AT91C_HDMA_EMPT5_0                    (0x0 << 21) // (HDMA) No effect.
+#define 	AT91C_HDMA_EMPT5_1                    (0x1 << 21) // (HDMA) Channel 5 empty.
+#define AT91C_HDMA_EMPT6      (0x1 << 22) // (HDMA) When set, channel 6 is empty.
+#define 	AT91C_HDMA_EMPT6_0                    (0x0 << 22) // (HDMA) No effect.
+#define 	AT91C_HDMA_EMPT6_1                    (0x1 << 22) // (HDMA) Channel 6 empty.
+#define AT91C_HDMA_EMPT7      (0x1 << 23) // (HDMA) When set, channel 7 is empty.
+#define 	AT91C_HDMA_EMPT7_0                    (0x0 << 23) // (HDMA) No effect.
+#define 	AT91C_HDMA_EMPT7_1                    (0x1 << 23) // (HDMA) Channel 7 empty.
+#define AT91C_HDMA_STAL0      (0x1 << 24) // (HDMA) When set, channel 0 is stalled.
+#define 	AT91C_HDMA_STAL0_0                    (0x0 << 24) // (HDMA) No effect.
+#define 	AT91C_HDMA_STAL0_1                    (0x1 << 24) // (HDMA) Channel 0 stalled.
+#define AT91C_HDMA_STAL1      (0x1 << 25) // (HDMA) When set, channel 1 is stalled.
+#define 	AT91C_HDMA_STAL1_0                    (0x0 << 25) // (HDMA) No effect.
+#define 	AT91C_HDMA_STAL1_1                    (0x1 << 25) // (HDMA) Channel 1 stalled.
+#define AT91C_HDMA_STAL2      (0x1 << 26) // (HDMA) When set, channel 2 is stalled.
+#define 	AT91C_HDMA_STAL2_0                    (0x0 << 26) // (HDMA) No effect.
+#define 	AT91C_HDMA_STAL2_1                    (0x1 << 26) // (HDMA) Channel 2 stalled.
+#define AT91C_HDMA_STAL3      (0x1 << 27) // (HDMA) When set, channel 3 is stalled.
+#define 	AT91C_HDMA_STAL3_0                    (0x0 << 27) // (HDMA) No effect.
+#define 	AT91C_HDMA_STAL3_1                    (0x1 << 27) // (HDMA) Channel 3 stalled.
+#define AT91C_HDMA_STAL4      (0x1 << 28) // (HDMA) When set, channel 4 is stalled.
+#define 	AT91C_HDMA_STAL4_0                    (0x0 << 28) // (HDMA) No effect.
+#define 	AT91C_HDMA_STAL4_1                    (0x1 << 28) // (HDMA) Channel 4 stalled.
+#define AT91C_HDMA_STAL5      (0x1 << 29) // (HDMA) When set, channel 5 is stalled.
+#define 	AT91C_HDMA_STAL5_0                    (0x0 << 29) // (HDMA) No effect.
+#define 	AT91C_HDMA_STAL5_1                    (0x1 << 29) // (HDMA) Channel 5 stalled.
+#define AT91C_HDMA_STAL6      (0x1 << 30) // (HDMA) When set, channel 6 is stalled.
+#define 	AT91C_HDMA_STAL6_0                    (0x0 << 30) // (HDMA) No effect.
+#define 	AT91C_HDMA_STAL6_1                    (0x1 << 30) // (HDMA) Channel 6 stalled.
+#define AT91C_HDMA_STAL7      (0x1 << 31) // (HDMA) When set, channel 7 is stalled.
+#define 	AT91C_HDMA_STAL7_0                    (0x0 << 31) // (HDMA) No effect.
+#define 	AT91C_HDMA_STAL7_1                    (0x1 << 31) // (HDMA) Channel 7 stalled.
+// -------- HDMA_VER : (HDMA Offset: 0x1fc)  -------- 
+
+// *****************************************************************************
+//               REGISTER ADDRESS DEFINITION FOR AT91SAM3U4
+// *****************************************************************************
+// ========== Register definition for SYS peripheral ========== 
+#define AT91C_SYS_GPBR  (AT91_CAST(AT91_REG *) 	0x400E1290) // (SYS) General Purpose Register
+// ========== Register definition for HSMC4_CS0 peripheral ========== 
+#define AT91C_CS0_MODE  (AT91_CAST(AT91_REG *) 	0x400E0080) // (HSMC4_CS0) Mode Register
+#define AT91C_CS0_PULSE (AT91_CAST(AT91_REG *) 	0x400E0074) // (HSMC4_CS0) Pulse Register
+#define AT91C_CS0_CYCLE (AT91_CAST(AT91_REG *) 	0x400E0078) // (HSMC4_CS0) Cycle Register
+#define AT91C_CS0_TIMINGS (AT91_CAST(AT91_REG *) 	0x400E007C) // (HSMC4_CS0) Timmings Register
+#define AT91C_CS0_SETUP (AT91_CAST(AT91_REG *) 	0x400E0070) // (HSMC4_CS0) Setup Register
+// ========== Register definition for HSMC4_CS1 peripheral ========== 
+#define AT91C_CS1_CYCLE (AT91_CAST(AT91_REG *) 	0x400E008C) // (HSMC4_CS1) Cycle Register
+#define AT91C_CS1_PULSE (AT91_CAST(AT91_REG *) 	0x400E0088) // (HSMC4_CS1) Pulse Register
+#define AT91C_CS1_MODE  (AT91_CAST(AT91_REG *) 	0x400E0094) // (HSMC4_CS1) Mode Register
+#define AT91C_CS1_SETUP (AT91_CAST(AT91_REG *) 	0x400E0084) // (HSMC4_CS1) Setup Register
+#define AT91C_CS1_TIMINGS (AT91_CAST(AT91_REG *) 	0x400E0090) // (HSMC4_CS1) Timmings Register
+// ========== Register definition for HSMC4_CS2 peripheral ========== 
+#define AT91C_CS2_PULSE (AT91_CAST(AT91_REG *) 	0x400E009C) // (HSMC4_CS2) Pulse Register
+#define AT91C_CS2_TIMINGS (AT91_CAST(AT91_REG *) 	0x400E00A4) // (HSMC4_CS2) Timmings Register
+#define AT91C_CS2_CYCLE (AT91_CAST(AT91_REG *) 	0x400E00A0) // (HSMC4_CS2) Cycle Register
+#define AT91C_CS2_MODE  (AT91_CAST(AT91_REG *) 	0x400E00A8) // (HSMC4_CS2) Mode Register
+#define AT91C_CS2_SETUP (AT91_CAST(AT91_REG *) 	0x400E0098) // (HSMC4_CS2) Setup Register
+// ========== Register definition for HSMC4_CS3 peripheral ========== 
+#define AT91C_CS3_MODE  (AT91_CAST(AT91_REG *) 	0x400E00BC) // (HSMC4_CS3) Mode Register
+#define AT91C_CS3_TIMINGS (AT91_CAST(AT91_REG *) 	0x400E00B8) // (HSMC4_CS3) Timmings Register
+#define AT91C_CS3_SETUP (AT91_CAST(AT91_REG *) 	0x400E00AC) // (HSMC4_CS3) Setup Register
+#define AT91C_CS3_CYCLE (AT91_CAST(AT91_REG *) 	0x400E00B4) // (HSMC4_CS3) Cycle Register
+#define AT91C_CS3_PULSE (AT91_CAST(AT91_REG *) 	0x400E00B0) // (HSMC4_CS3) Pulse Register
+// ========== Register definition for HSMC4_NFC peripheral ========== 
+#define AT91C_NFC_MODE  (AT91_CAST(AT91_REG *) 	0x400E010C) // (HSMC4_NFC) Mode Register
+#define AT91C_NFC_CYCLE (AT91_CAST(AT91_REG *) 	0x400E0104) // (HSMC4_NFC) Cycle Register
+#define AT91C_NFC_PULSE (AT91_CAST(AT91_REG *) 	0x400E0100) // (HSMC4_NFC) Pulse Register
+#define AT91C_NFC_SETUP (AT91_CAST(AT91_REG *) 	0x400E00FC) // (HSMC4_NFC) Setup Register
+#define AT91C_NFC_TIMINGS (AT91_CAST(AT91_REG *) 	0x400E0108) // (HSMC4_NFC) Timmings Register
+// ========== Register definition for HSMC4 peripheral ========== 
+#define AT91C_HSMC4_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400E01F0) // (HSMC4) Write Protection Status Register
+#define AT91C_HSMC4_ECCPR6 (AT91_CAST(AT91_REG *) 	0x400E0048) // (HSMC4) ECC Parity register 6
+#define AT91C_HSMC4_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400E01EC) // (HSMC4) Write Protection Status Register
+#define AT91C_HSMC4_ECCPR11 (AT91_CAST(AT91_REG *) 	0x400E005C) // (HSMC4) ECC Parity register 11
+#define AT91C_HSMC4_SR  (AT91_CAST(AT91_REG *) 	0x400E0008) // (HSMC4) Status Register
+#define AT91C_HSMC4_IMR (AT91_CAST(AT91_REG *) 	0x400E0014) // (HSMC4) Interrupt Mask Register
+#define AT91C_HSMC4_WPSR (AT91_CAST(AT91_REG *) 	0x400E01E8) // (HSMC4) Write Protection Status Register
+#define AT91C_HSMC4_BANK (AT91_CAST(AT91_REG *) 	0x400E001C) // (HSMC4) Bank Register
+#define AT91C_HSMC4_ECCPR8 (AT91_CAST(AT91_REG *) 	0x400E0050) // (HSMC4) ECC Parity register 8
+#define AT91C_HSMC4_WPCR (AT91_CAST(AT91_REG *) 	0x400E01E4) // (HSMC4) Write Protection Control register
+#define AT91C_HSMC4_ECCPR2 (AT91_CAST(AT91_REG *) 	0x400E0038) // (HSMC4) ECC Parity register 2
+#define AT91C_HSMC4_ECCPR1 (AT91_CAST(AT91_REG *) 	0x400E0030) // (HSMC4) ECC Parity register 1
+#define AT91C_HSMC4_ECCSR2 (AT91_CAST(AT91_REG *) 	0x400E0034) // (HSMC4) ECC Status register 2
+#define AT91C_HSMC4_OCMS (AT91_CAST(AT91_REG *) 	0x400E0110) // (HSMC4) OCMS MODE register
+#define AT91C_HSMC4_ECCPR9 (AT91_CAST(AT91_REG *) 	0x400E0054) // (HSMC4) ECC Parity register 9
+#define AT91C_HSMC4_DUMMY (AT91_CAST(AT91_REG *) 	0x400E0200) // (HSMC4) This rtegister was created only ti have AHB constants
+#define AT91C_HSMC4_ECCPR5 (AT91_CAST(AT91_REG *) 	0x400E0044) // (HSMC4) ECC Parity register 5
+#define AT91C_HSMC4_ECCCR (AT91_CAST(AT91_REG *) 	0x400E0020) // (HSMC4) ECC reset register
+#define AT91C_HSMC4_KEY2 (AT91_CAST(AT91_REG *) 	0x400E0118) // (HSMC4) KEY2 Register
+#define AT91C_HSMC4_IER (AT91_CAST(AT91_REG *) 	0x400E000C) // (HSMC4) Interrupt Enable Register
+#define AT91C_HSMC4_ECCSR1 (AT91_CAST(AT91_REG *) 	0x400E0028) // (HSMC4) ECC Status register 1
+#define AT91C_HSMC4_IDR (AT91_CAST(AT91_REG *) 	0x400E0010) // (HSMC4) Interrupt Disable Register
+#define AT91C_HSMC4_ECCPR0 (AT91_CAST(AT91_REG *) 	0x400E002C) // (HSMC4) ECC Parity register 0
+#define AT91C_HSMC4_FEATURES (AT91_CAST(AT91_REG *) 	0x400E01F8) // (HSMC4) Write Protection Status Register
+#define AT91C_HSMC4_ECCPR7 (AT91_CAST(AT91_REG *) 	0x400E004C) // (HSMC4) ECC Parity register 7
+#define AT91C_HSMC4_ECCPR12 (AT91_CAST(AT91_REG *) 	0x400E0060) // (HSMC4) ECC Parity register 12
+#define AT91C_HSMC4_ECCPR10 (AT91_CAST(AT91_REG *) 	0x400E0058) // (HSMC4) ECC Parity register 10
+#define AT91C_HSMC4_KEY1 (AT91_CAST(AT91_REG *) 	0x400E0114) // (HSMC4) KEY1 Register
+#define AT91C_HSMC4_VER (AT91_CAST(AT91_REG *) 	0x400E01FC) // (HSMC4) HSMC4 Version Register
+#define AT91C_HSMC4_Eccpr15 (AT91_CAST(AT91_REG *) 	0x400E006C) // (HSMC4) ECC Parity register 15
+#define AT91C_HSMC4_ECCPR4 (AT91_CAST(AT91_REG *) 	0x400E0040) // (HSMC4) ECC Parity register 4
+#define AT91C_HSMC4_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400E01F4) // (HSMC4) Write Protection Status Register
+#define AT91C_HSMC4_ECCCMD (AT91_CAST(AT91_REG *) 	0x400E0024) // (HSMC4) ECC Page size register
+#define AT91C_HSMC4_ADDR (AT91_CAST(AT91_REG *) 	0x400E0018) // (HSMC4) Address Cycle Zero Register
+#define AT91C_HSMC4_ECCPR3 (AT91_CAST(AT91_REG *) 	0x400E003C) // (HSMC4) ECC Parity register 3
+#define AT91C_HSMC4_CFG (AT91_CAST(AT91_REG *) 	0x400E0000) // (HSMC4) Configuration Register
+#define AT91C_HSMC4_CTRL (AT91_CAST(AT91_REG *) 	0x400E0004) // (HSMC4) Control Register
+#define AT91C_HSMC4_ECCPR13 (AT91_CAST(AT91_REG *) 	0x400E0064) // (HSMC4) ECC Parity register 13
+#define AT91C_HSMC4_ECCPR14 (AT91_CAST(AT91_REG *) 	0x400E0068) // (HSMC4) ECC Parity register 14
+// ========== Register definition for MATRIX peripheral ========== 
+#define AT91C_MATRIX_SFR2  (AT91_CAST(AT91_REG *) 	0x400E0318) // (MATRIX)  Special Function Register 2
+#define AT91C_MATRIX_SFR3  (AT91_CAST(AT91_REG *) 	0x400E031C) // (MATRIX)  Special Function Register 3
+#define AT91C_MATRIX_SCFG8 (AT91_CAST(AT91_REG *) 	0x400E0260) // (MATRIX)  Slave Configuration Register 8
+#define AT91C_MATRIX_MCFG2 (AT91_CAST(AT91_REG *) 	0x400E0208) // (MATRIX)  Master Configuration Register 2
+#define AT91C_MATRIX_MCFG7 (AT91_CAST(AT91_REG *) 	0x400E021C) // (MATRIX)  Master Configuration Register 7
+#define AT91C_MATRIX_SCFG3 (AT91_CAST(AT91_REG *) 	0x400E024C) // (MATRIX)  Slave Configuration Register 3
+#define AT91C_MATRIX_SCFG0 (AT91_CAST(AT91_REG *) 	0x400E0240) // (MATRIX)  Slave Configuration Register 0
+#define AT91C_MATRIX_SFR12 (AT91_CAST(AT91_REG *) 	0x400E0340) // (MATRIX)  Special Function Register 12
+#define AT91C_MATRIX_SCFG1 (AT91_CAST(AT91_REG *) 	0x400E0244) // (MATRIX)  Slave Configuration Register 1
+#define AT91C_MATRIX_SFR8  (AT91_CAST(AT91_REG *) 	0x400E0330) // (MATRIX)  Special Function Register 8
+#define AT91C_MATRIX_VER (AT91_CAST(AT91_REG *) 	0x400E03FC) // (MATRIX) HMATRIX2 VERSION REGISTER 
+#define AT91C_MATRIX_SFR13 (AT91_CAST(AT91_REG *) 	0x400E0344) // (MATRIX)  Special Function Register 13
+#define AT91C_MATRIX_SFR5  (AT91_CAST(AT91_REG *) 	0x400E0324) // (MATRIX)  Special Function Register 5
+#define AT91C_MATRIX_MCFG0 (AT91_CAST(AT91_REG *) 	0x400E0200) // (MATRIX)  Master Configuration Register 0 : ARM I and D
+#define AT91C_MATRIX_SCFG6 (AT91_CAST(AT91_REG *) 	0x400E0258) // (MATRIX)  Slave Configuration Register 6
+#define AT91C_MATRIX_SFR14 (AT91_CAST(AT91_REG *) 	0x400E0348) // (MATRIX)  Special Function Register 14
+#define AT91C_MATRIX_SFR1  (AT91_CAST(AT91_REG *) 	0x400E0314) // (MATRIX)  Special Function Register 1
+#define AT91C_MATRIX_SFR15 (AT91_CAST(AT91_REG *) 	0x400E034C) // (MATRIX)  Special Function Register 15
+#define AT91C_MATRIX_SFR6  (AT91_CAST(AT91_REG *) 	0x400E0328) // (MATRIX)  Special Function Register 6
+#define AT91C_MATRIX_SFR11 (AT91_CAST(AT91_REG *) 	0x400E033C) // (MATRIX)  Special Function Register 11
+#define AT91C_MATRIX_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400E03F4) // (MATRIX) HMATRIX2 IPNAME2 REGISTER 
+#define AT91C_MATRIX_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400E03EC) // (MATRIX) HMATRIX2 ADDRSIZE REGISTER 
+#define AT91C_MATRIX_MCFG5 (AT91_CAST(AT91_REG *) 	0x400E0214) // (MATRIX)  Master Configuration Register 5
+#define AT91C_MATRIX_SFR9  (AT91_CAST(AT91_REG *) 	0x400E0334) // (MATRIX)  Special Function Register 9
+#define AT91C_MATRIX_MCFG3 (AT91_CAST(AT91_REG *) 	0x400E020C) // (MATRIX)  Master Configuration Register 3
+#define AT91C_MATRIX_SCFG4 (AT91_CAST(AT91_REG *) 	0x400E0250) // (MATRIX)  Slave Configuration Register 4
+#define AT91C_MATRIX_MCFG1 (AT91_CAST(AT91_REG *) 	0x400E0204) // (MATRIX)  Master Configuration Register 1 : ARM S
+#define AT91C_MATRIX_SCFG7 (AT91_CAST(AT91_REG *) 	0x400E025C) // (MATRIX)  Slave Configuration Register 5
+#define AT91C_MATRIX_SFR10 (AT91_CAST(AT91_REG *) 	0x400E0338) // (MATRIX)  Special Function Register 10
+#define AT91C_MATRIX_SCFG2 (AT91_CAST(AT91_REG *) 	0x400E0248) // (MATRIX)  Slave Configuration Register 2
+#define AT91C_MATRIX_SFR7  (AT91_CAST(AT91_REG *) 	0x400E032C) // (MATRIX)  Special Function Register 7
+#define AT91C_MATRIX_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400E03F0) // (MATRIX) HMATRIX2 IPNAME1 REGISTER 
+#define AT91C_MATRIX_MCFG4 (AT91_CAST(AT91_REG *) 	0x400E0210) // (MATRIX)  Master Configuration Register 4
+#define AT91C_MATRIX_SFR0  (AT91_CAST(AT91_REG *) 	0x400E0310) // (MATRIX)  Special Function Register 0
+#define AT91C_MATRIX_FEATURES (AT91_CAST(AT91_REG *) 	0x400E03F8) // (MATRIX) HMATRIX2 FEATURES REGISTER 
+#define AT91C_MATRIX_SCFG5 (AT91_CAST(AT91_REG *) 	0x400E0254) // (MATRIX)  Slave Configuration Register 5
+#define AT91C_MATRIX_MCFG6 (AT91_CAST(AT91_REG *) 	0x400E0218) // (MATRIX)  Master Configuration Register 6
+#define AT91C_MATRIX_SCFG9 (AT91_CAST(AT91_REG *) 	0x400E0264) // (MATRIX)  Slave Configuration Register 9
+#define AT91C_MATRIX_SFR4  (AT91_CAST(AT91_REG *) 	0x400E0320) // (MATRIX)  Special Function Register 4
+// ========== Register definition for NVIC peripheral ========== 
+#define AT91C_NVIC_MMAR (AT91_CAST(AT91_REG *) 	0xE000ED34) // (NVIC) Mem Manage Address Register
+#define AT91C_NVIC_STIR (AT91_CAST(AT91_REG *) 	0xE000EF00) // (NVIC) Software Trigger Interrupt Register
+#define AT91C_NVIC_MMFR2 (AT91_CAST(AT91_REG *) 	0xE000ED58) // (NVIC) Memory Model Feature register2
+#define AT91C_NVIC_CPUID (AT91_CAST(AT91_REG *) 	0xE000ED00) // (NVIC) CPUID Base Register
+#define AT91C_NVIC_DFSR (AT91_CAST(AT91_REG *) 	0xE000ED30) // (NVIC) Debug Fault Status Register
+#define AT91C_NVIC_HAND4PR (AT91_CAST(AT91_REG *) 	0xE000ED18) // (NVIC) System Handlers 4-7 Priority Register
+#define AT91C_NVIC_HFSR (AT91_CAST(AT91_REG *) 	0xE000ED2C) // (NVIC) Hard Fault Status Register
+#define AT91C_NVIC_PID6 (AT91_CAST(AT91_REG *) 	0xE000EFD8) // (NVIC) Peripheral identification register
+#define AT91C_NVIC_PFR0 (AT91_CAST(AT91_REG *) 	0xE000ED40) // (NVIC) Processor Feature register0
+#define AT91C_NVIC_VTOFFR (AT91_CAST(AT91_REG *) 	0xE000ED08) // (NVIC) Vector Table Offset Register
+#define AT91C_NVIC_ISPR (AT91_CAST(AT91_REG *) 	0xE000E200) // (NVIC) Set Pending Register
+#define AT91C_NVIC_PID0 (AT91_CAST(AT91_REG *) 	0xE000EFE0) // (NVIC) Peripheral identification register b7:0
+#define AT91C_NVIC_PID7 (AT91_CAST(AT91_REG *) 	0xE000EFDC) // (NVIC) Peripheral identification register
+#define AT91C_NVIC_STICKRVR (AT91_CAST(AT91_REG *) 	0xE000E014) // (NVIC) SysTick Reload Value Register
+#define AT91C_NVIC_PID2 (AT91_CAST(AT91_REG *) 	0xE000EFE8) // (NVIC) Peripheral identification register b23:16
+#define AT91C_NVIC_ISAR0 (AT91_CAST(AT91_REG *) 	0xE000ED60) // (NVIC) ISA Feature register0
+#define AT91C_NVIC_SCR  (AT91_CAST(AT91_REG *) 	0xE000ED10) // (NVIC) System Control Register
+#define AT91C_NVIC_PID4 (AT91_CAST(AT91_REG *) 	0xE000EFD0) // (NVIC) Peripheral identification register
+#define AT91C_NVIC_ISAR2 (AT91_CAST(AT91_REG *) 	0xE000ED68) // (NVIC) ISA Feature register2
+#define AT91C_NVIC_ISER (AT91_CAST(AT91_REG *) 	0xE000E100) // (NVIC) Set Enable Register
+#define AT91C_NVIC_IPR  (AT91_CAST(AT91_REG *) 	0xE000E400) // (NVIC) Interrupt Mask Register
+#define AT91C_NVIC_AIRCR (AT91_CAST(AT91_REG *) 	0xE000ED0C) // (NVIC) Application Interrupt/Reset Control Reg
+#define AT91C_NVIC_CID2 (AT91_CAST(AT91_REG *) 	0xE000EFF8) // (NVIC) Component identification register b23:16
+#define AT91C_NVIC_ICPR (AT91_CAST(AT91_REG *) 	0xE000E280) // (NVIC) Clear Pending Register
+#define AT91C_NVIC_CID3 (AT91_CAST(AT91_REG *) 	0xE000EFFC) // (NVIC) Component identification register b31:24
+#define AT91C_NVIC_CFSR (AT91_CAST(AT91_REG *) 	0xE000ED28) // (NVIC) Configurable Fault Status Register
+#define AT91C_NVIC_AFR0 (AT91_CAST(AT91_REG *) 	0xE000ED4C) // (NVIC) Auxiliary Feature register0
+#define AT91C_NVIC_ICSR (AT91_CAST(AT91_REG *) 	0xE000ED04) // (NVIC) Interrupt Control State Register
+#define AT91C_NVIC_CCR  (AT91_CAST(AT91_REG *) 	0xE000ED14) // (NVIC) Configuration Control Register
+#define AT91C_NVIC_CID0 (AT91_CAST(AT91_REG *) 	0xE000EFF0) // (NVIC) Component identification register b7:0
+#define AT91C_NVIC_ISAR1 (AT91_CAST(AT91_REG *) 	0xE000ED64) // (NVIC) ISA Feature register1
+#define AT91C_NVIC_STICKCVR (AT91_CAST(AT91_REG *) 	0xE000E018) // (NVIC) SysTick Current Value Register
+#define AT91C_NVIC_STICKCSR (AT91_CAST(AT91_REG *) 	0xE000E010) // (NVIC) SysTick Control and Status Register
+#define AT91C_NVIC_CID1 (AT91_CAST(AT91_REG *) 	0xE000EFF4) // (NVIC) Component identification register b15:8
+#define AT91C_NVIC_DFR0 (AT91_CAST(AT91_REG *) 	0xE000ED48) // (NVIC) Debug Feature register0
+#define AT91C_NVIC_MMFR3 (AT91_CAST(AT91_REG *) 	0xE000ED5C) // (NVIC) Memory Model Feature register3
+#define AT91C_NVIC_MMFR0 (AT91_CAST(AT91_REG *) 	0xE000ED50) // (NVIC) Memory Model Feature register0
+#define AT91C_NVIC_STICKCALVR (AT91_CAST(AT91_REG *) 	0xE000E01C) // (NVIC) SysTick Calibration Value Register
+#define AT91C_NVIC_PID1 (AT91_CAST(AT91_REG *) 	0xE000EFE4) // (NVIC) Peripheral identification register b15:8
+#define AT91C_NVIC_HAND12PR (AT91_CAST(AT91_REG *) 	0xE000ED20) // (NVIC) System Handlers 12-15 Priority Register
+#define AT91C_NVIC_MMFR1 (AT91_CAST(AT91_REG *) 	0xE000ED54) // (NVIC) Memory Model Feature register1
+#define AT91C_NVIC_AFSR (AT91_CAST(AT91_REG *) 	0xE000ED3C) // (NVIC) Auxiliary Fault Status Register
+#define AT91C_NVIC_HANDCSR (AT91_CAST(AT91_REG *) 	0xE000ED24) // (NVIC) System Handler Control and State Register
+#define AT91C_NVIC_ISAR4 (AT91_CAST(AT91_REG *) 	0xE000ED70) // (NVIC) ISA Feature register4
+#define AT91C_NVIC_ABR  (AT91_CAST(AT91_REG *) 	0xE000E300) // (NVIC) Active Bit Register
+#define AT91C_NVIC_PFR1 (AT91_CAST(AT91_REG *) 	0xE000ED44) // (NVIC) Processor Feature register1
+#define AT91C_NVIC_PID5 (AT91_CAST(AT91_REG *) 	0xE000EFD4) // (NVIC) Peripheral identification register
+#define AT91C_NVIC_ICTR (AT91_CAST(AT91_REG *) 	0xE000E004) // (NVIC) Interrupt Control Type Register
+#define AT91C_NVIC_ICER (AT91_CAST(AT91_REG *) 	0xE000E180) // (NVIC) Clear enable Register
+#define AT91C_NVIC_PID3 (AT91_CAST(AT91_REG *) 	0xE000EFEC) // (NVIC) Peripheral identification register b31:24
+#define AT91C_NVIC_ISAR3 (AT91_CAST(AT91_REG *) 	0xE000ED6C) // (NVIC) ISA Feature register3
+#define AT91C_NVIC_HAND8PR (AT91_CAST(AT91_REG *) 	0xE000ED1C) // (NVIC) System Handlers 8-11 Priority Register
+#define AT91C_NVIC_BFAR (AT91_CAST(AT91_REG *) 	0xE000ED38) // (NVIC) Bus Fault Address Register
+// ========== Register definition for MPU peripheral ========== 
+#define AT91C_MPU_REG_BASE_ADDR3 (AT91_CAST(AT91_REG *) 	0xE000EDB4) // (MPU) MPU Region Base Address Register alias 3
+#define AT91C_MPU_REG_NB (AT91_CAST(AT91_REG *) 	0xE000ED98) // (MPU) MPU Region Number Register
+#define AT91C_MPU_ATTR_SIZE1 (AT91_CAST(AT91_REG *) 	0xE000EDA8) // (MPU) MPU  Attribute and Size Register alias 1
+#define AT91C_MPU_REG_BASE_ADDR1 (AT91_CAST(AT91_REG *) 	0xE000EDA4) // (MPU) MPU Region Base Address Register alias 1
+#define AT91C_MPU_ATTR_SIZE3 (AT91_CAST(AT91_REG *) 	0xE000EDB8) // (MPU) MPU  Attribute and Size Register alias 3
+#define AT91C_MPU_CTRL  (AT91_CAST(AT91_REG *) 	0xE000ED94) // (MPU) MPU Control Register
+#define AT91C_MPU_ATTR_SIZE2 (AT91_CAST(AT91_REG *) 	0xE000EDB0) // (MPU) MPU  Attribute and Size Register alias 2
+#define AT91C_MPU_REG_BASE_ADDR (AT91_CAST(AT91_REG *) 	0xE000ED9C) // (MPU) MPU Region Base Address Register
+#define AT91C_MPU_REG_BASE_ADDR2 (AT91_CAST(AT91_REG *) 	0xE000EDAC) // (MPU) MPU Region Base Address Register alias 2
+#define AT91C_MPU_ATTR_SIZE (AT91_CAST(AT91_REG *) 	0xE000EDA0) // (MPU) MPU  Attribute and Size Register
+#define AT91C_MPU_TYPE  (AT91_CAST(AT91_REG *) 	0xE000ED90) // (MPU) MPU Type Register
+// ========== Register definition for CM3 peripheral ========== 
+#define AT91C_CM3_SHCSR (AT91_CAST(AT91_REG *) 	0xE000ED24) // (CM3) System Handler Control and State Register
+#define AT91C_CM3_CCR   (AT91_CAST(AT91_REG *) 	0xE000ED14) // (CM3) Configuration Control Register
+#define AT91C_CM3_ICSR  (AT91_CAST(AT91_REG *) 	0xE000ED04) // (CM3) Interrupt Control State Register
+#define AT91C_CM3_CPUID (AT91_CAST(AT91_REG *) 	0xE000ED00) // (CM3) CPU ID Base Register
+#define AT91C_CM3_SCR   (AT91_CAST(AT91_REG *) 	0xE000ED10) // (CM3) System Controller Register
+#define AT91C_CM3_AIRCR (AT91_CAST(AT91_REG *) 	0xE000ED0C) // (CM3) Application Interrupt and Reset Control Register
+#define AT91C_CM3_SHPR  (AT91_CAST(AT91_REG *) 	0xE000ED18) // (CM3) System Handler Priority Register
+#define AT91C_CM3_VTOR  (AT91_CAST(AT91_REG *) 	0xE000ED08) // (CM3) Vector Table Offset Register
+// ========== Register definition for PDC_DBGU peripheral ========== 
+#define AT91C_DBGU_TPR  (AT91_CAST(AT91_REG *) 	0x400E0708) // (PDC_DBGU) Transmit Pointer Register
+#define AT91C_DBGU_PTCR (AT91_CAST(AT91_REG *) 	0x400E0720) // (PDC_DBGU) PDC Transfer Control Register
+#define AT91C_DBGU_TNCR (AT91_CAST(AT91_REG *) 	0x400E071C) // (PDC_DBGU) Transmit Next Counter Register
+#define AT91C_DBGU_PTSR (AT91_CAST(AT91_REG *) 	0x400E0724) // (PDC_DBGU) PDC Transfer Status Register
+#define AT91C_DBGU_RNCR (AT91_CAST(AT91_REG *) 	0x400E0714) // (PDC_DBGU) Receive Next Counter Register
+#define AT91C_DBGU_RPR  (AT91_CAST(AT91_REG *) 	0x400E0700) // (PDC_DBGU) Receive Pointer Register
+#define AT91C_DBGU_TCR  (AT91_CAST(AT91_REG *) 	0x400E070C) // (PDC_DBGU) Transmit Counter Register
+#define AT91C_DBGU_RNPR (AT91_CAST(AT91_REG *) 	0x400E0710) // (PDC_DBGU) Receive Next Pointer Register
+#define AT91C_DBGU_TNPR (AT91_CAST(AT91_REG *) 	0x400E0718) // (PDC_DBGU) Transmit Next Pointer Register
+#define AT91C_DBGU_RCR  (AT91_CAST(AT91_REG *) 	0x400E0704) // (PDC_DBGU) Receive Counter Register
+// ========== Register definition for DBGU peripheral ========== 
+#define AT91C_DBGU_CR   (AT91_CAST(AT91_REG *) 	0x400E0600) // (DBGU) Control Register
+#define AT91C_DBGU_IDR  (AT91_CAST(AT91_REG *) 	0x400E060C) // (DBGU) Interrupt Disable Register
+#define AT91C_DBGU_CIDR (AT91_CAST(AT91_REG *) 	0x400E0740) // (DBGU) Chip ID Register
+#define AT91C_DBGU_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400E06F4) // (DBGU) DBGU IPNAME2 REGISTER 
+#define AT91C_DBGU_FEATURES (AT91_CAST(AT91_REG *) 	0x400E06F8) // (DBGU) DBGU FEATURES REGISTER 
+#define AT91C_DBGU_FNTR (AT91_CAST(AT91_REG *) 	0x400E0648) // (DBGU) Force NTRST Register
+#define AT91C_DBGU_RHR  (AT91_CAST(AT91_REG *) 	0x400E0618) // (DBGU) Receiver Holding Register
+#define AT91C_DBGU_THR  (AT91_CAST(AT91_REG *) 	0x400E061C) // (DBGU) Transmitter Holding Register
+#define AT91C_DBGU_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400E06EC) // (DBGU) DBGU ADDRSIZE REGISTER 
+#define AT91C_DBGU_MR   (AT91_CAST(AT91_REG *) 	0x400E0604) // (DBGU) Mode Register
+#define AT91C_DBGU_IER  (AT91_CAST(AT91_REG *) 	0x400E0608) // (DBGU) Interrupt Enable Register
+#define AT91C_DBGU_BRGR (AT91_CAST(AT91_REG *) 	0x400E0620) // (DBGU) Baud Rate Generator Register
+#define AT91C_DBGU_CSR  (AT91_CAST(AT91_REG *) 	0x400E0614) // (DBGU) Channel Status Register
+#define AT91C_DBGU_VER  (AT91_CAST(AT91_REG *) 	0x400E06FC) // (DBGU) DBGU VERSION REGISTER 
+#define AT91C_DBGU_IMR  (AT91_CAST(AT91_REG *) 	0x400E0610) // (DBGU) Interrupt Mask Register
+#define AT91C_DBGU_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400E06F0) // (DBGU) DBGU IPNAME1 REGISTER 
+#define AT91C_DBGU_EXID (AT91_CAST(AT91_REG *) 	0x400E0744) // (DBGU) Chip ID Extension Register
+// ========== Register definition for PIOA peripheral ========== 
+#define AT91C_PIOA_PDR  (AT91_CAST(AT91_REG *) 	0x400E0C04) // (PIOA) PIO Disable Register
+#define AT91C_PIOA_FRLHSR (AT91_CAST(AT91_REG *) 	0x400E0CD8) // (PIOA) Fall/Rise - Low/High Status Register
+#define AT91C_PIOA_KIMR (AT91_CAST(AT91_REG *) 	0x400E0D38) // (PIOA) Keypad Controller Interrupt Mask Register
+#define AT91C_PIOA_LSR  (AT91_CAST(AT91_REG *) 	0x400E0CC4) // (PIOA) Level Select Register
+#define AT91C_PIOA_IFSR (AT91_CAST(AT91_REG *) 	0x400E0C28) // (PIOA) Input Filter Status Register
+#define AT91C_PIOA_KKRR (AT91_CAST(AT91_REG *) 	0x400E0D44) // (PIOA) Keypad Controller Key Release Register
+#define AT91C_PIOA_ODR  (AT91_CAST(AT91_REG *) 	0x400E0C14) // (PIOA) Output Disable Registerr
+#define AT91C_PIOA_SCIFSR (AT91_CAST(AT91_REG *) 	0x400E0C80) // (PIOA) System Clock Glitch Input Filter Select Register
+#define AT91C_PIOA_PER  (AT91_CAST(AT91_REG *) 	0x400E0C00) // (PIOA) PIO Enable Register
+#define AT91C_PIOA_VER  (AT91_CAST(AT91_REG *) 	0x400E0CFC) // (PIOA) PIO VERSION REGISTER 
+#define AT91C_PIOA_OWSR (AT91_CAST(AT91_REG *) 	0x400E0CA8) // (PIOA) Output Write Status Register
+#define AT91C_PIOA_KSR  (AT91_CAST(AT91_REG *) 	0x400E0D3C) // (PIOA) Keypad Controller Status Register
+#define AT91C_PIOA_IMR  (AT91_CAST(AT91_REG *) 	0x400E0C48) // (PIOA) Interrupt Mask Register
+#define AT91C_PIOA_OWDR (AT91_CAST(AT91_REG *) 	0x400E0CA4) // (PIOA) Output Write Disable Register
+#define AT91C_PIOA_MDSR (AT91_CAST(AT91_REG *) 	0x400E0C58) // (PIOA) Multi-driver Status Register
+#define AT91C_PIOA_IFDR (AT91_CAST(AT91_REG *) 	0x400E0C24) // (PIOA) Input Filter Disable Register
+#define AT91C_PIOA_AIMDR (AT91_CAST(AT91_REG *) 	0x400E0CB4) // (PIOA) Additional Interrupt Modes Disables Register
+#define AT91C_PIOA_CODR (AT91_CAST(AT91_REG *) 	0x400E0C34) // (PIOA) Clear Output Data Register
+#define AT91C_PIOA_SCDR (AT91_CAST(AT91_REG *) 	0x400E0C8C) // (PIOA) Slow Clock Divider Debouncing Register
+#define AT91C_PIOA_KIER (AT91_CAST(AT91_REG *) 	0x400E0D30) // (PIOA) Keypad Controller Interrupt Enable Register
+#define AT91C_PIOA_REHLSR (AT91_CAST(AT91_REG *) 	0x400E0CD4) // (PIOA) Rising Edge/ High Level Select Register
+#define AT91C_PIOA_ISR  (AT91_CAST(AT91_REG *) 	0x400E0C4C) // (PIOA) Interrupt Status Register
+#define AT91C_PIOA_ESR  (AT91_CAST(AT91_REG *) 	0x400E0CC0) // (PIOA) Edge Select Register
+#define AT91C_PIOA_PPUDR (AT91_CAST(AT91_REG *) 	0x400E0C60) // (PIOA) Pull-up Disable Register
+#define AT91C_PIOA_MDDR (AT91_CAST(AT91_REG *) 	0x400E0C54) // (PIOA) Multi-driver Disable Register
+#define AT91C_PIOA_PSR  (AT91_CAST(AT91_REG *) 	0x400E0C08) // (PIOA) PIO Status Register
+#define AT91C_PIOA_PDSR (AT91_CAST(AT91_REG *) 	0x400E0C3C) // (PIOA) Pin Data Status Register
+#define AT91C_PIOA_IFDGSR (AT91_CAST(AT91_REG *) 	0x400E0C88) // (PIOA) Glitch or Debouncing Input Filter Clock Selection Status Register
+#define AT91C_PIOA_FELLSR (AT91_CAST(AT91_REG *) 	0x400E0CD0) // (PIOA) Falling Edge/Low Level Select Register
+#define AT91C_PIOA_PPUSR (AT91_CAST(AT91_REG *) 	0x400E0C68) // (PIOA) Pull-up Status Register
+#define AT91C_PIOA_OER  (AT91_CAST(AT91_REG *) 	0x400E0C10) // (PIOA) Output Enable Register
+#define AT91C_PIOA_OSR  (AT91_CAST(AT91_REG *) 	0x400E0C18) // (PIOA) Output Status Register
+#define AT91C_PIOA_KKPR (AT91_CAST(AT91_REG *) 	0x400E0D40) // (PIOA) Keypad Controller Key Press Register
+#define AT91C_PIOA_AIMMR (AT91_CAST(AT91_REG *) 	0x400E0CB8) // (PIOA) Additional Interrupt Modes Mask Register
+#define AT91C_PIOA_KRCR (AT91_CAST(AT91_REG *) 	0x400E0D24) // (PIOA) Keypad Controller Row Column Register
+#define AT91C_PIOA_IER  (AT91_CAST(AT91_REG *) 	0x400E0C40) // (PIOA) Interrupt Enable Register
+#define AT91C_PIOA_KER  (AT91_CAST(AT91_REG *) 	0x400E0D20) // (PIOA) Keypad Controller Enable Register
+#define AT91C_PIOA_PPUER (AT91_CAST(AT91_REG *) 	0x400E0C64) // (PIOA) Pull-up Enable Register
+#define AT91C_PIOA_KIDR (AT91_CAST(AT91_REG *) 	0x400E0D34) // (PIOA) Keypad Controller Interrupt Disable Register
+#define AT91C_PIOA_ABSR (AT91_CAST(AT91_REG *) 	0x400E0C70) // (PIOA) Peripheral AB Select Register
+#define AT91C_PIOA_LOCKSR (AT91_CAST(AT91_REG *) 	0x400E0CE0) // (PIOA) Lock Status Register
+#define AT91C_PIOA_DIFSR (AT91_CAST(AT91_REG *) 	0x400E0C84) // (PIOA) Debouncing Input Filter Select Register
+#define AT91C_PIOA_MDER (AT91_CAST(AT91_REG *) 	0x400E0C50) // (PIOA) Multi-driver Enable Register
+#define AT91C_PIOA_AIMER (AT91_CAST(AT91_REG *) 	0x400E0CB0) // (PIOA) Additional Interrupt Modes Enable Register
+#define AT91C_PIOA_ELSR (AT91_CAST(AT91_REG *) 	0x400E0CC8) // (PIOA) Edge/Level Status Register
+#define AT91C_PIOA_IFER (AT91_CAST(AT91_REG *) 	0x400E0C20) // (PIOA) Input Filter Enable Register
+#define AT91C_PIOA_KDR  (AT91_CAST(AT91_REG *) 	0x400E0D28) // (PIOA) Keypad Controller Debouncing Register
+#define AT91C_PIOA_IDR  (AT91_CAST(AT91_REG *) 	0x400E0C44) // (PIOA) Interrupt Disable Register
+#define AT91C_PIOA_OWER (AT91_CAST(AT91_REG *) 	0x400E0CA0) // (PIOA) Output Write Enable Register
+#define AT91C_PIOA_ODSR (AT91_CAST(AT91_REG *) 	0x400E0C38) // (PIOA) Output Data Status Register
+#define AT91C_PIOA_SODR (AT91_CAST(AT91_REG *) 	0x400E0C30) // (PIOA) Set Output Data Register
+// ========== Register definition for PIOB peripheral ========== 
+#define AT91C_PIOB_KIDR (AT91_CAST(AT91_REG *) 	0x400E0F34) // (PIOB) Keypad Controller Interrupt Disable Register
+#define AT91C_PIOB_OWSR (AT91_CAST(AT91_REG *) 	0x400E0EA8) // (PIOB) Output Write Status Register
+#define AT91C_PIOB_PSR  (AT91_CAST(AT91_REG *) 	0x400E0E08) // (PIOB) PIO Status Register
+#define AT91C_PIOB_MDER (AT91_CAST(AT91_REG *) 	0x400E0E50) // (PIOB) Multi-driver Enable Register
+#define AT91C_PIOB_ODR  (AT91_CAST(AT91_REG *) 	0x400E0E14) // (PIOB) Output Disable Registerr
+#define AT91C_PIOB_IDR  (AT91_CAST(AT91_REG *) 	0x400E0E44) // (PIOB) Interrupt Disable Register
+#define AT91C_PIOB_AIMER (AT91_CAST(AT91_REG *) 	0x400E0EB0) // (PIOB) Additional Interrupt Modes Enable Register
+#define AT91C_PIOB_DIFSR (AT91_CAST(AT91_REG *) 	0x400E0E84) // (PIOB) Debouncing Input Filter Select Register
+#define AT91C_PIOB_PDR  (AT91_CAST(AT91_REG *) 	0x400E0E04) // (PIOB) PIO Disable Register
+#define AT91C_PIOB_REHLSR (AT91_CAST(AT91_REG *) 	0x400E0ED4) // (PIOB) Rising Edge/ High Level Select Register
+#define AT91C_PIOB_PDSR (AT91_CAST(AT91_REG *) 	0x400E0E3C) // (PIOB) Pin Data Status Register
+#define AT91C_PIOB_PPUDR (AT91_CAST(AT91_REG *) 	0x400E0E60) // (PIOB) Pull-up Disable Register
+#define AT91C_PIOB_LSR  (AT91_CAST(AT91_REG *) 	0x400E0EC4) // (PIOB) Level Select Register
+#define AT91C_PIOB_OWDR (AT91_CAST(AT91_REG *) 	0x400E0EA4) // (PIOB) Output Write Disable Register
+#define AT91C_PIOB_FELLSR (AT91_CAST(AT91_REG *) 	0x400E0ED0) // (PIOB) Falling Edge/Low Level Select Register
+#define AT91C_PIOB_IFER (AT91_CAST(AT91_REG *) 	0x400E0E20) // (PIOB) Input Filter Enable Register
+#define AT91C_PIOB_ABSR (AT91_CAST(AT91_REG *) 	0x400E0E70) // (PIOB) Peripheral AB Select Register
+#define AT91C_PIOB_KIMR (AT91_CAST(AT91_REG *) 	0x400E0F38) // (PIOB) Keypad Controller Interrupt Mask Register
+#define AT91C_PIOB_KKPR (AT91_CAST(AT91_REG *) 	0x400E0F40) // (PIOB) Keypad Controller Key Press Register
+#define AT91C_PIOB_FRLHSR (AT91_CAST(AT91_REG *) 	0x400E0ED8) // (PIOB) Fall/Rise - Low/High Status Register
+#define AT91C_PIOB_AIMDR (AT91_CAST(AT91_REG *) 	0x400E0EB4) // (PIOB) Additional Interrupt Modes Disables Register
+#define AT91C_PIOB_SCIFSR (AT91_CAST(AT91_REG *) 	0x400E0E80) // (PIOB) System Clock Glitch Input Filter Select Register
+#define AT91C_PIOB_VER  (AT91_CAST(AT91_REG *) 	0x400E0EFC) // (PIOB) PIO VERSION REGISTER 
+#define AT91C_PIOB_PER  (AT91_CAST(AT91_REG *) 	0x400E0E00) // (PIOB) PIO Enable Register
+#define AT91C_PIOB_ELSR (AT91_CAST(AT91_REG *) 	0x400E0EC8) // (PIOB) Edge/Level Status Register
+#define AT91C_PIOB_IMR  (AT91_CAST(AT91_REG *) 	0x400E0E48) // (PIOB) Interrupt Mask Register
+#define AT91C_PIOB_PPUSR (AT91_CAST(AT91_REG *) 	0x400E0E68) // (PIOB) Pull-up Status Register
+#define AT91C_PIOB_SCDR (AT91_CAST(AT91_REG *) 	0x400E0E8C) // (PIOB) Slow Clock Divider Debouncing Register
+#define AT91C_PIOB_KSR  (AT91_CAST(AT91_REG *) 	0x400E0F3C) // (PIOB) Keypad Controller Status Register
+#define AT91C_PIOB_IFDGSR (AT91_CAST(AT91_REG *) 	0x400E0E88) // (PIOB) Glitch or Debouncing Input Filter Clock Selection Status Register
+#define AT91C_PIOB_ESR  (AT91_CAST(AT91_REG *) 	0x400E0EC0) // (PIOB) Edge Select Register
+#define AT91C_PIOB_ODSR (AT91_CAST(AT91_REG *) 	0x400E0E38) // (PIOB) Output Data Status Register
+#define AT91C_PIOB_IFDR (AT91_CAST(AT91_REG *) 	0x400E0E24) // (PIOB) Input Filter Disable Register
+#define AT91C_PIOB_SODR (AT91_CAST(AT91_REG *) 	0x400E0E30) // (PIOB) Set Output Data Register
+#define AT91C_PIOB_IER  (AT91_CAST(AT91_REG *) 	0x400E0E40) // (PIOB) Interrupt Enable Register
+#define AT91C_PIOB_MDSR (AT91_CAST(AT91_REG *) 	0x400E0E58) // (PIOB) Multi-driver Status Register
+#define AT91C_PIOB_ISR  (AT91_CAST(AT91_REG *) 	0x400E0E4C) // (PIOB) Interrupt Status Register
+#define AT91C_PIOB_IFSR (AT91_CAST(AT91_REG *) 	0x400E0E28) // (PIOB) Input Filter Status Register
+#define AT91C_PIOB_KER  (AT91_CAST(AT91_REG *) 	0x400E0F20) // (PIOB) Keypad Controller Enable Register
+#define AT91C_PIOB_KKRR (AT91_CAST(AT91_REG *) 	0x400E0F44) // (PIOB) Keypad Controller Key Release Register
+#define AT91C_PIOB_PPUER (AT91_CAST(AT91_REG *) 	0x400E0E64) // (PIOB) Pull-up Enable Register
+#define AT91C_PIOB_LOCKSR (AT91_CAST(AT91_REG *) 	0x400E0EE0) // (PIOB) Lock Status Register
+#define AT91C_PIOB_OWER (AT91_CAST(AT91_REG *) 	0x400E0EA0) // (PIOB) Output Write Enable Register
+#define AT91C_PIOB_KIER (AT91_CAST(AT91_REG *) 	0x400E0F30) // (PIOB) Keypad Controller Interrupt Enable Register
+#define AT91C_PIOB_MDDR (AT91_CAST(AT91_REG *) 	0x400E0E54) // (PIOB) Multi-driver Disable Register
+#define AT91C_PIOB_KRCR (AT91_CAST(AT91_REG *) 	0x400E0F24) // (PIOB) Keypad Controller Row Column Register
+#define AT91C_PIOB_CODR (AT91_CAST(AT91_REG *) 	0x400E0E34) // (PIOB) Clear Output Data Register
+#define AT91C_PIOB_KDR  (AT91_CAST(AT91_REG *) 	0x400E0F28) // (PIOB) Keypad Controller Debouncing Register
+#define AT91C_PIOB_AIMMR (AT91_CAST(AT91_REG *) 	0x400E0EB8) // (PIOB) Additional Interrupt Modes Mask Register
+#define AT91C_PIOB_OER  (AT91_CAST(AT91_REG *) 	0x400E0E10) // (PIOB) Output Enable Register
+#define AT91C_PIOB_OSR  (AT91_CAST(AT91_REG *) 	0x400E0E18) // (PIOB) Output Status Register
+// ========== Register definition for PIOC peripheral ========== 
+#define AT91C_PIOC_FELLSR (AT91_CAST(AT91_REG *) 	0x400E10D0) // (PIOC) Falling Edge/Low Level Select Register
+#define AT91C_PIOC_FRLHSR (AT91_CAST(AT91_REG *) 	0x400E10D8) // (PIOC) Fall/Rise - Low/High Status Register
+#define AT91C_PIOC_MDDR (AT91_CAST(AT91_REG *) 	0x400E1054) // (PIOC) Multi-driver Disable Register
+#define AT91C_PIOC_IFDGSR (AT91_CAST(AT91_REG *) 	0x400E1088) // (PIOC) Glitch or Debouncing Input Filter Clock Selection Status Register
+#define AT91C_PIOC_ABSR (AT91_CAST(AT91_REG *) 	0x400E1070) // (PIOC) Peripheral AB Select Register
+#define AT91C_PIOC_KIMR (AT91_CAST(AT91_REG *) 	0x400E1138) // (PIOC) Keypad Controller Interrupt Mask Register
+#define AT91C_PIOC_KRCR (AT91_CAST(AT91_REG *) 	0x400E1124) // (PIOC) Keypad Controller Row Column Register
+#define AT91C_PIOC_ODSR (AT91_CAST(AT91_REG *) 	0x400E1038) // (PIOC) Output Data Status Register
+#define AT91C_PIOC_OSR  (AT91_CAST(AT91_REG *) 	0x400E1018) // (PIOC) Output Status Register
+#define AT91C_PIOC_IFER (AT91_CAST(AT91_REG *) 	0x400E1020) // (PIOC) Input Filter Enable Register
+#define AT91C_PIOC_KKPR (AT91_CAST(AT91_REG *) 	0x400E1140) // (PIOC) Keypad Controller Key Press Register
+#define AT91C_PIOC_MDSR (AT91_CAST(AT91_REG *) 	0x400E1058) // (PIOC) Multi-driver Status Register
+#define AT91C_PIOC_IFDR (AT91_CAST(AT91_REG *) 	0x400E1024) // (PIOC) Input Filter Disable Register
+#define AT91C_PIOC_MDER (AT91_CAST(AT91_REG *) 	0x400E1050) // (PIOC) Multi-driver Enable Register
+#define AT91C_PIOC_SCDR (AT91_CAST(AT91_REG *) 	0x400E108C) // (PIOC) Slow Clock Divider Debouncing Register
+#define AT91C_PIOC_SCIFSR (AT91_CAST(AT91_REG *) 	0x400E1080) // (PIOC) System Clock Glitch Input Filter Select Register
+#define AT91C_PIOC_IER  (AT91_CAST(AT91_REG *) 	0x400E1040) // (PIOC) Interrupt Enable Register
+#define AT91C_PIOC_KDR  (AT91_CAST(AT91_REG *) 	0x400E1128) // (PIOC) Keypad Controller Debouncing Register
+#define AT91C_PIOC_OWDR (AT91_CAST(AT91_REG *) 	0x400E10A4) // (PIOC) Output Write Disable Register
+#define AT91C_PIOC_IFSR (AT91_CAST(AT91_REG *) 	0x400E1028) // (PIOC) Input Filter Status Register
+#define AT91C_PIOC_ISR  (AT91_CAST(AT91_REG *) 	0x400E104C) // (PIOC) Interrupt Status Register
+#define AT91C_PIOC_PPUDR (AT91_CAST(AT91_REG *) 	0x400E1060) // (PIOC) Pull-up Disable Register
+#define AT91C_PIOC_PDSR (AT91_CAST(AT91_REG *) 	0x400E103C) // (PIOC) Pin Data Status Register
+#define AT91C_PIOC_KKRR (AT91_CAST(AT91_REG *) 	0x400E1144) // (PIOC) Keypad Controller Key Release Register
+#define AT91C_PIOC_AIMDR (AT91_CAST(AT91_REG *) 	0x400E10B4) // (PIOC) Additional Interrupt Modes Disables Register
+#define AT91C_PIOC_LSR  (AT91_CAST(AT91_REG *) 	0x400E10C4) // (PIOC) Level Select Register
+#define AT91C_PIOC_PPUER (AT91_CAST(AT91_REG *) 	0x400E1064) // (PIOC) Pull-up Enable Register
+#define AT91C_PIOC_AIMER (AT91_CAST(AT91_REG *) 	0x400E10B0) // (PIOC) Additional Interrupt Modes Enable Register
+#define AT91C_PIOC_OER  (AT91_CAST(AT91_REG *) 	0x400E1010) // (PIOC) Output Enable Register
+#define AT91C_PIOC_CODR (AT91_CAST(AT91_REG *) 	0x400E1034) // (PIOC) Clear Output Data Register
+#define AT91C_PIOC_AIMMR (AT91_CAST(AT91_REG *) 	0x400E10B8) // (PIOC) Additional Interrupt Modes Mask Register
+#define AT91C_PIOC_OWER (AT91_CAST(AT91_REG *) 	0x400E10A0) // (PIOC) Output Write Enable Register
+#define AT91C_PIOC_VER  (AT91_CAST(AT91_REG *) 	0x400E10FC) // (PIOC) PIO VERSION REGISTER 
+#define AT91C_PIOC_IMR  (AT91_CAST(AT91_REG *) 	0x400E1048) // (PIOC) Interrupt Mask Register
+#define AT91C_PIOC_PPUSR (AT91_CAST(AT91_REG *) 	0x400E1068) // (PIOC) Pull-up Status Register
+#define AT91C_PIOC_IDR  (AT91_CAST(AT91_REG *) 	0x400E1044) // (PIOC) Interrupt Disable Register
+#define AT91C_PIOC_DIFSR (AT91_CAST(AT91_REG *) 	0x400E1084) // (PIOC) Debouncing Input Filter Select Register
+#define AT91C_PIOC_KIDR (AT91_CAST(AT91_REG *) 	0x400E1134) // (PIOC) Keypad Controller Interrupt Disable Register
+#define AT91C_PIOC_KSR  (AT91_CAST(AT91_REG *) 	0x400E113C) // (PIOC) Keypad Controller Status Register
+#define AT91C_PIOC_REHLSR (AT91_CAST(AT91_REG *) 	0x400E10D4) // (PIOC) Rising Edge/ High Level Select Register
+#define AT91C_PIOC_ESR  (AT91_CAST(AT91_REG *) 	0x400E10C0) // (PIOC) Edge Select Register
+#define AT91C_PIOC_KIER (AT91_CAST(AT91_REG *) 	0x400E1130) // (PIOC) Keypad Controller Interrupt Enable Register
+#define AT91C_PIOC_ELSR (AT91_CAST(AT91_REG *) 	0x400E10C8) // (PIOC) Edge/Level Status Register
+#define AT91C_PIOC_SODR (AT91_CAST(AT91_REG *) 	0x400E1030) // (PIOC) Set Output Data Register
+#define AT91C_PIOC_PSR  (AT91_CAST(AT91_REG *) 	0x400E1008) // (PIOC) PIO Status Register
+#define AT91C_PIOC_KER  (AT91_CAST(AT91_REG *) 	0x400E1120) // (PIOC) Keypad Controller Enable Register
+#define AT91C_PIOC_ODR  (AT91_CAST(AT91_REG *) 	0x400E1014) // (PIOC) Output Disable Registerr
+#define AT91C_PIOC_OWSR (AT91_CAST(AT91_REG *) 	0x400E10A8) // (PIOC) Output Write Status Register
+#define AT91C_PIOC_PDR  (AT91_CAST(AT91_REG *) 	0x400E1004) // (PIOC) PIO Disable Register
+#define AT91C_PIOC_LOCKSR (AT91_CAST(AT91_REG *) 	0x400E10E0) // (PIOC) Lock Status Register
+#define AT91C_PIOC_PER  (AT91_CAST(AT91_REG *) 	0x400E1000) // (PIOC) PIO Enable Register
+// ========== Register definition for PMC peripheral ========== 
+#define AT91C_PMC_PLLAR (AT91_CAST(AT91_REG *) 	0x400E0428) // (PMC) PLL Register
+#define AT91C_PMC_UCKR  (AT91_CAST(AT91_REG *) 	0x400E041C) // (PMC) UTMI Clock Configuration Register
+#define AT91C_PMC_FSMR  (AT91_CAST(AT91_REG *) 	0x400E0470) // (PMC) Fast Startup Mode Register
+#define AT91C_PMC_MCKR  (AT91_CAST(AT91_REG *) 	0x400E0430) // (PMC) Master Clock Register
+#define AT91C_PMC_SCER  (AT91_CAST(AT91_REG *) 	0x400E0400) // (PMC) System Clock Enable Register
+#define AT91C_PMC_PCSR  (AT91_CAST(AT91_REG *) 	0x400E0418) // (PMC) Peripheral Clock Status Register
+#define AT91C_PMC_MCFR  (AT91_CAST(AT91_REG *) 	0x400E0424) // (PMC) Main Clock  Frequency Register
+#define AT91C_PMC_FOCR  (AT91_CAST(AT91_REG *) 	0x400E0478) // (PMC) Fault Output Clear Register
+#define AT91C_PMC_FSPR  (AT91_CAST(AT91_REG *) 	0x400E0474) // (PMC) Fast Startup Polarity Register
+#define AT91C_PMC_SCSR  (AT91_CAST(AT91_REG *) 	0x400E0408) // (PMC) System Clock Status Register
+#define AT91C_PMC_IDR   (AT91_CAST(AT91_REG *) 	0x400E0464) // (PMC) Interrupt Disable Register
+#define AT91C_PMC_VER   (AT91_CAST(AT91_REG *) 	0x400E04FC) // (PMC) APMC VERSION REGISTER
+#define AT91C_PMC_IMR   (AT91_CAST(AT91_REG *) 	0x400E046C) // (PMC) Interrupt Mask Register
+#define AT91C_PMC_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400E04F4) // (PMC) PMC IPNAME2 REGISTER 
+#define AT91C_PMC_SCDR  (AT91_CAST(AT91_REG *) 	0x400E0404) // (PMC) System Clock Disable Register
+#define AT91C_PMC_PCKR  (AT91_CAST(AT91_REG *) 	0x400E0440) // (PMC) Programmable Clock Register
+#define AT91C_PMC_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400E04EC) // (PMC) PMC ADDRSIZE REGISTER 
+#define AT91C_PMC_PCDR  (AT91_CAST(AT91_REG *) 	0x400E0414) // (PMC) Peripheral Clock Disable Register
+#define AT91C_PMC_MOR   (AT91_CAST(AT91_REG *) 	0x400E0420) // (PMC) Main Oscillator Register
+#define AT91C_PMC_SR    (AT91_CAST(AT91_REG *) 	0x400E0468) // (PMC) Status Register
+#define AT91C_PMC_IER   (AT91_CAST(AT91_REG *) 	0x400E0460) // (PMC) Interrupt Enable Register
+#define AT91C_PMC_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400E04F0) // (PMC) PMC IPNAME1 REGISTER 
+#define AT91C_PMC_PCER  (AT91_CAST(AT91_REG *) 	0x400E0410) // (PMC) Peripheral Clock Enable Register
+#define AT91C_PMC_FEATURES (AT91_CAST(AT91_REG *) 	0x400E04F8) // (PMC) PMC FEATURES REGISTER 
+// ========== Register definition for CKGR peripheral ========== 
+#define AT91C_CKGR_PLLAR (AT91_CAST(AT91_REG *) 	0x400E0428) // (CKGR) PLL Register
+#define AT91C_CKGR_UCKR (AT91_CAST(AT91_REG *) 	0x400E041C) // (CKGR) UTMI Clock Configuration Register
+#define AT91C_CKGR_MOR  (AT91_CAST(AT91_REG *) 	0x400E0420) // (CKGR) Main Oscillator Register
+#define AT91C_CKGR_MCFR (AT91_CAST(AT91_REG *) 	0x400E0424) // (CKGR) Main Clock  Frequency Register
+// ========== Register definition for RSTC peripheral ========== 
+#define AT91C_RSTC_VER  (AT91_CAST(AT91_REG *) 	0x400E12FC) // (RSTC) Version Register
+#define AT91C_RSTC_RCR  (AT91_CAST(AT91_REG *) 	0x400E1200) // (RSTC) Reset Control Register
+#define AT91C_RSTC_RMR  (AT91_CAST(AT91_REG *) 	0x400E1208) // (RSTC) Reset Mode Register
+#define AT91C_RSTC_RSR  (AT91_CAST(AT91_REG *) 	0x400E1204) // (RSTC) Reset Status Register
+// ========== Register definition for SUPC peripheral ========== 
+#define AT91C_SUPC_CR   (AT91_CAST(AT91_REG *) 0x400E1210) // (SUPC) Supply Controller Control Register
+#define AT91C_SUPC_SMMR (AT91_CAST(AT91_REG *) 0x400E1214) // (SUPC) Supply Controller Supply Monitor Mode Register
+#define AT91C_SUPC_MR   (AT91_CAST(AT91_REG *) 0x400E1218) // (SUPC) Supply Controller Mode Register
+#define AT91C_SUPC_WUMR (AT91_CAST(AT91_REG *) 0x400E121C) // (SUPC) Supply Controller Wake Up Mode Register
+#define AT91C_SUPC_WUIR (AT91_CAST(AT91_REG *) 0x400E1220) // (SUPC) Supply Controller Wake Up Inputs Register
+#define AT91C_SUPC_SR   (AT91_CAST(AT91_REG *) 0x400E1224) // (SUPC) Supply Controller Status Register
+// ========== Register definition for RTTC peripheral ========== 
+#define AT91C_RTTC_RTVR (AT91_CAST(AT91_REG *) 	0x400E1238) // (RTTC) Real-time Value Register
+#define AT91C_RTTC_RTAR (AT91_CAST(AT91_REG *) 	0x400E1234) // (RTTC) Real-time Alarm Register
+#define AT91C_RTTC_RTMR (AT91_CAST(AT91_REG *) 	0x400E1230) // (RTTC) Real-time Mode Register
+#define AT91C_RTTC_RTSR (AT91_CAST(AT91_REG *) 	0x400E123C) // (RTTC) Real-time Status Register
+// ========== Register definition for WDTC peripheral ========== 
+#define AT91C_WDTC_WDSR (AT91_CAST(AT91_REG *) 	0x400E1258) // (WDTC) Watchdog Status Register
+#define AT91C_WDTC_WDMR (AT91_CAST(AT91_REG *) 	0x400E1254) // (WDTC) Watchdog Mode Register
+#define AT91C_WDTC_WDCR (AT91_CAST(AT91_REG *) 	0x400E1250) // (WDTC) Watchdog Control Register
+// ========== Register definition for RTC peripheral ========== 
+#define AT91C_RTC_IMR   (AT91_CAST(AT91_REG *) 	0x400E1288) // (RTC) Interrupt Mask Register
+#define AT91C_RTC_SCCR  (AT91_CAST(AT91_REG *) 	0x400E127C) // (RTC) Status Clear Command Register
+#define AT91C_RTC_CALR  (AT91_CAST(AT91_REG *) 	0x400E126C) // (RTC) Calendar Register
+#define AT91C_RTC_MR    (AT91_CAST(AT91_REG *) 	0x400E1264) // (RTC) Mode Register
+#define AT91C_RTC_TIMR  (AT91_CAST(AT91_REG *) 	0x400E1268) // (RTC) Time Register
+#define AT91C_RTC_CALALR (AT91_CAST(AT91_REG *) 	0x400E1274) // (RTC) Calendar Alarm Register
+#define AT91C_RTC_VER   (AT91_CAST(AT91_REG *) 	0x400E128C) // (RTC) Valid Entry Register
+#define AT91C_RTC_CR    (AT91_CAST(AT91_REG *) 	0x400E1260) // (RTC) Control Register
+#define AT91C_RTC_IDR   (AT91_CAST(AT91_REG *) 	0x400E1284) // (RTC) Interrupt Disable Register
+#define AT91C_RTC_TIMALR (AT91_CAST(AT91_REG *) 	0x400E1270) // (RTC) Time Alarm Register
+#define AT91C_RTC_IER   (AT91_CAST(AT91_REG *) 	0x400E1280) // (RTC) Interrupt Enable Register
+#define AT91C_RTC_SR    (AT91_CAST(AT91_REG *) 	0x400E1278) // (RTC) Status Register
+// ========== Register definition for ADC0 peripheral ========== 
+#define AT91C_ADC0_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400AC0F4) // (ADC0) ADC IPNAME2 REGISTER 
+#define AT91C_ADC0_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400AC0EC) // (ADC0) ADC ADDRSIZE REGISTER 
+#define AT91C_ADC0_IDR  (AT91_CAST(AT91_REG *) 	0x400AC028) // (ADC0) ADC Interrupt Disable Register
+#define AT91C_ADC0_CHSR (AT91_CAST(AT91_REG *) 	0x400AC018) // (ADC0) ADC Channel Status Register
+#define AT91C_ADC0_FEATURES (AT91_CAST(AT91_REG *) 	0x400AC0F8) // (ADC0) ADC FEATURES REGISTER 
+#define AT91C_ADC0_CDR0 (AT91_CAST(AT91_REG *) 	0x400AC030) // (ADC0) ADC Channel Data Register 0
+#define AT91C_ADC0_LCDR (AT91_CAST(AT91_REG *) 	0x400AC020) // (ADC0) ADC Last Converted Data Register
+#define AT91C_ADC0_EMR  (AT91_CAST(AT91_REG *) 	0x400AC068) // (ADC0) Extended Mode Register
+#define AT91C_ADC0_CDR3 (AT91_CAST(AT91_REG *) 	0x400AC03C) // (ADC0) ADC Channel Data Register 3
+#define AT91C_ADC0_CDR7 (AT91_CAST(AT91_REG *) 	0x400AC04C) // (ADC0) ADC Channel Data Register 7
+#define AT91C_ADC0_SR   (AT91_CAST(AT91_REG *) 	0x400AC01C) // (ADC0) ADC Status Register
+#define AT91C_ADC0_ACR  (AT91_CAST(AT91_REG *) 	0x400AC064) // (ADC0) Analog Control Register
+#define AT91C_ADC0_CDR5 (AT91_CAST(AT91_REG *) 	0x400AC044) // (ADC0) ADC Channel Data Register 5
+#define AT91C_ADC0_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400AC0F0) // (ADC0) ADC IPNAME1 REGISTER 
+#define AT91C_ADC0_CDR6 (AT91_CAST(AT91_REG *) 	0x400AC048) // (ADC0) ADC Channel Data Register 6
+#define AT91C_ADC0_MR   (AT91_CAST(AT91_REG *) 	0x400AC004) // (ADC0) ADC Mode Register
+#define AT91C_ADC0_CDR1 (AT91_CAST(AT91_REG *) 	0x400AC034) // (ADC0) ADC Channel Data Register 1
+#define AT91C_ADC0_CDR2 (AT91_CAST(AT91_REG *) 	0x400AC038) // (ADC0) ADC Channel Data Register 2
+#define AT91C_ADC0_CDR4 (AT91_CAST(AT91_REG *) 	0x400AC040) // (ADC0) ADC Channel Data Register 4
+#define AT91C_ADC0_CHER (AT91_CAST(AT91_REG *) 	0x400AC010) // (ADC0) ADC Channel Enable Register
+#define AT91C_ADC0_VER  (AT91_CAST(AT91_REG *) 	0x400AC0FC) // (ADC0) ADC VERSION REGISTER
+#define AT91C_ADC0_CHDR (AT91_CAST(AT91_REG *) 	0x400AC014) // (ADC0) ADC Channel Disable Register
+#define AT91C_ADC0_CR   (AT91_CAST(AT91_REG *) 	0x400AC000) // (ADC0) ADC Control Register
+#define AT91C_ADC0_IMR  (AT91_CAST(AT91_REG *) 	0x400AC02C) // (ADC0) ADC Interrupt Mask Register
+#define AT91C_ADC0_IER  (AT91_CAST(AT91_REG *) 	0x400AC024) // (ADC0) ADC Interrupt Enable Register
+// ========== Register definition for ADC12B peripheral ==========
+#define AT91C_ADC12B_CR   (AT91_CAST(AT91_REG *) 0x400A8000) // (ADC12B) Control Register
+#define AT91C_ADC12B_MR   (AT91_CAST(AT91_REG *) 0x400A8004) // (ADC12B) Mode Register
+#define AT91C_ADC12B_CHER (AT91_CAST(AT91_REG *) 0x400A8010) // (ADC12B) Channel Enable Register
+#define AT91C_ADC12B_CHDR (AT91_CAST(AT91_REG *) 0x400A8014) // (ADC12B) Channel Disable Register
+#define AT91C_ADC12B_CHSR (AT91_CAST(AT91_REG *) 0x400A8018) // (ADC12B) Channel Status Register
+#define AT91C_ADC12B_SR   (AT91_CAST(AT91_REG *) 0x400A801C) // (ADC12B) Status Register
+#define AT91C_ADC12B_LCDR (AT91_CAST(AT91_REG *) 0x400A8020) // (ADC12B) Last Converted Data Register
+#define AT91C_ADC12B_IER  (AT91_CAST(AT91_REG *) 0x400A8024) // (ADC12B) Interrupt Enable Register
+#define AT91C_ADC12B_IDR  (AT91_CAST(AT91_REG *) 0x400A8028) // (ADC12B) Interrupt Disable Register
+#define AT91C_ADC12B_IMR  (AT91_CAST(AT91_REG *) 0x400A802C) // (ADC12B) Interrupt Mask Register
+#define AT91C_ADC12B_CDR  (AT91_CAST(AT91_REG *) 0x400A8030) // (ADC12B) Channel Data Register
+#define AT91C_ADC12B_ACR  (AT91_CAST(AT91_REG *) 0x400A8064) // (ADC12B) Analog Control Register
+#define AT91C_ADC12B_EMR  (AT91_CAST(AT91_REG *) 0x400A8068) // (ADC12B) Extended Mode Register
+// ========== Register definition for TC0 peripheral ========== 
+#define AT91C_TC0_IER   (AT91_CAST(AT91_REG *) 	0x40080024) // (TC0) Interrupt Enable Register
+#define AT91C_TC0_CV    (AT91_CAST(AT91_REG *) 	0x40080010) // (TC0) Counter Value
+#define AT91C_TC0_RA    (AT91_CAST(AT91_REG *) 	0x40080014) // (TC0) Register A
+#define AT91C_TC0_RB    (AT91_CAST(AT91_REG *) 	0x40080018) // (TC0) Register B
+#define AT91C_TC0_IDR   (AT91_CAST(AT91_REG *) 	0x40080028) // (TC0) Interrupt Disable Register
+#define AT91C_TC0_SR    (AT91_CAST(AT91_REG *) 	0x40080020) // (TC0) Status Register
+#define AT91C_TC0_IMR   (AT91_CAST(AT91_REG *) 	0x4008002C) // (TC0) Interrupt Mask Register
+#define AT91C_TC0_CMR   (AT91_CAST(AT91_REG *) 	0x40080004) // (TC0) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC0_RC    (AT91_CAST(AT91_REG *) 	0x4008001C) // (TC0) Register C
+#define AT91C_TC0_CCR   (AT91_CAST(AT91_REG *) 	0x40080000) // (TC0) Channel Control Register
+// ========== Register definition for TC1 peripheral ========== 
+#define AT91C_TC1_SR    (AT91_CAST(AT91_REG *) 	0x40080060) // (TC1) Status Register
+#define AT91C_TC1_RA    (AT91_CAST(AT91_REG *) 	0x40080054) // (TC1) Register A
+#define AT91C_TC1_IER   (AT91_CAST(AT91_REG *) 	0x40080064) // (TC1) Interrupt Enable Register
+#define AT91C_TC1_RB    (AT91_CAST(AT91_REG *) 	0x40080058) // (TC1) Register B
+#define AT91C_TC1_IDR   (AT91_CAST(AT91_REG *) 	0x40080068) // (TC1) Interrupt Disable Register
+#define AT91C_TC1_CCR   (AT91_CAST(AT91_REG *) 	0x40080040) // (TC1) Channel Control Register
+#define AT91C_TC1_IMR   (AT91_CAST(AT91_REG *) 	0x4008006C) // (TC1) Interrupt Mask Register
+#define AT91C_TC1_RC    (AT91_CAST(AT91_REG *) 	0x4008005C) // (TC1) Register C
+#define AT91C_TC1_CMR   (AT91_CAST(AT91_REG *) 	0x40080044) // (TC1) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC1_CV    (AT91_CAST(AT91_REG *) 	0x40080050) // (TC1) Counter Value
+// ========== Register definition for TC2 peripheral ========== 
+#define AT91C_TC2_RA    (AT91_CAST(AT91_REG *) 	0x40080094) // (TC2) Register A
+#define AT91C_TC2_RB    (AT91_CAST(AT91_REG *) 	0x40080098) // (TC2) Register B
+#define AT91C_TC2_CMR   (AT91_CAST(AT91_REG *) 	0x40080084) // (TC2) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC2_SR    (AT91_CAST(AT91_REG *) 	0x400800A0) // (TC2) Status Register
+#define AT91C_TC2_CCR   (AT91_CAST(AT91_REG *) 	0x40080080) // (TC2) Channel Control Register
+#define AT91C_TC2_IMR   (AT91_CAST(AT91_REG *) 	0x400800AC) // (TC2) Interrupt Mask Register
+#define AT91C_TC2_CV    (AT91_CAST(AT91_REG *) 	0x40080090) // (TC2) Counter Value
+#define AT91C_TC2_RC    (AT91_CAST(AT91_REG *) 	0x4008009C) // (TC2) Register C
+#define AT91C_TC2_IER   (AT91_CAST(AT91_REG *) 	0x400800A4) // (TC2) Interrupt Enable Register
+#define AT91C_TC2_IDR   (AT91_CAST(AT91_REG *) 	0x400800A8) // (TC2) Interrupt Disable Register
+// ========== Register definition for TCB0 peripheral ========== 
+#define AT91C_TCB0_BCR  (AT91_CAST(AT91_REG *) 	0x400800C0) // (TCB0) TC Block Control Register
+#define AT91C_TCB0_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400800F4) // (TCB0) TC IPNAME2 REGISTER 
+#define AT91C_TCB0_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400800F0) // (TCB0) TC IPNAME1 REGISTER 
+#define AT91C_TCB0_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400800EC) // (TCB0) TC ADDRSIZE REGISTER 
+#define AT91C_TCB0_FEATURES (AT91_CAST(AT91_REG *) 	0x400800F8) // (TCB0) TC FEATURES REGISTER 
+#define AT91C_TCB0_BMR  (AT91_CAST(AT91_REG *) 	0x400800C4) // (TCB0) TC Block Mode Register
+#define AT91C_TCB0_VER  (AT91_CAST(AT91_REG *) 	0x400800FC) // (TCB0)  Version Register
+// ========== Register definition for TCB1 peripheral ========== 
+#define AT91C_TCB1_BCR  (AT91_CAST(AT91_REG *) 	0x40080100) // (TCB1) TC Block Control Register
+#define AT91C_TCB1_VER  (AT91_CAST(AT91_REG *) 	0x4008013C) // (TCB1)  Version Register
+#define AT91C_TCB1_FEATURES (AT91_CAST(AT91_REG *) 	0x40080138) // (TCB1) TC FEATURES REGISTER 
+#define AT91C_TCB1_IPNAME2 (AT91_CAST(AT91_REG *) 	0x40080134) // (TCB1) TC IPNAME2 REGISTER 
+#define AT91C_TCB1_BMR  (AT91_CAST(AT91_REG *) 	0x40080104) // (TCB1) TC Block Mode Register
+#define AT91C_TCB1_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x4008012C) // (TCB1) TC ADDRSIZE REGISTER 
+#define AT91C_TCB1_IPNAME1 (AT91_CAST(AT91_REG *) 	0x40080130) // (TCB1) TC IPNAME1 REGISTER 
+// ========== Register definition for TCB2 peripheral ========== 
+#define AT91C_TCB2_FEATURES (AT91_CAST(AT91_REG *) 	0x40080178) // (TCB2) TC FEATURES REGISTER 
+#define AT91C_TCB2_VER  (AT91_CAST(AT91_REG *) 	0x4008017C) // (TCB2)  Version Register
+#define AT91C_TCB2_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x4008016C) // (TCB2) TC ADDRSIZE REGISTER 
+#define AT91C_TCB2_IPNAME1 (AT91_CAST(AT91_REG *) 	0x40080170) // (TCB2) TC IPNAME1 REGISTER 
+#define AT91C_TCB2_IPNAME2 (AT91_CAST(AT91_REG *) 	0x40080174) // (TCB2) TC IPNAME2 REGISTER 
+#define AT91C_TCB2_BMR  (AT91_CAST(AT91_REG *) 	0x40080144) // (TCB2) TC Block Mode Register
+#define AT91C_TCB2_BCR  (AT91_CAST(AT91_REG *) 	0x40080140) // (TCB2) TC Block Control Register
+// ========== Register definition for EFC0 peripheral ========== 
+#define AT91C_EFC0_FCR  (AT91_CAST(AT91_REG *) 	0x400E0804) // (EFC0) EFC Flash Command Register
+#define AT91C_EFC0_FRR  (AT91_CAST(AT91_REG *) 	0x400E080C) // (EFC0) EFC Flash Result Register
+#define AT91C_EFC0_FMR  (AT91_CAST(AT91_REG *) 	0x400E0800) // (EFC0) EFC Flash Mode Register
+#define AT91C_EFC0_FSR  (AT91_CAST(AT91_REG *) 	0x400E0808) // (EFC0) EFC Flash Status Register
+#define AT91C_EFC0_FVR  (AT91_CAST(AT91_REG *) 	0x400E0814) // (EFC0) EFC Flash Version Register
+// ========== Register definition for EFC1 peripheral ========== 
+#define AT91C_EFC1_FMR  (AT91_CAST(AT91_REG *) 	0x400E0A00) // (EFC1) EFC Flash Mode Register
+#define AT91C_EFC1_FVR  (AT91_CAST(AT91_REG *) 	0x400E0A14) // (EFC1) EFC Flash Version Register
+#define AT91C_EFC1_FSR  (AT91_CAST(AT91_REG *) 	0x400E0A08) // (EFC1) EFC Flash Status Register
+#define AT91C_EFC1_FCR  (AT91_CAST(AT91_REG *) 	0x400E0A04) // (EFC1) EFC Flash Command Register
+#define AT91C_EFC1_FRR  (AT91_CAST(AT91_REG *) 	0x400E0A0C) // (EFC1) EFC Flash Result Register
+// ========== Register definition for MCI0 peripheral ========== 
+#define AT91C_MCI0_DMA  (AT91_CAST(AT91_REG *) 	0x40000050) // (MCI0) MCI DMA Configuration Register
+#define AT91C_MCI0_SDCR (AT91_CAST(AT91_REG *) 	0x4000000C) // (MCI0) MCI SD/SDIO Card Register
+#define AT91C_MCI0_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400000F0) // (MCI0) MCI IPNAME1 REGISTER 
+#define AT91C_MCI0_CSTOR (AT91_CAST(AT91_REG *) 	0x4000001C) // (MCI0) MCI Completion Signal Timeout Register
+#define AT91C_MCI0_RDR  (AT91_CAST(AT91_REG *) 	0x40000030) // (MCI0) MCI Receive Data Register
+#define AT91C_MCI0_CMDR (AT91_CAST(AT91_REG *) 	0x40000014) // (MCI0) MCI Command Register
+#define AT91C_MCI0_IDR  (AT91_CAST(AT91_REG *) 	0x40000048) // (MCI0) MCI Interrupt Disable Register
+#define AT91C_MCI0_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400000EC) // (MCI0) MCI ADDRSIZE REGISTER 
+#define AT91C_MCI0_WPCR (AT91_CAST(AT91_REG *) 	0x400000E4) // (MCI0) MCI Write Protection Control Register
+#define AT91C_MCI0_RSPR (AT91_CAST(AT91_REG *) 	0x40000020) // (MCI0) MCI Response Register
+#define AT91C_MCI0_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400000F4) // (MCI0) MCI IPNAME2 REGISTER 
+#define AT91C_MCI0_CR   (AT91_CAST(AT91_REG *) 	0x40000000) // (MCI0) MCI Control Register
+#define AT91C_MCI0_IMR  (AT91_CAST(AT91_REG *) 	0x4000004C) // (MCI0) MCI Interrupt Mask Register
+#define AT91C_MCI0_WPSR (AT91_CAST(AT91_REG *) 	0x400000E8) // (MCI0) MCI Write Protection Status Register
+#define AT91C_MCI0_DTOR (AT91_CAST(AT91_REG *) 	0x40000008) // (MCI0) MCI Data Timeout Register
+#define AT91C_MCI0_MR   (AT91_CAST(AT91_REG *) 	0x40000004) // (MCI0) MCI Mode Register
+#define AT91C_MCI0_SR   (AT91_CAST(AT91_REG *) 	0x40000040) // (MCI0) MCI Status Register
+#define AT91C_MCI0_IER  (AT91_CAST(AT91_REG *) 	0x40000044) // (MCI0) MCI Interrupt Enable Register
+#define AT91C_MCI0_VER  (AT91_CAST(AT91_REG *) 	0x400000FC) // (MCI0) MCI VERSION REGISTER 
+#define AT91C_MCI0_FEATURES (AT91_CAST(AT91_REG *) 	0x400000F8) // (MCI0) MCI FEATURES REGISTER 
+#define AT91C_MCI0_BLKR (AT91_CAST(AT91_REG *) 	0x40000018) // (MCI0) MCI Block Register
+#define AT91C_MCI0_ARGR (AT91_CAST(AT91_REG *) 	0x40000010) // (MCI0) MCI Argument Register
+#define AT91C_MCI0_FIFO (AT91_CAST(AT91_REG *) 	0x40000200) // (MCI0) MCI FIFO Aperture Register
+#define AT91C_MCI0_TDR  (AT91_CAST(AT91_REG *) 	0x40000034) // (MCI0) MCI Transmit Data Register
+#define AT91C_MCI0_CFG  (AT91_CAST(AT91_REG *) 	0x40000054) // (MCI0) MCI Configuration Register
+// ========== Register definition for PDC_TWI0 peripheral ========== 
+#define AT91C_TWI0_TNCR (AT91_CAST(AT91_REG *) 	0x4008411C) // (PDC_TWI0) Transmit Next Counter Register
+#define AT91C_TWI0_PTCR (AT91_CAST(AT91_REG *) 	0x40084120) // (PDC_TWI0) PDC Transfer Control Register
+#define AT91C_TWI0_PTSR (AT91_CAST(AT91_REG *) 	0x40084124) // (PDC_TWI0) PDC Transfer Status Register
+#define AT91C_TWI0_RCR  (AT91_CAST(AT91_REG *) 	0x40084104) // (PDC_TWI0) Receive Counter Register
+#define AT91C_TWI0_TNPR (AT91_CAST(AT91_REG *) 	0x40084118) // (PDC_TWI0) Transmit Next Pointer Register
+#define AT91C_TWI0_RNPR (AT91_CAST(AT91_REG *) 	0x40084110) // (PDC_TWI0) Receive Next Pointer Register
+#define AT91C_TWI0_RPR  (AT91_CAST(AT91_REG *) 	0x40084100) // (PDC_TWI0) Receive Pointer Register
+#define AT91C_TWI0_RNCR (AT91_CAST(AT91_REG *) 	0x40084114) // (PDC_TWI0) Receive Next Counter Register
+#define AT91C_TWI0_TPR  (AT91_CAST(AT91_REG *) 	0x40084108) // (PDC_TWI0) Transmit Pointer Register
+#define AT91C_TWI0_TCR  (AT91_CAST(AT91_REG *) 	0x4008410C) // (PDC_TWI0) Transmit Counter Register
+// ========== Register definition for PDC_TWI1 peripheral ========== 
+#define AT91C_TWI1_TNCR (AT91_CAST(AT91_REG *) 	0x4008811C) // (PDC_TWI1) Transmit Next Counter Register
+#define AT91C_TWI1_PTCR (AT91_CAST(AT91_REG *) 	0x40088120) // (PDC_TWI1) PDC Transfer Control Register
+#define AT91C_TWI1_RNCR (AT91_CAST(AT91_REG *) 	0x40088114) // (PDC_TWI1) Receive Next Counter Register
+#define AT91C_TWI1_RCR  (AT91_CAST(AT91_REG *) 	0x40088104) // (PDC_TWI1) Receive Counter Register
+#define AT91C_TWI1_RPR  (AT91_CAST(AT91_REG *) 	0x40088100) // (PDC_TWI1) Receive Pointer Register
+#define AT91C_TWI1_TNPR (AT91_CAST(AT91_REG *) 	0x40088118) // (PDC_TWI1) Transmit Next Pointer Register
+#define AT91C_TWI1_RNPR (AT91_CAST(AT91_REG *) 	0x40088110) // (PDC_TWI1) Receive Next Pointer Register
+#define AT91C_TWI1_TCR  (AT91_CAST(AT91_REG *) 	0x4008810C) // (PDC_TWI1) Transmit Counter Register
+#define AT91C_TWI1_TPR  (AT91_CAST(AT91_REG *) 	0x40088108) // (PDC_TWI1) Transmit Pointer Register
+#define AT91C_TWI1_PTSR (AT91_CAST(AT91_REG *) 	0x40088124) // (PDC_TWI1) PDC Transfer Status Register
+// ========== Register definition for TWI0 peripheral ========== 
+#define AT91C_TWI0_FEATURES (AT91_CAST(AT91_REG *) 	0x400840F8) // (TWI0) TWI FEATURES REGISTER 
+#define AT91C_TWI0_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400840F0) // (TWI0) TWI IPNAME1 REGISTER 
+#define AT91C_TWI0_SMR  (AT91_CAST(AT91_REG *) 	0x40084008) // (TWI0) Slave Mode Register
+#define AT91C_TWI0_MMR  (AT91_CAST(AT91_REG *) 	0x40084004) // (TWI0) Master Mode Register
+#define AT91C_TWI0_SR   (AT91_CAST(AT91_REG *) 	0x40084020) // (TWI0) Status Register
+#define AT91C_TWI0_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400840F4) // (TWI0) TWI IPNAME2 REGISTER 
+#define AT91C_TWI0_CR   (AT91_CAST(AT91_REG *) 	0x40084000) // (TWI0) Control Register
+#define AT91C_TWI0_IER  (AT91_CAST(AT91_REG *) 	0x40084024) // (TWI0) Interrupt Enable Register
+#define AT91C_TWI0_RHR  (AT91_CAST(AT91_REG *) 	0x40084030) // (TWI0) Receive Holding Register
+#define AT91C_TWI0_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400840EC) // (TWI0) TWI ADDRSIZE REGISTER 
+#define AT91C_TWI0_THR  (AT91_CAST(AT91_REG *) 	0x40084034) // (TWI0) Transmit Holding Register
+#define AT91C_TWI0_VER  (AT91_CAST(AT91_REG *) 	0x400840FC) // (TWI0) Version Register
+#define AT91C_TWI0_IADR (AT91_CAST(AT91_REG *) 	0x4008400C) // (TWI0) Internal Address Register
+#define AT91C_TWI0_IMR  (AT91_CAST(AT91_REG *) 	0x4008402C) // (TWI0) Interrupt Mask Register
+#define AT91C_TWI0_CWGR (AT91_CAST(AT91_REG *) 	0x40084010) // (TWI0) Clock Waveform Generator Register
+#define AT91C_TWI0_IDR  (AT91_CAST(AT91_REG *) 	0x40084028) // (TWI0) Interrupt Disable Register
+// ========== Register definition for TWI1 peripheral ========== 
+#define AT91C_TWI1_VER  (AT91_CAST(AT91_REG *) 	0x400880FC) // (TWI1) Version Register
+#define AT91C_TWI1_IDR  (AT91_CAST(AT91_REG *) 	0x40088028) // (TWI1) Interrupt Disable Register
+#define AT91C_TWI1_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400880F4) // (TWI1) TWI IPNAME2 REGISTER 
+#define AT91C_TWI1_CWGR (AT91_CAST(AT91_REG *) 	0x40088010) // (TWI1) Clock Waveform Generator Register
+#define AT91C_TWI1_CR   (AT91_CAST(AT91_REG *) 	0x40088000) // (TWI1) Control Register
+#define AT91C_TWI1_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400880EC) // (TWI1) TWI ADDRSIZE REGISTER 
+#define AT91C_TWI1_IADR (AT91_CAST(AT91_REG *) 	0x4008800C) // (TWI1) Internal Address Register
+#define AT91C_TWI1_IER  (AT91_CAST(AT91_REG *) 	0x40088024) // (TWI1) Interrupt Enable Register
+#define AT91C_TWI1_SMR  (AT91_CAST(AT91_REG *) 	0x40088008) // (TWI1) Slave Mode Register
+#define AT91C_TWI1_RHR  (AT91_CAST(AT91_REG *) 	0x40088030) // (TWI1) Receive Holding Register
+#define AT91C_TWI1_FEATURES (AT91_CAST(AT91_REG *) 	0x400880F8) // (TWI1) TWI FEATURES REGISTER 
+#define AT91C_TWI1_IMR  (AT91_CAST(AT91_REG *) 	0x4008802C) // (TWI1) Interrupt Mask Register
+#define AT91C_TWI1_SR   (AT91_CAST(AT91_REG *) 	0x40088020) // (TWI1) Status Register
+#define AT91C_TWI1_THR  (AT91_CAST(AT91_REG *) 	0x40088034) // (TWI1) Transmit Holding Register
+#define AT91C_TWI1_MMR  (AT91_CAST(AT91_REG *) 	0x40088004) // (TWI1) Master Mode Register
+#define AT91C_TWI1_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400880F0) // (TWI1) TWI IPNAME1 REGISTER 
+// ========== Register definition for PDC_US0 peripheral ========== 
+#define AT91C_US0_RNCR  (AT91_CAST(AT91_REG *) 	0x40090114) // (PDC_US0) Receive Next Counter Register
+#define AT91C_US0_TNPR  (AT91_CAST(AT91_REG *) 	0x40090118) // (PDC_US0) Transmit Next Pointer Register
+#define AT91C_US0_TPR   (AT91_CAST(AT91_REG *) 	0x40090108) // (PDC_US0) Transmit Pointer Register
+#define AT91C_US0_RCR   (AT91_CAST(AT91_REG *) 	0x40090104) // (PDC_US0) Receive Counter Register
+#define AT91C_US0_RNPR  (AT91_CAST(AT91_REG *) 	0x40090110) // (PDC_US0) Receive Next Pointer Register
+#define AT91C_US0_TNCR  (AT91_CAST(AT91_REG *) 	0x4009011C) // (PDC_US0) Transmit Next Counter Register
+#define AT91C_US0_PTSR  (AT91_CAST(AT91_REG *) 	0x40090124) // (PDC_US0) PDC Transfer Status Register
+#define AT91C_US0_RPR   (AT91_CAST(AT91_REG *) 	0x40090100) // (PDC_US0) Receive Pointer Register
+#define AT91C_US0_PTCR  (AT91_CAST(AT91_REG *) 	0x40090120) // (PDC_US0) PDC Transfer Control Register
+#define AT91C_US0_TCR   (AT91_CAST(AT91_REG *) 	0x4009010C) // (PDC_US0) Transmit Counter Register
+// ========== Register definition for US0 peripheral ========== 
+#define AT91C_US0_NER   (AT91_CAST(AT91_REG *) 	0x40090044) // (US0) Nb Errors Register
+#define AT91C_US0_RHR   (AT91_CAST(AT91_REG *) 	0x40090018) // (US0) Receiver Holding Register
+#define AT91C_US0_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400900F0) // (US0) US IPNAME1 REGISTER 
+#define AT91C_US0_MR    (AT91_CAST(AT91_REG *) 	0x40090004) // (US0) Mode Register
+#define AT91C_US0_RTOR  (AT91_CAST(AT91_REG *) 	0x40090024) // (US0) Receiver Time-out Register
+#define AT91C_US0_IF    (AT91_CAST(AT91_REG *) 	0x4009004C) // (US0) IRDA_FILTER Register
+#define AT91C_US0_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400900EC) // (US0) US ADDRSIZE REGISTER 
+#define AT91C_US0_IDR   (AT91_CAST(AT91_REG *) 	0x4009000C) // (US0) Interrupt Disable Register
+#define AT91C_US0_IMR   (AT91_CAST(AT91_REG *) 	0x40090010) // (US0) Interrupt Mask Register
+#define AT91C_US0_IER   (AT91_CAST(AT91_REG *) 	0x40090008) // (US0) Interrupt Enable Register
+#define AT91C_US0_TTGR  (AT91_CAST(AT91_REG *) 	0x40090028) // (US0) Transmitter Time-guard Register
+#define AT91C_US0_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400900F4) // (US0) US IPNAME2 REGISTER 
+#define AT91C_US0_FIDI  (AT91_CAST(AT91_REG *) 	0x40090040) // (US0) FI_DI_Ratio Register
+#define AT91C_US0_CR    (AT91_CAST(AT91_REG *) 	0x40090000) // (US0) Control Register
+#define AT91C_US0_BRGR  (AT91_CAST(AT91_REG *) 	0x40090020) // (US0) Baud Rate Generator Register
+#define AT91C_US0_MAN   (AT91_CAST(AT91_REG *) 	0x40090050) // (US0) Manchester Encoder Decoder Register
+#define AT91C_US0_VER   (AT91_CAST(AT91_REG *) 	0x400900FC) // (US0) VERSION Register
+#define AT91C_US0_FEATURES (AT91_CAST(AT91_REG *) 	0x400900F8) // (US0) US FEATURES REGISTER 
+#define AT91C_US0_CSR   (AT91_CAST(AT91_REG *) 	0x40090014) // (US0) Channel Status Register
+#define AT91C_US0_THR   (AT91_CAST(AT91_REG *) 	0x4009001C) // (US0) Transmitter Holding Register
+// ========== Register definition for PDC_US1 peripheral ========== 
+#define AT91C_US1_TNPR  (AT91_CAST(AT91_REG *) 	0x40094118) // (PDC_US1) Transmit Next Pointer Register
+#define AT91C_US1_TPR   (AT91_CAST(AT91_REG *) 	0x40094108) // (PDC_US1) Transmit Pointer Register
+#define AT91C_US1_RNCR  (AT91_CAST(AT91_REG *) 	0x40094114) // (PDC_US1) Receive Next Counter Register
+#define AT91C_US1_TNCR  (AT91_CAST(AT91_REG *) 	0x4009411C) // (PDC_US1) Transmit Next Counter Register
+#define AT91C_US1_RNPR  (AT91_CAST(AT91_REG *) 	0x40094110) // (PDC_US1) Receive Next Pointer Register
+#define AT91C_US1_TCR   (AT91_CAST(AT91_REG *) 	0x4009410C) // (PDC_US1) Transmit Counter Register
+#define AT91C_US1_PTSR  (AT91_CAST(AT91_REG *) 	0x40094124) // (PDC_US1) PDC Transfer Status Register
+#define AT91C_US1_RCR   (AT91_CAST(AT91_REG *) 	0x40094104) // (PDC_US1) Receive Counter Register
+#define AT91C_US1_RPR   (AT91_CAST(AT91_REG *) 	0x40094100) // (PDC_US1) Receive Pointer Register
+#define AT91C_US1_PTCR  (AT91_CAST(AT91_REG *) 	0x40094120) // (PDC_US1) PDC Transfer Control Register
+// ========== Register definition for US1 peripheral ========== 
+#define AT91C_US1_IMR   (AT91_CAST(AT91_REG *) 	0x40094010) // (US1) Interrupt Mask Register
+#define AT91C_US1_RTOR  (AT91_CAST(AT91_REG *) 	0x40094024) // (US1) Receiver Time-out Register
+#define AT91C_US1_RHR   (AT91_CAST(AT91_REG *) 	0x40094018) // (US1) Receiver Holding Register
+#define AT91C_US1_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400940F0) // (US1) US IPNAME1 REGISTER 
+#define AT91C_US1_VER   (AT91_CAST(AT91_REG *) 	0x400940FC) // (US1) VERSION Register
+#define AT91C_US1_MR    (AT91_CAST(AT91_REG *) 	0x40094004) // (US1) Mode Register
+#define AT91C_US1_FEATURES (AT91_CAST(AT91_REG *) 	0x400940F8) // (US1) US FEATURES REGISTER 
+#define AT91C_US1_NER   (AT91_CAST(AT91_REG *) 	0x40094044) // (US1) Nb Errors Register
+#define AT91C_US1_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400940F4) // (US1) US IPNAME2 REGISTER 
+#define AT91C_US1_CR    (AT91_CAST(AT91_REG *) 	0x40094000) // (US1) Control Register
+#define AT91C_US1_BRGR  (AT91_CAST(AT91_REG *) 	0x40094020) // (US1) Baud Rate Generator Register
+#define AT91C_US1_IF    (AT91_CAST(AT91_REG *) 	0x4009404C) // (US1) IRDA_FILTER Register
+#define AT91C_US1_IER   (AT91_CAST(AT91_REG *) 	0x40094008) // (US1) Interrupt Enable Register
+#define AT91C_US1_TTGR  (AT91_CAST(AT91_REG *) 	0x40094028) // (US1) Transmitter Time-guard Register
+#define AT91C_US1_FIDI  (AT91_CAST(AT91_REG *) 	0x40094040) // (US1) FI_DI_Ratio Register
+#define AT91C_US1_MAN   (AT91_CAST(AT91_REG *) 	0x40094050) // (US1) Manchester Encoder Decoder Register
+#define AT91C_US1_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400940EC) // (US1) US ADDRSIZE REGISTER 
+#define AT91C_US1_CSR   (AT91_CAST(AT91_REG *) 	0x40094014) // (US1) Channel Status Register
+#define AT91C_US1_THR   (AT91_CAST(AT91_REG *) 	0x4009401C) // (US1) Transmitter Holding Register
+#define AT91C_US1_IDR   (AT91_CAST(AT91_REG *) 	0x4009400C) // (US1) Interrupt Disable Register
+// ========== Register definition for PDC_US2 peripheral ========== 
+#define AT91C_US2_RPR   (AT91_CAST(AT91_REG *) 	0x40098100) // (PDC_US2) Receive Pointer Register
+#define AT91C_US2_TPR   (AT91_CAST(AT91_REG *) 	0x40098108) // (PDC_US2) Transmit Pointer Register
+#define AT91C_US2_TCR   (AT91_CAST(AT91_REG *) 	0x4009810C) // (PDC_US2) Transmit Counter Register
+#define AT91C_US2_PTSR  (AT91_CAST(AT91_REG *) 	0x40098124) // (PDC_US2) PDC Transfer Status Register
+#define AT91C_US2_PTCR  (AT91_CAST(AT91_REG *) 	0x40098120) // (PDC_US2) PDC Transfer Control Register
+#define AT91C_US2_RNPR  (AT91_CAST(AT91_REG *) 	0x40098110) // (PDC_US2) Receive Next Pointer Register
+#define AT91C_US2_TNCR  (AT91_CAST(AT91_REG *) 	0x4009811C) // (PDC_US2) Transmit Next Counter Register
+#define AT91C_US2_RNCR  (AT91_CAST(AT91_REG *) 	0x40098114) // (PDC_US2) Receive Next Counter Register
+#define AT91C_US2_TNPR  (AT91_CAST(AT91_REG *) 	0x40098118) // (PDC_US2) Transmit Next Pointer Register
+#define AT91C_US2_RCR   (AT91_CAST(AT91_REG *) 	0x40098104) // (PDC_US2) Receive Counter Register
+// ========== Register definition for US2 peripheral ========== 
+#define AT91C_US2_MAN   (AT91_CAST(AT91_REG *) 	0x40098050) // (US2) Manchester Encoder Decoder Register
+#define AT91C_US2_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400980EC) // (US2) US ADDRSIZE REGISTER 
+#define AT91C_US2_MR    (AT91_CAST(AT91_REG *) 	0x40098004) // (US2) Mode Register
+#define AT91C_US2_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400980F0) // (US2) US IPNAME1 REGISTER 
+#define AT91C_US2_IF    (AT91_CAST(AT91_REG *) 	0x4009804C) // (US2) IRDA_FILTER Register
+#define AT91C_US2_BRGR  (AT91_CAST(AT91_REG *) 	0x40098020) // (US2) Baud Rate Generator Register
+#define AT91C_US2_FIDI  (AT91_CAST(AT91_REG *) 	0x40098040) // (US2) FI_DI_Ratio Register
+#define AT91C_US2_IER   (AT91_CAST(AT91_REG *) 	0x40098008) // (US2) Interrupt Enable Register
+#define AT91C_US2_RTOR  (AT91_CAST(AT91_REG *) 	0x40098024) // (US2) Receiver Time-out Register
+#define AT91C_US2_CR    (AT91_CAST(AT91_REG *) 	0x40098000) // (US2) Control Register
+#define AT91C_US2_THR   (AT91_CAST(AT91_REG *) 	0x4009801C) // (US2) Transmitter Holding Register
+#define AT91C_US2_CSR   (AT91_CAST(AT91_REG *) 	0x40098014) // (US2) Channel Status Register
+#define AT91C_US2_VER   (AT91_CAST(AT91_REG *) 	0x400980FC) // (US2) VERSION Register
+#define AT91C_US2_FEATURES (AT91_CAST(AT91_REG *) 	0x400980F8) // (US2) US FEATURES REGISTER 
+#define AT91C_US2_IDR   (AT91_CAST(AT91_REG *) 	0x4009800C) // (US2) Interrupt Disable Register
+#define AT91C_US2_TTGR  (AT91_CAST(AT91_REG *) 	0x40098028) // (US2) Transmitter Time-guard Register
+#define AT91C_US2_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400980F4) // (US2) US IPNAME2 REGISTER 
+#define AT91C_US2_RHR   (AT91_CAST(AT91_REG *) 	0x40098018) // (US2) Receiver Holding Register
+#define AT91C_US2_NER   (AT91_CAST(AT91_REG *) 	0x40098044) // (US2) Nb Errors Register
+#define AT91C_US2_IMR   (AT91_CAST(AT91_REG *) 	0x40098010) // (US2) Interrupt Mask Register
+// ========== Register definition for PDC_US3 peripheral ========== 
+#define AT91C_US3_TPR   (AT91_CAST(AT91_REG *) 	0x4009C108) // (PDC_US3) Transmit Pointer Register
+#define AT91C_US3_PTCR  (AT91_CAST(AT91_REG *) 	0x4009C120) // (PDC_US3) PDC Transfer Control Register
+#define AT91C_US3_TCR   (AT91_CAST(AT91_REG *) 	0x4009C10C) // (PDC_US3) Transmit Counter Register
+#define AT91C_US3_RCR   (AT91_CAST(AT91_REG *) 	0x4009C104) // (PDC_US3) Receive Counter Register
+#define AT91C_US3_RNCR  (AT91_CAST(AT91_REG *) 	0x4009C114) // (PDC_US3) Receive Next Counter Register
+#define AT91C_US3_RNPR  (AT91_CAST(AT91_REG *) 	0x4009C110) // (PDC_US3) Receive Next Pointer Register
+#define AT91C_US3_RPR   (AT91_CAST(AT91_REG *) 	0x4009C100) // (PDC_US3) Receive Pointer Register
+#define AT91C_US3_PTSR  (AT91_CAST(AT91_REG *) 	0x4009C124) // (PDC_US3) PDC Transfer Status Register
+#define AT91C_US3_TNCR  (AT91_CAST(AT91_REG *) 	0x4009C11C) // (PDC_US3) Transmit Next Counter Register
+#define AT91C_US3_TNPR  (AT91_CAST(AT91_REG *) 	0x4009C118) // (PDC_US3) Transmit Next Pointer Register
+// ========== Register definition for US3 peripheral ========== 
+#define AT91C_US3_MAN   (AT91_CAST(AT91_REG *) 	0x4009C050) // (US3) Manchester Encoder Decoder Register
+#define AT91C_US3_CSR   (AT91_CAST(AT91_REG *) 	0x4009C014) // (US3) Channel Status Register
+#define AT91C_US3_BRGR  (AT91_CAST(AT91_REG *) 	0x4009C020) // (US3) Baud Rate Generator Register
+#define AT91C_US3_IPNAME2 (AT91_CAST(AT91_REG *) 	0x4009C0F4) // (US3) US IPNAME2 REGISTER 
+#define AT91C_US3_RTOR  (AT91_CAST(AT91_REG *) 	0x4009C024) // (US3) Receiver Time-out Register
+#define AT91C_US3_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x4009C0EC) // (US3) US ADDRSIZE REGISTER 
+#define AT91C_US3_CR    (AT91_CAST(AT91_REG *) 	0x4009C000) // (US3) Control Register
+#define AT91C_US3_IF    (AT91_CAST(AT91_REG *) 	0x4009C04C) // (US3) IRDA_FILTER Register
+#define AT91C_US3_FEATURES (AT91_CAST(AT91_REG *) 	0x4009C0F8) // (US3) US FEATURES REGISTER 
+#define AT91C_US3_VER   (AT91_CAST(AT91_REG *) 	0x4009C0FC) // (US3) VERSION Register
+#define AT91C_US3_RHR   (AT91_CAST(AT91_REG *) 	0x4009C018) // (US3) Receiver Holding Register
+#define AT91C_US3_TTGR  (AT91_CAST(AT91_REG *) 	0x4009C028) // (US3) Transmitter Time-guard Register
+#define AT91C_US3_NER   (AT91_CAST(AT91_REG *) 	0x4009C044) // (US3) Nb Errors Register
+#define AT91C_US3_IMR   (AT91_CAST(AT91_REG *) 	0x4009C010) // (US3) Interrupt Mask Register
+#define AT91C_US3_THR   (AT91_CAST(AT91_REG *) 	0x4009C01C) // (US3) Transmitter Holding Register
+#define AT91C_US3_IDR   (AT91_CAST(AT91_REG *) 	0x4009C00C) // (US3) Interrupt Disable Register
+#define AT91C_US3_MR    (AT91_CAST(AT91_REG *) 	0x4009C004) // (US3) Mode Register
+#define AT91C_US3_IER   (AT91_CAST(AT91_REG *) 	0x4009C008) // (US3) Interrupt Enable Register
+#define AT91C_US3_FIDI  (AT91_CAST(AT91_REG *) 	0x4009C040) // (US3) FI_DI_Ratio Register
+#define AT91C_US3_IPNAME1 (AT91_CAST(AT91_REG *) 	0x4009C0F0) // (US3) US IPNAME1 REGISTER 
+// ========== Register definition for PDC_SSC0 peripheral ========== 
+#define AT91C_SSC0_RNCR (AT91_CAST(AT91_REG *) 	0x40004114) // (PDC_SSC0) Receive Next Counter Register
+#define AT91C_SSC0_TPR  (AT91_CAST(AT91_REG *) 	0x40004108) // (PDC_SSC0) Transmit Pointer Register
+#define AT91C_SSC0_TCR  (AT91_CAST(AT91_REG *) 	0x4000410C) // (PDC_SSC0) Transmit Counter Register
+#define AT91C_SSC0_PTCR (AT91_CAST(AT91_REG *) 	0x40004120) // (PDC_SSC0) PDC Transfer Control Register
+#define AT91C_SSC0_TNPR (AT91_CAST(AT91_REG *) 	0x40004118) // (PDC_SSC0) Transmit Next Pointer Register
+#define AT91C_SSC0_RPR  (AT91_CAST(AT91_REG *) 	0x40004100) // (PDC_SSC0) Receive Pointer Register
+#define AT91C_SSC0_TNCR (AT91_CAST(AT91_REG *) 	0x4000411C) // (PDC_SSC0) Transmit Next Counter Register
+#define AT91C_SSC0_RNPR (AT91_CAST(AT91_REG *) 	0x40004110) // (PDC_SSC0) Receive Next Pointer Register
+#define AT91C_SSC0_RCR  (AT91_CAST(AT91_REG *) 	0x40004104) // (PDC_SSC0) Receive Counter Register
+#define AT91C_SSC0_PTSR (AT91_CAST(AT91_REG *) 	0x40004124) // (PDC_SSC0) PDC Transfer Status Register
+// ========== Register definition for SSC0 peripheral ========== 
+#define AT91C_SSC0_CR   (AT91_CAST(AT91_REG *) 	0x40004000) // (SSC0) Control Register
+#define AT91C_SSC0_RHR  (AT91_CAST(AT91_REG *) 	0x40004020) // (SSC0) Receive Holding Register
+#define AT91C_SSC0_TSHR (AT91_CAST(AT91_REG *) 	0x40004034) // (SSC0) Transmit Sync Holding Register
+#define AT91C_SSC0_RFMR (AT91_CAST(AT91_REG *) 	0x40004014) // (SSC0) Receive Frame Mode Register
+#define AT91C_SSC0_IDR  (AT91_CAST(AT91_REG *) 	0x40004048) // (SSC0) Interrupt Disable Register
+#define AT91C_SSC0_TFMR (AT91_CAST(AT91_REG *) 	0x4000401C) // (SSC0) Transmit Frame Mode Register
+#define AT91C_SSC0_RSHR (AT91_CAST(AT91_REG *) 	0x40004030) // (SSC0) Receive Sync Holding Register
+#define AT91C_SSC0_RC1R (AT91_CAST(AT91_REG *) 	0x4000403C) // (SSC0) Receive Compare 1 Register
+#define AT91C_SSC0_TCMR (AT91_CAST(AT91_REG *) 	0x40004018) // (SSC0) Transmit Clock Mode Register
+#define AT91C_SSC0_RCMR (AT91_CAST(AT91_REG *) 	0x40004010) // (SSC0) Receive Clock ModeRegister
+#define AT91C_SSC0_SR   (AT91_CAST(AT91_REG *) 	0x40004040) // (SSC0) Status Register
+#define AT91C_SSC0_RC0R (AT91_CAST(AT91_REG *) 	0x40004038) // (SSC0) Receive Compare 0 Register
+#define AT91C_SSC0_THR  (AT91_CAST(AT91_REG *) 	0x40004024) // (SSC0) Transmit Holding Register
+#define AT91C_SSC0_CMR  (AT91_CAST(AT91_REG *) 	0x40004004) // (SSC0) Clock Mode Register
+#define AT91C_SSC0_IER  (AT91_CAST(AT91_REG *) 	0x40004044) // (SSC0) Interrupt Enable Register
+#define AT91C_SSC0_IMR  (AT91_CAST(AT91_REG *) 	0x4000404C) // (SSC0) Interrupt Mask Register
+// ========== Register definition for PDC_PWMC peripheral ========== 
+#define AT91C_PWMC_TNCR (AT91_CAST(AT91_REG *) 	0x4008C11C) // (PDC_PWMC) Transmit Next Counter Register
+#define AT91C_PWMC_TPR  (AT91_CAST(AT91_REG *) 	0x4008C108) // (PDC_PWMC) Transmit Pointer Register
+#define AT91C_PWMC_RPR  (AT91_CAST(AT91_REG *) 	0x4008C100) // (PDC_PWMC) Receive Pointer Register
+#define AT91C_PWMC_TCR  (AT91_CAST(AT91_REG *) 	0x4008C10C) // (PDC_PWMC) Transmit Counter Register
+#define AT91C_PWMC_PTSR (AT91_CAST(AT91_REG *) 	0x4008C124) // (PDC_PWMC) PDC Transfer Status Register
+#define AT91C_PWMC_RNPR (AT91_CAST(AT91_REG *) 	0x4008C110) // (PDC_PWMC) Receive Next Pointer Register
+#define AT91C_PWMC_RCR  (AT91_CAST(AT91_REG *) 	0x4008C104) // (PDC_PWMC) Receive Counter Register
+#define AT91C_PWMC_RNCR (AT91_CAST(AT91_REG *) 	0x4008C114) // (PDC_PWMC) Receive Next Counter Register
+#define AT91C_PWMC_PTCR (AT91_CAST(AT91_REG *) 	0x4008C120) // (PDC_PWMC) PDC Transfer Control Register
+#define AT91C_PWMC_TNPR (AT91_CAST(AT91_REG *) 	0x4008C118) // (PDC_PWMC) Transmit Next Pointer Register
+// ========== Register definition for PWMC_CH0 peripheral ========== 
+#define AT91C_PWMC_CH0_DTR (AT91_CAST(AT91_REG *) 	0x4008C218) // (PWMC_CH0) Channel Dead Time Value Register
+#define AT91C_PWMC_CH0_CMR (AT91_CAST(AT91_REG *) 	0x4008C200) // (PWMC_CH0) Channel Mode Register
+#define AT91C_PWMC_CH0_CCNTR (AT91_CAST(AT91_REG *) 	0x4008C214) // (PWMC_CH0) Channel Counter Register
+#define AT91C_PWMC_CH0_CPRDR (AT91_CAST(AT91_REG *) 	0x4008C20C) // (PWMC_CH0) Channel Period Register
+#define AT91C_PWMC_CH0_DTUPDR (AT91_CAST(AT91_REG *) 	0x4008C21C) // (PWMC_CH0) Channel Dead Time Update Value Register
+#define AT91C_PWMC_CH0_CPRDUPDR (AT91_CAST(AT91_REG *) 	0x4008C210) // (PWMC_CH0) Channel Period Update Register
+#define AT91C_PWMC_CH0_CDTYUPDR (AT91_CAST(AT91_REG *) 	0x4008C208) // (PWMC_CH0) Channel Duty Cycle Update Register
+#define AT91C_PWMC_CH0_CDTYR (AT91_CAST(AT91_REG *) 	0x4008C204) // (PWMC_CH0) Channel Duty Cycle Register
+// ========== Register definition for PWMC_CH1 peripheral ========== 
+#define AT91C_PWMC_CH1_CCNTR (AT91_CAST(AT91_REG *) 	0x4008C234) // (PWMC_CH1) Channel Counter Register
+#define AT91C_PWMC_CH1_DTR (AT91_CAST(AT91_REG *) 	0x4008C238) // (PWMC_CH1) Channel Dead Time Value Register
+#define AT91C_PWMC_CH1_CDTYUPDR (AT91_CAST(AT91_REG *) 	0x4008C228) // (PWMC_CH1) Channel Duty Cycle Update Register
+#define AT91C_PWMC_CH1_DTUPDR (AT91_CAST(AT91_REG *) 	0x4008C23C) // (PWMC_CH1) Channel Dead Time Update Value Register
+#define AT91C_PWMC_CH1_CDTYR (AT91_CAST(AT91_REG *) 	0x4008C224) // (PWMC_CH1) Channel Duty Cycle Register
+#define AT91C_PWMC_CH1_CPRDR (AT91_CAST(AT91_REG *) 	0x4008C22C) // (PWMC_CH1) Channel Period Register
+#define AT91C_PWMC_CH1_CPRDUPDR (AT91_CAST(AT91_REG *) 	0x4008C230) // (PWMC_CH1) Channel Period Update Register
+#define AT91C_PWMC_CH1_CMR (AT91_CAST(AT91_REG *) 	0x4008C220) // (PWMC_CH1) Channel Mode Register
+// ========== Register definition for PWMC_CH2 peripheral ========== 
+#define AT91C_PWMC_CH2_CDTYR (AT91_CAST(AT91_REG *) 	0x4008C244) // (PWMC_CH2) Channel Duty Cycle Register
+#define AT91C_PWMC_CH2_DTUPDR (AT91_CAST(AT91_REG *) 	0x4008C25C) // (PWMC_CH2) Channel Dead Time Update Value Register
+#define AT91C_PWMC_CH2_CCNTR (AT91_CAST(AT91_REG *) 	0x4008C254) // (PWMC_CH2) Channel Counter Register
+#define AT91C_PWMC_CH2_CMR (AT91_CAST(AT91_REG *) 	0x4008C240) // (PWMC_CH2) Channel Mode Register
+#define AT91C_PWMC_CH2_CPRDR (AT91_CAST(AT91_REG *) 	0x4008C24C) // (PWMC_CH2) Channel Period Register
+#define AT91C_PWMC_CH2_CPRDUPDR (AT91_CAST(AT91_REG *) 	0x4008C250) // (PWMC_CH2) Channel Period Update Register
+#define AT91C_PWMC_CH2_CDTYUPDR (AT91_CAST(AT91_REG *) 	0x4008C248) // (PWMC_CH2) Channel Duty Cycle Update Register
+#define AT91C_PWMC_CH2_DTR (AT91_CAST(AT91_REG *) 	0x4008C258) // (PWMC_CH2) Channel Dead Time Value Register
+// ========== Register definition for PWMC_CH3 peripheral ========== 
+#define AT91C_PWMC_CH3_CPRDUPDR (AT91_CAST(AT91_REG *) 	0x4008C270) // (PWMC_CH3) Channel Period Update Register
+#define AT91C_PWMC_CH3_DTR (AT91_CAST(AT91_REG *) 	0x4008C278) // (PWMC_CH3) Channel Dead Time Value Register
+#define AT91C_PWMC_CH3_CDTYR (AT91_CAST(AT91_REG *) 	0x4008C264) // (PWMC_CH3) Channel Duty Cycle Register
+#define AT91C_PWMC_CH3_DTUPDR (AT91_CAST(AT91_REG *) 	0x4008C27C) // (PWMC_CH3) Channel Dead Time Update Value Register
+#define AT91C_PWMC_CH3_CDTYUPDR (AT91_CAST(AT91_REG *) 	0x4008C268) // (PWMC_CH3) Channel Duty Cycle Update Register
+#define AT91C_PWMC_CH3_CCNTR (AT91_CAST(AT91_REG *) 	0x4008C274) // (PWMC_CH3) Channel Counter Register
+#define AT91C_PWMC_CH3_CMR (AT91_CAST(AT91_REG *) 	0x4008C260) // (PWMC_CH3) Channel Mode Register
+#define AT91C_PWMC_CH3_CPRDR (AT91_CAST(AT91_REG *) 	0x4008C26C) // (PWMC_CH3) Channel Period Register
+// ========== Register definition for PWMC peripheral ========== 
+#define AT91C_PWMC_CMP6MUPD (AT91_CAST(AT91_REG *) 	0x4008C19C) // (PWMC) PWM Comparison Mode 6 Update Register
+#define AT91C_PWMC_ISR1 (AT91_CAST(AT91_REG *) 	0x4008C01C) // (PWMC) PWMC Interrupt Status Register 1
+#define AT91C_PWMC_CMP5V (AT91_CAST(AT91_REG *) 	0x4008C180) // (PWMC) PWM Comparison Value 5 Register
+#define AT91C_PWMC_CMP4MUPD (AT91_CAST(AT91_REG *) 	0x4008C17C) // (PWMC) PWM Comparison Mode 4 Update Register
+#define AT91C_PWMC_FMR  (AT91_CAST(AT91_REG *) 	0x4008C05C) // (PWMC) PWM Fault Mode Register
+#define AT91C_PWMC_CMP6V (AT91_CAST(AT91_REG *) 	0x4008C190) // (PWMC) PWM Comparison Value 6 Register
+#define AT91C_PWMC_EL4MR (AT91_CAST(AT91_REG *) 	0x4008C08C) // (PWMC) PWM Event Line 4 Mode Register
+#define AT91C_PWMC_UPCR (AT91_CAST(AT91_REG *) 	0x4008C028) // (PWMC) PWM Update Control Register
+#define AT91C_PWMC_CMP1VUPD (AT91_CAST(AT91_REG *) 	0x4008C144) // (PWMC) PWM Comparison Value 1 Update Register
+#define AT91C_PWMC_CMP0M (AT91_CAST(AT91_REG *) 	0x4008C138) // (PWMC) PWM Comparison Mode 0 Register
+#define AT91C_PWMC_CMP5VUPD (AT91_CAST(AT91_REG *) 	0x4008C184) // (PWMC) PWM Comparison Value 5 Update Register
+#define AT91C_PWMC_FPER3 (AT91_CAST(AT91_REG *) 	0x4008C074) // (PWMC) PWM Fault Protection Enable Register 3
+#define AT91C_PWMC_OSCUPD (AT91_CAST(AT91_REG *) 	0x4008C058) // (PWMC) PWM Output Selection Clear Update Register
+#define AT91C_PWMC_FPER1 (AT91_CAST(AT91_REG *) 	0x4008C06C) // (PWMC) PWM Fault Protection Enable Register 1
+#define AT91C_PWMC_SCUPUPD (AT91_CAST(AT91_REG *) 	0x4008C030) // (PWMC) PWM Update Period Update Register
+#define AT91C_PWMC_DIS  (AT91_CAST(AT91_REG *) 	0x4008C008) // (PWMC) PWMC Disable Register
+#define AT91C_PWMC_IER1 (AT91_CAST(AT91_REG *) 	0x4008C010) // (PWMC) PWMC Interrupt Enable Register 1
+#define AT91C_PWMC_IMR2 (AT91_CAST(AT91_REG *) 	0x4008C03C) // (PWMC) PWMC Interrupt Mask Register 2
+#define AT91C_PWMC_CMP0V (AT91_CAST(AT91_REG *) 	0x4008C130) // (PWMC) PWM Comparison Value 0 Register
+#define AT91C_PWMC_SR   (AT91_CAST(AT91_REG *) 	0x4008C00C) // (PWMC) PWMC Status Register
+#define AT91C_PWMC_CMP4M (AT91_CAST(AT91_REG *) 	0x4008C178) // (PWMC) PWM Comparison Mode 4 Register
+#define AT91C_PWMC_CMP3M (AT91_CAST(AT91_REG *) 	0x4008C168) // (PWMC) PWM Comparison Mode 3 Register
+#define AT91C_PWMC_IER2 (AT91_CAST(AT91_REG *) 	0x4008C034) // (PWMC) PWMC Interrupt Enable Register 2
+#define AT91C_PWMC_CMP3VUPD (AT91_CAST(AT91_REG *) 	0x4008C164) // (PWMC) PWM Comparison Value 3 Update Register
+#define AT91C_PWMC_CMP2M (AT91_CAST(AT91_REG *) 	0x4008C158) // (PWMC) PWM Comparison Mode 2 Register
+#define AT91C_PWMC_IDR2 (AT91_CAST(AT91_REG *) 	0x4008C038) // (PWMC) PWMC Interrupt Disable Register 2
+#define AT91C_PWMC_EL2MR (AT91_CAST(AT91_REG *) 	0x4008C084) // (PWMC) PWM Event Line 2 Mode Register
+#define AT91C_PWMC_CMP7V (AT91_CAST(AT91_REG *) 	0x4008C1A0) // (PWMC) PWM Comparison Value 7 Register
+#define AT91C_PWMC_CMP1M (AT91_CAST(AT91_REG *) 	0x4008C148) // (PWMC) PWM Comparison Mode 1 Register
+#define AT91C_PWMC_CMP0VUPD (AT91_CAST(AT91_REG *) 	0x4008C134) // (PWMC) PWM Comparison Value 0 Update Register
+#define AT91C_PWMC_WPSR (AT91_CAST(AT91_REG *) 	0x4008C0E8) // (PWMC) PWM Write Protection Status Register
+#define AT91C_PWMC_CMP6VUPD (AT91_CAST(AT91_REG *) 	0x4008C194) // (PWMC) PWM Comparison Value 6 Update Register
+#define AT91C_PWMC_CMP1MUPD (AT91_CAST(AT91_REG *) 	0x4008C14C) // (PWMC) PWM Comparison Mode 1 Update Register
+#define AT91C_PWMC_CMP1V (AT91_CAST(AT91_REG *) 	0x4008C140) // (PWMC) PWM Comparison Value 1 Register
+#define AT91C_PWMC_FCR  (AT91_CAST(AT91_REG *) 	0x4008C064) // (PWMC) PWM Fault Mode Clear Register
+#define AT91C_PWMC_VER  (AT91_CAST(AT91_REG *) 	0x4008C0FC) // (PWMC) PWMC Version Register
+#define AT91C_PWMC_EL1MR (AT91_CAST(AT91_REG *) 	0x4008C080) // (PWMC) PWM Event Line 1 Mode Register
+#define AT91C_PWMC_EL6MR (AT91_CAST(AT91_REG *) 	0x4008C094) // (PWMC) PWM Event Line 6 Mode Register
+#define AT91C_PWMC_ISR2 (AT91_CAST(AT91_REG *) 	0x4008C040) // (PWMC) PWMC Interrupt Status Register 2
+#define AT91C_PWMC_CMP4VUPD (AT91_CAST(AT91_REG *) 	0x4008C174) // (PWMC) PWM Comparison Value 4 Update Register
+#define AT91C_PWMC_CMP5MUPD (AT91_CAST(AT91_REG *) 	0x4008C18C) // (PWMC) PWM Comparison Mode 5 Update Register
+#define AT91C_PWMC_OS   (AT91_CAST(AT91_REG *) 	0x4008C048) // (PWMC) PWM Output Selection Register
+#define AT91C_PWMC_FPV  (AT91_CAST(AT91_REG *) 	0x4008C068) // (PWMC) PWM Fault Protection Value Register
+#define AT91C_PWMC_FPER2 (AT91_CAST(AT91_REG *) 	0x4008C070) // (PWMC) PWM Fault Protection Enable Register 2
+#define AT91C_PWMC_EL7MR (AT91_CAST(AT91_REG *) 	0x4008C098) // (PWMC) PWM Event Line 7 Mode Register
+#define AT91C_PWMC_OSSUPD (AT91_CAST(AT91_REG *) 	0x4008C054) // (PWMC) PWM Output Selection Set Update Register
+#define AT91C_PWMC_FEATURES (AT91_CAST(AT91_REG *) 	0x4008C0F8) // (PWMC) PWMC FEATURES REGISTER 
+#define AT91C_PWMC_CMP2V (AT91_CAST(AT91_REG *) 	0x4008C150) // (PWMC) PWM Comparison Value 2 Register
+#define AT91C_PWMC_FSR  (AT91_CAST(AT91_REG *) 	0x4008C060) // (PWMC) PWM Fault Mode Status Register
+#define AT91C_PWMC_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x4008C0EC) // (PWMC) PWMC ADDRSIZE REGISTER 
+#define AT91C_PWMC_OSC  (AT91_CAST(AT91_REG *) 	0x4008C050) // (PWMC) PWM Output Selection Clear Register
+#define AT91C_PWMC_SCUP (AT91_CAST(AT91_REG *) 	0x4008C02C) // (PWMC) PWM Update Period Register
+#define AT91C_PWMC_CMP7MUPD (AT91_CAST(AT91_REG *) 	0x4008C1AC) // (PWMC) PWM Comparison Mode 7 Update Register
+#define AT91C_PWMC_CMP2VUPD (AT91_CAST(AT91_REG *) 	0x4008C154) // (PWMC) PWM Comparison Value 2 Update Register
+#define AT91C_PWMC_FPER4 (AT91_CAST(AT91_REG *) 	0x4008C078) // (PWMC) PWM Fault Protection Enable Register 4
+#define AT91C_PWMC_IMR1 (AT91_CAST(AT91_REG *) 	0x4008C018) // (PWMC) PWMC Interrupt Mask Register 1
+#define AT91C_PWMC_EL3MR (AT91_CAST(AT91_REG *) 	0x4008C088) // (PWMC) PWM Event Line 3 Mode Register
+#define AT91C_PWMC_CMP3V (AT91_CAST(AT91_REG *) 	0x4008C160) // (PWMC) PWM Comparison Value 3 Register
+#define AT91C_PWMC_IPNAME1 (AT91_CAST(AT91_REG *) 	0x4008C0F0) // (PWMC) PWMC IPNAME1 REGISTER 
+#define AT91C_PWMC_OSS  (AT91_CAST(AT91_REG *) 	0x4008C04C) // (PWMC) PWM Output Selection Set Register
+#define AT91C_PWMC_CMP0MUPD (AT91_CAST(AT91_REG *) 	0x4008C13C) // (PWMC) PWM Comparison Mode 0 Update Register
+#define AT91C_PWMC_CMP2MUPD (AT91_CAST(AT91_REG *) 	0x4008C15C) // (PWMC) PWM Comparison Mode 2 Update Register
+#define AT91C_PWMC_CMP4V (AT91_CAST(AT91_REG *) 	0x4008C170) // (PWMC) PWM Comparison Value 4 Register
+#define AT91C_PWMC_ENA  (AT91_CAST(AT91_REG *) 	0x4008C004) // (PWMC) PWMC Enable Register
+#define AT91C_PWMC_CMP3MUPD (AT91_CAST(AT91_REG *) 	0x4008C16C) // (PWMC) PWM Comparison Mode 3 Update Register
+#define AT91C_PWMC_EL0MR (AT91_CAST(AT91_REG *) 	0x4008C07C) // (PWMC) PWM Event Line 0 Mode Register
+#define AT91C_PWMC_OOV  (AT91_CAST(AT91_REG *) 	0x4008C044) // (PWMC) PWM Output Override Value Register
+#define AT91C_PWMC_WPCR (AT91_CAST(AT91_REG *) 	0x4008C0E4) // (PWMC) PWM Write Protection Enable Register
+#define AT91C_PWMC_CMP7M (AT91_CAST(AT91_REG *) 	0x4008C1A8) // (PWMC) PWM Comparison Mode 7 Register
+#define AT91C_PWMC_CMP6M (AT91_CAST(AT91_REG *) 	0x4008C198) // (PWMC) PWM Comparison Mode 6 Register
+#define AT91C_PWMC_CMP5M (AT91_CAST(AT91_REG *) 	0x4008C188) // (PWMC) PWM Comparison Mode 5 Register
+#define AT91C_PWMC_IPNAME2 (AT91_CAST(AT91_REG *) 	0x4008C0F4) // (PWMC) PWMC IPNAME2 REGISTER 
+#define AT91C_PWMC_CMP7VUPD (AT91_CAST(AT91_REG *) 	0x4008C1A4) // (PWMC) PWM Comparison Value 7 Update Register
+#define AT91C_PWMC_SYNC (AT91_CAST(AT91_REG *) 	0x4008C020) // (PWMC) PWM Synchronized Channels Register
+#define AT91C_PWMC_MR   (AT91_CAST(AT91_REG *) 	0x4008C000) // (PWMC) PWMC Mode Register
+#define AT91C_PWMC_IDR1 (AT91_CAST(AT91_REG *) 	0x4008C014) // (PWMC) PWMC Interrupt Disable Register 1
+#define AT91C_PWMC_EL5MR (AT91_CAST(AT91_REG *) 	0x4008C090) // (PWMC) PWM Event Line 5 Mode Register
+// ========== Register definition for SPI0 peripheral ========== 
+#define AT91C_SPI0_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400080EC) // (SPI0) SPI ADDRSIZE REGISTER 
+#define AT91C_SPI0_RDR  (AT91_CAST(AT91_REG *) 	0x40008008) // (SPI0) Receive Data Register
+#define AT91C_SPI0_FEATURES (AT91_CAST(AT91_REG *) 	0x400080F8) // (SPI0) SPI FEATURES REGISTER 
+#define AT91C_SPI0_CR   (AT91_CAST(AT91_REG *) 	0x40008000) // (SPI0) Control Register
+#define AT91C_SPI0_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400080F0) // (SPI0) SPI IPNAME1 REGISTER 
+#define AT91C_SPI0_VER  (AT91_CAST(AT91_REG *) 	0x400080FC) // (SPI0) Version Register
+#define AT91C_SPI0_IDR  (AT91_CAST(AT91_REG *) 	0x40008018) // (SPI0) Interrupt Disable Register
+#define AT91C_SPI0_TDR  (AT91_CAST(AT91_REG *) 	0x4000800C) // (SPI0) Transmit Data Register
+#define AT91C_SPI0_MR   (AT91_CAST(AT91_REG *) 	0x40008004) // (SPI0) Mode Register
+#define AT91C_SPI0_IER  (AT91_CAST(AT91_REG *) 	0x40008014) // (SPI0) Interrupt Enable Register
+#define AT91C_SPI0_IMR  (AT91_CAST(AT91_REG *) 	0x4000801C) // (SPI0) Interrupt Mask Register
+#define AT91C_SPI0_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400080F4) // (SPI0) SPI IPNAME2 REGISTER 
+#define AT91C_SPI0_CSR  (AT91_CAST(AT91_REG *) 	0x40008030) // (SPI0) Chip Select Register
+#define AT91C_SPI0_SR   (AT91_CAST(AT91_REG *) 	0x40008010) // (SPI0) Status Register
+// ========== Register definition for UDPHS_EPTFIFO peripheral ========== 
+#define AT91C_UDPHS_EPTFIFO_READEPT6 (AT91_CAST(AT91_REG *) 	0x201E0000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 6
+#define AT91C_UDPHS_EPTFIFO_READEPT2 (AT91_CAST(AT91_REG *) 	0x201A0000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 2
+#define AT91C_UDPHS_EPTFIFO_READEPT1 (AT91_CAST(AT91_REG *) 	0x20190000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 1
+#define AT91C_UDPHS_EPTFIFO_READEPT0 (AT91_CAST(AT91_REG *) 	0x20180000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 0
+#define AT91C_UDPHS_EPTFIFO_READEPT5 (AT91_CAST(AT91_REG *) 	0x201D0000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 5
+#define AT91C_UDPHS_EPTFIFO_READEPT4 (AT91_CAST(AT91_REG *) 	0x201C0000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 4
+#define AT91C_UDPHS_EPTFIFO_READEPT3 (AT91_CAST(AT91_REG *) 	0x201B0000) // (UDPHS_EPTFIFO) FIFO Endpoint Data Register 3
+// ========== Register definition for UDPHS_EPT_0 peripheral ========== 
+#define AT91C_UDPHS_EPT_0_EPTCTL (AT91_CAST(AT91_REG *) 	0x400A410C) // (UDPHS_EPT_0) UDPHS Endpoint Control Register
+#define AT91C_UDPHS_EPT_0_EPTSTA (AT91_CAST(AT91_REG *) 	0x400A411C) // (UDPHS_EPT_0) UDPHS Endpoint Status Register
+#define AT91C_UDPHS_EPT_0_EPTCLRSTA (AT91_CAST(AT91_REG *) 	0x400A4118) // (UDPHS_EPT_0) UDPHS Endpoint Clear Status Register
+#define AT91C_UDPHS_EPT_0_EPTCTLDIS (AT91_CAST(AT91_REG *) 	0x400A4108) // (UDPHS_EPT_0) UDPHS Endpoint Control Disable Register
+#define AT91C_UDPHS_EPT_0_EPTCFG (AT91_CAST(AT91_REG *) 	0x400A4100) // (UDPHS_EPT_0) UDPHS Endpoint Config Register
+#define AT91C_UDPHS_EPT_0_EPTSETSTA (AT91_CAST(AT91_REG *) 	0x400A4114) // (UDPHS_EPT_0) UDPHS Endpoint Set Status Register
+#define AT91C_UDPHS_EPT_0_EPTCTLENB (AT91_CAST(AT91_REG *) 	0x400A4104) // (UDPHS_EPT_0) UDPHS Endpoint Control Enable Register
+// ========== Register definition for UDPHS_EPT_1 peripheral ========== 
+#define AT91C_UDPHS_EPT_1_EPTSTA (AT91_CAST(AT91_REG *) 	0x400A413C) // (UDPHS_EPT_1) UDPHS Endpoint Status Register
+#define AT91C_UDPHS_EPT_1_EPTSETSTA (AT91_CAST(AT91_REG *) 	0x400A4134) // (UDPHS_EPT_1) UDPHS Endpoint Set Status Register
+#define AT91C_UDPHS_EPT_1_EPTCTL (AT91_CAST(AT91_REG *) 	0x400A412C) // (UDPHS_EPT_1) UDPHS Endpoint Control Register
+#define AT91C_UDPHS_EPT_1_EPTCFG (AT91_CAST(AT91_REG *) 	0x400A4120) // (UDPHS_EPT_1) UDPHS Endpoint Config Register
+#define AT91C_UDPHS_EPT_1_EPTCTLDIS (AT91_CAST(AT91_REG *) 	0x400A4128) // (UDPHS_EPT_1) UDPHS Endpoint Control Disable Register
+#define AT91C_UDPHS_EPT_1_EPTCLRSTA (AT91_CAST(AT91_REG *) 	0x400A4138) // (UDPHS_EPT_1) UDPHS Endpoint Clear Status Register
+#define AT91C_UDPHS_EPT_1_EPTCTLENB (AT91_CAST(AT91_REG *) 	0x400A4124) // (UDPHS_EPT_1) UDPHS Endpoint Control Enable Register
+// ========== Register definition for UDPHS_EPT_2 peripheral ========== 
+#define AT91C_UDPHS_EPT_2_EPTCTLENB (AT91_CAST(AT91_REG *) 	0x400A4144) // (UDPHS_EPT_2) UDPHS Endpoint Control Enable Register
+#define AT91C_UDPHS_EPT_2_EPTCLRSTA (AT91_CAST(AT91_REG *) 	0x400A4158) // (UDPHS_EPT_2) UDPHS Endpoint Clear Status Register
+#define AT91C_UDPHS_EPT_2_EPTCFG (AT91_CAST(AT91_REG *) 	0x400A4140) // (UDPHS_EPT_2) UDPHS Endpoint Config Register
+#define AT91C_UDPHS_EPT_2_EPTCTL (AT91_CAST(AT91_REG *) 	0x400A414C) // (UDPHS_EPT_2) UDPHS Endpoint Control Register
+#define AT91C_UDPHS_EPT_2_EPTSETSTA (AT91_CAST(AT91_REG *) 	0x400A4154) // (UDPHS_EPT_2) UDPHS Endpoint Set Status Register
+#define AT91C_UDPHS_EPT_2_EPTSTA (AT91_CAST(AT91_REG *) 	0x400A415C) // (UDPHS_EPT_2) UDPHS Endpoint Status Register
+#define AT91C_UDPHS_EPT_2_EPTCTLDIS (AT91_CAST(AT91_REG *) 	0x400A4148) // (UDPHS_EPT_2) UDPHS Endpoint Control Disable Register
+// ========== Register definition for UDPHS_EPT_3 peripheral ========== 
+#define AT91C_UDPHS_EPT_3_EPTCTLDIS (AT91_CAST(AT91_REG *) 	0x400A4168) // (UDPHS_EPT_3) UDPHS Endpoint Control Disable Register
+#define AT91C_UDPHS_EPT_3_EPTCTLENB (AT91_CAST(AT91_REG *) 	0x400A4164) // (UDPHS_EPT_3) UDPHS Endpoint Control Enable Register
+#define AT91C_UDPHS_EPT_3_EPTSETSTA (AT91_CAST(AT91_REG *) 	0x400A4174) // (UDPHS_EPT_3) UDPHS Endpoint Set Status Register
+#define AT91C_UDPHS_EPT_3_EPTCLRSTA (AT91_CAST(AT91_REG *) 	0x400A4178) // (UDPHS_EPT_3) UDPHS Endpoint Clear Status Register
+#define AT91C_UDPHS_EPT_3_EPTCFG (AT91_CAST(AT91_REG *) 	0x400A4160) // (UDPHS_EPT_3) UDPHS Endpoint Config Register
+#define AT91C_UDPHS_EPT_3_EPTSTA (AT91_CAST(AT91_REG *) 	0x400A417C) // (UDPHS_EPT_3) UDPHS Endpoint Status Register
+#define AT91C_UDPHS_EPT_3_EPTCTL (AT91_CAST(AT91_REG *) 	0x400A416C) // (UDPHS_EPT_3) UDPHS Endpoint Control Register
+// ========== Register definition for UDPHS_EPT_4 peripheral ========== 
+#define AT91C_UDPHS_EPT_4_EPTSETSTA (AT91_CAST(AT91_REG *) 	0x400A4194) // (UDPHS_EPT_4) UDPHS Endpoint Set Status Register
+#define AT91C_UDPHS_EPT_4_EPTCTLDIS (AT91_CAST(AT91_REG *) 	0x400A4188) // (UDPHS_EPT_4) UDPHS Endpoint Control Disable Register
+#define AT91C_UDPHS_EPT_4_EPTCTL (AT91_CAST(AT91_REG *) 	0x400A418C) // (UDPHS_EPT_4) UDPHS Endpoint Control Register
+#define AT91C_UDPHS_EPT_4_EPTCFG (AT91_CAST(AT91_REG *) 	0x400A4180) // (UDPHS_EPT_4) UDPHS Endpoint Config Register
+#define AT91C_UDPHS_EPT_4_EPTCTLENB (AT91_CAST(AT91_REG *) 	0x400A4184) // (UDPHS_EPT_4) UDPHS Endpoint Control Enable Register
+#define AT91C_UDPHS_EPT_4_EPTSTA (AT91_CAST(AT91_REG *) 	0x400A419C) // (UDPHS_EPT_4) UDPHS Endpoint Status Register
+#define AT91C_UDPHS_EPT_4_EPTCLRSTA (AT91_CAST(AT91_REG *) 	0x400A4198) // (UDPHS_EPT_4) UDPHS Endpoint Clear Status Register
+// ========== Register definition for UDPHS_EPT_5 peripheral ========== 
+#define AT91C_UDPHS_EPT_5_EPTCFG (AT91_CAST(AT91_REG *) 	0x400A41A0) // (UDPHS_EPT_5) UDPHS Endpoint Config Register
+#define AT91C_UDPHS_EPT_5_EPTCTL (AT91_CAST(AT91_REG *) 	0x400A41AC) // (UDPHS_EPT_5) UDPHS Endpoint Control Register
+#define AT91C_UDPHS_EPT_5_EPTCTLENB (AT91_CAST(AT91_REG *) 	0x400A41A4) // (UDPHS_EPT_5) UDPHS Endpoint Control Enable Register
+#define AT91C_UDPHS_EPT_5_EPTSTA (AT91_CAST(AT91_REG *) 	0x400A41BC) // (UDPHS_EPT_5) UDPHS Endpoint Status Register
+#define AT91C_UDPHS_EPT_5_EPTSETSTA (AT91_CAST(AT91_REG *) 	0x400A41B4) // (UDPHS_EPT_5) UDPHS Endpoint Set Status Register
+#define AT91C_UDPHS_EPT_5_EPTCTLDIS (AT91_CAST(AT91_REG *) 	0x400A41A8) // (UDPHS_EPT_5) UDPHS Endpoint Control Disable Register
+#define AT91C_UDPHS_EPT_5_EPTCLRSTA (AT91_CAST(AT91_REG *) 	0x400A41B8) // (UDPHS_EPT_5) UDPHS Endpoint Clear Status Register
+// ========== Register definition for UDPHS_EPT_6 peripheral ========== 
+#define AT91C_UDPHS_EPT_6_EPTCLRSTA (AT91_CAST(AT91_REG *) 	0x400A41D8) // (UDPHS_EPT_6) UDPHS Endpoint Clear Status Register
+#define AT91C_UDPHS_EPT_6_EPTCTL (AT91_CAST(AT91_REG *) 	0x400A41CC) // (UDPHS_EPT_6) UDPHS Endpoint Control Register
+#define AT91C_UDPHS_EPT_6_EPTCFG (AT91_CAST(AT91_REG *) 	0x400A41C0) // (UDPHS_EPT_6) UDPHS Endpoint Config Register
+#define AT91C_UDPHS_EPT_6_EPTCTLDIS (AT91_CAST(AT91_REG *) 	0x400A41C8) // (UDPHS_EPT_6) UDPHS Endpoint Control Disable Register
+#define AT91C_UDPHS_EPT_6_EPTSTA (AT91_CAST(AT91_REG *) 	0x400A41DC) // (UDPHS_EPT_6) UDPHS Endpoint Status Register
+#define AT91C_UDPHS_EPT_6_EPTCTLENB (AT91_CAST(AT91_REG *) 	0x400A41C4) // (UDPHS_EPT_6) UDPHS Endpoint Control Enable Register
+#define AT91C_UDPHS_EPT_6_EPTSETSTA (AT91_CAST(AT91_REG *) 	0x400A41D4) // (UDPHS_EPT_6) UDPHS Endpoint Set Status Register
+// ========== Register definition for UDPHS_DMA_1 peripheral ========== 
+#define AT91C_UDPHS_DMA_1_DMASTATUS (AT91_CAST(AT91_REG *) 	0x400A431C) // (UDPHS_DMA_1) UDPHS DMA Channel Status Register
+#define AT91C_UDPHS_DMA_1_DMACONTROL (AT91_CAST(AT91_REG *) 	0x400A4318) // (UDPHS_DMA_1) UDPHS DMA Channel Control Register
+#define AT91C_UDPHS_DMA_1_DMANXTDSC (AT91_CAST(AT91_REG *) 	0x400A4310) // (UDPHS_DMA_1) UDPHS DMA Channel Next Descriptor Address
+#define AT91C_UDPHS_DMA_1_DMAADDRESS (AT91_CAST(AT91_REG *) 	0x400A4314) // (UDPHS_DMA_1) UDPHS DMA Channel Address Register
+// ========== Register definition for UDPHS_DMA_2 peripheral ========== 
+#define AT91C_UDPHS_DMA_2_DMASTATUS (AT91_CAST(AT91_REG *) 	0x400A432C) // (UDPHS_DMA_2) UDPHS DMA Channel Status Register
+#define AT91C_UDPHS_DMA_2_DMANXTDSC (AT91_CAST(AT91_REG *) 	0x400A4320) // (UDPHS_DMA_2) UDPHS DMA Channel Next Descriptor Address
+#define AT91C_UDPHS_DMA_2_DMACONTROL (AT91_CAST(AT91_REG *) 	0x400A4328) // (UDPHS_DMA_2) UDPHS DMA Channel Control Register
+#define AT91C_UDPHS_DMA_2_DMAADDRESS (AT91_CAST(AT91_REG *) 	0x400A4324) // (UDPHS_DMA_2) UDPHS DMA Channel Address Register
+// ========== Register definition for UDPHS_DMA_3 peripheral ========== 
+#define AT91C_UDPHS_DMA_3_DMACONTROL (AT91_CAST(AT91_REG *) 	0x400A4338) // (UDPHS_DMA_3) UDPHS DMA Channel Control Register
+#define AT91C_UDPHS_DMA_3_DMANXTDSC (AT91_CAST(AT91_REG *) 	0x400A4330) // (UDPHS_DMA_3) UDPHS DMA Channel Next Descriptor Address
+#define AT91C_UDPHS_DMA_3_DMASTATUS (AT91_CAST(AT91_REG *) 	0x400A433C) // (UDPHS_DMA_3) UDPHS DMA Channel Status Register
+#define AT91C_UDPHS_DMA_3_DMAADDRESS (AT91_CAST(AT91_REG *) 	0x400A4334) // (UDPHS_DMA_3) UDPHS DMA Channel Address Register
+// ========== Register definition for UDPHS_DMA_4 peripheral ========== 
+#define AT91C_UDPHS_DMA_4_DMAADDRESS (AT91_CAST(AT91_REG *) 	0x400A4344) // (UDPHS_DMA_4) UDPHS DMA Channel Address Register
+#define AT91C_UDPHS_DMA_4_DMANXTDSC (AT91_CAST(AT91_REG *) 	0x400A4340) // (UDPHS_DMA_4) UDPHS DMA Channel Next Descriptor Address
+#define AT91C_UDPHS_DMA_4_DMASTATUS (AT91_CAST(AT91_REG *) 	0x400A434C) // (UDPHS_DMA_4) UDPHS DMA Channel Status Register
+#define AT91C_UDPHS_DMA_4_DMACONTROL (AT91_CAST(AT91_REG *) 	0x400A4348) // (UDPHS_DMA_4) UDPHS DMA Channel Control Register
+// ========== Register definition for UDPHS_DMA_5 peripheral ========== 
+#define AT91C_UDPHS_DMA_5_DMACONTROL (AT91_CAST(AT91_REG *) 	0x400A4358) // (UDPHS_DMA_5) UDPHS DMA Channel Control Register
+#define AT91C_UDPHS_DMA_5_DMAADDRESS (AT91_CAST(AT91_REG *) 	0x400A4354) // (UDPHS_DMA_5) UDPHS DMA Channel Address Register
+#define AT91C_UDPHS_DMA_5_DMANXTDSC (AT91_CAST(AT91_REG *) 	0x400A4350) // (UDPHS_DMA_5) UDPHS DMA Channel Next Descriptor Address
+#define AT91C_UDPHS_DMA_5_DMASTATUS (AT91_CAST(AT91_REG *) 	0x400A435C) // (UDPHS_DMA_5) UDPHS DMA Channel Status Register
+// ========== Register definition for UDPHS_DMA_6 peripheral ========== 
+#define AT91C_UDPHS_DMA_6_DMASTATUS (AT91_CAST(AT91_REG *) 	0x400A436C) // (UDPHS_DMA_6) UDPHS DMA Channel Status Register
+#define AT91C_UDPHS_DMA_6_DMACONTROL (AT91_CAST(AT91_REG *) 	0x400A4368) // (UDPHS_DMA_6) UDPHS DMA Channel Control Register
+#define AT91C_UDPHS_DMA_6_DMANXTDSC (AT91_CAST(AT91_REG *) 	0x400A4360) // (UDPHS_DMA_6) UDPHS DMA Channel Next Descriptor Address
+#define AT91C_UDPHS_DMA_6_DMAADDRESS (AT91_CAST(AT91_REG *) 	0x400A4364) // (UDPHS_DMA_6) UDPHS DMA Channel Address Register
+// ========== Register definition for UDPHS peripheral ========== 
+#define AT91C_UDPHS_EPTRST (AT91_CAST(AT91_REG *) 	0x400A401C) // (UDPHS) UDPHS Endpoints Reset Register
+#define AT91C_UDPHS_IEN (AT91_CAST(AT91_REG *) 	0x400A4010) // (UDPHS) UDPHS Interrupt Enable Register
+#define AT91C_UDPHS_TSTCNTB (AT91_CAST(AT91_REG *) 	0x400A40D8) // (UDPHS) UDPHS Test B Counter Register
+#define AT91C_UDPHS_RIPNAME2 (AT91_CAST(AT91_REG *) 	0x400A40F4) // (UDPHS) UDPHS Name2 Register
+#define AT91C_UDPHS_RIPPADDRSIZE (AT91_CAST(AT91_REG *) 	0x400A40EC) // (UDPHS) UDPHS PADDRSIZE Register
+#define AT91C_UDPHS_TSTMODREG (AT91_CAST(AT91_REG *) 	0x400A40DC) // (UDPHS) UDPHS Test Mode Register
+#define AT91C_UDPHS_TST (AT91_CAST(AT91_REG *) 	0x400A40E0) // (UDPHS) UDPHS Test Register
+#define AT91C_UDPHS_TSTSOFCNT (AT91_CAST(AT91_REG *) 	0x400A40D0) // (UDPHS) UDPHS Test SOF Counter Register
+#define AT91C_UDPHS_FNUM (AT91_CAST(AT91_REG *) 	0x400A4004) // (UDPHS) UDPHS Frame Number Register
+#define AT91C_UDPHS_TSTCNTA (AT91_CAST(AT91_REG *) 	0x400A40D4) // (UDPHS) UDPHS Test A Counter Register
+#define AT91C_UDPHS_INTSTA (AT91_CAST(AT91_REG *) 	0x400A4014) // (UDPHS) UDPHS Interrupt Status Register
+#define AT91C_UDPHS_IPFEATURES (AT91_CAST(AT91_REG *) 	0x400A40F8) // (UDPHS) UDPHS Features Register
+#define AT91C_UDPHS_CLRINT (AT91_CAST(AT91_REG *) 	0x400A4018) // (UDPHS) UDPHS Clear Interrupt Register
+#define AT91C_UDPHS_RIPNAME1 (AT91_CAST(AT91_REG *) 	0x400A40F0) // (UDPHS) UDPHS Name1 Register
+#define AT91C_UDPHS_CTRL (AT91_CAST(AT91_REG *) 	0x400A4000) // (UDPHS) UDPHS Control Register
+#define AT91C_UDPHS_IPVERSION (AT91_CAST(AT91_REG *) 	0x400A40FC) // (UDPHS) UDPHS Version Register
+// ========== Register definition for HDMA_CH_0 peripheral ========== 
+#define AT91C_HDMA_CH_0_SADDR (AT91_CAST(AT91_REG *) 	0x400B003C) // (HDMA_CH_0) HDMA Channel Source Address Register
+#define AT91C_HDMA_CH_0_DADDR (AT91_CAST(AT91_REG *) 	0x400B0040) // (HDMA_CH_0) HDMA Channel Destination Address Register
+#define AT91C_HDMA_CH_0_CFG (AT91_CAST(AT91_REG *) 	0x400B0050) // (HDMA_CH_0) HDMA Channel Configuration Register
+#define AT91C_HDMA_CH_0_CTRLB (AT91_CAST(AT91_REG *) 	0x400B004C) // (HDMA_CH_0) HDMA Channel Control B Register
+#define AT91C_HDMA_CH_0_CTRLA (AT91_CAST(AT91_REG *) 	0x400B0048) // (HDMA_CH_0) HDMA Channel Control A Register
+#define AT91C_HDMA_CH_0_DSCR (AT91_CAST(AT91_REG *) 	0x400B0044) // (HDMA_CH_0) HDMA Channel Descriptor Address Register
+// ========== Register definition for HDMA_CH_1 peripheral ========== 
+#define AT91C_HDMA_CH_1_DSCR (AT91_CAST(AT91_REG *) 	0x400B006C) // (HDMA_CH_1) HDMA Channel Descriptor Address Register
+#define AT91C_HDMA_CH_1_CTRLB (AT91_CAST(AT91_REG *) 	0x400B0074) // (HDMA_CH_1) HDMA Channel Control B Register
+#define AT91C_HDMA_CH_1_SADDR (AT91_CAST(AT91_REG *) 	0x400B0064) // (HDMA_CH_1) HDMA Channel Source Address Register
+#define AT91C_HDMA_CH_1_CFG (AT91_CAST(AT91_REG *) 	0x400B0078) // (HDMA_CH_1) HDMA Channel Configuration Register
+#define AT91C_HDMA_CH_1_DADDR (AT91_CAST(AT91_REG *) 	0x400B0068) // (HDMA_CH_1) HDMA Channel Destination Address Register
+#define AT91C_HDMA_CH_1_CTRLA (AT91_CAST(AT91_REG *) 	0x400B0070) // (HDMA_CH_1) HDMA Channel Control A Register
+// ========== Register definition for HDMA_CH_2 peripheral ========== 
+#define AT91C_HDMA_CH_2_CTRLA (AT91_CAST(AT91_REG *) 	0x400B0098) // (HDMA_CH_2) HDMA Channel Control A Register
+#define AT91C_HDMA_CH_2_SADDR (AT91_CAST(AT91_REG *) 	0x400B008C) // (HDMA_CH_2) HDMA Channel Source Address Register
+#define AT91C_HDMA_CH_2_CTRLB (AT91_CAST(AT91_REG *) 	0x400B009C) // (HDMA_CH_2) HDMA Channel Control B Register
+#define AT91C_HDMA_CH_2_DADDR (AT91_CAST(AT91_REG *) 	0x400B0090) // (HDMA_CH_2) HDMA Channel Destination Address Register
+#define AT91C_HDMA_CH_2_CFG (AT91_CAST(AT91_REG *) 	0x400B00A0) // (HDMA_CH_2) HDMA Channel Configuration Register
+#define AT91C_HDMA_CH_2_DSCR (AT91_CAST(AT91_REG *) 	0x400B0094) // (HDMA_CH_2) HDMA Channel Descriptor Address Register
+// ========== Register definition for HDMA_CH_3 peripheral ========== 
+#define AT91C_HDMA_CH_3_DSCR (AT91_CAST(AT91_REG *) 	0x400B00BC) // (HDMA_CH_3) HDMA Channel Descriptor Address Register
+#define AT91C_HDMA_CH_3_SADDR (AT91_CAST(AT91_REG *) 	0x400B00B4) // (HDMA_CH_3) HDMA Channel Source Address Register
+#define AT91C_HDMA_CH_3_CTRLB (AT91_CAST(AT91_REG *) 	0x400B00C4) // (HDMA_CH_3) HDMA Channel Control B Register
+#define AT91C_HDMA_CH_3_CFG (AT91_CAST(AT91_REG *) 	0x400B00C8) // (HDMA_CH_3) HDMA Channel Configuration Register
+#define AT91C_HDMA_CH_3_DADDR (AT91_CAST(AT91_REG *) 	0x400B00B8) // (HDMA_CH_3) HDMA Channel Destination Address Register
+#define AT91C_HDMA_CH_3_CTRLA (AT91_CAST(AT91_REG *) 	0x400B00C0) // (HDMA_CH_3) HDMA Channel Control A Register
+// ========== Register definition for HDMA peripheral ========== 
+#define AT91C_HDMA_VER  (AT91_CAST(AT91_REG *) 	0x400B01FC) // (HDMA) HDMA VERSION REGISTER 
+#define AT91C_HDMA_CHSR (AT91_CAST(AT91_REG *) 	0x400B0030) // (HDMA) HDMA Channel Handler Status Register
+#define AT91C_HDMA_IPNAME2 (AT91_CAST(AT91_REG *) 	0x400B01F4) // (HDMA) HDMA IPNAME2 REGISTER 
+#define AT91C_HDMA_EBCIMR (AT91_CAST(AT91_REG *) 	0x400B0020) // (HDMA) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Mask Register
+#define AT91C_HDMA_CHDR (AT91_CAST(AT91_REG *) 	0x400B002C) // (HDMA) HDMA Channel Handler Disable Register
+#define AT91C_HDMA_EN   (AT91_CAST(AT91_REG *) 	0x400B0004) // (HDMA) HDMA Controller Enable Register
+#define AT91C_HDMA_GCFG (AT91_CAST(AT91_REG *) 	0x400B0000) // (HDMA) HDMA Global Configuration Register
+#define AT91C_HDMA_IPNAME1 (AT91_CAST(AT91_REG *) 	0x400B01F0) // (HDMA) HDMA IPNAME1 REGISTER 
+#define AT91C_HDMA_LAST (AT91_CAST(AT91_REG *) 	0x400B0010) // (HDMA) HDMA Software Last Transfer Flag Register
+#define AT91C_HDMA_FEATURES (AT91_CAST(AT91_REG *) 	0x400B01F8) // (HDMA) HDMA FEATURES REGISTER 
+#define AT91C_HDMA_CREQ (AT91_CAST(AT91_REG *) 	0x400B000C) // (HDMA) HDMA Software Chunk Transfer Request Register
+#define AT91C_HDMA_EBCIER (AT91_CAST(AT91_REG *) 	0x400B0018) // (HDMA) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Enable register
+#define AT91C_HDMA_CHER (AT91_CAST(AT91_REG *) 	0x400B0028) // (HDMA) HDMA Channel Handler Enable Register
+#define AT91C_HDMA_ADDRSIZE (AT91_CAST(AT91_REG *) 	0x400B01EC) // (HDMA) HDMA ADDRSIZE REGISTER 
+#define AT91C_HDMA_EBCISR (AT91_CAST(AT91_REG *) 	0x400B0024) // (HDMA) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Status Register
+#define AT91C_HDMA_SREQ (AT91_CAST(AT91_REG *) 	0x400B0008) // (HDMA) HDMA Software Single Request Register
+#define AT91C_HDMA_EBCIDR (AT91_CAST(AT91_REG *) 	0x400B001C) // (HDMA) HDMA Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt Disable register
+
+// *****************************************************************************
+//               PIO DEFINITIONS FOR AT91SAM3U4
+// *****************************************************************************
+#define AT91C_PIO_PA0        (1 <<  0) // Pin Controlled by PA0
+#define AT91C_PA0_TIOB0    (AT91C_PIO_PA0) //  
+#define AT91C_PA0_SPI0_NPCS1 (AT91C_PIO_PA0) //  
+#define AT91C_PIO_PA1        (1 <<  1) // Pin Controlled by PA1
+#define AT91C_PA1_TIOA0    (AT91C_PIO_PA1) //  
+#define AT91C_PA1_SPI0_NPCS2 (AT91C_PIO_PA1) //  
+#define AT91C_PIO_PA10       (1 << 10) // Pin Controlled by PA10
+#define AT91C_PA10_TWCK0    (AT91C_PIO_PA10) //  
+#define AT91C_PA10_PWML3    (AT91C_PIO_PA10) //  
+#define AT91C_PIO_PA11       (1 << 11) // Pin Controlled by PA11
+#define AT91C_PA11_DRXD     (AT91C_PIO_PA11) //  
+#define AT91C_PIO_PA12       (1 << 12) // Pin Controlled by PA12
+#define AT91C_PA12_DTXD     (AT91C_PIO_PA12) //  
+#define AT91C_PIO_PA13       (1 << 13) // Pin Controlled by PA13
+#define AT91C_PA13_SPI0_MISO (AT91C_PIO_PA13) //  
+#define AT91C_PIO_PA14       (1 << 14) // Pin Controlled by PA14
+#define AT91C_PA14_SPI0_MOSI (AT91C_PIO_PA14) //  
+#define AT91C_PIO_PA15       (1 << 15) // Pin Controlled by PA15
+#define AT91C_PA15_SPI0_SPCK (AT91C_PIO_PA15) //  
+#define AT91C_PA15_PWMH2    (AT91C_PIO_PA15) //  
+#define AT91C_PIO_PA16       (1 << 16) // Pin Controlled by PA16
+#define AT91C_PA16_SPI0_NPCS0 (AT91C_PIO_PA16) //  
+#define AT91C_PA16_NCS1     (AT91C_PIO_PA16) //  
+#define AT91C_PIO_PA17       (1 << 17) // Pin Controlled by PA17
+#define AT91C_PA17_SCK0     (AT91C_PIO_PA17) //  
+#define AT91C_PIO_PA18       (1 << 18) // Pin Controlled by PA18
+#define AT91C_PA18_TXD0     (AT91C_PIO_PA18) //  
+#define AT91C_PIO_PA19       (1 << 19) // Pin Controlled by PA19
+#define AT91C_PA19_RXD0     (AT91C_PIO_PA19) //  
+#define AT91C_PA19_SPI0_NPCS3 (AT91C_PIO_PA19) //  
+#define AT91C_PIO_PA2        (1 <<  2) // Pin Controlled by PA2
+#define AT91C_PA2_TCLK0    (AT91C_PIO_PA2) //  
+#define AT91C_PA2_ADTRG1   (AT91C_PIO_PA2) //  
+#define AT91C_PIO_PA20       (1 << 20) // Pin Controlled by PA20
+#define AT91C_PA20_TXD1     (AT91C_PIO_PA20) //  
+#define AT91C_PA20_PWMH3    (AT91C_PIO_PA20) //  
+#define AT91C_PIO_PA21       (1 << 21) // Pin Controlled by PA21
+#define AT91C_PA21_RXD1     (AT91C_PIO_PA21) //  
+#define AT91C_PA21_PCK0     (AT91C_PIO_PA21) //  
+#define AT91C_PIO_PA22       (1 << 22) // Pin Controlled by PA22
+#define AT91C_PA22_TXD2     (AT91C_PIO_PA22) //  
+#define AT91C_PA22_RTS1     (AT91C_PIO_PA22) //  
+#define AT91C_PIO_PA23       (1 << 23) // Pin Controlled by PA23
+#define AT91C_PA23_RXD2     (AT91C_PIO_PA23) //  
+#define AT91C_PA23_CTS1     (AT91C_PIO_PA23) //  
+#define AT91C_PIO_PA24       (1 << 24) // Pin Controlled by PA24
+#define AT91C_PA24_TWD1     (AT91C_PIO_PA24) //  
+#define AT91C_PA24_SCK1     (AT91C_PIO_PA24) //  
+#define AT91C_PIO_PA25       (1 << 25) // Pin Controlled by PA25
+#define AT91C_PA25_TWCK1    (AT91C_PIO_PA25) //  
+#define AT91C_PA25_SCK2     (AT91C_PIO_PA25) //  
+#define AT91C_PIO_PA26       (1 << 26) // Pin Controlled by PA26
+#define AT91C_PA26_TD0      (AT91C_PIO_PA26) //  
+#define AT91C_PA26_TCLK2    (AT91C_PIO_PA26) //  
+#define AT91C_PIO_PA27       (1 << 27) // Pin Controlled by PA27
+#define AT91C_PA27_RD0      (AT91C_PIO_PA27) //  
+#define AT91C_PA27_PCK0     (AT91C_PIO_PA27) //  
+#define AT91C_PIO_PA28       (1 << 28) // Pin Controlled by PA28
+#define AT91C_PA28_TK0      (AT91C_PIO_PA28) //  
+#define AT91C_PA28_PWMH0    (AT91C_PIO_PA28) //  
+#define AT91C_PIO_PA29       (1 << 29) // Pin Controlled by PA29
+#define AT91C_PA29_RK0      (AT91C_PIO_PA29) //  
+#define AT91C_PA29_PWMH1    (AT91C_PIO_PA29) //  
+#define AT91C_PIO_PA3        (1 <<  3) // Pin Controlled by PA3
+#define AT91C_PA3_MCI0_CK  (AT91C_PIO_PA3) //  
+#define AT91C_PA3_PCK1     (AT91C_PIO_PA3) //  
+#define AT91C_PIO_PA30       (1 << 30) // Pin Controlled by PA30
+#define AT91C_PA30_TF0      (AT91C_PIO_PA30) //  
+#define AT91C_PA30_TIOA2    (AT91C_PIO_PA30) //  
+#define AT91C_PIO_PA31       (1 << 31) // Pin Controlled by PA31
+#define AT91C_PA31_RF0      (AT91C_PIO_PA31) //  
+#define AT91C_PA31_TIOB2    (AT91C_PIO_PA31) //  
+#define AT91C_PIO_PA4        (1 <<  4) // Pin Controlled by PA4
+#define AT91C_PA4_MCI0_CDA (AT91C_PIO_PA4) //  
+#define AT91C_PA4_PWMH0    (AT91C_PIO_PA4) //  
+#define AT91C_PIO_PA5        (1 <<  5) // Pin Controlled by PA5
+#define AT91C_PA5_MCI0_DA0 (AT91C_PIO_PA5) //  
+#define AT91C_PA5_PWMH1    (AT91C_PIO_PA5) //  
+#define AT91C_PIO_PA6        (1 <<  6) // Pin Controlled by PA6
+#define AT91C_PA6_MCI0_DA1 (AT91C_PIO_PA6) //  
+#define AT91C_PA6_PWMH2    (AT91C_PIO_PA6) //  
+#define AT91C_PIO_PA7        (1 <<  7) // Pin Controlled by PA7
+#define AT91C_PA7_MCI0_DA2 (AT91C_PIO_PA7) //  
+#define AT91C_PA7_PWML0    (AT91C_PIO_PA7) //  
+#define AT91C_PIO_PA8        (1 <<  8) // Pin Controlled by PA8
+#define AT91C_PA8_MCI0_DA3 (AT91C_PIO_PA8) //  
+#define AT91C_PA8_PWML1    (AT91C_PIO_PA8) //  
+#define AT91C_PIO_PA9        (1 <<  9) // Pin Controlled by PA9
+#define AT91C_PA9_TWD0     (AT91C_PIO_PA9) //  
+#define AT91C_PA9_PWML2    (AT91C_PIO_PA9) //  
+#define AT91C_PIO_PB0        (1 <<  0) // Pin Controlled by PB0
+#define AT91C_PB0_PWMH0    (AT91C_PIO_PB0) //  
+#define AT91C_PB0_A2       (AT91C_PIO_PB0) //  
+#define AT91C_PIO_PB1        (1 <<  1) // Pin Controlled by PB1
+#define AT91C_PB1_PWMH1    (AT91C_PIO_PB1) //  
+#define AT91C_PB1_A3       (AT91C_PIO_PB1) //  
+#define AT91C_PIO_PB10       (1 << 10) // Pin Controlled by PB10
+#define AT91C_PB10_D1       (AT91C_PIO_PB10) //  
+#define AT91C_PB10_DSR0     (AT91C_PIO_PB10) //  
+#define AT91C_PIO_PB11       (1 << 11) // Pin Controlled by PB11
+#define AT91C_PB11_D2       (AT91C_PIO_PB11) //  
+#define AT91C_PB11_DCD0     (AT91C_PIO_PB11) //  
+#define AT91C_PIO_PB12       (1 << 12) // Pin Controlled by PB12
+#define AT91C_PB12_D3       (AT91C_PIO_PB12) //  
+#define AT91C_PB12_RI0      (AT91C_PIO_PB12) //  
+#define AT91C_PIO_PB13       (1 << 13) // Pin Controlled by PB13
+#define AT91C_PB13_D4       (AT91C_PIO_PB13) //  
+#define AT91C_PB13_PWMH0    (AT91C_PIO_PB13) //  
+#define AT91C_PIO_PB14       (1 << 14) // Pin Controlled by PB14
+#define AT91C_PB14_D5       (AT91C_PIO_PB14) //  
+#define AT91C_PB14_PWMH1    (AT91C_PIO_PB14) //  
+#define AT91C_PIO_PB15       (1 << 15) // Pin Controlled by PB15
+#define AT91C_PB15_D6       (AT91C_PIO_PB15) //  
+#define AT91C_PB15_PWMH2    (AT91C_PIO_PB15) //  
+#define AT91C_PIO_PB16       (1 << 16) // Pin Controlled by PB16
+#define AT91C_PB16_D7       (AT91C_PIO_PB16) //  
+#define AT91C_PB16_PWMH3    (AT91C_PIO_PB16) //  
+#define AT91C_PIO_PB17       (1 << 17) // Pin Controlled by PB17
+#define AT91C_PB17_NANDOE   (AT91C_PIO_PB17) //  
+#define AT91C_PB17_PWML0    (AT91C_PIO_PB17) //  
+#define AT91C_PIO_PB18       (1 << 18) // Pin Controlled by PB18
+#define AT91C_PB18_NANDWE   (AT91C_PIO_PB18) //  
+#define AT91C_PB18_PWML1    (AT91C_PIO_PB18) //  
+#define AT91C_PIO_PB19       (1 << 19) // Pin Controlled by PB19
+#define AT91C_PB19_NRD      (AT91C_PIO_PB19) //  
+#define AT91C_PB19_PWML2    (AT91C_PIO_PB19) //  
+#define AT91C_PIO_PB2        (1 <<  2) // Pin Controlled by PB2
+#define AT91C_PB2_PWMH2    (AT91C_PIO_PB2) //  
+#define AT91C_PB2_A4       (AT91C_PIO_PB2) //  
+#define AT91C_PIO_PB20       (1 << 20) // Pin Controlled by PB20
+#define AT91C_PB20_NCS0     (AT91C_PIO_PB20) //  
+#define AT91C_PB20_PWML3    (AT91C_PIO_PB20) //  
+#define AT91C_PIO_PB21       (1 << 21) // Pin Controlled by PB21
+#define AT91C_PB21_A21_NANDALE (AT91C_PIO_PB21) //  
+#define AT91C_PB21_RTS2     (AT91C_PIO_PB21) //  
+#define AT91C_PIO_PB22       (1 << 22) // Pin Controlled by PB22
+#define AT91C_PB22_A22_NANDCLE (AT91C_PIO_PB22) //  
+#define AT91C_PB22_CTS2     (AT91C_PIO_PB22) //  
+#define AT91C_PIO_PB23       (1 << 23) // Pin Controlled by PB23
+#define AT91C_PB23_NWR0_NWE (AT91C_PIO_PB23) //  
+#define AT91C_PB23_PCK2     (AT91C_PIO_PB23) //  
+#define AT91C_PIO_PB24       (1 << 24) // Pin Controlled by PB24
+#define AT91C_PB24_NANDRDY  (AT91C_PIO_PB24) //  
+#define AT91C_PB24_PCK1     (AT91C_PIO_PB24) //  
+#define AT91C_PIO_PB25       (1 << 25) // Pin Controlled by PB25
+#define AT91C_PB25_D8       (AT91C_PIO_PB25) //  
+#define AT91C_PB25_PWML0    (AT91C_PIO_PB25) //  
+#define AT91C_PIO_PB26       (1 << 26) // Pin Controlled by PB26
+#define AT91C_PB26_D9       (AT91C_PIO_PB26) //  
+#define AT91C_PB26_PWML1    (AT91C_PIO_PB26) //  
+#define AT91C_PIO_PB27       (1 << 27) // Pin Controlled by PB27
+#define AT91C_PB27_D10      (AT91C_PIO_PB27) //  
+#define AT91C_PB27_PWML2    (AT91C_PIO_PB27) //  
+#define AT91C_PIO_PB28       (1 << 28) // Pin Controlled by PB28
+#define AT91C_PB28_D11      (AT91C_PIO_PB28) //  
+#define AT91C_PB28_PWML3    (AT91C_PIO_PB28) //  
+#define AT91C_PIO_PB29       (1 << 29) // Pin Controlled by PB29
+#define AT91C_PB29_D12      (AT91C_PIO_PB29) //  
+#define AT91C_PIO_PB3        (1 <<  3) // Pin Controlled by PB3
+#define AT91C_PB3_PWMH3    (AT91C_PIO_PB3) //  
+#define AT91C_PB3_A5       (AT91C_PIO_PB3) //  
+#define AT91C_PIO_PB30       (1 << 30) // Pin Controlled by PB30
+#define AT91C_PB30_D13      (AT91C_PIO_PB30) //  
+#define AT91C_PIO_PB31       (1 << 31) // Pin Controlled by PB31
+#define AT91C_PB31_D14      (AT91C_PIO_PB31) //  
+#define AT91C_PIO_PB4        (1 <<  4) // Pin Controlled by PB4
+#define AT91C_PB4_TCLK1    (AT91C_PIO_PB4) //  
+#define AT91C_PB4_A6       (AT91C_PIO_PB4) //  
+#define AT91C_PIO_PB5        (1 <<  5) // Pin Controlled by PB5
+#define AT91C_PB5_TIOA1    (AT91C_PIO_PB5) //  
+#define AT91C_PB5_A7       (AT91C_PIO_PB5) //  
+#define AT91C_PIO_PB6        (1 <<  6) // Pin Controlled by PB6
+#define AT91C_PB6_TIOB1    (AT91C_PIO_PB6) //  
+#define AT91C_PB6_D15      (AT91C_PIO_PB6) //  
+#define AT91C_PIO_PB7        (1 <<  7) // Pin Controlled by PB7
+#define AT91C_PB7_RTS0     (AT91C_PIO_PB7) //  
+#define AT91C_PB7_A0_NBS0  (AT91C_PIO_PB7) //  
+#define AT91C_PIO_PB8        (1 <<  8) // Pin Controlled by PB8
+#define AT91C_PB8_CTS0     (AT91C_PIO_PB8) //  
+#define AT91C_PB8_A1       (AT91C_PIO_PB8) //  
+#define AT91C_PIO_PB9        (1 <<  9) // Pin Controlled by PB9
+#define AT91C_PB9_D0       (AT91C_PIO_PB9) //  
+#define AT91C_PB9_DTR0     (AT91C_PIO_PB9) //  
+#define AT91C_PIO_PC0        (1 <<  0) // Pin Controlled by PC0
+#define AT91C_PC0_A2       (AT91C_PIO_PC0) //  
+#define AT91C_PIO_PC1        (1 <<  1) // Pin Controlled by PC1
+#define AT91C_PC1_A3       (AT91C_PIO_PC1) //  
+#define AT91C_PIO_PC10       (1 << 10) // Pin Controlled by PC10
+#define AT91C_PC10_A12      (AT91C_PIO_PC10) //  
+#define AT91C_PC10_CTS3     (AT91C_PIO_PC10) //  
+#define AT91C_PIO_PC11       (1 << 11) // Pin Controlled by PC11
+#define AT91C_PC11_A13      (AT91C_PIO_PC11) //  
+#define AT91C_PC11_RTS3     (AT91C_PIO_PC11) //  
+#define AT91C_PIO_PC12       (1 << 12) // Pin Controlled by PC12
+#define AT91C_PC12_NCS1     (AT91C_PIO_PC12) //  
+#define AT91C_PC12_TXD3     (AT91C_PIO_PC12) //  
+#define AT91C_PIO_PC13       (1 << 13) // Pin Controlled by PC13
+#define AT91C_PC13_A2       (AT91C_PIO_PC13) //  
+#define AT91C_PC13_RXD3     (AT91C_PIO_PC13) //  
+#define AT91C_PIO_PC14       (1 << 14) // Pin Controlled by PC14
+#define AT91C_PC14_A3       (AT91C_PIO_PC14) //  
+#define AT91C_PC14_SPI0_NPCS2 (AT91C_PIO_PC14) //  
+#define AT91C_PIO_PC15       (1 << 15) // Pin Controlled by PC15
+#define AT91C_PC15_NWR1_NBS1 (AT91C_PIO_PC15) //  
+#define AT91C_PIO_PC16       (1 << 16) // Pin Controlled by PC16
+#define AT91C_PC16_NCS2     (AT91C_PIO_PC16) //  
+#define AT91C_PC16_PWML3    (AT91C_PIO_PC16) //  
+#define AT91C_PIO_PC17       (1 << 17) // Pin Controlled by PC17
+#define AT91C_PC17_NCS3     (AT91C_PIO_PC17) //  
+#define AT91C_PC17_A24      (AT91C_PIO_PC17) //  
+#define AT91C_PIO_PC18       (1 << 18) // Pin Controlled by PC18
+#define AT91C_PC18_NWAIT    (AT91C_PIO_PC18) //  
+#define AT91C_PIO_PC19       (1 << 19) // Pin Controlled by PC19
+#define AT91C_PC19_SCK3     (AT91C_PIO_PC19) //  
+#define AT91C_PC19_NPCS1    (AT91C_PIO_PC19) //  
+#define AT91C_PIO_PC2        (1 <<  2) // Pin Controlled by PC2
+#define AT91C_PC2_A4       (AT91C_PIO_PC2) //  
+#define AT91C_PIO_PC20       (1 << 20) // Pin Controlled by PC20
+#define AT91C_PC20_A14      (AT91C_PIO_PC20) //  
+#define AT91C_PIO_PC21       (1 << 21) // Pin Controlled by PC21
+#define AT91C_PC21_A15      (AT91C_PIO_PC21) //  
+#define AT91C_PIO_PC22       (1 << 22) // Pin Controlled by PC22
+#define AT91C_PC22_A16      (AT91C_PIO_PC22) //  
+#define AT91C_PIO_PC23       (1 << 23) // Pin Controlled by PC23
+#define AT91C_PC23_A17      (AT91C_PIO_PC23) //  
+#define AT91C_PIO_PC24       (1 << 24) // Pin Controlled by PC24
+#define AT91C_PC24_A18      (AT91C_PIO_PC24) //  
+#define AT91C_PC24_PWMH0    (AT91C_PIO_PC24) //  
+#define AT91C_PIO_PC25       (1 << 25) // Pin Controlled by PC25
+#define AT91C_PC25_A19      (AT91C_PIO_PC25) //  
+#define AT91C_PC25_PWMH1    (AT91C_PIO_PC25) //  
+#define AT91C_PIO_PC26       (1 << 26) // Pin Controlled by PC26
+#define AT91C_PC26_A20      (AT91C_PIO_PC26) //  
+#define AT91C_PC26_PWMH2    (AT91C_PIO_PC26) //  
+#define AT91C_PIO_PC27       (1 << 27) // Pin Controlled by PC27
+#define AT91C_PC27_A23      (AT91C_PIO_PC27) //  
+#define AT91C_PC27_PWMH3    (AT91C_PIO_PC27) //  
+#define AT91C_PIO_PC28       (1 << 28) // Pin Controlled by PC28
+#define AT91C_PC28_A24      (AT91C_PIO_PC28) //  
+#define AT91C_PC28_MCI0_DA4 (AT91C_PIO_PC28) //  
+#define AT91C_PIO_PC29       (1 << 29) // Pin Controlled by PC29
+#define AT91C_PC29_PWML0    (AT91C_PIO_PC29) //  
+#define AT91C_PC29_MCI0_DA5 (AT91C_PIO_PC29) //  
+#define AT91C_PIO_PC3        (1 <<  3) // Pin Controlled by PC3
+#define AT91C_PC3_A5       (AT91C_PIO_PC3) //  
+#define AT91C_PC3_SPI0_NPCS1 (AT91C_PIO_PC3) //  
+#define AT91C_PIO_PC30       (1 << 30) // Pin Controlled by PC30
+#define AT91C_PC30_PWML1    (AT91C_PIO_PC30) //  
+#define AT91C_PC30_MCI0_DA6 (AT91C_PIO_PC30) //  
+#define AT91C_PIO_PC31       (1 << 31) // Pin Controlled by PC31
+#define AT91C_PC31_PWML2    (AT91C_PIO_PC31) //  
+#define AT91C_PC31_MCI0_DA7 (AT91C_PIO_PC31) //  
+#define AT91C_PIO_PC4        (1 <<  4) // Pin Controlled by PC4
+#define AT91C_PC4_A6       (AT91C_PIO_PC4) //  
+#define AT91C_PC4_SPI0_NPCS2 (AT91C_PIO_PC4) //  
+#define AT91C_PIO_PC5        (1 <<  5) // Pin Controlled by PC5
+#define AT91C_PC5_A7       (AT91C_PIO_PC5) //  
+#define AT91C_PC5_SPI0_NPCS3 (AT91C_PIO_PC5) //  
+#define AT91C_PIO_PC6        (1 <<  6) // Pin Controlled by PC6
+#define AT91C_PC6_A8       (AT91C_PIO_PC6) //  
+#define AT91C_PC6_PWML0    (AT91C_PIO_PC6) //  
+#define AT91C_PIO_PC7        (1 <<  7) // Pin Controlled by PC7
+#define AT91C_PC7_A9       (AT91C_PIO_PC7) //  
+#define AT91C_PC7_PWML1    (AT91C_PIO_PC7) //  
+#define AT91C_PIO_PC8        (1 <<  8) // Pin Controlled by PC8
+#define AT91C_PC8_A10      (AT91C_PIO_PC8) //  
+#define AT91C_PC8_PWML2    (AT91C_PIO_PC8) //  
+#define AT91C_PIO_PC9        (1 <<  9) // Pin Controlled by PC9
+#define AT91C_PC9_A11      (AT91C_PIO_PC9) //  
+#define AT91C_PC9_PWML3    (AT91C_PIO_PC9) //  
+
+// *****************************************************************************
+//               PERIPHERAL ID DEFINITIONS FOR AT91SAM3U4
+// *****************************************************************************
+#define AT91C_ID_SUPC   ( 0) // SUPPLY CONTROLLER
+#define AT91C_ID_RSTC   ( 1) // RESET CONTROLLER
+#define AT91C_ID_RTC    ( 2) // REAL TIME CLOCK
+#define AT91C_ID_RTT    ( 3) // REAL TIME TIMER
+#define AT91C_ID_WDG    ( 4) // WATCHDOG TIMER
+#define AT91C_ID_PMC    ( 5) // PMC
+#define AT91C_ID_EFC0   ( 6) // EFC0
+#define AT91C_ID_EFC1   ( 7) // EFC1
+#define AT91C_ID_DBGU   ( 8) // DBGU
+#define AT91C_ID_HSMC4  ( 9) // HSMC4
+#define AT91C_ID_PIOA   (10) // Parallel IO Controller A
+#define AT91C_ID_PIOB   (11) // Parallel IO Controller B
+#define AT91C_ID_PIOC   (12) // Parallel IO Controller C
+#define AT91C_ID_US0    (13) // USART 0
+#define AT91C_ID_US1    (14) // USART 1
+#define AT91C_ID_US2    (15) // USART 2
+#define AT91C_ID_US3    (16) // USART 3
+#define AT91C_ID_MCI0   (17) // Multimedia Card Interface
+#define AT91C_ID_TWI0   (18) // TWI 0
+#define AT91C_ID_TWI1   (19) // TWI 1
+#define AT91C_ID_SPI0   (20) // Serial Peripheral Interface
+#define AT91C_ID_SSC0   (21) // Serial Synchronous Controller 0
+#define AT91C_ID_TC0    (22) // Timer Counter 0
+#define AT91C_ID_TC1    (23) // Timer Counter 1
+#define AT91C_ID_TC2    (24) // Timer Counter 2
+#define AT91C_ID_PWMC   (25) // Pulse Width Modulation Controller
+#define AT91C_ID_ADC12B (26) // 12-bit ADC Controller (ADC12B)
+#define AT91C_ID_ADC    (27) // 10-bit ADC Controller (ADC)
+#define AT91C_ID_HDMA   (28) // HDMA
+#define AT91C_ID_UDPHS  (29) // USB Device High Speed
+#define AT91C_ALL_INT   (0x3FFFFFFF) // ALL VALID INTERRUPTS
+
+// *****************************************************************************
+//               BASE ADDRESS DEFINITIONS FOR AT91SAM3U4
+// *****************************************************************************
+#define AT91C_BASE_SYS       (AT91_CAST(AT91PS_SYS) 	0x400E0000) // (SYS) Base Address
+#define AT91C_BASE_HSMC4_CS0 (AT91_CAST(AT91PS_HSMC4_CS) 	0x400E0070) // (HSMC4_CS0) Base Address
+#define AT91C_BASE_HSMC4_CS1 (AT91_CAST(AT91PS_HSMC4_CS) 	0x400E0084) // (HSMC4_CS1) Base Address
+#define AT91C_BASE_HSMC4_CS2 (AT91_CAST(AT91PS_HSMC4_CS) 	0x400E0098) // (HSMC4_CS2) Base Address
+#define AT91C_BASE_HSMC4_CS3 (AT91_CAST(AT91PS_HSMC4_CS) 	0x400E00AC) // (HSMC4_CS3) Base Address
+#define AT91C_BASE_HSMC4_NFC (AT91_CAST(AT91PS_HSMC4_CS) 	0x400E00FC) // (HSMC4_NFC) Base Address
+#define AT91C_BASE_HSMC4     (AT91_CAST(AT91PS_HSMC4) 	0x400E0000) // (HSMC4) Base Address
+#define AT91C_BASE_MATRIX    (AT91_CAST(AT91PS_HMATRIX2) 	0x400E0200) // (MATRIX) Base Address
+#define AT91C_BASE_NVIC      (AT91_CAST(AT91PS_NVIC) 	0xE000E000) // (NVIC) Base Address
+#define AT91C_BASE_MPU       (AT91_CAST(AT91PS_MPU) 	0xE000ED90) // (MPU) Base Address
+#define AT91C_BASE_CM3       (AT91_CAST(AT91PS_CM3) 	0xE000ED00) // (CM3) Base Address
+#define AT91C_BASE_PDC_DBGU  (AT91_CAST(AT91PS_PDC) 	0x400E0700) // (PDC_DBGU) Base Address
+#define AT91C_BASE_DBGU      (AT91_CAST(AT91PS_DBGU) 	0x400E0600) // (DBGU) Base Address
+#define AT91C_BASE_PIOA      (AT91_CAST(AT91PS_PIO) 	0x400E0C00) // (PIOA) Base Address
+#define AT91C_BASE_PIOB      (AT91_CAST(AT91PS_PIO) 	0x400E0E00) // (PIOB) Base Address
+#define AT91C_BASE_PIOC      (AT91_CAST(AT91PS_PIO) 	0x400E1000) // (PIOC) Base Address
+#define AT91C_BASE_PMC       (AT91_CAST(AT91PS_PMC) 	0x400E0400) // (PMC) Base Address
+#define AT91C_BASE_CKGR      (AT91_CAST(AT91PS_CKGR) 	0x400E041C) // (CKGR) Base Address
+#define AT91C_BASE_RSTC      (AT91_CAST(AT91PS_RSTC) 	0x400E1200) // (RSTC) Base Address
+#define AT91C_BASE_SUPC      (AT91_CAST(AT91PS_SUPC) 	0x400E1210) // (SUPC) Base Address
+#define AT91C_BASE_RTTC      (AT91_CAST(AT91PS_RTTC) 	0x400E1230) // (RTTC) Base Address
+#define AT91C_BASE_WDTC      (AT91_CAST(AT91PS_WDTC) 	0x400E1250) // (WDTC) Base Address
+#define AT91C_BASE_RTC       (AT91_CAST(AT91PS_RTC) 	0x400E1260) // (RTC) Base Address
+#define AT91C_BASE_ADC0      (AT91_CAST(AT91PS_ADC) 	0x400AC000) // (ADC0) Base Address
+#define AT91C_BASE_ADC12B     (AT91_CAST(AT91PS_ADC12B    ) 0x400A8000) // (ADC12B    ) Base Address
+#define AT91C_BASE_TC0       (AT91_CAST(AT91PS_TC) 	0x40080000) // (TC0) Base Address
+#define AT91C_BASE_TC1       (AT91_CAST(AT91PS_TC) 	0x40080040) // (TC1) Base Address
+#define AT91C_BASE_TC2       (AT91_CAST(AT91PS_TC) 	0x40080080) // (TC2) Base Address
+#define AT91C_BASE_TCB0      (AT91_CAST(AT91PS_TCB) 	0x40080000) // (TCB0) Base Address
+#define AT91C_BASE_TCB1      (AT91_CAST(AT91PS_TCB) 	0x40080040) // (TCB1) Base Address
+#define AT91C_BASE_TCB2      (AT91_CAST(AT91PS_TCB) 	0x40080080) // (TCB2) Base Address
+#define AT91C_BASE_EFC0      (AT91_CAST(AT91PS_EFC) 	0x400E0800) // (EFC0) Base Address
+#define AT91C_BASE_EFC1      (AT91_CAST(AT91PS_EFC) 	0x400E0A00) // (EFC1) Base Address
+#define AT91C_BASE_MCI0      (AT91_CAST(AT91PS_MCI) 	0x40000000) // (MCI0) Base Address
+#define AT91C_BASE_PDC_TWI0  (AT91_CAST(AT91PS_PDC) 	0x40084100) // (PDC_TWI0) Base Address
+#define AT91C_BASE_PDC_TWI1  (AT91_CAST(AT91PS_PDC) 	0x40088100) // (PDC_TWI1) Base Address
+#define AT91C_BASE_TWI0      (AT91_CAST(AT91PS_TWI) 	0x40084000) // (TWI0) Base Address
+#define AT91C_BASE_TWI1      (AT91_CAST(AT91PS_TWI) 	0x40088000) // (TWI1) Base Address
+#define AT91C_BASE_PDC_US0   (AT91_CAST(AT91PS_PDC) 	0x40090100) // (PDC_US0) Base Address
+#define AT91C_BASE_US0       (AT91_CAST(AT91PS_USART) 	0x40090000) // (US0) Base Address
+#define AT91C_BASE_PDC_US1   (AT91_CAST(AT91PS_PDC) 	0x40094100) // (PDC_US1) Base Address
+#define AT91C_BASE_US1       (AT91_CAST(AT91PS_USART) 	0x40094000) // (US1) Base Address
+#define AT91C_BASE_PDC_US2   (AT91_CAST(AT91PS_PDC) 	0x40098100) // (PDC_US2) Base Address
+#define AT91C_BASE_US2       (AT91_CAST(AT91PS_USART) 	0x40098000) // (US2) Base Address
+#define AT91C_BASE_PDC_US3   (AT91_CAST(AT91PS_PDC) 	0x4009C100) // (PDC_US3) Base Address
+#define AT91C_BASE_US3       (AT91_CAST(AT91PS_USART) 	0x4009C000) // (US3) Base Address
+#define AT91C_BASE_PDC_SSC0  (AT91_CAST(AT91PS_PDC) 	0x40004100) // (PDC_SSC0) Base Address
+#define AT91C_BASE_SSC0      (AT91_CAST(AT91PS_SSC) 	0x40004000) // (SSC0) Base Address
+#define AT91C_BASE_PDC_PWMC  (AT91_CAST(AT91PS_PDC) 	0x4008C100) // (PDC_PWMC) Base Address
+#define AT91C_BASE_PWMC_CH0  (AT91_CAST(AT91PS_PWMC_CH) 	0x4008C200) // (PWMC_CH0) Base Address
+#define AT91C_BASE_PWMC_CH1  (AT91_CAST(AT91PS_PWMC_CH) 	0x4008C220) // (PWMC_CH1) Base Address
+#define AT91C_BASE_PWMC_CH2  (AT91_CAST(AT91PS_PWMC_CH) 	0x4008C240) // (PWMC_CH2) Base Address
+#define AT91C_BASE_PWMC_CH3  (AT91_CAST(AT91PS_PWMC_CH) 	0x4008C260) // (PWMC_CH3) Base Address
+#define AT91C_BASE_PWMC      (AT91_CAST(AT91PS_PWMC) 	0x4008C000) // (PWMC) Base Address
+#define AT91C_BASE_SPI0      (AT91_CAST(AT91PS_SPI) 	0x40008000) // (SPI0) Base Address
+#define AT91C_BASE_UDPHS_EPTFIFO (AT91_CAST(AT91PS_UDPHS_EPTFIFO) 	0x20180000) // (UDPHS_EPTFIFO) Base Address
+#define AT91C_BASE_UDPHS_EPT_0 (AT91_CAST(AT91PS_UDPHS_EPT) 	0x400A4100) // (UDPHS_EPT_0) Base Address
+#define AT91C_BASE_UDPHS_EPT_1 (AT91_CAST(AT91PS_UDPHS_EPT) 	0x400A4120) // (UDPHS_EPT_1) Base Address
+#define AT91C_BASE_UDPHS_EPT_2 (AT91_CAST(AT91PS_UDPHS_EPT) 	0x400A4140) // (UDPHS_EPT_2) Base Address
+#define AT91C_BASE_UDPHS_EPT_3 (AT91_CAST(AT91PS_UDPHS_EPT) 	0x400A4160) // (UDPHS_EPT_3) Base Address
+#define AT91C_BASE_UDPHS_EPT_4 (AT91_CAST(AT91PS_UDPHS_EPT) 	0x400A4180) // (UDPHS_EPT_4) Base Address
+#define AT91C_BASE_UDPHS_EPT_5 (AT91_CAST(AT91PS_UDPHS_EPT) 	0x400A41A0) // (UDPHS_EPT_5) Base Address
+#define AT91C_BASE_UDPHS_EPT_6 (AT91_CAST(AT91PS_UDPHS_EPT) 	0x400A41C0) // (UDPHS_EPT_6) Base Address
+#define AT91C_BASE_UDPHS_DMA_1 (AT91_CAST(AT91PS_UDPHS_DMA) 	0x400A4310) // (UDPHS_DMA_1) Base Address
+#define AT91C_BASE_UDPHS_DMA_2 (AT91_CAST(AT91PS_UDPHS_DMA) 	0x400A4320) // (UDPHS_DMA_2) Base Address
+#define AT91C_BASE_UDPHS_DMA_3 (AT91_CAST(AT91PS_UDPHS_DMA) 	0x400A4330) // (UDPHS_DMA_3) Base Address
+#define AT91C_BASE_UDPHS_DMA_4 (AT91_CAST(AT91PS_UDPHS_DMA) 	0x400A4340) // (UDPHS_DMA_4) Base Address
+#define AT91C_BASE_UDPHS_DMA_5 (AT91_CAST(AT91PS_UDPHS_DMA) 	0x400A4350) // (UDPHS_DMA_5) Base Address
+#define AT91C_BASE_UDPHS_DMA_6 (AT91_CAST(AT91PS_UDPHS_DMA) 	0x400A4360) // (UDPHS_DMA_6) Base Address
+#define AT91C_BASE_UDPHS     (AT91_CAST(AT91PS_UDPHS) 	0x400A4000) // (UDPHS) Base Address
+#define AT91C_BASE_HDMA_CH_0 (AT91_CAST(AT91PS_HDMA_CH) 	0x400B003C) // (HDMA_CH_0) Base Address
+#define AT91C_BASE_HDMA_CH_1 (AT91_CAST(AT91PS_HDMA_CH) 	0x400B0064) // (HDMA_CH_1) Base Address
+#define AT91C_BASE_HDMA_CH_2 (AT91_CAST(AT91PS_HDMA_CH) 	0x400B008C) // (HDMA_CH_2) Base Address
+#define AT91C_BASE_HDMA_CH_3 (AT91_CAST(AT91PS_HDMA_CH) 	0x400B00B4) // (HDMA_CH_3) Base Address
+#define AT91C_BASE_HDMA      (AT91_CAST(AT91PS_HDMA) 	0x400B0000) // (HDMA) Base Address
+
+// *****************************************************************************
+//               MEMORY MAPPING DEFINITIONS FOR AT91SAM3U4
+// *****************************************************************************
+// ITCM
+#define AT91C_ITCM 	 (0x00100000) // Maximum ITCM Area base address
+#define AT91C_ITCM_SIZE	 (0x00010000) // Maximum ITCM Area size in byte (64 Kbytes)
+// DTCM
+#define AT91C_DTCM 	 (0x00200000) // Maximum DTCM Area base address
+#define AT91C_DTCM_SIZE	 (0x00010000) // Maximum DTCM Area size in byte (64 Kbytes)
+// IRAM
+#define AT91C_IRAM 	 (0x20000000) // Maximum Internal SRAM base address
+#define AT91C_IRAM_SIZE	 (0x00008000) // Maximum Internal SRAM size in byte (32 Kbytes)
+// IRAM_MIN
+#define AT91C_IRAM_MIN	 (0x00300000) // Minimum Internal RAM base address
+#define AT91C_IRAM_MIN_SIZE	 (0x00004000) // Minimum Internal RAM size in byte (16 Kbytes)
+// IROM
+#define AT91C_IROM 	 (0x00180000) // Internal ROM base address
+#define AT91C_IROM_SIZE	 (0x00008000) // Internal ROM size in byte (32 Kbytes)
+// IFLASH0
+#define AT91C_IFLASH0	 (0x00080000) // Maximum IFLASH Area : 128Kbyte base address
+#define AT91C_IFLASH0_SIZE	 (0x00020000) // Maximum IFLASH Area : 128Kbyte size in byte (128 Kbytes)
+#define AT91C_IFLASH0_PAGE_SIZE	 (256) // Maximum IFLASH Area : 128Kbyte Page Size: 256 bytes
+#define AT91C_IFLASH0_LOCK_REGION_SIZE	 (8192) // Maximum IFLASH Area : 128Kbyte Lock Region Size: 8 Kbytes
+#define AT91C_IFLASH0_NB_OF_PAGES	 (512) // Maximum IFLASH Area : 128Kbyte Number of Pages: 512 bytes
+#define AT91C_IFLASH0_NB_OF_LOCK_BITS	 (16) // Maximum IFLASH Area : 128Kbyte Number of Lock Bits: 16 bytes
+// IFLASH1
+#define AT91C_IFLASH1	 (0x00100000) // Maximum IFLASH Area : 128Kbyte base address
+#define AT91C_IFLASH1_SIZE	 (0x00020000) // Maximum IFLASH Area : 128Kbyte size in byte (128 Kbytes)
+#define AT91C_IFLASH1_PAGE_SIZE	 (256) // Maximum IFLASH Area : 128Kbyte Page Size: 256 bytes
+#define AT91C_IFLASH1_LOCK_REGION_SIZE	 (8192) // Maximum IFLASH Area : 128Kbyte Lock Region Size: 8 Kbytes
+#define AT91C_IFLASH1_NB_OF_PAGES	 (512) // Maximum IFLASH Area : 128Kbyte Number of Pages: 512 bytes
+#define AT91C_IFLASH1_NB_OF_LOCK_BITS	 (16) // Maximum IFLASH Area : 128Kbyte Number of Lock Bits: 16 bytes
+// EBI_CS0
+#define AT91C_EBI_CS0	 (0x10000000) // EBI Chip Select 0 base address
+#define AT91C_EBI_CS0_SIZE	 (0x10000000) // EBI Chip Select 0 size in byte (262144 Kbytes)
+// EBI_CS1
+#define AT91C_EBI_CS1	 (0x20000000) // EBI Chip Select 1 base address
+#define AT91C_EBI_CS1_SIZE	 (0x10000000) // EBI Chip Select 1 size in byte (262144 Kbytes)
+// EBI_SDRAM
+#define AT91C_EBI_SDRAM	 (0x20000000) // SDRAM on EBI Chip Select 1 base address
+#define AT91C_EBI_SDRAM_SIZE	 (0x10000000) // SDRAM on EBI Chip Select 1 size in byte (262144 Kbytes)
+// EBI_SDRAM_16BIT
+#define AT91C_EBI_SDRAM_16BIT	 (0x20000000) // SDRAM on EBI Chip Select 1 base address
+#define AT91C_EBI_SDRAM_16BIT_SIZE	 (0x02000000) // SDRAM on EBI Chip Select 1 size in byte (32768 Kbytes)
+// EBI_SDRAM_32BIT
+#define AT91C_EBI_SDRAM_32BIT	 (0x20000000) // SDRAM on EBI Chip Select 1 base address
+#define AT91C_EBI_SDRAM_32BIT_SIZE	 (0x04000000) // SDRAM on EBI Chip Select 1 size in byte (65536 Kbytes)
+// EBI_CS2
+#define AT91C_EBI_CS2	 (0x30000000) // EBI Chip Select 2 base address
+#define AT91C_EBI_CS2_SIZE	 (0x10000000) // EBI Chip Select 2 size in byte (262144 Kbytes)
+// EBI_CS3
+#define AT91C_EBI_CS3	 (0x40000000) // EBI Chip Select 3 base address
+#define AT91C_EBI_CS3_SIZE	 (0x10000000) // EBI Chip Select 3 size in byte (262144 Kbytes)
+// EBI_SM
+#define AT91C_EBI_SM	 (0x40000000) // NANDFLASH on EBI Chip Select 3 base address
+#define AT91C_EBI_SM_SIZE	 (0x10000000) // NANDFLASH on EBI Chip Select 3 size in byte (262144 Kbytes)
+// EBI_CS4
+#define AT91C_EBI_CS4	 (0x50000000) // EBI Chip Select 4 base address
+#define AT91C_EBI_CS4_SIZE	 (0x10000000) // EBI Chip Select 4 size in byte (262144 Kbytes)
+// EBI_CF0
+#define AT91C_EBI_CF0	 (0x50000000) // CompactFlash 0 on EBI Chip Select 4 base address
+#define AT91C_EBI_CF0_SIZE	 (0x10000000) // CompactFlash 0 on EBI Chip Select 4 size in byte (262144 Kbytes)
+// EBI_CS5
+#define AT91C_EBI_CS5	 (0x60000000) // EBI Chip Select 5 base address
+#define AT91C_EBI_CS5_SIZE	 (0x10000000) // EBI Chip Select 5 size in byte (262144 Kbytes)
+// EBI_CF1
+#define AT91C_EBI_CF1	 (0x60000000) // CompactFlash 1 on EBIChip Select 5 base address
+#define AT91C_EBI_CF1_SIZE	 (0x10000000) // CompactFlash 1 on EBIChip Select 5 size in byte (262144 Kbytes)
+
+#endif
diff --git a/tos/chips/cortex/m3/sam3/u/McuSleepC.nc b/tos/chips/cortex/m3/sam3/u/McuSleepC.nc
new file mode 100644
index 00000000..bcf38c86
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/McuSleepC.nc
@@ -0,0 +1,355 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ * @author Kevin Klues <Kevin.Klues@csiro.au>
+ * @author JeongGil Ko <jgko@cs.jhu.edu>
+ */
+
+#include "AT91SAM3U4.h"
+#include "hardware.h"
+#include "sam3upmchardware.h"
+#include "sam3usupchardware.h"
+#include "sam3unvichardware.h"
+#include "sam3rtthardware.h"
+#include "sam3tchardware.h"
+#include "sam3uadc12bhardware.h"
+
+module McuSleepC
+{
+  provides{
+    interface McuSleep;
+    interface McuPowerState;
+    interface Sam3LowPower;
+    interface FunctionWrapper as InterruptWrapper;
+  }
+  uses {
+    interface HplSam3Clock;
+  }
+}
+implementation{
+  #define PMC_PIO_CLOCK_MASK 0x3FFFFFFC
+
+  enum {
+    S_AWAKE,
+    S_SLEEP,
+    S_WAIT,
+    S_BACKUP,
+  };
+  norace uint32_t ps;
+
+  norace struct {
+    uint32_t mck;
+    adc12b_emr_t adc_emr;
+    pmc_pcsr_t pmc_pcsr;
+    pmc_uckr_t pmc_uckr;
+    supc_mr_t supc_mr;
+    uint32_t pioa_psr;
+    uint32_t piob_psr;
+    uint32_t pioc_psr;
+    uint32_t pioa_osr;
+    uint32_t piob_osr;
+    uint32_t pioc_osr;
+    uint32_t pioa_pusr;
+    uint32_t piob_pusr;
+    uint32_t pioc_pusr;
+  } wait_restore;
+  
+  // This C function is defined so that we can call it
+  // from platform_bootstrap(), as defined in platform.h
+  void sam3uLowPowerConfigure() @C() @spontaneous() {
+    // Only do this at startup
+    // Configure all PIO as input
+    AT91C_BASE_PIOA->PIO_ODR = 0xFFFFFFFF;
+    AT91C_BASE_PIOB->PIO_ODR = 0xFFFFFFFF;
+    AT91C_BASE_PIOC->PIO_ODR = 0xFFFFFFFF;
+    // Force all peripherals to enable PIO
+    AT91C_BASE_PIOA->PIO_PER = 0xFFFFFFFF;
+    AT91C_BASE_PIOB->PIO_PER = 0xFFFFFFFF;
+    AT91C_BASE_PIOC->PIO_PER = 0xFFFFFFFF;
+
+    call Sam3LowPower.configure();
+  }
+
+  async command void Sam3LowPower.configure() {
+    // Put the ADC into off mode
+    ADC12B->emr.bits.offmodes = 1;
+    // Disable all Peripheral Clocks
+    PMC->pc.pcdr.flat = PMC_PIO_CLOCK_MASK;
+    // Stop UTMI
+    PMC->uckr.bits.upllen = 0;
+    // Disable brownout detector
+    {
+      supc_mr_t mr = SUPC->mr;
+      mr.bits.key  = 0xA5;
+      mr.bits.boddis = 1;
+      mr.bits.bodrsten = 0;
+      SUPC->mr = mr;
+    }
+    // Customize pio settings as appropriate for the platform
+    signal Sam3LowPower.customizePio();
+  }
+
+  uint32_t getPowerState() {
+    //if (PMC->pc.pcsr.flat & PMC_PIO_CLOCK_MASK)
+    if (
+         PMC->pc.pcsr.bits.rtc    || 
+         PMC->pc.pcsr.bits.rtt    || 
+         PMC->pc.pcsr.bits.wdg    ||
+         PMC->pc.pcsr.bits.pmc    ||
+         PMC->pc.pcsr.bits.efc0   ||
+         PMC->pc.pcsr.bits.efc1   ||
+         PMC->pc.pcsr.bits.dbgu   ||
+         PMC->pc.pcsr.bits.hsmc4  ||
+         PMC->pc.pcsr.bits.pioa   ||
+         PMC->pc.pcsr.bits.piob   ||
+         PMC->pc.pcsr.bits.pioc   ||
+         PMC->pc.pcsr.bits.us0    ||
+         PMC->pc.pcsr.bits.us1    ||
+         PMC->pc.pcsr.bits.us2    ||
+         PMC->pc.pcsr.bits.us3    ||
+         PMC->pc.pcsr.bits.mci0   ||
+         PMC->pc.pcsr.bits.twi0   ||
+         PMC->pc.pcsr.bits.twi1   ||
+         PMC->pc.pcsr.bits.spi0   ||
+         PMC->pc.pcsr.bits.ssc0   ||
+         PMC->pc.pcsr.bits.tc0    ||
+         PMC->pc.pcsr.bits.tc1    ||
+         PMC->pc.pcsr.bits.tc2    ||
+         PMC->pc.pcsr.bits.pwmc   ||
+         PMC->pc.pcsr.bits.adc12b ||
+         PMC->pc.pcsr.bits.adc    ||
+         PMC->pc.pcsr.bits.hdma   ||
+         PMC->pc.pcsr.bits.udphs  ||
+         0
+       )
+      return S_SLEEP;
+    else 
+      return S_WAIT;
+  }
+
+  void commonSleep() {
+    // Check if any alarms are set for the tc2 alarm hardware.  
+    // If not, turn off its peripheral clock
+    // This is necessary because the TMicro alarm is linked to tc2.
+    // More logic will need to be added here later, as more alarms are set up
+    // for use.
+    if(!(TC->ch2.imr.bits.cpcs & 0x01))
+      PMC->pc.pcdr.bits.tc2 = 1;
+  }
+
+  void commonResume() {
+    // Turn the periperhal clock for tc2 back on so that its alarm can be
+    // set and times can be read from it
+    PMC->pc.pcer.bits.tc2 = 1;
+  }
+
+  void setupSleepMode() {
+    // Nothing special to do here yet
+  }
+  void resumeFromSleepMode() {
+    // Nothing special to do here yet
+  }
+
+  void setupWaitMode() {
+    // Save the state of the cpu we are about to change
+    wait_restore.mck = call HplSam3Clock.getMainClockSpeed();
+    wait_restore.adc_emr = ADC12B->emr;
+    wait_restore.pmc_pcsr = PMC->pc.pcsr;
+    wait_restore.pmc_uckr = PMC->uckr;
+    wait_restore.supc_mr = SUPC->mr;
+    wait_restore.pioa_psr = AT91C_BASE_PIOA->PIO_PSR;
+    wait_restore.piob_psr = AT91C_BASE_PIOB->PIO_PSR;
+    wait_restore.pioc_psr = AT91C_BASE_PIOC->PIO_PSR;
+    wait_restore.pioa_osr = AT91C_BASE_PIOA->PIO_OSR;
+    wait_restore.piob_osr = AT91C_BASE_PIOB->PIO_OSR;
+    wait_restore.pioc_osr = AT91C_BASE_PIOC->PIO_OSR;
+    wait_restore.pioa_pusr = AT91C_BASE_PIOA->PIO_PPUSR;
+    wait_restore.piob_pusr = AT91C_BASE_PIOB->PIO_PPUSR;
+    wait_restore.pioc_pusr = AT91C_BASE_PIOC->PIO_PPUSR;
+
+    // Turn off all clocks to peripheral IO and configure pins
+    // appropriately, so that when we go to sleep we are
+    // drawing the least amount of current possible 
+    call Sam3LowPower.configure();
+    // Force us into 4 MHz with the RC Oscillator
+    call HplSam3Clock.mckInit4RC(); 
+    // Setup for wait mode 
+    PMC->fsmr.bits.lpm = 1;
+    // Only resume from wait mode with an input from the RTT
+    PMC->fsmr.bits.rttal = 1;
+    // Make sure we DON'T go into deep sleep (i.e. backup mode)
+    SCB->scr.bits.sleepdeep = 0;
+  }
+
+  void resumeFromWaitMode() {
+    // Restore the old clock settings
+    uint32_t oldMck = wait_restore.mck;
+    if(oldMck > 13000 && oldMck < 49000){
+      call HplSam3Clock.mckInit48();
+    }else if(oldMck > 49000 && oldMck < 90000){
+      call HplSam3Clock.mckInit84();
+    }else if(oldMck > 90000){
+      call HplSam3Clock.mckInit96();
+    }
+    // Restore the ADC to its previous mode
+    ADC12B->emr = wait_restore.adc_emr;
+    // Reenable peripheral clocks, as appropriate
+    PMC->pc.pcer.flat = wait_restore.pmc_pcsr.flat;
+    PMC->pc.pcdr.flat = ~wait_restore.pmc_pcsr.flat;
+    // Reenable the UTMI clock, as appropriate
+    PMC->uckr = wait_restore.pmc_uckr;
+    // Reenable brownout detector, as appropriate
+    {
+      supc_mr_t mr;
+      mr = wait_restore.supc_mr;
+      mr.bits.key  = 0xA5;
+      SUPC->mr = mr;
+    }
+    // Restore the PIO output/input pin and pullup resistor
+    // settings to the values they had before entering wait mode
+    AT91C_BASE_PIOA->PIO_PER = wait_restore.pioa_psr; 
+    AT91C_BASE_PIOB->PIO_PER = wait_restore.piob_psr; 
+    AT91C_BASE_PIOC->PIO_PER = wait_restore.pioc_psr; 
+    AT91C_BASE_PIOA->PIO_PDR = ~wait_restore.pioa_psr; 
+    AT91C_BASE_PIOB->PIO_PDR = ~wait_restore.piob_psr; 
+    AT91C_BASE_PIOC->PIO_PDR = ~wait_restore.pioc_psr; 
+
+    AT91C_BASE_PIOA->PIO_OER = wait_restore.pioa_osr; 
+    AT91C_BASE_PIOB->PIO_OER = wait_restore.piob_osr; 
+    AT91C_BASE_PIOC->PIO_OER = wait_restore.pioc_osr; 
+    AT91C_BASE_PIOA->PIO_ODR = ~wait_restore.pioa_osr; 
+    AT91C_BASE_PIOB->PIO_ODR = ~wait_restore.piob_osr; 
+    AT91C_BASE_PIOC->PIO_ODR = ~wait_restore.pioc_osr; 
+
+    // Notice the reverse logic below - its on purpose, check the data sheet
+    // 0 means active, 1 means inactive
+    AT91C_BASE_PIOA->PIO_PPUER = ~wait_restore.pioa_pusr;
+    AT91C_BASE_PIOB->PIO_PPUER = ~wait_restore.piob_pusr;
+    AT91C_BASE_PIOC->PIO_PPUER = ~wait_restore.pioc_pusr;
+    AT91C_BASE_PIOA->PIO_PPUDR = wait_restore.pioa_pusr;
+    AT91C_BASE_PIOB->PIO_PPUDR = wait_restore.piob_pusr;
+    AT91C_BASE_PIOC->PIO_PPUDR = wait_restore.pioc_pusr;
+  }
+
+  void setupBackupMode() {
+    // Not yet supported....
+    // Need to think more about how to do this since it is essentially a "hibernate"
+    //  mode, meaning we will have to save all register and memory state into 
+    //  non-volatile memory. Possibly more state will need to be saved as well.
+  }
+  void resumeFromBackupMode() {
+    // Not yet supported....
+    // Need to think more about how to do this since it is essentially a "hibernate"
+    //  mode and resuming will be from a reboot, not a simple interrupt service routine
+    // Consider changing vectors.c to call out to this after checking some state variable
+    // stored in the internal EEFC.
+  }
+
+  async command void McuSleep.sleep()
+  {
+    commonSleep();
+    switch(ps = getPowerState()) {
+      case S_AWAKE:
+        //Just stay awake...
+        break; 
+      case S_SLEEP:
+        // Setup for sleep mode
+        setupSleepMode();
+        break;
+      case S_WAIT:
+        // Setup for wait mode
+        setupWaitMode();
+        break;
+      case S_BACKUP:
+        // Setup for backup mode
+        setupBackupMode();
+        break;
+      default:
+        // Default setup
+        setupSleepMode();
+    }
+
+    __nesc_enable_interrupt();
+
+    // Enter appropriate idle mode
+    if(ps != S_AWAKE)
+      __asm volatile ("wfe");
+
+    // Normally, at this point we can only be woken up by an interrupt, so execution continues
+    // in the body of the InterruptWrapper.preamble() command before returning to here
+    // However, if we never actually went to sleep, we need to force this command to run.
+    if(ps == S_AWAKE)
+      call InterruptWrapper.preamble();
+  
+    // all of memory may change at this point, because an IRQ handler
+    // may have posted a task!
+    asm volatile("" : : : "memory");
+
+    __nesc_disable_interrupt();
+  }
+
+  async command void InterruptWrapper.preamble() {
+    atomic {
+      switch(ps) {
+        case S_AWAKE:
+          // Stayed awake the whole time, so do nothing
+          break; 
+        case S_SLEEP:
+          // Resume from sleep mode
+          resumeFromSleepMode();
+          break;
+        case S_WAIT:
+          // Resume from wait mode
+          resumeFromWaitMode();
+          break;
+        case S_BACKUP:
+          // Resume from backup mode
+          resumeFromBackupMode();
+          break;
+        default:
+          // Default resume
+          resumeFromSleepMode();
+      }
+      if(ps != S_AWAKE)
+        commonResume();
+      ps = S_AWAKE;
+    }
+  }
+  async command void InterruptWrapper.postamble() { /* Do nothing */ }
+  async command void McuPowerState.update(){}
+  async event void HplSam3Clock.mainClockChanged(){}
+
+  default async event void Sam3LowPower.customizePio() {}
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/AdcP.nc b/tos/chips/cortex/m3/sam3/u/adc12b/AdcP.nc
new file mode 100644
index 00000000..89fbcb72
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/AdcP.nc
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+
+module AdcP {
+  provides {
+    interface Read<uint16_t> as Read[uint8_t client];
+    interface ReadNow<uint16_t> as ReadNow[uint8_t client];
+    interface Resource as ResourceReadNow[uint8_t client];
+  }
+  uses {
+    // for Read only:
+    interface Resource as ResourceRead[uint8_t client];
+    // for ReadNow only:
+    interface Resource as SubResourceReadNow[uint8_t client];
+    // for Read and ReadNow:
+    interface Sam3uGetAdc12b as GetAdc[uint8_t client];
+    interface AdcConfigure<const sam3u_adc12_channel_config_t*> as Config[uint8_t client];
+  }
+}
+
+implementation
+{
+
+  norace uint8_t state;
+  norace uint8_t readNowClient;
+  norace uint8_t setClient;
+  norace uint16_t adcResult;
+
+  enum {
+    S_READ,
+    S_READNOW,
+  };
+
+  error_t configureAdcRegisters(uint8_t client)
+  {
+    const sam3u_adc12_channel_config_t * ONE config;
+    config = call Config.getConfiguration[client]();
+    return call GetAdc.configureAdc[client](config);
+  }
+
+  /** Read.read - TEP 114 **/
+  command error_t Read.read[uint8_t client]()
+  {
+    state = S_READ;
+    return call ResourceRead.request[client]();
+  }
+
+  event void ResourceRead.granted[uint8_t client]() 
+  {
+
+    error_t result = configureAdcRegisters(client);
+
+    if(result == SUCCESS){
+      //call actual read!
+      call GetAdc.getData[client]();
+    }else{
+      //configure failed!
+      call ResourceRead.release[client]();
+      signal Read.readDone[client](result, 0);
+    }
+  }
+
+  /************************************************/
+
+  /** ReadNow.read **/    
+  async command error_t ReadNow.read[uint8_t nowClient]()
+  {
+    if(call SubResourceReadNow.isOwner[nowClient]()){
+      return call GetAdc.getData[nowClient]();
+    }else{
+      return FAIL;
+    }
+  }
+
+  task void signalGranted(){
+    error_t error =  configureAdcRegisters(readNowClient);
+    if(error == SUCCESS){
+      state = S_READNOW;
+    }else{
+      // config error
+    }
+    signal ResourceReadNow.granted[readNowClient]();    
+  }
+
+  async command error_t ResourceReadNow.request[uint8_t nowClient]()
+  {
+    if(!call SubResourceReadNow.isOwner[nowClient]())
+      return call SubResourceReadNow.request[nowClient]();
+    else{
+      atomic readNowClient = nowClient;
+      post signalGranted();
+      return SUCCESS;
+    }
+  }
+
+  event void SubResourceReadNow.granted[uint8_t nowClient]()
+  {
+    error_t error =  configureAdcRegisters(nowClient);
+    if(error == SUCCESS){
+      state = S_READNOW;
+    }else{
+      // config error
+    }
+    signal ResourceReadNow.granted[nowClient]();
+  }
+
+  async command error_t ResourceReadNow.immediateRequest[uint8_t nowClient]()
+  {
+    error_t result = call SubResourceReadNow.immediateRequest[nowClient]();
+    if (result == SUCCESS){
+      result = configureAdcRegisters(nowClient);
+      if (result == SUCCESS)
+        state = S_READNOW;
+    }
+    return result;
+  }
+
+  async command error_t ResourceReadNow.release[uint8_t nowClient]()
+  {
+    return call SubResourceReadNow.release[nowClient]();
+  }
+
+  async command bool ResourceReadNow.isOwner[uint8_t nowClient]()
+  {
+    return call SubResourceReadNow.isOwner[nowClient]();
+  }
+
+  /** Read Done **/
+  void task readDone()
+  {
+    call ResourceRead.release[setClient]();
+    signal Read.readDone[setClient](SUCCESS, adcResult);
+  }
+
+  void task readDoneNow()
+  {
+    signal ReadNow.readDone[setClient](SUCCESS, adcResult);
+  }
+
+  /************************************************/
+
+  /** Data is ready! **/
+  async event error_t GetAdc.dataReady[uint8_t client](uint16_t data)
+  {
+    atomic setClient = client;
+    atomic adcResult = data;
+
+    switch (state)
+    {
+    case S_READ:
+      call ResourceRead.release[client]();
+      post readDone();
+      break;
+    case S_READNOW:
+      post readDoneNow();
+      break;
+    default:
+      break;
+    }
+    return SUCCESS;
+  }
+  /************************************************/
+
+  const sam3u_adc12_channel_config_t defaultConfig = {
+    channel: 0,
+    diff: 0,
+    prescal: 2,
+    lowres: 0,
+    shtim: 15,
+    ibctl: 1,
+    sleep: 0,
+    startup: 104,
+    trgen: 0,
+    trgsel: 0
+  };
+
+ default async command error_t ResourceRead.request[uint8_t client]() { return FAIL; }
+ default async command error_t ResourceRead.immediateRequest[uint8_t client]() { return FAIL; }
+ default async command error_t ResourceRead.release[uint8_t client]() { return FAIL; }
+ default async command bool ResourceRead.isOwner[uint8_t client]() { return FALSE; }
+ default event void Read.readDone[uint8_t client]( error_t result, uint16_t val ){}
+ default async command error_t SubResourceReadNow.release[uint8_t nowClient](){ return FAIL;}
+ default async command error_t SubResourceReadNow.request[uint8_t nowClient](){ return FAIL; }
+ default async command bool SubResourceReadNow.isOwner[uint8_t client]() { return FALSE; }
+ default event void ResourceReadNow.granted[uint8_t nowClient](){}
+ default async event void ReadNow.readDone[uint8_t client]( error_t result, uint16_t val ){}
+ default async command error_t SubResourceReadNow.immediateRequest[uint8_t nowClient]() { return FAIL; }
+ default async command error_t GetAdc.getData[uint8_t client](){ return EINVAL; }
+  
+ default async command const sam3u_adc12_channel_config_t*
+ Config.getConfiguration[uint8_t client]()
+  { 
+    return &defaultConfig;
+  }  
+  
+ default async command error_t GetAdc.configureAdc[uint8_t client](const sam3u_adc12_channel_config_t *config){ return FAIL; }
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/AdcReadClientC.nc b/tos/chips/cortex/m3/sam3/u/adc12b/AdcReadClientC.nc
new file mode 100644
index 00000000..f71e0377
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/AdcReadClientC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+generic configuration AdcReadClientC()
+{
+  provides {
+    interface Read<uint16_t>;
+  }
+  uses interface AdcConfigure<const sam3u_adc12_channel_config_t*>;
+} 
+
+implementation {
+  components AdcP;
+  components new Sam3uAdc12bClientC();
+
+  enum {
+    CLIENT = unique(ADCC_SERVICE),
+  };
+
+  Read = AdcP.Read[CLIENT];
+  AdcConfigure = AdcP.Config[CLIENT];
+
+  AdcP.GetAdc[CLIENT] -> Sam3uAdc12bClientC.Sam3uGetAdc12b;
+  AdcP.ResourceRead[CLIENT] -> Sam3uAdc12bClientC.Resource;  
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/AdcReadNowClientC.nc b/tos/chips/cortex/m3/sam3/u/adc12b/AdcReadNowClientC.nc
new file mode 100644
index 00000000..eebf3285
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/AdcReadNowClientC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+generic configuration AdcReadNowClientC() 
+{ 
+  provides {
+    interface ReadNow<uint16_t>;
+    interface Resource;
+  }
+  uses interface AdcConfigure<const sam3u_adc12_channel_config_t*>;
+} 
+
+implementation {
+  components AdcP;
+  components new Sam3uAdc12bClientC();
+
+  enum {
+    CLIENT = unique(ADCC_SERVICE),
+  };
+
+  ReadNow = AdcP.ReadNow[CLIENT];
+  AdcConfigure = AdcP.Config[CLIENT];
+  Resource = AdcP.ResourceReadNow[CLIENT];
+
+  AdcP.GetAdc[CLIENT] -> Sam3uAdc12bClientC.Sam3uGetAdc12b;
+  AdcP.SubResourceReadNow[CLIENT] -> Sam3uAdc12bClientC.Resource;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/AdcReadStreamClientC.nc b/tos/chips/cortex/m3/sam3/u/adc12b/AdcReadStreamClientC.nc
new file mode 100644
index 00000000..de7ef589
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/AdcReadStreamClientC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+generic configuration AdcReadStreamClientC()
+{ 
+  provides {
+    interface ReadStream<uint16_t>;
+  }
+  uses interface AdcConfigure<const sam3u_adc12_channel_config_t*>;
+} 
+
+implementation {
+
+#ifndef SAM3U_ADC12B_PDC
+  components AdcStreamP;
+#else
+  components AdcStreamPDCP as AdcStreamP;
+#endif
+  components new Sam3uAdc12bClientC();
+  components WireAdcStreamP;
+
+  enum {
+    CLIENT = unique(ADCC_READ_STREAM_SERVICE),
+  };
+
+  ReadStream = WireAdcStreamP.ReadStream[CLIENT];
+  AdcConfigure = WireAdcStreamP.AdcConfigure[CLIENT];
+
+  WireAdcStreamP.Resource[CLIENT] -> Sam3uAdc12bClientC.Resource;
+  WireAdcStreamP.Sam3uGetAdc12b[CLIENT] -> Sam3uAdc12bClientC.Sam3uGetAdc12b;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/AdcStreamP.nc b/tos/chips/cortex/m3/sam3/u/adc12b/AdcStreamP.nc
new file mode 100644
index 00000000..919b0530
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/AdcStreamP.nc
@@ -0,0 +1,259 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation for ReadStream interface in Sam3u
+ * (Coverted msp430 and atm128 code)
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+module AdcStreamP {
+  provides {
+    interface Init @atleastonce();
+    interface ReadStream<uint16_t>[uint8_t client];
+  }
+  uses {
+    interface Sam3uGetAdc12b as GetAdc[uint8_t client];
+    interface AdcConfigure<const sam3u_adc12_channel_config_t*> as Config[uint8_t client];
+    interface Alarm<TMicro, uint32_t>;
+    interface Leds;
+  }
+}
+implementation {
+  enum {
+    NSTREAM = uniqueCount(ADCC_READ_STREAM_SERVICE)
+  };
+
+  norace uint8_t client = NSTREAM;
+
+  struct list_entry_t {
+    uint16_t count;
+    struct list_entry_t * ONE_NOK next;
+  };
+  struct list_entry_t *bufferQueue[NSTREAM];
+  struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM];
+  uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount;
+
+  norace uint16_t count;
+  norace uint16_t * COUNT_NOK(count) buffer; 
+  norace uint16_t * BND_NOK(buffer, buffer+count) pos;
+  norace uint32_t now, period;
+
+  command error_t Init.init() {
+    uint8_t i;
+
+    for (i = 0; i != NSTREAM; i++)
+      bufferQueueEnd[i] = &bufferQueue[i];
+
+    return SUCCESS;
+  }
+
+  void sampleSingle() {
+    call GetAdc.getData[client]();
+  }
+
+  error_t postBuffer(uint8_t c, uint16_t *buf, uint16_t n)
+  {
+    if (n < sizeof(struct list_entry_t))
+      return ESIZE;
+    atomic
+    {
+      struct list_entry_t * ONE newEntry = TCAST(struct list_entry_t * ONE, buf);
+
+      if (!bufferQueueEnd[c])
+        return FAIL;
+
+      newEntry->count = n;
+      newEntry->next = NULL;
+      *bufferQueueEnd[c] = newEntry;
+      bufferQueueEnd[c] = &newEntry->next;
+    }
+
+    return SUCCESS;
+  }
+
+  command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) {
+    return postBuffer(c, buf, n);
+  }
+
+  task void readStreamDone() {
+    uint8_t c = client;
+    uint32_t actualPeriod = period;
+
+    atomic
+    {
+      bufferQueue[c] = NULL;
+      bufferQueueEnd[c] = &bufferQueue[c];
+    }
+
+    client = NSTREAM;
+    signal ReadStream.readDone[c](SUCCESS, actualPeriod);
+  }
+
+  task void readStreamFail() {
+    struct list_entry_t *entry;
+    uint8_t c = client;
+
+    atomic entry = bufferQueue[c];
+    for (; entry; entry = entry->next) {
+      uint16_t tmp_count __DEPUTY_UNUSED__ = entry->count;
+      signal ReadStream.bufferDone[c](FAIL, TCAST(uint16_t * COUNT_NOK(tmp_count),entry), entry->count);
+    }
+
+    atomic
+    {
+      bufferQueue[c] = NULL;
+      bufferQueueEnd[c] = &bufferQueue[c];
+    }
+
+    client = NSTREAM;
+    signal ReadStream.readDone[c](FAIL, 0);
+  }
+
+  task void bufferDone() {
+    uint16_t *b, c;
+    atomic
+    {
+      b = lastBuffer;
+      c = lastCount;
+      lastBuffer = NULL;
+    }
+    signal ReadStream.bufferDone[client](SUCCESS, b, c);
+  }
+
+  void nextAlarm() {
+    call Alarm.startAt(now, period);
+    now += period;
+  }
+
+  async event void Alarm.fired() {
+    sampleSingle();
+  }
+
+  error_t nextBuffer(bool startNextAlarm) {
+    atomic
+    {
+      struct list_entry_t *entry = bufferQueue[client];
+
+      if (!entry)
+      {
+        // all done
+        bufferQueueEnd[client] = NULL; // prevent post
+        post readStreamDone();
+        return FAIL;
+      }
+      else
+      {
+        uint16_t tmp_count;
+        bufferQueue[client] = entry->next;
+        if (!bufferQueue[client])
+          bufferQueueEnd[client] = &bufferQueue[client];
+	pos = buffer = NULL;
+        count = entry->count;
+        tmp_count = count;
+	pos = buffer = TCAST(uint16_t * COUNT_NOK(tmp_count), entry);
+        if (startNextAlarm)
+          nextAlarm();
+        return SUCCESS;
+      }
+    }
+  }
+
+  command error_t ReadStream.read[uint8_t c](uint32_t usPeriod)
+  {
+    /* not exactly microseconds                 */
+    /* ADC is currently based on a 1.5MHz clock */
+    period = usPeriod; 
+    client = c;
+    now = call Alarm.getNow();
+    call GetAdc.configureAdc[c](call Config.getConfiguration[c]());
+    if (nextBuffer(FALSE) == SUCCESS){
+       sampleSingle();
+    }
+    return SUCCESS;
+  }
+
+  async event error_t GetAdc.dataReady[uint8_t streamClient](uint16_t data)
+  {
+    call Leds.led0Toggle();
+    if (client == NSTREAM)
+      return FAIL;
+
+    if (count == 0)
+    {
+      now = call Alarm.getNow();
+      nextBuffer(TRUE);
+    }
+    else
+    {
+      *pos++ = data;
+      if (pos == buffer + count)
+      {
+        atomic
+        {
+          if (lastBuffer)
+          {
+            /* We failed to signal bufferDone in time. Fail. */
+            bufferQueueEnd[client] = NULL; // prevent post
+            post readStreamFail();
+            return FAIL;
+          }
+          else
+          {
+	    lastCount = count;
+            lastBuffer = buffer;
+          }
+        }
+        post bufferDone();
+        nextBuffer(TRUE);
+      }
+      else
+        nextAlarm();
+    }
+    return FAIL;
+  }
+
+  const sam3u_adc12_channel_config_t defaultConfig = {
+  };
+
+  default async command const sam3u_adc12_channel_config_t* Config.getConfiguration[uint8_t c]()
+  { 
+    return &defaultConfig;
+  }
+
+  default async command error_t GetAdc.getData[uint8_t c]()
+  {
+    return FAIL;
+  }  
+  default async command error_t GetAdc.configureAdc[uint8_t c](
+      const sam3u_adc12_channel_config_t *config){ return FAIL; }
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/AdcStreamPDCP.nc b/tos/chips/cortex/m3/sam3/u/adc12b/AdcStreamPDCP.nc
new file mode 100644
index 00000000..a773ae4e
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/AdcStreamPDCP.nc
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation for ReadStream interface with PDC in Sam3u
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+module AdcStreamPDCP {
+  provides {
+    interface Init @atleastonce();
+    interface ReadStream<uint16_t>[uint8_t client];
+  }
+  uses {
+    interface Sam3uGetAdc12b as GetAdc[uint8_t client];
+    interface AdcConfigure<const sam3u_adc12_channel_config_t*> as Config[uint8_t client];
+    //interface Alarm<TMicro, uint32_t>;
+    interface HplSam3Pdc as HplPdc;
+    interface Leds;
+  }
+}
+implementation {
+  enum {
+    NSTREAM = uniqueCount(ADCC_READ_STREAM_SERVICE)
+  };
+
+  norace uint8_t client = NSTREAM;
+  volatile adc12b_cr_t *CR = (volatile adc12b_cr_t *) 0x400A8000;
+  adc12b_cr_t cr;
+
+  struct list_entry_t {
+    uint16_t count;
+    struct list_entry_t * ONE_NOK next;
+  };
+  struct list_entry_t *bufferQueue[NSTREAM];
+  struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM];
+  uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount;
+
+  norace uint16_t count;
+  norace uint16_t * COUNT_NOK(count) buffer; 
+  norace uint16_t * BND_NOK(buffer, buffer+count) pos;
+  norace uint32_t now, period;
+  norace uint16_t originalLength;
+  norace uint16_t *originalPointer;
+  norace uint8_t state;
+
+  enum{
+    S_READ,
+    S_IDLE,
+  };
+
+  command error_t Init.init() {
+    uint8_t i;
+    state = S_IDLE;
+    for (i = 0; i != NSTREAM; i++)
+      bufferQueueEnd[i] = &bufferQueue[i];
+
+    return SUCCESS;
+  }
+
+  void samplePdc() {
+    // switch this to pdc enable
+    call HplPdc.enablePdcRx();
+    atomic cr.bits.start = 1; // enable software trigger
+    atomic *CR = cr;  
+  }
+
+  command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) {
+    // set parameters here!!!!
+    // set pdc buffers and set the length as a global parameter
+    originalLength = n;
+    originalPointer = buf;
+    call HplPdc.setRxPtr(buf);
+    call HplPdc.setRxCounter(n);
+    return SUCCESS;
+  }
+
+  command error_t ReadStream.read[uint8_t c](uint32_t usPeriod)
+  {
+    period = usPeriod; 
+    client = c;
+    call GetAdc.configureAdc[c](call Config.getConfiguration[c]());
+    state = S_READ;
+    samplePdc();
+    return SUCCESS;
+  }
+
+  task void signalReadDone(){
+    signal ReadStream.readDone[client](SUCCESS, period);
+  }
+
+  task void signalBufferDone(){
+    signal ReadStream.bufferDone[client](SUCCESS, originalPointer, originalLength);
+  }
+
+  async event error_t GetAdc.dataReady[uint8_t streamClient](uint16_t data)
+  {
+    if(state == S_READ){
+      atomic state = S_IDLE;
+      call HplPdc.disablePdcRx();
+      post signalReadDone();
+      post signalBufferDone();
+    }
+    return SUCCESS;
+  }
+
+  const sam3u_adc12_channel_config_t defaultConfig = {
+  };
+
+  default async command const sam3u_adc12_channel_config_t* Config.getConfiguration[uint8_t c]()
+  { 
+    return &defaultConfig;
+  }
+
+  default async command error_t GetAdc.getData[uint8_t c]()
+  {
+    return FAIL;
+  }  
+  default async command error_t GetAdc.configureAdc[uint8_t c](
+      const sam3u_adc12_channel_config_t *config){ return FAIL; }
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/HplAdc12b.nc b/tos/chips/cortex/m3/sam3/u/adc12b/HplAdc12b.nc
new file mode 100644
index 00000000..977d7770
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/HplAdc12b.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// introduce interfaces for Hpl
+
+#include "sam3uadc12bhardware.h"
+
+interface HplAdc12b{
+
+  async command void startConversion();
+  async command void stopConversion();
+  async command void enableConversion();
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/HplAdc12bC.nc b/tos/chips/cortex/m3/sam3/u/adc12b/HplAdc12bC.nc
new file mode 100644
index 00000000..0aa49d4b
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/HplAdc12bC.nc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration HplAdc12bC{
+  provides{
+    interface HplAdc12b;
+  }
+}
+
+implementation{
+  components HplAdc12P; 
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/HplAdc12bP.nc b/tos/chips/cortex/m3/sam3/u/adc12b/HplAdc12bP.nc
new file mode 100644
index 00000000..3d5126a5
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/HplAdc12bP.nc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// Implement lowest layer - Hpl
+
+module HplAdc12P {
+  provides interface HplAdc12;
+}
+implementation
+{
+  
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/README b/tos/chips/cortex/m3/sam3/u/adc12b/README
new file mode 100644
index 00000000..c0b81bd6
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/README
@@ -0,0 +1,10 @@
+12 bit ADC implementation for SAM3U 
+
+@author JeongGil Ko <jgko@cs.jhu.edu>
+
+The implementation is based on the preliminary specifications and the MSP430 implementations.
+
+- Supported Interfaces
+--- Read Interface
+--- ReadNow Interface
+--- ReadStream Interface
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uAdc12bClientC.nc b/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uAdc12bClientC.nc
new file mode 100644
index 00000000..d8be4f7f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uAdc12bClientC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+
+generic configuration Sam3uAdc12bClientC()
+{
+  provides {
+    interface Resource;
+    interface Sam3uGetAdc12b;
+  }
+} 
+
+implementation {
+
+  components Sam3uAdc12bP;
+
+  enum {
+    ID = unique(SAM3UADC12_RESOURCE),
+  };
+
+  Resource = Sam3uAdc12bP.Resource[ID];
+  Sam3uGetAdc12b = Sam3uAdc12bP.Sam3uGetAdc12b[ID];
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uAdc12bImplP.nc b/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uAdc12bImplP.nc
new file mode 100644
index 00000000..99f6cb30
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uAdc12bImplP.nc
@@ -0,0 +1,270 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+module Sam3uAdc12bImplP
+{
+  provides {
+    interface Init;
+    interface Sam3uGetAdc12b as Sam3uAdc12b[uint8_t id];
+  }
+
+  uses {
+    interface HplNVICInterruptCntl as ADC12BInterrupt;
+    interface HplSam3GeneralIOPin as Adc12bPin;
+    interface HplSam3PeripheralClockCntl as Adc12bClockControl;
+    interface HplSam3Clock as ClockConfig;
+    interface FunctionWrapper as Adc12bInterruptWrapper;
+#ifdef SAM3U_ADC12B_PDC
+    interface HplSam3Pdc as HplPdc;
+#endif
+    interface Leds;
+  }
+}
+
+implementation
+{
+
+  norace uint8_t clientID;
+
+  norace uint8_t state;
+
+  enum{
+    S_ADC,
+    S_IDLE,
+  };
+
+  command error_t Init.init(){
+
+    /* Enable interrupts */
+    call ADC12BInterrupt.configure(IRQ_PRIO_ADC12B); // Peripheral ID 26 for ADC12B
+    call ADC12BInterrupt.enable();
+
+    /* Enable clock */
+    call Adc12bClockControl.enable();
+
+    /* Set IO line */
+    call Adc12bPin.disablePioControl(); // Disable whatever is set currently
+    call Adc12bPin.selectPeripheralB(); // set to peripheral B
+
+    state = S_IDLE;
+
+    return SUCCESS;
+  }
+
+  async command error_t Sam3uAdc12b.configureAdc[uint8_t id](const sam3u_adc12_channel_config_t *config){
+
+    // Since CHER is write-only read the information in CHSR in CHER format
+    //volatile adc12b_cher_t *CHSR = (volatile adc12b_cher_t *) 0x400A8018;
+    volatile adc12b_cher_t *CHER = (volatile adc12b_cher_t *) 0x400A8010;
+    adc12b_cher_t cher;
+
+    volatile adc12b_chdr_t *CHDR = (volatile adc12b_chdr_t *) 0x400A8014;
+    adc12b_chdr_t chdr;
+
+    // Since IER is write-only read the information in IMR in IER format
+    //volatile adc12b_ier_t *IMR = (volatile adc12b_ier_t *) 0x400A802C;
+    volatile adc12b_ier_t *IER =  (volatile adc12b_ier_t *) 0x400A8024;
+    adc12b_ier_t ier;
+
+    volatile adc12b_idr_t *IDR =  (volatile adc12b_idr_t *) 0x400A8028;
+    adc12b_idr_t idr;
+
+    // CR is write-only; There is no need to read it for modification but just set the memory location
+    volatile adc12b_cr_t *CR = (volatile adc12b_cr_t *) 0x400A8000;
+    adc12b_cr_t cr;
+
+    // MR is read-write
+    volatile adc12b_mr_t *MR = (volatile adc12b_mr_t *) 0x400A8004;
+    adc12b_mr_t mr = *MR;
+
+    // ACR is read-write
+    volatile adc12b_acr_t *ACR = (volatile adc12b_acr_t *) 0x400A8064;
+    adc12b_acr_t acr = *ACR;
+
+    // EMR is read-write
+    volatile adc12b_emr_t *EMR = (volatile adc12b_emr_t *) 0x400A8068;
+    adc12b_emr_t emr = *EMR;
+
+    cher.flat = 0;
+    chdr.flat = 0x000000FF;
+    *CHDR = chdr;
+    idr.flat = 0x000000FF;
+    *IDR = idr;
+
+    switch(config->channel) {
+    case 0:
+      cher.bits.ch0 = 1;
+      ier.bits.eoc0 = 1;
+      break;
+    case 1:
+      cher.bits.ch1 = 1;
+      ier.bits.eoc1 = 1;
+      break;
+    case 2:
+      cher.bits.ch2 = 1;
+      ier.bits.eoc2 = 1;
+      break;
+    case 3:
+      cher.bits.ch3 = 1;
+      ier.bits.eoc3 = 1;
+      break;
+    case 4:
+      cher.bits.ch4 = 1;
+      ier.bits.eoc4 = 1;
+      break;
+    case 5:
+      cher.bits.ch5 = 1;
+      ier.bits.eoc5 = 1;
+      break;
+    case 6:
+      cher.bits.ch6 = 1;
+      ier.bits.eoc6 = 1;
+      break;
+    case 7:
+      cher.bits.ch7 = 1;
+      ier.bits.eoc7 = 1;
+      break;
+    default:
+      // Just return FAIL?
+      cher.bits.ch0 = 0;
+      ier.bits.eoc0 = 0;
+      break;
+    }
+
+    cr.bits.swrst = 0;
+    cr.bits.start = 0; // disable start bit for the configuration stage
+
+    mr.bits.prescal = config->prescal;
+    mr.bits.shtim = config->shtim;
+    mr.bits.lowres = config->lowres;
+    mr.bits.trgen = config->trgen;
+    mr.bits.trgsel = config->trgsel;
+    mr.bits.sleep = config->sleep;
+    mr.bits.startup = config->startup;
+
+    acr.bits.ibctl = config->ibctl;
+    acr.bits.gain = 0;
+    acr.bits.diff = config->diff;
+    acr.bits.offset = 0;
+
+    emr.bits.offmodes = 0;
+    emr.bits.off_mode_startup_time = config->startup;
+
+    // We have now locally modified all the register values
+    // Write the register back in its respective memory space
+    *CHER = cher;
+    *IER = ier;
+    *CR = cr;
+    *MR = mr;
+    *ACR = acr;
+    *EMR = emr;
+
+    return SUCCESS;
+  }
+
+  async command error_t Sam3uAdc12b.getData[uint8_t id](){
+    // CR is write-only; There is no need to read it for modification but just set the memory location
+    volatile adc12b_cr_t *CR = (volatile adc12b_cr_t *) 0x400A8000;
+    adc12b_cr_t cr;
+
+    call Adc12bClockControl.enable();
+
+    atomic clientID = id;
+    if(state != S_IDLE){
+      return EBUSY;
+    }else{
+      cr.bits.start = 1; // enable software trigger
+      *CR = cr;
+      atomic state = S_ADC;
+      return SUCCESS;
+    }
+  }
+
+  async event void ClockConfig.mainClockChanged(){}
+
+  /* Get events (signals) from chips here! */
+  void handler() @spontaneous() {
+
+    // CR is write-only; There is no need to read it for modification but just set the memory location
+    volatile adc12b_cr_t *CR = (volatile adc12b_cr_t *) 0x400A8000;
+    adc12b_cr_t cr;
+
+    // Read SR
+    volatile adc12b_sr_t *SR = (volatile adc12b_sr_t *) 0x400A801C;
+    adc12b_sr_t sr = *SR;
+
+    uint16_t data = 0;
+
+#ifndef SAM3U_ADC12B_PDC
+    // Read LCDR
+    volatile adc12b_lcdr_t *LCDR = (volatile adc12b_lcdr_t *) 0x400A8020;
+    adc12b_lcdr_t lcdr = *LCDR;
+    
+    if(sr.bits.drdy){
+      data = lcdr.bits.ldata;
+      cr.bits.start = 0; // disable software trigger
+      *CR = cr;
+      //get data from register
+      atomic state = S_IDLE;
+      call Adc12bClockControl.disable();
+      signal Sam3uAdc12b.dataReady[clientID](data);
+    }
+#else
+    if(sr.bits.endrx){
+      atomic state = S_IDLE;
+      atomic cr.bits.start = 0; // enable software trigger
+      atomic *CR = cr;        
+      signal Sam3uAdc12b.dataReady[clientID](data);
+    }else{
+      call HplPdc.enablePdcRx();
+      atomic cr.bits.start = 1; // enable software trigger
+      atomic *CR = cr;        
+    }
+#endif
+  }
+  void Adc12BIrqHandler() @C() @spontaneous() {
+    call Adc12bInterruptWrapper.preamble();
+    handler();
+    call Adc12bInterruptWrapper.postamble();
+  }
+
+
+  /* Default functions */
+ default async event error_t Sam3uAdc12b.dataReady[uint8_t id](uint16_t data){
+   return SUCCESS;
+ }
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uAdc12bP.nc b/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uAdc12bP.nc
new file mode 100644
index 00000000..cd502d4d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uAdc12bP.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+ 
+configuration Sam3uAdc12bP 
+{ 
+  provides {
+    interface Resource[uint8_t id]; 
+    interface Sam3uGetAdc12b[uint8_t id]; 
+  }
+} 
+
+implementation {
+  components Sam3uAdc12bImplP as Adc12bImpl;
+  components MainC;
+  components HplNVICC, HplSam3uClockC, HplSam3uGeneralIOC;
+  //components new Resource[uint8_t id];
+  components new SimpleRoundRobinArbiterC(SAM3UADC12_RESOURCE) as Arbiter;
+
+  Adc12bImpl.ADC12BInterrupt -> HplNVICC.ADC12BInterrupt;
+
+  Adc12bImpl.Adc12bPin -> HplSam3uGeneralIOC.HplPioA2;
+  Adc12bImpl.Adc12bClockControl -> HplSam3uClockC.ADC12BPPCntl;
+  Resource = Arbiter; // set this!?!
+  Sam3uGetAdc12b = Adc12bImpl.Sam3uAdc12b;
+
+  MainC.SoftwareInit -> Adc12bImpl.Init;
+  components LedsC, NoLedsC;
+  Adc12bImpl.Leds -> NoLedsC;
+
+  components McuSleepC;
+  Adc12bImpl.Adc12bInterruptWrapper -> McuSleepC;
+
+#ifdef SAM3U_ADC12B_PDC
+  components HplSam3uPdcC;
+  Adc12bImpl.HplPdc -> HplSam3uPdcC.Adc12bPdcControl;
+#endif
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uGetAdc12b.nc b/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uGetAdc12b.nc
new file mode 100644
index 00000000..8d54d092
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/Sam3uGetAdc12b.nc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+
+interface Sam3uGetAdc12b
+{
+  async command error_t configureAdc(const sam3u_adc12_channel_config_t *config);
+  async command error_t getData();
+  async event error_t dataReady(uint16_t data);
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/WireAdcStreamP.nc b/tos/chips/cortex/m3/sam3/u/adc12b/WireAdcStreamP.nc
new file mode 100644
index 00000000..e4b9de91
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/WireAdcStreamP.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uadc12bhardware.h"
+
+configuration WireAdcStreamP {
+  provides interface ReadStream<uint16_t>[uint8_t client];
+  uses {
+    interface AdcConfigure<const sam3u_adc12_channel_config_t*>[uint8_t client];
+    interface Sam3uGetAdc12b[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+#ifndef SAM3U_ADC12B_PDC
+  components AdcStreamP;
+#else
+  components AdcStreamPDCP as AdcStreamP;
+#endif
+  components MainC, new AlarmTMicro16C() as Alarm,
+    new ArbitratedReadStreamC(uniqueCount(ADCC_READ_STREAM_SERVICE), uint16_t) as ArbitrateReadStream;
+
+  ReadStream = ArbitrateReadStream;
+  AdcConfigure = AdcStreamP;
+  Resource = ArbitrateReadStream;
+
+  ArbitrateReadStream.Service -> AdcStreamP;
+
+#ifdef SAM3U_ADC12B_PDC
+  components HplSam3uPdcC;
+  AdcStreamP.HplPdc -> HplSam3uPdcC.Adc12bPdcControl;
+#else
+  AdcStreamP.Alarm -> Alarm;
+#endif
+
+  AdcStreamP.Init <- MainC;
+  Sam3uGetAdc12b = AdcStreamP.GetAdc;
+
+  components LedsC, NoLedsC;
+  AdcStreamP.Leds -> LedsC;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/adc12b/sam3uadc12bhardware.h b/tos/chips/cortex/m3/sam3/u/adc12b/sam3uadc12bhardware.h
new file mode 100644
index 00000000..8a442f57
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/adc12b/sam3uadc12bhardware.h
@@ -0,0 +1,403 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * 12 bit ADC register definitions.
+ *
+ * @author JeongGil Ko
+ */
+
+#ifndef _SAM3UADC12BHARDWARE_H
+#define _SAM3UADC12BHARDWARE_H
+
+/**
+ *  ADC12B Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1105
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t swrst         :  1; // software reset
+    uint8_t start         :  1; // start conversion
+    uint8_t reserved0     :  6;
+    uint16_t reserved1    : 16;
+    uint8_t reserved2     :  8;
+  } __attribute__((__packed__)) bits;
+} adc12b_cr_t; 
+
+/**
+ *  ADC12B Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1106
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t trgen         :  1; // trigger enable
+    uint8_t trgsel        :  3; // trigger selection
+    uint8_t lowres        :  1; // resolution
+    uint8_t sleep         :  1; // sleep mode
+    uint8_t reserved0     :  2;
+    uint8_t prescal       :  8; // prescaler rate selection
+    uint8_t startup       :  8; // startup time
+    uint8_t shtim         :  4; // sample & hold time
+    uint8_t reserved1     :  4;
+  } __attribute__((__packed__)) bits;
+} adc12b_mr_t; 
+
+
+/**
+ *  ADC12B Channel Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1108
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t ch0           :  1;
+    uint8_t ch1           :  1;
+    uint8_t ch2           :  1;
+    uint8_t ch3           :  1;
+    uint8_t ch4           :  1;
+    uint8_t ch5           :  1;
+    uint8_t ch6           :  1;
+    uint8_t ch7           :  1;
+    uint16_t reserved0    : 16;
+    uint8_t reserved1     :  8;
+  } __attribute__((__packed__)) bits;
+} adc12b_cher_t;
+
+/**
+ *  ADC12B Channel Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1109
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t ch0           :  1;
+    uint8_t ch1           :  1;
+    uint8_t ch2           :  1;
+    uint8_t ch3           :  1;
+    uint8_t ch4           :  1;
+    uint8_t ch5           :  1;
+    uint8_t ch6           :  1;
+    uint8_t ch7           :  1;
+    uint16_t reserved0    : 16;
+    uint8_t reserved1     :  8;
+  } __attribute__((__packed__)) bits;
+} adc12b_chdr_t;
+
+/**
+ *  ADC12B Channel Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1110
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t ch0           :  1;
+    uint8_t ch1           :  1;
+    uint8_t ch2           :  1;
+    uint8_t ch3           :  1;
+    uint8_t ch4           :  1;
+    uint8_t ch5           :  1;
+    uint8_t ch6           :  1;
+    uint8_t ch7           :  1;
+    uint16_t reserved0    : 16;
+    uint8_t reserved1     :  8;
+  } __attribute__((__packed__)) bits;
+} adc12b_chsr_t;
+
+/**
+ *  ADC12B Analog Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1111
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t gain          :  2; // input gain
+    uint8_t reserved0     :  6;
+    uint8_t ibctl         :  2; // bias current control
+    uint8_t reserved1     :  6;
+    uint8_t diff          :  1; // differential mode
+    uint8_t offset        :  1; // input offset
+    uint8_t reserved2     :  6;
+    uint8_t reserved3     :  8;
+  } __attribute__((__packed__)) bits;
+} adc12b_acr_t;
+
+/**
+ *  ADC12B Extended Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1112
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t offmodes               :  1; // input gain
+    uint8_t reserved0              :  7;
+    uint8_t reserved1              :  8;
+    uint8_t off_mode_startup_time  :  8; // startup time
+    uint8_t reserved2              :  8;
+  } __attribute__((__packed__)) bits;
+} adc12b_emr_t;
+
+/**
+ *  ADC12B Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1113
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t eoc0                   :  1; // end of conversion <channel no.>
+    uint8_t eoc1                   :  1; // end of conversion <channel no.>
+    uint8_t eoc2                   :  1; // end of conversion <channel no.>
+    uint8_t eoc3                   :  1; // end of conversion <channel no.>
+    uint8_t eoc4                   :  1; // end of conversion <channel no.>
+    uint8_t eoc5                   :  1; // end of conversion <channel no.>
+    uint8_t eoc6                   :  1; // end of conversion <channel no.>
+    uint8_t eoc7                   :  1; // end of conversion <channel no.>
+    uint8_t ovre0                  :  1; // overrun error <channel no.>
+    uint8_t ovre1                  :  1; // overrun error <channel no.>
+    uint8_t ovre2                  :  1; // overrun error <channel no.>
+    uint8_t ovre3                  :  1; // overrun error <channel no.>
+    uint8_t ovre4                  :  1; // overrun error <channel no.>
+    uint8_t ovre5                  :  1; // overrun error <channel no.>
+    uint8_t ovre6                  :  1; // overrun error <channel no.>
+    uint8_t ovre7                  :  1; // overrun error <channel no.>
+    uint8_t drdy                   :  1; // data ready
+    uint8_t govre                  :  1; // general overrun error
+    uint8_t endrx                  :  1; // end of rx buffer
+    uint8_t rxbuff                 :  1; // rx buffer full
+    uint8_t reserved0              :  4;
+    uint8_t reserved1              :  8;
+  } __attribute__((__packed__)) bits;
+} adc12b_sr_t;
+
+/**
+ *  ADC12B Last Converted Data Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1114
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t ldata                 : 12; // last data converted 
+    uint16_t reserved0             :  4;
+    uint16_t reserved1             : 16;
+  } __attribute__((__packed__)) bits;
+} adc12b_lcdr_t;
+
+/**
+ *  ADC12B Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1115
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t eoc0                   :  1; // end of conversion interrupt enable <channel no.>
+    uint8_t eoc1                   :  1; // end of conversion interrupt enable <channel no.>
+    uint8_t eoc2                   :  1; // end of conversion interrupt enable <channel no.>
+    uint8_t eoc3                   :  1; // end of conversion interrupt enable <channel no.>
+    uint8_t eoc4                   :  1; // end of conversion interrupt enable <channel no.>
+    uint8_t eoc5                   :  1; // end of conversion interrupt enable <channel no.>
+    uint8_t eoc6                   :  1; // end of conversion interrupt enable <channel no.>
+    uint8_t eoc7                   :  1; // end of conversion interrupt enable <channel no.>
+    uint8_t ovre0                  :  1; // overrun error interrupt enable <channel no.>
+    uint8_t ovre1                  :  1; // overrun error interrupt enable <channel no.>
+    uint8_t ovre2                  :  1; // overrun error interrupt enable <channel no.>
+    uint8_t ovre3                  :  1; // overrun error interrupt enable <channel no.>
+    uint8_t ovre4                  :  1; // overrun error interrupt enable <channel no.>
+    uint8_t ovre5                  :  1; // overrun error interrupt enable <channel no.>
+    uint8_t ovre6                  :  1; // overrun error interrupt enable <channel no.>
+    uint8_t ovre7                  :  1; // overrun error interrupt enable <channel no.>
+    uint8_t drdy                   :  1; // data ready interrupt enable
+    uint8_t govre                  :  1; // general overrun error interrupt enable
+    uint8_t endrx                  :  1; // end of rx buffer interrupt enable
+    uint8_t rxbuff                 :  1; // rx buffer full interrupt enable
+    uint8_t reserved0              :  4;
+    uint8_t reserved1              :  8;
+  } __attribute__((__packed__)) bits;
+} adc12b_ier_t;
+
+/**
+ *  ADC12B Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1116
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t eoc0                   :  1; // end of conversion interrupt disable <channel no.>
+    uint8_t eoc1                   :  1; // end of conversion interrupt disable <channel no.>
+    uint8_t eoc2                   :  1; // end of conversion interrupt disable <channel no.>
+    uint8_t eoc3                   :  1; // end of conversion interrupt disable <channel no.>
+    uint8_t eoc4                   :  1; // end of conversion interrupt disable <channel no.>
+    uint8_t eoc5                   :  1; // end of conversion interrupt disable <channel no.>
+    uint8_t eoc6                   :  1; // end of conversion interrupt disable <channel no.>
+    uint8_t eoc7                   :  1; // end of conversion interrupt disable <channel no.>
+    uint8_t ovre0                  :  1; // overrun error interrupt disable <channel no.>
+    uint8_t ovre1                  :  1; // overrun error interrupt disable <channel no.>
+    uint8_t ovre2                  :  1; // overrun error interrupt disable <channel no.>
+    uint8_t ovre3                  :  1; // overrun error interrupt disable <channel no.>
+    uint8_t ovre4                  :  1; // overrun error interrupt disable <channel no.>
+    uint8_t ovre5                  :  1; // overrun error interrupt disable <channel no.>
+    uint8_t ovre6                  :  1; // overrun error interrupt disable <channel no.>
+    uint8_t ovre7                  :  1; // overrun error interrupt disable <channel no.>
+    uint8_t drdy                   :  1; // data ready interrupt disable
+    uint8_t govre                  :  1; // general overrun error interrupt disable
+    uint8_t endrx                  :  1; // end of rx buffer interrupt disable
+    uint8_t rxbuff                 :  1; // rx buffer full interrupt disable
+    uint8_t reserved0              :  4;
+    uint8_t reserved1              :  8;
+  } __attribute__((__packed__)) bits;
+} adc12b_idr_t;
+
+/**
+ *  ADC12B Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1113
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t eoc0                   :  1; // end of conversion interrupt mask <channel no.>
+    uint8_t eoc1                   :  1; // end of conversion interrupt mask <channel no.>
+    uint8_t eoc2                   :  1; // end of conversion interrupt mask <channel no.>
+    uint8_t eoc3                   :  1; // end of conversion interrupt mask <channel no.>
+    uint8_t eoc4                   :  1; // end of conversion interrupt mask <channel no.>
+    uint8_t eoc5                   :  1; // end of conversion interrupt mask <channel no.>
+    uint8_t eoc6                   :  1; // end of conversion interrupt mask <channel no.>
+    uint8_t eoc7                   :  1; // end of conversion interrupt mask <channel no.>
+    uint8_t ovre0                  :  1; // overrun error interrupt mask <channel no.>
+    uint8_t ovre1                  :  1; // overrun error interrupt mask <channel no.>
+    uint8_t ovre2                  :  1; // overrun error interrupt mask <channel no.>
+    uint8_t ovre3                  :  1; // overrun error interrupt mask <channel no.>
+    uint8_t ovre4                  :  1; // overrun error interrupt mask <channel no.>
+    uint8_t ovre5                  :  1; // overrun error interrupt mask <channel no.>
+    uint8_t ovre6                  :  1; // overrun error interrupt mask <channel no.>
+    uint8_t ovre7                  :  1; // overrun error interrupt mask <channel no.>
+    uint8_t drdy                   :  1; // data ready interrupt mask
+    uint8_t govre                  :  1; // general overrun error interrupt mask
+    uint8_t endrx                  :  1; // end of rx buffer interrupt mask
+    uint8_t rxbuff                 :  1; // rx buffer full interrupt mask
+    uint8_t reserved0              :  4;
+    uint8_t reserved1              :  8;
+  } __attribute__((__packed__)) bits;
+} adc12b_imr_t;
+
+/**
+ *  ADC12B Channel Data Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1114
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t data                  : 12; // converted data 
+    uint16_t reserved0             :  4;
+    uint16_t reserved1             : 16;
+  } __attribute__((__packed__)) bits;
+} adc12b_cdr_t;
+
+/**
+ * ADC12B Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary, p. 1104
+ */
+typedef struct adc12b
+{
+  volatile adc12b_cr_t cr; // Control Register
+  volatile adc12b_mr_t mr; // Mode Register
+  uint32_t reserved0[2];
+  volatile adc12b_cher_t cher; // Channel Enable Register
+  volatile adc12b_chdr_t chdr; // Channel Disable Register
+  volatile adc12b_chsr_t chsr; // Channel Status Register
+  volatile adc12b_sr_t sr; // Status Register
+  volatile adc12b_lcdr_t lcdr; // Last Converted Data Register
+  volatile adc12b_ier_t ier; // Interrupt Enable Register
+  volatile adc12b_idr_t idr; // Interrupt Disable Register
+  volatile adc12b_imr_t imr; // Interrupt Mask Register
+  volatile adc12b_cdr_t cdr0; // Channal Data Register <channel no.>
+  volatile adc12b_cdr_t cdr1; // Channal Data Register <channel no.>
+  volatile adc12b_cdr_t cdr2; // Channal Data Register <channel no.>
+  volatile adc12b_cdr_t cdr3; // Channal Data Register <channel no.>
+  volatile adc12b_cdr_t cdr4; // Channal Data Register <channel no.>
+  volatile adc12b_cdr_t cdr5; // Channal Data Register <channel no.>
+  volatile adc12b_cdr_t cdr6; // Channal Data Register <channel no.>
+  volatile adc12b_cdr_t cdr7; // Channal Data Register <channel no.>
+  uint32_t reserved1[5];
+  volatile adc12b_acr_t acr; // Analog Control Register
+  volatile adc12b_emr_t emr; // Extended Mode Register
+} adc12b_t;
+
+/**
+ * Memory mapping for the ADC12B
+ */
+volatile adc12b_t* ADC12B = (volatile adc12b_t *) 0x400A8000; // ADC12B Base Address
+
+#define SAM3UADC12_RESOURCE "Sam3uAdc12bC.Resource"
+#define ADCC_SERVICE "AdcC.Service"
+#define ADCC_READ_STREAM_SERVICE "AdcC.ReadStream.Client"
+
+typedef struct { 
+  unsigned int channel: 3;
+  unsigned int diff: 1;
+  unsigned int prescal: 8;
+  unsigned int lowres: 1;
+  unsigned int shtim: 4;
+  unsigned int ibctl: 2;
+  unsigned int sleep: 1;
+  unsigned int startup: 8;
+  unsigned int trgen: 1;
+  unsigned int trgsel: 1;
+  unsigned int : 0;
+} sam3u_adc12_channel_config_t;
+
+
+#endif // _SAM3UADC12BHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaC.nc b/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaC.nc
new file mode 100644
index 00000000..3e8f8b34
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaC.nc
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+configuration HplSam3uDmaC {
+  provides interface HplSam3uDmaControl as Control;
+  provides interface HplSam3uDmaChannel as Channel0;
+  provides interface HplSam3uDmaChannel as Channel1;
+  provides interface HplSam3uDmaChannel as Channel2;
+  provides interface HplSam3uDmaChannel as Channel3;
+  provides interface HplSam3uDmaInterrupt as Interrupt;
+}
+
+implementation {
+
+  components HplSam3uDmaP;
+  components new HplSam3uDmaXP(0) as Dma0;
+  components new HplSam3uDmaXP(1) as Dma1;
+  components new HplSam3uDmaXP(2) as Dma2;
+  components new HplSam3uDmaXP(3) as Dma3;
+  components HplNVICC;
+  components HplSam3uClockC;
+  components LedsC;
+
+  Control = HplSam3uDmaP;
+  Channel0 = Dma0;
+  Channel1 = Dma1;
+  Channel2 = Dma2;
+  Channel3 = Dma3;
+  Interrupt = HplSam3uDmaP;
+
+  Dma0.Interrupt -> HplSam3uDmaP;
+  Dma1.Interrupt -> HplSam3uDmaP;
+  Dma2.Interrupt -> HplSam3uDmaP;
+  Dma3.Interrupt -> HplSam3uDmaP;
+  Dma0.Leds -> LedsC;
+  Dma1.Leds -> LedsC;
+  Dma2.Leds -> LedsC;
+  Dma3.Leds -> LedsC;
+
+  HplSam3uDmaP.HDMAInterrupt -> HplNVICC.HDMAInterrupt;
+  HplSam3uDmaP.HDMAClockControl -> HplSam3uClockC.HDMAPPCntl;
+  HplSam3uDmaP.Leds -> LedsC;
+
+  components McuSleepC;
+  HplSam3uDmaP.DmacInterruptWrapper -> McuSleepC;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaChannel.nc b/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaChannel.nc
new file mode 100644
index 00000000..45551139
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaChannel.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uDmahardware.h"
+
+interface HplSam3uDmaChannel {
+
+  async command error_t setSrcAddr(void* src_addr);
+  async command error_t setDstAddr(void* dst_addr);
+
+  async command error_t setCtrlA(uint16_t btsize, dmac_chunk_t scsize, dmac_chunk_t dcsize, dmac_width_t src_width, dmac_width_t dst_width);
+
+  async command uint32_t setBtsize(uint16_t btsize);
+  async command error_t setCtrlB(dmac_dscr_t src_dscr, dmac_dscr_t dst_dscr, dmac_fc_t fc, dmac_inc_t src_inc, dmac_inc_t dst_inc);
+
+  async command error_t setCfg(uint8_t src_per, uint8_t dst_per, bool srcSwHandshake,
+			 bool dstSwHandshake, bool stopOnDone, bool lockIF,
+			 bool lockB, dmac_IFL_t lockIFL, dmac_ahbprot_t ahbprot,
+			 dmac_fifocfg_t fifocfg);
+  async command void enable();
+  async command void disable();
+  async command void enableChannel(uint8_t channel);
+  async command void disableChannel(uint8_t channel);
+  async command void enableChannelInterrupt(uint8_t channel);
+  async command void disableChannelInterrupt(uint8_t channel);
+  async command void enableTransferRequest(uint8_t channel, bool s2d);
+  async command bool getChannelStatus(uint8_t channel);
+  async command void suspendChannel(uint8_t channel);
+
+  async event void transferDone(error_t success);
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaControl.nc b/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaControl.nc
new file mode 100644
index 00000000..1522420f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaControl.nc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uDmahardware.h"
+
+interface HplSam3uDmaControl {
+  async command error_t init();
+  async command error_t setRoundRobin();
+  async command error_t setFixedPriority();
+  async command void reset();
+}
diff --git a/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaInterrupt.nc b/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaInterrupt.nc
new file mode 100644
index 00000000..1015b84a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaInterrupt.nc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+interface HplSam3uDmaInterrupt {
+  async event void fired();
+}
diff --git a/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaP.nc b/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaP.nc
new file mode 100644
index 00000000..7720c6c2
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaP.nc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uDmahardware.h"
+
+module HplSam3uDmaP {
+
+  provides interface HplSam3uDmaControl as DmaControl;
+  provides interface HplSam3uDmaInterrupt as Interrupt;
+  uses interface HplNVICInterruptCntl as HDMAInterrupt;
+  uses interface HplSam3uPeripheralClockCntl as HDMAClockControl;
+  uses interface FunctionWrapper as DmacInterruptWrapper;
+  uses interface Leds;
+}
+
+implementation {
+
+  async command error_t DmaControl.init(){
+    call HDMAInterrupt.disable();
+    call HDMAInterrupt.configure(IRQ_PRIO_DMAC);
+    call HDMAInterrupt.enable();
+    call HDMAClockControl.enable();
+    return SUCCESS;
+  }
+
+  async command error_t DmaControl.setRoundRobin(){
+    volatile dmac_gcfg_t *GCFG = (volatile dmac_gcfg_t *) 0x400B0000;
+    dmac_gcfg_t gcfg = *GCFG;
+    gcfg.bits.arb_cfg = 1;
+    *GCFG = gcfg;
+    return SUCCESS;
+  }
+
+  async command error_t DmaControl.setFixedPriority(){
+    volatile dmac_gcfg_t *GCFG = (volatile dmac_gcfg_t *) 0x400B0000;
+    dmac_gcfg_t gcfg = *GCFG;
+    gcfg.bits.arb_cfg = 0;
+    *GCFG = gcfg;
+    return SUCCESS;
+  }
+
+  async command void DmaControl.reset(){
+    
+  }
+
+  void DmacIrqHandler() @C() @spontaneous() {
+    call DmacInterruptWrapper.preamble();
+    signal Interrupt.fired();
+    call DmacInterruptWrapper.postamble();
+  }
+}
diff --git a/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaXP.nc b/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaXP.nc
new file mode 100644
index 00000000..179dd28e
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/HplSam3uDmaXP.nc
@@ -0,0 +1,339 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+
+#include "sam3uDmahardware.h"
+
+generic module HplSam3uDmaXP(uint8_t DMACHANNEL) {
+
+  provides interface HplSam3uDmaChannel as Dma;
+  uses interface HplSam3uDmaInterrupt as Interrupt;
+  uses interface Leds;
+}
+
+implementation {
+
+  uint32_t CHANNEL_OFFSET = 0x3C + (DMACHANNEL * 0x28);
+
+  async event void Interrupt.fired(){
+    // Disable channel and send signal up
+    call Dma.disableChannel(DMACHANNEL);
+    call Dma.disableChannelInterrupt(DMACHANNEL);
+    call Dma.disable();
+    signal Dma.transferDone(SUCCESS);
+  }
+
+  async command error_t Dma.setSrcAddr(void* src_addr){
+    volatile dmac_saddrx_t *SADDRX = (volatile dmac_saddrx_t *)(0x400B0000 + CHANNEL_OFFSET);
+    dmac_saddrx_t saddrxx;
+    saddrxx.bits.saddrx = (uint32_t) src_addr;
+    *SADDRX = saddrxx;
+    return SUCCESS;
+  }
+
+  async command error_t Dma.setDstAddr(void* dst_addr){
+    volatile dmac_daddrx_t *DADDRX = (volatile dmac_daddrx_t *)(0x400B0004 + CHANNEL_OFFSET);
+    dmac_daddrx_t daddrxx;
+    daddrxx.bits.daddrx = (uint32_t) dst_addr;
+    *DADDRX = daddrxx;
+    return SUCCESS;
+  }
+
+  async command error_t Dma.setCtrlA(uint16_t btsize, dmac_chunk_t scsize, dmac_chunk_t dcsize, dmac_width_t src_width, dmac_width_t dst_width){
+    volatile dmac_ctrlax_t *CTRLAX = (volatile dmac_ctrlax_t *)(0x400B000C + CHANNEL_OFFSET);
+    dmac_ctrlax_t ctrlax = *CTRLAX;
+    ctrlax.bits.btsize = btsize;
+    ctrlax.bits.scsize = scsize;
+    ctrlax.bits.dcsize = dcsize;
+    ctrlax.bits.src_width = src_width;
+    ctrlax.bits.dst_width = dst_width;
+    *CTRLAX = ctrlax;
+    return SUCCESS;
+  }
+
+  async command error_t Dma.setCtrlB(dmac_dscr_t src_dscr, dmac_dscr_t dst_dscr, dmac_fc_t fc, dmac_inc_t src_inc, dmac_inc_t dst_inc){
+    volatile dmac_ctrlbx_t *CTRLBX = (volatile dmac_ctrlbx_t *)(0x400B0010 + CHANNEL_OFFSET);
+    dmac_ctrlbx_t ctrlbx = *CTRLBX;
+    ctrlbx.bits.src_dscr = src_dscr;
+    ctrlbx.bits.dst_dscr = dst_dscr;
+    ctrlbx.bits.fc = fc;
+    ctrlbx.bits.src_incr = src_inc;
+    ctrlbx.bits.dst_incr = dst_inc;
+    *CTRLBX = ctrlbx;
+    return SUCCESS;
+  }
+
+  async command uint32_t Dma.setBtsize(uint16_t btsize){
+    volatile dmac_ctrlax_t *CTRLAX = (volatile dmac_ctrlax_t *)(0x400B000C + CHANNEL_OFFSET);
+    dmac_ctrlax_t ctrlax = *CTRLAX;
+    ctrlax.bits.btsize = btsize;
+    *CTRLAX = ctrlax;
+    return (0x400B000C + CHANNEL_OFFSET);
+  }
+
+  async command error_t Dma.setCfg(uint8_t src_per, uint8_t dst_per, bool srcSwHandshake,
+		  bool dstSwHandshake, bool stopOnDone, bool lockIF,
+		  bool lockB, dmac_IFL_t lockIFL, dmac_ahbprot_t ahbprot,
+		  dmac_fifocfg_t fifocfg){
+    volatile dmac_cfgx_t *CFGX = (volatile dmac_cfgx_t *)(0x400B0014 + CHANNEL_OFFSET);
+    dmac_cfgx_t cfgx = *CFGX;
+    cfgx.bits.src_per = src_per;
+    cfgx.bits.dst_per = dst_per;
+    cfgx.bits.src_h2sel = !srcSwHandshake;
+    cfgx.bits.dst_h2sel = !dstSwHandshake;
+    cfgx.bits.sod = stopOnDone;
+    cfgx.bits.lock_if = lockIF;
+    cfgx.bits.lock_b = lockB;
+    cfgx.bits.lock_if_l = lockIFL;
+    cfgx.bits.ahb_prot = ahbprot;
+    cfgx.bits.fifocfg = fifocfg;
+    *CFGX = cfgx;
+    return SUCCESS;
+  }
+
+  async command void Dma.enable(){
+    volatile dmac_en_t *EN = (volatile dmac_en_t *) 0x400B0004;
+    dmac_en_t en = *EN;
+    en.bits.enable = 1;
+    *EN = en;
+  }
+
+  async command void Dma.disable(){
+    volatile dmac_en_t *EN = (volatile dmac_en_t *) 0x400B0004;
+    dmac_en_t en = *EN;
+    en.bits.enable = 0;
+    *EN = en;
+  }
+
+  async command void Dma.enableChannel(uint8_t channel){
+    volatile dmac_cher_t *CHER = (volatile dmac_cher_t *) 0x400B0028;
+    dmac_cher_t cher;
+
+    switch(DMACHANNEL){
+    case 0:
+      cher.bits.ena0 = 1;
+      break;
+    case 1:
+      cher.bits.ena1 = 1;
+      break;
+    case 2:
+      cher.bits.ena2 = 1;
+      break;
+    case 3:
+      cher.bits.ena3 = 1;
+      break;
+    default:
+      cher.bits.ena0 = 1;
+      break;
+    }
+    *CHER = cher;
+  }
+
+  async command void Dma.disableChannel(uint8_t channel){
+    volatile dmac_chdr_t *CHDR = (volatile dmac_chdr_t *) 0x400B002C;
+    dmac_chdr_t chdr;
+
+    switch(DMACHANNEL){
+    case 0:
+      chdr.bits.dis0 = 1;
+      break;
+    case 1:
+      chdr.bits.dis1 = 1;
+      break;
+    case 2:
+      chdr.bits.dis2 = 1;
+      break;
+    case 3:
+      chdr.bits.dis3 = 1;
+      break;
+    default:
+      chdr.bits.dis0 = 1;
+      break;
+    }
+    *CHDR = chdr;
+  }
+
+
+  async command void Dma.enableTransferRequest(uint8_t channel, bool s2d){
+    volatile dmac_sreq_t *SREQ = (volatile dmac_sreq_t *) 0x400B0008;
+    dmac_sreq_t sreq = *SREQ;
+    volatile dmac_last_t *LAST = (volatile dmac_last_t *) 0x400B0010;
+    dmac_last_t last = *LAST;
+    volatile dmac_creq_t *CREQ = (volatile dmac_creq_t *) 0x400B000C;
+    dmac_creq_t creq = *CREQ;
+
+    switch(DMACHANNEL){
+    case 0:
+      if(s2d){
+	last.bits.slast0 = 1;
+	sreq.bits.ssreq0 = 1;
+      }else{
+	last.bits.dlast0 = 1;
+	sreq.bits.dsreq0 = 1;
+      }
+      break;
+    case 1:
+      if(s2d){
+	sreq.bits.ssreq1 = 1;
+	last.bits.slast1 = 1;
+      }else{
+	sreq.bits.dsreq1 = 1;
+	last.bits.dlast1 = 1;
+      }
+      break;
+    case 2:
+      if(s2d){
+	sreq.bits.ssreq2dash = 1;
+	last.bits.slast2 = 1;
+      }else{
+	sreq.bits.dsreq2dash = 1;
+	last.bits.dlast2 = 1;
+      }
+      break;
+    case 3:
+      if(s2d){
+	sreq.bits.ssreq3 = 1;
+	last.bits.slast3 = 1;
+      }else{
+	sreq.bits.dsreq3 = 1;
+	last.bits.slast3 = 1;
+      }
+      break;
+    default:
+      if(s2d){
+	sreq.bits.ssreq0 = 1;
+	last.bits.slast0 = 1;
+      }else{
+	sreq.bits.dsreq0 = 1;
+	last.bits.dlast0 = 1;
+      }
+      break;
+    }
+    *LAST = last;
+    *CREQ = creq;
+    *SREQ = sreq;
+  }
+
+
+  async command void Dma.enableChannelInterrupt(uint8_t channel){
+    volatile dmac_ebcier_t *EBCIER = (volatile dmac_ebcier_t *) 0x400B0018;
+    dmac_ebcier_t ebcier;// = *EBCIER;
+    switch(DMACHANNEL){
+    case 0:    
+      ebcier.bits.btc0 = 1;
+      //ebcier.bits.err0 = 1;
+      break;
+    case 1:    
+      ebcier.bits.btc1 = 1;
+      //ebcier.bits.err1 = 1;
+      break;
+    case 2:    
+      ebcier.bits.btc2 = 1;
+      //ebcier.bits.err2 = 1;
+      break;
+    case 3:    
+      ebcier.bits.btc3 = 1;
+      //ebcier.bits.err3 = 1;
+      break;
+    }
+    *EBCIER = ebcier;
+  }
+
+
+  async command void Dma.disableChannelInterrupt(uint8_t channel){
+    volatile dmac_ebcidr_t *EBCIDR = (volatile dmac_ebcidr_t *) 0x400B001C;
+    dmac_ebcidr_t ebcidr;// = *EBCIER;
+    switch(DMACHANNEL){
+    case 0:
+      ebcidr.bits.btc0 = 1;
+      //ebcier.bits.err0 = 1;
+      break;
+    case 1:
+      ebcidr.bits.btc1 = 1;
+      //ebcier.bits.err1 = 1;
+      break;
+    case 2:
+      ebcidr.bits.btc2 = 1;
+      //ebcier.bits.err2 = 1;
+      break;
+    case 3:
+      ebcidr.bits.btc3 = 1;
+      //ebcier.bits.err3 = 1;
+      break;
+    }
+    *EBCIDR = ebcidr;
+  }
+
+  async command bool Dma.getChannelStatus(uint8_t channel){
+    volatile dmac_chsr_t *CHSR = (volatile dmac_chsr_t *) 0x400B0030;
+
+    switch(DMACHANNEL){
+    case 0:
+      return CHSR->bits.ena0;
+    case 1:
+      return CHSR->bits.ena1;
+    case 2:
+      return CHSR->bits.ena2;
+    case 3:
+      return CHSR->bits.ena3;
+    default:
+      return CHSR->bits.ena0;
+    }
+  }
+
+  async command void Dma.suspendChannel(uint8_t channel){
+    volatile dmac_cher_t *CHER = (volatile dmac_cher_t *) 0x400B0028;
+    dmac_cher_t cher;
+
+    switch(DMACHANNEL){
+    case 0:
+      cher.bits.susp0 = 1;
+      break;
+    case 1:
+      cher.bits.susp1 = 1;
+      break;
+    case 2:
+      cher.bits.susp2 = 1;
+      break;
+    case 3:
+      cher.bits.susp3 = 1;
+      break;
+    default:
+      cher.bits.susp0 = 1;
+      break;
+    }
+    *CHER = cher;
+  }
+}
diff --git a/tos/chips/cortex/m3/sam3/u/dma/README b/tos/chips/cortex/m3/sam3/u/dma/README
new file mode 100644
index 00000000..c7b91c88
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/README
@@ -0,0 +1,6 @@
+DMA Controller Implementation for SAM3U
+
+@author JeongGil Ko <jgko@cs.jhu.edu>
+
+The implementations are based on the preliminary specifications.
+
diff --git a/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaC.nc b/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaC.nc
new file mode 100644
index 00000000..b0b83367
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaC.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+configuration Sam3uDmaC {
+  provides interface Sam3uDmaControl as Control;
+  provides interface Sam3uDmaChannel as Channel0;
+  provides interface Sam3uDmaChannel as Channel1;
+  provides interface Sam3uDmaChannel as Channel2;
+  provides interface Sam3uDmaChannel as Channel3;
+}
+
+implementation {
+  components new Sam3uDmaChannelP() as Channel0P;
+  components new Sam3uDmaChannelP() as Channel1P;
+  components new Sam3uDmaChannelP() as Channel2P;
+  components new Sam3uDmaChannelP() as Channel3P;
+  components Sam3uDmaControlP as ControlP;
+  components HplSam3uDmaC as DmaC;
+
+  Control = ControlP;
+  Channel0 = Channel0P;
+  Channel1 = Channel1P;
+  Channel2 = Channel2P;
+  Channel3 = Channel3P;
+
+  ControlP.DmaControl -> DmaC;
+  //ControlP.DmaChannel0 -> DmaC.Channel0;
+  //ControlP.DmaChannel1 -> DmaC.Channel1;
+  //ControlP.DmaChannel2 -> DmaC.Channel2;
+  //ControlP.DmaChannel3 -> DmaC.Channel3;
+
+  Channel0P.DmaChannel -> DmaC.Channel0;
+  Channel1P.DmaChannel -> DmaC.Channel1;
+  Channel2P.DmaChannel -> DmaC.Channel2;
+  Channel3P.DmaChannel -> DmaC.Channel3;
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaChannel.nc b/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaChannel.nc
new file mode 100644
index 00000000..66af10ac
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaChannel.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uDmahardware.h"
+
+interface Sam3uDmaChannel {
+
+  async command error_t setupTransfer( uint8_t channel,
+				       void *src_addr, /* Source Address */
+				       void *dst_addr, /* Destination Address */
+				       uint16_t btsize, /* Size of buffer transfer */
+				       dmac_chunk_t scsize, /* Source chunk transfer size -- details in header file */
+				       dmac_chunk_t dcsize, /* Destination chunk transfer size -- details in header file */
+				       dmac_width_t src_width, /* details in header file */
+				       dmac_width_t dst_width, /* details in header file */
+				       dmac_dscr_t src_dscr, /* Source address descripter method */
+				       dmac_dscr_t dst_dscr, /* Destination address descripter method */
+				       dmac_fc_t fc, /* Flow Controller -- deatils in header file */
+				       dmac_inc_t src_inc, /* Source addressing mode */
+				       dmac_inc_t dst_inc, /* Source addressing mode */ 
+				       uint8_t src_per, /* Handshake peripheral, for HW handshakes -- 4 bits */
+				       uint8_t dst_per, /* Handshake peripheral, for HW handshakes -- 4 bits */
+				       bool srcSwHandshake, /* select sw handshake for source */
+				       bool dstSwHandshake, /* select sw handshake for destination */
+				       bool stopOnDone, /* DMAC disable upon done signal */
+				       bool lockIF, /* Interface lock capability */
+				       bool lockB, /* AHB Bus lock capability */
+				       dmac_IFL_t lockIFL, /* Master interface locked by channel for chunk/buffer trasfer -- details in header file */
+				       dmac_ahbprot_t ahbprot, /* Additional info on bus access -- deatils in header file */
+				       dmac_fifocfg_t fifocfg /* Configure FIFO -- Details in header file */ 
+				       );
+
+  async command error_t startTransfer(uint8_t channel); /* set enable bit */
+
+  async command error_t repeatTransfer( void *src_addr, void *dst_addr, 
+					uint16_t size, uint8_t channel); /* repeat trasfer with the previous settings */
+
+  async command error_t swTransferRequest(uint8_t channel, bool s2d); /* set source or destination tranfer request for channel */
+
+  async command error_t stopTransfer(uint8_t channel); /* Perform all fuctions needed to disable/stop transfer*/
+
+  async command error_t resetAll(uint8_t channel);
+
+  async event void transferDone(error_t success);
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaChannelP.nc b/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaChannelP.nc
new file mode 100644
index 00000000..fd02ad62
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaChannelP.nc
@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uDmahardware.h"
+
+generic module Sam3uDmaChannelP() {
+  provides interface Sam3uDmaChannel as Channel;
+  uses interface HplSam3uDmaChannel as DmaChannel;
+}
+
+implementation {
+
+  async command error_t Channel.setupTransfer( uint8_t channel,
+					       void *src_addr,
+					       void *dst_addr,
+					       uint16_t btsize,
+					       dmac_chunk_t scsize,
+					       dmac_chunk_t dcsize,
+					       dmac_width_t src_width,
+					       dmac_width_t dst_width,
+					       dmac_dscr_t src_dscr,
+					       dmac_dscr_t dst_dscr,
+					       dmac_fc_t fc,
+					       dmac_inc_t src_inc,
+					       dmac_inc_t dst_inc,
+					       uint8_t src_per,
+					       uint8_t dst_per,
+					       bool srcSwHandshake,
+					       bool dstSwHandshake,
+					       bool stopOnDone,
+					       bool lockIF,
+					       bool lockB,
+					       dmac_IFL_t lockIFL,
+					       dmac_ahbprot_t ahbprot,
+					       dmac_fifocfg_t fifocfg)
+  {
+    call DmaChannel.enable();
+    call DmaChannel.disableChannelInterrupt(channel);
+    call DmaChannel.setSrcAddr(src_addr);
+    call DmaChannel.setDstAddr(dst_addr);
+    call DmaChannel.setCtrlA(btsize, scsize, dcsize, src_width, dst_width);
+    call DmaChannel.setCtrlB(src_dscr, dst_dscr, fc, src_inc, dst_inc);
+    call DmaChannel.setCfg(src_per, dst_per, srcSwHandshake,
+			   dstSwHandshake, stopOnDone, lockIF,
+			   lockB, lockIFL, ahbprot,
+			   fifocfg);
+    return SUCCESS;
+  }
+
+  async command error_t Channel.startTransfer(uint8_t channel)
+  {
+    call DmaChannel.enable();
+    call DmaChannel.enableChannelInterrupt(channel);
+    call DmaChannel.enableChannel(channel);
+    return SUCCESS;
+  }
+
+  async command error_t Channel.repeatTransfer( void *src_addr, void *dst_addr, uint16_t size, uint8_t channel)
+  {
+    call DmaChannel.setBtsize(size);
+    call DmaChannel.enable();
+    call DmaChannel.enableChannelInterrupt(channel);
+    call DmaChannel.enableChannel(channel);
+    return SUCCESS;
+  }
+
+  async command error_t Channel.swTransferRequest(uint8_t channel, bool s2d)
+  {
+    // Only used for peripheral transmissions and not for memory-memory transfers
+    call DmaChannel.enableTransferRequest(channel, s2d);
+    return SUCCESS;
+  }
+
+  async command error_t Channel.stopTransfer(uint8_t channel)
+  {
+    if(call DmaChannel.getChannelStatus(channel)){
+      call DmaChannel.suspendChannel(channel);
+    }
+    call DmaChannel.disableChannel(channel);
+  }
+
+  async command error_t Channel.resetAll(uint8_t channel)
+  {
+    call DmaChannel.enable();
+    call DmaChannel.disableChannelInterrupt(channel);
+    call DmaChannel.setSrcAddr(0);
+    call DmaChannel.setDstAddr(0);
+    call DmaChannel.setCtrlA(0, 0, 0, 0, 0);
+    call DmaChannel.setCtrlB(0, 0, 0, 0, 0);
+    call DmaChannel.setCfg(0, 0, 0, 0, 0,
+			   0, 0, 0, 1, 0);
+    call DmaChannel.disable();
+    return SUCCESS;
+  }
+
+  async event void DmaChannel.transferDone(error_t success){
+    signal Channel.transferDone(success);
+  }
+
+  default async event void Channel.transferDone(error_t success){
+  }
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaControl.nc b/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaControl.nc
new file mode 100644
index 00000000..2724d5c9
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaControl.nc
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3uDmahardware.h"
+
+interface Sam3uDmaControl {
+  async command error_t init();
+  async command error_t setArbitor(bool roundRobin); // True is round robin ; False if fixed priority arbitor
+}
diff --git a/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaControlP.nc b/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaControlP.nc
new file mode 100644
index 00000000..bc427a49
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/Sam3uDmaControlP.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+module Sam3uDmaControlP {
+
+  provides interface Sam3uDmaControl as Control;
+  uses interface HplSam3uDmaControl as DmaControl;
+  //uses interface HplSam3uDmaChannel as DmaChannel0;
+  //uses interface HplSam3uDmaChannel as DmaChannel1;
+  //uses interface HplSam3uDmaChannel as DmaChannel2;
+  //uses interface HplSam3uDmaChannel as DmaChannel3;
+  //uses interface HplSam3uDmaInterrupt as Interrupt;
+}
+
+implementation {
+
+  async command error_t Control.init(){
+    call DmaControl.init();
+    return SUCCESS;
+  }
+
+  async command error_t Control.setArbitor(bool roundRobin){
+    if(roundRobin){
+      return call DmaControl.setRoundRobin();
+    }else{
+      return call DmaControl.setFixedPriority();
+    }
+  }
+  /*
+  async event void DmaChannel0.transferDone(error_t err){}
+  async event void DmaChannel1.transferDone(error_t err){}
+  async event void DmaChannel2.transferDone(error_t err){}
+  async event void DmaChannel3.transferDone(error_t err){}
+  */
+}
diff --git a/tos/chips/cortex/m3/sam3/u/dma/sam3uDmahardware.h b/tos/chips/cortex/m3/sam3/u/dma/sam3uDmahardware.h
new file mode 100644
index 00000000..1ff06d4d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/dma/sam3uDmahardware.h
@@ -0,0 +1,580 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * 4 Channel DMA Controller register definitions.
+ *
+ * @author JeongGil Ko
+ */
+
+#ifndef _SAM3UDMAHARDWARE_H
+#define _SAM3UDMAHARDWARE_H
+
+/**
+ *  DMAC Global Configuration Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1073
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t reserved0     :  4;
+    uint8_t arb_cfg       :  1;
+    uint8_t reserved1     :  3;
+    uint16_t reserved2    : 16;
+    uint8_t reserved3     :  8;
+  } __attribute__((__packed__)) bits;
+} dmac_gcfg_t; 
+
+/**
+ *  DMAC Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1074
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t enable        :  1;
+    uint8_t reserved0     :  7;
+    uint16_t reserved1    : 16;
+    uint8_t reserved2     :  8;
+  } __attribute__((__packed__)) bits;
+} dmac_en_t; 
+
+/**
+ *  DMAC Software Single Request Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1075
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t ssreq0        :  1;
+    uint8_t dsreq0        :  1;
+    uint8_t ssreq1        :  1;
+    uint8_t dsreq1        :  1;
+    uint8_t ssreq2dash    :  1;
+    uint8_t dsreq2dash    :  1;
+    uint8_t ssreq3        :  1;
+    uint8_t dsreq3        :  1;
+    uint16_t reserved0    : 16;
+    uint8_t reserved1     :  8;
+  } __attribute__((__packed__)) bits;
+} dmac_sreq_t; 
+
+/**
+ *  DMAC Software Chunk Request Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1076
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t screq0        :  1;
+    uint8_t dcreq0        :  1;
+    uint8_t screq1        :  1;
+    uint8_t dcreq1        :  1;
+    uint8_t screq2dash    :  1;
+    uint8_t dcreq2dash    :  1;
+    uint8_t screq3        :  1;
+    uint8_t dcreq3        :  1;
+    uint16_t reserved0    : 16;
+    uint8_t reserved1     :  8;
+  } __attribute__((__packed__)) bits;
+} dmac_creq_t; 
+
+/**
+ *  DMAC Software Last Transfer Flag Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1077
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t slast0        :  1;
+    uint8_t dlast0        :  1;
+    uint8_t slast1        :  1;
+    uint8_t dlast1        :  1;
+    uint8_t slast2        :  1;
+    uint8_t dlast2        :  1;
+    uint8_t slast3        :  1;
+    uint8_t dlast3        :  1;
+    uint16_t reserved0    : 16;
+    uint8_t reserved1     :  8;
+  } __attribute__((__packed__)) bits;
+} dmac_last_t; 
+
+/**
+ *  DMAC Error, Buffer Transfer and Chained Buffer Transfer Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1078
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t btc0        :  1;
+    uint8_t btc1        :  1;
+    uint8_t btc2        :  1;
+    uint8_t btc3        :  1;
+    uint8_t reserved0   :  4;
+    uint8_t cbtc0       :  1;
+    uint8_t cbtc1       :  1;
+    uint8_t cbtc2       :  1;
+    uint8_t cbtc3       :  1;
+    uint8_t reserved1   :  4;
+    uint8_t err0        :  1;
+    uint8_t err1        :  1;
+    uint8_t err2        :  1;
+    uint8_t err3        :  1;
+    uint8_t reserved2   :  4;
+    uint8_t reserved3   :  8;
+  } __attribute__((__packed__)) bits;
+} dmac_ebcier_t; 
+
+/**
+ *  DMAC Error, Buffer Transfer and Chained Buffer Transfer Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1079
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t btc0        :  1;
+    uint8_t btc1        :  1;
+    uint8_t btc2        :  1;
+    uint8_t btc3        :  1;
+    uint8_t reserved0   :  4;
+    uint8_t cbtc0       :  1;
+    uint8_t cbtc1       :  1;
+    uint8_t cbtc2       :  1;
+    uint8_t cbtc3       :  1;
+    uint8_t reserved1   :  4;
+    uint8_t err0        :  1;
+    uint8_t err1        :  1;
+    uint8_t err2        :  1;
+    uint8_t err3        :  1;
+    uint8_t reserved2   :  4;
+    uint8_t reserved3   :  8;
+  } __attribute__((__packed__)) bits;
+} dmac_ebcidr_t; 
+
+/**
+ *  DMAC Error, Buffer Transfer and Chained Buffer Transfer Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1080
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t btc0        :  1;
+    uint8_t btc1        :  1;
+    uint8_t btc2        :  1;
+    uint8_t btc3        :  1;
+    uint8_t reserved0   :  4;
+    uint8_t cbtc0       :  1;
+    uint8_t cbtc1       :  1;
+    uint8_t cbtc2       :  1;
+    uint8_t cbtc3       :  1;
+    uint8_t reserved1   :  4;
+    uint8_t err0        :  1;
+    uint8_t err1        :  1;
+    uint8_t err2        :  1;
+    uint8_t err3        :  1;
+    uint8_t reserved2   :  4;
+    uint8_t reserved3   :  8;
+  } __attribute__((__packed__)) bits;
+} dmac_ebcimr_t;
+
+/**
+ *  DMAC Error, Buffer Transfer and Chained Buffer Transfer Interrupt Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1081
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t btc0        :  1;
+    uint8_t btc1        :  1;
+    uint8_t btc2        :  1;
+    uint8_t btc3        :  1;
+    uint8_t reserved0   :  4;
+    uint8_t cbtc0       :  1;
+    uint8_t cbtc1       :  1;
+    uint8_t cbtc2       :  1;
+    uint8_t cbtc3       :  1;
+    uint8_t reserved1   :  4;
+    uint8_t err0        :  1;
+    uint8_t err1        :  1;
+    uint8_t err2        :  1;
+    uint8_t err3        :  1;
+    uint8_t reserved2   :  4;
+    uint8_t reserved3   :  8;
+  } __attribute__((__packed__)) bits;
+} dmac_ebcisr_t;
+
+/**
+ *  DMAC Channel Handler Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1082
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t ena0        :  1;
+    uint8_t ena1        :  1;
+    uint8_t ena2        :  1;
+    uint8_t ena3        :  1;
+    uint8_t reserved0   :  4;
+    uint8_t susp0       :  1;
+    uint8_t susp1       :  1;
+    uint8_t susp2       :  1;
+    uint8_t susp3       :  1;
+    uint8_t reserved1   :  4;
+    uint8_t reserved2   :  8;
+    uint8_t keep0       :  1;
+    uint8_t keep1       :  1;
+    uint8_t keep2       :  1;
+    uint8_t keep3       :  1;
+    uint8_t reserved3   :  4;
+  } __attribute__((__packed__)) bits;
+} dmac_cher_t;
+
+/**
+ *  DMAC Channel Handler Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1083
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t dis0        :  1;
+    uint8_t dis1        :  1;
+    uint8_t dis2        :  1;
+    uint8_t dis3        :  1;
+    uint8_t reserved0   :  4;
+    uint8_t res0        :  1;
+    uint8_t res1        :  1;
+    uint8_t res2        :  1;
+    uint8_t res3        :  1;
+    uint8_t reserved1   :  4;
+    uint8_t reserved2   :  8;
+    uint8_t reserved3   :  8;
+  } __attribute__((__packed__)) bits;
+} dmac_chdr_t;
+
+/**
+ *  DMAC Channel Handler Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1084
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t ena0        :  1;
+    uint8_t ena1        :  1;
+    uint8_t ena2        :  1;
+    uint8_t ena3        :  1;
+    uint8_t reserved0   :  4;
+    uint8_t susp0       :  1;
+    uint8_t susp1       :  1;
+    uint8_t susp2       :  1;
+    uint8_t susp3       :  1;
+    uint8_t reserved1   :  4;
+    uint8_t empt0       :  1;
+    uint8_t empt1       :  1;
+    uint8_t empt2       :  1;
+    uint8_t empt3       :  1;
+    uint8_t reserved2   :  4;
+    uint8_t stal0       :  1;
+    uint8_t stal1       :  1;
+    uint8_t stal2       :  1;
+    uint8_t stal3       :  1;
+    uint8_t reserved3   :  4;
+  } __attribute__((__packed__)) bits;
+} dmac_chsr_t;
+
+/**
+ *  DMAC Channal x Source Address Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1085
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t saddrx         : 32;
+  } __attribute__((__packed__)) bits;
+} dmac_saddrx_t;
+
+/**
+ *  DMAC Channal x Destination Address Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1086
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t daddrx         : 32;
+  } __attribute__((__packed__)) bits;
+} dmac_daddrx_t;
+
+/**
+ *  DMAC Channal x Descriptor Address Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1087
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t reserved0     :  2;
+    uint32_t dscrx         : 30; 
+  } __attribute__((__packed__)) bits;
+} dmac_dscrx_t;
+
+/**
+ *  DMAC Channal x Control A Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1088
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t btsize     : 12;
+    uint16_t scsize     :  1;
+    uint16_t reserved0  :  3;
+    uint8_t dcsize      :  1;
+    uint8_t reserved1   :  3;
+    uint8_t src_width   :  2;
+    uint8_t reserved2   :  2;
+    uint8_t dst_width   :  2;
+    uint8_t reserved3   :  1;
+    uint8_t done        :  1;
+  } __attribute__((__packed__)) bits;
+} dmac_ctrlax_t;
+
+/**
+ *  DMAC Channal x Control B Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1090
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t reserved0      :  8;
+    uint8_t resetved1      :  8;
+    uint8_t src_dscr       :  1;
+    uint8_t reserved2      :  3;
+    uint8_t dst_dscr       :  1;
+    uint8_t fc             :  2;
+    uint8_t reserved3      :  1;
+    uint8_t src_incr       :  2;
+    uint8_t reserved4      :  2;
+    uint8_t dst_incr       :  2;
+    uint8_t ien            :  1;
+    uint8_t reserved5      :  1;
+  } __attribute__((__packed__)) bits;
+} dmac_ctrlbx_t;
+
+/**
+ *  DMAC Channal x Configuration Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1090
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t src_per      :  4;
+    uint8_t dst_per      :  4;
+    uint8_t reserved0    :  1;
+    uint8_t src_h2sel    :  1;
+    uint8_t reserved1    :  3;
+    uint8_t dst_h2sel    :  1;
+    uint8_t reserved2    :  2;
+    uint8_t sod          :  1;
+    uint8_t reserved3    :  3;
+    uint8_t lock_if      :  1;
+    uint8_t lock_b       :  1;
+    uint8_t lock_if_l    :  1;
+    uint8_t reserved4    :  1;
+    uint8_t ahb_prot     :  3;
+    uint8_t reserved5    :  1;
+    uint8_t fifocfg      :  2;
+    uint8_t reserved6    :  2;
+  } __attribute__((__packed__)) bits;
+} dmac_cfgx_t;
+
+/**
+ * DMAC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary, p. 1072
+ */
+
+typedef struct dmac
+{
+  volatile dmac_gcfg_t gcfg;
+  volatile dmac_en_t en;
+  volatile dmac_sreq_t sreq;
+  volatile dmac_creq_t creq;
+  volatile dmac_last_t last;
+  uint32_t reserved0;
+  volatile dmac_ebcier_t ebcier;
+  volatile dmac_ebcidr_t ebcidr;
+  volatile dmac_ebcimr_t ebcimr;
+  volatile dmac_ebcisr_t ebcisr;
+  volatile dmac_cher_t cher;
+  volatile dmac_chdr_t chdr;
+  volatile dmac_chsr_t chsr;
+  uint32_t reserved1;
+  uint32_t reserved2;
+  volatile dmac_saddrx_t saddr0;
+  volatile dmac_daddrx_t daddr0;
+  volatile dmac_dscrx_t dscr0;
+  volatile dmac_ctrlax_t ctrla0;
+  volatile dmac_ctrlbx_t ctrlb0;
+  volatile dmac_cfgx_t cfg0;
+  uint32_t reserved3;
+  uint32_t reserved4;
+  uint32_t reserved5;
+  uint32_t reserved6;
+  volatile dmac_saddrx_t saddr1;
+  volatile dmac_daddrx_t daddr1;
+  volatile dmac_dscrx_t dscr1;
+  volatile dmac_ctrlax_t ctrla1;
+  volatile dmac_ctrlbx_t ctrlb1;
+  volatile dmac_cfgx_t cfg1;
+  uint32_t reserved7;
+  uint32_t reserved8;
+  uint32_t reserved9;
+  uint32_t reserved10;
+  volatile dmac_saddrx_t saddr2;
+  volatile dmac_daddrx_t daddr2;
+  volatile dmac_dscrx_t dscr2;
+  volatile dmac_ctrlax_t ctrla2;
+  volatile dmac_ctrlbx_t ctrlb2;
+  volatile dmac_cfgx_t cfg2;
+  uint32_t reserved11;
+  uint32_t reserved12;
+  uint32_t reserved13;
+  uint32_t reserved14;
+  volatile dmac_saddrx_t saddr3;
+  volatile dmac_daddrx_t daddr3;
+  volatile dmac_dscrx_t dscr3;
+  volatile dmac_ctrlax_t ctrla3;
+  volatile dmac_ctrlbx_t ctrlb3;
+  volatile dmac_cfgx_t cfg3;
+}  __attribute__((__packed__)) dmac_t;
+
+volatile dmac_t* DMAC = (volatile dmac_t *) 0x400B0000; // DMAC Base Address
+//volatile dmac_gcfg_t* SREQ = (volatile dmac_gcfg_t *) 0x400B0008;
+
+/*
+
+*/
+
+
+/*
+typedef enum {
+  DMAC_SINGLE_TRANSFER               = 0x0,
+  DMAC_BLOCK_TRANSFER                = 0x1,
+  DMAC_BURST_BLOCK_TRANSFER          = 0x2,
+  DMAC_REPEATED_SINGLE_TRANSFER      = 0x4,
+  DMAC_REPEATED_BLOCK_TRANSFER       = 0x5,
+  DMAC_REPEATED_BURST_BLOCK_TRANSFER = 0x7
+} dmac_transfer_mode_t;
+*/
+
+typedef enum {
+  ONE_DATA_TRANSFERRED  = 0x0,
+  FOUR_DATA_TRANSFERRED = 0x1
+} dmac_chunk_t;
+
+typedef enum {
+  SINGLE_TRANSFER_SIZE_BYTE      = 0x0,
+  SINGLE_TRANSFER_SIZE_HALF_WORD = 0x1,
+  SINGLE_TRANSFER_SIZE_WORD      = 0x2
+} dmac_width_t;
+
+typedef enum {
+  MEMORY_TO_MEMORY         = 0x0,
+  MEMORY_TO_PERIPHERAL     = 0x1,
+  PERIPHERAL_TO_MEMORY     = 0x2,
+  PERIPHERAL_TO_PERIPHERAL = 0x3
+} dmac_fc_t;
+
+typedef enum {
+  ADDRESS_UPDATE_MEMORY   = 0x0,
+  ADDRESS_UPDATE_DISABLED = 0x1
+} dmac_dscr_t;
+
+typedef enum {
+  INCREMENTING_ADDRESS  = 0x0,
+  FIXED_ADDRESS         = 0x1
+} dmac_inc_t;
+
+typedef enum {
+  LOCK_MASTER_ARBITOR_CHUNK  = 0x0,
+  LOCK_MASTER_ABRITOR_BUFFER = 0x1
+} dmac_IFL_t;
+
+typedef enum {
+  DATA_ACCESS_USER_ACCESS_NO_BUFFER_NO_CACHE = 0x1,
+  DATA_ACCESS_PRIV_ACCESS_NO_BUFFER_NO_CACHE = 0x3,
+  DATA_ACCESS_USER_ACCESS_BUFFER_NO_CACHE    = 0x5,
+  DATA_ACCESS_PRIV_ACCESS_BUFFER_NO_CACHE    = 0x7,
+  DATA_ACCESS_USER_ACCESS_NO_BUFFER_CACHE    = 0x9,
+  DATA_ACCESS_PRIV_ACCESS_NO_BUFFER_CACHE    = 0xB,
+  DATA_ACCESS_USER_ACCESS_BUFFER_CACHE       = 0xD,
+  DATA_ACCESS_PRIV_ACCESS_BUFFER_CACHE       = 0xF
+} dmac_ahbprot_t;
+
+typedef enum {
+  LARGEST_LENGTH_AHB_BURST_DST = 0x0,
+  SERV_HALF_FIFO               = 0x1,
+  SERV_ENOUGH_FIFO             = 0x2
+} dmac_fifocfg_t;
+
+#endif
diff --git a/tos/chips/cortex/m3/sam3/u/eefc/sam3eefchardware.h b/tos/chips/cortex/m3/sam3/u/eefc/sam3eefchardware.h
new file mode 100644
index 00000000..cd4edfeb
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/eefc/sam3eefchardware.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3UEEFCHARDWARE_H
+#define SAM3UEEFCHARDWARE_H
+
+#include "eefchardware.h"
+
+/**
+ * Memory mapping for the EEFC0 and EEFC1 (SAM3U/4E only!)
+ */
+volatile eefc_t* EEFC0 = (volatile eefc_t*) 0x400E0800; // EEFC0 Base Address
+volatile eefc_t* EEFC1 = (volatile eefc_t*) 0x400E0A00; // EEFC1 Base Address
+
+#endif // SAM3UEEFCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/u/hsmci/HplSam3uHsmci.nc b/tos/chips/cortex/m3/sam3/u/hsmci/HplSam3uHsmci.nc
new file mode 100644
index 00000000..1cdd25e0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/hsmci/HplSam3uHsmci.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * High Speed Multimedia Card Interface HPL Interface definitions.
+ *
+ * @author JeongGil Ko
+ * @author Kevin Klues
+ */
+
+interface HplSam3uHsmci {
+  command error_t init(uint32_t **trans_buf);
+  async event void initDone(hsmci_sd_r6_t* rsp, error_t error);
+
+  async command error_t sendCommand(uint8_t cmd, uint32_t arg);
+  async event void* sendCommandDone(uint8_t cmd, void* rsp, error_t error);
+
+  async event void txDone(error_t error); 
+  async event void rxDone(error_t error); 
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/hsmci/HplSam3uHsmciC.nc b/tos/chips/cortex/m3/sam3/u/hsmci/HplSam3uHsmciC.nc
new file mode 100644
index 00000000..eb7e5db0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/hsmci/HplSam3uHsmciC.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * High Speed Multimedia Card Interface HPL Configurations.
+ *
+ * @author JeongGil Ko
+ * @author Kevin Klues
+ */
+
+#include <sam3uhsmcihardware.h>
+
+configuration HplSam3uHsmciC {
+  provides {
+    interface AsyncStdControl;
+    interface HplSam3uHsmci;
+  }
+}
+implementation {
+  components HplSam3uHsmciP,
+    HplNVICC, HplSam3uClockC, HplSam3uGeneralIOC;
+
+  HplSam3uHsmci = HplSam3uHsmciP;
+  AsyncStdControl = HplSam3uHsmciP;
+
+  HplSam3uHsmciP.HSMCIInterrupt -> HplNVICC.MCI0Interrupt;
+  HplSam3uHsmciP.HSMCIPinMCCDA -> HplSam3uGeneralIOC.HplPioA4;
+  HplSam3uHsmciP.HSMCIPinMCCK -> HplSam3uGeneralIOC.HplPioA3;
+  HplSam3uHsmciP.HSMCIPinMCDA0 -> HplSam3uGeneralIOC.HplPioA5;
+  HplSam3uHsmciP.HSMCIPinMCDA1 -> HplSam3uGeneralIOC.HplPioA6;
+  HplSam3uHsmciP.HSMCIPinMCDA2 -> HplSam3uGeneralIOC.HplPioA7;
+  HplSam3uHsmciP.HSMCIPinMCDA3 -> HplSam3uGeneralIOC.HplPioA8;
+  HplSam3uHsmciP.HSMCIPinMCDA4 -> HplSam3uGeneralIOC.HplPioC28;
+  HplSam3uHsmciP.HSMCIPinMCDA5 -> HplSam3uGeneralIOC.HplPioC29;
+  HplSam3uHsmciP.HSMCIPinMCDA6 -> HplSam3uGeneralIOC.HplPioC30;
+  HplSam3uHsmciP.HSMCIPinMCDA7 -> HplSam3uGeneralIOC.HplPioC31;
+  HplSam3uHsmciP.HSMCIClockControl -> HplSam3uClockC.MCI0PPCntl;
+
+  components McuSleepC;
+  HplSam3uHsmciP.HsmciInterruptWrapper -> McuSleepC;
+
+  components PlatformHsmciConfigC;
+  HplSam3uHsmciP.PlatformHsmciConfig -> PlatformHsmciConfigC;
+
+  components BusyWaitMicroC;
+  HplSam3uHsmciP.BusyWait -> BusyWaitMicroC;
+
+  components LedsC;
+  HplSam3uHsmciP.Leds -> LedsC;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/hsmci/HplSam3uHsmciP.nc b/tos/chips/cortex/m3/sam3/u/hsmci/HplSam3uHsmciP.nc
new file mode 100644
index 00000000..eaf9adc6
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/hsmci/HplSam3uHsmciP.nc
@@ -0,0 +1,845 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * High Speed Multimedia Card Interface HPL Implementations.
+ *
+ * @author JeongGil Ko
+ * @author Kevin Klues
+ */
+
+#include <sam3uhsmcihardware.h>
+
+module HplSam3uHsmciP {
+  provides {
+    interface AsyncStdControl;
+    interface HplSam3uHsmci;
+  } 
+  uses {
+    interface Leds;
+    interface Init as PlatformHsmciConfig;
+    interface BusyWait<TMicro, uint16_t>;
+    interface HplSam3uPeripheralClockCntl as HSMCIClockControl;
+    interface HplNVICInterruptCntl as HSMCIInterrupt;
+    interface HplSam3uGeneralIOPin as HSMCIPinMCCDA;
+    interface HplSam3uGeneralIOPin as HSMCIPinMCCK;
+    interface HplSam3uGeneralIOPin as HSMCIPinMCDA0;
+    interface HplSam3uGeneralIOPin as HSMCIPinMCDA1;
+    interface HplSam3uGeneralIOPin as HSMCIPinMCDA2;
+    interface HplSam3uGeneralIOPin as HSMCIPinMCDA3;
+    interface HplSam3uGeneralIOPin as HSMCIPinMCDA4;
+    interface HplSam3uGeneralIOPin as HSMCIPinMCDA5;
+    interface HplSam3uGeneralIOPin as HSMCIPinMCDA6;
+    interface HplSam3uGeneralIOPin as HSMCIPinMCDA7;
+    interface FunctionWrapper as HsmciInterruptWrapper;
+  }
+}
+implementation {
+
+  
+  #define BLOCK_LENGTH (HSMCI->blkr.bits.blklen)
+  #define WORDS_PER_BLOCK (BLOCK_LENGTH/4)
+
+  enum {
+    STATE_OFF,
+    STATE_INACTIVE,
+    STATE_IDLE,
+    STATE_READY, 
+    STATE_IDENTIFICATION,
+    STATE_STANDBY,
+    STATE_TRANSFER,
+    STATE_SENDING,
+    STATE_RECEIVING,
+    STATE_PROGRAMMING,
+    STATE_DISCONNECT,
+  };
+
+  // Protected by state variables 
+  norace uint8_t state = STATE_OFF;
+  norace uint8_t cmd_pending = FALSE;
+  norace uint8_t current_cmd = 0;
+  norace uint8_t acmd = 0;
+  norace uint32_t acmd_arg = 0;
+  norace uint32_t rca_addr = 0;
+  norace uint8_t card_type = 0;
+
+  norace uint32_t rsp_buf[4]; 
+  norace uint32_t *rsp_buf_ptr;
+
+  norace uint32_t words_transferred = 0;
+  norace uint32_t **trans_buf;
+
+  void configurePins() {
+    // Disable all interrrupts by default
+    HSMCI->idr.flat = -1; 
+    
+    // Configure the SD card interrupt
+    call HSMCIInterrupt.configure(IRQ_PRIO_HSMCI);
+
+    // Set up the SD card pins
+    call HSMCIPinMCCDA.disablePioControl();
+    call HSMCIPinMCCDA.selectPeripheralA();
+
+    call HSMCIPinMCCK.disablePioControl();
+    call HSMCIPinMCCK.selectPeripheralA();
+
+    call HSMCIPinMCDA0.disablePioControl();
+    call HSMCIPinMCDA0.selectPeripheralA();
+
+    call HSMCIPinMCDA1.disablePioControl();
+    call HSMCIPinMCDA1.selectPeripheralA();
+
+    call HSMCIPinMCDA2.disablePioControl();
+    call HSMCIPinMCDA2.selectPeripheralA();
+
+    call HSMCIPinMCDA3.disablePioControl();
+    call HSMCIPinMCDA3.selectPeripheralA();
+
+    call HSMCIPinMCDA4.disablePioControl();
+    call HSMCIPinMCDA4.selectPeripheralB();
+
+    call HSMCIPinMCDA5.disablePioControl();
+    call HSMCIPinMCDA5.selectPeripheralB();
+
+    call HSMCIPinMCDA6.disablePioControl();
+    call HSMCIPinMCDA6.selectPeripheralB();
+
+    call HSMCIPinMCDA7.disablePioControl();
+    call HSMCIPinMCDA7.selectPeripheralB();
+  }
+
+  void unlockConfigRegs() {
+    // set write protection registers
+    HSMCI->wpmr.bits.wp_key = 0x4D4349; // Magic key for unlocking the regs
+    HSMCI->wpmr.bits.wp_en = 0;
+  }
+
+  void initConfigRegs() {
+    // Enable mci
+    HSMCI->cr.bits.mcien = 1;
+    // Enable power save mode
+    HSMCI->cr.bits.pwsdis = 0;
+    // Set the multiplier for the timeout between block transfers
+    HSMCI->dtor.bits.dtomul = 0x7;
+    // Set timeout between block transfers
+    HSMCI->dtor.bits.dtocyc = 0xF;
+    // Disable all interrupts
+    HSMCI->idr.flat = -1;
+    // Set the clock divide
+    HSMCI->mr.bits.clkdiv = 58;
+    // Set padding value to 0x00, not 0xFF
+    HSMCI->mr.bits.padv = 0;
+    // Disable allowing byte transfers
+    HSMCI->mr.bits.fbyte = 0;
+    // Disable dma
+    HSMCI->dma.bits.dmaen = 0;
+    // Start writing data immediately when appears in FIFO
+    HSMCI->cfg.bits.fifomode = 1;
+    // Require a new read/write to reset an under/overflow
+    HSMCI->cfg.bits.ferrctrl = 0;
+    // Initialize any platform specific settings
+    call PlatformHsmciConfig.init();
+  }
+
+  void swReset() {
+    // set sw reset register
+    HSMCI->cr.bits.swrst = 1;
+  }
+
+  void issueRealACMD(uint8_t cmd, uint32_t arg) {
+    acmd = cmd;
+    acmd_arg = arg;
+    HSMCI->argr.bits.arg = rca_addr;
+    HSMCI->cmdr.flat = AT91C_APP_CMD;
+  }
+
+  void* sendCommandDone(error_t e) {
+    return signal HplSam3uHsmci.sendCommandDone(current_cmd, rsp_buf_ptr, e);
+  }
+
+  async command error_t AsyncStdControl.start() {
+    // start clock, start interrupt, start pin
+    call HSMCIClockControl.enable();
+    return SUCCESS;
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    // start clock, start interrupt, start pin
+    call HSMCIClockControl.disable();
+    return SUCCESS;
+  }
+
+  command error_t HplSam3uHsmci.init(uint32_t **transb) {
+    // Initialize the first tx and rx buffers
+    trans_buf = transb;
+
+    // Configure all of the data and interrupt pins
+    configurePins();
+
+    // Initialize state variables
+    cmd_pending = FALSE;
+    current_cmd = 0;
+    acmd = 0;
+    acmd_arg = 0;
+    rca_addr = 0;
+    state = STATE_OFF;
+    card_type = 0;
+    words_transferred = 0;
+    rsp_buf_ptr = rsp_buf;
+
+    // Reset the device
+    swReset();
+
+    // Unlock and initialize the configuration registers
+    unlockConfigRegs();
+    initConfigRegs();
+
+    // Run the set of commands to switch the SD card 
+    // from Card ID mode to Transfer Mode
+    return call HplSam3uHsmci.sendCommand(CMD_PON, 0);
+  }
+
+  async command error_t HplSam3uHsmci.sendCommand(uint8_t command_number, uint32_t arg){
+    if(cmd_pending == TRUE)
+      return EBUSY;
+
+    if(state == STATE_INACTIVE)
+      return FAIL;
+
+    // Save the current command so we can identify it in the interrupt handler
+    current_cmd = command_number;
+
+    // Set the command argument
+    HSMCI->argr.bits.arg = arg;
+
+    // Set the default values for some registers
+    //HSMCI->cfg.bits.hsmode = 0;
+    HSMCI->mr.bits.wrproof = 1;
+    HSMCI->mr.bits.rdproof = 1;
+
+    // Clear the response buffer for the next command
+    memset(rsp_buf, 0, sizeof(rsp_buf));
+
+    /* Card Power On */
+    if(state == STATE_OFF) {
+      switch(command_number) {
+        case CMD_PON:
+          HSMCI->cmdr.flat = AT91C_POWER_ON_INIT;
+          break;
+        default:
+          // Notice the return here rather than the break....
+          // We don't want to wait for an interrupt in this case, so just return
+          return EINVAL;
+      }
+    }
+    /* Valid Commands from any state except STATE_OFF */
+    else if(command_number == CMD0) {
+      HSMCI->cmdr.flat = AT91C_GO_IDLE_STATE_CMD;
+    }
+    else if(command_number == CMD15) {
+      HSMCI->cmdr.flat = AT91C_GO_INACTIVE_STATE_CMD;
+    }
+    /* Card Identification Mode */
+    else if(state == STATE_IDLE) {
+      switch(command_number) {
+        case CMD8:
+          HSMCI->cmdr.flat = AT91C_SEND_IF_COND;
+          break;
+        case ACMD41:
+          issueRealACMD(ACMD41_REAL, arg);
+          break;
+        case ACMD41_REAL:
+          HSMCI->cmdr.flat = AT91C_SD_APP_OP_COND_CMD;
+          break;
+        default:
+          // Notice the return here rather than the break....
+          // We don't want to wait for an interrupt in this case, so just return
+          return EINVAL;
+      }
+    }
+    else if(state == STATE_READY) {
+      switch(command_number) {
+        // case CMD11:
+          // No CMD11 needed on sam3u
+        case CMD2:
+          HSMCI->cmdr.flat = AT91C_ALL_SEND_CID_CMD;
+          break;
+        default:
+          // Notice the return here rather than the break....
+
+      }
+    }
+    else if(state == STATE_IDENTIFICATION) {
+      switch(command_number) {
+        case CMD3:
+          HSMCI->cmdr.flat = AT91C_SET_RELATIVE_ADDR_CMD;
+          break;
+        default:
+          // Notice the return here rather than the break....
+          // We don't want to wait for an interrupt in this case, so just return
+          return EINVAL;
+      }
+    }
+    else if(command_number == CMD13) {
+      HSMCI->cmdr.flat = AT91C_SEND_STATUS_CMD;
+    }
+    /* Transfer Mode */
+    else if(state == STATE_STANDBY) {
+      switch(command_number) {
+        case CMD4:
+          HSMCI->cmdr.flat =  AT91C_SET_DSR_CMD;
+          break;
+        case CMD9:
+          HSMCI->cmdr.flat = AT91C_SEND_CSD_CMD;
+          break;
+        case CMD10:
+          HSMCI->cmdr.flat = AT91C_SEND_CID_CMD;
+          break;
+        case CMD3:
+          HSMCI->cmdr.flat = AT91C_SET_RELATIVE_ADDR_CMD;
+          break;
+        case CMD7:
+          HSMCI->cmdr.flat = AT91C_SEL_DESEL_CARD_CMD;
+          break;
+        default:
+          // Notice the return here rather than the break....
+          // We don't want to wait for an interrupt in this case, so just return
+          return EINVAL;
+      }
+    }
+    else if(state == STATE_TRANSFER) {
+      switch(command_number) {
+        case CMD7:
+          HSMCI->cmdr.flat = AT91C_SEL_DESEL_CARD_CMD;
+          break;
+      /* Configuration commands */
+        case CMD16:
+          HSMCI->blkr.bits.blklen = arg;
+          HSMCI->cmdr.flat = AT91C_SET_BLOCKLEN_CMD;
+          break;
+        case CMD32:
+          HSMCI->cmdr.flat = AT91C_TAG_SECTOR_START_CMD;
+          break;
+        case CMD33:
+          HSMCI->cmdr.flat = AT91C_TAG_SECTOR_END_CMD;
+          break;
+        case ACMD6:
+          issueRealACMD(ACMD6_REAL, arg);
+          break;
+        case ACMD42:
+          issueRealACMD(ACMD42_REAL, arg);
+          break;
+        case ACMD23:
+          issueRealACMD(ACMD23_REAL, arg);
+          break;
+        case ACMD6_REAL:
+          HSMCI->sdcr.bits.sdcbus = arg;
+          HSMCI->cmdr.flat = AT91C_SD_SET_BUS_WIDTH_CMD;
+          break;
+        case ACMD42_REAL:
+          HSMCI->cmdr.flat = AT91C_SD_SET_CLR_CARD_DETECT_CMD;
+          break;
+        case ACMD23_REAL:
+          HSMCI->cmdr.flat = AT91C_SD_SET_WR_BLK_ERASE_COUNT_CMD;
+          break;
+      /* Read commands */
+        case CMD6:
+          HSMCI->cmdr.flat = AT91C_MMC_SWITCH_CMD;
+          break;
+        case CMD17:
+          if(card_type == 3)
+            HSMCI->blkr.bits.blklen = 512;
+          HSMCI->blkr.bits.bcnt = 1;
+          words_transferred = 0;
+          HSMCI->cmdr.flat = AT91C_READ_SINGLE_BLOCK_CMD;
+          break;
+        case CMD18:
+          if(card_type == 3)
+            HSMCI->blkr.bits.blklen = 512;
+          HSMCI->blkr.bits.bcnt = 0;
+          words_transferred = 0;
+          HSMCI->cmdr.flat = AT91C_READ_MULTIPLE_BLOCK_CMD;
+          break;
+        case CMD56R:
+          HSMCI->cmdr.flat = AT91C_GEN_CMD;
+          break;
+        case ACMD13:
+          issueRealACMD(ACMD13_REAL, arg);
+          break;
+        case ACMD22:
+          issueRealACMD(ACMD22_REAL, arg);
+          break;
+        case ACMD51:
+          issueRealACMD(ACMD51_REAL, arg);
+          break;
+        case ACMD13_REAL:
+          HSMCI->cmdr.flat = AT91C_SD_STATUS_CMD;
+          break;
+        case ACMD22_REAL:
+          HSMCI->cmdr.flat = AT91C_SD_SEND_NUM_WR_BLOCKS_CMD;
+          break;
+        case ACMD51_REAL:
+          HSMCI->cmdr.flat = AT91C_SD_SEND_SCR_CMD;
+          break;
+      /* Write commands */
+        case CMD24:
+          if(card_type == 3)
+            HSMCI->blkr.bits.blklen = 512;
+          HSMCI->blkr.bits.bcnt = 1;
+          words_transferred = 0;
+          HSMCI->cmdr.flat = AT91C_WRITE_BLOCK_CMD;
+          break;
+        case CMD25:
+          if(card_type == 3)
+            HSMCI->blkr.bits.blklen = 512;
+          HSMCI->blkr.bits.bcnt = 0;
+          words_transferred = 0;
+          HSMCI->cmdr.flat = AT91C_WRITE_MULTIPLE_BLOCK_CMD;
+          break;
+        case CMD27:
+          HSMCI->cmdr.flat = AT91C_PROGRAM_CSD_CMD;
+          break;
+        case CMD42:
+          HSMCI->cmdr.flat = AT91C_LOCK_UNLOCK;
+          break;
+        case CMD56W:
+          HSMCI->cmdr.flat = AT91C_GEN_CMD;
+          break;
+      /* Erase commands */
+        case CMD38:
+          HSMCI->cmdr.flat = AT91C_ERASE_CMD;
+          break;
+        default:
+          // Notice the return here rather than the break....
+          // We don't want to wait for an interrupt in this case, so just return
+          return EINVAL;
+      }
+    }
+    else if(state == STATE_SENDING) {
+      switch(command_number) {
+        case CMD7:
+          HSMCI->cmdr.flat = AT91C_SEL_DESEL_CARD_CMD;
+          break;
+        case CMD12:
+          HSMCI->cmdr.flat = AT91C_STOP_TRANSMISSION_CMD;
+          break;
+        default:
+          // Notice the return here rather than the break....
+          // We don't want to wait for an interrupt in this case, so just return
+          return EINVAL;
+      }
+    }
+    else if(state == STATE_RECEIVING) {
+      switch(command_number) {
+        case CMD12:
+          HSMCI->cmdr.flat = AT91C_STOP_TRANSMISSION_CMD;
+          break;
+        default:
+          // Notice the return here rather than the break....
+          // We don't want to wait for an interrupt in this case, so just return
+          return EINVAL;
+      }
+    }
+    else if(state == STATE_PROGRAMMING) {
+      switch(command_number) {
+        case CMD7:
+          HSMCI->cmdr.flat = AT91C_SEL_DESEL_CARD_CMD;
+          break;
+        default:
+          // Notice the return here rather than the break....
+          // We don't want to wait for an interrupt in this case, so just return
+          return EINVAL;
+      }
+    }
+    else if(state == STATE_DISCONNECT) {
+      switch(command_number) {
+        case CMD7:
+          HSMCI->cmdr.flat = AT91C_SEL_DESEL_CARD_CMD;
+          break;
+        default:
+          // Notice the return here rather than the break....
+          // We don't want to wait for an interrupt in this case, so just return
+          return EINVAL;
+      }
+    }
+    else return EINVAL;
+
+    // if the command was valid, set the cmd_pending flag to TRUE
+    // so we can't try and issue another commend in the process
+    cmd_pending = TRUE;
+
+    // Unmask the cmdrdy interrupt and turn on interrupts
+    HSMCI->ier.bits.cmdrdy = 1;
+    call HSMCIInterrupt.enable();
+    return SUCCESS;
+  }
+
+  // Handle events
+  void handler() @spontaneous() {
+    int i;
+
+//    if(statusError() && (current_cmd != 40)) {
+//      printf("CMD: %d\n", current_cmd);
+//      printStatus();
+//    }
+
+    // Disable interrupts while processing the response
+    // They will be reenabled either below (in the case of a long read/write) 
+    // or when the next command comes in
+    call HSMCIInterrupt.disable();
+    cmd_pending = FALSE;
+
+    // Copy the response buffer so we can pass it back up 
+    // Note that the last 8 bits of the rspr as specified in the SD spec are cut off
+    // i.e. the stop bit and the CRC are not included in what is read out of rspr
+    //memcpy(rsp_buf_ptr, (void*)HSMCI->rspr, sizeof(rsp_buf));
+    for(i=3; i>=0; i--)
+      rsp_buf_ptr[i] = HSMCI->rspr[0].flat;
+
+    /* Card Power On */
+    if(state == STATE_OFF) {
+      switch(current_cmd) {
+        case CMD_PON:
+          state = STATE_IDLE;
+          call HplSam3uHsmci.sendCommand(CMD0, 0);
+          return;
+        default:
+          // should never get here!!
+          signal HplSam3uHsmci.initDone(0, EINVAL);
+          return;
+      }
+    }
+    /* Valid Commands from any state except STATE_OFF */
+    else if(current_cmd == CMD0) {
+      state = STATE_IDLE;
+      call HplSam3uHsmci.sendCommand(CMD8, ((uint32_t)(1<<8) | (0xAA)));
+      return;
+    }
+    else if(current_cmd == CMD15) {
+      state = STATE_INACTIVE;
+      return;
+    }
+    /* Card Identification Mode */
+    else if(state == STATE_IDLE) {
+      switch(current_cmd) {
+        case CMD8:
+          if(HSMCI->sr.bits.rtoe) { // response time out...
+            // Implies either 
+            // 1) Voltage Mismatch for 2.0 or greater cards
+            // 2) Version 1.x SD card
+            // 3) Not an SD card
+            // Send ACMD41 with HCS = 0
+            card_type = 1;
+            call HplSam3uHsmci.sendCommand(ACMD41, AT91C_MMC_HOST_VOLTAGE_RANGE);
+          }
+          else { // Version 2.0 or later SD card
+            hsmci_sd_r7_t* rsp = (hsmci_sd_r7_t*)rsp_buf_ptr;
+            card_type = 2;
+            // Check that the voltage range and check pattern are correct
+            if((rsp->vrange == 1) && (rsp->cpattern == 0xAA)) {
+              // Send ACMD41 with HCS = 1
+              call HplSam3uHsmci.sendCommand(ACMD41, (1 << 30) | AT91C_MMC_HOST_VOLTAGE_RANGE);
+            }
+            else {
+              signal HplSam3uHsmci.initDone(0, FAIL);
+            }
+          }
+          return;
+        case ACMD41:
+          call HplSam3uHsmci.sendCommand(acmd, acmd_arg);
+          return;
+        case ACMD41_REAL:
+          if((card_type == 1) && HSMCI->sr.bits.rtoe) { // response time out...
+            // Not an SD card
+            signal HplSam3uHsmci.initDone(0, FAIL);
+          }
+          else {
+            hsmci_sd_r3_t* rsp = (hsmci_sd_r3_t*)rsp_buf_ptr;
+            if(!rsp->ocr.busy) { // If the card is busy
+              // Resend ACMD41 with same argument as before
+              call HplSam3uHsmci.sendCommand(ACMD41, (1 << 30) | AT91C_MMC_HOST_VOLTAGE_RANGE);
+            }
+            else {
+              if(rsp->ocr.ccs) { // The card is high or extended capacity
+                card_type = 3;
+              }
+              // Ignore check of of s18a and s18r becuase we know we set s18r=0
+              // Call CMD2
+              state = STATE_READY;
+              call HplSam3uHsmci.sendCommand(CMD2, 0);
+            }
+          }
+          return;
+        default:
+          // should never get here!!
+          signal HplSam3uHsmci.initDone(0, EINVAL);
+          return;
+      }
+    }
+    else if(state == STATE_READY) {
+      switch(current_cmd) {
+        case CMD2:
+          state = STATE_IDENTIFICATION;
+          call HplSam3uHsmci.sendCommand(CMD3, 0);
+          return;
+        default:
+          // should never get here!!
+          signal HplSam3uHsmci.initDone(0, EINVAL);
+          return;
+      }
+    }
+    else if(state == STATE_IDENTIFICATION) {
+      switch(current_cmd) {
+        case CMD3:
+          state = STATE_STANDBY;
+          rca_addr = (((hsmci_sd_r6_t*)rsp_buf_ptr)->rca << 16);
+          signal HplSam3uHsmci.initDone((hsmci_sd_r6_t*)rsp_buf_ptr, SUCCESS);
+          return;
+        default:
+          // should never get here!!
+          signal HplSam3uHsmci.initDone(0, EINVAL);
+          return;
+      }
+    }
+    /* Transfer Mode */
+    else if(state == STATE_STANDBY) {
+      switch(current_cmd) {
+        case CMD13:
+        case CMD4:
+        case CMD9:
+        case CMD10:
+        case CMD3:
+          // State doesn't change
+          break;
+        case CMD7:
+            state = STATE_TRANSFER;
+          break;
+        default:
+         // Notice the return here rather than the break....
+         rsp_buf_ptr = sendCommandDone(EINVAL);
+         return;
+      }
+    }
+    else if(state == STATE_TRANSFER) {
+      switch(current_cmd) {
+        case CMD7:
+          state = STATE_STANDBY;
+          break;
+      /* Configuration commands */
+        case ACMD6:
+        case ACMD42:
+        case ACMD23:
+          call HplSam3uHsmci.sendCommand(acmd, acmd_arg);
+          return;
+        case ACMD6_REAL:
+        case ACMD42_REAL:
+        case ACMD23_REAL:
+          current_cmd -= 1; //Notice order in the .h file
+        case CMD13:
+        case CMD16:
+        case CMD32:
+        case CMD33:
+          // State doesn't change
+          break;
+      /* Read commands */
+        case ACMD13:
+        case ACMD22:
+        case ACMD51:
+          call HplSam3uHsmci.sendCommand(acmd, acmd_arg);
+          return;
+        case ACMD13_REAL:
+        case ACMD22_REAL:
+        case ACMD51_REAL:
+          current_cmd -= 1; //Notice order in the .h file
+        case CMD6:
+        case CMD17:
+        case CMD18:
+        case CMD56R:
+          // Seems backwards, but is from perspective of card
+          state = STATE_SENDING; 
+          HSMCI->ier.bits.rxrdy = 1;
+          call HSMCIInterrupt.enable();
+          break;
+      /* Write commands */
+        case CMD24:
+        case CMD25:
+        case CMD27:
+        case CMD42:
+        case CMD56W:
+          // Seems backwards, but is from perspective of card
+          state = STATE_RECEIVING;
+          HSMCI->ier.bits.txrdy = 1;
+          HSMCI->tdr.bits.data = (*trans_buf)[words_transferred];
+          call HSMCIInterrupt.enable();
+          break;
+      /* Erase commands */
+        case CMD38:
+          state = STATE_PROGRAMMING;
+          break;
+        default:
+          // Notice the return here rather than the break....
+          rsp_buf_ptr = sendCommandDone(EINVAL);
+          return;
+      }
+    }
+    else if(state == STATE_SENDING) {
+      switch(current_cmd) {
+        case CMD7:
+          words_transferred = 0;
+          HSMCI->idr.bits.rxrdy = 1;
+          state = STATE_STANDBY;
+          signal HplSam3uHsmci.rxDone(ECANCEL);
+          break;
+        case CMD12:
+          // Only called in the case of canceling
+          words_transferred = 0;
+          HSMCI->idr.bits.rxrdy = 1;
+          state = STATE_TRANSFER;
+          signal HplSam3uHsmci.rxDone(ECANCEL);
+          return;
+        case CMD17:
+          // Double check we are really ready to receive
+          while(!HSMCI->sr.bits.rxrdy);
+          // Get the next word
+          (*trans_buf)[words_transferred] = HSMCI->rdr.bits.data;
+          words_transferred++;
+          // Once we've gotten a whole block, we're done
+          if(words_transferred == WORDS_PER_BLOCK) {
+            words_transferred = 0;
+            HSMCI->idr.bits.rxrdy = 1;
+            while(!HSMCI->sr.bits.xfrdone);
+            state = STATE_TRANSFER;
+            signal HplSam3uHsmci.rxDone(SUCCESS);
+          }
+          else 
+            call HSMCIInterrupt.enable();
+          return;
+        default:
+          // Notice the return here rather than the break....
+          rsp_buf_ptr = sendCommandDone(EINVAL);
+          return;
+      }
+    }
+    else if(state == STATE_RECEIVING) {
+      switch(current_cmd) {
+        case CMD12:
+          // Only called when canceling
+          words_transferred = 0;
+          HSMCI->idr.bits.txrdy = 1;
+          state = STATE_PROGRAMMING;
+          signal HplSam3uHsmci.txDone(ECANCEL);
+          return;
+        case CMD24:
+          // Double check we are really ready to transmit
+          while(!HSMCI->sr.bits.txrdy);
+          words_transferred++;
+          // Once we've transferred a whole block we are done
+          if(words_transferred == WORDS_PER_BLOCK) {
+            words_transferred = 0;
+            HSMCI->idr.bits.txrdy = 1;
+            state = STATE_PROGRAMMING;
+            call HplSam3uHsmci.sendCommand(CMD13, 0);
+            return;
+          }
+          HSMCI->tdr.bits.data = (*trans_buf)[words_transferred];
+          call HSMCIInterrupt.enable();
+          return;
+        default:
+          // Notice the return here rather than the break....
+          rsp_buf_ptr = sendCommandDone(EINVAL);
+          return;
+      }
+    }
+    else if(state == STATE_PROGRAMMING) {
+      switch(current_cmd) {
+        case CMD7:
+          state = STATE_DISCONNECT;
+          break;
+        case CMD13:
+          {
+            hsmci_sd_r1_t *r1 = (hsmci_sd_r1_t*)rsp_buf_ptr;
+            if((r1->status & STATUS_PRG) == STATUS_PRG)
+              call HplSam3uHsmci.sendCommand(CMD13, 0);
+            else {
+              // Go back to the transfer state
+              state = STATE_TRANSFER;
+              // Double check that the whole transfer has completed
+              // and signal that it is done.
+              // These commands only valid if transfer just made
+              // For now it is always the case
+              // Eventually we will need to consider CMD20,28,29,38 though
+              while(!HSMCI->sr.bits.xfrdone);
+              signal HplSam3uHsmci.txDone(SUCCESS);
+            }
+          }
+          return;
+        default:
+          // Notice the return here rather than the break....
+          rsp_buf_ptr = sendCommandDone(EINVAL);
+          return;
+      }
+    }
+    else if(state == STATE_DISCONNECT) {
+      switch(current_cmd) {
+        case CMD7:
+          state = STATE_PROGRAMMING;
+          break;
+        case CMD13:
+          {
+            hsmci_sd_r1_t *r1 = (hsmci_sd_r1_t*)rsp_buf_ptr;
+            if((r1->status & STATUS_DIS) == STATUS_DIS)
+              call HplSam3uHsmci.sendCommand(CMD13, 0);
+          }
+          return;
+        default:
+          // Notice the return here rather than the break....
+          rsp_buf_ptr = sendCommandDone(EINVAL);
+          return;
+      }
+    }
+    else {
+      rsp_buf_ptr = sendCommandDone(EINVAL);
+      return;
+    }
+
+    // Do a buffer swap with the upper layer for the response buffer
+    rsp_buf_ptr = sendCommandDone(SUCCESS);
+  }
+
+  __attribute__((interrupt)) void HsmciIrqHandler() @C() @spontaneous() {
+    call HsmciInterruptWrapper.preamble();
+    handler();
+    call HsmciInterruptWrapper.postamble();
+  }
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/hsmci/SD.nc b/tos/chips/cortex/m3/sam3/u/hsmci/SD.nc
new file mode 100644
index 00000000..f93b416a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/hsmci/SD.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2006, Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Interface for communciating with an SD card via a standard sd card slot.
+ *
+ * @author Steve Ayer
+ * @author Konrad Lorincz
+ * @date May 2006
+ */                      
+
+interface SD {
+  /**
+   * Returns the card size in bytes.
+   *
+   * @return the card size in bytes.
+   */
+  command uint32_t readCardSize();
+
+  /**
+   * Reads 512 bytes from the SD at sector and copies it to bufferPtr
+   *
+   * @param sector the sector on the SD card (in multiples of 512 bytes).
+   * @param bufferPtr pointer to where the SD will copy the data to.  Must be 512 bytes.
+   * @return <code>SUCCESS<code> if it was read successfully; <code>FAIL<code> otherwise
+   */
+  command error_t readBlock(const uint32_t sector, uint8_t * buffer);
+
+  /**
+   * Writes 512 bytes from the bufferPtr to the SD card
+   *
+   * @param sector the sector on the SD card (in multiples of 512 bytes
+   *                       where to write the data to).
+   * @param bufferPtr pointer to data to be added.  Must be 512 bytes.
+   * @return <code>SUCCESS<code> if it was written successfully; <code>FAIL<code> otherwise
+   */
+  command error_t writeBlock(const uint32_t sector, uint8_t * buffer);
+
+  /**
+   * the device has control over the sd card
+   */
+  async event void available();     
+
+  /**
+   * the device has lost control of the sd and should cease 
+   * attempts to talk to the card
+   */
+  async event void unavailable();
+}
diff --git a/tos/chips/cortex/m3/sam3/u/hsmci/SDC.nc b/tos/chips/cortex/m3/sam3/u/hsmci/SDC.nc
new file mode 100644
index 00000000..38e78b0a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/hsmci/SDC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * SD Card Interface Configurations.
+ *
+ * @author Kevin Klues
+ */
+
+configuration SDC {
+  provides {
+    interface StdControl;
+    interface SD;
+  }
+}
+implementation {
+  components SDP;
+  components Sam3uHsmciC;
+  StdControl = SDP;
+  SD = SDP;
+
+  enum {
+    RESOURCE_ID = unique(SAM3U_HSMCI_RESOURCE)
+  };
+  
+  SDP.Sam3uHsmciInit -> Sam3uHsmciC;
+  SDP.Resource -> Sam3uHsmciC.Resource[RESOURCE_ID];
+  SDP.Sam3uHsmci -> Sam3uHsmciC.Sam3uHsmci[RESOURCE_ID];
+
+  components LedsC;
+  SDP.Leds -> LedsC;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/hsmci/SDP.nc b/tos/chips/cortex/m3/sam3/u/hsmci/SDP.nc
new file mode 100644
index 00000000..7190836c
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/hsmci/SDP.nc
@@ -0,0 +1,139 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SD Card Interface Implementation
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+module SDP
+{
+  provides {
+    interface StdControl;
+    interface SD;
+  }
+  uses {
+    interface Resource;
+    interface Sam3uHsmciInit;
+    interface Sam3uHsmci;
+    interface Leds;
+  }
+}
+
+implementation
+{
+  norace int initialized = FALSE;
+  norace volatile bool busy = FALSE;
+  norace error_t trans_error;
+
+  error_t init() {
+    error_t error;
+
+    busy = TRUE;
+    error = call Sam3uHsmciInit.init();
+    if(error == SUCCESS) {
+      while(busy);
+      error = trans_error;
+      signal SD.available();
+    }
+    else {
+      signal SD.unavailable();
+      busy = FALSE;
+    }
+
+    initialized = TRUE;
+    return error;
+  }
+
+  command error_t StdControl.start() {
+    error_t error = call Resource.immediateRequest();
+    if(!initialized)
+      return ecombine(error, init());
+    return error;
+  }
+
+  command error_t StdControl.stop() {
+    return call Resource.release();
+  }
+
+  command uint32_t SD.readCardSize(){
+    return call Sam3uHsmci.readCardSize();
+  }
+
+  command error_t SD.readBlock(uint32_t sector, uint8_t *buffer) {
+    error_t error;
+    if(busy)
+      return EBUSY;
+
+    busy = TRUE;
+    error = call Sam3uHsmci.readBlock(sector, (uint32_t*)buffer);
+    if(error == SUCCESS) {
+      while(busy);
+      error = trans_error;
+    }
+    else busy = FALSE;
+    return error;
+  }
+
+  command error_t SD.writeBlock(uint32_t sector, uint8_t *buffer) {
+    error_t error;
+    if(busy)
+      return EBUSY;
+
+    busy = TRUE;
+    error = call Sam3uHsmci.writeBlock(sector, (uint32_t*)buffer);
+    if(error == SUCCESS) {
+      while(busy);
+      error = trans_error;
+    }
+    else busy = FALSE;
+    return error;
+  }
+
+  async event void Sam3uHsmciInit.initDone(error_t error) {
+    trans_error = error;
+    busy = FALSE;
+  }
+
+  async event void Sam3uHsmci.readBlockDone(uint32_t *buf, error_t error) {
+    trans_error = error;
+    busy = FALSE;
+  }
+
+  async event void Sam3uHsmci.writeBlockDone(uint32_t *buf, error_t error) {
+    trans_error = error;
+    busy = FALSE;
+  }
+
+  event void Resource.granted() {}
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmci.nc b/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmci.nc
new file mode 100644
index 00000000..64c48838
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmci.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * High Speed Multimedia Card Interface definitions.
+ *
+ * @author JeongGil Ko
+ * @author Kevin Klues
+ */
+
+interface Sam3uHsmci {
+  async command uint64_t readCardSize();
+
+  async command error_t readBlock(uint32_t sector, uint32_t *buffer);
+  async event void readBlockDone(uint32_t *buffer, error_t error);     
+
+  async command error_t writeBlock(uint32_t sector, uint32_t *buffer);
+  async event void writeBlockDone(uint32_t *buffer, error_t error);
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmciC.nc b/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmciC.nc
new file mode 100644
index 00000000..d8a61a72
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmciC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * High Speed Multimedia Card Interface Configurations.
+ *
+ * @author JeongGil Ko
+ * @author Kevin Klues
+ */
+
+#include <sam3uhsmcihardware.h>
+
+configuration Sam3uHsmciC {
+  provides {
+    interface Sam3uHsmciInit @exactlyonce();
+    interface Resource[uint8_t];
+    interface Sam3uHsmci[uint8_t];
+  }
+}
+implementation {
+  components Sam3uHsmciP;
+  Sam3uHsmciInit = Sam3uHsmciP;
+  Sam3uHsmci = Sam3uHsmciP;
+  
+  components HplSam3uHsmciC;
+  Sam3uHsmciP.HplSam3uHsmci -> HplSam3uHsmciC;
+  Sam3uHsmciP.ArbiterInfo -> FcfsArbiterC;
+
+  components new FcfsArbiterC(SAM3U_HSMCI_RESOURCE);
+  components new AsyncStdControlPowerManagerC() as PM;
+  Resource = FcfsArbiterC;
+  PM.ResourceDefaultOwner -> FcfsArbiterC;
+  PM.ArbiterInfo -> FcfsArbiterC;
+  PM.AsyncStdControl -> HplSam3uHsmciC;
+
+  components LedsC;
+  Sam3uHsmciP.Leds -> LedsC;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmciInit.nc b/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmciInit.nc
new file mode 100644
index 00000000..add1befa
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmciInit.nc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * High Speed Multimedia Card Interface definitions.
+ *
+ * @author Kevin Klues
+ */
+
+interface Sam3uHsmciInit {
+  command error_t init();
+  async event void initDone(error_t error);
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmciP.nc b/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmciP.nc
new file mode 100644
index 00000000..93983295
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/hsmci/Sam3uHsmciP.nc
@@ -0,0 +1,203 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * High Speed Multimedia Card Interface Implementations.
+ * @author Kevin Klues <kevin.klues@csiro.au>
+ */
+
+#include "sam3uhsmcihardware.h"
+
+module Sam3uHsmciP
+{
+  provides {
+    interface Sam3uHsmciInit @exactlyonce();
+    interface Sam3uHsmci[uint8_t];
+  }
+  uses {
+    interface ArbiterInfo;
+    interface HplSam3uHsmci;
+    interface Leds;
+  }
+}
+
+implementation
+{
+  #define BYTES_PER_BLOCK 512
+  #define WORDS_PER_BLOCK ((BYTES_PER_BLOCK)/4)
+  #define BLOCK_MULTIPLIER (card_type ? 1 : 512)
+  #define CURRENT_OWNER (call ArbiterInfo.userId())
+
+  enum {
+    SD_STANDARD_CAP,
+    SD_HIGHEXT_CAP,
+  };
+
+  enum {
+    S_INACTIVE,
+    S_IDLE,
+    S_BUSY,
+  };
+
+  // Protected by state variables 
+  norace uint8_t state = S_INACTIVE;
+  norace uint32_t rca_addr;
+  norace int card_type = SD_STANDARD_CAP;
+  norace uint64_t card_size = 0;
+  norace uint32_t *trans_buf;
+
+  uint32_t computeV1CardSize(hsmci_sd_r2_t* rsp) {
+    int i,j;
+    uint64_t s = rsp->v1_csd.c_size + 1;
+    for(i=2, j=rsp->v1_csd.c_size_mult + 2; j>1; j--)
+      i <<= 1;
+    s*=i;
+    for(i=2, j=rsp->v1_csd.read_bl_len; j>1; j--)
+      i <<= 1;
+    s*=i;
+    return s;
+  }
+
+  command error_t Sam3uHsmciInit.init() {
+    if(state != S_INACTIVE)
+      return EALREADY;
+    return call HplSam3uHsmci.init(&trans_buf);
+  }
+
+  async event void HplSam3uHsmci.initDone(hsmci_sd_r6_t* rsp, error_t error) {
+    if(error == SUCCESS) {
+      rca_addr = rsp->rca << 16;
+      call HplSam3uHsmci.sendCommand(CMD9, rca_addr);
+    }
+    else
+      signal Sam3uHsmciInit.initDone(error);
+  }
+
+  async command uint64_t Sam3uHsmci.readCardSize[uint8_t id](){
+    if(state != S_INACTIVE)
+      return card_size;
+    return -1;
+  }
+
+  async event void* HplSam3uHsmci.sendCommandDone(uint8_t cmd, void* rsp, error_t error) {
+    if(state == S_INACTIVE) {
+      if(error == SUCCESS) {
+        switch(cmd) {
+          case CMD9:
+          {
+            hsmci_sd_r2_t *r2 = (hsmci_sd_r2_t*)rsp;
+            card_type = r2->csd.csd_structure;
+            if(card_type == SD_HIGHEXT_CAP)
+              card_size = (r2->csd.c_size + 1)*BYTES_PER_BLOCK*1024;
+            else
+              card_size = computeV1CardSize(r2);
+            call HplSam3uHsmci.sendCommand(CMD7, rca_addr);
+            break;
+          }
+          case CMD7:
+            call HplSam3uHsmci.sendCommand(ACMD6, SD_STAT_DATA_BUS_WIDTH_4BIT);
+            break;
+          case ACMD6:
+            call HplSam3uHsmci.sendCommand(CMD16, BYTES_PER_BLOCK);
+            break;
+          case CMD16:
+            state = S_IDLE;
+            signal Sam3uHsmciInit.initDone(SUCCESS);
+            break;
+          default:
+            //Should never get here!!
+        }
+      }
+      else signal Sam3uHsmciInit.initDone(error);
+    }
+    else if(error != SUCCESS) {
+      state = S_IDLE;
+      switch(cmd) {
+        case CMD17:
+          signal Sam3uHsmci.readBlockDone[CURRENT_OWNER](trans_buf, error);
+          break;
+        case CMD24:
+          signal Sam3uHsmci.writeBlockDone[CURRENT_OWNER](trans_buf, error);
+          break;
+        default:
+          //Should never get here!!
+      }
+    }
+    return rsp;
+  }
+
+  async command error_t Sam3uHsmci.readBlock[uint8_t id](uint32_t sector, uint32_t *buffer) {
+    if(CURRENT_OWNER != id)
+      return ERESERVE;
+
+    if(state == S_IDLE) {
+      error_t e;
+      trans_buf = buffer;
+      state = S_BUSY;
+      e = call HplSam3uHsmci.sendCommand(CMD17, sector*BLOCK_MULTIPLIER); 
+      if(e != SUCCESS)
+        state = S_IDLE;
+      return e;
+    }
+    return EBUSY;
+  }
+
+  async command error_t Sam3uHsmci.writeBlock[uint8_t id](uint32_t sector, uint32_t *buffer) {
+    if(CURRENT_OWNER != id)
+      return ERESERVE;
+    
+    if(state == S_IDLE) {
+      error_t e;
+      trans_buf = buffer;
+      state = S_BUSY;
+      e = call HplSam3uHsmci.sendCommand(CMD24, sector*BLOCK_MULTIPLIER); 
+      if(e != SUCCESS)
+        state = S_IDLE;
+      return e;
+    }
+    return EBUSY;
+  }
+
+  async event void HplSam3uHsmci.txDone(error_t error) {
+    state = S_IDLE;
+    signal Sam3uHsmci.writeBlockDone[CURRENT_OWNER](trans_buf, error);
+  }
+
+  async event void HplSam3uHsmci.rxDone(error_t error) {
+    state = S_IDLE;
+    signal Sam3uHsmci.readBlockDone[CURRENT_OWNER](trans_buf, error);
+  }
+
+  async default event void Sam3uHsmci.writeBlockDone[uint8_t id](uint32_t *buf, error_t error) {}
+  async default event void Sam3uHsmci.readBlockDone[uint8_t id](uint32_t *buf, error_t error) {}
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/hsmci/sam3uhsmcihardware.h b/tos/chips/cortex/m3/sam3/u/hsmci/sam3uhsmcihardware.h
new file mode 100644
index 00000000..c60b2ee0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/hsmci/sam3uhsmcihardware.h
@@ -0,0 +1,1081 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * High Speed Multimedia Card Interface register definitions.
+ *
+ * @author JeongGil Ko
+ * @author Kevin Klues
+ */
+
+#ifndef _SAM3UHSMCIHARDWARE_H
+#define _SAM3UHSMCIHARDWARE_H
+
+// Resource definition
+#define SAM3U_HSMCI_RESOURCE "Sam3uHsmci.Resource"
+
+/**
+ *  HSMCI Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 880
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t mcien        :  1;
+    uint8_t hsmcidis     :  1;
+    uint8_t pwsen        :  1;
+    uint8_t pwsdis       :  1;
+    uint8_t reserved0    :  3;
+    uint8_t swrst        :  1;
+    uint8_t reserved1    :  8;
+    uint16_t reserved2   : 16;
+  } __attribute__((__packed__)) bits;
+} hsmci_cr_t;
+
+
+/**
+ *  HSMCI Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 881
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t clkdiv       :  8;
+    uint8_t pwsdiv       :  3;
+    uint8_t rdproof      :  1;
+    uint8_t wrproof      :  1;
+    uint8_t fbyte        :  1;
+    uint8_t padv         :  1;
+    uint8_t reserved0    :  1;
+    uint16_t blklen      : 16;
+  } __attribute__((__packed__)) bits;
+} hsmci_mr_t;
+
+
+/**
+ *  HSMCI Data Timeout Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 883
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t dtocyc       :  4;
+    uint8_t dtomul       :  3;
+    uint8_t reserved0    :  1;
+    uint8_t reserved1    :  8;
+    uint16_t reserved2   : 16;
+  } __attribute__((__packed__)) bits;
+} hsmci_dtor_t;
+
+/**
+ *  HSMCI SDCard/SDIO Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 884
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t sdcsel       :  2;
+    uint8_t reserved0    :  4;
+    uint8_t sdcbus       :  2;
+    uint8_t reserved1    :  8;
+    uint16_t reserved2   : 16;
+  } __attribute__((__packed__)) bits;
+} hsmci_sdcr_t;
+
+/**
+ *  HSMCI Argument Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 885
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t arg   : 32;
+  } __attribute__((__packed__)) bits;
+} hsmci_argr_t;
+
+/**
+ *  HSMCI Command Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 886
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t cmdnb        :  6;
+    uint8_t rsptyp       :  2;
+    uint8_t spcmd        :  3;
+    uint8_t opdcmd       :  1;
+    uint8_t maxlat       :  1;
+    uint8_t reserved0    :  3;
+    uint8_t trcmd        :  2;
+    uint8_t trdir        :  1;
+    uint8_t trtyp        :  3;
+    uint8_t reserved1    :  2;
+    uint8_t iospcmd      :  2;
+    uint8_t atacs        :  1;
+    uint8_t boot_ack     :  1;
+    uint8_t reserved2    :  4;
+  } __attribute__((__packed__)) bits;
+} hsmci_cmdr_t;
+
+/**
+ *  HSMCI Block Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 889
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t bcnt   : 16;
+    uint32_t blklen : 16;
+  } __attribute__((__packed__)) bits;
+} hsmci_blkr_t;
+
+/**
+ *  HSMCI Completion Signal Timeout Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 890
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t cstocyc      :  4;
+    uint8_t cstomul      :  3;
+    uint8_t reserved0    :  1;
+    uint8_t reserved1    :  8;
+    uint16_t reserved2   : 16;
+  } __attribute__((__packed__)) bits;
+} hsmci_cstor_t;
+
+/**
+ *  HSMCI Response Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 891
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t rsp   : 32;
+  } __attribute__((__packed__)) bits;
+} hsmci_rspr_t;
+
+/**
+ *  HSMCI Receive Data Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 892
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t data   : 32;
+  } __attribute__((__packed__)) bits;
+} hsmci_rdr_t;
+
+/**
+ *  HSMCI Transmit Data Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 893
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t data   : 32;
+  } __attribute__((__packed__)) bits;
+} hsmci_tdr_t;
+
+/**
+ *  HSMCI Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 894
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t cmdrdy       :  1;
+    uint8_t rxrdy        :  1;
+    uint8_t txrdy        :  1;
+    uint8_t blke         :  1;
+    uint8_t dtip         :  1;
+    uint8_t notbusy      :  1;
+    uint8_t reserved0    :  2;
+    uint8_t mci_sdioirqa :  1;
+    uint8_t reserved1    :  3;
+    uint8_t sdiowait     :  1;
+    uint8_t csrcv        :  1;
+    uint8_t reserved2    :  2;
+    uint8_t rinde        :  1;
+    uint8_t rdire        :  1;
+    uint8_t rcrce        :  1;
+    uint8_t rende        :  1;
+    uint8_t rtoe         :  1;
+    uint8_t dcrce        :  1;
+    uint8_t dtoe         :  1;
+    uint8_t cstoe        :  1;
+    uint8_t blkovre      :  1;
+    uint8_t dmadone      :  1;
+    uint8_t fifoempty    :  1;
+    uint8_t xfrdone      :  1;
+    uint8_t ackrcv       :  1;
+    uint8_t ackrcve      :  1;
+    uint8_t ovre         :  1;
+    uint8_t unre         :  1;
+  } __attribute__((__packed__)) bits;
+} hsmci_sr_t;
+
+/**
+ *  HSMCI Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 898
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t cmdrdy       :  1;
+    uint8_t rxrdy        :  1;
+    uint8_t txrdy        :  1;
+    uint8_t blke         :  1;
+    uint8_t dtip         :  1;
+    uint8_t notbusy      :  1;
+    uint8_t reserved0    :  2;
+    uint8_t mci_sdioirqa :  1;
+    uint8_t reserved1    :  3;
+    uint8_t sdiowait     :  1;
+    uint8_t csrcv        :  1;
+    uint8_t reserved2    :  2;
+    uint8_t rinde        :  1;
+    uint8_t rdire        :  1;
+    uint8_t rcrce        :  1;
+    uint8_t rende        :  1;
+    uint8_t rtoe         :  1;
+    uint8_t dcrce        :  1;
+    uint8_t dtoe         :  1;
+    uint8_t cstoe        :  1;
+    uint8_t blkovre      :  1;
+    uint8_t dmadone      :  1;
+    uint8_t fifoempty    :  1;
+    uint8_t xfrdone      :  1;
+    uint8_t ackrcv       :  1;
+    uint8_t ackrcve      :  1;
+    uint8_t ovre         :  1;
+    uint8_t unre         :  1;
+  } __attribute__((__packed__)) bits;
+} hsmci_ier_t;
+
+/**
+ *  HSMCI Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 900
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t cmdrdy       :  1;
+    uint8_t rxrdy        :  1;
+    uint8_t txrdy        :  1;
+    uint8_t blke         :  1;
+    uint8_t dtip         :  1;
+    uint8_t notbusy      :  1;
+    uint8_t reserved0    :  2;
+    uint8_t mci_sdioirqa :  1;
+    uint8_t reserved1    :  3;
+    uint8_t sdiowait     :  1;
+    uint8_t csrcv        :  1;
+    uint8_t reserved2    :  2;
+    uint8_t rinde        :  1;
+    uint8_t rdire        :  1;
+    uint8_t rcrce        :  1;
+    uint8_t rende        :  1;
+    uint8_t rtoe         :  1;
+    uint8_t dcrce        :  1;
+    uint8_t dtoe         :  1;
+    uint8_t cstoe        :  1;
+    uint8_t blkovre      :  1;
+    uint8_t dmadone      :  1;
+    uint8_t fifoempty    :  1;
+    uint8_t xfrdone      :  1;
+    uint8_t ackrcv       :  1;
+    uint8_t ackrcve      :  1;
+    uint8_t ovre         :  1;
+    uint8_t unre         :  1;
+  } __attribute__((__packed__)) bits;
+} hsmci_idr_t;
+
+/**
+ *  HSMCI Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 902
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t cmdrdy       :  1;
+    uint8_t rxrdy        :  1;
+    uint8_t txrdy        :  1;
+    uint8_t blke         :  1;
+    uint8_t dtip         :  1;
+    uint8_t notbusy      :  1;
+    uint8_t reserved0    :  2;
+    uint8_t mci_sdioirqa :  1;
+    uint8_t reserved1    :  3;
+    uint8_t sdiowait     :  1;
+    uint8_t csrcv        :  1;
+    uint8_t reserved2    :  2;
+    uint8_t rinde        :  1;
+    uint8_t rdire        :  1;
+    uint8_t rcrce        :  1;
+    uint8_t rende        :  1;
+    uint8_t rtoe         :  1;
+    uint8_t dcrce        :  1;
+    uint8_t dtoe         :  1;
+    uint8_t cstoe        :  1;
+    uint8_t blkovre      :  1;
+    uint8_t dmadone      :  1;
+    uint8_t fifoempty    :  1;
+    uint8_t xfrdone      :  1;
+    uint8_t ackrcv       :  1;
+    uint8_t ackrcve      :  1;
+    uint8_t ovre         :  1;
+    uint8_t unre         :  1;
+  } __attribute__((__packed__)) bits;
+} hsmci_imr_t;
+
+/**
+ *  HSMCI DMA Configuration Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 904
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t offset       :  2;
+    uint8_t reserved0    :  2;
+    uint8_t chksize      :  1;
+    uint8_t reserved1    :  3;
+    uint8_t dmaen        :  1;
+    uint8_t reserved2    :  3;
+    uint8_t ropt         :  1;
+    uint8_t reserved3    :  3;
+    uint16_t reserved4   : 16;
+  } __attribute__((__packed__)) bits;
+} hsmci_dma_t;
+
+/**
+ *  HSMCI Configuration Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 905
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t fifomode     :  1;
+    uint8_t reserved0    :  3;
+    uint8_t ferrctrl     :  1;
+    uint8_t reserved1    :  3;
+    uint8_t hsmode       :  1;
+    uint8_t reserved2    :  3;
+    uint8_t lsync        :  1;
+    uint8_t reserved3    :  3;
+    uint16_t reserved4   : 16;
+  } __attribute__((__packed__)) bits;
+} hsmci_cfg_t;
+
+/**
+ *  HSMCI Write Protection Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 906
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t wp_en        :  1;
+    uint8_t reserved0    :  7;
+    uint32_t wp_key      : 24;
+  } __attribute__((__packed__)) bits;
+} hsmci_wpmr_t;
+
+/**
+ *  HSMCI Write Protect Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 907
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t wp_vs        :  4;
+    uint8_t reserved0    :  4;
+    uint16_t wp_key      : 16;
+    uint8_t reserved1    :  8;
+  } __attribute__((__packed__)) bits;
+} hsmci_wpsr_t;
+
+/**
+ *  HSMCI FIFO Memory Aperture, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 908
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t data       : 32;
+  } __attribute__((__packed__)) bits;
+} hsmci_fifo_t;
+
+/**
+ * HSMCI Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary, p. 879
+ */
+typedef struct hsmci
+{
+  volatile hsmci_cr_t cr;        // Control Register
+  volatile hsmci_mr_t mr;        // Mode Register
+  volatile hsmci_dtor_t dtor;    // Data Timeout Register
+  volatile hsmci_sdcr_t sdcr;    // SD/SDIO Card Register
+  volatile hsmci_argr_t argr;    // Argument Register
+  volatile hsmci_cmdr_t cmdr;    // Command Register
+  volatile hsmci_blkr_t blkr;    // Block Register
+  volatile hsmci_cstor_t cstor;  // Completion Signal Timeout Register
+  volatile hsmci_rspr_t rspr[4]; // Response Registers
+  volatile hsmci_rdr_t rdr;      // Receive Data Register
+  volatile hsmci_tdr_t tdr;      // Transmit Data Register
+  uint32_t reserved0[2];         // ***Reserved***
+  volatile hsmci_sr_t sr;        // Status Register
+  volatile hsmci_ier_t ier;      // Interrupt Enable Register
+  volatile hsmci_idr_t idr;      // Interrupt Disable Register
+  volatile hsmci_imr_t imr;      // Interrupt Mask Register
+  volatile hsmci_dma_t dma;      // DMA Configuration Register
+  volatile hsmci_cfg_t cfg;      // Configuration Register
+  uint32_t reserved1[3];         // ***Reserved***
+  volatile hsmci_wpmr_t wpmr;    // Write Protection Mode Register
+  volatile hsmci_wpsr_t wpsr;    // Write Portection Status Register
+  uint32_t reserved2[5];         // ***Reserved***
+} hsmci_t;
+
+/**
+ * Memory mapping for the HSMCI controller
+ */
+volatile hsmci_t* HSMCI = (volatile hsmci_t *) 0x40000000;
+volatile hsmci_fifo_t* hsmci_fifo = (volatile hsmci_fifo_t *) 0x40000200;
+
+enum {
+  CMD_PON,
+  CMD0,
+  CMD2,
+  CMD3,
+  CMD4,
+  CMD6,
+  CMD7,
+  CMD8,
+  CMD9,
+  CMD10,
+  CMD12,
+  CMD13,
+  CMD15,
+  CMD16,
+  CMD17,
+  CMD18,
+  CMD19,
+  CMD20,
+  CMD24,
+  CMD25,
+  CMD26,
+  CMD27,
+  CMD28,
+  CMD29,
+  CMD30,
+  CMD32,
+  CMD33,
+  CMD38,
+  CMD42,
+  CMD56R,
+  CMD56W,
+  ACMD6,
+  ACMD6_REAL,
+  ACMD13,
+  ACMD13_REAL,
+  ACMD22,
+  ACMD22_REAL,
+  ACMD23,
+  ACMD23_REAL,
+  ACMD41,
+  ACMD41_REAL,
+  ACMD42,
+  ACMD42_REAL,
+  ACMD51,
+  ACMD51_REAL,
+};
+
+#define AT91C_MCI_CMDNB                      (0x3F <<  0) // (MCI) Command Number
+#define AT91C_MCI_RSPTYP                     (0x3 <<  6)  // (MCI) Response Type
+#define AT91C_MCI_RSPTYP_NO                  (0x0 <<  6)  // (MCI) No response
+#define AT91C_MCI_RSPTYP_48                  (0x1 <<  6)  // (MCI) 48-bit response
+#define AT91C_MCI_RSPTYP_136                 (0x2 <<  6)  // (MCI) 136-bit response
+#define AT91C_MCI_RSPTYP_R1B                 (0x3 <<  6)  // (MCI) R1b response
+#define AT91C_MCI_SPCMD                      (0x7 <<  8)  // (MCI) Special CMD
+#define AT91C_MCI_SPCMD_NONE                 (0x0 <<  8)  // (MCI) Not a special CMD
+#define AT91C_MCI_SPCMD_INIT                 (0x1 <<  8)  // (MCI) Initialization CMD
+#define AT91C_MCI_SPCMD_SYNC                 (0x2 <<  8)  // (MCI) Synchronized CMD
+#define AT91C_MCI_SPCMD_CE_ATA               (0x3 <<  8)  // (MCI) CE-ATA Completion Signal disable CMD
+#define AT91C_MCI_SPCMD_IT_CMD               (0x4 <<  8)  // (MCI) Interrupt command
+#define AT91C_MCI_SPCMD_IT_REP               (0x5 <<  8)  // (MCI) Interrupt response
+#define AT91C_MCI_OPDCMD                     (0x1 << 11)  // (MCI) Open Drain Command
+#define AT91C_MCI_OPDCMD_PUSHPULL            (0x0 << 11)  // (MCI) Push/pull command
+#define AT91C_MCI_OPDCMD_OPENDRAIN           (0x1 << 11)  // (MCI) Open drain command
+#define AT91C_MCI_MAXLAT                     (0x1 << 12)  // (MCI) Maximum Latency for Command to respond
+#define AT91C_MCI_MAXLAT_5                   (0x0 << 12)  // (MCI) 5 cycles maximum latency
+#define AT91C_MCI_MAXLAT_64                  (0x1 << 12)  // (MCI) 64 cycles maximum latency
+#define AT91C_MCI_TRCMD                      (0x3 << 16)  // (MCI) Transfer CMD
+#define AT91C_MCI_TRCMD_NO                   (0x0 << 16)  // (MCI) No transfer
+#define AT91C_MCI_TRCMD_START                (0x1 << 16)  // (MCI) Start transfer
+#define AT91C_MCI_TRCMD_STOP                 (0x2 << 16)  // (MCI) Stop transfer
+#define AT91C_MCI_TRDIR                      (0x1 << 18)  // (MCI) Transfer Direction
+#define AT91C_MCI_TRDIR_WRITE                (0x0 << 18)  // (MCI) Write
+#define AT91C_MCI_TRDIR_READ                 (0x1 << 18)  // (MCI) Read
+#define AT91C_MCI_TRTYP                      (0x7 << 19)  // (MCI) Transfer Type
+#define AT91C_MCI_TRTYP_BLOCK                (0x0 << 19)  // (MCI) MMC/SDCard Single Block Transfer type
+#define AT91C_MCI_TRTYP_MULTIPLE             (0x1 << 19)  // (MCI) MMC/SDCard Multiple Block transfer type
+#define AT91C_MCI_TRTYP_STREAM               (0x2 << 19)  // (MCI) MMC Stream transfer type
+#define AT91C_MCI_TRTYP_SDIO_BYTE            (0x4 << 19)  // (MCI) SDIO Byte transfer type
+#define AT91C_MCI_TRTYP_SDIO_BLOCK           (0x5 << 19)  // (MCI) SDIO Block transfer type
+#define AT91C_MCI_IOSPCMD                    (0x3 << 24)  // (MCI) SDIO Special Command
+#define AT91C_MCI_IOSPCMD_NONE               (0x0 << 24)  // (MCI) NOT a special command
+#define AT91C_MCI_IOSPCMD_SUSPEND            (0x1 << 24)  // (MCI) SDIO Suspend Command
+#define AT91C_MCI_IOSPCMD_RESUME             (0x2 << 24)  // (MCI) SDIO Resume Command
+#define AT91C_MCI_ATACS                      (0x1 << 26)  // (MCI) ATA with command completion signal
+#define AT91C_MCI_ATACS_NORMAL               (0x0 << 26)  // (MCI) normal operation mode
+#define AT91C_MCI_ATACS_COMPLETION           (0x1 << 26)  // (MCI) completion 
+
+//-----------------------------------------------------------------------------
+/// OCR Register
+//-----------------------------------------------------------------------------
+#define AT91C_VDD_16_17          (1 << 4)
+#define AT91C_VDD_17_18          (1 << 5)
+#define AT91C_VDD_18_19          (1 << 6)
+#define AT91C_VDD_19_20          (1 << 7)
+#define AT91C_VDD_20_21          (1 << 8)
+#define AT91C_VDD_21_22          (1 << 9)
+#define AT91C_VDD_22_23          (1 << 10)
+#define AT91C_VDD_23_24          (1 << 11)
+#define AT91C_VDD_24_25          (1 << 12)
+#define AT91C_VDD_25_26          (1 << 13)
+#define AT91C_VDD_26_27          (1 << 14)
+#define AT91C_VDD_27_28          (1 << 15)
+#define AT91C_VDD_28_29          (1 << 16)
+#define AT91C_VDD_29_30          (1 << 17)
+#define AT91C_VDD_30_31          (1 << 18)
+#define AT91C_VDD_31_32          (1 << 19)
+#define AT91C_VDD_32_33          (1 << 20)
+#define AT91C_VDD_33_34          (1 << 21)
+#define AT91C_VDD_34_35          (1 << 22)
+#define AT91C_VDD_35_36          (1 << 23)
+#define AT91C_CARD_POWER_UP_BUSY (1 << 31)
+#define AT91C_MMC_OCR_BIT2930    (3 << 29)
+
+#define AT91C_MMC_HOST_VOLTAGE_RANGE     (AT91C_VDD_27_28 +\
+                                          AT91C_VDD_28_29 +\
+                                          AT91C_VDD_29_30 +\
+                                          AT91C_VDD_30_31 +\
+                                          AT91C_VDD_31_32 +\
+                                          AT91C_VDD_32_33)
+
+// Basic Commands (class 0)
+//
+// Cmd0 MCI + SPI
+#define   AT91C_POWER_ON_INIT         (0 | AT91C_MCI_TRCMD_NO \
+				         | AT91C_MCI_SPCMD_INIT \
+				         | AT91C_MCI_OPDCMD)
+
+#define   AT91C_GO_IDLE_STATE_CMD     (0 | AT91C_MCI_TRCMD_NO \
+                                         | AT91C_MCI_SPCMD_NONE )
+// Cmd1 SPI
+#define   AT91C_MMC_SEND_OP_COND_CMD  (1 | AT91C_MCI_TRCMD_NO \
+                                         | AT91C_MCI_SPCMD_NONE \
+                                         | AT91C_MCI_RSPTYP_48 \
+                                         | AT91C_MCI_OPDCMD)
+// Cmd2 MCI
+#define   AT91C_ALL_SEND_CID_CMD      (2 | AT91C_MCI_TRCMD_NO \
+                                         | AT91C_MCI_SPCMD_NONE \
+                                         | AT91C_MCI_RSPTYP_136 )
+// Cmd3 MCI
+#define   AT91C_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO \
+                                         | AT91C_MCI_SPCMD_NONE \
+                                         | AT91C_MCI_RSPTYP_48 \
+                                         | AT91C_MCI_MAXLAT )
+// Cmd4 MCI
+#define AT91C_SET_DSR_CMD             (4 | AT91C_MCI_TRCMD_NO \
+                                         | AT91C_MCI_SPCMD_NONE \
+                                         | AT91C_MCI_RSPTYP_NO \
+                                         | AT91C_MCI_MAXLAT )
+// Cmd6 SD/MMC
+#define AT91C_MMC_SWITCH_CMD          (6 | AT91C_MCI_TRCMD_NO \
+                                         | AT91C_MCI_SPCMD_NONE \
+                                         | AT91C_MCI_RSPTYP_48 \
+                                         | AT91C_MCI_MAXLAT )
+
+#define AT91C_SD_SWITCH_CMD           (6 | AT91C_MCI_TRCMD_START \
+                                         | AT91C_MCI_TRTYP_BLOCK \
+                                         | AT91C_MCI_TRDIR_READ \
+                                         | AT91C_MCI_SPCMD_NONE \
+                                         | AT91C_MCI_RSPTYP_48 \
+                                         | AT91C_MCI_MAXLAT )
+// cmd7 MCI
+#define   AT91C_SEL_DESEL_CARD_CMD    (7 | AT91C_MCI_TRCMD_NO \
+                                         | AT91C_MCI_SPCMD_NONE \
+                                         | AT91C_MCI_RSPTYP_48 \
+                                         | AT91C_MCI_MAXLAT )
+#define   AT91C_SEL_CARD_CMD          (7 | AT91C_MCI_TRCMD_NO \
+                                         | AT91C_MCI_SPCMD_NONE \
+                                         | AT91C_MCI_RSPTYP_48 \
+                                         | AT91C_MCI_MAXLAT )
+#define   AT91C_DESEL_CARD_CMD        (7 | AT91C_MCI_TRCMD_NO \
+                                         | AT91C_MCI_SPCMD_NONE \
+                                         | AT91C_MCI_RSPTYP_NO \
+                                         | AT91C_MCI_MAXLAT )
+// Cmd8 MCI + SPI
+#define   AT91C_SEND_IF_COND          (8  | AT91C_MCI_TRCMD_NO \
+                                          | AT91C_MCI_SPCMD_NONE \
+                                          | AT91C_MCI_RSPTYP_48 \
+                                          | AT91C_MCI_MAXLAT )
+// Cmd9 MCI + SPI
+#define   AT91C_SEND_CSD_CMD          (9  | AT91C_MCI_TRCMD_NO \
+                                          | AT91C_MCI_SPCMD_NONE \
+                                          | AT91C_MCI_RSPTYP_136 \
+                                          | AT91C_MCI_MAXLAT )
+// Cmd10 MCI + SPI
+#define   AT91C_SEND_CID_CMD          (10 | AT91C_MCI_TRCMD_NO \
+                                          | AT91C_MCI_SPCMD_NONE \
+                                          | AT91C_MCI_RSPTYP_136 \
+                                          | AT91C_MCI_MAXLAT )
+// Cmd12 MCI + SPI
+#define   AT91C_STOP_TRANSMISSION_CMD (12 | AT91C_MCI_TRCMD_STOP \
+                                          | AT91C_MCI_SPCMD_NONE \
+                                          | AT91C_MCI_RSPTYP_48 \
+                                          | AT91C_MCI_MAXLAT )
+
+// Cmd13 MCI + SPI
+#define   AT91C_SEND_STATUS_CMD       (13 | AT91C_MCI_TRCMD_NO \
+                                          | AT91C_MCI_SPCMD_NONE \
+                                          | AT91C_MCI_RSPTYP_48 \
+                                          | AT91C_MCI_MAXLAT )
+// Cmd15 MCI
+#define AT91C_GO_INACTIVE_STATE_CMD   (15 | AT91C_MCI_RSPTYP_NO )
+
+// Cmd58 SPI
+#define   AT91C_READ_OCR_CMD          (58 | AT91C_MCI_RSPTYP_48 \
+                                          | AT91C_MCI_SPCMD_NONE \
+                                          | AT91C_MCI_MAXLAT )
+// Cmd59 SPI
+#define   AT91C_CRC_ON_OFF_CMD        (59 | AT91C_MCI_RSPTYP_48 \
+                                          | AT91C_MCI_SPCMD_NONE \
+                                          | AT91C_MCI_MAXLAT )
+
+//*------------------------------------------------
+//* Class 2 commands: Block oriented Read commands
+//*------------------------------------------------
+
+// Cmd8 for MMC
+#define AT91C_SEND_EXT_CSD_CMD          (8 | AT91C_MCI_SPCMD_NONE \
+                                           | AT91C_MCI_OPDCMD_PUSHPULL \
+                                           | AT91C_MCI_RSPTYP_48 \
+                                           | AT91C_MCI_TRCMD_START \
+                                           | AT91C_MCI_TRTYP_BLOCK \
+                                           | AT91C_MCI_TRDIR \
+                                           | AT91C_MCI_MAXLAT)
+
+// Cmd16
+#define AT91C_SET_BLOCKLEN_CMD          (16 | AT91C_MCI_TRCMD_NO \
+                                            | AT91C_MCI_SPCMD_NONE \
+                                            | AT91C_MCI_RSPTYP_48 \
+                                            | AT91C_MCI_MAXLAT )
+// Cmd17
+#define AT91C_READ_SINGLE_BLOCK_CMD     (17 | AT91C_MCI_SPCMD_NONE \
+                                            | AT91C_MCI_RSPTYP_48 \
+                                            | AT91C_MCI_TRCMD_START \
+                                            | AT91C_MCI_TRTYP_BLOCK \
+                                            | AT91C_MCI_TRDIR \
+                                            | AT91C_MCI_MAXLAT)
+// Cmd18
+#define AT91C_READ_MULTIPLE_BLOCK_CMD   (18 | AT91C_MCI_SPCMD_NONE \
+                                            | AT91C_MCI_RSPTYP_48 \
+                                            | AT91C_MCI_TRCMD_START \
+                                            | AT91C_MCI_TRTYP_MULTIPLE \
+                                            | AT91C_MCI_TRDIR \
+                                            | AT91C_MCI_MAXLAT)
+
+//*------------------------------------------------
+//* Class 4 commands: Block oriented write commands
+//*------------------------------------------------
+// Cmd24
+#define AT91C_WRITE_BLOCK_CMD           (24 | AT91C_MCI_SPCMD_NONE \
+                                            | AT91C_MCI_RSPTYP_48 \
+                                            | AT91C_MCI_TRCMD_START \
+                                            | (AT91C_MCI_TRTYP_BLOCK \
+                                                & ~(AT91C_MCI_TRDIR)) \
+                                            | AT91C_MCI_MAXLAT)
+// Cmd25
+#define AT91C_WRITE_MULTIPLE_BLOCK_CMD  (25 | AT91C_MCI_SPCMD_NONE \
+                                            | AT91C_MCI_RSPTYP_48 \
+                                            | AT91C_MCI_TRCMD_START \
+                                            | (AT91C_MCI_TRTYP_MULTIPLE \
+                                                & ~(AT91C_MCI_TRDIR)) \
+                                            | AT91C_MCI_MAXLAT)
+// Cmd27
+#define AT91C_PROGRAM_CSD_CMD            (27 | AT91C_MCI_RSPTYP_48 )
+
+//*----------------------------------------
+//* Class 5 commands: Erase commands
+//*----------------------------------------
+// Cmd32
+#define AT91C_TAG_SECTOR_START_CMD          (32 | AT91C_MCI_SPCMD_NONE \
+                                                | AT91C_MCI_RSPTYP_48 \
+                                                | AT91C_MCI_TRCMD_NO \
+                                                | AT91C_MCI_MAXLAT)
+// Cmd33
+#define AT91C_TAG_SECTOR_END_CMD            (33 | AT91C_MCI_SPCMD_NONE \
+                                                | AT91C_MCI_RSPTYP_48 \
+                                                | AT91C_MCI_TRCMD_NO \
+                                                | AT91C_MCI_MAXLAT)
+// Cmd38
+#define AT91C_ERASE_CMD                     (38 | AT91C_MCI_SPCMD_NONE \
+                                                | AT91C_MCI_RSPTYP_48 \
+                                                | AT91C_MCI_TRCMD_NO \
+                                                | AT91C_MCI_MAXLAT )
+
+//*---------------------------------------- 
+//* Class 7 commands: Lock commands 
+//*---------------------------------------- 
+// Cmd42 
+#define AT91C_LOCK_UNLOCK           (42 | AT91C_MCI_SPCMD_NONE \
+                                        | AT91C_MCI_RSPTYP_48 \
+                                        | AT91C_MCI_TRCMD_NO \
+                                        | AT91C_MCI_MAXLAT)
+
+//*-----------------------------------------------
+// Class 8 commands: Application specific commands
+//*-----------------------------------------------
+// Cmd55
+#define AT91C_APP_CMD               (55 | AT91C_MCI_SPCMD_NONE \
+                                        | AT91C_MCI_RSPTYP_48 \
+                                        | AT91C_MCI_TRCMD_NO \
+                                        | AT91C_MCI_MAXLAT)
+// Cmd56
+#define AT91C_GEN_CMD               (56 | AT91C_MCI_SPCMD_NONE \
+                                        | AT91C_MCI_RSPTYP_48 \
+                                        | AT91C_MCI_TRCMD_NO \
+                                        | AT91C_MCI_MAXLAT)
+// ACMD6
+#define AT91C_SD_SET_BUS_WIDTH_CMD          (6  | AT91C_MCI_SPCMD_NONE \
+                                                | AT91C_MCI_RSPTYP_48 \
+                                                | AT91C_MCI_TRCMD_NO \
+                                                | AT91C_MCI_MAXLAT)
+// ACMD13
+#define AT91C_SD_STATUS_CMD                 (13 | AT91C_MCI_SPCMD_NONE \
+                                                | AT91C_MCI_RSPTYP_48 \
+                                                | AT91C_MCI_TRCMD_START \
+                                                | AT91C_MCI_TRTYP_BLOCK \
+                                                | AT91C_MCI_TRDIR_READ \
+                                                | AT91C_MCI_MAXLAT)
+// ACMD22
+#define AT91C_SD_SEND_NUM_WR_BLOCKS_CMD     (22 | AT91C_MCI_SPCMD_NONE \
+                                                | AT91C_MCI_RSPTYP_48 \
+                                                | AT91C_MCI_TRCMD_NO \
+                                                | AT91C_MCI_MAXLAT)
+// ACMD23
+#define AT91C_SD_SET_WR_BLK_ERASE_COUNT_CMD (23 | AT91C_MCI_SPCMD_NONE \
+                                                | AT91C_MCI_RSPTYP_48 \
+                                                | AT91C_MCI_TRCMD_NO \
+                                                | AT91C_MCI_MAXLAT)
+// ACMD41
+#define AT91C_SD_APP_OP_COND_CMD            (41 | AT91C_MCI_SPCMD_NONE \
+                                                | AT91C_MCI_RSPTYP_48 \
+                                                | AT91C_MCI_TRCMD_NO )
+// ACMD42
+#define AT91C_SD_SET_CLR_CARD_DETECT_CMD    (42 | AT91C_MCI_SPCMD_NONE \
+                                                | AT91C_MCI_RSPTYP_48 \
+                                                | AT91C_MCI_TRCMD_NO \
+                                                | AT91C_MCI_MAXLAT)
+// ACMD51
+#define AT91C_SD_SEND_SCR_CMD               (51 | AT91C_MCI_SPCMD_NONE \
+                                                | AT91C_MCI_RSPTYP_48 \
+                                                | AT91C_MCI_TRCMD_START \
+                                                | AT91C_MCI_TRDIR_READ \
+                                                | AT91C_MCI_TRTYP_BLOCK \
+                                                | AT91C_MCI_MAXLAT)
+
+//*-----------------------------------------------
+// SDIO Commands
+//*-----------------------------------------------
+// CMD5, R4
+#define AT91C_SDIO_SEND_OP_COND (5 | AT91C_MCI_TRCMD_NO \
+                                   | AT91C_MCI_SPCMD_NONE \
+                                   | AT91C_MCI_RSPTYP_48 \
+                                   | AT91C_MCI_OPDCMD)
+
+// CMD52, R5
+#define AT91C_SDIO_IO_RW_DIRECT (52| AT91C_MCI_TRCMD_NO \
+                                   | AT91C_MCI_SPCMD_NONE \
+
+//*-----------------------------------------------
+// Constants
+//*-----------------------------------------------
+#define SD_STAT_DATA_BUS_WIDTH_4BIT      0x2
+#define SD_STAT_DATA_BUS_WIDTH_1BIT      0x0
+
+#define STATUS_APP_CMD           (1 << 5)
+#define STATUS_SWITCH_ERROR      (1 << 7)
+#define STATUS_READY_FOR_DATA    (1 << 8)
+#define STATUS_IDLE              (0 << 9)
+#define STATUS_READY             (1 << 9)
+#define STATUS_IDENT             (2 << 9)
+#define STATUS_STBY              (3 << 9)
+#define STATUS_TRAN              (4 << 9)
+#define STATUS_DATA              (5 << 9)
+#define STATUS_RCV               (6 << 9)
+#define STATUS_PRG               (7 << 9)
+#define STATUS_DIS               (8 << 9)
+#define STATUS_STATE             (0xF << 9)
+#define STATUS_ERASE_RESET       (1 << 13)
+#define STATUS_WP_ERASE_SKIP     (1 << 15)
+#define STATUS_CIDCSD_OVERWRITE  (1 << 16)
+#define STATUS_OVERRUN           (1 << 17)
+#define STATUS_UNERRUN           (1 << 18)
+#define STATUS_ERROR             (1 << 19)
+#define STATUS_CC_ERROR          (1 << 20)
+#define STATUS_CARD_ECC_FAILED   (1 << 21)
+#define STATUS_ILLEGAL_COMMAND   (1 << 22)
+#define STATUS_COM_CRC_ERROR     (1 << 23)
+#define STATUS_UN_LOCK_FAILED    (1 << 24)
+#define STATUS_CARD_IS_LOCKED    (1 << 25)
+#define STATUS_WP_VIOLATION      (1 << 26)
+#define STATUS_ERASE_PARAM       (1 << 27)
+#define STATUS_ERASE_SEQ_ERROR   (1 << 28)
+#define STATUS_BLOCK_LEN_ERROR   (1 << 29)
+#define STATUS_ADDRESS_MISALIGN  (1 << 30)
+#define STATUS_ADDR_OUT_OR_RANGE (1 << 31)
+
+#define STATUS_STOP ( STATUS_CARD_IS_LOCKED \
+                        | STATUS_COM_CRC_ERROR \
+                        | STATUS_ILLEGAL_COMMAND \
+                        | STATUS_CC_ERROR \
+                        | STATUS_ERROR \
+                        | STATUS_STATE \
+                        | STATUS_READY_FOR_DATA )
+
+#define STATUS_WRITE ( STATUS_ADDR_OUT_OR_RANGE \
+                        | STATUS_ADDRESS_MISALIGN \
+                        | STATUS_BLOCK_LEN_ERROR \
+                        | STATUS_WP_VIOLATION \
+                        | STATUS_CARD_IS_LOCKED \
+                        | STATUS_COM_CRC_ERROR \
+                        | STATUS_ILLEGAL_COMMAND \
+                        | STATUS_CC_ERROR \
+                        | STATUS_ERROR \
+                        | STATUS_ERASE_RESET \
+                        | STATUS_STATE \
+                        | STATUS_READY_FOR_DATA )
+
+#define STATUS_READ  ( STATUS_ADDR_OUT_OR_RANGE \
+                        | STATUS_ADDRESS_MISALIGN \
+                        | STATUS_BLOCK_LEN_ERROR \
+                        | STATUS_CARD_IS_LOCKED \
+                        | STATUS_COM_CRC_ERROR \
+                        | STATUS_ILLEGAL_COMMAND \
+                        | STATUS_CARD_ECC_FAILED \
+                        | STATUS_CC_ERROR \
+                        | STATUS_ERROR \
+                        | STATUS_ERASE_RESET \
+                        | STATUS_STATE \
+                        | STATUS_READY_FOR_DATA )
+
+#define STATUS_SD_SWITCH ( STATUS_ADDR_OUT_OR_RANGE \
+                            | STATUS_CARD_IS_LOCKED \
+                            | STATUS_COM_CRC_ERROR \
+                            | STATUS_ILLEGAL_COMMAND \
+                            | STATUS_CARD_ECC_FAILED \
+                            | STATUS_CC_ERROR \
+                            | STATUS_ERROR \
+                            | STATUS_UNERRUN \
+                            | STATUS_OVERRUN \
+                            | STATUS_STATE)
+
+#define STATUS_MMC_SWITCH ( STATUS_CARD_IS_LOCKED \
+                            | STATUS_COM_CRC_ERROR \
+                            | STATUS_ILLEGAL_COMMAND \
+                            | STATUS_CC_ERROR \
+                            | STATUS_ERROR \
+                            | STATUS_ERASE_RESET \
+                            | STATUS_STATE \
+                            | STATUS_READY_FOR_DATA \
+                            | STATUS_SWITCH_ERROR )
+
+//*-----------------------------------------------
+// Return Types
+//*-----------------------------------------------
+typedef struct hsmci_sd_r1 {
+  uint32_t status : 32;
+  uint32_t cmd_index   :  6;
+} __attribute__((__packed__)) hsmci_sd_r1_t;
+
+typedef struct hsmci_sd_r2 {
+  union {
+    struct {
+      uint32_t reserved0 : 1;
+      uint32_t crc7      : 7;
+      uint32_t mdt       : 12;
+      uint32_t reserved1 : 4;
+      uint32_t psn       : 32;
+      uint32_t prv       : 8;
+      uint64_t pnm       : 40;
+      uint32_t oid       : 16;
+      uint32_t mid       : 8;
+    } __attribute__((__packed__)) cid;
+    struct {
+      uint32_t reserved6          : 1;
+      uint32_t crc                : 7;
+      uint32_t reserved5          : 2;
+      uint32_t file_format        : 2;
+      uint32_t tmp_write_protect  : 1;
+      uint32_t perm_write_protect : 1;
+      uint32_t copy               : 1;
+      uint32_t file_format_grp    : 1;
+      uint32_t reserved4          : 5;
+      uint32_t write_bl_partial   : 1;
+      uint32_t write_bl_len       : 4;
+      uint32_t r2w_factor         : 3;
+      uint32_t reserved3          : 2;
+      uint32_t wp_grp_enable      : 1;
+      uint32_t wp_grp_size        : 7;
+      uint32_t sector_size        : 7;
+      uint32_t erase_blk_en       : 1;
+      uint32_t c_size_mult        : 3;
+      uint32_t vdd_w_curr_max     : 3;
+      uint32_t vdd_w_curr_min     : 3;
+      uint32_t vdd_r_curr_max     : 3;
+      uint32_t vdd_r_curr_min     : 3;
+      uint32_t c_size             : 12;
+      uint32_t reserved1          : 2;
+      uint32_t dsr_imp            : 1;
+      uint32_t read_blk_misalign  : 1;
+      uint32_t write_blk_misalign : 1;
+      uint32_t read_bl_partial    : 1;
+      uint32_t read_bl_len        : 4;
+      uint32_t ccc                : 12;
+      uint32_t tran_speed         : 8;
+      uint32_t nsac               : 8;
+      uint32_t taac               : 8;
+      uint32_t reserved0          : 6;
+      uint32_t csd_structure      : 2;
+    } __attribute__((__packed__)) v1_csd;
+    struct {
+      uint32_t reserved6          : 1;
+      uint32_t crc                : 7;
+      uint32_t reserved5          : 2;
+      uint32_t file_format        : 2;
+      uint32_t tmp_write_protect  : 1;
+      uint32_t perm_write_protect : 1;
+      uint32_t copy               : 1;
+      uint32_t file_format_grp    : 1;
+      uint32_t reserved4          : 5;
+      uint32_t write_bl_partial   : 1;
+      uint32_t write_bl_len       : 4;
+      uint32_t r2w_factor         : 3;
+      uint32_t reserved3          : 2;
+      uint32_t wp_grp_enable      : 1;
+      uint32_t wp_grp_size        : 7;
+      uint32_t sector_size        : 7;
+      uint32_t erase_blk_en       : 1;
+      uint32_t reserved2          : 1;
+      uint32_t c_size             : 22;
+      uint32_t reserved1          : 6;
+      uint32_t dsr_imp            : 1;
+      uint32_t read_blk_misalign  : 1;
+      uint32_t write_blk_misalign : 1;
+      uint32_t read_bl_partial    : 1;
+      uint32_t read_bl_len        : 4;
+      uint32_t ccc                : 12;
+      uint32_t tran_speed         : 8;
+      uint32_t nsac               : 8;
+      uint32_t taac               : 8;
+      uint32_t reserved0          : 6;
+      uint32_t csd_structure      : 2;
+    } __attribute__((__packed__)) csd;
+  };
+} hsmci_sd_r2_t;
+
+typedef struct hsmci_sd_r3 {
+  struct {
+    uint32_t reserved0 : 8;
+    uint32_t ocr       : 16;
+    uint32_t s18a      : 1;
+    uint32_t reserved1 : 4;
+    uint32_t reserved2 : 1;
+    uint32_t ccs       : 1;
+    uint32_t busy      : 1;
+  } __attribute__((__packed__)) ocr;
+} hsmci_sd_r3_t;
+
+typedef struct hsmci_sd_r6 {
+  uint32_t status : 16;
+  uint32_t rca    : 16;
+} __attribute__((__packed__)) hsmci_sd_r6_t;
+
+typedef struct hsmci_sd_r7 {
+  uint32_t cpattern : 8;
+  uint32_t vrange   : 4;
+} __attribute__((__packed__)) hsmci_sd_r7_t;
+
+#endif // _SAM3UHSMCIHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/u/matrix/sam3matrixhardware.h b/tos/chips/cortex/m3/sam3/u/matrix/sam3matrixhardware.h
new file mode 100644
index 00000000..3fe007db
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/matrix/sam3matrixhardware.h
@@ -0,0 +1,94 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Bus Matrix register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef _SAM3UMATRIXHARDWARE_H
+#define _SAM3UMATRIXHARDWARE_H
+
+#include "matrixhardware.h"
+
+/**
+ * Bus Matrix Register definitions,  AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 339
+ */
+typedef struct matrix
+{
+    volatile matrix_mcfg_t mcfg0; // master configuration register 0
+    volatile matrix_mcfg_t mcfg1; // master configuration register 1
+    volatile matrix_mcfg_t mcfg2; // master configuration register 2
+    volatile matrix_mcfg_t mcfg3; // master configuration register 3
+    volatile matrix_mcfg_t mcfg4; // master configuration register 4
+    uint32_t reserved0[10];
+    volatile matrix_scfg_t scfg0; // slave confgiruation register 0
+    volatile matrix_scfg_t scfg1; // slave confgiruation register 1
+    volatile matrix_scfg_t scfg2; // slave confgiruation register 2
+    volatile matrix_scfg_t scfg3; // slave confgiruation register 3
+    volatile matrix_scfg_t scfg4; // slave confgiruation register 4
+    volatile matrix_scfg_t scfg5; // slave confgiruation register 5
+    volatile matrix_scfg_t scfg6; // slave confgiruation register 6
+    volatile matrix_scfg_t scfg7; // slave confgiruation register 7
+    volatile matrix_scfg_t scfg8; // slave confgiruation register 8
+    volatile matrix_scfg_t scfg9; // slave confgiruation register 9
+    uint32_t reserved1[5];
+    volatile matrix_pras_t pras0; // priority register A for slave 0
+    uint32_t reserved2;
+    volatile matrix_pras_t pras1; // priority register A for slave 0
+    uint32_t reserved3;
+    volatile matrix_pras_t pras2; // priority register A for slave 0
+    uint32_t reserved4;
+    volatile matrix_pras_t pras3; // priority register A for slave 0
+    uint32_t reserved5;
+    volatile matrix_pras_t pras4; // priority register A for slave 0
+    uint32_t reserved6;
+    volatile matrix_pras_t pras5; // priority register A for slave 0
+    uint32_t reserved7;
+    volatile matrix_pras_t pras6; // priority register A for slave 0
+    uint32_t reserved8;
+    volatile matrix_pras_t pras7; // priority register A for slave 0
+    uint32_t reserved9;
+    volatile matrix_pras_t pras8; // priority register A for slave 0
+    uint32_t reserved10;
+    volatile matrix_pras_t pras9; // priority register A for slave 0
+    uint32_t reserved11[12];
+    volatile matrix_mrcr_t mrcr;  // master remap control register
+} matrix_t;
+
+/**
+ * Memory mapping for the MATRIX
+ */
+volatile matrix_t* MATRIX = (volatile matrix_t*) 0x400E0200; // MATRIX Base Address
+
+#endif // _SAM3UMATRIXHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpu.nc b/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpu.nc
new file mode 100644
index 00000000..fb4874e1
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpu.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to the SAM3U MPU.
+ *
+ * @author wanja@cs.fau.de
+ */
+
+#include "sam3umpuhardware.h"
+
+interface HplSam3uMpu
+{
+	async command void enableMpu();
+	async command void disableMpu();
+
+	async command void enableMpuDuringHardFaults();
+	async command void disableMpuDuringHardFaults();
+
+	async command void enableDefaultBackgroundRegion();
+	async command void disableDefaultBackgroundRegion();
+
+	async command void deployRegion(mpu_rbar_t rbar, mpu_rasr_t rasr);
+
+	async event void mpuFault();
+}
diff --git a/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuC.nc b/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuC.nc
new file mode 100644
index 00000000..0798e0c2
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author wanja@cs.fau.de
+ */
+
+configuration HplSam3uMpuC
+{
+	provides interface HplSam3uMpu;
+}
+implementation
+{
+	components HplSam3uMpuP;
+	HplSam3uMpu = HplSam3uMpuP.HplSam3uMpu;
+
+	components MainC;
+	MainC.SoftwareInit -> HplSam3uMpuP.Init;
+
+	components HplNVICC;
+	HplSam3uMpuP.HplNVICCntl -> HplNVICC;
+
+	components McuSleepC;
+	HplSam3uMpuP.MpuInterruptWrapper -> McuSleepC;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuP.nc b/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuP.nc
new file mode 100644
index 00000000..d3cd81ab
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuP.nc
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author wanja@cs.fau.de
+ */
+
+#include "sam3umpuhardware.h"
+
+module HplSam3uMpuP
+{
+	provides interface HplSam3uMpu;
+	provides interface HplSam3uMpuStatus;
+	provides interface Init;
+	uses interface HplNVICCntl;
+	uses interface FunctionWrapper as MpuInterruptWrapper;
+}
+implementation
+{
+	command error_t Init.init()
+	{
+		call HplNVICCntl.enableMemoryProtectionFault();
+		return SUCCESS;
+	}
+
+	async command void HplSam3uMpu.enableMpu()
+	{
+		MPU_CTRL->bits.enable = 1;
+	}
+
+	async command void HplSam3uMpu.disableMpu()
+	{
+		MPU_CTRL->bits.enable = 0;
+	}
+
+	async command void HplSam3uMpu.enableMpuDuringHardFaults()
+	{
+		MPU_CTRL->bits.hfnmiena = 1;
+	}
+
+	async command void HplSam3uMpu.disableMpuDuringHardFaults()
+	{
+		MPU_CTRL->bits.hfnmiena = 0;
+	}
+
+	async command void HplSam3uMpu.enableDefaultBackgroundRegion()
+	{
+		MPU_CTRL->bits.privdefena = 1;
+	}
+
+	async command void HplSam3uMpu.disableDefaultBackgroundRegion()
+	{
+		MPU_CTRL->bits.privdefena = 0;
+	}
+
+	async command void HplSam3uMpu.deployRegion(mpu_rbar_t rbar, mpu_rasr_t rasr)
+	{
+		// write registers
+		*MPU_RBAR = rbar;
+		*MPU_RASR = rasr;
+	}
+
+	__attribute__((interrupt)) void MpuFaultHandler() @C() @spontaneous()
+	{
+		call MpuInterruptWrapper.preamble();
+		signal HplSam3uMpu.mpuFault();
+		call MpuInterruptWrapper.postamble();
+	}
+
+	async command bool HplSam3uMpuStatus.isStackingFault()
+	{
+		return (MPU_MMFSR->bits.mstkerr == 0x1);
+	}
+
+	async command bool HplSam3uMpuStatus.isUnstackingFault()
+	{
+		return (MPU_MMFSR->bits.munstkerr == 0x1);
+	}
+
+	async command bool HplSam3uMpuStatus.isDataAccessFault()
+	{
+		return (MPU_MMFSR->bits.daccviol == 0x1);
+	}
+
+	async command bool HplSam3uMpuStatus.isInstructionAccessFault()
+	{
+		return (MPU_MMFSR->bits.iaccviol == 0x1);
+	}
+
+	async command bool HplSam3uMpuStatus.isValidFaultAddress()
+	{
+		return (MPU_MMFSR->bits.mmarvalid == 0x1);
+	}
+
+	async command void *HplSam3uMpuStatus.getFaultAddress()
+	{
+		return (void *) MPU_MMFAR->bits.address;
+	}
+}
diff --git a/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuSettings.nc b/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuSettings.nc
new file mode 100644
index 00000000..4b1fc935
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuSettings.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to the SAM3U MPU settings.
+ *
+ * @author wanja@cs.fau.de
+ */
+
+#include "sam3umpuhardware.h"
+
+interface HplSam3uMpuSettings
+{
+	async command error_t getMpuSettings(
+		uint8_t regionNumber,
+		bool enable,
+		void *baseAddress,
+		uint32_t size, // in bytes (bug: 4 GB not possible with this interface)
+		bool enableInstructionFetch,
+		bool enableReadPrivileged,
+		bool enableWritePrivileged,
+		bool enableReadUnprivileged,
+		bool enableWriteUnprivileged,
+		bool cacheable, // should be turned off for periphery and sys control (definitive guide, p. 213)
+		bool bufferable, // should be turned off for sys control to be strongly ordered (definitive guide, p. 213)
+		uint8_t disabledSubregions, // bit = 1: subregion disabled
+		mpu_rbar_t *rbar, // RBAR register value output
+		mpu_rasr_t *rasr
+	);
+}
diff --git a/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuSettingsC.nc b/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuSettingsC.nc
new file mode 100644
index 00000000..adb40251
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuSettingsC.nc
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author wanja@cs.fau.de
+ */
+
+#include "sam3umpuhardware.h"
+
+module HplSam3uMpuSettingsC
+{
+	provides interface HplSam3uMpuSettings;
+}
+implementation
+{
+	async command error_t HplSam3uMpuSettings.getMpuSettings(
+		uint8_t regionNumber,
+		bool enable,
+		void *baseAddress,
+		uint32_t size, // in bytes (bug: 4 GB not possible with this interface)
+		bool enableInstructionFetch,
+		bool enableReadPrivileged,
+		bool enableWritePrivileged,
+		bool enableReadUnprivileged,
+		bool enableWriteUnprivileged,
+		bool cacheable, // should be turned off for periphery and sys control (definitive guide, p. 213)
+		bool bufferable, // should be turned off for sys control to be strongly ordered (definitive guide, p. 213)
+		uint8_t disabledSubregions, // bit = 1: subregion disabled
+		mpu_rbar_t *rbar_param, // RBAR register value output
+		mpu_rasr_t *rasr_param
+	)
+	{
+		uint8_t sizeField = 0; // size encoded in 5 bits (definitive guide, p. 209)
+		uint32_t sizeIter = size;
+		uint8_t i = 0;
+
+		mpu_rbar_t rbar;
+		mpu_rasr_t rasr;
+
+		if (regionNumber > 7) return FAIL;
+
+		// size has to be greater or equal to 32
+		if (size < 32) return FAIL;
+
+		// compute size encoding
+		while (sizeIter != 0) {
+			sizeIter = sizeIter >> 1;
+			sizeField++;
+		}
+		sizeField -= 2; // 32 bytes has to equal b00100 (4)
+
+		// size has to be power of 2
+		// compute size from power
+		sizeIter = 2; // = sizeField of 0
+		for (i = 0; i < sizeField; i++) {
+			sizeIter *= 2;
+		}
+		if (sizeIter != size) return FAIL;
+
+		// check alignment of base address to size
+		if ((((uint32_t) baseAddress) & (size - 1)) != 0) return FAIL;
+		
+		// program region
+		rbar.flat = (uint32_t) baseAddress;
+		rbar.bits.region = regionNumber;
+		rbar.bits.valid = 1; // region field is valid
+
+		rasr.flat = 0;
+
+		rasr.bits.xn = (enableInstructionFetch == TRUE ? 0 : 1); // 1 = instruction fetch disabled
+		rasr.bits.srd = disabledSubregions;
+		rasr.bits.tex = 0;
+		rasr.bits.s = 1; // shareable
+		rasr.bits.c = (cacheable == TRUE ? 1 : 0); // 1 = cacheable
+		rasr.bits.b = (bufferable == TRUE ? 1 : 0); // 1 = bufferable
+		rasr.bits.size = sizeField;
+		rasr.bits.enable = enable; // region enabled or disabled
+
+		// access permissions (see definitive guide, p. 209)
+		// impossible combinations return FAIL
+		if (enableReadPrivileged == FALSE) {
+			// SV no read -> SV no access, user no access
+			rasr.bits.ap = 0x0;
+			if (enableWritePrivileged == TRUE || enableReadUnprivileged == TRUE || enableWriteUnprivileged == TRUE) return FAIL;
+		} else {
+			// SV read
+			if (enableWritePrivileged == FALSE) {
+				// SV read-only
+				if (enableWriteUnprivileged == TRUE) return FAIL;
+				if (enableReadUnprivileged == FALSE) {
+					// SV read-only, user no access
+					rasr.bits.ap = 0x5;
+				} else {
+					// SV read-only, user read-only
+					rasr.bits.ap = 0x6;
+				}
+			} else {
+				// SV read/write
+				if (enableReadUnprivileged == FALSE) {
+					// SV read/write, user no read -> user no access
+					if (enableWriteUnprivileged == TRUE) return FAIL;
+					rasr.bits.ap = 0x1;
+				} else {
+					// SV read/write, user read
+					if (enableWriteUnprivileged == FALSE) {
+						// SV read/write, user read-only
+						rasr.bits.ap = 0x2;
+					} else {
+						// SV read/write, user read/write
+						rasr.bits.ap = 0x3;
+					}
+				}
+			}
+		}
+
+		// output register values
+		*rbar_param = rbar;
+		*rasr_param = rasr;
+
+		return SUCCESS;
+	}
+}
diff --git a/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuStatus.nc b/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuStatus.nc
new file mode 100644
index 00000000..1ffbb655
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/mpu/HplSam3uMpuStatus.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to the status of the SAM3U MPU.
+ *
+ * @author wanja@cs.fau.de
+ */
+
+interface HplSam3uMpuStatus
+{
+	async command bool isStackingFault();
+	async command bool isUnstackingFault();
+	async command bool isDataAccessFault();
+	async command bool isInstructionAccessFault();
+
+	async command bool isValidFaultAddress();
+	async command void *getFaultAddress();
+}
diff --git a/tos/chips/cortex/m3/sam3/u/mpu/sam3umpuhardware.h b/tos/chips/cortex/m3/sam3/u/mpu/sam3umpuhardware.h
new file mode 100644
index 00000000..0e1b1421
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/mpu/sam3umpuhardware.h
@@ -0,0 +1,165 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Definitions specific to the SAM3U ARM Cortex-M3 memory protection unit.
+ *
+ * @author wanja@cs.fau.de
+ */
+
+#ifndef SAM3UMPUHARDWARE_H
+#define SAM3UMPUHARDWARE_H
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 211
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint8_t separate  : 1; // support for unified or separate instruction and data memory maps, always unified on SAM3U
+		uint8_t reserved0 : 7;
+		uint8_t dregion   : 8; // number of supported MPU data regions, always 8 on SAM3U
+		uint8_t iregion   : 8; // number of supported MPU instruction regions, always 0 on SAM3U
+		uint8_t reserved1 : 8;
+	} bits;
+} mpu_type_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 212
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint8_t enable     : 1; // enables the MPU
+		uint8_t hfnmiena   : 1; // enables MPU operation during hard fault, NMI, and FAULTMASK handlers
+		uint8_t privdefena : 1; // enables privileged access to default memory map
+		uint8_t reserved0  : 5;
+		uint8_t reserved1  : 8;
+		uint8_t reserved2  : 8;
+		uint8_t reserved3  : 8;
+	} bits;
+} mpu_ctrl_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 214
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint8_t region    : 8; // region referenced by RBAR and RASR registers
+		uint8_t reserved0 : 8;
+		uint8_t reserved1 : 8;
+		uint8_t reserved2 : 8;
+	} bits;
+} mpu_rnr_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 215
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint8_t  region : 4; // MPU region field
+		uint8_t  valid  : 1; // MPU region number valid bit
+		uint32_t addr   : 27; // region base address field, depending on the region size in RASR!
+	} bits;
+} mpu_rbar_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 216
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint8_t enable    : 1; // region enable bit
+		uint8_t size      : 5; // size of the MPU protection region; minimum is 4 (32 B), maximum is 31 (4 GB)
+		uint8_t reserved0 : 2;
+		uint8_t srd       : 8; // subregion disable bits; 0 = enabled, 1 = disabled
+		uint8_t b         : 1; // bufferable bit
+		uint8_t c         : 1; // cacheable bit
+		uint8_t s         : 1; // shareable bit
+		uint8_t tex       : 3; // type extension field
+		uint8_t reserved1 : 2;
+		uint8_t ap        : 3; // access permission field
+		uint8_t reserved2 : 1;
+		uint8_t xn        : 1; // instruction access disable bit; 0 = fetches enabled, 1 = fetches disabled
+		uint8_t reserved3 : 3;
+	} bits;
+} mpu_rasr_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 195
+typedef union
+{
+	uint8_t flat;
+	struct
+	{
+		uint8_t iaccviol	: 1; // instruction fetch from location that does not permit execution
+		uint8_t daccviol	: 1; // load or store at location that does not permit that
+		uint8_t reserved0	: 1;
+		uint8_t munstkerr	: 1; // unstack for an exception return caused access violation(s)
+		uint8_t mstkerr		: 1; // stacking for an exception entry caused access violation(s)
+		uint8_t reserved1	: 2;
+		uint8_t mmarvalid	: 1; // MMAR holds a valid fault address
+	} bits;
+} mpu_mmfsr_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 201
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint32_t address : 32; // when MMARVALID in MMFSR is set to 1, this holds the address of the location that caused the fault
+	} bits;
+} mpu_mmfar_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 210
+volatile uint32_t*   MPU_BASE    = (volatile uint32_t *)   0xe000ed90;
+volatile mpu_type_t* MPU_TYPE    = (volatile mpu_type_t *) 0xe000ed90;
+volatile mpu_ctrl_t* MPU_CTRL    = (volatile mpu_ctrl_t *) 0xe000ed94;
+volatile mpu_rnr_t*  MPU_RNR     = (volatile mpu_rnr_t *)  0xe000ed98;
+volatile mpu_rbar_t* MPU_RBAR    = (volatile mpu_rbar_t *) 0xe000ed9c;
+volatile mpu_rasr_t* MPU_RASR    = (volatile mpu_rasr_t *) 0xe000eda0;
+volatile mpu_rbar_t* MPU_RBAR_A1 = (volatile mpu_rbar_t *) 0xe000eda4;
+volatile mpu_rasr_t* MPU_RASR_A1 = (volatile mpu_rasr_t *) 0xe000eda8;
+volatile mpu_rbar_t* MPU_RBAR_A2 = (volatile mpu_rbar_t *) 0xe000edac;
+volatile mpu_rasr_t* MPU_RASR_A2 = (volatile mpu_rasr_t *) 0xe000edb0;
+volatile mpu_rbar_t* MPU_RBAR_A3 = (volatile mpu_rbar_t *) 0xe000edb4;
+volatile mpu_rasr_t* MPU_RASR_A3 = (volatile mpu_rasr_t *) 0xe000edb8;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 194
+volatile mpu_mmfsr_t* MPU_MMFSR = (volatile mpu_mmfsr_t *) 0xe000ed28;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 175
+volatile mpu_mmfar_t* MPU_MMFAR = (volatile mpu_mmfar_t *) 0xe000ed34;
+
+#endif // SAM3UMPUHARDWARE_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/nvic/HplNVICC.nc b/tos/chips/cortex/m3/sam3/u/nvic/HplNVICC.nc
new file mode 100644
index 00000000..eb7de027
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/nvic/HplNVICC.nc
@@ -0,0 +1,146 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Thomas Schmid
+ */
+
+#include "sam3unvichardware.h"
+
+configuration HplNVICC
+{
+    provides
+    {
+        interface HplNVICCntl;
+		interface Init;
+
+        interface HplNVICInterruptCntl as SUPCInterrupt;  // SUPPLY CONTROLLER
+        interface HplNVICInterruptCntl as RSTCInterrupt;  // RESET CONTROLLER
+        interface HplNVICInterruptCntl as RTCInterrupt;   // REAL TIME CLOCK
+        interface HplNVICInterruptCntl as RTTInterrupt;   // REAL TIME TIMER
+        interface HplNVICInterruptCntl as WDGInterrupt;   // WATCHDOG TIMER
+        interface HplNVICInterruptCntl as PMCInterrupt;   
+        interface HplNVICInterruptCntl as EFC0Interrupt;  
+        interface HplNVICInterruptCntl as EFC1Interrupt;  
+        interface HplNVICInterruptCntl as DBGUInterrupt;  
+        interface HplNVICInterruptCntl as HSMC4Interrupt; 
+        interface HplNVICInterruptCntl as PIOAInterrupt;  // PARALLEL IO CONTROLLER A
+        interface HplNVICInterruptCntl as PIOBInterrupt;  // PARALLEL IO CONTROLLER B
+        interface HplNVICInterruptCntl as PIOCInterrupt;  // PARALLEL IO CONTROLLER C
+        interface HplNVICInterruptCntl as US0Interrupt;   // USART 0
+        interface HplNVICInterruptCntl as US1Interrupt;   // USART 1
+        interface HplNVICInterruptCntl as US2Interrupt;   // USART 2
+        interface HplNVICInterruptCntl as US3Interrupt;   // USART 3
+        interface HplNVICInterruptCntl as MCI0Interrupt;  // MULTIMEDIA CARD INTERFACE
+        interface HplNVICInterruptCntl as TWI0Interrupt;  
+        interface HplNVICInterruptCntl as TWI1Interrupt;  
+        interface HplNVICInterruptCntl as SPI0Interrupt;  // SERIAL PERIPHERAL INTERFACE
+        interface HplNVICInterruptCntl as SSC0Interrupt;  // SERIAL SYNCHRONOUS CONTROLLER 0
+        interface HplNVICInterruptCntl as TC0Interrupt;   // TIMER COUNTER 0
+        interface HplNVICInterruptCntl as TC1Interrupt;   // TIMER COUNTER 1
+        interface HplNVICInterruptCntl as TC2Interrupt;   // TIMER COUNTER 2
+        interface HplNVICInterruptCntl as PWMCInterrupt;  // PULSE WIDTH MODULATION CONTROLLER
+        interface HplNVICInterruptCntl as ADC12BInterrupt; // 12-BIT ADC CONTROLLER
+        interface HplNVICInterruptCntl as ADCInterrupt;   // 10-BIT ADC CONTROLLER
+        interface HplNVICInterruptCntl as HDMAInterrupt;  
+        interface HplNVICInterruptCntl as UDPHSInterrupt; // USB DEVICE HIGH SPEED
+    }
+}
+
+implementation
+{
+    components HplNVICCntlP,
+        new HplNVICInterruptP(AT91C_ID_SUPC)  as HSUPC,
+        new HplNVICInterruptP(AT91C_ID_RSTC)  as HRSTC,
+        new HplNVICInterruptP(AT91C_ID_RTC)   as HRTC,
+        new HplNVICInterruptP(AT91C_ID_RTT)   as HRTT,
+        new HplNVICInterruptP(AT91C_ID_WDG)   as HWDG,
+        new HplNVICInterruptP(AT91C_ID_PMC)   as HPMC,
+        new HplNVICInterruptP(AT91C_ID_EFC0)  as HEFC0,
+        new HplNVICInterruptP(AT91C_ID_EFC1)  as HEFC1,
+        new HplNVICInterruptP(AT91C_ID_DBGU)  as HDBGU,
+        new HplNVICInterruptP(AT91C_ID_HSMC4) as HHSMC4,
+        new HplNVICInterruptP(AT91C_ID_PIOA)  as HPIOA,
+        new HplNVICInterruptP(AT91C_ID_PIOB)  as HPIOB,
+        new HplNVICInterruptP(AT91C_ID_PIOC)  as HPIOC,
+        new HplNVICInterruptP(AT91C_ID_US0)   as HUS0,
+        new HplNVICInterruptP(AT91C_ID_US1)   as HUS1,
+        new HplNVICInterruptP(AT91C_ID_US2)   as HUS2,
+        new HplNVICInterruptP(AT91C_ID_US3)   as HUS3,
+        new HplNVICInterruptP(AT91C_ID_MCI0)  as HMCI0,
+        new HplNVICInterruptP(AT91C_ID_TWI0)  as HTWI0,
+        new HplNVICInterruptP(AT91C_ID_TWI1)  as HTWI1,
+        new HplNVICInterruptP(AT91C_ID_SPI0)  as HSPI0,
+        new HplNVICInterruptP(AT91C_ID_SSC0)  as HSSC0,
+        new HplNVICInterruptP(AT91C_ID_TC0)   as HTC0,
+        new HplNVICInterruptP(AT91C_ID_TC1)   as HTC1,
+        new HplNVICInterruptP(AT91C_ID_TC2)   as HTC2,
+        new HplNVICInterruptP(AT91C_ID_PWMC)  as HPWMC,
+        new HplNVICInterruptP(AT91C_ID_ADC12B) as HADC12B,
+        new HplNVICInterruptP(AT91C_ID_ADC)   as HADC,
+        new HplNVICInterruptP(AT91C_ID_HDMA)  as HHDMA,
+        new HplNVICInterruptP(AT91C_ID_UDPHS) as HUDPHS;
+
+
+    HplNVICCntl = HplNVICCntlP;
+    Init = HplNVICCntlP;
+
+    SUPCInterrupt = HSUPC.Cntl;
+    RSTCInterrupt = HRSTC.Cntl;
+    RTCInterrupt = HRTC.Cntl;
+    RTTInterrupt = HRTT.Cntl;
+    WDGInterrupt = HWDG.Cntl;
+    PMCInterrupt = HPMC.Cntl;
+    EFC0Interrupt = HEFC0.Cntl;
+    EFC1Interrupt = HEFC1.Cntl;
+    DBGUInterrupt = HDBGU.Cntl;
+    HSMC4Interrupt = HHSMC4.Cntl;
+    PIOAInterrupt = HPIOA.Cntl;
+    PIOBInterrupt = HPIOB.Cntl;
+    PIOCInterrupt = HPIOC.Cntl;
+    US0Interrupt = HUS0.Cntl;
+    US1Interrupt = HUS1.Cntl;
+    US2Interrupt = HUS2.Cntl;
+    US3Interrupt = HUS3.Cntl;
+    MCI0Interrupt = HMCI0.Cntl;
+    TWI0Interrupt = HTWI0.Cntl;
+    TWI1Interrupt = HTWI1.Cntl;
+    SPI0Interrupt = HSPI0.Cntl;
+    SSC0Interrupt = HSSC0.Cntl;
+    TC0Interrupt = HTC0.Cntl;
+    TC1Interrupt = HTC1.Cntl;
+    TC2Interrupt = HTC2.Cntl;
+    PWMCInterrupt = HPWMC.Cntl;
+    ADC12BInterrupt = HADC12B.Cntl;
+    ADCInterrupt = HADC.Cntl;
+    HDMAInterrupt = HHDMA.Cntl;
+    UDPHSInterrupt = HUDPHS.Cntl;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/nvic/sam3unvichardware.h b/tos/chips/cortex/m3/sam3/u/nvic/sam3unvichardware.h
new file mode 100644
index 00000000..7da4d02f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/nvic/sam3unvichardware.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3UNVICHARDWARE_H
+#define SAM3UNVICHARDWARE_H
+
+#include "nvichardware.h"
+#include "sam3uhardware.h"
+
+/// Interrupt sources
+typedef enum irqn
+{
+/******  Cortex-M3 Processor Exceptions Numbers ***************************************************/
+  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                             */
+  MemoryManagement_IRQn       = -12,    /*!< 4 Cortex-M3 Memory Management Interrupt              */
+  BusFault_IRQn               = -11,    /*!< 5 Cortex-M3 Bus Fault Interrupt                      */
+  UsageFault_IRQn             = -10,    /*!< 6 Cortex-M3 Usage Fault Interrupt                    */
+  SVCall_IRQn                 = -5,     /*!< 11 Cortex-M3 SV Call Interrupt                       */
+  DebugMonitor_IRQn           = -4,     /*!< 12 Cortex-M3 Debug Monitor Interrupt                 */
+  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M3 Pend SV Interrupt                       */
+  SysTick_IRQn                = -1,     /*!< 15 Cortex-M3 System Tick Interrupt                   */
+
+/******  AT91SAM3U4 specific Interrupt Numbers *********************************************************/
+ IROn_SUPC                = AT91C_ID_SUPC , // SUPPLY CONTROLLER
+ IROn_RSTC                = AT91C_ID_RSTC , // RESET CONTROLLER
+ IROn_RTC                 = AT91C_ID_RTC  , // REAL TIME CLOCK
+ IROn_RTT                 = AT91C_ID_RTT  , // REAL TIME TIMER
+ IROn_WDG                 = AT91C_ID_WDG  , // WATCHDOG TIMER
+ IROn_PMC                 = AT91C_ID_PMC  , // PMC
+ IROn_EFC0                = AT91C_ID_EFC0 , // EFC0
+ IROn_EFC1                = AT91C_ID_EFC1 , // EFC1
+ IROn_DBGU                = AT91C_ID_DBGU , // DBGU
+ IROn_HSMC4               = AT91C_ID_HSMC4, // HSMC4
+ IROn_PIOA                = AT91C_ID_PIOA , // Parallel IO Controller A
+ IROn_PIOB                = AT91C_ID_PIOB , // Parallel IO Controller B
+ IROn_PIOC                = AT91C_ID_PIOC , // Parallel IO Controller C
+ IROn_US0                 = AT91C_ID_US0  , // USART 0
+ IROn_US1                 = AT91C_ID_US1  , // USART 1
+ IROn_US2                 = AT91C_ID_US2  , // USART 2
+ IROn_US3                 = AT91C_ID_US3  , // USART 3
+ IROn_MCI0                = AT91C_ID_MCI0 , // Multimedia Card Interface
+ IROn_TWI0                = AT91C_ID_TWI0 , // TWI 0
+ IROn_TWI1                = AT91C_ID_TWI1 , // TWI 1
+ IROn_SPI0                = AT91C_ID_SPI0 , // Serial Peripheral Interface
+ IROn_SSC0                = AT91C_ID_SSC0 , // Serial Synchronous Controller 0
+ IROn_TC0                 = AT91C_ID_TC0  , // Timer Counter 0
+ IROn_TC1                 = AT91C_ID_TC1  , // Timer Counter 1
+ IROn_TC2                 = AT91C_ID_TC2  , // Timer Counter 2
+ IROn_PWMC                = AT91C_ID_PWMC , // Pulse Width Modulation Controller
+ IROn_ADCC0               = AT91C_ID_ADC12B, // ADC controller0
+ IROn_ADCC1               = AT91C_ID_ADC, // ADC controller1
+ IROn_HDMA                = AT91C_ID_HDMA , // HDMA
+ IROn_UDPHS               = AT91C_ID_UDPHS // USB Device High Speed
+} irqn_t;
+
+#endif // SAM3UNVICHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/u/pdc/HplSam3uPdcC.nc b/tos/chips/cortex/m3/sam3/u/pdc/HplSam3uPdcC.nc
new file mode 100644
index 00000000..d0dadeda
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/pdc/HplSam3uPdcC.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+configuration HplSam3uPdcC {
+  provides interface HplSam3Pdc as UartPdcControl;
+  provides interface HplSam3Pdc as Usart0PdcControl;
+  provides interface HplSam3Pdc as Usart1PdcControl;
+  provides interface HplSam3Pdc as Usart2PdcControl;
+  provides interface HplSam3Pdc as Usart3PdcControl;
+  provides interface HplSam3Pdc as Twi0PdcControl;
+  provides interface HplSam3Pdc as Twi1PdcControl;
+  provides interface HplSam3Pdc as PwmPdcControl;
+}
+
+implementation {
+
+  enum {
+    UART_BASE = 0x400E0600,
+    USART0_BASE = 0x40090000,
+    USART1_BASE = 0x40094000,
+    USART2_BASE = 0x40098000,
+    USART3_BASE = 0x4009C000,
+    TWI0_BASE = 0x40084000,
+    TWI1_BASE = 0x40088000,
+    PWM_BASE = 0x4008C000
+  };
+
+  components new HplSam3PdcP(UART_BASE) as UartPdc;
+  components new HplSam3PdcP(USART0_BASE) as Usart0Pdc;
+  components new HplSam3PdcP(USART1_BASE) as Usart1Pdc;
+  components new HplSam3PdcP(USART2_BASE) as Usart2Pdc;
+  components new HplSam3PdcP(USART3_BASE) as Usart3Pdc;
+  components new HplSam3PdcP(TWI0_BASE) as Twi0Pdc;
+  components new HplSam3PdcP(TWI1_BASE) as Twi1Pdc;
+  components new HplSam3PdcP(PWM_BASE) as PwmPdc;
+
+  UartPdcControl = UartPdc;
+  Usart0PdcControl = Usart0Pdc;
+  Usart1PdcControl = Usart1Pdc;
+  Usart2PdcControl = Usart2Pdc;
+  Usart3PdcControl = Usart3Pdc;
+  Twi0PdcControl = Twi0Pdc;
+  Twi1PdcControl = Twi1Pdc;
+  PwmPdcControl = PwmPdc;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/pins/HplSam3uGeneralIOC.nc b/tos/chips/cortex/m3/sam3/u/pins/HplSam3uGeneralIOC.nc
new file mode 100644
index 00000000..d3373c8d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/pins/HplSam3uGeneralIOC.nc
@@ -0,0 +1,860 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * General-purpose I/O abstraction for the SAM3U.
+ * Includes PIO controllers A, B, C with 32 pins each.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+configuration HplSam3uGeneralIOC
+{
+	provides {
+		interface GeneralIO as PioA0;
+		interface GeneralIO as PioA1;
+		interface GeneralIO as PioA2;
+		interface GeneralIO as PioA3;
+		interface GeneralIO as PioA4;
+		interface GeneralIO as PioA5;
+		interface GeneralIO as PioA6;
+		interface GeneralIO as PioA7;
+		interface GeneralIO as PioA8;
+		interface GeneralIO as PioA9;
+		interface GeneralIO as PioA10;
+		interface GeneralIO as PioA11;
+		interface GeneralIO as PioA12;
+		interface GeneralIO as PioA13;
+		interface GeneralIO as PioA14;
+		interface GeneralIO as PioA15;
+		interface GeneralIO as PioA16;
+		interface GeneralIO as PioA17;
+		interface GeneralIO as PioA18;
+		interface GeneralIO as PioA19;
+		interface GeneralIO as PioA20;
+		interface GeneralIO as PioA21;
+		interface GeneralIO as PioA22;
+		interface GeneralIO as PioA23;
+		interface GeneralIO as PioA24;
+		interface GeneralIO as PioA25;
+		interface GeneralIO as PioA26;
+		interface GeneralIO as PioA27;
+		interface GeneralIO as PioA28;
+		interface GeneralIO as PioA29;
+		interface GeneralIO as PioA30;
+		interface GeneralIO as PioA31;
+
+		interface GeneralIO as PioB0;
+		interface GeneralIO as PioB1;
+		interface GeneralIO as PioB2;
+		interface GeneralIO as PioB3;
+		interface GeneralIO as PioB4;
+		interface GeneralIO as PioB5;
+		interface GeneralIO as PioB6;
+		interface GeneralIO as PioB7;
+		interface GeneralIO as PioB8;
+		interface GeneralIO as PioB9;
+		interface GeneralIO as PioB10;
+		interface GeneralIO as PioB11;
+		interface GeneralIO as PioB12;
+		interface GeneralIO as PioB13;
+		interface GeneralIO as PioB14;
+		interface GeneralIO as PioB15;
+		interface GeneralIO as PioB16;
+		interface GeneralIO as PioB17;
+		interface GeneralIO as PioB18;
+		interface GeneralIO as PioB19;
+		interface GeneralIO as PioB20;
+		interface GeneralIO as PioB21;
+		interface GeneralIO as PioB22;
+		interface GeneralIO as PioB23;
+		interface GeneralIO as PioB24;
+		interface GeneralIO as PioB25;
+		interface GeneralIO as PioB26;
+		interface GeneralIO as PioB27;
+		interface GeneralIO as PioB28;
+		interface GeneralIO as PioB29;
+		interface GeneralIO as PioB30;
+		interface GeneralIO as PioB31;
+
+		interface GeneralIO as PioC0;
+		interface GeneralIO as PioC1;
+		interface GeneralIO as PioC2;
+		interface GeneralIO as PioC3;
+		interface GeneralIO as PioC4;
+		interface GeneralIO as PioC5;
+		interface GeneralIO as PioC6;
+		interface GeneralIO as PioC7;
+		interface GeneralIO as PioC8;
+		interface GeneralIO as PioC9;
+		interface GeneralIO as PioC10;
+		interface GeneralIO as PioC11;
+		interface GeneralIO as PioC12;
+		interface GeneralIO as PioC13;
+		interface GeneralIO as PioC14;
+		interface GeneralIO as PioC15;
+		interface GeneralIO as PioC16;
+		interface GeneralIO as PioC17;
+		interface GeneralIO as PioC18;
+		interface GeneralIO as PioC19;
+		interface GeneralIO as PioC20;
+		interface GeneralIO as PioC21;
+		interface GeneralIO as PioC22;
+		interface GeneralIO as PioC23;
+		interface GeneralIO as PioC24;
+		interface GeneralIO as PioC25;
+		interface GeneralIO as PioC26;
+		interface GeneralIO as PioC27;
+		interface GeneralIO as PioC28;
+		interface GeneralIO as PioC29;
+		interface GeneralIO as PioC30;
+		interface GeneralIO as PioC31;
+
+		interface GpioInterrupt as InterruptPioA0;
+		interface GpioInterrupt as InterruptPioA1;
+		interface GpioInterrupt as InterruptPioA2;
+		interface GpioInterrupt as InterruptPioA3;
+		interface GpioInterrupt as InterruptPioA4;
+		interface GpioInterrupt as InterruptPioA5;
+		interface GpioInterrupt as InterruptPioA6;
+		interface GpioInterrupt as InterruptPioA7;
+		interface GpioInterrupt as InterruptPioA8;
+		interface GpioInterrupt as InterruptPioA9;
+		interface GpioInterrupt as InterruptPioA10;
+		interface GpioInterrupt as InterruptPioA11;
+		interface GpioInterrupt as InterruptPioA12;
+		interface GpioInterrupt as InterruptPioA13;
+		interface GpioInterrupt as InterruptPioA14;
+		interface GpioInterrupt as InterruptPioA15;
+		interface GpioInterrupt as InterruptPioA16;
+		interface GpioInterrupt as InterruptPioA17;
+		interface GpioInterrupt as InterruptPioA18;
+		interface GpioInterrupt as InterruptPioA19;
+		interface GpioInterrupt as InterruptPioA20;
+		interface GpioInterrupt as InterruptPioA21;
+		interface GpioInterrupt as InterruptPioA22;
+		interface GpioInterrupt as InterruptPioA23;
+		interface GpioInterrupt as InterruptPioA24;
+		interface GpioInterrupt as InterruptPioA25;
+		interface GpioInterrupt as InterruptPioA26;
+		interface GpioInterrupt as InterruptPioA27;
+		interface GpioInterrupt as InterruptPioA28;
+		interface GpioInterrupt as InterruptPioA29;
+		interface GpioInterrupt as InterruptPioA30;
+		interface GpioInterrupt as InterruptPioA31;
+                                               
+		interface GpioInterrupt as InterruptPioB0;
+		interface GpioInterrupt as InterruptPioB1;
+		interface GpioInterrupt as InterruptPioB2;
+		interface GpioInterrupt as InterruptPioB3;
+		interface GpioInterrupt as InterruptPioB4;
+		interface GpioInterrupt as InterruptPioB5;
+		interface GpioInterrupt as InterruptPioB6;
+		interface GpioInterrupt as InterruptPioB7;
+		interface GpioInterrupt as InterruptPioB8;
+		interface GpioInterrupt as InterruptPioB9;
+		interface GpioInterrupt as InterruptPioB10;
+		interface GpioInterrupt as InterruptPioB11;
+		interface GpioInterrupt as InterruptPioB12;
+		interface GpioInterrupt as InterruptPioB13;
+		interface GpioInterrupt as InterruptPioB14;
+		interface GpioInterrupt as InterruptPioB15;
+		interface GpioInterrupt as InterruptPioB16;
+		interface GpioInterrupt as InterruptPioB17;
+		interface GpioInterrupt as InterruptPioB18;
+		interface GpioInterrupt as InterruptPioB19;
+		interface GpioInterrupt as InterruptPioB20;
+		interface GpioInterrupt as InterruptPioB21;
+		interface GpioInterrupt as InterruptPioB22;
+		interface GpioInterrupt as InterruptPioB23;
+		interface GpioInterrupt as InterruptPioB24;
+		interface GpioInterrupt as InterruptPioB25;
+		interface GpioInterrupt as InterruptPioB26;
+		interface GpioInterrupt as InterruptPioB27;
+		interface GpioInterrupt as InterruptPioB28;
+		interface GpioInterrupt as InterruptPioB29;
+		interface GpioInterrupt as InterruptPioB30;
+		interface GpioInterrupt as InterruptPioB31;
+                                               
+		interface GpioInterrupt as InterruptPioC0;
+		interface GpioInterrupt as InterruptPioC1;
+		interface GpioInterrupt as InterruptPioC2;
+		interface GpioInterrupt as InterruptPioC3;
+		interface GpioInterrupt as InterruptPioC4;
+		interface GpioInterrupt as InterruptPioC5;
+		interface GpioInterrupt as InterruptPioC6;
+		interface GpioInterrupt as InterruptPioC7;
+		interface GpioInterrupt as InterruptPioC8;
+		interface GpioInterrupt as InterruptPioC9;
+		interface GpioInterrupt as InterruptPioC10;
+		interface GpioInterrupt as InterruptPioC11;
+		interface GpioInterrupt as InterruptPioC12;
+		interface GpioInterrupt as InterruptPioC13;
+		interface GpioInterrupt as InterruptPioC14;
+		interface GpioInterrupt as InterruptPioC15;
+		interface GpioInterrupt as InterruptPioC16;
+		interface GpioInterrupt as InterruptPioC17;
+		interface GpioInterrupt as InterruptPioC18;
+		interface GpioInterrupt as InterruptPioC19;
+		interface GpioInterrupt as InterruptPioC20;
+		interface GpioInterrupt as InterruptPioC21;
+		interface GpioInterrupt as InterruptPioC22;
+		interface GpioInterrupt as InterruptPioC23;
+		interface GpioInterrupt as InterruptPioC24;
+		interface GpioInterrupt as InterruptPioC25;
+		interface GpioInterrupt as InterruptPioC26;
+		interface GpioInterrupt as InterruptPioC27;
+		interface GpioInterrupt as InterruptPioC28;
+		interface GpioInterrupt as InterruptPioC29;
+		interface GpioInterrupt as InterruptPioC30;
+		interface GpioInterrupt as InterruptPioC31;
+
+		interface GpioCapture as CapturePioA0;
+		interface GpioCapture as CapturePioA1;
+		interface GpioCapture as CapturePioA2;
+		interface GpioCapture as CapturePioA3;
+		interface GpioCapture as CapturePioA4;
+		interface GpioCapture as CapturePioA5;
+		interface GpioCapture as CapturePioA6;
+		interface GpioCapture as CapturePioA7;
+		interface GpioCapture as CapturePioA8;
+		interface GpioCapture as CapturePioA9;
+		interface GpioCapture as CapturePioA10;
+		interface GpioCapture as CapturePioA11;
+		interface GpioCapture as CapturePioA12;
+		interface GpioCapture as CapturePioA13;
+		interface GpioCapture as CapturePioA14;
+		interface GpioCapture as CapturePioA15;
+		interface GpioCapture as CapturePioA16;
+		interface GpioCapture as CapturePioA17;
+		interface GpioCapture as CapturePioA18;
+		interface GpioCapture as CapturePioA19;
+		interface GpioCapture as CapturePioA20;
+		interface GpioCapture as CapturePioA21;
+		interface GpioCapture as CapturePioA22;
+		interface GpioCapture as CapturePioA23;
+		interface GpioCapture as CapturePioA24;
+		interface GpioCapture as CapturePioA25;
+		interface GpioCapture as CapturePioA26;
+		interface GpioCapture as CapturePioA27;
+		interface GpioCapture as CapturePioA28;
+		interface GpioCapture as CapturePioA29;
+		interface GpioCapture as CapturePioA30;
+		interface GpioCapture as CapturePioA31;
+                                           
+		interface GpioCapture as CapturePioB0;
+		interface GpioCapture as CapturePioB1;
+		interface GpioCapture as CapturePioB2;
+		interface GpioCapture as CapturePioB3;
+		interface GpioCapture as CapturePioB4;
+		interface GpioCapture as CapturePioB5;
+		interface GpioCapture as CapturePioB6;
+		interface GpioCapture as CapturePioB7;
+		interface GpioCapture as CapturePioB8;
+		interface GpioCapture as CapturePioB9;
+		interface GpioCapture as CapturePioB10;
+		interface GpioCapture as CapturePioB11;
+		interface GpioCapture as CapturePioB12;
+		interface GpioCapture as CapturePioB13;
+		interface GpioCapture as CapturePioB14;
+		interface GpioCapture as CapturePioB15;
+		interface GpioCapture as CapturePioB16;
+		interface GpioCapture as CapturePioB17;
+		interface GpioCapture as CapturePioB18;
+		interface GpioCapture as CapturePioB19;
+		interface GpioCapture as CapturePioB20;
+		interface GpioCapture as CapturePioB21;
+		interface GpioCapture as CapturePioB22;
+		interface GpioCapture as CapturePioB23;
+		interface GpioCapture as CapturePioB24;
+		interface GpioCapture as CapturePioB25;
+		interface GpioCapture as CapturePioB26;
+		interface GpioCapture as CapturePioB27;
+		interface GpioCapture as CapturePioB28;
+		interface GpioCapture as CapturePioB29;
+		interface GpioCapture as CapturePioB30;
+		interface GpioCapture as CapturePioB31;
+                                           
+		interface GpioCapture as CapturePioC0;
+		interface GpioCapture as CapturePioC1;
+		interface GpioCapture as CapturePioC2;
+		interface GpioCapture as CapturePioC3;
+		interface GpioCapture as CapturePioC4;
+		interface GpioCapture as CapturePioC5;
+		interface GpioCapture as CapturePioC6;
+		interface GpioCapture as CapturePioC7;
+		interface GpioCapture as CapturePioC8;
+		interface GpioCapture as CapturePioC9;
+		interface GpioCapture as CapturePioC10;
+		interface GpioCapture as CapturePioC11;
+		interface GpioCapture as CapturePioC12;
+		interface GpioCapture as CapturePioC13;
+		interface GpioCapture as CapturePioC14;
+		interface GpioCapture as CapturePioC15;
+		interface GpioCapture as CapturePioC16;
+		interface GpioCapture as CapturePioC17;
+		interface GpioCapture as CapturePioC18;
+		interface GpioCapture as CapturePioC19;
+		interface GpioCapture as CapturePioC20;
+		interface GpioCapture as CapturePioC21;
+		interface GpioCapture as CapturePioC22;
+		interface GpioCapture as CapturePioC23;
+		interface GpioCapture as CapturePioC24;
+		interface GpioCapture as CapturePioC25;
+		interface GpioCapture as CapturePioC26;
+		interface GpioCapture as CapturePioC27;
+		interface GpioCapture as CapturePioC28;
+		interface GpioCapture as CapturePioC29;
+		interface GpioCapture as CapturePioC30;
+		interface GpioCapture as CapturePioC31;
+
+		interface HplSam3GeneralIOPin as HplPioA0;
+		interface HplSam3GeneralIOPin as HplPioA1;
+		interface HplSam3GeneralIOPin as HplPioA2;
+		interface HplSam3GeneralIOPin as HplPioA3;
+		interface HplSam3GeneralIOPin as HplPioA4;
+		interface HplSam3GeneralIOPin as HplPioA5;
+		interface HplSam3GeneralIOPin as HplPioA6;
+		interface HplSam3GeneralIOPin as HplPioA7;
+		interface HplSam3GeneralIOPin as HplPioA8;
+		interface HplSam3GeneralIOPin as HplPioA9;
+		interface HplSam3GeneralIOPin as HplPioA10;
+		interface HplSam3GeneralIOPin as HplPioA11;
+		interface HplSam3GeneralIOPin as HplPioA12;
+		interface HplSam3GeneralIOPin as HplPioA13;
+		interface HplSam3GeneralIOPin as HplPioA14;
+		interface HplSam3GeneralIOPin as HplPioA15;
+		interface HplSam3GeneralIOPin as HplPioA16;
+		interface HplSam3GeneralIOPin as HplPioA17;
+		interface HplSam3GeneralIOPin as HplPioA18;
+		interface HplSam3GeneralIOPin as HplPioA19;
+		interface HplSam3GeneralIOPin as HplPioA20;
+		interface HplSam3GeneralIOPin as HplPioA21;
+		interface HplSam3GeneralIOPin as HplPioA22;
+		interface HplSam3GeneralIOPin as HplPioA23;
+		interface HplSam3GeneralIOPin as HplPioA24;
+		interface HplSam3GeneralIOPin as HplPioA25;
+		interface HplSam3GeneralIOPin as HplPioA26;
+		interface HplSam3GeneralIOPin as HplPioA27;
+		interface HplSam3GeneralIOPin as HplPioA28;
+		interface HplSam3GeneralIOPin as HplPioA29;
+		interface HplSam3GeneralIOPin as HplPioA30;
+		interface HplSam3GeneralIOPin as HplPioA31;
+
+		interface HplSam3GeneralIOPin as HplPioB0;
+		interface HplSam3GeneralIOPin as HplPioB1;
+		interface HplSam3GeneralIOPin as HplPioB2;
+		interface HplSam3GeneralIOPin as HplPioB3;
+		interface HplSam3GeneralIOPin as HplPioB4;
+		interface HplSam3GeneralIOPin as HplPioB5;
+		interface HplSam3GeneralIOPin as HplPioB6;
+		interface HplSam3GeneralIOPin as HplPioB7;
+		interface HplSam3GeneralIOPin as HplPioB8;
+		interface HplSam3GeneralIOPin as HplPioB9;
+		interface HplSam3GeneralIOPin as HplPioB10;
+		interface HplSam3GeneralIOPin as HplPioB11;
+		interface HplSam3GeneralIOPin as HplPioB12;
+		interface HplSam3GeneralIOPin as HplPioB13;
+		interface HplSam3GeneralIOPin as HplPioB14;
+		interface HplSam3GeneralIOPin as HplPioB15;
+		interface HplSam3GeneralIOPin as HplPioB16;
+		interface HplSam3GeneralIOPin as HplPioB17;
+		interface HplSam3GeneralIOPin as HplPioB18;
+		interface HplSam3GeneralIOPin as HplPioB19;
+		interface HplSam3GeneralIOPin as HplPioB20;
+		interface HplSam3GeneralIOPin as HplPioB21;
+		interface HplSam3GeneralIOPin as HplPioB22;
+		interface HplSam3GeneralIOPin as HplPioB23;
+		interface HplSam3GeneralIOPin as HplPioB24;
+		interface HplSam3GeneralIOPin as HplPioB25;
+		interface HplSam3GeneralIOPin as HplPioB26;
+		interface HplSam3GeneralIOPin as HplPioB27;
+		interface HplSam3GeneralIOPin as HplPioB28;
+		interface HplSam3GeneralIOPin as HplPioB29;
+		interface HplSam3GeneralIOPin as HplPioB30;
+		interface HplSam3GeneralIOPin as HplPioB31;
+
+		interface HplSam3GeneralIOPin as HplPioC0;
+		interface HplSam3GeneralIOPin as HplPioC1;
+		interface HplSam3GeneralIOPin as HplPioC2;
+		interface HplSam3GeneralIOPin as HplPioC3;
+		interface HplSam3GeneralIOPin as HplPioC4;
+		interface HplSam3GeneralIOPin as HplPioC5;
+		interface HplSam3GeneralIOPin as HplPioC6;
+		interface HplSam3GeneralIOPin as HplPioC7;
+		interface HplSam3GeneralIOPin as HplPioC8;
+		interface HplSam3GeneralIOPin as HplPioC9;
+		interface HplSam3GeneralIOPin as HplPioC10;
+		interface HplSam3GeneralIOPin as HplPioC11;
+		interface HplSam3GeneralIOPin as HplPioC12;
+		interface HplSam3GeneralIOPin as HplPioC13;
+		interface HplSam3GeneralIOPin as HplPioC14;
+		interface HplSam3GeneralIOPin as HplPioC15;
+		interface HplSam3GeneralIOPin as HplPioC16;
+		interface HplSam3GeneralIOPin as HplPioC17;
+		interface HplSam3GeneralIOPin as HplPioC18;
+		interface HplSam3GeneralIOPin as HplPioC19;
+		interface HplSam3GeneralIOPin as HplPioC20;
+		interface HplSam3GeneralIOPin as HplPioC21;
+		interface HplSam3GeneralIOPin as HplPioC22;
+		interface HplSam3GeneralIOPin as HplPioC23;
+		interface HplSam3GeneralIOPin as HplPioC24;
+		interface HplSam3GeneralIOPin as HplPioC25;
+		interface HplSam3GeneralIOPin as HplPioC26;
+		interface HplSam3GeneralIOPin as HplPioC27;
+		interface HplSam3GeneralIOPin as HplPioC28;
+		interface HplSam3GeneralIOPin as HplPioC29;
+		interface HplSam3GeneralIOPin as HplPioC30;
+		interface HplSam3GeneralIOPin as HplPioC31;
+	}
+}
+
+implementation
+{
+	components 
+	new HplSam3GeneralIOPioC(0x400e0c00) as PioA,
+	new HplSam3GeneralIOPioC(0x400e0e00) as PioB,
+	new HplSam3GeneralIOPioC(0x400e1000) as PioC;
+
+    components HplSam3GeneralIOP;
+    PioA.HplPort -> HplSam3GeneralIOP.HplPortA;
+    PioB.HplPort -> HplSam3GeneralIOP.HplPortB;
+    PioC.HplPort -> HplSam3GeneralIOP.HplPortC;
+
+    components McuSleepC;
+    HplSam3GeneralIOP.PioAInterruptWrapper -> McuSleepC;
+    HplSam3GeneralIOP.PioBInterruptWrapper -> McuSleepC;
+    HplSam3GeneralIOP.PioCInterruptWrapper -> McuSleepC;
+
+    components HplNVICC, HplSam3uClockC;
+    PioA.PIOIrqControl -> HplNVICC.PIOAInterrupt;
+    PioA.PIOClockControl -> HplSam3uClockC.PIOAPPCntl;
+    PioB.PIOIrqControl -> HplNVICC.PIOBInterrupt;
+    PioB.PIOClockControl -> HplSam3uClockC.PIOBPPCntl;
+    PioC.PIOIrqControl -> HplNVICC.PIOCInterrupt;
+    PioC.PIOClockControl -> HplSam3uClockC.PIOCPPCntl;
+
+	PioA0 = PioA.Pin0;
+	PioA1 = PioA.Pin1;
+	PioA2 = PioA.Pin2;
+	PioA3 = PioA.Pin3;
+	PioA4 = PioA.Pin4;
+	PioA5 = PioA.Pin5;
+	PioA6 = PioA.Pin6;
+	PioA7 = PioA.Pin7;
+	PioA8 = PioA.Pin8;
+	PioA9 = PioA.Pin9;
+	PioA10 = PioA.Pin10;
+	PioA11 = PioA.Pin11;
+	PioA12 = PioA.Pin12;
+	PioA13 = PioA.Pin13;
+	PioA14 = PioA.Pin14;
+	PioA15 = PioA.Pin15;
+	PioA16 = PioA.Pin16;
+	PioA17 = PioA.Pin17;
+	PioA18 = PioA.Pin18;
+	PioA19 = PioA.Pin19;
+	PioA20 = PioA.Pin20;
+	PioA21 = PioA.Pin21;
+	PioA22 = PioA.Pin22;
+	PioA23 = PioA.Pin23;
+	PioA24 = PioA.Pin24;
+	PioA25 = PioA.Pin25;
+	PioA26 = PioA.Pin26;
+	PioA27 = PioA.Pin27;
+	PioA28 = PioA.Pin28;
+	PioA29 = PioA.Pin29;
+	PioA30 = PioA.Pin30;
+	PioA31 = PioA.Pin31;
+
+	PioB0 = PioB.Pin0;
+	PioB1 = PioB.Pin1;
+	PioB2 = PioB.Pin2;
+	PioB3 = PioB.Pin3;
+	PioB4 = PioB.Pin4;
+	PioB5 = PioB.Pin5;
+	PioB6 = PioB.Pin6;
+	PioB7 = PioB.Pin7;
+	PioB8 = PioB.Pin8;
+	PioB9 = PioB.Pin9;
+	PioB10 = PioB.Pin10;
+	PioB11 = PioB.Pin11;
+	PioB12 = PioB.Pin12;
+	PioB13 = PioB.Pin13;
+	PioB14 = PioB.Pin14;
+	PioB15 = PioB.Pin15;
+	PioB16 = PioB.Pin16;
+	PioB17 = PioB.Pin17;
+	PioB18 = PioB.Pin18;
+	PioB19 = PioB.Pin19;
+	PioB20 = PioB.Pin20;
+	PioB21 = PioB.Pin21;
+	PioB22 = PioB.Pin22;
+	PioB23 = PioB.Pin23;
+	PioB24 = PioB.Pin24;
+	PioB25 = PioB.Pin25;
+	PioB26 = PioB.Pin26;
+	PioB27 = PioB.Pin27;
+	PioB28 = PioB.Pin28;
+	PioB29 = PioB.Pin29;
+	PioB30 = PioB.Pin30;
+	PioB31 = PioB.Pin31;
+
+	PioC0 = PioC.Pin0;
+	PioC1 = PioC.Pin1;
+	PioC2 = PioC.Pin2;
+	PioC3 = PioC.Pin3;
+	PioC4 = PioC.Pin4;
+	PioC5 = PioC.Pin5;
+	PioC6 = PioC.Pin6;
+	PioC7 = PioC.Pin7;
+	PioC8 = PioC.Pin8;
+	PioC9 = PioC.Pin9;
+	PioC10 = PioC.Pin10;
+	PioC11 = PioC.Pin11;
+	PioC12 = PioC.Pin12;
+	PioC13 = PioC.Pin13;
+	PioC14 = PioC.Pin14;
+	PioC15 = PioC.Pin15;
+	PioC16 = PioC.Pin16;
+	PioC17 = PioC.Pin17;
+	PioC18 = PioC.Pin18;
+	PioC19 = PioC.Pin19;
+	PioC20 = PioC.Pin20;
+	PioC21 = PioC.Pin21;
+	PioC22 = PioC.Pin22;
+	PioC23 = PioC.Pin23;
+	PioC24 = PioC.Pin24;
+	PioC25 = PioC.Pin25;
+	PioC26 = PioC.Pin26;
+	PioC27 = PioC.Pin27;
+	PioC28 = PioC.Pin28;
+	PioC29 = PioC.Pin29;
+	PioC30 = PioC.Pin30;
+	PioC31 = PioC.Pin31;
+
+	InterruptPioA0 = PioA.InterruptPin0;
+	InterruptPioA1 = PioA.InterruptPin1;
+	InterruptPioA2 = PioA.InterruptPin2;
+	InterruptPioA3 = PioA.InterruptPin3;
+	InterruptPioA4 = PioA.InterruptPin4;
+	InterruptPioA5 = PioA.InterruptPin5;
+	InterruptPioA6 = PioA.InterruptPin6;
+	InterruptPioA7 = PioA.InterruptPin7;
+	InterruptPioA8 = PioA.InterruptPin8;
+	InterruptPioA9 = PioA.InterruptPin9;
+	InterruptPioA10 = PioA.InterruptPin10;
+	InterruptPioA11 = PioA.InterruptPin11;
+	InterruptPioA12 = PioA.InterruptPin12;
+	InterruptPioA13 = PioA.InterruptPin13;
+	InterruptPioA14 = PioA.InterruptPin14;
+	InterruptPioA15 = PioA.InterruptPin15;
+	InterruptPioA16 = PioA.InterruptPin16;
+	InterruptPioA17 = PioA.InterruptPin17;
+	InterruptPioA18 = PioA.InterruptPin18;
+	InterruptPioA19 = PioA.InterruptPin19;
+	InterruptPioA20 = PioA.InterruptPin20;
+	InterruptPioA21 = PioA.InterruptPin21;
+	InterruptPioA22 = PioA.InterruptPin22;
+	InterruptPioA23 = PioA.InterruptPin23;
+	InterruptPioA24 = PioA.InterruptPin24;
+	InterruptPioA25 = PioA.InterruptPin25;
+	InterruptPioA26 = PioA.InterruptPin26;
+	InterruptPioA27 = PioA.InterruptPin27;
+	InterruptPioA28 = PioA.InterruptPin28;
+	InterruptPioA29 = PioA.InterruptPin29;
+	InterruptPioA30 = PioA.InterruptPin30;
+	InterruptPioA31 = PioA.InterruptPin31;
+                
+	InterruptPioB0 = PioB.InterruptPin0;
+	InterruptPioB1 = PioB.InterruptPin1;
+	InterruptPioB2 = PioB.InterruptPin2;
+	InterruptPioB3 = PioB.InterruptPin3;
+	InterruptPioB4 = PioB.InterruptPin4;
+	InterruptPioB5 = PioB.InterruptPin5;
+	InterruptPioB6 = PioB.InterruptPin6;
+	InterruptPioB7 = PioB.InterruptPin7;
+	InterruptPioB8 = PioB.InterruptPin8;
+	InterruptPioB9 = PioB.InterruptPin9;
+	InterruptPioB10 = PioB.InterruptPin10;
+	InterruptPioB11 = PioB.InterruptPin11;
+	InterruptPioB12 = PioB.InterruptPin12;
+	InterruptPioB13 = PioB.InterruptPin13;
+	InterruptPioB14 = PioB.InterruptPin14;
+	InterruptPioB15 = PioB.InterruptPin15;
+	InterruptPioB16 = PioB.InterruptPin16;
+	InterruptPioB17 = PioB.InterruptPin17;
+	InterruptPioB18 = PioB.InterruptPin18;
+	InterruptPioB19 = PioB.InterruptPin19;
+	InterruptPioB20 = PioB.InterruptPin20;
+	InterruptPioB21 = PioB.InterruptPin21;
+	InterruptPioB22 = PioB.InterruptPin22;
+	InterruptPioB23 = PioB.InterruptPin23;
+	InterruptPioB24 = PioB.InterruptPin24;
+	InterruptPioB25 = PioB.InterruptPin25;
+	InterruptPioB26 = PioB.InterruptPin26;
+	InterruptPioB27 = PioB.InterruptPin27;
+	InterruptPioB28 = PioB.InterruptPin28;
+	InterruptPioB29 = PioB.InterruptPin29;
+	InterruptPioB30 = PioB.InterruptPin30;
+	InterruptPioB31 = PioB.InterruptPin31;
+                
+	InterruptPioC0 = PioC.InterruptPin0;
+	InterruptPioC1 = PioC.InterruptPin1;
+	InterruptPioC2 = PioC.InterruptPin2;
+	InterruptPioC3 = PioC.InterruptPin3;
+	InterruptPioC4 = PioC.InterruptPin4;
+	InterruptPioC5 = PioC.InterruptPin5;
+	InterruptPioC6 = PioC.InterruptPin6;
+	InterruptPioC7 = PioC.InterruptPin7;
+	InterruptPioC8 = PioC.InterruptPin8;
+	InterruptPioC9 = PioC.InterruptPin9;
+	InterruptPioC10 = PioC.InterruptPin10;
+	InterruptPioC11 = PioC.InterruptPin11;
+	InterruptPioC12 = PioC.InterruptPin12;
+	InterruptPioC13 = PioC.InterruptPin13;
+	InterruptPioC14 = PioC.InterruptPin14;
+	InterruptPioC15 = PioC.InterruptPin15;
+	InterruptPioC16 = PioC.InterruptPin16;
+	InterruptPioC17 = PioC.InterruptPin17;
+	InterruptPioC18 = PioC.InterruptPin18;
+	InterruptPioC19 = PioC.InterruptPin19;
+	InterruptPioC20 = PioC.InterruptPin20;
+	InterruptPioC21 = PioC.InterruptPin21;
+	InterruptPioC22 = PioC.InterruptPin22;
+	InterruptPioC23 = PioC.InterruptPin23;
+	InterruptPioC24 = PioC.InterruptPin24;
+	InterruptPioC25 = PioC.InterruptPin25;
+	InterruptPioC26 = PioC.InterruptPin26;
+	InterruptPioC27 = PioC.InterruptPin27;
+	InterruptPioC28 = PioC.InterruptPin28;
+	InterruptPioC29 = PioC.InterruptPin29;
+	InterruptPioC30 = PioC.InterruptPin30;
+	InterruptPioC31 = PioC.InterruptPin31;
+
+	CapturePioA0 = PioA.CapturePin0;
+	CapturePioA1 = PioA.CapturePin1;
+	CapturePioA2 = PioA.CapturePin2;
+	CapturePioA3 = PioA.CapturePin3;
+	CapturePioA4 = PioA.CapturePin4;
+	CapturePioA5 = PioA.CapturePin5;
+	CapturePioA6 = PioA.CapturePin6;
+	CapturePioA7 = PioA.CapturePin7;
+	CapturePioA8 = PioA.CapturePin8;
+	CapturePioA9 = PioA.CapturePin9;
+	CapturePioA10 = PioA.CapturePin10;
+	CapturePioA11 = PioA.CapturePin11;
+	CapturePioA12 = PioA.CapturePin12;
+	CapturePioA13 = PioA.CapturePin13;
+	CapturePioA14 = PioA.CapturePin14;
+	CapturePioA15 = PioA.CapturePin15;
+	CapturePioA16 = PioA.CapturePin16;
+	CapturePioA17 = PioA.CapturePin17;
+	CapturePioA18 = PioA.CapturePin18;
+	CapturePioA19 = PioA.CapturePin19;
+	CapturePioA20 = PioA.CapturePin20;
+	CapturePioA21 = PioA.CapturePin21;
+	CapturePioA22 = PioA.CapturePin22;
+	CapturePioA23 = PioA.CapturePin23;
+	CapturePioA24 = PioA.CapturePin24;
+	CapturePioA25 = PioA.CapturePin25;
+	CapturePioA26 = PioA.CapturePin26;
+	CapturePioA27 = PioA.CapturePin27;
+	CapturePioA28 = PioA.CapturePin28;
+	CapturePioA29 = PioA.CapturePin29;
+	CapturePioA30 = PioA.CapturePin30;
+	CapturePioA31 = PioA.CapturePin31;
+              
+	CapturePioB0 = PioB.CapturePin0;
+	CapturePioB1 = PioB.CapturePin1;
+	CapturePioB2 = PioB.CapturePin2;
+	CapturePioB3 = PioB.CapturePin3;
+	CapturePioB4 = PioB.CapturePin4;
+	CapturePioB5 = PioB.CapturePin5;
+	CapturePioB6 = PioB.CapturePin6;
+	CapturePioB7 = PioB.CapturePin7;
+	CapturePioB8 = PioB.CapturePin8;
+	CapturePioB9 = PioB.CapturePin9;
+	CapturePioB10 = PioB.CapturePin10;
+	CapturePioB11 = PioB.CapturePin11;
+	CapturePioB12 = PioB.CapturePin12;
+	CapturePioB13 = PioB.CapturePin13;
+	CapturePioB14 = PioB.CapturePin14;
+	CapturePioB15 = PioB.CapturePin15;
+	CapturePioB16 = PioB.CapturePin16;
+	CapturePioB17 = PioB.CapturePin17;
+	CapturePioB18 = PioB.CapturePin18;
+	CapturePioB19 = PioB.CapturePin19;
+	CapturePioB20 = PioB.CapturePin20;
+	CapturePioB21 = PioB.CapturePin21;
+	CapturePioB22 = PioB.CapturePin22;
+	CapturePioB23 = PioB.CapturePin23;
+	CapturePioB24 = PioB.CapturePin24;
+	CapturePioB25 = PioB.CapturePin25;
+	CapturePioB26 = PioB.CapturePin26;
+	CapturePioB27 = PioB.CapturePin27;
+	CapturePioB28 = PioB.CapturePin28;
+	CapturePioB29 = PioB.CapturePin29;
+	CapturePioB30 = PioB.CapturePin30;
+	CapturePioB31 = PioB.CapturePin31;
+              
+	CapturePioC0 = PioC.CapturePin0;
+	CapturePioC1 = PioC.CapturePin1;
+	CapturePioC2 = PioC.CapturePin2;
+	CapturePioC3 = PioC.CapturePin3;
+	CapturePioC4 = PioC.CapturePin4;
+	CapturePioC5 = PioC.CapturePin5;
+	CapturePioC6 = PioC.CapturePin6;
+	CapturePioC7 = PioC.CapturePin7;
+	CapturePioC8 = PioC.CapturePin8;
+	CapturePioC9 = PioC.CapturePin9;
+	CapturePioC10 = PioC.CapturePin10;
+	CapturePioC11 = PioC.CapturePin11;
+	CapturePioC12 = PioC.CapturePin12;
+	CapturePioC13 = PioC.CapturePin13;
+	CapturePioC14 = PioC.CapturePin14;
+	CapturePioC15 = PioC.CapturePin15;
+	CapturePioC16 = PioC.CapturePin16;
+	CapturePioC17 = PioC.CapturePin17;
+	CapturePioC18 = PioC.CapturePin18;
+	CapturePioC19 = PioC.CapturePin19;
+	CapturePioC20 = PioC.CapturePin20;
+	CapturePioC21 = PioC.CapturePin21;
+	CapturePioC22 = PioC.CapturePin22;
+	CapturePioC23 = PioC.CapturePin23;
+	CapturePioC24 = PioC.CapturePin24;
+	CapturePioC25 = PioC.CapturePin25;
+	CapturePioC26 = PioC.CapturePin26;
+	CapturePioC27 = PioC.CapturePin27;
+	CapturePioC28 = PioC.CapturePin28;
+	CapturePioC29 = PioC.CapturePin29;
+	CapturePioC30 = PioC.CapturePin30;
+	CapturePioC31 = PioC.CapturePin31;
+
+	HplPioA0 = PioA.HplPin0;
+	HplPioA1 = PioA.HplPin1;
+	HplPioA2 = PioA.HplPin2;
+	HplPioA3 = PioA.HplPin3;
+	HplPioA4 = PioA.HplPin4;
+	HplPioA5 = PioA.HplPin5;
+	HplPioA6 = PioA.HplPin6;
+	HplPioA7 = PioA.HplPin7;
+	HplPioA8 = PioA.HplPin8;
+	HplPioA9 = PioA.HplPin9;
+	HplPioA10 = PioA.HplPin10;
+	HplPioA11 = PioA.HplPin11;
+	HplPioA12 = PioA.HplPin12;
+	HplPioA13 = PioA.HplPin13;
+	HplPioA14 = PioA.HplPin14;
+	HplPioA15 = PioA.HplPin15;
+	HplPioA16 = PioA.HplPin16;
+	HplPioA17 = PioA.HplPin17;
+	HplPioA18 = PioA.HplPin18;
+	HplPioA19 = PioA.HplPin19;
+	HplPioA20 = PioA.HplPin20;
+	HplPioA21 = PioA.HplPin21;
+	HplPioA22 = PioA.HplPin22;
+	HplPioA23 = PioA.HplPin23;
+	HplPioA24 = PioA.HplPin24;
+	HplPioA25 = PioA.HplPin25;
+	HplPioA26 = PioA.HplPin26;
+	HplPioA27 = PioA.HplPin27;
+	HplPioA28 = PioA.HplPin28;
+	HplPioA29 = PioA.HplPin29;
+	HplPioA30 = PioA.HplPin30;
+	HplPioA31 = PioA.HplPin31;
+
+	HplPioB0 = PioB.HplPin0;
+	HplPioB1 = PioB.HplPin1;
+	HplPioB2 = PioB.HplPin2;
+	HplPioB3 = PioB.HplPin3;
+	HplPioB4 = PioB.HplPin4;
+	HplPioB5 = PioB.HplPin5;
+	HplPioB6 = PioB.HplPin6;
+	HplPioB7 = PioB.HplPin7;
+	HplPioB8 = PioB.HplPin8;
+	HplPioB9 = PioB.HplPin9;
+	HplPioB10 = PioB.HplPin10;
+	HplPioB11 = PioB.HplPin11;
+	HplPioB12 = PioB.HplPin12;
+	HplPioB13 = PioB.HplPin13;
+	HplPioB14 = PioB.HplPin14;
+	HplPioB15 = PioB.HplPin15;
+	HplPioB16 = PioB.HplPin16;
+	HplPioB17 = PioB.HplPin17;
+	HplPioB18 = PioB.HplPin18;
+	HplPioB19 = PioB.HplPin19;
+	HplPioB20 = PioB.HplPin20;
+	HplPioB21 = PioB.HplPin21;
+	HplPioB22 = PioB.HplPin22;
+	HplPioB23 = PioB.HplPin23;
+	HplPioB24 = PioB.HplPin24;
+	HplPioB25 = PioB.HplPin25;
+	HplPioB26 = PioB.HplPin26;
+	HplPioB27 = PioB.HplPin27;
+	HplPioB28 = PioB.HplPin28;
+	HplPioB29 = PioB.HplPin29;
+	HplPioB30 = PioB.HplPin30;
+	HplPioB31 = PioB.HplPin31;
+
+	HplPioC0 = PioC.HplPin0;
+	HplPioC1 = PioC.HplPin1;
+	HplPioC2 = PioC.HplPin2;
+	HplPioC3 = PioC.HplPin3;
+	HplPioC4 = PioC.HplPin4;
+	HplPioC5 = PioC.HplPin5;
+	HplPioC6 = PioC.HplPin6;
+	HplPioC7 = PioC.HplPin7;
+	HplPioC8 = PioC.HplPin8;
+	HplPioC9 = PioC.HplPin9;
+	HplPioC10 = PioC.HplPin10;
+	HplPioC11 = PioC.HplPin11;
+	HplPioC12 = PioC.HplPin12;
+	HplPioC13 = PioC.HplPin13;
+	HplPioC14 = PioC.HplPin14;
+	HplPioC15 = PioC.HplPin15;
+	HplPioC16 = PioC.HplPin16;
+	HplPioC17 = PioC.HplPin17;
+	HplPioC18 = PioC.HplPin18;
+	HplPioC19 = PioC.HplPin19;
+	HplPioC20 = PioC.HplPin20;
+	HplPioC21 = PioC.HplPin21;
+	HplPioC22 = PioC.HplPin22;
+	HplPioC23 = PioC.HplPin23;
+	HplPioC24 = PioC.HplPin24;
+	HplPioC25 = PioC.HplPin25;
+	HplPioC26 = PioC.HplPin26;
+	HplPioC27 = PioC.HplPin27;
+	HplPioC28 = PioC.HplPin28;
+	HplPioC29 = PioC.HplPin29;
+	HplPioC30 = PioC.HplPin30;
+	HplPioC31 = PioC.HplPin31;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/pmc/HplSam3uClockC.nc b/tos/chips/cortex/m3/sam3/u/pmc/HplSam3uClockC.nc
new file mode 100644
index 00000000..a799f1e4
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/pmc/HplSam3uClockC.nc
@@ -0,0 +1,141 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is the main configuration for the low-layer clock module.
+ *
+ * @author Thomas Schmid
+ */
+
+configuration HplSam3uClockC
+{
+    provides
+    {
+        interface HplSam3Clock;
+
+        interface HplSam3PeripheralClockCntl as RTCPCCntl   ;
+        interface HplSam3PeripheralClockCntl as RTTPPCntl   ;
+        interface HplSam3PeripheralClockCntl as WDGPPCntl   ;
+        interface HplSam3PeripheralClockCntl as PMCPPCntl   ;
+        interface HplSam3PeripheralClockCntl as EFC0PPCntl  ;
+        interface HplSam3PeripheralClockCntl as EFC1PPCntl  ;
+        interface HplSam3PeripheralClockCntl as DBGUPPCntl  ;
+        interface HplSam3PeripheralClockCntl as HSMC4PPCntl ;
+        interface HplSam3PeripheralClockCntl as PIOAPPCntl  ;
+        interface HplSam3PeripheralClockCntl as PIOBPPCntl  ;
+        interface HplSam3PeripheralClockCntl as PIOCPPCntl  ;
+        interface HplSam3PeripheralClockCntl as US0PPCntl   ;
+        interface HplSam3PeripheralClockCntl as US1PPCntl   ;
+        interface HplSam3PeripheralClockCntl as US2PPCntl   ;
+        interface HplSam3PeripheralClockCntl as US3PPCntl   ;
+        interface HplSam3PeripheralClockCntl as MCI0PPCntl  ;
+        interface HplSam3PeripheralClockCntl as TWI0PPCntl  ;
+        interface HplSam3PeripheralClockCntl as TWI1PPCntl  ;
+        interface HplSam3PeripheralClockCntl as SPI0PPCntl  ;
+        interface HplSam3PeripheralClockCntl as SSC0PPCntl  ;
+        interface HplSam3PeripheralClockCntl as TC0PPCntl   ;
+        interface HplSam3PeripheralClockCntl as TC1PPCntl   ;
+        interface HplSam3PeripheralClockCntl as TC2PPCntl   ;
+        interface HplSam3PeripheralClockCntl as PWMCPPCntl  ;
+        interface HplSam3PeripheralClockCntl as ADC12BPPCntl;
+        interface HplSam3PeripheralClockCntl as ADCPPCntl   ;
+        interface HplSam3PeripheralClockCntl as HDMAPPCntl  ;
+        interface HplSam3PeripheralClockCntl as UDPHSPPCntl ;
+    }
+}
+implementation
+{
+#define PMC_PC_BASE 0x400e0410
+
+    components HplSam3uClockP,
+               new HplSam3PeripheralClockP(AT91C_ID_RTC   ,PMC_PC_BASE ) as RTC,
+               new HplSam3PeripheralClockP(AT91C_ID_RTT   ,PMC_PC_BASE ) as RTT,
+               new HplSam3PeripheralClockP(AT91C_ID_WDG   ,PMC_PC_BASE ) as WDG,
+               new HplSam3PeripheralClockP(AT91C_ID_PMC   ,PMC_PC_BASE ) as PMC,
+               new HplSam3PeripheralClockP(AT91C_ID_EFC0  ,PMC_PC_BASE ) as EFC0,
+               new HplSam3PeripheralClockP(AT91C_ID_EFC1  ,PMC_PC_BASE ) as EFC1,
+               new HplSam3PeripheralClockP(AT91C_ID_DBGU  ,PMC_PC_BASE ) as DBGU,
+               new HplSam3PeripheralClockP(AT91C_ID_HSMC4 ,PMC_PC_BASE ) as HSMC4,
+               new HplSam3PeripheralClockP(AT91C_ID_PIOA  ,PMC_PC_BASE ) as PIOA,
+               new HplSam3PeripheralClockP(AT91C_ID_PIOB  ,PMC_PC_BASE ) as PIOB,
+               new HplSam3PeripheralClockP(AT91C_ID_PIOC  ,PMC_PC_BASE ) as PIOC,
+               new HplSam3PeripheralClockP(AT91C_ID_US0   ,PMC_PC_BASE ) as US0,
+               new HplSam3PeripheralClockP(AT91C_ID_US1   ,PMC_PC_BASE ) as US1,
+               new HplSam3PeripheralClockP(AT91C_ID_US2   ,PMC_PC_BASE ) as US2,
+               new HplSam3PeripheralClockP(AT91C_ID_US3   ,PMC_PC_BASE ) as US3,
+               new HplSam3PeripheralClockP(AT91C_ID_MCI0  ,PMC_PC_BASE ) as MCI0,
+               new HplSam3PeripheralClockP(AT91C_ID_TWI0  ,PMC_PC_BASE ) as TWI0,
+               new HplSam3PeripheralClockP(AT91C_ID_TWI1  ,PMC_PC_BASE ) as TWI1,
+               new HplSam3PeripheralClockP(AT91C_ID_SPI0  ,PMC_PC_BASE ) as SPI0,
+               new HplSam3PeripheralClockP(AT91C_ID_SSC0  ,PMC_PC_BASE ) as SSC0,
+               new HplSam3PeripheralClockP(AT91C_ID_TC0   ,PMC_PC_BASE ) as TC0,
+               new HplSam3PeripheralClockP(AT91C_ID_TC1   ,PMC_PC_BASE ) as TC1,
+               new HplSam3PeripheralClockP(AT91C_ID_TC2   ,PMC_PC_BASE ) as TC2,
+               new HplSam3PeripheralClockP(AT91C_ID_PWMC  ,PMC_PC_BASE ) as PWMC,
+               new HplSam3PeripheralClockP(AT91C_ID_ADC12B,PMC_PC_BASE ) as ADC12B,
+               new HplSam3PeripheralClockP(AT91C_ID_ADC   ,PMC_PC_BASE ) as ADC,
+               new HplSam3PeripheralClockP(AT91C_ID_HDMA  ,PMC_PC_BASE ) as HDMA,
+               new HplSam3PeripheralClockP(AT91C_ID_UDPHS ,PMC_PC_BASE ) as UDPHS;
+
+    HplSam3Clock = HplSam3uClockP;
+
+    RTCPCCntl   = RTC.Cntl;
+    RTTPPCntl   = RTT.Cntl;
+    WDGPPCntl   = WDG.Cntl;
+    PMCPPCntl   = PMC.Cntl;
+    EFC0PPCntl  = EFC0.Cntl;
+    EFC1PPCntl  = EFC1.Cntl;
+    DBGUPPCntl  = DBGU.Cntl;
+    HSMC4PPCntl = HSMC4.Cntl;
+    PIOAPPCntl  = PIOA.Cntl;
+    PIOBPPCntl  = PIOB.Cntl;
+    PIOCPPCntl  = PIOC.Cntl;
+    US0PPCntl   = US0.Cntl;
+    US1PPCntl   = US1.Cntl;
+    US2PPCntl   = US2.Cntl;
+    US3PPCntl   = US3.Cntl;
+    MCI0PPCntl  = MCI0.Cntl;
+    TWI0PPCntl  = TWI0.Cntl;
+    TWI1PPCntl  = TWI1.Cntl;
+    SPI0PPCntl  = SPI0.Cntl;
+    SSC0PPCntl  = SSC0.Cntl;
+    TC0PPCntl   = TC0.Cntl;
+    TC1PPCntl   = TC1.Cntl;
+    TC2PPCntl   = TC2.Cntl;
+    PWMCPPCntl  = PWMC.Cntl;
+    ADC12BPPCntl= ADC12B.Cntl;
+    ADCPPCntl   = ADC.Cntl;
+    HDMAPPCntl  = HDMA.Cntl;
+    UDPHSPPCntl = UDPHS.Cntl;
+
+  components McuSleepC;
+  McuSleepC.HplSam3Clock -> HplSam3uClockP;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/pmc/HplSam3uClockP.nc b/tos/chips/cortex/m3/sam3/u/pmc/HplSam3uClockP.nc
new file mode 100644
index 00000000..70f19254
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/pmc/HplSam3uClockP.nc
@@ -0,0 +1,425 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is a low-level clock component controlling the different clock
+ * systems.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "sam3upmchardware.h"
+#include "sam3usupchardware.h"
+
+#define CLOCK_TIMEOUT 0xFFFFFFFF
+
+module HplSam3uClockP
+{
+    provides
+    {
+        interface HplSam3Clock;
+    }
+}
+
+implementation
+{
+
+    async command error_t HplSam3Clock.slckExternalOsc()
+    {
+        uint32_t timeout = 0;
+
+        if(SUPC->sr.bits.oscsel == 0)
+        {
+            supc_cr_t cr;
+            cr.flat = 0; // assure it is all zero!
+            cr.bits.xtalsel = 1;
+            cr.bits.key = SUPC_CR_KEY;
+
+            SUPC->cr = cr;
+
+            timeout = 0;
+            while (!(SUPC->sr.bits.oscsel) && (timeout++ < CLOCK_TIMEOUT));
+        }
+
+        return SUCCESS;
+    }
+
+    async command error_t HplSam3Clock.slckRCOsc()
+    {
+        uint32_t timeout = 0;
+
+        if(SUPC->sr.bits.oscsel == 1)
+        {
+            supc_cr_t cr;
+            cr.flat = 0; // assure it is all zero!
+            cr.bits.xtalsel = 0;
+            cr.bits.key = SUPC_CR_KEY;
+
+            SUPC->cr = cr;
+
+            timeout = 0;
+            while (!(SUPC->sr.bits.oscsel) && (timeout++ < CLOCK_TIMEOUT));
+        }
+
+       return SUCCESS;
+    }
+
+    async command error_t HplSam3Clock.mckInit48()
+    {
+        pmc_mor_t mor;
+        pmc_mckr_t mckr;
+        pmc_pllar_t pllar;
+        uint32_t timeout = 0;
+
+       // Check if MCK source is RC or XT
+        if(PMC->mor.bits.moscsel == 0)
+        {
+            // it is RC, turn on XT
+            mor.flat = 0; // make sure it is zreoed out
+            mor.bits.key = PMC_MOR_KEY;
+            mor.bits.moscxtst = 0x3F; // main oscillator startup time
+            mor.bits.moscrcen = 1;    // enable the on-chip rc oscillator
+            mor.bits.moscxten = 1;    // main crystal oscillator enable
+            PMC->mor = mor;
+
+            timeout = 0;
+            while (!(PMC->sr.bits.moscxts) && (timeout++ < CLOCK_TIMEOUT));
+        }
+
+        // Switch to XT
+        mor.flat = 0; // make sure it is zeroed
+        mor.bits.key = PMC_MOR_KEY;
+        mor.bits.moscxtst = 0x3F;
+        mor.bits.moscrcen = 1;
+        mor.bits.moscxten = 1;
+        mor.bits.moscsel = 1;
+        PMC->mor = mor;
+        timeout = 0;
+        while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT));
+        mckr = PMC->mckr;
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        // Initialize PLLA
+        pllar.flat = 0; // make sure it is zeroed out
+        pllar.bits.bit29 = 1; // we always have to do this!
+        pllar.bits.mula = 0x3; // multiplication is MULA+1 => 12x4 = 48MHz
+        pllar.bits.pllacount = 0x3F;
+        pllar.bits.diva = 0x1; // divider is bypassed
+        //pllar.bits.stmode = PMC_PLLAR_STMODE_FAST_STARTUP; // no longer exists!
+        PMC->pllar = pllar;
+        timeout = 0;
+        while (!(PMC->sr.bits.locka) && (timeout++ < CLOCK_TIMEOUT));
+
+        // Switch to fast clock
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        mckr.bits.pres = PMC_MCKR_PRES_DIV_1;
+        mckr.bits.css = PMC_MCKR_CSS_PLLA_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        signal HplSam3Clock.mainClockChanged();
+
+        return SUCCESS;
+    }
+
+    async command error_t HplSam3Clock.mckInit84()
+    {
+        pmc_mor_t mor;
+        pmc_mckr_t mckr;
+        pmc_pllar_t pllar;
+        uint32_t timeout = 0;
+
+       // Check if MCK source is RC or XT
+        if(PMC->mor.bits.moscsel == 0)
+        {
+            // it is RC, turn on XT
+            mor.flat = 0; // make sure it is zreoed out
+            mor.bits.key = PMC_MOR_KEY;
+            mor.bits.moscxtst = 0x3F; // main oscillator startup time
+            mor.bits.moscrcen = 1;    // enable the on-chip rc oscillator
+            mor.bits.moscxten = 1;    // main crystal oscillator enable
+            PMC->mor = mor;
+
+            timeout = 0;
+            while (!(PMC->sr.bits.moscxts) && (timeout++ < CLOCK_TIMEOUT));
+        }
+
+        // Switch to XT
+        mor.flat = 0; // make sure it is zeroed
+        mor.bits.key = PMC_MOR_KEY;
+        mor.bits.moscxtst = 0x3F;
+        mor.bits.moscrcen = 1;
+        mor.bits.moscxten = 1;
+        mor.bits.moscsel = 1;
+        PMC->mor = mor;
+        timeout = 0;
+        while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT));
+        mckr = PMC->mckr;
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        // Initialize PLLA
+        pllar.flat = 0; // make sure it is zeroed out
+        pllar.bits.bit29 = 1; // we always have to do this!
+        pllar.bits.mula = 0x6; // multiplication is MULA+1 => 12x7 = 84MHz
+        pllar.bits.pllacount = 0x3F;
+        pllar.bits.diva = 0x1; // divider is bypassed
+        //pllar.bits.stmode = PMC_PLLAR_STMODE_FAST_STARTUP;
+        PMC->pllar = pllar;
+        timeout = 0;
+        while (!(PMC->sr.bits.locka) && (timeout++ < CLOCK_TIMEOUT));
+
+        // Switch to fast clock
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        mckr.bits.pres = PMC_MCKR_PRES_DIV_1;
+        mckr.bits.css = PMC_MCKR_CSS_PLLA_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        signal HplSam3Clock.mainClockChanged();
+        return SUCCESS;
+    }
+
+    async command error_t HplSam3Clock.mckInit96()
+    {
+        pmc_mor_t mor;
+        pmc_mckr_t mckr;
+        pmc_pllar_t pllar;
+        uint32_t timeout = 0;
+
+       // Check if MCK source is RC or XT
+        if(PMC->mor.bits.moscsel == 0)
+        {
+            // it is RC, turn on XT
+            mor.flat = 0; // make sure it is zreoed out
+            mor.bits.key = PMC_MOR_KEY;
+            mor.bits.moscxtst = 0x3F; // main oscillator startup time
+            mor.bits.moscrcen = 1;    // enable the on-chip rc oscillator
+            mor.bits.moscxten = 1;    // main crystal oscillator enable
+            PMC->mor = mor;
+
+            timeout = 0;
+            while (!(PMC->sr.bits.moscxts) && (timeout++ < CLOCK_TIMEOUT));
+        }
+
+        // Switch to XT
+        mor.flat = 0; // make sure it is zeroed
+        mor.bits.key = PMC_MOR_KEY;
+        mor.bits.moscxtst = 0x3F;
+        mor.bits.moscrcen = 1;
+        mor.bits.moscxten = 1;
+        mor.bits.moscsel = 1;
+        PMC->mor = mor;
+        timeout = 0;
+        while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT));
+        mckr = PMC->mckr;
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        // Initialize PLLA
+        pllar.flat = 0; // make sure it is zeroed out
+        pllar.bits.bit29 = 1; // we always have to do this!
+        pllar.bits.mula = 0x7; // multiplication is MULA+1 => 12x8 = 96MHz
+        pllar.bits.pllacount = 0x3F;
+        pllar.bits.diva = 0x1; // divider is bypassed
+        //pllar.bits.stmode = PMC_PLLAR_STMODE_FAST_STARTUP;
+        PMC->pllar = pllar;
+        timeout = 0;
+        while (!(PMC->sr.bits.locka) && (timeout++ < CLOCK_TIMEOUT));
+
+        // Switch to fast clock
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        mckr.bits.pres = PMC_MCKR_PRES_DIV_1;
+        mckr.bits.css = PMC_MCKR_CSS_PLLA_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        signal HplSam3Clock.mainClockChanged();
+        return SUCCESS;
+    }
+
+
+    async command error_t HplSam3Clock.mckInit4RC(){
+      pmc_mor_t mor;
+      pmc_mckr_t mckr;
+      pmc_pllar_t pllar;
+      uint32_t timeout = 0;
+
+      // Check if MCK source is RC or XT
+      if(PMC->mor.bits.moscsel == 1){
+	// it is XT, turn on RC
+	mor.flat = 0; // make sure it is zreoed out
+	mor.bits.key = PMC_MOR_KEY;
+	mor.bits.moscrcf = 0;     // select 4 MHz RC 
+	mor.bits.moscrcen = 1;    // enable the on-chip rc oscillator
+	mor.bits.moscxten = 1;    // main crystal oscillator enable
+	PMC->mor = mor;
+	timeout = 0;
+	while (!(PMC->sr.bits.moscrcs) && (timeout++ < 0xFFFFFFFF));
+      }
+
+      // Switch to RC
+      mor.flat = 0; // make sure it is zeroed
+      mor.bits.key = PMC_MOR_KEY;
+      mor.bits.moscrcf = 0;     // select 4 MHz RC 
+      mor.bits.moscrcen = 1;
+      mor.bits.moscxten = 1;
+      mor.bits.moscsel = 0;
+      PMC->mor = mor;
+      timeout = 0;
+      while (!(PMC->sr.bits.moscsels) && (timeout++ < 0xFFFFFFFF));
+      mckr = PMC->mckr;
+      mckr.bits.pres = PMC_MCKR_PRES_DIV_1;
+      mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+      PMC->mckr = mckr;
+      timeout = 0;
+      while (!(PMC->sr.bits.mckrdy) && (timeout++ < 0xFFFFFFFF));
+
+      // turn off external clock
+      mor.bits.moscxten = 0;
+      PMC->mor = mor;
+
+      // Turn off PLL
+      pllar.flat = 0; // make sure it is zeroed out
+      pllar.bits.bit29 = 1; // this always has to be written as 1!
+      PMC->pllar = pllar;
+
+      signal HplSam3Clock.mainClockChanged();
+      return SUCCESS;
+
+    }
+
+
+    async command error_t HplSam3Clock.mckInit12RC()
+    {
+        pmc_mor_t mor;
+        pmc_mckr_t mckr;
+        pmc_pllar_t pllar;
+        uint32_t timeout = 0;
+
+        // Check if MCK source is RC or XT
+        if(PMC->mor.bits.moscsel == 1)
+        {
+            // it is XT, turn on RC
+            mor.flat = 0; // make sure it is zreoed out
+            mor.bits.key = PMC_MOR_KEY;
+            mor.bits.moscrcf = 3;     // select 12 MHz RC 
+            mor.bits.moscrcen = 1;    // enable the on-chip rc oscillator
+            mor.bits.moscxten = 1;    // main crystal oscillator enable
+            PMC->mor = mor;
+
+            timeout = 0;
+            while (!(PMC->sr.bits.moscrcs) && (timeout++ < CLOCK_TIMEOUT));
+        }
+
+        // Switch to RC
+        mor.flat = 0; // make sure it is zeroed
+        mor.bits.key = PMC_MOR_KEY;
+        mor.bits.moscrcf = 3;     // select 12 MHz RC 
+        mor.bits.moscrcen = 1;
+        mor.bits.moscxten = 1;
+        mor.bits.moscsel = 0;
+        PMC->mor = mor;
+        timeout = 0;
+        while (!(PMC->sr.bits.moscsels) && (timeout++ < CLOCK_TIMEOUT));
+        mckr = PMC->mckr;
+        mckr.bits.pres = PMC_MCKR_PRES_DIV_1;
+        mckr.bits.css = PMC_MCKR_CSS_MAIN_CLOCK;
+        PMC->mckr = mckr;
+        timeout = 0;
+        while (!(PMC->sr.bits.mckrdy) && (timeout++ < CLOCK_TIMEOUT));
+
+        // turn off external clock
+        mor.bits.moscxten = 0;
+        PMC->mor = mor;
+        
+        // Turn off PLL
+        pllar.flat = 0; // make sure it is zeroed out
+        pllar.bits.bit29 = 1; // this always has to be written as 1!
+        PMC->pllar = pllar;
+
+        signal HplSam3Clock.mainClockChanged();
+        return SUCCESS;
+    }
+
+    async command uint32_t HplSam3Clock.getMainClockSpeed()
+    {
+        uint32_t speed = 0;
+        switch(PMC->mckr.bits.css)
+        {
+            case PMC_MCKR_CSS_SLOW_CLOCK:
+                speed = 32;
+                break;
+
+            case PMC_MCKR_CSS_MAIN_CLOCK:
+                speed = PMC->mcfr.bits.mainf*2048/1000; // 0.48828 corresponds to 16 clock ticks of a 32kHz crystal.
+                break;
+
+            case PMC_MCKR_CSS_PLLA_CLOCK:
+                if(PMC->pllar.bits.diva != 0)
+                {
+                    // note, the PLL multiplier is (mula + 1)
+                    speed = PMC->mcfr.bits.mainf*2048/1000 * (PMC->pllar.bits.mula + 1) / PMC->pllar.bits.diva;
+                    //speed = PMC->mcfr.bits.mainf*1000/488 * (PMC->pllar.bits.mula + 1) / PMC->pllar.bits.diva;
+                } else
+                    speed = 0;
+                break;
+            default:
+                speed = 0;
+        }
+
+        return speed;
+    }
+
+    default async event void HplSam3Clock.mainClockChanged(){}
+}
diff --git a/tos/chips/cortex/m3/sam3/u/pmc/sam3upmchardware.h b/tos/chips/cortex/m3/sam3/u/pmc/sam3upmchardware.h
new file mode 100644
index 00000000..1140eea3
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/pmc/sam3upmchardware.h
@@ -0,0 +1,244 @@
+/*
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Sam3u specific PMC registers
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3UPMCHARDWARE_H
+#define SAM3UPMCHARDWARE_H
+
+#include "pmchardware.h"
+
+
+/**
+ * PMC Peripheral Clock Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 485
+ * 0: no effect
+ * 1: enable corresponding peripheral clock
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t reserved0 : 2;
+        uint8_t rtc       : 1; // not used after datasheet
+        uint8_t rtt       : 1; // not used after datasheet
+        uint8_t wdg       : 1; // not used after datasheet
+        uint8_t pmc       : 1; // not used after datasheet
+        uint8_t efc0      : 1; // not used after datasheet
+        uint8_t efc1      : 1; // not used after datasheet
+        uint8_t dbgu      : 1;
+        uint8_t hsmc4     : 1;
+        uint8_t pioa      : 1;
+        uint8_t piob      : 1;
+        uint8_t pioc      : 1;
+        uint8_t us0       : 1;
+        uint8_t us1       : 1;
+        uint8_t us2       : 1;
+        uint8_t us3       : 1;
+        uint8_t mci0      : 1;
+        uint8_t twi0      : 1;
+        uint8_t twi1      : 1;
+        uint8_t spi0      : 1;
+        uint8_t ssc0      : 1;
+        uint8_t tc0       : 1;
+        uint8_t tc1       : 1;
+        uint8_t tc2       : 1;
+        uint8_t pwmc      : 1;
+        uint8_t adc12b    : 1;
+        uint8_t adc       : 1;
+        uint8_t hdma      : 1;
+        uint8_t udphs     : 1;
+        uint8_t pid30     : 1; // not used on sam3u
+        uint8_t pid31     : 1; // not use don sam3u
+    } __attribute__((__packed__)) bits;
+} pmc_pcer_t;
+
+/**
+ * PMC Peripheral Clock Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 486
+ * 0: no effect
+ * 1: disable corresponding peripheral clock
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t reserved0 : 2;
+        uint8_t rtc       : 1; // not used after datasheet
+        uint8_t rtt       : 1; // not used after datasheet
+        uint8_t wdg       : 1; // not used after datasheet
+        uint8_t pmc       : 1; // not used after datasheet
+        uint8_t efc0      : 1; // not used after datasheet
+        uint8_t efc1      : 1; // not used after datasheet
+        uint8_t dbgu      : 1;
+        uint8_t hsmc4     : 1;
+        uint8_t pioa      : 1;
+        uint8_t piob      : 1;
+        uint8_t pioc      : 1;
+        uint8_t us0       : 1;
+        uint8_t us1       : 1;
+        uint8_t us2       : 1;
+        uint8_t us3       : 1;
+        uint8_t mci0      : 1;
+        uint8_t twi0      : 1;
+        uint8_t twi1      : 1;
+        uint8_t spi0      : 1;
+        uint8_t ssc0      : 1;
+        uint8_t tc0       : 1;
+        uint8_t tc1       : 1;
+        uint8_t tc2       : 1;
+        uint8_t pwmc      : 1;
+        uint8_t adc12b    : 1;
+        uint8_t adc       : 1;
+        uint8_t hdma      : 1;
+        uint8_t udphs     : 1;
+        uint8_t pid30     : 1; // not used on sam3u
+        uint8_t pid31     : 1; // not use don sam3u
+    } __attribute__((__packed__)) bits;
+} pmc_pcdr_t;
+
+/**
+ * PMC Peripheral Clock Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 487
+ * 0: peripheral clock disabled
+ * 1: peripheral clock enabled
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t reserved0 : 2;
+        uint8_t rtc       : 1; // not used after datasheet
+        uint8_t rtt       : 1; // not used after datasheet
+        uint8_t wdg       : 1; // not used after datasheet
+        uint8_t pmc       : 1; // not used after datasheet
+        uint8_t efc0      : 1; // not used after datasheet
+        uint8_t efc1      : 1; // not used after datasheet
+        uint8_t dbgu      : 1;
+        uint8_t hsmc4     : 1;
+        uint8_t pioa      : 1;
+        uint8_t piob      : 1;
+        uint8_t pioc      : 1;
+        uint8_t us0       : 1;
+        uint8_t us1       : 1;
+        uint8_t us2       : 1;
+        uint8_t us3       : 1;
+        uint8_t mci0      : 1;
+        uint8_t twi0      : 1;
+        uint8_t twi1      : 1;
+        uint8_t spi0      : 1;
+        uint8_t ssc0      : 1;
+        uint8_t tc0       : 1;
+        uint8_t tc1       : 1;
+        uint8_t tc2       : 1;
+        uint8_t pwmc      : 1;
+        uint8_t adc12b    : 1;
+        uint8_t adc       : 1;
+        uint8_t hdma      : 1;
+        uint8_t udphs     : 1;
+        uint8_t pid30     : 1; // not used on sam3u
+        uint8_t pid31     : 1; // not use don sam3u
+    } __attribute__((__packed__)) bits;
+} pmc_pcsr_t;
+
+/**
+ * PMC UTMI Clock Configuration Register, AT91 ARM Cortex-M3 based Microcontrollers
+ * SAM3U Series, Preliminary, p. 488
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint16_t reserved0: 16;
+        uint8_t upllen    :  1; // UTMI PLL enable
+        uint8_t reserved1 :  3;
+        uint8_t upllcount :  4; // UTMI PLL Start-up Time (in number of slow clock cycles times 8
+        uint8_t reserved2 :  8; 
+    } __attribute__((__packed__)) bits;
+} pmc_uckr_t;
+
+typedef struct
+{
+    volatile pmc_pcer_t pcer; // Peripheral Clock Enable Register
+    volatile pmc_pcdr_t pcdr; // Peripheral Clock Disable Register
+    volatile pmc_pcsr_t pcsr; // Peripheral Clock Status Register
+} pmc_pc_t;
+
+/**
+ * PMC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary, p. 481
+ */
+typedef struct pmc
+{
+    volatile pmc_scer_t   scer;  // System Clock Enable Register
+    volatile pmc_scdr_t   scdr;  // System Clock Disable Register
+    volatile pmc_scsr_t   scsr;  // System Clock Status Register
+    uint32_t reserved0;
+    volatile pmc_pc_t     pc;    // Peripheral Clock Control Registers
+    volatile pmc_uckr_t   uckr;  // UTMI Clock Register
+    volatile pmc_mor_t    mor;   // Main Oscillator Register
+    volatile pmc_mcfr_t   mcfr;  // Main Clock Frequency Register
+    volatile pmc_pllar_t  pllar; // PLLA Register
+    uint32_t reserved1;
+    volatile pmc_mckr_t   mckr;  // Master Clock Register
+    uint32_t reserved2[3];
+    volatile pmc_pck_t   pck0;  // Programmable Clock 0 Register
+    volatile pmc_pck_t   pck1;  // Programmable Clock 1 Register
+    volatile pmc_pck_t   pck2;  // Programmable Clock 2 Register
+    uint32_t reserved3[5];
+    volatile pmc_ier_t    ier;   // Interrupt Enable Register
+    volatile pmc_idr_t    idr;   // Interrupt Disable Register
+    volatile pmc_sr_t     sr;    // Status Register
+    volatile pmc_imr_t    imr;   // Interrupt Mask Register
+    volatile pmc_fsmr_t   fsmr;  // Fast Startup Mode Register
+    volatile pmc_fspr_t   fspr;  // Fast Startup Polarity Register
+    volatile pmc_focr_t   focr;  // Fault Output Clear Register
+    uint32_t reserved5[26];
+    volatile pmc_wpmr_t   wpmr;  // Write Protect Mode Register
+    volatile pmc_wpsr_t   wpsr;  // Write Protect Status Register   
+} pmc_t;
+
+/**
+ * Memory mapping for the PMC
+ */
+volatile pmc_t* PMC = (volatile pmc_t *) 0x400E0400; // PMC Base Address
+
+#endif //SAM3UPMCHARDWARE_H
+
+
diff --git a/tos/chips/cortex/m3/sam3/u/sam3uhardware.h b/tos/chips/cortex/m3/sam3/u/sam3uhardware.h
new file mode 100644
index 00000000..d4a376aa
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/sam3uhardware.h
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Definitions specific to the SAM3U MCU.
+ * Includes interrupt enable/disable routines for nesC.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#ifndef SAM3U_HARDWARE_H
+#define SAM3U_HARDWARE_H
+
+#include <cortexm3hardware.h>
+
+// Peripheral ID definitions for the SAM3U
+//  Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 41
+#define AT91C_ID_SUPC   ( 0) // SUPPLY CONTROLLER
+#define AT91C_ID_RSTC   ( 1) // RESET CONTROLLER
+#define AT91C_ID_RTC    ( 2) // REAL TIME CLOCK
+#define AT91C_ID_RTT    ( 3) // REAL TIME TIMER
+#define AT91C_ID_WDG    ( 4) // WATCHDOG TIMER
+#define AT91C_ID_PMC    ( 5) // PMC
+#define AT91C_ID_EFC0   ( 6) // EFC0
+#define AT91C_ID_EFC1   ( 7) // EFC1
+#define AT91C_ID_DBGU   ( 8) // DBGU
+#define AT91C_ID_HSMC4  ( 9) // HSMC4
+#define AT91C_ID_PIOA   (10) // Parallel IO Controller A
+#define AT91C_ID_PIOB   (11) // Parallel IO Controller B
+#define AT91C_ID_PIOC   (12) // Parallel IO Controller C
+#define AT91C_ID_US0    (13) // USART 0
+#define AT91C_ID_US1    (14) // USART 1
+#define AT91C_ID_US2    (15) // USART 2
+#define AT91C_ID_US3    (16) // USART 3
+#define AT91C_ID_MCI0   (17) // Multimedia Card Interface
+#define AT91C_ID_TWI0   (18) // TWI 0
+#define AT91C_ID_TWI1   (19) // TWI 1
+#define AT91C_ID_SPI0   (20) // Serial Peripheral Interface
+#define AT91C_ID_SSC0   (21) // Serial Synchronous Controller 0
+#define AT91C_ID_TC0    (22) // Timer Counter 0
+#define AT91C_ID_TC1    (23) // Timer Counter 1
+#define AT91C_ID_TC2    (24) // Timer Counter 2
+#define AT91C_ID_PWMC   (25) // Pulse Width Modulation Controller
+#define AT91C_ID_ADC12B (26) // 12-bit ADC Controller (ADC12B)
+#define AT91C_ID_ADC    (27) // 10-bit ADC Controller (ADC)
+#define AT91C_ID_HDMA   (28) // HDMA
+#define AT91C_ID_UDPHS  (29) // USB Device High Speed
+
+#define SAM3U_PERIPHERALA (0x400e0c00)
+#define SAM3U_PERIPHERALB (0x400e0e00)
+#define SAM3U_PERIPHERALC (0x400e1000)
+
+#define TOSH_ASSIGN_PIN(name, port, bit) \
+static inline void TOSH_SET_##name##_PIN() \
+  {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x030)) = (1 << bit);} \
+static inline void TOSH_CLR_##name##_PIN() \
+  {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x034)) = (1 << bit);} \
+static inline int TOSH_READ_##name##_PIN() \
+  { \
+    /* Read bit from Output Status Register */ \
+    uint32_t currentport = *((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x018)); \
+    uint32_t currentpin = (currentport & (1 << bit)) >> bit; \
+    bool isInput = ((currentpin & 1) == 0); \
+    if (isInput == 1) { \
+            /* Read bit from Pin Data Status Register */ \
+            currentport = *((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x03c)); \
+            currentpin = (currentport & (1 << bit)) >> bit; \
+            return ((currentpin & 1) == 1); \
+    } else { \
+            /* Read bit from Output Data Status Register */ \
+            currentport = *((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x038)); \
+            currentpin = (currentport & (1 << bit)) >> bit; \
+            return ((currentpin & 1) == 1); \
+    } \
+  } \
+static inline void TOSH_MAKE_##name##_OUTPUT() \
+  {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x010)) = (1 << bit);} \
+static inline void TOSH_MAKE_##name##_INPUT() \
+  {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x014)) = (1 << bit);}
+
+#define TOSH_ASSIGN_OUTPUT_ONLY_PIN(name, port, bit) \
+static inline void TOSH_SET_##name##_PIN() \
+  {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x030)) = (1 << bit);} \
+static inline void TOSH_CLR_##name##_PIN() \
+  {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x034)) = (1 << bit);} \
+static inline void TOSH_MAKE_##name##_OUTPUT() \
+  {*((volatile uint32_t *) (SAM3U_PERIPHERAL##port + 0x010)) = (1 << bit);} \
+
+#define TOSH_ALIAS_OUTPUT_ONLY_PIN(alias, connector)\
+static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \
+static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \
+static inline void TOSH_MAKE_##alias##_OUTPUT() {} \
+
+#define TOSH_ALIAS_PIN(alias, connector) \
+static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \
+static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \
+static inline char TOSH_READ_##alias##_PIN() {return TOSH_READ_##connector##_PIN();} \
+static inline void TOSH_MAKE_##alias##_OUTPUT() {TOSH_MAKE_##connector##_OUTPUT();} \
+
+#endif // SAM3U_HARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/u/smc/sam3smchardware.h b/tos/chips/cortex/m3/sam3/u/smc/sam3smchardware.h
new file mode 100644
index 00000000..76f28091
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/smc/sam3smchardware.h
@@ -0,0 +1,108 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Static Memory Controller Register Definitions
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef _SAM3USMCHARDWARE_H
+#define _SAM3USMCHARDWARE_H
+
+#include "smchardware.h"
+
+/**
+ *  SMC TIMINGS Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 
+ */
+
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t tclr        : 4; // cle to ren low delay
+        uint32_t tadl        : 4; // ale to data start
+        uint32_t tar         : 4; // ale to ren low delay
+        uint32_t ocms        : 1; // off chip memory scrambling enable
+        uint32_t reserved0   : 3;
+        uint32_t trr         : 4; // ready to ren low delay
+        uint32_t reserved1   : 4;
+        uint32_t twb         : 4; // wen high to ren to busy
+        uint32_t rbnsel      : 3; // ready/busy line selection
+        uint32_t nfsel       : 1; // nand flash selection
+    } __attribute__((__packed__)) bits;
+} smc_timings_t;
+
+/**
+ *  SMC MODE Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint32_t read_mode    : 1; // read mode
+        uint32_t write_mode   : 1; // write mode
+        uint32_t reserved0    : 2;
+        uint32_t exnw_mode    : 2; // nwait mode
+        uint32_t reserved1    : 2;
+        uint32_t bat          : 1; // byte access type
+        uint32_t reserved2    : 3;
+        uint32_t dbw          : 1; // data bus width
+        uint32_t reserved3    : 3;
+        uint32_t tdf_cycles   : 4; // data float time
+        uint32_t tdf_mode     : 1; // tdf optimization
+        uint32_t reserved4    : 3;
+        uint32_t pmen         : 1; // page mode enable (note, not in documentation, but in code at91lib!)
+        uint32_t reserved5    : 3;
+        uint32_t ps           : 2; // page mode size (note: not in documentation, but in code at91lib!)
+        uint32_t reserved6    : 3;
+    } __attribute__((__packed__)) bits;
+} smc_mode_t;
+
+typedef struct
+{
+    volatile smc_setup_t setup;
+    volatile smc_pulse_t pulse;
+    volatile smc_cycle_t cycle;
+    volatile smc_timings_t timings;
+    volatile smc_mode_t mode;
+} smc_cs_t;
+
+volatile smc_cs_t* SMC_CS0 = (volatile smc_cs_t*)0x400E0070; 
+volatile smc_cs_t* SMC_CS1 = (volatile smc_cs_t*)0x400E0084; 
+volatile smc_cs_t* SMC_CS2 = (volatile smc_cs_t*)0x400E0098; 
+volatile smc_cs_t* SMC_CS3 = (volatile smc_cs_t*)0x400E00AC; 
+
+#endif //_SAM3USMCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/u/spi/FastSpiSam3uC.nc b/tos/chips/cortex/m3/sam3/u/spi/FastSpiSam3uC.nc
new file mode 100644
index 00000000..63b4648a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/FastSpiSam3uC.nc
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Emulate fast spi with SpiByte
+ */
+generic module FastSpiSam3uC(char resourceName[])
+{
+    provides
+    {
+        interface FastSpiByte[uint8_t];
+    }
+    uses
+    {
+        interface SpiByte[uint8_t];
+    }
+}
+
+implementation
+{
+    enum 
+    {
+        NUM_CLIENTS = uniqueCount(resourceName)
+    };
+
+    volatile uint8_t lastRead[NUM_CLIENTS];
+
+    /**
+     * Starts a split-phase SPI data transfer with the given data.
+     * A splitRead/splitReadWrite command must follow this command even 
+     * if the result is unimportant.
+     */
+    async command void FastSpiByte.splitWrite[uint8_t id](uint8_t data){
+        atomic lastRead[id] = call SpiByte.write[id](data);
+    }
+
+    /**
+     * Finishes the split-phase SPI data transfer by waiting till 
+     * the write command comletes and returning the received data.
+     */
+    async command uint8_t FastSpiByte.splitRead[uint8_t id](){
+        atomic return lastRead[id];
+    }
+
+    /**
+     * This command first reads the SPI register and then writes
+     * there the new data, then returns. 
+     */
+    async command uint8_t FastSpiByte.splitReadWrite[uint8_t id](uint8_t data){
+        uint8_t tmp;
+        atomic {
+            tmp = lastRead[id];
+            lastRead[id] = call SpiByte.write[id](data);
+        }
+        return tmp;
+    }
+
+    /**
+     * This is the standard SpiByte.write command but a little
+     * faster as we should not need to adjust the power state there.
+     * (To be consistent, this command could have be named splitWriteRead).
+     */
+    async command uint8_t FastSpiByte.write[uint8_t id](uint8_t data){
+        return call SpiByte.write[id](data);
+    }
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/spi/HilSam3uSpiC.nc b/tos/chips/cortex/m3/sam3/u/spi/HilSam3uSpiC.nc
new file mode 100644
index 00000000..d23b3575
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/HilSam3uSpiC.nc
@@ -0,0 +1,100 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SPI Configuration for the SAM3U-EK devkit. Does not use DMA (PDC) at this
+ * point. Byte interface performs busy wait!
+ *
+ * @author Thomas Schmid
+ * @author Kevin Klues
+ */
+
+#include <sam3uspihardware.h>
+
+configuration HilSam3uSpiC
+{
+    provides
+    {
+        interface Resource[uint8_t];
+        interface SpiByte[uint8_t];
+	interface FastSpiByte[uint8_t];
+        interface SpiPacket[uint8_t];
+	interface HplSam3uSpiChipSelConfig[uint8_t];
+	interface HplSam3uSpiConfig;
+    }
+    uses {
+        interface Init as SpiChipInit;
+        interface ResourceConfigure[uint8_t];
+    }
+}
+implementation
+{
+    components RealMainP;
+    RealMainP.PlatformInit -> HilSam3uSpiP.Init;
+
+    components HplSam3uSpiC;
+    HplSam3uSpiConfig = HplSam3uSpiC;
+    HilSam3uSpiP.SpiChipInit = SpiChipInit;
+    HilSam3uSpiP.HplSam3uSpiConfig -> HplSam3uSpiC;
+    HilSam3uSpiP.HplSam3uSpiControl -> HplSam3uSpiC;
+    HilSam3uSpiP.HplSam3uSpiStatus -> HplSam3uSpiC;
+    HilSam3uSpiP.HplSam3uSpiInterrupts -> HplSam3uSpiC;
+    HplSam3uSpiChipSelConfig[0] =  HplSam3uSpiC.HplSam3uSpiChipSelConfig0;
+    HplSam3uSpiChipSelConfig[1] =  HplSam3uSpiC.HplSam3uSpiChipSelConfig1;
+    HplSam3uSpiChipSelConfig[2] =  HplSam3uSpiC.HplSam3uSpiChipSelConfig2;
+    HplSam3uSpiChipSelConfig[3] =  HplSam3uSpiC.HplSam3uSpiChipSelConfig3;
+
+    components new FcfsArbiterC(SAM3U_SPI_BUS) as ArbiterC;
+    Resource = ArbiterC;
+    ResourceConfigure = ArbiterC;
+    HilSam3uSpiP.ArbiterInfo -> ArbiterC;
+
+    components new AsyncStdControlPowerManagerC() as PM;
+    PM.AsyncStdControl -> HplSam3uSpiC;
+    PM.ArbiterInfo -> ArbiterC.ArbiterInfo;
+    PM.ResourceDefaultOwner -> ArbiterC.ResourceDefaultOwner;
+
+    components HilSam3uSpiP;
+    SpiByte = HilSam3uSpiP.SpiByte;
+    SpiPacket = HilSam3uSpiP.SpiPacket;
+
+    components new FastSpiSam3uC(SAM3U_SPI_BUS);
+    FastSpiSam3uC.SpiByte -> HilSam3uSpiP.SpiByte;
+    FastSpiByte = FastSpiSam3uC;
+
+    components HplSam3uGeneralIOC;
+    HilSam3uSpiP.SpiPinMiso -> HplSam3uGeneralIOC.HplPioA13;
+    HilSam3uSpiP.SpiPinMosi -> HplSam3uGeneralIOC.HplPioA14;
+    HilSam3uSpiP.SpiPinSpck -> HplSam3uGeneralIOC.HplPioA15;
+
+    components HplNVICC;
+    HilSam3uSpiP.SpiIrqControl -> HplNVICC.SPI0Interrupt;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/spi/HilSam3uSpiP.nc b/tos/chips/cortex/m3/sam3/u/spi/HilSam3uSpiP.nc
new file mode 100644
index 00000000..607bcd5b
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/HilSam3uSpiP.nc
@@ -0,0 +1,173 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SPI implementation for the SAM3U chip. Does not use DMA (PDC) at this
+ * point. Byte interface performs busy wait!
+ *
+ * @author Thomas Schmid
+ * @author Kevin Klues
+ */
+
+#include "sam3uspihardware.h"
+
+module HilSam3uSpiP
+{
+    provides
+    {
+        interface Init;
+        interface SpiByte[uint8_t];
+        interface SpiPacket[uint8_t]; // not supported yet
+    }
+    uses
+    {
+        interface Init as SpiChipInit;
+	interface ArbiterInfo;
+        interface HplSam3uSpiConfig;
+        interface HplSam3uSpiControl;
+        interface HplSam3uSpiInterrupts;
+        interface HplSam3uSpiStatus;
+        interface HplNVICInterruptCntl as SpiIrqControl;
+        interface HplSam3uGeneralIOPin as SpiPinMiso;
+        interface HplSam3uGeneralIOPin as SpiPinMosi;
+        interface HplSam3uGeneralIOPin as SpiPinSpck;
+    }
+}
+implementation
+{
+
+    void signalDone();
+    task void signalDone_task();
+
+    uint8_t* globalTxBuf;
+    uint8_t* globalRxBuf;
+    uint16_t globalLen;
+
+    command error_t Init.init()
+    {
+        // turn off all interrupts
+        call HplSam3uSpiInterrupts.disableAllSpiIrqs();
+
+        // configure NVIC
+        call SpiIrqControl.configure(IRQ_PRIO_SPI);
+        call SpiIrqControl.enable();
+
+        // configure PIO
+        call SpiPinMiso.disablePioControl();
+        call SpiPinMiso.selectPeripheralA();
+        call SpiPinMosi.disablePioControl();
+        call SpiPinMosi.selectPeripheralA();
+        call SpiPinSpck.disablePioControl();
+        call SpiPinSpck.selectPeripheralA();
+
+        // reset the SPI configuration
+        call HplSam3uSpiControl.resetSpi();
+
+        // configure for master
+        call HplSam3uSpiConfig.setMaster();
+
+        // chip select options
+        call HplSam3uSpiConfig.setFixedCS(); // CS needs to be configured for each message sent!
+        //call HplSam3uSpiConfig.setVariableCS(); // CS needs to be configured for each message sent!
+        call HplSam3uSpiConfig.setDirectCS(); // CS pins are not multiplexed
+
+        call SpiChipInit.init();
+        return SUCCESS;
+    }
+
+    async command uint8_t SpiByte.write[uint8_t device]( uint8_t tx)
+    {
+        uint8_t byte;
+        if(!(call ArbiterInfo.userId() == device))
+            return -1;
+        
+        //call HplSam3uSpiChipSelConfig.enableCSActive();
+        call HplSam3uSpiStatus.setDataToTransmit(tx);
+        while(!call HplSam3uSpiStatus.isRxFull());
+        byte = (uint8_t)call HplSam3uSpiStatus.getReceivedData();
+
+        return byte;
+    }
+
+    async command error_t SpiPacket.send[uint8_t device](uint8_t* txBuf, uint8_t* rxBuf, uint16_t len)
+    {
+        uint16_t m_len = len;
+        uint16_t m_pos = 0;
+
+        if(!(call ArbiterInfo.userId() == device))
+            return -1;
+
+        if(len)
+        {
+            while( m_pos < len) 
+            {
+                /**
+                 * FIXME: in order to be compatible with the general TinyOS
+                 * Spi Interface, we can't do automatic CS control!!!
+                if(m_pos == len-1)
+                    call HplSam3uSpiStatus.setDataToTransmitCS(txBuf[m_pos], 3, TRUE);
+                else
+                    call HplSam3uSpiStatus.setDataToTransmitCS(txBuf[m_pos], 3, FALSE);
+                    */
+                call HplSam3uSpiStatus.setDataToTransmitCS(txBuf[m_pos], device, FALSE);
+
+                while(!call HplSam3uSpiStatus.isRxFull());
+                rxBuf[m_pos] = (uint8_t)call HplSam3uSpiStatus.getReceivedData();
+                m_pos += 1;
+            }
+        }
+        atomic {
+            globalRxBuf = rxBuf;
+            globalTxBuf = txBuf;
+            globalLen = m_len;
+        }
+        post signalDone_task();
+        //atomic signal SpiPacket.sendDone(txBuf, rxBuf, m_len, SUCCESS);
+        return SUCCESS;
+    }
+
+    task void signalDone_task() {
+        atomic signalDone();
+    }
+
+
+    void signalDone() {
+        uint8_t device = call ArbiterInfo.userId();
+        signal SpiPacket.sendDone[device](globalTxBuf, globalRxBuf, globalLen, SUCCESS);
+    }
+
+
+    default async event void SpiPacket.sendDone[uint8_t device](uint8_t* tx_buf, 
+                                    uint8_t* rx_buf, uint16_t len, error_t error) {}
+
+    async event void HplSam3uSpiInterrupts.receivedData(uint16_t data) {};
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiC.nc b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiC.nc
new file mode 100644
index 00000000..e1a6feac
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiC.nc
@@ -0,0 +1,82 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The hardware presentation layer for the SAM3U SPI.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "sam3uspihardware.h"
+
+configuration HplSam3uSpiC
+{
+    provides
+    {
+       interface AsyncStdControl;
+       interface HplSam3uSpiConfig; 
+       interface HplSam3uSpiControl; 
+       interface HplSam3uSpiInterrupts; 
+       interface HplSam3uSpiStatus; 
+       interface HplSam3uSpiChipSelConfig as HplSam3uSpiChipSelConfig0;
+       interface HplSam3uSpiChipSelConfig as HplSam3uSpiChipSelConfig1;
+       interface HplSam3uSpiChipSelConfig as HplSam3uSpiChipSelConfig2;
+       interface HplSam3uSpiChipSelConfig as HplSam3uSpiChipSelConfig3;
+    }
+}
+implementation
+{
+    components HplSam3uSpiP;
+    AsyncStdControl = HplSam3uSpiP;
+    HplSam3uSpiConfig = HplSam3uSpiP;
+    HplSam3uSpiControl = HplSam3uSpiP;
+    HplSam3uSpiInterrupts = HplSam3uSpiP;
+    HplSam3uSpiStatus = HplSam3uSpiP;
+    
+    components
+        new HplSam3uSpiChipSelP(0x40008030) as CS0,
+        new HplSam3uSpiChipSelP(0x40008034) as CS1,
+        new HplSam3uSpiChipSelP(0x40008038) as CS2,
+        new HplSam3uSpiChipSelP(0x4000803C) as CS3;
+
+    HplSam3uSpiChipSelConfig0 = CS0;
+    HplSam3uSpiChipSelConfig1 = CS1;
+    HplSam3uSpiChipSelConfig2 = CS2;
+    HplSam3uSpiChipSelConfig3 = CS3;
+
+    components HplSam3uClockC;
+    HplSam3uSpiP.SpiClockControl -> HplSam3uClockC.SPI0PPCntl;
+    HplSam3uSpiP.ClockConfig -> HplSam3uClockC;
+
+    components McuSleepC;
+    HplSam3uSpiP.SpiInterruptWrapper -> McuSleepC;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiChipSelConfig.nc b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiChipSelConfig.nc
new file mode 100644
index 00000000..3d2c7281
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiChipSelConfig.nc
@@ -0,0 +1,96 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to configure the Chip Selects of the SAM3U SPI.
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3uSpiChipSelConfig
+{
+    /**
+     * Set the Clock polarity
+     * 0: inactive state is logic zero
+     * 1: inactive state is logic one
+     */
+    async command error_t setClockPolarity(uint8_t p);
+
+    /**
+     * Set the Clock Phase
+     * 0: changed on leading edge, and captured on following edge
+     * 1: captured on leading edge, and changed on following edge
+     */
+    async command error_t setClockPhase(uint8_t p);
+
+    /**
+     * Disable automatic Chip Select rising between consecutive transmits
+     * (default)
+     */
+    async command error_t disableAutoCS();
+
+    /**
+     * enable automatic Chip Select rising between consecutive transmits.
+     */
+    async command error_t enableAutoCS();
+
+    /**
+     * Enable Chip Select active after transfer (default).
+     */
+    async command error_t enableCSActive();
+
+    /**
+     * Disable Chip Select active after transfer.
+     */
+    async command error_t disableCSActive();
+
+    /**
+     * Set the total amount of bits per transfer. Range is from 8 to 16.
+     */
+    async command error_t setBitsPerTransfer(uint8_t b);
+
+    /**
+     * Set the serial clock baud rate by defining the MCK devider, i.e., baud
+     * rate = MCK/divider.
+     * Acceptable values range from 1 to 255.
+     */
+    async command error_t setBaud(uint8_t divider);
+
+    /**
+     * Set the delay between NPCS ready to first valid SPCK.
+     */
+    async command error_t setClkDelay(uint8_t delay);
+
+    /**
+     * Set the delay between consecutive transfers.
+     */
+    async command error_t setTxDelay(uint8_t delay);
+}
diff --git a/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiChipSelP.nc b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiChipSelP.nc
new file mode 100644
index 00000000..6fb5cbe7
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiChipSelP.nc
@@ -0,0 +1,179 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to control the SAM3U SPI.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "sam3uspihardware.h"
+
+generic module HplSam3uSpiChipSelP(uint32_t csrp)
+{
+    provides
+    {
+       interface HplSam3uSpiChipSelConfig;
+    }
+}
+implementation
+{
+    volatile spi_csr_t *csr = (volatile spi_csr_t*)csrp;
+
+    bool cs;
+
+    /**
+     * Set the Clock polarity
+     * 0: inactive state is logic zero
+     * 1: inactive state is logic one
+     */
+    async command error_t HplSam3uSpiChipSelConfig.setClockPolarity(uint8_t p)
+    {
+        spi_csr_t reg = *csr;
+        if(p > 1)
+            return FAIL;
+        reg.bits.cpol = p;
+        *csr = reg;
+        return SUCCESS;
+    }
+
+    /**
+     * Set the Clock Phase
+     * 0: changed on leading edge, and captured on following edge
+     * 1: captured on leading edge, and changed on following edge
+     */
+    async command error_t HplSam3uSpiChipSelConfig.setClockPhase(uint8_t p)
+    {
+        spi_csr_t reg = *csr;
+        if(p > 1)
+            return FAIL;
+        reg.bits.ncpha = p;
+        *csr = reg;
+        return SUCCESS;
+    }
+
+    /**
+     * Disable automatic Chip Select rising between consecutive transmits
+     * (default)
+     */
+    async command error_t HplSam3uSpiChipSelConfig.disableAutoCS()
+    {
+        spi_csr_t reg = *csr;
+        reg.bits.csnaat = 0;
+        *csr = reg;
+        return SUCCESS;
+    }
+
+    /**
+     * enable automatic Chip Select rising between consecutive transmits.
+     */
+    async command error_t HplSam3uSpiChipSelConfig.enableAutoCS()
+    {
+        spi_csr_t reg = *csr;
+        reg.bits.csnaat = 1;
+        *csr = reg;
+        return SUCCESS;
+    }
+
+    /**
+     * Enable Chip Select active after transfer (default).
+     */
+    async command error_t HplSam3uSpiChipSelConfig.enableCSActive()
+    {
+        spi_csr_t reg = *csr;
+        reg.bits.csaat= 0;
+        *csr = reg;
+        return SUCCESS;
+    }
+
+    /**
+     * Disable Chip Select active after transfer.
+     */
+    async command error_t HplSam3uSpiChipSelConfig.disableCSActive()
+    {
+        spi_csr_t reg = *csr;
+        reg.bits.csaat= 1;
+        *csr = reg;
+        return SUCCESS;
+    }
+
+    /**
+     * Set the total amount of bits per transfer. Range is from 8 to 16.
+     */
+    async command error_t HplSam3uSpiChipSelConfig.setBitsPerTransfer(uint8_t b)
+    {
+        spi_csr_t reg = *csr;
+        if(b > 8)
+            return FAIL;
+        reg.bits.bits = b;
+        *csr = reg;
+        return SUCCESS;
+    }
+
+    /**
+     * Set the serial clock baud rate by defining the MCK devider, i.e., baud
+     * rate = MCK/divider.
+     * Acceptable values range from 1 to 255.
+     */
+    async command error_t HplSam3uSpiChipSelConfig.setBaud(uint8_t divider)
+    {
+        spi_csr_t tcsr = *csr;
+        if(divider == 0)
+            return FAIL;
+        tcsr.bits.scbr = divider;
+        *csr = tcsr;
+        return SUCCESS;
+    }
+
+    /**
+     * Set the delay between NPCS ready to first valid SPCK.
+     */
+    async command error_t HplSam3uSpiChipSelConfig.setClkDelay(uint8_t delay)
+    {
+        spi_csr_t tcsr = *csr;
+        tcsr.bits.dlybs = delay;
+        *csr = tcsr;
+        return SUCCESS;
+    }
+
+    /**
+     * Set the delay between consecutive transfers.
+     */
+    async command error_t HplSam3uSpiChipSelConfig.setTxDelay(uint8_t delay)
+    {
+        spi_csr_t tcsr = *csr;
+        tcsr.bits.dlybct = delay;
+        *csr = tcsr;
+        return SUCCESS;
+    }
+}
+
+
diff --git a/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiConfig.nc b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiConfig.nc
new file mode 100644
index 00000000..a7dde60c
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiConfig.nc
@@ -0,0 +1,111 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to configure the SAM3U SPI.
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3uSpiConfig
+{
+    /**
+     * Set the SPI interface to Master mode (default).
+     */
+    async command error_t setMaster();
+
+    /**
+     * Set the SPI interface to Slave mode.
+     */
+    async command error_t setSlave();
+
+    /**
+     * Set fixed peripherel select.
+     */
+    async command error_t setFixedCS();
+
+    /**
+     * Set variable peripheral select.
+     */
+    async command error_t setVariableCS();
+
+    /**
+     * Set the Chip Select pins to be directly connected to the chips
+     * (default).
+     */
+    async command error_t setDirectCS();
+
+    /**
+     * Set the Chip Select pins to be connected to a 4- to 16-bit decoder
+     */
+    async command error_t setMultiplexedCS();
+
+    /**
+     * Enable mode fault detection (default).
+     */
+    async command error_t enableModeFault();
+
+    /**
+     * Disable mode fault detection.
+     */
+    async command error_t disableModeFault();
+
+    /**
+     * Disable suppression of transmit if receive register is not empty
+     * (default).
+     */
+    async command error_t disableWaitTx();
+
+    /**
+     * Enable suppression of transmit if receive register is not empty.
+     */
+    async command error_t enableWaitTx();
+
+    /**
+     * Disable local loopback
+     */
+    async command error_t disableLoopBack();
+
+    /**
+     * Enable local loopback
+     */
+    async command error_t enableLoopBack();
+
+    /**
+     * Select peripheral chip
+     */
+    async command error_t selectChip(uint8_t pcs);
+
+    /**
+     * Set the delay between chip select changes in MCK clock ticks.
+     */
+    async command error_t setChipSelectDelay(uint8_t n);
+}
diff --git a/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiControl.nc b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiControl.nc
new file mode 100644
index 00000000..8214ca66
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiControl.nc
@@ -0,0 +1,44 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to control the SAM3U SPI.
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3uSpiControl
+{
+    async command void resetSpi();
+    async command void enableSpi();
+    async command void disableSpi();
+    async command void lastTransfer();
+}
diff --git a/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiInterrupts.nc b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiInterrupts.nc
new file mode 100644
index 00000000..ecb80ccc
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiInterrupts.nc
@@ -0,0 +1,72 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to control and query the SAM3U SPI interrupts.
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3uSpiInterrupts
+{
+    async event void receivedData(uint16_t data);
+
+    async command void disableAllSpiIrqs();
+
+    async command void enableRxFullIrq();
+    async command void disableRxFullIrq();
+    async command bool isEnabledRxFullIrq();
+
+    async command void enableTxDataEmptyIrq();
+    async command void disableTxDataEmptyIrq();
+    async command bool isEnabledTxDataEmptyIrq();
+
+    async command void enableModeFaultIrq();
+    async command void disableModeFaultIrq();
+    async command bool isEnabledModeFaultIrq();
+
+    async command void enableOverrunIrq();
+    async command void disableOverrunIrq();
+    async command bool isEnabledOverrunIrq();
+
+    async command void enableNssRisingIrq();
+    async command void disableNssRisingIrq();
+    async command bool isEnabledNssRisingIrq();
+
+    async command void enableTxEmptyIrq();
+    async command void disableTxEmptyIrq();
+    async command bool isEnabledTxEmptyIrq();
+
+    async command void enableUnderrunIrq();
+    async command void disableUnderrunIrq();
+    async command bool isEnabledUnderrunIrq();
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiP.nc b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiP.nc
new file mode 100644
index 00000000..f42befaa
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiP.nc
@@ -0,0 +1,532 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The hardware presentation layer for the SAM3U SPI.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "sam3uspihardware.h"
+
+module HplSam3uSpiP
+{
+    provides
+    {
+        interface AsyncStdControl;
+        interface HplSam3uSpiConfig; 
+        interface HplSam3uSpiControl; 
+        interface HplSam3uSpiInterrupts; 
+        interface HplSam3uSpiStatus; 
+    }
+    uses
+    {
+        interface FunctionWrapper as SpiInterruptWrapper;
+        interface HplSam3uPeripheralClockCntl as SpiClockControl;
+        interface HplSam3uClock as ClockConfig;
+    }
+}
+implementation
+{
+
+    async command error_t AsyncStdControl.start()
+    {
+        // enable peripheral clock
+        call SpiClockControl.enable();
+  
+        // enable SPI
+        call HplSam3uSpiControl.enableSpi();
+  
+        // enable SPI IRQ (Byte is a busy wait!)
+        //call HplSam3uSpiInterrupts.enableRxFullIrq();
+
+        return SUCCESS;
+    }
+
+    async command error_t AsyncStdControl.stop()
+    {
+        // stop the SPI
+        call HplSam3uSpiControl.disableSpi();
+
+        // stop the peripheral clock
+        call SpiClockControl.disable();
+
+        return SUCCESS;
+    }
+
+    /**
+     * Set the SPI interface to Master mode (default).
+     */
+    async command error_t HplSam3uSpiConfig.setMaster()
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.mstr = 1;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+    /**
+     * Set the SPI interface to Slave mode.
+     */
+    async command error_t HplSam3uSpiConfig.setSlave()
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.mstr = 0;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+    
+    /**
+     * Set fixed peripherel select.
+     */
+    async command error_t HplSam3uSpiConfig.setFixedCS()
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.ps = 0;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+    /**
+     * Set variable peripheral select.
+     */
+    async command error_t HplSam3uSpiConfig.setVariableCS()
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.ps = 1;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+    /**
+     * Set the Chip Select pins to be directly connected to the chips
+     * (default).
+     */
+    async command error_t HplSam3uSpiConfig.setDirectCS()
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.pcsdec = 0;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+    /**
+     * Set the Chip Select pins to be connected to a 4- to 16-bit decoder
+     */
+    async command error_t HplSam3uSpiConfig.setMultiplexedCS()
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.pcsdec = 1;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+    /**
+     * Enable mode fault detection (default).
+     */
+    async command error_t HplSam3uSpiConfig.enableModeFault()
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.modfdis = 0;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+    /**
+     * Disable mode fault detection.
+     */
+    async command error_t HplSam3uSpiConfig.disableModeFault()
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.modfdis = 1;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+    /**
+     * Disable suppression of transmit if receive register is not empty
+     * (default).
+     */
+    async command error_t HplSam3uSpiConfig.disableWaitTx()
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.wdrbt = 0;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+    /**
+     * Enable suppression of transmit if receive register is not empty.
+     */
+    async command error_t HplSam3uSpiConfig.enableWaitTx()
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.wdrbt = 1;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+    /**
+     * Disable local loopback
+     */
+    async command error_t HplSam3uSpiConfig.disableLoopBack()
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.llb = 0;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+    /**
+     * Enable local loopback
+     */
+    async command error_t HplSam3uSpiConfig.enableLoopBack()
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.llb = 1;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+    /**
+     * Select peripheral chip
+     */
+    async command error_t HplSam3uSpiConfig.selectChip(uint8_t pcs)
+    {
+        spi_mr_t mr = SPI->mr;
+        if(SPI->mr.bits.pcsdec == 0)
+        {
+            switch(pcs)
+            {
+                case 0:
+                    mr.bits.pcs = 0;
+                    break;
+                case 1:
+                    mr.bits.pcs = 1;
+                    break;
+                case 2:
+                    mr.bits.pcs = 3;
+                    break;
+                case 3:
+                    mr.bits.pcs = 7;
+                    break;
+                default:
+                    return EINVAL;
+            }
+        } else {
+            if(pcs > 15)
+                return EINVAL;
+            mr.bits.pcs = pcs;
+        }
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+    /**
+     * Set the delay between chip select changes in MCK clock ticks.
+     */
+    async command error_t HplSam3uSpiConfig.setChipSelectDelay(uint8_t n)
+    {
+        spi_mr_t mr = SPI->mr;
+        mr.bits.dlybcs = n;
+        SPI->mr = mr;
+        return SUCCESS;
+    }
+
+
+    async command void HplSam3uSpiControl.resetSpi()
+    {
+        spi_cr_t cr = SPI->cr;
+        cr.bits.swrst = 1;
+        SPI->cr = cr;
+    }
+
+    async command void HplSam3uSpiControl.enableSpi()
+    {
+        spi_cr_t cr = SPI->cr;
+        cr.bits.spien = 1;
+        SPI->cr = cr;
+    }
+
+    async command void HplSam3uSpiControl.disableSpi()
+    {
+        spi_cr_t cr = SPI->cr;
+        cr.bits.spidis = 1;
+        SPI->cr = cr;
+    }
+
+    async command void HplSam3uSpiControl.lastTransfer()
+    {
+        spi_cr_t cr = SPI->cr;
+        cr.bits.lastxfer = 1;
+        SPI->cr = cr;
+    }
+
+    __attribute__((interrupt)) void SpiIrqHandler() @C() @spontaneous()
+    {
+        call SpiInterruptWrapper.preamble();
+        if((call HplSam3uSpiInterrupts.isEnabledRxFullIrq() == TRUE) &&
+                (call HplSam3uSpiStatus.isRxFull() == TRUE))
+        {
+            uint16_t data = call HplSam3uSpiStatus.getReceivedData();
+            signal HplSam3uSpiInterrupts.receivedData(data);
+        }
+        call SpiInterruptWrapper.postamble();
+    }
+
+    async command void HplSam3uSpiInterrupts.disableAllSpiIrqs()
+    {
+        call HplSam3uSpiInterrupts.disableRxFullIrq();
+        call HplSam3uSpiInterrupts.disableTxDataEmptyIrq();
+        call HplSam3uSpiInterrupts.disableModeFaultIrq();
+        call HplSam3uSpiInterrupts.disableOverrunIrq();
+        call HplSam3uSpiInterrupts.disableNssRisingIrq();
+        call HplSam3uSpiInterrupts.disableTxEmptyIrq();
+        call HplSam3uSpiInterrupts.disableUnderrunIrq();
+    }
+
+    // RDRF
+    async command void HplSam3uSpiInterrupts.enableRxFullIrq()
+    {
+        spi_ier_t ier = SPI->ier;
+        ier.bits.rdrf = 1;
+        SPI->ier = ier;
+    }
+    async command void HplSam3uSpiInterrupts.disableRxFullIrq()
+    {
+        spi_idr_t idr = SPI->idr;
+        idr.bits.rdrf = 1;
+        SPI->idr = idr;
+    }
+    async command bool HplSam3uSpiInterrupts.isEnabledRxFullIrq()
+    {
+        return (SPI->imr.bits.rdrf == 1);
+    }
+
+    // TDRE
+    async command void HplSam3uSpiInterrupts.enableTxDataEmptyIrq()
+    {
+        spi_ier_t ier = SPI->ier;
+        ier.bits.tdre = 1;
+        SPI->ier = ier;
+    }
+    async command void HplSam3uSpiInterrupts.disableTxDataEmptyIrq()
+    {
+        spi_idr_t idr = SPI->idr;
+        idr.bits.tdre = 1;
+        SPI->idr = idr;
+    }
+    async command bool HplSam3uSpiInterrupts.isEnabledTxDataEmptyIrq()
+    {
+        return (SPI->imr.bits.tdre == 1);
+    }
+
+    // MODF
+    async command void HplSam3uSpiInterrupts.enableModeFaultIrq()
+    {
+        spi_ier_t ier = SPI->ier;
+        ier.bits.modf = 1;
+        SPI->ier = ier;
+
+    }
+    async command void HplSam3uSpiInterrupts.disableModeFaultIrq()
+    {
+        spi_idr_t idr = SPI->idr;
+        idr.bits.modf = 1;
+        SPI->idr = idr;
+    }
+    async command bool HplSam3uSpiInterrupts.isEnabledModeFaultIrq()
+    {
+        return (SPI->imr.bits.modf == 1);
+    }
+
+    // OVRES
+    async command void HplSam3uSpiInterrupts.enableOverrunIrq()
+    {
+        spi_ier_t ier = SPI->ier;
+        ier.bits.ovres = 1;
+        SPI->ier = ier;
+    }
+    async command void HplSam3uSpiInterrupts.disableOverrunIrq()
+    {
+        spi_idr_t idr = SPI->idr;
+        idr.bits.ovres = 1;
+        SPI->idr = idr;
+    }
+    async command bool HplSam3uSpiInterrupts.isEnabledOverrunIrq()
+    {
+        return (SPI->imr.bits.ovres == 1);
+    }
+
+    // NSSR
+    async command void HplSam3uSpiInterrupts.enableNssRisingIrq()
+    {
+        spi_ier_t ier = SPI->ier;
+        ier.bits.nssr = 1;
+        SPI->ier = ier;
+    }
+    async command void HplSam3uSpiInterrupts.disableNssRisingIrq()
+    {
+        spi_idr_t idr = SPI->idr;
+        idr.bits.nssr = 1;
+        SPI->idr = idr;
+    }
+    async command bool HplSam3uSpiInterrupts.isEnabledNssRisingIrq()
+    {
+        return (SPI->imr.bits.nssr == 1);
+    }
+
+    // TXEMPTY
+    async command void HplSam3uSpiInterrupts.enableTxEmptyIrq()
+    {
+        spi_ier_t ier = SPI->ier;
+        ier.bits.txempty = 1;
+        SPI->ier = ier;
+    }
+    async command void HplSam3uSpiInterrupts.disableTxEmptyIrq()
+    {
+        spi_idr_t idr = SPI->idr;
+        idr.bits.txempty = 1;
+        SPI->idr = idr;
+    }
+    async command bool HplSam3uSpiInterrupts.isEnabledTxEmptyIrq()
+    {
+        return (SPI->imr.bits.txempty == 1);
+    }
+
+    // UNDES
+    async command void HplSam3uSpiInterrupts.enableUnderrunIrq()
+    {
+        spi_ier_t ier = SPI->ier;
+        ier.bits.undes = 1;
+        SPI->ier = ier;
+    }
+    async command void HplSam3uSpiInterrupts.disableUnderrunIrq()
+    {
+        spi_idr_t idr = SPI->idr;
+        idr.bits.undes = 1;
+        SPI->idr = idr;
+    }
+    async command bool HplSam3uSpiInterrupts.isEnabledUnderrunIrq()
+    {
+        return (SPI->imr.bits.undes == 1);
+    }
+
+
+    async command uint16_t HplSam3uSpiStatus.getReceivedData()
+    {
+        return SPI->rdr.bits.rd;
+    }
+
+    async command error_t HplSam3uSpiStatus.setDataToTransmitCS(uint16_t txchr, uint8_t pcs, bool lastXfer)
+    {
+        spi_tdr_t tdr;
+
+        if(SPI->mr.bits.ps == 1)
+        {
+            if(SPI->mr.bits.pcsdec == 0)
+            {
+                switch(pcs)
+                {
+                    case 0:
+                        tdr.bits.pcs = 0;
+                        break;
+                    case 1:
+                        tdr.bits.pcs = 1;
+                        break;
+                    case 2:
+                        tdr.bits.pcs = 3;
+                        break;
+                    case 3:
+                        tdr.bits.pcs = 7;
+                        break;
+                    default:
+                        return EINVAL;
+                }
+            } else {
+                if(pcs > 15)
+                    return EINVAL;
+                tdr.bits.pcs = pcs;
+            }
+            tdr.bits.td = txchr;
+            tdr.bits.lastxfer = lastXfer;
+            SPI->tdr = tdr;
+        } else {
+            if(call HplSam3uSpiConfig.selectChip(pcs) != SUCCESS)
+                return EINVAL;
+            call HplSam3uSpiStatus.setDataToTransmit(txchr);
+        }
+        return SUCCESS;
+    }
+
+    async command void HplSam3uSpiStatus.setDataToTransmit(uint16_t txchr)
+    {
+        spi_tdr_t tdr = SPI->tdr;
+        tdr.bits.td = txchr;
+        SPI->tdr = tdr;
+    }
+
+    async command bool HplSam3uSpiStatus.isRxFull()
+    {
+        return (SPI->sr.bits.rdrf == 1);
+    }
+    async command bool HplSam3uSpiStatus.isTxDataEmpty()
+    {
+        return (SPI->sr.bits.tdre == 1);
+    }
+    async command bool HplSam3uSpiStatus.isModeFault()
+    {
+        return (SPI->sr.bits.modf == 1);
+    }
+    async command bool HplSam3uSpiStatus.isOverrunError()
+    {
+        return (SPI->sr.bits.ovres == 1);
+    }
+    async command bool HplSam3uSpiStatus.isNssRising()
+    {
+        return (SPI->sr.bits.nssr == 1);
+    }
+    async command bool HplSam3uSpiStatus.isTxEmpty()
+    {
+        return (SPI->sr.bits.txempty == 1);
+    }
+    async command bool HplSam3uSpiStatus.isUnderrunError()
+    {
+        return (SPI->sr.bits.undes == 1);
+    }
+    async command bool HplSam3uSpiStatus.isSpiEnabled()
+    {
+        return (SPI->sr.bits.spiens == 1);
+    }
+    async event void ClockConfig.mainClockChanged() {};
+}
+
+
diff --git a/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiStatus.nc b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiStatus.nc
new file mode 100644
index 00000000..fc2a6b1b
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/HplSam3uSpiStatus.nc
@@ -0,0 +1,54 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to query the status of the SAM3U SPI.
+ *
+ * @author Thomas Schmid
+ */
+
+interface HplSam3uSpiStatus
+{
+    async command uint16_t getReceivedData();
+    async command void setDataToTransmit(uint16_t txchr);
+    async command error_t setDataToTransmitCS(uint16_t txchr, uint8_t pcs, bool lastXfer);
+
+    async command bool isRxFull();
+    async command bool isTxDataEmpty();
+    async command bool isModeFault();
+    async command bool isOverrunError();
+    async command bool isNssRising();
+    async command bool isTxEmpty();
+    async command bool isUnderrunError();
+    async command bool isSpiEnabled();
+}
+
+
diff --git a/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpi0C.nc b/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpi0C.nc
new file mode 100644
index 00000000..e39f4d47
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpi0C.nc
@@ -0,0 +1,72 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues
+ */
+
+#include <sam3uspihardware.h>
+
+generic configuration Sam3uSpi0C()
+{
+    provides
+    {
+        interface Resource;
+        interface SpiByte;
+	interface FastSpiByte;
+        interface SpiPacket;
+	interface HplSam3uSpiChipSelConfig;
+    }
+    uses {
+        interface Init as SpiInit;
+        interface ResourceConfigure;
+    }
+}
+implementation
+{
+    enum {
+      CLIENT_ID = unique(SAM3U_SPI_BUS),
+    };
+
+    components HilSam3uSpiC as SpiC;
+    SpiC.SpiChipInit = SpiInit;
+    Resource = SpiC.Resource[CLIENT_ID];
+    SpiByte = SpiC.SpiByte[CLIENT_ID];
+    FastSpiByte = SpiC.FastSpiByte[CLIENT_ID];
+    SpiPacket = SpiC.SpiPacket[CLIENT_ID];
+    HplSam3uSpiChipSelConfig = SpiC.HplSam3uSpiChipSelConfig[0];
+    
+    components new Sam3uSpiP(0);
+    ResourceConfigure = Sam3uSpiP.ResourceConfigure;
+    Sam3uSpiP.SubResourceConfigure <- SpiC.ResourceConfigure[CLIENT_ID];
+    Sam3uSpiP.HplSam3uSpiConfig -> SpiC.HplSam3uSpiConfig;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpi1C.nc b/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpi1C.nc
new file mode 100644
index 00000000..0d7a9ea7
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpi1C.nc
@@ -0,0 +1,72 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues
+ */
+
+#include <sam3uspihardware.h>
+
+generic configuration Sam3uSpi1C()
+{
+    provides
+    {
+        interface Resource;
+        interface SpiByte;
+	interface FastSpiByte;
+        interface SpiPacket;
+	interface HplSam3uSpiChipSelConfig;
+    }
+    uses {
+        interface Init as SpiInit;
+        interface ResourceConfigure;
+    }
+}
+implementation
+{
+    enum {
+      CLIENT_ID = unique(SAM3U_SPI_BUS),
+    };
+
+    components HilSam3uSpiC as SpiC;
+    SpiC.SpiChipInit = SpiInit;
+    Resource = SpiC.Resource[CLIENT_ID];
+    SpiByte = SpiC.SpiByte[CLIENT_ID];
+    FastSpiByte = SpiC.FastSpiByte[CLIENT_ID];
+    SpiPacket = SpiC.SpiPacket[CLIENT_ID];
+    HplSam3uSpiChipSelConfig = SpiC.HplSam3uSpiChipSelConfig[1];
+    
+    components new Sam3uSpiP(1);
+    ResourceConfigure = Sam3uSpiP.ResourceConfigure;
+    Sam3uSpiP.SubResourceConfigure <- SpiC.ResourceConfigure[CLIENT_ID];
+    Sam3uSpiP.HplSam3uSpiConfig -> SpiC.HplSam3uSpiConfig;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpi2C.nc b/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpi2C.nc
new file mode 100644
index 00000000..06f3dc68
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpi2C.nc
@@ -0,0 +1,72 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues
+ */
+
+#include <sam3uspihardware.h>
+
+generic configuration Sam3uSpi2C()
+{
+    provides
+    {
+        interface Resource;
+        interface SpiByte;
+	interface FastSpiByte;
+        interface SpiPacket;
+	interface HplSam3uSpiChipSelConfig;
+    }
+    uses {
+        interface Init as SpiInit;
+        interface ResourceConfigure;
+    }
+}
+implementation
+{
+    enum {
+      CLIENT_ID = unique(SAM3U_SPI_BUS),
+    };
+
+    components HilSam3uSpiC as SpiC;
+    SpiC.SpiChipInit = SpiInit;
+    Resource = SpiC.Resource[CLIENT_ID];
+    SpiByte = SpiC.SpiByte[CLIENT_ID];
+    FastSpiByte = SpiC.FastSpiByte[CLIENT_ID];
+    SpiPacket = SpiC.SpiPacket[CLIENT_ID];
+    HplSam3uSpiChipSelConfig = SpiC.HplSam3uSpiChipSelConfig[2];
+    
+    components new Sam3uSpiP(2);
+    ResourceConfigure = Sam3uSpiP.ResourceConfigure;
+    Sam3uSpiP.SubResourceConfigure <- SpiC.ResourceConfigure[CLIENT_ID];
+    Sam3uSpiP.HplSam3uSpiConfig -> SpiC.HplSam3uSpiConfig;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpi3C.nc b/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpi3C.nc
new file mode 100644
index 00000000..aca71401
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpi3C.nc
@@ -0,0 +1,72 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues
+ */
+
+#include <sam3uspihardware.h>
+
+generic configuration Sam3uSpi3C()
+{
+    provides
+    {
+        interface Resource;
+        interface SpiByte;
+	interface FastSpiByte;
+        interface SpiPacket;
+	interface HplSam3uSpiChipSelConfig;
+    }
+    uses {
+        interface Init as SpiInit;
+        interface ResourceConfigure;
+    }
+}
+implementation
+{
+    enum {
+      CLIENT_ID = unique(SAM3U_SPI_BUS),
+    };
+
+    components HilSam3uSpiC as SpiC;
+    SpiC.SpiChipInit = SpiInit;
+    Resource = SpiC.Resource[CLIENT_ID];
+    SpiByte = SpiC.SpiByte[CLIENT_ID];
+    FastSpiByte = SpiC.FastSpiByte[CLIENT_ID];
+    SpiPacket = SpiC.SpiPacket[CLIENT_ID];
+    HplSam3uSpiChipSelConfig = SpiC.HplSam3uSpiChipSelConfig[3];
+    
+    components new Sam3uSpiP(3);
+    ResourceConfigure = Sam3uSpiP.ResourceConfigure;
+    Sam3uSpiP.SubResourceConfigure <- SpiC.ResourceConfigure[CLIENT_ID];
+    Sam3uSpiP.HplSam3uSpiConfig -> SpiC.HplSam3uSpiConfig;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpiP.nc b/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpiP.nc
new file mode 100644
index 00000000..398f700c
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/Sam3uSpiP.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2009 University of California, Los Angeles
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+generic module Sam3uSpiP(uint8_t chip_id)
+{
+    provides 
+    {
+        interface ResourceConfigure as SubResourceConfigure;
+    }
+    uses {
+        interface ResourceConfigure;
+        interface HplSam3uSpiConfig;
+    }
+}
+implementation {
+
+    async command void SubResourceConfigure.configure() {
+        call HplSam3uSpiConfig.selectChip(chip_id);
+        call ResourceConfigure.configure();
+    }
+    
+    async command void SubResourceConfigure.unconfigure() {
+        call ResourceConfigure.unconfigure();
+    }
+}
diff --git a/tos/chips/cortex/m3/sam3/u/spi/sam3uspihardware.h b/tos/chips/cortex/m3/sam3/u/spi/sam3uspihardware.h
new file mode 100644
index 00000000..0ad4e30f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/spi/sam3uspihardware.h
@@ -0,0 +1,316 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Serial Peripheral Interface (SPI) register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef _SAM3USPIHARDWARE_H
+#define _SAM3USPIHARDWARE_H
+
+#define SAM3U_HPLSPI_RESOURCE "Sam3uHplSpi.Resource"
+#define SAM3U_SPI_BUS "Sam3uSpi.Bus"
+
+/**
+ *  SPI Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 621
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t spien        : 1; // spi enable
+        uint8_t spidis       : 1; // spi disable
+        uint8_t reserved0    : 5;
+        uint8_t swrst        : 1; // spi software reset
+        uint8_t reserved1    : 8;
+        uint8_t reserved2    : 8;
+        uint8_t lastxfer     : 1; // last transfer
+        uint8_t reserved3    : 7;
+    } __attribute__((__packed__)) bits;
+} spi_cr_t; 
+
+/**
+ *  SPI Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 622
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t mstr        : 1; // master/slave mode
+        uint8_t ps          : 1; // peripheral select
+        uint8_t pcsdec      : 1; // chip select decode
+        uint8_t reserved0   : 1;
+        uint8_t modfdis     : 1; // mode fault detection
+        uint8_t wdrbt       : 1; // wait data ready before transfer
+        uint8_t reserved1   : 1;
+        uint8_t llb         : 1; // local loopback enable
+        uint8_t reserved2   : 8;
+        uint8_t pcs         : 4; // peripheral chip select
+        uint8_t reserved3   : 4;
+        uint8_t dlybcs      : 8; // delay between chip selects
+    } __attribute__((__packed__)) bits;
+} spi_mr_t;
+
+
+/**
+ *  SPI Receive Data Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 624
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint16_t rd        : 16; // receive data
+        uint8_t  pcs       :  4; // peripheral chip select
+        uint8_t reserved0  :  4;
+        uint8_t reserved1  :  8;
+    } __attribute__((__packed__)) bits;
+} spi_rdr_t;
+
+
+/**
+ *  SPI Transmit Data Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 625
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint16_t td        : 16; // transmit data
+        uint8_t  pcs       :  4; // peripheral chip select
+        uint8_t reserved0  :  4;
+        uint8_t lastxfer   :  1; // last transfer
+        uint8_t reserved1  :  7;
+    } __attribute__((__packed__)) bits;
+} spi_tdr_t;
+
+
+/**
+ *  SPI Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 626
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t rdrf      : 1; // receive data register full
+        uint8_t tdre      : 1; // transmit data register empty
+        uint8_t modf      : 1; // mode fault error
+        uint8_t ovres     : 1; // overrun error status
+        uint8_t reserved0 : 4;
+        uint8_t nssr      : 1; // nss rising
+        uint8_t txempty   : 1; // transmission registers empty
+        uint8_t undes     : 1; // underrun error status (slave only)
+        uint8_t reserved1 : 5;
+        uint8_t spiens    : 1; // spi enable status
+        uint8_t reserved2 : 7;
+        uint8_t reserved3 : 8;
+    } __attribute__((__packed__)) bits;
+} spi_sr_t;
+
+
+/**
+ *  SPI Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 628
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t rdrf      : 1; // receive data register full interrupt enable
+        uint8_t tdre      : 1; // spi transmit data register empty interrupt enable
+        uint8_t modf      : 1; // mode fault error interrupt enable
+        uint8_t ovres     : 1; // overrun error interrupt enable
+        uint8_t reserved0 : 4;
+        uint8_t nssr      : 1; // nss rising interrupt enable
+        uint8_t txempty   : 1; // transmission registers empty enable
+        uint8_t undes     : 1; // underrun error interrupt enable
+        uint8_t reserved1 : 5;
+        uint8_t reserved2 : 8;
+        uint8_t reserved3 : 8;
+    } __attribute__((__packed__)) bits;
+} spi_ier_t;
+
+
+/**
+ *  SPI Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 629
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t rdrf      : 1; // receive data register full interrupt disable
+        uint8_t tdre      : 1; // spi transmit data register empty interrupt disable
+        uint8_t modf      : 1; // mode fault error interrupt disable
+        uint8_t ovres     : 1; // overrun error interrupt disable
+        uint8_t reserved0 : 4;
+        uint8_t nssr      : 1; // nss rising interrupt disable
+        uint8_t txempty   : 1; // transmission registers empty disable
+        uint8_t undes     : 1; // underrun error interrupt disable
+        uint8_t reserved1 : 5;
+        uint8_t reserved2 : 8;
+        uint8_t reserved3 : 8;
+    } __attribute__((__packed__)) bits;
+} spi_idr_t;
+
+
+/**
+ *  SPI Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 630
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t rdrf      : 1; // receive data register full interrupt mask
+        uint8_t tdre      : 1; // spi transmit data register empty interrupt mask
+        uint8_t modf      : 1; // mode fault error interrupt mask
+        uint8_t ovres     : 1; // overrun error interrupt mask
+        uint8_t reserved0 : 4;
+        uint8_t nssr      : 1; // nss rising interrupt mask
+        uint8_t txempty   : 1; // transmission registers empty mask
+        uint8_t undes     : 1; // underrun error interrupt mask
+        uint8_t reserved1 : 5;
+        uint8_t reserved2 : 8;
+        uint8_t reserved3 : 8;
+   } __attribute__((__packed__)) bits;
+} spi_imr_t;
+
+
+/**
+ *  SPI Chip Select Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 631
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t cpol       : 1; // clock polarity
+        uint8_t ncpha      : 1; // clock phase
+        uint8_t csnaat     : 1; // chip select not active after transfer (ignored if csaat = 1)
+        uint8_t csaat      : 1; // chip select active after transfer
+        uint8_t bits       : 4; // bits per transfer
+        uint8_t scbr       : 8; // serial clock baud rate
+        uint8_t dlybs      : 8; // delay before spck
+        uint8_t dlybct     : 8; // delay between consecutive transfers
+    } __attribute__((__packed__)) bits;
+} spi_csr_t;
+
+#define SPI_CSR_BITS_8  0
+#define SPI_CSR_BITS_9  1
+#define SPI_CSR_BITS_10 2
+#define SPI_CSR_BITS_11 3
+#define SPI_CSR_BITS_12 4
+#define SPI_CSR_BITS_13 5
+#define SPI_CSR_BITS_14 6
+#define SPI_CSR_BITS_15 7
+#define SPI_CSR_BITS_16 8
+
+/**
+ *  SPI Write Protection Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 634
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t spiwpen   :  1; // spi write protection enable
+        uint8_t reserved0 :  7;
+        uint32_t spiwpkey : 24; // spi write protection key password
+    } __attribute__((__packed__)) bits;
+} spi_wpcr_t;
+
+#define SPI_WPCR_SPIWPKEY 0x535049
+
+/**
+ *  SPI Write Protection Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary 9/1/09, p. 635
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t spiwpvs   : 3; // spi write protection violation status
+        uint8_t reserved0 : 5;
+        uint8_t spiwpvsrc : 8; // spi write protection violation source
+        uint8_t reserved1 : 8;
+        uint8_t reserved2 : 8;
+    } __attribute__((__packed__)) bits;
+} spi_wpsr_t;
+
+
+/**
+ * SPI Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary 9/1/09, p. 620
+ */
+typedef struct 
+{
+    volatile spi_cr_t cr;     // Control Register
+    volatile spi_mr_t mr;     // Mode Register
+    volatile spi_rdr_t rdr;   // Receive Data Register
+    volatile spi_tdr_t tdr;   // Transmit Data Register
+    volatile spi_sr_t sr;     // Status Register
+    volatile spi_ier_t ier;   // Interrupt Enable Register
+    volatile spi_idr_t idr;   // Interrupt Disable Register
+    volatile spi_imr_t imr;   // Interrupt Mask Register
+    uint32_t reserved0[4];
+    volatile spi_csr_t csr0; // Chip Select Register 0
+    volatile spi_csr_t csr1; // Chip Select Register 1
+    volatile spi_csr_t csr2; // Chip Select Register 2
+    volatile spi_csr_t csr3; // Chip Select Register 3
+    uint32_t reserved1[41];
+    volatile spi_wpcr_t wpcr; // Write Protection Control Register
+    volatile spi_wpsr_t wpsr; // Write Protection Status Register
+    uint32_t reserved2[5];
+} spi_t;
+
+/**
+ * Memory mapping for the SPI
+ */
+volatile spi_t* SPI = (volatile spi_t *) 0x40008000; // SPI Base Address
+
+#endif // _SAM3USPIHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/u/supc/sam3usupchardware.h b/tos/chips/cortex/m3/sam3/u/supc/sam3usupchardware.h
new file mode 100644
index 00000000..e3cb1de4
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/supc/sam3usupchardware.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3USUPCHARDWARE_H
+#define SAM3USUPCHARDWARE_H
+
+#include "supchardware.h"
+
+/**
+ * Memory mappin gofr the SUPC
+ */
+volatile supc_t* SUPC = (volatile supc_t *) 0x400E1210;
+
+#endif //SAM3USUPCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/u/timer/HplSam3TCC.nc b/tos/chips/cortex/m3/sam3/u/timer/HplSam3TCC.nc
new file mode 100644
index 00000000..403d80ae
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/timer/HplSam3TCC.nc
@@ -0,0 +1,125 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Top level configuration of the timer counter peripheral.
+ *
+ * @author Thomas Schmid
+ */
+
+#include <sam3tchardware.h>
+
+configuration HplSam3TCC
+{
+
+    provides
+    {
+        interface Init;
+
+	interface HplSam3TC as TC;
+
+        interface HplSam3TCChannel as TCH0;
+        interface HplSam3TCChannel as TCH1;
+        interface HplSam3TCChannel as TCH2;
+
+        interface HplSam3TCCapture as TC0Capture;
+        interface HplSam3TCCompare as TC0CompareA;
+        interface HplSam3TCCompare as TC0CompareB;
+        interface HplSam3TCCompare as TC0CompareC;
+
+        interface HplSam3TCCapture as TC1Capture;
+        interface HplSam3TCCompare as TC1CompareA;
+        interface HplSam3TCCompare as TC1CompareB;
+        interface HplSam3TCCompare as TC1CompareC;
+        
+        interface HplSam3TCCapture as TC2Capture;
+        interface HplSam3TCCompare as TC2CompareA;
+        interface HplSam3TCCompare as TC2CompareB;
+        interface HplSam3TCCompare as TC2CompareC;
+    }
+}
+
+implementation
+{
+    components HplNVICC,
+               HplSam3TCEventP,
+               HplSam3uClockC,
+               new HplSam3TCChannelP( TC_CH0_BASE ) as TCCH0,
+               new HplSam3TCChannelP( TC_CH1_BASE ) as TCCH1,
+               new HplSam3TCChannelP( TC_CH2_BASE ) as TCCH2;
+
+    components McuSleepC;
+    HplSam3TCEventP.TC0InterruptWrapper -> McuSleepC;
+    HplSam3TCEventP.TC1InterruptWrapper -> McuSleepC;
+    HplSam3TCEventP.TC2InterruptWrapper -> McuSleepC;
+
+    TCH0 = TCCH0;
+    TCH1 = TCCH1;
+    TCH2 = TCCH2;
+
+    TCCH0.NVICTCInterrupt -> HplNVICC.TC0Interrupt;
+    TCCH0.TimerEvent -> HplSam3TCEventP.TC0Event;
+    TCCH0.TCPClockCntl -> HplSam3uClockC.TC0PPCntl;
+    TCCH0.ClockConfig -> HplSam3uClockC;
+
+    TCCH1.NVICTCInterrupt -> HplNVICC.TC1Interrupt;
+    TCCH1.TimerEvent -> HplSam3TCEventP.TC1Event;
+    TCCH1.TCPClockCntl -> HplSam3uClockC.TC1PPCntl;
+    TCCH1.ClockConfig -> HplSam3uClockC;
+
+    TCCH2.NVICTCInterrupt -> HplNVICC.TC2Interrupt;
+    TCCH2.TimerEvent -> HplSam3TCEventP.TC2Event;
+    TCCH2.TCPClockCntl -> HplSam3uClockC.TC2PPCntl;
+    TCCH2.ClockConfig -> HplSam3uClockC;
+
+    TC0Capture = TCCH0.Capture; 
+    TC0CompareA = TCCH0.CompareA;
+    TC0CompareB = TCCH0.CompareB;
+    TC0CompareC = TCCH0.CompareC;
+
+    TC1Capture = TCCH1.Capture; 
+    TC1CompareA = TCCH1.CompareA;
+    TC1CompareB = TCCH1.CompareB;
+    TC1CompareC = TCCH1.CompareC;
+
+    TC2Capture = TCCH2.Capture; 
+    TC2CompareA = TCCH2.CompareA;
+    TC2CompareB = TCCH2.CompareB;
+    TC2CompareC = TCCH2.CompareC;
+
+    components new HplSam3TCP();
+    Init = HplSam3TCP;
+    HplSam3TCP.ClockConfig -> HplSam3uClockC;
+    HplSam3TCP.TC0 -> TCCH0;
+    HplSam3TCP.TC1 -> TCCH1;
+    HplSam3TCP.TC2 -> TCCH2;
+    TC = HplSam3TCP;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/timer/HplSam3TCEventP.nc b/tos/chips/cortex/m3/sam3/u/timer/HplSam3TCEventP.nc
new file mode 100644
index 00000000..2ec8f2dc
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/timer/HplSam3TCEventP.nc
@@ -0,0 +1,81 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SAM3U TC Event dispatcher.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "sam3tchardware.h"
+
+module HplSam3TCEventP @safe()
+{
+    provides {
+        interface HplSam3TCEvent as TC0Event;
+        interface HplSam3TCEvent as TC1Event;
+        interface HplSam3TCEvent as TC2Event;
+    }
+    uses {
+      interface FunctionWrapper as TC0InterruptWrapper;
+      interface FunctionWrapper as TC1InterruptWrapper;
+      interface FunctionWrapper as TC2InterruptWrapper;
+    }
+}
+implementation
+{
+
+    void TC0IrqHandler() @C() @spontaneous() 
+    {
+        call TC0InterruptWrapper.preamble();
+        signal TC0Event.fired();
+        call TC0InterruptWrapper.postamble();
+    }
+
+    void TC1IrqHandler() @C() @spontaneous() 
+    {
+        call TC1InterruptWrapper.preamble();
+        signal TC1Event.fired();
+        call TC1InterruptWrapper.postamble();
+    }
+
+    void TC2IrqHandler() @C() @spontaneous() 
+    {
+        call TC2InterruptWrapper.preamble();
+        signal TC2Event.fired();
+        call TC2InterruptWrapper.postamble();
+    }
+
+    default async event void TC0Event.fired() {}
+    default async event void TC1Event.fired() {}
+    default async event void TC2Event.fired() {}
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/timer/sam3rtthardware.h b/tos/chips/cortex/m3/sam3/u/timer/sam3rtthardware.h
new file mode 100644
index 00000000..eb95cc86
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/timer/sam3rtthardware.h
@@ -0,0 +1,48 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Real-Time Timer register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3URTTHARDWARE_H
+#define SAM3URTTHARDWARE_H
+
+#include "rtthardware.h"
+
+//#define RTT ((rtt_t *) 0x400E1230) // (RTTC) Base Address
+// Defined in AT91 ARM Coretx-M3 based Microcontrollers, SAM3U Series,
+// Preliminary, p. 249
+volatile rtt_t* RTT = (volatile rtt_t*) 0x400E1230;
+
+#endif // SAM3URTTHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/u/timer/sam3tchardware.h b/tos/chips/cortex/m3/sam3/u/timer/sam3tchardware.h
new file mode 100644
index 00000000..e31738f8
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/timer/sam3tchardware.h
@@ -0,0 +1,74 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Timer Counter register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef SAM3UTCHARDWARE_H
+#define SAM3UTCHARDWARE_H
+
+#include "tchardware.h"
+
+/**
+ * TC definition capture mode
+ */
+typedef struct
+{
+    volatile tc_channel_capture_t ch0;
+    uint32_t reserved0[4];
+    volatile tc_channel_capture_t ch1;
+    uint32_t reserved1[4];
+    volatile tc_channel_capture_t ch2;
+    uint32_t reserved2[4];
+    volatile tc_bcr_t bcr;
+    volatile tc_bmr_t bmr;
+    volatile tc_qier_t qier;
+    volatile tc_qidr_t qidr;
+    volatile tc_qimr_t qimr;
+    volatile tc_qisr_t qisr;
+} tc_t;
+
+/**
+ * TC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary 9/1/09, p. 827
+ */
+#define TC_BASE     0x40080000
+#define TC_CH0_BASE 0x40080000
+#define TC_CH1_BASE 0x40080040
+#define TC_CH2_BASE 0x40080080
+
+volatile tc_t* TC = (volatile tc_t*)TC_BASE;
+
+#endif //SAM3UTCHARDWARE_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwi.nc b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwi.nc
new file mode 100644
index 00000000..1fc9c883
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwi.nc
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+// This file shows the Hpl level commands.
+#include <sam3utwihardware.h>
+
+interface HplSam3uTwi{
+
+  async command void init();
+  async command void enableClock();
+  async command void disableClock();
+  async command void configureTwi(const sam3u_twi_union_config_t* config);
+
+  /*Control Register Functions*/
+  async command void setStart();
+  async command void setStop();
+  async command void setMaster();
+  async command void disMaster();
+  async command void setSlave();
+  async command void disSlave();
+  async command void setQuick();
+  async command void swReset();
+
+  /*Master Mode Register Functions*/
+  async command void setDeviceAddr(uint8_t dadr);
+  async command void setDirection(uint8_t mread);
+  async command void addrSize(uint8_t iadrsz);
+
+  /*Slave Mode Register Functions*/
+  async command void setSlaveAddr(uint8_t sadr);
+
+  /*Internal Addr Register Functions*/
+  async command void setInternalAddr(uint32_t iadr);
+
+  /*Clock Waveform Generator Register Functions*/
+  async command void setClockLowDiv(uint8_t cldiv);
+  async command void setClockHighDiv(uint8_t chdiv);
+  async command void setClockDiv(uint8_t ckdiv);
+
+  /*Status Register Functions*/
+  async command twi_sr_t getStatus();
+  async command uint8_t getTxCompleted(twi_sr_t *sr);
+  async command uint8_t getRxReady(twi_sr_t *sr);
+  async command uint8_t getTxReady(twi_sr_t *sr);
+  async command uint8_t getSlaveRead(twi_sr_t *sr);
+  async command uint8_t getSlaveAccess(twi_sr_t *sr);
+  async command uint8_t getGenCallAccess(twi_sr_t *sr);
+  async command uint8_t getORErr(twi_sr_t *sr);
+  async command uint8_t getNack(twi_sr_t *sr);
+  async command uint8_t getArbLost(twi_sr_t *sr);
+  async command uint8_t getClockWaitState(twi_sr_t *sr);
+  async command uint8_t getEOSAccess(twi_sr_t *sr);
+  async command uint8_t getEndRx(twi_sr_t *sr);
+  async command uint8_t getEndTx(twi_sr_t *sr);
+  async command uint8_t getRxBufFull(twi_sr_t *sr);
+  async command uint8_t getTxBufEmpty(twi_sr_t *sr);
+
+  /*Interrupt Enable Register Functions*/
+  async command void setIntTxComp();
+  async command void setIntRxReady();
+  async command void setIntTxReady();
+  async command void setIntSlaveAccess();
+  async command void setIntGenCallAccess();
+  async command void setIntORErr();
+  async command void setIntNack();
+  async command void setIntArbLost();
+  async command void setIntClockWaitState();
+  async command void setIntEOSAccess();
+  async command void setIntEndRx();
+  async command void setIntEndTx();
+  async command void setIntRxBufFull();
+  async command void setIntTxBufEmpty();
+
+  /*Interrupt Disable Register*/
+  async command void disableAllInterrupts();
+  async command void disIntTxComp();
+  async command void disIntRxReady();
+  async command void disIntTxReady();
+  async command void disIntSlaveAccess();
+  async command void disIntGenCallAccess();
+  async command void disIntORErr();
+  async command void disIntNack();
+  async command void disIntArbLost();
+  async command void disIntClockWaitState();
+  async command void disIntEOSAccess();
+  async command void disIntEndRx();
+  async command void disIntEndTx();
+  async command void disIntRxBufFull();
+  async command void disIntTxBufEmpty();
+
+  /*Interrupt Mask Register*/
+  async command uint8_t maskIntTxComp();
+  async command uint8_t maskIntRxReady();
+  async command uint8_t maskIntTxReady();
+  async command uint8_t maskIntSlaveAccess();
+  async command uint8_t maskIntGenCallAccess();
+  async command uint8_t maskIntORErr();
+  async command uint8_t maskIntNack();
+  async command uint8_t maskIntArbLost();
+  async command uint8_t maskIntClockWaitState();
+  async command uint8_t maskIntEOSAccess();
+  async command uint8_t maskIntEndRx();
+  async command uint8_t maskIntEndTx();
+  async command uint8_t maskIntRxBufFull();
+  async command uint8_t maskIntTxBufEmpty();
+
+  /*Receive Holding Register Function*/
+  async command uint8_t readRxReg();
+
+  /*Transmit Holding Register Functions*/
+  async command void setTxReg(uint8_t buffer);
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiC.nc b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiC.nc
new file mode 100644
index 00000000..fc6d9c1c
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ * @author Kevin Klues
+ */
+
+configuration HplSam3uTwiC {
+  provides {
+    interface HplSam3uTwiInterrupt as HplSam3uTwiInterrupt0;
+    interface HplSam3uTwiInterrupt as HplSam3uTwiInterrupt1;
+    interface HplSam3uTwi as HplSam3uTwi0;
+    interface HplSam3uTwi as HplSam3uTwi1;
+  }
+}
+implementation{
+
+  enum {
+    CLIENT_ID = unique( SAM3U_HPLTWI_RESOURCE ),
+  };
+
+  components HplSam3uTwiP as TwiP;
+  
+  HplSam3uTwiInterrupt0 = TwiP.HplSam3uTwiInterrupt0;
+  HplSam3uTwiInterrupt1 = TwiP.HplSam3uTwiInterrupt1;
+  HplSam3uTwi0 = TwiP.HplSam3uTwi0;
+  HplSam3uTwi1 = TwiP.HplSam3uTwi1;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiImplP.nc b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiImplP.nc
new file mode 100644
index 00000000..b8e76395
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiImplP.nc
@@ -0,0 +1,960 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3utwihardware.h"
+module HplSam3uTwiImplP {
+  provides {
+    interface HplSam3uTwi as HplSam3uTwi0;
+    interface HplSam3uTwi as HplSam3uTwi1;
+    interface HplSam3uTwiInterrupt as Interrupt0;
+    interface HplSam3uTwiInterrupt as Interrupt1;
+  }
+  uses {
+    interface HplNVICInterruptCntl as Twi0Interrupt;
+    interface HplNVICInterruptCntl as Twi1Interrupt;
+    interface HplSam3uGeneralIOPin as Twd0Pin;
+    interface HplSam3uGeneralIOPin as Twd1Pin;
+    interface HplSam3uGeneralIOPin as Twck0Pin;
+    interface HplSam3uGeneralIOPin as Twck1Pin;
+    interface HplSam3uPeripheralClockCntl as Twi0ClockControl;
+    interface HplSam3uPeripheralClockCntl as Twi1ClockControl;
+    interface HplSam3uClock as Twi0ClockConfig;
+    interface HplSam3uClock as Twi1ClockConfig;
+    interface FunctionWrapper as Twi0InterruptWrapper;
+    interface FunctionWrapper as Twi1InterruptWrapper;
+    interface Leds;
+  }
+}
+implementation{
+
+  void Twi0IrqHandler() @C() @spontaneous() {
+    call Twi0InterruptWrapper.preamble();
+    signal Interrupt0.fired();
+    call Twi0InterruptWrapper.postamble();
+  }
+
+  void Twi1IrqHandler() @C() @spontaneous() {
+    call Twi1InterruptWrapper.preamble();
+    signal Interrupt1.fired();
+    call Twi1InterruptWrapper.postamble();
+  }
+
+  async command void HplSam3uTwi0.disableAllInterrupts() {
+    call HplSam3uTwi0.disIntTxComp();
+    call HplSam3uTwi0.disIntRxReady();
+    call HplSam3uTwi0.disIntTxReady();
+    call HplSam3uTwi0.disIntSlaveAccess();
+    call HplSam3uTwi0.disIntGenCallAccess();
+    call HplSam3uTwi0.disIntORErr();
+    call HplSam3uTwi0.disIntNack();
+    call HplSam3uTwi0.disIntArbLost();
+    call HplSam3uTwi0.disIntClockWaitState();
+    call HplSam3uTwi0.disIntEOSAccess();
+    call HplSam3uTwi0.disIntEndRx();
+    call HplSam3uTwi0.disIntEndTx();
+    call HplSam3uTwi0.disIntRxBufFull();
+    call HplSam3uTwi0.disIntTxBufEmpty();
+  }
+  async command void HplSam3uTwi1.disableAllInterrupts() {
+    call HplSam3uTwi1.disIntTxComp();
+    call HplSam3uTwi1.disIntRxReady();
+    call HplSam3uTwi1.disIntTxReady();
+    call HplSam3uTwi1.disIntSlaveAccess();
+    call HplSam3uTwi1.disIntGenCallAccess();
+    call HplSam3uTwi1.disIntORErr();
+    call HplSam3uTwi1.disIntNack();
+    call HplSam3uTwi1.disIntArbLost();
+    call HplSam3uTwi1.disIntClockWaitState();
+    call HplSam3uTwi1.disIntEOSAccess();
+    call HplSam3uTwi1.disIntEndRx();
+    call HplSam3uTwi1.disIntEndTx();
+    call HplSam3uTwi1.disIntRxBufFull();
+    call HplSam3uTwi1.disIntTxBufEmpty();
+  }
+
+  async command void HplSam3uTwi0.configureTwi(const sam3u_twi_union_config_t *config){
+
+    call Twi0Interrupt.configure(IRQ_PRIO_TWI0);
+    call Twi0Interrupt.enable();
+
+    call Twi0ClockControl.enable();
+
+    call Twd0Pin.disablePioControl();
+    call Twd0Pin.selectPeripheralA();
+    call Twck0Pin.disablePioControl();
+    call Twck0Pin.selectPeripheralA();
+
+    call HplSam3uTwi0.setClockLowDiv((uint8_t)config->cldiv);
+    call HplSam3uTwi0.setClockHighDiv((uint8_t)config->chdiv);
+    call HplSam3uTwi0.setClockDiv((uint8_t)config->ckdiv);
+
+    call HplSam3uTwi0.disableAllInterrupts();
+  }
+
+  async command void HplSam3uTwi0.disableClock(){
+    call Twi0ClockControl.disable();
+  }
+
+  async command void HplSam3uTwi1.disableClock(){
+    call Twi1ClockControl.disable();
+  }
+
+  async command void HplSam3uTwi0.enableClock(){
+    call Twi0ClockControl.enable();
+  }
+
+  async command void HplSam3uTwi1.enableClock(){
+    call Twi1ClockControl.enable();
+  }
+
+  async command void HplSam3uTwi1.configureTwi(const sam3u_twi_union_config_t *config){
+
+    call Twi1Interrupt.configure(IRQ_PRIO_TWI1);
+    call Twi1Interrupt.enable();
+
+    call Twi1ClockControl.enable();
+
+    call Twd1Pin.disablePioControl();
+    call Twd1Pin.selectPeripheralA();
+    call Twck1Pin.disablePioControl();
+    call Twck1Pin.selectPeripheralA();
+
+    call HplSam3uTwi1.setClockLowDiv((uint8_t)config->cldiv);
+    call HplSam3uTwi1.setClockHighDiv((uint8_t)config->chdiv);
+    call HplSam3uTwi1.setClockDiv((uint8_t)config->ckdiv);
+
+    call HplSam3uTwi1.disableAllInterrupts();
+  }
+
+  async command void HplSam3uTwi0.init(){
+    call HplSam3uTwi0.disableAllInterrupts();
+  }
+
+  async command void HplSam3uTwi1.init(){
+    call HplSam3uTwi1.disableAllInterrupts();
+  }
+
+  async command void HplSam3uTwi0.setStart(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.start = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi0.setStop(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.stop = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi1.setStart(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.start = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi1.setStop(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.stop = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi0.setMaster(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.msen = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi0.disMaster(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.msdis = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi1.setMaster(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.msen = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi1.disMaster(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.msdis = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi0.setSlave(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.sven = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi0.disSlave(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.svdis = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi1.setSlave(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.sven = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi1.disSlave(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.svdis = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi0.setQuick(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.quick = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi1.setQuick(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.quick = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi0.swReset(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI0_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.swrst = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi1.swReset(){
+    volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0);
+    twi_cr_t cr;
+    cr.bits.swrst = 1;
+    *CR = cr;
+  }
+
+  async command void HplSam3uTwi0.setDeviceAddr(uint8_t dadr){
+    volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI0_BASE_ADDR + 0x4);
+    twi_mmr_t mmr = *MMR;
+    mmr.bits.dadr = dadr;
+    *MMR = mmr;
+  }
+  async command void HplSam3uTwi1.setDeviceAddr(uint8_t dadr){
+    volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI1_BASE_ADDR + 0x4);
+    twi_mmr_t mmr = *MMR;
+    mmr.bits.dadr = dadr;
+    *MMR = mmr;
+  }
+  async command void HplSam3uTwi0.setDirection(uint8_t mread){
+    volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI0_BASE_ADDR + 0x4);
+    twi_mmr_t mmr = *MMR;
+    mmr.bits.mread = mread;
+    *MMR = mmr;
+  }
+  async command void HplSam3uTwi1.setDirection(uint8_t mread){
+    volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI1_BASE_ADDR + 0x4);
+    twi_mmr_t mmr = *MMR;
+    mmr.bits.mread = mread;
+    *MMR = mmr;
+  }
+  async command void HplSam3uTwi0.addrSize(uint8_t iadrsz){
+    volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI0_BASE_ADDR + 0x4);
+    twi_mmr_t mmr = *MMR;
+    mmr.bits.iadrsz = iadrsz;
+    *MMR = mmr;
+  }
+  async command void HplSam3uTwi1.addrSize(uint8_t iadrsz){
+    volatile twi_mmr_t* MMR = (volatile twi_mmr_t *) (TWI1_BASE_ADDR + 0x4);
+    twi_mmr_t mmr = *MMR;
+    mmr.bits.iadrsz = iadrsz;
+    *MMR = mmr;
+  }
+
+  async command void HplSam3uTwi0.setSlaveAddr(uint8_t sadr){
+    volatile twi_smr_t* SMR = (volatile twi_smr_t *) (TWI0_BASE_ADDR + 0x8);
+    twi_smr_t smr = *SMR;
+    smr.bits.sadr = sadr;
+    *SMR = smr;
+  }
+  async command void HplSam3uTwi1.setSlaveAddr(uint8_t sadr){
+    volatile twi_smr_t* SMR = (volatile twi_smr_t *) (TWI1_BASE_ADDR + 0x8);
+    twi_smr_t smr = *SMR;
+    smr.bits.sadr = sadr;
+    *SMR = smr;
+  }
+
+  async command void HplSam3uTwi0.setInternalAddr(uint32_t iadr){
+    volatile twi_iadr_t* IADR = (volatile twi_iadr_t *) (TWI0_BASE_ADDR + 0xC);
+    twi_iadr_t iadr_r = *IADR;
+    iadr_r.bits.iadr = iadr;
+    *IADR = iadr_r;
+  }
+  async command void HplSam3uTwi1.setInternalAddr(uint32_t iadr){
+    volatile twi_iadr_t* IADR = (volatile twi_iadr_t *) (TWI1_BASE_ADDR + 0xC);
+    twi_iadr_t iadr_r = *IADR;
+    iadr_r.bits.iadr = iadr;
+    *IADR = iadr_r;
+  }
+
+  async command void HplSam3uTwi0.setClockLowDiv(uint8_t cldiv){
+    volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI0_BASE_ADDR + 0x10);
+    twi_cwgr_t cwgr = *CWGR;
+    cwgr.bits.cldiv = cldiv;
+    *CWGR = cwgr;
+  }
+  async command void HplSam3uTwi1.setClockLowDiv(uint8_t cldiv){
+    volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI1_BASE_ADDR + 0x10);
+    twi_cwgr_t cwgr = *CWGR;
+    cwgr.bits.cldiv = cldiv;
+    *CWGR = cwgr;
+  }
+  async command void HplSam3uTwi0.setClockHighDiv(uint8_t chdiv){
+    volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI0_BASE_ADDR + 0x10);
+    twi_cwgr_t cwgr = *CWGR;
+    cwgr.bits.chdiv = chdiv;
+    *CWGR = cwgr;
+  }
+  async command void HplSam3uTwi1.setClockHighDiv(uint8_t chdiv){
+    volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI1_BASE_ADDR + 0x10);
+    twi_cwgr_t cwgr = *CWGR;
+    cwgr.bits.chdiv = chdiv;
+    *CWGR = cwgr;
+  }
+  async command void HplSam3uTwi0.setClockDiv(uint8_t ckdiv){
+    volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI0_BASE_ADDR + 0x10);
+    twi_cwgr_t cwgr = *CWGR;
+    cwgr.bits.ckdiv = ckdiv;
+    *CWGR = cwgr;
+  }
+  async command void HplSam3uTwi1.setClockDiv(uint8_t ckdiv){
+    volatile twi_cwgr_t* CWGR = (volatile twi_cwgr_t *) (TWI1_BASE_ADDR + 0x10);
+    twi_cwgr_t cwgr = *CWGR;
+    cwgr.bits.ckdiv = ckdiv;
+    *CWGR = cwgr;
+  }
+
+  async command twi_sr_t HplSam3uTwi0.getStatus() {
+    return TWI0->sr;
+  }
+  async command uint8_t HplSam3uTwi0.getTxCompleted(twi_sr_t *sr){
+    return sr->bits.txcomp;
+  }
+  async command uint8_t HplSam3uTwi0.getRxReady(twi_sr_t *sr){
+    return sr->bits.rxrdy;
+  }
+  async command uint8_t HplSam3uTwi0.getTxReady(twi_sr_t *sr){
+    return sr->bits.txrdy;
+  }
+  async command uint8_t HplSam3uTwi0.getSlaveRead(twi_sr_t *sr){
+    return sr->bits.svread;
+  }
+  async command uint8_t HplSam3uTwi0.getSlaveAccess(twi_sr_t *sr){
+    return sr->bits.svacc;
+  }
+  async command uint8_t HplSam3uTwi0.getGenCallAccess(twi_sr_t *sr){
+    return sr->bits.gacc;
+  }
+  async command uint8_t HplSam3uTwi0.getORErr(twi_sr_t *sr){
+    return sr->bits.ovre;
+  }
+  async command uint8_t HplSam3uTwi0.getNack(twi_sr_t *sr){
+    return sr->bits.nack;
+  }
+  async command uint8_t HplSam3uTwi0.getArbLost(twi_sr_t *sr){
+    return sr->bits.arblst;
+  }
+  async command uint8_t HplSam3uTwi0.getClockWaitState(twi_sr_t *sr){
+    return sr->bits.sclws;
+  }
+  async command uint8_t HplSam3uTwi0.getEOSAccess(twi_sr_t *sr){
+    return sr->bits.eosacc;
+  }
+  async command uint8_t HplSam3uTwi0.getEndRx(twi_sr_t *sr){
+    return sr->bits.endrx;
+  }
+  async command uint8_t HplSam3uTwi0.getEndTx(twi_sr_t *sr){
+    return sr->bits.endtx;
+  }
+  async command uint8_t HplSam3uTwi0.getRxBufFull(twi_sr_t *sr){
+    return sr->bits.rxbuff;
+  }
+  async command uint8_t HplSam3uTwi0.getTxBufEmpty(twi_sr_t *sr){
+    return sr->bits.txbufe;
+  }
+
+  async command twi_sr_t HplSam3uTwi1.getStatus() {
+    return TWI1->sr;
+  }
+  async command uint8_t HplSam3uTwi1.getTxCompleted(twi_sr_t *sr){
+    return sr->bits.txcomp;
+  }
+  async command uint8_t HplSam3uTwi1.getRxReady(twi_sr_t *sr){
+    return sr->bits.rxrdy;
+  }
+  async command uint8_t HplSam3uTwi1.getTxReady(twi_sr_t *sr){
+    return sr->bits.txrdy;
+  }
+  async command uint8_t HplSam3uTwi1.getSlaveRead(twi_sr_t *sr){
+    return sr->bits.svread;
+  }
+  async command uint8_t HplSam3uTwi1.getSlaveAccess(twi_sr_t *sr){
+    return sr->bits.svacc;
+  }
+  async command uint8_t HplSam3uTwi1.getGenCallAccess(twi_sr_t *sr){
+    return sr->bits.gacc;
+  }
+  async command uint8_t HplSam3uTwi1.getORErr(twi_sr_t *sr){
+    return sr->bits.ovre;
+  }
+  async command uint8_t HplSam3uTwi1.getNack(twi_sr_t *sr){
+    return sr->bits.nack;
+  }
+  async command uint8_t HplSam3uTwi1.getArbLost(twi_sr_t *sr){
+    return sr->bits.arblst;
+  }
+  async command uint8_t HplSam3uTwi1.getClockWaitState(twi_sr_t *sr){
+    return sr->bits.sclws;
+  }
+  async command uint8_t HplSam3uTwi1.getEOSAccess(twi_sr_t *sr){
+    return sr->bits.eosacc;
+  }
+  async command uint8_t HplSam3uTwi1.getEndRx(twi_sr_t *sr){
+    return sr->bits.endrx;
+  }
+  async command uint8_t HplSam3uTwi1.getEndTx(twi_sr_t *sr){
+    return sr->bits.endtx;
+  }
+  async command uint8_t HplSam3uTwi1.getRxBufFull(twi_sr_t *sr){
+    return sr->bits.rxbuff;
+  }
+  async command uint8_t HplSam3uTwi1.getTxBufEmpty(twi_sr_t *sr){
+    return sr->bits.txbufe;
+  }
+
+  async command void HplSam3uTwi0.setIntTxComp(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.txcomp = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntRxReady(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.rxrdy = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntTxReady(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.txrdy = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntSlaveAccess(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.svacc = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntGenCallAccess(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.gacc = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntORErr(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.ovre = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntNack(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.nack = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntArbLost(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.arblst = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntClockWaitState(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.sclws = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntEOSAccess(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.eosacc = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntEndRx(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.endrx = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntEndTx(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.endtx = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntRxBufFull(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.rxbuff = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi0.setIntTxBufEmpty(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI0_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.txbufe = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntTxComp(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.txcomp = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntRxReady(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.rxrdy = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntTxReady(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.txrdy = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntSlaveAccess(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.svacc = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntGenCallAccess(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.gacc = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntORErr(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.ovre = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntNack(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.nack = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntArbLost(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.arblst = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntClockWaitState(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.sclws = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntEOSAccess(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.eosacc = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntEndRx(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.endrx = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntEndTx(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.endtx = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntRxBufFull(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.rxbuff = 1;
+    *IER = ier;
+  }
+  async command void HplSam3uTwi1.setIntTxBufEmpty(){
+    volatile twi_ier_t* IER = (volatile twi_ier_t *) (TWI1_BASE_ADDR + 0x24);
+    twi_ier_t ier;
+    ier.bits.txbufe = 1;
+    *IER = ier;
+  }
+
+  async command void HplSam3uTwi0.disIntTxComp(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.txcomp = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntRxReady(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.rxrdy = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntTxReady(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.txrdy = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntSlaveAccess(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.svacc = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntGenCallAccess(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.gacc = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntORErr(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.ovre = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntNack(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.nack = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntArbLost(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.arblst = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntClockWaitState(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.sclws = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntEOSAccess(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.eosacc = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntEndRx(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.endrx = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntEndTx(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.endtx = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntRxBufFull(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.rxbuff = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi0.disIntTxBufEmpty(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI0_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.txbufe = 1;
+    *IDR = idr;
+  }
+
+  async command void HplSam3uTwi1.disIntTxComp(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.txcomp = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntRxReady(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.rxrdy = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntTxReady(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.txrdy = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntSlaveAccess(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.svacc = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntGenCallAccess(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.gacc = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntORErr(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.ovre = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntNack(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.nack = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntArbLost(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.arblst = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntClockWaitState(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.sclws = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntEOSAccess(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.eosacc = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntEndRx(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.endrx = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntEndTx(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.endtx = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntRxBufFull(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.rxbuff = 1;
+    *IDR = idr;
+  }
+  async command void HplSam3uTwi1.disIntTxBufEmpty(){
+    volatile twi_idr_t* IDR = (volatile twi_idr_t *) (TWI1_BASE_ADDR + 0x28);
+    twi_idr_t idr;
+    idr.bits.txbufe = 1;
+    *IDR = idr;
+  }
+
+  async command uint8_t HplSam3uTwi0.maskIntTxComp(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.txcomp;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntRxReady(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.rxrdy;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntTxReady(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.txrdy;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntSlaveAccess(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.svacc;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntGenCallAccess(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.gacc;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntORErr(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.ovre;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntNack(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.nack;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntArbLost(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.arblst;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntClockWaitState(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.sclws;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntEOSAccess(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.eosacc;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntEndRx(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.endrx;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntEndTx(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.endtx;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntRxBufFull(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.rxbuff;
+  }
+  async command uint8_t HplSam3uTwi0.maskIntTxBufEmpty(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI0_BASE_ADDR + 0x2C);
+    return IMR->bits.txbufe;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntTxComp(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.txcomp;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntRxReady(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.rxrdy;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntTxReady(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.txrdy;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntSlaveAccess(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.svacc;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntGenCallAccess(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.gacc;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntORErr(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.ovre;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntNack(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.nack;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntArbLost(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.arblst;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntClockWaitState(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.sclws;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntEOSAccess(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.eosacc;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntEndRx(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.endrx;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntEndTx(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.endtx;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntRxBufFull(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.rxbuff;
+  }
+  async command uint8_t HplSam3uTwi1.maskIntTxBufEmpty(){
+    volatile twi_imr_t* IMR = (volatile twi_imr_t *) (TWI1_BASE_ADDR + 0x2C);
+    return IMR->bits.txbufe;
+  }
+
+  async command uint8_t HplSam3uTwi0.readRxReg(){
+    volatile twi_rhr_t* RHR = (volatile twi_rhr_t *) (TWI0_BASE_ADDR + 0x30);
+    return RHR->bits.rxdata;
+  }
+  async command uint8_t HplSam3uTwi1.readRxReg(){
+    volatile twi_rhr_t* RHR = (volatile twi_rhr_t *) (TWI1_BASE_ADDR + 0x30);
+    return RHR->bits.rxdata;
+  }
+
+  async command void HplSam3uTwi0.setTxReg(uint8_t buffer){
+    volatile twi_thr_t* THR = (volatile twi_thr_t *) (TWI0_BASE_ADDR + 0x34);
+    twi_thr_t thr = *THR;
+    thr.bits.txdata = buffer;
+    *THR = thr;
+  }
+
+  async command void HplSam3uTwi1.setTxReg(uint8_t buffer){
+    volatile twi_thr_t* THR = (volatile twi_thr_t *) (TWI1_BASE_ADDR + 0x34);
+    twi_thr_t thr = *THR;
+    thr.bits.txdata = buffer;
+    *THR = thr;
+  }
+
+  async event void Twi0ClockConfig.mainClockChanged(){}
+  async event void Twi1ClockConfig.mainClockChanged(){}
+
+ default async event void Interrupt0.fired(){}
+ default async event void Interrupt1.fired(){}
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiInterrupt.nc b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiInterrupt.nc
new file mode 100644
index 00000000..dd0cb303
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiInterrupt.nc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+interface HplSam3uTwiInterrupt {
+  async event void fired();
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiP.nc b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiP.nc
new file mode 100644
index 00000000..44ce836a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiP.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ * @author Kevin Klues
+ */
+
+configuration HplSam3uTwiP {
+  provides interface HplSam3uTwi as HplSam3uTwi0;
+  provides interface HplSam3uTwi as HplSam3uTwi1;
+  provides interface HplSam3uTwiInterrupt as HplSam3uTwiInterrupt0;
+  provides interface HplSam3uTwiInterrupt as HplSam3uTwiInterrupt1;
+}
+
+implementation {
+
+  components HplSam3uTwiImplP as HplTwiP;
+  HplSam3uTwi0 = HplTwiP.HplSam3uTwi0;
+  HplSam3uTwi1 = HplTwiP.HplSam3uTwi1;
+  HplSam3uTwiInterrupt0 = HplTwiP.Interrupt0;
+  HplSam3uTwiInterrupt1 = HplTwiP.Interrupt1;
+
+  // make and connect pins/clock/interrupt for this dude
+  components HplNVICC, HplSam3uClockC, HplSam3uGeneralIOC, LedsC, NoLedsC;
+  HplTwiP.Twi0Interrupt -> HplNVICC.TWI0Interrupt;
+  HplTwiP.Twi1Interrupt -> HplNVICC.TWI1Interrupt;
+  HplTwiP.Twi0ClockControl -> HplSam3uClockC.TWI0PPCntl;
+  HplTwiP.Twi1ClockControl -> HplSam3uClockC.TWI1PPCntl;
+  HplTwiP.Twd0Pin -> HplSam3uGeneralIOC.HplPioA9;
+  HplTwiP.Twd1Pin -> HplSam3uGeneralIOC.HplPioA24;
+  HplTwiP.Twck0Pin -> HplSam3uGeneralIOC.HplPioA10;
+  HplTwiP.Twck1Pin -> HplSam3uGeneralIOC.HplPioA25;
+  HplTwiP.Leds -> NoLedsC;  
+
+  components McuSleepC;
+  HplTwiP.Twi0InterruptWrapper -> McuSleepC;
+  HplTwiP.Twi1InterruptWrapper -> McuSleepC;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiResourceCtrlC.nc b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiResourceCtrlC.nc
new file mode 100644
index 00000000..e6faccae
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiResourceCtrlC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3utwihardware.h"
+
+configuration HplSam3uTwiResourceCtrlC {
+  provides interface Resource;
+  provides interface ResourceRequested;
+  uses interface ResourceConfigure;
+}
+implementation{
+
+  enum {
+    CLIENT_ID = unique( SAM3U_HPLTWI_RESOURCE ),
+  };
+
+  components HplSam3uTwiResourceCtrlP as TwiP;
+  
+  Resource = TwiP.Resource[ CLIENT_ID ];
+  ResourceRequested = TwiP.ResourceRequested[ CLIENT_ID ];
+  ResourceConfigure = TwiP.ResourceConfigure[ CLIENT_ID ];
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiResourceCtrlP.nc b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiResourceCtrlP.nc
new file mode 100644
index 00000000..c816f630
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/HplSam3uTwiResourceCtrlP.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+configuration HplSam3uTwiResourceCtrlP {
+  provides interface Resource[uint8_t id];
+  provides interface ResourceRequested[uint8_t id];
+  uses interface ResourceConfigure[uint8_t id];
+}
+
+implementation {
+
+  components new FcfsArbiterC( SAM3U_HPLTWI_RESOURCE ) as Arbiter;
+  Resource = Arbiter;
+  ResourceConfigure = Arbiter;
+  ResourceRequested = Arbiter;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/README b/tos/chips/cortex/m3/sam3/u/twi/README
new file mode 100644
index 00000000..ea48c258
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/README
@@ -0,0 +1,12 @@
+Twi Wire Interface (I2C) Implementation for SAM3U
+
+@author JeongGil Ko <jgko@cs.jhu.edu>
+
+The implementations are based on the preliminary specifications.
+
+- The internal address features are not enabled due to the fact that
+  the T2 interfaces do not support these as parameters. It can be
+  easily implemented with Hpl commands.
+
+- Needs testing with onboard temperature sensor. The temperature
+  sensor's address is 0x48. 
diff --git a/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiC.nc b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiC.nc
new file mode 100644
index 00000000..cfd439b0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiC.nc
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3utwihardware.h"
+
+configuration Sam3uTwiC{
+  provides interface Resource;
+  provides interface ResourceRequested;
+  provides interface I2CPacket<TI2CBasicAddr> as TwiBasicAddr0;
+  provides interface I2CPacket<TI2CBasicAddr> as TwiBasicAddr1;
+  provides interface ResourceConfigure as Configure0[ uint8_t id ];
+  provides interface ResourceConfigure as Configure1[ uint8_t id ];
+  provides interface Sam3uTwiInternalAddress as InternalAddress0;
+  provides interface Sam3uTwiInternalAddress as InternalAddress1;
+  uses interface Sam3uTwiConfigure as TwiConfig0;
+  uses interface Sam3uTwiConfigure as TwiConfig1;
+}
+implementation{
+
+  enum {
+    CLIENT_ID = unique( SAM3U_TWI_BUS ),
+  };
+
+  components Sam3uTwiResourceCtrlC as ResourceCtrl;
+  components HplSam3uTwiResourceCtrlC;
+  Resource = ResourceCtrl.Resource[ CLIENT_ID ];
+  ResourceRequested = HplSam3uTwiResourceCtrlC;
+  ResourceCtrl.TwiResource[ CLIENT_ID ] -> HplSam3uTwiResourceCtrlC;
+
+#ifdef SAM3U_TWI_PDC
+  components new Sam3uTwiPDCP(0) as TwiP0;
+  components new Sam3uTwiPDCP(1) as TwiP1;
+  components HplSam3uPdcC;
+  TwiP0.HplPdc -> HplSam3uPdcC.Twi0PdcControl;
+  TwiP1.HplPdc -> HplSam3uPdcC.Twi1PdcControl;
+#else
+  components new Sam3uTwiP() as TwiP0;
+  components new Sam3uTwiP() as TwiP1;
+#endif
+  TwiBasicAddr0 = TwiP0.TwiBasicAddr;
+  TwiBasicAddr1 = TwiP1.TwiBasicAddr;
+  TwiConfig0 = TwiP0.Sam3uTwiConfigure[ CLIENT_ID ];
+  TwiConfig1 = TwiP1.Sam3uTwiConfigure[ CLIENT_ID ];
+  InternalAddress0 = TwiP0.InternalAddr;
+  InternalAddress1 = TwiP1.InternalAddr;
+  Configure0 = TwiP0.ResourceConfigure;
+  Configure1 = TwiP1.ResourceConfigure;
+  TwiP0.ResourceConfigure[ CLIENT_ID ] <- HplSam3uTwiResourceCtrlC.ResourceConfigure;
+  TwiP1.ResourceConfigure[ CLIENT_ID ] <- HplSam3uTwiResourceCtrlC.ResourceConfigure;
+
+  components HplSam3uTwiC as HplTwiC;
+  TwiP0.TwiInterrupt -> HplTwiC.HplSam3uTwiInterrupt0;
+  TwiP1.TwiInterrupt -> HplTwiC.HplSam3uTwiInterrupt1;
+  TwiP0.HplTwi -> HplTwiC.HplSam3uTwi0;
+  TwiP1.HplTwi -> HplTwiC.HplSam3uTwi1;
+
+  components BusyWaitMicroC;
+  TwiP0.BusyWait -> BusyWaitMicroC;
+  TwiP1.BusyWait -> BusyWaitMicroC;
+
+  components new AlarmTMicro16C() as Alarm0;
+  components new AlarmTMicro16C() as Alarm1;
+  TwiP0.Alarm -> Alarm0;
+  TwiP1.Alarm -> Alarm1;
+
+  components LedsC;
+  TwiP0.Leds -> LedsC;
+  TwiP1.Leds -> LedsC;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiConfigure.nc b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiConfigure.nc
new file mode 100644
index 00000000..09369c03
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiConfigure.nc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3utwihardware.h"
+
+interface Sam3uTwiConfigure {
+  async command const sam3u_twi_union_config_t* getConfig();
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiInternalAddress.nc b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiInternalAddress.nc
new file mode 100644
index 00000000..9e2534fa
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiInternalAddress.nc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+interface Sam3uTwiInternalAddress {
+  async command error_t setInternalAddr(uint32_t intAddr, uint8_t size);
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiP.nc b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiP.nc
new file mode 100644
index 00000000..aa26f525
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiP.nc
@@ -0,0 +1,241 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ * @author Kevin Klues
+ */
+
+#include <I2C.h>
+#include "sam3utwihardware.h"
+
+generic module Sam3uTwiP() {
+  provides {
+    interface I2CPacket<TI2CBasicAddr> as TwiBasicAddr;
+    interface ResourceConfigure[uint8_t id];
+    interface Sam3uTwiInternalAddress as InternalAddr;
+  }
+  uses {
+    interface BusyWait<TMicro, uint16_t>;
+    interface Sam3uTwiConfigure[ uint8_t id ];
+    interface HplSam3uTwiInterrupt as TwiInterrupt;  
+    interface HplSam3uTwi as HplTwi;
+    interface Alarm<TMicro, uint16_t>;
+    interface Leds;
+  }
+}
+implementation {
+
+  enum {
+    IDLE_STATE,
+    TX_STATE,
+    RX_STATE,
+  };
+  norace uint8_t STATE = IDLE_STATE;
+
+  const sam3u_twi_union_config_t sam3u_twi_default_config = {
+  cldiv: 0,
+  chdiv: 0,
+  ckdiv: 0
+  };
+
+  norace i2c_flags_t FLAGS;
+  norace uint16_t ADDR;
+  norace uint8_t INIT_LEN;
+  norace uint8_t* INIT_BUFFER;
+  norace uint8_t READ;
+  norace uint8_t WRITE;
+  norace uint8_t IASIZE = 0;
+  norace uint32_t INTADDR = 0;
+
+  async command error_t InternalAddr.setInternalAddr(uint32_t intAddr, uint8_t size){
+    if(STATE == IDLE_STATE) {
+      IASIZE = size;
+      INTADDR = intAddr;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+
+  async command void ResourceConfigure.configure[ uint8_t id ]() {
+    const sam3u_twi_union_config_t* ONE config;
+    config  = call Sam3uTwiConfigure.getConfig[id]();
+    call HplTwi.configureTwi(config);
+  }
+
+  async command void ResourceConfigure.unconfigure[ uint8_t id ]() {
+    // set a parameter CLEAR!
+    call HplTwi.configureTwi(&sam3u_twi_default_config);
+  }
+
+  async command error_t TwiBasicAddr.read(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) {
+    atomic {
+      if(STATE != IDLE_STATE)
+        return EBUSY;
+      STATE = RX_STATE;
+    }
+    FLAGS = flags;
+    ADDR = addr;
+    INIT_LEN = len;
+    INIT_BUFFER = buf;
+    READ = 0;
+
+    call HplTwi.getStatus();
+    if(FLAGS & I2C_START) {
+      call HplTwi.init();
+      call HplTwi.disSlave();
+      call HplTwi.setMaster();
+      call HplTwi.addrSize(IASIZE);
+      call HplTwi.setDeviceAddr((uint8_t)addr);
+      if(IASIZE > 0)
+        call HplTwi.setInternalAddr(INTADDR);
+      call HplTwi.setDirection(1); // read direction
+      call HplTwi.setStart();
+    }
+    if(INIT_LEN == 1)
+      call HplTwi.setStop();
+    call HplTwi.setIntNack();
+    call HplTwi.setIntRxReady();
+    return SUCCESS;
+  }
+
+  async command error_t TwiBasicAddr.write(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) {
+    atomic {
+      if(STATE != IDLE_STATE)
+        return EBUSY;
+      STATE = TX_STATE;
+    }
+    FLAGS = flags;
+    ADDR = addr;
+    INIT_LEN = len;
+    INIT_BUFFER = buf;
+    WRITE = 0;
+
+    call HplTwi.getStatus();
+    if(FLAGS & I2C_START) {
+      call HplTwi.init();
+      call HplTwi.disSlave();
+      call HplTwi.setMaster();
+      call HplTwi.addrSize(IASIZE);
+      call HplTwi.setDeviceAddr((uint8_t)addr);
+      if(IASIZE > 0)
+        call HplTwi.setInternalAddr(INTADDR);
+      call HplTwi.setDirection(0); // write direction
+    }
+    call HplTwi.setTxReg((uint8_t)INIT_BUFFER[WRITE]);
+    call HplTwi.setIntTxReady();  
+    return SUCCESS;
+  }
+
+  void transferComplete(error_t error) {
+    if(STATE == TX_STATE) {
+      atomic STATE = IDLE_STATE;
+      signal TwiBasicAddr.writeDone(error, ADDR, INIT_LEN, INIT_BUFFER);
+    }
+    else if(STATE == RX_STATE) {
+      atomic STATE = IDLE_STATE;
+      signal TwiBasicAddr.readDone(error, ADDR, INIT_LEN, INIT_BUFFER);
+    }
+  }
+
+  void handleInterrupt(twi_sr_t *status) {
+    call Leds.led2Toggle();
+    if(call HplTwi.getNack(status)) {
+      transferComplete(FAIL);
+    }
+  
+    else if(call HplTwi.getRxReady(status)) {
+      INIT_BUFFER[READ] = call HplTwi.readRxReg(); // read out rx buffer     
+      READ++;
+      if(READ == INIT_LEN) {
+        call HplTwi.setIntTxComp();
+        return;
+      }
+
+      if(READ == (INIT_LEN-1)) {
+        if(FLAGS & I2C_STOP) {
+          call HplTwi.setStop();
+        }
+      }
+      call HplTwi.setIntRxReady();
+    }
+
+    else if(call HplTwi.getTxCompleted(status)) {
+      transferComplete(SUCCESS);
+    }
+
+    else if(call HplTwi.getTxReady(status)) {
+      WRITE++; 
+      if(WRITE == INIT_LEN) {
+        if(FLAGS & I2C_STOP)
+          call HplTwi.setStop();		        
+        call HplTwi.setIntTxComp();
+      }     
+      else {
+        call HplTwi.setTxReg((uint8_t)INIT_BUFFER[WRITE]);      
+        call HplTwi.setIntTxReady();
+      }
+    }
+
+  }
+  async event void TwiInterrupt.fired() {
+    twi_sr_t status;
+    call HplTwi.disableAllInterrupts();
+
+    /* NACK errata handling */
+    /* Do not poll the TWI_SR */
+    /* Wait 3 x 9 TWCK pulse (max) 2 if IADRR not used, before reading TWI_SR */
+    /* From 400Khz down to 1Khz, the time to wait will be in us range.*/
+    // TODO: Fixme
+    // The delay used below is specific fo 100KHz, ned to change it to depend on 
+    //  the clock frequency actually specified in the configuration
+    call HplTwi.disableClock();
+    //call Alarm.start(160);
+    call BusyWait.wait(160); 
+    status = call HplTwi.getStatus();
+    call HplTwi.enableClock();
+    handleInterrupt(&status);
+  }
+  async event void Alarm.fired() {
+    twi_sr_t status;
+    call Leds.led1On();
+    status = call HplTwi.getStatus();
+    call HplTwi.enableClock();
+    handleInterrupt(&status);
+  }
+
+  default async command const sam3u_twi_union_config_t* Sam3uTwiConfigure.getConfig[uint8_t id]() {
+    return &sam3u_twi_default_config;
+  }
+  default async event void TwiBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){}
+  default async event void TwiBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){}
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiPDCP.nc b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiPDCP.nc
new file mode 100644
index 00000000..a30622cf
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiPDCP.nc
@@ -0,0 +1,363 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include <I2C.h>
+#include "sam3utwihardware.h"
+
+generic module Sam3uTwiPDCP(uint8_t channel) {
+  provides interface I2CPacket<TI2CBasicAddr> as TwiBasicAddr;
+  provides interface ResourceConfigure[uint8_t id];
+  provides interface Sam3uTwiInternalAddress as InternalAddr;
+  uses interface Leds;
+  uses interface Sam3uTwiConfigure[ uint8_t id ];
+  uses interface HplSam3uTwiInterrupt as TwiInterrupt;  
+  uses interface HplSam3uTwi as HplTwi;
+  uses interface HplSam3uPdc as HplPdc;
+}
+implementation {
+
+  typedef enum {
+    RX_STATE,
+    TX_STATE,
+    IDLE_STATE,
+  } sam3u_twi_action_state_t;
+
+  const sam3u_twi_union_config_t sam3u_twi_default_config = {
+  cldiv: 0,
+  chdiv: 0,
+  ckdiv: 0
+  };
+
+  norace sam3u_twi_action_state_t ACTION_STATE = IDLE_STATE;
+  norace uint16_t ADDR;
+  norace uint8_t LEN;
+  norace uint8_t* BUFFER;
+  norace i2c_flags_t FLAGS;
+  norace uint8_t* INIT_BUFFER;
+  norace uint8_t INIT_LEN;
+  norace uint8_t READ;
+  norace uint8_t WRITE;
+  norace uint8_t IASIZE = 0;
+  norace uint32_t INTADDR = 0;
+
+  void initTwi(){
+    switch(channel){
+    case 0:
+      call HplTwi.init0();
+      break;
+    case 1:
+      call HplTwi.init1();
+      break;
+    }
+  }
+
+  async command void InternalAddr.setInternalAddrSize(uint8_t size){
+    atomic IASIZE = size;
+  }
+  async command void InternalAddr.setInternalAddr(uint32_t intAddr){
+    atomic INTADDR = intAddr;
+  }
+
+  async command void ResourceConfigure.configure[ uint8_t id ]() {
+    const sam3u_twi_union_config_t* ONE config;
+    config  = call Sam3uTwiConfigure.getConfig[id]();
+    switch(channel){
+    case 0:
+      call HplTwi.configureTwi0(config);
+      call HplTwi.setInterruptID(id);
+      break;
+    case 1:
+      call HplTwi.configureTwi1(config);
+      call HplTwi.setInterruptID(id);
+      break;
+    }
+  }
+
+  async command void ResourceConfigure.unconfigure[ uint8_t id ]() {
+    switch(channel){
+    case 0:
+      call HplTwi.configureTwi0(&sam3u_twi_default_config);
+      break;
+    case 1:
+      call HplTwi.configureTwi1(&sam3u_twi_default_config);
+      break;
+    }
+  }
+
+  async command error_t TwiBasicAddr.read(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) {
+    const sam3u_twi_union_config_t* ONE config;
+    config  = call Sam3uTwiConfigure.getConfig[0]();
+
+    if(ACTION_STATE != RX_STATE){
+      if(ACTION_STATE != IDLE_STATE){
+	return EBUSY;
+      }
+      atomic INIT_BUFFER = buf;
+      atomic INIT_LEN = len;
+      atomic ACTION_STATE = RX_STATE;
+      atomic READ = 0;
+      initTwi();
+    }
+    atomic FLAGS = flags;
+    atomic ADDR = addr;
+    atomic LEN = len;
+    atomic BUFFER = buf;
+
+    switch(channel){
+    case 0:
+      call HplTwi.disMaster0();
+      call HplTwi.disSlave0();
+      call HplTwi.setMaster0();
+      
+      //set up PDC registers
+      call HplPdc.setRxPtr(buf);
+      call HplPdc.setRxCounter(len);
+
+      //set up master read mode
+      call HplTwi.addrSize0(IASIZE);
+      call HplTwi.setDeviceAddr0((uint8_t)addr); // this is for the connected sensor
+      if(IASIZE > 0)
+	call HplTwi.setInternalAddr0(INTADDR);
+      call HplTwi.setDirection0(1); // read direction
+
+      //enable interrupt for PDC
+      call HplTwi.setIntRxReady0();
+
+      //start the read process via pdc
+      if(flags == I2C_START){
+      if(len == 1)
+        call HplTwi.setStop0();
+	call HplPdc.enablePdcRx();
+	call HplTwi.setStart0();
+      }      
+      break;
+    case 1:
+      call HplTwi.disMaster1();
+      call HplTwi.disSlave1();
+      call HplTwi.setMaster1();
+      
+      //set up PDC registers
+      call HplPdc.setRxPtr(buf);
+      call HplPdc.setRxCounter(len);
+
+      //set up master read mode
+      call HplTwi.addrSize1(IASIZE);
+      call HplTwi.setDeviceAddr1((uint8_t)addr); // this is for the connected sensor
+      if(IASIZE > 0)
+	call HplTwi.setInternalAddr1(INTADDR);
+      call HplTwi.setDirection1(1); // read direction
+
+      //enable interrupt for PDC
+      call HplTwi.setIntRxReady1();
+
+      //start the read process via pdc
+      if(flags == I2C_START){
+	if(len == 1)
+	  call HplTwi.setStop1();
+	call HplPdc.enablePdcRx();
+	call HplTwi.setStart1();
+      }
+      break;
+    }
+    return SUCCESS;
+  }
+
+  async command error_t TwiBasicAddr.write(i2c_flags_t flags, uint16_t addr, uint8_t len, uint8_t* buf ) {
+    if(ACTION_STATE != TX_STATE){
+      if(ACTION_STATE != IDLE_STATE){
+	return EBUSY;
+      }
+      atomic INIT_BUFFER = buf;
+      atomic INIT_LEN = len;
+      atomic ACTION_STATE = TX_STATE;
+      atomic WRITE = 0;
+      initTwi();
+    }
+
+    atomic FLAGS = flags;
+    atomic ADDR = addr;
+    atomic LEN = len;
+    atomic BUFFER = buf;
+
+    switch(channel){
+    case 0:
+      call HplPdc.setTxPtr(buf);
+      call HplPdc.setTxCounter(len);
+
+      call HplTwi.disSlave0();
+      call HplTwi.setMaster0();
+
+      call HplTwi.addrSize0(IASIZE);
+      call HplTwi.setDeviceAddr0((uint8_t)addr);
+      if(IASIZE > 0)
+	call HplTwi.setInternalAddr0(INTADDR);
+      call HplTwi.setDirection0(0); //write direction
+
+      call HplTwi.setIntTxReady0();
+
+      if(flags == I2C_START){
+	call HplPdc.enablePdcTx();
+	if(len == 1){
+	  call HplTwi.setIntTxComp0();
+	  call HplTwi.setStop0();
+	}
+      }
+      break;
+    case 1:
+      call HplPdc.setTxPtr(buf);
+      call HplPdc.setTxCounter(len);
+
+      call HplTwi.disSlave1();
+      call HplTwi.setMaster1();
+
+      call HplTwi.addrSize1(IASIZE);
+      call HplTwi.setDeviceAddr1((uint8_t)addr);
+      if(IASIZE > 0)
+	call HplTwi.setInternalAddr1(INTADDR);
+      call HplTwi.setDirection1(0); //write direction
+
+      call HplTwi.setIntTxReady1();
+
+      if(flags == I2C_START){
+	call HplPdc.enablePdcTx();
+	if(len == 1){
+	  call HplTwi.setIntTxComp1();
+	  call HplTwi.setStop1();
+	}
+      }
+      break;
+    }
+    return SUCCESS;
+  }
+
+  async event void TwiInterrupt.fired0(){
+    if(ACTION_STATE == RX_STATE){
+      if(call HplPdc.getRxCounter()){
+	if(call HplPdc.getRxCounter() == 1){
+	  call HplTwi.setStop0();
+	}
+      }else if(call HplPdc.getRxCounter() == 0){
+	atomic ACTION_STATE = IDLE_STATE;
+	call HplPdc.disablePdcRx();
+	signal TwiBasicAddr.readDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER);
+      }
+    }else { // using PDC instead of TWI next block
+      /***/
+      if(call HplPdc.getTxCounter()){
+	if(call HplPdc.getTxCounter() == 1){
+	  call HplTwi.setStop0();
+          atomic ACTION_STATE = IDLE_STATE;
+	  call HplTwi.disIntTxReady0();
+	  call HplTwi.disIntTxComp0();
+	  call HplPdc.disablePdcTx();
+	  signal TwiBasicAddr.writeDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER);
+	}
+      }else if(call HplPdc.getTxCounter() == 0){
+	atomic ACTION_STATE = IDLE_STATE;
+	call HplTwi.disIntTxReady0();
+	call HplTwi.disIntTxComp0();
+	call HplPdc.disablePdcTx();
+        call Leds.led2Toggle();
+	signal TwiBasicAddr.writeDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER);
+      }
+      /***/
+   /****  
+      WRITE ++;
+      if(INIT_LEN != 1 && WRITE == INIT_LEN){
+      //if(INIT_LEN != 1 && call HplPdc.getTxCounter() == 0 ){
+	call HplTwi.disIntTxReady0();
+	call HplTwi.disIntTxComp0();
+	//call HplPdc.setTxPtr(INIT_BUFFER);
+	//call HplPdc.setTxCounter(1);
+	//call HplPdc.enablePdcTx();
+	call HplTwi.setStop0();
+	call HplPdc.disablePdcTx();
+	atomic ACTION_STATE = IDLE_STATE;
+	signal TwiBasicAddr.writeDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER);
+	call Leds.led2Toggle();
+      }else if( INIT_LEN == 1){
+	call Leds.led1Toggle();
+	atomic ACTION_STATE = IDLE_STATE;
+	call HplTwi.disIntTxReady0();
+	call HplTwi.disIntTxComp0();
+	call HplPdc.disablePdcTx();
+	signal TwiBasicAddr.writeDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER);
+      } 
+   ****/
+    }
+  }
+
+  async event void TwiInterrupt.fired1(){
+    if(ACTION_STATE == RX_STATE){
+      if(call HplPdc.getRxCounter()){
+	if(call HplPdc.getRxCounter() == 1){
+	  call HplTwi.setStop1();
+	}
+      }else if(call HplPdc.getRxCounter() == 0){
+	atomic ACTION_STATE = IDLE_STATE;
+	call HplPdc.disablePdcRx();
+	signal TwiBasicAddr.readDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER);
+      }
+    }else{
+      WRITE ++;
+      if(INIT_LEN != 1 && WRITE == INIT_LEN){
+	call HplTwi.disIntTxReady1();
+	call HplTwi.disIntTxComp1();
+	//call HplPdc.setTxPtr(INIT_BUFFER);
+	//call HplPdc.setTxCounter(1);
+	//call HplPdc.enablePdcTx();
+	call HplTwi.setStop1();
+	call HplPdc.disablePdcTx();
+	atomic ACTION_STATE = IDLE_STATE;
+	signal TwiBasicAddr.writeDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER);
+	call Leds.led0Toggle();
+      }else if( INIT_LEN == 1){
+	call Leds.led1Toggle();
+	atomic ACTION_STATE = IDLE_STATE;
+	call HplTwi.disIntTxReady1();
+	call HplTwi.disIntTxComp1();
+	call HplPdc.disablePdcTx();
+	signal TwiBasicAddr.writeDone(SUCCESS, ADDR, INIT_LEN, INIT_BUFFER);
+      }
+    }
+  }
+
+  default async command const sam3u_twi_union_config_t* Sam3uTwiConfigure.getConfig[uint8_t id]() {
+    return &sam3u_twi_default_config;
+  }
+
+ default async event void TwiBasicAddr.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){}
+ default async event void TwiBasicAddr.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data){}
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiResourceCtrlC.nc b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiResourceCtrlC.nc
new file mode 100644
index 00000000..682983b5
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiResourceCtrlC.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+configuration Sam3uTwiResourceCtrlC {
+  provides interface Resource[ uint8_t id ];
+  uses interface Resource as TwiResource[ uint8_t id ];
+}
+implementation {
+  components Sam3uTwiResourceCtrlP as TwiP;
+  components LedsC, NoLedsC;
+  Resource = TwiP.Resource;
+  TwiResource = TwiP.TwiResource;
+  TwiP.Leds -> NoLedsC;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiResourceCtrlP.nc b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiResourceCtrlP.nc
new file mode 100644
index 00000000..e33968fe
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/Sam3uTwiResourceCtrlP.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author JeongGil Ko
+ */
+
+#include "sam3utwihardware.h"
+module Sam3uTwiResourceCtrlP{
+  provides interface Resource[ uint8_t id ];
+  uses interface Resource as TwiResource[ uint8_t id ];
+  uses interface Leds;
+}
+implementation{
+
+  async command error_t Resource.immediateRequest[ uint8_t id ]() {
+    return call TwiResource.immediateRequest[ id ]();
+  }
+
+  async command error_t Resource.request[ uint8_t id ]() {
+    return call TwiResource.request[ id ]();
+  }
+
+  async command uint8_t Resource.isOwner[ uint8_t id ]() {
+    return call TwiResource.isOwner[ id ]();
+  }
+
+  async command error_t Resource.release[ uint8_t id ]() {
+    return call TwiResource.release[ id ]();
+  }
+
+  event void TwiResource.granted[ uint8_t id ]() {
+    signal Resource.granted[ id ]();
+  }
+
+  default async command error_t TwiResource.request[ uint8_t id ]() { return FAIL; }
+  default async command error_t TwiResource.immediateRequest[ uint8_t id ]() { return FAIL; }
+  default async command error_t TwiResource.release[ uint8_t id ]() {return FAIL;}
+  default event void Resource.granted[ uint8_t id ]() {}
+}
diff --git a/tos/chips/cortex/m3/sam3/u/twi/sam3utwihardware.h b/tos/chips/cortex/m3/sam3/u/twi/sam3utwihardware.h
new file mode 100644
index 00000000..4a9668f9
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/twi/sam3utwihardware.h
@@ -0,0 +1,315 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * TWI register definitions.
+ *
+ * @author JeongGil Ko
+ */
+
+#ifndef _SAM3UTWIHARDWARE_H
+#define _SAM3UTWIHARDWARE_H
+
+/**
+ *  TWI Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 665
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t start      :  1;
+    uint32_t stop       :  1;
+    uint32_t msen       :  1;
+    uint32_t msdis      :  1;
+    uint32_t sven       :  1;
+    uint32_t svdis      :  1;
+    uint32_t quick      :  1;
+    uint32_t swrst      :  1;
+    uint32_t reserved0  :  8;
+    uint32_t reserved1 : 16;
+  } __attribute__((__packed__)) bits;
+} twi_cr_t; 
+
+/**
+ *  TWI Master Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 667
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t reserved0  :  8;
+    uint32_t iadrsz     :  2;
+    uint32_t reserved1  :  2;
+    uint32_t mread      :  1;
+    uint32_t reserved2  :  3;
+    uint32_t dadr       :  7;
+    uint32_t reserved3  :  1;
+    uint32_t reserved4  :  8;
+  } __attribute__((__packed__)) bits;
+} twi_mmr_t; 
+
+/**
+ *  TWI Slave Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 668
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t reserved0  : 16;
+    uint32_t sadr       :  7;
+    uint32_t reserved1  :  1;
+    uint32_t reserved2  :  8;
+  } __attribute__((__packed__)) bits;
+} twi_smr_t; 
+
+/**
+ *  TWI Internal Address Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 669
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t iadr      : 24;
+    uint32_t reserved0  :  8;
+  } __attribute__((__packed__)) bits;
+} twi_iadr_t; 
+
+/**
+ *  TWI Clock Waveform Generator Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 670
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t cldiv      :  8;
+    uint32_t chdiv      :  8;
+    uint32_t ckdiv      :  3;
+    uint32_t reserved0  :  5;
+    uint32_t reserved1  :  8;
+  } __attribute__((__packed__)) bits;
+} twi_cwgr_t; 
+
+/**
+ *  TWI Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 671
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t txcomp     :  1;
+    uint32_t rxrdy      :  1;
+    uint32_t txrdy      :  1;
+    uint32_t svread     :  1;
+    uint32_t svacc      :  1;
+    uint32_t gacc       :  1;
+    uint32_t ovre       :  1;
+    uint32_t reserved0  :  1;
+    uint32_t nack       :  1;
+    uint32_t arblst     :  1;
+    uint32_t sclws      :  1;
+    uint32_t eosacc     :  1;
+    uint32_t endrx      :  1;
+    uint32_t endtx      :  1;
+    uint32_t rxbuff     :  1;
+    uint32_t txbufe     :  1;
+    uint32_t reserved1  : 16;
+  } __attribute__((__packed__)) bits;
+} twi_sr_t; 
+
+/**
+ *  TWI Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 675
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t txcomp     :  1;
+    uint32_t rxrdy      :  1;
+    uint32_t txrdy      :  1;
+    uint32_t reserved0  :  1;
+    uint32_t svacc      :  1;
+    uint32_t gacc       :  1;
+    uint32_t ovre       :  1;
+    uint32_t reserved1  :  1;
+    uint32_t nack       :  1;
+    uint32_t arblst     :  1;
+    uint32_t sclws      :  1;
+    uint32_t eosacc     :  1;
+    uint32_t endrx      :  1;
+    uint32_t endtx      :  1;
+    uint32_t rxbuff     :  1;
+    uint32_t txbufe     :  1;
+    uint32_t reserved2  : 16;
+  } __attribute__((__packed__)) bits;
+} twi_ier_t; 
+
+/**
+ *  TWI Interrupt Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 676
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t txcomp     :  1;
+    uint8_t rxrdy      :  1;
+    uint8_t txrdy      :  1;
+    uint8_t reserved0  :  1;
+    uint8_t svacc      :  1;
+    uint8_t gacc       :  1;
+    uint8_t ovre       :  1;
+    uint8_t reserved1  :  1;
+    uint8_t nack       :  1;
+    uint8_t arblst     :  1;
+    uint8_t sclws      :  1;
+    uint8_t eosacc     :  1;
+    uint8_t endrx      :  1;
+    uint8_t endtx      :  1;
+    uint8_t rxbuff     :  1;
+    uint8_t txbufe     :  1;
+    uint16_t reserved2 : 16;
+  } __attribute__((__packed__)) bits;
+} twi_idr_t; 
+
+/**
+ *  TWI Interrupt Mask Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 677
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t txcomp     :  1;
+    uint32_t rxrdy      :  1;
+    uint32_t txrdy      :  1;
+    uint32_t reserved0  :  1;
+    uint32_t svacc      :  1;
+    uint32_t gacc       :  1;
+    uint32_t ovre       :  1;
+    uint32_t reserved1  :  1;
+    uint32_t nack       :  1;
+    uint32_t arblst     :  1;
+    uint32_t sclws      :  1;
+    uint32_t eosacc     :  1;
+    uint32_t endrx      :  1;
+    uint32_t endtx      :  1;
+    uint32_t rxbuff     :  1;
+    uint32_t txbufe     :  1;
+    uint32_t reserved2  : 16;
+  } __attribute__((__packed__)) bits;
+} twi_imr_t; 
+
+
+/**
+ *  TWI Receive Holding Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 678
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t rxdata     :  8;
+    uint32_t reserved0  :  8;
+    uint32_t reserved1  : 16;
+  } __attribute__((__packed__)) bits;
+} twi_rhr_t; 
+
+/**
+ *  TWI Transmit Holding Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 678
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t txdata     :  8;
+    uint32_t reserved0  :  8;
+    uint32_t reserved1  : 16;
+  } __attribute__((__packed__)) bits;
+} twi_thr_t; 
+
+
+/**
+ * TWI Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary, p. 664
+ */
+typedef struct twi
+{
+  volatile twi_cr_t cr;
+  volatile twi_mmr_t mmr;
+  volatile twi_smr_t smr;
+  volatile twi_iadr_t iadr;
+  volatile twi_cwgr_t cwgr;
+  uint32_t reserved0[3];
+  volatile twi_sr_t sr;
+  volatile twi_ier_t ier;
+  volatile twi_idr_t idr;
+  volatile twi_imr_t imr;
+  volatile twi_rhr_t rhr;
+  volatile twi_thr_t thr;
+} twi_t;
+
+volatile twi_t* TWI0 = (volatile twi_t*) 0x40084000; // base addr for twi0
+volatile twi_t* TWI1 = (volatile twi_t*) 0x40088000; // base addr for twi1
+
+#define TWI0_BASE_ADDR 0x40084000
+#define TWI1_BASE_ADDR 0x40088000
+
+#define SAM3U_TWI_BUS "SAM3UTWI.Resource"
+#define SAM3U_HPLTWI_RESOURCE "SAM3UTWI.Resource"
+
+typedef struct {
+  unsigned int cldiv :8;
+  unsigned int chdiv :8;
+  unsigned int ckdiv :3;
+  
+} sam3u_twi_union_config_t;
+
+#endif // _SAM3UTWIHARDWARE_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/uart/HilSam3UartC.nc b/tos/chips/cortex/m3/sam3/u/uart/HilSam3UartC.nc
new file mode 100644
index 00000000..6401cf85
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/uart/HilSam3UartC.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+configuration HilSam3UartC
+{
+	provides
+	{
+		interface StdControl;
+		interface UartByte;
+		interface UartStream;
+	}
+}
+implementation
+{
+	components HilSam3UartP;
+	StdControl = HilSam3UartP;
+	UartByte = HilSam3UartP;
+	UartStream = HilSam3UartP;
+
+	components HplSam3UartC;
+	HilSam3UartP.HplSam3UartInterrupts -> HplSam3UartC;
+	HilSam3UartP.HplSam3UartStatus -> HplSam3UartC;
+	HilSam3UartP.HplSam3UartControl -> HplSam3UartC;
+	HilSam3UartP.HplSam3UartConfig -> HplSam3UartC;
+
+#ifdef THREADS
+	components PlatformInterruptC;
+	HplSam3UartC.PlatformInterrupt -> PlatformInterruptC;
+#endif
+
+	components MainC;
+	MainC.SoftwareInit -> HilSam3UartP.Init;
+
+	components HplNVICC;
+	HilSam3UartP.UartIrqControl -> HplNVICC.DBGUInterrupt;
+
+	components HplSam3uGeneralIOC;
+	HilSam3UartP.UartPin1 -> HplSam3uGeneralIOC.HplPioA11;
+	HilSam3UartP.UartPin2 -> HplSam3uGeneralIOC.HplPioA12;
+
+	components HplSam3uClockC;
+	HilSam3UartP.UartClockControl -> HplSam3uClockC.DBGUPPCntl;
+	HilSam3UartP.ClockConfig -> HplSam3uClockC;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/uart/sam3uarthardware.h b/tos/chips/cortex/m3/sam3/u/uart/sam3uarthardware.h
new file mode 100644
index 00000000..33f2b298
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/uart/sam3uarthardware.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Definitions specific to the SAM3U UART chip.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#ifndef SAM3UUARTHARDWARE_H
+#define SAM3UUARTHARDWARE_H
+
+#include "uarthardware.h"
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 667
+volatile uint32_t*    UART_BASE = (volatile uint32_t *)   0x400e0600;
+volatile uart_cr_t*   UART_CR   = (volatile uart_cr_t*)   0x400e0600; // control, wo
+volatile uart_mr_t*   UART_MR   = (volatile uart_mr_t*)   0x400e0604; // mode, rw, reset 0x0
+volatile uart_ier_t*  UART_IER  = (volatile uart_ier_t*)  0x400e0608; // interrupt enable, wo
+volatile uart_idr_t*  UART_IDR  = (volatile uart_idr_t*)  0x400e060c; // interrupt disable, wo
+volatile uart_imr_t*  UART_IMR  = (volatile uart_imr_t*)  0x400e0610; // interrupt mask, ro, reset 0x0
+volatile uart_sr_t*   UART_SR   = (volatile uart_sr_t*)   0x400e0614; // status, ro
+volatile uart_rhr_t*  UART_RHR  = (volatile uart_rhr_t*)  0x400e0618; // receive holding, ro, reset 0x0
+volatile uart_thr_t*  UART_THR  = (volatile uart_thr_t*)  0x400e061c; // transmit holding, wo
+volatile uart_brgr_t* UART_BRGR = (volatile uart_brgr_t*) 0x400e0620; // baud rate generator, rw, reset 0x0
+
+#endif // SAM3UUARTHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart0C.nc b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart0C.nc
new file mode 100644
index 00000000..cc86dea5
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart0C.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration HplSam3uUsart0C{
+  provides interface HplSam3uUsartControl;
+}
+implementation{
+  components HplSam3uUsart0P as UsartP;
+  HplSam3uUsartControl = UsartP.Usart;
+
+  components HplSam3uGeneralIOC, HplSam3uClockC, HplNVICC;
+  UsartP.USART_CTS0 -> HplSam3uGeneralIOC.HplPioB8;
+  UsartP.USART_RTS0 -> HplSam3uGeneralIOC.HplPioB7;
+  UsartP.USART_RXD0 -> HplSam3uGeneralIOC.HplPioA19;
+  UsartP.USART_SCK0 -> HplSam3uGeneralIOC.HplPioA17;
+  UsartP.USART_TXD0 -> HplSam3uGeneralIOC.HplPioA18;
+
+  UsartP.USARTClockControl0 -> HplSam3uClockC.US0PPCntl;
+  UsartP.USARTInterrupt0 -> HplNVICC.US1Interrupt;
+
+  UsartP.ClockConfig -> HplSam3uClockC;
+
+  components McuSleepC;
+  UsartP.Usart0InterruptWrapper -> McuSleepC;
+
+  components LedsC;
+  UsartP.Leds -> LedsC;
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart0P.nc b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart0P.nc
new file mode 100644
index 00000000..3bb63d87
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart0P.nc
@@ -0,0 +1,344 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sam3uusarthardware.h>
+
+module HplSam3uUsart0P{
+  provides interface HplSam3uUsartControl as Usart; 
+  
+  uses{
+    interface HplNVICInterruptCntl as USARTInterrupt0;
+    interface HplSam3uGeneralIOPin as USART_CTS0;
+    interface HplSam3uGeneralIOPin as USART_RTS0;
+    interface HplSam3uGeneralIOPin as USART_RXD0;
+    interface HplSam3uGeneralIOPin as USART_SCK0;
+    interface HplSam3uGeneralIOPin as USART_TXD0;
+    interface HplSam3uPeripheralClockCntl as USARTClockControl0;
+    interface HplSam3uClock as ClockConfig;
+    interface FunctionWrapper as Usart0InterruptWrapper;
+    interface Leds;
+  }
+
+}
+implementation{
+
+#define USART0_BASE_ADDR 0x40090000
+
+  uint16_t recv_data;
+
+  enum{
+    S_READ,
+    S_WRITE,
+    S_IDLE,
+  };
+
+  uint8_t STATE;
+
+  void enableInterruptRead(){
+    // enables interrupt for read
+    volatile usart_ier_t *IER = (volatile usart_ier_t*) (USART0_BASE_ADDR + 0x8);
+    usart_ier_t ier = *IER;
+
+    ier.bits.endrx = 1;
+
+    *IER = ier;
+  }
+
+  void enableInterruptWrite(){
+    // enables interrupt for write    
+    volatile usart_ier_t *IER = (volatile usart_ier_t*) (USART0_BASE_ADDR + 0x8);
+    usart_ier_t ier = *IER;
+
+    ier.bits.endtx = 1;
+
+    *IER = ier;
+  }
+
+  void disableInterrupt(){
+    // disable all interrupts
+    volatile usart_idr_t *IDR = (volatile usart_idr_t*) (USART0_BASE_ADDR + 0xC);
+    usart_idr_t idr = *IDR;
+    idr.bits.endtx = 1;
+    idr.bits.endrx = 1;
+    *IDR = idr;
+  }
+
+  command void Usart.init(){
+
+    // init pins and clock
+
+    call USARTInterrupt0.configure(IRQ_PRIO_USART1);
+    call USARTInterrupt0.enable();
+
+    call USARTClockControl0.enable();
+
+    call USART_CTS0.disablePioControl();
+    call USART_CTS0.selectPeripheralA();
+
+    call USART_RTS0.disablePioControl();
+    call USART_RTS0.selectPeripheralA();
+
+    call USART_RXD0.disablePioControl();
+    call USART_RXD0.selectPeripheralA();
+
+    call USART_SCK0.disablePioControl();
+    call USART_SCK0.selectPeripheralA();
+
+    call USART_TXD0.disablePioControl();
+    call USART_TXD0.selectPeripheralA();
+  }
+
+  command void Usart.configure(uint32_t mode, uint32_t baudrate){
+    //configure control mode and baud rate
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART0_BASE_ADDR + 0x0);
+    usart_cr_t cr = *CR;
+
+    volatile usart_mr_t *MR = (volatile usart_mr_t*) (USART0_BASE_ADDR + 0x4);
+    usart_mr_t mr = *MR;
+
+    volatile usart_brgr_t *BRGR = (volatile usart_brgr_t*) (USART0_BASE_ADDR + 0x20);
+    usart_brgr_t brgr = *BRGR;
+
+    uint32_t cd;
+    uint32_t masterClock = call ClockConfig.getMainClockSpeed();
+    cd = (masterClock * 1000 / baudrate) / 16;
+
+    cr.bits.rsttx = 1;
+    cr.bits.rstrx = 1;
+    cr.bits.rxdis = 1;
+    cr.bits.txdis = 1;
+    *CR = cr;
+
+    mr = (usart_mr_t) mode;
+    *MR = mr;
+
+    if(mr.bits.sync_cpha == 0 && mr.bits.over == 0){
+      // Async mode and no oversampling
+      brgr.bits.fp = 0;
+      brgr.bits.cd = cd; // check 35.7.9 of sam3u specs for other modes
+      *BRGR = brgr;
+    }
+    STATE = S_IDLE;
+  }
+
+  command void Usart.enableTx(){
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART0_BASE_ADDR + 0x0);
+    usart_cr_t cr;
+
+    cr.bits.txdis = 0;
+    *CR = cr;
+
+    cr.bits.txen = 1;
+    *CR = cr;
+  }
+
+  command void Usart.disableTx(){
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART0_BASE_ADDR + 0x0);
+    usart_cr_t cr = *CR;
+    cr.bits.txdis = 1;
+    *CR = cr;
+  }
+
+  command void Usart.enableRx(){
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART0_BASE_ADDR + 0x0);
+    usart_cr_t cr = *CR;
+    cr.bits.rxen = 1;
+    *CR = cr;
+  }
+
+  command void Usart.enableRxInterrupt(){
+    enableInterruptRead();
+  }
+
+  command void Usart.enableTxInterrupt(){
+    enableInterruptWrite();
+  }
+
+  command void Usart.disableRx(){
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART0_BASE_ADDR + 0x0);
+    usart_cr_t cr = *CR;
+    cr.bits.rxdis = 1;
+    *CR = cr;
+  }
+
+  command error_t Usart.write(uint8_t sync, uint16_t data, uint32_t timeout){
+    volatile usart_thr_t *THR = (volatile usart_thr_t*) (USART0_BASE_ADDR + 0x1C);
+    usart_thr_t thr = *THR;
+
+    call Usart.enableTx();
+
+    thr.bits.txsynh = sync;
+    thr.bits.txchr = data;
+    *THR = thr;
+
+    // enable interrupts here!
+
+    STATE = S_WRITE;
+
+    enableInterruptWrite();
+
+    return SUCCESS;
+  }
+
+  command error_t Usart.read(uint16_t *data, uint32_t timeout){
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART0_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+
+    volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART0_BASE_ADDR + 0x18);
+    usart_rhr_t rhr = *RHR;
+
+    /*
+    if(timeout == 0){
+      while(csr.bits.rxrdy == 0);
+    }else{
+      while(csr.bits.rxrdy == 0){
+	timeout --;
+	if(timeout == 0)
+	  return FAIL;
+      }
+    }
+    */
+
+    STATE = S_READ;
+
+    *data = rhr.bits.rxchr;
+    //&recv_data = data;
+    // enable interrupts here!
+    enableInterruptRead();
+
+    return SUCCESS;
+  }
+
+  command bool Usart.isDataAvailable(){
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART0_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+    if(csr.bits.rxrdy != 0)
+      return TRUE;
+    else
+      return FALSE;
+  }
+
+  command void Usart.setIrdaFilter(uint32_t filter){
+    volatile usart_if_t *IF = (volatile usart_if_t*) (USART0_BASE_ADDR + 0x4C);
+    usart_if_t if_usart = *IF;
+
+    if_usart = (usart_if_t) filter;
+    *IF = if_usart;
+  }
+
+  command error_t Usart.putChar(uint8_t sync, uint16_t data){
+
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART0_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+
+    volatile usart_thr_t *THR = (volatile usart_thr_t*) (USART0_BASE_ADDR + 0x1C);
+    usart_thr_t thr = *THR;
+
+    while(csr.bits.txempty == 0);
+
+    thr.bits.txsynh = sync;
+    thr.bits.txchr = data;
+    *THR = thr;
+
+    csr = *CSR;
+    while(csr.bits.txempty == 0);
+
+    STATE = S_WRITE;
+
+    // enable interrupts here!
+    enableInterruptWrite();
+
+    return SUCCESS;
+  }
+
+  command bool Usart.isRxReady(){
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART0_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+    if(csr.bits.rxrdy != 0)
+      return FALSE;
+    else
+      return TRUE;
+  }
+
+  command error_t Usart.getChar(uint16_t *data){
+    
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART0_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+
+    volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART0_BASE_ADDR + 0x18);
+    usart_rhr_t rhr = *RHR;
+
+    while(csr.bits.rxrdy == 0);
+
+    *data = rhr.bits.rxchr;
+
+    STATE = S_READ;
+
+    // enable interrupts here!
+    enableInterruptRead();
+
+    return SUCCESS;
+  }
+
+
+  __attribute__((interrupt)) void Usart0IrqHandler() @C() @spontaneous(){
+
+    call Usart0InterruptWrapper.preamble();
+    //if(csr.bits.endrx == 1){
+    disableInterrupt();
+
+    if(STATE == S_READ){
+      // end reading
+      volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART0_BASE_ADDR + 0x18);
+      usart_rhr_t rhr = *RHR;
+
+      call Leds.led1Toggle();
+
+      recv_data = rhr.bits.rxchr;
+      signal Usart.readDone((uint8_t) recv_data);
+    }else if(STATE == S_WRITE){
+      //}else if(csr.bits.endtx == 1){
+      // tx is done
+      call Leds.led0Toggle();
+
+      signal Usart.writeDone();
+    }
+    STATE = S_IDLE;
+    enableInterruptRead();
+    call Usart0InterruptWrapper.postamble();
+  }
+
+  async event void ClockConfig.mainClockChanged() {};
+ default event void Usart.writeDone(){}
+ default event void Usart.readDone(uint8_t data){}
+
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart1C.nc b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart1C.nc
new file mode 100644
index 00000000..67b35808
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart1C.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration HplSam3uUsart1C{
+  provides interface HplSam3uUsartControl;
+}
+implementation{
+  components HplSam3uUsart1P as UsartP;
+  HplSam3uUsartControl = UsartP.Usart;
+
+
+  components HplSam3uGeneralIOC, HplSam3uClockC, HplNVICC;
+
+  UsartP.USART_CTS1 -> HplSam3uGeneralIOC.HplPioA23;
+  UsartP.USART_RTS1 -> HplSam3uGeneralIOC.HplPioA22;
+  UsartP.USART_RXD1 -> HplSam3uGeneralIOC.HplPioA21;
+  UsartP.USART_SCK1 -> HplSam3uGeneralIOC.HplPioA24;
+  UsartP.USART_TXD1 -> HplSam3uGeneralIOC.HplPioA20;
+
+  UsartP.USARTClockControl1 -> HplSam3uClockC.US1PPCntl;
+  UsartP.USARTInterrupt1 -> HplNVICC.US1Interrupt;
+
+  UsartP.ClockConfig -> HplSam3uClockC;
+
+  components McuSleepC;
+  UsartP.Usart1InterruptWrapper -> McuSleepC;
+
+  components LedsC;
+  UsartP.Leds -> LedsC;
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart1P.nc b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart1P.nc
new file mode 100644
index 00000000..1f1ad0b3
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart1P.nc
@@ -0,0 +1,368 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sam3uusarthardware.h>
+
+module HplSam3uUsart1P{
+  provides interface HplSam3uUsartControl as Usart; 
+  
+  uses{
+    interface HplNVICInterruptCntl as USARTInterrupt1;
+    interface HplSam3uGeneralIOPin as USART_CTS1;
+    interface HplSam3uGeneralIOPin as USART_RTS1;
+    interface HplSam3uGeneralIOPin as USART_RXD1;
+    interface HplSam3uGeneralIOPin as USART_SCK1;
+    interface HplSam3uGeneralIOPin as USART_TXD1;
+    interface HplSam3uPeripheralClockCntl as USARTClockControl1;
+    interface HplSam3uClock as ClockConfig;
+    interface FunctionWrapper as Usart1InterruptWrapper;
+    interface Leds;
+  }
+
+}
+implementation{
+
+#define USART1_BASE_ADDR 0x40094000
+
+  uint16_t recv_data;
+
+  enum{
+    S_READ,
+    S_WRITE,
+    S_IDLE,
+  };
+
+  uint8_t STATE;
+
+  void enableInterruptRead(){
+    // enables interrupt for read
+    volatile usart_ier_t *IER = (volatile usart_ier_t*) (USART1_BASE_ADDR + 0x8);
+    usart_ier_t ier = *IER;
+
+    ier.bits.rxrdy = 1;
+
+    *IER = ier;
+  }
+
+  void enableInterruptWrite(){
+    // enables interrupt for write    
+    volatile usart_ier_t *IER = (volatile usart_ier_t*) (USART1_BASE_ADDR + 0x8);
+    usart_ier_t ier = *IER;
+
+    //ier.flat = 0xFFFFFFFF;
+    ier.bits.txrdy = 1;
+
+    *IER = ier;
+  }
+
+  void disableInterrupt(){
+    // disable all interrupts
+    volatile usart_idr_t *IDR = (volatile usart_idr_t*) (USART1_BASE_ADDR + 0xC);
+    usart_idr_t idr = *IDR;
+    idr.bits.txrdy = 1;
+    idr.bits.rxrdy = 1;
+    *IDR = idr;
+  }
+
+  void disableRxInterrupt(){
+    volatile usart_idr_t *IDR = (volatile usart_idr_t*) (USART1_BASE_ADDR + 0xC);
+    usart_idr_t idr = *IDR;
+    idr.bits.rxrdy = 1;
+    *IDR = idr;
+  }
+
+  void disableTxInterrupt(){
+    volatile usart_idr_t *IDR = (volatile usart_idr_t*) (USART1_BASE_ADDR + 0xC);
+    usart_idr_t idr = *IDR;
+    idr.bits.txrdy = 1;
+    *IDR = idr;
+  }
+
+  command void Usart.init(){
+
+    // init pins and clock
+
+    call USART_CTS1.disablePioControl();
+    call USART_CTS1.selectPeripheralB();
+
+    call USART_RTS1.disablePioControl();
+    call USART_RTS1.selectPeripheralB();
+
+    call USART_RXD1.disablePioControl();
+    call USART_RXD1.selectPeripheralA();
+
+    call USART_SCK1.disablePioControl();
+    call USART_SCK1.selectPeripheralB();
+
+    call USART_TXD1.disablePioControl();
+    call USART_TXD1.selectPeripheralA();
+
+    call USARTClockControl1.enable();
+
+  }
+
+  command void Usart.configure(uint32_t mode, uint32_t baudrate){
+    //configure control mode and baud rate
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART1_BASE_ADDR + 0x0);
+    usart_cr_t cr = *CR;
+
+    volatile usart_mr_t *MR = (volatile usart_mr_t*) (USART1_BASE_ADDR + 0x4);
+    usart_mr_t mr = *MR;
+
+    volatile usart_brgr_t *BRGR = (volatile usart_brgr_t*) (USART1_BASE_ADDR + 0x20);
+    usart_brgr_t brgr = *BRGR;
+
+    uint32_t cd;
+    uint32_t masterClock = call ClockConfig.getMainClockSpeed();
+    cd = (masterClock * 1000 / baudrate) / 16;
+
+    cr.bits.rsttx = 1;
+    cr.bits.rstrx = 1;
+    cr.bits.rxdis = 1;
+    cr.bits.txdis = 1;
+    *CR = cr;
+
+    mr = (usart_mr_t) mode;
+    *MR = mr;
+
+    if(mr.bits.sync_cpha == 0 && mr.bits.over == 0){
+      // Async mode and no oversampling
+      brgr.bits.fp = 0;
+      brgr.bits.cd = cd; // check 35.7.9 of sam3u specs for other modes
+      *BRGR = brgr;
+    }
+
+    call USARTInterrupt1.configure(IRQ_PRIO_USART1);
+    call USARTInterrupt1.enable();
+
+    STATE = S_IDLE;
+  }
+
+  command void Usart.enableTx(){
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART1_BASE_ADDR + 0x0);
+    usart_cr_t cr;
+
+    cr.bits.txdis = 0;
+    *CR = cr;
+
+    cr.bits.txen = 1;
+    *CR = cr;
+  }
+
+  command void Usart.disableTx(){
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART1_BASE_ADDR + 0x0);
+    usart_cr_t cr = *CR;
+    cr.bits.txdis = 1;
+    *CR = cr;
+  }
+
+  command void Usart.enableRx(){
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART1_BASE_ADDR + 0x0);
+    usart_cr_t cr = *CR;
+    cr.bits.rxen = 1;
+    *CR = cr;
+    call Usart.enableRxInterrupt();
+  }
+
+  command void Usart.enableRxInterrupt(){
+    enableInterruptRead();
+  }
+
+  command void Usart.enableTxInterrupt(){
+    enableInterruptWrite();
+  }
+
+  command void Usart.disableRx(){
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART1_BASE_ADDR + 0x0);
+    usart_cr_t cr = *CR;
+    cr.bits.rxdis = 1;
+    *CR = cr;
+  }
+
+  command error_t Usart.write(uint8_t sync, uint16_t data, uint32_t timeout){
+    volatile usart_thr_t *THR = (volatile usart_thr_t*) (USART1_BASE_ADDR + 0x1C);
+    usart_thr_t thr = *THR;
+
+    call Usart.enableTx();
+
+    STATE = S_WRITE;
+
+    thr.bits.txsynh = sync;
+    thr.bits.txchr = data;
+    *THR = thr;
+
+    enableInterruptWrite();
+    // enable interrupts here!
+
+
+    call Leds.led1Toggle();
+
+    return SUCCESS;
+  }
+
+  command error_t Usart.read(uint16_t *data, uint32_t timeout){
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART1_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+
+    volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART1_BASE_ADDR + 0x18);
+    usart_rhr_t rhr = *RHR;
+
+    /*
+    if(timeout == 0){
+      while(csr.bits.rxrdy == 0);
+    }else{
+      while(csr.bits.txrdy == 0){
+	timeout --;
+	if(timeout == 0)
+	  return FAIL;
+      }
+    }
+    */
+
+    STATE = S_READ;
+
+    *data = rhr.bits.rxchr;
+    //&recv_data = data;
+    // enable interrupts here!
+    //enableInterruptRead();
+
+    return SUCCESS;
+  }
+
+  command bool Usart.isDataAvailable(){
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART1_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+    if(csr.bits.rxrdy != 0)
+      return TRUE;
+    else
+      return FALSE;
+  }
+
+  command void Usart.setIrdaFilter(uint32_t filter){
+    volatile usart_if_t *IF = (volatile usart_if_t*) (USART1_BASE_ADDR + 0x4C);
+    usart_if_t if_usart = *IF;
+
+    if_usart = (usart_if_t) filter;
+    *IF = if_usart;
+  }
+
+  command error_t Usart.putChar(uint8_t sync, uint16_t data){
+
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART1_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+
+    volatile usart_thr_t *THR = (volatile usart_thr_t*) (USART1_BASE_ADDR + 0x1C);
+    usart_thr_t thr = *THR;
+
+    while(csr.bits.txempty == 0);
+
+    thr.bits.txsynh = sync;
+    thr.bits.txchr = data;
+    *THR = thr;
+
+    csr = *CSR;
+    while(csr.bits.txempty == 0);
+
+    STATE = S_WRITE;
+
+    // enable interrupts here!
+    enableInterruptWrite();
+
+    return SUCCESS;
+  }
+
+  command bool Usart.isRxReady(){
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART1_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+    if(csr.bits.rxrdy != 0)
+      return FALSE;
+    else
+      return TRUE;
+  }
+
+  command error_t Usart.getChar(uint16_t *data){
+    
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART1_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+
+    volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART1_BASE_ADDR + 0x18);
+    usart_rhr_t rhr = *RHR;
+
+    while(csr.bits.rxrdy == 0);
+
+    *data = rhr.bits.rxchr;
+
+    STATE = S_READ;
+
+    // enable interrupts here!
+    enableInterruptRead();
+
+    return SUCCESS;
+  }
+
+  __attribute__((interrupt)) void Usart1IrqHandler() @C() @spontaneous(){
+
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART1_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+
+    call Usart1InterruptWrapper.preamble();
+    disableInterrupt();
+
+    //
+    if(/*STATE == S_READ || STATE == S_IDLE*/csr.bits.rxrdy){
+      // end reading
+      volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART1_BASE_ADDR + 0x18);
+      //usart_rhr_t rhr = *RHR;
+
+      //recv_data = rhr.bits.rxchr;
+      recv_data = RHR->bits.rxchr;
+
+      //if(!CSR->bits.rxrdy)
+      //call Leds.led1Toggle();
+
+      signal Usart.readDone((uint8_t) recv_data);
+    }
+    //if(){
+    else if(STATE == S_WRITE && csr.bits.txrdy){
+      // tx is done
+      signal Usart.writeDone();
+    }
+    STATE = S_IDLE;
+    enableInterruptRead();
+    call Usart1InterruptWrapper.postamble();
+    //call Leds.led2Toggle();
+  }
+
+  async event void ClockConfig.mainClockChanged() {};
+ default event void Usart.writeDone(){}
+ default event void Usart.readDone(uint8_t data){}
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart2C.nc b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart2C.nc
new file mode 100644
index 00000000..b952363e
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart2C.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration HplSam3uUsart2C{
+  provides interface HplSam3uUsartControl;
+}
+implementation{
+  components HplSam3uUsart2P as UsartP;
+  HplSam3uUsartControl = UsartP.Usart;
+
+
+  components HplSam3uGeneralIOC, HplSam3uClockC, HplNVICC;
+
+  UsartP.USART_CTS2 -> HplSam3uGeneralIOC.HplPioB22;
+  UsartP.USART_RTS2 -> HplSam3uGeneralIOC.HplPioB21;
+  UsartP.USART_RXD2 -> HplSam3uGeneralIOC.HplPioA23;
+  UsartP.USART_SCK2 -> HplSam3uGeneralIOC.HplPioA25;
+  UsartP.USART_TXD2 -> HplSam3uGeneralIOC.HplPioA22;
+
+  UsartP.USARTClockControl2 -> HplSam3uClockC.US2PPCntl;
+  UsartP.USARTInterrupt2 -> HplNVICC.US1Interrupt;
+
+  UsartP.ClockConfig -> HplSam3uClockC;
+
+  components McuSleepC;
+  UsartP.Usart2InterruptWrapper -> McuSleepC;
+
+  components LedsC;
+  UsartP.Leds -> LedsC;
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart2P.nc b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart2P.nc
new file mode 100644
index 00000000..f15e2efa
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsart2P.nc
@@ -0,0 +1,343 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sam3uusarthardware.h>
+
+module HplSam3uUsart2P{
+  provides interface HplSam3uUsartControl as Usart; 
+  
+  uses{
+    interface HplNVICInterruptCntl as USARTInterrupt2;
+    interface HplSam3uGeneralIOPin as USART_CTS2;
+    interface HplSam3uGeneralIOPin as USART_RTS2;
+    interface HplSam3uGeneralIOPin as USART_RXD2;
+    interface HplSam3uGeneralIOPin as USART_SCK2;
+    interface HplSam3uGeneralIOPin as USART_TXD2;
+    interface HplSam3uPeripheralClockCntl as USARTClockControl2;
+    interface HplSam3uClock as ClockConfig;
+    interface FunctionWrapper as Usart2InterruptWrapper;
+    interface Leds;
+  }
+
+}
+implementation{
+
+#define USART2_BASE_ADDR 0x40098000
+
+  uint16_t recv_data;
+
+  enum{
+    S_READ,
+    S_WRITE,
+    S_IDLE,
+  };
+
+  uint8_t STATE;
+
+  void enableInterruptRead(){
+    // enables interrupt for read
+    volatile usart_ier_t *IER = (volatile usart_ier_t*) (USART2_BASE_ADDR + 0x8);
+    usart_ier_t ier = *IER;
+
+    ier.bits.endrx = 1;
+
+    *IER = ier;
+  }
+
+  void enableInterruptWrite(){
+    // enables interrupt for write    
+    volatile usart_ier_t *IER = (volatile usart_ier_t*) (USART2_BASE_ADDR + 0x8);
+    usart_ier_t ier = *IER;
+
+    ier.bits.endtx = 1;
+
+    *IER = ier;
+  }
+
+  void disableInterrupt(){
+    // disable all interrupts
+    volatile usart_idr_t *IDR = (volatile usart_idr_t*) (USART2_BASE_ADDR + 0xC);
+    usart_idr_t idr = *IDR;
+    idr.bits.endtx = 1;
+    idr.bits.endrx = 1;
+    *IDR = idr;
+  }
+
+  command void Usart.init(){
+
+    // init pins and clock
+
+    call USARTInterrupt2.configure(IRQ_PRIO_USART2);
+    call USARTInterrupt2.enable();
+
+    call USARTClockControl2.enable();
+
+    call USART_CTS2.disablePioControl();
+    call USART_CTS2.selectPeripheralB();
+
+    call USART_RTS2.disablePioControl();
+    call USART_RTS2.selectPeripheralB();
+
+    call USART_RXD2.disablePioControl();
+    call USART_RXD2.selectPeripheralA();
+
+    call USART_SCK2.disablePioControl();
+    call USART_SCK2.selectPeripheralB();
+
+    call USART_TXD2.disablePioControl();
+    call USART_TXD2.selectPeripheralA();
+  }
+
+  command void Usart.configure(uint32_t mode, uint32_t baudrate){
+    //configure control mode and baud rate
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART2_BASE_ADDR + 0x0);
+    usart_cr_t cr = *CR;
+
+    volatile usart_mr_t *MR = (volatile usart_mr_t*) (USART2_BASE_ADDR + 0x4);
+    usart_mr_t mr = *MR;
+
+    volatile usart_brgr_t *BRGR = (volatile usart_brgr_t*) (USART2_BASE_ADDR + 0x20);
+    usart_brgr_t brgr = *BRGR;
+
+    uint32_t cd;
+    uint32_t masterClock = call ClockConfig.getMainClockSpeed();
+    cd = (masterClock * 1000 / baudrate) / 16;
+
+    cr.bits.rsttx = 1;
+    cr.bits.rstrx = 1;
+    cr.bits.rxdis = 1;
+    cr.bits.txdis = 1;
+    *CR = cr;
+
+    mr = (usart_mr_t) mode;
+    *MR = mr;
+
+    if(mr.bits.sync_cpha == 0 && mr.bits.over == 0){
+      // Async mode and no oversampling
+      brgr.bits.fp = 0;
+      brgr.bits.cd = cd; // check 35.7.9 of sam3u specs for other modes
+      *BRGR = brgr;
+    }
+    STATE = S_IDLE;
+  }
+
+  command void Usart.enableTx(){
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART2_BASE_ADDR + 0x0);
+    usart_cr_t cr;
+
+    cr.bits.txdis = 0;
+    *CR = cr;
+
+    cr.bits.txen = 1;
+    *CR = cr;
+  }
+
+  command void Usart.disableTx(){
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART2_BASE_ADDR + 0x0);
+    usart_cr_t cr = *CR;
+    cr.bits.txdis = 1;
+    *CR = cr;
+  }
+
+  command void Usart.enableRx(){
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART2_BASE_ADDR + 0x0);
+    usart_cr_t cr = *CR;
+    cr.bits.rxen = 1;
+    *CR = cr;
+  }
+
+  command void Usart.enableRxInterrupt(){
+    enableInterruptRead();
+  }
+
+  command void Usart.enableTxInterrupt(){
+    enableInterruptWrite();
+  }
+
+  command void Usart.disableRx(){
+    volatile usart_cr_t *CR = (volatile usart_cr_t*) (USART2_BASE_ADDR + 0x0);
+    usart_cr_t cr = *CR;
+    cr.bits.rxdis = 1;
+    *CR = cr;
+  }
+
+  command error_t Usart.write(uint8_t sync, uint16_t data, uint32_t timeout){
+    volatile usart_thr_t *THR = (volatile usart_thr_t*) (USART2_BASE_ADDR + 0x1C);
+    usart_thr_t thr = *THR;
+
+    call Usart.enableTx();
+
+    thr.bits.txsynh = sync;
+    thr.bits.txchr = data;
+    *THR = thr;
+
+    // enable interrupts here!
+
+    STATE = S_WRITE;
+
+    enableInterruptWrite();
+
+    return SUCCESS;
+  }
+
+  command error_t Usart.read(uint16_t *data, uint32_t timeout){
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART2_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+
+    volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART2_BASE_ADDR + 0x18);
+    usart_rhr_t rhr = *RHR;
+
+    /*
+    if(timeout == 0){
+      while(csr.bits.rxrdy == 0);
+    }else{
+      while(csr.bits.txrdy == 0){
+	timeout --;
+	if(timeout == 0)
+	  return FAIL;
+      }
+    }
+    */
+
+    STATE = S_READ;
+
+    *data = rhr.bits.rxchr;
+    //&recv_data = data;
+    // enable interrupts here!
+    enableInterruptRead();
+
+    return SUCCESS;
+  }
+
+  command bool Usart.isDataAvailable(){
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART2_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+    if(csr.bits.rxrdy != 0)
+      return TRUE;
+    else
+      return FALSE;
+  }
+
+  command void Usart.setIrdaFilter(uint32_t filter){
+    volatile usart_if_t *IF = (volatile usart_if_t*) (USART2_BASE_ADDR + 0x4C);
+    usart_if_t if_usart = *IF;
+
+    if_usart = (usart_if_t) filter;
+    *IF = if_usart;
+  }
+
+  command error_t Usart.putChar(uint8_t sync, uint16_t data){
+
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART2_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+
+    volatile usart_thr_t *THR = (volatile usart_thr_t*) (USART2_BASE_ADDR + 0x1C);
+    usart_thr_t thr = *THR;
+
+    while(csr.bits.txempty == 0);
+
+    thr.bits.txsynh = sync;
+    thr.bits.txchr = data;
+    *THR = thr;
+
+    csr = *CSR;
+    while(csr.bits.txempty == 0);
+
+    STATE = S_WRITE;
+
+    // enable interrupts here!
+    enableInterruptWrite();
+
+    return SUCCESS;
+  }
+
+  command bool Usart.isRxReady(){
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART2_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+    if(csr.bits.rxrdy != 0)
+      return FALSE;
+    else
+      return TRUE;
+  }
+
+  command error_t Usart.getChar(uint16_t *data){
+    
+    volatile usart_csr_t *CSR = (volatile usart_csr_t*) (USART2_BASE_ADDR + 0x14);
+    usart_csr_t csr = *CSR;
+
+    volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART2_BASE_ADDR + 0x18);
+    usart_rhr_t rhr = *RHR;
+
+    while(csr.bits.rxrdy == 0);
+
+    *data = rhr.bits.rxchr;
+
+    STATE = S_READ;
+
+    // enable interrupts here!
+    enableInterruptRead();
+
+    return SUCCESS;
+  }
+
+
+  __attribute__((interrupt)) void Usart2IrqHandler() @C() @spontaneous(){
+
+    call Usart2InterruptWrapper.preamble();
+    //if(csr.bits.endrx == 1){
+    if(STATE == S_READ){
+      // end reading
+      volatile usart_rhr_t *RHR = (volatile usart_rhr_t*) (USART2_BASE_ADDR + 0x18);
+      usart_rhr_t rhr = *RHR;
+
+      call Leds.led1Toggle();
+      disableInterrupt();
+
+      recv_data = rhr.bits.rxchr;
+      signal Usart.readDone((uint8_t) recv_data);
+    }else if(STATE == S_WRITE){
+      //}else if(csr.bits.endtx == 1){
+      // tx is done
+      call Leds.led0Toggle();
+      disableInterrupt();
+
+      signal Usart.writeDone();
+    }
+    STATE = S_IDLE;
+    call Usart2InterruptWrapper.postamble();
+  }
+
+  async event void ClockConfig.mainClockChanged() {};
+ default event void Usart.writeDone(){}
+ default event void Usart.readDone(uint8_t data){}
+
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsartControl.nc b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsartControl.nc
new file mode 100644
index 00000000..b08d7324
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/HplSam3uUsartControl.nc
@@ -0,0 +1,50 @@
+/* 
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+interface HplSam3uUsartControl{
+  command void init();
+  command void configure(uint32_t mode, uint32_t baudrate);
+  command void enableTx();
+  command void disableTx();
+  command void enableTxInterrupt();
+  command void enableRx();
+  command void enableRxInterrupt();
+  command void disableRx();
+  command error_t write(uint8_t sync, uint16_t data, uint32_t timeout);
+  command error_t read(uint16_t *data, uint32_t timeout);
+  command bool isDataAvailable();
+  command void setIrdaFilter(uint32_t filter);
+  command error_t putChar(uint8_t sync, uint16_t data);
+  command bool isRxReady();
+  command error_t getChar(uint16_t *data);
+  event void writeDone();
+  event void readDone(uint8_t data);
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart.nc b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart.nc
new file mode 100644
index 00000000..79b50977
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart.nc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+interface Sam3uUsart{
+  command void start();
+  event void startDone(error_t err);
+  command error_t stop();
+  event void stopDone(error_t err);
+
+  command void send(uint8_t data);
+  command void sendStream(void* msg, uint8_t length);
+  command void listen(void* msg, uint8_t length);
+
+  event void sendDone(error_t error);
+  event void receive(error_t error, uint8_t data);
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart0C.nc b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart0C.nc
new file mode 100644
index 00000000..2e31e0d9
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart0C.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration Sam3uUsart0C {
+  provides interface Sam3uUsart;
+}
+implementation{
+  components Sam3uUsart0P, HplSam3uUsart0C;
+  Sam3uUsart = Sam3uUsart0P;
+  Sam3uUsart0P.HplUsart -> HplSam3uUsart0C;
+
+  components LedsC;
+  Sam3uUsart0P.Leds -> LedsC;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart0P.nc b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart0P.nc
new file mode 100644
index 00000000..93367c38
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart0P.nc
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sam3uusarthardware.h>
+
+module Sam3uUsart0P {
+  provides interface Sam3uUsart;
+  uses interface HplSam3uUsartControl as HplUsart;
+  uses interface Leds;
+}
+
+implementation{
+
+  uint32_t mode_register = AT91C_US_USMODE_NORMAL
+    | AT91C_US_CLKS_CLOCK
+    | AT91C_US_CHRL_8_BITS
+    | AT91C_US_PAR_NONE
+    | AT91C_US_NBSTOP_1_BIT
+    | AT91C_US_CHMODE_NORMAL;
+
+  bool STREAM = FALSE;
+  uint8_t total_send_length, current_length_position;
+  uint8_t *sending_data_ptr;
+
+  command void Sam3uUsart.start(){
+    call HplUsart.init();
+    call HplUsart.configure(mode_register, 115200);
+
+    call HplUsart.enableTx();
+    call HplUsart.enableRx();
+
+    signal Sam3uUsart.startDone(SUCCESS);
+  }
+
+  command error_t Sam3uUsart.stop(){    
+    call HplUsart.disableTx();
+    call HplUsart.disableRx();
+
+    signal Sam3uUsart.stopDone(SUCCESS);
+  }
+
+  command void Sam3uUsart.sendStream(void* msg, uint8_t length){
+    // send data byte by byte
+    uint8_t data;
+    total_send_length = length;
+    current_length_position = 0;
+    STREAM = TRUE;
+    sending_data_ptr = msg;
+    data = sending_data_ptr[0];
+    call HplUsart.write(0, data, 0);
+  }
+
+  command void Sam3uUsart.send(uint8_t data){
+    // send data byte by byte
+    STREAM = FALSE;
+    call HplUsart.write(0, data, 0);
+  }
+
+  command void Sam3uUsart.listen(void* msg, uint8_t length){
+  }
+
+  event void HplUsart.writeDone(){
+    current_length_position ++ ;
+    if(!STREAM){
+      call Leds.led2Toggle();
+      signal Sam3uUsart.sendDone(SUCCESS);
+      return;
+    }else {
+      current_length_position ++ ;
+      if(total_send_length > current_length_position){
+	call HplUsart.write(0, (uint8_t)sending_data_ptr[current_length_position], 0);
+      }else{
+	STREAM = FALSE;
+	signal Sam3uUsart.sendDone(SUCCESS);
+	return;
+      }
+    }
+  }
+
+  event void HplUsart.readDone(uint8_t data){
+    signal Sam3uUsart.receive(SUCCESS, data);
+  }
+
+
+
+ default event void Sam3uUsart.sendDone(error_t error){}
+ default event void Sam3uUsart.receive(error_t error, uint8_t data){}
+ default event void Sam3uUsart.startDone(error_t error){}
+ default event void Sam3uUsart.stopDone(error_t error){}
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart1C.nc b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart1C.nc
new file mode 100644
index 00000000..fc4bebb2
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart1C.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration Sam3uUsart1C {
+  provides interface Sam3uUsart;
+}
+implementation{
+  components Sam3uUsart1P, HplSam3uUsart1C;
+  Sam3uUsart = Sam3uUsart1P;
+  Sam3uUsart1P.HplUsart -> HplSam3uUsart1C;
+
+  components LedsC;
+  Sam3uUsart1P.Leds -> LedsC;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart1P.nc b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart1P.nc
new file mode 100644
index 00000000..c1cbd15f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart1P.nc
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sam3uusarthardware.h>
+
+module Sam3uUsart1P {
+  provides interface Sam3uUsart;
+  uses interface HplSam3uUsartControl as HplUsart;
+  uses interface Leds;
+}
+
+implementation{
+
+  uint32_t mode_register = AT91C_US_USMODE_NORMAL
+    | AT91C_US_CLKS_CLOCK
+    | AT91C_US_ASYNC
+    | AT91C_US_CHRL_8_BITS
+    | AT91C_US_PAR_NONE
+    | AT91C_US_NBSTOP_1_BIT
+    | AT91C_US_CHMODE_NORMAL;
+
+  bool STREAM = FALSE;
+  uint8_t total_send_length, current_length_position;
+  uint8_t *sending_data_ptr;
+
+  command void Sam3uUsart.start(){
+    call HplUsart.init();
+    call HplUsart.configure(mode_register, 38400 /*9600*/);
+
+    call HplUsart.enableTx();
+    call HplUsart.enableRx();
+
+    signal Sam3uUsart.startDone(SUCCESS);
+  }
+
+  command error_t Sam3uUsart.stop(){    
+    call HplUsart.disableTx();
+    call HplUsart.disableRx();
+
+    signal Sam3uUsart.stopDone(SUCCESS);
+  }
+
+  command void Sam3uUsart.sendStream(void* msg, uint8_t length){
+    // send data byte by byte
+    uint8_t data;
+    total_send_length = length;
+    current_length_position = 0;
+    STREAM = TRUE;
+    sending_data_ptr = msg;
+    data = sending_data_ptr[0];
+    call HplUsart.write(0, data, 0);
+  }
+
+  command void Sam3uUsart.send(uint8_t data){
+    // send data byte by byte
+    STREAM = FALSE;
+    call HplUsart.write(0, data, 0);
+  }
+
+  command void Sam3uUsart.listen(void* msg, uint8_t length){
+  }
+
+  event void HplUsart.writeDone(){
+    current_length_position ++ ;
+    if(!STREAM){
+      signal Sam3uUsart.sendDone(SUCCESS);
+      return;
+    }else {
+      current_length_position ++ ;
+      if(total_send_length > current_length_position){
+	call HplUsart.write(0, (uint8_t)sending_data_ptr[current_length_position], 0);
+      }else{
+	STREAM = FALSE;
+	signal Sam3uUsart.sendDone(SUCCESS);
+	return;
+      }
+    }
+  }
+
+  event void HplUsart.readDone(uint8_t data){
+    signal Sam3uUsart.receive(SUCCESS, data);
+  }
+
+
+
+ default event void Sam3uUsart.sendDone(error_t error){}
+ default event void Sam3uUsart.receive(error_t error, uint8_t data){}
+ default event void Sam3uUsart.startDone(error_t error){}
+ default event void Sam3uUsart.stopDone(error_t error){}
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart2C.nc b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart2C.nc
new file mode 100644
index 00000000..5663e7bd
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart2C.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration Sam3uUsart2C {
+  provides interface Sam3uUsart;
+}
+implementation{
+  components Sam3uUsart2P, HplSam3uUsart2C;
+  Sam3uUsart = Sam3uUsart2P;
+  Sam3uUsart2P.HplUsart -> HplSam3uUsart2C;
+
+  components LedsC;
+  Sam3uUsart2P.Leds -> LedsC;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart2P.nc b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart2P.nc
new file mode 100644
index 00000000..8bd771a3
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/Sam3uUsart2P.nc
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sam3uusarthardware.h>
+module Sam3uUsart2P {
+  provides interface Sam3uUsart;
+  uses interface HplSam3uUsartControl as HplUsart;
+  uses interface Leds;
+}
+
+implementation{
+
+  uint32_t mode_register = AT91C_US_USMODE_NORMAL
+    | AT91C_US_CLKS_CLOCK
+    | AT91C_US_CHRL_8_BITS
+    | AT91C_US_PAR_NONE
+    | AT91C_US_NBSTOP_1_BIT
+    | AT91C_US_CHMODE_NORMAL;
+
+  bool STREAM = FALSE;
+  uint8_t total_send_length, current_length_position;
+  uint8_t *sending_data_ptr;
+
+  command void Sam3uUsart.start(){
+    call HplUsart.init();
+    call HplUsart.configure(mode_register, 115200);
+
+    call HplUsart.enableTx();
+    call HplUsart.enableRx();
+
+    signal Sam3uUsart.startDone(SUCCESS);
+  }
+
+  command error_t Sam3uUsart.stop(){    
+    call HplUsart.disableTx();
+    call HplUsart.disableRx();
+
+    signal Sam3uUsart.stopDone(SUCCESS);
+  }
+
+  command void Sam3uUsart.sendStream(void* msg, uint8_t length){
+    // send data byte by byte
+    uint8_t data;
+    total_send_length = length;
+    current_length_position = 0;
+    STREAM = TRUE;
+    sending_data_ptr = msg;
+    data = sending_data_ptr[0];
+    call HplUsart.write(0, data, 0);
+  }
+
+  command void Sam3uUsart.send(uint8_t data){
+    // send data byte by byte
+    STREAM = FALSE;
+    call HplUsart.write(0, data, 0);
+  }
+
+  command void Sam3uUsart.listen(void* msg, uint8_t length){
+  }
+
+  event void HplUsart.writeDone(){
+    current_length_position ++ ;
+    if(!STREAM){
+      signal Sam3uUsart.sendDone(SUCCESS);
+      return;
+    }else {
+      current_length_position ++ ;
+      if(total_send_length > current_length_position){
+	call HplUsart.write(0, (uint8_t)sending_data_ptr[current_length_position], 0);
+      }else{
+	STREAM = FALSE;
+	signal Sam3uUsart.sendDone(SUCCESS);
+	return;
+      }
+    }
+  }
+
+  event void HplUsart.readDone(uint8_t data){
+    signal Sam3uUsart.receive(SUCCESS, data);
+  }
+
+
+
+ default event void Sam3uUsart.sendDone(error_t error){}
+ default event void Sam3uUsart.receive(error_t error, uint8_t data){}
+ default event void Sam3uUsart.startDone(error_t error){}
+ default event void Sam3uUsart.stopDone(error_t error){}
+
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usart/sam3uusarthardware.h b/tos/chips/cortex/m3/sam3/u/usart/sam3uusarthardware.h
new file mode 100644
index 00000000..00348930
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usart/sam3uusarthardware.h
@@ -0,0 +1,467 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * 12 bit ADC register definitions.
+ *
+ * @author JeongGil Ko
+ */
+
+#ifndef _SAM3UUSARTHARDWARE_H
+#define _SAM3UUSARTHARDWARE_H
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t reserved0     :  2; 
+    uint8_t rstrx         :  1; 
+    uint8_t rsttx         :  1;
+    uint8_t rxen          :  1;
+    uint8_t rxdis         :  1;
+    uint8_t txen          :  1;
+    uint8_t txdis         :  1;
+    uint8_t rststa        :  1; 
+    uint8_t sttbrk        :  1;
+    uint8_t stpbrk        :  1;
+    uint8_t sttto         :  1;
+    uint8_t senda         :  1;
+    uint8_t rstit         :  1;
+    uint8_t rstnack       :  1; 
+    uint8_t retto         :  1;
+    uint8_t reserved1     :  2; 
+    uint8_t rtsen_fcs     :  1;
+    uint8_t rtsdis_rcs    :  1;
+    uint8_t reserved2     :  4;
+    uint8_t reserved3     :  8;
+  } __attribute__((__packed__)) bits;
+} usart_cr_t;
+/*
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t usart_mode    :  4; 
+    uint8_t usclks        :  2;
+    uint8_t chrl          :  2; 
+    uint8_t sync_cpha     :  1;
+    uint8_t par           :  3; 
+    uint8_t nb_stop       :  2;
+    uint8_t chmode        :  2;
+    uint8_t msbf_cpol     :  1;
+    uint8_t mode9         :  1;
+    uint8_t clko          :  1;
+    uint8_t over          :  1;
+    uint8_t inack         :  1;
+    uint8_t dsnack        :  1;
+    uint8_t var_sync      :  1;
+    uint8_t invdata       :  1;
+    uint8_t max_iteration :  3;
+    uint8_t reserved0     :  1;
+    uint8_t filter        :  1;
+    uint8_t man           :  1;
+    uint8_t modsync       :  1;
+    uint8_t onebit        :  1;
+  } __attribute__((__packed__)) bits;
+} usart_mr_t;
+*/
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t usart_mode    :  4; 
+    uint8_t usclks        :  2;
+    uint8_t chrl          :  2; 
+    uint8_t sync_cpha     :  1;
+    uint8_t par           :  3; 
+    uint8_t nb_stop       :  2;
+    uint8_t chmode        :  2;
+    uint8_t msbf_cpol     :  1;
+    uint8_t mode9         :  1;
+    uint8_t clko          :  1;
+    uint8_t over          :  1;
+    uint8_t inack         :  1;
+    uint8_t dsnack        :  1;
+    uint8_t var_sync      :  1;
+    uint8_t invdata       :  1;
+    uint8_t max_iteration :  3;
+    uint8_t reserved0     :  1;
+    uint8_t filter        :  1;
+    uint8_t man           :  1;
+    uint8_t modsync       :  1;
+    uint8_t onebit        :  1;
+  } __attribute__((__packed__)) bits;
+} usart_mr_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t rxrdy         :  1;
+    uint8_t txrdy         :  1;
+    uint8_t rxbrk         :  1;
+    uint8_t endrx         :  1;
+    uint8_t endtx         :  1;
+    uint8_t ovre          :  1;
+    uint8_t frame         :  1;
+    uint8_t pare          :  1;
+    uint8_t timeout       :  1;
+    uint8_t txempty       :  1;
+    uint8_t iter_unre     :  1;
+    uint8_t txbufe        :  1;
+    uint8_t rxbuff        :  1;
+    uint8_t nack          :  1;
+    uint8_t reserved0     :  2;
+    uint8_t reserved1     :  3;
+    uint8_t ctsic         :  1;
+    uint8_t reserved2     :  4;
+    uint8_t mane          :  1;
+    uint8_t reserved3     :  7;
+  } __attribute__((__packed__)) bits;
+} usart_ier_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t rxrdy         :  1;
+    uint8_t txrdy         :  1;
+    uint8_t rxbrk         :  1;
+    uint8_t endrx         :  1;
+    uint8_t endtx         :  1;
+    uint8_t ovre          :  1;
+    uint8_t frame         :  1;
+    uint8_t pare          :  1;
+    uint8_t timeout       :  1;
+    uint8_t txempty       :  1;
+    uint8_t iter_unre     :  1;
+    uint8_t txbufe        :  1;
+    uint8_t rxbuff        :  1;
+    uint8_t nack          :  1;
+    uint8_t reserved0     :  2;
+    uint8_t reserved1     :  3;
+    uint8_t ctsic         :  1;
+    uint8_t reserved2     :  4;
+    uint8_t mane          :  1;
+    uint8_t reserved3     :  7;
+  } __attribute__((__packed__)) bits;
+} usart_idr_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t rxrdy         :  1;
+    uint8_t txrdy         :  1;
+    uint8_t rxbrk         :  1;
+    uint8_t endrx         :  1;
+    uint8_t endtx         :  1;
+    uint8_t ovre          :  1;
+    uint8_t frame         :  1;
+    uint8_t pare          :  1;
+    uint8_t timeout       :  1;
+    uint8_t txempty       :  1;
+    uint8_t iter_unre     :  1;
+    uint8_t txbufe        :  1;
+    uint8_t rxbuff        :  1;
+    uint8_t nack          :  1;
+    uint8_t reserved0     :  2;
+    uint8_t reserved1     :  3;
+    uint8_t ctsic         :  1;
+    uint8_t reserved2     :  4;
+    uint8_t mane          :  1;
+    uint8_t reserved3     :  7;
+  } __attribute__((__packed__)) bits;
+} usart_imr_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t rxrdy         :  1;
+    uint8_t txrdy         :  1;
+    uint8_t rxbrk         :  1;
+    uint8_t endrx         :  1;
+    uint8_t endtx         :  1;
+    uint8_t ovre          :  1;
+    uint8_t frame         :  1;
+    uint8_t pare          :  1;
+    uint8_t timeout       :  1;
+    uint8_t txempty       :  1;
+    uint8_t iter_unre     :  1;
+    uint8_t txbufe        :  1;
+    uint8_t rxbuff        :  1;
+    uint8_t nack          :  1;
+    uint8_t reserved0     :  2;
+    uint8_t reserved1     :  3;
+    uint8_t ctsic         :  1;
+    uint8_t reserved2     :  4;
+    uint8_t manerr        :  1;
+    uint8_t reserved3     :  7;
+  } __attribute__((__packed__)) bits;
+} usart_csr_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t rxchr        :  9;
+    uint16_t reserved0    :  6;
+    uint16_t rxsynh       :  1;
+    uint16_t reserved1    : 16;
+  } __attribute__((__packed__)) bits;
+} usart_rhr_t;
+
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t txchr        :  9;
+    uint16_t reserved0    :  6;
+    uint16_t txsynh       :  1;
+    uint16_t reserved1    : 16;
+  } __attribute__((__packed__)) bits;
+} usart_thr_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t cd           : 16;
+    uint8_t fp            :  1;
+    uint8_t reserved0     :  7;
+    uint8_t reserved1     :  8;
+  } __attribute__((__packed__)) bits;
+} usart_brgr_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t to           : 16;
+    uint16_t reserved0    : 16;
+  } __attribute__((__packed__)) bits;
+} usart_rtor_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t tg            :  8;
+    uint8_t reserved0     :  8;
+    uint16_t reserved1    : 16;
+  } __attribute__((__packed__)) bits;
+} usart_ttgr_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t fi_di_ratio  : 11;
+    uint16_t reserved0    :  5;
+    uint16_t reserved1    : 16;
+  } __attribute__((__packed__)) bits;
+} usart_fidi_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t nb_errors     :  8;
+    uint8_t reserved0     :  8;
+    uint16_t reserved1    : 16;
+  } __attribute__((__packed__)) bits;
+} usart_ner_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t irda_filter   :  8;
+    uint8_t reserved0     :  8;
+    uint16_t reserved1    : 16;
+  } __attribute__((__packed__)) bits;
+} usart_if_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t tx_pl         :  4;
+    uint8_t reserved0     :  4;
+    uint8_t tx_pp         :  2;
+    uint8_t reserved1     :  2;
+    uint8_t tx_mpol       :  1;
+    uint8_t reserved2     :  3;
+    uint8_t rx_pl         :  4;
+    uint8_t reserved3     :  4;
+    uint8_t rx_pp         :  2;
+    uint8_t reserved4     :  2;
+    uint8_t rx_mpol       :  1;
+    uint8_t allwaysone    :  1;
+    uint8_t drift         :  1;
+    uint8_t reserved5     :  1;
+  } __attribute__((__packed__)) bits;
+} usart_man_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t wpen         :  1;
+    uint32_t reserved0    :  7;
+    uint32_t wpkey        : 24;
+  } __attribute__((__packed__)) bits;
+} usart_wpmr_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint8_t wpvs          :  1;
+    uint8_t reserved0     :  7;
+    uint16_t wpvsrc       : 16;
+    uint8_t reserved1     :  8;
+  } __attribute__((__packed__)) bits;
+} usart_wpsr_t;
+
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint16_t version      : 12;
+    uint16_t reserved0    :  4;
+    uint16_t mfn          :  3;
+    uint16_t reserved1    : 13;
+  } __attribute__((__packed__)) bits;
+} usart_version_t;
+
+typedef struct usart {
+  volatile usart_cr_t cr;
+  volatile usart_mr_t mr;
+  volatile usart_ier_t ier;
+  volatile usart_idr_t idr;
+  volatile usart_imr_t imr;
+  volatile usart_csr_t csr;
+  volatile usart_rhr_t rhr;
+  volatile usart_thr_t thr;
+  volatile usart_brgr_t brgr;
+  volatile usart_rtor_t rtor;
+  volatile usart_ttgr_t ttgr;
+  uint32_t reserved0[5];
+  volatile usart_fidi_t fidi;
+  volatile usart_ner_t ner;
+  uint32_t reserved1;
+  volatile usart_if_t us_if;
+  volatile usart_man_t man;
+  volatile usart_wpmr_t wpmr;
+  volatile usart_wpsr_t wpsr;
+  uint32_t reserved2[40];
+  volatile usart_version_t version;
+} usart_t;
+
+volatile usart_t* USART0 = (volatile usart_t *) 0x40090000;
+volatile usart_t* USART1 = (volatile usart_t *) 0x40094000;
+volatile usart_t* USART2 = (volatile usart_t *) 0x40098000;
+volatile usart_t* USART3 = (volatile usart_t *) 0x4009C000;
+
+
+#define AT91C_US_USMODE       (0xF <<  0) // (USART) Usart mode
+#define         AT91C_US_USMODE_NORMAL               (0x0) // (USART) Normal
+#define         AT91C_US_USMODE_RS485                (0x1) // (USART) RS485
+#define         AT91C_US_USMODE_HWHSH                (0x2) // (USART) Hardware Handshaking
+#define         AT91C_US_USMODE_MODEM                (0x3) // (USART) Modem
+#define         AT91C_US_USMODE_ISO7816_0            (0x4) // (USART) ISO7816 protocol: T = 0
+#define         AT91C_US_USMODE_ISO7816_1            (0x6) // (USART) ISO7816 protocol: T = 1
+#define         AT91C_US_USMODE_IRDA                 (0x8) // (USART) IrDA
+#define         AT91C_US_USMODE_SWHSH                (0xC) // (USART) Software Handshaking
+#define AT91C_US_CLKS         (0x3 <<  4) // (USART) Clock Selection (Baud Rate generator Input Clock
+#define         AT91C_US_CLKS_CLOCK                (0x0 <<  4) // (USART) Clock
+#define         AT91C_US_CLKS_FDIV1                (0x1 <<  4) // (USART) fdiv1
+#define         AT91C_US_CLKS_SLOW                 (0x2 <<  4) // (USART) slow_clock (ARM)
+#define         AT91C_US_CLKS_EXT                  (0x3 <<  4) // (USART) External (SCK)
+#define AT91C_US_CHRL         (0x3 <<  6) // (USART) Clock Selection (Baud Rate generator Input Clock
+#define         AT91C_US_CHRL_5_BITS               (0x0 <<  6) // (USART) Character Length: 5 bits
+#define         AT91C_US_CHRL_6_BITS               (0x1 <<  6) // (USART) Character Length: 6 bits
+#define         AT91C_US_CHRL_7_BITS               (0x2 <<  6) // (USART) Character Length: 7 bits
+#define         AT91C_US_CHRL_8_BITS               (0x3 <<  6) // (USART) Character Length: 8 bits
+#define AT91C_US_SYNC         (0x1 <<  8) // (USART) Synchronous Mode Select
+#define AT91C_US_ASYNC         (0x0 <<  8) // (USART) Asynchronous Mode Select
+#define AT91C_US_PAR          (0x7 <<  9) // (USART) Parity type
+#define         AT91C_US_PAR_EVEN                 (0x0 <<  9) // (USART) Even Parity
+#define         AT91C_US_PAR_ODD                  (0x1 <<  9) // (USART) Odd Parity
+#define         AT91C_US_PAR_SPACE                (0x2 <<  9) // (USART) Parity forced to 0 (Space)
+#define         AT91C_US_PAR_MARK                 (0x3 <<  9) // (USART) Parity forced to 1 (Mark)
+#define         AT91C_US_PAR_NONE                 (0x4 <<  9) // (USART) No Parity
+#define         AT91C_US_PAR_MULTI_DROP           (0x6 <<  9) // (USART) Multi-drop mode
+#define AT91C_US_NBSTOP       (0x3 << 12) // (USART) Number of Stop bits
+#define         AT91C_US_NBSTOP_1_BIT                (0x0 << 12) // (USART) 1 stop bit
+#define         AT91C_US_NBSTOP_15_BIT               (0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
+#define         AT91C_US_NBSTOP_2_BIT                (0x2 << 12) // (USART) 2 stop bits
+#define AT91C_US_CHMODE       (0x3 << 14) // (USART) Channel Mode
+#define         AT91C_US_CHMODE_NORMAL               (0x0 << 14) // (USART) Normal Mode: The USART channel operates as an RX/TX USART.
+#define         AT91C_US_CHMODE_AUTO                 (0x1 << 14) // (USART) Automatic Echo: Receiver Data Input is connected to the TXD pin.
+#define         AT91C_US_CHMODE_LOCAL                (0x2 << 14) // (USART) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
+#define         AT91C_US_CHMODE_REMOTE               (0x3 << 14) // (USART) Remote Loopback: RXD pin is internally connected to TXD pin.
+#define AT91C_US_MSBF         (0x1 << 16) // (USART) Bit Order
+#define AT91C_US_MODE9        (0x1 << 17) // (USART) 9-bit Character length
+#define AT91C_US_CKLO         (0x1 << 18) // (USART) Clock Output Select
+#define AT91C_US_OVER         (0x1 << 19) // (USART) Over Sampling Mode
+#define AT91C_US_INACK        (0x1 << 20) // (USART) Inhibit Non Acknowledge
+#define AT91C_US_DSNACK       (0x1 << 21) // (USART) Disable Successive NACK
+#define AT91C_US_VAR_SYNC     (0x1 << 22) // (USART) Variable synchronization of command/data sync Start Frame Delimiter
+#define AT91C_US_MAX_ITER     (0x1 << 24) // (USART) Number of Repetitions
+#define AT91C_US_FILTER       (0x1 << 28) // (USART) Receive Line Filter
+#define AT91C_US_MANMODE      (0x1 << 29) // (USART) Manchester Encoder/Decoder Enable
+#define AT91C_US_MODSYNC      (0x1 << 30) // (USART) Manchester Synchronization mode
+#define AT91C_US_ONEBIT       (0x1 << 31) // (USART) Start Frame Delimiter selector
+
+#endif // _SAM3UUSARTHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbBufferedSerialP.nc b/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbBufferedSerialP.nc
new file mode 100644
index 00000000..46045672
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbBufferedSerialP.nc
@@ -0,0 +1,190 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * High Speed USB to Serial implementation
+ *
+ * @author Kevin Klues
+ */
+
+#include <sam3uudphshardware.h>
+
+module Sam3uUsbBufferedSerialP {
+  provides {
+    interface StdControl;
+    interface UartByte;
+    interface UartStream;
+  } 
+  uses {
+    interface StdControl as SubStdControl;
+    interface UartStream as SubUartStream;
+  }
+}
+implementation {
+  #define WBUF_SIZE 256 
+  #define RBUF_SIZE 256
+  typedef struct {
+    uint8_t buf[WBUF_SIZE];
+    uint8_t idx;
+    bool free;
+  } wbuf_t;
+
+  wbuf_t wbufs[2];
+  uint8_t cwbuf;
+  wbuf_t *pwbuf;
+  uint8_t rbuf[RBUF_SIZE];
+
+  command error_t StdControl.start() {
+    error_t e = call SubStdControl.start();
+    atomic {
+      cwbuf = 0;
+      pwbuf = NULL;
+      wbufs[0].idx = 0;
+      wbufs[1].idx = 0;
+      wbufs[1].free = TRUE;
+      wbufs[1].free = TRUE;
+    }
+    while(call SubUartStream.receive(rbuf, RBUF_SIZE) != SUCCESS);
+    return e;
+  }
+
+  command error_t StdControl.stop() {
+    return call SubStdControl.stop();
+  }
+
+  async command error_t UartByte.send( uint8_t byte ) {
+    return FAIL;
+  }
+
+  async command error_t UartByte.receive( uint8_t* byte, uint8_t timeout ) {
+    return FAIL;
+  }
+
+  // Take a look in HdlcTranslateC to understand the logic here
+  // on determining whether this is the last byte or not
+  bool lastByte(uint8_t byte) {
+    static bool seen_delimiter = FALSE;
+    static uint8_t esc_count = 0;
+
+    if(!seen_delimiter && (byte == HDLC_FLAG_BYTE))
+      seen_delimiter = TRUE;
+    else if(seen_delimiter 
+            && (byte == HDLC_FLAG_BYTE) 
+            && ((esc_count % 2) == 0)) {
+      seen_delimiter = FALSE;
+      esc_count = 0;
+      return TRUE;
+    }
+
+    if(byte == HDLC_CTLESC_BYTE)
+      esc_count++;
+    else 
+      esc_count = 0;
+
+    return FALSE;
+  }
+
+  task void sendTask() {
+    wbuf_t *pwbuf_temp;
+    atomic pwbuf_temp = pwbuf;
+    while(call SubUartStream.send(pwbuf_temp->buf, pwbuf_temp->idx) != SUCCESS);
+  }
+
+  task void byteBufferedTask() {
+    // I know HdlcTranslateC is not checking the value of buf, so just pass NULL 
+    signal UartStream.sendDone(NULL, 1, SUCCESS);
+  }
+
+  async command error_t UartStream.send( uint8_t* buf, uint16_t len ) {
+    // Assumes only called with one byte at a time!!
+    // This is the behaviour of the current serial stack...
+    atomic {
+      wbufs[cwbuf].buf[wbufs[cwbuf].idx++] = buf[0]; 
+      if(!lastByte(buf[0])) {
+        // Post a task to signal sendDone back to HdlcTranslateC
+        // Should be OK because of the way send() is always a tail call in this
+        // component, and these are async functions.
+        post byteBufferedTask();
+      }
+      else {
+        wbufs[cwbuf].free = FALSE;
+ 
+        if(!pwbuf) {
+          pwbuf = &(wbufs[cwbuf]);
+          cwbuf = !cwbuf;
+          post byteBufferedTask();
+          post sendTask();
+        }
+      }
+    }
+    return SUCCESS;
+  }
+
+  async event void SubUartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ) {
+    atomic {
+      pwbuf->idx = 0;
+      pwbuf->free = TRUE;
+
+      if(!wbufs[cwbuf].free) {
+        pwbuf = &(wbufs[cwbuf]);
+        cwbuf = !cwbuf;
+        post byteBufferedTask();
+        post sendTask();
+      }
+      else {
+        pwbuf = NULL;
+      }
+    }
+  }
+  
+  async command error_t UartStream.receive( uint8_t* buf, uint16_t len ) {
+    return call SubUartStream.receive(buf, len);
+  }
+
+  async event void SubUartStream.receiveDone( uint8_t *buf, uint16_t len, error_t error ) {
+    while(call SubUartStream.receive(rbuf, RBUF_SIZE) != SUCCESS);
+    signal UartStream.receiveDone(buf, len, error);
+  }
+
+  async event void SubUartStream.receivedByte( uint8_t byte ) {
+    signal UartStream.receivedByte(byte);
+  }
+
+  async command error_t UartStream.enableReceiveInterrupt() {
+    return call SubUartStream.enableReceiveInterrupt();
+  }
+
+  async command error_t UartStream.disableReceiveInterrupt() {
+    return call SubUartStream.disableReceiveInterrupt();
+  }
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbSerialC.nc b/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbSerialC.nc
new file mode 100644
index 00000000..76d1cbf6
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbSerialC.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * High Speed USB Device Port register definitions.
+ *
+ * @author Kevin Klues
+ */
+
+#include <sam3uudphshardware.h>
+#include <Serial.h>
+
+configuration Sam3uUsbSerialC {
+  provides {
+    interface StdControl;
+    interface UartStream;
+    interface UartByte;
+  }
+}
+implementation {
+  components MainC;
+  components HplNVICC;
+  components HplSam3uClockC;
+  components Sam3uUsbSerialP;
+  components Sam3uUsbBufferedSerialP;
+  components SerialP;
+
+  StdControl = Sam3uUsbBufferedSerialP;
+  UartStream = Sam3uUsbBufferedSerialP;
+  UartByte = Sam3uUsbBufferedSerialP; 
+
+  Sam3uUsbBufferedSerialP.SubStdControl -> Sam3uUsbSerialP;
+  Sam3uUsbBufferedSerialP.SubUartStream -> Sam3uUsbSerialP;
+
+  MainC.SoftwareInit -> Sam3uUsbSerialP;
+  Sam3uUsbSerialP.UDPHSInterrupt -> HplNVICC.MCI0Interrupt;
+  Sam3uUsbSerialP.UDPHSClockControl -> HplSam3uClockC.UDPHSPPCntl;
+
+  components McuSleepC;
+  Sam3uUsbSerialP.UdphsInterruptWrapper -> McuSleepC;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbSerialP.nc b/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbSerialP.nc
new file mode 100644
index 00000000..db5600e8
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/Sam3uUsbSerialP.nc
@@ -0,0 +1,219 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * High Speed USB to Serial implementation
+ *
+ * @author Kevin Klues
+ */
+
+#include <sam3uudphshardware.h>
+
+module Sam3uUsbSerialP {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface UartStream;
+  } 
+  uses {
+    interface HplNVICInterruptCntl as UDPHSInterrupt;
+    interface HplSam3uPeripheralClockCntl as UDPHSClockControl;
+    interface FunctionWrapper as UdphsInterruptWrapper;
+  }
+}
+implementation {
+  #include <board.h>
+  #include <board_lowlevel.c>
+  #include <peripherals/pio/pio_it.c>
+  #include <peripherals/irq/nvic.c>
+  #include <usb/common/cdc/CDCLineCoding.c>
+  #include <usb/common/cdc/CDCSetControlLineStateRequest.c>
+  #include <usb/common/core/USBInterfaceRequest.c>
+  #include <usb/common/core/USBGetDescriptorRequest.c>
+  #include <usb/common/core/USBSetAddressRequest.c>
+  #include <usb/common/core/USBFeatureRequest.c>
+  #include <usb/common/core/USBGenericRequest.c>
+  #include <usb/common/core/USBEndpointDescriptor.c>
+  #include <usb/common/core/USBSetConfigurationRequest.c>
+  #include <usb/common/core/USBGenericDescriptor.c>
+  #include <usb/common/core/USBConfigurationDescriptor.c>
+  #include <usb/device/core/USBDCallbacks_Reset.c>
+  #include <usb/device/core/USBDDriverCb_IfSettingChanged.c>
+  #include <usb/device/core/USBD_OTGHS.c>
+  #include <usb/device/core/USBDDriverCb_CfgChanged.c>
+  #include <usb/device/core/USBD_UDPHS.c>
+  #include <usb/device/core/USBDCallbacks_Initialized.c>
+  #include <usb/device/core/USBD_UDP.c>
+  #include <usb/device/core/USBDDriver.c>
+  #include <usb/device/cdc-serial/CDCDSerialDriver.c>
+  #include <usb/device/cdc-serial/CDCDSerialDriverDescriptors.c>
+
+  norace struct {
+    volatile bool rlock   : 1;
+    volatile bool wlock   : 1;
+  } flags;
+
+  norace uint8_t* rbuf;
+  norace uint8_t* wbuf;
+  norace uint16_t rlen;
+  norace uint16_t wlen;
+
+  //------------------------------------------------------------------------------
+  //         Callbacks re-implementation
+  //------------------------------------------------------------------------------
+  //------------------------------------------------------------------------------
+  /// Invoked when the USB device leaves the Suspended state. By default,
+  /// configures the LEDs.
+  //------------------------------------------------------------------------------
+  void USBDCallbacks_Resumed(void) @spontaneous()
+  {
+  }
+  
+  //------------------------------------------------------------------------------
+  /// Invoked when the USB device gets suspended. By default, turns off all LEDs.
+  //------------------------------------------------------------------------------
+  void USBDCallbacks_Suspended(void) @spontaneous()
+  {
+  }
+
+  //------------------------------------------------------------------------------
+  /// Callback invoked when data has been received on the USB.
+  //------------------------------------------------------------------------------
+  void UsbDataReceived(unsigned int unused,
+                       unsigned char status,
+                       unsigned int received,
+                       unsigned int remaining) @spontaneous()
+  {
+    int i;
+    error_t e = (status == USBD_STATUS_SUCCESS) ? SUCCESS : FAIL;
+    flags.rlock = 0;
+    for(i=0; i<received; i++)
+      signal UartStream.receivedByte(rbuf[i]);
+    signal UartStream.receiveDone(rbuf, received, e);
+  }
+  
+  //------------------------------------------------------------------------------
+  /// Callback invoked when data has been written on the USB.
+  //------------------------------------------------------------------------------
+  void UsbDataWritten(unsigned int unused,
+                      unsigned char status,
+                      unsigned int written,
+                      unsigned int remaining) @spontaneous()
+  {
+    error_t e = (status == USBD_STATUS_SUCCESS) ? SUCCESS : FAIL;
+    flags.wlock = 0;
+    signal UartStream.sendDone(wbuf, written, e);
+  }
+
+  command error_t Init.init() {
+    // Set the Interrupt Priority
+    call UDPHSInterrupt.configure(IRQ_PRIO_UDPHS);
+
+    flags.rlock = 0;
+    flags.wlock = 0;
+
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start() {
+    // Enable the UDPHS clock in the PMC
+    call UDPHSClockControl.enable();
+
+    // Enable the UPLL
+    PMC->uckr.bits.upllcount = 1; // Arbitrary for now...
+    PMC->uckr.bits.upllen = 1;
+    while(!PMC->sr.bits.locku);
+
+    // Enable udphs
+    UDPHS->ctrl.bits.en_udphs = 1;
+
+    // BOT driver initialization
+    CDCDSerialDriver_Initialize();
+    // Connect pull-up, wait for configuration
+    USBD_Connect();
+
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    // Disable the UDPHS clock in the PMC
+    call UDPHSClockControl.disable();
+
+    // Disable the UPLL
+    PMC->uckr.bits.upllen = 0;
+
+    // Disabel udphs
+    UDPHS->ctrl.bits.en_udphs = 0;
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.send( uint8_t* buf, uint16_t len ) {
+    int e;
+    if(flags.wlock)
+      return EBUSY;
+
+    flags.wlock = 1;
+    wbuf = buf;
+    wlen = len;
+    e = CDCDSerialDriver_Write(wbuf, wlen, (TransferCallback) UsbDataWritten, 0);
+    if (e != USBD_STATUS_SUCCESS) {
+      flags.wlock = 0;
+      return FAIL;
+    }
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.receive( uint8_t* buf, uint16_t len ) {
+    int e;
+    if(flags.rlock)
+      return EBUSY;
+
+    flags.rlock = 1;
+    rbuf = buf;
+    rlen = len;
+    e = CDCDSerialDriver_Read(rbuf, rlen, (TransferCallback) UsbDataReceived, 0);
+    if (e != USBD_STATUS_SUCCESS) {
+      flags.rlock = 0;
+      return FAIL;
+    }
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.enableReceiveInterrupt() {
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.disableReceiveInterrupt() {
+    return FAIL;
+  }
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/board/board.h b/tos/chips/cortex/m3/sam3/u/usb/board/board.h
new file mode 100644
index 00000000..c8a74537
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/board/board.h
@@ -0,0 +1,747 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \dir
+/// !Purpose
+///
+/// Definition and functions for using AT91SAM3UE-related features, such
+/// has PIO pins, memories, etc.
+///
+/// !Usage
+/// -# The code for booting the board is provided by board_cstartup.S and
+///    board_lowlevel.c.
+/// -# For using board PIOs, board characteristics (clock, etc.) and external
+///    components, see board.h.
+/// -# For manipulating memories (remapping, SDRAM, etc.), see board_memories.h.
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \unit
+/// !Purpose
+///
+/// Definition of AT91SAM3UE-EK characteristics, AT91SAM3UE-dependant PIOs and
+/// external components interfacing.
+///
+/// !Usage
+/// -# For operating frequency information, see "SAM3UE-EK - Operating frequencies".
+/// -# For using portable PIO definitions, see "SAM3UE-EK - PIO definitions".
+/// -# Several USB definitions are included here (see "SAM3UE-EK - USB device").
+//------------------------------------------------------------------------------
+
+#ifndef BOARD_H
+#define BOARD_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "chip.h"
+#include "AT91SAM3U4.h"
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "SAM3UE-EK - Board Description"
+/// This page lists several definition related to the board description.
+///
+/// !Definitions
+/// - BOARD_NAME
+
+/// Name of the board.
+#define BOARD_NAME "AT91SAM3U-EK"
+/// Board definition.
+#define at91sam3uek
+// Chip type
+//#define fpgasimulation
+//------------------------------------------------------------------------------
+
+#if defined(fpgasimulation)
+#define PMC_BY_HARD
+#endif
+
+//------------------------------------------------------------------------------
+/// \page "SAM3UE-EK - Operating frequencies"
+/// This page lists several definition related to the board operating frequency
+/// (when using the initialization done by board_lowlevel.c).
+///
+/// !Definitions
+/// - BOARD_MAINOSC
+/// - BOARD_MCK
+
+/// Frequency of the board main oscillator.
+#define BOARD_MAINOSC           12000000
+
+/// Master clock frequency (when using board_lowlevel.c).
+#if !defined(fpgasimulation)
+#define BOARD_MCK               48000000
+#else
+#define BOARD_MCK               22579200
+#endif
+
+#if defined (fpgasimulation)
+//#define BOARD_ConfigureSdram(...) { }
+#endif // fpgasimulation
+
+//------------------------------------------------------------------------------
+// ADC
+//------------------------------------------------------------------------------
+/// ADC clock frequency, at 10-bit resolution (in Hz)
+#define ADC_MAX_CK_10BIT         5000000
+/// Startup time max, return from Idle mode (in µs)
+#define ADC_STARTUP_TIME_MAX       15
+/// Track and hold Acquisition Time min (in ns)
+#define ADC_TRACK_HOLD_TIME_MIN  1200
+
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "SAM3UE-EK - USB device"
+/// This page lists constants describing several characteristics (controller
+/// type, D+ pull-up type, etc.) of the USB device controller of the chip/board.
+///
+/// !Constants
+/// - BOARD_USB_UDP
+/// - BOARD_USB_PULLUP_EXTERNAL
+/// - BOARD_USB_NUMENDPOINTS
+/// - BOARD_USB_ENDPOINTS_MAXPACKETSIZE
+/// - BOARD_USB_ENDPOINTS_BANKS
+
+/// Chip has a UDP controller.
+#define BOARD_USB_UDPHS
+
+/// Indicates the D+ pull-up is external.
+#define BOARD_USB_PULLUP_INTERNAL
+
+/// Number of endpoints in the USB controller.
+#define BOARD_USB_NUMENDPOINTS              7
+
+/// Returns the maximum packet size of the given endpoint.
+#define BOARD_USB_ENDPOINTS_MAXPACKETSIZE(i) (((i == 0)||(i == 3)||(i == 4)) ? 64 :\
+                                             (((i == 1)||(i == 2)) ? 512 : 1024))
+
+/// Returns the number of FIFO banks for the given endpoint.
+#define BOARD_USB_ENDPOINTS_BANKS(i)        ((i == 0) ? 1 : ((i == 1) || (i == 2)) ? 2 : 3)
+
+/// USB attributes configuration descriptor (bus or self powered, remote wakeup)
+#define BOARD_USB_BMATTRIBUTES              USBConfigurationDescriptor_SELFPOWERED_RWAKEUP
+//#define BOARD_USB_BMATTRIBUTES            USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "SAM3UE-EK - PIO definitions"
+/// This pages lists all the pio definitions contained in board.h. The constants
+/// are named using the following convention: PIN_* for a constant which defines
+/// a single Pin instance (but may include several PIOs sharing the same
+/// controller), and PINS_* for a list of Pin instances.
+///
+/// !ADC
+/// - PIN_ADC0_AD0
+/// - PIN_ADC0_AD1
+/// - PIN_ADC0_AD2
+/// - PIN_ADC0_AD3
+/// - PIN_ADC0_AD4
+/// - PIN_ADC0_AD5
+/// - PIN_ADC0_AD6
+/// - PIN_ADC0_AD7
+/// - PINS_ADC0
+///
+/// !CAN
+/// - PIN_CAN_TRANSCEIVER_RS
+/// - PIN_CAN1_TRANSCEIVER_TXD
+/// - PIN_CAN1_TRANSCEIVER_RXD
+/// - PIN_CAN2_TRANSCEIVER_TXD
+/// - PIN_CAN2_TRANSCEIVER_RXD
+/// - PINS_CAN_TRANSCEIVER_TXD
+/// - PINS_CAN_TRANSCEIVER_RXD
+///
+/// !DBGU
+/// - PINS_DBGU
+///
+/// !Joystick buttons
+/// - PIN_JOYSTICK_UP
+/// - PIN_JOYSTICK_DOWN
+/// - PIN_JOYSTICK_LEFT
+/// - PIN_JOYSTICK_RIGHT
+/// - PIN_JOYSTICK_LCLIC, PIN_JOYSTICK_PUSH
+/// - PINS_JOYSTICK_MOVE, PINS_JOYSTICK_CLIC, PINS_JOYSTICK
+/// - JOYSTICK_UP
+/// - JOYSTICK_DOWN
+/// - JOYSTICK_LEFT
+/// - JOYSTICK_RIGHT
+/// - JOYSTICK_LCLIC, JOYSTICK_PUSH
+///
+/// !EBI
+/// - PIN_EBI_DATA_BUS
+/// - PIN_EBI_NCS0
+/// - PIN_EBI_NRD
+/// - PIN_EBI_NWE
+/// - PIN_EBI_ADDR_BUS
+/// - PIN_EBI_PSRAM_NBS
+/// - PIN_EBI_A1
+/// - PIN_EBI_LCD_RS
+///
+/// !LEDs
+/// - PIN_LED_DS1
+/// - PIN_LED_DS2
+/// - PIN_LED_DS3
+/// - PIN_LED_DS4
+/// - PINS_LEDS
+/// - LED_DS1
+/// - LED_DS2
+/// - LED_DS3
+/// - LED_DS4
+///
+/// !MCI
+/// - PINS_MCI
+///
+/// !Push buttons
+/// - PIN_PUSHBUTTON_1
+/// - PIN_PUSHBUTTON_2
+/// - PIN_PUSHBUTTON_3
+/// - PIN_PUSHBUTTON_4
+/// - PINS_PUSHBUTTONS
+/// - PUSHBUTTON_BP1
+/// - PUSHBUTTON_BP2
+/// - PUSHBUTTON_BP3
+/// - PUSHBUTTON_BP4
+///
+/// !PWMC
+/// - PIN_PWMC_PWMH0
+/// - PIN_PWMC_PWML0
+/// - PIN_PWMC_PWMH1
+/// - PIN_PWMC_PWML1
+/// - PIN_PWMC_PWMH2
+/// - PIN_PWMC_PWML2
+/// - PIN_PWM_LED0
+/// - PIN_PWM_LED1
+/// - PIN_PWM_LED2
+/// - CHANNEL_PWM_LED0
+/// - CHANNEL_PWM_LED1
+/// - CHANNEL_PWM_LED2
+///
+/// !SPI0
+/// - PIN_SPI0_MISO
+/// - PIN_SPI0_MOSI
+/// - PIN_SPI0_SPCK
+/// - PINS_SPI0
+/// - PIN_SPI0_NPCS3
+///
+/// !SPI1
+/// - PIN_SPI1_MISO
+/// - PIN_SPI1_MOSI
+/// - PIN_SPI1_SPCK
+/// - PINS_SPI1
+/// - PIN_SPI1_NPCS3
+///
+/// ! SSC
+/// - PIN_SSC_TD
+/// - PIN_SSC_TK
+/// - PIN_SSC_TF
+/// - PINS_SSC_CODEC
+///
+/// ! PCK0
+/// - PIN_PCK0
+///
+/// !TWI
+/// - PIN_TWI_TWD0
+/// - PIN_TWI_TWCK0
+/// - PINS_TWI
+///
+/// !USART0
+/// - PIN_USART0_RXD
+/// - PIN_USART0_TXD
+/// - PIN_USART0_CTS
+/// - PIN_USART0_RTS
+/// - PIN_USART0_SCK
+///
+/// !USB
+/// - PIN_USB_PULLUP
+///
+
+/// ADC_AD0 pin definition.
+#define PIN_ADC0_AD0 {1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT}
+/// ADC_AD1 pin definition.
+#define PIN_ADC0_AD1 {1 << 30, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT}
+/// ADC_AD2 pin definition.
+#define PIN_ADC0_AD2 {1 << 3, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_DEFAULT}
+/// ADC_AD3 pin definition.
+#define PIN_ADC0_AD3 {1 << 4, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_DEFAULT}
+/// ADC_AD4 pin definition.
+#define PIN_ADC0_AD4 {1 << 15, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
+/// ADC_AD5 pin definition.
+#define PIN_ADC0_AD5 {1 << 16, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
+/// ADC_AD6 pin definition.
+#define PIN_ADC0_AD6 {1 << 17, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
+/// ADC_AD7 pin definition.
+#define PIN_ADC0_AD7 {1 << 18, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_INPUT, PIO_DEFAULT}
+
+/// Pins ADC
+#define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7
+
+/// CAN Definition
+/// RS: Select input for high speed mode or silent mode
+//#define PIN_CAN_TRANSCEIVER_RS  {1<<23, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
+//
+///// TXD: Transmit data input
+//#define PIN_CAN1_TRANSCEIVER_TXD  {1<<27, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+///// RXD: Receive data output
+//#define PIN_CAN1_TRANSCEIVER_RXD  {1<<26, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+/// TXD: Transmit data input
+//#define PIN_CAN2_TRANSCEIVER_TXD  {1<<29, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+///// RXD: Receive data output
+//#define PIN_CAN2_TRANSCEIVER_RXD  {1<<28, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+///// TXD pins
+//#define PINS_CAN_TRANSCEIVER_TXD  PIN_CAN1_TRANSCEIVER_TXD, PIN_CAN2_TRANSCEIVER_TXD
+///// RXD pins
+//#define PINS_CAN_TRANSCEIVER_RXD  PIN_CAN1_TRANSCEIVER_RXD, PIN_CAN2_TRANSCEIVER_RXD
+
+/// DBGU pins (DTXD and DRXD) definitions, PA11,12.
+#define PINS_DBGU  {0x00001800, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+
+/// EBI
+#define PIN_EBI_DATA_BUS            {0xfe01fe00, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}, \
+                                        {1 << 6, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}
+#define PIN_EBI_NCS0                {1 << 20, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
+#define PIN_EBI_NRD                 {1 << 19, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
+#define PIN_EBI_NWE                 {1 << 23, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
+#define PIN_EBI_PSRAM_ADDR_BUS      {0x3f00fff, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
+#define PIN_EBI_PSRAM_NBS           {1 << 7, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}, \
+                                        {1 << 15, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
+#define PIN_EBI_A1                  {1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}
+
+#define PIN_EBI_NCS2                {1 << 16, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
+#define PIN_EBI_LCD_RS              {1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}
+
+
+/// LED #0 pin definition.
+#define PIN_LED_0   {1 << 0, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT}
+/// LED #1 pin definition.
+#define PIN_LED_1   {1 << 1, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_1, PIO_DEFAULT}
+/// LED #2 pin definition.
+#define PIN_LED_2   {1 << 2, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_1, PIO_DEFAULT}
+/// List of all LEDs definitions.
+#define PINS_LEDS   PIN_LED_0, PIN_LED_1, PIN_LED_2
+
+///// MCI pins definition.
+#define PINS_MCI  {0x1f8, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}, \
+                      {1 << 3, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+/// MCI pin DAT0 (busy)
+#define PIN_MCI_DAT0 \
+    {AT91C_PIO_PA5, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}
+/// MCI pin Card Detect
+#define PIN_MCI_CD \
+    {AT91C_PIO_PA25, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
+
+/// Push button #0 definition.
+#define PIN_PUSHBUTTON_1    {1 << 18, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEGLITCH | PIO_PULLUP}
+/// Push button #1 definition.
+#define PIN_PUSHBUTTON_2    {1 << 19, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEGLITCH | PIO_PULLUP}
+/// Push button #2 definition
+/// List of all push button definitions.
+#define PINS_PUSHBUTTONS    PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2
+
+/// Push button #1 index.
+#define PUSHBUTTON_BP1   0
+/// Push button #2 index.
+#define PUSHBUTTON_BP2   1
+
+/// Simulated joystick LEFT index.
+#define JOYSTICK_LEFT       0
+/// Simulated joystick RIGHT index.
+#define JOYSTICK_RIGHT      1
+
+/// PWMC PWM0 pin definition.
+#define PIN_PWMC_PWMH0  {1 << 0, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_PWMC_PWML0  {1 << 7, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
+/// PWMC PWM1 pin definition.
+#define PIN_PWMC_PWMH1  {1 << 1, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_PWMC_PWML1  {1 << 8, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
+/// PWMC PWM2 pin definition.
+#define PIN_PWMC_PWMH2  {1 << 2, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_PWMC_PWML2  {1 << 9, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
+/// PWM pin definition for LED0
+#define PIN_PWM_LED0 PIN_PWMC_PWMH0
+/// PWM pin definition for LED1
+#define PIN_PWM_LED1 PIN_PWMC_PWMH1
+/// PWM pin definition for LED2
+#define PIN_PWM_LED2 PIN_PWMC_PWMH2
+/// PWM channel for LED0
+#define CHANNEL_PWM_LED0 0
+/// PWM channel for LED1
+#define CHANNEL_PWM_LED1 1
+/// PWM channel for LED2
+#define CHANNEL_PWM_LED2 2
+
+/// SPI0 MISO pin definition.
+#define PIN_SPI0_MISO  {1 << 13, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+/// SPI0 MOSI pin definition.
+#define PIN_SPI0_MOSI  {1 << 14, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+/// SPI0 SPCK pin definition.
+#define PIN_SPI0_SPCK  {1 << 15, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+/// SPI0 chip select 2 pin definition.
+//#define PIN_SPI0_NPCS2_PC14  {1 <<  14, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
+#define PIN_SPI0_NPCS2_PC14  {1 <<  14, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_OUTPUT_0, PIO_PULLUP}
+/// List of SPI0 pin definitions (MISO, MOSI & SPCK).
+#define PINS_SPI0      PIN_SPI0_MISO, PIN_SPI0_MOSI, PIN_SPI0_SPCK
+
+/// SSC pins definition.
+#define PIN_SSC_TD      {0x1 << 26, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_SSC_TK      {0x1 << 28, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_SSC_TF      {0x1 << 30, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+#define PINS_SSC_CODEC       PIN_SSC_TD,  PIN_SSC_TK, PIN_SSC_TF
+
+/// PCK0
+#define PIN_PCK0        {0x1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
+
+/// TWI pins definition.
+#define TWI_V3XX
+#define PIN_TWI_TWD0    {0x1 << 9, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_TWI_TWCK0    {0x1 << 10, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+#define PINS_TWI0     PIN_TWI_TWD0, PIN_TWI_TWCK0
+#define PIN_TWI_TWD1    {0x1 << 24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_TWI_TWCK1    {0x1 << 25, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+#define PINS_TWI1     PIN_TWI_TWD1, PIN_TWI_TWCK1
+
+/// USART0
+#define PIN_USART0_RXD    {0x1 << 19, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_USART0_TXD    {0x1 << 18, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_USART0_CTS    {0x1 << 8, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_USART0_RTS    {0x1 << 7, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_USART0_SCK    {0x1 << 17, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+
+/// USART1
+#define PIN_USART1_RXD    {0x1 << 21, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_USART1_TXD    {0x1 << 20, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
+#define PIN_USART1_CTS    {0x1 << 23, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
+#define PIN_USART1_RTS    {0x1 << 22, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
+#define PIN_USART1_SCK    {0x1 << 24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
+
+/// USB VBus monitoring pin definition.
+#define PIN_USB_VBUS    {1 << 0, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT}
+
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "SAM3UE-EK - External components"
+/// This page lists the definitions related to external on-board components
+/// located in the board.h file for the AT91SAM3UE-EK.
+///
+/// !AT45 Dataflash Card
+/// - BOARD_AT45_A_SPI_BASE
+/// - BOARD_AT45_A_SPI_ID
+/// - BOARD_AT45_A_SPI_PINS
+/// - BOARD_AT45_A_SPI
+/// - BOARD_AT45_A_NPCS
+/// - BOARD_AT45_A_NPCS_PIN
+///
+/// !AT45 Dataflash (serial onboard DataFlash)
+/// - BOARD_AT45_B_SPI_BASE
+/// - BOARD_AT45_B_SPI_ID
+/// - BOARD_AT45_B_SPI_PINS
+/// - BOARD_AT45_B_SPI
+/// - BOARD_AT45_B_NPCS
+/// - BOARD_AT45_B_NPCS_PIN
+///
+/// !AT26 Serial Flash
+/// - BOARD_AT26_A_SPI_BASE
+/// - BOARD_AT26_A_SPI_ID
+/// - BOARD_AT26_A_SPI_PINS
+/// - BOARD_AT26_A_SPI
+/// - BOARD_AT26_A_NPCS
+/// - BOARD_AT26_A_NPCS_PIN
+///
+/// !SD Card
+/// - BOARD_SD_MCI_BASE
+/// - BOARD_SD_MCI_ID
+/// - BOARD_SD_PINS
+/// - BOARD_SD_SLOT
+///
+/// !PSRAM
+/// - BOARD_EBI_PSRAM
+/// - BOARD_PSRAM_PINS
+/// - BOARD_LCD_PINS
+
+/// Base address of SPI peripheral connected to the dataflash.
+//#define BOARD_AT45_A_SPI_BASE         AT91C_BASE_SPI0
+///// Identifier of SPI peripheral connected to the dataflash.
+//#define BOARD_AT45_A_SPI_ID           AT91C_ID_SPI0
+///// Pins of the SPI peripheral connected to the dataflash.
+//#define BOARD_AT45_A_SPI_PINS         PINS_SPI0
+///// Dataflahs SPI number.
+//#define BOARD_AT45_A_SPI              0
+///// Chip select connected to the dataflash.
+//#define BOARD_AT45_A_NPCS             3
+///// Chip select pin connected to the dataflash.
+//#define BOARD_AT45_A_NPCS_PIN         PIN_SPI0_NPCS3
+
+/// Base address of SPI peripheral connected to the dataflash.
+//#define BOARD_AT45_B_SPI_BASE         AT91C_BASE_SPI1
+///// Identifier of SPI peripheral connected to the dataflash.
+//#define BOARD_AT45_B_SPI_ID           AT91C_ID_SPI1
+///// Pins of the SPI peripheral connected to the dataflash.
+//#define BOARD_AT45_B_SPI_PINS         PINS_SPI1
+///// Dataflahs SPI number.
+//#define BOARD_AT45_B_SPI              1
+///// Chip select connected to the dataflash.
+//#define BOARD_AT45_B_NPCS             3
+///// Chip select pin connected to the dataflash.
+//#define BOARD_AT45_B_NPCS_PIN         PIN_SPI1_NPCS3
+
+/// Base address of SPI peripheral connected to the serialflash.
+//#define BOARD_AT26_A_SPI_BASE         AT91C_BASE_SPI0
+///// Identifier of SPI peripheral connected to the serialflash.
+//#define BOARD_AT26_A_SPI_ID           AT91C_ID_SPI0
+///// Pins of the SPI peripheral connected to the serialflash.
+//#define BOARD_AT26_A_SPI_PINS         PINS_SPI0
+///// Serialflash SPI number.
+//#define BOARD_AT26_A_SPI              0
+///// Chip select connected to the serialflash.
+//#define BOARD_AT26_A_NPCS             3
+///// Chip select pin connected to the serialflash.
+//#define BOARD_AT26_A_NPCS_PIN         PIN_SPI0_NPCS3
+
+/// Base address of the MCI peripheral connected to the SD card.
+#define BOARD_SD_MCI_BASE           AT91C_BASE_MCI0//AT91C_BASE_MCI
+///// Peripheral identifier of the MCI connected to the SD card.
+#define BOARD_SD_MCI_ID             AT91C_ID_MCI0 //AT91C_ID_MCI
+///// MCI pins that shall be configured to access the SD card.
+#define BOARD_SD_PINS               PINS_MCI
+#define BOARD_SD_DAT0               PIN_MCI_DAT0
+///// MCI slot to which the SD card is connected to.
+#define BOARD_SD_SLOT               MCI_SD_SLOTA
+///// MCI Card Detect pin.
+#define BOARD_SD_PIN_CD             PIN_MCI_CD
+
+#define BOARD_EBI_PSRAM             0x60000000
+#define BOARD_PSRAM_PINS            PIN_EBI_DATA_BUS, PIN_EBI_NCS0, PIN_EBI_NRD, PIN_EBI_NWE, \
+                                        PIN_EBI_PSRAM_ADDR_BUS, PIN_EBI_PSRAM_NBS, PIN_EBI_A1
+
+/// Indicates board has an HX8347 external component to manage LCD.
+#define BOARD_LCD_HX8347
+
+/// LCD pins definition.
+#define BOARD_LCD_PINS              PIN_EBI_DATA_BUS, PIN_EBI_LCD_RS, PIN_EBI_NRD, PIN_EBI_NWE, \
+                                        PIN_EBI_NCS2
+/// Backlight pin definition.
+#define BOARD_BACKLIGHT_PIN       {1 << 19, AT91C_BASE_PIOC, AT91C_ID_PIOC, \
+                                      PIO_OUTPUT_0, PIO_DEFAULT}
+/// Define HX8347 base address.
+#define BOARD_LCD_BASE            0x62000000
+/// Define HX8347 register select signal.
+#define BOARD_LCD_RS              (1 << 1)
+/// Display width in pixels.
+#define BOARD_LCD_WIDTH             240
+/// Display height in pixels.
+#define BOARD_LCD_HEIGHT            320
+
+/// Indicates board has an ADS7843 external component to manage Touch Screen
+#define BOARD_TSC_ADS7843
+
+/// Touchscreen controller IRQ pin definition.
+#define PIN_TCS_IRQ {AT91C_PIO_PA24, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
+/// Touchscreen controller Busy pin definition.
+#define PIN_TCS_BUSY {AT91C_PIO_PA2, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_PULLUP}
+
+/// Base address of SPI peripheral connected to the touchscreen controller.
+#define BOARD_TSC_SPI_BASE         AT91C_BASE_SPI0
+/// Identifier of SPI peripheral connected to the touchscreen controller.
+#define BOARD_TSC_SPI_ID           AT91C_ID_SPI0
+/// Pins of the SPI peripheral connected to the touchscreen controller.
+#define BOARD_TSC_SPI_PINS         PINS_SPI0
+/// Chip select connected to the touchscreen controller.
+#define BOARD_TSC_NPCS             2//2
+/// Chip select pin connected to the touchscreen controller.
+#define BOARD_TSC_NPCS_PIN         PIN_SPI0_NPCS2_PC14
+
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "SAM3UE-EK - Memories"
+/// This page lists definitions related to internal & external on-board memories.
+///
+/// !Embedded Flash
+/// - BOARD_FLASH_EFC
+
+/// Internal SRAM address
+#define AT91C_ISRAM                   AT91C_IRAM
+#define AT91C_ISRAM_SIZE         AT91C_IRAM_SIZE
+
+#define AT91C_IFLASH                   (0x80000)
+#define AT91C_IFLASH_SIZE              (0x20000)
+#define AT91C_IFLASH_PAGE_SIZE             (256) // Internal FLASH 0 Page Size: 256 bytes
+#define AT91C_IFLASH_NB_OF_PAGES           (512) // Internal FLASH 0 Number of Pages: 512
+#define AT91C_IFLASH_LOCK_REGION_SIZE     (8192) // Internal FLASH 0 Lock Region Size: 8 Kbytes
+#define AT91C_IFLASH_NB_OF_LOCK_BITS        (16) // Internal FLASH 0 Number of Lock Bits: 32
+#if 0
+#define AT91C_IFLASH1                 (0x100000)
+#define AT91C_IFLASH1_SIZE             (0x20000)
+#define AT91C_IFLASH1_PAGE_SIZE            (256) // Internal FLASH 1 Page Size: 256 bytes
+#define AT91C_IFLASH1_NB_OF_PAGES          (512) // Internal FLASH 1 Number of Pages: 512
+#define AT91C_IFLASH1_LOCK_REGION_SIZE   (8192) // Internal FLASH 1 Lock Region Size: 8 Kbytes
+#define AT91C_IFLASH1_NB_OF_LOCK_BITS       (16) // Internal FLASH 1 Number of Lock Bits: 32
+#endif
+/// Indicates chip has an EFC.
+#define AT91C_BASE_EFC    AT91C_BASE_EFC0
+
+#define AT91C_EBI_PSRAM                 (0x60000000)
+#define BOARD_PSRAM_SIZE                (0x100000)  // PSRAM size 1MBytes
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+/// \page "SAM3UE-EK - External components"
+/// This page lists the definitions related to external on-board components
+/// located in the board.h file for the SAM3UE-EK.
+///
+/// !ISO7816
+/// - PIN_SMARTCARD_CONNECT
+/// - PIN_ISO7816_RSTMC
+/// - PINS_ISO7816
+///
+/// !DMA
+///
+/// - BOARD_MCI_DMA_CHANNEL
+/// - BOARD_SSC_DMA_CHANNEL
+///
+/// - DMA_HW_SRC_REQ_ID_MCI0
+/// - DMA_HW_DEST_REQ_ID_MCI0
+/// - DMA_HW_SRC_REQ_ID_MCI1
+/// - DMA_HW_DEST_REQ_ID_MCI1
+///
+/// - BOARD_SD_DMA_HW_SRC_REQ_ID
+/// - BOARD_SD_DMA_HW_DEST_REQ_ID
+/// - BOARD_SSC_DMA_HW_SRC_REQ_ID
+/// - BOARD_SSC_DMA_HW_DEST_REQ_ID
+/// Smartcard detection pin
+#define PIN_SMARTCARD_CONNECT   {1 << 5, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_INPUT, PIO_DEFAULT}
+/// PIN used for reset the smartcard
+#define PIN_ISO7816_RSTMC       {1 << 7, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
+/// Pins used for connect the smartcard
+#define PINS_ISO7816            PIN_USART0_TXD, PIN_USART0_SCK, PIN_ISO7816_RSTMC
+
+
+/// Dma channel number
+#define BOARD_MCI_DMA_CHANNEL                         0
+#define BOARD_SSC_DMA_CHANNEL                         2
+
+/// MCI0 DMA hardware handshaking ID
+#define DMA_HW_SRC_REQ_ID_MCI0      AT91C_HDMA_SRC_PER_0
+#define DMA_HW_DEST_REQ_ID_MCI0     AT91C_HDMA_DST_PER_0
+/// MCI1 DMA hardware handshaking ID
+#define DMA_HW_SRC_REQ_ID_MCI1      AT91C_HDMA_SRC_PER_13
+#define DMA_HW_DEST_REQ_ID_MCI1     AT91C_HDMA_DST_PER_13
+
+/// SD DMA hardware handshaking ID
+#define BOARD_SD_DMA_HW_SRC_REQ_ID      DMA_HW_SRC_REQ_ID_MCI0
+#define BOARD_SD_DMA_HW_DEST_REQ_ID     DMA_HW_DEST_REQ_ID_MCI0
+/// SSC DMA hardware handshaking ID
+#define BOARD_SSC_DMA_HW_SRC_REQ_ID      AT91C_HDMA_SRC_PER_3
+#define BOARD_SSC_DMA_HW_DEST_REQ_ID     AT91C_HDMA_DST_PER_3
+
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "SAM3UE-EK - Individual chip definition"
+/// This page lists the definitions related to different chip's definition
+/// located in the board.h file for the SAM3UE-EK.
+
+/// DBGU
+#define BOARD_DBGU_ID               AT91C_ID_DBGU
+
+/// Rtc
+#define BOARD_RTC_ID                AT91C_ID_RTC
+
+/// Twi eeprom
+#define BOARD_ID_TWI_EEPROM         AT91C_ID_TWI1
+#define BOARD_BASE_TWI_EEPROM       AT91C_BASE_TWI1
+#define BOARD_PINS_TWI_EEPROM       PINS_TWI1
+
+/// USART
+#define BOARD_PIN_USART_RXD        PIN_USART1_RXD
+#define BOARD_PIN_USART_TXD        PIN_USART1_TXD
+#define BOARD_PIN_USART_CTS        PIN_USART1_CTS
+#define BOARD_PIN_USART_RTS        PIN_USART1_RTS
+#define BOARD_USART_BASE           AT91C_BASE_US1
+#define BOARD_ID_USART             AT91C_ID_US1
+
+/// Dummy define SDRAM bus width 
+#define BOARD_SDRAM_BUSWIDTH    32
+
+//------------------------------------------------------------------------------
+
+
+#define PIN_EBI_NANDOE          {1 << 17, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
+#define PIN_EBI_NANDWE          {1 << 18, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
+#define PIN_EBI_NANDCLE         {1 << 22, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
+#define PIN_EBI_NANDALE         {1 << 21, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
+
+#if defined(CHIP_NAND_CTRL)
+/// Nandflash chip enable pin definition.
+#define BOARD_NF_CE_PIN         {1 << 12, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
+/// Nandflash ready/busy pin definition.
+#define BOARD_NF_RB_PIN         {1 << 24, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
+
+/// Nandflash controller peripheral pins definition.
+#define PINS_NANDFLASH          BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, PIN_EBI_NANDWE,\
+                                PIN_EBI_NANDCLE, PIN_EBI_NANDALE, PIN_EBI_DATA_BUS
+                                
+/// Address for transferring command bytes to the nandflash.
+#define BOARD_NF_COMMAND_ADDR   0x60000000
+/// Address for transferring address bytes to the nandflash.
+#define BOARD_NF_ADDRESS_ADDR   0x61200000
+/// Address for transferring data bytes to the nandflash.
+#define BOARD_NF_DATA_ADDR      0x61000000
+
+#else
+/// Nandflash controller peripheral pins definition.
+#define PINS_NANDFLASH          PIN_EBI_DATA_BUS, BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, PIN_EBI_NANDWE,\
+                                PIN_EBI_NANDCLE, PIN_EBI_NANDALE
+/// Nandflash chip enable pin definition.
+#define BOARD_NF_CE_PIN         {1 << 12, AT91C_BASE_PIOC, AT91C_ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
+/// Nandflash ready/busy pin definition.
+#define BOARD_NF_RB_PIN         {1 << 24, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_INPUT, PIO_PULLUP}
+/// Address for transferring command bytes to the nandflash.
+#define BOARD_NF_COMMAND_ADDR   0x61400000
+/// Address for transferring address bytes to the nandflash.
+#define BOARD_NF_ADDRESS_ADDR   0x61200000
+/// Address for transferring data bytes to the nandflash.
+#define BOARD_NF_DATA_ADDR      0x61000000
+
+#endif
+
+#endif //#ifndef BOARD_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/board/board_lowlevel.c b/tos/chips/cortex/m3/sam3/u/usb/board/board_lowlevel.c
new file mode 100644
index 00000000..b8568475
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/board/board_lowlevel.c
@@ -0,0 +1,207 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !Purpose
+///
+/// Provides the low-level initialization function that gets called on chip
+/// startup.
+///
+/// !Usage
+///
+/// LowLevelInit() is called in #board_cstartup_xxx.c#.
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <board.h>
+//#include "board_memories.h"
+#include <board_lowlevel.h>
+#include <pio/pio.h>
+
+//------------------------------------------------------------------------------
+//         Local definitions
+//------------------------------------------------------------------------------
+// Settings at 48/48MHz
+#define AT91C_CKGR_MUL_SHIFT         16
+#define AT91C_CKGR_OUT_SHIFT         14
+#define AT91C_CKGR_PLLCOUNT_SHIFT     8
+#define AT91C_CKGR_DIV_SHIFT          0
+
+#define BOARD_OSCOUNT         (AT91C_CKGR_MOSCXTST & (0x3F << 8))
+#define BOARD_PLLR ((1 << 29) | (0x7 << AT91C_CKGR_MUL_SHIFT) \
+        | (0x0 << AT91C_CKGR_OUT_SHIFT) |(0x3f << AT91C_CKGR_PLLCOUNT_SHIFT) \
+        | (0x1 << AT91C_CKGR_DIV_SHIFT))
+#define BOARD_MCKR ( AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_PLLA_CLK)
+
+// Define clock timeout
+#define CLOCK_TIMEOUT           0xFFFFFFFF
+
+//------------------------------------------------------------------------------
+//         Local variables
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Local functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// After POR, at91sam3u device is running on 4MHz internal RC
+/// At the end of the LowLevelInit procedure MCK = 48MHz PLLA = 96 CPU=48MHz
+/// Performs the low-level initialization of the chip. This includes EFC, master
+/// clock, IRQ & watchdog configuration.
+//------------------------------------------------------------------------------
+void LowLevelInit(void)
+{
+    unsigned int timeout = 0;
+
+    /* Set 2 WS for Embedded Flash Access
+     ************************************/
+    AT91C_BASE_EFC0->EFC_FMR = AT91C_EFC_FWS_2WS;
+    AT91C_BASE_EFC1->EFC_FMR = AT91C_EFC_FWS_2WS;
+
+    /* Watchdog initialization
+     *************************/
+    AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
+
+    /* Select external slow clock
+     ****************************/
+    if ((AT91C_BASE_SUPC->SUPC_SR & AT91C_SUPC_SR_OSCSEL_CRYST) != AT91C_SUPC_SR_OSCSEL_CRYST) {
+        AT91C_BASE_SUPC->SUPC_CR = AT91C_SUPC_CR_XTALSEL_CRYSTAL_SEL | (0xA5 << 24);
+        timeout = 0;
+        while (!(AT91C_BASE_SUPC->SUPC_SR & AT91C_SUPC_SR_OSCSEL_CRYST) && (timeout++ < CLOCK_TIMEOUT));
+    }
+
+    /* Initialize main oscillator
+     ****************************/
+    if(!(AT91C_BASE_PMC->PMC_MOR & AT91C_CKGR_MOSCSEL))
+    {
+
+        AT91C_BASE_PMC->PMC_MOR = (0x37 << 16) | BOARD_OSCOUNT | AT91C_CKGR_MOSCRCEN | AT91C_CKGR_MOSCXTEN;
+        timeout = 0;
+        while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCXTS) && (timeout++ < CLOCK_TIMEOUT));
+        
+    }
+ 
+    /* Switch to moscsel */
+    AT91C_BASE_PMC->PMC_MOR = (0x37 << 16) | BOARD_OSCOUNT | AT91C_CKGR_MOSCRCEN | AT91C_CKGR_MOSCXTEN | AT91C_CKGR_MOSCSEL;
+    timeout = 0;
+    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCSELS) && (timeout++ < CLOCK_TIMEOUT));
+    AT91C_BASE_PMC->PMC_MCKR = (AT91C_BASE_PMC->PMC_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK;
+    timeout = 0;
+    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
+
+    /* Initialize PLLA */
+    AT91C_BASE_PMC->PMC_PLLAR = BOARD_PLLR;
+    timeout = 0;
+    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKA) && (timeout++ < CLOCK_TIMEOUT));
+
+    /* Initialize UTMI for USB usage */
+    AT91C_BASE_CKGR->CKGR_UCKR |= (AT91C_CKGR_UPLLCOUNT & (3 << 20)) | AT91C_CKGR_UPLLEN;
+    timeout = 0;
+    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKU) && (timeout++ < CLOCK_TIMEOUT));
+
+    /* Switch to fast clock
+     **********************/
+    AT91C_BASE_PMC->PMC_MCKR = (BOARD_MCKR & ~AT91C_PMC_CSS) | AT91C_PMC_CSS_MAIN_CLK;
+    timeout = 0;
+    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
+
+    AT91C_BASE_PMC->PMC_MCKR = BOARD_MCKR;
+    timeout = 0;
+    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
+
+    /* Enable clock for UART
+     ************************/
+    AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_DBGU);
+
+    /* Optimize CPU setting for speed */
+    SetDefaultMaster(1);
+
+}
+
+////------------------------------------------------------------------------------
+///// Enable or disable default master access
+///// \param enalbe 1 enable defaultMaster settings, 0 disable it.
+////------------------------------------------------------------------------------
+//void SetDefaultMaster(unsigned char enable)
+//{
+//    AT91PS_HMATRIX2 pMatrix = AT91C_BASE_MATRIX;
+//
+//    // Set default master
+//    if (enable == 1) {
+//
+//        // Set default master: SRAM0 -> Cortex-M3 System
+//        pMatrix->HMATRIX2_SCFG0 |= AT91C_MATRIX_FIXED_DEFMSTR_SCFG0_ARMS |
+//                                   AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR;
+//        
+//        // Set default master: SRAM1 -> Cortex-M3 System
+//        pMatrix->HMATRIX2_SCFG1 |= AT91C_MATRIX_FIXED_DEFMSTR_SCFG1_ARMS |
+//                                   AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR;
+//
+//        // Set default master: Internal flash0 -> Cortex-M3 Instruction/Data
+//        pMatrix->HMATRIX2_SCFG3 |= AT91C_MATRIX_FIXED_DEFMSTR_SCFG3_ARMC |
+//                                   AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR;
+//    } else {
+//
+//        // Clear default master: SRAM0 -> Cortex-M3 System
+//        pMatrix->HMATRIX2_SCFG0 &= (~AT91C_MATRIX_DEFMSTR_TYPE);
+//        
+//        // Clear default master: SRAM1 -> Cortex-M3 System
+//        pMatrix->HMATRIX2_SCFG1 &= (~AT91C_MATRIX_DEFMSTR_TYPE);
+//
+//        // Clear default master: Internal flash0 -> Cortex-M3 Instruction/Data
+//        pMatrix->HMATRIX2_SCFG3 &= (~AT91C_MATRIX_DEFMSTR_TYPE);
+//    }
+//}
+
+//------------------------------------------------------------------------------
+/// Set flash wait state
+/// \param ws    Value of flash wait state
+//------------------------------------------------------------------------------
+void SetFlashWaitState(unsigned char ws)
+{
+    // Set Wait State for Embedded Flash Access
+	AT91C_BASE_EFC0->EFC_FMR = ((ws << 8) & AT91C_EFC_FWS);
+	AT91C_BASE_EFC1->EFC_FMR = ((ws << 8) & AT91C_EFC_FWS);
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/board/board_lowlevel.h b/tos/chips/cortex/m3/sam3/u/usb/board/board_lowlevel.h
new file mode 100644
index 00000000..ef630687
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/board/board_lowlevel.h
@@ -0,0 +1,55 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !!!Purpose
+///
+/// Collection of methods for lowlevel.
+///
+//------------------------------------------------------------------------------
+
+#ifndef BOARD_LOWLEVEL_H
+#define BOARD_LOWLEVEL_H
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+extern void LowLevelInit(void);
+extern void SetDefaultMaster(unsigned char enable);
+extern void SetFlashWaitState(unsigned char ws);
+
+#endif // BOARD_LOWLEVEL_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/board/chip.h b/tos/chips/cortex/m3/sam3/u/usb/board/chip.h
new file mode 100644
index 00000000..6a533dd4
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/board/chip.h
@@ -0,0 +1,107 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+ 
+//------------------------------------------------------------------------------
+/// \unit
+/// !Purpose
+///
+/// Definition of AT91SAM3U4 characteristics and features
+///
+/// !Usage
+/// -# For ARM core feature, see "AT91SAM3U4 - ARM core features".
+/// -# For IP features, see "AT91SAM3U4 - IP features".
+/// -# For misc, see "AT91SAM3U4 - Misc".
+//------------------------------------------------------------------------------
+ 
+#ifndef CHIP_H 
+#define CHIP_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "AT91SAM3U4 - ARM core features"
+/// This page lists several characteristics related to the ARM core
+///
+
+//ARM core features
+
+/// ARM core definition.
+#define cortexm3
+
+/// family definition.
+#define at91sam3u
+
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "AT91SAM3U4 - IP features"
+/// This page lists several characteristics related to the embedded IP
+///
+
+//IP FEATURES
+
+// EFC GPNVM number
+#define CHIP_EFC_NUM_GPNVMS    3
+
+/// Indicates chip has an Enhanced EFC. 
+#define CHIP_FLASH_EEFC 
+
+// DMA channels number
+#define CHIP_DMA_CHANNEL_NUM   4
+
+// Indicate chip's MCI interface. 
+#define MCI2_INTERFACE
+ 
+// Indicate chip SSC has DMA interface. 
+#define CHIP_SSC_DMA
+ 
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "AT91SAM3U4 - Misc "
+/// This page lists misc features
+///
+
+//Misc 
+
+//------------------------------------------------------------------------------
+
+#endif //#ifndef CHIP_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/board/exceptions.h b/tos/chips/cortex/m3/sam3/u/usb/board/exceptions.h
new file mode 100644
index 00000000..aca3e8c8
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/board/exceptions.h
@@ -0,0 +1,140 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+** This file contains the default exception handlers
+** and exception table.
+*/
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+/// Function prototype for exception table items - interrupt handler.
+//typedef void( *IrqHandler )( void );
+typedef void( *IntFunc )( void );
+
+/// Weak attribute
+
+#if defined   ( __CC_ARM   )
+    #define WEAK __attribute__ ((weak))
+#elif defined ( __ICCARM__ )
+    #define WEAK __weak
+#elif defined (  __GNUC__  )
+    #define WEAK __attribute__ ((weak))
+#endif
+
+//------------------------------------------------------------------------------
+//         Global functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Exception Handlers
+//------------------------------------------------------------------------------
+
+extern WEAK void NMI_Handler( void );
+extern WEAK void HardFault_Handler( void );
+extern WEAK void MemManage_Handler( void );
+extern WEAK void BusFault_Handler( void );
+extern WEAK void UsageFault_Handler( void );
+extern WEAK void SVC_Handler( void );
+extern WEAK void DebugMon_Handler( void );
+extern WEAK void PendSV_Handler( void );
+extern WEAK void SysTick_Handler( void );
+void IrqHandlerNotUsed(void);
+
+
+// System Controller
+extern void SYS_IrqHandler(void);
+// SUPPLY CONTROLLER
+extern WEAK void SUPC_IrqHandler(void);
+// RESET CONTROLLER
+extern WEAK void RSTC_IrqHandler(void);
+// REAL TIME CLOCK
+extern WEAK void RTC_IrqHandler(void);
+// REAL TIME TIMER
+extern WEAK void RTT_IrqHandler(void);
+// WATCHDOG TIMER
+extern WEAK void WDT_IrqHandler(void);
+// PMC
+extern WEAK void PMC_IrqHandler(void);
+// EFC0
+extern WEAK void EFC0_IrqHandler(void);
+// EFC1
+extern WEAK void EFC1_IrqHandler(void);
+// DBGU
+extern WEAK void DBGU_IrqHandler(void);
+// HSMC4
+extern WEAK void HSMC4_IrqHandler(void);
+// Parallel IO Controller A
+extern WEAK void PIOA_IrqHandler(void);
+// Parallel IO Controller B
+extern WEAK void PIOB_IrqHandler(void);
+// Parallel IO Controller C
+extern WEAK void PIOC_IrqHandler(void);
+// USART 0
+extern WEAK void USART0_IrqHandler(void);
+// USART 1
+extern WEAK void USART1_IrqHandler(void);
+// USART 2
+extern WEAK void USART2_IrqHandler(void);
+// USART 3
+extern WEAK void USART3_IrqHandler(void);
+// Multimedia Card Interface
+extern WEAK void MCI0_IrqHandler(void);
+// TWI 0
+extern WEAK void TWI0_IrqHandler(void);
+// TWI 1
+extern WEAK void TWI1_IrqHandler(void);
+// Serial Peripheral Interface 0
+extern WEAK void SPI0_IrqHandler(void);
+// Serial Synchronous Controller 0
+extern WEAK void SSC0_IrqHandler(void);
+// Timer Counter 0
+extern WEAK void TC0_IrqHandler(void);
+// Timer Counter 1
+extern WEAK void TC1_IrqHandler(void);
+// Timer Counter 2
+extern WEAK void TC2_IrqHandler(void);
+// PWM Controller
+extern WEAK void PWM_IrqHandler(void);
+// ADC controller0
+extern WEAK void ADCC0_IrqHandler(void);
+// ADC controller1
+extern WEAK void ADCC1_IrqHandler(void);
+// HDMA
+extern WEAK void HDMA_IrqHandler(void);
+// USB Device High Speed UDP_HS
+extern WEAK void UDPD_IrqHandler(void);
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/cmsis/core_cm3.c b/tos/chips/cortex/m3/sam3/u/usb/cmsis/core_cm3.c
new file mode 100644
index 00000000..fab46cd1
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/cmsis/core_cm3.c
@@ -0,0 +1,826 @@
+/******************************************************************************
+ * @file:    core_cm3.c
+ * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Source File
+ * @version: V1.10
+ * @date:    24. Feb. 2009
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (C) 2009 ARM Limited.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ARM Limited (ARM) is supplying this software for use with Cortex-Mx 
+ * processor based microcontrollers.  This file can be freely distributed 
+ * within development tools that are supporting such ARM based processors. 
+ *
+ ******************************************************************************/
+
+
+
+#include <stdint.h>
+
+
+/* define compiler specific symbols */
+#if defined   ( __CC_ARM   )
+  #define __ASM            __asm           /*!< asm keyword for armcc          */
+  #define __INLINE         __inline        /*!< inline keyword for armcc        */
+
+#elif defined ( __ICCARM__ )
+  #define __ASM           __asm            /*!< asm keyword for iarcc           */
+  #define __INLINE        inline           /*!< inline keyword for iarcc. Only avaiable in High optimization mode! */
+  #define __nop           __no_operation   /*!< no operation intrinsic in iarcc */
+
+#elif defined (  __GNUC__  )
+  #define __ASM             asm            /*!< asm keyword for gcc            */
+  #define __INLINE          inline         /*!< inline keyword for gcc         */
+#endif
+
+
+
+#if defined ( __CC_ARM   ) /*------------------RealView Compiler -----------------*/
+
+/**
+ * @brief  Return the Process Stack Pointer
+ *
+ * @param  none
+ * @return uint32_t ProcessStackPointer
+ *
+ * Return the actual process stack pointer
+ */
+__ASM uint32_t __get_PSP(void)
+{
+  mrs r0, psp
+  bx lr
+}
+
+/**
+ * @brief  Set the Process Stack Pointer
+ *
+ * @param  uint32_t Process Stack Pointer
+ * @return none
+ *
+ * Assign the value ProcessStackPointer to the MSP 
+ * (process stack pointer) Cortex processor register
+ */
+__ASM void __set_PSP(uint32_t topOfProcStack)
+{
+  msr psp, r0
+  bx lr
+}
+
+/**
+ * @brief  Return the Main Stack Pointer
+ *
+ * @param  none
+ * @return uint32_t Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+__ASM uint32_t __get_MSP(void)
+{
+  mrs r0, msp
+  bx lr
+}
+
+/**
+ * @brief  Set the Main Stack Pointer
+ *
+ * @param  uint32_t Main Stack Pointer
+ * @return none
+ *
+ * Assign the value mainStackPointer to the MSP 
+ * (main stack pointer) Cortex processor register
+ */
+__ASM void __set_MSP(uint32_t mainStackPointer)
+{
+  msr msp, r0
+  bx lr
+}
+
+/**
+ * @brief  Reverse byte order in unsigned short value
+ *
+ * @param  uint16_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse byte order in unsigned short value
+ */
+__ASM uint32_t __REV16(uint16_t value)
+{
+  rev16 r0, r0
+  bx lr
+}
+
+/**
+ * @brief  Reverse byte order in signed short value with sign extension to integer
+ *
+ * @param  int16_t value to reverse
+ * @return int32_t reversed value
+ *
+ * Reverse byte order in signed short value with sign extension to integer
+ */
+__ASM int32_t __REVSH(int16_t value)
+{
+  revsh r0, r0
+  bx lr
+}
+
+
+#if (__ARMCC_VERSION < 400000)
+
+/**
+ * @brief  Remove the exclusive lock created by ldrex
+ *
+ * @param  none
+ * @return none
+ *
+ * Removes the exclusive lock which is created by ldrex.
+ */
+__ASM void __CLREX(void)
+{
+  clrex
+}
+
+/**
+ * @brief  Return the Base Priority value
+ *
+ * @param  none
+ * @return uint32_t BasePriority
+ *
+ * Return the content of the base priority register
+ */
+__ASM uint32_t  __get_BASEPRI(void)
+{
+  mrs r0, basepri
+  bx lr
+}
+
+/**
+ * @brief  Set the Base Priority value
+ *
+ * @param  uint32_t BasePriority
+ * @return none
+ *
+ * Set the base priority register
+ */
+__ASM void __set_BASEPRI(uint32_t basePri)
+{
+  msr basepri, r0
+  bx lr
+}
+
+/**
+ * @brief  Return the Priority Mask value
+ *
+ * @param  none
+ * @return uint32_t PriMask
+ *
+ * Return the state of the priority mask bit from the priority mask
+ * register
+ */
+__ASM uint32_t __get_PRIMASK(void)
+{
+  mrs r0, primask
+  bx lr
+}
+
+/**
+ * @brief  Set the Priority Mask value
+ *
+ * @param  uint32_t PriMask
+ * @return none
+ *
+ * Set the priority mask bit in the priority mask register
+ */
+__ASM void __set_PRIMASK(uint32_t priMask)
+{
+  msr primask, r0
+  bx lr
+}
+
+/**
+ * @brief  Return the Fault Mask value
+ *
+ * @param  none
+ * @return uint32_t FaultMask
+ *
+ * Return the content of the fault mask register
+ */
+__ASM uint32_t  __get_FAULTMASK(void)
+{
+  mrs r0, faultmask
+  bx lr
+}
+
+/**
+ * @brief  Set the Fault Mask value
+ *
+ * @param  uint32_t faultMask value
+ * @return none
+ *
+ * Set the fault mask register
+ */
+__ASM void __set_FAULTMASK(uint32_t faultMask)
+{
+  msr faultmask, r0
+  bx lr
+}
+
+/**
+ * @brief  Return the Control Register value
+ * 
+ * @param  none
+ * @return uint32_t Control value
+ *
+ * Return the content of the control register
+ */
+__ASM uint32_t  __get_CONTROL(void)
+{
+  mrs r0, control
+  bx lr
+}
+
+/**
+ * @brief  Set the Control Register value
+ *
+ * @param  uint32_t Control value
+ * @return none
+ *
+ * Set the control register
+ */
+__ASM void __set_CONTROL(uint32_t control)
+{
+  msr control, r0
+  bx lr
+}
+
+#endif /* __ARMCC_VERSION  */ 
+
+
+#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
+#pragma diag_suppress=Pe940
+
+/**
+ * @brief  Return the Process Stack Pointer
+ *
+ * @param  none
+ * @return uint32_t ProcessStackPointer
+ *
+ * Return the actual process stack pointer
+ */
+uint32_t __get_PSP(void)
+{
+  __ASM("mrs r0, psp");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  Set the Process Stack Pointer
+ *
+ * @param  uint32_t Process Stack Pointer
+ * @return none
+ *
+ * Assign the value ProcessStackPointer to the MSP 
+ * (process stack pointer) Cortex processor register
+ */
+void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM("msr psp, r0");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  Return the Main Stack Pointer
+ *
+ * @param  none
+ * @return uint32_t Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+uint32_t __get_MSP(void)
+{
+  __ASM("mrs r0, msp");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  Set the Main Stack Pointer
+ *
+ * @param  uint32_t Main Stack Pointer
+ * @return none
+ *
+ * Assign the value mainStackPointer to the MSP 
+ * (main stack pointer) Cortex processor register
+ */
+void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM("msr msp, r0");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  Reverse byte order in unsigned short value
+ *
+ * @param  uint16_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse byte order in unsigned short value
+ */
+uint32_t __REV16(uint16_t value)
+{
+  __ASM("rev16 r0, r0");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  Reverse bit order of value
+ *
+ * @param  uint32_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse bit order of value
+ */
+uint32_t __RBIT(uint32_t value)
+{
+  __ASM("rbit r0, r0");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  LDR Exclusive
+ *
+ * @param  uint8_t* address
+ * @return uint8_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+uint8_t __LDREXB(uint8_t *addr)
+{
+  __ASM("ldrexb r0, [r0]");
+  __ASM("bx lr"); 
+}
+
+/**
+ * @brief  LDR Exclusive
+ *
+ * @param  uint16_t* address
+ * @return uint16_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+uint16_t __LDREXH(uint16_t *addr)
+{
+  __ASM("ldrexh r0, [r0]");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  LDR Exclusive
+ *
+ * @param  uint32_t* address
+ * @return uint32_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+uint32_t __LDREXW(uint32_t *addr)
+{
+  __ASM("ldrex r0, [r0]");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  STR Exclusive
+ *
+ * @param  uint8_t *address
+ * @param  uint8_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+uint32_t __STREXB(uint8_t value, uint8_t *addr)
+{
+  __ASM("strexb r0, r0, [r1]");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  STR Exclusive
+ *
+ * @param  uint16_t *address
+ * @param  uint16_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+uint32_t __STREXH(uint16_t value, uint16_t *addr)
+{
+  __ASM("strexh r0, r0, [r1]");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  STR Exclusive
+ *
+ * @param  uint32_t *address
+ * @param  uint32_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+uint32_t __STREXW(uint32_t value, uint32_t *addr)
+{
+  __ASM("strex r0, r0, [r1]");
+  __ASM("bx lr");
+}
+
+#pragma diag_default=Pe940
+
+
+#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
+
+/**
+ * @brief  Return the Process Stack Pointer
+ *
+ * @param  none
+ * @return uint32_t ProcessStackPointer
+ *
+ * Return the actual process stack pointer
+ */
+uint32_t __get_PSP(void)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("MRS %0, psp" : "=r" (result) );
+  return(result);
+}
+
+/**
+ * @brief  Set the Process Stack Pointer
+ *
+ * @param  uint32_t Process Stack Pointer
+ * @return none
+ *
+ * Assign the value ProcessStackPointer to the MSP 
+ * (process stack pointer) Cortex processor register
+ */
+void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) );
+}
+
+/**
+ * @brief  Return the Main Stack Pointer
+ *
+ * @param  none
+ * @return uint32_t Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+uint32_t __get_MSP(void)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("MRS %0, msp" : "=r" (result) );
+  return(result);
+}
+
+/**
+ * @brief  Set the Main Stack Pointer
+ *
+ * @param  uint32_t Main Stack Pointer
+ * @return none
+ *
+ * Assign the value mainStackPointer to the MSP 
+ * (main stack pointer) Cortex processor register
+ */
+void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) );
+}
+
+/**
+ * @brief  Return the Base Priority value
+ *
+ * @param  none
+ * @return uint32_t BasePriority
+ *
+ * Return the content of the base priority register
+ */
+uint32_t __get_BASEPRI(void)
+{
+  uint32_t result=0;
+  
+  __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
+  return(result);
+}
+
+/**
+ * @brief  Set the Base Priority value
+ *
+ * @param  uint32_t BasePriority
+ * @return none
+ *
+ * Set the base priority register
+ */
+void __set_BASEPRI(uint32_t value)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (value) );
+}
+
+/**
+ * @brief  Return the Priority Mask value
+ *
+ * @param  none
+ * @return uint32_t PriMask
+ *
+ * Return the state of the priority mask bit from the priority mask
+ * register
+ */
+uint32_t __get_PRIMASK(void)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  return(result);
+}
+
+/**
+ * @brief  Set the Priority Mask value
+ *
+ * @param  uint32_t PriMask
+ * @return none
+ *
+ * Set the priority mask bit in the priority mask register
+ */
+void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
+}
+
+/**
+ * @brief  Return the Fault Mask value
+ *
+ * @param  none
+ * @return uint32_t FaultMask
+ *
+ * Return the content of the fault mask register
+ */
+uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result=0;
+  
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+/**
+ * @brief  Set the Fault Mask value
+ *
+ * @param  uint32_t faultMask value
+ * @return none
+ *
+ * Set the fault mask register
+ */
+void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
+}
+
+/**
+ * @brief  Reverse byte order in integer value
+ *
+ * @param  uint32_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse byte order in integer value
+ */
+uint32_t __REV(uint32_t value)
+{
+  uint32_t result=0;
+  
+  __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
+  return(result);
+}
+
+/**
+ * @brief  Reverse byte order in unsigned short value
+ *
+ * @param  uint16_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse byte order in unsigned short value
+ */
+uint32_t __REV16(uint16_t value)
+{
+  uint32_t result=0;
+  
+  __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
+  return(result);
+}
+
+/**
+ * @brief  Reverse byte order in signed short value with sign extension to integer
+ *
+ * @param  int32_t value to reverse
+ * @return int32_t reversed value
+ *
+ * Reverse byte order in signed short value with sign extension to integer
+ */
+int32_t __REVSH(int16_t value)
+{
+  uint32_t result=0;
+  
+  __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
+  return(result);
+}
+
+/**
+ * @brief  Reverse bit order of value
+ *
+ * @param  uint32_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse bit order of value
+ */
+uint32_t __RBIT(uint32_t value)
+{
+  uint32_t result=0;
+  
+   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
+   return(result);
+}
+
+/**
+ * @brief  LDR Exclusive
+ *
+ * @param  uint8_t* address
+ * @return uint8_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+uint8_t __LDREXB(uint8_t *addr)
+{
+    uint8_t result=0;
+  
+   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
+   return(result);
+}
+
+/**
+ * @brief  LDR Exclusive
+ *
+ * @param  uint16_t* address
+ * @return uint16_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+uint16_t __LDREXH(uint16_t *addr)
+{
+    uint16_t result=0;
+  
+   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
+   return(result);
+}
+
+/**
+ * @brief  LDR Exclusive
+ *
+ * @param  uint32_t* address
+ * @return uint32_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+uint32_t __LDREXW(uint32_t *addr)
+{
+    uint32_t result=0;
+  
+   __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
+   return(result);
+}
+
+/**
+ * @brief  STR Exclusive
+ *
+ * @param  uint8_t *address
+ * @param  uint8_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+uint32_t __STREXB(uint8_t value, uint8_t *addr)
+{
+   uint32_t result=0;
+  
+   __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
+   return(result);
+}
+
+/**
+ * @brief  STR Exclusive
+ *
+ * @param  uint16_t *address
+ * @param  uint16_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+uint32_t __STREXH(uint16_t value, uint16_t *addr)
+{
+   uint32_t result=0;
+  
+   __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
+   return(result);
+}
+
+/**
+ * @brief  STR Exclusive
+ *
+ * @param  uint32_t *address
+ * @param  uint32_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+uint32_t __STREXW(uint32_t value, uint32_t *addr)
+{
+   uint32_t result=0;
+  
+   __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
+   return(result);
+}
+
+/**
+ * @brief  Return the Control Register value
+ * 
+ * @param  none
+ * @return uint32_t Control value
+ *
+ * Return the content of the control register
+ */
+uint32_t __get_CONTROL(void)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+/**
+ * @brief  Set the Control Register value
+ *
+ * @param  uint32_t Control value
+ * @return none
+ *
+ * Set the control register
+ */
+void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) );
+}
+
+#endif
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/cmsis/core_cm3.h b/tos/chips/cortex/m3/sam3/u/usb/cmsis/core_cm3.h
new file mode 100644
index 00000000..397d43d4
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/cmsis/core_cm3.h
@@ -0,0 +1,1285 @@
+/******************************************************************************
+ * @file:    core_cm3.h
+ * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File
+ * @version: V1.10
+ * @date:    24. Feb. 2009
+ *----------------------------------------------------------------------------
+ *
+ * Copyright (C) 2009 ARM Limited. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ARM Limited (ARM) is supplying this software for use with Cortex-Mx 
+ * processor based microcontrollers.  This file can be freely distributed 
+ * within development tools that are supporting such ARM based processors. 
+ ******************************************************************************/
+
+
+
+
+#ifndef __CM3_CORE_H__
+#define __CM3_CORE_H__
+
+
+#define __CM3_CMSIS_VERSION_MAIN  (0x01)                                                       /*!< [31:16] CMSIS HAL main version */
+#define __CM3_CMSIS_VERSION_SUB   (0x10)                                                       /*!< [15:0]  CMSIS HAL sub version  */
+#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number       */
+
+#define __CORTEX_M                (0x03)                                                       /*!< Cortex core                    */
+
+/**
+ *  Lint configuration \n
+ *  ----------------------- \n
+ *
+ *  The following Lint messages will be suppressed and not shown: \n
+ *  \n
+ *    --- Error 10: --- \n
+ *    register uint32_t __regBasePri         __asm("basepri"); \n
+ *    Error 10: Expecting ';' \n
+ *     \n
+ *    --- Error 530: --- \n
+ *    return(__regBasePri); \n
+ *    Warning 530: Symbol '__regBasePri' (line 264) not initialized \n
+ *     \n
+ *    --- Error 550: --- \n
+ *      __regBasePri = (basePri & 0x1ff); \n
+ *    } \n
+ *    Warning 550: Symbol '__regBasePri' (line 271) not accessed \n
+ *     \n
+ *    --- Error 754: --- \n
+ *    uint32_t RESERVED0[24]; \n
+ *    Info 754: local structure member '<some, not used in the HAL>' (line 109, file ./cm3_core.h) not referenced \n
+ *     \n
+ *    --- Error 750: --- \n
+ *    #define __CM3_CORE_H__ \n
+ *    Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced \n
+ *     \n
+ *    --- Error 528: --- \n
+ *    static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n
+ *    Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced \n
+ *     \n
+ *    --- Error 751: --- \n
+ *    } InterruptType_Type; \n
+ *    Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced \n
+ * \n
+ * \n
+ *    Note:  To re-enable a Message, insert a space before 'lint' * \n
+ *
+ */
+
+/*lint -save */
+/*lint -e10  */
+/*lint -e530 */
+/*lint -e550 */
+/*lint -e754 */
+/*lint -e750 */
+/*lint -e528 */
+/*lint -e751 */
+
+
+#include <stdint.h>                           /* Include standard types */
+
+#if defined (__ICCARM__)
+  #include <intrinsics.h>                     /* IAR Intrinsics   */
+#endif
+
+
+#ifndef __NVIC_PRIO_BITS
+  #define __NVIC_PRIO_BITS    4               /*!< standard definition for NVIC Priority Bits */
+#endif
+
+
+
+
+/**
+ * IO definitions
+ *
+ * define access restrictions to peripheral registers
+ */
+
+#define     __I     volatile const            /*!< defines 'read only' permissions      */
+#define     __O     volatile                  /*!< defines 'write only' permissions     */
+#define     __IO    volatile                  /*!< defines 'read / write' permissions   */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+ ******************************************************************************/
+
+
+/* System Reset */
+#define NVIC_VECTRESET              0         /*!< Vector Reset Bit             */
+#define NVIC_SYSRESETREQ            2         /*!< System Reset Request         */
+#define NVIC_AIRCR_VECTKEY    (0x5FA << 16)   /*!< AIRCR Key for write access   */
+#define NVIC_AIRCR_ENDIANESS        15        /*!< Endianess                    */
+
+/* Core Debug */
+#define CoreDebug_DEMCR_TRCENA (1 << 24)      /*!< DEMCR TRCENA enable          */
+#define ITM_TCR_ITMENA              1         /*!< ITM enable                   */
+
+
+
+
+/* memory mapping struct for Nested Vectored Interrupt Controller (NVIC) */
+typedef struct
+{
+  __IO uint32_t ISER[8];                      /*!< Interrupt Set Enable Register            */
+       uint32_t RESERVED0[24];
+  __IO uint32_t ICER[8];                      /*!< Interrupt Clear Enable Register          */
+       uint32_t RSERVED1[24];
+  __IO uint32_t ISPR[8];                      /*!< Interrupt Set Pending Register           */
+       uint32_t RESERVED2[24];
+  __IO uint32_t ICPR[8];                      /*!< Interrupt Clear Pending Register         */
+       uint32_t RESERVED3[24];
+  __IO uint32_t IABR[8];                      /*!< Interrupt Active bit Register            */
+       uint32_t RESERVED4[56];
+  __IO uint8_t  IP[240];                      /*!< Interrupt Priority Register, 8Bit wide   */
+       uint32_t RESERVED5[644];
+  __O  uint32_t STIR;                         /*!< Software Trigger Interrupt Register      */
+}  NVIC_Type;
+
+
+/* memory mapping struct for System Control Block */
+typedef struct
+{
+  __I  uint32_t CPUID;                        /*!< CPU ID Base Register                                     */
+  __IO uint32_t ICSR;                         /*!< Interrupt Control State Register                         */
+  __IO uint32_t VTOR;                         /*!< Vector Table Offset Register                             */
+  __IO uint32_t AIRCR;                        /*!< Application Interrupt / Reset Control Register           */
+  __IO uint32_t SCR;                          /*!< System Control Register                                  */
+  __IO uint32_t CCR;                          /*!< Configuration Control Register                           */
+  __IO uint8_t  SHP[12];                      /*!< System Handlers Priority Registers (4-7, 8-11, 12-15)    */
+  __IO uint32_t SHCSR;                        /*!< System Handler Control and State Register                */
+  __IO uint32_t CFSR;                         /*!< Configurable Fault Status Register                       */
+  __IO uint32_t HFSR;                         /*!< Hard Fault Status Register                               */
+  __IO uint32_t DFSR;                         /*!< Debug Fault Status Register                              */
+  __IO uint32_t MMFAR;                        /*!< Mem Manage Address Register                              */
+  __IO uint32_t BFAR;                         /*!< Bus Fault Address Register                               */
+  __IO uint32_t AFSR;                         /*!< Auxiliary Fault Status Register                          */
+  __I  uint32_t PFR[2];                       /*!< Processor Feature Register                               */
+  __I  uint32_t DFR;                          /*!< Debug Feature Register                                   */
+  __I  uint32_t ADR;                          /*!< Auxiliary Feature Register                               */
+  __I  uint32_t MMFR[4];                      /*!< Memory Model Feature Register                            */
+  __I  uint32_t ISAR[5];                      /*!< ISA Feature Register                                     */
+} SCB_Type;
+
+
+/* memory mapping struct for SysTick */
+typedef struct
+{
+  __IO uint32_t CTRL;                         /*!< SysTick Control and Status Register */
+  __IO uint32_t LOAD;                         /*!< SysTick Reload Value Register       */
+  __IO uint32_t VAL;                          /*!< SysTick Current Value Register      */
+  __I  uint32_t CALIB;                        /*!< SysTick Calibration Register        */
+} SysTick_Type;
+
+
+/* memory mapping structur for ITM */
+typedef struct
+{
+  __O  union  
+  {
+    __O  uint8_t    u8;                       /*!< ITM Stimulus Port 8-bit               */
+    __O  uint16_t   u16;                      /*!< ITM Stimulus Port 16-bit              */
+    __O  uint32_t   u32;                      /*!< ITM Stimulus Port 32-bit              */
+  }  PORT [32];                               /*!< ITM Stimulus Port Registers           */
+       uint32_t RESERVED0[864];
+  __IO uint32_t TER;                          /*!< ITM Trace Enable Register             */
+       uint32_t RESERVED1[15];
+  __IO uint32_t TPR;                          /*!< ITM Trace Privilege Register          */
+       uint32_t RESERVED2[15];
+  __IO uint32_t TCR;                          /*!< ITM Trace Control Register            */
+       uint32_t RESERVED3[29];
+  __IO uint32_t IWR;                          /*!< ITM Integration Write Register        */
+  __IO uint32_t IRR;                          /*!< ITM Integration Read Register         */
+  __IO uint32_t IMCR;                         /*!< ITM Integration Mode Control Register */
+       uint32_t RESERVED4[43];
+  __IO uint32_t LAR;                          /*!< ITM Lock Access Register              */
+  __IO uint32_t LSR;                          /*!< ITM Lock Status Register              */
+       uint32_t RESERVED5[6];
+  __I  uint32_t PID4;                         /*!< ITM Product ID Registers              */
+  __I  uint32_t PID5;
+  __I  uint32_t PID6;
+  __I  uint32_t PID7;
+  __I  uint32_t PID0;
+  __I  uint32_t PID1;
+  __I  uint32_t PID2;
+  __I  uint32_t PID3;
+  __I  uint32_t CID0;
+  __I  uint32_t CID1;
+  __I  uint32_t CID2;
+  __I  uint32_t CID3;
+} ITM_Type;
+
+
+/* memory mapped struct for Interrupt Type */
+typedef struct
+{
+       uint32_t RESERVED0;
+  __I  uint32_t ICTR;                         /*!< Interrupt Control Type Register  */
+#if ((defined __CM3_REV) && (__CM3_REV >= 0x200))
+  __IO uint32_t ACTLR;                        /*!< Auxiliary Control Register       */
+#else
+       uint32_t RESERVED1;
+#endif
+} InterruptType_Type;
+
+
+/* Memory Protection Unit */
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1)
+typedef struct
+{
+  __I  uint32_t TYPE;                         /*!< MPU Type Register                               */
+  __IO uint32_t CTRL;                         /*!< MPU Control Register                            */
+  __IO uint32_t RNR;                          /*!< MPU Region RNRber Register                      */
+  __IO uint32_t RBAR;                         /*!< MPU Region Base Address Register                */
+  __IO uint32_t RASR;                         /*!< MPU Region Attribute and Size Register          */
+  __IO uint32_t RBAR_A1;                      /*!< MPU Alias 1 Region Base Address Register        */
+  __IO uint32_t RASR_A1;                      /*!< MPU Alias 1 Region Attribute and Size Register  */
+  __IO uint32_t RBAR_A2;                      /*!< MPU Alias 2 Region Base Address Register        */
+  __IO uint32_t RASR_A2;                      /*!< MPU Alias 2 Region Attribute and Size Register  */
+  __IO uint32_t RBAR_A3;                      /*!< MPU Alias 3 Region Base Address Register        */
+  __IO uint32_t RASR_A3;                      /*!< MPU Alias 3 Region Attribute and Size Register  */
+} MPU_Type;
+#endif
+
+
+/* Core Debug Register */
+typedef struct
+{
+  __IO uint32_t DHCSR;                        /*!< Debug Halting Control and Status Register       */
+  __O  uint32_t DCRSR;                        /*!< Debug Core Register Selector Register           */
+  __IO uint32_t DCRDR;                        /*!< Debug Core Register Data Register               */
+  __IO uint32_t DEMCR;                        /*!< Debug Exception and Monitor Control Register    */
+} CoreDebug_Type;
+
+
+/* Memory mapping of Cortex-M3 Hardware */
+#define SCS_BASE            (0xE000E000)                              /*!< System Control Space Base Address    */
+#define ITM_BASE            (0xE0000000)                              /*!< ITM Base Address                     */
+#define CoreDebug_BASE      (0xE000EDF0)                              /*!< Core Debug Base Address              */
+#define SysTick_BASE        (SCS_BASE +  0x0010)                      /*!< SysTick Base Address                 */
+#define NVIC_BASE           (SCS_BASE +  0x0100)                      /*!< NVIC Base Address                    */
+#define SCB_BASE            (SCS_BASE +  0x0D00)                      /*!< System Control Block Base Address    */
+
+#define InterruptType       ((InterruptType_Type *) SCS_BASE)         /*!< Interrupt Type Register              */
+//#define SCB                 ((SCB_Type *)           SCB_BASE)         /*!< SCB configuration struct             */
+#define SysTick             ((SysTick_Type *)       SysTick_BASE)     /*!< SysTick configuration struct         */
+#define NVIC                ((NVIC_Type *)          NVIC_BASE)        /*!< NVIC configuration struct            */
+#define ITM                 ((ITM_Type *)           ITM_BASE)         /*!< ITM configuration struct             */
+#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct      */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1)
+  #define MPU_BASE          (SCS_BASE +  0x0D90)                      /*!< Memory Protection Unit               */
+  #define MPU               ((MPU_Type*)            MPU_BASE)         /*!< Memory Protection Unit               */
+#endif
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+ ******************************************************************************/
+
+
+#if defined ( __CC_ARM   )
+  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
+  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
+
+#elif defined ( __ICCARM__ )
+  #define __ASM           __asm                                       /*!< asm keyword for IAR Compiler           */
+  #define __INLINE        inline                                      /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
+  #define __NOP           __no_operation                              /*!< no operation intrinsic in IAR Compiler */
+
+#elif defined   (  __GNUC__  )
+  #define __ASM            asm                                        /*!< asm keyword for GNU Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
+
+#endif
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+
+#if defined ( __CC_ARM   ) /*------------------RealView Compiler -----------------*/
+/* ARM armcc specific functions */
+
+#define __enable_fault_irq                __enable_fiq
+#define __disable_fault_irq               __disable_fiq
+
+#define __NOP                             __nop
+#define __WFI                             __wfi
+#define __WFE                             __wfe
+#define __SEV                             __sev
+#define __ISB()                           __isb(0)
+#define __DSB()                           __dsb(0)
+#define __DMB()                           __dmb(0)
+#define __REV                             __rev
+#define __RBIT                            __rbit
+#define __LDREXB(ptr)                     ((unsigned char ) __ldrex(ptr))
+#define __LDREXH(ptr)                     ((unsigned short) __ldrex(ptr))
+#define __LDREXW(ptr)                     ((unsigned int  ) __ldrex(ptr))
+#define __STREXB(value, ptr)              __strex(value, ptr)
+#define __STREXH(value, ptr)              __strex(value, ptr)
+#define __STREXW(value, ptr)              __strex(value, ptr)
+
+
+  /* intrinsic unsigned long long __ldrexd(volatile void *ptr) */
+  /* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */
+  /* intrinsic void __enable_irq();     */
+  /* intrinsic void __disable_irq();    */
+
+
+/**
+ * @brief  Return the Process Stack Pointer
+ *
+ * @param  none
+ * @return uint32_t ProcessStackPointer
+ *
+ * Return the actual process stack pointer
+ */
+extern uint32_t __get_PSP(void);
+
+/**
+ * @brief  Set the Process Stack Pointer
+ *
+ * @param  uint32_t Process Stack Pointer
+ * @return none
+ *
+ * Assign the value ProcessStackPointer to the MSP 
+ * (process stack pointer) Cortex processor register
+ */
+extern void __set_PSP(uint32_t topOfProcStack);
+
+/**
+ * @brief  Return the Main Stack Pointer
+ *
+ * @param  none
+ * @return uint32_t Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+extern uint32_t __get_MSP(void);
+
+/**
+ * @brief  Set the Main Stack Pointer
+ *
+ * @param  uint32_t Main Stack Pointer
+ * @return none
+ *
+ * Assign the value mainStackPointer to the MSP 
+ * (main stack pointer) Cortex processor register
+ */
+extern void __set_MSP(uint32_t topOfMainStack);
+
+/**
+ * @brief  Reverse byte order in unsigned short value
+ *
+ * @param  uint16_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse byte order in unsigned short value
+ */
+extern uint32_t __REV16(uint16_t value);
+
+/*
+ * @brief  Reverse byte order in signed short value with sign extension to integer
+ *
+ * @param  int16_t value to reverse
+ * @return int32_t reversed value
+ *
+ * Reverse byte order in signed short value with sign extension to integer
+ */
+extern int32_t __REVSH(int16_t value);
+
+
+#if (__ARMCC_VERSION < 400000)
+
+/**
+ * @brief  Remove the exclusive lock created by ldrex
+ *
+ * @param  none
+ * @return none
+ *
+ * Removes the exclusive lock which is created by ldrex.
+ */
+extern void __CLREX(void);
+
+/**
+ * @brief  Return the Base Priority value
+ *
+ * @param  none
+ * @return uint32_t BasePriority
+ *
+ * Return the content of the base priority register
+ */
+extern uint32_t __get_BASEPRI(void);
+
+/**
+ * @brief  Set the Base Priority value
+ *
+ * @param  uint32_t BasePriority
+ * @return none
+ *
+ * Set the base priority register
+ */
+extern void __set_BASEPRI(uint32_t basePri);
+
+/**
+ * @brief  Return the Priority Mask value
+ *
+ * @param  none
+ * @return uint32_t PriMask
+ *
+ * Return the state of the priority mask bit from the priority mask
+ * register
+ */
+extern uint32_t __get_PRIMASK(void);
+
+/**
+ * @brief  Set the Priority Mask value
+ *
+ * @param  uint32_t PriMask
+ * @return none
+ *
+ * Set the priority mask bit in the priority mask register
+ */
+extern void __set_PRIMASK(uint32_t priMask);
+
+/**
+ * @brief  Return the Fault Mask value
+ *
+ * @param  none
+ * @return uint32_t FaultMask
+ *
+ * Return the content of the fault mask register
+ */
+extern uint32_t __get_FAULTMASK(void);
+
+/**
+ * @brief  Set the Fault Mask value
+ *
+ * @param  uint32_t faultMask value
+ * @return none
+ *
+ * Set the fault mask register
+ */
+extern void __set_FAULTMASK(uint32_t faultMask);
+
+/**
+ * @brief  Return the Control Register value
+ * 
+ * @param  none
+ * @return uint32_t Control value
+ *
+ * Return the content of the control register
+ */
+extern uint32_t __get_CONTROL(void);
+
+/**
+ * @brief  Set the Control Register value
+ *
+ * @param  uint32_t Control value
+ * @return none
+ *
+ * Set the control register
+ */
+extern void __set_CONTROL(uint32_t control);
+
+#else  /* (__ARMCC_VERSION >= 400000)  */
+
+
+/**
+ * @brief  Remove the exclusive lock created by ldrex
+ *
+ * @param  none
+ * @return none
+ *
+ * Removes the exclusive lock which is created by ldrex.
+ */
+#define __CLREX                           __clrex
+
+/**
+ * @brief  Return the Base Priority value
+ *
+ * @param  none
+ * @return uint32_t BasePriority
+ *
+ * Return the content of the base priority register
+ */
+static __INLINE uint32_t  __get_BASEPRI(void)
+{
+  register uint32_t __regBasePri         __ASM("basepri");
+  return(__regBasePri);
+}
+
+/**
+ * @brief  Set the Base Priority value
+ *
+ * @param  uint32_t BasePriority
+ * @return none
+ *
+ * Set the base priority register
+ */
+static __INLINE void __set_BASEPRI(uint32_t basePri)
+{
+  register uint32_t __regBasePri         __ASM("basepri");
+  __regBasePri = (basePri & 0x1ff);
+}
+
+/**
+ * @brief  Return the Priority Mask value
+ *
+ * @param  none
+ * @return uint32_t PriMask
+ *
+ * Return the state of the priority mask bit from the priority mask
+ * register
+ */
+static __INLINE uint32_t __get_PRIMASK(void)
+{
+  register uint32_t __regPriMask         __ASM("primask");
+  return(__regPriMask);
+}
+
+/**
+ * @brief  Set the Priority Mask value
+ *
+ * @param  uint32_t PriMask
+ * @return none
+ *
+ * Set the priority mask bit in the priority mask register
+ */
+static __INLINE void __set_PRIMASK(uint32_t priMask)
+{
+  register uint32_t __regPriMask         __ASM("primask");
+  __regPriMask = (priMask);
+}
+
+/**
+ * @brief  Return the Fault Mask value
+ *
+ * @param  none
+ * @return uint32_t FaultMask
+ *
+ * Return the content of the fault mask register
+ */
+static __INLINE uint32_t __get_FAULTMASK(void)
+{
+  register uint32_t __regFaultMask       __ASM("faultmask");
+  return(__regFaultMask);
+}
+
+/**
+ * @brief  Set the Fault Mask value
+ *
+ * @param  uint32_t faultMask value
+ * @return none
+ *
+ * Set the fault mask register
+ */
+static __INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  register uint32_t __regFaultMask       __ASM("faultmask");
+  __regFaultMask = (faultMask & 1);
+}
+
+/**
+ * @brief  Return the Control Register value
+ * 
+ * @param  none
+ * @return uint32_t Control value
+ *
+ * Return the content of the control register
+ */
+static __INLINE uint32_t __get_CONTROL(void)
+{
+  register uint32_t __regControl         __ASM("control");
+  return(__regControl);
+}
+
+/**
+ * @brief  Set the Control Register value
+ *
+ * @param  uint32_t Control value
+ * @return none
+ *
+ * Set the control register
+ */
+static __INLINE void __set_CONTROL(uint32_t control)
+{
+  register uint32_t __regControl         __ASM("control");
+  __regControl = control;
+}
+
+#endif /* __ARMCC_VERSION  */ 
+
+
+
+#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
+/* IAR iccarm specific functions */
+
+#define __enable_irq                              __enable_interrupt        /*!< global Interrupt enable */
+#define __disable_irq                             __disable_interrupt       /*!< global Interrupt disable */
+
+static __INLINE void __enable_fault_irq()         { __ASM ("cpsie f"); }
+static __INLINE void __disable_fault_irq()        { __ASM ("cpsid f"); }
+
+static __INLINE  void __WFI()                     { __ASM ("wfi"); }
+static __INLINE  void __WFE()                     { __ASM ("wfe"); }
+static __INLINE  void __SEV()                     { __ASM ("sev"); }
+static __INLINE  void __CLREX()                   { __ASM ("clrex"); }
+
+/**
+ * @brief  Return the Process Stack Pointer
+ *
+ * @param  none
+ * @return uint32_t ProcessStackPointer
+ *
+ * Return the actual process stack pointer
+ */
+extern uint32_t __get_PSP(void);
+
+/**
+ * @brief  Set the Process Stack Pointer
+ *
+ * @param  uint32_t Process Stack Pointer
+ * @return none
+ *
+ * Assign the value ProcessStackPointer to the MSP 
+ * (process stack pointer) Cortex processor register
+ */
+extern void __set_PSP(uint32_t topOfProcStack);
+
+/**
+ * @brief  Return the Main Stack Pointer
+ *
+ * @param  none
+ * @return uint32_t Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+extern uint32_t __get_MSP(void);
+
+/**
+ * @brief  Set the Main Stack Pointer
+ *
+ * @param  uint32_t Main Stack Pointer
+ * @return none
+ *
+ * Assign the value mainStackPointer to the MSP 
+ * (main stack pointer) Cortex processor register
+ */
+extern void __set_MSP(uint32_t topOfMainStack);
+
+/**
+ * @brief  Reverse byte order in unsigned short value
+ *
+ * @param  uint16_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse byte order in unsigned short value
+ */
+extern uint32_t __REV16(uint16_t value);
+
+/**
+ * @brief  Reverse bit order of value
+ *
+ * @param  uint32_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse bit order of value
+ */
+extern uint32_t __RBIT(uint32_t value);
+
+/**
+ * @brief  LDR Exclusive
+ *
+ * @param  uint8_t* address
+ * @return uint8_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+extern uint8_t __LDREXB(uint8_t *addr);
+
+/**
+ * @brief  LDR Exclusive
+ *
+ * @param  uint16_t* address
+ * @return uint16_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+extern uint16_t __LDREXH(uint16_t *addr);
+
+/**
+ * @brief  LDR Exclusive
+ *
+ * @param  uint32_t* address
+ * @return uint32_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+extern uint32_t __LDREXW(uint32_t *addr);
+
+/**
+ * @brief  STR Exclusive
+ *
+ * @param  uint8_t *address
+ * @param  uint8_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+extern uint32_t __STREXB(uint8_t value, uint8_t *addr);
+
+/**
+ * @brief  STR Exclusive
+ *
+ * @param  uint16_t *address
+ * @param  uint16_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+extern uint32_t __STREXH(uint16_t value, uint16_t *addr);
+
+/**
+ * @brief  STR Exclusive
+ *
+ * @param  uint32_t *address
+ * @param  uint32_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+extern uint32_t __STREXW(uint32_t value, uint32_t *addr);
+
+
+/* intrinsic void __set_PRIMASK();                                    */
+/* intrinsic void __get_PRIMASK();                                    */
+/* intrinsic void __set_FAULTMASK();                                  */
+/* intrinsic void __get_FAULTMASK();                                  */
+/* intrinsic uint32_t __REV(uint32_t value);                          */
+/* intrinsic uint32_t __REVSH(uint32_t value);                        */
+/* intrinsic unsigned long __STREX(unsigned long, unsigned long);     */
+/* intrinsic unsigned long __LDREX(unsigned long *);                  */
+
+
+
+#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
+/* GNU gcc specific functions */
+
+static __INLINE void __NOP()                      { __ASM volatile ("nop"); }
+static __INLINE void __enable_irq()               { __ASM volatile ("cpsie i"); }
+static __INLINE void __disable_irq()              { __ASM volatile ("cpsid i"); }
+
+static __INLINE void __enable_fault_irq()         { __ASM volatile ("cpsie f"); }
+static __INLINE void __disable_fault_irq()        { __ASM volatile ("cpsid f"); }
+
+static __INLINE void __WFI()                      { __ASM volatile ("wfi");   }
+static __INLINE void __WFE()                      { __ASM volatile ("wfe");   }
+static __INLINE void __SEV()                      { __ASM volatile ("sev");   }
+static __INLINE void __ISB(void *arg)                   { __ASM volatile ("isb");   }
+static __INLINE void __DSB(void *arg)                   { __ASM volatile ("dsb");   }
+static __INLINE void __DMB(void *arg)                   { __ASM volatile ("dmb");   }
+static __INLINE void __CLREX()                    { __ASM volatile ("clrex"); }
+
+
+/**
+ * @brief  Return the Process Stack Pointer
+ *
+ * @param  none
+ * @return uint32_t ProcessStackPointer
+ *
+ * Return the actual process stack pointer
+ */
+extern uint32_t __get_PSP(void);
+
+/**
+ * @brief  Set the Process Stack Pointer
+ *
+ * @param  uint32_t Process Stack Pointer
+ * @return none
+ *
+ * Assign the value ProcessStackPointer to the MSP 
+ * (process stack pointer) Cortex processor register
+ */
+extern void __set_PSP(uint32_t topOfProcStack);
+
+/**
+ * @brief  Return the Main Stack Pointer
+ *
+ * @param  none
+ * @return uint32_t Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+extern uint32_t __get_MSP(void);
+
+/**
+ * @brief  Set the Main Stack Pointer
+ *
+ * @param  uint32_t Main Stack Pointer
+ * @return none
+ *
+ * Assign the value mainStackPointer to the MSP 
+ * (main stack pointer) Cortex processor register
+ */
+extern void __set_MSP(uint32_t topOfMainStack);
+
+/**
+ * @brief  Return the Base Priority value
+ *
+ * @param  none
+ * @return uint32_t BasePriority
+ *
+ * Return the content of the base priority register
+ */
+extern uint32_t __get_BASEPRI(void);
+
+/**
+ * @brief  Set the Base Priority value
+ *
+ * @param  uint32_t BasePriority
+ * @return none
+ *
+ * Set the base priority register
+ */
+extern void __set_BASEPRI(uint32_t basePri);
+
+/**
+ * @brief  Return the Priority Mask value
+ *
+ * @param  none
+ * @return uint32_t PriMask
+ *
+ * Return the state of the priority mask bit from the priority mask
+ * register
+ */
+extern uint32_t  __get_PRIMASK(void);
+
+/**
+ * @brief  Set the Priority Mask value
+ *
+ * @param  uint32_t PriMask
+ * @return none
+ *
+ * Set the priority mask bit in the priority mask register
+ */
+extern void __set_PRIMASK(uint32_t priMask);
+
+/**
+ * @brief  Return the Fault Mask value
+ *
+ * @param  none
+ * @return uint32_t FaultMask
+ *
+ * Return the content of the fault mask register
+ */
+extern uint32_t __get_FAULTMASK(void);
+
+/**
+ * @brief  Set the Fault Mask value
+ *
+ * @param  uint32_t faultMask value
+ * @return none
+ *
+ * Set the fault mask register
+ */
+extern void __set_FAULTMASK(uint32_t faultMask);
+
+/**
+ * @brief  Return the Control Register value
+* 
+*  @param  none
+*  @return uint32_t Control value
+ *
+ * Return the content of the control register
+ */
+extern uint32_t __get_CONTROL(void);
+
+/**
+ * @brief  Set the Control Register value
+ *
+ * @param  uint32_t Control value
+ * @return none
+ *
+ * Set the control register
+ */
+extern void __set_CONTROL(uint32_t control);
+
+/**
+ * @brief  Reverse byte order in integer value
+ *
+ * @param  uint32_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse byte order in integer value
+ */
+extern uint32_t __REV(uint32_t value);
+
+/**
+ * @brief  Reverse byte order in unsigned short value
+ *
+ * @param  uint16_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse byte order in unsigned short value
+ */
+extern uint32_t __REV16(uint16_t value);
+
+/*
+ * Reverse byte order in signed short value with sign extension to integer
+ *
+ * @param  int16_t value to reverse
+ * @return int32_t reversed value
+ *
+ * @brief  Reverse byte order in signed short value with sign extension to integer
+ */
+extern int32_t __REVSH(int16_t value);
+
+/**
+ * @brief  Reverse bit order of value
+ *
+ * @param  uint32_t value to reverse
+ * @return uint32_t reversed value
+ *
+ * Reverse bit order of value
+ */
+extern uint32_t __RBIT(uint32_t value);
+
+/**
+ * @brief  LDR Exclusive
+ *
+ * @param  uint8_t* address
+ * @return uint8_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+extern uint8_t __LDREXB(uint8_t *addr);
+
+/**
+ * @brief  LDR Exclusive
+ *
+ * @param  uint16_t* address
+ * @return uint16_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+extern uint16_t __LDREXH(uint16_t *addr);
+
+/**
+ * @brief  LDR Exclusive
+ *
+ * @param  uint32_t* address
+ * @return uint32_t value of (*address)
+ *
+ * Exclusive LDR command
+ */
+extern uint32_t __LDREXW(uint32_t *addr);
+
+/**
+ * @brief  STR Exclusive
+ *
+ * @param  uint8_t *address
+ * @param  uint8_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+extern uint32_t __STREXB(uint8_t value, uint8_t *addr);
+
+/**
+ * @brief  STR Exclusive
+ *
+ * @param  uint16_t *address
+ * @param  uint16_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+extern uint32_t __STREXH(uint16_t value, uint16_t *addr);
+
+/**
+ * @brief  STR Exclusive
+ *
+ * @param  uint32_t *address
+ * @param  uint32_t value to store
+ * @return uint32_t successful / failed
+ *
+ * Exclusive STR command
+ */
+extern uint32_t __STREXW(uint32_t value, uint32_t *addr);
+
+
+#endif
+
+
+
+/* ##########################   NVIC functions  #################################### */
+
+/**
+ * @brief  Set the Priority Grouping in NVIC Interrupt Controller
+ *
+ * @param  uint32_t priority_grouping is priority grouping field
+ * @return  
+ *
+ * Set the priority grouping field using the required unlock sequence.
+ * The parameter priority_grouping is assigned to the field 
+ * SCB->AIRCR [10:8] PRIGROUP field.
+ */
+static __INLINE void NVIC_SetPriorityGrouping(uint32_t priority_grouping)
+{
+  uint32_t reg_value=0;
+  
+  reg_value  = SCB->AIRCR;                                                                            /* read old register configuration    */
+  reg_value &= ~((0xFFFFU << 16) | (0x0F << 8));                                                      /* clear bits to change               */
+  reg_value  = ((reg_value | NVIC_AIRCR_VECTKEY | (priority_grouping << 8)));                         /* Insert write key and priorty group */
+  SCB->AIRCR = reg_value;
+}
+
+/**
+ * @brief  Enable Interrupt in NVIC Interrupt Controller
+ *
+ * @param  IRQn_Type IRQn specifies the interrupt number
+ * @return none 
+ *
+ * Enable a device specific interupt in the NVIC interrupt controller.
+ * The interrupt number cannot be a negative value.
+ */
+static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));                             /* enable interrupt */
+}
+
+/**
+ * @brief  Disable the interrupt line for external interrupt specified
+ * 
+ * @param  IRQn_Type IRQn is the positive number of the external interrupt
+ * @return  none
+ * 
+ * Disable a device specific interupt in the NVIC interrupt controller.
+ * The interrupt number cannot be a negative value.
+ */
+static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));                             /* disable interrupt */
+}
+
+/**
+ * @brief  Read the interrupt pending bit for a device specific interrupt source
+ * 
+ * @param  IRQn_Type IRQn is the number of the device specifc interrupt
+ * @return IRQn_Type Number of pending interrupt or zero
+ *
+ * Read the pending register in NVIC and return the number of the
+ * specified interrupt if its status is pending, otherwise it returns 
+ * zero. The interrupt number cannot be a negative value.
+ */
+static __INLINE IRQn_Type NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  return((IRQn_Type) (NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F))));         /* Return Interrupt bit or 'zero' */
+}
+
+/**
+ * @brief  Set the pending bit for an external interrupt
+ * 
+ * @param  IRQn_Type IRQn is the Number of the interrupt
+ * @return  none
+ *
+ * Set the pending bit for the specified interrupt.
+ * The interrupt number cannot be a negative value.
+ */
+static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));                             /* set interrupt pending */
+}
+
+/**
+ * @brief  Clear the pending bit for an external interrupt
+ *
+ * @param  IRQn_Type IRQn is the Number of the interrupt
+ * @return  none
+ *
+ * Clear the pending bit for the specified interrupt. 
+ * The interrupt number cannot be a negative value.
+ */
+static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));                             /* Clear pending interrupt */
+}
+
+/**
+ * @brief  Read the active bit for an external interrupt
+ *
+ * @param  IRQn_Type IRQn is the Number of the interrupt
+ * @return IRQn_Type Number of pending interrupt or zero
+ *
+ * Read the active register in NVIC and returns the number of the
+ * specified interrupt if its status is active, otherwise it 
+ * returns zero. The interrupt number cannot be a negative value.
+ */
+static __INLINE IRQn_Type NVIC_GetActive(IRQn_Type IRQn)
+{
+  return((IRQn_Type)(NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F))));                        /* Return Interruptnumber or 'zero' */
+}
+
+/**
+ * @brief  Set the priority for an interrupt
+ *
+ * @param  IRQn_Type IRQn is the Number of the interrupt
+ * @param  priority is the priority for the interrupt
+ * @return  none
+ *
+ * Set the priority for the specified interrupt. The interrupt 
+ * number can be positive to specify an external (device specific) 
+ * interrupt, or negative to specify an internal (core) interrupt. \n
+ *
+ * Note: The priority cannot be set for every core interrupt.
+ */
+static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, int32_t priority)
+{
+  if(IRQn < 0) {
+    SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); }  /* set Priority for Cortex-M3 System Interrupts */
+  else {
+    //NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff);    }         /* set Priority for device specific Interrupts      */
+    NVIC->IP[(uint32_t)(IRQn)] = (priority & 0xff);    }         /* set Priority for device specific Interrupts      */
+}
+
+/**
+ * @brief  Read the priority for an interrupt
+ *
+ * @param  IRQn_Type IRQn is the Number of the interrupt
+ * @return priority is the priority for the interrupt
+ *
+ * Read the priority for the specified interrupt. The interrupt 
+ * number can be positive to specify an external (device specific) 
+ * interrupt, or negative to specify an internal (core) interrupt.
+ *
+ * The returned priority value is automatically aligned to the implemented
+ * priority bits of the microcontroller.
+ *
+ * Note: The priority cannot be set for every core interrupt.
+ */
+static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if(IRQn < 0) {
+    return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS)));  }              /* get priority for Cortex-M3 system interrupts   */
+  else {
+    return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)]           >> (8 - __NVIC_PRIO_BITS)));  }              /* get priority for device specific interrupts    */
+}
+
+
+
+/* ##################################    SysTick function  ############################################ */
+
+#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0)
+
+/* SysTick constants */
+#define SYSTICK_ENABLE              0                                          /* Config-Bit to start or stop the SysTick Timer                         */
+#define SYSTICK_TICKINT             1                                          /* Config-Bit to enable or disable the SysTick interrupt                 */
+#define SYSTICK_CLKSOURCE           2                                          /* Clocksource has the offset 2 in SysTick Control and Status Register   */
+#define SYSTICK_MAXCOUNT       ((1<<24) -1)                                    /* SysTick MaxCount                                                      */
+
+/**
+ * @brief  Initialize and start the SysTick counter and its interrupt.
+ *
+ * @param  uint32_t ticks is the number of ticks between two interrupts
+ * @return  none
+ *
+ * Initialise the system tick timer and its interrupt and start the
+ * system tick timer / counter in free running mode to generate 
+ * periodical interrupts.
+ */
+static __INLINE uint32_t SysTick_Config(uint32_t ticks)
+{ 
+  if (ticks > SYSTICK_MAXCOUNT)  return (1);                                                /* Reload value impossible */
+
+  SysTick->LOAD  =  (ticks & SYSTICK_MAXCOUNT) - 1;                                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);                               /* set Priority for Cortex-M0 System Interrupts */
+  SysTick->VAL   =  (0x00);                                                                 /* Load the SysTick Counter Value */
+  SysTick->CTRL = (1 << SYSTICK_CLKSOURCE) | (1<<SYSTICK_ENABLE) | (1<<SYSTICK_TICKINT);    /* Enable SysTick IRQ and SysTick Timer */
+  return (0);                                                                               /* Function successful */
+}
+
+#endif
+
+
+
+
+
+/* ##################################    Reset function  ############################################ */
+
+/**
+ * @brief  Initiate a system reset request.
+ *
+ * @param   none
+ * @return  none
+ *
+ * Initialize a system reset request to reset the MCU
+ */
+static __INLINE void NVIC_SystemReset(void)
+{
+  SCB->AIRCR  = (NVIC_AIRCR_VECTKEY | (SCB->AIRCR & (0x700)) | (1<<NVIC_SYSRESETREQ));      /* Keep priority group unchanged */
+}
+
+
+/* ##################################    Debug Output  function  ############################################ */
+
+
+/**
+ * @brief  Outputs a character via the ITM channel 0
+ *
+ * @param   uint32_t character to output
+ * @return  uint32_t input character
+ *
+ * The function outputs a character via the ITM channel 0. 
+ * The function returns when no debugger is connected that has booked the output.  
+ * It is blocking when a debugger is connected, but the previous character send is not transmitted. 
+ */
+static __INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if(ch == '\n') ITM_SendChar('\r');
+  
+  if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA)  &&
+      (ITM->TCR & ITM_TCR_ITMENA)                  &&
+      (ITM->TER & (1UL << 0))  ) 
+  {
+    while (ITM->PORT[0].u32 == 0);
+    ITM->PORT[0].u8 = (uint8_t) ch;
+  }  
+  return (ch);
+}
+
+#endif
+
+/*lint -restore */
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/dbgu/dbgu.c b/tos/chips/cortex/m3/sam3/u/usb/peripherals/dbgu/dbgu.c
new file mode 100644
index 00000000..3fe6551c
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/dbgu/dbgu.c
@@ -0,0 +1,122 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "dbgu.h"
+#include <board.h>
+
+//------------------------------------------------------------------------------
+//         Global functions
+//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
+/// Initializes the DBGU with the given parameters, and enables both the
+/// transmitter and the receiver. The mode parameter contains the value of the
+/// DBGU_MR register.
+/// Value DBGU_STANDARD can be used for mode to get the most common configuration
+/// (i.e. aysnchronous, 8bits, no parity, 1 stop bit, no flow control).
+/// \param mode  Operating mode to configure.
+/// \param baudrate  Desired baudrate (e.g. 115200).
+/// \param mck  Frequency of the system master clock in Hz.
+//------------------------------------------------------------------------------
+void DBGU_Configure(
+    unsigned int mode,
+    unsigned int baudrate,
+    unsigned int mck)
+{
+    #if defined(cortexm3)
+    // Enable clock for UART
+    AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_DBGU);
+    #endif
+
+    // Reset & disable receiver and transmitter, disable interrupts
+    AT91C_BASE_DBGU->DBGU_CR = AT91C_US_RSTRX | AT91C_US_RSTTX;
+    AT91C_BASE_DBGU->DBGU_IDR = 0xFFFFFFFF;
+    
+    // Configure baud rate
+    AT91C_BASE_DBGU->DBGU_BRGR = mck / (baudrate * 16);
+    
+    // Configure mode register
+    AT91C_BASE_DBGU->DBGU_MR = mode;
+    
+    // Disable DMA channel
+    AT91C_BASE_DBGU->DBGU_PTCR = AT91C_PDC_RXTDIS | AT91C_PDC_TXTDIS;
+
+    // Enable receiver and transmitter
+    AT91C_BASE_DBGU->DBGU_CR = AT91C_US_RXEN | AT91C_US_TXEN;
+}
+
+//------------------------------------------------------------------------------
+/// Outputs a character on the DBGU line.
+/// \note This function is synchronous (i.e. uses polling).
+/// \param c  Character to send.
+//------------------------------------------------------------------------------
+void DBGU_PutChar(unsigned char c)
+{
+    // Wait for the transmitter to be ready
+    while ((AT91C_BASE_DBGU->DBGU_CSR & AT91C_US_TXEMPTY) == 0);
+    
+    // Send character
+    AT91C_BASE_DBGU->DBGU_THR = c;
+    
+    // Wait for the transfer to complete
+    while ((AT91C_BASE_DBGU->DBGU_CSR & AT91C_US_TXEMPTY) == 0);
+}
+
+//------------------------------------------------------------------------------
+/// Return 1 if a character can be read in DBGU
+//------------------------------------------------------------------------------
+unsigned int DBGU_IsRxReady()
+{
+    return (AT91C_BASE_DBGU->DBGU_CSR & AT91C_US_RXRDY);
+}
+
+//------------------------------------------------------------------------------
+/// Reads and returns a character from the DBGU.
+/// \note This function is synchronous (i.e. uses polling).
+/// \return Character received.
+//------------------------------------------------------------------------------
+unsigned char DBGU_GetChar(void)
+{
+    while ((AT91C_BASE_DBGU->DBGU_CSR & AT91C_US_RXRDY) == 0);
+    return AT91C_BASE_DBGU->DBGU_RHR;
+}
+
+
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/dbgu/dbgu.h b/tos/chips/cortex/m3/sam3/u/usb/peripherals/dbgu/dbgu.h
new file mode 100644
index 00000000..f7610b2a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/dbgu/dbgu.h
@@ -0,0 +1,87 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !Purpose
+/// 
+/// This module provides definitions and functions for using the Debug Unit
+/// (DBGU).
+///
+/// It also overloads the fputc(), fputs() & putchar() functions so the printf()
+/// method outputs its data on the DBGU. This behavior can be suppressed by
+/// defining NOFPUT during compilation.
+///
+/// !Usage
+/// 
+/// -# Enable the DBGU pins (see pio & board.h).
+/// -# Configure the DBGU using DBGU_Configure with the desired operating mode.
+/// -# Send characters using DBGU_PutChar() or the printf() method.
+/// -# Receive characters using DBGU_GetChar().
+///
+/// \note Unless specified, all the functions defined here operate synchronously;
+/// i.e. they all wait the data is sent/received before returning.
+//------------------------------------------------------------------------------
+
+#ifndef DBGU_H
+#define DBGU_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+ 
+/// Standard operating mode (asynchronous, 8bit, no parity, 1 stop bit)
+#define DBGU_STANDARD           AT91C_US_PAR_NONE
+
+//------------------------------------------------------------------------------
+//         Global functions
+//------------------------------------------------------------------------------
+
+extern void DBGU_Configure(
+    unsigned int mode,
+    unsigned int baudrate,
+    unsigned int mck);
+
+extern unsigned char DBGU_GetChar(void);
+
+extern void DBGU_PutChar(unsigned char c);
+
+extern unsigned int DBGU_IsRxReady(void);
+
+#endif //#ifndef DBGU_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/irq/irq.h b/tos/chips/cortex/m3/sam3/u/usb/peripherals/irq/irq.h
new file mode 100644
index 00000000..ee11dfd3
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/irq/irq.h
@@ -0,0 +1,92 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !Purpose
+/// 
+/// Methods and definitions for configuring interrupts.
+/// 
+/// !Usage
+///
+/// -# Configure an interrupt source using IRQ_ConfigureIT
+/// -# Enable or disable interrupt generation of a particular source with
+///    IRQ_EnableIT and IRQ_DisableIT.
+///
+/// \note Most of the time, peripheral interrupts must be also configured
+/// inside the peripheral itself.
+//------------------------------------------------------------------------------
+
+#ifndef IRQ_H
+#define IRQ_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <board.h>
+#if defined(cortexm3)
+#include <cmsis/core_cm3.h>
+#endif
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+#if 0
+#if defined(cortexm3)
+#ifdef __NVIC_PRIO_BITS
+#undef __NVIC_PRIO_BITS
+#define __NVIC_PRIO_BITS           ((SCB->AIRCR & 0x700) >> 8) 
+#endif
+#endif
+#endif
+
+//------------------------------------------------------------------------------
+//         Global functions
+//------------------------------------------------------------------------------
+
+extern void IRQ_ConfigureIT(unsigned int source,
+                            unsigned int mode,         // mode for AIC, priority for NVIC
+                            void( *handler )( void )); // ISR
+
+extern void IRQ_EnableIT(unsigned int source);
+
+extern void IRQ_DisableIT(unsigned int source);
+
+#endif //#ifndef IRQ_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/irq/nvic.c b/tos/chips/cortex/m3/sam3/u/usb/peripherals/irq/nvic.c
new file mode 100644
index 00000000..a2b1d7bc
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/irq/nvic.c
@@ -0,0 +1,152 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "board.h"
+#include "irq.h"
+#include "exceptions.h"
+#include <utility/trace.h>
+
+/// The index of IRQ handler in the exception table
+#define NVIC_IRQ_HANDLER_INDEX     16
+
+//------------------------------------------------------------------------------
+//         Global functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Configures an interrupt in the NVIC. The interrupt is identified by its
+/// source (AT91C_ID_xxx) and is configured to a specified priority and
+/// interrupt handler function. priority is the value that will be put in NVIC_IPRx
+/// and the function address will be set in "ExceptionTable". The parameter priority
+/// will include the preemptionPriority and the subPriority, where the subPriority
+/// defined in the B[7:0] of the parameter "priority", and the preemptionPriority defined
+/// in the B[15:8] of the parameter "priority". 
+/// The interrupt is disabled before configuration, so it is useless
+/// to do it before calling this function. When NVIC_ConfigureIT returns, the
+/// interrupt will always be disabled and cleared; it must be enabled by a
+/// call to NVIC_EnableIT().
+/// \param source               Interrupt source to configure.
+/// \param priority              Pre-emption priority (B[15:8] )+ subPriority (B[7:0])
+/// \param handler              Interrupt handler function.
+//------------------------------------------------------------------------------
+void IRQ_ConfigureIT(
+    unsigned int source,
+    //unsigned int preemptionPriority,
+    //unsigned int subPriority,
+    unsigned int priority,
+    IntFunc handler)
+{
+    unsigned int priGroup = __NVIC_PRIO_BITS;
+    unsigned int nPre = 8 - priGroup;
+    unsigned int nSub = priGroup;
+    unsigned int preemptionPriority;
+    unsigned int subPriority;
+    unsigned int IRQpriority;
+
+    preemptionPriority = (priority & 0xff00) >> 8;
+    subPriority = (priority & 0xff);
+
+    // Disable the interrupt first
+    NVIC_DisableIRQ((IRQn_Type)source);
+
+    // Clear any pending status
+    NVIC_ClearPendingIRQ((IRQn_Type)source);
+
+    // Configure interrupt handler
+    //if (handler == 0) handler = IrqHandlerNotUsed;
+      //  GetExceptionTable()[NVIC_IRQ_HANDLER_INDEX + source] = handler;
+
+    if (subPriority >= (0x01 << nSub))
+      subPriority = (0x01 << nSub) - 1;
+    if (preemptionPriority >= (0x01 << nPre))
+      preemptionPriority = (0x01 << nPre) - 1;
+
+    IRQpriority = (subPriority | (preemptionPriority << nSub));
+    NVIC_SetPriority((IRQn_Type)source, IRQpriority);
+}
+
+//------------------------------------------------------------------------------
+/// Enables interrupt coming from the given (unique) source (AT91C_ID_xxx).
+/// \param source  Interrupt source to enable.
+//------------------------------------------------------------------------------
+void IRQ_EnableIT(unsigned int source)
+{
+    NVIC_EnableIRQ((IRQn_Type)source);
+}
+
+//------------------------------------------------------------------------------
+/// Disables interrupt coming from the given (unique) source (AT91C_ID_xxx).
+/// \param source  Interrupt source to disable.
+//------------------------------------------------------------------------------
+void IRQ_DisableIT(unsigned int source)
+{
+    NVIC_DisableIRQ((IRQn_Type)source);
+}
+
+//------------------------------------------------------------------------------
+/// Set interrupt pending bit from the given (unique) source (AT91C_ID_xxx).
+/// \param source  Interrupt source to set.
+//------------------------------------------------------------------------------
+void NVIC_SetPending(unsigned int source)
+{
+    NVIC_SetPendingIRQ((IRQn_Type)source);
+}
+
+//------------------------------------------------------------------------------
+/// Clear interrupt pending bit from the given (unique) source (AT91C_ID_xxx).
+/// \param source  Interrupt source to clear.
+//------------------------------------------------------------------------------
+void NVIC_ClrPending(unsigned int source)
+{
+    NVIC_ClearPendingIRQ((IRQn_Type)source);
+}
+
+#if !defined(USE_CMSIS_on)
+//------------------------------------------------------------------------------
+/// Use the Software Trigger Interrupt Register to pend an interrupt.
+/// \param source Interrupt source to trigger.
+//------------------------------------------------------------------------------
+void NVIC_Swi(unsigned int source)
+{
+    AT91C_BASE_NVIC->NVIC_STIR = source;
+}
+#endif
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio.c b/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio.c
new file mode 100644
index 00000000..720959aa
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio.c
@@ -0,0 +1,390 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "pio.h"
+#include <board.h>
+
+//------------------------------------------------------------------------------
+//         Local Functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Configures one or more pin(s) of a PIO controller as being controlled by
+/// peripheral A. Optionally, the corresponding internal pull-up(s) can be
+/// enabled.
+/// \param pio  Pointer to a PIO controller.
+/// \param mask  Bitmask of one or more pin(s) to configure.
+/// \param enablePullUp  Indicates if the pin(s) internal pull-up shall be
+///                      configured.
+//------------------------------------------------------------------------------
+static void PIO_SetPeripheralA(
+    AT91S_PIO *pio,
+    unsigned int mask,
+    unsigned char enablePullUp)
+{
+#if !defined(AT91C_PIOA_ASR)
+    unsigned int abmr;
+#endif
+
+    // Disable interrupts on the pin(s)
+    pio->PIO_IDR = mask;
+
+    // Enable the pull-up(s) if necessary
+    if (enablePullUp) {
+
+        pio->PIO_PPUER = mask;
+    }
+    else {
+
+        pio->PIO_PPUDR = mask;
+    }
+
+    // Configure pin
+#if defined(AT91C_PIOA_ASR)
+    pio->PIO_ASR = mask;
+#else
+    abmr = pio->PIO_ABSR;
+    pio->PIO_ABSR &= (~mask & abmr);
+#endif
+    pio->PIO_PDR = mask;
+}
+
+//------------------------------------------------------------------------------
+/// Configures one or more pin(s) of a PIO controller as being controlled by
+/// peripheral B. Optionally, the corresponding internal pull-up(s) can be
+/// enabled.
+/// \param pio  Pointer to a PIO controller.
+/// \param mask  Bitmask of one or more pin(s) to configure.
+/// \param enablePullUp  Indicates if the pin(s) internal pull-up shall be
+///                      configured.
+//------------------------------------------------------------------------------
+static void PIO_SetPeripheralB(
+    AT91S_PIO *pio,
+    unsigned int mask,
+    unsigned char enablePullUp)
+{
+#if !defined(AT91C_PIOA_BSR)
+    unsigned int abmr;
+#endif
+
+    // Disable interrupts on the pin(s)
+    pio->PIO_IDR = mask;
+
+    // Enable the pull-up(s) if necessary
+    if (enablePullUp) {
+
+        pio->PIO_PPUER = mask;
+    }
+    else {
+
+        pio->PIO_PPUDR = mask;
+    }
+
+    // Configure pin
+#if defined(AT91C_PIOA_BSR)
+    pio->PIO_BSR = mask;
+#else
+    abmr = pio->PIO_ABSR;
+    pio->PIO_ABSR = mask | abmr;
+#endif
+    pio->PIO_PDR = mask;
+}
+
+#if defined(AT91C_PIOA_IFDGSR) //Glitch or Debouncing filter selection supported
+//------------------------------------------------------------------------------
+/// Configures Glitch or Debouncing filter for input
+/// \param pio      Pointer to a PIO controller.
+/// \param mask   Bitmask for filter selection.
+///                     each of 32 bit field, 0 is Glitch, 1 is Debouncing
+/// \param clkDiv  Clock divider if Debouncing select, using the lowest 14 bits
+///                     common for all PIO line of selecting deboucing filter
+//------------------------------------------------------------------------------
+static void PIO_SetFilter(
+    AT91S_PIO *pio,
+    unsigned int filterSel,
+    unsigned int clkDiv)
+{
+    pio->PIO_DIFSR = filterSel;//set Debouncing, 0 bit field no effect
+    pio->PIO_SCIFSR = ~filterSel;//set Glitch, 0 bit field no effect
+
+    pio->PIO_SCDR = clkDiv & 0x3FFF;//the lowest 14 bits work
+}
+#endif
+
+//------------------------------------------------------------------------------
+/// Configures one or more pin(s) or a PIO controller as inputs. Optionally,
+/// the corresponding internal pull-up(s) and glitch filter(s) can be
+/// enabled.
+/// \param pio  Pointer to a PIO controller.
+/// \param mask  Bitmask indicating which pin(s) to configure as input(s).
+/// \param enablePullUp  Indicates if the internal pull-up(s) must be enabled.
+/// \param enableFilter  Indicates if the glitch filter(s) must be enabled.
+//------------------------------------------------------------------------------
+static void PIO_SetInput(
+    AT91S_PIO *pio,
+    unsigned int mask,
+    unsigned char enablePullUp,
+    unsigned char enableFilter)
+{
+    // Disable interrupts
+    pio->PIO_IDR = mask;
+
+    // Enable pull-up(s) if necessary
+    if (enablePullUp) {
+    
+        pio->PIO_PPUER = mask;
+    }
+    else {
+    
+        pio->PIO_PPUDR = mask;
+    }
+
+    // Enable filter(s) if necessary
+    if (enableFilter) {
+    
+        pio->PIO_IFER = mask;
+    }
+    else {
+    
+        pio->PIO_IFDR = mask;
+    }
+
+    // Configure pin as input
+    pio->PIO_ODR = mask;
+    pio->PIO_PER = mask;
+}
+
+//------------------------------------------------------------------------------
+/// Configures one or more pin(s) of a PIO controller as outputs, with the
+/// given default value. Optionally, the multi-drive feature can be enabled
+/// on the pin(s).
+/// \param pio  Pointer to a PIO controller.
+/// \param mask  Bitmask indicating which pin(s) to configure.
+/// \param defaultValue  Default level on the pin(s).
+/// \param enableMultiDrive  Indicates if the pin(s) shall be configured as
+///                          open-drain.
+/// \param enablePullUp  Indicates if the pin shall have its pull-up activated.
+//------------------------------------------------------------------------------
+static void PIO_SetOutput(
+    AT91S_PIO *pio,
+    unsigned int mask,
+    unsigned char defaultValue,
+    unsigned char enableMultiDrive,
+    unsigned char enablePullUp)
+{
+    // Disable interrupts
+    pio->PIO_IDR = mask;
+
+    // Enable pull-up(s) if necessary
+    if (enablePullUp) {
+    
+        pio->PIO_PPUER = mask;
+    }
+    else {
+    
+        pio->PIO_PPUDR = mask;
+    }
+
+    // Enable multi-drive if necessary
+    if (enableMultiDrive) {
+    
+        pio->PIO_MDER = mask;
+    }
+    else {
+    
+        pio->PIO_MDDR = mask;
+    }
+
+    // Set default value
+    if (defaultValue) {
+
+        pio->PIO_SODR = mask;
+    }
+    else {
+
+        pio->PIO_CODR = mask;
+    }
+
+    // Configure pin(s) as output(s)
+    pio->PIO_OER = mask;
+    pio->PIO_PER = mask;
+}
+
+//------------------------------------------------------------------------------
+//         Global Functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Configures a list of Pin instances, each of which can either hold a single
+/// pin or a group of pins, depending on the mask value; all pins are configured
+/// by this function. The size of the array must also be provided and is easily
+/// computed using PIO_LISTSIZE whenever its length is not known in advance.
+/// \param list  Pointer to a list of Pin instances.
+/// \param size  Size of the Pin list (calculated using PIO_LISTSIZE).
+/// \return 1 if the pins have been configured properly; otherwise 0.
+//------------------------------------------------------------------------------
+unsigned char PIO_Configure(const Pin *list, unsigned int size)
+{
+    // Configure pins
+    while (size > 0) {
+    
+        switch (list->type) {
+    
+            case PIO_PERIPH_A:
+                PIO_SetPeripheralA(list->pio,
+                                   list->mask,
+                                   (list->attribute & PIO_PULLUP) ? 1 : 0);
+                break;
+    
+            case PIO_PERIPH_B:
+                PIO_SetPeripheralB(list->pio,
+                                   list->mask,
+                                   (list->attribute & PIO_PULLUP) ? 1 : 0);
+                break;
+    
+            case PIO_INPUT:
+                AT91C_BASE_PMC->PMC_PCER = 1 << list->id;
+                PIO_SetInput(list->pio,
+                             list->mask,
+                             (list->attribute & PIO_PULLUP) ? 1 : 0,
+                             (list->attribute & PIO_DEGLITCH)? 1 : 0);
+
+                #if defined(AT91C_PIOA_IFDGSR) //PIO3 with Glitch or Debouncing selection
+                //if glitch input filter enabled, set it
+                if(list->attribute & PIO_DEGLITCH)//Glitch input filter enabled
+                    PIO_SetFilter(list->pio,
+                        list->inFilter.filterSel,
+                        list->inFilter.clkDivider);
+                #endif
+                break;
+    
+            case PIO_OUTPUT_0:
+            case PIO_OUTPUT_1:
+                PIO_SetOutput(list->pio,
+                              list->mask,
+                              (list->type == PIO_OUTPUT_1),
+                              (list->attribute & PIO_OPENDRAIN) ? 1 : 0,
+                              (list->attribute & PIO_PULLUP) ? 1 : 0);
+                break;
+    
+            default: return 0;
+        }
+
+        list++;
+        size--;
+    }
+
+    return 1;
+}
+
+//------------------------------------------------------------------------------
+/// Sets a high output level on all the PIOs defined in the given Pin instance.
+/// This has no immediate effects on PIOs that are not output, but the PIO
+/// controller will memorize the value they are changed to outputs.
+/// \param pin  Pointer to a Pin instance describing one or more pins.
+//------------------------------------------------------------------------------
+void PIO_Set(const Pin *pin)
+{
+    pin->pio->PIO_SODR = pin->mask;
+}
+
+//------------------------------------------------------------------------------
+/// Sets a low output level on all the PIOs defined in the given Pin instance.
+/// This has no immediate effects on PIOs that are not output, but the PIO
+/// controller will memorize the value they are changed to outputs.
+/// \param pin  Pointer to a Pin instance describing one or more pins.
+//------------------------------------------------------------------------------
+void PIO_Clear(const Pin *pin)
+{
+    pin->pio->PIO_CODR = pin->mask;
+}
+
+//------------------------------------------------------------------------------
+/// Returns 1 if one or more PIO of the given Pin instance currently have a high
+/// level; otherwise returns 0. This method returns the actual value that is
+/// being read on the pin. To return the supposed output value of a pin, use
+/// PIO_GetOutputDataStatus() instead.
+/// \param pin  Pointer to a Pin instance describing one or more pins.
+/// \return 1 if the Pin instance contains at least one PIO that currently has
+/// a high level; otherwise 0.
+//------------------------------------------------------------------------------
+unsigned char PIO_Get(const Pin *pin)
+{
+    unsigned int reg;
+    if ((pin->type == PIO_OUTPUT_0) || (pin->type == PIO_OUTPUT_1)) {
+
+        reg = pin->pio->PIO_ODSR;
+    }
+    else {
+
+        reg = pin->pio->PIO_PDSR;
+    }
+
+    if ((reg & pin->mask) == 0) {
+
+        return 0;
+    }
+    else {
+
+        return 1;
+    }
+}
+
+
+//------------------------------------------------------------------------------
+/// Returns 1 if one or more PIO of the given Pin are configured to output a
+/// high level (even if they are not output).
+/// To get the actual value of the pin, use PIO_Get() instead.
+/// \param pin  Pointer to a Pin instance describing one or more pins.
+/// \return 1 if the Pin instance contains at least one PIO that is configured
+/// to output a high level; otherwise 0.
+//------------------------------------------------------------------------------
+unsigned char PIO_GetOutputDataStatus(const Pin *pin)
+{
+    if ((pin->pio->PIO_ODSR & pin->mask) == 0) {
+
+        return 0;
+    }
+    else {
+
+        return 1;
+    }
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio.h b/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio.h
new file mode 100644
index 00000000..323c0b81
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio.h
@@ -0,0 +1,233 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !!!Purpose
+/// 
+/// This file provides a basic API for PIO configuration and usage of
+/// user-controlled pins. Please refer to the board.h file for a list of
+/// available pin definitions.
+/// 
+/// !!!Usage
+/// 
+/// -# Define a constant pin description array such as the following one, using
+///    the existing definitions provided by the board.h file if possible:
+///    \code
+///       const Pin pPins[] = {PIN_USART0_TXD, PIN_USART0_RXD};
+///    \endcode
+///    Alternatively, it is possible to add new pins by provided the full Pin
+///    structure:
+///    \code
+///    // Pin instance to configure PA10 & PA11 as inputs with the internal
+///    // pull-up enabled.
+///    const Pin pPins = {
+///         (1 << 10) | (1 << 11),
+///         AT91C_BASE_PIOA,
+///         AT91C_ID_PIOA,
+///         PIO_INPUT,
+///         PIO_PULLUP
+///    };
+///    \endcode
+/// -# Configure a pin array by calling PIO_Configure() with a pointer to the
+///    array and its size (which is computed using the PIO_LISTSIZE macro).
+/// -# Change and get the value of a user-controlled pin using the PIO_Set,
+///    PIO_Clear and PIO_Get methods.
+/// -# Get the level being currently output by a user-controlled pin configured
+///    as an output using PIO_GetOutputDataStatus().
+//------------------------------------------------------------------------------
+ 
+#ifndef PIO_H
+#define PIO_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <board.h>
+
+//------------------------------------------------------------------------------
+//         Global Definitions
+//------------------------------------------------------------------------------
+
+/// The pin is controlled by the associated signal of peripheral A.
+#define PIO_PERIPH_A                0
+/// The pin is controlled by the associated signal of peripheral B.
+#define PIO_PERIPH_B                1
+/// The pin is an input.
+#define PIO_INPUT                   2
+/// The pin is an output and has a default level of 0.
+#define PIO_OUTPUT_0                3
+/// The pin is an output and has a default level of 1.
+#define PIO_OUTPUT_1                4
+
+/// Default pin configuration (no attribute).
+#define PIO_DEFAULT                 (0 << 0)
+/// The internal pin pull-up is active.
+#define PIO_PULLUP                  (1 << 0)
+/// The internal glitch filter is active.
+#define PIO_DEGLITCH                (1 << 1)
+/// The pin is open-drain.
+#define PIO_OPENDRAIN               (1 << 2)
+
+//------------------------------------------------------------------------------
+//         Global Macros
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Calculates the size of an array of Pin instances. The array must be defined
+/// locally (i.e. not a pointer), otherwise the computation will not be correct.
+/// \param pPins  Local array of Pin instances.
+/// \return Number of elements in array.
+//------------------------------------------------------------------------------
+#define PIO_LISTSIZE(pPins)    (sizeof(pPins) / sizeof(Pin))
+
+//------------------------------------------------------------------------------
+//         Global Types
+//------------------------------------------------------------------------------
+typedef struct _ExtIntMode {
+  ///indicate which pin to enable/disable additional Interrupt mode
+  ///each of 32 bit field represents one PIO line.
+  unsigned int itMask;
+  ///select Edge or level interrupt detection source
+  ///each of 32 bit field represents one PIO line, 0 is Edge, 1 is Level
+  unsigned int edgeLvlSel;
+  ///select rising/high or falling/low detection event
+  ///each of 32 bit field represents one PIO line:
+  ///0 is Falling Edge detection event (if selected Edge interrupt 
+  ///   detection source, or Low Level detection (if selected
+  ///   Level interrupt detection source;
+  ///1 is Rising Edge detection(if selected Edge interrupt 
+  ///   source, or Low Level detection event(if selected Level
+  ///   interrupt detection source.
+  unsigned int lowFallOrRiseHighSel;
+
+} ExtIntMode;
+
+typedef struct _GlitchDeBounceFilter {
+  ///Select Glitch/Debounce filtering for PIO input
+  ///each of 32 bit field represents one PIO line
+  ///0 is Glitch, 1 is Debouncing
+  unsigned int filterSel;
+  ///slow clock divider selection for Debouncing filter
+  unsigned int clkDivider:14;
+
+} GlitchDebounceFilter;
+
+//------------------------------------------------------------------------------
+/// Describes the type and attribute of one PIO pin or a group of similar pins.
+/// The #type# field can have the following values:
+///    - PIO_PERIPH_A
+///    - PIO_PERIPH_B
+///    - PIO_OUTPUT_0
+///    - PIO_OUTPUT_1
+///    - PIO_INPUT
+///
+/// The #attribute# field is a bitmask that can either be set to PIO_DEFAULt,
+/// or combine (using bitwise OR '|') any number of the following constants:
+///    - PIO_PULLUP
+///    - PIO_DEGLITCH
+///    - PIO_OPENDRAIN
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// Bitmask indicating which pin(s) to configure.
+    unsigned int mask; 
+    /// Pointer to the PIO controller which has the pin(s).
+    AT91S_PIO    *pio;
+    /// Peripheral ID of the PIO controller which has the pin(s).
+    unsigned char id;
+    /// Pin type.
+    unsigned char type;
+    /// Pin attribute.
+    unsigned char attribute;
+#if defined(AT91C_PIOA_AIMMR)
+    ///Additional Interrupt Mode
+    ExtIntMode itMode;
+#endif
+
+#if defined(AT91C_PIOA_IFDGSR)
+    ///Glitch/Debouncing filter
+    GlitchDebounceFilter inFilter;
+#endif
+
+} Pin;
+
+//------------------------------------------------------------------------------
+//         Global Access Macros 
+//------------------------------------------------------------------------------
+
+//Get Glitch input filter enable/disable status
+#define PIO_GetIFSR(pPin)	((pPin)->pio->PIO_IFSR)
+
+//Get Glitch/Deboucing selection status
+#define PIO_GetIFDGSR(pPin) ((pPin)->pio->PIO_IFDGSR)
+
+//Get Additional PIO interrupt mode mask status
+#define PIO_GetAIMMR(pPin)  ((pPin)->pio->PIO_AIMMR)
+
+//Get Interrupt status
+#define PIO_GetISR(pPin)	((pPin)->pio->PIO_ISR)
+
+//Get Edge or Level selection status
+#define PIO_GetELSR(pPin)	((pPin)->pio->PIO_ELSR)
+
+//Get Fall/Rise or Low/High selection status
+#define PIO_GetFRLHSR(pPin)	((pPin)->pio->PIO_FRLHSR)
+
+//Get PIO Lock Status
+#define PIO_GetLockStatus(pPin) ((pPin)->pio->PIO_LOCKSR)
+
+//------------------------------------------------------------------------------
+//         Global Functions
+//------------------------------------------------------------------------------
+
+extern unsigned char PIO_Configure(const Pin *list, unsigned int size);
+
+extern void PIO_Set(const Pin *pin);
+
+extern void PIO_Clear(const Pin *pin);
+
+extern unsigned char PIO_Get(const Pin *pin);
+
+//extern unsigned int PIO_GetISR(const Pin *pin);
+
+extern unsigned char PIO_GetOutputDataStatus(const Pin *pin);
+
+#endif //#ifndef PIO_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio_it.c b/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio_it.c
new file mode 100644
index 00000000..7e89702d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio_it.c
@@ -0,0 +1,471 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/// Disable traces for this file
+#undef TRACE_LEVEL
+#define TRACE_LEVEL 0
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "pio_it.h"
+#include "pio.h"
+#include <board.h>
+#include <irq/irq.h>
+#include <utility/assert.h>
+#include <utility/trace.h>
+
+//------------------------------------------------------------------------------
+//         Local definitions
+//------------------------------------------------------------------------------
+
+/// \exclude
+/// Maximum number of interrupt sources that can be defined. This
+/// constant can be increased, but the current value is the smallest possible
+/// that will be compatible with all existing projects.
+#define MAX_INTERRUPT_SOURCES       7
+
+//------------------------------------------------------------------------------
+//         Local types
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \exclude
+/// Describes a PIO interrupt source, including the PIO instance triggering the
+/// interrupt and the associated interrupt handler.
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// Pointer to the source pin instance.
+    const Pin *pPin;
+
+    /// Interrupt handler.
+    void (*handler)(const Pin *);
+
+} InterruptSource;
+
+//------------------------------------------------------------------------------
+//         Local variables
+//------------------------------------------------------------------------------
+
+/// List of interrupt sources.
+static InterruptSource pSources[MAX_INTERRUPT_SOURCES];
+
+/// Number of currently defined interrupt sources.
+static unsigned int numSources;
+
+//------------------------------------------------------------------------------
+//         Local functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Handles all interrupts on the given PIO controller.
+/// \param id  PIO controller ID.
+/// \param pPio  PIO controller base address.
+//------------------------------------------------------------------------------
+static void PioInterruptHandler(unsigned int id, AT91S_PIO *pPio)
+{
+    unsigned int status;
+    unsigned int i;
+
+    // Read PIO controller status
+    status = pPio->PIO_ISR;
+    status &= pPio->PIO_IMR;
+
+    // Check pending events
+    if (status != 0) {
+
+        TRACE_DEBUG("PIO interrupt on PIO controller #%d\n\r", id);
+
+        // Find triggering source
+        i = 0;
+        while (status != 0) {
+
+            // There cannot be an unconfigured source enabled.
+            SANITY_CHECK(i < numSources);
+
+            // Source is configured on the same controller
+            if (pSources[i].pPin->id == id) {
+
+                // Source has PIOs whose statuses have changed
+                if ((status & pSources[i].pPin->mask) != 0) {
+
+                    TRACE_DEBUG("Interrupt source #%d triggered\n\r", i);
+
+                    pSources[i].handler(pSources[i].pPin);
+                    status &= ~(pSources[i].pPin->mask);
+                }
+            }
+            i++;
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Generic PIO interrupt handler. Single entry point for interrupts coming
+/// from any PIO controller (PIO A, B, C ...). Dispatches the interrupt to
+/// the user-configured handlers.
+//------------------------------------------------------------------------------
+void PIO_IT_InterruptHandler(void)
+{
+#if defined(AT91C_ID_PIOA)
+    // Treat PIOA interrupts
+    PioInterruptHandler(AT91C_ID_PIOA, AT91C_BASE_PIOA);
+#endif
+
+#if defined(AT91C_ID_PIOB)
+    // Treat PIOB interrupts
+    PioInterruptHandler(AT91C_ID_PIOB, AT91C_BASE_PIOB);
+#endif
+
+#if defined(AT91C_ID_PIOC)
+    // Treat PIOC interrupts
+    PioInterruptHandler(AT91C_ID_PIOC, AT91C_BASE_PIOC);
+#endif
+
+#if defined(AT91C_ID_PIOD)
+    // Treat PIOD interrupts
+    PioInterruptHandler(AT91C_ID_PIOD, AT91C_BASE_PIOD);
+#endif
+
+#if defined(AT91C_ID_PIOE)
+    // Treat PIOE interrupts
+    PioInterruptHandler(AT91C_ID_PIOE, AT91C_BASE_PIOE);
+#endif
+
+#if defined(AT91C_ID_PIOABCD)
+    // Treat PIOABCD interrupts
+    #if !defined(AT91C_ID_PIOA)
+        PioInterruptHandler(AT91C_ID_PIOABCD, AT91C_BASE_PIOA);
+    #endif
+    #if !defined(AT91C_ID_PIOB)
+        PioInterruptHandler(AT91C_ID_PIOABCD, AT91C_BASE_PIOB);
+    #endif
+    #if !defined(AT91C_ID_PIOC)
+        PioInterruptHandler(AT91C_ID_PIOABCD, AT91C_BASE_PIOC);
+    #endif
+    #if !defined(AT91C_ID_PIOD)
+        PioInterruptHandler(AT91C_ID_PIOABCD, AT91C_BASE_PIOD);
+    #endif
+#endif
+
+#if defined(AT91C_ID_PIOABCDE)
+    // Treat PIOABCDE interrupts
+    #if !defined(AT91C_ID_PIOA)
+        PioInterruptHandler(AT91C_ID_PIOABCDE, AT91C_BASE_PIOA);
+    #endif
+    #if !defined(AT91C_ID_PIOB)
+        PioInterruptHandler(AT91C_ID_PIOABCDE, AT91C_BASE_PIOB);
+    #endif
+    #if !defined(AT91C_ID_PIOC)
+        PioInterruptHandler(AT91C_ID_PIOABCDE, AT91C_BASE_PIOC);
+    #endif
+    #if !defined(AT91C_ID_PIOD)
+        PioInterruptHandler(AT91C_ID_PIOABCDE, AT91C_BASE_PIOD);
+    #endif
+    #if !defined(AT91C_ID_PIOE)
+        PioInterruptHandler(AT91C_ID_PIOABCDE, AT91C_BASE_PIOE);
+    #endif
+#endif
+
+#if defined(AT91C_ID_PIOCDE)
+    // Treat PIOCDE interrupts
+    #if !defined(AT91C_ID_PIOC)
+        PioInterruptHandler(AT91C_ID_PIOCDE, AT91C_BASE_PIOC);
+    #endif
+    #if !defined(AT91C_ID_PIOD)
+        PioInterruptHandler(AT91C_ID_PIOCDE, AT91C_BASE_PIOD);
+    #endif
+    #if !defined(AT91C_ID_PIOE)
+        PioInterruptHandler(AT91C_ID_PIOCDE, AT91C_BASE_PIOE);
+    #endif
+#endif
+}
+
+//------------------------------------------------------------------------------
+//         Global functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Initializes the PIO interrupt management logic. The desired priority of PIO
+/// interrupts must be provided. Calling this function multiple times result in
+/// the reset of currently configured interrupts.
+/// \param priority  PIO controller interrupts priority.
+//------------------------------------------------------------------------------
+void PIO_InitializeInterrupts(unsigned int priority)
+{
+    TRACE_DEBUG("PIO_Initialize()\n\r");
+
+//    SANITY_CHECK((priority & ~AT91C_AIC_PRIOR) == 0);
+
+    // Reset sources
+    numSources = 0;
+
+#ifdef AT91C_ID_PIOA
+    // Configure PIO interrupt sources
+    TRACE_DEBUG("PIO_Initialize: Configuring PIOA\n\r");
+    AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOA;
+    AT91C_BASE_PIOA->PIO_ISR;
+    AT91C_BASE_PIOA->PIO_IDR = 0xFFFFFFFF;
+    IRQ_ConfigureIT(AT91C_ID_PIOA, priority, PIO_IT_InterruptHandler);
+    IRQ_EnableIT(AT91C_ID_PIOA);
+#endif
+
+#ifdef AT91C_ID_PIOB
+    TRACE_DEBUG("PIO_Initialize: Configuring PIOB\n\r");
+    AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOB;
+    AT91C_BASE_PIOB->PIO_ISR;
+    AT91C_BASE_PIOB->PIO_IDR = 0xFFFFFFFF;
+    IRQ_ConfigureIT(AT91C_ID_PIOB, priority, PIO_IT_InterruptHandler);
+    IRQ_EnableIT(AT91C_ID_PIOB);
+#endif
+
+#ifdef AT91C_ID_PIOC
+    TRACE_DEBUG("PIO_Initialize: Configuring PIOC\n\r");
+    AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOC;
+    AT91C_BASE_PIOC->PIO_ISR;
+    AT91C_BASE_PIOC->PIO_IDR = 0xFFFFFFFF;
+    IRQ_ConfigureIT(AT91C_ID_PIOC, priority, PIO_IT_InterruptHandler);
+    IRQ_EnableIT(AT91C_ID_PIOC);
+#endif
+
+#ifdef AT91C_ID_PIOD
+    TRACE_DEBUG("PIO_Initialize: Configuring PIOD\n\r");
+    AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOD;
+    AT91C_BASE_PIOC->PIO_ISR;
+    AT91C_BASE_PIOC->PIO_IDR = 0xFFFFFFFF;
+    IRQ_ConfigureIT(AT91C_ID_PIOD, priority, PIO_IT_InterruptHandler);
+    IRQ_EnableIT(AT91C_ID_PIOD);
+#endif
+
+#ifdef AT91C_ID_PIOE
+    TRACE_DEBUG("PIO_Initialize: Configuring PIOE\n\r");
+    AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOE;
+    AT91C_BASE_PIOC->PIO_ISR;
+    AT91C_BASE_PIOC->PIO_IDR = 0xFFFFFFFF;
+    IRQ_ConfigureIT(AT91C_ID_PIOE, priority, PIO_IT_InterruptHandler);
+    IRQ_EnableIT(AT91C_ID_PIOE);
+#endif
+
+#if defined(AT91C_ID_PIOABCD)
+    // Treat PIOABCD interrupts
+    #if !defined(AT91C_ID_PIOA) \
+     && !defined(AT91C_ID_PIOB) \
+     && !defined(AT91C_ID_PIOC) \
+     && !defined(AT91C_ID_PIOD)
+
+        TRACE_DEBUG("PIO_Initialize: Configuring PIOABCD\n\r");
+        AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOABCD;
+        AT91C_BASE_PIOA->PIO_ISR;
+        AT91C_BASE_PIOA->PIO_IDR = 0xFFFFFFFF;
+        IRQ_ConfigureIT(AT91C_ID_PIOABCD, priority, PIO_IT_InterruptHandler);
+        IRQ_EnableIT(AT91C_ID_PIOABCD);
+    #endif
+#endif
+
+#if defined(AT91C_ID_PIOABCDE)
+    // Treat PIOABCDE interrupts
+    #if !defined(AT91C_ID_PIOA) \
+     && !defined(AT91C_ID_PIOB) \
+     && !defined(AT91C_ID_PIOC) \
+     && !defined(AT91C_ID_PIOD) \
+     && !defined(AT91C_ID_PIOE)
+
+        TRACE_DEBUG("PIO_Initialize: Configuring PIOABCDE\n\r");
+        AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOABCDE;
+        AT91C_BASE_PIOA->PIO_ISR;
+        AT91C_BASE_PIOA->PIO_IDR = 0xFFFFFFFF;
+        IRQ_ConfigureIT(AT91C_ID_PIOABCDE, priority, PIO_IT_InterruptHandler);
+        IRQ_EnableIT(AT91C_ID_PIOABCDE);
+    #endif
+#endif
+
+#if defined(AT91C_ID_PIOCDE)
+    // Treat PIOCDE interrupts
+    #if !defined(AT91C_ID_PIOC) \
+     && !defined(AT91C_ID_PIOD) \
+     && !defined(AT91C_ID_PIOE)
+
+        TRACE_DEBUG("PIO_Initialize: Configuring PIOC\n\r");
+        AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOCDE;
+        AT91C_BASE_PIOC->PIO_ISR;
+        AT91C_BASE_PIOC->PIO_IDR = 0xFFFFFFFF;
+        IRQ_ConfigureIT(AT91C_ID_PIOCDE, priority, PIO_IT_InterruptHandler);
+        IRQ_EnableIT(AT91C_ID_PIOCDE);
+    #endif
+#endif
+}
+
+//------------------------------------------------------------------------------
+/// Configures a PIO or a group of PIO to generate an interrupt on status
+/// change. The provided interrupt handler will be called with the triggering
+/// pin as its parameter (enabling different pin instances to share the same
+/// handler).
+/// \param pPin  Pointer to a Pin instance.
+/// \param handler  Interrupt handler function pointer.
+//------------------------------------------------------------------------------
+void PIO_ConfigureIt(const Pin *pPin, void (*handler)(const Pin *))
+{
+    InterruptSource *pSource;
+
+    TRACE_DEBUG("PIO_ConfigureIt()\n\r");
+
+    SANITY_CHECK(pPin);
+    ASSERT(numSources < MAX_INTERRUPT_SOURCES,
+           "-F- PIO_ConfigureIt: Increase MAX_INTERRUPT_SOURCES\n\r");
+
+    // Define new source
+    TRACE_DEBUG("PIO_ConfigureIt: Defining new source #%d.\n\r",  numSources);
+
+    pSource = &(pSources[numSources]);
+    pSource->pPin = pPin;
+    pSource->handler = handler;
+    numSources++;
+}
+
+//------------------------------------------------------------------------------
+/// Enables the given interrupt source if it has been configured. The status
+/// register of the corresponding PIO controller is cleared prior to enabling
+/// the interrupt.
+/// \param pPin  Interrupt source to enable.
+//------------------------------------------------------------------------------
+void PIO_EnableIt(const Pin *pPin)
+{
+    TRACE_DEBUG("PIO_EnableIt()\n\r");
+
+    SANITY_CHECK(pPin);
+
+#ifndef NOASSERT
+    {
+    unsigned int i = 0;
+    unsigned char found = 0;
+    while ((i < numSources) && !found) {
+
+        if (pSources[i].pPin == pPin) {
+
+            found = 1;
+        }
+        i++;
+    }
+    ASSERT(found, "-F- PIO_EnableIt: Interrupt source has not been configured\n\r");
+    }
+#endif
+
+    pPin->pio->PIO_ISR;
+    pPin->pio->PIO_IER = pPin->mask;
+    
+
+#if defined(AT91C_PIOA_AIMMR)
+    //PIO3 with additional interrupt support
+    //configure additional interrupt mode registers
+    if(pPin->mask&pPin->itMode.itMask) {
+   
+    //enable additional interrupt mode
+    pPin->pio->PIO_AIMER  = pPin->itMode.itMask;
+    
+    if(pPin->mask&pPin->itMode.edgeLvlSel)
+        //if bit field of selected pin is 1, set as Level detection source
+        pPin->pio->PIO_LSR = pPin->itMode.edgeLvlSel;
+    else
+        //if bit field of selected pin is 0, set as Edge detection source
+        pPin->pio->PIO_ESR = ~(pPin->itMode.edgeLvlSel);
+
+    if(pPin->mask&pPin->itMode.lowFallOrRiseHighSel)
+        //if bit field of selected pin is 1, set as Rising Edge/High level detection event
+        pPin->pio->PIO_REHLSR     = pPin->itMode.lowFallOrRiseHighSel;
+    else
+        //if bit field of selected pin is 0, set as Falling Edge/Low level detection event
+        pPin->pio->PIO_FELLSR     = ~(pPin->itMode.lowFallOrRiseHighSel);
+    }
+
+#endif
+}
+
+//------------------------------------------------------------------------------
+/// Disables a given interrupt source, with no added side effects.
+/// \param pPin  Interrupt source to disable.
+//------------------------------------------------------------------------------
+void PIO_DisableIt(const Pin *pPin)
+{
+    SANITY_CHECK(pPin);
+
+    TRACE_DEBUG("PIO_DisableIt()\n\r");
+
+    pPin->pio->PIO_IDR = pPin->mask;
+#if defined(AT91C_PIOA_AIMMR)
+    if(pPin->mask & pPin->itMode.itMask)
+        //disable additional interrupt mode
+        pPin->pio->PIO_AIMDR = pPin->mask & pPin->itMode.itMask;
+#endif
+
+}
+
+#if defined(cortexm3)
+////------------------------------------------------------------------------------
+///// Override cortex-m3's default PIOA irq handler
+////------------------------------------------------------------------------------
+//void PioAIrqHandler(void) @C() @spontaneous()
+//{
+//    #if defined(AT91C_ID_PIOA)
+//    // Treat PIOA interrupts
+//    PioInterruptHandler(AT91C_ID_PIOA, AT91C_BASE_PIOA);
+//    #endif
+//}
+//
+////------------------------------------------------------------------------------
+///// Override cortex-m3's default PIOB irq handler
+////------------------------------------------------------------------------------
+//void PioBIrqHandler(void) @C() @spontaneous()
+//{
+//    #if defined(AT91C_ID_PIOB)
+//    // Treat PIOA interrupts
+//    PioInterruptHandler(AT91C_ID_PIOB, AT91C_BASE_PIOB);
+//    #endif
+//}
+//
+////------------------------------------------------------------------------------
+///// Override cortex-m3's default PIOC irq handler
+////------------------------------------------------------------------------------
+//void PioCIrqHandler(void) @C() @spontaneous()
+//{
+//    #if defined(AT91C_ID_PIOC)
+//    // Treat PIOA interrupts
+//    PioInterruptHandler(AT91C_ID_PIOC, AT91C_BASE_PIOC);
+//    #endif
+//}
+#endif
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio_it.h b/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio_it.h
new file mode 100644
index 00000000..0870e233
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/pio/pio_it.h
@@ -0,0 +1,93 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !!!Purpose
+/// 
+/// Configuration and handling of interrupts on PIO status changes. The API
+/// provided here have several advantages over the traditional PIO interrupt
+/// configuration approach:
+///    - It is highly portable
+///    - It automatically demultiplexes interrupts when multiples pins have been
+///      configured on a single PIO controller
+///    - It allows a group of pins to share the same interrupt
+/// 
+/// However, it also has several minor drawbacks that may prevent from using it
+/// in particular applications:
+///    - It enables the clocks of all PIO controllers
+///    - PIO controllers all share the same interrupt handler, which does the
+///      demultiplexing and can be slower than direct configuration
+///    - It reserves space for a fixed number of interrupts, which can be
+///      increased by modifying the appropriate constant in pio_it.c.
+///
+/// !!!Usage
+/// 
+/// -# Initialize the PIO interrupt mechanism using PIO_InitializeInterrupts()
+///    with the desired priority (0 ... 7).
+/// -# Configure a status change interrupt on one or more pin(s) with
+///    PIO_ConfigureIt().
+/// -# Enable & disable interrupts on pins using PIO_EnableIt() and
+///    PIO_DisableIt().
+//------------------------------------------------------------------------------
+
+#ifndef PIO_IT_H
+#define PIO_IT_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "pio.h"
+
+//------------------------------------------------------------------------------
+//         Global functions
+//------------------------------------------------------------------------------
+
+extern void PIO_InitializeInterrupts(unsigned int priority);
+
+extern void PIO_ConfigureIt(const Pin *pPin, void (*handler)(const Pin *));
+
+extern void PIO_EnableIt(const Pin *pPin);
+
+extern void PIO_DisableIt(const Pin *pPin);
+
+extern void PIO_IT_InterruptHandler(void);
+
+#endif //#ifndef PIO_IT_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/pmc/pmc.c b/tos/chips/cortex/m3/sam3/u/usb/peripherals/pmc/pmc.c
new file mode 100644
index 00000000..3bb5fd6b
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/pmc/pmc.c
@@ -0,0 +1,196 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "pmc.h"
+#include <board.h>
+#include <utility/assert.h>
+#include <utility/trace.h>
+
+#ifdef CP15_PRESENT
+#include <cp15/cp15.h>
+#endif
+
+#define MASK_STATUS 0x3FFFFFFC
+
+//------------------------------------------------------------------------------
+//         Global functions
+//------------------------------------------------------------------------------
+
+#if defined(at91sam7l64) || defined(at91sam7l128)
+//------------------------------------------------------------------------------
+/// Sets the fast wake-up inputs that can get the device out of Wait mode.
+/// \param inputs  Fast wake-up inputs to enable.
+//------------------------------------------------------------------------------
+void PMC_SetFastWakeUpInputs(unsigned int inputs)
+{
+    SANITY_CHECK((inputs & ~0xFF) == 0);
+    AT91C_BASE_PMC->PMC_FSMR = inputs;
+}
+
+#if !defined(__ICCARM__)
+__attribute__ ((section (".ramfunc"))) // GCC
+#endif
+//------------------------------------------------------------------------------
+/// Disables the main oscillator, making the device enter Wait mode.
+//------------------------------------------------------------------------------
+void PMC_DisableMainOscillatorForWaitMode(void)
+{
+    AT91C_BASE_PMC->PMC_MOR = 0x37 << 16;
+    while ((AT91C_BASE_PMC->PMC_MOR & AT91C_PMC_MAINSELS) != AT91C_PMC_MAINSELS);
+}
+
+#endif
+
+#if defined(at91sam7l)
+//------------------------------------------------------------------------------
+/// Disables the main oscillator when NOT running on it.
+//------------------------------------------------------------------------------
+void PMC_DisableMainOscillator(void)
+{
+    AT91C_BASE_PMC->PMC_MOR = 0x37 << 16;
+    while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MAINSELS) == AT91C_PMC_MAINSELS);
+}
+#endif
+
+//------------------------------------------------------------------------------
+/// Disables the processor clock
+//------------------------------------------------------------------------------
+void PMC_DisableProcessorClock(void)
+{    
+    AT91C_BASE_PMC->PMC_SCDR = AT91C_PMC_PCK;   
+    while ((AT91C_BASE_PMC->PMC_SCSR & AT91C_PMC_PCK) != AT91C_PMC_PCK); 
+}
+
+//------------------------------------------------------------------------------
+/// Enables the clock of a peripheral. The peripheral ID (AT91C_ID_xxx) is used
+/// to identify which peripheral is targetted.
+/// Note that the ID must NOT be shifted (i.e. 1 << AT91C_ID_xxx).
+/// \param id  Peripheral ID (AT91C_ID_xxx).
+//------------------------------------------------------------------------------
+void PMC_EnablePeripheral(unsigned int id)
+{
+    SANITY_CHECK(id < 32);
+
+    if ((AT91C_BASE_PMC->PMC_PCSR & (1 << id)) == (1 << id)) {
+
+        TRACE_INFO("PMC_EnablePeripheral: clock of peripheral"
+                   " %u is already enabled\n\r",
+                   id);
+    }
+    else {
+
+        AT91C_BASE_PMC->PMC_PCER = 1 << id;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Disables the clock of a peripheral. The peripheral ID (AT91C_ID_xxx) is used
+/// to identify which peripheral is targetted.
+/// Note that the ID must NOT be shifted (i.e. 1 << AT91C_ID_xxx).
+/// \param id  Peripheral ID (AT91C_ID_xxx).
+//------------------------------------------------------------------------------
+void PMC_DisablePeripheral(unsigned int id)
+{
+    SANITY_CHECK(id < 32);
+
+    if ((AT91C_BASE_PMC->PMC_PCSR & (1 << id)) != (1 << id)) {
+
+        TRACE_INFO("PMC_DisablePeripheral: clock of peripheral"
+                   " %u is not enabled\n\r",
+                   id);
+    }
+    else {
+
+        AT91C_BASE_PMC->PMC_PCDR = 1 << id;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Enable all the periph clock via PMC
+/// (Becareful of the last 2 bits, it is not periph clock)
+//------------------------------------------------------------------------------
+void PMC_EnableAllPeripherals(void)
+{
+    AT91C_BASE_PMC->PMC_PCER = MASK_STATUS;
+    while( (AT91C_BASE_PMC->PMC_PCSR & MASK_STATUS) != MASK_STATUS);
+    TRACE_INFO("Enable all periph clocks\n\r"); 
+}
+
+//------------------------------------------------------------------------------
+/// Disable all the periph clock via PMC
+/// (Becareful of the last 2 bits, it is not periph clock)
+//------------------------------------------------------------------------------
+void PMC_DisableAllPeripherals(void)
+{
+    AT91C_BASE_PMC->PMC_PCDR = MASK_STATUS;
+    while((AT91C_BASE_PMC->PMC_PCSR & MASK_STATUS) != 0);
+    TRACE_INFO("Disable all periph clocks\n\r");
+}
+
+//-----------------------------------------------------------------------------
+/// Get Periph Status
+//-----------------------------------------------------------------------------
+unsigned int PMC_IsAllPeriphEnabled(void)
+{
+    return (AT91C_BASE_PMC->PMC_PCSR == MASK_STATUS);
+}
+
+//-----------------------------------------------------------------------------
+/// Get Periph Status
+//-----------------------------------------------------------------------------
+unsigned int PMC_IsPeriphEnabled(unsigned int id)
+{
+    return (AT91C_BASE_PMC->PMC_PCSR & (1 << id));  
+}
+//------------------------------------------------------------------------------
+/// Put the CPU in Idle Mode for lower consumption
+//------------------------------------------------------------------------------
+void PMC_CPUInIdleMode(void)
+{
+#ifndef CP15_PRESENT	
+    PMC_DisableProcessorClock();
+#else
+    AT91C_BASE_PMC->PMC_SCDR = AT91C_PMC_PCK; 
+    CP15_WaitForInterrupt();
+#endif
+}
+
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/pmc/pmc.h b/tos/chips/cortex/m3/sam3/u/usb/peripherals/pmc/pmc.h
new file mode 100644
index 00000000..a1ce6cca
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/pmc/pmc.h
@@ -0,0 +1,70 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+#ifndef PMC_H
+#define PMC_H
+
+//------------------------------------------------------------------------------
+//         Global functions
+//------------------------------------------------------------------------------
+
+#if defined(at91sam7l64) || defined(at91sam7l128)
+extern void PMC_SetFastWakeUpInputs(unsigned int inputs);
+extern void PMC_DisableMainOscillator(void);
+extern
+#ifdef __ICCARM__
+__ramfunc
+#endif //__ICCARM__
+void PMC_DisableMainOscillatorForWaitMode(void);
+#endif // at91sam7l64 at91sam7l128
+
+extern void PMC_DisableProcessorClock(void);
+extern void PMC_EnablePeripheral(unsigned int id);
+extern void PMC_DisablePeripheral(unsigned int id);
+extern void PMC_CPUInIdleMode(void);
+
+
+extern void PMC_EnableAllPeripherals(void);
+
+extern void PMC_DisableAllPeripherals(void);
+
+extern unsigned int PMC_IsAllPeriphEnabled(void);
+
+extern unsigned int PMC_IsPeriphEnabled(unsigned int id);
+
+#endif //#ifndef PMC_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/tc/tc.h b/tos/chips/cortex/m3/sam3/u/usb/peripherals/tc/tc.h
new file mode 100644
index 00000000..1b91cc79
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/tc/tc.h
@@ -0,0 +1,88 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !Purpose
+///
+/// API for configuring and using Timer Counter (TC) peripherals.
+///
+/// !Usage
+/// -# Optionally, use TC_FindMckDivisor() to let the program find the best
+///    TCCLKS field value automatically.
+/// -# Configure a Timer Counter in the desired mode using TC_Configure().
+/// -# Start or stop the timer clock using TC_Start() and TC_Stop().
+//------------------------------------------------------------------------------
+
+#ifndef TC_H
+#define TC_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <board.h>
+
+#if defined(AT91C_ID_TC0)
+    // nothing to do
+#elif defined(AT91C_ID_TC012)
+    #define AT91C_ID_TC0 AT91C_ID_TC012
+#elif defined(AT91C_ID_TC)
+    #define AT91C_ID_TC0 AT91C_ID_TC
+#else
+    #error Pb define ID_TC
+#endif
+
+//------------------------------------------------------------------------------
+//         Global functions
+//------------------------------------------------------------------------------
+
+extern void TC_Configure(AT91S_TC *pTc, unsigned int mode);
+
+extern void TC_Start(AT91S_TC *pTc);
+
+extern void TC_Stop(AT91S_TC *pTc);
+
+extern unsigned char TC_FindMckDivisor(
+    unsigned int freq,
+    unsigned int mck,
+    unsigned int *div,
+    unsigned int *tcclks);
+
+#endif //#ifndef TC_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/usart/usart.c b/tos/chips/cortex/m3/sam3/u/usb/peripherals/usart/usart.c
new file mode 100644
index 00000000..6ba4a335
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/usart/usart.c
@@ -0,0 +1,321 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "usart.h"
+#include <utility/trace.h>
+#include <utility/assert.h>
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
+/// Configures an USART peripheral with the specified parameters.
+/// \param usart  Pointer to the USART peripheral to configure.
+/// \param mode  Desired value for the USART mode register (see the datasheet).
+/// \param baudrate  Baudrate at which the USART should operate (in Hz).
+/// \param masterClock  Frequency of the system master clock (in Hz).
+//------------------------------------------------------------------------------
+void USART_Configure(AT91S_USART *usart,
+                            unsigned int mode,
+                            unsigned int baudrate,
+                            unsigned int masterClock)
+{
+    // Reset and disable receiver & transmitter
+    usart->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX
+                   | AT91C_US_RXDIS | AT91C_US_TXDIS;
+
+    // Configure mode
+    usart->US_MR = mode;
+
+    // Configure baudrate
+    // Asynchronous, no oversampling
+    if (((mode & AT91C_US_SYNC) == 0)
+        && ((mode & AT91C_US_OVER) == 0)) {
+    
+        usart->US_BRGR = (masterClock / baudrate) / 16;
+    }
+    // TODO other modes
+}
+
+//------------------------------------------------------------------------------
+/// Enables or disables the transmitter of an USART peripheral.
+/// \param usart  Pointer to an USART peripheral
+/// \param enabled  If true, the transmitter is enabled; otherwise it is
+///                 disabled.
+//------------------------------------------------------------------------------
+void USART_SetTransmitterEnabled(AT91S_USART *usart,
+                                        unsigned char enabled)
+{
+    if (enabled) {
+
+        usart->US_CR = AT91C_US_TXEN;
+    }
+    else {
+
+        usart->US_CR = AT91C_US_TXDIS;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Enables or disables the receiver of an USART peripheral
+/// \param usart  Pointer to an USART peripheral
+/// \param enabled  If true, the receiver is enabled; otherwise it is disabled.
+//------------------------------------------------------------------------------
+void USART_SetReceiverEnabled(AT91S_USART *usart,
+                                     unsigned char enabled)
+{
+    if (enabled) {
+
+        usart->US_CR = AT91C_US_RXEN;
+    }
+    else {
+
+        usart->US_CR = AT91C_US_RXDIS;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Sends one packet of data through the specified USART peripheral. This
+/// function operates synchronously, so it only returns when the data has been
+/// actually sent.
+/// \param usart  Pointer to an USART peripheral.
+/// \param data  Data to send including 9nth bit and sync field if necessary (in
+///              the same format as the US_THR register in the datasheet).
+/// \param timeOut  Time out value (0 = no timeout).
+//------------------------------------------------------------------------------
+void USART_Write(
+    AT91S_USART *usart,
+    unsigned short data,
+    volatile unsigned int timeOut)
+{
+    if (timeOut == 0) {
+
+        while ((usart->US_CSR & AT91C_US_TXEMPTY) == 0);
+    }
+    else {
+
+        while ((usart->US_CSR & AT91C_US_TXEMPTY) == 0) {
+
+            if (timeOut == 0) {
+
+                TRACE_ERROR("USART_Write: Timed out.\n\r");
+                return;
+            }
+            timeOut--;
+        }
+    }
+
+    usart->US_THR = data;
+}
+
+//------------------------------------------------------------------------------
+/// Sends the contents of a data buffer through the specified USART peripheral.
+/// This function returns immediately (1 if the buffer has been queued, 0
+/// otherwise); poll the ENDTX and TXBUFE bits of the USART status register
+/// to check for the transfer completion.
+/// \param usart  Pointer to an USART peripheral.
+/// \param buffer  Pointer to the data buffer to send.
+/// \param size  Size of the data buffer (in bytes).
+//------------------------------------------------------------------------------
+unsigned char USART_WriteBuffer(
+    AT91S_USART *usart,
+    void *buffer,
+    unsigned int size)
+{
+    // Check if the first PDC bank is free
+    if ((usart->US_TCR == 0) && (usart->US_TNCR == 0)) {
+
+        usart->US_TPR = (unsigned int) buffer;
+        usart->US_TCR = size;
+        usart->US_PTCR = AT91C_PDC_TXTEN;
+
+        return 1;
+    }
+    // Check if the second PDC bank is free
+    else if (usart->US_TNCR == 0) {
+
+        usart->US_TNPR = (unsigned int) buffer;
+        usart->US_TNCR = size;
+
+        return 1;
+    }
+    else {
+
+        return 0;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Reads and return a packet of data on the specified USART peripheral. This
+/// function operates asynchronously, so it waits until some data has been
+/// received.
+/// \param usart  Pointer to an USART peripheral.
+/// \param timeOut  Time out value (0 -> no timeout).
+//------------------------------------------------------------------------------
+unsigned short USART_Read(
+    AT91S_USART *usart,
+    volatile unsigned int timeOut)
+{
+    if (timeOut == 0) {
+
+        while ((usart->US_CSR & AT91C_US_RXRDY) == 0);
+    }
+    else {
+
+        while ((usart->US_CSR & AT91C_US_RXRDY) == 0) {
+
+            if (timeOut == 0) {
+
+                TRACE_ERROR("USART_Read: Timed out.\n\r");
+                return 0;
+            }
+            timeOut--;
+        }
+    }
+
+    return usart->US_RHR;
+}
+
+//------------------------------------------------------------------------------
+/// Reads data from an USART peripheral, filling the provided buffer until it
+/// becomes full. This function returns immediately with 1 if the buffer has
+/// been queued for transmission; otherwise 0.
+/// \param usart  Pointer to an USART peripheral.
+/// \param buffer  Pointer to the buffer where the received data will be stored.
+/// \param size  Size of the data buffer (in bytes).
+//------------------------------------------------------------------------------
+unsigned char USART_ReadBuffer(AT91S_USART *usart,
+                                      void *buffer,
+                                      unsigned int size)
+{
+    // Check if the first PDC bank is free
+    if ((usart->US_RCR == 0) && (usart->US_RNCR == 0)) {
+
+        usart->US_RPR = (unsigned int) buffer;
+        usart->US_RCR = size;
+        usart->US_PTCR = AT91C_PDC_RXTEN;
+
+        return 1;
+    }
+    // Check if the second PDC bank is free
+    else if (usart->US_RNCR == 0) {
+
+        usart->US_RNPR = (unsigned int) buffer;
+        usart->US_RNCR = size;
+
+        return 1;
+    }
+    else {
+
+        return 0;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Returns 1 if some data has been received and can be read from an USART;
+/// otherwise returns 0.
+/// \param usart  Pointer to an AT91S_USART instance.
+//------------------------------------------------------------------------------
+unsigned char USART_IsDataAvailable(AT91S_USART *usart)
+{
+    if ((usart->US_CSR & AT91C_US_RXRDY) != 0) {
+
+        return 1;
+    }
+    else {
+
+        return 0;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Sets the filter value for the IRDA demodulator.
+/// \param pUsart  Pointer to an AT91S_USART instance.
+/// \param filter  Filter value.
+//------------------------------------------------------------------------------
+void USART_SetIrdaFilter(AT91S_USART *pUsart, unsigned char filter)
+{
+    SANITY_CHECK(pUsart);
+
+    pUsart->US_IF = filter;
+}
+
+//------------------------------------------------------------------------------
+/// Sends one packet of data through the specified USART peripheral. This
+/// function operates synchronously, so it only returns when the data has been
+/// actually sent.
+/// \param usart  Pointer to an USART peripheral.
+/// \param data  Data to send including 9nth bit and sync field if necessary (in
+///              the same format as the US_THR register in the datasheet).
+/// \param timeOut  Time out value (0 = no timeout).
+//------------------------------------------------------------------------------
+void USART_PutChar(
+    AT91S_USART *usart,
+    unsigned char c)
+{
+    // Wait for the transmitter to be ready  
+    while ((usart->US_CSR & AT91C_US_TXEMPTY) == 0);
+
+    // Send character    
+    usart->US_THR = c;
+    
+    // Wait for the transfer to complete    
+    while ((usart->US_CSR & AT91C_US_TXEMPTY) == 0);    
+}
+
+//------------------------------------------------------------------------------
+/// Return 1 if a character can be read in USART
+//------------------------------------------------------------------------------
+unsigned int USART_IsRxReady(AT91S_USART *usart)
+{
+    return (usart->US_CSR & AT91C_US_RXRDY);
+}
+
+//------------------------------------------------------------------------------
+/// Reads and returns a character from the USART.
+/// \note This function is synchronous (i.e. uses polling).
+/// \return Character received.
+//------------------------------------------------------------------------------
+unsigned char USART_GetChar(AT91S_USART *usart)
+{
+    while ((usart->US_CSR & AT91C_US_RXRDY) == 0);
+    return usart->US_RHR;
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usb/peripherals/usart/usart.h b/tos/chips/cortex/m3/sam3/u/usb/peripherals/usart/usart.h
new file mode 100644
index 00000000..0e9b1324
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/peripherals/usart/usart.h
@@ -0,0 +1,133 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \dir
+/// !Purpose
+/// 
+/// This module provides several definitions and methods for using an USART
+/// peripheral.
+///
+/// !Usage
+/// -# Enable the USART peripheral clock in the PMC.
+/// -# Enable the required USART PIOs (see pio.h).
+/// -# Configure the UART by calling USART_Configure.
+/// -# Enable the transmitter and/or the receiver of the USART using
+///    USART_SetTransmitterEnabled and USART_SetReceiverEnabled.
+/// -# Send data through the USART using the USART_Write and
+///    USART_WriteBuffer methods.
+/// -# Receive data from the USART using the USART_Read and
+///    USART_ReadBuffer functions; the availability of data can be polled
+///    with USART_IsDataAvailable.
+/// -# Disable the transmitter and/or the receiver of the USART with
+///    USART_SetTransmitterEnabled and USART_SetReceiverEnabled.
+//------------------------------------------------------------------------------
+
+#ifndef USART_H
+#define USART_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <board.h>
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USART modes"
+/// This page lists several common operating modes for an USART peripheral.
+/// 
+/// !Modes
+/// - USART_MODE_ASYNCHRONOUS
+/// - USART_MODE_IRDA
+
+/// Basic asynchronous mode, i.e. 8 bits no parity.
+#define USART_MODE_ASYNCHRONOUS (AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE)
+
+/// IRDA mode
+#define USART_MODE_IRDA         (AT91C_US_USMODE_IRDA | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_FILTER)
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern void USART_Configure(
+    AT91S_USART *usart,
+    unsigned int mode,
+    unsigned int baudrate,
+    unsigned int masterClock);
+
+extern void USART_SetTransmitterEnabled(AT91S_USART *usart, unsigned char enabled);
+
+extern void USART_SetReceiverEnabled(AT91S_USART *usart, unsigned char enabled);
+
+extern void USART_Write(
+    AT91S_USART *usart, 
+    unsigned short data, 
+    volatile unsigned int timeOut);
+
+extern unsigned char USART_WriteBuffer(
+    AT91S_USART *usart,
+    void *buffer,
+    unsigned int size);
+
+extern unsigned short USART_Read(
+    AT91S_USART *usart, 
+    volatile unsigned int timeOut);
+
+extern unsigned char USART_ReadBuffer(
+    AT91S_USART *usart,
+    void *buffer,
+    unsigned int size);
+
+extern unsigned char USART_IsDataAvailable(AT91S_USART *usart);
+
+extern void USART_SetIrdaFilter(AT91S_USART *pUsart, unsigned char filter);
+
+extern void USART_PutChar(AT91S_USART *usart, unsigned char c);
+
+extern unsigned int USART_IsRxReady(AT91S_USART *usart);
+
+extern unsigned char USART_GetChar(AT91S_USART *usart);
+
+
+#endif //#ifndef USART_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/sam3uudphshardware.h b/tos/chips/cortex/m3/sam3/u/usb/sam3uudphshardware.h
new file mode 100644
index 00000000..1600be15
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/sam3uudphshardware.h
@@ -0,0 +1,670 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * High Speed USB Device Port register definitions.
+ *
+ * @author Kevin Klues
+ */
+
+#ifndef _SAM3UUDPHSHARDWARE_H
+#define _SAM3UUDPHSHARDWARE_H
+
+#include <sam3unvichardware.h>
+
+// Resource definition
+#define SAM3U_UDPHS_RESOURCE "Sam3uUdphs.Resource"
+
+//Defines needed by Atmel USB framework
+typedef irqn_t IRQn_Type;
+
+/**
+ *  UDPHS Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 973
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t dev_addr     :  7;
+    uint32_t faddr_en     :  1;
+    uint32_t en_udphs     :  1;
+    uint32_t detach       :  1;
+    uint32_t rewakeup     :  1;
+    uint32_t pulld_dis    :  1;
+    uint32_t reserved     :  20;
+  } __attribute__((__packed__)) bits;
+} udphs_ctrl_t;
+
+/**
+ *  UDPHS Frame Number Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 975
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t micro_frame_num    : 3;
+    uint32_t frame_number       : 11;
+    uint32_t reserved           : 17;
+    uint32_t fnum_err           : 1;
+  } __attribute__((__packed__)) bits;
+} udphs_fnum_t;
+
+/**
+ *  UDPHS Interrupt Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 976
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t reserved0         : 1;
+    uint32_t det_suspd         : 1;
+    uint32_t micro_sof         : 1;
+    uint32_t int_sof           : 1;
+    uint32_t endreset          : 1;
+    uint32_t wake_up           : 1;
+    uint32_t endofrsm          : 1;
+    uint32_t upstr_res         : 1;
+    uint32_t ept_0             : 1;
+    uint32_t ept_1             : 1;
+    uint32_t ept_2             : 1;
+    uint32_t ept_3             : 1;
+    uint32_t ept_4             : 1;
+    uint32_t ept_5             : 1;
+    uint32_t ept_6             : 1;
+    uint32_t reserved1         : 10;
+    uint32_t dma_1             : 1;
+    uint32_t dma_2             : 1;
+    uint32_t dma_3             : 1;
+    uint32_t dma_4             : 1;
+    uint32_t dma_r             : 1;
+    uint32_t dma_6             : 1;
+    uint32_t reserved2         : 1;
+  } __attribute__((__packed__)) bits;
+} udphs_ien_t;
+
+/**
+ *  UDPHS Interrupt Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 979
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t speed         : 1;
+    uint32_t det_suspd     : 1;
+    uint32_t micro_sof     : 1;
+    uint32_t int_sof       : 1;
+    uint32_t endreset      : 1;
+    uint32_t wake_up       : 1;
+    uint32_t endofrsm      : 1;
+    uint32_t upstr_res     : 1;
+    uint32_t ept_0         : 1;
+    uint32_t ept_1         : 1;
+    uint32_t ept_2         : 1;
+    uint32_t ept_3         : 1;
+    uint32_t ept_4         : 1;
+    uint32_t ept_5         : 1;
+    uint32_t ept_6         : 1;
+    uint32_t reserved0     : 10;
+    uint32_t dma_1         : 1;
+    uint32_t dma_2         : 1;
+    uint32_t dma_3         : 1;
+    uint32_t dma_4         : 1;
+    uint32_t dma_5         : 1;
+    uint32_t dma_6         : 1;
+    uint32_t reserved1     : 1;
+  } __attribute__((__packed__)) bits;
+} udphs_intsta_t;          
+
+/**
+ *  UDPHS Clear Interrupt Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 981
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t reserved0   : 1;
+    uint32_t det_suspd   : 1;
+    uint32_t micro_sof   : 1;
+    uint32_t int_sof     : 1;
+    uint32_t endreset    : 1;
+    uint32_t wake_up     : 1;
+    uint32_t endofrsm    : 1;
+    uint32_t upstr_res   : 1;
+    uint32_t reserved1   : 24;
+  } __attribute__((__packed__)) bits;
+} udphs_clrint_t;
+
+/**
+ *  UDPHS Endpoints Reset Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 982
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t ept_0      : 1;
+    uint32_t ept_1      : 1;
+    uint32_t ept_2      : 1;
+    uint32_t ept_3      : 1;
+    uint32_t ept_4      : 1;
+    uint32_t ept_5      : 1;
+    uint32_t ept_6      : 1;
+    uint32_t reserved   : 25;
+  } __attribute__((__packed__)) bits;
+} udphs_eptrst_t;
+
+/**
+ *  UDPHS Test Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 983
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t speed_cfg  : 2;
+    uint32_t tst_j      : 1;
+    uint32_t tst_k      : 1;
+    uint32_t tst_pkt    : 1;
+    uint32_t opmode2    : 1;
+    uint32_t reserved   : 26;
+  } __attribute__((__packed__)) bits;
+} udphs_tst_t;
+
+/**
+ *  UDPHS Name1 Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 985
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t ip_name1 : 32;
+  } __attribute__((__packed__)) bits;
+} udphs_ipname1_t;
+
+/**
+ *  UDPHS Name2 Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 986
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t ip_name2 : 32;
+  } __attribute__((__packed__)) bits;
+} udphs_ipname2_t;
+
+/**
+ *  UDPHS Features Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 987
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t ept_nbr_max           : 4;
+    uint32_t dma_channel_nbr       : 3;
+    uint32_t dma_b_siz             : 1;
+    uint32_t dma_fifo_word_depth   : 4;
+    uint32_t fifo_max_size         : 3;
+    uint32_t bw_dpram              : 1;
+    uint32_t datab16_8             : 1;
+    uint32_t iso_ept_1             : 1;
+    uint32_t iso_ept_2             : 1;
+    uint32_t iso_ept_3             : 1;
+    uint32_t iso_ept_4             : 1;
+    uint32_t iso_ept_5             : 1;
+    uint32_t iso_ept_6             : 1;
+    uint32_t iso_ept_7             : 1;
+    uint32_t iso_ept_8             : 1;
+    uint32_t iso_ept_9             : 1;
+    uint32_t iso_ept_10            : 1;
+    uint32_t iso_ept_11            : 1;
+    uint32_t iso_ept_12            : 1;
+    uint32_t iso_ept_13            : 1;
+    uint32_t iso_ept_14            : 1;
+    uint32_t iso_ept_15            : 1;
+  } __attribute__((__packed__)) bits;
+} udphs_ipfeatures_t;
+
+/**
+ *  UDPHS Endpoint Configuration Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 989
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t ept_size      : 3;
+    uint32_t ept_dir       : 1;
+    uint32_t ept_type      : 2;
+    uint32_t bk_number     : 2;
+    uint32_t nb_trans      : 2;
+    uint32_t reserved      : 21;
+    uint32_t ept_mapd      : 1;
+  } __attribute__((__packed__)) bits;
+} udphs_eptcfg_t;
+
+/**
+ *  UDPHS Endpoint Control Enable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 991
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t ept_enabl         : 1;
+    uint32_t auto_valid        : 1;
+    uint32_t reserved0         : 1;
+    uint32_t intdis_dma        : 1;
+    uint32_t nyet_dis          : 1;
+    uint32_t reserved1         : 1;
+    uint32_t datax_rx          : 1;
+    uint32_t mdata_rx          : 1;
+    uint32_t err_ovflw         : 1;
+    uint32_t rx_bk_rdy         : 1;
+    uint32_t tx_complt         : 1;
+//    union {                    
+      uint32_t tx_pk_rdy       : 1;
+//      uint32_t err_trans       : 1;
+//    };                         
+//    union {                    
+      uint32_t rx_setup        : 1;
+//      uint32_t err_fl_iso      : 1;
+//    };                         
+//    union {                    
+      uint32_t stall_snt       : 1;
+//      uint32_t err_criso       : 1;
+//      uint32_t err_nbtra       : 1;
+//    };                         
+//    union {                    
+      uint32_t nak_in          : 1;
+//      uint32_t err_flush       : 1;
+//    };                         
+    uint32_t nak_out           : 1;
+    uint32_t reserved2         : 2;
+    uint32_t busy_bank         : 1;
+    uint32_t reserved3         : 12;
+    uint32_t shrt_pckt         : 1;
+  } __attribute__((__packed__)) bits;
+} udphs_eptctlenb_t;           
+                               
+/**
+ *  UDPHS Endpoint Control Disable Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 993
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t ept_disabl        : 1;
+    uint32_t auto_valid        : 1;
+    uint32_t reserved0         : 1;
+    uint32_t intdis_dma        : 1;
+    uint32_t nyet_dis          : 1;
+    uint32_t reserved1         : 1;
+    uint32_t datax_rx          : 1;
+    uint32_t mdata_rx          : 1;
+    uint32_t err_ovflw         : 1;
+    uint32_t rx_bk_rdy         : 1;
+    uint32_t tx_complt         : 1;
+//    union {                    
+      uint32_t tx_pk_rdy       : 1;
+//      uint32_t err_trans       : 1;
+//    };                         
+//    union {                    
+      uint32_t rx_setup        : 1;
+//      uint32_t err_fl_iso      : 1;
+//    };                         
+//    union {                    
+      uint32_t stall_snt       : 1;
+//      uint32_t err_criso       : 1;
+//      uint32_t err_nbtra       : 1;
+//    };                         
+//    union {                    
+      uint32_t nak_in          : 1;
+//      uint32_t err_flush       : 1;
+//    };                         
+    uint32_t nak_out           : 1;
+    uint32_t reserved2         : 2;
+    uint32_t busy_bank         : 1;
+    uint32_t reserved3         : 12;
+    uint32_t shrt_pckt         : 1;
+  } __attribute__((__packed__)) bits;
+} udphs_eptctldis_t;
+
+/**
+ *  UDPHS Endpoint Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 995
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {                 
+    uint32_t ept_enabl         : 1;
+    uint32_t auto_valid        : 1;
+    uint32_t reserved0         : 1;
+    uint32_t intdis_dma        : 1;
+    uint32_t nyet_dis          : 1;
+    uint32_t reserved1         : 1;
+    uint32_t datax_rx          : 1;
+    uint32_t mdata_rx          : 1;
+    uint32_t err_ovflw         : 1;
+    uint32_t rx_bk_rdy         : 1;
+    uint32_t tx_complt         : 1;
+//    union {                    
+      uint32_t tx_pk_rdy       : 1;
+//      uint32_t err_trans       : 1;
+//    };                         
+//    union {                    
+      uint32_t rx_setup        : 1;
+//      uint32_t err_fl_iso      : 1;
+//    };                         
+//    union {                    
+      uint32_t stall_snt       : 1;
+//      uint32_t err_criso       : 1;
+//      uint32_t err_nbtra       : 1;
+//    };                         
+//    union {                    
+      uint32_t nak_in          : 1;
+//      uint32_t err_flush       : 1;
+//    };                         
+    uint32_t nak_out           : 1;
+    uint32_t reserved2         : 2;
+    uint32_t busy_bank         : 1;
+    uint32_t reserved3         : 12;
+    uint32_t shrt_pckt         : 1;
+  } __attribute__((__packed__)) bits;
+} udphs_eptctl_t;
+
+/**
+ *  UDPHS Endpoint Set Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 998
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t reserved0        : 5;
+    uint32_t frcestall        : 1;
+    uint32_t reserved1        : 3;
+    uint32_t kill_bank        : 1;
+    uint32_t reserved2        : 1;
+    uint32_t tx_pk_rdy        : 1;
+    uint32_t reserved3        : 20;
+  } __attribute__((__packed__)) bits;
+} udphs_eptsetsta_t;
+
+/**
+ *  UDPHS Endpoint Clear Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 999
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t reserved0      : 5;
+    uint32_t frcestall      : 1;
+    uint32_t togglesq       : 1;
+    uint32_t reserved1      : 2;
+    uint32_t rx_bk_rdy      : 1;
+    uint32_t tx_complt      : 1;
+    uint32_t reserved3      : 1;
+//    union {
+      uint32_t rx_setup     : 1;
+//      uint32_t err_fl_iso   : 1;
+//    };
+//    union {
+      uint32_t stall_snt    : 1;
+//      uint32_t err_nbtra    : 1;
+//    };
+//    union {
+      uint32_t nak_in       : 1;
+//      uint32_t err_flush    : 1;
+//    };
+    uint32_t nak_out        : 1;
+    uint32_t reserved4      : 16;
+  } __attribute__((__packed__)) bits;
+} udphs_eptclrsta_t;
+
+/**
+ *  UDPHS Endpoint Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 999
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t reserved            : 5;
+    uint32_t frcestall           : 1;
+    uint32_t togglesq_sta        : 2;
+    uint32_t err_ovflw           : 1;
+//    union {
+      uint32_t rx_bk_rdy         : 1;
+//      uint32_t kill_bank         : 1;
+//    };                       
+    uint32_t tx_complt           : 1;
+//    union {
+      uint32_t tx_pk_rdy         : 1;
+//      uint32_t err_trans         : 1;
+//    };                       
+//    union {                  
+      uint32_t rx_setup          : 1;
+//      uint32_t err_fl_iso        : 1;
+//    };
+//    union {
+      uint32_t stall_snt         : 1;
+//      uint32_t err_criso         : 1;
+//      uint32_t err_nbtra         : 1;
+//    };                       
+//    union {                  
+      uint32_t nak_in            : 1;
+//      uint32_t err_flush         : 1;
+//    };
+    uint32_t nak_out             : 1;
+//    union {                  
+      uint32_t current_bank      : 2;
+//      uint32_t control_dir       : 2;
+//    };
+    uint32_t busy_bank_sta       : 2;
+    uint32_t byte_count          : 11;
+    uint32_t shrt_pckt           : 1;
+  } __attribute__((__packed__)) bits;
+} udphs_eptsta_t;
+
+/**
+ *  UDPHS DMA Next Descriptor Address Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1007
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t nxt_dsc_add : 32;
+  } __attribute__((__packed__)) bits;
+} udphs_dmanxtdsc_t;
+
+/**
+ *  UDPHS DMA Channel Address Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1008
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t buff_add : 32;
+  } __attribute__((__packed__)) bits;
+} udphs_dmaaddress_t;
+
+/**
+ *  UDPHS DMA Channel Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1009
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t chann_enb         : 1;
+    uint32_t ldnxt_dsc         : 1;
+    uint32_t end_tr_en         : 1;
+    uint32_t end_b_en          : 1;
+    uint32_t end_tr_it         : 1;
+    uint32_t end_buffit        : 1;
+    uint32_t desc_ld_it        : 1;
+    uint32_t burst_lck         : 1;
+    uint32_t reserved          : 8;
+    uint32_t buff_length       : 16;
+  } __attribute__((__packed__)) bits;
+} udphs_dmacontrol_t;
+
+/**
+ *  UDPHS DMA Channel Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 1011
+ */
+typedef union
+{
+  uint32_t flat;
+  struct
+  {
+    uint32_t chann_enb        : 1;
+    uint32_t chann_act        : 1;
+    uint32_t reserved0        : 2;
+    uint32_t end_tr_st        : 1;
+    uint32_t end_bf_st        : 1;
+    uint32_t desc_ldst        : 1;
+    uint32_t reserved1        : 9;
+    uint32_t buff_count       : 16;
+  } __attribute__((__packed__)) bits;
+} udphs_dmastatus_t;
+
+/**
+ * UDPHS Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary, p. 972
+ */
+typedef struct {
+  udphs_eptcfg_t         cfg;
+  udphs_eptctlenb_t      ctlenb;
+  udphs_eptctldis_t      ctldis;
+  udphs_eptctl_t         ctl;
+  uint32_t               endpoint;
+  udphs_eptsetsta_t      setsta;
+  udphs_eptclrsta_t      crlsta;
+  udphs_eptsta_t         sta;
+} udphs_ept_t;
+
+typedef struct {
+  udphs_dmanxtdsc_t      nxtdsc;
+  udphs_dmaaddress_t     address;
+  udphs_dmacontrol_t     control;
+  udphs_dmastatus_t      status;
+} udphs_dma_t;
+
+typedef struct udphs
+{
+  volatile udphs_ctrl_t        ctrl;
+  volatile udphs_fnum_t        fnum;
+  uint32_t                     reserved0[2];
+  volatile udphs_ien_t         ien;
+  volatile udphs_intsta_t      intsta;
+  volatile udphs_clrint_t      clrint;
+  volatile udphs_eptrst_t      eptrst;
+  uint32_t                     reserved1[48]; //Data sheet range is wrong....
+  volatile udphs_tst_t         tst;
+  uint32_t                     reserved2[3]; // Data sheet range wrong here too....
+  volatile udphs_ipname1_t     ipname1;
+  volatile udphs_ipname2_t     ipname2;
+  volatile udphs_ipfeatures_t  ipfeatures;
+  uint32_t                     reserved3[1]; // Not even listed on data sheet...
+  volatile udphs_ept_t         ept[7];
+  uint32_t                     reserved4[72];
+  udphs_dma_t                  reserved_dma0;
+  volatile udphs_dma_t         dma[5];
+} udphs_t;
+
+/**
+ * Memory mapping for the UDPHS controller
+ */
+volatile udphs_t* UDPHS = (volatile udphs_t *) 0x400A4000;
+
+// Valid endpoint sizes
+enum {
+  EPT_SIZE_8,
+  EPT_SIZE_16,
+  EPT_SIZE_32,
+  EPT_SIZE_64,
+  EPT_SIZE_128,
+  EPT_SIZE_256,
+  EPT_SIZE_512,
+  EPT_SIZE_1024,
+};
+
+// Valid endpoint directions
+enum {
+  EPT_DIR_OUT,
+  EPT_DIR_IN,
+  #define EPT_DIR_DONTCARE EPT_DIR_OUT
+};
+
+// Valid endpoint transfer types
+enum {
+  EPT_CTRL,
+  EPT_ISO,
+  EPT_BULK,
+  EPT_INT,
+};
+
+#endif
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCAbstractControlManagementDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCAbstractControlManagementDescriptor.h
new file mode 100644
index 00000000..0f682319
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCAbstractControlManagementDescriptor.h
@@ -0,0 +1,109 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Definition of a class for manipulating CDC abstract control management
+ descriptors.
+
+ !!!Usage
+
+ Should be included in a list of USB configuration descriptors.
+*/
+
+#ifndef CDCABSTRACTCONTROLMANAGEMENTDESCRIPTOR_H
+#define CDCABSTRACTCONTROLMANAGEMENTDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC ACM Capabilities"
+/// This page lists the capabilities of the CDC ACM.
+///
+/// !Capabilities
+/// - CDCAbstractControlManagementDescriptor_COMMFEATURE
+/// - CDCAbstractControlManagementDescriptor_LINE
+/// - CDCAbstractControlManagementDescriptor_SENDBREAK
+/// - CDCAbstractControlManagementDescriptor_NETWORKCONNECTION
+
+/// Device supports the request combination of SetCommFeature, ClearCommFeature
+/// and GetCommFeature.
+#define CDCAbstractControlManagementDescriptor_COMMFEATURE          (1 << 0)
+/// Device supports the request combination of SetLineCoding, GetLineCoding and
+/// SetControlLineState.
+#define CDCAbstractControlManagementDescriptor_LINE                 (1 << 1)
+/// Device supports the SendBreak request.
+#define CDCAbstractControlManagementDescriptor_SENDBREAK            (1 << 2)
+/// Device supports the NetworkConnection notification.
+#define CDCAbstractControlManagementDescriptor_NETWORKCONNECTION    (1 << 3)
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+#ifdef __ICCARM__          // IAR
+#pragma pack(1)            // IAR
+#define __attribute__(...) // IAR
+#endif                     // IAR
+
+//------------------------------------------------------------------------------
+/// Describes the command supported by the communication interface class
+/// with the Abstract Control Model subclass code.
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// Size of this descriptor in bytes.
+    unsigned char bFunctionLength;
+    /// Descriptor type (CDCDescriptors_INTERFACE).
+    unsigned char bDescriptorType;
+    /// Descriptor subtype (CDCDescriptors_ABSTRACTCONTROLMANAGEMENT).
+    unsigned char bDescriptorSubtype;
+    /// Configuration capabilities.
+    /// \sa "CDC ACM Capabilities".
+    unsigned char bmCapabilities;
+
+} __attribute__ ((packed)) CDCAbstractControlManagementDescriptor; // GCC
+
+#ifdef __ICCARM__          // IAR
+#pragma pack()             // IAR
+#endif                     // IAR
+
+#endif //#ifndef CDCABSTRACTCONTROLMANAGEMENTDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCCallManagementDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCCallManagementDescriptor.h
new file mode 100644
index 00000000..dd7bcf2f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCCallManagementDescriptor.h
@@ -0,0 +1,102 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Definition of a class for managing CDC call management descriptors.
+
+ !!!Usage
+
+ Should be included in a list of configuration descriptors for a USB
+ device.
+*/
+
+#ifndef CDCCALLMANAGEMENTDESCRIPTOR_H
+#define CDCCALLMANAGEMENTDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC CallManagement Capabilities"
+/// This page lists CDC CallManagement Capabilities.
+///
+/// !Capabilities
+/// - CDCCallManagementDescriptor_SELFCALLMANAGEMENT
+/// - CDCCallManagementDescriptor_DATACALLMANAGEMENT
+
+/// Device handles call management itself.
+#define CDCCallManagementDescriptor_SELFCALLMANAGEMENT      (1 << 0)
+/// Device can exchange call management information over a Data class interface.
+#define CDCCallManagementDescriptor_DATACALLMANAGEMENT      (1 << 1)
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+#ifdef __ICCARM__          // IAR
+#pragma pack(1)            // IAR
+#define __attribute__(...) // IAR
+#endif                     // IAR
+
+//------------------------------------------------------------------------------
+/// Describes the processing of calls for the communication class interface.
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// Size of this descriptor in bytes.
+    unsigned char bFunctionLength;
+    /// Descriptor type (CDCDescriptors_INTERFACE).
+    unsigned char bDescriptorType;
+    /// Descriptor sub-type (CDCDescriptors_CALLMANAGEMENT).
+    unsigned char bDescriptorSubtype;
+    /// Configuration capabilities ("CDC CallManagement Capabilities").
+    unsigned char bmCapabilities;
+    /// Interface number of the data class interface used for call management
+    /// (optional).
+    unsigned char bDataInterface;
+
+} __attribute__ ((packed)) CDCCallManagementDescriptor; // GCC
+
+#ifdef __ICCARM__          // IAR
+#pragma pack()             // IAR
+#endif                     // IAR
+
+#endif //#ifndef CDCCALLMANAGEMENTDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCCommunicationInterfaceDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCCommunicationInterfaceDescriptor.h
new file mode 100644
index 00000000..ea61786e
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCCommunicationInterfaceDescriptor.h
@@ -0,0 +1,70 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Definition of several constants used when declaring a CDC communication
+ class interface descriptor.
+*/
+
+#ifndef CDCCOMMUNICATIONINTERFACEDESCRIPTOR_H
+#define CDCCOMMUNICATIONINTERFACEDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC Communication Interface Values"
+/// This page lists the values for CDC Communication Interface Descriptor.
+///
+/// !Values
+/// - CDCCommunicationInterfaceDescriptor_CLASS
+/// - CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL
+/// - CDCCommunicationInterfaceDescriptor_NOPROTOCOL
+
+/// Interface class code for a CDC communication class interface.
+#define CDCCommunicationInterfaceDescriptor_CLASS                   0x02
+/// Interface subclass code for an Abstract Control Model interface descriptor.
+#define CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL    0x02
+/// Interface protocol code when a CDC communication interface does not
+/// implemenent any particular protocol.
+#define CDCCommunicationInterfaceDescriptor_NOPROTOCOL              0x00
+//------------------------------------------------------------------------------
+
+#endif //#ifndef CDCCOMMUNICATIONINTERFACEDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCDataInterfaceDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCDataInterfaceDescriptor.h
new file mode 100644
index 00000000..4b5a2bf4
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCDataInterfaceDescriptor.h
@@ -0,0 +1,70 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Definitions of constants used when declaring a CDC data class interface
+ descriptor.
+*/
+
+#ifndef CDCDATAINTERFACEDESCRIPTOR_H
+#define CDCDATAINTERFACEDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC Data Interface Values"
+/// This page lists the values for CDC Data Interface Descriptor.
+///
+/// !Values
+/// - CDCDataInterfaceDescriptor_CLASS
+/// - CDCDataInterfaceDescriptor_SUBCLASS
+/// - CDCDataInterfaceDescriptor_NOPROTOCOL
+
+/// Interface class code for a data class interface.
+#define CDCDataInterfaceDescriptor_CLASS        0x0A
+/// Interface subclass code for a data class interface.
+#define CDCDataInterfaceDescriptor_SUBCLASS     0x00
+/// Protocol code for a data class interface which does not implement any
+/// particular protocol.
+#define CDCDataInterfaceDescriptor_NOPROTOCOL   0x00
+//------------------------------------------------------------------------------
+
+#endif //#ifndef CDCDATAINTERFACEDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCDeviceDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCDeviceDescriptor.h
new file mode 100644
index 00000000..c28d67b2
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCDeviceDescriptor.h
@@ -0,0 +1,69 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Definition of several constants used when declaring USB CDC device
+ descriptors.
+*/
+
+#ifndef CDCDEVICEDESCRIPTOR_H
+#define CDCDEVICEDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC Device Descriptor Values"
+/// This page lists the values for CDC Device Descriptor.
+///
+/// !Values
+/// - CDCDeviceDescriptor_CLASS
+/// - CDCDeviceDescriptor_SUBCLASS
+/// - CDCDeviceDescriptor_PROTOCOL
+
+/// Device class code when using the CDC class.
+#define CDCDeviceDescriptor_CLASS               0x02
+/// Device subclass code when using the CDC class.
+#define CDCDeviceDescriptor_SUBCLASS            0x00
+/// Device protocol code when using the CDC class.
+#define CDCDeviceDescriptor_PROTOCOL            0x00
+//------------------------------------------------------------------------------
+
+#endif //#ifndef CDCDEVICEDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCGenericDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCGenericDescriptor.h
new file mode 100644
index 00000000..0baa0d9d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCGenericDescriptor.h
@@ -0,0 +1,96 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Definition of several constants for declaring CDC descriptors.
+*/
+
+#ifndef CDCGENERICDESCRIPTOR_H
+#define CDCGENERICDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC Specification Release Numbers"
+/// This page list the CDC Spec. Release Numbers.
+///
+/// !Numbers
+/// - CDCGenericDescriptor_CDC1_10
+
+/// Identify CDC specification version 1.10.
+#define CDCGenericDescriptor_CDC1_10                            0x0110
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC Descriptro Types"
+/// This page lists CDC descriptor types.
+///
+/// !Types
+/// - CDCGenericDescriptor_INTERFACE
+/// - CDCGenericDescriptor_ENDPOINT
+
+///Indicates that a CDC descriptor applies to an interface.
+#define CDCGenericDescriptor_INTERFACE                          0x24
+/// Indicates that a CDC descriptor applies to an endpoint.
+#define CDCGenericDescriptor_ENDPOINT                           0x25
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC Descriptor Subtypes"
+/// This page lists CDC descriptor sub types
+///
+/// !Types
+/// - CDCGenericDescriptor_HEADER
+/// - CDCGenericDescriptor_CALLMANAGEMENT
+/// - CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT
+/// - CDCGenericDescriptor_UNION
+
+/// Header functional descriptor subtype.
+#define CDCGenericDescriptor_HEADER                             0x00
+/// Call management functional descriptor subtype.
+#define CDCGenericDescriptor_CALLMANAGEMENT                     0x01
+/// Abstract control management descriptor subtype.
+#define CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT          0x02
+/// Union descriptor subtype.
+#define CDCGenericDescriptor_UNION                              0x06
+//------------------------------------------------------------------------------
+
+#endif //#ifndef CDCGENERICDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCGenericRequest.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCGenericRequest.h
new file mode 100644
index 00000000..0732b827
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCGenericRequest.h
@@ -0,0 +1,68 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Various definitions used for characterizing USB CDC requests.
+*/
+
+#ifndef CDCGENERICREQUEST_H
+#define CDCGENERICREQUEST_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC Request Codes"
+/// This page lists USB CDC Request Codes.
+///
+/// !Codes
+/// - CDCGenericRequest_SETLINECODING
+/// - CDCGenericRequest_GETLINECODING
+/// - CDCGenericRequest_SETCONTROLLINESTATE
+
+/// SetLineCoding request code.
+#define CDCGenericRequest_SETLINECODING             0x20
+/// GetLineCoding request code.
+#define CDCGenericRequest_GETLINECODING             0x21
+/// SetControlLineState request code.
+#define CDCGenericRequest_SETCONTROLLINESTATE       0x22
+//------------------------------------------------------------------------------
+
+#endif //#ifndef CDCGENERICREQUEST_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCHeaderDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCHeaderDescriptor.h
new file mode 100644
index 00000000..d409c739
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCHeaderDescriptor.h
@@ -0,0 +1,82 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Definition of the CDCHeaderDescriptor class.
+
+ !!!Usage
+
+ Should be included in a USB configuration descriptor.
+*/
+
+#ifndef CDCHEADERDESCRIPTOR_H
+#define CDCHEADERDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+#ifdef __ICCARM__          // IAR
+#pragma pack(1)            // IAR
+#define __attribute__(...) // IAR
+#endif                     // IAR
+
+//------------------------------------------------------------------------------
+/// Marks the beginning of the concatenated set of functional descriptors
+/// for the interface.
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// Size of this descriptor in bytes.
+    unsigned char bFunctionLength;
+    /// Descriptor type (CDCDescriptors_INTERFACE).
+    unsigned char bDescriptorType;
+    /// Descriptor sub-type (CDCDescriptors_HEADER).
+    unsigned char bDescriptorSubtype;
+    /// USB CDC specification release number.
+    unsigned short bcdCDC;
+
+} __attribute__ ((packed)) CDCHeaderDescriptor; // GCC
+
+#ifdef __ICCARM__          // IAR
+#pragma pack()             // IAR
+#endif                     // IAR
+
+#endif //#ifndef CDCHEADERDESCRIPTOR_H
+
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCLineCoding.c b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCLineCoding.c
new file mode 100644
index 00000000..f2541b88
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCLineCoding.c
@@ -0,0 +1,83 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+    Title: CDCLineCoding
+
+    About: Purpose
+        Implementation of the CDCLineCoding class.
+*/
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "CDCLineCoding.h"
+#include <utility/assert.h>
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Initializes the bitrate, number of stop bits, parity checking and
+/// number of data bits of a CDCLineCoding object.
+/// \param lineCoding Pointer to a CDCLineCoding instance.
+/// \param bitrate Bitrate of the virtual COM connection.
+/// \param stopbits Number of stop bits ("CDC LineCoding StopBits").
+/// \param parity Parity check type ("CDC LineCoding ParityChecking").
+/// \param databits Number of data bits.
+//------------------------------------------------------------------------------
+void CDCLineCoding_Initialize(CDCLineCoding *lineCoding,
+                              unsigned int bitrate,
+                              unsigned char stopbits,
+                              unsigned char parity,
+                              unsigned char databits)
+{
+    ASSERT(stopbits <= CDCLineCoding_TWOSTOPBITS,
+           "CDCLineCoding_Initialize: Invalid stopbits value (%d)\n\r",
+           stopbits);
+    ASSERT(parity <= CDCLineCoding_SPACEPARITY,
+           "CDCLineCoding_Initialize: Invalid parity value (%d)\n\r",
+           parity);
+    ASSERT(((databits >= 5) && (databits <= 8)) || (databits == 16),
+           "CDCLineCoding_Initialize: Invalid databits value (%d)\n\r",
+           databits);
+
+    lineCoding->dwDTERate = bitrate;
+    lineCoding->bCharFormat = stopbits;
+    lineCoding->bParityType = parity;
+    lineCoding->bDataBits = databits;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCLineCoding.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCLineCoding.h
new file mode 100644
index 00000000..751d7bfc
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCLineCoding.h
@@ -0,0 +1,141 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Line coding structure used for by the CDC GetLineCoding and SetLineCoding
+ requests.
+
+ !!!Usage
+
+ -# Initialize a CDCLineCoding instance using CDCLineCoding_Initialize.
+ -# Send a CDCLineCoding object to the host in response to a GetLineCoding
+    request.
+ -# Receive a CDCLineCoding object from the host after a SetLineCoding
+    request.
+*/
+
+#ifndef CDCLINECODING_H
+#define CDCLINECODING_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC LineCoding StopBits"
+/// This page lists Stop Bits for CDC Line Coding.
+///
+/// !Stop bits
+/// - CDCLineCoding_ONESTOPBIT
+/// - CDCLineCoding_ONE5STOPBIT
+/// - CDCLineCoding_TWOSTOPBITS
+
+/// The transmission protocol uses one stop bit.
+#define CDCLineCoding_ONESTOPBIT            0
+/// The transmission protocol uses 1.5 stop bit.
+#define CDCLineCoding_ONE5STOPBIT           1
+/// The transmissin protocol uses two stop bits.
+#define CDCLineCoding_TWOSTOPBITS           2
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC LineCoding ParityCheckings"
+/// This page lists Parity checkings for CDC Line Coding.
+///
+/// !Parity checking
+/// - CDCLineCoding_NOPARITY
+/// - CDCLineCoding_ODDPARITY
+/// - CDCLineCoding_EVENPARITY
+/// - CDCLineCoding_MARKPARITY
+/// - CDCLineCoding_SPACEPARITY
+
+/// No parity checking.
+#define CDCLineCoding_NOPARITY              0
+/// Odd parity checking.
+#define CDCLineCoding_ODDPARITY             1
+/// Even parity checking.
+#define CDCLineCoding_EVENPARITY            2
+/// Mark parity checking.
+#define CDCLineCoding_MARKPARITY            3
+/// Space parity checking.
+#define CDCLineCoding_SPACEPARITY           4
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+#ifdef __ICCARM__          // IAR
+#pragma pack(1)            // IAR
+#define __attribute__(...) // IAR
+#endif                     // IAR
+
+//------------------------------------------------------------------------------
+/// Format of the data returned when a GetLineCoding request is received.
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// Data terminal rate in bits per second.
+    unsigned int dwDTERate;
+    /// Number of stop bits.
+    /// \sa "CDC LineCoding StopBits".
+    char bCharFormat;
+    /// Type of parity checking used.
+    /// \sa "CDC LineCoding ParityCheckings".
+    char bParityType;
+    /// Number of data bits (5, 6, 7, 8 or 16).
+    char bDataBits;
+
+} __attribute__ ((packed)) CDCLineCoding; // GCC
+
+#ifdef __ICCARM__          // IAR
+#pragma pack()             // IAR
+#endif                     // IAR
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern void CDCLineCoding_Initialize(CDCLineCoding *lineCoding,
+                                     unsigned int bitrate,
+                                     unsigned char stopbits,
+                                     unsigned char parity,
+                                     unsigned char databits);
+
+#endif //#ifndef CDCLINECODING_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCSetControlLineStateRequest.c b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCSetControlLineStateRequest.c
new file mode 100644
index 00000000..4dab2ef5
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCSetControlLineStateRequest.c
@@ -0,0 +1,89 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ CDCSetControlLineStateRequest.c
+
+ !!!Purpose
+
+ Implementation of the CDCSetControlLineStateRequest class.
+*/
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "CDCSetControlLineStateRequest.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Notifies if the given request indicates that the DTE signal is present.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return 1 if the DTE signal is present, otherwise 0.
+//------------------------------------------------------------------------------
+unsigned char CDCSetControlLineStateRequest_IsDtePresent(
+    const USBGenericRequest *request)
+{
+    if ((USBGenericRequest_GetValue(request) & 0x0001) != 0) {
+
+        return 1;
+    }
+    else {
+
+        return 0;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Notifies if the given request indicates that the device carrier should
+/// be activated.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return 1 is the device should activate its carrier, 0 otherwise.
+//------------------------------------------------------------------------------
+unsigned char CDCSetControlLineStateRequest_ActivateCarrier(
+    const USBGenericRequest *request)
+{
+    if ((USBGenericRequest_GetValue(request) & 0x0002) != 0) {
+
+        return 1;
+    }
+    else {
+
+        return 0;
+    }
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCSetControlLineStateRequest.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCSetControlLineStateRequest.h
new file mode 100644
index 00000000..ee832ff9
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCSetControlLineStateRequest.h
@@ -0,0 +1,64 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Definition of a class for manipulating SetControlLineState requests.
+*/
+
+#ifndef CDCSETCONTROLLINESTATE_H
+#define CDCSETCONTROLLINESTATE_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <usb/common/core/USBGenericRequest.h>
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern unsigned char CDCSetControlLineStateRequest_IsDtePresent(
+    const USBGenericRequest *request);
+
+
+extern unsigned char CDCSetControlLineStateRequest_ActivateCarrier(
+    const USBGenericRequest *request);
+
+#endif //#ifndef CDCSETCONTROLLINESTATE_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCUnionDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCUnionDescriptor.h
new file mode 100644
index 00000000..25ecb416
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/cdc/CDCUnionDescriptor.h
@@ -0,0 +1,84 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Definition of a class for manipulating CDC union descriptors.
+
+ !!!Usage
+
+ Should be included in the list of USB descriptor used for a device
+ configuration.
+*/
+
+#ifndef CDCUNIONDESCRIPTOR_H
+#define CDCUNIONDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+#ifdef __ICCARM__          // IAR
+#pragma pack(1)            // IAR
+#define __attribute__(...) // IAR
+#endif                     // IAR
+
+//------------------------------------------------------------------------------
+/// Describes the relationship between a group of interfaces that can
+/// be considered to form a functional unit.
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// Size of the descriptor in bytes.
+    unsigned char bFunctionLength;
+    /// Descriptor type (CDCDescriptors_INTERFACE).
+    unsigned char bDescriptorType;
+    /// Descriptor subtype (CDCDescriptors_UNION).
+    unsigned char bDescriptorSubtype;
+    /// Number of the master interface for this union.
+    unsigned char bMasterInterface;
+    /// Number of the first slave interface for this union.
+    unsigned char bSlaveInterface0;
+
+} __attribute__ ((packed)) CDCUnionDescriptor; // GCC
+
+#ifdef __ICCARM__          // IAR
+#pragma pack()             // IAR
+#endif                     // IAR
+
+#endif //#ifndef CDCUNIONDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBConfigurationDescriptor.c b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBConfigurationDescriptor.c
new file mode 100644
index 00000000..b7ae2706
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBConfigurationDescriptor.c
@@ -0,0 +1,169 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+    Title: USBConfigurationDescriptor implementation
+
+    About: Purpose
+        Implementation of the USBConfigurationDescriptor class.
+*/
+
+//-----------------------------------------------------------------------------
+//         Headers
+//-----------------------------------------------------------------------------
+
+#include "USBConfigurationDescriptor.h"
+
+//-----------------------------------------------------------------------------
+//         Exported functions
+//-----------------------------------------------------------------------------
+
+//-----------------------------------------------------------------------------
+/// Returns the total length of a configuration, i.e. including the 
+/// descriptors following it.
+/// \param configuration Pointer to a USBConfigurationDescriptor instance.
+/// \return Total length (in bytes) of the configuration.
+//-----------------------------------------------------------------------------
+unsigned int USBConfigurationDescriptor_GetTotalLength(
+    const USBConfigurationDescriptor *config)
+{
+    return config->wTotalLength;
+}
+
+//-----------------------------------------------------------------------------
+/// Returns the number of interfaces in a configuration.
+/// \param configuration Pointer to a USBConfigurationDescriptor instance.
+/// \return Number of interfaces in configuration.
+//-----------------------------------------------------------------------------
+unsigned char USBConfigurationDescriptor_GetNumInterfaces(
+    const USBConfigurationDescriptor *config)
+{
+    return config->bNumInterfaces;
+}
+
+//-----------------------------------------------------------------------------
+/// Indicates if the device is self-powered when in a given configuration.
+/// \param configuration Pointer to a USBConfigurationDescriptor instance.
+/// \return 1 if the device is self-powered when in the given configuration;
+///         otherwise 0.
+//-----------------------------------------------------------------------------
+unsigned char USBConfigurationDescriptor_IsSelfPowered(
+    const USBConfigurationDescriptor *config)
+{
+    if ((config->bmAttributes & (1 << 6)) != 0) {
+
+        return 1;
+    }
+    else {
+
+        return 0;
+    }
+}
+
+//-----------------------------------------------------------------------------
+/// Parses the given Configuration descriptor (followed by relevant
+/// interface, endpoint and class-specific descriptors) into three arrays.
+/// *Each array must have its size equal or greater to the number of
+/// descriptors it stores plus one*. A null-value is inserted after the last
+/// descriptor of each type to indicate the array end.
+///
+/// Note that if the pointer to an array is null (0), nothing is stored in
+/// it.
+/// \param configuration Pointer to the start of the whole Configuration 
+///                      descriptor.
+/// \param interfaces    Pointer to the Interface descriptor array.
+/// \param epoints     Pointer to the Endpoint descriptor array.
+/// \param others        Pointer to the class-specific descriptor array.
+//-----------------------------------------------------------------------------
+void USBConfigurationDescriptor_Parse(
+    const USBConfigurationDescriptor *config,
+    USBInterfaceDescriptor **interfaces,
+    USBEndpointDescriptor **epoints,
+    USBGenericDescriptor **others)
+{
+    int size;
+    USBGenericDescriptor *descriptor;
+    // Get size of configuration to parse
+    size = USBConfigurationDescriptor_GetTotalLength(config);
+    size -= sizeof(USBConfigurationDescriptor);
+
+    // Start parsing descriptors
+    descriptor = (USBGenericDescriptor *) config;
+    while (size > 0) {
+
+        // Get next descriptor
+        descriptor = USBGenericDescriptor_GetNextDescriptor(descriptor);
+        size -= USBGenericDescriptor_GetLength(descriptor);
+
+        // Store descriptor in correponding array
+        if (USBGenericDescriptor_GetType(descriptor)
+             == USBGenericDescriptor_INTERFACE) {
+
+            if (interfaces) {
+            
+                *interfaces = (USBInterfaceDescriptor *) descriptor;
+                interfaces++;
+            }
+        }
+        else if (USBGenericDescriptor_GetType(descriptor)
+                  == USBGenericDescriptor_ENDPOINT) {
+
+            if (epoints) {
+                
+                *epoints = (USBEndpointDescriptor *) descriptor;
+                epoints++;
+            }
+        }
+        else if (others) {
+
+            *others = descriptor;
+            others++;
+        }
+    }
+
+    // Null-terminate arrays
+    if (interfaces) {
+
+        *interfaces = 0;
+    }
+    if (epoints) {
+
+        *epoints = 0;
+    }
+    if (others) {
+
+        *others = 0;
+    }
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBConfigurationDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBConfigurationDescriptor.h
new file mode 100644
index 00000000..d5192b6b
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBConfigurationDescriptor.h
@@ -0,0 +1,155 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+ !!!Purpose
+ 
+    Definitions and methods for USB configuration descriptor structures
+    described by the USB specification.
+
+ !!!Usage
+
+    -# Declare USBConfigurationDescriptor instance as a part
+       of the configuration descriptors of a USB device.
+    -# To get useful information (field values) from the defined USB device
+       configuration descriptor, use
+       - USBConfigurationDescriptor_GetTotalLength
+       - USBConfigurationDescriptor_GetNumInterfaces
+       - USBConfigurationDescriptor_IsSelfPowered
+    -# To pase the defined USB device configuration descriptor, use
+       - USBConfigurationDescriptor_Parse
+*/
+
+#ifndef USBCONFIGURATIONDESCRIPTOR_H
+#define USBCONFIGURATIONDESCRIPTOR_H
+
+//-----------------------------------------------------------------------------
+//         Headers
+//-----------------------------------------------------------------------------
+
+#include "USBGenericDescriptor.h"
+#include "USBInterfaceDescriptor.h"
+#include "USBEndpointDescriptor.h"
+
+//-----------------------------------------------------------------------------
+//         Definitions
+//-----------------------------------------------------------------------------
+
+//-----------------------------------------------------------------------------
+/// \page "USB device Attributes"
+///
+/// This page lists the codes of the usb attributes.
+///
+/// !Attributes
+/// - USBConfigurationDescriptor_BUSPOWERED_NORWAKEUP
+/// - USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP
+/// - USBConfigurationDescriptor_BUSPOWERED_RWAKEUP
+/// - USBConfigurationDescriptor_SELFPOWERED_RWAKEUP
+/// - USBConfigurationDescriptor_POWER
+
+/// Device is bus-powered and not support remote wake-up.
+#define USBConfigurationDescriptor_BUSPOWERED_NORWAKEUP  0x80
+/// Device is self-powered and not support remote wake-up.
+#define USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP 0xC0
+/// Device is bus-powered  and supports remote wake-up.
+#define USBConfigurationDescriptor_BUSPOWERED_RWAKEUP    0xA0
+/// Device is self-powered and supports remote wake-up.
+#define USBConfigurationDescriptor_SELFPOWERED_RWAKEUP   0xE0
+
+/// Calculates the value of the power consumption field given the value in mA.
+/// \param power The power consumption value in mA
+/// \return The value that should be set to the field in descriptor
+#define USBConfigurationDescriptor_POWER(power)     (power / 2)
+//-----------------------------------------------------------------------------
+
+//-----------------------------------------------------------------------------
+//         Types
+//-----------------------------------------------------------------------------
+
+#ifdef __ICCARM__          // IAR
+#pragma pack(1)            // IAR
+#define __attribute__(...) // IAR
+#endif                     // IAR
+
+//-----------------------------------------------------------------------------
+/// USB standard configuration descriptor structure.
+//-----------------------------------------------------------------------------
+typedef struct {
+
+   /// Size of the descriptor in bytes.
+   unsigned char bLength;
+   /// Descriptor type (USBDESC_CONFIGURATION of "USB Descriptor types").
+   unsigned char bDescriptorType;
+   /// Length of all descriptors returned along with this configuration
+   /// descriptor.
+   unsigned short wTotalLength;
+   /// Number of interfaces in this configuration.
+   unsigned char bNumInterfaces;
+   /// Value for selecting this configuration.
+   unsigned char bConfigurationValue; 
+   /// Index of the configuration string descriptor.
+   unsigned char iConfiguration;
+   /// Configuration characteristics.
+   unsigned char bmAttributes;
+   /// Maximum power consumption of the device when in this configuration.
+   unsigned char bMaxPower;           
+                                       
+} __attribute__ ((packed)) USBConfigurationDescriptor; // GCC
+
+#ifdef __ICCARM__          // IAR
+#pragma pack()             // IAR
+#endif                     // IAR
+
+//-----------------------------------------------------------------------------
+//         Exported functions
+//-----------------------------------------------------------------------------
+
+extern unsigned int USBConfigurationDescriptor_GetTotalLength(
+    const USBConfigurationDescriptor *config);
+
+extern unsigned char USBConfigurationDescriptor_GetNumInterfaces(
+    const USBConfigurationDescriptor *config);
+
+extern unsigned char USBConfigurationDescriptor_IsSelfPowered(
+    const USBConfigurationDescriptor *config);
+
+extern void USBConfigurationDescriptor_Parse(
+    const USBConfigurationDescriptor *config,
+    USBInterfaceDescriptor **interfaces,
+    USBEndpointDescriptor **endpoints,
+    USBGenericDescriptor **others);
+
+#endif //#ifndef USBCONFIGURATIONDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBDeviceDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBDeviceDescriptor.h
new file mode 100644
index 00000000..67cd7420
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBDeviceDescriptor.h
@@ -0,0 +1,130 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+ !!!Purpose
+
+    Class for manipulating USB device descriptors.
+
+ !!!Usage
+
+    - Declare a USBDeviceDescriptor instance as the device descriptor of a
+      USB device.
+*/
+
+#ifndef USBDEVICEDESCRIPTOR_H
+#define USBDEVICEDESCRIPTOR_H
+
+#include <board.h>
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB release numbers"
+///
+/// This page lists the codes of USB release numbers.
+///
+/// !Code
+/// - USBDeviceDescriptor_USB2_00
+
+/// The device supports USB 2.00.
+#define USBDeviceDescriptor_USB2_00         0x0200
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+#ifdef __ICCARM__          // IAR
+#pragma pack(1)            // IAR
+#define __attribute__(...) // IAR
+#endif                     // IAR
+
+//------------------------------------------------------------------------------
+/// USB standard device descriptor structure.
+//------------------------------------------------------------------------------
+typedef struct {
+
+   /// Size of this descriptor in bytes.
+   unsigned char bLength;
+   /// Descriptor type (USBGenericDescriptor_DEVICE).
+   unsigned char bDescriptorType;
+   /// USB specification release number in BCD format.
+   unsigned short bcdUSB;
+   /// Device class code.
+   unsigned char bDeviceClass;
+   /// Device subclass code.
+   unsigned char bDeviceSubClass;
+   /// Device protocol code.
+   unsigned char bDeviceProtocol;
+   /// Maximum packet size of endpoint 0 (in bytes).
+   unsigned char bMaxPacketSize0;
+   /// Vendor ID.
+   unsigned short idVendor;
+   /// Product ID.
+   unsigned short idProduct;
+   /// Device release number in BCD format.
+   unsigned short bcdDevice;
+   /// Index of the manufacturer string descriptor.
+   unsigned char iManufacturer;
+   /// Index of the product string descriptor.
+   unsigned char iProduct;
+   /// Index of the serial number string descriptor.
+   unsigned char iSerialNumber;
+   /// Number of possible configurations for the device.
+   unsigned char bNumConfigurations;
+
+} __attribute__ ((packed)) USBDeviceDescriptor; // GCC
+
+#if defined(BOARD_USB_OTGHS)
+typedef struct {
+
+   /// Size of this descriptor in bytes.
+   unsigned char bLength;
+   /// Descriptor type (USBGenericDescriptor_OTG).
+   unsigned char bDescriptorType;
+   /// Attribute Fields D7…2: Reserved D1: HNP support D0: SRP support
+   unsigned char bmAttributes;
+
+} __attribute__ ((packed)) USBOtgDescriptor; // GCC
+#endif
+
+#ifdef __ICCARM__          // IAR
+#pragma pack()             // IAR
+#endif                     // IAR
+
+#endif //#ifndef USBDEVICEDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBDeviceQualifierDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBDeviceQualifierDescriptor.h
new file mode 100644
index 00000000..7e8d8664
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBDeviceQualifierDescriptor.h
@@ -0,0 +1,94 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+   Class for manipulating USB device qualifier descriptors.
+
+ !!!Usage
+
+   - Declare a USBDeviceQualifierDescriptor instance as the device qualifier
+     descriptor of a USB device.
+*/
+
+#ifndef USBDEVICEQUALIFIERDESCRIPTOR_H
+#define USBDEVICEQUALIFIERDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+#ifdef __ICCARM__          // IAR
+#pragma pack(1)            // IAR
+#define __attribute__(...) // IAR
+#endif                     // IAR
+
+//------------------------------------------------------------------------------
+/// Alternate device descriptor indicating the capabilities of the device
+/// in full-speed, if currently in high-speed; or in high-speed, if it is
+/// currently in full-speed. Only relevant for devices supporting the
+/// high-speed mode.
+//------------------------------------------------------------------------------
+typedef struct {
+
+   /// Size of the descriptor in bytes.
+   unsigned char bLength;
+   /// Descriptor type (USBDESC_DEVICE_QUALIFIER or "USB device types").
+   unsigned char bDescriptorType;
+   /// USB specification release number (in BCD format).
+   unsigned short bcdUSB;
+   /// Device class code.
+   unsigned char bDeviceClass;
+   /// Device subclass code.
+   unsigned char bDeviceSubClass;
+   /// Device protocol code.
+   unsigned char bDeviceProtocol;
+   /// Maximum packet size of endpoint 0.
+   unsigned char bMaxPacketSize0;
+   /// Number of possible configurations for the device.
+   unsigned char bNumConfigurations;
+   /// Reserved.
+   unsigned char bReserved;         
+
+} __attribute__ ((packed)) USBDeviceQualifierDescriptor; // GCC
+
+#ifdef __ICCARM__          // IAR
+#pragma pack()             // IAR
+#endif                     // IAR
+
+#endif //#ifndef USBDEVICEQUALIFIERDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBEndpointDescriptor.c b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBEndpointDescriptor.c
new file mode 100644
index 00000000..f5f341f1
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBEndpointDescriptor.c
@@ -0,0 +1,114 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+    Title: USBEndpointDescriptor implementation
+
+    About: Purpose
+        Implementation of the USBEndpointDescriptor class.
+*/
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBEndpointDescriptor.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Returns the number of an endpoint given its descriptor.
+/// \param endpoint Pointer to a USBEndpointDescriptor instance.
+/// \return Endpoint number.
+//------------------------------------------------------------------------------
+unsigned char USBEndpointDescriptor_GetNumber(
+    const USBEndpointDescriptor *endpoint)
+{
+    return endpoint->bEndpointAddress & 0xF;
+}
+
+//------------------------------------------------------------------------------
+/// Returns the direction of an endpoint given its descriptor.
+/// \param endpoint Pointer to a USBEndpointDescriptor instance.
+/// \return Endpoint direction (see <Endpoint directions>).
+//------------------------------------------------------------------------------
+unsigned char USBEndpointDescriptor_GetDirection(
+    const USBEndpointDescriptor *endpoint)
+{
+    if ((endpoint->bEndpointAddress & 0x80) != 0) {
+
+        return USBEndpointDescriptor_IN;
+    }
+    else {
+
+        return USBEndpointDescriptor_OUT;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Returns the type of an endpoint given its descriptor.
+/// \param endpoint Pointer to a USBEndpointDescriptor instance.
+/// \return Endpoint type (see <Endpoint types>).
+//------------------------------------------------------------------------------
+unsigned char USBEndpointDescriptor_GetType(
+    const USBEndpointDescriptor *endpoint)
+{
+    return endpoint->bmAttributes & 0x3;
+}
+
+//------------------------------------------------------------------------------
+/// Returns the maximum size of a packet (in bytes) on an endpoint given
+/// its descriptor.
+/// \param endpoint - Pointer to a USBEndpointDescriptor instance.
+/// \return Maximum packet size of endpoint.
+//------------------------------------------------------------------------------
+unsigned short USBEndpointDescriptor_GetMaxPacketSize(
+    const USBEndpointDescriptor *endpoint)
+{
+    return endpoint->wMaxPacketSize;
+}
+
+//------------------------------------------------------------------------------
+/// Returns the polling interval on an endpoint given its descriptor.
+/// \param endpoint - Pointer to a USBEndpointDescriptor instance.
+/// \return Polling interval of endpoint.
+//------------------------------------------------------------------------------
+unsigned char USBEndpointDescriptor_GetInterval(
+    const USBEndpointDescriptor *endpoint)
+{
+    return endpoint->bInterval;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBEndpointDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBEndpointDescriptor.h
new file mode 100644
index 00000000..22d90e01
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBEndpointDescriptor.h
@@ -0,0 +1,229 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+    Definition of a class for handling USB endpoint descriptors.
+
+ !!!Usage
+
+    -# Declare USBEndpointDescriptor instance as a part of the
+       configuration descriptors of a USB device.
+    -# To get useful information (field values) from the defined USB device
+       endpoint descriptor (to configure hardware for endpoints, etc), use
+       - USBEndpointDescriptor_GetNumber
+       - USBEndpointDescriptor_GetDirection
+       - USBEndpointDescriptor_GetType
+       - USBEndpointDescriptor_GetMaxPacketSize
+*/
+
+#ifndef USBENDPOINTDESCRIPTOR_H
+#define USBENDPOINTDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Endpoint definitions"
+///
+/// This page lists definitions and macro for endpoint descriptors.
+///
+/// - USB Endpoint directions
+///    - USBEndpointDescriptor_OUT 
+///    - USBEndpointDescriptor_IN
+///
+/// - USB Endpoint types
+///    - USBEndpointDescriptor_CONTROL
+///    - USBEndpointDescriptor_ISOCHRONOUS
+///    - USBEndpointDescriptor_BULK
+///    - USBEndpointDescriptor_INTERRUPT
+///
+/// - USB Endpoint maximun sizes
+///    - USBEndpointDescriptor_MAXCTRLSIZE_FS
+///    - USBEndpointDescriptor_MAXCTRLSIZE_HS
+///    - USBEndpointDescriptor_MAXBULKSIZE_FS
+///    - USBEndpointDescriptor_MAXBULKSIZE_HS
+///    - USBEndpointDescriptor_MAXINTERRUPTSIZE_FS
+///    - USBEndpointDescriptor_MAXINTERRUPTSIZE_HS
+///    - USBEndpointDescriptor_MAXISOCHRONOUSSIZE_FS
+///    - USBEndpointDescriptor_MAXISOCHRONOUSSIZE_HS
+///
+/// - USB Endpoint address define
+///    - USBEndpointDescriptor_ADDRESS
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Endpoint directions"
+///
+/// This page lists definitions of USB endpoint directions.
+///
+/// !Directions
+/// - USBEndpointDescriptor_OUT
+/// - USBEndpointDescriptor_IN
+
+/// Endpoint receives data from the host.
+#define USBEndpointDescriptor_OUT           0
+/// Endpoint sends data to the host.
+#define USBEndpointDescriptor_IN            1
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Endpoint types"
+///
+/// This page lists definitions of USB endpoint types.
+///
+/// !Types
+/// - USBEndpointDescriptor_CONTROL
+/// - USBEndpointDescriptor_ISOCHRONOUS
+/// - USBEndpointDescriptor_BULK
+/// - USBEndpointDescriptor_INTERRUPT
+
+/// Control endpoint type.
+#define USBEndpointDescriptor_CONTROL       0
+/// Isochronous endpoint type.
+#define USBEndpointDescriptor_ISOCHRONOUS   1
+/// Bulk endpoint type.
+#define USBEndpointDescriptor_BULK          2
+/// Interrupt endpoint type.
+#define USBEndpointDescriptor_INTERRUPT     3
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Endpoint maximun sizes"
+///
+/// This page lists definitions of USB endpoint maximun sizes.
+///
+/// !Sizes
+/// - USBEndpointDescriptor_MAXCTRLSIZE_FS
+/// - USBEndpointDescriptor_MAXCTRLSIZE_HS
+/// - USBEndpointDescriptor_MAXBULKSIZE_FS
+/// - USBEndpointDescriptor_MAXBULKSIZE_HS
+/// - USBEndpointDescriptor_MAXINTERRUPTSIZE_FS
+/// - USBEndpointDescriptor_MAXINTERRUPTSIZE_HS
+/// - USBEndpointDescriptor_MAXISOCHRONOUSSIZE_FS
+/// - USBEndpointDescriptor_MAXISOCHRONOUSSIZE_HS
+
+/// Maximum size for a full-speed control endpoint.
+#define USBEndpointDescriptor_MAXCTRLSIZE_FS                64
+/// Maximum size for a high-speed control endpoint.
+#define USBEndpointDescriptor_MAXCTRLSIZE_HS                64
+/// Maximum size for a full-speed bulk endpoint.
+#define USBEndpointDescriptor_MAXBULKSIZE_FS                64
+/// Maximum size for a high-speed bulk endpoint.
+#define USBEndpointDescriptor_MAXBULKSIZE_HS                512
+/// Maximum size for a full-speed interrupt endpoint.
+#define USBEndpointDescriptor_MAXINTERRUPTSIZE_FS           64
+/// Maximum size for a high-speed interrupt endpoint.
+#define USBEndpointDescriptor_MAXINTERRUPTSIZE_HS           1024
+/// Maximum size for a full-speed isochronous endpoint.
+#define USBEndpointDescriptor_MAXISOCHRONOUSSIZE_FS         1023
+/// Maximum size for a high-speed isochronous endpoint.
+#define USBEndpointDescriptor_MAXISOCHRONOUSSIZE_HS         1024
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Endpoint address define"
+///
+/// This page lists macro for USB endpoint address definition.
+///
+/// !Macro
+/// - USBEndpointDescriptor_ADDRESS
+
+/// Calculates the address of an endpoint given its number and direction
+/// \param direction USB endpoint direction definition
+/// \param number USB endpoint number
+/// \return The value used to set the endpoint descriptor based on input number
+///         and direction
+#define USBEndpointDescriptor_ADDRESS(direction, number) \
+    (((direction & 0x01) << 7) | (number & 0xF))
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+#ifdef __ICCARM__          // IAR
+#pragma pack(1)            // IAR
+#define __attribute__(...) // IAR
+#endif                     // IAR
+
+//------------------------------------------------------------------------------
+/// USB standard endpoint descriptor structure.
+//------------------------------------------------------------------------------
+typedef struct {
+
+   /// Size of the descriptor in bytes.
+   unsigned char bLength;
+   /// Descriptor type (<USBGenericDescriptor_ENDPOINT>).
+   unsigned char bDescriptorType;
+   /// Address and direction of the endpoint.
+   unsigned char bEndpointAddress;
+   /// Endpoint type and additional characteristics (for isochronous endpoints).
+   unsigned char bmAttributes;
+   /// Maximum packet size (in bytes) of the endpoint.
+   unsigned short wMaxPacketSize;
+   /// Polling rate of the endpoint.
+   unsigned char bInterval;
+
+} __attribute__ ((packed)) USBEndpointDescriptor; // GCC
+
+#ifdef __ICCARM__          // IAR
+#pragma pack()             // IAR
+#endif                     // IAR
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern unsigned char USBEndpointDescriptor_GetNumber(
+    const USBEndpointDescriptor *endpoint);
+
+extern unsigned char USBEndpointDescriptor_GetDirection(
+    const USBEndpointDescriptor *endpoint);
+
+extern unsigned char USBEndpointDescriptor_GetType(
+    const USBEndpointDescriptor *endpoint);
+
+extern unsigned short USBEndpointDescriptor_GetMaxPacketSize(
+    const USBEndpointDescriptor *endpoint);
+
+extern unsigned char USBEndpointDescriptor_GetInterval(
+    const USBEndpointDescriptor *endpoint);
+
+#endif //#ifndef USBENDPOINTDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBFeatureRequest.c b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBFeatureRequest.c
new file mode 100644
index 00000000..67a2460a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBFeatureRequest.c
@@ -0,0 +1,75 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+    Title: USBFeatureRequest implementation
+
+    About: Purpose
+        Implementation of the USBFeatureRequest class.
+*/
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBFeatureRequest.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Returns the feature selector of a given CLEAR_FEATURE or SET_FEATURE
+/// request.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return Feature selector.
+//------------------------------------------------------------------------------
+unsigned char USBFeatureRequest_GetFeatureSelector(
+    const USBGenericRequest *request)
+{
+    return USBGenericRequest_GetValue(request);
+}
+
+//------------------------------------------------------------------------------
+/// Indicates the test that the device must undertake following a
+/// SET_FEATURE request.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return Test selector.
+//------------------------------------------------------------------------------
+unsigned char USBFeatureRequest_GetTestSelector(
+    const USBGenericRequest *request)
+{
+    return (USBGenericRequest_GetIndex(request) >> 8) & 0xFF;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBFeatureRequest.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBFeatureRequest.h
new file mode 100644
index 00000000..b18f328c
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBFeatureRequest.h
@@ -0,0 +1,151 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+    Definition of a class for manipulating CLEAR_FEATURE and SET_FEATURE
+    requests.
+
+ !!!Usage
+
+    - To get USB feature request information (field values) from the
+      USBGenericRequest instance, use
+       - USBFeatureRequest_GetFeatureSelector
+       - USBFeatureRequest_GetTestSelector
+*/
+
+#ifndef USBFEATUREREQUEST_H
+#define USBFEATUREREQUEST_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBGenericRequest.h"
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Feature Request definitions"
+///
+/// This page lists codes of USB Feature Request
+///
+/// - USB Feature selectors
+///    - USBFeatureRequest_ENDPOINTHALT
+///    - USBFeatureRequest_DEVICEREMOTEWAKEUP
+///    - USBFeatureRequest_TESTMODE
+///
+/// - USB Test mode selectors
+///    - USBFeatureRequest_TESTJ
+///    - USBFeatureRequest_TESTK
+///    - USBFeatureRequest_TESTSE0NAK
+///    - USBFeatureRequest_TESTPACKET
+///    - USBFeatureRequest_TESTFORCEENABLE
+///    - USBFeatureRequest_TESTSENDZLP
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Feature selectors"
+///
+/// This page lists codes of USB feature selectors.
+///
+/// !Selectors
+/// - USBFeatureRequest_ENDPOINTHALT
+/// - USBFeatureRequest_DEVICEREMOTEWAKEUP
+/// - USBFeatureRequest_TESTMODE
+
+/// Halt feature of an endpoint.
+#define USBFeatureRequest_ENDPOINTHALT          0
+/// Remote wake-up feature of the device.
+#define USBFeatureRequest_DEVICEREMOTEWAKEUP    1
+/// Test mode of the device.
+#define USBFeatureRequest_TESTMODE              2
+/// OTG set feature
+#define USBFeatureRequest_OTG                0x0B
+//------------------------------------------------------------------------------
+
+/// On The Go Feature Selectors
+/// b_hnp_enable      3
+/// a_hnp_support     4
+/// a_alt_hnp_support 5
+#define USBFeatureRequest_OTG_B_HNP_ENABLE      3
+#define USBFeatureRequest_OTG_A_HNP_SUPPORT     4
+#define USBFeatureRequest_OTG_A_ALT_HNP_SUPPORT 5
+
+//------------------------------------------------------------------------------
+/// \page "USB Test mode selectors"
+///
+/// This page lists codes of USB high speed test mode selectors.
+///
+/// !Selectors
+/// - USBFeatureRequest_TESTJ
+/// - USBFeatureRequest_TESTK
+/// - USBFeatureRequest_TESTSE0NAK
+/// - USBFeatureRequest_TESTPACKET
+/// - USBFeatureRequest_TESTFORCEENABLE
+/// - USBFeatureRequest_TESTSENDZLP
+
+/// Tests the high-output drive level on the D+ line.
+#define USBFeatureRequest_TESTJ                 1
+/// Tests the high-output drive level on the D- line.
+#define USBFeatureRequest_TESTK                 2
+/// Tests the output impedance, low-level output voltage and loading
+/// characteristics.
+#define USBFeatureRequest_TESTSE0NAK            3
+/// Tests rise and fall times, eye patterns and jitter.
+#define USBFeatureRequest_TESTPACKET            4
+/// Tests the hub disconnect detection.
+#define USBFeatureRequest_TESTFORCEENABLE       5
+/// Send a ZLP in Test Mode.
+#define USBFeatureRequest_TESTSENDZLP           6
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern unsigned char USBFeatureRequest_GetFeatureSelector(
+    const USBGenericRequest *request);
+
+
+extern unsigned char USBFeatureRequest_GetTestSelector(
+    const USBGenericRequest *request);
+
+#endif //#ifndef USBFEATUREREQUEST_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericDescriptor.c b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericDescriptor.c
new file mode 100644
index 00000000..2972a8e7
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericDescriptor.c
@@ -0,0 +1,85 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+    Title: USBGenericDescriptor implementation
+
+    About: Purpose
+        Implementation of the USBGenericDescriptor class.
+*/
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBGenericDescriptor.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Returns the length of a descriptor.
+/// \param descriptor Pointer to a USBGenericDescriptor instance.
+/// \return Length of descriptor in bytes.
+//------------------------------------------------------------------------------
+unsigned int USBGenericDescriptor_GetLength(
+    const USBGenericDescriptor *descriptor)
+{
+    return descriptor->bLength;
+}
+
+//------------------------------------------------------------------------------
+/// Returns the type of a descriptor.
+/// \param descriptor Pointer to a USBGenericDescriptor instance.
+/// \return Type of descriptor.
+//------------------------------------------------------------------------------
+unsigned char USBGenericDescriptor_GetType(
+    const USBGenericDescriptor *descriptor)
+{
+    return descriptor->bDescriptorType;
+}
+
+//------------------------------------------------------------------------------
+/// Returns a pointer to the descriptor right after the given one, when
+/// parsing a Configuration descriptor.
+/// \param descriptor - Pointer to a USBGenericDescriptor instance.
+/// \return Pointer to the next descriptor.
+//------------------------------------------------------------------------------
+USBGenericDescriptor *USBGenericDescriptor_GetNextDescriptor(
+    const USBGenericDescriptor *descriptor)
+{
+    return (USBGenericDescriptor *)
+        (((char *) descriptor) + USBGenericDescriptor_GetLength(descriptor));
+}
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericDescriptor.h
new file mode 100644
index 00000000..d99a0371
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericDescriptor.h
@@ -0,0 +1,138 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !!!Purpose
+///
+/// Definition of a generic USB descriptor class.
+///
+/// !!!Usage
+///
+/// -# Declare or access USB descriptors by USBGenericDescriptor instance.
+/// -# To get usful information (field values) from the USB descriptors, use
+///    - USBGenericDescriptor_GetLength
+///    - USBGenericDescriptor_GetType
+/// -# To scan the descriptors, use
+///    - USBGenericDescriptor_GetNextDescriptor
+//------------------------------------------------------------------------------
+
+#ifndef USBGENERICDESCRIPTOR_H
+#define USBGENERICDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Descriptor types"
+///
+/// This page lists the codes of the usb descriptor types
+///
+/// !Types
+/// - USBGenericDescriptor_DEVICE
+/// - USBGenericDescriptor_CONFIGURATION
+/// - USBGenericDescriptor_STRING
+/// - USBGenericDescriptor_INTERFACE
+/// - USBGenericDescriptor_ENDPOINT
+/// - USBGenericDescriptor_DEVICEQUALIFIER
+/// - USBGenericDescriptor_OTHERSPEEDCONFIGURATION
+/// - USBGenericDescriptor_INTERFACEPOWER
+/// - USBGenericDescriptor_OTG
+/// - USBGenericDescriptor_DEBUG
+/// - USBGenericDescriptor_INTERFACEASSOCIATION
+
+/// Device descriptor type.
+#define USBGenericDescriptor_DEVICE                     1
+/// Configuration descriptor type.
+#define USBGenericDescriptor_CONFIGURATION              2
+/// String descriptor type.
+#define USBGenericDescriptor_STRING                     3
+/// Interface descriptor type.
+#define USBGenericDescriptor_INTERFACE                  4
+/// Endpoint descriptor type.
+#define USBGenericDescriptor_ENDPOINT                   5
+/// Device qualifier descriptor type.
+#define USBGenericDescriptor_DEVICEQUALIFIER            6
+/// Other speed configuration descriptor type.
+#define USBGenericDescriptor_OTHERSPEEDCONFIGURATION    7
+/// Interface power descriptor type.
+#define USBGenericDescriptor_INTERFACEPOWER             8
+/// On-The-Go descriptor type.
+#define USBGenericDescriptor_OTG                        9
+/// Debug descriptor type.
+#define USBGenericDescriptor_DEBUG                      10
+/// Interface association descriptor type.
+#define USBGenericDescriptor_INTERFACEASSOCIATION       11
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+#ifdef __ICCARM__          // IAR
+#pragma pack(1)            // IAR
+#define __attribute__(...) // IAR
+#endif                     // IAR
+
+/// Holds the few fields shared by all USB descriptors.
+typedef struct {
+
+    /// Length of the descriptor in bytes.
+    unsigned char bLength;
+    /// Descriptor type.
+    unsigned char bDescriptorType;
+
+} __attribute__ ((packed)) USBGenericDescriptor; // GCC
+
+#ifdef __ICCARM__          // IAR
+#pragma pack()             // IAR
+#endif                     // IAR
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern unsigned int USBGenericDescriptor_GetLength(
+    const USBGenericDescriptor *descriptor);
+
+extern unsigned char USBGenericDescriptor_GetType(
+    const USBGenericDescriptor *descriptor);
+
+extern USBGenericDescriptor *USBGenericDescriptor_GetNextDescriptor(
+    const USBGenericDescriptor *descriptor);
+
+#endif //#ifndef USBGENERICDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericRequest.c b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericRequest.c
new file mode 100644
index 00000000..0ef10dc4
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericRequest.c
@@ -0,0 +1,143 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+    Title: USBGenericRequest implementation
+
+    About: Purpose
+        Implementation of the USBGenericRequest class.
+*/
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBGenericRequest.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
+/// Returns the type of the given request.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return "USB Request Types"
+//------------------------------------------------------------------------------
+extern unsigned char USBGenericRequest_GetType(const USBGenericRequest *request)
+{
+    return ((request->bmRequestType >> 5) & 0x3);
+}
+
+//------------------------------------------------------------------------------
+/// Returns the request code of the given request.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return Request code.
+/// \sa "USB Request Codes"
+//------------------------------------------------------------------------------
+unsigned char USBGenericRequest_GetRequest(const USBGenericRequest *request)
+{
+    return request->bRequest;
+}
+
+//------------------------------------------------------------------------------
+/// Returns the wValue field of the given request.
+/// \param request - Pointer to a USBGenericRequest instance.
+/// \return Request value.
+//------------------------------------------------------------------------------
+unsigned short USBGenericRequest_GetValue(const USBGenericRequest *request)
+{
+    return request->wValue;
+}
+
+//------------------------------------------------------------------------------
+/// Returns the wIndex field of the given request.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return Request index;
+//------------------------------------------------------------------------------
+unsigned short USBGenericRequest_GetIndex(const USBGenericRequest *request)
+{
+    return request->wIndex;
+}
+
+//------------------------------------------------------------------------------
+/// Returns the expected length of the data phase following a request.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return Length of data phase.
+//------------------------------------------------------------------------------
+unsigned short USBGenericRequest_GetLength(const USBGenericRequest *request)
+{
+    return request->wLength;
+}
+
+//------------------------------------------------------------------------------
+/// Returns the endpoint number targetted by a given request.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return Endpoint number.
+//------------------------------------------------------------------------------
+unsigned char USBGenericRequest_GetEndpointNumber(
+    const USBGenericRequest *request)
+{
+    return USBGenericRequest_GetIndex(request) & 0xF;
+}
+
+//------------------------------------------------------------------------------
+/// Returns the intended recipient of a given request.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return Request recipient.
+/// \sa "USB Request Recipients"
+//------------------------------------------------------------------------------
+unsigned char USBGenericRequest_GetRecipient(const USBGenericRequest *request)
+{
+    // Recipient is in bits [0..4] of the bmRequestType field
+    return request->bmRequestType & 0xF;
+}
+
+//------------------------------------------------------------------------------
+/// Returns the direction of the data transfer following the given request.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return Transfer direction.
+/// \sa "USB Request Directions"
+//------------------------------------------------------------------------------
+unsigned char USBGenericRequest_GetDirection(const USBGenericRequest *request)
+{
+    // Transfer direction is located in bit D7 of the bmRequestType field
+    if ((request->bmRequestType & 0x80) != 0) {
+
+        return USBGenericRequest_IN;
+    }
+    else {
+
+        return USBGenericRequest_OUT;
+    }
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericRequest.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericRequest.h
new file mode 100644
index 00000000..9eb2d835
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGenericRequest.h
@@ -0,0 +1,249 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+    Definition of the USBGenericRequest class and its methods.
+
+ !!!Usage
+
+    -# Declare or access USB requests by USBGenericRequest instance.
+    -# To get usful information (field values) from the USB requests, use
+       - USBGenericRequest_GetType
+       - USBGenericRequest_GetRequest
+       - USBGenericRequest_GetValue
+       - USBGenericRequest_GetIndex
+       - USBGenericRequest_GetLength
+       - USBGenericRequest_GetEndpointNumber
+       - USBGenericRequest_GetRecipient
+       - USBGenericRequest_GetDirection
+*/
+
+#ifndef USBGENERICREQUEST_H
+#define USBGENERICREQUEST_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Generic Request definitions"
+///
+/// This page lists the codes of USB generic request.
+///
+/// - USB Request codes
+///    - USBGenericRequest_GETSTATUS
+///    - USBGenericRequest_CLEARFEATURE
+///    - USBGenericRequest_SETFEATURE
+///    - USBGenericRequest_SETADDRESS
+///    - USBGenericRequest_GETDESCRIPTOR
+///    - USBGenericRequest_SETDESCRIPTOR
+///    - USBGenericRequest_GETCONFIGURATION
+///    - USBGenericRequest_SETCONFIGURATION
+///    - USBGenericRequest_GETINTERFACE
+///    - USBGenericRequest_SETINTERFACE
+///    - USBGenericRequest_SYNCHFRAME
+///
+/// - USB Request Recipients
+///    - USBGenericRequest_DEVICE
+///    - USBGenericRequest_INTERFACE
+///    - USBGenericRequest_ENDPOINT
+///    - USBGenericRequest_OTHER
+///
+/// - USB Request Types
+///    - USBGenericRequest_STANDARD
+///    - USBGenericRequest_CLASS
+///    - USBGenericRequest_VENDOR
+///
+/// - USB Request Directions
+///    - USBGenericRequest_IN
+///    - USBGenericRequest_OUT
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Request codes"
+///
+/// This page lists the USB generic request codes.
+///
+/// !Codes
+/// - USBGenericRequest_GETSTATUS
+/// - USBGenericRequest_CLEARFEATURE
+/// - USBGenericRequest_SETFEATURE
+/// - USBGenericRequest_SETADDRESS
+/// - USBGenericRequest_GETDESCRIPTOR
+/// - USBGenericRequest_SETDESCRIPTOR
+/// - USBGenericRequest_GETCONFIGURATION
+/// - USBGenericRequest_SETCONFIGURATION
+/// - USBGenericRequest_GETINTERFACE
+/// - USBGenericRequest_SETINTERFACE
+/// - USBGenericRequest_SYNCHFRAME
+
+/// GET_STATUS request code.
+#define USBGenericRequest_GETSTATUS             0
+/// CLEAR_FEATURE request code.
+#define USBGenericRequest_CLEARFEATURE          1
+/// SET_FEATURE request code.
+#define USBGenericRequest_SETFEATURE            3
+/// SET_ADDRESS request code.
+#define USBGenericRequest_SETADDRESS            5
+/// GET_DESCRIPTOR request code.
+#define USBGenericRequest_GETDESCRIPTOR         6
+/// SET_DESCRIPTOR request code.
+#define USBGenericRequest_SETDESCRIPTOR         7
+/// GET_CONFIGURATION request code.
+#define USBGenericRequest_GETCONFIGURATION      8
+/// SET_CONFIGURATION request code.
+#define USBGenericRequest_SETCONFIGURATION      9
+/// GET_INTERFACE request code.
+#define USBGenericRequest_GETINTERFACE          10
+/// SET_INTERFACE request code.
+#define USBGenericRequest_SETINTERFACE          11
+/// SYNCH_FRAME request code.
+#define USBGenericRequest_SYNCHFRAME            12
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Request Recipients"
+///
+/// This page lists codes of USB request recipients.
+///
+/// !Recipients
+/// - USBGenericRequest_DEVICE
+/// - USBGenericRequest_INTERFACE
+/// - USBGenericRequest_ENDPOINT
+/// - USBGenericRequest_OTHER
+
+/// Recipient is the whole device.
+#define USBGenericRequest_DEVICE                0
+/// Recipient is an interface.
+#define USBGenericRequest_INTERFACE             1
+/// Recipient is an endpoint.
+#define USBGenericRequest_ENDPOINT              2
+/// Recipient is another entity.
+#define USBGenericRequest_OTHER                 3
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Request Types"
+///
+/// This page lists codes of USB request types.
+///
+/// !Types
+/// - USBGenericRequest_STANDARD
+/// - USBGenericRequest_CLASS
+/// - USBGenericRequest_VENDOR
+
+/// Request is standard.
+#define USBGenericRequest_STANDARD              0
+/// Request is class-specific.
+#define USBGenericRequest_CLASS                 1
+/// Request is vendor-specific.
+#define USBGenericRequest_VENDOR                2
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB Request Directions"
+///
+/// This page lists codes of USB request directions.
+///
+/// !Directions
+/// - USBGenericRequest_IN
+/// - USBGenericRequest_OUT
+
+/// Transfer occurs from device to the host.
+#define USBGenericRequest_OUT                   0
+/// Transfer occurs from the host to the device.
+#define USBGenericRequest_IN                    1
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Generic USB SETUP request sent over Control endpoints.
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// Type of request
+    /// \sa "USB Request Recipients"
+    /// \sa "USB Request Types"
+    /// \sa "USB Request Directions"
+    unsigned char bmRequestType:8;
+    /// Request code
+    /// \sa "USB Request Codes"
+    unsigned char bRequest:8;
+    /// Request-specific value parameter.
+    unsigned short wValue:16;
+    /// Request-specific index parameter.
+    unsigned short wIndex:16;
+    /// Expected length (in bytes) of the data phase.
+    unsigned short wLength:16;
+
+} USBGenericRequest;
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern unsigned char USBGenericRequest_GetType(
+    const USBGenericRequest *request);
+
+
+extern unsigned char USBGenericRequest_GetRequest(
+    const USBGenericRequest *request);
+
+extern unsigned short USBGenericRequest_GetValue(
+    const USBGenericRequest *request);
+
+extern unsigned short USBGenericRequest_GetIndex(
+    const USBGenericRequest *request);
+
+extern unsigned short USBGenericRequest_GetLength(
+    const USBGenericRequest *request);
+
+extern unsigned char USBGenericRequest_GetEndpointNumber(
+    const USBGenericRequest *request);
+
+extern unsigned char USBGenericRequest_GetRecipient(
+    const USBGenericRequest *request);
+
+extern unsigned char USBGenericRequest_GetDirection(
+    const USBGenericRequest *request);
+
+#endif //#ifndef USBGENERICREQUEST_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGetDescriptorRequest.c b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGetDescriptorRequest.c
new file mode 100644
index 00000000..13da8ff0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGetDescriptorRequest.c
@@ -0,0 +1,77 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+    Title: USBGetDescriptorRequest implementation
+
+    About: Purpose
+        Implementation of the USBGetDescriptorRequest class.
+*/
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBGetDescriptorRequest.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Returns the type of the descriptor requested by the host given the
+/// corresponding GET_DESCRIPTOR request.
+/// \param request Pointer to a USBGenericDescriptor instance.
+/// \return Type of the requested descriptor.
+//------------------------------------------------------------------------------
+unsigned char USBGetDescriptorRequest_GetDescriptorType(
+    const USBGenericRequest *request)
+{
+    // Requested descriptor type is in the high-byte of the wValue field
+    return (USBGenericRequest_GetValue(request) >> 8) & 0xFF;
+}
+
+//------------------------------------------------------------------------------
+/// Returns the index of the requested descriptor, given the corresponding
+/// GET_DESCRIPTOR request.
+/// \param request Pointer to a USBGenericDescriptor instance.
+/// \return Index of the requested descriptor.
+//------------------------------------------------------------------------------
+unsigned char USBGetDescriptorRequest_GetDescriptorIndex(
+    const USBGenericRequest *request)
+{
+    // Requested descriptor index if in the low byte of the wValue field
+    return USBGenericRequest_GetValue(request) & 0xFF;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGetDescriptorRequest.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGetDescriptorRequest.h
new file mode 100644
index 00000000..74116de4
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBGetDescriptorRequest.h
@@ -0,0 +1,72 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+    Definition of the USBGetDescriptorRequest class.
+
+ !!!Usage
+
+    - After a GET_DESCRIPTOR request has been received, retrive the useful
+      values with following functions:
+      - USBGetDescriptorRequest_GetDescriptorType: the descriptor type
+      - USBGetDescriptorRequest_GetDescriptorIndex: the index of the requested
+        descriptor
+
+*/
+
+#ifndef USBGETDESCRIPTORREQUEST_H
+#define USBGETDESCRIPTORREQUEST_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBGenericRequest.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern unsigned char USBGetDescriptorRequest_GetDescriptorType(
+    const USBGenericRequest *request);
+
+extern unsigned char USBGetDescriptorRequest_GetDescriptorIndex(
+    const USBGenericRequest *request);
+
+#endif //#ifndef USBGETDESCRIPTORREQUEST_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBInterfaceDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBInterfaceDescriptor.h
new file mode 100644
index 00000000..15255cf4
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBInterfaceDescriptor.h
@@ -0,0 +1,92 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+    Definition of a class for manipulating USB interface descriptors.
+
+ !!!Usage
+
+    - Declare USBInterfaceDescriptor instance as a part of the configuration
+      descriptors of a USB device.
+
+*/
+
+#ifndef USBINTERFACEDESCRIPTOR_H
+#define USBINTERFACEDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+#ifdef __ICCARM__          // IAR
+#pragma pack(1)            // IAR
+#define __attribute__(...) // IAR
+#endif                     // IAR
+
+//------------------------------------------------------------------------------
+/// USB standard interface descriptor structure.
+//------------------------------------------------------------------------------
+typedef struct {
+
+   /// Size of the descriptor in bytes.
+   unsigned char bLength;
+   /// Descriptor type (USBGenericDescriptor_INTERFACE).
+   unsigned char bDescriptorType;
+   /// Number of the interface in its configuration.
+   unsigned char bInterfaceNumber;
+   /// Value to select this alternate interface setting.
+   unsigned char bAlternateSetting;
+   /// Number of endpoints used by the inteface (excluding endpoint 0).
+   unsigned char bNumEndpoints;
+   /// Interface class code.
+   unsigned char bInterfaceClass;
+   /// Interface subclass code.
+   unsigned char bInterfaceSubClass;
+   /// Interface protocol code.
+   unsigned char bInterfaceProtocol;
+   /// Index of the interface string descriptor.
+   unsigned char iInterface;
+                                    
+} __attribute__ ((packed)) USBInterfaceDescriptor; // GCC
+
+#ifdef __ICCARM__          // IAR
+#pragma pack()             // IAR
+#endif                     // IAR
+
+#endif //#ifndef USBINTERFACEDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBInterfaceRequest.c b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBInterfaceRequest.c
new file mode 100644
index 00000000..1dd362d8
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBInterfaceRequest.c
@@ -0,0 +1,74 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+    Title: USBInterfaceRequest
+
+    About: Purpose
+        Implementation of USBInterfaceRequest class methods.
+*/
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBInterfaceRequest.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Indicates which interface is targetted by a GET_INTERFACE or
+/// SET_INTERFACE request.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return Interface number.
+//------------------------------------------------------------------------------
+unsigned char USBInterfaceRequest_GetInterface(const USBGenericRequest *request)
+{
+    return (USBGenericRequest_GetIndex(request) & 0xFF);
+}
+
+//------------------------------------------------------------------------------
+/// Indicates the new alternate setting that the interface targetted by a
+/// SET_INTERFACE request should use.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return New active setting for the interface.
+//------------------------------------------------------------------------------
+unsigned char USBInterfaceRequest_GetAlternateSetting(
+    const USBGenericRequest *request)
+{
+    return (USBGenericRequest_GetValue(request) & 0xFF);
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBInterfaceRequest.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBInterfaceRequest.h
new file mode 100644
index 00000000..409dd971
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBInterfaceRequest.h
@@ -0,0 +1,73 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+    Definitions for manipulating SET_INTERFACE and GET_INTERFACE request.
+
+ !!!Usage
+
+    -# After a SET_INTERFACE request has been received, retrieve the
+       target interface using USBInterfaceRequest_GetInterface and its
+       new alternate setting with USBInterfaceRequest_GetAlternateSetting.
+    -# After a GET_INTERFACE request has been received, retrieve the target
+       interface using USBInterfaceRequest_GetInterface.
+
+*/
+
+#ifndef USBINTERFACEREQUEST_H
+#define USBINTERFACEREQUEST_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBGenericRequest.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern unsigned char USBInterfaceRequest_GetInterface(
+    const USBGenericRequest *request);
+
+
+extern unsigned char USBInterfaceRequest_GetAlternateSetting(
+    const USBGenericRequest *request);
+
+#endif //#ifndef USBINTERFACEREQUEST_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetAddressRequest.c b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetAddressRequest.c
new file mode 100644
index 00000000..121c8513
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetAddressRequest.c
@@ -0,0 +1,61 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+    Title: USBSetAddressRequest implementation
+
+    About: Purpose
+        Implementation of the USBSetAddressRequest class.    
+*/
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBSetAddressRequest.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
+/// Returns the address that the device must take in response to a
+/// SET_ADDRESS request.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return New device address.
+//------------------------------------------------------------------------------
+unsigned char USBSetAddressRequest_GetAddress(const USBGenericRequest *request)
+{
+    return USBGenericRequest_GetValue(request) & 0x7F;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetAddressRequest.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetAddressRequest.h
new file mode 100644
index 00000000..36ba08f5
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetAddressRequest.h
@@ -0,0 +1,65 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+    Definition of a class for manipulating SET_ADDRESS USB requests.
+
+ !!!Usage
+
+    - After a SET_ADDRESS request has been received, retrive the new address
+      value with USBSetAddressRequest_GetAddress.
+*/
+
+#ifndef USBSETADDRESSREQUEST_H
+#define USBSETADDRESSREQUEST_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBGenericRequest.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern unsigned char USBSetAddressRequest_GetAddress(
+    const USBGenericRequest *request);
+
+#endif //#ifndef USBSETADDRESSREQUEST_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetConfigurationRequest.c b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetConfigurationRequest.c
new file mode 100644
index 00000000..28966dfd
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetConfigurationRequest.c
@@ -0,0 +1,63 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+    Title: USBSetConfigurationRequest implementation
+
+    About: Purpose
+        Implementation of the USBSetConfigurationRequest class.
+*/
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBSetConfigurationRequest.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Returns the number of the configuration that should be set in response
+/// to the given SET_CONFIGURATION request.
+/// \param request Pointer to a USBGenericRequest instance.
+/// \return Number of the requested configuration.
+//------------------------------------------------------------------------------
+unsigned char USBSetConfigurationRequest_GetConfiguration(
+    const USBGenericRequest *request)
+{
+    return USBGenericRequest_GetValue(request);
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetConfigurationRequest.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetConfigurationRequest.h
new file mode 100644
index 00000000..fd1e47fb
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBSetConfigurationRequest.h
@@ -0,0 +1,66 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+    Definition of a class for the Set Configuration request.
+
+ !!!Usage
+
+    - After a SET_CONFIGURATION request has been received, retrive the new
+      configuration value with USBSetConfigurationRequest_GetConfiguration.
+
+*/
+
+#ifndef USBSETCONFIGURATIONREQUEST_H
+#define USBSETCONFIGURATIONREQUEST_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBGenericRequest.h"
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern unsigned char USBSetConfigurationRequest_GetConfiguration(
+    const USBGenericRequest *request);
+
+#endif //#ifndef USBSETCONFIGURATIONREQUEST_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBStringDescriptor.h b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBStringDescriptor.h
new file mode 100644
index 00000000..71c04316
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/common/core/USBStringDescriptor.h
@@ -0,0 +1,79 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !!!Purpose
+///
+/// Definition of a class for manipulating String descriptors.
+//------------------------------------------------------------------------------
+
+#ifndef USBSTRINGDESCRIPTOR_H
+#define USBSTRINGDESCRIPTOR_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB String Descriptor definitions"
+///
+/// This page lists the codes and macros for USB string descriptor definition.
+///
+/// !Language IDs
+/// - USBStringDescriptor_ENGLISH_US
+///
+/// !String Descriptor Length
+/// - USBStringDescriptor_LENGTH
+///
+/// !ASCII to UNICODE convertion
+/// - USBStringDescriptor_UNICODE
+
+/// Language ID for US english.
+#define USBStringDescriptor_ENGLISH_US          0x09, 0x04
+
+/// Calculates the length of a string descriptor given the number of ascii
+/// characters/language IDs in it.
+/// \param length The ascii format string length.
+/// \return The actual data length in bytes.
+#define USBStringDescriptor_LENGTH(length)      ((length) * 2 + 2)
+/// Converts an ascii character to its unicode representation.
+/// \param ascii The ASCII character to convert
+/// \return A 2-byte-array for the UNICODE based on given ASCII
+#define USBStringDescriptor_UNICODE(ascii)      (ascii), 0
+//------------------------------------------------------------------------------
+
+#endif //#ifndef USBSTRINGDESCRIPTOR_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriver.c b/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriver.c
new file mode 100644
index 00000000..0e9e3944
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriver.c
@@ -0,0 +1,305 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+    Title: CDCDSerialDriver implementation
+
+    About: Purpose
+        Implementation of the CDCDSerialDriver class methods.
+*/
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "CDCDSerialDriver.h"
+#include "CDCDSerialDriverDescriptors.h"
+#include <utility/trace.h>
+#include <utility/assert.h>
+#include <usb/device/core/USBDDriver.h>
+#include <usb/common/cdc/CDCLineCoding.h>
+#include <usb/common/cdc/CDCGenericRequest.h>
+#include <usb/common/cdc/CDCSetControlLineStateRequest.h>
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// USB driver for a CDC class implementing a virtual COM serial connection.
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// Standard USBDDriver instance.
+    USBDDriver usbdDriver;
+    /// Current line coding (baudrate, parity, stop bits).
+    CDCLineCoding lineCoding;
+    /// Indicates if the RS232 carrier is active.
+    unsigned char isCarrierActivated;
+    /// Current serial port states
+    unsigned short serialState;
+
+} CDCDSerialDriver;
+
+//------------------------------------------------------------------------------
+//         Internal variables
+//------------------------------------------------------------------------------
+
+/// Static instance of the CDC serial driver.
+static CDCDSerialDriver cdcdSerialDriver;
+
+//------------------------------------------------------------------------------
+//         Internal functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Callback function which should be invoked after the data of a
+/// SetLineCoding request has been retrieved. Sends a zero-length packet
+/// to the host for acknowledging the request.
+//------------------------------------------------------------------------------
+static void CDCDSerialDriver_SetLineCodingCallback()
+{
+    USBD_Write(0, 0, 0, 0, 0);
+}
+
+//------------------------------------------------------------------------------
+/// Receives new line coding information from the USB host.
+//------------------------------------------------------------------------------
+static void CDCDSerialDriver_SetLineCoding()
+{
+    TRACE_INFO_WP("sLineCoding ");
+
+    USBD_Read(0,
+              (void *) &(cdcdSerialDriver.lineCoding),
+              sizeof(CDCLineCoding),
+              (TransferCallback) CDCDSerialDriver_SetLineCodingCallback,
+              0);
+}
+
+//------------------------------------------------------------------------------
+/// Sends the current line coding information to the host through Control
+/// endpoint 0.
+//------------------------------------------------------------------------------
+static void CDCDSerialDriver_GetLineCoding()
+{
+    TRACE_INFO_WP("gLineCoding ");
+
+    USBD_Write(0,
+               (void *) &(cdcdSerialDriver.lineCoding),
+               sizeof(CDCLineCoding),
+               0,
+               0);
+}
+
+//------------------------------------------------------------------------------
+/// Changes the state of the serial driver according to the information
+/// sent by the host via a SetControlLineState request, and acknowledges
+/// the request with a zero-length packet.
+//------------------------------------------------------------------------------
+static void CDCDSerialDriver_SetControlLineState(unsigned char activateCarrier,
+                                                 unsigned char isDTEPresent)
+{
+    TRACE_INFO_WP(
+              "sControlLineState(%d, %d) ",
+              activateCarrier,
+              isDTEPresent);
+
+    cdcdSerialDriver.isCarrierActivated = activateCarrier;
+    USBD_Write(0, 0, 0, 0, 0);
+}
+
+//------------------------------------------------------------------------------
+//         Optional RequestReceived() callback re-implementation
+//------------------------------------------------------------------------------
+#if !defined(NOAUTOCALLBACK)
+
+//------------------------------------------------------------------------------
+/// Re-implemented callback, invoked when a new USB Request is received.
+//------------------------------------------------------------------------------
+void USBDCallbacks_RequestReceived(const USBGenericRequest *request)
+{
+    CDCDSerialDriver_RequestHandler(request);
+}
+
+#endif
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Initializes the USB Device CDC serial driver & USBD Driver.
+//------------------------------------------------------------------------------
+void CDCDSerialDriver_Initialize()
+{
+    TRACE_INFO("CDCDSerialDriver_Initialize\n\r");
+    
+    // Initialize Abstract Control Model attributes
+    CDCLineCoding_Initialize(&(cdcdSerialDriver.lineCoding),
+                             115200,
+                             CDCLineCoding_ONESTOPBIT,
+                             CDCLineCoding_NOPARITY,
+                             8);
+    cdcdSerialDriver.isCarrierActivated = 0;
+    cdcdSerialDriver.serialState = 0;
+
+    // Initialize the standard driver
+    USBDDriver_Initialize(&(cdcdSerialDriver.usbdDriver),
+                          &cdcdSerialDriverDescriptors,
+                          0); // Multiple settings for interfaces not supported
+
+    // Initialize the USB driver
+    USBD_Init();
+}
+
+//------------------------------------------------------------------------------
+/// Handles CDC-specific SETUP requests. Should be called from a
+/// re-implementation of USBDCallbacks_RequestReceived() method.
+/// \param Pointer to a USBGenericRequest instance.
+//------------------------------------------------------------------------------
+void CDCDSerialDriver_RequestHandler(const USBGenericRequest *request)
+{
+    TRACE_INFO_WP("NewReq ");
+
+    // Handle the request
+    switch (USBGenericRequest_GetRequest(request)) {
+
+        case CDCGenericRequest_SETLINECODING:
+            
+            CDCDSerialDriver_SetLineCoding();
+            break;
+
+        case CDCGenericRequest_GETLINECODING:
+
+            CDCDSerialDriver_GetLineCoding();
+            break;
+
+        case CDCGenericRequest_SETCONTROLLINESTATE:
+
+            CDCDSerialDriver_SetControlLineState(
+                CDCSetControlLineStateRequest_ActivateCarrier(request),
+                CDCSetControlLineStateRequest_IsDtePresent(request));
+
+            break;
+
+        default:
+
+            USBDDriver_RequestHandler(&(cdcdSerialDriver.usbdDriver), request);
+            break;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Receives data from the host through the virtual COM port created by
+/// the CDC device serial driver. This function behaves like USBD_Read.
+/// \param data Pointer to the data buffer to put received data.
+/// \param size Size of the data buffer in bytes.
+/// \param callback Optional callback function to invoke when the transfer
+///                 finishes.
+/// \param argument Optional argument to the callback function.
+/// \return USBD_STATUS_SUCCESS if the read operation has been started normally;
+///         otherwise, the corresponding error code.
+//------------------------------------------------------------------------------
+unsigned char CDCDSerialDriver_Read(void *data,
+                                    unsigned int size,
+                                    TransferCallback callback,
+                                    void *argument)
+{
+    return USBD_Read(CDCDSerialDriverDescriptors_DATAOUT,
+                     data,
+                     size,
+                     callback,
+                     argument);
+}
+
+//------------------------------------------------------------------------------
+/// Sends a data buffer through the virtual COM port created by the CDC
+/// device serial driver. This function behaves exactly like USBD_Write.
+/// \param data Pointer to the data buffer to send.
+/// \param size Size of the data buffer in bytes.
+/// \param callback Optional callback function to invoke when the transfer
+///                 finishes.
+/// \param argument Optional argument to the callback function.
+/// \return USBD_STATUS_SUCCESS if the read operation has been started normally;
+///         otherwise, the corresponding error code.
+//------------------------------------------------------------------------------
+unsigned char CDCDSerialDriver_Write(void *data,
+                                     unsigned int size,
+                                     TransferCallback callback,
+                                     void *argument)
+{
+    return USBD_Write(CDCDSerialDriverDescriptors_DATAIN,
+                      data,
+                      size,
+                      callback,
+                      argument);
+}
+
+//------------------------------------------------------------------------------
+/// Returns the current status of the RS-232 line.
+//------------------------------------------------------------------------------
+unsigned short CDCDSerialDriver_GetSerialState()
+{
+    return cdcdSerialDriver.serialState;
+}
+
+//------------------------------------------------------------------------------
+/// Sets the current serial state of the device to the given value.
+/// \param serialState  New device state.
+//------------------------------------------------------------------------------
+void CDCDSerialDriver_SetSerialState(unsigned short serialState)
+{
+    ASSERT((serialState & 0xFF80) == 0,
+           "CDCDSerialDriver_SetSerialState: Bits D7-D15 are reserved\n\r");
+
+    // If new state is different from previous one, send a notification to the
+    // host
+    if (cdcdSerialDriver.serialState != serialState) {
+
+        cdcdSerialDriver.serialState = serialState;
+        USBD_Write(CDCDSerialDriverDescriptors_NOTIFICATION,
+                   &(cdcdSerialDriver.serialState),
+                   2,
+                   0,
+                   0);
+
+        // Reset one-time flags
+        cdcdSerialDriver.serialState &= ~(CDCDSerialDriver_STATE_OVERRUN
+                                          | CDCDSerialDriver_STATE_PARITY
+                                          | CDCDSerialDriver_STATE_FRAMING
+                                          | CDCDSerialDriver_STATE_RINGSIGNAL
+                                          | CDCDSerialDriver_STATE_BREAK);
+    }
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriver.h b/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriver.h
new file mode 100644
index 00000000..95e6aec3
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriver.h
@@ -0,0 +1,122 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Definition of a class for implementing a USB device CDC serial driver.
+
+ !!!Usage
+
+ -# Re-implement the USBDCallbacks_RequestReceived method to pass
+    received requests to CDCDSerialDriver_RequestHandler. *This is
+    automatically done unless the NOAUTOCALLBACK symbol is defined*.
+ -# Initialize the CDC serial and USB drivers using
+    CDCDSerialDriver_Initialize.
+ -# Logically connect the device to the host using USBD_Connect.
+ -# Send serial data to the USB host using CDCDSerialDriver_Write.
+ -# Receive serial data from the USB host using CDCDSerialDriver_Read.
+*/
+
+#ifndef CDCDSERIALDRIVER_H
+#define CDCDSERIALDRIVER_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <usb/common/core/USBGenericRequest.h>
+#include <usb/device/core/USBD.h>
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC Serial Port States"
+/// This page lists the bit map for CDC Serial Port States.
+///
+/// !BitMaps
+/// - CDCDSerialDriver_STATE_RXDRIVER
+/// - CDCDSerialDriver_STATE_TXCARRIER
+/// - CDCDSerialDriver_STATE_BREAK
+/// - CDCDSerialDriver_STATE_RINGSIGNAL
+/// - CDCDSerialDriver_STATE_FRAMING
+/// - CDCDSerialDriver_STATE_PARITY
+/// - CDCDSerialDriver_STATE_OVERRUN
+
+/// Indicates the receiver carrier signal is present.
+#define CDCDSerialDriver_STATE_RXDRIVER         (1 << 0)
+/// Indicates the transmission carrier signal is present.
+#define CDCDSerialDriver_STATE_TXCARRIER        (1 << 1)
+/// Indicates a break has been detected.
+#define CDCDSerialDriver_STATE_BREAK            (1 << 2)
+/// Indicates a ring signal has been detected.
+#define CDCDSerialDriver_STATE_RINGSIGNAL       (1 << 3)
+/// Indicates a framing error has occured.
+#define CDCDSerialDriver_STATE_FRAMING          (1 << 4)
+/// Indicates a parity error has occured.
+#define CDCDSerialDriver_STATE_PARITY           (1 << 5)
+/// Indicates a data overrun error has occured.
+#define CDCDSerialDriver_STATE_OVERRUN          (1 << 6)
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//      Exported functions
+//------------------------------------------------------------------------------
+
+extern void CDCDSerialDriver_Initialize();
+
+extern void CDCDSerialDriver_RequestHandler(const USBGenericRequest *request);
+
+extern unsigned char CDCDSerialDriver_Write(
+    void *data,
+    unsigned int size,
+    TransferCallback callback,
+    void *argument);
+
+extern unsigned char CDCDSerialDriver_Read(
+    void *data,
+    unsigned int size,
+    TransferCallback callback,
+    void *argument);
+
+extern unsigned short CDCDSerialDriver_GetSerialState();
+
+extern void CDCDSerialDriver_SetSerialState(unsigned short serialState);
+
+#endif //#ifndef CDCSERIALDRIVER_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriverDescriptors.c b/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriverDescriptors.c
new file mode 100644
index 00000000..dbd47c2a
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriverDescriptors.c
@@ -0,0 +1,675 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "CDCDSerialDriverDescriptors.h"
+#include <board.h>
+#include <usb/common/core/USBGenericDescriptor.h>
+#include <usb/common/core/USBConfigurationDescriptor.h>
+#include <usb/common/core/USBEndpointDescriptor.h>
+#include <usb/common/core/USBStringDescriptor.h>
+#include <usb/common/core/USBGenericRequest.h>
+#include <usb/common/cdc/CDCGenericDescriptor.h>
+#include <usb/common/cdc/CDCDeviceDescriptor.h>
+#include <usb/common/cdc/CDCCommunicationInterfaceDescriptor.h>
+#include <usb/common/cdc/CDCDataInterfaceDescriptor.h>
+#include <usb/common/cdc/CDCHeaderDescriptor.h>
+#include <usb/common/cdc/CDCCallManagementDescriptor.h>
+#include <usb/common/cdc/CDCAbstractControlManagementDescriptor.h>
+#include <usb/common/cdc/CDCUnionDescriptor.h>
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC Serial Device IDs"
+/// This page lists the IDs used in the CDC Serial Device Descriptor.
+///
+/// !IDs
+/// - CDCDSerialDriverDescriptors_PRODUCTID
+/// - CDCDSerialDriverDescriptors_VENDORID
+/// - CDCDSerialDriverDescriptors_RELEASE
+
+/// Device product ID.
+#define CDCDSerialDriverDescriptors_PRODUCTID       0x6124
+//#define CDCDSerialDriverDescriptors_PRODUCTID       0x6119
+/// Device vendor ID (Atmel).
+#define CDCDSerialDriverDescriptors_VENDORID        0x03EB
+/// Device release number.
+#define CDCDSerialDriverDescriptors_RELEASE         0x0100
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Macros
+//------------------------------------------------------------------------------
+
+/// Returns the minimum between two values.
+#define MIN(a, b)       ((a < b) ? a : b)
+
+//------------------------------------------------------------------------------
+//         Internal structures
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Configuration descriptor list for a device implementing a CDC serial driver.
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// Standard configuration descriptor.
+    USBConfigurationDescriptor config;
+#if defined(BOARD_USB_OTGHS)
+    // OTG descriptor
+    USBOtgDescriptor otgDescriptor;
+#endif
+    /// Communication interface descriptor.
+    USBInterfaceDescriptor  communication;
+    /// CDC header functional descriptor.
+    CDCHeaderDescriptor header;
+    /// CDC call management functional descriptor.
+    CDCCallManagementDescriptor callManagement;
+    /// CDC abstract control management functional descriptor.
+    CDCAbstractControlManagementDescriptor abstractControlManagement;
+    /// CDC union functional descriptor (with one slave interface).
+    CDCUnionDescriptor union1;
+    /// Notification endpoint descriptor.
+    USBEndpointDescriptor notification;
+    /// Data interface descriptor.
+    USBInterfaceDescriptor data;
+    /// Data OUT endpoint descriptor.
+    USBEndpointDescriptor dataOut;
+    /// Data IN endpoint descriptor.
+    USBEndpointDescriptor dataIn;
+
+} __attribute__ ((packed)) CDCDSerialDriverConfigurationDescriptors;
+
+//------------------------------------------------------------------------------
+//         Exported variables
+//------------------------------------------------------------------------------
+
+/// Standard USB device descriptor for the CDC serial driver
+const USBDeviceDescriptor deviceDescriptor = {
+
+    sizeof(USBDeviceDescriptor),
+    USBGenericDescriptor_DEVICE,
+    USBDeviceDescriptor_USB2_00,
+    CDCDeviceDescriptor_CLASS,
+    CDCDeviceDescriptor_SUBCLASS,
+    CDCDeviceDescriptor_PROTOCOL,
+    BOARD_USB_ENDPOINTS_MAXPACKETSIZE(0),
+    CDCDSerialDriverDescriptors_VENDORID,
+    CDCDSerialDriverDescriptors_PRODUCTID,
+    CDCDSerialDriverDescriptors_RELEASE,
+    0, // No string descriptor for manufacturer
+    1, // Index of product string descriptor is #1
+    0, // No string descriptor for serial number
+    1 // Device has 1 possible configuration
+};
+
+#if defined(BOARD_USB_UDPHS) || defined(BOARD_USB_OTGHS)
+
+/// USB device qualifier descriptor.
+const USBDeviceQualifierDescriptor qualifierDescriptor = {
+
+    sizeof(USBDeviceQualifierDescriptor),
+    USBGenericDescriptor_DEVICEQUALIFIER,
+    USBDeviceDescriptor_USB2_00,
+    CDCDeviceDescriptor_CLASS,
+    CDCDeviceDescriptor_SUBCLASS,
+    CDCDeviceDescriptor_PROTOCOL,
+    BOARD_USB_ENDPOINTS_MAXPACKETSIZE(0),
+    1, // Device has one possible configuration
+    0 // Reserved
+};
+
+#endif
+
+/// Standard USB configuration descriptor for the CDC serial driver
+const CDCDSerialDriverConfigurationDescriptors configurationDescriptors = {
+
+    // Standard configuration descriptor
+    {
+        sizeof(USBConfigurationDescriptor),
+        USBGenericDescriptor_CONFIGURATION,
+        sizeof(CDCDSerialDriverConfigurationDescriptors),
+        2, // There are two interfaces in this configuration
+        1, // This is configuration #1
+        0, // No string descriptor for this configuration
+        BOARD_USB_BMATTRIBUTES,
+        USBConfigurationDescriptor_POWER(100)
+    },
+#if defined(BOARD_USB_OTGHS)
+    // OTG descriptor
+    {
+        sizeof(USBOtgDescriptor),
+        USBGenericDescriptor_OTG,
+        USBOTGDescriptor_HNP_SRP
+    },
+#endif
+    // Communication class interface standard descriptor
+    {
+        sizeof(USBInterfaceDescriptor),
+        USBGenericDescriptor_INTERFACE,
+        0, // This is interface #0
+        0, // This is alternate setting #0 for this interface
+        1, // This interface uses 1 endpoint
+        CDCCommunicationInterfaceDescriptor_CLASS,
+        CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL,
+        CDCCommunicationInterfaceDescriptor_NOPROTOCOL,
+        0  // No string descriptor for this interface
+    },
+    // Class-specific header functional descriptor
+    {
+        sizeof(CDCHeaderDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_HEADER,
+        CDCGenericDescriptor_CDC1_10
+    },
+    // Class-specific call management functional descriptor
+    {
+        sizeof(CDCCallManagementDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_CALLMANAGEMENT,
+        CDCCallManagementDescriptor_SELFCALLMANAGEMENT,
+        0 // No associated data interface
+    },
+    // Class-specific abstract control management functional descriptor
+    {
+        sizeof(CDCAbstractControlManagementDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT,
+        CDCAbstractControlManagementDescriptor_LINE
+    },
+    // Class-specific union functional descriptor with one slave interface
+    {
+        sizeof(CDCUnionDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_UNION,
+        0, // Number of master interface is #0
+        1 // First slave interface is #1
+    },
+    // Notification endpoint standard descriptor
+    {
+        sizeof(USBEndpointDescriptor), 
+        USBGenericDescriptor_ENDPOINT,
+        USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,
+                                      CDCDSerialDriverDescriptors_NOTIFICATION),
+        USBEndpointDescriptor_INTERRUPT,
+        MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_NOTIFICATION),
+            USBEndpointDescriptor_MAXINTERRUPTSIZE_FS),
+        10 // Endpoint is polled every 10ms
+    },
+    // Data class interface standard descriptor
+    {
+        sizeof(USBInterfaceDescriptor),
+        USBGenericDescriptor_INTERFACE,
+        1, // This is interface #1
+        0, // This is alternate setting #0 for this interface
+        2, // This interface uses 2 endpoints
+        CDCDataInterfaceDescriptor_CLASS,
+        CDCDataInterfaceDescriptor_SUBCLASS,
+        CDCDataInterfaceDescriptor_NOPROTOCOL,
+        0  // No string descriptor for this interface
+    },
+    // Bulk-OUT endpoint standard descriptor
+    {
+        sizeof(USBEndpointDescriptor), 
+        USBGenericDescriptor_ENDPOINT,
+        USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_OUT,
+                                      CDCDSerialDriverDescriptors_DATAOUT),
+        USBEndpointDescriptor_BULK,
+        64,
+//        MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAOUT),
+//            USBEndpointDescriptor_MAXBULKSIZE_FS),
+        0 // Must be 0 for full-speed bulk endpoints
+    },
+    // Bulk-IN endpoint descriptor
+    {
+        sizeof(USBEndpointDescriptor),
+        USBGenericDescriptor_ENDPOINT,
+        USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,
+                                      CDCDSerialDriverDescriptors_DATAIN),
+        USBEndpointDescriptor_BULK,
+        64,
+//        MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAIN),
+//            USBEndpointDescriptor_MAXBULKSIZE_FS),
+        0 // Must be 0 for full-speed bulk endpoints
+    },
+};
+
+/// Language ID string descriptor
+const unsigned char languageIdStringDescriptor[] = {
+
+    USBStringDescriptor_LENGTH(1),
+    USBGenericDescriptor_STRING,
+    USBStringDescriptor_ENGLISH_US
+};
+
+#if defined(BOARD_USB_UDPHS) || defined(BOARD_USB_OTGHS)
+/// Other-speed configuration descriptor (when in full-speed).
+const CDCDSerialDriverConfigurationDescriptors otherSpeedDescriptorsFS = {
+
+    // Standard configuration descriptor
+    {
+        sizeof(USBConfigurationDescriptor),
+        USBGenericDescriptor_OTHERSPEEDCONFIGURATION,
+        sizeof(CDCDSerialDriverConfigurationDescriptors),
+        2, // There are two interfaces in this configuration
+        1, // This is configuration #1
+        0, // No string descriptor for this configuration
+        BOARD_USB_BMATTRIBUTES,
+        USBConfigurationDescriptor_POWER(100)
+    },
+#if defined(BOARD_USB_OTGHS)
+    // OTG descriptor
+    {
+        sizeof(USBOtgDescriptor),
+        USBGenericDescriptor_OTG,
+        USBOTGDescriptor_HNP_SRP
+    },
+#endif
+    // Communication class interface standard descriptor
+    {
+        sizeof(USBInterfaceDescriptor),
+        USBGenericDescriptor_INTERFACE,
+        0, // This is interface #0
+        0, // This is alternate setting #0 for this interface
+        1, // This interface uses 1 endpoint
+        CDCCommunicationInterfaceDescriptor_CLASS,
+        CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL,
+        CDCCommunicationInterfaceDescriptor_NOPROTOCOL,
+        0  // No string descriptor for this interface
+    },
+    // Class-specific header functional descriptor
+    {
+        sizeof(CDCHeaderDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_HEADER,
+        CDCGenericDescriptor_CDC1_10
+    },
+    // Class-specific call management functional descriptor
+    {
+        sizeof(CDCCallManagementDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_CALLMANAGEMENT,
+        CDCCallManagementDescriptor_SELFCALLMANAGEMENT,
+        0 // No associated data interface
+    },
+    // Class-specific abstract control management functional descriptor
+    {
+        sizeof(CDCAbstractControlManagementDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT,
+        CDCAbstractControlManagementDescriptor_LINE
+    },
+    // Class-specific union functional descriptor with one slave interface
+    {
+        sizeof(CDCUnionDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_UNION,
+        0, // Number of master interface is #0
+        1 // First slave interface is #1
+    },
+    // Notification endpoint standard descriptor
+    {
+        sizeof(USBEndpointDescriptor), 
+        USBGenericDescriptor_ENDPOINT,
+        USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,
+                                      CDCDSerialDriverDescriptors_NOTIFICATION),
+        USBEndpointDescriptor_INTERRUPT,
+        MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_NOTIFICATION),
+            USBEndpointDescriptor_MAXINTERRUPTSIZE_HS),
+        10 // Endpoint is polled every 10ms
+    },
+    // Data class interface standard descriptor
+    {
+        sizeof(USBInterfaceDescriptor),
+        USBGenericDescriptor_INTERFACE,
+        1, // This is interface #1
+        0, // This is alternate setting #0 for this interface
+        2, // This interface uses 2 endpoints
+        CDCDataInterfaceDescriptor_CLASS,
+        CDCDataInterfaceDescriptor_SUBCLASS,
+        CDCDataInterfaceDescriptor_NOPROTOCOL,
+        0  // No string descriptor for this interface
+    },
+    // Bulk-OUT endpoint standard descriptor
+    {
+        sizeof(USBEndpointDescriptor), 
+        USBGenericDescriptor_ENDPOINT,
+        USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_OUT,
+                                      CDCDSerialDriverDescriptors_DATAOUT),
+        USBEndpointDescriptor_BULK,
+        512,
+//        MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAOUT),
+//            USBEndpointDescriptor_MAXBULKSIZE_HS),
+        0 // Must be 0 for full-speed bulk endpoints
+    },
+    // Bulk-IN endpoint descriptor
+    {
+        sizeof(USBEndpointDescriptor),
+        USBGenericDescriptor_ENDPOINT,
+        USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,
+                                      CDCDSerialDriverDescriptors_DATAIN),
+        USBEndpointDescriptor_BULK,
+        512,
+//        MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAIN),
+//            USBEndpointDescriptor_MAXBULKSIZE_HS),
+        0 // Must be 0 for full-speed bulk endpoints
+    },
+};
+
+
+/// Configuration descriptor (when in high-speed).
+const CDCDSerialDriverConfigurationDescriptors configurationDescriptorsHS = {
+
+    // Standard configuration descriptor
+    {
+        sizeof(USBConfigurationDescriptor),
+        USBGenericDescriptor_CONFIGURATION,
+        sizeof(CDCDSerialDriverConfigurationDescriptors),
+        2, // There are two interfaces in this configuration
+        1, // This is configuration #1
+        0, // No string descriptor for this configuration
+        BOARD_USB_BMATTRIBUTES,
+        USBConfigurationDescriptor_POWER(100)
+    },
+#if defined(BOARD_USB_OTGHS)
+    // OTG descriptor
+    {
+        sizeof(USBOtgDescriptor),
+        USBGenericDescriptor_OTG,
+        USBOTGDescriptor_HNP_SRP
+    },
+#endif
+    // Communication class interface standard descriptor
+    {
+        sizeof(USBInterfaceDescriptor),
+        USBGenericDescriptor_INTERFACE,
+        0, // This is interface #0
+        0, // This is alternate setting #0 for this interface
+        1, // This interface uses 1 endpoint
+        CDCCommunicationInterfaceDescriptor_CLASS,
+        CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL,
+        CDCCommunicationInterfaceDescriptor_NOPROTOCOL,
+        0  // No string descriptor for this interface
+    },
+    // Class-specific header functional descriptor
+    {
+        sizeof(CDCHeaderDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_HEADER,
+        CDCGenericDescriptor_CDC1_10
+    },
+    // Class-specific call management functional descriptor
+    {
+        sizeof(CDCCallManagementDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_CALLMANAGEMENT,
+        CDCCallManagementDescriptor_SELFCALLMANAGEMENT,
+        0 // No associated data interface
+    },
+    // Class-specific abstract control management functional descriptor
+    {
+        sizeof(CDCAbstractControlManagementDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT,
+        CDCAbstractControlManagementDescriptor_LINE
+    },
+    // Class-specific union functional descriptor with one slave interface
+    {
+        sizeof(CDCUnionDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_UNION,
+        0, // Number of master interface is #0
+        1 // First slave interface is #1
+    },
+    // Notification endpoint standard descriptor
+    {
+        sizeof(USBEndpointDescriptor), 
+        USBGenericDescriptor_ENDPOINT,
+        USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,
+                                      CDCDSerialDriverDescriptors_NOTIFICATION),
+        USBEndpointDescriptor_INTERRUPT,
+        MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_NOTIFICATION),
+            USBEndpointDescriptor_MAXINTERRUPTSIZE_HS),
+        10 // Endpoint is polled every 10ms
+    },
+    // Data class interface standard descriptor
+    {
+        sizeof(USBInterfaceDescriptor),
+        USBGenericDescriptor_INTERFACE,
+        1, // This is interface #1
+        0, // This is alternate setting #0 for this interface
+        2, // This interface uses 2 endpoints
+        CDCDataInterfaceDescriptor_CLASS,
+        CDCDataInterfaceDescriptor_SUBCLASS,
+        CDCDataInterfaceDescriptor_NOPROTOCOL,
+        0  // No string descriptor for this interface
+    },
+    // Bulk-OUT endpoint standard descriptor
+    {
+        sizeof(USBEndpointDescriptor), 
+        USBGenericDescriptor_ENDPOINT,
+        USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_OUT,
+                                      CDCDSerialDriverDescriptors_DATAOUT),
+        USBEndpointDescriptor_BULK,
+        512,
+//        MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAOUT),
+//            USBEndpointDescriptor_MAXBULKSIZE_HS),
+        0 // Must be 0 for full-speed bulk endpoints
+    },
+    // Bulk-IN endpoint descriptor
+    {
+        sizeof(USBEndpointDescriptor),
+        USBGenericDescriptor_ENDPOINT,
+        USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,
+                                      CDCDSerialDriverDescriptors_DATAIN),
+        USBEndpointDescriptor_BULK,
+        512,
+//        MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAIN),
+//            USBEndpointDescriptor_MAXBULKSIZE_HS),
+        0 // Must be 0 for full-speed bulk endpoints
+    },
+};
+
+/// Other-speed configuration descriptor (when in high-speed).
+const CDCDSerialDriverConfigurationDescriptors otherSpeedDescriptorsHS = {
+
+    // Standard configuration descriptor
+    {
+        sizeof(USBConfigurationDescriptor),
+        USBGenericDescriptor_OTHERSPEEDCONFIGURATION,
+        sizeof(CDCDSerialDriverConfigurationDescriptors),
+        2, // There are two interfaces in this configuration
+        1, // This is configuration #1
+        0, // No string descriptor for this configuration
+        BOARD_USB_BMATTRIBUTES,
+        USBConfigurationDescriptor_POWER(100)
+    },
+#if defined(BOARD_USB_OTGHS)
+    // OTG descriptor
+    {
+        sizeof(USBOtgDescriptor),
+        USBGenericDescriptor_OTG,
+        USBOTGDescriptor_HNP_SRP
+    },
+#endif
+    // Communication class interface standard descriptor
+    {
+        sizeof(USBInterfaceDescriptor),
+        USBGenericDescriptor_INTERFACE,
+        0, // This is interface #0
+        0, // This is alternate setting #0 for this interface
+        1, // This interface uses 1 endpoint
+        CDCCommunicationInterfaceDescriptor_CLASS,
+        CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL,
+        CDCCommunicationInterfaceDescriptor_NOPROTOCOL,
+        0  // No string descriptor for this interface
+    },
+    // Class-specific header functional descriptor
+    {
+        sizeof(CDCHeaderDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_HEADER,
+        CDCGenericDescriptor_CDC1_10
+    },
+    // Class-specific call management functional descriptor
+    {
+        sizeof(CDCCallManagementDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_CALLMANAGEMENT,
+        CDCCallManagementDescriptor_SELFCALLMANAGEMENT,
+        0 // No associated data interface
+    },
+    // Class-specific abstract control management functional descriptor
+    {
+        sizeof(CDCAbstractControlManagementDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT,
+        CDCAbstractControlManagementDescriptor_LINE
+    },
+    // Class-specific union functional descriptor with one slave interface
+    {
+        sizeof(CDCUnionDescriptor),
+        CDCGenericDescriptor_INTERFACE,
+        CDCGenericDescriptor_UNION,
+        0, // Number of master interface is #0
+        1 // First slave interface is #1
+    },
+    // Notification endpoint standard descriptor
+    {
+        sizeof(USBEndpointDescriptor), 
+        USBGenericDescriptor_ENDPOINT,
+        USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,
+                                      CDCDSerialDriverDescriptors_NOTIFICATION),
+        USBEndpointDescriptor_INTERRUPT,
+        MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_NOTIFICATION),
+            USBEndpointDescriptor_MAXINTERRUPTSIZE_FS),
+        10 // Endpoint is polled every 10ms
+    },
+    // Data class interface standard descriptor
+    {
+        sizeof(USBInterfaceDescriptor),
+        USBGenericDescriptor_INTERFACE,
+        1, // This is interface #1
+        0, // This is alternate setting #0 for this interface
+        2, // This interface uses 2 endpoints
+        CDCDataInterfaceDescriptor_CLASS,
+        CDCDataInterfaceDescriptor_SUBCLASS,
+        CDCDataInterfaceDescriptor_NOPROTOCOL,
+        0  // No string descriptor for this interface
+    },
+    // Bulk-OUT endpoint standard descriptor
+    {
+        sizeof(USBEndpointDescriptor), 
+        USBGenericDescriptor_ENDPOINT,
+        USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_OUT,
+                                      CDCDSerialDriverDescriptors_DATAOUT),
+        USBEndpointDescriptor_BULK,
+        64,
+//        MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAOUT),
+//            USBEndpointDescriptor_MAXBULKSIZE_FS),
+        0 // Must be 0 for full-speed bulk endpoints
+    },
+    // Bulk-IN endpoint descriptor
+    {
+        sizeof(USBEndpointDescriptor),
+        USBGenericDescriptor_ENDPOINT,
+        USBEndpointDescriptor_ADDRESS(USBEndpointDescriptor_IN,
+                                      CDCDSerialDriverDescriptors_DATAIN),
+        USBEndpointDescriptor_BULK,
+        64,
+//        MIN(BOARD_USB_ENDPOINTS_MAXPACKETSIZE(CDCDSerialDriverDescriptors_DATAIN),
+//            USBEndpointDescriptor_MAXBULKSIZE_FS),
+        0 // Must be 0 for full-speed bulk endpoints
+    },
+};
+#endif
+
+/// Product string descriptor
+const unsigned char productStringDescriptor[] = {
+
+    USBStringDescriptor_LENGTH(13),
+    USBGenericDescriptor_STRING,
+    USBStringDescriptor_UNICODE('A'),
+    USBStringDescriptor_UNICODE('T'),
+    USBStringDescriptor_UNICODE('9'),
+    USBStringDescriptor_UNICODE('1'),
+    USBStringDescriptor_UNICODE('U'),
+    USBStringDescriptor_UNICODE('S'),
+    USBStringDescriptor_UNICODE('B'),
+    USBStringDescriptor_UNICODE('S'),
+    USBStringDescriptor_UNICODE('e'),
+    USBStringDescriptor_UNICODE('r'),
+    USBStringDescriptor_UNICODE('i'),
+    USBStringDescriptor_UNICODE('a'),
+    USBStringDescriptor_UNICODE('l')
+};
+
+/// List of string descriptors used by the device
+const unsigned char *stringDescriptors[] = {
+
+    languageIdStringDescriptor,
+    productStringDescriptor,
+};
+
+/// List of standard descriptors for the serial driver.
+USBDDriverDescriptors cdcdSerialDriverDescriptors = {
+
+    &deviceDescriptor,
+    (USBConfigurationDescriptor *) &(configurationDescriptors),
+#if defined(BOARD_USB_UDPHS) || defined(BOARD_USB_OTGHS)
+    &qualifierDescriptor,
+    (USBConfigurationDescriptor *) &(otherSpeedDescriptorsFS),
+    &deviceDescriptor,
+    (USBConfigurationDescriptor *) &(configurationDescriptorsHS),
+    &qualifierDescriptor,
+    (USBConfigurationDescriptor *) &(otherSpeedDescriptorsHS),
+#else
+    0, // No full-speed device qualifier descriptor
+    0, // No full-speed other speed configuration
+    0, // No high-speed device descriptor
+    0, // No high-speed configuration descriptor
+    0, // No high-speed device qualifier descriptor
+    0, // No high-speed other speed configuration descriptor
+
+#endif
+    stringDescriptors,
+    2 // 2 string descriptors in list
+};
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriverDescriptors.h b/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriverDescriptors.h
new file mode 100644
index 00000000..6c73202b
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/CDCDSerialDriverDescriptors.h
@@ -0,0 +1,82 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+ Definition of the USB descriptors required by a CDC device serial
+ driver.
+*/
+
+#ifndef CDCDSERIALDRIVERDESCRIPTORS_H
+#define CDCDSERIALDRIVERDESCRIPTORS_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <usb/device/core/USBDDriverDescriptors.h>
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "CDC Serial Endpoints"
+/// This page lists the endpoints used in CDC Serial Device.
+///
+/// !Endpoints
+/// - CDCDSerialDriverDescriptors_DATAOUT
+/// - CDCDSerialDriverDescriptors_DATAIN
+/// - CDCDSerialDriverDescriptors_NOTIFICATION
+
+/// Data OUT endpoint number.
+#define CDCDSerialDriverDescriptors_DATAOUT             1
+/// Data IN endpoint number.
+#define CDCDSerialDriverDescriptors_DATAIN              2
+/// Notification endpoint number.
+#define CDCDSerialDriverDescriptors_NOTIFICATION        3
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Exported variables
+//------------------------------------------------------------------------------
+
+/// List of descriptors for a CDC device serial driver.
+extern USBDDriverDescriptors cdcdSerialDriverDescriptors;
+
+#endif //#ifndef CDCDDRIVERDESCRIPTORS_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/drv/6119.inf b/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/drv/6119.inf
new file mode 100644
index 00000000..14bd8d31
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/cdc-serial/drv/6119.inf
@@ -0,0 +1,45 @@
+; $Id: 6119.inf,v 1.1.2.1 2006/12/05 08:33:25 danielru Exp $
+
+[Version]                                                       ; Version section
+Signature="$Chicago$"                                           ; All Windows versions
+Class=Ports                                                     ; This is a serial port driver
+ClassGuid={4D36E978-E325-11CE-BFC1-08002BE10318}                ; Associated GUID
+Provider=%ATMEL%                                                ; Driver is provided by ATMEL
+DriverVer=09/12/2006,1.1.1.5                                    ; Driver version 1.1.1.5 published on 23 February 2007
+
+[DestinationDirs]                                               ; DestinationDirs section
+DefaultDestDir=12                                               ; Default install directory is \drivers or \IOSubSys
+
+[Manufacturer]                                                  ; Manufacturer section
+%ATMEL%=AtmelMfg                                                ; Only one manufacturer (ATMEL), models section is named
+                                                                ; AtmelMfg
+
+[AtmelMfg]                                                      ; Models section corresponding to ATMEL
+%USBtoSerialConverter%=USBtoSer.Install,USB\VID_03EB&PID_6119   ; Identifies a device with ATMEL Vendor ID (03EBh) and
+                                                                ; Product ID equal to 6119h. Corresponding Install section
+                                                                ; is named USBtoSer.Install
+
+[USBtoSer.Install]                                              ; Install section
+include=mdmcpq.inf
+CopyFiles=FakeModemCopyFileSection
+AddReg=USBtoSer.AddReg                                          ; Registry keys to add are listed in USBtoSer.AddReg
+
+[USBtoSer.AddReg]                                               ; AddReg section
+HKR,,DevLoader,,*ntkern                                         ;
+HKR,,NTMPDriver,,usbser.sys
+HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider"
+
+[USBtoSer.Install.Services]                                     ; Services section
+AddService=usbser,0x00000002,USBtoSer.AddService                ; Assign usbser as the PnP driver for the device
+
+[USBtoSer.AddService]                                           ; Service install section
+DisplayName=%USBSer%                                            ; Name of the serial driver
+ServiceType=1                                                   ; Service kernel driver
+StartType=3                                                     ; Driver is started by the PnP manager
+ErrorControl=1                                                  ; Warn about errors
+ServiceBinary=%12%\usbser.sys                                   ; Driver filename
+
+[Strings]                                                       ; Strings section
+ATMEL="ATMEL Corp."                                             ; String value for the ATMEL symbol
+USBtoSerialConverter="AT91 USB to Serial Converter"             ; String value for the USBtoSerialConverter symbol
+USBSer="USB Serial Driver"                                      ; String value for the USBSer symbol
\ No newline at end of file
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD.h b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD.h
new file mode 100644
index 00000000..10594b82
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD.h
@@ -0,0 +1,198 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !!!Purpose
+/// 
+/// Collection of methods for using the USB device controller on AT91
+/// microcontrollers.
+/// 
+/// !!!Usage
+/// 
+/// Please refer to the corresponding application note.
+/// - "AT91 USB device framework"
+/// - "USBD API" . "USBD API Methods"
+//------------------------------------------------------------------------------
+
+#ifndef USBD_H
+#define USBD_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <usb/common/core/USBEndpointDescriptor.h>
+#include <usb/common/core/USBGenericRequest.h>
+
+//------------------------------------------------------------------------------
+//      Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB device API return values"
+///
+/// This page lists the return values of the USB %device driver API
+///
+/// !Return codes
+/// - USBD_STATUS_SUCCESS
+/// - USBD_STATUS_LOCKED
+/// - USBD_STATUS_ABORTED
+/// - USBD_STATUS_RESET
+           
+/// Indicates the operation was successful.
+#define USBD_STATUS_SUCCESS             0
+/// Endpoint/device is already busy.
+#define USBD_STATUS_LOCKED              1
+/// Operation has been aborted.
+#define USBD_STATUS_ABORTED             2
+/// Operation has been aborted because the device has been reset.
+#define USBD_STATUS_RESET               3
+/// Operation failed because parameter error
+#define USBD_STATUS_INVALID_PARAMETER   4
+/// Operation failed because HW not supported
+#define USBD_STATUS_HW_NOT_SUPPORTED    5
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB device states"
+///
+/// This page lists the %device states of the USB %device driver.
+///
+/// !States
+/// - USBD_STATE_SUSPENDED
+/// - USBD_STATE_ATTACHED
+/// - USBD_STATE_POWERED
+/// - USBD_STATE_DEFAULT
+/// - USBD_STATE_ADDRESS
+/// - USBD_STATE_CONFIGURED
+
+/// The device is currently suspended.
+#define USBD_STATE_SUSPENDED            0
+/// USB cable is plugged into the device.
+#define USBD_STATE_ATTACHED             1
+/// Host is providing +5V through the USB cable.
+#define USBD_STATE_POWERED              2
+/// Device has been reset.
+#define USBD_STATE_DEFAULT              3
+/// The device has been given an address on the bus.
+#define USBD_STATE_ADDRESS              4
+/// A valid configuration has been selected.
+#define USBD_STATE_CONFIGURED           5
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "USB device LEDs"
+///
+/// This page lists the LEDs used in the USB %device driver.
+///
+/// !LEDs
+/// - USBD_LEDPOWER
+/// - USBD_LEDUSB
+/// - USBD_LEDOTHER
+
+/// LED for indicating that the device is powered.
+#define USBD_LEDPOWER                   0
+/// LED for indicating USB activity.
+#define USBD_LEDUSB                     1
+/// LED for custom usage.
+#define USBD_LEDOTHER                   2
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Callback used by transfer functions (USBD_Read & USBD_Write) to notify
+/// that a transaction is complete.
+//------------------------------------------------------------------------------
+typedef void (*TransferCallback)(void *pArg,
+                                 unsigned char status,
+                                 unsigned int transferred,
+                                 unsigned int remaining);
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern void UDPD_IrqHandler(void);
+
+extern void USBD_Init(void);
+
+extern void USBD_ConfigureSpeed(unsigned char forceFS);
+
+extern void USBD_Connect(void);
+
+extern void USBD_Disconnect(void);
+
+extern char USBD_Write(
+    unsigned char bEndpoint,
+    const void *pData,
+    unsigned int size,
+    TransferCallback callback,
+    void *pArg);
+
+extern char USBD_Read(
+    unsigned char bEndpoint,
+    void *pData,
+    unsigned int dLength,
+    TransferCallback fCallback,
+    void *pArg);
+
+extern unsigned char USBD_Stall(unsigned char bEndpoint);
+
+extern void USBD_Halt(unsigned char bEndpoint);
+
+extern void USBD_Unhalt(unsigned char bEndpoint);
+
+extern void USBD_ConfigureEndpoint(const USBEndpointDescriptor *pDescriptor);
+
+extern unsigned char USBD_IsHalted(unsigned char bEndpoint);
+
+extern void USBD_RemoteWakeUp(void);
+
+extern void USBD_SetAddress(unsigned char address);
+
+extern void USBD_SetConfiguration(unsigned char cfgnum);
+
+extern unsigned char USBD_GetState(void);
+
+extern unsigned char USBD_IsHighSpeed(void);
+
+extern void USBD_Test(unsigned char bIndex);
+
+#endif //#ifndef USBD_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDCallbacks.h b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDCallbacks.h
new file mode 100644
index 00000000..cd9097a0
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDCallbacks.h
@@ -0,0 +1,70 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+    Definitions of callbacks used by the USBD API to notify the user
+    application of incoming events. These functions are declared as 'weak',
+    so they can be re-implemented elsewhere in the application in a
+    transparent way.
+*/
+
+#ifndef USBDCALLBACKS_H
+#define USBDCALLBACKS_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <usb/common/core/USBGenericRequest.h>
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern void USBDCallbacks_Initialized(void);
+
+extern void USBDCallbacks_Reset(void);
+
+extern void USBDCallbacks_Suspended(void);
+
+extern void USBDCallbacks_Resumed(void);
+
+extern void USBDCallbacks_RequestReceived(const USBGenericRequest *request);
+
+#endif //#ifndef USBDCALLBACKS_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDCallbacks_Initialized.c b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDCallbacks_Initialized.c
new file mode 100644
index 00000000..a2d7b4d2
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDCallbacks_Initialized.c
@@ -0,0 +1,72 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBDCallbacks.h"
+#include "USBD.h"
+#include <board.h>
+#include <irq/irq.h>
+
+//------------------------------------------------------------------------------
+//         Exported function
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Invoked after the USB driver has been initialized. By default, configures
+/// the UDP/UDPHS interrupt.
+//------------------------------------------------------------------------------
+void USBDCallbacks_Initialized(void)
+{
+#if defined(BOARD_USB_UDP)
+    // Configure and enable the UDP interrupt
+    IRQ_ConfigureIT(AT91C_ID_UDP, 0, UdphsIrqHandler);//, UDPD_IrqHandler);
+    IRQ_EnableIT(AT91C_ID_UDP);
+
+#elif defined(BOARD_USB_UDPHS)
+    // Configure and enable the UDPHS interrupt
+    IRQ_ConfigureIT(AT91C_ID_UDPHS, 0, UdphsIrqHandler);//, UDPD_IrqHandler);
+    IRQ_EnableIT(AT91C_ID_UDPHS);
+
+#elif defined(BOARD_USB_OTGHS)
+    IRQ_ConfigureIT(AT91C_ID_OTGHS, 1, UdphsIrqHandler);
+    IRQ_EnableIT(AT91C_ID_OTGHS);
+
+#else
+    #error Unsupported controller.
+#endif
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDCallbacks_Reset.c b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDCallbacks_Reset.c
new file mode 100644
index 00000000..da15db0e
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDCallbacks_Reset.c
@@ -0,0 +1,52 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBDCallbacks.h"
+
+//------------------------------------------------------------------------------
+//         Exported function
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Invoked when the USB driver is reset. Does nothing by default.
+//------------------------------------------------------------------------------
+void USBDCallbacks_Reset(void)
+{
+    // Does nothing
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriver.c b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriver.c
new file mode 100644
index 00000000..17f11004
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriver.c
@@ -0,0 +1,754 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//      Headers
+//------------------------------------------------------------------------------
+
+#include "USBDDriver.h"
+#include "USBDDriverCallbacks.h"
+#include "USBD.h"
+#include <board.h>
+#include <utility/trace.h>
+#include <usb/common/core/USBGenericDescriptor.h>
+#include <usb/common/core/USBDeviceDescriptor.h>
+#include <usb/common/core/USBConfigurationDescriptor.h>
+#include <usb/common/core/USBDeviceQualifierDescriptor.h>
+#include <usb/common/core/USBEndpointDescriptor.h>
+#include <usb/common/core/USBFeatureRequest.h>
+#include <usb/common/core/USBSetAddressRequest.h>
+#include <usb/common/core/USBGetDescriptorRequest.h>
+#include <usb/common/core/USBSetConfigurationRequest.h>
+#include <usb/common/core/USBInterfaceRequest.h>
+
+#include <string.h>
+
+//------------------------------------------------------------------------------
+//      Local functions
+//------------------------------------------------------------------------------
+#if defined(BOARD_USB_OTGHS)
+static unsigned char otg_features_supported = 0;
+#endif
+
+//------------------------------------------------------------------------------
+/// Send a NULL packet
+//------------------------------------------------------------------------------
+static void TerminateCtrlInWithNull(void *pArg,
+                                    unsigned char status,
+                                    unsigned int transferred,
+                                    unsigned int remaining)
+{
+    USBD_Write(0, // Endpoint #0
+               0, // No data buffer
+               0, // No data buffer
+               (TransferCallback) 0,
+               (void *)  0);
+}
+
+//------------------------------------------------------------------------------
+/// Configures the device by setting it into the Configured state and
+/// initializing all endpoints.
+/// \param pDriver  Pointer to a USBDDriver instance.
+/// \param cfgnum  Configuration number to set.
+//------------------------------------------------------------------------------
+static void SetConfiguration(USBDDriver *pDriver, unsigned char cfgnum)
+{
+    USBEndpointDescriptor *pEndpoints[BOARD_USB_NUMENDPOINTS+1];
+    const USBConfigurationDescriptor *pConfiguration;
+
+    // Use different descriptor depending on device speed
+    if (USBD_IsHighSpeed()) {
+
+        pConfiguration = pDriver->pDescriptors->pHsConfiguration;
+    }
+    else {
+
+        pConfiguration = pDriver->pDescriptors->pFsConfiguration;
+    }
+
+    // Set & save the desired configuration
+    USBD_SetConfiguration(cfgnum);
+    pDriver->cfgnum = cfgnum;
+
+    // If the configuration is not 0, configure endpoints
+    if (cfgnum != 0) {
+        int i;
+    
+        // Parse configuration to get endpoint descriptors
+        USBConfigurationDescriptor_Parse(pConfiguration, 0, pEndpoints, 0);
+    
+        // Configure endpoints
+        i = 0;
+        while (pEndpoints[i] != 0) {
+    
+            USBD_ConfigureEndpoint(pEndpoints[i]);
+            i++;
+        }
+    }
+    // Should be done before send the ZLP
+    USBDDriverCallbacks_ConfigurationChanged(cfgnum);
+
+    // Acknowledge the request
+    USBD_Write(0, // Endpoint #0
+               0, // No data buffer
+               0, // No data buffer
+               (TransferCallback) 0,
+               (void *)  0);
+}
+
+//------------------------------------------------------------------------------
+/// Sends the current configuration number to the host.
+/// \param pDriver  Pointer to a USBDDriver instance.
+//------------------------------------------------------------------------------
+static void GetConfiguration(const USBDDriver *pDriver)
+{
+    USBD_Write(0, &(pDriver->cfgnum), 1, 0, 0);
+}
+
+//------------------------------------------------------------------------------
+/// Sends the current status of the device to the host.
+/// \param pDriver  Pointer to a USBDDriver instance.
+//------------------------------------------------------------------------------
+static void GetDeviceStatus(const USBDDriver *pDriver)
+{
+    static unsigned short data;
+    const USBConfigurationDescriptor *pConfiguration;
+
+    data = 0;
+    // Use different configuration depending on device speed
+    if (USBD_IsHighSpeed()) {
+
+        pConfiguration = pDriver->pDescriptors->pHsConfiguration;
+    }
+    else {
+
+        pConfiguration = pDriver->pDescriptors->pFsConfiguration;
+    }
+
+    // Check current configuration for power mode (if device is configured)
+    if (pDriver->cfgnum != 0) {
+
+        if (USBConfigurationDescriptor_IsSelfPowered(pConfiguration)) {
+
+            data |= 1;
+        }
+    }
+
+    // Check if remote wake-up is enabled
+    if (pDriver->isRemoteWakeUpEnabled) {
+
+        data |= 2;
+    }
+
+    // Send the device status
+    USBD_Write(0, &data, 2, 0, 0);
+}
+
+//------------------------------------------------------------------------------
+/// Sends the current status of an endpoints to the USB host.
+/// \param bEndpoint  Endpoint number.
+//------------------------------------------------------------------------------
+static void GetEndpointStatus(unsigned char bEndpoint)
+{
+    static unsigned short data;
+
+    data = 0;
+    // Check if the endpoint exists
+    if (bEndpoint > BOARD_USB_NUMENDPOINTS) {
+
+        USBD_Stall(0);
+    }
+    else {
+
+        // Check if the endpoint if currently halted
+        if (USBD_IsHalted(bEndpoint)) {
+
+            data = 1;
+        }
+        
+        // Send the endpoint status
+        USBD_Write(0, &data, 2, 0, 0);
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Sends the requested USB descriptor to the host if available, or STALLs  the
+/// request.
+/// \param pDriver  Pointer to a USBDDriver instance.
+/// \param type  Type of the requested descriptor
+/// \param idx  Index of the requested descriptor.
+/// \param length  Maximum number of bytes to return.
+//------------------------------------------------------------------------------
+static void GetDescriptor(
+    const USBDDriver *pDriver,
+    unsigned char type,
+    unsigned char idx,
+    unsigned int length)
+{
+    const USBDeviceDescriptor *pDevice;
+    const USBConfigurationDescriptor *pConfiguration;
+    const USBDeviceQualifierDescriptor *pQualifier;
+    const USBConfigurationDescriptor *pOtherSpeed;
+    const USBGenericDescriptor **pStrings =
+        (const USBGenericDescriptor **) pDriver->pDescriptors->pStrings;
+    unsigned char numStrings = pDriver->pDescriptors->numStrings;
+    const USBGenericDescriptor *pString;
+
+    // Use different set of descriptors depending on device speed
+    if (USBD_IsHighSpeed()) {
+
+        TRACE_DEBUG("HS ");
+        pDevice = pDriver->pDescriptors->pHsDevice;
+        pConfiguration = pDriver->pDescriptors->pHsConfiguration;
+        pQualifier = pDriver->pDescriptors->pHsQualifier;
+        pOtherSpeed = pDriver->pDescriptors->pHsOtherSpeed;
+    }
+    else {
+
+        TRACE_DEBUG("FS ");
+        pDevice = pDriver->pDescriptors->pFsDevice;
+        pConfiguration = pDriver->pDescriptors->pFsConfiguration;
+        pQualifier = pDriver->pDescriptors->pFsQualifier;
+        pOtherSpeed = pDriver->pDescriptors->pFsOtherSpeed;
+    }
+
+    // Check the descriptor type
+    switch (type) {
+        
+        case USBGenericDescriptor_DEVICE:
+            TRACE_INFO_WP("Dev ");
+
+            // Adjust length and send descriptor
+            if (length > USBGenericDescriptor_GetLength((USBGenericDescriptor *) pDevice)) {
+
+                length = USBGenericDescriptor_GetLength((USBGenericDescriptor *) pDevice);
+            }
+            USBD_Write(0, pDevice, length, 0, 0);
+            break;
+
+        case USBGenericDescriptor_CONFIGURATION:
+            TRACE_INFO_WP("Cfg ");
+
+            // Adjust length and send descriptor
+            if (length > USBConfigurationDescriptor_GetTotalLength(pConfiguration)) {
+
+                length = USBConfigurationDescriptor_GetTotalLength(pConfiguration);
+            }
+            USBD_Write(0,
+                       pConfiguration,
+                       length,
+                       ((length % pDevice->bMaxPacketSize0) == 0) ? TerminateCtrlInWithNull : 0,
+                       0);
+            break;
+
+        case USBGenericDescriptor_DEVICEQUALIFIER:
+            TRACE_INFO_WP("Qua ");
+
+            // Check if descriptor exists
+            if (!pQualifier) {
+
+                USBD_Stall(0);
+            }
+            else {
+
+                // Adjust length and send descriptor
+                if (length > USBGenericDescriptor_GetLength((USBGenericDescriptor *) pQualifier)) {
+
+                    length = USBGenericDescriptor_GetLength((USBGenericDescriptor *) pQualifier);
+                }
+                USBD_Write(0, pQualifier, length, 0, 0);
+            }
+            break;
+
+        case USBGenericDescriptor_OTHERSPEEDCONFIGURATION:
+            TRACE_INFO_WP("OSC ");
+
+            // Check if descriptor exists
+            if (!pOtherSpeed) {
+
+                USBD_Stall(0);
+            }
+            else {
+
+                // Adjust length and send descriptor
+                if (length > USBConfigurationDescriptor_GetTotalLength(pOtherSpeed)) {
+
+                    length = USBConfigurationDescriptor_GetTotalLength(pOtherSpeed);
+                }
+                USBD_Write(0,
+                           pOtherSpeed,
+                           length,
+                           ((length % pDevice->bMaxPacketSize0) == 0) ? TerminateCtrlInWithNull : 0,
+                           0);
+            }
+            break;
+
+        case USBGenericDescriptor_STRING:
+            TRACE_INFO_WP("Str%d ", idx);
+
+            // Check if descriptor exists
+            if (idx > numStrings) {
+
+                USBD_Stall(0);
+            }
+            else {
+
+                pString = pStrings[idx];
+
+                // Adjust length and send descriptor
+                if (length > USBGenericDescriptor_GetLength(pString)) {
+
+                    length = USBGenericDescriptor_GetLength(pString);
+                }
+                USBD_Write(0,
+                           pString,
+                           length,
+                           ((length % pDevice->bMaxPacketSize0) == 0) ? TerminateCtrlInWithNull : 0,
+                           0);
+            }
+            break;
+
+        default:
+            TRACE_WARNING(
+                      "USBDDriver_GetDescriptor: Unknown descriptor type (%d)\n\r",
+                      type);
+            USBD_Stall(0);
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Sets the active setting of the given interface if the configuration supports
+/// it; otherwise, the control pipe is STALLed. If the setting of an interface
+/// changes.
+/// \parma pDriver  Pointer to a USBDDriver instance.
+/// \parma infnum  Interface number.
+/// \parma setting  New active setting for the interface.
+//------------------------------------------------------------------------------
+static void SetInterface(
+    USBDDriver *pDriver,
+    unsigned char infnum,
+    unsigned char setting)
+{
+    // Make sure alternate settings are supported
+    if (!pDriver->pInterfaces) {
+
+        USBD_Stall(0);
+    }
+    else {
+
+        // Change the current setting of the interface and trigger the callback 
+        // if necessary
+        if (pDriver->pInterfaces[infnum] != setting) {
+
+            pDriver->pInterfaces[infnum] = setting;
+            USBDDriverCallbacks_InterfaceSettingChanged(infnum, setting);
+        }
+
+        // Acknowledge the request
+        USBD_Write(0, 0, 0, 0, 0);
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Sends the currently active setting of the given interface to the USB
+/// host. If alternate settings are not supported, this function STALLs the
+/// control pipe.
+/// \param pDriver  Pointer to a USBDDriver instance.
+/// \param infnum  Interface number.
+//------------------------------------------------------------------------------
+static void GetInterface(
+    const USBDDriver *pDriver,
+    unsigned char infnum)
+{
+    // Make sure alternate settings are supported, or STALL the control pipe
+    if (!pDriver->pInterfaces) {
+
+        USBD_Stall(0);
+    }
+    else {
+
+        // Sends the current interface setting to the host
+        USBD_Write(0, &(pDriver->pInterfaces[infnum]), 1, 0, 0);
+    }
+}
+
+#if defined(BOARD_USB_UDPHS) || defined(BOARD_USB_OTGHS)
+//------------------------------------------------------------------------------
+// Performs the selected test on the USB device (high-speed only).
+// \param test  Test selector value.
+//------------------------------------------------------------------------------
+static void USBDDriver_Test(unsigned char test)
+{
+    TRACE_DEBUG("UDPHS_Test\n\r");
+
+    // the lower byte of wIndex must be zero
+    // the most significant byte of wIndex is used to specify the specific test mode
+    switch (test) {
+        case USBFeatureRequest_TESTPACKET:
+            //Test mode Test_Packet: 
+            //Upon command, a port must repetitively transmit the following test packet until
+            //the exit action is taken. This enables the testing of rise and fall times, eye 
+            //patterns, jitter, and any other dynamic waveform specifications.
+            //The test packet is made up by concatenating the following strings. 
+            //(Note: For J/K NRZI data, and for NRZ data, the bit on the left is the first one 
+            //transmitted. “S” indicates that a bit stuff occurs, which inserts an “extra” NRZI data bit. 
+            //“* N” is used to indicate N occurrences of a string of bits or symbols.)
+            //A port in Test_Packet mode must send this packet repetitively. The inter-packet timing 
+            //must be no less than the minimum allowable inter-packet gap as defined in Section 7.1.18 and 
+            //no greater than 125 us.
+            // Send ZLP
+            USBD_Test(USBFeatureRequest_TESTSENDZLP);
+            // Tst PACKET
+            USBD_Test(USBFeatureRequest_TESTPACKET);
+            while (1);
+            //break; not reached
+
+        case USBFeatureRequest_TESTJ:
+            //Test mode Test_J:
+            //Upon command, a port’s transceiver must enter the high-speed J state and remain in that
+            //state until the exit action is taken. This enables the testing of the high output drive
+            //level on the D+ line.
+            // Send ZLP
+            USBD_Test(USBFeatureRequest_TESTSENDZLP);
+            // Tst J
+            USBD_Test(USBFeatureRequest_TESTJ);
+            while (1);
+            //break; not reached
+
+        case USBFeatureRequest_TESTK:
+            //Test mode Test_K:
+            //Upon command, a port’s transceiver must enter the high-speed K state and remain in
+            //that state until the exit action is taken. This enables the testing of the high output drive
+            //level on the D- line.
+            // Send a ZLP
+            USBD_Test(USBFeatureRequest_TESTSENDZLP);
+            USBD_Test(USBFeatureRequest_TESTK);
+            while (1);
+            //break; not reached
+
+        case USBFeatureRequest_TESTSE0NAK:
+            //Test mode Test_SE0_NAK:
+            //Upon command, a port’s transceiver must enter the high-speed receive mode
+            //and remain in that mode until the exit action is taken. This enables the testing
+            //of output impedance, low level output voltage, and loading characteristics.
+            //In addition, while in this mode, upstream facing ports (and only upstream facing ports)
+            //must respond to any IN token packet with a NAK handshake (only if the packet CRC is
+            //determined to be correct) within the normal allowed device response time. This enables testing of
+            //the device squelch level circuitry and, additionally, provides a general purpose stimulus/response
+            //test for basic functional testing.
+            USBD_Test(USBFeatureRequest_TESTSE0NAK);
+            // Send a ZLP
+            USBD_Test(USBFeatureRequest_TESTSENDZLP);
+            while (1);
+            //break; not reached
+
+        default:
+            USBD_Stall( 0 );
+            break;
+
+    }
+    // The exit action is to power cycle the device.
+    // The device must be disconnected from the host
+}
+#endif
+
+//------------------------------------------------------------------------------
+//      Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Initializes a USBDDriver instance with a list of descriptors. If
+/// interfaces can have multiple alternate settings, an array to store the
+/// current setting for each interface must be provided.
+/// \param pDriver  Pointer to a USBDDriver instance.
+/// \param pDescriptors  Pointer to a USBDDriverDescriptors instance.
+/// \param pInterfaces  Pointer to an array for storing the current alternate
+///                     setting of each interface (optional).
+//------------------------------------------------------------------------------
+void USBDDriver_Initialize(
+    USBDDriver *pDriver,
+    const USBDDriverDescriptors *pDescriptors,
+    unsigned char *pInterfaces)
+{
+
+    pDriver->cfgnum = 0;
+#if (BOARD_USB_BMATTRIBUTES == USBConfigurationDescriptor_SELFPOWERED_RWAKEUP) \
+    || (BOARD_USB_BMATTRIBUTES == USBConfigurationDescriptor_BUSPOWERED_RWAKEUP)
+    pDriver->isRemoteWakeUpEnabled = 1;
+#else
+    pDriver->isRemoteWakeUpEnabled = 0;
+#endif
+
+    pDriver->pDescriptors = pDescriptors;
+    pDriver->pInterfaces = pInterfaces;
+
+    // Initialize interfaces array if not null
+    if (pInterfaces != 0) {
+    
+        memset(pInterfaces, sizeof(pInterfaces), 0);
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Handles the given request if it is standard, otherwise STALLs it.
+/// \param pDriver  Pointer to a USBDDriver instance.
+/// \param pRequest  Pointer to a USBGenericRequest instance.
+//------------------------------------------------------------------------------
+void USBDDriver_RequestHandler(
+    USBDDriver *pDriver,
+    const USBGenericRequest *pRequest)
+{
+    unsigned char cfgnum;
+    unsigned char infnum;
+    unsigned char eptnum;
+    unsigned char setting;
+    unsigned char type;
+    unsigned char idx;
+    unsigned int length;
+    unsigned int address;
+
+    TRACE_INFO_WP("Std ");
+
+    // Check request code
+    switch (USBGenericRequest_GetRequest(pRequest)) {
+
+        case USBGenericRequest_GETDESCRIPTOR:
+            TRACE_INFO_WP("gDesc ");
+
+            // Send the requested descriptor
+            type = USBGetDescriptorRequest_GetDescriptorType(pRequest);
+            idx = USBGetDescriptorRequest_GetDescriptorIndex(pRequest);
+            length = USBGenericRequest_GetLength(pRequest);
+            GetDescriptor(pDriver, type, idx, length);
+            break;
+
+        case USBGenericRequest_SETADDRESS:
+            TRACE_INFO_WP("sAddr ");
+
+            // Sends a zero-length packet and then set the device address
+            address = USBSetAddressRequest_GetAddress(pRequest);
+            USBD_Write(0, 0, 0, (TransferCallback) USBD_SetAddress, (void *) address);
+            break;
+
+        case USBGenericRequest_SETCONFIGURATION:
+            TRACE_INFO_WP("sCfg ");
+
+            // Set the requested configuration
+            cfgnum = USBSetConfigurationRequest_GetConfiguration(pRequest);
+            SetConfiguration(pDriver, cfgnum);
+            break;
+
+        case USBGenericRequest_GETCONFIGURATION:
+            TRACE_INFO_WP("gCfg ");
+
+            // Send the current configuration number
+            GetConfiguration(pDriver);
+            break;
+
+        case USBGenericRequest_GETSTATUS:
+            TRACE_INFO_WP("gSta ");
+    
+            // Check who is the recipient
+            switch (USBGenericRequest_GetRecipient(pRequest)) {
+    
+                case USBGenericRequest_DEVICE:
+                    TRACE_INFO_WP("Dev ");
+    
+                    // Send the device status
+                    GetDeviceStatus(pDriver);
+                    break;
+    
+                case USBGenericRequest_ENDPOINT:
+                    TRACE_INFO_WP("Ept ");
+    
+                    // Send the endpoint status
+                    eptnum = USBGenericRequest_GetEndpointNumber(pRequest);
+                    GetEndpointStatus(eptnum);
+                    break;
+    
+                default:
+                    TRACE_WARNING(
+                              "USBDDriver_RequestHandler: Unknown recipient (%d)\n\r",
+                              USBGenericRequest_GetRecipient(pRequest));
+                    USBD_Stall(0);
+            }
+            break;
+
+        case USBGenericRequest_CLEARFEATURE:
+            TRACE_INFO_WP("cFeat ");
+
+            // Check which is the requested feature
+            switch (USBFeatureRequest_GetFeatureSelector(pRequest)) {
+
+                case USBFeatureRequest_ENDPOINTHALT:
+                    TRACE_INFO_WP("Hlt ");
+
+                    // Unhalt endpoint and send a zero-length packet
+                    USBD_Unhalt(USBGenericRequest_GetEndpointNumber(pRequest));
+                    USBD_Write(0, 0, 0, 0, 0);
+                    break;
+
+                case USBFeatureRequest_DEVICEREMOTEWAKEUP:
+                    TRACE_INFO_WP("RmWU ");
+
+                    // Disable remote wake-up and send a zero-length packet
+                    pDriver->isRemoteWakeUpEnabled = 0;
+                    USBD_Write(0, 0, 0, 0, 0);
+                    break;
+
+                default:
+                    TRACE_WARNING(
+                              "USBDDriver_RequestHandler: Unknown feature selector (%d)\n\r",
+                              USBFeatureRequest_GetFeatureSelector(pRequest));
+                    USBD_Stall(0);
+            }
+            break;
+
+    case USBGenericRequest_SETFEATURE:
+        TRACE_INFO_WP("sFeat ");
+
+        // Check which is the selected feature
+        switch (USBFeatureRequest_GetFeatureSelector(pRequest)) {
+
+            case USBFeatureRequest_DEVICEREMOTEWAKEUP:
+                TRACE_INFO_WP("RmWU ");
+
+                // Enable remote wake-up and send a ZLP
+                pDriver->isRemoteWakeUpEnabled = 1;
+                USBD_Write(0, 0, 0, 0, 0);
+                break;
+
+            case USBFeatureRequest_ENDPOINTHALT:
+                TRACE_INFO_WP("Halt ");
+                // Halt endpoint
+                USBD_Halt(USBGenericRequest_GetEndpointNumber(pRequest));
+                USBD_Write(0, 0, 0, 0, 0);
+                break;
+
+#if defined(BOARD_USB_UDPHS) || defined(BOARD_USB_OTGHS)
+
+            case USBFeatureRequest_TESTMODE:
+                // 7.1.20 Test Mode Support
+                if ((USBGenericRequest_GetType(pRequest) == USBGenericRequest_DEVICE)
+                    && ((USBGenericRequest_GetIndex(pRequest) & 0x000F) == 0)) {
+
+                    // Handle test request
+                    USBDDriver_Test(USBFeatureRequest_GetTestSelector(pRequest));
+                }
+                else {
+
+                    USBD_Stall(0);
+                }
+                break;
+#endif
+#if defined(BOARD_USB_OTGHS)
+            case USBFeatureRequest_OTG_B_HNP_ENABLE:
+                    TRACE_INFO_WP("OTG_B_HNP_ENABLE ");
+                    otg_features_supported |= 1<<USBFeatureRequest_OTG_B_HNP_ENABLE;
+                    USBD_Write(0, 0, 0, 0, 0);
+                break;
+            case USBFeatureRequest_OTG_A_HNP_SUPPORT:
+                    TRACE_INFO_WP("OTG_A_HNP_SUPPORT ");
+                    otg_features_supported |= 1<<USBFeatureRequest_OTG_A_HNP_SUPPORT;
+                    USBD_Write(0, 0, 0, 0, 0);
+                break;
+            case USBFeatureRequest_OTG_A_ALT_HNP_SUPPORT:
+                    TRACE_INFO_WP("OTG_A_ALT_HNP_SUPPORT ");
+                    otg_features_supported |= 1<<USBFeatureRequest_OTG_A_ALT_HNP_SUPPORT;
+                    USBD_Write(0, 0, 0, 0, 0);
+                break;
+#endif
+            default:
+                TRACE_WARNING(
+                          "USBDDriver_RequestHandler: Unknown feature selector (%d)\n\r",
+                          USBFeatureRequest_GetFeatureSelector(pRequest));
+                USBD_Stall(0);
+        }
+        break;
+
+    case USBGenericRequest_SETINTERFACE:
+        TRACE_INFO_WP("sInterface ");
+
+        infnum = USBInterfaceRequest_GetInterface(pRequest);
+        setting = USBInterfaceRequest_GetAlternateSetting(pRequest);
+        SetInterface(pDriver, infnum, setting);
+        break;
+
+    case USBGenericRequest_GETINTERFACE:
+        TRACE_INFO_WP("gInterface ");
+
+        infnum = USBInterfaceRequest_GetInterface(pRequest);
+        GetInterface(pDriver, infnum);
+        break;
+
+    default:
+        TRACE_WARNING(
+                  "USBDDriver_RequestHandler: Unknown request code (%d)\n\r",
+                  USBGenericRequest_GetRequest(pRequest));
+        USBD_Stall(0);
+    }
+}
+
+
+//------------------------------------------------------------------------------
+/// Test if RemoteWakeUP feature is enabled
+/// \param pDriver  Pointer to an USBDDriver instance.
+/// \return 1 if remote wake up has been enabled by the host; otherwise, returns
+/// 0
+//------------------------------------------------------------------------------
+unsigned char USBDDriver_IsRemoteWakeUpEnabled(const USBDDriver *pDriver)
+{
+    return pDriver->isRemoteWakeUpEnabled;
+}
+
+#if defined(BOARD_USB_OTGHS)
+//------------------------------------------------------------------------------
+/// Return OTG features supported
+/// \return the OTG features
+//------------------------------------------------------------------------------
+unsigned char USBDDriver_returnOTGFeatures(void)
+{
+    return otg_features_supported;
+}
+
+//------------------------------------------------------------------------------
+/// Clear OTG features supported
+/// \return none
+//------------------------------------------------------------------------------
+void USBDDriver_clearOTGFeatures(void)
+{
+    otg_features_supported = 0;
+}
+#endif
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriver.h b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriver.h
new file mode 100644
index 00000000..6dd6691f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriver.h
@@ -0,0 +1,106 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+    USB Device Driver class definition.
+
+ !!!Usage
+
+    -# Instanciate a USBDDriver object and initialize it using
+       USBDDriver_Initialize.
+    -# When a USB SETUP request is received, forward it to the standard
+       driver using USBDDriver_RequestHandler.
+    -# Check the Remote Wakeup setting via USBDDriver_IsRemoteWakeUpEnabled.
+*/
+
+#ifndef USBDDRIVER_H
+#define USBDDRIVER_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBDDriverDescriptors.h"
+#include <usb/common/core/USBGenericRequest.h>
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// USB device driver structure, holding a list of descriptors identifying
+/// the device as well as the driver current state.
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// List of descriptors used by the device.
+    const USBDDriverDescriptors *pDescriptors;
+    /// Current setting for each interface.
+    unsigned char *pInterfaces;
+    /// Current configuration number (0 -> device is not configured).
+    unsigned char cfgnum;
+    /// Indicates if remote wake up has been enabled by the host.
+    unsigned char isRemoteWakeUpEnabled;
+#if defined(BOARD_USB_OTGHS)
+    /// Features supported by OTG
+    unsigned char otg_features_supported;
+#endif
+} USBDDriver;
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern void USBDDriver_Initialize(
+    USBDDriver *pDriver,
+    const USBDDriverDescriptors *pDescriptors,
+    unsigned char *pInterfaces);
+
+extern void USBDDriver_RequestHandler(
+    USBDDriver *pDriver,
+    const USBGenericRequest *pRequest);
+
+extern unsigned char USBDDriver_IsRemoteWakeUpEnabled(const USBDDriver *pDriver);
+
+#if defined(BOARD_USB_OTGHS)
+extern unsigned char USBDDriver_returnOTGFeatures(void);
+extern void USBDDriver_clearOTGFeatures(void);
+#endif
+
+#endif //#ifndef USBDDRIVER_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverCallbacks.h b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverCallbacks.h
new file mode 100644
index 00000000..0a904d4d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverCallbacks.h
@@ -0,0 +1,66 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+    Definition of several callbacks which are triggered by the USB software
+    driver after receiving specific requests.
+
+ !!!Usage
+
+    -# Re-implement the USBDDriverCallbacks_ConfigurationChanged
+        callback to know when the hosts changes the active configuration of
+        the device.
+    -# Re-implement the USBDDriverCallbacks_InterfaceSettingChanged
+        callback to get notified whenever the active setting of an interface
+        is changed by the host.
+*/
+
+#ifndef USBDDRIVERCALLBACKS_H
+#define USBDDRIVERCALLBACKS_H
+
+//------------------------------------------------------------------------------
+//         Exported functions
+//------------------------------------------------------------------------------
+
+extern void USBDDriverCallbacks_ConfigurationChanged(unsigned char cfgnum);
+
+extern void USBDDriverCallbacks_InterfaceSettingChanged(unsigned char iface,
+                                                        unsigned char setting);
+
+#endif //#ifndef USBDDRIVERCALLBACKS_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverCb_CfgChanged.c b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverCb_CfgChanged.c
new file mode 100644
index 00000000..63c6e219
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverCb_CfgChanged.c
@@ -0,0 +1,54 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBDDriverCallbacks.h"
+#include <utility/trace.h>
+
+//------------------------------------------------------------------------------
+//         Global functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Indicates that the current configuration of the device has changed.
+/// \param cfgnum  New device configuration index.
+//------------------------------------------------------------------------------
+void USBDDriverCallbacks_ConfigurationChanged(unsigned char cfgnum)
+{
+    TRACE_INFO_WP("ConfigurationChanged ");
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverCb_IfSettingChanged.c b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverCb_IfSettingChanged.c
new file mode 100644
index 00000000..07692cee
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverCb_IfSettingChanged.c
@@ -0,0 +1,57 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBDDriverCallbacks.h"
+#include <utility/trace.h>
+
+//------------------------------------------------------------------------------
+//         Global functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Notifies of a change in the currently active setting of an interface.
+/// \param interface  Number of the interface whose setting has changed.
+/// \param setting  New interface setting.
+//------------------------------------------------------------------------------
+void USBDDriverCallbacks_InterfaceSettingChanged(
+    unsigned char iface,
+    unsigned char setting)
+{
+    TRACE_INFO_WP("InterfaceSettingChanged ");
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverDescriptors.h b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverDescriptors.h
new file mode 100644
index 00000000..b33bb7c9
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBDDriverDescriptors.h
@@ -0,0 +1,91 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ \unit
+
+ !!!Purpose
+
+    Definition of a class for declaring USB descriptors required by the
+    device driver.
+*/
+
+#ifndef USBDDRIVERDESCRIPTORS_H
+#define USBDDRIVERDESCRIPTORS_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <usb/common/core/USBDeviceDescriptor.h>
+#include <usb/common/core/USBConfigurationDescriptor.h>
+#include <usb/common/core/USBDeviceQualifierDescriptor.h>
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// List of all descriptors used by a USB device driver. Each descriptor can
+/// be provided in two versions: full-speed and high-speed. Devices which are
+/// not high-speed capable do not need to provided high-speed descriptors and
+/// the full-speed qualifier & other speed descriptors.
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// Pointer to the full-speed device descriptor.
+    const USBDeviceDescriptor *pFsDevice;
+    /// Pointer to the full-speed configuration descriptor.
+    const USBConfigurationDescriptor *pFsConfiguration;
+    /// Pointer to the full-speed qualifier descriptor.
+    const USBDeviceQualifierDescriptor *pFsQualifier;
+    /// Pointer to the full-speed other speed configuration descriptor.
+    const USBConfigurationDescriptor *pFsOtherSpeed;
+    /// Pointer to the high-speed device descriptor.
+    const USBDeviceDescriptor *pHsDevice;
+    /// Pointer to the high-speed configuration descriptor.
+    const USBConfigurationDescriptor *pHsConfiguration;
+    /// Pointer to the high-speed qualifier descriptor.
+    const USBDeviceQualifierDescriptor *pHsQualifier;
+    /// Pointer to the high-speed other speed configuration descriptor.
+    const USBConfigurationDescriptor *pHsOtherSpeed;
+    /// Pointer to the list of string descriptors.
+    const unsigned char **pStrings;
+    /// Number of string descriptors in list.
+    unsigned char numStrings;
+
+} USBDDriverDescriptors;
+
+#endif //#ifndef USBDDRIVERDESCRIPTORS_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD_OTGHS.c b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD_OTGHS.c
new file mode 100644
index 00000000..0fbc940f
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD_OTGHS.c
@@ -0,0 +1,1709 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+ 
+//------------------------------------------------------------------------------
+//      Headers
+//------------------------------------------------------------------------------
+
+#include "USBD.h"
+#include "USBDCallbacks.h"
+#include "USBDDriver.h"
+#include <board.h>
+#include <pio/pio.h>
+#include <utility/trace.h>
+#include <utility/led.h>
+#include <usb/common/core/USBEndpointDescriptor.h>
+#include <usb/common/core/USBGenericRequest.h>
+#include <usb/common/core/USBFeatureRequest.h>
+#include <pmc/pmc.h>
+
+
+#if defined(BOARD_USB_OTGHS)
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+/// Maximum number of endpoints interrupts.
+#define NUM_IT_MAX       \
+   (AT91C_BASE_OTGHS->OTGHS_IPFEATURES & AT91C_OTGHS_EPT_NBR_MAX)
+/// Maximum number of endpoint DMA interrupts
+#define NUM_IT_MAX_DMA   \
+   ((AT91C_BASE_OTGHS->OTGHS_IPFEATURES & AT91C_OTGHS_DMA_CHANNEL_NBR)>>4)
+/// Bits that should be shifted to access DMA control bits.
+#define SHIFT_DMA        24
+/// Bits that should be shifted to access interrupt bits.
+#define SHIFT_INTERUPT   12
+
+/// Compile option, use DMA. Remove this define for not use DMA.
+#define DMA
+
+/// Max size of the FMA FIFO
+#define DMA_MAX_FIFO_SIZE    32768
+
+#define EPT_VIRTUAL_SIZE      8192
+
+//------------------------------------------------------------------------------
+/// \page "Endpoint states"
+/// This page lists the endpoint states.
+/// !States
+//  - UDP_ENDPOINT_DISABLED
+//  - UDP_ENDPOINT_HALTED
+//  - UDP_ENDPOINT_IDLE
+//  - UDP_ENDPOINT_SENDING
+//  - UDP_ENDPOINT_RECEIVING
+
+/// Endpoint states: Endpoint is disabled
+#define UDP_ENDPOINT_DISABLED       0
+/// Endpoint states: Endpoint is halted (i.e. STALLs every request)
+#define UDP_ENDPOINT_HALTED         1
+/// Endpoint states: Endpoint is idle (i.e. ready for transmission)
+#define UDP_ENDPOINT_IDLE           2
+/// Endpoint states: Endpoint is sending data
+#define UDP_ENDPOINT_SENDING        3
+/// Endpoint states: Endpoint is receiving data
+#define UDP_ENDPOINT_RECEIVING      4
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//      Structures
+//------------------------------------------------------------------------------
+
+/// Describes an ongoing transfer on a UDP endpoint.
+typedef struct
+{
+    /// Pointer to a data buffer used for emission/reception.
+    char             *pData;
+    /// Number of bytes which have been written into the UDP internal FIFO
+    /// buffers.
+    volatile int     buffered;
+    /// Number of bytes which have been sent/received.
+    volatile int     transferred;
+    /// Number of bytes which have not been buffered/transferred yet.
+    volatile int     remaining;
+    /// Optional callback to invoke when the transfer completes.
+    volatile TransferCallback fCallback;
+    /// Optional argument to the callback function.
+    void             *pArgument;
+} Transfer;
+
+//------------------------------------------------------------------------------
+/// Describes the state of an endpoint of the UDP controller.
+//------------------------------------------------------------------------------
+typedef struct
+{
+    /// Current endpoint state.
+    volatile unsigned char  state;
+    /// Current reception bank (0 or 1).
+    unsigned char  bank;
+    /// Maximum packet size for the endpoint.
+    unsigned short size;
+    /// Describes an ongoing transfer (if current state is either
+    ///  <UDP_ENDPOINT_SENDING> or <UDP_ENDPOINT_RECEIVING>)
+    Transfer       transfer;
+    /// Special case for send a ZLP
+    unsigned char  sendZLP;
+} Endpoint;
+
+//------------------------------------------------------------------------------
+//         Internal variables
+//------------------------------------------------------------------------------
+
+/// Holds the internal state for each endpoint of the UDP.
+static Endpoint      endpoints[BOARD_USB_NUMENDPOINTS];
+/// Device current state.
+static unsigned char deviceState;
+/// Indicates the previous device state
+static unsigned char previousDeviceState;
+
+/// 7.1.20 Test Mode Support
+/// Test codes for the USB HS test mode.
+static const char test_packet_buffer[] = {
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,                // JKJKJKJK * 9
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,                     // JJKKJJKK * 8
+    0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,                     // JJJJKKKK * 8
+    0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, // JJJJJJJKKKKKKK * 8
+    0x7F,0xBF,0xDF,0xEF,0xF7,0xFB,0xFD,                          // JJJJJJJK * 8
+    0xFC,0x7E,0xBF,0xDF,0xEF,0xF7,0xFB,0xFD,0x7E                 // {JKKKKKKK * 10}, JK
+};
+
+//------------------------------------------------------------------------------
+//      Internal Functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Enable UDPHS clock
+//------------------------------------------------------------------------------
+static inline void OTGHS_EnableUsbClock( void )
+{
+
+}
+
+//------------------------------------------------------------------------------
+/// Disable UDPHS clock
+//------------------------------------------------------------------------------
+static inline void OTGHS_DisableUsbClock( void )
+{
+
+}
+
+//------------------------------------------------------------------------------
+/// Enables the transceiver of the USB controller
+//------------------------------------------------------------------------------
+static void OTGHS_EnableTransceiver(void)
+{
+    AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_OTGPADE;
+}
+
+//------------------------------------------------------------------------------
+/// Disables the transceiver of the USB controller associated with the specified
+/// USB driver
+//------------------------------------------------------------------------------
+static void OTGHS_DisableTransceiver(void)
+{
+    AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_OTGPADE;
+}
+
+//------------------------------------------------------------------------------
+/// Handles a completed transfer on the given endpoint, invoking the
+/// configured callback if any.
+/// \param bEndpoint Number of the endpoint for which the transfer has completed.
+/// \param bStatus   Status code returned by the transfer operation
+//------------------------------------------------------------------------------
+static void OTGHS_EndOfTransfer( unsigned char bEndpoint, char bStatus )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+
+    // Check that endpoint was sending or receiving data
+    if( (pEndpoint->state == UDP_ENDPOINT_RECEIVING)
+     || (pEndpoint->state == UDP_ENDPOINT_SENDING) ) {
+
+        TRACE_DEBUG_WP("Eo");
+        if(pEndpoint->state == UDP_ENDPOINT_SENDING) {
+            pEndpoint->sendZLP = 0;
+        }
+        // Endpoint returns in Idle state
+        pEndpoint->state = UDP_ENDPOINT_IDLE;
+
+        // Invoke callback is present
+        if (pTransfer->fCallback != 0) {
+
+            ((TransferCallback) pTransfer->fCallback)
+                (pTransfer->pArgument,
+                 bStatus,
+                 pTransfer->transferred,
+                 pTransfer->remaining + pTransfer->buffered);
+        }
+        else {
+            TRACE_DEBUG_WP("No callBack\n\r");
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Transfers a data payload from the current tranfer buffer to the endpoint
+/// FIFO
+/// \param bEndpoint Number of the endpoint which is sending data.
+//------------------------------------------------------------------------------
+static void OTGHS_WritePayload( unsigned char bEndpoint )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+    char     *pFifo;
+    signed int   size;
+    unsigned int dCtr;
+
+    pFifo = (char*)((unsigned int *)AT91C_BASE_OTGHS_EPTFIFO + (EPT_VIRTUAL_SIZE * bEndpoint));
+
+    // Get the number of bytes to send
+    size = pEndpoint->size;
+    if (size > pTransfer->remaining) {
+
+        size = pTransfer->remaining;
+    }
+
+    // Update transfer descriptor information
+    pTransfer->buffered += size;
+    pTransfer->remaining -= size;
+
+    // Write packet in the FIFO buffer
+    dCtr = 0;
+    while (size > 0) {
+
+        pFifo[dCtr] = *(pTransfer->pData);
+        pTransfer->pData++;
+        size--;
+        dCtr++;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Transfers a data payload from an endpoint FIFO to the current transfer buffer
+/// \param bEndpoint   Endpoint number.
+/// \param wPacketSize Size of received data packet
+//------------------------------------------------------------------------------
+static void OTGHS_ReadPayload( unsigned char bEndpoint, int wPacketSize )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+    char     *pFifo;
+    unsigned char dBytes=0;
+
+    pFifo = (char*)((unsigned int *)AT91C_BASE_OTGHS_EPTFIFO + (EPT_VIRTUAL_SIZE * bEndpoint));
+
+    // Check that the requested size is not bigger than the remaining transfer
+    if (wPacketSize > pTransfer->remaining) {
+
+        pTransfer->buffered += wPacketSize - pTransfer->remaining;
+        wPacketSize = pTransfer->remaining;
+    }
+
+    // Update transfer descriptor information
+    pTransfer->remaining -= wPacketSize;
+    pTransfer->transferred += wPacketSize;
+
+    // Retrieve packet
+    while (wPacketSize > 0) {
+
+        *(pTransfer->pData) = pFifo[dBytes];
+        pTransfer->pData++;
+        wPacketSize--;
+        dBytes++;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Received SETUP packet from endpoint 0 FIFO
+/// \param pRequest Generic USB SETUP request sent over Control endpoints
+//------------------------------------------------------------------------------
+static void OTGHS_ReadRequest( USBGenericRequest *pRequest )
+{
+    unsigned int *pData = (unsigned int *)pRequest;
+    unsigned int fifo;
+
+    fifo = (AT91C_BASE_OTGHS_EPTFIFO->OTGHS_READEPT0[0]);
+    *pData = fifo;
+    fifo = (AT91C_BASE_OTGHS_EPTFIFO->OTGHS_READEPT0[0]);
+    pData++;
+    *pData = fifo;
+    //TRACE_ERROR("SETUP: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n\r", pData[0],pData[1],pData[2],pData[3],pData[4],pData[5],pData[6],pData[7]);
+}
+
+//------------------------------------------------------------------------------
+/// Reset all endpoint transfer descriptors
+//------------------------------------------------------------------------------
+static void OTGHS_ResetEndpoints( void )
+{
+    Endpoint *pEndpoint;
+    Transfer *pTransfer;
+
+    unsigned char bEndpoint;
+
+    // Reset the transfer descriptor of every endpoint
+    for( bEndpoint = 0; bEndpoint < BOARD_USB_NUMENDPOINTS; bEndpoint++ ) {
+
+        pEndpoint = &(endpoints[bEndpoint]);
+        pTransfer = &(pEndpoint->transfer);
+
+        // Reset endpoint transfer descriptor
+        pTransfer->pData = 0;
+        pTransfer->transferred = -1;
+        pTransfer->buffered = -1;
+        pTransfer->remaining = -1;
+        pTransfer->fCallback = 0;
+        pTransfer->pArgument = 0;
+
+        // Reset endpoint state
+        pEndpoint->bank = 0;
+        pEndpoint->state = UDP_ENDPOINT_DISABLED;
+        // Reset ZLP
+        pEndpoint->sendZLP = 0;
+    }
+}
+
+
+//------------------------------------------------------------------------------
+/// Disable all endpoints (except control endpoint 0), aborting current 
+/// transfers if necessary
+//------------------------------------------------------------------------------
+static void OTGHS_DisableEndpoints( void )
+{
+    unsigned char bEndpoint;
+
+    // Disable each endpoint, terminating any pending transfer
+
+
+    // Control endpoint 0 is not disabled
+    for( bEndpoint = 1; bEndpoint < BOARD_USB_NUMENDPOINTS; bEndpoint++ ) {
+
+        OTGHS_EndOfTransfer( bEndpoint, USBD_STATUS_ABORTED );
+        endpoints[bEndpoint].state = UDP_ENDPOINT_DISABLED;
+    }
+}
+
+
+//------------------------------------------------------------------------------
+/// Endpoint interrupt handler.
+/// Handle IN/OUT transfers, received SETUP packets and STALLing
+/// \param bEndpoint Index of endpoint
+//------------------------------------------------------------------------------
+static void OTGHS_EndpointHandler( unsigned char bEndpoint )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+    unsigned int   status = AT91C_BASE_OTGHS->OTGHS_DEVEPTISR[bEndpoint];
+    unsigned short wPacketSize;
+    USBGenericRequest request;
+
+    TRACE_DEBUG_WP("E%d ", bEndpoint);
+    TRACE_DEBUG_WP("st:0x%X ", status);
+
+    // Handle interrupts
+    // IN packet sent
+    if((AT91C_BASE_OTGHS->OTGHS_DEVEPTIMR[bEndpoint] & AT91C_OTGHS_TXINI)
+    && (status & AT91C_OTGHS_TXINI )) {
+
+        TRACE_DEBUG_WP("Wr ");
+
+        // Check that endpoint was in Sending state
+        if( pEndpoint->state == UDP_ENDPOINT_SENDING ) {
+
+            if (pTransfer->buffered > 0) {
+                pTransfer->transferred += pTransfer->buffered;
+                pTransfer->buffered = 0;
+            }
+
+            if(  ((pTransfer->buffered)==0)
+               &&((pTransfer->transferred)==0)
+               &&((pTransfer->remaining)==0)
+               &&(pEndpoint->sendZLP == 0)) {
+                pEndpoint->sendZLP = 1;
+            }
+
+            // End of transfer ?
+            if( (pTransfer->remaining > 0)
+              ||(pEndpoint->sendZLP == 1)) {
+
+                pEndpoint->sendZLP = 2;
+                // Transfer remaining data
+                TRACE_DEBUG_WP(" %d ", pEndpoint->size);
+                // Send next packet
+                OTGHS_WritePayload(bEndpoint);
+
+                // Send Token IN
+                AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_TXINI;
+                // For a non-control endpoint, the FIFOCON bit must be cleared
+                // to start the transfer
+                if ((AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint])
+                                             != AT91C_OTGHS_EPT_TYPE_CTL_EPT) {
+                    // Send IN
+                    AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_FIFOCON;
+                }
+            }
+            else {
+
+                TRACE_DEBUG_WP("\n\r0pTransfer->buffered %d \n\r", pTransfer->buffered);
+                TRACE_DEBUG_WP("0pTransfer->transferred %d \n\r", pTransfer->transferred);
+                TRACE_DEBUG_WP("0pTransfer->remaining %d \n\r", pTransfer->remaining);
+
+                TRACE_DEBUG_WP(" %d ", pTransfer->transferred);
+
+                // Disable interrupt if this is not a control endpoint
+                if ((AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint])
+                    != AT91C_OTGHS_EPT_TYPE_CTL_EPT) {
+
+                    AT91C_BASE_OTGHS->OTGHS_DEVIDR = 1<<SHIFT_INTERUPT<<bEndpoint;
+
+                }
+                AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_TXINI;
+                OTGHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);
+                pEndpoint->sendZLP = 0;
+            }
+        }
+        else {
+              TRACE_DEBUG("Error Wr %d", pEndpoint->sendZLP);
+        }
+    }
+
+    // OUT packet received
+    if( AT91C_OTGHS_RXOUT == (status & AT91C_OTGHS_RXOUT) ) {
+
+        // Check that the endpoint is in Receiving state
+        if (pEndpoint->state != UDP_ENDPOINT_RECEIVING) {
+
+            // Check if an ACK has been received on a Control endpoint
+            if( ((AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint])
+                  == AT91C_OTGHS_EPT_TYPE_CTL_EPT)
+             && (0 == (status & AT91C_OTGHS_BYCT)) ) {
+
+                // Control endpoint, 0 bytes received
+                // Acknowledge the data and finish the current transfer
+                TRACE_DEBUG_WP("Ack ");
+                AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_RXOUT;
+                AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_RXOUT;
+                //OTGHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);
+            }
+            // Check if the data has been STALLed
+            else if( AT91C_OTGHS_STALL == (status & AT91C_OTGHS_STALL)) {
+
+                // Discard STALLed data
+                TRACE_DEBUG_WP("Discard ");
+                AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_RXOUT;
+            }
+            else {
+                // NAK the data
+                TRACE_DEBUG_WP("Nak ");
+                AT91C_BASE_OTGHS->OTGHS_DEVIDR = 1<<SHIFT_INTERUPT<<bEndpoint;
+            }
+        }
+        else {
+
+            // Endpoint is in Read state
+            // Retrieve data and store it into the current transfer buffer
+            wPacketSize = (unsigned short) ((status >> 20) & 0x7FF);
+
+            //TRACE_ERROR_WP("out:%d ", wPacketSize);
+            OTGHS_ReadPayload(bEndpoint, wPacketSize);
+            AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_RXOUT;
+            if((AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint])
+                  != AT91C_OTGHS_EPT_TYPE_CTL_EPT) {
+                AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_FIFOCON;
+            }
+
+            // Check if the transfer is finished
+            if ((pTransfer->remaining == 0) || (wPacketSize < pEndpoint->size)) {
+
+                AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_RXOUT;
+
+                // Disable interrupt if this is not a control endpoint
+                if ((AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint])
+                    != AT91C_OTGHS_EPT_TYPE_CTL_EPT) {
+
+                    AT91C_BASE_OTGHS->OTGHS_DEVIDR = 1<<SHIFT_INTERUPT<<bEndpoint;
+                }
+                //TRACE_ERROR_WP("Y ");
+                OTGHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);
+            }
+        }
+    }
+
+    // STALL sent
+    if( AT91C_OTGHS_STALL == (status & AT91C_OTGHS_STALL) ) {
+
+        TRACE_WARNING( "Sta 0x%X [%d] ", status, bEndpoint);
+
+        // Acknowledge the stall flag
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_STALL;
+
+        // If the endpoint is not halted, clear the STALL condition
+        if (pEndpoint->state != UDP_ENDPOINT_HALTED) {
+
+            TRACE_WARNING("_ " );
+            AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_STALLRQ;
+        }
+    }
+
+    // SETUP packet received
+    if( AT91C_OTGHS_RXSTP == (status & AT91C_OTGHS_RXSTP) )  {
+
+        TRACE_DEBUG_WP("Stp ");
+
+        // If a transfer was pending, complete it
+        // Handles the case where during the status phase of a control write
+        // transfer, the host receives the device ZLP and ack it, but the ack
+        // is not received by the device
+        if ((pEndpoint->state == UDP_ENDPOINT_RECEIVING)
+            || (pEndpoint->state == UDP_ENDPOINT_SENDING)) {
+
+            OTGHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);
+        }
+
+        // Copy the setup packet
+        OTGHS_ReadRequest(&request);
+
+        // Acknowledge setup packet
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_RXSTP;
+
+        // Forward the request to the upper layer
+        USBDCallbacks_RequestReceived(&request);
+    }
+}
+
+//------------------------------------------------------------------------------
+//      Interrupt service routine
+//------------------------------------------------------------------------------
+#ifdef DMA
+//----------------------------------------------------------------------------
+/// Endpoint DMA interrupt handler.
+/// This function (ISR) handles dma interrupts
+/// \param bEndpoint Index of endpoint
+//----------------------------------------------------------------------------
+static void OTGHS_DmaHandler( unsigned char bEndpoint )
+{
+    Endpoint     *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer     *pTransfer = &(pEndpoint->transfer);
+    int           justTransferred;
+    unsigned int  status;
+    unsigned char result = USBD_STATUS_SUCCESS;
+
+    status = AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMASTATUS;
+    TRACE_DEBUG_WP("Dma Ept%d ", bEndpoint);
+
+    // Disable DMA interrupt to avoid receiving 2 interrupts (B_EN and TR_EN)
+    AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL &=
+        ~(AT91C_OTGHS_END_TR_EN | AT91C_OTGHS_END_B_EN);
+
+    AT91C_BASE_OTGHS->OTGHS_DEVIDR = (1<<SHIFT_DMA<<bEndpoint);
+
+    if( AT91C_OTGHS_END_BF_ST == (status & AT91C_OTGHS_END_BF_ST) ) {
+
+        TRACE_DEBUG_WP("EndBuffer ");
+
+        // BUFF_COUNT holds the number of untransmitted bytes.
+        // BUFF_COUNT is equal to zero in case of good transfer
+        justTransferred = pTransfer->buffered
+                                 - ((status & AT91C_OTGHS_BUFF_COUNT) >> 16);
+        pTransfer->transferred += justTransferred;
+
+        pTransfer->buffered = ((status & AT91C_OTGHS_BUFF_COUNT) >> 16);
+
+        pTransfer->remaining -= justTransferred;
+
+        TRACE_DEBUG_WP("\n\r1pTransfer->buffered %d \n\r", pTransfer->buffered);
+        TRACE_DEBUG_WP("1pTransfer->transferred %d \n\r", pTransfer->transferred);
+        TRACE_DEBUG_WP("1pTransfer->remaining %d \n\r", pTransfer->remaining);
+
+        if( (pTransfer->remaining + pTransfer->buffered) > 0 ) {
+
+            // Prepare an other transfer
+            if( pTransfer->remaining > DMA_MAX_FIFO_SIZE ) {
+
+                pTransfer->buffered = DMA_MAX_FIFO_SIZE;    
+            }
+            else {
+                pTransfer->buffered = pTransfer->remaining;
+            }
+
+            AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMAADDRESS = 
+                (unsigned int)((pTransfer->pData) + (pTransfer->transferred));
+
+            // Clear unwanted interrupts
+            AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMASTATUS;
+
+            // Enable DMA endpoint interrupt
+            AT91C_BASE_OTGHS->OTGHS_DEVIER = (1 << SHIFT_DMA << bEndpoint);
+            // DMA config for receive the good size of buffer, or an error buffer
+
+            AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL = 0; // raz
+            AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL =
+                                     ( ((pTransfer->buffered << 16) & AT91C_OTGHS_BUFF_COUNT)
+                                       | AT91C_OTGHS_END_TR_EN
+                                       | AT91C_OTGHS_END_TR_IT
+                                       | AT91C_OTGHS_END_B_EN
+                                       | AT91C_OTGHS_END_BUFFIT
+                                       | AT91C_OTGHS_CHANN_ENB );
+        }
+    }
+    else if( AT91C_OTGHS_END_TR_ST == (status & AT91C_OTGHS_END_TR_ST) ) {
+
+        TRACE_DEBUG_WP("EndTransf ");
+
+        pTransfer->transferred = pTransfer->buffered
+                                 - ((status & AT91C_OTGHS_BUFF_COUNT) >> 16);
+        pTransfer->remaining = 0;
+        TRACE_DEBUG_WP("\n\r0pTransfer->buffered %d \n\r", pTransfer->buffered);
+        TRACE_DEBUG_WP("0pTransfer->transferred %d \n\r", pTransfer->transferred);
+        TRACE_DEBUG_WP("0pTransfer->remaining %d \n\r", pTransfer->remaining);
+    }
+    else {
+
+        TRACE_ERROR("OTGHS_DmaHandler: Error (0x%08X)\n\r", status);
+        result = USBD_STATUS_ABORTED;
+    }
+
+    // Invoke callback
+    if( pTransfer->remaining == 0 ) {
+
+        TRACE_DEBUG_WP("EOT ");
+        OTGHS_EndOfTransfer(bEndpoint, result);
+    }
+}
+#endif
+
+//------------------------------------------------------------------------------
+//      Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// USB interrupt handler
+/// Manages device resume, suspend, end of bus reset. 
+/// Forwards endpoint interrupts to the appropriate handler.
+//------------------------------------------------------------------------------
+void RealUdphsIrqHandler(void) @spontaneous()
+{
+    unsigned int  status;
+    unsigned char numIT;
+
+    call UdphsInterruptWrapper.preamble();
+    if (deviceState >= USBD_STATE_POWERED) {
+
+        //LED_Set(USBD_LEDUSB);
+        //TOSH_SET_GREEN_LED_PIN();
+    }
+
+    // Get interrupts status
+    status = AT91C_BASE_OTGHS->OTGHS_SR & AT91C_BASE_OTGHS->OTGHS_CTRL & 0xFF;
+    while (status != 0) {
+        //TRACE_ERROR_WP("~");
+        if((status&AT91C_OTGHS_VBUSTI)==AT91C_OTGHS_VBUSTI) {
+            TRACE_DEBUG_WP("__VBus\n\r");
+
+            USBD_Connect();
+
+            // Acknowledge the interrupt
+            AT91C_BASE_OTGHS->OTGHS_SCR = AT91C_OTGHS_VBUSTI;
+        }
+
+        // Don't treat others interrupt for this time
+        AT91C_BASE_OTGHS->OTGHS_SCR = AT91C_OTGHS_IDT    | AT91C_OTGHS_SRP 
+                              | AT91C_OTGHS_VBERR  | AT91C_OTGHS_BCERR
+                              | AT91C_OTGHS_ROLEEX | AT91C_OTGHS_HNPERR
+                              | AT91C_OTGHS_STO;
+
+        AT91C_BASE_OTGHS->OTGHS_CTRL &= ~(AT91C_OTGHS_IDT); 
+    
+        status = AT91C_BASE_OTGHS->OTGHS_SR & AT91C_BASE_OTGHS->OTGHS_CTRL & 0xFF;
+    }
+
+
+    // Get OTG Device interrupts status
+    status = AT91C_BASE_OTGHS->OTGHS_DEVISR & AT91C_BASE_OTGHS->OTGHS_DEVIMR;
+    while (status != 0) {
+        //TRACE_ERROR_WP("=");
+        // Start Of Frame (SOF)
+        if((status&AT91C_OTGHS_SOF)==AT91C_OTGHS_SOF) {
+            TRACE_DEBUG_WP("SOF ");
+
+            // Invoke the SOF callback
+            //USB_StartOfFrameCallback();
+
+            // Acknowledge interrupt
+            AT91C_BASE_OTGHS->OTGHS_DEVICR = AT91C_OTGHS_SOF;
+            status &= ~AT91C_OTGHS_SOF;
+        }
+
+        // Suspend
+        // This interrupt is always treated last (hence the '==')
+        else if (status == AT91C_OTGHS_SUSP) {
+
+            TRACE_DEBUG_WP("S");
+
+            // The device enters the Suspended state
+            //      MCK + UDPCK must be off
+            //      Pull-Up must be connected
+            //      Transceiver must be disabled
+
+            //LED_Clear(USBD_LEDUSB);
+            //TOSH_CLR_GREEN_LED_PIN();
+
+            // Enable wakeup
+            AT91C_BASE_OTGHS->OTGHS_DEVIER = AT91C_OTGHS_EORST | AT91C_OTGHS_WAKEUP | AT91C_OTGHS_EORSM;
+
+            // Acknowledge interrupt
+            AT91C_BASE_OTGHS->OTGHS_DEVICR = AT91C_OTGHS_SUSP;
+            previousDeviceState = deviceState;
+            deviceState = USBD_STATE_SUSPENDED;
+            OTGHS_DisableTransceiver();
+            OTGHS_DisableUsbClock();
+            // Invoke the Suspend callback
+            USBDCallbacks_Suspended();
+        }
+
+        // Resume
+        else if( ((status & AT91C_OTGHS_WAKEUP) != 0)    // line activity
+              || ((status & AT91C_OTGHS_EORSM) != 0))  { // pc wakeup
+
+            // Invoke the Resume callback
+            USBDCallbacks_Resumed();
+
+            TRACE_DEBUG_WP("R");
+
+            OTGHS_EnableUsbClock();
+            OTGHS_EnableTransceiver();
+
+            // The device enters Configured state
+            //      MCK + UDPCK must be on
+            //      Pull-Up must be connected
+            //      Transceiver must be enabled
+
+            deviceState = previousDeviceState;
+
+            AT91C_BASE_OTGHS->OTGHS_DEVICR = 
+                (AT91C_OTGHS_WAKEUP | AT91C_OTGHS_EORSM | AT91C_OTGHS_SUSP);
+            AT91C_BASE_OTGHS->OTGHS_DEVIER = (AT91C_OTGHS_EORST | AT91C_OTGHS_SUSP);
+            AT91C_BASE_OTGHS->OTGHS_DEVICR = (AT91C_OTGHS_WAKEUP | AT91C_OTGHS_EORSM);
+            AT91C_BASE_OTGHS->OTGHS_DEVIDR = AT91C_OTGHS_WAKEUP;
+
+        }
+
+        // End of bus reset
+        else if ((status & AT91C_OTGHS_EORST) == AT91C_OTGHS_EORST) {
+
+            TRACE_DEBUG_WP("EoB ");
+
+            // The device enters the Default state
+            deviceState = USBD_STATE_DEFAULT;
+            //      MCK + UDPCK are already enabled
+            //      Pull-Up is already connected
+            //      Transceiver must be enabled
+            //      Endpoint 0 must be enabled
+
+            OTGHS_EnableTransceiver();
+            USBDDriver_clearOTGFeatures();
+
+            // The device leaves the Address & Configured states
+            OTGHS_ResetEndpoints();
+            OTGHS_DisableEndpoints();
+            USBD_ConfigureEndpoint(0);
+
+            // Flush and enable the Suspend interrupt
+            AT91C_BASE_OTGHS->OTGHS_DEVICR = AT91C_OTGHS_WAKEUP | AT91C_OTGHS_SUSP;
+
+            //// Enable the Start Of Frame (SOF) interrupt if needed
+            //if (pCallbacks->startOfFrame != 0)
+            //{
+            //    AT91C_BASE_OTGHS->OTGHS_DEVIER |= AT91C_OTGHS_SOF;
+            //}
+
+            // Invoke the Reset callback
+            USBDCallbacks_Reset();
+
+            // Acknowledge end of bus reset interrupt
+            AT91C_BASE_OTGHS->OTGHS_DEVICR = AT91C_OTGHS_EORST;
+        }
+
+        // Handle upstream resume interrupt
+        else if (status & AT91C_OTGHS_UPRSM) {
+
+            TRACE_DEBUG_WP("ExtRes ");
+
+            // - Acknowledge the IT
+            AT91C_BASE_OTGHS->OTGHS_DEVICR = AT91C_OTGHS_UPRSM;
+        }
+
+        // Endpoint interrupts
+        else {
+#ifndef DMA
+
+            // Handle endpoint interrupts
+            for (numIT = 0; numIT < NUM_IT_MAX; numIT++) {
+
+                if ((status & (1 << SHIFT_INTERUPT << numIT)) != 0) {
+
+                    OTGHS_EndpointHandler(numIT);
+                }
+            }
+#else
+            // Handle endpoint control interrupt
+            if ((status & (1 << SHIFT_INTERUPT << 0)) != 0) {
+
+                OTGHS_EndpointHandler( 0 );
+            }
+            else {
+
+                numIT = 1;
+                while((status&(0x7E<<SHIFT_DMA)) != 0) {
+
+                    // Check if endpoint has a pending interrupt
+                    if ((status & (1 << SHIFT_DMA << numIT)) != 0) {
+
+                        OTGHS_DmaHandler(numIT);
+                        status &= ~(1 << SHIFT_DMA << numIT);
+                        if (status != 0) {
+
+                            TRACE_INFO_WP("\n\r  - ");
+                        }
+                    }
+                    numIT++;
+                }
+            }
+#endif
+        }
+
+        // Retrieve new interrupt status
+        status = AT91C_BASE_OTGHS->OTGHS_DEVISR & AT91C_BASE_OTGHS->OTGHS_DEVIMR;
+
+        TRACE_DEBUG_WP("\n\r");
+
+        if (status != 0) {
+
+            TRACE_DEBUG_WP("  - ");
+        }
+    }
+
+    if (deviceState >= USBD_STATE_POWERED) {
+
+        //LED_Clear(USBD_LEDUSB);
+        //TOSH_CLR_GREEN_LED_PIN();
+    }
+    call UdphsInterruptWrapper.postamble();
+}
+void UdphsIrqHandler(void) @C() @spontaneous()
+{
+    call UdphsInterruptWrapper.preamble();
+    RealUdphsIrqHandler();
+    call UdphsInterruptWrapper.postamble();
+}
+
+//------------------------------------------------------------------------------
+/// Configure an endpoint with the provided endpoint descriptor
+/// \param pDdescriptor Pointer to the endpoint descriptor
+//------------------------------------------------------------------------------
+void USBD_ConfigureEndpoint(const USBEndpointDescriptor *pDescriptor)
+
+{
+    Endpoint *pEndpoint;
+    unsigned char bEndpoint;
+    unsigned char bType;
+    unsigned char bEndpointDir;
+    unsigned char bSizeEpt = 0;
+
+    // NULL descriptor -> Control endpoint 0
+    if (pDescriptor == 0) {
+
+        bEndpoint = 0;
+        pEndpoint = &(endpoints[bEndpoint]);
+        bType = USBEndpointDescriptor_CONTROL;
+        bEndpointDir = 0;
+        pEndpoint->size = BOARD_USB_ENDPOINTS_MAXPACKETSIZE(0);
+        pEndpoint->bank = BOARD_USB_ENDPOINTS_BANKS(0);
+    }
+    else {
+
+        // The endpoint number
+        bEndpoint = USBEndpointDescriptor_GetNumber(pDescriptor);
+        pEndpoint = &(endpoints[bEndpoint]);
+        // Transfer type: Control, Isochronous, Bulk, Interrupt
+        bType = USBEndpointDescriptor_GetType(pDescriptor);
+        // Direction, ignored for control endpoints
+        bEndpointDir = USBEndpointDescriptor_GetDirection(pDescriptor);
+        pEndpoint->size = USBEndpointDescriptor_GetMaxPacketSize(pDescriptor);
+        pEndpoint->bank = BOARD_USB_ENDPOINTS_BANKS(bEndpoint);
+    }
+
+    // Abort the current transfer is the endpoint was configured and in
+    // Write or Read state
+    if( (pEndpoint->state == UDP_ENDPOINT_RECEIVING)
+     || (pEndpoint->state == UDP_ENDPOINT_SENDING) ) {
+
+        OTGHS_EndOfTransfer(bEndpoint, USBD_STATUS_RESET);
+    }
+    pEndpoint->state = UDP_ENDPOINT_IDLE;
+
+    // Disable endpoint
+    AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_TXINI    
+                                                 | AT91C_OTGHS_RXOUT    
+                                                 | AT91C_OTGHS_RXSTP    
+                                                 | AT91C_OTGHS_NAKOUT   
+                                                 | AT91C_OTGHS_NAKIN    
+                                                 | AT91C_OTGHS_OVERFL   
+                                                 | AT91C_OTGHS_STALL    
+                                                 | AT91C_OTGHS_SHRTPACK 
+                                                 | AT91C_OTGHS_MADATA   
+                                                 | AT91C_OTGHS_DATAX    
+                                                 | AT91C_OTGHS_ERRTRANS 
+                                                 | AT91C_OTGHS_NBUSYBK  
+                                                 | AT91C_OTGHS_FIFOCON  
+                                                 | AT91C_OTGHS_EPDISHDMA
+                                                 | AT91C_OTGHS_NYETDIS  
+                                                 | AT91C_OTGHS_STALLRQ;
+
+    // Reset Endpoint Fifos
+    AT91C_BASE_OTGHS->OTGHS_DEVEPT |= (1<<bEndpoint<<16);
+    AT91C_BASE_OTGHS->OTGHS_DEVEPT &= ~(1<<bEndpoint<<16);
+
+    // Configure endpoint
+    if( pEndpoint->size <= 8 )  {
+        bSizeEpt = 0;
+    } 
+    else if ( pEndpoint->size <= 16 ) {
+        bSizeEpt = 1;
+    }
+    else if ( pEndpoint->size <= 32 ) {
+        bSizeEpt = 2;
+    }
+    else if ( pEndpoint->size <= 64 ) {
+        bSizeEpt = 3;
+    }
+    else if ( pEndpoint->size <= 128 ) {
+        bSizeEpt = 4;
+    }
+    else if ( pEndpoint->size <= 256 ) {
+        bSizeEpt = 5;
+    }
+    else if ( pEndpoint->size <= 512 )  {
+        bSizeEpt = 6;
+    }
+    else if ( pEndpoint->size <= 1024 ) {
+        bSizeEpt = 7;
+    } //else {
+    //  sizeEpt = 0; // control endpoint
+    //}
+
+    // Enable endpoint
+    AT91C_BASE_OTGHS->OTGHS_DEVEPT |= (1<<bEndpoint);
+
+    // Configure endpoint
+    if (bType == USBEndpointDescriptor_CONTROL) {
+
+        // Enable endpoint IT for control endpoint
+        AT91C_BASE_OTGHS->OTGHS_DEVIER = 1<<SHIFT_INTERUPT<<bEndpoint;
+    }
+
+    AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint] = (bSizeEpt << 4) 
+                                                 | (bEndpointDir << 8) 
+                                                 | (bType << 11) 
+                                                 | (((pEndpoint->bank)-1) << 2);
+
+    if (bType == USBEndpointDescriptor_CONTROL) {
+
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_RXSTP;
+    }
+#ifdef DMA
+    else {
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint] |= AT91C_OTGHS_AUTOSW;
+    }
+#endif
+
+    AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_NYETDIS;// with nyet
+    //AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_NYETDIS;  // without nyet
+
+    // Check if the configuration is ok
+    AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint] |= AT91C_OTGHS_ALLOC;
+    if((AT91C_BASE_OTGHS->OTGHS_DEVEPTISR[bEndpoint]&AT91C_OTGHS_CFGOK)==0) {
+
+        TRACE_ERROR("PB bEndpoint: 0x%X\n\r", bEndpoint);
+        TRACE_ERROR("PB bSizeEpt: 0x%X\n\r", bSizeEpt);
+        TRACE_ERROR("PB bEndpointDir: 0x%X\n\r", bEndpointDir);
+        TRACE_ERROR("PB bType: 0x%X\n\r", bType);
+        TRACE_ERROR("PB pEndpoint->bank: 0x%X\n\r", pEndpoint->bank);
+        TRACE_ERROR("PB OTGHS_EPTCFG: 0x%X\n\r", AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint]);
+        for(;;);
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Sends data through an USB endpoint (IN)
+/// Sets up the transfer descriptor, write one or two data payloads
+/// (depending on the number of FIFO banks for the endpoint) and then
+/// starts the actual transfer. The operation is complete when all
+/// the data has been sent.
+/// \param bEndpoint Index of endpoint
+/// \param *pData  Data to be written
+/// \param dLength Data length to be send
+/// \param fCallback  Callback to be call after the success command
+/// \param *pArgument Callback argument
+/// \return USBD_STATUS_LOCKED or USBD_STATUS_SUCCESS
+//------------------------------------------------------------------------------
+char USBD_Write( unsigned char    bEndpoint,
+                 const void       *pData,
+                 unsigned int     dLength,
+                 TransferCallback fCallback,
+                 void             *pArgument )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+//unsigned char i;
+//unsigned char * data;
+
+    // Return if the endpoint is not in IDLE state
+    if (pEndpoint->state != UDP_ENDPOINT_IDLE)  {
+
+        return USBD_STATUS_LOCKED;
+    }
+
+    TRACE_DEBUG_WP("Write%d(%d) ", bEndpoint, dLength);
+    pEndpoint->sendZLP = 0;
+    // Setup the transfer descriptor
+    pTransfer->pData = (void *) pData;
+    pTransfer->remaining = dLength;
+    pTransfer->buffered = 0;
+    pTransfer->transferred = 0;
+    pTransfer->fCallback = fCallback;
+    pTransfer->pArgument = pArgument;
+
+    // Send one packet
+    pEndpoint->state = UDP_ENDPOINT_SENDING;
+
+#ifdef DMA
+    // Test if endpoint type control
+    if (AT91C_OTGHS_EPT_TYPE_CTL_EPT == (AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint])) {
+#endif
+        // Enable endpoint IT
+        AT91C_BASE_OTGHS->OTGHS_DEVIER = (1<<SHIFT_INTERUPT<<bEndpoint);
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_TXINI;
+
+#ifdef DMA
+    }
+    else {
+        if( pTransfer->remaining == 0 ) {
+
+            // DMA not handle ZLP
+            AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_TXINI;
+            // For a non-control endpoint, the FIFOCON bit must be cleared
+            // to start the transfer
+            if ((AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint])
+                != AT91C_OTGHS_EPT_TYPE_CTL_EPT) {
+
+                AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_FIFOCON;
+            }            
+            AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_TXINI;
+
+            // Enable endpoint IT
+            AT91C_BASE_OTGHS->OTGHS_DEVIER = (1<<SHIFT_INTERUPT<<bEndpoint);
+        }
+        else {
+            // Others endpoints (not control)
+            if( pTransfer->remaining > DMA_MAX_FIFO_SIZE ) {
+
+                // Transfer the max
+                pTransfer->buffered = DMA_MAX_FIFO_SIZE;    
+            }
+            else {
+                // Transfer the good size
+                pTransfer->buffered = pTransfer->remaining;
+            }
+
+            TRACE_DEBUG_WP("\n\r_WR:%d ", pTransfer->remaining );
+            TRACE_DEBUG_WP("B:%d ", pTransfer->buffered );
+            TRACE_DEBUG_WP("T:%d ", pTransfer->transferred );
+
+            AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMAADDRESS = (unsigned int)(pTransfer->pData);
+
+            // Clear unwanted interrupts
+            AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMASTATUS;
+
+            // Enable DMA endpoint interrupt
+            AT91C_BASE_OTGHS->OTGHS_DEVIER = (1<<SHIFT_DMA<<bEndpoint);
+            // DMA config
+            AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL = 0; // raz
+            AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL = 
+                 (((pTransfer->buffered<<16)&AT91C_OTGHS_BUFF_LENGTH)
+                   | AT91C_OTGHS_END_B_EN
+                   | AT91C_OTGHS_END_BUFFIT
+                   | AT91C_OTGHS_CHANN_ENB);
+        }
+    }
+#endif
+
+    return USBD_STATUS_SUCCESS;
+}
+
+//------------------------------------------------------------------------------
+/// Reads incoming data on an USB endpoint (OUT)
+/// \param bEndpoint Index of endpoint
+/// \param *pData  Data to be readen
+/// \param dLength Data length to be receive
+/// \param fCallback  Callback to be call after the success command
+/// \param *pArgument Callback argument
+/// \return USBD_STATUS_LOCKED or USBD_STATUS_SUCCESS
+//------------------------------------------------------------------------------
+char USBD_Read( unsigned char    bEndpoint,
+                void             *pData,
+                unsigned int     dLength,
+                TransferCallback fCallback,
+                void             *pArgument )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+  
+    // Return if the endpoint is not in IDLE state
+    if (pEndpoint->state != UDP_ENDPOINT_IDLE) {
+
+        return USBD_STATUS_LOCKED;
+    }
+
+    TRACE_DEBUG_WP("Read%d(%d) ", bEndpoint, dLength);
+    //TRACE_ERROR_WP("Read%d(%d) ", bEndpoint, dLength);
+
+    // Endpoint enters Receiving state
+    pEndpoint->state = UDP_ENDPOINT_RECEIVING;
+
+    // Set the transfer descriptor
+    pTransfer->pData = pData;
+    pTransfer->remaining = dLength;
+    pTransfer->buffered = 0;
+    pTransfer->transferred = 0;
+    pTransfer->fCallback = fCallback;
+    pTransfer->pArgument = pArgument;
+
+#ifdef DMA
+    // Test if endpoint type control
+    if (AT91C_OTGHS_EPT_TYPE_CTL_EPT == (AT91C_OTGHS_EPT_TYPE & AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint])) {
+#endif
+        // Control endpoint
+        // Enable endpoint IT
+        AT91C_BASE_OTGHS->OTGHS_DEVIER = (1<<SHIFT_INTERUPT<<bEndpoint);
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_RXOUT;
+#ifdef DMA
+    }
+    else {
+
+        TRACE_DEBUG_WP("Read%d(%d) ", bEndpoint, dLength);
+
+        // Others endpoints (not control)
+        if( pTransfer->remaining > DMA_MAX_FIFO_SIZE ) {
+
+            // Transfer the max
+            pTransfer->buffered = DMA_MAX_FIFO_SIZE;    
+        }
+        else {
+            // Transfer the good size
+            pTransfer->buffered = pTransfer->remaining;
+        }
+
+        AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMAADDRESS = (unsigned int)(pTransfer->pData);
+
+        // Clear unwanted interrupts
+        AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMASTATUS;
+
+        // Enable DMA endpoint interrupt
+        AT91C_BASE_OTGHS->OTGHS_DEVIER = (1<<SHIFT_DMA<<bEndpoint);
+
+        TRACE_DEBUG_WP("\n\r_RR:%d ", pTransfer->remaining );
+        TRACE_DEBUG_WP("B:%d ", pTransfer->buffered );
+        TRACE_DEBUG_WP("T:%d ", pTransfer->transferred );
+
+        // DMA config
+        AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL = 0; // raz
+        AT91C_BASE_OTGHS->OTGHS_DEVDMA[bEndpoint].OTGHS_DEVDMACONTROL =
+                             (((pTransfer->buffered<<16)&AT91C_OTGHS_BUFF_LENGTH)
+                               | AT91C_OTGHS_END_TR_EN
+                               | AT91C_OTGHS_END_TR_IT
+                               | AT91C_OTGHS_END_B_EN
+                               | AT91C_OTGHS_END_BUFFIT
+                               | AT91C_OTGHS_CHANN_ENB);
+    }
+#endif
+
+  return USBD_STATUS_SUCCESS;
+}
+
+//------------------------------------------------------------------------------
+/// Put endpoint into Halt state
+/// \param bEndpoint Index of endpoint
+//------------------------------------------------------------------------------
+void USBD_Halt( unsigned char bEndpoint )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+
+    TRACE_INFO("usbd_Halt%d ", bEndpoint);
+    //TRACE_ERROR("usbd_Halt%d ", bEndpoint);
+
+    // Check that endpoint is enabled and not already in Halt state
+    if( (pEndpoint->state != UDP_ENDPOINT_DISABLED)
+     && (pEndpoint->state != UDP_ENDPOINT_HALTED) ) {
+
+        TRACE_INFO("Halt%d ", bEndpoint);
+
+        // Abort the current transfer if necessary
+        OTGHS_EndOfTransfer(bEndpoint, USBD_STATUS_ABORTED);
+
+        pEndpoint->state = UDP_ENDPOINT_HALTED;
+        // Put endpoint into Halt state
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_STALLRQ;
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_STALL;
+   }
+}
+
+//------------------------------------------------------------------------------
+/// Clears the Halt feature on the given endpoint.
+/// \param bEndpoint Index of endpoint
+//------------------------------------------------------------------------------
+void USBD_Unhalt( unsigned char bEndpoint )
+{
+    unsigned int cfgSav;
+
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+
+    // Check if the endpoint is enabled
+    if (pEndpoint->state != UDP_ENDPOINT_DISABLED) {
+
+        TRACE_DEBUG_WP("Unhalt%d ", bEndpoint);
+        //TRACE_ERROR("Unhalt%d ", bEndpoint);
+
+        // Return endpoint to Idle state
+        pEndpoint->state = UDP_ENDPOINT_IDLE;
+
+        cfgSav = AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint];
+ 
+        // Reset Endpoint Fifos
+        AT91C_BASE_OTGHS->OTGHS_DEVEPT |= (1<<bEndpoint<<16);
+        AT91C_BASE_OTGHS->OTGHS_DEVEPT &= ~(1<<bEndpoint<<16);
+
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[bEndpoint] = cfgSav;
+
+        if((AT91C_BASE_OTGHS->OTGHS_DEVEPTISR[bEndpoint]&AT91C_OTGHS_CFGOK)==0) {
+
+            TRACE_ERROR("PB bEndpoint: 0x%X\n\r", bEndpoint);
+            for(;;);
+        }
+
+        // Reset data-toggle
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_RSTDT;
+
+        // Clear FORCESTALL flag
+        // Disable stall on endpoint
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[bEndpoint] = AT91C_OTGHS_STALLRQ;
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[bEndpoint] = AT91C_OTGHS_STALL;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Returns the current Halt status of an endpoint.
+/// \param bEndpoint Index of endpoint
+/// \return 1 if the endpoint is currently halted; otherwise 0
+//------------------------------------------------------------------------------
+unsigned char USBD_IsHalted( unsigned char bEndpoint )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    unsigned char status = 0;
+
+    if (pEndpoint->state == UDP_ENDPOINT_HALTED) {
+        status = 1;
+    }
+    return( status );
+}
+
+//------------------------------------------------------------------------------
+/// IS High Speed device working in High Speed ?
+/// \return 1 if the device is in High Speed; otherwise 0 (Full Speed)
+//------------------------------------------------------------------------------
+unsigned char USBD_IsHighSpeed( void )
+{
+    unsigned char status = 0;
+
+    if(AT91C_OTGHS_SPEED_SR_HS == (AT91C_BASE_OTGHS->OTGHS_SR & (0x03<<12))) {
+        // High Speed
+        TRACE_DEBUG_WP("High Speed\n\r");
+        status = 1;
+    }
+    else {
+        TRACE_DEBUG_WP("Full Speed\n\r");
+    }
+    return( status );
+}
+
+//------------------------------------------------------------------------------
+/// Causes the endpoint to acknowledge the next received packet with a STALL
+/// handshake.
+/// Further packets are then handled normally.
+/// \param bEndpoint Index of endpoint
+/// \return Operation result code: USBD_STATUS_LOCKED or USBD_STATUS_SUCCESS
+//------------------------------------------------------------------------------
+unsigned char USBD_Stall( unsigned char bEndpoint )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+
+    // Check that endpoint is in Idle state
+    if (pEndpoint->state != UDP_ENDPOINT_IDLE) {
+
+        TRACE_WARNING("UDP_Stall: Endpoint%d locked\n\r", bEndpoint);
+        return USBD_STATUS_LOCKED;
+    }
+
+    TRACE_DEBUG_WP("Stall%d ", bEndpoint);
+
+    AT91C_BASE_OTGHS->OTGHS_DEVEPTIER[bEndpoint] = AT91C_OTGHS_STALLRQ;
+
+    return USBD_STATUS_SUCCESS;
+}
+
+//------------------------------------------------------------------------------
+/// Activates a remote wakeup procedure
+//------------------------------------------------------------------------------
+void USBD_RemoteWakeUp(void)
+{
+    TRACE_DEBUG_WP("Remote WakeUp\n\r");
+
+    // Device is currently suspended
+    if (deviceState == USBD_STATE_SUSPENDED) {
+
+        TRACE_DEBUG_WP("RW\n\r");
+        OTGHS_EnableUsbClock();
+        OTGHS_EnableTransceiver();
+
+        // Activates a remote wakeup
+        AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_RMWKUP;
+    }
+    // Device is NOT suspended
+    else {
+
+        TRACE_WARNING("USBD_RemoteWakeUp: Device is not suspended\n\r");
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Sets the device address
+/// \param address Adress to be set
+//------------------------------------------------------------------------------
+void USBD_SetAddress( unsigned char address )
+{
+    TRACE_DEBUG_WP("SetAddr(%d) ", address);
+
+    // Set address
+    AT91C_BASE_OTGHS->OTGHS_DEVCTRL &= ~(AT91C_OTGHS_UADD);
+    AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= address & AT91C_OTGHS_UADD;
+    AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_ADDEN;
+
+    // If the address is 0, the device returns to the Default state
+    if (address == 0) {
+        deviceState = USBD_STATE_DEFAULT;
+    }
+    // If the address is non-zero, the device enters the Address state
+    else {
+        deviceState = USBD_STATE_ADDRESS;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Changes the device state from Address to Configured, or from Configured 
+/// to Address.
+/// This method directly access the last received SETUP packet to decide on 
+/// what to do.
+/// \param cfgnum configuration number
+//------------------------------------------------------------------------------
+void USBD_SetConfiguration( unsigned char cfgnum )
+{
+    TRACE_DEBUG_WP("SetCfg(%d) ", cfgnum);
+
+    // Check the request
+    if( cfgnum != 0 ) {
+
+        // Enter Configured state
+        deviceState = USBD_STATE_CONFIGURED;
+    }
+    // If the configuration number is zero, the device goes back to the Address
+    // state
+    else  {
+
+        // Go back to Address state
+        deviceState = USBD_STATE_ADDRESS;
+
+        // Abort all transfers
+        OTGHS_DisableEndpoints();
+    }
+}
+
+
+//------------------------------------------------------------------------------
+/// Enables the pull-up on the D+ line to connect the device to the USB.
+//------------------------------------------------------------------------------
+void USBD_Connect( void )
+{
+    TRACE_DEBUG_WP("Conn ");
+#if defined(BOARD_USB_PULLUP_INTERNAL)
+    AT91C_BASE_OTGHS->OTGHS_DEVCTRL &= ~AT91C_OTGHS_DETACH;
+#else
+    #error "not defined"
+#endif
+}
+
+//------------------------------------------------------------------------------
+/// Disables the pull-up on the D+ line to disconnect the device from the bus.
+//------------------------------------------------------------------------------
+void USBD_Disconnect( void )
+{
+    TRACE_DEBUG_WP("Disc ");
+#if defined(BOARD_USB_PULLUP_INTERNAL)
+    AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_DETACH;
+
+#else
+    #error "not defined"
+#endif
+    // Device returns to the Powered state
+    if (deviceState > USBD_STATE_POWERED) {    
+
+        deviceState = USBD_STATE_POWERED;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Certification test for High Speed device.
+/// \param bIndex Test to be done
+//------------------------------------------------------------------------------
+void USBD_Test( unsigned char bIndex )
+{
+    char          *pFifo;
+    unsigned char i;
+
+    AT91C_BASE_OTGHS->OTGHS_DEVIDR &= ~AT91C_OTGHS_SUSP;
+    AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_SPDCONF_HS; // remove suspend ?
+
+    switch( bIndex ) {
+        case USBFeatureRequest_TESTPACKET:
+            TRACE_DEBUG_WP("TEST_PACKET ");
+
+            AT91C_BASE_OTGHS->OTGHS_DEVDMA[1].OTGHS_DEVDMACONTROL = 0; // raz
+            AT91C_BASE_OTGHS->OTGHS_DEVDMA[2].OTGHS_DEVDMACONTROL = 0; // raz
+
+            // Configure endpoint 2, 64 bytes, direction IN, type BULK, 1 bank
+            AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[2] = AT91C_OTGHS_EPT_SIZE_64
+                                                         | AT91C_OTGHS_EPT_DIR_IN  
+                                                         | AT91C_OTGHS_EPT_TYPE_BUL_EPT 
+                                                         | AT91C_OTGHS_BK_NUMBER_1;
+            // Check if the configuration is ok
+            AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[2] |= AT91C_OTGHS_ALLOC;
+            while((AT91C_BASE_OTGHS->OTGHS_DEVEPTISR[2]&AT91C_OTGHS_CFGOK)==0) {
+            }
+
+            AT91C_BASE_OTGHS->OTGHS_DEVEPT |= AT91C_OTGHS_EPEN2;
+
+            // Write FIFO
+            pFifo = (char*)((unsigned int *)AT91C_BASE_OTGHS_EPTFIFO + (EPT_VIRTUAL_SIZE * 2));
+            for( i=0; i<sizeof(test_packet_buffer); i++) {
+                pFifo[i] = test_packet_buffer[i];
+            }
+            // Tst PACKET
+            AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_TSTPCKT;
+            // Send packet
+            AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[2] = AT91C_OTGHS_TXINI;
+            break;
+
+        case USBFeatureRequest_TESTJ:
+            TRACE_DEBUG_WP("TEST_J ");
+            AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_TSTJ;
+            break;
+
+        case USBFeatureRequest_TESTK:
+            TRACE_DEBUG_WP("TEST_K ");
+            AT91C_BASE_OTGHS->OTGHS_DEVCTRL |= AT91C_OTGHS_TSTK;
+            break;
+
+        case USBFeatureRequest_TESTSE0NAK:
+            TRACE_DEBUG_WP("TEST_SEO_NAK ");
+            AT91C_BASE_OTGHS->OTGHS_DEVIDR = 0xFFFFFFFF;
+            break;
+
+        case USBFeatureRequest_TESTSENDZLP:
+            //while( 0 != (AT91C_BASE_UDPHS->UDPHS_EPT[0].UDPHS_EPTSTA & AT91C_UDPHS_TX_PK_RDY ) ) {}
+            AT91C_BASE_OTGHS->OTGHS_DEVEPTICR[0] = AT91C_OTGHS_TXINI;
+            //while( 0 != (AT91C_BASE_UDPHS->UDPHS_EPT[0].UDPHS_EPTSTA & AT91C_UDPHS_TX_PK_RDY ) ) {}
+            TRACE_DEBUG_WP("SEND_ZLP ");
+            break;
+    }
+    TRACE_DEBUG_WP("\n\r");
+}
+
+//------------------------------------------------------------------------------
+/// Initializes the specified USB driver
+/// This function initializes the current FIFO bank of endpoints,
+/// configures the pull-up and VBus lines, disconnects the pull-up and
+/// then trigger the Init callback.
+//------------------------------------------------------------------------------
+void USBD_Init(void)
+{
+    // forceFS must not be used !
+    int i;
+
+    TRACE_DEBUG_WP("USBD Init()\n\r");
+
+    // disable Watchdog
+    AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
+
+        // Enable USB macro
+    *AT91C_OTGHS_CTRL |= AT91C_OTGHS_USBECTRL;
+
+    // Automatic mode speed for device
+    *AT91C_OTGHS_DEVCTRL &= ~AT91C_OTGHS_SPDCONF_FS;  // Normal mode
+
+    *AT91C_OTGHS_DEVCTRL &= ~(  AT91C_OTGHS_LS   | AT91C_OTGHS_TSTJ
+                              | AT91C_OTGHS_TSTK | AT91C_OTGHS_TSTPCKT
+                              | AT91C_OTGHS_OPMODE2 ); // Normal mode
+
+    AT91C_BASE_OTGHS->OTGHS_DEVCTRL = 0;
+    AT91C_BASE_OTGHS->OTGHS_HSTCTRL = 0;
+
+    // Enable OTG pad
+    *AT91C_OTGHS_CTRL |= AT91C_OTGHS_OTGPADE;
+
+    // Enable clock OTG pad
+    *AT91C_OTGHS_CTRL &= ~AT91C_OTGHS_FRZCLKCTRL;
+
+    //Usb_disable();
+    AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_USBECTRL;
+    AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_OTGPADE;
+    AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_FRZCLKCTRL;
+    //Usb_enable();
+    AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_USBECTRL;
+    AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_OTGPADE;
+    AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_FRZCLKCTRL;
+    //Usb_select_device();
+    AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_UIDE;
+    AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_UIMOD;
+
+    // Device is in the Attached state
+    deviceState = USBD_STATE_SUSPENDED;
+    previousDeviceState = USBD_STATE_POWERED;
+
+    
+    PMC_EnablePeripheral(AT91C_ID_OTGHS);
+     
+    // Reset endpoint structures
+    OTGHS_ResetEndpoints();
+
+    // Enables the USB Clock
+    OTGHS_EnableUsbClock();
+
+    //926C
+    // Enable USB macro and clear all other bit
+    AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_USBECTRL;
+    AT91C_BASE_OTGHS->OTGHS_CTRL = AT91C_OTGHS_USBECTRL;
+ 
+    // Configure the pull-up on D+ and disconnect it
+    USBD_Disconnect();
+
+    // Enable clock OTG pad
+    AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_FRZCLKCTRL;
+   TRACE_DEBUG("AT91C_OTGHS_CTRL: 0x%X\n\r", AT91C_BASE_OTGHS->OTGHS_CTRL );
+
+    // Clear General IT
+    AT91C_BASE_OTGHS->OTGHS_SCR = 0x01FF;
+
+    // Clear OTG Device IT
+    AT91C_BASE_OTGHS->OTGHS_DEVICR = 0xFF;
+
+    // Clear OTG Host IT
+    AT91C_BASE_OTGHS->OTGHS_HSTICR = 0x7F;
+
+    // Reset all Endpoints Fifos
+    AT91C_BASE_OTGHS->OTGHS_DEVEPT |= (0x7F<<16);
+    AT91C_BASE_OTGHS->OTGHS_DEVEPT &= ~(0x7F<<16);
+
+    // Disable all endpoints
+    AT91C_BASE_OTGHS->OTGHS_DEVEPT &= ~0x7F;
+
+    AT91C_BASE_OTGHS->OTGHS_TSTA2 = 0;
+
+    // Device is in the Attached state
+    deviceState = USBD_STATE_SUSPENDED;
+    previousDeviceState = USBD_STATE_POWERED;
+
+    // Automatic mode speed for device
+    AT91C_BASE_OTGHS->OTGHS_DEVCTRL &= ~AT91C_OTGHS_SPDCONF_FS;
+    // Force Full Speed mode for device
+    //*AT91C_OTGHS_DEVCTRL = AT91C_OTGHS_SPDCONF_FS;
+    // Force High Speed mode for device
+    //*AT91C_OTGHS_DEVCTRL = AT91C_OTGHS_SPDCONF_HS;
+
+    AT91C_BASE_OTGHS->OTGHS_DEVCTRL &= ~(  AT91C_OTGHS_LS 
+                                         | AT91C_OTGHS_TSTJ
+                                         | AT91C_OTGHS_TSTK
+                                         | AT91C_OTGHS_TSTPCKT
+                                         | AT91C_OTGHS_OPMODE2 );
+
+
+    // Automatic mode speed for host
+    AT91C_BASE_OTGHS->OTGHS_HSTCTRL &= ~AT91C_OTGHS_SPDCONF_HST_FS;
+    // Force Full Speed mode for host
+    //AT91C_BASE_OTGHS->OTGHS_HSTCTRL = AT91C_OTGHS_SPDCONF_HST_FS;
+    // Force High Speed mode for host
+    //*AT91C_BASE_OTGHS->OTGHS_HSTCTRL = AT91C_OTGHS_SPDCONF_HST_HS;
+
+    // Enable the UID pin select
+    AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_UIDE;
+ 
+    // Enable USB macro
+    AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_USBECTRL;
+
+    // Enable OTG pad
+    AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_OTGPADE;
+
+    // Enable clock OTG pad
+    AT91C_BASE_OTGHS->OTGHS_CTRL &= ~AT91C_OTGHS_FRZCLKCTRL;
+
+
+    // With OR without DMA !!!
+    // Initialization of DMA
+    for( i=1; i<=((AT91C_BASE_OTGHS->OTGHS_IPFEATURES & AT91C_OTGHS_DMA_CHANNEL_NBR)>>4); i++ ) {
+
+        // RESET endpoint canal DMA:
+        // DMA stop channel command
+        AT91C_BASE_OTGHS->OTGHS_DEVDMA[i].OTGHS_DEVDMACONTROL = 0;  // STOP command
+
+        // Disable endpoint
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTIDR[i] = 0XFFFFFFFF;
+
+        // Reset endpoint config
+        AT91C_BASE_OTGHS->OTGHS_DEVEPTCFG[i] = 0;
+
+        // Reset DMA channel (Buff count and Control field)
+        AT91C_BASE_OTGHS->OTGHS_DEVDMA[i].OTGHS_DEVDMACONTROL = 0x02;  // NON STOP command
+
+        // Reset DMA channel 0 (STOP)
+        AT91C_BASE_OTGHS->OTGHS_DEVDMA[i].OTGHS_DEVDMACONTROL = 0;  // STOP command
+
+        // Clear DMA channel status (read the register for clear it)
+        AT91C_BASE_OTGHS->OTGHS_DEVDMA[i].OTGHS_DEVDMASTATUS = AT91C_BASE_OTGHS->OTGHS_DEVDMA[i].OTGHS_DEVDMASTATUS;
+
+    }
+
+    
+    // Configure interrupts
+    USBDCallbacks_Initialized();
+
+    AT91C_BASE_OTGHS->OTGHS_CTRL |= AT91C_OTGHS_VBUSTI;
+
+   TRACE_DEBUG("AT91C_OTGHS_CTRL: 0x%X\n\r", AT91C_BASE_OTGHS->OTGHS_CTRL );
+   TRACE_DEBUG("AT91C_OTGHS_SR: 0x%X\n\r", AT91C_BASE_OTGHS->OTGHS_SR );
+  
+    AT91C_BASE_OTGHS->OTGHS_DEVIER = AT91C_OTGHS_WAKEUP;
+    
+   TRACE_DEBUG("NUM_IT_MAX_DMA: 0x%X\n\r", NUM_IT_MAX_DMA );
+   TRACE_DEBUG("NUM_IT_MAX: 0x%X\n\r", NUM_IT_MAX );
+
+}
+
+
+//------------------------------------------------------------------------------
+/// Returns the current state of the USB device.
+/// \return Device current state.
+//------------------------------------------------------------------------------
+unsigned char USBD_GetState( void )
+{
+    return deviceState;
+}
+
+#endif // BOARD_USB_OTGHS
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD_UDP.c b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD_UDP.c
new file mode 100644
index 00000000..8981c5e9
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD_UDP.c
@@ -0,0 +1,1254 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/** 
+ \unit
+
+ !!!Purpose
+
+    Implementation of USB device functions on a UDP controller.
+
+    See "USBD API Methods".
+*/
+
+//------------------------------------------------------------------------------
+//      Headers
+//------------------------------------------------------------------------------
+
+#include "USBD.h"
+#include "USBDCallbacks.h"
+#include <board.h>
+#include <pio/pio.h>
+#include <utility/trace.h>
+#include <utility/led.h>
+#include <usb/common/core/USBEndpointDescriptor.h>
+#include <usb/common/core/USBGenericRequest.h>
+
+#if defined(BOARD_USB_UDP)
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "UDP register field values"
+///
+/// This page lists the initialize values of UDP registers.
+///
+/// !Values
+/// - UDP_RXDATA
+
+/// Bit mask for both banks of the UDP_CSR register.
+#define UDP_RXDATA              (AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1)
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "Endpoint states"
+///
+/// This page lists the endpoint states.
+///
+/// !States
+//  - UDP_ENDPOINT_DISABLED
+//  - UDP_ENDPOINT_HALTED
+//  - UDP_ENDPOINT_IDLE
+//  - UDP_ENDPOINT_SENDING
+//  - UDP_ENDPOINT_RECEIVING
+
+/// Endpoint states: Endpoint is disabled
+#define UDP_ENDPOINT_DISABLED       0
+/// Endpoint states: Endpoint is halted (i.e. STALLs every request)
+#define UDP_ENDPOINT_HALTED         1
+/// Endpoint states: Endpoint is idle (i.e. ready for transmission)
+#define UDP_ENDPOINT_IDLE           2
+/// Endpoint states: Endpoint is sending data
+#define UDP_ENDPOINT_SENDING        3
+/// Endpoint states: Endpoint is receiving data
+#define UDP_ENDPOINT_RECEIVING      4
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// \page "UDP_CSR register access"
+///
+/// This page lists the macroes to access UDP CSR register.
+///
+/// !Macros
+/// - CLEAR_CSR
+/// - SET_CSR
+
+/// Bitmap for all status bits in CSR.
+#define REG_NO_EFFECT_1_ALL      AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 \
+                                |AT91C_UDP_STALLSENT   | AT91C_UDP_RXSETUP \
+                                |AT91C_UDP_TXCOMP
+
+/// Clears the specified bit(s) in the UDP_CSR register.
+/// \param endpoint The endpoint number of the CSR to process.
+/// \param flags The bitmap to set to 1.
+#define SET_CSR(endpoint, flags) \
+    { \
+        volatile unsigned int reg; \
+        reg = AT91C_BASE_UDP->UDP_CSR[endpoint] ; \
+        reg |= REG_NO_EFFECT_1_ALL; \
+        reg |= (flags); \
+        AT91C_BASE_UDP->UDP_CSR[endpoint] = reg; \
+        while ( (AT91C_BASE_UDP->UDP_CSR[endpoint] & (flags)) != (flags)); \
+    }
+
+/// Sets the specified bit(s) in the UDP_CSR register.
+/// \param endpoint The endpoint number of the CSR to process.
+/// \param flags The bitmap to clear to 0.
+#define CLEAR_CSR(endpoint, flags) \
+    { \
+        volatile unsigned int reg; \
+        reg = AT91C_BASE_UDP->UDP_CSR[endpoint]; \
+        reg |= REG_NO_EFFECT_1_ALL; \
+        reg &= ~(flags); \
+        AT91C_BASE_UDP->UDP_CSR[endpoint] = reg; \
+        while ( (AT91C_BASE_UDP->UDP_CSR[endpoint] & (flags)) == (flags)); \
+    }
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//      Types
+//------------------------------------------------------------------------------
+
+/// Describes an ongoing transfer on a UDP endpoint.
+typedef struct {
+
+    /// Pointer to a data buffer used for emission/reception.
+    char             *pData;
+    /// Number of bytes which have been written into the UDP internal FIFO
+    /// buffers.
+    volatile int     buffered;
+    /// Number of bytes which have been sent/received.
+    volatile int     transferred;
+    /// Number of bytes which have not been buffered/transferred yet.
+    volatile int     remaining;
+    /// Optional callback to invoke when the transfer completes.
+    volatile TransferCallback fCallback;
+    /// Optional argument to the callback function.
+    void             *pArgument;
+} Transfer;
+
+//------------------------------------------------------------------------------
+/// Describes the state of an endpoint of the UDP controller.
+//------------------------------------------------------------------------------
+typedef struct {
+
+    /// Current endpoint state.
+    volatile unsigned char  state;
+    /// Current reception bank (0 or 1).
+    volatile unsigned char  bank;
+    /// Maximum packet size for the endpoint.
+    volatile unsigned short size;
+    /// Describes an ongoing transfer (if current state is either
+    ///  <UDP_ENDPOINT_SENDING> or <UDP_ENDPOINT_RECEIVING>)
+    Transfer       transfer;
+} Endpoint;
+
+//------------------------------------------------------------------------------
+//         Internal variables
+//------------------------------------------------------------------------------
+
+/// Holds the internal state for each endpoint of the UDP.
+static Endpoint endpoints[BOARD_USB_NUMENDPOINTS];
+
+/// Device current state.
+static unsigned char deviceState;
+/// Indicates the previous device state
+static unsigned char previousDeviceState;
+
+//------------------------------------------------------------------------------
+//      Internal Functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Enables the clock of the UDP peripheral.
+//------------------------------------------------------------------------------
+static inline void UDP_EnablePeripheralClock(void)
+{
+    AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_UDP;
+}
+
+//------------------------------------------------------------------------------
+/// Disables the UDP peripheral clock.
+//------------------------------------------------------------------------------
+static inline void UDP_DisablePeripheralClock(void)
+{
+    AT91C_BASE_PMC->PMC_PCDR = 1 << AT91C_ID_UDP;
+}
+
+//------------------------------------------------------------------------------
+/// Enables the 48MHz USB clock.
+//------------------------------------------------------------------------------
+static inline void UDP_EnableUsbClock(void)
+{
+    AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UDP;
+}
+
+//------------------------------------------------------------------------------
+///  Disables the 48MHz USB clock.
+//------------------------------------------------------------------------------
+static inline void UDP_DisableUsbClock(void)
+{
+    AT91C_BASE_PMC->PMC_SCDR = AT91C_PMC_UDP;
+}
+
+//------------------------------------------------------------------------------
+/// Enables the UDP transceiver.
+//------------------------------------------------------------------------------
+static inline void UDP_EnableTransceiver(void)
+{
+    AT91C_BASE_UDP->UDP_TXVC &= ~AT91C_UDP_TXVDIS;
+}
+
+//------------------------------------------------------------------------------
+/// Disables the UDP transceiver.
+//------------------------------------------------------------------------------
+static inline void UDP_DisableTransceiver(void)
+{
+    AT91C_BASE_UDP->UDP_TXVC |= AT91C_UDP_TXVDIS;
+}
+
+//------------------------------------------------------------------------------
+/// Handles a completed transfer on the given endpoint, invoking the
+/// configured callback if any.
+/// \param bEndpoint Number of the endpoint for which the transfer has completed.
+/// \param bStatus   Status code returned by the transfer operation
+//------------------------------------------------------------------------------
+static void UDP_EndOfTransfer(unsigned char bEndpoint, char bStatus)
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+
+    // Check that endpoint was sending or receiving data
+    if( (pEndpoint->state == UDP_ENDPOINT_RECEIVING)
+        || (pEndpoint->state == UDP_ENDPOINT_SENDING)) {
+
+        TRACE_DEBUG_WP("Eo");
+
+        // Endpoint returns in Idle state
+        pEndpoint->state = UDP_ENDPOINT_IDLE;
+
+        // Invoke callback is present
+        if (pTransfer->fCallback != 0) {
+
+            ((TransferCallback) pTransfer->fCallback)
+                (pTransfer->pArgument,
+                 bStatus,
+                 pTransfer->transferred,
+                 pTransfer->remaining + pTransfer->buffered);
+        }
+        else {
+            TRACE_DEBUG_WP("No callBack\n\r");
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Clears the correct reception flag (bank 0 or bank 1) of an endpoint
+/// \param bEndpoint Index of endpoint
+//------------------------------------------------------------------------------
+static void UDP_ClearRxFlag(unsigned char bEndpoint)
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+
+    // Clear flag and change banks
+    if (pEndpoint->bank == 0) {
+
+        CLEAR_CSR(bEndpoint, AT91C_UDP_RX_DATA_BK0);
+        // Swap bank if in dual-fifo mode
+        if (BOARD_USB_ENDPOINTS_BANKS(bEndpoint) > 1) {
+
+            pEndpoint->bank = 1;
+        }
+    }
+    else {
+
+        CLEAR_CSR(bEndpoint, AT91C_UDP_RX_DATA_BK1);
+        pEndpoint->bank = 0;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Transfers a data payload from the current tranfer buffer to the endpoint
+/// FIFO
+/// \param bEndpoint Number of the endpoint which is sending data.
+//------------------------------------------------------------------------------
+static void UDP_WritePayload(unsigned char bEndpoint)
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+    signed int size;
+
+    // Get the number of bytes to send
+    size = pEndpoint->size;
+    if (size > pTransfer->remaining) {
+
+        size = pTransfer->remaining;
+    }
+
+    // Update transfer descriptor information
+    pTransfer->buffered += size;
+    pTransfer->remaining -= size;
+
+    // Write packet in the FIFO buffer
+    while (size > 0) {
+
+        AT91C_BASE_UDP->UDP_FDR[bEndpoint] = *(pTransfer->pData);
+        pTransfer->pData++;
+        size--;
+    }
+}
+
+
+//------------------------------------------------------------------------------
+/// Transfers a data payload from an endpoint FIFO to the current transfer buffer
+/// \param bEndpoint Endpoint number.
+/// \param wPacketSize Size of received data packet
+//------------------------------------------------------------------------------
+static void UDP_ReadPayload(unsigned char bEndpoint, int wPacketSize)
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+
+    // Check that the requested size is not bigger than the remaining transfer
+    if (wPacketSize > pTransfer->remaining) {
+
+        pTransfer->buffered += wPacketSize - pTransfer->remaining;
+        wPacketSize = pTransfer->remaining;
+    }
+
+    // Update transfer descriptor information
+    pTransfer->remaining -= wPacketSize;
+    pTransfer->transferred += wPacketSize;
+
+    // Retrieve packet
+    while (wPacketSize > 0) {
+
+        *(pTransfer->pData) = (char) AT91C_BASE_UDP->UDP_FDR[bEndpoint];
+        pTransfer->pData++;
+        wPacketSize--;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Received SETUP packet from endpoint 0 FIFO
+/// \param pRequest Generic USB SETUP request sent over Control endpoints
+//------------------------------------------------------------------------------
+static void UDP_ReadRequest(USBGenericRequest *pRequest)
+{
+    unsigned char *pData = (unsigned char *)pRequest;
+    unsigned int i;
+
+    // Copy packet
+    for (i = 0; i < 8; i++) {
+
+        *pData = (unsigned char) AT91C_BASE_UDP->UDP_FDR[0];
+        pData++;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Reset all endpoint transfer descriptors
+//------------------------------------------------------------------------------
+static void UDP_ResetEndpoints( void )
+{
+    Endpoint *pEndpoint;
+    Transfer *pTransfer;
+    unsigned char bEndpoint;
+
+    // Reset the transfer descriptor of every endpoint
+    for (bEndpoint = 0; bEndpoint < BOARD_USB_NUMENDPOINTS; bEndpoint++) {
+
+        pEndpoint = &(endpoints[bEndpoint]);
+        pTransfer = &(pEndpoint->transfer);
+
+        // Reset endpoint transfer descriptor
+        pTransfer->pData = 0;
+        pTransfer->transferred = -1;
+        pTransfer->buffered = -1;
+        pTransfer->remaining = -1;
+        pTransfer->fCallback = 0;
+        pTransfer->pArgument = 0;
+
+        // Reset endpoint state
+        pEndpoint->bank = 0;
+        pEndpoint->state = UDP_ENDPOINT_DISABLED;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Disable all endpoints (except control endpoint 0), aborting current 
+/// transfers if necessary
+//------------------------------------------------------------------------------
+static void UDP_DisableEndpoints( void )
+
+{
+    unsigned char bEndpoint;
+
+    // Disable each endpoint, terminating any pending transfer
+    // Control endpoint 0 is not disabled
+    for (bEndpoint = 1; bEndpoint < BOARD_USB_NUMENDPOINTS; bEndpoint++) {
+
+        UDP_EndOfTransfer(bEndpoint, USBD_STATUS_ABORTED);
+        endpoints[bEndpoint].state = UDP_ENDPOINT_DISABLED;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Checks if an ongoing transfer on an endpoint has been completed.
+/// \param bEndpoint Endpoint number.
+/// \return 1 if the current transfer on the given endpoint is complete;
+///         otherwise 0.
+//------------------------------------------------------------------------------
+static unsigned char UDP_IsTransferFinished(unsigned char bEndpoint)
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+
+    // Check if it is a Control endpoint
+    //  -> Control endpoint must always finish their transfer with a zero-length
+    //     packet
+    if ((AT91C_BASE_UDP->UDP_CSR[bEndpoint] & AT91C_UDP_EPTYPE)
+        == AT91C_UDP_EPTYPE_CTRL) {
+
+        return (pTransfer->buffered < pEndpoint->size);
+    }
+    // Other endpoints only need to transfer all the data
+    else {
+
+        return (pTransfer->buffered <= pEndpoint->size)
+               && (pTransfer->remaining == 0);
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Endpoint interrupt handler.
+/// Handle IN/OUT transfers, received SETUP packets and STALLing
+/// \param bEndpoint Index of endpoint
+//------------------------------------------------------------------------------
+static void UDP_EndpointHandler(unsigned char bEndpoint)
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+    unsigned int status = AT91C_BASE_UDP->UDP_CSR[bEndpoint];
+    unsigned short wPacketSize;
+    USBGenericRequest request;
+
+    TRACE_DEBUG_WP("E%d ", bEndpoint);
+    TRACE_DEBUG_WP("st:0x%X ", status);
+
+    // Handle interrupts
+    // IN packet sent
+    if ((status & AT91C_UDP_TXCOMP) != 0) {
+
+        TRACE_DEBUG_WP("Wr ");
+
+        // Check that endpoint was in Sending state
+        if (pEndpoint->state == UDP_ENDPOINT_SENDING) {
+
+            // End of transfer ?
+            if (UDP_IsTransferFinished(bEndpoint)) {
+
+                pTransfer->transferred += pTransfer->buffered;
+                pTransfer->buffered = 0;
+
+                // Disable interrupt if this is not a control endpoint
+                if ((status & AT91C_UDP_EPTYPE) != AT91C_UDP_EPTYPE_CTRL) {
+
+                    AT91C_BASE_UDP->UDP_IDR = 1 << bEndpoint;
+                }
+
+                UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);
+                CLEAR_CSR(bEndpoint, AT91C_UDP_TXCOMP);
+            }
+            else {
+
+                // Transfer remaining data
+                TRACE_DEBUG_WP(" %d ", pEndpoint->size);
+
+                pTransfer->transferred += pEndpoint->size;
+                pTransfer->buffered -= pEndpoint->size;
+
+                // Send next packet
+                if (BOARD_USB_ENDPOINTS_BANKS(bEndpoint) == 1) {
+
+                    // No double buffering
+                    UDP_WritePayload(bEndpoint);
+                    SET_CSR(bEndpoint, AT91C_UDP_TXPKTRDY);
+                    CLEAR_CSR(bEndpoint, AT91C_UDP_TXCOMP);
+                }
+                else {
+                    // Double buffering
+                    SET_CSR(bEndpoint, AT91C_UDP_TXPKTRDY);
+                    CLEAR_CSR(bEndpoint, AT91C_UDP_TXCOMP);
+                    UDP_WritePayload(bEndpoint);
+                }
+            }
+        }
+        else {
+            // Acknowledge interrupt
+            TRACE_ERROR("Error Wr");
+            CLEAR_CSR(bEndpoint, AT91C_UDP_TXCOMP);
+        }
+    }
+
+    // OUT packet received
+    if ((status & UDP_RXDATA) != 0) {
+
+        TRACE_DEBUG_WP("Rd ");
+
+        // Check that the endpoint is in Receiving state
+        if (pEndpoint->state != UDP_ENDPOINT_RECEIVING) {
+
+            // Check if an ACK has been received on a Control endpoint
+            if (((status & AT91C_UDP_EPTYPE) == AT91C_UDP_EPTYPE_CTRL)
+                && ((status & AT91C_UDP_RXBYTECNT) == 0)) {
+
+                // Acknowledge the data and finish the current transfer
+                UDP_ClearRxFlag(bEndpoint);
+                UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);
+            }
+            // Check if the data has been STALLed
+            else if ((status & AT91C_UDP_FORCESTALL) != 0) {
+
+                // Discard STALLed data
+                TRACE_DEBUG_WP("Discard ");
+                UDP_ClearRxFlag(bEndpoint);
+            }
+            // NAK the data
+            else {
+
+                TRACE_DEBUG_WP("Nak ");
+                AT91C_BASE_UDP->UDP_IDR = 1 << bEndpoint;
+            }
+        }
+        // Endpoint is in Read state
+        else {
+
+            // Retrieve data and store it into the current transfer buffer
+            wPacketSize = (unsigned short) (status >> 16);
+            TRACE_DEBUG_WP("%d ", wPacketSize);
+            UDP_ReadPayload(bEndpoint, wPacketSize);
+            UDP_ClearRxFlag(bEndpoint);
+
+            // Check if the transfer is finished
+            if ((pTransfer->remaining == 0) || (wPacketSize < pEndpoint->size)) {
+
+                // Disable interrupt if this is not a control endpoint
+                if ((status & AT91C_UDP_EPTYPE) != AT91C_UDP_EPTYPE_CTRL) {
+
+                    AT91C_BASE_UDP->UDP_IDR = 1 << bEndpoint;
+                }
+                UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);
+            }
+        }
+    }
+
+    // STALL sent
+    if ((status & AT91C_UDP_STALLSENT) != 0) {
+
+        TRACE_WARNING( "Sta 0x%X [%d] ", status, bEndpoint);
+
+        // If the endpoint is not halted, clear the STALL condition
+        CLEAR_CSR(bEndpoint, AT91C_UDP_STALLSENT);
+        if (pEndpoint->state != UDP_ENDPOINT_HALTED) {
+
+            TRACE_WARNING( "_ " );
+            CLEAR_CSR(bEndpoint, AT91C_UDP_FORCESTALL);
+        }
+    }
+
+    // SETUP packet received
+    if ((status & AT91C_UDP_RXSETUP) != 0) {
+
+        TRACE_DEBUG_WP("Stp ");
+
+        // If a transfer was pending, complete it
+        // Handles the case where during the status phase of a control write
+        // transfer, the host receives the device ZLP and ack it, but the ack
+        // is not received by the device
+        if ((pEndpoint->state == UDP_ENDPOINT_RECEIVING)
+            || (pEndpoint->state == UDP_ENDPOINT_SENDING)) {
+
+            UDP_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);
+        }
+        // Copy the setup packet
+        UDP_ReadRequest(&request);
+
+        // Set the DIR bit before clearing RXSETUP in Control IN sequence
+        if (USBGenericRequest_GetDirection(&request) == USBGenericRequest_IN) {
+
+            SET_CSR(bEndpoint, AT91C_UDP_DIR);
+        }
+        // Acknowledge setup packet
+        CLEAR_CSR(bEndpoint, AT91C_UDP_RXSETUP);
+
+        // Forward the request to the upper layer
+        USBDCallbacks_RequestReceived(&request);
+    }
+
+}
+
+//------------------------------------------------------------------------------
+//      Exported functions
+//------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
+/// USB interrupt handler
+/// Manages device resume, suspend, end of bus reset. 
+/// Forwards endpoint interrupts to the appropriate handler.
+//------------------------------------------------------------------------------
+void RealUdphsIrqHandler() @spontaneous()
+{
+    unsigned int status;
+    int eptnum = 0;
+    
+    // Get interrupt status
+    // Some interrupts may get masked depending on the device state
+    status = AT91C_BASE_UDP->UDP_ISR;
+    status &= AT91C_BASE_UDP->UDP_IMR;
+
+    if (deviceState < USBD_STATE_POWERED) {
+
+        status &= AT91C_UDP_WAKEUP | AT91C_UDP_RXRSM;
+        AT91C_BASE_UDP->UDP_ICR = ~status;
+    }
+
+    // Return immediately if there is no interrupt to service
+    if (status == 0) {
+
+        return;
+    }
+
+    // Toggle USB LED if the device is active
+    if (deviceState >= USBD_STATE_POWERED) {
+
+        //LED_Set(USBD_LEDUSB);
+        //TOSH_SET_GREEN_LED_PIN();
+    }
+
+    // Service interrupts
+
+    //// Start Of Frame (SOF)
+    //if (ISSET(dStatus, AT91C_UDP_SOFINT)) {
+    //
+    //    TRACE_DEBUG("SOF");
+    //
+    //    // Invoke the SOF callback
+    //    USB_StartOfFrameCallback(pUsb);
+    //
+    //    // Acknowledge interrupt
+    //    AT91C_BASE_UDP->UDP_ICR = AT91C_UDP_SOFINT;
+    //    dStatus &= ~AT91C_UDP_SOFINT;
+    //}
+
+    // Suspend
+    // This interrupt is always treated last (hence the '==')
+    if (status == AT91C_UDP_RXSUSP) {
+
+        TRACE_INFO_WP("Susp ");
+
+        // Don't do anything if the device is already suspended
+        if (deviceState != USBD_STATE_SUSPENDED) {
+
+            // The device enters the Suspended state
+            // Enable wakeup
+            AT91C_BASE_UDP->UDP_IER = AT91C_UDP_WAKEUP | AT91C_UDP_RXRSM;
+
+            // Acknowledge interrupt
+            AT91C_BASE_UDP->UDP_ICR = AT91C_UDP_RXSUSP;
+
+            // Switch to the Suspended state
+            previousDeviceState = deviceState;
+            deviceState = USBD_STATE_SUSPENDED;
+            // Invoke the Suspended callback
+            USBDCallbacks_Suspended();
+            UDP_DisableTransceiver();
+            UDP_DisablePeripheralClock();
+            UDP_DisableUsbClock();
+        }
+    }
+    // Resume
+    else if ((status & (AT91C_UDP_WAKEUP | AT91C_UDP_RXRSM)) != 0) {
+
+        TRACE_INFO_WP("Res ");
+
+        // Don't do anything if the device was not suspended
+        if (deviceState == USBD_STATE_SUSPENDED) {
+
+            // The device enters its previous state
+            UDP_EnablePeripheralClock();
+            UDP_EnableUsbClock();
+
+            // Enable the transceiver if the device was past the Default
+            // state
+            deviceState = previousDeviceState;
+            if (deviceState >= USBD_STATE_DEFAULT) {
+
+                UDP_EnableTransceiver();
+
+                // Invoke the Resume callback
+                USBDCallbacks_Resumed();
+            }
+        }
+        
+        // Clear and disable resume interrupts
+        AT91C_BASE_UDP->UDP_ICR = AT91C_UDP_WAKEUP 
+                                  | AT91C_UDP_RXRSM
+                                  | AT91C_UDP_RXSUSP;
+        AT91C_BASE_UDP->UDP_IDR = AT91C_UDP_WAKEUP | AT91C_UDP_RXRSM;
+    }
+    // End of bus reset
+    else if ((status & AT91C_UDP_ENDBUSRES) != 0) {
+
+        TRACE_INFO_WP("EoBRes ");
+
+        // The device enters the Default state
+        deviceState = USBD_STATE_DEFAULT;
+        UDP_EnableTransceiver();
+        UDP_ResetEndpoints();
+        UDP_DisableEndpoints();
+        USBD_ConfigureEndpoint(0);
+
+        // Flush and enable the Suspend interrupt
+        AT91C_BASE_UDP->UDP_ICR = AT91C_UDP_WAKEUP
+                                  | AT91C_UDP_RXRSM
+                                  | AT91C_UDP_RXSUSP;
+        AT91C_BASE_UDP->UDP_IER = AT91C_UDP_RXSUSP;
+
+        //// Enable the Start Of Frame (SOF) interrupt if needed
+        //if (pUsb->pCallbacks->startOfFrame != 0) {
+        //
+        //    AT91C_BASE_UDP->UDP_IER = AT91C_UDP_SOFINT;
+        //}
+
+        // Invoke the Reset callback
+        USBDCallbacks_Reset();
+
+        // Acknowledge end of bus reset interrupt
+        AT91C_BASE_UDP->UDP_ICR = AT91C_UDP_ENDBUSRES;
+    }
+    // Endpoint interrupts
+    else {
+
+        while (status != 0) {
+
+            // Check if endpoint has a pending interrupt
+            if ((status & (1 << eptnum)) != 0) {
+            
+                UDP_EndpointHandler(eptnum);
+                status &= ~(1 << eptnum);
+                
+                if (status != 0) {
+                
+                    TRACE_INFO_WP("\n\r  - ");
+                }
+            }
+            eptnum++;
+        }
+    }
+
+    // Toggle LED back to its previous state
+    TRACE_INFO_WP("\n\r");
+    if (deviceState >= USBD_STATE_POWERED) {
+
+        //LED_Clear(USBD_LEDUSB);
+        //TOSH_CLR_GREEN_LED_PIN();
+    }
+}
+void UdphsIrqHandler(void) @C() @spontaneous()
+{
+    call UdphsInterruptWrapper.preamble();
+    RealUdphsIrqHandler();
+    call UdphsInterruptWrapper.postamble();
+}
+
+//------------------------------------------------------------------------------
+/// Configures an endpoint according to its Endpoint Descriptor.
+/// \param pDescriptor Pointer to an Endpoint descriptor.
+//------------------------------------------------------------------------------
+void USBD_ConfigureEndpoint(const USBEndpointDescriptor *pDescriptor)
+{
+    Endpoint *pEndpoint;
+    unsigned char bEndpoint;
+    unsigned char bType;
+    unsigned char bEndpointDir;
+
+    // NULL descriptor -> Control endpoint 0
+    if (pDescriptor == 0) {
+
+        bEndpoint = 0;
+        pEndpoint = &(endpoints[bEndpoint]);
+        bType= USBEndpointDescriptor_CONTROL;
+        bEndpointDir = 0;
+        pEndpoint->size = BOARD_USB_ENDPOINTS_MAXPACKETSIZE(0);
+    }
+    else {
+
+        bEndpoint = USBEndpointDescriptor_GetNumber(pDescriptor);
+        pEndpoint = &(endpoints[bEndpoint]);
+        bType = USBEndpointDescriptor_GetType(pDescriptor);
+        bEndpointDir = USBEndpointDescriptor_GetDirection(pDescriptor);
+        pEndpoint->size = USBEndpointDescriptor_GetMaxPacketSize(pDescriptor);
+    }
+
+    // Abort the current transfer is the endpoint was configured and in
+    // Write or Read state
+    if ((pEndpoint->state == UDP_ENDPOINT_RECEIVING)
+        || (pEndpoint->state == UDP_ENDPOINT_SENDING)) {
+
+        UDP_EndOfTransfer(bEndpoint, USBD_STATUS_RESET);
+    }
+    pEndpoint->state = UDP_ENDPOINT_IDLE;
+
+    // Reset Endpoint Fifos
+    AT91C_BASE_UDP->UDP_RSTEP |= (1 << bEndpoint);
+    AT91C_BASE_UDP->UDP_RSTEP &= ~(1 << bEndpoint);
+
+    // Configure endpoint
+    if (bType != USBEndpointDescriptor_CONTROL) {
+
+        SET_CSR(bEndpoint, (unsigned int)AT91C_UDP_EPEDS
+                            | (bType << 8) | (bEndpointDir << 10));
+    }
+    else {
+
+        SET_CSR(bEndpoint, (bType << 8) | (bEndpointDir << 10));
+        AT91C_BASE_UDP->UDP_IER = (1 << bEndpoint);
+    }
+
+    TRACE_INFO_WP("CfgEpt%d ", bEndpoint);
+}
+
+//------------------------------------------------------------------------------
+/// Sends data through a USB endpoint. Sets up the transfer descriptor,
+/// writes one or two data payloads (depending on the number of FIFO bank
+/// for the endpoint) and then starts the actual transfer. The operation is
+/// complete when all the data has been sent.
+///
+/// *If the size of the buffer is greater than the size of the endpoint
+///  (or twice the size if the endpoint has two FIFO banks), then the buffer
+///  must be kept allocated until the transfer is finished*. This means that
+///  it is not possible to declare it on the stack (i.e. as a local variable
+///  of a function which returns after starting a transfer).
+///
+/// \param bEndpoint Endpoint number.
+/// \param pData Pointer to a buffer with the data to send.
+/// \param dLength Size of the data buffer.
+/// \param fCallback Optional callback function to invoke when the transfer is
+///        complete.
+/// \param pArgument Optional argument to the callback function.
+/// \return USBD_STATUS_SUCCESS if the transfer has been started;
+///         otherwise, the corresponding error status code.
+//------------------------------------------------------------------------------
+char USBD_Write( unsigned char    bEndpoint,
+                 const void       *pData,
+                 unsigned int     dLength,
+                 TransferCallback fCallback,
+                 void             *pArgument )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+
+    // Check that the endpoint is in Idle state
+    if (pEndpoint->state != UDP_ENDPOINT_IDLE) {
+
+        return USBD_STATUS_LOCKED;
+    }
+    TRACE_DEBUG_WP("Write%d(%d) ", bEndpoint, dLength);
+
+    // Setup the transfer descriptor
+    pTransfer->pData = (void *) pData;
+    pTransfer->remaining = dLength;
+    pTransfer->buffered = 0;
+    pTransfer->transferred = 0;
+    pTransfer->fCallback = fCallback;
+    pTransfer->pArgument = pArgument;
+
+    // Send the first packet
+    pEndpoint->state = UDP_ENDPOINT_SENDING;
+    while((AT91C_BASE_UDP->UDP_CSR[bEndpoint]&AT91C_UDP_TXPKTRDY)==AT91C_UDP_TXPKTRDY);
+    UDP_WritePayload(bEndpoint);
+    SET_CSR(bEndpoint, AT91C_UDP_TXPKTRDY);
+
+    // If double buffering is enabled and there is data remaining,
+    // prepare another packet
+    if ((BOARD_USB_ENDPOINTS_BANKS(bEndpoint) > 1) && (pTransfer->remaining > 0)) {
+
+        UDP_WritePayload(bEndpoint);
+    }
+
+    // Enable interrupt on endpoint
+    AT91C_BASE_UDP->UDP_IER = 1 << bEndpoint;
+
+    return USBD_STATUS_SUCCESS;
+}
+
+
+//------------------------------------------------------------------------------
+/// Reads incoming data on an USB endpoint This methods sets the transfer
+/// descriptor and activate the endpoint interrupt. The actual transfer is
+/// then carried out by the endpoint interrupt handler. The Read operation
+/// finishes either when the buffer is full, or a short packet (inferior to
+/// endpoint maximum  size) is received.
+///
+/// *The buffer must be kept allocated until the transfer is finished*.
+/// \param bEndpoint Endpoint number.
+/// \param pData Pointer to a data buffer.
+/// \param dLength Size of the data buffer in bytes.
+/// \param fCallback Optional end-of-transfer callback function.
+/// \param pArgument Optional argument to the callback function.
+/// \return USBD_STATUS_SUCCESS if the read operation has been started;
+///         otherwise, the corresponding error code.
+//------------------------------------------------------------------------------
+char USBD_Read(unsigned char    bEndpoint,
+               void             *pData,
+               unsigned int     dLength,
+               TransferCallback fCallback,
+               void             *pArgument)
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+
+    // Return if the endpoint is not in IDLE state
+    if (pEndpoint->state != UDP_ENDPOINT_IDLE) {
+
+        return USBD_STATUS_LOCKED;
+    }
+
+    // Endpoint enters Receiving state
+    pEndpoint->state = UDP_ENDPOINT_RECEIVING;
+    TRACE_DEBUG_WP("Read%d(%d) ", bEndpoint, dLength);
+
+    // Set the transfer descriptor
+    pTransfer->pData = pData;
+    pTransfer->remaining = dLength;
+    pTransfer->buffered = 0;
+    pTransfer->transferred = 0;
+    pTransfer->fCallback = fCallback;
+    pTransfer->pArgument = pArgument;
+
+    // Enable interrupt on endpoint
+    AT91C_BASE_UDP->UDP_IER = 1 << bEndpoint;
+
+    return USBD_STATUS_SUCCESS;
+}
+
+//------------------------------------------------------------------------------
+/// Sets the HALT feature on the given endpoint (if not already in this state).
+/// \param bEndpoint Endpoint number.
+//------------------------------------------------------------------------------
+void USBD_Halt(unsigned char bEndpoint)
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    
+    // Check that endpoint is enabled and not already in Halt state
+    if ((pEndpoint->state != UDP_ENDPOINT_DISABLED)
+        && (pEndpoint->state != UDP_ENDPOINT_HALTED)) {
+
+        TRACE_DEBUG_WP("Halt%d ", bEndpoint);
+
+        // Abort the current transfer if necessary
+        UDP_EndOfTransfer(bEndpoint, USBD_STATUS_ABORTED);
+
+        // Put endpoint into Halt state
+        SET_CSR(bEndpoint, AT91C_UDP_FORCESTALL);
+        pEndpoint->state = UDP_ENDPOINT_HALTED;
+
+        // Enable the endpoint interrupt
+        AT91C_BASE_UDP->UDP_IER = 1 << bEndpoint;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Clears the Halt feature on the given endpoint.
+/// \param bEndpoint Index of endpoint
+//------------------------------------------------------------------------------
+void USBD_Unhalt(unsigned char bEndpoint)
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+
+    // Check if the endpoint is enabled
+    if (pEndpoint->state != UDP_ENDPOINT_DISABLED) {
+
+        TRACE_DEBUG_WP("Unhalt%d ", bEndpoint);
+
+        // Return endpoint to Idle state
+        pEndpoint->state = UDP_ENDPOINT_IDLE;
+
+        // Clear FORCESTALL flag
+        CLEAR_CSR(bEndpoint, AT91C_UDP_FORCESTALL);
+
+        // Reset Endpoint Fifos, beware this is a 2 steps operation
+        AT91C_BASE_UDP->UDP_RSTEP |= 1 << bEndpoint;
+        AT91C_BASE_UDP->UDP_RSTEP &= ~(1 << bEndpoint);
+    }
+}
+    
+//------------------------------------------------------------------------------
+/// Returns the current Halt status of an endpoint.
+/// \param bEndpoint Index of endpoint
+/// \return 1 if the endpoint is currently halted; otherwise 0
+//------------------------------------------------------------------------------
+unsigned char USBD_IsHalted(unsigned char bEndpoint)
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    unsigned char status = 0;
+
+    if (pEndpoint->state == UDP_ENDPOINT_HALTED) {
+
+        status = 1;
+    }
+    return( status );
+}
+
+//------------------------------------------------------------------------------
+/// Indicates if the device is running in high or full-speed. Always returns 0
+/// since UDP does not support high-speed mode.
+//------------------------------------------------------------------------------
+unsigned char USBD_IsHighSpeed(void)
+{
+    return 0;
+}
+
+//------------------------------------------------------------------------------
+/// Causes the given endpoint to acknowledge the next packet it receives
+/// with a STALL handshake.
+/// \param bEndpoint Endpoint number.
+/// \return USBD_STATUS_SUCCESS or USBD_STATUS_LOCKED.
+//------------------------------------------------------------------------------
+unsigned char USBD_Stall(unsigned char bEndpoint)
+
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+
+    // Check that endpoint is in Idle state
+    if (pEndpoint->state != UDP_ENDPOINT_IDLE) {
+
+        TRACE_WARNING("UDP_Stall: Endpoint%d locked\n\r", bEndpoint);
+        return USBD_STATUS_LOCKED;
+    }
+
+    TRACE_DEBUG_WP("Stall%d ", bEndpoint);
+    SET_CSR(bEndpoint, AT91C_UDP_FORCESTALL);
+
+    return USBD_STATUS_SUCCESS;
+}
+
+//------------------------------------------------------------------------------
+/// Starts a remote wake-up procedure.
+//------------------------------------------------------------------------------
+void USBD_RemoteWakeUp(void)
+{
+    UDP_EnablePeripheralClock();
+    UDP_EnableUsbClock();
+    UDP_EnableTransceiver();
+
+    TRACE_INFO_WP("RWUp ");
+
+    // Activates a remote wakeup (edge on ESR), then clear ESR
+    AT91C_BASE_UDP->UDP_GLBSTATE |= AT91C_UDP_ESR;
+    AT91C_BASE_UDP->UDP_GLBSTATE &= ~AT91C_UDP_ESR;
+}
+
+//------------------------------------------------------------------------------
+/// Sets the device address to the given value.
+/// \param address New device address.
+//------------------------------------------------------------------------------
+void USBD_SetAddress(unsigned char address)
+{
+    TRACE_INFO_WP("SetAddr(%d) ", address);
+
+    // Set address
+    AT91C_BASE_UDP->UDP_FADDR = AT91C_UDP_FEN | address;
+
+    // If the address is 0, the device returns to the Default state
+    if (address == 0) {
+
+        AT91C_BASE_UDP->UDP_GLBSTATE = 0;
+        deviceState = USBD_STATE_DEFAULT;
+    }
+    // If the address is non-zero, the device enters the Address state
+    else {
+
+        AT91C_BASE_UDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;
+        deviceState = USBD_STATE_ADDRESS;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Sets the current device configuration.
+/// \param cfgnum - Configuration number to set.
+//------------------------------------------------------------------------------
+void USBD_SetConfiguration(unsigned char cfgnum)
+{
+    TRACE_INFO_WP("SetCfg(%d) ", cfgnum);
+
+    // If the configuration number if non-zero, the device enters the
+    // Configured state
+    if (cfgnum != 0) {
+
+        // Enter Configured state
+        deviceState = USBD_STATE_CONFIGURED;
+        AT91C_BASE_UDP->UDP_GLBSTATE |= AT91C_UDP_CONFG;
+    }
+    // If the configuration number is zero, the device goes back to the Address
+    // state
+    else {
+
+        deviceState = USBD_STATE_ADDRESS;
+        AT91C_BASE_UDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;
+
+        // Abort all transfers
+        UDP_DisableEndpoints();
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Connects the pull-up on the D+ line of the USB.
+//------------------------------------------------------------------------------
+void USBD_Connect(void)
+{
+    TRACE_DEBUG("Conn ");
+
+#if defined(BOARD_USB_PULLUP_EXTERNAL)
+    const Pin pinPullUp = PIN_USB_PULLUP;
+    if (pinPullUp.attribute == PIO_OUTPUT_0) {
+
+        PIO_Set(&pinPullUp);
+    }
+    else {
+
+        PIO_Clear(&pinPullUp);
+    }
+#elif defined(BOARD_USB_PULLUP_INTERNAL)
+    AT91C_BASE_UDP->UDP_TXVC |= AT91C_UDP_PUON;
+#elif defined(BOARD_USB_PULLUP_MATRIX)
+    AT91C_BASE_MATRIX->MATRIX_USBPCR |= AT91C_MATRIX_USBPCR_PUON;
+#elif !defined(BOARD_USB_PULLUP_ALWAYSON)
+    #error Unsupported pull-up type.
+#endif
+}
+
+//------------------------------------------------------------------------------
+/// Disconnects the pull-up from the D+ line of the USB.
+//------------------------------------------------------------------------------
+void USBD_Disconnect(void)
+{
+    TRACE_DEBUG("Disc ");
+
+#if defined(BOARD_USB_PULLUP_EXTERNAL)
+    const Pin pinPullUp = PIN_USB_PULLUP;
+    if (pinPullUp.attribute == PIO_OUTPUT_0) {
+
+        PIO_Clear(&pinPullUp);
+    }
+    else {
+
+        PIO_Set(&pinPullUp);
+    }
+#elif defined(BOARD_USB_PULLUP_INTERNAL)
+    AT91C_BASE_UDP->UDP_TXVC &= ~AT91C_UDP_PUON;
+#elif defined(BOARD_USB_PULLUP_MATRIX)
+    AT91C_BASE_MATRIX->MATRIX_USBPCR &= ~AT91C_MATRIX_USBPCR_PUON;
+#elif !defined(BOARD_USB_PULLUP_ALWAYSON)
+    #error Unsupported pull-up type.
+#endif
+
+    // Device returns to the Powered state
+    if (deviceState > USBD_STATE_POWERED) {
+    
+        deviceState = USBD_STATE_POWERED;
+    }
+
+    if (previousDeviceState > USBD_STATE_POWERED) {
+
+        previousDeviceState = USBD_STATE_POWERED;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Initializes the USB driver.
+//------------------------------------------------------------------------------
+void USBD_Init(void)
+{
+    TRACE_INFO_WP("USBD_Init\n\r");
+
+    // Reset endpoint structures
+    UDP_ResetEndpoints();
+
+    // Configure the pull-up on D+ and disconnect it
+#if defined(BOARD_USB_PULLUP_EXTERNAL)
+    const Pin pinPullUp = PIN_USB_PULLUP;
+    PIO_Configure(&pinPullUp, 1);
+#elif defined(BOARD_USB_PULLUP_INTERNAL)
+    AT91C_BASE_UDP->UDP_TXVC &= ~AT91C_UDP_PUON;
+#elif defined(BOARD_USB_PULLUP_MATRIX)
+    AT91C_BASE_MATRIX->MATRIX_USBPCR &= ~AT91C_MATRIX_USBPCR_PUON;
+#elif !defined(BOARD_USB_PULLUP_ALWAYSON)
+    #error Missing pull-up definition.
+#endif
+
+    // Device is in the Attached state
+    deviceState = USBD_STATE_SUSPENDED;
+    previousDeviceState = USBD_STATE_POWERED;
+    UDP_EnablePeripheralClock();
+    UDP_EnableUsbClock();
+
+    AT91C_BASE_UDP->UDP_IDR = 0xFE;
+
+    AT91C_BASE_UDP->UDP_IER = AT91C_UDP_WAKEUP;
+
+    // Configure interrupts
+    USBDCallbacks_Initialized();
+}
+
+//------------------------------------------------------------------------------
+/// Configure USB Speed, should be invoked before USB attachment.
+/// \param forceFS Force to use FS mode.
+//------------------------------------------------------------------------------
+void USBD_ConfigureSpeed(unsigned char forceFS)
+{
+}
+
+//------------------------------------------------------------------------------
+/// Returns the current state of the USB device.
+/// \return Device current state.
+//------------------------------------------------------------------------------
+unsigned char USBD_GetState(void)
+{
+    return deviceState;
+}
+
+#endif // BOARD_USB_UDP
diff --git a/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD_UDPHS.c b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD_UDPHS.c
new file mode 100644
index 00000000..657f0f62
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/usb/device/core/USBD_UDPHS.c
@@ -0,0 +1,1709 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "USBD.h"
+#include "USBDCallbacks.h"
+#include "USBDDriver.h"
+#include <board.h>
+#include <pio/pio.h>
+#include <utility/trace.h>
+#include <utility/led.h>
+#include <usb/common/core/USBEndpointDescriptor.h>
+#include <usb/common/core/USBGenericRequest.h>
+#include <usb/common/core/USBFeatureRequest.h>
+
+#include <stdio.h>
+
+#ifdef BOARD_USB_UDPHS
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+/// Maximum number of endpoints interrupts.
+#define NUM_IT_MAX       \
+    (AT91C_BASE_UDPHS->UDPHS_IPFEATURES & AT91C_UDPHS_EPT_NBR_MAX)
+/// Maximum number of endpoint DMA interrupts
+#define NUM_IT_MAX_DMA   \
+    ((AT91C_BASE_UDPHS->UDPHS_IPFEATURES & AT91C_UDPHS_DMA_CHANNEL_NBR)>>4)
+/// Bits that should be shifted to access DMA control bits.
+#define SHIFT_DMA        24
+/// Bits that should be shifted to access interrupt bits.
+#define SHIFT_INTERUPT    8
+
+/// Compile option, use DMA. Remove this define for not use DMA.
+#define DMA
+
+/// Max size of the FMA FIFO
+#define DMA_MAX_FIFO_SIZE     65536
+
+#define EPT_VIRTUAL_SIZE      16384
+
+//------------------------------------------------------------------------------
+/// \page "Endpoint states"
+/// This page lists the endpoint states.
+/// !States
+//  - UDP_ENDPOINT_DISABLED
+//  - UDP_ENDPOINT_HALTED
+//  - UDP_ENDPOINT_IDLE
+//  - UDP_ENDPOINT_SENDING
+//  - UDP_ENDPOINT_RECEIVING
+
+/// Endpoint states: Endpoint is disabled
+#define UDP_ENDPOINT_DISABLED       0
+/// Endpoint states: Endpoint is halted (i.e. STALLs every request)
+#define UDP_ENDPOINT_HALTED         1
+/// Endpoint states: Endpoint is idle (i.e. ready for transmission)
+#define UDP_ENDPOINT_IDLE           2
+/// Endpoint states: Endpoint is sending data
+#define UDP_ENDPOINT_SENDING        3
+/// Endpoint states: Endpoint is receiving data
+#define UDP_ENDPOINT_RECEIVING      4
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//      Structures
+//------------------------------------------------------------------------------
+
+/// Describes an ongoing transfer on a UDP endpoint.
+typedef struct
+{
+    /// Pointer to a data buffer used for emission/reception.
+    char             *pData;
+    /// Number of bytes which have been written into the UDP internal FIFO
+    /// buffers.
+    volatile int     buffered;
+    /// Number of bytes which have been sent/received.
+    volatile int     transferred;
+    /// Number of bytes which have not been buffered/transferred yet.
+    volatile int     remaining;
+    /// Optional callback to invoke when the transfer completes.
+    volatile TransferCallback fCallback;
+    /// Optional argument to the callback function.
+    void             *pArgument;
+} Transfer;
+
+//------------------------------------------------------------------------------
+/// Describes the state of an endpoint of the UDP controller.
+//------------------------------------------------------------------------------
+typedef struct
+{
+    /// Current endpoint state.
+    volatile unsigned char  state;
+    /// Current reception bank (0 or 1).
+    unsigned char  bank;
+    /// Maximum packet size for the endpoint.
+    unsigned short size;
+    /// Describes an ongoing transfer (if current state is either
+    ///  <UDP_ENDPOINT_SENDING> or <UDP_ENDPOINT_RECEIVING>)
+    Transfer       transfer;
+    /// Special case for send a ZLP
+    unsigned char  sendZLP;
+} Endpoint;
+
+//------------------------------------------------------------------------------
+//         Internal variables
+//------------------------------------------------------------------------------
+
+/// Holds the internal state for each endpoint of the UDP.
+static Endpoint      endpoints[BOARD_USB_NUMENDPOINTS];
+/// Device current state.
+static unsigned char deviceState;
+/// Indicates the previous device state
+static unsigned char previousDeviceState;
+
+/// 7.1.20 Test Mode Support
+/// Test codes for the USB HS test mode.
+static const char test_packet_buffer[] = {
+    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,                // JKJKJKJK * 9
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,                     // JJKKJJKK * 8
+    0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,0xEE,                     // JJJJKKKK * 8
+    0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, // JJJJJJJKKKKKKK * 8
+    0x7F,0xBF,0xDF,0xEF,0xF7,0xFB,0xFD,                          // JJJJJJJK * 8
+    0xFC,0x7E,0xBF,0xDF,0xEF,0xF7,0xFB,0xFD,0x7E                 // {JKKKKKKK * 10}, JK
+};
+
+// Force HS
+static const unsigned char forceUsbFS = 0;
+
+//------------------------------------------------------------------------------
+//      Internal Functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Disables the BIAS of the USB controller
+//------------------------------------------------------------------------------
+static inline void UDPHS_DisableBIAS( void )
+{
+    // For CAP9, SAM9RL, HS
+#if !defined (BOARD_USB_NO_BIAS_COMMAND)
+    AT91C_BASE_PMC->PMC_UCKR &= ~AT91C_CKGR_BIASEN_ENABLED;
+#endif
+}
+
+//------------------------------------------------------------------------------
+/// Enables the BIAS of the USB controller
+//------------------------------------------------------------------------------
+static inline void UDPHS_EnableBIAS( void )
+{
+    // For CAP9, SAM9RL, HS
+#if !defined (BOARD_USB_NO_BIAS_COMMAND)
+    UDPHS_DisableBIAS();
+    AT91C_BASE_PMC->PMC_UCKR |= AT91C_CKGR_BIASEN_ENABLED;
+#endif
+}
+
+//------------------------------------------------------------------------------
+/// Enable UDPHS clock
+//------------------------------------------------------------------------------
+static inline void UDPHS_EnableUsbClock( void )
+{
+#if !defined (PMC_BY_HARD)
+    AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_UDPHS);
+    // Enable 480MHZ
+    //AT91C_BASE_CKGR->CKGR_UCKR |= (AT91C_CKGR_PLLCOUNT & (3 << 20)) | AT91C_CKGR_UPLLEN;
+    AT91C_BASE_CKGR->CKGR_UCKR |= ((0xf << 20) & (3 << 20)) | AT91C_CKGR_UPLLEN;
+    // Wait until UTMI PLL is locked
+    while ((AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKU) == 0);
+#endif
+}
+
+//------------------------------------------------------------------------------
+/// Disable UDPHS clock
+//------------------------------------------------------------------------------
+static inline void UDPHS_DisableUsbClock( void )
+{
+#if !defined (PMC_BY_HARD)
+    AT91C_BASE_PMC->PMC_PCDR = (1 << AT91C_ID_UDPHS);
+    // 480MHZ
+    AT91C_BASE_CKGR->CKGR_UCKR &= ~AT91C_CKGR_UPLLEN;
+#endif
+}
+
+//------------------------------------------------------------------------------
+/// Handles a completed transfer on the given endpoint, invoking the
+/// configured callback if any.
+/// \param bEndpoint Number of the endpoint for which the transfer has completed.
+/// \param bStatus   Status code returned by the transfer operation
+//------------------------------------------------------------------------------
+static void UDPHS_EndOfTransfer( unsigned char bEndpoint, char bStatus )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+
+    // Check that endpoint was sending or receiving data
+    if( (pEndpoint->state == UDP_ENDPOINT_RECEIVING)
+     || (pEndpoint->state == UDP_ENDPOINT_SENDING) ) {
+
+        TRACE_DEBUG_WP("Eo");
+        if(pEndpoint->state == UDP_ENDPOINT_SENDING) {
+            pEndpoint->sendZLP = 0;
+        }
+        // Endpoint returns in Idle state
+        pEndpoint->state = UDP_ENDPOINT_IDLE;
+
+        // Invoke callback is present
+        if (pTransfer->fCallback != 0) {
+
+            ((TransferCallback) pTransfer->fCallback)
+                (pTransfer->pArgument,
+                 bStatus,
+                 pTransfer->transferred,
+                 pTransfer->remaining + pTransfer->buffered);
+        }
+        else {
+            TRACE_DEBUG_WP("No callBack\n\r");
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Clears the correct RX flag in endpoint status register
+/// \param bEndpoint Index of endpoint
+//------------------------------------------------------------------------------
+static void UDPHS_ClearRxFlag( unsigned char bEndpoint )
+{
+    AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCLRSTA = AT91C_UDPHS_RX_BK_RDY;
+}
+
+//------------------------------------------------------------------------------
+/// Transfers a data payload from the current tranfer buffer to the endpoint
+/// FIFO
+/// \param bEndpoint Number of the endpoint which is sending data.
+//------------------------------------------------------------------------------
+static void UDPHS_WritePayload( unsigned char bEndpoint )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+    char     *pFifo;
+    signed int   size;
+    unsigned int dCtr;
+
+    pFifo = (char*)((unsigned int *)AT91C_BASE_UDPHS_EPTFIFO + (EPT_VIRTUAL_SIZE * bEndpoint));
+
+    // Get the number of bytes to send
+    size = pEndpoint->size;
+    if (size > pTransfer->remaining) {
+
+        size = pTransfer->remaining;
+    }
+
+    // Update transfer descriptor information
+    pTransfer->buffered += size;
+    pTransfer->remaining -= size;
+
+    // Write packet in the FIFO buffer
+    dCtr = 0;
+    while (size > 0) {
+
+        pFifo[dCtr] = *(pTransfer->pData);
+        pTransfer->pData++;
+        size--;
+        dCtr++;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Transfers a data payload from an endpoint FIFO to the current transfer buffer
+/// \param bEndpoint   Endpoint number.
+/// \param wPacketSize Size of received data packet
+//------------------------------------------------------------------------------
+static void UDPHS_ReadPayload( unsigned char bEndpoint, int wPacketSize )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+    char     *pFifo;
+    unsigned char dBytes=0;
+
+    pFifo = (char*)((unsigned int *)AT91C_BASE_UDPHS_EPTFIFO + (EPT_VIRTUAL_SIZE * bEndpoint));
+
+    // Check that the requested size is not bigger than the remaining transfer
+    if (wPacketSize > pTransfer->remaining) {
+
+        pTransfer->buffered += wPacketSize - pTransfer->remaining;
+        wPacketSize = pTransfer->remaining;
+    }
+
+    // Update transfer descriptor information
+    pTransfer->remaining -= wPacketSize;
+    pTransfer->transferred += wPacketSize;
+
+    // Retrieve packet
+    while (wPacketSize > 0) {
+
+        *(pTransfer->pData) = pFifo[dBytes];
+        pTransfer->pData++;
+        wPacketSize--;
+        dBytes++;
+    }
+}
+
+
+//------------------------------------------------------------------------------
+/// Received SETUP packet from endpoint 0 FIFO
+/// \param pRequest Generic USB SETUP request sent over Control endpoints
+//------------------------------------------------------------------------------
+static void UDPHS_ReadRequest( USBGenericRequest *pRequest )
+{
+    unsigned int *pData = (unsigned int *)pRequest;
+    unsigned int fifo;
+
+    fifo = (AT91C_BASE_UDPHS_EPTFIFO->UDPHS_READEPT0[0]);
+    *pData = fifo;
+    fifo = (AT91C_BASE_UDPHS_EPTFIFO->UDPHS_READEPT0[0]);
+    pData++;
+    *pData = fifo;
+    //TRACE_ERROR("SETUP: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n\r", pData[0],pData[1],pData[2],pData[3],pData[4],pData[5],pData[6],pData[7]);
+}
+
+//------------------------------------------------------------------------------
+/// Reset all endpoint transfer descriptors
+//------------------------------------------------------------------------------
+static void UDPHS_ResetEndpoints( void )
+{
+    Endpoint *pEndpoint;
+    Transfer *pTransfer;
+    unsigned char bEndpoint;
+
+    // Reset the transfer descriptor of every endpoint
+    for( bEndpoint = 0; bEndpoint < BOARD_USB_NUMENDPOINTS; bEndpoint++ ) {
+
+        pEndpoint = &(endpoints[bEndpoint]);
+        pTransfer = &(pEndpoint->transfer);
+
+        // Reset endpoint transfer descriptor
+        pTransfer->pData = 0;
+        pTransfer->transferred = -1;
+        pTransfer->buffered = -1;
+        pTransfer->remaining = -1;
+        pTransfer->fCallback = 0;
+        pTransfer->pArgument = 0;
+
+        // Reset endpoint state
+        pEndpoint->bank = 0;
+        pEndpoint->state = UDP_ENDPOINT_DISABLED;
+        // Reset ZLP
+        pEndpoint->sendZLP = 0;
+    }
+}
+
+
+//------------------------------------------------------------------------------
+/// Disable all endpoints (except control endpoint 0), aborting current 
+/// transfers if necessary
+//------------------------------------------------------------------------------
+static void UDPHS_DisableEndpoints( void )
+{
+    unsigned char bEndpoint;
+
+    // Disable each endpoint, terminating any pending transfer
+    // Control endpoint 0 is not disabled
+    for( bEndpoint = 1; bEndpoint < BOARD_USB_NUMENDPOINTS; bEndpoint++ ) {
+
+        UDPHS_EndOfTransfer( bEndpoint, USBD_STATUS_ABORTED );
+        endpoints[bEndpoint].state = UDP_ENDPOINT_DISABLED;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Endpoint interrupt handler.
+/// Handle IN/OUT transfers, received SETUP packets and STALLing
+/// \param bEndpoint Index of endpoint
+//------------------------------------------------------------------------------
+static void UDPHS_EndpointHandler( unsigned char bEndpoint )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+    unsigned int   status = AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTSTA;
+    unsigned short wPacketSize;
+    USBGenericRequest request;
+
+    TRACE_DEBUG_WP("E%d ", bEndpoint);
+    TRACE_DEBUG_WP("st:0x%X ", status);
+
+    // Handle interrupts
+    // IN packet sent
+    if( (AT91C_UDPHS_TX_PK_RDY == (AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTL & AT91C_UDPHS_TX_PK_RDY))
+     && (0 == (status & AT91C_UDPHS_TX_PK_RDY )) ) {
+
+        TRACE_DEBUG_WP("Wr ");
+
+        // Check that endpoint was in Sending state
+        if( pEndpoint->state == UDP_ENDPOINT_SENDING ) {
+
+            if (pTransfer->buffered > 0) {
+                pTransfer->transferred += pTransfer->buffered;
+                pTransfer->buffered = 0;
+            }
+
+            if(  ((pTransfer->buffered)==0)
+               &&((pTransfer->transferred)==0)
+               &&((pTransfer->remaining)==0)
+               &&(pEndpoint->sendZLP == 0)) {
+                pEndpoint->sendZLP = 1;
+            }
+
+            // End of transfer ?
+            if( (pTransfer->remaining > 0)
+              ||(pEndpoint->sendZLP == 1)) {
+
+                pEndpoint->sendZLP = 2;
+                TRACE_DEBUG_WP("\n\r1pTransfer->buffered %d \n\r", pTransfer->buffered);
+                TRACE_DEBUG_WP("1pTransfer->transferred %d \n\r", pTransfer->transferred);
+                TRACE_DEBUG_WP("1pTransfer->remaining %d \n\r", pTransfer->remaining);
+
+                // Transfer remaining data
+                TRACE_DEBUG_WP(" %d ", pEndpoint->size);
+
+                // Send next packet
+                UDPHS_WritePayload(bEndpoint);
+                AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTSETSTA = AT91C_UDPHS_TX_PK_RDY;
+            }
+            else {
+                TRACE_DEBUG_WP("\n\r0pTransfer->buffered %d \n\r", pTransfer->buffered);
+                TRACE_DEBUG_WP("0pTransfer->transferred %d \n\r", pTransfer->transferred);
+                TRACE_DEBUG_WP("0pTransfer->remaining %d \n\r", pTransfer->remaining);
+
+                TRACE_DEBUG_WP(" %d ", pTransfer->transferred);
+
+                // Disable interrupt if this is not a control endpoint
+                if( AT91C_UDPHS_EPT_TYPE_CTL_EPT != (AT91C_UDPHS_EPT_TYPE&(AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG)) ) {
+
+                    AT91C_BASE_UDPHS->UDPHS_IEN &= ~(1<<SHIFT_INTERUPT<<bEndpoint);
+                }
+                AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLDIS = AT91C_UDPHS_TX_PK_RDY;
+
+                UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);
+                pEndpoint->sendZLP = 0;
+            }
+        }
+        else {
+
+              TRACE_DEBUG("Error Wr %d", pEndpoint->sendZLP);
+        }
+    }
+
+    // OUT packet received
+    if( AT91C_UDPHS_RX_BK_RDY == (status & AT91C_UDPHS_RX_BK_RDY) ) {
+
+        TRACE_DEBUG_WP("Rd ");
+
+        // Check that the endpoint is in Receiving state
+        if (pEndpoint->state != UDP_ENDPOINT_RECEIVING) {
+
+            // Check if an ACK has been received on a Control endpoint
+            if( (0 == (AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG & AT91C_UDPHS_EPT_TYPE))
+             && (0 == (status & AT91C_UDPHS_BYTE_COUNT)) ) {
+
+                // Control endpoint, 0 bytes received
+                // Acknowledge the data and finish the current transfer
+                TRACE_DEBUG_WP("Ack ");
+                UDPHS_ClearRxFlag(bEndpoint);
+                UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);
+                //todo remove endoftranfer and test
+            }
+            // Check if the data has been STALLed
+            else if( AT91C_UDPHS_FRCESTALL == (status & AT91C_UDPHS_FRCESTALL)) {
+
+                // Discard STALLed data
+                TRACE_DEBUG_WP("Discard ");
+                UDPHS_ClearRxFlag(bEndpoint);
+            }
+            // NAK the data
+            else {
+
+                TRACE_DEBUG_WP("Nak ");
+                AT91C_BASE_UDPHS->UDPHS_IEN &= ~(1<<SHIFT_INTERUPT<<bEndpoint);
+            }
+        }
+        else {
+
+            // Endpoint is in Read state
+            // Retrieve data and store it into the current transfer buffer
+            wPacketSize = (unsigned short)((status & AT91C_UDPHS_BYTE_COUNT)>>20);
+
+            TRACE_DEBUG_WP("%d ", wPacketSize);
+            UDPHS_ReadPayload(bEndpoint, wPacketSize);
+            UDPHS_ClearRxFlag(bEndpoint);
+
+            // Check if the transfer is finished
+            if ((pTransfer->remaining == 0) || (wPacketSize < pEndpoint->size)) {
+
+                AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLDIS = AT91C_UDPHS_RX_BK_RDY;
+
+                // Disable interrupt if this is not a control endpoint
+                if( AT91C_UDPHS_EPT_TYPE_CTL_EPT != (AT91C_UDPHS_EPT_TYPE & (AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG)) ) {
+
+                    AT91C_BASE_UDPHS->UDPHS_IEN &= ~(1<<SHIFT_INTERUPT<<bEndpoint);
+                }
+                UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);
+            }
+        }
+    }
+
+
+    // STALL sent
+    if( AT91C_UDPHS_STALL_SNT == (status & AT91C_UDPHS_STALL_SNT) ) {
+
+        TRACE_WARNING( "Sta 0x%X [%d] ", status, bEndpoint);
+
+        // Acknowledge the stall flag
+        AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCLRSTA = AT91C_UDPHS_STALL_SNT;
+
+        // If the endpoint is not halted, clear the STALL condition
+        if (pEndpoint->state != UDP_ENDPOINT_HALTED) {
+
+            TRACE_WARNING( "_ " );
+            AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCLRSTA = AT91C_UDPHS_FRCESTALL;
+        }
+    }
+
+    // SETUP packet received
+    if( AT91C_UDPHS_RX_SETUP == (status & AT91C_UDPHS_RX_SETUP) )  {
+
+        TRACE_DEBUG_WP("Stp ");
+
+        // If a transfer was pending, complete it
+        // Handles the case where during the status phase of a control write
+        // transfer, the host receives the device ZLP and ack it, but the ack
+        // is not received by the device
+        if ((pEndpoint->state == UDP_ENDPOINT_RECEIVING)
+            || (pEndpoint->state == UDP_ENDPOINT_SENDING)) {
+
+            UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_SUCCESS);
+        }
+        // Copy the setup packet
+        UDPHS_ReadRequest(&request);
+
+        // Acknowledge setup packet
+        AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCLRSTA = AT91C_UDPHS_RX_SETUP;
+
+        // Forward the request to the upper layer
+        USBDCallbacks_RequestReceived(&request);
+    }
+
+}
+
+//------------------------------------------------------------------------------
+//      Interrupt service routine
+//------------------------------------------------------------------------------
+#ifdef DMA
+//----------------------------------------------------------------------------
+/// Endpoint DMA interrupt handler.
+/// This function (ISR) handles dma interrupts
+/// \param bEndpoint Index of endpoint
+//----------------------------------------------------------------------------
+static void UDPHS_DmaHandler( unsigned char bEndpoint )
+{
+    Endpoint     *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer     *pTransfer = &(pEndpoint->transfer);
+    int           justTransferred;
+    unsigned int  status;
+    unsigned char result = USBD_STATUS_SUCCESS;
+
+    status = AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMASTATUS;
+    TRACE_DEBUG_WP("Dma Ept%d ", bEndpoint);
+
+    // Disable DMA interrupt to avoid receiving 2 interrupts (B_EN and TR_EN)
+    AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL &=
+        ~(AT91C_UDPHS_END_TR_EN | AT91C_UDPHS_END_B_EN);
+
+    AT91C_BASE_UDPHS->UDPHS_IEN &= ~(1 << SHIFT_DMA << bEndpoint);
+
+    if( AT91C_UDPHS_END_BF_ST == (status & AT91C_UDPHS_END_BF_ST) ) {
+
+        TRACE_DEBUG_WP("EndBuffer ");
+
+        // BUFF_COUNT holds the number of untransmitted bytes.
+        // BUFF_COUNT is equal to zero in case of good transfer
+        justTransferred = pTransfer->buffered
+                                 - ((status & AT91C_UDPHS_BUFF_COUNT) >> 16);
+        pTransfer->transferred += justTransferred;
+
+        pTransfer->buffered = ((status & AT91C_UDPHS_BUFF_COUNT) >> 16);
+
+        pTransfer->remaining -= justTransferred;
+
+        TRACE_DEBUG_WP("\n\r1pTransfer->buffered %d \n\r", pTransfer->buffered);
+        TRACE_DEBUG_WP("1pTransfer->transferred %d \n\r", pTransfer->transferred);
+        TRACE_DEBUG_WP("1pTransfer->remaining %d \n\r", pTransfer->remaining);
+
+        if( (pTransfer->remaining + pTransfer->buffered) > 0 ) {
+
+            // Prepare an other transfer
+            if( pTransfer->remaining > DMA_MAX_FIFO_SIZE ) {
+
+                pTransfer->buffered = DMA_MAX_FIFO_SIZE;    
+            }
+            else {
+                pTransfer->buffered = pTransfer->remaining;
+            }
+
+            AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMAADDRESS = 
+                (unsigned int)((pTransfer->pData) + (pTransfer->transferred));
+
+            // Clear unwanted interrupts
+            AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMASTATUS;
+
+            // Enable DMA endpoint interrupt
+            AT91C_BASE_UDPHS->UDPHS_IEN |= (1 << SHIFT_DMA << bEndpoint);
+            // DMA config for receive the good size of buffer, or an error buffer
+
+            AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = 0; // raz
+            AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL =
+                                     ( ((pTransfer->buffered << 16) & AT91C_UDPHS_BUFF_COUNT)
+                                       | AT91C_UDPHS_END_TR_EN
+                                       | AT91C_UDPHS_END_TR_IT
+                                       | AT91C_UDPHS_END_B_EN
+                                       | AT91C_UDPHS_END_BUFFIT
+                                       | AT91C_UDPHS_CHANN_ENB );
+        }
+    }
+    else if( AT91C_UDPHS_END_TR_ST == (status & AT91C_UDPHS_END_TR_ST) ) {
+
+        TRACE_DEBUG_WP("EndTransf ");
+
+        pTransfer->transferred = pTransfer->buffered
+                                 - ((status & AT91C_UDPHS_BUFF_COUNT) >> 16);
+        pTransfer->remaining = 0;
+        TRACE_DEBUG_WP("\n\r0pTransfer->buffered %d \n\r", pTransfer->buffered);
+        TRACE_DEBUG_WP("0pTransfer->transferred %d \n\r", pTransfer->transferred);
+        TRACE_DEBUG_WP("0pTransfer->remaining %d \n\r", pTransfer->remaining);
+    }
+    else {
+
+        TRACE_ERROR("UDPHS_DmaHandler: Error (0x%08X)\n\r", status);
+        result = USBD_STATUS_ABORTED;
+    }
+
+    // Invoke callback
+    if( pTransfer->remaining == 0 ) {
+
+        TRACE_DEBUG_WP("EOT ");
+        UDPHS_EndOfTransfer(bEndpoint, result);
+    }
+}
+#endif
+
+
+//------------------------------------------------------------------------------
+//      Exported functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// USB interrupt handler
+/// Manages device resume, suspend, end of bus reset. 
+/// Forwards endpoint interrupts to the appropriate handler.
+//------------------------------------------------------------------------------
+void RealUdphsIrqHandler(void) @spontaneous()
+{
+    unsigned int  status;
+    unsigned char numIT;
+
+    if (deviceState >= USBD_STATE_POWERED) {
+
+        //LED_Set(USBD_LEDUSB);
+        //TOSH_SET_GREEN_LED_PIN();
+    }
+
+    // Get interrupts status
+    status = AT91C_BASE_UDPHS->UDPHS_INTSTA & AT91C_BASE_UDPHS->UDPHS_IEN;
+
+    // Handle all UDPHS interrupts
+    TRACE_DEBUG_WP("H");
+    while (status != 0) {
+
+        // Start Of Frame (SOF)
+        if ((status & AT91C_UDPHS_IEN_SOF) != 0) {
+
+            TRACE_DEBUG_WP("SOF ");
+
+            // Invoke the SOF callback
+            //USB_StartOfFrameCallback(pUsb);
+
+            // Acknowledge interrupt
+            AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_IEN_SOF;
+            status &= ~AT91C_UDPHS_IEN_SOF;
+        }
+        // Suspend
+        // This interrupt is always treated last (hence the '==')
+        else if (status == AT91C_UDPHS_DET_SUSPD) {
+
+            TRACE_DEBUG_WP("S");
+
+            // The device enters the Suspended state
+            // MCK + UDPCK must be off
+            // Pull-Up must be connected
+            // Transceiver must be disabled
+
+            //LED_Clear(USBD_LEDUSB);
+            //TOSH_CLR_GREEN_LED_PIN();
+
+            UDPHS_DisableBIAS();
+
+            // Enable wakeup
+            AT91C_BASE_UDPHS->UDPHS_IEN |= AT91C_UDPHS_WAKE_UP | AT91C_UDPHS_ENDOFRSM;
+            AT91C_BASE_UDPHS->UDPHS_IEN &= ~AT91C_UDPHS_DET_SUSPD;
+
+            // Acknowledge interrupt
+            AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_DET_SUSPD | AT91C_UDPHS_WAKE_UP;
+            previousDeviceState = deviceState;
+            deviceState = USBD_STATE_SUSPENDED;
+            UDPHS_DisableUsbClock();
+
+            // Invoke the Suspend callback
+            USBDCallbacks_Suspended();
+        }
+        // Resume
+        else if( ((status & AT91C_UDPHS_WAKE_UP) != 0)      // line activity
+              || ((status & AT91C_UDPHS_ENDOFRSM) != 0))  { // pc wakeup
+            {
+                // Invoke the Resume callback
+                USBDCallbacks_Resumed();
+
+                TRACE_DEBUG_WP("R");
+
+                UDPHS_EnableUsbClock();
+                UDPHS_EnableBIAS();
+
+                // The device enters Configured state
+                // MCK + UDPCK must be on
+                // Pull-Up must be connected
+                // Transceiver must be enabled
+
+                deviceState = previousDeviceState;
+
+                AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_WAKE_UP | AT91C_UDPHS_ENDOFRSM | AT91C_UDPHS_DET_SUSPD;
+
+                AT91C_BASE_UDPHS->UDPHS_IEN |= AT91C_UDPHS_ENDOFRSM | AT91C_UDPHS_DET_SUSPD;
+                AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_WAKE_UP | AT91C_UDPHS_ENDOFRSM;
+                AT91C_BASE_UDPHS->UDPHS_IEN &= ~AT91C_UDPHS_WAKE_UP;
+            }
+        }
+        // End of bus reset
+        else if ((status & AT91C_UDPHS_ENDRESET) == AT91C_UDPHS_ENDRESET) {
+
+//            TRACE_DEBUG_WP("EoB ");
+
+            // The device enters the Default state
+            deviceState = USBD_STATE_DEFAULT;
+            //      MCK + UDPCK are already enabled
+            //      Pull-Up is already connected
+            //      Transceiver must be enabled
+            //      Endpoint 0 must be enabled
+
+            UDPHS_ResetEndpoints();
+            UDPHS_DisableEndpoints();
+            USBD_ConfigureEndpoint(0);
+
+            // Flush and enable the Suspend interrupt
+            AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_WAKE_UP | AT91C_UDPHS_DET_SUSPD;
+
+            //// Enable the Start Of Frame (SOF) interrupt if needed
+            //if (pCallbacks->startOfFrame != 0)
+            //{
+            //    AT91C_BASE_UDPHS->UDPHS_IEN |= AT91C_UDPHS_IEN_SOF;
+            //}
+
+            // Invoke the Reset callback
+            USBDCallbacks_Reset();
+
+            // Acknowledge end of bus reset interrupt
+            AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_ENDRESET;
+
+            AT91C_BASE_UDPHS->UDPHS_IEN |= AT91C_UDPHS_DET_SUSPD;
+        }
+        // Handle upstream resume interrupt
+        else if (status & AT91C_UDPHS_UPSTR_RES) {
+
+            TRACE_DEBUG_WP("ExtRes ");
+
+            // - Acknowledge the IT
+            AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_UPSTR_RES;
+        }
+        // Endpoint interrupts
+        else {
+#ifndef DMA
+            // Handle endpoint interrupts
+            for (numIT = 0; numIT < NUM_IT_MAX; numIT++) {
+
+                if ((status & (1 << SHIFT_INTERUPT << numIT)) != 0) {
+
+                    UDPHS_EndpointHandler(numIT);
+                }
+            }
+#else
+            // Handle endpoint control interrupt
+            if ((status & (1 << SHIFT_INTERUPT << 0)) != 0) {
+
+                UDPHS_EndpointHandler( 0 );
+            }
+            else {
+
+                numIT = 1;
+                while((status&(0x7E<<SHIFT_DMA)) != 0) {
+
+                    // Check if endpoint has a pending interrupt
+                    if ((status & (1 << SHIFT_DMA << numIT)) != 0) {
+
+                        UDPHS_DmaHandler(numIT);
+                        status &= ~(1 << SHIFT_DMA << numIT);
+                        if (status != 0) {
+
+                            TRACE_INFO_WP("\n\r  - ");
+                        }
+                    }
+                    numIT++;
+                }
+            }
+#endif
+        }
+
+        // Retrieve new interrupt status
+        status = AT91C_BASE_UDPHS->UDPHS_INTSTA & AT91C_BASE_UDPHS->UDPHS_IEN;
+
+        TRACE_DEBUG_WP("\n\r");
+        if (status != 0) {
+
+            TRACE_DEBUG_WP("  - ");
+        }
+    }
+
+    if (deviceState >= USBD_STATE_POWERED) {
+
+        //LED_Clear(USBD_LEDUSB);
+        //TOSH_CLR_GREEN_LED_PIN();
+    }
+}
+void UdphsIrqHandler(void) @C() @spontaneous()
+{
+    call UdphsInterruptWrapper.preamble();
+    RealUdphsIrqHandler();
+    call UdphsInterruptWrapper.postamble();
+}
+
+//------------------------------------------------------------------------------
+/// Configure an endpoint with the provided endpoint descriptor
+/// \param pDdescriptor Pointer to the endpoint descriptor
+//------------------------------------------------------------------------------
+void USBD_ConfigureEndpoint(const USBEndpointDescriptor *pDescriptor)
+{
+    Endpoint *pEndpoint;
+    unsigned char bEndpoint;
+    unsigned char bType;
+    unsigned char bEndpointDir;
+    unsigned char bInterval = 0;
+    unsigned char bSizeEpt = 0;
+
+    // NULL descriptor -> Control endpoint 0
+    if (pDescriptor == 0) {
+
+        bEndpoint = 0;
+        pEndpoint = &(endpoints[bEndpoint]);
+        bType = USBEndpointDescriptor_CONTROL;
+        bEndpointDir = 0;
+        pEndpoint->size = BOARD_USB_ENDPOINTS_MAXPACKETSIZE(0);
+        pEndpoint->bank = BOARD_USB_ENDPOINTS_BANKS(0);
+    }
+    else  {
+
+        // The endpoint number
+        bEndpoint = USBEndpointDescriptor_GetNumber(pDescriptor);
+        pEndpoint = &(endpoints[bEndpoint]);
+        // Transfer type: Control, Isochronous, Bulk, Interrupt
+        bType = USBEndpointDescriptor_GetType(pDescriptor);
+        // Direction, ignored for control endpoints
+        bEndpointDir = USBEndpointDescriptor_GetDirection(pDescriptor);
+        // Interval, for ISO endpoints ONLY
+        bInterval = USBEndpointDescriptor_GetInterval(pDescriptor);
+        if (bInterval > 16) bInterval = 16;
+        pEndpoint->size = USBEndpointDescriptor_GetMaxPacketSize(pDescriptor);
+        pEndpoint->bank = BOARD_USB_ENDPOINTS_BANKS(bEndpoint);
+    }
+
+    // Abort the current transfer is the endpoint was configured and in
+    // Write or Read state
+    if( (pEndpoint->state == UDP_ENDPOINT_RECEIVING)
+     || (pEndpoint->state == UDP_ENDPOINT_SENDING) ) {
+
+        UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_RESET);
+    }
+    pEndpoint->state = UDP_ENDPOINT_IDLE;
+
+    // Disable endpoint
+    AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLDIS = AT91C_UDPHS_SHRT_PCKT
+                                                           | AT91C_UDPHS_BUSY_BANK
+                                                           | AT91C_UDPHS_NAK_OUT
+                                                           | AT91C_UDPHS_NAK_IN
+                                                           | AT91C_UDPHS_STALL_SNT
+                                                           | AT91C_UDPHS_RX_SETUP
+                                                           | AT91C_UDPHS_TX_PK_RDY
+                                                           | AT91C_UDPHS_TX_COMPLT
+                                                           | AT91C_UDPHS_RX_BK_RDY
+                                                           | AT91C_UDPHS_ERR_OVFLW
+                                                           | AT91C_UDPHS_MDATA_RX
+                                                           | AT91C_UDPHS_DATAX_RX
+                                                           | AT91C_UDPHS_NYET_DIS
+                                                           | AT91C_UDPHS_INTDIS_DMA
+                                                           | AT91C_UDPHS_AUTO_VALID
+                                                           | AT91C_UDPHS_EPT_DISABL;
+
+    // Reset Endpoint Fifos
+    AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCLRSTA = AT91C_UDPHS_TOGGLESQ | AT91C_UDPHS_FRCESTALL;
+    AT91C_BASE_UDPHS->UDPHS_EPTRST = 1<<bEndpoint;
+
+    // Configure endpoint
+    if( pEndpoint->size <= 8 )  {
+        bSizeEpt = 0;
+    } 
+    else if ( pEndpoint->size <= 16 ) {
+        bSizeEpt = 1;
+    }
+    else if ( pEndpoint->size <= 32 ) {
+        bSizeEpt = 2;
+    }
+    else if ( pEndpoint->size <= 64 ) {
+        bSizeEpt = 3;
+    }
+    else if ( pEndpoint->size <= 128 ) {
+        bSizeEpt = 4;
+    }
+    else if ( pEndpoint->size <= 256 ) {
+        bSizeEpt = 5;
+    }
+    else if ( pEndpoint->size <= 512 )  {
+        bSizeEpt = 6;
+    }
+    else if ( pEndpoint->size <= 1024 ) {
+        bSizeEpt = 7;
+    } //else {
+    //  sizeEpt = 0; // control endpoint
+    //}
+
+    // Configure endpoint
+    if (bType == USBEndpointDescriptor_CONTROL) {
+
+        // Enable endpoint IT for control endpoint
+        AT91C_BASE_UDPHS->UDPHS_IEN |= (1<<SHIFT_INTERUPT<<bEndpoint);
+    }
+
+
+    AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG = bSizeEpt 
+                                                        | (bEndpointDir << 3) 
+                                                        | (bType << 4) 
+                                                        | ((pEndpoint->bank) << 6)
+                                                        | (bInterval << 8)
+                                                        ;
+
+    while( (signed int)AT91C_UDPHS_EPT_MAPD != (signed int)((AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG) & AT91C_UDPHS_EPT_MAPD) ) {
+
+        // resolved by clearing the reset IT in good place
+        TRACE_ERROR("PB bEndpoint: 0x%X\n\r", bEndpoint);
+        TRACE_ERROR("PB bSizeEpt: 0x%X\n\r", bSizeEpt);
+        TRACE_ERROR("PB bEndpointDir: 0x%X\n\r", bEndpointDir);
+        TRACE_ERROR("PB bType: 0x%X\n\r", bType);
+        TRACE_ERROR("PB pEndpoint->bank: 0x%X\n\r", pEndpoint->bank);
+        TRACE_ERROR("PB UDPHS_EPTCFG: 0x%X\n\r", AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG);
+        for(;;);
+    }
+
+    if (bType == USBEndpointDescriptor_CONTROL) {
+
+        AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLENB = AT91C_UDPHS_RX_BK_RDY 
+                                                               | AT91C_UDPHS_RX_SETUP
+                                                               | AT91C_UDPHS_EPT_ENABL;
+    }
+    else {
+#ifndef DMA
+        AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLENB = AT91C_UDPHS_EPT_ENABL;
+#else
+        AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLENB = AT91C_UDPHS_AUTO_VALID 
+                                                               | AT91C_UDPHS_EPT_ENABL;
+#endif
+    }
+
+}
+
+//------------------------------------------------------------------------------
+/// Sends data through an USB endpoint (IN)
+/// Sets up the transfer descriptor, write one or two data payloads
+/// (depending on the number of FIFO banks for the endpoint) and then
+/// starts the actual transfer. The operation is complete when all
+/// the data has been sent.
+/// \param bEndpoint Index of endpoint
+/// \param *pData  Data to be written
+/// \param dLength Data length to be send
+/// \param fCallback  Callback to be call after the success command
+/// \param *pArgument Callback argument
+/// \return USBD_STATUS_LOCKED or USBD_STATUS_SUCCESS
+//------------------------------------------------------------------------------
+char USBD_Write( unsigned char    bEndpoint,
+                 const void       *pData,
+                 unsigned int     dLength,
+                 TransferCallback fCallback,
+                 void             *pArgument )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+
+    // Return if the endpoint is not in IDLE state
+    if (pEndpoint->state != UDP_ENDPOINT_IDLE)  {
+
+        return USBD_STATUS_LOCKED;
+    }
+
+    TRACE_DEBUG_WP("Write%d(%d) ", bEndpoint, dLength);
+    pEndpoint->sendZLP = 0;
+    // Setup the transfer descriptor
+    pTransfer->pData = (void *) pData;
+    pTransfer->remaining = dLength;
+    pTransfer->buffered = 0;
+    pTransfer->transferred = 0;
+    pTransfer->fCallback = fCallback;
+    pTransfer->pArgument = pArgument;
+
+    // Send one packet
+    pEndpoint->state = UDP_ENDPOINT_SENDING;
+
+#ifdef DMA
+    // Test if endpoint type control
+    if(AT91C_UDPHS_EPT_TYPE_CTL_EPT == (AT91C_UDPHS_EPT_TYPE&(AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG)))  {
+#endif
+        // Enable endpoint IT
+        AT91C_BASE_UDPHS->UDPHS_IEN |= (1 << SHIFT_INTERUPT << bEndpoint);
+        AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLENB = AT91C_UDPHS_TX_PK_RDY;
+
+#ifdef DMA
+    }
+    else {
+
+        if( pTransfer->remaining == 0 ) {
+            // DMA not handle ZLP
+            AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTSETSTA = AT91C_UDPHS_TX_PK_RDY;
+            // Enable endpoint IT
+            AT91C_BASE_UDPHS->UDPHS_IEN |= (1 << SHIFT_INTERUPT << bEndpoint);
+            AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLENB = AT91C_UDPHS_TX_PK_RDY;
+        }
+        else {
+            // Others endpoints (not control)
+            if( pTransfer->remaining > DMA_MAX_FIFO_SIZE ) {
+
+                // Transfer the max
+                pTransfer->buffered = DMA_MAX_FIFO_SIZE;    
+            }
+            else {
+                // Transfer the good size
+                pTransfer->buffered = pTransfer->remaining;
+            }
+
+            TRACE_DEBUG_WP("\n\r_WR:%d ", pTransfer->remaining );
+            TRACE_DEBUG_WP("B:%d ", pTransfer->buffered );
+            TRACE_DEBUG_WP("T:%d ", pTransfer->transferred );
+
+            AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMAADDRESS = (unsigned int)(pTransfer->pData);
+
+            // Clear unwanted interrupts
+            AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMASTATUS;
+            // Enable DMA endpoint interrupt
+            AT91C_BASE_UDPHS->UDPHS_IEN |= (1 << SHIFT_DMA << bEndpoint);
+            // DMA config
+            AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = 0; // raz
+            AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL =
+                                              ( ((pTransfer->buffered << 16) & AT91C_UDPHS_BUFF_COUNT)
+                                                | AT91C_UDPHS_END_B_EN
+                                                | AT91C_UDPHS_END_BUFFIT
+                                                | AT91C_UDPHS_CHANN_ENB );
+        }
+    }
+#endif
+
+    return USBD_STATUS_SUCCESS;
+}
+
+//------------------------------------------------------------------------------
+/// Reads incoming data on an USB endpoint (OUT)
+/// \param bEndpoint Index of endpoint
+/// \param *pData  Data to be readen
+/// \param dLength Data length to be receive
+/// \param fCallback  Callback to be call after the success command
+/// \param *pArgument Callback argument
+/// \return USBD_STATUS_LOCKED or USBD_STATUS_SUCCESS
+//------------------------------------------------------------------------------
+char USBD_Read( unsigned char    bEndpoint,
+                void             *pData,
+                unsigned int     dLength,
+                TransferCallback fCallback,
+                void             *pArgument )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    Transfer *pTransfer = &(pEndpoint->transfer);
+  
+    // Return if the endpoint is not in IDLE state
+    if (pEndpoint->state != UDP_ENDPOINT_IDLE) {
+
+        return USBD_STATUS_LOCKED;
+    }
+
+    TRACE_DEBUG_WP("Read%d(%d) ", bEndpoint, dLength);
+
+    // Endpoint enters Receiving state
+    pEndpoint->state = UDP_ENDPOINT_RECEIVING;
+
+    // Set the transfer descriptor
+    pTransfer->pData = pData;
+    pTransfer->remaining = dLength;
+    pTransfer->buffered = 0;
+    pTransfer->transferred = 0;
+    pTransfer->fCallback = fCallback;
+    pTransfer->pArgument = pArgument;
+
+#ifdef DMA
+    // Test if endpoint type control
+    if(AT91C_UDPHS_EPT_TYPE_CTL_EPT == (AT91C_UDPHS_EPT_TYPE&(AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG))) {
+#endif
+        // Control endpoint
+        // Enable endpoint IT
+        AT91C_BASE_UDPHS->UDPHS_IEN |= (1 << SHIFT_INTERUPT << bEndpoint);
+        AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCTLENB = AT91C_UDPHS_RX_BK_RDY;
+#ifdef DMA
+    }
+    else {
+
+        TRACE_DEBUG_WP("Read%d(%d) ", bEndpoint, dLength);
+
+        // Others endpoints (not control)
+        if( pTransfer->remaining > DMA_MAX_FIFO_SIZE ) {
+
+            // Transfer the max
+            pTransfer->buffered = DMA_MAX_FIFO_SIZE;    
+        }
+        else {
+            // Transfer the good size
+            pTransfer->buffered = pTransfer->remaining;
+        }
+
+        AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMAADDRESS = (unsigned int)(pTransfer->pData);
+
+        // Clear unwanted interrupts
+        AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMASTATUS;
+
+        // Enable DMA endpoint interrupt
+        AT91C_BASE_UDPHS->UDPHS_IEN |= (1 << SHIFT_DMA << bEndpoint);
+
+        TRACE_DEBUG_WP("\n\r_RR:%d ", pTransfer->remaining );
+        TRACE_DEBUG_WP("B:%d ", pTransfer->buffered );
+        TRACE_DEBUG_WP("T:%d ", pTransfer->transferred );
+
+        // DMA config
+        AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL = 0; // raz
+        AT91C_BASE_UDPHS->UDPHS_DMA[bEndpoint].UDPHS_DMACONTROL =
+                                 ( ((pTransfer->buffered << 16) & AT91C_UDPHS_BUFF_COUNT)
+                                   | AT91C_UDPHS_END_TR_EN
+                                   | AT91C_UDPHS_END_TR_IT
+                                   | AT91C_UDPHS_END_B_EN
+                                   | AT91C_UDPHS_END_BUFFIT
+                                   | AT91C_UDPHS_CHANN_ENB );
+    }
+#endif
+
+    return USBD_STATUS_SUCCESS;
+}
+
+//------------------------------------------------------------------------------
+/// Put endpoint into Halt state
+/// \param bEndpoint Index of endpoint
+//------------------------------------------------------------------------------
+void USBD_Halt( unsigned char bEndpoint )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+
+    TRACE_INFO("usbd_Halt%d ", bEndpoint);
+    // Check that endpoint is enabled and not already in Halt state
+    if( (pEndpoint->state != UDP_ENDPOINT_DISABLED)
+     && (pEndpoint->state != UDP_ENDPOINT_HALTED) ) {
+
+        TRACE_INFO("Halt%d ", bEndpoint);
+
+        // Abort the current transfer if necessary
+        UDPHS_EndOfTransfer(bEndpoint, USBD_STATUS_ABORTED);
+
+        // Put endpoint into Halt state
+        AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTSETSTA = AT91C_UDPHS_FRCESTALL;
+        pEndpoint->state = UDP_ENDPOINT_HALTED;
+
+#ifdef DMA
+        // Test if endpoint type control
+        if(AT91C_UDPHS_EPT_TYPE_CTL_EPT == (AT91C_UDPHS_EPT_TYPE&(AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCFG)))  {
+#endif
+            // Enable the endpoint interrupt
+            AT91C_BASE_UDPHS->UDPHS_IEN |= (1<<SHIFT_INTERUPT<<bEndpoint);
+#ifdef DMA
+        }
+        else {
+            // Enable IT DMA
+            AT91C_BASE_UDPHS->UDPHS_IEN |= (1<<SHIFT_DMA<<bEndpoint);
+        }
+#endif
+   }
+}
+
+//------------------------------------------------------------------------------
+/// Clears the Halt feature on the given endpoint.
+/// \param bEndpoint Index of endpoint
+//------------------------------------------------------------------------------
+void USBD_Unhalt( unsigned char bEndpoint )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+
+    // Check if the endpoint is enabled
+    if (pEndpoint->state != UDP_ENDPOINT_DISABLED) {
+
+        TRACE_DEBUG_WP("Unhalt%d ", bEndpoint);
+
+        // Return endpoint to Idle state
+        pEndpoint->state = UDP_ENDPOINT_IDLE;
+
+        // Clear FORCESTALL flag
+        AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTCLRSTA = AT91C_UDPHS_TOGGLESQ | AT91C_UDPHS_FRCESTALL;
+
+        // Reset Endpoint Fifos
+        AT91C_BASE_UDPHS->UDPHS_EPTRST = (1<<bEndpoint);
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Returns the current Halt status of an endpoint.
+/// \param bEndpoint Index of endpoint
+/// \return 1 if the endpoint is currently halted; otherwise 0
+//------------------------------------------------------------------------------
+unsigned char USBD_IsHalted( unsigned char bEndpoint )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+    unsigned char status = 0;
+
+    if (pEndpoint->state == UDP_ENDPOINT_HALTED) {
+        status = 1;
+    }
+    return( status );
+}
+
+//------------------------------------------------------------------------------
+/// IS High Speed device working in High Speed ?
+/// \return 1 if the device is in High Speed; otherwise 0 (Full Speed)
+//------------------------------------------------------------------------------
+unsigned char USBD_IsHighSpeed( void )
+{
+    unsigned char status = 0;
+
+    if( AT91C_UDPHS_SPEED == (AT91C_BASE_UDPHS->UDPHS_INTSTA & AT91C_UDPHS_SPEED) )
+    {
+        // High Speed
+        TRACE_DEBUG_WP("High Speed\n\r");
+        status = 1;
+    }
+    else {
+        TRACE_DEBUG_WP("Full Speed\n\r");
+    }
+    return( status );
+}
+ 
+
+//------------------------------------------------------------------------------
+/// Causes the endpoint to acknowledge the next received packet with a STALL
+/// handshake.
+/// Further packets are then handled normally.
+/// \param bEndpoint Index of endpoint
+/// \return Operation result code: USBD_STATUS_LOCKED or USBD_STATUS_SUCCESS
+//------------------------------------------------------------------------------
+unsigned char USBD_Stall( unsigned char bEndpoint )
+{
+    Endpoint *pEndpoint = &(endpoints[bEndpoint]);
+
+    // Check that endpoint is in Idle state
+    if (pEndpoint->state != UDP_ENDPOINT_IDLE) {
+
+        TRACE_WARNING("UDP_Stall: Endpoint%d locked\n\r", bEndpoint);
+        return USBD_STATUS_LOCKED;
+    }
+
+    TRACE_DEBUG_WP("Stall%d ", bEndpoint);
+
+    AT91C_BASE_UDPHS->UDPHS_EPT[bEndpoint].UDPHS_EPTSETSTA = AT91C_UDPHS_FRCESTALL;
+
+    return USBD_STATUS_SUCCESS;
+}
+
+//------------------------------------------------------------------------------
+/// Activates a remote wakeup procedure
+//------------------------------------------------------------------------------
+void USBD_RemoteWakeUp(void)
+{
+    TRACE_DEBUG_WP("Remote WakeUp\n\r");
+
+    // Device is currently suspended
+    if (deviceState == USBD_STATE_SUSPENDED) {
+
+        TRACE_DEBUG_WP("RW\n\r");
+        UDPHS_EnableUsbClock();
+
+        // Activates a remote wakeup
+        AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_REWAKEUP;
+
+        while ((AT91C_BASE_UDPHS->UDPHS_CTRL&AT91C_UDPHS_REWAKEUP) == AT91C_UDPHS_REWAKEUP) {
+
+            TRACE_DEBUG_WP("W");
+        }
+        UDPHS_EnableBIAS();
+    }
+    // Device is NOT suspended
+    else {
+
+        TRACE_WARNING("USBD_RemoteWakeUp: Device is not suspended\n\r");
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Sets the device address
+/// \param address Adress to be set
+//------------------------------------------------------------------------------
+void USBD_SetAddress( unsigned char address )
+{
+    TRACE_DEBUG_WP("SetAddr(%d) ", address);
+
+    // Set address
+    AT91C_BASE_UDPHS->UDPHS_CTRL &= ~AT91C_UDPHS_DEV_ADDR; // RAZ Address
+    AT91C_BASE_UDPHS->UDPHS_CTRL |= address | AT91C_UDPHS_FADDR_EN;
+
+    // If the address is 0, the device returns to the Default state
+    if (address == 0) {
+        deviceState = USBD_STATE_DEFAULT;
+    }
+    // If the address is non-zero, the device enters the Address state
+    else {
+        deviceState = USBD_STATE_ADDRESS;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Changes the device state from Address to Configured, or from Configured 
+/// to Address.
+/// This method directly access the last received SETUP packet to decide on 
+/// what to do.
+/// \param cfgnum configuration number
+//------------------------------------------------------------------------------
+void USBD_SetConfiguration( unsigned char cfgnum )
+{
+    TRACE_DEBUG_WP("SetCfg(%d) ", cfgnum);
+
+    // Check the request
+    if( cfgnum != 0 ) {
+
+        // Enter Configured state
+        deviceState = USBD_STATE_CONFIGURED;
+    }
+    // If the configuration number is zero, the device goes back to the Address
+    // state
+    else  {
+
+        // Go back to Address state
+        deviceState = USBD_STATE_ADDRESS;
+
+        // Abort all transfers
+        UDPHS_DisableEndpoints();
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Enables the pull-up on the D+ line to connect the device to the USB.
+//------------------------------------------------------------------------------
+void USBD_Connect( void )
+{
+    TRACE_DEBUG_WP("Conn ");
+#if defined(BOARD_USB_PULLUP_INTERNAL)
+    AT91C_BASE_UDPHS->UDPHS_CTRL &= ~AT91C_UDPHS_DETACH;   // Pull Up on DP
+    AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_PULLD_DIS; // Disable Pull Down
+
+#elif defined(BOARD_USB_PULLUP_INTERNAL_BY_MATRIX)
+    TRACE_DEBUG_WP("PUON 1\n\r");
+    AT91C_BASE_MATRIX->MATRIX_USBPCR |= AT91C_MATRIX_USBPCR_PUON;
+
+#elif defined(BOARD_USB_PULLUP_EXTERNAL)
+
+#ifdef PIN_USB_PULLUP
+    const Pin pinPullUp = PIN_USB_PULLUP;
+    if( pinPullUp.attribute == PIO_OUTPUT_0 ) {
+
+        PIO_Set(&pinPullUp);
+    }
+    else {
+
+        PIO_Clear(&pinPullUp);
+    }
+#else
+    #error unsupported now
+#endif
+
+#elif !defined(BOARD_USB_PULLUP_ALWAYSON)
+    #error Unsupported pull-up type.
+
+#endif
+}
+
+//------------------------------------------------------------------------------
+/// Disables the pull-up on the D+ line to disconnect the device from the bus.
+//------------------------------------------------------------------------------
+void USBD_Disconnect( void )
+{
+    TRACE_DEBUG_WP("Disc ");
+
+#if defined(BOARD_USB_PULLUP_INTERNAL)
+    AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_DETACH; // detach
+    AT91C_BASE_UDPHS->UDPHS_CTRL &= ~AT91C_UDPHS_PULLD_DIS; // Enable Pull Down
+
+#elif defined(BOARD_USB_PULLUP_INTERNAL_BY_MATRIX)
+    AT91C_BASE_MATRIX->MATRIX_USBPCR &= ~AT91C_MATRIX_USBPCR_PUON;
+
+#elif defined(BOARD_USB_PULLUP_EXTERNAL)
+
+#ifdef PIN_USB_PULLUP
+    const Pin pinPullUp = PIN_USB_PULLUP;
+    if (pinPullUp.attribute == PIO_OUTPUT_0) {
+
+        PIO_Clear(&pinPullUp);
+    }
+    else {
+
+        PIO_Set(&pinPullUp);
+    }
+#else
+    #error unsupported now
+#endif
+
+#elif !defined(BOARD_USB_PULLUP_ALWAYSON)
+    #error Unsupported pull-up type.
+
+#endif
+
+    // Device returns to the Powered state
+    if (deviceState > USBD_STATE_POWERED) {    
+
+        deviceState = USBD_STATE_POWERED;
+    }
+    if (previousDeviceState > USBD_STATE_POWERED) {
+
+        previousDeviceState = USBD_STATE_POWERED;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Certification test for High Speed device.
+/// \param bIndex Test to be done
+//------------------------------------------------------------------------------
+void USBD_Test( unsigned char bIndex )
+{
+    char          *pFifo;
+    unsigned char i;
+
+    AT91C_BASE_UDPHS->UDPHS_IEN &= ~AT91C_UDPHS_DET_SUSPD; // remove suspend for TEST
+    AT91C_BASE_UDPHS->UDPHS_TST |= AT91C_UDPHS_SPEED_CFG_HS; // force High Speed (remove suspend)
+
+    switch( bIndex ) {
+
+        case USBFeatureRequest_TESTPACKET:
+            TRACE_DEBUG_WP("TEST_PACKET ");
+
+            AT91C_BASE_UDPHS->UDPHS_DMA[1].UDPHS_DMACONTROL = 0;
+            AT91C_BASE_UDPHS->UDPHS_DMA[2].UDPHS_DMACONTROL = 0;
+
+            // Configure endpoint 2, 64 bytes, direction IN, type BULK, 1 bank
+            AT91C_BASE_UDPHS->UDPHS_EPT[2].UDPHS_EPTCFG = AT91C_UDPHS_EPT_SIZE_64 | AT91C_UDPHS_EPT_DIR_IN | AT91C_UDPHS_EPT_TYPE_BUL_EPT | AT91C_UDPHS_BK_NUMBER_1;
+            while( (signed int)(AT91C_BASE_UDPHS->UDPHS_EPT[2].UDPHS_EPTCFG & AT91C_UDPHS_EPT_MAPD) != (signed int)AT91C_UDPHS_EPT_MAPD ) {}
+
+            AT91C_BASE_UDPHS->UDPHS_EPT[2].UDPHS_EPTCTLENB =  AT91C_UDPHS_EPT_ENABL;
+
+            // Write FIFO
+            pFifo = (char*)((unsigned int *)(AT91C_BASE_UDPHS_EPTFIFO->UDPHS_READEPT0) + (EPT_VIRTUAL_SIZE * 2));
+            for( i=0; i<sizeof(test_packet_buffer); i++) {
+                pFifo[i] = test_packet_buffer[i];
+            }
+            // Tst PACKET
+            AT91C_BASE_UDPHS->UDPHS_TST |= AT91C_UDPHS_TST_PKT;
+            // Send packet
+            AT91C_BASE_UDPHS->UDPHS_EPT[2].UDPHS_EPTSETSTA = AT91C_UDPHS_TX_PK_RDY;
+            break;
+
+        case USBFeatureRequest_TESTJ:
+            TRACE_DEBUG_WP("TEST_J ");
+            AT91C_BASE_UDPHS->UDPHS_TST = AT91C_UDPHS_TST_J;
+            break;
+
+        case USBFeatureRequest_TESTK:
+            TRACE_DEBUG_WP("TEST_K ");
+            AT91C_BASE_UDPHS->UDPHS_TST = AT91C_UDPHS_TST_K;
+            break;
+
+        case USBFeatureRequest_TESTSE0NAK:
+            TRACE_DEBUG_WP("TEST_SEO_NAK ");
+            AT91C_BASE_UDPHS->UDPHS_IEN = 0;  // for test
+            break;
+
+        case USBFeatureRequest_TESTSENDZLP:
+            //while( 0 != (AT91C_BASE_UDPHS->UDPHS_EPT[0].UDPHS_EPTSTA & AT91C_UDPHS_TX_PK_RDY ) ) {}
+            AT91C_BASE_UDPHS->UDPHS_EPT[0].UDPHS_EPTSETSTA = AT91C_UDPHS_TX_PK_RDY;
+            //while( 0 != (AT91C_BASE_UDPHS->UDPHS_EPT[0].UDPHS_EPTSTA & AT91C_UDPHS_TX_PK_RDY ) ) {}
+            TRACE_DEBUG_WP("SEND_ZLP ");
+            break;
+    }
+    TRACE_DEBUG_WP("\n\r");
+}
+
+
+//------------------------------------------------------------------------------
+/// Initializes the specified USB driver
+/// This function initializes the current FIFO bank of endpoints,
+/// configures the pull-up and VBus lines, disconnects the pull-up and
+/// then trigger the Init callback.
+//------------------------------------------------------------------------------
+void USBD_Init(void)
+{
+    unsigned char i;
+
+    TRACE_DEBUG_WP("USBD Init()\n\r");
+
+    // Reset endpoint structures
+    UDPHS_ResetEndpoints();
+
+    // Enables the USB Clock
+    UDPHS_EnableUsbClock();
+
+    // Configure the pull-up on D+ and disconnect it
+#if defined(BOARD_USB_PULLUP_INTERNAL)
+    AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_DETACH; // detach
+    AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_PULLD_DIS; // Disable Pull Down
+
+#elif defined(BOARD_USB_PULLUP_INTERNAL_BY_MATRIX)
+    TRACE_DEBUG_WP("PUON 0\n\r");
+    AT91C_BASE_MATRIX->MATRIX_USBPCR &= ~AT91C_MATRIX_USBPCR_PUON;
+
+#elif defined(BOARD_USB_PULLUP_EXTERNAL)
+#ifdef PIN_USB_PULLUP
+    const Pin pinPullUp = PIN_USB_PULLUP;
+    PIO_Configure(&pinPullUp, 1);
+    if (pinPullUp.attribute == PIO_OUTPUT_0) {
+
+        PIO_Clear(&pinPullUp);
+    }
+    else {
+
+        PIO_Set(&pinPullUp);
+    }
+#else
+    #error unsupported now
+#endif
+#elif !defined(BOARD_USB_PULLUP_ALWAYSON)
+    #error Unsupported pull-up type.
+
+#endif
+
+    // Reset and enable IP UDPHS
+    AT91C_BASE_UDPHS->UDPHS_CTRL &= ~AT91C_UDPHS_EN_UDPHS;
+    AT91C_BASE_UDPHS->UDPHS_CTRL |= AT91C_UDPHS_EN_UDPHS;
+    // Enable and disable of the transceiver is automaticaly done by the IP.
+
+    // With OR without DMA !!!
+    // Initialization of DMA
+    for( i=1; i<=((AT91C_BASE_UDPHS->UDPHS_IPFEATURES & AT91C_UDPHS_DMA_CHANNEL_NBR)>>4); i++ ) {
+
+        // RESET endpoint canal DMA:
+        // DMA stop channel command
+        AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMACONTROL = 0;  // STOP command
+
+        // Disable endpoint
+        AT91C_BASE_UDPHS->UDPHS_EPT[i].UDPHS_EPTCTLDIS = AT91C_UDPHS_SHRT_PCKT
+                                                       | AT91C_UDPHS_BUSY_BANK
+                                                       | AT91C_UDPHS_NAK_OUT
+                                                       | AT91C_UDPHS_NAK_IN
+                                                       | AT91C_UDPHS_STALL_SNT
+                                                       | AT91C_UDPHS_RX_SETUP
+                                                       | AT91C_UDPHS_TX_PK_RDY
+                                                       | AT91C_UDPHS_TX_COMPLT
+                                                       | AT91C_UDPHS_RX_BK_RDY
+                                                       | AT91C_UDPHS_ERR_OVFLW
+                                                       | AT91C_UDPHS_MDATA_RX
+                                                       | AT91C_UDPHS_DATAX_RX
+                                                       | AT91C_UDPHS_NYET_DIS
+                                                       | AT91C_UDPHS_INTDIS_DMA
+                                                       | AT91C_UDPHS_AUTO_VALID
+                                                       | AT91C_UDPHS_EPT_DISABL;
+
+        // Clear status endpoint
+        AT91C_BASE_UDPHS->UDPHS_EPT[i].UDPHS_EPTCLRSTA = AT91C_UDPHS_TOGGLESQ
+                                                       | AT91C_UDPHS_FRCESTALL
+                                                       | AT91C_UDPHS_RX_BK_RDY
+                                                       | AT91C_UDPHS_TX_COMPLT
+                                                       | AT91C_UDPHS_RX_SETUP
+                                                       | AT91C_UDPHS_STALL_SNT
+                                                       | AT91C_UDPHS_NAK_IN
+                                                       | AT91C_UDPHS_NAK_OUT;
+
+        // Reset endpoint config
+        AT91C_BASE_UDPHS->UDPHS_EPT[i].UDPHS_EPTCTLENB = 0;
+
+        // Reset DMA channel (Buff count and Control field)
+        AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMACONTROL = AT91C_UDPHS_LDNXT_DSC;  // NON STOP command
+
+        // Reset DMA channel 0 (STOP)
+        AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMACONTROL = 0;  // STOP command
+
+        // Clear DMA channel status (read the register for clear it)
+        AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMASTATUS = AT91C_BASE_UDPHS->UDPHS_DMA[i].UDPHS_DMASTATUS;
+
+    }
+
+    AT91C_BASE_UDPHS->UDPHS_TST = forceUsbFS ? AT91C_UDPHS_SPEED_CFG_FS : 0;
+    AT91C_BASE_UDPHS->UDPHS_IEN = 0;
+    AT91C_BASE_UDPHS->UDPHS_CLRINT = AT91C_UDPHS_UPSTR_RES
+                                   | AT91C_UDPHS_ENDOFRSM
+                                   | AT91C_UDPHS_WAKE_UP
+                                   | AT91C_UDPHS_ENDRESET
+                                   | AT91C_UDPHS_IEN_SOF
+                                   | AT91C_UDPHS_MICRO_SOF
+                                   | AT91C_UDPHS_DET_SUSPD;
+    
+    // Device is in the Attached state
+    deviceState = USBD_STATE_SUSPENDED;
+    previousDeviceState = USBD_STATE_POWERED;
+
+    // Disable interrupts
+    AT91C_BASE_UDPHS->UDPHS_IEN = AT91C_UDPHS_ENDOFRSM
+                                | AT91C_UDPHS_WAKE_UP
+                                | AT91C_UDPHS_DET_SUSPD;
+
+    // Disable USB clocks
+    UDPHS_DisableUsbClock();
+
+    // Configure interrupts
+    USBDCallbacks_Initialized();
+}
+
+//------------------------------------------------------------------------------
+/// Configure USB Speed, should be invoked before USB attachment.
+/// \param forceFS Force to use FS mode.
+//------------------------------------------------------------------------------
+void USBD_ConfigureSpeed(unsigned char forceFS)
+{
+    if (forceFS) {
+        AT91C_BASE_UDPHS->UDPHS_TST |=  AT91C_UDPHS_SPEED_CFG_FS;
+    }
+    else {
+        AT91C_BASE_UDPHS->UDPHS_TST &= ~AT91C_UDPHS_SPEED_CFG_FS;
+    }
+}
+
+
+//------------------------------------------------------------------------------
+/// Returns the current state of the USB device.
+/// \return Device current state.
+//------------------------------------------------------------------------------
+unsigned char USBD_GetState( void )
+{
+    return deviceState;
+}
+
+#endif // BOARD_USB_UDPHS
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/utility/assert.h b/tos/chips/cortex/m3/sam3/u/usb/utility/assert.h
new file mode 100644
index 00000000..ac98b4db
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/utility/assert.h
@@ -0,0 +1,119 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !Purpose
+///
+/// Definition of the ASSERT() and SANITY_CHECK() macros, which are used for
+/// runtime condition & parameter verifying.
+///
+/// !Usage
+///
+/// -# Use ASSERT() in your code to check the value of function parameters,
+///    return values, etc. *Warning:* the ASSERT() condition must not have
+///    any side-effect; otherwise, the program may not work properly
+///    anymore when assertions are disabled.
+/// -# Use SANITY_CHECK() to perform checks with a default error message
+///    (outputs the file and line number where the error occured). This 
+///    reduces memory overhead caused by assertion error strings.
+/// -# Initialize the dbgu to see failed assertions at run-time.
+/// -# Assertions can be entirely disabled by defining the NOASSERT symbol
+///    at compilation time.
+//------------------------------------------------------------------------------
+
+#ifndef ASSERT_H
+#define ASSERT_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <stdio.h>
+#include "trace.h"
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+#if defined(NOASSERT)
+    #define ASSERT(...)
+    #define SANITY_CHECK(...)
+#else
+
+    #if (TRACE_LEVEL == 0)
+        /// Checks that the given condition is true, 
+        /// otherwise stops the program execution.
+        /// \param condition  Condition to verify.
+        #define ASSERT(condition, ...)  { \
+            if (!(condition)) { \
+                while (1); \
+            } \
+        }
+
+        /// Performs the same duty as the ASSERT() macro
+        /// \param condition  Condition to verify.
+        #define SANITY_CHECK(condition) ASSERT(condition, ...)
+
+    #else
+        /// Checks that the given condition is true, otherwise displays an error
+        /// message and stops the program execution.
+        /// \param condition  Condition to verify.
+        #define ASSERT(condition, ...)  { \
+            if (!(condition)) { \
+                printf("-F- ASSERT: "); \
+                printf(__VA_ARGS__); \
+                while (1); \
+            } \
+        }
+        #define SANITY_ERROR            "Sanity check failed at %s:%d\n\r"
+    
+        /// Performs the same duty as the ASSERT() macro, except a default error
+        /// message is output if the condition is false.
+        /// \param condition  Condition to verify.
+        #define SANITY_CHECK(condition) ASSERT(condition, SANITY_ERROR, __FILE__, __LINE__)
+    #endif
+#endif
+
+
+
+
+
+
+
+
+
+
+#endif //#ifndef ASSERT_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/utility/led.c b/tos/chips/cortex/m3/sam3/u/usb/utility/led.c
new file mode 100644
index 00000000..2649491e
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/utility/led.c
@@ -0,0 +1,170 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "led.h"
+#include <board.h>
+#include <pio/pio.h>
+
+//------------------------------------------------------------------------------
+//         Local Variables
+//------------------------------------------------------------------------------
+
+#ifdef PINS_LEDS
+static const Pin pinsLeds[] = {PINS_LEDS};
+static const unsigned int numLeds = PIO_LISTSIZE(pinsLeds);
+#endif
+
+//------------------------------------------------------------------------------
+//         Global Functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Configures the pin associated with the given LED number. If the LED does
+/// not exist on the board, the function does nothing.
+/// \param led  Number of the LED to configure.
+/// \return 1 if the LED exists and has been configured; otherwise 0.
+//------------------------------------------------------------------------------
+unsigned char LED_Configure(unsigned int led)
+{
+#ifdef PINS_LEDS
+    // Check that LED exists
+    if (led >= numLeds) {
+
+        return 0;
+    }
+
+    // Configure LED
+    return (PIO_Configure(&pinsLeds[led], 1));
+#else
+    return 0;
+#endif
+}
+
+//------------------------------------------------------------------------------
+/// Turns the given LED on if it exists; otherwise does nothing.
+/// \param led  Number of the LED to turn on.
+/// \return 1 if the LED has been turned on; 0 otherwise.
+//------------------------------------------------------------------------------
+unsigned char LED_Set(unsigned int led)
+{
+#ifdef PINS_LEDS
+    // Check if LED exists
+    if (led >= numLeds) {
+
+        return 0;
+    }
+
+    // Turn LED on
+    if (pinsLeds[led].type == PIO_OUTPUT_0) {
+
+        PIO_Set(&pinsLeds[led]);
+    }
+    else {
+
+        PIO_Clear(&pinsLeds[led]);
+    }
+
+    return 1;
+#else
+    return 0;
+#endif
+}
+
+//------------------------------------------------------------------------------
+/// Turns a LED off.
+/// \param led  Number of the LED to turn off.
+/// \param 1 if the LED has been turned off; 0 otherwise.
+//------------------------------------------------------------------------------
+unsigned char LED_Clear(unsigned int led)
+{
+#ifdef PINS_LEDS
+    // Check if LED exists
+    if (led >= numLeds) {
+
+        return 0;
+    }
+
+    // Turn LED off
+    if (pinsLeds[led].type == PIO_OUTPUT_0) {
+
+        PIO_Clear(&pinsLeds[led]);
+    }
+    else {
+
+        PIO_Set(&pinsLeds[led]);
+    }
+
+    return 1;
+#else
+    return 0;
+#endif
+}
+
+//------------------------------------------------------------------------------
+/// Toggles the current state of a LED.
+/// \param led  Number of the LED to toggle.
+/// \return 1 if the LED has been toggled; otherwise 0.
+//------------------------------------------------------------------------------
+unsigned char LED_Toggle(unsigned int led)
+{
+#ifdef PINS_LEDS
+    // Check if LED exists
+    if (led >= numLeds) {
+
+        return 0;
+    }
+
+    // Toggle LED
+    if (PIO_GetOutputDataStatus(&pinsLeds[led])) {
+
+        PIO_Clear(&pinsLeds[led]);
+    }
+    else {
+
+        PIO_Set(&pinsLeds[led]);
+    }
+
+    return 1;
+#else
+    return 0;
+#endif
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/utility/led.h b/tos/chips/cortex/m3/sam3/u/usb/utility/led.h
new file mode 100644
index 00000000..37d8ff6e
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/utility/led.h
@@ -0,0 +1,78 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !Purpose
+///
+/// Small set of functions for simple and portable LED usage.
+///
+/// !Usage
+///
+/// -# Configure one or more LEDs using LED_Configure and
+///    LED_ConfigureAll.
+/// -# Set, clear and toggle LEDs using LED_Set, LED_Clear and
+///    LED_Toggle.
+///
+/// LEDs are numbered starting from 0; the number of LEDs depend on the
+/// board being used. All the functions defined here will compile properly
+/// regardless of whether the LED is defined or not; they will simply
+/// return 0 when a LED which does not exist is given as an argument.
+/// Also, these functions take into account how each LED is connected on to
+/// board; thus, <LED_Set> might change the level on the corresponding pin
+/// to 0 or 1, but it will always light the LED on; same thing for the other
+/// methods.
+//------------------------------------------------------------------------------
+
+#ifndef LED_H
+#define LED_H
+
+//------------------------------------------------------------------------------
+//         Global Functions
+//------------------------------------------------------------------------------
+
+extern unsigned char LED_Configure(unsigned int led);
+
+extern unsigned char LED_Set(unsigned int led);
+
+extern unsigned char LED_Clear(unsigned int led);
+
+extern unsigned char LED_Toggle(unsigned int led);
+
+#endif //#ifndef LED_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/utility/stdio.c b/tos/chips/cortex/m3/sam3/u/usb/utility/stdio.c
new file mode 100644
index 00000000..e7e5039e
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/utility/stdio.c
@@ -0,0 +1,520 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * Atmel's name may not be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !Purpose
+///
+/// Implementation of several stdio.h methods, such as printf(), sprintf() and
+/// so on. This reduces the memory footprint of the binary when using those
+/// methods, compared to the libc implementation.
+///
+/// !Usage
+///
+/// Adds stdio.c to the list of file to compile for the project. This will
+/// automatically replace libc methods by the custom ones.
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <stdio.h>
+#include <stdarg.h>
+
+//------------------------------------------------------------------------------
+//         Local Definitions
+//------------------------------------------------------------------------------
+
+// Maximum string size allowed (in bytes).
+#define MAX_STRING_SIZE         100
+
+//------------------------------------------------------------------------------
+//         Global Variables
+//------------------------------------------------------------------------------
+
+// Required for proper compilation.
+struct _reent r = {0, (FILE *) 0, (FILE *) 1, (FILE *) 0};
+struct _reent *_impure_ptr = &r;
+
+//------------------------------------------------------------------------------
+//         Local Functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// Writes a character inside the given string. Returns 1.
+// \param pStr  Storage string.
+// \param c  Character to write.
+//------------------------------------------------------------------------------
+signed int PutChar(char *pStr, char c)
+{
+    *pStr = c;
+    return 1;
+}
+
+//------------------------------------------------------------------------------
+// Writes a string inside the given string.
+// Returns the size of the written
+// string.
+// \param pStr  Storage string.
+// \param pSource  Source string.
+//------------------------------------------------------------------------------
+signed int PutString(char *pStr, const char *pSource)
+{
+    signed int num = 0;
+
+    while (*pSource != 0) {
+
+        *pStr++ = *pSource++;
+        num++;
+    }
+
+    return num;
+}
+
+//------------------------------------------------------------------------------
+// Writes an unsigned int inside the given string, using the provided fill &
+// width parameters.
+// Returns the size in characters of the written integer.
+// \param pStr  Storage string.
+// \param fill  Fill character.
+// \param width  Minimum integer width.
+// \param value  Integer value.
+//------------------------------------------------------------------------------
+signed int PutUnsignedInt(
+    char *pStr,
+    char fill,
+    signed int width,
+    unsigned int value)
+{
+    signed int num = 0;
+
+    // Take current digit into account when calculating width
+    width--;
+
+    // Recursively write upper digits
+    if ((value / 10) > 0) {
+
+        num = PutUnsignedInt(pStr, fill, width, value / 10);
+        pStr += num;
+    }
+    // Write filler characters
+    else {
+
+        while (width > 0) {
+
+            PutChar(pStr, fill);
+            pStr++;
+            num++;
+            width--;
+        }
+    }
+
+    // Write lower digit
+    num += PutChar(pStr, (value % 10) + '0');
+
+    return num;
+}
+
+//------------------------------------------------------------------------------
+// Writes a signed int inside the given string, using the provided fill & width
+// parameters.
+// Returns the size of the written integer.
+// \param pStr  Storage string.
+// \param fill  Fill character.
+// \param width  Minimum integer width.
+// \param value  Signed integer value.
+//------------------------------------------------------------------------------
+signed int PutSignedInt(
+    char *pStr,
+    char fill,
+    signed int width,
+    signed int value)
+{
+    signed int num = 0;
+    unsigned int absolute;
+
+    // Compute absolute value
+    if (value < 0) {
+
+        absolute = -value;
+    }
+    else {
+
+        absolute = value;
+    }
+
+    // Take current digit into account when calculating width
+    width--;
+
+    // Recursively write upper digits
+    if ((absolute / 10) > 0) {
+
+        if (value < 0) {
+        
+            num = PutSignedInt(pStr, fill, width, -(absolute / 10));
+        }
+        else {
+
+            num = PutSignedInt(pStr, fill, width, absolute / 10);
+        }
+        pStr += num;
+    }
+    else {
+
+        // Reserve space for sign
+        if (value < 0) {
+
+            width--;
+        }
+
+        // Write filler characters
+        while (width > 0) {
+
+            PutChar(pStr, fill);
+            pStr++;
+            num++;
+            width--;
+        }
+
+        // Write sign
+        if (value < 0) {
+
+            num += PutChar(pStr, '-');
+            pStr++;
+        }
+    }
+
+    // Write lower digit
+    num += PutChar(pStr, (absolute % 10) + '0');
+
+    return num;
+}
+
+//------------------------------------------------------------------------------
+// Writes an hexadecimal value into a string, using the given fill, width &
+// capital parameters.
+// Returns the number of char written.
+// \param pStr  Storage string.
+// \param fill  Fill character.
+// \param width  Minimum integer width.
+// \param maj  Indicates if the letters must be printed in lower- or upper-case.
+// \param value  Hexadecimal value.
+//------------------------------------------------------------------------------
+signed int PutHexa(
+    char *pStr,
+    char fill,
+    signed int width,
+    unsigned char maj,
+    unsigned int value)
+{
+    signed int num = 0;
+
+    // Decrement width
+    width--;
+
+    // Recursively output upper digits
+    if ((value >> 4) > 0) {
+
+        num += PutHexa(pStr, fill, width, maj, value >> 4);
+        pStr += num;
+    }
+    // Write filler chars
+    else {
+
+        while (width > 0) {
+
+            PutChar(pStr, fill);
+            pStr++;
+            num++;
+            width--;
+        }
+    }
+
+    // Write current digit
+    if ((value & 0xF) < 10) {
+
+        PutChar(pStr, (value & 0xF) + '0');
+    }
+    else if (maj) {
+
+        PutChar(pStr, (value & 0xF) - 10 + 'A');
+    }
+    else {
+
+        PutChar(pStr, (value & 0xF) - 10 + 'a');
+    }
+    num++;
+
+    return num;
+}
+
+//------------------------------------------------------------------------------
+//         Global Functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Stores the result of a formatted string into another string. Format
+/// arguments are given in a va_list instance.
+/// Return the number of characters written.
+/// \param pStr    Destination string.
+/// \param length  Length of Destination string.
+/// \param pFormat Format string.
+/// \param ap      Argument list.
+//------------------------------------------------------------------------------
+signed int vsnprintf(char *pStr, size_t length, const char *pFormat, va_list ap)
+{
+    char          fill;
+    unsigned char width;
+    signed int    num = 0;
+    signed int    size = 0;
+
+    // Clear the string
+    if (pStr) {
+
+        *pStr = 0;
+    }
+
+    // Phase string
+    while (*pFormat != 0 && size < length) {
+
+        // Normal character
+        if (*pFormat != '%') {
+
+            *pStr++ = *pFormat++;
+            size++;
+        }
+        // Escaped '%'
+        else if (*(pFormat+1) == '%') {
+
+            *pStr++ = '%';
+            pFormat += 2;
+            size++;
+        }
+        // Token delimiter
+        else {
+
+            fill = ' ';
+            width = 0;
+            pFormat++;
+
+            // Parse filler
+            if (*pFormat == '0') {
+
+                fill = '0';
+                pFormat++;
+            }
+
+            // Parse width
+            while ((*pFormat >= '0') && (*pFormat <= '9')) {
+        
+                width = (width*10) + *pFormat-'0';
+                pFormat++;
+            }
+
+            // Check if there is enough space
+            if (size + width > length) {
+
+                width = length - size;
+            }
+        
+            // Parse type
+            switch (*pFormat) {
+            case 'd': 
+            case 'i': num = PutSignedInt(pStr, fill, width, va_arg(ap, signed int)); break;
+            case 'u': num = PutUnsignedInt(pStr, fill, width, va_arg(ap, unsigned int)); break;
+            case 'x': num = PutHexa(pStr, fill, width, 0, va_arg(ap, unsigned int)); break;
+            case 'X': num = PutHexa(pStr, fill, width, 1, va_arg(ap, unsigned int)); break;
+            case 's': num = PutString(pStr, va_arg(ap, char *)); break;
+            case 'c': num = PutChar(pStr, va_arg(ap, unsigned int)); break;
+            default:
+                return EOF;
+            }
+
+            pFormat++;
+            pStr += num;
+            size += num;
+        }
+    }
+
+    // NULL-terminated (final \0 is not counted)
+    if (size < length) {
+
+        *pStr = 0;
+    }
+    else {
+
+        *(--pStr) = 0;
+        size--;
+    }
+
+    return size;
+}
+
+//------------------------------------------------------------------------------
+/// Stores the result of a formatted string into another string. Format
+/// arguments are given in a va_list instance.
+/// Return the number of characters written.
+/// \param pString Destination string.
+/// \param length  Length of Destination string.
+/// \param pFormat Format string.
+/// \param ...     Other arguments
+//------------------------------------------------------------------------------
+signed int snprintf(char *pString, size_t length, const char *pFormat, ...)
+{
+    va_list    ap;
+    signed int rc;
+
+    va_start(ap, pFormat);
+    rc = vsnprintf(pString, length, pFormat, ap);
+    va_end(ap);
+
+    return rc;
+}
+
+//------------------------------------------------------------------------------
+/// Stores the result of a formatted string into another string. Format
+/// arguments are given in a va_list instance.
+/// Return the number of characters written.
+/// \param pString  Destination string.
+/// \param pFormat  Format string.
+/// \param ap       Argument list.
+//------------------------------------------------------------------------------
+signed int vsprintf(char *pString, const char *pFormat, va_list ap)
+{
+    return vsnprintf(pString, MAX_STRING_SIZE, pFormat, ap);
+}
+
+//------------------------------------------------------------------------------
+/// Outputs a formatted string on the given stream. Format arguments are given
+/// in a va_list instance.
+/// \param pStream  Output stream.
+/// \param pFormat  Format string
+/// \param ap  Argument list.
+//------------------------------------------------------------------------------
+signed int vfprintf(FILE *pStream, const char *pFormat, va_list ap)
+{
+    char pStr[MAX_STRING_SIZE];
+    char pError[] = "stdio.c: increase MAX_STRING_SIZE\n\r";
+
+    // Write formatted string in buffer
+    if (vsprintf(pStr, pFormat, ap) >= MAX_STRING_SIZE) {
+
+        fputs(pError, stderr);
+        while (1); // Increase MAX_STRING_SIZE
+    }
+
+    // Display string
+    return fputs(pStr, pStream);
+}
+
+//------------------------------------------------------------------------------
+/// Outputs a formatted string on the DBGU stream. Format arguments are given
+/// in a va_list instance.
+/// \param pFormat  Format string
+/// \param ap  Argument list.
+//------------------------------------------------------------------------------
+signed int vprintf(const char *pFormat, va_list ap)
+{
+    return vfprintf(stdout, pFormat, ap);
+}
+
+//------------------------------------------------------------------------------
+/// Outputs a formatted string on the given stream, using a variable number of
+/// arguments.
+/// \param pStream  Output stream.
+/// \param pFormat  Format string.
+//------------------------------------------------------------------------------
+signed int fprintf(FILE *pStream, const char *pFormat, ...)
+{
+    va_list ap;
+    signed int result;
+
+    // Forward call to vfprintf
+    va_start(ap, pFormat);
+    result = vfprintf(pStream, pFormat, ap);
+    va_end(ap);
+
+    return result;
+}
+
+//------------------------------------------------------------------------------
+/// Outputs a formatted string on the DBGU stream, using a variable number of
+/// arguments.
+/// \param pFormat  Format string.
+//------------------------------------------------------------------------------
+signed int printf(const char *pFormat, ...)
+{
+    va_list ap;
+    signed int result;
+
+    // Forward call to vprintf
+    va_start(ap, pFormat);
+    result = vprintf(pFormat, ap);
+    va_end(ap);
+
+    return result;
+}
+
+//------------------------------------------------------------------------------
+/// Writes a formatted string inside another string.
+/// \param pStr  Storage string.
+/// \param pFormat  Format string.
+//------------------------------------------------------------------------------
+signed int sprintf(char *pStr, const char *pFormat, ...)
+{
+    va_list ap;
+    signed int result;
+
+    // Forward call to vsprintf
+    va_start(ap, pFormat);
+    result = vsprintf(pStr, pFormat, ap);
+    va_end(ap);
+
+    return result;
+}
+
+//------------------------------------------------------------------------------
+/// Outputs a string on stdout.
+/// \param pStr  String to output.
+//------------------------------------------------------------------------------
+signed int puts(const char *pStr)
+{
+    return fputs(pStr, stdout);
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/utility/string.c b/tos/chips/cortex/m3/sam3/u/usb/utility/string.c
new file mode 100644
index 00000000..c0505028
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/utility/string.c
@@ -0,0 +1,244 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !Purpose
+///
+/// Implementation of several methods defined in string.h, for reducing the
+/// memory footprint when using them (since the whole libc.o file gets included
+/// even when using a single method).
+///
+/// !Usage
+///
+/// Add string.c to the list of files to compile for the project. This will
+/// automatically replace standard libc methods by the custom ones.
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <string.h>
+
+//------------------------------------------------------------------------------
+//         Global Functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Copies data from a source buffer into a destination buffer. The two buffers
+/// must NOT overlap. Returns the destination buffer.
+/// \param pDestination  Destination buffer.
+/// \param pSource  Source buffer.
+/// \param num  Number of bytes to copy.
+//------------------------------------------------------------------------------
+void * memcpy(void *pDestination, const void *pSource, size_t num)
+{
+    unsigned char *pByteDestination;
+    unsigned char *pByteSource;
+    unsigned int *pAlignedSource = (unsigned int *) pSource;
+    unsigned int *pAlignedDestination = (unsigned int *) pDestination;
+
+    // If num is more than 4 bytes, and both dest. and source are aligned,
+    // then copy dwords
+    if ((((unsigned int) pAlignedDestination & 0x3) == 0)
+        && (((unsigned int) pAlignedSource & 0x3) == 0)
+        && (num >= 4)) {
+
+        while (num >= 4) {
+
+            *pAlignedDestination++ = *pAlignedSource++;
+            num -= 4;
+        }
+    }
+
+    // Copy remaining bytes
+    pByteDestination = (unsigned char *) pAlignedDestination;
+    pByteSource = (unsigned char *) pAlignedSource;
+    while (num--) {
+
+        *pByteDestination++ = *pByteSource++;
+    }
+
+    return pDestination;
+}
+
+//------------------------------------------------------------------------------
+/// Fills a memory region with the given value. Returns a pointer to the
+/// memory region.
+/// \param pBuffer  Pointer to the start of the memory region to fill
+/// \param value    Value to fill the region with
+/// \param num      Size to fill in bytes
+//------------------------------------------------------------------------------
+void * memset(void *pBuffer, int value, size_t num)
+{
+    unsigned char *pByteDestination;
+    unsigned int  *pAlignedDestination = (unsigned int *) pBuffer;
+    unsigned int  alignedValue = (value << 24) | (value << 16) | (value << 8) | value;
+
+    // Set words if possible
+    if ((((unsigned int) pAlignedDestination & 0x3) == 0) && (num >= 4)) {
+        while (num >= 4) {
+            *pAlignedDestination++ = alignedValue;
+            num -= 4;
+        }
+    }
+    // Set remaining bytes
+    pByteDestination = (unsigned char *) pAlignedDestination;
+    while (num--) {
+        *pByteDestination++ = value;
+    }
+    return pBuffer;
+}
+
+//-----------------------------------------------------------------------------
+/// Search a character in the given string.
+/// Returns a pointer to the character location.
+/// \param pString   Pointer to the start of the string to search.
+/// \param character The character to find.
+//-----------------------------------------------------------------------------
+char * strchr(const char *pString, int character)
+{
+    char * p = (char *)pString;
+    char   c = character & 0xFF;
+
+    while(*p != c) {
+        if (*p == 0) {
+            return 0;
+        }
+        p++;
+    }
+    return p;
+}
+
+//-----------------------------------------------------------------------------
+/// Return the length of a given string
+/// \param pString Pointer to the start of the string.
+//-----------------------------------------------------------------------------
+size_t strlen(const char *pString)
+{
+    unsigned int length = 0;
+
+    while(*pString++ != 0) {
+        length++;
+    }
+    return length;
+}
+
+
+//-----------------------------------------------------------------------------
+/// Search a character backword from the end of given string.
+/// Returns a pointer to the character location.
+/// \param pString   Pointer to the start of the string to search.
+/// \param character The character to find.
+//-----------------------------------------------------------------------------
+char * strrchr(const char *pString, int character)
+{
+    char *p = 0;
+
+    while(*pString != 0) {
+        if (*pString++ == character) {
+            p = (char*)pString;
+        }
+    }
+    return p;
+}
+
+//-----------------------------------------------------------------------------
+/// Copy from source string to destination string
+/// Return a pointer to the destination string
+/// \param pDestination Pointer to the destination string.
+/// \param pSource      Pointer to the source string.
+//-----------------------------------------------------------------------------
+char * strcpy(char *pDestination, const char *pSource)
+{
+    char *pSaveDest = pDestination;
+
+    for(; (*pDestination = *pSource) != 0; ++pSource, ++pDestination);
+    return pSaveDest;
+}
+
+//-----------------------------------------------------------------------------
+/// Compare the first specified bytes of 2 given strings
+/// Return 0 if equals
+/// Return >0 if 1st string > 2nd string
+/// Return <0 if 1st string < 2nd string
+/// \param pString1 Pointer to the start of the 1st string.
+/// \param pString2 Pointer to the start of the 2nd string.
+/// \param count    Number of bytes that should be compared.
+//-----------------------------------------------------------------------------
+int strncmp(const char *pString1, const char *pString2, size_t count)
+{
+    int r;
+
+    while(count) {
+        r = *pString1 - *pString2;
+        if (r == 0) {
+            if (*pString1 == 0) {
+                break;
+            }
+            pString1++;
+            pString2++;
+            count--;
+            continue;
+        }
+        return r;
+    }
+    return 0;
+}
+
+//-----------------------------------------------------------------------------
+/// Copy the first number of bytes from source string to destination string
+/// Return the pointer to the destination string.
+/// \param pDestination Pointer to the start of destination string.
+/// \param pSource      Pointer to the start of the source string.
+/// \param count        Number of bytes that should be copied.
+//-----------------------------------------------------------------------------
+char * strncpy(char *pDestination, const char *pSource, size_t count)
+{
+    char *pSaveDest = pDestination;
+
+    while (count) {
+        *pDestination = *pSource;
+        if (*pSource == 0) {
+            break;
+        }
+        pDestination++;
+        pSource++;
+        count--;
+    }
+    return pSaveDest;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/utility/trace.c b/tos/chips/cortex/m3/sam3/u/usb/utility/trace.c
new file mode 100644
index 00000000..3e4923d2
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/utility/trace.c
@@ -0,0 +1,304 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include "trace.h"
+
+//------------------------------------------------------------------------------
+//         Internal variables
+//------------------------------------------------------------------------------
+
+/// Trace level can be set at applet initialization
+#if !defined(NOTRACE) && (DYN_TRACES == 1)
+    unsigned int traceLevel = TRACE_LEVEL;
+#endif
+  
+#ifndef NOFPUT
+#include <stdio.h>
+#include <stdarg.h>
+
+//------------------------------------------------------------------------------
+/// \exclude
+/// Implementation of fputc using the DBGU as the standard output. Required
+/// for printf().
+/// \param c  Character to write.
+/// \param pStream  Output stream.
+/// \param The character written if successful, or -1 if the output stream is
+/// not stdout or stderr.
+//------------------------------------------------------------------------------
+signed int fputc(signed int c, FILE *pStream)
+{
+    if ((pStream == stdout) || (pStream == stderr)) {
+
+        TRACE_PutChar(c);
+        return c;
+    }
+    else {
+
+        return EOF;
+    }
+}
+
+//------------------------------------------------------------------------------
+/// \exclude
+/// Implementation of fputs using the DBGU as the standard output. Required
+/// for printf(). Does NOT currently use the PDC.
+/// \param pStr  String to write.
+/// \param pStream  Output stream.
+/// \return Number of characters written if successful, or -1 if the output
+/// stream is not stdout or stderr.
+//------------------------------------------------------------------------------
+signed int fputs(const char *pStr, FILE *pStream)
+{
+    signed int num = 0;
+
+    while (*pStr != 0) {
+
+        if (fputc(*pStr, pStream) == -1) {
+
+            return -1;
+        }
+        num++;
+        pStr++;
+    }
+
+    return num;
+}
+
+#undef putchar
+
+//------------------------------------------------------------------------------
+/// \exclude
+/// Outputs a character on the DBGU.
+/// \param c  Character to output.
+/// \return The character that was output.
+//------------------------------------------------------------------------------
+signed int putchar(signed int c)
+{
+    return fputc(c, stdout);
+}
+
+#endif //#ifndef NOFPUT
+
+//------------------------------------------------------------------------------
+//         Local Functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Print char if printable. If not print a point
+/// \param c char to
+//------------------------------------------------------------------------------
+static void PrintChar(unsigned char c)
+{
+    if( (/*c >= 0x00 &&*/ c <= 0x1F) ||
+        (c >= 0xB0 && c <= 0xDF) ) {
+
+       printf(".");
+    }
+    else {
+
+       printf("%c", c);
+    }
+}
+
+//------------------------------------------------------------------------------
+//         Global Functions
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Displays the content of the given frame on the Trace interface.
+/// \param pBuffer  Pointer to the frame to dump.
+/// \param size  Buffer size in bytes.
+//------------------------------------------------------------------------------
+void TRACE_DumpFrame(unsigned char *pFrame, unsigned int size)
+{
+    unsigned int i;
+
+    for (i=0; i < size; i++) {
+        printf("%02X ", pFrame[i]);
+    }
+
+    printf("\n\r");
+}
+
+//------------------------------------------------------------------------------
+/// Displays the content of the given buffer on the Trace interface.
+/// \param pBuffer  Pointer to the buffer to dump.
+/// \param size     Buffer size in bytes.
+/// \param address  Start address to display
+//------------------------------------------------------------------------------
+void TRACE_DumpMemory(
+    unsigned char *pBuffer,
+    unsigned int size,
+    unsigned int address
+    )
+{
+    unsigned int i, j;
+    unsigned int lastLineStart;
+    unsigned char* pTmp;
+
+    for (i=0; i < (size / 16); i++) {
+
+        printf("0x%08X: ", address + (i*16));
+        pTmp = (unsigned char*)&pBuffer[i*16];
+        for (j=0; j < 4; j++) {
+            printf("%02X%02X%02X%02X ", pTmp[0],pTmp[1],pTmp[2],pTmp[3]);
+            pTmp += 4;
+        }
+
+        pTmp = (unsigned char*)&pBuffer[i*16];
+        for (j=0; j < 16; j++) {
+            PrintChar(*pTmp++);
+        }
+
+        printf("\n\r");
+    }
+
+    if( (size%16) != 0) {
+        lastLineStart = size - (size%16);
+        printf("0x%08X: ", address + lastLineStart);
+
+        for (j= lastLineStart; j < lastLineStart+16; j++) {
+
+            if( (j!=lastLineStart) && (j%4 == 0) ) {
+                printf(" ");
+            }
+            if(j<size) {
+                printf("%02X", pBuffer[j]);
+            }
+            else {
+                printf("  ");
+            }
+        }
+
+        printf(" ");
+        for (j= lastLineStart; j <size; j++) {
+            PrintChar(pBuffer[j]);
+        }
+
+        printf("\n\r");
+    }
+}
+    
+//------------------------------------------------------------------------------
+/// Reads an integer
+//------------------------------------------------------------------------------
+unsigned char TRACE_GetInteger(unsigned int *pValue)
+{
+    unsigned char key;
+    unsigned char nbNb = 0;
+    unsigned int value = 0;
+    while(1) {
+        key = TRACE_GetChar();
+        TRACE_PutChar(key);
+        if(key >= '0' &&  key <= '9' ) {
+            value = (value * 10) + (key - '0');
+            nbNb++;
+        }
+        else if(key == 0x0D || key == ' ') {
+            if(nbNb == 0) {
+                printf("\n\rWrite a number and press ENTER or SPACE!\n\r");       
+                return 0; 
+            } else {
+                printf("\n\r"); 
+                *pValue = value;
+                return 1;
+            }
+        } else {
+            printf("\n\r'%c' not a number!\n\r", key);
+            return 0;  
+        }
+    }
+}
+
+//------------------------------------------------------------------------------
+/// Reads an integer and check the value
+//------------------------------------------------------------------------------
+unsigned char TRACE_GetIntegerMinMax(
+    unsigned int *pValue, 
+    unsigned int min, 
+    unsigned int max
+    )
+{
+    unsigned int value = 0;
+
+    if( TRACE_GetInteger(&value) == 0) {
+        return 0;
+    }
+    
+    if(value < min || value > max) {
+        printf("\n\rThe number have to be between %d and %d\n\r", min, max);
+        return 0; 
+    }
+
+    printf("\n\r"); 
+    *pValue = value;
+    return 1;
+}
+
+//------------------------------------------------------------------------------
+/// Reads an hexadecimal number
+//------------------------------------------------------------------------------
+unsigned char TRACE_GetHexa32(unsigned int *pValue)
+{
+    unsigned char key;
+    unsigned int i = 0;
+    unsigned int value = 0;
+    for(i = 0; i < 8; i++) {
+        key = TRACE_GetChar();
+        TRACE_PutChar(key);
+        if(key >= '0' &&  key <= '9' ) {
+            value = (value * 16) + (key - '0');
+        }
+        else if(key >= 'A' &&  key <= 'F' ) {
+            value = (value * 16) + (key - 'A' + 10) ;
+        }
+        else if(key >= 'a' &&  key <= 'f' ) {
+            value = (value * 16) + (key - 'a' + 10) ;
+        }        
+        else {
+            printf("\n\rIt is not a hexa character!\n\r");       
+            return 0; 
+        }
+    }
+
+    printf("\n\r");    
+    *pValue = value;     
+    return 1;
+}
+
diff --git a/tos/chips/cortex/m3/sam3/u/usb/utility/trace.h b/tos/chips/cortex/m3/sam3/u/usb/utility/trace.h
new file mode 100644
index 00000000..de97a16d
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/usb/utility/trace.h
@@ -0,0 +1,350 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support 
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2008, Atmel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+//------------------------------------------------------------------------------
+/// \unit
+///
+/// !Purpose
+///
+/// Standard output methods for reporting debug information, warnings and
+/// errors, which can be easily be turned on/off.
+///
+/// !Usage
+/// -# Initialize the DBGU using TRACE_CONFIGURE() if you intend to eventually
+///    disable ALL traces; otherwise use DBGU_Configure().
+/// -# Uses the TRACE_DEBUG(), TRACE_INFO(), TRACE_WARNING(), TRACE_ERROR()
+///    TRACE_FATAL() macros to output traces throughout the program.
+/// -# Each type of trace has a level : Debug 5, Info 4, Warning 3, Error 2
+///    and Fatal 1. Disable a group of traces by changing the value of 
+///    TRACE_LEVEL during compilation; traces with a level bigger than TRACE_LEVEL 
+///    are not generated. To generate no trace, use the reserved value 0.
+/// -# Trace disabling can be static or dynamic. If dynamic disabling is selected
+///    the trace level can be modified in runtime. If static disabling is selected
+///    the disabled traces are not compiled.
+///
+/// !Trace level description
+/// -# TRACE_DEBUG (5): Traces whose only purpose is for debugging the program, 
+///    and which do not produce meaningful information otherwise.
+/// -# TRACE_INFO (4): Informational trace about the program execution. Should  
+///    enable the user to see the execution flow.
+/// -# TRACE_WARNING (3): Indicates that a minor error has happened. In most case
+///    it can be discarded safely; it may even be expected.
+/// -# TRACE_ERROR (2): Indicates an error which may not stop the program execution, 
+///    but which indicates there is a problem with the code.
+/// -# TRACE_FATAL (1): Indicates a major error which prevents the program from going
+///    any further.
+
+//------------------------------------------------------------------------------
+
+#ifndef TRACE_H
+#define TRACE_H
+
+//------------------------------------------------------------------------------
+//         Headers
+//------------------------------------------------------------------------------
+
+#include <board.h>
+#include <pio/pio.h>
+#include <stdio.h>
+
+// Select the trace interface
+// (add usart.o file in makefile if Usart interface is selected)
+#define TRACE_DBGU 1
+//#define TRACE_USART_0 1
+//#define TRACE_USART_1 1
+//#define TRACE_USART_2 1
+
+#if defined(TRACE_DBGU)
+#include <dbgu/dbgu.h>
+#else
+#include <usart/usart.h>
+#endif
+
+//------------------------------------------------------------------------------
+//         Global Definitions
+//------------------------------------------------------------------------------
+
+/// Softpack Version
+#define SOFTPACK_VERSION "1.6"
+
+#define TRACE_LEVEL_DEBUG      5
+#define TRACE_LEVEL_INFO       4
+#define TRACE_LEVEL_WARNING    3
+#define TRACE_LEVEL_ERROR      2
+#define TRACE_LEVEL_FATAL      1
+#define TRACE_LEVEL_NO_TRACE   0
+
+// By default, all traces are output except the debug one.
+#if !defined(TRACE_LEVEL)    
+#define TRACE_LEVEL TRACE_LEVEL_INFO
+#endif
+
+// By default, trace level is static (not dynamic)
+#if !defined(DYN_TRACES)
+#define DYN_TRACES 0
+#endif
+
+#if defined(NOTRACE)
+#error "Error: NOTRACE has to be not defined !"
+#endif
+
+#undef NOTRACE
+#if (DYN_TRACES==0)
+    #if (TRACE_LEVEL == TRACE_LEVEL_NO_TRACE)
+        #define NOTRACE
+    #endif
+#endif
+
+//------------------------------------------------------------------------------
+//         Global Macros
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+/// Initializes the trace for normal project
+/// \param mode  DBGU mode.
+/// \param baudrate  DBGU baudrate.
+/// \param mck  Master clock frequency.
+//------------------------------------------------------------------------------
+#if defined(TRACE_DBGU)
+    #define TRACE_CONFIGURE(mode, baudrate, mck) { \
+        const Pin pinsDbgu[] = {PINS_DBGU}; \
+        PIO_Configure(pinsDbgu, PIO_LISTSIZE(pinsDbgu)); \
+        DBGU_Configure(mode, baudrate, mck); \
+    }
+#elif defined(TRACE_USART_0)
+    #define TRACE_CONFIGURE(mode, baudrate, mck) { \
+        const Pin pinsUsart[] = {PIN_USART0_TXD, PIN_USART0_RXD}; \
+        AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US0;\
+        AT91C_BASE_US0->US_IDR = 0xFFFFFFFF;\
+        PIO_Configure(pinsUsart, PIO_LISTSIZE(pinsUsart)); \
+        USART_Configure(AT91C_BASE_US0,USART_MODE_ASYNCHRONOUS, baudrate, mck); \
+        USART_SetTransmitterEnabled(AT91C_BASE_US0,1);\
+        USART_SetReceiverEnabled(AT91C_BASE_US0,1);\
+    }
+#elif defined(TRACE_USART_1)
+    #define TRACE_CONFIGURE(mode, baudrate, mck) { \
+        const Pin pinsUsart[] = {PIN_USART1_TXD, PIN_USART1_RXD}; \
+        AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US1;\
+        AT91C_BASE_US1->US_IDR = 0xFFFFFFFF;\
+        PIO_Configure(pinsUsart, PIO_LISTSIZE(pinsUsart)); \
+        USART_Configure(AT91C_BASE_US1,USART_MODE_ASYNCHRONOUS, baudrate, mck); \
+        USART_SetTransmitterEnabled(AT91C_BASE_US1,1);\
+        USART_SetReceiverEnabled(AT91C_BASE_US1,1);\
+    }
+#elif defined(TRACE_USART_2)
+    #define TRACE_CONFIGURE(mode, baudrate, mck) { \
+        const Pin pinsUsart[] = {PIN_USART2_TXD, PIN_USART2_RXD}; \
+        AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US2;\
+        AT91C_BASE_US2->US_IDR = 0xFFFFFFFF;\
+        PIO_Configure(pinsUsart, PIO_LISTSIZE(pinsUsart)); \
+        USART_Configure(AT91C_BASE_US2,USART_MODE_ASYNCHRONOUS, baudrate, mck); \
+        USART_SetTransmitterEnabled(AT91C_BASE_US2,1);\
+        USART_SetReceiverEnabled(AT91C_BASE_US2,1);\
+    }
+#endif
+
+//------------------------------------------------------------------------------
+/// Initializes the trace for ISP project
+/// \param mode  DBGU mode.
+/// \param baudrate  DBGU baudrate.
+/// \param mck  Master clock frequency.
+//------------------------------------------------------------------------------
+#if (TRACE_LEVEL==0) && (DYN_TRACES==0)
+    #define TRACE_CONFIGURE_ISP(mode, baudrate, mck) {}
+#elif defined(TRACE_DBGU)
+    #define TRACE_CONFIGURE_ISP(mode, baudrate, mck) { \
+        const Pin pinsDbgu[] = {PINS_DBGU}; \
+        PIO_Configure(pinsDbgu, PIO_LISTSIZE(pinsDbgu)); \
+        DBGU_Configure(mode, baudrate, mck); \
+    }
+#elif defined(TRACE_USART_0)
+    #define TRACE_CONFIGURE_ISP(mode, baudrate, mck) { \
+        const Pin pinsUsart[] = {PIN_USART0_TXD, PIN_USART0_RXD}; \
+        AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US0;\
+        AT91C_BASE_US0->US_IDR = 0xFFFFFFFF;\
+        PIO_Configure(pinsUsart, PIO_LISTSIZE(pinsUsart)); \
+        USART_Configure(AT91C_BASE_US0,USART_MODE_ASYNCHRONOUS, baudrate, mck); \
+        USART_SetTransmitterEnabled(AT91C_BASE_US0,1);\
+        USART_SetReceiverEnabled(AT91C_BASE_US0,1);\
+    }
+#elif defined(TRACE_USART_1)
+    #define TRACE_CONFIGURE_ISP(mode, baudrate, mck) { \
+        const Pin pinsUsart[] = {PIN_USART1_TXD, PIN_USART1_RXD}; \
+        AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US1;\
+        AT91C_BASE_US1->US_IDR = 0xFFFFFFFF;\
+        PIO_Configure(pinsUsart, PIO_LISTSIZE(pinsUsart)); \
+        USART_Configure(AT91C_BASE_US1,USART_MODE_ASYNCHRONOUS, baudrate, mck); \
+        USART_SetTransmitterEnabled(AT91C_BASE_US1,1);\
+        USART_SetReceiverEnabled(AT91C_BASE_US1,1);\
+    }
+#elif defined(TRACE_USART_2)
+    #define TRACE_CONFIGURE_ISP(mode, baudrate, mck) { \
+        const Pin pinsUsart[] = {PIN_USART2_TXD, PIN_USART2_RXD}; \
+        AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US2;\
+        AT91C_BASE_US2->US_IDR = 0xFFFFFFFF;\
+        PIO_Configure(pinsUsart, PIO_LISTSIZE(pinsUsart)); \
+        USART_Configure(AT91C_BASE_US2,USART_MODE_ASYNCHRONOUS, baudrate, mck); \
+        USART_SetTransmitterEnabled(AT91C_BASE_US2,1);\
+        USART_SetReceiverEnabled(AT91C_BASE_US2,1);\
+    }
+#endif
+
+//------------------------------------------------------------------------------
+/// Macros TRACE_PutChar & TRACE_GetChar & TRACE_IsRxReady
+//------------------------------------------------------------------------------
+#if defined(TRACE_DBGU)    
+    #define TRACE_PutChar(c)  DBGU_PutChar(c)
+    #define TRACE_GetChar()   DBGU_GetChar()
+    #define TRACE_IsRxReady() DBGU_IsRxReady()
+#elif defined(TRACE_USART_0)
+    #define TRACE_PutChar(c)  USART_PutChar(AT91C_BASE_US0, c)
+    #define TRACE_GetChar()   USART_GetChar(AT91C_BASE_US0)
+    #define TRACE_IsRxReady() USART_IsRxReady(AT91C_BASE_US0)
+#elif defined(TRACE_USART_1)
+    #define TRACE_PutChar(c)  USART_PutChar(AT91C_BASE_US1, c)
+    #define TRACE_GetChar()   USART_GetChar(AT91C_BASE_US1)
+    #define TRACE_IsRxReady() USART_IsRxReady(AT91C_BASE_US1)
+#elif defined(TRACE_USART_2)
+    #define TRACE_PutChar(c)  USART_PutChar(AT91C_BASE_US2, c)
+    #define TRACE_GetChar()   USART_GetChar(AT91C_BASE_US2)
+    #define TRACE_IsRxReady() USART_IsRxReady(AT91C_BASE_US2)
+#endif
+
+//------------------------------------------------------------------------------
+/// Outputs a formatted string using <printf> if the log level is high
+/// enough. Can be disabled by defining TRACE_LEVEL=0 during compilation.
+/// \param format  Formatted string to output.
+/// \param ...  Additional parameters depending on formatted string.
+//------------------------------------------------------------------------------
+#if defined(NOTRACE)
+
+// Empty macro
+#define TRACE_DEBUG(...)      { }
+#define TRACE_INFO(...)       { }
+#define TRACE_WARNING(...)    { }               
+#define TRACE_ERROR(...)      { }
+#define TRACE_FATAL(...)      { while(1); }
+
+#define TRACE_DEBUG_WP(...)   { }
+#define TRACE_INFO_WP(...)    { }
+#define TRACE_WARNING_WP(...) { }
+#define TRACE_ERROR_WP(...)   { }
+#define TRACE_FATAL_WP(...)   { while(1); }
+
+#elif (DYN_TRACES == 1)
+
+// Trace output depends on traceLevel value
+#define TRACE_DEBUG(...)      { if (traceLevel >= TRACE_LEVEL_DEBUG)   { printf("-D- " __VA_ARGS__); } }
+#define TRACE_INFO(...)       { if (traceLevel >= TRACE_LEVEL_INFO)    { printf("-I- " __VA_ARGS__); } }
+#define TRACE_WARNING(...)    { if (traceLevel >= TRACE_LEVEL_WARNING) { printf("-W- " __VA_ARGS__); } }
+#define TRACE_ERROR(...)      { if (traceLevel >= TRACE_LEVEL_ERROR)   { printf("-E- " __VA_ARGS__); } }
+#define TRACE_FATAL(...)      { if (traceLevel >= TRACE_LEVEL_FATAL)   { printf("-F- " __VA_ARGS__); while(1); } }
+
+#define TRACE_DEBUG_WP(...)   { if (traceLevel >= TRACE_LEVEL_DEBUG)   { printf(__VA_ARGS__); } }
+#define TRACE_INFO_WP(...)    { if (traceLevel >= TRACE_LEVEL_INFO)    { printf(__VA_ARGS__); } }
+#define TRACE_WARNING_WP(...) { if (traceLevel >= TRACE_LEVEL_WARNING) { printf(__VA_ARGS__); } }
+#define TRACE_ERROR_WP(...)   { if (traceLevel >= TRACE_LEVEL_ERROR)   { printf(__VA_ARGS__); } }
+#define TRACE_FATAL_WP(...)   { if (traceLevel >= TRACE_LEVEL_FATAL)   { printf(__VA_ARGS__); while(1); } }
+
+#else
+
+// Trace compilation depends on TRACE_LEVEL value
+#if (TRACE_LEVEL >= TRACE_LEVEL_DEBUG)
+#define TRACE_DEBUG(...)      { printf("-D- " __VA_ARGS__); }
+#define TRACE_DEBUG_WP(...)   { printf(__VA_ARGS__); }
+#else
+#define TRACE_DEBUG(...)      { }
+#define TRACE_DEBUG_WP(...)   { }
+#endif
+
+#if (TRACE_LEVEL >= TRACE_LEVEL_INFO)
+#define TRACE_INFO(...)       { printf("-I- " __VA_ARGS__); }
+#define TRACE_INFO_WP(...)    { printf(__VA_ARGS__); }
+#else
+#define TRACE_INFO(...)       { }
+#define TRACE_INFO_WP(...)    { }
+#endif
+
+#if (TRACE_LEVEL >= TRACE_LEVEL_WARNING)
+#define TRACE_WARNING(...)    { printf("-W- " __VA_ARGS__); }
+#define TRACE_WARNING_WP(...) { printf(__VA_ARGS__); }
+#else
+#define TRACE_WARNING(...)    { }
+#define TRACE_WARNING_WP(...) { }
+#endif
+
+#if (TRACE_LEVEL >= TRACE_LEVEL_ERROR)
+#define TRACE_ERROR(...)      { printf("-E- " __VA_ARGS__); }
+#define TRACE_ERROR_WP(...)   { printf(__VA_ARGS__); }
+#else
+#define TRACE_ERROR(...)      { }
+#define TRACE_ERROR_WP(...)   { }
+#endif
+
+#if (TRACE_LEVEL >= TRACE_LEVEL_FATAL)
+#define TRACE_FATAL(...)      { printf("-F- " __VA_ARGS__); while(1); }
+#define TRACE_FATAL_WP(...)   { printf(__VA_ARGS__); while(1); }
+#else
+#define TRACE_FATAL(...)      { while(1); }
+#define TRACE_FATAL_WP(...)   { while(1); }
+#endif
+
+#endif
+
+
+//------------------------------------------------------------------------------
+//         Exported variables
+//------------------------------------------------------------------------------
+// Depending on DYN_TRACES, traceLevel is a modifable runtime variable
+// or a define
+#if !defined(NOTRACE) && (DYN_TRACES == 1)
+    extern unsigned int traceLevel;
+#endif
+
+//------------------------------------------------------------------------------
+//         Global Functions
+//------------------------------------------------------------------------------
+
+extern void          TRACE_DumpFrame(unsigned char *pFrame, unsigned int size);
+
+extern void          TRACE_DumpMemory(unsigned char *pBuffer, unsigned int size, unsigned int address);
+
+extern unsigned char TRACE_GetInteger(unsigned int *pValue);
+
+extern unsigned char TRACE_GetIntegerMinMax(unsigned int *pValue, unsigned int min, unsigned int max);
+
+extern unsigned char TRACE_GetHexa32(unsigned int *pValue);
+
+#endif //#ifndef TRACE_H
+
diff --git a/tos/chips/cortex/m3/sam3/u/wdtc/sam3wdtchardware.h b/tos/chips/cortex/m3/sam3/u/wdtc/sam3wdtchardware.h
new file mode 100644
index 00000000..48554aea
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/u/wdtc/sam3wdtchardware.h
@@ -0,0 +1,48 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Watchdog Timer register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef _SAM3UWDTCHARDWARE_H
+#define _SAM3UWDTCHARDWARE_H
+
+#include "wdtchardware.h"
+
+/**
+ * Memory mapping for the WDTC
+ */
+volatile wdtc_t* WDTC = (volatile wdtc_t *) 0x400E1250; // WDTC Base Address
+
+#endif // _SAM3UWDTCHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/uart/HilSam3UartP.nc b/tos/chips/cortex/m3/sam3/uart/HilSam3UartP.nc
new file mode 100644
index 00000000..4de569af
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/uart/HilSam3UartP.nc
@@ -0,0 +1,278 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * UART implementation for the SAM3U chip. Does not use DMA (PDC) at this
+ * point, but does use IRQs for operation.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#include "sam3uarthardware.h"
+
+module HilSam3UartP
+{
+	provides
+	{
+		interface Init;
+		interface StdControl;
+		interface UartByte;
+		interface UartStream;
+	}
+	uses
+	{
+		interface HplSam3UartControl;
+		interface HplSam3UartInterrupts;
+		interface HplSam3UartStatus;
+		interface HplSam3UartConfig;
+		interface HplNVICInterruptCntl as UartIrqControl;
+		interface HplSam3GeneralIOPin as UartPin1;
+		interface HplSam3GeneralIOPin as UartPin2;
+		interface HplSam3PeripheralClockCntl as UartClockControl;
+		interface HplSam3Clock as ClockConfig;
+	}
+}
+implementation
+{
+	uint8_t *receiveBuffer; // pointer to current receive buffer or 0 if none
+	uint16_t receiveBufferLength; // length of the current receive buffer
+	uint16_t receiveBufferPosition; // position of the next character to receive in the buffer
+
+	uint8_t *transmitBuffer; // pointer to current transmit buffer or 0 if none
+	uint16_t transmitBufferLength; // length of the current transmit buffer
+	uint16_t transmitBufferPosition; // position of the next character to transmit from the buffer
+
+	void setClockDivisor()
+	{
+		uint32_t mck;
+		uint16_t cd;
+
+		mck = call ClockConfig.getMainClockSpeed(); // in kHz (e.g., 48,000)
+
+		// set to 9,600 baud
+		// baudrate = mck / (cd * 16)
+		// cd = mck / (16 * baudrate)
+		// here: cd = mck / 16 * 1000 / baudrate
+		cd = (uint16_t) (((mck / 16) * 1000) / PLATFORM_BAUDRATE);
+
+		//call HplSam3UartConfig.setClockDivisor(312); // 9,600 baud with MCK = 48 MHz
+		call HplSam3UartConfig.setClockDivisor(cd);
+	}
+
+	command error_t Init.init()
+	{
+		// turn off all UART IRQs
+		call HplSam3UartInterrupts.disableAllUartIrqs();
+
+		// configure NVIC
+		call UartIrqControl.configure(IRQ_PRIO_UART);
+		call UartIrqControl.enable();
+
+		// configure PIO
+		call UartPin1.disablePioControl();
+		call UartPin1.selectPeripheralA();
+		call UartPin2.disablePioControl();
+		call UartPin2.selectPeripheralA();
+
+		// configure mode and parity
+		call HplSam3UartConfig.setChannelModeAndParityType(UART_MR_CHMODE_NORMAL, UART_MR_PAR_NONE);
+
+		// configure baud rate
+		setClockDivisor();
+
+		// initialize buffer pointers
+		// important because this determines if UartStream is busy or not
+		receiveBuffer = NULL;
+		transmitBuffer = NULL;
+
+		return SUCCESS;
+	}
+
+	async event void ClockConfig.mainClockChanged()
+	{
+		// adapt clock divisor to accommodate for PLATFORM_BAUDRATE
+		setClockDivisor();
+	}
+
+	command error_t StdControl.start()
+	{
+		// enable peripheral clock
+		call UartClockControl.enable();
+
+		// enable receiver and transmitter
+		call HplSam3UartControl.enableReceiver();
+		call HplSam3UartControl.enableTransmitter();
+
+		// enable receive IRQ
+		call HplSam3UartInterrupts.enableRxrdyIrq();
+
+		return SUCCESS;
+	}
+
+	command error_t StdControl.stop()
+	{
+		// will finish any ongoing receptions and transmissions
+		call HplSam3UartControl.disableReceiver();
+		call HplSam3UartControl.disableTransmitter();
+
+		// disable peripheral clock
+		call UartClockControl.disable();
+
+		return SUCCESS;
+	}
+
+	async command error_t UartStream.enableReceiveInterrupt()
+	{
+		call HplSam3UartInterrupts.enableRxrdyIrq();
+		return SUCCESS;
+	}
+
+	async command error_t UartStream.disableReceiveInterrupt()
+	{
+		call HplSam3UartInterrupts.disableRxrdyIrq();
+		return SUCCESS;
+	}
+
+	async command error_t UartStream.receive(uint8_t* buffer, uint16_t length)
+	{
+		if (length == 0) {
+			return FAIL;
+		}
+		atomic {
+			if (receiveBuffer != NULL) {
+				return EBUSY; // in the middle of a reception
+			} else {
+				receiveBuffer = buffer;
+				receiveBufferLength = length;
+				receiveBufferPosition = 0;
+
+				call HplSam3UartInterrupts.enableRxrdyIrq();
+			}
+		}
+		return SUCCESS;
+	}
+
+	async event void HplSam3UartInterrupts.receivedByte(uint8_t data)
+	{
+		atomic {
+			if (receiveBuffer != NULL) {
+				// receive into buffer
+				receiveBuffer[receiveBufferPosition] = data;
+				receiveBufferPosition++;
+
+				if (receiveBufferPosition >= receiveBufferLength) {
+					// buffer is full
+					uint8_t *bufferToSignal = receiveBuffer;
+					atomic {
+						receiveBuffer = NULL;
+						call HplSam3UartInterrupts.disableRxrdyIrq();
+					}
+
+					// signal reception of complete buffer
+					signal UartStream.receiveDone(bufferToSignal, receiveBufferLength, SUCCESS);
+				}
+			} else {
+				// signal single byte reception
+				signal UartStream.receivedByte(data);
+			}
+		}
+	}
+
+	async command error_t UartStream.send(uint8_t *buffer, uint16_t length)
+	{
+		if (length == 0) {
+			return FAIL;
+		}
+		atomic {
+			if (transmitBuffer != NULL) {
+				return EBUSY;
+			} else {
+				transmitBufferLength = length;
+				transmitBuffer = buffer;
+				transmitBufferPosition = 0;
+
+				// enable ready-to-transmit IRQ
+				call HplSam3UartInterrupts.enableTxrdyIrq();
+
+				return SUCCESS;
+			}
+		}
+	}
+
+	async event void HplSam3UartInterrupts.transmitterReady()
+	{
+		atomic {
+			if (transmitBufferPosition < transmitBufferLength) {
+				// characters to transfer in the buffer
+				call HplSam3UartStatus.setCharToTransmit(transmitBuffer[transmitBufferPosition]);
+				transmitBufferPosition++;
+			} else {
+				// all characters transmitted
+				uint8_t *bufferToSignal = transmitBuffer;
+
+				transmitBuffer = NULL;
+				call HplSam3UartInterrupts.disableTxrdyIrq();
+				signal UartStream.sendDone(bufferToSignal, transmitBufferLength, SUCCESS);
+			}
+		}
+	}
+
+	async command error_t UartByte.send(uint8_t byte)
+	{
+		if (call HplSam3UartInterrupts.isEnabledTxrdyIrq() == TRUE) {
+			return FAIL; // in the middle of a stream transmission
+		}
+
+		// transmit synchronously
+		call HplSam3UartStatus.setCharToTransmit(byte);
+		while (call HplSam3UartStatus.isTransmitterReady() == FALSE);
+
+		return SUCCESS;
+	}
+
+	async command error_t UartByte.receive(uint8_t *byte, uint8_t timeout)
+	{
+		// FIXME timeout currently ignored
+		if (call HplSam3UartInterrupts.isEnabledRxrdyIrq() == TRUE) {
+			return FAIL; // in the middle of a stream reception
+		}
+
+		// receive synchronously
+		while (call HplSam3UartStatus.isReceiverReady() == FALSE);
+		*byte = call HplSam3UartStatus.getReceivedChar();
+
+		return SUCCESS;
+	}
+
+	default async event void UartStream.sendDone(uint8_t *buffer, uint16_t length, error_t error) {}
+	default async event void UartStream.receivedByte(uint8_t byte) {}
+	default async event void UartStream.receiveDone(uint8_t *buffer, uint16_t length, error_t error) {}
+}
diff --git a/tos/chips/cortex/m3/sam3/uart/HplSam3UartC.nc b/tos/chips/cortex/m3/sam3/uart/HplSam3UartC.nc
new file mode 100644
index 00000000..50e87144
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/uart/HplSam3UartC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "sam3uarthardware.h"
+
+/**
+ * The hardware presentation layer for the SAM3U UART.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+configuration HplSam3UartC {
+  provides {
+    interface HplSam3UartConfig;
+    interface HplSam3UartControl;
+    interface HplSam3UartInterrupts;
+    interface HplSam3UartStatus;
+  }
+#ifdef THREADS
+  uses interface PlatformInterrupt;
+#endif
+}
+implementation
+{
+  components HplSam3UartP;
+  HplSam3UartConfig = HplSam3UartP;
+  HplSam3UartControl = HplSam3UartP;
+  HplSam3UartInterrupts = HplSam3UartP;
+  HplSam3UartStatus = HplSam3UartP;
+#ifdef THREADS
+  PlatformInterrupt = HplSam3UartP;
+#endif
+
+  components McuSleepC;
+  HplSam3UartP.UartInterruptWrapper -> McuSleepC;
+}
diff --git a/tos/chips/cortex/m3/sam3/uart/HplSam3UartConfig.nc b/tos/chips/cortex/m3/sam3/uart/HplSam3UartConfig.nc
new file mode 100644
index 00000000..504c50e1
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/uart/HplSam3UartConfig.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to configure the SAM3U UART.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+interface HplSam3UartConfig
+{
+	/**
+	 * cd = 0: baud rate generator disabled
+	 * cd = 0: baud rate = MCK
+	 * cd = 2--65535: baud rate = MCK / (cd * 16)
+	 */
+	async command error_t setClockDivisor(uint16_t cd);
+
+	/**
+	 * Have to be set together since they are in the same register.
+	 *
+	 * chmode = 0x0/UART_MR_CHMODE_NORMAL: normal
+	 * chmode = 0x1/UART_MR_CHMODE_AUTOECHO: automatic echo
+	 * chmode = 0x2/UART_MR_CHMODE_LOCALLOOP: local loopback
+	 * chmode = 0x3/UART_MR_CHMODE_REMOTELOOP: remote loopback
+	 *
+	 * par = 0x0/UART_MR_PAR_EVEN: even
+	 * par = 0x1/UART_MR_PAR_ODD: odd
+	 * par = 0x2/UART_MR_PAR_SPACE: space (forced to 0)
+	 * par = 0x3/UART_MR_PAR_MARK: mark (forced to 1)
+	 * par = 0x4/UART_MR_PAR_NONE: none
+	 */
+	async command error_t setChannelModeAndParityType(uint8_t chmode, uint8_t par);
+}
diff --git a/tos/chips/cortex/m3/sam3/uart/HplSam3UartControl.nc b/tos/chips/cortex/m3/sam3/uart/HplSam3UartControl.nc
new file mode 100644
index 00000000..e7e052b8
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/uart/HplSam3UartControl.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to control the SAM3U UART.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+interface HplSam3UartControl
+{
+	async command void resetReceiver();
+	async command void resetTransmitter();
+	async command void enableReceiver();
+	async command void disableReceiver();
+	async command void enableTransmitter();
+	async command void disableTransmitter();
+	async command void resetStatusBits();
+}
diff --git a/tos/chips/cortex/m3/sam3/uart/HplSam3UartInterrupts.nc b/tos/chips/cortex/m3/sam3/uart/HplSam3UartInterrupts.nc
new file mode 100644
index 00000000..6ee6027c
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/uart/HplSam3UartInterrupts.nc
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to control and query SAM3U UART interrupts.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+interface HplSam3UartInterrupts
+{
+	async event void receivedByte(uint8_t data);
+
+	async event void transmitterReady();
+
+	async command void disableAllUartIrqs();
+
+	async command void enableRxrdyIrq();
+	async command void disableRxrdyIrq();
+	async command bool isEnabledRxrdyIrq();
+
+	async command void enableTxrdyIrq();
+	async command void disableTxrdyIrq();
+	async command bool isEnabledTxrdyIrq();
+
+	async command void enableEndrxIrq();
+	async command void disableEndrxIrq();
+	async command bool isEnabledEndrxIrq();
+
+	async command void enableEndtxIrq();
+	async command void disableEndtxIrq();
+	async command bool isEnabledEndtxIrq();
+
+	async command void enableOvreIrq();
+	async command void disableOvreIrq();
+	async command bool isEnabledOvreIrq();
+
+	async command void enableFrameIrq();
+	async command void disableFrameIrq();
+	async command bool isEnabledFrameIrq();
+
+	async command void enablePareIrq();
+	async command void disablePareIrq();
+	async command bool isEnabledPareIrq();
+
+	async command void enableTxemptyIrq();
+	async command void disableTxemptyIrq();
+	async command bool isEnabledTxemptyIrq();
+
+	async command void enableTxbufeIrq();
+	async command void disableTxbufeIrq();
+	async command bool isEnabledTxbufeIrq();
+
+	async command void enableRxbuffIrq();
+	async command void disableRxbuffIrq();
+	async command bool isEnabledRxbuffIrq();
+}
diff --git a/tos/chips/cortex/m3/sam3/uart/HplSam3UartP.nc b/tos/chips/cortex/m3/sam3/uart/HplSam3UartP.nc
new file mode 100644
index 00000000..e4e03e06
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/uart/HplSam3UartP.nc
@@ -0,0 +1,346 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "sam3uarthardware.h"
+
+/**
+ * The hardware presentation layer for the SAM3U UART.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+module HplSam3UartP
+{
+	provides
+	{
+		interface HplSam3UartConfig;
+		interface HplSam3UartControl;
+		interface HplSam3UartInterrupts;
+		interface HplSam3UartStatus;
+	}
+        uses {
+		interface FunctionWrapper as UartInterruptWrapper;
+#ifdef THREADS
+		interface PlatformInterrupt;
+#endif
+	}
+}
+implementation
+{
+	/**
+	 * cd = 0: baud rate generator disabled
+	 * cd = 0: baud rate = MCK
+	 * cd = 2--65535: baud rate = MCK / (cd * 16)
+	 */
+	async command error_t HplSam3UartConfig.setClockDivisor(uint16_t cd)
+	{
+		UART_BRGR->bits.cd = cd;
+		return SUCCESS;
+	}
+
+	/**
+	 * chmode = 0x0/UART_MR_CHMODE_NORMAL: normal
+	 * chmode = 0x1/UART_MR_CHMODE_AUTOECHO: automatic echo
+	 * chmode = 0x2/UART_MR_CHMODE_LOCALLOOP: local loopback
+	 * chmode = 0x3/UART_MR_CHMODE_REMOTELOOP: remote loopback
+	 *
+	 * par = 0x0/UART_MR_PAR_EVEN: even
+	 * par = 0x1/UART_MR_PAR_ODD: odd
+	 * par = 0x2/UART_MR_PAR_SPACE: space (forced to 0)
+	 * par = 0x3/UART_MR_PAR_MARK: mark (forced to 1)
+	 * par = 0x4/UART_MR_PAR_NONE: none
+	 */
+	async command error_t HplSam3UartConfig.setChannelModeAndParityType(uint8_t chmode, uint8_t par)
+	{
+		uart_mr_t reg;
+
+		if (chmode > 0x3) return FAIL;
+		if (par > 0x4) return FAIL;
+
+		reg.flat = 0;
+		reg.bits.par = par;
+		reg.bits.chmode = chmode;
+		*UART_MR = reg;
+
+		return SUCCESS;
+	}
+
+	async command void HplSam3UartInterrupts.disableAllUartIrqs()
+	{
+		call HplSam3UartInterrupts.disableRxrdyIrq();
+		call HplSam3UartInterrupts.disableTxrdyIrq();
+		call HplSam3UartInterrupts.disableEndrxIrq();
+		call HplSam3UartInterrupts.disableEndtxIrq();
+		call HplSam3UartInterrupts.disableOvreIrq();
+		call HplSam3UartInterrupts.disableFrameIrq();
+		call HplSam3UartInterrupts.disablePareIrq();
+		call HplSam3UartInterrupts.disableTxemptyIrq();
+		call HplSam3UartInterrupts.disableTxbufeIrq();
+		call HplSam3UartInterrupts.disableRxbuffIrq();
+	}
+
+	async command void HplSam3UartControl.resetReceiver()
+	{
+		UART_CR->bits.rstrx = 1;
+	}
+	async command void HplSam3UartControl.resetTransmitter()
+	{
+		UART_CR->bits.rsttx = 1;
+	}
+	async command void HplSam3UartControl.enableReceiver()
+	{
+		UART_CR->bits.rxen = 1;
+	}
+	async command void HplSam3UartControl.disableReceiver()
+	{
+		UART_CR->bits.rxdis = 1;
+	}
+	async command void HplSam3UartControl.enableTransmitter()
+	{
+		UART_CR->bits.txen = 1;
+	}
+	async command void HplSam3UartControl.disableTransmitter()
+	{
+		UART_CR->bits.txdis = 1;
+	}
+	async command void HplSam3UartControl.resetStatusBits()
+	{
+		UART_CR->bits.rststa = 1;
+	}
+
+	__attribute__((interrupt)) void UartIrqHandler() @C() @spontaneous()
+	{
+		call UartInterruptWrapper.preamble();
+		if ((call HplSam3UartInterrupts.isEnabledRxrdyIrq() == TRUE) &&
+				(call HplSam3UartStatus.isReceiverReady() == TRUE)) {
+			uint8_t data = call HplSam3UartStatus.getReceivedChar();
+			signal HplSam3UartInterrupts.receivedByte(data);
+		}
+		if ((call HplSam3UartInterrupts.isEnabledTxrdyIrq() == TRUE) &&
+				(call HplSam3UartStatus.isTransmitterReady() == TRUE)) {
+			signal HplSam3UartInterrupts.transmitterReady();
+		}
+		call UartInterruptWrapper.postamble();
+#ifdef THREADS
+		call PlatformInterrupt.postAmble();
+#endif
+	}
+
+	// Rxrdy
+	async command void HplSam3UartInterrupts.enableRxrdyIrq()
+	{
+		UART_IER->bits.rxrdy = 1;
+	}
+	async command void HplSam3UartInterrupts.disableRxrdyIrq()
+	{
+		UART_IDR->bits.rxrdy = 1;
+	}
+	async command bool HplSam3UartInterrupts.isEnabledRxrdyIrq()
+	{
+		return (UART_IMR->bits.rxrdy == 0x1);
+	}
+
+	// Txrdy
+	async command void HplSam3UartInterrupts.enableTxrdyIrq()
+	{
+		UART_IER->bits.txrdy = 1;
+	}
+	async command void HplSam3UartInterrupts.disableTxrdyIrq()
+	{
+		UART_IDR->bits.txrdy = 1;
+	}
+	async command bool HplSam3UartInterrupts.isEnabledTxrdyIrq()
+	{
+		return (UART_IMR->bits.txrdy == 0x1);
+	}
+
+	// Endrx
+	async command void HplSam3UartInterrupts.enableEndrxIrq()
+	{
+		UART_IER->bits.endrx = 1;
+	}
+	async command void HplSam3UartInterrupts.disableEndrxIrq()
+	{
+		UART_IDR->bits.endrx = 1;
+	}
+	async command bool HplSam3UartInterrupts.isEnabledEndrxIrq()
+	{
+		return (UART_IMR->bits.endrx == 0x1);
+	}
+
+	// Endtx
+	async command void HplSam3UartInterrupts.enableEndtxIrq()
+	{
+		UART_IER->bits.endtx = 1;
+	}
+	async command void HplSam3UartInterrupts.disableEndtxIrq()
+	{
+		UART_IDR->bits.endtx = 1;
+	}
+	async command bool HplSam3UartInterrupts.isEnabledEndtxIrq()
+	{
+		return (UART_IMR->bits.endtx == 0x1);
+	}
+
+	// Ovre
+	async command void HplSam3UartInterrupts.enableOvreIrq()
+	{
+		UART_IER->bits.ovre = 1;
+	}
+	async command void HplSam3UartInterrupts.disableOvreIrq()
+	{
+		UART_IDR->bits.ovre = 1;
+	}
+	async command bool HplSam3UartInterrupts.isEnabledOvreIrq()
+	{
+		return (UART_IMR->bits.ovre == 0x1);
+	}
+
+	// Frame
+	async command void HplSam3UartInterrupts.enableFrameIrq()
+	{
+		UART_IER->bits.frame = 1;
+	}
+	async command void HplSam3UartInterrupts.disableFrameIrq()
+	{
+		UART_IDR->bits.frame = 1;
+	}
+	async command bool HplSam3UartInterrupts.isEnabledFrameIrq()
+	{
+		return (UART_IMR->bits.frame == 0x1);
+	}
+
+	// Pare
+	async command void HplSam3UartInterrupts.enablePareIrq()
+	{
+		UART_IER->bits.pare = 1;
+	}
+	async command void HplSam3UartInterrupts.disablePareIrq()
+	{
+		UART_IDR->bits.pare = 1;
+	}
+	async command bool HplSam3UartInterrupts.isEnabledPareIrq()
+	{
+		return (UART_IMR->bits.pare == 0x1);
+	}
+
+	// Txempty
+	async command void HplSam3UartInterrupts.enableTxemptyIrq()
+	{
+		UART_IER->bits.txempty = 1;
+	}
+	async command void HplSam3UartInterrupts.disableTxemptyIrq()
+	{
+		UART_IDR->bits.txempty = 1;
+	}
+	async command bool HplSam3UartInterrupts.isEnabledTxemptyIrq()
+	{
+		return (UART_IMR->bits.txempty == 0x1);
+	}
+
+	// Txbufe
+	async command void HplSam3UartInterrupts.enableTxbufeIrq()
+	{
+		UART_IER->bits.txbufe = 1;
+	}
+	async command void HplSam3UartInterrupts.disableTxbufeIrq()
+	{
+		UART_IDR->bits.txbufe = 1;
+	}
+	async command bool HplSam3UartInterrupts.isEnabledTxbufeIrq()
+	{
+		return (UART_IMR->bits.txbufe == 0x1);
+	}
+
+	// Rxbuff
+	async command void HplSam3UartInterrupts.enableRxbuffIrq()
+	{
+		UART_IER->bits.rxbuff = 1;
+	}
+	async command void HplSam3UartInterrupts.disableRxbuffIrq()
+	{
+		UART_IDR->bits.rxbuff = 1;
+	}
+	async command bool HplSam3UartInterrupts.isEnabledRxbuffIrq()
+	{
+		return (UART_IMR->bits.rxbuff == 0x1);
+	}
+
+	async command uint8_t HplSam3UartStatus.getReceivedChar()
+	{
+		return UART_RHR->bits.rxchr;
+	}
+	async command void HplSam3UartStatus.setCharToTransmit(uint8_t txchr)
+	{
+		UART_THR->bits.txchr = txchr;
+	}
+
+	async command bool HplSam3UartStatus.isReceiverReady()
+	{
+		return (UART_SR->bits.rxrdy == 0x1);
+	}
+	async command bool HplSam3UartStatus.isTransmitterReady()
+	{
+		return (UART_SR->bits.txrdy == 0x1);
+	}
+	async command bool HplSam3UartStatus.isEndOfReceiverTransfer()
+	{
+		return (UART_SR->bits.endrx == 0x1);
+	}
+	async command bool HplSam3UartStatus.isEndOfTransmitterTransfer()
+	{
+		return (UART_SR->bits.endtx == 0x1);
+	}
+	async command bool HplSam3UartStatus.isOverrunError()
+	{
+		return (UART_SR->bits.ovre == 0x1);
+	}
+	async command bool HplSam3UartStatus.isFramingError()
+	{
+		return (UART_SR->bits.frame == 0x1);
+	}
+	async command bool HplSam3UartStatus.isParityError()
+	{
+		return (UART_SR->bits.pare == 0x1);
+	}
+	async command bool HplSam3UartStatus.isTransmitterEmpty()
+	{
+		return (UART_SR->bits.txempty == 0x1);
+	}
+	async command bool HplSam3UartStatus.isTransmissionBufferEmpty()
+	{
+		return (UART_SR->bits.txbufe == 0x1);
+	}
+	async command bool HplSam3UartStatus.isReceiveBufferFull()
+	{
+		return (UART_SR->bits.rxbuff == 0x1);
+	}
+}
diff --git a/tos/chips/cortex/m3/sam3/uart/HplSam3UartStatus.nc b/tos/chips/cortex/m3/sam3/uart/HplSam3UartStatus.nc
new file mode 100644
index 00000000..ecfb01d5
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/uart/HplSam3UartStatus.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to query the status of the SAM3U UART.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+interface HplSam3UartStatus
+{
+	async command uint8_t getReceivedChar();
+	async command void setCharToTransmit(uint8_t txchr);
+
+	async command bool isReceiverReady();
+	async command bool isTransmitterReady();
+	async command bool isEndOfReceiverTransfer();
+	async command bool isEndOfTransmitterTransfer();
+	async command bool isOverrunError();
+	async command bool isFramingError();
+	async command bool isParityError();
+	async command bool isTransmitterEmpty();
+	async command bool isTransmissionBufferEmpty();
+	async command bool isReceiveBufferFull();
+}
diff --git a/tos/chips/cortex/m3/sam3/uart/uarthardware.h b/tos/chips/cortex/m3/sam3/uart/uarthardware.h
new file mode 100644
index 00000000..7dbb1dac
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/uart/uarthardware.h
@@ -0,0 +1,166 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Definitions specific to the SAM3U UART chip.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#ifndef UARTHARDWARE_H
+#define UARTHARDWARE_H
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 668
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint8_t reserved3 : 2;
+		uint8_t rstrx     : 1; // reset receiver
+		uint8_t rsttx     : 1; // reset transmitter
+		uint8_t rxen      : 1; // receiver enable
+		uint8_t rxdis     : 1; // receiver disable
+		uint8_t txen      : 1; // transmitter enable
+		uint8_t txdis     : 1; // transmitter disable
+		uint8_t rststa    : 1; // reset status bits
+		uint8_t reserved2 : 7;
+		uint8_t reserved1 : 8;
+		uint8_t reserved0 : 8;
+	} bits;
+} uart_cr_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 669
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint8_t reserved4 : 8;
+		uint8_t reserved3 : 1;
+		uint8_t par       : 3; // parity type
+		uint8_t reserved2 : 2;
+		uint8_t chmode    : 2; // channel mode
+		uint8_t reserved1 : 8;
+		uint8_t reserved0 : 8;
+	} bits;
+} uart_mr_t;
+
+enum
+{
+	UART_MR_PAR_EVEN  = 0x0,
+	UART_MR_PAR_ODD   = 0x1,
+	UART_MR_PAR_SPACE = 0x2,
+	UART_MR_PAR_MARK  = 0x3,
+	UART_MR_PAR_NONE  = 0x4
+};
+
+enum
+{
+	UART_MR_CHMODE_NORMAL     = 0x0,
+	UART_MR_CHMODE_AUTOECHO   = 0x1,
+	UART_MR_CHMODE_LOCALLOOP  = 0x2,
+	UART_MR_CHMODE_REMOTELOOP = 0x3
+};
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 670
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint8_t rxrdy     : 1; // receiver ready
+		uint8_t txrdy     : 1; // transmitter ready
+		uint8_t reserved5 : 1;
+		uint8_t endrx     : 1; // end of receiver transfer
+		uint8_t endtx     : 1; // end of transmitter transfer
+		uint8_t ovre      : 1; // overrun error
+		uint8_t frame     : 1; // framing error
+		uint8_t pare      : 1; // parity error
+		uint8_t reserved4 : 1;
+		uint8_t txempty   : 1; // transmitter empty
+		uint8_t reserved3 : 1;
+		uint8_t txbufe    : 1; // transmission buffer empty
+		uint8_t rxbuff    : 1; // receive buffer full
+		uint8_t reserved2 : 3;
+		uint8_t reserved1 : 8;
+		uint8_t reserved0 : 8;
+	} bits;
+} uart_ier_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 671
+typedef uart_ier_t uart_idr_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 672
+typedef uart_ier_t uart_imr_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 673
+typedef uart_ier_t uart_sr_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 675
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint8_t rxchr     : 8; // received character
+		uint8_t reserved2 : 8;
+		uint8_t reserved1 : 8;
+		uint8_t reserved0 : 8;
+	} bits;
+} uart_rhr_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 675
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint8_t txchr     : 8; // character to be transmitted
+		uint8_t reserved2 : 8;
+		uint8_t reserved1 : 8;
+		uint8_t reserved0 : 8;
+	} bits;
+} uart_thr_t;
+
+// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 676
+typedef union
+{
+	uint32_t flat;
+	struct
+	{
+		uint16_t cd        : 16; // clock divisor
+		uint8_t  reserved1 :  8;
+		uint8_t  reserved0 :  8;
+	} bits;
+} uart_brgr_t;
+
+#endif // UARTHARDWARE_H
diff --git a/tos/chips/cortex/m3/sam3/wdtc/wdtchardware.h b/tos/chips/cortex/m3/sam3/wdtc/wdtchardware.h
new file mode 100644
index 00000000..053bf887
--- /dev/null
+++ b/tos/chips/cortex/m3/sam3/wdtc/wdtchardware.h
@@ -0,0 +1,108 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Watchdog Timer register definitions.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef _WDTCHARDWARE_H
+#define _WDTCHARDWARE_H
+
+/**
+ *  WDTC Control Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 275
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t wdrstt         :  1; // watchdog restart
+        uint8_t reserved0      :  7;
+        uint16_t reserved1     : 16;
+        uint8_t key            :  8; // password, should be written as 0xA5
+    } __attribute__((__packed__)) bits;
+} wdtc_cr_t; 
+
+#define WDTC_CR_KEY 0xA5
+
+/**
+ *  WDTC Mode Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 276
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint16_t wdv          : 12; // counter value
+        uint8_t wdfien        :  1; // fault interrupt enable
+        uint8_t wdrsten       :  1; // reset enable
+        uint8_t wdrproc       :  1; // reset processor
+        uint8_t wddis         :  1; // watchdog disable
+        uint16_t wdd          : 12; // delta value
+        uint8_t wddbghlt      :  1; // debug halt
+        uint8_t wdidlehlt     :  1; // idle halt
+        uint8_t reserved0     :  2;
+    } __attribute__((__packed__)) bits;
+} wdtc_mr_t; 
+
+/**
+ *  WDTC Timer Status Register, AT91 ARM Cortex-M3 based Microcontrollers
+ *  SAM3U Series, Preliminary, p. 277
+ */
+typedef union
+{
+    uint32_t flat;
+    struct
+    {
+        uint8_t wdunf        :  1; // underflow
+        uint8_t wderr        :  1; // error
+        uint8_t reserved0    :  6;
+        uint8_t reserved1    :  8;
+        uint16_t reserved2   : 16;
+    } __attribute__((__packed__)) bits;
+} wdtc_sr_t; 
+
+/**
+ * WDTC Register definitions, AT91 ARM Cortex-M3 based Microcontrollers SAM3U
+ * Series, Preliminary, p. 274
+ */
+typedef struct wdtc
+{
+    volatile wdtc_cr_t cr; // Control Register
+    volatile wdtc_mr_t mr; // Mode Register
+    volatile wdtc_sr_t sr; // Status Register
+} wdtc_t;
+
+#endif // _WDTCHARDWARE_H
diff --git a/tos/chips/ds2401/CachedIeeeEui64P.nc b/tos/chips/ds2401/CachedIeeeEui64P.nc
new file mode 100644
index 00000000..4204143b
--- /dev/null
+++ b/tos/chips/ds2401/CachedIeeeEui64P.nc
@@ -0,0 +1,58 @@
+// $Id: CachedIeeeEui64P.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */
+
+/**
+ * Cache an EUI 64 at initialization time and return the cached value for
+ * subsequent queries.
+ */
+module CachedIeeeEui64P {
+  uses interface LocalIeeeEui64 as SubIeeeEui64;
+  provides {
+    interface LocalIeeeEui64;
+    interface Init;
+  }
+} implementation {
+
+  ieee_eui64_t eui;
+
+  command error_t Init.init() {
+    atomic eui = call SubIeeeEui64.getId();
+    return SUCCESS;
+  }
+
+  command ieee_eui64_t LocalIeeeEui64.getId() {
+    return eui;
+  }
+}
diff --git a/tos/chips/ds2401/Ds2401.h b/tos/chips/ds2401/Ds2401.h
new file mode 100644
index 00000000..1b0bd195
--- /dev/null
+++ b/tos/chips/ds2401/Ds2401.h
@@ -0,0 +1,53 @@
+// $Id: Ds2401.h,v 1.2 2010-06-29 22:07:45 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */
+
+#ifndef DS2401_H
+#define DS2401_H
+
+enum {
+  DS2401_SERIAL_LENGTH = 6,
+  DS2401_DATA_LENGTH = 8
+};
+
+typedef union ds2401_serial_t {
+  uint8_t data[DS2401_DATA_LENGTH];
+  struct {
+     uint8_t family_code;
+     uint8_t serial[DS2401_SERIAL_LENGTH];
+     uint8_t crc;
+  };
+} ds2401_serial_t;
+
+#endif // DS2401_H
diff --git a/tos/chips/ds2401/Ds2401ToIeeeEui64C.nc b/tos/chips/ds2401/Ds2401ToIeeeEui64C.nc
new file mode 100644
index 00000000..432de816
--- /dev/null
+++ b/tos/chips/ds2401/Ds2401ToIeeeEui64C.nc
@@ -0,0 +1,74 @@
+// $Id: Ds2401ToIeeeEui64C.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */
+
+#include "Ds2401.h"
+#include "IeeeEui64.h"
+#include "PlatformIeeeEui64.h"
+
+/**
+ * Convert silicon serial ID to IEEE EUI 64, according to Application Note
+ * 186 - Creating Global Identifiers Using 1-Wire Devices from Dallas/Maxim.
+ */
+module Ds2401ToIeeeEui64C {
+  uses interface HplDs2401 as Hpl;
+  provides interface LocalIeeeEui64;
+} implementation {
+
+  command ieee_eui64_t LocalIeeeEui64.getId() {
+    ds2401_serial_t rom;
+    ieee_eui64_t eui;
+    
+    atomic {
+      call Hpl.read(&rom);
+    }
+
+    // company ID
+    eui.data[0] = IEEE_EUI64_COMPANY_ID_0;
+    eui.data[1] = IEEE_EUI64_COMPANY_ID_1;
+    eui.data[2] = IEEE_EUI64_COMPANY_ID_2;
+
+    // 16 bits of the ID is generated by software
+    // could be used for hardware model id and revision, for example
+    eui.data[3] = IEEE_EUI64_SERIAL_ID_0;
+    eui.data[4] = IEEE_EUI64_SERIAL_ID_1;
+
+    // 24 least significant bits of the serial ID read from the DS2401
+    eui.data[5] = rom.data[3];
+    eui.data[6] = rom.data[2];
+    eui.data[7] = rom.data[1];
+
+    return eui;
+  }
+}
diff --git a/tos/chips/ds2401/HplDs2401.nc b/tos/chips/ds2401/HplDs2401.nc
new file mode 100644
index 00000000..590de521
--- /dev/null
+++ b/tos/chips/ds2401/HplDs2401.nc
@@ -0,0 +1,49 @@
+// $Id: HplDs2401.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */
+
+#include "Ds2401.h"
+
+/**
+ * Interface to read the 64-bit hardware ID from the DS2401 chip.
+ */
+interface HplDs2401 {
+
+/**
+ * Read the 64-bit hardware ID (family id, serial, crc) from the DS2401 chip.
+ * @param rom Pointer to a ds2401_serial_t struct, defined in ds2401.h.
+ * @returns SUCCESS on success, an error code otherwise.
+ */
+  async command error_t read(ds2401_serial_t* rom);
+}
diff --git a/tos/chips/ds2401/HplDs2401C.nc b/tos/chips/ds2401/HplDs2401C.nc
new file mode 100644
index 00000000..a78987b7
--- /dev/null
+++ b/tos/chips/ds2401/HplDs2401C.nc
@@ -0,0 +1,77 @@
+// $Id: HplDs2401C.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */
+
+#include "Ds2401.h"
+
+/**
+ * HPL for the DS2401 hardware ID chip.
+ */
+module HplDs2401C {
+  provides interface HplDs2401 as Hpl;
+  uses interface OneWireMaster as OneWire;
+}
+implementation {
+  bool busy = FALSE;
+
+  async command error_t Hpl.read(ds2401_serial_t* rom) {
+    uint8_t i;
+
+    if(busy) {
+      return EBUSY;
+    }
+
+    busy = TRUE;
+
+    call OneWire.init();
+
+    if(call OneWire.reset() != SUCCESS) {
+      call OneWire.release();
+      busy = FALSE;
+      return EOFF;
+    }
+
+    call OneWire.writeByte(0x33);
+
+    for(i=0;i<DS2401_DATA_LENGTH;i++) {
+      rom->data[i] = call OneWire.readByte();
+    }
+
+    // TODO: crc check
+
+    call OneWire.release();
+    busy = FALSE;
+    return SUCCESS;
+  }
+}
diff --git a/tos/chips/ds2401/OneWireMaster.nc b/tos/chips/ds2401/OneWireMaster.nc
new file mode 100644
index 00000000..7cdda139
--- /dev/null
+++ b/tos/chips/ds2401/OneWireMaster.nc
@@ -0,0 +1,80 @@
+// $Id: OneWireMaster.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */
+
+/**
+ * Interface to interact with 1-wire bus devices, as a master on the 1-wire
+ * bus.
+ */
+interface OneWireMaster {
+  /**
+   * Initialize bus (pin is input with pullup).
+   */
+  async command void idle();
+  /**
+   * Initialize bus, start sourcing current (pin is input with pullup).
+   */
+  async command void init();
+  /**
+   * Release bus, stop sourcing current (pin is three-stated input).
+   */
+  async command void release();
+  /**
+   * Generate reset signal.
+   * @returns SUCCESS if a client is present, an error_t error value otherwise.
+   */
+  async command error_t reset();
+  /**
+   * Write bit 1 to the bus.
+   */
+  async command void writeOne();
+  /**
+   * Write bit 0 to the bus.
+   */
+  async command void writeZero();
+  /**
+   * Write 8 bits to the bus, LSB first.
+   * @param b the byte to write.
+   */
+  async command void writeByte(uint8_t b);
+  /**
+   * Read a bit from the bus.
+   */
+  async command bool readBit();
+  /**
+   * Read 8 bits from the bus, LSB first.
+   * @returns the byte read.
+   */
+  async command uint8_t readByte();
+}
diff --git a/tos/chips/ds2401/OneWireMasterC.nc b/tos/chips/ds2401/OneWireMasterC.nc
new file mode 100644
index 00000000..36ceec93
--- /dev/null
+++ b/tos/chips/ds2401/OneWireMasterC.nc
@@ -0,0 +1,139 @@
+// $Id: OneWireMasterC.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */
+
+/**
+ * This module is the implementation of an 1-wire bus master.
+ *
+ */
+module OneWireMasterC {
+  uses interface GeneralIO as Pin;
+  uses interface BusyWait<TMicro, uint16_t> as BusyWaitMicro;
+  provides interface OneWireMaster as OneWire;
+
+}
+implementation {
+
+  async command void OneWire.idle() {
+    call Pin.makeInput();
+    call Pin.set(); // start sourcing current
+  }
+
+  async command void OneWire.init() {
+    call OneWire.idle();
+    call BusyWaitMicro.wait(500); // wait at least 500us after bootup
+  }
+
+  async command void OneWire.release() {
+    call Pin.makeInput();
+    call Pin.clr(); // stop sourcing current
+  }
+
+  async command error_t OneWire.reset() {
+    bool clientPresent;
+
+    // it is assumed that the bus is in idle state here
+
+    // transmit reset pulse
+    call Pin.makeOutput(); // output low
+    call Pin.clr();
+    call BusyWaitMicro.wait(500); // must be at least 480us
+    call OneWire.idle(); // input with pullup set
+
+    // test for present pulse
+    call BusyWaitMicro.wait(80); // presence pulse is sent 18-60us after reset
+    clientPresent = call Pin.get(); // test for presence pulse
+    call BusyWaitMicro.wait(400); // presence pulse is 60-240us long
+
+    if (clientPresent == 0) {
+      return SUCCESS;
+    } else {
+      return EOFF;
+    }
+  }
+
+  async command void OneWire.writeOne() {
+    call Pin.makeOutput(); // output low
+    call Pin.clr();
+    call BusyWaitMicro.wait(8); // must be 1-15us
+    call OneWire.idle(); // input with pullup set
+    call BusyWaitMicro.wait(72); // low time plus idle time must 60-120us
+  }
+
+  async command void OneWire.writeZero() {
+    call Pin.makeOutput(); // output low
+    call Pin.clr();
+    call BusyWaitMicro.wait(72); // must be 60-120us
+    call OneWire.idle(); // input with pullup set
+    call BusyWaitMicro.wait(8); // low time plus idle time must 60-120us
+  }
+
+  async command void OneWire.writeByte(uint8_t b) {
+    uint8_t i;
+
+    // send out bits, LSB first
+    for(i=0;i<8;i++) {
+      if(b & 0x01) {
+        call OneWire.writeOne();
+      } else {
+        call OneWire.writeZero();
+      }
+      b >>= 1;
+    }
+  }
+
+  async command bool OneWire.readBit() {
+    bool b;
+    call Pin.makeOutput(); // output low
+    call Pin.clr();
+    call BusyWaitMicro.wait(1);
+    call OneWire.idle(); // input with pullup set
+    call BusyWaitMicro.wait(8); // must be 1-15us
+    b = call Pin.get(); // read pin
+    call BusyWaitMicro.wait(71); // timeslot length must be 60-120us
+    return b;
+  }
+
+  async command uint8_t OneWire.readByte() {
+    uint8_t i,b=0;
+
+    // read bits, LSB first
+    for(i=0;i<8;i++) {
+      b >>= 1;
+      b |= call OneWire.readBit() << 7;
+    }
+    return b;
+  }
+
+}
diff --git a/tos/chips/ds2745/DS2745.h b/tos/chips/ds2745/DS2745.h
new file mode 100644
index 00000000..472eddae
--- /dev/null
+++ b/tos/chips/ds2745/DS2745.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Types and definitions for the Dallas DS2745 I2C Battery Monitor
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $
+ */
+
+#ifndef _DS2745_H
+#define _DS2745_H
+
+#define DS2745_PTR_SC		(0x01)
+#define DS2745_PTR_TEMPMSB	(0x0A)
+#define DS2745_PTR_TEMPLSB	(0x0B)
+#define DS2745_PTR_VOLTMSB	(0x0C)
+#define DS2745_PTR_VOLTLSB	(0x0D)
+#define DS2745_PTR_CURRMSB	(0x0E)
+#define DS2745_PTR_CURRLSB	(0x0F)
+#define DS2745_PTR_ACCURMSB	(0x10)
+#define DS2745_PTR_ACCURLSB	(0x11)
+#define DS2745_PTR_OFFSETBIAS	(0x61)
+#define DS2745_PTR_ACCBIAS	(0x62)
+
+#define DS2745_SC_PORF		(1 << 6)
+#define DS2745_SC_SMOD		(1 << 5)
+#define DS2745_SC_NBEN		(1 << 4)
+#define DS2745_SC_PIO		(1 << 3)
+#define DS2745_SC_FQ(_x)	(((_x) & 0x3))
+
+#endif /* _DS2745_H */
diff --git a/tos/chips/ds2745/HplDS2745.nc b/tos/chips/ds2745/HplDS2745.nc
new file mode 100644
index 00000000..e4fa3586
--- /dev/null
+++ b/tos/chips/ds2745/HplDS2745.nc
@@ -0,0 +1,159 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplDS2745 is the HPL inteface to the Dallas DS2745 I2C Battery 
+ * Monitor.
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $
+ */
+
+interface HplDS2745 {
+
+  /**
+   * Sets a new value to the DS2745 configuration register.
+   *
+   * @param val the new value to be written
+   *
+   * @return SUCCESS if the set will be performed
+   */
+  command error_t setConfig( uint8_t val );
+
+  /**
+   * Signals the completion of the configuration register set.
+   *
+   * @param error SUCCESS if the set was successful
+   */
+  async event void setConfigDone( error_t error );
+
+
+  /**
+   * Starts a temperature measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */
+  command error_t measureTemperature();
+
+  /**
+   * Presents the result of a temperature measurement.
+   *
+   * @param error SUCCESS if the measurement was successful
+   * @param val the temperature reading
+   */
+  async event void measureTemperatureDone( error_t error, uint16_t val );
+
+
+  /** 
+   * Starts a voltage measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */
+  command error_t measureVoltage();
+
+  /**
+   * Presents the result of a voltage measurement.
+   *
+   * @param error SUCCESS if the measurement was successful
+   * @param val the voltage reading
+   */
+  async event void measureVoltageDone( error_t error, uint16_t val);
+
+
+  /** 
+   * Starts a current measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */
+  command error_t measureCurrent();
+
+  /**
+   * Presents the result of a current measurement.
+   *
+   * @param error SUCCESS if the measurement was successful
+   * @param val the current reading
+   */
+  async event void measureCurrentDone( error_t error, uint16_t val);
+
+
+  /** 
+   * Starts an accumulated current measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */
+  command error_t measureAccCurrent();
+
+  /**
+   * Presents the result of a accumulated current measurement.
+   *
+   * @param error SUCCESS if the measurement was successful
+   * @param val the accumulated current reading
+   */
+  async event void measureAccCurrentDone( error_t error, uint16_t val);
+
+
+  /** 
+   * Initiates setting of the current offset bias value
+   *
+   * @param The signed two's complement bias value.
+   *
+   * @return SUCCESS if the setting will be made
+   */
+  command error_t setOffsetBias(int8_t val);
+
+  /**
+   * Signals completion and error, if any, in setting the current
+   * offset bias value.
+   *
+   * @param error SUCCESS if the setting was successful
+   */
+  async event void setOffsetBiasDone( error_t error );
+
+
+  /** 
+   * Initiates setting of the accumulated current offset bias value
+   *
+   * @param The signed two's complement bias value.
+   *
+   * @return SUCCESS if the setting will be made
+   */
+  command error_t setAccOffsetBias(int8_t val);
+
+  /**
+   * Signals completion and error, if any, in setting the accumulated
+   * current offset bias value.
+   *
+   * @param error SUCCESS if the setting was successful
+   */
+  async event void setAccOffsetBiasDone( error_t error );
+
+
+}
diff --git a/tos/chips/ds2745/HplDS2745LogicP.nc b/tos/chips/ds2745/HplDS2745LogicP.nc
new file mode 100644
index 00000000..917f0d87
--- /dev/null
+++ b/tos/chips/ds2745/HplDS2745LogicP.nc
@@ -0,0 +1,283 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplDS2745LogicP is the driver for the Dallas DS2745. It requires an 
+ * I2C packet interface and provides the HplTMP175 HPL interface.
+ * 
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $
+ */
+
+#include "DS2745.h"
+#include "I2C.h"
+
+generic module HplDS2745LogicP(uint16_t devAddr)
+{
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface HplDS2745;
+
+  uses interface I2CPacket<TI2CBasicAddr>;
+
+}
+
+implementation {
+
+  enum {
+    STATE_IDLE,
+    STATE_STARTING,
+    STATE_STOPPING,
+    STATE_STOPPED,
+    STATE_SETCONFIG,
+    STATE_READTEMP,
+    STATE_READVOLTAGE,
+    STATE_READCURRENT,
+    STATE_READACCCURRENT,
+    STATE_SETBIAS,
+    STATE_SETACCBIAS
+  };
+
+  uint8_t mI2CBuffer[4];
+  uint8_t mState;
+  norace error_t mSSError = SUCCESS;
+
+  static error_t doReadReg(uint8_t nextState, uint8_t reg) {
+    error_t error = SUCCESS;
+	
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = nextState;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = reg;
+
+    error = call I2CPacket.write(I2C_START,devAddr,1,mI2CBuffer);
+    
+    if (error) 
+      atomic mState = STATE_IDLE;
+
+    return error;
+
+  }
+
+  static error_t doSetReg(uint8_t nextState, uint8_t reg, uint16_t val) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = nextState;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = reg;
+    mI2CBuffer[1] = val;
+
+    error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer);
+    
+    if (error) 
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  task void StartDone() {
+    atomic mState = STATE_IDLE;
+    signal SplitControl.startDone(mSSError);
+    return;
+  }
+
+  task void StopDone() {
+    atomic mState = STATE_STOPPED;
+    signal SplitControl.stopDone(mSSError);
+    return;
+  }
+
+  command error_t Init.init() {
+    mState = STATE_STOPPED;
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.start() {
+    error_t error = SUCCESS;
+    atomic {
+      if (mState == STATE_STOPPED) { 
+	mState = STATE_STARTING; 
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (!error)
+      post StartDone();
+
+    return error;
+  }
+
+  command error_t SplitControl.stop() {
+    error_t error = SUCCESS;
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = STATE_STOPPING;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (!error)
+      post StopDone();
+
+    return error;
+  }
+  
+  command error_t HplDS2745.setConfig(uint8_t val) {
+    return doSetReg(STATE_SETCONFIG,DS2745_PTR_SC,val);
+  }
+
+  command error_t HplDS2745.measureTemperature() { 
+    return doReadReg(STATE_READTEMP,DS2745_PTR_TEMPMSB);
+  }
+
+  command error_t HplDS2745.measureVoltage() { 
+    return doReadReg(STATE_READVOLTAGE,DS2745_PTR_VOLTMSB);
+  }
+
+  command error_t HplDS2745.measureCurrent() { 
+    return doReadReg(STATE_READCURRENT,DS2745_PTR_CURRMSB);
+  }
+
+  command error_t HplDS2745.measureAccCurrent() { 
+    return doReadReg(STATE_READTEMP,DS2745_PTR_ACCURMSB);
+  }
+
+  command error_t HplDS2745.setOffsetBias(int8_t val) { 
+    return doSetReg(STATE_SETBIAS,DS2745_PTR_OFFSETBIAS,val); 
+  }
+
+  command error_t HplDS2745.setAccOffsetBias(int8_t val) {
+    return doSetReg(STATE_SETACCBIAS,DS2745_PTR_ACCBIAS,val); 
+  }
+
+  async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    uint16_t tempVal;
+    tempVal = buf[0];
+    tempVal = ((tempVal << 8) | buf[1]);
+
+    switch (mState) {
+    case STATE_READTEMP:
+      signal HplDS2745.measureTemperatureDone(i2c_error,tempVal);
+      break;
+    case STATE_READVOLTAGE:
+      signal HplDS2745.measureVoltageDone(i2c_error,tempVal);
+      break;
+    case STATE_READCURRENT:
+      signal HplDS2745.measureCurrentDone(i2c_error,tempVal);
+      break;
+    case STATE_READACCCURRENT:
+      signal HplDS2745.measureAccCurrentDone(i2c_error,tempVal);
+      break;
+    default:
+      break;
+    }
+    atomic mState = STATE_IDLE;
+    return;
+  }
+
+  async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    error_t error = i2c_error;
+
+    switch (mState) {
+    case STATE_SETCONFIG:
+      atomic mState = STATE_IDLE;
+      signal HplDS2745.setConfigDone(error);
+      break;     
+    case STATE_READTEMP:
+      if (error) 
+	signal HplDS2745.measureTemperatureDone(error,0);
+      else
+	error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer);
+      break;
+    case STATE_READVOLTAGE:
+      if (error) 
+	signal HplDS2745.measureVoltageDone(error,0);
+      else
+	error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer);
+      break;
+    case STATE_READCURRENT:
+      if (error) 
+	signal HplDS2745.measureCurrentDone(error,0);
+      else 
+	error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer);
+      break;
+    case STATE_READACCCURRENT:
+      if (error) 
+	signal HplDS2745.measureAccCurrentDone(error,0);
+      else
+	error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer);
+      break;
+    case STATE_SETBIAS:
+      atomic mState = STATE_IDLE;
+      signal HplDS2745.setOffsetBiasDone(error);
+      break;
+    case STATE_SETACCBIAS:
+      atomic mState = STATE_IDLE;
+      signal HplDS2745.setAccOffsetBiasDone(error);
+      break;
+    default:
+      atomic mState = STATE_IDLE;
+      break;
+    }
+    if (error)
+      atomic mState = STATE_IDLE;
+    return;
+  }
+  
+  default event void SplitControl.startDone( error_t error ) { return; }
+  default event void SplitControl.stopDone( error_t error ) { return; }
+  default async event void HplDS2745.setConfigDone(error_t error) {return; }
+  default async event void HplDS2745.measureTemperatureDone( error_t error, uint16_t val ){ return; }
+  default async event void HplDS2745.measureVoltageDone( error_t error, uint16_t val ){ return; }
+  default async event void HplDS2745.measureCurrentDone( error_t error, uint16_t val ){ return; }
+  default async event void HplDS2745.measureAccCurrentDone( error_t error, uint16_t val ){ return; }
+  default async event void HplDS2745.setOffsetBiasDone( error_t error ){ return; }
+  default async event void HplDS2745.setAccOffsetBiasDone(error_t error){ return; }
+}
diff --git a/tos/chips/ds2782/DS2782.h b/tos/chips/ds2782/DS2782.h
new file mode 100644
index 00000000..7394af87
--- /dev/null
+++ b/tos/chips/ds2782/DS2782.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Types and definitions for the Dallas DS2782 I2C Battery Monitor
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ */
+
+#ifndef _DS2782_H
+#define _DS2782_H
+
+#define DS2782_PTR_SC		(0x01)
+#define DS2782_PTR_TEMPMSB	(0x0A)
+#define DS2782_PTR_TEMPLSB	(0x0B)
+#define DS2782_PTR_VOLTMSB	(0x0C)
+#define DS2782_PTR_VOLTLSB	(0x0D)
+#define DS2782_PTR_CURRMSB	(0x0E)
+#define DS2782_PTR_CURRLSB	(0x0F)
+#define DS2782_PTR_ACCURMSB	(0x10)
+#define DS2782_PTR_ACCURLSB	(0x11)
+#define DS2782_PTR_OFFSETBIAS	(0x61)
+#define DS2782_PTR_ACCBIAS	(0x62)
+#define DS2782_PTR_CONTROL  (0x60)
+
+#define DS2782_SC_PORF		(1 << 6)
+#define DS2782_SC_SMOD		(1 << 5)
+#define DS2782_SC_NBEN		(1 << 4)
+#define DS2782_SC_PIO		(1 << 3)
+#define DS2782_SC_FQ(_x)	(((_x) & 0x3))
+
+#endif /* _DS2782_H */
diff --git a/tos/chips/ds2782/HplDS2782.nc b/tos/chips/ds2782/HplDS2782.nc
new file mode 100644
index 00000000..fada2825
--- /dev/null
+++ b/tos/chips/ds2782/HplDS2782.nc
@@ -0,0 +1,210 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplDS2782 is the HPL inteface to the Dallas DS2782 I2C Battery 
+ * Monitor.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ */
+
+interface HplDS2782 {
+
+  /**
+   * Sets a new value to the DS2782 configuration register.
+   *
+   * @param val the new value to be written
+   *
+   * @return SUCCESS if the set will be performed
+   */
+  command error_t setConfig( uint8_t val );
+
+  /**
+   * Signals the completion of the configuration register set.
+   *
+   * @param error SUCCESS if the set was successful
+   */
+  async event void setConfigDone( error_t error );
+
+  /**
+   * Tells the DS2782 whether or not is is allowed to go into sleep.
+   *
+   * @param allow True allows sleep.
+   * 
+   * @return SUCCESS if the set will be performed
+   */
+  command error_t allowSleep(bool allow);
+
+  /**
+   * Signals the completion of the sleep call.
+   *
+   * @param error SUCCESS if the set was successful
+   */
+  async event void allowSleepDone( error_t error );
+
+  /**
+   * Starts a temperature measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */
+  command error_t measureTemperature();
+
+  /**
+   * Presents the result of a temperature measurement.
+   *
+   * @param error SUCCESS if the measurement was successful
+   * @param val the temperature reading
+   */
+  async event void measureTemperatureDone( error_t error, uint16_t val );
+
+
+  /** 
+   * Starts a voltage measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */
+  command error_t measureVoltage();
+
+  /**
+   * Presents the result of a voltage measurement.
+   *
+   * @param error SUCCESS if the measurement was successful
+   * @param val the voltage reading
+   */
+  async event void measureVoltageDone( error_t error, uint16_t val);
+
+
+  /** 
+   * Starts a current measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */
+  command error_t measureCurrent();
+
+  /**
+   * Presents the result of a current measurement.
+   *
+   * @param error SUCCESS if the measurement was successful
+   * @param val the current reading
+   */
+  async event void measureCurrentDone( error_t error, uint16_t val);
+
+
+  /** 
+   * Starts an accumulated current measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */
+  command error_t measureAccCurrent();
+
+  /**
+   * Presents the result of a accumulated current measurement.
+   *
+   * @param error SUCCESS if the measurement was successful
+   * @param val the accumulated current reading
+   */
+  async event void measureAccCurrentDone( error_t error, uint16_t val);
+
+
+  /** 
+   * Initiates setting of the current offset bias value
+   *
+   * @param The signed two's complement bias value.
+   *
+   * @return SUCCESS if the setting will be made
+   */
+  command error_t setOffsetBias(int8_t val);
+
+  /**
+   * Signals completion and error, if any, in setting the current
+   * offset bias value.
+   *
+   * @param error SUCCESS if the setting was successful
+   */
+  async event void setOffsetBiasDone( error_t error );
+
+
+  /** 
+   * Initiates setting of the accumulated current offset bias value
+   *
+   * @param The signed two's complement bias value.
+   *
+   * @return SUCCESS if the setting will be made
+   */
+  command error_t setAccOffsetBias(int8_t val);
+
+  /**
+   * Signals completion and error, if any, in setting the accumulated
+   * current offset bias value.
+   *
+   * @param error SUCCESS if the setting was successful
+   */
+  async event void setAccOffsetBiasDone( error_t error );
+
+
+}
diff --git a/tos/chips/ds2782/HplDS2782LogicP.nc b/tos/chips/ds2782/HplDS2782LogicP.nc
new file mode 100644
index 00000000..30618933
--- /dev/null
+++ b/tos/chips/ds2782/HplDS2782LogicP.nc
@@ -0,0 +1,324 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplDS2782LogicP is the driver for the Dallas DS2782. It requires 
+ * I2C packet and resource interfaces and provides the HplDS2782 HPL interface.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com> 
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ */
+
+#include "DS2782.h"
+#include "I2C.h"
+
+generic module HplDS2782LogicP(uint16_t devAddr)
+{
+  provides interface StdControl;
+  provides interface HplDS2782;
+
+  uses interface I2CPacket<TI2CBasicAddr>;
+  uses interface Resource as I2CResource;
+
+}
+
+implementation {
+
+  enum {
+    STATE_IDLE,
+    STATE_STOPPED,
+    STATE_SETCONFIG,
+    STATE_READTEMP,
+    STATE_READVOLTAGE,
+    STATE_READCURRENT,
+    STATE_READACCCURRENT,
+    STATE_SETBIAS,
+    STATE_SETACCBIAS,
+    STATE_ALLOWSLEEP
+  };
+
+  uint8_t mI2CBuffer[4];
+  uint8_t mState = STATE_STOPPED;
+  bool read;
+
+  norace error_t mSSError = SUCCESS;
+
+  static error_t doReadReg(uint8_t nextState, uint8_t reg) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+        mState = nextState;
+      }
+      else {
+        error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = reg;
+    read = true;
+    error = call I2CResource.request();
+
+    if (error) 
+      atomic mState = STATE_IDLE;
+
+    return error;
+
+  }
+
+  static error_t doSetReg(uint8_t nextState, uint8_t reg, uint16_t val) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+        mState = nextState;
+      }
+      else {
+        error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = reg;
+    mI2CBuffer[1] = val;
+
+    read = false;
+    error = call I2CResource.request();
+
+    if (error)
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  command error_t StdControl.start() {
+    error_t error = SUCCESS;
+    atomic {
+      if (mState == STATE_STOPPED) { 
+        mState = STATE_IDLE; 
+      }
+      else {
+        error = EBUSY;
+      }
+    }
+    return error;
+  }
+
+  command error_t StdControl.stop() {
+    error_t error = SUCCESS;
+    atomic {
+      if (mState == STATE_IDLE) {
+        mState = STATE_STOPPED;
+      }
+      else {
+        error = EBUSY;
+      }
+    }
+    return error;
+  }
+
+  command error_t HplDS2782.setConfig(uint8_t val) {
+    return doSetReg(STATE_SETCONFIG,DS2782_PTR_SC,val);
+  }
+
+  command error_t HplDS2782.allowSleep(bool allow) {
+    if (allow)
+      return doSetReg(STATE_ALLOWSLEEP,DS2782_PTR_CONTROL,0x60);
+    else 
+      return doSetReg(STATE_ALLOWSLEEP,DS2782_PTR_CONTROL,0x0);
+  }
+
+  command error_t HplDS2782.measureTemperature() { 
+    return doReadReg(STATE_READTEMP,DS2782_PTR_TEMPMSB);
+  }
+
+  command error_t HplDS2782.measureVoltage() { 
+    return doReadReg(STATE_READVOLTAGE,DS2782_PTR_VOLTMSB);
+  }
+
+  command error_t HplDS2782.measureCurrent() { 
+    return doReadReg(STATE_READCURRENT,DS2782_PTR_CURRMSB);
+  }
+
+  command error_t HplDS2782.measureAccCurrent() { 
+    return doReadReg(STATE_READTEMP,DS2782_PTR_ACCURMSB);
+  }
+
+  command error_t HplDS2782.setOffsetBias(int8_t val) { 
+    return doSetReg(STATE_SETBIAS,DS2782_PTR_OFFSETBIAS,val); 
+  }
+
+  command error_t HplDS2782.setAccOffsetBias(int8_t val) {
+    return doSetReg(STATE_SETACCBIAS,DS2782_PTR_ACCBIAS,val); 
+  }
+
+  async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    uint16_t tempVal;
+    tempVal = buf[0];
+    tempVal = ((tempVal << 8) | buf[1]);
+
+    atomic switch (mState) {
+      case STATE_READTEMP:
+        signal HplDS2782.measureTemperatureDone(i2c_error,tempVal);
+        break;
+      case STATE_READVOLTAGE:
+        signal HplDS2782.measureVoltageDone(i2c_error,tempVal);
+        break;
+      case STATE_READCURRENT:
+        signal HplDS2782.measureCurrentDone(i2c_error,tempVal);
+        break;
+      case STATE_READACCCURRENT:
+        signal HplDS2782.measureAccCurrentDone(i2c_error,tempVal);
+        break;
+      default:
+        break;
+    }
+    call I2CResource.release();
+    atomic mState = STATE_IDLE;
+    return;
+  }
+
+  event void I2CResource.granted() {
+    if (read) {
+      call I2CPacket.write(I2C_START | I2C_STOP,devAddr,1,mI2CBuffer);
+    } else {
+      call I2CPacket.write(I2C_START | I2C_STOP,devAddr,2,mI2CBuffer);
+    }
+  }
+
+  async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    error_t error = i2c_error;
+
+    atomic switch (mState) {
+      case STATE_SETCONFIG:
+        call I2CResource.release();
+        atomic mState = STATE_IDLE;
+        signal HplDS2782.setConfigDone(error);
+        break;     
+      case STATE_READTEMP:
+        if (error) 
+          signal HplDS2782.measureTemperatureDone(error,0);
+        else
+          error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer);
+        break;
+      case STATE_READVOLTAGE:
+        if (error) 
+          signal HplDS2782.measureVoltageDone(error,0);
+        else
+          error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer);
+        break;
+      case STATE_READCURRENT:
+        if (error) 
+          signal HplDS2782.measureCurrentDone(error,0);
+        else 
+          error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer);
+        break;
+      case STATE_READACCCURRENT:
+        if (error) 
+          signal HplDS2782.measureAccCurrentDone(error,0);
+        else
+          error = call I2CPacket.read((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer);
+        break;
+      case STATE_SETBIAS:
+        call I2CResource.release();
+        atomic mState = STATE_IDLE;
+        signal HplDS2782.setOffsetBiasDone(error);
+        break;
+      case STATE_SETACCBIAS:
+        call I2CResource.release();
+        atomic mState = STATE_IDLE;
+        signal HplDS2782.setAccOffsetBiasDone(error);
+        break;
+      case STATE_ALLOWSLEEP:
+        call I2CResource.release();
+        atomic mState = STATE_IDLE;
+        signal HplDS2782.allowSleepDone(error);
+        break;
+      default:
+        call I2CResource.release();
+        atomic mState = STATE_IDLE;
+        break;
+    }
+    if (error) {
+      call I2CResource.release();
+      atomic mState = STATE_IDLE;
+    }
+    return;
+  }
+
+  default async event void HplDS2782.setConfigDone(error_t error) { return; }
+  default async event void HplDS2782.allowSleepDone( error_t error ) { return; }
+  default async event void HplDS2782.measureTemperatureDone( error_t error, uint16_t val ){ return; }
+  default async event void HplDS2782.measureVoltageDone( error_t error, uint16_t val ){ return; }
+  default async event void HplDS2782.measureCurrentDone( error_t error, uint16_t val ){ return; }
+  default async event void HplDS2782.measureAccCurrentDone( error_t error, uint16_t val ){ return; }
+  default async event void HplDS2782.setOffsetBiasDone( error_t error ){ return; }
+  default async event void HplDS2782.setAccOffsetBiasDone(error_t error){ return; }
+}
diff --git a/tos/chips/lis3l02dq/HalLIS3L02DQAdvanced.nc b/tos/chips/lis3l02dq/HalLIS3L02DQAdvanced.nc
new file mode 100644
index 00000000..b48abfe1
--- /dev/null
+++ b/tos/chips/lis3l02dq/HalLIS3L02DQAdvanced.nc
@@ -0,0 +1,57 @@
+/* $Id: HalLIS3L02DQAdvanced.nc,v 1.4 2006-12-12 18:23:06 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "LIS3L02DQ.h"
+
+interface HalLIS3L02DQAdvanced {
+  command error_t setDecimation(uint8_t factor);
+  event void setDecimationDone(error_t error);
+  command error_t enableAxis(bool bX, bool bY, bool bZ);
+  event void enableAxisDone(error_t error);
+  command error_t enableAlert(lis_alertflags_t xFlags, 
+                      lis_alertflags_t yFlags, 
+                      lis_alertflags_t zFlags, 
+                      bool requireAll);
+  event void enableAlertDone(error_t error);
+  command error_t getAlertSource();
+  event void getAlertSourceDone(error_t error, uint8_t vector);
+  command error_t setTLow(uint8_t val);
+  event void setTLowDone(error_t error);
+  command error_t setTHigh(uint8_t val);
+  event void setTHighDone(error_t error);
+
+  event void alertThreshold();
+}
diff --git a/tos/chips/lis3l02dq/HalLIS3L02DQControlP.nc b/tos/chips/lis3l02dq/HalLIS3L02DQControlP.nc
new file mode 100644
index 00000000..fe56df41
--- /dev/null
+++ b/tos/chips/lis3l02dq/HalLIS3L02DQControlP.nc
@@ -0,0 +1,172 @@
+/* $Id: HalLIS3L02DQControlP.nc,v 1.4 2006-12-12 18:23:06 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "LIS3L02DQ.h"
+
+module HalLIS3L02DQControlP {
+  provides interface HalLIS3L02DQAdvanced as Advanced;
+
+  uses interface Resource;
+  uses interface HplLIS3L02DQ as Hpl;
+}
+
+implementation {
+  enum {
+    S_IDLE,
+    S_DECIMATION,
+    S_ENAXIS,
+    S_TLOW,
+    S_THIGH,
+  };
+  uint8_t state = S_IDLE;
+
+  uint8_t ctrlReg1Shadow = 0x7;
+  
+  error_t clientResult;
+  uint8_t clientRegAddr;
+  uint8_t clientVal;
+
+  task void signal_Task() {
+    switch(state) {
+    case S_DECIMATION:
+      state = S_IDLE;
+      call Resource.release();
+      signal Advanced.setDecimationDone(clientResult);
+      break;
+    case S_ENAXIS:
+      state = S_IDLE;
+      call Resource.release();
+      signal Advanced.enableAxisDone(clientResult);
+      break;
+    case S_TLOW:
+      state = S_IDLE;
+      call Resource.release();
+      signal Advanced.setTLowDone(clientResult);
+      break;
+    case S_THIGH:
+      state = S_IDLE;
+      call Resource.release();
+      signal Advanced.setTHighDone(clientResult);
+      break;
+    default:
+      break;
+    }
+  }
+
+  event void Resource.granted() {
+    // intentionally left blank
+  }
+  
+  command error_t Advanced.setDecimation(uint8_t factor) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_DECIMATION;
+    ctrlReg1Shadow &= ~LIS3L01DQ_CTRL_REG1_DF(3);
+    ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(factor);
+    call Hpl.setReg(LIS3L02DQ_CTRL_REG1, ctrlReg1Shadow);
+    return SUCCESS;
+  }
+
+ command error_t Advanced.enableAxis(bool bX, bool bY, bool bZ) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_ENAXIS;
+    ctrlReg1Shadow &= ~LIS3L01DQ_CTRL_REG1_DF(7);
+    // if any of them on, power it on
+    if(bZ || bY || bX)
+      ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_PD(1);
+
+    // enable all the relevant axes
+    if(bZ)
+      ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(LIS3L01DQ_CTRL_REG1_ZEN);
+    if(bY)
+      ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(LIS3L01DQ_CTRL_REG1_YEN);
+    if(bX)
+      ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(LIS3L01DQ_CTRL_REG1_XEN);
+    call Hpl.setReg(LIS3L02DQ_CTRL_REG1, ctrlReg1Shadow);
+    return SUCCESS;
+  }
+
+  command error_t Advanced.setTLow(uint8_t val) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_TLOW;
+    call Hpl.setReg(LIS3L02DQ_THS_L, val);
+    return SUCCESS;
+  }
+
+  command error_t Advanced.setTHigh(uint8_t val) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_THIGH;
+    call Hpl.setReg(LIS3L02DQ_THS_H, val);
+    return SUCCESS;
+  }
+
+  async event void Hpl.getRegDone(error_t error, uint8_t regAddr, uint8_t val) {}
+  async event void Hpl.alertThreshold() {}
+  
+  async event void Hpl.setRegDone(error_t error, uint8_t regAddr, uint8_t val) {
+    clientResult = error;
+    clientRegAddr = regAddr;
+    clientVal = val;
+    post signal_Task();
+  }
+
+  command error_t Advanced.enableAlert(lis_alertflags_t xFlags,
+				       lis_alertflags_t yFlags,
+				       lis_alertflags_t zFlags,
+				       bool requireAll) {
+    return FAIL;
+  }
+  command error_t Advanced.getAlertSource() { return FAIL; }
+}
diff --git a/tos/chips/lis3l02dq/HalLIS3L02DQReaderP.nc b/tos/chips/lis3l02dq/HalLIS3L02DQReaderP.nc
new file mode 100644
index 00000000..15461693
--- /dev/null
+++ b/tos/chips/lis3l02dq/HalLIS3L02DQReaderP.nc
@@ -0,0 +1,157 @@
+/* $Id: HalLIS3L02DQReaderP.nc,v 1.4 2006-12-12 18:23:06 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "LIS3L02DQ.h"
+
+generic module HalLIS3L02DQReaderP() {
+  provides interface Read<uint16_t> as AccelX;
+  provides interface Read<uint16_t> as AccelY;
+  provides interface Read<uint16_t> as AccelZ;
+
+  uses interface Resource as AccelXResource;
+  uses interface Resource as AccelYResource;
+  uses interface Resource as AccelZResource;
+  uses interface HplLIS3L02DQ as Hpl;
+}
+
+implementation {
+  enum {
+    S_IDLE,
+    S_GET_XL,
+    S_GET_XH,
+    S_GET_YL,
+    S_GET_YH,
+    S_GET_ZL,
+    S_GET_ZH,
+  };
+  uint8_t state = S_IDLE;
+  uint16_t readResult;
+  uint8_t byteResult;
+  uint8_t errorResult;
+
+  task void complete_Task() {
+    switch(state) {
+    case S_GET_XL:
+      readResult += byteResult;
+      state = S_IDLE;
+      call AccelXResource.release();
+      signal AccelX.readDone(errorResult, readResult);
+      break;
+    case S_GET_XH:
+      readResult = (uint16_t) byteResult & 0xF;
+      readResult <<= 8;
+      state = S_GET_XL;
+      call Hpl.getReg(LIS3L02DQ_OUTX_L);
+      break;
+    case S_GET_YL:
+      readResult += byteResult;
+      state = S_IDLE;
+      call AccelYResource.release();
+      signal AccelY.readDone(errorResult, readResult);
+      break;
+    case S_GET_YH:
+      readResult = (uint16_t) byteResult & 0xF;
+      readResult <<= 8;
+      state = S_GET_YL;
+      call Hpl.getReg(LIS3L02DQ_OUTY_L);
+      break;
+    case S_GET_ZL:
+      readResult += byteResult;
+      state = S_IDLE;
+      call AccelZResource.release();
+      signal AccelZ.readDone(errorResult, readResult);
+      break;
+    case S_GET_ZH:
+      readResult = (uint16_t) byteResult & 0xF;
+      readResult <<= 8;
+      state = S_GET_ZL;
+      call Hpl.getReg(LIS3L02DQ_OUTZ_L);
+      break;
+    default:
+      break;
+    }
+  }
+
+  command error_t AccelX.read() {
+    return call AccelXResource.request();
+  }
+  command error_t AccelY.read() {
+    return call AccelYResource.request();
+  }
+  command error_t AccelZ.read() {
+    return call AccelZResource.request();
+  }
+  
+  event void AccelXResource.granted() {
+    errorResult = call Hpl.getReg(LIS3L02DQ_OUTX_H);
+    if (errorResult != SUCCESS) {
+      state = S_GET_XL;
+      post complete_Task();
+    }
+    state = S_GET_XH;
+  }
+
+  event void AccelYResource.granted() {
+    errorResult = call Hpl.getReg(LIS3L02DQ_OUTY_H);
+    if (errorResult != SUCCESS) {
+      state = S_GET_YL;
+      post complete_Task();
+    }
+    state = S_GET_YH;
+  }
+
+  event void AccelZResource.granted() {
+    errorResult = call Hpl.getReg(LIS3L02DQ_OUTZ_H);
+    if (errorResult != SUCCESS) {
+      state = S_GET_ZL;
+      post complete_Task();
+    }
+    state = S_GET_ZH;
+  }
+
+  async event void Hpl.getRegDone(error_t error, uint8_t regAddr, uint8_t val) {
+    errorResult |= error;
+    byteResult = val;
+    post complete_Task();
+  }
+
+  async event void Hpl.setRegDone( error_t error , uint8_t regAddr, uint8_t val) {
+    // intentionally left blank
+  }
+
+  async event void Hpl.alertThreshold() { }
+}
diff --git a/tos/chips/lis3l02dq/HplLIS3L02DQ.nc b/tos/chips/lis3l02dq/HplLIS3L02DQ.nc
new file mode 100644
index 00000000..b3209fac
--- /dev/null
+++ b/tos/chips/lis3l02dq/HplLIS3L02DQ.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Hpl interface for the ST LIS3L02DQ 3-Axis Accelerometer
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $
+ */
+
+interface HplLIS3L02DQ {
+
+  command error_t getReg(uint8_t regAddr);
+  async event void getRegDone( error_t error, uint8_t regAddr, uint8_t val);
+
+  command error_t setReg( uint8_t regAddr, uint8_t val);
+  async event void setRegDone( error_t error , uint8_t regAddr, uint8_t val);
+
+  async event void alertThreshold();
+
+}
diff --git a/tos/chips/lis3l02dq/HplLIS3L02DQLogicSPIP.nc b/tos/chips/lis3l02dq/HplLIS3L02DQLogicSPIP.nc
new file mode 100644
index 00000000..00bd3bfe
--- /dev/null
+++ b/tos/chips/lis3l02dq/HplLIS3L02DQLogicSPIP.nc
@@ -0,0 +1,211 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * This module is the driver components for the ST LIS3L02DQ 3-axis 
+ * accelerometer in the 4 wire SPI mode. It requires the SPI packet
+ * interface and assumes the ability to manually toggle the chip select
+ * via a GPIO. It provides the HplLIS3L02DQ HPL interface.
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @author Kaisen Lin <klin@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $
+ */
+
+module HplLIS3L02DQLogicSPIP
+{
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface HplLIS3L02DQ;
+
+  uses interface SpiPacket;
+  uses interface GpioInterrupt as InterruptAlert;
+  uses interface GeneralIO as SPIFRM;
+}
+
+implementation {
+
+  enum {
+    STATE_IDLE,
+    STATE_STARTING,
+    STATE_STOPPING,
+    STATE_STOPPED,
+    STATE_GETREG,
+    STATE_SETREG,
+    STATE_ERROR
+  };
+
+  uint8_t mSPIRxBuf[4],mSPITxBuf[4];
+  uint8_t mState;
+  bool misInited = FALSE;
+  norace error_t mSSError;
+
+
+  task void StartDone() {
+    atomic mState = STATE_IDLE;
+    signal SplitControl.startDone(SUCCESS);
+    return;
+  }
+
+  task void StopDone() {
+    signal SplitControl.stopDone(mSSError);
+    return;
+  }
+
+  command error_t Init.init() {
+    atomic {
+      if (!misInited) {
+	misInited = TRUE;
+	mState = STATE_STOPPED;
+      }
+      // Control CS pin manually
+      call SPIFRM.makeOutput();
+      call SPIFRM.set();
+    }
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.start() {
+    error_t error = SUCCESS;
+    atomic {
+      if (mState == STATE_STOPPED) { 
+	mState = STATE_STARTING;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error) 
+      return error;
+
+    mSPITxBuf[0] = LIS3L02DQ_CTRL_REG1;
+    mSPITxBuf[1] = 0;
+    mSPITxBuf[1] = (LIS3L01DQ_CTRL_REG1_PD(1) | LIS3L01DQ_CTRL_REG1_XEN | LIS3L01DQ_CTRL_REG1_YEN | LIS3L01DQ_CTRL_REG1_ZEN);
+    call SPIFRM.clr(); // CS LOW
+    error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2);
+    return error;
+  }
+
+  command error_t SplitControl.stop() {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = STATE_STOPPING;
+      }
+      else { 
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mSPITxBuf[0] = LIS3L02DQ_CTRL_REG1;
+    mSPITxBuf[1] = 0;
+    mSPITxBuf[1] = (LIS3L01DQ_CTRL_REG1_PD(0));
+    call SPIFRM.clr(); // CS LOW
+    error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2);
+    return error;
+  }
+  
+  command error_t HplLIS3L02DQ.getReg(uint8_t regAddr) {
+    error_t error = SUCCESS;
+
+    if((regAddr < 0x16) || (regAddr > 0x2F)) {
+      error = EINVAL;
+      return error;
+    }
+    mSPITxBuf[0] = regAddr | (1 << 7); // Set the READ bit
+    mSPIRxBuf[1] = 0;
+    mState = STATE_GETREG;
+    call SPIFRM.clr(); // CS LOW
+    error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2);
+
+    return error;
+
+  }
+  
+  command error_t HplLIS3L02DQ.setReg(uint8_t regAddr, uint8_t val) {
+    error_t error = SUCCESS;
+
+    if((regAddr < 0x16) || (regAddr > 0x2F)) {
+      error = EINVAL;
+      return error;
+    }
+    mSPITxBuf[0] = regAddr;
+    mSPITxBuf[1] = val;
+    mState = STATE_SETREG;
+    error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2);
+
+    return error;
+  }
+
+  async event void SpiPacket.sendDone(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t spi_error ) {
+    error_t error = spi_error;
+
+    switch (mState) {
+    case STATE_GETREG:
+      mState = STATE_IDLE;
+      call SPIFRM.set(); // CS HIGH
+      signal HplLIS3L02DQ.getRegDone(error, (txBuf[0] & 0x7F) , rxBuf[1]);
+      break;
+    case STATE_SETREG:
+      mState = STATE_IDLE;
+      signal HplLIS3L02DQ.setRegDone(error, (txBuf[0] & 0x7F), txBuf[1]);
+      break;
+    case STATE_STARTING:
+      mState = STATE_IDLE;
+      call SPIFRM.set();
+      post StartDone();
+      break;
+    case STATE_STOPPING:
+      mState = STATE_STOPPED;
+      post StopDone();
+    default:
+      mState = STATE_IDLE;
+      break;
+    }
+    return;
+  }
+
+  async event void InterruptAlert.fired() {
+    // This alert is decoupled from whatever state the MAX136x is in. 
+    // Upper layers must handle dealing with this alert appropriately.
+    signal HplLIS3L02DQ.alertThreshold();
+    return;
+  }
+
+  default event void SplitControl.startDone( error_t error ) { return; }
+  default event void SplitControl.stopDone( error_t error ) { return; }
+
+  default async event void HplLIS3L02DQ.alertThreshold(){ return; }
+
+}
diff --git a/tos/chips/lis3l02dq/LIS3L02DQ.h b/tos/chips/lis3l02dq/LIS3L02DQ.h
new file mode 100644
index 00000000..1f79770b
--- /dev/null
+++ b/tos/chips/lis3l02dq/LIS3L02DQ.h
@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Types and definitions for the ST LIS3L02DQ 3-axis Accelerometer
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $
+ */
+
+#ifndef _LIS3L02DQ_H
+#define _LIS3L02DQ_H
+
+#define LIS3L02DQ_OFFSET_X		(0x16)
+#define LIS3L02DQ_OFFSET_Y		(0x17)
+#define LIS3L02DQ_OFFSET_Z		(0x18)
+#define LIS3L02DQ_GAIN_X		(0x19)
+#define LIS3L02DQ_GAIN_Y		(0x1A)
+#define LIS3L02DQ_GAIN_Z		(0x1B)
+
+#define LIS3L02DQ_CTRL_REG1		(0x20)
+#define LIS3L02DQ_CTRL_REG2		(0x21)
+
+#define LIS3L02DQ_WAKE_UP_CFG		(0x23)
+#define LIS3L02DQ_WAKE_UP_SRC		(0x24)
+#define LIS3L02DQ_WAKE_UP_ACK		(0x25)
+
+#define LIS3L02DQ_STATUS_REG		(0x27)
+
+#define LIS3L02DQ_OUTX_L		(0x28)
+#define LIS3L02DQ_OUTX_H		(0x29)
+#define LIS3L02DQ_OUTY_L		(0x2A)
+#define LIS3L02DQ_OUTY_H		(0x2B)
+#define LIS3L02DQ_OUTZ_L		(0x2C)
+#define LIS3L02DQ_OUTZ_H		(0x2D)
+
+#define LIS3L02DQ_THS_L			(0x2E)
+#define LIS3L02DQ_THS_H			(0x2F)
+
+#define LIS3L01DQ_CTRL_REG1_PD(_x)	(((_x) & 0x3) << 6)
+#define LIS3L01DQ_CTRL_REG1_DF(_x)	(((_x) & 0x3) << 4)
+#define LIS3L01DQ_CTRL_REG1_ST		(1 << 3)
+#define LIS3L01DQ_CTRL_REG1_ZEN		(1 << 2)
+#define LIS3L01DQ_CTRL_REG1_YEN		(1 << 1)
+#define LIS3L01DQ_CTRL_REG1_XEN		(1 << 0)
+
+#define LIS3L01DQ_CTRL_REG2_RES		(1 << 7)
+#define LIS3L01DQ_CTRL_REG2_BDU		(1 << 6)
+#define LIS3L01DQ_CTRL_REG2_BLE		(1 << 5)
+#define LIS3L01DQ_CTRL_REG2_BOOT	(1 << 4)
+#define LIS3L01DQ_CTRL_REG2_IEN		(1 << 3)
+#define LIS3L01DQ_CTRL_REG2_DRDY	(1 << 2)
+#define LIS3L01DQ_CTRL_REG2_SIM		(1 << 1)
+#define LIS3L01DQ_CTRL_REG2_DAS		(1 << 0)
+
+#define LIS3L02DQ_WAKE_UP_CFG_AOI	(1 << 7)
+#define LIS3L02DQ_WAKE_UP_CFG_LIR	(1 << 6)
+#define LIS3L02DQ_WAKE_UP_CFG_ZHIE	(1 << 5)
+#define LIS3L02DQ_WAKE_UP_CFG_ZLIE	(1 << 4)
+#define LIS3L02DQ_WAKE_UP_CFG_YHIE	(1 << 3)
+#define LIS3L02DQ_WAKE_UP_CFG_YLIE	(1 << 2)
+#define LIS3L02DQ_WAKE_UP_CFG_XHIE	(1 << 1)
+#define LIS3L02DQ_WAKE_UP_CFG_XLIE	(1 << 0)
+
+typedef enum {
+  LIS_AFLAGS_NONE,
+  LIS_AFLAGS_HIGH,
+  LIS_AFLAGS_LOW,
+  LIS_AFLAGS_BOTH
+} lis_alertflags_t;
+
+#endif /* _LIS3L02DQ_H */
diff --git a/tos/chips/m16c62p/McuSleepC.nc b/tos/chips/m16c62p/McuSleepC.nc
new file mode 100755
index 00000000..864cca1d
--- /dev/null
+++ b/tos/chips/m16c62p/McuSleepC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Wiring of TEP 112 (Microcontroller Power Management).
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+configuration McuSleepC
+{
+  provides interface McuSleep;
+  provides interface McuPowerState;
+
+  uses interface McuPowerOverride;
+}
+implementation
+{
+  components McuSleepP,
+      M16c62pControlC;
+
+  McuSleep = McuSleepP;
+  McuPowerState = McuSleepP;
+  McuSleepP = McuPowerOverride;
+  McuSleepP.M16c62pControl -> M16c62pControlC;
+}
diff --git a/tos/chips/m16c62p/McuSleepP.nc b/tos/chips/m16c62p/McuSleepP.nc
new file mode 100755
index 00000000..3dffaf8c
--- /dev/null
+++ b/tos/chips/m16c62p/McuSleepP.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of TEP 112 (Microcontroller Power Management).
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+module McuSleepP
+{
+  provides interface McuSleep;
+  provides interface McuPowerState;
+
+  uses interface McuPowerOverride;
+  uses interface M16c62pControl;
+}
+implementation
+{
+  async command void McuSleep.sleep()
+  {
+    call M16c62pControl.sleep();
+  }
+
+  async command void McuPowerState.update()
+  {
+  }
+
+  default async command mcu_power_t McuPowerOverride.lowestState()
+  {
+    return M16C62P_POWER_STOP;
+  }
+}
diff --git a/tos/chips/m16c62p/adc/Adc.h b/tos/chips/m16c62p/adc/Adc.h
new file mode 100755
index 00000000..feec1d11
--- /dev/null
+++ b/tos/chips/m16c62p/adc/Adc.h
@@ -0,0 +1,23 @@
+/* $Id: Adc.h,v 1.1 2009-09-07 14:12:25 r-studio Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ * @author David Gay
+ */
+#ifndef __ADC_H__
+#define __ADC_H__
+
+#include "M16c62pAdc.h"
+
+/* Read and ReadNow share client ids */
+#define UQ_ADC_READ "adc.read"
+#define UQ_ADC_READNOW UQ_ADC_READ
+#define UQ_ADC_READSTREAM "adc.readstream"
+
+#endif  // __ADC_H__
diff --git a/tos/chips/m16c62p/adc/AdcP.nc b/tos/chips/m16c62p/adc/AdcP.nc
new file mode 100755
index 00000000..dce7da5d
--- /dev/null
+++ b/tos/chips/m16c62p/adc/AdcP.nc
@@ -0,0 +1,151 @@
+/* $Id: AdcP.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Convert M16c62p HAL A/D interface to the HIL interfaces.
+ * @author Fan Zhang <fanzha@ltu.se>
+ */
+#include "Timer.h"
+
+module AdcP
+{
+  provides {
+    interface Read<uint16_t>[uint8_t client];
+    interface ReadNow<uint16_t>[uint8_t client];
+  }
+  uses {
+    interface M16c62pAdcSingle;
+    interface M16c62pAdcConfig[uint8_t client];
+  }
+}
+implementation {
+  enum {
+    IDLE,
+    ACQUIRE_DATA,
+    ACQUIRE_DATA_NOW,
+  };
+
+  /* Resource reservation is required, and it's incorrect to call getData
+     again before dataReady is signaled, so there are no races in correct
+     programs */
+  norace uint8_t state;
+  norace uint8_t client;
+  norace uint16_t val;
+
+  uint8_t channel() {
+    return call M16c62pAdcConfig.getChannel[client]();
+  }
+
+  uint8_t precision() {
+    return call M16c62pAdcConfig.getPrecision[client]();
+  }
+
+  uint8_t prescaler() {
+    return call M16c62pAdcConfig.getPrescaler[client]();
+  }
+
+  void sample() {
+    call M16c62pAdcSingle.getData(channel(), precision(), prescaler());
+  }
+
+  error_t startGet(uint8_t newState, uint8_t newClient) {
+    /* Note: we retry imprecise results in dataReady */
+    state = newState;
+    client = newClient;
+    sample();
+
+    return SUCCESS;
+  }
+
+  command error_t Read.read[uint8_t c]() {
+    return startGet(ACQUIRE_DATA, c);
+  }
+
+  async command error_t ReadNow.read[uint8_t c]() {
+    return startGet(ACQUIRE_DATA_NOW, c);
+  }
+
+  task void acquiredData() {
+    state = IDLE;
+    signal Read.readDone[client](SUCCESS, val);
+  }
+
+  async event void M16c62pAdcSingle.dataReady(uint16_t data, bool precise) {
+    switch (state)
+    {
+      case ACQUIRE_DATA:
+		if (!precise)
+		  sample();
+		else
+		{
+		    val = data;
+		    post acquiredData();
+		}
+		break;
+
+      case ACQUIRE_DATA_NOW:
+		if (!precise)
+		  sample();
+		else
+		{
+		    state = IDLE;
+		    signal ReadNow.readDone[client](SUCCESS, data);
+		}
+		break;
+
+      default:
+		break;
+     }
+  }
+
+  /* Configuration defaults. Read ground fast! ;-) */
+  default async command uint8_t M16c62pAdcConfig.getChannel[uint8_t c]() {
+    return M16c62p_ADC_CHL_AN0;
+  }
+
+  default async command uint8_t M16c62pAdcConfig.getPrecision[uint8_t c]() {
+    return M16c62p_ADC_PRECISION_10BIT;
+  }
+
+  default async command uint8_t M16c62pAdcConfig.getPrescaler[uint8_t c]() {
+    return M16c62p_ADC_PRESCALE_2;
+  }
+
+  default event void Read.readDone[uint8_t c](error_t e, uint16_t d) { }
+  default async event void ReadNow.readDone[uint8_t c](error_t e, uint16_t d) { }
+}
diff --git a/tos/chips/m16c62p/adc/AdcReadClientC.nc b/tos/chips/m16c62p/adc/AdcReadClientC.nc
new file mode 100755
index 00000000..e803a921
--- /dev/null
+++ b/tos/chips/m16c62p/adc/AdcReadClientC.nc
@@ -0,0 +1,40 @@
+/* $Id: AdcReadClientC.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Provide, as per TEP101, arbitrated access via a Read interface to the
+ * M16c62p ADC.  Users of this component must link it to an
+ * implementation of M16c62pAdcConfig which provides the ADC parameters
+ * (channel, etc).
+ * 
+ * @author Fan Zhang <fanzha@ltu.se>
+ */
+
+#include "Adc.h"
+
+generic configuration AdcReadClientC() {
+  provides interface Read<uint16_t>;
+  uses {
+    interface M16c62pAdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components WireAdcP, M16c62pAdcC;
+
+  enum {
+    ID = unique(UQ_ADC_READ),
+    HAL_ID = unique(UQ_M16c62pADC_RESOURCE)
+  };
+
+  Read = WireAdcP.Read[ID];
+  M16c62pAdcConfig = WireAdcP.M16c62pAdcConfig[ID];
+  WireAdcP.Resource[ID] -> M16c62pAdcC.Resource[HAL_ID];
+  ResourceConfigure = M16c62pAdcC.ResourceConfigure[HAL_ID];
+}
diff --git a/tos/chips/m16c62p/adc/AdcReadNowClientC.nc b/tos/chips/m16c62p/adc/AdcReadNowClientC.nc
new file mode 100755
index 00000000..37db02cd
--- /dev/null
+++ b/tos/chips/m16c62p/adc/AdcReadNowClientC.nc
@@ -0,0 +1,43 @@
+/* $Id: AdcReadNowClientC.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Provide, as per TEP101, Resource-based access to the M16c62p ADC via a
+ * ReadNow interface.  Users of this component must link it to an
+ * implementation of M16c62pAdcConfig which provides the ADC parameters
+ * (channel, etc).
+ * 
+ * @author Fan Zhang <fanzha@ltu.se>
+ */
+
+#include "Adc.h"
+
+generic configuration AdcReadNowClientC() {
+  provides {
+    interface Resource;
+    interface ReadNow<uint16_t>;
+  }
+  uses {
+    interface M16c62pAdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components WireAdcP, M16c62pAdcC;
+
+  enum {
+    ID = unique(UQ_ADC_READNOW),
+    HAL_ID = unique(UQ_M16c62pADC_RESOURCE)
+  };
+
+  ReadNow = WireAdcP.ReadNow[ID];
+  M16c62pAdcConfig = WireAdcP.M16c62pAdcConfig[ID];
+  Resource = M16c62pAdcC.Resource[HAL_ID];
+  ResourceConfigure = M16c62pAdcC.ResourceConfigure[HAL_ID];
+}
diff --git a/tos/chips/m16c62p/adc/AdcReadStreamClientC.nc b/tos/chips/m16c62p/adc/AdcReadStreamClientC.nc
new file mode 100755
index 00000000..bf0fae3d
--- /dev/null
+++ b/tos/chips/m16c62p/adc/AdcReadStreamClientC.nc
@@ -0,0 +1,40 @@
+/* $Id: AdcReadStreamClientC.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Provide, as per TEP101, arbitrated access via a ReadStream interface to
+ * the M16c62p ADC.  Users of this component must link it to an
+ * implementation of M16c62pAdcConfig which provides the ADC parameters
+ * (channel, etc).
+ * 
+ * @author Fan Zhang <fanzha@ltu.se>
+ */
+
+#include "Adc.h"
+
+generic configuration AdcReadStreamClientC() {
+  provides interface ReadStream<uint16_t>;
+  uses {
+    interface M16c62pAdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components WireAdcStreamP, M16c62pAdcC;
+
+  enum {
+    ID = unique(UQ_ADC_READSTREAM),
+    HAL_ID = unique(UQ_M16c62pADC_RESOURCE)
+  };
+
+  ReadStream = WireAdcStreamP.ReadStream[ID];
+  M16c62pAdcConfig = WireAdcStreamP.M16c62pAdcConfig[ID];
+  WireAdcStreamP.Resource[ID] -> M16c62pAdcC.Resource[HAL_ID];
+  ResourceConfigure = M16c62pAdcC.ResourceConfigure[HAL_ID];
+}
diff --git a/tos/chips/m16c62p/adc/AdcStreamP.nc b/tos/chips/m16c62p/adc/AdcStreamP.nc
new file mode 100755
index 00000000..ccb61446
--- /dev/null
+++ b/tos/chips/m16c62p/adc/AdcStreamP.nc
@@ -0,0 +1,270 @@
+/* $Id: AdcStreamP.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Convert M16c62p HAL A/D interface to the HIL interfaces.
+ * @author Fan Zhang <hauer@tkn.tu-berlin.de>
+ */
+#include "Timer.h"
+
+module AdcStreamP
+{
+  provides {
+    interface Init @atleastonce();
+    interface ReadStream<uint16_t>[uint8_t client];
+  }
+  uses {
+    interface M16c62pAdcSingle;
+    interface M16c62pAdcConfig[uint8_t client];
+    //interface M16c62pCalibrate;
+    interface Alarm<TMicro, uint32_t>;
+  }
+}
+implementation {
+  enum {
+    NSTREAM = uniqueCount(UQ_ADC_READSTREAM)
+  };
+
+  /* Resource reservation is required, and it's incorrect to call getData
+     again before dataReady is signaled, so there are no races in correct
+     programs */
+  norace uint8_t client = NSTREAM;
+
+  /* Stream data */
+  struct list_entry_t {
+    uint16_t count;
+    struct list_entry_t * ONE_NOK next;
+  };
+  struct list_entry_t *bufferQueue[NSTREAM];
+  struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM];
+  uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount;
+
+  norace uint16_t count;
+  norace uint16_t * COUNT_NOK(count) buffer; 
+  norace uint16_t * BND_NOK(buffer, buffer+count) pos;
+  norace uint32_t now, period;
+
+
+  command error_t Init.init() {
+    uint8_t i;
+
+    for (i = 0; i != NSTREAM; i++)
+      bufferQueueEnd[i] = &bufferQueue[i];
+    
+    return SUCCESS;
+  }
+
+  uint8_t channel() {
+    return call M16c62pAdcConfig.getChannel[client]();
+  }
+
+  uint8_t precision() {
+    return call M16c62pAdcConfig.getPrecision[client]();
+  }
+
+  uint8_t prescaler() {
+    return call M16c62pAdcConfig.getPrescaler[client]();
+  }
+
+  void sample() {
+    call M16c62pAdcSingle.getData(channel(), precision(), prescaler());
+  }
+
+  command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) {
+    if (n < sizeof(struct list_entry_t))
+      return ESIZE;
+    atomic
+      {
+	struct list_entry_t * ONE newEntry = TCAST(struct list_entry_t * ONE, buf);
+
+	if (!bufferQueueEnd[c]) // Can't post right now.
+	  return FAIL;
+
+	newEntry->count = n;
+	newEntry->next = NULL;
+	*bufferQueueEnd[c] = newEntry;
+	bufferQueueEnd[c] = &newEntry->next;
+      }
+    return SUCCESS;
+  }
+
+  task void readStreamDone() {
+    uint8_t c = client;
+    //uint32_t actualPeriod = call M16c62pCalibrate.actualMicro(period);
+    uint32_t actualPeriod = period; // fanzha not debug
+    atomic
+      {
+	bufferQueue[c] = NULL;
+	bufferQueueEnd[c] = &bufferQueue[c];
+      }
+
+    client = NSTREAM;
+    signal ReadStream.readDone[c](SUCCESS, actualPeriod);
+  }
+
+  task void readStreamFail() {
+    /* By now, the pending bufferDone has been signaled (see readStream). */
+    struct list_entry_t *entry;
+    uint8_t c = client;
+
+    atomic entry = bufferQueue[c];
+    for (; entry; entry = entry->next){
+      uint16_t tmp_count __DEPUTY_UNUSED__ = entry->count;
+      signal ReadStream.bufferDone[c](FAIL, TCAST(uint16_t * COUNT_NOK(tmp_count),entry), entry->count);
+    }
+
+    atomic
+      {
+	bufferQueue[c] = NULL;
+	bufferQueueEnd[c] = &bufferQueue[c];
+      }
+
+    client = NSTREAM;
+    signal ReadStream.readDone[c](FAIL, 0);
+  }
+
+  task void bufferDone() {
+    uint16_t *b, c;
+    atomic
+      {
+	b = lastBuffer;
+	c = lastCount;
+	lastBuffer = NULL;
+      }
+
+    signal ReadStream.bufferDone[client](SUCCESS, b, c);
+  }
+
+  void nextAlarm() {
+    call Alarm.startAt(now, period);
+    now += period;
+  }
+
+  async event void Alarm.fired() {
+    sample();
+  }
+
+  command error_t ReadStream.read[uint8_t c](uint32_t usPeriod)
+  {
+    /* The first reading may be imprecise. So we just do a dummy read
+       to get things rolling - this is indicated by setting count to 0 */
+    buffer = pos = NULL;
+    count = 0;
+    //period = call M16c62pCalibrate.calibrateMicro(usPeriod);
+    client = c;
+    sample();
+
+    return SUCCESS;
+  }
+
+  void nextBuffer() {
+    atomic
+      {
+	struct list_entry_t *entry = bufferQueue[client];
+
+	if (!entry)
+	  {
+	    // all done
+	    bufferQueueEnd[client] = NULL; // prevent post
+	    post readStreamDone();
+	  }
+	else
+	  {
+            uint16_t tmp_count;
+	    bufferQueue[client] = entry->next;
+	    if (!bufferQueue[client])
+	      bufferQueueEnd[client] = &bufferQueue[client];
+	    pos = buffer = NULL;
+	    count = entry->count;
+            tmp_count = count;
+	    pos = buffer = TCAST(uint16_t * COUNT_NOK(tmp_count), entry);
+	    nextAlarm();
+	  }
+      }
+  }
+
+  async event void M16c62pAdcSingle.dataReady(uint16_t data, bool precise) {
+    if (client == NSTREAM)
+      return;
+
+    if (count == 0)
+      {
+	now = call Alarm.getNow();
+	nextBuffer();
+      }
+    else
+      {
+	*pos++ = data;
+	if (pos == buffer + count)
+	  {
+	    atomic
+	      {
+		if (lastBuffer)
+		  {
+		    /* We failed to signal bufferDone in time. Fail. */
+		    bufferQueueEnd[client] = NULL; // prevent post
+		    post readStreamFail();
+		    return;
+		  }
+		else
+		  {
+		    lastCount = count;
+		    lastBuffer = buffer;
+		  }
+	      }
+	    post bufferDone();
+	    nextBuffer();
+	  }
+	else
+	  nextAlarm();
+      }       
+  }
+
+  /* Configuration defaults. Read ground fast! ;-) */
+  default async command uint8_t M16c62pAdcConfig.getChannel[uint8_t c]() {
+    return M16c62p_ADC_CHL_AN0;
+  }
+
+  default async command uint8_t M16c62pAdcConfig.getPrecision[uint8_t c]() {
+    return M16c62p_ADC_PRECISION_10BIT;
+  }
+
+  default async command uint8_t M16c62pAdcConfig.getPrescaler[uint8_t c]() {
+    return M16c62p_ADC_PRESCALE_2;
+  }
+}
diff --git a/tos/chips/m16c62p/adc/HplM16c62pAdc.nc b/tos/chips/m16c62p/adc/HplM16c62pAdc.nc
new file mode 100755
index 00000000..2c1b4c5c
--- /dev/null
+++ b/tos/chips/m16c62p/adc/HplM16c62pAdc.nc
@@ -0,0 +1,174 @@
+/// $Id: HplM16c62pAdc.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "M16c62pAdc.h"
+
+/**
+ * HPL interface to the M16c62p A/D conversion subsystem. 
+ * <p>
+ * conversion when the ADC and ADC interrupt are enabled.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */
+
+interface HplM16c62pAdc {
+  /**
+   * Read the ADCON0 (ADC control register 0)
+   * @return Current ADCON0 value
+   */
+  async command M16c62pADCON0_t getADCON0();
+  /**
+   * Set the ADCON0 (ADC control register 0)
+   * @param adcon0 New ADCON0 value
+   */
+  async command void setADCON0(M16c62pADCON0_t adcon0);
+/////////////////////////////////////////////////////////////////////////////////
+  /**
+   * Read the ADCON1 (ADC control) register
+   * @return Current ADCON1 value
+   */
+  async command M16c62pADCON1_t getADCON1();
+  /**
+   * Set the ADCON1 (ADC control) register
+   * @param adcon1 New ADCON1 value
+   */
+  async command void setADCON1(M16c62pADCON1_t adcon1);
+//////////////////////////////////////////////////////////////////////////////////   
+  /**
+   * Read the ADCON2 (ADC control) register
+   * @return Current ADCON2 value
+   */
+  async command M16c62pADCON2_t getADCON2();
+  /**
+   * Set the ADCON2 (ADC control) register
+   * @param adcon2 New ADCON2 value
+   */
+  async command void setADCON2(M16c62pADCON2_t adcon2);
+/////////////////////////////////////////////////////////////////////////////////
+  /**
+   * Read the latest A/D conversion result
+   * @return A/D value
+   */
+  async command uint16_t getValue();
+
+  /// A/D control utilities. All of these clear any pending A/D interrupt.
+
+  /**
+   * Enable ADC sampling
+   */
+  async command void enableAdc();
+  /**
+   * Disable ADC sampling
+   */
+  async command void disableAdc();
+
+  /**
+   * Enable ADC interrupt
+   */
+  async command void enableInterruption();
+  /**
+   * Disable ADC interrupt
+   */
+  async command void disableInterruption();
+  /**
+   * Clear the ADC interrupt flag
+   */
+  async command void resetInterrupt();
+
+  /**
+   * Start ADC conversion. If ADC interrupts are enabled, the dataReady event
+   * will be signaled once (in non-continuous mode) or repeatedly (in
+   * continuous mode).
+   */
+  async command void startConversion();
+  /**
+   * Enable continuous sampling
+   */
+  async command void setContinuous();
+  /**
+   * Disable continuous sampling
+   */
+  async command void setSingle();
+
+  /* A/D status checks */
+
+  /**
+   * Is ADC enabled?
+   * @return TRUE if the ADC is enabled, FALSE otherwise
+   */
+  async command bool isEnabled();
+  /**
+   * Is A/D conversion in progress?
+   * @return TRUE if the A/D conversion is in progress, FALSE otherwise
+   */
+  async command bool isStarted();
+  /**
+   * Is A/D conversion complete? Note that this flag is automatically
+   * cleared when an A/D interrupt occurs.
+   * @return TRUE if the A/D conversion is complete, FALSE otherwise
+   */
+  async command bool isComplete();
+  
+  
+  /**
+   * Set ADC precision selection bits
+   * @param scale New ADC prescision. Must be one of the M16c62p_ADC_PRECISION_xxx
+   *   values from M16c62pAdc.h
+   */
+  async command void setPrecision(uint8_t precision);
+  
+  /**
+   * Set ADC prescaler selection bits
+   * @param scale New ADC prescaler. Must be one of the M16c62p_ADC_PRESCALE_xxx
+   *   values from M16c62pAdc.h
+   */
+  async command void setPrescaler(uint8_t scale);
+
+  /**
+   * Cancel A/D conversion and any pending A/D interrupt. Also disables the
+   * ADC interruption (otherwise a sample might start at the next sleep
+   * instruction). This command can assume that the A/D converter is enabled. 
+   * @return TRUE if an A/D conversion was in progress or an A/D interrupt
+   *   was pending, FALSE otherwise. In single conversion mode, a return
+   *   of TRUE implies that the dataReady event will not be signaled.
+   */
+  async command bool cancel();
+
+  /**
+   * A/D interrupt occured
+   * @param data Latest A/D conversion result
+   */
+  async event void dataReady(uint16_t data);     
+}
diff --git a/tos/chips/m16c62p/adc/HplM16c62pAdcC.nc b/tos/chips/m16c62p/adc/HplM16c62pAdcC.nc
new file mode 100755
index 00000000..d7476c5c
--- /dev/null
+++ b/tos/chips/m16c62p/adc/HplM16c62pAdcC.nc
@@ -0,0 +1,57 @@
+/// $Id: HplM16c62pAdcC.nc,v 1.3 2010-06-29 22:07:45 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "M16c62pAdc.h"
+
+/**
+ * HPL for the M16c62p A/D conversion susbsystem.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */
+
+configuration HplM16c62pAdcC {
+  provides interface HplM16c62pAdc;
+}
+implementation {
+  components HplM16c62pAdcP, McuSleepC;
+
+  HplM16c62pAdc = HplM16c62pAdcP;
+  HplM16c62pAdcP.McuPowerState -> McuSleepC;
+  
+#ifdef THREADS
+  components PlatformInterruptC;
+    HplM16c62pAdcP.PlatformInterrupt -> PlatformInterruptC;
+#endif
+}
diff --git a/tos/chips/m16c62p/adc/HplM16c62pAdcP.nc b/tos/chips/m16c62p/adc/HplM16c62pAdcP.nc
new file mode 100755
index 00000000..97ccc4e7
--- /dev/null
+++ b/tos/chips/m16c62p/adc/HplM16c62pAdcP.nc
@@ -0,0 +1,177 @@
+/// $Id: HplM16c62pAdcP.nc,v 1.3 2010-06-29 22:07:45 scipio Exp $
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "M16c62pAdc.h"
+
+/**
+ * HPL for the M16c62p A/D conversion susbsystem.
+ *
+ * @author Fan Zhang <fanzha@ltu.se>
+ *
+ */
+
+module HplM16c62pAdcP
+{
+  provides interface HplM16c62pAdc;
+  uses interface McuPowerState;
+  
+#ifdef THREADS
+  uses interface PlatformInterrupt;
+#define POST_AMBLE() call PlatformInterrupt.postAmble()
+#else 
+#define POST_AMBLE()
+#endif 
+}
+implementation
+{
+  //=== Direct read of HW registers. =================================
+  async command M16c62pADCON0_t HplM16c62pAdc.getADCON0() { 
+    return *(M16c62pADCON0_t*)&ADCON0; 
+  }
+  async command M16c62pADCON1_t HplM16c62pAdc.getADCON1() { 
+    return *(M16c62pADCON1_t*)&ADCON1; 
+  }
+  async command M16c62pADCON2_t HplM16c62pAdc.getADCON2() { 
+    return *(M16c62pADCON2_t*)&ADCON2; 
+  }
+  async command uint16_t HplM16c62pAdc.getValue() { 
+    uint8_t channel = ADCON0.BYTE&0x07;
+    if(channel==0x00){return AD0.WORD;}
+    else if(channel==0x01){return AD1.WORD;}
+    else if(channel==0x02){return AD2.WORD;}
+    else if(channel==0x03){return AD3.WORD;}
+    else if(channel==0x04){return AD4.WORD;}
+    else if(channel==0x05){return AD5.WORD;}
+    else if(channel==0x06){return AD6.WORD;}
+    else {return AD7.WORD;}
+     
+  }
+
+  DEFINE_UNION_CAST(ADCON02int, M16c62pADCON0_t, uint8_t); // type change from M16c62pADCON0_t to uint8_t
+  DEFINE_UNION_CAST(ADCON12int, M16c62pADCON1_t, uint8_t);
+  DEFINE_UNION_CAST(ADCON22int, M16c62pADCON2_t, uint8_t);
+
+  //=== Direct write of HW registers. ================================
+  async command void HplM16c62pAdc.setADCON0( M16c62pADCON0_t x ) { 
+    ADCON0.BYTE = ADCON02int(x); 
+  }
+  async command void HplM16c62pAdc.setADCON1( M16c62pADCON1_t x ) { 
+    ADCON1.BYTE = ADCON12int(x); 
+  }
+  async command void HplM16c62pAdc.setADCON2( M16c62pADCON2_t x ) { 
+    ADCON2.BYTE = ADCON22int(x); 
+  }
+  /* precision = 8 or 10, that means 8bit or 10bit */ 
+  async command void HplM16c62pAdc.setPrecision(uint8_t precision){
+    if(precision == M16c62p_ADC_PRECISION_8BIT)
+      ADCON1.BIT.BITS = 0;    
+    else if(precision == M16c62p_ADC_PRECISION_10BIT)
+      ADCON1.BIT.BITS = 1;
+  }
+  /* Set ADC prescaler selection bits */
+  async command void HplM16c62pAdc.setPrescaler(uint8_t scale){
+    
+    if(scale == 0x00){ADCON2.BIT.CKS2=0;ADCON1.BIT.CKS1=0;ADCON0.BIT.CKS0=0;} // fAD/4 prescaler
+    else if(scale == 0x01){ADCON2.BIT.CKS2=0;ADCON1.BIT.CKS1=0;ADCON0.BIT.CKS0=1;} // fAD/2 prescaler
+    else if((scale == 0x02) || (scale == 0x03)){ADCON2.BIT.CKS2=0;ADCON1.BIT.CKS1=1;ADCON0.BIT.CKS0=0;} // fAD prescaler
+    else if(scale == 0x04){ADCON2.BIT.CKS2=1;ADCON1.BIT.CKS1=0;ADCON0.BIT.CKS0=0;} // fAD/12 prescaler
+    else if(scale == 0x05){ADCON2.BIT.CKS2=1;ADCON1.BIT.CKS1=0;ADCON0.BIT.CKS0=1;} // fAD/6 prescaler
+    else if((scale == 0x06) || (scale == 0x07)){ADCON2.BIT.CKS2=1;ADCON1.BIT.CKS1=1;ADCON0.BIT.CKS0=0;} // fAD/3 prescaler
+    
+  }
+
+  // Individual bit manipulation. These all clear any pending A/D interrupt.
+  async command void HplM16c62pAdc.enableAdc() {
+    ADCON1.BIT.VCUT = 1; 
+    call McuPowerState.update();
+  }
+  async command void HplM16c62pAdc.disableAdc() {
+    ADCON1.BIT.VCUT = 0; 
+    call McuPowerState.update();
+  }
+  // A/D conversion interrupt control register is ADIC 2009-2-9 by Fan Zhang
+  async command void HplM16c62pAdc.enableInterruption() { ADIC.BIT.ILVL2=0;ADIC.BIT.ILVL1=0;ADIC.BIT.ILVL0=1; }
+  async command void HplM16c62pAdc.disableInterruption() { ADIC.BIT.ILVL2=0;ADIC.BIT.ILVL1=0;ADIC.BIT.ILVL0=0; }
+  async command void HplM16c62pAdc.startConversion() { ADCON0.BIT.ADST=1; } // ADST=6
+  async command void HplM16c62pAdc.resetInterrupt() { } // Clear the ADC interrupt flag
+  /**
+   * Enable continuous sampling, that is repeat sampling mode
+   */
+  async command void HplM16c62pAdc.setContinuous() {  ADCON0.BIT.MD0=0;ADCON0.BIT.MD1=1;  }
+  /**
+   * Disable continuous sampling, enable one-shot sampling mode
+   */
+  async command void HplM16c62pAdc.setSingle() { ADCON0.BIT.MD0=0;ADCON0.BIT.MD1=0; }
+  
+  /* A/D status checks */
+  async command bool HplM16c62pAdc.isEnabled(){       
+    // ADCON1.VCUT control the Vref connection, 0 disable connection, 1 connection
+    return ADCON1.BIT.VCUT; 
+  }
+
+  async command bool HplM16c62pAdc.isStarted() {
+    return ADCON0.BIT.ADST; 
+  }
+  
+  async command bool HplM16c62pAdc.isComplete() {
+    // interrupt flag bit
+    return ADIC.BIT.IR; 
+  }
+  
+  
+  /* A/D interrupt handlers. Signals dataReady event with interrupts enabled */
+  default async event void HplM16c62pAdc.dataReady(uint16_t done) { }
+  M16C_INTERRUPT_HANDLER(M16C_AD)
+  {
+    uint16_t data = call HplM16c62pAdc.getValue();
+    
+    __nesc_enable_interrupt();
+    signal HplM16c62pAdc.dataReady(data);
+    POST_AMBLE();
+  }
+
+  async command bool HplM16c62pAdc.cancel() { 
+    /* This is tricky */
+    atomic
+    {
+	    /* To cancel a conversion, first turn off ADEN, then turn off
+	       ADSC. We also cancel any pending interrupt.
+	       Finally we reenable the ADC.
+	    */
+	    //ADCON1.VCUT=0;
+	    //ADIC.ILVL2=0;ADIC.ILVL1=0;ADIC.ILVL0=0; /* This disable ADC interrupt... */
+	    ADCON0.BIT.ADST=0;
+	    //ADCON1.VCUT=1;
+	    return TRUE;
+     }
+  }
+}
diff --git a/tos/chips/m16c62p/adc/M16c62pAdc.h b/tos/chips/m16c62p/adc/M16c62pAdc.h
new file mode 100755
index 00000000..ed60765b
--- /dev/null
+++ b/tos/chips/m16c62p/adc/M16c62pAdc.h
@@ -0,0 +1,177 @@
+// $Id: M16c62pAdc.h,v 1.2 2010-06-29 22:07:45 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Martin Turon <mturon@xbow.com>
+// @author Hu Siquan <husq@xbow.com>
+
+#ifndef __H_M16C62PADC_H__
+#define __H_M16C62PADC_H__
+
+//================== 8 channel 10-bit ADC ==============================
+
+/* Voltage Reference Settings */
+enum {
+    M16c62p_ADC_VREF_OFF = 0, //!< VR+ = AREF   and VR- = GND
+    M16c62p_ADC_VREF_AVCC = 1,//!< VR+ = AVcc   and VR- = GND
+};
+
+/* Voltage Reference Settings */
+enum {
+    M16c62p_ADC_RIGHT_ADJUST = 0,
+    M16c62p_ADC_LEFT_ADJUST = 1,
+};
+
+
+/* ADC Channel Settings */
+enum {
+    M16c62p_ADC_CHL_AN0 = 0,
+    M16c62p_ADC_CHL_AN1,
+    M16c62p_ADC_CHL_AN2,
+    M16c62p_ADC_CHL_AN3,
+    M16c62p_ADC_CHL_AN4,
+    M16c62p_ADC_CHL_AN5,
+    M16c62p_ADC_CHL_AN6,
+    M16c62p_ADC_CHL_AN7,
+    M16c62p_ADC_CHL_AN10 = 8,
+    M16c62p_ADC_CHL_AN11,
+    M16c62p_ADC_CHL_AN12,
+    M16c62p_ADC_CHL_AN13,
+    M16c62p_ADC_CHL_AN14,
+    M16c62p_ADC_CHL_AN15,
+    M16c62p_ADC_CHL_AN16,
+    M16c62p_ADC_CHL_AN17,
+
+};
+
+/* ADC Control Register 0 */
+typedef struct
+{
+    uint8_t ch012   : 3;  //!< Analog Channel and Gain Selection Bits
+    uint8_t md01   : 2;  //!< ADC operation mode select bit
+    uint8_t trg : 1;  //!< Trigger select bit
+    uint8_t adst  : 1;  //!< ADC start flag
+    uint8_t cks0  :1;  //!< Frequency Selection Bit 0
+} M16c62pADCON0_t;
+
+/* ADC Control Register 1 */
+typedef struct
+{
+    uint8_t scan01  : 2;  //!< ADC scan mode select bit
+    uint8_t md2  : 1;  //!< ADC operation mode select bit 1
+    uint8_t bits  : 1;  //!< 8/10-bit mode select bit
+    uint8_t cks1  : 1;  //!< Frequency select bit 1
+    uint8_t vcut  : 1;  //!< Vref connect bit
+    uint8_t opa01  : 2;  //!< External op-amp connection mode bit
+} M16c62pADCON1_t;
+
+/* ADC Control Register 2 */
+typedef struct
+{
+    uint8_t smp  : 1;  //!< ADC method select bit
+    uint8_t adgsel01  : 2;  //!< port group select: 00 select P10 group
+                            //                      01 select NULL
+                            //                      10 select P0 group
+                            //                      11 select P2 group
+    uint8_t bit3  : 1;  //!< reserved bit (always set to 0)
+    uint8_t cks2  : 1;  //!< Frequency select bit 2
+    uint8_t bit5  : 1;  //!< nothing assigned.
+    uint8_t bit6  : 1;  //!< nothing assigned.
+    uint8_t bit7  : 1;  //!< nothing assigned.
+} M16c62pADCON2_t;
+
+/* ADC Prescaler Settings */
+/* Note: each platform must define M16c62p_ADC_PRESCALE to the smallest
+   prescaler which guarantees full A/D precision. */
+enum {
+    M16c62p_ADC_PRESCALE_2 = 1,
+    M16c62p_ADC_PRESCALE_3 = 6,
+    M16c62p_ADC_PRESCALE_4 = 0,
+    M16c62p_ADC_PRESCALE_6 = 5,
+    M16c62p_ADC_PRESCALE_12 = 4,
+
+    // This special value is used to ask the platform for the prescaler
+    // which gives full precision.
+    M16c62p_ADC_PRESCALE = 2,
+};
+
+/* ADC Precision Settings */
+enum {
+    M16c62p_ADC_PRECISION_10BIT = 10,
+    M16c62p_ADC_PRECISION_8BIT = 8,
+};
+
+/* ADC operation mode select bit */
+enum {
+    M16c62p_ADC_ONESHOT_MODE = 0,
+    M16c62p_ADC_REPEAT_MODE,
+};
+
+/* ADC Enable Settings */
+enum {
+    M16c62p_ADC_ENABLE_OFF = 0,
+    M16c62p_ADC_ENABLE_ON,
+};
+
+/* ADC Start Conversion Settings */
+enum {
+    M16c62p_ADC_START_CONVERSION_OFF = 0,
+    M16c62p_ADC_START_CONVERSION_ON,
+};
+
+/* ADC Free Running Select Settings */
+enum {
+    M16c62p_ADC_FREE_RUNNING_OFF = 0,
+    M16c62p_ADC_FREE_RUNNING_ON,
+};
+
+/* ADC Interrupt Flag Settings */
+enum {
+    M16c62p_ADC_INT_FLAG_OFF = 0,
+    M16c62p_ADC_INT_FLAG_ON,
+};
+
+/* ADC Interrupt Enable Settings */
+enum {
+    M16c62p_ADC_INT_ENABLE_OFF = 0,
+    M16c62p_ADC_INT_ENABLE_ON,
+};
+
+
+typedef uint8_t M16c62p_ADCH_t;         //!< ADC data register high
+typedef uint8_t M16c62p_ADCL_t;         //!< ADC data register low
+
+// The resource identifier string for the ADC subsystem
+#define UQ_M16c62pADC_RESOURCE "M16c62padc.resource"
+
+#endif //  __H_M16C62PADC_H_
+
diff --git a/tos/chips/m16c62p/adc/M16c62pAdcC.nc b/tos/chips/m16c62p/adc/M16c62pAdcC.nc
new file mode 100755
index 00000000..97d60762
--- /dev/null
+++ b/tos/chips/m16c62p/adc/M16c62pAdcC.nc
@@ -0,0 +1,78 @@
+/// $Id: M16c62pAdcC.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "M16c62pAdc.h"
+
+/**
+ * HAL for the M16c62p A/D conversion susbsystem.
+ *
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */
+
+configuration M16c62pAdcC
+{
+  provides {
+    interface Resource[uint8_t client];
+    interface M16c62pAdcSingle;
+    interface M16c62pAdcMultiple;
+  }
+  uses interface ResourceConfigure[uint8_t client];
+}
+implementation
+{
+  components M16c62pAdcP, HplM16c62pAdcC, PlatformC, MainC,
+    new RoundRobinArbiterC(UQ_M16c62pADC_RESOURCE) as AdcArbiter,
+    new AsyncStdControlPowerManagerC() as PM;
+
+  Resource = AdcArbiter;
+  ResourceConfigure = AdcArbiter;
+  M16c62pAdcSingle = M16c62pAdcP;
+  M16c62pAdcMultiple = M16c62pAdcP;
+
+  PlatformC.SubInit -> M16c62pAdcP;
+
+  M16c62pAdcP.HplM16c62pAdc -> HplM16c62pAdcC;
+  //M16c62pAdcP.M16c62pCalibrate -> PlatformC;
+
+  PM.AsyncStdControl -> M16c62pAdcP;
+  PM.ResourceDefaultOwner -> AdcArbiter;
+}
diff --git a/tos/chips/m16c62p/adc/M16c62pAdcConfig.nc b/tos/chips/m16c62p/adc/M16c62pAdcConfig.nc
new file mode 100755
index 00000000..cd6f0d18
--- /dev/null
+++ b/tos/chips/m16c62p/adc/M16c62pAdcConfig.nc
@@ -0,0 +1,42 @@
+/* $Id: M16c62pAdcConfig.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "M16c62pAdc.h"
+
+/**
+ * Clients of higher level must provide this interface to
+ * specify which channel to sample, and with what parameters.
+ *
+ * @author Fan Zang <fanzha@ltu.se>
+ */
+interface M16c62pAdcConfig {
+  /**
+   * Obtain channel.
+   * @return The A/D channel to use. Must be one of the M16c62p_ADC_CHL_xxx
+   *    values from M16c62pAdc.h.
+   */
+  async command uint8_t getChannel();
+
+  /**
+   * Obtain precision setting.
+   * @return The number of bits, valid values are 8 (M16c62p_ADC_PRECISION_8BIT)
+   *   or 10 (M16c62p_ADC_PRECISION_10BIT)
+   */
+  async command uint8_t getPrecision();
+
+  /**
+   * Obtain prescaler value.
+   * @return The prescaler value to use. Must be one of the 
+   *   M16c62p_ADC_PRESCALE_xxx values from M16c62pAdc.h.
+   */
+  async command uint8_t getPrescaler();
+  
+  
+}
diff --git a/tos/chips/m16c62p/adc/M16c62pAdcMultiple.nc b/tos/chips/m16c62p/adc/M16c62pAdcMultiple.nc
new file mode 100755
index 00000000..81e85658
--- /dev/null
+++ b/tos/chips/m16c62p/adc/M16c62pAdcMultiple.nc
@@ -0,0 +1,128 @@
+/// $Id: M16c62pAdcMultiple.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Hardware Abstraction Layer interface of Atmega128 for acquiring data
+ * from multiple channels using the ATmega128's free-running mode.
+ * <p>
+ * Because of the possibility that samples may be imprecise after 
+ * switching channels and/or reference voltages, and because there
+ * is a one sample delay on swithcing channels and reference voltages,
+ * M16c62pADCMultiple is complex. Two straightforward uses are:
+ * <ol type="A">
+ * <li>Acquire N samples from channel C:
+ *    <ol>
+ *    <li>call getData to start sampling on channel C at the desired rate
+ *       (note that the choice of prescalers is very limited, so you
+ *       don't have many choices for sampling rate)
+ *    <li>ignore the first dataReady event
+ *    <li>use the results of the next N dataReady() events, return FALSE
+ *       on the last one
+ *    </ol>
+ * <li>Acquire one sample each from channels C1, ..., Cn (this pseudocode
+ *    assumes that none of these channels are differential)
+ *    <ol>
+ *    <li>call getData to start sampling on channel C1
+ *    <li>on the ith dataReady event switch to channel Ci+1 by changing
+ *       *newChannel
+ *    <li>the data passed to the ith dataReady event is for channel Ci-1
+ *       (the data from the first dataReady event is ignored)
+ *    </ol>
+ * </ol>
+ *
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */        
+
+#include "M16c62pAdc.h"
+
+interface M16c62pAdcMultiple
+{
+  /**
+   * Initiates free-running ADC conversions, with the ability to switch 
+   * channels and reference-voltage with a one sample delay.
+   *
+   * @param channel Initial A/D conversion channel. The channel can 
+   *   be changed in the dataReady event, though these changes happen
+   *   with a one-sample delay (this is a hardware restriction).
+   * @param refVoltage Initial A/D reference voltage. See the
+   *   M16c62p_ADC_VREF_xxx constants in M16c62pADC.h. Like the channel,
+   *   the reference voltage can be changed in the dataReady event with
+   *   a one-sample delay.
+   * @param leftJustify TRUE to place A/D result in high-order bits 
+   *   (i.e., shifted left by 6 bits), low to place it in the low-order bits
+   * @param prescaler Prescaler value for the A/D conversion clock. If you 
+   *  specify M16c62p_ADC_PRESCALE, a prescaler will be chosen that guarantees
+   *  full precision. Other prescalers can be used to get faster conversions. 
+   *  See the ATmega128 manual for details.
+   * @return TRUE if the conversion will be precise, FALSE if it will be 
+   *   imprecise (due to a change in reference voltage, or switching to a
+   *   differential input channel)
+   */
+  async command bool getData(uint8_t channel, uint8_t precision, uint8_t prescaler);
+  
+  /**
+   * Returns the next sample in a free-running conversion. Allow the user
+   * to switch channels and/or reference voltages with a one sample delay.
+   *
+   * @param data a 2 byte unsigned data value sampled by the ADC.
+   * @param precise if this conversion was precise, FALSE if it wasn't 
+   *   (we assume that the second conversion after a change of reference
+   *   voltage or after switching to a differential channel is precise)
+   * @param channel Channel this sample was from.
+   * @param newChannel Change this parameter to switch to a new channel
+   *   for the second next sample.
+   * @param newRefVoltage Change this parameter to change the reference 
+   *   voltage for the second next sample.
+   *
+   * @return TRUE to continue sampling, FALSE to stop.
+   */	
+  async event bool dataReady(uint16_t data, bool precise, uint8_t channel,
+			     uint8_t *newChannel, uint8_t *newRefVoltage);
+
+
+  /* Note: there is no cancel in free-running mode because you cannot tell
+     from a successful (or unsuccessful) cancellation whether there will
+     be another dataReady event. Thus you cannot tell when you can safely
+     reuse the ADC (short of waiting one ADC conversion period, in which
+     case you might as well use the result of dataReady to cancel).
+  */
+}
diff --git a/tos/chips/m16c62p/adc/M16c62pAdcP.nc b/tos/chips/m16c62p/adc/M16c62pAdcP.nc
new file mode 100755
index 00000000..f7a15e66
--- /dev/null
+++ b/tos/chips/m16c62p/adc/M16c62pAdcP.nc
@@ -0,0 +1,240 @@
+/* $Id: M16c62pAdcP.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "M16c62pAdc.h"
+
+/**
+ * Internal component of the M16c62p A/D HAL.
+ *
+ * @author Fan Zhang
+ */
+
+module M16c62pAdcP
+{
+  provides {
+    interface Init;
+    interface AsyncStdControl;
+    interface M16c62pAdcSingle;
+    interface M16c62pAdcMultiple;
+  }
+  uses {
+    interface HplM16c62pAdc;
+    //interface M16c62pCalibrate;
+  }
+}
+implementation
+{  
+  /* type change from uint8_t to M16c62pADCON0_t, this function is defined at m16c62phardware.h */
+  DEFINE_UNION_CAST(int2ADCON0, uint8_t, M16c62pADCON0_t); // 
+  DEFINE_UNION_CAST(int2ADCON1, uint8_t, M16c62pADCON1_t);
+  DEFINE_UNION_CAST(int2ADCON2, uint8_t, M16c62pADCON2_t);
+  command error_t Init.init() {
+    atomic
+    {
+	    M16c62pADCON0_t adcon_0;
+	    M16c62pADCON1_t adcon_1;
+	    M16c62pADCON2_t adcon_2;
+
+	    adcon_0 = int2ADCON0(0x00);
+	    adcon_0 = int2ADCON0(0x20);
+	    adcon_0 = int2ADCON0(0x01); 
+	
+	    call HplM16c62pAdc.setADCON0(adcon_0);
+        call HplM16c62pAdc.setADCON1(adcon_1);
+        call HplM16c62pAdc.setADCON2(adcon_2);
+    }
+    return SUCCESS;
+  }
+
+  /* We enable the A/D when start is called, and disable it when stop is
+     called. This drops A/D conversion latency by a factor of two (but
+     increases idle mode power consumption a little). 
+  */
+  async command error_t AsyncStdControl.start() {
+    atomic call HplM16c62pAdc.enableAdc();
+    return SUCCESS;
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    atomic call HplM16c62pAdc.disableAdc();
+
+    return SUCCESS;
+  }
+
+  /* Return TRUE if switching to 'channel' with reference voltage 'refVoltage'
+     will give a precise result (the first sample after changing reference
+     voltage or switching to/between a differential channel is imprecise)
+  */
+  inline bool isPrecise(uint8_t admux, uint8_t channel, uint8_t refVoltage) {
+    return TRUE;
+  }
+  
+  /**
+   * Indicates a sample has been recorded by the ADC as the result
+   * of a ADC interrupt.
+   *
+   * @param data a 2 byte unsigned data value sampled by the ADC.
+   * @param precise if the conversion precise, FALSE if it wasn't. 
+   */	
+  async event void HplM16c62pAdc.dataReady(uint16_t data) {
+    
+    /* A single sample. Disable the ADC interrupt to avoid starting
+	   a new sample at the next "sleep" instruction. */
+	call HplM16c62pAdc.disableInterruption();
+	call HplM16c62pAdc.disableAdc(); 
+	signal M16c62pAdcSingle.dataReady(data, TRUE);
+	
+  }
+
+  /* Start sampling based on request parameters 
+   * one-shot mode default
+   * refVoltage default
+   */
+  void getData(uint8_t channel,uint8_t precision, uint8_t prescaler) {
+    M16c62pADCON0_t adcon0_t;
+    M16c62pADCON1_t adcon1_t;
+    M16c62pADCON2_t adcon2_t;
+
+    if(channel < M16c62p_ADC_CHL_AN10)
+    {
+        adcon2_t.adgsel01 = 0;
+    }
+    else if((channel > M16c62p_ADC_CHL_AN7) && (channel <= M16c62p_ADC_CHL_AN17))
+    {
+        adcon2_t.adgsel01 = 2;
+        channel=channel-8;
+    }
+    adcon0_t.ch012 = channel;
+    
+    adcon0_t.md01 = 0;
+    adcon0_t.trg = 0;
+    adcon0_t.adst = M16c62p_ADC_START_CONVERSION_ON;
+    
+    adcon1_t.md2 = 0;
+    if(precision == M16c62p_ADC_PRECISION_10BIT)     // 10-bit mode
+    {
+        adcon1_t.bits = 1;
+    }
+    else
+    {
+        adcon1_t.bits = 0;
+    }
+    adcon1_t.vcut = M16c62p_ADC_ENABLE_ON;
+    adcon1_t.opa01 = 0;
+    
+    adcon2_t.smp = 1; // sample and hold
+    
+    if(prescaler == 0x00){adcon2_t.cks2=0;adcon1_t.cks1=0;adcon0_t.cks0=0;} // fAD/4 prescaler
+    else if(prescaler == 0x01){adcon2_t.cks2=0;adcon1_t.cks1=0;adcon0_t.cks0=1;} // fAD/2 prescaler
+    else if((prescaler == 0x02) || (prescaler == 0x03)){adcon2_t.cks2=0;adcon1_t.cks1=1;adcon0_t.cks0=0;} // fAD prescaler
+    else if(prescaler == 0x04){adcon2_t.cks2=1;adcon1_t.cks1=0;adcon0_t.cks0=0;} // fAD/12 prescaler
+    else if(prescaler == 0x05){adcon2_t.cks2=1;adcon1_t.cks1=0;adcon0_t.cks0=1;} // fAD/6 prescaler
+    else if((prescaler == 0x06) || (prescaler == 0x07)){adcon2_t.cks2=1;adcon1_t.cks1=1;adcon0_t.cks0=0;} // fAD/3 prescaler
+
+    call HplM16c62pAdc.enableInterruption();
+    
+    call HplM16c62pAdc.setADCON2(adcon2_t);
+    call HplM16c62pAdc.setADCON1(adcon1_t);
+    call HplM16c62pAdc.setADCON0(adcon0_t);
+  }
+
+  async command bool M16c62pAdcSingle.getData(uint8_t channel,
+					     uint8_t precision, uint8_t prescaler) {
+    atomic
+    {
+		getData(channel, precision, prescaler);
+		return TRUE;
+    }
+  }
+
+  async command bool M16c62pAdcSingle.cancel() 
+  {
+    /* There is no M16c62pAdcMultiple.cancel, for reasons discussed in that
+       interface */
+    return call HplM16c62pAdc.cancel();
+  }
+
+  async command bool M16c62pAdcMultiple.getData(uint8_t channel, uint8_t precision, uint8_t prescaler)
+  {
+    atomic
+    {
+		getData(channel, precision, prescaler);
+
+		return TRUE;
+      }
+  }
+
+  default async event void M16c62pAdcSingle.dataReady(uint16_t data, bool precise) {
+  }
+
+  default async event bool M16c62pAdcMultiple.dataReady(uint16_t data, bool precise, uint8_t channel,
+						       uint8_t *newChannel, uint8_t *newRefVoltage) {
+    return FALSE; // stop conversion if we somehow end up here.
+  }
+}
diff --git a/tos/chips/m16c62p/adc/M16c62pAdcPlatform.nc b/tos/chips/m16c62p/adc/M16c62pAdcPlatform.nc
new file mode 100644
index 00000000..7a50f1bf
--- /dev/null
+++ b/tos/chips/m16c62p/adc/M16c62pAdcPlatform.nc
@@ -0,0 +1,6 @@
+interface M16c62pAdcPlatform
+{
+  async command void adcOn();
+  
+  async command void adcOff();
+}
\ No newline at end of file
diff --git a/tos/chips/m16c62p/adc/M16c62pAdcSingle.nc b/tos/chips/m16c62p/adc/M16c62pAdcSingle.nc
new file mode 100755
index 00000000..bf19fd1d
--- /dev/null
+++ b/tos/chips/m16c62p/adc/M16c62pAdcSingle.nc
@@ -0,0 +1,90 @@
+/// $Id: M16c62pAdcSingle.nc,v 1.2 2010-06-29 22:07:45 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Hardware Abstraction Layer interface of M16c62p for acquiring
+ * a one-shot sampling from a channel.
+ *
+ * @author Fan Zhang <fanzha@ltu.se>
+ */
+
+#include "M16c62pAdc.h"
+
+interface M16c62pAdcSingle
+{
+  /**
+   * Initiates an ADC conversion on a given channel.
+   *
+   * @param channel A/D conversion channel.
+   * @param refVoltage Select reference voltage for A/D conversion. See
+   *   the M16c62p_ADC_VREF_xxx constants in M16c62pADC.h
+   * @param precision 8 to place A/D result in 8 bits, 10 to place it in 
+   *   the 10 bits
+   * @param prescaler Prescaler value for the A/D conversion clock. If you 
+   *  specify M16c62p_ADC_PRESCALE, a prescaler will be chosen that guarantees
+   *  full precision. Other prescalers can be used to get faster conversions. 
+   *  See the M16c62p manual for details.
+   * @return TRUE if the conversion will be precise, FALSE if it will be 
+   *   imprecise (due to a change in refernce voltage, or switching to a
+   *   differential input channel)
+   */
+  async command bool getData(uint8_t channel, uint8_t precision, uint8_t prescaler);
+  
+  /**
+   * Indicates a sample has been recorded by the ADC as the result
+   * of a <code>getData()</code> command.
+   *
+   * @param data a 2 byte unsigned data value sampled by the ADC.
+   * @param precise if the conversion precise, FALSE if it wasn't. This
+   *   values matches the result from the <code>getData</code> call.
+   */	
+  async event void dataReady(uint16_t data, bool precise);
+
+  /**
+   * Cancel an outstanding getData operation. Use with care, to
+   * avoid problems with races between the dataReady event and cancel.
+   * @return TRUE if a conversion was in-progress or an interrupt
+   *   was pending. dataReady will not be signaled. FALSE if the
+   *   conversion was already complete. dataReady will be (or has
+   *   already been) signaled.
+   */
+  async command bool cancel();
+}
diff --git a/tos/chips/m16c62p/adc/WireAdcP.nc b/tos/chips/m16c62p/adc/WireAdcP.nc
new file mode 100755
index 00000000..9e49fd24
--- /dev/null
+++ b/tos/chips/m16c62p/adc/WireAdcP.nc
@@ -0,0 +1,37 @@
+/* $Id: WireAdcP.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Support component for AdcReadClientC and AdcReadNowClientC.
+ *
+ * @author David Gay
+ */
+
+configuration WireAdcP {
+  provides {
+    interface Read<uint16_t>[uint8_t client]; 
+    interface ReadNow<uint16_t>[uint8_t client];
+  }
+  uses {
+    interface M16c62pAdcConfig[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  components M16c62pAdcC, AdcP,
+    new ArbitratedReadC(uint16_t) as ArbitrateRead;
+
+  Read = ArbitrateRead;
+  ReadNow = AdcP;
+  Resource = ArbitrateRead.Resource;
+  M16c62pAdcConfig = AdcP;	// provide default M16c62pAdcConfig interface
+
+  ArbitrateRead.Service -> AdcP.Read;
+  AdcP.M16c62pAdcSingle -> M16c62pAdcC;
+}
diff --git a/tos/chips/m16c62p/adc/WireAdcStreamP.nc b/tos/chips/m16c62p/adc/WireAdcStreamP.nc
new file mode 100755
index 00000000..20f73259
--- /dev/null
+++ b/tos/chips/m16c62p/adc/WireAdcStreamP.nc
@@ -0,0 +1,40 @@
+/* $Id: WireAdcStreamP.nc,v 1.1 2009-09-07 14:12:25 r-studio Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Support component for AdcReadStreamClientC.
+ *
+ * @author Fan Zhang <fanzha@ltu.se>
+ */
+
+#include "Adc.h"
+
+configuration WireAdcStreamP {
+  provides interface ReadStream<uint16_t>[uint8_t client];
+  uses {
+    interface M16c62pAdcConfig[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  components M16c62pAdcC, AdcStreamP, PlatformC, MainC,
+    new AlarmMicro32C(), 
+    new ArbitratedReadStreamC(uniqueCount(UQ_ADC_READSTREAM), uint16_t) as ArbitrateReadStream;
+
+  Resource = ArbitrateReadStream;
+  ReadStream = ArbitrateReadStream;
+  M16c62pAdcConfig = AdcStreamP;
+
+  ArbitrateReadStream.Service -> AdcStreamP;
+
+  AdcStreamP.Init <- MainC;
+  AdcStreamP.M16c62pAdcSingle -> M16c62pAdcC;
+  //AdcStreamP.M16c62pCalibrate -> PlatformC;
+  AdcStreamP.Alarm -> AlarmMicro32C;
+}
diff --git a/tos/chips/m16c62p/bits.h b/tos/chips/m16c62p/bits.h
new file mode 100755
index 00000000..d91eb859
--- /dev/null
+++ b/tos/chips/m16c62p/bits.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __BITS_H__
+#define __BITS_H__
+
+#define BIT0  0x1
+#define BIT1  0x2
+#define BIT2  0x4
+#define BIT3  0x8
+#define BIT4  0x10
+#define BIT5  0x20
+#define BIT6  0x40
+#define BIT7  0x80
+#define BIT8  0x100
+#define BIT9  0x200
+#define BIT10 0x400
+#define BIT11 0x800
+#define BIT12 0x1000
+#define BIT13 0x2000
+#define BIT14 0x4000
+#define BIT15 0x8000
+#define BIT16 0x10000
+#define BIT17 0x20000
+#define BIT18 0x40000
+#define BIT19 0x80000
+#define BIT20 0x100000
+#define BIT21 0x200000
+#define BIT22 0x400000
+#define BIT23 0x800000
+#define BIT24 0x1000000
+#define BIT25 0x2000000
+#define BIT26 0x4000000
+#define BIT27 0x8000000
+#define BIT28 0x10000000
+#define BIT29 0x20000000
+#define BIT30 0x40000000
+#define BIT31 0x80000000
+
+#endif // __BITS_H__
+
diff --git a/tos/chips/m16c62p/control/M16c62pControl.h b/tos/chips/m16c62p/control/M16c62pControl.h
new file mode 100644
index 00000000..40bd38c2
--- /dev/null
+++ b/tos/chips/m16c62p/control/M16c62pControl.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This file includes defines to be used together with the control interfaces
+ * for the M16c/62p mcu.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#ifndef __M16C62P_CONTROL_H__
+#define __M16C62P_CONTROL_H__
+
+#define UQ_M16C62P_STOP_MODE_CONTROL "UQ_M16C62P_STOP_MODE_CONTROL"
+#define UQ_M16C62P_SYSTEM_CLOCK_CONTROL "UQ_M16C62P_SYSTEM_CLOCK_CONTROL"
+
+
+/**
+ * Input to SystemClockControl.minSpeed() and
+ * M16c62pControl.defaultSystemClock().
+ */
+typedef enum
+{
+  M16C62P_DONT_CARE = 0x0,
+  M16C62P_SUB_CLOCK = 0x1,
+  M16C62P_MAIN_CLOCK_DIV_0 = 0x2,
+  M16C62P_MAIN_CLOCK_DIV_2 = 0x4,
+  M16C62P_MAIN_CLOCK_DIV_4 = 0x8,
+  M16C62P_MAIN_CLOCK_DIV_8 = 0x9,
+  M16C62P_MAIN_CLOCK_DIV_16 = 0xc,
+  M16C62P_PLL_CLOCK = 0xd,
+} M16c62pSystemClock;
+
+/**
+ * The different PLL multipliers supported by the M16c/62p mcu.
+ */
+typedef enum
+{
+  M16C62P_PLL_2 = 0x1,
+  M16C62P_PLL_4 = 0x2,
+  M16C62P_PLL_6 = 0x3,
+  M16C62P_PLL_8 = 0x4
+} M16c62pPLLMultiplier;
+
+#endif // __M16C62P_CONTROL_H__
+
diff --git a/tos/chips/m16c62p/control/M16c62pControl.nc b/tos/chips/m16c62p/control/M16c62pControl.nc
new file mode 100755
index 00000000..c90c91c9
--- /dev/null
+++ b/tos/chips/m16c62p/control/M16c62pControl.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to initialize, put the M16c/62p to sleep and default system speed.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "M16c62pControl.h"
+ 
+interface M16c62pControl
+{
+  /**
+   * Initializes the mcu.
+   */
+   command error_t init();
+   
+  /**
+   * Sets the default system clock speed.
+   *
+   * @param def Default system speed ( != M16C62P_DONT_CARE)
+   */
+  command error_t defaultSystemClock(M16c62pSystemClock def);
+  
+  /**
+   * Put the mcu to sleep.
+   */
+  async command void sleep();
+}
diff --git a/tos/chips/m16c62p/control/M16c62pControlC.nc b/tos/chips/m16c62p/control/M16c62pControlC.nc
new file mode 100755
index 00000000..5e7b9900
--- /dev/null
+++ b/tos/chips/m16c62p/control/M16c62pControlC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Wiring for the M16c62pControlP module.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+configuration M16c62pControlC
+{
+  provides interface M16c62pControl;
+}
+implementation
+{
+  components M16c62pControlP,
+      M16c62pControlPlatformC;
+
+  M16c62pControl = M16c62pControlP;
+  M16c62pControlP.PlatformCtrl -> M16c62pControlPlatformC;
+
+}
diff --git a/tos/chips/m16c62p/control/M16c62pControlP.nc b/tos/chips/m16c62p/control/M16c62pControlP.nc
new file mode 100755
index 00000000..feddd5fc
--- /dev/null
+++ b/tos/chips/m16c62p/control/M16c62pControlP.nc
@@ -0,0 +1,349 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the Control Interfaces for the M16c/62p mcu.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+
+#include "M16c62pControl.h"
+
+module M16c62pControlP
+{
+  provides interface M16c62pControl;
+  provides interface StopModeControl[uint8_t client];
+  provides interface SystemClockControl[uint8_t client];
+
+  uses interface M16c62pControlPlatform as PlatformCtrl;
+}
+implementation
+{
+  M16c62pSystemClock default_system_clock = M16C62P_MAIN_CLOCK_DIV_0; // Default system clock speed
+  M16c62pSystemClock system_clock = M16C62P_DONT_CARE; 
+  uint8_t client_system_clock[uniqueCount(UQ_M16C62P_SYSTEM_CLOCK_CONTROL)];
+  uint8_t num_system_clock_clients = uniqueCount(UQ_M16C62P_SYSTEM_CLOCK_CONTROL);
+  
+  // Take +1 incase of rest in the division
+  uint8_t client_allow_stop_mode[(uniqueCount(UQ_M16C62P_STOP_MODE_CONTROL)/8) + 1];
+  uint8_t num_allow_stop_mode_clients = uniqueCount(UQ_M16C62P_STOP_MODE_CONTROL);
+  bool update_sleep_mode = false;
+  bool allow_stop_mode = true; // Stop mode enabled/disabled, Default: Enabled.
+  
+  void PLLOn()
+  {
+    uint8_t tmp;
+    uint32_t i;
+
+    CM0.BYTE = 0x08; // Main clock + Sub clock.
+    CM1.BYTE = 0x20; //Clear previous cpu speed setting.
+    PM2.BYTE = 0x00; // PLL > 16MHz (2 waits).
+    tmp = 0x90 + PLL_MULTIPLIER;
+    PLC0.BYTE = tmp; // PLL ON.
+    // Wait for PLL to become stable (50 ms).
+    // TODO (henrik) Make this more efficient when time allows it.For example
+    //               use timers or busy waiting.
+    //               Tried busy waiting but tosboot started to include alot of
+    //               things that it shouldn't which lead to compile errors.
+    for (i = 0; i < 50000UL * MAIN_CRYSTAL_SPEED; ++i)
+      asm volatile("nop");
+    CM1.BYTE = 0x22; // PLL as system clock.
+    call PlatformCtrl.PLLOn();
+  }
+
+  void PLLOff()
+  {
+    uint8_t tmp;
+    CLR_BIT(CM1.BYTE, 1); // Main clock
+    tmp = 0x10 + PLL_MULTIPLIER;
+    PLC0.BYTE = tmp; // Turn off PLL clock
+    call PlatformCtrl.PLLOff();
+  }
+  
+  error_t setSystemClock(M16c62pSystemClock set_clock)
+  {
+    M16c62pSystemClock clock = set_clock;
+    atomic
+    {      
+      if (clock == M16C62P_DONT_CARE)
+      {
+        clock = default_system_clock;
+      }
+      
+      PRCR.BYTE = BIT1 | BIT0; // Turn off protection for cpu & clock register.
+      
+      if (system_clock == M16C62P_PLL_CLOCK)
+      {
+        PLLOff();
+      }
+
+      // Set correct system clock speed.
+      if (clock == M16C62P_MAIN_CLOCK_DIV_8)
+      {
+        SET_BIT(CM0.BYTE, 6);
+      }
+      else if (clock >= M16C62P_MAIN_CLOCK_DIV_0 &&
+               clock <= M16C62P_MAIN_CLOCK_DIV_16)
+      { // Main clock divided by 0, 2 ,4 or 16
+        CLR_BIT(CM0.BYTE, 6); // Remove division by 8
+        CLR_FLAG(CM1.BYTE, (0x3 << 6)); // Clear previous cpu speed setting
+        SET_FLAG(CM1.BYTE, ((clock >> 2) << 6)); // New cpu speed
+      }
+      else if (clock == M16C62P_SUB_CLOCK)
+      {
+        SET_BIT(CM0.BYTE, 4); // Sub clock on.
+        SET_BIT(CM0.BYTE, 7); // Sub clock as CPU clock  
+      }
+      else if (clock == M16C62P_PLL_CLOCK)
+      {
+        PLLOn();
+      }
+      // TODO(Henrik) Maybe need to wait for a while to make sure that the
+      //              crystals are stable?
+      CLR_BIT(CM1.BYTE, 5); // Low drive on Xin-Xout.
+      CLR_BIT(CM0.BYTE, 3); // Low drive on XCin-XCout.
+      PRCR.BYTE = 0;           // Turn on protection on all registers.
+      atomic system_clock = set_clock;
+      return SUCCESS;
+    }
+  }
+
+  error_t updateSystemClock()
+  {
+    M16c62pSystemClock clock = M16C62P_DONT_CARE;
+    uint8_t i;
+
+    atomic
+    {
+      for (i = 0; i < num_system_clock_clients; ++i)
+      {
+        if (clock < client_system_clock[i])
+        {
+          clock = client_system_clock[i];
+        }
+      }
+      
+      if (clock == system_clock)
+      {
+        return SUCCESS;
+      }
+      
+      return setSystemClock(clock); 
+    }
+  }
+
+  void initPin(volatile uint8_t *port, volatile uint8_t *port_d, uint8_t pin, uint16_t state)
+  {
+    uint8_t inactive = (state >> (pin*2)) & 0x3;
+    // Turn off protection of PD9
+    PRCR.BYTE = BIT2;
+    switch (inactive)
+    {
+      case M16C_PIN_INACTIVE_DONT_CARE:
+        break;
+      case M16C_PIN_INACTIVE_OUTPUT_LOW:
+        SET_BIT((*port_d), pin);
+        CLR_BIT((*port), pin);
+        break;
+      case M16C_PIN_INACTIVE_OUTPUT_HIGH:
+        SET_BIT((*port_d), pin);
+        SET_BIT((*port), pin);
+        break;
+      case M16C_PIN_INACTIVE_INPUT:
+        CLR_BIT((*port_d), pin);
+        CLR_BIT((*port), pin);
+        break;
+    }
+    PRCR.BYTE = 0;
+  }
+  
+  void initPort(volatile uint8_t *port, volatile uint8_t *port_d, uint16_t state)
+  {
+    initPin(port, port_d, 0, state);
+    initPin(port, port_d, 1, state);
+    initPin(port, port_d, 2, state);
+    initPin(port, port_d, 3, state);
+    initPin(port, port_d, 4, state);
+    initPin(port, port_d, 5, state);
+    initPin(port, port_d, 6, state);
+    initPin(port, port_d, 7, state);
+  }
+  
+  void initPins()
+  {
+    initPort(&P0.BYTE, &PD0.BYTE, PORT_P0_INACTIVE_STATE);
+    initPort(&P1.BYTE, &PD1.BYTE, PORT_P1_INACTIVE_STATE);
+    initPort(&P2.BYTE, &PD2.BYTE, PORT_P2_INACTIVE_STATE);
+    initPort(&P3.BYTE, &PD3.BYTE, PORT_P3_INACTIVE_STATE);
+    initPort(&P4.BYTE, &PD4.BYTE, PORT_P4_INACTIVE_STATE);
+    initPort(&P5.BYTE, &PD5.BYTE, PORT_P5_INACTIVE_STATE);
+    initPort(&P6.BYTE, &PD6.BYTE, PORT_P6_INACTIVE_STATE);
+    initPort(&P7.BYTE, &PD7.BYTE, PORT_P7_INACTIVE_STATE);
+    initPort(&P8.BYTE, &PD8.BYTE, PORT_P8_INACTIVE_STATE);
+    initPort(&P9.BYTE, &PD9.BYTE, PORT_P9_INACTIVE_STATE);
+    initPort(&P10.BYTE, &PD10.BYTE, PORT_P_10_INACTIVE_STATE);
+  }
+  
+  command error_t M16c62pControl.init()
+  {
+    uint8_t i;
+    uint8_t tmp;
+    initPins();
+    PRCR.BYTE = BIT1 | BIT0; // Turn off protection for cpu & clock register.
+
+    PM0.BYTE = BIT7;         // Single Chip mode. No BCLK output.
+    PM1.BYTE = BIT3;         // Expand internal memory, no global wait state.
+    PCLKR.BIT.PCLK0 = 1;     // Set Timer A and B clock bit to F1
+    PCLKR.BIT.PCLK1 = 1;     // Set Timer A and B clock bit to F1
+    
+    tmp = 0x10 + PLL_MULTIPLIER; // Prepare PLL multiplier
+    PLC0.BYTE = tmp; // Set PLL multiplier
+    
+    PRCR.BYTE = 0;
+ 
+    // Initialize the clock and stop mode control arrays.
+    for (i = 0; i < num_system_clock_clients; ++i)
+    {
+      client_system_clock[i] = M16C62P_DONT_CARE;
+    }
+    for (i = 0; i < (num_allow_stop_mode_clients/8) + 1; ++i)
+    {
+      client_allow_stop_mode[i] = 0xFF;
+    }
+    return setSystemClock(M16C62P_DONT_CARE);
+  }
+
+  command error_t M16c62pControl.defaultSystemClock(
+      M16c62pSystemClock def)
+  {
+    if (def == M16C62P_DONT_CARE)
+    {
+      return FAIL;
+    }
+    if (def == default_system_clock || system_clock != M16C62P_DONT_CARE)
+    {
+      default_system_clock = def;
+      return SUCCESS;
+    }
+    default_system_clock = def;
+    return setSystemClock(M16C62P_DONT_CARE);
+  }
+
+  void updateSleepMode()
+  {
+    uint8_t i;
+    for (i = 0; i < (num_allow_stop_mode_clients/8) + 1; ++i)
+    {
+      if (client_allow_stop_mode[i] != 0xFF)
+      {
+        allow_stop_mode = false;
+        return;
+      }
+    }
+    allow_stop_mode = true;
+  }
+
+  void waitMode()
+  {
+    __nesc_enable_interrupt();
+    asm ("wait");
+    asm volatile ("" : : : "memory");
+    __nesc_disable_interrupt();
+  }
+
+  void stopMode()
+  {
+    uint8_t cm0_tmp, cm1_tmp;
+    __nesc_enable_interrupt();
+    PRCR.BYTE = 1; // Turn off protection of system clock control registers
+    CLR_BIT(CM2.BYTE, 0);
+    cm0_tmp = CM0.BYTE;
+    cm1_tmp = CM1.BYTE;
+    CM0.BYTE = 0b00001000;
+    asm("bset 0,0x0007"); // Enter stop mode
+    asm("jmp.b MAIN_A");
+    asm("MAIN_A:");
+    asm volatile("nop");
+    asm volatile("nop");
+    asm volatile("nop");
+    asm volatile("nop");
+    asm volatile ("" : : : "memory");
+    __nesc_disable_interrupt();
+    CM0.BYTE = cm0_tmp;
+    CM1.BYTE = cm1_tmp;
+    PRCR.BIT.PRC0 = 0; // Turn on protection of system clock control registers
+  }
+
+  async command void M16c62pControl.sleep()
+  {
+    atomic if (update_sleep_mode)
+    {
+      updateSleepMode();
+    }
+    if (allow_stop_mode && system_clock != M16C62P_PLL_CLOCK)
+    {
+      stopMode();
+    }
+    else
+    {
+      waitMode();
+    }
+  }
+
+  async command void StopModeControl.allowStopMode[uint8_t client](bool allow)
+  {
+    atomic
+    {
+      WRITE_BIT(client_allow_stop_mode[client >> 3], client % 8, allow);
+      if (allow != allow_stop_mode)
+      {
+        update_sleep_mode = true;
+      }
+    }
+  }
+
+  command error_t SystemClockControl.minSpeed[uint8_t client](
+      M16c62pSystemClock speed)
+  {
+    atomic client_system_clock[client] = speed;
+    atomic if (system_clock < speed)
+    {
+      return updateSystemClock();
+    }
+    return SUCCESS;
+  }
+}
diff --git a/tos/chips/m16c62p/control/M16c62pControlPlatform.nc b/tos/chips/m16c62p/control/M16c62pControlPlatform.nc
new file mode 100644
index 00000000..c48ed1f7
--- /dev/null
+++ b/tos/chips/m16c62p/control/M16c62pControlPlatform.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to signal the platform that the mcu has changed the main clock
+ * speed, PLL is being turned on/off, etc.
+ * Needed so that the platform can take appropriate actions so
+ * that timers can be set to handle the PLL for example.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+interface M16c62pControlPlatform
+{
+  /**
+   * PLL is turned on.
+   */
+  async command void PLLOn();
+
+  /**
+   * PLL is turned off.
+   */
+  async command void PLLOff();
+}
diff --git a/tos/chips/m16c62p/control/StopModeControl.nc b/tos/chips/m16c62p/control/StopModeControl.nc
new file mode 100644
index 00000000..01d6cd86
--- /dev/null
+++ b/tos/chips/m16c62p/control/StopModeControl.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface used by components to signal if it
+ * allows the mcu to go into stop mode.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+interface StopModeControl
+{
+  /**
+   * Tells the mcu if it is allowed to go into stop mode.
+   *
+   * @param allow True if stop mode is allowed.
+   */
+  async command void allowStopMode(bool allow);
+}
diff --git a/tos/chips/m16c62p/control/StopModeControlC.nc b/tos/chips/m16c62p/control/StopModeControlC.nc
new file mode 100644
index 00000000..b18ca725
--- /dev/null
+++ b/tos/chips/m16c62p/control/StopModeControlC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "M16c62pControl.h"
+/**
+ * All components that need to control the mcus sleep
+ * mode should instantiate a component of this configuration.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+generic configuration StopModeControlC()
+{
+  provides interface StopModeControl;
+}
+implementation
+{
+  enum
+  {
+    CLIENT_ID = unique(UQ_M16C62P_STOP_MODE_CONTROL),
+  };
+
+  components M16c62pControlP;
+
+  StopModeControl = M16c62pControlP.StopModeControl[CLIENT_ID];
+}
diff --git a/tos/chips/m16c62p/control/SystemClockControl.nc b/tos/chips/m16c62p/control/SystemClockControl.nc
new file mode 100644
index 00000000..330c75fa
--- /dev/null
+++ b/tos/chips/m16c62p/control/SystemClockControl.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to control the allowed minimum speed of the mcu.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+interface SystemClockControl
+{
+  /**
+   * Control the minimum speed of the mcu.
+   *
+   * @param speed The allowed minimum speed.
+   */
+  command error_t minSpeed(M16c62pSystemClock speed);
+}
diff --git a/tos/chips/m16c62p/control/SystemClockControlC.nc b/tos/chips/m16c62p/control/SystemClockControlC.nc
new file mode 100644
index 00000000..be97af48
--- /dev/null
+++ b/tos/chips/m16c62p/control/SystemClockControlC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "M16c62pControl.h"
+
+/**
+ * Every component that needs to control the minimum speed
+ * of the mcu should instantiate a new component of this configuration.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+generic configuration SystemClockControlC()
+{
+  provides interface SystemClockControl;
+}
+implementation
+{
+  enum
+  {
+    CLIENT_ID = unique(UQ_M16C62P_SYSTEM_CLOCK_CONTROL),
+  };
+
+  components M16c62pControlP;
+
+  SystemClockControl = M16c62pControlP.SystemClockControl[CLIENT_ID];
+}
diff --git a/tos/chips/m16c62p/dac/HplM16c62pDac.nc b/tos/chips/m16c62p/dac/HplM16c62pDac.nc
new file mode 100755
index 00000000..02a9e0ad
--- /dev/null
+++ b/tos/chips/m16c62p/dac/HplM16c62pDac.nc
@@ -0,0 +1,35 @@
+/**
+ * HPL interface to the M16c62p D/A converers. 
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+interface HplM16c62pDac {
+  /**
+   * Sets the D/A value.
+   * @param value The new D/A value
+   */
+  async command void setValue(uint8_t value);
+  
+  /**
+   * Reads the current D/A value.
+   * @return D/A value
+   */
+  async command uint8_t getValue();
+
+  /**
+   * Enables the D/A converter.
+   */
+  async command void enable();
+
+  /**
+   * Disables the D/A converter.
+   */
+  async command void disable();
+
+  /**
+   * Checks the state of the D/A converter.
+   * @return TRUE if the D/A converter is enabled.
+   */
+  async command bool isEnabled();
+}
diff --git a/tos/chips/m16c62p/dac/HplM16c62pDacC.nc b/tos/chips/m16c62p/dac/HplM16c62pDacC.nc
new file mode 100755
index 00000000..42868c08
--- /dev/null
+++ b/tos/chips/m16c62p/dac/HplM16c62pDacC.nc
@@ -0,0 +1,17 @@
+/**
+ * HPL for the M16c62p D/A conversion susbsystem.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+configuration HplM16c62pDacC {
+  provides interface HplM16c62pDac as Dac0;
+  provides interface HplM16c62pDac as Dac1;
+}
+implementation {
+  components new HplM16c62pDacP((uint16_t)&DA0, 0) as Dac0_, 
+             new HplM16c62pDacP((uint16_t)&DA1, 1) as Dac1_;
+
+  Dac0 = Dac0_;
+  Dac1 = Dac1_;
+}
diff --git a/tos/chips/m16c62p/dac/HplM16c62pDacP.nc b/tos/chips/m16c62p/dac/HplM16c62pDacP.nc
new file mode 100755
index 00000000..c99b1104
--- /dev/null
+++ b/tos/chips/m16c62p/dac/HplM16c62pDacP.nc
@@ -0,0 +1,41 @@
+/**
+ * HPL for the M16c62p A/D conversion susbsystem.
+ *
+ * @author Fan Zhang <fanzha@ltu.se>
+ *
+ */
+
+generic module HplM16c62pDacP(uint16_t da_addr,
+                              uint8_t da_num)
+{
+  provides interface HplM16c62pDac;
+}
+implementation
+{
+#define da (*TCAST(volatile uint8_t* ONE, da_addr))
+
+  async command void HplM16c62pDac.setValue(uint8_t value)
+  {
+    da = value;
+  }
+  
+  async command uint8_t HplM16c62pDac.getValue()
+  {
+    return da;
+  }
+
+  async command void HplM16c62pDac.enable()
+  {
+    SET_BIT(DACON.BYTE, da_num);
+  }
+
+  async command void HplM16c62pDac.disable()
+  {
+    CLR_BIT(DACON.BYTE, da_num);
+  }
+
+  async command bool HplM16c62pDac.isEnabled()
+  {
+    return (READ_BIT(DACON.BYTE, da_num) ? true : false);
+  }
+}
diff --git a/tos/chips/m16c62p/interrupts.h b/tos/chips/m16c62p/interrupts.h
new file mode 100755
index 00000000..732152c2
--- /dev/null
+++ b/tos/chips/m16c62p/interrupts.h
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * M16C interrupt id defines.
+ *
+ * @author Per Lindgren
+ * @author Johan Eriksson
+ * @author Johan Nordlander
+ * @author Simon Aittamaa.
+ */
+
+#ifndef M16C_INTERRUPTS_H_
+#define M16C_INTERRUPTS_H_
+
+/* Software interrupts - bound to peripheral hardware */
+
+#define M16C_BRK		0
+#define M16C_INT3		4
+#define M16C_TMRB5		5
+#define M16C_TMRB4		6
+#define M16C_UART1_BCD		6
+#define M16C_TMRB3		7
+#define M16C_UART0_BCD		7
+#define M16C_INT5		8
+#define M16C_SI_O4		8
+#define M16C_INT4		9
+#define M16C_SI_O3		9
+#define M16C_UART2_BCD		10
+#define M16C_DMA0		11
+#define M16C_DMA1		12
+#define M16C_KEY		13
+#define M16C_AD			14
+#define M16C_UART2_NACK		15
+#define M16C_UART2_ACK		16
+#define M16C_UART0_NACK		17
+#define M16C_UART0_ACK		18
+#define M16C_UART1_NACK		19
+#define M16C_UART1_ACK		20
+#define M16C_TMRA0		21
+#define M16C_TMRA1		22
+#define M16C_TMRA2		23
+#define M16C_TMRA3		24
+#define M16C_TMRA4		25
+#define M16C_TMRB0		26
+#define M16C_TMRB1		27
+#define M16C_TMRB2		28
+#define M16C_INT0		29
+#define M16C_INT1		30
+#define M16C_INT2		31
+
+/* Software interrupts - not bound to peripheral hardware */
+
+#define M16C_SINT0		32
+#define M16C_SINT1		33
+#define M16C_SINT2		34
+#define M16C_SINT3		35
+#define M16C_SINT4		36
+#define M16C_SINT5		37
+#define M16C_SINT6		38
+#define M16C_SINT7		39
+#define M16C_SINT8		40
+#define M16C_SINT9		41
+#define M16C_SINT10		42
+#define M16C_SINT11		43
+#define M16C_SINT12		44
+#define M16C_SINT13		45
+#define M16C_SINT14		46
+#define M16C_SINT15		47
+#define M16C_SINT16		48
+#define M16C_SINT17		49
+#define M16C_SINT18		50
+#define M16C_SINT19		51
+#define M16C_SINT20		52
+#define M16C_SINT21		53
+#define M16C_SINT22		54
+#define M16C_SINT23		55
+#define M16C_SINT24		56
+#define M16C_SINT25		57
+#define M16C_SINT26		58
+#define M16C_SINT27		59
+#define M16C_SINT28		60
+#define M16C_SINT29		61
+#define M16C_SINT30		62
+#define M16C_SINT31		63
+
+/* Interrupt macro */
+#define _M16C_INTERRUPT(id) _vector_##id
+#define M16C_INTERRUPT(id) \
+	void __attribute__((interrupt)) _M16C_INTERRUPT(id)(void)
+
+#endif
+
+
diff --git a/tos/chips/m16c62p/iom16c62p.h b/tos/chips/m16c62p/iom16c62p.h
new file mode 100755
index 00000000..658bb7a5
--- /dev/null
+++ b/tos/chips/m16c62p/iom16c62p.h
@@ -0,0 +1,2757 @@
+/****************************************************************
+KPIT Cummins Infosystems Ltd, Pune, India. 1-April-2006.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+*****************************************************************/
+/****************************************************************/
+/*      M16C/60 62P Include File                                */
+/****************************************************************/
+
+#ifndef __IOM16C62P_H__
+#define __IOM16C62P_H__
+
+/*------------------------------------------------------
+    Processor mode register 0  //0x0004
+------------------------------------------------------*/
+union st_pm0 {               /* union PM0    	   					*/
+  struct {             		 /* Bit  Access 		   			*/
+	 unsigned char 	PM0_0:1; /* Processor mode bit 0 				*/
+	 unsigned char 	PM0_1:1; /* Processor mode bit 1 				*/
+	 unsigned char 	PM0_2:1; /* R/W mode select bit  				*/
+	 unsigned char 	PM0_3:1; /* Software reset bit					*/
+	 unsigned char 	PM0_4:1; /* Multiplexed bus space select bit 0	*/
+	 unsigned char 	PM0_5:1; /* Multiplexed bus space select bit 1	*/
+	 unsigned char 	PM0_6:1; /* Port P40 to P43 function select bit */
+	 unsigned char 	PM0_7:1; /* BCLK output disable bit		      	*/
+  } BIT;   		     		 /*        						    	*/
+	unsigned  char BYTE;     /*  Byte Access 						*/
+};                           /* 						            */
+
+/*------------------------------------------------------
+    Processor mode register 1  //0x0005
+------------------------------------------------------*/
+union st_pm1 {              /* union PM1    	   					 */
+  struct {            		/* Bit  Access 		   				 */
+	 unsigned char PM1_0:1; /* CS2 area switching bit                */
+	 unsigned char PM1_1:1; /* Port P3_4 to P3_7 function select bit */
+	 unsigned char PM1_2:1; /* Watch dog timer function select bit   */
+	 unsigned char PM1_3:1; /* Intermal reserved area expansion bit  */
+	 unsigned char PM1_4:1; /* Memory area expansion bit             */
+	 unsigned char PM1_5:1; /* Memory area expansion bit             */
+	 unsigned char PM1_6:1; /* Reserved bit  					 */
+	 unsigned char PM1_7:1; /* PM17 - Wait bit				    	 */
+  } BIT;   		    		/*        					 */
+	 unsigned char BYTE;    /*  Byte Access 					 */
+};                          /* 						            	 */
+
+/*------------------------------------------------------
+    System clock control register 0  //0x0006
+------------------------------------------------------*/
+union st_cm0 {               /* union CM0    	   					*/
+  struct {             		 /* Bit  Access 		   			*/
+	 unsigned char 	CM0_0:1; /* Clock output function select bit 	*/
+	 unsigned char 	CM0_1:1; /* Clock output function select bit 	*/
+	 unsigned char 	CM0_2:1; /* WAIT peripheral function clock stop bit */
+	 unsigned char 	CM0_3:1; /* Xcin-Xcout drive capacity select bit*/
+	 unsigned char 	CM0_4:1; /* Port Xc select bit 					*/
+	 unsigned char 	CM0_5:1; /* Main clock stop bit					*/
+	 unsigned char 	CM0_6:1; /* Main clock division select bit 0 	*/
+	 unsigned char 	CM0_7:1; /* System clock select bit 			*/
+  } BIT;   		     		 /*        					*/
+	unsigned char BYTE;      /*  Byte Access 					*/
+};                           /* system clock control register  0    */
+
+
+/*------------------------------------------------------
+    System clock control register 1 //0x0007
+------------------------------------------------------*/
+union st_cm1 {               /* union CM1    	   					*/
+  struct {             		 /* Bit  Access 		   			*/
+	 unsigned char 	CM1_0:1; /* All clock stop control bit 			*/
+	 unsigned char 	CM1_1:1; /* Reserved bit always set to 0		*/
+	 unsigned char 	 	 :1; /* Reserved bit always set to 0		*/
+	 unsigned char 		 :1; /* Reserved bit always set to 0		*/
+	 unsigned char 		 :1; /* Reserved bit always set to 0		*/
+	 unsigned char 	CM1_5:1; /* Xin-Xouts drive capacity select bit */
+	 unsigned char 	CM1_6:1; /* Main clock division select bit 1 	*/
+	 unsigned char 	CM1_7:1; /* Main clock division select bit 1 	*/
+  } BIT;   		     		 /*        				    */
+	unsigned char BYTE;      /*  Byte Access 					*/
+};                           /* system clock control register 1     */
+
+
+/*------------------------------------------------------
+    Chip select control register //0x0008
+------------------------------------------------------*/
+union st_csr {               /* union CSR    	   					*/
+   struct {             	 /* Bit  Access 		   			*/
+	 unsigned char	CS0 :1;  /* CS0~ output enable bit				*/
+	 unsigned char	CS1 :1;  /* CS1~ output enable bit 				*/
+	 unsigned char	CS2 :1;  /* CS2~ output enable bit 				*/
+	 unsigned char	CS3 :1;  /* CS3~ output enable bit 				*/
+	 unsigned char	CS0W:1;  /* CS0~ wait bit 					*/
+	 unsigned char	CS1W:1;  /* CS1~ wait bit 					*/
+	 unsigned char	CS2W:1;  /* CS2~ wait bit 					*/
+	 unsigned char	CS3W:1;  /* CS3~ wait bit 					*/
+   } BIT;   		         /*        						*/
+	 unsigned char BYTE;     /* Byte Access 					*/
+};                           /* Chip select control register		*/
+
+/*------------------------------------------------------
+    Address match interrupt enable register //0x0009
+------------------------------------------------------*/
+union st_aier {               /* union AIER    	   					*/
+   struct {              	  /* Bit  Access 		   				*/
+	 unsigned char 	AIER0:1;  /* Address match interrupt0 enable bit*/
+	 unsigned char 	AIER1:1;  /* Address match interrupt1 enable bit*/
+	 unsigned char 		 :1;  /* Nothing assigned 					*/
+	 unsigned char 		 :1;  /* Nothing assigned 					*/
+	 unsigned char 		 :1;  /* Nothing assigned  					*/
+	 unsigned char 		 :1;  /* Nothing assigned  					*/
+	 unsigned char 	 	 :1;  /* Nothing assigned 					*/
+	 unsigned char 		 :1;  /* Nothing assigned  					*/
+   } BIT;   		      	  /*       						    	*/
+	 unsigned char BYTE;      /* Byte Access 						*/
+};                            /* Address match interrupt enable register	*/
+
+
+/*------------------------------------------------------
+   Protect register //0x000A
+-----------------------------------------------------*/
+union st_prcr {               /* union PRCR    	   					*/
+   struct {              	  /* Bit  Access 		   				*/
+	 unsigned char 	PRC0:1;   /* Enables writing to system clock control registers 0 & 1 */
+	 unsigned char 	PRC1:1;   /* Enables writing to processor mode registers 0 & 1 */
+	 unsigned char 	PRC2:1;   /* Enables writing to port P9 direction register & SI/Oi control register(i=3,4)*/
+	 unsigned char 	PRC3:1;   /* Enable writting to Power supply detection register 2 and Power supply down detection register */
+	 unsigned char 		:1;   /* Nothing assigned  					*/
+	 unsigned char 		:1;   /* Nothing assigned  					*/
+	 unsigned char 	 	:1;   /* Nothing assigned 					*/
+	 unsigned char 		:1;   /* Nothing assigned  					*/
+   } BIT;   		      	  /*       						    	*/
+	 unsigned char BYTE;      /* Byte Access 						*/
+};                            /* Protect register					*/
+
+/*------------------------------------------------------
+	Data bank register //0x000B
+------------------------------------------------------*/
+union st_dbr {                /* union DBR   	   					*/
+   struct {              	  /* Bit  Access 		   				*/
+	 unsigned char 	    :1;   /* Nothing assigned  					*/
+	 unsigned char 	    :1;   /* Nothing assigned  					*/
+	 unsigned char 	OFS :1;   /* Offset bit                         */
+	 unsigned char 	BSR0:1;   /* Bank select bit 0                  */
+	 unsigned char 	BSR1:1;   /* Bank select bit 1                  */
+	 unsigned char 	BSR2:1;   /* Bank select bit 2                  */
+	 unsigned char 	 	:1;   /* Nothing assigned 					*/
+	 unsigned char 		:1;   /* Nothing assigned  					*/
+   } BIT;   		      	  /*       						    	*/
+	 unsigned char BYTE;      /* Data bank register						*/
+};
+
+/*------------------------------------------------------
+	Oscillation stop detection register //0x000C
+------------------------------------------------------*/
+union st_cm2 {                /* union CM2  	   					 */
+   struct {              	  /* Bit  Access 		   				 */
+	 unsigned char 	CM2_0:1;   /* Oscillation stop detection bit     */
+	 unsigned char 	CM2_1:1;   /* Main clock switch bit              */
+	 unsigned char 	CM2_2:1;   /* Oscillation stop detection status  */
+	 unsigned char 	CM2_3:1;   /* Clock monitor bit                  */
+	 unsigned char 	     :1;   /* Nothing assigned                   */
+	 unsigned char 	     :1;   /* Nothing assigned                   */
+	 unsigned char 	 	 :1;   /* Nothing assigned 					 */
+	 unsigned char 	CM2_7:1;   /* Operation select bit(when an oscillation stop is detected) */
+   } BIT;   		      	   /*       						    	*/
+	 unsigned char BYTE;      /* Oscillation stop detection register						*/
+};
+
+/*------------------------------------------------------
+   Watchdog timer control register //0x000f
+-----------------------------------------------------*/
+union st_wdc {               /* union WDC    	   					*/
+   struct {             	 /* Bit  Access 		   				*/
+     unsigned char 	 B0:1; 	 /* High-order bit of watchdog timer	*/
+     unsigned char 	 B1:1; 	 /* High-order bit of watchdog timer	*/
+     unsigned char 	 B2:1; 	 /* High-order bit of watchdog timer	*/
+     unsigned char 	 B3:1;   /* High-order bit of watchdog timer	*/
+     unsigned char 	 B4:1; 	 /* High-order bit of watchdog timer	*/
+     unsigned char WDC5:1; 	 /* Cold start / warm start discrimination flag */
+     unsigned char 	 B6:1; 	 /* Reserved bit, must always be 0		*/
+     unsigned char WDC7:1;   /* Prescaler select bit				*/
+   } BIT;   		    	 /*        						    	*/
+     unsigned char BYTE;     /*  Byte Access 						*/
+};                           /* Watchdog timer control register     */
+
+/*------------------------------------------------------
+   Address match interrupt register 0 //0x0010
+-----------------------------------------------------*/
+union st_rmad0 {
+   struct{
+	unsigned char RMAD0L;     /* Address match interrupt register 0 low  8 bit */
+	unsigned char RMAD0M;     /* Address match interrupt register 0 mid  8 bit */
+	unsigned char RMAD0H;     /* Address match interrupt register 0 high 8 bit */
+	unsigned char NC;         /* non use 					   */
+   } BYTE;			  /* Byte access				   */
+	unsigned long   DWORD;	  /* Word Access				   */
+};				  /* Address match interrupt register 0 32 bit 	   */
+
+/*------------------------------------------------------
+   Address match interrupt register 1 //0x0014
+-----------------------------------------------------*/
+union st_rmad1 {
+   struct{
+	unsigned char RMAD1L;     /* Address match interrupt register 1 low  8 bit */
+	unsigned char RMAD1M;     /* Address match interrupt register 1 mid  8 bit */
+	unsigned char RMAD1H;     /* Address match interrupt register 1 high 8 bit */
+	unsigned char NC;         /* non use 					   */
+   } BYTE;			  /* Byte access		   		   */
+   unsigned long   DWORD;	  /*	Word Access				   */
+};				  /* Address match interrupt register 1 32 bit 	   */
+
+/*------------------------------------------------------
+   Voltage Detection Register 1 //0x0019
+-----------------------------------------------------*/
+union st_vcr1 {               /* union VCR1    	   					*/
+   struct {             	 /* Bit  Access 		   				*/
+     unsigned char 	  B0:1;	 /* Reserved bit,must be 0          	*/
+     unsigned char 	  B1:1;	 /* Reserved bit,must be 0          	*/
+     unsigned char 	  B2:1;	 /* Reserved bit,must be 0          	*/
+     unsigned char VC1_3:1;  /* Voltage down monitor flag           */
+     unsigned char 	  B4:1;  /* Reserved bit,must be 0	            */
+     unsigned char    B5:1;  /* Reserved bit,must be 0              */
+     unsigned char 	  B6:1;  /* Reserved bit, must always be 0		*/
+     unsigned char    B7:1;  /* Reserved bit,must be 0				*/
+   } BIT;   		    	 /*        						    	*/
+     unsigned char BYTE;     /*  Byte Access 						*/
+};                           /* Voltage Detection Register 1     */
+
+/*------------------------------------------------------
+   Voltage Detection Register 2 //0x001A
+-----------------------------------------------------*/
+union st_vcr2 {               /* union VCR2    	   					*/
+   struct {             	 /* Bit  Access 		   				*/
+     unsigned char 	  B0:1;	 /* Reserved bit,must be 0          	*/
+     unsigned char 	  B1:1;	 /* Reserved bit,must be 0          	*/
+     unsigned char 	  B2:1;	 /* Reserved bit,must be 0          	*/
+     unsigned char    B3:1;  /* Reserved bit,must be 0           */
+     unsigned char 	  B4:1;  /* Reserved bit,must be 0	            */
+     unsigned char    B5:1;  /* Reserved bit,must be 0              */
+     unsigned char VC2_6:1;  /* Reset area monitor bit		*/
+     unsigned char VC2_7:1;  /* Voltage down monitor bit			*/
+   } BIT;   		    	 /*        						    	*/
+     unsigned char BYTE;     /*  Byte Access 						*/
+};                           /* Voltage Detection Register 1     */
+
+/*------------------------------------------------------
+   Chip select expansion control register//0x001B
+-----------------------------------------------------*/
+union st_cse {               /* union CSE    	   					*/
+   struct {             	 /* Bit  Access 		   				*/
+     unsigned char CSE00W:1; /* CS0~ wait expansion bit */
+     unsigned char CSE01W:1; /* CS0~ wait expansion bit */
+     unsigned char CSE10W:1; /* CS1~ wait expansion bit */
+     unsigned char CSE11W:1; /* CS1~ wait expansion bit */
+     unsigned char CSE20W:1; /* CS2~ wait expansion bit */
+     unsigned char CSE21W:1; /* CS2~ wait expansion bit */
+     unsigned char CSE30W:1; /* CS3~ wait expansion bit */
+     unsigned char CSE31W:1; /* CS3~ wait expansion bit */
+   } BIT;   		    	 /*        						    	*/
+     unsigned char BYTE;     /*  Byte Access 						*/
+};                           /* Chip select expansion control register    */
+
+/*------------------------------------------------------
+   PLL control register 0 //0x001C
+-----------------------------------------------------*/
+union st_plc0 {               /* union      	   					*/
+   struct {             	 /* Bit  Access 		   				*/
+     unsigned char PLC00:1; /* Programmable counter select bit */
+     unsigned char PLC01:1; /* Programmable counter select bit */
+     unsigned char PLC02:1; /* Programmable counter select bit */
+     unsigned char      :1; /* Nothing assigned */
+     unsigned char      :1; /* Reserved bit,set to one */
+     unsigned char      :1; /* Reserved bit,set to zero */
+     unsigned char      :1; /* Reserved bit,set to zero */
+     unsigned char PLC07:1; /* Operation enable bit */
+   } BIT;   		    	 /*        						    	*/
+     unsigned char BYTE;     /*  Byte Access 						*/
+};                           /* PLL control register 0    */
+
+/*------------------------------------------------------
+   Processor mode register 2 //0x001E
+-----------------------------------------------------*/
+union st_pm2 {               /* union      	   					                   */
+   struct {             	 /* Bit  Access 		   				               */
+     unsigned char PM2_0:1; /* Specifying wait when accessing SFR at PLL operation */
+     unsigned char PM2_1:1; /* System clock protective bit */
+     unsigned char PM2_2:1; /* WDT count source protective bit */
+     unsigned char      :1; /* Reserved bit,set to zero */
+     unsigned char      :1; /* Reserved bit,set to zero */
+     unsigned char      :1; /* Nothing assigned */
+     unsigned char      :1; /* Nothing assigned */
+     unsigned char      :1; /* Nothing assigned */
+   } BIT;   		    	 /*        						    	*/
+     unsigned char BYTE;     /*  Byte Access 						*/
+};                           /* Processor mode register 2    */
+
+/*------------------------------------------------------
+   Power supply down detection register //0x001F
+-----------------------------------------------------*/
+union st_d4int {               /* union      	   					                   */
+   struct {             	 /* Bit  Access 		   				               */
+     unsigned char D40:1; /* Power supply down detection interrupt enable bit */
+     unsigned char D41:1; /* STOP mode deactivation control bit */
+     unsigned char D42:1; /* Power supply change detection flag */
+     unsigned char D43:1; /* WDT overflow detect flag */
+     unsigned char DF0:1; /* Sampling clock select bit */
+     unsigned char DF1:1; /* Sampling clock select bit */
+     unsigned char    :1; /* Nothing assigned */
+     unsigned char    :1; /* Nothing assigned */
+   } BIT;   		    	 /*        						    	*/
+     unsigned char BYTE;     /*  Byte Access 						*/
+};                           /* Power supply down detection register   */
+
+/*------------------------------------------------------
+   DMA0 source pointer //0x0020
+-----------------------------------------------------*/
+union st_sar0 {
+   struct{
+	unsigned char SAR01;     /* DMA0 source pointer low  8 bit 				 */
+	unsigned char SAR0M;     /* DMA0 source pointer mid  8 bit 				 */
+	unsigned char SAR0H;     /* DMA0 source pointer high 8 bit 				 */
+	unsigned char NC;        /* non use 									 */
+   } BYTE;				 	 /* Byte access									 */
+   unsigned long   DWORD;	 /*	Word Access									 */
+};							 /* DMA0 source pointer 32 bit				 	 */
+
+/*------------------------------------------------------
+   DMA1 source pointer //0x0030
+-----------------------------------------------------*/
+union st_sar1 {
+   struct{
+	unsigned char SAR11;     /* DMA1 source pointer low  8 bit 				 */
+	unsigned char SAR1M;     /* DMA1 source pointer mid  8 bit 				 */
+	unsigned char SAR1H;     /* DMA1 source pointer high 8 bit 				 */
+	unsigned char NC;        /* non use 									 */
+   } BYTE;					 /* Byte access									 */
+   unsigned long   DWORD;	 /* Word Access									 */
+};					         /* DMA1 source pointer 32 bit				 	 */
+
+/*------------------------------------------------------
+   DMA0 destination pointer //0x0024
+-----------------------------------------------------*/
+union st_dar0 {				 /* DMA0 destination pointer 32 bit	   			 */
+   struct{
+	unsigned char DAR0L;     /* DMA0 destination pointer low  8 bit  		 */
+	unsigned char DAR0M;     /* DMA0 destination pointer mid  8 bit     	 */
+	unsigned char DAR0H;     /* DMA0 destination pointer high 8 bit  		 */
+	unsigned char NC;        /* non use 							   		 */
+   } BYTE;					 /* Byte access						   			 */
+    unsigned long DWORD;	 /* Word Access						   			 */
+};
+
+/*------------------------------------------------------
+  DMA1 destination pointer //0x0034
+-----------------------------------------------------*/
+union st_dar1 {				  /* DMA1 destination pointer 32 bit			 */
+   struct{
+	unsigned char DAR1L;     /* DMA1 destination pointer low  8 bit			 */
+	unsigned char DAR1M;     /* DMA1 destination pointer mid  8 bit			 */
+	unsigned char DAR1H;     /* DMA1 destination pointer high 8 bit			 */
+	unsigned char NC;        /* non use 									 */
+   } BYTE;					 /* Byte access									 */
+   unsigned long   DWORD;	 /* Word Access									 */
+};
+
+/*------------------------------------------------------
+  DMA0 transfer counter //0x0028
+-----------------------------------------------------*/
+union st_tcr0 {			  	 /* DMA0 transfer counter 16 bit 	 			 */
+   struct{
+	unsigned char TCR0L;     /* DMA0 transfer counter low  8 bit 			 */
+	unsigned char TCR0H;     /* DMA0 transfer counter high 8 bit 			 */
+   } BYTE;					 /* Byte access					     			 */
+   unsigned short   WORD;	 /* Word Access					     			 */
+};
+
+/*------------------------------------------------------
+  DMA1 transfer counter //0x0038
+-----------------------------------------------------*/
+union st_tcr1 {				  /* DMA1 transfer counter 16 bit 	   			 */
+   struct{
+	unsigned char TCR1L;     /* DMA1 transfer counter low  8 bit   			 */
+	unsigned char TCR1H;     /* DMA1 transfer counter high 8 bit   			 */
+   } BYTE;					 /* Byte access					       			 */
+   unsigned short WORD;	     /* Word Access					       			 */
+};
+
+/*------------------------------------------------------
+    DMA0 control register //0x002c
+------------------------------------------------------*/
+union st_dm0con {		       /* DMA0 control register				*/
+   struct{
+     unsigned char    DMBIT:1; /* Transfer unit bit select bit 				*/
+     unsigned char    DMASL:1; /* Repeat transfer mode select bit 			*/
+     unsigned char    DMAS :1; /* DMA request bit 							*/
+     unsigned char    DMAE :1; /* DMA enable bit 							*/
+     unsigned char    DSD  :1; /* Source address direction select bit   	*/
+     unsigned char    DAD  :1; /* Destination address direction select bit  */
+     unsigned char    	   :1;
+     unsigned char         :1;
+   }BIT;
+    unsigned char  BYTE;
+};
+
+/*------------------------------------------------------
+    DMA1 control register //0x003c
+------------------------------------------------------*/
+union st_dm1con {		/*    DMA1 control register union */
+    struct{
+     unsigned char    DMBIT:1; /* Transfer unit bit select bit 				*/
+     unsigned char    DMASL:1; /* Repeat transfer mode select bit 			*/
+     unsigned char    DMAS :1; /* DMA request bit 							*/
+     unsigned char    DMAE :1; /* DMA enable bit 							*/
+     unsigned char    DSD  :1; /* Source address direction select bit  		*/
+     unsigned char    DAD  :1; /* Destination address direction select bit  */
+     unsigned char    	   :1; /*Nothing assigned */
+     unsigned char         :1; /*Nothing assigned */
+    }BIT;
+    unsigned char  BYTE;
+};
+
+union st_icr {		     	   /*    interrupt control registers	  */
+    struct{
+     unsigned char    ILVL0:1; /* Interrupt priority level select bit */
+     unsigned char    ILVL1:1; /* Interrupt priority level select bit */
+     unsigned char    ILVL2:1; /* Interrupt priority level select bit */
+     unsigned char    IR   :1; /* Interrupt request bit 			  */
+     unsigned char    POL  :1; /* Polarity select bit 				  */
+     unsigned char         :1; /* Reserved bit, set to 0              */
+     unsigned char    	   :1; /* Nothing assigned					  */
+     unsigned char         :1; /* Nothing assigned					  */
+    }BIT;
+    unsigned char    BYTE;
+};
+
+union st_icr1 {		     	   /*    interrupt control registers	  */
+    struct{
+     unsigned char    ILVL0:1; /* Interrupt priority level select bit */
+     unsigned char    ILVL1:1; /* Interrupt priority level select bit */
+     unsigned char    ILVL2:1; /* Interrupt priority level select bit */
+     unsigned char    IR   :1; /* Interrupt request bit 			  */
+     unsigned char         :1; /* Nothing assigned					  */
+     unsigned char         :1; /* Nothing assigned					  */
+     unsigned char    	   :1; /* Nothing assigned					  */
+     unsigned char         :1; /* Nothing assigned					  */
+    }BIT;
+    unsigned char    BYTE;
+};
+
+/*------------------------------------------------------
+     bcnic //0x004a
+------------------------------------------------------*/
+union st_bcnic {					/*    interrupt control registers*/
+    struct{
+     unsigned char    ILVL0_BCNIC:1;/* Interrupt priority level select bit */
+     unsigned char    ILVL1_BCNIC:1;/* Interrupt priority level select bit */
+     unsigned char    ILVL2_BCNIC:1;/* Interrupt priority level select bit */
+     unsigned char    IR_BCNIC   :1;/* Interrupt request bit */
+     unsigned char    		     :1;
+     unsigned char               :1;
+     unsigned char               :1;
+     unsigned char               :1;
+    }BIT;
+    unsigned char    BYTE;
+};
+
+/*------------------------------------------------------
+     dm0ic //0x004b
+------------------------------------------------------*/
+union st_dm0ic {					/*    interrupt control registers*/
+    struct{
+     unsigned char    ILVL0_DM0IC:1;/* Interrupt priority level select bit */
+     unsigned char    ILVL1_DM0IC:1;/* Interrupt priority level select bit */
+     unsigned char    ILVL2_DM0IC:1;/* Interrupt priority level select bit */
+     unsigned char    IR_DM0IC   :1;/* Interrupt request bit			   */
+     unsigned char    		     :1;
+     unsigned char               :1;
+     unsigned char               :1;
+     unsigned char               :1;
+    }BIT;
+    unsigned char    BYTE;
+};
+
+/*------------------------------------------------------
+    Flash identification register //0x01b4
+------------------------------------------------------*/
+union st_fidr {		           /*    Flash identification register         */
+    struct{
+     unsigned char    FIDR0:1; /* Flash identification value */
+     unsigned char    FIDR1:1; /* Flash identification value */
+     unsigned char         :1; /* Nothing assigned							*/
+     unsigned char         :1; /* Nothing assigned							*/
+     unsigned char         :1; /* Nothing assigned                  		*/
+     unsigned char         :1; /* Nothing assigned                          */
+     unsigned char    	   :1; /* Nothing assigned */
+     unsigned char         :1; /* Nothing assigned */
+    }BIT;
+    unsigned char  BYTE;
+};
+
+/*------------------------------------------------------
+    Flash memory control register 1 //0x01b5
+------------------------------------------------------*/
+union st_fmr1 {		           /*    Flash identification register         */
+    struct{
+     unsigned char         :1; /* Reserved bit   */
+     unsigned char    FMR11:1; /* EW1 mode select bit */
+     unsigned char         :1; /* Reserved bit   */
+     unsigned char         :1; /* Reserved bit   */
+     unsigned char         :1; /* Reserved bit	*/
+     unsigned char         :1; /* Reserved bit    */
+     unsigned char    FMR16:1; /* Lock bit status flag */
+     unsigned char         :1; /* Reserved bit   */
+    }BIT;
+    unsigned char  BYTE;
+};
+
+/*------------------------------------------------------
+    Flash memory control register 0 //0x01b7
+------------------------------------------------------*/
+union st_fmr0 {		           /*    Flash identification register         */
+    struct{
+     unsigned char    FMR00:1; /* RY/BY~ status flag */
+     unsigned char    FMR01:1; /* EW0 mode select bit */
+     unsigned char    FMR02:1; /* Lock bit disable bit */
+     unsigned char    FMSTP:1; /* Flash memory stop bit */
+     unsigned char         :1; /* Reserved bit	*/
+     unsigned char    FMR05:1; /* User ROM area select bit */
+     unsigned char    FMR06:1; /* Program status flag */
+     unsigned char    FMR07:1; /* Erase status flag */
+    }BIT;
+    unsigned char  BYTE;
+};
+
+/*------------------------------------------------------
+   Address match interrupt register 2 //0x01b8
+-----------------------------------------------------*/
+union st_rmad2 {
+   struct{
+	unsigned char RMAD2L;     /* Address match interrupt register 2 low  8 bit */
+	unsigned char RMAD2M;     /* Address match interrupt register 2 mid  8 bit */
+	unsigned char RMAD2H;     /* Address match interrupt register 2 high 8 bit */
+	unsigned char NC;         /* non use 									   */
+   } BYTE;					  /* Byte access								   */
+   unsigned long   DWORD;	  /*	Word Access								   */
+};							  /* Address match interrupt register 2 32 bit 	   */
+
+
+/*------------------------------------------------------
+    Address match interrupt enable register 2 //0x01bb
+------------------------------------------------------*/
+union st_aier2 {		           /* Address match interrupt enable register 2        */
+    struct{
+     unsigned char    AIER20:1; /* Address match interrupt 2 enable bit */
+     unsigned char    AIER21:1; /* Address match interrupt 3 enable bit */
+     unsigned char          :1; /* Nothing assigned */
+     unsigned char          :1; /* Nothing assigned */
+     unsigned char          :1; /* Nothing assigned	*/
+     unsigned char          :1; /* Nothing assigned */
+     unsigned char          :1; /* Nothing assigned */
+     unsigned char          :1; /* Nothing assigned */
+    }BIT;
+    unsigned char  BYTE;
+};
+
+/*------------------------------------------------------
+   Address match interrupt register 3 //0x01bc
+-----------------------------------------------------*/
+union st_rmad3 {
+   struct{
+	unsigned char RMAD3L;     /* Address match interrupt register 3 low  8 bit */
+	unsigned char RMAD3M;     /* Address match interrupt register 3 mid  8 bit */
+	unsigned char RMAD3H;     /* Address match interrupt register 3 high 8 bit */
+	unsigned char NC;         /* non use 									   */
+   } BYTE;					  /* Byte access								   */
+   unsigned long   DWORD;	  /*	Word Access								   */
+};							  /* Address match interrupt register 3 32 bit 	   */
+
+/*------------------------------------------------------
+    Peripheral clock select register //0x025e
+------------------------------------------------------*/
+union st_pclkr {		           /* Peripheral clock select register        */
+    struct{
+     unsigned char    PCLK0 :1; /* TimerA,B clock select bit */
+     unsigned char    PCLK1 :1; /* SI/O clock select bit */
+     unsigned char          :1; /* Reserved bit,set to 0 */
+     unsigned char          :1; /* Reserved bit,set to 0 */
+     unsigned char          :1; /* Reserved bit,set to 0	*/
+     unsigned char          :1; /* Reserved bit,set to 0 */
+     unsigned char          :1; /* Reserved bit,set to 0 */
+     unsigned char          :1; /* Reserved bit,set to 0 */
+    }BIT;
+    unsigned char  BYTE;
+};
+
+/*------------------------------------------------------
+    Timer B3,4,5 Count start flag //0x0340
+------------------------------------------------------*/
+union st_tbsr {              /* union tbsr    	   					*/
+	struct {                 /* Bit  Access 		   				*/
+	 unsigned char 		:1;  /* Nothing Assigned					*/
+	 unsigned char 		:1;  /* Nothing Assigned					*/
+	 unsigned char 		:1;  /* Nothing Assigned					*/
+	 unsigned char 		:1;  /* Nothing Assigned					*/
+	 unsigned char 		:1;  /* Nothing Assigned					*/
+	 unsigned char 	TB3S:1;  /* Timer B3 count start flag 			*/
+	 unsigned char 	TB4S:1;  /* Timer B4 count start flag 			*/
+	 unsigned char 	TB5S:1;  /* Timer B5 count start flag 			*/
+	} BIT;   		         /*        						    	*/
+	unsigned  char BYTE;     /*  Byte Access 						*/
+};                           /* Timer B3,4,5 Count start flag       */
+
+/*------------------------------------------------------
+   Three-phase PWM control regester 0 //0x0348
+------------------------------------------------------*/
+union st_invc0 {            /* union invc0 	   						*/
+	struct {            	/* Bit  Access 		   					*/
+	 unsigned char 	INV00:1;/* Effective interrupt output polarity select bit */
+	 unsigned char 	INV01:1;/* Effective interrupt output specification bit */
+	 unsigned char 	INV02:1;/* Mode select bit 						*/
+	 unsigned char 	INV03:1;/* Output control bit 					*/
+	 unsigned char 	INV04:1;/* Positive and negative phases concurrent L output disable function enable bit */
+	 unsigned char 	INV05:1;/* Positive and negative phases concurrent L output detect flag */
+	 unsigned char 	INV06:1;/* Modulation mode select bit 			*/
+	 unsigned char 	INV07:1;/* Software trigger bit 				*/
+	} BIT;   		     	/*        						    	*/
+	 unsigned char BYTE;    /*  Byte Access 						*/
+};                          /* 						            	*/
+
+/*------------------------------------------------------
+    Three-phase PWM control regester 1 //0x0349
+------------------------------------------------------*/
+union st_invc1 {            /* union invc1 	   							*/
+	struct {            	/* Bit  Access 		   						*/
+	 unsigned char 	INV10:1;/* Timer Ai start trigger signal select bit */
+	 unsigned char 	INV11:1;/* Timer A1-1,A2-1,A4-1 control bit 		*/
+	 unsigned char 	INV12:1;/* Short circuit timer count source select bit*/
+	 unsigned char 		 :1;/* Nothing Assigned							*/
+	 unsigned char 		 :1;/* Reserved bit (always 0)					*/
+	 unsigned char 		 :1;/* Nothing Assigned							*/
+	 unsigned char 	 	 :1;/* Nothing Assigned							*/
+	 unsigned char 		 :1;/* Nothing Assigned							*/
+	} BIT;   		     	/*        						    		*/
+	unsigned char BYTE;     /*  Byte Access 							*/
+};                          /* 						            		*/
+
+/*------------------------------------------------------
+    Three-phase output buffer register 0 //0x034a
+------------------------------------------------------*/
+union st_idb0 {            /* union idb0 	   						*/
+	struct {           	   /* Bit  Access 		   					*/
+	 unsigned char 	DU0 :1;/* U  phase output buffer 0 				*/
+	 unsigned char 	DUB0:1;/* U~ phase output buffer 0 				*/
+	 unsigned char 	DV0 :1;/* V  phase output buffer 0 				*/
+	 unsigned char 	DVB0:1;/* V~ phase output buffer 0 				*/
+	 unsigned char 	DW0 :1;/* W  phase output buffer 0 				*/
+	 unsigned char 	DWB0:1;/* W~ phase output buffer 0 				*/
+	 unsigned char 		:1;/* Nothing Assigned						*/
+	 unsigned char 		:1;/* Nothing Assigned						*/
+	} BIT;   		   	   /*        						    	*/
+	unsigned char BYTE;    /*  Byte Access 							*/
+};                         /* 						            	*/
+
+/*------------------------------------------------------
+    Three-phase output buffer register 1 //0x034b
+------------------------------------------------------*/
+union st_idb1 {            /* union idb1 	   						*/
+	struct {	           /* Bit  Access 		   					*/
+	 unsigned char 	DU1 :1;/* U  phase output buffer 1				*/
+	 unsigned char	DUB1:1;/* U~ phase output buffer 1 				*/
+	 unsigned char	DV1 :1;/* V  phase output buffer 1 				*/
+	 unsigned char	DVB1:1;/* V~ phase output buffer 1 				*/
+	 unsigned char	DW1 :1;/* W  phase output buffer 1 				*/
+	 unsigned char	DWB1:1;/* W~ phase output buffer 1 				*/
+	 unsigned char		:1;/* Nothing Assigned						*/
+	 unsigned char		:1;/* Nothing Assigned						*/
+	} BIT;  	 		   /*        						    	*/
+	unsigned char BYTE;    /*  Byte Access 							*/
+};                         /* 						            	*/
+
+/*----------------------------------------------------------------------------------
+   Timer mode registers  //0x035b,0x035c,0x035d,0x0396,
+                           0x0397,0x0398,0x0399,0x039a,0x039b,0x039c
+---------------------------------------------------------------------------------*/
+union st_tmr {               /* union tmr    	   					*/
+	struct {             	 /* Bit  Access 		   				*/
+	 unsigned char 	TMOD0:1; /* Operation mode select bit 			*/
+	 unsigned char	TMOD1:1; /* Operation mode select bit 			*/
+	 unsigned char	MR0	 :1; /* Pulse output function select bit	*/
+	 unsigned char	MR1  :1; /* External trigger select bit			*/
+	 unsigned char	MR2  :1; /* Trigger select bit					*/
+	 unsigned char	MR3  :1; /* Must always be "0" in one-shot timer*/
+	 unsigned char	TCK0 :1; /* Count source select bit 			*/
+	 unsigned char	TCK1 :1; /* Count source select bit 			*/
+	} BIT;   		     	 /*       						    	*/
+	unsigned char BYTE;      /*  Byte Access 						*/
+};
+
+/*------------------------------------------------------
+   Interrupt request cause select register 2  //0x035e
+------------------------------------------------------*/
+union st_ifsr2a {               /* union ifsr2a   	   					*/
+	struct {             	 /* Bit  Access 				*/
+	 unsigned char 	      :1; /* Nothing assigned			*/
+	 unsigned char	      :1; /* Nothing assigned 			*/
+	 unsigned char	      :1; /* Nothing assigned    		*/
+	 unsigned char	      :1; /* Nothing assigned			*/
+	 unsigned char	      :1; /* Nothing assigned			*/
+	 unsigned char	      :1; /* Nothing assigned            */
+	 unsigned char IFSR26 :1; /* Interrupt request cause select bit */
+	 unsigned char IFSR27 :1; /* Interrupt request cause select bit */
+	} BIT;   		     	 /*       						    	*/
+	unsigned char BYTE;      /*  Byte Access 						*/
+};
+
+/*------------------------------------------------------
+Interrupt request cause select register //0x035f
+-----------------------------------------------------*/
+union st_ifsr {              /* union IFSR    	   						*/
+	struct {             	 /* Bit  Access 		   					*/
+	 unsigned char 	IFSR0:1; /* INT0~ interrupt polarity switching bit  */
+	 unsigned char	IFSR1:1; /* INT1~ interrupt polarity switching bit  */
+	 unsigned char	IFSR2:1; /* INT2~ interrupt polarity switching bit  */
+	 unsigned char	IFSR3:1; /* INT3~ interrupt polarity switching bit  */
+	 unsigned char	IFSR4:1; /* INT4~ interrupt polarity switching bit  */
+	 unsigned char	IFSR5:1; /* INT5~ interrupt polarity switching bit  */
+	 unsigned char	IFSR6:1; /* Interrupt request cause select bit 		*/
+	 unsigned char	IFSR7:1; /* Interrupt request cause select bit 		*/
+	} BIT;   		     	 /*        						    		*/
+	unsigned char BYTE;      /*  Byte Access 							*/
+};                           /* 						            	*/
+
+/*------------------------------------------------------
+   SI/O4 control registers //0x0360
+------------------------------------------------------*/
+union st_s4c {              /* union S4C    	   						*/
+	struct {   		        /* Bit  Access 		   						*/
+	 unsigned char 	SM40:1; /* Internal synchronous clock select bit */
+	 unsigned char	SM41:1; /* Internal synchronous clock select bit */
+	 unsigned char	SM42:1; /* Sout4 output disable bit */
+	 unsigned char	SM43:1; /* SI/O4 port select bit */
+	 unsigned char	SM44:1; /* CLK polarity select bit */
+	 unsigned char	SM45:1; /* Transfer direction select bit */
+	 unsigned char	SM46:1; /* Synchronous clock select bit */
+	 unsigned char	SM47:1; /* Sout4 initial value set bit */
+	} BIT;   		    	/*        						    		*/
+	unsigned char BYTE;     /*  Byte Access 							*/
+};
+
+/*------------------------------------------------------
+   SI/O3 control registers //0x0362
+------------------------------------------------------*/
+union st_s3c {              /* union S3C    	   						*/
+	struct {            	/* Bit  Access 		   						*/
+	 unsigned char 	SM30:1; /* Internal synchronous clock select bit */
+	 unsigned char	SM31:1; /* Internal synchronous clock select bit */
+	 unsigned char	SM32:1; /* Sout3 output disable bit */
+	 unsigned char	SM33:1; /* SI/O3 port select bit */
+	 unsigned char	SM34:1;	/* CLK polarity select bit */
+	 unsigned char	SM35:1; /* Transfer direction select bit */
+	 unsigned char	SM36:1; /* Synchronous clock select bit */
+	 unsigned char	SM37:1; /* Sout3 initial value set bit */
+	} BIT;   		   		/*        						    		*/
+	unsigned char BYTE;     /*  Byte Access 							*/
+};                          /* 						            		*/
+
+/*------------------------------------------------------
+   UART0 special mode register 4 //0x036c
+------------------------------------------------------*/
+union st_u0smr4 {              /* union u0smr4  	   						*/
+	struct {            	   /* Bit  Access 		   						*/
+	 unsigned char 	STAREQ :1; /* Start condition generate bit   */
+	 unsigned char	RSTAREQ:1; /* Restart condition generate bit */
+	 unsigned char	STPREQ :1; /* Stop condition generate bit    */
+	 unsigned char	STSPSEL:1; /* SCL,SDA output select bit      */
+	 unsigned char	ACKD   :1; /* ACK data bit                   */
+	 unsigned char	ACKC   :1; /* ACK data output enable bit     */
+	 unsigned char	SCLHI  :1; /* SCL output stop enable bit     */
+	 unsigned char	SWC9   :1; /* Final bit L hold enable bit    */
+	} BIT;   		   		/*        						    		*/
+	unsigned char BYTE;     /*  Byte Access 							*/
+};                          /* 						            		*/
+
+/*------------------------------------------------------
+   UART0 special mode register 3 //0x036d
+------------------------------------------------------*/
+union st_u0smr3 {              /* union u0smr3  	   						*/
+	struct {            	   /* Bit  Access 		   						*/
+	 unsigned char 	       :1; /* Nothing is assigned                */
+	 unsigned char	CKPH   :1; /* Clock phase set bit                */
+	 unsigned char	       :1; /* Nothing is assigned                */
+	 unsigned char	NODC   :1; /* Clock output set bit               */
+	 unsigned char	       :1; /* Nothing is assigned                */
+	 unsigned char	DL0    :1; /* SDA0(TxD0) digital delay setup bit */
+	 unsigned char	DL1    :1; /* SDA0(TxD0) digital delay setup bit */
+	 unsigned char	DL2    :1; /* SDA0(TxD0) digital delay setup bit */
+	} BIT;   		   		   /*        						     */
+	unsigned char BYTE;        /*  Byte Access 						 */
+};                             /* 						             */
+
+/*------------------------------------------------------
+   UART0 special mode register 2 //0x036e
+------------------------------------------------------*/
+union st_u0smr2 {              /* union u0smr2  	   						*/
+	struct {            	   /* Bit  Access 		   						*/
+	 unsigned char 	IICM2 :1; /* IIC mode selection bit 2 */
+	 unsigned char	CSC   :1; /* Clock-synchronous bit    */
+	 unsigned char	SWC   :1; /* SCL wait output bit      */
+	 unsigned char	ALS   :1; /* SDA output stop bit      */
+	 unsigned char	STAC  :1; /* UART0 initialization bit */
+	 unsigned char	SWC2  :1; /* SCL wait output bit 2    */
+	 unsigned char	SDHI  :1; /* SDA output disable bit   */
+	 unsigned char	      :1; /* Nothing is assigned      */
+	} BIT;   		   		   /*        						     */
+	unsigned char BYTE;        /*  Byte Access 						 */
+};                             /* 						             */
+
+/*------------------------------------------------------
+   UART0 special mode register  //0x036f
+------------------------------------------------------*/
+union st_u0smr {              /* union u0smr  	   						*/
+	struct {            	   /* Bit  Access 		   						*/
+	 unsigned char 	IICM:1; /* IIC mode selection bit */
+	 unsigned char	ABC :1; /* Arbitration lost detecting flag control bit */
+	 unsigned char	BBS :1; /* Bus busy flag */
+	 unsigned char	    :1; /* Reserved bit,set to 0 */
+	 unsigned char	ABSC:1; /* Bus collision detect sampling clock select bit */
+	 unsigned char	ACSE:1; /* Auto clear function select bit of transmit enable bit */
+	 unsigned char	SSS :1; /* Transmit start condition select bit */
+	 unsigned char	    :1; /* Nothing is assigned      */
+	} BIT;   		   		   /*        						     */
+	unsigned char BYTE;        /*  Byte Access 						 */
+};                             /* 						             */
+
+/*------------------------------------------------------
+   UART1 special mode register 4 //0x0370
+------------------------------------------------------*/
+union st_u1smr4 {              /* union u1smr4  	   						*/
+	struct {            	   /* Bit  Access 		   						*/
+	 unsigned char 	STAREQ:1; /* Start condition generate bit */
+	 unsigned char	RSTARE:1; /* Restart condition generate bit */
+	 unsigned char	STPREQ:1; /* Stop condition generate bit */
+	 unsigned char	STSPSE:1; /* SCL,SDA output select bit */
+	 unsigned char	ACKD  :1; /* ACK data bit */
+	 unsigned char	ACKC  :1; /* ACK data output enable bit */
+	 unsigned char	SCLHI :1; /* SCL output stop enable bit */
+	 unsigned char	SWC9  :1; /* Final bit L hold enable bit */
+	} BIT;   		   		   /*        						     */
+	unsigned char BYTE;        /*  Byte Access 						 */
+};                             /* 						             */
+
+/*------------------------------------------------------
+   UART1 special mode register 3 //0x0371
+------------------------------------------------------*/
+union st_u1smr3 {              /* union u1smr3  	   						*/
+	struct {            	   /* Bit  Access 		   						*/
+	 unsigned char 	       :1; /* Nothing is assigned                */
+	 unsigned char	CKPH   :1; /* Clock phase set bit                */
+	 unsigned char	       :1; /* Nothing is assigned                */
+	 unsigned char	NODC   :1; /* Clock output set bit               */
+	 unsigned char	       :1; /* Nothing is assigned                */
+	 unsigned char	DL0    :1; /* SDA1(TxD1) digital delay setup bit */
+	 unsigned char	DL1    :1; /* SDA1(TxD1) digital delay setup bit */
+	 unsigned char	DL2    :1; /* SDA1(TxD1) digital delay setup bit */
+	} BIT;   		   		   /*        						     */
+	unsigned char BYTE;        /*  Byte Access 						 */
+};                             /* 						             */
+
+/*------------------------------------------------------
+   UART1 special mode register 2 //0x0372
+------------------------------------------------------*/
+union st_u1smr2 {              /* union u1smr2  	   						*/
+	struct {            	   /* Bit  Access 		   						*/
+	 unsigned char 	IICM2 :1; /* IIC mode selection bit 2 */
+	 unsigned char	CSC   :1; /* Clock-synchronous bit    */
+	 unsigned char	SWC   :1; /* SCL wait output bit      */
+	 unsigned char	ALS   :1; /* SDA output stop bit      */
+	 unsigned char	STAC  :1; /* UART0 initialization bit */
+	 unsigned char	SWC2  :1; /* SCL wait output bit 2    */
+	 unsigned char	SDHI  :1; /* SDA output disable bit   */
+	 unsigned char	      :1; /* Nothing is assigned      */
+	} BIT;   		   		   /*        						     */
+	unsigned char BYTE;        /*  Byte Access 						 */
+};                             /* 						             */
+
+/*------------------------------------------------------
+   UART1 special mode register  //0x0373
+------------------------------------------------------*/
+union st_u1smr {              /* union u1smr  	   						*/
+	struct {            	   /* Bit  Access 		   						*/
+	 unsigned char 	IICM:1; /* IIC mode selection bit */
+	 unsigned char	ABC :1; /* Arbitration lost detecting flag control bit */
+	 unsigned char	BBS :1; /* Bus busy flag */
+	 unsigned char	    :1; /* Reserved bit,set to 0 */
+	 unsigned char	ABSC:1; /* Bus collision detect sampling clock select bit */
+	 unsigned char	ACSE:1; /* Auto clear function select bit of transmit enable bit */
+	 unsigned char	SSS :1; /* Transmit start condition select bit */
+	 unsigned char	    :1; /* Nothing is assigned      */
+	} BIT;   		   		   /*        						     */
+	unsigned char BYTE;        /*  Byte Access 						 */
+};                             /* 						             */
+
+/*------------------------------------------------------
+   UART2 special mode register 4 //0x0374
+------------------------------------------------------*/
+union st_u2smr4 {              /* union u1smr4  	   						*/
+	struct {            	   /* Bit  Access 		   						*/
+	 unsigned char 	STAREQ:1; /* Start condition generate bit */
+	 unsigned char	RSTARE:1; /* Restart condition generate bit */
+	 unsigned char	STPREQ:1; /* Stop condition generate bit */
+	 unsigned char	STSPSE:1; /* SCL,SDA output select bit */
+	 unsigned char	ACKD  :1; /* ACK data bit */
+	 unsigned char	ACKC  :1; /* ACK data output enable bit */
+	 unsigned char	SCLHI :1; /* SCL output stop enable bit */
+	 unsigned char	SWC9  :1; /* Final bit L hold enable bit */
+	} BIT;   		   		   /*        						     */
+	unsigned char BYTE;        /*  Byte Access 						 */
+};                             /* 						             */
+
+/*------------------------------------------------------
+    UART2 special mode register 3 //0x0375
+------------------------------------------------------*/
+union st_u2smr3 {              /* union U2SMR3    	   					*/
+	struct {            	   /* Bit  Access 		   					*/
+	 unsigned char 	       :1; /* Nothing is assigned                */
+	 unsigned char	 CKPH  :1; /* Clock phase set bit                */
+	 unsigned char	       :1; /* Nothing is assigned                */
+	 unsigned char	 NODC  :1; /* Clock output set bit               */
+	 unsigned char	       :1; /* Nothing is assigned                */
+	 unsigned char	 DL0   :1; /* SDA digital delay setup bit 			*/
+	 unsigned char	 DL1   :1; /* SDA digital delay setup bit 			*/
+	 unsigned char	 DL2   :1; /* SDA digital delay setup bit 			*/
+	} BIT;   		    	/*        						    	*/
+	unsigned char BYTE;     /*  Byte Access 						*/
+};                          /* 						            	*/
+
+/*------------------------------------------------------
+    UART2 special mode register 2 //0x0376
+------------------------------------------------------*/
+union st_u2smr2 {            /* union U2SMR2    	   					*/
+	struct {	             /* Bit  Access 		   					*/
+	 unsigned char 	IICM2:1; /* IIC mode selection bit 2				*/
+	 unsigned char	CSC  :1; /* Clock-synchronous bit 					*/
+	 unsigned char	SWC  :1; /* SCL wait output bit 					*/
+	 unsigned char	ALS  :1; /* SDA output stop bit 					*/
+	 unsigned char	STAC :1; /* UART2 initialization bit 				*/
+	 unsigned char	SWC2 :1; /* SCL wait output bit 2 					*/
+	 unsigned char	SDHI :1; /* SDA output disable bit					*/
+	 unsigned char	     :1; /* Nothing is assigned		*/
+	} BIT;   			     /*        						    		*/
+	unsigned char BYTE;      /*  Byte Access 							*/
+};                           /* 						            	*/
+
+/*------------------------------------------------------
+    UART2 special mode register //0x0377
+------------------------------------------------------*/
+union st_u2smr {             /* union U2SMR    	   							*/
+	struct {             	 /* Bit  Access 		  	 					*/
+	 unsigned char 	IICM :1; /* IIC mode selection bit						*/
+	 unsigned char	ABC  :1; /* Arbitration lost detecting flag control bit */
+	 unsigned char	BBS  :1; /* Reserved bit,set to 0							*/
+	 unsigned char	     :1; /* SCLL sync output enable bit 				*/
+	 unsigned char	ABSCS:1; /* Bus collision detect sampling clock select bit */
+	 unsigned char	ACSE :1; /* Auto clear function select bit of transmit enable bit */
+	 unsigned char	SSS  :1; /* Transmit start condition select bit			*/
+	 unsigned char	     :1; /* Nothing is assigned 				*/
+	} BIT;   		     	 /*        						 		   		*/
+	unsigned char BYTE;      /*  Byte Access 								*/
+};                           /* 						     		       	*/
+
+/*------------------------------------------------------
+    UART2 transmit/receive mode register //0x0378
+------------------------------------------------------*/
+union st_u2mr {              	  /* union U2MR	   							*/
+	struct {             	      /* Bit  Access	  	 					*/
+	 unsigned char 	SMD0_U2MR :1; /* Serial I/O mode select bit 			*/
+	 unsigned char	SMD1_U2MR :1; /* Serial I/O mode select bit 			*/
+	 unsigned char	SMD2_U2MR :1; /* Serial I/O mode select bit 			*/
+	 unsigned char	CKDIR_U2MR:1; /* Internal/external clock select bit		*/
+	 unsigned char	STPS_U2MR :1; /* Stop bit length select bit 			*/
+	 unsigned char	PRY_U2MR  :1; /* Odd/even parity select bit 			*/
+	 unsigned char	PRYE_U2MR :1; /* Parity enable bit 						*/
+	 unsigned char	IOPOL_U2MR:1; /* TxD RxD I/O polarity reverse bit 		*/
+	} BIT;   		     		  /*        						 		   		*/
+	unsigned char BYTE;           /*  Byte Access							*/
+};
+
+/*------------------------------------------------------
+    UART2 Transmit buffer register 16 bit //0x037a
+------------------------------------------------------*/
+union st_u2tb {				 /* UART2 Transmit buffer register 16 bit ; Use "MOV" instruction when writing to this register. */
+   struct{
+	unsigned char U2TBL;     /* UART2 Transmit buffer register low  8 bit 	 */
+	unsigned char U2TBH;     /* UART2 Transmit buffer register high 8 bit  	 */
+   } BYTE;				 	 /* Byte access					   				 */
+   unsigned short   WORD;	 /* Word Access					   				 */
+};
+
+/*------------------------------------------------------
+    UART2 transmit/receive control register 0//0x037c
+------------------------------------------------------*/
+union st_u2c0 {              	/* union U2C0	   							*/
+	struct {             		/* Bit  Access	  	 						*/
+	 unsigned char 	CLK0 :1; 	/* BRG count source select bit 				*/
+	 unsigned char	CLK1 :1; 	/* BRG count source select bit 				*/
+	 unsigned char	CRS  :1; 	/* CTS~/RTS~ function select bit 			*/
+	 unsigned char	TXEPT:1; 	/* Transmit register empty flag 			*/
+	 unsigned char	CRD  :1; 	/* CTS~/RTS~ disable bit 					*/
+	 unsigned char		 :1; 	/* Nothing Assigned							*/
+	 unsigned char	CKPOL:1; 	/* CLK polarity select bit 					*/
+	 unsigned char	UFORM:1; 	/* Transfer format select bit 				*/
+	} BIT;   		     		/*   						 		   		*/
+	unsigned char BYTE;         /* Byte Access 								*/
+}; 								/* UART2 transmit/receive control register 0*/
+
+/*------------------------------------------------------
+    UART2 transmit/receive control register 1 //0x037d
+-----------------------------------------------------*/
+union st_u2c1 {              	/* union U2C1	   							*/
+	struct {             		/* Bit  Access	  	 						*/
+	 unsigned char 	TE_U2C1:1; 	/* Transmit enable bit 						*/
+	 unsigned char	TI_U2C1:1; 	/* Transmit buffer empty flag 				*/
+	 unsigned char	RE_U2C1:1; 	/* Receive enable bit 						*/
+	 unsigned char	RI_U2C1:1; 	/* Receive complete flag 					*/
+	 unsigned char	U2IRS  :1; 	/* UART2 transmit interrupt cause select bit*/
+	 unsigned char	U2RRM  :1; 	/* UART2 continuous receive mode enable bit */
+	 unsigned char	U2LCH  :1; 	/* Data logic select bit 					*/
+	 unsigned char	U2ERE  :1; 	/* Error signal output enable bit 			*/
+	} BIT;   		     		/*   						 		   		*/
+	unsigned char BYTE;         /* Byte Access 								*/
+}; 								/*UART2 transmit/receive control register 1 */
+
+/*------------------------------------------------------
+    UART2 receive buffer registers //0x037e
+------------------------------------------------------*/
+union st_u2rb {     				/* UART2 receive buffer register */
+    struct {						/*  Bit  Access */
+	 unsigned char 			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char   		:1;		/*  Receive data       				*/
+	 unsigned char   		:1;		/* Nothing assigned	   				*/
+	 unsigned char   		:1;		/* Nothing assigned	   				*/
+ 	 unsigned char  ABT_U2RB:1;     /* Arbitration lost detecting flag  */
+ 	 unsigned char  OER_U2RB:1;     /* Overrun error flag 				*/
+ 	 unsigned char  FER_U2RB:1;     /* Framing error flag				*/
+ 	 unsigned char  PER_U2RB:1;     /* Parity error flag 				*/
+ 	 unsigned char  SUM_U2RB:1;     /* Error sum flag 					*/
+    }BIT;
+    struct{
+ 	 unsigned char    U2RBL;        /* Low  8 bit						*/
+ 	 unsigned char    U2RBH;        /* High 8 bit 						*/
+    }BYTE;
+    unsigned short  WORD;
+};
+
+/*------------------------------------------------------
+    Count start flag //0x0380
+------------------------------------------------------*/
+union st_tabsr {              	/* union TABSR	   							*/
+	struct {             		/* Bit  Access	  	 						*/
+     unsigned char	TA0S:1; 	/* Timer A0 count start flag 				*/
+     unsigned char	TA1S:1; 	/* Timer A1 count start flag 				*/
+     unsigned char	TA2S:1; 	/* Timer A2 count start flag 				*/
+     unsigned char	TA3S:1; 	/* Timer A3 count start flag 				*/
+     unsigned char	TA4S:1; 	/* Timer A4 count start flag 				*/
+     unsigned char	TB0S:1; 	/* Timer B0 count start flag 				*/
+     unsigned char	TB1S:1; 	/* Timer B1 count start flag 				*/
+     unsigned char	TB2S:1; 	/* Timer B2 count start flag 				*/
+	} BIT;   		     		/*   						 		   		*/
+	unsigned char BYTE;         /* Byte Access 								*/
+}; 								/*UART2 transmit/receive control register 1 */
+
+/*------------------------------------------------------
+    Clock prescaler reset flag //0x0381
+------------------------------------------------------*/
+union st_cpsrf {              /* union CPSRF    	   						*/
+struct {      /* Bit  Access		   						*/
+     unsigned char 		:1;   /* 											*/
+     unsigned char 		:1;   /* 											*/
+     unsigned char 		:1;   /* 											*/
+     unsigned char 		:1;   /* 											*/
+     unsigned char 		:1;   /* 				 							*/
+     unsigned char 		:1;   /* 				 							*/
+     unsigned char 	 	:1;   /* 											*/
+     unsigned char 	CPSR:1;   /* Clock prescaler reset flag 				*/
+        } BIT;   	  /*       						    			*/
+     unsigned char BYTE;      /* Byte Access 								*/
+};                            /* Watchdog timer start register				*/
+
+/*------------------------------------------------------
+    One-shot start flag //0x0382
+------------------------------------------------------*/
+union st_onsf {              	/* union ONSF	   							*/
+	struct {             		/* Bit  Access	  	 						*/
+	 unsigned char 	 TA0OS:1; 	/* Timer A0 one-shot start flag 			*/
+	 unsigned char 	 TA1OS:1; 	/* Timer A1 one-shot start flag 			*/
+	 unsigned char	 TA2OS:1; 	/* Timer A2 one-shot start flag 			*/
+	 unsigned char	 TA3OS:1; 	/* Timer A3 one-shot start flag 			*/
+	 unsigned char	 TA4OS:1; 	/* Timer A4 one-shot start flag 			*/
+	 unsigned char	 TAZIE:1; 	/* Z phase input enable bit     			*/
+	 unsigned char	TA0TGL:1; 	/* Timer A0 event/trigger select bit 		*/
+	 unsigned char	TA0TGH:1; 	/* Timer A0 event/trigger select bit 		*/
+	} BIT;   		     		/*   						 		   		*/
+	unsigned char BYTE;         /* Byte Access 								*/
+}; 								/*UART2 transmit/receive control register 1 */
+
+/*------------------------------------------------------
+    Trigger select register //0x0383
+------------------------------------------------------*/
+union st_trgsr {              	/* union TRGSR	   							*/
+		struct {             	/* Bit  Access	  	 						*/
+	 unsigned char 	TA1TGL:1; 	/* Timer A1 event/trigger select bit 		*/
+	 unsigned char	TA1TGH:1; 	/* Timer A1 event/trigger select bit 		*/
+	 unsigned char	TA2TGL:1; 	/* Timer A2 event/trigger select bit 		*/
+	 unsigned char	TA2TGH:1; 	/* Timer A2 event/trigger select bit 		*/
+	 unsigned char	TA3TGL:1; 	/* Timer A3 event/trigger select bit 		*/
+	 unsigned char	TA3TGH:1; 	/* Timer A3 event/trigger select bit 		*/
+	 unsigned char	TA4TGL:1; 	/* Timer A4 event/trigger select bit 		*/
+	 unsigned char	TA4TGH:1; 	/* Timer A4 event/trigger select bit 		*/
+	} BIT;   			     	/*   						 		   		*/
+	unsigned char BYTE;           	/* Byte Access 								*/
+}; 								/*UART2 transmit/receive control register 1 */
+
+/*------------------------------------------------------
+    Timer B2 special mode register //0x039e
+------------------------------------------------------*/
+union st_tb2sc {              	/* union tb2sc	   							 */
+		struct {             	/* Bit  Access	  	 						 */
+	 unsigned char 	PWCON :1; 	/* Timer B2 reload timing switching bit      */
+	 unsigned char	IVPCR1:1; 	/* Three phase output port NMI control bit 1 */
+	 unsigned char	      :1; 	/* Nothing is assigned                 		 */
+	 unsigned char	      :1; 	/* Nothing is assigned  		             */
+	 unsigned char	      :1; 	/* Nothing is assigned  		             */
+	 unsigned char	      :1; 	/* Nothing is assigned  		             */
+	 unsigned char	      :1; 	/* Nothing is assigned  		             */
+	 unsigned char	      :1; 	/* Nothing is assigned  		             */
+	} BIT;   			     	/*   						 		   		 */
+	unsigned char BYTE;         /* Byte Access 								*/
+}; 								/*UART2 transmit/receive control register 1 */
+
+/*------------------------------------------------------
+    UART0 transmit/receive mode register //0x03a0
+------------------------------------------------------*/
+union st_u0mr {              	  /* union U0MR	   							*/
+	struct {             	      /* Bit  Access	  	 					*/
+	 unsigned char 	SMD0_U0MR :1; /* Serial I/O mode select bit 			*/
+	 unsigned char 	SMD1_U0MR :1; /* Serial I/O mode select bit 			*/
+	 unsigned char 	SMD2_U0MR :1; /* Serial I/O mode select bit 			*/
+	 unsigned char 	CKDIR_U0MR:1; /* Internal/external clock select bit 	*/
+	 unsigned char 	STPS_U0MR :1; /* Stop bit length select bit 			*/
+	 unsigned char 	PRY_U0MR  :1; /* Odd/even parity select bit 			*/
+	 unsigned char 	PRYE_U0MR :1; /* Parity enable bit 						*/
+	 unsigned char 	IOPOL_U0MR :1; /* TxD,RxD I/O polarity reverse bit		*/
+	} BIT;   		     	  	  /*   						 		   		*/
+	unsigned char BYTE;           /* Byte Access 							*/
+};
+
+/*------------------------------------------------------
+    UART0 transmit/receive mode register //0x03a2
+------------------------------------------------------*/
+union st_u0tb {				/* UART0 Transmit buffer register 16 bit ; Use "MOV" instruction when writing to this register. */
+   struct{
+	unsigned char U0TBL;     /* UART0 Transmit buffer register low  8 bit 	 */
+	unsigned char U0TBH;     /* UART0 Transmit buffer register high 8 bit 	 */
+   } BYTE;					 /* Byte access					   				 */
+   unsigned short   WORD;	 /* Word Access					   				 */
+};
+
+/*------------------------------------------------------
+    UARTi transmit/receive control register 0 //0x03a4
+------------------------------------------------------*/
+union st_u0c0 {              	/* union U0C0	   							*/
+	struct {             		/* Bit  Access	  	 						*/
+	 unsigned char 	CLK0 :1; 	/* BRG count source select bit 				*/
+	 unsigned char	CLK1 :1; 	/* BRG count source select bit 				*/
+	 unsigned char	CRS  :1; 	/* CTS~/RTS~ function select bit 			*/
+	 unsigned char	TXEPT:1; 	/* Transmit register empty flag 			*/
+	 unsigned char	CRD  :1; 	/* CTS~/RTS~ disable bit 					*/
+	 unsigned char	NCH  :1; 	/* Data output select bit 					*/
+	 unsigned char	CKPOL:1; 	/* CLK polarity select bit 					*/
+	 unsigned char	UFORM:1; 	/* Transfer format select bit 				*/
+	} BIT;   		     		/*   						 		   		*/
+	unsigned char BYTE;         /* Byte Access 								*/
+}; 								/*UARTi transmit/receive control register 0 */
+
+/*------------------------------------------------------
+    UART0 transmit/receive control register 1 //0x03a5
+------------------------------------------------------*/
+union st_u0c1 {             /* union U0C1		   							*/
+	struct {            	/* Bit  Access	  	 							*/
+	 unsigned char 	TE     :1; 	/* Transmit enable bit 							*/
+	 unsigned char	TI     :1; 	/* Transmit buffer empty flag 					*/
+	 unsigned char	RE     :1; 	/* Receive enable bit 							*/
+	 unsigned char	RI     :1; 	/* Receive complete flag 						*/
+	 unsigned char	       :1; 	/* Nothing Assigned						 		*/
+	 unsigned char	       :1; 	/* Nothing Assigned						 		*/
+	 unsigned char	U0LCH  :1; 	/* Data logic select bit */
+	 unsigned char	U0ERE  :1; 	/* Error signal output enable bit */
+	} BIT;   		    	/*   						 		   			*/
+	unsigned char BYTE;     /* Byte Access 									*/
+}; 							/*UART0 transmit/receive control register 1 	*/
+
+/*------------------------------------------------------
+    UART0 receive buffer register //0x03a6
+------------------------------------------------------*/
+union st_u0rb {						/*  UART0 receive buffer register 	*/
+    struct {						/*  Bit  Access 				 	*/
+	 unsigned char 			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char  		:1;		/*  Receive data       				*/
+	 unsigned char  		:1;		/* Nothing assigned	   				*/
+	 unsigned char  		:1;		/* Nothing assigned	   				*/
+ 	 unsigned char  ABT_U0RB:1;     /* Arbitration lost detecting flag	*/
+ 	 unsigned char  OER_U0RB:1;     /* Overrun error flag 				*/
+ 	 unsigned char  FER_U0RB:1;     /* Framing error flag				*/
+ 	 unsigned char  PER_U0RB:1;     /* Parity error flag 				*/
+ 	 unsigned char  SUM_U0RB:1;     /* Error sum flag 					*/
+    }BIT;
+    struct{
+     unsigned char U0RBL;        	/* Low  8 bit 						*/
+     unsigned char U0RBH;           /* High 8 bit 						*/
+    }BYTE;
+    unsigned short  WORD;
+};
+
+/*------------------------------------------------------
+    UART1 transmit/receive mode register //0x03a8
+------------------------------------------------------*/
+union st_u1mr {              	  /* union U1MR	   							*/
+	struct {             	 	  /* Bit  Access	  	 					*/
+	 unsigned char 	SMD0_U1MR  :1; /* Serial I/O mode select bit 			*/
+	 unsigned char	SMD1_U1MR  :1; /* Serial I/O mode select bit 			*/
+	 unsigned char	SMD2_U1MR  :1; /* Serial I/O mode select bit 			*/
+	 unsigned char	CKDIR_U1MR :1; /* Internal/external clock select bit 	*/
+	 unsigned char	STPS_U1MR  :1; /* Stop bit length select bit 			*/
+	 unsigned char	PRY_U1MR   :1; /* Odd/even parity select bit 			*/
+	 unsigned char	PRYE_U1MR  :1; /* Parity enable bit 						*/
+	 unsigned char	IOPOL_U1MR :1; /* TxD,RxD I/O polarity reverse bit			*/
+	} BIT;   		     	  	  /*   						 		   		*/
+	unsigned char BYTE;           /* Byte Access 							*/
+};
+
+/*------------------------------------------------------
+    UART1 transmit buffer register //0x03aa
+------------------------------------------------------*/
+union st_u1tb {				 /* UART1 Transmit buffer register 16 bit ; Use "MOV" instruction when writing to this register. */
+   struct{
+	unsigned char U1TBL;     /* UART1 Transmit buffer register low  8 bit    */
+	unsigned char U1TBH;     /* UART1 Transmit buffer register high 8 bit    */
+   } BYTE;					 /* Byte access					   				 */
+   unsigned short   WORD;	 /* Word Access					   				 */
+};
+
+/*------------------------------------------------------
+     UART1 transmit/receive control register 0 //0x03ac
+------------------------------------------------------*/
+union st_u1c0 {              	/* union UCR	   							*/
+	struct {             		/* Bit  Access	  	 						*/
+	 unsigned char 	CLK0 :1; 	/* BRG count source select bit 				*/
+	 unsigned char	CLK1 :1; 	/* BRG count source select bit 				*/
+	 unsigned char	CRS  :1; 	/* CTS~/RTS~ function select bit 			*/
+	 unsigned char	TXEPT:1; 	/* Transmit register empty flag 			*/
+	 unsigned char	CRD  :1; 	/* CTS~/RTS~ disable bit 					*/
+	 unsigned char	NCH  :1; 	/* Data output select bit 					*/
+	 unsigned char	CKPOL:1; 	/* CLK polarity select bit 					*/
+	 unsigned char	UFORM:1; 	/* Transfer format select bit 				*/
+	} BIT;   		     		/*   						 		   		*/
+	unsigned char BYTE;         /* Byte Access 								*/
+}; 								/*UARTi transmit/receive control register 0 */
+
+/*------------------------------------------------------
+     UART1 transmit/receive control register 1 //0x03ad
+------------------------------------------------------*/
+union st_u1c1 {             /* union U1C1	   								*/
+	struct {            	/* Bit  Access	  	 							*/
+	 unsigned char 	TE:1; 	/* Transmit enable bit 							*/
+	 unsigned char	TI:1; 	/* Transmit buffer empty flag 					*/
+	 unsigned char	RE:1; 	/* Receive enable bit 							*/
+	 unsigned char	RI:1; 	/* Receive complete flag 						*/
+	 unsigned char	  :1; 	/*  											*/
+	 unsigned char	  :1; 	/*  											*/
+	 unsigned char	  :1; 	/*  											*/
+	 unsigned char	  :1; 	/*  											*/
+	} BIT;   		     	/*   						 		   		    */
+	 unsigned char BYTE;    /* Byte Access 								    */
+}; 							/*UART1 transmit/receive control register 1     */
+
+/*------------------------------------------------------
+     UART1 receive buffer register //0x03ae
+------------------------------------------------------*/
+union st_u1rb {						/* UART1 receive buffer register */
+    struct {						/*  Bit  Access */
+	 unsigned char 			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char			:1;		/*  Receive data       				*/
+	 unsigned char  		:1;		/*  Receive data       				*/
+	 unsigned char  		:1;		/* Nothing assigned	   				*/
+	 unsigned char  		:1;		/* Nothing assigned	   				*/
+ 	 unsigned char  ABT_U1RB:1;     /* Arbitration lost detecting flag	*/
+ 	 unsigned char  OER_U1RB:1;     /* Overrun error flag 				*/
+ 	 unsigned char  FER_U1RB:1;     /* Framing error flag				*/
+ 	 unsigned char  PER_U1RB:1;     /* Parity error flag 				*/
+ 	 unsigned char  SUM_U1RB:1;     /* Error sum flag 					*/
+    }BIT;
+    struct{
+     unsigned char U1RBL;           /* Low  8 bit 						*/
+     unsigned char U1RBH;           /* High 8 bit 						*/
+    }BYTE;
+    unsigned short  WORD;
+};
+
+/*------------------------------------------------------
+    UART transmit/receive control register 2 //0x03b0
+------------------------------------------------------*/
+union st_ucon {              	/* union UCON   							*/
+	struct {             		/* Bit  Access	  	 						*/
+	 unsigned char 	U0IRS :1; 	/* UART0 transmit interrupt cause select bit*/
+	 unsigned char	U1IRS :1; 	/* UART1 transmit interrupt cause select bit*/
+	 unsigned char	U0RRM :1; 	/* UART0 continuous receive mode enable bit */
+	 unsigned char	U1RRM :1; 	/* UART1 continuous receive mode enable bit */
+	 unsigned char	CLKMD0:1; 	/* CLK/CLKS select bit 0					*/
+	 unsigned char	CLKMD1:1; 	/* CLK/CLKS select bit 1					*/
+	 unsigned char	RCSP  :1; 	/* Separate CTS~/RTS~ bit               	*/
+	 unsigned char	      :1; 	/* 											*/
+	} BIT;   		     		/*   						 		   		*/
+	unsigned char BYTE;        /* Byte Access 								*/
+}; 								/*UART transmit/receive control register 2  */
+
+/*------------------------------------------------------
+    DMA0 request cause select register //0x03b8
+------------------------------------------------------*/
+union st_dm0sl {			  /*    DMAi request cause select registers			*/
+    struct{
+     unsigned char    DSEL0:1;/* DMA request cause select bit 				*/
+     unsigned char    DSEL1:1;/* DMA request cause select bit 				*/
+     unsigned char    DSEL2:1;/* DMA request cause select bit 				*/
+     unsigned char    DSEL3:1;/* DMA request cause select bit 				*/
+     unsigned char         :1;
+     unsigned char         :1;
+     unsigned char    DMS  :1;/* DMA request cause expansion bit 			*/
+     unsigned char    DSR  :1;/* Software DMA request bit 					*/
+    }BIT;
+     unsigned char  BYTE;
+};
+
+/*------------------------------------------------------
+    DMA1 request cause select register //0x03ba
+------------------------------------------------------*/
+union st_dm1sl {			   /*    DMAi request cause select registers	*/
+    struct{
+     unsigned char    DSEL0:1; /* DMA request cause select bit 				*/
+     unsigned char    DSEL1:1; /* DMA request cause select bit 				*/
+     unsigned char    DSEL2:1; /* DMA request cause select bit 				*/
+     unsigned char    DSEL3:1; /* DMA request cause select bit 				*/
+     unsigned char     	   :1;
+     unsigned char    	   :1;
+     unsigned char    DMS  :1; /* DMA request cause expansion bit 			*/
+     unsigned char    DSR  :1; /* Software DMA request bit 					*/
+    }BIT;
+    unsigned char  BYTE;
+};
+
+/*------------------------------------------------------
+    CRC data register //0x03bc
+------------------------------------------------------*/
+union st_crcd {				 /* CRC data register 16 bit     				 */
+   struct{
+	unsigned char CRCDL;     /* CRC data register low  8 bit 				 */
+	unsigned char CRCDH;     /* CRC data register high 8 bit 				 */
+   } BYTE;					 /* Byte access					 				 */
+   unsigned short   WORD;    /* Word Access					 				 */
+};
+
+/*------------------------------------------------------
+    A/D register 0 //0x03c0
+------------------------------------------------------*/
+union st_ad0 {				 /* A/D register 0 16 bit 						*/
+   struct{
+	unsigned char AD0L;      /* A/D register 0 low  8 bit 					*/
+	unsigned char AD0H;      /* A/D register 0 high 8 bit 					*/
+   }BYTE;					 /* Byte access					    			*/
+   unsigned short   WORD;	 /* Word Access					    			*/
+};
+
+/*------------------------------------------------------
+    A/D register 1 //0x03c2
+------------------------------------------------------*/
+ union st_ad1 {				 /* A/D register 1 16 bit 						*/
+   struct{
+	unsigned char AD1L;      /* A/D register 1 low  8 bit 					*/
+	unsigned char AD1H;      /* A/D register 1 high 8 bit 					*/
+   } BYTE;					 /* Byte access					    			*/
+   unsigned short   WORD;	 /* Word Access					    			*/
+};
+
+/*------------------------------------------------------
+    A/D register 2 //0x03c4
+------------------------------------------------------*/
+union st_ad2 {				 /* A/D register 2 16 bit 						*/
+  struct{
+	unsigned char AD2L;      /* A/D register 2 low  8 bit 					*/
+	unsigned char AD2H;      /* A/D register 2 high 8 bit 					*/
+  } BYTE;					 /* Byte access					    			*/
+  unsigned short   WORD;	 /* Word Access					    			*/
+};
+
+/*------------------------------------------------------
+    A/D register 3 //0x03c6
+------------------------------------------------------*/
+union st_ad3 {			     /* A/D register 3 16 bit 						*/
+  struct{
+	unsigned char AD3L;      /* A/D register 3 low  8 bit 					*/
+	unsigned char AD3H;      /* A/D register 3 high 8 bit 					*/
+  } BYTE;					 /* Byte access					    			*/
+	unsigned short   WORD;	 /* Word Access					    			*/
+};
+
+/*------------------------------------------------------
+    A/D register 4 //0x03c8
+------------------------------------------------------*/
+union st_ad4 {			     /* A/D register 4 16 bit 						*/
+  struct{
+	unsigned char AD4L;      /* A/D register 4 low  8 bit 					*/
+	unsigned char AD4H;      /* A/D register 4 high 8 bit 					*/
+  } BYTE;				     /* Byte access					   				*/
+  unsigned short   WORD;	 /* Word Access					    			*/
+};
+
+/*------------------------------------------------------
+    A/D register 5 //0x03ca
+------------------------------------------------------*/
+union st_ad5 {				 /* A/D register 5 16 bit 						*/
+  struct{
+	unsigned char AD5L;      /* A/D register 5 low  8 bit 					*/
+	unsigned char AD5H;      /* A/D register 5 high 8 bit 					*/
+  } BYTE;					 /* Byte access					   				*/
+	unsigned short   WORD;	 /* Word Access					   				*/
+};
+
+/*------------------------------------------------------
+    A/D register 6 //0x03cc
+------------------------------------------------------*/
+union st_ad6 {				 /* A/D register 6 16 bit 						*/
+   struct{
+	unsigned char AD6L;      /* A/D register 6 low  8 bit 					*/
+	unsigned char AD6H;      /* A/D register 6 high 8 bit 					*/
+   } BYTE;					 /* Byte access					    			*/
+   unsigned short   WORD;	 /* Word Access					    			*/
+ };
+
+/*------------------------------------------------------
+    A/D register 7 //0x03ce
+------------------------------------------------------*/
+union st_ad7 {				 /* A/D register 7 16 bit 						*/
+   struct{
+	unsigned char AD7L;      /* A/D register 7 low  8 bit 					*/
+	unsigned char AD7H;      /* A/D register 7 high 8 bit 					*/
+   } BYTE;					 /* Byte access					    			*/
+   unsigned short   WORD;	 /* Word Access					    			*/
+ };
+
+/*------------------------------------------------------
+    A/D control register 2 //0x03d4
+------------------------------------------------------*/
+union st_adcon2 {				/* union ADCON2						*/
+    struct {					/*  Bit  Access 					*/
+	 unsigned char     SMP     :1;	    /* A/D conversion method select bit */
+	 unsigned char     ADGSEL0 :1;		/* Reserved bit (Always set to 0 )  */
+	 unsigned char     ADGSEL1 :1;		/* Reserved bit (Always set to 0 )  */
+	 unsigned char    	       :1;		/* Reserved bit (Always set to 0 )  */
+	 unsigned char     CKS2    :1;		/* Nothing Assigned.		        */
+	 unsigned char    	       :1;		/* Nothing Assigned.		        */
+	 unsigned char    	       :1;		/* Nothing Assigned.		        */
+	 unsigned char    	       :1;		/* Nothing Assigned.		        */
+	} BIT;
+    unsigned char   BYTE;		/*  Byte Access 					*/
+};
+
+/*------------------------------------------------------
+    A/D control register 0  //0x03d6
+------------------------------------------------------*/
+union st_adcon0 {              	/* union ADCON0	   							*/
+	struct {             		/* Bit  Access	  	 						*/
+	 unsigned char 	CH0 :1; 	/* Analog input pin select bit 				*/
+	 unsigned char	CH1 :1; 	/* Analog input pin select bit 				*/
+	 unsigned char	CH2 :1; 	/* Analog input pin select bit 				*/
+	 unsigned char	MD0 :1; 	/* A/D operation mode select bit 0 			*/
+	 unsigned char	MD1 :1; 	/* A/D operation mode select bit 0 			*/
+	 unsigned char	TRG :1; 	/* Trigger select bit 						*/
+	 unsigned char	ADST:1; 	/* A/D conversion start flag 				*/
+	 unsigned char	CKS0:1; 	/* Frequency select bit 0 					*/
+	} BIT;   		     		/*   						 		   		*/
+	unsigned char BYTE;         /* Byte Access 								*/
+}; 								/*A/D control register 0					*/
+
+
+/*------------------------------------------------------
+   A/D control register 1 //0x03d7
+------------------------------------------------------*/
+union st_adcon1 {              	/* union ADCON1	   							*/
+	struct {             		/* Bit  Access	  	 						*/
+	 unsigned char 	SCAN0:1; 	/* A/D sweep pin select bit 				*/
+	 unsigned char	SCAN1:1; 	/* A/D sweep pin select bit 				*/
+	 unsigned char	MD2  :1; 	/* A/D operation mode select bit 1 			*/
+	 unsigned char	BITS :1; 	/* 8/10-bit mode select bit 				*/
+	 unsigned char	CKS1 :1; 	/* Frequency select bit 1 					*/
+	 unsigned char	VCUT :1; 	/* Vref connect bit							*/
+	 unsigned char	OPA0 :1; 	/* External op-amp connection mode bit 		*/
+	 unsigned char	OPA1 :1; 	/* External op-amp connection mode bit 		*/
+	} BIT;   		     		/*   						 		   		*/
+	unsigned char BYTE;         /* Byte Access 								*/
+}; 								/*A-D control register 1					*/
+
+
+/*------------------------------------------------------
+    D/A control register //0x03dc
+------------------------------------------------------*/
+union st_dacon{               /* union DACON    	   					*/
+	struct {              	  /* Bit  Access 		   				*/
+	 unsigned char 	DA0E :1;  /* D/A0 output enable bit	 		    */
+	 unsigned char	DA1E :1;  /* D/A1 output enable bit 			*/
+	 unsigned char		 :1;  /* Nothing Assigned 					*/
+	 unsigned char		 :1;  /* Nothing Assigned 					*/
+	 unsigned char		 :1;  /* Nothing Assigned 					*/
+	 unsigned char		 :1;  /* Nothing Assigned 					*/
+	 unsigned char	 	 :1;  /* Nothing Assigned 					*/
+	 unsigned char		 :1;  /* Nothing Assigned 					*/
+	} BIT;   		      	  /*       						    	*/
+	unsigned char BYTE;       /* Byte Access 						*/
+};                            /* D/A control register				*/
+
+/*------------------------------------------------------
+    Port P14 control register //0x03de
+------------------------------------------------------*/
+union st_pc14{                /* union pc14 	   					*/
+	struct {              	  /* Bit  Access 		   				*/
+	 unsigned char 	P140 :1;  /* Port P14_0 register */
+	 unsigned char	P141 :1;  /* Port P14_1 register */
+	 unsigned char		 :1;  /* Nothing Assigned 					*/
+	 unsigned char		 :1;  /* Nothing Assigned 					*/
+	 unsigned char	pd140:1;  /* Port P14_0 direction register */
+	 unsigned char	pd141:1;  /* Port P14_1 direction register */
+	 unsigned char	 	 :1;  /* Nothing Assigned 					*/
+	 unsigned char		 :1;  /* Nothing Assigned 					*/
+	} BIT;   		      	  /*       						    	*/
+	unsigned char BYTE;       /* Byte Access 						*/
+};                            /* Port P14 control register				*/
+
+/*------------------------------------------------------
+    Pull-up control register 3 //0x03df
+------------------------------------------------------*/
+union st_pur3{               /* union pur3	   					*/
+	struct {              	  /* Bit  Access 		   				*/
+	 unsigned char 	PU30:1;  /* P11_0 to P11_3 pull-up */
+	 unsigned char	PU31:1;  /* P11_4 to P11_7 pull-up */
+	 unsigned char	PU32:1;  /* P12_0 to P12_3 pull-up */
+	 unsigned char	PU33:1;  /* P12_4 to P12_7 pull-up */
+	 unsigned char	PU34:1;  /* P13_0 to P13_3 pull-up */
+	 unsigned char	PU35:1;  /* P13_4 to P13_7 pull-up */
+	 unsigned char	PU36:1;  /* P14_0,P14_1 pull-up */
+	 unsigned char	PU37:1;  /* P11 to P14 effective bit */
+	} BIT;   		      	  /*       						    	*/
+	unsigned char BYTE;       /* Byte Access 						*/
+};                            /* Pull-up control register 3				*/
+
+/*------------------------------------------------------
+    Port P0 register //0x03e0
+------------------------------------------------------*/
+union st_p0 {               /* union P0    	   					*/
+	struct {            	/* Bit  Access 		   				*/
+	 unsigned char 	P0_0:1; /* Port P00 register 				*/
+	 unsigned char	P0_1:1; /* Port P01 register 				*/
+	 unsigned char	P0_2:1; /* Port P02 register 				*/
+	 unsigned char	P0_3:1; /* Port P03 register 				*/
+	 unsigned char	P0_4:1; /* Port P04 register 				*/
+	 unsigned char	P0_5:1; /* Port P05 register 				*/
+	 unsigned char	P0_6:1; /* Port P06 register 				*/
+	 unsigned char	P0_7:1; /* Port P07 register 				*/
+	} BIT;   		    	/*        						    */
+	unsigned char BYTE;     /*  Byte Access 					*/
+};                          /* 						            */
+
+/*------------------------------------------------------
+    Port P1 register //0x03e1
+------------------------------------------------------*/
+union st_p1 {              /* union P1	    	   		    	*/
+	struct {           	   /* Bit  Access 		   	  	    	*/
+	 unsigned char 	P1_0:1;/* Port P10 register			    	*/
+	 unsigned char	P1_1:1;/* Port P11 register 				*/
+	 unsigned char	P1_2:1;/* Port P12 register 				*/
+	 unsigned char	P1_3:1;/* Port P13 register 				*/
+	 unsigned char	P1_4:1;/* Port P14 register 				*/
+	 unsigned char	P1_5:1;/* Port P15 register 				*/
+	 unsigned char	P1_6:1;/* Port P16 register 				*/
+	 unsigned char	P1_7:1;/* Port P17 register 				*/
+	} BIT;   		       /*        					    	*/
+	unsigned char BYTE;    /*  Byte Access 			        	*/
+};                         /* 						        	*/
+
+/*------------------------------------------------------
+    Port P0 direction register //0x03e2
+------------------------------------------------------*/
+union st_pd0 {              /* union PD0    	   		   		*/
+	struct {            	/* Bit  Access 		   	  	   		*/
+	 unsigned char 	PD0_0:1;/* Port P00 direction register 		*/
+	 unsigned char	PD0_1:1;/* Port P01 direction register 		*/
+	 unsigned char	PD0_2:1;/* Port P02 direction register 		*/
+	 unsigned char	PD0_3:1;/* Port P03 direction register 		*/
+	 unsigned char	PD0_4:1;/* Port P04 direction register 		*/
+	 unsigned char	PD0_5:1;/* Port P05 direction register 		*/
+	 unsigned char	PD0_6:1;/* Port P06 direction register 		*/
+	 unsigned char	PD0_7:1;/* Port P07 direction register 		*/
+	} BIT;   		    	/*        					   		*/
+	unsigned char BYTE;     /*  Byte Access 			   		*/
+};                          /* 						       		*/
+
+
+/*------------------------------------------------------
+    Port P1 direction register //0x03e3
+------------------------------------------------------*/
+union st_pd1 {              /* union PD1    	   		   */
+	struct {            	/* Bit  Access 		   	  	   */
+	 unsigned char 	PD1_0:1;/* Port P10 direction register */
+	 unsigned char	PD1_1:1;/* Port P11 direction register */
+	 unsigned char	PD1_2:1;/* Port P12 direction register */
+	 unsigned char	PD1_3:1;/* Port P13 direction register */
+	 unsigned char	PD1_4:1;/* Port P14 direction register */
+	 unsigned char	PD1_5:1;/* Port P15 direction register */
+	 unsigned char	PD1_6:1;/* Port P16 direction register */
+	 unsigned char	PD1_7:1;/* Port P17 direction register */
+	} BIT;   		    	/*        					   */
+	unsigned char BYTE;     /*  Byte Access 			   */
+};                          /* 						       */
+
+/*------------------------------------------------------
+    Port P2 register //0x03e4
+------------------------------------------------------*/
+union st_p2 {              /* union P2	    	   		    */
+	struct {           	   /* Bit  Access 		   	  	    */
+	 unsigned char 	P2_0:1;/* Port P20 register			    */
+	 unsigned char	P2_1:1;/* Port P21 register 			*/
+	 unsigned char	P2_2:1;/* Port P22 register 			*/
+	 unsigned char	P2_3:1;/* Port P23 register 			*/
+	 unsigned char	P2_4:1;/* Port P24 register 			*/
+	 unsigned char	P2_5:1;/* Port P25 register 			*/
+	 unsigned char	P2_6:1;/* Port P26 register 			*/
+	 unsigned char	P2_7:1;/* Port P27 register 			*/
+	} BIT;   		  	   /*        					    */
+	unsigned char BYTE;    /*  Byte Access 			       	*/
+};                         /* 						        */
+
+/*------------------------------------------------------
+    Port P3 register //0x03e5
+------------------------------------------------------*/
+union st_p3 {              /* union P3	    	   		    */
+	struct {           	   /* Bit  Access 		   	  	    */
+	 unsigned char 	P3_0:1;/* Port P30 register			    */
+	 unsigned char	P3_1:1;/* Port P31 register 			*/
+	 unsigned char	P3_2:1;/* Port P32 register 			*/
+	 unsigned char	P3_3:1;/* Port P33 register 			*/
+	 unsigned char	P3_4:1;/* Port P34 register 			*/
+	 unsigned char	P3_5:1;/* Port P35 register 			*/
+	 unsigned char	P3_6:1;/* Port P36 register 			*/
+	 unsigned char	P3_7:1;/* Port P37 register 			*/
+	} BIT;   		   	   /*        					    */
+	unsigned char BYTE;    /*  Byte Access 			        */
+};                         /* 						        */
+
+/*------------------------------------------------------
+    Port P2 direction register //0x03e6
+------------------------------------------------------*/
+union st_pd2 {              /* union PD2    	   		   */
+	struct {           	    /* Bit  Access 		   	  	   */
+	 unsigned char 	PD2_0:1;/* Port P20 direction register */
+	 unsigned char	PD2_1:1;/* Port P21 direction register */
+	 unsigned char	PD2_2:1;/* Port P22 direction register */
+	 unsigned char	PD2_3:1;/* Port P23 direction register */
+	 unsigned char	PD2_4:1;/* Port P24 direction register */
+	 unsigned char	PD2_5:1;/* Port P25 direction register */
+	 unsigned char	PD2_6:1;/* Port P26 direction register */
+	 unsigned char	PD2_7:1;/* Port P27 direction register */
+		} BIT;   		    /*        					   */
+	unsigned char BYTE;     /*  Byte Access 			   */
+};                          /* 						       */
+
+
+/*------------------------------------------------------
+    Port P3 direction register //0x03e7
+------------------------------------------------------*/
+union st_pd3 {              /* union PD3    	   		   */
+	struct {           	    /* Bit  Access 		   	  	   */
+	 unsigned char 	PD3_0:1;/* Port P30 direction register */
+	 unsigned char	PD3_1:1;/* Port P31 direction register */
+	 unsigned char	PD3_2:1;/* Port P32 direction register */
+	 unsigned char	PD3_3:1;/* Port P33 direction register */
+	 unsigned char	PD3_4:1;/* Port P34 direction register */
+	 unsigned char	PD3_5:1;/* Port P35 direction register */
+	 unsigned char	PD3_6:1;/* Port P36 direction register */
+	 unsigned char	PD3_7:1;/* Port P37 direction register */
+	} BIT;   		        /*        					   */
+	unsigned char BYTE;     /*  Byte Access 			   */
+};                          /* 						       */
+
+/*------------------------------------------------------
+    Port P4 register //0x03e8
+------------------------------------------------------*/
+union st_p4 {              /* union P4	    	   		    */
+	struct {           	   /* Bit  Access 		   	  	    */
+	 unsigned char 	P4_0:1;/* Port P40 register			    */
+	 unsigned char	P4_1:1;/* Port P41 register 			*/
+	 unsigned char	P4_2:1;/* Port P42 register 			*/
+	 unsigned char	P4_3:1;/* Port P43 register 			*/
+	 unsigned char	P4_4:1;/* Port P44 register 			*/
+	 unsigned char	P4_5:1;/* Port P45 register 			*/
+	 unsigned char	P4_6:1;/* Port P46 register 			*/
+	 unsigned char	P4_7:1;/* Port P47 register 			*/
+	} BIT;   		   	   /*        					    */
+	unsigned char BYTE;    /*  Byte Access 			        */
+};                         /* 						        */
+
+/*------------------------------------------------------
+    Port P5 register //0x03e9
+------------------------------------------------------*/
+union st_p5 {              /* union P5	    	   		    */
+	struct {           	   /* Bit  Access 		   	  	    */
+	 unsigned char 	P5_0:1;/* Port P50 register			    */
+	 unsigned char	P5_1:1;/* Port P51 register 			*/
+	 unsigned char	P5_2:1;/* Port P52 register 			*/
+	 unsigned char	P5_3:1;/* Port P53 register 			*/
+	 unsigned char	P5_4:1;/* Port P54 register 			*/
+	 unsigned char	P5_5:1;/* Port P55 register 			*/
+	 unsigned char	P5_6:1;/* Port P56 register 			*/
+	 unsigned char	P5_7:1;/* Port P57 register 			*/
+	} BIT;   		       /*        					    */
+	unsigned char BYTE;    /*  Byte Access 			        */
+};                         /* 						        */
+
+
+/*------------------------------------------------------
+    Port P4 direction register //0x03ea
+------------------------------------------------------*/
+union st_pd4 {              /* union PD4    	   		   */
+	struct {            	/* Bit  Access 		   	  	   */
+	 unsigned char 	PD4_0:1;/* Port P40 direction register */
+	 unsigned char	PD4_1:1;/* Port P41 direction register */
+	 unsigned char	PD4_2:1;/* Port P42 direction register */
+	 unsigned char	PD4_3:1;/* Port P43 direction register */
+	 unsigned char	PD4_4:1;/* Port P44 direction register */
+	 unsigned char	PD4_5:1;/* Port P45 direction register */
+	 unsigned char	PD4_6:1;/* Port P46 direction register */
+	 unsigned char	PD4_7:1;/* Port P47 direction register */
+	} BIT;   		    	/*        					   */
+	unsigned char BYTE;    	/*  Byte Access 			   */
+};                          /* 						       */
+
+
+
+/*------------------------------------------------------
+    Port P5 direction register //0x03eb
+------------------------------------------------------*/
+union st_pd5 {              /* union PD5    	   		   */
+	struct {            	/* Bit  Access 		   	  	   */
+	 unsigned char 	PD5_0:1;/* Port P50 direction register */
+	 unsigned char	PD5_1:1;/* Port P51 direction register */
+	 unsigned char	PD5_2:1;/* Port P52 direction register */
+	 unsigned char	PD5_3:1;/* Port P53 direction register */
+	 unsigned char	PD5_4:1;/* Port P54 direction register */
+	 unsigned char	PD5_5:1;/* Port P55 direction register */
+	 unsigned char	PD5_6:1;/* Port P56 direction register */
+	 unsigned char	PD5_7:1;/* Port P57 direction register */
+	} BIT;   		    	/*        					   */
+	unsigned char BYTE;     /*  Byte Access 			   */
+};                          /* 						       */
+
+/*------------------------------------------------------
+    Port P6 register //0x03ec
+------------------------------------------------------*/
+union st_p6 {              /* union P6	    	   		    */
+	struct {           	   /* Bit  Access 		   	  	    */
+	 unsigned char 	P6_0:1;/* Port P60 register			    */
+	 unsigned char	P6_1:1;/* Port P61 register 			*/
+	 unsigned char	P6_2:1;/* Port P62 register 			*/
+	 unsigned char	P6_3:1;/* Port P63 register 			*/
+	 unsigned char	P6_4:1;/* Port P64 register 			*/
+	 unsigned char	P6_5:1;/* Port P65 register 			*/
+	 unsigned char	P6_6:1;/* Port P66 register 			*/
+	 unsigned char	P6_7:1;/* Port P67 register 			*/
+	} BIT;   		       /*        					    */
+	unsigned char BYTE;    /*  Byte Access 			        */
+};                         /* 						        */
+
+/*------------------------------------------------------
+    Port P7 register //0x03ed
+------------------------------------------------------*/
+union st_p7 {              /* union P7	    	   		    */
+	struct {               /* Bit  Access 		   	  	    */
+	 unsigned char 	P7_0:1;/* Port P70 register			    */
+	 unsigned char	P7_1:1;/* Port P71 register 			*/
+	 unsigned char	P7_2:1;/* Port P72 register 			*/
+	 unsigned char	P7_3:1;/* Port P73 register 			*/
+	 unsigned char	P7_4:1;/* Port P74 register 			*/
+	 unsigned char	P7_5:1;/* Port P75 register 			*/
+	 unsigned char	P7_6:1;/* Port P76 register 			*/
+	 unsigned char	P7_7:1;/* Port P77 register 			*/
+	} BIT;   		   	   /*        					    */
+	unsigned char BYTE;    /*  Byte Access 			        */
+};                         /* 						        */
+
+
+/*------------------------------------------------------
+    Port P6 direction register //0x03ee
+------------------------------------------------------*/
+union st_pd6 {              /* union PD6    	   		   */
+	struct {            	/* Bit  Access 		   	  	   */
+	 unsigned char 	PD6_0:1;/* Port P60 direction register */
+	 unsigned char	PD6_1:1;/* Port P61 direction register */
+	 unsigned char	PD6_2:1;/* Port P62 direction register */
+	 unsigned char	PD6_3:1;/* Port P63 direction register */
+	 unsigned char	PD6_4:1;/* Port P64 direction register */
+	 unsigned char	PD6_5:1;/* Port P65 direction register */
+	 unsigned char	PD6_6:1;/* Port P66 direction register */
+	 unsigned char	PD6_7:1;/* Port P67 direction register */
+	} BIT;   		    	/*        					   */
+	unsigned char BYTE;     /*  Byte Access 			   */
+};                          /* 						       */
+
+
+/*------------------------------------------------------
+    Port P7 direction register //0x03ef
+------------------------------------------------------*/
+union st_pd7 {              /* union PD7    	   		   */
+	struct {                /* Bit  Access 		   	  	   */
+	 unsigned char 	PD7_0:1;/* Port P70 direction register */
+	 unsigned char	PD7_1:1;/* Port P71 direction register */
+	 unsigned char	PD7_2:1;/* Port P72 direction register */
+	 unsigned char	PD7_3:1;/* Port P73 direction register */
+	 unsigned char	PD7_4:1;/* Port P74 direction register */
+	 unsigned char	PD7_5:1;/* Port P75 direction register */
+	 unsigned char	PD7_6:1;/* Port P76 direction register */
+	 unsigned char	PD7_7:1;/* Port P77 direction register */
+		} BIT;   		    /*        					   */
+	unsigned char BYTE;     /*  Byte Access 			   */
+};                          /* 						       */
+
+/*------------------------------------------------------
+    Port P8 register //0x03f0
+------------------------------------------------------*/
+union st_p8 {              /* union P8	    	   		    */
+	struct {           	   /* Bit  Access 		   	  	    */
+	 unsigned char 	P8_0:1;/* Port P80 register			    */
+	 unsigned char	P8_1:1;/* Port P81 register 			*/
+	 unsigned char	P8_2:1;/* Port P82 register 			*/
+	 unsigned char	P8_3:1;/* Port P83 register 			*/
+	 unsigned char	P8_4:1;/* Port P84 register 			*/
+	 unsigned char	P8_5:1;/* Port P85 register 			*/
+	 unsigned char	P8_6:1;/* Port P86 register 			*/
+	 unsigned char	P8_7:1;/* Port P87 register 			*/
+	} BIT;   		       /*        					    */
+	unsigned char BYTE;    /*  Byte Access 			        */
+};                         /* 						        */
+
+/*------------------------------------------------------
+    Port P9 register //0x03f1
+------------------------------------------------------*/
+union st_p9 {              /* union P9	    	   		    */
+	struct {           	   /* Bit  Access 		   	  	    */
+	 unsigned char 	P9_0:1;/* Port P90 register			    */
+	 unsigned char 	P9_1:1;/* Port P91 register 			*/
+	 unsigned char	P9_2:1;/* Port P92 register 			*/
+	 unsigned char	P9_3:1;/* Port P93 register 			*/
+	 unsigned char	P9_4:1;/* Port P94 register 			*/
+	 unsigned char	P9_5:1;/* Port P95 register 			*/
+	 unsigned char	P9_6:1;/* Port P96 register 			*/
+	 unsigned char	P9_7:1;/* Port P97 register 			*/
+	} BIT;   		   	   /*        					    */
+	unsigned char BYTE;    /*  Byte Access 			        */
+};                         /* 						        */
+
+/*------------------------------------------------------
+    Port P8 direction register //0x03f2
+------------------------------------------------------*/
+union st_pd8 {              /* union PD8    	   		   */
+	struct {            	/* Bit  Access 		   	  	   */
+	 unsigned char 	PD8_0:1;/* Port P80 direction register */
+	 unsigned char	PD8_1:1;/* Port P81 direction register */
+	 unsigned char	PD8_2:1;/* Port P82 direction register */
+	 unsigned char	PD8_3:1;/* Port P83 direction register */
+	 unsigned char	PD8_4:1;/* Port P84 direction register */
+	 unsigned char		 :1;/* Nothing assigned 		   */
+	 unsigned char	PD8_6:1;/* Port P86 direction register */
+	 unsigned char	PD8_7:1;/* Port P87 direction register */
+	} BIT;   		    	/*        					   */
+	unsigned char BYTE;     /*  Byte Access 			   */
+};                          /* 						       */
+
+
+/*------------------------------------------------------
+    Port P9 direction register //0x03f3
+------------------------------------------------------*/
+union st_pd9 {              /* union PD9    	   		   */
+	struct {            	/* Bit  Access 		   	  	   */
+	 unsigned char 	PD9_0:1;/* Port P90 direction register */
+	 unsigned char	PD9_1:1;/* Port P91 direction register */
+	 unsigned char	PD9_2:1;/* Port P92 direction register */
+	 unsigned char	PD9_3:1;/* Port P93 direction register */
+	 unsigned char	PD9_4:1;/* Port P94 direction register */
+	 unsigned char	PD9_5:1;/* Port P95 direction register */
+	 unsigned char	PD9_6:1;/* Port P96 direction register */
+	 unsigned char	PD9_7:1;/* Port P97 direction register */
+	} BIT;   		    	/*        					   */
+	unsigned char BYTE;     /*  Byte Access 			   */
+};                          /* 						       */
+
+/*------------------------------------------------------
+    Port P10 register //0x03f4
+------------------------------------------------------*/
+union st_p10 {              /* union P10	    	   						*/
+	struct {            	/* Bit  Access 		   	  	    				*/
+	 unsigned char 	P10_0:1;/* Port P100 register							*/
+	 unsigned char	P10_1:1;/* Port P101 register 							*/
+	 unsigned char	P10_2:1;/* Port P102 register 							*/
+	 unsigned char	P10_3:1;/* Port P103 register 							*/
+	 unsigned char	P10_4:1;/* Port P104 register 							*/
+	 unsigned char	P10_5:1;/* Port P105 register 							*/
+	 unsigned char	P10_6:1;/* Port P106 register 							*/
+	 unsigned char	P10_7:1;/* Port P107 register 							*/
+	} BIT;   		    	/*        					    				*/
+	unsigned char BYTE;     /*  Byte Access 			    				*/
+};                          /* 						        */
+
+/*------------------------------------------------------
+    Port P11 register //0x03f5
+------------------------------------------------------*/
+union st_p11 {              /* union P11	    	   						*/
+	struct {            	/* Bit  Access 		   	  	    				*/
+	 unsigned char 	P11_0:1;/* Port P110 register							*/
+	 unsigned char	P11_1:1;/* Port P111 register 							*/
+	 unsigned char	P11_2:1;/* Port P112 register 							*/
+	 unsigned char	P11_3:1;/* Port P113 register 							*/
+	 unsigned char	P11_4:1;/* Port P114 register 							*/
+	 unsigned char	P11_5:1;/* Port P115 register 							*/
+	 unsigned char	P11_6:1;/* Port P116 register 							*/
+	 unsigned char	P11_7:1;/* Port P117 register 							*/
+	} BIT;   		    	/*        					    				*/
+	unsigned char BYTE;     /*  Byte Access 			    				*/
+};                          /* 						        */
+
+/*------------------------------------------------------
+    Port P10 direction register //0x03f6
+------------------------------------------------------*/
+union st_pd10 {              /* union PD10    	   		     				*/
+	struct {            	 /* Bit  Access 		   	  	 				*/
+	 unsigned char 	PD10_0:1;/* Port P100 direction register 				*/
+	 unsigned char	PD10_1:1;/* Port P101 direction register 				*/
+	 unsigned char	PD10_2:1;/* Port P102 direction register 				*/
+	 unsigned char	PD10_3:1;/* Port P103 direction register 				*/
+	 unsigned char	PD10_4:1;/* Port P104 direction register 				*/
+	 unsigned char	PD10_5:1;/* Port P105 direction register 				*/
+	 unsigned char	PD10_6:1;/* Port P106 direction register 				*/
+	 unsigned char	PD10_7:1;/* Port P107 direction register 				*/
+	} BIT;   		    	 /*        					     				*/
+		char BYTE;           /*  Byte Access 			     				*/
+};                           /* 						     				*/
+
+/*------------------------------------------------------
+    Port P11 direction register //0x03f7
+------------------------------------------------------*/
+union st_pd11 {              /* union PD11    	   		     				*/
+	struct {            	 /* Bit  Access 		   	  	 				*/
+	 unsigned char 	PD11_0:1;/* Port P110 direction register 				*/
+	 unsigned char	PD11_1:1;/* Port P111 direction register 				*/
+	 unsigned char	PD11_2:1;/* Port P112 direction register 				*/
+	 unsigned char	PD11_3:1;/* Port P113 direction register 				*/
+	 unsigned char	PD11_4:1;/* Port P114 direction register 				*/
+	 unsigned char	PD11_5:1;/* Port P115 direction register 				*/
+	 unsigned char	PD11_6:1;/* Port P116 direction register 				*/
+	 unsigned char	PD11_7:1;/* Port P117 direction register 				*/
+	} BIT;   		    	 /*        					     				*/
+		char BYTE;           /*  Byte Access 			     				*/
+};                           /* 						     				*/
+
+/*------------------------------------------------------
+    Port P12 register //0x03f8
+------------------------------------------------------*/
+union st_p12 {              /* union P12	    	   						*/
+	struct {            	/* Bit  Access 		   	  	    				*/
+	 unsigned char 	P12_0:1;/* Port P120 register							*/
+	 unsigned char	P12_1:1;/* Port P121 register 							*/
+	 unsigned char	P12_2:1;/* Port P122 register 							*/
+	 unsigned char	P12_3:1;/* Port P123 register 							*/
+	 unsigned char	P12_4:1;/* Port P124 register 							*/
+	 unsigned char	P12_5:1;/* Port P125 register 							*/
+	 unsigned char	P12_6:1;/* Port P126 register 							*/
+	 unsigned char	P12_7:1;/* Port P127 register 							*/
+	} BIT;   		    	/*        					    				*/
+	unsigned char BYTE;     /*  Byte Access 			    				*/
+};                          /* 						        */
+
+/*------------------------------------------------------
+    Port P13 register //0x03f9
+------------------------------------------------------*/
+union st_p13 {              /* union P13	    	   						*/
+	struct {            	/* Bit  Access 		   	  	    				*/
+	 unsigned char 	P13_0:1;/* Port P130 register							*/
+	 unsigned char	P13_1:1;/* Port P131 register 							*/
+	 unsigned char	P13_2:1;/* Port P132 register 							*/
+	 unsigned char	P13_3:1;/* Port P133 register 							*/
+	 unsigned char	P13_4:1;/* Port P134 register 							*/
+	 unsigned char	P13_5:1;/* Port P135 register 							*/
+	 unsigned char	P13_6:1;/* Port P136 register 							*/
+	 unsigned char	P13_7:1;/* Port P137 register 							*/
+	} BIT;   		    	/*        					    				*/
+	unsigned char BYTE;     /*  Byte Access 			    				*/
+};                          /* 						        */
+
+/*------------------------------------------------------
+    Port P12 direction register //0x03fa
+------------------------------------------------------*/
+union st_pd12 {              /* union PD12    	   		     				*/
+	struct {            	 /* Bit  Access 		   	  	 				*/
+	 unsigned char 	PD12_0:1;/* Port P120 direction register 				*/
+	 unsigned char	PD12_1:1;/* Port P121 direction register 				*/
+	 unsigned char	PD12_2:1;/* Port P122 direction register 				*/
+	 unsigned char	PD12_3:1;/* Port P123 direction register 				*/
+	 unsigned char	PD12_4:1;/* Port P124 direction register 				*/
+	 unsigned char	PD12_5:1;/* Port P125 direction register 				*/
+	 unsigned char	PD12_6:1;/* Port P126 direction register 				*/
+	 unsigned char	PD12_7:1;/* Port P127 direction register 				*/
+	} BIT;   		    	 /*        					     				*/
+		char BYTE;           /*  Byte Access 			     				*/
+};                           /* 						     				*/
+
+/*------------------------------------------------------
+    Port P13 direction register //0x03fb
+------------------------------------------------------*/
+union st_pd13 {              /* union PD13    	   		     				*/
+	struct {            	 /* Bit  Access 		   	  	 				*/
+	 unsigned char 	PD13_0:1;/* Port P130 direction register 				*/
+	 unsigned char	PD13_1:1;/* Port P131 direction register 				*/
+	 unsigned char	PD13_2:1;/* Port P132 direction register 				*/
+	 unsigned char	PD13_3:1;/* Port P133 direction register 				*/
+	 unsigned char	PD13_4:1;/* Port P134 direction register 				*/
+	 unsigned char	PD13_5:1;/* Port P135 direction register 				*/
+	 unsigned char	PD13_6:1;/* Port P136 direction register 				*/
+	 unsigned char	PD13_7:1;/* Port P137 direction register 				*/
+	} BIT;   		    	 /*        					     				*/
+		char BYTE;           /*  Byte Access 			     				*/
+};                           /* 						     				*/
+
+/*------------------------------------------------------
+    Pull-up control register 0 //0x03fc
+------------------------------------------------------*/
+union st_pur0 {            /* union PUR0    	   		   					*/
+	struct {               /* Bit  Access 		   	  	   					*/
+	 unsigned char 	PU00:1;/* P00 to P03 pull-up		   					*/
+	 unsigned char	PU01:1;/* P04 to P07 pull-up		   					*/
+	 unsigned char	PU02:1;/* P10 to P13 pull-up		   					*/
+	 unsigned char	PU03:1;/* P14 to P17 pull-up		   					*/
+	 unsigned char	PU04:1;/* P20 to P23 pull-up		   					*/
+	 unsigned char	PU05:1;/* P24 to P27 pull-up		   					*/
+	 unsigned char	PU06:1;/* P30 to P33 pull-up		   					*/
+	 unsigned char	PU07:1;/* P34 to P37 pull-up		   					*/
+	} BIT;   		       /*        					   					*/
+	unsigned char BYTE;    /*  Byte Access 			   	   					*/
+};                         /* 						       					*/
+
+/*------------------------------------------------------
+    Pull-up control register 1 //0x03fd
+------------------------------------------------------*/
+union st_pur1 {            /* union PUR1    	   		   					*/
+	struct {           	   /* Bit  Access 		   	  	   					*/
+	 unsigned char 	PU10:1;/* P40 to P43 pull-up 		   					*/
+	 unsigned char	PU11:1;/* P44 to P47 pull-up 		   					*/
+	 unsigned char	PU12:1;/* P50 to P53 pull-up 		   					*/
+	 unsigned char	PU13:1;/* P54 to P57 pull-up 		   					*/
+	 unsigned char	PU14:1;/* P60 to P63 pull-up 		   					*/
+	 unsigned char	PU15:1;/* P64 to P67 pull-up 		   					*/
+	 unsigned char	PU16:1;/* P70 to P73 pull-up (Except P70,P71 ; P70,P71 -> N-channel open drain ports)*/
+	 unsigned char	PU17:1;/* P74 to P77 pull-up 		   					*/
+	} BIT;   		       /*        					   					*/
+	unsigned char BYTE;    /*  Byte Access 			   						*/
+};                         /* 						       					*/
+
+/*------------------------------------------------------
+    Pull-up control register 2 //0x03fe
+------------------------------------------------------*/
+union st_pur2 {            /* union PUR2    	   		     				*/
+	struct {           	   /* Bit  Access 		   	  	     				*/
+	 unsigned char 	PU20:1;/* P80 to P83 pull-up 			 				*/
+	 unsigned char	PU21:1;/* P84 to P87 pull-up (Except P85)				*/
+	 unsigned char	PU22:1;/* P90 to P93 pull-up 			 				*/
+	 unsigned char	PU23:1;/* P94 to P97 pull-up			 				*/
+	 unsigned char	PU24:1;/* P100 to P103 pull-up 			 				*/
+	 unsigned char	PU25:1;/* P104 to P107 pull-up 			 				*/
+	 unsigned char		:1;/* Nothing assigned 				 				*/
+	 unsigned char		:1;/* Nothing assigned 				 				*/
+	} BIT;   		   	   /*        					     				*/
+	unsigned char BYTE;    /*  Byte Access 			   		 				*/
+};                         /* 						         				*/
+
+/*------------------------------------------------------
+    Port control register //0x03ff
+------------------------------------------------------*/
+union st_pcr {             /* union PCR2    	   		     				*/
+	struct {           	   /* Bit  Access 		   	  	     				*/
+	 unsigned char 	PCR0:1;/* Port P1 control register 		 				*/
+	 unsigned char		:1;/* Nothing assigned 				 				*/
+	 unsigned char		:1;/* Nothing assigned 				 				*/
+	 unsigned char		:1;/* Nothing assigned 				 				*/
+	 unsigned char		:1;/* Nothing assigned 				 				*/
+	 unsigned char		:1;/* Nothing assigned 				 				*/
+	 unsigned char		:1;/* Nothing assigned 				 				*/
+	 unsigned char		:1;/* Nothing assigned 				 				*/
+	} BIT;   		   	   /*        					     				*/
+	unsigned char BYTE;    /*  Byte Access 			   		 				*/
+};                         /* 						         				*/
+
+
+
+
+/* Processor mode register 0 */
+#define PM0   (*(volatile union st_pm0 *)(0x0004))
+
+/* Processor mode register 1 */
+#define PM1   (*(volatile union st_pm1 *)(0x0005))
+
+/* System clock control register 0 */
+#define CM0   (*(volatile union st_cm0 *)(0x0006))
+
+/* System clock control register 1 */
+#define CM1   (*(volatile union st_cm1 *)(0x0007))
+
+/* Chip select control register */
+#define CSR   (*(volatile union st_csr *)(0x0008))
+
+/* Address match interrupt enable register */
+#define AIER  (*(volatile union st_aier *)(0x0009))
+
+/* Protect register */
+#define PRCR  (*(volatile union st_prcr *)(0x000A))
+
+/* Data bank register */
+#define DBR  (*(volatile union st_dbr *)(0x000B))
+
+/* Oscillation stop detection register */
+#define CM2  (*(volatile union st_cm2 *)(0x000C))
+
+/* Watchdog timer start register */
+#define WDTS  (*(volatile char *)(0x000E))
+
+/* Watchdog timer control register */
+#define WDC  (*(volatile union st_wdc *)(0x000F))
+
+/* Address match interrupt register 0 */
+#define RMAD0 (*(volatile union st_rmad0 *)(0x0010))
+
+/* Address match interrupt register 1 */
+#define RMAD1 (*(volatile union st_rmad1 *)(0x0014))
+
+/* Voltage detection register 1 */
+#define VCR1 (*(volatile union st_vcr1 *)(0x0019))
+
+/* Voltage detection register 2 */
+#define VCR2 (*(volatile union st_vcr2 *)(0x001A))
+
+/* Chip select expansion control register */
+#define CSE (*(volatile union st_cse *)(0x001B))
+
+/* PLC control register 0 */
+#define PLC0 (*(volatile union st_plc0 *)(0x001C))
+
+/* Processor mode register 2 */
+#define PM2 (*(volatile union st_pm2 *)(0x001E))
+
+/* Power supply down detection register */
+#define D4INT (*(volatile union st_d4int *)(0x001F))
+
+/* DMA0 source pointer */
+#define SAR0  (*(volatile union st_sar0 *)(0x0020))
+
+/* DMA0 destination pointer */
+#define DAR0  (*(volatile union st_dar0 *)(0x0024))
+
+/* DMA0 transfer counter */
+#define TCR0  (*(volatile union st_tcr0  *)(0x0028))
+
+ /* DMA0 control register */
+#define DM0CON (*(volatile union st_dm0con  *)(0x002C))
+
+/* DMA1 source pointer */
+#define SAR1  (*(volatile union st_sar1 *)(0x0030))
+
+/* DMA1 destination pointer */
+#define DAR1  (*(volatile union st_dar1 *)(0x0034))
+
+ /* DMA1 transfer counter */
+#define TCR1  (*(volatile union st_tcr1 *)(0x0038))
+
+/* DMA1 control register */
+#define DM1CON  (*(volatile union st_dm1con *)(0x003c))
+
+
+/* INT3~ interrupt control register */
+#define INT3IC  (*(volatile union st_icr *)(0x0044))
+
+/* Timer B5 interrupt control register */
+#define TB5IC  (*(volatile union st_icr1 *)(0x0045))
+
+/* Timer B4 interrupt control register */
+#define TB4IC (*(volatile union st_icr1 *)(0x0046))
+
+/* Timer B3 interrupt control register */
+#define TB3IC (*(volatile union st_icr1 *)(0x0047))
+
+/* UART1 BUS collision detection interrupt control register */
+#define U1BCNIC  (*(volatile union st_icr1 *)(0x0046))
+
+/* UART0 BUS collision detection interrupt control register */
+#define U0BCNIC  (*(volatile union st_icr1 *)(0x0047))
+
+/* SI/O4 interrupt control register */
+#define S4IC  (*(volatile union st_icr *)(0x0048))
+
+/* SI/O3 interrupt control register */
+#define S3IC  (*(volatile union st_icr *)(0x0049))
+
+/* INT5~ interrupt control register */
+#define INT5IC  (*(volatile union st_icr *)(0x0048))
+
+/* INT4~ interrupt control register */
+#define INT4IC  (*(volatile union st_icr *)(0x0049))
+
+/* Bus collision detection interrupt control register */
+#define BCNIC  (*(volatile union st_bcnic *)(0x004a))
+
+/* DMA0 interrupt control register */
+#define DM0IC  (*(volatile union st_dm0ic *)(0x004b))
+
+/* DMA1 interrupt control register */
+#define DM1IC  (*(volatile union st_icr1 *)(0x004c))
+
+/* Key input interrupt control register */
+#define KUPIC  (*(volatile union st_icr1 *)(0x004D))
+
+/* A/D conversion interrupt control register */
+#define ADIC  (*(volatile union st_icr1 *)(0x004E))
+
+/* UART2 transmit interrupt control register */
+#define S2TIC  (*(volatile union st_icr1 *)(0x004F))
+
+/* UART2 receive interrupt control register */
+#define S2RIC  (*(volatile union st_icr1 *)(0x0050))
+
+/* UART0 transmit interrupt control register */
+#define S0TIC  (*(volatile union st_icr1 *)(0x0051))
+
+/* UART0 receive interrupt control register */
+#define S0RIC  (*(volatile union st_icr1 *)(0x0052))
+
+/* UART1 transmit interrupt control register */
+#define S1TIC (*(volatile union st_icr1 *)(0x0053))
+
+/* UART1 receive interrupt control register */
+#define S1RIC  (*(volatile union st_icr1 *)(0x0054))
+
+/* Timer A0 interrupt control register */
+#define TA0IC  (*(volatile union st_icr1 *)(0x0055))
+
+/* Timer A1 interrupt control register */
+#define TA1IC  (*(volatile union st_icr1 *)(0x0056))
+
+/* Timer A2 interrupt control register */
+#define TA2IC (*(volatile union st_icr1 *)(0x0057))
+
+/* Timer A3 interrupt control register */
+#define TA3IC  (*(volatile union st_icr1 *)(0x0058))
+
+/* Timer A4 interrupt control register */
+#define TA4IC  (*(volatile union st_icr1 *)(0x0059))
+
+/* Timer B0 interrupt control register */
+#define TB0IC  (*(volatile union st_icr1 *)(0x005A))
+
+/* Timer B1 interrupt control register */
+#define TB1IC  (*(volatile union st_icr1 *)(0x005B))
+
+/* Timer B2 interrupt control register */
+#define TB2IC  (*(volatile union st_icr1 *)(0x005C))
+
+/* INT0~ interrupt control register */
+#define INT0IC (*(volatile union st_icr *)(0x005D))
+
+/* INT1~ interrupt control register */
+#define INT1IC  (*(volatile union st_icr *)(0x005E))
+
+/* INT2~ interrupt control register */
+#define INT2IC  (*(volatile union st_icr *)(0x005F))
+
+/* Flash identification register */
+#define FIDR  (*(volatile union st_fidr *)(0x01b4))
+
+/* Flash memory control register 1 */
+#define FMR1  (*(volatile union st_fmr1 *)(0x01b5))
+
+/* Flash memory control register 0 */
+#define FMR0  (*(volatile union st_fmr0 *)(0x01b7))
+
+/* Address match interrupt register 2 */
+#define RMAD2  (*(volatile union st_rmad2 *)(0x01b8))
+
+/* Address match interrupt enable register 2 */
+#define AIER2  (*(volatile union st_aier2 *)(0x01bb))
+
+/* Address match interrupt register 3 */
+#define RMAD3  (*(volatile union st_rmad3 *)(0x01bc))
+
+/* Peripheral clock select register */
+#define PCLKR  (*(volatile union st_pclkr *)(0x025e))
+
+/* Timer B3,4,5 count start flag */
+#define TBSR  (*(volatile union st_tbsr *)(0x0340))
+
+
+/********************************************************
+*   declare  SFR short                                  *
+********************************************************/
+/*--------------------------------------------------------
+    Timer registers : Read and write data in 16-bit units.
+--------------------------------------------------------*/
+
+/* Timer A1-1 register */
+#define TA1_1  (*(volatile unsigned short *)(0x0342))
+
+/* Timer A2-1 register */
+#define TA2_1  (*(volatile unsigned short *)(0x0344))
+
+/* Timer A4-1 register */
+#define TA4_1  (*(volatile unsigned short *)(0x0346))
+
+/* Three-phase PWM control regester 0 */
+#define INVC0  (*(volatile union st_invc0 *)(0x0348))
+
+ /* Three-phase PWM control register 1 */
+#define INVC1  (*(volatile union st_invc1 *)(0x0349))
+
+/* Three-phase output buffer register 0 */
+#define IDB0  (*(volatile union st_idb0 *)(0x034a))
+
+/* Three-phase output buffer register 1 */
+#define IDB1  (*(volatile union st_idb1 *)(0x034b))
+
+/*------------------------------------------------------
+     Dead time timer ; Use "MOV" instruction when writing to this register.
+------------------------------------------------------*/
+/* Dead time timer */
+#define DTT  (*(volatile unsigned char *)(0x034c))
+
+/*------------------------------------------------------------------
+   Timer B2 interrupt occurrences frequency set counter
+   ; Use "MOV" instruction when writing to this register.
+-------------------------------------------------------------------*/
+/* Timer B2 interrupt occurrences frequency set counter */
+#define ICTB2  (*(volatile unsigned char *)(0x034d))
+
+
+/* Timer B3 register */
+#define TB3  (*(volatile unsigned short *)(0x0350))
+
+/* Timer B4 register */
+#define TB4  (*(volatile unsigned short *)(0x0352))
+
+/* Timer B5 register */
+#define TB5  (*(volatile unsigned short *)(0x0354))
+
+/* Timer B3 mode register */
+#define TB3MR  (*(volatile union st_tmr *)(0x035b))
+
+/* Timer B4 mode register */
+#define TB4MR  (*(volatile union st_tmr *)(0x035c))
+
+/* Timer B5 mode register */
+#define TB5MR  (*(volatile union st_tmr *)(0x035d))
+
+/* Interrupt request cause select register 2 */
+#define IFSR2A  (*(volatile union st_ifsr2a *)(0x035e))
+
+/* Interrupt cause select register */
+#define IFSR  (*(volatile union st_ifsr *)(0x035f))
+
+/* SI/O3i transmit/receive register (i=3,4)*/
+#define S3TRR  (*(volatile unsigned char *)(0x0360))
+
+/* SI/O3 control register */
+#define S3C  (*(volatile union st_s3c *)(0x0362))
+
+
+/* SI/O3 bit rate generator (Use "MOV" instruction when writing to these registers)*/
+#define S3BRG  (*(volatile unsigned char *)(0x0363))
+
+
+/* SI/O4 transmit/receive register */
+#define S4TRR  (*(volatile unsigned char *)(0x0364))
+
+/* SI/O4 control register */
+#define S4C  (*(volatile union st_s4c *)(0x0366))
+
+/* SI/O4 bit rate generator */
+#define S4BRG  (*(volatile unsigned char *)(0x0367))
+
+/* UART0 special mode register 4 */
+#define U0SMR4  (*(volatile union st_u0smr4 *)(0x036c))
+
+/* UART0 special mode register 3 */
+#define U0SMR3  (*(volatile union st_u0smr3 *)(0x036d))
+
+
+/* UART0 special mode register 2 */
+#define U0SMR2  (*(volatile union st_u0smr2 *)(0x036e))
+
+/* UART0 special mode register  */
+#define U0SMR  (*(volatile union st_u0smr *)(0x036f))
+
+/* UART1 special mode register 4 */
+#define U1SMR4  (*(volatile union st_u1smr4 *)(0x0370))
+
+/* UART1 special mode register 3 */
+#define U1SMR3  (*(volatile union st_u1smr3 *)(0x0371))
+
+/* UART1 special mode register 2 */
+#define U1SMR2  (*(volatile union st_u1smr2 *)(0x0372))
+
+/* UART1 special mode register  */
+#define U1SMR  (*(volatile union st_u1smr *)(0x0373))
+
+/* UART2 special mode register 4  */
+#define U2SMR4  (*(volatile union st_u2smr4 *)(0x0374))
+
+/* UART2 special mode register 3 */
+#define U2SMR3  (*(volatile union st_u2smr3 *)(0x0375))
+
+
+/* UART2 special mode register 2 */
+#define U2SMR2  (*(volatile union st_u2smr2 *)(0x0376))
+
+/* UART2 special mode register */
+#define U2SMR  (*(volatile union st_u2smr *)(0x0377))
+
+/* UART2 transmit/receive mode register */
+#define U2MR  (*(volatile union st_u2mr *)(0x0378))
+
+/* UART2 bit rate generator */
+#define U2BRG  (*(volatile unsigned char *)(0x0379))
+
+/* UART2 transmit buffer register */
+#define U2TB  (*(volatile union st_u2tb *)(0x037a))
+
+/* UART2 transmit/receive control register 0 */
+//#pragma ADDRESS     u2c0_addr   037cH
+#define U2C0  (*(volatile union st_u2c0 *)(0x037c))
+
+/* UART2 transmit/receive control register 1 */
+#define U2C1  (*(volatile union st_u2c1 *)(0x037d))
+
+/* UART2 receive buffer register */
+#define U2RB  (*(volatile union st_u2rb *)(0x037e))
+
+/* Count start flag */
+#define TABSR  (*(volatile union st_tabsr *)(0x0380))
+
+/* Clock prescaler reset flag */
+#define CPSRF  (*(volatile union st_cpsrf *)(0x0381))
+
+
+/* One-shot start flag */
+#define ONSF  (*(volatile union st_onsf *)(0x0382))
+
+
+/* Trigger select register */
+#define TRGSR  (*(volatile union st_trgsr *)(0x0383))
+
+
+/* Up/down flag (Use "MOV" instruction when writing to this register.)*/
+#define UDF  (*(volatile unsigned char *)(0x0384))
+
+/* Timer A0 register */
+#define TA0 (*(volatile unsigned short  *)(0x0386))
+
+/* Timer A1 register */
+#define TA1 (*(volatile unsigned short  *)(0x0388))
+
+/* Timer A2 register */
+#define TA2 (*(volatile unsigned short  *)(0x038a))
+
+/* Timer A3 register */
+#define TA3 (*(volatile unsigned short  *)(0x038c))
+
+/* Timer A4 register */
+#define TA4 (*(volatile unsigned short  *)(0x038e))
+
+/* Timer B0 register */
+#define TB0 (*(volatile unsigned short  *)(0x0390))
+
+/* Timer B1 register */
+#define TB1 (*(volatile unsigned short  *)(0x0392))
+
+/* Timer B2 register */
+#define TB2 (*(volatile unsigned short  *)(0x0394))
+
+
+
+ /* Timer A0 mode register */
+#define TA0MR  (*(volatile union st_tmr *)(0x0396))
+
+/* Timer A1 mode register */
+#define TA1MR  (*(volatile union st_tmr *)(0x0397))
+
+/* Timer A2 mode register */
+#define TA2MR  (*(volatile union st_tmr *)(0x0398))
+
+/* Timer A3 mode register */
+#define TA3MR  (*(volatile union st_tmr *)(0x0399))
+
+/* Timer A4 mode register */
+#define TA4MR  (*(volatile union st_tmr *)(0x039A))
+
+/* Timer B0 mode register */
+#define TB0MR  (*(volatile union st_tmr *)(0x039b))
+
+/* Timer B1 mode register */
+#define TB1MR  (*(volatile union st_tmr *)(0x039c))
+
+/* Timer B2 mode register */
+#define TB2MR  (*(volatile union st_tmr *)(0x039d))
+
+/* Timer B2 special mode register */
+#define TB2SC  (*(volatile union st_tb2sc *)(0x039e))
+
+/* UART0 transmit/receive mode register */
+#define U0MR  (*(volatile union st_u0mr *)(0x03a0))
+
+/* UART0 bit rate generator (Use "MOV" instruction when writing to these registers.)*/
+#define U0BRG  (*(volatile unsigned char *)(0x03a1))
+
+/* UART0 transmit buffer register */
+#define U0TB  (*(volatile union st_u0tb *)(0x03a2))
+
+/* UART0 transmit/receive control register 0 */
+#define U0C0  (*(volatile union st_u0c0 *)(0x03a4))
+
+ /* UART0 transmit/receive control register 1 */
+#define U0C1  (*(volatile union st_u0c1 *)(0x03a5))
+
+/* UART0 receive buffer register */
+#define U0RB  (*(volatile union st_u0rb *)(0x03a6))
+
+/* UART1 transmit/receive mode register */
+#define U1MR  (*(volatile union st_u1mr *)(0x03a8))
+
+/* UART1 bit rate generator */
+#define U1BRG  (*(volatile unsigned char *)(0x03a9))
+
+ /* UART1 transmit buffer register */
+#define U1TB  (*(volatile union st_u1tb *)(0x03aa))
+
+/* UART1 transmit/receive control register 0 */
+#define U1C0  (*(volatile union st_u1c0 *)(0x03ac))
+
+ /* UART1 transmit/receive control register 1 */
+#define U1C1  (*(volatile union st_u1c1 *)(0x03ad))
+
+ /* UART1 receive buffer register */
+#define U1RB  (*(volatile union st_u1rb *)(0x03ae))
+
+/* UART transmit/receive control register 2 */
+#define UCON  (*(volatile union st_ucon *)(0x03b0))
+
+/* DMA0 cause select register */
+#define DM0SL  (*(volatile union st_dm0sl *)(0x03b8))
+
+/* DMA1 cause select register */
+#define DM1SL  (*(volatile union st_dm1sl *)(0x03ba))
+
+/* CRC data register */
+#define CRCD  (*(volatile union st_crcd *)(0x03bc))
+
+/* CRC input register */
+#define CRCIN  (*(volatile unsigned char *)(0x03be))
+
+/* A/D register 0 */
+#define AD0  (*(volatile union st_ad0 *)(0x03c0))
+
+/* A/D register 1 */
+#define AD1  (*(volatile union st_ad1 *)(0x03c2))
+
+/* A/D register 2 */
+#define AD2  (*(volatile union st_ad2 *)(0x03c4))
+
+/* A/D register 3 */
+#define AD3  (*(volatile union st_ad3 *)(0x03c6))
+
+/* A/D register 4 */
+#define AD4  (*(volatile union st_ad4 *)(0x03c8))
+
+/* A/D register 5 */
+#define AD5  (*(volatile union st_ad5 *)(0x03ca))
+
+/* A/D register 6 */
+#define AD6  (*(volatile union st_ad6 *)(0x03cc))
+
+ /* A/D register 7 */
+#define AD7  (*(volatile union st_ad7 *)(0x03ce))
+
+/* A/D control register 2 */
+#define ADCON2  (*(volatile union st_adcon2 *)(0x03d4))
+
+/* A/D control register 0 */
+#define ADCON0  (*(volatile union st_adcon0 *)(0x03d6))
+
+/* A/D control register 1 */
+#define ADCON1  (*(volatile union st_adcon1 *)(0x03d7))
+
+/* D/A register 0 */
+#define DA0  (*(volatile unsigned char *)(0x03d8))
+
+/* D/A register 1 */
+#define DA1  (*(volatile unsigned char *)(0x03da))
+
+/* D/A control register */
+#define DACON  (*(volatile union st_dacon *)(0x03dc))
+
+/* Port P14 control register */
+#define PC14  (*(volatile union st_pc14 *)(0x03de))
+
+/* Pull-up control register 3 */
+#define PUR3  (*(volatile union st_pur3 *)(0x03df))
+
+
+/* Port P0 register */
+#define P0  (*(volatile union st_p0 *)(0x03e0))
+
+/* Port P1 register */
+#define P1  (*(volatile union st_p1 *)(0x03e1))
+
+/* Port P0 direction register */
+#define PD0  (*(volatile union st_pd0 *)(0x03e2))
+
+/* Port P1 direction register */
+#define PD1  (*(volatile union st_pd1 *)(0x03e3))
+
+/* Port P2 register */
+#define P2  (*(volatile union st_p2 *)(0x03e4))
+
+/* Port P3 register */
+#define P3  (*(volatile union st_p3 *)(0x03e5))
+
+/* Port P2 direction register */
+#define PD2  (*(volatile union st_pd2 *)(0x03e6))
+
+/* Port P3 direction register */
+#define PD3  (*(volatile union st_pd3 *)(0x03e7))
+
+
+ /* Port P4 register */
+#define P4  (*(volatile union st_p4 *)(0x03e8))
+
+/* Port P5 register */
+#define P5  (*(volatile union st_p5 *)(0x03e9))
+
+/* Port P4 direction register */
+#define PD4  (*(volatile union st_pd4 *)(0x03ea))
+
+/* Port P5 direction register */
+#define PD5  (*(volatile union st_pd5 *)(0x03eb))
+
+/* Port P6 register */
+#define P6  (*(volatile union st_p6 *)(0x03ec))
+
+/* Port P7 register */
+#define P7  (*(volatile union st_p7 *)(0x03ed))
+
+/* Port P6 direction register */
+#define PD6  (*(volatile union st_pd6 *)(0x03ee))
+
+/* Port P7 direction register */
+#define PD7  (*(volatile union st_pd7 *)(0x03ef))
+
+/* Port P8 register */
+#define P8  (*(volatile union st_p8 *)(0x03f0))
+
+/* Port P9 register */
+#define P9  (*(volatile union st_p9 *)(0x03f1))
+
+/* Port P8 direction register */
+#define PD8  (*(volatile union st_pd8 *)(0x03f2))
+
+/* Port P9 direction register */
+#define PD9  (*(volatile union st_pd9 *)(0x03f3))
+
+/* Port P10 register */
+#define P10  (*(volatile union st_p10 *)(0x03f4))
+
+/* Port P11 register */
+#define P11  (*(volatile union st_p11 *)(0x03f5))
+
+/* Port P10 direction register */
+#define PD10  (*(volatile union st_pd10 *)(0x03f6))
+
+/* Port P11 direction register */
+#define PD11  (*(volatile union st_pd11 *)(0x03f7))
+
+/* Port P12 register */
+#define P12  (*(volatile union st_p12 *)(0x03f8))
+
+/* Port P13 register */
+#define P13  (*(volatile union st_p13 *)(0x03f9))
+
+/* Port P12 direction register */
+#define PD12  (*(volatile union st_pd12 *)(0x03fa))
+
+/* Port P13 direction register */
+#define PD13  (*(volatile union st_pd13 *)(0x03f7))
+
+ /* Pull-up control register 0 */
+#define PUR0  (*(volatile union st_pur0 *)(0x03fc))
+
+/* Pull-up control register 1 */
+#define PUR1  (*(volatile union st_pur1 *)(0x03fd))
+
+ /* Pull-up control register 2 */
+#define PUR2  (*(volatile union st_pur2 *)(0x03fe))
+
+/* Port control register */
+#define PCR  (*(volatile union st_pcr *)(0x03ff))
+
+
+#endif /* __IOM16C62P_H__ */
+
diff --git a/tos/chips/m16c62p/m16c62phardware.h b/tos/chips/m16c62p/m16c62phardware.h
new file mode 100755
index 00000000..3f832357
--- /dev/null
+++ b/tos/chips/m16c62p/m16c62phardware.h
@@ -0,0 +1,198 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Some M16c/62p needed macros and defines.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Fan Zhang <fanzha@ltu.se>
+ */
+
+#ifndef __M16C62PHARDWARE_H__
+#define __M16C62PHARDWARE_H__
+
+#include "interrupts.h"
+#include "iom16c62p.h"
+#include "bits.h"
+#include "uart/M16c62pUart.h"
+#include "pins/M16c62pPin.h"
+#include "adc/M16c62pAdc.h"
+
+#define true TRUE
+#define false FALSE
+
+//Bit operators using bit number
+#define _BV(bit)  (1 << bit)
+#define SET_BIT(port, bit)    ((port) |= _BV(bit))
+#define CLR_BIT(port, bit)    ((port) &= ~_BV(bit))
+#define READ_BIT(port, bit)   (((port) & _BV(bit)) != 0)
+#define FLIP_BIT(port, bit)   ((port) ^= _BV(bit))
+#define WRITE_BIT(port, bit, value) \
+  if (value) SET_BIT((port), (bit)); \
+    else CLR_BIT((port), (bit))
+
+// Bit operators using bit flag mask
+#define SET_FLAG(port, flag)  ((port) |= (flag))
+#define CLR_FLAG(port, flag)  ((port) &= ~(flag))
+#define READ_FLAG(port, flag) ((port) & (flag))
+
+// We need slightly different defs than M16C_INTERRUPT
+// for interrupt handlers.
+#define M16C_INTERRUPT_HANDLER(id) \
+  M16C_INTERRUPT(id) @atomic_hwevent() @C()
+ 
+// The mov instruction should be used when clearing the interrupt flag.
+// More information can be found in the manual for the MCU.
+inline void clear_interrupt(uint16_t interrupt_addr)
+{
+  atomic
+  {
+  uint8_t tmp = (*TCAST(volatile uint8_t* ONE, interrupt_addr));
+  CLR_BIT(tmp, 3);
+  asm("mov.w %[interrupt_addr], a0\n\t"
+      "mov.b %[tmp], [a0]"
+      :
+      : [tmp] "r" (tmp) , [interrupt_addr] "r" (interrupt_addr)
+      : "a0");
+  }
+}
+
+typedef uint8_t mcu_power_t @combine("ecombine");
+
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2)
+{
+  return (m1 < m2) ? m1: m2;
+}
+
+enum
+{
+  M16C62P_POWER_WAIT        = 1,
+  M16C62P_POWER_STOP        = 2,
+};
+
+inline void __nesc_enable_interrupt(void) { asm("fset i"); }
+inline void __nesc_disable_interrupt(void) { asm("fclr i"); }
+
+// Macro to create union casting functions.
+#define DEFINE_UNION_CAST(func_name, from_type, to_type) \
+  to_type func_name(from_type x_type) { \
+    union {from_type f_type; to_type t_type;} c_type = {f_type:x_type}; return c_type.t_type; }
+
+typedef uint16_t __nesc_atomic_t;
+
+#ifndef NESC_BUILD_BINARY
+/**
+ * Start atomic section.
+ */
+inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous()
+{
+  __nesc_atomic_t result;
+  // Save the flag register (FLG)
+  asm volatile ("stc flg, %0": "=r"(result): : "%flg");
+  // Disable interrupts
+  __nesc_disable_interrupt();
+  asm volatile("" : : : "memory"); // ensure atomic section effect visibility
+  return result;
+}
+
+/**
+ * End atomic section.
+ */
+inline void __nesc_atomic_end(__nesc_atomic_t original_FLG) @spontaneous()
+{
+  // Restore the flag register (FLG)
+  asm volatile("" : : : "memory"); // ensure atomic section effect visibility
+  asm volatile ("ldc %0, flg": : "r"(original_FLG): "%flg");
+}
+#endif
+
+// If the platform doesnt have defined any main crystal speed it will
+// get a default value of 16MHz
+#ifndef MAIN_CRYSTAL_SPEED
+#define MAIN_CRYSTAL_SPEED 16 /*MHZ*/
+#endif
+
+// If the PLL_MULTIPLIER is not defined it will be default to M16C62P_PLL_2.
+#ifndef PLL_MULTIPLIER
+#define PLL_MULTIPLIER M16C62P_PLL_2
+#endif
+
+// Default inactive pin states
+#ifndef PORT_P0_INACTIVE_STATE
+#define PORT_P0_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE
+#endif
+
+#ifndef PORT_P1_INACTIVE_STATE
+#define PORT_P1_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE
+#endif
+
+#ifndef PORT_P2_INACTIVE_STATE
+#define PORT_P2_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE
+#endif
+
+#ifndef PORT_P3_INACTIVE_STATE
+#define PORT_P3_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE
+#endif
+
+#ifndef PORT_P4_INACTIVE_STATE
+#define PORT_P4_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE
+#endif
+
+#ifndef PORT_P5_INACTIVE_STATE
+#define PORT_P5_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE
+#endif
+
+#ifndef PORT_P6_INACTIVE_STATE
+#define PORT_P6_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE
+#endif
+
+#ifndef PORT_P7_INACTIVE_STATE
+#define PORT_P7_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE
+#endif
+
+#ifndef PORT_P8_INACTIVE_STATE
+#define PORT_P8_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE
+#endif
+
+#ifndef PORT_P9_INACTIVE_STATE
+#define PORT_P9_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE
+#endif
+
+#ifndef PORT_P_10_INACTIVE_STATE
+#define PORT_P_10_INACTIVE_STATE M16C_PIN_INACTIVE_DONT_CARE
+#endif
+
+#endif  // __M16C62PHARDWARE_H__
diff --git a/tos/chips/m16c62p/pins/HplM16c62pGeneralIOC.nc b/tos/chips/m16c62p/pins/HplM16c62pGeneralIOC.nc
new file mode 100755
index 00000000..d4c7343c
--- /dev/null
+++ b/tos/chips/m16c62p/pins/HplM16c62pGeneralIOC.nc
@@ -0,0 +1,316 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+ /*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * @author Martin Turon <mturon@xbow.com>
+ */
+ 
+/**
+ * The HplM16c62pGeneralIOC configuration provides GeneralIO interfaces for all
+ * the M16c/62p's pins.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+
+configuration HplM16c62pGeneralIOC
+{
+  // provides all the ports as raw ports
+  provides
+  {
+    interface GeneralIO as PortP00;
+    interface GeneralIO as PortP01;
+    interface GeneralIO as PortP02;
+    interface GeneralIO as PortP03;
+    interface GeneralIO as PortP04;
+    interface GeneralIO as PortP05;
+    interface GeneralIO as PortP06;
+    interface GeneralIO as PortP07;
+
+    interface GeneralIO as PortP10;
+    interface GeneralIO as PortP11;
+    interface GeneralIO as PortP12;
+    interface GeneralIO as PortP13;
+    interface GeneralIO as PortP14;
+    interface GeneralIO as PortP15;
+    interface GeneralIO as PortP16;
+    interface GeneralIO as PortP17;
+
+    interface GeneralIO as PortP20;
+    interface GeneralIO as PortP21;
+    interface GeneralIO as PortP22;
+    interface GeneralIO as PortP23;
+    interface GeneralIO as PortP24;
+    interface GeneralIO as PortP25;
+    interface GeneralIO as PortP26;
+    interface GeneralIO as PortP27;
+
+    interface GeneralIO as PortP30;
+    interface GeneralIO as PortP31;
+    interface GeneralIO as PortP32;
+    interface GeneralIO as PortP33;
+    interface GeneralIO as PortP34;
+    interface GeneralIO as PortP35;
+    interface GeneralIO as PortP36;
+    interface GeneralIO as PortP37;
+
+    interface GeneralIO as PortP40;
+    interface GeneralIO as PortP41;
+    interface GeneralIO as PortP42;
+    interface GeneralIO as PortP43;
+    interface GeneralIO as PortP44;
+    interface GeneralIO as PortP45;
+    interface GeneralIO as PortP46;
+    interface GeneralIO as PortP47;
+
+    interface GeneralIO as PortP50;
+    interface GeneralIO as PortP51;
+    interface GeneralIO as PortP52;
+    interface GeneralIO as PortP53;
+    interface GeneralIO as PortP54;
+    interface GeneralIO as PortP55;
+    interface GeneralIO as PortP56;
+    interface GeneralIO as PortP57;
+  
+    interface GeneralIO as PortP60;
+    interface GeneralIO as PortP61;
+    interface GeneralIO as PortP62;
+    interface GeneralIO as PortP63;
+    interface GeneralIO as PortP64;
+    interface GeneralIO as PortP65;
+    interface GeneralIO as PortP66;
+    interface GeneralIO as PortP67;
+  
+    interface GeneralIO as PortP70;
+    interface GeneralIO as PortP71;
+    interface GeneralIO as PortP72;
+    interface GeneralIO as PortP73;
+    interface GeneralIO as PortP74;
+    interface GeneralIO as PortP75;
+    interface GeneralIO as PortP76;
+    interface GeneralIO as PortP77;
+  
+    interface GeneralIO as PortP80;
+    interface GeneralIO as PortP81;
+    interface GeneralIO as PortP82;
+    interface GeneralIO as PortP83;
+    interface GeneralIO as PortP84;
+    interface GeneralIO as PortP85;
+    interface GeneralIO as PortP86;
+    interface GeneralIO as PortP87;
+  
+    interface GeneralIO as PortP90;
+    interface GeneralIO as PortP91;
+    interface GeneralIO as PortP92;
+    interface GeneralIO as PortP93;
+    interface GeneralIO as PortP94;
+    interface GeneralIO as PortP95;
+    interface GeneralIO as PortP96;
+    interface GeneralIO as PortP97;
+ 
+    interface GeneralIO as PortP100;
+    interface GeneralIO as PortP101;
+    interface GeneralIO as PortP102;
+    interface GeneralIO as PortP103;
+    interface GeneralIO as PortP104;
+    interface GeneralIO as PortP105;
+    interface GeneralIO as PortP106;
+    interface GeneralIO as PortP107;
+  
+  }
+}
+implementation
+{
+  components 
+    new HplM16c62pGeneralIOPortP((uint16_t)&P0.BYTE, (uint16_t)&PD0.BYTE) as PortP0,
+    new HplM16c62pGeneralIOPortP((uint16_t)&P1.BYTE, (uint16_t)&PD1.BYTE) as PortP1,
+    new HplM16c62pGeneralIOPortP((uint16_t)&P2.BYTE, (uint16_t)&PD2.BYTE) as PortP2,
+    new HplM16c62pGeneralIOPortP((uint16_t)&P3.BYTE, (uint16_t)&PD3.BYTE) as PortP3,
+    new HplM16c62pGeneralIOPortP((uint16_t)&P4.BYTE, (uint16_t)&PD4.BYTE) as PortP4,
+    new HplM16c62pGeneralIOPortP((uint16_t)&P5.BYTE, (uint16_t)&PD5.BYTE) as PortP5,
+    new HplM16c62pGeneralIOPortP((uint16_t)&P6.BYTE, (uint16_t)&PD6.BYTE) as PortP6,
+    new HplM16c62pGeneralIOPortP((uint16_t)&P7.BYTE, (uint16_t)&PD7.BYTE) as PortP7,
+    new HplM16c62pGeneralIOPortP((uint16_t)&P8.BYTE, (uint16_t)&PD8.BYTE) as PortP8,
+    new HplM16c62pGeneralIOPortP((uint16_t)&P9.BYTE, (uint16_t)&PD9.BYTE) as PortP9,
+    new HplM16c62pGeneralIOPortP((uint16_t)&P10.BYTE, (uint16_t)&PD10.BYTE) as PortP_10;
+
+  PortP00 = PortP0.Pin0;
+  PortP01 = PortP0.Pin1;
+  PortP02 = PortP0.Pin2;
+  PortP03 = PortP0.Pin3;
+  PortP04 = PortP0.Pin4;
+  PortP05 = PortP0.Pin5;
+  PortP06 = PortP0.Pin6;
+  PortP07 = PortP0.Pin7;
+
+  PortP10 = PortP1.Pin0;
+  PortP11 = PortP1.Pin1;
+  PortP12 = PortP1.Pin2;
+  PortP13 = PortP1.Pin3;
+  PortP14 = PortP1.Pin4;
+  PortP15 = PortP1.Pin5;
+  PortP16 = PortP1.Pin6;
+  PortP17 = PortP1.Pin7;
+
+  PortP20 = PortP2.Pin0;
+  PortP21 = PortP2.Pin1;
+  PortP22 = PortP2.Pin2;
+  PortP23 = PortP2.Pin3;
+  PortP24 = PortP2.Pin4;
+  PortP25 = PortP2.Pin5;
+  PortP26 = PortP2.Pin6;
+  PortP27 = PortP2.Pin7;
+
+  PortP30 = PortP3.Pin0;
+  PortP31 = PortP3.Pin1;
+  PortP32 = PortP3.Pin2;
+  PortP33 = PortP3.Pin3;
+  PortP34 = PortP3.Pin4;
+  PortP35 = PortP3.Pin5;
+  PortP36 = PortP3.Pin6;
+  PortP37 = PortP3.Pin7;
+
+  PortP40 = PortP4.Pin0;
+  PortP41 = PortP4.Pin1;
+  PortP42 = PortP4.Pin2;
+  PortP43 = PortP4.Pin3;
+  PortP44 = PortP4.Pin4;
+  PortP45 = PortP4.Pin5;
+  PortP46 = PortP4.Pin6;
+  PortP47 = PortP4.Pin7;
+
+  PortP50 = PortP5.Pin0;
+  PortP51 = PortP5.Pin1;
+  PortP52 = PortP5.Pin2;
+  PortP53 = PortP5.Pin3;
+  PortP54 = PortP5.Pin4;
+  PortP55 = PortP5.Pin5;
+  PortP56 = PortP5.Pin6;
+  PortP57 = PortP5.Pin7;
+
+  PortP60 = PortP6.Pin0;
+  PortP61 = PortP6.Pin1;
+  PortP62 = PortP6.Pin2;
+  PortP63 = PortP6.Pin3;
+  PortP64 = PortP6.Pin4;
+  PortP65 = PortP6.Pin5;
+  PortP66 = PortP6.Pin6;
+  PortP67 = PortP6.Pin7;
+
+  PortP70 = PortP7.Pin0;
+  PortP71 = PortP7.Pin1;
+  PortP72 = PortP7.Pin2;
+  PortP73 = PortP7.Pin3;
+  PortP74 = PortP7.Pin4;
+  PortP75 = PortP7.Pin5;
+  PortP76 = PortP7.Pin6;
+  PortP77 = PortP7.Pin7;
+
+  PortP80 = PortP8.Pin0;
+  PortP81 = PortP8.Pin1;
+  PortP82 = PortP8.Pin2;
+  PortP83 = PortP8.Pin3;
+  PortP84 = PortP8.Pin4;
+  PortP85 = PortP8.Pin5;
+  PortP86 = PortP8.Pin6;
+  PortP87 = PortP8.Pin7;
+  
+  components 
+    new HplM16c62pGeneralIOPinPRC2P() as PortP90W,
+    new HplM16c62pGeneralIOPinPRC2P() as PortP91W,
+    new HplM16c62pGeneralIOPinPRC2P() as PortP92W,
+    new HplM16c62pGeneralIOPinPRC2P() as PortP93W,
+    new HplM16c62pGeneralIOPinPRC2P() as PortP94W,
+    new HplM16c62pGeneralIOPinPRC2P() as PortP95W,
+    new HplM16c62pGeneralIOPinPRC2P() as PortP96W,
+    new HplM16c62pGeneralIOPinPRC2P() as PortP97W;
+
+  PortP90W -> PortP9.Pin0;
+  PortP91W -> PortP9.Pin1;
+  PortP92W -> PortP9.Pin2;
+  PortP93W -> PortP9.Pin3;
+  PortP94W -> PortP9.Pin4;
+  PortP95W -> PortP9.Pin5;
+  PortP96W -> PortP9.Pin6;
+  PortP97W -> PortP9.Pin7;
+  
+  PortP90 = PortP90W;
+  PortP91 = PortP91W;
+  PortP92 = PortP92W;
+  PortP93 = PortP93W;
+  PortP94 = PortP94W;
+  PortP95 = PortP95W;
+  PortP96 = PortP96W;
+  PortP97 = PortP97W;
+
+  PortP100 = PortP_10.Pin0;
+  PortP101 = PortP_10.Pin1;
+  PortP102 = PortP_10.Pin2;
+  PortP103 = PortP_10.Pin3;
+  PortP104 = PortP_10.Pin4;
+  PortP105 = PortP_10.Pin5;
+  PortP106 = PortP_10.Pin6;
+  PortP107 = PortP_10.Pin7;
+}
diff --git a/tos/chips/m16c62p/pins/HplM16c62pGeneralIOPinP.nc b/tos/chips/m16c62p/pins/HplM16c62pGeneralIOPinP.nc
new file mode 100755
index 00000000..50833615
--- /dev/null
+++ b/tos/chips/m16c62p/pins/HplM16c62pGeneralIOPinP.nc
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+  
+/**
+ * Generic pin access for pins mapped into I/O space.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+generic module HplM16c62pGeneralIOPinP (uint16_t port_addr, 
+				 uint16_t ddr_addr, 
+				 uint16_t bit)
+{
+  provides interface GeneralIO as IO;
+}
+implementation
+{
+#define port (*TCAST(volatile uint8_t* ONE, port_addr))
+#define ddr (*TCAST(volatile uint8_t* ONE, ddr_addr))
+
+  inline async command bool IO.get()        { return READ_BIT (port, bit); }
+  inline async command void IO.set()        { SET_BIT  (port, bit); }
+  inline async command void IO.clr()        { CLR_BIT  (port, bit); }
+  inline async command void IO.toggle()     { atomic FLIP_BIT (port, bit); }
+    
+  inline async command void IO.makeInput()  { CLR_BIT  (ddr, bit);  }
+  inline async command bool IO.isInput()    { return !READ_BIT(ddr, bit); }
+  inline async command void IO.makeOutput() { SET_BIT  (ddr, bit);  }
+  inline async command bool IO.isOutput()   { return READ_BIT(ddr, bit); }
+}
+
diff --git a/tos/chips/m16c62p/pins/HplM16c62pGeneralIOPinPRC2P.nc b/tos/chips/m16c62p/pins/HplM16c62pGeneralIOPinPRC2P.nc
new file mode 100755
index 00000000..bea643e9
--- /dev/null
+++ b/tos/chips/m16c62p/pins/HplM16c62pGeneralIOPinPRC2P.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+  
+/**
+ * Generic pin access for pins on the P9 port. The PD9 register
+ * is locked by the PRC2 bit in the PRCR register so it needs
+ * to be unlocked before each access.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+generic module HplM16c62pGeneralIOPinPRC2P()
+{
+  provides interface GeneralIO as IO;
+ 
+  uses interface GeneralIO as Wrap;
+}
+implementation
+{
+
+  inline async command bool IO.get()        { return call Wrap.get(); }
+  inline async command void IO.set()        { call Wrap.set(); }
+  inline async command void IO.clr()        { call Wrap.clr(); }
+  inline async command void IO.toggle()     { call Wrap.toggle(); }
+    
+  inline async command void IO.makeInput() 
+  {
+    atomic
+    {
+  	  PRCR.BYTE = BIT2;
+  	  call Wrap.makeInput();
+    }
+  }
+  
+  inline async command bool IO.isInput()    { return call Wrap.isInput(); }
+  inline async command void IO.makeOutput()
+  {
+    atomic
+    {
+      PRCR.BYTE = BIT2;
+  	  call Wrap.makeOutput();
+    }
+  }
+  
+  inline async command bool IO.isOutput()   { return call Wrap.isOutput(); }
+}
+
diff --git a/tos/chips/m16c62p/pins/HplM16c62pGeneralIOPortP.nc b/tos/chips/m16c62p/pins/HplM16c62pGeneralIOPortP.nc
new file mode 100755
index 00000000..90dc953f
--- /dev/null
+++ b/tos/chips/m16c62p/pins/HplM16c62pGeneralIOPortP.nc
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+  
+/**
+ * Generic component to expose a full 8-bit port of GPIO pins.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+generic configuration HplM16c62pGeneralIOPortP(uint16_t port_addr,
+                                               uint16_t ddr_addr)
+{
+  // provides all the ports as raw ports
+  provides
+  {
+    interface GeneralIO as Pin0;
+    interface GeneralIO as Pin1;
+    interface GeneralIO as Pin2;
+    interface GeneralIO as Pin3;
+    interface GeneralIO as Pin4;
+    interface GeneralIO as Pin5;
+    interface GeneralIO as Pin6;
+    interface GeneralIO as Pin7;
+  }
+}
+implementation
+{
+  components 
+    new HplM16c62pGeneralIOPinP (port_addr, ddr_addr, 0) as Bit0,
+    new HplM16c62pGeneralIOPinP (port_addr, ddr_addr, 1) as Bit1,
+    new HplM16c62pGeneralIOPinP (port_addr, ddr_addr, 2) as Bit2,
+    new HplM16c62pGeneralIOPinP (port_addr, ddr_addr, 3) as Bit3,
+    new HplM16c62pGeneralIOPinP (port_addr, ddr_addr, 4) as Bit4,
+    new HplM16c62pGeneralIOPinP (port_addr, ddr_addr, 5) as Bit5,
+    new HplM16c62pGeneralIOPinP (port_addr, ddr_addr, 6) as Bit6,
+    new HplM16c62pGeneralIOPinP (port_addr, ddr_addr, 7) as Bit7;
+
+  Pin0 = Bit0;
+  Pin1 = Bit1;
+  Pin2 = Bit2;
+  Pin3 = Bit3;
+  Pin4 = Bit4;
+  Pin5 = Bit5;
+  Pin6 = Bit6;
+  Pin7 = Bit7;
+}
diff --git a/tos/chips/m16c62p/pins/HplM16c62pInterrupt.nc b/tos/chips/m16c62p/pins/HplM16c62pInterrupt.nc
new file mode 100755
index 00000000..fdef9653
--- /dev/null
+++ b/tos/chips/m16c62p/pins/HplM16c62pInterrupt.nc
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * Interface to control an M16c/62p external pin interrupt.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Joe Polastre
+ * @author Martin Turon
+ */
+
+interface HplM16c62pInterrupt
+{
+  /**
+   * Enables M16c/62p hardware interrupt on a particular port.
+   */
+  async command void enable();
+
+  /** 
+   * Disables M16c/62p hardware interrupt on a particular port.
+   */
+  async command void disable();
+
+  /** 
+   * Clears the M16c/62p Interrupt Pending Flag for a particular port.
+   */
+  async command void clear();
+
+  /** 
+   * Gets the current value of the input voltage of a port.
+   *
+   * @return TRUE if the pin is set high, FALSE if it is set low.
+   */
+  async command bool getValue();
+
+  /** 
+   * Sets whether the edge should be high to low or low to high.
+   * @param TRUE if the interrupt should be triggered on a low to high
+   *        edge transition, false for interrupts on a high to low transition.
+   */
+  async command void edge(bool low_to_high);
+
+  /**
+   * Sets the edge mode to both edges.
+   */
+  async command void bothEdges();
+  
+  /**
+   * Signaled when an interrupt occurs on a port.
+   */
+  async event void fired();
+}
diff --git a/tos/chips/m16c62p/pins/HplM16c62pInterruptC.nc b/tos/chips/m16c62p/pins/HplM16c62pInterruptC.nc
new file mode 100755
index 00000000..ff319707
--- /dev/null
+++ b/tos/chips/m16c62p/pins/HplM16c62pInterruptC.nc
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+ 
+/**
+ * This component providing access to all external pin interrupts on M16c/62P.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+configuration HplM16c62pInterruptC
+{
+  provides
+  {
+    interface HplM16c62pInterrupt as Int0;
+    interface HplM16c62pInterrupt as Int1;
+    interface HplM16c62pInterrupt as Int2;
+    interface HplM16c62pInterrupt as Int3;
+    interface HplM16c62pInterrupt as Int4;
+    interface HplM16c62pInterrupt as Int5;
+  }
+}
+implementation
+{
+  components 
+    HplM16c62pInterruptSigP as IrqVector,
+    new HplM16c62pInterruptPinP((uint16_t)&INT0IC, 0) as IntPin0,
+    new HplM16c62pInterruptPinP((uint16_t)&INT1IC, 1) as IntPin1,
+    new HplM16c62pInterruptPinP((uint16_t)&INT2IC, 2) as IntPin2,
+    new HplM16c62pInterruptPinP((uint16_t)&INT3IC, 3) as IntPin3,
+    new HplM16c62pInterruptPinP((uint16_t)&INT4IC, 4) as IntPin4,
+    new HplM16c62pInterruptPinP((uint16_t)&INT5IC, 5) as IntPin5;
+  
+  Int0 = IntPin0;
+  Int1 = IntPin1;
+  Int2 = IntPin2;
+  Int3 = IntPin3;
+  Int4 = IntPin4;
+  Int5 = IntPin5;
+
+  IntPin0.IrqSignal -> IrqVector.IntSig0;
+  IntPin1.IrqSignal -> IrqVector.IntSig1;
+  IntPin2.IrqSignal -> IrqVector.IntSig2;
+  IntPin3.IrqSignal -> IrqVector.IntSig3;
+  IntPin4.IrqSignal -> IrqVector.IntSig4;
+  IntPin5.IrqSignal -> IrqVector.IntSig5;
+#ifdef THREADS
+  components PlatformInterruptC;
+    IrqVector.PlatformInterrupt -> PlatformInterruptC;
+#endif
+}
+
diff --git a/tos/chips/m16c62p/pins/HplM16c62pInterruptPinP.nc b/tos/chips/m16c62p/pins/HplM16c62pInterruptPinP.nc
new file mode 100755
index 00000000..f6ebce8d
--- /dev/null
+++ b/tos/chips/m16c62p/pins/HplM16c62pInterruptPinP.nc
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+ 
+/**
+ * Interrupt interface access for interrupt capable GPIO pins.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+generic module HplM16c62pInterruptPinP (uint16_t ctrl_addr, uint8_t edgebit)
+{
+  provides interface HplM16c62pInterrupt as Irq;
+  uses interface HplM16c62pInterruptSig as IrqSignal;
+}
+implementation
+{
+#define ctrl  (*TCAST(volatile uint8_t * ONE, ctrl_addr))
+
+  inline async command bool Irq.getValue() { return READ_BIT(ctrl, 3); }
+  inline async command void Irq.clear()    { clear_interrupt(ctrl_addr); }
+  inline async command void Irq.disable()  { CLR_BIT(ctrl, 0); }
+  
+  inline async command void Irq.enable()
+  {
+    if (edgebit > 3)
+    {
+      SET_BIT(IFSR.BYTE, (edgebit+2));
+    }
+    SET_BIT(ctrl, 0);
+
+  }
+
+  inline async command void Irq.edge(bool low_to_high)
+  {
+    CLR_BIT(IFSR.BYTE, edgebit); // use edge mode
+    // and select rising vs falling
+    if (low_to_high)
+    {
+      SET_BIT(ctrl, 4);
+    }
+    else
+    {
+      CLR_BIT(ctrl, 4);
+    }
+  }
+
+  inline async command void Irq.bothEdges()
+  {
+    SET_BIT(IFSR.BYTE, edgebit);
+    CLR_BIT(ctrl, 4);
+  }
+
+  /** 
+   * Forward the external interrupt event.
+   */
+  async event void IrqSignal.fired()
+  {
+    call Irq.clear();
+    signal Irq.fired();
+  }
+
+  default async event void Irq.fired() { }
+}
diff --git a/tos/chips/m16c62p/pins/HplM16c62pInterruptSig.nc b/tos/chips/m16c62p/pins/HplM16c62pInterruptSig.nc
new file mode 100755
index 00000000..f826c4a2
--- /dev/null
+++ b/tos/chips/m16c62p/pins/HplM16c62pInterruptSig.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * Interface to an M16c/62p external pin interrupt that exposes just the
+ * interrupt vector routine for easy linking to generic components (see
+ * HplM16c62pInterrupt for the full interface).
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Martin Turon <mturon@xbow.com>
+ * @see HplM16c62pInterrupt
+ */
+interface HplM16c62pInterruptSig
+{
+  /**
+   * Signaled when an interrupt occurs on a pin
+   */
+  async event void fired();
+}
+
diff --git a/tos/chips/m16c62p/pins/HplM16c62pInterruptSigP.nc b/tos/chips/m16c62p/pins/HplM16c62pInterruptSigP.nc
new file mode 100755
index 00000000..a457fa5c
--- /dev/null
+++ b/tos/chips/m16c62p/pins/HplM16c62pInterruptSigP.nc
@@ -0,0 +1,136 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+ 
+/**
+ * Interrupt interface access for interrupt capable GPIO pins.
+ * Exposes just the interrupt vector routine for 
+ * easy linking to generic components.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+module HplM16c62pInterruptSigP
+{
+  provides interface HplM16c62pInterruptSig as IntSig0;
+  provides interface HplM16c62pInterruptSig as IntSig1;
+  provides interface HplM16c62pInterruptSig as IntSig2;
+  provides interface HplM16c62pInterruptSig as IntSig3;
+  provides interface HplM16c62pInterruptSig as IntSig4;
+  provides interface HplM16c62pInterruptSig as IntSig5;
+#ifdef THREADS
+  uses interface PlatformInterrupt;
+#define POST_AMBLE() call PlatformInterrupt.postAmble()
+#else 
+#define POST_AMBLE()
+#endif 
+}
+implementation
+{
+  default async event void IntSig0.fired() { }
+  M16C_INTERRUPT_HANDLER(M16C_INT0)
+  {
+    signal IntSig0.fired();
+    POST_AMBLE();
+  }
+
+  default async event void IntSig1.fired() { }
+  M16C_INTERRUPT_HANDLER(M16C_INT1)
+  {
+    signal IntSig1.fired();
+    POST_AMBLE();
+  }
+
+  default async event void IntSig2.fired() { }
+  M16C_INTERRUPT_HANDLER(M16C_INT2)
+  {
+    signal IntSig2.fired();
+    POST_AMBLE();
+  }
+
+  default async event void IntSig3.fired() { }
+  M16C_INTERRUPT_HANDLER(M16C_INT3)
+  {
+    signal IntSig3.fired();
+    POST_AMBLE();
+  }
+
+  default async event void IntSig4.fired() { }
+  M16C_INTERRUPT_HANDLER(M16C_INT4)
+  {
+    signal IntSig4.fired();
+    POST_AMBLE();
+  }
+
+  default async event void IntSig5.fired() { }
+  M16C_INTERRUPT_HANDLER(M16C_INT5)
+  {
+    signal IntSig5.fired();
+    POST_AMBLE();
+  }
+
+}
diff --git a/tos/chips/m16c62p/pins/M16c62pInterruptC.nc b/tos/chips/m16c62p/pins/M16c62pInterruptC.nc
new file mode 100755
index 00000000..f96c27e3
--- /dev/null
+++ b/tos/chips/m16c62p/pins/M16c62pInterruptC.nc
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Joe Polastre
+ * @author Martin Turon
+ */
+ 
+/**
+ * Creates a HIL interrupt component from a M16c/62p interrupt.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+generic module M16c62pInterruptC()
+{
+  provides interface GpioInterrupt;
+  uses interface HplM16c62pInterrupt;
+}
+implementation {
+  async command error_t GpioInterrupt.enableRisingEdge()
+  {
+    atomic
+    {
+      call HplM16c62pInterrupt.disable();
+      call HplM16c62pInterrupt.edge(true);
+      call HplM16c62pInterrupt.clear();
+      call HplM16c62pInterrupt.enable();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t GpioInterrupt.enableFallingEdge()
+  {
+    atomic
+    {
+      call HplM16c62pInterrupt.disable();
+      call HplM16c62pInterrupt.edge(false);
+      call HplM16c62pInterrupt.clear();
+      call HplM16c62pInterrupt.enable();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t GpioInterrupt.disable()
+  {
+    atomic
+    {
+      call HplM16c62pInterrupt.disable();
+      call HplM16c62pInterrupt.clear();
+    }
+    return SUCCESS;
+  }
+
+  async event void HplM16c62pInterrupt.fired()
+  {
+    signal GpioInterrupt.fired();
+  }
+
+  default async event void GpioInterrupt.fired() { }
+}
diff --git a/tos/chips/m16c62p/pins/M16c62pPin.h b/tos/chips/m16c62p/pins/M16c62pPin.h
new file mode 100644
index 00000000..e4bb8e10
--- /dev/null
+++ b/tos/chips/m16c62p/pins/M16c62pPin.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * M16c62p pin defines and enums.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+
+#ifndef __M16C62P_PIN_H__
+#define __M16C62P_PIN_H__
+
+enum
+{
+  M16C_PIN_INACTIVE_DONT_CARE = 0,
+  M16C_PIN_INACTIVE_OUTPUT_LOW = 1,
+  M16C_PIN_INACTIVE_OUTPUT_HIGH = 2,
+  M16C_PIN_INACTIVE_INPUT = 3
+};
+
+#define M16C_PORT_INACTIVE_STATE(p0, p1, p2, p3, p4, p5, p6, p7) p0 | (p1 << 2) | \
+                                                          (p2 << 4) | (p3 << 6) | \
+                                                          (p4 << 8) | (p5 << 10) | \
+                                                         (p6 << 12) | (p7 << 14)
+
+#endif  // __M16C62P_PIN_H__ 
diff --git a/tos/chips/m16c62p/printf/m16c62p_printf.h b/tos/chips/m16c62p/printf/m16c62p_printf.h
new file mode 100644
index 00000000..96a8d9d6
--- /dev/null
+++ b/tos/chips/m16c62p/printf/m16c62p_printf.h
@@ -0,0 +1,481 @@
+/****************************************************************
+  KPIT Cummins Infosystems Ltd, Pune, India. 1-April-2006.
+
+  This program is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+ *****************************************************************/
+
+/*
+   Written By:
+   Shrirang Khishti <shrirangk@kpitcummins.com>.
+
+   This is a smaller version of printf
+   Positive points about this function
+   1. Reduces code size considerably ,very useful in embedded applications
+   2. No malloc calls are used
+   3. Supports almost all the functionalities of GNU std printf routine.
+   4. If user dont want float_support in this customized printf
+   just undef macro float_support
+ */
+
+#ifndef  __M16C62P_PRINTF_H__
+#define __M16C62P_PRINTF_H__
+#include <stdarg.h>
+#include <string.h>
+
+#define printf _printf
+
+int left_val,right_val;
+
+#define condition *format!='f'&&*format!='d'&&*format!='c'&&*format!='s'&&*format!='l'&&*format!='u'&&*format!='\0'&&*format!=' '&&*format!='i'&&*format!='x'&&*format!='X'&&*format!='o'&&*format!='%'&&*format!='p'
+
+#define float_support
+
+long temp_arr[]={100000,10,100,1000,10000,100000,1000000,10000000,100000000,1000000000};
+
+
+/**
+ * @fn
+ * @brief 
+ *
+ * @param c
+ */
+int
+_putchar(int c)
+{     
+  /* Convert CR to CR/LF */
+  if (c == '\n')
+    lowlevel_putc('\r');
+  lowlevel_putc(c);
+
+  return c;
+}
+
+
+/**
+ * @fn void _puts(const char *tempStr)
+ * @brief Prints a NULL-erminated string on UART 1
+ *
+ * @param s The string to output
+ *
+ */
+int
+_puts(const char *s)
+{
+  while( *s != '\0' )
+    _putchar(*s++);
+
+  return 0;
+}
+
+
+/**
+ * @fn void strrev(char *str)
+ * @brief Reverses a string
+ *
+ * @param str The string to reverse
+ */
+void
+strrev(char *str)
+{
+  char *temp, c;
+  int len=strlen(str) ;
+  temp = str + len -1;
+
+  while(str < temp ) {
+
+    c = *str;
+    *str = *temp;
+
+    *temp = c;
+    str++;
+    temp--;
+  }
+}
+
+
+static void print_hex_oct( long int temp_var,int _div,int corr_factor,int ret_val,int sign,int *cntr_val)
+{
+  unsigned long int i=1,i1,temp=temp_var;
+  int cntr=0,neg_flag=0;
+  char s1[40];
+
+  if(sign==1&&temp_var<0)
+  {
+    temp=-temp_var;
+    neg_flag=1;
+  }
+  if(temp==0)
+    s1[cntr++]='0';
+  while(temp>0)
+  {
+    i1=temp%_div;
+    temp=temp/_div;
+    if(i1<=9)
+      s1[cntr]=i1+'0';
+    else
+      s1[cntr]=i1+corr_factor-9;
+    cntr++;
+  }
+
+  while((left_val-(right_val>cntr?right_val:cntr+neg_flag))>0)
+  {
+    _putchar(' ');
+    left_val--;
+		(*cntr_val)++;
+	}
+
+	while(right_val-cntr>0)
+	{
+		s1[cntr++]='0';
+	}
+
+	if(neg_flag==1)
+	s1[cntr++]='-';
+
+	s1[cntr]='\0';
+	strrev(s1);
+	_puts(s1);
+	(*cntr_val)+=strlen(s1);
+}
+
+
+#ifdef float_support
+static void float_print(long double f1,long double f2,int multi,int *cntr_val)
+{
+	int i=1,temp,cntr=0,i1,neg_flag=0;
+	char s1[10];
+
+	 if(f1<0)
+	 {
+		 f1=f1*-1;
+		 neg_flag=1;
+		 f2=f1;
+	 }
+	 temp=(int)f1;
+
+	 f1=f1-temp;
+     f1=f1*multi;
+
+     temp=f1;
+
+     if(temp==0)
+    	s1[cntr++]='0';
+     while(temp>0)
+     {
+         i1=temp%10;
+         temp=temp/10;
+         s1[cntr]=i1+0x30;
+         cntr++;
+     }
+
+     while(right_val<9&&(right_val -cntr)>0)
+	   s1[cntr++]='0';
+	   s1[cntr]='.';
+	   cntr++;
+
+	   temp=(int)f2;
+	 if(temp==0)
+		s1[cntr++]='0';
+	 while(temp>0)
+	 {
+	      i1=temp%10;
+	      temp=temp/10;
+	      s1[cntr]=i1+0x30;
+	      cntr++;
+	 }
+
+	 while(left_val-- -cntr>0)
+		{
+			_putchar(' ');
+			(*cntr_val)++;
+		}
+			if(neg_flag==1)
+	    s1[cntr++]='-';
+	    s1[cntr]='\0';
+	    cntr--;
+	 	strrev(s1);
+    	_puts(s1);
+		(*cntr_val)+=strlen(s1);
+   		neg_flag=0;
+}
+
+#endif // float_support
+
+static int format_val(char *temp,long float_flag,int *cntr_val,int flag)
+{
+left_val=0;
+right_val=0;
+	if(*temp=='\0'&&flag==1)
+	{
+		right_val=3;
+		return 0;
+	}
+	while(*temp!='.'&&*temp!='\0')
+	{
+		if(*temp<'0'||*temp>'9')
+		{
+			while(*temp)
+			{
+				_putchar(*temp++);
+				(*cntr_val)++;
+			}
+			return -1;
+		}
+		else
+		left_val=left_val*10+*temp-'0';
+    	 temp++;
+	}
+    if(*temp)
+		temp++;
+		else
+		return left_val;
+	while(*temp)
+	{
+	if(*temp<'0'||*temp>'9')
+	{
+	while(*temp)
+		{
+			_putchar(*temp++);
+			(*cntr_val)++;
+		}
+	return -1;
+	}
+	else
+	right_val=right_val*10+*temp-'0';
+     temp++;
+	}
+
+return 0;
+}
+
+
+/**
+ * @fn int _printf(const char *format, ...)
+ * @brief Prints a formatted string on UART1
+ *
+ * @param format The string
+ */
+int _printf(const char *format, ...)
+{
+   int format_cntr=0;
+   char temp_str[20];
+   int return_flag=0,cntr_val;
+   long double f1,f2;
+   char *str_temp;
+   int *cntr=&cntr_val;
+
+   va_list ap;
+   va_start(ap, format);
+   *cntr=0;
+   while(*format) {
+     temp_str[format_cntr]='\0';
+     if(*format=='%')
+     {
+       *format++;
+       while(*format==' ')
+       {
+	 format++;
+	 _putchar(' ');
+       }
+       while(condition)
+
+       {
+	 temp_str[format_cntr++]=*format++;
+       }
+       temp_str[format_cntr]='\0';
+       if(*format=='%')
+       {
+	 _putchar('%');
+	 (*cntr)++;
+	 format_cntr=0;
+	 format++;
+	 continue;
+       }
+
+       /************** print unsigned ****************/
+       else if(*format=='u')
+       {
+	 return_flag=format_val(temp_str,0,cntr,0);
+	 if(return_flag!=-1)
+
+	   print_hex_oct(va_arg(ap,unsigned int),10,0,return_flag,0,cntr);
+
+	 else
+	 {
+	   _putchar(*format);
+	   (*cntr)++;
+	 }
+	 format++;
+	 format_cntr=0;
+	 continue;
+       }
+       /*********** Print Integer Values **************/
+       else if(*format=='d'||*format=='i')
+       {
+	 return_flag=format_val(temp_str,0,cntr,0);
+
+	 if(return_flag!=-1)
+
+	   print_hex_oct(va_arg(ap,int),10,0,return_flag,1,cntr);
+
+	 else
+	 {
+	   _putchar(*format);
+	   (*cntr)++;
+	 }
+	 format++;
+	 format_cntr=0;
+	 continue;
+
+       }
+
+       /*********** Print hex,Octal values ******************/
+       else if(*format=='x'||*format=='X'||*format=='o'||*format=='p')
+       {
+	 return_flag=format_val(temp_str,0,cntr,0);
+	 if(return_flag!=-1) {
+
+	   if(*format=='x'||*format=='p')
+	     print_hex_oct(va_arg(ap,unsigned int),16,0x60,return_flag,0,cntr);
+	   else if(*format=='X')
+	     print_hex_oct(va_arg(ap,unsigned int),16,0x40,return_flag,0,cntr);
+	   else
+	     print_hex_oct(va_arg(ap,unsigned int),8,0,return_flag,0,cntr);
+	 }
+	 else
+	 {
+	   _putchar(*format);
+	   (*cntr)++;
+	 }
+	 format++;
+	 format_cntr=0;
+	 continue;
+       }
+
+       /************ Character printing ****************88*/
+       else if(*format=='c')
+       {
+	 return_flag=format_val(temp_str,0,cntr,0);
+	 if(return_flag!=-1)
+	 {
+	   while(return_flag-->1)
+	   {
+	     _putchar(' ');
+	     (*cntr)++;
+	   }
+	   _putchar(va_arg(ap,int));
+	   (*cntr)+=2;
+	 }
+	 else
+	 {
+	   _putchar(*format);
+	   (*cntr)++;
+	 }
+	 format++;
+	 format_cntr=0;
+	 continue;
+       }
+
+       /*************** Print String *****************/
+       else if(*format=='s')
+       {
+	 return_flag=format_val(temp_str,0,cntr,0);
+	 if(return_flag!=-1)
+	 {
+	   str_temp=va_arg(ap,char*);
+
+	   while((return_flag--  -(int) strlen(str_temp))>0)
+	   {
+	     _putchar(' ');
+	     (*cntr)++;
+
+	   }
+	   _puts(str_temp);
+	   (*cntr)+=strlen(str_temp);
+	 }
+	 else
+	 {
+	   _putchar(*format);
+	   (*cntr)++;
+	 }
+	 format++;
+	 format_cntr=0;
+	 continue;
+
+       }
+       /*************** Print floating point number *****************/
+       else if(*format=='f'||(*format=='l'&&*(format+1)=='f'))
+       {
+
+	 return_flag=format_val(temp_str,1,cntr,1);
+	 if(return_flag!=-1)
+	 {
+	   if(*format=='l')
+	   {
+	     f1=va_arg(ap,long double);
+	     format+=2;
+	   }
+	   else
+	   {
+	     f1=va_arg(ap,double);
+	     format++;
+	   }
+	   f2=f1;
+#ifdef float_support
+	   right_val++;
+	   float_print(f1,f2,temp_arr[right_val%10],cntr);
+#endif
+	 }
+	 else
+	 {
+	   _putchar(*format++);
+	   (*cntr)++;
+	 }
+	 format_cntr=0;
+	 continue;
+       }
+       else if(*format=='l'&&((*(format+1)=='d')||(*(format+1)=='u')))
+       {
+	 return_flag=format_val(temp_str,0,cntr,0);
+
+	 if((return_flag=-1)&&(*(format+1)=='d'))
+	 {
+	   print_hex_oct(va_arg(ap,long int),10,0x00,return_flag,1,cntr);
+	 }
+
+	 else if((return_flag=-1)&&(*(format+1)=='u'))
+	 {
+	   print_hex_oct(va_arg(ap,unsigned long int),10,0x00,return_flag,0,cntr);
+	 }
+
+	 else
+	 {
+	   _putchar(*format);
+	   _putchar(*(format+1));
+	   (*cntr)+=2;
+	 }
+	 format+=2;
+	 format_cntr=0;
+	 continue;
+       }
+       else
+       {
+	 _puts(temp_str);
+	 format_cntr=0;
+	 continue;
+       }
+     }
+     _putchar(*format++);
+
+     (*cntr)++;
+   }
+   va_end(ap);
+   return cntr_val;
+}
+
+
+#endif // __M16C62P_PRINTF_H__
+
diff --git a/tos/chips/m16c62p/timer/HplM16c62pTimer.nc b/tos/chips/m16c62p/timer/HplM16c62pTimer.nc
new file mode 100755
index 00000000..3e5edee5
--- /dev/null
+++ b/tos/chips/m16c62p/timer/HplM16c62pTimer.nc
@@ -0,0 +1,152 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Basic interface to the hardware timers on the M16C/62p.
+ * This interface provides four major groups of functionality:<ol>
+ *      <li>Timer Value: get/set current time
+ *      <li>Interrupt event, occurs when the timer under- or overflows.
+ *      <li>Control of Interrupt: enableInterrupt/disableInterrupt/clearInterrupt...
+ *      <li>Timer Initialization: turn on/off clock source
+ * </ol>
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Martin Turon <mturon@xbow.com>
+ */
+ 
+#include "M16c62pTimer.h"
+
+interface HplM16c62pTimer
+{
+  /**
+   * Turn on the clock.
+   */
+  async command void on();
+  
+  /**
+   * Turn off the clock.
+   */
+  async command void off();
+
+  /**
+   * Check if the clock is on.
+   */
+  async command bool isOn();
+
+  /** 
+   * Get the current time.
+   * @return  the current time.
+   */
+  async command uint16_t get();
+
+  /** 
+   * Set the current time.
+   * @param t the time to set.
+   */
+  async command void set( uint16_t t );
+
+  /**
+   * Signalled on timer interrupt.
+   */
+  async event void fired();
+
+  /**
+   * Clear the interrupt flag.
+   */
+  async command void clearInterrupt();
+
+  /**
+   * Enable the interrupts.
+   */
+  async command void enableInterrupt();
+
+  /**
+   * Turns off interrupts.
+   */
+  async command void disableInterrupt();
+
+  /** 
+   * Checks if an interrupt has occured.
+   * @return TRUE if interrupt has triggered.
+   */
+  async command bool testInterrupt();
+
+  /** 
+   * Checks if interrupts are on.
+   * @return TRUE if interrups are enabled.
+   */
+  async command bool isInterruptOn();
+  
+  /**
+   * Turn stop mode on/off while the timer is on.
+   * @param allow If true the mcu can go into stop mode while
+   *              timer is on if false the mcu can only use
+   *              wait mode while timer is on.
+   */
+  async command void allowStopMode(bool allow);
+}
diff --git a/tos/chips/m16c62p/timer/HplM16c62pTimerACtrl.nc b/tos/chips/m16c62p/timer/HplM16c62pTimerACtrl.nc
new file mode 100755
index 00000000..2151e994
--- /dev/null
+++ b/tos/chips/m16c62p/timer/HplM16c62pTimerACtrl.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface for controlling the mode of a TimerA.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "M16c62pTimer.h"
+
+interface HplM16c62pTimerACtrl
+{
+  /**
+   * Sets the timer to timer mode.
+   *
+   * @param settings The settings for the timer mode.
+   */
+  async command void setTimerMode(st_timer settings);
+
+  /**
+   * Sets the timer to counter mode.
+   *
+   * @param settings The settings for the counter mode.
+   */
+  async command void setCounterMode(sta_counter settings);
+
+  /**
+   * Sets the timer to one-shot mode.
+   *
+   * @param settings The settings for the one-shot mode.
+   */
+  async command void setOneShotMode(sta_one_shot settings);
+  
+  /**
+   * Starts the timer if in one-shot mode.
+   */
+  async command void oneShotFire();
+}
diff --git a/tos/chips/m16c62p/timer/HplM16c62pTimerACtrlP.nc b/tos/chips/m16c62p/timer/HplM16c62pTimerACtrlP.nc
new file mode 100755
index 00000000..72b85794
--- /dev/null
+++ b/tos/chips/m16c62p/timer/HplM16c62pTimerACtrlP.nc
@@ -0,0 +1,131 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the HplM16c62pTimerACtrl interface.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "M16c62pTimer.h"
+
+generic module HplM16c62pTimerACtrlP (uint8_t timer,
+                                      uint16_t mode_addr,
+                                      uint16_t taitg_addr,
+                                      uint8_t taitg_start_bit)
+{
+  provides interface HplM16c62pTimerACtrl as TimerACtrl;
+}
+implementation
+{
+#define mode (*TCAST(volatile uint8_t* ONE, mode_addr))
+#define taitg (*TCAST(volatile uint8_t* ONE, taitg_addr))
+  inline void UDFBit(uint16_t bit, uint16_t value)
+  {
+    uint8_t tmp = UDF;
+    WRITE_BIT(tmp, bit, value);
+    // Move tmp variable into UDF (adress 0x0384)
+    asm("mov.b %0,(0x0384)" : : "r"(tmp) );
+  }
+  
+  inline void setTAiTG(uint8_t flag)
+  {
+    CLR_FLAG(taitg, 0x03 << taitg_start_bit);
+    SET_FLAG(taitg, flag << taitg_start_bit);
+  }
+
+  async command void TimerACtrl.setTimerMode(st_timer settings)
+  {
+    uint8_t flags = 0;
+    // If timer nr > 1 set "Two-phase pulse signal" bit to zero.
+    if (timer > 1)
+    {
+      UDFBit(timer + 3, 0);
+    }
+    flags = settings.output_pulse << 2 | settings.gate_func << 3 | settings.count_src << 6;
+    mode = flags;
+  }
+
+  async command void TimerACtrl.setCounterMode(sta_counter settings)
+  {
+    uint8_t flags;
+    uint8_t TAiTG;
+    mode = 1;
+    flags = settings.operation_type << 6;
+    if (settings.two_phase_pulse_mode && timer > 1)
+    {
+      uint8_t tmp = timer; // Used to remove left shift warning
+      // Set flags
+      flags |= 0x04 | settings.two_phase_processing << 7;
+      // If two-phase signal procressing is desired UDF TAiP bit must be set.
+      UDFBit(timer + 3, 1);
+      // Set TAiTGH and TAiTGL in TRGSR to "00b" (TAiIN pin input).
+      if (tmp == 0)
+        tmp = 1; // This line will never be executed because tmp is always > 1
+      CLR_FLAG(TRGSR.BYTE, 0x03 << ((tmp - 1) * 2));
+      TAiTG = 0x00;
+    }
+    else
+    {
+      flags |= settings.output_pulse << 2 | settings.count_rising_edge << 3 |
+          settings.up_down_switch << 4;
+      // If two-phase signal procressing is not desired UDF TAiP bit must be cleared.
+      // Note this is only availible for timers A2, A3 and A4
+      if (timer > 1)
+      {
+        UDFBit(timer + 3, 0);
+      }
+      UDFBit(timer, settings.up_count);
+      TAiTG = settings.event_source;
+    }
+    setTAiTG(TAiTG);
+    mode |= flags;
+  }
+
+  async command void TimerACtrl.setOneShotMode(sta_one_shot settings)
+  {
+    uint8_t flags;
+    mode = 0x02;
+    flags = settings.output_pulse << 2 | settings.ext_trigger_rising_edge << 3 | settings.trigger << 4 | settings.count_src << 6;
+    setTAiTG(settings.TAiTG_trigger_source);
+    mode |= flags;
+  }
+
+  async command void TimerACtrl.oneShotFire()
+  {
+    SET_BIT(ONSF.BYTE, timer);
+  }
+}
diff --git a/tos/chips/m16c62p/timer/HplM16c62pTimerBCtrl.nc b/tos/chips/m16c62p/timer/HplM16c62pTimerBCtrl.nc
new file mode 100755
index 00000000..e7c59847
--- /dev/null
+++ b/tos/chips/m16c62p/timer/HplM16c62pTimerBCtrl.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+* Interface for controlling the mode of a TimerB.
+* Precaution when using timer mode, read M16c62pTimer.h for more information.
+*
+* @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+*/
+
+#include "M16c62pTimer.h"
+
+interface HplM16c62pTimerBCtrl
+{
+  /** 
+   * Sets the timer to timer mode.
+   *
+   * @param settings The settings for the timer mode.
+   */
+  async command void setTimerMode(st_timer settings);
+
+  /** 
+   * Sets the timer to counter mode.
+   *
+   * @param settings The settings for the counter mode.
+   */
+  async command void setCounterMode(stb_counter settings);
+}
diff --git a/tos/chips/m16c62p/timer/HplM16c62pTimerBCtrlP.nc b/tos/chips/m16c62p/timer/HplM16c62pTimerBCtrlP.nc
new file mode 100755
index 00000000..ab59f19f
--- /dev/null
+++ b/tos/chips/m16c62p/timer/HplM16c62pTimerBCtrlP.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the HplM16c62pTimerBCtrl interface.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "M16c62pTimer.h"
+
+generic module HplM16c62pTimerBCtrlP (uint16_t mode_addr)
+{
+  provides interface HplM16c62pTimerBCtrl as TimerBCtrl;
+}
+implementation
+{
+#define mode (*TCAST(volatile uint8_t* ONE, mode_addr))
+  async command void TimerBCtrl.setTimerMode(st_timer settings)
+  {
+    mode = settings.count_src << 6;
+  }
+
+  async command void TimerBCtrl.setCounterMode(stb_counter settings)
+  {
+    mode = 1 | settings.count_polarity << 2 | settings.event_source << 7;
+  }
+}
diff --git a/tos/chips/m16c62p/timer/HplM16c62pTimerC.nc b/tos/chips/m16c62p/timer/HplM16c62pTimerC.nc
new file mode 100755
index 00000000..bfc9e2f6
--- /dev/null
+++ b/tos/chips/m16c62p/timer/HplM16c62pTimerC.nc
@@ -0,0 +1,173 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interfaces to all the M16c/62p timers and controls.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+configuration HplM16c62pTimerC
+{
+  provides
+  {
+    interface HplM16c62pTimer as TimerA0;
+    interface HplM16c62pTimer as TimerA1;
+    interface HplM16c62pTimer as TimerA2;
+    interface HplM16c62pTimer as TimerA3;
+    interface HplM16c62pTimer as TimerA4;
+
+    interface HplM16c62pTimerACtrl as TimerA0Ctrl;
+    interface HplM16c62pTimerACtrl as TimerA1Ctrl;
+    interface HplM16c62pTimerACtrl as TimerA2Ctrl;
+    interface HplM16c62pTimerACtrl as TimerA3Ctrl;
+    interface HplM16c62pTimerACtrl as TimerA4Ctrl; 
+
+    interface HplM16c62pTimer as TimerB0;
+    interface HplM16c62pTimer as TimerB1;
+    interface HplM16c62pTimer as TimerB2;
+    interface HplM16c62pTimer as TimerB3;
+    interface HplM16c62pTimer as TimerB4;
+    interface HplM16c62pTimer as TimerB5;
+
+    interface HplM16c62pTimerBCtrl as TimerB0Ctrl;
+    interface HplM16c62pTimerBCtrl as TimerB1Ctrl;
+    interface HplM16c62pTimerBCtrl as TimerB2Ctrl;
+    interface HplM16c62pTimerBCtrl as TimerB3Ctrl;
+    interface HplM16c62pTimerBCtrl as TimerB4Ctrl;
+    interface HplM16c62pTimerBCtrl as TimerB5Ctrl;
+  }
+}
+implementation 
+{
+  components
+    HplM16c62pTimerInterruptP as IrqVector,
+    new HplM16c62pTimerP((uint16_t)&TA0, (uint16_t)&TA0IC, (uint16_t)&TABSR, 0) as TimerA0_,
+    new HplM16c62pTimerP((uint16_t)&TA1, (uint16_t)&TA1IC, (uint16_t)&TABSR, 1) as TimerA1_,
+    new HplM16c62pTimerP((uint16_t)&TA2, (uint16_t)&TA2IC, (uint16_t)&TABSR, 2) as TimerA2_,
+    new HplM16c62pTimerP((uint16_t)&TA3, (uint16_t)&TA3IC, (uint16_t)&TABSR, 3) as TimerA3_,
+    new HplM16c62pTimerP((uint16_t)&TA4, (uint16_t)&TA4IC, (uint16_t)&TABSR, 4) as TimerA4_,
+
+    new HplM16c62pTimerACtrlP(0, (uint16_t)&TA0MR, (uint16_t)&ONSF,  6) as TimerA0Ctrl_,
+    new HplM16c62pTimerACtrlP(1, (uint16_t)&TA1MR, (uint16_t)&TRGSR, 0) as TimerA1Ctrl_,
+    new HplM16c62pTimerACtrlP(2, (uint16_t)&TA2MR, (uint16_t)&TRGSR, 2) as TimerA2Ctrl_,
+    new HplM16c62pTimerACtrlP(3, (uint16_t)&TA3MR, (uint16_t)&TRGSR, 4) as TimerA3Ctrl_,
+    new HplM16c62pTimerACtrlP(4, (uint16_t)&TA4MR, (uint16_t)&TRGSR, 6) as TimerA4Ctrl_,
+
+    new HplM16c62pTimerP((uint16_t)&TB0, (uint16_t)&TB0IC, (uint16_t)&TABSR, 5) as TimerB0_,
+    new HplM16c62pTimerP((uint16_t)&TB1, (uint16_t)&TB1IC, (uint16_t)&TABSR, 6) as TimerB1_,
+    new HplM16c62pTimerP((uint16_t)&TB2, (uint16_t)&TB2IC, (uint16_t)&TABSR, 7) as TimerB2_,
+    new HplM16c62pTimerP((uint16_t)&TB3, (uint16_t)&TB3IC, (uint16_t)&TBSR,  5) as TimerB3_,
+    new HplM16c62pTimerP((uint16_t)&TB4, (uint16_t)&TB4IC, (uint16_t)&TBSR,  6) as TimerB4_,
+    new HplM16c62pTimerP((uint16_t)&TB5, (uint16_t)&TB5IC, (uint16_t)&TBSR,  7) as TimerB5_,
+
+    new HplM16c62pTimerBCtrlP((uint16_t)&TB0MR) as TimerB0Ctrl_,
+    new HplM16c62pTimerBCtrlP((uint16_t)&TB1MR) as TimerB1Ctrl_,
+    new HplM16c62pTimerBCtrlP((uint16_t)&TB2MR) as TimerB2Ctrl_,
+    new HplM16c62pTimerBCtrlP((uint16_t)&TB3MR) as TimerB3Ctrl_,
+    new HplM16c62pTimerBCtrlP((uint16_t)&TB4MR) as TimerB4Ctrl_,
+    new HplM16c62pTimerBCtrlP((uint16_t)&TB5MR) as TimerB5Ctrl_,
+    
+    new StopModeControlC() as TimerA0StopModeControl,
+    new StopModeControlC() as TimerA1StopModeControl,
+    new StopModeControlC() as TimerA2StopModeControl,
+    new StopModeControlC() as TimerA3StopModeControl,
+    new StopModeControlC() as TimerA4StopModeControl,
+
+    new StopModeControlC() as TimerB0StopModeControl,
+    new StopModeControlC() as TimerB1StopModeControl,
+    new StopModeControlC() as TimerB2StopModeControl,
+    new StopModeControlC() as TimerB3StopModeControl,
+    new StopModeControlC() as TimerB4StopModeControl,
+    new StopModeControlC() as TimerB5StopModeControl;
+    
+
+  TimerA0 = TimerA0_;
+  TimerA1 = TimerA1_;
+  TimerA2 = TimerA2_;
+  TimerA3 = TimerA3_;
+  TimerA4 = TimerA4_;
+  
+  TimerA0_.StopModeControl -> TimerA0StopModeControl;
+  TimerA1_.StopModeControl -> TimerA1StopModeControl;
+  TimerA2_.StopModeControl -> TimerA2StopModeControl;
+  TimerA3_.StopModeControl -> TimerA3StopModeControl;
+  TimerA4_.StopModeControl -> TimerA4StopModeControl;
+
+  TimerB0 = TimerB0_;
+  TimerB1 = TimerB1_;
+  TimerB2 = TimerB2_;
+  TimerB3 = TimerB3_;
+  TimerB4 = TimerB4_;
+  TimerB5 = TimerB5_;
+  
+  TimerB0_.StopModeControl -> TimerB0StopModeControl;
+  TimerB1_.StopModeControl -> TimerB1StopModeControl;
+  TimerB2_.StopModeControl -> TimerB2StopModeControl;
+  TimerB3_.StopModeControl -> TimerB3StopModeControl;
+  TimerB4_.StopModeControl -> TimerB4StopModeControl;
+  TimerB5_.StopModeControl -> TimerB5StopModeControl;
+
+  TimerA0_.IrqSignal -> IrqVector.TimerA0;
+  TimerA1_.IrqSignal -> IrqVector.TimerA1;
+  TimerA2_.IrqSignal -> IrqVector.TimerA2;
+  TimerA3_.IrqSignal -> IrqVector.TimerA3;
+  TimerA4_.IrqSignal -> IrqVector.TimerA4;
+
+  TimerB0_.IrqSignal -> IrqVector.TimerB0;
+  TimerB1_.IrqSignal -> IrqVector.TimerB1;
+  TimerB2_.IrqSignal -> IrqVector.TimerB2;
+  TimerB3_.IrqSignal -> IrqVector.TimerB3;
+  TimerB4_.IrqSignal -> IrqVector.TimerB4;
+  TimerB5_.IrqSignal -> IrqVector.TimerB5;
+
+  TimerA0Ctrl = TimerA0Ctrl_;
+  TimerA1Ctrl = TimerA1Ctrl_;
+  TimerA2Ctrl = TimerA2Ctrl_;
+  TimerA3Ctrl = TimerA3Ctrl_;
+  TimerA4Ctrl = TimerA4Ctrl_;
+
+  TimerB0Ctrl = TimerB0Ctrl_;
+  TimerB1Ctrl = TimerB1Ctrl_;
+  TimerB2Ctrl = TimerB2Ctrl_;
+  TimerB3Ctrl = TimerB3Ctrl_;
+  TimerB4Ctrl = TimerB4Ctrl_;
+  TimerB5Ctrl = TimerB5Ctrl_;
+
+#ifdef THREADS
+  components PlatformInterruptC;
+    IrqVector.PlatformInterrupt -> PlatformInterruptC;
+#endif
+}
diff --git a/tos/chips/m16c62p/timer/HplM16c62pTimerInterrupt.nc b/tos/chips/m16c62p/timer/HplM16c62pTimerInterrupt.nc
new file mode 100755
index 00000000..e373a298
--- /dev/null
+++ b/tos/chips/m16c62p/timer/HplM16c62pTimerInterrupt.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface for interrupt signal from a timer.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+interface HplM16c62pTimerInterrupt
+{
+  /** 
+   * Signal when an overflow/underflow interrupt occurs on a timer.
+   */  
+  async event void fired();
+}
+
diff --git a/tos/chips/m16c62p/timer/HplM16c62pTimerInterruptP.nc b/tos/chips/m16c62p/timer/HplM16c62pTimerInterruptP.nc
new file mode 100755
index 00000000..dffcdc51
--- /dev/null
+++ b/tos/chips/m16c62p/timer/HplM16c62pTimerInterruptP.nc
@@ -0,0 +1,143 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * All timer interrupt vector handlers.
+ * These are wired in HplM16c62pTimerC.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+module HplM16c62pTimerInterruptP
+{
+  provides interface HplM16c62pTimerInterrupt as TimerA0;
+  provides interface HplM16c62pTimerInterrupt as TimerA1;
+  provides interface HplM16c62pTimerInterrupt as TimerA2;
+  provides interface HplM16c62pTimerInterrupt as TimerA3;
+  provides interface HplM16c62pTimerInterrupt as TimerA4;
+  provides interface HplM16c62pTimerInterrupt as TimerB0;
+  provides interface HplM16c62pTimerInterrupt as TimerB1;
+  provides interface HplM16c62pTimerInterrupt as TimerB2;
+  provides interface HplM16c62pTimerInterrupt as TimerB3;
+  provides interface HplM16c62pTimerInterrupt as TimerB4;
+  provides interface HplM16c62pTimerInterrupt as TimerB5;
+#ifdef THREADS
+  uses interface PlatformInterrupt;
+#define POST_AMBLE() call PlatformInterrupt.postAmble()
+#else 
+#define POST_AMBLE()
+#endif 
+}
+implementation
+{
+  default async event void TimerA0.fired() { } 
+  M16C_INTERRUPT_HANDLER(M16C_TMRA0)
+  {
+    signal TimerA0.fired();
+    POST_AMBLE();
+  }
+
+  default async event void TimerA1.fired() { } 
+  M16C_INTERRUPT_HANDLER(M16C_TMRA1)
+  {
+    signal TimerA1.fired();
+    POST_AMBLE();
+  }
+
+  default async event void TimerA2.fired() { } 
+  M16C_INTERRUPT_HANDLER(M16C_TMRA2)
+  {
+    signal TimerA2.fired();
+    POST_AMBLE();
+  }
+
+  default async event void TimerA3.fired() { } 
+  M16C_INTERRUPT_HANDLER(M16C_TMRA3)
+  {
+    signal TimerA3.fired();
+    POST_AMBLE();
+  }
+
+  default async event void TimerA4.fired() { } 
+  M16C_INTERRUPT_HANDLER(M16C_TMRA4)
+  {
+    signal TimerA4.fired();
+    POST_AMBLE();
+  }
+
+  default async event void TimerB0.fired() { } 
+  M16C_INTERRUPT_HANDLER(M16C_TMRB0)
+  {
+    signal TimerB0.fired();
+    POST_AMBLE();
+  }
+
+  default async event void TimerB1.fired() { } 
+  M16C_INTERRUPT_HANDLER(M16C_TMRB1)
+  {
+    signal TimerB1.fired();
+    POST_AMBLE();
+  }
+
+  default async event void TimerB2.fired() { } 
+  M16C_INTERRUPT_HANDLER(M16C_TMRB2)
+  {
+    signal TimerB2.fired();
+    POST_AMBLE();
+  }
+
+  default async event void TimerB3.fired() { } 
+  M16C_INTERRUPT_HANDLER(M16C_TMRB3)
+  {
+    signal TimerB3.fired();
+    POST_AMBLE();
+  }
+
+  default async event void TimerB4.fired() { } 
+  M16C_INTERRUPT_HANDLER(M16C_TMRB4)
+  {
+    signal TimerB4.fired();
+    POST_AMBLE();
+  }
+
+  default async event void TimerB5.fired() { } 
+  M16C_INTERRUPT_HANDLER(M16C_TMRB5)
+  {
+    signal TimerB5.fired();
+    POST_AMBLE();
+  }
+
+}
diff --git a/tos/chips/m16c62p/timer/HplM16c62pTimerP.nc b/tos/chips/m16c62p/timer/HplM16c62pTimerP.nc
new file mode 100755
index 00000000..eef8fb12
--- /dev/null
+++ b/tos/chips/m16c62p/timer/HplM16c62pTimerP.nc
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of a generic HplM16c62pTimer interface.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+generic module HplM16c62pTimerP (uint16_t timer_addr,
+                                 uint16_t interrupt_addr,
+                                 uint16_t start_addr,
+                                 uint8_t start_bit)
+{
+  provides interface HplM16c62pTimer as Timer;
+
+  uses interface HplM16c62pTimerInterrupt as IrqSignal;
+  uses interface StopModeControl;
+}
+implementation
+{
+#define timer (*TCAST(volatile uint16_t* ONE, timer_addr))
+#define start (*TCAST(volatile uint8_t* ONE, start_addr))
+#define interrupt (*TCAST(volatile uint8_t* ONE, interrupt_addr))
+
+  bool allow_stop_mode = false;
+
+  async command uint16_t Timer.get() { return timer; }
+  
+  async command void Timer.set( uint16_t t )
+  {
+    // If the timer is on it must be turned off, else the value will
+    // only be written to the reload register.
+    atomic
+    {
+      if(call Timer.isOn())
+      {
+        call Timer.off();
+        timer = t;
+        call Timer.on();
+      }
+      else
+      {
+        timer = t;
+      }
+    }
+  }
+
+  // When the timer is turned on in one-shot mode on TimerA
+  // the timer also needs an trigger event to start counting.
+  async command void Timer.on()
+  { 
+    atomic if (!allow_stop_mode)
+    {
+      call StopModeControl.allowStopMode(false);
+    }
+    SET_BIT(start, start_bit); 
+  }
+  
+  async command void Timer.off()
+  { 
+    CLR_BIT(start, start_bit);
+    atomic if (!allow_stop_mode)
+    {
+      call StopModeControl.allowStopMode(true);
+    }
+  }
+  
+  async command bool Timer.isOn() { return READ_BIT(start, start_bit); }
+  async command void Timer.clearInterrupt() { clear_interrupt(interrupt_addr); }
+  async command void Timer.enableInterrupt() { SET_BIT(interrupt, 0); }
+  async command void Timer.disableInterrupt() { CLR_BIT(interrupt, 0); }
+  async command bool Timer.testInterrupt() { return READ_BIT(interrupt, 3); }
+  async command bool Timer.isInterruptOn() { return READ_BIT(interrupt, 0); }
+
+  async command void Timer.allowStopMode(bool allow)
+  {
+    allow_stop_mode = allow;
+  }
+ 
+  // Forward the timer interrupt event.  
+  async event void IrqSignal.fired() { signal Timer.fired(); }
+
+  default async event void Timer.fired() { } 
+}
diff --git a/tos/chips/m16c62p/timer/M16c62pAlarm16C.nc b/tos/chips/m16c62p/timer/M16c62pAlarm16C.nc
new file mode 100755
index 00000000..72028940
--- /dev/null
+++ b/tos/chips/m16c62p/timer/M16c62pAlarm16C.nc
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Build a TEP102 16bits Alarm from a counter and a M16c62p hardware timers.
+ * Use the counter to get the "current time" and the hw timer to count down the
+ * remaining time for the alarm to be fired.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+generic module M16c62pAlarm16C(typedef precision_tag)
+{
+  provides interface Alarm<precision_tag, uint16_t> as Alarm @atmostonce();
+
+  uses interface HplM16c62pTimer as ATimer; // Alarm Timer
+  uses interface Counter<precision_tag, uint16_t>;
+}
+implementation
+{
+  uint16_t alarm = 0;
+  async command uint16_t Alarm.getNow()
+  {
+    return call Counter.get();
+  }
+
+  async command uint16_t Alarm.getAlarm()
+  {
+    return alarm;
+  }
+
+  async command bool Alarm.isRunning()
+  {
+    return call ATimer.isInterruptOn();
+  }
+
+  async command void Alarm.stop()
+  {
+    atomic
+    {
+      call ATimer.off();
+      call ATimer.disableInterrupt();
+    }
+  }
+
+  async command void Alarm.start( uint16_t dt ) 
+  {
+    call Alarm.startAt( call Alarm.getNow(), dt);
+  }
+
+  async command void Alarm.startAt( uint16_t t0, uint16_t dt )
+  {
+    atomic
+    {
+      uint16_t now, elapsed, expires;
+
+      now = call Alarm.getNow();
+      elapsed = now - t0;
+        
+      if (elapsed >= dt)
+      {
+        expires = 0;
+      }
+      else
+      {
+        expires = dt - elapsed - 1;
+      }
+        
+      call ATimer.off();
+      call ATimer.set(expires);
+      call ATimer.clearInterrupt();
+      call ATimer.enableInterrupt();
+      call ATimer.on();
+    }
+  }
+
+  async event void ATimer.fired()
+  {
+    call Alarm.stop();
+    signal Alarm.fired();
+  }
+
+  async event void Counter.overflow() {}
+}
diff --git a/tos/chips/m16c62p/timer/M16c62pAlarm32C.nc b/tos/chips/m16c62p/timer/M16c62pAlarm32C.nc
new file mode 100755
index 00000000..2e94821c
--- /dev/null
+++ b/tos/chips/m16c62p/timer/M16c62pAlarm32C.nc
@@ -0,0 +1,163 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Build a TEP102 32bit Alarm from a counter and two M16c62p hardware timers.
+ * Use the counter to get the "current time" and the hw timer to count down the
+ * remaining time for the alarm to be fired.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+generic module M16c62pAlarm32C(typedef precision_tag)
+{
+  provides interface Alarm<precision_tag, uint32_t> as Alarm @atmostonce();
+
+  uses interface HplM16c62pTimer as ATimerLow; // Alarm Timer low bits
+  uses interface HplM16c62pTimer as ATimerHigh; // Alarm Timer high bits
+  uses interface Counter<precision_tag, uint32_t>;
+}
+implementation
+{
+  uint32_t alarm = 0;
+
+  async command uint32_t Alarm.getNow()
+  {
+    return call Counter.get();
+  }
+
+  async command uint32_t Alarm.getAlarm()
+  {
+    atomic return alarm;
+  }
+
+  async command bool Alarm.isRunning()
+  {
+      return call ATimerLow.isInterruptOn() || call ATimerHigh.isInterruptOn();
+  }
+
+  async command void Alarm.stop()
+  {
+    atomic
+    {
+      call ATimerLow.off();
+      call ATimerLow.disableInterrupt();
+      call ATimerHigh.off();
+      call ATimerHigh.disableInterrupt();
+    }
+  }
+
+  async command void Alarm.start( uint32_t dt ) 
+  {
+    call Alarm.startAt( call Alarm.getNow(), dt);
+  }
+
+  async command void Alarm.startAt( uint32_t t0, uint32_t dt )
+  {
+    atomic
+    {
+      uint32_t now, elapsed, expires;
+
+      now = call Alarm.getNow();
+      elapsed = now - t0;
+        
+      if (elapsed >= dt)
+      {
+        expires = 0;
+      }
+      else
+      {
+        expires = dt - elapsed - 1;
+      }
+      
+      alarm = expires;
+
+      call Alarm.stop();
+      
+      if (expires <= 0xFFFF)
+      {
+        call ATimerLow.set((uint16_t)expires);
+        call ATimerLow.clearInterrupt();
+        call ATimerLow.enableInterrupt();
+        call ATimerLow.on();
+      }
+      else
+      {
+        uint16_t high_bits;
+
+        high_bits = expires >> 16;
+        call ATimerHigh.set(high_bits-1);
+        call ATimerHigh.clearInterrupt();
+        call ATimerHigh.enableInterrupt();
+        call ATimerHigh.on();
+        call ATimerLow.set(0xFFFF);
+        call ATimerLow.on();
+      }
+    }
+  }
+
+  async event void ATimerLow.fired()
+  {
+    call Alarm.stop();
+    signal Alarm.fired();
+  }
+  
+  async event void ATimerHigh.fired()
+  {
+    atomic
+    {
+      uint16_t remaining;
+      
+      call Alarm.stop();
+      
+      // All the high bits should have been cleared so only the
+      // low should remain.
+      remaining = (uint16_t)(alarm & 0xFFFF);
+      if (remaining != 0)
+      {
+        call ATimerLow.set(remaining);
+        call ATimerLow.clearInterrupt();
+        call ATimerLow.enableInterrupt();
+        call ATimerLow.on();
+      }
+      else
+      {
+        signal Alarm.fired();
+      }
+    }
+  }
+  async event void Counter.overflow() {}
+}
diff --git a/tos/chips/m16c62p/timer/M16c62pCounter16C.nc b/tos/chips/m16c62p/timer/M16c62pCounter16C.nc
new file mode 100755
index 00000000..9c97329b
--- /dev/null
+++ b/tos/chips/m16c62p/timer/M16c62pCounter16C.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Build a TEP102 16bits Counter from an M16c/62p hardware timer.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+generic module M16c62pCounter16C(typedef precision_tag)
+{
+  provides interface Counter<precision_tag, uint16_t> as Counter;
+  uses interface HplM16c62pTimer as Timer;
+}
+implementation
+{
+  async command uint16_t Counter.get()
+  {
+    // The timer counts down so the time needs to be inverted.
+    return (0xFFFF) - call Timer.get();
+  }
+
+  async command bool Counter.isOverflowPending()
+  {
+    return call Timer.testInterrupt();
+  }
+
+  async command void Counter.clearOverflow()
+  {
+    call Timer.clearInterrupt();
+  }
+
+  async event void Timer.fired()
+  {
+    signal Counter.overflow();
+  }
+}
+
diff --git a/tos/chips/m16c62p/timer/M16c62pCounter32C.nc b/tos/chips/m16c62p/timer/M16c62pCounter32C.nc
new file mode 100755
index 00000000..fb5c3b8f
--- /dev/null
+++ b/tos/chips/m16c62p/timer/M16c62pCounter32C.nc
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Build a TEP102 32 bit Counter from two M16c/62p hardware timers.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+generic module M16c62pCounter32C(typedef precision_tag)
+{
+  provides interface Counter<precision_tag, uint32_t> as Counter;
+  uses interface HplM16c62pTimer as TimerLow;
+  uses interface HplM16c62pTimer as TimerHigh;
+}
+implementation
+{
+  async command uint32_t Counter.get()
+  {
+    uint32_t time = 0;
+    atomic
+    {
+      time = (((uint32_t)call TimerHigh.get()) << 16) + call TimerLow.get();
+    }
+    // The timers count down so the time needs to be inverted.
+    return (0xFFFFFFFF) - time;
+  }
+
+  async command bool Counter.isOverflowPending()
+  {
+    return call TimerHigh.testInterrupt();
+  }
+
+  async command void Counter.clearOverflow()
+  {
+    call TimerHigh.clearInterrupt();
+  }
+
+  async event void TimerHigh.fired()
+  {
+    signal Counter.overflow();
+  }
+
+  async event void TimerLow.fired() {}
+}
+
diff --git a/tos/chips/m16c62p/timer/M16c62pTimer.h b/tos/chips/m16c62p/timer/M16c62pTimer.h
new file mode 100755
index 00000000..9f6786be
--- /dev/null
+++ b/tos/chips/m16c62p/timer/M16c62pTimer.h
@@ -0,0 +1,181 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+ /**
+  * This file contains structures and defines used together with timer
+  * interfaces and control.
+  * 
+  * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+  */
+
+#ifndef __M16C62PTIMER_H__
+#define __M16C62PTIMER_H__
+/*
+ * Precations when using Timer A1 and Timer A2.
+ * Read hardware manual page 139.
+ *
+ * Precations when using Timer B2.
+ * Read hardware manual page 156.
+ */
+
+enum
+{
+  TMR_TIMER_MODE,
+  TMR_COUNTER_MODE,
+  TMR_ONE_SHOT_MODE
+};
+
+
+/* Timer mode */
+typedef struct
+{
+  uint8_t output_pulse:1; // TAiMR: MR0 . TAiOUT pin is a pulse output pin if bit is set. No effect on TimerB.
+  uint8_t gate_func:2;    // TAiMR: MR1, MR2 [ NO_GATE | TAiIN_LOW | TAiIN_HIGH ] . No effect on TimerB.
+  uint8_t count_src:2;    // T*iMR: TCK0, TCK1 [ F1_2 | F8 | F32 | FC32 ]
+} st_timer;
+
+// "gate_func"
+enum
+{
+  M16C_TMR_TMR_GF_NO_GATE    = 0x0,
+  M16C_TMR_TMR_GF_TAiIN_LOW  = 0x2,
+  M16C_TMR_TMR_GF_TAiIN_HIGH = 0x3
+};
+
+
+/* TimerA Counter mode */
+typedef struct
+{
+  uint8_t two_phase_pulse_mode:1;   // Use two phase mode, only available for timers A2, A3 and A4, will be ignored else.
+  // Flags active in two-phase mode
+  uint8_t two_phase_processing:1;   // TAiMR: TCK1 [ NORMAL | MULTIPLY_BY_4 ] Only active for Timer A3.
+
+  // Flags active when not using two-phase mode.
+  uint8_t output_pulse:1;           // TAIMR: MR0 . TAiOUT is N-channel open drain output when bit is set.
+  uint8_t count_rising_edge:1;      // TAiMR: MR1 . Active when event_trigger = TAiIN
+  uint8_t up_down_switch:1;         // TAiMR: MR2 [ UDF | TAiOUT ]
+  uint8_t up_count:1;               // UDF: TAiUD . Active when up_down_switch = UDF
+  uint8_t event_source:2;           // ONSF/TRGS: TAiTG [ TAiIN | TB2 | TA_PREV | TA_NEXT ]
+
+  // Flags active in both modes
+  uint8_t operation_type:1;         // TAiMR: TCK0 [ RELOAD | FREE_RUN ]
+} sta_counter;
+
+// "operation_type"
+enum
+{
+  M16C_TMR_CTR_OT_RELOAD   = 0x0,
+  M16C_TMR_CTR_OT_FREE_RUN = 0x1
+};
+
+// "up_down_switch"
+enum
+{
+  M16C_TMR_CTR_UDS_UDF    = 0x0,
+  M16C_TMR_CTR_UDS_TAiOUT = 0x1
+};
+
+// "two_phase_processing"
+enum
+{
+  M16C_TMR_CTR_TPP_NORMAL        = 0x0,
+  M16C_TMR_CTR_TPP_MULTIPLY_BY_4 = 0x1
+};
+
+
+/* TimerA one shot mode. */
+typedef struct
+{
+  uint8_t output_pulse:1;           // TAiMR: MR0 . TAiOUT pin is a pulse output pin if bit is set.
+  uint8_t ext_trigger_rising_edge:1;// TAiMR: MR1 . Trigger on rising edge of input signal to TAiIN if bit is set. Active when TAiTG = 00b.
+  uint8_t trigger:1;                // TAiMR: MR2 [ TAiOS | TAiTG ]
+  uint8_t count_src:2;              // TAiMR: TCK0, TCK1 [ F1_2 | F8 | F32 | FC32 ]
+  uint8_t TAiTG_trigger_source:2;   // ONSF/TRGS: TAiTG [ TAiIN | TB2 | TA_PREV | TA_NEXT ]. Active if trigger = TAiTG
+} sta_one_shot;
+
+// "trigger"
+enum
+{
+  M16C_TMRA_OS_T_TAiOS = 0x00,
+  M16C_TMRA_OS_T_TAiTG = 0x01
+};
+
+
+
+/* TimerB Counter mode. */
+typedef struct
+{
+  uint8_t count_polarity:2;   // TBiMR: MR0, MR1 [ EXT_FALLING_EDGE | EXT_RISING_EDGE | EXT_BOTH ] . Effective if event_source = TBiIN.
+  uint8_t event_source:1;     // TBiMR: TCK1 [ TBiIN | TBj ] . j = i-1, except j = 2 if i = 0 and j = 5 if i = 3.
+} stb_counter;
+
+// "counter_polarity"
+enum
+{
+  M16C_TMRB_CTR_CP_EXT_FALLING_EDGE = 0x0,
+  M16C_TMRB_CTR_CP_EXT_RISING_EDGE  = 0x1,
+  M16C_TMRB_CTR_CP_EXT_BOTH         = 0x2,
+};
+
+// "event_source"
+enum
+{
+  M16C_TMRB_CTR_ES_TBiIN = 0x0,
+  M16C_TMRB_CTR_ES_TBj   = 0x1
+};
+
+
+/* Common settings */
+
+// TimerA One Shot "TAiTG_trigger_source" , TimerA Counter "event_source"
+enum
+{
+  M16C_TMRA_TES_TAiIN   = 0x0,
+  M16C_TMRA_TES_TB2     = 0x1,
+  M16C_TMRA_TES_TA_PREV = 0x2,
+  M16C_TMRA_TES_TA_NEXT = 0x3
+};
+
+// TimerA/B, TimerA One Shot : "count_src"
+enum 
+{
+  M16C_TMR_CS_F1_2 = 0x0,
+  M16C_TMR_CS_F8   = 0x1,
+  M16C_TMR_CS_F32  = 0x2,
+  M16C_TMR_CS_FC32 = 0x3
+};
+
+#endif  // __M16C62PTMR_H__
diff --git a/tos/chips/m16c62p/timer/M16c62pTimerAInitC.nc b/tos/chips/m16c62p/timer/M16c62pTimerAInitC.nc
new file mode 100755
index 00000000..9b0743bd
--- /dev/null
+++ b/tos/chips/m16c62p/timer/M16c62pTimerAInitC.nc
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Initialize an M16c/62p TimerA to a particular mode. Expected to be
+ * used at boot time.
+ * @param mode The desired mode of the timer.
+ * @param count_src Count source if applicable.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+ 
+#include "M16c62pTimer.h"
+
+generic module M16c62pTimerAInitC(uint8_t mode,
+                                  uint8_t count_src,
+                                  uint16_t reload,
+                                  bool enable_interrupt,
+                                  bool start,
+                                  bool allow_stop_mode)
+{
+  provides interface Init @atleastonce();
+  uses interface HplM16c62pTimerACtrl as TimerCtrl;
+  uses interface HplM16c62pTimer as Timer;
+}
+implementation
+{
+  command error_t Init.init()
+  {
+    st_timer timer = {0};
+    sta_counter counter = {0};
+    sta_one_shot one_shot = {0};
+
+    atomic
+    {
+      call Timer.allowStopMode(allow_stop_mode);
+      if (mode == TMR_TIMER_MODE)
+      {
+        timer.gate_func = M16C_TMR_TMR_GF_NO_GATE;
+        timer.count_src = count_src;
+
+        call TimerCtrl.setTimerMode(timer);
+        call Timer.set(reload);
+      }
+      else if (mode == TMR_COUNTER_MODE)
+      {
+        // 'tmp' only used for avoiding "large integer
+        // implicitly truncated to unsigned type" warning 
+        counter.event_source = count_src;
+
+        call TimerCtrl.setCounterMode(counter);
+        call Timer.set(reload);
+      }
+      else if (mode == TMR_ONE_SHOT_MODE)
+      {
+        one_shot.trigger = M16C_TMRA_OS_T_TAiOS;
+        one_shot.count_src = count_src;
+        call TimerCtrl.setOneShotMode(one_shot);
+      }
+      if (enable_interrupt)
+      {
+        call Timer.enableInterrupt();
+      }
+      if (start)
+      {
+        call Timer.on();
+      }
+
+    }
+    return SUCCESS;
+  }
+
+  async event void Timer.fired() {}
+}
diff --git a/tos/chips/m16c62p/timer/M16c62pTimerBInitC.nc b/tos/chips/m16c62p/timer/M16c62pTimerBInitC.nc
new file mode 100755
index 00000000..ccd606b8
--- /dev/null
+++ b/tos/chips/m16c62p/timer/M16c62pTimerBInitC.nc
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Initialize an M16c/62p TimerB to a particular mode. Expected to be
+ * used at boot time.
+ * @param mode The desired mode of the timer.
+ * @param count_src Count source if applicable.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+generic module M16c62pTimerBInitC(uint8_t mode,
+                                  uint8_t count_src,
+                                  uint16_t reload,
+                                  bool enable_interrupt,
+                                  bool start,
+                                  bool allow_stop_mode)
+{
+  provides interface Init @atleastonce();
+  uses interface HplM16c62pTimerBCtrl as TimerCtrl;
+  uses interface HplM16c62pTimer as Timer;
+}
+implementation
+{
+  command error_t Init.init()
+  {
+    uint8_t tmp;
+    error_t ret = SUCCESS;
+    st_timer timer = {0};
+    stb_counter counter = {0};
+
+    atomic
+    {
+      call Timer.allowStopMode(allow_stop_mode);
+      if (mode == TMR_TIMER_MODE)
+      {
+        timer.gate_func = M16C_TMR_TMR_GF_NO_GATE;
+        timer.count_src = count_src;
+
+        call TimerCtrl.setTimerMode(timer);
+        call Timer.set(reload);
+      }
+      else if (mode == TMR_COUNTER_MODE)
+      {
+        // 'tmp' only used for avoiding "large integer
+        // implicitly truncated to unsigned type" warning 
+        tmp =  count_src & 1; 
+        counter.event_source = tmp;
+
+        call TimerCtrl.setCounterMode(counter);
+        call Timer.set(reload);
+      }
+      else
+      {
+        ret = FAIL;
+      }
+      if (enable_interrupt)
+      {
+        call Timer.enableInterrupt();
+      }
+      if (start)
+      {
+        call Timer.on();
+      }
+    }
+    return ret;
+  }
+
+  async event void Timer.fired() {}
+}
diff --git a/tos/chips/m16c62p/uart/HplM16c62pUart.nc b/tos/chips/m16c62p/uart/HplM16c62pUart.nc
new file mode 100755
index 00000000..5df085d5
--- /dev/null
+++ b/tos/chips/m16c62p/uart/HplM16c62pUart.nc
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL interface for a M16c/62p uart.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ */
+ 
+#include "M16c62pUart.h"
+ 
+interface HplM16c62pUart {
+  async command void on();
+  async command void off();
+  async command error_t setSpeed(uart_speed_t speed);
+  async command uart_speed_t getSpeed();
+  async command void setParity(uart_parity_t parity);
+  async command uart_parity_t getParity();
+  async command void setStopBits(uart_stop_bits_t stop_bits);
+  async command uart_stop_bits_t getStopBits();
+  async command error_t enableTxInterrupt();
+  async command error_t disableTxInterrupt();
+  async command error_t enableRxInterrupt();
+  async command error_t disableRxInterrupt();
+  async command bool isTxEmpty();
+  async command bool isRxEmpty();
+  async command void tx( uint8_t data );
+  async event void txDone();
+  async command uint8_t rx();
+  async event void rxDone( uint8_t data );
+
+}
diff --git a/tos/chips/m16c62p/uart/HplM16c62pUartC.nc b/tos/chips/m16c62p/uart/HplM16c62pUartC.nc
new file mode 100755
index 00000000..f928c12f
--- /dev/null
+++ b/tos/chips/m16c62p/uart/HplM16c62pUartC.nc
@@ -0,0 +1,159 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay
+ */
+
+/**
+ * The M16c/62p uart ports.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+configuration HplM16c62pUartC
+{
+  provides
+  {
+    interface AsyncStdControl as Uart0TxControl;
+    interface AsyncStdControl as Uart0RxControl;
+    interface HplM16c62pUart as HplUart0;
+    
+    interface AsyncStdControl as Uart1TxControl;
+    interface AsyncStdControl as Uart1RxControl;
+    interface HplM16c62pUart as HplUart1;
+
+    interface AsyncStdControl as Uart2TxControl;
+    interface AsyncStdControl as Uart2RxControl;
+    interface HplM16c62pUart as HplUart2;
+  }
+}
+implementation
+{
+  components
+      HplM16c62pGeneralIOC as IOs,
+      HplM16c62pUartInterruptP as Irqs,
+      new HplM16c62pUartP(0,
+                          (uint16_t)&U0TB.BYTE.U0TBL,
+                          (uint16_t)&U0RB.BYTE.U0RBL,
+                          (uint16_t)&U0BRG,
+                          (uint16_t)&U0MR.BYTE,
+                          (uint16_t)&U0C0.BYTE,
+                          (uint16_t)&U0C1.BYTE,
+                          (uint16_t)&S0TIC.BYTE,
+                          (uint16_t)&S0RIC.BYTE) as HplUart0P,
+      new HplM16c62pUartP(1,
+                          (uint16_t)&U1TB.BYTE.U1TBL,
+                          (uint16_t)&U1RB.BYTE.U1RBL,
+                          (uint16_t)&U1BRG,
+                          (uint16_t)&U1MR.BYTE,
+                          (uint16_t)&U1C0.BYTE,
+                          (uint16_t)&U1C1.BYTE,
+                          (uint16_t)&S1TIC.BYTE,
+                          (uint16_t)&S1RIC.BYTE) as HplUart1P,
+      new HplM16c62pUartP(2,
+                          (uint16_t)&U2TB.BYTE.U2TBL,
+                          (uint16_t)&U2RB.BYTE.U2RBL,
+                          (uint16_t)&U2BRG,
+                          (uint16_t)&U2MR.BYTE,
+                          (uint16_t)&U2C0.BYTE,
+                          (uint16_t)&U2C1.BYTE,
+                          (uint16_t)&S2TIC.BYTE,
+                          (uint16_t)&S2RIC.BYTE) as HplUart2P;
+
+  components new StopModeControlC() as Uart0StopModeControl,
+             new StopModeControlC() as Uart1StopModeControl,
+             new StopModeControlC() as Uart2StopModeControl;
+  
+  Uart0TxControl = HplUart0P.UartTxControl;
+  Uart0RxControl = HplUart0P.UartRxControl;
+  HplUart0 = HplUart0P.HplUart;
+  HplUart0P.TxIO -> IOs.PortP63;
+  HplUart0P.RxIO -> IOs.PortP62;
+  HplUart0P.Irq -> Irqs.Uart0;
+  HplUart0P.StopModeControl -> Uart0StopModeControl;
+
+  Uart1TxControl = HplUart1P.UartTxControl;
+  Uart1RxControl = HplUart1P.UartRxControl;
+  HplUart1 = HplUart1P.HplUart;
+  HplUart1P.TxIO -> IOs.PortP67;
+  HplUart1P.RxIO -> IOs.PortP66;
+  HplUart1P.Irq -> Irqs.Uart1;
+  HplUart1P.StopModeControl -> Uart1StopModeControl;
+  
+  Uart2TxControl = HplUart2P.UartTxControl;
+  Uart2RxControl = HplUart2P.UartRxControl;
+  HplUart2 = HplUart2P.HplUart;
+  HplUart2P.TxIO -> IOs.PortP70;
+  HplUart2P.RxIO -> IOs.PortP71;
+  HplUart2P.Irq -> Irqs.Uart2;
+  HplUart2P.StopModeControl -> Uart2StopModeControl;
+  
+  
+#ifdef THREADS
+  components PlatformInterruptC;
+    Irqs.PlatformInterrupt -> PlatformInterruptC;
+#endif
+}
diff --git a/tos/chips/m16c62p/uart/HplM16c62pUartInterrupt.nc b/tos/chips/m16c62p/uart/HplM16c62pUartInterrupt.nc
new file mode 100755
index 00000000..44206f5b
--- /dev/null
+++ b/tos/chips/m16c62p/uart/HplM16c62pUartInterrupt.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface for interrupt signals from a uart.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+interface HplM16c62pUartInterrupt
+{
+  /** 
+   * Signal when an tx interrupt occurs.
+   */  
+  async event void tx();
+
+  /** 
+   * Signal when an rx interrupt occurs.
+   */  
+  async event void rx();
+}
+
diff --git a/tos/chips/m16c62p/uart/HplM16c62pUartInterruptP.nc b/tos/chips/m16c62p/uart/HplM16c62pUartInterruptP.nc
new file mode 100755
index 00000000..e8409e59
--- /dev/null
+++ b/tos/chips/m16c62p/uart/HplM16c62pUartInterruptP.nc
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * All uart interrupt vector handlers.
+ * These are wired in HplM16c62pUartC.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+module HplM16c62pUartInterruptP
+{
+  provides interface HplM16c62pUartInterrupt as Uart0;
+  provides interface HplM16c62pUartInterrupt as Uart1;
+  provides interface HplM16c62pUartInterrupt as Uart2;
+  
+#ifdef THREADS
+  uses interface PlatformInterrupt;
+#define POST_AMBLE() call PlatformInterrupt.postAmble()
+#else 
+#define POST_AMBLE()
+#endif 
+}
+implementation
+{
+  default async event void Uart0.tx() { } 
+  M16C_INTERRUPT_HANDLER(M16C_UART0_NACK)
+  {
+    signal Uart0.tx();
+    POST_AMBLE();
+  }
+
+  default async event void Uart0.rx() { } 
+  M16C_INTERRUPT_HANDLER(M16C_UART0_ACK)
+  {
+    signal Uart0.rx();
+    POST_AMBLE();
+  }
+
+
+  default async event void Uart1.tx() { } 
+  M16C_INTERRUPT_HANDLER(M16C_UART1_NACK)
+  {
+    signal Uart1.tx();
+    POST_AMBLE();
+  }
+
+  default async event void Uart1.rx() { } 
+  M16C_INTERRUPT_HANDLER(M16C_UART1_ACK)
+  {
+    signal Uart1.rx();
+    POST_AMBLE();
+  }
+
+
+  default async event void Uart2.tx() { } 
+  M16C_INTERRUPT_HANDLER(M16C_UART2_NACK)
+  {
+    signal Uart2.tx();
+    POST_AMBLE();
+  }
+
+  default async event void Uart2.rx() { } 
+  M16C_INTERRUPT_HANDLER(M16C_UART2_ACK)
+  {
+    signal Uart2.rx();
+    POST_AMBLE();
+  }
+}
diff --git a/tos/chips/m16c62p/uart/HplM16c62pUartP.nc b/tos/chips/m16c62p/uart/HplM16c62pUartP.nc
new file mode 100755
index 00000000..8040e8dd
--- /dev/null
+++ b/tos/chips/m16c62p/uart/HplM16c62pUartP.nc
@@ -0,0 +1,410 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+/**
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ */
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** 
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay
+ */
+
+
+/**
+ * Generic HPL module for a Uart port on the M16c/62p MCU.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+ 
+#include "M16c62pUart.h"
+ 
+generic module HplM16c62pUartP(uint8_t uartNr,
+                               uint16_t tx_addr,
+                               uint16_t rx_addr,
+                               uint16_t brg_addr,
+                               uint16_t mode_addr,
+                               uint16_t ctrl0_addr,
+                               uint16_t ctrl1_addr,
+                               uint16_t txInterrupt_addr,
+                               uint16_t rxInterrupt_addr)
+{
+  provides interface AsyncStdControl as UartTxControl;
+  provides interface AsyncStdControl as UartRxControl;
+  provides interface HplM16c62pUart as HplUart;
+  
+  uses interface GeneralIO as TxIO;
+  uses interface GeneralIO as RxIO;
+  uses interface HplM16c62pUartInterrupt as Irq;
+  uses interface StopModeControl;
+
+}
+implementation
+{
+#define txBuf (*TCAST(volatile uint8_t* ONE, tx_addr))
+#define rxBuf (*TCAST(volatile uint8_t* ONE, rx_addr))
+#define txInterrupt (*TCAST(volatile uint8_t* ONE, txInterrupt_addr))
+#define rxInterrupt (*TCAST(volatile uint8_t* ONE, rxInterrupt_addr))
+#define brg (*TCAST(volatile uint8_t* ONE, brg_addr))
+#define mode (*TCAST(volatile uint8_t* ONE, mode_addr))
+#define ctrl0 (*TCAST(volatile uint8_t* ONE, ctrl0_addr))
+#define ctrl1 (*TCAST(volatile uint8_t* ONE, ctrl1_addr))
+
+  enum {
+    ON,
+    OFF
+  };
+
+  uint8_t state = OFF;
+  uart_speed_t current_speed = TOS_UART_57600;
+  
+  async command void HplUart.on()
+  {
+    // Set 8 bit transfer
+    SET_BIT(mode, 0);
+    SET_BIT(mode, 2);
+    
+    //no cts/rts.
+    SET_BIT(ctrl0, 4);
+    atomic switch (current_speed)
+    {
+      case TOS_UART_300:
+      case TOS_UART_600:
+      case TOS_UART_1200:
+      case TOS_UART_2400:
+      case TOS_UART_4800:
+        SET_BIT(ctrl0, 0);
+        CLR_BIT(ctrl0, 1);
+        break;
+      case TOS_UART_9600:
+      case TOS_UART_19200:
+      case TOS_UART_38400:
+      case TOS_UART_57600:
+        CLR_BIT(ctrl0, 0);
+        CLR_BIT(ctrl0, 1);
+        break;
+      default:
+        break;
+    }
+    call StopModeControl.allowStopMode(false);
+    atomic state = ON;
+  }
+  
+  async command void HplUart.off()
+  {
+    CLR_BIT(mode, 0);
+    CLR_BIT(mode, 2);
+    call StopModeControl.allowStopMode(true);
+    atomic state = OFF;
+  }
+
+
+  async command error_t HplUart.setSpeed(uart_speed_t speed)
+  {
+    atomic if (state != OFF)
+    {
+      return FAIL;
+    }
+    
+    switch (speed)
+    {
+      // TODO(henrik) These values are based on a mcu that runs on MAIN_CRYSTAL_SPEED and doesn't
+      //              consider if the PLL is on which they should.
+
+      // Use Main clock divided by 8 for these
+      case TOS_UART_300:
+        brg = (uint8_t)(((MAIN_CRYSTAL_SPEED * 1000000.0 / (128.0 * 300.0))+ 0.5) - 1.0);
+        break;
+      case TOS_UART_600:
+        brg = (uint8_t)(((MAIN_CRYSTAL_SPEED * 1000000.0 / (128.0 * 600.0))+ 0.5) - 1.0);
+        break;
+      case TOS_UART_1200:
+        brg = (uint8_t)(((MAIN_CRYSTAL_SPEED * 1000000.0 / (128.0 * 1200.0))+ 0.5) - 1.0);
+        break;
+      case TOS_UART_2400:
+        brg = (uint8_t)(((MAIN_CRYSTAL_SPEED * 1000000.0 / (128.0 * 2400.0))+ 0.5) - 1.0);
+        break;
+      case TOS_UART_4800:
+        brg = (uint8_t)(((MAIN_CRYSTAL_SPEED * 1000000.0 / (128.0 * 4800.0))+ 0.5) - 1.0);
+        break;
+
+      // Use Main clock without division for these
+      case TOS_UART_9600:
+        brg = (uint8_t)(((MAIN_CRYSTAL_SPEED * 1000000.0 / (16.0 * 9600.0))+ 0.5) - 1.0);
+        break;
+      case TOS_UART_19200:
+        brg = (uint8_t)(((MAIN_CRYSTAL_SPEED * 1000000.0 / (16.0 * 19200.0))+ 0.5) - 1.0);
+        break;
+      case TOS_UART_38400:
+        brg = (uint8_t)(((MAIN_CRYSTAL_SPEED * 1000000.0 / (16.0 * 38400.0))+ 0.5) - 1.0);
+        break;
+      case TOS_UART_57600:
+        brg = (uint8_t)(((MAIN_CRYSTAL_SPEED * 1000000.0 / (16.0 * 57600.0))+ 0.5) - 1.0);
+        break;
+      default:
+        break;
+    }
+    atomic current_speed = speed;
+    return SUCCESS;
+  }
+  
+  async command uart_speed_t HplUart.getSpeed()
+  {
+    atomic return current_speed;
+  }
+  
+  async command void HplUart.setParity(uart_parity_t parity)
+  {
+    switch (parity)
+    {
+      case TOS_UART_PARITY_NONE:
+        CLR_BIT(mode, 6);
+        break;
+      case TOS_UART_PARITY_EVEN:
+        SET_BIT(mode, 6);
+        SET_BIT(mode, 5);
+        break;
+      case TOS_UART_PARITY_ODD:
+        SET_BIT(mode, 6);
+        CLR_BIT(mode, 5);
+        break;
+      default:
+        break;
+    }
+  }
+  
+  async command uart_parity_t HplUart.getParity()
+  {
+    if (READ_BIT(mode, 6) && READ_BIT(mode, 5))
+    {
+      return TOS_UART_PARITY_EVEN;
+    }
+    else if (READ_BIT(mode, 6))
+    {
+      return TOS_UART_PARITY_ODD;
+    }
+    else
+    {
+      return TOS_UART_PARITY_NONE;
+    }
+  }
+  
+  async command void HplUart.setStopBits(uart_stop_bits_t stop_bits)
+  {
+    switch (stop_bits)
+    {
+      case TOS_UART_STOP_BITS_1:
+        CLR_BIT(mode, 4);
+        break;
+      case TOS_UART_STOP_BITS_2:
+        SET_BIT(mode, 4);
+        break;
+      default:
+        break;
+    }
+  }
+  
+  async command uart_stop_bits_t HplUart.getStopBits()
+  {
+    if (READ_BIT(mode, 4))
+    {
+      return TOS_UART_STOP_BITS_2;
+    }
+    else
+    {
+      return TOS_UART_STOP_BITS_1;
+    }
+  }
+    
+
+  async command error_t UartTxControl.start()
+  {
+    call TxIO.makeOutput();
+    SET_BIT(ctrl1, 0);
+    return SUCCESS;
+  }
+
+  async command error_t UartTxControl.stop()
+  {
+    while (!READ_BIT(ctrl0, 3)); // If transmitting, wait for it to finish
+    call TxIO.makeInput();
+    CLR_BIT(ctrl1, 0);
+    return SUCCESS;
+  }
+
+  async command error_t UartRxControl.start()
+  {
+    call RxIO.makeInput();
+    SET_BIT(ctrl1, 2);
+    return SUCCESS;
+  }
+
+  async command error_t UartRxControl.stop()
+  {
+    CLR_BIT(ctrl1, 2);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart.enableTxInterrupt()
+  {
+    atomic
+    {
+      clear_interrupt(txInterrupt_addr);
+      SET_BIT(ctrl1, 1);
+      CLR_BIT(UCON.BYTE, uartNr);
+      SET_BIT(txInterrupt, 0);
+    }
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart.disableTxInterrupt()
+  {
+    CLR_BIT(txInterrupt, 0);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart.enableRxInterrupt()
+  { 
+    atomic
+    {
+      clear_interrupt(rxInterrupt_addr);
+      SET_BIT(rxInterrupt, 0);
+    }
+    return SUCCESS;
+  }
+
+  async command error_t HplUart.disableRxInterrupt()
+  {
+    CLR_BIT(rxInterrupt, 0);
+    return SUCCESS;
+  }
+  
+  async command bool HplUart.isTxEmpty()
+  {
+    return READ_BIT(ctrl1, 1);
+  }
+
+  async command bool HplUart.isRxEmpty()
+  {
+    return !READ_BIT(ctrl1, 3);
+  }
+  
+  async command uint8_t HplUart.rx()
+  {
+    return rxBuf;
+  }
+
+  async command void HplUart.tx(uint8_t data)
+  {
+      txBuf = data;
+  }
+  
+  async event void Irq.rx() 
+  {
+    if (!call HplUart.isRxEmpty()) {
+      signal HplUart.rxDone(call HplUart.rx());
+    }
+  }
+  
+  async event void Irq.tx()
+  {
+    signal HplUart.txDone();
+  }
+  
+  default async event void HplUart.txDone() {} 
+  default async event void HplUart.rxDone(uint8_t data) {}
+}
diff --git a/tos/chips/m16c62p/uart/M16c62pUart.h b/tos/chips/m16c62p/uart/M16c62pUart.h
new file mode 100644
index 00000000..c3fd0946
--- /dev/null
+++ b/tos/chips/m16c62p/uart/M16c62pUart.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * M16c62p UART typedefs.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#ifndef __M16C62P_UART_H__
+#define __M16C62P_UART_H__
+
+
+typedef enum {
+  TOS_UART_300,
+  TOS_UART_600,
+  TOS_UART_1200,
+  TOS_UART_2400,
+  TOS_UART_4800,
+  TOS_UART_9600,
+  TOS_UART_19200,
+  TOS_UART_38400,
+  TOS_UART_57600,
+} uart_speed_t;
+
+typedef enum {
+  TOS_UART_OFF,
+  TOS_UART_RONLY,
+  TOS_UART_TONLY,
+  TOS_UART_DUPLEX
+} uart_duplex_t;
+
+typedef enum {
+  TOS_UART_PARITY_NONE,
+  TOS_UART_PARITY_EVEN,
+  TOS_UART_PARITY_ODD
+}uart_parity_t;
+
+typedef enum {
+  TOS_UART_STOP_BITS_1,
+  TOS_UART_STOP_BITS_2
+} uart_stop_bits_t;
+
+
+#endif  // __M16C62P_UART_H__
+
diff --git a/tos/chips/m16c62p/uart/M16c62pUartC.nc b/tos/chips/m16c62p/uart/M16c62pUartC.nc
new file mode 100755
index 00000000..544b370d
--- /dev/null
+++ b/tos/chips/m16c62p/uart/M16c62pUartC.nc
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+/**
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ */
+
+/**
+ * HAL of the M16c/62p uarts.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+configuration M16c62pUartC
+{
+  provides interface UartByte as Uart0Byte;
+  provides interface UartStream as Uart0Stream;
+  provides interface UartControl as Uart0Control;
+  
+  provides interface UartByte as Uart1Byte;
+  provides interface UartStream as Uart1Stream;
+  provides interface UartControl as Uart1Control;
+  
+  provides interface UartByte as Uart2Byte;
+  provides interface UartStream as Uart2Stream;
+  provides interface UartControl as Uart2Control;
+}
+
+implementation
+{
+  components HplM16c62pUartC as HplUartC,
+             M16c62pUartCounterPlatformC as Counter;
+  
+  components new M16c62pUartP() as Uart0P;
+  Uart0Byte = Uart0P;
+  Uart0Stream = Uart0P;
+  Uart0Control = Uart0P;
+  Uart0P.Counter -> Counter;
+  
+  Uart0P.HplUartTxControl -> HplUartC.Uart0TxControl;
+  Uart0P.HplUartRxControl -> HplUartC.Uart0RxControl;
+  Uart0P.HplUart -> HplUartC.HplUart0;
+  
+  components new M16c62pUartP() as Uart1P;
+  Uart1Byte = Uart1P;
+  Uart1Stream = Uart1P;
+  Uart1Control = Uart1P;
+  Uart1P.Counter -> Counter;
+  
+  Uart1P.HplUartTxControl -> HplUartC.Uart1TxControl;
+  Uart1P.HplUartRxControl -> HplUartC.Uart1RxControl;
+  Uart1P.HplUart -> HplUartC.HplUart1;
+
+  components new M16c62pUartP() as Uart2P;
+  Uart2Byte = Uart2P;
+  Uart2Stream = Uart2P;
+  Uart2Control = Uart2P;
+  Uart2P.Counter -> Counter;
+  
+  Uart2P.HplUartTxControl -> HplUartC.Uart2TxControl;
+  Uart2P.HplUartRxControl -> HplUartC.Uart2RxControl;
+  Uart2P.HplUart -> HplUartC.HplUart2;
+  
+}
diff --git a/tos/chips/m16c62p/uart/M16c62pUartP.nc b/tos/chips/m16c62p/uart/M16c62pUartP.nc
new file mode 100755
index 00000000..4b397718
--- /dev/null
+++ b/tos/chips/m16c62p/uart/M16c62pUartP.nc
@@ -0,0 +1,418 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * Generic HAL uart for M16c/62p.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Philip Levis <pal@cs.stanford.edu>
+ */
+
+#include <Timer.h>
+#include "M16c62pUart.h"
+
+generic module M16c62pUartP()
+{  
+  provides interface UartByte;
+  provides interface UartStream;
+  provides interface UartControl;
+  
+  uses interface AsyncStdControl as HplUartTxControl;
+  uses interface AsyncStdControl as HplUartRxControl;
+  uses interface HplM16c62pUart as HplUart;
+  uses interface Counter<TMicro, uint16_t>;
+  
+}
+implementation
+{ 
+  norace uint16_t m_tx_len, m_rx_len;
+  norace uint8_t *m_tx_buf, *m_rx_buf;
+  norace uint16_t m_tx_pos, m_rx_pos;
+  norace uint16_t m_byte_time;
+  norace uint8_t m_rx_intr;
+  norace uint8_t m_tx_intr;
+  norace uart_duplex_t mode = TOS_UART_OFF;
+
+  async command error_t UartStream.enableReceiveInterrupt()
+  {
+    if (mode == TOS_UART_TONLY || mode == TOS_UART_OFF)
+    {
+      return FAIL;
+    }
+    
+    atomic
+    {
+      m_rx_intr = 3;
+      call HplUart.enableRxInterrupt();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.disableReceiveInterrupt()
+  {
+    if (mode == TOS_UART_TONLY || mode == TOS_UART_OFF)
+    {
+      return FAIL;
+    }
+    atomic
+    {
+      call HplUart.disableRxInterrupt();
+      m_rx_intr = 0;
+    }
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.receive( uint8_t* buf, uint16_t len )
+  {
+    if (mode == TOS_UART_TONLY || mode == TOS_UART_OFF)
+    {
+      return FAIL;
+    }
+    
+    if ( len == 0 )
+    {
+      return FAIL;
+    }
+    atomic
+    {
+      if ( m_rx_buf )
+      {
+        return EBUSY;
+      }
+      m_rx_buf = buf;
+      m_rx_len = len;
+      m_rx_pos = 0;
+      m_rx_intr |= 1;
+      call HplUart.enableRxInterrupt();
+    }
+    
+    return SUCCESS;
+    
+  }
+
+  async event void HplUart.rxDone( uint8_t data ) 
+  {
+    if ( m_rx_buf ) 
+    {
+      m_rx_buf[ m_rx_pos++ ] = data;
+      if ( m_rx_pos >= m_rx_len ) 
+      {
+        uint8_t* buf = m_rx_buf;
+        atomic
+        {
+          m_rx_buf = NULL;
+          if(m_rx_intr != 3)
+          {
+            call HplUart.disableRxInterrupt();
+            m_rx_intr = 0;
+          }
+        }  
+        signal UartStream.receiveDone( buf, m_rx_len, SUCCESS );
+      }
+    }
+    else 
+    {
+      signal UartStream.receivedByte( data );
+    }    
+  }
+
+  async command error_t UartStream.send( uint8_t *buf, uint16_t len)
+  {
+    if (mode == TOS_UART_RONLY || mode == TOS_UART_OFF)
+    {
+      return FAIL;
+    }
+    if ( len == 0 )
+      return FAIL;
+    else if ( m_tx_buf )
+      return EBUSY;
+    
+    m_tx_len = len;
+    m_tx_buf = buf;
+    m_tx_pos = 0;
+    m_tx_intr = 1;
+    call HplUart.enableTxInterrupt();
+    call HplUart.tx( buf[ m_tx_pos++ ] );
+    
+    return SUCCESS;
+  }
+
+  async event void HplUart.txDone() 
+  {
+    if ( m_tx_pos < m_tx_len ) 
+    {
+      call HplUart.tx( m_tx_buf[ m_tx_pos++ ] );
+    }
+    else 
+    {
+      uint8_t* buf = m_tx_buf;
+      m_tx_buf = NULL;
+      m_tx_intr = 0;
+      call HplUart.disableTxInterrupt();
+      signal UartStream.sendDone( buf, m_tx_len, SUCCESS );
+    }
+  }
+
+  async command error_t UartByte.send( uint8_t byte )
+  {
+    if (mode == TOS_UART_RONLY || mode == TOS_UART_OFF)
+    {
+      return FAIL;
+    }
+    if(m_tx_intr)
+      return FAIL;
+
+    call HplUart.tx( byte );
+    while ( !call HplUart.isTxEmpty() );
+    return SUCCESS;
+  }
+  
+  async command error_t UartByte.receive( uint8_t * byte, uint8_t timeout)
+  {
+    uint32_t timeout_micro32 = m_byte_time * timeout + 1;
+    uint16_t timeout_micro;
+    uint16_t start;
+    
+    if (mode == TOS_UART_TONLY || mode == TOS_UART_OFF)
+    {
+      return FAIL;
+    }
+    
+    if(m_rx_intr)
+    {
+      return FAIL;
+    }
+    
+    // The timeout clock is 16 bits and counts in TMicro. So a check to test that
+    // the total timeout value is smaller than 0xffff - <safty margin> is needed.
+    // TODO(henrik) Resolve this by lovering the clock speed used by the uart module
+    //              or make it 32 bits.
+    if(timeout_micro32 > 0xFFF0)
+    {
+      timeout_micro = 0xFFF0;
+    }
+    else
+    {
+      timeout_micro = (uint16_t) timeout_micro32;
+    }
+
+    start = call Counter.get();
+    while ( call HplUart.isRxEmpty() ) 
+    {
+      if ( ( (uint16_t)call Counter.get() - start ) >= timeout_micro )
+        return FAIL;
+    }
+    *byte = call HplUart.rx();
+    
+    return SUCCESS;
+    
+  }
+  
+  async command error_t UartControl.setSpeed(uart_speed_t speed)
+  {
+    if (mode != TOS_UART_OFF)
+    {
+      return FAIL;
+    }
+    switch (speed)
+    {
+      // TODO(henrik): This is not that good because we are repeating the
+      //               the switch statement over the baud rates here and in
+      //               two places in the HplM16c62pUartP.nc file. Which means
+      //               that if adding a new baudrate changes needs to be done in 3
+      //               places.
+      // 138us/byte @ 57600
+      case TOS_UART_300:
+        m_byte_time = 138 * 192;
+        break;
+      case TOS_UART_600:
+        m_byte_time = 138 * 96;
+        break;
+      case TOS_UART_1200:
+        m_byte_time = 138 * 48;
+        break;
+      case TOS_UART_2400:
+        m_byte_time = 138 * 24;
+        break;
+      case TOS_UART_4800:
+        m_byte_time = 138 * 12;
+        break;
+      case TOS_UART_9600:
+        m_byte_time = 138 * 6;
+        break;
+      case TOS_UART_19200:
+        m_byte_time = 138 * 3;
+        break;
+      case TOS_UART_38400:
+        m_byte_time = 138 * 1.5;
+        break;
+      case TOS_UART_57600:
+        m_byte_time = 138;
+        break;
+      default:
+        m_byte_time = 0xFFFF; // Set maximum value as default.
+        break;
+    }
+    return call HplUart.setSpeed(speed);
+  }
+
+  async command uart_speed_t UartControl.speed()
+  {
+    return call HplUart.getSpeed();
+  }
+  
+  async command error_t UartControl.setDuplexMode(uart_duplex_t duplex)
+  {
+    // Turn everything off
+    call HplUart.disableTxInterrupt();
+    call HplUart.disableRxInterrupt();
+    call HplUartTxControl.stop();
+    call HplUartRxControl.stop();
+    m_rx_intr = 0;
+    m_tx_intr = 0;
+
+    mode = duplex;
+    switch (duplex)
+    {
+      case TOS_UART_OFF:
+        call HplUart.off();
+        break;
+      case TOS_UART_RONLY:
+        call HplUart.on();
+        call HplUartRxControl.start();
+        break;
+      case TOS_UART_TONLY:
+        call HplUart.on();
+        call HplUartTxControl.start();
+        break;
+      case TOS_UART_DUPLEX:
+        call HplUart.on();
+        call HplUartTxControl.start();
+        call HplUartRxControl.start();
+        break;
+      default:
+        break;
+    }
+    
+    return SUCCESS;
+  }
+
+  async command uart_duplex_t UartControl.duplexMode()
+  {
+    atomic return mode;
+  }
+  
+  async command error_t UartControl.setParity(uart_parity_t parity)
+  {
+    if (mode != TOS_UART_OFF)
+    {
+      return FAIL;
+    }
+    call HplUart.setParity(parity);
+    return SUCCESS;
+  }
+
+  async command uart_parity_t UartControl.parity()
+  {
+    return call HplUart.getParity();
+  }
+  
+  async command error_t UartControl.setStop()
+  {
+    if (mode != TOS_UART_OFF)
+    {
+      return FAIL;
+    }
+    call HplUart.setStopBits(TOS_UART_STOP_BITS_2);
+    return SUCCESS;
+  }
+
+  async command error_t UartControl.setNoStop()
+  {
+    if (mode != TOS_UART_OFF)
+    {
+      return FAIL;
+    }
+    call HplUart.setStopBits(TOS_UART_STOP_BITS_1);
+    return SUCCESS;
+  }
+
+  async command bool UartControl.stopBits()
+  {
+    return (call HplUart.getStopBits() == TOS_UART_STOP_BITS_2);
+  }
+  
+  async event void Counter.overflow() {}
+
+  default async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ){}
+  default async event void UartStream.receivedByte( uint8_t byte ){}
+  default  async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ){}
+
+}
diff --git a/tos/chips/max136x/HalMAX136xAdvanced.nc b/tos/chips/max136x/HalMAX136xAdvanced.nc
new file mode 100644
index 00000000..48838091
--- /dev/null
+++ b/tos/chips/max136x/HalMAX136xAdvanced.nc
@@ -0,0 +1,57 @@
+/* $Id: HalMAX136xAdvanced.nc,v 1.4 2006-12-12 18:23:06 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "MAX136x.h"
+
+interface HalMAX136xAdvanced {
+  command error_t setScanMode(max136x_scanflag_t mode, uint8_t chanlow, uint8_t chanhigh);
+  event void setScanModeDone(error_t error);
+  command error_t setMonitorMode(uint8_t chanlow, uint8_t chanhigh, max136x_delayflag_t delay, uint8_t thresholds[12]); 
+  event void setMonitorModeDone(error_t error);
+  command error_t setConversionMode(bool bDifferential, bool bBipolar);
+  event void setConversionModeDone(error_t error);  
+  command error_t setClock(bool bExtClk);
+  event void setClockDone(error_t error); 
+  command error_t setRef(max136x_selflag_t sel, bool bInRefPwr);
+  event void setRefDone(error_t error);
+  command error_t getStatus();
+  event void getStatusDone(error_t error, uint8_t status, 
+                           max136x_data_t data);
+  command error_t enableAlert(bool bEnable);
+  event void enableAlertDone(error_t error);
+  event void alertThreshold();
+
+}
diff --git a/tos/chips/max136x/HalMAX136xControlP.nc b/tos/chips/max136x/HalMAX136xControlP.nc
new file mode 100644
index 00000000..9abf5aa1
--- /dev/null
+++ b/tos/chips/max136x/HalMAX136xControlP.nc
@@ -0,0 +1,275 @@
+/* $Id: HalMAX136xControlP.nc,v 1.4 2006-12-12 18:23:06 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "MAX136x.h"
+
+module HalMAX136xControlP {
+  provides interface HalMAX136xAdvanced;
+
+  uses interface Resource;
+  uses interface HplMAX136x;
+}
+
+implementation {
+  enum {
+    S_IDLE,
+    S_SETSCANMODE,
+    S_SETMONMODE,
+    S_SETCONVMODE,
+    S_SETCLK,
+    S_SETREF,
+    S_ENALERT,
+    S_GETSTATUS,
+  };
+  uint8_t state = S_IDLE;
+
+  uint8_t mI2CBuffer[8];
+  uint8_t configByteShadow = 0x01;
+  uint8_t setupByteShadow = 0x83; // 0x82 actually, but we want extended monitor write
+  uint8_t monitorByteShadow = 0x0;
+
+  error_t clientResult;
+
+  task void alert_Task() {
+    signal HalMAX136xAdvanced.alertThreshold();
+  }
+
+  task void signalDone_Task() {
+    switch(state) {
+    case S_SETSCANMODE:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalMAX136xAdvanced.setScanModeDone(clientResult);
+      break;
+    case S_SETMONMODE:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalMAX136xAdvanced.setMonitorModeDone(clientResult);
+      break;
+    case S_SETCONVMODE:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalMAX136xAdvanced.setConversionModeDone(clientResult);
+      break;
+    case S_SETCLK:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalMAX136xAdvanced.setClockDone(clientResult);
+      break;
+    case S_SETREF:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalMAX136xAdvanced.setRefDone(clientResult);
+      break;
+    case S_ENALERT:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalMAX136xAdvanced.enableAlertDone(clientResult);
+      break;
+    case S_GETSTATUS:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalMAX136xAdvanced.getStatusDone(clientResult, mI2CBuffer[0], 0);
+      break;
+    default:
+      break;
+    }
+  }
+
+  command error_t HalMAX136xAdvanced.setScanMode(max136x_scanflag_t mode, uint8_t chanlow, uint8_t chanhigh) {
+    // chanlow is always 0 no matter what client says
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETSCANMODE;
+
+    configByteShadow &= ~(MAX136X_CONFIG_SCAN(0x3) | MAX136X_CONFIG_CS(0xF));
+    configByteShadow |= MAX136X_CONFIG_SCAN(0x0);
+    configByteShadow |= MAX136X_CONFIG_CS(chanhigh);
+
+    mI2CBuffer[0] = configByteShadow;
+
+    call HplMAX136x.setConfig(mI2CBuffer, 1);
+    return SUCCESS;
+  }
+
+  command error_t HalMAX136xAdvanced.setMonitorMode(uint8_t chanlow, uint8_t chanhigh, max136x_delayflag_t delay, uint8_t thresholds[12]) {
+    // chanlow is always 0 no matter what client says
+    uint8_t i;
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETMONMODE;
+
+    configByteShadow &= ~(MAX136X_CONFIG_SCAN(0x3) | MAX136X_CONFIG_CS(0xF));
+    configByteShadow |= MAX136X_CONFIG_SCAN(0x2);
+    configByteShadow |= MAX136X_CONFIG_CS(chanhigh);
+
+    monitorByteShadow &= ~MAX136X_MONITOR_DELAY(7);
+    monitorByteShadow |= MAX136X_MONITOR_DELAY(delay);
+
+    mI2CBuffer[0] = configByteShadow;
+    mI2CBuffer[1] = setupByteShadow;
+    mI2CBuffer[2] = monitorByteShadow;
+    for(i = 0; i < 12; i++)
+      mI2CBuffer[i+3] = thresholds[i];
+    
+    call HplMAX136x.setConfig(mI2CBuffer, 15);
+    return SUCCESS;
+  } 
+
+  command error_t HalMAX136xAdvanced.setConversionMode(bool bDifferential, bool bBipolar) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETCONVMODE;
+
+    if(bDifferential)
+      configByteShadow &= ~MAX136X_CONFIG_SE;
+    else
+      configByteShadow |= MAX136X_CONFIG_SE;
+
+    if(bBipolar)
+      setupByteShadow |= MAX136X_SETUP_BIP;
+    else
+      setupByteShadow &= ~MAX136X_SETUP_BIP;
+
+    mI2CBuffer[0] = configByteShadow;
+    mI2CBuffer[1] = setupByteShadow;
+    call HplMAX136x.setConfig(mI2CBuffer, 2);
+    return SUCCESS;
+  }
+
+  command error_t HalMAX136xAdvanced.setClock(bool bExtClk) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETCLK;
+
+    if(bExtClk)
+      setupByteShadow |= MAX136X_SETUP_EXTCLK;
+    else
+      setupByteShadow &= ~MAX136X_SETUP_EXTCLK;
+
+    mI2CBuffer[0] = setupByteShadow;
+    call HplMAX136x.setConfig(mI2CBuffer, 1);
+    return SUCCESS;
+  }
+  
+  command error_t HalMAX136xAdvanced.setRef(max136x_selflag_t sel, bool bInRefPwr) {    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETREF;
+    
+    if(bInRefPwr)
+      setupByteShadow |= MAX136X_SETUP_INTREFOFF;
+    else
+      setupByteShadow &= ~MAX136X_SETUP_INTREFOFF;
+
+    setupByteShadow &=  ~MAX136X_SETUP_REFAIN3SEL(3);
+    setupByteShadow |= MAX136X_SETUP_REFAIN3SEL(sel);
+
+    mI2CBuffer[0] = setupByteShadow;
+    call HplMAX136x.setConfig(mI2CBuffer, 1);
+    return SUCCESS;
+  }
+
+  command error_t HalMAX136xAdvanced.getStatus() {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_GETSTATUS;
+    
+    return call HplMAX136x.readStatus(mI2CBuffer, 2);
+  }
+
+  command error_t HalMAX136xAdvanced.enableAlert(bool bEnable) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_ENALERT;
+
+    if(bEnable)
+      monitorByteShadow |= MAX136X_MONITOR_INTEN;
+    else
+      monitorByteShadow &= ~MAX136X_MONITOR_INTEN;
+
+    mI2CBuffer[0] = setupByteShadow;
+    mI2CBuffer[1] = (0xF0 | monitorByteShadow);
+    
+    call HplMAX136x.setConfig(mI2CBuffer, 2);
+    return SUCCESS;
+  }
+
+  event void Resource.granted() {
+    // intentionally left blank
+  }
+
+  async event void HplMAX136x.readStatusDone(error_t error, uint8_t* buf) {
+    clientResult = error;
+    post signalDone_Task();
+  }
+
+  async event void HplMAX136x.measureChannelsDone( error_t error, uint8_t *buf, uint8_t len ) { /* intentionally left blank */ }
+  async event void HplMAX136x.setConfigDone( error_t error , uint8_t *cfgbuf, uint8_t len) {
+    clientResult = error;
+    post signalDone_Task();
+  }
+  async event void HplMAX136x.alertThreshold() {
+    post alert_Task();
+  }
+}
diff --git a/tos/chips/max136x/HalMAX136xReaderP.nc b/tos/chips/max136x/HalMAX136xReaderP.nc
new file mode 100644
index 00000000..171dcad8
--- /dev/null
+++ b/tos/chips/max136x/HalMAX136xReaderP.nc
@@ -0,0 +1,87 @@
+/* $Id: HalMAX136xReaderP.nc,v 1.4 2006-12-12 18:23:06 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "MAX136x.h"
+
+generic module HalMAX136xReaderP()
+{
+  provides interface Read<max136x_data_t> as ADC;
+
+  uses interface HplMAX136x;
+  uses interface Resource as MAX136xResource;
+}
+
+implementation {
+
+  uint8_t channelBuf[2];
+  
+  command error_t ADC.read() {
+    return call MAX136xResource.request();
+  }
+
+  event void MAX136xResource.granted() {
+    error_t error;
+
+    error = call HplMAX136x.measureChannels(channelBuf, 2);
+    if (error) {
+      call MAX136xResource.release();
+      signal ADC.readDone(error,0);
+    }
+  }
+
+  async event void HplMAX136x.measureChannelsDone(error_t error,
+						  uint8_t *buf,
+						  uint8_t len)
+  {
+    uint16_t result = 0;
+    result = buf[0];
+    result <<= 8;
+    result += buf[1];
+    call MAX136xResource.release();
+    signal ADC.readDone(error,result);
+    return;
+  }
+
+  async event void HplMAX136x.setConfigDone(error_t error,
+					    uint8_t *cfgbuf,
+					    uint8_t len)
+  {
+    // intentionally left blank
+  }
+
+  async event void HplMAX136x.alertThreshold() {}
+  async event void HplMAX136x.readStatusDone(error_t error, uint8_t* buf) { }
+}
diff --git a/tos/chips/max136x/HplMAX136x.nc b/tos/chips/max136x/HplMAX136x.nc
new file mode 100644
index 00000000..a67ed39b
--- /dev/null
+++ b/tos/chips/max136x/HplMAX136x.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Hpl interface for the MAXIM 136x series ADC chips.
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $
+ */
+
+interface HplMAX136x {
+
+  command error_t measureChannels(uint8_t *buf,uint8_t len);
+  async event void measureChannelsDone( error_t error, uint8_t *buf, uint8_t len );
+
+  command error_t setConfig( uint8_t *cfgbuf, uint8_t len);
+  async event void setConfigDone( error_t error , uint8_t *cfgbuf, uint8_t len);
+  command error_t readStatus(uint8_t *buf, uint8_t len);
+  async event void readStatusDone(error_t error, uint8_t *buf);
+
+  async event void alertThreshold();
+
+}
diff --git a/tos/chips/max136x/HplMAX136xLogicP.nc b/tos/chips/max136x/HplMAX136xLogicP.nc
new file mode 100644
index 00000000..e5f8d68c
--- /dev/null
+++ b/tos/chips/max136x/HplMAX136xLogicP.nc
@@ -0,0 +1,228 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * MAX136xLogicP is the driver for the MAXIM 136x series ADC chip. 
+ * It requires an I2C packet interface and provides the HplMAX136x HPL
+ * interface.
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $
+ */
+
+#include "I2C.h"
+
+generic module HplMAX136xLogicP(uint16_t devAddr)
+{
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface HplMAX136x;
+
+  uses interface I2CPacket<TI2CBasicAddr>;
+  uses interface GpioInterrupt as InterruptAlert;
+  uses interface GeneralIO as InterruptPin;
+}
+
+implementation {
+
+  enum {
+    STATE_IDLE,
+    STATE_STARTING,
+    STATE_STOPPING,
+    STATE_STOPPED,
+    STATE_READCH,
+    STATE_SETCONFIG,
+    STATE_READSTATUS,
+    STATE_ERROR,
+  };
+
+  uint8_t mState;
+  bool mStopRequested;
+  norace error_t mSSError;
+
+  static error_t doWrite(uint8_t nextState, uint8_t *buf, uint8_t len) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) { 
+	mState = nextState;
+      }
+      else {
+	error = EBUSY; 
+      }
+    }
+    if (error)
+      return error;
+
+    error = call I2CPacket.write(I2C_START | I2C_STOP, devAddr,len,buf);
+    
+    if (error) 
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  static error_t doRead(uint8_t nextState, uint8_t *buf, uint8_t len) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = nextState;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    error = call I2CPacket.read(I2C_START | I2C_STOP, devAddr,len,buf);
+
+    if (error)
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  task void StartDone() {
+    atomic mState = STATE_IDLE;
+    signal SplitControl.startDone(SUCCESS);
+    return;
+  }
+
+  task void StopDone() {
+    atomic mState = STATE_STOPPED;
+    signal SplitControl.stopDone(mSSError);
+    return;
+  }
+
+  command error_t Init.init() {
+    call InterruptPin.makeInput();
+    call InterruptAlert.enableFallingEdge();
+    atomic {
+      mStopRequested = FALSE;
+      mState = STATE_STOPPED;
+    }
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.start() {
+    error_t error = SUCCESS;
+    atomic {
+      if (mState == STATE_STOPPED) { 
+	mState = STATE_STARTING;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error) 
+      return error;
+    
+    return post StartDone();
+  }
+
+  command error_t SplitControl.stop() {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = STATE_STOPPING;
+      }
+      else { 
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    return post StopDone();
+  }
+
+  command error_t HplMAX136x.readStatus(uint8_t *buf, uint8_t len) {
+    return doRead(STATE_READSTATUS,buf,len);
+  }
+  
+  command error_t HplMAX136x.measureChannels(uint8_t *buf, uint8_t len) { 
+    return doRead(STATE_READCH,buf,len);
+  }
+
+  command error_t HplMAX136x.setConfig(uint8_t *configbuf, uint8_t len) {
+    return doWrite(STATE_SETCONFIG,configbuf,len);
+  }
+
+  async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    error_t error = i2c_error;
+
+    switch (mState) {
+    case STATE_READCH:
+      mState = STATE_IDLE;
+      signal HplMAX136x.measureChannelsDone(error, buf, len);
+      break;
+    case STATE_READSTATUS:
+      mState = STATE_IDLE;
+      signal HplMAX136x.readStatusDone(error, buf);
+      break;
+    default:
+      mState = STATE_IDLE;
+      break;
+    }
+    return;
+  }
+
+  async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    error_t error = i2c_error;
+
+    switch (mState) {
+    case STATE_SETCONFIG:
+      mState = STATE_IDLE;
+      signal HplMAX136x.setConfigDone(error,buf,len);
+      break;
+    default:
+      mState = STATE_IDLE;
+      break;
+    }
+    return;
+  }
+
+  async event void InterruptAlert.fired() {
+    // This alert is decoupled from whatever state the MAX136x is in. 
+    // Upper layers must handle dealing with this alert appropriately.
+    signal HplMAX136x.alertThreshold();
+    return;
+  }
+
+  default event void SplitControl.startDone( error_t error ) { return; }
+  default event void SplitControl.stopDone( error_t error ) { return; }
+
+  default async event void HplMAX136x.alertThreshold(){ return; }
+
+}
diff --git a/tos/chips/max136x/MAX136x.h b/tos/chips/max136x/MAX136x.h
new file mode 100644
index 00000000..bf22df79
--- /dev/null
+++ b/tos/chips/max136x/MAX136x.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Types and definitions for the Maxim 136x general purpose ADC chip
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:06 $
+ */
+
+#ifndef _MAX136X_H
+#define _MAX136X_H
+
+#define MAX136X_CONFIG_SCAN(_x)		(((_x) & 0x3) << 5)
+#define MAX136X_CONFIG_CS(_x)		(((_x) & 0xF) << 1)
+#define MAX136X_CONFIG_SE		(1 << 0)
+
+#define MAX136X_SETUP_REFAIN3SEL(_x)	(((_x) & 0x3) << 5)
+#define MAX136X_SETUP_INTREFOFF		(1 << 4)
+#define MAX136X_SETUP_EXTCLK		(1 << 3)
+#define MAX136X_SETUP_BIP		(1 << 2)
+#define MAX136X_SETUP_NRESET		(1 << 1)
+#define MAX136X_SETUP_MONSETUP		(1 << 0)
+
+#define MAX136X_MONITOR_DELAY(_x)       (((_x) & 0x7) << 1)
+#define MAX136X_MONITOR_INTEN           (1 << 0)
+
+typedef uint16_t max136x_data_t;
+
+typedef enum {
+  MAX136X_SCAN_RANGE = 0,
+  MAX136X_SCAN_REPEATED = 1,
+  MAX136X_SCAN_SINGLE = 3,
+} max136x_scanflag_t;
+
+typedef enum {
+  MAX136X_SEL_VDDREF,  		// SEL1 = 0, SEL0 = 0
+  MAX136X_SEL_EXTREF,		// SEL1 = 0, SEL0 = 1
+  MAX136X_SEL_INTREF_AIN3IN,	// SEL1 = 1, SEL0 = 0
+  MAX136X_SEL_INTREF_AIN3OUT	// SEL1 = 1, SEL0 = 1
+} max136x_selflag_t;
+
+typedef enum {
+  MAX136X_DELAY_133_0,
+  MAX136X_DELAY_66_5,
+  MAX136X_DELAY_33_3,
+  MAX136X_DELAY_16_6,
+  MAX136X_DELAY_8_3,
+  MAX136X_DELAY_4_2,
+  MAX136X_DELAY_2_0,
+  MAX136X_DELAY_1_0
+} max136x_delayflag_t;
+
+
+#endif /* _MAX136X_H */
diff --git a/tos/chips/mm74hc595/MM74HC595C.nc b/tos/chips/mm74hc595/MM74HC595C.nc
new file mode 100644
index 00000000..a60c28ca
--- /dev/null
+++ b/tos/chips/mm74hc595/MM74HC595C.nc
@@ -0,0 +1,130 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, Data,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * This configuration provides 'virtual' output pins using the 
+ * mm74hc595 Serial-In Parallel-Out (SIPO) chip from Fairchild Semiconductor.
+ *
+ * This driver expects to find a HPL module called HplMM74HC595PinsC (that should 
+ * be implemented for a platform or sensorboard) providing GeneralIO interfaces for 
+ * the three physical pins of the MM74HC595 that it uses.
+ *
+ * These virtual output pins are presented as implementing the 
+ * GeneralIO interface. Calling GeneralIO.makeOutput() or GeneralIO.makeInput() 
+ * has no effect -- these pins are always outputs.
+ * 
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+configuration MM74HC595C {
+  provides interface GeneralIO as VirtualPin0; // Q_A on MM74HC595 datasheet
+  provides interface GeneralIO as VirtualPin1; // Q_B
+  provides interface GeneralIO as VirtualPin2; // Q_C
+  provides interface GeneralIO as VirtualPin3; // Q_D
+  provides interface GeneralIO as VirtualPin4; // Q_E
+  provides interface GeneralIO as VirtualPin5; // Q_F
+  provides interface GeneralIO as VirtualPin6; // Q_G
+  provides interface GeneralIO as VirtualPin7; // Q_H
+}
+implementation {
+
+  components MM74HC595ImplP, HplMM74HC595PinsC;
+  MM74HC595ImplP.Ser -> HplMM74HC595PinsC.Ser;
+  MM74HC595ImplP.Sck -> HplMM74HC595PinsC.Sck;
+  MM74HC595ImplP.Rck -> HplMM74HC595PinsC.Rck;
+
+  components MainC;
+  MainC.SoftwareInit -> MM74HC595ImplP.Init;
+
+  components BusyWaitMicroC;
+  MM74HC595ImplP.BusyWait -> BusyWaitMicroC;
+
+  components new MM74HC595P(0) as VPin0;
+  VPin0.set -> MM74HC595ImplP.set;
+  VPin0.get -> MM74HC595ImplP.get;
+  VPin0.toggle -> MM74HC595ImplP.toggle;
+  VPin0.clr -> MM74HC595ImplP.clr;
+  VirtualPin0 = VPin0;
+
+  components new MM74HC595P(1) as VPin1;
+  VPin1.set -> MM74HC595ImplP.set;
+  VPin1.get -> MM74HC595ImplP.get;
+  VPin1.toggle -> MM74HC595ImplP.toggle;
+  VPin1.clr -> MM74HC595ImplP.clr;
+  VirtualPin1 = VPin1;
+
+  components new MM74HC595P(2) as VPin2;
+  VPin2.set -> MM74HC595ImplP.set;
+  VPin2.get -> MM74HC595ImplP.get;
+  VPin2.toggle -> MM74HC595ImplP.toggle;
+  VPin2.clr -> MM74HC595ImplP.clr;
+  VirtualPin2 = VPin2;
+
+  components new MM74HC595P(3) as VPin3;
+  VPin3.set -> MM74HC595ImplP.set;
+  VPin3.get -> MM74HC595ImplP.get;
+  VPin3.toggle -> MM74HC595ImplP.toggle;
+  VPin3.clr -> MM74HC595ImplP.clr;
+  VirtualPin3 = VPin3;
+
+  components new MM74HC595P(4) as VPin4;
+  VPin4.set -> MM74HC595ImplP.set;
+  VPin4.get -> MM74HC595ImplP.get;
+  VPin4.toggle -> MM74HC595ImplP.toggle;
+  VPin4.clr -> MM74HC595ImplP.clr;
+  VirtualPin4 = VPin4;
+
+  components new MM74HC595P(5) as VPin5;
+  VPin5.set -> MM74HC595ImplP.set;
+  VPin5.get -> MM74HC595ImplP.get;
+  VPin5.toggle -> MM74HC595ImplP.toggle;
+  VPin5.clr -> MM74HC595ImplP.clr;
+  VirtualPin5 = VPin5;
+
+  components new MM74HC595P(6) as VPin6;
+  VPin6.set -> MM74HC595ImplP.set;
+  VPin6.get -> MM74HC595ImplP.get;
+  VPin6.toggle -> MM74HC595ImplP.toggle;
+  VPin6.clr -> MM74HC595ImplP.clr;
+  VirtualPin6 = VPin6;
+
+  components new MM74HC595P(7) as VPin7;
+  VPin7.set -> MM74HC595ImplP.set;
+  VPin7.get -> MM74HC595ImplP.get;
+  VPin7.toggle -> MM74HC595ImplP.toggle;
+  VPin7.clr -> MM74HC595ImplP.clr;
+  VirtualPin7 = VPin7;
+
+}
+  
diff --git a/tos/chips/mm74hc595/MM74HC595ImplP.nc b/tos/chips/mm74hc595/MM74HC595ImplP.nc
new file mode 100644
index 00000000..b5cddcde
--- /dev/null
+++ b/tos/chips/mm74hc595/MM74HC595ImplP.nc
@@ -0,0 +1,124 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * mm74hc595 driver internals.
+ * 
+ * @author Henri Dubois-Ferriere
+ *
+ */
+ 
+
+module MM74HC595ImplP
+{
+  provides interface Init @atleastonce();
+  provides async command void set(uint8_t pin);
+  provides async command bool get(uint8_t pin);
+  provides async command void clr(uint8_t pin);
+  provides async command void toggle(uint8_t pin);
+  uses interface GeneralIO as Ser;
+  uses interface GeneralIO as Rck;
+  uses interface GeneralIO as Sck;
+  uses interface BusyWait<TMicro, uint16_t>;
+}
+
+implementation
+{
+  enum {
+    npins = 8
+  };
+
+  uint8_t state;
+
+  void writeState() {
+    uint8_t i, s;    
+    atomic s = state;
+
+    call Rck.clr();
+    for (i = 0; i < npins; i++) {
+      call Sck.clr();
+      if (s & 0x80) {
+	call Ser.set();
+      } else {
+	call Ser.clr();
+      }
+      call Sck.set();
+      s <<= 1;
+    }
+    call Rck.set();
+    call Sck.clr();
+    call Ser.clr();
+    call Rck.clr();
+  }
+
+
+  command error_t Init.init() {
+    state  = 0;
+
+    call Ser.makeOutput();
+    call Sck.makeOutput();
+    call Rck.makeOutput();
+
+    call Sck.clr();
+    call Rck.clr();
+    call Ser.clr();
+    writeState();
+    return SUCCESS;
+  }
+
+
+  async command void set(uint8_t pin) {
+    atomic {
+      state |= (1 << pin);
+      writeState();
+    }
+  }
+
+  async command bool get(uint8_t pin) {
+    atomic return (state >> pin) & 1;
+  }
+
+  async command void clr(uint8_t pin) {
+    atomic {
+      state &=  ~(1 << pin);
+      writeState();
+    }
+  }
+
+  async command void toggle(uint8_t pin) {
+    if (call get(pin))
+      call clr(pin);
+    else
+      call set(pin);
+  }
+}  
diff --git a/tos/chips/mm74hc595/MM74HC595P.nc b/tos/chips/mm74hc595/MM74HC595P.nc
new file mode 100644
index 00000000..8d36e777
--- /dev/null
+++ b/tos/chips/mm74hc595/MM74HC595P.nc
@@ -0,0 +1,75 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, Data,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ * This is an internal module of the mm74hc595 Serial-In Parallel-Out (SIPO) driver.
+ * Do not wire to this -- use MM74HC595C instead.
+ *
+ */
+generic module MM74HC595P(uint8_t outaddr) 
+{
+  provides interface GeneralIO;
+  uses async command void set(uint8_t pin);
+  uses async command bool get(uint8_t pin);
+  uses async command void clr(uint8_t pin);
+  uses async command void toggle(uint8_t pin);
+
+}
+
+implementation
+{
+  async command void GeneralIO.set() {
+    call set(outaddr);
+  }
+  async command bool GeneralIO.get() {
+    return call get(outaddr);
+  }
+  async command void GeneralIO.clr() {
+    call clr(outaddr);
+  }
+  async command void GeneralIO.toggle() {
+    call toggle(outaddr);
+  }
+  async command void GeneralIO.makeInput() {
+  }
+  async command void GeneralIO.makeOutput() {
+  }
+
+  async command bool GeneralIO.isInput() {
+  }
+  async command bool GeneralIO.isOutput() {
+  }
+
+}  
diff --git a/tos/chips/mma7261qt/HplMMA7261QT.h b/tos/chips/mma7261qt/HplMMA7261QT.h
new file mode 100644
index 00000000..06f8e0db
--- /dev/null
+++ b/tos/chips/mma7261qt/HplMMA7261QT.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * MMA7261QT gSelect defines.
+ *
+ * @author Henrik Makitaavola
+ */
+
+#ifndef __HPLMMA7261QT_H__
+#define  __HPLMMA7261QT_H__
+
+typedef enum mm7261qt_gselect {
+  MMA7261QT_GSELECT_2_5G=0, //most sensitive
+  MMA7261QT_GSELECT_3_3G=1,
+  MMA7261QT_GSELECT_6_7G=2,
+  MMA7261QT_GSELECT_10_0G=3, //least sensitive
+} mm7261qt_gselect_t;
+
+#endif
+
diff --git a/tos/chips/mma7261qt/HplMMA7261QTControl.nc b/tos/chips/mma7261qt/HplMMA7261QTControl.nc
new file mode 100644
index 00000000..7f3e149a
--- /dev/null
+++ b/tos/chips/mma7261qt/HplMMA7261QTControl.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * MMA7261QT control interface.
+ *
+ * @author Henrik Makitaavola
+ */
+#include "HplMMA7261QT.h"
+
+interface HplMMA7261QTControl
+{
+  async command void on();
+  async command void off();
+  async command void gSelect( mm7261qt_gselect_t val);
+}
diff --git a/tos/chips/mma7261qt/HplMMA7261QTControlC.nc b/tos/chips/mma7261qt/HplMMA7261QTControlC.nc
new file mode 100644
index 00000000..aee31a05
--- /dev/null
+++ b/tos/chips/mma7261qt/HplMMA7261QTControlC.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * MMA7261QT control component.
+ *
+ * @author Henrik Makitaavola
+ */
+
+configuration HplMMA7261QTControlC
+{
+  provides interface HplMMA7261QTControl;
+}
+implementation
+{
+  components HplMMA7261QTControlP, HplMMA7261QTC;
+  
+  HplMMA7261QTControlP.Sleep -> HplMMA7261QTC.Sleep;
+  HplMMA7261QTControlP.GSelect1 -> HplMMA7261QTC.GSelect1;
+  HplMMA7261QTControlP.GSelect2 -> HplMMA7261QTC.GSelect2;
+  
+  HplMMA7261QTControl = HplMMA7261QTControlP;
+}
diff --git a/tos/chips/mma7261qt/HplMMA7261QTControlP.nc b/tos/chips/mma7261qt/HplMMA7261QTControlP.nc
new file mode 100644
index 00000000..79b4d41a
--- /dev/null
+++ b/tos/chips/mma7261qt/HplMMA7261QTControlP.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * MMA7261QT control.
+ *
+ * @author Henrik Makitaavola
+ */
+#include "HplMMA7261QT.h"
+
+module HplMMA7261QTControlP
+{
+  provides interface HplMMA7261QTControl;
+  
+  uses interface GeneralIO as Sleep;
+  uses interface GeneralIO as GSelect1;
+  uses interface GeneralIO as GSelect2;
+}
+implementation
+{
+  async command void HplMMA7261QTControl.on()
+  {
+    call Sleep.set();
+    call GSelect1.clr();
+    call GSelect2.clr();
+
+  }
+  
+  async command void HplMMA7261QTControl.off()
+  {
+    call GSelect1.clr();
+    call GSelect2.clr();
+    call Sleep.clr();
+  }
+  
+  async command void HplMMA7261QTControl.gSelect( mm7261qt_gselect_t val)
+  {
+    if(val & 1)
+      call GSelect1.set();
+    else 
+      call GSelect1.clr();
+
+    if(val & 2)
+      call GSelect2.set();
+    else
+      call GSelect2.clr();
+  }
+}
diff --git a/tos/chips/mma7261qt/HplMMA7261QTReaderC.nc b/tos/chips/mma7261qt/HplMMA7261QTReaderC.nc
new file mode 100644
index 00000000..a9bdb26a
--- /dev/null
+++ b/tos/chips/mma7261qt/HplMMA7261QTReaderC.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * MMA7261QT reader.
+ *
+ * @author Henrik Makitaavola
+ */
+
+configuration HplMMA7261QTReaderC
+{
+  provides interface Read<uint16_t> as AccelX;
+  provides interface Read<uint16_t> as AccelY;
+  provides interface Read<uint16_t> as AccelZ;
+}
+implementation
+{
+  components HplMMA7261QTC;
+  
+  AccelX = HplMMA7261QTC.AccelX;
+  AccelY = HplMMA7261QTC.AccelY;
+  AccelZ = HplMMA7261QTC.AccelZ;
+}
diff --git a/tos/chips/msp430/McuSleepC.nc b/tos/chips/msp430/McuSleepC.nc
new file mode 100644
index 00000000..7c4fabc8
--- /dev/null
+++ b/tos/chips/msp430/McuSleepC.nc
@@ -0,0 +1,138 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Implementation of TEP 112 (Microcontroller Power Management) for
+ * the MSP430. Code for low power calculation copied from older
+ * msp430hardware.h by Vlado Handziski, Joe Polastre, and Cory Sharp.
+ *
+ *
+ * @author Philip Levis
+ * @author Vlado Handziski
+ * @author Joe Polastre
+ * @author Cory Sharp
+ * @date   October 26, 2005
+ * @see  Please refer to TEP 112 for more information about this component and its
+ *          intended use.
+ *
+ */
+
+module McuSleepC @safe() {
+  provides {
+    interface McuSleep;
+    interface McuPowerState;
+  }
+  uses {
+    interface McuPowerOverride;
+  }
+}
+implementation {
+  bool dirty = TRUE;
+  mcu_power_t powerState = MSP430_POWER_ACTIVE;
+
+  /* Note that the power values are maintained in an order
+   * based on their active components, NOT on their values.*/
+  // NOTE: This table should be in progmem.
+  const uint16_t msp430PowerBits[MSP430_POWER_LPM4 + 1] = {
+    0,                                       // ACTIVE
+    SR_CPUOFF,                               // LPM0
+    SR_SCG0+SR_CPUOFF,                       // LPM1
+    SR_SCG1+SR_CPUOFF,                       // LPM2
+    SR_SCG1+SR_SCG0+SR_CPUOFF,               // LPM3
+    SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF,     // LPM4
+  };
+    
+  mcu_power_t getPowerState() {
+    mcu_power_t pState = MSP430_POWER_LPM4;
+    // TimerA, USART0, USART1 check
+    if ((((TACCTL0 & CCIE) ||
+	  (TACCTL1 & CCIE) ||
+	  (TACCTL2 & CCIE)) &&
+	 ((TACTL & TASSEL_3) == TASSEL_2)) ||
+	((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1)) ||
+	((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1))
+#ifdef __msp430_have_usart0_with_i2c
+	 // registers end in "nr" to prevent nesC race condition detection
+	 || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) &&
+	     (I2CDCTLnr & I2CBUSY) && (U0CTLnr & SYNC) && (U0CTLnr & I2C))
+#endif
+	)
+      pState = MSP430_POWER_LPM1;
+    
+#ifdef __msp430_have_adc12
+    // ADC12 check, pre-condition: pState != MSP430_POWER_ACTIVE
+    if (ADC12CTL0 & ADC12ON){
+      if (ADC12CTL1 & ADC12SSEL_2){
+        // sample or conversion operation with MCLK or SMCLK
+        if (ADC12CTL1 & ADC12SSEL_1)
+          pState = MSP430_POWER_LPM1;
+        else
+          pState = MSP430_POWER_ACTIVE;
+      } else if ((ADC12CTL1 & SHS0) && ((TACTL & TASSEL_3) == TASSEL_2)){
+        // Timer A is used as sample-and-hold source and SMCLK sources Timer A
+        // (Timer A interrupts are always disabled when it is used by the 
+        // ADC subsystem, that's why the Timer check above is not enough)
+	      pState = MSP430_POWER_LPM1;
+      }
+    }
+#endif
+    
+    return pState;
+  }
+  
+  void computePowerState() {
+    powerState = mcombine(getPowerState(),
+			  call McuPowerOverride.lowestState());
+  }
+  
+  async command void McuSleep.sleep() {
+    uint16_t temp;
+    if (dirty) {
+      computePowerState();
+      //dirty = 0;
+    }
+    temp = msp430PowerBits[powerState] | SR_GIE;
+    __asm__ __volatile__( "bis  %0, r2" : : "m" (temp) );
+    // All of memory may change at this point...
+    asm volatile ("" : : : "memory");
+    __nesc_disable_interrupt();
+  }
+
+  async command void McuPowerState.update() {
+    atomic dirty = 1;
+  }
+
+ default async command mcu_power_t McuPowerOverride.lowestState() {
+   return MSP430_POWER_LPM4;
+ }
+
+}
diff --git a/tos/chips/msp430/adc12/AdcP.nc b/tos/chips/msp430/adc12/AdcP.nc
new file mode 100644
index 00000000..0a1c1166
--- /dev/null
+++ b/tos/chips/msp430/adc12/AdcP.nc
@@ -0,0 +1,194 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.8 $
+ * $Date: 2008-06-27 18:05:23 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+module AdcP @safe() {
+  provides {
+    interface Read<uint16_t> as Read[uint8_t client];
+    interface ReadNow<uint16_t> as ReadNow[uint8_t client];
+    interface Resource as ResourceReadNow[uint8_t client];
+  }
+  uses {
+    // for Read only:
+    interface Resource as ResourceRead[uint8_t client];
+    // for ReadNow only:
+    interface Resource as SubResourceReadNow[uint8_t client];
+    // for Read and ReadNow:
+    interface AdcConfigure<const msp430adc12_channel_config_t*> as Config[uint8_t client];
+    interface Msp430Adc12SingleChannel as SingleChannel[uint8_t client];
+  }
+}
+implementation
+{
+  enum {
+    STATE_READ,
+    STATE_READNOW,
+    STATE_READNOW_INVALID_CONFIG,
+  };
+  
+  // Resource interface / arbiter makes norace declaration safe
+  norace uint8_t state;
+  norace uint8_t owner;
+  norace uint16_t value;
+
+  error_t configure(uint8_t client)
+  {
+    error_t result = EINVAL;
+    const msp430adc12_channel_config_t * ONE config;
+    config = call Config.getConfiguration[client]();
+    if (config->inch != INPUT_CHANNEL_NONE)
+      result = call SingleChannel.configureSingle[client](config);
+    return result;
+  }
+
+  command error_t Read.read[uint8_t client]()
+  {
+    return call ResourceRead.request[client]();
+  }
+
+  event void ResourceRead.granted[uint8_t client]() 
+  {
+    // signalled only for Read.read()
+    error_t result = configure(client);
+    if (result == SUCCESS){
+      state = STATE_READ;
+      result = call SingleChannel.getData[client]();
+    } else {
+      call ResourceRead.release[client]();
+      signal Read.readDone[client](result, 0);
+    }
+  }
+  
+  async command error_t ResourceReadNow.request[uint8_t nowClient]()
+  {
+    return call SubResourceReadNow.request[nowClient]();
+  }
+
+  event void SubResourceReadNow.granted[uint8_t nowClient]()
+  {
+    if (configure(nowClient) == SUCCESS)
+      state = STATE_READNOW;
+    else
+      state = STATE_READNOW_INVALID_CONFIG;
+    signal ResourceReadNow.granted[nowClient]();
+  }
+
+  async command error_t ResourceReadNow.immediateRequest[uint8_t nowClient]()
+  {
+    error_t result = call SubResourceReadNow.immediateRequest[nowClient]();
+    if (result == SUCCESS){
+      result = configure(nowClient);
+      if (result == SUCCESS)
+        state = STATE_READNOW;
+    }
+    return result;
+  }
+
+  async command error_t ResourceReadNow.release[uint8_t nowClient]()
+  {
+    return call SubResourceReadNow.release[nowClient]();
+  }
+
+  async command bool ResourceReadNow.isOwner[uint8_t nowClient]()
+  {
+    return call SubResourceReadNow.isOwner[nowClient]();
+  }
+    
+  async command error_t ReadNow.read[uint8_t nowClient]()
+  {
+    if (state == STATE_READNOW_INVALID_CONFIG)
+      return EINVAL;
+    else
+      return call SingleChannel.getData[nowClient]();
+  }
+  
+  void task readDone()
+  {
+    call ResourceRead.release[owner]();
+    signal Read.readDone[owner](SUCCESS, value);
+  }
+
+  async event error_t SingleChannel.singleDataReady[uint8_t client](uint16_t data)
+  {
+    switch (state)
+    {
+      case STATE_READ:
+        owner = client;
+        value = data;
+        post readDone();
+        break;
+      case STATE_READNOW:
+        signal ReadNow.readDone[client](SUCCESS, data);
+        break;
+      default:
+        // error !
+        break;
+    }
+    return SUCCESS;
+  }
+
+  async event uint16_t* SingleChannel.multipleDataReady[uint8_t client](
+      uint16_t *buf, uint16_t numSamples)
+  {
+    // error !
+    return 0;
+  }
+
+  default async command error_t ResourceRead.request[uint8_t client]() { return FAIL; }
+  default async command error_t ResourceRead.immediateRequest[uint8_t client]() { return FAIL; }
+  default async command error_t ResourceRead.release[uint8_t client]() { return FAIL; }
+  default async command bool ResourceRead.isOwner[uint8_t client]() { return FALSE; }
+  default event void Read.readDone[uint8_t client]( error_t result, uint16_t val ){}
+
+  default async command error_t SubResourceReadNow.release[uint8_t nowClient](){ return FAIL;}
+  default async command error_t SubResourceReadNow.request[uint8_t nowClient](){ return FAIL; }
+  default async command bool SubResourceReadNow.isOwner[uint8_t client]() { return FALSE; }
+  default event void ResourceReadNow.granted[uint8_t nowClient](){}
+  default async event void ReadNow.readDone[uint8_t client]( error_t result, uint16_t val ){}
+  default async command error_t SubResourceReadNow.immediateRequest[uint8_t nowClient]() { return FAIL; }
+  default async command error_t SingleChannel.getData[uint8_t client]()
+  {
+    return EINVAL;
+  }
+
+  const msp430adc12_channel_config_t defaultConfig = {INPUT_CHANNEL_NONE,0,0,0,0,0,0,0}; 
+  default async command const msp430adc12_channel_config_t*
+    Config.getConfiguration[uint8_t client]()
+  { 
+    return &defaultConfig;
+  }  
+  default async command error_t SingleChannel.configureSingle[uint8_t client](
+      const msp430adc12_channel_config_t *config){ return FAIL; }
+  
+} 
diff --git a/tos/chips/msp430/adc12/AdcReadClientC.nc b/tos/chips/msp430/adc12/AdcReadClientC.nc
new file mode 100644
index 00000000..e4d42c21
--- /dev/null
+++ b/tos/chips/msp430/adc12/AdcReadClientC.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:06 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * This component virtualizes the HIL of ADC12 on MSP430. A client must wire
+ * <code>AdcConfigure</code> to a component that returns the client's adc
+ * configuration data.
+ *
+ * @author Jan Hauer 
+ * @see  Please refer to the README.txt and TEP 101 for more information about 
+ * this component and its intended use.
+ */
+
+#include <Msp430Adc12.h>
+generic configuration AdcReadClientC() {
+  provides interface Read<uint16_t>;
+  uses interface AdcConfigure<const msp430adc12_channel_config_t*>;
+} implementation {
+  components AdcP,
+#ifdef REF_VOLT_AUTO_CONFIGURE     
+             // if the client configuration requires a stable 
+             // reference voltage, the reference voltage generator 
+             // is automatically enabled
+             new Msp430Adc12ClientAutoRVGC() as Msp430AdcClient;
+#else
+             new Msp430Adc12ClientC() as Msp430AdcClient;
+#endif
+
+  enum {
+    CLIENT = unique(ADCC_SERVICE),
+  };
+
+  Read = AdcP.Read[CLIENT];
+  AdcConfigure = AdcP.Config[CLIENT];
+  AdcP.SingleChannel[CLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel;
+  AdcP.ResourceRead[CLIENT] -> Msp430AdcClient.Resource;
+#ifdef REF_VOLT_AUTO_CONFIGURE
+  AdcConfigure = Msp430AdcClient.AdcConfigure;
+#endif 
+}
+  
diff --git a/tos/chips/msp430/adc12/AdcReadNowClientC.nc b/tos/chips/msp430/adc12/AdcReadNowClientC.nc
new file mode 100644
index 00000000..8f32cd72
--- /dev/null
+++ b/tos/chips/msp430/adc12/AdcReadNowClientC.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:07 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * This component virtualizes the HIL of ADC12 on MSP430. A client must wire
+ * <code>AdcConfigure</code> to a component that returns the client's adc
+ * configuration data.
+ *
+ * @author Jan Hauer 
+ * @see  Please refer to the README.txt and TEP 101 for more information about 
+ * this component and its intended use.
+ */
+
+#include <Msp430Adc12.h>
+generic configuration AdcReadNowClientC() {
+  provides {
+    interface Resource;
+    interface ReadNow<uint16_t>;
+  }
+  uses interface AdcConfigure<const msp430adc12_channel_config_t*>;
+} implementation {
+  components AdcP,
+#ifdef REF_VOLT_AUTO_CONFIGURE     
+             // if the client configuration requires a stable 
+             // reference voltage, the reference voltage generator 
+             // is automatically enabled
+             new Msp430Adc12ClientAutoRVGC() as Msp430AdcClient;
+#else
+             new Msp430Adc12ClientC() as Msp430AdcClient;
+#endif
+  
+  enum {
+    CLIENT = unique(ADCC_SERVICE),
+  };
+
+  ReadNow = AdcP.ReadNow[CLIENT];
+  AdcConfigure = AdcP.Config[CLIENT];
+  AdcP.SingleChannel[CLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel;
+  Resource = AdcP.ResourceReadNow[CLIENT];
+  
+  AdcP.SubResourceReadNow[CLIENT] -> Msp430AdcClient.Resource;
+#ifdef REF_VOLT_AUTO_CONFIGURE
+  AdcConfigure = Msp430AdcClient.AdcConfigure;
+#endif 
+}
+
diff --git a/tos/chips/msp430/adc12/AdcReadStreamClientC.nc b/tos/chips/msp430/adc12/AdcReadStreamClientC.nc
new file mode 100644
index 00000000..27c81c7f
--- /dev/null
+++ b/tos/chips/msp430/adc12/AdcReadStreamClientC.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2008-04-07 09:41:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * This component virtualizes the HIL of ADC12 on MSP430. A client must wire
+ * <code>AdcConfigure</code> to a component that returns the client's adc
+ * configuration data.
+ *
+ * @author Jan Hauer 
+ * @see  Please refer to the README.txt and TEP 101 for more information about 
+ * this component and its intended use.
+ */
+
+#include <Msp430Adc12.h>
+generic configuration AdcReadStreamClientC() {
+  provides interface ReadStream<uint16_t>;
+  uses interface AdcConfigure<const msp430adc12_channel_config_t*>;
+} implementation {
+  components WireAdcStreamP, 
+#ifdef REF_VOLT_AUTO_CONFIGURE     
+             // if the client configuration requires a stable 
+             // reference voltage, the reference voltage generator 
+             // is automatically enabled
+             new Msp430Adc12ClientAutoRVGC() as Msp430AdcClient;
+  AdcConfigure = Msp430AdcClient.AdcConfigure;
+#else
+             new Msp430Adc12ClientC() as Msp430AdcClient;
+#endif
+
+  enum {
+    RSCLIENT = unique(ADCC_READ_STREAM_SERVICE),
+  };
+
+  ReadStream = WireAdcStreamP.ReadStream[RSCLIENT];
+  AdcConfigure = WireAdcStreamP.AdcConfigure[RSCLIENT];
+  WireAdcStreamP.Resource[RSCLIENT] -> Msp430AdcClient.Resource;
+  WireAdcStreamP.Msp430Adc12SingleChannel[RSCLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel;
+}
+  
diff --git a/tos/chips/msp430/adc12/AdcStreamP.nc b/tos/chips/msp430/adc12/AdcStreamP.nc
new file mode 100644
index 00000000..18d499da
--- /dev/null
+++ b/tos/chips/msp430/adc12/AdcStreamP.nc
@@ -0,0 +1,330 @@
+/* $Id: AdcStreamP.nc,v 1.6 2008-11-10 14:56:12 janhauer Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Convert MSP430 HAL A/D interface to the HIL interfaces (adapted atmega code).
+ * @author David Gay
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ */
+#include "Timer.h"
+
+module AdcStreamP @safe() {
+  provides {
+    interface Init @atleastonce();
+    interface ReadStream<uint16_t>[uint8_t client];
+  }
+  uses {
+    interface Msp430Adc12SingleChannel as SingleChannel[uint8_t client];
+    interface AdcConfigure<const msp430adc12_channel_config_t*>[uint8_t client];
+    interface Alarm<TMilli, uint32_t>;
+  }
+}
+implementation {
+  enum {
+    NSTREAM = uniqueCount(ADCC_READ_STREAM_SERVICE)
+  };
+
+  /* Resource reservation is required, and it's incorrect to call getData
+     again before dataReady is signaled, so there are no races in correct
+     programs */
+  norace uint8_t client = NSTREAM;
+
+  /* Stream data */
+  struct list_entry_t {
+    uint16_t count;
+    struct list_entry_t * ONE_NOK next;
+  };
+  struct list_entry_t *bufferQueue[NSTREAM];
+  struct list_entry_t * ONE_NOK * bufferQueueEnd[NSTREAM];
+  uint16_t * COUNT_NOK(lastCount) lastBuffer, lastCount;
+
+  norace uint16_t count;
+  norace uint16_t * COUNT_NOK(count) buffer; 
+  norace uint16_t * BND_NOK(buffer, buffer+count) pos;
+  norace uint32_t now, period;
+  norace bool periodModified;
+
+
+  command error_t Init.init() {
+    uint8_t i;
+
+    for (i = 0; i != NSTREAM; i++)
+      bufferQueueEnd[i] = &bufferQueue[i];
+
+    return SUCCESS;
+  }
+
+  void sampleSingle() {
+    call SingleChannel.getData[client]();
+  }
+
+  error_t postBuffer(uint8_t c, uint16_t *buf, uint16_t n)
+  {
+    if (n < sizeof(struct list_entry_t))
+      return ESIZE;
+    atomic
+    {
+      struct list_entry_t * ONE newEntry = TCAST(struct list_entry_t * ONE, buf);
+
+      if (!bufferQueueEnd[c]) // Can't post right now.
+        return FAIL;
+
+      newEntry->count = n;
+      newEntry->next = NULL;
+      *bufferQueueEnd[c] = newEntry;
+      bufferQueueEnd[c] = &newEntry->next;
+    }
+    return SUCCESS;
+  }
+
+  command error_t ReadStream.postBuffer[uint8_t c](uint16_t *buf, uint16_t n) {
+    return postBuffer(c, buf, n);
+  }
+
+  task void readStreamDone() {
+    uint8_t c = client;
+    uint32_t actualPeriod = period;
+    if (periodModified)
+      actualPeriod = period - (period % 1000);
+
+    atomic
+    {
+      bufferQueue[c] = NULL;
+      bufferQueueEnd[c] = &bufferQueue[c];
+    }
+
+    client = NSTREAM;
+    signal ReadStream.readDone[c](SUCCESS, actualPeriod);
+  }
+
+  task void readStreamFail() {
+    /* By now, the pending bufferDone has been signaled (see readStream). */
+    struct list_entry_t *entry;
+    uint8_t c = client;
+
+    atomic entry = bufferQueue[c];
+    for (; entry; entry = entry->next) {
+      uint16_t tmp_count __DEPUTY_UNUSED__ = entry->count;
+      signal ReadStream.bufferDone[c](FAIL, TCAST(uint16_t * COUNT_NOK(tmp_count),entry), entry->count);
+    }
+
+    atomic
+    {
+      bufferQueue[c] = NULL;
+      bufferQueueEnd[c] = &bufferQueue[c];
+    }
+
+    client = NSTREAM;
+    signal ReadStream.readDone[c](FAIL, 0);
+  }
+
+  task void bufferDone() {
+    uint16_t *b, c;
+    atomic
+    {
+      b = lastBuffer;
+      c = lastCount;
+      lastBuffer = NULL;
+    }
+
+    signal ReadStream.bufferDone[client](SUCCESS, b, c);
+  }
+
+  void nextAlarm() {
+    call Alarm.startAt(now, period);
+    now += period;
+  }
+
+  async event void Alarm.fired() {
+    sampleSingle();
+  }
+
+  error_t nextBuffer(bool startNextAlarm) {
+    atomic
+    {
+      struct list_entry_t *entry = bufferQueue[client];
+
+      if (!entry)
+      {
+        // all done
+        bufferQueueEnd[client] = NULL; // prevent post
+        post readStreamDone();
+        return FAIL;
+      }
+      else
+      {
+        uint16_t tmp_count;
+        bufferQueue[client] = entry->next;
+        if (!bufferQueue[client])
+          bufferQueueEnd[client] = &bufferQueue[client];
+	pos = buffer = NULL;
+        count = entry->count;
+        tmp_count = count;
+	pos = buffer = TCAST(uint16_t * COUNT_NOK(tmp_count), entry);
+        if (startNextAlarm)
+          nextAlarm();
+        return SUCCESS;
+      }
+    }
+  }
+
+  void nextMultiple(uint8_t c)
+  {
+    if (nextBuffer(FALSE) == SUCCESS){
+      msp430adc12_channel_config_t config = *call AdcConfigure.getConfiguration[c]();
+      config.sampcon_ssel = SAMPCON_SOURCE_SMCLK; // assumption: SMCLK runs at 1 MHz
+      config.sampcon_id = SAMPCON_CLOCK_DIV_1; 
+      if (call SingleChannel.configureMultiple[c]( &config, pos, count, period) == SUCCESS)
+        call SingleChannel.getData[c]();
+      else {
+        postBuffer(c, pos, count);
+        post readStreamFail();
+      }
+    }
+  }
+
+  command error_t ReadStream.read[uint8_t c](uint32_t usPeriod)
+  {
+    if (usPeriod & 0xFFFF0000){
+      // "manual" sampling
+      period = usPeriod / 1000;
+      periodModified = TRUE;
+      client = c;
+      now = call Alarm.getNow();
+      call SingleChannel.configureSingle[c](call AdcConfigure.getConfiguration[c]());
+      if (nextBuffer(FALSE) == SUCCESS)
+        sampleSingle();
+    } else {
+      period = usPeriod;
+      periodModified = FALSE;
+      client = c;
+      nextMultiple(c);
+    }
+    return SUCCESS;
+  }
+
+
+  async event error_t SingleChannel.singleDataReady[uint8_t streamClient](uint16_t data)
+  {
+    if (client == NSTREAM)
+      return FAIL;
+
+    if (count == 0)
+    {
+      now = call Alarm.getNow();
+      nextBuffer(TRUE);
+    }
+    else
+    {
+      *pos++ = data;
+      if (pos == buffer + count)
+      {
+        atomic
+        {
+          if (lastBuffer)
+          {
+            /* We failed to signal bufferDone in time. Fail. */
+            bufferQueueEnd[client] = NULL; // prevent post
+            post readStreamFail();
+            return FAIL;
+          }
+          else
+          {
+	    lastCount = count;
+            lastBuffer = buffer;
+          }
+        }
+        post bufferDone();
+        nextBuffer(TRUE);
+      }
+      else
+        nextAlarm();
+    }
+    return FAIL;
+  }
+  
+  async event uint16_t* SingleChannel.multipleDataReady[uint8_t streamClient](
+      uint16_t *buf, uint16_t length)
+  {
+    atomic
+    {
+      if (lastBuffer)
+      {
+        /* We failed to signal bufferDone in time. Fail. */
+        bufferQueueEnd[client] = NULL; // prevent post
+        post readStreamFail();
+        return 0;
+      }
+      else
+      {
+        lastBuffer = buffer;
+        lastCount = pos - buffer;
+      }
+    }
+    post bufferDone();
+    nextMultiple(streamClient);
+    return 0;
+  }
+
+  const msp430adc12_channel_config_t defaultConfig = {
+      inch: SUPPLY_VOLTAGE_HALF_CHANNEL,
+      sref: REFERENCE_VREFplus_AVss,
+      ref2_5v: REFVOLT_LEVEL_1_5,
+      adc12ssel: SHT_SOURCE_ACLK,
+      adc12div: SHT_CLOCK_DIV_1,
+      sht: SAMPLE_HOLD_4_CYCLES,
+      sampcon_ssel: SAMPCON_SOURCE_SMCLK,
+      sampcon_id: SAMPCON_CLOCK_DIV_1
+  };
+  default async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration[uint8_t c]()
+  { 
+    return &defaultConfig;
+  }
+  default async command error_t SingleChannel.configureMultiple[uint8_t c](
+      const msp430adc12_channel_config_t *config, uint16_t b[], 
+      uint16_t numSamples, uint16_t jiffies)
+  {
+    return FAIL;
+  }
+  default async command error_t SingleChannel.getData[uint8_t c]()
+  {
+    return FAIL;
+  }  
+  default async command error_t SingleChannel.configureSingle[uint8_t c](
+      const msp430adc12_channel_config_t *config){ return FAIL; }
+}
diff --git a/tos/chips/msp430/adc12/HplAdc12.nc b/tos/chips/msp430/adc12/HplAdc12.nc
new file mode 100644
index 00000000..3b568781
--- /dev/null
+++ b/tos/chips/msp430/adc12/HplAdc12.nc
@@ -0,0 +1,136 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2008-05-22 17:45:00 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+        
+/**
+ * The HplAdc12 interface exports low-level access to the ADC12 registers
+ * of the MSP430 MCU.
+ *
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+#include <Msp430Adc12.h>
+interface HplAdc12
+{
+  /** 
+   * Sets the ADC12 control register ADC12CTL0.
+   * @param control0 ADC12CTL0 register data.
+   **/
+  async command void setCtl0(adc12ctl0_t control0); 
+  
+  /** 
+   * Sets the ADC12 control register ADC12CTL1. 
+   * @param control1 ADC12CTL1 register data.
+   **/
+  async command void setCtl1(adc12ctl1_t control1);
+
+  /** 
+   * Returns the ADC12 control register ADC12CTL0.
+   * @return ADC12CTL0
+   **/
+  async command adc12ctl0_t getCtl0(); 
+
+  /** Returns the ADC12 control register ADC12CTL1. 
+   *  @return ADC12CTL1
+   **/
+  async command adc12ctl1_t getCtl1(); 
+  
+  /** 
+   * Sets the ADC12 conversion memory control register ADC12MCTLx.
+   * @param idx The register index (the 'x' in ADC12MCTLx) [0..15] 
+   * @param memControl ADC12MCTLx register data.
+   */
+  async command void setMCtl(uint8_t idx, adc12memctl_t memControl); 
+  
+  /** 
+   * Returns the ADC12 conversion memory control register ADC12MCTLx.
+   * @param idx The register index (the 'x' in ADC12MCTLx) [0..15] 
+   * @return memControl ADC12MCTLx register data.
+   */
+  async command adc12memctl_t getMCtl(uint8_t idx); 
+
+  /** 
+   * Returns the ADC12 conversion memory register ADC12MEMx.
+   * @param idx The register index (the 'x' in ADC12MEMx) [0..15] 
+   * @return ADC12MEMx 
+   */  
+  async command uint16_t getMem(uint8_t idx); 
+
+  /** 
+   * Sets the ADC12 interrupt enable register, ADC12IE.
+   * @param mask Bitmask (0 means interrupt disabled, 1 menas interrupt enabled) 
+   */
+  async command void setIEFlags(uint16_t mask); 
+
+  /** 
+   * Returns the ADC12 interrupt enable register, ADC12IE.
+   * @return ADC12IE
+   */  
+  async command uint16_t getIEFlags(); 
+  
+  /** 
+   * Resets the ADC12 interrupt flag register, ADC12IFG.
+   */
+  async command void resetIFGs(); 
+
+  /** 
+   * Signals a conversion result. 
+   * @param iv ADC12 interrupt vector value 0x6, 0x8, ... , 0x24
+   */ 
+  async event void conversionDone(uint16_t iv);
+
+  /** 
+   * Returns the ADC12 BUSY flag.
+   * @return ADC12BUSY 
+   */ 
+  async command bool isBusy();
+
+  /**
+   * Stops a conversion.
+   */
+  async command void stopConversion();
+
+  /**
+   * Starts a conversion.
+   */
+  async command void startConversion();
+
+  /**
+   * Enables conversion (sets the ENC bit).
+   */
+  async command void enableConversion();
+
+}
+
diff --git a/tos/chips/msp430/adc12/HplAdc12P.nc b/tos/chips/msp430/adc12/HplAdc12P.nc
new file mode 100644
index 00000000..9d8b3210
--- /dev/null
+++ b/tos/chips/msp430/adc12/HplAdc12P.nc
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.9 $
+ * $Date: 2009-10-17 11:48:33 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * The HplAdc12 interface exports low-level access to the ADC12 registers
+ * of the MSP430 MCU.
+ *
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+module HplAdc12P {
+  provides interface HplAdc12;
+}
+implementation
+{
+ 
+  MSP430REG_NORACE(ADC12CTL0);
+  MSP430REG_NORACE(ADC12CTL1);
+  MSP430REG_NORACE(ADC12IFG);
+  MSP430REG_NORACE(ADC12IE);
+  MSP430REG_NORACE(ADC12IV);
+
+  DEFINE_UNION_CAST(int2adc12ctl0,adc12ctl0_t,uint16_t)
+  DEFINE_UNION_CAST(int2adc12ctl1,adc12ctl1_t,uint16_t)
+  DEFINE_UNION_CAST(adc12ctl0cast2int,uint16_t,adc12ctl0_t)
+  DEFINE_UNION_CAST(adc12ctl1cast2int,uint16_t,adc12ctl1_t)
+  DEFINE_UNION_CAST(adc12memctl2int,uint8_t,adc12memctl_t)
+  DEFINE_UNION_CAST(int2adc12memctl,adc12memctl_t,uint8_t)
+  
+  async command void HplAdc12.setCtl0(adc12ctl0_t control0){
+    ADC12CTL0 = adc12ctl0cast2int(control0); 
+  }
+  
+  async command void HplAdc12.setCtl1(adc12ctl1_t control1){
+    ADC12CTL1 = adc12ctl1cast2int(control1); 
+  }
+  
+  async command adc12ctl0_t HplAdc12.getCtl0(){ 
+    return int2adc12ctl0(ADC12CTL0); 
+  }
+  
+  async command adc12ctl1_t HplAdc12.getCtl1(){
+    return int2adc12ctl1(ADC12CTL1); 
+  }
+  
+  async command void HplAdc12.setMCtl(uint8_t i, adc12memctl_t memCtl){
+    ADC12MCTL[i] = adc12memctl2int(memCtl);
+  }
+   
+  async command adc12memctl_t HplAdc12.getMCtl(uint8_t i){
+    return int2adc12memctl(ADC12MCTL[i]);
+  }  
+  
+  async command uint16_t HplAdc12.getMem(uint8_t i){
+    return ADC12MEM[i];
+  }
+
+  async command void HplAdc12.setIEFlags(uint16_t mask){ ADC12IE = mask; } 
+  async command uint16_t HplAdc12.getIEFlags(){ return ADC12IE; } 
+  
+  async command void HplAdc12.resetIFGs(){ 
+    ADC12IV = 0; 
+    ADC12IFG = 0;
+  } 
+  
+  async command void HplAdc12.startConversion(){ 
+    ADC12CTL0 |= ADC12ON; 
+    ADC12CTL0 |= (ADC12SC + ENC); 
+  }
+  
+  async command void HplAdc12.stopConversion(){
+    // stop conversion mode immediately, conversion data is unreliable
+    uint16_t ctl1 = ADC12CTL1;
+    ADC12CTL1 &= ~(CONSEQ0 | CONSEQ1);
+    ADC12CTL0 &= ~(ADC12SC + ENC); 
+    ADC12CTL0 &= ~(ADC12ON);
+    ADC12CTL1 |= (ctl1 & (CONSEQ0 | CONSEQ1));
+  }
+  
+  async command void HplAdc12.enableConversion(){ 
+    ADC12CTL0 |= ENC; 
+  }
+    
+  async command bool HplAdc12.isBusy(){ return (ADC12CTL1 & ADC12BUSY); }
+
+  TOSH_SIGNAL(ADC_VECTOR) {
+    signal HplAdc12.conversionDone(ADC12IV);
+  }
+}
+
diff --git a/tos/chips/msp430/adc12/Msp430Adc12.h b/tos/chips/msp430/adc12/Msp430Adc12.h
new file mode 100644
index 00000000..929cce87
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12.h
@@ -0,0 +1,182 @@
+/* 
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2007-06-25 15:47:14 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+ 
+#ifndef MSP430ADC12_H
+#define MSP430ADC12_H
+#include "Msp430RefVoltGenerator.h"
+
+#define ADC12_TIMERA_ENABLED
+#define ADC12_P6PIN_AUTO_CONFIGURE
+#define ADC12_CHECK_ARGS
+//#define ADC12_ONLY_WITH_DMA
+
+// for HIL clients 
+#define REF_VOLT_AUTO_CONFIGURE
+
+typedef struct { 
+  // see README.txt
+  unsigned int inch: 4;            // input channel 
+  unsigned int sref: 3;            // reference voltage 
+  unsigned int ref2_5v: 1;         // reference voltage level 
+  unsigned int adc12ssel: 2;       // clock source sample-hold-time 
+  unsigned int adc12div: 3;        // clock divider sample-hold-time 
+  unsigned int sht: 4;             // sample-hold-time
+  unsigned int sampcon_ssel: 2;    // clock source sampcon signal 
+  unsigned int sampcon_id: 2;      // clock divider sampcon 
+  unsigned int : 0;                // align to a word boundary 
+} msp430adc12_channel_config_t;
+
+typedef struct 
+{
+  // see README.txt
+  volatile unsigned
+  inch: 4,                                     // input channel
+  sref: 3,                                     // reference voltage
+  eos: 1;                                      // end of sequence flag
+} __attribute__ ((packed)) adc12memctl_t;
+
+enum inch_enum
+{  
+   // see device specific data sheet which pin Ax is mapped to
+   INPUT_CHANNEL_A0 = 0,                    // input channel A0 
+   INPUT_CHANNEL_A1 = 1,                    // input channel A1
+   INPUT_CHANNEL_A2 = 2,                    // input channel A2
+   INPUT_CHANNEL_A3 = 3,                    // input channel A3
+   INPUT_CHANNEL_A4 = 4,                    // input channel A4
+   INPUT_CHANNEL_A5 = 5,                    // input channel A5
+   INPUT_CHANNEL_A6 = 6,                    // input channel A6
+   INPUT_CHANNEL_A7 = 7,                    // input channel A7
+   EXTERNAL_REF_VOLTAGE_CHANNEL = 8,        // VeREF+ (input channel 8)
+   REF_VOLTAGE_NEG_TERMINAL_CHANNEL = 9,    // VREF-/VeREF- (input channel 9)
+   TEMPERATURE_DIODE_CHANNEL = 10,          // Temperature diode (input channel 10)
+   SUPPLY_VOLTAGE_HALF_CHANNEL = 11,        // (AVcc-AVss)/2 (input channel 11-15)
+   INPUT_CHANNEL_NONE = 12                  // illegal (identifies invalid settings)
+};
+
+enum sref_enum
+{
+   REFERENCE_AVcc_AVss = 0,                 // VR+ = AVcc   and VR-= AVss
+   REFERENCE_VREFplus_AVss = 1,             // VR+ = VREF+  and VR-= AVss
+   REFERENCE_VeREFplus_AVss = 2,            // VR+ = VeREF+ and VR-= AVss
+   REFERENCE_AVcc_VREFnegterm = 4,          // VR+ = AVcc   and VR-= VREF-/VeREF- 
+   REFERENCE_VREFplus_VREFnegterm = 5,      // VR+ = VREF+  and VR-= VREF-/VeREF-   
+   REFERENCE_VeREFplus_VREFnegterm = 6      // VR+ = VeREF+ and VR-= VREF-/VeREF-
+};
+
+enum ref2_5v_enum
+{
+  REFVOLT_LEVEL_1_5 = 0,                    // reference voltage of 1.5 V
+  REFVOLT_LEVEL_2_5 = 1,                    // reference voltage of 2.5 V
+  REFVOLT_LEVEL_NONE = 0,                   // if e.g. AVcc is chosen 
+};
+
+enum adc12ssel_enum
+{
+   SHT_SOURCE_ADC12OSC = 0,                // ADC12OSC
+   SHT_SOURCE_ACLK = 1,                    // ACLK
+   SHT_SOURCE_MCLK = 2,                    // MCLK
+   SHT_SOURCE_SMCLK = 3                    // SMCLK
+};
+
+enum adc12div_enum
+{
+   SHT_CLOCK_DIV_1 = 0,                         // ADC12 clock divider of 1
+   SHT_CLOCK_DIV_2 = 1,                         // ADC12 clock divider of 2
+   SHT_CLOCK_DIV_3 = 2,                         // ADC12 clock divider of 3
+   SHT_CLOCK_DIV_4 = 3,                         // ADC12 clock divider of 4
+   SHT_CLOCK_DIV_5 = 4,                         // ADC12 clock divider of 5
+   SHT_CLOCK_DIV_6 = 5,                         // ADC12 clock divider of 6
+   SHT_CLOCK_DIV_7 = 6,                         // ADC12 clock divider of 7
+   SHT_CLOCK_DIV_8 = 7,                         // ADC12 clock divider of 8
+};
+
+enum sht_enum
+{
+   SAMPLE_HOLD_4_CYCLES = 0,         // sampling duration is 4 clock cycles
+   SAMPLE_HOLD_8_CYCLES = 1,         // ...
+   SAMPLE_HOLD_16_CYCLES = 2,         
+   SAMPLE_HOLD_32_CYCLES = 3,         
+   SAMPLE_HOLD_64_CYCLES = 4,         
+   SAMPLE_HOLD_96_CYCLES = 5,        
+   SAMPLE_HOLD_128_CYCLES = 6,        
+   SAMPLE_HOLD_192_CYCLES = 7,        
+   SAMPLE_HOLD_256_CYCLES = 8,        
+   SAMPLE_HOLD_384_CYCLES = 9,        
+   SAMPLE_HOLD_512_CYCLES = 10,        
+   SAMPLE_HOLD_768_CYCLES = 11,        
+   SAMPLE_HOLD_1024_CYCLES = 12       
+};
+
+enum sampcon_ssel_enum
+{
+   SAMPCON_SOURCE_TACLK = 0,        // Timer A clock source is (external) TACLK
+   SAMPCON_SOURCE_ACLK = 1,         // Timer A clock source ACLK
+   SAMPCON_SOURCE_SMCLK = 2,        // Timer A clock source SMCLK
+   SAMPCON_SOURCE_INCLK = 3,        // Timer A clock source is (external) INCLK
+};
+
+enum sampcon_id_enum
+{
+   SAMPCON_CLOCK_DIV_1 = 0,             // SAMPCON clock divider of 1
+   SAMPCON_CLOCK_DIV_2 = 1,             // SAMPCON clock divider of 2
+   SAMPCON_CLOCK_DIV_4 = 2,             // SAMPCON clock divider of 4
+   SAMPCON_CLOCK_DIV_8 = 3,             // SAMPCON clock divider of 8
+};
+
+// The unique string for allocating ADC resource interfaces
+#define MSP430ADC12_RESOURCE "Msp430Adc12C.Resource"
+
+// The unique string for accessing HAL2
+#define ADCC_SERVICE "AdcC.Service"
+
+// The unique string for accessing HAL2 via ReadStream
+#define ADCC_READ_STREAM_SERVICE "AdcC.ReadStream.Client"
+
+/* Test for GCC bug (bitfield access) - only version 3.2.3 is known to be stable */
+// TODO: check whether this is still relevant...
+#define GCC_VERSION (__GNUC__ * 100 + __GNUC_MINOR__ * 10 + __GNUC_PATCHLEVEL__)
+#if GCC_VERSION == 332
+#error "The msp430-gcc version (3.3.2) contains a bug which results in false accessing \
+of bitfields in structs and makes MSP430ADC12M.nc fail ! Use version 3.2.3 instead."
+#elif GCC_VERSION != 323
+#warning "This version of msp430-gcc might contain a bug which results in false accessing \
+of bitfields in structs (MSP430ADC12M.nc would fail). Use version 3.2.3 instead."
+#endif  
+
+#ifndef __msp430_have_adc12
+#error MSP430ADC12C: Target msp430 device does not have ADC12 module
+#endif
+
+#endif
diff --git a/tos/chips/msp430/adc12/Msp430Adc12ClientAutoDMAC.nc b/tos/chips/msp430/adc12/Msp430Adc12ClientAutoDMAC.nc
new file mode 100644
index 00000000..d23beab8
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12ClientAutoDMAC.nc
@@ -0,0 +1,66 @@
+/* 
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.7 $
+ * $Date: 2008-06-11 00:42:13 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * This component virtualizes access to the HAL of the MSP430 ADC12.  ADC
+ * conversion results are copied using DMA.
+ * 
+ * @author Jan Hauer 
+ *
+ * @see  Please refer to the README.txt and TEP 101 for more information about
+ * this component and its intended use.
+ */
+#include <Msp430Adc12.h>
+generic configuration Msp430Adc12ClientAutoDMAC()
+{
+  provides {
+    interface Resource;
+    interface Msp430Adc12SingleChannel;
+    interface Msp430Adc12Overflow;
+  }
+} implementation {
+  components Msp430DmaC, Msp430Adc12DMAP, Msp430Adc12P, Msp430Adc12DMAWireC;
+   
+  enum {
+    ID = unique(MSP430ADC12_RESOURCE),
+  };
+  Resource = Msp430Adc12P.Resource[ID];
+  Msp430Adc12SingleChannel = Msp430Adc12DMAP.SingleChannel[ID];
+  Msp430Adc12Overflow = Msp430Adc12P.Overflow[ID];
+  
+  Msp430Adc12DMAP.SubSingleChannel[ID] -> Msp430Adc12P.SingleChannel[ID];
+  Msp430Adc12DMAP.AsyncAdcControl[ID] -> Msp430Adc12P.DMAExtension[ID];
+
+}
diff --git a/tos/chips/msp430/adc12/Msp430Adc12ClientAutoDMA_RVGC.nc b/tos/chips/msp430/adc12/Msp430Adc12ClientAutoDMA_RVGC.nc
new file mode 100644
index 00000000..490a329a
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12ClientAutoDMA_RVGC.nc
@@ -0,0 +1,74 @@
+/* 
+ * Copyright (c) 2006, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.8 $ $Date: 2008-06-11 00:42:13 $ @author: Jan Hauer
+ * <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+ 
+
+/** 
+ * This component virtualizes access to the HAL of the MSP430 ADC12.  ADC
+ * conversion results are copied using DMA and reference voltage is enabled as
+ * required by the configuration.
+ * 
+ * @author Jan Hauer 
+ *
+ * @see  Please refer to the README.txt and TEP 101 for more information about
+ * this component and its intended use.
+ */
+#include <Msp430Adc12.h>
+generic configuration Msp430Adc12ClientAutoDMA_RVGC()
+{
+  provides {
+    interface Resource;
+    interface Msp430Adc12SingleChannel;
+    interface Msp430Adc12Overflow;
+  }
+  uses interface AdcConfigure<const msp430adc12_channel_config_t*>;
+} implementation {
+  components Msp430Adc12P, Msp430RefVoltArbiterP, Msp430Adc12DMAWireC;
+
+  enum {
+    ID = unique(MSP430ADC12_RESOURCE),
+  };
+  Resource = Msp430RefVoltArbiterP.ClientResource[ID];
+  Msp430Adc12Overflow = Msp430Adc12P.Overflow[ID];
+  
+  Msp430RefVoltArbiterP.AdcResource[ID] -> Msp430Adc12P.Resource[ID];
+
+  components new Msp430Adc12ConfAlertC();
+  AdcConfigure = Msp430Adc12ConfAlertC.ConfUp;
+  Msp430RefVoltArbiterP.Config[ID] -> Msp430Adc12ConfAlertC.ConfSub;   
+
+  components Msp430DmaC, Msp430Adc12DMAP;
+  
+  Msp430Adc12SingleChannel = Msp430Adc12DMAP.SingleChannel[ID];
+  
+  Msp430Adc12DMAP.SubSingleChannel[ID] -> Msp430Adc12P.SingleChannel[ID];
+  Msp430Adc12DMAP.AsyncAdcControl[ID] -> Msp430Adc12P.DMAExtension[ID];
+}
diff --git a/tos/chips/msp430/adc12/Msp430Adc12ClientAutoRVGC.nc b/tos/chips/msp430/adc12/Msp430Adc12ClientAutoRVGC.nc
new file mode 100644
index 00000000..ef2a1da8
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12ClientAutoRVGC.nc
@@ -0,0 +1,68 @@
+/* 
+ * Copyright (c) 2006, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.8 $ $Date: 2008-06-11 00:42:13 $ @author: Jan Hauer
+ * <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+ 
+/** 
+ * This component virtualizes access to the HAL of the MSP430 ADC12.
+ * Reference voltage is enabled automatically as required by the configuration.
+ * 
+ * @author Jan Hauer 
+ *
+ * @see  Please refer to the README.txt and TEP 101 for more information about
+ * this component and its intended use.
+ */
+#include <Msp430Adc12.h> 
+generic configuration Msp430Adc12ClientAutoRVGC()
+{
+  provides {
+    interface Resource;
+    interface Msp430Adc12SingleChannel;
+    interface Msp430Adc12MultiChannel;
+    interface Msp430Adc12Overflow;
+  }
+  uses interface AdcConfigure<const msp430adc12_channel_config_t*>;
+} implementation {
+  components Msp430Adc12P, Msp430RefVoltArbiterP;
+
+  enum {
+    ID = unique(MSP430ADC12_RESOURCE),
+  };
+  Resource = Msp430RefVoltArbiterP.ClientResource[ID];
+  Msp430Adc12SingleChannel = Msp430Adc12P.SingleChannel[ID];
+  Msp430Adc12MultiChannel = Msp430Adc12P.MultiChannel[ID];
+  Msp430Adc12Overflow = Msp430Adc12P.Overflow[ID];
+  
+  Msp430RefVoltArbiterP.AdcResource[ID] -> Msp430Adc12P.Resource[ID];
+
+  components new Msp430Adc12ConfAlertC();
+  AdcConfigure = Msp430Adc12ConfAlertC.ConfUp;
+  Msp430RefVoltArbiterP.Config[ID] -> Msp430Adc12ConfAlertC.ConfSub; 
+}
diff --git a/tos/chips/msp430/adc12/Msp430Adc12ClientC.nc b/tos/chips/msp430/adc12/Msp430Adc12ClientC.nc
new file mode 100644
index 00000000..9a538133
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12ClientC.nc
@@ -0,0 +1,63 @@
+/* 
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2008-06-11 00:42:13 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * This component virtualizes access to the HAL of the MSP430 ADC12.  
+ * 
+ * @author Jan Hauer 
+ *
+ * @see  Please refer to the README.txt and TEP 101 for more information about
+ * this component and its intended use.
+ */
+#include <Msp430Adc12.h>
+generic configuration Msp430Adc12ClientC()
+{
+  provides {
+    interface Resource;
+    interface Msp430Adc12SingleChannel;
+    interface Msp430Adc12MultiChannel;
+    interface Msp430Adc12Overflow;
+  }
+} implementation {
+  components Msp430Adc12P;
+   
+  enum {
+    ID = unique(MSP430ADC12_RESOURCE),
+  };
+  Resource = Msp430Adc12P.Resource[ID];
+  Msp430Adc12SingleChannel = Msp430Adc12P.SingleChannel[ID];
+  Msp430Adc12MultiChannel = Msp430Adc12P.MultiChannel[ID];
+  Msp430Adc12Overflow = Msp430Adc12P.Overflow[ID];
+}
diff --git a/tos/chips/msp430/adc12/Msp430Adc12ConfAlertC.nc b/tos/chips/msp430/adc12/Msp430Adc12ConfAlertC.nc
new file mode 100644
index 00000000..d9736a50
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12ConfAlertC.nc
@@ -0,0 +1,51 @@
+/* 
+ * Copyright (c) 2006, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $ $Date: 2008-06-11 00:42:13 $ @author: Jan Hauer
+ * <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+ 
+/** 
+ * The only purpose of this component is to generate a nesC warning
+ * if someone has wired to Msp430Adc12ClientAutoRVGC or 
+ * Msp430Adc12ClientAutoDMA_RVGC and forgotten to wire to AdcConfigure.
+ * (nesC optimizes all of its code away).
+ *
+ * @author: Jan Hauer
+ */
+#include <Msp430Adc12.h> 
+generic module Msp430Adc12ConfAlertC()
+{
+  provides interface AdcConfigure<const msp430adc12_channel_config_t*> as ConfSub;
+  uses interface AdcConfigure<const msp430adc12_channel_config_t*> as ConfUp;
+} implementation {
+  async command const msp430adc12_channel_config_t* ConfSub.getConfiguration()
+  {
+    return call ConfUp.getConfiguration();
+  }
+}
diff --git a/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc b/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc
new file mode 100644
index 00000000..abef1b20
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12DMAP.nc
@@ -0,0 +1,196 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2008-06-23 20:25:15 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include <Msp430Adc12.h>
+#include <Msp430Dma.h>
+module Msp430Adc12DMAP @safe()
+{
+  provides {
+    interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id];
+	}
+	uses {
+    interface Msp430DmaControl as DMAControl;
+    interface Msp430DmaChannel as DMAChannel;
+    interface Msp430Adc12SingleChannel as SubSingleChannel[uint8_t id];
+    interface AsyncStdControl as AsyncAdcControl[uint8_t id];
+	}
+}
+implementation
+{ 
+  enum {
+    MULTIPLE_SINGLE,
+    MULTIPLE_REPEAT,
+    MULTIPLE_SINGLE_AGAIN,
+  };
+
+  // norace declarations are safe here, because Msp430Adc12P.nc implements 
+  // a lock mechanism which guarantees that no two clients can access the ADC
+  // and the module variables below are only changed after the lock was acquired
+  norace uint8_t client;
+  norace uint8_t mode;
+  norace uint16_t *buffer;
+  norace uint16_t numSamples;
+
+  async command error_t SingleChannel.configureSingle[uint8_t id](
+      const msp430adc12_channel_config_t *config)
+  {
+    // don't use DMA for single conversions
+    return call SubSingleChannel.configureSingle[id](config);
+  }
+
+  async command error_t SingleChannel.configureSingleRepeat[uint8_t id](
+      const msp430adc12_channel_config_t *config,
+      uint16_t jiffies)
+  {
+    // don't use DMA for single conversions
+    return call SubSingleChannel.configureSingleRepeat[id](config, jiffies);
+  }
+  
+  error_t configure(uint8_t id, const msp430adc12_channel_config_t *config, 
+      uint16_t *buf, uint16_t length, uint16_t jiffies, uint8_t _mode)
+  {
+    // for multiple samples single-channel repat-conversion mode
+    // is used, because then there is only one interrupt at the
+    // the end of the whole sequence and DMA has done all the copying
+    error_t result = call SubSingleChannel.configureSingleRepeat[id](config, jiffies);
+    if (result == SUCCESS){
+      call DMAControl.init();
+      call DMAControl.setFlags(ENABLE_NMI, NOT_ROUND_ROBIN, ON_FETCH);
+      call DMAChannel.setupTransfer(
+        DMA_REPEATED_SINGLE_TRANSFER, 
+        DMA_TRIGGER_ADC12IFGx,
+        DMA_EDGE_SENSITIVE,
+        ADC12MEM,
+        buf,
+        length,
+        DMA_WORD,
+        DMA_WORD,
+        DMA_ADDRESS_UNCHANGED,
+        DMA_ADDRESS_INCREMENTED
+        );
+      call DMAChannel.startTransfer();
+      client = id;
+      mode = _mode;
+      buffer = buf;
+      numSamples = length;
+      call AsyncAdcControl.start[id]();
+    }
+    return result;
+  }
+
+  async command error_t SingleChannel.configureMultiple[uint8_t id](
+      const msp430adc12_channel_config_t *config,
+      uint16_t *buf, uint16_t length, uint16_t jiffies)
+  {
+    return configure(id, config, buf, length, jiffies, MULTIPLE_SINGLE);
+  }
+
+  async command error_t SingleChannel.configureMultipleRepeat[uint8_t id](
+      const msp430adc12_channel_config_t *config,
+      uint16_t *buf, uint8_t length, uint16_t jiffies)
+  {
+    return configure(id, config, buf, length, jiffies, MULTIPLE_REPEAT);
+  }
+
+  async command error_t SingleChannel.getData[uint8_t id]()
+  {
+    if (mode == MULTIPLE_SINGLE_AGAIN)
+      call DMAChannel.repeatTransfer(ADC12MEM, buffer, numSamples);
+    return call SubSingleChannel.getData[id]();
+  }
+  
+  async event error_t SubSingleChannel.singleDataReady[uint8_t id](uint16_t data)
+  {
+    // forward (only signalled if not in DMA mode)
+    return signal SingleChannel.singleDataReady[id](data);
+  }
+
+  async event uint16_t* SubSingleChannel.multipleDataReady[uint8_t id](uint16_t buf[], uint16_t num)
+  {
+    // will never get here
+    return 0;
+  }
+  
+  async event void DMAChannel.transferDone(error_t success)
+  {
+    uint16_t* next;
+    uint8_t oldMode = mode;
+    if (oldMode != MULTIPLE_REPEAT){
+      call AsyncAdcControl.stop[client]();
+      mode = MULTIPLE_SINGLE_AGAIN;
+    }
+    next = signal SingleChannel.multipleDataReady[client](buffer, numSamples);
+    if (oldMode == MULTIPLE_REPEAT)
+      if (next){
+        call DMAChannel.repeatTransfer(ADC12MEM, next, numSamples);
+        call AsyncAdcControl.start[client]();
+      } else
+        call AsyncAdcControl.stop[client]();
+  }
+
+  default async command error_t SubSingleChannel.configureSingle[uint8_t id](
+      const msp430adc12_channel_config_t *config)
+  { return FAIL; }
+
+  default async command error_t SubSingleChannel.configureSingleRepeat[uint8_t id](
+      const msp430adc12_channel_config_t *config, uint16_t jiffies)
+  { return FAIL; }
+  
+  default async command error_t SubSingleChannel.configureMultiple[uint8_t id]( 
+      const msp430adc12_channel_config_t
+      *config, uint16_t buf[], uint16_t num, uint16_t jiffies)
+  { return FAIL; }
+
+  default async command error_t SubSingleChannel.configureMultipleRepeat[uint8_t id](
+      const msp430adc12_channel_config_t *config, uint16_t buf[], uint8_t
+      num, uint16_t jiffies)
+  { return FAIL; }
+
+  default async command error_t SubSingleChannel.getData[uint8_t id]()
+  { return FAIL;}
+
+  default async event error_t SingleChannel.singleDataReady[uint8_t id](
+      uint16_t data)
+  { return FAIL; }
+
+  default async event uint16_t* SingleChannel.multipleDataReady[uint8_t id](
+      uint16_t buf[], uint16_t num)
+  { return 0;}
+  
+  default async command error_t AsyncAdcControl.stop[uint8_t id]()
+  { return FAIL; }
+  default async command error_t AsyncAdcControl.start[uint8_t id]()
+  { return FAIL; }
+}
diff --git a/tos/chips/msp430/adc12/Msp430Adc12DMAWireC.nc b/tos/chips/msp430/adc12/Msp430Adc12DMAWireC.nc
new file mode 100644
index 00000000..40a619f9
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12DMAWireC.nc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-04-07 09:41:55 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration Msp430Adc12DMAWireC
+{ 
+} implementation { 
+  components Msp430DmaC, Msp430Adc12DMAP;
+  Msp430Adc12DMAP.DMAControl -> Msp430DmaC.Control;
+  Msp430Adc12DMAP.DMAChannel -> Msp430DmaC.Channel2;
+#warning Accessing DMA.channel2 for ADC12
+}
diff --git a/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc b/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc
new file mode 100644
index 00000000..fdf0c474
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12ImplP.nc
@@ -0,0 +1,657 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.14 $
+ * $Date: 2008-11-10 14:56:12 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include <Msp430Adc12.h>
+module Msp430Adc12ImplP @safe()
+{
+  provides {
+    interface Init;
+    interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id];
+    interface Msp430Adc12MultiChannel as MultiChannel[uint8_t id];
+    interface Msp430Adc12Overflow as Overflow[uint8_t id];
+    interface AsyncStdControl as DMAExtension[uint8_t id];
+  }
+  uses {
+    interface ArbiterInfo as ADCArbiterInfo;
+    interface HplAdc12;
+    interface Msp430Timer as TimerA;;
+    interface Msp430TimerControl as ControlA0;
+    interface Msp430TimerControl as ControlA1;
+    interface Msp430Compare as CompareA0;
+    interface Msp430Compare as CompareA1;
+    interface HplMsp430GeneralIO as Port60;
+    interface HplMsp430GeneralIO as Port61;
+    interface HplMsp430GeneralIO as Port62;
+    interface HplMsp430GeneralIO as Port63;
+    interface HplMsp430GeneralIO as Port64;
+    interface HplMsp430GeneralIO as Port65;
+    interface HplMsp430GeneralIO as Port66;
+    interface HplMsp430GeneralIO as Port67;
+  }
+}
+implementation
+{ 
+
+#ifdef ADC12_TIMERA_ENABLED
+  #warning Accessing TimerA for ADC12 
+#endif
+
+  enum {
+    SINGLE_DATA = 1,
+    SINGLE_DATA_REPEAT = 2,
+    MULTIPLE_DATA = 4,
+    MULTIPLE_DATA_REPEAT = 8,
+    MULTI_CHANNEL = 16,
+    CONVERSION_MODE_MASK = 0x1F,
+
+    ADC_BUSY = 32,                /* request pending */
+    USE_TIMERA = 64,              /* TimerA used for SAMPCON signal */
+    ADC_OVERFLOW = 128,
+  };
+
+  uint8_t state;                  /* see enum above */
+  
+  uint16_t resultBufferLength;    /* length of buffer */
+  uint16_t *COUNT_NOK(resultBufferLength) resultBufferStart;
+  uint16_t resultBufferIndex;     /* offset into buffer */
+  uint8_t numChannels;            /* number of channels (multi-channel conversion) */
+  uint8_t clientID;               /* ID of client that called getData() */
+
+  command error_t Init.init()
+  {
+    adc12ctl0_t ctl0;
+    call HplAdc12.stopConversion();
+    ctl0 = call HplAdc12.getCtl0();
+    ctl0.adc12tovie = 1;
+    ctl0.adc12ovie = 1;
+    call HplAdc12.setCtl0(ctl0);
+    return SUCCESS;
+  }
+
+  void prepareTimerA(uint16_t interval, uint16_t csSAMPCON, uint16_t cdSAMPCON)
+  {
+#ifdef ADC12_TIMERA_ENABLED
+    msp430_compare_control_t ccResetSHI = {
+      ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0,
+      outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 };
+
+    call TimerA.setMode(MSP430TIMER_STOP_MODE);
+    call TimerA.clear();
+    call TimerA.disableEvents();
+    call TimerA.setClockSource(csSAMPCON);
+    call TimerA.setInputDivider(cdSAMPCON);
+    call ControlA0.setControl(ccResetSHI);
+    call CompareA0.setEvent(interval-1);
+    call CompareA1.setEvent((interval-1)/2);
+#endif
+  }
+    
+  void startTimerA()
+  {
+#ifdef ADC12_TIMERA_ENABLED
+    msp430_compare_control_t ccSetSHI = {
+      ccifg : 0, cov : 0, out : 1, cci : 0, ccie : 0,
+      outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 };
+    msp430_compare_control_t ccResetSHI = {
+      ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0,
+      outmod : 0, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 };
+    msp430_compare_control_t ccRSOutmod = {
+      ccifg : 0, cov : 0, out : 0, cci : 0, ccie : 0,
+      outmod : 7, cap : 0, clld : 0, scs : 0, ccis : 0, cm : 0 };
+    // manually trigger first conversion, then switch to Reset/set conversionMode
+    call ControlA1.setControl(ccResetSHI);
+    call ControlA1.setControl(ccSetSHI);   
+    //call ControlA1.setControl(ccResetSHI); 
+    call ControlA1.setControl(ccRSOutmod);
+    call TimerA.setMode(MSP430TIMER_UP_MODE); // go!
+#endif
+  }   
+  
+  void configureAdcPin( uint8_t inch )
+  {
+#ifdef ADC12_P6PIN_AUTO_CONFIGURE
+    switch (inch)
+    {
+      case 0: call Port60.selectModuleFunc(); call Port60.makeInput(); break;
+      case 1: call Port61.selectModuleFunc(); call Port61.makeInput(); break;
+      case 2: call Port62.selectModuleFunc(); call Port62.makeInput(); break;
+      case 3: call Port63.selectModuleFunc(); call Port63.makeInput(); break;
+      case 4: call Port64.selectModuleFunc(); call Port64.makeInput(); break;
+      case 5: call Port65.selectModuleFunc(); call Port65.makeInput(); break;
+      case 6: call Port66.selectModuleFunc(); call Port66.makeInput(); break;
+      case 7: call Port67.selectModuleFunc(); call Port67.makeInput(); break;
+    }
+#endif
+  }
+  
+  void resetAdcPin( uint8_t inch )
+  {
+#ifdef ADC12_P6PIN_AUTO_CONFIGURE
+    switch (inch)
+    {
+      case 0: call Port60.selectIOFunc(); break;
+      case 1: call Port61.selectIOFunc(); break;
+      case 2: call Port62.selectIOFunc(); break;
+      case 3: call Port63.selectIOFunc(); break;
+      case 4: call Port64.selectIOFunc(); break;
+      case 5: call Port65.selectIOFunc(); break;
+      case 6: call Port66.selectIOFunc(); break;
+      case 7: call Port67.selectIOFunc(); break;
+    }
+#endif
+  }
+  
+  async command error_t SingleChannel.configureSingle[uint8_t id](
+      const msp430adc12_channel_config_t *config)
+  {
+    error_t result = ERESERVE;
+#ifdef ADC12_CHECK_ARGS
+    if (!config)
+      return EINVAL;
+#endif
+    atomic {
+      if (state & ADC_BUSY)
+        return EBUSY;
+      if (call ADCArbiterInfo.userId() == id){
+        adc12ctl1_t ctl1 = {
+          adc12busy: 0,
+          conseq: 0,
+          adc12ssel: config->adc12ssel,
+          adc12div: config->adc12div,
+          issh: 0,
+          shp: 1,
+          shs: 0,
+          cstartadd: 0
+        };
+        adc12memctl_t memctl = {
+          inch: config->inch,
+          sref: config->sref,
+          eos: 1
+        };        
+        adc12ctl0_t ctl0 = call HplAdc12.getCtl0();
+        ctl0.msc = 1;
+        ctl0.sht0 = config->sht;
+        ctl0.sht1 = config->sht;
+
+        state = SINGLE_DATA;
+        call HplAdc12.setCtl0(ctl0);
+        call HplAdc12.setCtl1(ctl1);
+        call HplAdc12.setMCtl(0, memctl);
+        call HplAdc12.setIEFlags(0x01);
+        result = SUCCESS;
+      } 
+    }
+    return result;
+  }
+
+  async command error_t SingleChannel.configureSingleRepeat[uint8_t id](
+      const msp430adc12_channel_config_t *config,
+      uint16_t jiffies)
+  {
+    error_t result = ERESERVE;
+#ifdef ADC12_CHECK_ARGS
+#ifndef ADC12_TIMERA_ENABLED
+    if (jiffies>0) 
+      return EINVAL;
+#endif
+    if (!config || jiffies == 1 || jiffies == 2)
+      return EINVAL;
+#endif
+    atomic {
+      if (state & ADC_BUSY)
+        return EBUSY;
+      if (call ADCArbiterInfo.userId() == id) {
+        adc12ctl1_t ctl1 = {
+          adc12busy: 0,
+          conseq: 2,
+          adc12ssel: config->adc12ssel,
+          adc12div: config->adc12div,
+          issh: 0,
+          shp: 1,
+          shs: (jiffies == 0) ? 0 : 1,
+          cstartadd: 0
+        };
+        adc12memctl_t memctl = {
+          inch: config->inch,
+          sref: config->sref,
+          eos: 1
+        };        
+        adc12ctl0_t ctl0 = call HplAdc12.getCtl0();
+        ctl0.msc = (jiffies == 0) ? 1 : 0;
+        ctl0.sht0 = config->sht;
+        ctl0.sht1 = config->sht;
+
+        state = SINGLE_DATA_REPEAT;
+        call HplAdc12.setCtl0(ctl0);
+        call HplAdc12.setCtl1(ctl1);
+        call HplAdc12.setMCtl(0, memctl);
+        call HplAdc12.setIEFlags(0x01);
+        if (jiffies){
+          state |= USE_TIMERA;   
+          prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id);
+        }
+        result = SUCCESS;
+      }     
+    }
+    return result;
+  }
+
+  async command error_t SingleChannel.configureMultiple[uint8_t id](
+      const msp430adc12_channel_config_t *config,
+      uint16_t *buf, uint16_t length, uint16_t jiffies)
+  {
+    error_t result = ERESERVE;
+#ifdef ADC12_CHECK_ARGS
+#ifndef ADC12_TIMERA_ENABLED
+    if (jiffies>0) 
+      return EINVAL;
+#endif
+    if (!config || !buf || !length || jiffies == 1 || jiffies == 2)
+      return EINVAL;
+#endif
+    atomic {
+      if (state & ADC_BUSY)
+        return EBUSY;
+      if (call ADCArbiterInfo.userId() == id){
+        adc12ctl1_t ctl1 = {
+          adc12busy: 0,
+          conseq: (length > 16) ? 3 : 1,
+          adc12ssel: config->adc12ssel,
+          adc12div: config->adc12div,
+          issh: 0,
+          shp: 1,
+          shs: (jiffies == 0) ? 0 : 1,
+          cstartadd: 0
+        };
+        adc12memctl_t memctl = {
+          inch: config->inch,
+          sref: config->sref,
+          eos: 0
+        };        
+        uint16_t i, mask = 1;
+        adc12ctl0_t ctl0 = call HplAdc12.getCtl0();
+        ctl0.msc = (jiffies == 0) ? 1 : 0;
+        ctl0.sht0 = config->sht;
+        ctl0.sht1 = config->sht;
+
+        state = MULTIPLE_DATA;
+	resultBufferStart = NULL;
+        resultBufferLength = length;
+        resultBufferStart = buf;
+        resultBufferIndex = 0;
+        call HplAdc12.setCtl0(ctl0);
+        call HplAdc12.setCtl1(ctl1);
+        for (i=0; i<(length-1) && i < 15; i++)
+          call HplAdc12.setMCtl(i, memctl);
+        memctl.eos = 1;  
+        call HplAdc12.setMCtl(i, memctl);
+        call HplAdc12.setIEFlags(mask << i);        
+        
+        if (jiffies){
+          state |= USE_TIMERA;
+          prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id);
+        }
+        result = SUCCESS;
+      }      
+    }
+    return result;
+  }
+
+  async command error_t SingleChannel.configureMultipleRepeat[uint8_t id](
+      const msp430adc12_channel_config_t *config,
+      uint16_t *buf, uint8_t length, uint16_t jiffies)
+  {
+    error_t result = ERESERVE;
+#ifdef ADC12_CHECK_ARGS
+#ifndef ADC12_TIMERA_ENABLED
+    if (jiffies>0) 
+      return EINVAL;
+#endif
+    if (!config || !buf || !length || length > 16 || jiffies == 1 || jiffies == 2)
+      return EINVAL;
+#endif
+    atomic {
+      if (state & ADC_BUSY)
+        return EBUSY;
+      if (call ADCArbiterInfo.userId() == id){
+        adc12ctl1_t ctl1 = {
+          adc12busy: 0,
+          conseq: 3,
+          adc12ssel: config->adc12ssel,
+          adc12div: config->adc12div,
+          issh: 0,
+          shp: 1,
+          shs: (jiffies == 0) ? 0 : 1,
+          cstartadd: 0
+        };
+        adc12memctl_t memctl = {
+          inch: config->inch,
+          sref: config->sref,
+          eos: 0
+        };        
+        uint16_t i, mask = 1;
+        adc12ctl0_t ctl0 = call HplAdc12.getCtl0();
+        ctl0.msc = (jiffies == 0) ? 1 : 0;
+        ctl0.sht0 = config->sht;
+        ctl0.sht1 = config->sht;
+
+        state = MULTIPLE_DATA_REPEAT;
+	resultBufferStart = NULL;
+        resultBufferLength = length;
+        resultBufferStart = buf;
+        resultBufferIndex = 0;            
+        
+        call HplAdc12.setCtl0(ctl0);
+        call HplAdc12.setCtl1(ctl1);
+        for (i=0; i<(length-1) && i < 15; i++)
+          call HplAdc12.setMCtl(i, memctl);
+        memctl.eos = 1;  
+        call HplAdc12.setMCtl(i, memctl);
+        call HplAdc12.setIEFlags(mask << i);        
+        
+        if (jiffies){
+          state |= USE_TIMERA;
+          prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id);
+        }
+        result = SUCCESS;
+      }
+    }
+    return result;
+  }
+
+  async command error_t SingleChannel.getData[uint8_t id]()
+  {
+    atomic {
+      if (call ADCArbiterInfo.userId() == id){
+        if ((state & MULTIPLE_DATA_REPEAT) && !resultBufferStart)
+          return EINVAL;
+        if (state & ADC_BUSY)
+          return EBUSY;
+        state |= ADC_BUSY;
+        clientID = id;
+        configureAdcPin((call HplAdc12.getMCtl(0)).inch);
+        call HplAdc12.startConversion();
+        if (state & USE_TIMERA)
+          startTimerA(); 
+        return SUCCESS;
+      }
+    }
+    return FAIL;
+  }
+
+  async command error_t MultiChannel.configure[uint8_t id](
+      const msp430adc12_channel_config_t *config,
+      adc12memctl_t *memctl, uint8_t numMemctl, uint16_t *buf, 
+      uint16_t numSamples, uint16_t jiffies)
+  {
+    error_t result = ERESERVE;
+#ifdef ADC12_CHECK_ARGS
+#ifndef ADC12_TIMERA_ENABLED
+    if (jiffies>0) 
+      return EINVAL;
+#endif
+    if (!config || !memctl || !numMemctl || numMemctl > 15 || !numSamples || 
+        !buf || jiffies == 1 || jiffies == 2 || numSamples % (numMemctl+1) != 0)
+      return EINVAL;
+#endif
+    atomic {
+      if (state & ADC_BUSY)
+        return EBUSY;
+      if (call ADCArbiterInfo.userId() == id){
+        adc12ctl1_t ctl1 = {
+          adc12busy: 0,
+          conseq: (numSamples > numMemctl+1) ? 3 : 1, 
+          adc12ssel: config->adc12ssel,
+          adc12div: config->adc12div,
+          issh: 0,
+          shp: 1,
+          shs: (jiffies == 0) ? 0 : 1,
+          cstartadd: 0
+        };
+        adc12memctl_t firstMemctl = {
+          inch: config->inch,
+          sref: config->sref,
+          eos: 0
+        };     
+        uint16_t i, mask = 1;
+        adc12ctl0_t ctl0 = call HplAdc12.getCtl0();
+        ctl0.msc = (jiffies == 0) ? 1 : 0;
+        ctl0.sht0 = config->sht;
+        ctl0.sht1 = config->sht;
+
+        state = MULTI_CHANNEL;
+	resultBufferStart = NULL;
+        resultBufferLength = numSamples;
+        resultBufferStart = buf;
+        resultBufferIndex = 0;
+        numChannels = numMemctl+1;
+        call HplAdc12.setCtl0(ctl0);
+        call HplAdc12.setCtl1(ctl1);
+        call HplAdc12.setMCtl(0, firstMemctl);
+        for (i=0; i<(numMemctl-1) && i < 14; i++){
+          memctl[i].eos = 0;
+          call HplAdc12.setMCtl(i+1, memctl[i]);
+        }
+        memctl[i].eos = 1;
+        call HplAdc12.setMCtl(i+1, memctl[i]);
+        call HplAdc12.setIEFlags(mask << (i+1));        
+        
+        if (jiffies){
+          state |= USE_TIMERA;
+          prepareTimerA(jiffies, config->sampcon_ssel, config->sampcon_id);
+        }
+        result = SUCCESS;
+      }      
+    }
+    return result;
+  }
+
+  async command error_t MultiChannel.getData[uint8_t id]()
+  {
+    uint8_t i;
+    atomic {
+      if (call ADCArbiterInfo.userId() == id){
+        if (!resultBufferStart)
+          return EINVAL;
+        if (state & ADC_BUSY)
+          return EBUSY;
+        state |= ADC_BUSY;
+        clientID = id;
+        for (i=0; i<numChannels; i++)
+          configureAdcPin((call HplAdc12.getMCtl(i)).inch);
+        call HplAdc12.startConversion();
+        if (state & USE_TIMERA)
+          startTimerA(); 
+        return SUCCESS;
+      }
+    }
+    return FAIL;
+  }
+  
+  void stopConversion()
+  {
+    uint8_t i;
+#ifdef ADC12_TIMERA_ENABLED
+    if (state & USE_TIMERA)
+      call TimerA.setMode(MSP430TIMER_STOP_MODE);
+#endif
+    resetAdcPin( (call HplAdc12.getMCtl(0)).inch );
+    if (state & MULTI_CHANNEL){
+      for (i=1; i<numChannels; i++)
+        resetAdcPin( (call HplAdc12.getMCtl(i)).inch );
+    }
+    atomic {
+      call HplAdc12.stopConversion();
+      call HplAdc12.resetIFGs(); 
+      state &= ~ADC_BUSY;
+    }
+  }
+
+  async command error_t DMAExtension.start[uint8_t id]()
+  { 
+    atomic {
+      if (call ADCArbiterInfo.userId() == id){
+        call HplAdc12.setIEFlags(0);
+        call HplAdc12.resetIFGs();
+        return SUCCESS;
+      }
+    }
+    return FAIL;
+  }
+  
+  async command error_t DMAExtension.stop[uint8_t id]()
+  {
+    stopConversion();
+    return SUCCESS;
+  }
+  
+  async event void TimerA.overflow(){}
+  async event void CompareA0.fired(){}
+  async event void CompareA1.fired(){}
+
+  async event void HplAdc12.conversionDone(uint16_t iv)
+  {
+    bool overflow = FALSE;
+    uint16_t *resultBuffer;
+
+    if (iv <= 4){ // check for overflow
+      if (iv == 2)
+        signal Overflow.memOverflow[clientID]();
+      else
+        signal Overflow.conversionTimeOverflow[clientID]();
+      // only if the client didn't ask for data as fast as possible (jiffies was not zero)
+      if (!(call HplAdc12.getCtl0()).msc)
+        overflow = TRUE;
+    }
+    switch (state & CONVERSION_MODE_MASK) 
+    { 
+      case SINGLE_DATA:
+        stopConversion();
+        signal SingleChannel.singleDataReady[clientID](call HplAdc12.getMem(0));
+        break;
+      case SINGLE_DATA_REPEAT:
+        {
+          error_t repeatContinue;
+          repeatContinue = signal SingleChannel.singleDataReady[clientID](
+                call HplAdc12.getMem(0));
+          if (repeatContinue != SUCCESS)
+            stopConversion();
+          break;
+        }
+#ifndef ADC12_ONLY_WITH_DMA
+      case MULTI_CHANNEL:
+        {
+          uint16_t i = 0, k;
+          resultBuffer = resultBufferStart + resultBufferIndex;
+          do {
+            *resultBuffer++ = call HplAdc12.getMem(i);
+          } while (++i < numChannels);
+          resultBufferIndex += numChannels;
+          if (overflow || resultBufferLength == resultBufferIndex){
+            stopConversion();
+            resultBuffer -= resultBufferIndex;
+            k = resultBufferIndex - numChannels;
+            resultBufferIndex = 0;
+            signal MultiChannel.dataReady[clientID](resultBuffer, 
+                overflow ? k : resultBufferLength);
+          }
+        }
+        break;
+      case MULTIPLE_DATA:
+        {
+          uint16_t i = 0, length, k;
+          resultBuffer = resultBufferStart + resultBufferIndex;
+          if (resultBufferLength - resultBufferIndex > 16) 
+            length = 16;
+          else
+            length = resultBufferLength - resultBufferIndex;
+          do {
+            *resultBuffer++ = call HplAdc12.getMem(i);
+          } while (++i < length);
+          resultBufferIndex += length;
+          if (overflow || resultBufferLength == resultBufferIndex){
+            stopConversion();
+            resultBuffer -= resultBufferIndex;
+            k = resultBufferIndex - length;
+            resultBufferIndex = 0;
+            signal SingleChannel.multipleDataReady[clientID](resultBuffer,
+               overflow ? k : resultBufferLength);
+          } else if (resultBufferLength - resultBufferIndex > 15)
+            return;
+          else {
+            // last sequence < 16 samples
+            adc12memctl_t memctl = call HplAdc12.getMCtl(0);
+            memctl.eos = 1;
+            call HplAdc12.setMCtl(resultBufferLength - resultBufferIndex, memctl);
+          }
+        }
+        break;
+      case MULTIPLE_DATA_REPEAT:
+        {
+          uint8_t i = 0;
+          resultBuffer = resultBufferStart;
+          do {
+            *resultBuffer++ = call HplAdc12.getMem(i);
+          } while (++i < resultBufferLength);
+          
+          resultBufferStart = signal SingleChannel.multipleDataReady[clientID](
+              resultBuffer-resultBufferLength,
+              overflow ? 0 : resultBufferLength);
+          if (!resultBufferStart)  
+            stopConversion();
+          break;
+        }
+#endif
+      } // switch
+  }
+
+  default async event error_t SingleChannel.singleDataReady[uint8_t id](uint16_t data)
+  {
+    return FAIL;
+  }
+   
+  default async event uint16_t* SingleChannel.multipleDataReady[uint8_t id](
+      uint16_t *buf, uint16_t numSamples)
+  {
+    return 0;
+  }
+   
+  default async event void MultiChannel.dataReady[uint8_t id](uint16_t *buffer, uint16_t numSamples) {};
+  
+  default async event void Overflow.memOverflow[uint8_t id](){}
+  default async event void Overflow.conversionTimeOverflow[uint8_t id](){}
+
+}
+
diff --git a/tos/chips/msp430/adc12/Msp430Adc12MultiChannel.nc b/tos/chips/msp430/adc12/Msp430Adc12MultiChannel.nc
new file mode 100644
index 00000000..a94622de
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12MultiChannel.nc
@@ -0,0 +1,110 @@
+/* 
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2009-12-03 17:36:13 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * This interface provides access to the ADC12 on the level of HAL. It can be
+ * used to sample up to 16 (different) ADC channels. It separates between
+ * configuration and data collection: every time a client has been granted
+ * access to the ADC subsystem (via the Resource interface), it first has to
+ * configure the ADC.  Afterwards the client may call getData() more than once
+ * without reconfiguring the ADC in between (if the client has not released the
+ * ADC via the Resource interface), i.e.<p>
+ * 
+ *    configure() -> ( getData() -> dataReady() )*
+ *
+ * @author Jan Hauer 
+ */
+
+#include "Msp430Adc12.h" 
+interface Msp430Adc12MultiChannel 
+{   
+
+  /** 
+   * Configures the ADC to perform conversion(s) on multiple channels.  Any
+   * previous configuration will be overwritten.  If SUCCESS is returned
+   * calling <code>getData()</code> will start the conversion immediately and a
+   * <code>dataReady()</code> event will be signalled with the conversion
+   * result when the conversion has finished.
+   *
+   * @param config Main ADC12 configuration and configuration of the first
+   * channel 
+   *
+   * @param memctl List of additional channels and respective reference
+   * voltages
+   *
+   * @param numMemctl Number of entries in the list
+   * 
+   * @param buffer Buffer to store the conversion results, it must have
+   * numSamples entries. Results will be stored in the order the channels where
+   * specified.
+   *
+   * @param numSamples Total number of samples. Note: numSamples %
+   * (numMemctl+1) must be zero. For example, to sample every channel twice use
+   * numSamples = (numMemctl+1) * 2
+   *
+   * @param jiffies Sampling period in terms of clock ticks of "sampcon_ssel"
+   * and input divider "sampcon_id". Samples are taken equally-spaced in
+   * time iterating round-robin over the channels (different channels are  
+   * not sampled simultaneously but one after another).
+   *
+   * @return SUCCESS means that the ADC was configured successfully and
+   * <code>getData()</code> can be called to start the conversion.
+   */
+
+  async command error_t configure(const msp430adc12_channel_config_t *config,
+      adc12memctl_t *memctl, uint8_t numMemctl, uint16_t *buffer, 
+      uint16_t numSamples, uint16_t jiffies);
+
+  /** 
+   * Starts sampling the adc channels using the configuration as specified by
+   * the last call to <code>configure()</code>.
+   *
+   * @return SUCCESS means that the conversion was started successfully and an
+   * event dataReady() will be signalled. Otherwise no event will be signalled.
+   */ 
+  async command error_t getData();
+  
+  /** 
+   * Conversion results are ready. Results are stored in the buffer in the
+   * order the channels where specified in the <code>configure()</code>
+   * command, i.e. every (numMemctl+1)-th entry maps to the same channel. 
+   * 
+   * @param buffer Conversion results (lower 12 bit are valid, respectively).
+   * @param numSamples Number of results stored in <code>buffer</code> 
+   */    
+  async event void dataReady(uint16_t *buffer, uint16_t numSamples); 
+
+}
+
diff --git a/tos/chips/msp430/adc12/Msp430Adc12Overflow.nc b/tos/chips/msp430/adc12/Msp430Adc12Overflow.nc
new file mode 100644
index 00000000..4b0a1d73
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12Overflow.nc
@@ -0,0 +1,56 @@
+/* 
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2006-12-12 18:23:07 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * Signals an ADC12MEMx overflow or conversion time overflow condition to the
+ * client.
+ *
+ * @author Jan Hauer 
+ */
+
+#include "Msp430Adc12.h" 
+interface Msp430Adc12Overflow 
+{   
+  /** 
+   * An ADC12MEMx overflow condition has occured.
+   */ 
+  async event void memOverflow();
+
+  /** 
+   * A conversion time overflow condition has occured.
+   */ 
+  async event void conversionTimeOverflow();
+}
+
diff --git a/tos/chips/msp430/adc12/Msp430Adc12P.nc b/tos/chips/msp430/adc12/Msp430Adc12P.nc
new file mode 100644
index 00000000..ae0bde2e
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12P.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.7 $
+ * $Date: 2008-05-15 23:57:13 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include <Msp430Adc12.h> 
+configuration Msp430Adc12P 
+{ 
+  provides {
+    interface Resource[uint8_t id]; 
+    interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; 
+    interface Msp430Adc12MultiChannel as MultiChannel[uint8_t id]; 
+    interface Msp430Adc12Overflow as Overflow[uint8_t id]; 
+    interface AsyncStdControl as DMAExtension[uint8_t id];
+  }
+} implementation { 
+  components Msp430Adc12ImplP, HplAdc12P, MainC, 
+             new SimpleRoundRobinArbiterC(MSP430ADC12_RESOURCE) as Arbiter;
+
+  Resource = Arbiter;
+  SingleChannel = Msp430Adc12ImplP.SingleChannel;
+  MultiChannel= Msp430Adc12ImplP.MultiChannel;
+  Overflow = Msp430Adc12ImplP.Overflow;
+  DMAExtension = Msp430Adc12ImplP.DMAExtension;
+  
+  Msp430Adc12ImplP.Init <- MainC;
+  Msp430Adc12ImplP.ADCArbiterInfo -> Arbiter;
+  Msp430Adc12ImplP.HplAdc12 -> HplAdc12P;
+
+#ifdef ADC12_P6PIN_AUTO_CONFIGURE
+  components HplMsp430GeneralIOC;
+  Msp430Adc12ImplP.Port60 -> HplMsp430GeneralIOC.Port60;
+  Msp430Adc12ImplP.Port61 -> HplMsp430GeneralIOC.Port61;
+  Msp430Adc12ImplP.Port62 -> HplMsp430GeneralIOC.Port62;
+  Msp430Adc12ImplP.Port63 -> HplMsp430GeneralIOC.Port63;
+  Msp430Adc12ImplP.Port64 -> HplMsp430GeneralIOC.Port64;
+  Msp430Adc12ImplP.Port65 -> HplMsp430GeneralIOC.Port65;
+  Msp430Adc12ImplP.Port66 -> HplMsp430GeneralIOC.Port66;
+  Msp430Adc12ImplP.Port67 -> HplMsp430GeneralIOC.Port67;
+#endif
+
+#ifdef ADC12_TIMERA_ENABLED
+  components Msp430TimerC;
+  Msp430Adc12ImplP.TimerA -> Msp430TimerC.TimerA;
+  Msp430Adc12ImplP.ControlA0 -> Msp430TimerC.ControlA0;
+  Msp430Adc12ImplP.ControlA1 -> Msp430TimerC.ControlA1;
+  Msp430Adc12ImplP.CompareA0 -> Msp430TimerC.CompareA0;
+  Msp430Adc12ImplP.CompareA1 -> Msp430TimerC.CompareA1;
+#endif
+}
+
diff --git a/tos/chips/msp430/adc12/Msp430Adc12SingleChannel.nc b/tos/chips/msp430/adc12/Msp430Adc12SingleChannel.nc
new file mode 100644
index 00000000..752825f1
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430Adc12SingleChannel.nc
@@ -0,0 +1,230 @@
+/* 
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2008-06-27 18:05:23 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * 
+ * This interface provides access to the ADC12 on the level of HAL. It can be
+ * used to sample a single adc channel once or repeatedly (one event is
+ * signalled per conversion result) or perform multiple conversions for a
+ * single channel once or repeatedly (one event is signalled per multiple
+ * conversion results). It cannot be used to sample different adc channels with
+ * a single command (use the Msp430Adc12MultiChannel interface instead).
+ * Sampling a channel requires calling a sequence of two commands, configureX()
+ * and getData(), where X is either 'Single', 'SingleRepeat', 'Multiple' or
+ * 'MultipleRepeat'. Conversion results will be signalled by the
+ * dataReadySingle() or dataReadyMultiple() event, depending on the previous
+ * configuration, i.e. there are four possible sequences:
+ * 
+ * <p> configureSingle()          -> ( getData() -> singleDataReady() )*
+ * <p> configureSingleRepeat()    -> ( getData() -> singleDataReady() )*
+ * <p> configureMultiple()        -> ( getData() -> multipleDataReady() )*
+ * <p> configureMultipleRepeat()  -> getData() -> multipleDataReady()
+ *
+ * <p> where configureX() and getData() are commands called by the client and
+ * singleDataReady() and multipleDataReady() are events signalled back to the
+ * client by the adc subsystem. Note that a configuration is valid until the
+ * client reconfigures or releases the ADC (using the Resource interface),
+ * except for configureMultipleRepeat(), which is only valid for a single call
+ * to getData(). This means that after a successful configuration with, for
+ * example, configureSingle() the client may call getData() more than once
+ * without reconfiguring the ADC in between (if the client has not released the
+ * ADC via the Resource interface).
+ *
+ * @author Jan Hauer 
+ */
+
+#include "Msp430Adc12.h" 
+interface Msp430Adc12SingleChannel 
+{   
+
+  /** 
+   * Configures the ADC to perform a single conversion. Any previous
+   * configuration will be overwritten.  If SUCCESS is returned calling
+   * <code>getData()</code> will start the conversion immediately and a
+   * <code>singleDataReady()</code> event will be signalled with the conversion
+   * result when the conversion has finished.
+   *
+   * @param config ADC12 configuration data.  
+   *
+   * @return SUCCESS means that the ADC was configured successfully and
+   * <code>getData()</code> can be called to start the conversion.
+   */
+  async command error_t configureSingle(const msp430adc12_channel_config_t *ONE config);
+
+  /** 
+   * Configures the ADC for repeated single channel conversion mode. Any
+   * previous configuration will be overwritten. If SUCCESS is returned calling
+   * <code>getData()</code> will start sampling the adc channel periodically
+   * (the first conversion is started immediately).  The sampling period is
+   * specified by the <code>jiffies</code> parameter, which defines the time
+   * between successive conversions in terms of clock ticks of clock source
+   * "sampcon_ssel" and clock input divider "sampcon_id" as specified in the
+   * <code>config</code> parameter. If jiffies is zero successive conversions
+   * are performed as quickly as possible.  Conversion result are signalled
+   * until the client returns <code>FAIL</code> in the
+   * <code>singleDataReady()</code> event handler.
+   * 
+   * @param config ADC12 configuration data.  
+   * @param jiffies Sampling period in terms of clock ticks of "sampcon_ssel" and
+   * input divider "sampcon_id".
+   *
+   * @return SUCCESS means that the ADC was configured successfully and
+   * <code>getData()</code> can be called to start with the first conversion.
+   */
+  async command error_t configureSingleRepeat(const msp430adc12_channel_config_t *ONE config, uint16_t jiffies);
+
+  
+  /** 
+   * Configures the ADC for sampling a channel <code>numSamples</code> times
+   * with a given sampling period. Any previous configuration will be
+   * overwritten.  In contrast to the <code>configureSingleRepeat()</code>
+   * command, this configuration means that only one event will be signalled
+   * after all samples have been taken (which is useful for high-frequency
+   * sampling). If SUCCESS is returned calling <code>getData()</code> will
+   * start sampling the adc channel <code>numSamples</code> times and the first
+   * conversion is started immediately. Conversion results are stored in a
+   * buffer allocated by the client (the <code>buffer</code>
+   * parameter). The sampling period is specified by the <code>jiffies</code>
+   * parameter, which defines the time between successive conversions in terms
+   * of clock ticks of clock source "sampcon_ssel" and clock input divider
+   * "sampcon_id" as specified in the <code>config</code> parameter. If jiffies
+   * is zero successive conversions are performed as quickly as possible. After
+   * <code>numSamples</code> conversions an event
+   * <code>multipleDataReady()</code> is signalled with the conversion results.
+   *
+   * @param config ADC12 configuration data.  
+   * @param jiffies Sampling period in terms of clock ticks of "sampcon_ssel"
+   * and input divider "sampcon_id".
+   * @param buffer The user-allocated buffer in which the conversion results
+   * will be stored. It must have at least <code>numSamples</code> entries,
+   * i.e. it must have a size of at least <code>numSamples</code> * 2 byte.
+   * @param numSamples Number of adc samples
+   *
+   * @return SUCCESS means that the ADC was configured successfully and
+   * <code>getData()</code> can be called to start with the first conversion.
+   */ 
+  async command error_t configureMultiple( const msp430adc12_channel_config_t *ONE config, uint16_t *COUNT(numSamples) buffer, uint16_t numSamples, uint16_t jiffies);
+
+  /** 
+   *
+   * Configures the ADC for sampling a channel multiple times repeatedly.  Any
+   * previous configuration will be overwritten. In contrast to the
+   * <code>configureSingleRepeat()</code> command this configuration means that
+   * an event with <code>numSamples</code> conversion results will be
+   * signalled, where 0 < <code>numSamples</code> <= 16. In contrast to the
+   * <code>configureMultiple()</code> command, this configuration means that
+   * <code>numSamples</code> conversion results will be signalled repeatedly
+   * until the client returns <code>FAIL</code> in the
+   * <code>multipleDataReady()</code> event handler. 
+   *
+   * If <code>configureMultipleRepeat()</code> returns SUCCESS calling
+   * <code>getData()</code> will start the the first conversion immediately.
+   * The sampling period is specified by the <code>jiffies</code> parameter,
+   * which defines the time between successive conversions in terms of clock
+   * ticks of clock source "sampcon_ssel" and clock input divider "sampcon_id"
+   * as specified in the <code>config</code> parameter. If jiffies is zero
+   * successive conversions are performed as quickly as possible. After
+   * <code>numSamples</code> conversions an event
+   * <code>multipleDataReady()</code> is signalled with <code>numSamples</code>
+   * conversion results. If the client returns <code>SUCCESS</code> in the
+   * <code>multipleDataReady()</code> event handler, <code>numSamples</code>
+   * new conversions will be performed, otherwise not.
+   *
+   * @param config ADC12 configuration data.  
+   * @param jiffies Sampling period in terms of clock ticks of "sampcon_ssel"
+   * and input divider "sampcon_id".
+   * @param buffer The user-allocated buffer in which the conversion results
+   * will be stored. It must have at least <code>numSamples</code> entries,
+   * i.e. it must have a size of at least <code>numSamples</code> * 2 byte.
+   * @param numSamples Number of adc samples to take, 0 <
+   * <code>numSamples</code> <= 16
+   *
+   * @return SUCCESS means that the ADC was configured successfully and
+   * <code>getData()</code> can be called to start with the first conversion.
+   */ 
+  async command error_t configureMultipleRepeat(const msp430adc12_channel_config_t *ONE config, uint16_t *COUNT(numSamples) buffer, uint8_t numSamples, uint16_t jiffies);
+
+
+  /** 
+   * Starts sampling an adc channel using the configuration as specified by
+   * the last call to any of the four available configuration commands.
+   *
+   * @return SUCCESS means that the conversion was started successfully and an
+   * event singleDataReady() or multipleDataReady() will be signalled
+   * (depending on the previous configuration). Otherwise no such event will be
+   * signalled.
+   */ 
+  async command error_t getData();
+  
+  /** 
+   * A single ADC conversion result is ready. If the ADC was configured with
+   * the <code>configureSingle()</code> command, then the return value is
+   * ignored. If the ADC was configured with the
+   * <code>configureSingleRepeat()</code> command then the return value tells
+   * whether another conversion should be performed (<code>SUCCESS()</code>) or
+   * not (<code>FAIL</code>).
+   * 
+   * @param data Conversion result (lower 12 bit).  
+   *
+   * @return If this event is signalled as response to a call to
+   * <code>configureSingleRepeat()</code> then <code>SUCCESS</code> results in
+   * another sampling and <code>FAIL</code> stops the repeated sampling.
+   * Otherwise the return value is ignored.
+   */  
+  async event error_t singleDataReady(uint16_t data);
+
+  /** 
+   * Multiple ADC conversion results are ready.  If the ADC was configured
+   * with the <code>configureMultiple()</code> command, then the return value
+   * is ignored. If the ADC was configured with the
+   * <code>configureMultipleRepeat()</code> command then the returned pointer
+   * defines where to store the next <code>numSamples</code>
+   * conversion results (the client must make sure that the buffer is big
+   * enough!).  Returning a null pointer means that the repeated conversion
+   * mode will be stopped.
+   * 
+   * @param buffer Conversion results (lower 12 bit are valid, respectively).
+   * @param numSamples Number of samples stored in <code>buffer</code> 
+   *
+   * @return
+   * A null pointer stops a repeated conversion mode. Any non-zero value is
+   * interpreted as the next buffer, which must have at least
+   * <code>numSamples</code> entries. The return value is ignored if the ADC
+   * was configured with <code>configureMultiple()</code>.
+   */    
+  async event uint16_t * COUNT_NOK(numSamples) multipleDataReady(uint16_t *COUNT(numSamples) buffer, uint16_t numSamples); 
+
+}
+
diff --git a/tos/chips/msp430/adc12/Msp430RefVoltArbiterImplP.nc b/tos/chips/msp430/adc12/Msp430RefVoltArbiterImplP.nc
new file mode 100644
index 00000000..d35fb531
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430RefVoltArbiterImplP.nc
@@ -0,0 +1,188 @@
+/*
+ * Copyright (c) 2006, Technische Universität Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2007-04-05 13:42:36 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+module Msp430RefVoltArbiterImplP
+{
+  provides interface Resource as ClientResource[uint8_t client];
+  uses {
+    interface Resource as AdcResource[uint8_t client];
+    interface SplitControl as RefVolt_1_5V;
+    interface SplitControl as RefVolt_2_5V;  
+    interface AdcConfigure<const msp430adc12_channel_config_t*> as Config[uint8_t client];
+  }
+} implementation {
+  enum {
+    NO_OWNER = 0xFF,
+  };
+  norace uint8_t syncOwner = NO_OWNER;
+  bool ref2_5v;
+
+  task void switchOff();
+  
+  async command error_t ClientResource.request[uint8_t client]()
+  {
+    return call AdcResource.request[client]();
+  }
+   
+  async command error_t ClientResource.immediateRequest[uint8_t client]()
+  {
+    const msp430adc12_channel_config_t* settings = call Config.getConfiguration[client]();
+    if (settings->sref == REFERENCE_VREFplus_AVss ||
+        settings->sref == REFERENCE_VREFplus_VREFnegterm)
+      // always fails, because of the possible start-up delay (and async-sync transition)
+      return FAIL;
+    else {
+      return call AdcResource.immediateRequest[client]();
+    }
+  }
+
+  event void AdcResource.granted[uint8_t client]()
+  {
+    const msp430adc12_channel_config_t* settings  = call Config.getConfiguration[client]();
+    if (settings->sref == REFERENCE_VREFplus_AVss ||
+        settings->sref == REFERENCE_VREFplus_VREFnegterm){
+      error_t started;
+      if (syncOwner != NO_OWNER){
+        // very rare case, which can only occur 
+        // if no FIFO task scheduler
+        // is used (see comment below)
+        call AdcResource.release[client]();
+        call AdcResource.request[client]();
+        return;
+      }
+      syncOwner = client;
+      if (settings->ref2_5v == REFVOLT_LEVEL_1_5) {
+        ref2_5v = FALSE;
+        started = call RefVolt_1_5V.start();
+      }
+      else {
+        ref2_5v = TRUE;
+        started = call RefVolt_2_5V.start();
+      }
+      if (started != SUCCESS){
+        syncOwner = NO_OWNER;
+        call AdcResource.release[client]();
+        call AdcResource.request[client]();
+      }
+    } else 
+      signal ClientResource.granted[client]();
+  }
+   
+  event void RefVolt_1_5V.startDone(error_t error)
+  {
+    if (syncOwner != NO_OWNER){
+      // assumption: a client which has called request() must
+      // not call release() before it gets the granted()
+      signal ClientResource.granted[syncOwner]();
+    }
+  }
+   
+  event void RefVolt_2_5V.startDone(error_t error)
+  {
+    if (syncOwner != NO_OWNER){
+      // assumption: a client which has called request() must
+      // not call release() before it gets the granted()
+      signal ClientResource.granted[syncOwner]();
+    }
+  }
+
+  async command error_t ClientResource.release[uint8_t client]()
+  {
+    error_t error;
+    if (syncOwner == client)
+      post switchOff();  
+    error = call AdcResource.release[client]();
+    // If syncOwner == client then now there is an inconsistency between 
+    // the state of syncOwner and the actual owner of the Resource 
+    // (which is not owned by anyone, because it was just released). 
+    // The switchOff() task will resolve this incosistency, but a 
+    // client can call ClientResource.request() before this task is 
+    // posted. However, since Resource.granted is signalled in task context,
+    // with a FIFO task scheduler we can be sure that switchOff() will
+    // always be executed before the next Resource.granted event is 
+    // signalled. Unfortunately "TinyOS components MUST NOT assume a 
+    // FIFO policy" (TEP106), that's why there is some additional check
+    // in AdcResource.granted above.
+    return error;
+  }
+
+  task void switchOff()
+  {
+    error_t stopped;
+    // update internal state
+    if (syncOwner != NO_OWNER){
+      if (ref2_5v)
+        stopped = call RefVolt_2_5V.stop();
+      else
+        stopped = call RefVolt_1_5V.stop();
+      if (stopped == SUCCESS)
+        syncOwner = NO_OWNER;
+      else
+        post switchOff();
+    }
+  }
+
+  event void RefVolt_1_5V.stopDone(error_t error)
+  {
+  }
+  
+  event void RefVolt_2_5V.stopDone(error_t error)
+  {
+  }
+
+  async command uint8_t ClientResource.isOwner[uint8_t client]()
+  {
+    return call AdcResource.isOwner[client]();
+  }
+
+  default event void ClientResource.granted[uint8_t client](){}
+  default async command error_t AdcResource.request[uint8_t client]()
+  {
+    return FAIL;
+  }
+  default async command error_t AdcResource.immediateRequest[uint8_t client]()
+  {
+    return FAIL;
+  }
+  default async command bool AdcResource.isOwner[uint8_t client]() { return FALSE; }
+  default async command error_t AdcResource.release[uint8_t client](){return FAIL;}
+  const msp430adc12_channel_config_t defaultConfig = {INPUT_CHANNEL_NONE,0,0,0,0,0,0,0}; 
+  default async command const msp430adc12_channel_config_t*
+    Config.getConfiguration[uint8_t client]()
+  { 
+    return &defaultConfig;
+  }
+}  
+
diff --git a/tos/chips/msp430/adc12/Msp430RefVoltArbiterP.nc b/tos/chips/msp430/adc12/Msp430RefVoltArbiterP.nc
new file mode 100644
index 00000000..2b2a49f3
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430RefVoltArbiterP.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2006, Technische Universität Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:07 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * This component is meant to intercept requests to the <code>Resource</code>
+ * interface on their way to the adc arbiter. It checks whether the client's
+ * adc configuration requires the internal reference voltage generator of the
+ * MSP430 to be enabled during the conversion by inspecting the client's
+ * configuration data (using the <code>AdcConfigure</code> interface). If so it
+ * makes sure that Resource.granted() is held back until the reference voltage
+ * is stable. Clients SHOULD NOT wire to <code>Msp430RefVoltArbiterP</code> but
+ * to the Resource interface provided by
+ * <code>Msp430Adc12ClientAutoRVGC</code>.
+ * 
+ * @author Jan Hauer
+ */
+
+configuration Msp430RefVoltArbiterP
+{
+  provides interface Resource as ClientResource[uint8_t client];
+  uses {
+    interface Resource as AdcResource[uint8_t client];
+    interface AdcConfigure<const msp430adc12_channel_config_t*> as Config[uint8_t client];
+  }
+} implementation {
+  components Msp430RefVoltGeneratorP, Msp430RefVoltArbiterImplP,
+             new TimerMilliC() as SwitchOnDelayTimer, 
+             new TimerMilliC() as SwitchOffDelayTimer,
+             new TimerMilliC() as SwitchOffSettleTimer,
+             HplAdc12P;
+
+  ClientResource = Msp430RefVoltArbiterImplP.ClientResource;
+  AdcResource = Msp430RefVoltArbiterImplP.AdcResource;
+  Config = Msp430RefVoltArbiterImplP;
+
+  Msp430RefVoltArbiterImplP.RefVolt_1_5V -> Msp430RefVoltGeneratorP.RefVolt_1_5V;
+  Msp430RefVoltArbiterImplP.RefVolt_2_5V -> Msp430RefVoltGeneratorP.RefVolt_2_5V;
+  Msp430RefVoltGeneratorP.SwitchOnTimer -> SwitchOnDelayTimer;
+  Msp430RefVoltGeneratorP.SwitchOffTimer -> SwitchOffDelayTimer;
+  Msp430RefVoltGeneratorP.SwitchOffSettleTimer -> SwitchOffSettleTimer;
+  Msp430RefVoltGeneratorP.HplAdc12 -> HplAdc12P;
+}  
+
diff --git a/tos/chips/msp430/adc12/Msp430RefVoltGenerator.h b/tos/chips/msp430/adc12/Msp430RefVoltGenerator.h
new file mode 100644
index 00000000..a702ac59
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430RefVoltGenerator.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2007-03-14 18:14:06 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef REFVOLTGENERATOR_H
+#define REFVOLTGENERATOR_H
+
+// Time for generator to become stable (in ms) - don't change.
+#define MSP430_REFVOLT_STABILIZE_INTERVAL 17
+
+// Delay before generator is actually switched off after it has been stopped 
+// (in ms). This avoids having to wait another 17 ms in case the generator is
+// needed again shortly after it has been stopped.
+#ifndef MSP430_REFVOLT_SWITCHOFF_INTERVAL
+#define MSP430_REFVOLT_SWITCHOFF_INTERVAL 20
+#endif
+
+
+// The two values below depend on the external capacitor CVREF+ (cf. msp430fxxx 
+// datasheet). The values have been measured on the tinynode platform, which
+// applies the TI's reference design (platforms that don't follow this design
+// may want to update the values).
+
+// Time (in ms) for reference voltage to drop from 2.5v to 1.5v
+#ifndef MSP430_REFVOLT_SWITCH_2_5_TO_1_5_INTERVAL
+#define MSP430_REFVOLT_SWITCH_2_5_TO_1_5_INTERVAL 70
+#endif
+
+// Time (in ms) for reference voltage to drop from 2.5v to 1.5v after being disabled
+#ifndef MSP430_REFVOLT_DROP_2_5_TO_1_5_INTERVAL
+#define MSP430_REFVOLT_DROP_2_5_TO_1_5_INTERVAL 2048
+#endif
+
+#endif
diff --git a/tos/chips/msp430/adc12/Msp430RefVoltGeneratorP.nc b/tos/chips/msp430/adc12/Msp430RefVoltGeneratorP.nc
new file mode 100644
index 00000000..f86d9a97
--- /dev/null
+++ b/tos/chips/msp430/adc12/Msp430RefVoltGeneratorP.nc
@@ -0,0 +1,282 @@
+/*
+ * Copyright (c) 2004, Technische Universität Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-03-11 09:42:25 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+module Msp430RefVoltGeneratorP {
+  provides {
+    interface SplitControl as RefVolt_1_5V;
+    interface SplitControl as RefVolt_2_5V;
+  }
+  
+  uses {
+    interface HplAdc12;
+    interface Timer<TMilli> as SwitchOnTimer;
+    interface Timer<TMilli> as SwitchOffTimer;
+    interface Timer<TMilli> as SwitchOffSettleTimer;
+  }
+  
+} 
+
+implementation {
+  
+  typedef enum  {
+    // DO NOT CHANGE ANY OF THE CONSTANTS BELOW!
+    GENERATOR_OFF = 0,
+      
+    REFERENCE_1_5V_STABLE = 1,
+    REFERENCE_2_5V_STABLE = 2,
+
+    REFERENCE_1_5V_ON_PENDING = 3,
+    REFERENCE_2_5V_ON_PENDING = 4,
+
+    REFERENCE_1_5V_OFF_PENDING = 5,
+    REFERENCE_2_5V_OFF_PENDING = 6,
+
+  } state_t;
+
+  state_t m_state;
+
+  /***************** Prototypes ****************/
+  error_t switchOn(uint8_t level);
+  error_t switchOff();
+  void signalStartDone(state_t state, error_t result);
+  void signalStopDone(state_t state, error_t result);
+  error_t start(state_t targetState);
+  error_t stop(state_t nextState);
+  
+  /***************** SplitControl Commands ****************/
+  command error_t RefVolt_1_5V.start() {
+    return start(REFERENCE_1_5V_STABLE);
+  }
+
+  command error_t RefVolt_2_5V.start() {
+    return start(REFERENCE_2_5V_STABLE);
+  }
+
+  command error_t RefVolt_1_5V.stop() {
+    return stop(REFERENCE_1_5V_OFF_PENDING);
+  }
+
+  command error_t RefVolt_2_5V.stop() {
+    return stop(REFERENCE_2_5V_OFF_PENDING);
+  }
+
+  error_t start(state_t targetState){
+    error_t result;
+
+    if (m_state == REFERENCE_1_5V_STABLE || m_state == REFERENCE_2_5V_STABLE) {
+      if (targetState == m_state) {
+        result = EALREADY;
+      } else if ((result = switchOn(targetState)) == SUCCESS) {
+        if (m_state==REFERENCE_1_5V_STABLE) { // targetState==REFERENCE_2_5V_STABLE
+          m_state = REFERENCE_2_5V_ON_PENDING;
+          call SwitchOnTimer.startOneShot(MSP430_REFVOLT_STABILIZE_INTERVAL);
+        } else {
+          m_state = REFERENCE_1_5V_ON_PENDING;
+          call SwitchOnTimer.startOneShot(MSP430_REFVOLT_SWITCH_2_5_TO_1_5_INTERVAL);
+        }
+      }
+    } else if (m_state == GENERATOR_OFF) {
+      if ((result = switchOn(targetState)) == SUCCESS) {
+        if (targetState==REFERENCE_1_5V_STABLE && call SwitchOffSettleTimer.isRunning()) {
+          call SwitchOnTimer.startOneShot(MSP430_REFVOLT_SWITCH_2_5_TO_1_5_INTERVAL);
+        }
+        else
+          call SwitchOnTimer.startOneShot(MSP430_REFVOLT_STABILIZE_INTERVAL);
+        call SwitchOffSettleTimer.stop();
+        m_state = targetState + 2; // +2 turns "XXX_STABLE" state into a "XXX_ON_PENDING" state 
+      }
+    } else if (m_state == REFERENCE_1_5V_OFF_PENDING || m_state == REFERENCE_2_5V_OFF_PENDING) {
+      if ((result = switchOn(targetState)) == SUCCESS) {
+        // there is a pending stop() call
+        state_t oldState = m_state;
+        call SwitchOffTimer.stop();
+        signalStopDone(oldState, FAIL);
+        if (targetState==m_state-4) {
+          m_state=targetState;
+          signalStartDone(targetState, SUCCESS);
+        }
+        else if (m_state==REFERENCE_1_5V_OFF_PENDING) {
+          m_state = REFERENCE_2_5V_ON_PENDING;
+          call SwitchOnTimer.startOneShot(MSP430_REFVOLT_STABILIZE_INTERVAL);
+        }
+        else {
+          m_state = REFERENCE_1_5V_ON_PENDING;
+          call SwitchOnTimer.startOneShot(MSP430_REFVOLT_SWITCH_2_5_TO_1_5_INTERVAL);
+        }
+      }
+    } else if (m_state == targetState + 2) // starting already?
+      result = SUCCESS;
+    else
+      result = EBUSY;
+
+    return result;
+  }
+
+  error_t stop(state_t nextState){
+    error_t result;
+
+    if (m_state == GENERATOR_OFF)
+      result = EALREADY;
+    else if (m_state == REFERENCE_1_5V_STABLE || m_state == REFERENCE_2_5V_STABLE) {
+      result = SUCCESS;
+      m_state = nextState; // m_state becomes a "XXX_OFF_PENDING" state
+      call SwitchOffTimer.startOneShot(MSP430_REFVOLT_SWITCHOFF_INTERVAL);
+    } else if (m_state == REFERENCE_1_5V_ON_PENDING || m_state == REFERENCE_2_5V_ON_PENDING) {
+      if ((result = switchOff()) == SUCCESS) {
+        // there is a pending start() call
+        state_t oldState = m_state;
+        call SwitchOnTimer.stop();
+        m_state = GENERATOR_OFF;
+        signalStartDone(oldState, FAIL);
+        signalStopDone(nextState, SUCCESS);
+      }
+    } else if (m_state == nextState) // stopping already?
+      result = SUCCESS;
+    else
+      result = EBUSY;
+
+    return result;
+  }
+
+  void signalStartDone(state_t state, error_t result){
+    if (state == REFERENCE_1_5V_STABLE || state == REFERENCE_1_5V_ON_PENDING)
+      signal RefVolt_1_5V.startDone(result);
+    else
+      signal RefVolt_2_5V.startDone(result);
+  }
+
+  void signalStopDone(state_t state, error_t result){
+    if (state == REFERENCE_1_5V_STABLE || state == REFERENCE_1_5V_OFF_PENDING)
+      signal RefVolt_1_5V.stopDone(result);
+    else
+      signal RefVolt_2_5V.stopDone(result);
+  }
+
+  /***************** Timer Events ******************/
+  event void SwitchOnTimer.fired() {
+    switch (m_state) {
+      case REFERENCE_1_5V_ON_PENDING:
+        m_state = REFERENCE_1_5V_STABLE;
+        signal RefVolt_1_5V.startDone(SUCCESS);
+        break;
+        
+      case REFERENCE_2_5V_ON_PENDING:
+         m_state = REFERENCE_2_5V_STABLE;
+        signal RefVolt_2_5V.startDone(SUCCESS);
+        break;
+        
+      default:
+        return;
+    }
+  }
+    
+  event void SwitchOffTimer.fired() {
+    switch (m_state) {
+      case REFERENCE_1_5V_OFF_PENDING:
+        if (switchOff() == SUCCESS){
+          m_state = GENERATOR_OFF;
+          signal RefVolt_1_5V.stopDone(SUCCESS);
+          
+        } else {
+          call SwitchOffTimer.startOneShot(MSP430_REFVOLT_SWITCHOFF_INTERVAL);
+        }
+        break;
+        
+      case REFERENCE_2_5V_OFF_PENDING:
+        if (switchOff() == SUCCESS) {
+          m_state = GENERATOR_OFF;
+          signal RefVolt_2_5V.stopDone(SUCCESS);
+          
+          call SwitchOffSettleTimer.startOneShot(MSP430_REFVOLT_DROP_2_5_TO_1_5_INTERVAL);
+        } else {
+          call SwitchOffTimer.startOneShot(MSP430_REFVOLT_SWITCHOFF_INTERVAL);
+        }
+        break;
+        
+      default:
+        break;
+    }
+  }
+  
+  event void SwitchOffSettleTimer.fired() {}
+  
+  /**************** HplAdc12 Events ***************/
+  async event void HplAdc12.conversionDone(uint16_t iv) {
+  }
+
+  /**************** Functions ****************/
+  error_t switchOn(uint8_t level) {
+    atomic {
+      if (call HplAdc12.isBusy()) {
+        return EBUSY;
+        
+      } else {
+        adc12ctl0_t ctl0 = call HplAdc12.getCtl0();
+        ctl0.enc = 0;
+        call HplAdc12.setCtl0(ctl0);
+        ctl0.refon = 1;
+        
+        // This is why we don't change the enum at the top
+        ctl0.r2_5v = level - 1;  
+        call HplAdc12.setCtl0(ctl0);
+        return SUCCESS;
+      }
+    }
+  }
+  
+  error_t switchOff() {
+    atomic {
+      if (call HplAdc12.isBusy()) {
+        return EBUSY;
+        
+      } else {
+        adc12ctl0_t ctl0 = call HplAdc12.getCtl0();
+        ctl0.enc = 0;
+        call HplAdc12.setCtl0(ctl0);
+        ctl0.refon = 0;
+        call HplAdc12.setCtl0(ctl0);
+        return SUCCESS;
+      }
+    }
+  }  
+  
+  /***************** Defaults ****************/
+
+  default event void RefVolt_1_5V.startDone(error_t error){}
+  default event void RefVolt_2_5V.startDone(error_t error){}
+  default event void RefVolt_1_5V.stopDone(error_t error){}
+  default event void RefVolt_2_5V.stopDone(error_t error){}
+}
+
diff --git a/tos/chips/msp430/adc12/README.txt b/tos/chips/msp430/adc12/README.txt
new file mode 100644
index 00000000..71bae58b
--- /dev/null
+++ b/tos/chips/msp430/adc12/README.txt
@@ -0,0 +1,183 @@
+The implementation of the 12-bit ADC stack on the MSP430 is in compliance
+with TEP 101 (tinyos-2.x/doc/txt/tep101.txt) and provides virtualized access
+to the ADC12 by seven different components: AdcReadClientC, AdcReadNowClientC,
+AdcReadStreamClientC, Msp430Adc12ClientC, Msp430Adc12ClientAutoDMAC,
+Msp430Adc12ClientAutoRVGC and Msp430Adc12ClientAutoDMA_RVGC. A client
+component may wire to any of these components and it SHOULD NOT wire to any
+other components in 'tinyos-2.x/tos/chips/msp430/adc12'. This document
+explains the difference between the seven components.
+
+
+1. HIL
+====================================================================
+
+
+A platform-independent application (an application like 'Oscilloscope' that is
+supposed to run on, for example, the 'telosb' and 'micaz' platform at the same
+time) cannot wire to an MSP430-specific interface like Msp430Adc12SingleChannel
+(there is no MSP430 on micaz).  Instead such an application may access the
+MSP430 ADC through any of the three following components:
+
+  * AdcReadClientC: to read single ADC values
+  * AdcReadNowClientC: to read single ADC values asynchronously (fast)
+  * AdcReadStreamClientC: to read multiple ADC values
+
+These components are less efficient than the MSP430-specific ADC components
+(described below), but they provide standard TinyOS interfaces for reading ADC
+values. Thus, if a client component does not care so much about efficiency but
+rather about portability it should wire to any of these components.
+
+
+2. HAL
+====================================================================
+
+An application that is written for an MSP430-based platform like 'eyesIFX' or
+'telosb' can access the ADC12 in a more efficient way via two interfaces: (1)
+the Msp430Adc12SingleChannel allows to perform one or more ADC conversions on a
+single channel with a specified sampling frequency and (2) the
+Msp430Adc12MultiChannel allows to sample a group of up to 16 different ADC
+channels.
+
+On the MSP430 two additional hardware modules may play a role when the ADC12 is
+used: the internal reference voltage generator and the DMA controller. 
+
+The voltage generator outputs stabilized voltage of 1.5 V or 2.5 V, which may
+be used as reference voltage in the conversion process. Whether the internal
+reference voltage generator should be enabled during the conversion is
+platform-specific (e.g. the light sensor on the 'eyesIFX' requires a stable
+reference voltage). When an application requires a stable reference voltage
+during the sampling process it should wire to the Msp430Adc12ClientAutoRVGC
+component. This assures that when the app is signalled the Resource.granted()
+event the reference voltage generator outputs a stable voltage (the level is
+defined in the configuration data supplied by the application). There are two
+more things to note: first, the generator is not switched off immediately, when
+the client calls Resource.release(), but only after some pre-defined interval
+(see Msp430RefVoltGenerator.h). This can avoid a power-up delay when multiple
+clients are present. Second, one must not forget to wire the AdcConfigure
+interface to the Msp430Adc12ClientAutoRVGC or Msp430Adc12ClientAutoDMA_RVGC
+component in addition to configuring the ADC through the
+Msp430Adc12SingleChannel interface (a nesC warning will be signalled).
+  
+The DMA controller can be used to copy conversion data from the ADC registers
+to the application buffer. DMA is only present on MSP430x15x and MSP430x16x
+devices. When an application wants to use the DMA it can wire to the
+Msp430Adc12ClientAutoDMAC component and then conversion results are transferred
+using DMA. Both, enabling the reference generator and using the DMA, therefore
+happens transparent to the app. There are four possible combinations reflected
+by the following components that an MSP430-based application may wire to:
+
+  * Msp430Adc12ClientC: no DMA, no automatic reference voltage
+  * Msp430Adc12ClientAutoRVGC: automatic reference voltage, but no DMA
+  * Msp430Adc12ClientAutoDMAC: DMA, but no automatic reference voltage
+  * Msp430Adc12ClientAutoDMA_RVGC: DMA and automatic reference voltage
+
+Currently Msp430Adc12MultiChannel is only provided by the first two components.
+
+I/O PINs
+--------------------------------------------------------------------
+
+During a conversion the respective ADC port pin (ports 6.0 - 6.7) must be
+configured such that the peripheral module function is selected and the port
+pin is switched to input direction. By default, for every client this is done
+**automatically** in the ADC stack (Msp430Adc12ImplP), i.e. just before the
+conversion starts the respective pin is switched to peripheral module function
+and input direction and immediately after the conversion has finished it is
+switched to I/O function mode. To disable this feature please comment out the
+"ADC12_P6PIN_AUTO_CONFIGURE" macro in Msp430Adc12.h.
+
+
+Configuration for single channel conversions
+--------------------------------------------------------------------
+
+The msp430adc12_channel_config_t struct holds all information needed to
+configure the ADC12 for single channel conversions. The flags come from the
+following MSP430 registers: ADC12CTL0, ADC12CTL1, ADC12MCTLx and TACTL and are
+named according to the "MSP430x1xx Family User's Guide". Their meaning is as
+follows:
+
+  .inch: ADC12 input channel (ADC12MCTLx register). An (external) input
+  channel maps to one of msp430's A0-A7 pins (see device specific data sheet).
+
+  .sref: reference voltage (ADC12MCTLx register). If REFERENCE_VREFplus_AVss
+  or REFERENCE_VREFplus_VREFnegterm is chosen AND the client wires to the
+  Msp430Adc12ClientAutoRVGC or Msp430Adc12ClientAutoDMA_RVGC component then
+  the reference voltage generator has automatically been enabled to the
+  voltage level defined by the "ref2_5v" flag (see below) when the
+  Resource.granted() event is signalled to the client. Otherwise this flag is
+  ignored.
+  
+  .ref2_5v: Reference generator voltage level (ADC12CTL0 register). See
+  "sref".
+  
+  .adc12ssel: ADC12 clock source select for the sample-hold-time (ADC12CTL1
+  register). In combination the "adc12ssel", "adc12div" and "sht" define the
+  sample-hold-time: "adc12ssel" defines the clock source, "adc12div" defines
+  the ADC12 clock divider and "sht" define the time expressed in jiffies.
+  (the sample-hold-time depends on the resistence of the attached sensor, and
+  is calculated using to the formula in section 17.2.4 of the user guide)
+  
+  .adc12div: ADC12 clock divider (ADC12CTL1 register). See "adc12ssel".
+  
+  .sht: Sample-and-hold time (ADC12CTL1 register). See "adc12ssel".
+  
+  .sampcon_ssel: Clock source for the sampling period (TASSEL for TimerA).
+  When an ADC client specifies a non-zero "jiffies" parameter (using the
+  Msp430Adc12SingleChannel.configureX commands), the ADC
+  implementation will automatically configure TimerA to be sourced from
+  "sampcon_ssel" with an input divider of "sampcon_id". During the sampling
+  process TimerA will be used to trigger a single
+  (Msp430Adc12SingleChannel interface) or a sequence of (Msp430Adc12MultiChannel 
+  interface) conversions every "jiffies" clock ticks.
+  
+  .sampcon_id: Input divider for "sampcon_ssel"  (IDx in TACTL register,
+  TimerA). See "sampcon_ssel".
+
+
+Example: Assuming that SMCLK runs at 1 (binary) MHz the following code snippet
+performs 2048 ADC conversions on channel A2 with a sampling frequency of 4096 Hz.
+The sampling period is defined by the combination of SAMPCON_SOURCE_SMCLK,
+SAMPCON_CLOCK_DIV_1 and a "jiffies" parameter of (2^20 / 4096) = (1048576 / 4096) =
+= 256 jiffies. 
+
+ 
+   #define NUM_SAMPLES 2048
+   uint16_t buffer[NUM_SAMPLES];
+   
+   const msp430adc12_channel_config_t config = {
+    INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_NONE,
+    SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES,
+    SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 
+   };
+  
+  event void Boot.booted()
+  {
+    call Resource.request();
+  }
+  
+  event void Resource.granted()
+  {
+    error_t result;
+    result = call SingleChannel.configureMultiple(&config, buffer, NUM_SAMPLES, 256);
+    if (result == SUCCESS)
+      call SingleChannel.getData();
+  }
+
+  async event uint16_t* SingleChannel.multipleDataReady(uint16_t *buf, uint16_t length)
+  {
+    // buffer contains conversion results
+  }
+
+
+3. Implementation
+====================================================================
+
+The ADC12 stack is located at tinyos-2.x/tos/chips/msp430/adc12. Sensor
+wrappers for the msp430 internal sensors are in
+tinyos-2.x/tos/chips/msp430/sensors, an HAL test app can be found in
+tinyos-2.x/apps/tests/msp430/Adc12.
+
+-----
+
+$Date: 2008/04/07 09:41:55 $
+@author: Jan Hauer <hauer@tkn.tu-berlin.de>
+
diff --git a/tos/chips/msp430/adc12/WireAdcStreamP.nc b/tos/chips/msp430/adc12/WireAdcStreamP.nc
new file mode 100644
index 00000000..cb232b9f
--- /dev/null
+++ b/tos/chips/msp430/adc12/WireAdcStreamP.nc
@@ -0,0 +1,40 @@
+/* $Id: WireAdcStreamP.nc,v 1.1 2008-04-07 09:41:55 janhauer Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Support component for AdcReadStreamClientC.
+ *
+ * @author David Gay
+ * @author Jan Hauer 
+ */
+
+#include "Msp430Adc12.h"
+
+configuration WireAdcStreamP {
+  provides interface ReadStream<uint16_t>[uint8_t client];
+  uses {
+    interface AdcConfigure<const msp430adc12_channel_config_t*>[uint8_t client];
+    interface Msp430Adc12SingleChannel[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  components AdcStreamP, MainC, new AlarmMilli32C() as Alarm, 
+    new ArbitratedReadStreamC(uniqueCount(ADCC_READ_STREAM_SERVICE), uint16_t) as ArbitrateReadStream;
+
+  ReadStream = ArbitrateReadStream;
+  AdcConfigure = AdcStreamP;
+  Resource = ArbitrateReadStream;
+
+  ArbitrateReadStream.Service -> AdcStreamP;
+
+  AdcStreamP.Init <- MainC;
+  Msp430Adc12SingleChannel = AdcStreamP.SingleChannel;
+  AdcStreamP.Alarm -> Alarm;
+}
diff --git a/tos/chips/msp430/dma/HplMsp430DmaC.nc b/tos/chips/msp430/dma/HplMsp430DmaC.nc
new file mode 100644
index 00000000..f7671774
--- /dev/null
+++ b/tos/chips/msp430/dma/HplMsp430DmaC.nc
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+configuration HplMsp430DmaC {
+
+  provides interface HplMsp430DmaControl as Control;
+  provides interface HplMsp430DmaChannel as Channel0;
+  provides interface HplMsp430DmaChannel as Channel1;
+  provides interface HplMsp430DmaChannel as Channel2;
+
+}
+
+implementation {
+
+  components HplMsp430DmaP;
+  components new HplMsp430DmaXP( DMA0CTL_, DMA0SA_, DMA0DA_,
+				 DMA0SZ_, DMA0TSEL_MASK, 
+				 DMA0TSEL_SHIFT ) as Dma0;
+  components new HplMsp430DmaXP( DMA1CTL_, DMA1SA_, DMA1DA_,
+				 DMA1SZ_, DMA1TSEL_MASK, 
+				 DMA1TSEL_SHIFT ) as Dma1;
+  components new HplMsp430DmaXP( DMA2CTL_, DMA2SA_, DMA2DA_,
+				 DMA2SZ_, DMA2TSEL_MASK, 
+				 DMA2TSEL_SHIFT ) as Dma2;
+
+  Control = HplMsp430DmaP;
+  Channel0 = Dma0;
+  Channel1 = Dma1;
+  Channel2 = Dma2;
+  Dma0.Interrupt -> HplMsp430DmaP;
+  Dma1.Interrupt -> HplMsp430DmaP;
+  Dma2.Interrupt -> HplMsp430DmaP;
+
+}
+
diff --git a/tos/chips/msp430/dma/HplMsp430DmaChannel.nc b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc
new file mode 100644
index 00000000..d5ef3bd0
--- /dev/null
+++ b/tos/chips/msp430/dma/HplMsp430DmaChannel.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+interface HplMsp430DmaChannel {
+  async command error_t setTrigger(dma_trigger_t trigger);
+  async command void clearTrigger();
+  async command void setSingleMode();
+  async command void setBlockMode();
+  async command void setBurstMode();
+  async command void setRepeatedSingleMode();
+  async command void setRepeatedBlockMode();
+  async command void setRepeatedBurstMode();
+  async command void setSrcNoIncrement();
+  async command void setSrcDecrement();
+  async command void setSrcIncrement();
+  async command void setDstNoIncrement();
+  async command void setDstDecrement();
+  async command void setDstIncrement();
+  async command void setWordToWord(); 
+  async command void setByteToWord(); 
+  async command void setWordToByte(); 
+  async command void setByteToByte(); 
+  async command void setEdgeSensitive();
+  async command void setLevelSensitive();
+
+  async command void enableDMA();
+  async command void disableDMA();
+
+  async command void enableInterrupt() ; 
+  async command void disableInterrupt() ; 
+
+  async command bool interruptPending();
+
+  async command bool aborted();
+  async command void triggerDMA();
+
+  async command void setSrc(void *saddr);
+  async command void setDst(void *daddr);
+  async command void setSize(uint16_t sz);
+
+  async command void setState(dma_channel_state_t s, dma_channel_trigger_t t, void* src, void* dest, uint16_t size);
+  async command void setStateRaw(uint16_t state, uint16_t trigger, void* src, void* dest, uint16_t size);
+  async command dma_channel_state_t getState();
+  async command void* getSource();
+  async command void* getDestination();
+  async command uint16_t getSize();
+  async command dma_channel_trigger_t getTrigger();
+
+  async command void reset();
+
+  async event void transferDone(error_t success);
+}
diff --git a/tos/chips/msp430/dma/HplMsp430DmaControl.nc b/tos/chips/msp430/dma/HplMsp430DmaControl.nc
new file mode 100644
index 00000000..febe9877
--- /dev/null
+++ b/tos/chips/msp430/dma/HplMsp430DmaControl.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+#include "Msp430Dma.h"
+
+interface HplMsp430DmaControl {
+
+  async command void setOnFetch();
+  async command void clearOnFetch();
+  async command void setRoundRobin();
+  async command void clearRoundRobin();
+  async command void setENNMI();
+  async command void clearENNMI();
+  async command void setState(dma_state_t s);
+  async command dma_state_t getState();
+  async command void reset();
+}
diff --git a/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc b/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc
new file mode 100644
index 00000000..869f2fc4
--- /dev/null
+++ b/tos/chips/msp430/dma/HplMsp430DmaInterrupt.nc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+interface HplMsp430DmaInterrupt {
+  async event void fired();
+}
diff --git a/tos/chips/msp430/dma/HplMsp430DmaP.nc b/tos/chips/msp430/dma/HplMsp430DmaP.nc
new file mode 100644
index 00000000..d3121f5f
--- /dev/null
+++ b/tos/chips/msp430/dma/HplMsp430DmaP.nc
@@ -0,0 +1,126 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Joe Polastre <info@moteiv.com>
+ * @version $Revision: 1.8 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+module HplMsp430DmaP {
+
+  provides interface HplMsp430DmaControl as DmaControl;
+  provides interface HplMsp430DmaInterrupt as Interrupt;
+
+}
+
+implementation {
+
+  MSP430REG_NORACE( DMACTL0 );
+  MSP430REG_NORACE( DMACTL1 );
+
+  TOSH_SIGNAL( DACDMA_VECTOR ) {
+    signal Interrupt.fired();
+  }
+
+  async command void DmaControl.setOnFetch(){
+    DMACTL1 |= DMAONFETCH;
+  }
+
+  async command void DmaControl.clearOnFetch(){
+    DMACTL1 &= ~DMAONFETCH;
+  }
+
+  async command void DmaControl.setRoundRobin(){
+    DMACTL1 |= ROUNDROBIN;
+  }
+  async command void DmaControl.clearRoundRobin(){
+    DMACTL1 &= ~ROUNDROBIN;
+  }
+
+  async command void DmaControl.setENNMI(){
+    DMACTL1 |= ENNMI;
+  }
+
+  async command void DmaControl.clearENNMI(){
+    DMACTL1 &= ~ENNMI;
+  }
+
+  async command void DmaControl.setState(dma_state_t s){
+    DMACTL1 = *(int*)&s;
+  }
+
+  async command dma_state_t DmaControl.getState(){
+    dma_state_t s;
+    s = *(dma_state_t*)&DMACTL1;
+    return s;
+  }
+
+  async command void DmaControl.reset(){
+    DMACTL0 = 0;
+    DMACTL1 = 0;
+  }
+
+}
+
diff --git a/tos/chips/msp430/dma/HplMsp430DmaXP.nc b/tos/chips/msp430/dma/HplMsp430DmaXP.nc
new file mode 100644
index 00000000..f9f63455
--- /dev/null
+++ b/tos/chips/msp430/dma/HplMsp430DmaXP.nc
@@ -0,0 +1,294 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Joe Polastre <info@moteiv.com>
+ * @author Mark Hays
+ * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+generic module HplMsp430DmaXP( uint16_t DMAxCTL_addr,
+			       uint16_t DMAxSA_addr,
+			       uint16_t DMAxDA_addr,
+			       uint16_t DMAxSZ_addr,
+			       uint16_t DMAxTSEL_mask,
+			       uint16_t DMAxTSEL_shift ) @safe() {
+  
+  provides interface HplMsp430DmaChannel as DMA;
+  uses interface HplMsp430DmaInterrupt as Interrupt;
+
+}
+
+implementation {
+
+  MSP430REG_NORACE( DMACTL0 );
+
+#define DMAxCTL (*(volatile TYPE_DMA0CTL*)DMAxCTL_addr)
+#define DMAxSA (*(volatile TYPE_DMA0SA*)DMAxSA_addr)
+#define DMAxDA (*(volatile TYPE_DMA0DA*)DMAxDA_addr)
+#define DMAxSZ (*(volatile TYPE_DMA0SZ*)DMAxSZ_addr)
+
+  async event void Interrupt.fired() {
+    error_t error = ( DMAxCTL & DMAABORT ) ? FAIL : SUCCESS;
+    if ( DMAxCTL & DMAIFG ) {
+      DMAxCTL &= ~DMAIFG;
+      DMAxCTL &= ~DMAABORT;
+      signal DMA.transferDone( error );
+    }
+  }
+
+  async error_t command DMA.setTrigger( dma_trigger_t trigger ) {
+
+    if ( DMAxCTL & DMAEN )
+      return FAIL;
+
+    DMACTL0 = ( ( DMACTL0 & ~DMAxTSEL_mask ) |
+		( ( trigger << DMAxTSEL_shift ) & DMAxTSEL_mask ) );
+
+    return SUCCESS;
+
+  }
+
+  async command void DMA.clearTrigger() {
+    DMACTL0 &= ~DMAxTSEL_mask;
+  }
+
+  async command void DMA.setSingleMode() {
+    DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 );
+    DMAxCTL |= DMA_SINGLE_TRANSFER;
+  }
+
+  async command void DMA.setBlockMode() {
+    DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 );
+    DMAxCTL |= DMA_BLOCK_TRANSFER;
+  }
+
+  async command void DMA.setBurstMode() {
+    DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 );
+    DMAxCTL |= DMA_BURST_BLOCK_TRANSFER;
+  }
+
+  async command void DMA.setRepeatedSingleMode() {
+    DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 );
+    DMAxCTL |= DMA_REPEATED_SINGLE_TRANSFER;
+  }
+
+  async command void DMA.setRepeatedBlockMode() {
+    DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 );
+    DMAxCTL |= DMA_REPEATED_BLOCK_TRANSFER;
+  }
+
+  async command void DMA.setRepeatedBurstMode() {
+    DMAxCTL &= ~( DMADT0 | DMADT1 | DMADT2 );
+    DMAxCTL |= DMA_REPEATED_BURST_BLOCK_TRANSFER;
+  }
+
+  async command void DMA.setSrcNoIncrement() {
+    DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 );
+    DMAxCTL |= DMA_ADDRESS_UNCHANGED;
+  }
+
+  async command void DMA.setSrcDecrement() {
+    DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 );
+    DMAxCTL |= DMA_ADDRESS_DECREMENTED;
+  }
+
+  async command void DMA.setSrcIncrement() {
+    DMAxCTL &= ~( DMASRCINCR0 | DMASRCINCR1 );
+    DMAxCTL |= DMA_ADDRESS_INCREMENTED;
+  }
+
+  async command void DMA.setDstNoIncrement() {
+    DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 );
+    DMAxCTL |= DMA_ADDRESS_UNCHANGED;
+  }          
+
+  async command void DMA.setDstDecrement() {
+    DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 );
+    DMAxCTL |= DMA_ADDRESS_DECREMENTED;
+  }
+
+  async command void DMA.setDstIncrement() {
+    DMAxCTL &= ~( DMADSTINCR0 | DMADSTINCR1 );
+    DMAxCTL |= DMA_ADDRESS_INCREMENTED;
+  }
+
+  async command void DMA.setWordToWord() {
+    DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE);
+    DMAxCTL |= DMASWDW;
+  }
+
+  async command void DMA.setByteToWord() {
+    DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE);
+    DMAxCTL |= DMASBDW;
+  }
+
+  async command void DMA.setWordToByte() {
+    DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE);
+    DMAxCTL |= DMASWDB;
+  }
+
+  async command void DMA.setByteToByte() {
+    DMAxCTL &= ~(DMASRCBYTE | DMADSTBYTE);
+    DMAxCTL |= DMASBDB;
+  }
+
+  async command void DMA.setEdgeSensitive() {
+    DMAxCTL &= ~DMALEVEL;
+  }
+
+  async command void DMA.setLevelSensitive() {
+    DMAxCTL |= DMALEVEL;
+  }
+
+  async command void DMA.enableDMA() { 
+    DMAxCTL |= DMAEN; 
+  }
+
+  async command void DMA.disableDMA() { 
+    DMAxCTL &= ~DMAEN; 
+  }
+
+  async command void DMA.enableInterrupt() {
+    DMAxCTL |= DMAIE;
+  }
+
+  async command void DMA.disableInterrupt() {
+    DMAxCTL &= ~DMAIE;
+  }
+
+  async command bool DMA.interruptPending() {
+    return !!( DMAxCTL & DMAIFG );
+  }
+
+  async command bool DMA.aborted() {
+    return !!( DMAxCTL & DMAABORT );
+  }
+  
+  async command void DMA.triggerDMA() { 
+    DMAxCTL |= DMAREQ; 
+  }
+  
+  async command void DMA.setSrc( void *saddr ) {
+    DMAxSA = (uint16_t)saddr;
+  }
+  
+  async command void DMA.setDst( void *daddr ) {
+    DMAxDA = (uint16_t)daddr;
+  }
+  
+  async command void DMA.setSize( uint16_t sz ) {
+    DMAxSZ = sz;
+  }
+
+  async command void DMA.setState( dma_channel_state_t s, 
+				   dma_channel_trigger_t t, 
+				   void* src, void* dest, 
+				   uint16_t size ) {
+    call DMA.setStateRaw( *(uint16_t*)&s, *(uint16_t*)&t,
+			  src, dest, size);
+  }
+
+  async command void DMA.setStateRaw( uint16_t s, uint16_t t, 
+				      void* src, void* dest, 
+				      uint16_t size ) {
+    DMAxSA = (uint16_t)src;
+    DMAxDA = (uint16_t)dest;
+    DMAxSZ = size;
+    call DMA.setTrigger((dma_trigger_t) t);
+    DMAxCTL = s;
+  }
+
+  async command dma_channel_state_t DMA.getState() {
+    dma_channel_state_t s = *(dma_channel_state_t*) &DMAxCTL;
+    return s;
+  }
+
+  async command void* DMA.getSource() {
+    return (void*)DMAxSA;
+  }
+
+  async command void* DMA.getDestination() {
+    return (void*)DMAxDA;
+  }
+
+  async command uint16_t DMA.getSize() {
+    return DMAxSZ;
+  }
+
+  async command dma_channel_trigger_t DMA.getTrigger() {
+    dma_channel_trigger_t t;
+    t.trigger = ( DMACTL0 & DMAxTSEL_mask ) >> DMAxTSEL_shift;
+    return t;
+  }
+
+  async command void DMA.reset() {
+    DMAxCTL = 0;
+    DMAxSA = 0;
+    DMAxDA = 0;
+    DMAxSZ = 0;
+  }
+}
+
diff --git a/tos/chips/msp430/dma/Msp430Dma.h b/tos/chips/msp430/dma/Msp430Dma.h
new file mode 100644
index 00000000..d3363ef9
--- /dev/null
+++ b/tos/chips/msp430/dma/Msp430Dma.h
@@ -0,0 +1,210 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Mark Hays
+ * $Revision: 1.6 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+#ifndef MSP430DMA_H
+#define MSP430DMA_H
+
+// General stuff
+enum {
+  DMA_CHANNELS = 3
+};
+
+enum {
+  DMA_CHANNEL0 = 0,
+  DMA_CHANNEL1 = 1,
+  DMA_CHANNEL2 = 2,
+  DMA_CHANNEL_UNKNOWN = 3
+};
+
+enum { 
+  DMA_CHANNEL_AVAILABLE = 0,
+  DMA_CHANNEL_IN_USE    = 1
+};
+
+////////////////////////////////////////
+// Per-channel fields in DMACTL0
+enum {
+  DMA0TSEL_SHIFT = 0,
+  DMA1TSEL_SHIFT = 4,
+  DMA2TSEL_SHIFT = 8,
+  DMATSEL_MASK   = (uint16_t)0xf,
+  DMA0TSEL_MASK  = ( 0xf ),
+  DMA1TSEL_MASK  = ( 0xf0 ),
+  DMA2TSEL_MASK  = ( 0xf00 ),
+};
+
+// Per-field (channel) in DMACTL0
+typedef enum {
+  DMA_TRIGGER_DMAREQ =          0x0, // software trigger
+  DMA_TRIGGER_TACCR2 =          0x1,            
+  DMA_TRIGGER_TBCCR2 =          0x2,
+  DMA_TRIGGER_URXIFG0 =         0x3, // RX on USART0 (UART/SPI)
+  DMA_TRIGGER_UTXIFG0 =         0x4, // TX on USART0 (UART/SPI)
+  DMA_TRIGGER_DAC12IFG =        0x5, // DAC12_0CTL DAC12IFG bit
+  DMA_TRIGGER_ADC12IFGx =       0x6, 
+  DMA_TRIGGER_TACCR0 =          0x7, // CCIFG bit
+  DMA_TRIGGER_TBCCR0 =          0x8, // CCIFG bit
+  DMA_TRIGGER_URXIFG1 =         0x9, // RX on USART1 (UART/SPI)
+  DMA_TRIGGER_UTXIFG1 =         0xa, // TX on USART1 (UART/SPI)
+  DMA_TRIGGER_MULT =            0xb, // Hardware Multiplier Ready
+  DMA_TRIGGER_DMAxIFG =         0xe, // DMA0IFG triggers DMA channel 1
+                                     // DMA1IFG triggers DMA channel 2
+                                     // DMA2IFG triggers DMA channel 0
+  DMA_TRIGGER_DMAE0 =           0xf  // External Trigger DMAE0
+} dma_trigger_t;
+
+typedef struct dma_channel_trigger_s {
+  unsigned int trigger : 4; 
+  unsigned int reserved : 12;
+} __attribute__ ((packed)) dma_channel_trigger_t;
+
+////////////////////////////////////////
+// Bits in DMACTL1
+enum {
+  DISABLE_NMI = 0,
+  ENABLE_NMI  = 1,
+};
+
+enum {
+  NOT_ROUND_ROBIN = 0,
+  ROUND_ROBIN     = 1,
+};
+
+enum {
+  NOT_ON_FETCH = 0,
+  ON_FETCH     = 1,
+};
+
+typedef struct dma_state_s {
+  unsigned int enableNMI : 1;
+  unsigned int roundRobin : 1;
+  unsigned int onFetch : 1;
+  unsigned int reserved : 13;
+} __attribute__ ((packed)) dma_state_t;
+
+////////////////////////////////////////
+// Stuff in DMAxCTL
+
+// DMADTx
+enum {
+  DMADT_SHIFT = 12,
+  DMADT_MASK  = 0x7,
+};
+
+typedef enum {
+  DMA_SINGLE_TRANSFER               = 0x0,
+  DMA_BLOCK_TRANSFER                = 0x1,
+  DMA_BURST_BLOCK_TRANSFER          = 0x2,
+  DMA_REPEATED_SINGLE_TRANSFER      = 0x4,
+  DMA_REPEATED_BLOCK_TRANSFER       = 0x5,
+  DMA_REPEATED_BURST_BLOCK_TRANSFER = 0x7
+} dma_transfer_mode_t;
+
+// DMA{SRC,DST}INCRx
+enum {
+  DMASRCINCR_SHIFT = 8,
+  DMADSTINCR_SHIFT = 10,
+  DMAINCR_MASK     = 0x3,
+};
+
+typedef enum {
+  DMA_ADDRESS_UNCHANGED   = 0x0,
+  DMA_ADDRESS_DECREMENTED = 0x2,
+  DMA_ADDRESS_INCREMENTED = 0x3
+} dma_incr_t;
+
+typedef enum {
+  DMA_WORD = 0x0,
+  DMA_BYTE = 0x1
+} dma_byte_t;
+
+// DMALEVEL
+typedef enum {
+  DMA_EDGE_SENSITIVE  = 0x0,
+  DMA_LEVEL_SENSITIVE = 0x1
+} dma_level_t;
+
+typedef struct dma_channel_state_s {
+  unsigned int request : 1;
+  unsigned int abort : 1;
+  unsigned int interruptEnable : 1;
+  unsigned int interruptFlag : 1;
+  unsigned int enable : 1;
+  unsigned int level : 1;            /* or edge- triggered */
+  unsigned int srcByte : 1;          /* or word */
+  unsigned int dstByte : 1;
+  unsigned int srcIncrement : 2;     /* or no-increment, decrement */
+  unsigned int dstIncrement : 2;
+  unsigned int transferMode : 3;
+  unsigned int reserved2 : 1;
+} __attribute__ ((packed)) dma_channel_state_t;
+
+#endif
+
diff --git a/tos/chips/msp430/dma/Msp430DmaC.nc b/tos/chips/msp430/dma/Msp430DmaC.nc
new file mode 100644
index 00000000..33eb467a
--- /dev/null
+++ b/tos/chips/msp430/dma/Msp430DmaC.nc
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the HAL level component for the MSP430 DMA module.
+ * This configuration provides the available DMA channels through the
+ * MSP430DMA parameterized interface.  If more channels are requested
+ * than available through unique("DMA"), there will be no mapping for
+ * that channel and compilation will fail.
+ *
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Joe Polastre <info@moteiv.com>
+ * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+configuration Msp430DmaC {
+
+  provides interface Msp430DmaControl as Control;
+  provides interface Msp430DmaChannel as Channel0;
+  provides interface Msp430DmaChannel as Channel1;
+  provides interface Msp430DmaChannel as Channel2;
+
+}
+implementation {
+
+  components HplMsp430DmaC as HplDmaC;
+
+  components new Msp430DmaChannelP() as Channel0P;
+  Channel0 = Channel0P;
+  Channel0P.HplChannel -> HplDmaC.Channel0;
+
+  components new Msp430DmaChannelP() as Channel1P;
+  Channel1 = Channel1P;
+  Channel1P.HplChannel -> HplDmaC.Channel1;
+
+  components new Msp430DmaChannelP() as Channel2P;
+  Channel2 = Channel2P;
+  Channel2P.HplChannel -> HplDmaC.Channel2;
+
+  components Msp430DmaControlP as ControlP;
+  Control = ControlP;
+  ControlP.HplControl -> HplDmaC;
+  ControlP.HplChannel0 -> HplDmaC.Channel0;
+  ControlP.HplChannel1 -> HplDmaC.Channel1;
+  ControlP.HplChannel2 -> HplDmaC.Channel2;
+
+}
diff --git a/tos/chips/msp430/dma/Msp430DmaChannel.nc b/tos/chips/msp430/dma/Msp430DmaChannel.nc
new file mode 100644
index 00000000..f476b37f
--- /dev/null
+++ b/tos/chips/msp430/dma/Msp430DmaChannel.nc
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @author Joe Polastre <info@moteiv.com>
+ * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+#include "Msp430Dma.h"
+
+interface Msp430DmaChannel {
+
+  /**
+   * Setup a transfer using explicit argument (most robust and simple
+   * mechanism and recommended for novice users)
+   *
+   * See MSP430DMA.h for parameter options
+   */
+  async command error_t setupTransfer( dma_transfer_mode_t transfer_mode, 
+				       dma_trigger_t trigger, 
+				       dma_level_t level,
+				       void *src_addr, 
+				       void *dst_addr, 
+				       uint16_t size,
+				       dma_byte_t src_byte, 
+				       dma_byte_t dst_byte,
+				       dma_incr_t src_incr, 
+				       dma_incr_t dst_incr );
+  
+  /**
+   * Raw interface for setting up a DMA transfer.  This function is
+   * intended to provide as much raw performance as possible but
+   * sacrifices type checking in the process.  Recommended ONLY for
+   * advanced users that have very intricate knowledge of the MSP430
+   * DMA module described in the user's guide.
+   *
+   * @param state The control register value, as specified by 
+   *              dma_control_state_t in MSP430DMA.h
+   * @param trigger The trigger for the DMA transfer.  Should be one
+   *                of the options from dma_trigger_t in MSP430DMA.h
+   * @param src Pointer to the source address
+   * @param dest Pointer to the destination address
+   * @param size Size of the DMA transfer
+   *
+   * See MSP430DMA.h for parameter options
+   */
+  async command void setupTransferRaw( uint16_t state, uint16_t trigger,
+				       void* src, void* dest, int size );
+
+  /**
+   * Enable the DMA module.  Equivalent to setting the DMA enable bit.
+   * This function does not force a transfer.
+   */
+  async command error_t startTransfer();
+
+  /**
+   * Repeat a DMA transfer using previous settings but new pointers
+   * and transfer size.  Automatically starts the transfer (sets the
+   * enable bit).
+   */
+  async command error_t repeatTransfer( void *src_addr, void *dst_addr, 
+					uint16_t size );
+
+  /**
+   * Trigger a DMA transfer using software
+   */
+  async command error_t softwareTrigger();
+
+  /**
+   * Stop a DMA transfer in progress
+   */
+  async command error_t stopTransfer();
+
+  /**
+   * Notification that the transfer has completed
+   */
+  async event void transferDone(error_t success);
+
+}
diff --git a/tos/chips/msp430/dma/Msp430DmaChannelP.nc b/tos/chips/msp430/dma/Msp430DmaChannelP.nc
new file mode 100644
index 00000000..d77ceb88
--- /dev/null
+++ b/tos/chips/msp430/dma/Msp430DmaChannelP.nc
@@ -0,0 +1,160 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Joe Polastre <info@moteiv.com>
+ * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+#include "Msp430Dma.h"
+
+generic module Msp430DmaChannelP() {
+
+  provides interface Msp430DmaChannel as Channel;
+  uses interface HplMsp430DmaChannel as HplChannel;
+
+}
+
+implementation {
+
+  norace dma_channel_state_t gChannelState;
+  norace dma_channel_trigger_t gChannelTrigger;
+  
+  async command void Channel.setupTransferRaw( uint16_t s, uint16_t t, 
+					       void* src, void* dest, 
+					       int size ) {
+    call HplChannel.setStateRaw( s, t, src, dest, size );
+  }
+  
+  async command error_t Channel.setupTransfer( dma_transfer_mode_t transfer_mode, 
+					   dma_trigger_t trigger, 
+					   dma_level_t level,
+					   void *src_addr, 
+					   void *dst_addr, 
+					   uint16_t size,
+					   dma_byte_t src_byte, 
+					   dma_byte_t dst_byte,
+					   dma_incr_t src_incr, 
+					   dma_incr_t dst_incr ) {
+    
+    gChannelState.request = 0;
+    gChannelState.abort = 0;
+    gChannelState.interruptEnable = 1;
+    gChannelState.interruptFlag = 0;
+    gChannelState.enable = 0;          /* don't start an xfer */
+    gChannelState.level = level;
+    gChannelState.srcByte = src_byte;
+    gChannelState.dstByte = dst_byte;
+    gChannelState.srcIncrement = src_incr;
+    gChannelState.dstIncrement = dst_incr;
+    gChannelState.transferMode = transfer_mode;
+    
+    gChannelTrigger.trigger = trigger;
+    
+    call HplChannel.setState( gChannelState, gChannelTrigger,
+			      src_addr, dst_addr, size );
+    
+    return SUCCESS;
+    
+  }
+  
+  async command error_t Channel.startTransfer() {
+    call HplChannel.enableDMA();
+    return SUCCESS;
+  }
+  
+  async command error_t Channel.repeatTransfer( void *src_addr, 
+						void *dst_addr, 
+						uint16_t size ) {
+    call HplChannel.setSrc( src_addr );
+    call HplChannel.setDst(dst_addr);
+    call HplChannel.setSize(size);
+    call HplChannel.enableDMA();
+    return SUCCESS;
+  }
+  
+  async command error_t Channel.softwareTrigger() {
+    if (gChannelTrigger.trigger != DMA_TRIGGER_DMAREQ) 
+      return FAIL;
+    call HplChannel.triggerDMA();
+    return SUCCESS;
+  }
+  
+  async command error_t Channel.stopTransfer() {
+    if ( gChannelState.transferMode != DMA_BURST_BLOCK_TRANSFER ||
+	 gChannelState.transferMode != DMA_REPEATED_BURST_BLOCK_TRANSFER)
+      return FAIL;
+    call HplChannel.disableDMA();
+    return SUCCESS;
+    
+  }
+  
+  async event void HplChannel.transferDone( error_t error ) {
+    signal Channel.transferDone( error );
+  }
+
+  default async event void Channel.transferDone( error_t error ) {}
+
+}
diff --git a/tos/chips/msp430/dma/Msp430DmaControl.nc b/tos/chips/msp430/dma/Msp430DmaControl.nc
new file mode 100644
index 00000000..4a7fee26
--- /dev/null
+++ b/tos/chips/msp430/dma/Msp430DmaControl.nc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+#include "Msp430Dma.h"
+
+interface Msp430DmaControl {
+  async command void init();
+  async command void setFlags( bool enable_nmi, bool round_robin, 
+			       bool on_fetch);
+}
diff --git a/tos/chips/msp430/dma/Msp430DmaControlP.nc b/tos/chips/msp430/dma/Msp430DmaControlP.nc
new file mode 100644
index 00000000..b360f4c2
--- /dev/null
+++ b/tos/chips/msp430/dma/Msp430DmaControlP.nc
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Joe Polastre <info@moteiv.com>
+ * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+#include "Msp430Dma.h"
+
+module Msp430DmaControlP {
+
+  provides interface Msp430DmaControl as Control;
+
+  uses interface HplMsp430DmaControl as HplControl;
+  uses interface HplMsp430DmaChannel as HplChannel0;
+  uses interface HplMsp430DmaChannel as HplChannel1;
+  uses interface HplMsp430DmaChannel as HplChannel2;
+
+}
+
+implementation {
+  
+  async command void Control.init() {
+    call HplControl.reset();
+    call HplChannel0.reset();
+    call HplChannel1.reset();
+    call HplChannel2.reset();
+  } 
+  
+  async command void Control.setFlags( bool enable_nmi, bool round_robin,
+				       bool on_fetch ) {
+    
+    // NOTE: on_fetch must be true when dst addr is flash
+    
+    if (enable_nmi) call HplControl.setENNMI();
+    else call HplControl.clearENNMI();
+    if (round_robin) call HplControl.setRoundRobin();
+    else call HplControl.clearRoundRobin();
+    if (on_fetch) call HplControl.setOnFetch();
+    else call HplControl.clearOnFetch();
+    
+  }
+
+  async event void HplChannel0.transferDone( error_t error ) {}
+  async event void HplChannel1.transferDone( error_t error ) {}
+  async event void HplChannel2.transferDone( error_t error ) {}
+
+}
diff --git a/tos/chips/msp430/msp430hardware.h b/tos/chips/msp430/msp430hardware.h
new file mode 100644
index 00000000..ea1a40eb
--- /dev/null
+++ b/tos/chips/msp430/msp430hardware.h
@@ -0,0 +1,273 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+// @author Joe Polastre <polastre@cs.berkeley.edu>
+// @author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+#ifndef _H_msp430hardware_h
+#define _H_msp430hardware_h
+
+#include <io.h>
+#include <signal.h>
+#include "msp430regtypes.h"
+
+
+// CPU memory-mapped register access will cause nesc to issue race condition
+// warnings.  Race conditions are a significant conern when accessing CPU
+// memory-mapped registers, because they can change even while interrupts
+// are disabled.  This means that the standard nesc tools for resolving race
+// conditions, atomic statements that disable interrupt handling, do not
+// resolve CPU register race conditions.  So, CPU registers access must be
+// treated seriously and carefully.
+
+// The macro MSP430REG_NORACE allows individual modules to internally
+// redeclare CPU registers as norace, eliminating nesc's race condition
+// warnings for their access.  This macro should only be used after the
+// specific CPU register use has been verified safe and correct.  Example
+// use:
+//
+//    module MyLowLevelModule
+//    {
+//      // ...
+//    }
+//    implementation
+//    {
+//      MSP430REG_NORACE(TACCTL0);
+//      // ...
+//    }
+
+#undef norace
+
+#define MSP430REG_NORACE_EXPAND(type,name,addr) \
+norace static volatile type name asm(#addr)
+
+#define MSP430REG_NORACE3(type,name,addr) \
+MSP430REG_NORACE_EXPAND(type,name,addr)
+
+// MSP430REG_NORACE and MSP430REG_NORACE2 presume naming conventions among
+// type, name, and addr, which are defined in the local header
+// msp430regtypes.h and mspgcc's header io.h and its children.
+
+#define MSP430REG_NORACE2(rename,name) \
+MSP430REG_NORACE3(TYPE_##name,rename,name##_)
+
+#define MSP430REG_NORACE(name) \
+MSP430REG_NORACE3(TYPE_##name,name,name##_)
+
+// Avoid the type-punned pointer warnings from gcc 3.3, which are warning about
+// creating potentially broken object code.  Union casts are the appropriate work
+// around.  Unfortunately, they require a function definiton.
+#define DEFINE_UNION_CAST(func_name,to_type,from_type) \
+to_type func_name(from_type x) @safe() { union {from_type f; to_type t;} c = {f:x}; return c.t; }
+
+// redefine ugly defines from msp-gcc
+#ifndef DONT_REDEFINE_SR_FLAGS
+#undef C
+#undef Z
+#undef N
+#undef V
+#undef GIE
+#undef CPUOFF
+#undef OSCOFF
+#undef SCG0
+#undef SCG1
+#undef LPM0_bits
+#undef LPM1_bits
+#undef LPM2_bits
+#undef LPM3_bits
+#undef LPM4_bits
+#define SR_C       0x0001
+#define SR_Z       0x0002
+#define SR_N       0x0004
+#define SR_V       0x0100
+#define SR_GIE     0x0008
+#define SR_CPUOFF  0x0010
+#define SR_OSCOFF  0x0020
+#define SR_SCG0    0x0040
+#define SR_SCG1    0x0080
+#define LPM0_bits           SR_CPUOFF
+#define LPM1_bits           SR_SCG0+SR_CPUOFF
+#define LPM2_bits           SR_SCG1+SR_CPUOFF
+#define LPM3_bits           SR_SCG1+SR_SCG0+SR_CPUOFF
+#define LPM4_bits           SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF
+#endif//DONT_REDEFINE_SR_FLAGS
+
+#ifdef interrupt
+#undef interrupt
+#endif
+
+#ifdef wakeup
+#undef wakeup
+#endif
+
+#ifdef signal
+#undef signal
+#endif
+
+
+// Re-definitions for safe tinyOS
+// These rely on io.h being included at the top of this file
+// thus pulling the affected header files before the re-definitions
+#ifdef SAFE_TINYOS
+#undef ADC12MEM
+#define ADC12MEM            TCAST(int* ONE, ADC12MEM_) /* ADC12 Conversion Memory (for C) */
+#undef ADC12MCTL
+#define ADC12MCTL           TCAST(char * ONE, ADC12MCTL_)
+#endif
+
+// define platform constants that can be changed for different compilers
+// these are all msp430-gcc specific (add as necessary)
+
+#ifdef __msp430_headers_adc10_h
+#define __msp430_have_adc10
+#endif
+
+#ifdef __msp430_headers_adc12_h
+#define __msp430_have_adc12
+#endif
+
+// backwards compatibility to older versions of the header files
+#ifdef __MSP430_HAS_I2C__
+#define __msp430_have_usart0_with_i2c
+#endif
+
+// I2CBusy flag is not defined by current MSP430-GCC
+#ifdef __msp430_have_usart0_with_i2c
+#ifndef I2CBUSY
+#define I2CBUSY   (0x01 << 5)
+#endif
+MSP430REG_NORACE2(U0CTLnr,U0CTL);
+MSP430REG_NORACE2(I2CTCTLnr,I2CTCTL);
+MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL);
+#endif
+
+// The signal attribute has opposite meaning in msp430-gcc than in avr-gcc
+#define TOSH_SIGNAL(signame) \
+  void sig_##signame() __attribute__((interrupt (signame), wakeup)) @C()
+
+// TOSH_INTERRUPT allows nested interrupts
+#define TOSH_INTERRUPT(signame) \
+  void isr_##signame() __attribute__((interrupt (signame), signal, wakeup)) @C()
+
+
+#define SET_FLAG(port, flag) ((port) |= (flag))
+#define CLR_FLAG(port, flag) ((port) &= ~(flag))
+#define READ_FLAG(port, flag) ((port) & (flag))
+
+// TOSH_ASSIGN_PIN creates functions that are effectively marked as
+// "norace".  This means race conditions that result from their use will not
+// be detectde by nesc.
+
+#define TOSH_ASSIGN_PIN_HEX(name, port, hex) \
+void TOSH_SET_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r |= hex; } \
+void TOSH_CLR_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r &= ~hex; } \
+void TOSH_TOGGLE_##name##_PIN() @safe(){ MSP430REG_NORACE2(r,P##port##OUT); r ^= hex; } \
+uint8_t TOSH_READ_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##IN); return (r & hex); } \
+void TOSH_MAKE_##name##_OUTPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r |= hex; } \
+void TOSH_MAKE_##name##_INPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r &= ~hex; } \
+void TOSH_SEL_##name##_MODFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r |= hex; } \
+void TOSH_SEL_##name##_IOFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r &= ~hex; }
+
+#define TOSH_ASSIGN_PIN(name, port, bit) \
+TOSH_ASSIGN_PIN_HEX(name,port,(1<<(bit)))
+
+typedef uint8_t mcu_power_t @combine("mcombine");
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() {
+  return (m1 < m2) ? m1: m2;
+}
+enum {
+  MSP430_POWER_ACTIVE = 0,
+  MSP430_POWER_LPM0   = 1,
+  MSP430_POWER_LPM1   = 2,
+  MSP430_POWER_LPM2   = 3,
+  MSP430_POWER_LPM3   = 4,
+  MSP430_POWER_LPM4   = 5
+};
+
+void __nesc_disable_interrupt(void) @safe()
+{
+  dint();
+  nop();
+}
+
+void __nesc_enable_interrupt(void) @safe()
+{
+  eint();
+}
+
+typedef bool __nesc_atomic_t;
+__nesc_atomic_t __nesc_atomic_start(void);
+void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts);
+
+#ifndef NESC_BUILD_BINARY
+/* @spontaneous() functions should not be included when NESC_BUILD_BINARY
+   is #defined, to avoid duplicate functions definitions when binary
+   components are used. Such functions do need a prototype in all cases,
+   though. */
+__nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe()
+{
+  __nesc_atomic_t result = ((READ_SR & SR_GIE) != 0);
+  __nesc_disable_interrupt();
+  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
+  return result;
+}
+
+void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous() @safe()
+{
+  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
+  if( reenable_interrupts )
+    __nesc_enable_interrupt();
+}
+#endif
+
+/* Floating-point network-type support.
+   These functions must convert to/from a 32-bit big-endian integer that follows
+   the layout of Java's java.lang.float.floatToRawIntBits method.
+   Conveniently, for the MSP430 family, this is a straight byte copy...
+*/
+
+typedef float nx_float __attribute__((nx_base_be(afloat)));
+
+inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() {
+  float f;
+  memcpy(&f, source, sizeof(float));
+  return f;
+}
+
+inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() {
+  memcpy(target, &value, sizeof(float));
+  return value;
+}
+
+#endif//_H_msp430hardware_h
+
diff --git a/tos/chips/msp430/msp430regtypes.h b/tos/chips/msp430/msp430regtypes.h
new file mode 100644
index 00000000..46e729db
--- /dev/null
+++ b/tos/chips/msp430/msp430regtypes.h
@@ -0,0 +1,451 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+#ifndef _H_msp430regtypes_h
+#define _H_msp430regtypes_h
+
+/*
+  To generate the primary contents of this file seen below, in
+  mspgcc/msp430/include/, execute the following command:
+
+    find . | xargs perl -ne '
+      BEGIN { %t = qw(b uint8_t w uint16_t); }
+      if( /\bsfr([bw])\s*\(\s*(\w+)/ && length($2) > 1 ) {
+        $r{$2} = $t{$1};
+        print "#define TYPE_$2 $t{$1}\n" if /\bsfr([bw])\s*\(\s*(\w+)/;
+      } elsif( /^#define\s+(\w+)\s+(\w+)\s+$/ ) {
+        print "#define TYPE_$1 $r{$2}\n" if $r{$2};
+      }
+    ' | sort -u
+*/
+
+#define TYPE_ACTL uint16_t
+#define TYPE_ADAT uint16_t
+#define TYPE_ADC10AE uint8_t
+#define TYPE_ADC10CTL0 uint16_t
+#define TYPE_ADC10CTL1 uint16_t
+#define TYPE_ADC10DTC0 uint8_t
+#define TYPE_ADC10DTC1 uint8_t
+#define TYPE_ADC10MEM uint16_t
+#define TYPE_ADC10SA uint16_t
+#define TYPE_ADC12CTL0 uint16_t
+#define TYPE_ADC12CTL1 uint16_t
+#define TYPE_ADC12IE uint16_t
+#define TYPE_ADC12IFG uint16_t
+#define TYPE_ADC12IV uint16_t
+#define TYPE_ADC12MCTL0 uint8_t
+#define TYPE_ADC12MCTL1 uint8_t
+#define TYPE_ADC12MCTL10 uint8_t
+#define TYPE_ADC12MCTL11 uint8_t
+#define TYPE_ADC12MCTL12 uint8_t
+#define TYPE_ADC12MCTL13 uint8_t
+#define TYPE_ADC12MCTL14 uint8_t
+#define TYPE_ADC12MCTL15 uint8_t
+#define TYPE_ADC12MCTL2 uint8_t
+#define TYPE_ADC12MCTL3 uint8_t
+#define TYPE_ADC12MCTL4 uint8_t
+#define TYPE_ADC12MCTL5 uint8_t
+#define TYPE_ADC12MCTL6 uint8_t
+#define TYPE_ADC12MCTL7 uint8_t
+#define TYPE_ADC12MCTL8 uint8_t
+#define TYPE_ADC12MCTL9 uint8_t
+#define TYPE_ADC12MEM0 uint16_t
+#define TYPE_ADC12MEM1 uint16_t
+#define TYPE_ADC12MEM10 uint16_t
+#define TYPE_ADC12MEM11 uint16_t
+#define TYPE_ADC12MEM12 uint16_t
+#define TYPE_ADC12MEM13 uint16_t
+#define TYPE_ADC12MEM14 uint16_t
+#define TYPE_ADC12MEM15 uint16_t
+#define TYPE_ADC12MEM2 uint16_t
+#define TYPE_ADC12MEM3 uint16_t
+#define TYPE_ADC12MEM4 uint16_t
+#define TYPE_ADC12MEM5 uint16_t
+#define TYPE_ADC12MEM6 uint16_t
+#define TYPE_ADC12MEM7 uint16_t
+#define TYPE_ADC12MEM8 uint16_t
+#define TYPE_ADC12MEM9 uint16_t
+#define TYPE_AEN uint16_t
+#define TYPE_AIN uint16_t
+#define TYPE_BCSCTL1 uint8_t
+#define TYPE_BCSCTL2 uint8_t
+#define TYPE_BTCNT1 uint8_t
+#define TYPE_BTCNT2 uint8_t
+#define TYPE_BTCTL uint8_t
+#define TYPE_CACTL1 uint8_t
+#define TYPE_CACTL2 uint8_t
+#define TYPE_CAPD uint8_t
+#define TYPE_CBCTL uint8_t
+#define TYPE_CCR0 uint16_t
+#define TYPE_CCR1 uint16_t
+#define TYPE_CCR2 uint16_t
+#define TYPE_CCTL0 uint16_t
+#define TYPE_CCTL1 uint16_t
+#define TYPE_CCTL2 uint16_t
+#define TYPE_DAC12CTL0 uint16_t
+#define TYPE_DAC12IFG uint16_t
+#define TYPE_DAC12_0CTL uint16_t
+#define TYPE_DAC12_0DAT uint16_t
+#define TYPE_DAC12_1CTL uint16_t
+#define TYPE_DAC12_1DAT uint16_t
+#define TYPE_DCOCTL uint8_t
+#define TYPE_DMA0CTL uint16_t
+#define TYPE_DMA0DA uint16_t
+#define TYPE_DMA0SA uint16_t
+#define TYPE_DMA0SZ uint16_t
+#define TYPE_DMA1CTL uint16_t
+#define TYPE_DMA1DA uint16_t
+#define TYPE_DMA1SA uint16_t
+#define TYPE_DMA1SZ uint16_t
+#define TYPE_DMA2CTL uint16_t
+#define TYPE_DMA2DA uint16_t
+#define TYPE_DMA2SA uint16_t
+#define TYPE_DMA2SZ uint16_t
+#define TYPE_DMACTL0 uint16_t
+#define TYPE_DMACTL1 uint16_t
+#define TYPE_EPCTL uint8_t
+#define TYPE_ESPCTL uint16_t
+#define TYPE_FCTL1 uint16_t
+#define TYPE_FCTL2 uint16_t
+#define TYPE_FCTL3 uint16_t
+#define TYPE_FLL_CTL0 uint8_t
+#define TYPE_FLL_CTL1 uint8_t
+#define TYPE_I2CDCTL uint8_t
+#define TYPE_I2CDR uint8_t
+#define TYPE_I2CIE uint8_t
+#define TYPE_I2CIFG uint8_t
+#define TYPE_I2CIV uint16_t
+#define TYPE_I2CNDAT uint8_t
+#define TYPE_I2COA uint16_t
+#define TYPE_I2CPSC uint8_t
+#define TYPE_I2CSA uint16_t
+#define TYPE_I2CSCLH uint8_t
+#define TYPE_I2CSCLL uint8_t
+#define TYPE_I2CTCTL uint8_t
+#define TYPE_IE1 uint8_t
+#define TYPE_IE2 uint8_t
+#define TYPE_IFG1 uint8_t
+#define TYPE_IFG2 uint8_t
+#define TYPE_LCDCTL uint8_t
+#define TYPE_LCDM1 uint8_t
+#define TYPE_LCDM10 uint8_t
+#define TYPE_LCDM11 uint8_t
+#define TYPE_LCDM12 uint8_t
+#define TYPE_LCDM13 uint8_t
+#define TYPE_LCDM14 uint8_t
+#define TYPE_LCDM15 uint8_t
+#define TYPE_LCDM16 uint8_t
+#define TYPE_LCDM17 uint8_t
+#define TYPE_LCDM18 uint8_t
+#define TYPE_LCDM19 uint8_t
+#define TYPE_LCDM2 uint8_t
+#define TYPE_LCDM20 uint8_t
+#define TYPE_LCDM3 uint8_t
+#define TYPE_LCDM4 uint8_t
+#define TYPE_LCDM5 uint8_t
+#define TYPE_LCDM6 uint8_t
+#define TYPE_LCDM7 uint8_t
+#define TYPE_LCDM8 uint8_t
+#define TYPE_LCDM9 uint8_t
+#define TYPE_LCDMA uint8_t
+#define TYPE_LCDMB uint8_t
+#define TYPE_LCDMC uint8_t
+#define TYPE_LCDMD uint8_t
+#define TYPE_LCDME uint8_t
+#define TYPE_LCDMF uint8_t
+#define TYPE_MAC uint16_t
+#define TYPE_MACS uint16_t
+#define TYPE_MBCTL uint16_t
+#define TYPE_MBIN0 uint16_t
+#define TYPE_MBIN1 uint16_t
+#define TYPE_MBOUT0 uint16_t
+#define TYPE_MBOUT1 uint16_t
+#define TYPE_ME1 uint8_t
+#define TYPE_ME2 uint8_t
+#define TYPE_MPY uint16_t
+#define TYPE_MPYS uint16_t
+#define TYPE_OA0CTL0 uint8_t
+#define TYPE_OA0CTL1 uint8_t
+#define TYPE_OA1CTL0 uint8_t
+#define TYPE_OA1CTL1 uint8_t
+#define TYPE_OA2CTL0 uint8_t
+#define TYPE_OA2CTL1 uint8_t
+#define TYPE_OP2 uint16_t
+#define TYPE_PORT_OUT uint8_t
+#define TYPE_PORT_IN uint8_t
+#define TYPE_PORT_DIR uint8_t
+#define TYPE_PORT_SEL uint8_t
+#define TYPE_P0DIR uint8_t
+#define TYPE_P0IE uint8_t
+#define TYPE_P0IES uint8_t
+#define TYPE_P0IFG uint8_t
+#define TYPE_P0IN uint8_t
+#define TYPE_P0OUT uint8_t
+#define TYPE_P1DIR uint8_t
+#define TYPE_P1IE uint8_t
+#define TYPE_P1IES uint8_t
+#define TYPE_P1IFG uint8_t
+#define TYPE_P1IN uint8_t
+#define TYPE_P1OUT uint8_t
+#define TYPE_P1SEL uint8_t
+#define TYPE_P2DIR uint8_t
+#define TYPE_P2IE uint8_t
+#define TYPE_P2IES uint8_t
+#define TYPE_P2IFG uint8_t
+#define TYPE_P2IN uint8_t
+#define TYPE_P2OUT uint8_t
+#define TYPE_P2SEL uint8_t
+#define TYPE_P3DIR uint8_t
+#define TYPE_P3IN uint8_t
+#define TYPE_P3OUT uint8_t
+#define TYPE_P3SEL uint8_t
+#define TYPE_P4DIR uint8_t
+#define TYPE_P4IN uint8_t
+#define TYPE_P4OUT uint8_t
+#define TYPE_P4SEL uint8_t
+#define TYPE_P5DIR uint8_t
+#define TYPE_P5IN uint8_t
+#define TYPE_P5OUT uint8_t
+#define TYPE_P5SEL uint8_t
+#define TYPE_P6DIR uint8_t
+#define TYPE_P6IN uint8_t
+#define TYPE_P6OUT uint8_t
+#define TYPE_P6SEL uint8_t
+#define TYPE_RESHI uint16_t
+#define TYPE_RESLO uint16_t
+#define TYPE_RET0 uint16_t
+#define TYPE_RET1 uint16_t
+#define TYPE_RET10 uint16_t
+#define TYPE_RET11 uint16_t
+#define TYPE_RET12 uint16_t
+#define TYPE_RET13 uint16_t
+#define TYPE_RET14 uint16_t
+#define TYPE_RET15 uint16_t
+#define TYPE_RET16 uint16_t
+#define TYPE_RET17 uint16_t
+#define TYPE_RET18 uint16_t
+#define TYPE_RET19 uint16_t
+#define TYPE_RET2 uint16_t
+#define TYPE_RET20 uint16_t
+#define TYPE_RET21 uint16_t
+#define TYPE_RET22 uint16_t
+#define TYPE_RET23 uint16_t
+#define TYPE_RET24 uint16_t
+#define TYPE_RET25 uint16_t
+#define TYPE_RET26 uint16_t
+#define TYPE_RET27 uint16_t
+#define TYPE_RET28 uint16_t
+#define TYPE_RET29 uint16_t
+#define TYPE_RET3 uint16_t
+#define TYPE_RET30 uint16_t
+#define TYPE_RET31 uint16_t
+#define TYPE_RET4 uint16_t
+#define TYPE_RET5 uint16_t
+#define TYPE_RET6 uint16_t
+#define TYPE_RET7 uint16_t
+#define TYPE_RET8 uint16_t
+#define TYPE_RET9 uint16_t
+#define TYPE_RXBUF uint8_t
+#define TYPE_RXBUF0 uint8_t
+#define TYPE_RXBUF1 uint8_t
+#define TYPE_RXBUF_0 uint8_t
+#define TYPE_RXBUF_1 uint8_t
+#define TYPE_SCFI0 uint8_t
+#define TYPE_SCFI1 uint8_t
+#define TYPE_SCFQCTL uint8_t
+#define TYPE_SD16CCTL0 uint16_t
+#define TYPE_SD16CCTL1 uint16_t
+#define TYPE_SD16CCTL2 uint16_t
+#define TYPE_SD16CTL uint16_t
+#define TYPE_SD16INCTL0 uint8_t
+#define TYPE_SD16INCTL1 uint8_t
+#define TYPE_SD16INCTL2 uint8_t
+#define TYPE_SD16IV uint16_t
+#define TYPE_SD16MEM0 uint16_t
+#define TYPE_SD16MEM1 uint16_t
+#define TYPE_SD16MEM2 uint16_t
+#define TYPE_SD16PRE0 uint8_t
+#define TYPE_SD16PRE1 uint8_t
+#define TYPE_SD16PRE2 uint8_t
+#define TYPE_SIFCNT uint16_t
+#define TYPE_SIFCTL0 uint16_t
+#define TYPE_SIFCTL1 uint16_t
+#define TYPE_SIFCTL2 uint16_t
+#define TYPE_SIFCTL3 uint16_t
+#define TYPE_SIFCTL4 uint16_t
+#define TYPE_SIFDACR0 uint16_t
+#define TYPE_SIFDACR1 uint16_t
+#define TYPE_SIFDACR2 uint16_t
+#define TYPE_SIFDACR3 uint16_t
+#define TYPE_SIFDACR4 uint16_t
+#define TYPE_SIFDACR5 uint16_t
+#define TYPE_SIFDACR6 uint16_t
+#define TYPE_SIFDACR7 uint16_t
+#define TYPE_SIFDEBUG uint16_t
+#define TYPE_SIFTPSMV uint16_t
+#define TYPE_SIFTSM0 uint16_t
+#define TYPE_SIFTSM1 uint16_t
+#define TYPE_SIFTSM10 uint16_t
+#define TYPE_SIFTSM11 uint16_t
+#define TYPE_SIFTSM12 uint16_t
+#define TYPE_SIFTSM13 uint16_t
+#define TYPE_SIFTSM14 uint16_t
+#define TYPE_SIFTSM15 uint16_t
+#define TYPE_SIFTSM16 uint16_t
+#define TYPE_SIFTSM17 uint16_t
+#define TYPE_SIFTSM18 uint16_t
+#define TYPE_SIFTSM19 uint16_t
+#define TYPE_SIFTSM2 uint16_t
+#define TYPE_SIFTSM20 uint16_t
+#define TYPE_SIFTSM21 uint16_t
+#define TYPE_SIFTSM22 uint16_t
+#define TYPE_SIFTSM23 uint16_t
+#define TYPE_SIFTSM3 uint16_t
+#define TYPE_SIFTSM4 uint16_t
+#define TYPE_SIFTSM5 uint16_t
+#define TYPE_SIFTSM6 uint16_t
+#define TYPE_SIFTSM7 uint16_t
+#define TYPE_SIFTSM8 uint16_t
+#define TYPE_SIFTSM9 uint16_t
+#define TYPE_SUMEXT uint16_t
+#define TYPE_SVSCTL uint8_t
+#define TYPE_TA0CCR0 uint16_t
+#define TYPE_TA0CCR1 uint16_t
+#define TYPE_TA0CCR2 uint16_t
+#define TYPE_TA0CCTL0 uint16_t
+#define TYPE_TA0CCTL1 uint16_t
+#define TYPE_TA0CCTL2 uint16_t
+#define TYPE_TA0CTL uint16_t
+#define TYPE_TA0IV uint16_t
+#define TYPE_TA0R uint16_t
+#define TYPE_TA1CCR0 uint16_t
+#define TYPE_TA1CCR1 uint16_t
+#define TYPE_TA1CCR2 uint16_t
+#define TYPE_TA1CCR3 uint16_t
+#define TYPE_TA1CCR4 uint16_t
+#define TYPE_TA1CCTL0 uint16_t
+#define TYPE_TA1CCTL1 uint16_t
+#define TYPE_TA1CCTL2 uint16_t
+#define TYPE_TA1CCTL3 uint16_t
+#define TYPE_TA1CCTL4 uint16_t
+#define TYPE_TA1CTL uint16_t
+#define TYPE_TA1IV uint16_t
+#define TYPE_TACCR0 uint16_t
+#define TYPE_TACCR1 uint16_t
+#define TYPE_TACCR2 uint16_t
+#define TYPE_TACCTL0 uint16_t
+#define TYPE_TACCTL1 uint16_t
+#define TYPE_TACCTL2 uint16_t
+#define TYPE_TACTL uint16_t
+#define TYPE_TAIV uint16_t
+#define TYPE_TAR uint16_t
+#define TYPE_TAR1 uint16_t
+#define TYPE_TBCCR0 uint16_t
+#define TYPE_TBCCR1 uint16_t
+#define TYPE_TBCCR2 uint16_t
+#define TYPE_TBCCR3 uint16_t
+#define TYPE_TBCCR4 uint16_t
+#define TYPE_TBCCR5 uint16_t
+#define TYPE_TBCCR6 uint16_t
+#define TYPE_TBCCTL0 uint16_t
+#define TYPE_TBCCTL1 uint16_t
+#define TYPE_TBCCTL2 uint16_t
+#define TYPE_TBCCTL3 uint16_t
+#define TYPE_TBCCTL4 uint16_t
+#define TYPE_TBCCTL5 uint16_t
+#define TYPE_TBCCTL6 uint16_t
+#define TYPE_TBCTL uint16_t
+#define TYPE_TBIV uint16_t
+#define TYPE_TBR uint16_t
+#define TYPE_TCCTL uint8_t
+#define TYPE_TPCNT1 uint8_t
+#define TYPE_TPCNT2 uint8_t
+#define TYPE_TPCTL uint8_t
+#define TYPE_TPD uint8_t
+#define TYPE_TPE uint8_t
+#define TYPE_TXBUF uint8_t
+#define TYPE_TXBUF0 uint8_t
+#define TYPE_TXBUF1 uint8_t
+#define TYPE_TXBUF_0 uint8_t
+#define TYPE_TXBUF_1 uint8_t
+#define TYPE_U0BR0 uint8_t
+#define TYPE_U0BR1 uint8_t
+#define TYPE_U0CTL uint8_t
+#define TYPE_U0MCTL uint8_t
+#define TYPE_U0RCTL uint8_t
+#define TYPE_U0RXBUF uint8_t
+#define TYPE_U0TCTL uint8_t
+#define TYPE_U0TXBUF uint8_t
+#define TYPE_U1BR0 uint8_t
+#define TYPE_U1BR1 uint8_t
+#define TYPE_U1CTL uint8_t
+#define TYPE_U1MCTL uint8_t
+#define TYPE_U1RCTL uint8_t
+#define TYPE_U1RXBUF uint8_t
+#define TYPE_U1TCTL uint8_t
+#define TYPE_U1TXBUF uint8_t
+#define TYPE_UBR0 uint8_t
+#define TYPE_UBR00 uint8_t
+#define TYPE_UBR01 uint8_t
+#define TYPE_UBR0_0 uint8_t
+#define TYPE_UBR0_1 uint8_t
+#define TYPE_UBR1 uint8_t
+#define TYPE_UBR10 uint8_t
+#define TYPE_UBR11 uint8_t
+#define TYPE_UBR1_0 uint8_t
+#define TYPE_UBR1_1 uint8_t
+#define TYPE_UCTL uint8_t
+#define TYPE_UCTL0 uint8_t
+#define TYPE_UCTL1 uint8_t
+#define TYPE_UCTL_0 uint8_t
+#define TYPE_UCTL_1 uint8_t
+#define TYPE_UMCTL uint8_t
+#define TYPE_UMCTL0 uint8_t
+#define TYPE_UMCTL1 uint8_t
+#define TYPE_UMCTL_0 uint8_t
+#define TYPE_UMCTL_1 uint8_t
+#define TYPE_URCTL uint8_t
+#define TYPE_URCTL0 uint8_t
+#define TYPE_URCTL1 uint8_t
+#define TYPE_URCTL_0 uint8_t
+#define TYPE_URCTL_1 uint8_t
+#define TYPE_UTCTL uint8_t
+#define TYPE_UTCTL0 uint8_t
+#define TYPE_UTCTL1 uint8_t
+#define TYPE_UTCTL_0 uint8_t
+#define TYPE_UTCTL_1 uint8_t
+#define TYPE_WDTCTL uint16_t
+
+#endif//_H_msp430regtypes_h
+
diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIO.nc b/tos/chips/msp430/pins/HplMsp430GeneralIO.nc
new file mode 100644
index 00000000..ad1cffc5
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430GeneralIO.nc
@@ -0,0 +1,100 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL for the TI MSP430 family of microprocessors. This provides an
+ * abstraction for general-purpose I/O.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+interface HplMsp430GeneralIO
+{
+  /**
+   * Set pin to high.
+   */
+  async command void set();
+
+  /**
+   * Set pin to low.
+   */
+  async command void clr();
+
+  /**
+   * Toggle pin status.
+   */
+  async command void toggle();
+
+  /**
+   * Get the port status that contains the pin.
+   *
+   * @return Status of the port that contains the given pin. The x'th
+   * pin on the port will be represented in the x'th bit.
+   */
+  async command uint8_t getRaw();
+
+  /**
+   * Read pin value.
+   *
+   * @return TRUE if pin is high, FALSE otherwise.
+   */
+  async command bool get();
+
+  /**
+   * Set pin direction to input.
+   */
+  async command void makeInput();
+
+  async command bool isInput();
+  
+  /**
+   * Set pin direction to output.
+   */
+  async command void makeOutput();
+  
+  async command bool isOutput();
+  
+  /**
+   * Set pin for module specific functionality.
+   */
+  async command void selectModuleFunc();
+  
+  async command bool isModuleFunc();
+  
+  /**
+   * Set pin for I/O functionality.
+   */
+  async command void selectIOFunc();
+  
+  async command bool isIOFunc();
+}
+
diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc
new file mode 100644
index 00000000..bb6d0d1f
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430GeneralIOC.nc
@@ -0,0 +1,364 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL for the TI MSP430 family of microprocessors. This provides an
+ * abstraction for general-purpose I/O.
+ *
+ * @author Joe Polastre
+ */
+
+configuration HplMsp430GeneralIOC
+{
+  // provides all the ports as raw ports
+#ifdef __msp430_have_port1
+  provides interface HplMsp430GeneralIO as Port10;
+  provides interface HplMsp430GeneralIO as Port11;
+  provides interface HplMsp430GeneralIO as Port12;
+  provides interface HplMsp430GeneralIO as Port13;
+  provides interface HplMsp430GeneralIO as Port14;
+  provides interface HplMsp430GeneralIO as Port15;
+  provides interface HplMsp430GeneralIO as Port16;
+  provides interface HplMsp430GeneralIO as Port17;
+#endif
+
+#ifdef __msp430_have_port2
+  provides interface HplMsp430GeneralIO as Port20;
+  provides interface HplMsp430GeneralIO as Port21;
+  provides interface HplMsp430GeneralIO as Port22;
+  provides interface HplMsp430GeneralIO as Port23;
+  provides interface HplMsp430GeneralIO as Port24;
+  provides interface HplMsp430GeneralIO as Port25;
+  provides interface HplMsp430GeneralIO as Port26;
+  provides interface HplMsp430GeneralIO as Port27;
+#endif
+
+#ifdef __msp430_have_port3
+  provides interface HplMsp430GeneralIO as Port30;
+  provides interface HplMsp430GeneralIO as Port31;
+  provides interface HplMsp430GeneralIO as Port32;
+  provides interface HplMsp430GeneralIO as Port33;
+  provides interface HplMsp430GeneralIO as Port34;
+  provides interface HplMsp430GeneralIO as Port35;
+  provides interface HplMsp430GeneralIO as Port36;
+  provides interface HplMsp430GeneralIO as Port37;
+#endif
+
+#ifdef __msp430_have_port4
+  provides interface HplMsp430GeneralIO as Port40;
+  provides interface HplMsp430GeneralIO as Port41;
+  provides interface HplMsp430GeneralIO as Port42;
+  provides interface HplMsp430GeneralIO as Port43;
+  provides interface HplMsp430GeneralIO as Port44;
+  provides interface HplMsp430GeneralIO as Port45;
+  provides interface HplMsp430GeneralIO as Port46;
+  provides interface HplMsp430GeneralIO as Port47;
+#endif
+
+#ifdef __msp430_have_port5
+  provides interface HplMsp430GeneralIO as Port50;
+  provides interface HplMsp430GeneralIO as Port51;
+  provides interface HplMsp430GeneralIO as Port52;
+  provides interface HplMsp430GeneralIO as Port53;
+  provides interface HplMsp430GeneralIO as Port54;
+  provides interface HplMsp430GeneralIO as Port55;
+  provides interface HplMsp430GeneralIO as Port56;
+  provides interface HplMsp430GeneralIO as Port57;
+#endif
+
+#ifdef __msp430_have_port6
+  provides interface HplMsp430GeneralIO as Port60;
+  provides interface HplMsp430GeneralIO as Port61;
+  provides interface HplMsp430GeneralIO as Port62;
+  provides interface HplMsp430GeneralIO as Port63;
+  provides interface HplMsp430GeneralIO as Port64;
+  provides interface HplMsp430GeneralIO as Port65;
+  provides interface HplMsp430GeneralIO as Port66;
+  provides interface HplMsp430GeneralIO as Port67;
+#endif
+
+  // provides special ports explicitly 
+  // this section of HplMsp430GeneralIOC supports the F14x series
+#ifdef __msp430x14x
+  provides interface HplMsp430GeneralIO as STE0;
+  provides interface HplMsp430GeneralIO as SIMO0;
+  provides interface HplMsp430GeneralIO as SOMI0;
+  provides interface HplMsp430GeneralIO as UCLK0;
+  provides interface HplMsp430GeneralIO as UTXD0;
+  provides interface HplMsp430GeneralIO as URXD0;
+
+  provides interface HplMsp430GeneralIO as STE1;
+  provides interface HplMsp430GeneralIO as SIMO1;
+  provides interface HplMsp430GeneralIO as SOMI1;
+  provides interface HplMsp430GeneralIO as UCLK1;
+  provides interface HplMsp430GeneralIO as UTXD1;
+  provides interface HplMsp430GeneralIO as URXD1;
+
+  provides interface HplMsp430GeneralIO as ADC0;
+  provides interface HplMsp430GeneralIO as ADC1;
+  provides interface HplMsp430GeneralIO as ADC2;
+  provides interface HplMsp430GeneralIO as ADC3;
+  provides interface HplMsp430GeneralIO as ADC4;
+  provides interface HplMsp430GeneralIO as ADC5;
+  provides interface HplMsp430GeneralIO as ADC6;
+  provides interface HplMsp430GeneralIO as ADC7;
+#endif
+
+  // this section of HplMsp430GeneralIOC supports the F16x series
+#ifdef __msp430x16x
+  provides interface HplMsp430GeneralIO as STE0;
+  provides interface HplMsp430GeneralIO as SIMO0;
+  provides interface HplMsp430GeneralIO as SDA;
+  provides interface HplMsp430GeneralIO as SOMI0;
+  provides interface HplMsp430GeneralIO as UCLK0;
+  provides interface HplMsp430GeneralIO as SCL;
+  provides interface HplMsp430GeneralIO as UTXD0;
+  provides interface HplMsp430GeneralIO as URXD0;
+
+  provides interface HplMsp430GeneralIO as STE1;
+  provides interface HplMsp430GeneralIO as SIMO1;
+  provides interface HplMsp430GeneralIO as SOMI1;
+  provides interface HplMsp430GeneralIO as UCLK1;
+  provides interface HplMsp430GeneralIO as UTXD1;
+  provides interface HplMsp430GeneralIO as URXD1;
+
+  provides interface HplMsp430GeneralIO as ADC0;
+  provides interface HplMsp430GeneralIO as ADC1;
+  provides interface HplMsp430GeneralIO as ADC2;
+  provides interface HplMsp430GeneralIO as ADC3;
+  provides interface HplMsp430GeneralIO as ADC4;
+  provides interface HplMsp430GeneralIO as ADC5;
+  provides interface HplMsp430GeneralIO as ADC6;
+  provides interface HplMsp430GeneralIO as ADC7;
+
+  provides interface HplMsp430GeneralIO as DAC0;
+  provides interface HplMsp430GeneralIO as DAC1;
+
+  provides interface HplMsp430GeneralIO as SVSIN;
+  provides interface HplMsp430GeneralIO as SVSOUT;
+#endif
+}
+implementation
+{
+  components 
+#ifdef __msp430_have_port1
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 0) as P10,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 1) as P11,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 2) as P12,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 3) as P13,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 4) as P14,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 5) as P15,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 6) as P16,
+    new HplMsp430GeneralIOP(P1IN_, P1OUT_, P1DIR_, P1SEL_, 7) as P17,
+#endif
+
+#ifdef __msp430_have_port2
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 0) as P20,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 1) as P21,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 2) as P22,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 3) as P23,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 4) as P24,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 5) as P25,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 6) as P26,
+    new HplMsp430GeneralIOP(P2IN_, P2OUT_, P2DIR_, P2SEL_, 7) as P27,
+#endif
+
+#ifdef __msp430_have_port3
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 0) as P30,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 1) as P31,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 2) as P32,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 3) as P33,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 4) as P34,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 5) as P35,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 6) as P36,
+    new HplMsp430GeneralIOP(P3IN_, P3OUT_, P3DIR_, P3SEL_, 7) as P37,
+#endif
+
+#ifdef __msp430_have_port4
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 0) as P40,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 1) as P41,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 2) as P42,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 3) as P43,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 4) as P44,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 5) as P45,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 6) as P46,
+    new HplMsp430GeneralIOP(P4IN_, P4OUT_, P4DIR_, P4SEL_, 7) as P47,
+#endif
+
+#ifdef __msp430_have_port5
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 0) as P50,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 1) as P51,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 2) as P52,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 3) as P53,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 4) as P54,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 5) as P55,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 6) as P56,
+    new HplMsp430GeneralIOP(P5IN_, P5OUT_, P5DIR_, P5SEL_, 7) as P57,
+#endif
+
+#ifdef __msp430_have_port6
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 0) as P60,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 1) as P61,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 2) as P62,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 3) as P63,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 4) as P64,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 5) as P65,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 6) as P66,
+    new HplMsp430GeneralIOP(P6IN_, P6OUT_, P6DIR_, P6SEL_, 7) as P67
+#endif
+    ;
+
+#ifdef __msp430_have_port1
+  Port10 = P10;
+  Port11 = P11;
+  Port12 = P12;
+  Port13 = P13;
+  Port14 = P14;
+  Port15 = P15;
+  Port16 = P16;
+  Port17 = P17;
+#endif
+
+#ifdef __msp430_have_port2
+  Port20 = P20;
+  Port21 = P21;
+  Port22 = P22;
+  Port23 = P23;
+  Port24 = P24;
+  Port25 = P25;
+  Port26 = P26;
+  Port27 = P27;
+#endif
+
+#ifdef __msp430_have_port3
+  Port30 = P30;
+  Port31 = P31;
+  Port32 = P32;
+  Port33 = P33;
+  Port34 = P34;
+  Port35 = P35;
+  Port36 = P36;
+  Port37 = P37;
+#endif
+
+#ifdef __msp430_have_port4
+  Port40 = P40;
+  Port41 = P41;
+  Port42 = P42;
+  Port43 = P43;
+  Port44 = P44;
+  Port45 = P45;
+  Port46 = P46;
+  Port47 = P47;
+#endif
+ 
+#ifdef __msp430_have_port5
+  Port50 = P50;
+  Port51 = P51;
+  Port52 = P52;
+  Port53 = P53;
+  Port54 = P54;
+  Port55 = P55;
+  Port56 = P56;
+  Port57 = P57;
+#endif
+
+#ifdef __msp430_have_port6
+  Port60 = P60;
+  Port61 = P61;
+  Port62 = P62;
+  Port63 = P63;
+  Port64 = P64;
+  Port65 = P65;
+  Port66 = P66;
+  Port67 = P67;
+#endif
+
+#ifdef __msp430x14x
+  STE0 = P30;
+  SIMO0 = P31;
+  SOMI0 = P32;
+  UCLK0 = P33;
+  UTXD0 = P34;
+  URXD0 = P35;
+
+  STE1 = P50;
+  SIMO1 = P51;
+  SOMI1 = P52;
+  UCLK1 = P53;
+  UTXD1 = P36;
+  URXD1 = P37;
+
+  ADC0 = P60;
+  ADC1 = P61;
+  ADC2 = P62;
+  ADC3 = P63;
+  ADC4 = P64;
+  ADC5 = P65;
+  ADC6 = P66;
+  ADC7 = P67;
+#endif
+
+#ifdef __msp430x16x
+  STE0 = P30;
+  SIMO0 = P31;
+  SDA = P31;
+  SOMI0 = P32;
+  UCLK0 = P33;
+  SCL = P33;
+  UTXD0 = P34;
+  URXD0 = P35;
+
+  STE1 = P50;
+  SIMO1 = P51;
+  SOMI1 = P52;
+  UCLK1 = P53;
+  UTXD1 = P36;
+  URXD1 = P37;
+
+  ADC0 = P60;
+  ADC1 = P61;
+  ADC2 = P62;
+  ADC3 = P63;
+  ADC4 = P64;
+  ADC5 = P65;
+  ADC6 = P66;
+  ADC7 = P67;
+
+  DAC0 = P66;
+  DAC1 = P67;
+
+  SVSIN = P67;
+  SVSOUT = P57;
+#endif
+}
+
diff --git a/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc b/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc
new file mode 100644
index 00000000..f5a9ae1b
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430GeneralIOP.nc
@@ -0,0 +1,69 @@
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ */
+
+#include "msp430regtypes.h"
+
+generic module HplMsp430GeneralIOP(
+				uint8_t port_in_addr,
+				uint8_t port_out_addr,
+				uint8_t port_dir_addr,
+				uint8_t port_sel_addr,
+				uint8_t pin
+				) @safe()
+{
+  provides interface HplMsp430GeneralIO as IO;
+}
+implementation
+{
+  #define PORTxIN (*TCAST(volatile TYPE_PORT_IN* ONE, port_in_addr))
+  #define PORTx (*TCAST(volatile TYPE_PORT_OUT* ONE, port_out_addr))
+  #define PORTxDIR (*TCAST(volatile TYPE_PORT_DIR* ONE, port_dir_addr))
+  #define PORTxSEL (*TCAST(volatile TYPE_PORT_SEL* ONE, port_sel_addr))
+
+  async command void IO.set() { atomic PORTx |= (0x01 << pin); }
+  async command void IO.clr() { atomic PORTx &= ~(0x01 << pin); }
+  async command void IO.toggle() { atomic PORTx ^= (0x01 << pin); }
+  async command uint8_t IO.getRaw() { return PORTxIN & (0x01 << pin); }
+  async command bool IO.get() { return (call IO.getRaw() != 0); }
+  async command void IO.makeInput() { atomic PORTxDIR &= ~(0x01 << pin); }
+  async command bool IO.isInput() { return (PORTxDIR & (0x01 << pin)) == 0; }
+  async command void IO.makeOutput() { atomic PORTxDIR |= (0x01 << pin); }
+  async command bool IO.isOutput() { return (PORTxDIR & (0x01 << pin)) != 0; }
+  async command void IO.selectModuleFunc() { atomic PORTxSEL |= (0x01 << pin); }
+  async command bool IO.isModuleFunc() { return (PORTxSEL & (0x01<<pin)) != 0; }
+  async command void IO.selectIOFunc() { atomic PORTxSEL &= ~(0x01 << pin); }
+  async command bool IO.isIOFunc() { return (PORTxSEL & (0x01<<pin)) == 0; }
+}
diff --git a/tos/chips/msp430/pins/HplMsp430Interrupt.nc b/tos/chips/msp430/pins/HplMsp430Interrupt.nc
new file mode 100644
index 00000000..773c1a15
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430Interrupt.nc
@@ -0,0 +1,74 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ */
+
+interface HplMsp430Interrupt
+{
+  /** 
+   * Enables MSP430 hardware interrupt on a particular port.
+   */
+  async command void enable();
+
+  /** 
+   * Disables MSP430 hardware interrupt on a particular port.
+   */
+  async command void disable();
+
+  /** 
+   * Clears the MSP430 Interrupt Pending Flag for a particular port.
+   */
+  async command void clear();
+
+  /** 
+   * Gets the current value of the input voltage of a port.
+   *
+   * @return TRUE if the pin is set high, FALSE if it is set low.
+   */
+  async command bool getValue();
+
+  /** 
+   * Sets whether the edge should be high to low or low to high.
+   *
+   * @param TRUE if the interrupt should be triggered on a low to high
+   *        edge transition, false for interrupts on a high to low transition.
+   */
+  async command void edge(bool low_to_high);
+
+  /**
+   * Signalled when an interrupt occurs on a port.
+   */
+  async event void fired();
+}
+
diff --git a/tos/chips/msp430/pins/HplMsp430InterruptC.nc b/tos/chips/msp430/pins/HplMsp430InterruptC.nc
new file mode 100644
index 00000000..dff0fc50
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430InterruptC.nc
@@ -0,0 +1,85 @@
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL for the TI MSP430 family of microprocessors. This provides an
+ * abstraction for GPIO interrupts.
+ *
+ * @author Joe Polastre
+ */
+configuration HplMsp430InterruptC
+{
+#ifdef __msp430_have_port1
+  provides interface HplMsp430Interrupt as Port10;
+  provides interface HplMsp430Interrupt as Port11;
+  provides interface HplMsp430Interrupt as Port12;
+  provides interface HplMsp430Interrupt as Port13;
+  provides interface HplMsp430Interrupt as Port14;
+  provides interface HplMsp430Interrupt as Port15;
+  provides interface HplMsp430Interrupt as Port16;
+  provides interface HplMsp430Interrupt as Port17;
+#endif
+#ifdef __msp430_have_port2
+  provides interface HplMsp430Interrupt as Port20;
+  provides interface HplMsp430Interrupt as Port21;
+  provides interface HplMsp430Interrupt as Port22;
+  provides interface HplMsp430Interrupt as Port23;
+  provides interface HplMsp430Interrupt as Port24;
+  provides interface HplMsp430Interrupt as Port25;
+  provides interface HplMsp430Interrupt as Port26;
+  provides interface HplMsp430Interrupt as Port27;
+#endif
+}
+implementation
+{
+  components HplMsp430InterruptP as HplInterruptP;
+#ifdef __msp430_have_port1
+  Port10 = HplInterruptP.Port10;
+  Port11 = HplInterruptP.Port11;
+  Port12 = HplInterruptP.Port12;
+  Port13 = HplInterruptP.Port13;
+  Port14 = HplInterruptP.Port14;
+  Port15 = HplInterruptP.Port15;
+  Port16 = HplInterruptP.Port16;
+  Port17 = HplInterruptP.Port17;
+#endif
+#ifdef __msp430_have_port2
+  Port20 = HplInterruptP.Port20;
+  Port21 = HplInterruptP.Port21;
+  Port22 = HplInterruptP.Port22;
+  Port23 = HplInterruptP.Port23;
+  Port24 = HplInterruptP.Port24;
+  Port25 = HplInterruptP.Port25;
+  Port26 = HplInterruptP.Port26;
+  Port27 = HplInterruptP.Port27;
+#endif
+}
diff --git a/tos/chips/msp430/pins/HplMsp430InterruptNMIC.nc b/tos/chips/msp430/pins/HplMsp430InterruptNMIC.nc
new file mode 100644
index 00000000..b0c7b066
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430InterruptNMIC.nc
@@ -0,0 +1,52 @@
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL for the TI MSP430 family of microprocessors. This provides an
+ * abstraction for non-maskable interrupts.
+ *
+ * @author Joe Polastre
+ */
+configuration HplMsp430InterruptNMIC
+{
+  provides interface HplMsp430Interrupt as NMI;
+  provides interface HplMsp430Interrupt as OF;
+  provides interface HplMsp430Interrupt as ACCV;
+}
+implementation
+{
+  components HplMsp430InterruptNMIP as HplInterruptP;
+
+  NMI = HplInterruptP.NMI;
+  OF = HplInterruptP.OF;
+  ACCV = HplInterruptP.ACCV;
+}
diff --git a/tos/chips/msp430/pins/HplMsp430InterruptNMIP.nc b/tos/chips/msp430/pins/HplMsp430InterruptNMIP.nc
new file mode 100644
index 00000000..a4363174
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430InterruptNMIP.nc
@@ -0,0 +1,104 @@
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ */
+module HplMsp430InterruptNMIP
+{
+  provides interface HplMsp430Interrupt as NMI;
+  provides interface HplMsp430Interrupt as OF;
+  provides interface HplMsp430Interrupt as ACCV;
+}
+implementation
+{
+  TOSH_SIGNAL(NMI_VECTOR)
+  {
+    volatile int n = IFG1;
+    if (n & NMIIFG) { signal NMI.fired(); return; }
+    if (n & OFIFG)  { signal OF.fired();  return; }
+    if (FCTL3 & ACCVIFG) { signal ACCV.fired(); return; }
+  }
+
+  default async event void NMI.fired() { call NMI.clear(); }
+  default async event void OF.fired() { call OF.clear(); }
+  default async event void ACCV.fired() { call ACCV.clear(); }
+
+  async command void NMI.enable() {
+    volatile uint16_t _watchdog;
+    atomic {
+      _watchdog = WDTCTL;
+      _watchdog = WDTPW | (_watchdog & 0x0FF);
+      _watchdog |= WDTNMI;
+      WDTCTL = _watchdog;
+      IE1 |= NMIIE;
+    }
+  }
+  async command void OF.enable() { atomic IE1 |= OFIE; }
+  async command void ACCV.enable() { atomic IE1 |= ACCVIE; }
+
+  async command void NMI.disable() {
+    volatile uint16_t _watchdog;
+    atomic {
+      _watchdog = WDTCTL;
+      _watchdog = WDTPW | (_watchdog & 0x0FF);
+      _watchdog &= ~WDTNMI;
+      WDTCTL = _watchdog;
+      IE1 &= ~NMIIE;
+    }
+  }
+  async command void OF.disable() { atomic IE1 &= ~OFIE; }
+  async command void ACCV.disable() { atomic IE1 &= ~ACCVIE; }
+
+  async command void NMI.clear() { atomic IFG1 &= ~NMIIFG; }
+  async command void OF.clear() { atomic IFG1 &= ~OFIFG; }
+  async command void ACCV.clear() { atomic FCTL3 &= ~ACCVIFG; }
+
+  async command bool NMI.getValue() { bool b; atomic b=(IFG1 & NMIIFG) & 0x01; return b; }
+  async command bool OF.getValue() { bool b; atomic b=(IFG1 & OFIFG) & 0x01; return b; }
+  async command bool ACCV.getValue() { bool b; atomic b=(FCTL3 & ACCVIFG) & 0x01; return b; }
+
+  async command void NMI.edge(bool l2h) { 
+    volatile uint16_t _watchdog;
+    atomic {
+      _watchdog = WDTCTL;
+      _watchdog = WDTPW | (_watchdog & 0x0FF);
+      if (l2h)  _watchdog &= ~(WDTNMIES); 
+      else      _watchdog |=  (WDTNMIES);
+      WDTCTL = _watchdog;
+    }
+  }
+  // edge does not apply to oscillator faults
+  async command void OF.edge(bool l2h) { }
+  // edge does not apply to flash access violations
+  async command void ACCV.edge(bool l2h) { }
+}
diff --git a/tos/chips/msp430/pins/HplMsp430InterruptP.nc b/tos/chips/msp430/pins/HplMsp430InterruptP.nc
new file mode 100644
index 00000000..496b4bcb
--- /dev/null
+++ b/tos/chips/msp430/pins/HplMsp430InterruptP.nc
@@ -0,0 +1,273 @@
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ */
+module HplMsp430InterruptP @safe()
+{
+#ifdef __msp430_have_port1
+  provides interface HplMsp430Interrupt as Port10;
+  provides interface HplMsp430Interrupt as Port11;
+  provides interface HplMsp430Interrupt as Port12;
+  provides interface HplMsp430Interrupt as Port13;
+  provides interface HplMsp430Interrupt as Port14;
+  provides interface HplMsp430Interrupt as Port15;
+  provides interface HplMsp430Interrupt as Port16;
+  provides interface HplMsp430Interrupt as Port17;
+#endif
+#ifdef __msp430_have_port2
+  provides interface HplMsp430Interrupt as Port20;
+  provides interface HplMsp430Interrupt as Port21;
+  provides interface HplMsp430Interrupt as Port22;
+  provides interface HplMsp430Interrupt as Port23;
+  provides interface HplMsp430Interrupt as Port24;
+  provides interface HplMsp430Interrupt as Port25;
+  provides interface HplMsp430Interrupt as Port26;
+  provides interface HplMsp430Interrupt as Port27;
+#endif
+
+}
+implementation
+{
+
+#ifdef __msp430_have_port1
+  TOSH_SIGNAL(PORT1_VECTOR)
+  {
+    volatile int n = P1IFG & P1IE;
+
+    if (n & (1 << 0)) { signal Port10.fired(); return; }
+    if (n & (1 << 1)) { signal Port11.fired(); return; }
+    if (n & (1 << 2)) { signal Port12.fired(); return; }
+    if (n & (1 << 3)) { signal Port13.fired(); return; }
+    if (n & (1 << 4)) { signal Port14.fired(); return; }
+    if (n & (1 << 5)) { signal Port15.fired(); return; }
+    if (n & (1 << 6)) { signal Port16.fired(); return; }
+    if (n & (1 << 7)) { signal Port17.fired(); return; }
+  }
+
+  default async event void Port10.fired() { call Port10.clear(); }
+  default async event void Port11.fired() { call Port11.clear(); }
+  default async event void Port12.fired() { call Port12.clear(); }
+  default async event void Port13.fired() { call Port13.clear(); }
+  default async event void Port14.fired() { call Port14.clear(); }
+  default async event void Port15.fired() { call Port15.clear(); }
+  default async event void Port16.fired() { call Port16.clear(); }
+  default async event void Port17.fired() { call Port17.clear(); }
+  async command void Port10.enable() { P1IE |= (1 << 0); }
+  async command void Port11.enable() { P1IE |= (1 << 1); }
+  async command void Port12.enable() { P1IE |= (1 << 2); }
+  async command void Port13.enable() { P1IE |= (1 << 3); }
+  async command void Port14.enable() { P1IE |= (1 << 4); }
+  async command void Port15.enable() { P1IE |= (1 << 5); }
+  async command void Port16.enable() { P1IE |= (1 << 6); }
+  async command void Port17.enable() { P1IE |= (1 << 7); }
+  async command void Port10.disable() { P1IE &= ~(1 << 0); }
+  async command void Port11.disable() { P1IE &= ~(1 << 1); }
+  async command void Port12.disable() { P1IE &= ~(1 << 2); }
+  async command void Port13.disable() { P1IE &= ~(1 << 3); }
+  async command void Port14.disable() { P1IE &= ~(1 << 4); }
+  async command void Port15.disable() { P1IE &= ~(1 << 5); }
+  async command void Port16.disable() { P1IE &= ~(1 << 6); }
+  async command void Port17.disable() { P1IE &= ~(1 << 7); }
+  async command void Port10.clear() { P1IFG &= ~(1 << 0); }
+  async command void Port11.clear() { P1IFG &= ~(1 << 1); }
+  async command void Port12.clear() { P1IFG &= ~(1 << 2); }
+  async command void Port13.clear() { P1IFG &= ~(1 << 3); }
+  async command void Port14.clear() { P1IFG &= ~(1 << 4); }
+  async command void Port15.clear() { P1IFG &= ~(1 << 5); }
+  async command void Port16.clear() { P1IFG &= ~(1 << 6); }
+  async command void Port17.clear() { P1IFG &= ~(1 << 7); }
+  async command bool Port10.getValue() { bool b; atomic b=(P1IN >> 0) & 1; return b; }
+  async command bool Port11.getValue() { bool b; atomic b=(P1IN >> 1) & 1; return b; }
+  async command bool Port12.getValue() { bool b; atomic b=(P1IN >> 2) & 1; return b; }
+  async command bool Port13.getValue() { bool b; atomic b=(P1IN >> 3) & 1; return b; }
+  async command bool Port14.getValue() { bool b; atomic b=(P1IN >> 4) & 1; return b; }
+  async command bool Port15.getValue() { bool b; atomic b=(P1IN >> 5) & 1; return b; }
+  async command bool Port16.getValue() { bool b; atomic b=(P1IN >> 6) & 1; return b; }
+  async command bool Port17.getValue() { bool b; atomic b=(P1IN >> 7) & 1; return b; }
+  async command void Port10.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 0); 
+      else      P1IES |=  (1 << 0);
+    }
+  }
+  async command void Port11.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 1); 
+      else      P1IES |=  (1 << 1);
+    }
+  }
+  async command void Port12.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 2); 
+      else      P1IES |=  (1 << 2);
+    }
+  }
+  async command void Port13.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 3); 
+      else      P1IES |=  (1 << 3);
+    }
+  }
+  async command void Port14.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 4); 
+      else      P1IES |=  (1 << 4);
+    }
+  }
+  async command void Port15.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 5); 
+      else      P1IES |=  (1 << 5);
+    }
+  }
+  async command void Port16.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 6); 
+      else      P1IES |=  (1 << 6);
+    }
+  }
+  async command void Port17.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 7); 
+      else      P1IES |=  (1 << 7);
+    }
+  }
+#endif
+
+#ifdef __msp430_have_port2
+  TOSH_SIGNAL(PORT2_VECTOR)
+  {
+    volatile int n = P2IFG & P2IE;
+
+    if (n & (1 << 0)) { signal Port20.fired(); return; }
+    if (n & (1 << 1)) { signal Port21.fired(); return; }
+    if (n & (1 << 2)) { signal Port22.fired(); return; }
+    if (n & (1 << 3)) { signal Port23.fired(); return; }
+    if (n & (1 << 4)) { signal Port24.fired(); return; }
+    if (n & (1 << 5)) { signal Port25.fired(); return; }
+    if (n & (1 << 6)) { signal Port26.fired(); return; }
+    if (n & (1 << 7)) { signal Port27.fired(); return; }
+  }
+  default async event void Port20.fired() { call Port20.clear(); }
+  default async event void Port21.fired() { call Port21.clear(); }
+  default async event void Port22.fired() { call Port22.clear(); }
+  default async event void Port23.fired() { call Port23.clear(); }
+  default async event void Port24.fired() { call Port24.clear(); }
+  default async event void Port25.fired() { call Port25.clear(); }
+  default async event void Port26.fired() { call Port26.clear(); }
+  default async event void Port27.fired() { call Port27.clear(); }
+  async command void Port20.enable() { P2IE |= (1 << 0); }
+  async command void Port21.enable() { P2IE |= (1 << 1); }
+  async command void Port22.enable() { P2IE |= (1 << 2); }
+  async command void Port23.enable() { P2IE |= (1 << 3); }
+  async command void Port24.enable() { P2IE |= (1 << 4); }
+  async command void Port25.enable() { P2IE |= (1 << 5); }
+  async command void Port26.enable() { P2IE |= (1 << 6); }
+  async command void Port27.enable() { P2IE |= (1 << 7); }
+  async command void Port20.disable() { P2IE &= ~(1 << 0); }
+  async command void Port21.disable() { P2IE &= ~(1 << 1); }
+  async command void Port22.disable() { P2IE &= ~(1 << 2); }
+  async command void Port23.disable() { P2IE &= ~(1 << 3); }
+  async command void Port24.disable() { P2IE &= ~(1 << 4); }
+  async command void Port25.disable() { P2IE &= ~(1 << 5); }
+  async command void Port26.disable() { P2IE &= ~(1 << 6); }
+  async command void Port27.disable() { P2IE &= ~(1 << 7); }
+  async command void Port20.clear() { P2IFG &= ~(1 << 0); }
+  async command void Port21.clear() { P2IFG &= ~(1 << 1); }
+  async command void Port22.clear() { P2IFG &= ~(1 << 2); }
+  async command void Port23.clear() { P2IFG &= ~(1 << 3); }
+  async command void Port24.clear() { P2IFG &= ~(1 << 4); }
+  async command void Port25.clear() { P2IFG &= ~(1 << 5); }
+  async command void Port26.clear() { P2IFG &= ~(1 << 6); }
+  async command void Port27.clear() { P2IFG &= ~(1 << 7); }
+  async command bool Port20.getValue() { bool b; atomic b=(P2IN >> 0) & 1; return b; }
+  async command bool Port21.getValue() { bool b; atomic b=(P2IN >> 1) & 1; return b; }
+  async command bool Port22.getValue() { bool b; atomic b=(P2IN >> 2) & 1; return b; }
+  async command bool Port23.getValue() { bool b; atomic b=(P2IN >> 3) & 1; return b; }
+  async command bool Port24.getValue() { bool b; atomic b=(P2IN >> 4) & 1; return b; }
+  async command bool Port25.getValue() { bool b; atomic b=(P2IN >> 5) & 1; return b; }
+  async command bool Port26.getValue() { bool b; atomic b=(P2IN >> 6) & 1; return b; }
+  async command bool Port27.getValue() { bool b; atomic b=(P2IN >> 7) & 1; return b; }
+  async command void Port20.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 0);
+      else      P2IES |=  (1 << 0);
+    }
+  }
+  async command void Port21.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 1);
+      else      P2IES |=  (1 << 1);
+    }
+  }  
+  async command void Port22.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 2);
+      else      P2IES |=  (1 << 2);
+    }
+  }  
+  async command void Port23.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 3);
+      else      P2IES |=  (1 << 3);
+    }
+  }  
+  async command void Port24.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 4);
+      else      P2IES |=  (1 << 4);
+    }
+  }
+  async command void Port25.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 5);
+      else      P2IES |=  (1 << 5);
+    }
+  }
+  async command void Port26.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 6);
+      else      P2IES |=  (1 << 6);
+    }
+  }
+  async command void Port27.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 7);
+      else      P2IES |=  (1 << 7);
+    }
+  }
+#endif
+
+
+}
diff --git a/tos/chips/msp430/pins/Msp430GpioC.nc b/tos/chips/msp430/pins/Msp430GpioC.nc
new file mode 100644
index 00000000..a76807a1
--- /dev/null
+++ b/tos/chips/msp430/pins/Msp430GpioC.nc
@@ -0,0 +1,57 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the general-purpose I/O abstraction
+ * for the TI MSP430 microcontroller.
+ *
+ * @author Joe Polastre
+ * @see  Please refer to TEP 117 for more information about this component and its
+ *          intended use.
+ */
+
+generic module Msp430GpioC() @safe() {
+  provides interface GeneralIO;
+  uses interface HplMsp430GeneralIO as HplGeneralIO;
+}
+implementation {
+
+  async command void GeneralIO.set() { call HplGeneralIO.set(); }
+  async command void GeneralIO.clr() { call HplGeneralIO.clr(); }
+  async command void GeneralIO.toggle() { call HplGeneralIO.toggle(); }
+  async command bool GeneralIO.get() { return call HplGeneralIO.get(); }
+  async command void GeneralIO.makeInput() { call HplGeneralIO.makeInput(); }
+  async command bool GeneralIO.isInput() { return call HplGeneralIO.isInput(); }
+  async command void GeneralIO.makeOutput() { call HplGeneralIO.makeOutput(); }
+  async command bool GeneralIO.isOutput() { return call HplGeneralIO.isOutput(); }
+
+}
diff --git a/tos/chips/msp430/pins/Msp430InterruptC.nc b/tos/chips/msp430/pins/Msp430InterruptC.nc
new file mode 100644
index 00000000..41280db9
--- /dev/null
+++ b/tos/chips/msp430/pins/Msp430InterruptC.nc
@@ -0,0 +1,82 @@
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the GPIO interrupt abstraction for
+ * the TI MSP430 microcontroller.
+ *
+ * @author Jonathan Hui
+ * @author Joe Polastre
+ * @see  Please refer to TEP 117 for more information about this component and its
+ *          intended use.
+ */
+
+generic module Msp430InterruptC() @safe() {
+
+  provides interface GpioInterrupt as Interrupt;
+  uses interface HplMsp430Interrupt as HplInterrupt;
+
+}
+
+implementation {
+
+  error_t enable( bool rising ) {
+    atomic {
+      call Interrupt.disable();
+      call HplInterrupt.edge( rising );
+      call HplInterrupt.enable();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t Interrupt.enableRisingEdge() {
+    return enable( TRUE );
+  }
+
+  async command error_t Interrupt.enableFallingEdge() {
+    return enable( FALSE );
+  }
+
+  async command error_t Interrupt.disable() {
+    atomic {
+      call HplInterrupt.disable();
+      call HplInterrupt.clear();
+    }
+    return SUCCESS;
+  }
+
+  async event void HplInterrupt.fired() {
+    call HplInterrupt.clear();
+    signal Interrupt.fired();
+  }
+
+}
diff --git a/tos/chips/msp430/sensors/Msp430InternalTemperatureC.nc b/tos/chips/msp430/sensors/Msp430InternalTemperatureC.nc
new file mode 100644
index 00000000..3b5673c8
--- /dev/null
+++ b/tos/chips/msp430/sensors/Msp430InternalTemperatureC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Msp430InternalTemperatureC is the temperature sensor available on
+ * the msp430-based platforms.
+ *
+ * To convert from ADC counts to temperature, convert to voltage by
+ * dividing by 4096 and multiplying by Vref (1.5V). Then subtract
+ * 0.986 from voltage and divide by 0.00355 to get degrees C.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:10 $
+ */
+
+generic configuration Msp430InternalTemperatureC() {
+  provides interface Read<uint16_t>;
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new AdcReadClientC();
+  Read = AdcReadClientC;
+
+  components new AdcReadStreamClientC();
+  ReadStream = AdcReadStreamClientC;
+
+  components Msp430InternalTemperatureP;
+  AdcReadClientC.AdcConfigure -> Msp430InternalTemperatureP;
+  AdcReadStreamClientC.AdcConfigure -> Msp430InternalTemperatureP;
+}
diff --git a/tos/chips/msp430/sensors/Msp430InternalTemperatureP.nc b/tos/chips/msp430/sensors/Msp430InternalTemperatureP.nc
new file mode 100644
index 00000000..d669d552
--- /dev/null
+++ b/tos/chips/msp430/sensors/Msp430InternalTemperatureP.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Msp430Adc12.h"
+
+module Msp430InternalTemperatureP {
+  provides interface AdcConfigure<const msp430adc12_channel_config_t*>;
+}
+implementation {
+
+  const msp430adc12_channel_config_t config = {
+      inch: TEMPERATURE_DIODE_CHANNEL,
+      sref: REFERENCE_VREFplus_AVss,
+      ref2_5v: REFVOLT_LEVEL_1_5,
+      adc12ssel: SHT_SOURCE_ACLK,
+      adc12div: SHT_CLOCK_DIV_1,
+      sht: SAMPLE_HOLD_4_CYCLES,
+      sampcon_ssel: SAMPCON_SOURCE_SMCLK,
+      sampcon_id: SAMPCON_CLOCK_DIV_1
+  };
+  
+  async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration()
+  {
+    return &config;
+  }
+}
diff --git a/tos/chips/msp430/sensors/Msp430InternalVoltageC.nc b/tos/chips/msp430/sensors/Msp430InternalVoltageC.nc
new file mode 100644
index 00000000..0ebfe4df
--- /dev/null
+++ b/tos/chips/msp430/sensors/Msp430InternalVoltageC.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Msp430InternalVoltageC is the voltage sensor available on the
+ * msp430-based platforms.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:10 $
+ */
+
+generic configuration Msp430InternalVoltageC() {
+  provides interface Read<uint16_t>;
+  provides interface ReadStream<uint16_t>;
+
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation {
+  components new AdcReadClientC();
+  Read = AdcReadClientC;
+
+  components new AdcReadStreamClientC();
+  ReadStream = AdcReadStreamClientC;
+
+  components Msp430InternalVoltageP;
+  AdcReadClientC.AdcConfigure -> Msp430InternalVoltageP;
+  AdcReadStreamClientC.AdcConfigure -> Msp430InternalVoltageP;
+
+  components new AdcReadNowClientC();
+  Resource = AdcReadNowClientC;
+  ReadNow = AdcReadNowClientC;
+  
+  AdcReadNowClientC.AdcConfigure -> Msp430InternalVoltageP;
+}
diff --git a/tos/chips/msp430/sensors/Msp430InternalVoltageP.nc b/tos/chips/msp430/sensors/Msp430InternalVoltageP.nc
new file mode 100644
index 00000000..63402678
--- /dev/null
+++ b/tos/chips/msp430/sensors/Msp430InternalVoltageP.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Msp430Adc12.h"
+
+module Msp430InternalVoltageP {
+  provides interface AdcConfigure<const msp430adc12_channel_config_t*>;
+}
+implementation {
+
+  const msp430adc12_channel_config_t config = {
+      inch: SUPPLY_VOLTAGE_HALF_CHANNEL,
+      sref: REFERENCE_VREFplus_AVss,
+      ref2_5v: REFVOLT_LEVEL_1_5,
+      adc12ssel: SHT_SOURCE_ACLK,
+      adc12div: SHT_CLOCK_DIV_1,
+      sht: SAMPLE_HOLD_4_CYCLES,
+      sampcon_ssel: SAMPCON_SOURCE_SMCLK,
+      sampcon_id: SAMPCON_CLOCK_DIV_1
+  };
+  
+  async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration()
+  {
+    return &config;
+  }
+}
diff --git a/tos/chips/msp430/timer/Alarm32khz16C.nc b/tos/chips/msp430/timer/Alarm32khz16C.nc
new file mode 100644
index 00000000..5eb97a95
--- /dev/null
+++ b/tos/chips/msp430/timer/Alarm32khz16C.nc
@@ -0,0 +1,58 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Alarm32khzC is the alarm for async 32khz alarms
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+generic configuration Alarm32khz16C()
+{
+  provides interface Init;
+  provides interface Alarm<T32khz,uint16_t>;
+}
+implementation
+{
+  components new Msp430Timer32khzC() as Msp430Timer;
+  components new Msp430AlarmC(T32khz) as Msp430Alarm;
+
+  Init = Msp430Alarm;
+  Alarm = Msp430Alarm;
+
+  Msp430Alarm.Msp430Timer -> Msp430Timer;
+  Msp430Alarm.Msp430TimerControl -> Msp430Timer;
+  Msp430Alarm.Msp430Compare -> Msp430Timer;
+}
+
diff --git a/tos/chips/msp430/timer/Alarm32khz32C.nc b/tos/chips/msp430/timer/Alarm32khz32C.nc
new file mode 100644
index 00000000..7684a0f4
--- /dev/null
+++ b/tos/chips/msp430/timer/Alarm32khz32C.nc
@@ -0,0 +1,58 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Alarm32khzC is the alarm for async 32khz alarms
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+generic configuration Alarm32khz32C()
+{
+  provides interface Init;
+  provides interface Alarm<T32khz,uint32_t>;
+}
+implementation
+{
+  components new Alarm32khz16C() as AlarmC;
+  components Counter32khz32C as Counter;
+  components new TransformAlarmC(T32khz,uint32_t,T32khz,uint16_t,0) as Transform;
+
+  Init = AlarmC;
+  Alarm = Transform;
+
+  Transform.AlarmFrom -> AlarmC;
+  Transform.Counter -> Counter;
+}
+
diff --git a/tos/chips/msp430/timer/AlarmMicro16C.nc b/tos/chips/msp430/timer/AlarmMicro16C.nc
new file mode 100644
index 00000000..e68080d1
--- /dev/null
+++ b/tos/chips/msp430/timer/AlarmMicro16C.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */ 
+ 
+generic configuration AlarmMicro16C()
+{
+  provides interface Init;
+  provides interface Alarm<TMicro,uint16_t>;
+}
+implementation
+{
+  components new Msp430TimerMicroC() as Msp430Timer;
+  components new Msp430AlarmC(TMicro) as Msp430Alarm;
+
+  Init = Msp430Alarm;
+  Alarm = Msp430Alarm;
+
+  Msp430Alarm.Msp430Timer -> Msp430Timer;
+  Msp430Alarm.Msp430TimerControl -> Msp430Timer;
+  Msp430Alarm.Msp430Compare -> Msp430Timer;
+}
+
diff --git a/tos/chips/msp430/timer/AlarmMilli16C.nc b/tos/chips/msp430/timer/AlarmMilli16C.nc
new file mode 100644
index 00000000..a69a3949
--- /dev/null
+++ b/tos/chips/msp430/timer/AlarmMilli16C.nc
@@ -0,0 +1,58 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * AlarmMilliC is the alarm for async millisecond alarms
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic configuration AlarmMilli16C()
+{
+  provides interface Init;
+  provides interface Alarm<TMilli,uint16_t>;
+}
+implementation
+{
+  components new Alarm32khz16C() as AlarmFrom;
+  components CounterMilli16C as Counter;
+  components new TransformAlarmC(TMilli,uint16_t,T32khz,uint16_t,5) as Transform;
+
+  Init = AlarmFrom;
+  Alarm = Transform;
+
+  Transform.AlarmFrom -> AlarmFrom;
+  Transform.Counter -> Counter;
+}
+
diff --git a/tos/chips/msp430/timer/AlarmMilli32C.nc b/tos/chips/msp430/timer/AlarmMilli32C.nc
new file mode 100644
index 00000000..73399453
--- /dev/null
+++ b/tos/chips/msp430/timer/AlarmMilli32C.nc
@@ -0,0 +1,58 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * AlarmMilliC is the alarm for async millisecond alarms
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic configuration AlarmMilli32C()
+{
+  provides interface Init;
+  provides interface Alarm<TMilli,uint32_t>;
+}
+implementation
+{
+  components new Alarm32khz16C() as AlarmFrom;
+  components CounterMilli32C as Counter;
+  components new TransformAlarmC(TMilli,uint32_t,T32khz,uint16_t,5) as Transform;
+
+  Init = AlarmFrom;
+  Alarm = Transform;
+
+  Transform.AlarmFrom -> AlarmFrom;
+  Transform.Counter -> Counter;
+}
+
diff --git a/tos/chips/msp430/timer/BusyWait32khzC.nc b/tos/chips/msp430/timer/BusyWait32khzC.nc
new file mode 100644
index 00000000..3ab730c7
--- /dev/null
+++ b/tos/chips/msp430/timer/BusyWait32khzC.nc
@@ -0,0 +1,52 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration BusyWait32khzC
+{
+  provides interface BusyWait<T32khz,uint16_t>;
+}
+implementation
+{
+  components new BusyWaitCounterC(T32khz,uint16_t)
+           , Msp430Counter32khzC
+           ;
+
+  BusyWait = BusyWaitCounterC;
+  BusyWaitCounterC.Counter -> Msp430Counter32khzC;
+}
+
diff --git a/tos/chips/msp430/timer/BusyWaitMicroC.nc b/tos/chips/msp430/timer/BusyWaitMicroC.nc
new file mode 100644
index 00000000..a7e4ba6a
--- /dev/null
+++ b/tos/chips/msp430/timer/BusyWaitMicroC.nc
@@ -0,0 +1,52 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration BusyWaitMicroC
+{
+  provides interface BusyWait<TMicro,uint16_t>;
+}
+implementation
+{
+  components new BusyWaitCounterC(TMicro,uint16_t)
+           , Msp430CounterMicroC
+           ;
+
+  BusyWait = BusyWaitCounterC;
+  BusyWaitCounterC.Counter -> Msp430CounterMicroC;
+}
+
diff --git a/tos/chips/msp430/timer/Counter32khz16C.nc b/tos/chips/msp430/timer/Counter32khz16C.nc
new file mode 100644
index 00000000..fcccc8ca
--- /dev/null
+++ b/tos/chips/msp430/timer/Counter32khz16C.nc
@@ -0,0 +1,51 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Counter32khz16C provides at 16-bit counter at 32768 ticks per second.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration Counter32khz16C
+{
+  provides interface Counter<T32khz,uint16_t>;
+}
+implementation
+{
+  components Msp430Counter32khzC as CounterFrom;
+
+  Counter = CounterFrom;
+}
+
diff --git a/tos/chips/msp430/timer/Counter32khz32C.nc b/tos/chips/msp430/timer/Counter32khz32C.nc
new file mode 100644
index 00000000..82842f4e
--- /dev/null
+++ b/tos/chips/msp430/timer/Counter32khz32C.nc
@@ -0,0 +1,54 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Counter32khz32C provides at 32-bit counter at 32768 ticks per second.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration Counter32khz32C
+{
+  provides interface Counter<T32khz,uint32_t>;
+}
+implementation
+{
+  components Msp430Counter32khzC as CounterFrom;
+  components new TransformCounterC(T32khz,uint32_t,T32khz,uint16_t,0,uint16_t) as Transform;
+
+  Counter = Transform;
+
+  Transform.CounterFrom -> CounterFrom;
+}
+
diff --git a/tos/chips/msp430/timer/CounterMilli16C.nc b/tos/chips/msp430/timer/CounterMilli16C.nc
new file mode 100644
index 00000000..4e2f6f46
--- /dev/null
+++ b/tos/chips/msp430/timer/CounterMilli16C.nc
@@ -0,0 +1,54 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * CounterMilli16C provides at 16-bit counter at 1024 ticks per second.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+    
+configuration CounterMilli16C
+{
+  provides interface Counter<TMilli,uint16_t>;
+}
+implementation
+{
+  components Msp430Counter32khzC as CounterFrom;
+  components new TransformCounterC(TMilli,uint16_t,T32khz,uint16_t,5,uint8_t) as Transform;
+
+  Counter = Transform.Counter;
+
+  Transform.CounterFrom -> CounterFrom;
+}
+
diff --git a/tos/chips/msp430/timer/CounterMilli32C.nc b/tos/chips/msp430/timer/CounterMilli32C.nc
new file mode 100644
index 00000000..34e4258b
--- /dev/null
+++ b/tos/chips/msp430/timer/CounterMilli32C.nc
@@ -0,0 +1,54 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * CounterMilli32C provides at 32-bit counter at 1024 ticks per second.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+    
+configuration CounterMilli32C
+{
+  provides interface Counter<TMilli,uint32_t>;
+}
+implementation
+{
+  components Msp430Counter32khzC as CounterFrom;
+  components new TransformCounterC(TMilli,uint32_t,T32khz,uint16_t,5,uint32_t) as Transform;
+
+  Counter = Transform.Counter;
+
+  Transform.CounterFrom -> CounterFrom;
+}
+
diff --git a/tos/chips/msp430/timer/GpioCaptureC.nc b/tos/chips/msp430/timer/GpioCaptureC.nc
new file mode 100644
index 00000000..f84624a8
--- /dev/null
+++ b/tos/chips/msp430/timer/GpioCaptureC.nc
@@ -0,0 +1,82 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Jonathan Hui
+ * @author Joe Polastre
+ */
+
+generic module GpioCaptureC() @safe() {
+
+  provides interface GpioCapture as Capture;
+  uses interface Msp430TimerControl;
+  uses interface Msp430Capture;
+  uses interface HplMsp430GeneralIO as GeneralIO;
+
+}
+
+implementation {
+
+  error_t enableCapture( uint8_t mode ) {
+    atomic {
+      call Msp430TimerControl.disableEvents();
+      call GeneralIO.selectModuleFunc();
+      call Msp430TimerControl.clearPendingInterrupt();
+      call Msp430Capture.clearOverflow();
+      call Msp430TimerControl.setControlAsCapture( mode );
+      call Msp430TimerControl.enableEvents();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t Capture.captureRisingEdge() {
+    return enableCapture( MSP430TIMER_CM_RISING );
+  }
+
+  async command error_t Capture.captureFallingEdge() {
+    return enableCapture( MSP430TIMER_CM_FALLING );
+  }
+
+  async command void Capture.disable() {
+    atomic {
+      call Msp430TimerControl.disableEvents();
+      call GeneralIO.selectIOFunc();
+    }
+  }
+
+  async event void Msp430Capture.captured( uint16_t time ) {
+    call Msp430TimerControl.clearPendingInterrupt();
+    call Msp430Capture.clearOverflow();
+    signal Capture.captured( time );
+  }
+
+}
diff --git a/tos/chips/msp430/timer/HilTimerMilliC.nc b/tos/chips/msp430/timer/HilTimerMilliC.nc
new file mode 100644
index 00000000..d6cfa418
--- /dev/null
+++ b/tos/chips/msp430/timer/HilTimerMilliC.nc
@@ -0,0 +1,64 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HilTimerMilliC provides a parameterized interface to a virtualized
+ * millisecond timer.  TimerMilliC in tos/system/ uses this component to
+ * allocate new timers.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration HilTimerMilliC
+{
+  provides interface Init;
+  provides interface Timer<TMilli> as TimerMilli[ uint8_t num ];
+  provides interface LocalTime<TMilli>;
+}
+implementation
+{
+  components new AlarmMilli32C();
+  components new AlarmToTimerC(TMilli);
+  components new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI));
+  components new CounterToLocalTimeC(TMilli);
+  components CounterMilli32C;
+
+  Init = AlarmMilli32C;
+  TimerMilli = VirtualizeTimerC;
+  LocalTime = CounterToLocalTimeC;
+
+  VirtualizeTimerC.TimerFrom -> AlarmToTimerC;
+  AlarmToTimerC.Alarm -> AlarmMilli32C;
+  CounterToLocalTimeC.Counter -> CounterMilli32C;
+}
diff --git a/tos/chips/msp430/timer/LocalTimeHybridMicroC.nc b/tos/chips/msp430/timer/LocalTimeHybridMicroC.nc
new file mode 100644
index 00000000..643c9af7
--- /dev/null
+++ b/tos/chips/msp430/timer/LocalTimeHybridMicroC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */ 
+ 
+#include <Timer.h>
+#include <Msp430HybridAlarmCounter.h>
+
+configuration LocalTimeHybridMicroC
+{
+	provides interface LocalTime<TMicro>;
+}
+
+implementation
+{
+	components Msp430HybridAlarmCounterC;
+	components new TransformCounterC(TMicro, uint32_t, T2ghz, uint32_t, 11, uint32_t);
+	components new CounterToLocalTimeC(TMicro);
+
+	LocalTime = CounterToLocalTimeC;
+	CounterToLocalTimeC.Counter -> TransformCounterC;
+	TransformCounterC.CounterFrom -> Msp430HybridAlarmCounterC;
+}
diff --git a/tos/chips/msp430/timer/LocalTimeMicroC.nc b/tos/chips/msp430/timer/LocalTimeMicroC.nc
new file mode 100644
index 00000000..e7a82dd2
--- /dev/null
+++ b/tos/chips/msp430/timer/LocalTimeMicroC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */ 
+ 
+#include <Timer.h>
+
+configuration LocalTimeMicroC
+{
+	provides interface LocalTime<TMicro>;
+}
+
+implementation
+{
+
+#ifndef DISABLE_HYBRID_MICRO
+	components LocalTimeHybridMicroC;
+	LocalTime = LocalTimeHybridMicroC;
+#else
+	components Msp430CounterMicroC;
+	components new TransformCounterC(TMicro, uint32_t, TMicro, uint16_t, 0, uint32_t);
+	components new CounterToLocalTimeC(TMicro);
+
+	LocalTime = CounterToLocalTimeC;
+	CounterToLocalTimeC.Counter -> TransformCounterC;
+	TransformCounterC.CounterFrom -> Msp430CounterMicroC;
+#endif	
+
+}
diff --git a/tos/chips/msp430/timer/Msp430AlarmC.nc b/tos/chips/msp430/timer/Msp430AlarmC.nc
new file mode 100644
index 00000000..b97f28c3
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430AlarmC.nc
@@ -0,0 +1,118 @@
+//$Id: Msp430AlarmC.nc,v 1.6 2010-06-29 22:07:45 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Msp430Alarm is a generic component that wraps the MSP430 HPL timers and
+ * compares into a TinyOS Alarm.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+generic module Msp430AlarmC(typedef frequency_tag) @safe()
+{
+  provides interface Init;
+  provides interface Alarm<frequency_tag,uint16_t> as Alarm;
+  uses interface Msp430Timer;
+  uses interface Msp430TimerControl;
+  uses interface Msp430Compare;
+}
+implementation
+{
+  command error_t Init.init()
+  {
+    call Msp430TimerControl.disableEvents();
+    call Msp430TimerControl.setControlAsCompare();
+    return SUCCESS;
+  }
+
+  async command void Alarm.start( uint16_t dt )
+  {
+    call Alarm.startAt( call Alarm.getNow(), dt );
+  }
+
+  async command void Alarm.stop()
+  {
+    call Msp430TimerControl.disableEvents();
+  }
+
+  async event void Msp430Compare.fired()
+  {
+    call Msp430TimerControl.disableEvents();
+    signal Alarm.fired();
+  }
+
+  async command bool Alarm.isRunning()
+  {
+    return call Msp430TimerControl.areEventsEnabled();
+  }
+
+  async command void Alarm.startAt( uint16_t t0, uint16_t dt )
+  {
+    atomic
+    {
+      uint16_t now = call Msp430Timer.get();
+      uint16_t elapsed = now - t0;
+      if( elapsed >= dt )
+      {
+        call Msp430Compare.setEventFromNow(2);
+      }
+      else
+      {
+        uint16_t remaining = dt - elapsed;
+        if( remaining <= 2 )
+          call Msp430Compare.setEventFromNow(2);
+        else
+          call Msp430Compare.setEvent( now+remaining );
+      }
+      call Msp430TimerControl.clearPendingInterrupt();
+      call Msp430TimerControl.enableEvents();
+    }
+  }
+
+  async command uint16_t Alarm.getNow()
+  {
+    return call Msp430Timer.get();
+  }
+
+  async command uint16_t Alarm.getAlarm()
+  {
+    return call Msp430Compare.getEvent();
+  }
+
+  async event void Msp430Timer.overflow()
+  {
+  }
+}
+
diff --git a/tos/chips/msp430/timer/Msp430Capture.nc b/tos/chips/msp430/timer/Msp430Capture.nc
new file mode 100644
index 00000000..acfabc22
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Capture.nc
@@ -0,0 +1,89 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ */
+
+#include "Msp430Timer.h"
+
+interface Msp430Capture
+{
+  /**
+   * Reads the value of the last capture event in TxCCRx
+   */
+  async command uint16_t getEvent();
+
+  /**
+   * Set the edge that the capture should occur
+   *
+   * @param cm Capture Mode for edge capture.
+   * enums exist for:
+   *   MSP430TIMER_CM_NONE is no capture.
+   *   MSP430TIMER_CM_RISING is rising edge capture.
+   *   MSP430TIMER_CM_FALLING is a falling edge capture.
+   *   MSP430TIMER_CM_BOTH captures on both rising and falling edges.
+   */
+  async command void setEdge(uint8_t cm);
+
+  /**
+   * Determine if a capture overflow is pending.
+   *
+   * @return TRUE if the capture register has overflowed
+   */
+  async command bool isOverflowPending();
+
+  /**
+   * Clear the capture overflow flag for when multiple captures occur
+   */
+  async command void clearOverflow();
+
+  /**
+   * Set whether the capture should occur synchronously or asynchronously.
+   * TinyOS default is synchronous captures.
+   * WARNING: if the capture signal is asynchronous to the timer clock,
+   *          it could case a race condition (see Timer documentation
+   *          in MSP430F1xx user guide)
+   * @param synchronous TRUE to synchronize the timer capture with the
+   *        next timer clock instead of occurring asynchronously.
+   */
+  async command void setSynchronous(bool synchronous);
+
+  /**
+   * Signalled when an event is captured.
+   *
+   * @param time The time of the capture event
+   */
+  async event void captured(uint16_t time);
+
+}
+
diff --git a/tos/chips/msp430/timer/Msp430ClockC.nc b/tos/chips/msp430/timer/Msp430ClockC.nc
new file mode 100644
index 00000000..ca85bb67
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430ClockC.nc
@@ -0,0 +1,50 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+configuration Msp430ClockC
+{
+  provides interface Init;
+  provides interface Msp430ClockInit;
+}
+implementation
+{
+  components Msp430ClockP, Msp430TimerC, McuSleepC;
+
+  Init = Msp430ClockP;
+  Msp430ClockInit = Msp430ClockP;
+  McuSleepC.McuPowerOverride -> Msp430ClockP;
+}
+
diff --git a/tos/chips/msp430/timer/Msp430ClockInit.nc b/tos/chips/msp430/timer/Msp430ClockInit.nc
new file mode 100644
index 00000000..406fadb6
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430ClockInit.nc
@@ -0,0 +1,50 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ */
+
+interface Msp430ClockInit
+{
+  event void setupDcoCalibrate();
+  event void initClocks();
+  event void initTimerA();
+  event void initTimerB();
+
+  command void defaultSetupDcoCalibrate();
+  command void defaultInitClocks();
+  command void defaultInitTimerA();
+  command void defaultInitTimerB();
+}
+
diff --git a/tos/chips/msp430/timer/Msp430ClockP.nc b/tos/chips/msp430/timer/Msp430ClockP.nc
new file mode 100644
index 00000000..cbffae25
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430ClockP.nc
@@ -0,0 +1,251 @@
+//$Id: Msp430ClockP.nc,v 1.9 2010-06-29 22:07:45 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @author Vlado Handziski <handzisk@tkn.tu-berlind.de>
+ */
+
+#include <Msp430DcoSpec.h>
+
+#include "Msp430Timer.h"
+
+module Msp430ClockP @safe()
+{
+  provides interface Init;
+  provides interface Msp430ClockInit;
+  provides interface McuPowerOverride;
+}
+implementation
+{
+  MSP430REG_NORACE(IE1);
+  MSP430REG_NORACE(TACTL);
+  MSP430REG_NORACE(TAIV);
+  MSP430REG_NORACE(TBCTL);
+  MSP430REG_NORACE(TBIV);
+
+  enum
+  {
+    ACLK_CALIB_PERIOD = 8,
+    TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD,
+  };
+
+  async command mcu_power_t McuPowerOverride.lowestState() {
+    return MSP430_POWER_LPM3;
+  }
+
+  command void Msp430ClockInit.defaultSetupDcoCalibrate()
+  {
+  
+    // --- setup ---
+
+    TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0
+    TBCTL = TBSSEL0 | MC1;
+    BCSCTL1 = XT2OFF | RSEL2;
+    BCSCTL2 = 0;
+    TBCCTL0 = CM0;
+   }
+    
+  command void Msp430ClockInit.defaultInitClocks()
+  {
+    // BCSCTL1
+    // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK
+    // .XTS = 0; set low frequency mode for LXFT1
+    // .DIVA = 0; set the divisor on ACLK to 1
+    // .RSEL, do not modify
+    BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0));
+
+    // BCSCTL2
+    // .SELM = 0; select DCOCLK as source for MCLK
+    // .DIVM = 0; set the divisor of MCLK to 1
+    // .SELS = 0; select DCOCLK as source for SCLK
+    // .DIVS = 2; set the divisor of SCLK to 4
+    // .DCOR = 0; select internal resistor for DCO
+    BCSCTL2 = DIVS1;
+
+    // IE1.OFIE = 0; no interrupt for oscillator fault
+    CLR_FLAG( IE1, OFIE );
+  }
+
+  command void Msp430ClockInit.defaultInitTimerA()
+  {
+    TAR = 0;
+
+    // TACTL
+    // .TACLGRP = 0; each TACL group latched independently
+    // .CNTL = 0; 16-bit counter
+    // .TASSEL = 2; source SMCLK = DCO/4
+    // .ID = 0; input divisor of 1
+    // .MC = 0; initially disabled
+    // .TACLR = 0; reset timer A
+    // .TAIE = 1; enable timer A interrupts
+    TACTL = TASSEL1 | TAIE;
+  }
+
+  command void Msp430ClockInit.defaultInitTimerB()
+  {
+    TBR = 0;
+
+    // TBCTL
+    // .TBCLGRP = 0; each TBCL group latched independently
+    // .CNTL = 0; 16-bit counter
+    // .TBSSEL = 1; source ACLK
+    // .ID = 0; input divisor of 1
+    // .MC = 0; initially disabled
+    // .TBCLR = 0; reset timer B
+    // .TBIE = 1; enable timer B interrupts
+    TBCTL = TBSSEL0 | TBIE;
+  }
+
+  default event void Msp430ClockInit.setupDcoCalibrate()
+  {
+    call Msp430ClockInit.defaultSetupDcoCalibrate();
+  }
+  
+  default event void Msp430ClockInit.initClocks()
+  {
+    call Msp430ClockInit.defaultInitClocks();
+  }
+
+  default event void Msp430ClockInit.initTimerA()
+  {
+    call Msp430ClockInit.defaultInitTimerA();
+  }
+
+  default event void Msp430ClockInit.initTimerB()
+  {
+    call Msp430ClockInit.defaultInitTimerB();
+  }
+
+
+  void startTimerA()
+  {
+    // TACTL.MC = 2; continuous mode
+    TACTL = MC1 | (TACTL & ~(MC1|MC0));
+  }
+
+  void stopTimerA()
+  {
+    //TACTL.MC = 0; stop timer B
+    TACTL = TACTL & ~(MC1|MC0);
+  }
+
+  void startTimerB()
+  {
+    // TBCTL.MC = 2; continuous mode
+    TBCTL = MC1 | (TBCTL & ~(MC1|MC0));
+  }
+
+  void stopTimerB()
+  {
+    //TBCTL.MC = 0; stop timer B
+    TBCTL = TBCTL & ~(MC1|MC0);
+  }
+
+  void set_dco_calib( int calib )
+  {
+    BCSCTL1 = (BCSCTL1 & ~0x07) | ((calib >> 8) & 0x07);
+    DCOCTL = calib & 0xff;
+  }
+
+  uint16_t test_calib_busywait_delta( int calib )
+  {
+    int8_t aclk_count = 2;
+    uint16_t dco_prev = 0;
+    uint16_t dco_curr = 0;
+
+    set_dco_calib( calib );
+
+    while( aclk_count-- > 0 )
+    {
+      TBCCR0 = TBR + ACLK_CALIB_PERIOD; // set next interrupt
+      TBCCTL0 &= ~CCIFG; // clear pending interrupt
+      while( (TBCCTL0 & CCIFG) == 0 ); // busy wait
+      dco_prev = dco_curr;
+      dco_curr = TAR;
+    }
+
+    return dco_curr - dco_prev;
+  }
+
+  // busyCalibrateDCO
+  // Should take about 9ms if ACLK_CALIB_PERIOD=8.
+  // DCOCTL and BCSCTL1 are calibrated when done.
+  void busyCalibrateDco()
+  {
+    // --- variables ---
+    int calib;
+    int step;
+
+    // --- calibrate ---
+
+    // Binary search for RSEL,DCO,DCOMOD.
+    // It's okay that RSEL isn't monotonic.
+
+    for( calib=0,step=0x800; step!=0; step>>=1 )
+    {
+      // if the step is not past the target, commit it
+      if( test_calib_busywait_delta(calib|step) <= TARGET_DCO_DELTA )
+        calib |= step;
+    }
+
+    // if DCOx is 7 (0x0e0 in calib), then the 5-bit MODx is not useable, set it to 0
+    if( (calib & 0x0e0) == 0x0e0 )
+      calib &= ~0x01f;
+
+    set_dco_calib( calib );
+  }
+
+  command error_t Init.init()
+  {
+    // Reset timers and clear interrupt vectors
+    TACTL = TACLR;
+    TAIV = 0;
+    TBCTL = TBCLR;
+    TBIV = 0;
+
+    atomic
+    {
+      signal Msp430ClockInit.setupDcoCalibrate();
+      busyCalibrateDco();
+      signal Msp430ClockInit.initClocks();
+      signal Msp430ClockInit.initTimerA();
+      signal Msp430ClockInit.initTimerB();
+      startTimerA();
+      startTimerB();
+    }
+
+    return SUCCESS;
+  }
+}
+
diff --git a/tos/chips/msp430/timer/Msp430Compare.nc b/tos/chips/msp430/timer/Msp430Compare.nc
new file mode 100644
index 00000000..beec89d7
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Compare.nc
@@ -0,0 +1,48 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+#include "Msp430Timer.h"
+
+interface Msp430Compare
+{
+  async command uint16_t getEvent();
+  async command void setEvent( uint16_t time );
+  async command void setEventFromPrev( uint16_t delta );
+  async command void setEventFromNow( uint16_t delta );
+
+  async event void fired();
+
+}
+
diff --git a/tos/chips/msp430/timer/Msp430Counter32khzC.nc b/tos/chips/msp430/timer/Msp430Counter32khzC.nc
new file mode 100644
index 00000000..dfedc66e
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Counter32khzC.nc
@@ -0,0 +1,53 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Msp430Counter32khC provides the standard 32khz counter for the MSP430.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration Msp430Counter32khzC
+{
+  provides interface Counter<T32khz,uint16_t> as Msp430Counter32khz;
+}
+implementation
+{
+  components Msp430TimerC;
+  components new Msp430CounterC(T32khz) as Counter;
+
+  Msp430Counter32khz = Counter;
+  Counter.Msp430Timer -> Msp430TimerC.TimerB;
+}
+
diff --git a/tos/chips/msp430/timer/Msp430CounterC.nc b/tos/chips/msp430/timer/Msp430CounterC.nc
new file mode 100644
index 00000000..25a62c8c
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430CounterC.nc
@@ -0,0 +1,69 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Msp430Counter is a generic component that wraps the MSP430 HPL timers into a
+ * TinyOS Counter.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+ 
+generic module Msp430CounterC( typedef frequency_tag ) @safe()
+{
+  provides interface Counter<frequency_tag,uint16_t> as Counter;
+  uses interface Msp430Timer;
+}
+implementation
+{
+  async command uint16_t Counter.get()
+  {
+    return call Msp430Timer.get();
+  }
+
+  async command bool Counter.isOverflowPending()
+  {
+    return call Msp430Timer.isOverflowPending();
+  }
+
+  async command void Counter.clearOverflow()
+  {
+    call Msp430Timer.clearOverflow();
+  }
+
+  async event void Msp430Timer.overflow()
+  {
+    signal Counter.overflow();
+  }
+}
+
diff --git a/tos/chips/msp430/timer/Msp430CounterMicroC.nc b/tos/chips/msp430/timer/Msp430CounterMicroC.nc
new file mode 100644
index 00000000..195030ce
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430CounterMicroC.nc
@@ -0,0 +1,54 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Msp430Counter32khC provides the standard 32khz counter for the MSP430.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration Msp430CounterMicroC
+{
+  provides interface Counter<TMicro,uint16_t> as Msp430CounterMicro;
+}
+implementation
+{
+  components Msp430TimerC
+           , new Msp430CounterC(TMicro) as Counter
+           ;
+
+  Msp430CounterMicro = Counter;
+  Counter.Msp430Timer -> Msp430TimerC.TimerA;
+}
+
diff --git a/tos/chips/msp430/timer/Msp430DcoCalibC.nc b/tos/chips/msp430/timer/Msp430DcoCalibC.nc
new file mode 100644
index 00000000..248318e7
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430DcoCalibC.nc
@@ -0,0 +1,47 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+configuration Msp430DcoCalibC
+{
+}
+implementation
+{
+  components Msp430DcoCalibP, Msp430TimerC;
+
+  Msp430DcoCalibP.TimerMicro -> Msp430TimerC.TimerA;
+  Msp430DcoCalibP.Timer32khz -> Msp430TimerC.TimerB;
+}
+
diff --git a/tos/chips/msp430/timer/Msp430DcoCalibP.nc b/tos/chips/msp430/timer/Msp430DcoCalibP.nc
new file mode 100644
index 00000000..19f2574b
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430DcoCalibP.nc
@@ -0,0 +1,93 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+#error "Msp430DcoCalibP is broken and will incorrectly adjust TimerA because it does not take into account MCU sleep."
+
+module Msp430DcoCalibP
+{
+  uses interface Msp430Timer as TimerMicro;
+  uses interface Msp430Timer as Timer32khz;
+}
+implementation
+{
+  uint16_t m_prev;
+
+  enum
+  {
+    TARGET_DELTA = 2048, // number of 32khz ticks during 65536 ticks at 1mhz
+    MAX_DEVIATION = 7, // about 0.35% error
+  };
+
+  // this gets executed 32 times a second
+  async event void TimerMicro.overflow()
+  {
+    uint16_t now = call Timer32khz.get();
+    uint16_t delta = now - m_prev;
+    m_prev = now;
+
+    if( delta > (TARGET_DELTA+MAX_DEVIATION) )
+    {
+      // too many 32khz ticks means the DCO is running too slow, speed it up
+      if( DCOCTL < 0xe0 )
+      {
+        DCOCTL++;
+      }
+      else if( (BCSCTL1 & 7) < 7 )
+      {
+        BCSCTL1++;
+        DCOCTL = 96;
+      }
+    }
+    else if( delta < (TARGET_DELTA-MAX_DEVIATION) )
+    {
+      // too few 32khz ticks means the DCO is running too fast, slow it down
+      if( DCOCTL > 0 )
+      {
+        DCOCTL--;
+      }
+      else if( (BCSCTL1 & 7) > 0 )
+      {
+        BCSCTL1--;
+        DCOCTL = 128;
+      }
+    }
+  }
+
+  async event void Timer32khz.overflow()
+  {
+  }
+}
+
diff --git a/tos/chips/msp430/timer/Msp430DcoSpec.h b/tos/chips/msp430/timer/Msp430DcoSpec.h
new file mode 100644
index 00000000..84ce060a
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430DcoSpec.h
@@ -0,0 +1,49 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Specify the target cpu clock speed of your platform by overriding this file.
+ *
+ * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz.  Some
+ * platforms have an external high frequency oscilator to generate the SMCLK
+ * (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These
+ * oscillators provide metric frequencies, but may not run in power down
+ * modes. Here, we need to switch the SMCLK source, which is easier if
+ * the external and thd DCO source frequency are the same.
+ * 
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+
+
+#ifndef MS430DCOSPEC_H
+#define MS430DCOSPEC_H
+
+#define TARGET_DCO_KHZ 4096 // the target DCO clock rate in binary kHz
+#define ACLK_KHZ 32 // the ACLK rate in binary kHz
+#endif
diff --git a/tos/chips/msp430/timer/Msp430HybridAlarmCounter.h b/tos/chips/msp430/timer/Msp430HybridAlarmCounter.h
new file mode 100644
index 00000000..150c5944
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430HybridAlarmCounter.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */  
+ 
+#ifndef __MSP430HYBRIDALARMCOUNTER_H__
+#define __MSP430HYBRIDALARMCOUNTER_H__
+
+typedef struct T2ghz {
+	uint8_t dummy;
+} T2ghz;
+
+#endif /* __MSP430HYBRIDALARMCOUNTER_H__ */
\ No newline at end of file
diff --git a/tos/chips/msp430/timer/Msp430HybridAlarmCounterC.nc b/tos/chips/msp430/timer/Msp430HybridAlarmCounterC.nc
new file mode 100644
index 00000000..42c0ab2e
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430HybridAlarmCounterC.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */  
+ 
+#include <Msp430HybridAlarmCounter.h>
+
+configuration Msp430HybridAlarmCounterC {
+	provides {
+		interface Counter<T2ghz,uint32_t> as Counter2ghz; 
+		interface Alarm<T2ghz,uint32_t> as Alarm2ghz; 	
+	}
+}
+implementation {
+	components Msp430HybridAlarmCounterP
+		,McuSleepC
+		,Msp430CounterMicroC
+		,Msp430Counter32khzC
+		,new Alarm32khz16C()
+		,new AlarmMicro16C()		
+		;
+		
+
+	Msp430HybridAlarmCounterP.Counter32khz -> Msp430Counter32khzC;
+	Msp430HybridAlarmCounterP.CounterMicro -> Msp430CounterMicroC;
+	Msp430HybridAlarmCounterP.Alarm32khz -> Alarm32khz16C;
+	Msp430HybridAlarmCounterP.AlarmMicro -> AlarmMicro16C;
+	
+  	Msp430HybridAlarmCounterP.McuPowerOverride <- McuSleepC; 	
+	
+	Msp430HybridAlarmCounterP.Counter2ghz = Counter2ghz;
+	Msp430HybridAlarmCounterP.Alarm2ghz = Alarm2ghz;
+
+}
\ No newline at end of file
diff --git a/tos/chips/msp430/timer/Msp430HybridAlarmCounterP.nc b/tos/chips/msp430/timer/Msp430HybridAlarmCounterP.nc
new file mode 100644
index 00000000..43ae2c6d
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430HybridAlarmCounterP.nc
@@ -0,0 +1,268 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */  
+ 
+module Msp430HybridAlarmCounterP {
+	uses {
+		interface Counter<TMicro,uint16_t> as CounterMicro; 
+		interface Counter<T32khz,uint16_t> as Counter32khz;
+		interface Alarm<TMicro,uint16_t> as AlarmMicro; 
+		interface Alarm<T32khz,uint16_t> as Alarm32khz;
+	}
+	provides {
+  		interface McuPowerOverride; 		
+		interface Counter<T2ghz,uint32_t> as Counter2ghz; 
+		interface Alarm<T2ghz,uint32_t> as Alarm2ghz; 	
+	}
+}
+implementation {
+	
+  norace uint32_t fireTime;
+
+  /*------------------------- UTILITY FUNCTIONS -------------------------*/
+  inline uint16_t now32khz() {
+  	return call Counter32khz.get();
+  }
+
+  inline uint16_t nowMicro() {
+  	return call CounterMicro.get();
+  }
+
+  // return all three clock readings
+  inline void now(uint16_t* t32khz, uint16_t* tMicro, uint32_t* t2ghz) {
+   	uint16_t eMicro;
+	
+	atomic {
+		// now from 32khz
+		*t32khz = now32khz();
+	
+		// now from Micro
+   		*tMicro = nowMicro();
+   	
+		// wait until the 32khz clock ticks
+		while(*t32khz == now32khz());
+	}
+	
+	// elapsed time since entering this function in Micro
+   	eMicro = nowMicro() - *tMicro;
+
+   	// hi byte of hybrid time is 32khz tick
+   	*t2ghz = (uint32_t)(*t32khz) << 16;
+   	
+   	// adjust with the elapsed micro time
+   	*t2ghz -= (uint32_t)eMicro << 11 ;
+  }
+
+  inline uint32_t now2ghz() {
+   	uint16_t t32khz, tMicro;
+	uint32_t t2ghz;	
+	
+	now(&t32khz, &tMicro, &t2ghz);
+	
+   	return t2ghz;
+  }
+
+  /*------------------------- COUNTER -------------------------*/
+   
+  /** 
+   * Return counter value. May take up to 32us to complete.
+   * @return Current counter value.
+   */ 
+   async command uint32_t Counter2ghz.get() {
+	return now2ghz();
+   }
+
+  /** 
+   * Return TRUE if an overflow event will occur after the outermost atomic
+   * block is exits.  FALSE otherwise.
+   * @return Counter pending overflow status.
+   */
+  async command bool Counter2ghz.isOverflowPending() {
+  	return call Counter32khz.isOverflowPending();
+  }
+
+  /**
+   * Cancel a pending overflow interrupt.
+   */
+  async command void Counter2ghz.clearOverflow() {
+  	return call Counter32khz.clearOverflow();
+  }
+
+  /**
+   * T2ghz timer overflows when T32khz timer does.
+   */
+  async event void Counter32khz.overflow() {
+  	signal Counter2ghz.overflow();
+  }
+
+  async event void CounterMicro.overflow() {}
+  default async event void Counter2ghz.overflow() {}
+
+
+  /*------------------------- ALARM -------------------------*/
+	
+  /**
+   * Set a single-short alarm to some time units in the future. Replaces
+   * any current alarm time. Equivalent to start(getNow(), dt). The
+   * <code>fired</code> will be signaled when the alarm expires.
+   *
+   * @param dt Time until the alarm fires.
+   */
+  async command void Alarm2ghz.start(uint32_t dt) {
+   	uint16_t tMicro, t32khz;
+	uint32_t t2ghz;
+	
+	// read all clocks
+	now(&t32khz, &tMicro, &t2ghz);
+	
+	// stop running alarms
+	call Alarm2ghz.stop();
+
+	// absolute time of requested firing
+	fireTime = t2ghz + dt;
+	
+	// if dt is close (less than 32 32khz ticks), set up Micro alarm
+	if(dt < (1024ULL << 11)) {
+		call AlarmMicro.startAt(tMicro, dt >> 11);
+	} else {
+		// set up 32khz alarm 8 ticks before it's time
+		call Alarm32khz.startAt(t32khz, (dt >> 16) - 8);		
+	}	
+  }
+
+  async event void Alarm32khz.fired() {
+   	uint16_t tMicro, t32khz;
+	uint32_t t2ghz, dt;
+	
+	// read all clocks
+	now(&t32khz, &tMicro, &t2ghz);
+
+	// compute time to firing
+	dt = fireTime - t2ghz;
+  	
+	call AlarmMicro.startAt(tMicro, dt >> 11);
+  }
+
+  async event void AlarmMicro.fired() {
+  	// signal Alarm2ghz.fired
+	signal Alarm2ghz.fired();	
+  }
+
+  /**
+   * Cancel an alarm. Note that the <code>fired</code> event may have
+   * already been signaled (even if your code has not yet started
+   * executing).
+   */
+  async command void Alarm2ghz.stop() {
+	call Alarm32khz.stop();
+	call AlarmMicro.stop();  	
+  }
+
+  default async event void Alarm2ghz.fired() {}
+
+  /**
+   * Check if alarm is running. Note that a FALSE return does not indicate
+   * that the <code>fired</code> event will not be signaled (it may have
+   * already started executing, but not reached your code yet).
+   *
+   * @return TRUE if the alarm is still running.
+   */
+  async command bool Alarm2ghz.isRunning() {
+	return call Alarm32khz.isRunning()
+		|| call AlarmMicro.isRunning();  	
+  }
+
+  /**
+   * Set a single-short alarm to time t0+dt. Replaces any current alarm
+   * time. The <code>fired</code> will be signaled when the alarm expires.
+   * Alarms set in the past will fire "soon".
+   * 
+   * <p>Because the current time may wrap around, it is possible to use
+   * values of t0 greater than the <code>getNow</code>'s result. These
+   * values represent times in the past, i.e., the time at which getNow()
+   * would last of returned that value.
+   *
+   * @param t0 Base time for alarm.
+   * @param dt Alarm time as offset from t0.
+   */
+  async command void Alarm2ghz.startAt(uint32_t t0, uint32_t dt) {
+   	uint16_t tMicro, t32khz;
+	uint32_t t2ghz;
+	
+	// read all clocks
+	now(&t32khz, &tMicro, &t2ghz);
+	
+	// stop running alarms
+	call Alarm2ghz.stop();
+
+	// absolute time of requested firing
+	fireTime = t0 + dt;
+	
+	// time till requested firing
+	dt = fireTime - t2ghz;
+
+	// if dt is close (less than 32 32khz ticks), set up Micro alarm
+	if(dt < (1024ULL << 11)) {
+		call AlarmMicro.startAt(tMicro, dt >> 11);
+	} else {
+		// set up 32khz alarm 8 ticks before it's time
+		call Alarm32khz.startAt(t32khz, (dt >> 16) - 8);		
+	}	
+  }
+
+  /**
+   * Return the current time.
+   * @return Current time.
+   */
+  async command uint32_t Alarm2ghz.getNow(){
+  	return now2ghz();
+  }
+
+  /**
+   * Return the time the currently running alarm will fire or the time that
+   * the previously running alarm was set to fire.
+   * @return Alarm time.
+   */
+  async command uint32_t Alarm2ghz.getAlarm() {
+  	return fireTime;
+  }
+
+  async command mcu_power_t McuPowerOverride.lowestState() {
+  	if(call AlarmMicro.isRunning())
+    		return MSP430_POWER_LPM0; // does LPM1 increase jitter???
+	else
+    		return MSP430_POWER_LPM3;
+  }     
+  
+}
+
diff --git a/tos/chips/msp430/timer/Msp430Timer.h b/tos/chips/msp430/timer/Msp430Timer.h
new file mode 100644
index 00000000..46c2634c
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Timer.h
@@ -0,0 +1,105 @@
+//$Id: Msp430Timer.h,v 1.5 2010-06-29 22:07:45 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+#ifndef _H_Msp430Timer_h
+#define _H_Msp430Timer_h
+
+enum {
+  MSP430TIMER_CM_NONE = 0,
+  MSP430TIMER_CM_RISING = 1,
+  MSP430TIMER_CM_FALLING = 2,
+  MSP430TIMER_CM_BOTH = 3,
+
+  MSP430TIMER_STOP_MODE = 0,
+  MSP430TIMER_UP_MODE = 1,
+  MSP430TIMER_CONTINUOUS_MODE = 2,
+  MSP430TIMER_UPDOWN_MODE = 3,
+
+  MSP430TIMER_TACLK = 0,
+  MSP430TIMER_TBCLK = 0,
+  MSP430TIMER_ACLK = 1,
+  MSP430TIMER_SMCLK = 2,
+  MSP430TIMER_INCLK = 3,
+
+  MSP430TIMER_CLOCKDIV_1 = 0,
+  MSP430TIMER_CLOCKDIV_2 = 1,
+  MSP430TIMER_CLOCKDIV_4 = 2,
+  MSP430TIMER_CLOCKDIV_8 = 3,
+};
+
+typedef struct
+{
+  int ccifg : 1;    // capture/compare interrupt flag
+  int cov : 1;      // capture overflow flag
+  int out : 1;      // output value
+  int cci : 1;      // capture/compare input value
+  int ccie : 1;     // capture/compare interrupt enable
+  int outmod : 3;   // output mode
+  int cap : 1;      // 1=capture mode, 0=compare mode
+  int clld : 2;     // compare latch load
+  int scs : 1;      // synchronize capture source
+  int ccis : 2;     // capture/compare input select: 0=CCIxA, 1=CCIxB, 2=GND, 3=VCC
+  int cm : 2;       // capture mode: 0=none, 1=rising, 2=falling, 3=both
+} msp430_compare_control_t;
+
+typedef struct
+{
+  int taifg : 1;    // timer A interrupt flag
+  int taie : 1;     // timer A interrupt enable
+  int taclr : 1;    // timer A clear: resets TAR, .id, and .mc
+  int _unused0 : 1; // unused
+  int mc : 2;       // mode control: 0=stop, 1=up, 2=continuous, 3=up/down
+  int id : 2;       // input divisor: 0=/1, 1=/2, 2=/4, 3=/8
+  int tassel : 2;   // timer A source select: 0=TxCLK, 1=ACLK, 2=SMCLK, 3=INCLK
+  int _unused1 : 6; // unused
+} msp430_timer_a_control_t;
+
+typedef struct
+{
+  int tbifg : 1;    // timer B interrupt flag
+  int tbie : 1;     // timer B interrupt enable
+  int tbclr : 1;    // timer B clear: resets TAR, .id, and .mc
+  int _unused0 : 1; // unused
+  int mc : 2;       // mode control: 0=stop, 1=up, 2=continuous, 3=up/down
+  int id : 2;       // input divisor: 0=/1, 1=/2, 2=/4, 3=/8
+  int tbssel : 2;   // timer B source select: 0=TxCLK, 1=ACLK, 2=SMCLK, 3=INCLK
+  int _unused1 : 1; // unused
+  int cntl : 2;     // counter length: 0=16-bit, 1=12-bit, 2=10-bit, 3=8-bit
+  int tbclgrp : 2;  // tbclx group: 0=independent, 1=0/12/34/56, 2=0/123/456, 3=all
+  int _unused2 : 1; // unused
+} msp430_timer_b_control_t;
+
+#endif//_H_Msp430Timer_h
+
diff --git a/tos/chips/msp430/timer/Msp430Timer.nc b/tos/chips/msp430/timer/Msp430Timer.nc
new file mode 100644
index 00000000..a00283f2
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Timer.nc
@@ -0,0 +1,59 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+//@author Jan Hauer <hauer@tkn.tu-berlin.de>
+
+#include "Msp430Timer.h"
+
+interface Msp430Timer
+{
+  async command uint16_t get();
+  async command bool isOverflowPending();
+  async command void clearOverflow();
+  async event void overflow();
+
+  async command void setMode( int mode );
+  async command int getMode();
+  async command void clear();
+  async command void enableEvents();
+  async command void disableEvents();
+  async command void setClockSource( uint16_t clockSource );
+  async command void setInputDivider( uint16_t inputDivider );
+  // partial timer management, add more commands here as appropriate
+}
+
diff --git a/tos/chips/msp430/timer/Msp430Timer32khzC.nc b/tos/chips/msp430/timer/Msp430Timer32khzC.nc
new file mode 100644
index 00000000..10b09353
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Timer32khzC.nc
@@ -0,0 +1,53 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+generic configuration Msp430Timer32khzC()
+{
+  provides interface Msp430Timer;
+  provides interface Msp430TimerControl;
+  provides interface Msp430Compare;
+}
+implementation
+{
+  components Msp430Timer32khzMapC as Map;
+
+  enum { ALARM_ID = unique("Msp430Timer32khzMapC") };
+
+  Msp430Timer = Map.Msp430Timer[ ALARM_ID ];
+  Msp430TimerControl = Map.Msp430TimerControl[ ALARM_ID ];
+  Msp430Compare = Map.Msp430Compare[ ALARM_ID ];
+}
+
diff --git a/tos/chips/msp430/timer/Msp430Timer32khzMapC.nc b/tos/chips/msp430/timer/Msp430Timer32khzMapC.nc
new file mode 100644
index 00000000..df68c38f
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430Timer32khzMapC.nc
@@ -0,0 +1,84 @@
+//$Id: Msp430Timer32khzMapC.nc,v 1.5 2010-06-29 22:07:45 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Msp430Timer32khzMapC presents as paramaterized interfaces all of the 32khz
+ * hardware timers on the MSP430 that are available for compile time allocation
+ * by "new Alarm32khz16C()", "new AlarmMilli32C()", and so on.
+ *
+ * Platforms based on the MSP430 are encouraged to copy in and override this
+ * file, presenting only the hardware timers that are available for allocation
+ * on that platform.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+configuration Msp430Timer32khzMapC
+{
+  provides interface Msp430Timer[ uint8_t id ];
+  provides interface Msp430TimerControl[ uint8_t id ];
+  provides interface Msp430Compare[ uint8_t id ];
+}
+implementation
+{
+  components Msp430TimerC;
+
+  Msp430Timer[0] = Msp430TimerC.TimerB;
+  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
+  Msp430Compare[0] = Msp430TimerC.CompareB0;
+
+  Msp430Timer[1] = Msp430TimerC.TimerB;
+  Msp430TimerControl[1] = Msp430TimerC.ControlB1;
+  Msp430Compare[1] = Msp430TimerC.CompareB1;
+
+  Msp430Timer[2] = Msp430TimerC.TimerB;
+  Msp430TimerControl[2] = Msp430TimerC.ControlB2;
+  Msp430Compare[2] = Msp430TimerC.CompareB2;
+
+  Msp430Timer[3] = Msp430TimerC.TimerB;
+  Msp430TimerControl[3] = Msp430TimerC.ControlB3;
+  Msp430Compare[3] = Msp430TimerC.CompareB3;
+
+  Msp430Timer[4] = Msp430TimerC.TimerB;
+  Msp430TimerControl[4] = Msp430TimerC.ControlB4;
+  Msp430Compare[4] = Msp430TimerC.CompareB4;
+
+  Msp430Timer[5] = Msp430TimerC.TimerB;
+  Msp430TimerControl[5] = Msp430TimerC.ControlB5;
+  Msp430Compare[5] = Msp430TimerC.CompareB5;
+
+  Msp430Timer[6] = Msp430TimerC.TimerB;
+  Msp430TimerControl[6] = Msp430TimerC.ControlB6;
+  Msp430Compare[6] = Msp430TimerC.CompareB6;
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerC.nc b/tos/chips/msp430/timer/Msp430TimerC.nc
new file mode 100644
index 00000000..4230468a
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerC.nc
@@ -0,0 +1,174 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+configuration Msp430TimerC
+{
+  provides interface Msp430Timer as TimerA;
+  provides interface Msp430TimerControl as ControlA0;
+  provides interface Msp430TimerControl as ControlA1;
+  provides interface Msp430TimerControl as ControlA2;
+  provides interface Msp430Compare as CompareA0;
+  provides interface Msp430Compare as CompareA1;
+  provides interface Msp430Compare as CompareA2;
+  provides interface Msp430Capture as CaptureA0;
+  provides interface Msp430Capture as CaptureA1;
+  provides interface Msp430Capture as CaptureA2;
+
+  provides interface Msp430Timer as TimerB;
+  provides interface Msp430TimerControl as ControlB0;
+  provides interface Msp430TimerControl as ControlB1;
+  provides interface Msp430TimerControl as ControlB2;
+  provides interface Msp430TimerControl as ControlB3;
+  provides interface Msp430TimerControl as ControlB4;
+  provides interface Msp430TimerControl as ControlB5;
+  provides interface Msp430TimerControl as ControlB6;
+  provides interface Msp430Compare as CompareB0;
+  provides interface Msp430Compare as CompareB1;
+  provides interface Msp430Compare as CompareB2;
+  provides interface Msp430Compare as CompareB3;
+  provides interface Msp430Compare as CompareB4;
+  provides interface Msp430Compare as CompareB5;
+  provides interface Msp430Compare as CompareB6;
+  provides interface Msp430Capture as CaptureB0;
+  provides interface Msp430Capture as CaptureB1;
+  provides interface Msp430Capture as CaptureB2;
+  provides interface Msp430Capture as CaptureB3;
+  provides interface Msp430Capture as CaptureB4;
+  provides interface Msp430Capture as CaptureB5;
+  provides interface Msp430Capture as CaptureB6;
+}
+implementation
+{
+  components new Msp430TimerP( TAIV_, TAR_, TACTL_, TAIFG, TACLR, TAIE,
+               TASSEL0, TASSEL1, FALSE ) as Msp430TimerA
+           , new Msp430TimerP( TBIV_, TBR_, TBCTL_, TBIFG, TBCLR, TBIE,
+               TBSSEL0, TBSSEL1, TRUE ) as Msp430TimerB
+           , new Msp430TimerCapComP( TACCTL0_, TACCR0_ ) as Msp430TimerA0
+           , new Msp430TimerCapComP( TACCTL1_, TACCR1_ ) as Msp430TimerA1
+           , new Msp430TimerCapComP( TACCTL2_, TACCR2_ ) as Msp430TimerA2
+           , new Msp430TimerCapComP( TBCCTL0_, TBCCR0_ ) as Msp430TimerB0
+           , new Msp430TimerCapComP( TBCCTL1_, TBCCR1_ ) as Msp430TimerB1
+           , new Msp430TimerCapComP( TBCCTL2_, TBCCR2_ ) as Msp430TimerB2
+           , new Msp430TimerCapComP( TBCCTL3_, TBCCR3_ ) as Msp430TimerB3
+           , new Msp430TimerCapComP( TBCCTL4_, TBCCR4_ ) as Msp430TimerB4
+           , new Msp430TimerCapComP( TBCCTL5_, TBCCR5_ ) as Msp430TimerB5
+           , new Msp430TimerCapComP( TBCCTL6_, TBCCR6_ ) as Msp430TimerB6
+           , Msp430TimerCommonP as Common
+           ;
+
+  // Timer A
+  TimerA = Msp430TimerA.Timer;
+  Msp430TimerA.Overflow -> Msp430TimerA.Event[5];
+  Msp430TimerA.VectorTimerX0 -> Common.VectorTimerA0;
+  Msp430TimerA.VectorTimerX1 -> Common.VectorTimerA1;
+
+  // Timer A0
+  ControlA0 = Msp430TimerA0.Control;
+  CompareA0 = Msp430TimerA0.Compare;
+  CaptureA0 = Msp430TimerA0.Capture;
+  Msp430TimerA0.Timer -> Msp430TimerA.Timer;
+  Msp430TimerA0.Event -> Msp430TimerA.Event[0];
+
+  // Timer A1
+  ControlA1 = Msp430TimerA1.Control;
+  CompareA1 = Msp430TimerA1.Compare;
+  CaptureA1 = Msp430TimerA1.Capture;
+  Msp430TimerA1.Timer -> Msp430TimerA.Timer;
+  Msp430TimerA1.Event -> Msp430TimerA.Event[1];
+
+  // Timer A2
+  ControlA2 = Msp430TimerA2.Control;
+  CompareA2 = Msp430TimerA2.Compare;
+  CaptureA2 = Msp430TimerA2.Capture;
+  Msp430TimerA2.Timer -> Msp430TimerA.Timer;
+  Msp430TimerA2.Event -> Msp430TimerA.Event[2];
+
+  // Timer B
+  TimerB = Msp430TimerB.Timer;
+  Msp430TimerB.Overflow -> Msp430TimerB.Event[7];
+  Msp430TimerB.VectorTimerX0 -> Common.VectorTimerB0;
+  Msp430TimerB.VectorTimerX1 -> Common.VectorTimerB1;
+
+  // Timer B0
+  ControlB0 = Msp430TimerB0.Control;
+  CompareB0 = Msp430TimerB0.Compare;
+  CaptureB0 = Msp430TimerB0.Capture;
+  Msp430TimerB0.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB0.Event -> Msp430TimerB.Event[0];
+
+  // Timer B1
+  ControlB1 = Msp430TimerB1.Control;
+  CompareB1 = Msp430TimerB1.Compare;
+  CaptureB1 = Msp430TimerB1.Capture;
+  Msp430TimerB1.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB1.Event -> Msp430TimerB.Event[1];
+
+  // Timer B2
+  ControlB2 = Msp430TimerB2.Control;
+  CompareB2 = Msp430TimerB2.Compare;
+  CaptureB2 = Msp430TimerB2.Capture;
+  Msp430TimerB2.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB2.Event -> Msp430TimerB.Event[2];
+
+  // Timer B3
+  ControlB3 = Msp430TimerB3.Control;
+  CompareB3 = Msp430TimerB3.Compare;
+  CaptureB3 = Msp430TimerB3.Capture;
+  Msp430TimerB3.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB3.Event -> Msp430TimerB.Event[3];
+
+  // Timer B4
+  ControlB4 = Msp430TimerB4.Control;
+  CompareB4 = Msp430TimerB4.Compare;
+  CaptureB4 = Msp430TimerB4.Capture;
+  Msp430TimerB4.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB4.Event -> Msp430TimerB.Event[4];
+
+  // Timer B5
+  ControlB5 = Msp430TimerB5.Control;
+  CompareB5 = Msp430TimerB5.Compare;
+  CaptureB5 = Msp430TimerB5.Capture;
+  Msp430TimerB5.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB5.Event -> Msp430TimerB.Event[5];
+
+  // Timer B6
+  ControlB6 = Msp430TimerB6.Control;
+  CompareB6 = Msp430TimerB6.Compare;
+  CaptureB6 = Msp430TimerB6.Capture;
+  Msp430TimerB6.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB6.Event -> Msp430TimerB.Event[6];
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerCapComP.nc b/tos/chips/msp430/timer/Msp430TimerCapComP.nc
new file mode 100644
index 00000000..2d44016d
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerCapComP.nc
@@ -0,0 +1,200 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+#include "Msp430Timer.h"
+
+generic module Msp430TimerCapComP(
+    uint16_t TxCCTLx_addr,
+    uint16_t TxCCRx_addr
+  ) @safe()
+{
+  provides interface Msp430TimerControl as Control;
+  provides interface Msp430Compare as Compare;
+  provides interface Msp430Capture as Capture;
+  uses interface Msp430Timer as Timer;
+  uses interface Msp430TimerEvent as Event;
+}
+implementation
+{
+  #define TxCCTLx (*TCAST(volatile TYPE_TACCTL0* ONE, TxCCTLx_addr))
+  #define TxCCRx (*TCAST(volatile TYPE_TACCR0* ONE, TxCCRx_addr))
+
+  typedef msp430_compare_control_t cc_t;
+
+  DEFINE_UNION_CAST(CC2int,uint16_t,cc_t)
+  DEFINE_UNION_CAST(int2CC,cc_t,uint16_t)
+
+  uint16_t compareControl()
+  {
+    cc_t x = {
+      cm : 1,    // capture on rising edge
+      ccis : 0,  // capture/compare input select
+      clld : 0,  // TBCL1 loads on write to TBCCR1
+      cap : 0,   // compare mode
+      ccie : 0,  // capture compare interrupt enable
+    };
+    return CC2int(x);
+  }
+
+  uint16_t captureControl(uint8_t l_cm)
+  {
+    cc_t x = {
+      cm : l_cm & 0x03,  // capture on none, rising, falling or both edges
+      ccis : 0,  // capture/compare input select
+      clld : 0,  // TBCL1 loads on write to TBCCR1
+      cap : 1,   // compare mode
+      scs : 0,   // non synchronous capture mode
+      ccie : 0,  // capture compare interrupt enable
+    };
+    return CC2int(x);
+  }
+
+  async command cc_t Control.getControl()
+  {
+    return int2CC(TxCCTLx);
+  }
+
+  async command bool Control.isInterruptPending()
+  {
+    return TxCCTLx & CCIFG;
+  }
+
+  async command void Control.clearPendingInterrupt()
+  {
+    CLR_FLAG(TxCCTLx,CCIFG);
+  }
+
+  async command void Control.setControl( cc_t x )
+  {
+    TxCCTLx = CC2int(x);
+  }
+
+  async command void Control.setControlAsCompare()
+  {
+    TxCCTLx = compareControl();
+  }
+
+  async command void Control.setControlAsCapture( uint8_t cm )
+  {
+    TxCCTLx = captureControl( cm );
+  }
+
+  async command void Capture.setEdge(uint8_t cm)
+  {
+    cc_t t = call Control.getControl();
+    t.cm = cm & 0x03;
+    TxCCTLx = CC2int(t);
+  }
+
+  async command void Capture.setSynchronous( bool sync )
+  {
+    if( sync )
+      SET_FLAG( TxCCTLx, SCS );
+    else
+      CLR_FLAG( TxCCTLx, SCS );
+  }
+
+  async command void Control.enableEvents()
+  {
+    SET_FLAG( TxCCTLx, CCIE );
+  }
+
+  async command void Control.disableEvents()
+  {
+    CLR_FLAG( TxCCTLx, CCIE );
+  }
+
+  async command bool Control.areEventsEnabled()
+  {
+    return READ_FLAG( TxCCTLx, CCIE );
+  }
+
+  async command uint16_t Compare.getEvent()
+  {
+    return TxCCRx;
+  }
+
+  async command uint16_t Capture.getEvent()
+  {
+    return TxCCRx;
+  }
+
+  async command void Compare.setEvent( uint16_t x )
+  {
+    TxCCRx = x;
+  }
+
+  async command void Compare.setEventFromPrev( uint16_t x )
+  {
+    TxCCRx += x;
+  }
+
+  async command void Compare.setEventFromNow( uint16_t x )
+  {
+    TxCCRx = call Timer.get() + x;
+  }
+
+  async command bool Capture.isOverflowPending()
+  {
+    return READ_FLAG( TxCCTLx, COV );
+  }
+
+  async command void Capture.clearOverflow()
+  {
+    CLR_FLAG( TxCCTLx, COV );
+  }
+
+  async event void Event.fired()
+  {
+    if( (call Control.getControl()).cap )
+      signal Capture.captured( call Capture.getEvent() );
+    else
+      signal Compare.fired();
+  }
+
+  default async event void Capture.captured( uint16_t n )
+  {
+  }
+
+  default async event void Compare.fired()
+  {
+  }
+
+  async event void Timer.overflow()
+  {
+  }
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerCommonP.nc b/tos/chips/msp430/timer/Msp430TimerCommonP.nc
new file mode 100644
index 00000000..b90c7016
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerCommonP.nc
@@ -0,0 +1,16 @@
+
+module Msp430TimerCommonP @safe()
+{
+  provides interface Msp430TimerEvent as VectorTimerA0;
+  provides interface Msp430TimerEvent as VectorTimerA1;
+  provides interface Msp430TimerEvent as VectorTimerB0;
+  provides interface Msp430TimerEvent as VectorTimerB1;
+}
+implementation
+{
+  TOSH_SIGNAL(TIMERA0_VECTOR) { signal VectorTimerA0.fired(); }
+  TOSH_SIGNAL(TIMERA1_VECTOR) { signal VectorTimerA1.fired(); }
+  TOSH_SIGNAL(TIMERB0_VECTOR) { signal VectorTimerB0.fired(); }
+  TOSH_SIGNAL(TIMERB1_VECTOR) { signal VectorTimerB1.fired(); }
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerControl.nc b/tos/chips/msp430/timer/Msp430TimerControl.nc
new file mode 100644
index 00000000..0d2559da
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerControl.nc
@@ -0,0 +1,62 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @author Joe Polastre
+ */
+
+#include "Msp430Timer.h"
+
+interface Msp430TimerControl
+{
+  async command msp430_compare_control_t getControl();
+  async command bool isInterruptPending();
+  async command void clearPendingInterrupt();
+
+  async command void setControl(msp430_compare_control_t control);
+  async command void setControlAsCompare();
+  
+  /** 
+  * Sets the timer in capture mode.
+  * @param cm configures the capture to occur on none, rising, falling or rising_and_falling edges
+  * Msp430Timer.h has convenience definitions:
+  * MSP430TIMER_CM_NONE, MSP430TIMER_CM_RISING, MSP430TIMER_CM_FALLING, MSP430TIMER_CM_BOTH
+  */ 
+  async command void setControlAsCapture(uint8_t cm);
+
+  async command void enableEvents();
+  async command void disableEvents();
+  async command bool areEventsEnabled();
+
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerEvent.nc b/tos/chips/msp430/timer/Msp430TimerEvent.nc
new file mode 100644
index 00000000..9639c57d
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerEvent.nc
@@ -0,0 +1,41 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+interface Msp430TimerEvent
+{
+  async event void fired();
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerMicroC.nc b/tos/chips/msp430/timer/Msp430TimerMicroC.nc
new file mode 100644
index 00000000..c5ead7ec
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerMicroC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */ 
+ 
+generic configuration Msp430TimerMicroC()
+{
+  provides interface Msp430Timer;
+  provides interface Msp430TimerControl;
+  provides interface Msp430Compare;
+}
+implementation
+{
+  components Msp430TimerMicroMapC as Map;
+
+  enum { ALARM_ID = unique("Msp430TimerMicroMapC") };
+
+  Msp430Timer = Map.Msp430Timer[ ALARM_ID ];
+  Msp430TimerControl = Map.Msp430TimerControl[ ALARM_ID ];
+  Msp430Compare = Map.Msp430Compare[ ALARM_ID ];
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerMicroMapC.nc b/tos/chips/msp430/timer/Msp430TimerMicroMapC.nc
new file mode 100644
index 00000000..980ab83d
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerMicroMapC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */ 
+ 
+configuration Msp430TimerMicroMapC
+{
+  provides interface Msp430Timer[ uint8_t id ];
+  provides interface Msp430TimerControl[ uint8_t id ];
+  provides interface Msp430Compare[ uint8_t id ];
+}
+implementation
+{
+  components Msp430TimerC;
+
+  Msp430Timer[0] = Msp430TimerC.TimerA;
+  Msp430TimerControl[0] = Msp430TimerC.ControlA0;
+  Msp430Compare[0] = Msp430TimerC.CompareA0;
+
+  Msp430Timer[1] = Msp430TimerC.TimerA;
+  Msp430TimerControl[1] = Msp430TimerC.ControlA1;
+  Msp430Compare[1] = Msp430TimerC.CompareA1;
+
+  Msp430Timer[2] = Msp430TimerC.TimerA;
+  Msp430TimerControl[2] = Msp430TimerC.ControlA2;
+  Msp430Compare[2] = Msp430TimerC.CompareA2; 
+  
+}
+
diff --git a/tos/chips/msp430/timer/Msp430TimerP.nc b/tos/chips/msp430/timer/Msp430TimerP.nc
new file mode 100644
index 00000000..63b26e6a
--- /dev/null
+++ b/tos/chips/msp430/timer/Msp430TimerP.nc
@@ -0,0 +1,150 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+#include "msp430regtypes.h"
+
+generic module Msp430TimerP(
+  uint16_t TxIV_addr,
+  uint16_t TxR_addr,
+  uint16_t TxCTL_addr,
+  uint16_t TxIFG,
+  uint16_t TxCLR,
+  uint16_t TxIE,
+  uint16_t TxSSEL0,
+  uint16_t TxSSEL1,
+  bool isClockSourceAsync ) @safe()
+{
+  provides interface Msp430Timer as Timer;
+  provides interface Msp430TimerEvent as Event[uint8_t n];
+  uses interface Msp430TimerEvent as Overflow;
+  uses interface Msp430TimerEvent as VectorTimerX0;
+  uses interface Msp430TimerEvent as VectorTimerX1;
+}
+implementation
+{
+  #define TxIV (*TCAST(volatile TYPE_TAIV* ONE, TxIV_addr))
+  #define TxR (*TCAST(volatile TYPE_TAR* ONE, TxR_addr))
+  #define TxCTL (*TCAST(volatile TYPE_TACTL* ONE, TxCTL_addr))
+
+  async command uint16_t Timer.get()
+  {
+    // CSS 10 Feb 2006: Brano Kusy notes MSP430 User's Guide, Section 12.2.1,
+    // Note says reading a counter may return garbage if its clock source is
+    // async.  The noted work around is to take a majority vote.
+
+    if( isClockSourceAsync ) {
+      atomic {
+        uint16_t t0;
+        uint16_t t1=TxR;
+        do { t0=t1; t1=TxR; } while( t0 != t1 );
+        return t1;
+      }
+    }
+    else {
+      return TxR;
+    }
+  }
+
+  async command bool Timer.isOverflowPending()
+  {
+    return TxCTL & TxIFG;
+  }
+
+  async command void Timer.clearOverflow()
+  {
+    CLR_FLAG(TxCTL,TxIFG);
+  }
+
+  async command void Timer.setMode( int mode )
+  {
+    TxCTL = (TxCTL & ~(MC1|MC0)) | ((mode<<4) & (MC1|MC0));
+  }
+
+  async command int Timer.getMode()
+  {
+    return (TxCTL & (MC1|MC0)) >> 4;
+  }
+
+  async command void Timer.clear()
+  {
+    TxCTL |= TxCLR;
+  }
+
+  async command void Timer.enableEvents()
+  {
+    TxCTL |= TxIE;
+  }
+
+  async command void Timer.disableEvents()
+  {
+    TxCTL &= ~TxIE;
+  }
+
+  async command void Timer.setClockSource( uint16_t clockSource )
+  {
+    TxCTL = (TxCTL & ~(TxSSEL0|TxSSEL1)) | ((clockSource << 8) & (TxSSEL0|TxSSEL1));
+  }
+
+  async command void Timer.setInputDivider( uint16_t inputDivider )
+  {
+    TxCTL = (TxCTL & ~(ID0|ID1)) | ((inputDivider << 6) & (ID0|ID1));
+  }
+
+  async event void VectorTimerX0.fired()
+  {
+    signal Event.fired[0]();
+  }
+
+  async event void VectorTimerX1.fired()
+  {
+    uint8_t n = TxIV;
+    signal Event.fired[ n >> 1 ]();
+  }
+
+  async event void Overflow.fired()
+  {
+    signal Timer.overflow();
+  }
+
+  default async event void Timer.overflow()
+  {
+  }
+
+  default async event void Event.fired[uint8_t n]()
+  {
+  }
+}
+
diff --git a/tos/chips/msp430/usart/HplMsp430I2C.nc b/tos/chips/msp430/usart/HplMsp430I2C.nc
new file mode 100644
index 00000000..ebf91d34
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430I2C.nc
@@ -0,0 +1,102 @@
+
+#include <msp430usart.h>
+
+interface HplMsp430I2C {
+  
+  async command bool isI2C();
+  async command void clearModeI2C();
+  async command void setModeI2C( msp430_i2c_union_config_t* config );
+  
+  // U0CTL
+  async command void setMasterMode();
+  async command void setSlaveMode();
+  
+  async command void enableI2C();
+  async command void disableI2C();
+  
+  // I2CTCTL
+  async command bool getWordMode();
+  async command void setWordMode( bool mode );
+
+  async command bool getRepeatMode();
+  async command void setRepeatMode( bool mode );
+  
+  async command uint8_t getClockSource();
+  async command void setClockSource( uint8_t src );
+  
+  async command bool getTransmitReceiveMode();
+  async command void setTransmitMode();
+  async command void setReceiveMode();
+  
+  async command bool getStartByte();
+  async command void setStartByte();
+  
+  async command bool getStopBit();
+  async command void setStopBit();
+  
+  async command bool getStartBit();
+  async command void setStartBit();
+  
+  // I2CDR
+  async command uint8_t getData();
+  async command void setData( uint8_t data );
+  
+  // I2CNDAT
+  async command uint8_t getTransferByteCount();
+  async command void setTransferByteCount( uint8_t count );
+  
+  // I2CPSC
+  async command uint8_t getClockPrescaler();
+  async command void setClockPrescaler( uint8_t scaler );
+  
+  // I2CSCLH and I2CSCLL
+  async command uint16_t getShiftClock();
+  async command void setShiftClock( uint16_t shift );
+  
+  // I2COA
+  async command uint16_t getOwnAddress();
+  async command void setOwnAddress( uint16_t addr );
+  
+  // I2CSA
+  async command uint16_t getSlaveAddress();
+  async command void setSlaveAddress( uint16_t addr );
+  
+  // I2CIE
+  async command void disableStartDetect();
+  async command void enableStartDetect();
+  
+  async command void disableGeneralCall();
+  async command void enableGeneralCall();
+  
+  async command void disableTransmitReady();
+  async command void enableTransmitReady();
+  
+  async command void disableReceiveReady();
+  async command void enableReceiveReady();
+  
+  async command void disableAccessReady();
+  async command void enableAccessReady();
+  
+  async command void disableOwnAddress();
+  async command void enableOwnAddress();
+  
+  async command void disableNoAck();
+  async command void enableNoAck();
+  
+  async command void disableArbitrationLost();
+  async command void enableArbitrationLost();
+  
+  // I2CIFG
+  async command bool isStartDetectPending();
+  async command bool isGeneralCallPending();
+  async command bool isTransmitReadyPending();
+  async command bool isReceiveReadyPending();
+  async command bool isAccessReadyPending();
+  async command bool isOwnAddressPending();
+  async command bool isNoAckPending();
+  async command bool isArbitrationLostPending();
+  
+  // I2CIV
+  async command uint8_t getIV();
+  
+}
diff --git a/tos/chips/msp430/usart/HplMsp430I2C0C.nc b/tos/chips/msp430/usart/HplMsp430I2C0C.nc
new file mode 100644
index 00000000..71028144
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430I2C0C.nc
@@ -0,0 +1,21 @@
+
+configuration HplMsp430I2C0C {
+  
+  provides interface HplMsp430I2C;
+  
+}
+
+implementation {
+  
+  components HplMsp430I2C0P as HplI2CP;
+  HplMsp430I2C = HplI2CP;
+  
+  components HplMsp430Usart0P as HplUsartP;
+  HplUsartP.HplI2C -> HplI2CP;
+  HplI2CP.HplUsart -> HplUsartP;
+  
+  components HplMsp430GeneralIOC as GIO;
+  HplI2CP.SIMO -> GIO.SIMO0;
+  HplI2CP.UCLK -> GIO.UCLK0;
+  
+}
diff --git a/tos/chips/msp430/usart/HplMsp430I2C0P.nc b/tos/chips/msp430/usart/HplMsp430I2C0P.nc
new file mode 100644
index 00000000..bd0ab402
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430I2C0P.nc
@@ -0,0 +1,245 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-06-24 05:32:31 $
+ */
+
+module HplMsp430I2C0P @safe() {
+  
+  provides interface HplMsp430I2C as HplI2C;
+  
+  uses interface HplMsp430Usart as HplUsart;
+  uses interface HplMsp430GeneralIO as SIMO;
+  uses interface HplMsp430GeneralIO as UCLK;
+  
+}
+
+implementation {
+  
+  MSP430REG_NORACE(U0CTL);
+  MSP430REG_NORACE(I2CTCTL);
+  MSP430REG_NORACE(I2CDR);
+  MSP430REG_NORACE(I2CSA);
+  MSP430REG_NORACE(I2CIE);
+
+  async command bool HplI2C.isI2C() {
+    atomic return ((U0CTL & I2C) && (U0CTL & SYNC) && (U0CTL & I2CEN));
+  }
+  
+  async command void HplI2C.clearModeI2C() {
+    atomic {
+      U0CTL &= ~(I2C | SYNC | I2CEN);
+      call HplUsart.resetUsart(TRUE);
+    }
+  }
+  
+  async command void HplI2C.setModeI2C( msp430_i2c_union_config_t* config ) {
+    
+    call HplUsart.resetUsart(TRUE);
+    call HplUsart.disableUart();
+    call HplUsart.disableSpi();
+    call SIMO.makeInput();
+    call SIMO.selectModuleFunc();
+    call UCLK.makeInput();
+    call UCLK.selectModuleFunc();
+    
+    atomic {
+      
+      U0CTL &= ~(I2C | I2CEN | SYNC);
+      U0CTL = SWRST;
+      U0CTL |= SYNC | I2C;
+      U0CTL &= ~I2CEN;
+      
+      U0CTL = (config->i2cRegisters.uctl | (I2C | SYNC)) & ~I2CEN;
+      I2CTCTL = config->i2cRegisters.i2ctctl;
+            
+      I2CPSC = config->i2cRegisters.i2cpsc;
+      I2CSCLH = config->i2cRegisters.i2csclh;
+      I2CSCLL = config->i2cRegisters.i2cscll;
+      I2COA = config->i2cRegisters.i2coa;
+      U0CTL |= I2CEN;
+      
+    }
+    
+  }
+  
+  // U0CTL
+  async command void HplI2C.setMasterMode() { U0CTL |= MST; }
+  async command void HplI2C.setSlaveMode() { U0CTL &= ~MST; }
+  
+  async command void HplI2C.enableI2C() { U0CTL |= I2CEN; }
+  async command void HplI2C.disableI2C() { U0CTL &= ~I2CEN; }
+  
+  // I2CTCTL
+  async command bool HplI2C.getWordMode() {
+    return ( I2CTCTL & I2CWORD ) != 0;
+  }
+  
+  async command void HplI2C.setWordMode( bool mode ) {
+    I2CTCTL |= ( mode & 0x1 ) << 7;
+  }
+  
+  async command bool HplI2C.getRepeatMode() {
+    return ( I2CTCTL & I2CRM ) != 0;
+  }
+  
+  async command void HplI2C.setRepeatMode( bool mode ) { 
+    I2CTCTL |= ( mode & 0x1 ) << 6;;
+  }
+  
+  async command uint8_t HplI2C.getClockSource() {
+    return ( I2CTCTL >> 4 ) & 0x3;;
+  }
+  
+  async command void HplI2C.setClockSource( uint8_t src ) {
+    atomic I2CTCTL = ( ( src & 0x3 ) << 4 ) | I2CTCTL;
+  }
+  
+  async command bool HplI2C.getTransmitReceiveMode() { 
+    return ( I2CTCTL & I2CTRX ) != 0; 
+  }
+  
+  async command void HplI2C.setTransmitMode() { I2CTCTL |= I2CTRX; }
+  async command void HplI2C.setReceiveMode() { I2CTCTL &= ~I2CTRX; }
+  
+  async command bool HplI2C.getStartByte() { return (I2CTCTL & I2CSTB) != 0; }
+  async command void HplI2C.setStartByte() { I2CTCTL |= I2CSTB; }
+  
+  async command bool HplI2C.getStopBit() { return (I2CTCTL & I2CSTP) != 0; }
+  async command void HplI2C.setStopBit() { I2CTCTL |= I2CSTP; }
+  
+  async command bool HplI2C.getStartBit() { return (I2CTCTL & I2CSTT) != 0; }
+  async command void HplI2C.setStartBit() { I2CTCTL |= I2CSTT; }
+  
+  // I2CDR
+  async command uint8_t HplI2C.getData() { return I2CDR; }
+  async command void HplI2C.setData( uint8_t v ) { I2CDR = v; }
+  
+  // I2CNDAT
+  async command uint8_t HplI2C.getTransferByteCount() { return I2CNDAT; }
+  async command void HplI2C.setTransferByteCount( uint8_t v ) { I2CNDAT = v; }
+  
+  // I2CPSC
+  async command uint8_t HplI2C.getClockPrescaler() { return I2CPSC; }
+  async command void HplI2C.setClockPrescaler( uint8_t v ) { I2CPSC = v; }
+  
+  // I2CSCLH and I2CSCLL
+  async command uint16_t HplI2C.getShiftClock() {
+    uint16_t shift;
+    atomic {
+      shift = I2CSCLH;
+      shift <<= 8;
+      shift |= I2CSCLL;
+    }
+    return shift;
+  }
+  
+  async command void HplI2C.setShiftClock( uint16_t shift ) {
+    atomic {
+      I2CSCLH = shift >> 8;
+      I2CSCLL = shift;
+    }
+  }
+  
+  // I2COA
+  async command uint16_t HplI2C.getOwnAddress() { return I2COA; }
+  async command void HplI2C.setOwnAddress( uint16_t addr ) { I2COA = addr; }
+  
+  // I2CSA
+  async command uint16_t HplI2C.getSlaveAddress() { return I2CSA; }
+  async command void HplI2C.setSlaveAddress( uint16_t addr ) { I2CSA = addr; }
+  
+  // I2CIE
+  async command void HplI2C.disableStartDetect() { I2CIE &= ~STTIE; }
+  async command void HplI2C.enableStartDetect() { I2CIE |= STTIE; }
+  
+  async command void HplI2C.disableGeneralCall() { I2CIE &= ~GCIE; }
+  async command void HplI2C.enableGeneralCall() { I2CIE |= GCIE; }
+  
+  async command void HplI2C.disableTransmitReady() { I2CIE &= ~TXRDYIE; }
+  async command void HplI2C.enableTransmitReady() { I2CIE |= TXRDYIE; }
+  
+  async command void HplI2C.disableReceiveReady() { I2CIE &= ~RXRDYIE; }
+  async command void HplI2C.enableReceiveReady() { I2CIE |= RXRDYIE; }
+  
+  async command void HplI2C.disableAccessReady() { I2CIE &= ~ARDYIE; }
+  async command void HplI2C.enableAccessReady() { I2CIE |= ARDYIE; }
+  
+  async command void HplI2C.disableOwnAddress() { I2CIE &= ~OAIE; }
+  async command void HplI2C.enableOwnAddress() { I2CIE |= OAIE; }
+
+  async command void HplI2C.disableNoAck() { I2CIE &= ~NACKIE; }
+  async command void HplI2C.enableNoAck() { I2CIE |= NACKIE; }
+  
+  async command void HplI2C.disableArbitrationLost() { I2CIE &= ~ALIE; }
+  async command void HplI2C.enableArbitrationLost() { I2CIE |= ALIE; }
+  
+  // I2CIFG
+  async command bool HplI2C.isStartDetectPending() {
+    return ( I2CIFG & STTIFG ) != 0;
+  }
+  
+  async command bool HplI2C.isGeneralCallPending() {
+    return ( I2CIFG & GCIFG ) != 0;
+  }
+  
+  async command bool HplI2C.isTransmitReadyPending() {
+    return ( I2CIFG & TXRDYIFG ) != 0;
+  }
+  
+  async command bool HplI2C.isReceiveReadyPending() {
+    return ( I2CIFG & RXRDYIFG ) != 0;
+  }
+  
+  async command bool HplI2C.isAccessReadyPending() {
+    return ( I2CIFG & ARDYIFG ) != 0;
+  }
+  
+  async command bool HplI2C.isOwnAddressPending() {
+    return ( I2CIFG & OAIFG ) != 0;
+  }
+  
+  async command bool HplI2C.isNoAckPending() {
+    return ( I2CIFG & NACKIFG ) != 0;
+  }
+  
+  async command bool HplI2C.isArbitrationLostPending() {
+    return ( I2CIFG & ALIFG ) != 0;
+  }
+  
+  // I2CIV
+  async command uint8_t HplI2C.getIV() {
+    return I2CIV;
+  }
+  
+}
diff --git a/tos/chips/msp430/usart/HplMsp430I2CInterrupts.nc b/tos/chips/msp430/usart/HplMsp430I2CInterrupts.nc
new file mode 100644
index 00000000..0d01cd95
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430I2CInterrupts.nc
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $
+ */
+
+interface HplMsp430I2CInterrupts {
+  
+  async event void fired();
+  
+}
diff --git a/tos/chips/msp430/usart/HplMsp430Usart.nc b/tos/chips/msp430/usart/HplMsp430Usart.nc
new file mode 100644
index 00000000..60e7c84a
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430Usart.nc
@@ -0,0 +1,233 @@
+/*
+ * Copyright (c) 2004-2005, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Byte-level interface to control a USART.
+ * <p>The USART can be switched to SPI- or UART-mode. The interface follows
+ * the convention of being stateless, thus a higher layer has to maintain
+ * state information. I.e. calling <code>tx</done> will transmit a byte of
+ * data in the mode (SPI or UART) the USART has been set to before.
+ *
+ * @author Vlado Handziski (handzisk@tkn.tu-berlin.de)
+ * @author Jan Hauer (hauer@tkn.tu-berlin.de)
+ * @author Joe Polastre
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $
+ */
+
+#include "msp430usart.h"
+
+interface HplMsp430Usart {
+  
+  /**
+   * Sets the UxCTL Control Register
+   */
+  async command void setUctl(msp430_uctl_t control);
+  
+  /**
+   * Reads the UxCTL Control Register
+   */
+  async command msp430_uctl_t getUctl();
+  
+  /**
+   * Sets the UxTCTL Transmit Control Register
+   */
+  async command void setUtctl(msp430_utctl_t control);
+  
+  /**
+   * Reads the UxTCTL Transmit Control Register
+   */
+  async command msp430_utctl_t getUtctl();
+  
+  /**
+   * Sets the UxRCTL Receive Control Register
+   */
+  async command void setUrctl(msp430_urctl_t control);
+  
+  /**
+   * Reads the UxRCTL Receive Control Register
+   */
+  async command msp430_urctl_t getUrctl();
+
+  /**
+   * Sets the UxBR0 and UxBR1 Baud Rate Control Registers
+   */
+  async command void setUbr(uint16_t ubr);
+  
+  /**
+   * Reads the UxBR0 and UxBR1 Baud Rate Control Registers
+   */
+  async command uint16_t getUbr();
+  
+  /**
+   * Sets the UxMCTL Modulation Control Register
+   */
+  async command void setUmctl(uint8_t umctl);
+  
+  /**
+   * Reads the UxMCTL Modulation Control Register
+   */
+  async command uint8_t getUmctl();
+  
+  async command void resetUsart(bool reset);
+  
+  /**
+   * Returns an enum value corresponding to the current mode of the
+   * USART module.
+   */
+  async command msp430_usartmode_t getMode();
+  
+  /**
+   * Returns TRUE if the USART has Uart TX mode enabled
+   */
+  async command bool isUartTx();
+  
+  /**
+   * Returns TRUE if the USART has Uart RX mode enabled
+   */
+  async command bool isUartRx();
+  
+  /**
+   * Returns TRUE if the USART is set to Uart mode (both RX and TX)
+   */
+  async command bool isUart();
+
+  /**
+   * Enables both the Rx and the Tx Uart modules.
+   */
+  async command void enableUart();
+  
+  /**
+   * Disables both the Rx and the Tx Uart modules.
+   */
+  async command void disableUart();
+  
+  /**
+   * Enables the Uart TX functionality of the USART module.
+   */
+  async command void enableUartTx();
+  
+  /**
+   * Disables the Uart TX module.
+   */
+  async command void disableUartTx();
+
+  /**
+   * Enables the Uart RX functionality of the USART module.
+   */
+  async command void enableUartRx();
+  
+  /**
+   * Disables the Uart RX module.
+   */
+  async command void disableUartRx();
+  
+  /**
+   * Enables the USART when in Spi mode.
+   */
+  async command void enableSpi();
+  
+  /**
+   * Disables the USART when in Spi mode.
+   */
+  async command void disableSpi();
+  
+  /**
+   * Returns TRUE if the USART is set to Spi mode
+   */
+  async command bool isSpi();
+  
+  /**
+   * Switches USART to Spi mode.
+   */
+  async command void setModeSpi(msp430_spi_union_config_t* config);
+  
+  /**
+   * Switches USART to Uart mode (RX and TX enabled)
+   * Interrupts disabled by default.
+   */
+  async command void setModeUart(msp430_uart_union_config_t* config);
+  
+  /* Dis/enabling of UTXIFG / URXIFG */
+  async command void disableRxIntr();
+  async command void disableTxIntr();
+  async command void disableIntr();
+  async command void enableRxIntr();
+  async command void enableTxIntr();
+  async command void enableIntr();
+  
+  /**
+   * TRUE if TX interrupt pending, flag must be cleared explicitly
+   */
+  async command bool isTxIntrPending();
+  
+  /**
+   * TRUE if RX interrupt pending, flag must be cleared explicitly
+   */
+  async command bool isRxIntrPending();
+  
+  /**
+   * Clears RX interrupt pending flag
+   */
+  async command void clrRxIntr();
+  
+  /**
+   * Clears TX interrupt pending flag
+   */
+  async command void clrTxIntr();
+
+  /**
+   * Clears both TX and RX interrupt pending flags
+   */
+  async command void clrIntr();
+
+  /**
+   * SUCCESS if the TX buffer is empty and all of the bits have been
+   * shifted out
+   */
+  async command bool isTxEmpty();
+  
+  /**
+   * Transmit a byte of data. When the transmission is completed,
+   * <code>txDone</done> is generated. Only then a new byte may be
+   * transmitted, otherwise the previous byte will be overwritten.
+   * The mode of transmission (Uart or Spi) depends on the current
+   * state of the USART, which must be managed by a higher layer.
+   *
+   * @return SUCCESS always.
+   */
+  async command void tx(uint8_t data);
+  
+  /**
+   * Get current value from RX-buffer.
+   *
+   * @return SUCCESS always.
+   */
+  async command uint8_t rx();
+
+}
diff --git a/tos/chips/msp430/usart/HplMsp430Usart0C.nc b/tos/chips/msp430/usart/HplMsp430Usart0C.nc
new file mode 100644
index 00000000..b20a8e7d
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430Usart0C.nc
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * An HPL abstraction of USART0 on the MSP430.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Joe Polastre
+ * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+#include "msp430usart.h"
+
+configuration HplMsp430Usart0C {
+  
+  provides interface HplMsp430Usart;
+  provides interface HplMsp430UsartInterrupts;
+  provides interface HplMsp430I2CInterrupts;
+  
+}
+
+implementation {
+  
+  components HplMsp430Usart0P as HplUsartP;
+  HplMsp430Usart = HplUsartP;
+  HplMsp430UsartInterrupts = HplUsartP;
+  HplMsp430I2CInterrupts = HplUsartP;
+  
+  components HplMsp430GeneralIOC as GIO;
+  HplUsartP.SIMO -> GIO.SIMO0;
+  HplUsartP.SOMI -> GIO.SOMI0;
+  HplUsartP.UCLK -> GIO.UCLK0;
+  HplUsartP.URXD -> GIO.URXD0;
+  HplUsartP.UTXD -> GIO.UTXD0;
+  
+}
diff --git a/tos/chips/msp430/usart/HplMsp430Usart0P.nc b/tos/chips/msp430/usart/HplMsp430Usart0P.nc
new file mode 100644
index 00000000..ec8bbb30
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430Usart0P.nc
@@ -0,0 +1,394 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Copyright (c) 2004-2005, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "msp430usart.h"
+/**
+ * Implementation of USART0 lowlevel functionality - stateless.
+ * Setting a mode will by default disable USART-Interrupts.
+ *
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * @author: Jonathan Hui <jhui@archedrock.com>
+ * @author: Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author: Joe Polastre
+ * @author: Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ * @version $Revision: 1.8 $ $Date: 2010-06-04 22:30:21 $
+ */
+
+module HplMsp430Usart0P @safe() {
+  provides interface HplMsp430Usart as Usart;
+  provides interface HplMsp430UsartInterrupts as Interrupts;
+  provides interface HplMsp430I2CInterrupts as I2CInterrupts;
+  
+  uses interface HplMsp430I2C as HplI2C;
+  uses interface HplMsp430GeneralIO as SIMO;
+  uses interface HplMsp430GeneralIO as SOMI;
+  uses interface HplMsp430GeneralIO as UCLK;
+  uses interface HplMsp430GeneralIO as URXD;
+  uses interface HplMsp430GeneralIO as UTXD;
+}
+
+implementation
+{
+  MSP430REG_NORACE(IE1);
+  MSP430REG_NORACE(ME1);
+  MSP430REG_NORACE(IFG1);
+  MSP430REG_NORACE(U0TCTL);
+  MSP430REG_NORACE(U0RCTL);
+  MSP430REG_NORACE(U0TXBUF);
+  
+  TOSH_SIGNAL(UART0RX_VECTOR) {
+    uint8_t temp = U0RXBUF;
+    signal Interrupts.rxDone(temp);
+  }
+  
+  TOSH_SIGNAL(UART0TX_VECTOR) {
+    if ( call HplI2C.isI2C() )
+      signal I2CInterrupts.fired();
+    else
+      signal Interrupts.txDone();
+  }
+  
+  async command void Usart.setUctl(msp430_uctl_t control) {
+    U0CTL=uctl2int(control);
+  }
+
+  async command msp430_uctl_t Usart.getUctl() {
+    return int2uctl(U0CTL);
+  }
+
+  async command void Usart.setUtctl(msp430_utctl_t control) {
+    U0TCTL=utctl2int(control);
+  }
+
+  async command msp430_utctl_t Usart.getUtctl() {
+    return int2utctl(U0TCTL);
+  }
+
+  async command void Usart.setUrctl(msp430_urctl_t control) {
+    U0RCTL=urctl2int(control);
+  }
+
+  async command msp430_urctl_t Usart.getUrctl() {
+    return int2urctl(U0RCTL);
+  }
+
+  async command void Usart.setUbr(uint16_t control) {
+    atomic {
+      U0BR0 = control & 0x00FF;
+      U0BR1 = (control >> 8) & 0x00FF;
+    }
+  }
+
+  async command uint16_t Usart.getUbr() {
+    return (U0BR1 << 8) + U0BR0;
+  }
+
+  async command void Usart.setUmctl(uint8_t control) {
+    U0MCTL=control;
+  }
+
+  async command uint8_t Usart.getUmctl() {
+    return U0MCTL;
+  }
+
+  async command void Usart.resetUsart(bool reset) {
+    if (reset) {
+      U0CTL = SWRST;
+    }
+    else {
+      CLR_FLAG(U0CTL, SWRST);
+    }
+  }
+
+  async command bool Usart.isSpi() {
+    atomic {
+      return (U0CTL & SYNC) && (ME1 & USPIE0);
+    }
+  }
+
+  async command bool Usart.isUart() {
+    atomic {
+      return !(U0CTL & SYNC) && ((ME1 & UTXE0) && (ME1 & URXE0));
+    }
+  }
+
+  async command bool Usart.isUartTx() {
+    atomic {
+      return !(U0CTL & SYNC) && (ME1 & UTXE0);
+    }
+  }
+
+  async command bool Usart.isUartRx() {
+    atomic {
+      return !(U0CTL & SYNC) && (ME1 & URXE0);
+    }
+  }
+
+  async command msp430_usartmode_t Usart.getMode() {
+    if (call Usart.isUart())
+      return USART_UART;
+    else if (call Usart.isUartRx())
+      return USART_UART_RX;
+    else if (call Usart.isUartTx())
+      return USART_UART_TX;
+    else if (call Usart.isSpi())
+      return USART_SPI;
+    else if (call HplI2C.isI2C())
+      return USART_I2C;
+    else
+      return USART_NONE;
+  }
+
+  async command void Usart.enableUart() {
+    atomic{
+      call UTXD.selectModuleFunc();
+      call URXD.selectModuleFunc();
+    }
+    ME1 |= (UTXE0 | URXE0);   // USART0 UART module enable
+  }
+
+  async command void Usart.disableUart() {
+    atomic {
+      ME1 &= ~(UTXE0 | URXE0);   // USART0 UART module enable
+      call UTXD.selectIOFunc();
+      call URXD.selectIOFunc();
+    }
+
+  }
+
+  async command void Usart.enableUartTx() {
+    call UTXD.selectModuleFunc();
+    ME1 |= UTXE0;   // USART0 UART Tx module enable
+  }
+
+  async command void Usart.disableUartTx() {
+    ME1 &= ~UTXE0;   // USART0 UART Tx module enable
+    call UTXD.selectIOFunc();
+
+  }
+
+  async command void Usart.enableUartRx() {
+    call URXD.selectModuleFunc();
+    ME1 |= URXE0;   // USART0 UART Rx module enable
+  }
+
+  async command void Usart.disableUartRx() {
+    ME1 &= ~URXE0;  // USART0 UART Rx module disable
+    call URXD.selectIOFunc();
+
+  }
+
+  async command void Usart.enableSpi() {
+    atomic {
+      call SIMO.selectModuleFunc();
+      call SOMI.selectModuleFunc();
+      call UCLK.selectModuleFunc();
+    }
+    ME1 |= USPIE0;   // USART0 SPI module enable
+  }
+
+  async command void Usart.disableSpi() {
+    atomic {
+      ME1 &= ~USPIE0;   // USART0 SPI module disable
+      call SIMO.selectIOFunc();
+      call SOMI.selectIOFunc();
+      call UCLK.selectIOFunc();
+    }
+  }
+  
+  void configSpi(msp430_spi_union_config_t* config) {
+    // U0CTL = (config->spiRegisters.uctl & ~I2C) | SYNC | SWRST;
+    U0CTL = (config->spiRegisters.uctl) | SYNC | SWRST;  
+    U0TCTL = config->spiRegisters.utctl;
+
+    call Usart.setUbr(config->spiRegisters.ubr);
+    call Usart.setUmctl(0x00);
+  }
+
+  async command void Usart.setModeSpi(msp430_spi_union_config_t* config) {
+    
+    atomic {
+    	call Usart.resetUsart(TRUE);
+    	call HplI2C.clearModeI2C();
+    	call Usart.disableUart();
+      configSpi(config);
+      call Usart.enableSpi();
+      call Usart.resetUsart(FALSE);
+      call Usart.clrIntr();
+      call Usart.disableIntr();
+    }    
+    return;
+  }
+
+  void configUart(msp430_uart_union_config_t* config) {
+
+    U0CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST;
+    U0TCTL = config->uartRegisters.utctl;
+    U0RCTL = config->uartRegisters.urctl;        
+    
+    call Usart.setUbr(config->uartRegisters.ubr);
+    call Usart.setUmctl(config->uartRegisters.umctl);
+  }
+
+  async command void Usart.setModeUart(msp430_uart_union_config_t* config) {
+
+    atomic { 
+      call Usart.resetUsart(TRUE);
+     	call HplI2C.clearModeI2C();
+    	call Usart.disableSpi();
+      configUart(config);
+      if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 1)) {
+      	call Usart.enableUart();
+      } else if ((config->uartConfig.utxe == 0) && (config->uartConfig.urxe == 1)) {
+        call Usart.disableUartTx();
+        call Usart.enableUartRx();
+      } else if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 0)){
+        call Usart.disableUartRx();
+        call Usart.enableUartTx();
+      } else {
+        call Usart.disableUart();
+      }
+      call Usart.resetUsart(FALSE);
+      call Usart.clrIntr();
+      call Usart.disableIntr();
+    }
+    
+    return;
+  }
+
+  async command bool Usart.isTxIntrPending(){
+    if (IFG1 & UTXIFG0){
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isTxEmpty(){
+    if (U0TCTL & TXEPT) {
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isRxIntrPending(){
+    if (IFG1 & URXIFG0){
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command void Usart.clrTxIntr(){
+    IFG1 &= ~UTXIFG0;
+  }
+
+  async command void Usart.clrRxIntr() {
+    IFG1 &= ~URXIFG0;
+  }
+
+  async command void Usart.clrIntr() {
+    IFG1 &= ~(UTXIFG0 | URXIFG0);
+  }
+
+  async command void Usart.disableRxIntr() {
+    IE1 &= ~URXIE0;
+  }
+
+  async command void Usart.disableTxIntr() {
+    IE1 &= ~UTXIE0;
+  }
+
+  async command void Usart.disableIntr() {
+      IE1 &= ~(UTXIE0 | URXIE0);
+  }
+
+  async command void Usart.enableRxIntr() {
+    atomic {
+      IFG1 &= ~URXIFG0;
+      IE1 |= URXIE0;
+    }
+  }
+
+  async command void Usart.enableTxIntr() {
+    atomic {
+      IFG1 &= ~UTXIFG0;
+      IE1 |= UTXIE0;
+    }
+  }
+
+  async command void Usart.enableIntr() {
+    atomic {
+      IFG1 &= ~(UTXIFG0 | URXIFG0);
+      IE1 |= (UTXIE0 | URXIE0);
+    }
+  }
+
+  async command void Usart.tx(uint8_t data) {
+    U0TXBUF = data;
+  }
+
+  async command uint8_t Usart.rx() {
+    return U0RXBUF;
+  }
+
+  default async event void I2CInterrupts.fired() {}
+  default async command bool HplI2C.isI2C() { return FALSE; }
+  default async command void HplI2C.clearModeI2C() {};
+  
+}
diff --git a/tos/chips/msp430/usart/HplMsp430Usart1C.nc b/tos/chips/msp430/usart/HplMsp430Usart1C.nc
new file mode 100644
index 00000000..ffd3db40
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430Usart1C.nc
@@ -0,0 +1,97 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * An HPL abstraction of USART1 on the MSP430.
+ *
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Joe Polastre
+ * @version $Revision: 1.7 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+#include "msp430usart.h"
+
+configuration HplMsp430Usart1C {
+
+  provides interface AsyncStdControl;
+  provides interface HplMsp430Usart;
+  provides interface HplMsp430UsartInterrupts;
+
+}
+
+implementation {
+
+  components HplMsp430Usart1P as HplUsartP;
+  components HplMsp430GeneralIOC as GIO;
+
+  AsyncStdControl = HplUsartP;
+  HplMsp430Usart = HplUsartP;
+  HplMsp430UsartInterrupts = HplUsartP;
+
+  HplUsartP.SIMO -> GIO.SIMO1;
+  HplUsartP.SOMI -> GIO.SOMI1;
+  HplUsartP.UCLK -> GIO.UCLK1;
+  HplUsartP.URXD -> GIO.URXD1;
+  HplUsartP.UTXD -> GIO.UTXD1;
+
+}
diff --git a/tos/chips/msp430/usart/HplMsp430Usart1P.nc b/tos/chips/msp430/usart/HplMsp430Usart1P.nc
new file mode 100644
index 00000000..c27a187d
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430Usart1P.nc
@@ -0,0 +1,392 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Copyright (c) 2004-2005, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "msp430usart.h"
+/**
+ * Implementation of USART1 lowlevel functionality - stateless.
+ * Setting a mode will by default disable USART-Interrupts.
+ *
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * @author: Jonathan Hui <jhui@archedrock.com>
+ * @author: Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author: Joe Polastre
+ * @version $Revision: 1.7 $ $Date: 2010-06-04 22:30:21 $
+ */
+
+module HplMsp430Usart1P {
+  provides interface AsyncStdControl;
+  provides interface HplMsp430Usart as Usart;
+  provides interface HplMsp430UsartInterrupts as Interrupts;
+
+  uses interface HplMsp430GeneralIO as SIMO;
+  uses interface HplMsp430GeneralIO as SOMI;
+  uses interface HplMsp430GeneralIO as UCLK;
+  uses interface HplMsp430GeneralIO as URXD;
+  uses interface HplMsp430GeneralIO as UTXD;
+}
+
+implementation
+{
+  MSP430REG_NORACE(IE2);
+  MSP430REG_NORACE(ME2);
+  MSP430REG_NORACE(IFG2);
+  MSP430REG_NORACE(U1TCTL);
+  MSP430REG_NORACE(U1RCTL);
+  MSP430REG_NORACE(U1TXBUF);
+
+
+
+  TOSH_SIGNAL(UART1RX_VECTOR) {
+    uint8_t temp = U1RXBUF;
+    signal Interrupts.rxDone(temp);
+  }
+
+  TOSH_SIGNAL(UART1TX_VECTOR) {
+    signal Interrupts.txDone();
+  }
+
+  async command error_t AsyncStdControl.start() {
+    return SUCCESS;
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    call Usart.disableSpi();
+    call Usart.disableUart();
+    return SUCCESS;
+  }
+
+
+  async command void Usart.setUctl(msp430_uctl_t control) {
+    U1CTL=uctl2int(control);
+  }
+
+  async command msp430_uctl_t Usart.getUctl() {
+    return int2uctl(U0CTL);
+  }
+
+  async command void Usart.setUtctl(msp430_utctl_t control) {
+    U1TCTL=utctl2int(control);
+  }
+
+  async command msp430_utctl_t Usart.getUtctl() {
+    return int2utctl(U1TCTL);
+  }
+
+  async command void Usart.setUrctl(msp430_urctl_t control) {
+    U1RCTL=urctl2int(control);
+  }
+
+  async command msp430_urctl_t Usart.getUrctl() {
+    return int2urctl(U1RCTL);
+  }
+
+  async command void Usart.setUbr(uint16_t control) {
+    atomic {
+      U1BR0 = control & 0x00FF;
+      U1BR1 = (control >> 8) & 0x00FF;
+    }
+  }
+
+  async command uint16_t Usart.getUbr() {
+    return (U1BR1 << 8) + U1BR0;
+  }
+
+  async command void Usart.setUmctl(uint8_t control) {
+    U1MCTL=control;
+  }
+
+  async command uint8_t Usart.getUmctl() {
+    return U1MCTL;
+  }
+
+  async command void Usart.resetUsart(bool reset) {
+    if (reset)
+      U1CTL = SWRST;
+    else
+      CLR_FLAG(U1CTL, SWRST);
+  }
+
+  async command bool Usart.isSpi() {
+    atomic {
+      return (U1CTL & SYNC) && (ME2 & USPIE1);
+    }
+  }
+
+  async command bool Usart.isUart() {
+    atomic {
+      return !(U1CTL & SYNC) && ((ME2 & UTXE1) && (ME2 & URXE1));
+    }
+  }
+
+  async command bool Usart.isUartTx() {
+    atomic {
+      return !(U1CTL & SYNC) && (ME2 & UTXE1);
+    }
+  }
+
+  async command bool Usart.isUartRx() {
+    atomic {
+      return !(U1CTL & SYNC) && (ME2 & URXE1);
+    }
+  }
+
+  async command msp430_usartmode_t Usart.getMode() {
+    if (call Usart.isUart())
+      return USART_UART;
+    else if (call Usart.isUartRx())
+      return USART_UART_RX;
+    else if (call Usart.isUartTx())
+      return USART_UART_TX;
+    else if (call Usart.isSpi())
+      return USART_SPI;
+    else
+      return USART_NONE;
+  }
+
+  async command void Usart.enableUart() {
+    atomic{
+      call UTXD.selectModuleFunc();
+      call URXD.selectModuleFunc();
+    }
+    ME2 |= (UTXE1 | URXE1);   // USART1 UART module enable
+  }
+
+  async command void Usart.disableUart() {
+    atomic {
+      ME2 &= ~(UTXE1 | URXE1);   // USART1 UART module enable
+      call UTXD.selectIOFunc();
+      call URXD.selectIOFunc();
+    }
+
+  }
+
+  async command void Usart.enableUartTx() {
+    call UTXD.selectModuleFunc();
+    ME2 |= UTXE1;   // USART1 UART Tx module enable
+  }
+
+  async command void Usart.disableUartTx() {
+    ME2 &= ~UTXE1;   // USART1 UART Tx module enable
+    call UTXD.selectIOFunc();
+
+  }
+
+  async command void Usart.enableUartRx() {
+    call URXD.selectModuleFunc();
+    ME2 |= URXE1;   // USART1 UART Rx module enable
+  }
+
+  async command void Usart.disableUartRx() {
+    ME2 &= ~URXE1;  // USART1 UART Rx module disable
+    call URXD.selectIOFunc();
+
+  }
+
+  async command void Usart.enableSpi() {
+    atomic {
+      call SIMO.selectModuleFunc();
+      call SOMI.selectModuleFunc();
+      call UCLK.selectModuleFunc();
+    }
+    ME2 |= USPIE1;   // USART1 SPI module enable
+  }
+
+  async command void Usart.disableSpi() {
+    atomic {
+      ME2 &= ~USPIE1;   // USART1 SPI module disable
+      call SIMO.selectIOFunc();
+      call SOMI.selectIOFunc();
+      call UCLK.selectIOFunc();
+    }
+  }
+
+  void configSpi(msp430_spi_union_config_t* config) {
+    U1CTL = (config->spiRegisters.uctl) | SYNC | SWRST;  
+    U1TCTL = config->spiRegisters.utctl;
+
+    call Usart.setUbr(config->spiRegisters.ubr);
+    call Usart.setUmctl(0x00);
+  }
+
+
+  async command void Usart.setModeSpi(msp430_spi_union_config_t* config) {    
+    atomic {
+      call Usart.resetUsart(TRUE);
+      call Usart.disableUart();
+      configSpi(config);
+      call Usart.enableSpi();
+      call Usart.resetUsart(FALSE);
+      call Usart.clrIntr();
+      call Usart.disableIntr();
+    }    
+    return;
+  }
+
+
+  void configUart(msp430_uart_union_config_t* config) {
+
+    U1CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST;
+    U1TCTL = config->uartRegisters.utctl;
+    U1RCTL = config->uartRegisters.urctl;        
+    
+    call Usart.setUbr(config->uartRegisters.ubr);
+    call Usart.setUmctl(config->uartRegisters.umctl);
+  }
+
+  async command void Usart.setModeUart(msp430_uart_union_config_t* config) {
+
+    atomic { 
+      call Usart.resetUsart(TRUE);
+      call Usart.disableSpi();
+      configUart(config);
+      if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 1)) {
+      	call Usart.enableUart();
+      } else if ((config->uartConfig.utxe == 0) && (config->uartConfig.urxe == 1)) {
+        call Usart.disableUartTx();
+        call Usart.enableUartRx();
+      } else if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 0)){
+        call Usart.disableUartRx();
+        call Usart.enableUartTx();
+      } else {
+        call Usart.disableUart();
+      }
+      call Usart.resetUsart(FALSE);
+      call Usart.clrIntr();
+      call Usart.disableIntr();
+    }
+    
+    return;
+  }
+
+  async command bool Usart.isTxIntrPending(){
+    if (IFG2 & UTXIFG1){
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isTxEmpty(){
+    if (U1TCTL & TXEPT) {
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isRxIntrPending(){
+    if (IFG2 & URXIFG1){
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command void Usart.clrTxIntr(){
+    IFG2 &= ~UTXIFG1;
+  }
+
+  async command void Usart.clrRxIntr() {
+    IFG2 &= ~URXIFG1;
+  }
+
+  async command void Usart.clrIntr() {
+    IFG2 &= ~(UTXIFG1 | URXIFG1);
+  }
+
+  async command void Usart.disableRxIntr() {
+    IE2 &= ~URXIE1;
+  }
+
+  async command void Usart.disableTxIntr() {
+    IE2 &= ~UTXIE1;
+  }
+
+  async command void Usart.disableIntr() {
+      IE2 &= ~(UTXIE1 | URXIE1);
+  }
+
+  async command void Usart.enableRxIntr() {
+    atomic {
+      IFG2 &= ~URXIFG1;
+      IE2 |= URXIE1;
+    }
+  }
+
+  async command void Usart.enableTxIntr() {
+    atomic {
+      IFG2 &= ~UTXIFG1;
+      IE2 |= UTXIE1;
+    }
+  }
+
+  async command void Usart.enableIntr() {
+    atomic {
+      IFG2 &= ~(UTXIFG1 | URXIFG1);
+      IE2 |= (UTXIE1 | URXIE1);
+    }
+  }
+
+  async command void Usart.tx(uint8_t data) {
+    U1TXBUF = data;
+  }
+
+  async command uint8_t Usart.rx() {
+    return U1RXBUF;
+  }
+
+}
diff --git a/tos/chips/msp430/usart/HplMsp430UsartInterrupts.nc b/tos/chips/msp430/usart/HplMsp430UsartInterrupts.nc
new file mode 100644
index 00000000..def9bc8b
--- /dev/null
+++ b/tos/chips/msp430/usart/HplMsp430UsartInterrupts.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2004-2005, Technische Universität Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Byte-level interface to control a USART. 
+ * <p>The USART can be switched to SPI- or UART-mode. The interface follows
+ * the convention of being stateless, thus a higher layer has to maintain
+ * state information.
+ *
+ * @author Jan Hauer (hauer@tkn.tu-berlin.de)
+ * @author Joe Polastre
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $
+ */
+ 
+#include "msp430usart.h"
+
+interface HplMsp430UsartInterrupts {
+
+  /**
+   * A byte of data is about to be transmitted, ie. the TXBuffer is
+   * empty and ready to accept next byte.
+   */
+  async event void txDone();
+
+  /**
+   * A byte of data has been received.
+   */
+  async event void rxDone(uint8_t data);
+
+}
+
diff --git a/tos/chips/msp430/usart/Msp430I2C0P.nc b/tos/chips/msp430/usart/Msp430I2C0P.nc
new file mode 100644
index 00000000..542fb201
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430I2C0P.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $
+ */
+
+configuration Msp430I2C0P {
+  
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[uint8_t id ];
+  provides interface I2CPacket<TI2CBasicAddr> as I2CBasicAddr;
+  
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430I2CConfigure[ uint8_t id ];
+  uses interface HplMsp430I2CInterrupts as I2CInterrupts;
+  
+}
+
+implementation {
+  
+  components Msp430I2CP as I2CP;
+  Resource = I2CP.Resource;
+  ResourceConfigure = I2CP.ResourceConfigure;
+  Msp430I2CConfigure = I2CP.Msp430I2CConfigure;
+  I2CBasicAddr = I2CP.I2CBasicAddr;
+  UsartResource = I2CP.UsartResource;
+  I2CInterrupts = I2CP.I2CInterrupts;
+  
+  components HplMsp430I2C0C as HplI2CC;
+  I2CP.HplI2C -> HplI2CC;
+  
+  components LedsC as Leds;
+  I2CP.Leds -> Leds;
+  
+}
diff --git a/tos/chips/msp430/usart/Msp430I2CC.nc b/tos/chips/msp430/usart/Msp430I2CC.nc
new file mode 100644
index 00000000..1c38f016
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430I2CC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $
+ */
+
+#include <I2C.h>
+#include "msp430usart.h"
+
+generic configuration Msp430I2CC() {
+  
+  provides interface Resource;
+  provides interface ResourceRequested;
+  provides interface I2CPacket<TI2CBasicAddr> as I2CBasicAddr;
+  
+  uses interface Msp430I2CConfigure;
+  
+}
+
+implementation {
+  
+  enum {
+    CLIENT_ID = unique( MSP430_I2CO_BUS ),
+  };
+  
+  components Msp430I2C0P as I2CP;
+  Resource = I2CP.Resource[ CLIENT_ID ];
+  I2CBasicAddr = I2CP.I2CBasicAddr;
+  Msp430I2CConfigure = I2CP.Msp430I2CConfigure[ CLIENT_ID ];
+  
+  components new Msp430Usart0C() as UsartC;
+  ResourceRequested = UsartC;
+  I2CP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure;
+  I2CP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
+  I2CP.I2CInterrupts -> UsartC.HplMsp430I2CInterrupts;
+  
+}
diff --git a/tos/chips/msp430/usart/Msp430I2CConfigure.nc b/tos/chips/msp430/usart/Msp430I2CConfigure.nc
new file mode 100644
index 00000000..7750dadf
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430I2CConfigure.nc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface used by Msp430I2C clients to reconfigure the I2C before use
+ * @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $
+ */
+
+#include "msp430usart.h"
+
+interface Msp430I2CConfigure {
+  async command msp430_i2c_union_config_t* getConfig();
+}
diff --git a/tos/chips/msp430/usart/Msp430I2CP.nc b/tos/chips/msp430/usart/Msp430I2CP.nc
new file mode 100644
index 00000000..bac73d09
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430I2CP.nc
@@ -0,0 +1,226 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $
+ */
+
+#include <I2C.h>
+
+module Msp430I2CP {
+  
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[ uint8_t id ];
+  provides interface I2CPacket<TI2CBasicAddr> as I2CBasicAddr;
+  
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430I2CConfigure[ uint8_t id ];
+  uses interface HplMsp430I2C as HplI2C;
+  uses interface HplMsp430I2CInterrupts as I2CInterrupts;
+  uses interface Leds;
+  
+}
+
+implementation {
+  
+  MSP430REG_NORACE(I2CIE);
+  
+  enum {
+    TIMEOUT = 64,
+  };
+  
+  norace uint8_t* m_buf;
+  norace uint8_t m_len;
+  norace uint8_t m_pos;
+  norace i2c_flags_t m_flags;
+  
+  void nextRead();
+  void nextWrite();
+  void signalDone( error_t error );
+  
+  async command error_t Resource.immediateRequest[ uint8_t id ]() {
+    return call UsartResource.immediateRequest[ id ]();
+  }
+  
+  async command error_t Resource.request[ uint8_t id ]() {
+    return call UsartResource.request[ id ]();
+  }
+  
+  async command uint8_t Resource.isOwner[ uint8_t id ]() {
+    return call UsartResource.isOwner[ id ]();
+  }
+  
+  async command error_t Resource.release[ uint8_t id ]() {
+    return call UsartResource.release[ id ]();
+  }
+  
+  async command void ResourceConfigure.configure[ uint8_t id ]() {
+    call HplI2C.setModeI2C(call Msp430I2CConfigure.getConfig[id]());
+  }
+  
+  async command void ResourceConfigure.unconfigure[ uint8_t id ]() {
+    call HplI2C.clearModeI2C();
+  }
+  
+  event void UsartResource.granted[ uint8_t id ]() {
+    signal Resource.granted[ id ]();
+  }
+  
+  default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.release[ uint8_t id ]() {return FAIL;}
+  default event void Resource.granted[ uint8_t id ]() {}
+  default async command msp430_i2c_union_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() {
+    return &msp430_i2c_default_config;
+  }
+  
+  async command error_t I2CBasicAddr.read( i2c_flags_t flags,
+					   uint16_t addr, uint8_t len, 
+					   uint8_t* buf ) {
+    
+    m_buf = buf;
+    m_len = len;
+    m_flags = flags;
+    m_pos = 0;
+
+    call HplI2C.setMasterMode();
+    call HplI2C.setReceiveMode();
+    
+    call HplI2C.setSlaveAddress( addr );
+    call HplI2C.enableReceiveReady();
+    call HplI2C.enableAccessReady();
+    call HplI2C.enableNoAck();
+    if ( flags & I2C_START )
+      call HplI2C.setStartBit();
+    else
+      nextRead();
+    
+    return SUCCESS;
+    
+  }
+  
+  async command error_t I2CBasicAddr.write( i2c_flags_t flags,
+					    uint16_t addr, uint8_t len,
+					    uint8_t* buf ) {
+    
+    m_buf = buf;
+    m_len = len;
+    m_flags = flags;
+    m_pos = 0;
+    
+    call HplI2C.setMasterMode();
+    call HplI2C.setTransmitMode();
+    
+    call HplI2C.setSlaveAddress( addr );
+    call HplI2C.enableTransmitReady();
+    call HplI2C.enableAccessReady();
+    call HplI2C.enableNoAck();
+    
+    if ( flags & I2C_START )
+      call HplI2C.setStartBit();
+    else
+      nextWrite();
+    
+    return SUCCESS;
+    
+  }
+  
+  async event void I2CInterrupts.fired() {
+    
+    int i = 0;
+    
+    switch( call HplI2C.getIV() ) {
+      
+    case 0x04:
+      if ( I2CDCTL & I2CBB )
+	call HplI2C.setStopBit();
+      while( I2CDCTL & I2CBUSY );
+      signalDone( FAIL );
+      break;
+      
+    case 0x08:
+      while( (I2CDCTL & I2CBUSY) ) {
+	if ( i++ >= TIMEOUT ) {
+	  signalDone( FAIL );
+	  return;
+	}
+      }
+      signalDone( SUCCESS );
+      break;
+      
+    case 0x0A:
+      nextRead();
+      break;
+      
+    case 0x0C:
+      nextWrite();
+      break;
+      
+    default:
+      break;
+
+    }
+    
+  }
+  
+  void nextRead() {
+    m_buf[ m_pos++ ] = call HplI2C.getData();
+    if ( m_pos == m_len ) {
+      if ( m_flags & I2C_STOP )
+	call HplI2C.setStopBit();
+      else
+	signalDone( SUCCESS );
+    }
+  }
+  
+  void nextWrite() {
+    if ( ( m_pos == m_len - 1 ) && ( m_flags & I2C_STOP ) ) {
+      call HplI2C.setStopBit();
+    }
+    else if ( m_pos == m_len ) {
+      signalDone( SUCCESS );
+      return;
+    }
+    call HplI2C.setData( m_buf[ m_pos++ ] );
+  }
+  
+  void signalDone( error_t error ) {
+    I2CIE = 0;
+    if ( call HplI2C.getTransmitReceiveMode() )
+      signal I2CBasicAddr.writeDone( error, I2CSA, m_len, m_buf );
+    else
+      signal I2CBasicAddr.readDone( error, I2CSA, m_len, m_buf );
+  }
+  
+  default async command error_t UsartResource.isOwner[ uint8_t id ]() { return FAIL; }
+
+}
diff --git a/tos/chips/msp430/usart/Msp430Spi0C.nc b/tos/chips/msp430/usart/Msp430Spi0C.nc
new file mode 100644
index 00000000..39b7b012
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430Spi0C.nc
@@ -0,0 +1,119 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */ 
+
+/**
+ * An implementation of the SPI on USART0 for the MSP430. The current
+ * implementation defaults not using the DMA and performing the SPI
+ * transfers in software. To utilize the DMA, use Msp430SpiDma0P in
+ * place of Msp430SpiNoDma0P.
+ *
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Mark Hays
+ * @version $Revision: 1.8 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+#include "msp430usart.h"
+
+generic configuration Msp430Spi0C() {
+
+  provides interface Resource;
+  provides interface ResourceRequested;
+  provides interface SpiByte;
+#ifndef ENABLE_SPI0_DMA
+  provides interface FastSpiByte;
+#endif  
+  provides interface SpiPacket;
+
+  uses interface Msp430SpiConfigure;
+}
+
+implementation {
+
+  enum {
+    CLIENT_ID = unique( MSP430_SPIO_BUS ),
+  };
+
+#ifdef ENABLE_SPI0_DMA
+#warning "Enabling SPI DMA on USART0"
+  components Msp430SpiDma0P as SpiP;
+#else
+  components Msp430SpiNoDma0P as SpiP;
+#endif
+
+  Resource = SpiP.Resource[ CLIENT_ID ];
+  SpiByte = SpiP.SpiByte;
+#ifndef ENABLE_SPI0_DMA
+  FastSpiByte = SpiP.FastSpiByte;
+#endif  
+  SpiPacket = SpiP.SpiPacket[ CLIENT_ID ];
+  Msp430SpiConfigure = SpiP.Msp430SpiConfigure[ CLIENT_ID ];
+
+  components new Msp430Usart0C() as UsartC;
+  ResourceRequested = UsartC;
+  SpiP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure;
+  SpiP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
+  SpiP.UsartInterrupts -> UsartC.HplMsp430UsartInterrupts;
+
+}
diff --git a/tos/chips/msp430/usart/Msp430Spi1C.nc b/tos/chips/msp430/usart/Msp430Spi1C.nc
new file mode 100644
index 00000000..4be64a98
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430Spi1C.nc
@@ -0,0 +1,119 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */ 
+
+/**
+ * An implementation of the SPI on USART0 for the MSP430. The current
+ * implementation defaults not using the DMA and performing the SPI
+ * transfers in software. To utilize the DMA, use Msp430SpiDma0P in
+ * place of Msp430SpiNoDma0P.
+ *
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Mark Hays
+ * @version $Revision: 1.9 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+#include "msp430usart.h"
+
+generic configuration Msp430Spi1C() {
+
+  provides interface Resource;
+  provides interface ResourceRequested;
+  provides interface SpiByte;
+#ifndef ENABLE_SPI1_DMA
+  provides interface FastSpiByte;
+#endif  
+  provides interface SpiPacket;
+
+  uses interface Msp430SpiConfigure;
+}
+
+implementation {
+
+  enum {
+    CLIENT_ID = unique( MSP430_SPI1_BUS ),
+  };
+
+#ifdef ENABLE_SPI1_DMA
+#warning "Enabling SPI DMA on USART1"
+  components Msp430SpiDma1P as SpiP;
+#else
+  components Msp430SpiNoDma1P as SpiP;
+#endif
+
+  Resource = SpiP.Resource[ CLIENT_ID ];
+  SpiByte = SpiP.SpiByte;
+#ifndef ENABLE_SPI1_DMA
+  FastSpiByte = SpiP.FastSpiByte;
+#endif  
+  SpiPacket = SpiP.SpiPacket[ CLIENT_ID ];
+  Msp430SpiConfigure = SpiP.Msp430SpiConfigure[ CLIENT_ID ];
+
+  components new Msp430Usart1C() as UsartC;
+  ResourceRequested = UsartC;
+  SpiP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure;
+  SpiP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
+  SpiP.UsartInterrupts -> UsartC.HplMsp430UsartInterrupts;
+
+}
diff --git a/tos/chips/msp430/usart/Msp430SpiConfigure.nc b/tos/chips/msp430/usart/Msp430SpiConfigure.nc
new file mode 100644
index 00000000..e0137271
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430SpiConfigure.nc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface used by Msp430Spi clients to reconfigure the SPI before use
+ * @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $
+ */
+
+#include "msp430usart.h"
+
+interface Msp430SpiConfigure {
+  async command msp430_spi_union_config_t* getConfig();
+}
diff --git a/tos/chips/msp430/usart/Msp430SpiDma0P.nc b/tos/chips/msp430/usart/Msp430SpiDma0P.nc
new file mode 100644
index 00000000..9996e653
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430SpiDma0P.nc
@@ -0,0 +1,80 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Mark Hays
+ * @version $Revision: 1.5 $ $Date: 2007-11-08 21:34:42 $
+ */
+
+configuration Msp430SpiDma0P {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[ uint8_t id ];
+  provides interface SpiByte;
+  provides interface SpiPacket[ uint8_t id ];
+
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430SpiConfigure[ uint8_t id ];
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
+
+}
+
+implementation {
+
+#include "Msp430Dma.h"
+
+  components new Msp430SpiDmaP(IFG1_,
+			       U0TXBUF_,
+			       UTXIFG0,
+			       (uint16_t) DMA_TRIGGER_UTXIFG0,
+			       U0RXBUF_,
+			       URXIFG0,
+			       (uint16_t) DMA_TRIGGER_URXIFG0) as SpiP;
+  Resource = SpiP.Resource;
+  ResourceConfigure = SpiP.ResourceConfigure;
+  Msp430SpiConfigure = SpiP.Msp430SpiConfigure;
+  SpiByte = SpiP.SpiByte;
+  SpiPacket = SpiP.SpiPacket;
+  UsartResource = SpiP.UsartResource;
+  UsartInterrupts = SpiP.UsartInterrupts;
+
+  components HplMsp430Usart0C as UsartC;
+  SpiP.Usart -> UsartC;
+
+  components Msp430DmaC as DmaC;
+  SpiP.DmaChannel1 -> DmaC.Channel1;
+  SpiP.DmaChannel2 -> DmaC.Channel2;
+
+  components LedsC as Leds;
+  SpiP.Leds -> Leds;
+
+}
diff --git a/tos/chips/msp430/usart/Msp430SpiDma1P.nc b/tos/chips/msp430/usart/Msp430SpiDma1P.nc
new file mode 100644
index 00000000..a669dcc6
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430SpiDma1P.nc
@@ -0,0 +1,80 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Mark Hays
+ * @version $Revision: 1.5 $ $Date: 2007-11-08 21:34:42 $
+ */
+
+configuration Msp430SpiDma1P {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[uint8_t id];
+  provides interface SpiByte;
+  provides interface SpiPacket[ uint8_t id ];
+
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430SpiConfigure[ uint8_t id ];
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
+
+}
+
+implementation {
+
+#include "Msp430Dma.h"
+
+  components new Msp430SpiDmaP(IFG2_,
+			       U1TXBUF_,
+			       UTXIFG1,
+			       (uint16_t) DMA_TRIGGER_UTXIFG1,
+			       U1RXBUF_,
+			       URXIFG1,
+			       (uint16_t) DMA_TRIGGER_URXIFG1) as SpiP;
+  Resource = SpiP.Resource;
+  ResourceConfigure = SpiP.ResourceConfigure;
+  Msp430SpiConfigure = SpiP.Msp430SpiConfigure;
+  SpiByte = SpiP.SpiByte;
+  SpiPacket = SpiP.SpiPacket;
+  UsartResource = SpiP.UsartResource;
+  UsartInterrupts = SpiP.UsartInterrupts;
+
+  components HplMsp430Usart1C as UsartC;
+  SpiP.Usart -> UsartC;
+
+  components Msp430DmaC as DmaC;
+  SpiP.DmaChannel1 -> DmaC.Channel1;
+  SpiP.DmaChannel2 -> DmaC.Channel2;
+
+  components LedsC as Leds;
+  SpiP.Leds -> Leds;
+
+}
diff --git a/tos/chips/msp430/usart/Msp430SpiDmaP.nc b/tos/chips/msp430/usart/Msp430SpiDmaP.nc
new file mode 100644
index 00000000..5831c9c1
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430SpiDmaP.nc
@@ -0,0 +1,199 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Mark Hays
+ * @author Roman Lim
+ * @version $Revision: 1.6 $ $Date: 2008-02-28 17:28:12 $
+ */
+
+
+generic module Msp430SpiDmaP( uint16_t IFG_addr,
+			      uint16_t TXBUF_addr,
+			      uint8_t  TXIFG,
+			      uint16_t TXTRIG,
+			      uint16_t RXBUF_addr,
+			      uint8_t  RXIFG,
+			      uint16_t RXTRIG ) {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[ uint8_t id ];
+  provides interface SpiByte;
+  provides interface SpiPacket[ uint8_t id ];
+
+  uses interface Msp430DmaChannel as DmaChannel1;
+  uses interface Msp430DmaChannel as DmaChannel2;
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430SpiConfigure[uint8_t id ];
+  uses interface HplMsp430Usart as Usart;
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
+  uses interface Leds;
+
+}
+
+implementation {
+
+#define IFG (*(volatile uint8_t*)IFG_addr)
+
+  uint8_t* m_tx_buf;
+  uint8_t* m_rx_buf;
+  uint16_t m_len;
+  uint8_t m_client;
+  uint8_t m_dump;
+
+  void signalDone( error_t error );
+  task void signalDone_task();
+
+  async command error_t Resource.immediateRequest[ uint8_t id ]() {
+    return call UsartResource.immediateRequest[ id ]();
+  }
+
+  async command error_t Resource.request[ uint8_t id ]() {
+    return call UsartResource.request[ id ]();
+  }
+
+  async command error_t Resource.release[ uint8_t id ]() {
+    return call UsartResource.release[ id ]();
+  }
+
+  async command void ResourceConfigure.configure[ uint8_t id ]() {
+    call Usart.setModeSpi(call Msp430SpiConfigure.getConfig[id]());
+  }
+
+  async command void ResourceConfigure.unconfigure[ uint8_t id ]() {
+    call Usart.resetUsart(TRUE);
+    call Usart.disableSpi();
+    call Usart.resetUsart(FALSE);
+  }
+
+  event void UsartResource.granted[ uint8_t id ]() {
+    signal Resource.granted[ id ]();
+  }
+
+  async command uint8_t Resource.isOwner[ uint8_t id ]() {
+    return call UsartResource.isOwner[ id ]();
+  }
+
+  default async command error_t UsartResource.isOwner[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; }
+  default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() {
+    return &msp430_spi_default_config;
+  }
+
+  default event void Resource.granted[ uint8_t id ]() {}
+
+  async command uint8_t SpiByte.write( uint8_t tx ) {
+
+    call Usart.tx( tx );
+    while( !call Usart.isRxIntrPending() );
+    call Usart.clrRxIntr();
+    return call Usart.rx();
+
+  }
+
+  async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf,
+						      uint8_t* rx_buf,
+						      uint16_t len ) {
+
+    atomic {
+      m_client = id;
+      m_tx_buf = tx_buf;
+      m_rx_buf = rx_buf;
+      m_len = len;
+    }
+
+    if ( len ) {
+      // clear the interrupt flags
+      IFG &= ~( TXIFG | RXIFG );
+
+      // set up the RX xfer
+      call DmaChannel1.setupTransfer(DMA_SINGLE_TRANSFER,
+				     RXTRIG,
+				     DMA_EDGE_SENSITIVE,
+				     (void *) RXBUF_addr,
+				     rx_buf ? rx_buf : &m_dump,
+				     len,
+				     DMA_BYTE,
+				     DMA_BYTE,
+				     DMA_ADDRESS_UNCHANGED,
+				     rx_buf ?
+				       DMA_ADDRESS_INCREMENTED :
+				       DMA_ADDRESS_UNCHANGED);
+      // this doesn't start a transfer; it simply enables the channel
+      call DmaChannel1.startTransfer();
+
+      // set up the TX xfer
+      call DmaChannel2.setupTransfer(DMA_SINGLE_TRANSFER,
+				     TXTRIG,
+				     DMA_EDGE_SENSITIVE,
+				     tx_buf,
+				     (void *) TXBUF_addr,
+				     len,
+				     DMA_BYTE,
+				     DMA_BYTE,
+				     DMA_ADDRESS_INCREMENTED,
+				     DMA_ADDRESS_UNCHANGED);
+      // this doesn't start a transfer; it simply enables the channel
+      call DmaChannel2.startTransfer();
+
+      // pong the tx flag to get things rolling
+      IFG |= TXIFG;
+    } else {
+      post signalDone_task();
+    }
+
+    return SUCCESS;
+
+  }
+
+  task void signalDone_task() {
+    atomic signalDone( SUCCESS );
+  }
+
+  async event void DmaChannel1.transferDone( error_t error ) {
+    signalDone( error );
+  }
+
+  async event void DmaChannel2.transferDone( error_t error ) {}
+
+  void signalDone( error_t error ) {
+    signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len, error );
+  }
+
+  async event void UsartInterrupts.txDone() {}
+  async event void UsartInterrupts.rxDone( uint8_t data ) {}
+
+  default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {}
+
+}
diff --git a/tos/chips/msp430/usart/Msp430SpiNoDma0P.nc b/tos/chips/msp430/usart/Msp430SpiNoDma0P.nc
new file mode 100644
index 00000000..51391786
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430SpiNoDma0P.nc
@@ -0,0 +1,103 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */ 
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+configuration Msp430SpiNoDma0P {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[uint8_t id ];
+  provides interface SpiByte;
+  provides interface FastSpiByte;
+  provides interface SpiPacket[ uint8_t id ];
+
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430SpiConfigure[ uint8_t id ];
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
+
+}
+
+implementation {
+
+  components new Msp430SpiNoDmaP() as SpiP;
+  Resource = SpiP.Resource;
+  ResourceConfigure = SpiP.ResourceConfigure;
+  Msp430SpiConfigure = SpiP.Msp430SpiConfigure;
+  SpiByte = SpiP.SpiByte;
+  FastSpiByte = SpiP.FastSpiByte;
+  SpiPacket = SpiP.SpiPacket;
+  UsartResource = SpiP.UsartResource;
+  UsartInterrupts = SpiP.UsartInterrupts;
+
+  components HplMsp430Usart0C as UsartC;
+  SpiP.Usart -> UsartC;
+
+  components LedsC as Leds;
+  SpiP.Leds -> Leds;
+
+}
diff --git a/tos/chips/msp430/usart/Msp430SpiNoDma1P.nc b/tos/chips/msp430/usart/Msp430SpiNoDma1P.nc
new file mode 100644
index 00000000..39d080c6
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430SpiNoDma1P.nc
@@ -0,0 +1,103 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */ 
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+configuration Msp430SpiNoDma1P {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[uint8_t id ];
+  provides interface SpiByte;
+  provides interface FastSpiByte;
+  provides interface SpiPacket[ uint8_t id ];
+
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430SpiConfigure[ uint8_t id ];
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
+
+}
+
+implementation {
+
+  components new Msp430SpiNoDmaP() as SpiP;
+  Resource = SpiP.Resource;
+  ResourceConfigure = SpiP.ResourceConfigure;
+  Msp430SpiConfigure = SpiP.Msp430SpiConfigure;
+  SpiByte = SpiP.SpiByte;
+  FastSpiByte = SpiP.FastSpiByte;
+  SpiPacket = SpiP.SpiPacket;
+  UsartResource = SpiP.UsartResource;
+  UsartInterrupts = SpiP.UsartInterrupts;
+
+  components HplMsp430Usart1C as UsartC;
+  SpiP.Usart -> UsartC;
+
+  components LedsC as Leds;
+  SpiP.Leds -> Leds;
+
+}
diff --git a/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc b/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc
new file mode 100644
index 00000000..87b950e9
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430SpiNoDmaP.nc
@@ -0,0 +1,254 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */ 
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de> (bugfix in continueOp())
+ * @version $Revision: 1.8 $ $Date: 2010-06-29 22:07:45 $
+ */
+
+
+generic module Msp430SpiNoDmaP() {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[ uint8_t id ];
+  provides interface SpiByte;
+  provides interface FastSpiByte;
+  provides interface SpiPacket[ uint8_t id ];
+
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430SpiConfigure[ uint8_t id ];
+  uses interface HplMsp430Usart as Usart;
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
+  uses interface Leds;
+
+}
+
+implementation {
+
+  enum {
+    SPI_ATOMIC_SIZE = 2,
+  };
+
+  norace uint16_t m_len;
+  norace uint8_t* COUNT_NOK(m_len) m_tx_buf;
+  norace uint8_t* COUNT_NOK(m_len) m_rx_buf;
+  norace uint16_t m_pos;
+  norace uint8_t m_client;
+
+  void signalDone();
+  task void signalDone_task();
+
+  async command error_t Resource.immediateRequest[ uint8_t id ]() {
+    return call UsartResource.immediateRequest[ id ]();
+  }
+
+  async command error_t Resource.request[ uint8_t id ]() {
+    return call UsartResource.request[ id ]();
+  }
+
+  async command uint8_t Resource.isOwner[ uint8_t id ]() {
+    return call UsartResource.isOwner[ id ]();
+  }
+
+  async command error_t Resource.release[ uint8_t id ]() {
+    return call UsartResource.release[ id ]();
+  }
+
+  async command void ResourceConfigure.configure[ uint8_t id ]() {
+    call Usart.setModeSpi(call Msp430SpiConfigure.getConfig[id]());
+  }
+
+  async command void ResourceConfigure.unconfigure[ uint8_t id ]() {
+    call Usart.resetUsart(TRUE);
+    call Usart.disableSpi();
+    call Usart.resetUsart(FALSE);
+  }
+
+  event void UsartResource.granted[ uint8_t id ]() {
+    signal Resource.granted[ id ]();
+  }
+
+  async command uint8_t SpiByte.write( uint8_t tx ) {
+    uint8_t byte;
+    // we are in spi mode which is configured to have turned off interrupts
+    //call Usart.disableRxIntr();
+    call Usart.tx( tx );
+    while( !call Usart.isRxIntrPending() );
+    call Usart.clrRxIntr();
+    byte = call Usart.rx();
+    //call Usart.enableRxIntr();
+    return byte;
+  }
+
+  inline async command void FastSpiByte.splitWrite(uint8_t data) {
+    call Usart.tx( data );
+  }
+
+  inline async command uint8_t FastSpiByte.splitRead() {
+    while( !call Usart.isRxIntrPending() );
+    return call Usart.rx();
+  }
+
+  inline async command uint8_t FastSpiByte.splitReadWrite(uint8_t data) {
+    uint8_t b;
+
+    while( !call Usart.isTxIntrPending() );
+    atomic {
+      call Usart.tx( data );
+      while( !call Usart.isRxIntrPending() );
+      b = call Usart.rx();
+    }
+
+    return b;
+  }
+
+  inline async command uint8_t FastSpiByte.write(uint8_t data) {
+    call FastSpiByte.splitWrite( data );
+    return call FastSpiByte.splitRead();
+  }
+
+  default async command error_t UsartResource.isOwner[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; }
+  default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() {
+    return &msp430_spi_default_config;
+  }
+
+  default event void Resource.granted[ uint8_t id ]() {}
+
+  void continueOp() {
+
+   uint8_t end;
+   uint8_t tmp;
+
+   atomic {
+     call Usart.tx( m_tx_buf ? m_tx_buf[ m_pos ] : 0 );
+
+     end = m_pos + SPI_ATOMIC_SIZE;
+     if ( end > m_len )
+       end = m_len;
+
+     while ( ++m_pos < end ) {
+       while( !call Usart.isRxIntrPending() );
+       tmp = call Usart.rx();
+       if ( m_rx_buf )
+         m_rx_buf[ m_pos - 1 ] = tmp;
+       call Usart.tx( m_tx_buf ? m_tx_buf[ m_pos ] : 0 );
+     }
+   }
+
+  }
+
+  async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf,
+                                                      uint8_t* rx_buf,
+                                                      uint16_t len ) {
+
+    m_client = id;
+    m_tx_buf = tx_buf;
+    m_rx_buf = rx_buf;
+    m_len = len;
+    m_pos = 0;
+
+    if ( len ) {
+      call Usart.enableRxIntr();
+      continueOp();
+    }
+    else {
+      post signalDone_task();
+    }
+
+    return SUCCESS;
+
+  }
+
+  task void signalDone_task() {
+    atomic signalDone();
+  }
+
+  async event void UsartInterrupts.rxDone( uint8_t data ) {
+
+    if ( m_rx_buf )
+      m_rx_buf[ m_pos-1 ] = data;
+
+    if ( m_pos < m_len )
+      continueOp();
+    else {
+      call Usart.disableRxIntr();
+      signalDone();
+    }
+  }
+
+  void signalDone() {
+    signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len,
+					   SUCCESS );
+  }
+
+  async event void UsartInterrupts.txDone() {}
+
+  default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {}
+
+}
diff --git a/tos/chips/msp430/usart/Msp430Uart0C.nc b/tos/chips/msp430/usart/Msp430Uart0C.nc
new file mode 100644
index 00000000..db65bce1
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430Uart0C.nc
@@ -0,0 +1,69 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An implementation of the UART on USART0 for the MSP430.
+ * @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Eric B. Decker <cire831@gmail.com>
+ * @version $Revision: 1.6 $ $Date: 2008-05-21 22:11:57 $
+ */
+
+#include "msp430usart.h"
+
+generic configuration Msp430Uart0C() {
+
+  provides interface Resource;
+  provides interface ResourceRequested;
+  provides interface UartStream;
+  provides interface UartByte;
+
+  uses interface Msp430UartConfigure;
+}
+
+implementation {
+
+  enum {
+    CLIENT_ID = unique( MSP430_UARTO_BUS ),
+  };
+
+  components Msp430Uart0P as UartP;
+  Resource = UartP.Resource[ CLIENT_ID ];
+  UartStream = UartP.UartStream[ CLIENT_ID ];
+  UartByte = UartP.UartByte[ CLIENT_ID ];
+  Msp430UartConfigure = UartP.Msp430UartConfigure[ CLIENT_ID ];
+
+  components new Msp430Usart0C() as UsartC;
+  ResourceRequested = UsartC;
+  UartP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure;
+  UartP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
+  UartP.UsartInterrupts[ CLIENT_ID ] -> UsartC.HplMsp430UsartInterrupts;
+}
diff --git a/tos/chips/msp430/usart/Msp430Uart0P.nc b/tos/chips/msp430/usart/Msp430Uart0P.nc
new file mode 100644
index 00000000..30991039
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430Uart0P.nc
@@ -0,0 +1,70 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author Eric B. Decker <cire831@gmail.com>
+ * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $
+ */
+
+configuration Msp430Uart0P {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[ uint8_t id ];
+  provides interface UartStream[ uint8_t id ];
+  provides interface UartByte[ uint8_t id ];
+
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430UartConfigure[ uint8_t id ];
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts[ uint8_t id ];
+}
+
+implementation {
+  components new Msp430UartP() as UartP;
+  Resource = UartP.Resource;
+  ResourceConfigure = UartP.ResourceConfigure;
+  Msp430UartConfigure = UartP.Msp430UartConfigure;
+  UartStream = UartP.UartStream;
+  UartByte = UartP.UartByte;
+  UsartResource = UartP.UsartResource;
+  UsartInterrupts = UartP.UsartInterrupts;
+
+  components HplMsp430Usart0C as UsartC;
+  UartP.Usart -> UsartC;
+
+  components Counter32khz16C as CounterC;
+  UartP.Counter -> CounterC;
+
+  components LedsC as Leds;
+  UartP.Leds -> Leds;
+
+}
diff --git a/tos/chips/msp430/usart/Msp430Uart1C.nc b/tos/chips/msp430/usart/Msp430Uart1C.nc
new file mode 100644
index 00000000..59cbb960
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430Uart1C.nc
@@ -0,0 +1,69 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An implementation of the UART on USART1 for the MSP430.
+ * @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Eric B. Decker <cire81@gmail.com>
+ * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $
+ */
+
+#include "msp430usart.h"
+
+generic configuration Msp430Uart1C() {
+
+  provides interface Resource;
+  provides interface ResourceRequested;
+  provides interface UartStream;
+  provides interface UartByte;
+
+  uses interface Msp430UartConfigure;
+}
+
+implementation {
+
+  enum {
+    CLIENT_ID = unique( MSP430_UART1_BUS ),
+  };
+
+  components Msp430Uart1P as UartP;
+  Resource = UartP.Resource[ CLIENT_ID ];
+  UartStream = UartP.UartStream[ CLIENT_ID ];
+  UartByte = UartP.UartByte[ CLIENT_ID ];;
+  Msp430UartConfigure = UartP.Msp430UartConfigure[ CLIENT_ID ];
+
+  components new Msp430Usart1C() as UsartC;
+  ResourceRequested = UsartC;
+  UartP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure;
+  UartP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
+  UartP.UsartInterrupts[ CLIENT_ID ] -> UsartC.HplMsp430UsartInterrupts;
+}
diff --git a/tos/chips/msp430/usart/Msp430Uart1P.nc b/tos/chips/msp430/usart/Msp430Uart1P.nc
new file mode 100644
index 00000000..5d2d4e10
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430Uart1P.nc
@@ -0,0 +1,72 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author Eric B. Decker <cire831@gmail.com>
+ * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $
+ */
+
+configuration Msp430Uart1P {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[ uint8_t id ];
+  provides interface UartStream[ uint8_t id ];
+  provides interface UartByte[ uint8_t id ];
+  
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430UartConfigure[ uint8_t id ];
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts[ uint8_t id ];
+
+}
+
+implementation {
+
+  components new Msp430UartP() as UartP;
+  Resource = UartP.Resource;
+  ResourceConfigure = UartP.ResourceConfigure;
+  Msp430UartConfigure = UartP.Msp430UartConfigure;
+  UartStream = UartP.UartStream;
+  UartByte = UartP.UartByte;
+  UsartResource = UartP.UsartResource;
+  UsartInterrupts = UartP.UsartInterrupts;
+
+  components HplMsp430Usart1C as UsartC;
+  UartP.Usart -> UsartC;
+  
+  components Counter32khz16C as CounterC;
+  UartP.Counter -> CounterC;
+  
+  components LedsC as Leds;
+  UartP.Leds -> Leds;
+
+}
diff --git a/tos/chips/msp430/usart/Msp430UartConfigure.nc b/tos/chips/msp430/usart/Msp430UartConfigure.nc
new file mode 100644
index 00000000..ce80af22
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430UartConfigure.nc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface used by Msp430Uart clients to reconfigure the UART before use
+ * @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:11 $
+ */
+
+#include "msp430usart.h"
+
+interface Msp430UartConfigure {
+  async command msp430_uart_union_config_t* getConfig();
+}
diff --git a/tos/chips/msp430/usart/Msp430UartP.nc b/tos/chips/msp430/usart/Msp430UartP.nc
new file mode 100644
index 00000000..c831f4b0
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430UartP.nc
@@ -0,0 +1,223 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author Eric B. Decker <cire831@gmail.com>
+ * @version $Revision: 1.7 $ $Date: 2008-06-04 05:31:15 $
+ */
+
+#include<Timer.h>
+
+generic module Msp430UartP() {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[ uint8_t id ];
+  provides interface UartStream[ uint8_t id ];
+  provides interface UartByte[ uint8_t id ];
+  
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430UartConfigure[ uint8_t id ];
+  uses interface HplMsp430Usart as Usart;
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts[ uint8_t id ];
+  uses interface Counter<T32khz,uint16_t>;
+  uses interface Leds;
+
+}
+
+implementation {
+  
+  norace uint16_t m_tx_len, m_rx_len;
+  norace uint8_t * COUNT_NOK(m_tx_len) m_tx_buf, * COUNT_NOK(m_rx_len) m_rx_buf;
+  norace uint16_t m_tx_pos, m_rx_pos;
+  norace uint8_t m_byte_time;
+  norace uint8_t current_owner;
+  
+  async command error_t Resource.immediateRequest[ uint8_t id ]() {
+    return call UsartResource.immediateRequest[ id ]();
+  }
+
+  async command error_t Resource.request[ uint8_t id ]() {
+    return call UsartResource.request[ id ]();
+  }
+
+  async command uint8_t Resource.isOwner[ uint8_t id ]() {
+    return call UsartResource.isOwner[ id ]();
+  }
+
+  async command error_t Resource.release[ uint8_t id ]() {
+    if (call UsartResource.isOwner[id]() == FALSE)
+      return FAIL;
+    if ( m_rx_buf || m_tx_buf )
+      return EBUSY;
+    return call UsartResource.release[ id ]();
+  }
+
+  async command void ResourceConfigure.configure[ uint8_t id ]() {
+    msp430_uart_union_config_t* config = call Msp430UartConfigure.getConfig[id]();
+    m_byte_time = config->uartConfig.ubr / 2;
+    call Usart.setModeUart(config);
+    call Usart.enableIntr();
+  }
+
+  async command void ResourceConfigure.unconfigure[ uint8_t id ]() {
+    call Usart.resetUsart(TRUE);
+    call Usart.disableIntr();
+    call Usart.disableUart();
+
+    /* leave the usart in reset */
+    //call Usart.resetUsart(FALSE); // this shouldn't be called.
+  }
+
+  event void UsartResource.granted[ uint8_t id ]() {
+    signal Resource.granted[ id ]();
+  }
+  
+  async command error_t UartStream.enableReceiveInterrupt[ uint8_t id ]() {
+    if (call UsartResource.isOwner[id]() == FALSE)
+      return FAIL;
+    call Usart.enableRxIntr();
+    return SUCCESS;
+  }
+  
+  async command error_t UartStream.disableReceiveInterrupt[ uint8_t id ]() {
+    if (call UsartResource.isOwner[id]() == FALSE)
+      return FAIL;
+    call Usart.disableRxIntr();
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.receive[ uint8_t id ]( uint8_t* buf, uint16_t len ) {
+    if (call UsartResource.isOwner[id]() == FALSE)
+      return FAIL;
+    if ( len == 0 )
+      return FAIL;
+    atomic {
+      if ( m_rx_buf )
+	return EBUSY;
+      m_rx_buf = buf;
+      m_rx_len = len;
+      m_rx_pos = 0;
+    }
+    return SUCCESS;
+  }
+  
+  async event void UsartInterrupts.rxDone[uint8_t id]( uint8_t data ) {
+    if ( m_rx_buf ) {
+      m_rx_buf[ m_rx_pos++ ] = data;
+      if ( m_rx_pos >= m_rx_len ) {
+	uint8_t* buf = m_rx_buf;
+	m_rx_buf = NULL;
+	signal UartStream.receiveDone[id]( buf, m_rx_len, SUCCESS );
+      }
+    } else {
+      signal UartStream.receivedByte[id]( data );
+    }
+  }
+  
+  async command error_t UartStream.send[ uint8_t id ]( uint8_t* buf, uint16_t len ) {
+    if (call UsartResource.isOwner[id]() == FALSE)
+      return FAIL;
+    if ( len == 0 )
+      return FAIL;
+    else if ( m_tx_buf )
+      return EBUSY;
+    m_tx_buf = buf;
+    m_tx_len = len;
+    m_tx_pos = 0;
+    current_owner = id;
+    call Usart.tx( buf[ m_tx_pos++ ] );
+    return SUCCESS;
+  }
+  
+  async event void UsartInterrupts.txDone[uint8_t id]() {
+    if(current_owner != id) {
+      uint8_t* buf = m_tx_buf;
+      m_tx_buf = NULL;
+      signal UartStream.sendDone[id]( buf, m_tx_len, FAIL );
+    }
+    else if ( m_tx_pos < m_tx_len ) {
+      call Usart.tx( m_tx_buf[ m_tx_pos++ ] );
+    }
+    else {
+      uint8_t* buf = m_tx_buf;
+      m_tx_buf = NULL;
+      signal UartStream.sendDone[id]( buf, m_tx_len, SUCCESS );
+    }
+  }
+  
+  async command error_t UartByte.send[ uint8_t id ]( uint8_t data ) {
+    if (call UsartResource.isOwner[id]() == FALSE)
+      return FAIL;
+    call Usart.clrTxIntr();
+    call Usart.disableTxIntr ();
+    call Usart.tx( data );
+    while( !call Usart.isTxIntrPending() );
+    call Usart.clrTxIntr();
+    call Usart.enableTxIntr();
+    return SUCCESS;
+  }
+  
+  async command error_t UartByte.receive[ uint8_t id ]( uint8_t* byte, uint8_t timeout ) {
+    
+    uint16_t timeout_micro = m_byte_time * timeout + 1;
+    uint16_t start;
+    
+    if (call UsartResource.isOwner[id]() == FALSE)
+      return FAIL;
+    start = call Counter.get();
+    while( !call Usart.isRxIntrPending() ) {
+      if ( ( call Counter.get() - start ) >= timeout_micro )
+				return FAIL;
+    }
+    *byte = call Usart.rx();
+    
+    return SUCCESS;
+
+  }
+  
+  async event void Counter.overflow() {}
+  
+  default async command error_t UsartResource.isOwner[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; }
+  default async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig[uint8_t id]() {
+    return &msp430_uart_default_config;
+  }
+
+  default event void Resource.granted[ uint8_t id ]() {}
+
+  default async event void UartStream.sendDone[ uint8_t id ](uint8_t* buf, uint16_t len, error_t error) {}
+  default async event void UartStream.receivedByte[ uint8_t id ](uint8_t byte) {}
+  default async event void UartStream.receiveDone[ uint8_t id ]( uint8_t* buf, uint16_t len, error_t error ) {}
+}
diff --git a/tos/chips/msp430/usart/Msp430Usart0C.nc b/tos/chips/msp430/usart/Msp430Usart0C.nc
new file mode 100644
index 00000000..e9ed5f89
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430Usart0C.nc
@@ -0,0 +1,78 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Provides an interface for USART0 on the MSP430.
+ *
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $
+ */
+
+generic configuration Msp430Usart0C() {
+
+  provides interface Resource;
+  provides interface ResourceRequested;
+  provides interface ArbiterInfo;
+  provides interface HplMsp430Usart;
+  provides interface HplMsp430UsartInterrupts;
+  provides interface HplMsp430I2CInterrupts;
+#ifdef __msp430_have_usart0_with_i2c
+  provides interface HplMsp430I2C;
+#endif  
+
+  uses interface ResourceConfigure;
+  
+}
+
+implementation {
+
+  enum {
+    CLIENT_ID = unique( MSP430_HPLUSART0_RESOURCE ),
+  };
+
+  components Msp430UsartShare0P as UsartShareP;
+
+  Resource = UsartShareP.Resource[ CLIENT_ID ];
+  ResourceRequested = UsartShareP.ResourceRequested[ CLIENT_ID ];
+  ResourceConfigure = UsartShareP.ResourceConfigure[ CLIENT_ID ];
+  ArbiterInfo = UsartShareP.ArbiterInfo;
+  HplMsp430UsartInterrupts = UsartShareP.Interrupts[ CLIENT_ID ];
+  HplMsp430I2CInterrupts = UsartShareP.I2CInterrupts[ CLIENT_ID ];
+  
+  components HplMsp430Usart0C as HplUsartC;
+  HplMsp430Usart = HplUsartC;
+  
+#ifdef __msp430_have_usart0_with_i2c
+  components HplMsp430I2C0C as HplI2CC;
+  HplMsp430I2C = HplI2CC;
+#endif
+  
+}
diff --git a/tos/chips/msp430/usart/Msp430Usart1C.nc b/tos/chips/msp430/usart/Msp430Usart1C.nc
new file mode 100644
index 00000000..7b42d5b4
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430Usart1C.nc
@@ -0,0 +1,68 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Provides an interface for USART1 on the MSP430.
+ *
+ * @author Vlado Handziski <handisk@tkn.tu-berlin.de>
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $
+ */
+
+generic configuration Msp430Usart1C() {
+
+  provides interface Resource;
+  provides interface ResourceRequested;
+  provides interface ArbiterInfo;
+  provides interface HplMsp430Usart;
+  provides interface HplMsp430UsartInterrupts;
+
+  uses interface ResourceConfigure;
+}
+
+implementation {
+
+  enum {
+    CLIENT_ID = unique( MSP430_HPLUSART1_RESOURCE ),
+  };
+
+  components Msp430UsartShare1P as UsartShareP;
+
+  Resource = UsartShareP.Resource[ CLIENT_ID ];
+  ResourceRequested = UsartShareP.ResourceRequested[ CLIENT_ID ];
+  ResourceConfigure = UsartShareP.ResourceConfigure[ CLIENT_ID ];
+  ArbiterInfo = UsartShareP.ArbiterInfo;
+  HplMsp430UsartInterrupts = UsartShareP.Interrupts[ CLIENT_ID ];
+
+  components HplMsp430Usart1C as UsartC;
+  HplMsp430Usart = UsartC;
+
+}
diff --git a/tos/chips/msp430/usart/Msp430UsartShare0P.nc b/tos/chips/msp430/usart/Msp430UsartShare0P.nc
new file mode 100644
index 00000000..7a7070ad
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430UsartShare0P.nc
@@ -0,0 +1,65 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-05-21 22:11:57 $
+ */
+
+configuration Msp430UsartShare0P {
+
+  provides interface HplMsp430UsartInterrupts as Interrupts[ uint8_t id ];
+  provides interface HplMsp430I2CInterrupts as I2CInterrupts[ uint8_t id ];
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceRequested[ uint8_t id ];
+  provides interface ArbiterInfo;
+
+  uses interface ResourceConfigure[ uint8_t id ];
+}
+
+implementation {
+
+  components new Msp430UsartShareP() as UsartShareP;
+  Interrupts = UsartShareP;
+  I2CInterrupts = UsartShareP;
+  
+  components new FcfsArbiterC( MSP430_HPLUSART0_RESOURCE ) as ArbiterC;
+  Resource = ArbiterC;
+  ResourceRequested = ArbiterC;
+  ResourceConfigure = ArbiterC;
+  ArbiterInfo = ArbiterC;
+  UsartShareP.ArbiterInfo -> ArbiterC;
+
+  components HplMsp430Usart0C as HplUsartC;
+  UsartShareP.RawInterrupts -> HplUsartC;
+  UsartShareP.RawI2CInterrupts -> HplUsartC;
+
+}
diff --git a/tos/chips/msp430/usart/Msp430UsartShare1P.nc b/tos/chips/msp430/usart/Msp430UsartShare1P.nc
new file mode 100644
index 00000000..a91ac619
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430UsartShare1P.nc
@@ -0,0 +1,66 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @version $Revision: 1.6 $ $Date: 2008-05-21 22:11:57 $
+ */
+
+configuration Msp430UsartShare1P {
+
+  provides interface HplMsp430UsartInterrupts as Interrupts[ uint8_t id ];
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceRequested[ uint8_t id ];
+  provides interface ArbiterInfo;
+
+  uses interface ResourceConfigure[ uint8_t id ];
+}
+
+implementation {
+
+  components new Msp430UsartShareP() as UsartShareP;
+  Interrupts = UsartShareP;
+  UsartShareP.RawInterrupts -> UsartC;
+
+  components new FcfsArbiterC( MSP430_HPLUSART1_RESOURCE ) as ArbiterC;
+  Resource = ArbiterC;
+  ResourceRequested = ArbiterC;
+  ResourceConfigure = ArbiterC;
+  ArbiterInfo = ArbiterC;
+  UsartShareP.ArbiterInfo -> ArbiterC;
+
+  components new AsyncStdControlPowerManagerC() as PowerManagerC;
+  PowerManagerC.ResourceDefaultOwner -> ArbiterC;
+	
+  components HplMsp430Usart1C as UsartC;
+  PowerManagerC.AsyncStdControl -> UsartC;
+}
diff --git a/tos/chips/msp430/usart/Msp430UsartShareP.nc b/tos/chips/msp430/usart/Msp430UsartShareP.nc
new file mode 100644
index 00000000..026c8ce7
--- /dev/null
+++ b/tos/chips/msp430/usart/Msp430UsartShareP.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-06-26 04:39:08 $
+ */
+
+generic module Msp430UsartShareP() @safe() {
+  
+  provides interface HplMsp430UsartInterrupts as Interrupts[ uint8_t id ];
+  provides interface HplMsp430I2CInterrupts as I2CInterrupts[ uint8_t id ];
+  uses interface HplMsp430UsartInterrupts as RawInterrupts;
+  uses interface HplMsp430I2CInterrupts as RawI2CInterrupts;
+  uses interface ArbiterInfo;
+  
+}
+
+implementation {
+  
+  async event void RawInterrupts.txDone() {
+    if ( call ArbiterInfo.inUse() )
+      signal Interrupts.txDone[ call ArbiterInfo.userId() ]();
+  }
+  
+  async event void RawInterrupts.rxDone( uint8_t data ) {
+    if ( call ArbiterInfo.inUse() )
+      signal Interrupts.rxDone[ call ArbiterInfo.userId() ]( data );
+  }
+  
+  async event void RawI2CInterrupts.fired() {
+    if ( call ArbiterInfo.inUse() )
+      signal I2CInterrupts.fired[ call ArbiterInfo.userId() ]();
+  }
+  
+  default async event void Interrupts.txDone[ uint8_t id ]() {}
+  default async event void Interrupts.rxDone[ uint8_t id ]( uint8_t data ) {}
+  default async event void I2CInterrupts.fired[ uint8_t id ]() {}
+
+}
diff --git a/tos/chips/msp430/usart/msp430usart.h b/tos/chips/msp430/usart/msp430usart.h
new file mode 100644
index 00000000..08d543b3
--- /dev/null
+++ b/tos/chips/msp430/usart/msp430usart.h
@@ -0,0 +1,340 @@
+/*
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ * @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#ifndef _H_Msp430Usart_h
+#define _H_Msp430Usart_h
+
+#define MSP430_HPLUSART0_RESOURCE "Msp430Usart0.Resource"
+#define MSP430_SPIO_BUS "Msp430Spi0.Resource"
+#define MSP430_UARTO_BUS "Msp430Uart0.Resource"
+#define MSP430_I2CO_BUS "Msp430I2C0.Resource"
+
+#define MSP430_HPLUSART1_RESOURCE "Msp430Usart1.Resource"
+#define MSP430_SPI1_BUS "Msp430Spi1.Resource"
+#define MSP430_UART1_BUS "Msp430Uart1.Resource"
+
+typedef enum
+{
+  USART_NONE = 0,
+  USART_UART = 1,
+  USART_UART_TX = 2,
+  USART_UART_RX = 3,
+  USART_SPI = 4,
+  USART_I2C = 5
+} msp430_usartmode_t;
+
+typedef struct {
+  unsigned int swrst: 1;    //Software reset (0=operational; 1=reset)
+  unsigned int mm: 1;       //Multiprocessor mode (0=idle-line protocol; 1=address-bit protocol)
+  unsigned int sync: 1;     //Synchronous mode (0=UART; 1=SPI/I2C)
+  unsigned int listen: 1;   //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
+  unsigned int clen: 1;     //Character length (0=7-bit data; 1=8-bit data)
+  unsigned int spb: 1;      //Stop bits (0=one stop bit; 1=two stop bits)
+  unsigned int pev: 1;      //Parity select (0=odd; 1=even)
+  unsigned int pena: 1;     //Parity enable (0=disabled; 1=enabled)
+} __attribute__ ((packed)) msp430_uctl_t ;
+
+typedef struct {
+  unsigned int txept:1;      //Transmitter empty (0=busy; 1=TX buffer empty or SWRST=1)
+  unsigned int stc:1;       //Slave transmit (0=4-pin SPI && STE enabled; 1=3-pin SPI && STE disabled)
+  unsigned int txwake: 1;   //Transmiter wake (0=next char is data; 1=next char is address)
+  unsigned int urxse: 1;    //Receive start-edge detection (0=disabled; 1=enabled)
+  unsigned int ssel: 2;     //Clock source (00=UCLKI; 01=ACLK; 10=SMCLK; 11=SMCLK)
+  unsigned int ckpl: 1;     //Clock polarity (0=normal; 1=inverted)
+  unsigned int ckph:1;      //Clock phase (0=normal; 1=half-cycle delayed)
+} __attribute__ ((packed)) msp430_utctl_t;
+
+typedef struct {
+  unsigned int rxerr: 1;    //Receive error (0=no errors; 1=error detected)
+  unsigned int rxwake: 1;   //Receive wake-up (0=received data; 1=received an address)
+  unsigned int urxwie: 1;   //Wake-up interrupt-enable (0=all characters set URXIFGx; 1=only address sets URXIFGx)
+  unsigned int urxeie: 1;   //Erroneous-character receive (0=rejected; 1=recieved and URXIFGx set)
+  unsigned int brk:1;       //Break detect (0=no break; 1=break occured)
+  unsigned int oe:1;        //Overrun error (0=no error; 1=overrun error)
+  unsigned int pe:1;        //Parity error (0=no error; 1=parity error)
+  unsigned int fe:1;        //Framing error (0=no error; 1=low stop bit)
+} __attribute__ ((packed)) msp430_urctl_t;
+
+DEFINE_UNION_CAST(uctl2int,uint8_t,msp430_uctl_t)
+DEFINE_UNION_CAST(int2uctl,msp430_uctl_t,uint8_t)
+
+DEFINE_UNION_CAST(utctl2int,uint8_t,msp430_utctl_t)
+DEFINE_UNION_CAST(int2utctl,msp430_utctl_t,uint8_t)
+
+DEFINE_UNION_CAST(urctl2int,uint8_t,msp430_urctl_t)
+DEFINE_UNION_CAST(int2urctl,msp430_urctl_t,uint8_t)
+
+typedef struct {
+  unsigned int ubr: 16;     //Clock division factor (>=0x0002)
+  
+  unsigned int :1;
+  unsigned int mm: 1;       //Master mode (0=slave; 1=master)
+  unsigned int :1;
+  unsigned int listen: 1;   //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
+  unsigned int clen: 1;     //Character length (0=7-bit data; 1=8-bit data)
+  unsigned int: 3;
+  
+  unsigned int:1;
+  unsigned int stc: 1;      //Slave transmit (0=4-pin SPI && STE enabled; 1=3-pin SPI && STE disabled)
+  unsigned int:2;
+  unsigned int ssel: 2;     //Clock source (00=external UCLK [slave]; 01=ACLK [master]; 10=SMCLK [master] 11=SMCLK [master]); 
+  unsigned int ckpl: 1;     //Clock polarity (0=inactive is low && data at rising edge; 1=inverted)
+  unsigned int ckph: 1;     //Clock phase (0=normal; 1=half-cycle delayed)
+  unsigned int :0;
+} msp430_spi_config_t;
+
+typedef struct {
+  uint16_t ubr;
+  uint8_t uctl;
+  uint8_t utctl;
+} msp430_spi_registers_t;
+
+typedef union {
+  msp430_spi_config_t spiConfig;
+  msp430_spi_registers_t spiRegisters;
+} msp430_spi_union_config_t;
+
+msp430_spi_union_config_t msp430_spi_default_config = { 
+  {
+    ubr : 0x0002, 
+    ssel : 0x02, 
+    clen : 1, 
+    listen : 0, 
+    mm : 1, 
+    ckph : 1, 
+    ckpl : 0, 
+    stc : 1
+  } 
+};
+    
+    
+    
+/**
+  The calculations were performed using the msp-uart.pl script:
+  msp-uart.pl -- calculates the uart registers for MSP430
+
+  Copyright (C) 2002 - Pedro Zorzenon Neto - pzn dot debian dot org
+ **/
+typedef enum {
+  //32KHZ = 32,768 Hz, 1MHZ = 1,048,576 Hz
+  UBR_32KHZ_1200=0x001B,    UMCTL_32KHZ_1200=0x94,
+  UBR_32KHZ_1800=0x0012,    UMCTL_32KHZ_1800=0x84,
+  UBR_32KHZ_2400=0x000D,    UMCTL_32KHZ_2400=0x6D,
+  UBR_32KHZ_4800=0x0006,    UMCTL_32KHZ_4800=0x77,
+  UBR_32KHZ_9600=0x0003,    UMCTL_32KHZ_9600=0x29,  // (Warning: triggers MSP430 errata US14)
+
+  UBR_1MHZ_1200=0x0369,   UMCTL_1MHZ_1200=0x7B,
+  UBR_1MHZ_1800=0x0246,   UMCTL_1MHZ_1800=0x55,
+  UBR_1MHZ_2400=0x01B4,   UMCTL_1MHZ_2400=0xDF,
+  UBR_1MHZ_4800=0x00DA,   UMCTL_1MHZ_4800=0xAA,
+  UBR_1MHZ_9600=0x006D,   UMCTL_1MHZ_9600=0x44,
+  UBR_1MHZ_19200=0x0036,  UMCTL_1MHZ_19200=0xB5,
+  UBR_1MHZ_38400=0x001B,  UMCTL_1MHZ_38400=0x94,
+  UBR_1MHZ_57600=0x0012,  UMCTL_1MHZ_57600=0x84,
+  UBR_1MHZ_76800=0x000D,  UMCTL_1MHZ_76800=0x6D,
+  UBR_1MHZ_115200=0x0009, UMCTL_1MHZ_115200=0x10,
+  UBR_1MHZ_230400=0x0004, UMCTL_1MHZ_230400=0x55,
+} msp430_uart_rate_t;
+
+typedef struct {
+  unsigned int ubr:16;      //Baud rate (use enum msp430_uart_rate_t for predefined rates)
+  
+  unsigned int umctl: 8;    //Modulation (use enum msp430_uart_rate_t for predefined rates)
+  
+  unsigned int :1;
+  unsigned int mm: 1;       //Multiprocessor mode (0=idle-line protocol; 1=address-bit protocol)
+  unsigned int :1;
+  unsigned int listen: 1;   //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
+  unsigned int clen: 1;     //Character length (0=7-bit data; 1=8-bit data)
+  unsigned int spb: 1;      //Stop bits (0=one stop bit; 1=two stop bits)
+  unsigned int pev: 1;      //Parity select (0=odd; 1=even)
+  unsigned int pena: 1;     //Parity enable (0=disabled; 1=enabled)
+  unsigned int :0;
+  
+  unsigned int :3;
+  unsigned int urxse: 1;    //Receive start-edge detection (0=disabled; 1=enabled)
+  unsigned int ssel: 2;     //Clock source (00=UCLKI; 01=ACLK; 10=SMCLK; 11=SMCLK)
+  unsigned int ckpl: 1;     //Clock polarity (0=normal; 1=inverted)
+  unsigned int :1;
+  
+  unsigned int :2;
+  unsigned int urxwie: 1;   //Wake-up interrupt-enable (0=all characters set URXIFGx; 1=only address sets URXIFGx)
+  unsigned int urxeie: 1;   //Erroneous-character receive (0=rejected; 1=recieved and URXIFGx set)
+  unsigned int :4;
+  unsigned int :0;
+  
+  unsigned int utxe:1;			// 1:enable tx module
+  unsigned int urxe:1;			// 1:enable rx module
+} msp430_uart_config_t;
+
+typedef struct {
+  uint16_t ubr;
+  uint8_t umctl;
+  uint8_t uctl;
+  uint8_t utctl;
+  uint8_t urctl;
+  uint8_t ume;
+} msp430_uart_registers_t;
+
+typedef union {
+  msp430_uart_config_t uartConfig;
+  msp430_uart_registers_t uartRegisters;
+} msp430_uart_union_config_t;
+    
+msp430_uart_union_config_t msp430_uart_default_config = { 
+  {
+    utxe : 1, 
+    urxe : 1, 
+    ubr : UBR_1MHZ_57600, 
+    umctl : UMCTL_1MHZ_57600, 
+    ssel : 0x02, 
+    pena : 0, 
+    pev : 0, 
+    spb : 0, 
+    clen : 1, 
+    listen : 0, 
+    mm : 0, 
+    ckpl : 0, 
+    urxse : 0, 
+    urxeie : 1, 
+    urxwie : 0,
+    utxe : 1,
+    urxe : 1
+  } 
+};
+
+
+
+typedef struct {
+  unsigned int i2cstt: 1; // I2CSTT Bit 0 START bit. (0=No action; 1=Send START condition)
+  unsigned int i2cstp: 1; // I2CSTP Bit 1 STOP bit. (0=No action; 1=Send STOP condition)
+  unsigned int i2cstb: 1; // I2CSTB Bit 2 Start byte. (0=No action; 1=Send START condition and start byte (01h))
+  unsigned int i2cctrx: 1; //I2CTRX Bit 3 I2C transmit. (0=Receive mode; 1=Transmit mode) pin.
+  unsigned int i2cssel: 2; // I2C clock source select. (00=No clock; 01=ACLK; 10=SMCLK; 11=SMCLK)
+  unsigned int i2ccrm: 1;  // I2C repeat mode 
+  unsigned int i2cword: 1; // I2C word mode. Selects byte(=0) or word(=1) mode for the I2C data register.
+} __attribute__ ((packed)) msp430_i2ctctl_t;
+
+DEFINE_UNION_CAST(i2ctctl2int,uint8_t,msp430_i2ctctl_t)
+DEFINE_UNION_CAST(int2i2ctctl,msp430_i2ctctl_t,uint8_t)
+
+typedef struct {
+  unsigned int :1;
+  unsigned int mst: 1;      //Master mode (0=slave; 1=master)
+  unsigned int :1;
+  unsigned int listen: 1;   //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
+  unsigned int xa: 1;       //Extended addressing (0=7-bit addressing; 1=8-bit addressing)
+  unsigned int :1;
+  unsigned int txdmaen: 1;  //DMA to TX (0=disabled; 1=enabled)
+  unsigned int rxdmaen: 1;  //RX to DMA (0=disabled; 1=enabled)
+    
+  unsigned int :4;
+  unsigned int i2cssel: 2;  //Clock source (00=disabled; 01=ACLK; 10=SMCLK; 11=SMCLK)
+  unsigned int i2crm: 1;    //Repeat mode (0=use I2CNDAT; 1=count in software)
+  unsigned int i2cword: 1;  //Word mode (0=byte mode; 1=word mode)
+  
+  unsigned int i2cpsc: 8;   //Clock prescaler (values >0x04 not recomended)
+  
+  unsigned int i2csclh: 8;  //High period (high period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc)
+  
+  unsigned int i2cscll: 8;  //Low period (low period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc)
+  
+  unsigned int i2coa : 10;  // Own address register.
+  unsigned int :6;
+} msp430_i2c_config_t;
+    
+typedef struct {
+  uint8_t uctl;
+  uint8_t i2ctctl;
+  uint8_t i2cpsc;
+  uint8_t i2csclh;
+  uint8_t i2cscll;
+  uint16_t i2coa;
+} msp430_i2c_registers_t;
+
+typedef union {
+  msp430_i2c_config_t i2cConfig;
+  msp430_i2c_registers_t i2cRegisters;
+} msp430_i2c_union_config_t;
+
+msp430_i2c_union_config_t msp430_i2c_default_config = { 
+  {
+    rxdmaen : 0, 
+    txdmaen : 0, 
+    xa : 0, 
+    listen : 0, 
+    mst : 1,
+    i2cword : 0, 
+    i2crm : 1, 
+    i2cssel : 0x2, 
+    i2cpsc : 0, 
+    i2csclh : 0x3, 
+    i2cscll : 0x3,
+    i2coa : 0,
+  } 
+};
+
+typedef uint8_t uart_speed_t;
+typedef uint8_t uart_parity_t;
+typedef uint8_t uart_duplex_t;
+
+enum {
+  TOS_UART_1200   = 0,
+  TOS_UART_1800   = 1,
+  TOS_UART_2400   = 2,
+  TOS_UART_4800   = 3,
+  TOS_UART_9600   = 4,
+  TOS_UART_19200  = 5,
+  TOS_UART_38400  = 6,
+  TOS_UART_57600  = 7,
+  TOS_UART_76800  = 8,
+  TOS_UART_115200 = 9,
+  TOS_UART_230400 = 10
+};
+
+enum {
+  TOS_UART_OFF,
+  TOS_UART_RONLY,
+  TOS_UART_TONLY,
+  TOS_UART_DUPLEX
+};
+
+enum {
+  TOS_UART_PARITY_NONE,
+  TOS_UART_PARITY_EVEN,
+  TOS_UART_PARITY_ODD
+};
+
+#endif//_H_Msp430Usart_h
diff --git a/tos/chips/pxa27x/HplPXA27xInterrupt.nc b/tos/chips/pxa27x/HplPXA27xInterrupt.nc
new file mode 100644
index 00000000..483c5234
--- /dev/null
+++ b/tos/chips/pxa27x/HplPXA27xInterrupt.nc
@@ -0,0 +1,76 @@
+// $Id: HplPXA27xInterrupt.nc,v 1.6 2008-06-11 00:46:23 razvanm Exp $
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/**
+ * This interface supports the core peripheral interrupts of the PXA27X 
+ * processor.  
+ * It is usually parameterized based on the Peripheral ID (PPID) of the 
+ * interrupt signal.
+ * ARM interrupt levels (IRQ/FIQ) are established by wiring.
+ * Priorities are established by a static table (TOSH_IRP_TABLE)
+ *
+ * Components implementing this interface are expected to provide reentrant
+ * (i.e. atomic) semantics.
+ *
+ * @author: Philip Buonadonna
+ */
+
+interface HplPXA27xInterrupt
+{
+  /** 
+   * Allocates a given peripheral interrupt with the PXA27X interrupt manager.
+   * Specifically, it establishes the interrupt level (IRQ or FIQ) and the 
+   * priority. 
+   */
+  async command error_t allocate();
+
+  /**
+   * Enables a periperhal interrupt.
+   */
+  async command void enable();
+
+  /**
+   * Disables a peripheral interrupt.
+   */
+  async command void disable();
+
+  /**
+   * The peripheral interrupt event.
+   */
+  async event void fired();
+}
diff --git a/tos/chips/pxa27x/HplPXA27xInterruptCntl.nc b/tos/chips/pxa27x/HplPXA27xInterruptCntl.nc
new file mode 100644
index 00000000..792424bf
--- /dev/null
+++ b/tos/chips/pxa27x/HplPXA27xInterruptCntl.nc
@@ -0,0 +1,58 @@
+// $Id: HplPXA27xInterruptCntl.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This interface provides access to the ICCR functionality of
+ * the PXA27x interrupt controller.  
+ * 
+ * Refer to the PXA27x Developers Guide for more information.
+ *
+ * @author: Philip Buonadonna
+ */
+
+interface HplPXA27xInterruptCntl
+{
+   /**
+    * Sets the ICCR DIM bit of the PXA27x interrupt controller
+    * 
+    * @param flag TRUE to set the DIM bit, FALSE to clear
+    *
+    */
+   async command void setICCR_DIM(bool flag);
+
+   /**
+    * Gets the value of the ICCR DIM bit.
+    *  
+    * @return value TRUE if set, FALSE if clear.
+    */
+   async command bool getICCR_DIM();
+
+}
+
diff --git a/tos/chips/pxa27x/HplPXA27xInterruptM.nc b/tos/chips/pxa27x/HplPXA27xInterruptM.nc
new file mode 100644
index 00000000..639f779d
--- /dev/null
+++ b/tos/chips/pxa27x/HplPXA27xInterruptM.nc
@@ -0,0 +1,232 @@
+// $Id: HplPXA27xInterruptM.nc,v 1.6 2008-06-11 00:46:23 razvanm Exp $ 
+
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors:		Phil Buonadonna
+ *
+ * Edits:	Josh Herbach
+ * Revised: 09/02/2005
+ */
+
+module HplPXA27xInterruptM
+{
+  provides {
+    interface HplPXA27xInterrupt as PXA27xIrq[uint8_t id];
+    interface HplPXA27xInterruptCntl;
+  }
+}
+
+implementation 
+{
+
+  uint32_t getICHP() {
+    uint32_t val;
+
+    asm volatile ("mrc p6,0,%0,c5,c0,0\n\t":"=r" (val));
+    return val;
+  }
+
+  /* Core PXA27X interrupt dispatch vectors */
+  /* DO NOT change the name of these functions */
+  void hplarmv_irq() __attribute__ ((interrupt ("IRQ"))) @C() @atomic_hwevent() {
+
+    uint32_t IRQPending;
+
+    IRQPending = getICHP();  // Determine which interrupt to service
+    IRQPending >>= 16;  // Right justify to the IRQ portion
+
+    while (IRQPending & (1 << 15)) {
+      uint8_t PeripheralID = (IRQPending & 0x3f); // Get rid of the Valid bit
+      signal PXA27xIrq.fired[PeripheralID]();     // Handler is responsible for clearing interrupt
+      IRQPending = getICHP();  // Determine which interrupt to service
+      IRQPending >>= 16;  // Right justify to the IRQ portion
+    }
+
+    return;
+  }
+
+  void hplarmv_fiq() __attribute__ ((interrupt ("FIQ"))) @C() @atomic_hwevent() {
+
+  } 
+
+  static uint8_t usedPriorities = 0;
+
+  /* Helper functions */
+  /* NOTE: Read-back of all register writes is necessary to ensure the data latches */
+
+  error_t allocate(uint8_t id, bool level, uint8_t priority)
+  {
+    uint32_t tmp;
+    error_t error = FAIL;
+
+    atomic{
+      uint8_t i;
+      if(usedPriorities == 0){//assumed that the table will have some entries
+	uint8_t PriorityTable[40], DuplicateTable[40];
+	for(i = 0; i < 40; i++){
+	  DuplicateTable[i] = PriorityTable[i] = 0xFF;
+	}
+	
+	for(i = 0; i < 40; i++)
+	  if(TOSH_IRP_TABLE[i] != 0xff){
+	    if(PriorityTable[TOSH_IRP_TABLE[i]] != 0xFF)/*duplicate priorities
+							  in the table, mark 
+							  for later fixing*/
+	      DuplicateTable[i] = PriorityTable[TOSH_IRP_TABLE[i]];
+	    else
+	      PriorityTable[TOSH_IRP_TABLE[i]] = i;
+	  }
+	
+	//compress table
+	for(i = 0; i < 40; i++){
+	  if(PriorityTable[i] != 0xff){
+	    PriorityTable[usedPriorities] = PriorityTable[i];
+	    if(i != usedPriorities)
+	      PriorityTable[i] = 0xFF;
+	    usedPriorities++;
+	  }
+	}
+
+	for(i = 0; i < 40; i++)
+	  if(DuplicateTable[i] != 0xFF){
+	    uint8_t j, ExtraTable[40];
+	    for(j = 0; DuplicateTable[i] != PriorityTable[j]; j++);
+	    memcpy(ExtraTable + j + 1, PriorityTable + j, usedPriorities - j);
+	    memcpy(PriorityTable + j + 1, ExtraTable + j + 1, 
+		   usedPriorities - j);
+	    PriorityTable[j] = i;
+	    usedPriorities++;
+	  }
+
+	for(i = 0; i < usedPriorities; i++){
+	  IPR(i) = (IPR_VALID | PriorityTable[i]);
+	  tmp = IPR(i);
+	}
+      }
+
+      if (id < 34){
+	if(priority == 0xff){
+	  priority = usedPriorities;
+	  usedPriorities++;
+	  IPR(priority) = (IPR_VALID | (id));
+	  tmp = IPR(priority);
+	}
+	if (level) {
+	  _ICLR(id) |= _PPID_Bit(id);
+	  tmp = _ICLR(id);
+	} 
+	
+	error = SUCCESS;
+      }
+    }
+    return error;
+  }
+  
+  void enable(uint8_t id)
+  {
+    uint32_t tmp;
+    atomic {
+      if (id < 34) {
+	_ICMR(id) |= _PPID_Bit(id);
+	tmp = _ICMR(id);
+      }
+    }
+    return;
+  }
+
+  void disable(uint8_t id)
+  {
+    uint32_t tmp;
+    atomic {
+      if (id < 34) {
+	_ICMR(id) &= ~(_PPID_Bit(id));
+	tmp = _ICMR(id);
+      }
+    }
+    return;
+  }
+
+  /* Interface implementation */
+
+  async command error_t PXA27xIrq.allocate[uint8_t id]()
+  {
+    return allocate(id, FALSE, TOSH_IRP_TABLE[id]);
+  }
+
+  async command void PXA27xIrq.enable[uint8_t id]()
+  {
+    enable(id);
+    return;
+  }
+
+  async command void PXA27xIrq.disable[uint8_t id]()
+  {
+    disable(id);
+    return;
+  }
+
+  async command void HplPXA27xInterruptCntl.setICCR_DIM(bool flag) {
+
+    if (flag) {
+      ICCR |= ICCR_DIM;
+    }
+    else {
+      ICCR = 0;
+    }
+    return;
+
+  }
+
+  async command bool HplPXA27xInterruptCntl.getICCR_DIM() {
+    bool result = FALSE;
+
+    if (ICCR & ICCR_DIM) {
+      result = TRUE;
+    }
+
+    return result;
+  }
+
+  default async event void PXA27xIrq.fired[uint8_t id]() 
+  {
+    return;
+  }
+
+}
diff --git a/tos/chips/pxa27x/McuSleepC.nc b/tos/chips/pxa27x/McuSleepC.nc
new file mode 100644
index 00000000..61a372e4
--- /dev/null
+++ b/tos/chips/pxa27x/McuSleepC.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Implementation of TEP 112 (Microcontroller Power Management) for
+ * the Intel Xscale PXA27x
+ *
+ * <pre>
+ *  $Id: McuSleepC.nc,v 1.5 2008-07-23 17:25:42 idgay Exp $
+ * </pre>
+ *
+ * @author Philip Buonadonna
+ *
+ */
+
+module McuSleepC {
+  provides {
+    interface McuSleep;
+    interface McuPowerState;
+  }
+  uses {
+    interface McuPowerOverride;
+  }
+}
+implementation {
+  
+  async command void McuSleep.sleep() {
+    // Put idle into here.
+    asm volatile (
+		  "mcr p14,0,%0,c7,c0,0"
+		  : 
+		  : "r" (PWRMODE_M_IDLE)
+		  );
+    __nesc_enable_interrupt();
+    // All of memory may change at this point...
+    asm volatile ("" : : : "memory");
+    __nesc_disable_interrupt();
+    return;
+  }
+
+  async command void McuPowerState.update() {
+
+    return;
+  }
+
+ default async command mcu_power_t McuPowerOverride.lowestState() {
+   return 0;
+ }
+
+}
diff --git a/tos/chips/pxa27x/arm_defs.h b/tos/chips/pxa27x/arm_defs.h
new file mode 100644
index 00000000..687209fd
--- /dev/null
+++ b/tos/chips/pxa27x/arm_defs.h
@@ -0,0 +1,70 @@
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors:   Philip Buonadonna
+ *
+ *
+ */
+
+#ifndef _ARM_DEFS_H
+#define _ARM_DEFS_H
+
+#define	ARM_CPSR_MODE_MASK (0x0000001F)
+#define	ARM_CPSR_INT_MASK (0x000000C0)
+#define	ARM_CPSR_COND_MASK (0xF8000000)
+
+#define	ARM_CPSR_MODE_USR (0x10)
+#define	ARM_CPSR_MODE_FIQ (0x11)
+#define	ARM_CPSR_MODE_IRQ (0x12)
+#define	ARM_CPSR_MODE_SVC (0x13)
+#define	ARM_CPSR_MODE_ABT (0x17)
+#define	ARM_CPSR_MODE_UND (0x1B)
+#define	ARM_CPSR_MODE_SYS (0x1F)
+
+#define	ARM_CPSR_BIT_N (1 << 31)
+#define	ARM_CPSR_BIT_Z (1 << 30)
+#define	ARM_CPSR_BIT_C (1 << 29)
+#define	ARM_CPSR_BIT_V (1 << 28)
+#define	ARM_CPSR_BIT_Q (1 << 27)
+
+#define	ARM_CPSR_BIT_I (1 << 7)
+#define	ARM_CPSR_BIT_F (1 << 6)
+#define	ARM_CPRS_BIT_T (1 << 5)
+
+#endif /*_ARM_DEFS_H */
diff --git a/tos/chips/pxa27x/cif/HplPXA27XQuickCaptInt.nc b/tos/chips/pxa27x/cif/HplPXA27XQuickCaptInt.nc
new file mode 100644
index 00000000..c23981bb
--- /dev/null
+++ b/tos/chips/pxa27x/cif/HplPXA27XQuickCaptInt.nc
@@ -0,0 +1,74 @@
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2005 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**                                         
+ * Description - PXA27X Quick Capture Interface.
+ * 
+ * @author Konrad Lorincz
+ * @version 1.0, August 10, 2005
+ */
+/**                                         
+ * Modified and ported to tinyos-2.x.
+ * 
+ * @author Brano Kusy
+ * @version October 25, 2007
+ */
+
+interface HplPXA27XQuickCaptInt
+{
+	command error_t init(uint8_t color);
+  command void enable();
+	command error_t setImageSize(uint16_t sizeX, uint16_t sizeY, uint8_t colorType);
+	command void initDMA(uint32_t num_bytes, void *buf);
+  async command void disableQuick();
+  async command void startDMA();
+
+  // Events/Interrupts
+  command void enableStartOfFrame();
+	command void disableStartOfFrame(); /*new*/
+  async event void startOfFrame(); 
+
+  command void enableEndOfFrame();
+  async event void endOfFrame(); 
+
+  command void enableEndOfLine();
+  async event void endOfLine(); 
+
+  command void enableRecvDataAvailable();
+  async event void recvDataAvailable(uint8_t channel); 
+
+  command void enableFIFOOverrun();
+  async event void fifoOverrun(uint8_t channel);
+}
diff --git a/tos/chips/pxa27x/cif/HplPXA27XQuickCaptIntC.nc b/tos/chips/pxa27x/cif/HplPXA27XQuickCaptIntC.nc
new file mode 100644
index 00000000..5e9a3bda
--- /dev/null
+++ b/tos/chips/pxa27x/cif/HplPXA27XQuickCaptIntC.nc
@@ -0,0 +1,74 @@
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2005 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Wiring for the PXA27X Quick Capture Interface.
+ * 
+ * @author Konrad Lorincz
+ * @version 1.0 - September 10, 2005
+ */
+ /**                                         
+ * Modified and ported to tinyos-2.x.
+ * 
+ * @author Brano Kusy (branislav.kusy@gmail.com)
+ * @version October 25, 2007
+ */
+ 
+#include "PXA27XQuickCaptInt.h"
+
+configuration HplPXA27XQuickCaptIntC
+{
+    provides interface HplPXA27XQuickCaptInt;
+}
+implementation
+{
+   components HplPXA27XQuickCaptIntM; 
+   HplPXA27XQuickCaptInt = HplPXA27XQuickCaptIntM;
+   
+   components HplPXA27xInterruptM;
+   HplPXA27XQuickCaptIntM.PPID_CIF_Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_CIF];
+
+   components HplPXA27xDMAC;
+   HplPXA27XQuickCaptIntM.pxa_dma -> HplPXA27xDMAC.HplPXA27xDMAChnl[CIF_CHAN];
+
+   components dmaArrayC;
+   HplPXA27XQuickCaptIntM.dmaArray -> dmaArrayC;
+
+   components GeneralIOC;
+   HplPXA27XQuickCaptIntM.LED_PIN -> GeneralIOC.GeneralIO[106];	//A40-29 
+	
+	 components LedsC;
+	 HplPXA27XQuickCaptIntM.Leds -> LedsC;
+}
diff --git a/tos/chips/pxa27x/cif/HplPXA27XQuickCaptIntM.nc b/tos/chips/pxa27x/cif/HplPXA27XQuickCaptIntM.nc
new file mode 100644
index 00000000..f8ddab13
--- /dev/null
+++ b/tos/chips/pxa27x/cif/HplPXA27XQuickCaptIntM.nc
@@ -0,0 +1,313 @@
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2005 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Wiring for the PXA27X Quick Capture Interface.
+ * 
+ * @author Konrad Lorincz
+ * @version 1.0 - September 10, 2005
+ */
+ /**                                         
+ * Modified and ported to tinyos-2.x.
+ * 
+ * @author Brano Kusy (branislav.kusy@gmail.com)
+ * @version October 25, 2007
+ */
+#include "PXA27XQuickCaptInt.h"
+#include "DMA.h"
+#include "dmaArray.h"
+
+module HplPXA27XQuickCaptIntM
+{
+    provides interface HplPXA27XQuickCaptInt;
+    
+    uses interface HplPXA27xInterrupt as PPID_CIF_Irq;
+    uses interface Leds;
+    uses interface GeneralIO as LED_PIN;
+    uses interface dmaArray;
+    uses interface HplPXA27xDMAChnl as pxa_dma;
+}
+implementation
+{
+    
+  DescArray descArray;  
+  void CIF_configurePins();
+  
+  void CIF_init(uint8_t color){ 
+        CIF_configurePins();
+
+        //atomic enabledInterrupts = 0;
+
+        CKEN |= CKEN24_CIF;              // enable the CIF clock
+    
+        call PPID_CIF_Irq.allocate(); // generate an CIF interrupt
+        call PPID_CIF_Irq.enable();   // enable the CIF interrupt mask
+        
+        // ------------------------------------------------------
+        // (1) - Disable the CIF interface
+        call HplPXA27XQuickCaptInt.disableQuick();
+        
+        // (2) - Set the timing/clocks
+        // a. Have the mote supply the MCLK to the camera sensor
+        CICR4 = CICR4_DIV(CICR4, 1);  // Set the MCLK clock rate to 15 MHz
+        CICR4 |= CICR4_MCLK_EN;
+		//was: CICR4 = CICR4_DIV(CICR4, 2);  // Set the MCLK clock rate to 15 MHz
+        // b. Have the camera suply the PCLK to the mote
+        CICR4 |= CICR4_PCLK_EN;
+
+        // c. Set the synchronization signals to be active low
+        //was: CICR4 |= CICR4_HSP;  // HREF is active-low? 
+        //was: CICR4 |= CICR4_VSP;  // VSYNC is active-low
+		// it seems we use active VSP and HSP 
+
+        // (3) - Set the data format (nbr pixels, color space, encoding, etc.)
+		//was: CICR1 = CICR1_DW(CICR1, 4);          // Data Width:  10 bits wide data from the sensor
+        //was: CICR1 = CICR1_COLOR_SP(CICR1, 0);    // Color Space: Raw
+        //was: CICR1 = CICR1_RAW_BPP(CICR1, 2);     // Raw bits per pixel: 10
+        //was: CICR3 = CICR3_LPF(CICR3, (1024-1));  // lines per frame (rows): 1024
+        //was: CICR1 = CICR1_PPL(CICR1, (1280-1));  // pixels per line (cols): 1280            
+  		CICR1 = CICR1_DW(CICR1, 2);     // Data Width:  8 bits wide data from the sensor
+  		CICR1 = CICR1_RGB_BPP(CICR1, 2);  // RGB bits per pixel: 16
+  		CICR1 = CICR1_RAW_BPP(CICR1, 0);  // RAW bits per pixel: 8
+  		CICR3 = CICR3_LPF(CICR3, (240-1));  // lines per frame (height): 240    
+  		if (color == COLOR_RGB565)
+  		{
+  		  CICR1 = CICR1_PPL(CICR1, (320-1));  // pixels per line (width): 320
+  		  CICR1 = CICR1_COLOR_SP(CICR1, 1); // Color Space: RGB
+  		}
+  		else
+  		{
+  		  CICR1 = CICR1_PPL(CICR1, (2*320-1));  // pixels per line (width): 320
+  		  CICR1 = CICR1_COLOR_SP(CICR1, 0); // Color Space: RAW (default)
+  		} 
+        
+        // (4) - FIFO DMA threshold level
+        CIFR = CIFR_THL_0(CIFR, 0);          // 96 bytes of more in FIFO 0 causea a DMA request
+                      
+        // (5) - Initialize the DMA                                                 
+        //CIF_InitDMA();
+                                  
+        // (6) - Enable the CIF with DMA
+        //was: CIF_setAndEnableCICR0(CICR0 | CICR0_DMA_EN);
+      
+  		//new: all CICR0 bits should be set with a single command
+  		CICR0 = ((CICR0 | CICR0_DMA_EN) & ~(CICR0_SOFM)) & ~(CICR0_EOFM); 
+    }
+
+    void CIF_setAndEnableCICR0(uint32_t data)
+    {
+        call HplPXA27XQuickCaptInt.disableQuick();
+        CICR0 = (data | CICR0_EN);
+    }
+    
+    command error_t HplPXA27XQuickCaptInt.init(uint8_t color) 
+    {
+        CIF_init(color); 
+        return SUCCESS;
+    }
+
+    command void HplPXA27XQuickCaptInt.enable()
+    {
+        uint32_t tempCICR0 = CICR0;
+        tempCICR0 |= CICR0_EN;
+        tempCICR0 &= ~(CICR0_DIS); //new
+        CICR0 = tempCICR0;
+    } 
+
+    async command void HplPXA27XQuickCaptInt.disableQuick()
+    {
+        CICR0 &= ~(CICR0_EN);
+        CISR |= CISR_CQD;
+    } 
+
+    async command void HplPXA27XQuickCaptInt.startDMA()
+    {
+        atomic{
+            uint32_t dcsr = call pxa_dma.getDCSR();
+
+            call pxa_dma.setMap(DMAREQ_CIF_RECV_0);
+          	call pxa_dma.setDALGNbit(1);
+            dcsr &= ~(DCSR_RUN);
+            dcsr &= ~(DCSR_NODESCFETCH);
+            call pxa_dma.setDCSR(dcsr);
+            call pxa_dma.setDDADR((uint32_t)call dmaArray.array_get(&descArray, 0) );
+            call pxa_dma.setDCSR((call pxa_dma.getDCSR()) | DCSR_RUN );
+        }
+    }
+
+    command error_t HplPXA27XQuickCaptInt.setImageSize(uint16_t sizeX, uint16_t sizeY, uint8_t colorType)
+    {
+    if (sizeX > 2048 || sizeY > 2048)
+      return FAIL;
+
+    // (1) - Set the Quick Capture Interface Size
+    //was: call HplPXA27XQuickCaptInt.disableQuick();
+    CICR3 = CICR3_LPF(CICR3, (sizeY-1));
+    //was: CICR1 = CICR1_PPL(CICR1, (sizeX-1));
+    if (colorType == COLOR_RGB565) 
+      CICR1 = CICR1_PPL(CICR1, (sizeX-1));
+    else 
+      CICR1 = CICR1_PPL(CICR1, (2*sizeX-1));
+ 
+    //was: call HplPXA27XQuickCaptInt.enable();
+
+    // (2) - Set the DMA transfer size
+    //was: nbrBytesToTransfer = sizeX*sizeY*2;  // each pixel is 2 bytes
+
+    return SUCCESS;
+    }
+
+    command void HplPXA27XQuickCaptInt.initDMA(uint32_t num_bytes, void *buf) //CIF_InitDMA() 
+    {
+			call dmaArray.init(&descArray, num_bytes, CIBR0_ADDR, buf);
+    }
+
+    command void HplPXA27XQuickCaptInt.disableStartOfFrame()      {CIF_setAndEnableCICR0(CICR0 | CICR0_SOFM);}
+    command void HplPXA27XQuickCaptInt.enableStartOfFrame()       {CIF_setAndEnableCICR0(CICR0 & ~(CICR0_SOFM));}
+    command void HplPXA27XQuickCaptInt.enableEndOfFrame()         {CIF_setAndEnableCICR0(CICR0 & ~(CICR0_EOFM));}
+    command void HplPXA27XQuickCaptInt.enableEndOfLine()          {CIF_setAndEnableCICR0(CICR0 & ~(CICR0_EOLM));}
+    command void HplPXA27XQuickCaptInt.enableRecvDataAvailable()  {CIF_setAndEnableCICR0(CICR0 & ~(CICR0_RDAVM));}
+    command void HplPXA27XQuickCaptInt.enableFIFOOverrun()        {CIF_setAndEnableCICR0(CICR0 & ~(CICR0_FOM));}
+
+  default async event void HplPXA27XQuickCaptInt.startOfFrame() { return;}
+  default async event void HplPXA27XQuickCaptInt.endOfFrame() { return;}
+  default async event void HplPXA27XQuickCaptInt.endOfLine() { return;}
+  default async event void HplPXA27XQuickCaptInt.recvDataAvailable(uint8_t channel) { return;}
+  default async event void HplPXA27XQuickCaptInt.fifoOverrun(uint8_t channel) { return;}
+
+    async event void PPID_CIF_Irq.fired() 
+    {            
+      
+        //atomic{printfUART(">>>>>>>>>>>>>>> PPID_CIF_Irq.fired() >>>>>>>>>>>\n", "");}
+        volatile uint32_t tempCISR;
+
+        atomic {  tempCISR = CISR; }
+        // Start-Of-Frame
+        if ((tempCISR & CISR_SOF) && (~(CICR0) & CICR0_SOFM)) {
+            atomic CISR |= CISR_SOF;
+            signal HplPXA27XQuickCaptInt.startOfFrame();
+            // this disables CIF after the current frame capture is done 
+            CICR0 |= CICR0_DIS;		
+        }
+        // End-Of-Frame
+        if ((tempCISR & CISR_EOF) && (~(CICR0) & CICR0_EOFM)) {
+            atomic CISR |= CISR_EOF;
+            signal HplPXA27XQuickCaptInt.endOfFrame();
+            return;           
+        }
+        // End-Of-Line
+        if ((tempCISR & CISR_EOL) && (~(CICR0) & CICR0_EOLM)) {
+            atomic CISR |= CISR_EOL;
+            signal HplPXA27XQuickCaptInt.endOfLine();
+        }
+        // Receive-Data-Available
+        if (~(CICR0) & CICR0_RDAVM) {
+            if (tempCISR & CISR_RDAV_2) {  // channel 2
+                atomic CISR |= CISR_RDAV_2;
+                signal HplPXA27XQuickCaptInt.recvDataAvailable(2);        
+            }
+            if (tempCISR & CISR_RDAV_1) {  // channel 1
+                atomic CISR |= CISR_RDAV_1;
+                signal HplPXA27XQuickCaptInt.recvDataAvailable(1);        
+            }
+            if (tempCISR & CISR_RDAV_0) {  // channel 0
+                atomic CISR |= CISR_RDAV_0;
+                signal HplPXA27XQuickCaptInt.recvDataAvailable(0);
+            }
+        }  
+        // FIFO Overrun
+        if (~(CICR0) & CICR0_FOM) {
+            if (tempCISR & CISR_IFO_2) {  // channel 2
+                atomic CISR |= CISR_IFO_2;
+                signal HplPXA27XQuickCaptInt.fifoOverrun(2);        
+            }
+            if (tempCISR & CISR_IFO_1) {  // channel 1
+                atomic CISR |= CISR_IFO_1;
+                signal HplPXA27XQuickCaptInt.fifoOverrun(1);        
+            }
+            if (tempCISR & CISR_IFO_0) {  // channel 0
+                atomic CISR |= CISR_IFO_0;
+                signal HplPXA27XQuickCaptInt.fifoOverrun(0);
+            }
+        }  
+
+    }
+
+    void CIF_configurePins()
+    {
+        // (1) - Configure the GPIO Alt functions and direction
+        // --- Template ----
+        //_GPIO_setaltfn(PIN, PIN_ALTFN);
+        //_GPDR(PIN) &= ~_GPIO_bit(PIN);  // input
+        //_GPDR(PIN) |= _GPIO_bit(PIN);   // output
+        // -----------------
+        
+
+     	_GPIO_setaltfn(PIN_CIF_MCLK, PIN_CIF_MCLK_ALTFN);
+    	_GPIO_setaltfn(PIN_CIF_PCLK, PIN_CIF_PCLK_ALTFN);
+    	_GPIO_setaltfn(PIN_CIF_FV, PIN_CIF_FV_ALTFN);
+    	_GPIO_setaltfn(PIN_CIF_LV, PIN_CIF_LV_ALTFN);
+    
+    	_GPIO_setaltfn(PIN_CIF_DD0, PIN_CIF_DD0_ALTFN);
+    	_GPIO_setaltfn(PIN_CIF_DD1, PIN_CIF_DD1_ALTFN);
+    	_GPIO_setaltfn(PIN_CIF_DD2, PIN_CIF_DD2_ALTFN);
+    	_GPIO_setaltfn(PIN_CIF_DD3, PIN_CIF_DD3_ALTFN);
+    	_GPIO_setaltfn(PIN_CIF_DD4, PIN_CIF_DD4_ALTFN);
+    	_GPIO_setaltfn(PIN_CIF_DD5, PIN_CIF_DD5_ALTFN);
+    	_GPIO_setaltfn(PIN_CIF_DD6, PIN_CIF_DD6_ALTFN);
+    	_GPIO_setaltfn(PIN_CIF_DD7, PIN_CIF_DD7_ALTFN);
+    
+    	GPDR(PIN_CIF_MCLK) |= _GPIO_bit(PIN_CIF_MCLK);   // output (if sensor is master)
+    	GPDR(PIN_CIF_PCLK) &= ~_GPIO_bit(PIN_CIF_PCLK);  // input (if sensor is master)
+    	GPDR(PIN_CIF_FV) &= ~_GPIO_bit(PIN_CIF_FV);  // input (if sensor is master)
+    	GPDR(PIN_CIF_LV) &= ~_GPIO_bit(PIN_CIF_LV);  // input (if sensor is master)
+    	GPDR(PIN_CIF_DD0) &= ~_GPIO_bit(PIN_CIF_DD0);  // input
+    	GPDR(PIN_CIF_DD1) &= ~_GPIO_bit(PIN_CIF_DD1);  // input
+    	GPDR(PIN_CIF_DD2) &= ~_GPIO_bit(PIN_CIF_DD2);  // input
+    	GPDR(PIN_CIF_DD3) &= ~_GPIO_bit(PIN_CIF_DD3);  // input
+    	GPDR(PIN_CIF_DD4) &= ~_GPIO_bit(PIN_CIF_DD4);  // input
+    	GPDR(PIN_CIF_DD5) &= ~_GPIO_bit(PIN_CIF_DD5);  // input
+    	GPDR(PIN_CIF_DD6) &= ~_GPIO_bit(PIN_CIF_DD6);  // input
+    	GPDR(PIN_CIF_DD7) &= ~_GPIO_bit(PIN_CIF_DD7);  // input
+    }
+		
+		async event void pxa_dma.interruptDMA(){
+	    call pxa_dma.setDCMD(0);
+	    call pxa_dma.setDCSR(DCSR_EORINT | DCSR_ENDINTR
+						| DCSR_STARTINTR | DCSR_BUSERRINTR);
+    }
+
+}
+
diff --git a/tos/chips/pxa27x/cif/PXA27XQuickCaptInt.h b/tos/chips/pxa27x/cif/PXA27XQuickCaptInt.h
new file mode 100644
index 00000000..e1a9a555
--- /dev/null
+++ b/tos/chips/pxa27x/cif/PXA27XQuickCaptInt.h
@@ -0,0 +1,113 @@
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2005 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Konrad Lorincz
+ * @version 1.0, August 15, 2005
+ */
+/**
+ * @brief Ported to TOS2
+ * @author Brano Kusy (branislav.kusy@gmail.com)
+ */ 
+#ifndef PXA27XQuickCaptInt_H
+#define PXA27XQuickCaptInt_H
+
+/******************************************************************************/
+// Configure the GPIO Alt functions and directions
+// Note:
+//  - In Sensor Master-Parallel mode, CIF_FV and CIF_LV are set to INPUTS
+//  - In Sensor  Slave-Parallel mode, CIF_FV and CIF_LV are set to OUTPUTS
+// Configure the GPIO Alt Functions and Directions
+//     --- Template ----
+//     _GPIO_setaltfn(PIN, PIN_ALTFN);
+//     _GPDR(PIN) &= ~_GPIO_bit(PIN);  // input
+//     _GPDR(PIN) |= _GPIO_bit(PIN);   // output
+//     -----------------
+/******************************************************************************/
+
+// (1) - Define the Pin mappings  (options are listed as <GPIO_PIN#, IN/OUT, ALT_FN#> 
+#define PIN_CIF_MCLK            53      // <23,O,1> <42,O,3> <53,O,2>
+#define PIN_CIF_MCLK_ALTFN       2
+#define PIN_CIF_PCLK            54      // <26,I,2> <45,I,3> <54,I,3>
+#define PIN_CIF_PCLK_ALTFN       3
+#define PIN_CIF_FV              84      // <24,I,1> <24,O,1> <43,I,3> <43,O,3> <84,I,3> <84,O,3>
+#define PIN_CIF_FV_ALTFN         3
+#define PIN_CIF_LV              85      // <25,I,1> <25,O,1> <44,I,3> <44,O,3> <85,I,3> <85,O,3>
+#define PIN_CIF_LV_ALTFN         3
+
+#define PIN_CIF_DD0              81  //   <27,I,3>    <47,I,1>    <81,I,2>    <98,I,2>
+#define PIN_CIF_DD0_ALTFN         2    // SSPEXTCLK   STD_TXD     BB_OB_DAT0  FF_RTS
+                                       // CIF_DD0                             KP_DKIN5
+                                       // GPIO27_LED_B
+#define PIN_CIF_DD1              55  //   <55,I,1>    <105,I,1>   <114*,I,1>
+#define PIN_CIF_DD1_ALTFN         1    // BB_IB_DAT1  KP_MKOUT2   CC2420_FIFO
+                                       // NPREG                   UVS0
+
+#define PIN_CIF_DD2              51  //   <51,I,1>    <104,I,1>   <116*,I,1>
+#define PIN_CIF_DD2_ALTFN         1    // BB_OB_DAT3  KP_MKOUT1   CC2420_CCA
+                                       //                         U_DET
+
+#define PIN_CIF_DD3              50  //   <50,I,1>    <103,I,1>   <115*,I,2>
+#define PIN_CIF_DD3_ALTFN         1    // BB_OB_DAT2  KP_MKOUT0   CC2420_VREG_EN
+                                       // NPIOR                   U_EN
+
+#define PIN_CIF_DD4              52  //   <52,I,1>    <83,I,3>    <90,I,3>    <95,I,2>
+#define PIN_CIF_DD4_ALTFN         1    // BB_OB_CLK   BB_IB_CLK   NURST       KP_DKIN2
+                                       //                                     GPIO95_LED_R
+
+#define PIN_CIF_DD5              48  //   <48,I,1>    <82,I,3>    <91,I,3>    <94,I,2>
+#define PIN_CIF_DD5_ALTFN         1    // BB_OB_DAT1  BB_IB_DAT0  UCLK        KP_DKIN1
+                                       //                                     GPIO94_D_CARD
+
+#define PIN_CIF_DD6              17  //   <17,I,2>    <93,I,2>
+#define PIN_CIF_DD6_ALTFN         2    // CIF_DD6     KP_DKIN0
+                                       // PWM_OUT_1   GPIO93_D_CARD
+
+#define PIN_CIF_DD7              12  //   <12,I,2>    <108,I,1>
+#define PIN_CIF_DD7_ALTFN         2    // CIF_DD7     KP_MKOUT5
+                                       // 48MHz
+
+//#define PIN_CIF_DD8             107  //   <107,I,1>
+//#define PIN_CIF_DD8_ALTFN         1    // CIF_DD8
+// KP_MKOUT4
+//#define PIN_CIF_DD9             106  //   <106,I,1>
+//#define PIN_CIF_DD9_ALTFN         1    // CIF_DD9 
+
+// ===================================================================
+#define CIF_CHAN  (11)
+#define CIBR0_ADDR  (0x50000028)
+#define CICR0_DIS       (1 << 27)	/* Quick Capture Interface Disable */  
+
+#endif
diff --git a/tos/chips/pxa27x/cif/dmaArray.h b/tos/chips/pxa27x/cif/dmaArray.h
new file mode 100644
index 00000000..2822db87
--- /dev/null
+++ b/tos/chips/pxa27x/cif/dmaArray.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2005 Yale University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above
+ *    copyright notice, this list of conditions and the following
+ *    disclaimer in the documentation and/or other materials provided
+ *    with the distribution.
+ * 3. All advertising materials mentioning features or use of this
+ *    software must display the following acknowledgement:
+ *       This product includes software developed by the Embedded Networks
+ *       and Applications Lab (ENALAB) at Yale University.
+ * 4. Neither the name of the University nor that of the Laboratory
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY YALE UNIVERSITY AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */ 
+ /**
+ * @brief dma array operations
+ * @author Andrew Barton-Sweeney (abs@cs.yale.edu)
+ * @author Thiago Teixeira
+ */
+ /**                                         
+ * Modified and ported to tinyos-2.x.
+ * 
+ * @author Brano Kusy (branislav.kusy@gmail.com)
+ * @version October 25, 2007
+ */
+#ifndef _DMA_ARRAY_H
+#define _DMA_ARRAY_H
+
+typedef struct {
+    uint32_t DDADR;
+    uint32_t DSADR;
+    uint32_t DTADR;
+    uint32_t DCMD;
+} DMADescriptor_t;
+
+
+#define MAX_DESC_TRANSFER  8184		// max is 8K-1, CIF requires a multiple of 8	//8192
+
+// ----------------------------------------------
+#define DescArray_NBR_DESC         100//8
+#define DescArray_BYTE_ALLIGNMENT  16
+#define DescArray_BUFFER_SIZE      (DescArray_NBR_DESC*sizeof(DMADescriptor_t) + DescArray_BYTE_ALLIGNMENT)
+
+typedef struct DescArray
+{
+    uint8_t data[DescArray_BUFFER_SIZE];   // The data is alligned from data[baseIndex]
+} DescArray;
+
+#endif //_DMA_ARRAY_H
diff --git a/tos/chips/pxa27x/cif/dmaArray.nc b/tos/chips/pxa27x/cif/dmaArray.nc
new file mode 100644
index 00000000..08357e97
--- /dev/null
+++ b/tos/chips/pxa27x/cif/dmaArray.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005 Yale University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above
+ *    copyright notice, this list of conditions and the following
+ *    disclaimer in the documentation and/or other materials provided
+ *    with the distribution.
+ * 3. All advertising materials mentioning features or use of this
+ *    software must display the following acknowledgement:
+ *       This product includes software developed by the Embedded Networks
+ *       and Applications Lab (ENALAB) at Yale University.
+ * 4. Neither the name of the University nor that of the Laboratory
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY YALE UNIVERSITY AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */ 
+ /**
+ * @brief dma array operations
+ * @author Andrew Barton-Sweeney (abs@cs.yale.edu)
+ * @author Thiago Teixeira
+ */
+ /**                                         
+ * Modified and ported to tinyos-2.x.
+ * 
+ * @author Brano Kusy (branislav.kusy@gmail.com)
+ * @version October 25, 2007
+ */
+#include "DMA.h"
+
+interface dmaArray{
+	async command uint32_t array_getBaseIndex(DescArray *DAPtr);
+	async command DMADescriptor_t* array_get(DescArray *DAPtr, uint8_t descIndex);
+	command void init(DescArray *DAPtr, uint32_t num_bytes, uint32_t sourceAddr, void *buf);
+	command void setSourceAddr(DMADescriptor_t* descPtr, uint32_t val);
+	command void setTargetAddr(DMADescriptor_t* descPtr, uint32_t val);
+	command void enableSourceAddrIncrement(DMADescriptor_t* descPtr, bool enable);
+	command void enableTargetAddrIncrement(DMADescriptor_t* descPtr, bool enable);
+	command void enableSourceFlowControl(DMADescriptor_t* descPtr, bool enable);
+	command void enableTargetFlowControl(DMADescriptor_t* descPtr, bool enable);
+	command void setMaxBurstSize(DMADescriptor_t* descPtr, DMAMaxBurstSize_t size);
+	command void setTransferLength(DMADescriptor_t* descPtr, uint16_t length);
+	command void setTransferWidth(DMADescriptor_t* descPtr, DMATransferWidth_t width);
+}
diff --git a/tos/chips/pxa27x/cif/dmaArrayC.nc b/tos/chips/pxa27x/cif/dmaArrayC.nc
new file mode 100644
index 00000000..f4bbeb1a
--- /dev/null
+++ b/tos/chips/pxa27x/cif/dmaArrayC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2005 Yale University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above
+ *    copyright notice, this list of conditions and the following
+ *    disclaimer in the documentation and/or other materials provided
+ *    with the distribution.
+ * 3. All advertising materials mentioning features or use of this
+ *    software must display the following acknowledgement:
+ *       This product includes software developed by the Embedded Networks
+ *       and Applications Lab (ENALAB) at Yale University.
+ * 4. Neither the name of the University nor that of the Laboratory
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY YALE UNIVERSITY AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */ 
+ /**
+ * @brief dma array operations
+ * @author Andrew Barton-Sweeney (abs@cs.yale.edu)
+ * @author Thiago Teixeira
+ */
+ /**                                         
+ * Modified and ported to tinyos-2.x.
+ * 
+ * @author Brano Kusy (branislav.kusy@gmail.com)
+ * @version October 25, 2007
+ */
+configuration dmaArrayC{
+    provides interface dmaArray;
+}
+
+implementation
+{
+	components dmaArrayM;
+	dmaArray = dmaArrayM;
+}
diff --git a/tos/chips/pxa27x/cif/dmaArrayM.nc b/tos/chips/pxa27x/cif/dmaArrayM.nc
new file mode 100644
index 00000000..8d5ba1e6
--- /dev/null
+++ b/tos/chips/pxa27x/cif/dmaArrayM.nc
@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2005 Yale University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above
+ *    copyright notice, this list of conditions and the following
+ *    disclaimer in the documentation and/or other materials provided
+ *    with the distribution.
+ * 3. All advertising materials mentioning features or use of this
+ *    software must display the following acknowledgement:
+ *       This product includes software developed by the Embedded Networks
+ *       and Applications Lab (ENALAB) at Yale University.
+ * 4. Neither the name of the University nor that of the Laboratory
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY YALE UNIVERSITY AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */ 
+ /**
+ * @brief dma array operations
+ * @author Andrew Barton-Sweeney (abs@cs.yale.edu)
+ * @author Thiago Teixeira
+ */
+ /**                                         
+ * Modified and ported to tinyos-2.x.
+ * 
+ * @author Brano Kusy (branislav.kusy@gmail.com)
+ * @version October 25, 2007
+ */
+
+module dmaArrayM{
+    provides interface dmaArray;
+}
+
+implementation
+{
+	  async command uint32_t dmaArray.array_getBaseIndex(DescArray *DAPtr)
+	  {
+	    uint32_t addr = (uint32_t) (&DAPtr->data[0]);
+	    return DescArray_BYTE_ALLIGNMENT - (addr % DescArray_BYTE_ALLIGNMENT);
+	  }
+	  
+	  async command DMADescriptor_t* dmaArray.array_get(DescArray *DAPtr, uint8_t descIndex)
+	  {
+	    uint32_t baseIndex = call dmaArray.array_getBaseIndex(DAPtr);
+	    return (DMADescriptor_t*)&DAPtr->data[baseIndex + descIndex*sizeof(DMADescriptor_t)];
+	  }
+
+    command void dmaArray.init(DescArray *DAPtr, 
+    														uint32_t num_bytes, 
+    														uint32_t sourceAddr, 
+    														void *buf)
+    {
+        uint8_t i = 0;
+        DMADescriptor_t* descPtr = NULL;
+        //was: uint32_t bytesLeftToSchedule = nbrBytesToTransfer;
+        uint32_t bytesLeftToSchedule = num_bytes;
+        uint32_t image_data = (uint32_t) buf;
+
+        for (i = 0; bytesLeftToSchedule > 0; ++i) {
+            descPtr = call dmaArray.array_get(DAPtr, i);
+
+            call dmaArray.setSourceAddr(descPtr, sourceAddr);
+            //was: call dmaArray.setTargetAddr(descPtr, &image.data[ i*(MAX_DESC_TRANSFER/4) ]);
+            call dmaArray.setTargetAddr(descPtr, image_data + i*MAX_DESC_TRANSFER ); 
+            call dmaArray.enableSourceAddrIncrement(descPtr, FALSE);
+            call dmaArray.enableTargetAddrIncrement(descPtr, TRUE);
+            call dmaArray.enableSourceFlowControl(descPtr, TRUE);
+            call dmaArray.enableTargetFlowControl(descPtr, FALSE);
+            call dmaArray.setMaxBurstSize(descPtr, 3);      // burst size: can be 8, 16, or 32 bytes
+            call dmaArray.setTransferWidth(descPtr, 3);     // peripheral width for DMA transactions from CIF is always 8-bytes, regardless of DCMD[WIDTH]
+            
+            if (bytesLeftToSchedule >= MAX_DESC_TRANSFER) {
+                call dmaArray.setTransferLength(descPtr, MAX_DESC_TRANSFER);  // 16*8 *2 =256 bytes // must be an integer multiple of 8-bytes
+                bytesLeftToSchedule -= MAX_DESC_TRANSFER;
+            }
+            else {
+                call dmaArray.setTransferLength(descPtr, bytesLeftToSchedule);
+                bytesLeftToSchedule = 0;
+            }
+
+            // continue running the next descriptor
+            descPtr->DDADR = (uint32_t)call dmaArray.array_get(DAPtr, i+1);
+        }
+
+        // Set the stop bit for the last descriptor
+        descPtr->DDADR |= DDADR_STOP;
+    }
+
+    command void dmaArray.setSourceAddr(DMADescriptor_t* descPtr, uint32_t val)
+    {
+        atomic{ descPtr->DSADR = val; }
+    }
+
+    command void dmaArray.setTargetAddr(DMADescriptor_t* descPtr, uint32_t val)
+    {
+        atomic{ descPtr->DTADR = val; }
+    }
+    
+    command void dmaArray.enableSourceAddrIncrement(DMADescriptor_t* descPtr, bool enable)
+    {
+        atomic{ descPtr->DCMD = (enable == TRUE) ? descPtr->DCMD | DCMD_INCSRCADDR : descPtr->DCMD & ~DCMD_INCSRCADDR; }
+    }
+
+    command void dmaArray.enableTargetAddrIncrement(DMADescriptor_t* descPtr, bool enable)
+    {
+        atomic{ descPtr->DCMD = (enable == TRUE) ? descPtr->DCMD | DCMD_INCTRGADDR : descPtr->DCMD & ~DCMD_INCTRGADDR; }
+    }
+
+    command void dmaArray.enableSourceFlowControl(DMADescriptor_t* descPtr, bool enable)
+    {
+        atomic{descPtr->DCMD = (enable == TRUE) ? descPtr->DCMD | DCMD_FLOWSRC : descPtr->DCMD & ~DCMD_FLOWSRC;}
+    }
+  
+    command void dmaArray.enableTargetFlowControl(DMADescriptor_t* descPtr, bool enable)
+    {
+        atomic{descPtr->DCMD = (enable == TRUE) ? descPtr->DCMD | DCMD_FLOWTRG : descPtr->DCMD & ~DCMD_FLOWTRG;}
+    } 
+  
+    command void dmaArray.setMaxBurstSize(DMADescriptor_t* descPtr, DMAMaxBurstSize_t size)
+    {
+				if(size >= DMA_BURST_SIZE_8BYTES && size <= DMA_BURST_SIZE_32BYTES){
+        //if(size >= DMA_BURST_SIZE_8BYTES && size <= DMA_BURST_SIZE_32BYTES){
+            atomic{
+              //clear it out since otherwise |'ing doesn't work so well
+              descPtr->DCMD &= ~DCMD_MAXSIZE;  
+              descPtr->DCMD |= DCMD_SIZE(size); 
+            }
+        }        
+    }
+  
+    command void dmaArray.setTransferLength(DMADescriptor_t* descPtr, uint16_t length)
+    {
+        uint16_t currentLength;
+        currentLength = (length < MAX_DESC_TRANSFER) ? length : MAX_DESC_TRANSFER;
+				//was: currentLength = (length<8192) ? length: 8190;
+        atomic{
+            descPtr->DCMD &= ~DCMD_MAXLEN; 
+            descPtr->DCMD |= DCMD_LEN(currentLength); 
+        }
+    }
+  
+    command void dmaArray.setTransferWidth(DMADescriptor_t* descPtr, DMATransferWidth_t width)
+    {
+        atomic{
+          //clear it out since otherwise |'ing doesn't work so well
+          descPtr->DCMD &= ~DCMD_MAXWIDTH; 
+          descPtr->DCMD |= DCMD_WIDTH(width);
+      }        
+    }
+
+}
diff --git a/tos/chips/pxa27x/dma/DMA.h b/tos/chips/pxa27x/dma/DMA.h
new file mode 100644
index 00000000..fd9aaaa1
--- /dev/null
+++ b/tos/chips/pxa27x/dma/DMA.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#ifndef _DMA_H
+#define _DMA_H
+
+typedef uint8_t DMAPeripheralID_t;
+typedef uint8_t DMAPriority_t;
+
+typedef enum {
+  DMA_BURST_SIZE_8BYTES,
+  DMA_BURST_SIZE_16BYTES,
+  DMA_BURST_SIZE_32BYTES,
+} DMAMaxBurstSize_t;
+
+typedef enum {
+  DMA_WIDTH_1BYTE,
+  DMA_WIDTH_2BYTES,
+  DMA_WIDTH_4BYTES,
+} DMATransferWidth_t;
+
+#endif /* _DMA_H */
diff --git a/tos/chips/pxa27x/dma/HalPXA27xDMAChannel.nc b/tos/chips/pxa27x/dma/HalPXA27xDMAChannel.nc
new file mode 100644
index 00000000..f612fef6
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HalPXA27xDMAChannel.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "DMA.h"
+
+interface HalPXA27xDMAChannel 
+{
+  
+  command error_t requestChannel(DMAPeripheralID_t peripheralID, 
+				  DMAPriority_t priority, bool permanent);
+  event error_t requestChannelDone();
+  command error_t returnChannel(DMAPeripheralID_t peripheralID);
+  
+  command error_t setSourceAddr(uint32_t val);
+  command error_t setTargetAddr(uint32_t val);
+  command error_t enableSourceAddrIncrement(bool enable);
+  command error_t enableTargetAddrIncrement(bool enable);
+  command error_t enableSourceFlowControl(bool enable);
+  command error_t enableTargetFlowControl(bool enable);
+  command error_t setMaxBurstSize(DMAMaxBurstSize_t size);
+  command error_t setTransferLength(uint16_t length);
+  command error_t setTransferWidth(DMATransferWidth_t width);
+  command error_t run(bool InterruptEn);
+  command error_t stop();
+  async event void Interrupt();
+}
diff --git a/tos/chips/pxa27x/dma/HalPXA27xDMAChannelC.nc b/tos/chips/pxa27x/dma/HalPXA27xDMAChannelC.nc
new file mode 100644
index 00000000..f4d6afd3
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HalPXA27xDMAChannelC.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+configuration HalPXA27xDMAChannelC {
+  provides interface HalPXA27xDMAChannel[uint8_t chnl];
+}
+
+implementation {
+  components HplPXA27xDMAC, HalPXA27xDMAChannelM;
+
+  HalPXA27xDMAChannel = HalPXA27xDMAChannelM;
+  HalPXA27xDMAChannelM.HplPXA27xDMAChnl -> HplPXA27xDMAC;
+  HalPXA27xDMAChannelM.HplPXA27xDMACntl -> HplPXA27xDMAC;
+}
diff --git a/tos/chips/pxa27x/dma/HalPXA27xDMAChannelM.nc b/tos/chips/pxa27x/dma/HalPXA27xDMAChannelM.nc
new file mode 100644
index 00000000..4bfdc475
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HalPXA27xDMAChannelM.nc
@@ -0,0 +1,214 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "DMA.h"
+
+module HalPXA27xDMAChannelM {
+  provides interface HalPXA27xDMAChannel[uint8_t chnl];
+
+  uses interface HplPXA27xDMACntl;
+  uses interface HplPXA27xDMAChnl[uint8_t chnl];
+}
+
+implementation {
+  uint8_t requestedChannel;
+  task void reqCompleteTask() {
+    signal HalPXA27xDMAChannel.requestChannelDone[requestedChannel]();
+  }
+  
+  command error_t HalPXA27xDMAChannel.requestChannel[uint8_t chnl](DMAPeripheralID_t peripheralID, DMAPriority_t priority, bool permanent) {
+    // priority is decided based on which channel you pick (PXADEV 5-4)
+    // permanent? nothing lasts forever my friend
+
+    uint32_t valDRCMR;
+    valDRCMR = call HplPXA27xDMACntl.getDRCMR(peripheralID) | DRCMR_MAPVLD;
+    valDRCMR = valDRCMR & ~DRCMR_CHLNUM(0x1F);
+    valDRCMR |= DRCMR_CHLNUM(chnl);
+    call HplPXA27xDMACntl.setDRCMR(peripheralID, valDRCMR);
+    requestedChannel = chnl;
+    post reqCompleteTask();
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xDMAChannel.returnChannel[uint8_t chnl](DMAPeripheralID_t peripheralID) {
+    // modified interface to require peripheralID, this isn't virtualized
+    uint32_t valDRCMR;
+    valDRCMR = call HplPXA27xDMACntl.getDRCMR(peripheralID) & ~DRCMR_MAPVLD;
+    call HplPXA27xDMACntl.setDRCMR(peripheralID, valDRCMR);
+    return SUCCESS;
+  }
+  
+  command error_t HalPXA27xDMAChannel.setSourceAddr[uint8_t chnl](uint32_t val) {
+    call HplPXA27xDMAChnl.setDSADR[chnl](val);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xDMAChannel.setTargetAddr[uint8_t chnl](uint32_t val) {
+    call HplPXA27xDMAChnl.setDTADR[chnl](val);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xDMAChannel.enableSourceAddrIncrement[uint8_t chnl](bool enable) {
+    uint32_t valDCMD;
+    valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl]();
+    
+    valDCMD = (enable) ? (valDCMD | DCMD_INCSRCADDR) : (valDCMD & ~DCMD_INCSRCADDR);
+
+    call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xDMAChannel.enableTargetAddrIncrement[uint8_t chnl](bool enable) {
+    uint32_t valDCMD;
+    valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl]();
+    
+    valDCMD = (enable) ? (valDCMD | DCMD_INCTRGADDR) : (valDCMD & ~DCMD_INCTRGADDR);
+
+    call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD);
+    return SUCCESS; 
+  }
+
+  command error_t HalPXA27xDMAChannel.enableSourceFlowControl[uint8_t chnl](bool enable) {
+    uint32_t valDCMD;
+    valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl]();
+    
+    valDCMD = (enable) ? (valDCMD | DCMD_FLOWSRC) : (valDCMD & ~DCMD_FLOWSRC);
+
+    call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD);
+    return SUCCESS; 
+  }
+
+  command error_t HalPXA27xDMAChannel.enableTargetFlowControl[uint8_t chnl](bool enable) {
+    uint32_t valDCMD;
+    valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl]();
+    
+    valDCMD = (enable) ? (valDCMD | DCMD_FLOWTRG) : (valDCMD & ~DCMD_FLOWTRG);
+
+    call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD);
+    return SUCCESS; 
+  }
+
+  command error_t HalPXA27xDMAChannel.setMaxBurstSize[uint8_t chnl](DMAMaxBurstSize_t size) {
+    uint32_t valDCMD;
+    valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl]();
+    valDCMD &= ~DCMD_BURST32; // zero the bits first
+
+    switch(size) {
+    case DMA_BURST_SIZE_8BYTES:
+      valDCMD |= DCMD_BURST8;
+      break;
+    case DMA_BURST_SIZE_16BYTES:
+      valDCMD |= DCMD_BURST16;
+      break;
+    case DMA_BURST_SIZE_32BYTES:
+      valDCMD |= DCMD_BURST32;
+      break;
+    default:
+      return FAIL;
+    }
+    
+    call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD);
+    return SUCCESS; 
+  }
+
+  command error_t HalPXA27xDMAChannel.setTransferLength[uint8_t chnl](uint16_t length) {
+    uint32_t valDCMD;
+    valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl]();
+    
+    if(length > DCMD_MAXLEN)
+      return FAIL;
+
+    valDCMD &= ~DCMD_MAXLEN; // zero the bits first
+    valDCMD |= DCMD_LEN(length);
+    
+    call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xDMAChannel.setTransferWidth[uint8_t chnl](DMATransferWidth_t width) {
+    uint32_t valDCMD;
+    valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl]();
+    valDCMD &= ~DCMD_WIDTH4; // zero the bits first
+
+    switch(width) {
+    case DMA_WIDTH_1BYTE:
+      valDCMD |= DCMD_WIDTH1;
+      break;
+    case DMA_WIDTH_2BYTES:
+      valDCMD |= DCMD_WIDTH2;
+      break;
+    case DMA_WIDTH_4BYTES:
+      valDCMD |= DCMD_WIDTH4;
+      break;
+    default:
+      return FAIL;
+    }
+    
+    call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD);
+    return SUCCESS;     
+  }
+
+  command error_t HalPXA27xDMAChannel.run[uint8_t chnl](bool InterruptEn) {
+    uint32_t valDCSR;
+    uint32_t valDCMD;
+    valDCSR = call HplPXA27xDMAChnl.getDCSR[chnl]();
+    valDCMD = call HplPXA27xDMAChnl.getDCMD[chnl]();
+
+    valDCMD = (InterruptEn) ? valDCMD | DCMD_ENDIRQEN : valDCSR & ~DCMD_ENDIRQEN;
+    
+    call HplPXA27xDMAChnl.setDCMD[chnl](valDCMD);
+    call HplPXA27xDMAChnl.setDCSR[chnl](valDCSR | DCSR_RUN | DCSR_NODESCFETCH);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xDMAChannel.stop[uint8_t chnl]() {
+    uint32_t valDCSR;
+    valDCSR = call HplPXA27xDMAChnl.getDCSR[chnl]();
+    
+    call HplPXA27xDMAChnl.setDCSR[chnl](valDCSR & ~DCSR_RUN);
+    return SUCCESS;
+  }
+
+  async event void HplPXA27xDMAChnl.interruptDMA[uint8_t chnl]() {
+    // might want to clear interrupt first
+    // ...
+
+    signal HalPXA27xDMAChannel.Interrupt[chnl]();
+  }
+
+  default async event void HalPXA27xDMAChannel.Interrupt[uint8_t chnl]() { }
+  default event error_t HalPXA27xDMAChannel.requestChannelDone[uint8_t chnl]() { return FAIL; }
+}
diff --git a/tos/chips/pxa27x/dma/HplPXA27xDMAC.nc b/tos/chips/pxa27x/dma/HplPXA27xDMAC.nc
new file mode 100644
index 00000000..892eb064
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HplPXA27xDMAC.nc
@@ -0,0 +1,87 @@
+/* $Id: HplPXA27xDMAC.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+configuration HplPXA27xDMAC
+{
+  provides {
+    interface HplPXA27xDMACntl;
+    interface HplPXA27xDMAChnl[uint8_t chnl];
+  }
+}
+implementation
+{
+  components HplPXA27xDMAM;
+  components HplPXA27xInterruptM;
+  components PlatformP;
+  
+  HplPXA27xDMACntl = HplPXA27xDMAM;
+
+  HplPXA27xDMAChnl[0] = HplPXA27xDMAM.HplPXA27xDMAChnl[0];
+  HplPXA27xDMAChnl[1] = HplPXA27xDMAM.HplPXA27xDMAChnl[1];
+  HplPXA27xDMAChnl[2] = HplPXA27xDMAM.HplPXA27xDMAChnl[2];
+  HplPXA27xDMAChnl[3] = HplPXA27xDMAM.HplPXA27xDMAChnl[3];
+  HplPXA27xDMAChnl[4] = HplPXA27xDMAM.HplPXA27xDMAChnl[4];
+  HplPXA27xDMAChnl[5] = HplPXA27xDMAM.HplPXA27xDMAChnl[5];
+  HplPXA27xDMAChnl[6] = HplPXA27xDMAM.HplPXA27xDMAChnl[6];
+  HplPXA27xDMAChnl[7] = HplPXA27xDMAM.HplPXA27xDMAChnl[7];
+  HplPXA27xDMAChnl[8] = HplPXA27xDMAM.HplPXA27xDMAChnl[8];
+  HplPXA27xDMAChnl[9] = HplPXA27xDMAM.HplPXA27xDMAChnl[9];
+  HplPXA27xDMAChnl[10] = HplPXA27xDMAM.HplPXA27xDMAChnl[10];
+  HplPXA27xDMAChnl[11] = HplPXA27xDMAM.HplPXA27xDMAChnl[11];
+  HplPXA27xDMAChnl[12] = HplPXA27xDMAM.HplPXA27xDMAChnl[12];
+  HplPXA27xDMAChnl[13] = HplPXA27xDMAM.HplPXA27xDMAChnl[13];
+  HplPXA27xDMAChnl[14] = HplPXA27xDMAM.HplPXA27xDMAChnl[14];
+  HplPXA27xDMAChnl[15] = HplPXA27xDMAM.HplPXA27xDMAChnl[15];
+  HplPXA27xDMAChnl[16] = HplPXA27xDMAM.HplPXA27xDMAChnl[16];
+  HplPXA27xDMAChnl[17] = HplPXA27xDMAM.HplPXA27xDMAChnl[17];
+  HplPXA27xDMAChnl[18] = HplPXA27xDMAM.HplPXA27xDMAChnl[18];
+  HplPXA27xDMAChnl[19] = HplPXA27xDMAM.HplPXA27xDMAChnl[19];
+  HplPXA27xDMAChnl[20] = HplPXA27xDMAM.HplPXA27xDMAChnl[20];
+  HplPXA27xDMAChnl[21] = HplPXA27xDMAM.HplPXA27xDMAChnl[21];
+  HplPXA27xDMAChnl[22] = HplPXA27xDMAM.HplPXA27xDMAChnl[22];
+  HplPXA27xDMAChnl[23] = HplPXA27xDMAM.HplPXA27xDMAChnl[23];
+  HplPXA27xDMAChnl[24] = HplPXA27xDMAM.HplPXA27xDMAChnl[24];
+  HplPXA27xDMAChnl[25] = HplPXA27xDMAM.HplPXA27xDMAChnl[25];
+  HplPXA27xDMAChnl[26] = HplPXA27xDMAM.HplPXA27xDMAChnl[26];
+  HplPXA27xDMAChnl[27] = HplPXA27xDMAM.HplPXA27xDMAChnl[27];
+  HplPXA27xDMAChnl[28] = HplPXA27xDMAM.HplPXA27xDMAChnl[28];
+  HplPXA27xDMAChnl[29] = HplPXA27xDMAM.HplPXA27xDMAChnl[29];
+  HplPXA27xDMAChnl[30] = HplPXA27xDMAM.HplPXA27xDMAChnl[30];
+  HplPXA27xDMAChnl[31] = HplPXA27xDMAM.HplPXA27xDMAChnl[31];
+
+  HplPXA27xDMAM.Init <- PlatformP.InitL1;
+
+  HplPXA27xDMAM.DMAIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_DMAC];
+ 
+}
diff --git a/tos/chips/pxa27x/dma/HplPXA27xDMAChnl.nc b/tos/chips/pxa27x/dma/HplPXA27xDMAChnl.nc
new file mode 100644
index 00000000..198ea408
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HplPXA27xDMAChnl.nc
@@ -0,0 +1,92 @@
+/* $Id: HplPXA27xDMAChnl.nc,v 1.6 2008-06-11 00:46:24 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors:             Phil Buonadonna
+ * Authors:		Robbie Adler
+ */
+
+
+interface HplPXA27xDMAChnl
+{
+  async command error_t setMap(uint8_t dev);
+  async command void setDALGNbit(bool flag);
+  async command bool getDALGNbit();
+  async command bool getDINTbit();
+  async command void setDCSR(uint32_t val);
+  async command uint32_t getDCSR();
+  async command void setDCMD(uint32_t val);
+  async command uint32_t getDCMD();
+  async command void setDDADR(uint32_t val);
+  async command uint32_t getDDADR();
+  async command void setDSADR(uint32_t val);
+  async command uint32_t getDSADR();
+  async command void setDTADR(uint32_t val);
+  async command uint32_t getDTADR();
+  async event void interruptDMA();
+}
diff --git a/tos/chips/pxa27x/dma/HplPXA27xDMACntl.nc b/tos/chips/pxa27x/dma/HplPXA27xDMACntl.nc
new file mode 100644
index 00000000..9f12f854
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HplPXA27xDMACntl.nc
@@ -0,0 +1,55 @@
+/* $Id: HplPXA27xDMACntl.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*
+ *
+ * Authors:             Phil Buonadonna
+ *
+ */
+
+
+interface HplPXA27xDMACntl
+{
+  async command void setDRCMR(uint8_t peripheral, uint8_t chnl);
+  async command uint8_t getDRCMR(uint8_t peripheral);
+  async command void setDALGN(uint32_t val);
+  async command uint32_t getDALGN(uint32_t val);
+  async command void setDPCSR(uint32_t val);
+  async command uint32_t getDPSCR();
+  async command void setDRQSR0(uint32_t val);
+  async command uint32_t getDRQSR0();
+  async command void setDRQSR1(uint32_t val);
+  async command uint32_t getDRQSR1();
+  async command void setDRQSR2(uint32_t val);
+  async command uint32_t getDRQSR2();
+  async command uint32_t getDINT();
+  async command void setFLYCNFG(uint32_t val);
+  async command uint32_t getFLYCNFG();
+}
diff --git a/tos/chips/pxa27x/dma/HplPXA27xDMAInfo.nc b/tos/chips/pxa27x/dma/HplPXA27xDMAInfo.nc
new file mode 100644
index 00000000..07865013
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HplPXA27xDMAInfo.nc
@@ -0,0 +1,64 @@
+/* $Id: HplPXA27xDMAInfo.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*
+ * This interface is to be PROVIDED by peripheral HPL components that
+ * are DMA-able. It is used to provide information to higher level 
+ * components (e.g. HalX) that may implement higher level peripheral
+ * functions using DMA. 
+ *
+ * Instantiate the interface multiple times according to how many
+ * I/O addresses a peripheral has that may be assigned to a DMA
+ * src/tgt address register.
+ *
+ * Authors:             Phil Buonadonna
+ *
+ */
+
+
+interface HplPXA27xDMAInfo
+{
+  /**
+   * Returns a single DMAable address for a peripheral. 
+   *
+   * @return addr The 32 bit address of the peripheral register
+   * of interest.
+   */
+  async command uint32_t getAddr();
+
+  /**
+   * Returns the DMA map index that is associated with the getAddr()
+   * function. 
+   *
+   * @return index The DMA map register index that is  associated with
+   * the getAddr function.
+   */
+  async command uint8_t getMapIndex();
+}
diff --git a/tos/chips/pxa27x/dma/HplPXA27xDMAInfoC.nc b/tos/chips/pxa27x/dma/HplPXA27xDMAInfoC.nc
new file mode 100644
index 00000000..27edccc8
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HplPXA27xDMAInfoC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+// Example (STUART RX):
+// peripheral = 19 (Request to Channel Map register in PXA Dev Manual)
+// baseAddr = &STRBR (DMA address)
+
+// Example (STUART TX):
+// peripheral = 20
+// baseAddr = &STTHR
+
+generic module HplPXA27xDMAInfoC(uint8_t peripheral, uint32_t baseAddr) {
+  provides interface HplPXA27xDMAInfo;
+}
+
+implementation {
+  async command uint32_t HplPXA27xDMAInfo.getAddr() {
+    return baseAddr;
+  }
+
+  async command uint8_t HplPXA27xDMAInfo.getMapIndex() {
+    return peripheral;
+  }
+}
diff --git a/tos/chips/pxa27x/dma/HplPXA27xDMAM.nc b/tos/chips/pxa27x/dma/HplPXA27xDMAM.nc
new file mode 100644
index 00000000..4652c40d
--- /dev/null
+++ b/tos/chips/pxa27x/dma/HplPXA27xDMAM.nc
@@ -0,0 +1,128 @@
+/* $Id: HplPXA27xDMAM.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+module HplPXA27xDMAM
+{
+  provides {
+    interface Init;
+    interface HplPXA27xDMACntl;
+    interface HplPXA27xDMAChnl[uint8_t chnl];
+  }
+  uses {
+    interface HplPXA27xInterrupt as DMAIrq;
+  }
+}
+
+implementation
+{
+  
+  command error_t Init.init() {
+    call DMAIrq.allocate();
+    call DMAIrq.enable();
+    return SUCCESS;
+  }
+  
+  async command void HplPXA27xDMACntl.setDRCMR(uint8_t peripheral, uint8_t val) {
+    DRCMR(peripheral) = val;
+  }
+  async command uint8_t HplPXA27xDMACntl.getDRCMR(uint8_t peripheral) { return DRCMR(peripheral);}
+  async command void HplPXA27xDMACntl.setDALGN(uint32_t val) {DALGN = val;}
+  async command uint32_t HplPXA27xDMACntl.getDALGN(uint32_t val) {return DALGN; }
+  async command void HplPXA27xDMACntl.setDPCSR(uint32_t val) {DPCSR = val; }
+  async command uint32_t HplPXA27xDMACntl.getDPSCR() {return DPCSR; }
+  async command void HplPXA27xDMACntl.setDRQSR0(uint32_t val) {DRQSR0 = val; }
+  async command uint32_t HplPXA27xDMACntl.getDRQSR0() {return DRQSR0; }
+  async command void HplPXA27xDMACntl.setDRQSR1(uint32_t val) {DRQSR1 = val; }
+  async command uint32_t HplPXA27xDMACntl.getDRQSR1() {return DRQSR1; }
+  async command void HplPXA27xDMACntl.setDRQSR2(uint32_t val) {DRQSR2 = val; }
+  async command uint32_t HplPXA27xDMACntl.getDRQSR2() {return DRQSR2; }
+  async command uint32_t HplPXA27xDMACntl.getDINT() {return DINT; }
+  async command void HplPXA27xDMACntl.setFLYCNFG(uint32_t val) {FLYCNFG = val; }
+  async command uint32_t HplPXA27xDMACntl.getFLYCNFG() {return FLYCNFG; }
+
+  
+  async command error_t HplPXA27xDMAChnl.setMap[uint8_t chnl](uint8_t dev) {
+    call HplPXA27xDMACntl.setDRCMR(dev,(DRCMR_MAPVLD | DRCMR_CHLNUM(chnl)));
+    return SUCCESS;
+  }
+  async command void HplPXA27xDMAChnl.setDALGNbit[uint8_t chnl](bool flag) {
+    if (flag) {
+      DALGN |= (1 << chnl);
+    }
+    else {
+      DALGN &= ~(1 << chnl);
+    }
+    return;
+  }
+  async command bool HplPXA27xDMAChnl.getDALGNbit[uint8_t chnl]() {
+    return ((DALGN & (1 << chnl)) != 0);
+  }
+  async command bool HplPXA27xDMAChnl.getDINTbit[uint8_t chnl]() {
+    return ((DINT & (1 << chnl)) != 0);
+  }
+  async command void HplPXA27xDMAChnl.setDCSR[uint8_t chnl](uint32_t val) {
+    // uint32_t cycles;
+    //_pxa27x_perf_clear();
+    DCSR(chnl) = val;
+    //_pxa27x_perf_get(cycles);
+  }
+  async command uint32_t HplPXA27xDMAChnl.getDCSR[uint8_t chnl]() {return DCSR(chnl); }
+  async command void HplPXA27xDMAChnl.setDCMD[uint8_t chnl](uint32_t val) {DCMD(chnl) = val; }
+  async command uint32_t HplPXA27xDMAChnl.getDCMD[uint8_t chnl]() {return DCMD(chnl); }
+  async command void HplPXA27xDMAChnl.setDDADR[uint8_t chnl](uint32_t val) {DDADR(chnl) = val; }
+  async command uint32_t HplPXA27xDMAChnl.getDDADR[uint8_t chnl]() {return DDADR(chnl); }
+  async command void HplPXA27xDMAChnl.setDSADR[uint8_t chnl](uint32_t val) {DSADR(chnl) = val; }
+  async command uint32_t HplPXA27xDMAChnl.getDSADR[uint8_t chnl]() {return DSADR(chnl); }
+  async command void HplPXA27xDMAChnl.setDTADR[uint8_t chnl](uint32_t val) {DTADR(chnl) = val; }
+  async command uint32_t HplPXA27xDMAChnl.getDTADR[uint8_t chnl]() {return DTADR(chnl); }
+
+  async event void DMAIrq.fired() {
+    uint32_t IntReg;
+    uint8_t chnl;
+    IntReg = call HplPXA27xDMACntl.getDINT();
+
+    while (IntReg) {
+      chnl = 31 - _pxa27x_clzui(IntReg);
+      signal HplPXA27xDMAChnl.interruptDMA[chnl]();
+      IntReg &= ~(1 << chnl);
+    }
+    return;
+  }
+
+  default async event void HplPXA27xDMAChnl.interruptDMA[uint8_t chnl]() {
+    call HplPXA27xDMAChnl.setDCMD[chnl](0);
+    call HplPXA27xDMAChnl.setDCSR[chnl](DCSR_EORINT | DCSR_ENDINTR
+					| DCSR_STARTINTR | DCSR_BUSERRINTR);
+  }
+}
diff --git a/tos/chips/pxa27x/gpio/GeneralIOC.nc b/tos/chips/pxa27x/gpio/GeneralIOC.nc
new file mode 100644
index 00000000..6c5e82d1
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/GeneralIOC.nc
@@ -0,0 +1,63 @@
+// $Id: GeneralIOC.nc,v 1.6 2008-06-11 00:46:24 razvanm Exp $
+
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+//@author Phil Buonadonna
+
+configuration GeneralIOC 
+{
+  provides {
+    interface GeneralIO[uint8_t pin];
+    interface HalPXA27xGpioInterrupt[uint8_t pin];
+    interface GpioInterrupt[uint8_t pin];
+  }
+}
+
+implementation 
+{
+  components HalPXA27xGeneralIOM;
+  components HplPXA27xGPIOC;
+
+  GeneralIO = HalPXA27xGeneralIOM;
+  HalPXA27xGpioInterrupt = HalPXA27xGeneralIOM;
+  GpioInterrupt = HalPXA27xGeneralIOM;
+
+  HalPXA27xGeneralIOM.HplPXA27xGPIOPin -> HplPXA27xGPIOC;
+
+}
diff --git a/tos/chips/pxa27x/gpio/HalPXA27xGeneralIOM.nc b/tos/chips/pxa27x/gpio/HalPXA27xGeneralIOM.nc
new file mode 100644
index 00000000..8ccbf078
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HalPXA27xGeneralIOM.nc
@@ -0,0 +1,166 @@
+// $Id: HalPXA27xGeneralIOM.nc,v 1.6 2008-06-11 00:46:24 razvanm Exp $
+
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+//@author Phil Buonadonna
+module HalPXA27xGeneralIOM {
+  provides {
+    interface GeneralIO[uint8_t pin];
+    interface HalPXA27xGpioInterrupt[uint8_t pin];
+    interface GpioInterrupt[uint8_t pin];
+  }
+  uses {
+    interface HplPXA27xGPIOPin[uint8_t pin];
+  }
+}
+
+implementation {
+  async command void GeneralIO.set[uint8_t pin]() {
+    
+    atomic call HplPXA27xGPIOPin.setGPSRbit[pin]();
+    return;
+  }
+
+  async command void GeneralIO.clr[uint8_t pin]() {
+    atomic call HplPXA27xGPIOPin.setGPCRbit[pin]();
+    return;
+  }
+
+  async command void GeneralIO.toggle[uint8_t pin]() {
+    atomic {
+      if (call HplPXA27xGPIOPin.getGPLRbit[pin]()) {
+	call HplPXA27xGPIOPin.setGPCRbit[pin]();
+      }
+      else {
+	call HplPXA27xGPIOPin.setGPSRbit[pin]();
+      }
+    }
+    return;
+  }
+
+  async command bool GeneralIO.get[uint8_t pin]() {
+    bool result;
+    result = call HplPXA27xGPIOPin.getGPLRbit[pin]();
+    return result;
+  }
+
+  async command void GeneralIO.makeInput[uint8_t pin]() {
+    atomic call HplPXA27xGPIOPin.setGPDRbit[pin](FALSE);
+    return;
+  }
+  
+  async command bool GeneralIO.isInput[uint8_t pin]() {
+    bool result;
+    result = !call HplPXA27xGPIOPin.getGPLRbit[pin]();
+    return result;
+  }
+  
+  async command void GeneralIO.makeOutput[uint8_t pin]() {
+    atomic call HplPXA27xGPIOPin.setGPDRbit[pin](TRUE);
+    return;
+  }
+
+  async command bool GeneralIO.isOutput[uint8_t pin]() {
+    bool result;
+    result = call HplPXA27xGPIOPin.getGPDRbit[pin]();
+    return result;
+  }
+  
+  async command error_t HalPXA27xGpioInterrupt.enableRisingEdge[uint8_t pin]() {
+    atomic {
+      call HplPXA27xGPIOPin.setGRERbit[pin](TRUE);
+      call HplPXA27xGPIOPin.setGFERbit[pin](FALSE);
+    }
+    return SUCCESS;
+  }
+
+  async command error_t HalPXA27xGpioInterrupt.enableFallingEdge[uint8_t pin]() {
+    atomic {
+      call HplPXA27xGPIOPin.setGRERbit[pin](FALSE);
+      call HplPXA27xGPIOPin.setGFERbit[pin](TRUE);
+    }
+    return SUCCESS;
+  }
+
+  async command error_t HalPXA27xGpioInterrupt.enableBothEdge[uint8_t pin]() {
+    atomic {
+      call HplPXA27xGPIOPin.setGRERbit[pin](TRUE);
+      call HplPXA27xGPIOPin.setGFERbit[pin](TRUE);
+    }
+    return SUCCESS;
+  }
+
+  async command error_t HalPXA27xGpioInterrupt.disable[uint8_t pin]() {
+    atomic {
+      call HplPXA27xGPIOPin.setGRERbit[pin](FALSE);
+      call HplPXA27xGPIOPin.setGFERbit[pin](FALSE);
+      call HplPXA27xGPIOPin.clearGEDRbit[pin]();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t GpioInterrupt.enableRisingEdge[uint8_t pin]() {
+    return call HalPXA27xGpioInterrupt.enableRisingEdge[pin]();
+  }
+
+  async command error_t GpioInterrupt.enableFallingEdge[uint8_t pin]() {
+    return call HalPXA27xGpioInterrupt.enableFallingEdge[pin]();
+  }
+
+  async command error_t GpioInterrupt.disable[uint8_t pin]() {
+    return call HalPXA27xGpioInterrupt.disable[pin]();
+  }
+
+  async event void HplPXA27xGPIOPin.interruptGPIOPin[uint8_t pin]() {
+    call HplPXA27xGPIOPin.clearGEDRbit[pin]();
+    signal HalPXA27xGpioInterrupt.fired[pin]();
+    signal GpioInterrupt.fired[pin]();
+    return;
+  }
+  
+
+  default async event void HalPXA27xGpioInterrupt.fired[uint8_t pin]() {
+    return;
+  }
+
+  default async event void GpioInterrupt.fired[uint8_t pin]() {
+    return;
+  }
+
+}
diff --git a/tos/chips/pxa27x/gpio/HalPXA27xGpioCapture.nc b/tos/chips/pxa27x/gpio/HalPXA27xGpioCapture.nc
new file mode 100644
index 00000000..da92c025
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HalPXA27xGpioCapture.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/*
+ * Variant of the GpioCapture interface that provides a capture
+ * on 'BOTH'.
+ *
+ * @author Phil Buonadonna
+ */
+
+interface HalPXA27xGpioCapture {
+  
+  /** 
+   * Enable an edge based timer capture event.
+   *
+   * @return Whether the timer capture has been enabled.
+   */
+  async command error_t captureRisingEdge();
+  async command error_t captureFallingEdge();
+  async command error_t captureBothEdge();
+
+  /**
+   * Fired when an edge interrupt occurs.
+   *
+   * @param val The value of the 32kHz timer.
+   */
+  async event void captured(uint16_t time);
+
+  /**
+   * Disable further captures.
+   */ 
+  async command void disable();
+
+}
diff --git a/tos/chips/pxa27x/gpio/HalPXA27xGpioInterrupt.nc b/tos/chips/pxa27x/gpio/HalPXA27xGpioInterrupt.nc
new file mode 100644
index 00000000..fe9cd62b
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HalPXA27xGpioInterrupt.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/* 
+ * Variant of the standard GpioInterrupt interface that provides a 
+ * 'BOTH' trigger.
+ * 
+ * @author Phil Buonadonna
+ * 
+ */
+
+interface HalPXA27xGpioInterrupt {
+
+  /** 
+   * Enable an edge based interrupt. Calls to these functions are
+   * not cumulative: only the transition type of the last called 
+   * function will be monitored for.
+   *
+   *
+   * @return SUCCESS if the interrupt has been enabled
+   */
+  async command error_t enableRisingEdge();
+  async command error_t enableFallingEdge();
+  async command error_t enableBothEdge();
+
+  /**  
+   * Diables an edge interrupt or capture interrupt
+   * 
+   * @return SUCCESS if the interrupt has been disabled
+   */ 
+  async command error_t disable();
+
+  /**
+   * Fired when an edge interrupt occurs.
+   *
+   * NOTE: Interrupts keep running until "disable()" is called
+   */
+  async event void fired();
+
+}
diff --git a/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureC.nc b/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureC.nc
new file mode 100644
index 00000000..79604038
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureC.nc
@@ -0,0 +1,55 @@
+// $Id: HalPXA27xSoftCaptureC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ * Emulates GPIO capture functionality using HalPXA27xGpioInterrupt and the 
+ * standard 32khz counter. Provides a method to capture on BOTH edges of
+ * a GPIO transition
+ *
+ * @author Phil Buonadonna
+ */
+generic configuration HalPXA27xSoftCaptureC() 
+{
+  provides interface HalPXA27xGpioCapture;
+  uses interface HalPXA27xGpioInterrupt;
+}
+
+implementation
+{
+  components new HalPXa27xSoftCaptureP();
+  components Counter32khzC;
+  
+  HalPXA27xGpioCapture = HalPXA27xSoftCaptureP;
+  HalPXA27xGpioInterrupt = HalPXA27xSoftCaptureP;
+
+  HalPXA27xSoftCaptureP.Counter32khz32 -> Counter32khzC.Counter32khz32;
+}
+
diff --git a/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureP.nc b/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureP.nc
new file mode 100644
index 00000000..c35d9391
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureP.nc
@@ -0,0 +1,82 @@
+// $Id: HalPXA27xSoftCaptureP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Emulates GPIO capture functionality using GpioInterrupt and the 
+ * standard 32khz counter. Provides a method to capture on BOTH edges of
+ * a GPIO transition.
+ *
+ * @author Phil Buonadonna
+ */
+generic module HalPXA27xSoftCaptureP ()
+{
+  provides interface HalPXA27xGpioCapture;
+  uses {
+    interface HalPXA27xGpioInterrupt;
+    interface Counter<T32khz,uint32_t> as Counter32khz32;
+  }
+}
+
+implementation 
+{
+
+  async command error_t HalPXA27xGpioCapture.captureRisingEdge() {
+    return (call HalPXA27xGpioInterrupt.enableRisingEdge());
+  }
+
+  async command error_t HalPXA27xGpioCapture.captureFallingEdge() {
+    return (call HalPXA27xGpioInterrupt.enableFallingEdge());
+  }
+
+  async command error_t HalPXA27xGpioCapture.captureBothEdge() {
+    return (call HalPXA27xGpioInterrupt.enableBothEdge());
+  }
+
+  async command void HalPXA27xGpioCapture.disable() {
+    call HalPXA27xGpioInterrupt.disable();
+    return;
+  }
+  
+  async event void HalPXA27xGpioInterrupt.fired() {
+    uint16_t captureTime;
+
+    captureTime = (uint16_t) call Counter32khz32.get();
+    signal HalPXA27xGpioCapture.captured(captureTime);
+    return;
+  }
+
+  async event void Counter32khz32.overflow() {
+    return;
+  }
+
+  default async event void HalPXA27xGpioCapture.captured(uint16_t time) {
+    return;
+  }
+}
diff --git a/tos/chips/pxa27x/gpio/HplPXA27xGPIO.nc b/tos/chips/pxa27x/gpio/HplPXA27xGPIO.nc
new file mode 100644
index 00000000..eb2f2062
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HplPXA27xGPIO.nc
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ * This interface provides direct access to the PXA27x GPIO controller 
+ * registers. It is meant as an alternative to the 'per-pin' interface 
+ * where the pin abstraction may not be convienient. The event provided is
+ * called at every signal of the underlying first-level interrupt component
+ * and NOT on a per-pin basis.
+ * 
+ * Commands in this interface are named according to the following scheme:
+ *    set<regname>(uint32_t val);
+ *    get<regname>();
+ * where <regname> is the register as defined in the PXA27x Developers 
+ * Guide: General-Purpose IO Controller.
+ *
+ * This interface is NOT intended to be parameterized.
+ *
+ * @author Phil Buonadonna
+ */
+
+interface HplPXA27xGPIO
+{
+
+  async command void setGPLR0(uint32_t val);
+  async command uint32_t getGPLR0();
+  async command void setGPLR1(uint32_t val);
+  async command uint32_t getGPLR1();
+  async command void setGPLR2(uint32_t val);
+  async command uint32_t getGPLR2();
+  async command void setGPLR3(uint32_t val);
+  async command uint32_t getGPLR3();
+
+  async command void setGPDR0(uint32_t val);
+  async command uint32_t getGPDR0();
+  async command void setGPDR1(uint32_t val);
+  async command uint32_t getGPDR1();
+  async command void setGPDR2(uint32_t val);
+  async command uint32_t getGPDR2();
+  async command void setGPDR3(uint32_t val);
+  async command uint32_t getGPDR3();
+
+  async command void setGPSR0(uint32_t val);
+  async command uint32_t getGPSR0();
+  async command void setGPSR1(uint32_t val);
+  async command uint32_t getGPSR1();
+  async command void setGPSR2(uint32_t val);
+  async command uint32_t getGPSR2();
+  async command void setGPSR3(uint32_t val);
+  async command uint32_t getGPSR3();
+
+  async command void setGPCR0(uint32_t val);
+  async command uint32_t getGPCR0();
+  async command void setGPCR1(uint32_t val);
+  async command uint32_t getGPCR1();
+  async command void setGPCR2(uint32_t val);
+  async command uint32_t getGPCR2();
+  async command void setGPCR3(uint32_t val);
+  async command uint32_t getGPCR3();
+
+  async command void setGRER0(uint32_t val);
+  async command uint32_t getGRER0();
+  async command void setGRER1(uint32_t val);
+  async command uint32_t getGRER1();
+  async command void setGRER2(uint32_t val);
+  async command uint32_t getGRER2();
+  async command void setGRER3(uint32_t val);
+  async command uint32_t getGRER3();
+ 
+  async command void setGFER0(uint32_t val);
+  async command uint32_t getGFER0();
+  async command void setGFER1(uint32_t val);
+  async command uint32_t getGFER1();
+  async command void setGFER2(uint32_t val);
+  async command uint32_t getGFER2();
+  async command void setGFER3(uint32_t val);
+  async command uint32_t getGFER3();
+ 
+  async command void setGEDR0(uint32_t val);
+  async command uint32_t getGEDR0();
+  async command void setGEDR1(uint32_t val);
+  async command uint32_t getGEDR1();
+  async command void setGEDR2(uint32_t val);
+  async command uint32_t getGEDR2();
+  async command void setGEDR3(uint32_t val);
+  async command uint32_t getGEDR3();
+ 
+  async command void setGAFR0_L(uint32_t val);
+  async command uint32_t getGAFR0_L();
+  async command void setGAFR0_U(uint32_t val);
+  async command uint32_t getGAFR0_U();
+  async command void setGAFR1_L(uint32_t val);
+  async command uint32_t getGAFR1_L();
+  async command void setGAFR1_U(uint32_t val);
+  async command uint32_t getGAFR1_U();
+  async command void setGAFR2_L(uint32_t val);
+  async command uint32_t getGAFR2_L();
+  async command void setGAFR2_U(uint32_t val);
+  async command uint32_t getGAFR2_U();
+  async command void setGAFR3_L(uint32_t val);
+  async command uint32_t getGAFR3_L();
+  async command void setGAFR3_U(uint32_t val);
+  async command uint32_t getGAFR3_U();
+ 
+  async event void fired();
+}
diff --git a/tos/chips/pxa27x/gpio/HplPXA27xGPIOC.nc b/tos/chips/pxa27x/gpio/HplPXA27xGPIOC.nc
new file mode 100644
index 00000000..218a9f1e
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HplPXA27xGPIOC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+configuration HplPXA27xGPIOC {
+  provides {
+    interface HplPXA27xGPIOPin[uint8_t pin];
+    interface HplPXA27xGPIO;
+  }
+}
+implementation 
+{
+  components HplPXA27xGPIOM;
+  components HplPXA27xInterruptM;
+  components PlatformP;
+
+  HplPXA27xGPIOPin = HplPXA27xGPIOM;
+  HplPXA27xGPIO = HplPXA27xGPIOM;
+
+
+  HplPXA27xGPIOM.Init <- PlatformP.InitL1;
+  
+  HplPXA27xGPIOM.GPIOIrq0 -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_0];
+  HplPXA27xGPIOM.GPIOIrq1 -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_1];
+  HplPXA27xGPIOM.GPIOIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_X];
+
+}
diff --git a/tos/chips/pxa27x/gpio/HplPXA27xGPIOM.nc b/tos/chips/pxa27x/gpio/HplPXA27xGPIOM.nc
new file mode 100644
index 00000000..9d17fc15
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HplPXA27xGPIOM.nc
@@ -0,0 +1,317 @@
+// $Id: HplPXA27xGPIOM.nc,v 1.6 2008-06-11 00:46:24 razvanm Exp $
+
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+//@author Phil Buonadonna
+module HplPXA27xGPIOM {
+
+  provides {
+    interface Init;
+    interface HplPXA27xGPIOPin[uint8_t pin];
+    interface HplPXA27xGPIO;
+  }
+  uses {
+    interface HplPXA27xInterrupt as GPIOIrq0;
+    interface HplPXA27xInterrupt as GPIOIrq1;
+    interface HplPXA27xInterrupt as GPIOIrq;   // GPIO 2 - 120 only
+  }
+}
+
+implementation {
+
+  bool gfInitialized = FALSE;
+
+  command error_t Init.init() 
+  {
+    bool isInited;
+
+    atomic {
+      isInited = gfInitialized;
+      gfInitialized = TRUE;
+    }
+
+    if (!isInited) {
+      call GPIOIrq0.allocate();
+      call GPIOIrq1.allocate();
+      call GPIOIrq.allocate();
+      call GPIOIrq0.enable();
+      call GPIOIrq1.enable();
+      call GPIOIrq.enable();   
+    }
+    return SUCCESS;
+  }
+
+  async command bool HplPXA27xGPIOPin.getGPLRbit[uint8_t pin]() 
+  {
+    return ((GPLR(pin) & _GPIO_bit(pin)) != 0);
+  }
+
+  async command void HplPXA27xGPIOPin.setGPDRbit[uint8_t pin](bool dir) 
+  {
+    if (dir) {
+      GPDR(pin) |= _GPIO_bit(pin);
+    }
+    else {
+      GPDR(pin) &= ~(_GPIO_bit(pin));
+    }
+    return;
+  }
+
+  async command bool HplPXA27xGPIOPin.getGPDRbit[uint8_t pin]() 
+  {
+    return ((GPDR(pin) & _GPIO_bit(pin)) != 0);
+  }
+
+  async command void HplPXA27xGPIOPin.setGPSRbit[uint8_t pin]() 
+  {
+    GPSR(pin) = _GPIO_bit(pin);
+    return;
+  }
+
+  async command void HplPXA27xGPIOPin.setGPCRbit[uint8_t pin]() 
+  {
+    GPCR(pin) = _GPIO_bit(pin);
+    return;
+  }
+
+  async command void HplPXA27xGPIOPin.setGRERbit[uint8_t pin](bool flag) 
+  {
+    if (flag) {
+      GRER(pin) |= _GPIO_bit(pin);
+    }
+    else {
+      GRER(pin) &= ~(_GPIO_bit(pin));
+    }
+    return;
+  }
+
+  async command bool HplPXA27xGPIOPin.getGRERbit[uint8_t pin]() 
+  {
+    return ((GRER(pin) & _GPIO_bit(pin)) != 0);
+  }
+
+  async command void HplPXA27xGPIOPin.setGFERbit[uint8_t pin](bool flag) 
+  {
+    if (flag) {
+      GFER(pin) |= _GPIO_bit(pin);
+    }
+    else {
+      GFER(pin) &= ~(_GPIO_bit(pin));
+    }
+    return;
+  }
+
+  async command bool HplPXA27xGPIOPin.getGFERbit[uint8_t pin]() 
+  {
+    return ((GFER(pin) & _GPIO_bit(pin)) != 0);
+  }
+
+  async command bool HplPXA27xGPIOPin.getGEDRbit[uint8_t pin]() 
+  {
+    return ((GEDR(pin) & _GPIO_bit(pin)) != 0);
+  }
+
+  async command bool HplPXA27xGPIOPin.clearGEDRbit[uint8_t pin]() 
+  {
+    bool flag;
+    flag = ((GEDR(pin) & _GPIO_bit(pin)) != 0);
+    GEDR(pin) = _GPIO_bit(pin);
+    return flag;
+  }
+
+  async command void HplPXA27xGPIOPin.setGAFRpin[uint8_t pin](uint8_t func) 
+  {
+    func &= 0x3;
+    _GPIO_setaltfn(pin,func);
+    return;
+  }
+
+  async command uint8_t HplPXA27xGPIOPin.getGAFRpin[uint8_t pin]() 
+  {
+    return (_GPIO_getaltfun(pin));
+  }
+
+  default async event void HplPXA27xGPIOPin.interruptGPIOPin[uint8_t pin]() 
+  {
+    call HplPXA27xGPIOPin.clearGEDRbit[pin]();
+    return;
+  }
+
+  async command void HplPXA27xGPIO.setGPLR0(uint32_t val) {GPLR0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPLR0() {return GPLR0;}
+  async command void HplPXA27xGPIO.setGPLR1(uint32_t val) {GPLR1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPLR1() {return GPLR1;}
+  async command void HplPXA27xGPIO.setGPLR2(uint32_t val) {GPLR2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPLR2() {return GPLR2;}
+  async command void HplPXA27xGPIO.setGPLR3(uint32_t val) {GPLR3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPLR3() {return GPLR3;}
+
+  async command void HplPXA27xGPIO.setGPDR0(uint32_t val) {GPDR0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPDR0() {return GPDR0;}
+  async command void HplPXA27xGPIO.setGPDR1(uint32_t val) {GPDR1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPDR1() {return GPDR1;}
+  async command void HplPXA27xGPIO.setGPDR2(uint32_t val) {GPDR2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPDR2() {return GPDR2;}
+  async command void HplPXA27xGPIO.setGPDR3(uint32_t val) {GPDR3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPDR3() {return GPDR3;}
+
+  async command void HplPXA27xGPIO.setGPSR0(uint32_t val) {GPSR0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPSR0() {return GPSR0;}
+  async command void HplPXA27xGPIO.setGPSR1(uint32_t val) {GPSR1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPSR1() {return GPSR1;}
+  async command void HplPXA27xGPIO.setGPSR2(uint32_t val) {GPSR2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPSR2() {return GPSR2;}
+  async command void HplPXA27xGPIO.setGPSR3(uint32_t val) {GPSR3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPSR3() {return GPSR3;}
+
+  async command void HplPXA27xGPIO.setGPCR0(uint32_t val) {GPCR0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPCR0() {return GPCR0;}
+  async command void HplPXA27xGPIO.setGPCR1(uint32_t val) {GPCR1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPCR1() {return GPCR1;}
+  async command void HplPXA27xGPIO.setGPCR2(uint32_t val) {GPCR2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPCR2() {return GPCR2;}
+  async command void HplPXA27xGPIO.setGPCR3(uint32_t val) {GPCR3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGPCR3() {return GPCR3;}
+
+  async command void HplPXA27xGPIO.setGRER0(uint32_t val) {GRER0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGRER0() {return GRER0;}
+  async command void HplPXA27xGPIO.setGRER1(uint32_t val) {GRER1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGRER1() {return GRER1;}
+  async command void HplPXA27xGPIO.setGRER2(uint32_t val) {GRER2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGRER2() {return GRER2;}
+  async command void HplPXA27xGPIO.setGRER3(uint32_t val) {GRER3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGRER3() {return GRER3;}
+
+  async command void HplPXA27xGPIO.setGFER0(uint32_t val) {GFER0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGFER0() {return GFER0;}
+  async command void HplPXA27xGPIO.setGFER1(uint32_t val) {GFER1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGFER1() {return GFER1;}
+  async command void HplPXA27xGPIO.setGFER2(uint32_t val) {GFER2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGFER2() {return GFER2;}
+  async command void HplPXA27xGPIO.setGFER3(uint32_t val) {GFER3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGFER3() {return GFER3;}
+
+  async command void HplPXA27xGPIO.setGEDR0(uint32_t val) {GEDR0 = val;}
+  async command uint32_t HplPXA27xGPIO.getGEDR0() {return GEDR0;}
+  async command void HplPXA27xGPIO.setGEDR1(uint32_t val) {GEDR1 = val;}
+  async command uint32_t HplPXA27xGPIO.getGEDR1() {return GEDR1;}
+  async command void HplPXA27xGPIO.setGEDR2(uint32_t val) {GEDR2 = val;}
+  async command uint32_t HplPXA27xGPIO.getGEDR2() {return GEDR2;}
+  async command void HplPXA27xGPIO.setGEDR3(uint32_t val) {GEDR3 = val;}
+  async command uint32_t HplPXA27xGPIO.getGEDR3() {return GEDR3;}
+ 
+  async command void HplPXA27xGPIO.setGAFR0_L(uint32_t val) {GAFR0_L = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR0_L() {return GAFR0_L;}
+  async command void HplPXA27xGPIO.setGAFR0_U(uint32_t val) {GAFR0_U = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR0_U() {return GAFR0_U;}
+
+  async command void HplPXA27xGPIO.setGAFR1_L(uint32_t val) {GAFR1_L = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR1_L() {return GAFR1_L;}
+  async command void HplPXA27xGPIO.setGAFR1_U(uint32_t val) {GAFR1_U = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR1_U() {return GAFR1_U;}
+
+  async command void HplPXA27xGPIO.setGAFR2_L(uint32_t val) {GAFR2_L = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR2_L() {return GAFR2_L;}
+  async command void HplPXA27xGPIO.setGAFR2_U(uint32_t val) {GAFR2_U = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR2_U() {return GAFR2_U;}
+
+  async command void HplPXA27xGPIO.setGAFR3_L(uint32_t val) {GAFR3_L = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR3_L() {return GAFR3_L;}
+  async command void HplPXA27xGPIO.setGAFR3_U(uint32_t val) {GAFR3_U = val;}
+  async command uint32_t HplPXA27xGPIO.getGAFR3_U() {return GAFR3_U;}
+ 
+  default async event void HplPXA27xGPIO.fired() {
+    return;
+  }
+
+  async event void GPIOIrq.fired() 
+  {
+
+    uint32_t DetectReg;
+    uint8_t pin;
+
+    signal HplPXA27xGPIO.fired(); 
+
+    // Mask off GPIO 0 and 1 (handled by direct IRQs)
+    atomic DetectReg = (GEDR0 & ~((1<<1) | (1<<0))); 
+
+    while (DetectReg) {
+      pin = 31 - _pxa27x_clzui(DetectReg);
+      signal HplPXA27xGPIOPin.interruptGPIOPin[pin]();
+      DetectReg &= ~(1 << pin);
+    }
+
+    atomic DetectReg = GEDR1;
+
+    while (DetectReg) {
+      pin = 31 - _pxa27x_clzui(DetectReg);
+      signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+32)]();
+      DetectReg &= ~(1 << pin);
+    }
+
+    atomic DetectReg = GEDR2;
+
+    while (DetectReg) {
+      pin = 31 - _pxa27x_clzui(DetectReg);
+      signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+64)]();
+      DetectReg &= ~(1 << pin);
+    }
+
+    atomic DetectReg = GEDR3;
+
+    while (DetectReg) {
+      pin = 31 - _pxa27x_clzui(DetectReg);
+      signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+96)]();
+      DetectReg &= ~(1 << pin);
+    }
+
+    return;
+  }
+
+  async event void GPIOIrq0.fired()
+  {
+    signal HplPXA27xGPIOPin.interruptGPIOPin[0]();
+  }
+
+  async event void GPIOIrq1.fired() 
+  {
+    signal HplPXA27xGPIOPin.interruptGPIOPin[1]();
+  } 
+
+}
diff --git a/tos/chips/pxa27x/gpio/HplPXA27xGPIOPin.nc b/tos/chips/pxa27x/gpio/HplPXA27xGPIOPin.nc
new file mode 100644
index 00000000..02fefd5f
--- /dev/null
+++ b/tos/chips/pxa27x/gpio/HplPXA27xGPIOPin.nc
@@ -0,0 +1,152 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This interface provides a 'per-pin' abstraction for the PXA27x
+ * GPIO system. It is parameterized by the specific GPIO Pin number
+ * of the PXA27x. 
+ *
+ * @author Phil Buonadonna
+ */
+
+interface HplPXA27xGPIOPin 
+{
+  /** 
+   * Returns the logic state of a GPIO Pin.
+   *
+   * @return bool TRUE if logic '1', FALSE if logic '0'
+   */
+  async command bool getGPLRbit();
+
+  /** 
+   * Configures the direction of a GPIO pin.
+   *
+   * @param dir TRUE to configure as an output, FALSE to configure as an input.
+   */
+  async command void setGPDRbit(bool dir);
+
+  /** 
+   * Get's the current pin direction configuration.
+   *
+   * @return bool TRUE if configured as an output, FALSE if configured 
+   *  as an input.
+   */
+  async command bool getGPDRbit();
+
+  /** 
+   * Sets a GPIO pin configured as an output to a HIGH state.
+   *
+   */
+  async command void setGPSRbit();
+
+  /** 
+   * Sets a GPIO pin configured as an output to a LOW state.
+   *
+   */
+  async command void setGPCRbit();
+
+  /** 
+   * Enables/Disables events on the rising edge of a GPIO pin 
+   * signal. Calls to this function are independent of calls
+   * to 'setFallingEDEnable()'
+   *
+   * @param flag TRUE to enable rising edge detection, FASLE to
+   * disable.
+   *
+   */
+  async command void setGRERbit(bool flag);
+
+  /** 
+   * Returns the status of rising edge detection.
+   *
+   * @return val TRUE if rising edge detection is enable, FALSE
+   * otherwise.
+   */
+  async command bool getGRERbit();
+
+  /** 
+   * Enables/Disables events on the falling edge of a GPIO pin 
+   * signal. Calls to this function are independent of calls to
+   * 'setRisingEDEnable()'
+   *
+   * @param flag TRUE to enable falling edge detection, FASLE to
+   * disable.
+   */
+  async command void setGFERbit(bool flag);
+
+  /** 
+   * Returns the status of falling edge detection.
+   *
+   * @return val TRUE if falling edge detection is enable, FALSE
+   * otherwise.
+   */
+  async command bool getGFERbit();
+
+  /** 
+   * Indicates wether an edge detection event is pending for GPIO Pin
+   *
+   * @return val TRUE if an event is pending.
+   */
+  async command bool getGEDRbit();
+
+  /** 
+   * Clears the edge detection event status.
+   *
+   * @return val TRUE if there was a pending event prior to clearing, 
+   * FALSE otherwise.
+   */
+  async command bool clearGEDRbit();
+
+  /** 
+   * Sets the GPIO pin to one of it's alternate peripheral functions.
+   * Refer to the PXA27x Developers Manual for information on available
+   * alternate functions.
+   *
+   * @param func An integer between 0 and 3 indicating the desired 
+   * pin alternate function. 
+   */
+  async command void setGAFRpin(uint8_t func);
+
+  /** 
+   * Returns the current alternate function selected for the GPIO pin.
+   *
+   * @return val An integer between 0 and 3 indicated the current
+   * alternate function.
+   */
+  async command uint8_t getGAFRpin();
+
+  /** 
+   * The pin edge detection event. Signalled when a rising/falling edge
+   * occurs on the PIN and the respective edge detect enable is set.
+   * The default event DOES NOT clear any pending requests.
+   *
+   */
+  async event void interruptGPIOPin();
+}
+
diff --git a/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterC.nc b/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterC.nc
new file mode 100644
index 00000000..b4db9397
--- /dev/null
+++ b/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterC.nc
@@ -0,0 +1,62 @@
+/* $Id: HalPXA27xI2CMasterC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This Hal module implements the TinyOS 2.0 I2CPacket interface over
+ * the PXA27x I2C Hpl
+ *
+ * @author Phil Buonadonna
+ */
+
+#include <I2C.h>
+
+generic configuration HalPXA27xI2CMasterC(bool fast_mode)
+{
+  provides interface I2CPacket<TI2CBasicAddr>;
+
+  uses interface HplPXA27xGPIOPin as I2CSCL;
+  uses interface HplPXA27xGPIOPin as I2CSDA;
+}
+
+implementation
+{
+  components new HalPXA27xI2CMasterP(fast_mode);
+  components HplPXA27xI2CC;
+  components PlatformP;
+
+  I2CPacket = HalPXA27xI2CMasterP;
+
+  HalPXA27xI2CMasterP.Init <- PlatformP.InitL2;
+
+  HalPXA27xI2CMasterP.I2C -> HplPXA27xI2CC.I2C;
+
+  I2CSCL = HalPXA27xI2CMasterP.I2CSCL;
+  I2CSDA = HalPXA27xI2CMasterP.I2CSDA;
+}
diff --git a/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterP.nc b/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterP.nc
new file mode 100644
index 00000000..d9f15b09
--- /dev/null
+++ b/tos/chips/pxa27x/i2c/HalPXA27xI2CMasterP.nc
@@ -0,0 +1,316 @@
+/* $Id: HalPXA27xI2CMasterP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This Hal module implements the TinyOS 2.0 I2CPacket interface over
+ * the PXA27x I2C Hpl
+ *
+ * @author Phil Buonadonna
+ */
+
+#include <I2C.h>
+
+generic module HalPXA27xI2CMasterP(bool fast_mode)
+{
+  provides interface Init;
+  provides interface I2CPacket<TI2CBasicAddr>;
+
+  uses interface HplPXA27xI2C as I2C;
+
+  uses interface HplPXA27xGPIOPin as I2CSCL;
+  uses interface HplPXA27xGPIOPin as I2CSDA;
+
+}
+
+implementation
+{
+  // These states don't necessarily reflect the state of the I2C bus, rather the state of this
+  // module WRT an operation.  I.E. the module might be in STATE_IDLE, but the I2C bus still
+  // held by the master for a continued read.
+  enum {
+    I2C_STATE_IDLE,
+    I2C_STATE_READSTART,
+    I2C_STATE_READ,
+    I2C_STATE_READEND,
+    I2C_STATE_WRITE,
+    I2C_STATE_WRITEEND,
+    I2C_STATE_ERROR
+  };
+
+  uint8_t mI2CState;
+  uint16_t mCurTargetAddr;
+  uint8_t *mCurBuf, mCurBufLen, mCurBufIndex;
+  i2c_flags_t mCurFlags;
+  uint32_t mBaseICRFlags;
+
+  static void readNextByte() {
+    if (mCurBufIndex >= (mCurBufLen - 1)) {
+      atomic { mI2CState = I2C_STATE_READEND; }
+      if (mCurFlags & I2C_STOP) {
+	call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_DRFIE | ICR_ACKNAK | ICR_TB | ICR_STOP));
+      }
+      else if (mCurFlags & I2C_ACK_END) {
+	call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_DRFIE | ICR_TB));
+      }
+      else {
+	call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_DRFIE | ICR_ACKNAK | ICR_TB));
+      }
+    }
+    else {
+      atomic { mI2CState = I2C_STATE_READ; }
+      call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_DRFIE | ICR_TB));
+    }
+    return;
+  }
+
+  static void writeNextByte() {
+    if (mCurBufIndex >= mCurBufLen) {
+      atomic { mI2CState = I2C_STATE_WRITEEND; }
+      
+      if (mCurFlags & I2C_STOP) {
+	call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_TB | ICR_ITEIE | ICR_STOP));
+      }
+      
+      else {
+	call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_ITEIE | ICR_TB));
+      }
+      
+    }
+    else {
+      call I2C.setICR((mBaseICRFlags) | (ICR_ALDIE | ICR_ITEIE |ICR_TB));
+    }
+    return;
+  }
+  
+  static error_t startI2CTransact(uint8_t nextState, uint16_t addr, uint8_t length, uint8_t *data, 
+			   i2c_flags_t flags, bool bRnW) {
+    error_t error = SUCCESS;
+    uint8_t tmpAddr;
+
+    if ((data == NULL) || (length == 0)) {
+      return EINVAL;
+    }
+
+    atomic {
+      if (mI2CState == I2C_STATE_IDLE) {
+	mI2CState = nextState;
+	mCurTargetAddr = addr;
+	mCurBuf = data;
+	mCurBufLen = length;
+	mCurBufIndex = 0;
+	mCurFlags = flags;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error) {
+      return error;
+    }
+
+    if (flags & I2C_START) {
+
+      tmpAddr = (bRnW) ? 0x1 : 0x0;
+      tmpAddr |= ((addr << 1) & 0xFE);
+      call I2C.setIDBR(tmpAddr);
+      call I2C.setICR( mBaseICRFlags | ICR_ITEIE | ICR_TB | ICR_START);
+    }
+    else if (bRnW) {
+      atomic {
+	readNextByte();
+      }
+    }
+    else {
+      atomic {
+	writeNextByte();
+      }
+    }
+    return error;
+  }
+
+
+  task void handleReadError() {
+    call I2C.setISAR(0x7F0);
+    call I2C.setICR(mBaseICRFlags | ICR_MA);
+    call I2C.setICR(ICR_UR);
+    call I2C.setICR(mBaseICRFlags);
+    atomic {
+      mI2CState = I2C_STATE_IDLE;
+      signal I2CPacket.readDone(FAIL,mCurTargetAddr,mCurBufLen,mCurBuf);
+    }
+    return;
+  }
+    
+  task void handleWriteError() {
+    call I2C.setISAR(0x7F0);
+    call I2C.setICR(mBaseICRFlags | ICR_MA);
+    call I2C.setICR(ICR_UR);
+    call I2C.setICR(mBaseICRFlags);
+    atomic {
+      mI2CState = I2C_STATE_IDLE;
+      signal I2CPacket.writeDone(FAIL,mCurTargetAddr,mCurBufLen,mCurBuf);
+    }
+    return;
+  }
+
+  command error_t Init.init() {
+    atomic {
+      mBaseICRFlags = (fast_mode) ? (ICR_FM | ICR_BEIE | ICR_IUE | ICR_SCLE) : (ICR_BEIE | ICR_IUE | ICR_SCLE);
+
+      call I2CSCL.setGAFRpin(I2C_SCL_ALTFN);
+      call I2CSCL.setGPDRbit(TRUE);
+      call I2CSDA.setGAFRpin(I2C_SDA_ALTFN);
+      call I2CSDA.setGPDRbit(TRUE);
+
+      mI2CState = I2C_STATE_IDLE;
+      call I2C.setISAR(0);
+      call I2C.setICR(mBaseICRFlags | ICR_ITEIE | ICR_DRFIE);
+    }    
+    return SUCCESS;
+  }
+
+  async command error_t I2CPacket.read(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) {
+    error_t error = SUCCESS;
+
+    if ((flags & I2C_ACK_END) && (flags & I2C_STOP)) {
+      error = EINVAL;
+      return error;
+    }
+
+    if (flags & I2C_START) {
+      error = startI2CTransact(I2C_STATE_READSTART,addr,length,data,flags,TRUE);
+    }
+    else {
+      error = startI2CTransact(I2C_STATE_READ,addr,length,data,flags,TRUE);
+    }
+    
+    return error;
+  }
+
+  async command error_t I2CPacket.write(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data) {
+    error_t error = SUCCESS;
+
+    error = startI2CTransact(I2C_STATE_WRITE,addr,length,data,flags,FALSE);
+
+    return error;
+  }
+
+  async event void I2C.interruptI2C() {
+    uint32_t valISR;
+
+    // PXA27x Devel Guide is wrong.  You have to write to the ISR to clear the bits.
+    valISR = call I2C.getISR();
+    call I2C.setISR(ISR_ITE | ISR_IRF);
+
+    // turn off DRFIE and ITEIE
+    //call I2C.setICR((call I2C.getICR()) & ~(ICR_DRFIE | ICR_ITEIE));
+    //call I2C.setICR(mBaseICRFlags);
+
+    switch (mI2CState) {
+    case I2C_STATE_IDLE:
+      // Should never get here. Reset all pending interrupts.
+      break;
+
+    case I2C_STATE_READSTART:
+      if (valISR & (ISR_BED | ISR_ALD)) {
+	mI2CState = I2C_STATE_ERROR;
+	post handleReadError();
+	break;
+      }
+      readNextByte();
+      break;
+
+    case I2C_STATE_READ:
+      if (valISR & (ISR_BED | ISR_ALD)) {
+	mI2CState = I2C_STATE_ERROR;
+	post handleReadError();
+	break;
+      }
+      mCurBuf[mCurBufIndex] = call I2C.getIDBR();
+      mCurBufIndex++;
+      readNextByte();
+      break;
+
+    case I2C_STATE_READEND:
+      if (valISR & (ISR_BED | ISR_ALD)) {
+	mI2CState = I2C_STATE_ERROR;
+	post handleReadError();
+	break;
+      }
+      mCurBuf[mCurBufIndex] = call I2C.getIDBR();
+      mI2CState = I2C_STATE_IDLE;
+      signal I2CPacket.readDone(SUCCESS,mCurTargetAddr,mCurBufLen,mCurBuf);
+      break;
+
+    case I2C_STATE_WRITE:
+      if (valISR & (ISR_BED | ISR_ALD)) {
+	mI2CState = I2C_STATE_ERROR;
+	post handleWriteError();
+	break;
+      }
+      call I2C.setIDBR(mCurBuf[mCurBufIndex]);
+      mCurBufIndex++;
+      writeNextByte();
+
+      break;
+
+    case I2C_STATE_WRITEEND:
+      if (valISR & (ISR_BED | ISR_ALD)) {
+	mI2CState = I2C_STATE_ERROR;
+	post handleWriteError();
+	break;
+      }
+      mI2CState= I2C_STATE_IDLE;
+      //call I2C.setICR(call I2C.getICR() & ~I2C_STOP);
+      call I2C.setICR(mBaseICRFlags);
+      signal I2CPacket.writeDone(SUCCESS,mCurTargetAddr,mCurBufLen,mCurBuf);
+      break;
+
+    default:
+      break;
+    }
+
+      
+    return;
+  }
+
+  default async event void I2CPacket.readDone(error_t error, uint16_t addr, 
+					     uint8_t length, uint8_t* data) {
+    return;
+  }
+
+  default async event void I2CPacket.writeDone(error_t error, uint16_t addr, 
+						     uint8_t length, uint8_t* data) { 
+    return;
+  }
+
+  async event void I2CSDA.interruptGPIOPin() {}
+  async event void I2CSCL.interruptGPIOPin() {}
+}
diff --git a/tos/chips/pxa27x/i2c/HplPXA27xI2C.nc b/tos/chips/pxa27x/i2c/HplPXA27xI2C.nc
new file mode 100644
index 00000000..60614d20
--- /dev/null
+++ b/tos/chips/pxa27x/i2c/HplPXA27xI2C.nc
@@ -0,0 +1,56 @@
+/* $Id: HplPXA27xI2C.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * The PXA27x I2C HPL interface. 
+ *
+ * @author Phil Buonadonna
+ */
+
+interface HplPXA27xI2C
+{
+
+  async command uint32_t getIBMR();
+
+  async command void setIDBR(uint32_t val);
+  async command uint32_t getIDBR();
+
+  async command void setICR(uint32_t val);
+  async command uint32_t getICR();
+
+ async command void setISR(uint32_t val);
+  async command uint32_t getISR();
+  
+  async command void setISAR(uint32_t val);
+  async command uint32_t getISAR();
+
+  async event void interruptI2C();
+
+}
diff --git a/tos/chips/pxa27x/i2c/HplPXA27xI2CC.nc b/tos/chips/pxa27x/i2c/HplPXA27xI2CC.nc
new file mode 100644
index 00000000..aef97cba
--- /dev/null
+++ b/tos/chips/pxa27x/i2c/HplPXA27xI2CC.nc
@@ -0,0 +1,51 @@
+/* $Id: HplPXA27xI2CC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadona
+ */
+
+configuration HplPXA27xI2CC
+{
+  provides interface HplPXA27xI2C as I2C;
+}
+
+implementation
+{
+  components new HplPXA27xI2CP(0);
+  components HplPXA27xInterruptM;
+  components PlatformP;
+
+  I2C = HplPXA27xI2CP;
+
+  HplPXA27xI2CP.Init <- PlatformP.InitL1;
+  HplPXA27xI2CP.I2CIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_I2C];
+}
diff --git a/tos/chips/pxa27x/i2c/HplPXA27xI2CP.nc b/tos/chips/pxa27x/i2c/HplPXA27xI2CP.nc
new file mode 100644
index 00000000..2725b3e9
--- /dev/null
+++ b/tos/chips/pxa27x/i2c/HplPXA27xI2CP.nc
@@ -0,0 +1,166 @@
+/* $Id: HplPXA27xI2CP.nc,v 1.6 2008-09-08 03:10:23 regehr Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * The Private Hpl Interface for the I2C components. Handles enabling of the 
+ * clock for the interface.  It DOES NOT affect the I2C_IUE bit of the ICR
+ * register.
+ * 
+ * @param dev The I2C to use. 0 = Standard I2c, 1 = Power I2C
+ *
+ * @author Phil Buonadonna
+ */
+
+generic module HplPXA27xI2CP(uint8_t dev)
+{
+  provides interface Init;
+  provides interface HplPXA27xI2C as I2C; 
+
+  uses interface HplPXA27xInterrupt as I2CIrq;
+
+}
+
+implementation
+{
+  bool m_fInit = FALSE;
+
+  command error_t Init.init() {
+    bool isInited;
+
+    atomic {
+      isInited = m_fInit;
+      m_fInit = TRUE;
+    }
+
+    if (!isInited) {
+      switch(dev) {
+      case 0:
+	CKEN |= CKEN14_I2C;
+	ICR = 0;
+	break;
+      case 1:
+	CKEN |= CKEN15_PMI2C;
+	PICR = 0;
+	break;
+      default:
+	break;
+      }
+      call I2CIrq.allocate();
+      call I2CIrq.enable();
+    }
+
+    return SUCCESS;
+  }
+
+  async command uint32_t I2C.getIBMR() { 
+    switch(dev) {
+    case 0: return IBMR; break;
+    case 1: return PIBMR; break;
+    default: return 0;
+    }
+  }
+
+  async command void I2C.setIDBR(uint32_t val) {
+    switch(dev) {
+    case 0: IDBR = val; break;
+    case 1: PIDBR = val; break;
+    default: break;
+    }
+    return;
+  }
+
+  async command uint32_t I2C.getIDBR() { 
+    switch(dev) {
+    case 0: return IDBR;
+    case 1: return PIDBR;
+    default: return 0;
+    }
+  }
+
+  async command void I2C.setICR(uint32_t val) {
+    switch(dev) {
+    case 0: ICR = val; break;
+    case 1: PICR = val; break;
+    default: break;
+    }
+    return;
+  }
+
+  async command uint32_t I2C.getICR() { 
+    switch(dev) {
+    case 0: return ICR;
+    case 1: return PICR;
+    default: return 0;
+    }
+  }
+
+ async command void I2C.setISR(uint32_t val) { 
+    switch(dev) {
+    case 0: ISR = val; break;
+    case 1: PISR = val; break;
+    default: break;
+    }
+  }
+
+ async command uint32_t I2C.getISR() { 
+    switch(dev) {
+    case 0: return ISR;
+    case 1: return PISR;
+    default: return 0;
+    }
+  }
+
+  async command void I2C.setISAR(uint32_t val) {
+    switch(dev) {
+    case 0: ISAR = val; break;
+    case 1: PISAR = val; break;
+    default: break;
+    }
+    return;
+  }
+
+  async command uint32_t I2C.getISAR() { 
+    switch(dev) {
+    case 0: return ISAR; break;
+    case 1: return PISAR; break;
+    default: return 0;
+    }
+  }
+
+  async event void I2CIrq.fired() {
+    
+    signal I2C.interruptI2C();
+    return;
+  }
+
+  default async event void I2C.interruptI2C() { 
+    return;
+  }
+}
diff --git a/tos/chips/pxa27x/i2c/HplPXA27xPI2CC.nc b/tos/chips/pxa27x/i2c/HplPXA27xPI2CC.nc
new file mode 100644
index 00000000..d9cbe545
--- /dev/null
+++ b/tos/chips/pxa27x/i2c/HplPXA27xPI2CC.nc
@@ -0,0 +1,46 @@
+/* $Id: HplPXA27xPI2CC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+configuration HplPXA27xPI2CC
+{
+  provides interface HplPXA27xI2C as I2C;
+}
+
+implementation
+{
+  components new HplPXA27xI2CP(1);
+  components HplPXA27xInterruptM;
+  components PlatformP;
+
+  I2C = HplPXA27xI2CP;
+
+  HplPXA27xI2CP.Init <- PlatformP.InitL1;
+  HplPXA27xI2CP.I2CIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_PWR_I2C];
+}
diff --git a/tos/chips/pxa27x/inttypes.h b/tos/chips/pxa27x/inttypes.h
new file mode 100644
index 00000000..04091c61
--- /dev/null
+++ b/tos/chips/pxa27x/inttypes.h
@@ -0,0 +1,19 @@
+#ifndef __INTTYPES_H_
+#define __INTTYPES_H_
+
+typedef signed char int8_t;
+typedef unsigned char uint8_t;
+
+typedef short int16_t;
+typedef unsigned short uint16_t;
+
+typedef int int32_t;
+typedef unsigned int uint32_t;
+
+typedef long long int64_t;
+typedef unsigned long long uint64_t;
+
+typedef int32_t intptr_t;
+typedef uint32_t uintptr_t;
+
+#endif
diff --git a/tos/chips/pxa27x/p30/Flash.nc b/tos/chips/pxa27x/p30/Flash.nc
new file mode 100644
index 00000000..4d46c8c5
--- /dev/null
+++ b/tos/chips/pxa27x/p30/Flash.nc
@@ -0,0 +1,76 @@
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/**
+ * Interface for writing and erasing in flash memory
+ *
+ * Author:		Josh Herbach
+ * Revision:	1.0
+ * Date:		09/02/2005
+ */
+
+interface Flash
+{
+  /**
+   * Writes numBytes of the buffer data to the address in flash specified
+   * by addr. This function will only set bits low for the bytes it is 
+   * supposed to write to.If addr connot be written to for any reason returns
+   * FAIL, otherwise returns SUCCESS.
+   *
+   * @returns SUCCESS or FAIL.
+   */
+  command error_t write(uint32_t addr, uint8_t* data, uint32_t numBytes);
+
+  /**
+   * Erases the block of flash that contains addr, setting all bits to 1.
+   * If this function fails for any reason it will return FAIL, otherwise 
+   * SUCCESS.
+   *
+   * @returns SUCCESS or FAIL.
+   */
+  command error_t erase(uint32_t addr);
+
+  /**
+   * Reads len number of bytes into buf, starting at addr. If addr
+   * cannot be read for any reason returns FAIL, otherwise returns
+   * SUCCESS.
+  */
+  command error_t read(uint32_t addr, uint8_t* buf, uint32_t len);
+}
+
+
+
diff --git a/tos/chips/pxa27x/p30/FlashC.nc b/tos/chips/pxa27x/p30/FlashC.nc
new file mode 100644
index 00000000..5fbf140a
--- /dev/null
+++ b/tos/chips/pxa27x/p30/FlashC.nc
@@ -0,0 +1,17 @@
+/* 
+ * Author:		Josh Herbach
+ * Revision:	1.0
+ * Date:		09/02/2005
+ */
+
+configuration FlashC {
+  provides interface Flash;
+}
+implementation {
+  components 
+    Main,
+    FlashM;
+
+  Main.StdControl -> FlashM;
+  Flash = FlashM;
+}
diff --git a/tos/chips/pxa27x/p30/HalP30C.nc b/tos/chips/pxa27x/p30/HalP30C.nc
new file mode 100644
index 00000000..7df5abf9
--- /dev/null
+++ b/tos/chips/pxa27x/p30/HalP30C.nc
@@ -0,0 +1,50 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * P30 Hal component
+ * 
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+configuration HalP30C {
+  provides interface Flash;
+}
+
+implementation {
+  components HalP30P, HplP30P, MainC;
+
+  Flash = HalP30P;
+
+  MainC.SoftwareInit -> HalP30P;
+  HalP30P.HplP30 -> HplP30P;
+}
diff --git a/tos/chips/pxa27x/p30/HalP30P.nc b/tos/chips/pxa27x/p30/HalP30P.nc
new file mode 100644
index 00000000..5bd0f6cd
--- /dev/null
+++ b/tos/chips/pxa27x/p30/HalP30P.nc
@@ -0,0 +1,280 @@
+/* 
+ * Author:		Josh Herbach
+ * Revision:	1.0
+ * Date:		09/02/2005
+ */
+module HalP30P {
+  provides interface Init;
+  provides interface Flash; //does not allow writing into FLASH_PROTECTED_REGION
+  uses interface HplP30;
+}
+implementation {
+  
+#include <P30.h>
+
+  enum {
+    FLASH_STATE_READ_INACTIVE, 
+    FLASH_STATE_PROGRAM,
+    FLASH_STATE_ERASE,
+    FLASH_STATE_READ_ACTIVE
+  };
+
+  uint8_t FlashPartitionState[FLASH_PARTITION_COUNT];
+  uint8_t init = 0, programBufferSupported = 2, currBlock = 0;
+  
+  command error_t Init.init() {
+    int i = 0;
+    if(init != 0)
+      return SUCCESS;
+    init = 1;
+    for(i = 0; i < FLASH_PARTITION_COUNT; i++) 
+      FlashPartitionState[i] = FLASH_STATE_READ_INACTIVE;
+    
+    return SUCCESS;
+  }
+  
+  uint16_t writeHelper(uint32_t addr, uint8_t* data, uint32_t numBytes,
+		       uint8_t prebyte, uint8_t postbyte){
+    uint32_t i = 0, j = 0, k = 0;
+    error_t status;
+    uint16_t buffer[FLASH_PROGRAM_BUFFER_SIZE];
+    
+    if(numBytes == 0)
+      return FAIL;
+    
+    if(addr % 2 == 1){
+      status = call HplP30.progWord(addr - 1, prebyte | (data[i] << 8));
+      i++;
+      if(status != SUCCESS)
+	return FAIL;
+    }
+    
+    if(addr % 2 == numBytes % 2){
+      if(programBufferSupported == 1)
+	for(; i < numBytes; i = k){
+	  for(j = 0, k = i; k < numBytes && 
+		j < FLASH_PROGRAM_BUFFER_SIZE; j++, k+=2)
+	    buffer[j] = data[k] | (data[k + 1] << 8);
+	  status = call HplP30.progBuffer(addr + i, buffer, j);
+	  if(status != SUCCESS)
+	    return FAIL;
+	}
+      else
+	for(; i < numBytes; i+=2){
+	  status = call HplP30.progWord(addr + i, (data[i + 1] << 8) | data[i]);
+	  if(status != SUCCESS)
+	    return FAIL;
+	}
+    }
+    else{
+      if(programBufferSupported == 1)
+	for(; i < numBytes - 1; i = k){
+	  for(j = 0, k = i; k < numBytes - 1 && 
+		j < FLASH_PROGRAM_BUFFER_SIZE; j++, k+=2)
+	    buffer[j] = data[k] | (data[k + 1] << 8);
+	  status = call HplP30.progBuffer(addr + i, buffer, j);
+	  if(status != SUCCESS)
+	    return FAIL;
+	}
+      else
+	for(; i < numBytes - 1; i+=2){
+	  status = call HplP30.progWord(addr + i, (data[i + 1] << 8) | data[i]);
+	  if(status != SUCCESS)
+	    return FAIL;
+	}
+      status = call HplP30.progWord(addr + i, data[i] | (postbyte << 8));
+      if(status != SUCCESS)
+	return FAIL;
+    }
+    return SUCCESS;
+  }
+  
+  void writeExitHelper(uint32_t addr, uint32_t numBytes){
+    uint32_t i = 0;
+    for(i = addr / FLASH_PARTITION_SIZE;
+	i < (numBytes + addr) / FLASH_PARTITION_SIZE;
+	i++)
+      FlashPartitionState[i] = FLASH_STATE_READ_INACTIVE;
+  }
+  
+  command error_t Flash.write(uint32_t addr, uint8_t* data, uint32_t numBytes) {
+    uint32_t i;
+    uint16_t status;
+    uint8_t blocklen;
+    uint32_t blockAddr = (addr / P30_BLOCK_SIZE) * P30_BLOCK_SIZE;
+    
+    if(addr + numBytes > 0x02000000) //not in the flash memory space
+      return FAIL;
+    if(addr < FLASH_PROTECTED_REGION)
+      return FAIL;
+    
+    
+    for(i = 0; i < FLASH_PARTITION_COUNT; i++)
+      if(i != addr / FLASH_PARTITION_SIZE &&
+	 FlashPartitionState[i] != FLASH_STATE_READ_INACTIVE &&
+	 FlashPartitionState[i] != FLASH_STATE_READ_ACTIVE)
+	return FAIL;
+    
+    
+    for(i = addr / FLASH_PARTITION_SIZE;
+	i < (numBytes + addr) / FLASH_PARTITION_SIZE;
+	i++)
+      if(FlashPartitionState[i] != FLASH_STATE_READ_INACTIVE)
+	return FAIL;
+    
+    for(i = addr / FLASH_PARTITION_SIZE;
+	i < (numBytes + addr) / FLASH_PARTITION_SIZE;
+	i++)
+      FlashPartitionState[i] = FLASH_STATE_PROGRAM;
+
+    atomic{
+      for(blocklen = 0, i = blockAddr;
+	  i < addr + numBytes;
+	  i += P30_BLOCK_SIZE, blocklen++)
+	call HplP30.blkUnlock(i); //unlock(i);
+      
+      if(programBufferSupported == 2){
+	uint16_t testBuf[1];
+	
+	if(addr % 2 == 0){
+	  testBuf[0] = data[0] | ((*((uint8_t *)(addr + 1))) << 8);
+	  status = call HplP30.progBuffer(addr, testBuf, 1);
+	}
+	else{
+	  testBuf[0] = *((uint8_t *)(addr - 1)) | (data[0] << 8);
+	  status = call HplP30.progBuffer(addr - 1, testBuf, 1);
+	}      
+	if(status != SUCCESS)
+	  programBufferSupported = 0;
+	else 
+	  programBufferSupported = 1;
+      }
+    }
+    if(blocklen == 1){
+      atomic status = writeHelper(addr,data,numBytes,0xFF,0xFF);
+      if(status == FAIL){
+	writeExitHelper(addr, numBytes);
+	return FAIL;
+      }
+    }
+    else{
+      uint32_t bytesLeft = numBytes;
+      atomic status = writeHelper(addr,data, blockAddr + P30_BLOCK_SIZE - addr,0xFF,0xFF);
+      if(status == FAIL){
+	writeExitHelper(addr, numBytes);
+	return FAIL;
+      }
+      bytesLeft = numBytes - (P30_BLOCK_SIZE - (addr - blockAddr));
+      for(i = 1; i < blocklen - 1; i++){
+	atomic status = writeHelper(blockAddr + i * P30_BLOCK_SIZE, (uint8_t *)(data + numBytes - bytesLeft),
+				    P30_BLOCK_SIZE,0xFF,0xFF);
+	bytesLeft -= P30_BLOCK_SIZE;
+	if(status == FAIL){
+	  writeExitHelper(addr, numBytes);
+	  return FAIL;
+	}
+      }
+      atomic status = writeHelper(blockAddr + i * P30_BLOCK_SIZE, data + (numBytes - bytesLeft), bytesLeft, 0xFF,0xFF);
+      if(status == FAIL){
+	writeExitHelper(addr, numBytes);
+	return FAIL;
+      }
+    }
+    
+    writeExitHelper(addr, numBytes);
+    return SUCCESS;
+  }
+  
+  command error_t Flash.erase(uint32_t addr){
+    uint16_t status, i;
+    uint32_t j;
+    
+    if(addr > 0x02000000) //not in the flash memory space
+      return FAIL;
+    if(addr < FLASH_PROTECTED_REGION)
+      return FAIL;
+    
+    addr = (addr / P30_BLOCK_SIZE) * P30_BLOCK_SIZE;
+    
+    for(i = 0; i < FLASH_PARTITION_COUNT; i++)
+      if(i != addr / FLASH_PARTITION_SIZE &&
+	 FlashPartitionState[i] != FLASH_STATE_READ_INACTIVE &&
+	 FlashPartitionState[i] != FLASH_STATE_READ_ACTIVE)
+	return FAIL;
+    
+    if(FlashPartitionState[addr / FLASH_PARTITION_SIZE] != FLASH_STATE_READ_INACTIVE)
+      return FAIL;
+    
+    FlashPartitionState[addr / FLASH_PARTITION_SIZE] = FLASH_STATE_ERASE;
+    
+    for(j = 0; j < P30_BLOCK_SIZE; j++){
+      uint32_t tempCheck = *(uint32_t *)(addr + j);
+      if(tempCheck != 0xFFFFFFFF)
+	break;
+      if(j == P30_BLOCK_SIZE - 1){
+	FlashPartitionState[addr / FLASH_PARTITION_SIZE] = FLASH_STATE_READ_INACTIVE;
+	return SUCCESS;
+      }
+    }
+    atomic{
+      call HplP30.blkUnlock(addr);
+      //      status = eraseFlash(addr);
+      status = call HplP30.blkErase(addr);
+    }
+    FlashPartitionState[addr / FLASH_PARTITION_SIZE] = FLASH_STATE_READ_INACTIVE;
+    if(status != SUCCESS)
+      return FAIL;
+    
+    return SUCCESS;
+  }
+
+  // WARNING: Check the endien of this
+  command error_t Flash.read(uint32_t addr, uint8_t* buf, uint32_t len) {
+    error_t status;
+
+    uint8_t databyte;
+    /*
+    uint16_t dataword;
+    
+    while(len > 1) {
+      atomic {
+	status = call HplP30.readWordBurst(addr, &dataword);
+      }
+      if(status != SUCCESS)
+	return FAIL;
+      
+      *((uint16_t*) buf) = dataword;
+
+      addr += 2;
+      buf += 2;
+      len -= 2;
+    }
+
+    if(len == 1) {
+      atomic {
+	status = call HplP30.readWordBurst(addr, &dataword);
+      }
+      if(status != SUCCESS)
+	return FAIL;
+
+      *buf = (uint8_t) dataword;
+    }
+    */
+
+    while(len > 0) {
+      atomic {
+	status = call HplP30.readByteBurst(addr, &databyte);
+      }
+      if(status != SUCCESS)
+	return FAIL;
+      
+      *buf = databyte;
+
+      addr += 1;
+      buf += 1;
+      len -= 1;
+    }
+
+    return SUCCESS;
+  }
+}
diff --git a/tos/chips/pxa27x/p30/HplP30.nc b/tos/chips/pxa27x/p30/HplP30.nc
new file mode 100644
index 00000000..51b82649
--- /dev/null
+++ b/tos/chips/pxa27x/p30/HplP30.nc
@@ -0,0 +1,45 @@
+/* $Id: HplP30.nc,v 1.4 2006-12-12 18:23:12 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Phil Buonadonna
+ */
+
+interface HplP30 {
+
+  async command error_t progWord(uint32_t addr, uint16_t word);
+  async command error_t progBuffer(uint32_t addr, uint16_t *data, uint8_t len);
+  async command error_t blkErase(uint32_t blkaddr);
+  async command error_t blkLock(uint32_t blkaddr);
+  async command error_t blkUnlock(uint32_t blkaddr);
+
+  async command error_t readByteBurst(uint32_t addr, uint8_t* bytex);
+  async command error_t readWordBurst(uint32_t addr, uint16_t* word);
+}
diff --git a/tos/chips/pxa27x/p30/HplP30P.nc b/tos/chips/pxa27x/p30/HplP30P.nc
new file mode 100644
index 00000000..722342ec
--- /dev/null
+++ b/tos/chips/pxa27x/p30/HplP30P.nc
@@ -0,0 +1,179 @@
+/* $Id: HplP30P.nc,v 1.4 2006-12-12 18:23:12 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Phil Buonadonna
+ *
+ */
+#include <P30.h>
+module HplP30P {
+  provides interface HplP30;
+}
+
+implementation {
+
+  volatile uint16_t * devBaseAddress = (uint16_t *)(0x0);
+
+  async command error_t HplP30.progWord(uint32_t addr, uint16_t word) {
+    volatile uint16_t *blkAddress = (uint16_t *)addr;
+    uint32_t result;
+
+    *devBaseAddress = P30_READ_CLRSTATUS;
+    *blkAddress = P30_WRITE_WORDPRGSETUP;
+    *blkAddress = word;
+
+    do {
+      result = *blkAddress;
+    } while ((result & P30_SR_DWS) == 0);
+
+    *blkAddress = P30_READ_READARRAY;
+
+    if (result & (P30_SR_PS | P30_SR_VPPS | P30_SR_BLS)) {
+      return FAIL;
+    }
+
+    return SUCCESS;
+
+  }
+
+  async command error_t HplP30.progBuffer(uint32_t addr, uint16_t *data, uint8_t len) {
+    volatile uint16_t *blkAddress = (uint16_t *)addr;
+    uint32_t i,result;
+    error_t error = SUCCESS;
+
+    if (len <= 0) {
+      error = EINVAL;
+      goto done;
+    }
+
+    *devBaseAddress = P30_READ_CLRSTATUS;
+    *blkAddress = P30_WRITE_BUFPRG;
+
+    result = *blkAddress;
+    if ((result & P30_SR_DWS) == 0) {
+      error = FAIL;
+      goto cleanup;
+    }
+
+    *blkAddress = len-1;
+    
+    for (i=0;i<len;i++) {
+      blkAddress[i] = data[i];
+    }
+    
+    *blkAddress = P30_WRITE_BUFPRGCONFIRM;
+
+    do {
+      result = *blkAddress;
+    } while ((result & P30_SR_DWS) == 0);
+
+    if (result & (P30_SR_PS | P30_SR_VPPS)) {
+      error = FAIL;
+      goto done;
+    }
+  cleanup:
+    *blkAddress = P30_READ_READARRAY;
+  done:
+    return error;
+
+  }
+
+  async command error_t HplP30.blkErase(uint32_t blkaddr) {
+    volatile uint16_t *blkAddress = (uint16_t *)blkaddr;
+    uint32_t result;
+
+    *devBaseAddress = P30_READ_CLRSTATUS;
+    *blkAddress = P30_ERASE_BLKSETUP;
+    *blkAddress = P30_ERASE_BLKCONFIRM;
+
+    do {
+      result = *blkAddress;
+    } while ((result & P30_SR_DWS) == 0);
+
+    *blkAddress = P30_READ_READARRAY;
+
+    if (result & (P30_SR_ES | P30_SR_VPPS | P30_SR_BLS)) {
+      return FAIL;
+    }
+
+    return SUCCESS;
+
+  }
+
+  async command error_t HplP30.blkLock(uint32_t blkaddr) {
+    volatile uint16_t *blkAddress = (uint16_t*) blkaddr;
+
+    asm volatile (
+		  ".align 5\n\t"
+		  "strh %0,[%3]\n\t"
+		  "strh %1,[%3]\n\t"
+		  "strh %2,[%3]\n\t"
+		  : 
+		  :"r" (P30_LOCK_SETUP), 
+		  "r" (P30_LOCK_LOCK), 
+		  "r" (P30_READ_READARRAY),
+		  "r" (blkaddr)
+		  );
+
+    return SUCCESS;
+  }
+
+  async command error_t HplP30.blkUnlock(uint32_t blkaddr) {
+
+    asm volatile (
+		  ".align 5\n\t"
+		  "strh %0,[%3]\n\t"
+		  "strh %1,[%3]\n\t"
+		  "strh %2,[%3]\n\t"
+		  : 
+		  : "r" (P30_LOCK_SETUP), 
+		  "r" (P30_LOCK_UNLOCK), 
+		  "r" (P30_READ_READARRAY),
+		  "r" (blkaddr)
+		  );
+
+    return SUCCESS;
+
+  }
+
+  /* THIS FUNCTION IS UNTESTED, USE READBYTEBURST FOR NOW */
+  async command error_t HplP30.readWordBurst(uint32_t addr, uint16_t* word) {
+    volatile uint16_t *blkAddress = (uint16_t *)addr;
+    *word = *blkAddress;
+    return SUCCESS;
+  }
+
+  async command error_t HplP30.readByteBurst(uint32_t addr, uint8_t* bytex) {
+    volatile uint8_t *blkAddress = (uint8_t *)addr;
+    *bytex = *blkAddress;
+    return SUCCESS;
+  }
+
+}
diff --git a/tos/chips/pxa27x/p30/P30.h b/tos/chips/pxa27x/p30/P30.h
new file mode 100644
index 00000000..834177ac
--- /dev/null
+++ b/tos/chips/pxa27x/p30/P30.h
@@ -0,0 +1,90 @@
+/* $Id: P30.h,v 1.4 2006-12-12 18:23:12 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Phil Buonadonna
+ */
+
+#ifndef _P30_H
+#define _P30_H
+
+#define P30_READ_READARRAY	(0x00FF)
+#define P30_READ_RSR		(0x0070)
+#define P30_READ_RCR		(0x0090)
+#define P30_READ_QUERY		(0x0098)
+#define P30_READ_CLRSTATUS	(0x0050)
+
+#define P30_WRITE_WORDPRGSETUP	(0x0040)
+#define P30_WRITE_ALTWORDPRGSETUP (0x0010)
+#define P30_WRITE_BUFPRG	(0x00E8)
+#define P30_WRITE_BUFPRGCONFIRM (0x00D0)
+#define P30_WRITE_BEFPSETUP	(0x0080)
+#define P30_WRITE_BEFPCONFIRM	(0x00D0)
+
+#define P30_ERASE_BLKSETUP	(0x0020)
+#define P30_ERASE_BLKCONFIRM	(0x00D0)
+
+#define P30_SUSPEND_SUSPEND	(0x00B0)
+#define P30_SUSPEND_RESUME	(0x00D0)
+
+#define P30_LOCK_SETUP		(0x0060)
+#define P30_LOCK_LOCK		(0x0001)
+#define P30_LOCK_LOCKDOWN	(0x002F)
+#define P30_LOCK_UNLOCK		(0x00D0)
+
+#define P30_PROT_PSRSETUP	(0x00C0)
+
+#define P30_CONFIG_RCRSETUP	(0x0060)
+#define P30_CONFIG_RCR		(0x0003)
+
+#define P30_SR_DWS		(1 << 7)
+#define P30_SR_ESS		(1 << 6)
+#define P30_SR_ES		(1 << 5)
+#define P30_SR_PS		(1 << 4)
+#define P30_SR_VPPS		(1 << 3)
+#define P30_SR_PSS		(1 << 2)
+#define P30_SR_BLS		(1 << 1)
+#define P30_SR_BWS		(1 << 0)
+
+#define P30_REGION_SIZE (0x100000)
+#define P30_BLOCK_SIZE	(0x20000)
+
+typedef struct p30_volume_info_t {
+  uint8_t base; // base block
+  uint8_t size; // num blocks
+} p30_volume_info_t;
+
+#define FLASH_PARTITION_COUNT 16
+#define FLASH_PARTITION_SIZE 0x200000
+#define FLASH_PROTECTED_REGION 0x00200000
+#define FLASH_PROGRAM_BUFFER_SIZE 32
+  //#define FLASH_NOT_SUPPORTED 0x100
+
+#endif /* _P30_H */
diff --git a/tos/chips/pxa27x/p30/P30BlockC.nc b/tos/chips/pxa27x/p30/P30BlockC.nc
new file mode 100644
index 00000000..cdc65a3a
--- /dev/null
+++ b/tos/chips/pxa27x/p30/P30BlockC.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+configuration P30BlockC {
+  provides interface BlockWrite as Write[ storage_volume_t volume ];
+  provides interface BlockRead as Read[ storage_volume_t volume ];
+}
+
+implementation {
+  components P30BlockP;
+  P30BlockP = Write;
+  P30BlockP = Read;
+
+  components HalP30C;
+  P30BlockP.Flash -> HalP30C;
+}
diff --git a/tos/chips/pxa27x/p30/P30BlockP.nc b/tos/chips/pxa27x/p30/P30BlockP.nc
new file mode 100644
index 00000000..c75c5cbd
--- /dev/null
+++ b/tos/chips/pxa27x/p30/P30BlockP.nc
@@ -0,0 +1,215 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+#include <P30.h>
+#include <StorageVolumes.h>
+
+module P30BlockP {
+  provides interface BlockRead as Read[ storage_volume_t block ];
+  provides interface BlockWrite as Write[ storage_volume_t block ];
+
+  uses interface Leds;
+  uses interface Flash;
+}
+
+implementation {
+  typedef enum {
+    S_IDLE,
+    S_READ,
+    S_WRITE,
+    S_ERASE,
+    S_CRC,
+    S_SYNC,
+
+  } p30_block_state_t;
+  norace p30_block_state_t m_state = S_IDLE;
+  storage_volume_t clientId = 0xff;
+  storage_addr_t clientAddr;
+  void* clientBuf;
+  storage_len_t clientLen;
+  error_t clientResult;
+
+  /*
+   * This is a helper function to translate from the client address
+   * space to the underlying HalP30 address space. This is necessary
+   * because HAL provides a flat 32MB interface.
+   */
+  uint32_t xlateAddr(storage_volume_t b, storage_addr_t addr) {
+    return P30_VMAP[b].base * FLASH_PARTITION_SIZE + addr;
+  }
+
+  task void signalDoneTask() {
+    switch(m_state) {
+    case S_WRITE:
+      m_state = S_IDLE;
+      signal Write.writeDone[clientId](clientAddr, clientBuf, clientLen, clientResult);
+      break;
+   case S_SYNC:
+      m_state = S_IDLE;
+      signal Write.syncDone[clientId](SUCCESS);
+      break;
+    case S_ERASE:
+      m_state = S_IDLE;
+      signal Write.eraseDone[clientId](clientResult);
+      break;
+   case S_READ:
+      m_state = S_IDLE;
+      signal Read.readDone[clientId](clientAddr, clientBuf, clientLen, clientResult);
+      break;
+    default:
+      break;
+    }
+  }
+
+  /*
+   * Translate the address to a physical flash address and do the
+   * write.
+   */
+  command error_t Write.write[ storage_volume_t b ]( storage_addr_t addr, 
+						    void* buf, 
+						    storage_len_t len ) {
+    uint32_t physAddr;
+
+    if(m_state != S_IDLE)
+      return EBUSY;
+
+    // error check
+    if(addr + len > P30_VMAP[b].size * FLASH_PARTITION_SIZE)
+      return EINVAL;
+
+    clientId = b;
+    clientAddr = addr;
+    clientBuf = buf;
+    clientLen = len;
+
+    m_state = S_WRITE;
+
+    physAddr = xlateAddr(b, addr);
+
+    clientResult = call Flash.write(physAddr, (uint8_t*) buf, len);
+
+    post signalDoneTask();
+    return SUCCESS;
+  }
+  
+  /*
+   * Sync doesn't really do anything because Intel PXA is
+   * write-through.
+   */
+  command error_t Write.sync[ storage_volume_t b ]() {
+
+    m_state = S_SYNC;
+    clientId = b;
+
+    post signalDoneTask();
+    return SUCCESS;
+  }
+  
+  /*
+   * Because each 2MB partition is divided into 128k erasable pieces,
+   * we must go through and erase all of them.
+   */
+  command error_t Write.erase[ storage_volume_t b ]() {
+   uint32_t physAddr;
+   uint32_t blocks;
+
+    if(m_state != S_IDLE)
+      return EBUSY;
+
+    clientId = b;
+
+    m_state = S_ERASE;
+    physAddr = xlateAddr(b,0);
+    for(blocks = ((P30_VMAP[b].size)*FLASH_PARTITION_SIZE)/P30_BLOCK_SIZE;
+	blocks > 0;
+	blocks--) {
+      clientResult = call Flash.erase(physAddr);
+      if(clientResult != SUCCESS)
+	break;
+      physAddr += P30_BLOCK_SIZE;
+    }
+
+    post signalDoneTask();
+    return SUCCESS;
+  }
+
+  /*
+   * Translate the address to a physical flash address and do the
+   * read.
+   */
+  command error_t Read.read[ storage_volume_t b ]( storage_addr_t addr,
+						  void* buf,
+						  storage_len_t len ) {
+   uint32_t physAddr;
+
+    if(m_state != S_IDLE)
+      return FAIL;
+
+    clientId = b;
+    clientAddr = addr;
+    clientBuf = buf;
+    clientLen = len;
+
+    m_state = S_READ;
+    physAddr = xlateAddr(b,addr);
+
+    call Flash.read((uint32_t) physAddr, (uint8_t*) buf, (uint32_t) len);
+
+    post signalDoneTask();
+    return SUCCESS;
+  }
+  
+  
+  command error_t Read.computeCrc[ storage_volume_t b ]( storage_addr_t addr,
+							storage_len_t len,
+							uint16_t crc) {
+    m_state = S_CRC;
+    clientId = b;
+
+    post signalDoneTask();
+    return SUCCESS;
+  }
+
+  command storage_len_t Read.getSize[ storage_volume_t b]() {
+    return P30_VMAP[b].size * FLASH_PARTITION_SIZE;
+  }
+
+  default event void Write.writeDone[ storage_volume_t b ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {}
+  default event void Write.eraseDone[ storage_volume_t b ]( error_t error ) {}
+  default event void Write.syncDone[ storage_volume_t b ]( error_t error ) {}
+
+  default event void Read.readDone[ storage_volume_t b ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {}
+  default event void Read.computeCrcDone[ storage_volume_t b ]( storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error ) {}
+
+}
diff --git a/tos/chips/pxa27x/p30/P30ConfigC.nc b/tos/chips/pxa27x/p30/P30ConfigC.nc
new file mode 100644
index 00000000..ffedef9c
--- /dev/null
+++ b/tos/chips/pxa27x/p30/P30ConfigC.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+configuration P30ConfigC {
+  provides interface ConfigStorage[ storage_volume_t volume ];
+  provides interface Mount[ storage_volume_t volume ];
+}
+
+implementation {
+  components P30ConfigP, MainC;
+  ConfigStorage = P30ConfigP.Config;
+  Mount = P30ConfigP.Mount;
+
+  components HalP30C;
+  P30ConfigP.Flash -> HalP30C;
+}
diff --git a/tos/chips/pxa27x/p30/P30ConfigP.nc b/tos/chips/pxa27x/p30/P30ConfigP.nc
new file mode 100644
index 00000000..dbd239bc
--- /dev/null
+++ b/tos/chips/pxa27x/p30/P30ConfigP.nc
@@ -0,0 +1,322 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+#include <P30.h>
+#include <StorageVolumes.h>
+
+module P30ConfigP {
+  provides interface ConfigStorage as Config[ storage_volume_t v ];
+  provides interface Mount[ storage_volume_t v ];
+
+  uses interface Flash;
+  uses interface Leds;
+}
+
+implementation {
+  /*
+   * These are some macros for convenience. Essentially it is cutting
+   * a 2MB chunk into a two pieces. The size of the two pieces is
+   * hardcoded by C_PARTITION_sIZE. It must be a multiple of
+   * P30_BLOCK_SIZE because that is the erasable size. The bigger you
+   * make the C_PARTITION_SIZE, the longer commits will take because
+   * it must erase all the blocks inside. On the other hand, a larger
+   * C_PARTITION_SIZE will give you a larger address space. v is the
+   * parameterized interface that is used in the context of these
+   * macros.
+   */
+#define C_PARTITION_SIZE (P30_BLOCK_SIZE*1)
+#define C_PARTITION_0 (P30_VMAP[v].base * FLASH_PARTITION_SIZE)
+#define C_PARTITION_1 (P30_VMAP[v].base * FLASH_PARTITION_SIZE + C_PARTITION_SIZE)
+  typedef uint32_t version_t;
+
+  enum {
+    /*
+     * WARNING: AT45DB has a RAM buffer that allows writes to occur
+     * without actually writing to flash. We simulate this because it
+     * makes rewrites a lot simpler. However, this essentially takes
+     * RAM overhead. However, Configstores are relatively small and
+     * the Intel PXA has a lot of main memory, so we do it anyway.
+     */
+    BUFFER_SIZE = 2048, 
+    INVALID_VERSION = 0xFFFFFFFF,
+    NUM_VOLS = _V_NUMVOLS_, //uniqueCount( "pxa27xp30.Volume" ),
+  };
+  
+  typedef enum {
+    S_IDLE,
+    S_MOUNT,
+    S_READ,
+    S_WRITE,
+    S_COMMIT,
+  } p30_config_state_t;
+  norace p30_config_state_t m_state = S_IDLE;
+
+  /*
+   * Each instantiation of a Configstore must keep certain state. This
+   * includes the current version of the page and the active address
+   * within that page since we are splitting it into two pieces. Each
+   * Configstore must also have its own RAM buffer for concurrent
+   * operations.
+   */ 
+  uint32_t currentVersion[NUM_VOLS];
+  uint32_t activeBaseAddr[NUM_VOLS];
+  uint8_t workBuf[BUFFER_SIZE*NUM_VOLS];
+
+  storage_volume_t clientId = 0xff;
+  storage_addr_t clientAddr;
+  void* clientBuf;
+  storage_len_t clientLen;
+  error_t clientResult;
+
+  task void signalDoneTask() {
+    switch(m_state) {
+    case S_MOUNT:
+      m_state = S_IDLE;
+      signal Mount.mountDone[clientId](clientResult);
+      break;
+    case S_WRITE:
+      m_state = S_IDLE;
+      signal Config.writeDone[clientId](clientAddr, clientBuf, clientLen, clientResult);
+      break;
+    case S_COMMIT:
+      m_state = S_IDLE;
+      signal Config.commitDone[clientId](SUCCESS);
+      break;
+    case S_READ:
+      m_state = S_IDLE;
+      signal Config.readDone[clientId](clientAddr, clientBuf, clientLen, clientResult);
+      break;
+    default:
+      break;
+    }
+  }
+
+  /* 
+   * Erase a config partition. It may be more than one P30 block size,
+   * so erase multiple times.
+   */
+  void eraseConfigPartition(uint32_t base) {
+    uint32_t blocks;
+    
+    for(blocks = C_PARTITION_SIZE / P30_BLOCK_SIZE;
+	blocks > 0;
+	blocks--) {
+      call Flash.erase(base);
+      base += P30_BLOCK_SIZE;
+    }
+  }
+
+  /*
+   * Read the data directly from the RAM buffer into the client
+   * buffer... Might be read from Flash depending on semantics
+   */
+  command error_t Config.read[storage_volume_t v](storage_addr_t addr,
+							  void* buf,
+							  storage_len_t len) {
+    uint32_t i;
+
+    clientId = v;
+    clientAddr = addr;
+    clientBuf = buf;
+    clientLen = len;
+
+    m_state = S_READ;
+
+    /*
+    for(i = addr; i < addr + len; i++) {
+      ((uint8_t*)buf)[i-addr] = workBuf[(v*BUFFER_SIZE)+i];
+    }
+    */
+    call Flash.read(activeBaseAddr[v] + addr,
+		    (uint8_t*) buf,
+		    len);
+    
+    post signalDoneTask();
+    
+    return SUCCESS;
+  }
+
+  /*
+   * Writes the client data into the given address in the RAM
+   * buffer. Data is not actually written to flash until the user
+   * commits.
+   */
+  command error_t Config.write[storage_volume_t v](storage_addr_t addr,
+							   void* buf,
+							   storage_len_t len) {
+    uint32_t i;
+
+    clientId = v;
+    clientAddr = addr;
+    clientBuf = buf;
+    clientLen = len;
+
+    // error check
+    if(addr + len > BUFFER_SIZE)
+      return FAIL; // out of my artificial bounds
+
+    m_state = S_WRITE;
+
+    for(i = addr; i < addr + len; i++)
+      workBuf[(v*BUFFER_SIZE)+i] = ((uint8_t*)buf)[i-addr];
+
+    clientResult = SUCCESS;
+    post signalDoneTask();
+    return SUCCESS;
+  }
+
+  /*
+   * Determine which partition to write to based on the current one
+   * that is active. Also update the version number. Version numbers
+   * are 0, 1, 2, or 3 and wraps around. Write the RAM buffer out
+   * first BEFORE writing the the new version number. After the
+   * version number is written, the active config is now atomically
+   * switched. Then update any other in memory metadata.
+   */
+  command error_t Config.commit[storage_volume_t v]() {
+    uint32_t destBaseAddr;
+
+    if(activeBaseAddr[v] == C_PARTITION_0)
+      destBaseAddr = C_PARTITION_1;
+    else
+      destBaseAddr = C_PARTITION_0;
+
+    m_state = S_COMMIT;
+
+    clientId = v;
+    clientResult = SUCCESS;
+
+    currentVersion[v] = (currentVersion[v] + 1) % 4;
+
+    // erase target flash area before writing to it
+    eraseConfigPartition(destBaseAddr);
+
+    // write RAM buffer out
+    call Flash.write(destBaseAddr,
+		     (uint8_t*) &workBuf[v*BUFFER_SIZE],
+		     BUFFER_SIZE);
+
+    call Flash.write(destBaseAddr + C_PARTITION_SIZE - sizeof(version_t),
+		     (uint8_t*) &currentVersion[v],
+		     sizeof(version_t));
+
+    activeBaseAddr[v] = destBaseAddr;
+
+    post signalDoneTask();
+    return SUCCESS;
+  }
+
+  /*
+   * The only metadata that needs to be saved is a version
+   * number. Thus you get the whole partition minus the version number
+   * in terms of space.
+   */
+  command storage_len_t Config.getSize[storage_volume_t v]() {
+    return C_PARTITION_SIZE - sizeof(version_t);
+  }
+
+  command bool Config.valid[storage_volume_t v]() {
+    return TRUE;
+  }
+
+  /*
+   * When a Configstore is mounted, it must do some initial
+   * book-keeping work. It first reads from the two pieces two
+   * determine, which one is the actual active one. Afterwards, we
+   * read from flash into the RAM buffer or else subsequent reads will
+   * not work.
+   */
+  command error_t Mount.mount[storage_volume_t v]() {
+    version_t v0;
+    version_t v1;
+
+    m_state = S_MOUNT;
+    clientResult = SUCCESS;
+    clientId = v;
+
+    currentVersion[v] = INVALID_VERSION;
+
+    // read version #s from both sectors and determine new one
+    // pick among 0 1 2 3 FFFF
+    call Flash.read(C_PARTITION_0 + C_PARTITION_SIZE - sizeof(version_t),
+		    (uint8_t*)&v0, sizeof(version_t));
+    call Flash.read(C_PARTITION_1 + C_PARTITION_SIZE - sizeof(version_t),
+		    (uint8_t*)&v1, sizeof(version_t));
+
+    // this logic in this could probably be simplified
+    if(v0 == INVALID_VERSION && v1 == INVALID_VERSION) {
+      // clean partition
+      activeBaseAddr[v] = C_PARTITION_0;
+      currentVersion[v] = 0;
+    }
+    else if(v1 == INVALID_VERSION) {
+      // use v0
+      activeBaseAddr[v] = C_PARTITION_0;
+      currentVersion[v] = v0;
+    }
+    else if(v0 == INVALID_VERSION) {
+      // use v1
+      activeBaseAddr[v] = C_PARTITION_1;
+      currentVersion[v] = v1;
+    }
+    else if((v0 + 1) % 4 == v1) {
+      // use v1
+      activeBaseAddr[v] = C_PARTITION_1;
+      currentVersion[v] = v1;
+    }
+    else if((v1 + 1) % 4 == v0) {
+      // use v0
+      activeBaseAddr[v] = C_PARTITION_0;
+      currentVersion[v] = v0;
+    }
+    else {
+      // corrupted? erase both, might want to improve this later
+      eraseConfigPartition(C_PARTITION_0);
+      eraseConfigPartition(C_PARTITION_1);
+      currentVersion[v] = 0;
+    }
+
+    // read into RAM buffer
+    call Flash.read(activeBaseAddr[v], (uint8_t*)&workBuf[v*BUFFER_SIZE], BUFFER_SIZE);
+
+    post signalDoneTask();
+    return SUCCESS;
+  }
+
+  default event void Config.readDone[storage_volume_t v](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void Config.writeDone[storage_volume_t v](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void Config.commitDone[storage_volume_t v](error_t error) {}
+  default event void Mount.mountDone[storage_volume_t v](error_t error) {}
+}
+
diff --git a/tos/chips/pxa27x/p30/P30LogC.nc b/tos/chips/pxa27x/p30/P30LogC.nc
new file mode 100644
index 00000000..e2d7d616
--- /dev/null
+++ b/tos/chips/pxa27x/p30/P30LogC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+configuration P30LogC {
+
+  provides interface LogWrite as Write[ storage_volume_t volume ];
+  provides interface LogRead as Read[ storage_volume_t volume ];
+
+  uses interface Get<bool> as Circular[ storage_volume_t block ];
+}
+
+implementation {
+  components P30LogP;
+
+  P30LogP = Write;
+  P30LogP = Read;
+
+  P30LogP = Circular;
+
+  components HalP30C;
+  P30LogP.Flash -> HalP30C;
+}
diff --git a/tos/chips/pxa27x/p30/P30LogCircularP.nc b/tos/chips/pxa27x/p30/P30LogCircularP.nc
new file mode 100644
index 00000000..ac6b1f44
--- /dev/null
+++ b/tos/chips/pxa27x/p30/P30LogCircularP.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+generic module P30LogCircularP( bool IS_CIRCULAR ) {
+
+  provides interface Get<bool> as Circular;
+
+}
+
+implementation {
+  
+  command bool Circular.get() {
+    return IS_CIRCULAR;
+  }
+
+}
diff --git a/tos/chips/pxa27x/p30/P30LogP.nc b/tos/chips/pxa27x/p30/P30LogP.nc
new file mode 100644
index 00000000..6754fdc1
--- /dev/null
+++ b/tos/chips/pxa27x/p30/P30LogP.nc
@@ -0,0 +1,584 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+#include <P30.h>
+#include <StorageVolumes.h>
+
+module P30LogP {
+  provides interface LogRead as Read[ storage_volume_t block ];
+  provides interface LogWrite as Write[ storage_volume_t block ];
+
+  uses interface Leds;
+  uses interface Flash;
+  uses interface Get<bool> as Circular[ storage_volume_t block ];
+}
+
+implementation {
+
+#define SEEK_BEGINNING (0x0)
+#define SEEK_EOL (0xFFFFFFFF)
+#define L_BASE_BLOCK(_x) (P30_VMAP[_x].base * FLASH_PARTITION_SIZE)
+#define L_PARTITIONS(_x) ((P30_VMAP[_x].size * FLASH_PARTITION_SIZE) / P30_BLOCK_SIZE)
+#define L_FULL_RECORD_SIZE (sizeof(record_data_t) + sizeof(record_meta_t))
+#define L_RECORD_DATA_SIZE 256
+#define L_MAX_RECORDS_PER_BLOCK (P30_BLOCK_SIZE / L_FULL_RECORD_SIZE) // page meta counts as one record
+  // _a = blockId (from parameterized interface), _b = page, _c = record
+#define L_RAW_OFFSET(_a,_b,_c) (L_BASE_BLOCK(_a) + (_b * P30_BLOCK_SIZE) + (_c * L_FULL_RECORD_SIZE))
+
+  enum {
+    INVALID_VERSION = 0xFFFFFFFF,
+    NUM_VOLS = _V_NUMVOLS_, //uniqueCount("pxa27xp30.Volume"),
+  };
+
+  enum {
+    PAGE_START = 0x0000,
+    PAGE_USED = 0xFFF0,
+    PAGE_AVAILABLE = 0xFFFF,
+  };
+  typedef struct page_meta_t {
+    uint16_t header;
+  } page_meta_t;
+
+  enum {
+    RECORD_VALID = 0x0000,
+    RECORD_INVALID = 0xFFF0,
+    RECORD_EMPTY = 0xFFFF,
+  };
+  typedef struct record_meta_t {
+    uint16_t status;
+    uint16_t length;
+  } record_meta_t;
+  typedef struct record_data_t {
+    uint8_t data[L_RECORD_DATA_SIZE];
+  } record_data_t;
+
+  typedef enum {
+    S_IDLE,
+    S_READ,
+    S_APPEND,
+    S_SYNC,
+    S_ERASE,
+    S_SEEK,
+  } p30_log_state_t;
+  norace p30_log_state_t m_state = S_IDLE;
+  storage_volume_t clientId = 0xff;
+  void* clientBuf;
+  storage_len_t clientLen;
+  error_t clientResult;
+
+  uint32_t firstBlock[NUM_VOLS]; // 0-15 for 2 MB
+  uint32_t lastBlock[NUM_VOLS]; // 0-15 for 2 MB
+  uint32_t nextFreeRecord[NUM_VOLS]; // 0-X depending on data size
+  storage_cookie_t readCookieOffset[NUM_VOLS]; // this is a raw offset
+  bool gbOverwriteOccured = FALSE;
+
+  /* This shuffles all the blocks when we run out of space. We have to
+   * do it in a special order so crash recovery is possible. We also
+   * have to write special bytes so we can rewrite to areas without
+   * doing a complete erase.
+   */
+  void shuffleBlocks(storage_volume_t block) {
+    page_meta_t pageMeta;
+    uint32_t pageCounter;
+    // 1. set the last block to USED, if it's already USED or START, then no effect
+    pageMeta.header = PAGE_USED;
+    call Flash.write(L_RAW_OFFSET(block, lastBlock[block], 0),
+		     (uint8_t*) &pageMeta,
+		     sizeof(page_meta_t));
+    // 2. if lastBlock + 1 is free, then set it as last block and the first record is free
+    pageCounter = (lastBlock[block] + 1) % L_PARTITIONS(block);
+    call Flash.read(L_RAW_OFFSET(block, pageCounter, 0),
+		    (uint8_t*) &pageMeta,
+		    sizeof(page_meta_t));
+    if(pageMeta.header == PAGE_AVAILABLE) {
+      nextFreeRecord[block] = 1;
+      lastBlock[block] = pageCounter;
+    }
+    else {
+      call Flash.erase(L_RAW_OFFSET(block, firstBlock[block], 0));
+      pageCounter = (firstBlock[block] + 1) % L_PARTITIONS(block);
+      pageMeta.header = PAGE_START;
+      call Flash.write(L_RAW_OFFSET(block, pageCounter, 0),
+		       (uint8_t*) &pageMeta,
+		       sizeof(page_meta_t));
+      nextFreeRecord[block] = 1;
+      lastBlock[block] = firstBlock[block];
+      firstBlock[block] = pageCounter;
+      gbOverwriteOccured = TRUE;
+    }
+  }
+
+  /*
+   * Converts a cookie to a page/record/offset tuple
+   */
+  void cookieToTuple(uint32_t cookie, storage_volume_t block,
+		     uint32_t *page, uint32_t *record, uint32_t *offset) {
+
+    uint32_t mypage;
+    uint32_t myrecord;
+    uint32_t myoffset;
+
+    mypage = (cookie - L_BASE_BLOCK(block)) / P30_BLOCK_SIZE;
+    cookie = (cookie - L_BASE_BLOCK(block)) % P30_BLOCK_SIZE;
+    myrecord = cookie / L_FULL_RECORD_SIZE;
+    myoffset = (cookie % L_FULL_RECORD_SIZE) - sizeof(record_meta_t);
+
+    *page = mypage;
+    *record = myrecord;
+    *offset = myoffset;
+  }
+
+  /*
+   * Ideally, Logstorage would require a mount too, but it doesn't so
+   * it's a total hack. Before any operation, we have to check if a
+   * mount occurred. Mount initializes the your logblock.
+   */
+  uint8_t mountBits[NUM_VOLS];
+  void myMount(storage_volume_t block) {
+    page_meta_t pageMeta;
+    record_meta_t recordMeta;
+    uint32_t pageCounter;
+    uint32_t recordCounter;
+
+    uint32_t freePages = 0;
+
+    if(mountBits[block] != 0)
+      return;
+
+    // scan all 128k pages for page meta
+
+    // annoying corner case of all free pages, write the first page as START
+    for(pageCounter = 0; pageCounter < L_PARTITIONS(block); pageCounter++) {
+      call Flash.read(L_RAW_OFFSET(block, pageCounter, 0),
+		      (uint8_t*)&pageMeta,
+		      sizeof(page_meta_t));
+      if(pageMeta.header == PAGE_AVAILABLE)
+	freePages++;
+    }
+    if(freePages == L_PARTITIONS(block)) {
+      pageMeta.header = PAGE_START;
+      call Flash.write(L_RAW_OFFSET(block, 0, 0), (uint8_t*) &pageMeta, sizeof(page_meta_t));
+    }
+
+    // if we find a START page, then we are done
+    for(pageCounter = 0; pageCounter < L_PARTITIONS(block); pageCounter++) {
+      call Flash.read(L_RAW_OFFSET(block, pageCounter, 0),
+		      (uint8_t*)&pageMeta,
+		      sizeof(page_meta_t));
+      if(pageMeta.header == PAGE_START) {
+	firstBlock[block] = pageCounter;
+	break;
+      }
+    }
+    // if we didn't find a START page, first page is right after AVAILABLE
+    if(pageCounter == L_PARTITIONS(block)) {
+      for(pageCounter = 0; pageCounter < L_PARTITIONS(block); pageCounter++) {
+	call Flash.read(L_RAW_OFFSET(block, pageCounter, 0),
+			(uint8_t*)&pageMeta,
+			sizeof(page_meta_t));
+	if(pageMeta.header == PAGE_AVAILABLE) {
+	  pageCounter = (pageCounter + 1) % L_PARTITIONS(block);
+	  firstBlock[block] = pageCounter;
+	  // mark that block as a START block
+	  pageMeta.header = PAGE_START;
+	  call Flash.write(L_RAW_OFFSET(block, pageCounter, 0),
+			   (uint8_t*) &pageMeta,
+			   sizeof(page_meta_t));
+	  break;
+	}
+      }
+    }
+    // now we scan for next free record location
+    pageCounter = firstBlock[block];
+    for(recordCounter = 1; recordCounter < L_MAX_RECORDS_PER_BLOCK; recordCounter++) {
+      call Flash.read(L_RAW_OFFSET(block, pageCounter, recordCounter),
+		      (uint8_t*) &recordMeta,
+		      sizeof(record_meta_t));
+      if(recordMeta.status == RECORD_EMPTY) {
+	nextFreeRecord[block] = recordCounter;
+	lastBlock[block] = pageCounter;
+	break;
+      }
+    }
+    // Didn't find a free record in the START block, search the first FREE block
+    if(recordCounter == L_MAX_RECORDS_PER_BLOCK) {
+      for(pageCounter = 0; pageCounter < L_PARTITIONS(block); pageCounter++) {
+	call Flash.read(L_RAW_OFFSET(block, pageCounter, 0),
+			(uint8_t*)&pageMeta,
+			sizeof(page_meta_t));
+	if(pageMeta.header == PAGE_AVAILABLE) {
+	  for(recordCounter = 1; recordCounter < L_MAX_RECORDS_PER_BLOCK; recordCounter++) {
+	    call Flash.read(L_RAW_OFFSET(block, pageCounter, recordCounter),
+			    (uint8_t*) &recordMeta,
+			    sizeof(record_meta_t));
+	    if(recordMeta.status == RECORD_EMPTY) {
+	      lastBlock[block] = pageCounter;
+	      nextFreeRecord[block] = recordCounter;
+	      goto mount_complete;
+	    }
+	  }
+	}
+      }
+      // if here, you didn't find the last block, it must be right before the START block
+      // special case the wrap around
+      if(firstBlock[block] == 0)
+	lastBlock[block] = L_PARTITIONS(block) - 1;
+      else
+	lastBlock[block] = firstBlock[block] - 1;
+      // that last block must be full, so shuffle it
+      shuffleBlocks(block);
+    }
+
+  mount_complete:
+    readCookieOffset[block] = SEEK_BEGINNING;
+    mountBits[block] = 1;
+  }
+
+  task void signalDoneTask() {
+    switch(m_state) {
+    case S_APPEND:
+      m_state = S_IDLE;
+      signal Write.appendDone[clientId](clientBuf, clientLen, gbOverwriteOccured, clientResult);
+      gbOverwriteOccured = FALSE;
+      break;
+    case S_SYNC:
+      m_state = S_IDLE;
+      signal Write.syncDone[clientId](SUCCESS);
+      break;
+    case S_ERASE:
+      m_state = S_IDLE;
+      signal Write.eraseDone[clientId](clientResult);
+      break;
+   case S_READ:
+      m_state = S_IDLE;
+      signal Read.readDone[clientId](clientBuf, clientLen, clientResult);
+      break;
+   case S_SEEK:
+      m_state = S_IDLE;
+      signal Read.seekDone[clientId](SUCCESS);
+      break;
+    default:
+      break;
+    }
+  }
+
+  /*
+   * Invariant should be that everytime after an append completes,
+   * nextFreeRecord should point to a valid free record slot. Uses
+   * nextFreeRecord to append.
+   */
+  command error_t Write.append[ storage_volume_t block ](void* buf, storage_len_t len) {
+    record_meta_t recordMeta;
+
+    myMount(block);
+    
+    // error check
+    if(len > L_RECORD_DATA_SIZE)
+      return EINVAL;
+
+    // if non circular log, fail
+    if((!call Circular.get[block]()) &&
+       (lastBlock[block] == (L_PARTITIONS(block) - 1)) &&
+       (nextFreeRecord[block] == (L_MAX_RECORDS_PER_BLOCK - 1)))
+      return FAIL;
+
+    m_state = S_APPEND;
+    clientId = block;
+    clientBuf = buf;
+    clientLen = len;
+
+    // if you try to log 0, just immediately succeed, this really shouldn't happen
+    if(len == 0) {
+      clientResult = SUCCESS;
+      post signalDoneTask();
+      return SUCCESS;
+    }
+
+    // if readCookie was on SEEK_EOL, adjust it back to here
+    if(readCookieOffset[block] == SEEK_EOL)
+      readCookieOffset[block] = L_RAW_OFFSET(block, lastBlock[block], nextFreeRecord[block]) + sizeof(record_meta_t);
+      
+    // use next free record, write the INVALID, write the data, write the VALID
+    recordMeta.status = RECORD_INVALID;
+    recordMeta.length = len;
+    call Flash.write(L_RAW_OFFSET(block, lastBlock[block], nextFreeRecord[block]),
+		     (uint8_t*) &recordMeta,
+		     sizeof(record_meta_t));
+    call Flash.write(L_RAW_OFFSET(block, lastBlock[block], nextFreeRecord[block]) +
+		     sizeof(record_meta_t),
+		     (uint8_t*) buf, len);
+    recordMeta.status = RECORD_VALID;
+    call Flash.write(L_RAW_OFFSET(block, lastBlock[block], nextFreeRecord[block]),
+		     (uint8_t*) &recordMeta,
+		     sizeof(record_meta_t));
+    nextFreeRecord[block]++;
+    // see if you need to adjust blocks or shuffle
+    if(nextFreeRecord[block] == L_MAX_RECORDS_PER_BLOCK)
+      shuffleBlocks(block);
+
+    clientResult = SUCCESS;
+    post signalDoneTask();
+    
+    return SUCCESS;
+  }
+
+  /*
+   * We use nextFreeRecord to get the cookie
+   */
+  command storage_cookie_t Write.currentOffset[ storage_volume_t block ]() {
+    myMount(block);
+
+    return L_RAW_OFFSET(block, lastBlock[block], nextFreeRecord[block]) +
+      sizeof(record_meta_t);
+  }
+
+  /*
+   * First we erase all the log data blocks so that they can be
+   * reused. Then we zero the cookies and then write them to our
+   * partitions like the append operation. If we crash in the middle,
+   * you may have to erase again. However, if an erase does fail, at
+   * least all your data will still be there, so that you can try
+   * again.
+   */
+  command error_t Write.erase[storage_volume_t block]() {
+    uint32_t i;
+
+    for(i = 0; i < L_PARTITIONS(block); i++) {
+      call Flash.erase(L_BASE_BLOCK(block) + (i * P30_BLOCK_SIZE));
+    }
+
+    mountBits[block] = 0;
+    myMount(block);
+
+    // ... starting block implicitly written by mount
+
+    m_state = S_ERASE;
+    clientId = block;
+    clientResult = SUCCESS;
+    post signalDoneTask();
+
+    return SUCCESS;
+  }
+
+  /*
+   * Sync does nothing really because unlike the AT45DB, Intel P30
+   * writes directly through.
+   */
+  command error_t Write.sync[storage_volume_t block]() {
+    myMount(block);
+
+    m_state = S_SYNC;
+    
+    clientId = block;
+    clientResult = SUCCESS;
+    
+    post signalDoneTask();
+    return SUCCESS;
+
+  }
+
+  /*
+   * Sanity check the read cookie and adjust for any other special
+   * cookies. Because you can seek to the byte, must it is saved in
+   * flash as records, you have to do a lot of tricky seeking, but
+   * it's done here. Also has to handle any pages that are spilled
+   * over.
+   */
+  command error_t Read.read[ storage_volume_t block ](void* buf, storage_len_t len) {
+    record_meta_t recordMeta;
+    uint32_t recordCounter;
+    uint32_t pageCounter;
+    uint32_t offset;
+
+    clientId = block;
+    clientBuf = buf;
+    clientResult = SUCCESS;
+
+    myMount(block);
+
+    m_state = S_READ;
+    
+    if(len == 0 || readCookieOffset[block] == SEEK_EOL) {
+      clientResult = SUCCESS;
+      clientLen = 0;
+      post signalDoneTask();
+      return SUCCESS;
+    }
+    
+    // adjust SEEK_BEGINNING to a real offset
+    if(readCookieOffset[block] == SEEK_BEGINNING) {
+      readCookieOffset[block] = L_RAW_OFFSET(block, firstBlock[block], 1) +
+	sizeof(record_meta_t);
+    }
+    
+    // convert the cookie to something useful
+    cookieToTuple(readCookieOffset[block], block, &pageCounter, &recordCounter, &offset);
+    // sanity check readCookie
+    call Flash.read(L_RAW_OFFSET(block, pageCounter, recordCounter),
+		    (uint8_t*) &recordMeta,
+		    sizeof(record_meta_t));
+    if((recordMeta.status == RECORD_VALID) && (offset > len)) {
+      readCookieOffset[block] = L_RAW_OFFSET(block, firstBlock[block], 0) + sizeof(record_meta_t);
+      cookieToTuple(readCookieOffset[block], block, &pageCounter, &recordCounter, &offset);
+    }
+
+    clientLen = 0; // reset how much actually read and count up
+
+    
+    while(len != 0) {
+      call Flash.read(L_RAW_OFFSET(block, pageCounter, recordCounter),
+		      (uint8_t*) &recordMeta,
+		      sizeof(record_meta_t));
+      if(recordMeta.status == RECORD_INVALID) {
+	goto advance_counter;
+      }
+      if(recordMeta.status == RECORD_EMPTY) {
+	readCookieOffset[block] = SEEK_EOL;
+	post signalDoneTask();
+	return SUCCESS;
+      }
+      // read partial block and finish
+      if(len < recordMeta.length + offset) {
+	call Flash.read(L_RAW_OFFSET(block, pageCounter, recordCounter) +
+			offset + sizeof(record_meta_t),
+			buf,
+			len);
+	offset = len;
+	buf = buf + len;
+	len = 0;
+      }
+      else {
+	call Flash.read(L_RAW_OFFSET(block, pageCounter, recordCounter) + 
+			offset + sizeof(record_meta_t),
+			buf,
+			recordMeta.length - offset);
+	clientLen = clientLen + recordMeta.length - offset;
+	len -= recordMeta.length - offset;
+	buf = buf + recordMeta.length - offset;
+	offset = 0;
+      
+      advance_counter:
+	recordCounter++;
+	if((recordCounter >= L_MAX_RECORDS_PER_BLOCK) && (pageCounter == lastBlock[block])) {
+	  readCookieOffset[block] = SEEK_EOL;
+	  post signalDoneTask();
+	  return SUCCESS;
+	}
+	// need to adjust page possibly if spills
+	// also need to check if reached end of log (lastBlock[block] or RECORD_AVAILABLE)
+	if(recordCounter >= L_MAX_RECORDS_PER_BLOCK) {
+	  pageCounter = (pageCounter + 1) % L_PARTITIONS(block);
+	  recordCounter = 1;
+	}
+      }
+    }
+
+    readCookieOffset[block] = L_RAW_OFFSET(block, pageCounter, recordCounter) +
+      sizeof(record_meta_t) + offset;
+    post signalDoneTask();
+    return SUCCESS;
+  }
+    
+  command storage_cookie_t Read.currentOffset[ storage_volume_t block ]() {
+    myMount(block);
+    return readCookieOffset[block];
+  }
+
+  /*
+   * Just set the cookie. If you seek into an invalid area, just set
+   * it at SEEK_BEGINNING.
+   */
+  command error_t Read.seek[ storage_volume_t block ](storage_cookie_t offset) {
+    uint32_t page;
+    uint32_t record;
+    uint32_t recordOffset;
+    record_meta_t recordMeta;
+    myMount(block);
+
+    clientId = block;
+    clientResult = SUCCESS;
+
+    m_state = S_SEEK;
+
+    readCookieOffset[block] = offset;
+
+    post signalDoneTask();      
+    
+    return SUCCESS;
+  }
+
+  /*
+   * Go through all the pages, if it's a free page, count whatever is
+   * available left. Add them all up.
+   */
+  command storage_len_t Read.getSize[ storage_volume_t block ]() {
+    storage_len_t len = 0;
+    uint32_t i;
+    uint32_t j;
+    page_meta_t pageMeta;
+    record_meta_t recordMeta;
+    
+    myMount(block);
+    
+    for(i = 0; i < L_PARTITIONS(block); i++) {
+      call Flash.read(L_RAW_OFFSET(block, i, j),
+		      (uint8_t*) &pageMeta,
+		      sizeof(page_meta_t));
+      if(pageMeta.header != PAGE_AVAILABLE) {
+	len = len + (sizeof(record_data_t) * L_MAX_RECORDS_PER_BLOCK);
+	continue;
+      }
+      for(j = 1; j < L_MAX_RECORDS_PER_BLOCK; j++) {
+	call Flash.read(L_RAW_OFFSET(block, i, j),
+			(uint8_t*) &recordMeta,
+			sizeof(record_meta_t));
+	if(recordMeta.status == RECORD_EMPTY) {
+	  len = len + ((L_MAX_RECORDS_PER_BLOCK - j) * sizeof(record_meta_t));
+	  break;
+	}
+      }
+    }
+    
+    return len;
+  }
+
+  default event void Read.readDone[ storage_volume_t block ](void* buf, storage_len_t len, error_t error) {}
+  default event void Read.seekDone[ storage_volume_t block ](error_t error) {}
+  default event void Write.appendDone[ storage_volume_t block ](void* buf, storage_len_t len, bool recordsLost, error_t error) {}
+
+  default event void Write.eraseDone[ storage_volume_t block ](error_t error) {}
+  default event void Write.syncDone[ storage_volume_t block ](error_t error) {}
+
+  default command bool Circular.get[ uint8_t id ]() { return FALSE; }
+}
diff --git a/tos/chips/pxa27x/p30/Storage_chip.h b/tos/chips/pxa27x/p30/Storage_chip.h
new file mode 100644
index 00000000..fd6b2c14
--- /dev/null
+++ b/tos/chips/pxa27x/p30/Storage_chip.h
@@ -0,0 +1,43 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Phil Buonadonna
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $
+ */
+
+#ifndef __STORAGE_CHIP_H__
+#define __STORAGE_CHIP_H__
+
+typedef uint8_t storage_volume_t;
+typedef uint8_t storage_block_t;
+typedef uint8_t storage_log_t;
+typedef uint8_t storage_config_t;
+
+#endif
diff --git a/tos/chips/pxa27x/pxa27x_registers.h b/tos/chips/pxa27x/pxa27x_registers.h
new file mode 100644
index 00000000..cffdb626
--- /dev/null
+++ b/tos/chips/pxa27x/pxa27x_registers.h
@@ -0,0 +1,1739 @@
+// $Id: pxa27x_registers.h,v 1.5 2008-06-11 00:46:23 razvanm Exp $ 
+
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors:		Phil Buonadonna
+ *
+ * Edits:	Josh Herbach, Konrad Lorincz
+ * Revised: 09/19/2005
+ */
+
+#ifndef _PXA27X_REGISTER_H
+#define _PXA27X_REGISTER_H
+
+
+#define _PXAREG(_addr)	(*((volatile uint32_t *)(_addr)))
+#define _PXAREG_OFFSET(_addr,_off) (_PXAREG((uint32_t)(_addr) + (uint32_t)(_off)))
+
+					
+/******************************************************************************/
+/* Memory Controller */
+/******************************************************************************/
+#define MDCNFG	_PXAREG(0x48000000) /* SDRAM Configuration register 6-43 */
+#define MDREFR	_PXAREG(0x48000004) /* SDRAM Refresh Control register 6-53 */
+#define MSC0	_PXAREG(0x48000008) /* Static Memory Control register 0 6-63 */
+#define MSC1	_PXAREG(0x4800000C) /* Static Memory Control register 1 6-63 */
+#define MSC2	_PXAREG(0x48000010) /* Static Memory Control register 2 6-63 */
+#define MECR	_PXAREG(0x48000014) /* Expansion Memory (PC Card/CompactFlash) Bus Configuration register 6-79 */
+#define SXCNFG	_PXAREG(0x4800001C) /* Synchronous Static Memory Configuration register 6-58 */
+#define FLYCNFG	_PXAREG(0x48000020) /* Fly-by DMA DVAL<1:0> polarities 5-39 */
+#define MCMEM0	_PXAREG(0x48000028) /* PC Card Interface Common Memory Space Socket 0 Timing Configuration register 6-77 */
+#define MCMEM1	_PXAREG(0x4800002C) /* PC Card Interface Common Memory Space Socket 1 Timing Configuration register 6-77 */
+#define MCATT0	_PXAREG(0x48000030) /* PC Card Interface Attribute Space Socket 0 Timing Configuration register 6-77 */
+#define MCATT1	_PXAREG(0x48000034) /* PC Card Interface Attribute Space Socket 1 Timing Configuration register 6-77 */
+#define MCIO0	_PXAREG(0x48000038) /* PC Card Interface I/o Space Socket 0 Timing Configuration register 6-78 */
+#define MCIO1	_PXAREG(0x4800003C) /* PC Card Interface I/o Space Socket 1 Timing Configuration register 6-78 */
+#define MDMRS	_PXAREG(0x48000040) /* SDRAM Mode Register Set Configuration register 6-49 */
+#define BOOT_DEF	_PXAREG(0x48000044) /* Boot Time Default Configuration register 6-75 */
+#define ARB_CNTL	_PXAREG(0x48000048) /* Arbiter Control register 29-2 */
+#define BSCNTR0	_PXAREG(0x4800004C) /* System Memory Buffer Strength Control register 0 6-81 */
+#define BSCNTR1	_PXAREG(0x48000050) /* System Memory Buffer Strength Control register 1 6-82 */
+#define LCDBSCNTR	_PXAREG(0x48000054) /* LCD Buffer Strength Control register 7-102 */
+#define MDMRSLP	_PXAREG(0x48000058) /* Special Low Power SDRAM Mode Register Set Configuration register 6-51 */
+#define BSCNTR2	_PXAREG(0x4800005C) /* System Memory Buffer Strength Control register 2 6-83 */
+#define BSCNTR3	_PXAREG(0x48000060) /* System Memory Buffer Strength Control register 3 6-84 */
+#define SA1110	_PXAREG(0x48000064) /* SA-1110 Compatibility Mode for Static Memory register 6-70 */
+
+/* MDCNFG Bit Defs */
+#define MDCNFG_MDENX		(1 << 31)
+#define MDCNFG_DCACX2		(1 << 30)
+#define MDCNFG_DSA1110_2	(1 << 28)
+#define MDCNFG_DADDR2		(1 << 26)
+#define MDCNFG_DTC2(_x)		(((_x) & 0x3) << 24)
+#define MDCNFG_DNB2		(1 << 23)
+#define MDCNFG_DRAC2(_x)	(((_x) & 0x3) << 21)
+#define MDCNFG_DCAC2(_x)	(((_x) & 0x3) << 19)
+#define MDCNFG_DWID2		(1 << 18)
+#define MDCNFG_DE3		(1 << 17)
+#define MDCNFG_DE2		(1 << 16)
+#define MDCNFG_STACK1		(1 << 15)
+#define MDCNFG_DCACX0		(1 << 14)
+#define MDCNFG_STACK0		(1 << 13)
+#define MDCNFG_DSA1110_0	(1 << 12)
+#define MDCNFG_DADDR0		(1 << 10)
+#define MDCNFG_DTC0(_x)		(((_x) & 0x3) << 8)
+#define MDCNFG_DNB0		(1 << 7)
+#define MDCNFG_DRAC0(_x)	(((_x) & 0x3) << 5)
+#define MDCNFG_DCAC0(_x)	(((_x) & 0x3) << 3)
+#define MDCNFG_DWID0		(1 << 2)
+#define MDCNFG_DE1		(1 << 1)
+#define MDCNFG_DE0		(1 << 0)
+#define MDCNFG_SETALWAYS	((1 << 27) | (1 << 11))
+
+/* MDREFR Bit Defs */
+#define MDREFR_ALTREFA	(1 << 31)	/* */
+#define MDREFR_ALTREFB	(1 << 30)	/* */
+#define MDREFR_K0DB4	(1 << 29)	/* */
+#define MDREFR_K2FREE	(1 << 25)	/* */
+#define MDREFR_K1FREE	(1 << 24)	/* */
+#define MDREFR_K0FREE	(1 << 23)	/* */
+#define MDREFR_SLFRSH	(1 << 22)	/* */
+#define MDREFR_APD	(1 << 20)	/* */
+#define MDREFR_K2DB2	(1 << 19)	/* */
+#define MDREFR_K2RUN	(1 << 18)	/* */
+#define MDREFR_K1DB2	(1 << 17)	/* */
+#define MDREFR_K1RUN	(1 << 16)	/* */
+#define MDREFR_E1PIN	(1 << 15)	/* */
+#define MDREFR_K0DB2	(1 << 14)	/* */
+#define MDREFR_K0RUN	(1 << 13)	/* */
+#define MDREFR_DRI(_x)  ((_x) & 0xfff) /* */
+
+/* MSCx Bit Defs */
+#define MSC_RBUFF135	(1 << 31)		 /* Return Data Buff vs. Streaming  nCS 1,3 or 5 */
+#define MSC_RRR135(_x)	(((_x) & (0x7)) << 28)	/* ROM/SRAM Recovery Time  nCS 1,3 or 5 */
+#define MSC_RDN135(_x)	(((_x) & (0x7)) << 24)	/* ROM Delay Next Access nCS 1,3 or 5 */
+#define MSC_RDF135(_x)	(((_x) & (0x7)) << 20)	/* ROM Delay First Access nCS 1,3 or 5 */
+#define MSC_RBW135	(1 << 19)		/* ROM Bus Width nCS 1,3 or 5 */
+#define MSC_RT135(_x)	(((_x) & (0x7)) << 16)	/* ROM Type  nCS 1,3 or 5 */
+#define MSC_RBUFF024	(1 << 15)		/* Return Data Buff vs. Streaming  nCS 0,2 or 4 */
+#define MSC_RRR024(_x)	(((_x) & (0x7)) << 12)	/* ROM/SRAM Recover Time  nCS 0,2 or 4 */
+#define MSC_RDN024(_x)	(((_x) & (0x7)) << 8)	/* ROM Delay Next Access  nCS 0,2 or 4 */
+#define MSC_RDF024(_x)	(((_x) & (0x7)) << 4)	/* ROM Delay First Access  nCS 0,2 or 4 */
+#define MSC_RBW024	(1 << 3)		/* ROM Bus Width  nCS 0,2 or 4 */
+#define MSC_RT024(_x)	(((_x) & (0x7)) << 0)	/* ROM Type  nCS 0,2 or 4 */
+
+/* SXCNFG Bit defs */
+#define SXCNFG_SXEN0 (1)
+#define SXCNFG_SXEN1 (1<<1)
+#define SXCNFG_SXCL0(_x) (((_x) & 0x7) << 2)
+#define SXCNFG_SXTP0(_x) (((_x) & 0x3) << 12)
+#define SXCNFG_SXCLEXT0 (1<<15)
+
+/* ARB_CNTL Bit defs */
+#define ARB_CNTL_DMA_SLV_PARK (1 << 31) 
+#define ARB_CNTL_CI_PARK (1 << 30) 
+#define ARB_CNTL_EX_MEM_PARK (1 << 29) 
+#define ARB_CNTL_INT_MEM_PARK (1 << 28) 
+#define ARB_CNTL_USB_PARK (1 << 27) 
+#define ARB_CNTL_LCD_PARK (1 << 26) 
+#define ARB_CNTL_DMA_PARK (1 << 25) 
+#define ARB_CNTL_CORE_PARK (1 << 24) 
+#define ARB_CNTL_LOCK_FLAG (1 << 23) 
+#define ARB_CNTL_LCD_WT(_wt) (((_wt) & 0xF) << 8)
+#define ARB_CNTL_DMA_WT(_wt) (((_wt) & 0xF) << 4)
+#define ARB_CNTL_CORE_WT(_wt) (((_wt) & 0xF) << 0)
+
+/* SA1110 Bit defs */
+#define SA1110_SXSTACK(_x) (((_x) & 0x3) << 12)
+/******************************************************************************/
+/* LCD Controller */
+/******************************************************************************/
+#define LCCR0	_PXAREG(0x44000000) /* LCD Controller Control register 0 7-56 */
+#define LCCR1	_PXAREG(0x44000004) /* LCD Controller Control register 1 7-64 */
+#define LCCR2	_PXAREG(0x44000008) /* LCD Controller Control register 2 7-66 */
+#define LCCR3	_PXAREG(0x4400000C) /* LCD Controller Control register 3 7-69 */
+#define LCCR4	_PXAREG(0x44000010) /* LCD Controller Control register 4 7-74 */
+#define LCCR5	_PXAREG(0x44000014) /* LCD Controller Control register 5 7-77 */
+#define FBR0	_PXAREG(0x44000020) /* DMA Channel 0 Frame Branch register 7-101 */
+#define FBR1	_PXAREG(0x44000024) /* DMA Channel 1 Frame Branch register 7-101 */
+#define FBR2	_PXAREG(0x44000028) /* DMA Channel 2 Frame Branch register 7-101 */
+#define FBR3	_PXAREG(0x4400002C) /* DMA Channel 3 Frame Branch register 7-101 */
+#define FBR4	_PXAREG(0x44000030) /* DMA Channel 4 Frame Branch register 7-101 */
+#define LCSR1	_PXAREG(0x44000034) /* LCD Controller Status register 1 7-109 */
+#define LCSR0	_PXAREG(0x44000038) /* LCD Controller Status register 0 7-104 */
+#define LIIDR	_PXAREG(0x4400003C) /* LCD Controller Interrupt ID register 7-116 */
+#define TRGBR	_PXAREG(0x44000040) /* TMED RGB Seed register 7-97 */
+#define TCR	_PXAREG(0x44000044) /* TMED Control register 7-98 */
+#define OVL1C1	_PXAREG(0x44000050) /* Overlay 1 Control register 1 7-90 */
+#define OVL1C2	_PXAREG(0x44000060) /* Overlay 1 Control register 2 7-91 */
+#define OVL2C1	_PXAREG(0x44000070) /* Overlay 2 Control register 1 7-92 */
+#define OVL2C2	_PXAREG(0x44000080) /* Overlay 2 Control register 2 7-94 */
+#define CCR	_PXAREG(0x44000090) /* Cursor Control register 7-95 */
+#define CMDCR	_PXAREG(0x44000100) /* Command Control register 7-96 */
+#define PRSR	_PXAREG(0x44000104) /* Panel Read Status register 7-103 */
+#define FBR5	_PXAREG(0x44000110) /* DMA Channel 5 Frame Branch register 7-101 */
+#define FBR6	_PXAREG(0x44000114) /* DMA Channel 6 Frame Branch register 7-101 */
+#define FDADR0	_PXAREG(0x44000200) /* DMA Channel 0 Frame Descriptor Address register 7-100 */
+#define FSADR0	_PXAREG(0x44000204) /* DMA Channel 0 Frame Source Address register 7-117 */
+#define FIDR0	_PXAREG(0x44000208) /* DMA Channel 0 Frame ID register 7-117 */
+#define LDCMD0	_PXAREG(0x4400020C) /* LCD DMA Channel 0 Command register 7-118 */
+#define FDADR1	_PXAREG(0x44000210) /* DMA Channel 1 Frame Descriptor Address register 7-100 */
+#define FSADR1	_PXAREG(0x44000214) /* DMA Channel 1 Frame Source Address register 7-117 */
+#define FIDR1	_PXAREG(0x44000218) /* DMA Channel 1 Frame ID register 7-117 */
+#define LDCMD1	_PXAREG(0x4400021C) /* LCD DMA Channel 1 Command register 7-118 */
+#define FDADR2	_PXAREG(0x44000220) /* DMA Channel 2 Frame Descriptor Address register 7-100 */
+#define FSADR2	_PXAREG(0x44000224) /* DMA Channel 2 Frame Source Address register 7-117 */
+#define FIDR2	_PXAREG(0x44000228) /* DMA Channel 2 Frame ID register 7-117 */
+#define LDCMD2	_PXAREG(0x4400022C) /* LCD DMA Channel 2 Command register 7-118 */
+#define FDADR3	_PXAREG(0x44000230) /* DMA Channel 3 Frame Descriptor Address register 7-100 */
+#define FSADR3	_PXAREG(0x44000234) /* DMA Channel 3 Frame Source Address register 7-117 */
+#define FIDR3	_PXAREG(0x44000238) /* DMA Channel 3 Frame ID register 7-117 */
+#define LDCMD3	_PXAREG(0x4400023C) /* LCD DMA Channel 3 Command register 7-118 */
+#define FDADR4	_PXAREG(0x44000240) /* DMA Channel 4 Frame Descriptor Address register 7-100 */
+#define FSADR4	_PXAREG(0x44000244) /* DMA Channel 4 Frame Source Address register 7-117 */
+#define FIDR4	_PXAREG(0x44000248) /* DMA Channel 4 Frame ID register 7-117 */
+#define LDCMD4	_PXAREG(0x4400024C) /* LCD DMA Channel 4 Command register 7-118 */
+#define FDADR5	_PXAREG(0x44000250) /* DMA Channel 5 Frame Descriptor Address register 7-100 */
+#define FSADR5	_PXAREG(0x44000254) /* DMA Channel 5 Frame Source Address register 7-117 */
+#define FIDR5	_PXAREG(0x44000258) /* DMA Channel 5 Frame ID register 7-117 */
+#define LDCMD5	_PXAREG(0x4400025C) /* LCD DMA Channel 5 Command register 7-118 */
+#define FDADR6	_PXAREG(0x44000260) /* DMA Channel 6 Frame Descriptor Address register 7-100 */
+#define FSADR6	_PXAREG(0x44000264) /* DMA Channel 6 Frame Source Address register 7-117 */
+#define FIDR6	_PXAREG(0x44000268) /* DMA Channel 6 Frame ID register 7-117 */
+#define LDCMD6	_PXAREG(0x4400026C) /* LCD DMA Channel 6 Command register 7-118 */
+#define LCDBSCNTR	_PXAREG(0x48000054) /* LCD Buffer Strength Control register 7-102 */
+
+
+/******************************************************************************/
+/* USB Host Controller */
+/******************************************************************************/
+#define UHCREV	_PXAREG(0x4C000000) /* UHC HCI Spec Revision register 20-10 */
+#define UHCHCON	_PXAREG(0x4C000004) /* UHC Host Control register 20-10 */
+#define UHCCOMS	_PXAREG(0x4C000008) /* UHC Command Status register 20-14 */
+#define UHCINTS	_PXAREG(0x4C00000C) /* UHC Interrupt Status register 20-16 */
+#define UHCINTE	_PXAREG(0x4C000010) /* UHC Interrupt Enable register 20-18 */
+#define UHCINTD	_PXAREG(0x4C000014) /* UHC Interrupt Disable register 20-20 */
+#define UHCHCCA	_PXAREG(0x4C000018) /* UHC Host Controller Communication Area register 20-21 */
+#define UHCPCED	_PXAREG(0x4C00001C) /* UHC Period Current Endpoint Descriptor register 20-21 */
+#define UHCCHED	_PXAREG(0x4C000020) /* UHC Control Head Endpoint Descriptor register 20-22 */
+#define UHCCCED	_PXAREG(0x4C000024) /* UHC Control Current Endpoint Descriptor register 20-22 */
+#define UHCBHED	_PXAREG(0x4C000028) /* UHC Bulk Head Endpoint Descriptor register 20-23 */
+#define UHCBCED	_PXAREG(0x4C00002C) /* UHC Bulk Current Endpoint Descriptor register 20-24 */
+#define UHCDHEAD	_PXAREG(0x4C000030) /* UHC Done Head register 20-25 */
+#define UHCFMI	_PXAREG(0x4C000034) /* UHC Frame Interval register 20-26 */
+#define UHCFMR	_PXAREG(0x4C000038) /* UHC Frame Remaining register 20-27 */
+#define UHCFMN	_PXAREG(0x4C00003C) /* UHC Frame Number register 20-28 */
+#define UHCPERS	_PXAREG(0x4C000040) /* UHC Periodic Start register 20-29 */
+#define UHCLST	_PXAREG(0x4C000044) /* UHC Low-Speed Threshold register 20-30 */
+#define UHCRHDA	_PXAREG(0x4C000048) /* UHC Root Hub Descriptor A register 20-31 */
+#define UHCRHDB	_PXAREG(0x4C00004C) /* UHC Root Hub Descriptor B register 20-33 */
+#define UHCRHS	_PXAREG(0x4C000050) /* UHC Root Hub Status register 20-34 */
+#define UHCRHPS1	_PXAREG(0x4C000054) /* UHC Root Hub Port 1 Status register 20-35 */
+#define UHCRHPS2	_PXAREG(0x4C000058) /* UHC Root Hub Port 2 Status register 20-35 */
+#define UHCRHPS3	_PXAREG(0x4C00005C) /* UHC Root Hub Port 3 Status register 20-35 */
+#define UHCSTAT	_PXAREG(0x4C000060) /* UHC Status register 20-39 */
+#define UHCHR	_PXAREG(0x4C000064) /* UHC Reset register 20-41 */
+#define UHCHIE	_PXAREG(0x4C000068) /* UHC Interrupt Enable register 20-44 */
+#define UHCHIT	_PXAREG(0x4C00006C) /* UHC Interrupt Test register 20-45 */
+
+
+/******************************************************************************/
+/* Quick Capture Interface */
+/******************************************************************************/
+#define CICR0	_PXAREG(0x50000000) /* Quick Capture Interface Control register 0 27-24 */
+#define CICR1	_PXAREG(0x50000004) /* Quick Capture Interface Control register 1 27-28 */
+#define CICR2	_PXAREG(0x50000008) /* Quick Capture Interface Control register 2 27-32 */
+#define CICR3	_PXAREG(0x5000000C) /* Quick Capture Interface Control register 3 27-33 */
+#define CICR4	_PXAREG(0x50000010) /* Quick Capture Interface Control register 4 27-34 */
+#define CISR	_PXAREG(0x50000014) /* Quick Capture Interface Status register 27-37 */
+#define CIFR	_PXAREG(0x50000018) /* Quick Capture Interface FIFO Control register 27-40 */
+#define CITOR	_PXAREG(0x5000001C) /* Quick Capture Interface Time-Out register 27-37 */
+#define CIBR0	_PXAREG(0x50000028) /* Quick Capture Interface Receive Buffer register 0 (Channel 0) 27-42 */
+#define CIBR1	_PXAREG(0x50000030) /* Quick Capture Interface Receive Buffer register 1 (Channel 1) 27-42 */
+#define CIBR2	_PXAREG(0x50000038) /* Quick Capture Interface Receive Buffer register 2 (Channel 2) 27-42 */
+
+
+/* Quick Capture Interface - Control Register 0 */
+#define CICR0_DMA_EN    (1 << 31)	/* DMA Request Enable */
+#define CICR0_EN        (1 << 28)	/* Quick Capture Interface Enable (and Quick Disable) */
+#define CICR0_TOM       (1 << 9)	/* Time-Out Interrupt Mask */
+#define CICR0_RDAVM     (1 << 8)	/* Receive-Data-Available Interrupt Mask */
+#define CICR0_FEM       (1 << 7)	/* FIFO-Empty Interrupt Mask */
+#define CICR0_EOLM      (1 << 6)	/* End-of-Line Interrupt Mask */
+#define CICR0_SOFM      (1 << 2)	/* Start-of-Frame Interrupt Mask */
+#define CICR0_EOFM      (1 << 1)	/* End-of-Frame Interrupt Mask */
+#define CICR0_FOM       (1 << 0)	/* FIFO Overrun Interrupt Mask */
+
+
+/* Quick Capture Interface - Control Register 1 */
+#define CICR1_TBIT      (1 << 31)   /* Transparency Bit */
+#define CICR1_RGBT_CONV(_data,_x)   ((_data & ~(0x7 << 29)) | (_x << 29))       /* RGBT Conversion */
+#define CICR1_PPL(_data,_x)         ((_data & ~(0x7ff << 15)) | (_x << 15))     /* Pixels per Line */
+#define CICR1_RGB_CONV(_data,_x)    ((_data & ~(0x7 << 12)) | (_x << 12))       /* RGB Bits per Pixel Conversion */
+#define CICR1_RGB_F     (1 << 11)   /* RGB Format */
+#define CICR1_YCBCR_F   (1 << 10)   /* YCbCr Format */
+#define CICR1_RGB_BPP(_data,_x)     ((_data & ~(0x7 << 7)) | (_x << 7))         /* RGB Bits per Pixel */
+#define CICR1_RAW_BPP(_data,_x)     ((_data & ~(0x3 << 5)) | (_x << 5))         /* Raw Bits per Pixel */
+#define CICR1_COLOR_SP(_data,_x)    ((_data & ~(0x3 << 3)) | (_x << 3))         /* Color Space */
+#define CICR1_DW(_data,_x)          ((_data & ~(0x7 << 0)) | (_x << 0))         /* Data Width */
+
+
+/* Quick Capture Interface - Control Register 3 */
+#define CICR3_LPF(_data,_x)	        ((_data & ~(0x7ff << 0)) | (_x << 0))       /* Lines per Frame */
+                                               
+/* Quick Capture Interface - Control Register 4 */
+#define CICR4_PCLK_EN   (1 << 23)   /* Pixel Clock Enable */
+#define CICR4_HSP       (1 << 21)	/* Horizontal Sync Polarity */
+#define CICR4_VSP       (1 << 20)	/* Vertical Sync Polarity */
+#define CICR4_MCLK_EN   (1 << 19)	/* MCLK Enable */
+#define CICR4_DIV(_data,_x)         ((_data & ~(0xff << 0)) | (_x << 0))        /* Clock Divisor */
+
+/* Quick Capture Interface - Status Register */
+#define CISR_FTO        (1 << 15)	/* FIFO Time-Out */
+#define CISR_RDAV_2     (1 << 14)	/* Channel 2 Receive Data Available */
+#define CISR_RDAV_1     (1 << 13)	/* Channel 1 Receive Data Available */
+#define CISR_RDAV_0     (1 << 12)	/* Channel 0 Receive Data Available */
+#define CISR_FEMPTY_2   (1 << 11)	/* Channel 2 FIFO Empty */
+#define CISR_FEMPTY_1   (1 << 10)	/* Channel 1 FIFO Empty */
+#define CISR_FEMPTY_0   (1 << 9)	/* Channel 0 FIFO Empty */
+#define CISR_EOL        (1 << 8)	/* End-of-Line */
+#define CISR_PAR_ERR    (1 << 7)	/* Parity Error */
+#define CISR_CQD        (1 << 6)	/* Quick Campture Interface Quick Dissable */
+#define CISR_CDD        (1 << 5)	/* Quick Campture Interface Quick Dissable Done */
+#define CISR_SOF        (1 << 4)	/* Start-of-Frame */
+#define CISR_EOF        (1 << 3)	/* End-of-Frame */
+#define CISR_IFO_2      (1 << 2)	/* FIFO Overrun for Channel 2 */
+#define CISR_IFO_1      (1 << 1)	/* FIFO Overrun for Channel 1 */
+#define CISR_IFO_0      (1 << 0)	/* FIFO Overrun for Channel 0 */
+
+
+/* Quick Capture Interface - FIFO Control Register */
+#define CIFR_FLVL0(_data,_x)        ((_data & ~(0xff << 8)) | (_x << 8))        /* FIFO 0 Level: value from 0-128 indicates the number of bytes */
+#define CIFR_THL_0(_data,_x)        ((_data & ~(0x3 << 4)) | (_x << 4))         /* Threshold Level for Channel 0 FIFO */
+#define CIFR_RESETF     (1 << 3)	/* Reset input FIFOs */
+
+
+
+
+/******************************************************************************/
+/* DMA Controller */
+/******************************************************************************/
+#define DCSR0	_PXAREG(0x40000000) /* DMA Control/Status register for Channel 0 5-41 */
+#define DCSR1	_PXAREG(0x40000004) /* DMA Control/Status register for Channel 1 5-41 */
+#define DCSR2	_PXAREG(0x40000008) /* DMA Control/Status register for Channel 2 5-41 */
+#define DCSR3	_PXAREG(0x4000000C) /* DMA Control/Status register for Channel 3 5-41 */
+#define DCSR4	_PXAREG(0x40000010) /* DMA Control/Status register for Channel 4 5-41 */
+#define DCSR5	_PXAREG(0x40000014) /* DMA Control/Status register for Channel 5 5-41 */
+#define DCSR6	_PXAREG(0x40000018) /* DMA Control/Status register for Channel 6 5-41 */
+#define DCSR7	_PXAREG(0x4000001C) /* DMA Control/Status register for Channel 7 5-41 */
+#define DCSR8	_PXAREG(0x40000020) /* DMA Control/Status register for Channel 8 5-41 */
+#define DCSR9	_PXAREG(0x40000024) /* DMA Control/Status register for Channel 9 5-41 */
+#define DCSR10	_PXAREG(0x40000028) /* DMA Control/Status register for Channel 10 5-41 */
+#define DCSR11	_PXAREG(0x4000002C) /* DMA Control/Status register for Channel 11 5-41 */
+#define DCSR12	_PXAREG(0x40000030) /* DMA Control/Status register for Channel 12 5-41 */
+#define DCSR13	_PXAREG(0x40000034) /* DMA Control/Status register for Channel 13 5-41 */
+#define DCSR14	_PXAREG(0x40000038) /* DMA Control/Status register for Channel 14 5-41 */
+#define DCSR15	_PXAREG(0x4000003C) /* DMA Control/Status register for Channel 15 5-41 */
+#define DCSR16	_PXAREG(0x40000040) /* DMA Control/Status register for Channel 16 5-41 */
+#define DCSR17	_PXAREG(0x40000044) /* DMA Control/Status register for Channel 17 5-41 */
+#define DCSR18	_PXAREG(0x40000048) /* DMA Control/Status register for Channel 18 5-41 */
+#define DCSR19	_PXAREG(0x4000004C) /* DMA Control/Status register for Channel 19 5-41 */
+#define DCSR20	_PXAREG(0x40000050) /* DMA Control/Status register for Channel 20 5-41 */
+#define DCSR21	_PXAREG(0x40000054) /* DMA Control/Status register for Channel 21 5-41 */
+#define DCSR22	_PXAREG(0x40000058) /* DMA Control/Status register for Channel 22 5-41 */
+#define DCSR23	_PXAREG(0x4000005C) /* DMA Control/Status register for Channel 23 5-41 */
+#define DCSR24	_PXAREG(0x40000060) /* DMA Control/Status register for Channel 24 5-41 */
+#define DCSR25	_PXAREG(0x40000064) /* DMA Control/Status register for Channel 25 5-41 */
+#define DCSR26	_PXAREG(0x40000068) /* DMA Control/Status register for Channel 26 5-41 */
+#define DCSR27	_PXAREG(0x4000006C) /* DMA Control/Status register for Channel 27 5-41 */
+#define DCSR28	_PXAREG(0x40000070) /* DMA Control/Status register for Channel 28 5-41 */
+#define DCSR29	_PXAREG(0x40000074) /* DMA Control/Status register for Channel 29 5-41 */
+#define DCSR30	_PXAREG(0x40000078) /* DMA Control/Status register for Channel 30 5-41 */
+#define DCSR31	_PXAREG(0x4000007C) /* DMA Control/Status register for Channel 31 5-41 */
+
+#define DALGN	_PXAREG(0x400000A0) /* DMA Alignment register 5-49 */
+#define DPCSR	_PXAREG(0x400000A4) /* DMA Programmed I/O Control Status register 5-51 */
+
+#define DRQSR0	_PXAREG(0x400000E0) /* DMA DREQ<0> Status register 5-40 */
+#define DRQSR1	_PXAREG(0x400000E4) /* DMA DREQ<1> Status register 5-40 */
+#define DRQSR2	_PXAREG(0x400000E8) /* DMA DREQ<2> Status register 5-40 */
+
+#define DINT	_PXAREG(0x400000F0) /* DMA Interrupt register 5-48 */
+
+#define DRCMR0	_PXAREG(0x40000100) /* Request to Channel Map register for DREQ<0> (companion chip request 0) 5-31 */
+#define DRCMR1	_PXAREG(0x40000104) /* Request to Channel Map register for DREQ<1> (companion chip request 1) 5-31 */
+#define DRCMR2	_PXAREG(0x40000108) /* Request to Channel Map register for I2S receive request 5-31 */
+#define DRCMR3	_PXAREG(0x4000010C) /* Request to Channel Map register for I2S transmit request 5-31 */
+#define DRCMR4	_PXAREG(0x40000110) /* Request to Channel Map register for BTUART receive request 5-31 */
+#define DRCMR5	_PXAREG(0x40000114) /* Request to Channel Map register for BTUART transmit request. 5-31 */
+#define DRCMR6	_PXAREG(0x40000118) /* Request to Channel Map register for FFUART receive request 5-31 */
+#define DRCMR7	_PXAREG(0x4000011C) /* Request to Channel Map register for FFUART transmit request 5-31 */
+#define DRCMR8	_PXAREG(0x40000120) /* Request to Channel Map register for AC 97 microphone request 5-31 */
+#define DRCMR9	_PXAREG(0x40000124) /* Request to Channel Map register for AC 97 modem receive request 5-31 */
+#define DRCMR10	_PXAREG(0x40000128) /* Request to Channel Map register for AC 97 modem transmit request 5-31 */
+#define DRCMR11	_PXAREG(0x4000012C) /* Request to Channel Map register for AC 97 audio receive request 5-31 */
+#define DRCMR12	_PXAREG(0x40000130) /* Request to Channel Map register for AC 97 audio transmit request 5-31 */
+#define DRCMR13	_PXAREG(0x40000134) /* Request to Channel Map register for SSP1 receive request 5-31 */
+#define DRCMR14	_PXAREG(0x40000138) /* Request to Channel Map register for SSP1 transmit request 5-31 */
+#define DRCMR15	_PXAREG(0x4000013C) /* Request to Channel Map register for SSP2 receive request 5-31 */
+#define DRCMR16	_PXAREG(0x40000140) /* Request to Channel Map register for SSP2 transmit request 5-31 */
+#define DRCMR17	_PXAREG(0x40000144) /* Request to Channel Map register for ICP receive request 5-31 */
+#define DRCMR18	_PXAREG(0x40000148) /* Request to Channel Map register for ICP transmit request 5-31 */
+#define DRCMR19	_PXAREG(0x4000014C) /* Request to Channel Map register for STUART receive request 5-31 */
+#define DRCMR20	_PXAREG(0x40000150) /* Request to Channel Map register for STUART transmit request 5-31 */
+#define DRCMR21	_PXAREG(0x40000154) /* Request to Channel Map register for MMC/SDIO receive request 5-31 */
+#define DRCMR22	_PXAREG(0x40000158) /* Request to Channel Map register for MMC/SDIO transmit request 5-31 */
+#define DRCMR24	_PXAREG(0x40000160) /* Request to Channel Map register for USB endpoint 0 request 5-31 */
+#define DRCMR25	_PXAREG(0x40000164) /* Request to Channel Map register for USB endpoint A request 5-31 */
+#define DRCMR26	_PXAREG(0x40000168) /* Request to Channel Map register for USB endpoint B request 5-31 */
+#define DRCMR27	_PXAREG(0x4000016C) /* Request to Channel Map register for USB endpoint C request 5-31 */
+#define DRCMR28	_PXAREG(0x40000170) /* Request to Channel Map register for USB endpoint D request 5-31 */
+#define DRCMR29	_PXAREG(0x40000174) /* Request to Channel Map register for USB endpoint E request 5-31 */
+#define DRCMR30	_PXAREG(0x40000178) /* Request to Channel Map register for USB endpoint F request 5-31 */
+#define DRCMR31	_PXAREG(0x4000017C) /* Request to Channel Map register for USB endpoint G request 5-31 */
+#define DRCMR32	_PXAREG(0x40000180) /* Request to Channel Map register for USB endpoint H request 5-31 */
+#define DRCMR33	_PXAREG(0x40000184) /* Request to Channel Map register for USB endpoint I request 5-31 */
+#define DRCMR34	_PXAREG(0x40000188) /* Request to Channel Map register for USB endpoint J request 5-31 */
+#define DRCMR35	_PXAREG(0x4000018C) /* Request to Channel Map register for USB endpoint K request 5-31 */
+#define DRCMR36	_PXAREG(0x40000190) /* Request to Channel Map register for USB endpoint L request 5-31 */
+#define DRCMR37	_PXAREG(0x40000194) /* Request to Channel Map register for USB endpoint M request 5-31 */
+#define DRCMR38	_PXAREG(0x40000198) /* Request to Channel Map register for USB endpoint N request 5-31 */
+#define DRCMR39	_PXAREG(0x4000019C) /* Request to Channel Map register for USB endpoint P request 5-31 */
+#define DRCMR40	_PXAREG(0x400001A0) /* Request to Channel Map register for USB endpoint Q request 5-31 */
+#define DRCMR41	_PXAREG(0x400001A4) /* Request to Channel Map register for USB endpoint R request 5-31 */
+#define DRCMR42	_PXAREG(0x400001A8) /* Request to Channel Map register for USB endpoint S request 5-31 */
+#define DRCMR43	_PXAREG(0x400001AC) /* Request to Channel Map register for USB endpoint T request 5-31 */
+#define DRCMR44	_PXAREG(0x400001B0) /* Request to Channel Map register for USB endpoint U request 5-31 */
+#define DRCMR45	_PXAREG(0x400001B4) /* Request to Channel Map register for USB endpoint V request 5-31 */
+#define DRCMR46	_PXAREG(0x400001B8) /* Request to Channel Map register for USB endpoint W request 5-31 */
+#define DRCMR47	_PXAREG(0x400001BC) /* Request to Channel Map register for USB endpoint X request 5-31 */
+#define DRCMR48	_PXAREG(0x400001C0) /* Request to Channel Map register for MSL receive request 1 5-31 */
+#define DRCMR49	_PXAREG(0x400001C4) /* Request to Channel Map register for MSL transmit request 1 5-31 */
+#define DRCMR50	_PXAREG(0x400001C8) /* Request to Channel Map register for MSL receive request 2 5-31 */
+#define DRCMR51	_PXAREG(0x400001CC) /* Request to Channel Map register for MSL transmit request 2 5-31 */
+#define DRCMR52	_PXAREG(0x400001D0) /* Request to Channel Map register for MSL receive request 3 5-31 */
+#define DRCMR53	_PXAREG(0x400001D4) /* Request to Channel Map register for MSL transmit request 3 5-31 */
+#define DRCMR54	_PXAREG(0x400001D8) /* Request to Channel Map register for MSL receive request 4 5-31 */
+#define DRCMR55	_PXAREG(0x400001DC) /* Request to Channel Map register for MSL transmit request 4 5-31 */
+#define DRCMR56	_PXAREG(0x400001E0) /* Request to Channel Map register for MSL receive request 5 5-31 */
+#define DRCMR57	_PXAREG(0x400001E4) /* Request to Channel Map register for MSL transmit request 5 5-31 */
+#define DRCMR58	_PXAREG(0x400001E8) /* Request to Channel Map register for MSL receive request 6 5-31 */
+#define DRCMR59	_PXAREG(0x400001EC) /* Request to Channel Map register for MSL transmit request 6 5-31 */
+#define DRCMR60	_PXAREG(0x400001F0) /* Request to Channel Map register for MSL receive request 7 5-31 */
+#define DRCMR61	_PXAREG(0x400001F4) /* Request to Channel Map register for MSL transmit request 7 5-31 */
+#define DRCMR62	_PXAREG(0x400001F8) /* Request to Channel Map register for USIM receive request 5-31 */
+#define DRCMR63	_PXAREG(0x400001FC) /* Request to Channel Map register for USIM transmit request 5-31 */
+
+#define DDADR0	_PXAREG(0x40000200) /* DMA Descriptor Address register for Channel 0 5-32 */
+#define DSADR0	_PXAREG(0x40000204) /* DMA Source Address register for Channel 0 5-33 */
+#define DTADR0	_PXAREG(0x40000208) /* DMA Target Address register for Channel 0 5-34 */
+#define DCMD0	_PXAREG(0x4000020C) /* DMA Command Address register for Channel 0 5-35 */
+#define DDADR1	_PXAREG(0x40000210) /* DMA Descriptor Address register for Channel 1 5-32 */
+#define DSADR1	_PXAREG(0x40000214) /* DMA Source Address register for Channel 1 5-33 */
+#define DTADR1	_PXAREG(0x40000218) /* DMA Target Address register for Channel 1 5-34 */
+#define DCMD1	_PXAREG(0x4000021C) /* DMA Command Address register for Channel 1 5-35 */
+#define DDADR2	_PXAREG(0x40000220) /* DMA Descriptor Address register for Channel 2 5-32 */
+#define DSADR2	_PXAREG(0x40000224) /* DMA Source Address register for Channel 2 5-33 */
+#define DTADR2	_PXAREG(0x40000228) /* DMA Target Address register for Channel 2 5-34 */
+#define DCMD2	_PXAREG(0x4000022C) /* DMA Command Address register for Channel 2 5-35 */
+#define DDADR3	_PXAREG(0x40000230) /* DMA Descriptor Address register for Channel 3 5-32 */
+#define DSADR3	_PXAREG(0x40000234) /* DMA Source Address register for Channel 3 5-33 */
+#define DTADR3	_PXAREG(0x40000238) /* DMA Target Address register for Channel 3 5-34 */
+#define DCMD3	_PXAREG(0x4000023C) /* DMA Command Address register for Channel 3 5-35 */
+#define DDADR4	_PXAREG(0x40000240) /* DMA Descriptor Address register for Channel 4 5-32 */
+#define DSADR4	_PXAREG(0x40000244) /* DMA Source Address register for Channel 4 5-33 */
+#define DTADR4	_PXAREG(0x40000248) /* DMA Target Address register for Channel 4 5-34 */
+#define DCMD4	_PXAREG(0x4000024C) /* DMA Command Address register for Channel 4 5-35 */
+#define DDADR5	_PXAREG(0x40000250) /* DMA Descriptor Address register for Channel 5 5-32 */
+#define DSADR5	_PXAREG(0x40000254) /* DMA Source Address register for Channel 5 5-33 */
+#define DTADR5	_PXAREG(0x40000258) /* DMA Target Address register for Channel 5 5-34 */
+#define DCMD5	_PXAREG(0x4000025C) /* DMA Command Address register for Channel 5 5-35 */
+#define DDADR6	_PXAREG(0x40000260) /* DMA Descriptor Address register for Channel 6 5-32 */
+#define DSADR6	_PXAREG(0x40000264) /* DMA Source Address register for Channel 6 5-33 */
+#define DTADR6	_PXAREG(0x40000268) /* DMA Target Address register for Channel 6 5-34 */
+#define DCMD6	_PXAREG(0x4000026C) /* DMA Command Address register for Channel 6 5-35 */
+#define DDADR7	_PXAREG(0x40000270) /* DMA Descriptor Address register for Channel 7 5-32 */
+#define DSADR7	_PXAREG(0x40000274) /* DMA Source Address register for Channel 7 5-33 */
+#define DTADR7	_PXAREG(0x40000278) /* DMA Target Address register for Channel 7 5-34 */
+#define DCMD7	_PXAREG(0x4000027C) /* DMA Command Address register for Channel 7 5-35 */
+#define DDADR8	_PXAREG(0x40000280) /* DMA Descriptor Address register for Channel 8 5-32 */
+#define DSADR8	_PXAREG(0x40000284) /* DMA Source Address register for Channel 8 5-33 */
+#define DTADR8	_PXAREG(0x40000288) /* DMA Target Address register for Channel 8 5-34 */
+#define DCMD8	_PXAREG(0x4000028C) /* DMA Command Address register for Channel 8 5-35 */
+#define DDADR9	_PXAREG(0x40000290) /* DMA Descriptor Address register for Channel 9 5-32 */
+#define DSADR9	_PXAREG(0x40000294) /* DMA Source Address register for Channel 9 5-33 */
+#define DTADR9	_PXAREG(0x40000298) /* DMA Target Address register for Channel 9 5-34 */
+#define DCMD9	_PXAREG(0x4000029C) /* DMA Command Address register for Channel 9 5-35 */
+#define DDADR10	_PXAREG(0x400002A0) /* DMA Descriptor Address register for Channel 10 5-32 */
+#define DSADR10	_PXAREG(0x400002A4) /* DMA Source Address register for Channel 10 5-33 */
+#define DTADR10	_PXAREG(0x400002A8) /* DMA Target Address register for Channel 10 5-34 */
+#define DCMD10	_PXAREG(0x400002AC) /* DMA Command Address register for Channel 10 5-35 */
+#define DDADR11	_PXAREG(0x400002B0) /* DMA Descriptor Address register for Channel 11 5-32 */
+#define DSADR11	_PXAREG(0x400002B4) /* DMA Source Address register for Channel 11 5-33 */
+#define DTADR11	_PXAREG(0x400002B8) /* DMA Target Address register for Channel 11 5-34 */
+#define DCMD11	_PXAREG(0x400002BC) /* DMA Command Address register for Channel 11 5-35 */
+#define DDADR12	_PXAREG(0x400002C0) /* DMA Descriptor Address register for Channel 12 5-32 */
+#define DSADR12	_PXAREG(0x400002C4) /* DMA Source Address register for Channel 12 5-33 */
+#define DTADR12	_PXAREG(0x400002C8) /* DMA Target Address register for Channel 12 5-34 */
+#define DCMD12	_PXAREG(0x400002CC) /* DMA Command Address register for Channel 12 5-35 */
+#define DDADR13	_PXAREG(0x400002D0) /* DMA Descriptor Address register for Channel 13 5-32 */
+#define DSADR13	_PXAREG(0x400002D4) /* DMA Source Address register for Channel 13 5-33 */
+#define DTADR13	_PXAREG(0x400002D8) /* DMA Target Address register for Channel 13 5-34 */
+#define DCMD13	_PXAREG(0x400002DC) /* DMA Command Address register for Channel 13 5-35 */
+#define DDADR14	_PXAREG(0x400002E0) /* DMA Descriptor Address register for Channel 14 5-32 */
+#define DSADR14	_PXAREG(0x400002E4) /* DMA Source Address register for Channel 14 5-33 */
+#define DTADR14	_PXAREG(0x400002E8) /* DMA Target Address register for Channel 14 5-34 */
+#define DCMD14	_PXAREG(0x400002EC) /* DMA Command Address register for Channel 14 5-35 */
+#define DDADR15	_PXAREG(0x400002F0) /* DMA Descriptor Address register for Channel 15 5-32 */
+#define DSADR15	_PXAREG(0x400002F4) /* DMA Source Address register for Channel 15 5-33 */
+#define DTADR15	_PXAREG(0x400002F8) /* DMA Target Address register for Channel 15 5-34 */
+#define DCMD15	_PXAREG(0x400002FC) /* DMA Command Address register for Channel 15 5-35 */
+#define DDADR16	_PXAREG(0x40000300) /* DMA Descriptor Address register for Channel 16 5-32 */
+#define DSADR16	_PXAREG(0x40000304) /* DMA Source Address register for Channel 16 5-33 */
+#define DTADR16	_PXAREG(0x40000308) /* DMA Target Address register for Channel 16 5-34 */
+#define DCMD16	_PXAREG(0x4000030C) /* DMA Command Address register for Channel 16 5-35 */
+#define DDADR17	_PXAREG(0x40000310) /* DMA Descriptor Address register for Channel 17 5-32 */
+#define DSADR17	_PXAREG(0x40000314) /* DMA Source Address register for Channel 17 5-33 */
+#define DTADR17	_PXAREG(0x40000318) /* DMA Target Address register for Channel 17 5-34 */
+#define DCMD17	_PXAREG(0x4000031C) /* DMA Command Address register for Channel 17 5-35 */
+#define DDADR18	_PXAREG(0x40000320) /* DMA Descriptor Address register for Channel 18 5-32 */
+#define DSADR18	_PXAREG(0x40000324) /* DMA Source Address register for Channel 18 5-33 */
+#define DTADR18	_PXAREG(0x40000328) /* DMA Target Address register for Channel 18 5-34 */
+#define DCMD18	_PXAREG(0x4000032C) /* DMA Command Address register for Channel 18 5-35 */
+#define DDADR19	_PXAREG(0x40000330) /* DMA Descriptor Address register for Channel 19 5-32 */
+#define DSADR19	_PXAREG(0x40000334) /* DMA Source Address register for Channel 19 5-33 */
+#define DTADR19	_PXAREG(0x40000338) /* DMA Target Address register for Channel 19 5-34 */
+#define DCMD19	_PXAREG(0x4000033C) /* DMA Command Address register for Channel 19 5-35 */
+#define DDADR20	_PXAREG(0x40000340) /* DMA Descriptor Address register for Channel 20 5-32 */
+#define DSADR20	_PXAREG(0x40000344) /* DMA Source Address register for Channel 20 5-33 */
+#define DTADR20	_PXAREG(0x40000348) /* DMA Target Address register for Channel 20 5-34 */
+#define DCMD20	_PXAREG(0x4000034C) /* DMA Command Address register for Channel 20 5-35 */
+#define DDADR21	_PXAREG(0x40000350) /* DMA Descriptor Address register for Channel 21 5-32 */
+#define DSADR21	_PXAREG(0x40000354) /* DMA Source Address register for Channel 21 5-33 */
+#define DTADR21	_PXAREG(0x40000358) /* DMA Target Address register for Channel 21 5-34 */
+#define DCMD21	_PXAREG(0x4000035C) /* DMA Command Address register for Channel 21 5-35 */
+#define DDADR22	_PXAREG(0x40000360) /* DMA Descriptor Address register for Channel 22 5-32 */
+#define DSADR22	_PXAREG(0x40000364) /* DMA Source Address register for Channel 22 5-33 */
+#define DTADR22	_PXAREG(0x40000368) /* DMA Target Address register for Channel 22 5-34 */
+#define DCMD22	_PXAREG(0x4000036C) /* DMA Command Address register for Channel 22 5-35 */
+#define DDADR23	_PXAREG(0x40000370) /* DMA Descriptor Address register for Channel 23 5-32 */
+#define DSADR23	_PXAREG(0x40000374) /* DMA Source Address register for Channel 23 5-33 */
+#define DTADR23	_PXAREG(0x40000378) /* DMA Target Address register for Channel 23 5-34 */
+#define DCMD23	_PXAREG(0x4000037C) /* DMA Command Address register for Channel 23 5-35 */
+#define DDADR24	_PXAREG(0x40000380) /* DMA Descriptor Address register for Channel 24 5-32 */
+#define DSADR24	_PXAREG(0x40000384) /* DMA Source Address register for Channel 24 5-33 */
+#define DTADR24	_PXAREG(0x40000388) /* DMA Target Address register for Channel 24 5-34 */
+#define DCMD24	_PXAREG(0x4000038C) /* DMA Command Address register for Channel 24 5-35 */
+#define DDADR25	_PXAREG(0x40000390) /* DMA Descriptor Address register for Channel 25 5-32 */
+#define DSADR25	_PXAREG(0x40000394) /* DMA Source Address register for Channel 25 5-33 */
+#define DTADR25	_PXAREG(0x40000398) /* DMA Target Address register for Channel 25 5-34 */
+#define DCMD25	_PXAREG(0x4000039C) /* DMA Command Address register for Channel 25 5-35 */
+#define DDADR26	_PXAREG(0x400003A0) /* DMA Descriptor Address register for Channel 26 5-32 */
+#define DSADR26	_PXAREG(0x400003A4) /* DMA Source Address register for Channel 26 5-33 */
+#define DTADR26	_PXAREG(0x400003A8) /* DMA Target Address register for Channel 26 5-34 */
+#define DCMD26	_PXAREG(0x400003AC) /* DMA Command Address register for Channel 26 5-35 */
+#define DDADR27	_PXAREG(0x400003B0) /* DMA Descriptor Address register for Channel 27 5-32 */
+#define DSADR27	_PXAREG(0x400003B4) /* DMA Source Address register for Channel 27 5-33 */
+#define DTADR27	_PXAREG(0x400003B8) /* DMA Target Address register for Channel 27 5-34 */
+#define DCMD27	_PXAREG(0x400003BC) /* DMA Command Address register for Channel 27 5-35 */
+#define DDADR28	_PXAREG(0x400003C0) /* DMA Descriptor Address register for Channel 28 5-32 */
+#define DSADR28	_PXAREG(0x400003C4) /* DMA Source Address register for Channel 28 5-33 */
+#define DTADR28	_PXAREG(0x400003C8) /* DMA Target Address register for Channel 28 5-34 */
+#define DCMD28	_PXAREG(0x400003CC) /* DMA Command Address register for Channel 28 5-35 */
+#define DDADR29	_PXAREG(0x400003D0) /* DMA Descriptor Address register for Channel 29 5-32 */
+#define DSADR29	_PXAREG(0x400003D4) /* DMA Source Address register for Channel 29 5-33 */
+#define DTADR29	_PXAREG(0x400003D8) /* DMA Target Address register for Channel 29 5-34 */
+#define DCMD29	_PXAREG(0x400003DC) /* DMA Command Address register for Channel 29 5-35 */
+#define DDADR30	_PXAREG(0x400003E0) /* DMA Descriptor Address register for Channel 30 5-32 */
+#define DSADR30	_PXAREG(0x400003E4) /* DMA Source Address register for Channel 30 5-33 */
+#define DTADR30	_PXAREG(0x400003E8) /* DMA Target Address register for Channel 30 5-34 */
+#define DCMD30	_PXAREG(0x400003EC) /* DMA Command Address register for Channel 30 5-35 */
+#define DDADR31	_PXAREG(0x400003F0) /* DMA Descriptor Address register for Channel 31 5-32 */
+#define DSADR31	_PXAREG(0x400003F4) /* DMA Source Address register for Channel 31 5-33 */
+#define DTADR31	_PXAREG(0x400003F8) /* DMA Target Address register for Channel 31 5-34 */
+#define DCMD31	_PXAREG(0x400003FC) /* DMA Command Address register for Channel 31 5-35 */
+
+#define DRCMR64	_PXAREG(0x40001100) /* Request to Channel Map register for Memory Stick receive request 5-31 */
+#define DRCMR65	_PXAREG(0x40001104) /* Request to Channel Map register for Memory Stick transmit request 5-31 */
+#define DRCMR66	_PXAREG(0x40001108) /* Request to Channel Map register for SSP3 receive request 5-31 */
+#define DRCMR67	_PXAREG(0x4000110C) /* Request to Channel Map register for SSP3 transmit request 5-31 */
+#define DRCMR68	_PXAREG(0x40001110) /* Request to Channel Map register for Quick Capture Interface Receive Request 0 5-31 */
+#define DRCMR69	_PXAREG(0x40001114) /* Request to Channel Map register for Quick Capture Interface Receive Request 1 5-31 */
+#define DRCMR70	_PXAREG(0x40001118) /* Request to Channel Map register for Quick Capture Interface Receive Request 2 5-31 */
+
+#define DRCMR74	_PXAREG(0x40001128) /* Request to Channel Map register for DREQ<2> (companion chip request 2) 5-31 */
+
+#define FLYCNFG	_PXAREG(0x48000020) /* Fly-by DMA DVAL<1:0> polarities 5-39 */
+
+// DMA Register shortcuts
+#define DCSR(_ch)  _PXAREG_OFFSET(&DCSR0,((_ch) << 2))
+#define DRQSR(_line) _PXAREG_OFFSET(&DRQSR0,((_line) << 2))
+#define DRCMR(_dev) *(((_dev) < 63) ? (&_PXAREG_OFFSET(&DRCMR0, (((_dev) & 0x3f) << 2))) \
+				   : (&_PXAREG_OFFSET(&DRCMR64,(((_dev) & 0x3f) << 2))))
+#define DDADR(_ch) _PXAREG_OFFSET(&DDADR0,((_ch) << 4))
+#define DSADR(_ch) _PXAREG_OFFSET(&DSADR0,((_ch) << 4))
+#define DTADR(_ch) _PXAREG_OFFSET(&DTADR0,((_ch) << 4))
+#define DCMD(_ch) _PXAREG_OFFSET(&DCMD0,((_ch) << 4))
+
+
+#define DDADR_DESCADDR	0xfffffff0	/* Address of next descriptor (mask) */
+#define DDADR_STOP	(1 << 0)	/* Stop (read / write) */
+
+#define DRCMR_MAPVLD	(1 << 7)	/* Map Valid Channel */
+#define DRCMR_CHLNUM(_ch) ((_ch) & 0x1f)
+
+#define DCSR_RUN	(1 << 31)	/* Run Bit (read / write) */
+#define DCSR_NODESCFETCH (1 << 30)	/* No-Descriptor Fetch (read / write) */
+#define DCSR_STOPIRQEN	(1 << 29)	/* Stop Interrupt Enabled */
+#define DCSR_EORIRQEN	(1 << 28)	/* End-of-Receive Interrupt Enable */
+#define DCSR_EORJMPEN	(1 << 27)	/* Jump to Next Descriptor on EOR */
+#define DCSR_EORSTOPEN	(1 << 26)	/* Stop Channel on EOR */
+#define DCSR_SETCMPST	(1 << 25)	/* Set Descriptor Compare Status */
+#define DCSR_CLRCMPST	(1 << 24)	/* Clear Descriptor Compare Status */
+#define DCSR_RASIRQEN	(1 << 23)	/* Request After Channel Stoopped Interrupt Enable */
+#define DCSR_MASKRUN	(1 << 22)	/* Mask Run */
+#define DCSR_CMPST	(1 << 10)	/* Descriptor Compare Status */
+#define DCSR_EORINT	(1 << 9)	/* End of Recieve */
+#define DCSR_REQPEND	(1 << 8)	/* Request Pending (read-only) */
+#define DCSR_RASINTR	(1 << 4)	/* Request After Channel Stopped */
+#define DCSR_STOPINTR	(1 << 3)	/* Stop Interrupt */
+#define DCSR_ENDINTR	(1 << 2)	/* End Interrupt (read / write) */
+#define DCSR_STARTINTR	(1 << 1)	/* Start Interrupt (read / write) */
+#define DCSR_BUSERRINTR	(1 << 0)	/* Bus Error Interrupt (read / write) */
+
+#define DRQSR_CLR	(1 << 8)	/* Clear Pending Requests */
+
+#define DCMD_INCSRCADDR	(1 << 31)	/* Source Address Increment Setting. */
+#define DCMD_INCTRGADDR	(1 << 30)	/* Target Address Increment Setting. */
+#define DCMD_FLOWSRC	(1 << 29)	/* Flow Control by the source. */
+#define DCMD_FLOWTRG	(1 << 28)	/* Flow Control by the target. */
+#define DCMD_CMPEN	(1 << 25)	/* Descriptor Compare Enable */
+#define DCMD_ADDRMODE   (1 << 23)	/* Addressing Mode */
+#define DCMD_STARTIRQEN	(1 << 22)	/* Start Interrupt Enable */
+#define DCMD_ENDIRQEN	(1 << 21)	/* End Interrupt Enable */
+#define DCMD_FLYBYS	(1 << 20)	/* Fly-By Source */
+#define DCMD_FLYBYT	(1 << 19)	/* Fly-By Target */
+#define DCMD_BURST8	(1 << 16)	/* 8 byte burst */
+#define DCMD_BURST16	(2 << 16)	/* 16 byte burst */
+#define DCMD_BURST32	(3 << 16)	/* 32 byte burst */
+#define DCMD_WIDTH1	(1 << 14)	/* 1 byte width */
+#define DCMD_WIDTH2	(2 << 14)	/* 2 byte width (HalfWord) */
+#define DCMD_WIDTH4	(3 << 14)	/* 4 byte width (Word) */
+#define DCMD_SIZE(_x)	(((_x) & 0x3)<<16)	/* Burst Size */
+#define DCMD_MAXSIZE    DCMD_SIZE(3)
+#define DCMD_WIDTH(_x)	(((_x) & 0x3)<<14)	/* Peripheral Width  */
+#define DCMD_MAXWIDTH   DCMD_WIDTH(3)
+#define DCMD_LEN(_x)	(((_x) & 0x1fff))	/* Length of transfer (0 for descriptor ops) */
+#define DCMD_MAXLEN     DCMD_LEN(0x1fff)
+
+#define DMAREQ_DREQ0		(0)	
+#define DMAREQ_DREQ1		(1)	
+#define DMAREQ_I2S_RECV		(2)	
+#define DMAREQ_I2S_XMT		(3)	
+#define DMAREQ_BTUART_RECV	(4)	
+#define DMAREQ_BTUART_XMT	(5)	
+#define DMAREQ_FFUAR_RECV	(6)	
+#define DMAREQ_FFUART_XMT	(7)	
+#define DMAREQ_AC97_MICR	(8)	
+#define DMAREQ_AC97_MODEM_RECV	(9)	
+#define DMAREQ_AC97_MODEM_XMT	(10)	
+#define DMAREQ_AC97_AUDIO_RECV	(11)	
+#define DMAREQ_AC97_AUDIO_XMT	(12)	
+#define DMAREQ_SSP1_RECV	(13)	
+#define DMAREQ_SSP1_XMT		(14)	
+#define DMAREQ_SSP2_RECV	(15)	
+#define DMAREQ_SSP2_XMT		(16)	
+#define DMAREQ_ICP_RECV		(17)	
+#define DMAREQ_ICP_XMT		(18)	
+#define DMAREQ_STUART_RECV	(19)	
+#define DMAREQ_STUART_XMT	(20)	
+#define DMAREQ_MMCSDIO_RECV	(21)	
+#define DMAREQ_MMCSDIO_XMT	(22)	
+
+#define DMAREQ_USB_EP_0		(24)	
+#define DMAREQ_USB_EP_A		(25)	
+#define DMAREQ_USB_EP_B		(26)	
+#define DMAREQ_USB_EP_C		(27)	
+#define DMAREQ_USB_EP_D		(28)	
+#define DMAREQ_USB_EP_E		(29)	
+#define DMAREQ_USB_EP_F		(30)	
+#define DMAREQ_USB_EP_G		(31)	
+#define DMAREQ_USB_EP_H		(32)	
+#define DMAREQ_USB_EP_I		(33)	
+#define DMAREQ_USB_EP_J		(34)	
+#define DMAREQ_USB_EP_K		(35)	
+#define DMAREQ_USB_EP_L		(36)	
+#define DMAREQ_USB_EP_M		(37)	
+#define DMAREQ_USB_EP_N		(38)	
+#define DMAREQ_USB_EP_P		(39)	
+#define DMAREQ_USB_EP_Q		(40)	
+#define DMAREQ_USB_EP_R		(41)	
+#define DMAREQ_USB_EP_S		(42)	
+#define DMAREQ_USB_EP_T		(43)	
+#define DMAREQ_USB_EP_U		(44)	
+#define DMAREQ_USB_EP_V		(45)	
+#define DMAREQ_USB_EP_W		(46)	
+#define DMAREQ_USB_EP_X		(47)	
+#define DMAREQ_MSL_RECV_1	(48)	
+#define DMAREQ_MSL_XMT_1	(49)	
+#define DMAREQ_MSL_RECV_2	(50)	
+#define DMAREQ_MSL_XMT_2	(51)	
+#define DMAREQ_MSL_RECV_3	(52)	
+#define DMAREQ_MSL_XMT_3	(53)	
+#define DMAREQ_MSL_RECV_4	(54)	
+#define DMAREQ_MSL_XMT_4	(55)	
+#define DMAREQ_MSL_RECV_5	(56)	
+#define DMAREQ_MSL_XMT_5	(57)	
+#define DMAREQ_MSL_RECV_6	(58)	
+#define DMAREQ_MSL_XMT_6	(59)	
+#define DMAREQ_MSL_RECV_7	(60)	
+#define DMAREQ_MSL_XMT_7	(61)	
+#define DMAREQ_USIM_RECV	(62)	
+#define DMAREQ_USIM_XMT		(63)	
+#define DMAREQ_MEMSTICK_RECV	(64)	
+#define DMAREQ_MEMSTICK_XMT	(65)	
+#define DMAREQ_SSP3_RECV	(66)	
+#define DMAREQ_SSP3_XMT		(67)	
+#define DMAREQ_CIF_RECV_0	(68)	
+#define DMAREQ_CIF_RECV_1	(69)	
+#define DMAREQ_CIF_RECV_2	(70)	
+#define DMAREQ_DREQ2     	(74)	
+
+
+
+/******************************************************************************/
+/* Full-Function UART */
+/******************************************************************************/
+#define FFRBR	_PXAREG(0x40100000) /* Receive Buffer register 10-13 */
+#define FFTHR	_PXAREG(0x40100000) /* Transmit Holding register 10-14 */
+#define FFDLL	_PXAREG(0x40100000) /* Divisor Latch register, low byte 10-14 */
+#define FFIER	_PXAREG(0x40100004) /* Interrupt Enable register 10-15 */
+#define FFDLH	_PXAREG(0x40100004) /* Divisor Latch register, high byte 10-14 */
+#define FFIIR	_PXAREG(0x40100008) /* Interrupt ID register 10-17 */
+#define FFFCR	_PXAREG(0x40100008) /* FIFO Control register 10-19 */
+#define FFLCR	_PXAREG(0x4010000C) /* Line Control register 10-25 */
+#define FFMCR	_PXAREG(0x40100010) /* Modem Control register 10-29 */
+#define FFLSR	_PXAREG(0x40100014) /* Line Status register 10-26 */
+#define FFMSR	_PXAREG(0x40100018) /* Modem Status register 10-31 */
+#define FFSPR	_PXAREG(0x4010001C) /* Scratch Pad register 10-33 */
+#define FFISR	_PXAREG(0x40100020) /* Infrared Select register 10-33 */
+#define FFFOR	_PXAREG(0x40100024) /* Receive FIFO Occupancy register 10-22 */
+#define FFABR	_PXAREG(0x40100028) /* Auto-baud Control register 10-23 */
+#define FFACR	_PXAREG(0x4010002C) /* Auto-baud Count register 10-24 */
+
+
+/******************************************************************************/
+/* Bluetooth UART */
+/******************************************************************************/
+#define BTRBR	_PXAREG(0x40200000) /* Receive Buffer register 10-13 */
+#define BTTHR	_PXAREG(0x40200000) /* Transmit Holding register 10-14 */
+#define BTDLL	_PXAREG(0x40200000) /* Divisor Latch register, low byte 10-14 */
+#define BTIER	_PXAREG(0x40200004) /* Interrupt Enable register 10-15 */
+#define BTDLH	_PXAREG(0x40200004) /* Divisor Latch register, high byte 10-14 */
+#define BTIIR	_PXAREG(0x40200008) /* Interrupt ID register 10-17 */
+#define BTFCR	_PXAREG(0x40200008) /* FIFO Control register 10-19 */
+#define BTLCR	_PXAREG(0x4020000C) /* Line Control register 10-25 */
+#define BTMCR	_PXAREG(0x40200010) /* Modem Control register 10-29 */
+#define BTLSR	_PXAREG(0x40200014) /* Line Status register 10-26 */
+#define BTMSR	_PXAREG(0x40200018) /* Modem Status register 10-31 */
+#define BTSPR	_PXAREG(0x4020001C) /* Scratch Pad register 10-33 */
+#define BTISR	_PXAREG(0x40200020) /* Infrared Select register 10-33 */
+#define BTFOR	_PXAREG(0x40200024) /* Receive FIFO Occupancy register 10-22 */
+#define BTABR	_PXAREG(0x40200028) /* Auto-Baud Control register 10-23 */
+#define BTACR	_PXAREG(0x4020002C) /* Auto-Baud Count register 10-24 */
+
+#define IER_DMAE	(1 << 7)	/* DMA Requests Enable */
+#define IER_UUE		(1 << 6)	/* UART Unit Enable */
+#define IER_NRZE	(1 << 5)	/* NRZ coding Enable */
+#define IER_RTIOE	(1 << 4)	/* Receiver Time Out Interrupt Enable */
+#define IER_MIE		(1 << 3)	/* Modem Interrupt Enable */
+#define IER_RLSE	(1 << 2)	/* Receiver Line Status Interrupt Enable */
+#define IER_TIE		(1 << 1)	/* Transmit Data request Interrupt Enable */
+#define IER_RAVIE	(1 << 0)	/* Receiver Data Available Interrupt Enable */
+
+#define IIR_FIFOES1	(1 << 7)	/* FIFO Mode Enable Status */
+#define IIR_FIFOES0	(1 << 6)	/* FIFO Mode Enable Status */
+#define IIR_TOD		(1 << 3)	/* Time Out Detected */
+#define IIR_IID_MASK	(0x3 << 1)	/* Interrupt Source Encoded */
+#define IIR_IP		(1 << 0)	/* Interrupt Pending (active low) */
+
+#define FCR_ITL(_x)	((_x) << 6)	/* Interrupt Trigger Level */
+#define FCR_BUS		(1 << 5)	/* 32-Bit Peripheral Bus */
+#define FCR_TRAIL	(1 << 4)	/* Trailing Bytes */
+#define FCR_TIL		(1 << 3)	/* Transmitter Interrupt Level */
+#define FCR_RESETTF	(1 << 2)	/* Reset Transmitter FIFO */
+#define FCR_RESETRF	(1 << 1)	/* Reset Receiver FIFO */
+#define FCR_TRFIFOE	(1 << 0)	/* Transmit and Receive FIFO Enable */
+
+#define ABR_ABT		(1 << 3)	/* Auto-Baud Rate Calculation */
+#define ABR_ABUP	(1 << 2)	/* Auto-Baud Programmer */
+#define ABR_ABLIE	(1 << 1)	/* Auto-Baud Interrupt */
+#define ABR_ABE		(1 << 0)	/* Auto-Baud Enable */
+
+#define LCR_DLAB	(1 << 7)	/* Divisor Latch Access */
+#define LCR_SB		(1 << 6)	/* Set Break */
+#define LCR_STKYP	(1 << 5)	/* Sticky Parity */
+#define LCR_EPS		(1 << 4)	/* Even Parity Select */
+#define LCR_PEN		(1 << 3)	/* Parity Enable */
+#define LCR_STB		(1 << 2)	/* Stop Bit */
+#define LCR_WLS(_x)	((_x) << 0)	/* Word Length Select */
+
+#define LSR_FIFOE	(1 << 7)	/* FIFO Error Status */
+#define LSR_TEMT	(1 << 6)	/* Transmitter Empty */
+#define LSR_TDRQ	(1 << 5)	/* Transmit Data Request */
+#define LSR_BI		(1 << 4)	/* Break Interrupt */
+#define LSR_FE		(1 << 3)	/* Framing Error */
+#define LSR_PE		(1 << 2)	/* Parity Error */
+#define LSR_OE		(1 << 1)	/* Overrun Error */
+#define LSR_DR		(1 << 0)	/* Data Ready */
+
+#define MCR_AFE		(1 << 5)	/* Auto-Flow Control Enable */
+#define MCR_LOOP	(1 << 4)	/* Loopback Mode */
+#define MCR_OUT2	(1 << 3)	/* OUT2 Signal control */
+#define MCR_OUT1	(1 << 2)	/* Test Bit */
+#define MCR_RTS		(1 << 1)	/* Request to Send */
+#define MCR_DTR		(1 << 0)	/* Data Terminal Ready */
+
+#define MSR_DCD		(1 << 7)	/* Data Carrier Detect */
+#define MSR_RI		(1 << 6)	/* Ring Indicator */
+#define MSR_DSR		(1 << 5)	/* Data Set Ready */
+#define MSR_CTS		(1 << 4)	/* Clear To Send */
+#define MSR_DDCD	(1 << 3)	/* Delta Data Carrier Detect */
+#define MSR_TERI	(1 << 2)	/* Trailing Edge Ring Indicator */
+#define MSR_DDSR	(1 << 1)	/* Delta Data Set Ready */
+#define MSR_DCTS	(1 << 0)	/* Delta Clear To Send */
+
+#define ISR_RXPL	(1 << 4)	/* Receive Data Polarity */
+#define ISR_TXPL	(1 << 3)	/* Transmit Data Polarity */
+#define ISR_XMODE	(1 << 2)	/* Transmit Pulse Width Select */
+#define ISR_RCVEIR	(1 << 1)	/* Receiver SIR Enable */
+#define ISR_XMITIR	(1 << 0)	/* Transmitter SIR Enable */
+
+
+/******************************************************************************/
+/* Standard I2C */
+/******************************************************************************/
+#define IBMR	_PXAREG(0x40301680) /* I2C Bus Monitor register 9-30 */
+#define IDBR	_PXAREG(0x40301688) /* I2C Data Buffer register 9-29 */
+#define ICR	_PXAREG(0x40301690) /* I2C Control register 9-23 */
+#define ISR	_PXAREG(0x40301698) /* I2C Status register 9-26 */
+#define ISAR	_PXAREG(0x403016A0) /* I2C Slave Address register 9-28 */
+
+/* I2C - Control Register */
+#define ICR_FM	        (1 << 15)	/* Fast Mode */
+#define ICR_UR	        (1 << 14)	/* Unit Reset */
+#define ICR_SADIE       (1 << 13)	/* Slave Address Detected Interrupt Enable */
+#define ICR_ALDIE	(1 << 12)	/* Arbitratino Loss Detected Interrupt Enable */
+#define ICR_SSDIE	(1 << 11)	/* Slave STOP Detected Interrupt Enable */
+#define ICR_BEIE	(1 << 10)	/* Bus Error Interrupt Enable */
+#define ICR_DRFIE	(1 << 9)	/* DBR Receive Full Interupt Enable */
+#define ICR_ITEIE	(1 << 8)	/* IDBR Transmit Empty Interrupt Enable */
+#define ICR_GCD	        (1 << 7)	/* General Call Disable */
+#define ICR_IUE	        (1 << 6)	/* I2C Unit Enable */
+#define ICR_SCLE	(1 << 5)	/* SCL Enable */
+#define ICR_MA	        (1 << 4)	/* Master Abort */
+#define ICR_TB	        (1 << 3)	/* Transfer Byte */
+#define ICR_ACKNAK	(1 << 2)	/* Positive/Negative Acknowledge */
+#define ICR_STOP	(1 << 1)	/* Stop */
+#define ICR_START	(1 << 0)	/* Start */
+            
+/* I2C - Status Register */
+#define ISR_BED	        (1 << 10)       /* Bus Error Detected */
+#define ISR_SAD	        (1 << 9)        /* Slave Address Detected */
+#define ISR_GCAD        (1 << 8)        /* General Call Address Detected */
+#define ISR_IRF	        (1 << 7)        /* IDBR Receive Full */
+#define ISR_ITE	        (1 << 6)        /* IDBR Transmit Empty */
+#define ISR_ALD	        (1 << 5)        /* Arbitration Loss Detection */
+#define ISR_SSD	        (1 << 4)        /* Slave STOP Detected */
+#define ISR_IBB	        (1 << 3)        /* I2C Bus Busy */
+#define ISR_UB          (1 << 2)        /* Unit Busy */
+#define ISR_ACKNAK      (1 << 1)        /* Ack/Nack Status */
+#define ISR_RWM         (1 << 0)        /* Read/Write Mode */
+
+/* I2C - Bus Monitor Register */
+#define IBMR_SCL        (1 << 1)        /* Continousely reflects the value of the SCL pin */
+#define IBMR_SDA        (1 << 0)        /* Continousely reflects the value of the SDA pin */
+
+
+
+
+/******************************************************************************/
+/* I2S Controller */
+/******************************************************************************/
+#define SACR0	_PXAREG(0x40400000) /* Serial Audio Global Control register 14-10 */
+#define SACR1	_PXAREG(0x40400004) /* Serial Audio I2S/MSB-Justified Control register 14-13 */
+#define SASR0	_PXAREG(0x4040000C) /* Serial Audio I2S/MSB-Justified Interface and FIFO Status register 14-14 */
+#define SAIMR	_PXAREG(0x40400014) /* Serial Audio Interrupt Mask register 14-18 */
+#define SAICR	_PXAREG(0x40400018) /* Serial Audio Interrupt Clear register 14-17 */
+#define SADIV	_PXAREG(0x40400060) /* Audio Clock Divider register 14-16 */
+#define SADR	_PXAREG(0x40400080) /* Serial Audio Data register (TX and RX FIFO access register). 14-18 */
+
+
+/******************************************************************************/
+/* USB Client Controller */
+/******************************************************************************/
+#define UDCCR	_PXAREG(0x40600000) /* UDC Control register 12-31 */
+#define UDCICR0	_PXAREG(0x40600004) /* UDC Interrupt Control register 0 12-35 */
+#define UDCICR1	_PXAREG(0x40600008) /* UDC Interrupt Control register 1 12-35 */
+#define UDCISR0	_PXAREG(0x4060000C) /* UDC Interrupt Status register 0 12-49 */
+#define UDCISR1	_PXAREG(0x40600010) /* UDC Interrupt Status register 1 12-49 */
+#define UDCFNR	_PXAREG(0x40600014) /* UDC Frame Number register 12-52 */
+#define UDCOTGICR	_PXAREG(0x40600018) /* UDC OTG Interrupt Control register 12-35 */
+#define UDCOTGISR	_PXAREG(0x4060001C) /* UDC OTG Interrupt Status register 12-49 */
+#define UP2OCR	_PXAREG(0x40600020) /* USB Port 2 Output Control register 12-41 */
+#define UP3OCR	_PXAREG(0x40600024) /* USB Port 3 Output Control register 12-47 */
+#define UDCCSR0	_PXAREG(0x40600100) /* UDC Control/Status register-Endpoint 0 12-53 */
+#define UDCCSRA	_PXAREG(0x40600104) /* UDC Control/Status register-Endpoint A 12-56 */
+#define UDCCSRB	_PXAREG(0x40600108) /* UDC Control/Status register-Endpoint B 12-56 */
+#define UDCCSRC	_PXAREG(0x4060010C) /* UDC Control/Status register-Endpoint C 12-56 */
+#define UDCCSRD	_PXAREG(0x40600110) /* UDC Control/Status register-Endpoint D 12-56 */
+#define UDCCSRE	_PXAREG(0x40600114) /* UDC Control/Status register-Endpoint E 12-56 */
+#define UDCCSRF	_PXAREG(0x40600118) /* UDC Control/Status register-Endpoint F 12-56 */
+#define UDCCSRG	_PXAREG(0x4060011C) /* UDC Control/Status register-Endpoint G 12-56 */
+#define UDCCSRH	_PXAREG(0x40600120) /* UDC Control/Status register-Endpoint H 12-56 */
+#define UDCCSRI	_PXAREG(0x40600124) /* UDC Control/Status register-Endpoint I 12-56 */
+#define UDCCSRJ	_PXAREG(0x40600128) /* UDC Control/Status register-Endpoint J 12-56 */
+#define UDCCSRK	_PXAREG(0x4060012C) /* UDC Control/Status register-Endpoint K 12-56 */
+#define UDCCSRL	_PXAREG(0x40600130) /* UDC Control/Status register-Endpoint L 12-56 */
+#define UDCCSRM	_PXAREG(0x40600134) /* UDC Control/Status register-Endpoint M 12-56 */
+#define UDCCSRN	_PXAREG(0x40600138) /* UDC Control/Status register-Endpoint N 12-56 */
+#define UDCCSRP	_PXAREG(0x4060013C) /* UDC Control/Status register-Endpoint P 12-56 */
+#define UDCCSRQ	_PXAREG(0x40600140) /* UDC Control/Status register-Endpoint Q 12-56 */
+#define UDCCSRR	_PXAREG(0x40600144) /* UDC Control/Status register-Endpoint R 12-56 */
+#define UDCCSRS	_PXAREG(0x40600148) /* UDC Control/Status register-Endpoint S 12-56 */
+#define UDCCSRT	_PXAREG(0x4060014C) /* UDC Control/Status register-Endpoint T 12-56 */
+#define UDCCSRU	_PXAREG(0x40600150) /* UDC Control/Status register-Endpoint U 12-56 */
+#define UDCCSRV	_PXAREG(0x40600154) /* UDC Control/Status register-Endpoint V 12-56 */
+#define UDCCSRW	_PXAREG(0x40600158) /* UDC Control/Status register-Endpoint W 12-56 */
+#define UDCCSRX	_PXAREG(0x4060015C) /* UDC Control/Status register-Endpoint X 12-56 */
+
+#define UDCBCR0	_PXAREG(0x40600200) /* UDC Byte Count register-Endpoint 0 12-62 */
+#define UDCBCRA	_PXAREG(0x40600204) /* UDC Byte Count register-Endpoint A 12-62 */
+#define UDCBCRB	_PXAREG(0x40600208) /* UDC Byte Count register-Endpoint B 12-62 */
+#define UDCBCRC	_PXAREG(0x4060020C) /* UDC Byte Count register-Endpoint C 12-62 */
+#define UDCBCRD	_PXAREG(0x40600210) /* UDC Byte Count register-Endpoint D 12-62 */
+#define UDCBCRE	_PXAREG(0x40600214) /* UDC Byte Count register-Endpoint E 12-62 */
+#define UDCBCRF	_PXAREG(0x40600218) /* UDC Byte Count register-Endpoint F 12-62 */
+#define UDCBCRG	_PXAREG(0x4060021C) /* UDC Byte Count register-Endpoint G 12-62 */
+#define UDCBCRH	_PXAREG(0x40600220) /* UDC Byte Count register-Endpoint H 12-62 */
+#define UDCBCRI	_PXAREG(0x40600224) /* UDC Byte Count register-Endpoint I 12-62 */
+#define UDCBCRJ	_PXAREG(0x40600228) /* UDC Byte Count register-Endpoint J 12-62 */
+#define UDCBCRK	_PXAREG(0x4060022C) /* UDC Byte Count register-Endpoint K 12-62 */
+#define UDCBCRL	_PXAREG(0x40600230) /* UDC Byte Count register-Endpoint L 12-62 */
+#define UDCBCRM	_PXAREG(0x40600234) /* UDC Byte Count register-Endpoint M 12-62 */
+#define UDCBCRN	_PXAREG(0x40600238) /* UDC Byte Count register-Endpoint N 12-62 */
+#define UDCBCRP	_PXAREG(0x4060023C) /* UDC Byte Count register-Endpoint P 12-62 */
+#define UDCBCRQ	_PXAREG(0x40600240) /* UDC Byte Count register-Endpoint Q 12-62 */
+#define UDCBCRR	_PXAREG(0x40600244) /* UDC Byte Count register-Endpoint R 12-62 */
+#define UDCBCRS	_PXAREG(0x40600248) /* UDC Byte Count register-Endpoint S 12-62 */
+#define UDCBCRT	_PXAREG(0x4060024C) /* UDC Byte Count register-Endpoint T 12-62 */
+#define UDCBCRU	_PXAREG(0x40600250) /* UDC Byte Count register-Endpoint U 12-62 */
+#define UDCBCRV	_PXAREG(0x40600254) /* UDC Byte Count register-Endpoint V 12-62 */
+#define UDCBCRW	_PXAREG(0x40600258) /* UDC Byte Count register-Endpoint W 12-62 */
+#define UDCBCRX	_PXAREG(0x4060025C) /* UDC Byte Count register-Endpoint X 12-62 */
+
+#define UDCDR0	_PXAREG(0x40600300) /* UDC Data register-Endpoint 0 12-62 */
+#define UDCDRA	_PXAREG(0x40600304) /* UDC Data register-Endpoint A 12-62 */
+#define UDCDRB	_PXAREG(0x40600308) /* UDC Data register-Endpoint B 12-62 */
+#define UDCDRC	_PXAREG(0x4060030C) /* UDC Data register-Endpoint C 12-62 */
+#define UDCDRD	_PXAREG(0x40600310) /* UDC Data register-Endpoint D 12-62 */
+#define UDCDRE	_PXAREG(0x40600314) /* UDC Data register-Endpoint E 12-62 */
+#define UDCDRF	_PXAREG(0x40600318) /* UDC Data register-Endpoint F 12-62 */
+#define UDCDRG	_PXAREG(0x4060031C) /* UDC Data register-Endpoint G 12-62 */
+#define UDCDRH	_PXAREG(0x40600320) /* UDC Data register-Endpoint H 12-62 */
+#define UDCDRI	_PXAREG(0x40600324) /* UDC Data register-Endpoint I 12-62 */
+#define UDCDRJ	_PXAREG(0x40600328) /* UDC Data register-Endpoint J 12-62 */
+#define UDCDRK	_PXAREG(0x4060032C) /* UDC Data register-Endpoint K 12-62 */
+#define UDCDRL	_PXAREG(0x40600330) /* UDC Data register-Endpoint L 12-62 */
+#define UDCDRM	_PXAREG(0x40600334) /* UDC Data register-Endpoint M 12-62 */
+#define UDCDRN	_PXAREG(0x40600338) /* UDC Data register-Endpoint N 12-62 */
+#define UDCDRP	_PXAREG(0x4060033C) /* UDC Data register-Endpoint P 12-62 */
+#define UDCDRQ	_PXAREG(0x40600340) /* UDC Data register-Endpoint Q 12-62 */
+#define UDCDRR	_PXAREG(0x40600344) /* UDC Data register-Endpoint R 12-62 */
+#define UDCDRS	_PXAREG(0x40600348) /* UDC Data register-Endpoint S 12-62 */
+#define UDCDRT	_PXAREG(0x4060034C) /* UDC Data register-Endpoint T 12-62 */
+#define UDCDRU	_PXAREG(0x40600350) /* UDC Data register-Endpoint U 12-62 */
+#define UDCDRV	_PXAREG(0x40600354) /* UDC Data register-Endpoint V 12-62 */
+#define UDCDRW	_PXAREG(0x40600358) /* UDC Data register-Endpoint W 12-62 */
+#define UDCDRX	_PXAREG(0x4060035C) /* UDC Data register-Endpoint X 12-62 */
+
+#define UDCCRA	_PXAREG(0x40600404) /* UDC Configuration register-Endpoint A 12-64 */
+#define UDCCRB	_PXAREG(0x40600408) /* UDC Configuration register-Endpoint B 12-64 */
+#define UDCCRC	_PXAREG(0x4060040C) /* UDC Configuration register-Endpoint C 12-64 */
+#define UDCCRD	_PXAREG(0x40600410) /* UDC Configuration register-Endpoint D 12-64 */
+#define UDCCRE	_PXAREG(0x40600414) /* UDC Configuration register-Endpoint E 12-64 */
+#define UDCCRF	_PXAREG(0x40600418) /* UDC Configuration register-Endpoint F 12-64 */
+#define UDCCRG	_PXAREG(0x4060041C) /* UDC Configuration register-Endpoint G 12-64 */
+#define UDCCRH	_PXAREG(0x40600420) /* UDC Configuration register-Endpoint H 12-64 */
+#define UDCCRI	_PXAREG(0x40600424) /* UDC Configuration register-Endpoint I 12-64 */
+#define UDCCRJ	_PXAREG(0x40600428) /* UDC Configuration register-Endpoint J 12-64 */
+#define UDCCRK	_PXAREG(0x4060042C) /* UDC Configuration register-Endpoint K 12-64 */
+#define UDCCRL	_PXAREG(0x40600430) /* UDC Configuration register-Endpoint L 12-64 */
+#define UDCCRM	_PXAREG(0x40600434) /* UDC Configuration register-Endpoint M 12-64 */
+#define UDCCRN	_PXAREG(0x40600438) /* UDC Configuration register-Endpoint N 12-64 */
+#define UDCCRP	_PXAREG(0x4060043C) /* UDC Configuration register-Endpoint P 12-64 */
+#define UDCCRQ	_PXAREG(0x40600440) /* UDC Configuration register-Endpoint Q 12-64 */
+#define UDCCRR	_PXAREG(0x40600444) /* UDC Configuration register-Endpoint R 12-64 */
+#define UDCCRS	_PXAREG(0x40600448) /* UDC Configuration register-Endpoint S 12-64 */
+#define UDCCRT	_PXAREG(0x4060044C) /* UDC Configuration register-Endpoint T 12-64 */
+#define UDCCRU	_PXAREG(0x40600450) /* UDC Configuration register-Endpoint U 12-64 */
+#define UDCCRV	_PXAREG(0x40600454) /* UDC Configuration register-Endpoint V 12-64 */
+#define UDCCRW	_PXAREG(0x40600458) /* UDC Configuration register-Endpoint W 12-64 */
+#define UDCCRX	_PXAREG(0x4060045C) /* UDC Configuration register-Endpoint X 12-64 */
+
+/* UDCCR register */
+#define UDCCR_UDE (1 << 0)	    /* UDC Enable */
+
+/******************************************************************************/
+/* Standard UART */
+/******************************************************************************/
+#define STRBR	_PXAREG(0x40700000) /* Receive Buffer register 10-13 */
+#define STTHR	_PXAREG(0x40700000) /* Transmit Holding register 10-14 */
+#define STDLL	_PXAREG(0x40700000) /* Divisor Latch register, low byte 10-14 */
+#define STIER	_PXAREG(0x40700004) /* Interrupt Enable register 10-15 */
+#define STDLH	_PXAREG(0x40700004) /* Divisor Latch register, high byte 10-14 */
+#define STIIR	_PXAREG(0x40700008) /* Interrupt ID register 10-17 */
+#define STFCR	_PXAREG(0x40700008) /* FIFO Control register 10-19 */
+#define STLCR	_PXAREG(0x4070000C) /* Line Control register 10-25 */
+#define STMCR	_PXAREG(0x40700010) /* Modem Control register 10-29 */
+#define STLSR	_PXAREG(0x40700014) /* Line Status register 10-26 */
+#define STMSR	_PXAREG(0x40700018) /* Modem Status register 10-31 */
+#define STSPR	_PXAREG(0x4070001C) /* Scratch Pad register 10-33 */
+#define STISR	_PXAREG(0x40700020) /* Infrared Select register 10-33 */
+#define STFOR	_PXAREG(0x40700024) /* Receive FIFO Occupancy register 10-22 */
+#define STABR	_PXAREG(0x40700028) /* Auto-Baud Control register 10-23 */
+#define STACR	_PXAREG(0x4070002C) /* Auto-Baud Count register 10-24 */
+
+
+/******************************************************************************/
+/* Infrared Communications Port */
+/******************************************************************************/
+#define ICCR0	_PXAREG(0x40800000) /* FICP Control register 0 11-10 */
+#define ICCR1	_PXAREG(0x40800004) /* FICP Control register 1 11-13 */
+#define ICCR2	_PXAREG(0x40800008) /* FICP Control register 2 11-14 */
+#define ICDR	_PXAREG(0x4080000C) /* FICP Data register 11-15 */
+
+#define ICSR0	_PXAREG(0x40800014) /* FICP Status register 0 11-16 */
+#define ICSR1	_PXAREG(0x40800018) /* FICP Status register 1 11-18 */
+#define ICFOR	_PXAREG(0x4080001C) /* FICP FIFO Occupancy Status register 11-19 */
+
+
+/******************************************************************************/
+/* Real-Time Clock */
+/******************************************************************************/
+#define RCNR	_PXAREG(0x40900000) /* RTC Counter register 21-24 */
+#define RTAR	_PXAREG(0x40900004) /* RTC Alarm register 21-19 */
+#define RTSR	_PXAREG(0x40900008) /* RTC Status register 21-17 */
+#define RTTR	_PXAREG(0x4090000C) /* RTC Timer Trim register 21-16 */
+#define RDCR	_PXAREG(0x40900010) /* RTC Day Counter register 21-24 */
+#define RYCR	_PXAREG(0x40900014) /* RTC Year Counter register 21-25 */
+#define RDAR1	_PXAREG(0x40900018) /* RTC Wristwatch Day Alarm register 1 21-20 */
+#define RYAR1	_PXAREG(0x4090001C) /* RTC Wristwatch Year Alarm register 1 21-21 */
+#define RDAR2	_PXAREG(0x40900020) /* RTC Wristwatch Day Alarm register 2 21-20 */
+#define RYAR2	_PXAREG(0x40900024) /* RTC Wristwatch Year Alarm register 2 21-21 */
+#define SWCR	_PXAREG(0x40900028) /* RTC Stopwatch Counter register 21-26 */
+#define SWAR1	_PXAREG(0x4090002C) /* RTC Stopwatch Alarm register 1 21-22 */
+#define SWAR2	_PXAREG(0x40900030) /* RTC Stopwatch Alarm register 2 21-22 */
+#define RTCPICR	_PXAREG(0x40900034) /* RTC Periodic Interrupt Counter register 21-27 */
+#define PIAR	_PXAREG(0x40900038) /* RTC Periodic Interrupt Alarm register 21-23 */
+
+/* RTSR */
+#define RTSR_PICE	(1 << 15)  /* periodic interrupt count enable */
+#define RTSR_PIALE	(1 << 14)  /* periodic interrupt alarm enable */
+#define RTSR_PIAL	(1 << 13)  /* periodic interrupt alarm status */
+#define RTSR_SWCE	(1 << 12)  /* stopwatch count enable */
+#define RTSR_SWALE2	(1 << 11)  /* stopwatch alarm 2 enable */
+#define RTSR_SWAL2	(1 << 10)  /* stopwatch alarm 2 status */
+#define RTSR_SWALE1	(1 << 9)   /* stopwatch alarm 1 enable */
+#define RTSR_SWAL1	(1 << 8)   /* stopwatch alarm 1 status */
+#define RTSR_RDALE2	(1 << 7)   /* wristwatch alarm 2 enable */
+#define RTSR_RDAL2	(1 << 6)   /* wristwatch alarm 2 status */
+#define RTSR_RDALE1	(1 << 5)   /* wristwatch alarm 1 enable */
+#define RTSR_RDAL1	(1 << 4)   /* wristwatch alarm 1 status */
+#define RTSR_HZE	(1 << 3)   /* HZ interrupt enable */
+#define RTSR_ALE	(1 << 2)   /* RTC alarm interrupt enable */
+#define RTSR_HZ		(1 << 1)   /* HZ rising edge detected */
+#define RTSR_AL		(1 << 0)   /* RTC alarm detected */
+
+/******************************************************************************/
+/* OS Timers */
+/******************************************************************************/
+#define OSMR0	_PXAREG(0x40A00000) /* OS Timer Match 0 register 22-15 */
+#define OSMR1	_PXAREG(0x40A00004) /* OS Timer Match 1 register 22-15 */
+#define OSMR2	_PXAREG(0x40A00008) /* OS Timer Match 2 register 22-15 */
+#define OSMR3	_PXAREG(0x40A0000C) /* OS Timer Match 3 register 22-15 */
+#define OSCR0	_PXAREG(0x40A00010) /* OS Timer Counter 0 register 22-17 */
+#define OSSR	_PXAREG(0x40A00014) /* OS Timer Status register (used for all counters) 22-18 */
+#define OWER	_PXAREG(0x40A00018) /* OS Timer Watchdog Enable register 22-16 */
+#define OIER	_PXAREG(0x40A0001C) /* OS Timer Interrupt Enable register (used for all counters) 22-16 */
+#define OSNR	_PXAREG(0x40A00020) /* OS Timer Snapshot register 22-19 */
+
+#define OSCR4	_PXAREG(0x40A00040) /* OS Timer Counter 4-11 registers 22-17 */
+#define OSCR5	_PXAREG(0x40A00044) 
+#define OSCR6	_PXAREG(0x40A00048) 
+#define OSCR7	_PXAREG(0x40A0004C) 
+#define OSCR8	_PXAREG(0x40A00050) 
+#define OSCR9	_PXAREG(0x40A00054) 
+#define OSCR10	_PXAREG(0x40A00058) 
+#define OSCR11	_PXAREG(0x40A0005C) 
+
+#define OSMR4	_PXAREG(0x40A00080) /* OS Timer Match 4-11 registers 22-15 */
+#define OSMR5	_PXAREG(0x40A00084) 
+#define OSMR6	_PXAREG(0x40A00088) 
+#define OSMR7	_PXAREG(0x40A0008C) 
+#define OSMR8	_PXAREG(0x40A00090) 
+#define OSMR9	_PXAREG(0x40A00094) 
+#define OSMR10	_PXAREG(0x40A00098) 
+#define OSMR11	_PXAREG(0x40A0009C) 
+
+#define OMCR4	_PXAREG(0x40A000C0) /* OS Match Control 4-7 registers 22-9 */
+#define OMCR5	_PXAREG(0x40A000C4) 
+#define OMCR6	_PXAREG(0x40A000C8) 
+#define OMCR7	_PXAREG(0x40A000CC) 
+#define OMCR8	_PXAREG(0x40A000D0) /* OS Match Control 8 register 22-11 */
+#define OMCR9	_PXAREG(0x40A000D4) /* OS Match Control 9 register 22-13 */
+#define OMCR10	_PXAREG(0x40A000D8) /* OS Match Control 10 register 22-11 */
+#define OMCR11	_PXAREG(0x40A000DC) /* OS Match Control 11 register 22-13 */
+
+// OS Timer Register Shortcuts
+#define OSCR(_ch) *(((_ch) == 0) ? (&OSCR0) : (&_PXAREG_OFFSET(&OSCR4,(((_ch) - 4) << 2)))) 
+#define OSMR(_ch) *(((_ch) < 4) ? (&_PXAREG_OFFSET(&OSMR0,((_ch) << 2))) \
+				: (&_PXAREG_OFFSET(&OSMR4,(((_ch) - 4) << 2))))
+#define OMCR(_ch) _PXAREG_OFFSET(&OMCR4,(((_ch) - 4) << 2))
+
+#define OMCR_N		(1 << 9)	/* Channel 9 & 11 Snapshot Mode */
+#define OMCR_C		(1 << 7)	/* Channel 4-7 Match Against */
+#define OMCR_P		(1 << 6)	/* Periodic Timer */
+#define OMCR_S_NONE	(0 << 4)	/* No External Sync */
+#define OMCR_S_EXT_SYNC_0 (1 << 4)	/* Ext Sync Reset OSCRx on rising edge EXT_SYNC<0> */
+#define OMCR_S_EXT_SYNC_1 (2 << 4)	/* Ext Sync Reset OSCRx on rising edge EXT_SYNC<1> */
+#define OMCR_R		(1 << 3)	/* Match Reset on match */	
+#define OMCR_CRES(_x)	((((_x) & 0x8) << 5) | (((_x) & 0x7) << 0))	/* Match counter resolution */
+
+#define OWER_WME	(1 << 0)	/* Watchdog Match Enable */
+
+#define OIER_E11	(1 << 11)	/* Interrupt enable channel 11 */
+#define OIER_E10	(1 << 10)	/* Interrupt enable channel 10 */
+#define OIER_E9		(1 << 9)	/* Interrupt enable channel 9 */
+#define OIER_E8		(1 << 8)	/* Interrupt enable channel 8 */
+#define OIER_E7		(1 << 7)	/* Interrupt enable channel 7 */
+#define OIER_E6		(1 << 6)	/* Interrupt enable channel 6 */
+#define OIER_E5		(1 << 5)	/* Interrupt enable channel 5 */
+#define OIER_E4		(1 << 4)	/* Interrupt enable channel 4 */
+#define OIER_E3		(1 << 3)	/* Interrupt enable channel 3 */
+#define OIER_E2		(1 << 2)	/* Interrupt enable channel 2 */
+#define OIER_E1		(1 << 1)	/* Interrupt enable channel 1 */
+#define OIER_E0		(1 << 0)	/* Interrupt enable channel 0 */
+
+#define OSSR_M11	(1 << 11)	/* Match status channel 11 */
+#define OSSR_M10	(1 << 10)	/* Match status channel 10 */
+#define OSSR_M9		(1 << 9)	/* Match status channel 9 */
+#define OSSR_M8		(1 << 8)	/* Match status channel 8 */
+#define OSSR_M7		(1 << 7)	/* Match status channel 7 */
+#define OSSR_M6		(1 << 6)	/* Match status channel 6 */
+#define OSSR_M5		(1 << 5)	/* Match status channel 5 */
+#define OSSR_M4		(1 << 4)	/* Match status channel 4 */
+#define OSSR_M3		(1 << 3)	/* Match status channel 3 */
+#define OSSR_M2		(1 << 2)	/* Match status channel 2 */
+#define OSSR_M1		(1 << 1)	/* Match status channel 1 */
+#define OSSR_M0		(1 << 0)	/* Match status channel 0 */
+
+
+/******************************************************************************/
+/* Pulse-Width Modulation */
+/******************************************************************************/
+#define PWMCR0	_PXAREG(0x40B00000) /* PWM 0 Control register 23-7 */
+#define PWMDCR0	_PXAREG(0x40B00004) /* PWM 0 Duty Cycle register 23-8 */
+#define PWMPCR0	_PXAREG(0x40B00008) /* PWM 0 Period register 23-9 */
+#define PWMCR2	_PXAREG(0x40B00010) /* PWM 2 Control register 23-7 */
+#define PWMDCR2	_PXAREG(0x40B00014) /* PWM 2 Duty Cycle register 23-8 */
+#define PWMPCR2	_PXAREG(0x40B00018) /* PWM 2 Period register 23-9 */
+#define PWMCR1	_PXAREG(0x40C00000) /* PWM 1 Control register 23-7 */
+#define PWMDCR1	_PXAREG(0x40C00004) /* PWM 1 Duty Cycle register 23-8 */
+#define PWMPCR1	_PXAREG(0x40C00008) /* PWM 1 Period register 23-9 */
+#define PWMCR3	_PXAREG(0x40C00010) /* PWM 3 Control register 23-7 */
+#define PWMDCR3	_PXAREG(0x40C00014) /* PWM 3 Duty Cycle register 23-8 */
+#define PWMPCR3	_PXAREG(0x40C00018) /* PWM 3 Period register 23-9 */
+
+
+/******************************************************************************/
+/* Interrupt Controller */
+/******************************************************************************/
+#define ICIP	_PXAREG(0x40D00000) /* Interrupt Controller IRQ Pending register 25-11 */
+#define ICMR	_PXAREG(0x40D00004) /* Interrupt Controller Mask register 25-20 */
+#define ICLR	_PXAREG(0x40D00008) /* Interrupt Controller Level register 25-24 */
+#define ICFP	_PXAREG(0x40D0000C) /* Interrupt Controller FIQ Pending register 25-15 */
+#define ICPR	_PXAREG(0x40D00010) /* Interrupt Controller Pending register 25-6 */
+#define ICCR	_PXAREG(0x40D00014) /* Interrupt Controller Control register 25-27 */
+#define ICHP	_PXAREG(0x40D00018) /* Interrupt Controller Highest Priority register 25-30 */
+#define IPR(_x) _PXAREG_OFFSET(0x40D0001C,(((_x) & 0x1F) << 2)) /* Interupt Priority Registers 25-29 */
+#define ICIP2	_PXAREG(0x40D0009C) /* Interrupt Controller IRQ Pending register 2 25-10 */
+#define ICMR2	_PXAREG(0x40D000A0) /* Interrupt Controller Mask register 2 25-23 */
+#define ICLR2	_PXAREG(0x40D000A4) /* Interrupt Controller Level register 2 25-27 */
+#define ICFP2	_PXAREG(0x40D000A8) /* Interrupt Controller FIQ Pending register 2 25-19 */
+#define ICPR2	_PXAREG(0x40D000AC) /* Interrupt Controller Pending register 2 25-6 */
+
+#define IPR_VALID	(1 << 31) 
+
+#define ICCR_DIM	(1 << 0)
+
+// Interrupt Controller Shortcuts 
+// Argument _id is a peripheral ID number
+#define _PPID_Bit(_id)	(1 << ((_id) & 0x1f))
+#define _ICIP(_id)	*(((_id) & 0x20) ? (&ICIP2) : (&ICIP))
+#define _ICMR(_id)	*(((_id) & 0x20) ? (&ICMR2) : (&ICMR))
+#define _ICLR(_id)	*(((_id) & 0x20) ? (&ICLR2) : (&ICLR))
+#define _ICFP(_id)	*(((_id) & 0x20) ? (&ICFP2) : (&ICFP))
+#define _ICPR(_id)	*(((_id) & 0x20) ? (&ICPR2) : (&ICPR))
+
+// Peripheral IDs
+#define PPID_CIF	(33)	/* Quick Capture Interface */
+#define PPID_RTC_AL	(31)	/* RTC Alarm */
+#define PPID_RTC_HZ	(30)	/* RTC 1 Hz Clock */
+#define PPID_OST_3	(29)	/* OS Timer 3 */
+#define PPID_OST_2	(28)	/* OS Timer 2 */
+#define PPID_OST_1	(27)	/* OS Timer 1 */
+#define PPID_OST_0	(26)	/* OS Timer 0 */
+#define PPID_DMAC 	(25)	/* DMA Controller */
+#define PPID_SSP1	(24)	/* SSP 1 */
+#define PPID_MMC	(23)	/* Flash Card Interface/MMC */
+#define PPID_FFUART	(22)	/* FFUART */
+#define PPID_BTUART	(21)	/* BTUART */
+#define PPID_STUART	(20)	/* STUART */
+#define PPID_ICP	(19)	/* Infrared Comm. Port*/
+#define	PPID_I2C	(18)	/* I2C */
+#define PPID_LCD	(17)	/* LCD */
+#define PPID_SSP2	(16)	/* SSP 2 */
+#define PPID_USIM	(15)	/* SmartCard Interface */
+#define PPID_AC97	(14)	/* AC '97 */
+#define PPID_I2S	(13)	/* I2S */
+#define PPID_PMU	(12)	/* Performance Monitor */
+#define PPID_USBC	(11)	/* USB Client */
+#define PPID_GPIO_X	(10)	/* GPIO except GPIO<1> or GPIO<0> */
+#define PPID_GPIO_1	(9)	/* GPIO<1> */
+#define PPID_GPIO_0	(8)	/* GPIO<0> */
+#define PPID_OST_4_11	(7)	/* OS Timer Channel 4 - 11 */
+#define PPID_PWR_I2C	(6)	/* Power I2C */
+#define PPID_MEM_STK	(5)	/* Memory Stick*/
+#define PPID_KEYPAD	(4)	/* Keypad */
+#define PPID_USBH1	(3)	/* USB Host 1 */
+#define PPID_USBH2	(2)	/* USB Host 2 */
+#define PPID_MSL	(1)	/* MSL */
+#define PPID_SSP3	(0)	/* SSP 3 */
+
+
+/******************************************************************************/
+/* General-Purpose I/O (GPIO) Controller */
+/******************************************************************************/
+#define GPLR0	_PXAREG(0x40E00000) /* GPIO Pin-Level register GPIO<31:0> 24-28 */
+#define GPLR1	_PXAREG(0x40E00004) /* GPIO Pin-Level register GPIO<63:32> 24-28 */
+#define GPLR2	_PXAREG(0x40E00008) /* GPIO Pin-Level register GPIO<95:64> 24-28 */
+#define GPDR0	_PXAREG(0x40E0000C) /* GPIO Pin Direction register GPIO<31:0> 24-11 */
+#define GPDR1	_PXAREG(0x40E00010) /* GPIO Pin Direction register GPIO<63:32> 24-11 */
+#define GPDR2	_PXAREG(0x40E00014) /* GPIO Pin Direction register GPIO<95:64> 24-11 */
+#define GPSR0	_PXAREG(0x40E00018) /* GPIO Pin Output Set register GPIO<31:0> 24-14 */
+#define GPSR1	_PXAREG(0x40E0001C) /* GPIO Pin Output Set register GPIO<63:32> 24-14 */
+#define GPSR2	_PXAREG(0x40E00020) /* GPIO Pin Output Set register GPIO<95:64> 24-14 */
+#define GPCR0	_PXAREG(0x40E00024) /* GPIO Pin Output Clear register GPIO<31:0> 24-14 */
+#define GPCR1	_PXAREG(0x40E00028) /* GPIO Pin Output Clear register GPIO <63:32> 24-14 */
+#define GPCR2	_PXAREG(0x40E0002C) /* GPIO pin Output Clear register GPIO <95:64> 24-14 */
+#define GRER0	_PXAREG(0x40E00030) /* GPIO Rising-Edge Detect Enable register GPIO<31:0> 24-18 */
+#define GRER1	_PXAREG(0x40E00034) /* GPIO Rising-Edge Detect Enable register GPIO<63:32> 24-18 */
+#define GRER2	_PXAREG(0x40E00038) /* GPIO Rising-Edge Detect Enable register GPIO<95:64> 24-18 */
+#define GFER0	_PXAREG(0x40E0003C) /* GPIO Falling-Edge Detect Enable register GPIO<31:0> 24-18 */
+#define GFER1	_PXAREG(0x40E00040) /* GPIO Falling-Edge Detect Enable register GPIO<63:32> 24-18 */
+#define GFER2	_PXAREG(0x40E00044) /* GPIO Falling-Edge Detect Enable register GPIO<95:64> 24-18 */
+#define GEDR0	_PXAREG(0x40E00048) /* GPIO Edge Detect Status register GPIO<31:0> 24-30 */
+#define GEDR1	_PXAREG(0x40E0004C) /* GPIO Edge Detect Status register GPIO<63:32> 24-30 */
+#define GEDR2	_PXAREG(0x40E00050) /* GPIO Edge Detect Status register GPIO<95:64> 24-30 */
+#define GAFR0_L	_PXAREG(0x40E00054) /* GPIO Alternate Function register GPIO<15:0> 24-23 */
+#define GAFR0_U	_PXAREG(0x40E00058) /* GPIO Alternate Function register GPIO<31:16> 24-23 */
+#define GAFR1_L	_PXAREG(0x40E0005C) /* GPIO Alternate Function register GPIO<47:32> 24-23 */
+#define GAFR1_U	_PXAREG(0x40E00060) /* GPIO Alternate Function register GPIO<63:48> 24-23 */
+#define GAFR2_L	_PXAREG(0x40E00064) /* GPIO Alternate Function register GPIO<79:64> 24-23 */
+#define GAFR2_U	_PXAREG(0x40E00068) /* GPIO Alternate Function register GPIO <95:80> 24-23 */
+#define GAFR3_L	_PXAREG(0x40E0006C) /* GPIO Alternate Function register GPIO<111:96> 24-23 */
+#define GAFR3_U	_PXAREG(0x40E00070) /* GPIO Alternate Function register GPIO<120:112> 24-23 */
+
+#define GPLR3	_PXAREG(0x40E00100) /* GPIO Pin-Level register GPIO<120:96> 24-28 */
+#define GPDR3	_PXAREG(0x40E0010C) /* GPIO Pin Direction register GPIO<120:96> 24-11 */
+#define GPSR3	_PXAREG(0x40E00118) /* GPIO Pin Output Set register GPIO<120:96> 24-14 */
+#define GPCR3	_PXAREG(0x40E00124) /* GPIO Pin Output Clear register GPIO<120:96> 24-14 */
+#define GRER3	_PXAREG(0x40E00130) /* GPIO Rising-Edge Detect Enable register GPIO<120:96> 24-18 */
+#define GFER3	_PXAREG(0x40E0013C) /* GPIO Falling-Edge Detect Enable register GPIO<120:96> 24-18 */
+#define GEDR3	_PXAREG(0x40E00148) /* GPIO Edge Detect Status register GPIO<120:96> 24-18 */
+
+// GPIO Shortcuts
+#define GPLR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GPLR0, ((_gpio) & 0x60) >> 3)) : (&GPLR3))
+#define GPDR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GPDR0, ((_gpio) & 0x60) >> 3)) : (&GPDR3))
+#define GPSR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GPSR0, ((_gpio) & 0x60) >> 3)) : (&GPSR3))
+#define GPCR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GPCR0, ((_gpio) & 0x60) >> 3)) : (&GPCR3))
+#define GRER(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GRER0, ((_gpio) & 0x60) >> 3)) : (&GRER3))
+#define GFER(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GFER0, ((_gpio) & 0x60) >> 3)) : (&GFER3))
+#define GEDR(_gpio) *(((_gpio) < 96) ? (&_PXAREG_OFFSET(&GEDR0, ((_gpio) & 0x60) >> 3)) : (&GEDR3))
+#define GAFR(_gpio) (_PXAREG_OFFSET(0x40E00054, ((_gpio) & 0x70) >> 2))
+
+// These provide the correct bit/function placement in a SINGLE register
+#define _GPIO_bit(_gpio)  (1 << ((_gpio) & 0x1f))
+#define _GPIO_fn(_gpio,_fn)	((_fn) << (((_gpio) & 0x0f) << 1))
+
+#define _GPIO_setaltfn(_gp,_fn) \
+   GAFR((_gp)) = ((GAFR((_gp)) & ~(_GPIO_fn((_gp),3))) | (_GPIO_fn((_gp),(_fn))))
+
+#define _GPIO_getaltfun(_gp) \
+   ((GAFR((_gp)) & (_GPIO_fn((_gp),0x3))) >> (((_gp) & 0x0f) << 1))
+
+#define GPIO_OUT 1
+#define GPIO_IN 0
+
+#define _PXA_setaltfn(_gp,_fn,_dir) \
+{ GPDR(_gp) = (_dir==GPIO_OUT)? (GPDR(_gp) |  _GPIO_bit(_gp)) : (GPDR(_gp) & ~_GPIO_bit(_gp)); _GPIO_setaltfn(_gp,_fn);}
+
+#define _PXA_setgpio(_gp) \
+{GPSR(_gp) = _GPIO_bit(_gp);}
+
+#define _PXA_clrgpio(_gp) \
+{GPCR(_gp) = _GPIO_bit(_gp);}
+
+/******************************************************************************/
+/* Power Manager and Reset Control */
+/******************************************************************************/
+#define PMCR	_PXAREG(0x40F00000) /* Power Manager Control register 3-67 */
+#define PSSR	_PXAREG(0x40F00004) /* Power Manager Sleep Status register 3-69 */
+#define PSPR	_PXAREG(0x40F00008) /* Power Manager Scratch Pad register 3-72 */
+#define PWER	_PXAREG(0x40F0000C) /* Power Manager Wake-Up Enable register 3-73 */
+#define PRER	_PXAREG(0x40F00010) /* Power Manager Rising-Edge Detect Enable register 3-76 */
+#define PFER	_PXAREG(0x40F00014) /* Power Manager Falling-Edge Detect Enable register 3-77 */
+#define PEDR	_PXAREG(0x40F00018) /* Power Manager Edge-Detect Status register 3-78 */
+#define PCFR	_PXAREG(0x40F0001C) /* Power Manager General Configuration register 3-79 */
+#define PGSR0	_PXAREG(0x40F00020) /* Power Manager GPIO Sleep State register for GPIO<31:0> 3-82 */
+#define PGSR1	_PXAREG(0x40F00024) /* Power Manager GPIO Sleep State register for GPIO<63:32> 3-82 */
+#define PGSR2	_PXAREG(0x40F00028) /* Power Manager GPIO Sleep State register for GPIO<95:64> 3-82 */
+#define PGSR3	_PXAREG(0x40F0002C) /* Power Manager GPIO Sleep State register for GPIO<120:96> 3-82 */
+#define RCSR	_PXAREG(0x40F00030) /* Reset Controller Status register 3-83 */
+#define PSLR	_PXAREG(0x40F00034) /* Power Manager Sleep Configuration register 3-84 */
+#define PSTR	_PXAREG(0x40F00038) /* Power Manager Standby Configuration register 3-87 */
+#define PVCR	_PXAREG(0x40F00040) /* Power Manager Voltage Change Control register 3-88 */
+#define PUCR	_PXAREG(0x40F0004C) /* Power Manager USIM Card Control/Status register 3-89 */
+#define PKWR	_PXAREG(0x40F00050) /* Power Manager Keyboard Wake-Up Enable register 3-91 */
+#define PKSR	_PXAREG(0x40F00054) /* Power Manager Keyboard Level-Detect Status register 3-92 */
+#define PCMD(_x) _PXAREG_OFFSET(0x40F00080,((_x) << 2)) /* Power Manager I2C Command Register File */
+
+#define PMCR_INTRS	(1 << 5)	/* Interrupt Status */
+#define PMCR_IAS	(1 << 4)	/* Interrupt/Abort Select */
+#define PMCR_VIDAS	(1 << 3)	/* Imprecise-Data-Abort Status for nVDD_FAULT */
+#define PMCR_VIDAE	(1 << 2)	/* Imprecise-Data-Abort Enable for nVDD_FAULT */
+#define PMCR_BIDAS	(1 << 1)	/* Imprecise-Data-Abort Status for nBATT_FAULT */
+#define PMCR_BIDAE	(1 << 0)	/* Imprecise-Data-Abort Enable for nBATT_FAULT */
+
+#define PSSR_OTGPH	(1 << 6)	/* OTG Peripheral Control Hold */
+#define PSSR_RDH	(1 << 5)	/* Read Disable Hold */
+#define PSSR_PH		(1 << 4)	/* Peripheral Control Hold */
+#define PSSR_STS	(1 << 3)	/* Standby Mode Status */
+#define PSSR_VFS	(1 << 2)	/* VDD Fault Status */
+#define PSSR_BFS	(1 << 1)	/* Battery Fault Status */
+#define PSSR_SSS	(1 << 0)	/* Software Sleep Status */
+
+#define PWER_WERTC	(1 << 31)	/* Wake-up Enable for RTC Standby, Sleep or Deep-Sleep Mode */
+#define PWER_WEP1	(1 << 30)	/* Wake-up Enable for PI Power Domain Standby or Deep-Sleep Mode */
+#define PWER_WEUSBH2	(1 << 28)	/* Wake-up Enable for USB Host Port 2 Standby or Sleep Mode */
+#define PWER_WEUSBH1	(1 << 27)	/* Wake-up Enable for USB Host Port 1 Standby or Sleep Mode */
+#define PWER_WEUSBC	(1 << 26)	/* Wake-up Enable for USB Client Port Standby or Sleep Mode */
+#define PWER_WBB        (1 << 25)	/* Wake-up Enable for a Rising Edge from MSL or Sleep Mode */
+#define PWER_WE35	(1 << 24)	/* Wake-up Enable for GPIO<35> for Standby or Sleep Mode */
+#define PWER_WEUSIM	(1 << 23)	/* Wake-up Enable for Rising or Falling Edge from UDET for Standby or Sleep Mode */
+#define PWER_WEMUX3_GPIO31 (1 << 19)	/* Wake-up Enable due to GPIO<31> for Standby and Sleep Modes */
+#define PWER_WEMUX3_GPIO113 (2 << 19)   /* Wake-up Enable due to GPIO<113> for Standby and Sleep Modes */
+#define PWER_WEMUX2_GPIO38 (0x2 << 16)  /* Wake-up Enable due to GPIO<38> for Standby and Sleep Modes */
+#define PWER_WEMUX2_GPIO53 (0x3 << 16)  /* Wake-up Enable due to GPIO<53> for Standby and Sleep Modes */
+#define PWER_WEMUX2_GPIO40 (0x4 << 16)  /* Wake-up Enable due to GPIO<40> for Standby and Sleep Modes */
+#define PWER_WEMUX2_GPIO36 (0x5 << 15)  /* Wake-up Enable due to GPIO<36> for Standby and Sleep Modes */
+#define PWER_WE15	(1 << 15)	/* Wake-up Enables for GPIO<n> for Standby or Sleep Mode */
+#define PWER_WE14	(1 << 14)
+#define PWER_WE13	(1 << 13)
+#define PWER_WE12	(1 << 12)
+#define PWER_WE11	(1 << 11)
+#define PWER_WE10	(1 << 10)
+#define PWER_WE9	(1 << 9)
+#define PWER_WE4	(1 << 4)
+#define PWER_WE3	(1 << 3)
+#define PWER_WE1	(1 << 1)
+#define PWER_WE0	(1 << 0)
+
+#define PRER_RE1	(1 << 1)
+
+#define PFER_RE1	(1 << 1)
+
+#define PCFR_RO		(1 << 15)	/* RDH Override */
+#define PCFR_PO		(1 << 14)	/* PH Override */
+#define PCFR_GPROD	(1 << 12)	/* GPIO nRESET_OUT Disable */
+#define PCFR_L1_EN	(1 << 11)	/* Sleep MOde/Deep-Sleep Linear Regulator Enable */
+#define PCFR_FVC	(1 << 10)	/* Frequency/Voltage Change */
+#define PCFR_DC_EN	(1 << 7)	/* Sleep/Deep-sleep DC-DC Converter Enable */
+#define PCFR_PI2C_EN	(1 << 6)	/* Power Manager I2C Enable */
+#define PCFR_GPR_EN	(1 << 4)	/* nRESET_GPIO Pin Enable */
+#define PCFR_FS		(1 << 2)	/* Float Static Chip Selects During Sleep Mode */
+#define PCFR_FP		(1 << 1)	/* Float PC Card Pins During Sleep or Deep-Sleep Mode */
+#define PCFR_OPDE	(1 << 0)	/* 13MHz Processor Oscillator Power-Down Enable */
+
+#define RCSR_GPR	(1 << 3)	/* GPIO Reset */
+#define RCSR_SMR	(1 << 2)	/* Sleep Mode */
+#define RCSR_WDR	(1 << 1)	/* Watchdog Reset */
+#define RCSR_HWR	(1 << 0)	/* Hardware Reset */
+
+#define PCMD_MBC	(1 << 12)	/* Multi-Byte Command */
+#define PCMD_DCE	(1 << 11)	/* Delay Command Execution */
+#define PCMD_LC		(1 << 10)	/* Last command */
+#define PCMD_SQC_CONT	(0 << 8)	/* Sequence Configuration Continue */
+#define PCMD_SQC_PAUSE	(1 << 8)	/* Sequence Configuration Pause */
+#define PCMD_DATA(_x)	(((_x) & 0xFF)) /* Command Data */
+
+#define PSLR_SYS_DEL(_x) (((_x) & 0xf) << 28) /* High voltage ramp delay */
+#define PSLR_PWR_DEL(_x) (((_x) & 0xf) << 24) /* Low voltage ramp delay */
+#define PSLR_PSSD 	(1 << 23)	      /* Shorten wake-up delay */
+#define PSLR_IVF 	(1 << 22)	      /* Ignore VDD_FAULT */
+#define PSLR_SL_ROD 	(1 << 20)	      /*  Don't assert nRESET_OUT */
+#define PSLR_SL_R3 	(1 << 11)	      /* SRAM bank 3 retains state */
+#define PSLR_SL_R2 	(1 << 10)	      /* SRAM bank 2 retains state */
+#define PSLR_SL_R1 	(1 << 9)	      /* SRAM bank 1 retains state */
+#define PSLR_SL_R0 	(1 << 8)	      /* SRAM bank 0 retains state */
+#define PSLR_SL_PI(_x) (((_x) & 0x3) << 2)    /* PI power domain */
+
+#define PWRMODE_M_NORMAL	(0)
+#define PWRMODE_M_IDLE		(1)
+#define PWRMODE_M_STANDBY	(2)
+#define PWRMODE_M_SLEEP		(3)
+#define PWRMODE_M_DEEPSLEEP	(4)
+#define PWRMODE_VC	(1 << 3)	/* Voltage Change */
+
+/******************************************************************************/
+/* Power Manager I2C */
+/******************************************************************************/
+#define PIBMR	_PXAREG(0x40F00180) /* Power Manager I2C Bus Monitor register 9-30 */
+#define PIDBR	_PXAREG(0x40F00188) /* Power Manager I2C Data Buffer register 9-29 */
+#define PICR	_PXAREG(0x40F00190) /* Power Manager I2C Control register 9-23 */
+#define PISR	_PXAREG(0x40F00198) /* Power Manager I2C Status register 9-26 */
+#define PISAR	_PXAREG(0x40F001A0) /* Power Manager I2C Slave Address register 9-28 */
+
+
+/******************************************************************************/
+/* Synchronous Serial Port 1 */
+/******************************************************************************/
+#define SSCR0_1	_PXAREG(0x41000000) /* SSP 1 Control register 0 8-25 */
+#define SSCR1_1	_PXAREG(0x41000004) /* SSP 1 Control register 1 8-29 */
+#define SSSR_1	_PXAREG(0x41000008) /* SSP 1 Status register 8-43 */
+#define SSITR_1	_PXAREG(0x4100000C) /* SSP 1 Interrupt Test register 8-42 */
+#define SSDR_1	_PXAREG(0x41000010) /* SSP 1 Data Write register/Data Read register 8-48 */
+
+#define SSTO_1	_PXAREG(0x41000028) /* SSP 1 Time-Out register 8-41 */
+#define SSPSP_1	_PXAREG(0x4100002C) /* SSP 1 Programmable Serial Protocol 8-39 */
+#define SSTSA_1	_PXAREG(0x41000030) /* SSP1 TX Timeslot Active register 8-48 */
+#define SSRSA_1	_PXAREG(0x41000034) /* SSP1 RX Timeslot Active register 8-49 */
+#define SSTSS_1	_PXAREG(0x41000038) /* SSP1 Timeslot Status register 8-50 */
+#define SSACD_1	_PXAREG(0x4100003C) /* SSP1 Audio Clock Divider register 8-51 */
+
+// SSP Bit positions. THESE ARE ALSO VALID FOR SSP2 AND SSP3
+#define SSCR0_MOD	(1 << 31)	  /* Mode Network Mode Enable */
+#define SSCR0_ACS	(1 << 30)	  /* Audio Clock Select */
+#define SSCR0_FRDC(_x)  (((_x) & 0x7) << 24)      /* Frame Rate Divider Control value */
+#define SSCR0_TIM	(1 << 23)	  /* Transmit FIFO underrun interrupt mask */
+#define SSCR0_RIM	(1 << 22)	  /* Receive FIFO overrun interrupt mask */
+#define SSCR0_NCS	(1 << 21)	  /* Network Clock select */
+#define SSCR0_EDSS	(1 << 20)	  /* Extended Data Size select */
+#define SSCR0_SCR(_x)   (((_x) & 0xFFF) << 8)	  /* Serial Clock Rate */
+#define SSCR0_SSE	(1 << 7)	  /* Synchronous Serial Enable */
+#define SSCR0_ECS	(1 << 6)	  /* External Clock select */
+#define SSCR0_FRF(_x)	(((_x) & 0x3) << 4)	  /* Frame Format */
+#define SSCR0_DSS(_x)	(((_x) & 0xF) << 0)	  /* Data Size Select */
+
+#define SSCR1_TTELP	(1 << 31)	 /* TXD Tristate Enable on Last Phase */
+#define SSCR1_TTE	(1 << 30)	 /* TXD Tristate Enable */
+#define SSCR1_EBCEI	(1 << 29)	 /* Enable Bit Count Error Interrupt */
+#define SSCR1_SCFR	(1 << 28)	 /* Slave clock Free Running */
+#define SSCR1_ECRA	(1 << 27)	 /* Enable Clock Request A */
+#define SSCR1_ECRB	(1 << 26)	 /* Enable Clock Request B */
+#define SSCR1_SCLKDIR	(1 << 25)	 /* SSPSCLKx Direction */
+#define SSCR1_SFRMDIR	(1 << 24)	 /* SSP Frame Direction */
+#define SSCR1_RWOT	(1 << 23)	 /* Receive Without Transmit */
+#define SSCR1_TRAIL	(1 << 22)	 /* Trailing Byte DMA based */
+#define SSCR1_TSRE	(1 << 21)	 /* Transmit Service Req Enable */
+#define SSCR1_RSRE	(1 << 20)	 /* Receive Service Req. Enable */
+#define SSCR1_TINTE	(1 << 19)	 /* Receiver Time-Out Interupt Enable */
+#define SSCR1_PINTE	(1 << 18)	 /* Peripheral Trailing Byte Interrupt Enable */
+#define SSCR1_IFS	(1 << 16)	 /* Invert Frame Signal */
+#define SSCR1_STRF	(1 << 15)	 /* Select FIFO for EFWR */
+#define SSCR1_EFWR	(1 << 14)	 /* Enable FIFO Write-Read */
+#define SSCR1_RFT(_x)	(((_x) & 0xF) << 10)	 /* Receive FIFO Threshold */
+#define SSCR1_TFT(_x)	(((_x) & 0xF) << 6)	 /* Transmit FIFO Threshold */
+#define SSCR1_MWDS	(1 << 5)	 /* Microwire Transmit Data Size */
+#define SSCR1_SPH	(1 << 4)	 /* Motorola SPI SSPSCLKx Phase */
+#define SSCR1_SPO	(1 << 3)	 /* Motorola SPI SSPSCLKx Polarity */
+#define SSCR1_LBM	(1 << 2)	 /* Loop-back mode */
+#define SSCR1_TIE	(1 << 1)	 /* Transmit FIFO Interrupt Enable */
+#define SSCR1_RIE	(1 << 0)	 /* Receive FIFO Interrupt Enable */
+
+#define SSSR_BCE	(1 << 23)	 /* Bit Count Error */
+#define SSSR_CSS	(1 << 22)	 /* Clock Synch Status */
+#define SSSR_TUR	(1 << 21)	 /* Transmit FIFO Underrun */
+#define SSSR_EOC	(1 << 20)	 /* End of Chain */
+#define SSSR_TINT	(1 << 19)	 /* Time-out Interrupt */
+#define SSSR_PINT	(1 << 18)	 /* Peripheral Trailing Byte Interrupt */
+#define SSSR_RFL	((0xf) << 12)	 /* RX FIFO Level */
+#define SSSR_TFL	((0xf) << 8)	 /* TX FIFO Level */
+#define SSSR_ROR	(1 << 7)	 /* RX FIFO Overrun */
+#define SSSR_RFS	(1 << 6)	 /* Receive FIFO Service */
+#define SSSR_TFS	(1 << 5)	 /* Transmit FIFO Service */
+#define SSSR_BSY	(1 << 4)	 /* SSP Port Busy */
+#define SSSR_RNE	(1 << 3)	 /* RX FIFO Not Empty */
+#define SSSR_TNF	(1 << 2)	 /* TX FIFO Not Full */
+
+#define SSPSP_FSRT      (1 << 25)        /* Frame Sync Relative Timing */
+#define SSPSP_DMYSTOP(_x) (((_x) & 0x3) << 23)	 /* Dummy Stop */
+#define SSPSP_SFRMWDTH(_x)    (((_x) & 0x3F) << 16) /* Serial Frame width*/
+#define SSPSP_SFRMDLY(_x)    (((_x) & 0x7F) << 9) /* Serial Frame delay*/
+#define SSPSP_DMYSTRT(_x)    (((_x) & 0x3) << 7) /* Dummy Start*/
+#define SSPSP_STRTDLY(_x)    (((_x) & 0x7) << 4) /* Start Delay*/
+#define SSPSP_ETDS      (1 << 3)        /* End-of-Transfer Data State*/
+#define SSPSP_SFRMP     (1 << 2)        /* Serial Frame Polarity */
+#define SSPSP_SCMODE(_x)    (((_x) & 0x3)) /* Serial Bit-Rate Clock mode*/
+
+#define SSACD_ACPS(_x)    (((_x) & 0x7) << 4) /* Audio Clock PLL Select */
+#define SSACD_SCDB        (1 << 3) /* Audio Clock PLL Select */
+#define SSACD_ACDS(_x)    (((_x) & 0x7)) /* Audio Clock Divider Select */
+
+
+/******************************************************************************/
+/* MultiMediaCard/SD/SDIO Controller */
+/******************************************************************************/
+#define MMC_STRPCL	_PXAREG(0x41100000) /* MMC Clock Start/Stop register 15-28 */
+#define MMC_STAT	_PXAREG(0x41100004) /* MMC Status register 15-28 */
+#define MMC_CLKRT	_PXAREG(0x41100008) /* MMC Clock Rate register 15-30 */
+#define MMC_SPI	_PXAREG(0x4110000C) /* MMC SPI Mode register 15-30 */
+#define MMC_CMDAT	_PXAREG(0x41100010) /* MMC Command/Data register 15-31 */
+#define MMC_RESTO	_PXAREG(0x41100014) /* MMC Response Time-Out register 15-33 */
+#define MMC_RDTO	_PXAREG(0x41100018) /* MMC Read Time-Out register 15-33 */
+#define MMC_BLKLEN	_PXAREG(0x4110001C) /* MMC Block Length register 15-34 */
+#define MMC_NUMBLK	_PXAREG(0x41100020) /* MMC Number of Blocks register 15-34 */
+#define MMC_PRTBUF	_PXAREG(0x41100024) /* MMC Buffer Partly Full register 15-35 */
+#define MMC_I_MASK	_PXAREG(0x41100028) /* MMC Interrupt Mask register 15-35 */
+#define MMC_I_REG	_PXAREG(0x4110002C) /* MMC Interrupt Request register 15-37 */
+#define MMC_CMD	_PXAREG(0x41100030) /* MMC Command register 15-40 */
+#define MMC_ARGH	_PXAREG(0x41100034) /* MMC Argument High register 15-40 */
+#define MMC_ARGL	_PXAREG(0x41100038) /* MMC Argument Low register 15-41 */
+#define MMC_RES	_PXAREG(0x4110003C) /* MMC Response FIFO 15-41 */
+#define MMC_RXFIFO	_PXAREG(0x41100040) /* MMC Receive FIFO 15-41 */
+#define MMC_TXFIFO	_PXAREG(0x41100044) /* MMC Transmit FIFO 15-42 */
+#define MMC_RDWAIT	_PXAREG(0x41100048) /* MMC RD_WAIT register 15-42 */
+#define MMC_BLKS_REM	_PXAREG(0x4110004C) /* MMC Blocks Remaining register 15-43 */
+
+
+/******************************************************************************/
+/* Clocks Manager */
+/******************************************************************************/
+#define CCCR	_PXAREG(0x41300000) /* Core Clock Configuration register 3-94 */
+#define CKEN	_PXAREG(0x41300004) /* Clock Enable register 3-97 */
+#define OSCC	_PXAREG(0x41300008) /* Oscillator Configuration register 3-98 */
+#define CCSR	_PXAREG(0x4130000C) /* Core Clock Status register 3-100 */
+
+#define CCCR_CPDIS	(1 << 31)	/* Core PLL Output Disable */
+#define CCCR_PPDIS	(1 << 30)	/* Peripheral PLL Output Disable */
+#define CCCR_LCD_26	(1 << 27)	/* LCD Clock Frequency in Deep-Idle or 13M Mode */
+#define CCCR_PLL_EARLY_EN (1 << 26)	/* Early PLL Enable */
+#define CCCR_A		(1 << 25)	/* Alt. Setting for Memory Controller Clock */
+#define CCCR_N_MASK	0x0380		/* Run Mode Frequency to Turbo Mode Frequency Multiplier */
+#define CCCR_M_MASK	0x0060		/* Memory Frequency to Run Mode Frequency Multiplier */
+#define CCCR_L_MASK	0x001f		/* Crystal Frequency to Memory Frequency Multiplier */
+#define CCCR_2N(_x)      (((_x) & 0xf) << 7)
+#define CCCR_L(_x)      (((_x) & 0x1f))
+
+
+#define CKEN24_CIF	(1 << 24)	/* CIF Unit Clock Enable */
+#define CKEN23_SSP1	(1 << 23)	/* SSP1 Unit Clock Enable */
+#define CKEN22_MEMC	(1 << 22)	/* Memory Controller */
+#define CKEN21_MEMS	(1 << 21)	/* Memory Stick Host Controller */
+#define CKEN20_IMEM	(1 << 20)	/* Internal Memory Clock Enable */
+#define CKEN19_KEYP	(1 << 19)	/* Keypad Interface Clock Enable */
+#define CKEN18_USIM	(1 << 18)	/* USIM Unit Clock Enable */
+#define CKEN17_MSL	(1 << 17)	/* MSL Inteface Unit Enable */
+#define CKEN16_LCD	(1 << 16)	/* LCD Unit Clock Enable */
+#define CKEN15_PMI2C	(1 << 15)	/* Pomer Manager I2C Unit Clock Enable */
+#define CKEN14_I2C	(1 << 14)	/* I2C Unit Clock Enable */
+#define CKEN13_IR	(1 << 13)	/* Infrared Port Clock Enable */
+#define CKEN12_MMC	(1 << 12)	/* MMC Unit Clock Enable */
+#define CKEN11_USBC	(1 << 11)	/* USB Unit Clock Enable */
+#define CKEN10_USBH	(1 << 10)	/* USB Unit Clock Enable */
+#define CKEN9_OST	(1 << 9)	/* USB Unit Clock Enable */
+#define CKEN8_I2S	(1 << 8)	/* I2S Unit Clock Enable */
+#define CKEN7_BTUART	(1 << 7)	/* BTUART Unit Clock Enable */
+#define CKEN6_FFUART	(1 << 6)	/* FFUART Unit Clock Enable */
+#define CKEN5_STUART	(1 << 5)	/* STUART Unit Clock Enable */
+#define CKEN4_SSP3	(1 << 4)	/* SSP3 Unit Clock Enable */
+#define CKEN3_SSP2	(1 << 3)	/* SSP2 Unit Clock Enable */
+#define CKEN2_AC97	(1 << 2)	/* AC97 Unit Clock Enable */
+#define CKEN1_PWM1	(1 << 1)	/* PWM1 Clock Enable */
+#define CKEN0_PWM0	(1 << 0)	/* PWM0 Clock Enable */
+
+#define OSCC_OSD(_x)	(((_x) & 0x3) << 5) /* Processor Oscillator Stabilization Delay */
+#define OSCC_CRI	(1 << 4)	/* Clock Request Input Status */
+#define OSCC_PIO_EN	(1 << 3)	/* 13-MHz Processor Oscillator Output Enable */
+#define OSCC_TOUT_EN	(1 << 2)	/* Timekeeping (32.768kHz) Oscillator Output Enable */
+#define OSCC_OON	(1 << 1)	/* 32.768kHz OON (write-once only bit) */
+#define OSCC_OOK	(1 << 0)	/* 32.768kHz OOK (read-only bit) */
+
+#define CCSR_CPDIS_S	(1 << 31)	/* Core PLL Output Disable Status */
+#define CCSR_PPDIS_S	(1 << 30)	/* Peripheral PLL Output Disable Status */
+#define CCSR_CPLCK	(1 << 29)	/* Core PLL Lock */
+#define CCSR_PPLCK	(1 << 28)	/* Peripheral PLL Lock */
+#define CCSR_2N_S_MASK	(0x7 << 7)
+#define CCSR_L_S_MASK	(0x1f << 0)
+
+#define CLKCFG_T    	(1 << 0)      	/* Turbo mode */
+#define CLKCFG_F     	(1 << 1)	/* Frequency change */
+#define CLKCFG_HT	(1 << 2)	/* Half-turbo Mode */
+#define CLKCFG_B     	(1 << 3)	/* Fast-bus mode */
+
+
+/******************************************************************************/
+/* Mobile Scalable Link (MSL) Interface */
+/******************************************************************************/
+#define BBFIFO1	_PXAREG(0x41400004) /* MSL Channel 1 Receive/Transmit FIFO register 16-13 */
+#define BBFIFO2	_PXAREG(0x41400008) /* MSL Channel 2 Receive/Transmit FIFO register 16-13 */
+#define BBFIFO3	_PXAREG(0x4140000C) /* MSL Channel 3 Receive/Transmit FIFO register 16-13 */
+#define BBFIFO4	_PXAREG(0x41400010) /* MSL Channel 4 Receive/Transmit FIFO register 16-13 */
+#define BBFIFO5	_PXAREG(0x41400014) /* MSL Channel 5 Receive/Transmit FIFO register 16-13 */
+#define BBFIFO6	_PXAREG(0x41400018) /* MSL Channel 6 Receive/Transmit FIFO register 16-13 */
+#define BBFIFO7	_PXAREG(0x4140001C) /* MSL Channel 7 Receive/Transmit FIFO register 16-13 */
+
+#define BBCFG1	_PXAREG(0x41400044) /* MSL Channel 1 Configuration register 16-15 */
+#define BBCFG2	_PXAREG(0x41400048) /* MSL Channel 2 Configuration register 16-15 */
+#define BBCFG3	_PXAREG(0x4140004C) /* MSL Channel 3 Configuration register 16-15 */
+#define BBCFG4	_PXAREG(0x41400050) /* MSL Channel 4 Configuration register 16-15 */
+#define BBCFG5	_PXAREG(0x41400054) /* MSL Channel 5 Configuration register 16-15 */
+#define BBCFG6	_PXAREG(0x41400058) /* MSL Channel 6 Configuration register 16-15 */
+#define BBCFG7	_PXAREG(0x4140005C) /* MSL Channel 7 Configuration register 16-15 */
+
+#define BBSTAT1	_PXAREG(0x41400084) /* MSL Channel 1 Status register 16-19 */
+#define BBSTAT2	_PXAREG(0x41400088) /* MSL Channel 2 Status register 16-19 */
+#define BBSTAT3	_PXAREG(0x4140008C) /* MSL Channel 3 Status register 16-19 */
+#define BBSTAT4	_PXAREG(0x41400090) /* MSL Channel 4 Status register 16-19 */
+#define BBSTAT5	_PXAREG(0x41400094) /* MSL Channel 5 Status register 16-19 */
+#define BBSTAT6	_PXAREG(0x41400098) /* MSL Channel 6 Status register 16-19 */
+#define BBSTAT7	_PXAREG(0x4140009C) /* MSL Channel 7 Status register 16-19 */
+
+#define BBEOM1	_PXAREG(0x414000C4) /* MSL Channel 1 EOM register 16-22 */
+#define BBEOM2	_PXAREG(0x414000C8) /* MSL Channel 2 EOM register 16-22 */
+#define BBEOM3	_PXAREG(0x414000CC) /* MSL Channel 3 EOM register 16-22 */
+#define BBEOM4	_PXAREG(0x414000D0) /* MSL Channel 4 EOM register 16-22 */
+#define BBEOM5	_PXAREG(0x414000D4) /* MSL Channel 5 EOM register 16-22 */
+#define BBEOM6	_PXAREG(0x414000D8) /* MSL Channel 6 EOM register 16-22 */
+#define BBEOM7	_PXAREG(0x414000DC) /* MSL Channel 7 EOM register 16-22 */
+
+#define BBIID	_PXAREG(0x41400108) /* MSL Interrupt ID register 16-23 */
+
+#define BBFREQ	_PXAREG(0x41400110) /* MSL Transmit Frequency Select register 10-6 */
+#define BBWAIT	_PXAREG(0x41400114) /* MSL Wait Count register 16-24 */
+#define BBCST	_PXAREG(0x41400118) /* MSL Clock Stop Time register 16-25 */
+#define BBWAKE	_PXAREG(0x41400140) /* MSL Wake-Up register 16-26 */
+#define BBITFC	_PXAREG(0x41400144) /* MSL Interface Width register 10-6 */
+
+
+/******************************************************************************/
+/* Keypad Interface */
+/******************************************************************************/
+#define KPC	_PXAREG(0x41500000) /* Keypad Interface Control register 18-12 */
+#define KPDK	_PXAREG(0x41500008) /* Keypad Interface Direct Key register 18-16 */
+#define KPREC	_PXAREG(0x41500010) /* Keypad Interface Rotary Encoder Count register 18-17 */
+#define KPMK	_PXAREG(0x41500018) /* Keypad Interface Matrix Key register 18-18 */
+#define KPAS	_PXAREG(0x41500020) /* Keypad Interface Automatic Scan register 18-18 */
+#define KPASMKP0	_PXAREG(0x41500028) /* Keypad Interface Automatic Scan Multiple Keypress register 0 18-20 */
+#define KPASMKP1	_PXAREG(0x41500030) /* Keypad Interface Automatic Scan Multiple Keypress register 1 18-20 */
+#define KPASMKP2	_PXAREG(0x41500038) /* Keypad Interface Automatic Scan Multiple Keypress register 2 18-20 */
+#define KPASMKP3	_PXAREG(0x41500040) /* Keypad Interface Automatic Scan Multiple Keypress register 3 18-20 */
+#define KPKDI	_PXAREG(0x41500048) /* Keypad Interface Key Debounce Interval register 18-23 */
+
+
+/******************************************************************************/
+/* Universal Subscriber ID (USIM) Interface */
+/******************************************************************************/
+#define RBR	_PXAREG(0x41600000) /* USIM Receive Buffer register 19-18 */
+#define THR	_PXAREG(0x41600004) /* USIM Transmit Holding register 19-19 */
+#define IER	_PXAREG(0x41600008) /* USIM Interrupt Enable register 19-20 */
+#define IIR	_PXAREG(0x4160000C) /* USIM Interrupt Identification register 19-22 */
+#define FCR	_PXAREG(0x41600010) /* USIM FIFO Control register 19-24 */
+#define FSR	_PXAREG(0x41600014) /* USIM FIFO Status register 19-26 */
+#define ECR	_PXAREG(0x41600018) /* USIM Error Control register 19-27 */
+#define LCR	_PXAREG(0x4160001C) /* USIM Line Control register 19-29 */
+#define USCCR	_PXAREG(0x41600020) /* USIM Card Control register 19-31 */
+#define LSR	_PXAREG(0x41600024) /* USIM Line Status register 19-32 */
+#define EGTR	_PXAREG(0x41600028) /* USIM Extra Guard Time register 19-34 */
+#define BGTR	_PXAREG(0x4160002C) /* USIM Block Guard Time register 19-34 */
+#define TOR	_PXAREG(0x41600030) /* USIM Time-Out register 19-35 */
+#define CLKR	_PXAREG(0x41600034) /* USIM Clock register 19-36 */
+#define DLR	_PXAREG(0x41600038) /* USIM Divisor Latch register 19-37 */
+#define FLR	_PXAREG(0x4160003C) /* USIM Factor Latch register 19-37 */
+#define CWTR	_PXAREG(0x41600040) /* USIM Character Waiting Time register 19-38 */
+#define BWTR	_PXAREG(0x41600044) /* USIM Block Waiting Time register 19-39 */
+
+
+/******************************************************************************/
+/* Synchronous Serial Port 2 */
+/******************************************************************************/
+#define SSCR0_2	_PXAREG(0x41700000) /* SSP2 Control register 0 8-25 */
+#define SSCR1_2	_PXAREG(0x41700004) /* SSP 2 Control register 1 8-29 */
+#define SSSR_2	_PXAREG(0x41700008) /* SSP 2 Status register 8-43 */
+#define SSITR_2	_PXAREG(0x4170000C) /* SSP 2 Interrupt Test register 8-42 */
+#define SSDR_2	_PXAREG(0x41700010) /* SSP 2 Data Write register/Data Read register 8-48 */
+#define SSTO_2	_PXAREG(0x41700028) /* SSP 2 Time-Out register 8-41 */
+#define SSPSP_2	_PXAREG(0x4170002C) /* SSP 2 Programmable Serial Protocol 8-39 */
+#define SSTSA_2	_PXAREG(0x41700030) /* SSP2 TX Timeslot Active register 8-48 */
+#define SSRSA_2	_PXAREG(0x41700034) /* SSP2 RX Timeslot Active register 8-49 */
+#define SSTSS_2	_PXAREG(0x41700038) /* SSP2 Timeslot Status register 8-50 */
+#define SSACD_2	_PXAREG(0x4170003C) /* SSP2 Audio Clock Divider register 8-51 */
+
+
+/******************************************************************************/
+/* Memory Stick Host Controller */
+/******************************************************************************/
+#define MSCMR	_PXAREG(0x41800000) /* MSHC Command register 17-8 */
+#define MSCRSR	_PXAREG(0x41800004) /* MSHC Control and Status register 17-9 */
+#define MSINT	_PXAREG(0x41800008) /* MSHC Interrupt and Status register 17-10 */
+#define MSINTEN	_PXAREG(0x4180000C) /* MSHC Interrupt Enable register 17-11 */
+#define MSCR2	_PXAREG(0x41800010) /* MSHC Control register 2 17-12 */
+#define MSACD	_PXAREG(0x41800014) /* MSHC ACD Command register 17-13 */
+#define MSRXFIFO	_PXAREG(0x41800018) /* MSHC Receive FIFO register 17-14 */
+#define MSTXFIFO	_PXAREG(0x4180001C) /* MSHC Transmit FIFO register 17-15 */
+
+
+/******************************************************************************/
+/* Synchronous Serial Port 3 */
+/******************************************************************************/
+#define SSCR0_3	_PXAREG(0x41900000) /* SSP 3 Control register 0 8-25 */
+#define SSCR1_3	_PXAREG(0x41900004) /* SSP 3 Control register 1 8-29 */
+#define SSSR_3	_PXAREG(0x41900008) /* SSP 3 Status register 8-43 */
+#define SSITR_3	_PXAREG(0x4190000C) /* SSP 3 Interrupt Test register 8-42 */
+#define SSDR_3	_PXAREG(0x41900010) /* SSP 3 Data Write register/Data Read register 8-48 */
+#define SSTO_3	_PXAREG(0x41900028) /* SSP 3 Time-Out register 8-41 */
+#define SSPSP_3	_PXAREG(0x4190002C) /* SSP 3 Programmable Serial Protocol 8-39 */
+#define SSTSA_3	_PXAREG(0x41900030) /* SSP TX Timeslot Active register 8-48 */
+#define SSRSA_3	_PXAREG(0x41900034) /* SSP RX Timeslot Active register 8-49 */
+#define SSTSS_3	_PXAREG(0x41900038) /* SSP Timeslot Status register 8-50 */
+#define SSACD_3	_PXAREG(0x4190003C) /* SSP Audio Clock Divider register 8-51 */
+
+#endif /* _PXA27X_REGISTER_H */
diff --git a/tos/chips/pxa27x/pxa27x_util.s b/tos/chips/pxa27x/pxa27x_util.s
new file mode 100644
index 00000000..fc8c13d8
--- /dev/null
+++ b/tos/chips/pxa27x/pxa27x_util.s
@@ -0,0 +1,255 @@
+
+.macro CPWAIT  Rd
+        MRC     P15, 0, \Rd, C2, C0, 0       @ arbitrary read of CP15 into register Rd
+        MOV     \Rd, \Rd                     @ wait for it (foward dependency)
+        SUB     PC, PC, #4                   @ branch to next instruction
+.endm
+
+	
+.macro ALLOCATE Rd
+        MCR	P15, 0, \Rd, C7, C2, 5       @ perform line allocation based on Rd
+.endm
+@@@@@@@@@@@@@@@@@@@@@@@@@
+@ to create an assembly function that confirms to AAPCS (or so I think ;o)
+@ .func function name
+@	STMFD R13!, {R4 - R12, LR}..alternatively STMFD R13!, {registers used, LR}
+@	{function body}
+@	LDMFD R13!, {R4 - R12, PC}...must match above with LR replaced by PC
+@ .endfunc
+@@@@@@@@@@@@@@@@@@@@@@@@@@
+
+@whether WT or WB is used is determined in mmu_table.s	
+  .extern MMUTable 
+		
+	.equ	MEMORY_CONFIG_BASE,(0x48000000)      
+         .equ	FLASH_SYNC_value, (0x25C3<<1) @ Value to set flash into burst 16 sync mode
+	@.equ	FLASH_SYNC_value, (0x25C2<<1) @ Value to set flash into burst 8 sync mode
+        .equ	FLASH_WRITE,(0x0060)        @ Code for writing to flash
+	.equ	FLASH_READSTATUS,(0x0070)        @ Code for reading status
+        .equ	FLASH_WCONF,(0x0003)        @ Code to confirm write to flash	
+        .equ	FLASH_READ,(0x00FF)	      @ Code to place flash in read mode	
+        .equ	SXCNFG_sync_value,(0x7011)    @ SXCNFG value for burst16 sync flash operation
+	@ .equ	SXCNFG_sync_value,(0x6011)    @ SXCNFG value for burst8  sync flash operation	
+	.equ    SXCNFG_offset,(0x1c)     
+
+	.global initMMU
+	.global initSyncFlash
+	.global enableICache	
+	.global enableDCache
+	.global disableDCache		
+	.global invalidateDCache
+	.global cleanDCache
+	.global globalCleanAndInvalidateDCache
+		
+initSyncFlash:
+	@this function MUST be called after the ICACHE is initialized to work correctly!!!
+	@also, the DCache being on in WB mode will possibly cause this to randomly FAIL!
+.func initSyncFlash
+	STMFD R13!, {R4 - R7, LR}
+	ldr     r1,     =MEMORY_CONFIG_BASE     @ Memory config register base
+        ldr     r2,     =FLASH_SYNC_value	@ Value to set into flash RCR register
+        ldr     r3,     =FLASH_WRITE		@ Write to flash instruction
+        ldr     r4,     =FLASH_WCONF		@ Write to flash confirm instruction
+        ldr     r5,     =FLASH_READ		@ Load "read array" mode command
+        ldr     r6,     =0x0			@ Boot ROM Flash Base address
+        ldr     r7,     =SXCNFG_sync_value	@ SXCNFG Magic number for now
+	b goSyncFlash
+
+@align on cache line so that we fetch the next 8 instructions...	
+.align 5
+goSyncFlash:	
+	@ Now program everything into the Flash and SXCNFG registers
+        str     r7,     [r1, #SXCNFG_offset]		@ Update PXA27x SXCNFG register
+        strh    r3,     [r2]                            @ Yes, the data is on the address bus!
+        strh    r4,     [r2]                            @ Confirm the write to the RCR
+        strh    r5,     [r6]                            @ Place flash back in read mode
+        ldrh    r5,     [r6]                            @ Create a data dependency stall to guarantee write
+        nop                                             @ go to the end of the cache line
+	nop
+        nop
+	LDMFD R13!, {R4 - R7, PC}
+.endfunc
+
+	@assembly routine to init our MMU
+initMMU:
+.func initMMU
+	MRC P15,0,R0,C3,C0,0		@read the domain register into R0
+	ORR R0, R0, #0xFF		@make sure that we completely enable domain 0
+	MCR P15,0,R0,C3,C0,0		@write the domain register
+	CPWAIT R0			@be anal and make sure it completes
+
+	@time to setup the page table base register
+	@LDR R0, =MMUTable		@move the table we want into R0
+	MCR P15, 0, R0, C2, C0		@save it     
+        CPWAIT	R0			@wait it
+
+	@time to enable the MMU!
+        MRC P15,0,R0,C1,C0,0		@get CP15 register 1
+        ORR R0, R0, #0x1		@set the MMU enable bit
+        MCR P15,0,R0,C1,C0,0		@save it
+	CPWAIT	R0			@wait it
+	MOV PC, LR
+.endfunc
+
+enableICache:	
+.func enableICache
+	@icache section
+	@globally unlock the icache
+	MCR P15, 0, R0, C9, C1, 1
+	CPWAIT R0
+
+	@globally unlock the itlb
+	MCR P15, 0, R0, C10, C4, 1
+	CPWAIT R0
+		
+	@invalidate just the icache and BTB....write to P15 C7, C5, 0
+	MCR P15, 0, R0, C7, C5, 0
+	CPWAIT R0
+    
+	@invalidate the iTLB...write to P15 C8, C5, 0
+	MCR P15, 0, R0, c8, c5,	0	@save it
+	CPWAIT R0			@wait it
+    
+	@Enable instruction cache 
+	MRC P15, 0, R0, C1, C0, 0	@get CP15 register 1
+	ORR R0, R0, #0x1000		@set the icache bit
+	MCR P15, 0, R0, C1, C0, 0	@wait it
+	CPWAIT R0
+	
+	@enable the BTB
+	MRC P15, 0, R0, C1, C0, 0	@get CP15 register 1
+	ORR R0, R0, #0x800		@set the btb enable bit
+	MCR P15, 0, R0, C1, C0, 0	@save it	
+	CPWAIT R0			@wait it	
+	MOV PC, LR
+.endfunc
+
+
+enableDCache:
+.func enableDCache
+	@globally unlock the dtlb
+	MCR P15, 0, R0, c10, c8, 1
+	CPWAIT R0
+	
+	@globally unlock the dcache
+	MCR P15, 0, R0, C9, c2, 1
+	CPWAIT R0
+	
+	@first invalidate dcache and mini-dcache
+	MCR P15, 0, R0, C7, C6, 0
+	CPWAIT R0
+
+	@invalidate the dTLB...write to P15 C8, C6, 0
+	MCR P15, 0, R0, C8, C6,	0	@save it
+	CPWAIT R0			@wait it
+
+	
+	@ now, enable data cache	
+	MCR P15, 0, R0, C7, C10, 4	@drain write buffer
+	MRC P15, 0, R0, C1, C0, 0	@get CP15 register 1
+	ORR R0, R0, #0x4		@set the dcache enable bit
+	MCR P15, 0, R0, C1, C0, 0	@save it
+	CPWAIT R0			@wait it
+	MOV PC, LR
+.endfunc
+
+disableDCache:
+.func disableDCache
+@since caching might be WB or WT for a given line, need to invalidate/flush dcache to ensure coherency
+	@globally unlock the dcache
+	STMFD R13!, {R0, LR}
+	MCR P15, 0, R0, C9, c2, 1
+	CPWAIT R0
+
+	@globally clean and invalidate the cache
+	bl globalCleanAndInvalidateDCache
+		
+	@ now, disable data cache	
+	MCR P15, 0, R0, C7, C10, 4	@drain write buffer
+	MRC P15, 0, R0, C1, C0, 0	@get CP15 register 1
+	BIC R0, R0, #0x4		@clear the dcache enable bit
+	MCR P15, 0, R0, C1, C0, 0	@save it
+	CPWAIT R0			@wait it
+	LDMFD R13!, {R0, LR}
+.endfunc
+
+@function to invalidate the DCCache for a given Buffer
+@funtion take 2 parameters
+@R0 = base virtual address to evict
+@R1 = number of bytes to evict...cache line is 32 bytes
+invalidateDCache:	
+.func invalidateDCache
+	CMPS R1,#0			@check that we're greater than 0
+	MOVLE PC, LR			@return if not
+invalidateDCacheLoop:	
+	MCR P15, 0, R0, C7, C6, 1	@invalidate this line
+	SUBS R1, R1, #32		@subtract out 32 w/CPSR update
+	ADD  R0, R0, #32		@add 32 to the address w/o CPSR update
+	BGT invalidateDCacheLoop	@rerun if subtract is greater than
+	MOV PC, LR
+.endfunc
+
+@function to clean the DCCache for a given Buffer
+@if a line is dirty, it will be cleaned...i.e. written back to memory in WB mode
+@funtion take 2 parameters
+@R0 = base virtual address to evict
+@R1 = number of bytes to evict...cache line is 32 bytes
+cleanDCache:	
+.func cleanDCache
+	CMPS R1,#0			@check that we're greater than 0
+	MOVLE PC, LR			@return if not
+cleanDCacheLoop:	
+	MCR P15, 0, R0, C7, C10, 1	@clean this line
+	SUBS R1, R1, #32		@subtract out 32 w/CPSR update
+	ADD  R0, R0, #32		@add 32 to the address w/o CPSR update
+	BGT cleanDCacheLoop		@rerun if subtract is greater than
+	MCR P15, 0, R0, C7, C10, 4	@drain write buffer
+	CPWAIT R0			@wait it
+	MOV PC, LR
+.endfunc
+
+
+@Global Clean/Invalidate THE DATA CACHE
+@R1 contains the virtual address of a region of cacheable memory reserved for
+@this clean operation
+@R0 is the loop count; Iterate 1024 times which is the number of lines in the
+@data cache
+	
+globalCleanAndInvalidateDCache:
+.func globalCleanAndInvalidateDCache
+	@note, this function assumes that we will NEVER have anything physical at
+	@address 0x04000000 corresponds to static chip select 1
+	STMFD R13!, {R0 - R3, LR}
+	LDR R1, =0x04000000	
+	MOV R0, #1024
+LOOP1:
+	
+	ALLOCATE R1 @ Allocate a line at the virtual address
+	@ specified by R1.
+	SUBS R0, R0, #1 @ Decrement loop count
+	ADD R1, R1, #32 @ Increment the address in R1 to the next cache line
+	BNE LOOP1
+	
+	@Clean the Mini-data Cache
+	@ CanÆt use line-allocate command, so cycle 2KB of unused data through.
+	@ R2 contains the virtual address of a region of cacheable memory reserved for
+	@ cleaning the Mini-data Cache
+	@ R0 is the loop count; Iterate 64 times which is the number of lines in the
+	@ Mini-data Cache.
+
+	@note, this function assumes that we will NEVER have anything physical at
+	@address 0x05000000 corresponds to static chip select 1
+	LDR R2, =0x05000000	
+	MOV R0, #64
+LOOP2:
+	SUBS R0, R0, #1 @ Decrement loop count
+	LDR R3,[R2],#32 @ Load and increment to next cache line
+	BNE LOOP2
+	
+	@ Invalidate the data cache and mini-data cache
+	MCR P15, 0, R0, C7, C6, 0
+	LDMFD R13!, {R0 - R3, PC}
+.endfunc
+	
+.end
+	
\ No newline at end of file
diff --git a/tos/chips/pxa27x/pxa27xhardware.h b/tos/chips/pxa27x/pxa27xhardware.h
new file mode 100644
index 00000000..240234cf
--- /dev/null
+++ b/tos/chips/pxa27x/pxa27xhardware.h
@@ -0,0 +1,188 @@
+// $Id: pxa27xhardware.h,v 1.8 2010-06-29 22:07:45 scipio Exp $
+
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ *
+ * Copyright (c) 2000-2002 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+/*
+ *
+ * Authors:   Philip Buonadonna
+ *
+ * Edits:	Josh Herbach
+ * Revised: 09/02/2005
+ */
+
+#ifndef PXA27X_HARDWARE_H
+#define PXA27X_HARDWARE_H
+
+#include "arm_defs.h"
+#include "pxa27x_registers.h"
+
+#define _pxa27x_perf_clear() {asm volatile ("mcr p14,0,%0,c0,c1,0\n\t"::"r" (0x5));}
+#define _pxa27x_perf_get(_x) {asm volatile ("mrc p14,0,%0,c1,c1,0":"=r" (_x));}
+
+// External utility functions
+extern void enableICache();
+extern void initSyncFlash();
+
+inline uint32_t _pxa27x_clzui(uint32_t i) {
+  uint32_t count;
+  asm volatile ("clz %0,%1": "=r" (count) : "r" (i));
+  return count;
+}
+
+typedef uint32_t __nesc_atomic_t;
+
+//NOTE...at the moment, these functions will ONLY disable the IRQ...FIQ is left alone
+inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous()
+{
+  uint32_t result = 0;
+  uint32_t temp = 0;
+
+  asm volatile (
+		"mrs %0,CPSR\n\t"
+		"orr %1,%2,%4\n\t"
+		"msr CPSR_cf,%3"
+		: "=r" (result) , "=r" (temp)
+		: "0" (result) , "1" (temp) , "i" (ARM_CPSR_INT_MASK)
+		);
+  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
+  return result;
+}
+
+inline void __nesc_atomic_end(__nesc_atomic_t oldState) @spontaneous()
+{
+  uint32_t  statusReg = 0;
+  //make sure that we only mess with the INT bit
+  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
+  oldState &= ARM_CPSR_INT_MASK;
+  asm volatile (
+		"mrs %0,CPSR\n\t"
+		"bic %0, %1, %2\n\t"
+		"orr %0, %1, %3\n\t"
+		"msr CPSR_c, %1"
+		: "=r" (statusReg)
+		: "0" (statusReg),"i" (ARM_CPSR_INT_MASK), "r" (oldState)
+		);
+
+  return;
+}
+
+inline void __nesc_enable_interrupt() {
+
+  uint32_t statusReg = 0;
+
+  asm volatile (
+	       "mrs %0,CPSR\n\t"
+	       "bic %0,%1,#0xc0\n\t"
+	       "msr CPSR_c, %1"
+	       : "=r" (statusReg)
+	       : "0" (statusReg)
+	       );
+  return;
+}
+
+inline void __nesc_disable_interrupt() {
+
+  uint32_t statusReg = 0;
+
+  asm volatile (
+		"mrs %0,CPSR\n\t"
+		"orr %0,%1,#0xc0\n\t"
+		"msr CPSR_c,%1\n\t"
+		: "=r" (statusReg)
+		: "0" (statusReg)
+		);
+  return;
+
+}
+
+
+inline void __nesc_atomic_sleep()
+{
+  /* 
+   * Atomically enable interrupts and sleep , 
+   * LN : FOR NOW SLEEP IS DISABLED will be adding this functionality shortly
+   */
+  __nesc_enable_interrupt();
+  return;
+}
+
+typedef uint8_t mcu_power_t @combine("mcombine");
+
+/** Combine function.  */
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) {
+  return (m1 < m2)? m1: m2;
+}
+
+
+#endif //TOSH_HARDWARE_H
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xPSPDMAC.nc b/tos/chips/pxa27x/ssp/HalPXA27xPSPDMAC.nc
new file mode 100644
index 00000000..e57af300
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xPSPDMAC.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+generic configuration HalPXA27xSpiDMAC(uint8_t valSCR,
+				       uint8_t valDSS,
+				       bool enableRWOT)
+{
+  provides interface Init;
+  provides interface SpiByte;
+  provides interface SpiPacket[uint8_t instance];
+  provides interface HalPXA27xSSPCntl;
+
+  uses {
+    interface HplPXA27xSSP as SSP;
+    interface HplPXA27xDMAChnl as RxDMA;
+    interface HplPXA27xDMAChnl as TxDMA;
+    interface HplPXA27xDMAInfo as SSPRxDMAInfo;
+    interface HplPXA27xDMAInfo as SSPTxDMAInfo;
+  }
+}
+
+implementation {
+  components new HalPXA27xSpiDMAM(3, valSCR, valDSS, enableRWOT);
+  components HalPXA27xSSPControlP;
+
+  Init = HalPXA27xSpiSSPM;
+  SpiByte = HalPXA27xSpiSSPM;
+  SpiPacket = HalPXA27xSpiSSPM;
+  HalPXA27xSSPCntl = HalPXA27xSSPControlP;
+
+  SSP = HalPXA27xSpiSSPM;
+  SSP = HalPXA27xSSPControlP;
+  RxDMA = HalPXA27xSpiDMAM;
+  TxDMA = HalPXA27xSpiDMAM;
+  SSPRxDMAInfo = HalPXA27xSpiDMAM;
+  SSPTxDMAInfo = HalPXA27xSpiDMAM;
+
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xPSPPioC.nc b/tos/chips/pxa27x/ssp/HalPXA27xPSPPioC.nc
new file mode 100644
index 00000000..d8d68184
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xPSPPioC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+generic configuration HalPXA27xSpiPioC(uint8_t valSCR,
+				       uint8_t valDSS,
+				       bool enableRWOT)
+{
+  provides interface Init;
+  provides interface SpiByte;
+  provides interface SpiPacket[uint8_t instance];
+  provides interface HalPXA27xSSPCntl;
+
+  uses interface HplPXA27xSSP as SSP;
+}
+
+implementation {
+  components new HalPXA27xSpiPioM(3, valSCR, valDSS, enableRWOT);
+  components HalPXA27xSSPControlP;
+
+  Init = HalPXA27xSpiPioM;
+  SpiByte = HalPXA27xSpiPioM;
+  SpiPacket = HalPXA27xSpiPioM;
+  HalPXA27xSSPCntl = HalPXA27xSSPControlP;
+
+  SSP = HalPXA27xSpiPioM;
+  SSP = HalPXA27xSSPControlP;
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSSPCntl.nc b/tos/chips/pxa27x/ssp/HalPXA27xSSPCntl.nc
new file mode 100644
index 00000000..f5a48ab9
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSSPCntl.nc
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "SSP.h"
+
+interface HalPXA27xSSPCntl 
+{
+
+  /**
+   *configure the port to be Master of SCLK
+   *
+   *@param enable:  port is master of SCLK if TRUE, slave if FALSE
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setMasterSCLK(bool enable);
+  
+  /**
+   *configure the port to be Master of SFRM
+   *
+   *@param enable:  port is master of SFRM if TRUE, slave if FALSE
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setMasterSFRM(bool enable);
+  
+  /**
+   *configure the port to be in ReceiveWithoutTransmit mode
+   *
+   *@param enable:  port only receives if TRUE, slave if FALSE
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setReceiveWithoutTransmit(bool enable);
+  
+  /**
+   *configure the port to be in SPI, SSP, Microwire, or PSP modes
+   *
+   *@param format:  format to use...see SSP.h for encodings
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setSSPFormat(SSPFrameFormat_t format);
+  
+  /**
+   *configure how many bits wide the port should consider 1 sample
+   *
+   *@param width:  bits to use
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setDataWidth(SSPDataWidth_t width);
+  
+  /**
+   *configure the port to invert the SFRM signal
+   *
+   *@param enable:  invert the signal if TRUE, don't invert if FALSE
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t enableInvertedSFRM(bool enable);
+  
+  /**
+   *configure the depth of the RX FIFO at which point an interrupt is generated
+   *
+   *@param level:  fifo level...see SSP.h for encodings
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setRxFifoLevel(SSPFifoLevel_t level);
+  
+  /**
+   *configure the depth of the TX FIFO at which point an interrupt is generated
+   *
+   *@param level:  fifo level...see SSP.h for encodings
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setTxFifoLevel(SSPFifoLevel_t level);
+    
+  /**
+   *configure the width of microwire commands
+   *
+   *@param size:  8 bit or 16 bit commands...see SSP.h for encodings
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setMicrowireTxSize(SSPMicrowireTxSize_t size);
+  
+  
+  /************************************
+   *clk specific configuration routines
+   ************************************/
+  
+  /**
+   *configure the clock divider for the port.
+   *
+   *@param clkdivider:  divider for the port...clk will be 13M/(clkdivider)
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setClkRate(uint16_t clkdivider);
+  
+  /**
+   *configure the Clk Mode of the port. 
+   *
+   *@param mode:  SSP_NORMALMODE for normal operation, SSP_NETWORKMODE for 
+   *              network mode
+   *
+   *@return FAIL if error, SUCCESS otherwise
+   */
+  command error_t setClkMode(SSPClkMode_t mode);
+
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSSPControlP.nc b/tos/chips/pxa27x/ssp/HalPXA27xSSPControlP.nc
new file mode 100644
index 00000000..84db114e
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSSPControlP.nc
@@ -0,0 +1,179 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "SSP.h"
+
+module HalPXA27xSSPControlP {
+  provides interface HalPXA27xSSPCntl;
+
+  uses interface HplPXA27xSSP as SSP;
+}
+
+implementation {
+
+  command error_t HalPXA27xSSPCntl.setMasterSCLK(bool enable) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1() & ~SSCR1_SCLKDIR;
+
+    if(!enable)
+      valSSCR1 |= SSCR1_SCLKDIR;
+    
+    call SSP.setSSCR1(valSSCR1);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setMasterSFRM(bool enable) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1() & ~SSCR1_SFRMDIR;
+
+    if(!enable)
+      valSSCR1 |= SSCR1_SFRMDIR;
+    
+    call SSP.setSSCR1(valSSCR1);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setReceiveWithoutTransmit(bool enable) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1() & ~SSCR1_RWOT;
+
+    if(enable)
+      valSSCR1 |= SSCR1_RWOT;
+    
+    call SSP.setSSCR1(valSSCR1);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setSSPFormat(SSPFrameFormat_t format) {
+    uint32_t valSSCR0;
+    valSSCR0 = call SSP.getSSCR0() & ~SSCR0_FRF(3);
+
+    call SSP.setSSCR0(valSSCR0 | SSCR0_FRF(format));
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setDataWidth(SSPDataWidth_t width) {
+    uint8_t bitEDSS;
+    uint32_t valSSCR0;
+    
+    if(width < 4)
+      return EINVAL;
+
+    // width + 1 = bits to use, don't forget to adjust!
+    width -= 1;
+    bitEDSS = width & 0x10; // keep bit 4
+    width = width & 0xF; // keep bits 0-3
+    
+    valSSCR0 = call SSP.getSSCR0() & ~SSCR0_DSS(0xF) & ~SSCR0_EDSS;
+    if(bitEDSS)
+      valSSCR0 |= SSCR0_EDSS;
+    valSSCR0 |= SSCR0_DSS(width);
+   
+    call SSP.setSSCR0(valSSCR0);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.enableInvertedSFRM(bool enable) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1() & ~SSCR1_IFS;
+
+    if(!enable)
+      valSSCR1 |= SSCR1_IFS;
+    
+    call SSP.setSSCR1(valSSCR1);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setRxFifoLevel(SSPFifoLevel_t level) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1() & ~SSCR1_RFT(0xF);
+
+    call SSP.setSSCR1(valSSCR1 | SSCR1_RFT(level));
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setTxFifoLevel(SSPFifoLevel_t level) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1() & ~SSCR1_TFT(0xF);
+
+    call SSP.setSSCR1(valSSCR1 | SSCR1_TFT(level));
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setMicrowireTxSize(SSPMicrowireTxSize_t size) {
+    uint32_t valSSCR1;
+    valSSCR1 = call SSP.getSSCR1();
+
+    if(size == UWIRE_16BIT)
+      valSSCR1 |= SSCR1_MWDS;
+    else if(size == UWIRE_8BIT)
+      valSSCR1 &= ~ SSCR1_MWDS;
+    else
+      return FAIL;
+
+    call SSP.setSSCR1(valSSCR1);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setClkRate(uint16_t clkdivider) {
+    uint32_t valSSCR0;
+
+    clkdivider -= 1; // check PXA Dev Manual for why to do this
+
+    valSSCR0 = call SSP.getSSCR0() & ~SSCR0_SCR(0xFFF);
+    valSSCR0 |= SSCR0_SCR(clkdivider);
+    call SSP.setSSCR0(valSSCR0);
+    return SUCCESS;
+  }
+
+  command error_t HalPXA27xSSPCntl.setClkMode(SSPClkMode_t mode) {
+    uint32_t valSSCR0;
+    valSSCR0 = call SSP.getSSCR0();
+
+    if(mode == SSP_NETWORKMODE)
+      valSSCR0 |= SSCR0_NCS;
+    else if(mode == SSP_NORMALMODE)
+      valSSCR0 &= ~SSCR0_NCS;
+    else
+      return FAIL;
+
+    call SSP.setSSCR0(valSSCR0);
+    return SUCCESS;
+  }
+
+  async event void SSP.interruptSSP() {
+    // intentionally left blank, not supposed to handle interrupts
+  }
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSSPDMAC.nc b/tos/chips/pxa27x/ssp/HalPXA27xSSPDMAC.nc
new file mode 100644
index 00000000..096f47cc
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSSPDMAC.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+generic configuration HalPXA27xSpiDMAC(uint8_t valSCR,
+				       uint8_t valDSS,
+				       bool enableRWOT)
+{
+  provides interface Init;
+  provides interface SpiByte;
+  provides interface SpiPacket[uint8_t instance];
+  provides interface HalPXA27xSSPCntl;
+
+  uses {
+    interface HplPXA27xSSP as SSP;
+    interface HplPXA27xDMAChnl as RxDMA;
+    interface HplPXA27xDMAChnl as TxDMA;
+    interface HplPXA27xDMAInfo as SSPRxDMAInfo;
+    interface HplPXA27xDMAInfo as SSPTxDMAInfo;
+  }
+}
+
+implementation {
+  components new HalPXA27xSpiDMAM(1, valSCR, valDSS, enableRWOT);
+  components HalPXA27xSSPControlP;
+
+  Init = HalPXA27xSpiDMAM;
+  SpiByte = HalPXA27xSpiDMAM;
+  SpiPacket = HalPXA27xSpiDMAM;
+  HalPXA27xSSPCntl = HalPXA27xSSPControlP;
+
+  SSP = HalPXA27xSpiDMAM;
+  SSP = HalPXA27xSSPControlP;
+  RxDMA = HalPXA27xSpiDMAM;
+  TxDMA = HalPXA27xSpiDMAM;
+  SSPRxDMAInfo = HalPXA27xSpiDMAM;
+  SSPTxDMAInfo = HalPXA27xSpiDMAM;
+
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSSPPioC.nc b/tos/chips/pxa27x/ssp/HalPXA27xSSPPioC.nc
new file mode 100644
index 00000000..0a54cf03
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSSPPioC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+generic configuration HalPXA27xSpiPioC(uint8_t valSCR,
+				       uint8_t valDSS,
+				       bool enableRWOT)
+{
+  provides interface Init;
+  provides interface SpiByte;
+  provides interface SpiPacket[uint8_t instance];
+  provides interface HalPXA27xSSPCntl;
+
+  uses interface HplPXA27xSSP as SSP;
+}
+
+implementation {
+  components new HalPXA27xSpiPioM(1, valSCR, valDSS, enableRWOT);
+  components HalPXA27xSSPControlP;
+
+  Init = HalPXA27xSpiPioM;
+  SpiByte = HalPXA27xSpiPioM;
+  SpiPacket = HalPXA27xSpiPioM;
+  HalPXA27xSSPCntl = HalPXA27xSSPControlP;
+
+  SSP = HalPXA27xSpiPioM;
+  SSP = HalPXA27xSSPControlP;
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSpiDMAC.nc b/tos/chips/pxa27x/ssp/HalPXA27xSpiDMAC.nc
new file mode 100644
index 00000000..02fc9955
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSpiDMAC.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+generic configuration HalPXA27xSpiDMAC(uint8_t valSCR,
+				       uint8_t valDSS,
+				       bool enableRWOT)
+{
+  provides interface Init;
+  provides interface SpiByte;
+  provides interface SpiPacket[uint8_t instance];
+  provides interface HalPXA27xSSPCntl;
+
+  uses {
+    interface HplPXA27xSSP as SSP;
+    interface HplPXA27xDMAChnl as RxDMA;
+    interface HplPXA27xDMAChnl as TxDMA;
+    interface HplPXA27xDMAInfo as SSPRxDMAInfo;
+    interface HplPXA27xDMAInfo as SSPTxDMAInfo;
+  }
+}
+
+implementation {
+  components new HalPXA27xSpiDMAM(0, valSCR, valDSS, enableRWOT);
+  components HalPXA27xSSPControlP;
+
+  Init = HalPXA27xSpiDMAM;
+  SpiByte = HalPXA27xSpiDMAM;
+  SpiPacket = HalPXA27xSpiDMAM;
+  HalPXA27xSSPCntl = HalPXA27xSSPControlP;
+
+  SSP = HalPXA27xSpiDMAM;
+  SSP = HalPXA27xSSPControlP;
+  RxDMA = HalPXA27xSpiDMAM.RxDMA;
+  TxDMA = HalPXA27xSpiDMAM.TxDMA;
+  SSPRxDMAInfo = HalPXA27xSpiDMAM.SSPRxDMAInfo;
+  SSPTxDMAInfo = HalPXA27xSpiDMAM.SSPTxDMAInfo;
+
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSpiDMAM.nc b/tos/chips/pxa27x/ssp/HalPXA27xSpiDMAM.nc
new file mode 100644
index 00000000..711305e6
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSpiDMAM.nc
@@ -0,0 +1,210 @@
+/* $Id: HalPXA27xSpiDMAM.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Implements the TOS 2.0 SpiByte and SpiPacket interfaces for the PXA27x.
+ * It assumes the Motorola Serial Peripheral Interface format.
+ * Uses DMA for the packet based transfers.
+ * 
+ * @param valSCR The value for the SCR field in the SSCR0 register of the 
+ * associated SSP peripheral.
+ *
+ * @param valDSS The value for the DSS field in the SSCR0 register of the
+ * associated SSP peripheral.
+ * 
+ * @author Phil Buonadonna
+ */
+
+generic module HalPXA27xSpiDMAM(uint8_t valFRF, uint8_t valSCR, uint8_t valDSS, bool enableRWOT) 
+{
+  provides {
+    interface Init;
+    interface SpiByte;
+    interface SpiPacket[uint8_t instance];
+  }
+  uses {
+    interface HplPXA27xSSP as SSP;
+    interface HplPXA27xDMAChnl as RxDMA;
+    interface HplPXA27xDMAChnl as TxDMA;
+    interface HplPXA27xDMAInfo as SSPRxDMAInfo;
+    interface HplPXA27xDMAInfo as SSPTxDMAInfo;
+  }
+}
+
+implementation
+{
+  // The BitBuckets need to be 8 bytes. 
+  norace unsigned long long txBitBucket, rxBitBucket;
+  //norace uint8_t ucBitBucket[0x10000];
+  //norace uint32_t txBitBucket, rxBitBucket;
+  uint8_t *txCurrentBuf, *rxCurrentBuf;
+  uint8_t instanceCurrent;
+  uint32_t lenCurrent;
+
+  command error_t Init.init() {
+
+    //txBitBucket = (uint32_t)((uint32_t)&ullBitBucket[1] * ~0x7);
+    //rxBitBucket = txBitBucket + 8;
+    //rxBitBucket = txBitBucket = (uint32_t)&ucBitBucket[0];
+    txCurrentBuf = rxCurrentBuf = NULL;
+    lenCurrent = 0 ;
+    instanceCurrent = 0;
+
+    call SSP.setSSCR1((SSCR1_TRAIL | SSCR1_RFT(8) | SSCR1_TFT(8)));
+    call SSP.setSSTO(3500);
+    call SSP.setSSCR0(SSCR0_SCR(valSCR) | SSCR0_SSE | SSCR0_FRF(valFRF) | SSCR0_DSS(valDSS) );
+
+    call TxDMA.setMap(call SSPTxDMAInfo.getMapIndex());
+    call RxDMA.setMap(call SSPRxDMAInfo.getMapIndex());
+    call TxDMA.setDALGNbit(TRUE);
+    call RxDMA.setDALGNbit(TRUE);
+
+    return SUCCESS;
+  }
+
+  async command uint8_t SpiByte.write(uint8_t tx) {
+    volatile uint32_t tmp;
+    volatile uint8_t val;
+#if 1
+    while ((call SSP.getSSSR()) & SSSR_RNE) {
+      tmp = call SSP.getSSDR();
+    } 
+#endif
+    call SSP.setSSDR(tx); 
+
+    while ((call SSP.getSSSR()) & SSSR_BSY);
+
+    val = call SSP.getSSDR();
+
+    return val;
+  }
+
+  async command error_t SpiPacket.send[uint8_t instance](uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) {
+    uint32_t tmp;
+    uint32_t txAddr,rxAddr;
+    uint32_t txDMAFlags, rxDMAFlags;
+    error_t error = FAIL;
+
+#if 1
+    while ((call SSP.getSSSR()) & SSSR_RNE) {
+      tmp = call SSP.getSSDR();
+    }
+#endif 
+
+    atomic {
+      txCurrentBuf = txBuf;
+      rxCurrentBuf = rxBuf;
+      lenCurrent = len;
+      instanceCurrent = instance;
+    }
+
+    txDMAFlags = (DCMD_FLOWTRG | DCMD_BURST8 | DCMD_WIDTH1 
+		  | DCMD_LEN(len));
+    rxDMAFlags = (DCMD_FLOWSRC | DCMD_ENDIRQEN | DCMD_BURST8 | DCMD_WIDTH1 
+		  | DCMD_LEN(len));
+
+    if (rxBuf == NULL) { 
+      rxAddr = (uint32_t)&rxBitBucket; 
+    }
+    else {
+      rxAddr = (uint32_t)rxBuf; 
+      rxDMAFlags |= DCMD_INCTRGADDR; 
+    }
+
+    if (txBuf == NULL) {
+      txAddr = (uint32_t)&txBitBucket; 
+    }
+    else {
+      txAddr = (uint32_t)txBuf;
+      txDMAFlags |= DCMD_INCSRCADDR;
+    }
+
+    call RxDMA.setDCSR(DCSR_NODESCFETCH | DCSR_EORIRQEN | DCSR_EORINT);
+    call RxDMA.setDSADR(call SSPRxDMAInfo.getAddr());
+    call RxDMA.setDTADR(rxAddr);
+    call RxDMA.setDCMD(rxDMAFlags);
+
+    call TxDMA.setDCSR(DCSR_NODESCFETCH);
+    call TxDMA.setDSADR(txAddr);
+    call TxDMA.setDTADR(call SSPTxDMAInfo.getAddr());
+    call TxDMA.setDCMD(txDMAFlags);
+    
+    call SSP.setSSSR(SSSR_TINT);
+    call SSP.setSSCR1((call SSP.getSSCR1()) | SSCR1_RSRE | SSCR1_TSRE);
+
+    call RxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH | DCSR_EORIRQEN);
+    call TxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH);
+    
+    error = SUCCESS;
+    
+    return error;
+  }
+  
+  async event void RxDMA.interruptDMA() {
+    uint8_t *txBuf,*rxBuf;
+    uint8_t instance;
+    uint32_t len;
+    
+    atomic {
+      instance = instanceCurrent;
+      len = lenCurrent;
+      txBuf = txCurrentBuf;
+      rxBuf = rxCurrentBuf;
+      lenCurrent = 0;
+    }
+    call RxDMA.setDCMD(0);
+    call RxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR);
+
+    signal SpiPacket.sendDone[instance](txBuf,rxBuf,len,SUCCESS);
+
+    return;
+  }
+
+  async event void TxDMA.interruptDMA() {
+    // The transmit side should NOT generate an interrupt. 
+    call TxDMA.setDCMD(0);
+    call TxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR);
+    return;
+  }
+
+  async event void SSP.interruptSSP() {
+    // For this Hal, we should never get here normally
+    // Perhaps we should signal any weird errors? For now, just clear the interrupts
+    call SSP.setSSSR(SSSR_BCE | SSSR_TUR | SSSR_EOC | SSSR_TINT | 
+			       SSSR_PINT | SSSR_ROR );
+    return;
+  }
+
+  default async event void SpiPacket.sendDone[uint8_t instance](uint8_t* txBuf, uint8_t* rxBuf, 
+					      uint16_t len, error_t error) {
+    return;
+  }
+  
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSpiPioC.nc b/tos/chips/pxa27x/ssp/HalPXA27xSpiPioC.nc
new file mode 100644
index 00000000..505dd7c7
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSpiPioC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+generic configuration HalPXA27xSpiPioC(uint8_t valSCR,
+				       uint8_t valDSS,
+				       bool enableRWOT)
+{
+  provides interface Init;
+  provides interface SpiByte;
+  provides interface SpiPacket[uint8_t instance];
+  provides interface HalPXA27xSSPCntl;
+
+  uses interface HplPXA27xSSP as SSP;
+}
+
+implementation {
+  components new HalPXA27xSpiPioM(0, valSCR, valDSS, enableRWOT);
+  components HalPXA27xSSPControlP;
+
+  Init = HalPXA27xSpiPioM;
+  SpiByte = HalPXA27xSpiPioM;
+  SpiPacket = HalPXA27xSpiPioM;
+  HalPXA27xSSPCntl = HalPXA27xSSPControlP;
+
+  SSP = HalPXA27xSpiPioM;
+  SSP = HalPXA27xSSPControlP;
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xSpiPioM.nc b/tos/chips/pxa27x/ssp/HalPXA27xSpiPioM.nc
new file mode 100644
index 00000000..1d174adf
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xSpiPioM.nc
@@ -0,0 +1,213 @@
+/* $Id: HalPXA27xSpiPioM.nc,v 1.6 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Implements the TOS 2.0 SpiByte and SpiPacket interfaces for the PXA27x.
+ * Provides master mode communication for a variety of frame formats, speeds
+ * and data sizes.
+ * 
+ * @param valFRF The frame format to use. 
+ * 
+ * @param valSCR The value for the SSP clock rate.
+ *
+ * @param valDSS The value for the DSS field in the SSCR0 register of the
+ * associated SSP peripheral.
+ * 
+ * @param enableRWOT Enables Receive without transmit mode. Used only for 
+ * the SpiPacket interface. If the txBuf parameter of SpiPacket.send is null
+ * the implementation will continuously clock in data without regard to the 
+ * contents of the TX FIFO.  This is different from the spec for the interface
+ * which requires that the transmitter send zeros (0) for this case.
+ * 
+ * @author Phil Buonadonna
+ * @author Miklos Maroti, Brano Kusy
+ */
+
+generic module HalPXA27xSpiPioM(uint8_t valFRF, uint8_t valSCR, uint8_t valDSS, bool enableRWOT) 
+{
+  provides {
+    interface Init;
+    interface SpiByte;
+    interface SpiPacket[uint8_t instance];
+  }
+  uses {
+    interface HplPXA27xSSP as SSP;
+  }
+}
+
+implementation
+{
+  enum{
+    FLAGS_SSCR0 = SSCR0_SCR(valSCR) | SSCR0_FRF(/*0*/valFRF) | SSCR0_DSS(valDSS),
+    FLAGS_SSCR1 = 0
+  };
+
+  // The BitBuckets need to be 8 bytes.
+  norace unsigned long long txBitBucket, rxBitBucket;
+  norace uint8_t *txCurrentBuf, *rxCurrentBuf, *txPtr, *rxPtr;
+  norace uint8_t txInc, rxInc;
+  norace uint8_t instanceCurrent;
+  uint32_t lenCurrent, lenRemain;
+
+  command error_t Init.init() {
+
+    txBitBucket = 0, rxBitBucket = 0;
+    txCurrentBuf = rxCurrentBuf = NULL;
+    lenCurrent = 0 ;
+    instanceCurrent = 0;
+    atomic lenRemain = 0;
+
+    call SSP.setSSCR1(FLAGS_SSCR1);
+    call SSP.setSSTO(3500 /*96*8*/);
+    call SSP.setSSCR0(FLAGS_SSCR0);
+    call SSP.setSSCR0(FLAGS_SSCR0 | SSCR0_SSE);
+
+    return SUCCESS;
+  }
+
+  async command uint8_t SpiByte.write(uint8_t tx) {
+    volatile uint8_t val;
+#if 1
+    while ((call SSP.getSSSR()) & SSSR_RNE) {
+      call SSP.getSSDR();
+    } 
+#endif
+    call SSP.setSSDR(tx); 
+
+    while ((call SSP.getSSSR()) & SSSR_BSY);
+
+    val = call SSP.getSSDR();
+    
+    return val;
+  }
+
+  async command error_t SpiPacket.send[uint8_t instance](uint8_t* txBuf, uint8_t* rxBuf, uint16_t len) {
+    uint32_t i;
+
+#if 1
+    while ((call SSP.getSSSR()) & SSSR_RNE) {
+      call SSP.getSSDR();
+    }
+#endif 
+
+    txCurrentBuf = txBuf;
+    rxCurrentBuf = rxBuf;
+    atomic lenCurrent = lenRemain = len;
+    instanceCurrent = instance;
+  
+    if (rxBuf == NULL) { 
+    	rxPtr = (uint8_t *)&rxBitBucket;
+    	rxInc = 0;
+    }
+    else {
+    	rxPtr = rxBuf;
+    	rxInc = 1;
+    }
+    
+    if (txBuf == NULL) {
+    	txPtr = (uint8_t *)&txBitBucket;
+    	txInc = 0;
+    }
+    else {
+    	txPtr = txBuf;
+    	txInc = 1;
+    }
+
+    if ((txBuf == NULL) && (enableRWOT == TRUE)) {
+    	call SSP.setSSCR0(FLAGS_SSCR0);
+    	call SSP.setSSCR1(FLAGS_SSCR1 | SSCR1_RWOT);
+    	call SSP.setSSCR0(FLAGS_SSCR0 | SSCR0_SSE);
+    	while (len > 0) {
+    	  while (!(call SSP.getSSSR() & SSSR_RNE));
+    	  *rxPtr = call SSP.getSSDR();
+    	  rxPtr += rxInc;
+    	  len--;
+    	}
+    	call SSP.setSSCR0(FLAGS_SSCR0);
+    	call SSP.setSSCR1(FLAGS_SSCR1);
+    	call SSP.setSSCR0(FLAGS_SSCR0 | SSCR0_SSE);
+    }
+    else {
+    	uint8_t burst = (len < 16) ? len : 16;
+    	for (i = 0;i < burst; i++) {
+    	  call SSP.setSSDR(*txPtr);
+    	  txPtr += txInc;
+    	}
+    	call SSP.setSSCR1(FLAGS_SSCR1 | SSCR1_TINTE | SSCR1_RIE);
+    }
+    
+    return SUCCESS;
+  }
+  
+  async event void SSP.interruptSSP() {
+    uint32_t i, uiStatus, uiFifoLevel;
+    uint32_t burst;
+
+    uiStatus = call SSP.getSSSR();
+    call SSP.setSSSR(SSSR_TINT);
+
+    uiFifoLevel = (((uiStatus & SSSR_RFL) >> 12) | 0xF) + 1;
+    uiFifoLevel = (uiFifoLevel > lenRemain) ? lenRemain : uiFifoLevel;
+
+    if( !(uiStatus & SSSR_RNE))
+      return;
+
+    for (i = 0; i < uiFifoLevel; i++) {
+      *rxPtr = call SSP.getSSDR();
+      rxPtr += rxInc;
+    }
+
+    atomic {
+      lenRemain -= uiFifoLevel;
+      burst = (lenRemain < 16) ? lenRemain : 16;
+    }
+
+    if (burst > 0) {
+      for (i = 0;i < burst;i++) {
+        call SSP.setSSDR(*txPtr);
+        txPtr += txInc;
+      }
+    }
+    else {
+      uint32_t len = lenCurrent;
+      call SSP.setSSCR1(FLAGS_SSCR1);
+      lenCurrent = 0;
+      signal SpiPacket.sendDone[instanceCurrent](txCurrentBuf, rxCurrentBuf,len,SUCCESS);
+    }
+
+    return;
+  }
+
+  default async event void SpiPacket.sendDone[uint8_t instance](uint8_t* txBuf, uint8_t* rxBuf, 
+					      uint16_t len, error_t error) {
+    return;
+  }
+  
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xuWireDMAC.nc b/tos/chips/pxa27x/ssp/HalPXA27xuWireDMAC.nc
new file mode 100644
index 00000000..7789744b
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xuWireDMAC.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+generic configuration HalPXA27xSpiDMAC(uint8_t valSCR,
+				       uint8_t valDSS,
+				       bool enableRWOT)
+{
+  provides interface Init;
+  provides interface SpiByte;
+  provides interface SpiPacket[uint8_t instance];
+  provides interface HalPXA27xSSPCntl;
+
+  uses {
+    interface HplPXA27xSSP as SSP;
+    interface HplPXA27xDMAChnl as RxDMA;
+    interface HplPXA27xDMAChnl as TxDMA;
+    interface HplPXA27xDMAInfo as SSPRxDMAInfo;
+    interface HplPXA27xDMAInfo as SSPTxDMAInfo;
+  }
+}
+
+implementation {
+  components new HalPXA27xSpiDMAM(2, valSCR, valDSS, enableRWOT);
+  components HalPXA27xSSPControlP;
+
+  Init = HalPXA27xSpiDMAM;
+  SpiByte = HalPXA27xSpiDMAM;
+  SpiPacket = HalPXA27xSpiDMAM;
+  HalPXA27xSSPCntl = HalPXA27xSSPControlP;
+
+  SSP = HalPXA27xSpiDMAM;
+  SSP = HalPXA27xSSPControlP;
+  RxDMA = HalPXA27xSpiDMAM;
+  TxDMA = HalPXA27xSpiDMAM;
+  SSPRxDMAInfo = HalPXA27xSpiDMAM;
+  SSPTxDMAInfo = HalPXA27xSpiDMAM;
+
+}
diff --git a/tos/chips/pxa27x/ssp/HalPXA27xuWirePioC.nc b/tos/chips/pxa27x/ssp/HalPXA27xuWirePioC.nc
new file mode 100644
index 00000000..ba4947e9
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HalPXA27xuWirePioC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+generic configuration HalPXA27xSpiPioC(uint8_t valSCR,
+				       uint8_t valDSS,
+				       bool enableRWOT)
+{
+  provides interface Init;
+  provides interface SpiByte;
+  provides interface SpiPacket[uint8_t instance];
+  provides interface HalPXA27xSSPCntl;
+
+  uses interface HplPXA27xSSP as SSP;
+}
+
+implementation {
+  components new HalPXA27xSpiPioM(2, valSCR, valDSS, enableRWOT);
+  components HalPXA27xSSPControlP;
+
+  Init = HalPXA27xSpiPioM;
+  SpiByte = HalPXA27xSpiPioM;
+  SpiPacket = HalPXA27xSpiPioM;
+  HalPXA27xSSPCntl = HalPXA27xSSPControlP;
+
+  SSP = HalPXA27xSpiPioM;
+  SSP = HalPXA27xSSPControlP;
+}
diff --git a/tos/chips/pxa27x/ssp/HplPXA27xSSP.nc b/tos/chips/pxa27x/ssp/HplPXA27xSSP.nc
new file mode 100644
index 00000000..80007e0d
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HplPXA27xSSP.nc
@@ -0,0 +1,72 @@
+/* $Id: HplPXA27xSSP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+interface HplPXA27xSSP 
+{
+  async command void setSSCR0(uint32_t val);
+  async command uint32_t getSSCR0();
+
+  async command void setSSCR1(uint32_t val);
+  async command uint32_t getSSCR1();
+
+  async command void setSSSR(uint32_t val);
+  async command uint32_t getSSSR();
+
+  async command void setSSITR(uint32_t val);
+  async command uint32_t getSSITR();
+
+  async command void setSSDR(uint32_t val);
+  async command uint32_t getSSDR();
+
+  async command void setSSTO(uint32_t val);
+  async command uint32_t getSSTO();
+
+  async command void setSSPSP(uint32_t val);
+  async command uint32_t getSSPSP();
+
+  async command void setSSTSA(uint32_t val);
+  async command uint32_t getSSTSA();
+
+  async command void setSSRSA(uint32_t val);
+  async command uint32_t getSSRSA();
+
+  async command void setSSTSS(uint32_t val);
+  async command uint32_t getSSTSS();
+
+  async command void setSSACD(uint32_t val);
+  async command uint32_t getSSACD();
+
+  async event void interruptSSP();
+
+}
diff --git a/tos/chips/pxa27x/ssp/HplPXA27xSSP1C.nc b/tos/chips/pxa27x/ssp/HplPXA27xSSP1C.nc
new file mode 100644
index 00000000..f9d3327a
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HplPXA27xSSP1C.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+
+configuration HplPXA27xSSP1C 
+{
+  provides {
+    interface HplPXA27xSSP;
+    interface HplPXA27xDMAInfo as SSPRxDMAReg;
+    interface HplPXA27xDMAInfo as SSPTxDMAReg;
+  }
+}
+
+implementation
+{
+  components HplPXA27xSSPP;
+  components HplPXA27xInterruptM;
+  components PlatformP;
+
+  HplPXA27xSSP = HplPXA27xSSPP.HplPXA27xSSP[1];
+  components new HplPXA27xDMAInfoC(13, (uint32_t)&SSDR_1) as SSPRxDMA;
+  components new HplPXA27xDMAInfoC(14, (uint32_t)&SSDR_1) as SSPTxDMA;
+  SSPRxDMAReg = SSPRxDMA;
+  SSPTxDMAReg = SSPTxDMA;
+
+  HplPXA27xSSPP.Init[1] <- PlatformP.InitL1;
+
+  HplPXA27xSSPP.SSP1Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_SSP1];
+}
diff --git a/tos/chips/pxa27x/ssp/HplPXA27xSSP2C.nc b/tos/chips/pxa27x/ssp/HplPXA27xSSP2C.nc
new file mode 100644
index 00000000..8eead3b6
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HplPXA27xSSP2C.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+
+configuration HplPXA27xSSP2C 
+{
+  provides {
+    interface HplPXA27xSSP;
+    interface HplPXA27xDMAInfo as SSPRxDMAReg;
+    interface HplPXA27xDMAInfo as SSPTxDMAReg;
+  }
+}
+
+implementation
+{
+  components HplPXA27xSSPP;
+  components HplPXA27xInterruptM;
+  components PlatformP;
+
+  HplPXA27xSSP = HplPXA27xSSPP.HplPXA27xSSP[2];
+  components new HplPXA27xDMAInfoC(15, (uint32_t)&SSDR_2) as SSPRxDMA;
+  components new HplPXA27xDMAInfoC(16, (uint32_t)&SSDR_2) as SSPTxDMA;
+  SSPRxDMAReg = SSPRxDMA;
+  SSPTxDMAReg = SSPTxDMA;
+
+  HplPXA27xSSPP.Init[2] <- PlatformP.InitL1;
+
+  HplPXA27xSSPP.SSP2Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_SSP2];
+}
diff --git a/tos/chips/pxa27x/ssp/HplPXA27xSSP3C.nc b/tos/chips/pxa27x/ssp/HplPXA27xSSP3C.nc
new file mode 100644
index 00000000..c846713f
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HplPXA27xSSP3C.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+
+configuration HplPXA27xSSP3C 
+{
+  provides {
+    interface HplPXA27xSSP;
+    interface HplPXA27xDMAInfo as SSPRxDMAInfo;
+    interface HplPXA27xDMAInfo as SSPTxDMAInfo;
+  }
+}
+
+implementation
+{
+  components HplPXA27xSSPP;
+  components HplPXA27xInterruptM;
+  components PlatformP;
+  
+  HplPXA27xSSP = HplPXA27xSSPP.HplPXA27xSSP[3];
+  components new HplPXA27xDMAInfoC(66, (uint32_t)&SSDR_3) as SSPRxDMA;
+  components new HplPXA27xDMAInfoC(67, (uint32_t)&SSDR_3) as SSPTxDMA;
+  SSPRxDMAInfo = SSPRxDMA;
+  SSPTxDMAInfo = SSPTxDMA;
+
+  HplPXA27xSSPP.Init[3] <- PlatformP.InitL1;
+
+  HplPXA27xSSPP.SSP3Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_SSP3];
+}
diff --git a/tos/chips/pxa27x/ssp/HplPXA27xSSPP.nc b/tos/chips/pxa27x/ssp/HplPXA27xSSPP.nc
new file mode 100644
index 00000000..33ca2de0
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/HplPXA27xSSPP.nc
@@ -0,0 +1,297 @@
+/* $Id: HplPXA27xSSPP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadonna
+ */
+
+module HplPXA27xSSPP 
+{
+  provides {
+    interface Init[uint8_t chnl];
+    interface HplPXA27xSSP[uint8_t chnl];
+  }
+  uses {
+    interface HplPXA27xInterrupt as SSP1Irq;
+    interface HplPXA27xInterrupt as SSP2Irq;
+    interface HplPXA27xInterrupt as SSP3Irq;
+  }
+}
+
+implementation 
+{
+
+  command error_t Init.init[uint8_t chnl]() {
+    error_t error = SUCCESS;
+    
+    switch (chnl) {
+    case 1:
+      CKEN |= CKEN23_SSP1;
+      call SSP1Irq.enable(); 
+      break;
+    case 2: 
+      CKEN |= CKEN3_SSP2;
+      call SSP2Irq.enable(); 
+      break;
+    case 3: 
+      CKEN |= CKEN4_SSP3;
+      //call SSP3Irq.allocate();
+      call SSP3Irq.enable(); 
+      break;
+    default: 
+      error = FAIL;
+      break;
+    }
+
+    return error;
+  }
+
+  async command void HplPXA27xSSP.setSSCR0[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSCR0_1 = val; break;
+    case 2: SSCR0_2 = val; break;
+    case 3: SSCR0_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+
+  async command uint32_t HplPXA27xSSP.getSSCR0[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSCR0_1; break;
+    case 2: return SSCR0_2; break;
+    case 3: return SSCR0_3; break;
+    default: return 0;
+    }
+   }
+
+  async command void HplPXA27xSSP.setSSCR1[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSCR1_1 = val; break;
+    case 2: SSCR1_2 = val; break;
+    case 3: SSCR1_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSCR1[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSCR1_1; break;
+    case 2: return SSCR1_2; break;
+    case 3: return SSCR1_3; break;
+    default: return 0;
+    }
+  }
+  
+  async command void HplPXA27xSSP.setSSSR[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSSR_1 = val; break;
+    case 2: SSSR_2 = val; break;
+    case 3: SSSR_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSSR[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSSR_1; break;
+    case 2: return SSSR_2; break;
+    case 3: return SSSR_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSITR[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSITR_1 = val; break;
+    case 2: SSITR_2 = val; break;
+    case 3: SSITR_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSITR[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSITR_1; break;
+    case 2: return SSITR_2; break;
+    case 3: return SSITR_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSDR[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSDR_1 = val; break;
+    case 2: SSDR_2 = val; break;
+    case 3: SSDR_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSDR[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSDR_1; break;
+    case 2: return SSDR_2; break;
+    case 3: return SSDR_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSTO[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSTO_1 = val; break;
+    case 2: SSTO_2 = val; break;
+    case 3: SSTO_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSTO[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSTO_1; break;
+    case 2: return SSTO_2; break;
+    case 3: return SSTO_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSPSP[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSPSP_1 = val; break;
+    case 2: SSPSP_2 = val; break;
+    case 3: SSPSP_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSPSP[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSPSP_1; break;
+    case 2: return SSPSP_2; break;
+    case 3: return SSPSP_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSTSA[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSTSA_1 = val; break;
+    case 2: SSTSA_2 = val; break;
+    case 3: SSTSA_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSTSA[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSTSA_1; break;
+    case 2: return SSTSA_2; break;
+    case 3: return SSTSA_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSRSA[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSRSA_1 = val; break;
+    case 2: SSRSA_2 = val; break;
+    case 3: SSRSA_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSRSA[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSRSA_1; break;
+    case 2: return SSRSA_2; break;
+    case 3: return SSRSA_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSTSS[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSTSS_1 = val; break;
+    case 2: SSTSS_2 = val; break;
+    case 3: SSTSS_3 = val; break;
+    default: break;
+    }
+    return;
+  }
+  async command uint32_t HplPXA27xSSP.getSSTSS[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSTSS_1; break;
+    case 2: return SSTSS_2; break;
+    case 3: return SSTSS_3; break;
+    default: return 0;
+    }
+  }
+
+  async command void HplPXA27xSSP.setSSACD[uint8_t chnl](uint32_t val) {
+    switch (chnl) {
+    case 1: SSACD_1 = val; break;
+    case 2: SSACD_2 = val; break;
+    case 3: SSACD_3 = val; break;
+    default: break;
+    }
+    return;  
+  }
+  async command uint32_t HplPXA27xSSP.getSSACD[uint8_t chnl]() {
+    switch (chnl) {
+    case 1: return SSACD_1; break;
+    case 2: return SSACD_2; break;
+    case 3: return SSACD_3; break;
+    default: return 0;
+    }
+  }
+
+  default async event void HplPXA27xSSP.interruptSSP[uint8_t chnl]() {
+    call HplPXA27xSSP.setSSSR[chnl](SSSR_BCE | SSSR_TUR | SSSR_EOC | SSSR_TINT | 
+		     SSSR_PINT | SSSR_ROR );
+    return;
+  }
+
+  async event void SSP1Irq.fired() {
+    signal HplPXA27xSSP.interruptSSP[1]();
+  }
+  async event void SSP2Irq.fired() {
+    signal HplPXA27xSSP.interruptSSP[2]();
+  }
+  async event void SSP3Irq.fired() {
+    signal HplPXA27xSSP.interruptSSP[3]();
+  }
+
+  default async command void SSP1Irq.enable() {return;}
+  default async command void SSP2Irq.enable() {return;}
+  default async command void SSP3Irq.enable() {return;}
+
+}
+
diff --git a/tos/chips/pxa27x/ssp/SSP.h b/tos/chips/pxa27x/ssp/SSP.h
new file mode 100644
index 00000000..0874a290
--- /dev/null
+++ b/tos/chips/pxa27x/ssp/SSP.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#ifndef _SSP_H
+#define _SSP_H
+
+typedef enum {
+  SSP_FORMAT_SPI = 0,
+  SSP_FORMAT_TISSP,
+  SSP_FORMAT_UWIRE,
+  SSP_FORMAT_PSP,
+} SSPFrameFormat_t;
+
+typedef uint8_t SSPDataWidth_t;
+typedef uint8_t SSPFifoLevel_t;
+
+typedef enum {
+  UWIRE_8BIT,
+  UWIRE_16BIT,
+} SSPMicrowireTxSize_t;
+
+typedef enum {
+  SSP_NORMALMODE,
+  SSP_NETWORKMODE,
+} SSPClkMode_t;
+
+#endif /* _SSP_H */
diff --git a/tos/chips/pxa27x/timer/Alarm32khzC.nc b/tos/chips/pxa27x/timer/Alarm32khzC.nc
new file mode 100644
index 00000000..d9ec6d0f
--- /dev/null
+++ b/tos/chips/pxa27x/timer/Alarm32khzC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+generic configuration Alarm32khzC()
+{
+  provides interface Init;
+  provides interface Alarm<T32khz,uint32_t> as Alarm32khz32;
+}
+
+implementation
+{
+  components new HalPXA27xAlarmM(T32khz,1) as PhysAlarm32khz;
+  components HalPXA27xOSTimerMapC;
+
+  enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")};
+
+  Init = PhysAlarm32khz;
+  Alarm32khz32 = PhysAlarm32khz;
+
+  PhysAlarm32khz.OSTInit -> HalPXA27xOSTimerMapC.Init;
+  PhysAlarm32khz.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID];
+
+}
diff --git a/tos/chips/pxa27x/timer/AlarmMilliC.nc b/tos/chips/pxa27x/timer/AlarmMilliC.nc
new file mode 100644
index 00000000..2d760d7c
--- /dev/null
+++ b/tos/chips/pxa27x/timer/AlarmMilliC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+generic configuration AlarmMilliC()
+{
+  provides interface Init;
+  provides interface Alarm<TMilli,uint32_t> as AlarmMilli32;
+}
+
+implementation
+{
+  components new HalPXA27xAlarmM(TMilli,2) as PhysAlarmMilli;
+  components HalPXA27xOSTimerMapC;
+  
+  enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")};
+
+  Init = PhysAlarmMilli;
+  AlarmMilli32 = PhysAlarmMilli;
+
+  PhysAlarmMilli.OSTInit -> HalPXA27xOSTimerMapC.Init;
+  PhysAlarmMilli.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID];
+
+}
diff --git a/tos/chips/pxa27x/timer/BusyWait32khzC.nc b/tos/chips/pxa27x/timer/BusyWait32khzC.nc
new file mode 100644
index 00000000..f9ecea84
--- /dev/null
+++ b/tos/chips/pxa27x/timer/BusyWait32khzC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This configuration piggybacks off of the TOS 2.0 Counter32khzC component.
+ * This component manages initialization of the underlying Timer components.
+ *
+ * @author Phil Buonadonna
+ */
+configuration BusyWait32khzC
+{
+  provides interface BusyWait<T32khz,uint16_t> as BusyWait32khz16;
+}
+
+implementation 
+{
+  components new HalPXA27xBusyWaitPM(T32khz,397) as PXA27xBusyWait32khz;
+  components HplPXA27xOSTimerC;
+
+  BusyWait32khz16 = PXA27xBusyWait32khz.BusyWait;
+  
+  PXA27xBusyWait32khz.OST -> HplPXA27xOSTimerC.OST0;
+}
diff --git a/tos/chips/pxa27x/timer/BusyWaitMicroC.nc b/tos/chips/pxa27x/timer/BusyWaitMicroC.nc
new file mode 100644
index 00000000..fdf14a0d
--- /dev/null
+++ b/tos/chips/pxa27x/timer/BusyWaitMicroC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Implements the BusyWaitMicroC timer component. This component
+ * instantiates a new Counter with Microsecond precision and 
+ * binds it to the BusyWait interface via PXA27xBusyWaitP
+ * 
+ * @author Phil Buonadonna
+ */
+configuration BusyWaitMicroC
+{
+  provides interface BusyWait<TMicro,uint16_t> as BusyWaitMicro16;
+}
+
+implementation
+{
+  components new HalPXA27xBusyWaitM(TMicro,13) as PXA27xBusyWaitMicro;
+  components HplPXA27xOSTimerC;
+
+  BusyWaitMicro16 = PXA27xBusyWaitMicro.BusyWait;
+
+  PXA27xBusyWaitMicro.OST -> HplPXA27xOSTimerC.OST0;
+}
+
diff --git a/tos/chips/pxa27x/timer/Counter32khz32C.nc b/tos/chips/pxa27x/timer/Counter32khz32C.nc
new file mode 100644
index 00000000..8a266f76
--- /dev/null
+++ b/tos/chips/pxa27x/timer/Counter32khz32C.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+configuration Counter32khz32C
+{
+  provides interface Counter<T32khz,uint32_t> as Counter32khz32;
+  provides interface LocalTime<T32khz> as LocalTime32khz;
+}
+
+implementation
+{
+  components new HalPXA27xCounterM(T32khz,1) as PhysCounter32khz32;
+  components HalPXA27xOSTimerMapC;
+  components PlatformP;
+
+  enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")};
+
+  Counter32khz32 = PhysCounter32khz32.Counter;
+  LocalTime32khz = PhysCounter32khz32.LocalTime;
+
+  // Wire the initialization to the platform init routine
+  PlatformP.InitL0 -> PhysCounter32khz32.Init;
+
+  PhysCounter32khz32.OSTInit -> HalPXA27xOSTimerMapC.Init;
+  PhysCounter32khz32.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID];
+}
diff --git a/tos/chips/pxa27x/timer/Counter32khzC.nc b/tos/chips/pxa27x/timer/Counter32khzC.nc
new file mode 100644
index 00000000..8925c520
--- /dev/null
+++ b/tos/chips/pxa27x/timer/Counter32khzC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+configuration Counter32khzC
+{
+  provides interface Counter<T32khz,uint32_t> as Counter32khz32;
+  provides interface LocalTime<T32khz> as LocalTime32khz;
+}
+
+implementation
+{
+  components new HalPXA27xCounterM(T32khz,1) as PhysCounter32khz32;
+  components HalPXA27xOSTimerMapC;
+  components PlatformP;
+
+  enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")};
+
+  Counter32khz32 = PhysCounter32khz32.Counter;
+  LocalTime32khz = PhysCounter32khz32.LocalTime;
+
+  // Wire the initialization to the platform init routine
+  PlatformP.InitL0 -> PhysCounter32khz32.Init;
+
+  PhysCounter32khz32.OSTInit -> HalPXA27xOSTimerMapC.Init;
+  PhysCounter32khz32.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID];
+}
diff --git a/tos/chips/pxa27x/timer/CounterMilliC.nc b/tos/chips/pxa27x/timer/CounterMilliC.nc
new file mode 100644
index 00000000..c28708b5
--- /dev/null
+++ b/tos/chips/pxa27x/timer/CounterMilliC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+configuration CounterMilliC
+{
+  provides interface Counter<TMilli,uint32_t> as CounterMilli32;
+  provides interface LocalTime<TMilli> as LocalTimeMilli;
+}
+
+implementation
+{
+  components new HalPXA27xCounterM(TMilli,2) as PhysCounterMilli32;
+  components HalPXA27xOSTimerMapC;
+  components PlatformP;
+
+  enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")};
+
+  CounterMilli32 = PhysCounterMilli32.Counter;
+  LocalTimeMilli = PhysCounterMilli32.LocalTime;
+
+  // Wire the initialization to the plaform init routine
+  PlatformP.InitL0 -> PhysCounterMilli32.Init;
+
+  PhysCounterMilli32.OSTInit -> HalPXA27xOSTimerMapC.Init;
+  PhysCounterMilli32.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID];
+}
+
diff --git a/tos/chips/pxa27x/timer/HalPXA27xAlarmM.nc b/tos/chips/pxa27x/timer/HalPXA27xAlarmM.nc
new file mode 100644
index 00000000..afd44aaa
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xAlarmM.nc
@@ -0,0 +1,174 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+// @author Phil Buonadonna
+
+#include "Timer.h"
+
+generic module HalPXA27xAlarmM(typedef frequency_tag, uint8_t resolution) 
+{
+  provides {
+    interface Init;
+    interface Alarm<frequency_tag,uint32_t> as Alarm;
+  }
+  uses {
+    interface Init as OSTInit;
+    interface HplPXA27xOSTimer as OSTChnl;
+  }
+}
+
+implementation
+{
+  bool mfRunning;
+  uint32_t mMinDeltaT;
+
+  task void lateAlarm() {
+    atomic {
+      mfRunning = FALSE;
+      signal Alarm.fired();
+    }
+  }
+  
+  command error_t Init.init() {
+
+    call OSTInit.init(); 
+    // Continue on match, Non-periodic, w/ given resolution
+    atomic {
+      mfRunning = FALSE;
+      switch (resolution) {
+      case 1: // 1/32768 second
+	mMinDeltaT = 10;
+	break;
+      case 2: // 1 ms
+	mMinDeltaT = 1;
+	break;
+      case 3: // 1 s
+	mMinDeltaT = 1;
+	break;
+      case 4: // 1 us
+	mMinDeltaT = 300;
+	break;
+      default:  // External
+	mMinDeltaT = 0;
+	break;
+      }
+      call OSTChnl.setOMCR(OMCR_C | OMCR_P | OMCR_CRES(resolution));
+      call OSTChnl.setOSCR(0);
+    }
+    return SUCCESS;
+
+  }
+
+  async command void Alarm.start( uint32_t dt ) {
+    uint32_t t0,t1,tf;
+    //uint32_t cycles;
+    bool bPending;
+    if (dt < mMinDeltaT) dt = mMinDeltaT;
+
+    atomic {
+      //_pxa27x_perf_clear();
+      t0 = call OSTChnl.getOSCR();
+      tf = t0 + dt;
+      call OSTChnl.setOIERbit(TRUE);
+      call OSTChnl.setOSMR(tf);
+      //_pxa27x_perf_get(cycles);
+      mfRunning = TRUE;
+      t1 = call OSTChnl.getOSCR();
+      bPending = call OSTChnl.getOSSRbit();
+      if ((dt <= (t1 - t0)) && !(bPending)) {
+	call OSTChnl.setOIERbit(FALSE);
+	post lateAlarm();
+      }
+    }
+    return;
+  }
+
+  async command void Alarm.stop() {
+    atomic {
+      call OSTChnl.setOIERbit(FALSE);
+      mfRunning = FALSE;
+    }
+    return;
+  }
+
+  async command bool Alarm.isRunning() {
+    bool flag;
+
+    atomic flag = mfRunning;
+    return flag;
+  }
+
+  async command void Alarm.startAt( uint32_t t0, uint32_t dt ) {
+    uint32_t tf,t1;
+    bool bPending;
+    tf = t0 + dt;
+
+    atomic {
+      call OSTChnl.setOIERbit(TRUE);
+      call OSTChnl.setOSMR(tf);
+      mfRunning = TRUE;
+      t1 = call OSTChnl.getOSCR();
+      bPending = call OSTChnl.getOSSRbit();
+      if ((dt <= (t1 - t0)) && !(bPending)) {
+	call OSTChnl.setOIERbit(FALSE);
+	post lateAlarm();
+      }
+    }
+
+    return;
+  } 
+
+  async command uint32_t Alarm.getNow() {
+    return call OSTChnl.getOSCR();
+  }
+
+  async command uint32_t Alarm.getAlarm() {
+    return call OSTChnl.getOSMR();
+  }
+
+  async event void OSTChnl.fired() {
+    call OSTChnl.clearOSSRbit();
+    call OSTChnl.setOIERbit(FALSE);
+    mfRunning = FALSE;
+    signal Alarm.fired();
+    return;
+  }
+
+  default async event void Alarm.fired() {
+    return;
+  }
+
+
+}
+
diff --git a/tos/chips/pxa27x/timer/HalPXA27xBusyWaitM.nc b/tos/chips/pxa27x/timer/HalPXA27xBusyWaitM.nc
new file mode 100644
index 00000000..e867896c
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xBusyWaitM.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * This private component provides a 16-bit BusyWait interface
+ * of a given precision over OS Timer channel 0
+ *
+ * @param precision_tag A type tag mapped to the set precision
+ *
+ * @param val4xScale A value to scale the underlying counter by. 
+ *   The passed in parameter is given by the equation
+ *   val4xScale = (3.25 MHz/<desired_precision_in_Hz>) * 4
+ *   and rounded to the nearest integer.
+ *   Example: Counter precision of 32.768 kHz would have 
+ *   a val4xScale of 397
+ * 
+ * @author Phil Buonadonna
+ *
+ */
+
+generic module HalPXA27xBusyWaitM(typedef precision_tag, uint16_t val4xScale)
+{
+  provides interface BusyWait<precision_tag,uint16_t>;
+  uses interface HplPXA27xOSTimer as OST;
+}
+
+implementation
+{
+
+  async command void BusyWait.wait(uint16_t dt) {
+    uint32_t dCounts;
+    atomic {
+      uint32_t t0 = call OST.getOSCR();
+      dCounts = (dt * 4) * val4xScale;
+      dCounts >>= 2;
+      while (((call OST.getOSCR()) - t0) < dCounts);
+    }
+  }
+
+  async event void OST.fired() {
+    return;
+  }
+
+}
diff --git a/tos/chips/pxa27x/timer/HalPXA27xCounterM.nc b/tos/chips/pxa27x/timer/HalPXA27xCounterM.nc
new file mode 100644
index 00000000..0f92e20c
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xCounterM.nc
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/** 
+ * Implements a TOS 2.0 Counter on the PXA27x HPL. The PXA27x does not 
+ * have an explicit overflow notification. We emulate one by using 
+ * the associated match register set to 0. This requires we initialize
+ * the counter to 1 to avoid a false notification at startup.
+ * 
+ *  @author Phil Buonadonna
+ */
+#include "Timer.h"
+
+generic module HalPXA27xCounterM(typedef frequency_tag, uint8_t resolution) 
+{
+  provides {
+    interface Init;
+    interface Counter<frequency_tag,uint32_t> as Counter;
+    interface LocalTime<frequency_tag> as LocalTime;
+  }
+  uses {
+    interface Init as OSTInit;
+    interface HplPXA27xOSTimer as OSTChnl;
+  }
+}
+
+implementation
+{
+  command error_t Init.init() {
+
+    call OSTInit.init(); 
+
+    // Continue on match, Non-periodic, w/ given resolution
+    atomic {
+      call OSTChnl.setOMCR(OMCR_C | OMCR_P | OMCR_CRES(resolution));
+      call OSTChnl.setOSMR(0);
+      call OSTChnl.setOSCR(1);
+      call OSTChnl.clearOSSRbit();
+      call OSTChnl.setOIERbit(TRUE);
+    }
+    return SUCCESS;
+
+  }
+  
+  async command uint32_t Counter.get() {
+    uint32_t cntr;
+
+    cntr = call OSTChnl.getOSCR();
+    return cntr;
+  }
+
+  async command bool Counter.isOverflowPending() {
+    bool flag;
+
+    atomic flag = call OSTChnl.getOSSRbit();
+    return flag;
+  }
+
+  async command void Counter.clearOverflow() {
+
+    atomic call OSTChnl.clearOSSRbit();
+  }
+
+  async event void OSTChnl.fired() {
+    call OSTChnl.clearOSSRbit();
+    signal Counter.overflow();
+    return;
+  }
+
+  async command uint32_t LocalTime.get() {
+    uint32_t cntr;
+
+    cntr = call OSTChnl.getOSCR();
+    return cntr;
+  }
+
+  default async event void Counter.overflow() {
+    return;
+  }
+
+}
+
diff --git a/tos/chips/pxa27x/timer/HalPXA27xOSTimerMapC.nc b/tos/chips/pxa27x/timer/HalPXA27xOSTimerMapC.nc
new file mode 100644
index 00000000..0558a83e
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xOSTimerMapC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * This components maps requested timer resources connected using the
+ * 'PXA27xOSTimer.Resource' flag to physical timer resource of the PXA27x.
+ * 
+ * @author Phil Buonadonna
+ *
+ */
+
+configuration HalPXA27xOSTimerMapC {
+
+  provides {
+    interface Init;
+    interface HplPXA27xOSTimer as OSTChnl[uint8_t id];
+  }
+}
+
+implementation {
+  components HplPXA27xOSTimerC;
+
+  Init = HplPXA27xOSTimerC;
+
+  OSTChnl[0] = HplPXA27xOSTimerC.OST4;
+  OSTChnl[1] = HplPXA27xOSTimerC.OST5;
+  OSTChnl[2] = HplPXA27xOSTimerC.OST6;
+  OSTChnl[3] = HplPXA27xOSTimerC.OST7;
+  OSTChnl[4] = HplPXA27xOSTimerC.OST8;
+  OSTChnl[5] = HplPXA27xOSTimerC.OST9;
+  OSTChnl[6] = HplPXA27xOSTimerC.OST10;
+  OSTChnl[7] = HplPXA27xOSTimerC.OST11;
+
+}
diff --git a/tos/chips/pxa27x/timer/HalPXA27xSleep.nc b/tos/chips/pxa27x/timer/HalPXA27xSleep.nc
new file mode 100644
index 00000000..1681e81d
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xSleep.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * This interfaces provides HAL level sleep functionality for the PXA27x. 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+
+interface HalPXA27xSleep {
+  /**
+   * Sleep for a given number of milliseconds. Only standard 
+   * sleep mode is used. This function supports
+   * sleep times up to 65534ms. Larger sleep durations must
+   * use one of the other methods. 
+   *
+   * @param time Sleep duration in milliseconds up to 65534.
+   * 
+   */
+  async command void sleepMillis(uint16_t time);
+
+  /**
+   * Sleep for a given number of seconds up to 62859 sec.
+   * If the function is passed a value greater than 62859, it
+   * will default to the maximum. For sleep durations greater
+   * than 30 secs, the processor will be placed into deep sleep
+   * mode. Otherwise standard sleep mode is used.
+   *
+   * @param time Sleep duration in seconds.
+   *
+   */
+  async command void sleepSeconds(uint32_t time);
+
+  /**
+   * Sleep for a given number of minutes up to 1439 min. Deep
+   * sleep mode is used. If the function is passed a value 
+   * greater than 1439, it will default to the maximum. 
+   *
+   * @param time Sleep duration in minutes.
+   */
+  async command void sleepMinutes(uint32_t time);
+
+  /**
+   * Sleep for a given number of hours up to 23 hours. Deep
+   * sleep mode is used. If the function is passed a value 
+   * greater than 23, it will default to the maximum. 
+   *
+   * @param time Sleep duration in hours
+   */
+  async command void sleepHours(uint16_t time);
+}
diff --git a/tos/chips/pxa27x/timer/HalPXA27xSleepC.nc b/tos/chips/pxa27x/timer/HalPXA27xSleepC.nc
new file mode 100644
index 00000000..a2206566
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xSleepC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+
+configuration HalPXA27xSleepC {
+  provides interface HalPXA27xSleep;
+}
+
+implementation {
+  components HalPXA27xSleepM;
+
+  HalPXA27xSleep = HalPXA27xSleepM;
+
+  components HplPXA27xRTCM, HplPXA27xPowerM;
+  HalPXA27xSleepM.HplPXA27xRTC -> HplPXA27xRTCM;
+  HalPXA27xSleepM.HplPXA27xPower -> HplPXA27xPowerM;
+
+  components LedsC;
+  HalPXA27xSleepM.Leds -> LedsC;
+}
diff --git a/tos/chips/pxa27x/timer/HalPXA27xSleepM.nc b/tos/chips/pxa27x/timer/HalPXA27xSleepM.nc
new file mode 100644
index 00000000..fa07c0ea
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xSleepM.nc
@@ -0,0 +1,125 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+
+module HalPXA27xSleepM {
+  provides interface HalPXA27xSleep;
+  uses interface HplPXA27xRTC;
+  uses interface HplPXA27xPower;
+
+  uses interface Leds;
+}
+
+implementation {
+
+  void doSleep(uint32_t swRegVal, bool useDeepSleep) {
+    int i;
+    call HplPXA27xPower.setPWER(PWER_WERTC);
+    // let it wrap around itself if necessary
+    call HplPXA27xRTC.setSWCR(0);
+    call HplPXA27xRTC.setSWAR1(swRegVal); // minutes
+    call HplPXA27xRTC.setSWAR2(0x00FFFFFF);
+    for(i = 0; i < 10; i++); // spin for a bit
+    call HplPXA27xRTC.setRTSR(RTSR_SWCE);
+    for(i = 0; i < 5000; i++); // spin for a bit
+
+    if (useDeepSleep) {
+      call HplPXA27xPower.setPWRMode(PWRMODE_M_DEEPSLEEP);
+      // this call never returns
+    }
+    else {
+      call HplPXA27xPower.setPWRMode(PWRMODE_M_SLEEP);
+    // this call never returns
+    }
+  }
+
+   
+  async command void HalPXA27xSleep.sleepMillis(uint16_t time) {
+    int i;
+    call HplPXA27xPower.setPWER(PWER_WERTC);
+    // let it wrap around itself if necessary
+    call HplPXA27xRTC.setPIAR(time); // implicitly resets RTCPICR
+    for(i = 0; i < 10; i++); // spin for a bit
+    call HplPXA27xRTC.setRTSR(RTSR_PICE);
+    for(i = 0; i < 5000; i++); // spin for a bit
+
+    call HplPXA27xPower.setPWRMode(PWRMODE_M_SLEEP);
+    // this call never returns
+  }
+
+  async command void HalPXA27xSleep.sleepSeconds(uint32_t time) {
+    uint32_t hrs = time / 3600;
+    uint32_t mins = (time / 60) % 60;
+    uint32_t secs = time % 60;
+    uint32_t swReg;
+
+      if (hrs > 23) {
+	hrs = 23;
+	mins = 59;
+	secs = 59;
+      }
+
+    swReg = ((hrs << 19) | (mins << 13) | (secs << 7));
+    doSleep(swReg);
+    return;
+  }
+
+  async command void HalPXA27xSleep.sleepMinutes(uint32_t time) {
+    uint32_t hrs = time / 60;
+    uint32_t mins = time % 60;
+    uint32_t swReg;
+
+    if (hrs > 23) {
+      hrs = 23;
+      mins = 59;
+    }
+    swReg = ((hrs << 19) | (mins << 13));
+
+    doSleep(swReg);
+    return;
+  }
+
+  async command void HalPXA27xSleep.sleepHours(uint16_t time) {
+    uint32_t hrs = time;
+    uint32_t swReg;
+
+    if (hrs > 23) {
+      hrs = 23;
+    }
+    swReg = (hrs << 19);
+
+    doSleep(swReg);
+    return;
+  }
+}
diff --git a/tos/chips/pxa27x/timer/HalPXA27xWatchdog.nc b/tos/chips/pxa27x/timer/HalPXA27xWatchdog.nc
new file mode 100644
index 00000000..c642bff6
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xWatchdog.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+interface HalPXA27xWatchdog {
+
+  /** 
+   * Enable the watchdog resource with the given timeout interval. 
+   * This function may be called multiple times to reset the timeout
+   * interval. However, the watchdog function itself is sticky and
+   * will remain enabled until system reset.
+   *
+   * @param interval The timeout interval in untis of 3.25MHZ clock cycle
+   * ticks.
+   *
+   */
+  async command void enable(uint32_t interval);
+
+  /**
+   * Tickle/reset the watchdog counter. This function must be 
+   * called on a regular basis to prevent the watchdog from resetting the
+   * system.
+   *
+   */
+  async command void tickle();
+}
diff --git a/tos/chips/pxa27x/timer/HalPXA27xWatchdogC.nc b/tos/chips/pxa27x/timer/HalPXA27xWatchdogC.nc
new file mode 100644
index 00000000..dca08518
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xWatchdogC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+module HalPXA27xWatchdogC {
+  provides interface HalPXA27xWatchdog;
+}
+
+implementation {
+  components HplPXA27xOSTimerC;
+  components HalPXA27xWatchdogM;
+
+  HalPXA27xWatchdog = HalPXA27xWatchdogM;
+
+  HalPXA27xWatchdogM.HplPXA27xOSTimerWatchdog -> HplPXA27xOSTimerC.OSTWDCntl;
+  HalPXA27xWatchdogM.HplPXA27xOSTimer -> HplPXA27xOSTimerC.OST0M3;
+
+}
diff --git a/tos/chips/pxa27x/timer/HalPXA27xWatchdogM.nc b/tos/chips/pxa27x/timer/HalPXA27xWatchdogM.nc
new file mode 100644
index 00000000..ec5fa623
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HalPXA27xWatchdogM.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+module HalPXA27xWatchdogM {
+  provides interface HalPXA27xWatchdog;
+  uses interface HplPXA27xOSTimerWatchdog;
+  uses interface HplPXA27xOSTimer;
+}
+
+implementation {
+  uint32_t gResetInterval;
+
+  async command void HalPXA27xWatchdog.enable(uint32_t interval) {
+    uint32_t curMatch;
+    atomic {
+      gResetInterval = interval;
+      curMatch = call HplPXA27xOSTimer.getOSCR();
+      curMatch = (curMatch + gResetInterval) % 0xFFFFFFFF;
+      call HplPXA27xOSTimer.setOSMR(curMatch);
+      call HplPXA27xOSTimerWatchdog.enableWatchdog();
+    }
+  }
+
+  async command void HalPXA27xWatchdog.tickle() {
+    uint32_t curMatch;
+    atomic {
+      curMatch = call HplPXA27xOSTimer.getOSCR();
+      curMatch = (curMatch + gResetInterval) % 0xFFFFFFFF;
+      call HplPXA27xOSTimer.setOSMR(curMatch);
+    }
+  }
+
+  // This won't ever get called. Rather, the system will reset.
+  async event void HplPXA27xOSTimer.fired() {}
+
+}
diff --git a/tos/chips/pxa27x/timer/HplPXA27xOSTimer.nc b/tos/chips/pxa27x/timer/HplPXA27xOSTimer.nc
new file mode 100644
index 00000000..74c6f6bb
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HplPXA27xOSTimer.nc
@@ -0,0 +1,141 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This interface exposes a single OS Timer channel 
+ * on the PXA27x processor. Each channel includes a counter register 
+ * (OSCRx), a match register (OSMRx), a match control register (OMCRx) 
+ * and support for events on each channel. 
+ *
+ * Do not confuse this HPL interface with the generic 'Timer' interface 
+ * provided by TOS 2.x. They are completely different.
+ *
+ * Channels 0 thru 3 are the PXA25x compatibility timers. There are NO
+ * match control register for these channels. 
+ * Calls to getOSCR/setOSCR for channels 1 thru 3 are remmaped to OSCR0.
+ * 
+ * There may be additional configured inter-dependencies between the timer
+ * channels. Refer to the PXA27x Developer's Guide for more information.
+ *
+ * @author Phil Buonadonna
+ */
+
+interface HplPXA27xOSTimer
+{
+  /**
+   * Set/initialize the counter register (OSCRx) for the channel
+   *
+   * @param val Desired value to initialize/reset the counter register to.
+   * 
+   */
+  async command void setOSCR(uint32_t val);
+
+  /**
+   * Get the current counter register (OSCRx) value for the channel.
+   *
+   * @return value The 32-bit value of the counter register.
+   */
+  async command uint32_t getOSCR();
+
+  /**
+   * Set the match register (OSMRx) for the channel.
+   *
+   * @param val The desired 32-bit match value.
+   */
+  async command void setOSMR(uint32_t val);
+
+  /**
+   * Get the current match register (OSMRx) value for the channel.
+   *
+   * @return value The 32-bit value of the match register.
+   */
+  async command uint32_t getOSMR();
+
+  /**
+   * Set the timer channel match control register (OMCRx).
+   * 
+   * @param val The desired OMCR value.
+   */
+  async command void setOMCR(uint32_t val);
+
+  /**
+   * Get the current channel match control register (OMCRx) setting.
+   * 
+   * @return value The current OMCR value.
+   */
+  async command uint32_t getOMCR();
+
+  /**
+   * Returns the bit value of the OSSR register corresponding to the 
+   * channel. Indicates if a match event has ocurred.
+   *
+   * @return flag TRUE if an event is signaled (OSSR.M{n} is set). 
+   * FALSE otherwise 
+   *  
+   *
+   */
+  async command bool getOSSRbit();
+
+  /**
+   * Clears the bit position of the OSSR register corresponding to the
+   * channel. Returns the value of the bit before clearing.
+   *
+   * @return flag TRUE if an event is signaled (OSSR.M{n} set) prior 
+   * to clearing. FALSE otherwise.
+   */
+  async command bool clearOSSRbit();
+
+  /**
+   * Sets the OIER bit corresponding to the timer match channel.
+   *
+   * @param flag TRUE to set the OIER bit, FALSE to clear.
+   */
+  async command void setOIERbit(bool flag);
+
+  /**
+   * Returns the setting of the OIER bit corresponding to the timer
+   * match channel.
+   * 
+   * @return flag TRUE if set, FALSE if not set.
+   */
+  async command bool getOIERbit();
+
+  /** 
+   * Get the snapshot register (OSNR) value. 
+   * Any parameterization of this function is ignored.
+   */
+  async command uint32_t getOSNR();
+
+  /**
+   * Timer channel interrupt. Fired when the channel match register matches 
+   * configured 
+   */
+  async event void fired();
+
+}
diff --git a/tos/chips/pxa27x/timer/HplPXA27xOSTimerC.nc b/tos/chips/pxa27x/timer/HplPXA27xOSTimerC.nc
new file mode 100644
index 00000000..2dc123ad
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HplPXA27xOSTimerC.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+configuration HplPXA27xOSTimerC {
+
+  provides {
+    interface Init;
+    interface HplPXA27xOSTimer as OST0;
+    interface HplPXA27xOSTimer as OST0M1;
+    interface HplPXA27xOSTimer as OST0M2;
+    interface HplPXA27xOSTimer as OST0M3;
+    interface HplPXA27xOSTimer as OST4;
+    interface HplPXA27xOSTimer as OST5;
+    interface HplPXA27xOSTimer as OST6;
+    interface HplPXA27xOSTimer as OST7;
+    interface HplPXA27xOSTimer as OST8;
+    interface HplPXA27xOSTimer as OST9;
+    interface HplPXA27xOSTimer as OST10;
+    interface HplPXA27xOSTimer as OST11;
+    interface HplPXA27xOSTimerWatchdog as OSTWDCntl;
+  }
+
+}
+
+implementation {
+  components HplPXA27xOSTimerM, HplPXA27xInterruptM;
+
+  Init = HplPXA27xOSTimerM;
+
+  OST0 = HplPXA27xOSTimerM.PXA27xOST[0];
+  OST0M1 = HplPXA27xOSTimerM.PXA27xOST[1];
+  OST0M2 = HplPXA27xOSTimerM.PXA27xOST[2];
+  OST0M3 = HplPXA27xOSTimerM.PXA27xOST[3];
+  OST4 = HplPXA27xOSTimerM.PXA27xOST[4];
+  OST5 = HplPXA27xOSTimerM.PXA27xOST[5];
+  OST6 = HplPXA27xOSTimerM.PXA27xOST[6];
+  OST7 = HplPXA27xOSTimerM.PXA27xOST[7];
+  OST8 = HplPXA27xOSTimerM.PXA27xOST[8];
+  OST9 = HplPXA27xOSTimerM.PXA27xOST[9];
+  OST10 = HplPXA27xOSTimerM.PXA27xOST[10];
+  OST11 = HplPXA27xOSTimerM.PXA27xOST[11];
+  OSTWDCntl = HplPXA27xOSTimerM.PXA27xWD;
+  
+  HplPXA27xOSTimerM.OST0Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_0];
+  HplPXA27xOSTimerM.OST1Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_1];
+  HplPXA27xOSTimerM.OST2Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_2];
+  HplPXA27xOSTimerM.OST3Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_3];
+  HplPXA27xOSTimerM.OST4_11Irq -> HplPXA27xInterruptM.PXA27xIrq[PPID_OST_4_11];
+}
diff --git a/tos/chips/pxa27x/timer/HplPXA27xOSTimerM.nc b/tos/chips/pxa27x/timer/HplPXA27xOSTimerM.nc
new file mode 100644
index 00000000..f623a044
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HplPXA27xOSTimerM.nc
@@ -0,0 +1,241 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+
+module HplPXA27xOSTimerM {
+  provides {
+    interface Init;
+    interface HplPXA27xOSTimer as PXA27xOST[uint8_t chnl_id];
+    interface HplPXA27xOSTimerWatchdog as PXA27xWD;
+  }
+  uses {
+    interface HplPXA27xInterrupt as OST0Irq;
+    interface HplPXA27xInterrupt as OST1Irq;
+    interface HplPXA27xInterrupt as OST2Irq;
+    interface HplPXA27xInterrupt as OST3Irq;
+    interface HplPXA27xInterrupt as OST4_11Irq;
+  }
+}
+
+implementation {
+
+  bool gfInitialized = FALSE;
+
+  void DispatchOSTInterrupt(uint8_t id)
+  {
+    signal PXA27xOST.fired[id]();
+    return;
+  }
+
+  command error_t Init.init()
+  {
+    bool initflag;
+    atomic {
+      initflag = gfInitialized;
+      gfInitialized = TRUE;
+    }
+    
+    if (!initflag) {
+      OIER = 0x0UL;
+      OSSR = 0xFFFFFFFF; // Clear all status bits.
+      call OST0Irq.allocate();
+      call OST1Irq.allocate();
+      call OST2Irq.allocate();
+      call OST3Irq.allocate();
+      call OST4_11Irq.allocate();
+      call OST0Irq.enable();
+      call OST1Irq.enable();
+      call OST2Irq.enable();
+      call OST3Irq.enable();
+      call OST4_11Irq.enable();
+    }
+
+    return SUCCESS;
+  }
+  
+  async command void PXA27xOST.setOSCR[uint8_t chnl_id](uint32_t val) 
+  {
+    uint8_t remap_id;
+
+    remap_id = ((chnl_id < 4) ? (0) : (chnl_id));
+    OSCR(remap_id) = val;
+
+    return;
+  }
+  
+  async command uint32_t PXA27xOST.getOSCR[uint8_t chnl_id]()
+  {
+    uint8_t remap_id;
+    uint32_t val;
+
+    remap_id = ((chnl_id < 4) ? (0) : (chnl_id));
+    val = OSCR(remap_id);
+
+    return val;
+  }
+  
+  async command void PXA27xOST.setOSMR[uint8_t chnl_id](uint32_t val)
+  {
+    OSMR(chnl_id) = val;
+    return;
+  }
+
+  async command uint32_t PXA27xOST.getOSMR[uint8_t chnl_id]()
+  {
+    uint32_t val;
+    val = OSMR(chnl_id);
+    return val;
+  }
+
+  async command void PXA27xOST.setOMCR[uint8_t chnl_id](uint32_t val)
+  {
+    if (chnl_id > 3) {
+      OMCR(chnl_id) = val;
+    }
+    return;
+  }
+
+  async command uint32_t PXA27xOST.getOMCR[uint8_t chnl_id]()
+  {
+    uint32_t val = 0;
+    if (chnl_id > 3) {
+      val = OMCR(chnl_id);
+    }
+    return val;
+  }
+
+  async command bool PXA27xOST.getOSSRbit[uint8_t chnl_id]() 
+  {
+    bool bFlag = FALSE;
+    
+    if (((OSSR) & (1 << chnl_id)) != 0) {
+      bFlag = TRUE;
+    }
+
+    return bFlag;
+  }
+
+  async command bool PXA27xOST.clearOSSRbit[uint8_t chnl_id]()
+  {
+    bool bFlag = FALSE;
+
+    if (((OSSR) & (1 << chnl_id)) != 0) {
+      bFlag = TRUE;
+    }
+
+    // Clear the bit value
+    OSSR = (1 << chnl_id);
+
+    return bFlag;
+  }
+
+  async command void PXA27xOST.setOIERbit[uint8_t chnl_id](bool flag)
+  {
+    if (flag == TRUE) {
+      OIER |= (1 << chnl_id);
+    }
+    else {
+      OIER &= ~(1 << chnl_id);      
+    }
+    return;
+  }
+  
+  async command bool PXA27xOST.getOIERbit[uint8_t chnl_id]()
+  {
+    return ((OIER & (1 << chnl_id)) != 0);
+  }
+
+  async command uint32_t PXA27xOST.getOSNR[uint8_t chnl_id]() 
+  {
+    uint32_t val;
+    val = OSNR;
+    return val;
+  }
+
+  async command void PXA27xWD.enableWatchdog() 
+  {
+    OWER = OWER_WME;
+  }
+
+
+  // All interrupts are funneled through DispatchOSTInterrupt.
+  // This should not have any impact on performance and simplifies
+  // the software implementation.
+
+  async event void OST0Irq.fired() 
+  {
+    DispatchOSTInterrupt(0);
+  }
+  
+  async event void OST1Irq.fired() 
+  {
+    DispatchOSTInterrupt(1);
+  }
+  
+  async event void OST2Irq.fired() 
+  {
+    DispatchOSTInterrupt(2);
+  }
+
+  async event void OST3Irq.fired() 
+  {
+    DispatchOSTInterrupt(3);
+  }
+
+  async event void OST4_11Irq.fired() 
+  {
+    uint32_t statusReg;
+    uint8_t chnl;
+
+    statusReg = OSSR;
+    statusReg &= ~(OSSR_M3 | OSSR_M2 | OSSR_M1 | OSSR_M0);
+
+    while (statusReg) {
+      chnl = 31 - _pxa27x_clzui(statusReg);
+      DispatchOSTInterrupt(chnl); 
+      statusReg &= ~(1 << chnl);
+    }
+      
+    return;
+  }
+
+  default async event void PXA27xOST.fired[uint8_t chnl_id]() 
+  {
+    call PXA27xOST.setOIERbit[chnl_id](FALSE);
+    call PXA27xOST.clearOSSRbit[chnl_id]();
+    return;
+  }
+
+}
+  
diff --git a/tos/chips/pxa27x/timer/HplPXA27xOSTimerWatchdog.nc b/tos/chips/pxa27x/timer/HplPXA27xOSTimerWatchdog.nc
new file mode 100644
index 00000000..2866c6a4
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HplPXA27xOSTimerWatchdog.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ * This interface exposes the watchdog control of the PXA27x OS Timer
+ *
+ * Refer to the PXA27x Developer's Guide for more information.
+ *
+ * @author Phil Buonadonna
+ */
+
+interface HplPXA27xOSTimerWatchdog
+{
+  /** 
+   * Enable the timer-based watchdog reset feature.
+   * Once enabled, this feature may only be disabled by a reset.
+   */
+  async command void enableWatchdog();
+}
diff --git a/tos/chips/pxa27x/timer/HplPXA27xPower.nc b/tos/chips/pxa27x/timer/HplPXA27xPower.nc
new file mode 100644
index 00000000..3bb5b157
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HplPXA27xPower.nc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+
+/*
+ * Code to access some power management registers
+ */
+
+interface HplPXA27xPower {
+  async command void setPWER(uint32_t val);
+  async command void setPWRMode(uint8_t val);
+}
diff --git a/tos/chips/pxa27x/timer/HplPXA27xPowerM.nc b/tos/chips/pxa27x/timer/HplPXA27xPowerM.nc
new file mode 100644
index 00000000..daa217cd
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HplPXA27xPowerM.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+
+module HplPXA27xPowerM {
+  provides interface HplPXA27xPower;
+}
+
+implementation {
+  async command void HplPXA27xPower.setPWER(uint32_t val) {
+    PWER = val;
+  }
+
+  async command void HplPXA27xPower.setPWRMode(uint8_t val) {
+    val = val & 0xF;
+    asm volatile (
+		  "mcr p14,0,%0,c7,c0,0"
+		  : 
+		  : "r" (val)
+		  );
+    __nesc_enable_interrupt();
+    __nesc_disable_interrupt();
+  }
+}
diff --git a/tos/chips/pxa27x/timer/HplPXA27xRTC.nc b/tos/chips/pxa27x/timer/HplPXA27xRTC.nc
new file mode 100644
index 00000000..14daeea0
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HplPXA27xRTC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+
+/*
+ * Code to access some RTC registers
+ */
+
+interface HplPXA27xRTC {
+  async command void setRTCPICR(uint16_t val);
+  async command uint16_t getRTCPICR();
+  async command void setPIAR(uint16_t val);
+  async command uint16_t getPIAR();
+  async command void setRTSR(uint16_t val);
+  async command void setSWAR1(uint32_t val);
+  async command void setSWAR2(uint32_t val);
+  async command void setSWCR(uint32_t val);
+}
diff --git a/tos/chips/pxa27x/timer/HplPXA27xRTCM.nc b/tos/chips/pxa27x/timer/HplPXA27xRTCM.nc
new file mode 100644
index 00000000..8e873e75
--- /dev/null
+++ b/tos/chips/pxa27x/timer/HplPXA27xRTCM.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+
+module HplPXA27xRTCM {
+  provides interface HplPXA27xRTC;
+}
+
+implementation {
+  async command void HplPXA27xRTC.setRTCPICR(uint16_t val) { RTCPICR = val; }
+  async command uint16_t HplPXA27xRTC.getRTCPICR() { return RTCPICR; }
+  async command void HplPXA27xRTC.setPIAR(uint16_t val) { PIAR = val; }
+  async command uint16_t HplPXA27xRTC.getPIAR() { return PIAR; }
+  async command void HplPXA27xRTC.setRTSR(uint16_t val) { RTSR = val; }
+  async command void HplPXA27xRTC.setSWAR1(uint32_t val) { SWAR1 = val; }
+  async command void HplPXA27xRTC.setSWAR2(uint32_t val) { SWAR2 = val; }
+  async command void HplPXA27xRTC.setSWCR(uint32_t val) { SWCR = val; }
+}
diff --git a/tos/chips/pxa27x/uart/HalPXA27xSerialCntl.nc b/tos/chips/pxa27x/uart/HalPXA27xSerialCntl.nc
new file mode 100644
index 00000000..5c9a8e62
--- /dev/null
+++ b/tos/chips/pxa27x/uart/HalPXA27xSerialCntl.nc
@@ -0,0 +1,65 @@
+/* $Id: HalPXA27xSerialCntl.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ * @author Phil Buonadonna
+ */
+
+#include "pxa27x_serial.h"
+
+interface HalPXA27xSerialCntl
+{
+  /** 
+   * Modify runtime port parameters
+   *
+   * @param baudrate The integer value of baudrate
+   * @param databits The Number of data bits
+   * @param partiy Values of EVEN,ODD or NONE
+   * @param stopbits Values of 1 or 2
+   * @param flow_cntl TRUE to enable hardware flow control
+   *
+   * @return SUCCESS if parameters successfully applied. FAIL otherwise
+   */
+  async command error_t configPort(uint32_t baudrate, 
+				    uint8_t databits, 
+				    uart_parity_t parity, 
+				    uint8_t stopbits, 
+				    bool flow_cntl);
+    
+  /**
+   * Flush the port FIFOs
+   *
+   * @return SUCCESS if flushed, FAIL otherwise.
+   */
+  async command error_t flushPort();
+
+}
+
diff --git a/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc b/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc
new file mode 100644
index 00000000..419afb0f
--- /dev/null
+++ b/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc
@@ -0,0 +1,489 @@
+/* $Id: HalPXA27xSerialP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*
+ *  Intel Open Source License
+ *
+ *  Copyright (c) 2002 Intel Corporation
+ *  All rights reserved.
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ *
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ */
+/**
+ * Implements the UartByte, UartStream and HalPXA27xSerialPacket interface 
+ * for a PXA27x UART. 
+ * 
+ *
+ * @param defaultRate Default baud rate for the serial port. 
+ *
+ *
+ * @author Phil Buonadonna
+ */
+
+#include "pxa27x_serial.h"
+
+generic module HalPXA27xSerialP(uint32_t defaultRate)
+{
+  provides {
+    interface Init;
+    interface StdControl;
+    interface UartByte;
+    interface UartStream;
+    interface HalPXA27xSerialPacket;
+    interface HalPXA27xSerialCntl;
+  }
+  uses {
+    interface Init as UARTInit;
+    interface HplPXA27xUART as UART;
+    interface HplPXA27xDMAChnl as RxDMA;
+    interface HplPXA27xDMAChnl as TxDMA;
+    interface HplPXA27xDMAInfo as UARTRxDMAInfo;
+    interface HplPXA27xDMAInfo as UARTTxDMAInfo;
+  }
+}
+
+implementation 
+{
+
+  uint8_t *txCurrentBuf, *rxCurrentBuf;
+  uint32_t txCurrentLen, rxCurrentLen, rxCurrentIdx;
+  uint32_t gulFCRShadow;
+  bool gbUsingUartStreamSendIF = FALSE;
+  bool gbUsingUartStreamRcvIF = FALSE;
+  bool gbRcvByteEvtEnabled = TRUE;
+
+  command error_t Init.init() {
+    error_t error = SUCCESS;
+
+    atomic {
+      call UARTInit.init();
+      txCurrentBuf = rxCurrentBuf = NULL;
+      gbUsingUartStreamSendIF = FALSE;
+      gbUsingUartStreamRcvIF = FALSE;
+      gbRcvByteEvtEnabled = TRUE;
+      gulFCRShadow = (FCR_TRFIFOE | FCR_ITL(0)); // FIFO Mode, 1 byte Rx threshold
+    }
+    call TxDMA.setMap(call UARTTxDMAInfo.getMapIndex());
+    call RxDMA.setMap(call UARTRxDMAInfo.getMapIndex());
+    call TxDMA.setDALGNbit(TRUE);
+    call RxDMA.setDALGNbit(TRUE);
+
+    error = call HalPXA27xSerialCntl.configPort(defaultRate,8,NONE,1,FALSE);
+    
+    atomic {call UART.setFCR(gulFCRShadow);}
+    return error;
+  }
+
+  command error_t StdControl.start() {
+    atomic {
+      call UART.setIER(IER_UUE | IER_RAVIE);
+    }
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    atomic {
+      call UART.setIER(0);
+    }
+    return SUCCESS;
+  }
+
+  async command error_t UartByte.send(uint8_t data) {
+    atomic call UART.setTHR(data);
+    while ((call UART.getLSR() & LSR_TEMT) == 0);
+    return SUCCESS;
+  }
+
+  async command error_t UartByte.receive( uint8_t *data, uint8_t timeout) {
+    error_t error = FAIL;
+    uint8_t t;
+    for (t = 0; t < timeout; t++) {
+      if (call UART.getLSR() & LSR_DR) {
+	*data = call UART.getRBR();
+	error = SUCCESS;
+	break;
+      }
+    }
+    return error;
+  }
+
+  async command error_t UartStream.send( uint8_t* buf, uint16_t len ) {
+    error_t error;
+    atomic gbUsingUartStreamSendIF = TRUE;
+    error = call HalPXA27xSerialPacket.send(buf,len);
+    if (error) {
+      atomic gbUsingUartStreamSendIF = FALSE;
+    }
+    return error;
+  }
+
+
+  async command error_t UartStream.enableReceiveInterrupt() {
+    error_t error = SUCCESS;
+    atomic {
+      if (rxCurrentBuf == NULL) {
+	call UART.setIER(call UART.getIER() | IER_RAVIE);
+      }
+      gbRcvByteEvtEnabled = TRUE;
+    }
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.disableReceiveInterrupt() {
+    atomic {
+      // Check to make sure a short stream/packet call isn't in progress
+      if ((rxCurrentBuf == NULL) || (rxCurrentLen >= 8)) {
+	call UART.setIER(call UART.getIER() & ~IER_RAVIE);
+      }
+      gbRcvByteEvtEnabled = FALSE;
+    }
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.receive( uint8_t* buf, uint16_t len ) {
+    error_t error;
+    atomic gbUsingUartStreamRcvIF = TRUE;
+    error = call HalPXA27xSerialPacket.receive(buf,len,0);
+    if (error) {
+      atomic gbUsingUartStreamRcvIF = FALSE;
+    }
+    return error;
+  }
+  
+  async command error_t HalPXA27xSerialPacket.send(uint8_t *buf, uint16_t len) {
+    uint32_t txAddr;
+    uint32_t DMAFlags;
+    error_t error = SUCCESS;
+
+    atomic {
+      if (txCurrentBuf == NULL) {
+	txCurrentBuf = buf;
+	txCurrentLen = len;
+      }
+      else {
+	error = FAIL;
+      }
+    }
+
+    if (error) 
+      return error;
+    
+    if (len < 8) {
+      uint16_t i;
+      // Use PIO. Invariant: FIFO is empty
+      atomic {
+	gulFCRShadow |= FCR_TIL;
+	call UART.setFCR(gulFCRShadow); 
+      }
+      for (i = 0;i < len;i++) {
+	call UART.setTHR(buf[i]);
+      }
+      atomic call UART.setIER(call UART.getIER() | IER_TIE);
+    }
+    else {
+      // Use DMA
+      DMAFlags = (DCMD_FLOWTRG | DCMD_BURST8 | DCMD_WIDTH1 | DCMD_ENDIRQEN
+		  | DCMD_LEN(len) );
+      
+      txAddr = (uint32_t) buf;
+      DMAFlags |= DCMD_INCSRCADDR;
+      
+      call TxDMA.setDCSR(DCSR_NODESCFETCH);
+      call TxDMA.setDSADR(txAddr);
+      call TxDMA.setDTADR(call UARTTxDMAInfo.getAddr());
+      call TxDMA.setDCMD(DMAFlags);
+      
+      atomic {
+	call UART.setIER(call UART.getIER() | IER_DMAE);
+      }
+
+      call TxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH);
+    }
+    return error;
+  }
+
+
+  async command error_t HalPXA27xSerialPacket.receive(uint8_t *buf, uint16_t len, 
+						      uint16_t timeout) {
+    uint32_t rxAddr;
+    uint32_t DMAFlags;
+    error_t error = SUCCESS;
+
+    atomic {
+      if (rxCurrentBuf == NULL) {
+	rxCurrentBuf = buf;
+	rxCurrentLen = len;
+	rxCurrentIdx = 0;
+      }
+      else {
+	error = FAIL;
+      }
+    }
+
+    if (error) 
+      return error;
+
+    if (len < 8) {
+      // Use PIO. Invariant: FIFO is empty
+      atomic {
+	gulFCRShadow = ((gulFCRShadow & ~(FCR_ITL(3))) | FCR_ITL(0));
+	call UART.setFCR(gulFCRShadow); 
+	call UART.setIER(call UART.getIER() | IER_RAVIE);
+      }
+    }
+    else {
+      // Use DMA
+      DMAFlags = (DCMD_FLOWSRC | DCMD_BURST8 | DCMD_WIDTH1 | DCMD_ENDIRQEN
+		  | DCMD_LEN(len) );
+      
+      rxAddr = (uint32_t) buf;
+      DMAFlags |= DCMD_INCTRGADDR;
+      
+      call RxDMA.setDCSR(DCSR_NODESCFETCH);
+      call RxDMA.setDTADR(rxAddr);
+      call RxDMA.setDSADR(call UARTRxDMAInfo.getAddr());
+      call RxDMA.setDCMD(DMAFlags);
+
+      atomic {
+	gulFCRShadow = ((gulFCRShadow & ~(FCR_ITL(3))) | FCR_ITL(1));
+	call UART.setFCR(gulFCRShadow); 
+	call UART.setIER((call UART.getIER() & ~IER_RAVIE) | IER_DMAE);
+      }
+
+      call RxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH);
+    }
+    return error;
+  }
+  
+  void DispatchStreamRcvSignal() {
+    uint8_t *pBuf = rxCurrentBuf;
+    uint16_t len = rxCurrentLen;
+    rxCurrentBuf = NULL;
+    if (gbUsingUartStreamRcvIF) {
+      gbUsingUartStreamRcvIF = FALSE;
+      signal UartStream.receiveDone(pBuf, len, SUCCESS);
+    }
+    else {
+      pBuf = signal HalPXA27xSerialPacket.receiveDone(pBuf, len, SUCCESS);
+      if (pBuf) {
+	call HalPXA27xSerialPacket.receive(pBuf,len,0);
+      }
+    }
+    return;
+  }
+
+  void DispatchStreamSendSignal() {
+    uint8_t *pBuf = txCurrentBuf;
+    uint16_t len = txCurrentLen;
+    txCurrentBuf = NULL;
+    if (gbUsingUartStreamSendIF) {
+      gbUsingUartStreamSendIF = FALSE;
+      signal UartStream.sendDone(pBuf, len, SUCCESS);
+    }
+    else {
+      pBuf = signal HalPXA27xSerialPacket.sendDone(pBuf, len, SUCCESS);
+      if (pBuf) {
+	call HalPXA27xSerialPacket.send(pBuf,len);
+      }
+    }
+    return;
+  }
+
+  async event void RxDMA.interruptDMA() {
+    call RxDMA.setDCMD(0);
+    call RxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR);
+    DispatchStreamRcvSignal();
+    if (gbRcvByteEvtEnabled) 
+      call UART.setIER(call UART.getIER() | IER_RAVIE);
+    return;
+  }
+
+  async event void TxDMA.interruptDMA() {
+    call TxDMA.setDCMD(0);
+    call TxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR);
+    DispatchStreamSendSignal();
+    return;
+  }
+
+
+  async command error_t HalPXA27xSerialCntl.configPort(uint32_t baudrate, 
+							uint8_t databits, 
+							uart_parity_t parity, 
+							uint8_t stopbits, 
+							bool flow_cntl) {
+    uint32_t uiDivisor;
+    uint32_t valLCR = 0;
+    uint32_t valMCR = MCR_OUT2;
+      
+    uiDivisor = 921600/baudrate;
+    // Check for invalid baud rate divisor value.
+    // XXX - Eventually could use '0' to imply auto rate detection
+    if ((uiDivisor & 0xFFFF0000) || (uiDivisor == 0)) {
+      return EINVAL;
+    }
+
+    if ((databits > 8 || databits < 5)) {
+      return EINVAL;
+    }
+    valLCR |= LCR_WLS((databits-5));
+
+    switch (parity) {
+    case EVEN: 
+      valLCR |= LCR_EPS;
+      // Fall through to enable
+    case ODD:
+      valLCR |= LCR_PEN;
+      break;
+    case NONE:
+      break;
+    default:
+      return EINVAL;
+      break;
+    }
+    
+    if ((stopbits > 2) || (stopbits < 1)) {
+      return EINVAL;
+    }
+    else if (stopbits == 2) {
+      valLCR |= LCR_STB;
+    }
+
+    if (flow_cntl) {
+      valMCR |= MCR_AFE;
+    }
+
+    atomic {
+      call UART.setDLL((uiDivisor & 0xFF));
+      call UART.setDLH(((uiDivisor >> 8) & 0xFF));
+      call UART.setLCR(valLCR);
+      call UART.setMCR(valMCR);
+    }
+ 
+    return SUCCESS;
+  }
+    
+  async command error_t HalPXA27xSerialCntl.flushPort() {
+
+    atomic {
+      call UART.setFCR(gulFCRShadow | FCR_RESETTF | FCR_RESETRF);
+    }
+
+    return SUCCESS;
+  }
+  
+  async event void UART.interruptUART() {
+    uint8_t error, intSource;
+    uint8_t ucByte;
+
+    intSource = call UART.getIIR();
+    intSource &= IIR_IID_MASK;
+    intSource = intSource >> 1;
+    
+    switch (intSource) {
+    case 0: // MODEM STATUS
+      break;
+    case 1: // TRANSMIT FIFO
+      call UART.setIER(call UART.getIER() & ~IER_TIE);
+      DispatchStreamSendSignal();
+      break;
+    case 2: // RECEIVE FIFO data available
+      while (call UART.getLSR() & LSR_DR) {
+	ucByte = call UART.getRBR();
+
+	if (rxCurrentBuf != NULL) {
+	  rxCurrentBuf[rxCurrentIdx] = ucByte;
+	  rxCurrentIdx++;
+	  if (rxCurrentIdx >= rxCurrentLen) 
+	    DispatchStreamRcvSignal();
+	}
+	else if (gbRcvByteEvtEnabled) {
+	  signal UartStream.receivedByte(ucByte);
+	}
+      }
+      break;
+    case 3: // ERROR
+      error = call UART.getLSR();
+      break;
+    default:
+      break;
+    }
+    return;
+  }
+
+  default async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ) {
+    return; 
+  }
+
+  default async event void UartStream.receivedByte(uint8_t data) {
+    return;
+  }
+
+  default async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ) {
+    return;
+  }
+
+  default async event uint8_t* HalPXA27xSerialPacket.sendDone(uint8_t *buf, 
+							      uint16_t len, 
+							      uart_status_t status) {
+    return NULL;
+  }
+
+  default async event uint8_t* HalPXA27xSerialPacket.receiveDone(uint8_t *buf, 
+								 uint16_t len, 
+								 uart_status_t status) {
+    return NULL;
+  }
+
+
+}
diff --git a/tos/chips/pxa27x/uart/HalPXA27xSerialPacket.nc b/tos/chips/pxa27x/uart/HalPXA27xSerialPacket.nc
new file mode 100644
index 00000000..9e566b56
--- /dev/null
+++ b/tos/chips/pxa27x/uart/HalPXA27xSerialPacket.nc
@@ -0,0 +1,92 @@
+/* $Id: HalPXA27xSerialPacket.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ * @author Phil Buonadonna
+ */
+
+#include "pxa27x_serial.h"
+
+interface HalPXA27xSerialPacket
+{
+  /**
+   * Begin transmission of a UART stream. If SUCCESS is returned,
+   * <code>sendDone</code> will be signalled when transmission is
+   * complete.
+   *
+   * @param buf Buffer for bytes to send.
+   * @param len Number of bytes to send.
+   * @return SUCCESS if request was accepted, FAIL otherwise.
+   */
+  async command error_t send(uint8_t *buf, uint16_t len);
+  
+  /**
+   * Signal completion of sending a stream.
+   *
+   * @param buf Bytes sent.
+   * @param len Number of bytes sent.
+   * @param status UART error status.
+   *
+   * @return buf A pointer to a new buffer of equal length
+   * as in the original <code>send</code> call that is to be transmitted (chained
+   * send). Set to NULL to end further transmissions.
+   */
+  async event uint8_t *sendDone(uint8_t *buf, uint16_t len, uart_status_t status);
+
+  /**
+   * Begin reception of a UART stream. If SUCCESS is returned,
+   * <code>receiveDone</code> will be signalled when reception is
+   * complete.
+   *
+   * @param buf Buffer for received bytes.
+   * @param len Number of bytes to receive.
+   * @param timeout Timeout, in milliseconds, for receive operation
+   *
+   * @return SUCCESS if request was accepted, FAIL otherwise.
+   */
+  async command error_t receive(uint8_t *buf, uint16_t len, uint16_t timeout);
+
+   /**
+   * Signal completion of receiving a stream.
+   *
+   * @param buf Buffer for bytes received.
+   * @param len Number of bytes received.
+   * @param status UART error status
+   *
+   * @return buf A pointer to a new buffer of equal or greater length 
+   * as in the original <code>receive</code> call in which it intiate a
+   * new packet reception (chained receive). Set to NULL to terminate further
+   * reception. 
+   */
+  async event uint8_t *receiveDone(uint8_t *buf, uint16_t len, uart_status_t status);
+  
+}
+
diff --git a/tos/chips/pxa27x/uart/HplPXA27xBTUARTC.nc b/tos/chips/pxa27x/uart/HplPXA27xBTUARTC.nc
new file mode 100644
index 00000000..aa08636a
--- /dev/null
+++ b/tos/chips/pxa27x/uart/HplPXA27xBTUARTC.nc
@@ -0,0 +1,52 @@
+/* $Id: HplPXA27xBTUARTC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadonna
+ */
+
+configuration HplPXA27xBTUARTC 
+{
+  provides interface Init;
+  provides interface HplPXA27xUART as BTUART;
+}
+
+implementation 
+{
+  components new HplPXA27xUARTP((uint32_t)&BTRBR);
+  components HplPXA27xInterruptM;
+
+  Init = HplPXA27xUARTP;
+  BTUART = HplPXA27xUARTP.UART;
+
+  HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_BTUART];
+
+}
diff --git a/tos/chips/pxa27x/uart/HplPXA27xFFUARTC.nc b/tos/chips/pxa27x/uart/HplPXA27xFFUARTC.nc
new file mode 100644
index 00000000..f665d0ba
--- /dev/null
+++ b/tos/chips/pxa27x/uart/HplPXA27xFFUARTC.nc
@@ -0,0 +1,52 @@
+/* $Id: HplPXA27xFFUARTC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadonna
+ */
+
+configuration HplPXA27xFFUARTC 
+{
+  provides interface Init;
+  provides interface HplPXA27xUART as FFUART;
+}
+
+implementation 
+{
+  components new HplPXA27xUARTP((uint32_t)&FFRBR);
+  components HplPXA27xInterruptM;
+
+  Init = HplPXA27xUARTP;
+  FFUART = HplPXA27xUARTP.UART;
+
+  HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_FFUART];
+
+}
diff --git a/tos/chips/pxa27x/uart/HplPXA27xSTUARTC.nc b/tos/chips/pxa27x/uart/HplPXA27xSTUARTC.nc
new file mode 100644
index 00000000..79b78134
--- /dev/null
+++ b/tos/chips/pxa27x/uart/HplPXA27xSTUARTC.nc
@@ -0,0 +1,52 @@
+/* $Id: HplPXA27xSTUARTC.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadonna
+ */
+
+configuration HplPXA27xSTUARTC 
+{
+  provides interface Init;
+  provides interface HplPXA27xUART as STUART;
+}
+
+implementation 
+{
+  components new HplPXA27xUARTP((uint32_t)&STRBR);
+  components HplPXA27xInterruptM;
+
+  Init = HplPXA27xUARTP;
+  STUART = HplPXA27xUARTP.UART;
+
+  HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_STUART];
+
+}
diff --git a/tos/chips/pxa27x/uart/HplPXA27xUART.nc b/tos/chips/pxa27x/uart/HplPXA27xUART.nc
new file mode 100644
index 00000000..fc01b37e
--- /dev/null
+++ b/tos/chips/pxa27x/uart/HplPXA27xUART.nc
@@ -0,0 +1,82 @@
+/* $Id: HplPXA27xUART.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Interface to access UART peripheral register on the PXA27x. Function 
+ * names are based on the common portion of the names outlined in
+ * the PXA27x Developers Guide.
+ * 
+ * @author Phil Buonadonna
+ */
+
+interface HplPXA27xUART
+{
+  async command uint32_t getRBR();
+  async command void setTHR(uint32_t val);
+
+  async command void setDLL(uint32_t val);
+  async command uint32_t getDLL();
+
+  async command void setDLH(uint32_t val);
+  async command uint32_t getDLH();
+
+  async command void setIER(uint32_t val);
+  async command uint32_t getIER();
+
+  async command uint32_t getIIR();
+
+  async command void setFCR(uint32_t val);
+
+  async command void setLCR(uint32_t val);
+  async command uint32_t getLCR();
+
+  async command void setMCR(uint32_t val);
+  async command uint32_t getMCR();
+
+  async command uint32_t getLSR();
+
+  async command uint32_t getMSR();
+
+  async command void setSPR(uint32_t val);
+  async command uint32_t getSPR();
+
+  async command void setISR(uint32_t val);
+  async command uint32_t getISR();
+
+  async command void setFOR(uint32_t val);
+  async command uint32_t getFOR();
+
+  async command void setABR(uint32_t val);
+  async command uint32_t getABR();
+
+  async command uint32_t getACR();
+
+  async event void interruptUART();
+}
diff --git a/tos/chips/pxa27x/uart/HplPXA27xUARTP.nc b/tos/chips/pxa27x/uart/HplPXA27xUARTP.nc
new file mode 100644
index 00000000..5b704a32
--- /dev/null
+++ b/tos/chips/pxa27x/uart/HplPXA27xUARTP.nc
@@ -0,0 +1,143 @@
+/* $Id: HplPXA27xUARTP.nc,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * Provides low-level initialization, 1st level interrupt dispatch and register
+ * access for the different uarts.  It is a generic that's bound to 
+ * the particular UART upon creation.
+ *
+ * @param baseaddr. The base address of the associated uart. One of 
+ * &FFRBR, &BTRBR or &STRBR.
+ * This component automatically handles setting of the DLAB bit for
+ * divisor register access (DLL and DLH) 
+ *
+ * @author Phil Buonadonna
+ */
+
+#include "PXA27X_UARTREG.h"
+
+generic module HplPXA27xUARTP(uint32_t base_addr)
+{
+  provides interface Init;
+  provides interface HplPXA27xUART as UART;
+  uses interface HplPXA27xInterrupt as UARTIrq;
+}
+
+implementation
+{
+  bool m_fInit = FALSE;
+
+  command error_t Init.init() {
+    bool isInited;
+
+    atomic {
+      isInited = m_fInit;
+      m_fInit = TRUE;
+    }
+
+    if (!isInited) {
+      switch (base_addr) {
+      case (0x40100000):
+	CKEN |= CKEN6_FFUART;
+	break;
+      case (0x40200000):
+	CKEN |= CKEN7_BTUART;
+	break;
+      case (0x40700000):
+	CKEN |= CKEN5_STUART;
+	break;
+      default:
+	break;
+      }
+      call UARTIrq.allocate();
+      call UARTIrq.enable();
+      UARTLCR(base_addr) |= LCR_DLAB;
+      UARTDLL(base_addr) = 0x04;
+      UARTDLH(base_addr) = 0x00;
+      UARTLCR(base_addr) &= ~LCR_DLAB;
+    }
+
+    return SUCCESS;
+  }
+
+  async command uint32_t UART.getRBR() { return UARTRBR(base_addr); }
+  async command void UART.setTHR(uint32_t val) { UARTTHR(base_addr) = val; }
+  async command void UART.setDLL(uint32_t val) { 
+    UARTLCR(base_addr) |= LCR_DLAB;
+    UARTDLL(base_addr) = val; 
+    UARTLCR(base_addr) &= ~LCR_DLAB;
+  }
+  async command uint32_t UART.getDLL() { 
+    uint32_t val;
+    UARTLCR(base_addr) |= LCR_DLAB;
+    val = UARTDLL(base_addr); 
+    UARTLCR(base_addr) &= ~LCR_DLAB;
+    return val;
+  }
+  async command void UART.setDLH(uint32_t val) { 
+    UARTLCR(base_addr) |= LCR_DLAB;
+    UARTDLH(base_addr) = val; 
+    UARTLCR(base_addr) &= ~LCR_DLAB;
+  }
+  async command uint32_t UART.getDLH() { 
+    uint32_t val;
+    UARTLCR(base_addr) |= LCR_DLAB;
+    val = UARTDLH(base_addr);
+    UARTLCR(base_addr) &= ~LCR_DLAB;
+    return val;
+  }
+  async command void UART.setIER(uint32_t val) { UARTIER(base_addr) = val; }
+  async command uint32_t UART.getIER() { return UARTIER(base_addr); }
+  async command uint32_t UART.getIIR() { return UARTIIR(base_addr); }
+  async command void UART.setFCR(uint32_t val) { UARTFCR(base_addr) = val; }
+  async command void UART.setLCR(uint32_t val) { UARTLCR(base_addr) = val; }
+  async command uint32_t UART.getLCR() { return UARTLCR(base_addr); }
+  async command void UART.setMCR(uint32_t val) { UARTMCR(base_addr) = val; }
+  async command uint32_t UART.getMCR() { return UARTMCR(base_addr); }
+  async command uint32_t UART.getLSR() { return UARTLSR(base_addr); }
+  async command uint32_t UART.getMSR() { return UARTMSR(base_addr); }
+  async command void UART.setSPR(uint32_t val) { UARTSPR(base_addr) = val; }
+  async command uint32_t UART.getSPR() { return UARTSPR(base_addr); }
+  async command void UART.setISR(uint32_t val) { UARTISR(base_addr) = val; }
+  async command uint32_t UART.getISR() { return UARTISR(base_addr); }
+  async command void UART.setFOR(uint32_t val) { UARTFOR(base_addr) = val; }
+  async command uint32_t UART.getFOR() { return UARTFOR(base_addr); }
+  async command void UART.setABR(uint32_t val) { UARTABR(base_addr) = val; }
+  async command uint32_t UART.getABR() { return UARTABR(base_addr); }
+  async command uint32_t UART.getACR() { return UARTACR(base_addr); }
+
+  async event void UARTIrq.fired () {
+
+    signal UART.interruptUART();
+  }
+
+  default async event void UART.interruptUART() { return; }
+  
+}
diff --git a/tos/chips/pxa27x/uart/PXA27X_UARTREG.h b/tos/chips/pxa27x/uart/PXA27X_UARTREG.h
new file mode 100644
index 00000000..c4c9d14f
--- /dev/null
+++ b/tos/chips/pxa27x/uart/PXA27X_UARTREG.h
@@ -0,0 +1,58 @@
+/* $Id: PXA27X_UARTREG.h,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/* 
+ * Helper macros to make programming the HplPXA27xUARTP component easier
+ */
+
+#ifndef _PXA27X_UARTREG_H
+#define _PXA27X_UARTREG_H
+
+#define UARTRBR(_base) _PXAREG_OFFSET(_base,0)
+#define UARTTHR(_base) _PXAREG_OFFSET(_base,0)
+#define UARTIER(_base) _PXAREG_OFFSET(_base,0x04)
+#define UARTIIR(_base) _PXAREG_OFFSET(_base,0x08)
+#define UARTFCR(_base) _PXAREG_OFFSET(_base,0x08)
+#define UARTLCR(_base) _PXAREG_OFFSET(_base,0x0C)
+#define UARTMCR(_base) _PXAREG_OFFSET(_base,0x10)
+#define UARTLSR(_base) _PXAREG_OFFSET(_base,0x14)
+#define UARTMSR(_base) _PXAREG_OFFSET(_base,0x18)
+#define UARTSPR(_base) _PXAREG_OFFSET(_base,0x1C)
+#define UARTISR(_base) _PXAREG_OFFSET(_base,0x20)
+#define UARTFOR(_base) _PXAREG_OFFSET(_base,0x24)
+#define UARTABR(_base) _PXAREG_OFFSET(_base,0x28)
+#define UARTACR(_base) _PXAREG_OFFSET(_base,0x2C)
+
+#define UARTDLL(_base) _PXAREG_OFFSET(_base,0)
+#define UARTDLH(_base) _PXAREG_OFFSET(_base,0x04)
+
+#endif /* _PXA27X_UARTREG_H */
+
diff --git a/tos/chips/pxa27x/uart/pxa27x_serial.h b/tos/chips/pxa27x/uart/pxa27x_serial.h
new file mode 100644
index 00000000..88e53749
--- /dev/null
+++ b/tos/chips/pxa27x/uart/pxa27x_serial.h
@@ -0,0 +1,44 @@
+/* $Id: pxa27x_serial.h,v 1.5 2008-06-11 00:42:13 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+
+#ifndef _pxa27x_serial_h
+#define _pxa27x_serial_h
+
+typedef uint8_t uart_status_t; // ??? if this is supposed to be a uint8_t
+
+typedef enum {
+  EVEN,
+  ODD,
+  NONE
+} uart_parity_t;
+
+#endif /* _pxa27x_serial_h */
diff --git a/tos/chips/rf212/README b/tos/chips/rf212/README
new file mode 100644
index 00000000..99719cdc
--- /dev/null
+++ b/tos/chips/rf212/README
@@ -0,0 +1,38 @@
+
+The RF212 radio driver has the following configuration options. Some of 
+these are set in the platforms/xxx/chips/rf212/RadioConfig.h header file, 
+see the meshbean900 platform for example, others can be set in your Makefile.
+
+RF212_TRX_CTRL_0_VALUE:
+
+This is the value of the TRX_CTRL_0 register which configures the output 
+pin currents and the CLKM clock:
+
+RF212_CCA_MODE_VALUE:
+
+This is the default value of the CCA_MODE field in the PHY_CC_CCA register
+which is used to configure the default mode of the clear channel assesment
+
+RF212_CCA_THRES_VALUE:
+
+This is the value of the CCA_THRES register that controls the energy levels 
+used for clear channel assesment.
+
+RF212_DEF_RFPOWER:
+
+This is the default value of the TX_PWR field of the PHY_TX_PWR register. 
+This can be cahanged via the PacketTransmitPower interface provided by the 
+RF212ActiveMessageC.
+
+RF212_DEF_CHANNEL:
+
+This is the default value of the CHANNEL field of the PHY_CC_CCA register.
+This can be cahanged via the RadioChannel interface provided by the 
+RF212ActiveMessageC.
+
+RF212_RSSI_ENERGY:
+
+If you define this, then the content of the RF212_PHY_ED_LEVEL is queried 
+instead of the RSSI value for eahc incoming message. This value can be 
+obtained with the PacketRSSI interface.
+
diff --git a/tos/chips/rf212/RF212ActiveMessageC.nc b/tos/chips/rf212/RF212ActiveMessageC.nc
new file mode 100644
index 00000000..0e7f1de8
--- /dev/null
+++ b/tos/chips/rf212/RF212ActiveMessageC.nc
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+#ifdef IEEE154FRAMES_ENABLED
+#error "You cannot use ActiveMessageC with IEEE154FRAMES_ENABLED defined"
+#endif
+
+configuration RF212ActiveMessageC
+{
+	provides 
+	{
+		interface SplitControl;
+
+		interface AMSend[am_id_t id];
+		interface Receive[am_id_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface SendNotifier[am_id_t id];
+
+		// for TOSThreads
+		interface Receive as ReceiveDefault[am_id_t id];
+		interface Receive as SnoopDefault[am_id_t id];
+
+		interface Packet;
+		interface AMPacket;
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+#ifdef PACKET_LINK
+		interface PacketLink;
+#endif
+
+		interface RadioChannel;
+
+		interface PacketField<uint8_t> as PacketLinkQuality;
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	components RF212RadioC as RadioC;
+
+	SplitControl = RadioC;
+
+	AMSend = RadioC;
+	Receive = RadioC.Receive;
+	Snoop = RadioC.Snoop;
+	SendNotifier = RadioC;
+
+	ReceiveDefault = RadioC.ReceiveDefault;
+	SnoopDefault = RadioC.SnoopDefault;
+
+	Packet = RadioC.PacketForActiveMessage;
+	AMPacket = RadioC;
+
+	PacketAcknowledgements = RadioC;
+	LowPowerListening = RadioC;
+#ifdef PACKET_LINK
+	PacketLink = RadioC;
+#endif
+
+	RadioChannel = RadioC;
+
+	PacketLinkQuality = RadioC.PacketLinkQuality;
+	PacketTransmitPower = RadioC.PacketTransmitPower;
+	PacketRSSI = RadioC.PacketRSSI;
+
+	LocalTimeRadio = RadioC;
+	PacketTimeStampMilli = RadioC;
+	PacketTimeStampRadio = RadioC;
+}
diff --git a/tos/chips/rf212/RF212DriverConfig.nc b/tos/chips/rf212/RF212DriverConfig.nc
new file mode 100644
index 00000000..835fae54
--- /dev/null
+++ b/tos/chips/rf212/RF212DriverConfig.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface RF212DriverConfig
+{
+	/**
+	 * Returns the length of a dummy header to align the payload properly.
+	 */
+	async command uint8_t headerLength(message_t* msg);
+
+	/**
+	 * Returns the maximum length of the PHY payload including the 
+	 * length field but not counting the FCF field.
+	 */
+	async command uint8_t maxPayloadLength();
+
+	/**
+	 * Returns the length of a dummy metadata section to align the
+	 * metadata section properly.
+	 */
+	async command uint8_t metadataLength(message_t* msg);
+
+	/**
+	 * Gets the number of bytes we should read before the RadioReceive.header
+	 * event is fired. If the length of the packet is less than this amount, 
+	 * then that event is fired earlier. The header length must be at least one.
+	 */
+	async command uint8_t headerPreloadLength();
+
+	/**
+	 * Returns TRUE if before sending this message we should make sure that
+	 * the channel is clear via a very basic (and quick) RSSI check.
+	 */
+	async command bool requiresRssiCca(message_t* msg);
+}
diff --git a/tos/chips/rf212/RF212DriverLayer.h b/tos/chips/rf212/RF212DriverLayer.h
new file mode 100644
index 00000000..2e586f90
--- /dev/null
+++ b/tos/chips/rf212/RF212DriverLayer.h
@@ -0,0 +1,191 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __RF212DRIVERLAYER_H__
+#define __RF212DRIVERLAYER_H__
+
+typedef nx_struct rf212_header_t
+{
+	nxle_uint8_t length;
+} rf212_header_t;
+
+typedef struct rf212_metadata_t
+{
+	uint8_t lqi;
+	union
+	{
+		uint8_t power;
+		uint8_t rssi;
+	};
+} rf212_metadata_t;
+
+enum rf212_registers_enum
+{
+	RF212_TRX_STATUS = 0x01,
+	RF212_TRX_STATE = 0x02,
+	RF212_TRX_CTRL_0 = 0x03,
+	RF212_TRX_CTRL_1 = 0x04,
+	RF212_PHY_TX_PWR = 0x05,
+	RF212_PHY_RSSI = 0x06,
+	RF212_PHY_ED_LEVEL = 0x07,
+	RF212_PHY_CC_CCA = 0x08,
+	RF212_CCA_THRES = 0x09,
+	RF212_IRQ_MASK = 0x0E,
+	RF212_IRQ_STATUS = 0x0F,
+	RF212_VREG_CTRL = 0x10,
+	RF212_BATMON = 0x11,
+	RF212_XOSC_CTRL = 0x12,
+	RF212_PLL_CF = 0x1A,
+	RF212_PLL_DCU = 0x1B,
+	RF212_PART_NUM = 0x1C,
+	RF212_VERSION_NUM = 0x1D,
+	RF212_MAN_ID_0 = 0x1E,
+	RF212_MAN_ID_1 = 0x1F,
+	RF212_SHORT_ADDR_0 = 0x20,
+	RF212_SHORT_ADDR_1 = 0x21,
+	RF212_PAN_ID_0 = 0x22,
+	RF212_PAN_ID_1 = 0x23,
+	RF212_IEEE_ADDR_0 = 0x24,
+	RF212_IEEE_ADDR_1 = 0x25,
+	RF212_IEEE_ADDR_2 = 0x26,
+	RF212_IEEE_ADDR_3 = 0x27,
+	RF212_IEEE_ADDR_4 = 0x28,
+	RF212_IEEE_ADDR_5 = 0x29,
+	RF212_IEEE_ADDR_6 = 0x2A,
+	RF212_IEEE_ADDR_7 = 0x2B,
+	RF212_XAH_CTRL = 0x2C,
+	RF212_CSMA_SEED_0 = 0x2D,
+	RF212_CSMA_SEED_1 = 0x2E,
+};
+
+enum rf212_trx_status_enums
+{
+	RF212_CCA_DONE = 1 << 7,
+	RF212_CCA_STATUS = 1 << 6,
+	RF212_TRX_STATUS_MASK = 0x1F,
+	RF212_P_ON = 0,
+	RF212_BUSY_RX = 1,
+	RF212_BUSY_TX = 2,
+	RF212_RX_ON = 6,
+	RF212_TRX_OFF = 8,
+	RF212_PLL_ON = 9,
+	RF212_SLEEP = 15,
+	RF212_BUSY_RX_AACK = 17,
+	RF212_BUSR_TX_ARET = 18,
+	RF212_RX_AACK_ON = 22,
+	RF212_TX_ARET_ON = 25,
+	RF212_RX_ON_NOCLK = 28,
+	RF212_AACK_ON_NOCLK = 29,
+	RF212_BUSY_RX_AACK_NOCLK = 30,
+	RF212_STATE_TRANSITION_IN_PROGRESS = 31,
+};
+
+enum rf212_trx_state_enums
+{
+	RF212_TRAC_STATUS_MASK = 0xE0,
+	RF212_TRAC_SUCCESS = 0,
+	RF212_TRAC_SUCCESS_DATA_PENDING = 1 << 5,
+	RF212_TRAC_SUCCESS_WAIT_FOR_ACK = 2 << 5,
+	RF212_TRAC_CHANNEL_ACCESS_FAILURE = 3 << 5,
+	RF212_TRAC_NO_ACK = 5 << 5,
+	RF212_TRAC_INVALID = 7 << 5,
+	RF212_TRX_CMD_MASK = 0x1F,
+	RF212_NOP = 0,
+	RF212_TX_START = 2,
+	RF212_FORCE_TRX_OFF = 3,
+};
+
+enum rf212_phy_rssi_enums
+{
+	RF212_RX_CRC_VALID = 1 << 7,
+	RF212_RSSI_MASK = 0x1F,
+};
+
+enum rf212_phy_cc_cca_enums
+{
+	RF212_CCA_REQUEST = 1 << 7,
+	RF212_CCA_MODE_0 = 0 << 5,
+	RF212_CCA_MODE_1 = 1 << 5,
+	RF212_CCA_MODE_2 = 2 << 5,
+	RF212_CCA_MODE_3 = 3 << 5,
+	RF212_CHANNEL_DEFAULT = 11,
+	RF212_CHANNEL_MASK = 0x1F,
+};
+
+enum rf212_irq_register_enums
+{
+	RF212_IRQ_BAT_LOW = 1 << 7,
+	RF212_IRQ_TRX_UR = 1 << 6,
+	RF212_IRQ_AMI = 1 << 5,
+	RF212_IRQ_CCA_ED_DONE = 1 << 4,
+	RF212_IRQ_TRX_END = 1 << 3,
+	RF212_IRQ_RX_START = 1 << 2,
+	RF212_IRQ_PLL_UNLOCK = 1 << 1,
+	RF212_IRQ_PLL_LOCK = 1 << 0,
+};
+
+enum rf212_batmon_enums
+{
+	RF212_BATMON_OK = 1 << 5,
+	RF212_BATMON_VHR = 1 << 4,
+	RF212_BATMON_VTH_MASK = 0x0F,
+};
+
+enum rf212_vreg_ctrl_enums
+{
+	RF212_AVREG_EXT = 1 << 7,
+	RF212_AVDD_OK = 1 << 6,
+	RF212_DVREG_EXT = 1 << 3,
+	RF212_DVDD_OK = 1 << 2,
+};
+
+enum rf212_xosc_ctrl_enums
+{
+	RF212_XTAL_MODE_OFF = 0 << 4,
+	RF212_XTAL_MODE_EXTERNAL = 4 << 4,
+	RF212_XTAL_MODE_INTERNAL = 15 << 4,
+};
+
+enum rf212_spi_command_enums
+{
+	RF212_CMD_REGISTER_READ = 0x80,
+	RF212_CMD_REGISTER_WRITE = 0xC0,
+	RF212_CMD_REGISTER_MASK = 0x3F,
+	RF212_CMD_FRAME_READ = 0x20,
+	RF212_CMD_FRAME_WRITE = 0x60,
+	RF212_CMD_SRAM_READ = 0x00,
+	RF212_CMD_SRAM_WRITE = 0x40,
+};
+
+#endif//__RF212DRIVERLAYER_H__
diff --git a/tos/chips/rf212/RF212DriverLayerC.nc b/tos/chips/rf212/RF212DriverLayerC.nc
new file mode 100644
index 00000000..2bba0b0c
--- /dev/null
+++ b/tos/chips/rf212/RF212DriverLayerC.nc
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+#include <RF212DriverLayer.h>
+
+configuration RF212DriverLayerC
+{
+	provides
+	{
+		interface RadioState;
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioCCA;
+		interface RadioPacket;
+
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+		interface PacketField<uint8_t> as PacketTimeSyncOffset;
+		interface PacketField<uint8_t> as PacketLinkQuality;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface Alarm<TRadio, tradio_size>;
+	}
+
+	uses
+	{
+		interface RF212DriverConfig as Config;
+		interface PacketTimeStamp<TRadio, uint32_t>;
+
+		interface PacketFlag as TransmitPowerFlag;
+		interface PacketFlag as RSSIFlag;
+		interface PacketFlag as TimeSyncFlag;
+		interface RadioAlarm;
+	}
+}
+
+implementation
+{
+	components RF212DriverLayerP, HplRF212C, BusyWaitMicroC, TaskletC, MainC;
+
+	RadioState = RF212DriverLayerP;
+	RadioSend = RF212DriverLayerP;
+	RadioReceive = RF212DriverLayerP;
+	RadioCCA = RF212DriverLayerP;
+	RadioPacket = RF212DriverLayerP;
+
+	LocalTimeRadio = HplRF212C;
+
+	Config = RF212DriverLayerP;
+
+	PacketTransmitPower = RF212DriverLayerP.PacketTransmitPower;
+	TransmitPowerFlag = RF212DriverLayerP.TransmitPowerFlag;
+
+	PacketRSSI = RF212DriverLayerP.PacketRSSI;
+	RSSIFlag = RF212DriverLayerP.RSSIFlag;
+
+	PacketTimeSyncOffset = RF212DriverLayerP.PacketTimeSyncOffset;
+	TimeSyncFlag = RF212DriverLayerP.TimeSyncFlag;
+
+	PacketLinkQuality = RF212DriverLayerP.PacketLinkQuality;
+	PacketTimeStamp = RF212DriverLayerP.PacketTimeStamp;
+
+	RF212DriverLayerP.LocalTime -> HplRF212C;
+
+	Alarm = HplRF212C.Alarm;
+	RadioAlarm = RF212DriverLayerP.RadioAlarm;
+
+	RF212DriverLayerP.SELN -> HplRF212C.SELN;
+	RF212DriverLayerP.SpiResource -> HplRF212C.SpiResource;
+	RF212DriverLayerP.FastSpiByte -> HplRF212C;
+
+	RF212DriverLayerP.SLP_TR -> HplRF212C.SLP_TR;
+	RF212DriverLayerP.RSTN -> HplRF212C.RSTN;
+
+	RF212DriverLayerP.IRQ -> HplRF212C.IRQ;
+	RF212DriverLayerP.Tasklet -> TaskletC;
+	RF212DriverLayerP.BusyWait -> BusyWaitMicroC;
+
+#ifdef RADIO_DEBUG
+	components DiagMsgC;
+	RF212DriverLayerP.DiagMsg -> DiagMsgC;
+#endif
+
+	MainC.SoftwareInit -> RF212DriverLayerP.SoftwareInit;
+
+	components RealMainP;
+	RealMainP.PlatformInit -> RF212DriverLayerP.PlatformInit;
+}
diff --git a/tos/chips/rf212/RF212DriverLayerP.nc b/tos/chips/rf212/RF212DriverLayerP.nc
new file mode 100644
index 00000000..898346c5
--- /dev/null
+++ b/tos/chips/rf212/RF212DriverLayerP.nc
@@ -0,0 +1,994 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RF212DriverLayer.h>
+#include <Tasklet.h>
+#include <RadioAssert.h>
+#include <TimeSyncMessageLayer.h>
+#include <RadioConfig.h>
+
+module RF212DriverLayerP
+{
+	provides
+	{
+		interface Init as PlatformInit @exactlyonce();
+		interface Init as SoftwareInit @exactlyonce();
+
+		interface RadioState;
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioCCA;
+		interface RadioPacket;
+
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+		interface PacketField<uint8_t> as PacketTimeSyncOffset;
+		interface PacketField<uint8_t> as PacketLinkQuality;
+	}
+
+	uses
+	{
+		interface GeneralIO as SELN;
+		interface Resource as SpiResource;
+
+		interface FastSpiByte;
+
+		interface GeneralIO as SLP_TR;
+		interface GeneralIO as RSTN;
+
+		interface GpioCapture as IRQ;
+
+		interface BusyWait<TMicro, uint16_t>;
+		interface LocalTime<TRadio>;
+
+		interface RF212DriverConfig as Config;
+
+		interface PacketFlag as TransmitPowerFlag;
+		interface PacketFlag as RSSIFlag;
+		interface PacketFlag as TimeSyncFlag;
+
+		interface PacketTimeStamp<TRadio, uint32_t>;
+
+		interface Tasklet;
+		interface RadioAlarm;
+
+#ifdef RADIO_DEBUG
+		interface DiagMsg;
+#endif
+	}
+}
+
+implementation
+{
+	rf212_header_t* getHeader(message_t* msg)
+	{
+		return ((void*)msg) + call Config.headerLength(msg);
+	}
+
+	void* getPayload(message_t* msg)
+	{
+		return ((void*)msg) + call RadioPacket.headerLength(msg);
+	}
+
+	rf212_metadata_t* getMeta(message_t* msg)
+	{
+		return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg);
+	}
+
+/*----------------- STATE -----------------*/
+
+	tasklet_norace uint8_t state;
+	enum
+	{
+		STATE_P_ON = 0,
+		STATE_SLEEP = 1,
+		STATE_SLEEP_2_TRX_OFF = 2,
+		STATE_TRX_OFF = 3,
+		STATE_TRX_OFF_2_RX_ON = 4,
+		STATE_RX_ON = 5,
+		STATE_BUSY_TX_2_RX_ON = 6,
+		STATE_PLL_ON_2_RX_ON = 7,
+	};
+
+	tasklet_norace uint8_t cmd;
+	enum
+	{
+		CMD_NONE = 0,			// the state machine has stopped
+		CMD_TURNOFF = 1,		// goto SLEEP state
+		CMD_STANDBY = 2,		// goto TRX_OFF state
+		CMD_TURNON = 3,			// goto RX_ON state
+		CMD_TRANSMIT = 4,		// currently transmitting a message
+		CMD_RECEIVE = 5,		// currently receiving a message
+		CMD_CCA = 6,			// performing clear chanel assesment
+		CMD_CHANNEL = 7,		// changing the channel
+		CMD_SIGNAL_DONE = 8,		// signal the end of the state transition
+		CMD_DOWNLOAD = 9,		// download the received message
+	};
+
+	norace bool radioIrq;
+
+	tasklet_norace uint8_t txPower;
+	tasklet_norace uint8_t channel;
+
+	tasklet_norace message_t* rxMsg;
+	message_t rxMsgBuffer;
+
+	uint16_t capturedTime;	// the current time when the last interrupt has occured
+
+	tasklet_norace uint8_t rssiClear;
+	tasklet_norace uint8_t rssiBusy;
+
+/*----------------- REGISTER -----------------*/
+
+	inline void writeRegister(uint8_t reg, uint8_t value)
+	{
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & RF212_CMD_REGISTER_MASK) );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF212_CMD_REGISTER_WRITE | reg);
+		call FastSpiByte.splitReadWrite(value);
+		call FastSpiByte.splitRead();
+		call SELN.set();
+	}
+
+	inline uint8_t readRegister(uint8_t reg)
+	{
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & RF212_CMD_REGISTER_MASK) );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF212_CMD_REGISTER_READ | reg);
+		call FastSpiByte.splitReadWrite(0);
+		reg = call FastSpiByte.splitRead();
+		call SELN.set();
+
+		return reg;
+	}
+
+/*----------------- ALARM -----------------*/
+
+	enum
+	{
+		SLEEP_WAKEUP_TIME = (uint16_t)(880 * RADIO_ALARM_MICROSEC),
+		CCA_REQUEST_TIME = (uint16_t)(140 * RADIO_ALARM_MICROSEC),
+
+		TX_SFD_DELAY = (uint16_t)(176 * RADIO_ALARM_MICROSEC),
+		RX_SFD_DELAY = (uint16_t)(8 * RADIO_ALARM_MICROSEC),
+	};
+
+	tasklet_async event void RadioAlarm.fired()
+	{
+		if( state == STATE_SLEEP_2_TRX_OFF )
+			state = STATE_TRX_OFF;
+		else if( cmd == CMD_CCA )
+		{
+			uint8_t cca;
+
+			RADIO_ASSERT( state == STATE_RX_ON );
+
+			cmd = CMD_NONE;
+			cca = readRegister(RF212_TRX_STATUS);
+
+			RADIO_ASSERT( (cca & RF212_TRX_STATUS_MASK) == RF212_RX_ON );
+
+			signal RadioCCA.done( (cca & RF212_CCA_DONE) ? ((cca & RF212_CCA_STATUS) ? SUCCESS : EBUSY) : FAIL );
+		}
+		else
+			RADIO_ASSERT(FALSE);
+
+		// make sure the rest of the command processing is called
+		call Tasklet.schedule();
+	}
+
+/*----------------- INIT -----------------*/
+
+	command error_t PlatformInit.init()
+	{
+		call SELN.makeOutput();
+		call SELN.set();
+		call SLP_TR.makeOutput();
+		call SLP_TR.clr();
+		call RSTN.makeOutput();
+		call RSTN.set();
+
+		rxMsg = &rxMsgBuffer;
+
+		// these are just good approximates
+		rssiClear = 0;
+		rssiBusy = 90;
+
+		return SUCCESS;
+	}
+
+	command error_t SoftwareInit.init()
+	{
+		// for powering up the radio
+		return call SpiResource.request();
+	}
+
+	void initRadio()
+	{
+		call BusyWait.wait(510);
+
+		call RSTN.clr();
+		call SLP_TR.clr();
+		call BusyWait.wait(6);
+		call RSTN.set();
+
+		writeRegister(RF212_TRX_CTRL_0, RF212_TRX_CTRL_0_VALUE);
+		writeRegister(RF212_TRX_STATE, RF212_TRX_OFF);
+
+		call BusyWait.wait(510);
+
+		writeRegister(RF212_IRQ_MASK, RF212_IRQ_TRX_UR | RF212_IRQ_PLL_LOCK | RF212_IRQ_TRX_END | RF212_IRQ_RX_START);
+		writeRegister(RF212_CCA_THRES, RF212_CCA_THRES_VALUE);
+		writeRegister(RF212_PHY_TX_PWR, RF212_DEF_RFPOWER);
+
+		txPower = RF212_DEF_RFPOWER;
+		channel = RF212_DEF_CHANNEL & RF212_CHANNEL_MASK;
+		writeRegister(RF212_PHY_CC_CCA, RF212_CCA_MODE_VALUE | channel);
+
+		call SLP_TR.set();
+		state = STATE_SLEEP;
+	}
+
+/*----------------- SPI -----------------*/
+
+	event void SpiResource.granted()
+	{
+		call SELN.makeOutput();
+		call SELN.set();
+
+		if( state == STATE_P_ON )
+		{
+			initRadio();
+			call SpiResource.release();
+		}
+		else
+			call Tasklet.schedule();
+	}
+
+	bool isSpiAcquired()
+	{
+		if( call SpiResource.isOwner() )
+			return TRUE;
+
+		if( call SpiResource.immediateRequest() == SUCCESS )
+		{
+			call SELN.makeOutput();
+			call SELN.set();
+
+			return TRUE;
+		}
+
+		call SpiResource.request();
+		return FALSE;
+	}
+
+/*----------------- CHANNEL -----------------*/
+
+	tasklet_async command uint8_t RadioState.getChannel()
+	{
+		return channel;
+	}
+
+	tasklet_async command error_t RadioState.setChannel(uint8_t c)
+	{
+		c &= RF212_CHANNEL_MASK;
+
+		if( cmd != CMD_NONE )
+			return EBUSY;
+		else if( channel == c )
+			return EALREADY;
+
+		channel = c;
+		cmd = CMD_CHANNEL;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	inline void changeChannel()
+	{
+		RADIO_ASSERT( cmd == CMD_CHANNEL );
+		RADIO_ASSERT( state == STATE_SLEEP || state == STATE_TRX_OFF || state == STATE_RX_ON );
+
+		if( isSpiAcquired() )
+		{
+			writeRegister(RF212_PHY_CC_CCA, RF212_CCA_MODE_VALUE | channel);
+
+			if( state == STATE_RX_ON )
+				state = STATE_TRX_OFF_2_RX_ON;
+			else
+				cmd = CMD_SIGNAL_DONE;
+		}
+	}
+
+/*----------------- TURN ON/OFF -----------------*/
+
+	inline void changeState()
+	{
+		if( (cmd == CMD_STANDBY || cmd == CMD_TURNON)
+			&& state == STATE_SLEEP && call RadioAlarm.isFree() )
+		{
+			call SLP_TR.clr();
+
+			call RadioAlarm.wait(SLEEP_WAKEUP_TIME);
+			state = STATE_SLEEP_2_TRX_OFF;
+		}
+		else if( cmd == CMD_TURNON && state == STATE_TRX_OFF && isSpiAcquired() )
+		{
+			RADIO_ASSERT( ! radioIrq );
+
+			readRegister(RF212_IRQ_STATUS); // clear the interrupt register
+			call IRQ.captureRisingEdge();
+
+			// setChannel was ignored in SLEEP because the SPI was not working, so do it here
+			writeRegister(RF212_PHY_CC_CCA, RF212_CCA_MODE_VALUE | channel);
+
+			writeRegister(RF212_TRX_STATE, RF212_RX_ON);
+			state = STATE_TRX_OFF_2_RX_ON;
+		}
+		else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) 
+			&& state == STATE_RX_ON && isSpiAcquired() )
+		{
+			writeRegister(RF212_TRX_STATE, RF212_FORCE_TRX_OFF);
+
+			call IRQ.disable();
+			radioIrq = FALSE;
+
+			state = STATE_TRX_OFF;
+		}
+
+		if( cmd == CMD_TURNOFF && state == STATE_TRX_OFF )
+		{
+			call SLP_TR.set();
+			state = STATE_SLEEP;
+			cmd = CMD_SIGNAL_DONE;
+		}
+		else if( cmd == CMD_STANDBY && state == STATE_TRX_OFF )
+			cmd = CMD_SIGNAL_DONE;
+	}
+
+	tasklet_async command error_t RadioState.turnOff()
+	{
+		if( cmd != CMD_NONE )
+			return EBUSY;
+		else if( state == STATE_SLEEP )
+			return EALREADY;
+
+		cmd = CMD_TURNOFF;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+	
+	tasklet_async command error_t RadioState.standby()
+	{
+		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
+			return EBUSY;
+		else if( state == STATE_TRX_OFF )
+			return EALREADY;
+
+		cmd = CMD_STANDBY;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	tasklet_async command error_t RadioState.turnOn()
+	{
+		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
+			return EBUSY;
+		else if( state == STATE_RX_ON )
+			return EALREADY;
+
+		cmd = CMD_TURNON;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioState.done() { }
+
+/*----------------- TRANSMIT -----------------*/
+
+	tasklet_async command error_t RadioSend.send(message_t* msg)
+	{
+		uint16_t time;
+		uint8_t length;
+		uint8_t* data;
+		uint8_t header;
+		uint32_t time32;
+		void* timesync;
+
+		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || radioIrq )
+			return EBUSY;
+
+		length = call PacketTransmitPower.isSet(msg) ?
+			call PacketTransmitPower.get(msg) : RF212_DEF_RFPOWER;
+
+		if( length != txPower )
+		{
+			txPower = length;
+			writeRegister(RF212_PHY_TX_PWR, txPower);
+		}
+
+		if( call Config.requiresRssiCca(msg) 
+				&& (readRegister(RF212_PHY_RSSI) & RF212_RSSI_MASK) > ((rssiClear + rssiBusy) >> 3) )
+			return EBUSY;
+
+		writeRegister(RF212_TRX_STATE, RF212_PLL_ON);
+
+		// do something useful, just to wait a little
+		time32 = call LocalTime.get();
+		timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0;
+
+		// we have missed an incoming message in this short amount of time
+		if( (readRegister(RF212_TRX_STATUS) & RF212_TRX_STATUS_MASK) != RF212_PLL_ON )
+		{
+			RADIO_ASSERT( (readRegister(RF212_TRX_STATUS) & RF212_TRX_STATUS_MASK) == RF212_BUSY_RX );
+
+			state = STATE_PLL_ON_2_RX_ON;
+			return EBUSY;
+		}
+
+		atomic
+		{
+			call SLP_TR.set();
+			time = call RadioAlarm.getNow();
+		}
+		call SLP_TR.clr();
+
+		RADIO_ASSERT( ! radioIrq );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF212_CMD_FRAME_WRITE);
+
+		data = getPayload(msg);
+		length = getHeader(msg)->length;
+
+		// length | data[0] ... data[length-3] | automatically generated FCS
+		call FastSpiByte.splitReadWrite(length);
+
+		// the FCS is atomatically generated (2 bytes)
+		length -= 2;
+
+		header = call Config.headerPreloadLength();
+		if( header > length )
+			header = length;
+
+		length -= header;
+
+		// first upload the header to gain some time
+		do {
+			call FastSpiByte.splitReadWrite(*(data++));
+		}
+		while( --header != 0 );
+
+		time32 += (int16_t)(time + TX_SFD_DELAY) - (int16_t)(time32);
+
+		if( timesync != 0 )
+			*(timesync_relative_t*)timesync = (*(timesync_absolute_t*)timesync) - time32;
+
+		while( length-- != 0 )
+			call FastSpiByte.splitReadWrite(*(data++));
+
+		// wait for the SPI transfer to finish
+		call FastSpiByte.splitRead();
+		call SELN.set();
+
+		/*
+		 * There is a very small window (~1 microsecond) when the RF212 went 
+		 * into PLL_ON state but was somehow not properly initialized because 
+		 * of an incoming message and could not go into BUSY_TX. I think the
+		 * radio can even receive a message, and generate a TRX_UR interrupt
+		 * because of concurrent access, but that message probably cannot be
+		 * recovered.
+		 *
+		 * TODO: this needs to be verified, and make sure that the chip is 
+		 * not locked up in this case.
+		 */
+
+		// go back to RX_ON state when finished
+		writeRegister(RF212_TRX_STATE, RF212_RX_ON);
+
+		if( timesync != 0 )
+			*(timesync_absolute_t*)timesync = (*(timesync_relative_t*)timesync) + time32;
+
+		call PacketTimeStamp.set(msg, time32);
+
+#ifdef RADIO_DEBUG_MESSAGES
+		if( call DiagMsg.record() )
+		{
+			length = getHeader(msg)->length;
+
+			call DiagMsg.chr('t');
+			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.int8(length);
+			call DiagMsg.hex8s(getPayload(msg), length - 2);
+			call DiagMsg.send();
+		}
+#endif
+
+		// wait for the TRX_END interrupt
+		state = STATE_BUSY_TX_2_RX_ON;
+		cmd = CMD_TRANSMIT;
+
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioSend.sendDone(error_t error) { }
+	default tasklet_async event void RadioSend.ready() { }
+
+/*----------------- CCA -----------------*/
+
+	tasklet_async command error_t RadioCCA.request()
+	{
+		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || ! call RadioAlarm.isFree() )
+			return EBUSY;
+
+		// see Errata B7 of the datasheet
+		// writeRegister(RF212_TRX_STATE, RF212_PLL_ON);
+		// writeRegister(RF212_TRX_STATE, RF212_RX_ON);
+
+		writeRegister(RF212_PHY_CC_CCA, RF212_CCA_REQUEST | RF212_CCA_MODE_VALUE | channel);
+		call RadioAlarm.wait(CCA_REQUEST_TIME);
+		cmd = CMD_CCA;
+		
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioCCA.done(error_t error) { }
+
+/*----------------- RECEIVE -----------------*/
+
+	inline void downloadMessage()
+	{
+		uint8_t length;
+		bool crcValid = FALSE;
+
+		call SELN.clr();
+		call FastSpiByte.write(RF212_CMD_FRAME_READ);
+
+		// read the length byte
+		length = call FastSpiByte.write(0);
+
+		// if correct length
+		if( length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2 )
+		{
+			uint8_t read;
+			uint8_t* data;
+
+			// initiate the reading
+			call FastSpiByte.splitWrite(0);
+
+			data = getPayload(rxMsg);
+			getHeader(rxMsg)->length = length;
+
+			// we do not store the CRC field
+			length -= 2;
+
+			read = call Config.headerPreloadLength();
+			if( length < read )
+				read = length;
+
+			length -= read;
+
+			do {
+				*(data++) = call FastSpiByte.splitReadWrite(0);
+			}
+			while( --read != 0  );
+
+			if( signal RadioReceive.header(rxMsg) )
+			{
+				while( length-- != 0 )
+					*(data++) = call FastSpiByte.splitReadWrite(0);
+
+				call FastSpiByte.splitReadWrite(0);	// two CRC bytes
+				call FastSpiByte.splitReadWrite(0);
+
+				call PacketLinkQuality.set(rxMsg, call FastSpiByte.splitReadWrite(0));
+				call FastSpiByte.splitReadWrite(0);	// ED
+				crcValid = call FastSpiByte.splitRead() & RF212_RX_CRC_VALID;	// RX_STATUS
+			}
+		}
+
+		call SELN.set();
+		state = STATE_RX_ON;
+
+#ifdef RADIO_DEBUG_MESSAGES
+		if( call DiagMsg.record() )
+		{
+			length = getHeader(rxMsg)->length;
+
+			call DiagMsg.chr('r');
+			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.int8(crcValid ? length : -length);
+			call DiagMsg.hex8s(getPayload(rxMsg), length - 2);
+			call DiagMsg.int8(call PacketRSSI.isSet(rxMsg) ? call PacketRSSI.get(rxMsg) : -1);
+			call DiagMsg.uint8(call PacketLinkQuality.isSet(rxMsg) ? call PacketLinkQuality.get(rxMsg) : 0);
+			call DiagMsg.send();
+		}
+#endif
+		
+		cmd = CMD_NONE;
+
+		// signal only if it has passed the CRC check
+		if( crcValid )
+			rxMsg = signal RadioReceive.receive(rxMsg);
+	}
+
+/*----------------- IRQ -----------------*/
+
+	async event void IRQ.captured(uint16_t time)
+	{
+		RADIO_ASSERT( ! radioIrq );
+
+		atomic
+		{
+			capturedTime = time;
+			radioIrq = TRUE;
+		}
+
+		call Tasklet.schedule();
+	}
+
+	void serviceRadio()
+	{
+		if( isSpiAcquired() )
+		{
+			uint16_t time;
+			uint32_t time32;
+			uint8_t irq;
+			uint8_t temp;
+			
+			atomic time = capturedTime;
+			radioIrq = FALSE;
+			irq = readRegister(RF212_IRQ_STATUS);
+
+#ifdef RADIO_DEBUG
+			// TODO: handle this interrupt
+			if( irq & RF212_IRQ_TRX_UR )
+			{
+				if( call DiagMsg.record() )
+				{
+					call DiagMsg.str("assert ur");
+					call DiagMsg.uint16(call RadioAlarm.getNow());
+					call DiagMsg.hex8(readRegister(RF212_TRX_STATUS));
+					call DiagMsg.hex8(readRegister(RF212_TRX_STATE));
+					call DiagMsg.hex8(irq);
+					call DiagMsg.uint8(state);
+					call DiagMsg.uint8(cmd);
+					call DiagMsg.send();
+				}
+			}
+#endif
+
+#ifdef RF212_RSSI_ENERGY
+			if( irq & RF212_IRQ_TRX_END )
+			{
+				if( irq == RF212_IRQ_TRX_END || 
+					(irq == (RF212_IRQ_RX_START | RF212_IRQ_TRX_END) && cmd == CMD_NONE) )
+					call PacketRSSI.set(rxMsg, readRegister(RF212_PHY_ED_LEVEL));
+				else
+					call PacketRSSI.clear(rxMsg);
+			}
+#endif
+
+			if( irq & RF212_IRQ_PLL_LOCK )
+			{
+				if( cmd == CMD_TURNON || cmd == CMD_CHANNEL )
+				{
+					RADIO_ASSERT( state == STATE_TRX_OFF_2_RX_ON );
+
+					state = STATE_RX_ON;
+					cmd = CMD_SIGNAL_DONE;
+				}
+				else if( cmd == CMD_TRANSMIT )
+				{
+					RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON );
+				}
+				else
+					RADIO_ASSERT(FALSE);
+			}
+
+			if( irq & RF212_IRQ_RX_START )
+			{
+				if( cmd == CMD_CCA )
+				{
+					signal RadioCCA.done(FAIL);
+					cmd = CMD_NONE;
+				}
+
+				if( cmd == CMD_NONE )
+				{
+					RADIO_ASSERT( state == STATE_RX_ON || state == STATE_PLL_ON_2_RX_ON );
+
+					// the most likely place for busy channel, with no TRX_END interrupt
+					if( irq == RF212_IRQ_RX_START )
+					{
+						temp = readRegister(RF212_PHY_RSSI) & RF212_RSSI_MASK;
+						rssiBusy += temp - (rssiBusy >> 2);
+#ifndef RF212_RSSI_ENERGY
+						call PacketRSSI.set(rxMsg, temp);
+					}
+					else
+					{
+						call PacketRSSI.clear(rxMsg);
+#endif
+					}
+
+					/*
+					 * The timestamp corresponds to the first event which could not
+					 * have been a PLL_LOCK because then cmd != CMD_NONE, so we must
+					 * have received a message (and could also have received the 
+					 * TRX_END interrupt in the mean time, but that is fine. Also,
+					 * we could not be after a transmission, because then cmd = 
+					 * CMD_TRANSMIT.
+					 */
+					if( irq == RF212_IRQ_RX_START ) // just to be cautious
+					{
+						time32 = call LocalTime.get();
+						time32 += (int16_t)(time - RX_SFD_DELAY) - (int16_t)(time32);
+						call PacketTimeStamp.set(rxMsg, time32);
+					}
+					else
+						call PacketTimeStamp.clear(rxMsg);
+
+					cmd = CMD_RECEIVE;
+				}
+				else
+					RADIO_ASSERT( cmd == CMD_TURNOFF );
+			}
+
+			if( irq & RF212_IRQ_TRX_END )
+			{
+				if( cmd == CMD_TRANSMIT )
+				{
+					RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON );
+
+					state = STATE_RX_ON;
+					cmd = CMD_NONE;
+					signal RadioSend.sendDone(SUCCESS);
+
+					// TODO: we could have missed a received message
+					RADIO_ASSERT( ! (irq & RF212_IRQ_RX_START) );
+				}
+				else if( cmd == CMD_RECEIVE )
+				{
+					RADIO_ASSERT( state == STATE_RX_ON || state == STATE_PLL_ON_2_RX_ON );
+
+					if( state == STATE_PLL_ON_2_RX_ON )
+					{
+						RADIO_ASSERT( (readRegister(RF212_TRX_STATUS) & RF212_TRX_STATUS_MASK) == RF212_PLL_ON );
+
+						writeRegister(RF212_TRX_STATE, RF212_RX_ON);
+						state = STATE_RX_ON;
+					}
+					else
+					{
+						// the most likely place for clear channel (hope to avoid acks)
+						rssiClear += (readRegister(RF212_PHY_RSSI) & RF212_RSSI_MASK) - (rssiClear >> 2);
+					}
+
+					cmd = CMD_DOWNLOAD;
+				}
+				else
+					RADIO_ASSERT(FALSE);
+			}
+		}
+	}
+
+	default tasklet_async event bool RadioReceive.header(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	default tasklet_async event message_t* RadioReceive.receive(message_t* msg)
+	{
+		return msg;
+	}
+
+/*----------------- TASKLET -----------------*/
+
+	task void releaseSpi()
+	{
+		call SpiResource.release();
+	}
+
+	tasklet_async event void Tasklet.run()
+	{
+		if( radioIrq )
+			serviceRadio();
+
+		if( cmd != CMD_NONE )
+		{
+			if( cmd == CMD_DOWNLOAD )
+				downloadMessage();
+			else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON )
+				changeState();
+			else if( cmd == CMD_CHANNEL )
+				changeChannel();
+			
+			if( cmd == CMD_SIGNAL_DONE )
+			{
+				cmd = CMD_NONE;
+				signal RadioState.done();
+			}
+		}
+
+		if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq )
+			signal RadioSend.ready();
+
+		if( cmd == CMD_NONE )
+			post releaseSpi();
+	}
+
+/*----------------- RadioPacket -----------------*/
+	
+	async command uint8_t RadioPacket.headerLength(message_t* msg)
+	{
+		return call Config.headerLength(msg) + sizeof(rf212_header_t);
+	}
+
+	async command uint8_t RadioPacket.payloadLength(message_t* msg)
+	{
+		return getHeader(msg)->length - 2;
+	}
+
+	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		RADIO_ASSERT( 1 <= length && length <= 125 );
+		RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) );
+
+		// we add the length of the CRC, which is automatically generated
+		getHeader(msg)->length = length + 2;
+	}
+
+	async command uint8_t RadioPacket.maxPayloadLength()
+	{
+		RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(rf212_header_t) <= 125 );
+
+		return call Config.maxPayloadLength() - sizeof(rf212_header_t);
+	}
+
+	async command uint8_t RadioPacket.metadataLength(message_t* msg)
+	{
+		return call Config.metadataLength(msg) + sizeof(rf212_metadata_t);
+	}
+
+	async command void RadioPacket.clear(message_t* msg)
+	{
+		// all flags are automatically cleared
+	}
+
+/*----------------- PacketTransmitPower -----------------*/
+
+	async command bool PacketTransmitPower.isSet(message_t* msg)
+	{
+		return call TransmitPowerFlag.get(msg);
+	}
+
+	async command uint8_t PacketTransmitPower.get(message_t* msg)
+	{
+		return getMeta(msg)->power;
+	}
+
+	async command void PacketTransmitPower.clear(message_t* msg)
+	{
+		call TransmitPowerFlag.clear(msg);
+	}
+
+	async command void PacketTransmitPower.set(message_t* msg, uint8_t value)
+	{
+		call TransmitPowerFlag.set(msg);
+		getMeta(msg)->power = value;
+	}
+
+/*----------------- PacketRSSI -----------------*/
+
+	async command bool PacketRSSI.isSet(message_t* msg)
+	{
+		return call RSSIFlag.get(msg);
+	}
+
+	async command uint8_t PacketRSSI.get(message_t* msg)
+	{
+		return getMeta(msg)->rssi;
+	}
+
+	async command void PacketRSSI.clear(message_t* msg)
+	{
+		call RSSIFlag.clear(msg);
+	}
+
+	async command void PacketRSSI.set(message_t* msg, uint8_t value)
+	{
+		// just to be safe if the user fails to clear the packet
+		call TransmitPowerFlag.clear(msg);
+
+		call RSSIFlag.set(msg);
+		getMeta(msg)->rssi = value;
+	}
+
+/*----------------- PacketTimeSyncOffset -----------------*/
+
+	async command bool PacketTimeSyncOffset.isSet(message_t* msg)
+	{
+		return call TimeSyncFlag.get(msg);
+	}
+
+	async command uint8_t PacketTimeSyncOffset.get(message_t* msg)
+	{
+		return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t);
+	}
+
+	async command void PacketTimeSyncOffset.clear(message_t* msg)
+	{
+		call TimeSyncFlag.clear(msg);
+	}
+
+	async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value)
+	{
+		// we do not store the value, the time sync field is always the last 4 bytes
+		RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value );
+
+		call TimeSyncFlag.set(msg);
+	}
+
+/*----------------- PacketLinkQuality -----------------*/
+
+	async command bool PacketLinkQuality.isSet(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	async command uint8_t PacketLinkQuality.get(message_t* msg)
+	{
+		return getMeta(msg)->lqi;
+	}
+
+	async command void PacketLinkQuality.clear(message_t* msg)
+	{
+	}
+
+	async command void PacketLinkQuality.set(message_t* msg, uint8_t value)
+	{
+		getMeta(msg)->lqi = value;
+	}
+}
diff --git a/tos/chips/rf212/RF212Ieee154MessageC.nc b/tos/chips/rf212/RF212Ieee154MessageC.nc
new file mode 100644
index 00000000..4b11764d
--- /dev/null
+++ b/tos/chips/rf212/RF212Ieee154MessageC.nc
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+#ifdef TFRAMES_ENABLED
+#error "You cannot use Ieee154MessageC with TFRAMES_ENABLED defined"
+#endif
+
+configuration RF212Ieee154MessageC
+{
+	provides 
+	{
+		interface SplitControl;
+
+		interface Ieee154Send;
+		interface Receive as Ieee154Receive;
+		interface SendNotifier;
+
+		interface Ieee154Packet;
+		interface Packet;
+		interface Resource as SendResource[uint8_t clint];
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+		interface PacketLink;
+
+		interface RadioChannel;
+
+		interface PacketField<uint8_t> as PacketLinkQuality;
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	components RF212RadioC;
+
+	SplitControl = RF212RadioC;
+
+	Ieee154Send = RF212RadioC.Ieee154Send;
+	Ieee154Receive = RF212RadioC.Ieee154Receive;
+	SendNotifier = RF212RadioC.Ieee154Notifier;
+
+	Packet = RF212RadioC.PacketForIeee154Message;
+	Ieee154Packet = RF212RadioC;
+	SendResource = RF212RadioC;
+
+	PacketAcknowledgements = RF212RadioC;
+	LowPowerListening = RF212RadioC;
+	PacketLink = RF212RadioC;
+
+	RadioChannel = RF212RadioC;
+
+	PacketLinkQuality = RF212RadioC.PacketLinkQuality;
+	PacketTransmitPower = RF212RadioC.PacketTransmitPower;
+	PacketRSSI = RF212RadioC.PacketRSSI;
+
+	LocalTimeRadio = RF212RadioC;
+	PacketTimeStampMilli = RF212RadioC;
+	PacketTimeStampRadio = RF212RadioC;
+}
diff --git a/tos/chips/rf212/RF212Radio.h b/tos/chips/rf212/RF212Radio.h
new file mode 100644
index 00000000..759478c2
--- /dev/null
+++ b/tos/chips/rf212/RF212Radio.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __RF212RADIO_H__
+#define __RF212RADIO_H__
+
+#include <RadioConfig.h>
+#include <TinyosNetworkLayer.h>
+#include <Ieee154PacketLayer.h>
+#include <ActiveMessageLayer.h>
+#include <MetadataFlagsLayer.h>
+#include <RF212DriverLayer.h>
+#include <TimeStampingLayer.h>
+#include <LowPowerListeningLayer.h>
+#include <PacketLinkLayer.h>
+
+typedef nx_struct rf212packet_header_t
+{
+	rf212_header_t rf212;
+	ieee154_header_t ieee154;
+#ifndef TFRAMES_ENABLED
+	network_header_t network;
+#endif
+#ifndef IEEE154FRAMES_ENABLED
+	activemessage_header_t am;
+#endif
+} rf212packet_header_t;
+
+typedef nx_struct rf212packet_footer_t
+{
+	// the time stamp is not recorded here, time stamped messaged cannot have max length
+} rf212packet_footer_t;
+
+typedef struct rf212packet_metadata_t
+{
+#ifdef LOW_POWER_LISTENING
+	lpl_metadata_t lpl;
+#endif
+#ifdef PACKET_LINK
+	link_metadata_t link;
+#endif
+	timestamp_metadata_t timestamp;
+	flags_metadata_t flags;
+	rf212_metadata_t rf212;
+} rf212packet_metadata_t;
+
+#endif//__RF212RADIO_H__
diff --git a/tos/chips/rf212/RF212RadioC.nc b/tos/chips/rf212/RF212RadioC.nc
new file mode 100644
index 00000000..e5d45b71
--- /dev/null
+++ b/tos/chips/rf212/RF212RadioC.nc
@@ -0,0 +1,294 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+configuration RF212RadioC
+{
+	provides 
+	{
+		interface SplitControl;
+
+#ifndef IEEE154FRAMES_ENABLED
+		interface AMSend[am_id_t id];
+		interface Receive[am_id_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface SendNotifier[am_id_t id];
+
+		// for TOSThreads
+		interface Receive as ReceiveDefault[am_id_t id];
+		interface Receive as SnoopDefault[am_id_t id];
+
+		interface AMPacket;
+		interface Packet as PacketForActiveMessage;
+#endif
+
+#ifndef TFRAMES_ENABLED
+		interface Ieee154Send;
+		interface Receive as Ieee154Receive;
+		interface SendNotifier as Ieee154Notifier;
+
+		interface Resource as SendResource[uint8_t clint];
+
+		interface Ieee154Packet;
+		interface Packet as PacketForIeee154Message;
+#endif
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+
+#ifdef PACKET_LINK
+		interface PacketLink;
+#endif
+
+		interface RadioChannel;
+
+		interface PacketField<uint8_t> as PacketLinkQuality;
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	#define UQ_METADATA_FLAGS	"UQ_RF212_METADATA_FLAGS"
+	#define UQ_RADIO_ALARM		"UQ_RF212_RADIO_ALARM"
+
+// -------- RF212 RadioP
+
+	components RF212RadioP;
+
+#ifdef RADIO_DEBUG
+	components AssertC;
+#endif
+
+	RF212RadioP.Ieee154PacketLayer -> Ieee154PacketLayerC;
+	RF212RadioP.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+	RF212RadioP.PacketTimeStamp -> TimeStampingLayerC;
+	RF212RadioP.RF212Packet -> RF212DriverLayerC;
+
+// -------- RadioAlarm
+
+	components new RadioAlarmC();
+	RadioAlarmC.Alarm -> RF212DriverLayerC;
+
+// -------- Active Message
+
+#ifndef IEEE154FRAMES_ENABLED
+	components new ActiveMessageLayerC();
+	ActiveMessageLayerC.Config -> RF212RadioP;
+	ActiveMessageLayerC.SubSend -> AutoResourceAcquireLayerC;
+	ActiveMessageLayerC.SubReceive -> TinyosNetworkLayerC.TinyosReceive;
+	ActiveMessageLayerC.SubPacket -> TinyosNetworkLayerC.TinyosPacket;
+
+	AMSend = ActiveMessageLayerC;
+	Receive = ActiveMessageLayerC.Receive;
+	Snoop = ActiveMessageLayerC.Snoop;
+	SendNotifier = ActiveMessageLayerC;
+	AMPacket = ActiveMessageLayerC;
+	PacketForActiveMessage = ActiveMessageLayerC;
+
+	ReceiveDefault = ActiveMessageLayerC.ReceiveDefault;
+	SnoopDefault = ActiveMessageLayerC.SnoopDefault;
+#endif
+
+// -------- Automatic RadioSend Resource
+
+#ifndef IEEE154FRAMES_ENABLED
+#ifndef TFRAMES_ENABLED
+	components new AutoResourceAcquireLayerC();
+	AutoResourceAcquireLayerC.Resource -> SendResourceC.Resource[unique(RADIO_SEND_RESOURCE)];
+#else
+	components new DummyLayerC() as AutoResourceAcquireLayerC;
+#endif
+	AutoResourceAcquireLayerC -> TinyosNetworkLayerC.TinyosSend;
+#endif
+
+// -------- RadioSend Resource
+
+#ifndef TFRAMES_ENABLED
+	components new SimpleFcfsArbiterC(RADIO_SEND_RESOURCE) as SendResourceC;
+	SendResource = SendResourceC;
+
+// -------- Ieee154 Message
+
+	components new Ieee154MessageLayerC();
+	Ieee154MessageLayerC.Ieee154PacketLayer -> Ieee154PacketLayerC;
+	Ieee154MessageLayerC.SubSend -> TinyosNetworkLayerC.Ieee154Send;
+	Ieee154MessageLayerC.SubReceive -> TinyosNetworkLayerC.Ieee154Receive;
+	Ieee154MessageLayerC.RadioPacket -> TinyosNetworkLayerC.Ieee154Packet;
+
+	Ieee154Send = Ieee154MessageLayerC;
+	Ieee154Receive = Ieee154MessageLayerC;
+	Ieee154Notifier = Ieee154MessageLayerC;
+	Ieee154Packet = Ieee154PacketLayerC;
+	PacketForIeee154Message = Ieee154MessageLayerC;
+#endif
+
+// -------- Tinyos Network
+
+	components new TinyosNetworkLayerC();
+
+	TinyosNetworkLayerC.SubSend -> UniqueLayerC;
+	TinyosNetworkLayerC.SubReceive -> LowPowerListeningLayerC;
+	TinyosNetworkLayerC.SubPacket -> Ieee154PacketLayerC;
+
+// -------- IEEE 802.15.4 Packet
+
+	components new Ieee154PacketLayerC();
+	Ieee154PacketLayerC.SubPacket -> LowPowerListeningLayerC;
+
+// -------- UniqueLayer Send part (wired twice)
+
+	components new UniqueLayerC();
+	UniqueLayerC.Config -> RF212RadioP;
+	UniqueLayerC.SubSend -> LowPowerListeningLayerC;
+
+// -------- Low Power Listening 
+
+#ifdef LOW_POWER_LISTENING
+	#warning "*** USING LOW POWER LISTENING LAYER"
+	components new LowPowerListeningLayerC();
+	LowPowerListeningLayerC.Config -> RF212RadioP;
+	LowPowerListeningLayerC.PacketAcknowledgements -> SoftwareAckLayerC;
+#else	
+	components new LowPowerListeningDummyC() as LowPowerListeningLayerC;
+#endif
+	LowPowerListeningLayerC.SubControl -> MessageBufferLayerC;
+	LowPowerListeningLayerC.SubSend -> PacketLinkLayerC;
+	LowPowerListeningLayerC.SubReceive -> PacketLinkLayerC;
+	LowPowerListeningLayerC.SubPacket -> PacketLinkLayerC;
+	SplitControl = LowPowerListeningLayerC;
+	LowPowerListening = LowPowerListeningLayerC;
+
+// -------- Packet Link
+
+#ifdef PACKET_LINK
+	components new PacketLinkLayerC();
+	PacketLink = PacketLinkLayerC;
+	PacketLinkLayerC.PacketAcknowledgements -> SoftwareAckLayerC;
+#else
+	components new DummyLayerC() as PacketLinkLayerC;
+#endif
+	PacketLinkLayerC -> MessageBufferLayerC.Send;
+	PacketLinkLayerC -> MessageBufferLayerC.Receive;
+	PacketLinkLayerC -> TimeStampingLayerC.RadioPacket;
+
+// -------- MessageBuffer
+
+	components new MessageBufferLayerC();
+	MessageBufferLayerC.RadioSend -> TrafficMonitorLayerC;
+	MessageBufferLayerC.RadioReceive -> UniqueLayerC;
+	MessageBufferLayerC.RadioState -> TrafficMonitorLayerC;
+	RadioChannel = MessageBufferLayerC;
+
+// -------- UniqueLayer receive part (wired twice)
+
+	UniqueLayerC.SubReceive -> TrafficMonitorLayerC;
+
+// -------- Traffic Monitor
+
+#ifdef TRAFFIC_MONITOR
+	components new TrafficMonitorLayerC();
+#else
+	components new DummyLayerC() as TrafficMonitorLayerC;
+#endif
+	TrafficMonitorLayerC.Config -> RF212RadioP;
+	TrafficMonitorLayerC -> CollisionAvoidanceLayerC.RadioSend;
+	TrafficMonitorLayerC -> CollisionAvoidanceLayerC.RadioReceive;
+	TrafficMonitorLayerC -> RF212DriverLayerC.RadioState;
+
+// -------- CollisionAvoidance
+
+#ifdef SLOTTED_MAC
+	components new SlottedCollisionLayerC() as CollisionAvoidanceLayerC;
+#else
+	components new RandomCollisionLayerC() as CollisionAvoidanceLayerC;
+#endif
+	CollisionAvoidanceLayerC.Config -> RF212RadioP;
+	CollisionAvoidanceLayerC.SubSend -> SoftwareAckLayerC;
+	CollisionAvoidanceLayerC.SubReceive -> SoftwareAckLayerC;
+	CollisionAvoidanceLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+
+// -------- SoftwareAcknowledgement
+
+	components new SoftwareAckLayerC();
+	SoftwareAckLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	SoftwareAckLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+	PacketAcknowledgements = SoftwareAckLayerC;
+	SoftwareAckLayerC.Config -> RF212RadioP;
+	SoftwareAckLayerC.SubSend -> CsmaLayerC;
+	SoftwareAckLayerC.SubReceive -> CsmaLayerC;
+
+// -------- Carrier Sense
+
+	components new DummyLayerC() as CsmaLayerC;
+	CsmaLayerC.Config -> RF212RadioP;
+	CsmaLayerC -> RF212DriverLayerC.RadioSend;
+	CsmaLayerC -> RF212DriverLayerC.RadioReceive;
+	CsmaLayerC -> RF212DriverLayerC.RadioCCA;
+
+// -------- TimeStamping
+
+	components new TimeStampingLayerC();
+	TimeStampingLayerC.LocalTimeRadio -> RF212DriverLayerC;
+	TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC;
+	PacketTimeStampRadio = TimeStampingLayerC;
+	PacketTimeStampMilli = TimeStampingLayerC;
+	TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+
+// -------- MetadataFlags
+
+	components new MetadataFlagsLayerC();
+	MetadataFlagsLayerC.SubPacket -> RF212DriverLayerC;
+
+// -------- RF212 Driver
+
+	components RF212DriverLayerC;
+	RF212DriverLayerC.Config -> RF212RadioP;
+	RF212DriverLayerC.PacketTimeStamp -> TimeStampingLayerC;
+	PacketTransmitPower = RF212DriverLayerC.PacketTransmitPower;
+	PacketLinkQuality = RF212DriverLayerC.PacketLinkQuality;
+	PacketRSSI = RF212DriverLayerC.PacketRSSI;
+	LocalTimeRadio = RF212DriverLayerC;
+
+	RF212DriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	RF212DriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	RF212DriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	RF212DriverLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+}
diff --git a/tos/chips/rf212/RF212RadioP.nc b/tos/chips/rf212/RF212RadioP.nc
new file mode 100644
index 00000000..5ee56e56
--- /dev/null
+++ b/tos/chips/rf212/RF212RadioP.nc
@@ -0,0 +1,370 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RF212Radio.h>
+#include <RadioConfig.h>
+#include <Tasklet.h>
+
+module RF212RadioP
+{
+	provides
+	{
+		interface RF212DriverConfig;
+		interface SoftwareAckConfig;
+		interface UniqueConfig;
+		interface CsmaConfig;
+		interface TrafficMonitorConfig;
+		interface RandomCollisionConfig;
+		interface SlottedCollisionConfig;
+		interface ActiveMessageConfig;
+		interface DummyConfig;
+
+#ifdef LOW_POWER_LISTENING
+		interface LowPowerListeningConfig;
+#endif
+	}
+
+	uses
+	{
+		interface Ieee154PacketLayer;
+		interface RadioAlarm;
+		interface RadioPacket as RF212Packet;
+
+		interface PacketTimeStamp<TRadio, uint32_t>;
+	}
+}
+
+implementation
+{
+
+/*----------------- RF212DriverConfig -----------------*/
+
+	async command uint8_t RF212DriverConfig.headerLength(message_t* msg)
+	{
+		return offsetof(message_t, data) - sizeof(rf212packet_header_t);
+	}
+
+	async command uint8_t RF212DriverConfig.maxPayloadLength()
+	{
+		return sizeof(rf212packet_header_t) + TOSH_DATA_LENGTH;
+	}
+
+	async command uint8_t RF212DriverConfig.metadataLength(message_t* msg)
+	{
+		return 0;
+	}
+
+	async command uint8_t RF212DriverConfig.headerPreloadLength()
+	{
+		// we need the fcf, dsn, destpan and dest
+		return 7;
+	}
+
+	async command bool RF212DriverConfig.requiresRssiCca(message_t* msg)
+	{
+		return call Ieee154PacketLayer.isDataFrame(msg);
+	}
+
+/*----------------- SoftwareAckConfig -----------------*/
+
+	async command bool SoftwareAckConfig.requiresAckWait(message_t* msg)
+	{
+		return call Ieee154PacketLayer.requiresAckWait(msg);
+	}
+
+	async command bool SoftwareAckConfig.isAckPacket(message_t* msg)
+	{
+		return call Ieee154PacketLayer.isAckFrame(msg);
+	}
+
+	async command bool SoftwareAckConfig.verifyAckPacket(message_t* data, message_t* ack)
+	{
+		return call Ieee154PacketLayer.verifyAckReply(data, ack);
+	}
+
+	async command void SoftwareAckConfig.setAckRequired(message_t* msg, bool ack)
+	{
+		call Ieee154PacketLayer.setAckRequired(msg, ack);
+	}
+
+	async command bool SoftwareAckConfig.requiresAckReply(message_t* msg)
+	{
+		return call Ieee154PacketLayer.requiresAckReply(msg);
+	}
+
+	async command void SoftwareAckConfig.createAckPacket(message_t* data, message_t* ack)
+	{
+		call Ieee154PacketLayer.createAckReply(data, ack);
+	}
+
+#ifndef SOFTWAREACK_TIMEOUT
+#define SOFTWAREACK_TIMEOUT	20000
+#endif
+
+	async command uint16_t SoftwareAckConfig.getAckTimeout()
+	{
+		return (uint16_t)(SOFTWAREACK_TIMEOUT * RADIO_ALARM_MICROSEC);
+	}
+
+	tasklet_async command void SoftwareAckConfig.reportChannelError()
+	{
+#ifdef TRAFFIC_MONITOR
+		signal TrafficMonitorConfig.channelError();
+#endif
+	}
+
+/*----------------- UniqueConfig -----------------*/
+
+	async command uint8_t UniqueConfig.getSequenceNumber(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDSN(msg);
+	}
+
+	async command void UniqueConfig.setSequenceNumber(message_t* msg, uint8_t dsn)
+	{
+		call Ieee154PacketLayer.setDSN(msg, dsn);
+	}
+
+	async command am_addr_t UniqueConfig.getSender(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getSrcAddr(msg);
+	}
+
+	tasklet_async command void UniqueConfig.reportChannelError()
+	{
+#ifdef TRAFFIC_MONITOR
+		signal TrafficMonitorConfig.channelError();
+#endif
+	}
+
+/*----------------- ActiveMessageConfig -----------------*/
+
+	command am_addr_t ActiveMessageConfig.destination(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDestAddr(msg);
+	}
+
+	command void ActiveMessageConfig.setDestination(message_t* msg, am_addr_t addr)
+	{
+		call Ieee154PacketLayer.setDestAddr(msg, addr);
+	}
+
+	command am_addr_t ActiveMessageConfig.source(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getSrcAddr(msg);
+	}
+
+	command void ActiveMessageConfig.setSource(message_t* msg, am_addr_t addr)
+	{
+		call Ieee154PacketLayer.setSrcAddr(msg, addr);
+	}
+
+	command am_group_t ActiveMessageConfig.group(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDestPan(msg);
+	}
+
+	command void ActiveMessageConfig.setGroup(message_t* msg, am_group_t grp)
+	{
+		call Ieee154PacketLayer.setDestPan(msg, grp);
+	}
+
+	command error_t ActiveMessageConfig.checkFrame(message_t* msg)
+	{
+		if( ! call Ieee154PacketLayer.isDataFrame(msg) )
+			call Ieee154PacketLayer.createDataFrame(msg);
+
+		return SUCCESS;
+	}
+
+/*----------------- CsmaConfig -----------------*/
+
+	async command bool CsmaConfig.requiresSoftwareCCA(message_t* msg)
+	{
+		return call Ieee154PacketLayer.isDataFrame(msg);
+	}
+
+/*----------------- TrafficMonitorConfig -----------------*/
+
+	enum
+	{
+		TRAFFIC_UPDATE_PERIOD = 100,	// in milliseconds
+		TRAFFIC_MAX_BYTES = (uint16_t)(TRAFFIC_UPDATE_PERIOD * 1000UL / 32),	// 3125
+	};
+
+	async command uint16_t TrafficMonitorConfig.getUpdatePeriod()
+	{
+		return TRAFFIC_UPDATE_PERIOD;
+	}
+
+	async command uint16_t TrafficMonitorConfig.getChannelTime(message_t* msg)
+	{
+		/* We count in bytes, one byte is 32 microsecond. We are conservative here.
+		 *
+		 * pure airtime: preable (4 bytes), SFD (1 byte), length (1 byte), payload + CRC (len bytes)
+		 * frame separation: 5-10 bytes
+		 * ack required: 8-16 byte separation, 11 bytes airtime, 5-10 bytes separation
+		 */
+
+		uint8_t len = call RF212Packet.payloadLength(msg);
+		return call Ieee154PacketLayer.getAckRequired(msg) ? len + 6 + 16 + 11 + 10 : len + 6 + 10;
+	}
+
+	async command am_addr_t TrafficMonitorConfig.getSender(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getSrcAddr(msg);
+	}
+
+/*----------------- RandomCollisionConfig -----------------*/
+
+	/*
+	 * We try to use the same values as in CC2420
+	 *
+	 * CC2420_MIN_BACKOFF = 10 jiffies = 320 microsec
+	 * CC2420_BACKOFF_PERIOD = 10 jiffies
+	 * initial backoff = 0x1F * CC2420_BACKOFF_PERIOD = 310 jiffies = 9920 microsec
+	 * congestion backoff = 0x7 * CC2420_BACKOFF_PERIOD = 70 jiffies = 2240 microsec
+	 */
+
+#ifndef LOW_POWER_LISTENING
+
+	async command uint16_t RandomCollisionConfig.getMinimumBackoff()
+	{
+		return (uint16_t)(320 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg)
+	{
+		return (uint16_t)(9920 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg)
+	{
+		return (uint16_t)(2240 * RADIO_ALARM_MICROSEC);
+	}
+
+#endif
+
+	async command uint16_t RandomCollisionConfig.getTransmitBarrier(message_t* msg)
+	{
+		uint16_t time;
+
+		// TODO: maybe we should use the embedded timestamp of the message
+		time = call RadioAlarm.getNow();
+
+		// estimated response time (download the message, etc) is 5-8 bytes
+		if( call Ieee154PacketLayer.requiresAckReply(msg) )
+			time += (uint16_t)(32 * (-5 + 16 + 11 + 5) * RADIO_ALARM_MICROSEC);
+		else
+			time += (uint16_t)(32 * (-5 + 5) * RADIO_ALARM_MICROSEC);
+
+		return time;
+	}
+
+	tasklet_async event void RadioAlarm.fired()
+	{
+	}
+
+/*----------------- SlottedCollisionConfig -----------------*/
+
+	async command uint16_t SlottedCollisionConfig.getInitialDelay()
+	{
+		return 300;
+	}
+
+	async command uint8_t SlottedCollisionConfig.getScheduleExponent()
+	{
+		return 1 + RADIO_ALARM_MILLI_EXP;
+	}
+
+	async command uint16_t SlottedCollisionConfig.getTransmitTime(message_t* msg)
+	{
+		// TODO: check if the timestamp is correct
+		return call PacketTimeStamp.timestamp(msg);
+	}
+
+	async command uint16_t SlottedCollisionConfig.getCollisionWindowStart(message_t* msg)
+	{
+		// the preamble (4 bytes), SFD (1 byte), plus two extra for safety
+		return (call PacketTimeStamp.timestamp(msg)) - (uint16_t)(7 * 32 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t SlottedCollisionConfig.getCollisionWindowLength(message_t* msg)
+	{
+		return (uint16_t)(2 * 7 * 32 * RADIO_ALARM_MICROSEC);
+	}
+
+/*----------------- Dummy -----------------*/
+
+	async command void DummyConfig.nothing()
+	{
+	}
+
+/*----------------- LowPowerListening -----------------*/
+
+#ifdef LOW_POWER_LISTENING
+
+	command bool LowPowerListeningConfig.needsAutoAckRequest(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDestAddr(msg) != TOS_BCAST_ADDR;
+	}
+
+	command bool LowPowerListeningConfig.ackRequested(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getAckRequired(msg);
+	}
+
+	command uint16_t LowPowerListeningConfig.getListenLength()
+	{
+		return 5;
+	}
+
+	async command uint16_t RandomCollisionConfig.getMinimumBackoff()
+	{
+		return (uint16_t)(320 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg)
+	{
+		return (uint16_t)(1600 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg)
+	{
+		return (uint16_t)(3200 * RADIO_ALARM_MICROSEC);
+	}
+
+#endif
+
+}
diff --git a/tos/chips/rf212/RF212TimeSyncMessageC.nc b/tos/chips/rf212/RF212TimeSyncMessageC.nc
new file mode 100644
index 00000000..f7dfc1a9
--- /dev/null
+++ b/tos/chips/rf212/RF212TimeSyncMessageC.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+configuration RF212TimeSyncMessageC
+{
+	provides
+	{
+		interface SplitControl;
+
+		interface Receive[uint8_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface Packet;
+		interface AMPacket;
+
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface TimeSyncAMSend<TRadio, uint32_t> as TimeSyncAMSendRadio[am_id_t id];
+		interface TimeSyncPacket<TRadio, uint32_t> as TimeSyncPacketRadio;
+
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+		interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+		interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+	}
+}
+
+implementation
+{
+	components RF212DriverLayerC, RF212ActiveMessageC, new TimeSyncMessageLayerC();
+  
+	SplitControl	= RF212ActiveMessageC;
+	AMPacket	= TimeSyncMessageLayerC;
+  	Receive		= TimeSyncMessageLayerC.Receive;
+	Snoop		= TimeSyncMessageLayerC.Snoop;
+	Packet		= TimeSyncMessageLayerC;
+
+	PacketTimeStampRadio	= RF212ActiveMessageC;
+	TimeSyncAMSendRadio	= TimeSyncMessageLayerC;
+	TimeSyncPacketRadio	= TimeSyncMessageLayerC;
+
+	PacketTimeStampMilli	= RF212ActiveMessageC;
+	TimeSyncAMSendMilli	= TimeSyncMessageLayerC;
+	TimeSyncPacketMilli	= TimeSyncMessageLayerC;
+
+	TimeSyncMessageLayerC.PacketTimeStampRadio -> RF212ActiveMessageC;
+	TimeSyncMessageLayerC.PacketTimeStampMilli -> RF212ActiveMessageC;
+
+	TimeSyncMessageLayerC.LocalTimeRadio -> RF212DriverLayerC;
+	TimeSyncMessageLayerC.PacketTimeSyncOffset -> RF212DriverLayerC.PacketTimeSyncOffset;
+}
diff --git a/tos/chips/rf230/README b/tos/chips/rf230/README
new file mode 100644
index 00000000..23adcc18
--- /dev/null
+++ b/tos/chips/rf230/README
@@ -0,0 +1,69 @@
+
+The RF230 radio driver has the following configuration options. Some of 
+these are set in the platforms/xxx/chips/rf230/RadioConfig.h header file, 
+see the IRIS platform for example, others can be set in your Makefile.
+
+RF230_TRX_CTRL_0_VALUE:
+
+This is the value of the TRX_CTRL_0 register which configures the output 
+pin currents and the CLKM clock:
+
+RF230_CCA_MODE_VALUE:
+
+This is the default value of the CCA_MODE field in the PHY_CC_CCA register
+which is used to configure the default mode of the clear channel assesment
+
+RF230_CCA_THRES_VALUE:
+
+This is the value of the CCA_THRES register that controls the energy levels 
+used for clear channel assesment.
+
+RF230_DEF_RFPOWER:
+
+This is the default value of the TX_PWR field of the PHY_TX_PWR register. 
+This can be cahanged via the PacketTransmitPower interface provided by the 
+RF230ActiveMessageC.
+
+RF230_DEF_CHANNEL:
+
+This is the default value of the CHANNEL field of the PHY_CC_CCA register.
+This can be cahanged via the RadioChannel interface provided by the 
+RF230ActiveMessageC.
+
+RF230_CRCBYTE_COMMAND:
+
+This is the command used to calculate the CRC for the RF230 chip, since it 
+does not support hardware CRC checking (in rev A).
+
+RF230_SLOW_SPI:
+
+Define this if your microcontroller SPI interface is slower then 250 
+kbit/s. This delays the start of transmission to when the header is at 
+least uploaded into the TX buffer.
+
+RF230_RSSI_ENERGY:
+
+If you define this, then the content of the RF230_PHY_ED_LEVEL is queried 
+instead of the RSSI value for eahc incoming message. This value can be 
+obtained with the PacketRSSI interface.
+
+RF230_HARDWARE_ACK
+
+If you define this, then the radio stack will use hardware acknowledgements
+and address recognition. In particular, you will not be able to snoop on
+onther messages. The load on the CPU is reduced, you should be able to send
+more messages under heavy load. Note, that the PacketRSSI interface will
+return the energy level (and not the rssi value) of received packet.
+
+RF230_HWACK_SLOPPY_TIMESTAMP
+
+If you define this, then the code that calculates the time stamp of the SFD
+from a single interrupt at the end of the message reception will not use
+floating point computation, which will be faster but less precise.
+
+RF230_BACKOFF_MIN
+RF230_BACKOFF_INIT
+RF230_BACKOFF_CONG
+
+The minimum backoff time, the initial backoff time, and the cognestion backoff
+time in microseconds for the random CSMA/CA algorithm. See the RF230RadioP.nc.
diff --git a/tos/chips/rf230/RF230ActiveMessageC.nc b/tos/chips/rf230/RF230ActiveMessageC.nc
new file mode 100644
index 00000000..264e5cf4
--- /dev/null
+++ b/tos/chips/rf230/RF230ActiveMessageC.nc
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+#ifdef IEEE154FRAMES_ENABLED
+#error "You cannot use ActiveMessageC with IEEE154FRAMES_ENABLED defined"
+#endif
+
+configuration RF230ActiveMessageC
+{
+	provides 
+	{
+		interface SplitControl;
+
+		interface AMSend[am_id_t id];
+		interface Receive[am_id_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface SendNotifier[am_id_t id];
+
+		// for TOSThreads
+		interface Receive as ReceiveDefault[am_id_t id];
+		interface Receive as SnoopDefault[am_id_t id];
+
+		interface Packet;
+		interface AMPacket;
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+#ifdef PACKET_LINK
+		interface PacketLink;
+#endif
+
+		interface RadioChannel;
+
+		interface PacketField<uint8_t> as PacketLinkQuality;
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	components RF230RadioC as RadioC;
+
+	SplitControl = RadioC;
+
+	AMSend = RadioC;
+	Receive = RadioC.Receive;
+	Snoop = RadioC.Snoop;
+	SendNotifier = RadioC;
+
+	ReceiveDefault = RadioC.ReceiveDefault;
+	SnoopDefault = RadioC.SnoopDefault;
+
+	Packet = RadioC.PacketForActiveMessage;
+	AMPacket = RadioC;
+
+	PacketAcknowledgements = RadioC;
+	LowPowerListening = RadioC;
+#ifdef PACKET_LINK
+	PacketLink = RadioC;
+#endif
+
+	RadioChannel = RadioC;
+
+	PacketLinkQuality = RadioC.PacketLinkQuality;
+	PacketTransmitPower = RadioC.PacketTransmitPower;
+	PacketRSSI = RadioC.PacketRSSI;
+
+	LocalTimeRadio = RadioC;
+	PacketTimeStampMilli = RadioC;
+	PacketTimeStampRadio = RadioC;
+}
diff --git a/tos/chips/rf230/RF230DriverConfig.nc b/tos/chips/rf230/RF230DriverConfig.nc
new file mode 100644
index 00000000..7e8b680f
--- /dev/null
+++ b/tos/chips/rf230/RF230DriverConfig.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface RF230DriverConfig
+{
+	/**
+	 * Returns the length of a dummy header to align the payload properly.
+	 */
+	async command uint8_t headerLength(message_t* msg);
+
+	/**
+	 * Returns the maximum length of the PHY payload including the 
+	 * length field but not counting the FCF field.
+	 */
+	async command uint8_t maxPayloadLength();
+
+	/**
+	 * Returns the length of a dummy metadata section to align the
+	 * metadata section properly.
+	 */
+	async command uint8_t metadataLength(message_t* msg);
+
+	/**
+	 * Gets the number of bytes we should read before the RadioReceive.header
+	 * event is fired. If the length of the packet is less than this amount, 
+	 * then that event is fired earlier. The header length must be at least one.
+	 */
+	async command uint8_t headerPreloadLength();
+
+	/**
+	 * Returns TRUE if before sending this message we should make sure that
+	 * the channel is clear via a very basic (and quick) RSSI check.
+	 */
+	async command bool requiresRssiCca(message_t* msg);
+}
diff --git a/tos/chips/rf230/RF230DriverHwAckC.nc b/tos/chips/rf230/RF230DriverHwAckC.nc
new file mode 100644
index 00000000..cf95329b
--- /dev/null
+++ b/tos/chips/rf230/RF230DriverHwAckC.nc
@@ -0,0 +1,129 @@
+/*
+* Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Miklos Maroti
+*/
+
+#include <RadioConfig.h>
+#include <RF230DriverLayer.h>
+
+configuration RF230DriverHwAckC
+{
+	provides
+	{
+		interface RadioState;
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioCCA;
+		interface RadioPacket;
+
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+		interface PacketField<uint8_t> as PacketTimeSyncOffset;
+		interface PacketField<uint8_t> as PacketLinkQuality;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface Alarm<TRadio, tradio_size>;
+
+		interface PacketAcknowledgements;
+	}
+
+	uses
+	{
+		interface RF230DriverConfig as Config;
+		interface PacketTimeStamp<TRadio, uint32_t>;
+		interface Ieee154PacketLayer;
+
+		interface PacketFlag as TransmitPowerFlag;
+		interface PacketFlag as RSSIFlag;
+		interface PacketFlag as TimeSyncFlag;
+		interface PacketFlag as AckReceivedFlag;
+		interface RadioAlarm;
+	}
+}
+
+implementation
+{
+	components RF230DriverHwAckP, HplRF230C, BusyWaitMicroC, TaskletC, MainC, ActiveMessageAddressC;
+
+	RadioState = RF230DriverHwAckP;
+	RadioSend = RF230DriverHwAckP;
+	RadioReceive = RF230DriverHwAckP;
+	RadioCCA = RF230DriverHwAckP;
+	RadioPacket = RF230DriverHwAckP;
+
+	LocalTimeRadio = HplRF230C;
+
+	Config = RF230DriverHwAckP;
+
+	PacketTransmitPower = RF230DriverHwAckP.PacketTransmitPower;
+	TransmitPowerFlag = RF230DriverHwAckP.TransmitPowerFlag;
+
+	PacketRSSI = RF230DriverHwAckP.PacketRSSI;
+	RSSIFlag = RF230DriverHwAckP.RSSIFlag;
+
+	PacketTimeSyncOffset = RF230DriverHwAckP.PacketTimeSyncOffset;
+	TimeSyncFlag = RF230DriverHwAckP.TimeSyncFlag;
+
+	PacketLinkQuality = RF230DriverHwAckP.PacketLinkQuality;
+	PacketTimeStamp = RF230DriverHwAckP.PacketTimeStamp;
+
+	RF230DriverHwAckP.LocalTime -> HplRF230C;
+
+	Alarm = HplRF230C.Alarm;
+	RadioAlarm = RF230DriverHwAckP.RadioAlarm;
+
+	RF230DriverHwAckP.SELN -> HplRF230C.SELN;
+	RF230DriverHwAckP.SpiResource -> HplRF230C.SpiResource;
+	RF230DriverHwAckP.FastSpiByte -> HplRF230C;
+
+	RF230DriverHwAckP.SLP_TR -> HplRF230C.SLP_TR;
+	RF230DriverHwAckP.RSTN -> HplRF230C.RSTN;
+
+	RF230DriverHwAckP.IRQ -> HplRF230C.IRQ;
+	RF230DriverHwAckP.Tasklet -> TaskletC;
+	RF230DriverHwAckP.BusyWait -> BusyWaitMicroC;
+
+#ifdef RADIO_DEBUG
+	components DiagMsgC;
+	RF230DriverHwAckP.DiagMsg -> DiagMsgC;
+#endif
+
+	MainC.SoftwareInit -> RF230DriverHwAckP.SoftwareInit;
+
+	components RealMainP;
+	RealMainP.PlatformInit -> RF230DriverHwAckP.PlatformInit;
+
+	AckReceivedFlag = RF230DriverHwAckP.AckReceivedFlag;
+	RF230DriverHwAckP.ActiveMessageAddress -> ActiveMessageAddressC;
+	PacketAcknowledgements = RF230DriverHwAckP;
+	Ieee154PacketLayer = RF230DriverHwAckP;
+}
diff --git a/tos/chips/rf230/RF230DriverHwAckP.nc b/tos/chips/rf230/RF230DriverHwAckP.nc
new file mode 100644
index 00000000..93c68fab
--- /dev/null
+++ b/tos/chips/rf230/RF230DriverHwAckP.nc
@@ -0,0 +1,1024 @@
+/*
+* Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Miklos Maroti
+*/
+
+#include <RF230DriverLayer.h>
+#include <Tasklet.h>
+#include <RadioAssert.h>
+#include <TimeSyncMessageLayer.h>
+#include <RadioConfig.h>
+
+module RF230DriverHwAckP
+{
+	provides
+	{
+		interface Init as PlatformInit @exactlyonce();
+		interface Init as SoftwareInit @exactlyonce();
+
+		interface RadioState;
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioCCA;
+		interface RadioPacket;
+
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+		interface PacketField<uint8_t> as PacketTimeSyncOffset;
+		interface PacketField<uint8_t> as PacketLinkQuality;
+
+		interface PacketAcknowledgements;
+	}
+
+	uses
+	{
+		interface GeneralIO as SELN;
+		interface Resource as SpiResource;
+
+		interface FastSpiByte;
+
+		interface GeneralIO as SLP_TR;
+		interface GeneralIO as RSTN;
+
+		interface GpioCapture as IRQ;
+
+		interface BusyWait<TMicro, uint16_t>;
+		interface LocalTime<TRadio>;
+
+		interface RF230DriverConfig as Config;
+
+		interface PacketFlag as TransmitPowerFlag;
+		interface PacketFlag as RSSIFlag;
+		interface PacketFlag as TimeSyncFlag;
+
+		interface PacketTimeStamp<TRadio, uint32_t>;
+
+		interface Tasklet;
+		interface RadioAlarm;
+
+		interface PacketFlag as AckReceivedFlag;
+		interface Ieee154PacketLayer;
+		interface ActiveMessageAddress;
+
+#ifdef RADIO_DEBUG
+		interface DiagMsg;
+#endif
+	}
+}
+
+implementation
+{
+	rf230_header_t* getHeader(message_t* msg)
+	{
+		return ((void*)msg) + call Config.headerLength(msg);
+	}
+
+	void* getPayload(message_t* msg)
+	{
+		return ((void*)msg) + call RadioPacket.headerLength(msg);
+	}
+
+	rf230_metadata_t* getMeta(message_t* msg)
+	{
+		return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg);
+	}
+
+/*----------------- STATE -----------------*/
+
+	tasklet_norace uint8_t state;
+	enum
+	{
+		STATE_P_ON = 0,
+		STATE_SLEEP = 1,
+		STATE_SLEEP_2_TRX_OFF = 2,
+		STATE_TRX_OFF = 3,
+		STATE_TRX_OFF_2_RX_ON = 4,
+		STATE_RX_ON = 5,
+		STATE_BUSY_TX_2_RX_ON = 6,
+	};
+
+	tasklet_norace uint8_t cmd;
+	enum
+	{
+		CMD_NONE = 0,			// the state machine has stopped
+		CMD_TURNOFF = 1,		// goto SLEEP state
+		CMD_STANDBY = 2,		// goto TRX_OFF state
+		CMD_TURNON = 3,			// goto RX_ON state
+		CMD_TRANSMIT = 4,		// currently transmitting a message
+		CMD_CCA = 6,			// performing clear chanel assesment
+		CMD_CHANNEL = 7,		// changing the channel
+		CMD_SIGNAL_DONE = 8,		// signal the end of the state transition
+		CMD_DOWNLOAD = 9,		// download the received message
+	};
+
+	norace bool radioIrq;
+
+	tasklet_norace uint8_t txPower;
+	tasklet_norace uint8_t channel;
+
+	tasklet_norace message_t* rxMsg;
+	message_t rxMsgBuffer;
+
+	uint16_t capturedTime;	// the current time when the last interrupt has occured
+
+/*----------------- REGISTER -----------------*/
+
+	inline void writeRegister(uint8_t reg, uint8_t value)
+	{
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF230_CMD_REGISTER_WRITE | reg);
+		call FastSpiByte.splitReadWrite(value);
+		call FastSpiByte.splitRead();
+		call SELN.set();
+	}
+
+	inline uint8_t readRegister(uint8_t reg)
+	{
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF230_CMD_REGISTER_READ | reg);
+		call FastSpiByte.splitReadWrite(0);
+		reg = call FastSpiByte.splitRead();
+		call SELN.set();
+
+		return reg;
+	}
+
+/*----------------- ALARM -----------------*/
+
+	enum
+	{
+		SLEEP_WAKEUP_TIME = (uint16_t)(880 * RADIO_ALARM_MICROSEC),
+		PLL_CALIBRATION_TIME = (uint16_t)(180 * RADIO_ALARM_MICROSEC),
+		CCA_REQUEST_TIME = (uint16_t)(140 * RADIO_ALARM_MICROSEC),
+
+		// 8 undocumented delay, 128 for CSMA, 16 for delay, 5*32 for preamble and SFD
+		TX_SFD_DELAY = (uint16_t)((8 + 128 + 16 + 5*32) * RADIO_ALARM_MICROSEC),
+		
+		// 32 for frame length, 16 for delay
+		RX_SFD_DELAY = (uint16_t)((32 + 16) * RADIO_ALARM_MICROSEC),
+	};
+
+	tasklet_async event void RadioAlarm.fired()
+	{
+		if( state == STATE_SLEEP_2_TRX_OFF )
+			state = STATE_TRX_OFF;
+		else if( state == STATE_TRX_OFF_2_RX_ON )
+		{
+			RADIO_ASSERT( cmd == CMD_TURNON || cmd == CMD_CHANNEL );
+
+			state = STATE_RX_ON;
+			cmd = CMD_SIGNAL_DONE;
+		}
+		else if( cmd == CMD_CCA )
+		{
+			uint8_t cca;
+
+			RADIO_ASSERT( state == STATE_RX_ON );
+
+			cmd = CMD_NONE;
+			cca = readRegister(RF230_TRX_STATUS);
+
+			RADIO_ASSERT( (cca & RF230_TRX_STATUS_MASK) == RF230_RX_AACK_ON );
+
+			signal RadioCCA.done( (cca & RF230_CCA_DONE) ? ((cca & RF230_CCA_STATUS) ? SUCCESS : EBUSY) : FAIL );
+		}
+		else
+			RADIO_ASSERT(FALSE);
+
+		// make sure the rest of the command processing is called
+		call Tasklet.schedule();
+	}
+
+/*----------------- INIT -----------------*/
+
+	command error_t PlatformInit.init()
+	{
+		call SELN.makeOutput();
+		call SELN.set();
+		call SLP_TR.makeOutput();
+		call SLP_TR.clr();
+		call RSTN.makeOutput();
+		call RSTN.set();
+
+		rxMsg = &rxMsgBuffer;
+
+		return SUCCESS;
+	}
+
+	command error_t SoftwareInit.init()
+	{
+		// for powering up the radio
+		return call SpiResource.request();
+	}
+
+	void initRadio()
+	{
+		uint16_t temp;
+
+		call BusyWait.wait(510);
+
+		call RSTN.clr();
+		call SLP_TR.clr();
+		call BusyWait.wait(6);
+		call RSTN.set();
+
+		writeRegister(RF230_TRX_CTRL_0, RF230_TRX_CTRL_0_VALUE);
+		writeRegister(RF230_TRX_STATE, RF230_TRX_OFF);
+
+		call BusyWait.wait(510);
+
+		writeRegister(RF230_IRQ_MASK, RF230_IRQ_TRX_UR | RF230_IRQ_TRX_END );
+		writeRegister(RF230_CCA_THRES, RF230_CCA_THRES_VALUE);
+		writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | (RF230_DEF_RFPOWER & RF230_TX_PWR_MASK));
+
+		txPower = RF230_DEF_RFPOWER & RF230_TX_PWR_MASK;
+		channel = RF230_DEF_CHANNEL & RF230_CHANNEL_MASK;
+		writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);
+
+		writeRegister(RF230_XAH_CTRL, 0);
+		writeRegister(RF230_CSMA_SEED_1, 0);
+
+		temp = call ActiveMessageAddress.amGroup();
+		writeRegister(RF230_PAN_ID_0, temp);
+		writeRegister(RF230_PAN_ID_1, temp >> 8);
+
+		call SLP_TR.set();
+		state = STATE_SLEEP;
+	}
+
+/*----------------- SPI -----------------*/
+
+	event void SpiResource.granted()
+	{
+		call SELN.makeOutput();
+		call SELN.set();
+
+		if( state == STATE_P_ON )
+		{
+			initRadio();
+			call SpiResource.release();
+		}
+		else
+			call Tasklet.schedule();
+	}
+
+	bool isSpiAcquired()
+	{
+		if( call SpiResource.isOwner() )
+			return TRUE;
+
+		if( call SpiResource.immediateRequest() == SUCCESS )
+		{
+			call SELN.makeOutput();
+			call SELN.set();
+
+			return TRUE;
+		}
+
+		call SpiResource.request();
+		return FALSE;
+	}
+
+/*----------------- CHANNEL -----------------*/
+
+tasklet_async command uint8_t RadioState.getChannel()
+	{
+		return channel;
+	}
+
+	tasklet_async command error_t RadioState.setChannel(uint8_t c)
+	{
+		c &= RF230_CHANNEL_MASK;
+
+		if( cmd != CMD_NONE )
+			return EBUSY;
+		else if( channel == c )
+			return EALREADY;
+
+		channel = c;
+		cmd = CMD_CHANNEL;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	inline void changeChannel()
+	{
+		RADIO_ASSERT( cmd == CMD_CHANNEL );
+		RADIO_ASSERT( state == STATE_SLEEP || state == STATE_TRX_OFF || state == STATE_RX_ON );
+
+		if( isSpiAcquired() && call RadioAlarm.isFree() )
+		{
+			writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);
+
+			if( state == STATE_RX_ON )
+			{
+				call RadioAlarm.wait(PLL_CALIBRATION_TIME);
+				state = STATE_TRX_OFF_2_RX_ON;
+			}
+			else
+				cmd = CMD_SIGNAL_DONE;
+		}
+	}
+
+/*----------------- TURN ON/OFF -----------------*/
+
+	inline void changeState()
+	{
+		if( (cmd == CMD_STANDBY || cmd == CMD_TURNON)
+			&& state == STATE_SLEEP && call RadioAlarm.isFree() )
+		{
+			call SLP_TR.clr();
+
+			call RadioAlarm.wait(SLEEP_WAKEUP_TIME);
+			state = STATE_SLEEP_2_TRX_OFF;
+		}
+		else if( cmd == CMD_TURNON && state == STATE_TRX_OFF 
+			&& isSpiAcquired() && call RadioAlarm.isFree() )
+		{
+			uint16_t temp;
+	
+			RADIO_ASSERT( ! radioIrq );
+
+			readRegister(RF230_IRQ_STATUS); // clear the interrupt register
+			call IRQ.captureRisingEdge();
+
+			// setChannel was ignored in SLEEP because the SPI was not working, so do it here
+			writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);
+
+			temp = call ActiveMessageAddress.amAddress();
+			writeRegister(RF230_SHORT_ADDR_0, temp);
+			writeRegister(RF230_SHORT_ADDR_1, temp >> 8);
+
+			call RadioAlarm.wait(PLL_CALIBRATION_TIME);
+			writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON);
+			state = STATE_TRX_OFF_2_RX_ON;
+		}
+		else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) 
+			&& state == STATE_RX_ON && isSpiAcquired() )
+		{
+			writeRegister(RF230_TRX_STATE, RF230_FORCE_TRX_OFF);
+
+			call IRQ.disable();
+			radioIrq = FALSE;
+
+			state = STATE_TRX_OFF;
+		}
+
+		if( cmd == CMD_TURNOFF && state == STATE_TRX_OFF )
+		{
+			call SLP_TR.set();
+			state = STATE_SLEEP;
+			cmd = CMD_SIGNAL_DONE;
+		}
+		else if( cmd == CMD_STANDBY && state == STATE_TRX_OFF )
+			cmd = CMD_SIGNAL_DONE;
+	}
+
+	tasklet_async command error_t RadioState.turnOff()
+	{
+		if( cmd != CMD_NONE )
+			return EBUSY;
+		else if( state == STATE_SLEEP )
+			return EALREADY;
+
+		cmd = CMD_TURNOFF;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+	
+	tasklet_async command error_t RadioState.standby()
+	{
+		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
+			return EBUSY;
+		else if( state == STATE_TRX_OFF )
+			return EALREADY;
+
+		cmd = CMD_STANDBY;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	tasklet_async command error_t RadioState.turnOn()
+	{
+		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
+			return EBUSY;
+		else if( state == STATE_RX_ON )
+			return EALREADY;
+
+		cmd = CMD_TURNON;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioState.done() { }
+
+	task void changeAddress()
+	{
+		call Tasklet.suspend();
+
+		if( isSpiAcquired() )
+		{
+			uint16_t temp = call ActiveMessageAddress.amAddress();
+			writeRegister(RF230_SHORT_ADDR_0, temp);
+			writeRegister(RF230_SHORT_ADDR_1, temp >> 8);
+		}
+		else
+			post changeAddress();
+
+		call Tasklet.resume();
+	}
+
+	async event void ActiveMessageAddress.changed()
+	{
+		post changeAddress();
+	}
+
+/*----------------- TRANSMIT -----------------*/
+
+	tasklet_norace message_t* txMsg;
+
+	tasklet_async command error_t RadioSend.send(message_t* msg)
+	{
+		uint16_t time;
+		uint8_t length;
+		uint8_t* data;
+		uint8_t header;
+		uint32_t time32;
+		void* timesync;
+
+		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || radioIrq )
+			return EBUSY;
+
+		length = (call PacketTransmitPower.isSet(msg) ?
+			call PacketTransmitPower.get(msg) : RF230_DEF_RFPOWER) & RF230_TX_PWR_MASK;
+
+		if( length != txPower )
+		{
+			txPower = length;
+			writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | txPower);
+		}
+
+		writeRegister(RF230_TRX_STATE, RF230_TX_ARET_ON);
+
+		// do something useful, just to wait a little
+		time32 = call LocalTime.get();
+		timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0;
+
+		// we have missed an incoming message in this short amount of time
+		if( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) != RF230_TX_ARET_ON )
+		{
+			RADIO_ASSERT( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) == RF230_BUSY_RX_AACK );
+
+			writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON);
+			return EBUSY;
+		}
+
+#ifndef RF230_SLOW_SPI
+		atomic
+		{
+			call SLP_TR.set();
+			time = call RadioAlarm.getNow();
+		}
+		call SLP_TR.clr();
+#endif
+
+		RADIO_ASSERT( ! radioIrq );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF230_CMD_FRAME_WRITE);
+
+		data = getPayload(msg);
+		length = getHeader(msg)->length;
+
+		// length | data[0] ... data[length-3] | automatically generated FCS
+		call FastSpiByte.splitReadWrite(length);
+
+		// the FCS is atomatically generated (2 bytes)
+		length -= 2;
+
+		header = call Config.headerPreloadLength();
+		if( header > length )
+			header = length;
+
+		length -= header;
+
+		// first upload the header to gain some time
+		do {
+			call FastSpiByte.splitReadWrite(*(data++));
+		}
+		while( --header != 0 );
+
+#ifdef RF230_SLOW_SPI
+		atomic
+		{
+			call SLP_TR.set();
+			time = call RadioAlarm.getNow();
+		}
+		call SLP_TR.clr();
+#endif
+
+		time32 += (int16_t)(time + TX_SFD_DELAY) - (int16_t)(time32);
+
+		if( timesync != 0 )
+			*(timesync_relative_t*)timesync = (*(timesync_absolute_t*)timesync) - time32;
+
+		while( length-- != 0 )
+			call FastSpiByte.splitReadWrite(*(data++));
+
+		// wait for the SPI transfer to finish
+		call FastSpiByte.splitRead();
+		call SELN.set();
+
+		/*
+		 * There is a very small window (~1 microsecond) when the RF230 went 
+		 * into PLL_ON state but was somehow not properly initialized because 
+		 * of an incoming message and could not go into BUSY_TX. I think the
+		 * radio can even receive a message, and generate a TRX_UR interrupt
+		 * because of concurrent access, but that message probably cannot be
+		 * recovered.
+		 *
+		 * TODO: this needs to be verified, and make sure that the chip is 
+		 * not locked up in this case.
+		 */
+
+		// go back to RX_ON state when finished
+		writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON);
+
+		if( timesync != 0 )
+			*(timesync_absolute_t*)timesync = (*(timesync_relative_t*)timesync) + time32;
+
+		call PacketTimeStamp.set(msg, time32);
+
+#ifdef RADIO_DEBUG_MESSAGES
+		if( call DiagMsg.record() )
+		{
+			length = getHeader(msg)->length;
+
+			call DiagMsg.chr('t');
+			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.int8(length);
+			call DiagMsg.hex8s(getPayload(msg), length - 2);
+			call DiagMsg.send();
+		}
+#endif
+
+		// wait for the TRX_END interrupt
+		txMsg = msg;
+		state = STATE_BUSY_TX_2_RX_ON;
+		cmd = CMD_TRANSMIT;
+
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioSend.sendDone(error_t error) { }
+	default tasklet_async event void RadioSend.ready() { }
+
+/*----------------- CCA -----------------*/
+
+	tasklet_async command error_t RadioCCA.request()
+	{
+		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || ! call RadioAlarm.isFree() )
+			return EBUSY;
+
+		// see Errata B7 of the datasheet
+		// writeRegister(RF230_TRX_STATE, RF230_PLL_ON);
+		// writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON);
+
+		writeRegister(RF230_PHY_CC_CCA, RF230_CCA_REQUEST | RF230_CCA_MODE_VALUE | channel);
+		call RadioAlarm.wait(CCA_REQUEST_TIME);
+		cmd = CMD_CCA;
+		
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioCCA.done(error_t error) { }
+
+/*----------------- RECEIVE -----------------*/
+
+	inline void downloadMessage()
+	{
+		uint8_t length;
+		bool crcValid = FALSE;
+
+		call SELN.clr();
+		call FastSpiByte.write(RF230_CMD_FRAME_READ);
+
+		// read the length byte
+		length = call FastSpiByte.write(0);
+
+		// if correct length
+		if( length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2 )
+		{
+			uint8_t read;
+			uint8_t* data;
+
+			// initiate the reading
+			call FastSpiByte.splitWrite(0);
+
+			data = getPayload(rxMsg);
+			getHeader(rxMsg)->length = length;
+
+			// we do not store the CRC field
+			length -= 2;
+
+			read = call Config.headerPreloadLength();
+			if( length < read )
+				read = length;
+
+			length -= read;
+
+			do {
+				*(data++) = call FastSpiByte.splitReadWrite(0);
+			}
+			while( --read != 0  );
+
+			if( signal RadioReceive.header(rxMsg) )
+			{
+				while( length-- != 0 )
+					*(data++) = call FastSpiByte.splitReadWrite(0);
+
+				call FastSpiByte.splitReadWrite(0);	// two CRC bytes
+				call FastSpiByte.splitReadWrite(0);
+
+				call PacketLinkQuality.set(rxMsg, call FastSpiByte.splitRead());
+
+				// we should have no other incoming message or buffer underflow
+				crcValid = ! radioIrq;
+			}
+		}
+
+		call SELN.set();
+
+		if( crcValid && call PacketTimeStamp.isValid(rxMsg) )
+		{
+			uint32_t time32 = call PacketTimeStamp.timestamp(rxMsg);
+			length = getHeader(rxMsg)->length;
+
+/*
+ * If you hate floating point arithmetics and do not care of up to 400 microsecond time stamping errors,
+ * then define RF230_HWACK_SLOPPY_TIMESTAMP, which will be significantly faster.
+ */
+#ifdef RF230_HWACK_SLOPPY_TIMESTAMP
+			time32 -= (uint16_t)(RX_SFD_DELAY) + ((uint16_t)(length) << (RADIO_ALARM_MILLI_EXP - 5));
+#else
+			time32 -= (uint16_t)(RX_SFD_DELAY) + (uint16_t)(32.0 * RADIO_ALARM_MICROSEC * (uint16_t)length);
+#endif
+
+			call PacketTimeStamp.set(rxMsg, time32);
+		}
+
+#ifdef RADIO_DEBUG_MESSAGES
+		if( call DiagMsg.record() )
+		{
+			length = getHeader(rxMsg)->length;
+
+			call DiagMsg.chr('r');
+			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.int8(crcValid ? length : -length);
+			call DiagMsg.hex8s(getPayload(rxMsg), length - 2);
+			call DiagMsg.int8(call PacketRSSI.isSet(rxMsg) ? call PacketRSSI.get(rxMsg) : -1);
+			call DiagMsg.uint8(call PacketLinkQuality.isSet(rxMsg) ? call PacketLinkQuality.get(rxMsg) : 0);
+			call DiagMsg.send();
+		}
+#endif
+
+		state = STATE_RX_ON;
+		cmd = CMD_NONE;
+
+		// signal only if it has passed the CRC check
+		if( crcValid )
+			rxMsg = signal RadioReceive.receive(rxMsg);
+	}
+
+/*----------------- IRQ -----------------*/
+
+	async event void IRQ.captured(uint16_t time)
+	{
+		RADIO_ASSERT( ! radioIrq );
+
+		atomic
+		{
+			capturedTime = time;
+			radioIrq = TRUE;
+		}
+
+		call Tasklet.schedule();
+	}
+
+	void serviceRadio()
+	{
+		if( isSpiAcquired() )
+		{
+			uint16_t time;
+			uint32_t time32;
+			uint8_t irq;
+			uint8_t temp;
+			
+			atomic time = capturedTime;
+			radioIrq = FALSE;
+			irq = readRegister(RF230_IRQ_STATUS);
+
+#ifdef RADIO_DEBUG
+			// TODO: handle this interrupt
+			if( irq & RF230_IRQ_TRX_UR )
+			{
+				if( call DiagMsg.record() )
+				{
+					call DiagMsg.str("assert ur");
+					call DiagMsg.uint16(call RadioAlarm.getNow());
+					call DiagMsg.hex8(readRegister(RF230_TRX_STATUS));
+					call DiagMsg.hex8(readRegister(RF230_TRX_STATE));
+					call DiagMsg.hex8(irq);
+					call DiagMsg.uint8(state);
+					call DiagMsg.uint8(cmd);
+					call DiagMsg.send();
+				}
+			}
+#endif
+
+			if( irq & RF230_IRQ_TRX_END )
+			{
+				if( cmd == CMD_TRANSMIT )
+				{
+					RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON );
+
+					temp = readRegister(RF230_TRX_STATE) & RF230_TRAC_STATUS_MASK;
+
+					if( call Ieee154PacketLayer.getAckRequired(txMsg) )
+						call AckReceivedFlag.setValue(txMsg, temp != RF230_TRAC_NO_ACK);
+
+					state = STATE_RX_ON;
+					cmd = CMD_NONE;
+
+					signal RadioSend.sendDone(temp != RF230_TRAC_CHANNEL_ACCESS_FAILURE ? SUCCESS : EBUSY);
+
+					// TODO: we could have missed a received message
+					RADIO_ASSERT( ! (irq & RF230_IRQ_RX_START) );
+				}
+				else if( cmd == CMD_NONE )
+				{
+					RADIO_ASSERT( state == STATE_RX_ON );
+
+					if( irq == RF230_IRQ_TRX_END )
+					{
+						call PacketRSSI.set(rxMsg, readRegister(RF230_PHY_ED_LEVEL));
+
+						// TODO: compensate for packet transmission time when downloading
+						time32 = call LocalTime.get();
+						time32 += (int16_t)(time) - (int16_t)(time32);
+						call PacketTimeStamp.set(rxMsg, time32);
+					}
+					else
+					{
+						call PacketRSSI.clear(rxMsg);
+						call PacketTimeStamp.clear(rxMsg);
+					}
+
+					cmd = CMD_DOWNLOAD;
+				}
+				else
+					RADIO_ASSERT(FALSE);
+			}
+		}
+	}
+
+	default tasklet_async event bool RadioReceive.header(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	default tasklet_async event message_t* RadioReceive.receive(message_t* msg)
+	{
+		return msg;
+	}
+
+/*----------------- TASKLET -----------------*/
+
+	task void releaseSpi()
+	{
+		call SpiResource.release();
+	}
+
+	tasklet_async event void Tasklet.run()
+	{
+		if( radioIrq )
+			serviceRadio();
+
+		if( cmd != CMD_NONE )
+		{
+			if( cmd == CMD_DOWNLOAD )
+				downloadMessage();
+			else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON )
+				changeState();
+			else if( cmd == CMD_CHANNEL )
+				changeChannel();
+			
+			if( cmd == CMD_SIGNAL_DONE )
+			{
+				cmd = CMD_NONE;
+				signal RadioState.done();
+			}
+		}
+
+		if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq )
+			signal RadioSend.ready();
+
+		if( cmd == CMD_NONE )
+			post releaseSpi();
+	}
+
+/*----------------- RadioPacket -----------------*/
+	
+	async command uint8_t RadioPacket.headerLength(message_t* msg)
+	{
+		return call Config.headerLength(msg) + sizeof(rf230_header_t);
+	}
+
+	async command uint8_t RadioPacket.payloadLength(message_t* msg)
+	{
+		return getHeader(msg)->length - 2;
+	}
+
+	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		RADIO_ASSERT( 1 <= length && length <= 125 );
+		RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) );
+
+		// we add the length of the CRC, which is automatically generated
+		getHeader(msg)->length = length + 2;
+	}
+
+	async command uint8_t RadioPacket.maxPayloadLength()
+	{
+		RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(rf230_header_t) <= 125 );
+
+		return call Config.maxPayloadLength() - sizeof(rf230_header_t);
+	}
+
+	async command uint8_t RadioPacket.metadataLength(message_t* msg)
+	{
+		return call Config.metadataLength(msg) + sizeof(rf230_metadata_t);
+	}
+
+	async command void RadioPacket.clear(message_t* msg)
+	{
+		// all flags are automatically cleared
+	}
+
+/*----------------- PacketTransmitPower -----------------*/
+
+	async command bool PacketTransmitPower.isSet(message_t* msg)
+	{
+		return call TransmitPowerFlag.get(msg);
+	}
+
+	async command uint8_t PacketTransmitPower.get(message_t* msg)
+	{
+		return getMeta(msg)->power;
+	}
+
+	async command void PacketTransmitPower.clear(message_t* msg)
+	{
+		call TransmitPowerFlag.clear(msg);
+	}
+
+	async command void PacketTransmitPower.set(message_t* msg, uint8_t value)
+	{
+		call TransmitPowerFlag.set(msg);
+		getMeta(msg)->power = value;
+	}
+
+/*----------------- PacketRSSI -----------------*/
+
+	async command bool PacketRSSI.isSet(message_t* msg)
+	{
+		return call RSSIFlag.get(msg);
+	}
+
+	async command uint8_t PacketRSSI.get(message_t* msg)
+	{
+		return getMeta(msg)->rssi;
+	}
+
+	async command void PacketRSSI.clear(message_t* msg)
+	{
+		call RSSIFlag.clear(msg);
+	}
+
+	async command void PacketRSSI.set(message_t* msg, uint8_t value)
+	{
+		// just to be safe if the user fails to clear the packet
+		call TransmitPowerFlag.clear(msg);
+
+		call RSSIFlag.set(msg);
+		getMeta(msg)->rssi = value;
+	}
+
+/*----------------- PacketTimeSyncOffset -----------------*/
+
+	async command bool PacketTimeSyncOffset.isSet(message_t* msg)
+	{
+		return call TimeSyncFlag.get(msg);
+	}
+
+	async command uint8_t PacketTimeSyncOffset.get(message_t* msg)
+	{
+		return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t);
+	}
+
+	async command void PacketTimeSyncOffset.clear(message_t* msg)
+	{
+		call TimeSyncFlag.clear(msg);
+	}
+
+	async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value)
+	{
+		// we do not store the value, the time sync field is always the last 4 bytes
+		RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value );
+
+		call TimeSyncFlag.set(msg);
+	}
+
+/*----------------- PacketLinkQuality -----------------*/
+
+	async command bool PacketLinkQuality.isSet(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	async command uint8_t PacketLinkQuality.get(message_t* msg)
+	{
+		return getMeta(msg)->lqi;
+	}
+
+	async command void PacketLinkQuality.clear(message_t* msg)
+	{
+	}
+
+	async command void PacketLinkQuality.set(message_t* msg, uint8_t value)
+	{
+		getMeta(msg)->lqi = value;
+	}
+
+/*----------------- PacketAcknowledgements -----------------*/
+
+	async command error_t PacketAcknowledgements.requestAck(message_t* msg)
+	{
+		call Ieee154PacketLayer.setAckRequired(msg, TRUE);
+
+		return SUCCESS;
+	}
+
+	async command error_t PacketAcknowledgements.noAck(message_t* msg)
+	{
+		call Ieee154PacketLayer.setAckRequired(msg, FALSE);
+
+		return SUCCESS;
+	}
+
+	async command bool PacketAcknowledgements.wasAcked(message_t* msg)
+	{
+		return call AckReceivedFlag.get(msg);
+	}
+}
diff --git a/tos/chips/rf230/RF230DriverLayer.h b/tos/chips/rf230/RF230DriverLayer.h
new file mode 100644
index 00000000..6543cd63
--- /dev/null
+++ b/tos/chips/rf230/RF230DriverLayer.h
@@ -0,0 +1,180 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __RF230DRIVERLAYER_H__
+#define __RF230DRIVERLAYER_H__
+
+typedef nx_struct rf230_header_t
+{
+	nxle_uint8_t length;
+} rf230_header_t;
+
+typedef struct rf230_metadata_t
+{
+	uint8_t lqi;
+	union
+	{
+		uint8_t power;
+		uint8_t rssi;
+	};
+} rf230_metadata_t;
+
+enum rf230_registers_enum
+{
+	RF230_TRX_STATUS = 0x01,
+	RF230_TRX_STATE = 0x02,
+	RF230_TRX_CTRL_0 = 0x03,
+	RF230_PHY_TX_PWR = 0x05,
+	RF230_PHY_RSSI = 0x06,
+	RF230_PHY_ED_LEVEL = 0x07,
+	RF230_PHY_CC_CCA = 0x08,
+	RF230_CCA_THRES = 0x09,
+	RF230_IRQ_MASK = 0x0E,
+	RF230_IRQ_STATUS = 0x0F,
+	RF230_VREG_CTRL = 0x10,
+	RF230_BATMON = 0x11,
+	RF230_XOSC_CTRL = 0x12,
+	RF230_PLL_CF = 0x1A,
+	RF230_PLL_DCU = 0x1B,
+	RF230_PART_NUM = 0x1C,
+	RF230_VERSION_NUM = 0x1D,
+	RF230_MAN_ID_0 = 0x1E,
+	RF230_MAN_ID_1 = 0x1F,
+	RF230_SHORT_ADDR_0 = 0x20,
+	RF230_SHORT_ADDR_1 = 0x21,
+	RF230_PAN_ID_0 = 0x22,
+	RF230_PAN_ID_1 = 0x23,
+	RF230_IEEE_ADDR_0 = 0x24,
+	RF230_IEEE_ADDR_1 = 0x25,
+	RF230_IEEE_ADDR_2 = 0x26,
+	RF230_IEEE_ADDR_3 = 0x27,
+	RF230_IEEE_ADDR_4 = 0x28,
+	RF230_IEEE_ADDR_5 = 0x29,
+	RF230_IEEE_ADDR_6 = 0x2A,
+	RF230_IEEE_ADDR_7 = 0x2B,
+	RF230_XAH_CTRL = 0x2C,
+	RF230_CSMA_SEED_0 = 0x2D,
+	RF230_CSMA_SEED_1 = 0x2E,
+};
+
+enum rf230_trx_register_enums
+{
+	RF230_CCA_DONE = 1 << 7,
+	RF230_CCA_STATUS = 1 << 6,
+	RF230_TRX_STATUS_MASK = 0x1F,
+	RF230_P_ON = 0,
+	RF230_BUSY_RX = 1,
+	RF230_BUSY_TX = 2,
+	RF230_RX_ON = 6,
+	RF230_TRX_OFF = 8,
+	RF230_PLL_ON = 9,
+	RF230_SLEEP = 15,
+	RF230_BUSY_RX_AACK = 17,
+	RF230_BUSR_TX_ARET = 18,
+	RF230_RX_AACK_ON = 22,
+	RF230_TX_ARET_ON = 25,
+	RF230_RX_ON_NOCLK = 28,
+	RF230_AACK_ON_NOCLK = 29,
+	RF230_BUSY_RX_AACK_NOCLK = 30,
+	RF230_STATE_TRANSITION_IN_PROGRESS = 31,
+	RF230_TRAC_STATUS_MASK = 0xE0,
+	RF230_TRAC_SUCCESS = 0,
+	RF230_TRAC_SUCCESS_DATA_PENDING = 1 << 5,
+	RF230_TRAC_CHANNEL_ACCESS_FAILURE = 3 << 5,
+	RF230_TRAC_NO_ACK = 5 << 5,
+	RF230_TRAC_INVALID = 7 << 5,
+	RF230_TRX_CMD_MASK = 0x1F,
+	RF230_NOP = 0,
+	RF230_TX_START = 2,
+	RF230_FORCE_TRX_OFF = 3,
+};
+
+enum rf230_phy_register_enums
+{
+	RF230_TX_AUTO_CRC_ON = 1 << 7,
+	RF230_TX_PWR_MASK = 0x0F,
+	RF230_RSSI_MASK = 0x1F,
+	RF230_CCA_REQUEST = 1 << 7,
+	RF230_CCA_MODE_0 = 0 << 5,
+	RF230_CCA_MODE_1 = 1 << 5,
+	RF230_CCA_MODE_2 = 2 << 5,
+	RF230_CCA_MODE_3 = 3 << 5,
+	RF230_CHANNEL_DEFAULT = 11,
+	RF230_CHANNEL_MASK = 0x1F,
+	RF230_CCA_CS_THRES_SHIFT = 4,
+	RF230_CCA_ED_THRES_SHIFT = 0,
+};
+
+enum rf230_irq_register_enums
+{
+	RF230_IRQ_BAT_LOW = 1 << 7,
+	RF230_IRQ_TRX_UR = 1 << 6,
+	RF230_IRQ_TRX_END = 1 << 3,
+	RF230_IRQ_RX_START = 1 << 2,
+	RF230_IRQ_PLL_UNLOCK = 1 << 1,
+	RF230_IRQ_PLL_LOCK = 1 << 0,
+};
+
+enum rf230_control_register_enums
+{
+	RF230_AVREG_EXT = 1 << 7,
+	RF230_AVDD_OK = 1 << 6,
+	RF230_DVREG_EXT = 1 << 3,
+	RF230_DVDD_OK = 1 << 2,
+	RF230_BATMON_OK = 1 << 5,
+	RF230_BATMON_VHR = 1 << 4,
+	RF230_BATMON_VTH_MASK = 0x0F,
+	RF230_XTAL_MODE_OFF = 0 << 4,
+	RF230_XTAL_MODE_EXTERNAL = 4 << 4,
+	RF230_XTAL_MODE_INTERNAL = 15 << 4,
+};
+
+enum rf230_pll_register_enums
+{
+	RF230_PLL_CF_START = 1 << 7,
+	RF230_PLL_DCU_START = 1 << 7,
+};
+
+enum rf230_spi_command_enums
+{
+	RF230_CMD_REGISTER_READ = 0x80,
+	RF230_CMD_REGISTER_WRITE = 0xC0,
+	RF230_CMD_REGISTER_MASK = 0x3F,
+	RF230_CMD_FRAME_READ = 0x20,
+	RF230_CMD_FRAME_WRITE = 0x60,
+	RF230_CMD_SRAM_READ = 0x00,
+	RF230_CMD_SRAM_WRITE = 0x40,
+};
+
+#endif//__RF230DRIVERLAYER_H__
diff --git a/tos/chips/rf230/RF230DriverLayerC.nc b/tos/chips/rf230/RF230DriverLayerC.nc
new file mode 100644
index 00000000..b1eec9cd
--- /dev/null
+++ b/tos/chips/rf230/RF230DriverLayerC.nc
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+#include <RF230DriverLayer.h>
+
+configuration RF230DriverLayerC
+{
+	provides
+	{
+		interface RadioState;
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioCCA;
+		interface RadioPacket;
+
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+		interface PacketField<uint8_t> as PacketTimeSyncOffset;
+		interface PacketField<uint8_t> as PacketLinkQuality;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface Alarm<TRadio, tradio_size>;
+	}
+
+	uses
+	{
+		interface RF230DriverConfig as Config;
+		interface PacketTimeStamp<TRadio, uint32_t>;
+
+		interface PacketFlag as TransmitPowerFlag;
+		interface PacketFlag as RSSIFlag;
+		interface PacketFlag as TimeSyncFlag;
+		interface RadioAlarm;
+	}
+}
+
+implementation
+{
+	components RF230DriverLayerP, HplRF230C, BusyWaitMicroC, TaskletC, MainC;
+
+	RadioState = RF230DriverLayerP;
+	RadioSend = RF230DriverLayerP;
+	RadioReceive = RF230DriverLayerP;
+	RadioCCA = RF230DriverLayerP;
+	RadioPacket = RF230DriverLayerP;
+
+	LocalTimeRadio = HplRF230C;
+
+	Config = RF230DriverLayerP;
+
+	PacketTransmitPower = RF230DriverLayerP.PacketTransmitPower;
+	TransmitPowerFlag = RF230DriverLayerP.TransmitPowerFlag;
+
+	PacketRSSI = RF230DriverLayerP.PacketRSSI;
+	RSSIFlag = RF230DriverLayerP.RSSIFlag;
+
+	PacketTimeSyncOffset = RF230DriverLayerP.PacketTimeSyncOffset;
+	TimeSyncFlag = RF230DriverLayerP.TimeSyncFlag;
+
+	PacketLinkQuality = RF230DriverLayerP.PacketLinkQuality;
+	PacketTimeStamp = RF230DriverLayerP.PacketTimeStamp;
+
+	RF230DriverLayerP.LocalTime -> HplRF230C;
+
+	Alarm = HplRF230C.Alarm;
+	RadioAlarm = RF230DriverLayerP.RadioAlarm;
+
+	RF230DriverLayerP.SELN -> HplRF230C.SELN;
+	RF230DriverLayerP.SpiResource -> HplRF230C.SpiResource;
+	RF230DriverLayerP.FastSpiByte -> HplRF230C;
+
+	RF230DriverLayerP.SLP_TR -> HplRF230C.SLP_TR;
+	RF230DriverLayerP.RSTN -> HplRF230C.RSTN;
+
+	RF230DriverLayerP.IRQ -> HplRF230C.IRQ;
+	RF230DriverLayerP.Tasklet -> TaskletC;
+	RF230DriverLayerP.BusyWait -> BusyWaitMicroC;
+
+#ifdef RADIO_DEBUG
+	components DiagMsgC;
+	RF230DriverLayerP.DiagMsg -> DiagMsgC;
+#endif
+
+	MainC.SoftwareInit -> RF230DriverLayerP.SoftwareInit;
+
+	components RealMainP;
+	RealMainP.PlatformInit -> RF230DriverLayerP.PlatformInit;
+}
diff --git a/tos/chips/rf230/RF230DriverLayerP.nc b/tos/chips/rf230/RF230DriverLayerP.nc
new file mode 100644
index 00000000..59917d5b
--- /dev/null
+++ b/tos/chips/rf230/RF230DriverLayerP.nc
@@ -0,0 +1,1008 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ * Author: Branislav Kusy (bugfixes)
+ */
+
+#include <RF230DriverLayer.h>
+#include <Tasklet.h>
+#include <RadioAssert.h>
+#include <TimeSyncMessageLayer.h>
+#include <RadioConfig.h>
+
+module RF230DriverLayerP
+{
+	provides
+	{
+		interface Init as PlatformInit @exactlyonce();
+		interface Init as SoftwareInit @exactlyonce();
+
+		interface RadioState;
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioCCA;
+		interface RadioPacket;
+
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+		interface PacketField<uint8_t> as PacketTimeSyncOffset;
+		interface PacketField<uint8_t> as PacketLinkQuality;
+	}
+
+	uses
+	{
+		interface GeneralIO as SELN;
+		interface Resource as SpiResource;
+
+		interface FastSpiByte;
+
+		interface GeneralIO as SLP_TR;
+		interface GeneralIO as RSTN;
+
+		interface GpioCapture as IRQ;
+
+		interface BusyWait<TMicro, uint16_t>;
+		interface LocalTime<TRadio>;
+
+		interface RF230DriverConfig as Config;
+
+		interface PacketFlag as TransmitPowerFlag;
+		interface PacketFlag as RSSIFlag;
+		interface PacketFlag as TimeSyncFlag;
+
+		interface PacketTimeStamp<TRadio, uint32_t>;
+
+		interface Tasklet;
+		interface RadioAlarm;
+
+#ifdef RADIO_DEBUG
+		interface DiagMsg;
+#endif
+	}
+}
+
+implementation
+{
+	rf230_header_t* getHeader(message_t* msg)
+	{
+		return ((void*)msg) + call Config.headerLength(msg);
+	}
+
+	void* getPayload(message_t* msg)
+	{
+		return ((void*)msg) + call RadioPacket.headerLength(msg);
+	}
+
+	rf230_metadata_t* getMeta(message_t* msg)
+	{
+		return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg);
+	}
+
+/*----------------- STATE -----------------*/
+
+	tasklet_norace uint8_t state;
+	enum
+	{
+		STATE_P_ON = 0,
+		STATE_SLEEP = 1,
+		STATE_SLEEP_2_TRX_OFF = 2,
+		STATE_TRX_OFF = 3,
+		STATE_TRX_OFF_2_RX_ON = 4,
+		STATE_RX_ON = 5,
+		STATE_BUSY_TX_2_RX_ON = 6,
+	};
+
+	tasklet_norace uint8_t cmd;
+	enum
+	{
+		CMD_NONE = 0,			// the state machine has stopped
+		CMD_TURNOFF = 1,		// goto SLEEP state
+		CMD_STANDBY = 2,		// goto TRX_OFF state
+		CMD_TURNON = 3,			// goto RX_ON state
+		CMD_TRANSMIT = 4,		// currently transmitting a message
+		CMD_RECEIVE = 5,		// currently receiving a message
+		CMD_CCA = 6,			// performing clear chanel assesment
+		CMD_CHANNEL = 7,		// changing the channel
+		CMD_SIGNAL_DONE = 8,		// signal the end of the state transition
+		CMD_DOWNLOAD = 9,		// download the received message
+	};
+
+	norace bool radioIrq;
+
+	tasklet_norace uint8_t txPower;
+	tasklet_norace uint8_t channel;
+
+	tasklet_norace message_t* rxMsg;
+	message_t rxMsgBuffer;
+
+	uint16_t capturedTime;	// the current time when the last interrupt has occured
+
+	tasklet_norace uint8_t rssiClear;
+	tasklet_norace uint8_t rssiBusy;
+
+/*----------------- REGISTER -----------------*/
+
+	inline void writeRegister(uint8_t reg, uint8_t value)
+	{
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF230_CMD_REGISTER_WRITE | reg);
+		call FastSpiByte.splitReadWrite(value);
+		call FastSpiByte.splitRead();
+		call SELN.set();
+	}
+
+	inline uint8_t readRegister(uint8_t reg)
+	{
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF230_CMD_REGISTER_READ | reg);
+		call FastSpiByte.splitReadWrite(0);
+		reg = call FastSpiByte.splitRead();
+		call SELN.set();
+
+		return reg;
+	}
+
+/*----------------- ALARM -----------------*/
+
+	enum
+	{
+		SLEEP_WAKEUP_TIME = (uint16_t)(880 * RADIO_ALARM_MICROSEC),
+		CCA_REQUEST_TIME = (uint16_t)(140 * RADIO_ALARM_MICROSEC),
+
+		TX_SFD_DELAY = (uint16_t)(176 * RADIO_ALARM_MICROSEC),
+		RX_SFD_DELAY = (uint16_t)(8 * RADIO_ALARM_MICROSEC),
+	};
+
+	tasklet_async event void RadioAlarm.fired()
+	{
+		if( state == STATE_SLEEP_2_TRX_OFF )
+			state = STATE_TRX_OFF;
+		else if( cmd == CMD_CCA )
+		{
+			uint8_t cca;
+
+			RADIO_ASSERT( state == STATE_RX_ON );
+
+			cmd = CMD_NONE;
+			cca = readRegister(RF230_TRX_STATUS);
+
+			RADIO_ASSERT( (cca & RF230_TRX_STATUS_MASK) == RF230_RX_ON );
+
+			signal RadioCCA.done( (cca & RF230_CCA_DONE) ? ((cca & RF230_CCA_STATUS) ? SUCCESS : EBUSY) : FAIL );
+		}
+		else
+			RADIO_ASSERT(FALSE);
+
+		// make sure the rest of the command processing is called
+		call Tasklet.schedule();
+	}
+
+/*----------------- INIT -----------------*/
+
+	command error_t PlatformInit.init()
+	{
+		call SELN.makeOutput();
+		call SELN.set();
+		call SLP_TR.makeOutput();
+		call SLP_TR.clr();
+		call RSTN.makeOutput();
+		call RSTN.set();
+
+		rxMsg = &rxMsgBuffer;
+
+		// these are just good approximates
+		rssiClear = 0;
+		rssiBusy = 90;
+
+		return SUCCESS;
+	}
+
+	command error_t SoftwareInit.init()
+	{
+		// for powering up the radio
+		return call SpiResource.request();
+	}
+
+	void initRadio()
+	{
+		call BusyWait.wait(510);
+
+		call RSTN.clr();
+		call SLP_TR.clr();
+		call BusyWait.wait(6);
+		call RSTN.set();
+
+		writeRegister(RF230_TRX_CTRL_0, RF230_TRX_CTRL_0_VALUE);
+		writeRegister(RF230_TRX_STATE, RF230_TRX_OFF);
+
+		call BusyWait.wait(510);
+
+		writeRegister(RF230_IRQ_MASK, RF230_IRQ_TRX_UR | RF230_IRQ_PLL_LOCK | RF230_IRQ_TRX_END | RF230_IRQ_RX_START);
+		writeRegister(RF230_CCA_THRES, RF230_CCA_THRES_VALUE);
+		writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | (RF230_DEF_RFPOWER & RF230_TX_PWR_MASK));
+
+		txPower = RF230_DEF_RFPOWER & RF230_TX_PWR_MASK;
+		channel = RF230_DEF_CHANNEL & RF230_CHANNEL_MASK;
+		writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);
+
+		call SLP_TR.set();
+		state = STATE_SLEEP;
+	}
+
+/*----------------- SPI -----------------*/
+
+	event void SpiResource.granted()
+	{
+		call SELN.makeOutput();
+		call SELN.set();
+
+		if( state == STATE_P_ON )
+		{
+			initRadio();
+			call SpiResource.release();
+		}
+		else
+			call Tasklet.schedule();
+	}
+
+	bool isSpiAcquired()
+	{
+		if( call SpiResource.isOwner() )
+			return TRUE;
+
+		if( call SpiResource.immediateRequest() == SUCCESS )
+		{
+			call SELN.makeOutput();
+			call SELN.set();
+
+			return TRUE;
+		}
+
+		call SpiResource.request();
+		return FALSE;
+	}
+
+/*----------------- CHANNEL -----------------*/
+
+	tasklet_async command uint8_t RadioState.getChannel()
+	{
+		return channel;
+	}
+
+	tasklet_async command error_t RadioState.setChannel(uint8_t c)
+	{
+		c &= RF230_CHANNEL_MASK;
+
+		if( cmd != CMD_NONE )
+			return EBUSY;
+		else if( channel == c )
+			return EALREADY;
+
+		channel = c;
+		cmd = CMD_CHANNEL;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	inline void changeChannel()
+	{
+		RADIO_ASSERT( cmd == CMD_CHANNEL );
+		RADIO_ASSERT( state == STATE_SLEEP || state == STATE_TRX_OFF || state == STATE_RX_ON );
+
+		if( isSpiAcquired() )
+		{
+			writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);
+
+			if( state == STATE_RX_ON )
+				state = STATE_TRX_OFF_2_RX_ON;
+			else
+				cmd = CMD_SIGNAL_DONE;
+		}
+	}
+
+/*----------------- TURN ON/OFF -----------------*/
+
+	inline void changeState()
+	{
+		if( (cmd == CMD_STANDBY || cmd == CMD_TURNON)
+			&& state == STATE_SLEEP && call RadioAlarm.isFree() )
+		{
+			call SLP_TR.clr();
+
+			call RadioAlarm.wait(SLEEP_WAKEUP_TIME);
+			state = STATE_SLEEP_2_TRX_OFF;
+		}
+		else if( cmd == CMD_TURNON && state == STATE_TRX_OFF && isSpiAcquired() )
+		{
+			RADIO_ASSERT( ! radioIrq );
+
+			readRegister(RF230_IRQ_STATUS); // clear the interrupt register
+			call IRQ.captureRisingEdge();
+
+			// setChannel was ignored in SLEEP because the SPI was not working, so do it here
+			writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);
+
+			writeRegister(RF230_TRX_STATE, RF230_RX_ON);
+			state = STATE_TRX_OFF_2_RX_ON;
+
+#ifdef RADIO_DEBUG_PARTNUM
+			if( call DiagMsg.record() )
+			{
+				call DiagMsg.str("partnum");
+				call DiagMsg.hex8(readRegister(RF230_PART_NUM));
+				call DiagMsg.hex8(readRegister(RF230_VERSION_NUM));
+				call DiagMsg.hex8(readRegister(RF230_MAN_ID_0));
+				call DiagMsg.hex8(readRegister(RF230_MAN_ID_1));
+				call DiagMsg.send();
+			}
+#endif
+		}
+		else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) 
+			&& state == STATE_RX_ON && isSpiAcquired() )
+		{
+			writeRegister(RF230_TRX_STATE, RF230_FORCE_TRX_OFF);
+
+			call IRQ.disable();
+			radioIrq = FALSE;
+
+			state = STATE_TRX_OFF;
+		}
+
+		if( cmd == CMD_TURNOFF && state == STATE_TRX_OFF )
+		{
+			call SLP_TR.set();
+			state = STATE_SLEEP;
+			cmd = CMD_SIGNAL_DONE;
+		}
+		else if( cmd == CMD_STANDBY && state == STATE_TRX_OFF )
+			cmd = CMD_SIGNAL_DONE;
+	}
+
+	tasklet_async command error_t RadioState.turnOff()
+	{
+		if( cmd != CMD_NONE )
+			return EBUSY;
+		else if( state == STATE_SLEEP )
+			return EALREADY;
+
+		cmd = CMD_TURNOFF;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+	
+	tasklet_async command error_t RadioState.standby()
+	{
+		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
+			return EBUSY;
+		else if( state == STATE_TRX_OFF )
+			return EALREADY;
+
+		cmd = CMD_STANDBY;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	tasklet_async command error_t RadioState.turnOn()
+	{
+		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
+			return EBUSY;
+		else if( state == STATE_RX_ON )
+			return EALREADY;
+
+		cmd = CMD_TURNON;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioState.done() { }
+
+/*----------------- TRANSMIT -----------------*/
+
+	tasklet_async command error_t RadioSend.send(message_t* msg)
+	{
+		uint16_t time;
+		uint8_t length;
+		uint8_t* data;
+		uint8_t header;
+		uint32_t time32;
+		void* timesync;
+
+		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || radioIrq )
+			return EBUSY;
+
+		length = (call PacketTransmitPower.isSet(msg) ?
+			call PacketTransmitPower.get(msg) : RF230_DEF_RFPOWER) & RF230_TX_PWR_MASK;
+
+		if( length != txPower )
+		{
+			txPower = length;
+			writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | txPower);
+		}
+
+		if( call Config.requiresRssiCca(msg) 
+				&& (readRegister(RF230_PHY_RSSI) & RF230_RSSI_MASK) > ((rssiClear + rssiBusy) >> 3) )
+			return EBUSY;
+
+		writeRegister(RF230_TRX_STATE, RF230_PLL_ON);
+
+		// do something useful, just to wait a little
+		time32 = call LocalTime.get();
+		timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0;
+
+		// we have missed an incoming message in this short amount of time
+		if( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) != RF230_PLL_ON )
+		{
+			RADIO_ASSERT( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) == RF230_BUSY_RX );
+
+			writeRegister(RF230_TRX_STATE, RF230_RX_ON);
+			return EBUSY;
+		}
+
+#ifndef RF230_SLOW_SPI
+		atomic
+		{
+			call SLP_TR.set();
+			time = call RadioAlarm.getNow();
+		}
+		call SLP_TR.clr();
+#endif
+
+		RADIO_ASSERT( ! radioIrq );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF230_CMD_FRAME_WRITE);
+
+		data = getPayload(msg);
+		length = getHeader(msg)->length;
+
+		// length | data[0] ... data[length-3] | automatically generated FCS
+		call FastSpiByte.splitReadWrite(length);
+
+		// the FCS is atomatically generated (2 bytes)
+		length -= 2;
+
+		header = call Config.headerPreloadLength();
+		if( header > length )
+			header = length;
+
+		length -= header;
+
+		// first upload the header to gain some time
+		do {
+			call FastSpiByte.splitReadWrite(*(data++));
+		}
+		while( --header != 0 );
+
+#ifdef RF230_SLOW_SPI
+		atomic
+		{
+			call SLP_TR.set();
+			time = call RadioAlarm.getNow();
+		}
+		call SLP_TR.clr();
+#endif
+
+		time32 += (int16_t)(time + TX_SFD_DELAY) - (int16_t)(time32);
+
+		if( timesync != 0 )
+			*(timesync_relative_t*)timesync = (*(timesync_absolute_t*)timesync) - time32;
+
+		while( length-- != 0 )
+			call FastSpiByte.splitReadWrite(*(data++));
+
+		// wait for the SPI transfer to finish
+		call FastSpiByte.splitRead();
+		call SELN.set();
+
+		/*
+		 * There is a very small window (~1 microsecond) when the RF230 went 
+		 * into PLL_ON state but was somehow not properly initialized because 
+		 * of an incoming message and could not go into BUSY_TX. I think the
+		 * radio can even receive a message, and generate a TRX_UR interrupt
+		 * because of concurrent access, but that message probably cannot be
+		 * recovered.
+		 *
+		 * TODO: this needs to be verified, and make sure that the chip is 
+		 * not locked up in this case.
+		 */
+
+		// go back to RX_ON state when finished
+		writeRegister(RF230_TRX_STATE, RF230_RX_ON);
+
+		if( timesync != 0 )
+			*(timesync_absolute_t*)timesync = (*(timesync_relative_t*)timesync) + time32;
+
+		call PacketTimeStamp.set(msg, time32);
+
+#ifdef RADIO_DEBUG_MESSAGES
+		if( call DiagMsg.record() )
+		{
+			length = getHeader(msg)->length;
+
+			call DiagMsg.chr('t');
+			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.int8(length);
+			call DiagMsg.hex8s(getPayload(msg), length - 2);
+			call DiagMsg.send();
+		}
+#endif
+
+		// wait for the TRX_END interrupt
+		state = STATE_BUSY_TX_2_RX_ON;
+		cmd = CMD_TRANSMIT;
+
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioSend.sendDone(error_t error) { }
+	default tasklet_async event void RadioSend.ready() { }
+
+/*----------------- CCA -----------------*/
+
+	tasklet_async command error_t RadioCCA.request()
+	{
+		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || ! call RadioAlarm.isFree() )
+			return EBUSY;
+
+		// see Errata B7 of the datasheet
+		// writeRegister(RF230_TRX_STATE, RF230_PLL_ON);
+		// writeRegister(RF230_TRX_STATE, RF230_RX_ON);
+
+		writeRegister(RF230_PHY_CC_CCA, RF230_CCA_REQUEST | RF230_CCA_MODE_VALUE | channel);
+		call RadioAlarm.wait(CCA_REQUEST_TIME);
+		cmd = CMD_CCA;
+		
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioCCA.done(error_t error) { }
+
+/*----------------- RECEIVE -----------------*/
+
+	inline void downloadMessage()
+	{
+		uint8_t length;
+		uint16_t crc;
+
+		call SELN.clr();
+		call FastSpiByte.write(RF230_CMD_FRAME_READ);
+
+		// read the length byte
+		length = call FastSpiByte.write(0);
+
+		// if correct length
+		if( length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2 )
+		{
+			uint8_t read;
+			uint8_t* data;
+
+			// initiate the reading
+			call FastSpiByte.splitWrite(0);
+
+			data = getPayload(rxMsg);
+			getHeader(rxMsg)->length = length;
+			crc = 0;
+
+			// we do not store the CRC field
+			length -= 2;
+
+			read = call Config.headerPreloadLength();
+			if( length < read )
+				read = length;
+
+			length -= read;
+
+			do {
+				crc = RF230_CRCBYTE_COMMAND(crc, *(data++) = call FastSpiByte.splitReadWrite(0));
+			}
+			while( --read != 0  );
+
+			if( signal RadioReceive.header(rxMsg) )
+			{
+				while( length-- != 0 )
+					crc = RF230_CRCBYTE_COMMAND(crc, *(data++) = call FastSpiByte.splitReadWrite(0));
+
+				crc = RF230_CRCBYTE_COMMAND(crc, call FastSpiByte.splitReadWrite(0));
+				crc = RF230_CRCBYTE_COMMAND(crc, call FastSpiByte.splitReadWrite(0));
+
+				call PacketLinkQuality.set(rxMsg, call FastSpiByte.splitRead());
+			}
+			else
+				crc = 1;
+		}
+		else
+			crc = 1;
+
+		call SELN.set();
+		state = STATE_RX_ON;
+
+#ifdef RADIO_DEBUG_MESSAGES
+		if( call DiagMsg.record() )
+		{
+			length = getHeader(rxMsg)->length;
+
+			call DiagMsg.chr('r');
+			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.int8(crc == 0 ? length : -length);
+			call DiagMsg.hex8s(getPayload(rxMsg), length - 2);
+			call DiagMsg.int8(call PacketRSSI.isSet(rxMsg) ? call PacketRSSI.get(rxMsg) : -1);
+			call DiagMsg.uint8(call PacketLinkQuality.isSet(rxMsg) ? call PacketLinkQuality.get(rxMsg) : 0);
+			call DiagMsg.send();
+		}
+#endif
+		
+		cmd = CMD_NONE;
+
+		// signal only if it has passed the CRC check
+		if( crc == 0 )
+			rxMsg = signal RadioReceive.receive(rxMsg);
+	}
+
+/*----------------- IRQ -----------------*/
+
+	async event void IRQ.captured(uint16_t time)
+	{
+		RADIO_ASSERT( ! radioIrq );
+
+		atomic
+		{
+			capturedTime = time;
+			radioIrq = TRUE;
+		}
+
+		call Tasklet.schedule();
+	}
+
+	void serviceRadio()
+	{
+		if( isSpiAcquired() )
+		{
+			uint16_t time;
+			uint32_t time32;
+			uint8_t irq;
+			uint8_t temp;
+			
+			atomic time = capturedTime;
+			radioIrq = FALSE;
+			irq = readRegister(RF230_IRQ_STATUS);
+
+#ifdef RADIO_DEBUG
+			// TODO: handle this interrupt
+			if( irq & RF230_IRQ_TRX_UR )
+			{
+				if( call DiagMsg.record() )
+				{
+					call DiagMsg.str("assert ur");
+					call DiagMsg.uint16(call RadioAlarm.getNow());
+					call DiagMsg.hex8(readRegister(RF230_TRX_STATUS));
+					call DiagMsg.hex8(readRegister(RF230_TRX_STATE));
+					call DiagMsg.hex8(irq);
+					call DiagMsg.uint8(state);
+					call DiagMsg.uint8(cmd);
+					call DiagMsg.send();
+				}
+			}
+#endif
+
+#ifdef RF230_RSSI_ENERGY
+			if( irq & RF230_IRQ_TRX_END )
+			{
+				if( irq == RF230_IRQ_TRX_END || 
+					(irq == (RF230_IRQ_RX_START | RF230_IRQ_TRX_END) && cmd == CMD_NONE) )
+					call PacketRSSI.set(rxMsg, readRegister(RF230_PHY_ED_LEVEL));
+				else
+					call PacketRSSI.clear(rxMsg);
+			}
+#endif
+
+			// sometimes we miss a PLL lock interrupt after turn on
+			if( cmd == CMD_TURNON || cmd == CMD_CHANNEL )
+			{
+				RADIO_ASSERT( irq & RF230_IRQ_PLL_LOCK );
+				RADIO_ASSERT( state == STATE_TRX_OFF_2_RX_ON );
+
+				state = STATE_RX_ON;
+				cmd = CMD_SIGNAL_DONE;
+			}
+			else if( irq & RF230_IRQ_PLL_LOCK )
+			{
+				RADIO_ASSERT( cmd == CMD_TRANSMIT );
+				RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON );
+			}
+
+			if( irq & RF230_IRQ_RX_START )
+			{
+				if( cmd == CMD_CCA )
+				{
+					signal RadioCCA.done(FAIL);
+					cmd = CMD_NONE;
+				}
+
+				if( cmd == CMD_NONE )
+				{
+					RADIO_ASSERT( state == STATE_RX_ON );
+
+					// the most likely place for busy channel, with no TRX_END interrupt
+					if( irq == RF230_IRQ_RX_START )
+					{
+						temp = readRegister(RF230_PHY_RSSI) & RF230_RSSI_MASK;
+						rssiBusy += temp - (rssiBusy >> 2);
+#ifndef RF230_RSSI_ENERGY
+						call PacketRSSI.set(rxMsg, temp);
+					}
+					else
+					{
+						call PacketRSSI.clear(rxMsg);
+#endif
+					}
+
+					/*
+					 * The timestamp corresponds to the first event which could not
+					 * have been a PLL_LOCK because then cmd != CMD_NONE, so we must
+					 * have received a message (and could also have received the 
+					 * TRX_END interrupt in the mean time, but that is fine. Also,
+					 * we could not be after a transmission, because then cmd = 
+					 * CMD_TRANSMIT.
+					 */
+					if( irq == RF230_IRQ_RX_START ) // just to be cautious
+					{
+						time32 = call LocalTime.get();
+						time32 += (int16_t)(time - RX_SFD_DELAY) - (int16_t)(time32);
+						call PacketTimeStamp.set(rxMsg, time32);
+					}
+					else
+						call PacketTimeStamp.clear(rxMsg);
+
+					cmd = CMD_RECEIVE;
+				}
+				else
+					RADIO_ASSERT( cmd == CMD_TURNOFF );
+			}
+
+			if( irq & RF230_IRQ_TRX_END )
+			{
+				if( cmd == CMD_TRANSMIT )
+				{
+					RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON );
+
+					state = STATE_RX_ON;
+					cmd = CMD_NONE;
+					signal RadioSend.sendDone(SUCCESS);
+
+					// TODO: we could have missed a received message
+					RADIO_ASSERT( ! (irq & RF230_IRQ_RX_START) );
+				}
+				else if( cmd == CMD_RECEIVE )
+				{
+					RADIO_ASSERT( state == STATE_RX_ON );
+
+					// the most likely place for clear channel (hope to avoid acks)
+					rssiClear += (readRegister(RF230_PHY_RSSI) & RF230_RSSI_MASK) - (rssiClear >> 2);
+
+					cmd = CMD_DOWNLOAD;
+				}
+				else
+					RADIO_ASSERT(FALSE);
+			}
+		}
+	}
+
+	default tasklet_async event bool RadioReceive.header(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	default tasklet_async event message_t* RadioReceive.receive(message_t* msg)
+	{
+		return msg;
+	}
+
+/*----------------- TASKLET -----------------*/
+
+	task void releaseSpi()
+	{
+		call SpiResource.release();
+	}
+
+	tasklet_async event void Tasklet.run()
+	{
+		if( radioIrq )
+			serviceRadio();
+
+		if( cmd != CMD_NONE )
+		{
+			if( cmd == CMD_DOWNLOAD )
+				downloadMessage();
+			else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON )
+				changeState();
+			else if( cmd == CMD_CHANNEL )
+				changeChannel();
+			
+			if( cmd == CMD_SIGNAL_DONE )
+			{
+				cmd = CMD_NONE;
+				signal RadioState.done();
+			}
+		}
+
+		if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq )
+			signal RadioSend.ready();
+
+		if( cmd == CMD_NONE )
+			post releaseSpi();
+	}
+
+/*----------------- RadioPacket -----------------*/
+	
+	async command uint8_t RadioPacket.headerLength(message_t* msg)
+	{
+		return call Config.headerLength(msg) + sizeof(rf230_header_t);
+	}
+
+	async command uint8_t RadioPacket.payloadLength(message_t* msg)
+	{
+		return getHeader(msg)->length - 2;
+	}
+
+	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		RADIO_ASSERT( 1 <= length && length <= 125 );
+		RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) );
+
+		// we add the length of the CRC, which is automatically generated
+		getHeader(msg)->length = length + 2;
+	}
+
+	async command uint8_t RadioPacket.maxPayloadLength()
+	{
+		RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(rf230_header_t) <= 125 );
+
+		return call Config.maxPayloadLength() - sizeof(rf230_header_t);
+	}
+
+	async command uint8_t RadioPacket.metadataLength(message_t* msg)
+	{
+		return call Config.metadataLength(msg) + sizeof(rf230_metadata_t);
+	}
+
+	async command void RadioPacket.clear(message_t* msg)
+	{
+		// all flags are automatically cleared
+	}
+
+/*----------------- PacketTransmitPower -----------------*/
+
+	async command bool PacketTransmitPower.isSet(message_t* msg)
+	{
+		return call TransmitPowerFlag.get(msg);
+	}
+
+	async command uint8_t PacketTransmitPower.get(message_t* msg)
+	{
+		return getMeta(msg)->power;
+	}
+
+	async command void PacketTransmitPower.clear(message_t* msg)
+	{
+		call TransmitPowerFlag.clear(msg);
+	}
+
+	async command void PacketTransmitPower.set(message_t* msg, uint8_t value)
+	{
+		call TransmitPowerFlag.set(msg);
+		getMeta(msg)->power = value;
+	}
+
+/*----------------- PacketRSSI -----------------*/
+
+	async command bool PacketRSSI.isSet(message_t* msg)
+	{
+		return call RSSIFlag.get(msg);
+	}
+
+	async command uint8_t PacketRSSI.get(message_t* msg)
+	{
+		return getMeta(msg)->rssi;
+	}
+
+	async command void PacketRSSI.clear(message_t* msg)
+	{
+		call RSSIFlag.clear(msg);
+	}
+
+	async command void PacketRSSI.set(message_t* msg, uint8_t value)
+	{
+		// just to be safe if the user fails to clear the packet
+		call TransmitPowerFlag.clear(msg);
+
+		call RSSIFlag.set(msg);
+		getMeta(msg)->rssi = value;
+	}
+
+/*----------------- PacketTimeSyncOffset -----------------*/
+
+	async command bool PacketTimeSyncOffset.isSet(message_t* msg)
+	{
+		return call TimeSyncFlag.get(msg);
+	}
+
+	async command uint8_t PacketTimeSyncOffset.get(message_t* msg)
+	{
+		return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t);
+	}
+
+	async command void PacketTimeSyncOffset.clear(message_t* msg)
+	{
+		call TimeSyncFlag.clear(msg);
+	}
+
+	async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value)
+	{
+		// we do not store the value, the time sync field is always the last 4 bytes
+		RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value );
+
+		call TimeSyncFlag.set(msg);
+	}
+
+/*----------------- PacketLinkQuality -----------------*/
+
+	async command bool PacketLinkQuality.isSet(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	async command uint8_t PacketLinkQuality.get(message_t* msg)
+	{
+		return getMeta(msg)->lqi;
+	}
+
+	async command void PacketLinkQuality.clear(message_t* msg)
+	{
+	}
+
+	async command void PacketLinkQuality.set(message_t* msg, uint8_t value)
+	{
+		getMeta(msg)->lqi = value;
+	}
+}
diff --git a/tos/chips/rf230/RF230Ieee154MessageC.nc b/tos/chips/rf230/RF230Ieee154MessageC.nc
new file mode 100644
index 00000000..d8b60936
--- /dev/null
+++ b/tos/chips/rf230/RF230Ieee154MessageC.nc
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+#ifdef TFRAMES_ENABLED
+#error "You cannot use Ieee154MessageC with TFRAMES_ENABLED defined"
+#endif
+
+configuration RF230Ieee154MessageC
+{
+	provides 
+	{
+		interface SplitControl;
+
+		interface Ieee154Send;
+		interface Receive as Ieee154Receive;
+		interface SendNotifier;
+
+		interface Ieee154Packet;
+		interface Packet;
+		interface Resource as SendResource[uint8_t clint];
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+		interface PacketLink;
+
+		interface RadioChannel;
+
+		interface PacketField<uint8_t> as PacketLinkQuality;
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	components RF230RadioC;
+
+	SplitControl = RF230RadioC;
+
+	Ieee154Send = RF230RadioC.Ieee154Send;
+	Ieee154Receive = RF230RadioC.Ieee154Receive;
+	SendNotifier = RF230RadioC.Ieee154Notifier;
+
+	Packet = RF230RadioC.PacketForIeee154Message;
+	Ieee154Packet = RF230RadioC;
+	SendResource = RF230RadioC;
+
+	PacketAcknowledgements = RF230RadioC;
+	LowPowerListening = RF230RadioC;
+	PacketLink = RF230RadioC;
+
+	RadioChannel = RF230RadioC;
+
+	PacketLinkQuality = RF230RadioC.PacketLinkQuality;
+	PacketTransmitPower = RF230RadioC.PacketTransmitPower;
+	PacketRSSI = RF230RadioC.PacketRSSI;
+
+	LocalTimeRadio = RF230RadioC;
+	PacketTimeStampMilli = RF230RadioC;
+	PacketTimeStampRadio = RF230RadioC;
+}
diff --git a/tos/chips/rf230/RF230Radio.h b/tos/chips/rf230/RF230Radio.h
new file mode 100644
index 00000000..1a041861
--- /dev/null
+++ b/tos/chips/rf230/RF230Radio.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __RF230RADIO_H__
+#define __RF230RADIO_H__
+
+#include <RadioConfig.h>
+#include <TinyosNetworkLayer.h>
+#include <Ieee154PacketLayer.h>
+#include <ActiveMessageLayer.h>
+#include <MetadataFlagsLayer.h>
+#include <RF230DriverLayer.h>
+#include <TimeStampingLayer.h>
+#include <LowPowerListeningLayer.h>
+#include <PacketLinkLayer.h>
+
+typedef nx_struct rf230packet_header_t
+{
+	rf230_header_t rf230;
+	ieee154_header_t ieee154;
+#ifndef TFRAMES_ENABLED
+	network_header_t network;
+#endif
+#ifndef IEEE154FRAMES_ENABLED
+	activemessage_header_t am;
+#endif
+} rf230packet_header_t;
+
+typedef nx_struct rf230packet_footer_t
+{
+	// the time stamp is not recorded here, time stamped messaged cannot have max length
+} rf230packet_footer_t;
+
+typedef struct rf230packet_metadata_t
+{
+#ifdef LOW_POWER_LISTENING
+	lpl_metadata_t lpl;
+#endif
+#ifdef PACKET_LINK
+	link_metadata_t link;
+#endif
+	timestamp_metadata_t timestamp;
+	flags_metadata_t flags;
+	rf230_metadata_t rf230;
+} rf230packet_metadata_t;
+
+#endif//__RF230RADIO_H__
diff --git a/tos/chips/rf230/RF230RadioC.nc b/tos/chips/rf230/RF230RadioC.nc
new file mode 100644
index 00000000..eb8865c1
--- /dev/null
+++ b/tos/chips/rf230/RF230RadioC.nc
@@ -0,0 +1,313 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+configuration RF230RadioC
+{
+	provides 
+	{
+		interface SplitControl;
+
+#ifndef IEEE154FRAMES_ENABLED
+		interface AMSend[am_id_t id];
+		interface Receive[am_id_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface SendNotifier[am_id_t id];
+
+		// for TOSThreads
+		interface Receive as ReceiveDefault[am_id_t id];
+		interface Receive as SnoopDefault[am_id_t id];
+
+		interface AMPacket;
+		interface Packet as PacketForActiveMessage;
+#endif
+
+#ifndef TFRAMES_ENABLED
+		interface Ieee154Send;
+		interface Receive as Ieee154Receive;
+		interface SendNotifier as Ieee154Notifier;
+
+		interface Resource as SendResource[uint8_t clint];
+
+		interface Ieee154Packet;
+		interface Packet as PacketForIeee154Message;
+#endif
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+
+#ifdef PACKET_LINK
+		interface PacketLink;
+#endif
+
+		interface RadioChannel;
+
+		interface PacketField<uint8_t> as PacketLinkQuality;
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	#define UQ_METADATA_FLAGS	"UQ_RF230_METADATA_FLAGS"
+	#define UQ_RADIO_ALARM		"UQ_RF230_RADIO_ALARM"
+
+// -------- RF230 RadioP
+
+	components RF230RadioP;
+
+#ifdef RADIO_DEBUG
+	components AssertC;
+#endif
+
+	RF230RadioP.Ieee154PacketLayer -> Ieee154PacketLayerC;
+	RF230RadioP.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+	RF230RadioP.PacketTimeStamp -> TimeStampingLayerC;
+	RF230RadioP.RF230Packet -> RF230DriverLayerC;
+
+// -------- RadioAlarm
+
+	components new RadioAlarmC();
+	RadioAlarmC.Alarm -> RF230DriverLayerC;
+
+// -------- Active Message
+
+#ifndef IEEE154FRAMES_ENABLED
+	components new ActiveMessageLayerC();
+	ActiveMessageLayerC.Config -> RF230RadioP;
+	ActiveMessageLayerC.SubSend -> AutoResourceAcquireLayerC;
+	ActiveMessageLayerC.SubReceive -> TinyosNetworkLayerC.TinyosReceive;
+	ActiveMessageLayerC.SubPacket -> TinyosNetworkLayerC.TinyosPacket;
+
+	AMSend = ActiveMessageLayerC;
+	Receive = ActiveMessageLayerC.Receive;
+	Snoop = ActiveMessageLayerC.Snoop;
+	SendNotifier = ActiveMessageLayerC;
+	AMPacket = ActiveMessageLayerC;
+	PacketForActiveMessage = ActiveMessageLayerC;
+
+	ReceiveDefault = ActiveMessageLayerC.ReceiveDefault;
+	SnoopDefault = ActiveMessageLayerC.SnoopDefault;
+#endif
+
+// -------- Automatic RadioSend Resource
+
+#ifndef IEEE154FRAMES_ENABLED
+#ifndef TFRAMES_ENABLED
+	components new AutoResourceAcquireLayerC();
+	AutoResourceAcquireLayerC.Resource -> SendResourceC.Resource[unique(RADIO_SEND_RESOURCE)];
+#else
+	components new DummyLayerC() as AutoResourceAcquireLayerC;
+#endif
+	AutoResourceAcquireLayerC -> TinyosNetworkLayerC.TinyosSend;
+#endif
+
+// -------- RadioSend Resource
+
+#ifndef TFRAMES_ENABLED
+	components new SimpleFcfsArbiterC(RADIO_SEND_RESOURCE) as SendResourceC;
+	SendResource = SendResourceC;
+
+// -------- Ieee154 Message
+
+	components new Ieee154MessageLayerC();
+	Ieee154MessageLayerC.Ieee154PacketLayer -> Ieee154PacketLayerC;
+	Ieee154MessageLayerC.SubSend -> TinyosNetworkLayerC.Ieee154Send;
+	Ieee154MessageLayerC.SubReceive -> TinyosNetworkLayerC.Ieee154Receive;
+	Ieee154MessageLayerC.RadioPacket -> TinyosNetworkLayerC.Ieee154Packet;
+
+	Ieee154Send = Ieee154MessageLayerC;
+	Ieee154Receive = Ieee154MessageLayerC;
+	Ieee154Notifier = Ieee154MessageLayerC;
+	Ieee154Packet = Ieee154PacketLayerC;
+	PacketForIeee154Message = Ieee154MessageLayerC;
+#endif
+
+// -------- Tinyos Network
+
+	components new TinyosNetworkLayerC();
+
+	TinyosNetworkLayerC.SubSend -> UniqueLayerC;
+	TinyosNetworkLayerC.SubReceive -> LowPowerListeningLayerC;
+	TinyosNetworkLayerC.SubPacket -> Ieee154PacketLayerC;
+
+// -------- IEEE 802.15.4 Packet
+
+	components new Ieee154PacketLayerC();
+	Ieee154PacketLayerC.SubPacket -> LowPowerListeningLayerC;
+
+// -------- UniqueLayer Send part (wired twice)
+
+	components new UniqueLayerC();
+	UniqueLayerC.Config -> RF230RadioP;
+	UniqueLayerC.SubSend -> LowPowerListeningLayerC;
+
+// -------- Low Power Listening 
+
+#ifdef LOW_POWER_LISTENING
+	#warning "*** USING LOW POWER LISTENING LAYER"
+	components new LowPowerListeningLayerC();
+	LowPowerListeningLayerC.Config -> RF230RadioP;
+#ifdef RF230_HARDWARE_ACK
+	LowPowerListeningLayerC.PacketAcknowledgements -> RF230DriverLayerC;
+#else
+	LowPowerListeningLayerC.PacketAcknowledgements -> SoftwareAckLayerC;
+#endif
+#else	
+	components new LowPowerListeningDummyC() as LowPowerListeningLayerC;
+#endif
+	LowPowerListeningLayerC.SubControl -> MessageBufferLayerC;
+	LowPowerListeningLayerC.SubSend -> PacketLinkLayerC;
+	LowPowerListeningLayerC.SubReceive -> PacketLinkLayerC;
+	LowPowerListeningLayerC.SubPacket -> PacketLinkLayerC;
+	SplitControl = LowPowerListeningLayerC;
+	LowPowerListening = LowPowerListeningLayerC;
+
+// -------- Packet Link
+
+#ifdef PACKET_LINK
+	components new PacketLinkLayerC();
+	PacketLink = PacketLinkLayerC;
+#ifdef RF230_HARDWARE_ACK
+	PacketLinkLayerC.PacketAcknowledgements -> RF230DriverLayerC;
+#else
+	PacketLinkLayerC.PacketAcknowledgements -> SoftwareAckLayerC;
+#endif
+#else
+	components new DummyLayerC() as PacketLinkLayerC;
+#endif
+	PacketLinkLayerC -> MessageBufferLayerC.Send;
+	PacketLinkLayerC -> MessageBufferLayerC.Receive;
+	PacketLinkLayerC -> TimeStampingLayerC.RadioPacket;
+
+// -------- MessageBuffer
+
+	components new MessageBufferLayerC();
+	MessageBufferLayerC.RadioSend -> TrafficMonitorLayerC;
+	MessageBufferLayerC.RadioReceive -> UniqueLayerC;
+	MessageBufferLayerC.RadioState -> TrafficMonitorLayerC;
+	RadioChannel = MessageBufferLayerC;
+
+// -------- UniqueLayer receive part (wired twice)
+
+	UniqueLayerC.SubReceive -> TrafficMonitorLayerC;
+
+// -------- Traffic Monitor
+
+#ifdef TRAFFIC_MONITOR
+	components new TrafficMonitorLayerC();
+#else
+	components new DummyLayerC() as TrafficMonitorLayerC;
+#endif
+	TrafficMonitorLayerC.Config -> RF230RadioP;
+	TrafficMonitorLayerC -> CollisionAvoidanceLayerC.RadioSend;
+	TrafficMonitorLayerC -> CollisionAvoidanceLayerC.RadioReceive;
+	TrafficMonitorLayerC -> RF230DriverLayerC.RadioState;
+
+// -------- CollisionAvoidance
+
+#ifdef SLOTTED_MAC
+	components new SlottedCollisionLayerC() as CollisionAvoidanceLayerC;
+#else
+	components new RandomCollisionLayerC() as CollisionAvoidanceLayerC;
+#endif
+	CollisionAvoidanceLayerC.Config -> RF230RadioP;
+	CollisionAvoidanceLayerC.SubSend -> SoftwareAckLayerC;
+	CollisionAvoidanceLayerC.SubReceive -> SoftwareAckLayerC;
+	CollisionAvoidanceLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+
+// -------- SoftwareAcknowledgement
+
+#ifndef RF230_HARDWARE_ACK
+	components new SoftwareAckLayerC();
+	SoftwareAckLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	SoftwareAckLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+	PacketAcknowledgements = SoftwareAckLayerC;
+#else
+	components new DummyLayerC() as SoftwareAckLayerC;
+#endif
+	SoftwareAckLayerC.Config -> RF230RadioP;
+	SoftwareAckLayerC.SubSend -> CsmaLayerC;
+	SoftwareAckLayerC.SubReceive -> CsmaLayerC;
+
+// -------- Carrier Sense
+
+	components new DummyLayerC() as CsmaLayerC;
+	CsmaLayerC.Config -> RF230RadioP;
+	CsmaLayerC -> RF230DriverLayerC.RadioSend;
+	CsmaLayerC -> RF230DriverLayerC.RadioReceive;
+	CsmaLayerC -> RF230DriverLayerC.RadioCCA;
+
+// -------- TimeStamping
+
+	components new TimeStampingLayerC();
+	TimeStampingLayerC.LocalTimeRadio -> RF230DriverLayerC;
+	TimeStampingLayerC.SubPacket -> MetadataFlagsLayerC;
+	PacketTimeStampRadio = TimeStampingLayerC;
+	PacketTimeStampMilli = TimeStampingLayerC;
+	TimeStampingLayerC.TimeStampFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+
+// -------- MetadataFlags
+
+	components new MetadataFlagsLayerC();
+	MetadataFlagsLayerC.SubPacket -> RF230DriverLayerC;
+
+// -------- RF230 Driver
+
+#ifdef RF230_HARDWARE_ACK
+	components RF230DriverHwAckC as RF230DriverLayerC;
+	PacketAcknowledgements = RF230DriverLayerC;
+	RF230DriverLayerC.Ieee154PacketLayer -> Ieee154PacketLayerC;
+	RF230DriverLayerC.AckReceivedFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+#else
+	components RF230DriverLayerC;
+#endif
+	RF230DriverLayerC.Config -> RF230RadioP;
+	RF230DriverLayerC.PacketTimeStamp -> TimeStampingLayerC;
+	PacketTransmitPower = RF230DriverLayerC.PacketTransmitPower;
+	PacketLinkQuality = RF230DriverLayerC.PacketLinkQuality;
+	PacketRSSI = RF230DriverLayerC.PacketRSSI;
+	LocalTimeRadio = RF230DriverLayerC;
+
+	RF230DriverLayerC.TransmitPowerFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	RF230DriverLayerC.RSSIFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	RF230DriverLayerC.TimeSyncFlag -> MetadataFlagsLayerC.PacketFlag[unique(UQ_METADATA_FLAGS)];
+	RF230DriverLayerC.RadioAlarm -> RadioAlarmC.RadioAlarm[unique(UQ_RADIO_ALARM)];
+}
diff --git a/tos/chips/rf230/RF230RadioP.nc b/tos/chips/rf230/RF230RadioP.nc
new file mode 100644
index 00000000..847e32fb
--- /dev/null
+++ b/tos/chips/rf230/RF230RadioP.nc
@@ -0,0 +1,382 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RF230Radio.h>
+#include <RadioConfig.h>
+#include <Tasklet.h>
+
+module RF230RadioP
+{
+	provides
+	{
+		interface RF230DriverConfig;
+		interface SoftwareAckConfig;
+		interface UniqueConfig;
+		interface CsmaConfig;
+		interface TrafficMonitorConfig;
+		interface RandomCollisionConfig;
+		interface SlottedCollisionConfig;
+		interface ActiveMessageConfig;
+		interface DummyConfig;
+
+#ifdef LOW_POWER_LISTENING
+		interface LowPowerListeningConfig;
+#endif
+	}
+
+	uses
+	{
+		interface Ieee154PacketLayer;
+		interface RadioAlarm;
+		interface RadioPacket as RF230Packet;
+
+		interface PacketTimeStamp<TRadio, uint32_t>;
+	}
+}
+
+implementation
+{
+
+/*----------------- RF230DriverConfig -----------------*/
+
+	async command uint8_t RF230DriverConfig.headerLength(message_t* msg)
+	{
+		return offsetof(message_t, data) - sizeof(rf230packet_header_t);
+	}
+
+	async command uint8_t RF230DriverConfig.maxPayloadLength()
+	{
+		return sizeof(rf230packet_header_t) + TOSH_DATA_LENGTH;
+	}
+
+	async command uint8_t RF230DriverConfig.metadataLength(message_t* msg)
+	{
+		return 0;
+	}
+
+	async command uint8_t RF230DriverConfig.headerPreloadLength()
+	{
+		// we need the fcf, dsn, destpan and dest
+		return 7;
+	}
+
+	async command bool RF230DriverConfig.requiresRssiCca(message_t* msg)
+	{
+		return call Ieee154PacketLayer.isDataFrame(msg);
+	}
+
+/*----------------- SoftwareAckConfig -----------------*/
+
+	async command bool SoftwareAckConfig.requiresAckWait(message_t* msg)
+	{
+		return call Ieee154PacketLayer.requiresAckWait(msg);
+	}
+
+	async command bool SoftwareAckConfig.isAckPacket(message_t* msg)
+	{
+		return call Ieee154PacketLayer.isAckFrame(msg);
+	}
+
+	async command bool SoftwareAckConfig.verifyAckPacket(message_t* data, message_t* ack)
+	{
+		return call Ieee154PacketLayer.verifyAckReply(data, ack);
+	}
+
+	async command void SoftwareAckConfig.setAckRequired(message_t* msg, bool ack)
+	{
+		call Ieee154PacketLayer.setAckRequired(msg, ack);
+	}
+
+	async command bool SoftwareAckConfig.requiresAckReply(message_t* msg)
+	{
+		return call Ieee154PacketLayer.requiresAckReply(msg);
+	}
+
+	async command void SoftwareAckConfig.createAckPacket(message_t* data, message_t* ack)
+	{
+		call Ieee154PacketLayer.createAckReply(data, ack);
+	}
+
+#ifndef SOFTWAREACK_TIMEOUT
+#define SOFTWAREACK_TIMEOUT	1000
+#endif
+
+	async command uint16_t SoftwareAckConfig.getAckTimeout()
+	{
+		return (uint16_t)(SOFTWAREACK_TIMEOUT * RADIO_ALARM_MICROSEC);
+	}
+
+	tasklet_async command void SoftwareAckConfig.reportChannelError()
+	{
+#ifdef TRAFFIC_MONITOR
+		signal TrafficMonitorConfig.channelError();
+#endif
+	}
+
+/*----------------- UniqueConfig -----------------*/
+
+	async command uint8_t UniqueConfig.getSequenceNumber(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDSN(msg);
+	}
+
+	async command void UniqueConfig.setSequenceNumber(message_t* msg, uint8_t dsn)
+	{
+		call Ieee154PacketLayer.setDSN(msg, dsn);
+	}
+
+	async command am_addr_t UniqueConfig.getSender(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getSrcAddr(msg);
+	}
+
+	tasklet_async command void UniqueConfig.reportChannelError()
+	{
+#ifdef TRAFFIC_MONITOR
+		signal TrafficMonitorConfig.channelError();
+#endif
+	}
+
+/*----------------- ActiveMessageConfig -----------------*/
+
+	command am_addr_t ActiveMessageConfig.destination(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDestAddr(msg);
+	}
+
+	command void ActiveMessageConfig.setDestination(message_t* msg, am_addr_t addr)
+	{
+		call Ieee154PacketLayer.setDestAddr(msg, addr);
+	}
+
+	command am_addr_t ActiveMessageConfig.source(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getSrcAddr(msg);
+	}
+
+	command void ActiveMessageConfig.setSource(message_t* msg, am_addr_t addr)
+	{
+		call Ieee154PacketLayer.setSrcAddr(msg, addr);
+	}
+
+	command am_group_t ActiveMessageConfig.group(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDestPan(msg);
+	}
+
+	command void ActiveMessageConfig.setGroup(message_t* msg, am_group_t grp)
+	{
+		call Ieee154PacketLayer.setDestPan(msg, grp);
+	}
+
+	command error_t ActiveMessageConfig.checkFrame(message_t* msg)
+	{
+		if( ! call Ieee154PacketLayer.isDataFrame(msg) )
+			call Ieee154PacketLayer.createDataFrame(msg);
+
+		return SUCCESS;
+	}
+
+/*----------------- CsmaConfig -----------------*/
+
+	async command bool CsmaConfig.requiresSoftwareCCA(message_t* msg)
+	{
+		return call Ieee154PacketLayer.isDataFrame(msg);
+	}
+
+/*----------------- TrafficMonitorConfig -----------------*/
+
+	enum
+	{
+		TRAFFIC_UPDATE_PERIOD = 100,	// in milliseconds
+		TRAFFIC_MAX_BYTES = (uint16_t)(TRAFFIC_UPDATE_PERIOD * 1000UL / 32),	// 3125
+	};
+
+	async command uint16_t TrafficMonitorConfig.getUpdatePeriod()
+	{
+		return TRAFFIC_UPDATE_PERIOD;
+	}
+
+	async command uint16_t TrafficMonitorConfig.getChannelTime(message_t* msg)
+	{
+		/* We count in bytes, one byte is 32 microsecond. We are conservative here.
+		 *
+		 * pure airtime: preable (4 bytes), SFD (1 byte), length (1 byte), payload + CRC (len bytes)
+		 * frame separation: 5-10 bytes
+		 * ack required: 8-16 byte separation, 11 bytes airtime, 5-10 bytes separation
+		 */
+
+		uint8_t len = call RF230Packet.payloadLength(msg);
+		return call Ieee154PacketLayer.getAckRequired(msg) ? len + 6 + 16 + 11 + 10 : len + 6 + 10;
+	}
+
+	async command am_addr_t TrafficMonitorConfig.getSender(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getSrcAddr(msg);
+	}
+
+/*----------------- RandomCollisionConfig -----------------*/
+
+	/*
+	 * We try to use the same values as in CC2420
+	 *
+	 * CC2420_MIN_BACKOFF = 10 jiffies = 320 microsec
+	 * CC2420_BACKOFF_PERIOD = 10 jiffies
+	 * initial backoff = 0x1F * CC2420_BACKOFF_PERIOD = 310 jiffies = 9920 microsec
+	 * congestion backoff = 0x7 * CC2420_BACKOFF_PERIOD = 70 jiffies = 2240 microsec
+	 */
+
+#ifndef LOW_POWER_LISTENING
+
+#ifndef RF230_BACKOFF_MIN
+#define RF230_BACKOFF_MIN 320
+#endif
+
+	async command uint16_t RandomCollisionConfig.getMinimumBackoff()
+	{
+		return (uint16_t)(RF230_BACKOFF_MIN * RADIO_ALARM_MICROSEC);
+	}
+
+#ifndef RF230_BACKOFF_INIT
+#define RF230_BACKOFF_INIT 4960		// instead of 9920
+#endif
+
+	async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg)
+	{
+		return (uint16_t)(RF230_BACKOFF_INIT * RADIO_ALARM_MICROSEC);
+	}
+
+#ifndef RF230_BACKOFF_CONG
+#define RF230_BACKOFF_CONG 2240
+#endif
+
+	async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg)
+	{
+		return (uint16_t)(RF230_BACKOFF_CONG * RADIO_ALARM_MICROSEC);
+	}
+
+#endif
+
+	async command uint16_t RandomCollisionConfig.getTransmitBarrier(message_t* msg)
+	{
+		uint16_t time;
+
+		// TODO: maybe we should use the embedded timestamp of the message
+		time = call RadioAlarm.getNow();
+
+		// estimated response time (download the message, etc) is 5-8 bytes
+		if( call Ieee154PacketLayer.requiresAckReply(msg) )
+			time += (uint16_t)(32 * (-5 + 16 + 11 + 5) * RADIO_ALARM_MICROSEC);
+		else
+			time += (uint16_t)(32 * (-5 + 5) * RADIO_ALARM_MICROSEC);
+
+		return time;
+	}
+
+	tasklet_async event void RadioAlarm.fired()
+	{
+	}
+
+/*----------------- SlottedCollisionConfig -----------------*/
+
+	async command uint16_t SlottedCollisionConfig.getInitialDelay()
+	{
+		return 300;
+	}
+
+	async command uint8_t SlottedCollisionConfig.getScheduleExponent()
+	{
+		return 1 + RADIO_ALARM_MILLI_EXP;
+	}
+
+	async command uint16_t SlottedCollisionConfig.getTransmitTime(message_t* msg)
+	{
+		// TODO: check if the timestamp is correct
+		return call PacketTimeStamp.timestamp(msg);
+	}
+
+	async command uint16_t SlottedCollisionConfig.getCollisionWindowStart(message_t* msg)
+	{
+		// the preamble (4 bytes), SFD (1 byte), plus two extra for safety
+		return (call PacketTimeStamp.timestamp(msg)) - (uint16_t)(7 * 32 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t SlottedCollisionConfig.getCollisionWindowLength(message_t* msg)
+	{
+		return (uint16_t)(2 * 7 * 32 * RADIO_ALARM_MICROSEC);
+	}
+
+/*----------------- Dummy -----------------*/
+
+	async command void DummyConfig.nothing()
+	{
+	}
+
+/*----------------- LowPowerListening -----------------*/
+
+#ifdef LOW_POWER_LISTENING
+
+	command bool LowPowerListeningConfig.needsAutoAckRequest(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDestAddr(msg) != TOS_BCAST_ADDR;
+	}
+
+	command bool LowPowerListeningConfig.ackRequested(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getAckRequired(msg);
+	}
+
+	command uint16_t LowPowerListeningConfig.getListenLength()
+	{
+		return 5;
+	}
+
+	async command uint16_t RandomCollisionConfig.getMinimumBackoff()
+	{
+		return (uint16_t)(320 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t RandomCollisionConfig.getInitialBackoff(message_t* msg)
+	{
+		return (uint16_t)(1600 * RADIO_ALARM_MICROSEC);
+	}
+
+	async command uint16_t RandomCollisionConfig.getCongestionBackoff(message_t* msg)
+	{
+		return (uint16_t)(3200 * RADIO_ALARM_MICROSEC);
+	}
+
+#endif
+
+}
diff --git a/tos/chips/rf230/RF230TimeSyncMessageC.nc b/tos/chips/rf230/RF230TimeSyncMessageC.nc
new file mode 100644
index 00000000..0664421a
--- /dev/null
+++ b/tos/chips/rf230/RF230TimeSyncMessageC.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+configuration RF230TimeSyncMessageC
+{
+	provides
+	{
+		interface SplitControl;
+
+		interface Receive[uint8_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface Packet;
+		interface AMPacket;
+
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface TimeSyncAMSend<TRadio, uint32_t> as TimeSyncAMSendRadio[am_id_t id];
+		interface TimeSyncPacket<TRadio, uint32_t> as TimeSyncPacketRadio;
+
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+		interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+		interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+	}
+}
+
+implementation
+{
+	components RF230ActiveMessageC, new TimeSyncMessageLayerC();
+  
+	SplitControl	= RF230ActiveMessageC;
+	AMPacket	= TimeSyncMessageLayerC;
+  	Receive		= TimeSyncMessageLayerC.Receive;
+	Snoop		= TimeSyncMessageLayerC.Snoop;
+	Packet		= TimeSyncMessageLayerC;
+
+	PacketTimeStampRadio	= RF230ActiveMessageC;
+	TimeSyncAMSendRadio	= TimeSyncMessageLayerC;
+	TimeSyncPacketRadio	= TimeSyncMessageLayerC;
+
+	PacketTimeStampMilli	= RF230ActiveMessageC;
+	TimeSyncAMSendMilli	= TimeSyncMessageLayerC;
+	TimeSyncPacketMilli	= TimeSyncMessageLayerC;
+
+	TimeSyncMessageLayerC.PacketTimeStampRadio -> RF230ActiveMessageC;
+	TimeSyncMessageLayerC.PacketTimeStampMilli -> RF230ActiveMessageC;
+
+#ifdef RF230_HARDWARE_ACK
+	components RF230DriverHwAckC as RF230DriverLayerC;
+#else
+	components RF230DriverLayerC;
+#endif
+	TimeSyncMessageLayerC.LocalTimeRadio -> RF230DriverLayerC;
+	TimeSyncMessageLayerC.PacketTimeSyncOffset -> RF230DriverLayerC.PacketTimeSyncOffset;
+}
diff --git a/tos/chips/sht11/HalSht11Advanced.nc b/tos/chips/sht11/HalSht11Advanced.nc
new file mode 100644
index 00000000..834e75cd
--- /dev/null
+++ b/tos/chips/sht11/HalSht11Advanced.nc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+interface HalSht11Advanced {
+  command error_t getVoltageStatus();
+  event void getVoltageStatusDone(error_t error, bool isLow);
+  command error_t setHeater(bool isOn);
+  event void setHeaterDone(error_t error);
+  command error_t setResolution(bool resolution);
+  event void setResolutionDone(error_t error);
+}
diff --git a/tos/chips/sht11/HalSht11ControlP.nc b/tos/chips/sht11/HalSht11ControlP.nc
new file mode 100644
index 00000000..466143fc
--- /dev/null
+++ b/tos/chips/sht11/HalSht11ControlP.nc
@@ -0,0 +1,146 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "SensirionSht11.h"
+
+module HalSht11ControlP {
+  provides interface HalSht11Advanced;
+
+  uses interface SensirionSht11;
+  uses interface Resource;
+}
+
+implementation {
+  enum {
+    S_IDLE,
+    S_GETVOLT,
+    S_SETHEAT,
+    S_SETRES,
+  };
+  uint8_t state = S_IDLE;
+  uint8_t statusRegisterShadow = 0x0;
+
+  error_t clientResult;
+  error_t clientVal;
+
+  task void signal_Task() {
+    switch(state) {
+    case S_GETVOLT:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalSht11Advanced.getVoltageStatusDone(clientResult, clientVal & SHT11_STATUS_LOW_BATTERY_BIT);
+      break;
+    case S_SETHEAT:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalSht11Advanced.setHeaterDone(clientResult);
+      break;
+    case S_SETRES:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalSht11Advanced.setResolutionDone(clientResult);
+      break;
+    default:
+      break;
+    }
+  }
+
+  command error_t HalSht11Advanced.getVoltageStatus() {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_GETVOLT;
+
+    call SensirionSht11.readStatusReg();
+    return SUCCESS;
+  }
+
+  command error_t HalSht11Advanced.setHeater(bool isOn) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETHEAT;
+
+    if(isOn)
+      statusRegisterShadow |= SHT11_STATUS_HEATER_ON_BIT;
+    else
+      statusRegisterShadow &= ~SHT11_STATUS_HEATER_ON_BIT;
+
+    call SensirionSht11.writeStatusReg(statusRegisterShadow);
+    return SUCCESS;
+  }
+
+  command error_t HalSht11Advanced.setResolution(bool resolution) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_SETRES;
+
+    if(resolution)
+      statusRegisterShadow |= SHT11_STATUS_LOW_RES_BIT;
+    else
+      statusRegisterShadow &= ~SHT11_STATUS_LOW_RES_BIT;
+
+    call SensirionSht11.writeStatusReg(statusRegisterShadow);
+    return SUCCESS;    
+  }
+
+  event void SensirionSht11.readStatusRegDone( error_t result, uint8_t val ) {
+    clientResult = result;
+    clientVal = val;
+    post signal_Task();
+  }
+
+  event void SensirionSht11.writeStatusRegDone( error_t result ) {
+    clientResult = result;
+    post signal_Task();
+  }
+
+  event void Resource.granted() { /* intentionally left blank */ }
+  event void SensirionSht11.resetDone( error_t result ) {}
+  event void SensirionSht11.measureTemperatureDone( error_t result, uint16_t val ) {}
+  event void SensirionSht11.measureHumidityDone( error_t result, uint16_t val ) {}
+
+}
diff --git a/tos/chips/sht11/SensirionSht11.h b/tos/chips/sht11/SensirionSht11.h
new file mode 100644
index 00000000..29485c4a
--- /dev/null
+++ b/tos/chips/sht11/SensirionSht11.h
@@ -0,0 +1,49 @@
+#ifndef SENSIRIONSHT11_H
+#define SENSIRIONSHT11_H
+
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ */
+
+enum {
+  SHT11_TEMPERATURE_BITS = 14,
+  SHT11_HUMIDITY_BITS = 12,
+};
+
+enum {
+  SHT11_STATUS_LOW_RES_BIT = 1 << 0,
+  SHT11_STATUS_NO_RELOAD_BIT = 1 << 1,
+  SHT11_STATUS_HEATER_ON_BIT = 1 << 2,
+  SHT11_STATUS_LOW_BATTERY_BIT = 1 << 6,
+} sht_bits_t;
+
+#endif
diff --git a/tos/chips/sht11/SensirionSht11.nc b/tos/chips/sht11/SensirionSht11.nc
new file mode 100644
index 00000000..81869256
--- /dev/null
+++ b/tos/chips/sht11/SensirionSht11.nc
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * SensirionSht11 is the rich interface to the Sensirion SHT11
+ * temperature/humidity sensor. 
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $
+ */
+
+interface SensirionSht11 {
+
+  /**
+   * Resets the sensor.
+   *
+   * @return SUCCESS if the sensor will be reset
+   */
+  command error_t reset();
+
+  /**
+   * Signals that the sensor has been reset.
+   *
+   * @param result SUCCESS if the reset succeeded
+   */
+  event void resetDone( error_t result );
+
+  /**
+   * Starts a temperature measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */
+  command error_t measureTemperature();
+
+  /**
+   * Presents the result of a temperature measurement.
+   *
+   * @param result SUCCESS if the measurement was successful
+   * @param val the temperature reading
+   */
+  event void measureTemperatureDone( error_t result, uint16_t val );
+
+  /**
+   * Starts a humidity measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */  
+  command error_t measureHumidity();
+
+  /**
+   * Presents the result of a humidity measurement.
+   *
+   * @param result SUCCESS if the measurement was successful
+   * @param val the humidity reading
+   */
+  event void measureHumidityDone( error_t result, uint16_t val );
+
+  /**
+   * Reads the current contents of the SHT11 status and control
+   * register. See the datasheet for interpretation of this register.
+   *
+   * @return SUCCESS if the read will be performed
+   */
+  command error_t readStatusReg();
+
+  /**
+   * Presents the value of the status register.
+   *
+   * @param result SUCCESS if the read succeeded
+   * @param val the value of the register
+   */
+  event void readStatusRegDone( error_t result, uint8_t val );
+
+  /**
+   * Writes a new value to the SHT11 status and control register.
+   *
+   * @param val the new value to be written
+   *
+   * @return SUCCESS if the write will be performed
+   */
+  command error_t writeStatusReg( uint8_t val );
+
+  /**
+   * Signals the completion of the status register write.
+   *
+   * @param result SUCCESS if the write was successful
+   */
+  event void writeStatusRegDone( error_t result );
+}
diff --git a/tos/chips/sht11/SensirionSht11LogicP.nc b/tos/chips/sht11/SensirionSht11LogicP.nc
new file mode 100644
index 00000000..99c192fb
--- /dev/null
+++ b/tos/chips/sht11/SensirionSht11LogicP.nc
@@ -0,0 +1,412 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Timer.h"
+#include "SensirionSht11.h"
+
+/**
+ * SensirionSht11LogicP contains the actual driver logic needed to
+ * read from the Sensirion SHT11 temperature/humidity sensor. It
+ * depends on 2 underlying GeneralIO interfaces, one for the data pin
+ * and one for the clock pin, and one underlying GpioInterrupt.  It
+ * provides the HAL-level SensirionSht11 interface. It's generic, so
+ * you can instantiate it multiple times if you have more than one
+ * Sensirion SHT11 attached to a node. 
+ * 
+ * <p>
+ * This code assumes that the MCU clock is less than 10 MHz.  If you
+ * ever run this on a faster MCU, you'll need to insert a lot of
+ * waits to keep the Sensirion happy.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $
+ */
+
+generic module SensirionSht11LogicP() {
+  provides interface SensirionSht11[ uint8_t client ];
+
+  uses interface GeneralIO as DATA;
+  uses interface GeneralIO as CLOCK;
+  uses interface GpioInterrupt as InterruptDATA;
+
+  uses interface Timer<TMilli>;
+
+  uses interface Leds;
+}
+implementation {
+
+  typedef enum {
+    CMD_MEASURE_TEMPERATURE = 0x3,
+    CMD_MEASURE_HUMIDITY = 0x5,
+    CMD_READ_STATUS = 0x7,
+    CMD_WRITE_STATUS = 0x6,
+    CMD_SOFT_RESET = 0x1E,
+  } sht_cmd_t;
+
+  enum {
+    TIMEOUT_RESET = 11,
+    TIMEOUT_14BIT = 330,
+    TIMEOUT_12BIT = 250, //70,
+    TIMEOUT_8BIT = 250, //15,
+  } sht_timeout_t;
+
+  bool on = TRUE;
+  bool busy = FALSE;
+  uint8_t status = 0;
+  sht_cmd_t cmd;
+  uint8_t newStatus;
+  bool writeFail = FALSE;
+
+  uint8_t currentClient;
+
+  error_t performCommand();
+  void initPins();
+  void resetDevice();
+  void transmissionStart();
+  void sendCommand(uint8_t _cmd);
+  void writeByte(uint8_t byte);
+  error_t waitForResponse();
+  void enableInterrupt();
+  uint8_t readByte();
+  void ack();
+  void endTransmission();
+
+  task void readSensor();
+  task void signalStatusDone();
+
+  command error_t SensirionSht11.reset[ uint8_t client ]() {
+    if ( !on ) { return EOFF; }
+    if ( busy ) { return EBUSY; } else { busy = TRUE; }
+    cmd = CMD_SOFT_RESET;
+    currentClient = client;
+    return performCommand();
+  }
+
+  command error_t SensirionSht11.measureTemperature[ uint8_t client ]() {
+    if ( !on ) { return EOFF; }
+    if ( busy ) { return EBUSY; } else { busy = TRUE; }
+    cmd = CMD_MEASURE_TEMPERATURE;
+    currentClient = client;
+    return performCommand();
+  }
+  
+  command error_t SensirionSht11.measureHumidity[ uint8_t client ]() {
+    if ( !on ) { return EOFF; }
+    if ( busy ) { return EBUSY; } else { busy = TRUE; }
+    cmd = CMD_MEASURE_HUMIDITY;
+    currentClient = client;
+    return performCommand();
+  }
+
+  /* FIXME: these don't seem to work */
+  command error_t SensirionSht11.readStatusReg[ uint8_t client ]() {
+    if ( !on ) { return EOFF; }
+    if ( busy ) { return EBUSY; } else { busy = TRUE; }
+    cmd = CMD_READ_STATUS;
+    currentClient = client;
+    return performCommand();
+  }
+  
+  /* FIXME: these don't seem to work */
+  command error_t SensirionSht11.writeStatusReg[ uint8_t client ]( uint8_t val ) {
+    if ( !on ) { return EOFF; }
+    if ( busy ) { return EBUSY; } else { busy = TRUE; }
+    cmd = CMD_WRITE_STATUS;
+    newStatus = val;
+    currentClient = client;
+    return performCommand();
+  }
+
+  // performCommand() returns both error_t and status reg -- fortunately, error_t is 8bit
+  error_t performCommand() {
+
+    initPins();
+    resetDevice();
+    transmissionStart();
+    cmd &= 0x1F; // clear the first 3 address bits to 000
+    sendCommand(cmd);
+
+    if ( waitForResponse() != SUCCESS ) {
+      busy = FALSE;
+      return FAIL;
+    }
+
+    switch(cmd) {
+
+    case CMD_SOFT_RESET:
+      call Timer.startOneShot( TIMEOUT_RESET );
+      break;
+
+    case CMD_MEASURE_TEMPERATURE:
+      enableInterrupt();
+
+      if ( status & SHT11_STATUS_LOW_RES_BIT ) {
+	call Timer.startOneShot( TIMEOUT_12BIT );
+      } else {
+	call Timer.startOneShot( TIMEOUT_14BIT );
+      }
+
+      break;
+
+    case CMD_MEASURE_HUMIDITY:
+      enableInterrupt();
+
+      if ( status & SHT11_STATUS_LOW_RES_BIT ) {
+	call Timer.startOneShot( TIMEOUT_8BIT );
+      } else {
+	call Timer.startOneShot( TIMEOUT_12BIT );
+      }
+
+      break;
+
+    case CMD_READ_STATUS: 
+    {
+      uint8_t tempStatus;
+      uint8_t crc;
+
+      tempStatus = readByte();
+      crc = readByte();
+      endTransmission();
+
+      status = tempStatus; // FIXME: need to check CRC!
+      
+      post signalStatusDone();
+    }
+    
+    case CMD_WRITE_STATUS:
+      writeByte( newStatus );
+      
+      if ( waitForResponse() != SUCCESS ) {
+	writeFail = TRUE;
+      } else {
+	status = newStatus;
+      }
+      
+      post signalStatusDone();
+    }
+
+    // leave the device busy...we're waiting for an interrupt
+    return SUCCESS;
+  }
+
+  void initPins() {
+    call CLOCK.makeOutput();
+    call CLOCK.clr();
+    call DATA.makeInput();
+    call DATA.set();
+    call InterruptDATA.disable();
+  }
+  
+  void resetDevice() {
+    uint8_t i;
+    call DATA.makeOutput();
+    call DATA.set();
+    call CLOCK.clr();
+    for( i = 0; i < 9; i++ ) {
+      call CLOCK.set();
+      call CLOCK.clr();
+    }
+  }
+
+  void transmissionStart() {
+    call DATA.makeOutput();
+    call DATA.set();
+    call CLOCK.clr();
+    call CLOCK.set();
+    call DATA.clr();
+    call CLOCK.clr();
+    call CLOCK.set();
+    call DATA.set();
+    call CLOCK.clr();
+  }
+
+  void sendCommand(uint8_t _cmd) {
+    writeByte(_cmd);
+  }
+
+  void writeByte(uint8_t byte) {
+    uint8_t i;
+    for( i = 0; i < 8; i++ ) {
+      if ( byte & 0x80 )
+	call DATA.set();
+      else
+	call DATA.clr();
+      byte = byte << 1;
+      call CLOCK.set();
+      call CLOCK.clr();
+    }
+  }
+
+  error_t waitForResponse() {
+    call DATA.makeInput();
+    call DATA.set();
+    call CLOCK.set();
+    if (call DATA.get()) {
+      // the device didn't pull the DATA line low
+      // the command wasn't received or acknowledged
+      return FAIL;
+    }
+    call CLOCK.clr();
+    return SUCCESS;
+  }
+
+  void enableInterrupt() {
+    call DATA.makeInput();
+    call DATA.set();
+    call InterruptDATA.enableFallingEdge();
+  }
+
+  event void Timer.fired() {
+
+    switch(cmd) {
+
+    case CMD_SOFT_RESET:
+      // driver has waited long enough for device to reset
+      busy = FALSE;
+      signal SensirionSht11.resetDone[currentClient]( SUCCESS );
+      break;
+
+    case CMD_MEASURE_TEMPERATURE:
+      // timeout expired with no data interrupt
+      busy = FALSE;
+      signal SensirionSht11.measureTemperatureDone[currentClient]( FAIL, 0 );
+      break;
+
+    case CMD_MEASURE_HUMIDITY:
+      // timeout expired with no data interrupt
+      busy = FALSE;
+      signal SensirionSht11.measureHumidityDone[currentClient]( FAIL, 0 );
+      break;
+
+    default:
+      // we're in an unexpected state. what to do?
+      break;
+    }
+  }
+
+  async event void InterruptDATA.fired() {
+    call InterruptDATA.disable();
+    post readSensor();
+  }
+
+  task void readSensor() {
+    uint16_t data = 0;
+    uint8_t crc = 0;
+
+    if ( busy == FALSE ) {
+      // the interrupt was received after the timeout. 
+      // we've already signaled FAIL to the client, so just give up.
+      return;
+    }
+
+    call Timer.stop();
+
+    data = readByte() << 8;
+    data |= readByte();
+
+    crc = readByte();
+    
+    endTransmission();
+
+    switch( cmd ) {
+    case CMD_MEASURE_TEMPERATURE:
+      busy = FALSE;
+      signal SensirionSht11.measureTemperatureDone[currentClient]( SUCCESS, data );
+      break;
+
+    case CMD_MEASURE_HUMIDITY:
+      busy = FALSE;
+      signal SensirionSht11.measureHumidityDone[currentClient]( SUCCESS, data );
+      break;
+
+    default:
+      break; // unknown command - shouldn't reach here
+    }
+  }
+
+  uint8_t readByte() {
+    uint8_t byte = 0;
+    uint8_t i;
+
+    for( i = 0; i < 8; i++ ) {
+      call CLOCK.set();
+      if (call DATA.get())
+	byte |= 1;
+      if (i != 7) 
+	byte = byte << 1;
+      call CLOCK.clr();
+    }
+
+    ack();
+    return byte;
+  }
+
+  void ack() {
+    call DATA.makeOutput();
+    call DATA.clr();
+    call CLOCK.set();
+    call CLOCK.clr();
+    call DATA.makeInput();
+    call DATA.set();
+  }
+  
+  void endTransmission() {
+    call DATA.makeOutput();
+    call DATA.set();
+    call CLOCK.set();
+    call CLOCK.clr();
+  }
+
+  task void signalStatusDone() {
+    bool _writeFail = writeFail;
+    switch( cmd ) {
+    case CMD_READ_STATUS:
+      busy = FALSE;
+      signal SensirionSht11.readStatusRegDone[currentClient]( SUCCESS, status );
+      break;
+    case CMD_WRITE_STATUS:
+      busy = FALSE;
+      writeFail = FALSE;
+      signal SensirionSht11.writeStatusRegDone[currentClient]( (_writeFail ? FAIL : SUCCESS) );
+      break;
+    default:
+      // shouldn't happen.
+      break;
+    }
+  }
+
+  default event void SensirionSht11.resetDone[uint8_t client]( error_t result ) { }
+  default event void SensirionSht11.measureTemperatureDone[uint8_t client]( error_t result, uint16_t val ) { }
+  default event void SensirionSht11.measureHumidityDone[uint8_t client]( error_t result, uint16_t val ) { }
+  default event void SensirionSht11.readStatusRegDone[uint8_t client]( error_t result, uint8_t val ) { }
+  default event void SensirionSht11.writeStatusRegDone[uint8_t client]( error_t result ) { }
+}
+
diff --git a/tos/chips/sht11/SensirionSht11ReaderP.nc b/tos/chips/sht11/SensirionSht11ReaderP.nc
new file mode 100644
index 00000000..882fd3f7
--- /dev/null
+++ b/tos/chips/sht11/SensirionSht11ReaderP.nc
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * SensirionSht11ReaderP transforms the HAL-level SensirionSht11
+ * interface into a pair of SID Read interfaces, one for the
+ * temperature sensor and one for the humidity sensor. It acquires the
+ * underlying resource before executing each read, enabling
+ * arbitrated access.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $
+ */
+
+#include <SensirionSht11.h>
+
+generic module SensirionSht11ReaderP() {
+  provides interface DeviceMetadata as TemperatureMetadata;
+  provides interface Read<uint16_t> as Temperature;
+  provides interface DeviceMetadata as HumidityMetadata;
+  provides interface Read<uint16_t> as Humidity;
+  
+  uses interface Resource as TempResource;
+  uses interface Resource as HumResource;
+  uses interface SensirionSht11 as Sht11Temp;
+  uses interface SensirionSht11 as Sht11Hum;
+}
+implementation {
+
+  command uint8_t TemperatureMetadata.getSignificantBits() { return SHT11_TEMPERATURE_BITS; }
+
+  command error_t Temperature.read() {
+    call TempResource.request();
+    return SUCCESS;
+  }
+
+  event void TempResource.granted() {
+    error_t result;
+    if ((result = call Sht11Temp.measureTemperature()) != SUCCESS) {
+      call TempResource.release();
+      signal Temperature.readDone( result, 0 );
+    }
+  }
+
+  event void Sht11Temp.measureTemperatureDone( error_t result, uint16_t val ) {
+    call TempResource.release();
+    signal Temperature.readDone( result, val );
+  }
+
+  command uint8_t HumidityMetadata.getSignificantBits() { return SHT11_HUMIDITY_BITS; }
+
+  command error_t Humidity.read() {
+    call HumResource.request();
+    return SUCCESS;
+  }
+
+  event void HumResource.granted() {
+    error_t result;
+    if ((result = call Sht11Hum.measureHumidity()) != SUCCESS) {
+      call HumResource.release();
+      signal Humidity.readDone( result, 0 );
+    }
+  }
+
+  event void Sht11Hum.measureHumidityDone( error_t result, uint16_t val ) {
+    call HumResource.release();
+    signal Humidity.readDone( result, val );
+  }
+
+  event void Sht11Temp.resetDone( error_t result ) { }
+  event void Sht11Temp.measureHumidityDone( error_t result, uint16_t val ) { }
+  event void Sht11Temp.readStatusRegDone( error_t result, uint8_t val ) { }
+  event void Sht11Temp.writeStatusRegDone( error_t result ) { }
+
+  event void Sht11Hum.resetDone( error_t result ) { }
+  event void Sht11Hum.measureTemperatureDone( error_t result, uint16_t val ) { }
+  event void Sht11Hum.readStatusRegDone( error_t result, uint8_t val ) { }
+  event void Sht11Hum.writeStatusRegDone( error_t result ) { }
+
+  default event void Temperature.readDone( error_t result, uint16_t val ) { }
+  default event void Humidity.readDone( error_t result, uint16_t val ) { }
+}
diff --git a/tos/chips/stm25p/BlockStorageC.nc b/tos/chips/stm25p/BlockStorageC.nc
new file mode 100644
index 00000000..5fef24fc
--- /dev/null
+++ b/tos/chips/stm25p/BlockStorageC.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the block storage abstraction from TEP103 for the
+ * ST M25P serial code flash.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $
+ */
+
+#include "Stm25p.h"
+
+generic configuration BlockStorageC( volume_id_t volume_id ) {
+
+  provides interface BlockRead;
+  provides interface BlockWrite;
+  provides interface StorageMap;
+
+}
+
+implementation {
+
+  enum {
+    BLOCK_ID = unique( "Stm25p.Block" ),
+    VOLUME_ID = unique( "Stm25p.Volume" ),
+  };
+
+  components Stm25pBlockP as BlockP;
+  BlockRead = BlockP.Read[ BLOCK_ID ];
+  BlockWrite = BlockP.Write[ BLOCK_ID ];
+  StorageMap = BlockP.StorageMap[ BLOCK_ID ];
+
+  components Stm25pSectorC as SectorC;
+  BlockP.ClientResource[ BLOCK_ID ] -> SectorC.ClientResource[ VOLUME_ID ];
+  BlockP.Sector[ BLOCK_ID ] -> SectorC.Sector[ VOLUME_ID ];
+
+  components new Stm25pBinderP( volume_id ) as BinderP;
+  BinderP.Volume -> SectorC.Volume[ VOLUME_ID ];
+
+}
diff --git a/tos/chips/stm25p/ConfigStorageC.nc b/tos/chips/stm25p/ConfigStorageC.nc
new file mode 100644
index 00000000..6a91859c
--- /dev/null
+++ b/tos/chips/stm25p/ConfigStorageC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the config storage abstraction from TEP103 for
+ * the ST M25P serial code flash.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $
+ */
+
+#include <Stm25p.h>
+
+generic configuration ConfigStorageC( volume_id_t volume_id ) {
+  
+  provides interface Mount;
+  provides interface ConfigStorage;
+  
+}
+
+implementation {
+  
+  enum {
+    CONFIG_ID = unique( "Stm25p.Config" ),
+    VOLUME_ID = unique( "Stm25p.Volume" ),
+  };
+  
+  components Stm25pConfigP as ConfigP;
+  Mount = ConfigP.Mount[ CONFIG_ID ];
+  ConfigStorage = ConfigP.Config[ CONFIG_ID ];
+  
+  components Stm25pSectorC as SectorC;
+  ConfigP.ClientResource[ CONFIG_ID ] -> SectorC.ClientResource[ VOLUME_ID ];
+  ConfigP.Sector[ CONFIG_ID ] -> SectorC.Sector[ VOLUME_ID ];
+  
+  components new Stm25pBinderP( volume_id ) as BinderP;
+  BinderP.Volume -> SectorC.Volume[ VOLUME_ID ];
+  
+}
diff --git a/tos/chips/stm25p/LogStorageC.nc b/tos/chips/stm25p/LogStorageC.nc
new file mode 100644
index 00000000..6b4a5f01
--- /dev/null
+++ b/tos/chips/stm25p/LogStorageC.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the log storage abstraction from TEP103 for the
+ * ST M25P serial code flash. This is a record-based implementation,
+ * meaning all successful appendeds will survive crash-style
+ * failure. Note that appends are limited to a maximum of 254 bytes at
+ * a time.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $
+ */
+
+#include <Stm25p.h>
+
+generic configuration LogStorageC( volume_id_t volume_id, bool circular ) {
+
+  provides interface LogRead;
+  provides interface LogWrite;
+
+}
+
+implementation {
+
+  enum {
+    LOG_ID = unique( "Stm25p.Log" ),
+    VOLUME_ID = unique( "Stm25p.Volume" ),
+  };
+  
+  components Stm25pLogP as LogP;
+  LogRead = LogP.Read[ LOG_ID ];
+  LogWrite = LogP.Write[ LOG_ID ];
+  
+  components Stm25pSectorC as SectorC;
+  LogP.ClientResource[ LOG_ID ] -> SectorC.ClientResource[ VOLUME_ID ];
+  LogP.Sector[ LOG_ID ] -> SectorC.Sector[ VOLUME_ID ];
+  
+  components new Stm25pBinderP( volume_id ) as BinderP;
+  BinderP.Volume -> SectorC.Volume[ VOLUME_ID ];
+  
+  components new Stm25pLogConfigP( circular ) as ConfigP;
+  LogP.Circular[ LOG_ID ] -> ConfigP;
+  
+  components MainC;
+  MainC.SoftwareInit -> LogP;
+  
+}
diff --git a/tos/chips/stm25p/Stm25p.h b/tos/chips/stm25p/Stm25p.h
new file mode 100644
index 00000000..409d4a67
--- /dev/null
+++ b/tos/chips/stm25p/Stm25p.h
@@ -0,0 +1,59 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $
+ */
+
+#ifndef __STM25P_H__
+#define __STM25P_H__
+
+#include "Storage.h"
+
+typedef storage_addr_t stm25p_addr_t;
+typedef storage_len_t stm25p_len_t;
+
+enum {
+  STM25P_NUM_SECTORS = 16,
+  STM25P_SECTOR_SIZE_LOG2 = 16,
+  STM25P_SECTOR_SIZE = 1L << STM25P_SECTOR_SIZE_LOG2,
+  STM25P_SECTOR_MASK = 0xffff,
+  STM25P_PAGE_SIZE_LOG2 = 8,
+  STM25P_PAGE_SIZE = 1 << STM25P_PAGE_SIZE_LOG2,
+  STM25P_PAGE_MASK = STM25P_PAGE_SIZE - 1,
+  STM25P_INVALID_ADDRESS = 0xffffffff,
+};
+
+typedef struct stm25p_volume_info_t {
+  uint8_t base;
+  uint8_t size;
+} stm25p_volume_info_t;
+
+#endif
diff --git a/tos/chips/stm25p/Stm25pBinderP.nc b/tos/chips/stm25p/Stm25pBinderP.nc
new file mode 100644
index 00000000..d349e279
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pBinderP.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $
+ */
+
+generic module Stm25pBinderP( volume_id_t volume ) {
+
+  uses interface Stm25pVolume as Volume;
+
+}
+
+implementation {
+
+  async event volume_id_t Volume.getVolumeId() {
+    return volume;
+  }
+
+}
+
diff --git a/tos/chips/stm25p/Stm25pBlockP.nc b/tos/chips/stm25p/Stm25pBlockP.nc
new file mode 100644
index 00000000..36eb6289
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pBlockP.nc
@@ -0,0 +1,238 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $
+ */
+
+module Stm25pBlockP {
+
+  provides interface BlockRead as Read[ uint8_t id ];
+  provides interface BlockWrite as Write[ uint8_t id ];
+  provides interface StorageMap[ uint8_t id ];
+
+  uses interface Stm25pSector as Sector[ uint8_t id ];
+  uses interface Resource as ClientResource[ uint8_t id ];
+  uses interface Leds;
+
+}
+
+implementation {
+
+  enum {
+    NUM_BLOCKS = uniqueCount( "Stm25p.Block" ),
+  };
+  
+  typedef enum {
+    S_IDLE,
+    S_READ,
+    S_CRC,
+    S_WRITE,
+    S_SYNC,
+    S_ERASE,
+  } stm25p_block_req_t;
+  
+  typedef struct stm25p_block_state_t {
+    storage_addr_t addr;
+    void* buf;
+    storage_len_t len;
+    stm25p_block_req_t req;
+  } stm25p_block_state_t;
+  
+  stm25p_block_state_t m_block_state[ NUM_BLOCKS ];
+  stm25p_block_state_t m_req;
+  
+  error_t newRequest( uint8_t client );
+  void signalDone( uint8_t id, uint16_t crc, error_t error );
+  
+  command storage_addr_t StorageMap.getPhysicalAddress[ uint8_t id ]( storage_addr_t addr ) {
+    return call Sector.getPhysicalAddress[ id ]( addr );
+  }
+  
+  command storage_len_t Read.getSize[ uint8_t id ]() {
+    return ( (storage_len_t)call Sector.getNumSectors[ id ]() 
+	     << STM25P_SECTOR_SIZE_LOG2 );
+  }
+  
+  command error_t Read.read[ uint8_t id ]( storage_addr_t addr, void* buf,
+					   storage_len_t len ) {
+    m_req.req = S_READ;
+    m_req.addr = addr;
+    m_req.buf = buf;
+    m_req.len = len;
+    return newRequest( id );
+  }
+  
+  command error_t Read.computeCrc[ uint8_t id ]( storage_addr_t addr,
+						 storage_len_t len,
+						 uint16_t crc ) {
+    m_req.req = S_CRC;
+    m_req.addr = addr;
+    m_req.buf = (void*)crc;
+    m_req.len = len;
+    return newRequest( id );
+  }
+  
+  command error_t Write.write[ uint8_t id ]( storage_addr_t addr, void* buf, 
+					     storage_len_t len ) {
+    m_req.req = S_WRITE;
+    m_req.addr = addr;
+    m_req.buf = buf;
+    m_req.len = len;
+    return newRequest( id );
+  }
+  
+  command error_t Write.sync[ uint8_t id ]() {
+    m_req.req = S_SYNC;
+    return newRequest( id );
+  }
+  
+  command error_t Write.erase[ uint8_t id ]() {
+    m_req.req = S_ERASE;
+    return newRequest( id );
+  }
+  
+  error_t newRequest( uint8_t client ) {
+    
+    if ( m_block_state[ client ].req != S_IDLE )
+      return FAIL;
+
+    call ClientResource.request[ client ]();
+    m_block_state[ client ] = m_req;
+    
+    return SUCCESS;
+    
+  }
+  
+  event void ClientResource.granted[ uint8_t id ]() {
+    
+    switch( m_block_state[ id ].req ) {
+    case S_READ:
+      call Sector.read[ id ]( m_block_state[ id ].addr, 
+			      m_block_state[ id ].buf, 
+			      m_block_state[ id ].len );
+      break;
+    case S_CRC:
+      call Sector.computeCrc[ id ]( (uint16_t)m_block_state[ id ].buf, 
+				    m_block_state[ id ].addr, 
+				    m_block_state[ id ].len );
+      break;
+    case S_WRITE:
+      call Sector.write[ id ]( m_block_state[ id ].addr, 
+			       m_block_state[ id ].buf, 
+			       m_block_state[ id ].len );
+      break;
+    case S_ERASE:
+      call Sector.erase[ id ]( 0, call Sector.getNumSectors[ id ]() );
+      break;
+    case S_SYNC:
+      signalDone( id, 0, SUCCESS );
+      break;
+    case S_IDLE:
+      break;
+    }
+    
+  }
+  
+  event void Sector.readDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, 
+					    stm25p_len_t len, error_t error ) {
+    signalDone( id, 0, error );
+  }
+  
+  event void Sector.writeDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, 
+					     stm25p_len_t len, error_t error ){
+    signalDone( id, 0, error );
+  }
+  
+  event void Sector.eraseDone[ uint8_t id ]( uint8_t sector,
+					     uint8_t num_sectors,
+					     error_t error ) {
+    signalDone( id, 0, error );
+  }
+  
+  event void Sector.computeCrcDone[ uint8_t id ]( stm25p_addr_t addr, 
+						  stm25p_len_t len,
+						  uint16_t crc,
+						  error_t error ) {
+    signalDone( id, crc, error );
+  }
+  
+  void signalDone( uint8_t id, uint16_t crc, error_t error ) {
+    
+    stm25p_block_req_t req = m_block_state[ id ].req;    
+    
+    call ClientResource.release[ id ]();
+    m_block_state[ id ].req = S_IDLE;
+    switch( req ) {
+    case S_READ:
+      signal Read.readDone[ id ]( m_block_state[ id ].addr, 
+				  m_block_state[ id ].buf,
+				  m_block_state[ id ].len, error );  
+      break;
+    case S_CRC:
+      signal Read.computeCrcDone[ id ]( m_block_state[ id ].addr, 
+					m_block_state[ id ].len, crc, error );
+      break;
+    case S_WRITE:
+      signal Write.writeDone[ id ]( m_block_state[ id ].addr, 
+				    m_block_state[ id ].buf,
+				    m_block_state[ id ].len, error );
+      break;
+    case S_SYNC:
+      signal Write.syncDone[ id ]( error );
+      break;
+    case S_ERASE:
+      signal Write.eraseDone[ id ]( error );
+      break;
+    case S_IDLE:
+      break;
+    }
+    
+  }
+  
+  default event void Read.readDone[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {}
+  default event void Read.computeCrcDone[ uint8_t id ]( storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error ) {}
+  default event void Write.writeDone[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {}
+  default event void Write.eraseDone[ uint8_t id ]( error_t error ) {}
+  default event void Write.syncDone[ uint8_t id ]( error_t error ) {}
+  
+  default command storage_addr_t Sector.getPhysicalAddress[ uint8_t id ]( storage_addr_t addr ) { return 0xffffffff; }
+  default command uint8_t Sector.getNumSectors[ uint8_t id ]() { return 0; }
+  default command error_t Sector.read[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ) { return FAIL; }
+  default command error_t Sector.write[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len ) { return FAIL; }
+  default command error_t Sector.erase[ uint8_t id ]( uint8_t sector, uint8_t num_sectors ) { return FAIL; }
+  default command error_t Sector.computeCrc[ uint8_t id ]( uint16_t crc, storage_addr_t addr, storage_len_t len ) { return FAIL; }
+  default async command error_t ClientResource.request[ uint8_t id ]() { return FAIL; }
+  default async command error_t ClientResource.release[ uint8_t id ]() { return FAIL; }
+  
+}
+
diff --git a/tos/chips/stm25p/Stm25pConfigP.nc b/tos/chips/stm25p/Stm25pConfigP.nc
new file mode 100644
index 00000000..78dd4bd6
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pConfigP.nc
@@ -0,0 +1,474 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $
+ */
+
+#include <Stm25p.h>
+
+module Stm25pConfigP {
+  
+  provides interface Mount[ uint8_t client ];
+  provides interface ConfigStorage as Config[ uint8_t client ];
+  
+  uses interface Stm25pSector as Sector[ uint8_t client ];
+  uses interface Resource as ClientResource[ uint8_t client ];
+  uses interface Leds;
+  
+}
+
+implementation {
+  
+  enum {
+    NUM_CLIENTS = uniqueCount( "Stm25p.Config" ),
+    CONFIG_SIZE = 2048,
+    CHUNK_SIZE_LOG2 = 8,
+    CHUNK_SIZE = 1 << CHUNK_SIZE_LOG2,
+    NUM_CHUNKS = CONFIG_SIZE / CHUNK_SIZE,
+    BUF_SIZE = 16,
+    INVALID_VERSION = -1,
+  };
+  
+  enum {
+    S_IDLE,
+    S_MOUNT,
+    S_READ,
+    S_WRITE,
+    S_COMMIT,
+  };
+
+  typedef struct {
+    uint16_t addr;
+    void* buf;
+    uint16_t len;
+    uint8_t req;
+  } config_state_t;
+  config_state_t m_config_state[ NUM_CLIENTS ];
+  config_state_t m_req;
+  
+  typedef struct {
+    uint16_t chunk_addr[ NUM_CHUNKS ];
+    uint16_t write_addr;
+    int16_t version;
+    uint8_t cur_sector;
+    bool valid : 1;
+  } config_info_t;
+  config_info_t m_config_info[ NUM_CLIENTS ];
+
+  typedef struct {
+    int32_t version;
+    uint16_t crc;
+  } config_metadata_t;
+  config_metadata_t m_metadata[ 2 ];
+  
+  uint8_t m_buf[ BUF_SIZE ];
+  uint16_t m_chunk;
+  uint16_t m_offset;
+
+  enum {
+    S_COPY_BEFORE,
+    S_COPY_AFTER,
+  };
+  uint8_t m_meta_state;
+  
+  error_t newRequest( uint8_t client );
+  void continueMount( uint8_t id );
+  void continueWrite( uint8_t id );
+  void continueCommit( uint8_t id );
+  void signalDone( uint8_t id, error_t error );
+  
+  command error_t Mount.mount[ uint8_t client ]() {
+    
+    if ( call Sector.getNumSectors[ client ]() != 2 )
+      return ESIZE;
+    m_req.req = S_MOUNT;
+    return newRequest( client );
+    
+  }
+  
+  command error_t Config.read[ uint8_t client ]( storage_addr_t addr, 
+						 void* buf, 
+						 storage_len_t len ) {
+    
+    if ( !m_config_info[ client ].valid )
+      return FAIL;
+    m_req.req = S_READ;
+    m_req.addr = addr;
+    m_req.buf = buf;
+    m_req.len = len;
+    return newRequest( client );
+    
+  }
+  
+  command error_t Config.write[ uint8_t client ]( storage_addr_t addr,
+						  void* buf,
+						  storage_len_t len ) {
+    
+    m_req.req = S_WRITE;
+    m_req.addr = addr;
+    m_req.buf = buf;
+    m_req.len = len;
+    return newRequest( client );    
+    
+  }
+  
+  command error_t Config.commit[ uint8_t client ]() {
+    
+    m_req.req = S_COMMIT;
+    return newRequest( client );    
+    
+  }
+  
+  command storage_len_t Config.getSize[ uint8_t client ]() {
+    return CONFIG_SIZE;
+  }
+  
+  command bool Config.valid[ uint8_t client ]() {
+    return m_config_info[ client ].valid;
+  }
+
+  error_t newRequest( uint8_t client ) {
+
+    if ( m_config_state[ client ].req != S_IDLE )
+      return EBUSY;
+    
+    call ClientResource.request[ client ]();
+    m_config_state[ client ] = m_req;
+    
+    return SUCCESS;
+    
+  }
+  
+  stm25p_addr_t calcAddr( uint8_t id, uint16_t addr, bool current ) {
+    stm25p_addr_t result = addr;
+    if ( !(current ^ m_config_info[ id ].cur_sector) )
+      result += STM25P_SECTOR_SIZE;
+    return result;
+  }
+  
+  event void ClientResource.granted[ uint8_t id ]() {
+
+    m_chunk = 0;
+    m_offset = 0;
+    
+    switch( m_config_state[ id ].req ) {
+    case S_IDLE:
+      break;
+    case S_MOUNT:
+      continueMount( id );
+      break;
+    case S_READ:
+      call Sector.read[ id ]( calcAddr( id, m_config_state[ id ].addr, TRUE ),
+			      m_config_state[ id ].buf,
+			      m_config_state[ id ].len );
+      break;
+    case S_WRITE:
+      m_meta_state = S_COPY_BEFORE;
+      m_chunk = m_config_state[ id ].addr >> CHUNK_SIZE_LOG2;
+      continueWrite( id );
+      break;
+    case S_COMMIT:
+      continueCommit( id );
+      break;
+    }
+    
+  }
+
+  void continueMount( uint8_t id ) {
+
+    uint32_t addr = 0;
+    uint8_t cur_sector = 0;
+    int i;
+
+    switch( m_chunk ) {
+    case 1:
+      addr = STM25P_SECTOR_SIZE;
+      // fall through
+    case 0:
+      addr += STM25P_SECTOR_SIZE - sizeof( config_metadata_t );
+      call Sector.read[ id ]( addr, (uint8_t*)&m_metadata[ m_chunk ],
+                              sizeof( config_metadata_t ) );
+      break;
+    case 3:
+      addr = STM25P_SECTOR_SIZE;
+      // fall through
+    case 2:
+      call Sector.computeCrc[ id ]( 0, addr, CONFIG_SIZE );
+      break;
+    case 4:
+      if ( m_metadata[ 0 ].version != INVALID_VERSION ||
+	   m_metadata[ 1 ].version != INVALID_VERSION ) {
+	m_config_info[ id ].valid = TRUE;
+	if ( m_metadata[ 0 ].version == INVALID_VERSION )
+	  cur_sector = 1;
+	else if ( m_metadata[ 1 ].version == INVALID_VERSION )
+	  cur_sector = 0;
+	else
+	  cur_sector = (( m_metadata[1].version - m_metadata[0].version ) > 0);
+      }
+      m_config_info[ id ].cur_sector = cur_sector;
+      m_config_info[ id ].version = m_metadata[ cur_sector ].version;
+      call Sector.erase[ id ]( !cur_sector, 1 );
+      break;
+    case 5:
+      // initialize chunk addrs
+      for ( i = 0; i < NUM_CHUNKS; i++ )
+	m_config_info[ id ].chunk_addr[ i ] = i << CHUNK_SIZE_LOG2;
+      m_config_info[ id ].write_addr = CONFIG_SIZE;
+      signalDone( id, SUCCESS );
+      break;
+    }
+    
+    m_chunk++;
+    
+  }
+  
+  event void Sector.readDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, 
+					    stm25p_len_t len, error_t error ) {
+    switch ( m_config_state[ id ].req ) {
+    case S_IDLE:
+      break;
+    case S_MOUNT:
+      continueMount( id );
+      break;
+    case S_READ:
+      signalDone( id, error );
+      break;
+    case S_WRITE:
+      addr = calcAddr( id, m_config_info[ id ].write_addr, FALSE );
+      call Sector.write[ id ]( addr, buf, len );
+      break;
+    case S_COMMIT:
+      addr = ((uint16_t)m_chunk << CHUNK_SIZE_LOG2) + m_offset;
+      addr = calcAddr( id, addr, FALSE );
+      call Sector.write[ id ]( addr, buf, len );
+      break;
+    }
+  }
+  
+  void continueWrite( uint8_t id ) {
+    
+    config_state_t* state = &m_config_state[ id ];
+    config_info_t* info = &m_config_info[ id ];
+    uint8_t chunk = m_chunk + (m_offset / CHUNK_SIZE);
+    uint8_t offset = m_offset & 0xff;
+    uint32_t addr;
+    uint16_t len;
+    
+    // compute addr for copy
+    addr = info->chunk_addr[ chunk ] + offset;
+    addr = calcAddr( id, addr, info->chunk_addr[ chunk ] < CONFIG_SIZE );
+    
+    switch( m_meta_state ) {
+      
+    case S_COPY_BEFORE:
+      // copy old data before
+      if ( offset < (uint8_t)state->addr ) {
+	len = (uint8_t)state->addr - offset;
+	if ( len > sizeof( m_buf ) )
+	  len = sizeof( m_buf );
+	call Sector.read[ id ]( addr, m_buf, len );
+      }
+      // write new data
+      else if ( offset == (uint8_t)state->addr ) {
+	addr = calcAddr( id, info->write_addr, FALSE );
+	len = state->len;
+	call Sector.write[ id ]( addr, state->buf, len );
+	m_meta_state = S_COPY_AFTER;
+      }
+      break;
+
+    case S_COPY_AFTER:
+      // copy old data after
+      if ( offset != 0 ) {
+	len = CHUNK_SIZE - offset;
+	if ( len > sizeof( m_buf ) )
+	  len = sizeof( m_buf );
+	call Sector.read[ id ]( addr, m_buf, len );
+      }
+      // all done, update chunk addrs
+      else {
+	info->write_addr -= m_offset;
+	for ( chunk = 0; chunk < m_offset / CHUNK_SIZE; chunk++ ) {
+	  info->chunk_addr[ m_chunk+chunk ] = info->write_addr;
+	  info->write_addr += CHUNK_SIZE;
+	}
+	signalDone( id, SUCCESS );
+      }
+      break;
+
+    }
+
+  }
+  
+  event void Sector.writeDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, 
+					     stm25p_len_t len, error_t error ){
+    switch( m_config_state[ id ].req ) {
+
+    case S_WRITE:
+      m_config_info[ id ].write_addr += len;
+      m_offset += len;
+      continueWrite( id );
+      break;
+
+    case S_COMMIT:
+      m_offset += len;
+      continueCommit( id );
+      break;
+      
+    }
+
+  }
+  
+  event void Sector.eraseDone[ uint8_t id ]( uint8_t sector,
+					     uint8_t num_sectors,
+					     error_t error ) {
+    if ( m_config_state[ id ].req == S_MOUNT )
+      continueMount( id );
+    else
+      continueCommit( id );
+  }
+  
+  void continueCommit( uint8_t id ) {
+    
+    config_info_t* info = &m_config_info[ id ];
+    uint32_t addr;
+    uint16_t len;
+    int i;
+    
+    // check if time to copy next chunk
+    if ( m_offset >= CHUNK_SIZE ) {
+      m_chunk++;
+      m_offset = 0;
+    }
+    
+    // copy data
+    if ( m_chunk < NUM_CHUNKS ) {
+      // compute addr for copy
+      addr = info->chunk_addr[ m_chunk ] + m_offset;
+      addr = calcAddr( id, addr, info->chunk_addr[ m_chunk ] < CONFIG_SIZE );
+      len = sizeof( m_buf );
+      call Sector.read[ id ]( addr, m_buf, len );
+    }
+    // compute crc
+    else if ( m_chunk == NUM_CHUNKS ) {
+      addr = calcAddr( 0, 0, FALSE );
+      call Sector.computeCrc[ id ]( 0, addr, CONFIG_SIZE );
+      m_chunk++;
+    }
+    // swap and erase other sector
+    else if ( m_chunk == NUM_CHUNKS + 1 ) {
+      info->cur_sector ^= 1;
+      info->write_addr = CONFIG_SIZE;
+      // initialize chunks
+      for ( i = 0; i < NUM_CHUNKS; i++ )
+	info->chunk_addr[ i ] = (uint16_t)i << CHUNK_SIZE_LOG2;
+      call Sector.erase[ id ]( !info->cur_sector, 1 );
+      m_chunk++;
+    }
+    // signal done
+    else {
+      m_config_info[ id ].valid = TRUE;
+      signalDone( id, SUCCESS );
+    }
+    
+  }
+
+  event void Sector.computeCrcDone[ uint8_t id ]( stm25p_addr_t addr, 
+						  stm25p_len_t len,
+						  uint16_t crc,
+						  error_t error ) {
+    
+    // mount
+    if ( m_config_state[ id ].req == S_MOUNT ) {
+      uint8_t chunk = addr >> STM25P_SECTOR_SIZE_LOG2;
+      if ( m_metadata[ chunk ].crc != crc )
+	m_metadata[ chunk ].version = INVALID_VERSION;
+      continueMount( id );
+    }
+    // commit
+    else {
+      bool cur_sector = m_config_info[ id ].cur_sector;
+      m_config_info[ id ].version++;
+      m_metadata[ !cur_sector ].version = m_config_info[ id ].version;
+      m_metadata[ !cur_sector ].crc = crc;
+      addr += STM25P_SECTOR_SIZE - sizeof( config_metadata_t );
+      call Sector.write[ id ]( addr, (uint8_t*)&m_metadata[ !cur_sector ],
+			       sizeof( config_metadata_t ) );
+    }
+    
+  }
+
+  void signalDone( uint8_t id, error_t error ) {
+    
+    uint8_t req = m_config_state[ id ].req;
+    
+    call ClientResource.release[ id ]();
+    m_config_state[ id ].req = S_IDLE;
+    
+    switch( req ) {
+    case S_MOUNT:
+      signal Mount.mountDone[ id ]( error );
+      break;
+    case S_READ:
+      signal Config.readDone[ id ]( m_config_state[ id ].addr,
+				    m_config_state[ id ].buf,
+				    m_config_state[ id ].len, error );
+      break;
+    case S_WRITE:
+      signal Config.writeDone[ id ]( m_config_state[ id ].addr,
+				     m_config_state[ id ].buf,
+				     m_config_state[ id ].len, error );
+      break;
+    case S_COMMIT:
+      signal Config.commitDone[ id ]( error );
+      break;
+    }
+    
+  }
+  
+  default event void Mount.mountDone[ uint8_t id ]( error_t error ) {}
+  default event void Config.readDone[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {}
+  default event void Config.writeDone[ uint8_t id ]( storage_addr_t addr, void* buf, storage_len_t len, error_t error ) {}
+  default event void Config.commitDone[ uint8_t id ]( error_t error ) {}
+  
+  default command storage_addr_t Sector.getPhysicalAddress[ uint8_t id ]( storage_addr_t addr ) { return 0xffffffff; }
+  default command uint8_t Sector.getNumSectors[ uint8_t id ]() { return 0; }
+  default command error_t Sector.read[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len ) { return FAIL; }
+  default command error_t Sector.write[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len ) { return FAIL; }
+  default command error_t Sector.erase[ uint8_t id ]( uint8_t sector, uint8_t num_sectors ) { return FAIL; }
+  default command error_t Sector.computeCrc[ uint8_t id ]( uint16_t crc, storage_addr_t addr, storage_len_t len ) { return FAIL; }
+  default async command error_t ClientResource.request[ uint8_t id ]() { return FAIL; }
+  default async command error_t ClientResource.release[ uint8_t id ]() { return FAIL; }
+  
+}
diff --git a/tos/chips/stm25p/Stm25pLogConfigP.nc b/tos/chips/stm25p/Stm25pLogConfigP.nc
new file mode 100644
index 00000000..7c8d5355
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pLogConfigP.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:12 $
+ */
+
+generic module Stm25pLogConfigP( bool IS_CIRCULAR ) {
+
+  provides interface Get<bool> as Circular;
+
+}
+
+implementation {
+  
+  command bool Circular.get() {
+    return IS_CIRCULAR;
+  }
+
+}
diff --git a/tos/chips/stm25p/Stm25pLogP.nc b/tos/chips/stm25p/Stm25pLogP.nc
new file mode 100644
index 00000000..efae77c9
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pLogP.nc
@@ -0,0 +1,532 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.9 $ $Date: 2009-12-23 02:28:47 $
+ */
+
+#include <Stm25p.h>
+
+module Stm25pLogP {
+  
+  provides interface Init;
+  provides interface LogRead as Read[ uint8_t id ];
+  provides interface LogWrite as Write[ uint8_t id ];
+  
+  uses interface Stm25pSector as Sector[ uint8_t id ];
+  uses interface Resource as ClientResource[ uint8_t id ];
+  uses interface Get<bool> as Circular[ uint8_t id ];
+  uses interface Leds;
+
+}
+
+implementation {
+
+  enum {
+    NUM_LOGS = uniqueCount( "Stm25p.Log" ),
+    BLOCK_SIZE = 4096,
+    BLOCK_SIZE_LOG2 = 12,
+    BLOCK_MASK = BLOCK_SIZE - 1,
+    BLOCKS_PER_SECTOR = STM25P_SECTOR_SIZE / BLOCK_SIZE,
+    MAX_RECORD_SIZE = 254,
+    INVALID_HEADER = 0xff,
+  };
+  
+  typedef enum {
+    S_IDLE,
+    S_READ,
+    S_SEEK,
+    S_ERASE,
+    S_APPEND,
+    S_SYNC,
+  } stm25p_log_req_t;
+
+  typedef struct stm25p_log_state_t {
+    storage_cookie_t cookie;
+    void* buf;
+    uint8_t len;
+    stm25p_log_req_t req;
+  } stm25p_log_state_t;
+
+  typedef struct stm25p_log_info_t {
+    stm25p_addr_t read_addr;
+    stm25p_addr_t remaining;
+    stm25p_addr_t write_addr;
+  } stm25p_log_info_t;
+  
+  stm25p_log_state_t m_log_state[ NUM_LOGS ];
+  stm25p_log_state_t m_req;
+  stm25p_log_info_t m_log_info[ NUM_LOGS ];
+  stm25p_addr_t m_addr;
+  bool m_records_lost;
+  uint8_t m_header;
+  uint8_t m_len;
+
+  typedef enum {
+    S_SEARCH_BLOCKS,
+    S_SEARCH_RECORDS,
+    S_SEARCH_SEEK,
+    S_HEADER,
+    S_DATA,
+  } stm25p_log_rw_state_t;
+
+  stm25p_log_rw_state_t m_rw_state;
+
+  error_t newRequest( uint8_t client );
+  void continueReadOp( uint8_t client );
+  void continueAppendOp( uint8_t client );
+  void signalDone( uint8_t id, error_t error );
+  
+  command error_t Init.init() {
+    int i;
+    for ( i = 0; i < NUM_LOGS; i++ ) {
+      m_log_info[ i ].read_addr = STM25P_INVALID_ADDRESS;
+      m_log_info[ i ].write_addr = 0;
+    }
+    return SUCCESS;
+  }
+  
+  command error_t Read.read[ uint8_t id ]( void* buf, storage_len_t len ) {
+    
+    m_req.req = S_READ;
+    m_req.buf = buf;
+    m_req.len = len;
+    m_len = len;
+    return newRequest( id );
+    
+  }
+  
+  command error_t Read.seek[ uint8_t id ]( storage_addr_t cookie ) {
+    
+    if ( cookie > m_log_info[ id ].write_addr )
+      return FAIL;
+    
+    m_req.req = S_SEEK;
+    m_req.cookie = cookie;
+    return newRequest( id );
+    
+  }
+  
+  command storage_cookie_t Read.currentOffset[ uint8_t id ]() {
+    return m_log_info[ id ].read_addr;
+  }
+  
+  command storage_cookie_t Read.getSize[ uint8_t id ]() {
+    return ( (storage_len_t)call Sector.getNumSectors[ id ]()
+             << STM25P_SECTOR_SIZE_LOG2 );
+  }
+  
+  command storage_cookie_t Write.currentOffset[ uint8_t id ]() {
+    return m_log_info[ id ].write_addr;
+  }
+  
+  command error_t Write.erase[ uint8_t id ]() {
+    m_req.req = S_ERASE;
+    return newRequest( id );
+  }
+  
+  command error_t Write.append[ uint8_t id ]( void* buf, storage_len_t len ) {
+    
+    uint16_t bytes_left = (uint16_t)m_log_info[ id ].write_addr % BLOCK_SIZE;
+    bytes_left = BLOCK_SIZE - bytes_left;
+    
+    // don't allow appends larger than maximum record size
+    if ( len > MAX_RECORD_SIZE )
+      return EINVAL;
+    
+    // move to next block if current block doesn't have enough space
+    if ( sizeof( m_header ) + len > bytes_left )
+      m_log_info[ id ].write_addr += bytes_left;
+    
+    // if log is not circular, make sure it doesn't grow too large
+    if ( !call Circular.get[ id ]() &&
+	 ( (uint8_t)(m_log_info[ id ].write_addr >> STM25P_SECTOR_SIZE_LOG2) >=
+	   call Sector.getNumSectors[ id ]() ) )
+      return ESIZE;
+    
+    m_records_lost = FALSE;
+    m_req.req = S_APPEND;
+    m_req.buf = buf;
+    m_req.len = len;
+
+    return newRequest( id );
+
+  }
+  
+  command error_t Write.sync[ uint8_t id ]() {
+    m_req.req = S_SYNC;
+    return newRequest( id );
+  }
+  
+  error_t newRequest( uint8_t client ) {
+    
+    if ( m_log_state[ client ].req != S_IDLE )
+      return FAIL;
+    
+    call ClientResource.request[ client ]();
+    m_log_state[ client ] = m_req;
+    
+    return SUCCESS;
+    
+  }
+  
+  uint8_t calcSector( uint8_t client, stm25p_addr_t addr ) {
+    uint8_t sector = call Sector.getNumSectors[ client ]();
+    return (uint8_t)(( addr >> STM25P_SECTOR_SIZE_LOG2 ) % sector);
+  }
+
+  stm25p_addr_t calcAddr( uint8_t client, stm25p_addr_t addr  ) {
+    stm25p_addr_t result = calcSector( client, addr );
+    result <<= STM25P_SECTOR_SIZE_LOG2;
+    result |= addr & STM25P_SECTOR_MASK;
+    return result;
+  }
+
+  event void ClientResource.granted[ uint8_t id ]() {
+
+    // log never used, need to find start and end of log
+    if ( m_log_info[ id ].read_addr == STM25P_INVALID_ADDRESS &&
+	 m_log_state[ id ].req != S_ERASE ) {
+      m_rw_state = S_SEARCH_BLOCKS;
+      call Sector.read[ id ]( 0, (uint8_t*)&m_addr, sizeof( m_addr ) );
+    }
+    // start and end of log known, do the requested operation
+    else {
+      switch( m_log_state[ id ].req ) {
+      case S_READ:
+	m_rw_state = (m_log_info[ id ].remaining) ? S_DATA : S_HEADER;
+	continueReadOp( id );
+	break;
+      case S_SEEK:
+	{
+	  // make sure the cookie is still within the range of valid data
+	  uint8_t numSectors = call Sector.getNumSectors[ id ]();
+	  uint8_t readSector = 
+	    (m_log_state[ id ].cookie >> STM25P_SECTOR_SIZE_LOG2);
+	  uint8_t writeSector =
+	    ((m_log_info[ id ].write_addr-1)>>STM25P_SECTOR_SIZE_LOG2)+1;
+	  // if cookie is overwritten, advance to beginning of log
+	  if ( (writeSector - readSector) > numSectors ) {
+	    m_log_state[ id ].cookie = 
+	      (storage_cookie_t)(writeSector-numSectors)
+		<<STM25P_SECTOR_SIZE_LOG2;
+	  }
+	  m_log_info[ id ].read_addr = m_log_state[ id ].cookie & ~BLOCK_MASK;
+	  m_log_info[ id ].remaining = 0;
+	  m_rw_state = S_SEARCH_SEEK;
+	  if ( m_log_info[ id ].read_addr != m_log_state[ id ].cookie ) {
+	    m_log_info[ id ].read_addr += sizeof( m_addr );
+	    call Sector.read[ id ]( calcAddr( id, m_log_info[ id ].read_addr ),
+				    &m_header, sizeof( m_header ) );
+	  }
+	  else
+	    signalDone( id, SUCCESS );
+	}
+	break;
+      case S_ERASE:
+	call Sector.erase[ id ]( 0, call Sector.getNumSectors[ id ]() );
+	break;
+      case S_APPEND:
+	m_rw_state = S_HEADER;
+	continueAppendOp( id );
+	break;
+      case S_SYNC:
+	signalDone( id, SUCCESS );
+	break;
+      case S_IDLE:
+	break;
+      }
+    }
+    
+  }
+
+  void continueReadOp( uint8_t client ) {
+    
+    stm25p_addr_t read_addr = m_log_info[ client ].read_addr;
+    uint8_t* buf;
+    uint8_t len;
+
+    // check if all done
+    if ( m_len == 0 || read_addr >= m_log_info[ client ].write_addr ) {
+      signalDone( client, SUCCESS );
+      return;
+    }
+    
+    buf = &m_header;
+    len = sizeof( m_header );
+
+    if ( m_rw_state == S_DATA ) {
+      // if header is invalid, move to next block
+      if ( m_header == INVALID_HEADER ) {
+	m_rw_state = S_HEADER;
+	read_addr += BLOCK_SIZE;
+	read_addr &= ~BLOCK_MASK;
+      }
+      else {
+	buf = m_log_state[ client ].buf + m_log_state[ client ].len - m_len;
+	// truncate if record is shorter than requested length
+	if ( m_log_info[ client ].remaining < m_len )
+	  len = m_log_info[ client ].remaining;
+	else
+	  len = m_len;
+      }
+    }
+    
+    // if on block boundary
+    if ( !((uint16_t)read_addr & BLOCK_MASK ) )
+      read_addr += sizeof( m_addr );
+    
+    m_log_info[ client ].read_addr = read_addr;
+    call Sector.read[ client ]( calcAddr( client, read_addr ), buf, len );
+    
+  }
+  
+  event void Sector.readDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf,
+					    stm25p_len_t len, error_t error ) {
+
+    stm25p_log_info_t* log_info = &m_log_info[ id ];
+
+    // searching for the first and last log blocks
+    switch( m_rw_state ) {
+    case S_SEARCH_BLOCKS: 
+      {
+	uint16_t block = addr >> BLOCK_SIZE_LOG2;
+	// record potential starting and ending addresses
+	if ( m_addr != STM25P_INVALID_ADDRESS ) {
+	  if ( m_addr < log_info->read_addr )
+	    log_info->read_addr = m_addr;
+	  if ( m_addr > log_info->write_addr )
+	    log_info->write_addr = m_addr;
+	}
+	// move on to next log block
+	if (++block < (call Sector.getNumSectors[ id ]()*BLOCKS_PER_SECTOR)) {
+	  addr += BLOCK_SIZE;
+	  call Sector.read[ id ]( addr, (uint8_t*)&m_addr, sizeof( m_addr ) );
+	}
+	// if log is empty, continue operation
+	else if ( log_info->read_addr == STM25P_INVALID_ADDRESS ) {
+	  log_info->read_addr = 0;
+	  log_info->write_addr = 0;
+	  signal ClientResource.granted[ id ]();
+	}
+	// search for last record
+	else {
+	  log_info->write_addr += sizeof( m_addr );
+	  m_rw_state = S_SEARCH_RECORDS;
+	  call Sector.read[ id ]( calcAddr(id, log_info->write_addr), &m_header,
+				  sizeof( m_header ) );
+	}
+      }
+      break;
+
+    case S_SEARCH_RECORDS: 
+      {
+	// searching for the last log record to write
+	uint16_t cur_block = log_info->write_addr >> BLOCK_SIZE_LOG2;
+	uint16_t new_block = ( log_info->write_addr + sizeof( m_header ) + 
+			       m_header ) >> BLOCK_SIZE_LOG2;
+	// if header is valid and is on same block, move to next record
+	if ( m_header != INVALID_HEADER && cur_block == new_block ) {
+	  log_info->write_addr += sizeof( m_header ) + m_header;
+	  call Sector.read[ id ]( calcAddr( id, log_info->write_addr ), 
+				  &m_header, sizeof( m_header ) );
+	}
+	// found last record
+	else {
+	  signal ClientResource.granted[ id ]();
+	}
+      }
+      break;
+
+    case S_SEARCH_SEEK:
+      {
+	// searching for last log record to read
+	log_info->read_addr += sizeof( m_header ) + m_header;
+	// if not yet at cookie, keep searching
+	if ( log_info->read_addr < m_log_state[ id ].cookie ) {
+	  call Sector.read[ id ]( calcAddr(id, log_info->read_addr), &m_header,
+				  sizeof( m_header ) );
+	}
+	// at or passed cookie, stop
+	else {
+	  log_info->remaining = log_info->read_addr - m_log_state[ id ].cookie;
+	  log_info->read_addr = m_log_state[ id ].cookie;
+	  signalDone( id, error );
+	}
+      }
+      break;
+
+    case S_HEADER:
+      {
+	// if header is invalid, move to next block
+	if ( m_header == INVALID_HEADER ) {
+	  log_info->read_addr += BLOCK_SIZE;
+	  log_info->read_addr &= ~BLOCK_MASK;
+	}
+	else {
+	  log_info->read_addr += sizeof( m_header );
+	  log_info->remaining = m_header;
+	  m_rw_state = S_DATA;
+	}
+	continueReadOp( id );
+      }
+      break;
+
+    case S_DATA:
+      {
+	log_info->read_addr += len;
+	log_info->remaining -= len;
+	m_len -= len;
+	m_rw_state = S_HEADER;
+	continueReadOp( id );
+	break;
+      }
+      
+    }
+    
+  }
+
+  void continueAppendOp( uint8_t client ) {
+    
+    stm25p_addr_t write_addr = m_log_info[ client ].write_addr;
+    void* buf;
+    uint8_t len;
+    
+    if ( !(uint16_t)write_addr ) {
+      m_records_lost = TRUE;
+      call Sector.erase[ client ]( calcSector( client, write_addr ), 1 );
+    }
+    else {
+      if ( !((uint16_t)write_addr & BLOCK_MASK) ) {
+	buf = &m_log_info[ client ].write_addr;
+	len = sizeof( m_addr );
+      }
+      else if ( m_rw_state == S_HEADER ) {
+	buf = &m_log_state[ client ].len;
+	len = sizeof( m_log_state[ client ].len );
+      }
+      else {
+	buf = m_log_state[ client ].buf;
+	len = m_log_state[ client ].len;
+      }
+      call Sector.write[ client ]( calcAddr( client, write_addr ), buf, len );
+    }
+
+  }
+
+  event void Sector.eraseDone[ uint8_t id ]( uint8_t sector, 
+					     uint8_t num_sectors,
+					     error_t error ) {
+    if ( m_log_state[ id ].req == S_ERASE ) {
+      m_log_info[ id ].read_addr = 0;
+      m_log_info[ id ].write_addr = 0;
+      signalDone( id, error );
+    }
+    else {
+      // advance read pointer if write pointer has gone too far ahead
+      // (the log could have cycled around)
+      stm25p_addr_t volume_size = 
+	STM25P_SECTOR_SIZE * ( call Sector.getNumSectors[ id ]() - 1 );
+      if ( m_log_info[ id ].write_addr > volume_size ) {
+	stm25p_addr_t read_addr = m_log_info[ id ].write_addr - volume_size;
+	if ( m_log_info[ id ].read_addr < read_addr )
+	  m_log_info[ id ].read_addr = read_addr;
+      }
+      m_addr = m_log_info[ id ].write_addr;
+      call Sector.write[ id ]( calcAddr( id, m_addr ), (uint8_t*)&m_addr, 
+			      sizeof( m_addr ) );
+    }
+  }
+
+  event void Sector.writeDone[ uint8_t id ]( storage_addr_t addr, 
+					     uint8_t* buf, 
+					     storage_len_t len, 
+					     error_t error ) {
+    m_log_info[ id ].write_addr += len;
+    if ( m_rw_state == S_HEADER ) {
+      if ( len == sizeof( m_header ) )
+	m_rw_state = S_DATA;
+      continueAppendOp( id );
+    }
+    else {
+      signalDone( id, error );
+    }
+  }
+  
+  void signalDone( uint8_t id, error_t error ) {
+    
+    stm25p_log_req_t req = m_log_state[ id ].req;
+    void* buf = m_log_state[ id ].buf;
+    storage_len_t len = m_log_state[ id ].len;
+
+    call ClientResource.release[ id ]();
+    m_log_state[ id ].req = S_IDLE;
+    switch( req ) {
+    case S_IDLE:
+      break;
+    case S_READ:
+      signal Read.readDone[ id ]( buf, len - m_len, error );
+      break;
+    case S_SEEK:
+      signal Read.seekDone[ id ]( error );
+      break;
+    case S_ERASE:
+      signal Write.eraseDone[ id ]( error );
+      break;
+    case S_APPEND:
+      signal Write.appendDone[ id ]( buf, len, m_records_lost, error );
+      break;
+    case S_SYNC:
+      signal Write.syncDone[ id ]( error );
+      break;
+    }
+  }
+
+  event void Sector.computeCrcDone[ uint8_t id ]( stm25p_addr_t addr, stm25p_len_t len, uint16_t crc, error_t error ) {}
+
+  default event void Read.readDone[ uint8_t id ]( void* data, storage_len_t len, error_t error ) {}
+  default event void Read.seekDone[ uint8_t id ]( error_t error ) {}
+  default event void Write.eraseDone[ uint8_t id ]( error_t error ) {}
+  default event void Write.appendDone[ uint8_t id ]( void* data, storage_len_t len, bool recordsLost, error_t error ) {}
+  default event void Write.syncDone[ uint8_t id ]( error_t error ) {}
+
+  default command storage_addr_t Sector.getPhysicalAddress[ uint8_t id ]( storage_addr_t addr ) { return 0xffffffff; }
+  default command uint8_t Sector.getNumSectors[ uint8_t id ]() { return 0; }
+  default command error_t Sector.read[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len ) { return FAIL; }
+  default command error_t Sector.write[ uint8_t id ]( storage_addr_t addr, uint8_t* buf, storage_len_t len ) { return FAIL; }
+  default command error_t Sector.erase[ uint8_t id ]( uint8_t sector, uint8_t num_sectors ) { return FAIL; }
+  default command error_t Sector.computeCrc[ uint8_t id ]( uint16_t crc, storage_addr_t addr, storage_len_t len ) { return FAIL; }
+  default async command error_t ClientResource.request[ uint8_t id ]() { return FAIL; }
+  default async command error_t ClientResource.release[ uint8_t id ]() { return FAIL; }
+  default command bool Circular.get[ uint8_t id ]() { return FALSE; }
+  
+}
diff --git a/tos/chips/stm25p/Stm25pSector.nc b/tos/chips/stm25p/Stm25pSector.nc
new file mode 100644
index 00000000..82c986b7
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pSector.nc
@@ -0,0 +1,148 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HAL for the ST M25P family of serial code flash chips. This
+ * provides a sector level abstraction to perform basic
+ * operations. Upon completion of a write/erase operation, all data is
+ * committed to non-volatile storage.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:13 $
+ */
+
+#include "Stm25p.h"
+
+interface Stm25pSector {
+
+  /**
+   * Get the physical address of a volume address.
+   *
+   * @return The physical address corresponding to the volume address.
+   */
+  command stm25p_addr_t getPhysicalAddress( stm25p_addr_t addr );
+
+  /**
+   * Get the number of sectors in the volume.
+   */
+  command uint8_t getNumSectors();
+
+  /**
+   * Read data from the flash chip. On SUCCESS, the
+   * <code>readDone</code> event will be signalled when the operation
+   * is complete.
+   *
+   * @param addr within volume to read data from.
+   * @param buf pointer to read buffer.
+   * @param len number of bytes to read.
+   * @return SUCCESS if request was accepted, FAIL otherwise.
+   */
+  command error_t read( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len );
+
+  /**
+   * Signals when the read operation is complete.
+   *
+   * @param addr within the volume that data was read from.
+   * @param buf pointer to buffer that data was placed.
+   * @param len number of bytes read.
+   * @param error notification of how the operation went.
+   */
+  event void readDone( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, 
+		       error_t error );
+  
+  /**
+   * Write data to the flash chip. On SUCCESS, the
+   * <code>writeDone</code> event will be signalled when the operation
+   * is complete.
+   *
+   * @param addr within volume to write data to.
+   * @param buf pointer to data buffer.
+   * @param len number of bytes to write.
+   * @return SUCCESS if request was accepted, FAIL otherwise.
+   */
+  command error_t write( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len );
+
+  /**
+   * Signals when the write operation is complete.
+   *
+   * @param addr within the volume that data was written to.
+   * @param buf pointer to data buffer.
+   * @param len number of bytes written.
+   * @param error notification of how the operation went.
+   */
+  event void writeDone( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, 
+			error_t error );
+  
+  /**
+   * Erase a number of sectors. On SUCCESS, the <code>eraseDone</code>
+   * event will be signalled when the operation completes.
+   *
+   * @param sector within volume to begin erasing.
+   * @param num_sectors number of sectors to erase.
+   * @return SUCCESS if request was accepted, FAIL otherwise.
+   */
+  command error_t erase( uint8_t sector, uint8_t num_sectors );
+
+  /**
+   * Signals when the erase operation is complete.
+   *
+   * @param sector within volume that erasing begain.
+   * @param num_sectors number of sectors erased.
+   * @param error notification of how the operation went.
+   */
+  event void eraseDone( uint8_t sector, uint8_t num_sectors, error_t error );
+  
+  /**
+   * Compute CRC for some contiguous data. On SUCCESS, the
+   * <code>computeCrcDone</code> event will be signalled when the
+   * operation completes.
+   *
+   * @param crc the crc value to start with.
+   * @param addr within the volume to begin crc computation.
+   * @param len number of bytes to compute crc over.
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  command error_t computeCrc( uint16_t crc, stm25p_addr_t addr, 
+			      stm25p_len_t len );
+  
+  /**
+   * Signals when the crc computation is complete.
+   *
+   * @param addr within the volume that the crc computation began at.
+   * @param len number of bytes that the crc was computed over.
+   * @param crc the resulting crc value
+   * @param error notification of how the operation went.
+   */
+  event void computeCrcDone( stm25p_addr_t addr, stm25p_len_t len, 
+			     uint16_t crc, error_t error );
+
+}
+
diff --git a/tos/chips/stm25p/Stm25pSectorC.nc b/tos/chips/stm25p/Stm25pSectorC.nc
new file mode 100644
index 00000000..27232d6a
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pSectorC.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the sector storage absraction for the ST M25P
+ * serial code flash.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2007-02-04 19:55:17 $
+ */
+
+configuration Stm25pSectorC {
+
+  provides interface Resource as ClientResource[ uint8_t id ];
+  provides interface Stm25pSector as Sector[ uint8_t id ];
+  provides interface Stm25pVolume as Volume[ uint8_t id ];
+
+}
+
+implementation {
+
+  components MainC;
+
+  components Stm25pSectorP as SectorP;
+  ClientResource = SectorP;
+  Sector = SectorP;
+  Volume = SectorP;
+  
+  components new FcfsArbiterC( "Stm25p.Volume" ) as ArbiterC;
+  SectorP.Stm25pResource -> ArbiterC;
+
+  components new SplitControlDeferredPowerManagerC( 1024 ) as PowerManagerC;
+  PowerManagerC.SplitControl -> SectorP;
+  PowerManagerC.ResourceDefaultOwner -> ArbiterC;
+  PowerManagerC.ArbiterInfo -> ArbiterC;
+
+  components Stm25pSpiC as SpiC;
+  SectorP.SpiResource -> SpiC;
+  SectorP.Spi -> SpiC;
+  MainC.SoftwareInit -> SpiC;
+
+  components LedsC as Leds;
+  SectorP.Leds -> Leds;
+
+}
+
diff --git a/tos/chips/stm25p/Stm25pSectorP.nc b/tos/chips/stm25p/Stm25pSectorP.nc
new file mode 100644
index 00000000..254a93c4
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pSectorP.nc
@@ -0,0 +1,292 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2007-12-22 08:11:51 $
+ */
+
+#include <Stm25p.h>
+#include <StorageVolumes.h>
+
+module Stm25pSectorP {
+
+  provides interface SplitControl;
+  provides interface Resource as ClientResource[ uint8_t id ];
+  provides interface Stm25pSector as Sector[ uint8_t id ];
+  provides interface Stm25pVolume as Volume[ uint8_t id ];
+
+  uses interface Resource as Stm25pResource[ uint8_t id ];
+  uses interface Resource as SpiResource;
+  uses interface Stm25pSpi as Spi;
+  uses interface Leds;
+
+}
+
+implementation {
+
+  enum {
+    NO_CLIENT = 0xff,
+  };
+
+  typedef enum {
+    S_IDLE,
+    S_READ,
+    S_WRITE,
+    S_ERASE,
+    S_CRC,
+  } stm25p_sector_state_t;
+  norace stm25p_sector_state_t m_state;
+
+  typedef enum {
+    S_NONE,
+    S_START,
+    S_STOP,
+  } stm25p_power_state_t;
+  norace stm25p_power_state_t m_power_state;
+
+  norace uint8_t m_client;
+  norace stm25p_addr_t m_addr;
+  norace stm25p_len_t m_len;
+  norace stm25p_len_t m_cur_len;
+  norace uint8_t* m_buf;
+  norace error_t m_error;
+  norace uint16_t m_crc;
+  
+  void bindVolume();
+  void signalDone( error_t error );
+  task void signalDone_task();
+
+  command error_t SplitControl.start() {
+    error_t error = call SpiResource.request();
+    if ( error == SUCCESS )
+      m_power_state = S_START;
+    return error;
+  }
+  
+  command error_t SplitControl.stop() {
+    error_t error = call SpiResource.request();
+    if ( error == SUCCESS )
+      m_power_state = S_STOP;
+    return error;
+  }
+  
+  async command error_t ClientResource.request[ uint8_t id ]() {
+    return call Stm25pResource.request[ id ]();
+  }
+
+  async command error_t ClientResource.immediateRequest[ uint8_t id ]() {
+    return FAIL;
+  }
+  
+  async command error_t ClientResource.release[ uint8_t id ]() {
+    if ( m_client == id ) {
+      m_state = S_IDLE;
+      m_client = NO_CLIENT;
+      call SpiResource.release();
+      call Stm25pResource.release[ id ]();
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+  
+  event void Stm25pResource.granted[ uint8_t id ]() {
+    m_client = id;
+    call SpiResource.request();
+  }
+  
+  uint8_t getVolumeId( uint8_t client ) {
+    return signal Volume.getVolumeId[ client ]();
+  }  
+  
+  event void SpiResource.granted() {
+    error_t error;
+    stm25p_power_state_t power_state = m_power_state;
+    m_power_state = S_NONE;
+    if ( power_state == S_START ) {
+      error = call Spi.powerUp();
+      call SpiResource.release();
+      signal SplitControl.startDone( error );
+      return;
+    }
+    else if ( power_state == S_STOP ) {
+      error = call Spi.powerDown();
+      call SpiResource.release();
+      signal SplitControl.stopDone( error );
+      return;
+    }
+    signal ClientResource.granted[ m_client ]();
+  }
+  
+  async command uint8_t ClientResource.isOwner[ uint8_t id ]() {
+    return call Stm25pResource.isOwner[id]();
+  }
+  
+  stm25p_addr_t physicalAddr( uint8_t id, stm25p_addr_t addr ) {
+    return addr + ( (stm25p_addr_t)STM25P_VMAP[ getVolumeId( id ) ].base 
+		    << STM25P_SECTOR_SIZE_LOG2 );
+  }
+  
+  stm25p_len_t calcWriteLen( stm25p_addr_t addr ) {
+    stm25p_len_t len = STM25P_PAGE_SIZE - ( addr & STM25P_PAGE_MASK );
+    return ( m_cur_len < len ) ? m_cur_len : len;
+  }
+  
+  command stm25p_addr_t Sector.getPhysicalAddress[ uint8_t id ]( stm25p_addr_t addr ) {
+    return physicalAddr( id, addr );
+  }
+  
+  command uint8_t Sector.getNumSectors[ uint8_t id ]() {
+    return STM25P_VMAP[ getVolumeId( id ) ].size;
+  }
+  
+  command error_t Sector.read[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, 
+					     stm25p_len_t len ) {
+    
+    m_state = S_READ;
+    m_addr = addr;
+    m_buf = buf;
+    m_len = len;
+    
+    return call Spi.read( physicalAddr( id, addr ), buf, len );
+    
+  }
+  
+  async event void Spi.readDone( stm25p_addr_t addr, uint8_t* buf, 
+				 stm25p_len_t len, error_t error ) {
+    signalDone( error );
+  }
+  
+  command error_t Sector.write[ uint8_t id ]( stm25p_addr_t addr, 
+					      uint8_t* buf, 
+					      stm25p_len_t len ) {
+    
+    m_state = S_WRITE;
+    m_addr = addr;
+    m_buf = buf;
+    m_len = m_cur_len = len;
+    
+    return call Spi.pageProgram( physicalAddr( id, addr ), buf, 
+				 calcWriteLen( addr ) );
+    
+  }
+  
+  async event void Spi.pageProgramDone( stm25p_addr_t addr, uint8_t* buf, 
+					stm25p_len_t len, error_t error ) {
+    addr += len;
+    buf += len;
+    m_cur_len -= len;
+    if ( !m_cur_len )
+      signalDone( SUCCESS );
+    else
+      call Spi.pageProgram( addr, buf, calcWriteLen( addr ) );
+  }
+  
+  command error_t Sector.erase[ uint8_t id ]( uint8_t sector,
+					      uint8_t num_sectors ) {
+    
+    m_state = S_ERASE;
+    m_addr = sector;
+    m_len = num_sectors;
+    m_cur_len = 0;
+    
+    return call Spi.sectorErase( STM25P_VMAP[ getVolumeId(id) ].base + m_addr +
+				 m_cur_len );
+    
+  }
+  
+  async event void Spi.sectorEraseDone( uint8_t sector, error_t error ) {
+    if ( ++m_cur_len < m_len )
+      call Spi.sectorErase( STM25P_VMAP[getVolumeId(m_client)].base + m_addr +
+			    m_cur_len );
+    else
+      signalDone( error );
+  }
+  
+  command error_t Sector.computeCrc[ uint8_t id ]( uint16_t crc, 
+						   stm25p_addr_t addr,
+						   stm25p_len_t len ) {
+    
+    m_state = S_CRC;
+    m_addr = addr;
+    m_len = len;
+    
+    return call Spi.computeCrc( crc, physicalAddr( id, addr ), m_len );
+    
+  }
+  
+  async event void Spi.computeCrcDone( uint16_t crc, stm25p_addr_t addr, 
+				       stm25p_len_t len, error_t error ) {
+    m_crc = crc;
+    signalDone( SUCCESS );
+  }
+  
+  async event void Spi.bulkEraseDone( error_t error ) {
+    
+  }
+  
+  void signalDone( error_t error ) {
+    m_error = error;
+    post signalDone_task();
+  }
+  
+  task void signalDone_task() {
+    switch( m_state ) {
+    case S_IDLE:
+      signal ClientResource.granted[ m_client ]();
+      break;
+    case S_READ:
+      signal Sector.readDone[ m_client ]( m_addr, m_buf, m_len, m_error );
+      break;
+    case S_CRC:
+      signal Sector.computeCrcDone[ m_client ]( m_addr, m_len,
+						m_crc, m_error );
+      break;
+    case S_WRITE:
+      signal Sector.writeDone[ m_client ]( m_addr, m_buf, m_len, m_error );
+      break;
+    case S_ERASE:
+      signal Sector.eraseDone[ m_client ]( m_addr, m_len, m_error );
+      break;
+    default:
+      break;
+    }
+  }
+  
+  default event void ClientResource.granted[ uint8_t id ]() {}
+  default event void Sector.readDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ) {}
+  default event void Sector.writeDone[ uint8_t id ]( stm25p_addr_t addr, uint8_t* buf, stm25p_len_t len, error_t error ) {}
+  default event void Sector.eraseDone[ uint8_t id ]( uint8_t sector, uint8_t num_sectors, error_t error ) {}
+  default event void Sector.computeCrcDone[ uint8_t id ]( stm25p_addr_t addr, stm25p_len_t len, uint16_t crc, error_t error ) {}
+  default async event volume_id_t Volume.getVolumeId[ uint8_t id ]() { return 0xff; }
+  
+}
+
diff --git a/tos/chips/stm25p/Stm25pSpi.nc b/tos/chips/stm25p/Stm25pSpi.nc
new file mode 100644
index 00000000..7083c553
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pSpi.nc
@@ -0,0 +1,161 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * SPI abstraction for the ST M25P family of serial code flash chips.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:13 $
+ */
+
+interface Stm25pSpi {
+
+  /**
+   * Put chip into deep power down mode.
+   *
+   * @return SUCCESS if the request completed successfully, FAIL
+   * otherwise.
+   */
+  async command error_t powerDown();
+
+  /**
+   * Release chip from power down mode.
+   *
+   * @return SUCCESS if the request completed successfully, FAIL
+   * otherwise.
+   */
+  async command error_t powerUp();
+  
+  /**
+   * Initiate a read operation. On SUCCESS, the <code>readDone</cdoe>
+   * event will be signalled when the operation completes.
+   *
+   * @param addr the physical address to start at.
+   * @param buf pointer to data buffer.
+   * @param len number of bytes to read.
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t read( stm25p_addr_t addr, uint8_t* buf, 
+			      stm25p_len_t len );
+
+  /**
+   * Signals the completion of a read operation.
+   *
+   * @param addr the starting physical address.
+   * @param buf pointer to data buffer.
+   * @param len number of bytes read.
+   * @param error notification of how the operation went.
+   */
+  async event void readDone( stm25p_addr_t addr, uint8_t* buf, 
+			     stm25p_len_t len, error_t error );
+
+  /**
+   * Initiate a crc computation. On SUCCESS, the
+   * <code>computeCrcDone</code> event will be signalled when the
+   * operation completes.
+   *
+   * @param crc starting crc value.
+   * @param addr the starting physical address.
+   * @param len the number of bytes to do crc computation over.
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t computeCrc( uint16_t crc, stm25p_addr_t addr,
+				    stm25p_len_t len );
+
+  /**
+   * Signals the completion of a crc computation operation.
+   *
+   * @param crc resulting crc value.
+   * @param addr the starting physical address.
+   * @param len the number of bytes the crc was computed over.
+   * @param error notification of how the operation went.
+   */
+  async event void computeCrcDone( uint16_t crc, stm25p_addr_t addr,
+				   stm25p_len_t len, error_t error );
+
+  /**
+   * Initiate a page program. On SUCCESS, the
+   * <code>pageProgramDone</code> event will be signalled when the
+   * operation completes.
+   *
+   * @param addr starting physical address.
+   * @param buf pointer to data buffer.
+   * @param len number of bytes to write.
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t pageProgram( stm25p_addr_t addr, uint8_t* buf, 
+				     stm25p_len_t len );
+
+  /**
+   * Signal the completion of a page program operation.
+   *
+   * @param addr starting physical address.
+   * @param buf pointer to data buffer.
+   * @param len number of bytes to write.
+   * @param error notification of how the operation went.
+   */
+  async event void pageProgramDone( stm25p_addr_t addr, uint8_t* buf, 
+				    stm25p_len_t len, error_t error );
+
+  /**
+   * Initiate a sector erase. On SUCCESS, the
+   * <code>sectorEraseDone</code> event will be signalled when the
+   * operation completes.
+   *
+   * @param sector physical sector to erase.
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t sectorErase( uint8_t sector );
+
+  /**
+   * Signals the completion of a sector erase operation.
+   *
+   * @param sector physical sector erased
+   * @param error notification of how the operation went.
+   */
+  async event void sectorEraseDone( uint8_t sector, error_t error );
+
+  /**
+   * Initiate a bulk erase. On SUCCESS, the <code>bulkEraseDone</code>
+   * event will be signalled when the operation completes.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t bulkErase();
+
+  /**
+   * Signals the completion of a bulk erase operation.
+   *
+   * @param error notification of how the operation went.
+   */
+  async event void bulkEraseDone( error_t error );
+
+}
diff --git a/tos/chips/stm25p/Stm25pSpiC.nc b/tos/chips/stm25p/Stm25pSpiC.nc
new file mode 100644
index 00000000..63474f4d
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pSpiC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the SPI bus abstraction for the ST M25P serial
+ * code flash.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:13 $
+ */
+
+configuration Stm25pSpiC {
+
+  provides interface Init;
+  provides interface Resource;
+  provides interface Stm25pSpi;
+
+}
+
+implementation {
+
+  components Stm25pSpiP as SpiP;
+  Init = SpiP;
+  Resource = SpiP.ClientResource;
+  Stm25pSpi = SpiP;
+
+  components HplStm25pSpiC as SpiC;
+  SpiP.SpiResource -> SpiC;
+  SpiP.SpiByte -> SpiC;
+  SpiP.SpiPacket -> SpiC;
+
+  components HplStm25pPinsC as PinsC;
+  SpiP.CSN -> PinsC.CSN;
+  SpiP.Hold -> PinsC.Hold;
+
+  components LedsC as Leds;
+  SpiP.Leds -> Leds;
+
+}
diff --git a/tos/chips/stm25p/Stm25pSpiP.nc b/tos/chips/stm25p/Stm25pSpiP.nc
new file mode 100644
index 00000000..498baab9
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pSpiP.nc
@@ -0,0 +1,272 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:13 $
+ */
+
+#include "crc.h"
+
+module Stm25pSpiP {
+
+  provides interface Init;
+  provides interface Resource as ClientResource;
+  provides interface Stm25pSpi as Spi;
+
+  uses interface Resource as SpiResource;
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as Hold;
+  uses interface SpiByte;
+  uses interface SpiPacket;
+  uses interface Leds;
+
+}
+
+implementation {
+
+  enum {
+    CRC_BUF_SIZE = 16,
+  };
+
+  typedef enum {
+    S_READ = 0x3,
+    S_PAGE_PROGRAM = 0x2,
+    S_SECTOR_ERASE = 0xd8,
+    S_BULK_ERASE = 0xc7,
+    S_WRITE_ENABLE = 0x6,
+    S_POWER_ON = 0xab,
+    S_DEEP_SLEEP = 0xb9,
+  } stm25p_cmd_t;
+
+  norace uint8_t m_cmd[ 4 ];
+
+  norace bool m_is_writing = FALSE;
+  norace bool m_computing_crc = FALSE;
+
+  norace stm25p_addr_t m_addr;
+  norace uint8_t* m_buf;
+  norace stm25p_len_t m_len;
+  norace stm25p_addr_t m_cur_addr;
+  norace stm25p_len_t m_cur_len;
+  norace uint8_t m_crc_buf[ CRC_BUF_SIZE ];
+  norace uint16_t m_crc;
+
+  error_t newRequest( bool write, stm25p_len_t cmd_len );
+  void signalDone( error_t error );
+
+  uint8_t sendCmd( uint8_t cmd, uint8_t len ) {
+
+    uint8_t tmp = 0;
+    int i;
+
+    call CSN.clr();
+    for ( i = 0; i < len; i++ )
+      tmp = call SpiByte.write( cmd );
+    call CSN.set();
+
+    return tmp;
+
+  }
+
+  command error_t Init.init() {
+    call CSN.makeOutput();
+    call Hold.makeOutput();
+    call CSN.set();
+    call Hold.set();
+    return SUCCESS;
+  }
+
+  async command error_t ClientResource.request() {
+    return call SpiResource.request();
+  }
+
+  async command error_t ClientResource.immediateRequest() {
+    return call SpiResource.immediateRequest();
+  }
+  
+  async command error_t ClientResource.release() {
+    return call SpiResource.release();
+  }
+
+  async command uint8_t ClientResource.isOwner() {
+    return call SpiResource.isOwner();
+  }
+
+  stm25p_len_t calcReadLen() {
+    return ( m_cur_len < CRC_BUF_SIZE ) ? m_cur_len : CRC_BUF_SIZE;
+  }  
+
+  async command error_t Spi.powerDown() {
+    sendCmd( S_DEEP_SLEEP, 1 );
+    return SUCCESS;
+  }
+
+  async command error_t Spi.powerUp() {
+    sendCmd( S_POWER_ON, 5 );
+    return SUCCESS;
+  }
+
+  async command error_t Spi.read( stm25p_addr_t addr, uint8_t* buf, 
+				  stm25p_len_t len ) {
+    m_cmd[ 0 ] = S_READ;
+    m_addr = addr;
+    m_buf = buf;
+    m_len = len;
+    return newRequest( FALSE, 4 );
+  }
+
+  async command error_t Spi.computeCrc( uint16_t crc, stm25p_addr_t addr,
+					stm25p_len_t len ) {
+    m_computing_crc = TRUE;
+    m_crc = crc;
+    m_addr = m_cur_addr = addr;
+    m_len = m_cur_len = len;
+    return call Spi.read( addr, m_crc_buf, calcReadLen() );
+  }
+  
+  async command error_t Spi.pageProgram( stm25p_addr_t addr, uint8_t* buf, 
+					 stm25p_len_t len ) {
+    m_cmd[ 0 ] = S_PAGE_PROGRAM;
+    m_addr = addr;
+    m_buf = buf;
+    m_len = len;
+    return newRequest( TRUE, 4 );
+  }
+
+  async command error_t Spi.sectorErase( uint8_t sector ) {
+    m_cmd[ 0 ] = S_SECTOR_ERASE;
+    m_addr = (stm25p_addr_t)sector << STM25P_SECTOR_SIZE_LOG2;
+    return newRequest( TRUE, 4 );
+  }
+
+  async command error_t Spi.bulkErase() {
+    m_cmd[ 0 ] = S_BULK_ERASE;
+    return newRequest( TRUE, 1 );
+  }
+
+  error_t newRequest( bool write, stm25p_len_t cmd_len ) {
+    m_cmd[ 1 ] = m_addr >> 16;
+    m_cmd[ 2 ] = m_addr >> 8;
+    m_cmd[ 3 ] = m_addr;
+    if ( write )
+      sendCmd( S_WRITE_ENABLE, 1 );
+    call CSN.clr();
+    call SpiPacket.send( m_cmd, NULL, cmd_len );
+    return SUCCESS;
+  }
+
+  void releaseAndRequest() {
+    call SpiResource.release();
+    call SpiResource.request();
+  }
+
+  async event void SpiPacket.sendDone( uint8_t* tx_buf, uint8_t* rx_buf,
+				       uint16_t len, error_t error ) {
+
+    int i;
+
+    switch( m_cmd[ 0 ] ) {
+
+    case S_READ:
+      if ( tx_buf == m_cmd ) {
+	call SpiPacket.send( NULL, m_buf, m_len );
+	break;
+      }
+      else if ( m_computing_crc ) {
+	for ( i = 0; i < len; i++ )
+	  m_crc = crcByte( m_crc, m_crc_buf[ i ] );
+	m_cur_addr += len;
+	m_cur_len -= len;
+	if ( m_cur_len ) {
+	  call SpiPacket.send( NULL, m_crc_buf, calcReadLen() );
+	  break;
+	}
+      }
+      call CSN.set();
+      signalDone( SUCCESS );
+      break;
+
+    case S_PAGE_PROGRAM:
+      if ( tx_buf == m_cmd ) {
+	call SpiPacket.send( m_buf, NULL, m_len );
+	break;
+      }
+      // fall through
+      
+    case S_SECTOR_ERASE: case S_BULK_ERASE:
+      call CSN.set();
+      m_is_writing = TRUE;
+      releaseAndRequest();
+      break;
+
+    default:
+      break;
+
+    }
+
+  }
+
+  event void SpiResource.granted() {
+
+    if ( !m_is_writing )
+      signal ClientResource.granted();
+    else if ( sendCmd( 0x5, 2 ) & 0x1 )
+      releaseAndRequest();
+    else
+      signalDone( SUCCESS );
+
+  }
+
+  void signalDone( error_t error ) {
+    m_is_writing = FALSE;
+    switch( m_cmd[ 0 ] ) {
+    case S_READ:
+      if ( m_computing_crc ) {
+	m_computing_crc = FALSE;
+	signal Spi.computeCrcDone( m_crc, m_addr, m_len, error );
+      }
+      else {
+	signal Spi.readDone( m_addr, m_buf, m_len, error );
+      }
+      break;
+    case S_PAGE_PROGRAM:
+      signal Spi.pageProgramDone( m_addr, m_buf, m_len, error );
+      break;
+    case S_SECTOR_ERASE:
+      signal Spi.sectorEraseDone( m_addr >> STM25P_SECTOR_SIZE_LOG2, error );
+      break;
+    case S_BULK_ERASE:
+      signal Spi.bulkEraseDone( error );
+      break;
+    }
+  }
+}
diff --git a/tos/chips/stm25p/Stm25pVolume.nc b/tos/chips/stm25p/Stm25pVolume.nc
new file mode 100644
index 00000000..1e71573c
--- /dev/null
+++ b/tos/chips/stm25p/Stm25pVolume.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Abstraction to provide the id of a volume.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:13 $
+ */
+
+#include "Stm25p.h"
+
+interface Stm25pVolume {
+
+  /**
+   * Signals a request to provide the id of a volume.
+   *
+   * @return the id of the volume.
+   */
+  async event volume_id_t getVolumeId();
+
+}
diff --git a/tos/chips/stm25p/StorageMap.nc b/tos/chips/stm25p/StorageMap.nc
new file mode 100644
index 00000000..084f10cb
--- /dev/null
+++ b/tos/chips/stm25p/StorageMap.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An abstraction to map volume addresses to physical addresses.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2007-04-02 05:03:07 $
+ */
+#include "Stm25p.h"
+
+interface StorageMap {
+
+  /**
+   * Get the physical address of a volume address.
+   *
+   * @param addr the volume addres.
+   * @return the physical address.
+   */
+  command storage_addr_t getPhysicalAddress( storage_addr_t addr );
+
+}
diff --git a/tos/chips/stm25p/Storage_chip.h b/tos/chips/stm25p/Storage_chip.h
new file mode 100644
index 00000000..4b870d5b
--- /dev/null
+++ b/tos/chips/stm25p/Storage_chip.h
@@ -0,0 +1,38 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:13 $
+ */
+
+#ifndef __STORAGE_CHIP_H__
+#define __STORAGE_CHIP_H__
+
+#endif
diff --git a/tos/chips/tda5250/ClkDiv.nc b/tos/chips/tda5250/ClkDiv.nc
new file mode 100644
index 00000000..2fd0f640
--- /dev/null
+++ b/tos/chips/tda5250/ClkDiv.nc
@@ -0,0 +1,62 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Revision: 1.1 $
+ * $Date: 2007-03-10 22:01:58 $
+ */
+
+/**
+ * This radio provides a clock divider output that can be used to drive 
+ * a high frequency clock of an micro processor. 
+ * @author: Andreas Koepke <koepke@tkn.tu-berlin.de>
+ */
+
+interface ClkDiv {
+    /**
+     * this event signals that the clkdiv delivers a stable signal
+     */
+    async event void startDone();
+
+    /**
+     * this event signals that the clkdiv will stop to deliver a stable signal
+     */
+    async event void stopping();
+
+    /**
+     * From now on, never switch the clkdiv off -- consumes more energy!
+     * This command may take a while until it takes effect.
+     */
+    // command void alwaysOnMode();
+
+    /**
+     * Return to default mode: clkdiv is switched on when the radio demands
+     * it, other components will get the start/stop events and hence know what
+     * is going on now.
+     */
+    // command void sporadicMode();
+}
diff --git a/tos/chips/tda5250/HplTda5250Config.nc b/tos/chips/tda5250/HplTda5250Config.nc
new file mode 100644
index 00000000..7628bb4d
--- /dev/null
+++ b/tos/chips/tda5250/HplTda5250Config.nc
@@ -0,0 +1,501 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#include "tda5250Const.h"
+/**
+ * This interface provides commands and events for configureing the radio modes.
+ *
+ * @author Kevin Klues
+ */
+interface HplTda5250Config {
+   /**
+    * Resets all Radio Registers to default values.
+    * The default values can be found in tda5250RegDefaults.h
+   */
+   async command void reset();
+
+   /**
+   * Set the data slicer to use the RC integrator. 
+   * The data slicer is an analog-to-digital converter for the radio data.
+   * When using RC integrator the mean value of the analog data is used 
+   * to convert the analog data to a Bit.
+   */
+   async command void UseRCIntegrator();
+   
+   /**
+   * Set the data slicer to use the Peak Detector. 
+   * The data slicer is an analog-to-digital converter for the radio data.
+   * When using peak detector the peak value of the analog data is used 
+   * to convert the analog data to a Bit.
+   */
+   async command void UsePeakDetector();
+   
+   /**
+   * Powers the radio down.
+   */
+   async command void PowerDown();
+   
+   /**
+   * Powers the radio up.
+   */
+   async command void PowerUp();
+   
+   /** 
+   * Switch radio to test operation.
+   * FIXME: Whatever this means...
+   */
+   async command void RunInTestMode();
+   
+   /**
+   * Switches the radio to normal operation.
+   */
+   async command void RunInNormalMode();
+   
+   /**
+   * Control the radio Tx and Rx mode externally.
+   */
+   async command void ControlRxTxExternally();
+   
+   /** 
+   * Control the radio Tx and Rx mode internally.
+   */
+   async command void ControlRxTxInternally();
+   
+   /** 
+   * Use FSK modulation.
+   *
+   * @param pos_shift Capacitor value for positive shift.
+   * @param neg_shift Capacitor value for negative shift.
+   */
+   async command void UseFSK(tda5250_cap_vals_t pos_shift, tda5250_cap_vals_t neg_shift);
+   
+   /** 
+   * Use ASK mosulation.
+   *
+   * @param pos_shift Capacitor value for positive shift. (FIXME: makes sense?)
+   */
+   async command void UseASK(tda5250_cap_vals_t pos_shift);
+   
+   /**
+   * Disables internal clock during power down.
+   */
+   async command void SetClockOffDuringPowerDown();
+   
+   /**
+   * Enables internal clock during power down.
+   */
+   async command void SetClockOnDuringPowerDown();
+   
+   /**
+   * Enables inverting the radio data.
+   */
+   async command void InvertData();
+   
+   /**
+   * Disables inverting radio data.
+   */
+   async command void DontInvertData();
+   
+   /** 
+   * Use the RSSI data valid detection.
+   * For the data valid detection 3 thresholds must be defined. 
+   * The data is only considered valid if the RSSI is greater than RSSI threshold 
+   * and the data rate is between the lower and upper data rate threshold.
+   *
+   * @param value The RSSI threshold for valid data.
+   * @param lower_bound Lower data rate threshold.
+   * @param upper_bound Upper data rate threshold.
+   */
+   async command void UseRSSIDataValidDetection(uint8_t value, uint16_t lower_bound, uint16_t upper_bound);
+   
+   /** 
+    * Use the Vcc data valid detection.
+    * For the data valid detection 3 thresholds must be defined. 
+    * The data is only considered valid if the voltage is greater than voltage threshold 
+    * and the data rate is between the lower and upper data rate threshold.
+    *
+    * @param value The voltage threshold for valid data.
+    * @param lower_bound Lower data rate threshold.
+    * @param upper_bound Upper data rate threshold.
+   */
+   async command void UseVCCDataValidDetection(uint8_t value, uint16_t lower_bound, uint16_t upper_bound);
+   
+   /**
+   * Use the data valid detection.
+   * This means that the receiving data is checked either by RSSI data valid detection or
+   * by Vcc data valid detection if it is actual data and no noise.
+   */
+   async command void UseDataValidDetection();
+   
+   /** Do not use data valid detection. 
+   * This means that it is assumed that the receiving data is
+   * always valid data.
+   * It is absolutely necessary to
+   * set the RSSI-ADC (and the Window counter) into continuous mode.
+   */
+   async command void UseDataAlwaysValid();
+   
+   /**
+   * Sets the ADC to continious mode.
+   * Analog sampling data is taken continously.
+   */
+   async command void ADCContinuousMode();
+   
+   /**
+   * Sets the ADC to one shot mode.
+   * The sampling data is taken in one shot.
+   */
+   async command void ADCOneShotMode();
+     
+   /**
+   * Sets the data calid detection in continous mode.
+   */
+   async command void DataValidContinuousMode();
+   
+   /**
+   * Sets the data calid detection in one shot mode.
+   */
+   async command void DataValidOneShotMode();
+   
+   /**
+   * Sets the low noise amplifier to high gain
+   */
+   async command void HighLNAGain();
+   
+   /**
+   * Sets the low noise amplifier to low gain
+   */
+   async command void LowLNAGain();
+   
+   /** 
+   * Enables the receiver when in TIMER_MODE or SELF_POLLING_MODE.
+   */
+   async command void EnableReceiverInTimedModes();
+   
+   /** 
+   * Disables the receiver when in TIMER_MODE or SELF_POLLING_MODE.
+   */
+   async command void DisableReceiverInTimedModes();
+   
+   /**
+   * Use high transmit power.
+   */
+   async command void UseHighTxPower();
+   
+   /**
+   * Use low transmit power.
+   */
+   async command void UseLowTxPower();
+   
+   /**
+   * Tune the nominal frequency with a Bipolar FET.
+   *
+   * @param ramp_time Ramp time.
+   * @param cap_val Capacitor value.
+   */
+   async command void TuneNomFreqWithBipolarFET(tda5250_bipolar_fet_ramp_times_t ramp_time, tda5250_cap_vals_t cap_val);
+   
+   /**
+   * Tune the nominal frequency with a FET
+   *
+   * @param cap_val Capacitor value.
+   */
+   async command void TuneNomFreqWithFET(tda5250_cap_vals_t cap_val);
+
+   /**
+   * Set the mode of the radio to SlaveMode.
+   */
+   async command void SetSlaveMode();
+     
+   /**
+   * Set the mode of the radio to TimerMode.
+   * 
+   * @param on_time The time (ms) the radio is on.
+   * @param off_time The time (ms) the radio is off.
+   */
+   async command void SetTimerMode(float on_time, float off_time);
+      
+   /**
+    * Resets the timers set in SetTimerMode().
+    */
+   async command void ResetTimerMode();
+      
+   /**
+   * Set the mode of the radio to SetSelfPollingMode.
+   *
+   * @param on_time The time (ms) the radio is on.
+   * @param off_time The time (ms) the radio is off.
+   */
+   async command void SetSelfPollingMode(float on_time, float off_time);
+      
+   /**
+    * Reset the timers set in SetSelfPollingMode.
+    */
+   async command void ResetSelfPollingMode();
+
+   /**
+    * Set the contents of the LPF register with the Low pass filter 
+    * 
+    * @param data_cutoff LowPassFilter characteristics. For recognized values see tda5250Const.h
+    */
+   async command void SetLowPassFilter(tda5250_data_cutoff_freqs_t data_cutoff);
+   
+   /**
+   * Set the contents of the LPF register with the IQ filter value.
+   * 
+   * @param iq_cutoff IQ filter characteristics. For recognized values see tda5250Const.h
+   */
+   async command void SetIQFilter(tda5250_iq_cutoff_freqs_t iq_cutoff);
+
+   /**
+    *  Set the on time time of the radio.
+    *  This only makes sense when radio is in TIMER or SELF_POLLING Mode.
+    * 
+    *  @param time The time (ms) the radio is on.
+   */
+   async command void SetOnTime_ms(float time);
+      
+   /**
+   *  Set the off time time of the radio.
+   *  This only makes sense when radio is in TIMER or SELF_POLLING Mode.
+   * 
+   *  @param time The time (ms) the radio is off.
+   */
+   async command void SetOffTime_ms(float time);
+
+   
+   
+   /**
+   * Initialzes the CLK_DIV so that SetRadioClock(tda5250_clock_out_freqs_t freq)
+   * can be used.
+   */
+   async command void UseSetClock();
+   
+   /**
+   * Sets the CLK_DIV to specified output. UseSetClock() must be called before!
+   * Available frequencies given in TDA5250ClockFreq_t struct in tda5250Const.h.
+   *
+   * @param freq The new clock frequency (see tda5250.h).
+   */
+   async command void SetRadioClock(tda5250_clock_out_freqs_t freq);
+   
+   /**
+   * Sets the CLK_DIV to 18Mhz output.
+   */
+   async command void Use18MHzClock();
+   
+   /**
+   * Sets the CLK_DIV to 32Khz output.
+   */
+   async command void Use32KHzClock();
+   
+   /**
+   * Sets the CLK_DIV to use window count as output.
+   */
+   async command void UseWindowCountAsClock();
+   
+
+
+   /**
+   * Set the value on the attached Potentiometer
+   * for the RF Power setting.
+   *
+   * @param RF Power.
+   */
+   async command void SetRFPower(uint8_t value);
+
+   /**
+   * Sets the RSSI threshold for internal evaluation.
+   *
+   * @param RSSI threshold value.
+   */
+   async command void SetRSSIThreshold(uint8_t value);
+   
+   /** 
+   * Sets the threshold values for internal evaluation.
+   * (FIXME: what threshold is set with this?)
+   *
+   * @param value Threshold value.
+   */
+   async command void SetVCCOver5Threshold(uint8_t value);
+   
+   /** 
+   * Sets the lower data rate threshold for data valid detection.
+   *
+   * @param Lower data rate threshold value.
+   */
+   async command void SetLowerDataRateThreshold(uint16_t value);
+   
+   /** 
+   * Sets the upper data rate threshold for data valid detection.
+   *
+   * @param Upper data rate threshold value.
+   */
+   async command void SetUpperDataRateThreshold(uint16_t value);
+
+   /**
+   * Gets the currnet RSSI value.
+   *
+   * @return Current RSSI.
+   */
+   async command uint8_t GetRSSIValue();
+   
+   /**
+   * Gets the current status of the ADC select feedback Bit. 
+   * The ADC select feedback Bit is "0" if the ADC is connected to 
+   * a resistor network dividing the Vcc voltage by 5.
+   * The ADC select feedback Bit is "1" if the ADC is connected to
+   * the RSSI voltage.
+   *
+   * @return "0" if ADC connected to Vcc/5.
+   *         "1" if ADC connected to RSSI voltage.
+   */
+   async command uint8_t GetADCSelectFeedbackBit();
+   
+   /**
+   * Gets the current status of the ADC Power down feedback Bit.
+   * The ADC Power down feedback Bit is "0" if ADC power is up.
+   * It is "1" if ADC power is down.
+   *
+   * @return "0" if ADC power is up
+   *         "1" otherwise.
+   */
+   async command uint8_t GetADCPowerDownFeedbackBit();
+   
+   /**
+   * Checks if the data rate is less than the lower threshold set by
+   * SetLowerDataRateThreshold(uint16_t value).
+   *
+   * @return TRUE if data rate is less than lower threshold
+   *         FALSE otherwise.
+   */
+   async command bool IsDataRateLessThanLowerThreshold();
+   
+   /**
+   * Checks if the data rate is between the lower threshold set by
+   * SetLowerDataRateThreshold(uint16_t value) and upper threshold set by
+   * SetUpperDataRateThreshold(uint16_t value).
+   *
+   * @return TRUE if data rate is between the lower and upper threshold
+   *         FALSE otherwise.
+   */
+   async command bool IsDataRateBetweenThresholds();
+   
+   /**
+   * Checks if the data rate is less than the upper threshold set by
+   * SetUpperDataRateThreshold(uint16_t value).
+   *
+   * @return TRUE if data rate is less than upper threshold
+   *         FALSE otherwise.
+   */
+   async command bool IsDataRateLessThanUpperThreshold();
+   
+   /**
+   * Checks if the data rate is less than half of the lower threshold set by
+   * SetLowerDataRateThreshold(uint16_t value).
+   *
+   * @return TRUE if data rate is less than half of the lower threshold
+   *         FALSE otherwise.
+   */
+   async command bool IsDataRateLessThanHalfOfLowerThreshold();
+   
+   /**
+   * Checks if the data rate is between the halves of the lower threshold set by
+   * SetLowerDataRateThreshold(uint16_t value) and the upper threshold set by
+   * SetUpperDataRateThreshold(uint16_t value).
+   *
+   * @return TRUE if the data rate is between the halves of the lower and upper threshold
+   *         FALSE otherwise.
+   */
+   async command bool IsDataRateBetweenHalvesOfThresholds();
+   
+   /**
+   * Checks if the data rate is half of the upper threshold set by
+   * SetUpperDataRateThreshold(uint16_t value).
+   *
+   * @return TRUE if data rate is less than half of the upper threshold
+   *         FALSE otherwise.
+   */
+   async command bool IsDataRateLessThanHalfOfUpperThreshold();
+   
+   /**
+   * Checks if the current RSSI equals the threshold set 
+   * with SetRSSIThreshold(uint8_t value).
+   *
+   * @return TRUE if RSSI equals the threshold value
+   *         FALSE otherwise.
+   */
+   async command bool IsRSSIEqualToThreshold();
+   
+   /**
+   * Checks if the current RSSI is graeter than the threshold set 
+   * with SetRSSIThreshold(uint8_t value).
+   *
+   * @return TRUE if RSSI greater than threshold value
+   *         FALSE otherwise.
+   */
+   async command bool IsRSSIGreaterThanThreshold();
+
+   /**
+   * Checks if the Tx Rx and Sleep radiomodes can be set via pin.
+   * This only concerns SetTxMode(), SetRxMode() and SetSleepMode().
+   *
+   * @return TRUE if radiomodes can be set via pin
+   *         FALSE otherwise.
+   */
+   async command bool IsTxRxPinControlled();
+   
+   /**
+   * Switches the radio to TxMode when in SLAVE_MODE
+   */
+   async command void SetTxMode();
+   
+   /**
+   * Switches the radio to RxMode when in SLAVE_MODE
+   */
+   async command void SetRxMode();
+   
+   /**
+   * Switches the radio to SleepMode when in SLAVE_MODE
+   */
+   async command void SetSleepMode();
+
+   /**
+   * Notification of interrupt when in
+   * TimerMode or SelfPollingMode.
+   */
+   async event void PWDDDInterrupt();
+}
+
diff --git a/tos/chips/tda5250/HplTda5250ConfigC.nc b/tos/chips/tda5250/HplTda5250ConfigC.nc
new file mode 100644
index 00000000..7309e6af
--- /dev/null
+++ b/tos/chips/tda5250/HplTda5250ConfigC.nc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * ========================================================================
+ */
+
+ /**
+ * Controlling the TDA5250 at the HPL layer.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+#include "tda5250Const.h"
+#include "tda5250RegDefaultSettings.h"
+#include "tda5250RegTypes.h"
+
+configuration HplTda5250ConfigC {
+  provides {
+    interface Init;
+    interface HplTda5250Config;
+    interface Resource as Resource;
+  }
+}
+implementation {
+  components HplTda5250ConfigP
+           , Tda5250RegistersC
+           , Tda5250RadioIOC
+           , Tda5250RadioInterruptC
+           ;
+
+  Init = HplTda5250ConfigP;
+  Init = Tda5250RegistersC;
+  Resource = Tda5250RegistersC.Resource;
+  HplTda5250Config = HplTda5250ConfigP;
+
+  HplTda5250ConfigP.CONFIG -> Tda5250RegistersC.CONFIG;
+  HplTda5250ConfigP.FSK -> Tda5250RegistersC.FSK;
+  HplTda5250ConfigP.XTAL_TUNING -> Tda5250RegistersC.XTAL_TUNING;
+  HplTda5250ConfigP.LPF -> Tda5250RegistersC.LPF;
+  HplTda5250ConfigP.ON_TIME -> Tda5250RegistersC.ON_TIME;
+  HplTda5250ConfigP.OFF_TIME -> Tda5250RegistersC.OFF_TIME;
+  HplTda5250ConfigP.COUNT_TH1 -> Tda5250RegistersC.COUNT_TH1;
+  HplTda5250ConfigP.COUNT_TH2 -> Tda5250RegistersC.COUNT_TH2;
+  HplTda5250ConfigP.RSSI_TH3 -> Tda5250RegistersC.RSSI_TH3;
+  HplTda5250ConfigP.RF_POWER -> Tda5250RegistersC.RF_POWER;
+  HplTda5250ConfigP.CLK_DIV -> Tda5250RegistersC.CLK_DIV;
+  HplTda5250ConfigP.XTAL_CONFIG -> Tda5250RegistersC.XTAL_CONFIG;
+  HplTda5250ConfigP.BLOCK_PD -> Tda5250RegistersC.BLOCK_PD;
+  HplTda5250ConfigP.STATUS -> Tda5250RegistersC.STATUS;
+  HplTda5250ConfigP.ADC -> Tda5250RegistersC.ADC;
+
+  HplTda5250ConfigP.ASKNFSK -> Tda5250RadioIOC.Tda5250RadioPASKNFSK;
+  HplTda5250ConfigP.PWDDD -> Tda5250RadioIOC.Tda5250RadioPWDDD;
+  HplTda5250ConfigP.TXRX -> Tda5250RadioIOC.Tda5250RadioTXRX;
+  HplTda5250ConfigP.PWDDDInterrupt -> Tda5250RadioInterruptC;
+}
diff --git a/tos/chips/tda5250/HplTda5250ConfigP.nc b/tos/chips/tda5250/HplTda5250ConfigP.nc
new file mode 100644
index 00000000..49422b57
--- /dev/null
+++ b/tos/chips/tda5250/HplTda5250ConfigP.nc
@@ -0,0 +1,512 @@
+/*
+* Copyright (c) 2004, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* - Revision -------------------------------------------------------------
+* $Revision: 1.5 $
+* $Date: 2008-06-13 13:40:59 $
+* ========================================================================
+*/
+
+/**
+* HplTda5250ConfigP module
+*
+* @author Kevin Klues (klues@tkn.tu-berlin.de)
+* @author Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+*/
+
+module HplTda5250ConfigP {
+  provides {
+    interface Init;
+    interface HplTda5250Config;
+  }
+  uses {
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_CONFIG>      as CONFIG;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_FSK>         as FSK;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_XTAL_TUNING> as XTAL_TUNING;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_LPF>         as LPF;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_ON_TIME>     as ON_TIME;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_OFF_TIME>    as OFF_TIME;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_COUNT_TH1>   as COUNT_TH1;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_COUNT_TH2>   as COUNT_TH2;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_RSSI_TH3>    as RSSI_TH3;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_RF_POWER>    as RF_POWER;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_CLK_DIV>     as CLK_DIV;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_XTAL_CONFIG> as XTAL_CONFIG;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_BLOCK_PD>    as BLOCK_PD;
+    interface Tda5250ReadReg<TDA5250_REG_TYPE_STATUS>       as STATUS;
+    interface Tda5250ReadReg<TDA5250_REG_TYPE_ADC>          as ADC;
+
+    interface GeneralIO as ASKNFSK;
+    interface GeneralIO as TXRX;
+    interface GeneralIO as PWDDD;
+    interface GpioInterrupt as PWDDDInterrupt;
+  }
+}
+
+implementation { 
+   
+  /****************************************************************************************************
+  **                                                                                                 **
+  **                                                                                                 **
+  **     Important !!! Only function marked with << tested >> are potentially working!               **
+  **                                                                                                 **
+  **                                                                                                 **
+  *****************************************************************************************************/
+  
+  /****************************************************************
+  Global Variables Declared
+  *****************************************************************/
+  norace uint16_t currentConfig = TDA5250_REG_DEFAULT_SETTING_CONFIG;
+  uint8_t currentClockDiv;
+  norace uint8_t currentLpf = TDA5250_REG_DEFAULT_SETTING_LPF;
+
+
+  /****************************************************************
+  async commands Implemented
+  *****************************************************************/
+  /**
+  * Initializes the Radio, setting up all Pin configurations
+  * to the MicroProcessor that is driving it and resetting
+  * all Registers to their default values
+  *
+  * @return always returns SUCCESS
+  */
+  command error_t Init.init() {
+    // setting pins to output
+    call TXRX.makeOutput();
+    call PWDDD.makeOutput();
+
+    // initializing pin values
+    call TXRX.set();
+    call PWDDD.clr();
+    return SUCCESS;
+  }
+
+  /**
+  * Reset all Radio Registers to the default values as defined
+  * in the tda5250RegDefaults.h file
+  * << tested >>
+  */
+  async command void HplTda5250Config.reset() {
+    //Keep three state variables to know current value of
+    //config register, ClockDiv, and Lpf register
+        atomic {
+          currentConfig = TDA5250_REG_DEFAULT_SETTING_CONFIG;
+          currentClockDiv = TDA5250_REG_DEFAULT_SETTING_CLK_DIV;
+          currentLpf = TDA5250_REG_DEFAULT_SETTING_LPF;
+        }
+        call CONFIG.set(TDA5250_REG_DEFAULT_SETTING_CONFIG);
+        call FSK.set(TDA5250_REG_DEFAULT_SETTING_FSK);
+        call XTAL_TUNING.set(TDA5250_REG_DEFAULT_SETTING_XTAL_TUNING);
+        call LPF.set(TDA5250_REG_DEFAULT_SETTING_LPF);
+        call ON_TIME.set(TDA5250_REG_DEFAULT_SETTING_ON_TIME);
+        call OFF_TIME.set(TDA5250_REG_DEFAULT_SETTING_OFF_TIME);
+        call COUNT_TH1.set(TDA5250_REG_DEFAULT_SETTING_COUNT_TH1);
+        call COUNT_TH2.set(TDA5250_REG_DEFAULT_SETTING_COUNT_TH2);
+        call RSSI_TH3.set(TDA5250_REG_DEFAULT_SETTING_RSSI_TH3);
+        call CLK_DIV.set(TDA5250_REG_DEFAULT_SETTING_CLK_DIV);
+        call XTAL_CONFIG.set(TDA5250_REG_DEFAULT_SETTING_XTAL_CONFIG);
+        call BLOCK_PD.set(TDA5250_REG_DEFAULT_SETTING_BLOCK_PD);
+  }
+
+  async command void HplTda5250Config.SetLowPassFilter(tda5250_data_cutoff_freqs_t data_cutoff){
+    currentLpf = (((data_cutoff << 4) | (currentLpf & 0x0F)));
+    call LPF.set(currentLpf);
+  }
+  async command void HplTda5250Config.SetIQFilter(tda5250_iq_cutoff_freqs_t iq_cutoff){
+    currentLpf = (((iq_cutoff & 0x0F) | (currentLpf & 0xF0)));
+    call LPF.set(currentLpf);
+  }
+  async command void HplTda5250Config.UseRCIntegrator() {
+    currentConfig = CONFIG_SLICER_RC_INTEGRATOR(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.UsePeakDetector() {
+    currentConfig = CONFIG_SLICER_PEAK_DETECTOR(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.PowerDown() {
+    currentConfig = CONFIG_ALL_PD_POWER_DOWN(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.PowerUp() {
+    currentConfig = CONFIG_ALL_PD_NORMAL(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.RunInTestMode() {
+    currentConfig = CONFIG_TESTMODE_TESTMODE(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.RunInNormalMode() {
+    currentConfig = CONFIG_TESTMODE_NORMAL(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.ControlRxTxExternally() {
+    currentConfig = CONFIG_CONTROL_TXRX_EXTERNAL(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.ControlRxTxInternally() {
+    currentConfig = CONFIG_CONTROL_TXRX_REGISTER(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+
+  /* << tested >> */
+  async command void HplTda5250Config.UseFSK(tda5250_cap_vals_t pos_shift, tda5250_cap_vals_t neg_shift) {
+    currentConfig = CONFIG_ASK_NFSK_FSK(currentConfig);
+    if(currentConfig & MASK_CONFIG_CONTROL_TXRX_REGISTER) {
+      call CONFIG.set(currentConfig);
+    }
+    else {
+      call ASKNFSK.clr(); 
+    }
+    call FSK.set(((uint16_t)((((uint16_t)pos_shift) << 8) + neg_shift)));
+  }
+  /* << tested >> */
+  async command void HplTda5250Config.UseASK(tda5250_cap_vals_t value) {
+    currentConfig = CONFIG_ASK_NFSK_ASK(currentConfig);
+    if(currentConfig & MASK_CONFIG_CONTROL_TXRX_REGISTER) {
+      call CONFIG.set(currentConfig);
+    } 
+    else {
+      call ASKNFSK.set(); 
+    }
+    call FSK.set((((uint16_t)value) << 8));
+  }
+  async command void HplTda5250Config.SetClockOffDuringPowerDown() {
+    currentConfig = CONFIG_CLK_EN_OFF(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.SetClockOnDuringPowerDown() {
+    currentConfig = CONFIG_CLK_EN_ON(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.InvertData() {
+    currentConfig = CONFIG_RX_DATA_INV_YES(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.DontInvertData() {
+    currentConfig = CONFIG_RX_DATA_INV_NO(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.UseRSSIDataValidDetection(uint8_t value, uint16_t lower_bound, uint16_t upper_bound) {
+    currentConfig = CONFIG_D_OUT_IFVALID(currentConfig);
+    call CONFIG.set(currentConfig);
+    call COUNT_TH1.set(lower_bound);
+    call COUNT_TH2.set(upper_bound);
+    call RSSI_TH3.set(0xC0 | value);
+  }
+
+  async command void HplTda5250Config.UseVCCDataValidDetection(uint8_t value, uint16_t lower_bound, uint16_t upper_bound) {
+    currentConfig = CONFIG_D_OUT_IFVALID(currentConfig);
+    call CONFIG.set(currentConfig);
+    call COUNT_TH1.set(lower_bound);
+    call COUNT_TH2.set(upper_bound);
+    call RSSI_TH3.set(0x3F & value);
+  }
+
+  async command void HplTda5250Config.UseDataValidDetection() {
+    currentConfig = CONFIG_D_OUT_IFVALID(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+
+  async command void HplTda5250Config.UseDataAlwaysValid() {
+    currentConfig = CONFIG_D_OUT_ALWAYS(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.ADCContinuousMode() {
+    currentConfig = CONFIG_ADC_MODE_CONT(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.ADCOneShotMode() {
+    currentConfig = CONFIG_ADC_MODE_ONESHOT(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.DataValidContinuousMode() {
+    currentConfig = CONFIG_F_COUNT_MODE_CONT(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.DataValidOneShotMode() {
+    currentConfig = CONFIG_F_COUNT_MODE_ONESHOT(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  /* <<tested>> */
+  async command void HplTda5250Config.HighLNAGain() {
+    currentConfig = CONFIG_LNA_GAIN_HIGH(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  /* <<tested>> */
+  async command void HplTda5250Config.LowLNAGain() {
+    currentConfig = CONFIG_LNA_GAIN_LOW(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.EnableReceiverInTimedModes() {
+    currentConfig = CONFIG_EN_RX_ENABLE(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.DisableReceiverInTimedModes() {
+    currentConfig = CONFIG_EN_RX_DISABLE(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  /* <<tested>> */
+  async command void HplTda5250Config.UseHighTxPower() {
+    currentConfig = CONFIG_PA_PWR_HIGHTX(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+  /* <<tested>> */
+  async command void HplTda5250Config.UseLowTxPower() {
+    currentConfig = CONFIG_PA_PWR_LOWTX(currentConfig);
+    call CONFIG.set(currentConfig);
+  }
+
+  async command void HplTda5250Config.TuneNomFreqWithBipolarFET(tda5250_bipolar_fet_ramp_times_t ramp_time, tda5250_cap_vals_t cap_val) {
+    call XTAL_CONFIG.set(ramp_time);
+    call XTAL_CONFIG.set(((uint16_t)cap_val) & 0x003F);
+  }
+  async command void HplTda5250Config.TuneNomFreqWithFET(tda5250_cap_vals_t cap_val) {
+    call XTAL_CONFIG.set(0x00);
+    call XTAL_CONFIG.set(((uint16_t)cap_val) & 0x003F);
+  }
+  /* <<tested>> */
+  async command void HplTda5250Config.SetRFPower(uint8_t value) {
+    call RF_POWER.set(value);
+  }
+
+  /**
+  Set the mode of the radio
+  The choices are SLAVE_MODE, TIMER_MODE, SELF_POLLING_MODE
+  */
+  
+  /* << tested >> */
+  async command void HplTda5250Config.SetSlaveMode() {
+    call PWDDDInterrupt.disable();
+    call PWDDD.makeOutput();
+    call PWDDD.clr();
+    currentConfig = CONFIG_MODE_1_SLAVE_OR_TIMER(currentConfig);
+    currentConfig = CONFIG_MODE_2_SLAVE(currentConfig);
+    // SetSlaveMode() is always called in conjunction with another function that writes the config...
+    // call CONFIG.set(currentConfig);
+  }
+  async command void HplTda5250Config.SetTimerMode(float on_time, float off_time) {
+    call PWDDD.clr();
+    call ON_TIME.set(TDA5250_CONVERT_TIME(on_time));
+    call OFF_TIME.set(TDA5250_CONVERT_TIME(off_time));
+    currentConfig = CONFIG_MODE_1_SLAVE_OR_TIMER(currentConfig);
+    currentConfig = CONFIG_MODE_2_TIMER(currentConfig);
+    call CONFIG.set(currentConfig);
+    call TXRX.set();
+    call PWDDD.makeInput();
+    call PWDDDInterrupt.enableFallingEdge();
+  }
+  async command void HplTda5250Config.ResetTimerMode() {
+    call PWDDD.clr();
+    currentConfig = CONFIG_MODE_1_SLAVE_OR_TIMER(currentConfig);
+    currentConfig = CONFIG_MODE_2_TIMER(currentConfig);
+    call CONFIG.set(currentConfig);
+    call PWDDD.makeInput();
+    call PWDDDInterrupt.enableFallingEdge();
+  }
+  async command void HplTda5250Config.SetSelfPollingMode(float on_time, float off_time) {
+    call PWDDD.clr();
+    call ON_TIME.set(TDA5250_CONVERT_TIME(on_time));
+    call OFF_TIME.set(TDA5250_CONVERT_TIME(off_time));
+    currentConfig = CONFIG_MODE_1_SELF_POLLING(currentConfig);
+    call CONFIG.set(currentConfig);
+    call TXRX.set();
+    call PWDDD.makeInput();
+    call PWDDDInterrupt.enableFallingEdge();
+  }
+  async command void HplTda5250Config.ResetSelfPollingMode() {
+    call PWDDD.clr();
+    currentConfig = CONFIG_MODE_1_SELF_POLLING(currentConfig);
+    call CONFIG.set(currentConfig);
+    call TXRX.set();
+    call PWDDD.makeInput();
+    call PWDDDInterrupt.enableFallingEdge();
+  }
+  /**
+  Set the on time and off time of the radio
+  (Only makes sense when in TIMER or SELF_POLLING Mode)
+  */
+  async command void HplTda5250Config.SetOnTime_ms(float time) {
+    call ON_TIME.set(TDA5250_CONVERT_TIME(time));
+  }
+  async command void HplTda5250Config.SetOffTime_ms(float time) {
+    call OFF_TIME.set(TDA5250_CONVERT_TIME(time));
+  }
+  /**
+  Set the frequency that the CLK_DIV outputs
+  (Available frequencies given in Tda5250ClockFreq_t struct)
+  */
+  async command void HplTda5250Config.UseSetClock() {
+    currentClockDiv &= 0x0F;
+    call CLK_DIV.set(currentClockDiv);
+  }
+  async command void HplTda5250Config.Use18MHzClock() {
+    currentClockDiv |= 0x10;
+    currentClockDiv &= 0x1F;
+    call CLK_DIV.set(currentClockDiv);
+  }
+  async command void HplTda5250Config.Use32KHzClock() {
+    currentClockDiv |= 0x20;
+    currentClockDiv &= 0x2F;
+    call CLK_DIV.set(currentClockDiv);
+  }
+  async command void HplTda5250Config.UseWindowCountAsClock() {
+    currentClockDiv |= 0x30;
+    call CLK_DIV.set(currentClockDiv);
+  }
+  async command void HplTda5250Config.SetRadioClock(tda5250_clock_out_freqs_t freq) {
+    currentClockDiv = (currentClockDiv & 0x30) + freq;
+    call CLK_DIV.set(currentClockDiv);
+  }
+
+  /**
+  Sets the threshold Values for internal evaluation
+  */
+  
+  /* <<tested>> */
+  async command void HplTda5250Config.SetRSSIThreshold(uint8_t value) {
+    call RSSI_TH3.set(0xC0 | value);
+  }
+  async command void HplTda5250Config.SetVCCOver5Threshold(uint8_t value) {
+    call RSSI_TH3.set(0x3F & value);
+  }
+  async command void HplTda5250Config.SetLowerDataRateThreshold(uint16_t value) {
+    call COUNT_TH1.set(value);
+  }
+  async command void HplTda5250Config.SetUpperDataRateThreshold(uint16_t value) {
+    call COUNT_TH2.set(value);
+  }
+
+  /**
+  Get parts of certain registers according to their
+  logical functionality
+  */
+  async command uint8_t HplTda5250Config.GetRSSIValue() {
+    return (0x3F & call ADC.get());
+  }
+  async command uint8_t HplTda5250Config.GetADCSelectFeedbackBit() {
+    return ((0x40 & call ADC.get()) >> 6);
+  }
+  async command uint8_t HplTda5250Config.GetADCPowerDownFeedbackBit() {
+    return ((0x80 & call ADC.get()) >> 7);
+  }
+  async command bool HplTda5250Config.IsDataRateLessThanLowerThreshold() {
+    if((0x80 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsDataRateBetweenThresholds() {
+    if((0x40 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsDataRateLessThanUpperThreshold() {
+    if((0x20 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsDataRateLessThanHalfOfLowerThreshold() {
+    if((0x10 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsDataRateBetweenHalvesOfThresholds() {
+    if((0x08 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsDataRateLessThanHalfOfUpperThreshold() {
+    if((0x04 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsRSSIEqualToThreshold() {
+    if((0x02 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+  async command bool HplTda5250Config.IsRSSIGreaterThanThreshold() {
+    if((0x01 & call STATUS.get()) == TRUE)
+      return TRUE;
+    return FALSE;
+  }
+
+  /**
+  Switches radio between states when in SLAVE_MODE
+  */
+  
+  /* << tested >> */
+  async command void HplTda5250Config.SetTxMode() {
+    currentConfig = CONFIG_RX_NTX_TX(currentConfig);
+    currentConfig = CONFIG_ALL_PD_NORMAL(currentConfig);
+    if (currentConfig & MASK_CONFIG_CONTROL_TXRX_REGISTER) {
+      call CONFIG.set(currentConfig);
+    }
+    else {
+      call TXRX.clr();
+      call PWDDD.clr();
+    }
+  }
+ 
+  /* << tested >> */
+  async command void HplTda5250Config.SetRxMode() {
+    currentConfig = CONFIG_RX_NTX_RX(currentConfig);
+    currentConfig = CONFIG_ALL_PD_NORMAL(currentConfig);
+    if (currentConfig & MASK_CONFIG_CONTROL_TXRX_REGISTER) {
+      call CONFIG.set(currentConfig);
+    }
+    else {
+      call TXRX.set();
+      call PWDDD.clr();
+    }
+  }
+  
+  /* << tested >> */
+  async command void HplTda5250Config.SetSleepMode() {
+        currentConfig = CONFIG_ALL_PD_POWER_DOWN(currentConfig);
+	call PWDDD.makeOutput();
+        call PWDDD.set();
+  }
+  
+  async command bool HplTda5250Config.IsTxRxPinControlled() {
+    return (currentConfig & MASK_CONFIG_CONTROL_TXRX_REGISTER);
+  }
+
+  /****************************************************************
+  Events Implemented
+  ************************************************/
+  /**
+  Interrupt Signal on PWD_DD pin in
+  TIMER_MODE and SELF_POLLING_MODE
+  */
+  async event void PWDDDInterrupt.fired() {
+    signal HplTda5250Config.PWDDDInterrupt();
+  }
+
+  default async event void HplTda5250Config.PWDDDInterrupt() {}
+}
diff --git a/tos/chips/tda5250/HplTda5250Data.nc b/tos/chips/tda5250/HplTda5250Data.nc
new file mode 100644
index 00000000..5480e5e2
--- /dev/null
+++ b/tos/chips/tda5250/HplTda5250Data.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * ========================================================================
+ */
+
+ /**
+ * Interface for sending and receiving bytes of data over the TDA5250 Radio.
+ * This interface lets you receive and send bytes of data.
+ * In conjunction to this the HplTda5250DataControl interface is used to 
+ * switch between receiving and sending.
+ *
+ * @see HplTda5250DataControl
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+interface HplTda5250Data {
+
+ /**
+   * Transmit a byte of data over the radio.
+   * Before you call this command you must switch 
+   * the radio to Tx mode via the HplTda5250DataControl
+   * interface.
+   * @param data The data byte to be transmitted.
+   * @return SUCCESS Byte successfully transmitted.
+             FAIL    Byte could not be transmitted.
+   */
+  async command error_t tx(uint8_t data);
+
+  /**
+   * Signalled when the next byte can be made ready to transmit.
+   * Receiving such an event does not guarantee that the previous
+   * byte has already been transmitted, just that the next one can
+   * now be handed over for transmission.
+   */
+  async event void txReady();
+
+  /**
+   * Command for querying whether any bytes are still waiting to be transmitted.
+   *
+   * @return TRUE if all bytes are trasnmitted
+   *         FALSE otherwise.
+   */
+  //async command bool isTxDone();
+
+  /**
+   * Signaled when a byte of data has been received from the radio.
+	 * Before you call this command you must switch 
+	 * the radio to Rx mode via the HplTda5250DataControl
+   * interface.
+   * @param data The data byte received.
+   */
+  async event void rxDone(uint8_t data);
+}
+
diff --git a/tos/chips/tda5250/HplTda5250DataC.nc b/tos/chips/tda5250/HplTda5250DataC.nc
new file mode 100644
index 00000000..d4e3e2fc
--- /dev/null
+++ b/tos/chips/tda5250/HplTda5250DataC.nc
@@ -0,0 +1,67 @@
+/*
+* Copyright (c) 2004, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* - Revision -------------------------------------------------------------
+* $Revision: 1.4 $
+* $Date: 2006-12-12 18:23:13 $
+* ========================================================================
+*/
+
+
+/**
+ * Controlling the TDA5250 at the HPL layer.
+ * 
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+configuration HplTda5250DataC {
+  provides {
+    interface Init;
+    interface HplTda5250Data;
+		interface HplTda5250DataControl;
+    interface ResourceRequested;
+    interface Resource as Resource;
+  }
+}
+implementation {
+
+  components HplTda5250DataP,
+      Tda5250RadioIOC,
+			HplTda5250DataIOC;
+
+  Init = HplTda5250DataP;
+  Resource = HplTda5250DataP.Resource;
+  ResourceRequested = HplTda5250DataP.ResourceRequested;
+  HplTda5250Data = HplTda5250DataP;
+  HplTda5250DataControl = HplTda5250DataP;
+
+  HplTda5250DataP.DATA -> Tda5250RadioIOC.Tda5250RadioDATA;
+	HplTda5250DataP.Uart -> HplTda5250DataIOC.UartStream;
+  HplTda5250DataP.UartDataControl -> HplTda5250DataIOC.UartDataControl;
+	HplTda5250DataP.UartResource -> HplTda5250DataIOC.Resource;
+	HplTda5250DataP.UartResourceRequested -> HplTda5250DataIOC.ResourceRequested;
+
+}
diff --git a/tos/chips/tda5250/HplTda5250DataControl.nc b/tos/chips/tda5250/HplTda5250DataControl.nc
new file mode 100644
index 00000000..fb4a82d1
--- /dev/null
+++ b/tos/chips/tda5250/HplTda5250DataControl.nc
@@ -0,0 +1,29 @@
+ /**
+ * Interface for controlling the data interface of the TDA5250 Radio.
+ * This interface lets you switch between Tx and Rx.
+ * In conjunction to this the HplTda5250Data interface 
+ * is used for the actual receiving and sending of data.
+ *
+ * @see HplTda5250Data
+ * @author Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+ */
+interface HplTda5250DataControl {  
+
+/**
+   * Sets the radio to transmit. 
+   * 
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+	*/
+  async command error_t setToTx();
+
+
+  /**
+   * Sets the radio to receive.
+   *
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+	*/
+  async command error_t setToRx();
+  
+}
diff --git a/tos/chips/tda5250/HplTda5250DataP.nc b/tos/chips/tda5250/HplTda5250DataP.nc
new file mode 100644
index 00000000..12a15442
--- /dev/null
+++ b/tos/chips/tda5250/HplTda5250DataP.nc
@@ -0,0 +1,138 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * ========================================================================
+ */
+
+ /**
+ * HplTda5250DataP module
+ *
+ * @author Philipp Hupertz (huppertz@tkn.tu-berlin.de)
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+  */
+
+module HplTda5250DataP {
+  provides {
+    interface Init;
+    interface HplTda5250Data;
+    interface HplTda5250DataControl;
+    interface Resource;
+		interface ResourceRequested;
+  }
+  uses {
+    interface GeneralIO as DATA;
+    interface UartStream as Uart;
+    interface HplTda5250DataControl as UartDataControl;
+    interface Resource as UartResource;
+    interface ResourceRequested as UartResourceRequested;
+  }
+}
+
+implementation {
+
+  /**
+   * Initializes the Radio, setting up all Pin configurations
+   * to the MicroProcessor that is driving it
+   *
+   * @return always returns SUCCESS
+    */
+  command error_t Init.init() {
+    call DATA.makeOutput();
+    call DATA.clr();
+
+    //Make Rx default
+    call DATA.makeInput();
+    return SUCCESS;
+  }
+
+  async command error_t Resource.request() {
+    return call UartResource.request();
+  }
+
+  async command error_t Resource.immediateRequest() {
+    if(call UartResource.immediateRequest() == EBUSY) {
+      return EBUSY;
+    }
+    return SUCCESS;
+  }
+
+  async command error_t Resource.release() {
+    return call UartResource.release();
+  }
+
+  async command bool Resource.isOwner() {
+    return call UartResource.isOwner();
+  }
+
+  event void UartResource.granted() {
+    signal Resource.granted();
+  }
+  
+  async event void UartResourceRequested.requested() {
+    signal ResourceRequested.requested(); 
+  }
+  
+  async event void UartResourceRequested.immediateRequested() {
+    signal ResourceRequested.immediateRequested(); 
+  }
+
+  async command error_t HplTda5250Data.tx(uint8_t data) {
+    if(call UartResource.isOwner() == FALSE)
+      return FAIL;
+    return call Uart.send(&data, 1);
+  }
+
+  async event void Uart.sendDone( uint8_t* buf, uint16_t len, error_t error ) {
+    if(call UartResource.isOwner() == FALSE)
+      return;
+    signal HplTda5250Data.txReady();
+  }
+  
+  async event void Uart.receivedByte( uint8_t data ) {
+  	if(call UartResource.isOwner() == FALSE)
+   	 return;
+  	signal HplTda5250Data.rxDone(data);
+	}
+  async event void Uart.receiveDone( uint8_t* buf, uint16_t len, error_t error ) {}
+  
+  async command error_t HplTda5250DataControl.setToTx() {
+    call UartDataControl.setToTx();
+    return SUCCESS;
+  }
+
+  async command error_t HplTda5250DataControl.setToRx() {
+    call UartDataControl.setToRx();
+    return SUCCESS;
+  }
+	
+  default event void Resource.granted() {}
+  default async event void HplTda5250Data.txReady() {}
+  default async event void HplTda5250Data.rxDone(uint8_t data) {}
+}
diff --git a/tos/chips/tda5250/RfPower.nc b/tos/chips/tda5250/RfPower.nc
new file mode 100644
index 00000000..b976d033
--- /dev/null
+++ b/tos/chips/tda5250/RfPower.nc
@@ -0,0 +1,33 @@
+/* -*- mode: c++ -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+interface RfPower {
+    async command error_t set(uint8_t setting);
+}
diff --git a/tos/chips/tda5250/Tda5250ActiveMessageC.nc b/tos/chips/tda5250/Tda5250ActiveMessageC.nc
new file mode 100644
index 00000000..7900fb6a
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250ActiveMessageC.nc
@@ -0,0 +1,95 @@
+// $Id: Tda5250ActiveMessageC.nc,v 1.7 2010-06-29 22:07:46 scipio Exp $
+
+/*                                                                      
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:             Philip Levis
+ * Date last modified:  $Id: Tda5250ActiveMessageC.nc,v 1.7 2010-06-29 22:07:46 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer for the TDA5250 radio. This configuration
+ * just layers the AM dispatch (Tda5250ActiveMessageP) on top of the
+ * underlying TDA5250 radio packet.
+ *
+ * @author Philip Levis
+ * @author Vlado Handziski (TDA5250 modifications)
+ * @date July 20 2005
+ */
+
+
+#include "Timer.h"
+
+configuration Tda5250ActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface PacketAcknowledgements;
+    interface Tda5250Packet;	
+  }
+}
+implementation {
+
+  components Tda5250ActiveMessageP as AM, RadioDataLinkC as Radio;
+  components ActiveMessageAddressC as Address;
+
+  SplitControl = Radio;
+
+  Packet       = Radio;
+  PacketAcknowledgements = Radio;
+  Tda5250Packet = AM;		
+
+  AMSend   = AM;
+  Receive  = AM.Receive;
+  Snoop    = AM.Snoop;
+  AMPacket = AM;
+
+  AM.SubSend    -> Radio.Send;
+  AM.SubReceive -> Radio.Receive;
+  AM.SubPacket -> Radio.Packet;
+  AM.amAddress -> Address;
+}
diff --git a/tos/chips/tda5250/Tda5250ActiveMessageP.nc b/tos/chips/tda5250/Tda5250ActiveMessageP.nc
new file mode 100644
index 00000000..0d1bfe93
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250ActiveMessageP.nc
@@ -0,0 +1,185 @@
+// -*- mode:c++; indent-tabs-mode: nil -*- $Id: Tda5250ActiveMessageP.nc,v 1.11 2010-06-29 22:07:46 scipio Exp $
+/* 
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:             Philip Levis
+ * Date last modified:  $Id: Tda5250ActiveMessageP.nc,v 1.11 2010-06-29 22:07:46 scipio Exp $
+ *
+ */
+
+/**
+ * @author Philip Levis
+ * @author Vlado Handziski (TDA5250 modifications)
+ * @date July 20 2005
+ */
+
+module Tda5250ActiveMessageP {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+    interface Tda5250Packet;
+  }
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    interface Packet as SubPacket;
+    command am_addr_t amAddress();
+  }
+}
+implementation {
+
+    tda5250_header_t* getHeader( message_t* msg ) {
+        return (tda5250_header_t*)( msg->data - sizeof(tda5250_header_t) );
+    }
+
+    tda5250_metadata_t* getMetadata(message_t* amsg) {
+        return (tda5250_metadata_t*)((uint8_t*)amsg->footer + sizeof(message_radio_footer_t));
+    }
+    
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+                                          message_t* msg,
+                                          uint8_t len) {
+    tda5250_header_t* header = getHeader(msg);
+    header->type = id;
+    header->dest = addr;
+    header->src = call amAddress();
+    return call SubSend.send(msg, len);
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call SubPacket.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+    return call SubPacket.getPayload(m, len);
+  }
+
+  /* Receiving a packet */
+
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    if (call AMPacket.isForMe(msg)) {
+      return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+    else {
+      return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+  }
+
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    tda5250_header_t* header = getHeader(amsg);
+    return header->dest;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    tda5250_header_t* header = getHeader(amsg);
+    header->dest = addr;
+  }
+
+  command am_addr_t AMPacket.source(message_t* amsg) {
+    tda5250_header_t* header = getHeader(amsg);
+    return header->src;
+  }
+  
+  command void AMPacket.setSource(message_t* amsg, am_addr_t addr) {
+    tda5250_header_t* header = getHeader(amsg);
+    header->src = addr;
+  }
+  
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+            call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    tda5250_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t type) {
+    tda5250_header_t* header = getHeader(amsg);
+    header->type = type;
+  }
+
+  command void AMPacket.setGroup(message_t* msg, am_group_t group) {
+     return;
+  }
+
+  command am_group_t AMPacket.group(message_t* msg) {
+    return TOS_AM_GROUP;
+  }
+
+  command am_group_t AMPacket.localGroup() {
+    return TOS_AM_GROUP;
+  }
+
+  async command uint8_t Tda5250Packet.getSnr(message_t* msg) {
+      return getMetadata(msg)->strength;
+  }
+  
+  default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+   return;
+ }
+
+
+
+}
diff --git a/tos/chips/tda5250/Tda5250Control.nc b/tos/chips/tda5250/Tda5250Control.nc
new file mode 100644
index 00000000..d5629c27
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250Control.nc
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#include "tda5250Control.h"
+/** 
+ * This interface provides commands and events for controlling the radio modes.
+ * 
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ *
+ */
+interface Tda5250Control {
+   
+   /**
+    * Switches radio to TimerMode.
+    * 
+    * @param on_time Sets the time (ms) the radio is on.
+    * @param off_time Sets the time (ms) the radio is off.
+    *
+    * @return SUCCESS on success
+    *         FAIL otherwise.
+    */
+   async command error_t TimerMode(float on_time, float off_time);
+   
+   /**
+   * Resets the timers set in TimerMode(). 
+   * 
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+   async command error_t ResetTimerMode();
+   
+   /**
+   * Switches radio to SelfPollingMode.
+   * 
+   * @param on_time Sets the time (ms) the radio is on.
+   * @param off_time Sets the time (ms) the radio is off.
+   *
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+   async command error_t SelfPollingMode(float on_time, float off_time);
+   
+   /**
+    * Resets the timers set in SelfPollingMode(float, float). 
+    * 
+    * @return SUCCESS on success
+    *         FAIL otherwise.
+    */
+   async command error_t ResetSelfPollingMode();
+   
+   /**
+   * Switches radio to TxMode.
+   * 
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+   async command error_t TxMode();
+   
+   /**
+   * Switches radio to RxMode.
+   * 
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+   async command error_t RxMode();
+   
+   /**
+   * Switches radio to SleepMode.
+   * 
+   * @return SUCCESS on success
+   *         FAIL otherwise.
+   */
+   async command error_t SleepMode();
+
+   
+   /**
+    * Notification that radio mode is switched to TimerModeDone.
+    */
+   async event void TimerModeDone();
+   
+   /**
+   * Notification that radio mode is switched to SelfPollingMode.
+   */
+   async event void SelfPollingModeDone();
+   
+   /**
+   * Notification that radio mode is switched to TxMode.
+   */
+   async event void TxModeDone();
+   
+   /**
+   * Notification that radio mode is switched to RxMode.
+   */
+   async event void RxModeDone();
+   
+   /**
+   * Notification that the rssi is stable.
+   */
+   async event void RssiStable();
+   
+   /**
+   * Notification that radio mode is switched to SleepMode.
+   */
+   async event void SleepModeDone();
+
+   /**
+    * Notification of interrupt when in
+    * TimerMode or SelfPollingMode.
+    */
+   async event void PWDDDInterrupt();
+}
+
diff --git a/tos/chips/tda5250/Tda5250Packet.nc b/tos/chips/tda5250/Tda5250Packet.nc
new file mode 100644
index 00000000..eb3026f7
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250Packet.nc
@@ -0,0 +1,43 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Revision: 1.1 $
+ * $Date: 2007-07-24 12:22:42 $
+ */
+
+/**
+ * Access the specific fields of this radio
+ * @author: Andreas Koepke <koepke@tkn.tu-berlin.de>
+ */
+
+
+#include "message.h"
+
+interface Tda5250Packet {
+    async command uint8_t getSnr(message_t* msg);
+}
diff --git a/tos/chips/tda5250/Tda5250RadioC.nc b/tos/chips/tda5250/Tda5250RadioC.nc
new file mode 100644
index 00000000..4729fbdf
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250RadioC.nc
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.7 $
+ * $Date: 2008-06-17 16:53:50 $
+ * ========================================================================
+ */
+
+ /**
+ * Controlling the Tda5250 at the Hpl layer.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+#include "tda5250Const.h"
+#include "tda5250RegDefaultSettings.h"
+#include "tda5250RegTypes.h"
+configuration Tda5250RadioC {
+  provides {
+    interface SplitControl;
+    interface Tda5250Control;
+    interface ResourceRequested;
+    interface RadioByteComm;
+    interface ClkDiv;
+  }
+}
+implementation {
+  components Tda5250RadioP
+           , HplTda5250ConfigC
+           , HplTda5250DataC
+           , new Alarm32khz16C() as DelayTimer
+           , MainC;
+
+  MainC.SoftwareInit -> HplTda5250ConfigC;
+  MainC.SoftwareInit -> HplTda5250DataC;
+  MainC.SoftwareInit -> Tda5250RadioP;
+           
+  Tda5250Control = Tda5250RadioP;
+  ResourceRequested = Tda5250RadioP;
+  RadioByteComm = Tda5250RadioP;
+  SplitControl = Tda5250RadioP;
+  ClkDiv = Tda5250RadioP;
+
+  Tda5250RadioP.DelayTimer -> DelayTimer;
+  
+  Tda5250RadioP.ConfigResource -> HplTda5250ConfigC;
+  Tda5250RadioP.DataResource -> HplTda5250DataC;
+  Tda5250RadioP.DataResourceRequested -> HplTda5250DataC;
+  
+  Tda5250RadioP.HplTda5250Config -> HplTda5250ConfigC;
+  Tda5250RadioP.HplTda5250Data -> HplTda5250DataC;
+  Tda5250RadioP.HplTda5250DataControl -> HplTda5250DataC;
+
+}
diff --git a/tos/chips/tda5250/Tda5250RadioP.nc b/tos/chips/tda5250/Tda5250RadioP.nc
new file mode 100644
index 00000000..a8f685fe
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250RadioP.nc
@@ -0,0 +1,493 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.9 $
+ * $Date: 2008-06-18 01:25:54 $
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#include "tda5250Const.h"
+
+
+/*
+ * Controlling the Tda5250
+ *
+ * Switch modes and initialize.
+ *
+ * @author Kevin Klues
+ * @author Philipp Huppertz
+ * @author Andreas Koepke
+ */
+#include "Timer.h"
+
+module Tda5250RadioP {
+    provides {
+        interface Init;
+        interface SplitControl;
+        interface Tda5250Control;
+        interface RadioByteComm;
+        interface ResourceRequested;
+        interface ClkDiv;
+#ifdef LNDW
+        interface RfPower;
+#endif
+    }
+    uses {
+        interface HplTda5250Config;
+        interface HplTda5250Data;
+        interface HplTda5250DataControl;
+        interface Resource as ConfigResource;
+        interface Resource as DataResource;
+        interface ResourceRequested as DataResourceRequested;
+        interface Alarm<T32khz, uint16_t> as DelayTimer;
+    }
+}
+
+implementation {
+  
+    typedef enum {
+        TRANSMITTER_DELAY,
+        RECEIVER_DELAY,
+        RSSISTABLE_DELAY
+    } delayTimer_t;
+  
+    delayTimer_t delayTimer;  // current Mode of the Timer (RssiStable, TxSetupTime, RxSetupTime)
+    radioMode_t radioMode;    // Current Mode of the Radio
+    float onTime, offTime;
+
+#ifdef LNDW
+    norace bool rfpowerdirty = FALSE;
+    norace uint8_t rfpower = INITIAL_RF_POWER;
+    task void setRfPower() {
+        uint8_t rp, rd;
+        atomic {
+            rp = rfpower;
+            rd = rfpowerdirty;
+        }
+        if(rd) {
+            if(call ConfigResource.immediateRequest() == SUCCESS)  {
+                call HplTda5250Config.SetRFPower(rp);                
+                atomic rfpowerdirty = FALSE;
+            }
+            else {
+                post setRfPower();
+            }
+        }
+    }
+#endif
+    
+    /**************** Radio Init *****************/
+    command error_t Init.init() {
+        radioMode = RADIO_MODE_OFF;
+        return SUCCESS;
+    }
+
+    /**************** Radio Start  *****************/
+    task void startDoneTask() {
+        signal ClkDiv.startDone();
+        signal SplitControl.startDone(SUCCESS);
+    }
+      
+    command error_t SplitControl.start() {
+        radioMode_t mode;
+        atomic mode = radioMode;
+        if(mode == RADIO_MODE_OFF) {
+            atomic radioMode = RADIO_MODE_ON_TRANSITION;
+            return call ConfigResource.request();
+        }
+        return FAIL;
+    }
+
+    /**************** Radio Stop  *****************/
+    task void stopDoneTask() {
+        signal SplitControl.stopDone(SUCCESS); 
+    }
+      
+    command error_t SplitControl.stop(){
+        atomic radioMode = RADIO_MODE_OFF_TRANSITION;
+        return call ConfigResource.request();
+    }
+
+    /* radioBusy
+     * This function checks whether the radio is busy
+     * so as to decide whether it can perform some operation or not.
+     */
+    bool radioBusy() {
+        switch(radioMode) {
+            case RADIO_MODE_OFF:
+            case RADIO_MODE_ON_TRANSITION:
+            case RADIO_MODE_OFF_TRANSITION:
+            case RADIO_MODE_TX_TRANSITION:
+            case RADIO_MODE_RX_TRANSITION:
+            case RADIO_MODE_TIMER_TRANSITION:
+            case RADIO_MODE_SELF_POLLING_TRANSITION:
+            case RADIO_MODE_SLEEP_TRANSITION:
+                return TRUE;
+            default:
+                return FALSE;
+        }
+    }
+
+    void switchConfigResource() {
+        radioMode_t mode;
+        atomic mode = radioMode;
+        switch(mode) {
+            case RADIO_MODE_ON_TRANSITION:
+                call HplTda5250Config.reset();
+                call HplTda5250Config.SetRFPower(INITIAL_RF_POWER);
+                // call HplTda5250Config.SetClockOnDuringPowerDown();
+                call ConfigResource.release();
+                atomic radioMode = RADIO_MODE_ON;
+                post startDoneTask();
+                break;
+            case RADIO_MODE_OFF_TRANSITION:
+                signal ClkDiv.stopping();
+                call HplTda5250Config.SetSleepMode();
+                call ConfigResource.release();
+                atomic radioMode = RADIO_MODE_OFF;
+                post stopDoneTask();
+                break;
+            case RADIO_MODE_SLEEP_TRANSITION:
+                signal ClkDiv.stopping();
+                call HplTda5250Config.SetSlaveMode();
+                call HplTda5250Config.SetSleepMode();
+                atomic radioMode = RADIO_MODE_SLEEP;
+                signal Tda5250Control.SleepModeDone();
+#ifdef LNDW
+                if(rfpowerdirty) post setRfPower();
+#endif
+                break;
+            case RADIO_MODE_TX_TRANSITION:
+                call HplTda5250Config.SetSlaveMode();
+                call HplTda5250Config.SetTxMode();
+                if (!(call HplTda5250Config.IsTxRxPinControlled()))
+                    call ConfigResource.release();
+                atomic delayTimer = TRANSMITTER_DELAY;
+                call DelayTimer.start(TDA5250_TRANSMITTER_SETUP_TIME);
+                break;
+            case RADIO_MODE_RX_TRANSITION:
+                call HplTda5250Config.SetSlaveMode();
+                call HplTda5250Config.SetRxMode();
+                if (!(call HplTda5250Config.IsTxRxPinControlled()))
+                    call ConfigResource.release();
+                atomic delayTimer = RECEIVER_DELAY;
+                call DelayTimer.start(TDA5250_RECEIVER_SETUP_TIME);
+                break;
+            case RADIO_MODE_TIMER_TRANSITION:
+                call HplTda5250Config.SetTimerMode(onTime, offTime);
+                call ConfigResource.release();
+                atomic radioMode = RADIO_MODE_TIMER;
+                signal Tda5250Control.TimerModeDone();
+                break;
+            case RADIO_MODE_SELF_POLLING_TRANSITION:
+                call HplTda5250Config.SetSelfPollingMode(onTime, offTime);
+                call ConfigResource.release();
+                atomic radioMode = RADIO_MODE_SELF_POLLING;
+                signal Tda5250Control.SelfPollingModeDone();
+                break;
+            default:
+                break;
+        }
+    }
+
+    event void ConfigResource.granted() {
+        switchConfigResource();
+    }
+
+    void switchDataResource() {
+        radioMode_t mode;
+        atomic mode = radioMode;
+        switch(mode) {
+          case RADIO_MODE_TX_TRANSITION:
+            atomic radioMode = RADIO_MODE_TX;
+            signal Tda5250Control.TxModeDone();
+            break;
+          case RADIO_MODE_RX_TRANSITION:
+            atomic radioMode = RADIO_MODE_RX;
+            signal Tda5250Control.RxModeDone();
+            break;
+          default:
+            break;
+        }
+    }
+      
+    event void DataResource.granted() {
+        switchDataResource();
+    }
+      
+    // information for higher layers that the DataResource has been requested
+    async event void DataResourceRequested.requested() {
+        signal ResourceRequested.requested();
+    }
+
+    async event void DataResourceRequested.immediateRequested() {
+        signal ResourceRequested.immediateRequested();
+    }
+
+    /**
+       Set the mode of the radio
+       The choices are TIMER_MODE, SELF_POLLING_MODE
+    */
+    async command error_t Tda5250Control.TimerMode(float on_time, float off_time) {
+        radioMode_t mode;
+        atomic {
+            if(radioBusy() == FALSE) {
+                radioMode = RADIO_MODE_TIMER_TRANSITION;
+                onTime = on_time;
+                offTime = off_time;
+            }
+            mode = radioMode;
+        }
+        if(radioMode == RADIO_MODE_TIMER_TRANSITION) {
+            call DataResource.release();
+            if (call ConfigResource.immediateRequest() == SUCCESS) {
+                switchConfigResource();
+            } else {
+                call ConfigResource.request();
+            }
+            return SUCCESS;
+        }
+        return FAIL;
+    }
+
+    async command error_t Tda5250Control.ResetTimerMode() {
+        radioMode_t mode;
+        atomic {
+            if(radioBusy() == FALSE) {
+                radioMode = RADIO_MODE_TIMER_TRANSITION;
+            }
+            mode = radioMode;
+        }
+        if(radioMode == RADIO_MODE_TIMER_TRANSITION) {
+            call DataResource.release();
+            if (call ConfigResource.immediateRequest() == SUCCESS) {
+                switchConfigResource();
+            } else {
+                call ConfigResource.request();
+            }
+            return SUCCESS;
+        }
+        return FAIL;
+    }
+
+    async command error_t Tda5250Control.SelfPollingMode(float on_time, float off_time) {
+        radioMode_t mode;
+        atomic {
+            if(radioBusy() == FALSE) {
+                radioMode = RADIO_MODE_SELF_POLLING_TRANSITION;
+                onTime = on_time;
+                offTime = off_time;
+            }
+            mode = radioMode;
+        }
+        if(radioMode == RADIO_MODE_SELF_POLLING_TRANSITION) {
+            call DataResource.release();
+            if (call ConfigResource.immediateRequest() == SUCCESS) {
+                switchConfigResource();
+            } else {
+                call ConfigResource.request();
+            }
+            return SUCCESS;
+        }
+        return FAIL;
+    }
+
+    async command error_t Tda5250Control.ResetSelfPollingMode() {
+        radioMode_t mode;
+        atomic {
+            if(radioBusy() == FALSE) {
+                radioMode = RADIO_MODE_SELF_POLLING_TRANSITION;
+            }
+            mode = radioMode;
+        }
+        if(radioMode == RADIO_MODE_SELF_POLLING_TRANSITION) {
+            call DataResource.release();
+            if (call ConfigResource.immediateRequest() == SUCCESS) {
+                switchConfigResource();
+            } else {
+                call ConfigResource.request();
+            }
+            return SUCCESS;
+        }
+        return FAIL;
+    }
+
+    async command error_t Tda5250Control.SleepMode() {
+        radioMode_t mode;
+        atomic{
+            if(radioBusy() == FALSE) {
+                radioMode = RADIO_MODE_SLEEP_TRANSITION;
+            }
+            mode = radioMode;
+        }
+        if(mode == RADIO_MODE_SLEEP_TRANSITION) {
+            call DataResource.release();
+            switchConfigResource();
+            return SUCCESS;
+        }
+        return FAIL;
+    }
+    
+    async command error_t Tda5250Control.TxMode() {
+        radioMode_t mode;
+        atomic {
+            if(radioBusy() == FALSE) {
+                radioMode = RADIO_MODE_TX_TRANSITION;
+            }
+            mode = radioMode;
+        }
+        if(mode == RADIO_MODE_TX_TRANSITION) {
+          call DataResource.release();
+          call HplTda5250DataControl.setToTx();
+          if (call HplTda5250Config.IsTxRxPinControlled()) {
+            switchConfigResource();
+          } else {
+            if (call ConfigResource.immediateRequest() == SUCCESS) {
+              switchConfigResource();
+            } else {
+              call ConfigResource.request();
+            }
+          }
+          return SUCCESS;
+        }
+        return FAIL;
+    }
+
+    async command error_t Tda5250Control.RxMode() {
+        radioMode_t mode;
+        atomic {
+            if(radioBusy() == FALSE) {
+                radioMode = RADIO_MODE_RX_TRANSITION;
+            }
+            mode = radioMode;
+        }
+        if(mode == RADIO_MODE_RX_TRANSITION) {
+          call DataResource.release();
+          call HplTda5250DataControl.setToRx();
+          if (call HplTda5250Config.IsTxRxPinControlled()) {
+            switchConfigResource();
+          } else {
+              if (call ConfigResource.immediateRequest() == SUCCESS) {
+                  switchConfigResource();
+              } else {
+                  call ConfigResource.request();
+              }
+          }
+          return SUCCESS;
+        }
+        return FAIL;
+    }
+
+    async event void HplTda5250Data.txReady() {
+        signal RadioByteComm.txByteReady(SUCCESS);
+    }
+    async event void HplTda5250Data.rxDone(uint8_t data) {
+        signal RadioByteComm.rxByteReady(data);
+    }
+
+    async event void HplTda5250Config.PWDDDInterrupt() {
+        signal Tda5250Control.PWDDDInterrupt();
+    }
+
+    async command void RadioByteComm.txByte(uint8_t data) {
+        error_t error = call HplTda5250Data.tx(data);
+        if(error != SUCCESS) {
+            signal RadioByteComm.txByteReady(error);
+        }
+    }
+
+    async command bool RadioByteComm.isTxDone() {
+        //return call HplTda5250Data.isTxDone();
+        return TRUE;
+    }
+      
+/* Generate events (these are no interrupts */
+    async event void DelayTimer.fired() {
+        delayTimer_t delay;
+        atomic { delay = delayTimer; }
+        switch (delay) {
+          case RSSISTABLE_DELAY :
+            signal Tda5250Control.RssiStable();
+            break;
+          case RECEIVER_DELAY :
+              signal ClkDiv.startDone();
+            delayTimer = RSSISTABLE_DELAY;
+            call DelayTimer.start(TDA5250_RSSI_STABLE_TIME-TDA5250_RECEIVER_SETUP_TIME);
+            if (call DataResource.immediateRequest() == SUCCESS) {
+              switchDataResource();
+            } else {
+              call DataResource.request();
+            }
+            break;
+          case TRANSMITTER_DELAY :
+              signal ClkDiv.startDone();
+            if (call DataResource.immediateRequest() == SUCCESS) {
+              switchDataResource();
+            } else {
+              call DataResource.request();
+            }
+            break;
+        }
+      }
+
+      default async event void ResourceRequested.requested() {
+      }
+      default async event void ResourceRequested.immediateRequested() {
+      }
+      default async event void Tda5250Control.TimerModeDone(){
+      }
+      default async event void Tda5250Control.SelfPollingModeDone(){
+      }
+      default async event void Tda5250Control.RxModeDone(){
+      }
+      default async event void Tda5250Control.TxModeDone(){
+      }
+      default async event void Tda5250Control.SleepModeDone(){
+      }
+      default async event void Tda5250Control.PWDDDInterrupt() {
+      }
+      default async event void RadioByteComm.rxByteReady(uint8_t data) {
+      }
+      default async event void RadioByteComm.txByteReady(error_t error) {
+      }
+      default async event void ClkDiv.startDone() {
+      }
+      default async event void ClkDiv.stopping() {
+      }
+#ifdef LNDW
+      async command error_t RfPower.set(uint8_t setting) {
+          atomic {
+              rfpower = setting;
+              rfpowerdirty = TRUE;
+          }
+          return SUCCESS;
+      }
+#endif
+}
diff --git a/tos/chips/tda5250/Tda5250ReadReg.nc b/tos/chips/tda5250/Tda5250ReadReg.nc
new file mode 100644
index 00000000..3abbe704
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250ReadReg.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * ========================================================================
+ */
+
+ /**
+ * Allows reading of a specified register. See "tda5250RegTypes.h".
+ * ReadReg is parameterized by the register it uses.
+ *
+ * @param reg_type Defines the register to read from.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+interface Tda5250ReadReg<reg_type> {
+  /**
+   * Reads from the paramterized register.
+   *
+   * @return Data content of the register.
+   */
+  async command reg_type get();
+}
+
diff --git a/tos/chips/tda5250/Tda5250RegComm.nc b/tos/chips/tda5250/Tda5250RegComm.nc
new file mode 100644
index 00000000..f1eb021d
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250RegComm.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ */
+
+/**
+ * Interface for writing and reading bytes to and from the Tda5250 Radio
+ * registers.
+ *
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+interface Tda5250RegComm {
+ /**
+   * Transmit a byte of data to a given register.
+   *
+   * @param address The address of the register to write to.
+   * @param data The 8-bit data value to write to the register.
+   *
+   * @return always SUCCESS.
+   */
+  async command error_t writeByte(uint8_t address, uint8_t data);
+
+ /**
+   * Transmit a word of data to a given register.
+   *
+   * @param address The address of the register to write to.
+   * @param data The 16-bit data value to write to the register.
+   *
+   * @return always SUCCESS.
+   */
+  async command error_t writeWord(uint8_t address, uint16_t data);
+
+ /**
+   * Read a byte of data from a given register.
+   *
+   * @param address The address of the register to read from.
+   *
+   * @return The 16-bit data value read from the register.
+   */
+  async command uint8_t readByte(uint8_t address);
+}
+
diff --git a/tos/chips/tda5250/Tda5250RegCommP.nc b/tos/chips/tda5250/Tda5250RegCommP.nc
new file mode 100644
index 00000000..53566d08
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250RegCommP.nc
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+module Tda5250RegCommP {
+  provides {
+    interface Init;
+    interface Tda5250RegComm;
+    interface Resource;
+  }
+  uses {
+    interface GeneralIO as BusM;
+    interface Resource as SpiResource;
+    interface SpiByte;
+  }
+}
+
+implementation {
+
+   command error_t Init.init() {
+     // setting pins to output
+     call BusM.makeOutput();
+
+     //initializing pin values
+     call BusM.set();  //Use SPI for writing to Regs
+
+     return SUCCESS;
+   }
+
+   async command error_t Resource.request() {
+     return call SpiResource.request();
+   }
+
+   async command error_t Resource.immediateRequest() {
+     if(call SpiResource.immediateRequest() == EBUSY)
+       return EBUSY;
+     return SUCCESS;
+   }
+
+   async command bool Resource.isOwner() {
+     return call SpiResource.isOwner();
+   }
+
+   async command error_t Resource.release() {
+     return call SpiResource.release();
+   }
+
+   event void SpiResource.granted() {
+     signal Resource.granted();
+   }
+
+   async command error_t Tda5250RegComm.writeByte(uint8_t address, uint8_t data) {
+     if(call SpiResource.isOwner() == FALSE) {
+       return FAIL;
+     }
+     call SpiByte.write(address);
+     call SpiByte.write(data);
+     return SUCCESS;
+   }
+   
+   async command error_t Tda5250RegComm.writeWord(uint8_t address, uint16_t data) {
+      if(call SpiResource.isOwner() == FALSE)
+        return FAIL;
+      call SpiByte.write(address);
+      call SpiByte.write(((uint8_t) (data >> 8)));
+      call SpiByte.write(((uint8_t) data));
+      return SUCCESS;
+   }
+
+   async command uint8_t Tda5250RegComm.readByte(uint8_t address){
+      if(call SpiResource.isOwner() == FALSE)
+        return 0x00;
+      call SpiByte.write(address);
+
+      // FIXME: Put SIMO/SOMI in input
+      return call SpiByte.write(0x00);
+   }
+
+}
diff --git a/tos/chips/tda5250/Tda5250RegistersC.nc b/tos/chips/tda5250/Tda5250RegistersC.nc
new file mode 100644
index 00000000..88894197
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250RegistersC.nc
@@ -0,0 +1,92 @@
+/*
+* Copyright (c) 2004, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* - Revision -------------------------------------------------------------
+* $Revision: 1.4 $
+* $Date: 2006-12-12 18:23:13 $
+* ========================================================================
+*/
+
+/**
+* Provides access to the registers of the tda5250 radio.
+*
+* @author Kevin Klues (klues@tkn.tu-berlin.de)
+*/
+
+configuration Tda5250RegistersC {
+provides {
+        interface Init;
+        interface Resource;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_CONFIG>      as CONFIG;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_FSK>         as FSK;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_XTAL_TUNING> as XTAL_TUNING;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_LPF>         as LPF;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_ON_TIME>     as ON_TIME;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_OFF_TIME>    as OFF_TIME;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_COUNT_TH1>   as COUNT_TH1;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_COUNT_TH2>   as COUNT_TH2;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_RSSI_TH3>    as RSSI_TH3;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_RF_POWER>    as RF_POWER;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_CLK_DIV>     as CLK_DIV;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_XTAL_CONFIG> as XTAL_CONFIG;
+        interface Tda5250WriteReg<TDA5250_REG_TYPE_BLOCK_PD>    as BLOCK_PD;
+        interface Tda5250ReadReg<TDA5250_REG_TYPE_STATUS>       as STATUS;
+        interface Tda5250ReadReg<TDA5250_REG_TYPE_ADC>          as ADC;
+}
+}
+implementation {
+        components Tda5250RegistersP
+                        , Tda5250RadioIOC
+                        , Tda5250RegCommC
+        ;
+
+        Init = Tda5250RegistersP;
+        Init = Tda5250RegCommC;
+        Resource = Tda5250RegCommC;
+
+        CONFIG = Tda5250RegistersP.CONFIG;
+        FSK = Tda5250RegistersP.FSK;
+        XTAL_TUNING = Tda5250RegistersP.XTAL_TUNING;
+        LPF = Tda5250RegistersP.LPF;
+        ON_TIME = Tda5250RegistersP.ON_TIME;
+        OFF_TIME = Tda5250RegistersP.OFF_TIME;
+        COUNT_TH1 = Tda5250RegistersP.COUNT_TH1;
+        COUNT_TH2 = Tda5250RegistersP.COUNT_TH2;
+        RSSI_TH3 = Tda5250RegistersP.RSSI_TH3;
+        RF_POWER = Tda5250RegistersP.RF_POWER;
+        CLK_DIV = Tda5250RegistersP.CLK_DIV;
+        XTAL_CONFIG = Tda5250RegistersP.XTAL_CONFIG;
+        BLOCK_PD = Tda5250RegistersP.BLOCK_PD;
+        STATUS = Tda5250RegistersP.STATUS;
+        ADC = Tda5250RegistersP.ADC;
+
+        Tda5250RegistersP.Pot -> Tda5250RegCommC;
+        Tda5250RegistersP.Tda5250RegComm -> Tda5250RegCommC;
+
+        Tda5250RegistersP.ENTDA -> Tda5250RadioIOC.Tda5250RadioENTDA;
+}
+
diff --git a/tos/chips/tda5250/Tda5250RegistersP.nc b/tos/chips/tda5250/Tda5250RegistersP.nc
new file mode 100644
index 00000000..89e819e9
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250RegistersP.nc
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * ========================================================================
+ */
+
+ /**
+ * Tda5250RegistersP Module
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+module Tda5250RegistersP {
+  provides {
+    interface Init;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_CONFIG>      as CONFIG;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_FSK>         as FSK;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_XTAL_TUNING> as XTAL_TUNING;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_LPF>         as LPF;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_ON_TIME>     as ON_TIME;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_OFF_TIME>    as OFF_TIME;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_COUNT_TH1>   as COUNT_TH1;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_COUNT_TH2>   as COUNT_TH2;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_RSSI_TH3>    as RSSI_TH3;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_RF_POWER>    as RF_POWER;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_CLK_DIV>     as CLK_DIV;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_XTAL_CONFIG> as XTAL_CONFIG;
+    interface Tda5250WriteReg<TDA5250_REG_TYPE_BLOCK_PD>    as BLOCK_PD;
+    interface Tda5250ReadReg<TDA5250_REG_TYPE_STATUS>       as STATUS;
+    interface Tda5250ReadReg<TDA5250_REG_TYPE_ADC>          as ADC;
+  }
+  uses {
+        interface Tda5250RegComm;
+        interface Pot;
+        interface GeneralIO as ENTDA;
+  }
+}
+implementation {
+
+   error_t writeByte(uint8_t addr, uint16_t data) {
+     error_t result;
+     call ENTDA.clr();
+     result = call Tda5250RegComm.writeByte(addr, data);
+     call ENTDA.set();
+     return result;
+   }
+   error_t writeWord(uint8_t addr, uint16_t data) {
+     error_t result;
+     call ENTDA.clr();
+     result = call Tda5250RegComm.writeWord(addr, data);
+     call ENTDA.set();
+     return result;
+   }
+   uint8_t readByte(uint8_t addr) {
+     uint8_t result;
+     call ENTDA.clr();
+     result = call Tda5250RegComm.readByte(addr);
+     call ENTDA.set();
+     return result;
+   }
+
+   command error_t Init.init() {
+     // setting pins to output
+     call ENTDA.makeOutput();
+
+     // initializing pin values
+     call ENTDA.set();
+
+    return SUCCESS;
+   }
+
+   async command error_t CONFIG.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_CONFIG, data);
+   };
+   async command error_t FSK.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_FSK, data);
+   };
+   async command error_t XTAL_TUNING.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_XTAL_TUNING, data);
+   };
+   async command error_t LPF.set(uint8_t data) {
+     return writeByte(TDA5250_REG_ADDR_LPF, data);
+   };
+   async command error_t ON_TIME.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_ON_TIME, data);
+   };
+   async command error_t OFF_TIME.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_OFF_TIME, data);
+   };
+   async command error_t COUNT_TH1.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_COUNT_TH1, data);
+   };
+   async command error_t COUNT_TH2.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_COUNT_TH2, data);
+   };
+   async command error_t RSSI_TH3.set(uint8_t data) {
+     return writeByte(TDA5250_REG_ADDR_RSSI_TH3, data);
+   };
+   async command error_t RF_POWER.set(uint8_t data) {
+     return call Pot.set(data);
+   };
+   async command error_t CLK_DIV.set(uint8_t data) {
+     return writeByte(TDA5250_REG_ADDR_CLK_DIV, data);
+   };
+   async command error_t XTAL_CONFIG.set(uint8_t data) {
+     return writeByte(TDA5250_REG_ADDR_XTAL_CONFIG, data);
+   };
+   async command error_t BLOCK_PD.set(uint16_t data) {
+     return writeWord(TDA5250_REG_ADDR_BLOCK_PD, data);
+   };
+   async command uint8_t STATUS.get() {
+     return readByte(TDA5250_REG_ADDR_STATUS);
+   };
+   async command uint8_t ADC.get() {
+     return readByte(TDA5250_REG_ADDR_ADC);
+   };
+}
+
diff --git a/tos/chips/tda5250/Tda5250WriteReg.nc b/tos/chips/tda5250/Tda5250WriteReg.nc
new file mode 100644
index 00000000..c6a641ac
--- /dev/null
+++ b/tos/chips/tda5250/Tda5250WriteReg.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * ========================================================================
+ */
+
+ /**
+ * Allows writing to a specified register. See "tda5250RegTypes.h".
+ * WriteReg is parameterized by the register it uses.
+ *
+ * @param reg_type Defines the register to write to.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+interface Tda5250WriteReg<reg_type> {
+  /**
+  * Writes to the parametrized register.
+  *
+  * @param v Data written to the register.
+  *
+  * @return SUCCESS on success
+  *         FAIL otherwise.
+  */
+  async command error_t set(reg_type v);
+}
+
diff --git a/tos/chips/tda5250/mac/ChannelCongestion.nc b/tos/chips/tda5250/mac/ChannelCongestion.nc
new file mode 100644
index 00000000..a65338d6
--- /dev/null
+++ b/tos/chips/tda5250/mac/ChannelCongestion.nc
@@ -0,0 +1,42 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * Interface of MAC to inform any interested party on current congestion state
+ * in radio neighborhood.
+ * @author Andreas Koepke (koepke at tkn.tu-berlin.de)
+ */ 
+interface ChannelCongestion {
+    /**
+     * signal current congestion level. There are 5 levels, 0 means no
+     * congestion, 5 means high congestion
+     */
+    async event void congestionEvent(uint8_t level);
+}
diff --git a/tos/chips/tda5250/mac/CsmaMacC.nc b/tos/chips/tda5250/mac/CsmaMacC.nc
new file mode 100644
index 00000000..4810c5a5
--- /dev/null
+++ b/tos/chips/tda5250/mac/CsmaMacC.nc
@@ -0,0 +1,109 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Configuration for the CsmaMac.
+ *
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * @author: Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+ */
+
+// #define MAC_DEBUG
+configuration CsmaMacC {
+  provides {
+    interface SplitControl;
+    interface MacSend;
+    interface MacReceive;
+    interface Packet;
+  }
+  uses {
+    interface PhySend as PacketSend;
+    interface PhyReceive as PacketReceive;
+    interface Packet as SubPacket;
+    interface Tda5250Control;  
+    interface UartPhyControl;
+    interface RadioTimeStamping;
+  }
+}
+implementation {
+  components  Tda5250RadioC,    
+      CsmaMacP,
+      RssiFixedThresholdCMC as Cca,
+      new Alarm32khz16C() as Timer,
+      new TimerMilliC() as ReRxTimer,
+      DuplicateC,
+      TimeDiffC,
+      LocalTimeC,
+      RandomLfsrC
+#ifdef MAC_DEBUG
+      ,PlatformLedsC
+#endif
+      ;
+    
+    SplitControl = CsmaMacP;
+    
+    MacSend = CsmaMacP;
+    MacReceive = CsmaMacP;
+    Tda5250Control = CsmaMacP;
+    UartPhyControl = CsmaMacP;
+    RadioTimeStamping = CsmaMacP;
+    
+    CsmaMacP = Packet;
+    CsmaMacP = SubPacket;
+    CsmaMacP = PacketSend;
+    CsmaMacP = PacketReceive;
+    
+    CsmaMacP.CcaStdControl -> Cca.StdControl;
+    CsmaMacP.ChannelMonitor -> Cca.ChannelMonitor;
+    CsmaMacP.ChannelMonitorData -> Cca.ChannelMonitorData;
+    CsmaMacP.ChannelMonitorControl -> Cca.ChannelMonitorControl;
+    CsmaMacP.RssiAdcResource -> Cca.RssiAdcResource;
+
+    components ActiveMessageAddressC;
+    CsmaMacP.amAddress -> ActiveMessageAddressC;
+
+    CsmaMacP.Random -> RandomLfsrC;
+
+    CsmaMacP.RadioResourceRequested -> Tda5250RadioC.ResourceRequested;
+
+    CsmaMacP.Timer -> Timer;
+
+    CsmaMacP.ReRxTimer -> ReRxTimer;
+
+    CsmaMacP.Duplicate -> DuplicateC;
+    CsmaMacP.TimeDiff16 -> TimeDiffC;
+    CsmaMacP.LocalTime32kHz -> LocalTimeC;
+
+#ifdef MACM_DEBUG
+    components new SerialDebugC() as SD;
+    CsmaMacP.SerialDebug -> SD;
+#endif    
+}
+
diff --git a/tos/chips/tda5250/mac/CsmaMacP.nc b/tos/chips/tda5250/mac/CsmaMacP.nc
new file mode 100644
index 00000000..7f17e414
--- /dev/null
+++ b/tos/chips/tda5250/mac/CsmaMacP.nc
@@ -0,0 +1,905 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+
+#include "radiopacketfunctions.h"
+#include "flagfunctions.h"
+#include "PacketAck.h"
+
+ /**
+  * An implementation of a Csma Mac.
+  * 
+  * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+  * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+  * @author Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+*/
+
+// #define MACM_DEBUG                 // debug...
+module CsmaMacP {
+    provides {
+        interface SplitControl;
+        interface MacSend;
+        interface MacReceive;
+        interface Packet;
+    }
+    uses {
+        interface StdControl as CcaStdControl;
+        interface PhySend as PacketSend;
+        interface PhyReceive as PacketReceive;
+        interface RadioTimeStamping;
+        
+        interface Tda5250Control as RadioModes;  
+        interface ResourceRequested as RadioResourceRequested;
+
+        interface UartPhyControl;
+        interface Packet as SubPacket;
+        
+        interface ChannelMonitor;
+        interface ChannelMonitorControl;  
+        interface ChannelMonitorData;
+        interface Resource as RssiAdcResource;
+
+        interface Random;
+
+        interface Timer<TMilli> as ReRxTimer;
+        interface Duplicate;
+        interface TimeDiff16;
+        
+        interface Alarm<T32khz, uint16_t> as Timer;
+        async command am_addr_t amAddress();
+        interface LocalTime<T32khz> as LocalTime32kHz;
+        
+#ifdef MACM_DEBUG
+        interface SerialDebug;
+#endif
+    }
+}
+implementation
+{
+    /****** debug vars & defs & functions  ***********************/
+#ifdef MACM_DEBUG
+    void sdDebug(uint16_t p) {
+        call SerialDebug.putPlace(p);
+    };
+#else
+    void sdDebug(uint16_t p) {};
+#endif
+
+    /******* constants and type definitions *********************/
+    enum {
+
+        BYTE_TIME=ENCODED_32KHZ_BYTE_TIME,           // phy encoded
+        PREAMBLE_BYTE_TIME=TDA5250_32KHZ_BYTE_TIME,  // no coding
+        PHY_HEADER_TIME=6*PREAMBLE_BYTE_TIME,        // 6 Phy Preamble
+        TIME_CORRECTION=TDA5250_32KHZ_BYTE_TIME+2,   // difference between txSFD and rxSFD
+
+        
+        SUB_HEADER_TIME=PHY_HEADER_TIME + sizeof(tda5250_header_t)*BYTE_TIME,
+        SUB_FOOTER_TIME=2*BYTE_TIME, // 2 bytes crc 
+        MAXTIMERVALUE=0xFFFF,        // helps to compute backoff
+        DATA_DETECT_TIME=17,
+        RX_SETUP_TIME=102,    // time to set up receiver
+        TX_SETUP_TIME=58,     // time to set up transmitter
+        ADDED_DELAY = 30,
+        RX_ACK_TIMEOUT=RX_SETUP_TIME + PHY_HEADER_TIME + 2*ADDED_DELAY,
+        TX_GAP_TIME=RX_ACK_TIMEOUT + TX_SETUP_TIME + 33,
+        MAX_SHORT_RETRY=7,
+        MAX_LONG_RETRY=4,
+        BACKOFF_MASK=0xFFF,  // minimum time around one packet time
+        MIN_PREAMBLE_BYTES=2,
+        TOKEN_ACK_FLAG = 64,
+        TOKEN_ACK_MASK = 0x3f,
+        INVALID_SNR = 0xffff
+    };
+    
+/**************** Module Global Variables  *****************/
+    
+    /* state vars & defs */
+    typedef enum {
+        CCA,             // clear channel assessment
+        CCA_ACK,
+        SW_RX,           // switch to receive
+        RX,              // rx mode done, listening & waiting for packet
+        SW_RX_ACK,
+        RX_ACK,
+        RX_ACK_P,
+        RX_P,
+        SW_TX,
+        TX,
+        SW_TX_ACK,
+        TX_ACK,
+        INIT
+    } macState_t;
+
+    /* flags */
+    typedef enum {
+        RSSI_STABLE = 1,
+        RESUME_BACKOFF = 2,
+        CANCEL_SEND = 4,
+        CCA_PENDING = 8
+    } flags_t;
+
+    /* Packet vars */
+    message_t* txBufPtr = NULL;
+    message_t ackMsg;
+
+    uint8_t txLen;
+    uint8_t shortRetryCounter = 0;
+
+    uint8_t longRetryCounter = 0;
+    unsigned checkCounter;
+    
+    macState_t macState = INIT;
+    uint8_t flags = 0;
+    uint8_t seqNo;
+    
+    uint16_t restLaufzeit;
+
+    uint16_t rssiValue = 0;
+
+    uint32_t rxTime = 0;
+    
+    /****** Secure switching of radio modes ***/
+    
+    task void SetRxModeTask();
+    task void SetTxModeTask();
+
+    task void ReleaseAdcTask() {
+        macState_t ms;
+        atomic ms = macState;
+        if(isFlagSet(&flags, CCA_PENDING)) {
+          post ReleaseAdcTask(); 
+        }
+        else {
+        	if((ms > CCA)  && (ms != INIT) && call RssiAdcResource.isOwner()) {
+          	  call RssiAdcResource.release();
+        	}	
+        }
+    }
+    
+    void setRxMode();
+    void setTxMode();
+
+    void requestAdc() {
+        if(macState != INIT) {
+          call RssiAdcResource.immediateRequest();
+        }
+        else {
+            call RssiAdcResource.request();
+        }
+    }
+    
+    void setRxMode() {
+        rssiValue = INVALID_SNR;
+        if(call RadioModes.RxMode() == FAIL) {
+            post SetRxModeTask();
+        }
+        if(macState == INIT) {
+          requestAdc();
+        } else {
+          post ReleaseAdcTask();
+        }
+    }
+    
+    task void SetRxModeTask() {
+        atomic {
+            if((macState == SW_RX) ||
+               (macState == SW_RX_ACK) ||
+               (macState == INIT)) setRxMode();
+        }
+    }
+
+    void setTxMode() {
+        clearFlag(&flags, RSSI_STABLE);
+        if(call RadioModes.TxMode() == FAIL) {
+            post SetTxModeTask();
+        }
+        post ReleaseAdcTask();
+    }
+    
+    task void SetTxModeTask() {
+        atomic {
+            if((macState == SW_TX) ||
+               (macState == SW_TX_ACK)) setTxMode();
+        }
+    }
+
+    /**************** Helper functions ********/
+
+    task void postponeReRx() {
+        call ReRxTimer.startOneShot(5000);
+    }
+
+    uint16_t backoff(uint8_t counter) {
+        uint16_t mask = BACKOFF_MASK >> (MAX_LONG_RETRY - counter);
+        return (call Random.rand16() & mask);
+    }
+
+    void interruptBackoffTimer() {
+        if(call Timer.isRunning()) {
+            restLaufzeit = call TimeDiff16.computeDelta(call Timer.getAlarm(), call Timer.getNow());
+            call Timer.stop();
+            if(restLaufzeit > BACKOFF_MASK) {
+                restLaufzeit = call Random.rand16() & 0xFF;
+            }
+            setFlag(&flags, RESUME_BACKOFF);
+        }
+    }
+
+    void storeStrength(message_t *m) {
+        if(rssiValue != INVALID_SNR) {
+            (getMetadata(m))->strength = rssiValue;
+        }
+        else {
+            if(call RssiAdcResource.isOwner()) {
+                (getMetadata(m))->strength = call ChannelMonitorData.readSnr();
+            }
+            else {
+                (getMetadata(m))->strength = 1;
+            }
+        }
+    }
+
+    void signalSendDone(error_t error) {
+        message_t *m;
+        error_t e = error;
+        atomic {
+            m = txBufPtr;
+            txBufPtr = 0;
+            txLen  = 0;
+            longRetryCounter = 0;
+            shortRetryCounter = 0;
+            if(isFlagSet(&flags, CANCEL_SEND)) {
+                e = ECANCEL;
+            }
+            storeStrength(m);
+            clearFlag(&flags, CANCEL_SEND);
+        }
+        signal MacSend.sendDone(m, e);
+    }
+
+    void updateLongRetryCounters() {
+        longRetryCounter++;
+        shortRetryCounter = 1;
+        if(longRetryCounter > MAX_LONG_RETRY) {
+            sdDebug(13);
+            getMetadata(txBufPtr)->ack = WAS_NOT_ACKED;
+            signalSendDone(FAIL);
+        }
+    }
+
+    void updateRetryCounters() {
+        shortRetryCounter++;
+        if(shortRetryCounter > MAX_SHORT_RETRY) {
+            longRetryCounter++;
+            shortRetryCounter = 1;
+            if(longRetryCounter > MAX_LONG_RETRY) {
+                getMetadata(txBufPtr)->ack = WAS_NOT_ACKED;
+                signalSendDone(FAIL);
+            }
+        }
+    }
+    
+    void computeBackoff() {
+        if(!isFlagSet(&flags, RESUME_BACKOFF)) {
+            setFlag(&flags, RESUME_BACKOFF);
+            restLaufzeit = backoff(longRetryCounter);
+            updateRetryCounters();
+            sdDebug(92);
+        }
+    }
+
+    bool isNewMsg(message_t* msg) {
+        return call Duplicate.isNew(getHeader(msg)->src, getHeader(msg)->dest,
+                                    (getHeader(msg)->token) & TOKEN_ACK_MASK);
+    }
+    
+    void rememberMsg(message_t* msg) {
+        call Duplicate.remember(getHeader(msg)->src, getHeader(msg)->dest,
+                                (getHeader(msg)->token) & TOKEN_ACK_MASK);
+    }
+    
+    void checkSend() {
+        if((txBufPtr != NULL) && (macState == RX) && (!call Timer.isRunning())) {
+            macState = CCA;
+            checkCounter = 0;
+            requestAdc();
+            call Timer.start(DATA_DETECT_TIME);
+            sdDebug(170);
+        }
+        else {
+            sdDebug(171);
+            post ReleaseAdcTask();
+        }
+    }
+    
+    bool needsAckRx(message_t* msg) {
+        bool rVal = FALSE;
+        uint8_t token;
+        if(getHeader(msg)->dest < AM_BROADCAST_ADDR) {
+            token = getHeader(msg)->token;
+            if(isFlagSet(&token, ACK_REQUESTED)) rVal = TRUE;
+        }
+        return rVal;
+    }
+
+    bool needsAckTx(message_t* msg) {
+        bool rVal = FALSE;
+        if(getHeader(msg)->dest < AM_BROADCAST_ADDR) {
+            if((getMetadata(msg)->ack == ACK_REQUESTED) || (getMetadata(msg)->ack != NO_ACK_REQUESTED)) {
+                rVal = TRUE;
+            }
+        }
+        return rVal;
+    }
+
+    void prepareAck(message_t* msg) {
+        uint8_t rToken = getHeader(msg)->token & TOKEN_ACK_MASK;
+        setFlag(&rToken, TOKEN_ACK_FLAG);
+        getHeader(&ackMsg)->token = rToken;
+        getHeader(&ackMsg)->src = call amAddress();
+        getHeader(&ackMsg)->dest = getHeader(msg)->src;
+        getHeader(&ackMsg)->type = getHeader(msg)->type;
+    }
+
+    bool msgIsForMe(message_t* msg) {
+        if(getHeader(msg)->dest == AM_BROADCAST_ADDR) return TRUE;
+        if(getHeader(msg)->dest == call amAddress()) return TRUE;
+        return FALSE;
+    }
+
+    bool ackIsForMe(message_t* msg) {
+        uint8_t localToken = seqNo;
+        setFlag(&localToken, TOKEN_ACK_FLAG);
+        if((getHeader(msg)->dest == call amAddress()) && (localToken == getHeader(msg)->token)) return TRUE;
+        return FALSE;
+    }
+    
+    bool isControl(message_t* m) {
+        uint8_t token = getHeader(m)->token;
+        return isFlagSet(&token, TOKEN_ACK_FLAG);
+    }
+    
+    /****************  SplitControl  *****************/
+
+    task void StartDoneTask() {
+        atomic {
+            macState = RX;
+            call UartPhyControl.setNumPreambles(MIN_PREAMBLE_BYTES);
+        }
+        post ReleaseAdcTask();
+        signal SplitControl.startDone(SUCCESS);
+    }
+
+    command error_t SplitControl.start() {
+        call CcaStdControl.start();
+        atomic {
+            macState = INIT;
+            
+            setRxMode();
+            sdDebug(1);
+        }
+        return SUCCESS;
+    }
+
+    task void StopDone() {
+        atomic {
+            if (macState != RX) {
+                post StopDone();
+                sdDebug(2);
+            } else {
+                sdDebug(3);
+                call Timer.stop();
+                txBufPtr = NULL;
+                macState = INIT;
+                shortRetryCounter = 0;
+                longRetryCounter = 0;
+                flags = 0;
+                signal SplitControl.stopDone(SUCCESS); 
+            }
+        }
+    }
+    
+    command error_t SplitControl.stop() {
+        call CcaStdControl.stop();
+        sdDebug(4);
+        post StopDone();
+        return SUCCESS;
+    }
+    
+    /****** Packet interface ********************/
+    command void Packet.clear(message_t* msg) {
+        call SubPacket.clear(msg);
+    }
+    
+    command uint8_t Packet.payloadLength(message_t* msg) {
+        return call SubPacket.payloadLength(msg);
+    }
+    
+    command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+        call SubPacket.setPayloadLength(msg,len);
+    }
+    
+    command uint8_t Packet.maxPayloadLength() {
+        return call SubPacket.maxPayloadLength();
+    }
+    
+    command void* Packet.getPayload(message_t* msg, uint8_t len) {
+        return call SubPacket.getPayload(msg, len);
+    }
+   
+    /****** Radio(Mode) events *************************/
+    async event void RadioModes.RssiStable() {
+        atomic  {
+            setFlag(&flags, RSSI_STABLE);
+            if(macState == INIT) {
+                sdDebug(11);
+                if(call RssiAdcResource.isOwner()) {
+                    call ChannelMonitorControl.updateNoiseFloor();
+                }
+            }
+            else {
+                sdDebug(12);
+            }
+        }
+    }
+
+    async event void RadioModes.RxModeDone() {
+        post postponeReRx();
+        atomic {
+            if(macState == SW_RX) {
+                sdDebug(21);
+                macState = RX;
+                
+                if(isFlagSet(&flags, RESUME_BACKOFF)) {
+                    clearFlag(&flags, RESUME_BACKOFF);
+                    call Timer.start(restLaufzeit);
+                } else {
+                    call Timer.start(backoff(longRetryCounter));
+                }
+            }
+            else if(macState == SW_RX_ACK) {
+                sdDebug(22);
+                macState = RX_ACK;
+            }
+            else if(macState == INIT) {
+                sdDebug(24);
+            }
+            else {
+                sdDebug(25);
+            }
+        }
+    }
+
+    async event void RadioModes.TxModeDone() {
+        post postponeReRx();
+        atomic {
+            if(macState == SW_TX) {
+                sdDebug(30);
+                if(txBufPtr) {
+                    macState = TX;
+                    if(call PacketSend.send(txBufPtr, txLen) == SUCCESS) {
+                        sdDebug(31);
+                    } else {
+                        sdDebug(32);
+                    }
+                }
+            }
+            else if(macState == SW_TX_ACK) {
+                macState = TX_ACK;
+                
+                if(call PacketSend.send(&ackMsg, 0) == SUCCESS) {
+                    sdDebug(53);
+                } else {
+                    sdDebug(54);
+                }
+            }
+            else {
+                sdDebug(33);
+            }
+        }
+    }
+
+    /****** MacSend events *************************/    
+    async command error_t MacSend.send(message_t* msg, uint8_t len) {
+        error_t err = SUCCESS;
+        atomic {
+            if((shortRetryCounter == 0) && (txBufPtr == NULL) && (macState != INIT)) { 
+              sdDebug(40);
+                shortRetryCounter = 1;
+                longRetryCounter = 1;
+                txBufPtr = msg;
+                txLen = len;
+                sdDebug(10);
+                sdDebug(len);
+                seqNo++;
+                if(seqNo >= TOKEN_ACK_FLAG) seqNo = 1;
+                getHeader(msg)->token = seqNo;
+                if(needsAckTx(msg)) getHeader(msg)->token |= ACK_REQUESTED;
+                if(macState != RX_P) checkSend();
+            }
+            else {
+                sdDebug(41);
+                err = EBUSY;
+            }
+        }
+        return err;
+    }
+
+    async command error_t MacSend.cancel(message_t* msg) {
+        error_t err = SUCCESS;
+        if((shortRetryCounter != 0) && (txBufPtr == msg) &&
+           (macState != TX) && (macState != RX_ACK) && (macState != SW_RX_ACK)) {
+            sdDebug(50);
+            shortRetryCounter = 0;
+            txBufPtr = NULL;
+            txLen = 0;
+            signal MacSend.sendDone(msg, ECANCEL);
+        }
+        else {
+            sdDebug(51);
+            err = FAIL;
+        }
+        return err;
+    }
+    
+    /****** PacketSerializer events **********************/
+    async event void PacketReceive.receiveDetected() {
+        rssiValue = INVALID_SNR;
+        if(macState <= RX_ACK) {
+            sdDebug(60);
+            interruptBackoffTimer();
+            if(macState == CCA) computeBackoff();
+        }
+        if(macState <= RX) {
+            sdDebug(61);
+            macState = RX_P;
+            
+            requestAdc();
+        }
+        else if(macState <= RX_ACK) {
+            sdDebug(62);
+            macState = RX_ACK_P;
+            
+        }
+        else if(macState == INIT) {
+            sdDebug(63);
+        }
+        else {
+          post ReleaseAdcTask();  
+          sdDebug(64);
+        } 
+    }
+    
+    async event message_t* PacketReceive.receiveDone(message_t* msg, void* payload, uint8_t len, error_t error) {
+        message_t* m = msg;
+        bool isCnt;
+        macState_t action = RX;
+        if(macState == RX_P) {
+            if(error == SUCCESS) {
+                sdDebug(82);
+                isCnt = isControl(msg);
+                if(msgIsForMe(msg)) {
+                    if(!isCnt) {
+                        storeStrength(msg);
+                        if(isNewMsg(m)) {
+                            m = signal MacReceive.receiveDone(msg);
+                            rememberMsg(m);   
+                        }
+                        if(needsAckRx(msg)) {
+                            sdDebug(87);
+                            action = CCA_ACK;
+                        } else {
+                            sdDebug(88);
+                        }
+                    }
+                    else {
+                        sdDebug(89);
+                    }
+                }
+                else {
+                    sdDebug(90);
+                }
+            }
+            else {
+                sdDebug(91);
+            }
+        }
+        else if(macState == RX_ACK_P) {
+            if(error == SUCCESS) {
+                if(ackIsForMe(msg)) {
+                    sdDebug(92);
+                    (getMetadata(txBufPtr))->ack = WAS_ACKED;
+                    signalSendDone(SUCCESS);
+                }
+                else {
+                    sdDebug(93);
+                    updateLongRetryCounters();
+                }
+            }
+            else {
+                if(call Timer.isRunning()) {
+                    sdDebug(94);
+                    action = RX_ACK;
+                }
+                else {
+                    sdDebug(95);
+                    if(needsAckTx(txBufPtr)) {
+                        updateLongRetryCounters();
+                    }
+                    else {
+                        signalSendDone(SUCCESS);
+                    }
+                }
+            }
+        }
+        else if(macState == INIT) {
+            action = INIT;
+        }
+        if(action == CCA_ACK) {
+            prepareAck(msg);
+            macState = CCA_ACK;
+            
+            call Timer.start(RX_SETUP_TIME - TX_SETUP_TIME + ADDED_DELAY);
+        }
+        else if(action == RX_ACK) {
+            macState = RX_ACK;
+            
+        }
+        else if(action == RX) {
+            macState = RX;
+            
+            if(isFlagSet(&flags, RESUME_BACKOFF)) {
+                clearFlag(&flags, RESUME_BACKOFF);
+                call Timer.start(restLaufzeit);
+            }
+            else {
+                call Timer.start(backoff(longRetryCounter));
+            }
+        }
+        else if(action == TX) {
+            macState = SW_TX;
+            
+            setTxMode();
+        }
+        else if(action == INIT) {
+            
+        }
+        else {
+            sdDebug(94);
+        }
+        post ReleaseAdcTask();
+        return m;        
+    }
+
+    async event void PacketSend.sendDone(message_t* msg, error_t error) {
+        if(macState == TX) {
+            if(needsAckTx(msg)) {
+                sdDebug(97);
+                macState = SW_RX_ACK;
+                
+                call Timer.start(RX_ACK_TIMEOUT);
+            } else {
+                sdDebug(99);
+                signalSendDone(error);
+                macState = SW_RX;
+                
+            }
+            setRxMode();
+        }
+        else if(macState == TX_ACK) {
+            macState = SW_RX;
+            
+            setRxMode();
+        }
+        post ReleaseAdcTask();
+    }
+       
+    
+    /****** Timer ******************************/
+    void checkOnBusy() {
+        if(macState == CCA) {
+            computeBackoff();
+            macState = RX;
+            requestAdc();
+            sdDebug(150);
+            
+            if(!call Timer.isRunning()) call Timer.start(TX_GAP_TIME >> 1);
+        } else if(macState == RX) {
+            if(!call Timer.isRunning()) call Timer.start(TX_GAP_TIME + backoff(0));
+        }
+    }
+
+    void checkOnIdle()  {
+        if(macState == RX) {
+            checkSend();
+        }
+        else if(macState == CCA) {
+            checkCounter++;
+            if(checkCounter < 3) {
+                sdDebug(158);                
+                call Timer.start((TX_GAP_TIME + backoff(0))>>1);
+                requestAdc();
+            }
+            else {
+                call Timer.stop();
+                sdDebug(159);
+                macState = SW_TX;
+                
+                setTxMode();
+            }
+        }
+    }
+    
+    async event void Timer.fired() {
+        sdDebug(100);
+        if(macState == CCA) {
+            if((!call RssiAdcResource.isOwner()) || (call ChannelMonitor.start() != SUCCESS)) {
+                if(call UartPhyControl.isBusy()) {
+                    sdDebug(101);
+                    checkOnBusy();
+                }
+                else {
+                    sdDebug(102);
+                    checkOnIdle();
+                }
+            } else {
+              setFlag(&flags, CCA_PENDING);
+            }
+        }
+        else if(macState == RX_ACK) {
+            if(needsAckTx(txBufPtr)) {
+                sdDebug(103);
+                updateLongRetryCounters();
+                macState = RX;
+                call Timer.start(backoff(longRetryCounter));
+            }
+            else {
+                sdDebug(104);
+            }
+        }
+        else if(macState == CCA_ACK) {
+            sdDebug(160);
+            macState = SW_TX_ACK;
+            
+            setTxMode();
+        }
+        else if((macState == RX_ACK_P) || (macState == RX_P)) {
+            sdDebug(108);
+        }
+        else if(macState == INIT) {
+            sdDebug(109);
+            post StartDoneTask();
+        }
+        else {
+            sdDebug(110);
+            checkSend();
+        }
+    }
+    
+    /****** ChannelMonitor events *********************/
+
+    async event void ChannelMonitor.channelBusy() {
+      clearFlag(&flags, CCA_PENDING);  
+      sdDebug(120);
+        checkOnBusy();
+    }
+
+    async event void ChannelMonitor.channelIdle() {
+      clearFlag(&flags, CCA_PENDING);  
+      sdDebug(121);
+        checkOnIdle();
+    }
+
+
+    /****** ChannelMonitorControl events **************/
+    
+    event void ChannelMonitorControl.updateNoiseFloorDone() {
+        if(macState == INIT) {
+            sdDebug(122);
+            post StartDoneTask();
+        } else {
+            sdDebug(124);
+        }
+    }
+
+    /***** ChannelMonitorData events ******************/
+    
+    async event void ChannelMonitorData.getSnrDone(int16_t data) {
+        atomic if((macState == RX_P) || (macState == RX_ACK_P)) rssiValue = data;
+        post ReleaseAdcTask();  
+    }
+    
+    /***** unused Radio Modes events **************************/
+    
+    async event void RadioModes.TimerModeDone() {}
+
+    async event void RadioModes.SleepModeDone() {
+        atomic setRxMode();
+    }
+    
+    async event void RadioModes.SelfPollingModeDone() {}
+    async event void RadioModes.PWDDDInterrupt() {}
+
+    event void ReRxTimer.fired() {
+        atomic {
+            if((macState == RX) && (call RadioModes.SleepMode() == SUCCESS)) {
+                // ok 
+            }
+            else {
+                post postponeReRx();
+            }
+        }
+    }
+    
+    /***** abused TimeStamping events **************************/
+    async event void RadioTimeStamping.receivedSFD( uint16_t time ) {
+        if(call RssiAdcResource.isOwner()) call ChannelMonitorData.getSnr();
+        if(macState == RX_P) {
+            rxTime = call LocalTime32kHz.get();
+            call ChannelMonitor.rxSuccess();
+        }
+    }
+    
+    async event void RadioTimeStamping.transmittedSFD( uint16_t time, message_t* p_msg ) {
+        if((macState == TX) && (p_msg == txBufPtr)) {
+            // to do
+        }
+    }
+
+    /***** Rssi Resource events ******************/
+    event void RssiAdcResource.granted() {
+        macState_t ms;
+        atomic ms = macState;
+        if((ms == INIT) && isFlagSet(&flags, RSSI_STABLE)) {
+            sdDebug(145);
+            call ChannelMonitorControl.updateNoiseFloor();            
+        }
+        else {
+            sdDebug(146);
+            call RssiAdcResource.release();
+        }
+    }
+    
+    /***** RadioData Resource events **************/
+    async event void RadioResourceRequested.requested() {
+      atomic {
+        /* This gives other devices the chance to get the Resource
+           because RxMode implies a new arbitration round.  */
+        if (macState == RX) setRxMode();
+      }
+    }
+    
+    // we don't care about urgent Resource requestes
+    async event void RadioResourceRequested.immediateRequested() {}
+}
+
+
diff --git a/tos/chips/tda5250/mac/Duplicate.h b/tos/chips/tda5250/mac/Duplicate.h
new file mode 100644
index 00000000..ec2e9d98
--- /dev/null
+++ b/tos/chips/tda5250/mac/Duplicate.h
@@ -0,0 +1,50 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * constants and definitions for duplicate detector
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+
+#ifndef DUPLICATE_H
+#define DUPLICATE_H
+
+typedef struct known_t {
+    am_addr_t src;
+    am_addr_t dest;
+    uint8_t seqno;
+    uint8_t age;
+} known_t;
+
+enum {
+    TABLE_ENTRIES=16,
+    MAX_AGE=0xff,
+    AGE_INTERVALL = 1024, // every second increase the age of the messages
+};
+
+#endif
diff --git a/tos/chips/tda5250/mac/Duplicate.nc b/tos/chips/tda5250/mac/Duplicate.nc
new file mode 100644
index 00000000..0802d2ef
--- /dev/null
+++ b/tos/chips/tda5250/mac/Duplicate.nc
@@ -0,0 +1,43 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * Keep information for the MAC protocols to suppress duplicates.
+ * @author Andreas Koepke (koepke at tkn.tu-berlin.de)
+ */
+
+interface Duplicate {
+    /** check whether this message is a new message, does not store anything */
+    async command bool isNew(am_addr_t src, am_addr_t dest, uint8_t seqno);
+
+    /** remember the fingerprint of this message, stores/updates the information */
+    async command void remember(am_addr_t src, am_addr_t dest, uint8_t seqno);
+}
+
diff --git a/tos/chips/tda5250/mac/DuplicateC.nc b/tos/chips/tda5250/mac/DuplicateC.nc
new file mode 100644
index 00000000..64bc4199
--- /dev/null
+++ b/tos/chips/tda5250/mac/DuplicateC.nc
@@ -0,0 +1,56 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Helper component for MAC protocols to suppress duplicates
+ * To do: turn it into a generic?
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+
+#include "Duplicate.h"
+
+configuration DuplicateC {
+  provides {
+      interface Duplicate;
+  }
+}
+implementation {
+    components MainC;
+    components new TimerMilliC() as Timer;
+    components DuplicateP;
+
+    Duplicate = DuplicateP;
+    DuplicateP.Timer -> Timer;        // make information soft state
+    MainC.SoftwareInit -> DuplicateP; 
+
+#ifdef DUPLICATE_DEBUG
+    components new SerialDebugC() as SD;
+    DuplicateP.SerialDebug -> SD;
+#endif
+
+}
diff --git a/tos/chips/tda5250/mac/DuplicateP.nc b/tos/chips/tda5250/mac/DuplicateP.nc
new file mode 100644
index 00000000..7027d257
--- /dev/null
+++ b/tos/chips/tda5250/mac/DuplicateP.nc
@@ -0,0 +1,146 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Helper component for MAC protocols to suppress duplicates
+ * To do: turn it into a generic?
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+
+module DuplicateP {
+  provides {
+      interface Duplicate;
+      interface Init;
+  }
+  uses {
+      interface Timer<TMilli> as Timer;
+#ifdef DUPLICATE_DEBUG
+      interface SerialDebug;
+#endif
+  }
+}
+implementation {
+    known_t knownTable[TABLE_ENTRIES];
+    
+#ifdef DUPLICATE_DEBUG
+    void sdDebug(uint16_t p) {
+        call SerialDebug.putPlace(p);
+    }
+    known_t dupOldest;
+    unsigned last;
+    task void dump() {
+        sdDebug(3000 + last);
+        sdDebug(dupOldest.src);
+        sdDebug(dupOldest.dest);
+        sdDebug(dupOldest.seqno);
+        sdDebug(dupOldest.age);
+        sdDebug(4000);
+        sdDebug(knownTable[last].src);
+        sdDebug(knownTable[last].dest);
+        sdDebug(knownTable[last].seqno);
+        sdDebug(knownTable[last].age);
+        sdDebug(5000);
+    }
+#else
+    void sdDebug(uint16_t p) {};
+#endif
+    
+    /** helper functions */
+    task void ageMsgsTask() {
+        unsigned i;
+        for(i = 0; i < TABLE_ENTRIES; i++) {
+            atomic {
+                if(knownTable[i].age < MAX_AGE) ++knownTable[i].age;
+            }
+        }
+    }
+    
+    unsigned findOldest() {
+        unsigned i;
+        unsigned oldIndex = 0;
+        unsigned age = knownTable[oldIndex].age;
+        for(i = 1; i < TABLE_ENTRIES; i++) {
+            if(age < knownTable[i].age) {
+                oldIndex = i;
+                age = knownTable[i].age;
+            }
+        }
+        return oldIndex;
+    }
+
+    /*** duplicate interface */
+    async command bool Duplicate.isNew(am_addr_t src, am_addr_t dest, uint8_t seqno) {
+        bool rVal = TRUE;
+        unsigned i;
+        for(i=0; i < TABLE_ENTRIES; i++) {
+            if((knownTable[i].age < MAX_AGE) &&
+               (src == knownTable[i].src) &&
+               (dest == knownTable[i].dest) &&
+               (seqno == knownTable[i].seqno)) {
+                knownTable[i].age = 0;
+                rVal = FALSE;
+                break;
+            }
+        }
+        sdDebug(100 + rVal);
+        sdDebug(200 + i);
+        return rVal;
+    }
+    
+    async command void Duplicate.remember(am_addr_t src, am_addr_t dest, uint8_t seqno) {
+        unsigned oldest = findOldest();
+#ifdef DUPLICATE_DEBUG
+        dupOldest = knownTable[oldest];
+        last = oldest;
+        post dump();
+#endif
+        knownTable[oldest].src = src;
+        knownTable[oldest].dest = dest;
+        knownTable[oldest].seqno = seqno;
+        knownTable[oldest].age = 0;
+        post ageMsgsTask();
+    }
+
+    /** helper interfaces */
+    event void Timer.fired() {
+        call Timer.startOneShot(AGE_INTERVALL);
+        post ageMsgsTask();
+    }
+
+    command error_t Init.init(){
+        uint8_t i;
+        for(i = 0; i < TABLE_ENTRIES; i++) {
+            atomic {
+                knownTable[i].age = MAX_AGE;
+            }
+        }
+        call Timer.startOneShot(AGE_INTERVALL);
+        return SUCCESS;
+    }
+}
+
diff --git a/tos/chips/tda5250/mac/RedMac.h b/tos/chips/tda5250/mac/RedMac.h
new file mode 100644
index 00000000..9a614439
--- /dev/null
+++ b/tos/chips/tda5250/mac/RedMac.h
@@ -0,0 +1,46 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * packet headers for RedMac primitive messages
+ * - Author --------------------------------------------------------------
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#ifndef RED_MAC_H
+#define RED_MAC_H
+
+typedef nx_struct red_mac_header_t {
+    nx_uint8_t    repetitionCounter;
+    nx_uint32_t   time; // processing delay of message
+} red_mac_header_t;
+
+#define RELIABLE_MCAST_MIN_ADDR 0xE000
+
+#endif
diff --git a/tos/chips/tda5250/mac/RedMacC.nc b/tos/chips/tda5250/mac/RedMacC.nc
new file mode 100644
index 00000000..483cd16d
--- /dev/null
+++ b/tos/chips/tda5250/mac/RedMacC.nc
@@ -0,0 +1,131 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * low power nonpersistent CSMA MAC, rendez-vous via redundantly sent packets
+ * - Author --------------------------------------------------------------
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+// #define REDMAC_DEBUG
+
+#ifdef REDMAC_PERFORMANCE
+#include <PerformanceMsgs.h>
+#endif
+
+configuration RedMacC {
+  provides {
+    interface SplitControl;
+    interface MacSend;
+    interface MacReceive;
+    interface Packet;
+    interface Sleeptime;
+    interface ChannelCongestion;
+#ifdef MAC_EVAL
+    interface MacEval;
+#endif
+  }
+  uses {
+    interface PhySend as PacketSend;
+    interface PhyReceive as PacketReceive;
+    interface Packet as SubPacket;
+    interface Tda5250Control;  
+    interface UartPhyControl;
+    interface RadioTimeStamping;
+  }
+}
+implementation {
+    components  MainC,
+        RedMacP,
+        RssiFixedThresholdCMC as Cca,
+        new Alarm32khz16C() as Timer,
+        new Alarm32khz16C() as SampleTimer,
+        RandomLfsrC, LocalTimeC, DuplicateC, TimeDiffC;
+    
+    components ActiveMessageAddressC;
+    RedMacP.amAddress -> ActiveMessageAddressC;
+
+    MainC.SoftwareInit -> RedMacP;
+              
+    SplitControl = RedMacP;
+    MacSend = RedMacP;
+    MacReceive = RedMacP;
+    Tda5250Control = RedMacP;
+    UartPhyControl = RedMacP;
+    RadioTimeStamping = RedMacP;
+    ChannelCongestion = RedMacP;
+    
+    RedMacP = PacketSend;
+    RedMacP = PacketReceive;
+    RedMacP = SubPacket;
+    RedMacP = Packet;
+    RedMacP = Sleeptime;
+    
+    RedMacP.CcaStdControl -> Cca.StdControl;
+    RedMacP.ChannelMonitor -> Cca.ChannelMonitor;
+    RedMacP.ChannelMonitorData -> Cca.ChannelMonitorData;
+    RedMacP.ChannelMonitorControl -> Cca.ChannelMonitorControl;
+    RedMacP.RssiAdcResource -> Cca.RssiAdcResource;
+    
+    MainC.SoftwareInit -> RandomLfsrC;
+    RedMacP.Random -> RandomLfsrC;
+
+    RedMacP.Timer -> Timer;
+    RedMacP.SampleTimer -> SampleTimer;
+    RedMacP.LocalTime32kHz -> LocalTimeC;
+
+    RedMacP.Duplicate -> DuplicateC;
+    RedMacP.TimeDiff16 -> TimeDiffC;
+    RedMacP.TimeDiff32 -> TimeDiffC;
+    
+/*    components PlatformLedsC;
+    RedMacP.Led0 -> PlatformLedsC.Led0;
+    RedMacP.Led1 -> PlatformLedsC.Led1;
+    RedMacP.Led2 -> PlatformLedsC.Led2;
+    RedMacP.Led3 -> PlatformLedsC.Led3;
+*/
+#ifdef MAC_EVAL
+    MacEval = RedMacP;
+#endif
+#ifdef REDMAC_DEBUG
+    components new SerialDebugC() as SD;
+    RedMacP.SerialDebug -> SD;
+#endif
+
+#ifdef REDMAC_PERFORMANCE
+    components new PerformanceC() as Perf;
+    RedMacP.Performance -> Perf;
+#endif
+
+#ifdef DELTATIMEDEBUG
+    components DeltaTraceC;
+    RedMacP.DeltaTrace -> DeltaTraceC;
+#endif
+}
+
diff --git a/tos/chips/tda5250/mac/RedMacP.nc b/tos/chips/tda5250/mac/RedMacP.nc
new file mode 100644
index 00000000..d0de4d0e
--- /dev/null
+++ b/tos/chips/tda5250/mac/RedMacP.nc
@@ -0,0 +1,1353 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * low power nonpersistent CSMA MAC, rendez-vous via redundantly sent packets
+ * - Author --------------------------------------------------------------
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+
+#include "radiopacketfunctions.h"
+#include "flagfunctions.h"
+#include "PacketAck.h"
+#include "RedMac.h"
+
+#ifdef DELTATIMEDEBUG
+#include "DeltaTrace.h"
+#endif
+
+module RedMacP {
+    provides {
+        interface Init;
+        interface SplitControl;
+        interface MacSend;
+        interface MacReceive;
+        interface Packet;
+        interface Sleeptime;
+        interface Teamgeist;
+        interface ChannelCongestion;
+#ifdef MAC_EVAL
+        interface MacEval;
+#endif
+    }
+    uses {
+        interface StdControl as CcaStdControl;
+        interface PhySend as PacketSend;
+        interface PhyReceive as PacketReceive;
+        interface RadioTimeStamping;
+        
+        interface Tda5250Control as RadioModes;  
+
+        interface UartPhyControl;
+      
+        interface ChannelMonitor;
+        interface ChannelMonitorControl;  
+        interface ChannelMonitorData;
+        interface Resource as RssiAdcResource;
+
+        interface Random;
+
+        interface Packet as SubPacket;
+        
+        interface Alarm<T32khz, uint16_t> as Timer;
+        interface Alarm<T32khz, uint16_t> as SampleTimer;
+        interface LocalTime<T32khz> as LocalTime32kHz;
+
+        interface Duplicate;
+        interface TimeDiff16;
+        interface TimeDiff32;
+        
+        async command am_addr_t amAddress();
+/*
+        interface GeneralIO as Led0;
+        interface GeneralIO as Led1;
+        interface GeneralIO as Led2;
+        interface GeneralIO as Led3;        
+*/  
+#ifdef REDMAC_DEBUG
+        interface SerialDebug;
+#endif
+#ifdef REDMAC_PERFORMANCE
+        interface Performance;
+#endif
+#ifdef DELTATIMEDEBUG
+        interface DeltaTrace;
+#endif
+    }
+}
+implementation
+{
+    /****** MAC State machine *********************************/
+    typedef enum {
+        RX,
+        RX_ACK,
+        CCA,
+        CCA_ACK,
+        RX_P,
+        RX_ACK_P,
+        SLEEP,
+        TX,
+        TX_ACK,
+        INIT,
+        STOP
+    } macState_t;
+
+    macState_t macState;
+
+    /****** debug vars & defs & functions  ***********************/
+#ifdef REDMAC_DEBUG
+    void sdDebug(uint16_t p) {
+        call SerialDebug.putPlace(p);
+    }
+    uint8_t repCounter;
+#else
+    void sdDebug(uint16_t p) {};
+#endif
+    
+#ifdef REDMAC_PERFORMANCE
+     PfmTxMsg_t txStat;
+     PfmRxMsg_t rxStat;
+#endif
+
+    /**************** Module Global Constants  *****************/
+    enum {
+        
+        BYTE_TIME=ENCODED_32KHZ_BYTE_TIME,           // phy encoded
+        PREAMBLE_BYTE_TIME=TDA5250_32KHZ_BYTE_TIME,  // no coding
+        PHY_HEADER_TIME=6*PREAMBLE_BYTE_TIME,        // 6 Phy Preamble
+        TIME_CORRECTION=TDA5250_32KHZ_BYTE_TIME+2,   // difference between txSFD and rxSFD
+
+        SUB_HEADER_TIME=PHY_HEADER_TIME + sizeof(message_header_t)*BYTE_TIME,
+        SUB_FOOTER_TIME=2*BYTE_TIME, // 2 bytes crc 
+        // DEFAULT_SLEEP_TIME=1625,
+#ifndef DEFAULT_SLEEP_TIME
+        DEFAULT_SLEEP_TIME=2048,
+        // DEFAULT_SLEEP_TIME=4096,
+        // DEFAULT_SLEEP_TIME=8192,
+        // DEFAULT_SLEEP_TIME=16384,
+        // DEFAULT_SLEEP_TIME=32768U,
+        // DEFAULT_SLEEP_TIME=65535U,
+#endif
+        DATA_DETECT_TIME=17,
+        RX_SETUP_TIME=102,    // time to set up receiver
+        TX_SETUP_TIME=58,     // time to set up transmitter
+        ADDED_DELAY = 30,
+        RX_ACK_TIMEOUT = RX_SETUP_TIME + PHY_HEADER_TIME + ADDED_DELAY + 30,
+        TX_GAP_TIME = RX_ACK_TIMEOUT + TX_SETUP_TIME + 33,
+        // the duration of a send ACK
+        ACK_DURATION = SUB_HEADER_TIME + SUB_FOOTER_TIME,
+        NAV_FACTOR = 4,
+#ifndef MAC_EVAL
+        MAX_SHORT_RETRY=9,
+        MAX_LONG_RETRY=3,
+        ADD_NAV = 2,
+        INCREASE_BACKOFF = TRUE,
+#endif
+        TOKEN_ACK_FLAG = 64,
+        TOKEN_ACK_MASK = 0x3f,
+        INVALID_SNR = 0xffff,
+        // PREAMBLE_LONG = 5,
+        // PREAMBLE_SHORT = 2,
+        // reduced minimal backoff
+        ZERO_BACKOFF_MASK = 0xff
+    };
+
+#ifdef MAC_EVAL
+    uint8_t MAX_SHORT_RETRY = 9;
+    uint8_t MAX_LONG_RETRY = 3;
+    uint8_t ADD_NAV = 4;
+    bool INCREASE_BACKOFF = TRUE;
+#endif
+#ifdef DELTATIMEDEBUG
+    DeltaTrace_t dTrace;
+#endif    
+    /**************** Module Global Variables  *****************/
+    /* flags */
+    typedef enum {
+        SWITCHING = 1,
+        RSSI_STABLE = 2,
+        UNHANDLED_PACKET = 4,
+        MESSAGE_PREPARED = 8,
+        RESUME_BACKOFF = 16,
+        CANCEL_SEND = 32,
+        ACTION_DETECTED = 64,
+        TEAMGEIST_ACTIVE=128
+    } flags_t;
+
+    uint8_t flags = 0;
+    uint8_t checkCounter = 0;
+    uint8_t shortRetryCounter = 0;
+    uint8_t longRetryCounter = 0;
+    uint16_t networkSleeptime = DEFAULT_SLEEP_TIME;
+    uint16_t localSleeptime = DEFAULT_SLEEP_TIME;
+    uint16_t rssiValue = 0;
+    uint32_t restLaufzeit = 0;
+    
+    uint32_t rxTime = 0;
+
+    am_id_t teamgeistType = 0;
+
+    uint8_t congestionLevel = 0;
+    
+    message_t *txBufPtr = NULL;
+    uint16_t txLen = 0;
+    red_mac_header_t *txMacHdr = NULL;
+    uint16_t seqNo;
+    message_t ackMsg;
+
+    uint16_t MIN_BACKOFF_MASK;
+
+    /****** Secure switching of radio modes ***/
+    void interruptBackoffTimer();
+    
+    task void SetRxModeTask();
+    task void SetTxModeTask();
+    task void SetSleepModeTask();
+
+    task void ReleaseAdcTask() {
+        bool release = FALSE;
+        atomic {
+            if((macState >= SLEEP) &&  call RssiAdcResource.isOwner())  {
+                release = TRUE;
+            }
+        }
+        if(release) call RssiAdcResource.release(); 
+    }
+
+    void requestAdc() {
+        if(!call RssiAdcResource.isOwner()) {
+            call RssiAdcResource.immediateRequest();
+        }
+    }
+
+    void setRxMode() {
+        setFlag(&flags, SWITCHING);
+        clearFlag(&flags, RSSI_STABLE);
+        // sdDebug(10);
+        checkCounter = 0;
+        rssiValue = INVALID_SNR;
+        if(call RadioModes.RxMode() == FAIL) {
+            post SetRxModeTask();
+        }
+        else {
+#ifdef REDMAC_PERFORMANCE
+            call Performance.macRxMode();
+#endif
+        }
+        requestAdc();
+    }
+    
+    task void SetRxModeTask() {
+        atomic {
+            if(isFlagSet(&flags, SWITCHING) && ((macState <= CCA) || (macState == INIT))) setRxMode();
+        }
+    }
+
+    void setSleepMode() {
+        // sdDebug(20);
+        clearFlag(&flags, RSSI_STABLE);
+        post ReleaseAdcTask();
+        setFlag(&flags, SWITCHING);
+        if(call RadioModes.SleepMode() == FAIL) {
+            post SetSleepModeTask();
+        }
+        else {
+#ifdef REDMAC_PERFORMANCE
+            call Performance.macSleepMode();
+#endif
+        }
+    }
+    
+    task void SetSleepModeTask() {
+        atomic if(isFlagSet(&flags, SWITCHING) && ((macState == SLEEP) || (macState == STOP))) setSleepMode();
+    }
+
+
+    void setTxMode() {
+        post ReleaseAdcTask();
+        // sdDebug(30);
+        clearFlag(&flags, RSSI_STABLE);
+        setFlag(&flags, SWITCHING);
+        if(call RadioModes.TxMode() == FAIL) {
+            post SetTxModeTask();
+        }
+        else {
+#ifdef REDMAC_PERFORMANCE
+            call Performance.macTxMode();
+#endif
+        }
+    }
+
+    task void SetTxModeTask() {
+        atomic {
+            if(isFlagSet(&flags, SWITCHING) && ((macState == TX) || (macState == TX_ACK))) setTxMode();
+        }
+    }
+
+    /**************** Helper functions ************************/    
+    void computeBackoff();
+    
+    void checkSend() {
+        if((shortRetryCounter) && (txBufPtr != NULL) && (isFlagSet(&flags, MESSAGE_PREPARED)) && 
+           (macState == SLEEP) && (!isFlagSet(&flags, RESUME_BACKOFF)) && (!call Timer.isRunning())) {
+            // sdDebug(40);
+            macState = CCA;
+            checkCounter = 0;
+            setRxMode();
+        }
+/*        else {
+            if(txBufPtr) // sdDebug(41);
+            if(shortRetryCounter) // sdDebug(42);
+            if(isFlagSet(&flags, MESSAGE_PREPARED)) // sdDebug(43);
+            if(txBufPtr) {
+                if(macState == SLEEP) // sdDebug(44);
+                if(!isFlagSet(&flags, RESUME_BACKOFF)) // sdDebug(45);
+                if(!call Timer.isRunning()) // sdDebug(46);
+            }
+        }
+*/
+    }
+
+    uint32_t backoff(uint8_t counter) {
+        uint32_t rVal = call Random.rand16() &  MIN_BACKOFF_MASK;
+        if(!INCREASE_BACKOFF) counter = 1;
+        return (rVal << counter) + ZERO_BACKOFF_MASK;
+    }
+    
+    bool needsAckTx(message_t* msg) {
+        bool rVal = FALSE;
+        if(getHeader(msg)->dest < AM_BROADCAST_ADDR) {
+            if(getMetadata(msg)->ack != NO_ACK_REQUESTED) {
+                rVal = TRUE;
+            }
+        }
+        return rVal;
+    }
+    
+    bool needsAckRx(message_t* msg, uint8_t *level) {
+        bool rVal = FALSE;
+        am_addr_t dest = getHeader(msg)->dest;
+        uint8_t token;
+        uint16_t snr = 1;
+        if(dest < AM_BROADCAST_ADDR) {
+            if(dest < RELIABLE_MCAST_MIN_ADDR) {
+                token = getHeader(msg)->token;
+                if(isFlagSet(&token, ACK_REQUESTED)) {
+                    rVal = TRUE;
+                }
+            }
+            else {
+                if(isFlagSet(&flags, TEAMGEIST_ACTIVE) &&
+                   (getHeader(msg)->type == teamgeistType)) {
+                    if(rssiValue != INVALID_SNR) snr = rssiValue;
+                    *level = 2;
+                    rVal = signal Teamgeist.needsAck(msg, getHeader(msg)->src, getHeader(msg)->dest, snr);
+                }
+            }
+        }
+        return rVal;
+    }
+
+    task void PrepareMsgTask() {
+        message_t *msg;
+        uint8_t length;
+        red_mac_header_t *macHdr;
+        uint16_t sT;
+        atomic {
+            msg = txBufPtr;
+            length = txLen;
+            sT = networkSleeptime;
+        }
+        if(msg == NULL) return;
+        macHdr = (red_mac_header_t *)call SubPacket.getPayload(msg, sizeof(red_mac_header_t));
+        macHdr->repetitionCounter = sT/(length * BYTE_TIME + SUB_HEADER_TIME + SUB_FOOTER_TIME + 
+                                        TX_GAP_TIME) + 1;
+        atomic {
+            if((longRetryCounter > 1) &&
+               isFlagSet(&flags, TEAMGEIST_ACTIVE) &&
+               (getHeader(msg)->type == teamgeistType)) {
+                getHeader(msg)->dest = signal Teamgeist.getDestination(msg, longRetryCounter - 1);
+            }
+            getHeader(msg)->token = seqNo;
+            if(needsAckTx(msg)) getHeader(msg)->token |= ACK_REQUESTED;
+            txMacHdr = macHdr;
+            setFlag(&flags, MESSAGE_PREPARED);
+            if((macState == SLEEP) && (!call Timer.isRunning()) && (!isFlagSet(&flags, RESUME_BACKOFF))) {
+                if((longRetryCounter == 1) &&
+                   (getHeader(msg)->dest != AM_BROADCAST_ADDR)) {
+                    call Timer.start((call Random.rand16() >> 3) & ZERO_BACKOFF_MASK);
+                }
+                else {
+                    sdDebug(332);
+                    sdDebug(macHdr->repetitionCounter);
+                    call Timer.start(backoff(longRetryCounter));
+                }
+            }
+#ifdef REDMAC_PERFORMANCE
+            txStat.type = getHeader(msg)->type;
+            txStat.to = getHeader(msg)->dest;
+            txStat.token = getHeader(msg)->token;
+            txStat.maxRepCounter = macHdr->repetitionCounter;
+            txStat.creationTime =  getMetadata(msg)->time;
+#endif
+            getMetadata(msg)->maxRepetitions = macHdr->repetitionCounter;
+        }
+    }
+
+    void storeStrength(message_t *m) {
+        if(rssiValue != INVALID_SNR) {
+            (getMetadata(m))->strength = rssiValue;
+        }
+        else {
+            if(call RssiAdcResource.isOwner()) {
+                (getMetadata(m))->strength = call ChannelMonitorData.readSnr();
+            }
+            else {
+                (getMetadata(m))->strength = 1;
+            }
+        }
+    }
+
+    bool prepareRepetition() {
+        bool repeat;
+        atomic {
+            if(isFlagSet(&flags, CANCEL_SEND)) {
+                repeat = txMacHdr->repetitionCounter = 0;
+            }
+            else {
+                repeat = txMacHdr->repetitionCounter;
+                txMacHdr->repetitionCounter--;
+            }
+        }
+        return repeat;
+    }
+    
+    void signalSendDone(error_t error) {
+        message_t *m;
+        error_t e = error;
+        // sdDebug(50);
+        atomic {
+            m = txBufPtr;
+            txBufPtr = NULL;
+            txLen  = 0;
+#ifdef REDMAC_PERFORMANCE
+            txStat.repCounter = txMacHdr->repetitionCounter;
+            txStat.longRetry = longRetryCounter;
+            txStat.shortRetry = shortRetryCounter;
+#endif
+            longRetryCounter = 0;
+            shortRetryCounter = 0;
+            storeStrength(m);
+            if(isFlagSet(&flags, CANCEL_SEND)) {
+                e = ECANCEL;
+            }
+            clearFlag(&flags, MESSAGE_PREPARED);
+            clearFlag(&flags, CANCEL_SEND);
+        }
+        // sdDebug(3000 + e);
+        // sdDebug(4000 + getHeader(m)->type);
+        signal MacSend.sendDone(m, e);
+#ifdef REDMAC_PERFORMANCE
+        txStat.success = e;
+        txStat.strength = getMetadata(m)->strength;
+        call Performance.macTxMsgStats(&txStat);
+#endif
+    }
+    
+    void updateRetryCounters() {
+        shortRetryCounter++;
+        if(shortRetryCounter > MAX_SHORT_RETRY) {
+            longRetryCounter++;
+            shortRetryCounter = 1;
+            if(longRetryCounter > MAX_LONG_RETRY) {
+                // sdDebug(60);
+                signalSendDone(FAIL);
+            }
+        }
+    }
+
+    void updateLongRetryCounters() {
+        atomic {
+            clearFlag(&flags, MESSAGE_PREPARED);
+            longRetryCounter++;
+            shortRetryCounter = 1;
+            if(longRetryCounter > MAX_LONG_RETRY) {
+                // sdDebug(70);
+                signalSendDone(FAIL);
+            } else {
+                post PrepareMsgTask();
+            }
+        }
+    }
+
+    bool ackIsForMe(message_t* msg) {
+        uint8_t localToken = seqNo;
+        setFlag(&localToken, TOKEN_ACK_FLAG);
+        if((getHeader(msg)->dest == call amAddress()) && (localToken == getHeader(msg)->token)) return TRUE;
+        return FALSE;
+    }
+
+    void interruptBackoffTimer() {
+        if(call Timer.isRunning()) {
+            restLaufzeit = call TimeDiff16.computeDelta(call Timer.getAlarm(), call Timer.getNow());
+            call Timer.stop();
+            if(restLaufzeit > MIN_BACKOFF_MASK << MAX_LONG_RETRY) {
+                restLaufzeit = call Random.rand16() & ZERO_BACKOFF_MASK;
+            }
+            setFlag(&flags, RESUME_BACKOFF);
+        }
+    }
+
+    void computeBackoff() {
+        if(!isFlagSet(&flags, RESUME_BACKOFF)) {
+            setFlag(&flags, RESUME_BACKOFF);
+            restLaufzeit = backoff(longRetryCounter);
+            updateRetryCounters();
+        }
+    }
+
+    bool msgIsForMe(message_t* msg) {
+        if(getHeader(msg)->dest == AM_BROADCAST_ADDR) return TRUE;
+        if(getHeader(msg)->dest == call amAddress()) return TRUE;
+        if(getHeader(msg)->dest >= RELIABLE_MCAST_MIN_ADDR) return TRUE;
+        return FALSE;
+    }
+
+    bool isControl(message_t* m) {
+        uint8_t token = getHeader(m)->token;
+        return isFlagSet(&token, TOKEN_ACK_FLAG);
+    }
+    
+    bool isNewMsg(message_t* msg) {
+        return call Duplicate.isNew(getHeader(msg)->src,
+                                    getHeader(msg)->dest,
+                                    (getHeader(msg)->token) & TOKEN_ACK_MASK);
+   }
+
+    void rememberMsg(message_t* msg) {
+        call Duplicate.remember(getHeader(msg)->src, getHeader(msg)->dest,
+                                (getHeader(msg)->token) & TOKEN_ACK_MASK);
+    }
+
+    void prepareAck(message_t* msg) {
+        uint8_t rToken = getHeader(msg)->token & TOKEN_ACK_MASK;
+        setFlag(&rToken, TOKEN_ACK_FLAG);
+        getHeader(&ackMsg)->token = rToken;
+        getHeader(&ackMsg)->src = call amAddress();
+        getHeader(&ackMsg)->dest = getHeader(msg)->src;
+        getHeader(&ackMsg)->type = getHeader(msg)->type;
+#ifdef REDMAC_DEBUG
+        repCounter = ((red_mac_header_t *)
+                      call SubPacket.getPayload(msg, sizeof(red_mac_header_t)))->repetitionCounter;
+#endif
+    }
+    
+    uint32_t calcGeneratedTime(red_mac_header_t *m) {
+        uint32_t lt = rxTime - m->time - TIME_CORRECTION;
+#ifdef DELTATIMEDEBUG
+        dTrace.now = rxTime;
+        dTrace.msgTime = lt;
+        dTrace.delta = m->time;
+        call DeltaTrace.traceRx(&dTrace);
+#endif
+        return lt;
+    }
+
+    /**************** Init ************************/
+    
+    command error_t Init.init(){
+        atomic {
+            macState = INIT;
+            seqNo = call Random.rand16() % TOKEN_ACK_FLAG;
+            for(MIN_BACKOFF_MASK = 1; MIN_BACKOFF_MASK < networkSleeptime; ) {
+                MIN_BACKOFF_MASK = (MIN_BACKOFF_MASK << 1) + 1;
+            }
+            MIN_BACKOFF_MASK >>= 2;
+        }
+#ifdef REDMAC_DEBUG
+        call SerialDebug.putShortDesc("RedMacP");
+#endif
+        return SUCCESS;
+    }
+
+    /****************  SplitControl  *****************/
+
+    task void StartDoneTask() {
+        // sdDebug(90);
+        atomic  {
+            call SampleTimer.start(localSleeptime);
+            macState = SLEEP;
+            setFlag(&flags, TEAMGEIST_ACTIVE);
+            teamgeistType = signal Teamgeist.observedAMType();
+        }
+        signal SplitControl.startDone(SUCCESS);        
+    }
+    
+    command error_t SplitControl.start() {
+        call CcaStdControl.start();
+        atomic {
+            macState = INIT;
+            setRxMode();
+            // sdDebug(100);
+        }
+        return SUCCESS;
+    }
+    
+    task void StopDoneTask() {
+        call Init.init();
+        // sdDebug(110);
+        signal SplitControl.stopDone(SUCCESS);        
+    }
+    
+    command error_t SplitControl.stop() {
+        call CcaStdControl.stop();
+        call Timer.stop();
+        call SampleTimer.stop();
+        atomic {
+            if((macState == SLEEP) && isFlagSet(&flags, SWITCHING)) {
+                macState = STOP;
+                // sdDebug(120);
+            }
+            else {
+                macState = STOP;
+                setSleepMode();
+                // sdDebug(121);
+            }
+        }
+        return SUCCESS;
+    }
+
+    /****** Packet interface ********************/
+    command void Packet.clear(message_t* msg) {
+        call SubPacket.clear(msg);
+    }
+    
+    command uint8_t Packet.payloadLength(message_t* msg) {
+        return call SubPacket.payloadLength(msg) - sizeof(red_mac_header_t);
+    }
+    
+    command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+        call SubPacket.setPayloadLength(msg,len + sizeof(red_mac_header_t));
+    }
+    
+    command uint8_t Packet.maxPayloadLength() {
+        return call SubPacket.maxPayloadLength() - sizeof(red_mac_header_t);
+    }
+    
+    command void* Packet.getPayload(message_t* msg, uint8_t len) {
+        nx_uint8_t *payload = (nx_uint8_t *)call SubPacket.getPayload(msg, len + sizeof(red_mac_header_t));
+        return (void*)(payload + sizeof(red_mac_header_t));
+    }
+    
+    /****** Radio(Mode) events *************************/
+    async event void RadioModes.RssiStable() {
+        setFlag(&flags, RSSI_STABLE);
+        if((macState == RX) || (macState == CCA)) {
+            call Timer.start(DATA_DETECT_TIME);
+            // sdDebug(130);
+        }
+        else if(macState == RX_P) {
+            // sdDebug(131);
+            if(call RssiAdcResource.isOwner()) call ChannelMonitorData.getSnr();
+        }
+        else if(macState == RX_ACK) {
+        }
+        else if(macState == RX_ACK_P) {
+        }
+        else if(macState == INIT) {
+            // sdDebug(133);
+            if(call RssiAdcResource.isOwner()) {
+                call ChannelMonitorControl.updateNoiseFloor();
+            } else {
+                call RssiAdcResource.request();
+            }
+        }
+        else if(macState == STOP) {
+            // sdDebug(134);
+        }
+        else {
+            // sdDebug(135);
+        }
+    }
+    
+    async event void RadioModes.RxModeDone() {
+        atomic {
+            clearFlag(&flags, SWITCHING);
+            if((macState == RX) || (macState == RX_ACK) || (macState == CCA) ||
+               (macState == INIT) || (macState == STOP)) {
+                // sdDebug(140);
+                if(macState != RX_ACK) requestAdc();
+            }
+            else {
+                // sdDebug(141);
+            }
+        }
+    }
+    
+    async event void RadioModes.TxModeDone() {
+        // sdDebug(150);
+        atomic {
+            clearFlag(&flags, SWITCHING);
+            if(macState == TX) {
+                setFlag(&flags, ACTION_DETECTED);
+                if(call PacketSend.send(txBufPtr, txLen) == SUCCESS) {
+                    // sdDebug(151);
+                }
+                else {
+                    // sdDebug(152);
+                }
+            }
+            else if(macState == TX_ACK) {
+                if(call PacketSend.send(&ackMsg, 0) == SUCCESS) {
+                    // sdDebug(153);
+                } else {
+                    // sdDebug(154);
+                }
+            }
+            else {
+                // sdDebug(155);
+            }
+        }
+    }
+
+    async event void RadioModes.SleepModeDone() {
+        // sdDebug(160);
+        atomic {
+            clearFlag(&flags, SWITCHING);
+            if(isFlagSet(&flags, ACTION_DETECTED)) {
+                if(congestionLevel < 5) congestionLevel++;
+            } else {
+                if(congestionLevel > 0) congestionLevel--;
+            }
+            // if(congestionLevel > 3) // sdDebug(2000 + congestionLevel);
+            if(macState == SLEEP) {
+                // sdDebug(161);
+                if(!call Timer.isRunning()) {
+                    // sdDebug(162);
+                    if(isFlagSet(&flags, RESUME_BACKOFF)) {
+                        // sdDebug(164);
+                        clearFlag(&flags, RESUME_BACKOFF);
+                        call Timer.start(restLaufzeit);
+                        restLaufzeit = 0;
+                    }
+                    else {
+                        // sdDebug(165);
+                        checkSend();
+                    }
+                }
+            }
+            else if(macState == STOP) {
+                // sdDebug(168);
+                post StopDoneTask();
+            }
+            signal ChannelCongestion.congestionEvent(congestionLevel);
+        }
+    }
+    
+    /****** MacSend events *************************/    
+    async command error_t MacSend.send(message_t* msg, uint8_t len) {
+        error_t err = SUCCESS;
+        atomic {
+            if((shortRetryCounter == 0) && (txBufPtr == NULL)) {
+                clearFlag(&flags, MESSAGE_PREPARED);
+                // sdDebug(5000 + getHeader(msg)->type);
+                shortRetryCounter = 1;
+                longRetryCounter = 1;
+                txBufPtr = msg;
+                txLen = len + sizeof(red_mac_header_t);
+                seqNo++;
+                if(seqNo >= TOKEN_ACK_FLAG) seqNo = 1;
+#ifdef REDMAC_PERFORMANCE
+                txStat.payloadLength = txLen;
+                txStat.interfaceTime = call LocalTime32kHz.get();
+#endif
+            }
+            else {
+                // sdDebug(171);
+                err = EBUSY;
+            }
+        }
+        if(err == SUCCESS) {
+            post PrepareMsgTask();
+        }
+        return err;
+    }
+
+    async command error_t MacSend.cancel(message_t* msg) {
+        error_t err = FAIL;
+        atomic {
+            if(msg == txBufPtr) {
+                // sdDebug(320);
+                setFlag(&flags, CANCEL_SEND);
+                shortRetryCounter = MAX_SHORT_RETRY + 2;
+                longRetryCounter  = MAX_LONG_RETRY + 2;
+                if(macState == SLEEP) {
+                    // sdDebug(321);
+                    signalSendDone(ECANCEL);
+                }
+                else {
+                    // sdDebug(322);
+                }
+                // sdDebug(1000 + macState);
+                err = SUCCESS;
+            }
+            else {
+                // sdDebug(323);
+                // sdDebug(1100 + macState);
+            }
+        }
+        return err;
+    }
+    
+    /****** PacketSerializer events **********************/
+    
+    async event void PacketReceive.receiveDetected() {
+        rssiValue = INVALID_SNR;
+        setFlag(&flags, ACTION_DETECTED);
+        call ChannelMonitor.rxSuccess();
+        if(macState <= CCA_ACK) {
+            if(macState == CCA) {
+                computeBackoff();
+#ifdef REDMAC_PERFORMANCE
+                call Performance.macDetectedOnCca();
+#endif
+            }
+            if(macState != RX_ACK) {
+                macState = RX_P;
+            } else {
+                macState = RX_ACK_P;
+            }
+        }
+        else if(macState == INIT) {
+            // sdDebug(180);
+            setFlag(&flags, UNHANDLED_PACKET);
+        }
+    }
+    
+    async event message_t* PacketReceive.receiveDone(message_t* msg, void* payload, uint8_t len, error_t error) {
+        message_t *m = msg;
+        macState_t action = STOP;
+        uint32_t nav = 0;
+        uint8_t level = 0;
+        bool isCnt;
+#ifdef REDMAC_PERFORMANCE
+        rxStat.duplicate = PERF_UNKNOWN;
+        rxStat.repCounter = 0xff;
+#endif
+        // sdDebug(190);
+        if(macState == RX_P) {
+            // sdDebug(191);
+            if(error == SUCCESS) {
+                // sdDebug(192);
+                isCnt = isControl(msg);
+                if(msgIsForMe(msg)) {
+                    if(!isCnt) {
+                        // sdDebug(193);
+                        if(isNewMsg(msg)) {
+#ifdef REDMAC_PERFORMANCE
+                            rxStat.duplicate = PERF_NEW_MSG;
+#endif
+                            // sdDebug(194);
+                            storeStrength(msg);
+#ifdef DELTATIMEDEBUG
+                            dTrace.sender = getHeader(msg)->src;
+#endif
+                            getMetadata(msg)->sfdtime = rxTime;
+                            getMetadata(msg)->time = calcGeneratedTime((red_mac_header_t*) payload);
+                            getMetadata(msg)->ack = WAS_NOT_ACKED;
+                            m = signal MacReceive.receiveDone(msg);
+                            // assume a buffer swap -- if buffer is not swapped, assume that the
+                            // message was not successfully delivered to upper layers
+                            if(m != msg) {
+                                // sdDebug(195);
+                                rememberMsg(msg);
+                            } else {
+                                // sdDebug(196);
+                                action = RX;
+#ifdef REDMAC_PERFORMANCE
+                                call Performance.macQueueFull();
+#endif
+                            }
+                        }
+                        else {
+#ifdef REDMAC_PERFORMANCE
+                            rxStat.duplicate = PERF_REPEATED_MSG;
+#endif
+                        }
+                        if(needsAckRx(msg, &level) && (action != RX)) {
+                            action = CCA_ACK;
+                            if(level == 2) {
+                                getMetadata(msg)->ack = WAS_ACKED;
+                            }
+                        }
+                        else {
+                            // sdDebug(198);
+                            if(action != RX) {
+                                nav = ((red_mac_header_t*)payload)->repetitionCounter *
+                                    (SUB_HEADER_TIME + getHeader(msg)->length*BYTE_TIME +
+                                     SUB_FOOTER_TIME + RX_ACK_TIMEOUT + TX_SETUP_TIME) + ACK_DURATION;
+                                action = SLEEP;
+                            }
+                        }
+                    }
+                    else {
+                        // sdDebug(199);
+                        action = RX;
+                    }
+                }
+                else {
+                    // sdDebug(200);
+                    action = SLEEP;
+                    if(!isCnt) {
+                        nav = ((red_mac_header_t*)payload)->repetitionCounter *
+                            (SUB_HEADER_TIME + getHeader(msg)->length*BYTE_TIME +
+                             SUB_FOOTER_TIME + RX_ACK_TIMEOUT + TX_SETUP_TIME) +
+                            ACK_DURATION;
+                    }
+                }
+            }
+            else {
+                // sdDebug(201);
+                action = SLEEP;
+            }
+        }
+        else if(macState == RX_ACK_P) {
+            if(error == SUCCESS) {
+                if(ackIsForMe(msg)) {
+                    // sdDebug(202);
+                    getMetadata(txBufPtr)->ack = WAS_ACKED;
+                    getMetadata(txBufPtr)->repetitions = txMacHdr->repetitionCounter;
+                    if(isFlagSet(&flags, TEAMGEIST_ACTIVE) &&
+                       (getHeader(txBufPtr)->type == teamgeistType))
+                    {
+                        signal Teamgeist.gotAck(txBufPtr, getHeader(msg)->src,
+                                                getMetadata(txBufPtr)->strength);
+                    }
+                    // sdDebug(203);
+                    signalSendDone(SUCCESS);
+                    // sdDebug(30000 + getHeader(msg)->src);
+                    action = SLEEP;
+                }
+                else {
+                    // sdDebug(203);
+                    updateLongRetryCounters(); // this will eventually schedule the right backoff
+                    macState = SLEEP;          // so much traffic is going on -- take a nap
+                    setSleepMode();
+                    action = INIT;             // a difficult way to say: do nothing
+                }
+            }
+            else {
+                if(call Timer.isRunning()) {
+                    // sdDebug(204);
+                    action = RX_ACK;
+                }
+                else {
+                    // sdDebug(205);
+                    updateLongRetryCounters();
+                    action = RX;
+                }
+            }
+        }
+        else {
+            // sdDebug(206);
+            action = INIT;
+        }
+        if(action == CCA_ACK) {
+            macState = CCA_ACK;
+            if(call Random.rand16() & 2) {
+                call Timer.start(RX_SETUP_TIME - TX_SETUP_TIME + 16 - level*8 + ADDED_DELAY);
+            }
+            else {
+                macState = TX_ACK;
+                call Timer.start(RX_SETUP_TIME - TX_SETUP_TIME + 16);
+            }
+            prepareAck(msg);
+        }
+        else if(action == RX_ACK) {
+            macState = RX_ACK;
+        }
+        else if(action == RX) {
+            macState = RX;
+            checkCounter = 0;
+            call Timer.start(DATA_DETECT_TIME);
+        }
+        else if(action == SLEEP) {
+            macState = SLEEP;
+            if(isFlagSet(&flags, RESUME_BACKOFF)) {
+                nav = nav*(uint32_t)ADD_NAV/(uint32_t)NAV_FACTOR;
+                if(nav > restLaufzeit) restLaufzeit += nav;
+            }
+            else {
+                setFlag(&flags, RESUME_BACKOFF);
+                restLaufzeit = call Random.rand16() & ZERO_BACKOFF_MASK;
+            }
+            setSleepMode();
+        }
+        else if(action == INIT) {
+            clearFlag(&flags, UNHANDLED_PACKET);
+        }
+        else {
+            // sdDebug(207);
+        }
+#ifdef REDMAC_PERFORMANCE
+        if(error == SUCCESS) {
+            rxStat.type = getHeader(msg)->type;
+            rxStat.from = getHeader(msg)->src;
+            rxStat.to = getHeader(msg)->dest;
+            rxStat.token = getHeader(msg)->token;
+            if(!isControl(msg)) rxStat.repCounter  = ((red_mac_header_t*)payload)->repetitionCounter;
+            rxStat.payloadLength = len;
+            rxStat.strength = rssiValue;
+            rxStat.creationTime = getMetadata(msg)->time;
+            call Performance.macRxStats(&rxStat);
+        }
+#endif
+        return m;
+    }
+
+    async event void PacketSend.sendDone(message_t* msg, error_t error) {
+        if(macState == TX) {
+            macState = RX_ACK;
+            setRxMode();
+            call Timer.start(RX_ACK_TIMEOUT);
+            // sdDebug(220);
+            checkCounter = 0;
+        }
+        else if(macState == TX_ACK) {
+            checkCounter = 0;
+            macState = SLEEP;
+            setSleepMode();
+            // macState = RX;
+            // setRxMode();
+            // sdDebug(221);
+#ifdef REDMAC_DEBUG            
+            // sdDebug(40000U + repCounter);
+#endif
+        }
+    }
+    
+    /***** TimeStamping stuff **************************/
+    async event void RadioTimeStamping.receivedSFD( uint16_t time ) {
+        if(call RssiAdcResource.isOwner()) call ChannelMonitorData.getSnr();
+        if(macState == RX_P) {
+            rxTime = call LocalTime32kHz.get();
+            call ChannelMonitor.rxSuccess();
+        }
+    }
+    
+    async event void RadioTimeStamping.transmittedSFD( uint16_t time, message_t* p_msg ) {
+        if((macState == TX) && (p_msg == txBufPtr)) {
+#ifdef DELTATIMEDEBUG
+            dTrace.now = call LocalTime32kHz.get();
+            dTrace.msgTime = getMetadata(p_msg)->time;
+            dTrace.delta = call TimeDiff32.computeDelta(dTrace.now, dTrace.msgTime);
+            txMacHdr->time = dTrace.delta;
+            call DeltaTrace.traceTx(&dTrace);
+            getMetadata(p_msg)->sfdtime = dTrace.now;
+#else
+            getMetadata(p_msg)->sfdtime = call LocalTime32kHz.get();
+            txMacHdr->time =
+                call TimeDiff32.computeDelta(getMetadata(p_msg)->sfdtime,
+                                             getMetadata(p_msg)->time);
+#endif
+        }
+    }
+    
+    /****** Timer ******************************/
+
+    void checkOnBusy() {
+        setFlag(&flags, ACTION_DETECTED);
+        if((macState == RX) || (macState == CCA) || (macState == CCA_ACK)) {
+            if(macState == CCA) {
+                computeBackoff();
+#ifdef REDMAC_PERFORMANCE
+                call Performance.macBusyOnCca();
+#endif
+            }
+            requestAdc();
+            // sdDebug(230);
+            macState = RX;
+            checkCounter = 0;
+            call Timer.start(TX_GAP_TIME>>1);
+        }
+    }
+
+    void checkOnIdle()  {
+        if(macState == RX) {
+            checkCounter++;
+            if(checkCounter >= 3) {
+                // sdDebug(240);
+                macState = SLEEP;
+                setSleepMode();
+            }
+            else {
+                // sdDebug(241);
+                call Timer.start(TX_GAP_TIME >> 1);
+                requestAdc();
+            }
+        }
+        else if(macState == CCA) {
+            checkCounter++;
+            if(checkCounter < 3) {
+                // sdDebug(242);                
+                call Timer.start(TX_GAP_TIME >> 1);
+                requestAdc();
+            }
+            else {
+                // sdDebug(243);
+                macState = TX;
+                setTxMode();
+#ifdef REDMAC_PERFORMANCE
+                call Performance.macIdleOnCca();
+                txStat.txModeTime = call LocalTime32kHz.get();
+#endif
+            }
+        }
+        else if(macState == CCA_ACK) {
+            // sdDebug(244);
+            macState = TX_ACK;
+            setTxMode();
+            // sdDebug(20000 + getHeader(&ackMsg)->dest);
+#ifdef REDMAC_PERFORMANCE
+            call Performance.macTxAckStats(getHeader(&ackMsg)->type,
+                                          getHeader(&ackMsg)->dest,
+                                          getHeader(&ackMsg)->token);
+#endif
+        }
+    }
+    
+    async event void Timer.fired() {
+        // sdDebug(250);
+        if((macState == RX) || (macState == CCA) || (macState == CCA_ACK)) {
+            if((!call RssiAdcResource.isOwner()) || (call ChannelMonitor.start() != SUCCESS)) {
+                if(call UartPhyControl.isBusy()) {
+                    // sdDebug(251);
+                    checkOnBusy();
+                }
+                else {
+                    // sdDebug(252);
+                    checkOnIdle();
+                }
+            }
+        }
+        else if(macState == RX_ACK) {
+            if(prepareRepetition()) {
+                // sdDebug(253);
+                macState = TX;
+                setTxMode();
+            }
+            else {
+                if(needsAckTx(txBufPtr)) {
+                    // sdDebug(254);
+#ifdef REDMAC_PERFORMANCE
+                    call Performance.macAckTimeout();
+#endif
+                    updateLongRetryCounters();
+                }
+                else {
+                    // sdDebug(255);
+                    signalSendDone(SUCCESS);
+                }
+                macState = SLEEP;
+                setSleepMode();
+            }
+        }
+        else if(macState == TX_ACK) {
+            setTxMode();
+            // sdDebug(10000 + getHeader(&ackMsg)->dest);
+        }
+        else if(macState == SLEEP) {
+             if(isFlagSet(&flags, SWITCHING)) {
+                 // sdDebug(256);
+                 call Timer.start(call Random.rand16() & 0x0f);
+             }
+             else {
+                 if(isFlagSet(&flags, RESUME_BACKOFF)) {
+                     // sdDebug(261);
+                     clearFlag(&flags, RESUME_BACKOFF);
+                     call Timer.start(restLaufzeit);
+                     restLaufzeit = 0;
+                 }
+                 else {
+                     // sdDebug(262);
+                     checkSend();
+                 }
+             }
+        }
+        else if((macState == RX_ACK_P) || (macState == RX_P)) {
+            // sdDebug(258);
+        }
+        else if(macState == INIT) {
+            // sdDebug(259);
+            post StartDoneTask();
+        }
+        else {
+            // sdDebug(260);
+        }
+    }
+    
+    /****** SampleTimer ******************************/
+    async event void SampleTimer.fired() {
+        call SampleTimer.start(localSleeptime);
+        // sdDebug(270);
+        if((macState == SLEEP) && (!isFlagSet(&flags, SWITCHING))) {
+            clearFlag(&flags, ACTION_DETECTED);
+            interruptBackoffTimer();
+            macState = RX;
+            // sdDebug(271);
+            setRxMode();
+            call Timer.stop();
+        }
+    }
+
+    /***** Sleeptime **********************************/
+    async command void Sleeptime.setLocalSleeptime(uint16_t sT) {
+        atomic localSleeptime = sT;
+    }
+
+    async command uint16_t Sleeptime.getLocalSleeptime() {
+        uint16_t st;
+        atomic st = localSleeptime;
+        return st;        
+    }
+
+    async command void Sleeptime.setNetworkSleeptime(uint16_t sT) {
+        atomic {
+            networkSleeptime = sT;
+            for(MIN_BACKOFF_MASK = 1; MIN_BACKOFF_MASK < sT; ) {
+                MIN_BACKOFF_MASK = (MIN_BACKOFF_MASK << 1) + 1;
+            }
+            MIN_BACKOFF_MASK >>= 3;
+        }
+    }
+    
+    async command uint16_t Sleeptime.getNetworkSleeptime() {
+        uint16_t st;
+        atomic st = networkSleeptime;
+        return st;
+    }
+
+    /****** ChannelMonitor events *********************/
+
+    async event void ChannelMonitor.channelBusy() {
+        // sdDebug(280);
+        checkOnBusy();
+    }
+
+    async event void ChannelMonitor.channelIdle() {
+        // sdDebug(281);
+        checkOnIdle();
+    }
+
+    /****** ChannelMonitorControl events **************/
+    
+    event void ChannelMonitorControl.updateNoiseFloorDone() {
+        if(macState == INIT) {
+            // sdDebug(290);
+            call Timer.start(call Random.rand16() % localSleeptime);
+            setSleepMode();
+        } else {
+            // sdDebug(291);
+        }
+    }
+
+    /***** ChannelMonitorData events ******************/
+    
+    async event void ChannelMonitorData.getSnrDone(int16_t data) {
+        atomic if((macState == RX_P) || (macState == RX_ACK_P)) rssiValue = data;
+    }
+    
+    /***** Rssi Resource events ******************/
+    event void RssiAdcResource.granted() {
+        macState_t ms;
+        atomic ms = macState;
+        if(ms < SLEEP) {
+            // sdDebug(300);
+        }
+        else if(ms == INIT) {
+            // sdDebug(301);
+            call ChannelMonitorControl.updateNoiseFloor();            
+        }
+        else {
+            // sdDebug(302);
+            post ReleaseAdcTask();
+        }
+    }
+    
+    /***** default Teamgeist events **************************/
+
+    default event am_id_t Teamgeist.observedAMType() {
+        clearFlag(&flags, TEAMGEIST_ACTIVE);
+        return teamgeistType;
+    }
+
+    default async event bool Teamgeist.needsAck(message_t *msg, am_addr_t src, am_addr_t dest, uint16_t snr) {
+        clearFlag(&flags, TEAMGEIST_ACTIVE);
+        return TRUE;
+    }
+
+    default async event uint8_t Teamgeist.estimateForwarders(message_t *msg) {
+        return 1;
+    }
+
+    default async event am_addr_t Teamgeist.getDestination(message_t *msg, uint8_t retryCounter) {
+        return getHeader(msg)->dest;
+    }
+    
+    default async event void Teamgeist.gotAck(message_t *msg, am_addr_t ackSender, uint16_t snr) {
+    }
+    
+    default async event void ChannelCongestion.congestionEvent(uint8_t level) {}
+
+    /***** Mac Eval *******************************************/
+#ifdef MAC_EVAL
+    async command void MacEval.setBackoffMask(uint16_t mask) {
+        atomic MIN_BACKOFF_MASK = mask;
+    }
+    async command void MacEval.increaseBackoff(bool value) {
+        atomic INCREASE_BACKOFF = value;
+    }
+    async command void MacEval.addNav(uint8_t value) {
+        atomic ADD_NAV = value;
+    }
+    async command void MacEval.setLongRetry(uint8_t lr) {
+        atomic MAX_LONG_RETRY = lr;
+    }
+    async command void MacEval.setShortRetry(uint8_t sr) {
+        atomic MAX_SHORT_RETRY = sr;
+    }    
+#endif
+    
+    /***** unused Radio Modes events **************************/
+    async event void RadioModes.TimerModeDone() {}
+    async event void RadioModes.SelfPollingModeDone() {}
+    async event void RadioModes.PWDDDInterrupt() {}
+}
+
diff --git a/tos/chips/tda5250/mac/Sleeptime.nc b/tos/chips/tda5250/mac/Sleeptime.nc
new file mode 100644
index 00000000..36306517
--- /dev/null
+++ b/tos/chips/tda5250/mac/Sleeptime.nc
@@ -0,0 +1,66 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * Interface to control the duty cycle of the MAC
+ * @author Andreas Koepke (koepke at tkn.tu-berlin.de)
+ */ 
+interface Sleeptime {
+  /**
+   * set the sleep time of the MAC in units of a 32kHz clock, the setting
+   * takes effect on the next wakeup.
+   * 
+   * Caution 1: To avoid synchroninization of the wake up times, some
+   *             additional randomization can be necessary, esp. when
+   *             switching from shorter to longer sleep times.
+   * Caution 2: The local sleep time must be equal or shorter than the
+   *            network sleep time
+   */
+  async command void setLocalSleeptime(uint16_t sT);
+  
+  /**
+   * which sleep time is in effect?
+   */
+  async command uint16_t getLocalSleeptime();
+
+  /**
+   * set the expected sleep time of the network -- this defines how long this
+   * node will attempt to wake up a remote node.
+   * Caution: The local sleep time must be equal or shorter than the
+   *          network sleep time
+   */
+  async command void setNetworkSleeptime(uint16_t sT);
+  
+  /**
+   * how long do we expect our neighbors to sleep?
+   */
+  async command uint16_t getNetworkSleeptime();
+  
+}
diff --git a/tos/chips/tda5250/mac/SpeckMacDC.nc b/tos/chips/tda5250/mac/SpeckMacDC.nc
new file mode 100644
index 00000000..590e59fc
--- /dev/null
+++ b/tos/chips/tda5250/mac/SpeckMacDC.nc
@@ -0,0 +1,132 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * low power nonpersistent CSMA MAC, rendez-vous via redundantly sent packets
+ * - Author --------------------------------------------------------------
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+// #define SPECKMAC_DEBUG
+
+#ifdef SPECKMAC_PERFORMANCE
+#include <Performance.h>
+#endif
+
+configuration SpeckMacDC {
+  provides {
+    interface SplitControl;
+    interface MacSend;
+    interface MacReceive;
+    interface Packet;
+    interface Sleeptime;
+    interface ChannelCongestion;
+#ifdef MAC_EVAL
+    interface MacEval;
+#endif
+  }
+  uses {
+    interface PhySend as PacketSend;
+    interface PhyReceive as PacketReceive;
+    interface Packet as SubPacket;
+    interface Tda5250Control;  
+    interface UartPhyControl;
+    interface RadioTimeStamping;
+  }
+}
+implementation {
+    components  MainC,
+        SpeckMacDP,
+        RssiFixedThresholdCMC as Cca,
+        new Alarm32khz16C() as Timer,
+        new Alarm32khz16C() as SampleTimer,
+        RandomLfsrC,
+        LocalTimeC,
+        DuplicateC,
+        TimeDiffC;
+    
+    components ActiveMessageAddressC;
+    SpeckMacDP.amAddress -> ActiveMessageAddressC;
+
+    MainC.SoftwareInit -> SpeckMacDP;
+              
+    SplitControl = SpeckMacDP;
+    MacSend = SpeckMacDP;
+    MacReceive = SpeckMacDP;
+    Tda5250Control = SpeckMacDP;
+    UartPhyControl = SpeckMacDP;
+    RadioTimeStamping = SpeckMacDP;
+
+    ChannelCongestion = SpeckMacDP;
+    
+    SpeckMacDP = PacketSend;
+    SpeckMacDP = PacketReceive;
+    SpeckMacDP = SubPacket;
+    SpeckMacDP = Packet;
+    SpeckMacDP = Sleeptime;
+    
+    SpeckMacDP.CcaStdControl -> Cca.StdControl;
+    SpeckMacDP.ChannelMonitor -> Cca.ChannelMonitor;
+    SpeckMacDP.ChannelMonitorData -> Cca.ChannelMonitorData;
+    SpeckMacDP.ChannelMonitorControl -> Cca.ChannelMonitorControl;
+    SpeckMacDP.RssiAdcResource -> Cca.RssiAdcResource;
+    
+    MainC.SoftwareInit -> RandomLfsrC;
+    SpeckMacDP.Random -> RandomLfsrC;
+
+    SpeckMacDP.Timer -> Timer;
+    SpeckMacDP.SampleTimer -> SampleTimer;
+    SpeckMacDP.LocalTime32kHz -> LocalTimeC;
+
+    SpeckMacDP.Duplicate -> DuplicateC;
+    SpeckMacDP.TimeDiff16 -> TimeDiffC;
+    SpeckMacDP.TimeDiff32 -> TimeDiffC;
+    
+/*    components PlatformLedsC;
+    SpeckMacDP.Led0 -> PlatformLedsC.Led0;
+    SpeckMacDP.Led1 -> PlatformLedsC.Led1;
+    SpeckMacDP.Led2 -> PlatformLedsC.Led2;
+    SpeckMacDP.Led3 -> PlatformLedsC.Led3;
+*/
+
+#ifdef MAC_EVAL
+    MacEval = SpeckMacDP;
+#endif
+
+#ifdef SPECKMAC_DEBUG
+    components new SerialDebugC() as SD;
+    SpeckMacDP.SerialDebug -> SD;
+#endif
+
+#ifdef SPECKMAC_PERFORMANCE
+    components new PerformanceC() as Perf;
+    SpeckMacDP.Performance -> Perf;
+#endif
+}
+
diff --git a/tos/chips/tda5250/mac/SpeckMacDP.nc b/tos/chips/tda5250/mac/SpeckMacDP.nc
new file mode 100644
index 00000000..daa64e71
--- /dev/null
+++ b/tos/chips/tda5250/mac/SpeckMacDP.nc
@@ -0,0 +1,1171 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * low power nonpersistent CSMA MAC, rendez-vous via redundantly sent packets
+ * - Author --------------------------------------------------------------
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+
+#include "radiopacketfunctions.h"
+#include "flagfunctions.h"
+#include "PacketAck.h"
+#include "RedMac.h"
+
+module SpeckMacDP {
+    provides {
+        interface Init;
+        interface SplitControl;
+        interface MacSend;
+        interface MacReceive;
+        interface Packet;
+        interface Sleeptime;
+        interface ChannelCongestion;
+#ifdef MAC_EVAL
+        interface MacEval;
+#endif
+    }
+    uses {
+        interface StdControl as CcaStdControl;
+        interface PhySend as PacketSend;
+        interface PhyReceive as PacketReceive;
+        interface RadioTimeStamping;
+
+        interface Tda5250Control as RadioModes;  
+
+        interface UartPhyControl;
+      
+        interface ChannelMonitor;
+        interface ChannelMonitorControl;  
+        interface ChannelMonitorData;
+        interface Resource as RssiAdcResource;
+
+        interface Random;
+
+        interface Packet as SubPacket;
+        
+        interface Alarm<T32khz, uint16_t> as Timer;
+        interface Alarm<T32khz, uint16_t> as SampleTimer;
+        interface LocalTime<T32khz> as LocalTime32kHz;
+
+        interface Duplicate;
+        interface TimeDiff16;
+        interface TimeDiff32;
+
+        async command am_addr_t amAddress();
+/*
+        interface GeneralIO as Led0;
+        interface GeneralIO as Led1;
+        interface GeneralIO as Led2;
+        interface GeneralIO as Led3;
+*/
+  
+#ifdef SPECKMAC_DEBUG
+        interface SerialDebug;
+#endif
+#ifdef SPECKMAC_PERFORMANCE
+        interface Performance;
+#endif
+
+    }
+}
+implementation
+{
+    /****** MAC State machine *********************************/
+    typedef enum {
+        RX,
+        RX_ACK,
+        CCA,
+        CCA_ACK,
+        RX_P,
+        RX_ACK_P,
+        SLEEP,
+        TX,
+        TX_ACK,
+        INIT,
+        STOP
+    } macState_t;
+    
+    macState_t macState;
+
+    /****** debug vars & defs & functions  ***********************/
+#ifdef SPECKMAC_DEBUG
+    void sdDebug(uint16_t p) {
+        call SerialDebug.putPlace(p);
+    }
+    uint8_t repCounter;
+#else
+    void sdDebug(uint16_t p) {};
+#endif
+    
+#ifdef SPECKMAC_PERFORMANCE
+    macTxStat_t txStat;
+    macRxStat_t rxStat;
+#endif
+
+    /**************** Module Global Constants  *****************/
+    enum {
+        
+        BYTE_TIME=ENCODED_32KHZ_BYTE_TIME,           // phy encoded
+        PREAMBLE_BYTE_TIME=TDA5250_32KHZ_BYTE_TIME,  // no coding
+        PHY_HEADER_TIME=6*PREAMBLE_BYTE_TIME,        // 6 Phy Preamble
+        TIME_CORRECTION=TDA5250_32KHZ_BYTE_TIME+2,   // difference between txSFD and rxSFD
+        
+        SUB_HEADER_TIME=PHY_HEADER_TIME + sizeof(message_header_t)*BYTE_TIME,
+        SUB_FOOTER_TIME=2*BYTE_TIME, // 2 bytes crc 
+#ifndef DEFAULT_SLEEP_TIME
+        DEFAULT_SLEEP_TIME=1625,
+        // DEFAULT_SLEEP_TIME=3250,
+        // DEFAULT_SLEEP_TIME=6500,
+        // DEFAULT_SLEEP_TIME=8192,
+        // DEFAULT_SLEEP_TIME=16384,
+        // DEFAULT_SLEEP_TIME=32768U,
+        // DEFAULT_SLEEP_TIME=65535U,
+#endif
+        DATA_DETECT_TIME=17,
+        RX_SETUP_TIME=102,    // time to set up receiver
+        TX_SETUP_TIME=58,     // time to set up transmitter
+        ADDED_DELAY = 30,
+        RX_ACK_TIMEOUT = RX_SETUP_TIME + PHY_HEADER_TIME + ADDED_DELAY + 30,
+        TX_GAP_TIME = RX_ACK_TIMEOUT + TX_SETUP_TIME + 33,
+        // the duration of a send ACK
+        ACK_DURATION = SUB_HEADER_TIME + SUB_FOOTER_TIME,
+        NAV_FACTOR = 4,
+#ifndef MAC_EVAL
+        MAX_SHORT_RETRY=9,
+        MAX_LONG_RETRY=3,
+        ADD_NAV = 4,
+        INCREASE_BACKOFF = TRUE,
+#endif
+        TOKEN_ACK_FLAG = 64,
+        TOKEN_ACK_MASK = 0x3f,
+        INVALID_SNR = 0xffff,
+        // PREAMBLE_LONG = 5,
+        // PREAMBLE_SHORT = 2,
+        // reduced minimal backoff
+        ZERO_BACKOFF_MASK = 0xff
+    };
+    
+    /**************** Module Global Variables  *****************/
+#ifdef MAC_EVAL
+    uint8_t MAX_SHORT_RETRY = 9;
+    uint8_t MAX_LONG_RETRY = 3;
+    uint8_t ADD_NAV = 4;
+    bool INCREASE_BACKOFF = TRUE;
+#endif
+    /* flags */
+    typedef enum {
+        SWITCHING = 1,
+        RSSI_STABLE = 2,
+        UNHANDLED_PACKET = 4,
+        MESSAGE_PREPARED = 8,
+        RESUME_BACKOFF = 16,
+        CANCEL_SEND = 32,
+        ACTION_DETECTED = 64,
+    } flags_t;
+
+    uint8_t flags = 0;
+    uint8_t checkCounter = 0;
+    uint8_t shortRetryCounter = 0;
+    uint8_t longRetryCounter = 0;
+    uint16_t networkSleeptime = DEFAULT_SLEEP_TIME;
+    uint16_t localSleeptime = DEFAULT_SLEEP_TIME;
+    uint16_t rssiValue = 0;
+    uint32_t restLaufzeit = 0;
+    
+    uint32_t rxTime = 0;
+
+    uint8_t congestionLevel = 0;
+    
+    message_t *txBufPtr = NULL;
+    uint16_t txLen = 0;
+    red_mac_header_t *txMacHdr = NULL;
+    uint16_t seqNo;
+    message_t ackMsg;
+
+    uint16_t MIN_BACKOFF_MASK;
+    
+    /****** Secure switching of radio modes ***/
+    void interruptBackoffTimer();
+    
+    task void SetRxModeTask();
+    task void SetTxModeTask();
+    task void SetSleepModeTask();
+
+    task void ReleaseAdcTask() {
+        bool release = FALSE;
+        atomic {
+            if((macState >= SLEEP) &&  call RssiAdcResource.isOwner())  {
+                release = TRUE;
+            }
+        }
+        if(release) call RssiAdcResource.release(); 
+    }
+
+    void requestAdc() {
+        if(!call RssiAdcResource.isOwner()) {
+            call RssiAdcResource.immediateRequest();
+        }
+    }
+
+    void setRxMode() {
+        setFlag(&flags, SWITCHING);
+        clearFlag(&flags, RSSI_STABLE);
+        checkCounter = 0;
+        rssiValue = INVALID_SNR;
+        if(call RadioModes.RxMode() == FAIL) {
+            post SetRxModeTask();
+        }
+        else {
+#ifdef SPECKMAC_PERFORMANCE
+            call Performance.macRxMode();
+#endif
+        }
+        requestAdc();
+    }
+    
+    task void SetRxModeTask() {
+        atomic {
+            if(isFlagSet(&flags, SWITCHING) && ((macState <= CCA) || (macState == INIT))) setRxMode();
+        }
+    }
+
+    void setSleepMode() {
+        clearFlag(&flags, RSSI_STABLE);
+        post ReleaseAdcTask();
+        setFlag(&flags, SWITCHING);
+        if(call RadioModes.SleepMode() == FAIL) {
+            post SetSleepModeTask();
+        }
+        else {
+#ifdef SPECKMAC_PERFORMANCE
+            call Performance.macSleepMode();
+#endif
+        }
+    }
+    
+    task void SetSleepModeTask() {
+        atomic if(isFlagSet(&flags, SWITCHING) && ((macState == SLEEP) || (macState == STOP))) setSleepMode();
+    }
+
+
+    void setTxMode() {
+        post ReleaseAdcTask();
+        clearFlag(&flags, RSSI_STABLE);
+        setFlag(&flags, SWITCHING);
+        if(call RadioModes.TxMode() == FAIL) {
+            post SetTxModeTask();
+        }
+        else {
+#ifdef SPECKMAC_PERFORMANCE
+            call Performance.macTxMode();
+#endif
+        }
+    }
+
+    task void SetTxModeTask() {
+        atomic {
+            if(isFlagSet(&flags, SWITCHING) && ((macState == TX) || (macState == TX_ACK))) setTxMode();
+        }
+    }
+
+    /**************** Helper functions ************************/
+    void computeBackoff();
+    
+    void checkSend() {
+        if((shortRetryCounter) && (txBufPtr != NULL) && (isFlagSet(&flags, MESSAGE_PREPARED)) && 
+           (macState == SLEEP) && (!isFlagSet(&flags, RESUME_BACKOFF)) && (!call Timer.isRunning())) {
+            macState = CCA;
+            checkCounter = 0;
+            setRxMode();
+        }
+    }
+
+    uint32_t backoff(uint8_t counter) {
+        uint32_t rVal = call Random.rand16() &  MIN_BACKOFF_MASK;
+        if(!INCREASE_BACKOFF) counter = 1;
+        return (rVal << counter) + ZERO_BACKOFF_MASK;
+    }
+    
+    bool needsAckTx(message_t* msg) {
+        bool rVal = FALSE;
+        if(getHeader(msg)->dest < AM_BROADCAST_ADDR) {
+            if(getMetadata(msg)->ack != NO_ACK_REQUESTED) {
+                rVal = TRUE;
+            }
+        }
+        return rVal;
+    }
+    
+    bool needsAckRx(message_t* msg) {
+        bool rVal = FALSE;
+        am_addr_t dest = getHeader(msg)->dest;
+        uint8_t token;
+        if(dest < AM_BROADCAST_ADDR) {
+            token = getHeader(msg)->token;
+            if(isFlagSet(&token, ACK_REQUESTED)) {
+                rVal = TRUE;
+            }
+        }
+        return rVal;
+    }
+
+    task void PrepareMsgTask() {
+        message_t *msg;
+        uint8_t length;
+        red_mac_header_t *macHdr;
+        uint16_t sT;
+        atomic {
+            msg = txBufPtr;
+            length = txLen;
+            sT = networkSleeptime;
+        }
+        if(msg == NULL) return;
+        macHdr = (red_mac_header_t *)call SubPacket.getPayload(msg, sizeof(red_mac_header_t));
+        macHdr->repetitionCounter = sT/(length * BYTE_TIME + SUB_HEADER_TIME + SUB_FOOTER_TIME) + 1;
+        atomic {
+            getHeader(msg)->token = seqNo;
+            if(needsAckTx(msg)) getHeader(msg)->token |= ACK_REQUESTED;
+            txMacHdr = macHdr;
+            setFlag(&flags, MESSAGE_PREPARED);
+            if(macState == SLEEP) {
+            } else {
+            }
+            if(!call Timer.isRunning()) {
+            } else {
+            }
+            if(!isFlagSet(&flags, RESUME_BACKOFF)) {
+            } else {
+            }
+            if((macState == SLEEP) && (!call Timer.isRunning()) && (!isFlagSet(&flags, RESUME_BACKOFF))) {
+                if((longRetryCounter == 1) &&
+                   (getHeader(msg)->dest != AM_BROADCAST_ADDR)) {
+                    call Timer.start((call Random.rand16() >> 3) & ZERO_BACKOFF_MASK);
+                }
+                else {
+                    call Timer.start(backoff(longRetryCounter));
+                }
+            }
+#ifdef SPECKMAC_PERFORMANCE
+            txStat.type = getHeader(msg)->type;
+            txStat.to = getHeader(msg)->dest;
+            txStat.token = getHeader(msg)->token;
+            txStat.maxRepCounter = macHdr->repetitionCounter;
+            txStat.creationTime =  getMetadata(msg)->time;
+#endif
+            getMetadata(msg)->maxRepetitions = macHdr->repetitionCounter;
+        }
+    }
+
+    void storeStrength(message_t *m) {
+        if(rssiValue != INVALID_SNR) {
+            (getMetadata(m))->strength = rssiValue;
+        }
+        else {
+            if(call RssiAdcResource.isOwner()) {
+                (getMetadata(m))->strength = call ChannelMonitorData.readSnr();
+            }
+            else {
+                (getMetadata(m))->strength = 1;
+            }
+        }
+    }
+
+
+    bool prepareRepetition() {
+        bool repeat;
+        atomic {
+            if(isFlagSet(&flags, CANCEL_SEND)) {
+                repeat = txMacHdr->repetitionCounter = 0;
+            }
+            else {
+                repeat = txMacHdr->repetitionCounter;
+                txMacHdr->repetitionCounter--;
+            }
+        }
+        return repeat;
+    }
+
+    void signalSendDone(error_t error) {
+        message_t *m;
+        error_t e = error;
+        atomic {
+            m = txBufPtr;
+            txBufPtr = NULL;
+            txLen  = 0;
+#ifdef SPECKMAC_PERFORMANCE
+            txStat.repCounter = txMacHdr->repetitionCounter;
+            txStat.longRetry = longRetryCounter;
+            txStat.shortRetry = shortRetryCounter;
+#endif
+            longRetryCounter = 0;
+            shortRetryCounter = 0;
+            storeStrength(m);
+            if(isFlagSet(&flags, CANCEL_SEND)) {
+                e = ECANCEL;
+            }
+            clearFlag(&flags, MESSAGE_PREPARED);
+            clearFlag(&flags, CANCEL_SEND);
+        }
+        signal MacSend.sendDone(m, e);
+#ifdef SPECKMAC_PERFORMANCE
+        txStat.success = e;
+        txStat.strength = getMetadata(m)->strength;
+        call Performance.macTxMsgStats(&txStat);
+#endif
+    }
+    
+    void updateRetryCounters() {
+        shortRetryCounter++;
+        if(shortRetryCounter > MAX_SHORT_RETRY) {
+            longRetryCounter++;
+            shortRetryCounter = 1;
+            if(longRetryCounter > MAX_LONG_RETRY) {
+                signalSendDone(FAIL);
+            }
+        }
+    }
+
+    void updateLongRetryCounters() {
+        atomic {
+            clearFlag(&flags, MESSAGE_PREPARED);
+            longRetryCounter++;
+            shortRetryCounter = 1;
+            if(longRetryCounter > MAX_LONG_RETRY) {
+                signalSendDone(FAIL);
+            } else {
+                post PrepareMsgTask();
+            }
+        }
+    }
+
+    bool ackIsForMe(message_t* msg) {
+        uint8_t localToken = seqNo;
+        setFlag(&localToken, TOKEN_ACK_FLAG);
+        if((getHeader(msg)->dest == call amAddress()) && (localToken == getHeader(msg)->token)) return TRUE;
+        return FALSE;
+    }
+
+    void interruptBackoffTimer() {
+        if(call Timer.isRunning()) {
+            restLaufzeit = call TimeDiff16.computeDelta(call Timer.getAlarm(), call Timer.getNow());
+            call Timer.stop();
+            if(restLaufzeit > MIN_BACKOFF_MASK << MAX_LONG_RETRY) {
+                restLaufzeit = call Random.rand16() & ZERO_BACKOFF_MASK;
+            }
+            setFlag(&flags, RESUME_BACKOFF);
+        }
+    }
+
+    void computeBackoff() {
+        if(!isFlagSet(&flags, RESUME_BACKOFF)) {
+            setFlag(&flags, RESUME_BACKOFF);
+            restLaufzeit = backoff(longRetryCounter);
+            updateRetryCounters();
+        }
+    }
+
+    bool msgIsForMe(message_t* msg) {
+        if(getHeader(msg)->dest == AM_BROADCAST_ADDR) return TRUE;
+        if(getHeader(msg)->dest == call amAddress()) return TRUE;
+        if(getHeader(msg)->dest >= RELIABLE_MCAST_MIN_ADDR) return TRUE;
+        return FALSE;
+    }
+
+    bool isControl(message_t* m) {
+        uint8_t token = getHeader(m)->token;
+        return isFlagSet(&token, TOKEN_ACK_FLAG);
+    }
+    
+    bool isNewMsg(message_t* msg) {
+        return call Duplicate.isNew(getHeader(msg)->src, getHeader(msg)->dest,
+                                    (getHeader(msg)->token) & TOKEN_ACK_MASK);
+    }
+    
+    void rememberMsg(message_t* msg) {
+        call Duplicate.remember(getHeader(msg)->src, getHeader(msg)->dest,
+                                (getHeader(msg)->token) & TOKEN_ACK_MASK);
+    }
+
+    void prepareAck(message_t* msg) {
+        uint8_t rToken = getHeader(msg)->token & TOKEN_ACK_MASK;
+        setFlag(&rToken, TOKEN_ACK_FLAG);
+        getHeader(&ackMsg)->token = rToken;
+        getHeader(&ackMsg)->src = call amAddress();
+        getHeader(&ackMsg)->dest = getHeader(msg)->src;
+        getHeader(&ackMsg)->type = getHeader(msg)->type;
+#ifdef SPECKMAC_DEBUG
+        repCounter = ((red_mac_header_t *)
+                      call SubPacket.getPayload(msg, sizeof(red_mac_header_t)))->repetitionCounter;
+#endif
+    }
+    
+    uint32_t calcGeneratedTime(red_mac_header_t *m) {
+        return rxTime - m->time - TIME_CORRECTION;
+    }
+    
+    /**************** Init ************************/
+    
+    command error_t Init.init(){
+        atomic {
+            macState = INIT;
+            seqNo = call Random.rand16() % TOKEN_ACK_FLAG;
+            for(MIN_BACKOFF_MASK = 1; MIN_BACKOFF_MASK < networkSleeptime; ) {
+                MIN_BACKOFF_MASK = (MIN_BACKOFF_MASK << 1) + 1;
+            }
+            MIN_BACKOFF_MASK >>= 2;
+            if(MIN_BACKOFF_MASK < 0x3ff) MIN_BACKOFF_MASK=0x3ff;
+        }
+#ifdef SPECKMAC_DEBUG
+        call SerialDebug.putShortDesc("SpeckMacP");
+#endif
+        return SUCCESS;
+    }
+
+    /****************  SplitControl  *****************/
+
+    task void StartDoneTask() {
+        atomic  {
+            call SampleTimer.start(localSleeptime);
+            macState = SLEEP;
+            sdDebug(60);
+        }
+        signal SplitControl.startDone(SUCCESS);        
+    }
+    
+    command error_t SplitControl.start() {
+        call CcaStdControl.start();
+        atomic {
+            macState = INIT;
+            setRxMode();
+        }
+        sdDebug(10);
+        return SUCCESS;
+    }
+    
+    task void StopDoneTask() {
+        call Init.init();
+        signal SplitControl.stopDone(SUCCESS);        
+    }
+    
+    command error_t SplitControl.stop() {
+        call CcaStdControl.stop();
+        call Timer.stop();
+        call SampleTimer.stop();
+        atomic {
+            if((macState == SLEEP) && isFlagSet(&flags, SWITCHING)) {
+                macState = STOP;
+            }
+            else {
+                macState = STOP;
+                setSleepMode();
+            }
+        }
+        return SUCCESS;
+    }
+
+    /****** Packet interface ********************/
+    command void Packet.clear(message_t* msg) {
+        call SubPacket.clear(msg);
+    }
+    
+    command uint8_t Packet.payloadLength(message_t* msg) {
+        return call SubPacket.payloadLength(msg) - sizeof(red_mac_header_t);
+    }
+    
+    command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+        call SubPacket.setPayloadLength(msg,len + sizeof(red_mac_header_t));
+    }
+    
+    command uint8_t Packet.maxPayloadLength() {
+        return call SubPacket.maxPayloadLength() - sizeof(red_mac_header_t);
+    }
+    
+    command void* Packet.getPayload(message_t* msg, uint8_t len) {
+        nx_uint8_t *payload = (nx_uint8_t *)call SubPacket.getPayload(msg, len + sizeof(red_mac_header_t));
+        return (void*)(payload + sizeof(red_mac_header_t));
+    }
+    
+    /****** Radio(Mode) events *************************/
+    async event void RadioModes.RssiStable() {
+        setFlag(&flags, RSSI_STABLE);
+        if((macState == RX) || (macState == CCA)) {
+            call Timer.start(DATA_DETECT_TIME);
+        }
+        else if(macState == RX_P) {
+            if(call RssiAdcResource.isOwner()) call ChannelMonitorData.getSnr();
+        }
+        else if(macState == RX_ACK) {
+            // if(call RssiAdcResource.isOwner()) call ChannelMonitor.start();
+        }
+        else if(macState == RX_ACK_P) {
+        }
+        else if(macState == INIT) {
+            if(call RssiAdcResource.isOwner()) {
+                sdDebug(20);
+                call ChannelMonitorControl.updateNoiseFloor();
+            } else {
+                sdDebug(21);
+                call RssiAdcResource.request();
+            }
+        }
+        else if(macState == STOP) {
+        }
+        else {
+        }
+    }
+    
+    async event void RadioModes.RxModeDone() {
+        atomic {
+            clearFlag(&flags, SWITCHING);
+            if((macState == RX) || (macState == RX_ACK) || (macState == CCA) ||
+               (macState == INIT) || (macState == STOP)) {
+                if(macState != RX_ACK) requestAdc();
+            }
+            else {
+            }
+        }
+    }
+    
+    async event void RadioModes.TxModeDone() {
+        atomic {
+            clearFlag(&flags, SWITCHING);
+            if(macState == TX) {
+                setFlag(&flags, ACTION_DETECTED);
+                if(call PacketSend.send(txBufPtr, txLen) == SUCCESS) {
+                }
+                else {
+                }
+            }
+            else if(macState == TX_ACK) {
+                if(call PacketSend.send(&ackMsg, 0) == SUCCESS) {
+                } else {
+                }
+            }
+            else {
+            }
+        }
+    }
+
+    async event void RadioModes.SleepModeDone() {
+        atomic {
+            clearFlag(&flags, SWITCHING);
+            if(isFlagSet(&flags, ACTION_DETECTED)) {
+                if(congestionLevel < 5) congestionLevel++;
+            } else {
+                if(congestionLevel > 0) congestionLevel--;
+            }
+            if(macState == SLEEP) {
+                if(!call Timer.isRunning()) {
+                    if(isFlagSet(&flags, RESUME_BACKOFF)) {
+                        clearFlag(&flags, RESUME_BACKOFF);
+                        call Timer.start(restLaufzeit);
+                        restLaufzeit = 0;
+                    }
+                    else {
+                        checkSend();
+                    }
+                }
+            }
+            else if(macState == STOP) {
+                post StopDoneTask();
+            }
+            signal ChannelCongestion.congestionEvent(congestionLevel);
+        }
+    }
+    
+    /****** MacSend events *************************/    
+    async command error_t MacSend.send(message_t* msg, uint8_t len) {
+        error_t err = SUCCESS;
+        atomic {
+            if((shortRetryCounter == 0) && (txBufPtr == NULL)) {
+                clearFlag(&flags, MESSAGE_PREPARED);
+                shortRetryCounter = 1;
+                longRetryCounter = 1;
+                txBufPtr = msg;
+                txLen = len + sizeof(red_mac_header_t);
+                seqNo++;
+                if(seqNo >= TOKEN_ACK_FLAG) seqNo = 1;
+#ifdef SPECKMAC_PERFORMANCE
+                txStat.payloadLength = txLen;
+                txStat.interfaceTime = call LocalTime32kHz.get();
+#endif
+            }
+            else {
+                err = EBUSY;
+            }
+        }
+        if(err == SUCCESS) {
+            post PrepareMsgTask();
+        }
+        return err;
+    }
+
+    async command error_t MacSend.cancel(message_t* msg) {
+        error_t err = FAIL;
+        atomic {
+            if(msg == txBufPtr) {
+                setFlag(&flags, CANCEL_SEND);
+                shortRetryCounter = MAX_SHORT_RETRY + 2;
+                longRetryCounter  = MAX_LONG_RETRY + 2;
+                if(macState == SLEEP) {
+                    signalSendDone(ECANCEL);
+                }
+                else {
+                }
+                err = SUCCESS;
+            }
+            else {
+            }
+        }
+        return err;
+    }
+    
+    /****** PacketSerializer events **********************/
+    
+    async event void PacketReceive.receiveDetected() {
+        rssiValue = INVALID_SNR;
+        setFlag(&flags, ACTION_DETECTED);
+        call ChannelMonitor.rxSuccess();
+        if(macState <= CCA_ACK) {
+            if(macState == CCA) {
+                computeBackoff();
+#ifdef SPECKMAC_PERFORMANCE
+                call Performance.macDetectedOnCca();
+#endif
+            }
+            if(macState != RX_ACK) {
+                macState = RX_P;
+            } else {
+                macState = RX_ACK_P;
+            }
+        }
+        else if(macState == INIT) {
+            setFlag(&flags, UNHANDLED_PACKET);
+        }
+    }
+    
+    async event message_t* PacketReceive.receiveDone(message_t* msg, void* payload, uint8_t len, error_t error) {
+        message_t *m = msg;
+        macState_t action = STOP;
+        uint32_t nav = 0;
+        bool isCnt;
+#ifdef SPECKMAC_PERFORMANCE
+        rxStat.duplicate = PERF_UNKNOWN;
+        rxStat.repCounter = 0xff;
+#endif
+        if(macState == RX_P) {
+            if(error == SUCCESS) {
+                isCnt = isControl(msg);
+                if(msgIsForMe(msg)) {
+                    if(!isCnt) {
+                        if(isNewMsg(msg)) {
+#ifdef SPECKMAC_PERFORMANCE
+                            rxStat.duplicate = PERF_NEW_MSG;
+#endif
+                            storeStrength(msg);
+                            getMetadata(msg)->sfdtime = rxTime;
+                            getMetadata(msg)->time = calcGeneratedTime((red_mac_header_t*) payload);
+                            getMetadata(msg)->ack = WAS_NOT_ACKED;
+                            m = signal MacReceive.receiveDone(msg);
+                            // assume a buffer swap -- if buffer is not swapped, assume that the
+                            // message was not successfully delivered to upper layers
+                            if(m != msg) {
+                                rememberMsg(msg);
+                            } else {
+                                action = RX;
+#ifdef SPECKMAC_PERFORMANCE
+                                call Performance.macQueueFull();
+#endif
+                            }
+                        }
+#ifdef SPECKMAC_PERFORMANCE
+                        else {
+                            rxStat.duplicate = PERF_REPEATED_MSG;
+                        }
+#endif                  
+                        if(needsAckRx(msg) && (action != RX)) {
+                            if(((red_mac_header_t*)payload)->repetitionCounter == 0) {
+                                action = CCA_ACK;
+                            }
+                            else {
+                                action = RX;
+                            }
+                        }
+                        else {
+                            if(action != RX) {
+                                nav = ((red_mac_header_t*)payload)->repetitionCounter *
+                                    (SUB_HEADER_TIME + getHeader(msg)->length*BYTE_TIME +
+                                     SUB_FOOTER_TIME) + RX_ACK_TIMEOUT + TX_SETUP_TIME + ACK_DURATION;
+                                action = SLEEP;
+                            }
+                        }
+                    }
+                    else {
+                        action = RX;
+                    }
+                }
+                else {
+                    action = SLEEP;
+                    if(!isCnt) {
+                        nav = ((red_mac_header_t*)payload)->repetitionCounter *
+                            (SUB_HEADER_TIME + getHeader(msg)->length*BYTE_TIME +
+                             SUB_FOOTER_TIME) + RX_ACK_TIMEOUT + TX_SETUP_TIME + ACK_DURATION;
+                    }
+                }
+            }
+            else {
+                action = SLEEP;
+            }
+        }
+        else if(macState == RX_ACK_P) {
+            if(error == SUCCESS) {
+                if(ackIsForMe(msg)) {
+                    storeStrength(msg);
+                    getMetadata(txBufPtr)->ack = WAS_ACKED;
+                    getMetadata(txBufPtr)->repetitions = txMacHdr->repetitionCounter;
+                    signalSendDone(SUCCESS);
+                    action = SLEEP;
+                }
+                else {
+                    updateLongRetryCounters(); // this will eventually schedule the right backoff
+                    macState = SLEEP;          // so much traffic is going on -- take a nap
+                    setSleepMode();
+                    action = INIT;             // a difficult way to say: do nothing
+                }
+            }
+            else {
+                if(call Timer.isRunning()) {
+                    action = RX_ACK;
+                }
+                else {
+                    updateLongRetryCounters();
+                    action = RX;
+                }
+            }
+        }
+        else {
+            action = INIT;
+        }
+        if(action == CCA_ACK) {
+            macState = TX_ACK;
+            call Timer.start(RX_SETUP_TIME - TX_SETUP_TIME + 16);
+            prepareAck(msg);
+        }
+        else if(action == RX_ACK) {
+            macState = RX_ACK;
+        }
+        else if(action == RX) {
+            macState = RX;
+            checkCounter = 0;
+            call Timer.start(DATA_DETECT_TIME);
+        }
+        else if(action == SLEEP) {
+            macState = SLEEP;
+            if(isFlagSet(&flags, RESUME_BACKOFF)) {
+                if(nav > restLaufzeit) {
+                    if(nav > restLaufzeit) restLaufzeit += ((uint32_t)ADD_NAV*nav/NAV_FACTOR);
+                }
+            }
+            else {
+                setFlag(&flags, RESUME_BACKOFF);
+                restLaufzeit = call Random.rand16() & ZERO_BACKOFF_MASK;
+            }
+            setSleepMode();
+        }
+        else if(action == INIT) {
+            clearFlag(&flags, UNHANDLED_PACKET);
+        }
+        else {
+        }
+#ifdef SPECKMAC_PERFORMANCE
+        if(error == SUCCESS) {
+            rxStat.type = getHeader(msg)->type;
+            rxStat.from = getHeader(msg)->src;
+            rxStat.to = getHeader(msg)->dest;
+            rxStat.token = getHeader(msg)->token;
+            if(!isControl(msg)) rxStat.repCounter  = ((red_mac_header_t*)payload)->repetitionCounter;
+            rxStat.payloadLength = len;
+            rxStat.strength = rssiValue;
+            rxStat.creationTime = getMetadata(msg)->time;
+            call Performance.macRxStats(&rxStat);
+        }
+#endif
+        return m;
+    }
+
+    async event void PacketSend.sendDone(message_t* msg, error_t error) {
+        if(macState == TX) {
+            if(prepareRepetition()) {
+                call PacketSend.send(txBufPtr, txLen);
+            }
+            else {
+                macState = RX_ACK;
+                setRxMode();
+                call Timer.start(RX_ACK_TIMEOUT);
+                checkCounter = 0;
+            }
+        }
+        else if(macState == TX_ACK) {
+            checkCounter = 0;
+            macState = RX;
+            setRxMode();
+#ifdef SPECKMAC_DEBUG
+#endif
+        }
+    }
+    
+    /***** TimeStamping stuff **************************/
+    async event void RadioTimeStamping.receivedSFD( uint16_t time ) {
+        if(call RssiAdcResource.isOwner()) call ChannelMonitorData.getSnr();
+        if(macState == RX_P) {
+            rxTime = call LocalTime32kHz.get();
+            call ChannelMonitor.rxSuccess();
+        }
+    }
+    
+    async event void RadioTimeStamping.transmittedSFD(uint16_t time, message_t* p_msg ) {
+        if((macState == TX) && (p_msg == txBufPtr)) {
+            getMetadata(p_msg)->sfdtime = call LocalTime32kHz.get();
+            txMacHdr->time =
+                call TimeDiff32.computeDelta(getMetadata(p_msg)->sfdtime,
+                                             getMetadata(p_msg)->time);
+        }
+    }
+    
+    /****** Timer ******************************/
+
+    void checkOnBusy() {
+        setFlag(&flags, ACTION_DETECTED);
+        if((macState == RX) || (macState == CCA) || (macState == CCA_ACK)) {
+            if(macState == CCA) {
+                computeBackoff();
+#ifdef SPECKMAC_PERFORMANCE
+                call Performance.macBusyOnCca();
+#endif
+            }
+            requestAdc();
+            macState = RX;
+            checkCounter = 0;
+            call Timer.start(TX_GAP_TIME>>1);
+        }
+    }
+
+    void checkOnIdle()  {
+        if(macState == RX) {
+            checkCounter++;
+            if(checkCounter < 2) {
+                call Timer.start(DATA_DETECT_TIME);
+                requestAdc();
+            } else {
+                macState = SLEEP;
+                setSleepMode();
+            }
+        }
+        else if(macState == CCA) {
+            checkCounter++;
+            if(checkCounter < 3) {
+                call Timer.start(TX_GAP_TIME >> 1);
+                requestAdc();
+            }
+            else {
+                macState = TX;
+                setTxMode();
+#ifdef SPECKMAC_PERFORMANCE
+                call Performance.macIdleOnCca();
+                txStat.txModeTime = call LocalTime32kHz.get();
+#endif
+            }
+        }
+    }
+    
+    async event void Timer.fired() {
+        if((macState == RX) || (macState == CCA) || (macState == CCA_ACK)) {
+            if((!call RssiAdcResource.isOwner()) || (call ChannelMonitor.start() != SUCCESS)) {
+                if(call UartPhyControl.isBusy()) {
+                    checkOnBusy();
+                }
+                else {
+                    checkOnIdle();
+                }
+            }
+        }
+        else if(macState == RX_ACK) {
+            if(needsAckTx(txBufPtr)) {
+#ifdef SPECKMAC_PERFORMANCE
+                call Performance.macAckTimeout();
+#endif
+                updateLongRetryCounters();
+            }
+            else {
+                signalSendDone(SUCCESS);
+            }
+            macState = SLEEP;
+            setSleepMode();
+        }
+        else if(macState == TX_ACK) {
+            setTxMode();
+        }
+        else if(macState == SLEEP) {
+             if(isFlagSet(&flags, SWITCHING)) {
+                 call Timer.start(call Random.rand16() & 0x0f);
+             }
+             else {
+                 if(isFlagSet(&flags, RESUME_BACKOFF)) {
+                     clearFlag(&flags, RESUME_BACKOFF);
+                     call Timer.start(restLaufzeit);
+                     restLaufzeit = 0;
+                 }
+                 else {
+                     checkSend();
+                 }
+             }
+        }
+        else if((macState == RX_ACK_P) || (macState == RX_P)) {
+        }
+        else if(macState == INIT) {
+            post StartDoneTask();
+            sdDebug(50);
+        }
+        else {
+        }
+    }
+
+    /****** SampleTimer ******************************/
+
+    async event void SampleTimer.fired() {
+        call SampleTimer.start(localSleeptime);
+        if((macState == SLEEP) && (!isFlagSet(&flags, SWITCHING))) {
+            clearFlag(&flags, ACTION_DETECTED);
+            interruptBackoffTimer();
+            macState = RX;
+            setRxMode();
+            call Timer.stop();
+        }
+    }
+
+    /***** Sleeptime **********************************/
+    async command void Sleeptime.setLocalSleeptime(uint16_t sT) {
+        atomic localSleeptime = sT;
+    }
+
+    async command uint16_t Sleeptime.getLocalSleeptime() {
+        uint16_t st;
+        atomic st = localSleeptime;
+        return st;        
+    }
+
+    async command void Sleeptime.setNetworkSleeptime(uint16_t sT) {
+        atomic {
+            networkSleeptime = sT;
+            for(MIN_BACKOFF_MASK = 1; MIN_BACKOFF_MASK < sT; ) {
+                MIN_BACKOFF_MASK = (MIN_BACKOFF_MASK << 1) + 1;
+            }
+            MIN_BACKOFF_MASK >>= 3;
+        }
+    }
+    
+    async command uint16_t Sleeptime.getNetworkSleeptime() {
+        uint16_t st;
+        atomic st = networkSleeptime;
+        return st;
+    }
+
+    /****** ChannelMonitor events *********************/
+
+    async event void ChannelMonitor.channelBusy() {
+        checkOnBusy();
+    }
+
+    async event void ChannelMonitor.channelIdle() {
+        checkOnIdle();
+    }
+
+    /****** ChannelMonitorControl events **************/
+    
+    event void ChannelMonitorControl.updateNoiseFloorDone() {
+        if(macState == INIT) {
+            call Timer.start(call Random.rand16() % localSleeptime);
+            setSleepMode();
+            sdDebug(40);
+        } else {
+        }
+    }
+
+    /***** ChannelMonitorData events ******************/
+    
+    async event void ChannelMonitorData.getSnrDone(int16_t data) {
+        atomic if((macState == RX_P) || (macState == RX_ACK_P)) rssiValue = data;
+    }
+    
+    /***** Rssi Resource events ******************/
+    event void RssiAdcResource.granted() {
+        macState_t ms;
+        atomic ms = macState;
+        if(ms < SLEEP) {
+        }
+        else if(ms == INIT) {
+            sdDebug(30);
+            call ChannelMonitorControl.updateNoiseFloor();            
+        }
+        else {
+            post ReleaseAdcTask();
+        }
+    }
+    
+    /***** Mac Eval *******************************************/
+#ifdef MAC_EVAL
+    async command void MacEval.setBackoffMask(uint16_t mask) {
+        atomic MIN_BACKOFF_MASK = mask;
+    }
+    async command void MacEval.increaseBackoff(bool value) {
+        atomic INCREASE_BACKOFF = value;
+    }
+    async command void MacEval.addNav(bool value) {
+        atomic ADD_NAV = value;
+    }
+    async command void MacEval.setLongRetry(uint8_t lr) {
+        atomic MAX_LONG_RETRY = lr;
+    }
+    async command void MacEval.setShortRetry(uint8_t sr) {
+        atomic MAX_SHORT_RETRY = sr;
+    }    
+#endif
+
+    /***** unused events **************************/
+    default async event void ChannelCongestion.congestionEvent(uint8_t level) {}
+
+    /***** unused Radio Modes events **************************/
+    
+    async event void RadioModes.TimerModeDone() {}
+    async event void RadioModes.SelfPollingModeDone() {}
+    async event void RadioModes.PWDDDInterrupt() {}
+}
+
diff --git a/tos/chips/tda5250/mac/Teamgeist.nc b/tos/chips/tda5250/mac/Teamgeist.nc
new file mode 100644
index 00000000..f7bf6ac4
--- /dev/null
+++ b/tos/chips/tda5250/mac/Teamgeist.nc
@@ -0,0 +1,66 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * Interface that helps the MAC to cooperate with the routing
+ * @author Andreas Koepke (koepke at tkn.tu-berlin.de)
+ */ 
+interface Teamgeist {
+    /**
+     * Get the AM type of the messages that are jointly routed by the MAC and
+     * the routing layer. Only for these messages the MAC tries to access the
+     * routing layer. 
+     */
+    event am_id_t observedAMType();
+
+    /**
+     * The MAC layer uses this function to ask the routing protocol whether it
+     * should acknowledge and thus propose himself as a forwarder. 
+     */
+    async event bool needsAck(message_t *msg, am_addr_t src, am_addr_t dest, uint16_t snr);
+
+    /**
+     * Sending the message to the original destination did not work.
+     * Ask for a different one.
+     */
+    async event am_addr_t getDestination(message_t *msg, uint8_t retryCounter);
+    
+    /**
+     * Information on the ACK.
+     */
+    async event void gotAck(message_t *msg, am_addr_t ackSender, uint16_t snr);
+
+    /**
+     * The MAC layer uses this function to ask the routing protocol how many
+     * potential forwarders there are. This may not give a precise number, but
+     * a rough estimate.
+     */
+    async event uint8_t estimateForwarders(message_t *msg);
+}
diff --git a/tos/chips/tda5250/mac/TimeDiff.nc b/tos/chips/tda5250/mac/TimeDiff.nc
new file mode 100644
index 00000000..7e7edbce
--- /dev/null
+++ b/tos/chips/tda5250/mac/TimeDiff.nc
@@ -0,0 +1,39 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Manipulate time differences, with overflow checking
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de
+ */
+
+interface TimeDiff {
+    /** compute delta of two times (now - past),
+        checks for overflow assuming that now is always > past */
+    async command uint32_t computeDelta(uint32_t time_now, uint32_t time_past);
+}
diff --git a/tos/chips/tda5250/mac/TimeDiff16.nc b/tos/chips/tda5250/mac/TimeDiff16.nc
new file mode 100644
index 00000000..44955b1b
--- /dev/null
+++ b/tos/chips/tda5250/mac/TimeDiff16.nc
@@ -0,0 +1,39 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Manipulate time differences, with overflow checking
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de
+ */
+
+interface TimeDiff16 {
+    /** compute delta of two times (now - past),
+        checks for overflow assuming that now is always > past */
+    async command uint16_t computeDelta(uint16_t time_now, uint16_t time_past);
+}
diff --git a/tos/chips/tda5250/mac/TimeDiff32.nc b/tos/chips/tda5250/mac/TimeDiff32.nc
new file mode 100644
index 00000000..8f4b0eaa
--- /dev/null
+++ b/tos/chips/tda5250/mac/TimeDiff32.nc
@@ -0,0 +1,39 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Manipulate time differences, with overflow checking
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de
+ */
+
+interface TimeDiff32 {
+    /** compute delta of two times (now - past),
+        checks for overflow assuming that now is always > past */
+    async command uint32_t computeDelta(uint32_t time_now, uint32_t time_past);
+}
diff --git a/tos/chips/tda5250/mac/TimeDiffC.nc b/tos/chips/tda5250/mac/TimeDiffC.nc
new file mode 100644
index 00000000..162084d7
--- /dev/null
+++ b/tos/chips/tda5250/mac/TimeDiffC.nc
@@ -0,0 +1,64 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of timediff interface
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+
+module TimeDiffC {
+    provides {
+        interface TimeDiff32;
+        interface TimeDiff16;
+    }
+}
+implementation {
+    async command uint32_t TimeDiff32.computeDelta(uint32_t time_now, uint32_t time_past) {
+        uint32_t rval;
+        if(time_now >= time_past) {
+            rval = time_now - time_past;
+        }
+        else {
+            rval = (uint32_t)(-1) - time_past + time_now;
+        }
+        return rval;
+    }
+
+    async command uint16_t TimeDiff16.computeDelta(uint16_t time_now, uint16_t time_past) {
+        uint16_t rval;
+        if(time_now >= time_past) {
+            rval = time_now - time_past;
+        }
+        else {
+            rval = (uint16_t)(-1) - time_past + time_now;
+        }
+        return rval;
+    }
+}
+
diff --git a/tos/chips/tda5250/tda5250Const.h b/tos/chips/tda5250/tda5250Const.h
new file mode 100644
index 00000000..23d07800
--- /dev/null
+++ b/tos/chips/tda5250/tda5250Const.h
@@ -0,0 +1,288 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * ========================================================================
+ */
+
+ /**
+ * tda5250Const Header File
+ * Defines constants and macros for use with the TDA5250 Radio
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+#ifndef TDA5250CONST_H
+#define TDA5250CONST_H
+
+// List of valid output frequencies for clock
+typedef enum {
+   CLOCK_OUT_FREQ_NINE_MHZ                        = 0x00,
+   CLOCK_OUT_FREQ_FOUR_POINT_FIVE_MHZ             = 0x01,
+   CLOCK_OUT_FREQ_THREE_MHZ                       = 0x02,
+   CLOCK_OUT_FREQ_TWO_POINT_TWO_FIVE_MHZ          = 0x03,
+   CLOCK_OUT_FREQ_ONE_POINT_EIGHT_MHZ             = 0x04,
+   CLOCK_OUT_FREQ_ONE_POINT_FIVE_MHZ              = 0x05,
+   CLOCK_OUT_FREQ_ONE_POINT_TWO_EIGHT_MHZ         = 0x06,
+   CLOCK_OUT_FREQ_ONE_POINT_ONE_TWO_FIVE_MHZ      = 0x07,
+   CLOCK_OUT_FREQ_ONE_MHZ                         = 0x08,
+   CLOCK_OUT_FREQ_POINT_NINE_MHZ                  = 0x09,
+   CLOCK_OUT_FREQ_POINT_EIGHT_TWO_MHZ             = 0x0A,
+   CLOCK_OUT_FREQ_POINT_SEVEN_FIVE_MHZ            = 0x0B,
+   CLOCK_OUT_FREQ_POINT_SIX_NINE_MHZ              = 0x0C,
+   CLOCK_OUT_FREQ_POINT_SIX_FOUR_MHZ              = 0x0D,
+   CLOCK_OUT_FREQ_POINT_SIX_MHZ                   = 0x0E,
+   CLOCK_OUT_FREQ_POINT_FIVE_SIX_MHZ              = 0x0F,
+   CLOCK_OUT_FREQ_THIRTY_TWO_KHZ                  = 0x80,
+   CLOCK_OUT_FREQ_WINDOW_COUNT_COMPLETE           = 0xC0
+} tda5250_clock_out_freqs_t;
+
+//List of valid cutoff frequencies for the IQ Filter
+typedef enum {
+   DATA_CUTOFF_FREQ_FIVE_KHZ                        = 0x00,
+   DATA_CUTOFF_FREQ_SEVEN_KHZ                       = 0x01,
+   DATA_CUTOFF_FREQ_NINE_KHZ                        = 0x02,
+   DATA_CUTOFF_FREQ_ELEVEN_KHZ                      = 0x03,
+   DATA_CUTOFF_FREQ_FOURTEEN_KHZ                    = 0x04,
+   DATA_CUTOFF_FREQ_EIGHTEEN_KHZ                    = 0x05,
+   DATA_CUTOFF_FREQ_TWENTY_THREE_KHZ                = 0x06,
+   DATA_CUTOFF_FREQ_TWENTY_EIGHT_KHZ                = 0x07,
+   DATA_CUTOFF_FREQ_THIRTY_TWO_KHZ                  = 0x08,
+   DATA_CUTOFF_FREQ_THIRTY_NINE_KHZ                 = 0x09,
+   DATA_CUTOFF_FREQ_FOURTY_NINE_KHZ                 = 0x0A,
+   DATA_CUTOFF_FREQ_FIFTY_FIVE_KHZ                  = 0x0B,
+   DATA_CUTOFF_FREQ_SIXTY_FOUR_KHZ                  = 0x0C,
+   DATA_CUTOFF_FREQ_SEVENTY_THREE_KHZ               = 0x0D,
+   DATA_CUTOFF_FREQ_EIGHTY_SIX_KHZ                  = 0x0E,
+   DATA_CUTOFF_FREQ_ONE_HUNDRED_TWO_KHZ             = 0x0F
+} tda5250_data_cutoff_freqs_t;
+
+//List of valid cutoff frequencies for the Lowpass
+  //data filter
+typedef enum {
+   IQ_CUTOFF_FREQ_THREE_HUNDRED_FIFTY_KHZ         = 0x01,
+   IQ_CUTOFF_FREQ_TWO_HUNDRED_FIFTY_KHZ           = 0x02,
+   IQ_CUTOFF_FREQ_TWO_HUNDRED_KHZ                 = 0x03,
+   IQ_CUTOFF_FREQ_ONE_HUNDRED_FIFTY_KHZ           = 0x04,
+   IQ_CUTOFF_FREQ_ONE_HUNDRED_KHZ                 = 0x05,
+   IQ_CUTOFF_FREQ_FIFTY_KHZ                       = 0x06
+} tda5250_iq_cutoff_freqs_t;
+
+//List of valid capacitor values for tuning the nominal
+  //frequency setting
+typedef enum {
+   CAP_VAL_ZERO_F                          = 0x00,
+   CAP_VAL_TWO_HUNDRED_FIFTY_FF            = 0x01,
+   CAP_VAL_FIVE_HUNDRED_FIFTY_FF           = 0x02,
+   CAP_VAL_SEVEN_HUNDRED_FIFTY_FF          = 0x03,
+   CAP_VAL_ONE_PF                          = 0x04,
+   CAP_VAL_ONE_POINT_TWO_FIVE_PF           = 0x05,
+   CAP_VAL_ONE_POINT_FIVE_PF               = 0x06,
+   CAP_VAL_ONE_POINT_SEVEN_FIVE_PF         = 0x07,
+   CAP_VAL_TWO_PF                          = 0x08,
+   CAP_VAL_TWO_POINT_TWO_FIVE_PF           = 0x09,
+   CAP_VAL_TWO_POINT_FIVE_PF               = 0x0A,
+   CAP_VAL_TWO_POINT_SEVEN_FIVE_PF         = 0x0B,
+   CAP_VAL_THREE_PF                        = 0x0C,
+   CAP_VAL_THREE_POINT_TWO_FIVE_PF         = 0x0D,
+   CAP_VAL_THREE_POINT_FIVE_PF             = 0x0E,
+   CAP_VAL_THREE_POINT_SEVEN_FIVE_PF       = 0x0F,
+   CAP_VAL_FOUR_PF                         = 0x10,
+   CAP_VAL_FOUR_POINT_TWO_FIVE_PF          = 0x11,
+   CAP_VAL_FOUR_POINT_FIVE_PF              = 0x12,
+   CAP_VAL_FOUR_POINT_SEVEN_FIVE_PF        = 0x13,
+   CAP_VAL_FIVE_PF                         = 0x14,
+   CAP_VAL_FIVE_POINT_TWO_FIVE_PF          = 0x15,
+   CAP_VAL_FIVE_POINT_FIVE_PF              = 0x16,
+   CAP_VAL_FIVE_POINT_SEVEN_FIVE_PF        = 0x17,
+   CAP_VAL_SIX_PF                          = 0x18,
+   CAP_VAL_SIX_POINT_TWO_FIVE_PF           = 0x19,
+   CAP_VAL_SIX_POINT_FIVE_PF               = 0x1A,
+   CAP_VAL_SIX_POINT_SEVEN_FIVE_PF         = 0x1B,
+   CAP_VAL_SEVEN_PF                        = 0x1C,
+   CAP_VAL_SEVEN_POINT_TWO_FIVE_PF         = 0x1D,
+   CAP_VAL_SEVEN_POINT_FIVE_PF             = 0x1E,
+   CAP_VAL_SEVEN_POINT_SEVEN_FIVE_PF       = 0x1F,
+   CAP_VAL_EIGHT_PF                        = 0x10,
+   CAP_VAL_EIGHT_POINT_TWO_FIVE_PF         = 0x11,
+   CAP_VAL_EIGHT_POINT_FIVE_PF             = 0x12,
+   CAP_VAL_EIGHT_POINT_SEVEN_FIVE_PF       = 0x13,
+   CAP_VAL_NINE_PF                         = 0x14,
+   CAP_VAL_NINE_POINT_TWO_FIVE_PF          = 0x15,
+   CAP_VAL_NINE_POINT_FIVE_PF              = 0x16,
+   CAP_VAL_NINE_POINT_SEVEN_FIVE_PF        = 0x17,
+   CAP_VAL_TEN_PF                          = 0x18,
+   CAP_VAL_TEN_POINT_TWO_FIVE_PF           = 0x19,
+   CAP_VAL_TEN_POINT_FIVE_PF               = 0x1A,
+   CAP_VAL_TEN_POINT_SEVEN_FIVE_PF         = 0x1B,
+   CAP_VAL_ELEVEN_PF                       = 0x1C,
+   CAP_VAL_ELEVEN_POINT_TWO_FIVE_PF        = 0x1D,
+   CAP_VAL_ELEVEN_POINT_FIVE_PF            = 0x1E,
+   CAP_VAL_ELEVEN_POINT_SEVEN_FIVE_PF      = 0x1F,
+   CAP_VAL_TWELVE_PF                       = 0x10,
+   CAP_VAL_TWELVE_POINT_TWO_FIVE_PF        = 0x11,
+   CAP_VAL_TWELVE_POINT_FIVE_PF            = 0x12,
+   CAP_VAL_TWELVE_POINT_SEVEN_FIVE_PF      = 0x13,
+   CAP_VAL_THIRTEEN_PF                     = 0x14,
+   CAP_VAL_THIRTEEN_POINT_TWO_FIVE_PF      = 0x15,
+   CAP_VAL_THIRTEEN_POINT_FIVE_PF          = 0x16,
+   CAP_VAL_THIRTEEN_POINT_SEVEN_FIVE_PF    = 0x17,
+   CAP_VAL_FOURTEEN_PF                     = 0x18,
+   CAP_VAL_FOURTEEN_POINT_TWO_FIVE_PF      = 0x19,
+   CAP_VAL_FOURTEEN_POINT_FIVE_PF          = 0x1A,
+   CAP_VAL_FOURTEEN_POINT_SEVEN_FIVE_PF    = 0x1B,
+   CAP_VAL_FIFTEEN_PF                      = 0x1C,
+   CAP_VAL_FIFTEEN_POINT_TWO_FIVE_PF       = 0x1D,
+   CAP_VAL_FIFTEEN_POINT_FIVE_PF           = 0x1E,
+   CAP_VAL_FIFTEEN_POINT_SEVEN_FIVE_PF     = 0x1F
+} tda5250_cap_vals_t;
+
+//List of valid times for Bipolar Ramp
+typedef enum {
+   BIPOLAR_FET_RAMP_TIME_LESS_THAN_TWO_MS                = 0x01,
+   BIPOLAR_FET_RAMP_TIME_FOUR_MS                         = 0x03,
+   BIPOLAR_FET_RAMP_TIME_EIGHT_MS                        = 0x05,
+   BIPOLAR_FET_RAMP_TIME_TWELVE_MS                       = 0x07
+} tda5250_bipolar_fet_ramp_times_t;
+
+#define TDA5250_RECEIVE_FREQUENCY               868.3      // kHz
+#define TDA5250_OSCILLATOR_FREQUENCY            ((3.0/4.0) * TDA5250_RECEIVE_FREQUENCY) // kHz
+#define TDA5250_INTERMEDIATE_FREQUENCY          ((3.0) * TDA5250_RECEIVE_FREQUENCY) // kHz
+#define TDA5250_INTERNAL_OSC_FREQUENCY          32.768 //kHz
+#define TDA5250_CLOCK_OUT_BASE_FREQUENCY        18089.6 //kHz
+#define TDA5250_CONSTANT_FOR_FREQ_TO_TH_VALUE   2261  //khz of integer for 18089.6/2/4
+#define TDA5250_CONVERT_TIME(time)         ((uint16_t)(0xFFFF - ((time*TDA5250_INTERNAL_OSC_FREQUENCY))))
+#define TDA5250_CONVERT_FREQ_TO_TH_VALUE(freq, clock_freq) \
+           ((TDA5250_CONSTANT_FOR_FREQ_TO_TH_VALUE/(clock_freq*freq))*1000)
+
+#define TDA5250_SYSTEM_SETUP_TIME            (12000/TDA5250_INTERNAL_OSC_FREQUENCY) //12000us
+#define TDA5250_RECEIVER_SETUP_TIME           (2860/TDA5250_INTERNAL_OSC_FREQUENCY) // 2860us
+#define TDA5250_DATA_DETECTION_SETUP_TIME     (3380/TDA5250_INTERNAL_OSC_FREQUENCY) // 3380us
+#define TDA5250_RSSI_STABLE_TIME              (3380/TDA5250_INTERNAL_OSC_FREQUENCY) // 3380us
+#define TDA5250_CLOCK_OUT_SETUP_TIME           (500/TDA5250_INTERNAL_OSC_FREQUENCY) //  500us
+#define TDA5250_TRANSMITTER_SETUP_TIME        (1430/TDA5250_INTERNAL_OSC_FREQUENCY) // 1430us
+#define TDA5250_XTAL_STARTUP_TIME              (500/TDA5250_INTERNAL_OSC_FREQUENCY) //  500us
+
+// Subaddresses of data registers write
+#define TDA5250_REG_ADDR_CONFIG            0x00
+#define TDA5250_REG_ADDR_FSK               0x01
+#define TDA5250_REG_ADDR_XTAL_TUNING       0x02
+#define TDA5250_REG_ADDR_LPF               0x03
+#define TDA5250_REG_ADDR_ON_TIME           0x04
+#define TDA5250_REG_ADDR_OFF_TIME          0x05
+#define TDA5250_REG_ADDR_COUNT_TH1         0x06
+#define TDA5250_REG_ADDR_COUNT_TH2         0x07
+#define TDA5250_REG_ADDR_RSSI_TH3          0x08
+#define TDA5250_REG_ADDR_CLK_DIV           0x0D
+#define TDA5250_REG_ADDR_XTAL_CONFIG       0x0E
+#define TDA5250_REG_ADDR_BLOCK_PD          0x0F
+
+// Subaddresses of data registers read
+#define TDA5250_REG_ADDR_STATUS            0x80
+#define TDA5250_REG_ADDR_ADC               0x81
+
+// Mask Values for write registers (16 or 8 bit)
+/************* Apply these masks by & with original */
+#define MASK_CONFIG_SLICER_RC_INTEGRATOR       0x7FFF
+#define MASK_CONFIG_ALL_PD_NORMAL              0xBFFF
+#define MASK_CONFIG_TESTMODE_NORMAL            0xDFFF
+#define MASK_CONFIG_CONTROL_TXRX_EXTERNAL      0xEFFF
+#define MASK_CONFIG_ASK_NFSK_FSK               0xF7FF
+#define MASK_CONFIG_RX_NTX_TX                  0xFBFF
+#define MASK_CONFIG_CLK_EN_OFF                 0xFDFF
+#define MASK_CONFIG_RX_DATA_INV_NO             0xFEFF
+#define MASK_CONFIG_D_OUT_IFVALID              0xFF7F
+#define MASK_CONFIG_ADC_MODE_ONESHOT           0xFFBF
+#define MASK_CONFIG_F_COUNT_MODE_ONESHOT       0xFFDF
+#define MASK_CONFIG_LNA_GAIN_LOW               0xFFEF
+#define MASK_CONFIG_EN_RX_DISABLE              0xFFF7
+#define MASK_CONFIG_MODE_2_SLAVE               0xFFFB
+#define MASK_CONFIG_MODE_1_SLAVE_TIMER         0xFFFD
+#define MASK_CONFIG_PA_PWR_LOWTX               0xFFFE
+/************* Apply these masks by | with original */
+#define MASK_CONFIG_SLICER_PEAK_DETECTOR       0x8000
+#define MASK_CONFIG_ALL_PD_POWER_DOWN          0x4000
+#define MASK_CONFIG_TESTMODE_TESTMODE          0x2000
+#define MASK_CONFIG_CONTROL_TXRX_REGISTER      0x1000
+#define MASK_CONFIG_ASK_NFSK_ASK               0x0800
+#define MASK_CONFIG_RX_NTX_RX                  0x0400
+#define MASK_CONFIG_CLK_EN_ON                  0x0200
+#define MASK_CONFIG_RX_DATA_INV_YES            0x0100
+#define MASK_CONFIG_D_OUT_ALWAYS               0x0080
+#define MASK_CONFIG_ADC_MODE_CONT              0x0040
+#define MASK_CONFIG_F_COUNT_MODE_CONT          0x0020
+#define MASK_CONFIG_LNA_GAIN_HIGH              0x0010
+#define MASK_CONFIG_EN_RX_ENABLE               0x0008
+#define MASK_CONFIG_MODE_2_TIMER               0x0004
+#define MASK_CONFIG_MODE_1_SELF_POLLING        0x0002
+#define MASK_CONFIG_PA_PWR_HIGHTX              0x0001
+
+// Mask Values for write registers (16 or 8 bit)
+/************* Apply these masks by & with original */
+#define CONFIG_SLICER_RC_INTEGRATOR(config)       (config & 0x7FFF)
+#define CONFIG_ALL_PD_NORMAL(config)              (config & 0xBFFF)
+#define CONFIG_TESTMODE_NORMAL(config)            (config & 0xDFFF)
+#define CONFIG_CONTROL_TXRX_EXTERNAL(config)      (config & 0xEFFF)
+#define CONFIG_ASK_NFSK_FSK(config)               (config & 0xF7FF)
+#define CONFIG_RX_NTX_TX(config)                  (config & 0xFBFF)
+#define CONFIG_CLK_EN_OFF(config)                 (config & 0xFDFF)
+#define CONFIG_RX_DATA_INV_NO(config)             (config & 0xFEFF)
+#define CONFIG_D_OUT_IFVALID(config)              (config & 0xFF7F)
+#define CONFIG_ADC_MODE_ONESHOT(config)           (config & 0xFFBF)
+#define CONFIG_F_COUNT_MODE_ONESHOT(config)       (config & 0xFFDF)
+#define CONFIG_LNA_GAIN_LOW(config)               (config & 0xFFEF)
+#define CONFIG_EN_RX_DISABLE(config)              (config & 0xFFF7)
+#define CONFIG_MODE_2_SLAVE(config)               (config & 0xFFFB)
+#define CONFIG_MODE_1_SLAVE_OR_TIMER(config)      (config & 0xFFFD)
+#define CONFIG_PA_PWR_LOWTX(config)               (config & 0xFFFE)
+#define XTAL_CONFIG_FET(xtal)                     (xtal & 0xFE)
+#define XTAL_CONFIG_FSK_RAMP0_FALSE(xtal)         (xtal & 0xFB)
+#define XTAL_CONFIG_FSK_RAMP1_FALSE(xtal)         (xtal & 0xFD)
+/************* Apply these masks by | with original */
+#define CONFIG_SLICER_PEAK_DETECTOR(config)       (config | 0x8000)
+#define CONFIG_ALL_PD_POWER_DOWN(config)          (config | 0x4000)
+#define CONFIG_TESTMODE_TESTMODE(config)          (config | 0x2000)
+#define CONFIG_CONTROL_TXRX_REGISTER(config)      (config | 0x1000)
+#define CONFIG_ASK_NFSK_ASK(config)               (config | 0x0800)
+#define CONFIG_RX_NTX_RX(config)                  (config | 0x0400)
+#define CONFIG_CLK_EN_ON(config)                  (config | 0x0200)
+#define CONFIG_RX_DATA_INV_YES(config)            (config | 0x0100)
+#define CONFIG_D_OUT_ALWAYS(config)               (config | 0x0080)
+#define CONFIG_ADC_MODE_CONT(config)              (config | 0x0040)
+#define CONFIG_F_COUNT_MODE_CONT(config)          (config | 0x0020)
+#define CONFIG_LNA_GAIN_HIGH(config)              (config | 0x0010)
+#define CONFIG_EN_RX_ENABLE(config)               (config | 0x0008)
+#define CONFIG_MODE_2_TIMER(config)               (config | 0x0004)
+#define CONFIG_MODE_1_SELF_POLLING(config)        (config | 0x0002)
+#define CONFIG_PA_PWR_HIGHTX(config)              (config | 0x0001)
+#define XTAL_CONFIG_BIPOLAR(xtal)                 (xtal | 0x01)
+#define XTAL_CONFIG_FSK_RAMP0_TRUE(xtal)          (xtal | 0x04)
+#define XTAL_CONFIG_FSK_RAMP1_TRUE(xtal)          (xtal | 0x02)
+
+#endif //TDA5250CONST_H
diff --git a/tos/chips/tda5250/tda5250Control.h b/tos/chips/tda5250/tda5250Control.h
new file mode 100644
index 00000000..2fef4ca2
--- /dev/null
+++ b/tos/chips/tda5250/tda5250Control.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * Macros for configuring the TDA5250.
+ * - Revision ------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * Author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#ifndef TDA5250CONTROL_H
+#define TDA5250CONTROL_H
+
+typedef enum {
+  RADIO_MODE_ON_TRANSITION,
+  RADIO_MODE_ON,
+  RADIO_MODE_OFF_TRANSITION,
+  RADIO_MODE_OFF,
+  RADIO_MODE_TX_TRANSITION,
+  RADIO_MODE_TX,
+  RADIO_MODE_RX_TRANSITION,
+  RADIO_MODE_RX,
+  RADIO_MODE_CCA_TRANSITION,
+  RADIO_MODE_CCA,
+  RADIO_MODE_TIMER_TRANSITION,
+  RADIO_MODE_TIMER,
+  RADIO_MODE_SELF_POLLING_TRANSITION,
+  RADIO_MODE_SELF_POLLING,
+  RADIO_MODE_SLEEP_TRANSITION,
+  RADIO_MODE_SLEEP
+} radioMode_t;
+
+#define INIT_RSSI_THRESHOLD     26
+#define TH1_VALUE               0x0000
+#define TH2_VALUE               0xFFFF
+
+#endif //TDA5250CONTROL_H
diff --git a/tos/chips/tda5250/tda5250RegDefaultsSettings.h b/tos/chips/tda5250/tda5250RegDefaultsSettings.h
new file mode 100644
index 00000000..19037101
--- /dev/null
+++ b/tos/chips/tda5250/tda5250RegDefaultsSettings.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * ========================================================================
+ */
+
+ /**
+ * tda5250RegDefaultSettings Header File
+ * Defines the default values of the registers for the TDA5250 Radio
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+#ifndef TDA5250REGDEFAULTSETTINGS_H
+#define TDA5250REGDEFAULTSETTINGS_H
+
+// Default values of data registers
+#define TDA5250_REG_DEFAULT_SETTING_CONFIG           0x04F9
+#define TDA5250_REG_DEFAULT_SETTING_FSK              0x0A0C
+#define TDA5250_REG_DEFAULT_SETTING_XTAL_TUNING      0x0012
+#define TDA5250_REG_DEFAULT_SETTING_LPF              0x18
+#define TDA5250_REG_DEFAULT_SETTING_ON_TIME          0xFEC0
+#define TDA5250_REG_DEFAULT_SETTING_OFF_TIME         0xF380
+#define TDA5250_REG_DEFAULT_SETTING_COUNT_TH1        0x0000
+#define TDA5250_REG_DEFAULT_SETTING_COUNT_TH2        0x0001
+#define TDA5250_REG_DEFAULT_SETTING_RSSI_TH3         0xFF
+#define TDA5250_REG_DEFAULT_SETTING_CLK_DIV          0x08
+#define TDA5250_REG_DEFAULT_SETTING_XTAL_CONFIG      0x01
+#define TDA5250_REG_DEFAULT_SETTING_BLOCK_PD         0xFFFF
+
+#endif //TDA5250REGDEFAULTSETTINGS_H
+
diff --git a/tos/chips/tda5250/tda5250RegTypes.h b/tos/chips/tda5250/tda5250RegTypes.h
new file mode 100644
index 00000000..f08d4ad1
--- /dev/null
+++ b/tos/chips/tda5250/tda5250RegTypes.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:13 $
+ * ========================================================================
+ */
+
+ /**
+ * tda5250RegTypes Header File
+ * Defines the register types for the registers on the TDA5250 Radio
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+#ifndef TDA5250REGTYPES_H
+#define TDA5250REGTYPES_H
+
+//Macro for receiving an address and figuring out its type
+#define TDA5250_REG_TYPE(addr) TDA5250_REG_TYPE_#addr
+
+// Default values of data registers
+#define TDA5250_REG_TYPE_CONFIG           uint16_t
+#define TDA5250_REG_TYPE_FSK              uint16_t
+#define TDA5250_REG_TYPE_XTAL_TUNING      uint16_t
+#define TDA5250_REG_TYPE_LPF              uint8_t
+#define TDA5250_REG_TYPE_ON_TIME          uint16_t
+#define TDA5250_REG_TYPE_OFF_TIME         uint16_t
+#define TDA5250_REG_TYPE_COUNT_TH1        uint16_t
+#define TDA5250_REG_TYPE_COUNT_TH2        uint16_t
+#define TDA5250_REG_TYPE_RSSI_TH3         uint8_t
+#define TDA5250_REG_TYPE_RF_POWER         uint8_t
+#define TDA5250_REG_TYPE_CLK_DIV          uint8_t
+#define TDA5250_REG_TYPE_XTAL_CONFIG      uint8_t
+#define TDA5250_REG_TYPE_BLOCK_PD         uint16_t
+#define TDA5250_REG_TYPE_STATUS           uint8_t
+#define TDA5250_REG_TYPE_ADC              uint8_t
+
+#endif //TDA5250REGTYPES_H
+
diff --git a/tos/chips/tda5250/tda5250_message.h b/tos/chips/tda5250/tda5250_message.h
new file mode 100644
index 00000000..b6053fde
--- /dev/null
+++ b/tos/chips/tda5250/tda5250_message.h
@@ -0,0 +1,40 @@
+#ifndef TDA5250_MESSAGE_H
+#define TDA5250_MESSAGE_H
+
+#include "AM.h"
+#include "PacketAck.h"
+
+/*
+ * highest bit of token set: this message is ACK and not intended for the
+ * upper layers. Token is used for alternating bit like duplicate detection,
+ * and set by the sender in [0,127] intervall. The receiver reflects the
+ * token in the Ack, with the highest bit set. 
+ */
+
+typedef nx_struct tda5250_header_t {
+  nx_uint8_t    length;
+  nx_am_addr_t  src;
+  nx_am_addr_t  dest;
+  nx_am_id_t    type;
+  nx_uint8_t    token;
+} tda5250_header_t;
+
+typedef nx_struct tda5250_footer_t {
+  nxle_uint16_t crc;
+} tda5250_footer_t;
+
+typedef nx_struct tda5250_metadata_t {
+  nx_uint16_t strength;
+  nx_uint8_t ack;
+  /* local time when message was generated */
+  nx_uint32_t time;
+  /* time of sfd generation */
+  nx_uint32_t sfdtime;
+  nx_uint8_t sendSecurityMode;
+  nx_uint8_t receiveSecurityMode;
+  /* some meta information that allows to compute a density */
+  nx_uint8_t maxRepetitions;
+  nx_uint8_t repetitions;
+} tda5250_metadata_t;
+
+#endif
diff --git a/tos/chips/tmp175/HalTMP175Advanced.nc b/tos/chips/tmp175/HalTMP175Advanced.nc
new file mode 100644
index 00000000..c4d106ed
--- /dev/null
+++ b/tos/chips/tmp175/HalTMP175Advanced.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HalTMP175Advanced is the HAL control interface for the TI TMP175
+ * Digital Temperature Sensor. 
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+#include "TMP175.h"
+
+interface HalTMP175Advanced {
+
+  command error_t setThermostatMode(bool useInt);
+  event void setThermostatModeDone(error_t error);
+  command error_t setPolarity(bool polarity);
+  event void setPolarityDone(error_t error);
+  command error_t setFaultQueue(tmp175_fqd_t depth);
+  event void setFaultQueueDone(error_t error);
+  command error_t setResolution(tmp175_res_t res);
+  event void setResolutionDone(error_t error);
+  command error_t setTLow(uint16_t val);
+  event void setTLowDone(error_t error);
+  command error_t setTHigh(uint16_t val);
+  event void setTHighDone(error_t error);
+  
+  event void alertThreshold();
+
+}
diff --git a/tos/chips/tmp175/HalTMP175ControlP.nc b/tos/chips/tmp175/HalTMP175ControlP.nc
new file mode 100644
index 00000000..8c2ca56a
--- /dev/null
+++ b/tos/chips/tmp175/HalTMP175ControlP.nc
@@ -0,0 +1,294 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HalTMP175ControlP device specific Hal interfaces for the TI TMP175 Chip.
+ *
+ * Note that only the data path uses split phase resource arbitration
+ * 
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+module HalTMP175ControlP
+{
+  provides interface HalTMP175Advanced;
+
+  uses interface HplTMP175;
+  uses interface Resource as TMP175Resource;
+}
+
+implementation {
+
+  enum {
+    STATE_SET_MODE,
+    STATE_SET_POLARITY,
+    STATE_SET_FQ,
+    STATE_SET_RES,
+    STATE_NONE,
+
+    STATE_SET_TLOW,
+    STATE_SET_THIGH,
+  };
+
+  uint8_t mState = STATE_NONE;
+  uint8_t mConfigRegVal = 0;
+  error_t mHplError;
+
+  task void complete_Alert() {
+    signal HalTMP175Advanced.alertThreshold();
+  }
+
+  static error_t setCfg(uint8_t nextState, uint32_t val) {
+    error_t error;
+
+    mState = nextState;
+
+    error = call HplTMP175.setConfigReg(val);
+
+    if (error) {
+      call TMP175Resource.release();
+    }
+    else {
+      mConfigRegVal = val;
+    }
+
+    return error;
+  }
+
+  static error_t setThresh(uint8_t nextState, uint32_t val) {
+    error_t error;
+
+    mState = nextState;
+
+    if(mState == STATE_SET_TLOW)
+      error = call HplTMP175.setTLowReg(val << 4);
+    else
+      error = call HplTMP175.setTHighReg(val << 4);
+
+    if (error) {
+      call TMP175Resource.release();
+    }
+
+    return error;
+  }
+
+  command error_t HalTMP175Advanced.setThermostatMode(bool useInt) {
+    error_t error;
+    uint8_t newRegVal;
+
+    error = call TMP175Resource.immediateRequest();
+    if (error) {
+      return error;
+    }
+
+    newRegVal = (useInt) ? (mConfigRegVal | TMP175_CFG_TM) : (mConfigRegVal & ~TMP175_CFG_TM);
+    error = setCfg(STATE_SET_MODE, newRegVal);
+
+    return error;
+  }
+
+
+  command error_t HalTMP175Advanced.setPolarity(bool polarity) {
+    error_t error;
+    uint8_t newRegVal;
+
+    error = call TMP175Resource.immediateRequest();
+    if (error) {
+      return error;
+    }
+
+    newRegVal = (polarity) ? (mConfigRegVal | TMP175_CFG_POL) : (mConfigRegVal & ~TMP175_CFG_POL);
+    error = setCfg(STATE_SET_POLARITY, newRegVal);
+
+    return error;
+  }
+
+  command error_t HalTMP175Advanced.setFaultQueue(tmp175_fqd_t depth) {
+    error_t error;
+    uint8_t newRegVal;
+
+    if ((uint8_t)depth > 3) {
+      error = EINVAL;
+      return error;
+    }
+
+    error = call TMP175Resource.immediateRequest();
+    if (error) {
+      return error;
+    }
+
+    newRegVal = (mConfigRegVal & ~TMP175_CFG_FQ(3)) | (TMP175_CFG_FQ(depth));
+    error = setCfg(STATE_SET_FQ, newRegVal);
+
+    return error;
+  }
+
+  command error_t HalTMP175Advanced.setResolution(tmp175_res_t res) {
+    error_t error;
+    uint8_t newRegVal;
+
+    if ((uint8_t)res > 3) {
+      error = EINVAL;
+      return error;
+    }
+
+    error = call TMP175Resource.immediateRequest();
+    if (error) {
+      return error;
+    }
+
+    newRegVal = (mConfigRegVal & ~TMP175_CFG_RES(3)) | (TMP175_CFG_RES(res));
+    error = setCfg(STATE_SET_RES, newRegVal);
+
+    return error;
+  }
+
+  command error_t HalTMP175Advanced.setTLow(uint16_t val) {
+    error_t error;
+
+    error = call TMP175Resource.immediateRequest();
+    if (error) {
+      return error;
+    }
+
+    error = setThresh(STATE_SET_TLOW, val);
+
+    if (error) {
+      call TMP175Resource.release();
+    }
+
+    return error;
+  }
+
+  command error_t HalTMP175Advanced.setTHigh(uint16_t val) {
+    error_t error;
+
+    error = call TMP175Resource.immediateRequest();
+    if (error) {
+      return error;
+    }
+
+    error = setThresh(STATE_SET_THIGH, val);
+
+    if (error) {
+      call TMP175Resource.release();
+    }
+
+    return error;
+  }
+
+  task void handleConfigReg() {
+    error_t lasterror;
+    atomic lasterror = mHplError;
+    call TMP175Resource.release();
+    switch (mState) {
+    case STATE_SET_MODE:
+      mState = STATE_NONE;
+      signal HalTMP175Advanced.setThermostatModeDone(lasterror);
+      break;
+    case STATE_SET_POLARITY:
+      mState = STATE_NONE;
+      signal HalTMP175Advanced.setPolarityDone(lasterror);
+      break;
+    case STATE_SET_FQ:
+      mState = STATE_NONE;
+      signal HalTMP175Advanced.setFaultQueueDone(lasterror);
+      break;
+    case STATE_SET_RES:
+      mState = STATE_NONE;
+      signal HalTMP175Advanced.setResolutionDone(lasterror);
+      break;
+    default:
+      break;
+    }
+    //mState = STATE_NONE;
+    return;
+  }
+
+  task void handleTReg() {
+    error_t lasterror;
+    atomic lasterror = mHplError;
+    call TMP175Resource.release();
+    switch (mState) {
+    case STATE_SET_TLOW:
+      mState = STATE_NONE;
+      signal HalTMP175Advanced.setTLowDone(lasterror);
+      break;
+    case STATE_SET_THIGH:
+      mState = STATE_NONE;
+      signal HalTMP175Advanced.setTHighDone(lasterror);
+      break;
+    default:
+      mState = STATE_NONE;
+      break;
+    }
+    //mState = STATE_NONE;
+  }
+
+  event void TMP175Resource.granted() {
+    // intentionally left blank
+  }
+
+  async event void HplTMP175.setConfigRegDone(error_t error) {
+    mHplError = error;
+    post handleConfigReg();
+    return;
+  }
+
+  async event void HplTMP175.setTLowRegDone(error_t error) {
+    mHplError = error;
+    post handleTReg();
+
+  }
+
+  async event void HplTMP175.setTHighRegDone(error_t error) {
+    mHplError = error;
+    post handleTReg();
+  }
+
+  async event void HplTMP175.alertThreshold() {
+    post complete_Alert();
+  }
+
+  async event void HplTMP175.measureTemperatureDone(error_t error, uint16_t val) {
+    // intentionally left blank
+  }
+  
+  default event void HalTMP175Advanced.setTHighDone(error_t error) { return; }
+  default event void HalTMP175Advanced.setThermostatModeDone(error_t error){ return; } 
+  default event void HalTMP175Advanced.setPolarityDone(error_t error){ return; }
+  default event void HalTMP175Advanced.setFaultQueueDone(error_t error){ return; }
+  default event void HalTMP175Advanced.setResolutionDone(error_t error){ return; }
+  default event void HalTMP175Advanced.setTLowDone(error_t error){ return; }
+  default event void HalTMP175Advanced.alertThreshold(){ return; }
+  
+}
diff --git a/tos/chips/tmp175/HalTMP175ReaderP.nc b/tos/chips/tmp175/HalTMP175ReaderP.nc
new file mode 100644
index 00000000..7adc6dcb
--- /dev/null
+++ b/tos/chips/tmp175/HalTMP175ReaderP.nc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HalTMP175ReaderP provides the service level HIL and device
+ * specific Hal interfaces for the TI TMP175 Chip.
+ *
+ * Note that only the data path uses split phase resource arbitration
+ * 
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+generic module HalTMP175ReaderP()
+{
+  provides interface Read<uint16_t> as Temperature;
+
+  uses interface HplTMP175;
+  uses interface Resource as TMP175Resource;
+}
+
+implementation {
+
+  enum {
+    STATE_SET_MODE,
+    STATE_SET_POLARITY,
+    STATE_SET_FQ,
+    STATE_SET_RES,
+    STATE_NONE
+  };
+
+  uint8_t mState = STATE_NONE;
+  uint8_t mConfigRegVal = 0;
+  error_t mHplError;
+
+  command error_t Temperature.read() {
+    return call TMP175Resource.request();
+  }
+
+  event void TMP175Resource.granted() {
+    error_t error;
+    
+    error = call HplTMP175.measureTemperature();
+    if (error) {
+      call TMP175Resource.release();
+      signal Temperature.readDone(error,0);
+    }
+    return;
+  }
+
+  async event void HplTMP175.measureTemperatureDone(error_t tmp175_error, uint16_t val) {
+    call TMP175Resource.release();
+    signal Temperature.readDone(tmp175_error,(val >> 4));
+    return;
+  }
+
+  // intentionally left empty
+  async event void HplTMP175.setTLowRegDone(error_t error) {}
+  async event void HplTMP175.setTHighRegDone(error_t error) {}
+  async event void HplTMP175.setConfigRegDone(error_t error) {}
+  async event void HplTMP175.alertThreshold() {}
+
+  default event void Temperature.readDone(error_t error, uint16_t val) {return ;}
+
+}
diff --git a/tos/chips/tmp175/HplTMP175.nc b/tos/chips/tmp175/HplTMP175.nc
new file mode 100644
index 00000000..abea49be
--- /dev/null
+++ b/tos/chips/tmp175/HplTMP175.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplTMP175 is the HPL inteface to the Texas Instrument TMP175 
+ * Digital Temperature Sensor. 
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+interface HplTMP175 {
+
+  /**
+   * Starts a temperature measurement.
+   *
+   * @return SUCCESS if the measurement will be made
+   */
+  command error_t measureTemperature();
+
+  /**
+   * Presents the result of a temperature measurement.
+   *
+   * @param error SUCCESS if the measurement was successful
+   * @param val the temperature reading
+   */
+  async event void measureTemperatureDone( error_t error, uint16_t val );
+
+  /**
+   * Sets a new value to the TMP175 configuration register.
+   *
+   * @param val the new value to be written
+   *
+   * @return SUCCESS if the set will be performed
+   */
+  command error_t setConfigReg( uint8_t val );
+
+  /**
+   * Signals the completion of the configuration register set.
+   *
+   * @param error SUCCESS if the set was successful
+   */
+  async event void setConfigRegDone( error_t error );
+
+  command error_t setTLowReg(uint16_t val);
+  async event void setTLowRegDone(error_t error);
+
+  command error_t setTHighReg(uint16_t val);
+  async event void setTHighRegDone(error_t error);
+
+  async event void alertThreshold();
+
+}
diff --git a/tos/chips/tmp175/HplTMP175LogicP.nc b/tos/chips/tmp175/HplTMP175LogicP.nc
new file mode 100644
index 00000000..7f1a1ce4
--- /dev/null
+++ b/tos/chips/tmp175/HplTMP175LogicP.nc
@@ -0,0 +1,283 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplTMP175LogicP is the driver for the TI TMP175. It requires an 
+ * I2C packet interface and provides the HplTMP175 HPL interface.
+ * This module DOES NOT apply any specific configuration to the GpioInterrupt 
+ * pin associated with the theshold alerts. This must be handled by an
+ * outside configuration/module according to the host platform.
+ * 
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+#include "TMP175.h"
+#include "I2C.h"
+
+generic module HplTMP175LogicP(uint16_t devAddr)
+{
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface HplTMP175;
+
+  uses interface I2CPacket<TI2CBasicAddr>;
+  uses interface GpioInterrupt as AlertInterrupt;
+  uses interface GeneralIO as InterruptPin;
+}
+
+implementation {
+
+  enum {
+    STATE_IDLE,
+    STATE_STARTING,
+    STATE_STOPPING,
+    STATE_STOPPED,
+    STATE_READTEMP,
+    STATE_SETCONFIG,
+    STATE_SETTHIGH,
+    STATE_SETTLOW,
+  };
+
+  bool mfPtrReset;
+  uint8_t mI2CBuffer[4];
+  uint8_t mState;
+  uint8_t mConfigRegVal;
+  norace error_t mSSError;
+
+  static error_t doSetReg(uint8_t nextState, uint8_t reg, uint8_t val) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = nextState;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = reg;
+    mI2CBuffer[1] = val;
+
+    error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,2,mI2CBuffer);
+    
+    if (error) 
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  static error_t doSetRegWord(uint8_t nextState, uint8_t reg, uint16_t val) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = nextState;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = reg;
+    mI2CBuffer[1] = (val >> 8) & 0xFF;
+    mI2CBuffer[2] = val & 0xFF;
+
+    error = call I2CPacket.write((I2C_START | I2C_STOP),devAddr,3,mI2CBuffer);
+    
+    if (error) 
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  task void StartDone() {
+    atomic mState = STATE_IDLE;
+    signal SplitControl.startDone(mSSError);
+    return;
+  }
+
+  task void StopDone() {
+    atomic mState = STATE_STOPPED;
+    signal SplitControl.stopDone(mSSError);
+    return;
+  }
+
+  command error_t Init.init() {
+    // careful! this can be changed via polarity I believe
+    call InterruptPin.makeInput();
+    call AlertInterrupt.enableRisingEdge();
+    mfPtrReset = FALSE;
+    mConfigRegVal = 0;
+    mState = STATE_STOPPED;
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.start() {
+    error_t error = SUCCESS;
+    atomic {
+      if (mState == STATE_STOPPED) { 
+	mState = STATE_IDLE; 
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    
+    if (error)
+      return error;
+    
+    return doSetReg(STATE_STARTING,TMP175_PTR_CFG,(mConfigRegVal & ~TMP175_CFG_SD));
+  }
+
+  command error_t SplitControl.stop() {
+    return doSetReg(STATE_STOPPING,TMP175_PTR_CFG,(mConfigRegVal | TMP175_CFG_SD));
+  }
+  
+  command error_t HplTMP175.measureTemperature() { 
+    error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = STATE_READTEMP;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = mI2CBuffer[1] = 0;
+
+    error = call I2CPacket.read(I2C_START | I2C_STOP, devAddr,2,mI2CBuffer);
+
+    if (error)
+      atomic mState = STATE_IDLE;
+
+    return error;
+
+  }
+
+  command error_t HplTMP175.setConfigReg( uint8_t val ){
+    return doSetReg(STATE_SETCONFIG,TMP175_PTR_CFG,val);
+  }
+  
+  command error_t HplTMP175.setTLowReg(uint16_t val){ 
+    return doSetRegWord(STATE_SETTLOW,TMP175_PTR_TLOW,val);  
+  }
+
+  command error_t HplTMP175.setTHighReg(uint16_t val){
+    return doSetRegWord(STATE_SETTHIGH,TMP175_PTR_THIGH,val); 
+  }
+
+  async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    uint16_t tempVal;
+
+    switch (mState) {
+    case STATE_READTEMP:
+      tempVal = buf[0];
+      tempVal = ((tempVal << 8) | buf[1]);
+      mState = STATE_IDLE;
+      signal HplTMP175.measureTemperatureDone(i2c_error,tempVal);
+      break;
+    default:
+      break;
+    }
+
+    return;
+  }
+
+  async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    error_t error = i2c_error;
+
+    if (mfPtrReset) {
+      mfPtrReset = FALSE;
+      switch (mState) {
+      case STATE_STARTING:
+	mSSError = error;
+	post StartDone();
+	break;
+      case STATE_STOPPING:
+	mSSError = error;
+	post StopDone();
+	break;
+      case STATE_READTEMP:
+	// Should never get here.
+	break;
+      case STATE_SETCONFIG:
+	mState = STATE_IDLE;
+	signal HplTMP175.setConfigRegDone(error);
+	break;
+      case STATE_SETTHIGH:
+	mState = STATE_IDLE;
+	signal HplTMP175.setTHighRegDone(error);
+	break;
+      case STATE_SETTLOW:
+	mState = STATE_IDLE;
+	signal HplTMP175.setTLowRegDone(error);
+	break;
+      default:
+	mState = STATE_IDLE;
+	break;
+      }
+    }
+    else {
+      // Reset the PTR register back to the temperature register
+      mI2CBuffer[0] = TMP175_PTR_TEMP;
+      mfPtrReset = TRUE;
+      call I2CPacket.write(I2C_START | I2C_STOP, devAddr,1,mI2CBuffer);
+    } 
+
+    return;
+  }
+
+  async event void AlertInterrupt.fired() {
+    // This alert is decoupled from whatever state the TMP175 is in. 
+    // Upper layers must handle dealing with this alert appropriately.
+    signal HplTMP175.alertThreshold();
+    return;
+  }
+
+  default event void SplitControl.startDone( error_t error ) { return; }
+  default event void SplitControl.stopDone( error_t error ) { return; }
+  default async event void HplTMP175.measureTemperatureDone( error_t error, uint16_t val ){ return; }
+  default async event void HplTMP175.setConfigRegDone( error_t error ){ return; }
+  default async event void HplTMP175.setTHighRegDone(error_t error){ return; }
+  default async event void HplTMP175.setTLowRegDone(error_t error){ return; }
+  default async event void HplTMP175.alertThreshold(){ return; }
+
+}
diff --git a/tos/chips/tmp175/TMP175.h b/tos/chips/tmp175/TMP175.h
new file mode 100644
index 00000000..94d01ac0
--- /dev/null
+++ b/tos/chips/tmp175/TMP175.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Types and definitions for the TI TMP175
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+#ifndef _TMP175_H
+#define _TMP175_H
+
+#define TMP175_PTR_TEMP		(0x0)
+#define TMP175_PTR_CFG		(0x1)
+#define TMP175_PTR_TLOW		(0x2)
+#define TMP175_PTR_THIGH	(0x3)
+
+#define TMP175_CFG_OS		(1 << 7)
+#define TMP175_CFG_RES(_x)	(((_x) & 0x3) << 5)
+#define TMP175_CFG_FQ(_x)	(((_x) & 0x3) << 3)
+#define TMP175_CFG_POL		(1 << 2)
+#define TMP175_CFG_TM		(1 << 1)
+#define TMP175_CFG_SD		(1 << 0)
+
+typedef enum {
+  TMP175_FQD_1 = 0,
+  TMP175_FQD_2 = 1,
+  TMP175_FQD_4 = 2,
+  TMP175_FQD_6 = 3
+} tmp175_fqd_t;
+
+typedef enum {
+  TMP175_RES_9BIT,
+  TMP175_RES_10BIT,
+  TMP175_RES_11BIT,
+  TMP175_RES_12BIT
+} tmp175_res_t;
+
+#endif /* _TMP175_H */
diff --git a/tos/chips/tsl2561/HalTsl2561Advanced.nc b/tos/chips/tsl2561/HalTsl2561Advanced.nc
new file mode 100644
index 00000000..ffb49f2a
--- /dev/null
+++ b/tos/chips/tsl2561/HalTsl2561Advanced.nc
@@ -0,0 +1,51 @@
+/* $Id: HalTsl2561Advanced.nc,v 1.4 2006-12-12 18:23:14 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+interface HalTsl2561Advanced {
+  command error_t setGain(bool gainHigh);
+  event void setGainDone(error_t error);
+  command error_t setIntegration(uint8_t val);
+  event void setIntegrationDone(error_t error);
+  command error_t setPersistence(uint8_t val);
+  event void setPersistenceDone(error_t error);
+  command error_t setTLow(uint16_t val);
+  event void setTLowDone(error_t error);
+  command error_t setTHigh(uint16_t val);
+  event void setTHighDone(error_t error);
+  command error_t enableAlert(bool enable);
+  event void enableAlertDone(error_t error);
+  event void alertThreshold();
+}
diff --git a/tos/chips/tsl2561/HalTsl2561ControlP.nc b/tos/chips/tsl2561/HalTsl2561ControlP.nc
new file mode 100644
index 00000000..2078b903
--- /dev/null
+++ b/tos/chips/tsl2561/HalTsl2561ControlP.nc
@@ -0,0 +1,241 @@
+/* $Id: HalTsl2561ControlP.nc,v 1.4 2006-12-12 18:23:14 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "TSL256x.h"
+
+module HalTsl2561ControlP {
+  provides interface HalTsl2561Advanced;
+
+  uses interface Resource;
+  uses interface HplTSL256x;
+}
+
+implementation {
+  enum {
+    S_IDLE = 0,
+    S_GAIN,
+    S_INTEG,
+    S_PERSIST,
+    S_TLOW,
+    S_THIGH,
+    S_ENALERT,
+  };
+  uint8_t state = S_IDLE;
+  error_t clientResult;
+
+  uint8_t timingRegisterShadow = 0x02;
+  uint8_t iControlRegisterShadow = 0x0;
+  
+  task void complete_Alert() {
+    signal HalTsl2561Advanced.alertThreshold();
+  }
+
+  task void complete_Task() {
+    switch(state) {
+    case S_GAIN:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalTsl2561Advanced.setGainDone(clientResult);
+      break;
+    case S_INTEG:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalTsl2561Advanced.setIntegrationDone(clientResult);
+      break;
+    case S_PERSIST:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalTsl2561Advanced.setPersistenceDone(clientResult);
+      break;
+    case S_TLOW:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalTsl2561Advanced.setTLowDone(clientResult);
+      break;
+    case S_THIGH:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalTsl2561Advanced.setTHighDone(clientResult);
+      break;
+    case S_ENALERT:
+      state = S_IDLE;
+      call Resource.release();
+      signal HalTsl2561Advanced.enableAlertDone(clientResult);
+      break;
+    default:
+      break;
+    }    
+  }
+
+  command error_t HalTsl2561Advanced.setGain(bool gainHigh) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_GAIN;
+    if(gainHigh)
+      timingRegisterShadow |= TSL256X_TIMING_GAIN;
+    else
+      timingRegisterShadow &= ~TSL256X_TIMING_GAIN;
+
+    call HplTSL256x.setTIMING(timingRegisterShadow);
+    return SUCCESS;
+  }
+
+  command error_t HalTsl2561Advanced.setIntegration(uint8_t val) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_INTEG;
+    timingRegisterShadow |= TSL256X_TIMING_MANUAL;
+    timingRegisterShadow |= TSL256X_TIMING_INTEG(val);
+
+    call HplTSL256x.setTIMING(timingRegisterShadow);
+    return SUCCESS;
+  }
+
+  command error_t HalTsl2561Advanced.setPersistence(uint8_t val) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_PERSIST;
+    iControlRegisterShadow &= ~TSL256X_INTERRUPT_PERSIST(0xF);
+    iControlRegisterShadow |= TSL256X_INTERRUPT_PERSIST(val);
+
+    call HplTSL256x.setINTERRUPT(iControlRegisterShadow);
+    return SUCCESS;
+  }
+
+  command error_t HalTsl2561Advanced.setTLow(uint16_t val) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_TLOW;
+
+    call HplTSL256x.setTHRESHLOW(val);
+    return SUCCESS;
+  }
+
+  command error_t HalTsl2561Advanced.setTHigh(uint16_t val) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS)
+      return status;
+    state = S_THIGH;
+
+    call HplTSL256x.setTHRESHHIGH(val);
+    return SUCCESS;
+  }
+
+  command error_t HalTsl2561Advanced.enableAlert(bool enable) {
+    error_t status;
+    if(state != S_IDLE)
+      return FAIL;
+    
+    state = S_ENALERT;
+    iControlRegisterShadow &= ~TSL256X_INTERRUPT_INTR(3); // strip off interrupt select
+    if(enable)
+      iControlRegisterShadow |= TSL256X_INTERRUPT_INTR(1);
+    
+    status = call Resource.immediateRequest();
+    if(status != SUCCESS) {
+      status = call Resource.request();
+      return status;
+    }
+    else {
+      call HplTSL256x.setINTERRUPT(iControlRegisterShadow);
+    }
+    return SUCCESS;
+  }
+
+  event void Resource.granted() {
+    // Only use Queued requests for alertEnable
+    if (state == S_ENALERT) {
+      call HplTSL256x.setINTERRUPT(iControlRegisterShadow);
+    }
+    return;
+  }
+
+  async event void HplTSL256x.setTIMINGDone(error_t error) {
+    clientResult = error;
+    post complete_Task();
+  }
+  async event void HplTSL256x.setINTERRUPTDone(error_t error) {
+    clientResult = error;
+    post complete_Task();
+  }
+  async event void HplTSL256x.setTHRESHLOWDone(error_t error) {
+    clientResult = error;
+    post complete_Task();
+  }
+  async event void HplTSL256x.setTHRESHHIGHDone(error_t error) {
+    clientResult = error;
+    post complete_Task();
+  }
+  async event void HplTSL256x.alertThreshold() { post complete_Alert(); }
+
+  // stubs
+  async event void HplTSL256x.getIDDone(error_t error, uint8_t idval) {}
+
+  // intentionally left empty
+  async event void HplTSL256x.setCONTROLDone(error_t error) {}
+  async event void HplTSL256x.measureCh0Done(error_t error, uint16_t val) {}
+  async event void HplTSL256x.measureCh1Done(error_t error, uint16_t val) {}
+
+  // default stuff
+  /*
+  default event void HalTsl2561Advanced.setGainDone(error_t error) {}
+  default event void HalTsl2561Advanced.setIntegrationDone(error_t error) {}
+  default event void HalTsl2561Advanced.setPersistenceDone(error_t error) {}
+  default event void HalTsl2561Advanced.setTLowDone(error_t error) {}
+  default event void HalTsl2561Advanced.setTHighDone(error_t error) {}
+  default event void HalTsl2561Advanced.enableAlertDone(error_t error) {}
+  default event void HalTsl2561Advanced.alertThreshold() {}
+  */
+}
diff --git a/tos/chips/tsl2561/HalTsl2561ReaderP.nc b/tos/chips/tsl2561/HalTsl2561ReaderP.nc
new file mode 100644
index 00000000..12aae733
--- /dev/null
+++ b/tos/chips/tsl2561/HalTsl2561ReaderP.nc
@@ -0,0 +1,134 @@
+/* $Id: HalTsl2561ReaderP.nc,v 1.4 2006-12-12 18:23:14 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+// someone better power this up via SplitControl
+
+generic module HalTsl2561ReaderP() {
+  provides interface Read<uint16_t> as BroadbandPhoto;
+  provides interface Read<uint16_t> as IRPhoto;
+
+  uses interface Resource as BroadbandResource;
+  uses interface Resource as IRResource;
+  uses interface HplTSL256x;
+
+}
+
+implementation {
+  enum {
+    S_OFF = 0,
+    S_READY,
+    S_READ_BB,
+    S_READ_IR,
+  };
+  norace uint8_t m_state = S_READY;
+  error_t m_error;
+  uint16_t m_val;
+
+  task void signalDone_task() {
+    switch(m_state) {
+    case S_READ_BB:
+      m_state = S_READY;
+      call BroadbandResource.release();
+      signal BroadbandPhoto.readDone(m_error, m_val);
+      break;
+    case S_READ_IR:
+      m_state = S_READY;
+      call IRResource.release();
+      signal IRPhoto.readDone(m_error, m_val);
+      break;
+    default:
+      m_state = S_READY;
+      break;
+    }
+  }
+
+  command error_t BroadbandPhoto.read() {
+    error_t status;
+    if(m_state != S_READY)
+      return FAIL;
+    status = call BroadbandResource.request();
+    return status;
+  }
+
+  command error_t IRPhoto.read() {
+    error_t status;
+    if(m_state != S_READY)
+      return FAIL;
+    status = call IRResource.request();
+    return status;
+  }
+
+  event void BroadbandResource.granted() {
+    error_t result;
+    result = call HplTSL256x.measureCh0();
+    if(result != SUCCESS) {
+      call BroadbandResource.release();
+      signal BroadbandPhoto.readDone(result, 0);
+    }
+  }
+
+  event void IRResource.granted() {
+    error_t result;
+    result = call HplTSL256x.measureCh1();
+    if(result != SUCCESS) {
+      call IRResource.release();
+      signal IRPhoto.readDone(result, 0);
+    }
+  }
+  
+  async event void HplTSL256x.measureCh0Done(error_t error, uint16_t val) {
+    m_state = S_READ_BB;
+    m_error = error;
+    m_val = val;
+    post signalDone_task();
+  }
+
+  async event void HplTSL256x.measureCh1Done(error_t error, uint16_t val) {
+    m_state = S_READ_IR;
+    m_error = error;
+    m_val = val;
+    post signalDone_task();
+  }
+
+  async event void HplTSL256x.setCONTROLDone(error_t error) {}
+  async event void HplTSL256x.setTIMINGDone(error_t error) {}
+  async event void HplTSL256x.setTHRESHLOWDone(error_t error) {}
+  async event void HplTSL256x.setTHRESHHIGHDone(error_t error) {}
+  async event void HplTSL256x.setINTERRUPTDone(error_t error) {}
+  async event void HplTSL256x.getIDDone(error_t error, uint8_t idval) {}
+  async event void HplTSL256x.alertThreshold() {}
+
+}
diff --git a/tos/chips/tsl2561/HplTSL2561LogicP.nc b/tos/chips/tsl2561/HplTSL2561LogicP.nc
new file mode 100644
index 00000000..0e60b877
--- /dev/null
+++ b/tos/chips/tsl2561/HplTSL2561LogicP.nc
@@ -0,0 +1,322 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * TSL2561LogicP is the driver for the Taos TSL2561, the I2C variant
+ * of the Taos TSL256x line. 
+ *  It requires an I2C packet interface and provides the 
+ * TSL256x HPL interface.
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+#include "TSL256x.h"
+#include "I2C.h"
+
+generic module HplTSL2561LogicP(uint16_t devAddr)
+{
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface HplTSL256x;
+
+  uses interface I2CPacket<TI2CBasicAddr>;
+  uses interface GpioInterrupt as InterruptAlert;
+
+  uses interface Leds;
+  uses interface GeneralIO as InterruptPin;
+}
+
+implementation {
+
+  enum {
+    STATE_IDLE,
+    STATE_STARTING,
+    STATE_STOPPING,
+    STATE_STOPPED,
+    STATE_READCH0,
+    STATE_READCH1,
+    STATE_SETCONTROL,
+    STATE_SETTIMING,
+    STATE_SETLOW,
+    STATE_SETHIGH,
+    STATE_SETINTERRUPT,
+    STATE_READID,
+    STATE_CLRINTERRUPTS,
+    STATE_ERROR
+  };
+
+  bool interruptBit; // determine if I2C write was to clear an interrupt
+
+  uint8_t mI2CBuffer[4];
+  uint8_t mState;
+  norace error_t mSSError;
+
+  static error_t doWriteReg(uint8_t nextState, uint8_t reg, uint16_t val, uint8_t size) {
+    error_t error = SUCCESS;
+
+    atomic {
+      if ((mState == STATE_IDLE) || (mState == STATE_STARTING)) {
+	mState = nextState;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = (TSL256X_COMMAND_CMD | reg);
+    mI2CBuffer[1] = (uint8_t)(val & 0xFF);
+    mI2CBuffer[2] = (uint8_t)((val >> 8) & 0xFF);
+
+    error = call I2CPacket.write(I2C_START | I2C_STOP,devAddr,(size + 1),mI2CBuffer);
+    
+    if (error) 
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  static error_t doReadPrep(uint8_t nextState, uint8_t reg) {
+        error_t error = SUCCESS;
+
+    atomic {
+      if (mState == STATE_IDLE) {
+	mState = nextState;
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    if (error)
+      return error;
+
+    mI2CBuffer[0] = (TSL256X_COMMAND_CMD | reg );
+
+    error = call I2CPacket.write(I2C_START,devAddr,1,mI2CBuffer);
+
+    if (error)
+      atomic mState = STATE_IDLE;
+
+    return error;
+  }
+
+  static error_t clearInterrupt() {
+    error_t error;
+    mI2CBuffer[0] = (TSL256X_COMMAND_CMD | TSL256X_COMMAND_CLEAR);
+    error = call I2CPacket.write(I2C_START | I2C_STOP, devAddr, 1, mI2CBuffer);
+    
+    if (error == SUCCESS)
+      interruptBit = TRUE;
+      
+    return error;
+  }
+
+  task void StartDone() {
+    signal SplitControl.startDone(mSSError);
+    return;
+  }
+
+  task void StopDone() {
+    signal SplitControl.stopDone(mSSError);
+    return;
+  }
+
+  command error_t Init.init() {
+    call InterruptPin.makeInput();
+    call InterruptAlert.enableFallingEdge();
+    mState = STATE_STOPPED;
+    interruptBit = FALSE;
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.start() {
+    error_t error = SUCCESS;
+    atomic {
+      if (mState == STATE_STOPPED) { 
+	mState = STATE_STARTING; 
+      }
+      else {
+	error = EBUSY;
+      }
+    }
+    
+    if (error)
+      return error;
+
+    return doWriteReg(STATE_STARTING,(TSL256X_COMMAND_CLEAR | TSL256X_PTR_CONTROL),
+		      (TSL256X_CONTROL_POWER_ON),1);
+  }
+
+  command error_t SplitControl.stop() {
+    return doWriteReg(STATE_STOPPING,(TSL256X_COMMAND_CLEAR | TSL256X_PTR_CONTROL),
+		      (TSL256X_CONTROL_POWER_OFF),1);
+  }
+  
+  command error_t HplTSL256x.measureCh0() { 
+    return doReadPrep(STATE_READCH0,TSL256X_PTR_DATA0LOW);
+  }
+
+  command error_t HplTSL256x.measureCh1() {
+    return doReadPrep(STATE_READCH1,TSL256X_PTR_DATA1LOW);
+  }
+
+  command error_t HplTSL256x.setCONTROL(uint8_t val) {
+    return doWriteReg(STATE_SETCONTROL,TSL256X_PTR_CONTROL,val,1);
+  }
+  
+  command error_t HplTSL256x.setTIMING(uint8_t val) {
+    return doWriteReg(STATE_SETTIMING,TSL256X_PTR_TIMING,val,1);
+  }
+
+  command error_t HplTSL256x.setTHRESHLOW(uint16_t val) {
+    // As it turns out, you have to use the SMB Write Word flag to use this command
+    return doWriteReg(STATE_SETLOW,(TSL256X_COMMAND_WORD | TSL256X_PTR_THRESHLOWLOW),val,2);  
+  }
+
+  command error_t HplTSL256x.setTHRESHHIGH(uint16_t val) {
+    // As it turns out, you have to use the SMB Write Word flag to use this command
+    return doWriteReg(STATE_SETHIGH,(TSL256X_COMMAND_WORD | TSL256X_PTR_THRESHHIGHLOW),val,2); 
+  }
+
+  command error_t HplTSL256x.setINTERRUPT(uint8_t val) {
+    return doWriteReg(STATE_SETINTERRUPT,(TSL256X_COMMAND_CLEAR | TSL256X_PTR_INTERRUPT),val,1);
+  }
+  
+  command error_t HplTSL256x.getID() {
+    return doReadPrep(STATE_READID,TSL256X_PTR_ID);
+  }
+
+  async event void I2CPacket.readDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    uint16_t tempVal;
+    error_t error = i2c_error;
+
+    switch (mState) {
+    case STATE_READCH0:
+      tempVal = buf[1];
+      tempVal = ((tempVal << 8) | buf[0]);
+      mState = STATE_IDLE;
+      signal HplTSL256x.measureCh0Done(error,tempVal);
+      break;
+    case STATE_READCH1:
+      tempVal = buf[1];
+      tempVal = ((tempVal << 8) | buf[0]);
+      mState = STATE_IDLE;
+      signal HplTSL256x.measureCh1Done(error,tempVal);
+      break;
+    case STATE_READID:
+      mState = STATE_IDLE;
+      signal HplTSL256x.getIDDone(error,buf[0]);
+      break;
+    default:
+      mState = STATE_IDLE;
+      break;
+    }
+    return;
+  }
+
+  async event void I2CPacket.writeDone(error_t i2c_error, uint16_t chipAddr, uint8_t len, uint8_t *buf) {
+    error_t error = i2c_error;
+
+    switch (mState) {
+    case STATE_STARTING:
+      mSSError = error;
+      mState = STATE_IDLE;
+      post StartDone();
+      break;
+    case STATE_STOPPING:
+      mSSError = error;
+      mState = STATE_STOPPED;
+      post StopDone();
+      break;
+    case STATE_READCH0:
+      error = call I2CPacket.read(I2C_START | I2C_STOP,devAddr,2,mI2CBuffer);
+      break;
+    case STATE_READCH1:
+      error = call I2CPacket.read(I2C_START | I2C_STOP,devAddr,2,mI2CBuffer);
+      break;
+    case STATE_SETCONTROL:
+      mState = STATE_IDLE;
+      signal HplTSL256x.setCONTROLDone(error);
+      break;
+    case STATE_SETTIMING:
+      mState = STATE_IDLE;
+      signal HplTSL256x.setTIMINGDone(error);
+      break;
+    case STATE_SETINTERRUPT:
+      mState = STATE_IDLE;
+      signal HplTSL256x.setINTERRUPTDone(error);
+      break;
+    case STATE_SETHIGH:
+      mState = STATE_IDLE;
+      signal HplTSL256x.setTHRESHHIGHDone(error);
+      break;
+    case STATE_SETLOW:
+      mState = STATE_IDLE;
+      signal HplTSL256x.setTHRESHLOWDone(error);
+      break;
+    case STATE_READID:
+      error = call I2CPacket.read(I2C_STOP,devAddr,1,mI2CBuffer);
+      break;
+    default:
+      mState = STATE_IDLE;
+	break;
+    }
+    return;
+  }
+
+  async event void InterruptAlert.fired() {
+    // This alert is decoupled from whatever state the TSL2561 is in. 
+    // Upper layers must handle dealing with this alert appropriately.
+    signal HplTSL256x.alertThreshold();
+
+    // need to clear interrupt, this is dangerous...
+    // if you get interrupted while someone is reading...
+    // ... the I2C bus may become inconsistent?
+    //clearInterrupt();
+    
+    return;
+  }
+
+  default event void SplitControl.startDone( error_t error ) { return; }
+  default event void SplitControl.stopDone( error_t error ) { return; }
+  default async event void HplTSL256x.measureCh0Done( error_t error, uint16_t val ){ return; }
+  default async event void HplTSL256x.measureCh1Done( error_t error, uint16_t val ){ return; }
+  default async event void HplTSL256x.setCONTROLDone( error_t error ){ return; }
+  default async event void HplTSL256x.setTIMINGDone(error_t error){ return; }
+  default async event void HplTSL256x.setTHRESHLOWDone(error_t error){ return;} 
+  default async event void HplTSL256x.setTHRESHHIGHDone(error_t error){ return; }
+  default async event void HplTSL256x.setINTERRUPTDone(error_t error){ return;} 
+  default async event void HplTSL256x.getIDDone(error_t error, uint8_t idval){ return; }
+  default async event void HplTSL256x.alertThreshold(){ return; }
+
+}
diff --git a/tos/chips/tsl2561/HplTSL256x.nc b/tos/chips/tsl2561/HplTSL256x.nc
new file mode 100644
index 00000000..1dad9426
--- /dev/null
+++ b/tos/chips/tsl2561/HplTSL256x.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplTSL256x is the Hpl inteface to the Taos TSL256x series 
+ * Light-to-Digital converters.
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+interface HplTSL256x {
+
+
+  command error_t measureCh0();
+  async event void measureCh0Done( error_t error, uint16_t val );
+
+  command error_t measureCh1();
+  async event void measureCh1Done( error_t error, uint16_t val );
+
+  command error_t setCONTROL( uint8_t val );
+  async event void setCONTROLDone( error_t error );
+
+  command error_t setTIMING( uint8_t val );
+  async event void setTIMINGDone( error_t error );
+
+  command error_t setTHRESHLOW(uint16_t val);
+  async event void setTHRESHLOWDone(error_t error);
+
+  command error_t setTHRESHHIGH(uint16_t val);
+  async event void setTHRESHHIGHDone(error_t error);
+
+  command error_t setINTERRUPT(uint8_t val);
+  async event void setINTERRUPTDone(error_t error);
+
+  command error_t getID();
+  async event void getIDDone(error_t error, uint8_t idval);
+
+  async event void alertThreshold();
+}
diff --git a/tos/chips/tsl2561/TSL256x.h b/tos/chips/tsl2561/TSL256x.h
new file mode 100644
index 00000000..455b1a82
--- /dev/null
+++ b/tos/chips/tsl2561/TSL256x.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in so1urce and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Types and definitions for the Taos TSL256x sensor
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+#ifndef _TSL256X_H
+#define _TSL256X_H
+
+#define TSL256X_PTR_CONTROL	(0x0)
+#define TSL256X_PTR_TIMING	(0x1)
+#define TSL256X_PTR_THRESHLOWLOW	(0x2)
+#define TSL256X_PTR_THRESHLOWHIGH	(0x3)
+#define TSL256X_PTR_THRESHHIGHLOW	(0x4)
+#define TSL256X_PTR_THRESHHIGHIGH	(0x5)
+#define TSL256X_PTR_INTERRUPT	(0x6)
+#define TSL256X_PTR_CRC		(0x8)
+#define TSL256X_PTR_ID		(0xA)
+#define TSL256X_PTR_DATA0LOW	(0xC)
+#define TSL256X_PTR_DATA0HIGH	(0xD)
+#define TSL256X_PTR_DATA1LOW	(0xE)
+#define TSL256X_PTR_DATA1HIGH	(0xF)
+
+#define TSL256X_COMMAND_CMD	(1<<7)
+#define TSL256X_COMMAND_CLEAR	(1<<6)
+#define TSL256X_COMMAND_WORD	(1<<5)
+#define TSL256X_COMMAND_BLOCK	(1<<4)
+#define TSL256X_COMMAND_ADDRESS(_x) ((_x) & 0xF)
+
+#define TSL256X_CONTROL_POWER_ON (0x3)
+#define TSL256X_CONTROL_POWER_OFF (0x0)
+
+#define TSL256X_TIMING_GAIN	(1<<4)
+#define TSL256X_TIMING_MANUAL	(1<<3)
+#define TSL256X_TIMING_INTEG(_x) ((_x) & 0x3)
+
+#define TSL256X_INTERRUPT_INTR(_x) (((_x) & 0x3) << 4)
+#define TSL256X_INTERRUPT_PERSIST(_x) ((_x) & 0xF)
+
+
+#endif /* _TSL256X_H */
diff --git a/tos/chips/xe1205/AckSendReceive.nc b/tos/chips/xe1205/AckSendReceive.nc
new file mode 100644
index 00000000..34c3b4bd
--- /dev/null
+++ b/tos/chips/xe1205/AckSendReceive.nc
@@ -0,0 +1,4 @@
+interface AckSendReceive {
+    command void setAckPayload(uint16_t _pl);
+    command uint16_t getAckPayload();
+}
diff --git a/tos/chips/xe1205/CsmaControl.nc b/tos/chips/xe1205/CsmaControl.nc
new file mode 100644
index 00000000..a7898278
--- /dev/null
+++ b/tos/chips/xe1205/CsmaControl.nc
@@ -0,0 +1,5 @@
+interface CsmaControl {
+    
+    async command void enableCca();
+    async command void disableCca();
+}
diff --git a/tos/chips/xe1205/LPLControl.nc b/tos/chips/xe1205/LPLControl.nc
new file mode 100644
index 00000000..9e8a6fd4
--- /dev/null
+++ b/tos/chips/xe1205/LPLControl.nc
@@ -0,0 +1,5 @@
+
+interface LPLControl {
+    
+    async command void setMode(uint8_t mode);
+}
diff --git a/tos/chips/xe1205/LowPowerListening.nc b/tos/chips/xe1205/LowPowerListening.nc
new file mode 100644
index 00000000..c8649c85
--- /dev/null
+++ b/tos/chips/xe1205/LowPowerListening.nc
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Low Power Listening interface
+ *
+ * @author David Moss
+ * @author Jonathan Hui
+ */
+ 
+interface LowPowerListening {
+
+  /**
+   * Set this this node's radio sleep interval, in milliseconds.
+   * Once every interval, the node will sleep and perform an Rx check 
+   * on the radio.  Setting the sleep interval to 0 will keep the radio
+   * always on.
+   *
+   * This is the equivalent of setting the local duty cycle rate.
+   *
+   * @param sleepIntervalMs the length of this node's Rx check interval, in [ms]
+   */
+  command void setLocalSleepInterval(uint16_t sleepIntervalMs);
+  
+  /**
+   * @return the local node's sleep interval, in [ms]
+   */
+  command uint16_t getLocalSleepInterval();
+  
+  /**
+   * Set this node's radio duty cycle rate, in units of [percentage*100].
+   * For example, to get a 0.05% duty cycle,
+   * <code>
+   *   call LowPowerListening.setDutyCycle(5);  // or equivalently...
+   *   call LowPowerListening.setDutyCycle(00005);  // for better readability?
+   * </code>
+   *
+   * For a 100% duty cycle (always on),
+   * <code>
+   *   call LowPowerListening.setDutyCycle(10000);
+   * </code>
+   *
+   * This is the equivalent of setting the local sleep interval explicitly.
+   * 
+   * @param dutyCycle The duty cycle percentage, in units of [percentage*100]
+   */
+  command void setLocalDutyCycle(uint16_t dutyCycle);
+  
+  /**
+   * @return this node's radio duty cycle rate, in units of [percentage*100]
+   */
+  command uint16_t getLocalDutyCycle();
+  
+  
+  /**
+   * Configure this outgoing message so it can be transmitted to a neighbor mote
+   * with the specified Rx sleep interval.
+   * @param msg Pointer to the message that will be sent
+   * @param sleepInterval The receiving node's sleep interval, in [ms]
+   */
+  command void setRxSleepInterval(message_t *msg, uint16_t sleepIntervalMs);
+  
+  /**
+   * @return the destination node's sleep interval configured in this message
+   */
+  command uint16_t getRxSleepInterval(message_t *msg);
+  
+  /**
+   * Configure this outgoing message so it can be transmitted to a neighbor mote
+   * with the specified Rx duty cycle rate.
+   * Duty cycle is in units of [percentage*100], i.e. 0.25% duty cycle = 25.
+   * 
+   * @param msg Pointer to the message that will be sent
+   * @param dutyCycle The duty cycle of the receiving mote, in units of 
+   *     [percentage*100]
+   */
+  command void setRxDutyCycle(message_t *msg, uint16_t dutyCycle);
+  
+  /**
+   * @return the destination node's duty cycle configured in this message
+   *     in units of [percentage*100]
+   */
+  command uint16_t getRxDutyCycle(message_t *msg);
+  
+  /**
+   * Convert a duty cycle, in units of [percentage*100], to
+   * the sleep interval of the mote in milliseconds
+   * @param dutyCycle The duty cycle in units of [percentage*100]
+   * @return The equivalent sleep interval, in units of [ms]
+   */
+  command uint16_t dutyCycleToSleepInterval(uint16_t dutyCycle);
+  
+  /**
+   * Convert a sleep interval, in units of [ms], to a duty cycle
+   * in units of [percentage*100]
+   * @param sleepInterval The sleep interval in units of [ms]
+   * @return The duty cycle in units of [percentage*100]
+   */
+  command uint16_t sleepIntervalToDutyCycle(uint16_t sleepInterval);
+  
+}
diff --git a/tos/chips/xe1205/XE1205.h b/tos/chips/xe1205/XE1205.h
new file mode 100644
index 00000000..bcd8b86e
--- /dev/null
+++ b/tos/chips/xe1205/XE1205.h
@@ -0,0 +1,231 @@
+/* 
+ * Copyright (c) 2005, Ecole Polytechnique Federale de Lausanne (EPFL)
+ * and Shockfish SA, Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   and Shockfish SA, nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+/*
+ * XE1205 constants and helper macros and functions.
+ *
+ */
+
+/**
+ * @author Henri Dubois-Ferriere
+ * @author Remy Blank
+ *
+ */
+
+
+#ifndef _XE1205CONST_H
+#define _XE1205CONST_H
+
+#include "AM.h"
+
+typedef nx_struct xe1205_header_t {
+  nx_am_addr_t dest;
+  nx_am_addr_t source;
+  nx_am_id_t type;
+  nx_am_group_t group;
+  nx_uint8_t ack;
+} xe1205_header_t;
+
+typedef nx_struct xe1205_footer_t {
+#ifdef LOW_POWER_LISTENING
+    nx_uint16_t rxInterval;
+#endif
+  nxle_uint16_t crc;
+} xe1205_footer_t;
+
+typedef nx_struct xe1205_metadata_t {
+  nx_uint8_t length;
+  nx_uint8_t strength;
+} xe1205_metadata_t;
+
+
+/*
+ * Register address generators.
+ */
+#define XE1205_WRITE(register_)                 (((register_) << 1) | 0x01)
+#define XE1205_READ(register_)                  (((register_) << 1) | 0x41)
+
+/**
+ * Register addresses.
+ */
+enum xe1205_register_enums {
+  MCParam_0    = 0,
+  MCParam_1    = 1,
+  MCParam_2    = 2,
+  MCParam_3    = 3,
+  MCParam_4    = 4,
+  IrqParam_5   = 5,
+  IrqParam_6   = 6,
+  TXParam_7    = 7,
+  RXParam_8    = 8,
+  RXParam_9    = 9,
+  RXParam_10   = 10,
+  RXParam_11   = 11,
+  RXParam_12   = 12,
+  Pattern_13   = 13,
+  Pattern_14   = 14,
+  Pattern_15   = 15,
+  Pattern_16   = 16,
+  OscParam_17  = 17,
+  OscParam_18  = 18,
+  TParam_19    = 19,
+  TParam_21    = 21,
+  TParam_22    = 22,
+  XE1205_RegCount
+};
+
+#ifndef TOSH_DATA_LENGTH
+#define TOSH_DATA_LENGTH 28
+#endif
+
+enum {
+  xe1205_mtu=TOSH_DATA_LENGTH + sizeof(xe1205_header_t) + sizeof(xe1205_footer_t)
+};
+
+enum {
+    data_pattern = 0x893456,
+    ack_pattern = 0x123fed
+};
+
+
+typedef enum {
+  rx_irq0_none=0,
+  rx_irq0_write_byte=1,
+  rx_irq0_nFifoEmpty=2,
+  rx_irq0_Pattern=3,   
+}  xe1205_rx_irq0_src_t;
+
+typedef enum xe1205_rx_irq1_src_t {
+  rx_irq1_none=0,
+  rx_irq1_FifoFull=1,
+  rx_irq1_Rssi=2
+} xe1205_rx_irq1_src_t;
+
+// In TX, IRQ0 is always mapped to nFifoEmpty 
+typedef enum {
+  tx_irq1_FifoFull=0,
+  tx_irq1_TxStopped=1
+} xe1205_tx_irq1_src_t;
+
+
+typedef enum {
+  xe1205_channelpreset_868mhz=0,
+  xe1205_channelpreset_869mhz=1,
+  xe1205_channelpreset_870mhz=2,
+  xe1205_channelpreset_433mhz=3,
+  xe1205_channelpreset_434mhz=4,
+  xe1205_channelpreset_435mhz=5,
+} xe1205_channelpreset_t;
+
+typedef enum {
+  xe1205_txpower_0dbm=0,
+  xe1205_txpower_5dbm=1,
+  xe1205_txpower_10dbm=2,
+  xe1205_txpower_15dbm=3
+} xe1205_txpower_t;
+
+typedef enum {
+  xe1205_bitrate_152340=152340U,
+  xe1205_bitrate_76170=76170U,
+  xe1205_bitrate_50780=50780U,
+  xe1205_bitrate_38085=38085U,
+//   xe1205_bitrate_30468=30468,
+//   xe1205_bitrate_19042=19042,
+//   xe1205_bitrate_12695=12695,
+//   xe1205_bitrate_8017=8017,
+//   xe1205_bitrate_4760=4760
+} xe1205_bitrate_t;
+
+
+
+/**
+ * Receiver modes.
+ */
+enum {
+  XE1205_LnaModeA = 0,
+  XE1205_LnaModeB = 1
+};
+
+
+/** 
+ * Radio Transition times.
+ * See Table 4 of the XE1205 data sheet.
+ */
+enum xe1205_transition_time_enums {
+  XE1205_Standby_to_RX_Time = 700,   // RX wakeup time (us), with quartz oscillator enabled
+  XE1205_TX_to_RX_Time = 500,    // RX wakeup time (us), with freq. synthesizer enabled
+  XE1205_Standby_to_TX_Time = 250,   // TX wakeup time (us), with quartz oscillator enabled
+  XE1205_RX_to_TX_Time = 100,    // TX wakeup time (us), with freq. synthesizer enabled
+  XE1205_FS_Wakeup_Time = 200,    // Frequency synthesizer wakeup time 
+  XE1205_Sleep_to_Standby_Time = 1000    // Quartz oscillator wakeup time ( xxx 7ms for 3rd overtone????)
+};
+
+// xxx merge into above enum but check
+enum {
+  XE1205_Sleep_to_RX_Time = XE1205_Sleep_to_Standby_Time + XE1205_Standby_to_RX_Time, 
+  XE1205_Sleep_to_TX_Time = XE1205_Sleep_to_Standby_Time + XE1205_Standby_to_TX_Time
+};
+
+
+
+enum {
+  RSSI_BELOW_110 = 0,
+  RSSI_110_TO_105 = 1,
+  RSSI_105_TO_100 = 2,
+  RSSI_100_TO_95 = 3,
+  RSSI_95_TO_90 = 4,
+  RSSI_90_TO_85 = 5,
+  RSSI_ABOVE_85 = 6
+};
+
+uint8_t const rssiTab[] = {
+  RSSI_BELOW_110,  // 0b0000
+  RSSI_110_TO_105, // 0b0001
+  RSSI_105_TO_100, // 0b0010
+  RSSI_100_TO_95,  // 0b0011
+  RSSI_95_TO_90,   // 0b0100 *
+  RSSI_95_TO_90,   // 0b0101 *
+  RSSI_95_TO_90,   // 0b0110 *
+  RSSI_95_TO_90,   // 0b0111
+  RSSI_90_TO_85,   // 0b1000 *
+  RSSI_90_TO_85,   // 0b1001 *
+  RSSI_90_TO_85,   // 0b1010 *
+  RSSI_90_TO_85,   // 0b1011 
+  RSSI_ABOVE_85,   // 0b1100 *
+  RSSI_ABOVE_85,   // 0b1101 *
+  RSSI_ABOVE_85,   // 0b1110 *
+  RSSI_ABOVE_85    // 0b1111 
+  // (*) : 'inconsistent' pairs
+};
+
+#endif /* _XE1205CONST_H */
+
diff --git a/tos/chips/xe1205/XE1205ActiveMessageC.nc b/tos/chips/xe1205/XE1205ActiveMessageC.nc
new file mode 100644
index 00000000..49c68c86
--- /dev/null
+++ b/tos/chips/xe1205/XE1205ActiveMessageC.nc
@@ -0,0 +1,83 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+configuration XE1205ActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface PacketAcknowledgements;
+    #ifdef LOW_POWER_LISTENING
+    interface LowPowerListening;
+    #endif
+  }
+}
+implementation {
+  components XE1205SendReceiveC;
+  Packet                 = XE1205SendReceiveC;
+  PacketAcknowledgements = XE1205SendReceiveC;
+ components XE1205ActiveMessageP;
+
+#ifdef LOW_POWER_LISTENING
+  components  XE1205LowPowerListeningC as Lpl;
+  LowPowerListening = Lpl;
+  XE1205ActiveMessageP.SubSend -> Lpl.Send;
+  XE1205ActiveMessageP.SubReceive -> Lpl.Receive;
+  SplitControl = Lpl;
+#else
+ 
+  XE1205ActiveMessageP.Packet     -> XE1205SendReceiveC;
+  XE1205ActiveMessageP.SubSend    -> XE1205SendReceiveC.Send;
+  XE1205ActiveMessageP.SubReceive -> XE1205SendReceiveC.Receive;
+  SplitControl = XE1205SendReceiveC;
+#endif
+  AMPacket = XE1205ActiveMessageP;
+  AMSend   = XE1205ActiveMessageP;
+  Receive  = XE1205ActiveMessageP.Receive;
+  Snoop  = XE1205ActiveMessageP.Snoop;
+
+
+  components ActiveMessageAddressC;  
+  XE1205ActiveMessageP.amAddress -> ActiveMessageAddressC;  
+
+
+  components XE1205IrqConfC, XE1205PatternConfC, XE1205PhyRssiConfC;
+
+}
diff --git a/tos/chips/xe1205/XE1205ActiveMessageP.nc b/tos/chips/xe1205/XE1205ActiveMessageP.nc
new file mode 100644
index 00000000..4e69fc4d
--- /dev/null
+++ b/tos/chips/xe1205/XE1205ActiveMessageP.nc
@@ -0,0 +1,158 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+module XE1205ActiveMessageP {
+    uses interface Packet;
+    uses interface Send as SubSend;
+    uses interface Receive as SubReceive;
+    uses command am_addr_t amAddress();
+
+    provides interface AMSend[am_id_t id];
+    provides interface AMPacket;
+    provides interface Receive[am_id_t id];
+    provides interface Receive as Snoop[am_id_t id];
+}
+implementation {
+  // xxx - this is replicated in ActiveMessageP.
+  // put in XE1205.h?
+  xe1205_header_t* getHeader( message_t* msg ) {
+    return (xe1205_header_t*)( msg->data - sizeof(xe1205_header_t) );
+  }
+
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* msg) {
+    xe1205_header_t* header = getHeader(msg);
+    return header->dest;
+  }
+
+  command void AMPacket.setDestination(message_t* msg, am_addr_t addr) {
+    xe1205_header_t* header = getHeader(msg);
+    header->dest = addr;
+  }
+  
+  command am_addr_t AMPacket.source(message_t* msg) {
+    xe1205_header_t* header = getHeader(msg);
+    return header->source;
+  }
+
+  command void AMPacket.setSource(message_t* msg, am_addr_t addr) {
+    xe1205_header_t* header = getHeader(msg);
+    header->source = addr;
+  }
+  
+  command bool AMPacket.isForMe(message_t* msg) {
+    return (call AMPacket.destination(msg) == call AMPacket.address() ||
+	    call AMPacket.destination(msg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* msg) {
+    xe1205_header_t* header = getHeader(msg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* msg, am_id_t type) {
+    xe1205_header_t* header = getHeader(msg);
+    header->type = type;
+  }
+
+  command void AMPacket.setGroup(message_t* msg, am_group_t group) {
+    xe1205_header_t* header = getHeader(msg);
+    header->group = group;
+  }
+
+  command am_group_t AMPacket.group(message_t* msg) {
+    xe1205_header_t* header = getHeader(msg);
+    return header->group;
+  }
+
+  command am_group_t AMPacket.localGroup() {
+    return TOS_AM_GROUP;
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command error_t AMSend.send[am_id_t id](am_addr_t addr, 
+					  message_t* msg, 
+					  uint8_t len) {
+    xe1205_header_t* header = getHeader(msg);
+    header->type = id;
+    header->dest = addr;
+    header->source = call AMPacket.address();
+    header->group = TOS_AM_GROUP;
+    return call SubSend.send(msg, len);
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+   return;
+ }
+
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) __attribute__ ((noinline)) {
+    if (call AMPacket.isForMe(msg)) {
+      return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+    else {
+      return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+  }
+  
+  default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+  
+}
+
diff --git a/tos/chips/xe1205/XE1205CsmaP.nc b/tos/chips/xe1205/XE1205CsmaP.nc
new file mode 100644
index 00000000..68bb8825
--- /dev/null
+++ b/tos/chips/xe1205/XE1205CsmaP.nc
@@ -0,0 +1,319 @@
+/* Copyright (c) 2007 Shockfish SA
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Maxime Muller
+ *
+ */
+
+#include "XE1205.h"
+#include "XE1205LowPowerListening.h"
+
+#define MAX(X,Y) X>Y ? X:Y
+
+module XE1205CsmaP {
+
+    provides {
+	interface Init @atleastonce();
+	interface SplitControl @atleastonce();
+	interface Send;
+	interface Receive;
+	interface CsmaControl;
+	interface LPLControl;
+	interface CsmaBackoff[am_id_t amId];
+    }
+    uses {
+	interface SplitControl as SubControl;
+	interface Receive as SubReceive;
+	interface Send as SubSend;
+	interface XE1205PhyRssi as Rssi;
+	interface XE1205PhyConf as RadioConf;
+	interface Timer<TMilli> as BackoffTimer;
+	interface Random;
+    }
+}
+implementation {
+
+    enum {
+	RADIO_DISABLED,
+	RADIO_IDLE,
+	RADIO_RX,
+	RADIO_TX,
+    };
+
+    uint8_t rState;
+    uint8_t rxRssi;
+    uint8_t clrRssi;
+    norace uint8_t rssiSampleCnt;
+    bool enableCCA;
+
+    message_t * txMsg;
+    uint8_t txLen;
+    enum {
+	RSSI_RX = 0,
+	RSSI_CLR = 1,
+    };
+    uint16_t MA_LENGTH = 8;
+    uint8_t MAX_RSSI_SAMPLE = 4;
+    norace float RSSI_RX_MA;
+    norace float RSSI_CLR_MA;
+    
+    /*
+     * function prototypes
+     */
+
+    task void readRssi();
+    task void send();
+    
+    command error_t Init.init() {
+	rssiSampleCnt=0;
+	rState = RADIO_DISABLED;
+	RSSI_RX_MA = RSSI_ABOVE_85;
+	RSSI_CLR_MA = RSSI_90_TO_85;
+	return SUCCESS;
+    }
+    
+    command error_t SplitControl.start() {
+	return call SubControl.start();
+    }
+
+    event void SubControl.startDone(error_t err) {
+	if (err!=SUCCESS) {
+	    atomic {
+	    if (rState == RADIO_TX)
+		signal Send.sendDone(txMsg,FAIL);
+	    else 
+		signal SplitControl.startDone(err);
+	    }
+	} else {
+	    atomic {
+		if (rState == RADIO_TX) {
+		    if(enableCCA==TRUE) {
+			if(SUCCESS != post readRssi()) {
+			    signal Send.sendDone(txMsg,FAIL);
+			}
+			return;
+		    }
+		    else {
+			post send();
+			return;
+			if (SUCCESS != post send()) {
+			    signal Send.sendDone(txMsg,FAIL);
+			    return;
+			}
+		    }
+		}
+		signal SplitControl.startDone(err);
+	    }
+	}
+    }
+
+    command error_t SplitControl.stop() { 
+
+	return call SubControl.stop();
+    }
+
+    event void SubControl.stopDone(error_t err) {
+	atomic {
+	if (rState == RADIO_RX) // LPL: shutdown if no activity
+	    if (err==SUCCESS)
+		 rState = RADIO_IDLE;
+	}
+	signal SplitControl.stopDone(err);
+    }
+
+
+
+    void updateRssiMA(uint8_t maType, uint8_t value) {
+
+	switch (maType) {
+	case RSSI_CLR:
+	    if((float)value < MAX(RSSI_RX_MA,RSSI_CLR_MA))
+		RSSI_CLR_MA = (RSSI_CLR_MA*(MA_LENGTH - 1)+ value )/(MA_LENGTH);
+	    break;
+	    
+	case RSSI_RX:
+	    RSSI_RX_MA  = (RSSI_RX_MA*(MA_LENGTH - 1)+ value )/(MA_LENGTH);
+	    break;
+
+	default:
+	    break;
+	}
+    }
+
+    event message_t *SubReceive.receive(message_t* msg, void* payload, uint8_t len){
+	
+	uint8_t strgth = ((xe1205_metadata_t*)((uint8_t*)msg->footer + sizeof(xe1205_footer_t)))->strength;
+	updateRssiMA(RSSI_RX, strgth);
+	return signal Receive.receive(msg, payload, len);
+    }
+
+    command error_t Send.send(message_t* msg, uint8_t len) {
+	error_t err;
+	atomic {
+	    switch (rState) {
+
+	    case RADIO_DISABLED:
+		return EOFF;
+
+	    default:
+	
+		rState = RADIO_TX;
+		atomic txMsg = msg;
+		atomic txLen = len;
+		err = call SubControl.start();
+		return err;
+	    }
+	}
+    }
+    
+    task void send() {
+	if (SUCCESS != call SubSend.send(txMsg, txLen)) {
+	    atomic rState = RADIO_IDLE;
+	    signal Send.sendDone(txMsg, FAIL);	 
+	}
+    }
+
+    event void SubSend.sendDone(message_t *msg, error_t err) {
+	atomic rState = RADIO_IDLE;
+	signal Send.sendDone(msg, err);
+    }
+
+    command void* Send.getPayload(message_t* m,uint8_t len) {
+	return m->data;
+    }
+
+    command uint8_t Send.maxPayloadLength() {
+	return TOSH_DATA_LENGTH;
+    }
+
+    command error_t Send.cancel( message_t* p_msg ) {
+	return FAIL;
+    }
+
+    task void readRssi() {
+	if(SUCCESS!=call Rssi.getRssi()) {
+	 
+	    atomic {
+	    if (rState == RADIO_TX) {    
+		signal Send.sendDone(txMsg, FAIL);
+	    } else {
+		signal SplitControl.startDone(FAIL);
+	    }
+	    }
+	}
+    }
+
+
+    event void BackoffTimer.fired() {
+	rssiSampleCnt = 0;
+	if(SUCCESS != post send()) {
+	    atomic rState = RADIO_IDLE;
+	    signal Send.sendDone(txMsg,FAIL);
+	}
+    }
+    async event void Rssi.rssiDone(uint8_t val) {
+	
+	updateRssiMA(RSSI_CLR, val);
+	atomic {
+	    if (rState == RADIO_DISABLED) {
+		rState = RADIO_IDLE;
+		signal SplitControl.startDone(SUCCESS);
+		return;
+	    }
+	}
+
+	// RX for LPL only
+	atomic {
+	if (rState == RADIO_RX) {
+	    if (RSSI_CLR_MA >= (float)val) { // go back to sleep
+		call SubControl.stop();
+		return;
+	    } else
+		// tell lpl layer we have some activity
+		signal SplitControl.startDone(SUCCESS);
+	}
+	
+	// TX
+	if (rState == RADIO_TX) {
+	    rssiSampleCnt++;
+	    if ( RSSI_RX_MA >= (float)val || RSSI_CLR_MA >= (float)val || !enableCCA) { // it's a go
+		if (enableCCA) {
+		    call BackoffTimer.startOneShot(signal CsmaBackoff.initial[((xe1205_header_t*)(txMsg->data -  sizeof(xe1205_header_t)))->type](txMsg));
+		} else
+		    post send();
+		return;
+	    }
+	    else 
+		if (enableCCA && rssiSampleCnt < MAX_RSSI_SAMPLE) {
+		    post readRssi();
+		} else {
+		    call BackoffTimer.startOneShot(signal CsmaBackoff.congestion[((xe1205_header_t*)(txMsg->data -  sizeof(xe1205_header_t)))->type](txMsg));
+		}
+	    }
+	}
+    }
+    
+    async command void LPLControl.setMode(uint8_t mode) {
+	switch (mode) {
+
+	case RX:
+	    atomic {
+		if(rState!=RADIO_TX)
+		    rState = RADIO_RX;
+	    }
+	    break;
+
+	case IDLE:
+	    atomic rState = RADIO_IDLE;
+
+	default:
+	    return;
+	}
+    }
+    
+    async command void CsmaControl.enableCca() {
+	atomic enableCCA = TRUE;
+    }
+    
+    async command void CsmaControl.disableCca() {
+	atomic enableCCA = FALSE;
+    }
+
+ default async event uint16_t CsmaBackoff.initial[am_id_t amId](message_t *m) { 
+     return (call Random.rand16() & 0x07) + 1;
+ }
+ 
+ default async event uint16_t CsmaBackoff.congestion[am_id_t amId](message_t *m) { 
+     return (call Random.rand16() & 0xF) + 1;
+ }
+
+}
diff --git a/tos/chips/xe1205/XE1205CsmaRadioC.nc b/tos/chips/xe1205/XE1205CsmaRadioC.nc
new file mode 100644
index 00000000..28d43966
--- /dev/null
+++ b/tos/chips/xe1205/XE1205CsmaRadioC.nc
@@ -0,0 +1,79 @@
+/* Copyright (c) 2007 Shockfish SA
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Maxime Muller
+ *
+ */
+
+#include "message.h"
+#include "XE1205.h"
+
+configuration XE1205CsmaRadioC {
+    provides {
+	interface SplitControl;
+	interface Send;
+	interface Receive;
+	interface Packet;
+	interface CsmaControl;
+	interface CsmaBackoff[am_id_t amId];
+	interface PacketAcknowledgements;
+	interface LPLControl;
+    }
+}
+implementation {
+    components XE1205CsmaP as CsmaP;
+    components XE1205SendReceiveP as SendReceive;
+    components XE1205PhyP;
+    components new TimerMilliC() as BackoffTimerC;
+    components MainC, RandomC,ActiveMessageC, ActiveMessageAddressC;
+    
+    MainC.SoftwareInit -> CsmaP;
+    
+    Send =  CsmaP;
+    Receive = CsmaP;
+    Packet =  SendReceive;
+    PacketAcknowledgements = SendReceive;
+    
+    SplitControl = CsmaP;
+    CsmaControl = CsmaP;
+    CsmaBackoff = CsmaP;
+    LPLControl = CsmaP;
+  
+
+    CsmaP.SubControl -> SendReceive.SplitControl;
+    CsmaP.SubReceive -> SendReceive.Receive;
+    CsmaP.SubSend ->  SendReceive.Send;
+    CsmaP.Rssi -> XE1205PhyP.XE1205PhyRssi;
+    CsmaP.BackoffTimer -> BackoffTimerC;
+    CsmaP.Random -> RandomC;
+
+}
diff --git a/tos/chips/xe1205/XE1205Fifo.nc b/tos/chips/xe1205/XE1205Fifo.nc
new file mode 100644
index 00000000..9aef8b9a
--- /dev/null
+++ b/tos/chips/xe1205/XE1205Fifo.nc
@@ -0,0 +1,81 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Interface for access to the XE1205 radio Fifo. 
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+interface XE1205Fifo {
+
+  /**
+   * Write a sequence of data bytes to the output FIFO.
+   * Care must be taken not to overflow the FIFO (16 bytes).
+   * If call returns SUCCESS, writeDone will be signalled upon completion.
+   *
+   * @param data a pointer to the send buffer.
+   * @param length number of bytes written.
+   * @return SUCCESS if the request was accepted for transfer
+   */
+  async command error_t write(uint8_t* data, uint8_t length);
+
+  /**
+   * Signals the completion of the previous write operation.
+   *
+   * @param error  SUCCESS if the operation completed successfully, FAIL
+   *               otherwise
+   */
+  async event void writeDone(error_t error);
+
+  /**
+   * Read a sequence of data bytes from the input FIFO.
+   * The FIFO level is not checked, and care must be taken not to underflow
+   * the FIFO (16 bytes).
+   *
+   * @param data a pointer to the receive buffer.
+   * @param length number of bytes to read.
+   * @return SUCCESS if the request was accepted for transfer
+   */
+  async command error_t read(uint8_t* data, uint8_t length);
+
+
+
+  /**
+   * Signals the completion of the previous write operation.
+   *
+   * @param error  SUCCESS if the operation completed successfully, FAIL
+   *               otherwise
+   */
+  async event void readDone(error_t error );
+}
diff --git a/tos/chips/xe1205/XE1205LowPowerListening.h b/tos/chips/xe1205/XE1205LowPowerListening.h
new file mode 100644
index 00000000..bb20488c
--- /dev/null
+++ b/tos/chips/xe1205/XE1205LowPowerListening.h
@@ -0,0 +1,68 @@
+/* Copyright (c) 2007 Shockfish SA
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Maxime Muller
+ *
+ */
+
+#ifndef XE1205LOWPOWERLISTENING_H
+#define XE1205LOWPOWERLISTENING_H
+
+/**
+ * Amount of time, in milliseconds, to keep the radio on after
+ * a successful receive addressed to this node
+ */
+
+#ifndef DELAY_AFTER_RECEIVE
+#define DELAY_AFTER_RECEIVE 20
+#endif
+
+/**
+ * Value used to indicate the message being sent should be transmitted
+ * one time
+ */
+
+#ifndef ONE_MESSAGE
+#define ONE_MESSAGE 0
+#endif
+
+#ifndef DEFAULT_DUTY_PERIOD
+#define DEFAULT_DUTY_PERIOD 80
+#endif
+
+
+enum { 
+    IDLE = 0,
+    RX = 1,
+};
+
+#endif
diff --git a/tos/chips/xe1205/XE1205LowPowerListeningC.nc b/tos/chips/xe1205/XE1205LowPowerListeningC.nc
new file mode 100644
index 00000000..e7e60df9
--- /dev/null
+++ b/tos/chips/xe1205/XE1205LowPowerListeningC.nc
@@ -0,0 +1,44 @@
+
+
+configuration XE1205LowPowerListeningC {
+    provides {
+	interface SplitControl;
+	interface Send;
+	interface Receive;
+	interface LowPowerListening;
+	//	interface CsmaBackoff[am_id_t amId];
+    }
+}
+implementation {
+    components MainC,
+	XE1205ActiveMessageC,
+	XE1205LowPowerListeningP,
+	/*XE1205CsmaP as*/ XE1205CsmaRadioC,
+	RandomC;
+    components new TimerMilliC() as SendTimeoutC;
+    components new TimerMilliC() as OnTimerC;
+    components new TimerMilliC() as OffTimerC;
+    
+    Send = XE1205LowPowerListeningP;
+    Receive = XE1205LowPowerListeningP;
+    SplitControl = XE1205LowPowerListeningP;
+    LowPowerListening = XE1205LowPowerListeningP;
+    //    CsmaBackoff = XE1205LowPowerListeningP;
+
+    MainC.SoftwareInit -> XE1205LowPowerListeningP;
+    
+    //XE1205LowPowerListeningP.LowPowerListening -> XE1205CsmaRadioC;    
+    XE1205LowPowerListeningP.SubControl -> XE1205CsmaRadioC;
+    XE1205LowPowerListeningP.CsmaControl -> XE1205CsmaRadioC;
+    //  XE1205LowPowerListeningP.SubBackoff -> XE1205CsmaRadioC;
+    XE1205LowPowerListeningP.SubSend -> XE1205CsmaRadioC.Send;
+    XE1205LowPowerListeningP.SubReceive -> XE1205CsmaRadioC.Receive;
+    XE1205LowPowerListeningP.AMPacket -> XE1205ActiveMessageC;
+    XE1205LowPowerListeningP.PacketAcknowledgements -> XE1205ActiveMessageC;// XE1205CsmaRadioC;
+    XE1205LowPowerListeningP.SendTimeout -> SendTimeoutC;
+    XE1205LowPowerListeningP.OnTimer -> OnTimerC;
+    XE1205LowPowerListeningP.OffTimer -> OffTimerC;
+    XE1205LowPowerListeningP.Random -> RandomC;
+    XE1205LowPowerListeningP.LPLControl -> XE1205CsmaRadioC.LPLControl;
+
+}
diff --git a/tos/chips/xe1205/XE1205LowPowerListeningP.nc b/tos/chips/xe1205/XE1205LowPowerListeningP.nc
new file mode 100644
index 00000000..dc7da7e6
--- /dev/null
+++ b/tos/chips/xe1205/XE1205LowPowerListeningP.nc
@@ -0,0 +1,368 @@
+/* Copyright (c) 2007 Shockfish SA
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Maxime Muller
+ *
+ */
+
+#include "XE1205LowPowerListening.h"
+
+module XE1205LowPowerListeningP {
+    provides {
+	interface Init;
+	interface SplitControl;
+	interface Send;
+	interface Receive;
+	interface LowPowerListening;
+
+    }
+    uses {
+	interface LPLControl;
+	interface SplitControl as SubControl;	
+	interface CsmaControl;
+	interface Send as SubSend;
+	interface Receive as SubReceive;
+	interface AMPacket;
+	interface PacketAcknowledgements;
+	interface Timer<TMilli> as SendTimeout;
+	interface Timer<TMilli> as OnTimer;
+	interface Timer<TMilli> as OffTimer;
+	interface Random;
+    }
+}
+
+implementation {
+
+    message_t * curTxMsg;
+    uint8_t curTxMsgLength;
+    uint8_t seqNo;
+    uint8_t lastSeqNo;
+    uint8_t txSeqNo;
+    uint16_t sleepInterval;
+    uint16_t sleepTime;
+    bool fromSplitStart = FALSE;
+    bool fromSplitStop = FALSE;
+
+    typedef enum {
+	RADIO_INIT,
+	RADIO_ON,
+	RADIO_OFF,
+	RADIO_TX,
+    } lpl_state_t;
+    
+    lpl_state_t rState;
+    
+    
+    void sendDone(error_t err);
+
+    xe1205_header_t* getHeader( message_t* msg ) {
+	return (xe1205_header_t*)( msg->data - sizeof(xe1205_header_t) );
+    }
+    
+    xe1205_footer_t* getFooter(message_t* msg) {
+	return (xe1205_footer_t*)(msg->footer);
+    }
+    command error_t Init.init() {
+	sleepTime = DEFAULT_DUTY_PERIOD;
+	atomic rState = RADIO_INIT;
+	txSeqNo = call Random.rand16()&0xFE;
+	return SUCCESS;
+    }
+
+    command error_t SplitControl.start() {
+	// start dutyCycling
+	if (rState == RADIO_OFF || rState == RADIO_INIT) {
+	    if (SUCCESS==call SubControl.start()) {
+		fromSplitStart = TRUE;
+		return SUCCESS;
+	    }
+	} 
+	return FAIL; 
+    }
+    
+    event void SubControl.startDone(error_t err) {
+	
+	if(err==SUCCESS) {
+	    if(sleepTime > 0) {// keep radio on for a while
+		call OffTimer.stop();
+		call OnTimer.startOneShot(DELAY_AFTER_RECEIVE);
+	    }
+	    if (sleepTime == 0) // radio always on
+		call LPLControl.setMode(IDLE); 
+	    atomic rState = RADIO_ON;
+
+	    if (fromSplitStart) {
+		fromSplitStart=FALSE;
+		signal SplitControl.startDone(err);
+	    }
+	}
+	else {
+	    call SubControl.start();
+	}
+    }
+
+    command error_t SplitControl.stop() {
+	fromSplitStop = TRUE;
+	
+	return call SubControl.stop();
+    }
+
+    event void SubControl.stopDone(error_t err) {
+	if(!err) {
+	    if (rState == RADIO_ON) { 
+		if (call OnTimer.isRunning()) {
+		    call OnTimer.stop();
+		}
+	    }
+	    atomic rState = RADIO_OFF;
+	    if (fromSplitStop==FALSE) {
+		call OffTimer.startOneShot(sleepTime);
+	    } else {
+		fromSplitStop = FALSE;
+		signal SplitControl.startDone(err);
+	    }
+	} else
+	    call OffTimer.startOneShot(sleepTime);
+    }
+
+    event void OffTimer.fired() { 
+	if (SUCCESS==call SubControl.start()) {
+	    if (sleepTime > 0)
+		call LPLControl.setMode(RX);
+	    if (sleepTime == 0) // radio always on
+		call LPLControl.setMode(IDLE); 
+	} 
+	else 
+	    call OffTimer.startOneShot(sleepTime);
+    }
+
+    event void OnTimer.fired() {
+	// switch off the radio
+	if(sleepTime > 0)
+	    if (SUCCESS != call SubControl.stop()) {
+		// retry
+		call OnTimer.startOneShot(DELAY_AFTER_RECEIVE);
+	    }
+    }
+
+    task void sendPkt() {
+	if(SUCCESS != call SubSend.send(curTxMsg,curTxMsgLength)) {
+	    call LPLControl.setMode(IDLE); 
+	    call OffTimer.startOneShot(sleepTime);
+	    sendDone(FAIL);
+	}
+    }
+
+    /*
+     * send commands
+     */
+    command error_t Send.send(message_t *msg, uint8_t len) {	
+	if (rState == RADIO_INIT) return EOFF;
+	
+	else {
+	    call OffTimer.stop();
+	    call OnTimer.stop();
+	    atomic rState = RADIO_TX;
+	    curTxMsg = msg;
+	    curTxMsgLength = len;
+	    if(call LowPowerListening.getRxSleepInterval(curTxMsg) 
+	       > ONE_MESSAGE) {
+		txSeqNo+=0x02;
+		if (AM_BROADCAST_ADDR != call AMPacket.destination(curTxMsg)) {
+		    getHeader(curTxMsg)->ack = txSeqNo|0x01;
+		} else
+		    getHeader(curTxMsg)->ack = txSeqNo&0xFE;
+		call CsmaControl.enableCca();
+		
+		if(SUCCESS==post sendPkt()) {
+		    call SendTimeout.startOneShot(call LowPowerListening.getRxSleepInterval(curTxMsg) * 2);
+		    return SUCCESS;
+		}
+		else {
+		    call SendTimeout.stop();
+		    call LPLControl.setMode(IDLE);
+		    call OffTimer.startOneShot(sleepTime);
+		    return FAIL;
+		}
+	    } else {
+		call LPLControl.setMode(IDLE);
+		call OffTimer.startOneShot(sleepTime);
+		return FAIL;
+	    }
+	}
+    }
+
+    event void SendTimeout.fired() {
+	atomic {
+	    if (rState == RADIO_TX) // let sendDone occur
+		rState = RADIO_ON;
+	}
+	call OffTimer.startOneShot(DELAY_AFTER_RECEIVE);
+    }
+	
+    void sendDone(error_t err) {
+	atomic {
+	    if (rState == RADIO_TX)
+		rState = RADIO_ON;
+	}
+	if(err!=FAIL) 
+	    call SubControl.stop();
+	signal Send.sendDone(curTxMsg, err);
+    }
+
+    event void SubSend.sendDone(message_t *msg, error_t err) {
+
+	if(rState == RADIO_TX
+	   && call SendTimeout.isRunning()) {
+	    if ( AM_BROADCAST_ADDR != call AMPacket.destination(msg)
+		 && err==SUCCESS) {
+		call SendTimeout.stop();
+		sendDone(err);
+	    } else { // ack timeout or bcast msg
+		call CsmaControl.disableCca();
+		if(SUCCESS!=post sendPkt()) {
+
+		    sendDone(FAIL);
+		}
+	    }
+	} 
+	else {
+	    sendDone(err);
+	  
+	}
+    }
+
+    command error_t Send.cancel(message_t *msg) {
+	if(curTxMsg == msg) {
+	    atomic rState = RADIO_ON;
+	    return SUCCESS;
+	}	
+	return FAIL;
+    }
+
+    command uint8_t Send.maxPayloadLength() {
+	return call SubSend.maxPayloadLength();
+    }
+    
+    command void *Send.getPayload(message_t* msg, uint8_t len) {
+	return call SubSend.getPayload(msg,len);
+    }
+    
+    /* 
+     * Receive commands
+     */
+    event message_t *SubReceive.receive(message_t *msg,void *payload, uint8_t len) {
+	
+	if ((getHeader(msg)->ack & 0xFE ) == lastSeqNo
+	    && call AMPacket.destination(msg) == AM_BROADCAST_ADDR) {
+	    return msg;
+	} else {
+	    lastSeqNo = getHeader(msg)->ack & 0xFE;
+	    if(!call SendTimeout.isRunning()) {
+		// catched a packet between pktSend
+		call OffTimer.startOneShot(DELAY_AFTER_RECEIVE);
+	    }
+
+	    return signal Receive.receive(msg,payload,len);
+	}
+    }
+    
+    uint16_t getActualDutyCycle(uint16_t dutyCycle) {
+	if(dutyCycle > 10000) {
+	    return 10000;
+	} else if(dutyCycle == 0) {
+	    return 1;
+	}
+	return dutyCycle;
+    }
+
+    command void LowPowerListening.setLocalSleepInterval(uint16_t sTime) {
+ 	if(sleepTime == 0 && sTime >0) {
+	    call LPLControl.setMode(RX);
+	    call OnTimer.startOneShot(DELAY_AFTER_RECEIVE);
+	}
+	sleepTime = sTime;
+    }
+    
+    command uint16_t LowPowerListening.getLocalSleepInterval() {
+	return sleepTime;
+    }
+
+    command void LowPowerListening.setLocalDutyCycle(uint16_t d) {
+	return call LowPowerListening.setLocalSleepInterval(call LowPowerListening.dutyCycleToSleepInterval(d));
+    }
+
+    command uint16_t LowPowerListening.getLocalDutyCycle() {
+	return call LowPowerListening.sleepIntervalToDutyCycle(sleepTime);
+    }
+
+    command void LowPowerListening.setRxSleepInterval(message_t *msg, uint16_t sleepIntervalMs) {
+	xe1205_footer_t *footer = getFooter(msg);
+
+	footer->rxInterval =  sleepIntervalMs;
+    }
+
+    command uint16_t LowPowerListening.getRxSleepInterval(message_t *msg) {
+	xe1205_footer_t *footer = getFooter(msg);
+
+	if (footer->rxInterval >= 0)
+	    return sleepTime;
+	else
+	    return -(footer->rxInterval + 1);
+    }
+
+    command void LowPowerListening.setRxDutyCycle(message_t *msg, uint16_t dCycle) {
+	getFooter(msg)->rxInterval =  call LowPowerListening.dutyCycleToSleepInterval(dCycle);
+    }
+
+    command uint16_t LowPowerListening.getRxDutyCycle(message_t *msg) {
+	return call LowPowerListening.sleepIntervalToDutyCycle(getFooter(msg)->rxInterval);
+    }
+
+    command uint16_t LowPowerListening.dutyCycleToSleepInterval(uint16_t dCycle) {
+	dCycle = getActualDutyCycle(dCycle);
+
+	if(dCycle == 10000) {
+	    return 0;
+	}
+	return (DELAY_AFTER_RECEIVE * (10000 - dCycle)) / dCycle;
+    }
+
+    command uint16_t LowPowerListening.sleepIntervalToDutyCycle(uint16_t sInterval) {
+	if(sInterval == 0) {
+	    return 10000;
+	}
+	
+	return getActualDutyCycle((DELAY_AFTER_RECEIVE * 10000) 
+				  / (sInterval + DELAY_AFTER_RECEIVE));
+    }
+}
diff --git a/tos/chips/xe1205/XE1205PacketC.nc b/tos/chips/xe1205/XE1205PacketC.nc
new file mode 100644
index 00000000..5f8c516d
--- /dev/null
+++ b/tos/chips/xe1205/XE1205PacketC.nc
@@ -0,0 +1,54 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+#include "message.h"
+
+configuration XE1205PacketC {
+  provides interface AMPacket;
+  provides interface Packet;
+}
+
+implementation {
+
+  components XE1205PacketP;
+  AMPacket = XE1205PacketP;
+  Packet = XE1205PacketP;
+
+  components ActiveMessageAddressC;
+  XE1205PacketP.amAddress -> ActiveMessageAddressC;  
+}
diff --git a/tos/chips/xe1205/XE1205SendReceiveC.nc b/tos/chips/xe1205/XE1205SendReceiveC.nc
new file mode 100644
index 00000000..7ba4dd35
--- /dev/null
+++ b/tos/chips/xe1205/XE1205SendReceiveC.nc
@@ -0,0 +1,61 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+configuration XE1205SendReceiveC {
+    provides interface Send;
+    provides interface Packet;
+    provides interface PacketAcknowledgements;
+    provides interface AckSendReceive;
+    provides interface SplitControl @atleastonce();
+    provides interface Receive;
+}
+implementation {
+
+  components XE1205SendReceiveP;
+  Send = XE1205SendReceiveP;
+  Receive = XE1205SendReceiveP;
+  Packet = XE1205SendReceiveP;
+  PacketAcknowledgements = XE1205SendReceiveP;
+  AckSendReceive =  XE1205SendReceiveP;
+  SplitControl = XE1205SendReceiveP;
+
+  components XE1205PhyC;
+  XE1205SendReceiveP.XE1205PhyRxTx -> XE1205PhyC;
+  XE1205SendReceiveP.XE1205PhyRssi -> XE1205PhyC;
+  XE1205SendReceiveP.PhySplitControl -> XE1205PhyC;
+}
+
diff --git a/tos/chips/xe1205/XE1205SendReceiveP.nc b/tos/chips/xe1205/XE1205SendReceiveP.nc
new file mode 100644
index 00000000..9d11b1c4
--- /dev/null
+++ b/tos/chips/xe1205/XE1205SendReceiveP.nc
@@ -0,0 +1,512 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+
+module XE1205SendReceiveP {
+    provides interface Send;
+    provides interface Packet;
+    provides interface PacketAcknowledgements;
+    provides interface Receive;
+    provides interface AckSendReceive;
+    provides interface SplitControl @atleastonce();
+
+    uses interface XE1205PhyRxTx;
+    uses interface XE1205PhyRssi;
+    uses interface SplitControl as PhySplitControl;
+}
+implementation {
+
+#include "crc.h"
+#include "xe1205debug.h"
+
+#define min(X, Y)  ((X) < (Y) ? (X) : (Y))
+    enum {
+	PKT_CODE = 0,
+	ACK_CODE = 1
+    };
+
+    // Phy header definition. This is not seen by anything above us.
+    typedef nx_struct xe1205_phy_header_t {
+	nx_uint8_t whitening;
+	nx_uint8_t length;
+    } xe1205_phy_header_t;
+
+    typedef struct ackMsg_t {
+	uint16_t pl;
+    } ackMsg_t;
+  
+    xe1205_phy_header_t txPhyHdr;
+    norace xe1205_phy_header_t rxPhyHdr; // we don't accept an incoming packet until previous one has been copied into local buf
+
+    norace message_t ackMsg;
+    norace message_t *ackMsgPtr = &ackMsg;
+
+    norace message_t *txMsgSendDonePtr=NULL;
+    norace message_t *txMsgPtr=NULL;   // message under transmission (non-null until after sendDone).
+    norace uint8_t _len;
+    norace char txBuf[16];             // buffer used to pass outgoing bytes to Phy
+
+    norace uint8_t *rxBufPtr=NULL;     // pointer to raw frame received from Phy
+    message_t rxMsg;                   // for rx path buffer swapping with upper modules
+    message_t *rxMsgPtr=&rxMsg; 
+
+    norace uint8_t txIndex, txLen;     // State for packet transmissions
+    norace uint16_t txRunningCRC;      // Crc for outgoing pkts is computed incrementally
+
+    norace uint8_t txWhiteByte;
+    norace bool sendingAck=FALSE;
+
+    uint16_t ackPayload;
+
+    bool warmUp=FALSE;
+
+    uint8_t const pktPreamble[] = {
+	0x55, 0x55, 0x55,
+	(data_pattern >> 16) & 0xff, (data_pattern >> 8) & 0xff, data_pattern & 0xff
+    };
+
+    uint8_t const ackPreamble[] = {
+	0x55, 0x55, 0x55,
+	(ack_pattern >> 16) & 0xff, (ack_pattern >> 8) & 0xff, ack_pattern & 0xff
+    };
+
+    task void signalPacketReceived();
+
+    error_t sendRadioOn(uint8_t preamble);
+
+    xe1205_header_t* getHeader( message_t* msg ) {
+	return (xe1205_header_t*)( msg->data - sizeof(xe1205_header_t) );
+    }
+
+    xe1205_footer_t* getFooter(message_t* msg) {
+	return (xe1205_footer_t*)(msg->footer);
+    }
+  
+    xe1205_metadata_t* getMetadata(message_t* msg) {
+	return (xe1205_metadata_t*)((uint8_t*)msg->footer + sizeof(xe1205_footer_t));
+    }
+
+    command void AckSendReceive.setAckPayload(uint16_t _pl) {
+	ackPayload = _pl;
+    }
+    
+    command uint16_t AckSendReceive.getAckPayload() {
+	return ackPayload;
+    }
+
+    command uint8_t Send.maxPayloadLength() {
+	return call Packet.maxPayloadLength();
+    }
+
+    command void* Send.getPayload(message_t* m, uint8_t len) {
+	return call Packet.getPayload(m, len);
+    }
+
+    task void sendDoneTask() {
+	txMsgSendDonePtr = txMsgPtr;
+	txMsgPtr=NULL;
+	signal Send.sendDone(txMsgSendDonePtr, SUCCESS);
+
+    }
+
+    task void sendDoneFailTask() {
+	txMsgSendDonePtr = txMsgPtr;
+	txMsgPtr=NULL;
+	signal Send.sendDone(txMsgSendDonePtr, FAIL);
+
+    }
+
+   task void sendDoneNoAckTask() {
+       txMsgSendDonePtr = txMsgPtr;
+       txMsgPtr=NULL;
+       signal Send.sendDone(txMsgSendDonePtr, ENOACK);
+   }
+
+
+    command error_t SplitControl.start() {
+	error_t err;
+	err = call PhySplitControl.start();
+
+	return err;
+    }
+
+    command error_t SplitControl.stop() {
+	error_t err;
+
+	// One could also argue that this is split phase so should cope and do the right thing.
+	// Or one could argue that whatever the phy is doing underneath just gets interrupted.
+	if (call XE1205PhyRxTx.busy()) return EBUSY;
+
+	err = call PhySplitControl.stop();
+	txMsgPtr=NULL;
+	rxBufPtr = NULL;
+	return err;
+
+    }
+
+    event void PhySplitControl.startDone(error_t error) {
+	if (txMsgPtr!=NULL) {
+
+	    sendRadioOn(PKT_CODE);
+	} else {
+	    if (warmUp==TRUE) {
+
+		post sendDoneFailTask();
+	    }
+	}
+	warmUp=FALSE;
+	signal SplitControl.startDone(error);
+    }
+
+    event void PhySplitControl.stopDone(error_t error) { 
+	
+	signal SplitControl.stopDone(error);
+    }
+
+
+
+    task void sendAck() {
+	atomic {
+	    ((xe1205_metadata_t*)((uint8_t*)ackMsgPtr->footer + sizeof(xe1205_footer_t)))->length = sizeof(ackMsg_t);
+	    ((xe1205_header_t*)(&ackMsg.data - sizeof(xe1205_header_t)))->group = \
+		(getHeader((message_t*)rxMsgPtr))->group;
+	    ((xe1205_header_t*)(ackMsgPtr->data - sizeof(xe1205_header_t)))->type = \
+		((xe1205_header_t*)(rxMsgPtr->data - sizeof(xe1205_header_t)))->type;
+	    ((xe1205_header_t*)(ackMsgPtr->data - sizeof(xe1205_header_t)))->dest = \
+		((xe1205_header_t*)(rxMsgPtr->data - sizeof(xe1205_header_t)))->source;
+	    ((xe1205_header_t*)(ackMsgPtr->data - sizeof(xe1205_header_t)))->source = TOS_NODE_ID; 
+	    ((ackMsg_t*)(ackMsgPtr->data))->pl = ackPayload;
+
+	    txMsgPtr = ackMsgPtr;
+	}
+	_len = sizeof(ackMsg_t);
+	sendRadioOn(ACK_CODE);
+    }
+
+    command error_t Send.cancel(message_t* msg) {
+	/* Cancel is unsupported for now. */
+	return FAIL;
+    }
+
+    void checkCrcAndUnwhiten(uint8_t* msg, uint8_t white, uint8_t len) {
+	uint16_t crc = 0;
+	uint8_t i, b;
+	uint8_t* uwPtr ;
+	atomic uwPtr= (uint8_t*) getHeader(rxMsgPtr);
+	for(i = 0; i < sizeof(xe1205_header_t) + len + offsetof(xe1205_footer_t,crc) ; i++) {
+	    b = msg[i] ^ white;
+	    uwPtr[i] = b;
+	    crc = crcByte(crc, b);
+	}
+	atomic {
+	    getFooter(rxMsgPtr)->crc = (crc == (msg[i] | (msg[i+1] << 8)));
+	}
+    }
+
+    inline void updateCRCAndWhiten(char* src, char* dst, uint8_t len)
+	{
+	    uint8_t i;
+	    for(i=0; i < len; i++) {
+		txRunningCRC = crcByte(txRunningCRC, src[i]); 
+		dst[i] = src[i] ^ txWhiteByte;
+	    }
+	}
+
+    error_t sendRadioOn(uint8_t preamble) {
+	error_t err;
+	txWhiteByte++;
+	txPhyHdr.whitening = txWhiteByte;
+	txPhyHdr.length = _len;
+	txRunningCRC=0;
+	getMetadata(txMsgPtr)->length = _len; 
+	if ((((xe1205_header_t*)( (uint8_t*)txMsgPtr->data - sizeof(xe1205_header_t)))->ack & 0x01)==0x01) {
+	    call XE1205PhyRxTx.enableAck(TRUE);
+	}
+	txIndex = min(sizeof(xe1205_header_t) + _len + sizeof(xe1205_footer_t), 
+		      sizeof(txBuf) - sizeof(pktPreamble) - sizeof(xe1205_phy_header_t));
+	txLen = _len + sizeof(xe1205_header_t) + sizeof(xe1205_footer_t);
+	if (txIndex == txLen - 1) txIndex--; // don't send a single last byte
+
+	switch (preamble) {
+	case PKT_CODE:
+	    memcpy(txBuf, pktPreamble, sizeof(pktPreamble));
+	    memcpy(txBuf + sizeof(pktPreamble), &txPhyHdr, sizeof(txPhyHdr));
+	    break;
+	case ACK_CODE:
+	    sendingAck=TRUE;
+	    memcpy(txBuf, ackPreamble, sizeof(ackPreamble));
+	    memcpy(txBuf + sizeof(pktPreamble), &txPhyHdr, sizeof(txPhyHdr));
+	  
+	    break;
+	}
+	
+	
+	if (txIndex == txLen) {    // slap on CRC if we're already at end of packet
+	    updateCRCAndWhiten((char*) getHeader(txMsgPtr), 
+			       txBuf + sizeof(pktPreamble) + sizeof(xe1205_phy_header_t),
+			       sizeof(xe1205_header_t) + _len); 
+	    txBuf[sizeof(pktPreamble) + sizeof(xe1205_phy_header_t) + txLen - 2] = txRunningCRC & 0xff; 
+	    txBuf[sizeof(pktPreamble) + sizeof(xe1205_phy_header_t) + txLen - 1] = txRunningCRC >> 8; 
+	} else {
+	    updateCRCAndWhiten((char*) getHeader(txMsgPtr), 
+			       txBuf + sizeof(pktPreamble) + sizeof(xe1205_phy_header_t),
+			       txIndex);
+	}
+	// note that the continue send can come in before this instruction returns .
+	err = call XE1205PhyRxTx.sendFrame(txBuf, txIndex + sizeof(pktPreamble) + sizeof(xe1205_phy_header_t));
+	if (err != SUCCESS) { 
+	    if (preamble==PKT_CODE)
+		post sendDoneFailTask();
+	    txMsgPtr = NULL;
+	}
+	return err;
+    }
+
+    command error_t Send.send(message_t* msg, uint8_t len) {
+
+	atomic {
+	    if (txMsgPtr){ return EBUSY;}
+	    if (msg==NULL) { return FAIL;}
+	    if (call XE1205PhyRxTx.busy()==TRUE){ return EBUSY;}
+
+	    if (call XE1205PhyRxTx.off()) {
+		txMsgPtr = msg;
+		_len = len;
+		if(call PhySplitControl.start()==SUCCESS) {
+		    warmUp=TRUE;
+		    return SUCCESS;
+		} else {txMsgPtr=NULL;return EOFF;}
+	    }
+	    txMsgPtr = msg;
+	    _len = len;
+	}
+	
+	return  sendRadioOn(PKT_CODE);
+    }
+
+
+ 
+
+    async event char* XE1205PhyRxTx.continueSend(uint8_t* len) __attribute__ ((noinline))
+    {
+	
+	uint8_t curIndex = txIndex;
+	uint8_t l = min(txLen - txIndex, sizeof(txBuf));
+	if (txIndex + l == txLen - 1) l--; // don't send a single last byte
+
+	*len = l;
+	if (!l) return NULL;
+
+	txIndex += l;
+
+
+	// if we're at end of packet, slap on CRC
+	if (txIndex == txLen) {
+	    updateCRCAndWhiten(&((char*) (getHeader(txMsgPtr)))[curIndex], txBuf, l - 2);
+	    txBuf[l - 2] = txRunningCRC & 0xff; 
+	    txBuf[l - 1] = txRunningCRC >> 8;
+
+	} else {
+	    updateCRCAndWhiten(((char*) getHeader(txMsgPtr)) + curIndex, txBuf, l);
+	}
+
+
+	return txBuf;
+    }
+
+
+    uint8_t sendDones = 0;
+    async event void XE1205PhyRxTx.sendFrameDone(error_t err) __attribute__ ((noinline)) {
+	sendDones++;
+	if(sendingAck==FALSE) {
+	    switch (err) {
+
+	    case SUCCESS:
+		if (post sendDoneTask() != SUCCESS)
+		    xe1205check(2, FAIL);
+		break;
+		
+	    case ENOACK:
+		if(post sendDoneNoAckTask() !=SUCCESS)
+		    xe1205check(2, FAIL);
+		break;
+
+	    default:	
+		if (post sendDoneFailTask() != SUCCESS)
+		    xe1205check(2, FAIL);
+	    }
+
+	} else {
+	    
+	    txMsgPtr = NULL;
+	    sendingAck=FALSE; 
+	    post signalPacketReceived();
+	}
+    }
+
+    command void Packet.clear(message_t* msg) {
+      memset(getHeader(msg), 0, sizeof(xe1205_header_t));
+      memset(getFooter(msg), 0, sizeof(xe1205_footer_t));
+      memset(getMetadata(msg), 0, sizeof(xe1205_metadata_t));
+    }
+
+    command uint8_t Packet.payloadLength(message_t* msg) {
+	return getMetadata(msg)->length;
+    }
+ 
+    command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+	getMetadata(msg)->length  = len;
+    }
+  
+    command uint8_t Packet.maxPayloadLength() {
+	return TOSH_DATA_LENGTH;
+    }
+
+    command void* Packet.getPayload(message_t* msg, uint8_t len) {
+	if (len <= TOSH_DATA_LENGTH) {
+	    return (void*)msg->data;
+	}
+	else {
+	    return NULL;
+	}
+    }
+
+    async command error_t PacketAcknowledgements.requestAck(message_t* msg) {
+	(getHeader(msg))-> ack |= 0x01;
+	return SUCCESS;
+    }
+
+    async command error_t PacketAcknowledgements.noAck(message_t* msg) {
+	(getHeader(msg))-> ack &= 0xFE;
+	return SUCCESS;
+    }
+
+    async command bool PacketAcknowledgements.wasAcked(message_t* msg) {
+	return 	(getHeader(msg))-> ack & 0x01;
+    }
+
+ default event void Send.sendDone(message_t* msg, error_t error) { }
+
+ async event uint8_t XE1205PhyRxTx.rxFrameBegin(char* data, uint8_t len)  __attribute__ ((noinline)) {
+
+     uint8_t datalen;
+
+     memcpy(&rxPhyHdr, data, sizeof(xe1205_phy_header_t));
+     datalen = rxPhyHdr.length;
+     if (datalen > TOSH_DATA_LENGTH || rxBufPtr) return len;
+    
+     return datalen + sizeof(xe1205_header_t) + sizeof(xe1205_footer_t) + sizeof(xe1205_phy_header_t);
+ }
+
+ task void signalPacketReceived() {
+     
+     atomic { 
+	 getMetadata((message_t*) rxMsgPtr)->length = rxPhyHdr.length; 
+	 
+	 rxBufPtr = NULL;
+	 rxMsgPtr =  signal Receive.receive(rxMsgPtr, rxMsgPtr->data, getMetadata(rxMsgPtr)->length);
+     }
+ }
+
+
+ uint32_t nrxmsgs;
+
+ async event void XE1205PhyRxTx.rxFrameEnd(char* data, uint8_t len, error_t status)   __attribute__ ((noinline)) {
+     if (status != SUCCESS){ return;}
+
+     if (rxBufPtr) return; // this could happen whenever rxFrameBegin was called with rxBufPtr still active
+     rxBufPtr = (data + sizeof(xe1205_phy_header_t));
+
+     checkCrcAndUnwhiten(rxBufPtr, rxPhyHdr.whitening, rxPhyHdr.length);
+
+     if (!getFooter(rxMsgPtr)->crc) {
+	 atomic rxBufPtr = NULL;
+	 return;
+     }
+     
+     getMetadata((message_t*) rxMsgPtr)->strength =  call XE1205PhyRssi.readRxRssi();
+     getMetadata((message_t*) rxMsgPtr)->length = rxPhyHdr.length;
+
+     if ((getHeader((message_t*)rxMsgPtr))->dest == TOS_NODE_ID &&
+	 (((getHeader((message_t*)rxMsgPtr))->ack)& 0x01)==1) {
+	 post sendAck();
+     } else {
+	 post signalPacketReceived();
+     }
+
+ }
+
+ async event void XE1205PhyRxTx.rxAckEnd(char* data, uint8_t len, error_t status)   __attribute__ ((noinline)) {
+
+     sendingAck=FALSE;
+
+     if (status != SUCCESS) { 
+	 post sendDoneNoAckTask();
+	 return;
+     }
+
+     if (rxBufPtr) {
+	 post sendDoneNoAckTask();
+	 return; // this could happen whenever rxFrameBegin was called with rxBufPtr still active
+     }
+
+     rxBufPtr = (data + sizeof(xe1205_phy_header_t));
+
+     checkCrcAndUnwhiten(rxBufPtr, rxPhyHdr.whitening, rxPhyHdr.length);
+
+     if (!getFooter(rxMsgPtr)->crc) {
+	 post sendDoneNoAckTask();
+	 atomic rxBufPtr = NULL;
+	 return;
+     }
+     
+     getMetadata((message_t*) rxMsgPtr)->strength =  call XE1205PhyRssi.readRxRssi();
+     getMetadata((message_t*) rxMsgPtr)->length = rxPhyHdr.length;
+
+     if ((getHeader((message_t*)rxMsgPtr))->dest == TOS_NODE_ID) {
+	 post sendDoneTask();
+     } else {
+	 post sendDoneNoAckTask();
+     }
+     atomic rxBufPtr = NULL;
+ }
+
+ async event void XE1205PhyRssi.rssiDone(uint8_t _rssi) { }
+
+}
+
diff --git a/tos/chips/xe1205/XE1205SpiC.nc b/tos/chips/xe1205/XE1205SpiC.nc
new file mode 100644
index 00000000..c418bb4d
--- /dev/null
+++ b/tos/chips/xe1205/XE1205SpiC.nc
@@ -0,0 +1,111 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of basic SPI primitives for the Semtech/Xemics XE1205 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Henri Dubois-Ferriere
+ * @version $Revision: 1.5 $ $Date: 2007-07-13 15:54:08 $
+ */
+
+#include "XE1205.h"
+
+generic configuration XE1205SpiC() {
+
+  provides interface Resource;
+
+  // registers
+  provides interface XE1205Register as MCParam0;
+  provides interface XE1205Register as MCParam1;
+  provides interface XE1205Register as MCParam2;
+  provides interface XE1205Register as MCParam3;
+  provides interface XE1205Register as MCParam4;
+  provides interface XE1205Register as IrqParam5;
+  provides interface XE1205Register as IrqParam6;
+  provides interface XE1205Register as TXParam7;
+  provides interface XE1205Register as RXParam8;
+  provides interface XE1205Register as RXParam9;
+  provides interface XE1205Register as RXParam10;
+  provides interface XE1205Register as RXParam11;
+  provides interface XE1205Register as RXParam12;
+  provides interface XE1205Register as Pattern13;
+  provides interface XE1205Register as Pattern14;
+  provides interface XE1205Register as Pattern15;
+  provides interface XE1205Register as Pattern16;
+  provides interface XE1205Register as OscParam17;
+  provides interface XE1205Register as OscParam18;
+  provides interface XE1205Register as TParam19;
+  provides interface XE1205Register as TParam21;
+  provides interface XE1205Register as TParam22;
+
+  // fifos
+  provides interface XE1205Fifo;
+
+}
+
+implementation {
+
+  enum {
+    CLIENT_ID = unique( "XE1205Spi.Resource" ),
+  };
+
+  components XE1205SpiP as Spi;
+  
+  Resource = Spi.Resource[ CLIENT_ID ];
+
+  // registers
+  MCParam0   = Spi.Reg[ MCParam_0 ];
+  MCParam1   = Spi.Reg[ MCParam_1 ];
+  MCParam2   = Spi.Reg[ MCParam_2 ];
+  MCParam3   = Spi.Reg[ MCParam_3 ];
+  MCParam4   = Spi.Reg[ MCParam_4 ];
+  IrqParam5  = Spi.Reg[ IrqParam_5 ];
+  IrqParam6  = Spi.Reg[ IrqParam_6 ];
+  TXParam7   = Spi.Reg[ TXParam_7 ];
+  RXParam8   = Spi.Reg[ RXParam_8 ];
+  RXParam9   = Spi.Reg[ RXParam_9 ];
+  RXParam10  = Spi.Reg[ RXParam_10 ];
+  RXParam11  = Spi.Reg[ RXParam_11 ];
+  RXParam12  = Spi.Reg[ RXParam_12 ];
+  Pattern13  = Spi.Reg[ Pattern_13 ];
+  Pattern14  = Spi.Reg[ Pattern_14 ];
+  Pattern15  = Spi.Reg[ Pattern_15 ];
+  Pattern16  = Spi.Reg[ Pattern_16 ];
+  OscParam17 = Spi.Reg[ OscParam_17 ];
+  OscParam18 = Spi.Reg[ OscParam_18 ];
+  TParam19   = Spi.Reg[ TParam_19 ];
+  TParam21   = Spi.Reg[ TParam_21 ];
+  TParam22   = Spi.Reg[ TParam_22 ];
+
+  XE1205Fifo = Spi.Fifo;
+}
+
diff --git a/tos/chips/xe1205/XE1205SpiImplP.nc b/tos/chips/xe1205/XE1205SpiImplP.nc
new file mode 100644
index 00000000..63fe8b8d
--- /dev/null
+++ b/tos/chips/xe1205/XE1205SpiImplP.nc
@@ -0,0 +1,259 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Henri Dubois-Ferriere
+ * @version $Revision: 1.5 $ $Date: 2007-07-13 15:54:08 $
+ */
+
+module XE1205SpiImplP {
+
+    provides interface XE1205Fifo as Fifo @atmostonce();
+    provides interface XE1205Register as Reg[uint8_t id];
+
+    provides interface Init @atleastonce();
+
+    provides interface Resource[ uint8_t id ];
+
+    uses interface Resource as SpiResource;
+    uses interface GeneralIO as NssDataPin;
+    uses interface GeneralIO as NssConfigPin;
+    uses interface SpiByte;
+    uses interface SpiPacket;
+}
+
+implementation {
+
+#include "xe1205debug.h"
+
+    enum {
+	RESOURCE_COUNT = uniqueCount( "XE1205Spi.Resource" ),
+	NO_HOLDER = 0xff,
+    };
+
+
+    bool m_resource_busy = FALSE;
+    uint8_t m_requests = 0;
+    uint8_t m_holder = NO_HOLDER;
+
+    command error_t Init.init() {
+	call NssDataPin.makeOutput();
+	call NssConfigPin.makeOutput();
+	call NssDataPin.set();
+	call NssConfigPin.set();
+	return SUCCESS;
+    }
+
+    async command error_t Resource.request[ uint8_t id ]() {
+	atomic {
+	    if ( m_resource_busy )
+		m_requests |= 1 << id;
+	    else {
+		m_holder = id;
+		m_resource_busy = TRUE;
+		
+		call SpiResource.request();
+	    }
+	}
+	return SUCCESS;
+    }
+  
+    async command error_t Resource.immediateRequest[ uint8_t id ]() {
+	error_t error;
+	atomic {
+	    if ( m_resource_busy )
+		return EBUSY;
+	    error = call SpiResource.immediateRequest();
+	    if ( error == SUCCESS ) {
+		m_holder = id;
+		m_resource_busy = TRUE;
+
+	    }
+	    xe1205check(9, error);
+	}
+	return error;
+    }
+
+    async command error_t Resource.release[ uint8_t id ]() {
+	uint8_t i;
+	atomic {
+	    if ( m_holder != id ) {
+		xe1205check(11, 1);
+		return FAIL;
+	    }
+
+	    m_holder = NO_HOLDER;
+	    call SpiResource.release();
+	    if ( !m_requests ) {
+		m_resource_busy = FALSE;
+
+	    }
+	    else {
+		for ( i = m_holder + 1; ; i++ ) {
+		    if ( i >= RESOURCE_COUNT )
+			i = 0;
+		    if ( m_requests & ( 1 << i ) ) {
+			m_holder = i;
+			m_requests &= ~( 1 << i );
+			call SpiResource.request();
+			return SUCCESS;
+		    }
+		}
+	    }
+	    return SUCCESS;
+	}
+    }
+  
+    async command uint8_t Resource.isOwner[ uint8_t id ]() {
+	atomic return (m_holder == id);
+    }
+
+    event void SpiResource.granted() {
+	uint8_t holder;
+	atomic holder = m_holder;
+	signal Resource.granted[ holder ]();
+    }
+
+
+ default event void Resource.granted[ uint8_t id ]() {
+ }
+
+ async command error_t Fifo.write(uint8_t* data, uint8_t length) __attribute__ ((noinline)){
+
+#if 0
+     if (call NssDataPin.get() != TRUE || call NssConfigPin.get() != TRUE)
+	 xe1205check(8, 1);
+#endif
+
+
+     call SpiPacket.send(data, NULL, length);
+
+     return SUCCESS;
+ }
+
+ async event void SpiPacket.sendDone(uint8_t* tx_buf, uint8_t* rx_buf, 
+				     uint16_t len, error_t error) 
+ {
+
+#if 0
+     if (call NssConfigPin.get() != TRUE) xe1205check(4, 1);
+     if (call NssDataPin.get() != FALSE) xe1205check(12, 1);
+#endif
+     TOSH_SET_NSS_DATA_PIN();
+     if (tx_buf) {
+
+	 signal Fifo.writeDone(error);
+     } else
+	 signal Fifo.readDone(error);
+ }
+
+ async command error_t Fifo.read(uint8_t* data, uint8_t length) {
+     error_t status;
+
+#if 0
+     if (call NssDataPin.get() != TRUE || call NssConfigPin.get() != TRUE)
+	 xe1205check(5, 1);
+#endif
+
+     TOSH_CLR_NSS_DATA_PIN();
+     status = call SpiPacket.send(NULL, data, length);
+     if (status != SUCCESS) {
+	 xe1205check(3, status);
+	 call NssDataPin.set();
+	 return status;
+     }
+     return SUCCESS;
+ }
+
+ async command void Reg.read[uint8_t addr](uint8_t* data) 
+ {
+#if 1
+     if (call NssDataPin.get() != TRUE || call NssConfigPin.get() != TRUE)
+	 xe1205check(6, 1);
+#endif
+
+     call NssDataPin.set();
+     call NssConfigPin.clr();
+     call SpiByte.write(XE1205_READ(addr));
+     *data = call SpiByte.write(0);
+     call NssConfigPin.set();
+ }
+
+ async command void Reg.write[uint8_t addr](uint8_t data) 
+ {
+#if 1
+     if (call NssDataPin.get() != TRUE || call NssConfigPin.get() != TRUE)
+	 xe1205check(7, 1);
+#endif
+
+     call NssDataPin.set();
+     call NssConfigPin.clr();
+     call SpiByte.write(XE1205_WRITE(addr));
+     call SpiByte.write(data);
+     call NssConfigPin.set();
+ }
+
+ default async event void Fifo.readDone(error_t error) {}
+ default async event void Fifo.writeDone(error_t error) {}
+}
diff --git a/tos/chips/xe1205/XE1205SpiP.nc b/tos/chips/xe1205/XE1205SpiP.nc
new file mode 100644
index 00000000..4b884aed
--- /dev/null
+++ b/tos/chips/xe1205/XE1205SpiP.nc
@@ -0,0 +1,99 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Henri Dubois-Ferriere
+ * @version $Revision: 1.5 $ $Date: 2007-07-13 15:54:08 $
+ */
+
+configuration XE1205SpiP {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface XE1205Fifo as Fifo;
+  provides interface XE1205Register as Reg[ uint8_t id ];
+
+}
+
+implementation {
+
+  components XE1205SpiImplP as SpiP;
+  Resource = SpiP;
+  Fifo = SpiP;
+  Reg = SpiP;
+
+  components new HplXE1205SpiC();
+  SpiP.SpiResource -> HplXE1205SpiC;
+  SpiP.SpiByte -> HplXE1205SpiC;
+  SpiP.SpiPacket -> HplXE1205SpiC;
+
+  components MainC;
+  MainC.SoftwareInit -> SpiP;
+
+  components HplXE1205PinsC;
+  SpiP.NssConfigPin -> HplXE1205PinsC.NssConfigPin;
+  SpiP.NssDataPin -> HplXE1205PinsC.NssDataPin;
+
+  components new Msp430GpioC() as DPin;
+
+}
diff --git a/tos/chips/xe1205/conf/XE1205IrqConf.nc b/tos/chips/xe1205/conf/XE1205IrqConf.nc
new file mode 100644
index 00000000..f97f7ffe
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205IrqConf.nc
@@ -0,0 +1,106 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Interface for control of interrupt-related  functions
+ * on the XE1205 radio. 
+ *
+ * The current 2.x XE1205 driver is only intended for use of the radio in 
+ * buffered mode - therefore IRQ settings for non-buffered mode are not exposed.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+interface XE1205IrqConf {
+
+#include "XE1205.h"
+
+  /* 
+   * Set IRQ0 sources in Rx mode. 
+   *
+   * @param src IRQ source.
+   * @return SUCCESS if configuration done ok, error status otherwise.
+   *
+   */
+  async command error_t setRxIrq0Source(xe1205_rx_irq0_src_t src);
+
+  /* 
+   * Set IRQ1 sources in Rx mode. 
+   *
+   * @param src IRQ source.
+   * @return SUCCESS if configuration done ok, error status otherwise.
+   *
+   */
+  async command error_t setRxIrq1Source(xe1205_rx_irq1_src_t src);
+
+  /* 
+   * Set IRQ1 source in Tx mode. 
+   *
+   * @param haveResource: if TRUE, bus is assumed to be already owned by the caller.
+   * @param src IRQ source.
+   * @return SUCCESS if configuration done ok, error status otherwise.
+   *
+   */
+  async command error_t setTxIrq1Source(xe1205_tx_irq1_src_t src);
+
+
+  /**
+   * Clear FIFO overrun flag.
+   *
+   * @param haveResource: if TRUE, bus is assumed to be already owned by the caller.
+   * @return SUCCESS if operation done ok, error status otherwise.
+   *
+   */
+  async command error_t clearFifoOverrun(bool haveResource);
+  
+  /**
+   * Get FIFO overrun flag.
+   *
+   * @param haveResource: if TRUE, bus is assumed to be already owned by the caller.
+   * @param fifooverun will be written with 1 if the FIFO overran, 0 else.
+   * @return SUCCESS if operation done ok, error status otherwise.
+   *
+   */
+  async command error_t getFifoOverrun(bool haveResource, bool* fifooverrun);
+
+  /**
+   * Arm the pattern detector (clear Start_detect flag).
+   *
+   * @return SUCCESS if operation done ok, error status otherwise.
+   *
+   */
+  async command error_t armPatternDetector(bool haveResource);
+  
+  
+}
diff --git a/tos/chips/xe1205/conf/XE1205IrqConfC.nc b/tos/chips/xe1205/conf/XE1205IrqConfC.nc
new file mode 100644
index 00000000..c8483765
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205IrqConfC.nc
@@ -0,0 +1,61 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Implementation of XE1205IrqConf interface.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+configuration XE1205IrqConfC {
+
+  provides interface XE1205IrqConf;
+ 
+}
+
+implementation {
+  
+  components XE1205IrqConfP;
+
+  components MainC;
+  MainC.SoftwareInit -> XE1205IrqConfP.Init;
+
+  components new XE1205SpiC();
+  XE1205IrqConfP.SpiResource -> XE1205SpiC;
+  XE1205IrqConfP.IrqParam5 -> XE1205SpiC.IrqParam5;
+  XE1205IrqConfP.IrqParam6 -> XE1205SpiC.IrqParam6;
+
+  XE1205IrqConf = XE1205IrqConfP;
+}
diff --git a/tos/chips/xe1205/conf/XE1205IrqConfP.nc b/tos/chips/xe1205/conf/XE1205IrqConfP.nc
new file mode 100644
index 00000000..c459fa15
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205IrqConfP.nc
@@ -0,0 +1,228 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * Implementation of XE1205IrqConf interface.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+module XE1205IrqConfP {
+
+  provides interface XE1205IrqConf;
+  provides interface Init @atleastonce();
+
+  uses interface XE1205Register as IrqParam5;
+  uses interface XE1205Register as IrqParam6;
+  uses interface Resource as SpiResource;
+}
+implementation {
+
+#include "xe1205debug.h"
+
+
+  // norace is ok because protected by the isOwner() calls
+  norace uint8_t irqparam5; 
+  norace uint8_t irqparam6;
+
+  task void initTask() 
+  {
+    atomic {
+
+      xe1205check(1, call SpiResource.immediateRequest()); // should always succeed: task happens after softwareInit, before interrupts are enabled
+
+      call IrqParam5.write(0x59); // IRQ0: Write_byte, IRQ1: fifofull, Tx_IRQ: TX_stopped.
+      call IrqParam6.write(0x54); // fill fifo on pattern, clear pattern detect bit, start transmission when fifo not empty
+      // no irq interrupt
+      irqparam5=0x59;
+      irqparam6=0x54;
+      
+      call SpiResource.release();
+    }
+  }
+
+  command error_t Init.init() 
+  {
+    post initTask();
+    return SUCCESS;
+  }
+  
+  event void SpiResource.granted() {  }
+
+
+  /* 
+   * Set IRQ0 sources in Rx mode. 
+   * @param src may be one of: irq_write_byte, irq_nFifoEmpty, or irq_Pattern.
+   */
+  async command error_t XE1205IrqConf.setRxIrq0Source(xe1205_rx_irq0_src_t src) 
+  {
+    error_t status;
+
+    if (src > 3)  return EINVAL;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+
+    status = call SpiResource.immediateRequest();
+    xe1205check(2, status);
+    if (status != SUCCESS) return status;
+
+    irqparam5 &= ~(3 << 6);
+    irqparam5 |= (src << 6);
+    call IrqParam5.write(irqparam5);
+
+    call SpiResource.release();
+    return SUCCESS;
+  }
+
+
+  /* 
+   * Set IRQ1 sources in Rx mode. 
+   * @param src may be one of: irq_Rssi or irq_FifoFull.
+   */
+  async command error_t XE1205IrqConf.setRxIrq1Source(xe1205_rx_irq1_src_t src) 
+  {
+    error_t status;
+
+    if (src > 2) return EINVAL;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+
+    status = call SpiResource.immediateRequest();
+    xe1205check(3, status);
+    if (status != SUCCESS) return status;
+
+    irqparam5 &= ~(3 << 4);
+    irqparam5 |= (src << 4);
+    call IrqParam5.write(irqparam5);
+    call SpiResource.release();
+    return SUCCESS;
+  }
+
+  /* 
+   * Set IRQ1 sources in Tx mode. 
+   * @param src my be one of: irq_FifoFull or irq_TxStopped.
+   */
+  async command error_t XE1205IrqConf.setTxIrq1Source(xe1205_tx_irq1_src_t src) 
+  {
+    error_t status;
+
+    if (src > 1) return EINVAL;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+
+    status = call SpiResource.immediateRequest();
+    xe1205check(4, status);
+    if (status != SUCCESS) return status;
+
+    irqparam5 &= ~(1 << 3);
+    irqparam5 |= (src << 3);
+    call IrqParam5.write(irqparam5);
+    call SpiResource.release();
+    return SUCCESS;
+  }
+
+
+  void clearFifoOverrun() {
+    irqparam5 |= 1;
+    call IrqParam5.write(irqparam5);
+  }
+
+  /**
+   * Clear FIFO overrun flag.
+   */
+  async command error_t XE1205IrqConf.clearFifoOverrun(bool haveResource) 
+  {
+    error_t status;
+
+    if (haveResource) {
+      clearFifoOverrun();
+    } else {
+      if (call SpiResource.isOwner()) return EBUSY;
+      status = call SpiResource.immediateRequest();
+      clearFifoOverrun();
+      call SpiResource.release();
+    }
+    return SUCCESS;
+    
+  }
+
+  bool getFifoOverrun() {
+    uint8_t reg;
+    call IrqParam5.read(&reg);
+    return reg & 1;
+  }
+
+  async command error_t XE1205IrqConf.getFifoOverrun(bool haveResource, bool* fifooverrun) 
+  {
+    error_t status;
+
+    if (haveResource) {
+      *fifooverrun = getFifoOverrun();
+    } else {
+      if (call SpiResource.isOwner()) return EBUSY;
+      status = call SpiResource.immediateRequest();
+      xe1205check(5, status);
+      if (status != SUCCESS) return status;
+      *fifooverrun = getFifoOverrun();
+      call SpiResource.release();
+    }
+    return SUCCESS;
+  }
+  
+  void armPatternDetector() {
+    irqparam6 |= (1 << 6);
+    call IrqParam6.write(irqparam6);  
+  }
+
+  /**
+   * Arm the pattern detector (clear Start_detect flag).
+   */
+  async command error_t XE1205IrqConf.armPatternDetector(bool haveResource)  
+  {
+    error_t status;
+
+    if (haveResource) {
+      armPatternDetector();
+    } else {
+      if (call SpiResource.isOwner()) return EBUSY;
+      status = call SpiResource.immediateRequest();
+      xe1205check(5, status);
+      if (status != SUCCESS) return status;
+      armPatternDetector();
+      call SpiResource.release();
+    }
+    return SUCCESS;
+  }
+}
diff --git a/tos/chips/xe1205/conf/XE1205PatternConf.nc b/tos/chips/xe1205/conf/XE1205PatternConf.nc
new file mode 100644
index 00000000..3e3be5c8
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205PatternConf.nc
@@ -0,0 +1,75 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Interface for preamble detection settings 
+ * on the XE1205 radio. 
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+interface XE1205PatternConf {
+
+  /**
+   * Set the length of the preamble searched by the XE1205 
+   * pattern detection module.
+   *
+   * @param len patten length (1 <= len <= 4)
+   * @return SUCCESS if operation done ok, error status otherwise 
+   */
+  async command error_t setDetectLen(uint8_t len);
+
+  /**
+   * Load a preamble pattern into the XE1205 pattern detection module.
+   *
+   * @param pattern pointer to pattern bytes.
+   * @param len pattern length (1 <= len <= 4). Note that this may be larger 
+   * than value set using setPatternLength; in this case the extra bytes 
+   * are programmed into the radio but ignored by the pattern detection stage.
+   * @return SUCCESS if operation done ok, error status otherwise 
+   */
+  async command error_t loadPattern(uint8_t* pattern, uint8_t len);
+  async command error_t loadDataPatternHasBus();
+  async command error_t loadAckPatternHasBus();
+
+  /**
+   * Set the number of bit errors accepted by the XE1205 
+   * pattern detection module.
+   *
+   * @param nerrors max. number of errors accepted (0 <= len <= 3)
+   * @return SUCCESS if operation done ok, error status otherwise 
+   */
+  async command error_t setDetectErrorTol(uint8_t nerrors);
+}
diff --git a/tos/chips/xe1205/conf/XE1205PatternConfC.nc b/tos/chips/xe1205/conf/XE1205PatternConfC.nc
new file mode 100644
index 00000000..5ae4b890
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205PatternConfC.nc
@@ -0,0 +1,65 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Implementation of XE1205PatternConf interface.
+ * 
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+configuration XE1205PatternConfC {
+
+  provides interface XE1205PatternConf;
+ 
+}
+
+implementation {
+  
+  components XE1205PatternConfP;
+
+  components MainC;
+  MainC.SoftwareInit -> XE1205PatternConfP.Init;
+
+  components new XE1205SpiC();
+  XE1205PatternConfP.SpiResource -> XE1205SpiC;
+  XE1205PatternConfP.RXParam10 -> XE1205SpiC.RXParam10;
+  XE1205PatternConfP.Pattern13 -> XE1205SpiC.Pattern13;
+  XE1205PatternConfP.Pattern14 -> XE1205SpiC.Pattern14;
+  XE1205PatternConfP.Pattern15 -> XE1205SpiC.Pattern15;
+  XE1205PatternConfP.Pattern16 -> XE1205SpiC.Pattern16;
+
+
+  XE1205PatternConf = XE1205PatternConfP;
+}
diff --git a/tos/chips/xe1205/conf/XE1205PatternConfP.nc b/tos/chips/xe1205/conf/XE1205PatternConfP.nc
new file mode 100644
index 00000000..c4ca0e45
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205PatternConfP.nc
@@ -0,0 +1,170 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Implementation of XE1205PatternConf interface.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+module XE1205PatternConfP {
+
+  provides interface XE1205PatternConf;
+  provides interface Init @atleastonce();
+
+  uses interface Resource as SpiResource;
+  uses interface XE1205Register as RXParam10;
+  uses interface XE1205Register as Pattern13;
+  uses interface XE1205Register as Pattern14;
+  uses interface XE1205Register as Pattern15;
+  uses interface XE1205Register as Pattern16;
+} 
+implementation {
+
+#include "xe1205debug.h"
+
+  task void initTask() {
+    atomic {
+      xe1205check(1, call SpiResource.immediateRequest()); // should always succeed: task happens after softwareInit, before interrupts are enabled
+
+      call RXParam10.write(0x10 | 2 << 2); // pattern detection enabled, error tolerance=0, pattern length 3
+      call Pattern13.write((data_pattern >> 16) & 0xff);
+      call Pattern14.write((data_pattern >> 8) & 0xff);
+      call Pattern15.write(data_pattern & 0xff);
+      call SpiResource.release();
+    }
+  }
+
+  command error_t Init.init() 
+  {
+    post initTask();
+    return SUCCESS;
+  }
+  
+  event void SpiResource.granted() {  }
+
+  async command error_t XE1205PatternConf.setDetectLen(uint8_t len) 
+  {
+    uint8_t reg;
+    error_t status;
+
+    if (len == 0 || len > 4)  return EINVAL;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+    status = call SpiResource.immediateRequest();
+    xe1205check(2, status);
+    if (status != SUCCESS) return status;
+
+    call RXParam10.read(&reg);
+    
+    reg &= ~(3 << 2);
+    reg |= (len << 2);
+    
+    call RXParam10.write(reg);
+    call SpiResource.release();
+    return SUCCESS;
+  }
+  async command error_t XE1205PatternConf.loadDataPatternHasBus() {
+      
+      call Pattern13.write((data_pattern >> 16) & 0xff);
+      call Pattern14.write((data_pattern >> 8) & 0xff);
+      call Pattern15.write(data_pattern & 0xff);
+     
+    return SUCCESS;
+
+  }
+
+  async command error_t XE1205PatternConf.loadAckPatternHasBus() {
+
+      call Pattern13.write((ack_pattern >> 16) & 0xff);
+      call Pattern14.write((ack_pattern >> 8) & 0xff);
+      call Pattern15.write(ack_pattern & 0xff);
+
+    return SUCCESS;
+
+  }
+
+  async command error_t XE1205PatternConf.loadPattern(uint8_t* pattern, uint8_t len) 
+  {
+    error_t status;
+
+    if (len == 0 || len > 4) return EINVAL;
+
+    if (call SpiResource.isOwner()) return EBUSY;
+    status = call SpiResource.immediateRequest();
+    xe1205check(3, status);
+    if (status != SUCCESS) return status;
+
+    call Pattern13.write(*pattern++);
+    if (len == 1) goto done;
+
+    call Pattern14.write(*pattern++);
+    if (len == 2) goto done;
+
+    call Pattern15.write(*pattern++);
+    if (len == 3) goto done;
+
+    call Pattern16.write(*pattern);
+
+  done:
+      call SpiResource.release();
+      return SUCCESS;
+
+  }    
+
+
+
+  async command error_t XE1205PatternConf.setDetectErrorTol(uint8_t nerrors) 
+  {
+    uint8_t reg;
+    error_t status;
+
+    if (nerrors > 3) return EINVAL;
+    
+    if (call SpiResource.isOwner()) return EBUSY;
+    status = call SpiResource.immediateRequest();
+    xe1205check(4, status);
+    if (status != SUCCESS) return status;
+
+    call RXParam10.read(&reg);
+    
+    reg &= ~(0x03);
+    reg |= nerrors;
+    
+    call RXParam10.write(reg);
+    call SpiResource.release();
+    return SUCCESS;
+  }
+}
diff --git a/tos/chips/xe1205/conf/XE1205PhyConf.nc b/tos/chips/xe1205/conf/XE1205PhyConf.nc
new file mode 100644
index 00000000..77d6a9eb
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205PhyConf.nc
@@ -0,0 +1,78 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Interface for physical parameter settings (bw, bitrate, power) 
+ * on the XE1205 radio. 
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+interface XE1205PhyConf {
+
+#include "XE1205.h"
+
+  /**
+   * Tune the XE1205 to operate on a preset channel.
+   *
+   * @param preset Channel index as defined in XE1205.h
+   * @return SUCCESS if configuration done ok, error status otherwise.
+   */
+  command error_t tunePreset(xe1205_channelpreset_t preset);
+
+  /**
+   * Set the output power of the XE1205.
+   *
+   * @param pow Power index as defined in XE1205.h
+   * @return SUCCESS if configuration done ok, error status otherwise.
+   */
+  async command error_t setRFPower(xe1205_txpower_t txpow);
+	
+  /**
+   * Set the raw communication bitrate. The frequency deviation and receiver 
+   * filter bandwidth are also set to appropriate values for the bitrate. Advanced users 
+   * can still override the freq. dev and bw values with the individual functions below.
+   *
+   * @param value_ Bitrate  (min 1190 bps, max 152340 bps)
+   * @return SUCCESS if configuration done ok, error status otherwise.
+   */
+  command error_t setBitrate(xe1205_bitrate_t bitrate);
+
+  /** 
+   * Get the time (in us) to send/receive a byte at current bit rate.
+   *
+   * @return time (in us).
+   */
+  async command uint16_t getByteTime_us();
+
+}
diff --git a/tos/chips/xe1205/conf/XE1205PhyRssiConfC.nc b/tos/chips/xe1205/conf/XE1205PhyRssiConfC.nc
new file mode 100644
index 00000000..1098b9e6
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205PhyRssiConfC.nc
@@ -0,0 +1,69 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Implementation of XE1205RssiConf and XE1205PhyConf interfaces.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+configuration XE1205PhyRssiConfC {
+
+  provides interface XE1205PhyConf;
+  provides interface XE1205RssiConf;
+ 
+}
+
+implementation {
+  
+  components XE1205PhyRssiConfP;
+
+  components MainC;
+  MainC.SoftwareInit -> XE1205PhyRssiConfP.Init;
+
+  components new XE1205SpiC();
+  XE1205PhyRssiConfP.SpiResource -> XE1205SpiC;
+  XE1205PhyRssiConfP.MCParam0 -> XE1205SpiC.MCParam0;
+  XE1205PhyRssiConfP.MCParam1 -> XE1205SpiC.MCParam1;
+  XE1205PhyRssiConfP.MCParam2 -> XE1205SpiC.MCParam2;
+  XE1205PhyRssiConfP.MCParam3 -> XE1205SpiC.MCParam3;
+  XE1205PhyRssiConfP.MCParam4 -> XE1205SpiC.MCParam4;
+  XE1205PhyRssiConfP.TXParam7 -> XE1205SpiC.TXParam7;
+  XE1205PhyRssiConfP.RXParam8 -> XE1205SpiC.RXParam8;
+  XE1205PhyRssiConfP.RXParam9 -> XE1205SpiC.RXParam9;
+
+  XE1205PhyConf = XE1205PhyRssiConfP;
+  XE1205RssiConf = XE1205PhyRssiConfP;
+}
diff --git a/tos/chips/xe1205/conf/XE1205PhyRssiConfP.nc b/tos/chips/xe1205/conf/XE1205PhyRssiConfP.nc
new file mode 100644
index 00000000..88b5eee9
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205PhyRssiConfP.nc
@@ -0,0 +1,376 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * Implementation of XE1205PhyConf and XE1205RssiConf interfaces.
+ * These are implemented jointly because the rssi measure period depends 
+ * on the frequency deviation (which itself depends on bitrate).
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+module XE1205PhyRssiConfP {
+
+    provides interface XE1205PhyConf;
+    provides interface XE1205RssiConf;
+    provides interface Init @atleastonce();
+
+    uses interface Resource as SpiResource;
+    uses interface XE1205Register as MCParam0;
+    uses interface XE1205Register as MCParam1;
+    uses interface XE1205Register as MCParam2;
+    uses interface XE1205Register as MCParam3;
+    uses interface XE1205Register as MCParam4;
+    uses interface XE1205Register as TXParam7;
+    uses interface XE1205Register as RXParam8;
+    uses interface XE1205Register as RXParam9;
+}
+implementation {
+#include "xe1205debug.h"
+
+    /* 
+     * Default settings for initial parameters. 
+     */ 
+#ifndef XE1205_BITRATE_DEFAULT
+#define XE1205_BITRATE_DEFAULT  76170
+#endif
+    //xxx/make this computed as a fun of XE1205_BITRATE_DEFAULT
+#ifndef XE1205_FREQDEV_DEFAULT
+#define XE1205_FREQDEV_DEFAULT  100000
+#endif
+
+
+    /*
+     * Register calculation helper macros.
+     */
+#define XE1205_FREQ(value_)                     (((value_) * 100) / 50113L)
+#define XE1205_EFFECTIVE_FREQ(value_)           (((int32_t)((int16_t)(value_)) * 50113L) / 100)
+#define XE1205_FREQ_DEV_HI(value_)              ((XE1205_FREQ(value_) >> 8) & 0x01)
+#define XE1205_FREQ_DEV_LO(value_)              (XE1205_FREQ(value_) & 0xff)
+#define XE1205_FREQ_HI(value_)                  ((XE1205_FREQ(value_) >> 8) & 0xff)
+#define XE1205_FREQ_LO(value_)                  (XE1205_FREQ(value_) & 0xff)
+#define XE1205_BIT_RATE(value_)                 ((152340L / (value_) - 1) & 0x7f)
+#define XE1205_EFFECTIVE_BIT_RATE(value_)       (152340L / ((value_) + 1))
+
+
+    /**
+     * Frequency bands.
+     */
+    enum xe1205_freq_bands {
+	XE1205_Band_434 = 434000000,
+	XE1205_Band_869 = 869000000,
+	XE1205_Band_915 = 915000000
+    };
+  
+
+    // this value is the time between rssi measurement updates, plus a buffer time.
+    // we keep it cached for fast access during packet reception
+    uint16_t rssi_period_us; 
+
+    // time to xmit/receive a byte at current bitrate 
+    uint16_t byte_time_us;
+
+    // norace is ok because protected by the isOwner() calls
+    norace uint8_t rxparam9 = 0xff; 
+    norace uint8_t txparam7 = 0xff;
+
+    // returns appropriate baseband filter in khz bw for given bitrate in bits/sec.
+    uint16_t baseband_bw_from_bitrate(uint32_t bitrate) {
+	return (bitrate * 400) /152340;
+    }
+
+
+    // returns appropriate freq. deviation for given bitrate in bits/sec.
+    uint32_t freq_dev_from_bitrate(uint32_t bitrate) {
+	return (bitrate * 6) / 5;
+    }
+
+    // returns xe1205 encoding of baseband bandwidth in appropriate bit positions
+    // for writing into rxparam7 register
+    uint8_t baseband_bw_rxparam7_bits(uint16_t bbw_khz) 
+    {
+	if(bbw_khz <= 10) {
+	    return 0x00;
+	} else if(bbw_khz <= 20) {
+	    return 0x20;
+	} else if(bbw_khz <= 40) {
+	    return 0x40;
+	} else if(bbw_khz <= 200) {
+	    return 0x60;
+	} else if(bbw_khz <= 400) {
+	    return 0x10;
+	} else return 0x10; 
+    }
+
+    // returns the period (in us) between two successive rssi measurements
+    // (see xemics data sheet 4.2.3.4), as a function of frequency deviation
+    uint16_t rssi_meas_time(uint32_t freqdev_hz) 
+    {
+	if (freqdev_hz > 20000)      // at 152kbps, equiv to 2 byte times, at 76kbps, equiv to 1 byte time, at 38kbps equiv to 4 bits, etc
+	    return 100;
+	else if (freqdev_hz > 10000) // at 9.6kbps, equiv to 4 byte times.
+	    return 200;           
+	else if (freqdev_hz > 7000)
+	    return 300;
+	else if (freqdev_hz > 5000)  // at 4.8kbps, equiv to 4 byte times.
+	    return 400;
+	else 
+	    return 500;                // at 1200, equiv to 13 byte times.
+    }
+
+    task void initTask() 
+    {
+	atomic {
+	    byte_time_us = 8000000 / XE1205_BITRATE_DEFAULT;
+	    rssi_period_us = rssi_meas_time(XE1205_FREQDEV_DEFAULT) + 10;
+
+	    xe1205check(1, call SpiResource.immediateRequest()); // should always succeed: task happens after softwareInit, before interrupts are enabled
+
+	    call TXParam7.write(0x00); // tx power 0dbm, normal modulation & bitsync, no flitering
+	    txparam7=0;
+
+	    call MCParam0.write(0x3c | XE1205_FREQ_DEV_HI(XE1205_FREQDEV_DEFAULT)); // buffered mode, transceiver select using SW(0:1), Data output, 868mhz band, 
+	    call MCParam1.write(XE1205_FREQ_DEV_LO(XE1205_FREQDEV_DEFAULT));
+	    call MCParam2.write(XE1205_BIT_RATE(XE1205_BITRATE_DEFAULT));
+
+	    call MCParam3.write(XE1205_FREQ_HI(-1000000)); // 869mhz - 1mhz = 868mhz (preset 0)
+	    call MCParam4.write(XE1205_FREQ_LO(-1000000));
+
+
+	    call RXParam8.write(baseband_bw_rxparam7_bits(baseband_bw_from_bitrate(XE1205_BITRATE_DEFAULT))
+				| 0x0a); // calibrate & init baseband filter each time bbw changes
+
+	    call RXParam9.write(0x00); // rssi off by default, fei off
+	    rxparam9=0;
+	    call SpiResource.release();
+	}
+    }
+
+    command error_t Init.init() 
+    {
+	post initTask();
+	return SUCCESS;
+    }
+  
+    event void SpiResource.granted() {
+    }
+
+    error_t tuneManual(uint32_t freq) 
+    {
+	uint32_t bandCenter;
+	uint8_t mcp0reg;
+	uint16_t mcp34reg;
+	error_t status;
+
+	if (call SpiResource.isOwner()) return EBUSY;
+	status = call SpiResource.immediateRequest();
+	xe1205check(2, status);
+	if (status != SUCCESS) return status;
+
+
+	call MCParam0.read(&mcp0reg);
+
+	mcp0reg &= ~0x6;
+
+	if ((freq >= (XE1205_Band_434 + XE1205_EFFECTIVE_FREQ(0x8000)))
+	    && (freq <= (XE1205_Band_434 + XE1205_EFFECTIVE_FREQ(0x7fff)))) {
+
+	    mcp0reg |= (1 << 1);
+	    bandCenter = XE1205_Band_434;
+
+	} else if ((freq >= (XE1205_Band_869 + XE1205_EFFECTIVE_FREQ(0x8000)))
+		   && (freq <= (XE1205_Band_869 + XE1205_EFFECTIVE_FREQ(0x7fff)))) {
+
+	    mcp0reg |= (2 << 1);
+	    bandCenter = XE1205_Band_869;
+
+	} else if ((freq >= (XE1205_Band_915+ XE1205_EFFECTIVE_FREQ(0x8000)))
+		   && (freq <= (XE1205_Band_915 + XE1205_EFFECTIVE_FREQ(0x7fff)))) {
+
+	    mcp0reg |= (3 << 1);
+	    bandCenter = XE1205_Band_915;
+
+	} else {
+	    call SpiResource.release();
+	    return EINVAL;
+	}                       
+
+
+	mcp34reg = XE1205_FREQ(freq - bandCenter);
+
+	call MCParam0.write(mcp0reg);
+	call MCParam3.write(mcp34reg >> 8);
+	call MCParam4.write(mcp34reg & 0xff);
+
+	call SpiResource.release();
+
+	return SUCCESS;
+    }
+
+
+    command error_t XE1205PhyConf.tunePreset(xe1205_channelpreset_t preset) 
+    {
+	switch(preset) {
+
+	case xe1205_channelpreset_868mhz:
+	    return tuneManual(868000000);
+
+	case xe1205_channelpreset_869mhz:
+	    return tuneManual(869000000);
+
+	case xe1205_channelpreset_870mhz:
+	    return tuneManual(870000000);
+
+	case xe1205_channelpreset_433mhz:
+	    return tuneManual(433000000);
+
+	case xe1205_channelpreset_434mhz:
+	    return tuneManual(434000000);
+
+	case xe1205_channelpreset_435mhz:
+	    return tuneManual(435000000);
+
+	default:
+	    return FAIL;
+	}
+    }
+
+    async command error_t XE1205PhyConf.setRFPower(xe1205_txpower_t txpow)
+    {
+	error_t status;
+
+	if (txpow > xe1205_txpower_15dbm)
+	    return EINVAL;
+
+	if (call SpiResource.isOwner()) return EBUSY;
+	status = call SpiResource.immediateRequest();
+	xe1205check(3, status);
+	if (status != SUCCESS) return status;
+
+	txparam7 &= ~(3 << 6);
+	txparam7 |= (txpow << 6);
+	call TXParam7.write(txparam7);
+	call SpiResource.release();
+	return SUCCESS;
+    }
+
+
+  
+
+    command error_t XE1205PhyConf.setBitrate(xe1205_bitrate_t bitrate) 
+    {
+	uint16_t bbw;
+	uint32_t freqdev;
+	uint8_t rxp8reg, mcp0reg, mcp1reg, mcp2reg;
+	error_t status;
+
+	if (bitrate < xe1205_bitrate_38085 || bitrate > xe1205_bitrate_152340) return EINVAL;
+
+	if (call SpiResource.isOwner()) return EBUSY;
+	status = call SpiResource.immediateRequest();
+	xe1205check(4, status);
+	if (status != SUCCESS) return status;
+
+	// receiver bandwidth
+	call RXParam8.read(&rxp8reg);
+	bbw = baseband_bw_from_bitrate(bitrate);
+	rxp8reg &= ~0x70;
+	rxp8reg |= baseband_bw_rxparam7_bits(bbw);
+
+
+	// frequency deviation
+	freqdev = freq_dev_from_bitrate(bitrate);
+	rssi_period_us = rssi_meas_time(freqdev) + 10;
+
+	call MCParam0.read(&mcp0reg);
+	mcp0reg &= ~0x01;
+	mcp0reg |= XE1205_FREQ_DEV_HI(freqdev);
+
+	mcp1reg = XE1205_FREQ_DEV_LO(freqdev);
+
+	mcp2reg = XE1205_BIT_RATE(bitrate);
+
+	call RXParam8.write(rxp8reg);
+	call MCParam0.write(mcp0reg);
+	call MCParam1.write(mcp1reg);
+	call MCParam2.write(mcp2reg);;
+
+	atomic byte_time_us =   8000000 / bitrate;
+	call SpiResource.release(); 
+	return SUCCESS;
+    }
+
+    async command uint16_t XE1205PhyConf.getByteTime_us() { 
+	return byte_time_us;
+    }
+
+    async command error_t XE1205RssiConf.setRssiMode(bool on) 
+    {
+	// must have bus
+	if (on) 
+	    rxparam9 |= 0x80;
+	else 
+	    rxparam9 &= ~0x80;
+	call RXParam9.write(rxparam9);
+
+	return SUCCESS;
+    }
+
+    async command uint16_t XE1205RssiConf.getRssiMeasurePeriod_us() {
+	return rssi_period_us;
+    }
+
+    async command error_t XE1205RssiConf.setRssiRange(bool high) 
+    {
+	// must have bus
+	if (high) {
+	    rxparam9 |= 0x40;
+	} else {
+	    rxparam9 &= ~0x40;
+	}
+	call RXParam9.write(rxparam9);
+	return SUCCESS;
+    }
+
+    async command error_t XE1205RssiConf.getRssi(uint8_t* rssi) 
+    {
+	// must have bus
+	call RXParam9.read(rssi);
+    
+	*rssi = (*rssi >> 4) & 0x03;
+
+	return SUCCESS;
+    }
+
+}
diff --git a/tos/chips/xe1205/conf/XE1205Register.nc b/tos/chips/xe1205/conf/XE1205Register.nc
new file mode 100644
index 00000000..f9ead89d
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205Register.nc
@@ -0,0 +1,67 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Interface for access to registers onthe XE1205 radio. 
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+/**
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+#include "XE1205.h"
+
+
+interface XE1205Register {
+
+  /**
+   * Read a data word from the register.
+   *
+   * @param data pointer to place the register value.
+   * @return status byte from the read.
+   */
+  async command void read(uint8_t* data);
+
+  /**
+   * Write a data word to the register.
+   * 
+   * @param data value to write to register.
+   * @return status byte from the write.
+   */
+  async command void write(uint8_t data);
+
+}
diff --git a/tos/chips/xe1205/conf/XE1205RssiConf.nc b/tos/chips/xe1205/conf/XE1205RssiConf.nc
new file mode 100644
index 00000000..e3dc4fe7
--- /dev/null
+++ b/tos/chips/xe1205/conf/XE1205RssiConf.nc
@@ -0,0 +1,78 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * Interface for Rssi settings and measurements
+ * on the XE1205 radio. 
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+
+interface XE1205RssiConf {
+
+  /**
+   * Enable RSSI measurements.
+   *
+   * @param on: 1 to enable, 0 to disable
+   * @return SUCCESS if operation done ok, error status otherwise 
+   */
+    async command error_t setRssiMode(bool on);
+
+  /** 
+   * Return the returns the period (in us) between two successive rssi measurements, 
+   * taking into account the current setting of the frequency deviation.
+   *
+   * @return rssi measure period.
+   */
+  async command uint16_t getRssiMeasurePeriod_us();
+
+  /**
+   * Set RSSI measurement points to low/high values at 
+   * 
+   * @param high: 1 for high range (-95, -90, -85 dBm)
+   *              0 for low range (-110, -105, -100 dBm)
+   * @return SUCCESS if operation done ok, error status otherwise 
+   */
+  async command error_t setRssiRange(bool high);
+
+  /** 
+   * Read RSSI value in 2 bits. RSSI block should be enabled before calling this.
+   *
+   * @param rssi Pointer to byte where rssi will be written.
+   * @return SUCCESS if operation done ok, error status otherwise 
+   * (in which case *rssi should not be used).
+   */
+  async command error_t getRssi(uint8_t* rssi);
+}
diff --git a/tos/chips/xe1205/conf/registers.html b/tos/chips/xe1205/conf/registers.html
new file mode 100644
index 00000000..e08e323b
--- /dev/null
+++ b/tos/chips/xe1205/conf/registers.html
@@ -0,0 +1,76 @@
+<html>
+<head>
+<title>XE1205 Registers in TinyOS 2.x driver</title>
+</head>
+<body>
+<table border="1" cellpadding="5">
+  <tr> 
+ <td> Register</td>  <td>Initialized</td> <td>Read</td> <td>Written</td></b>
+<tr> 
+ <td>MCParam0</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> 
+</tr>
+<tr> 
+ <td>MCParam1</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> 
+</tr>
+<tr> 
+ <td>MCParam2</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> 
+</tr>
+<tr> 
+ <td>MCParam3</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> 
+</tr>
+<tr> 
+ <td>MCParam4</td>  <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> 
+</tr>
+<tr> 
+ <td>IrqParam5</td> <td>IrqConfP</td> <td>IrqConfP</td> <td>IrqConfP</td> 
+</tr>
+<tr> 
+ <td>IrqParam6</td> <td>IrqConfP</td> <td>IrqConfP</td> <td>IrqConfP</td> 
+</tr>
+<tr> 
+ <td>TXParam7</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> 
+</tr>
+<tr> 
+ <td>RXParam8</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> 
+</tr>
+<tr> 
+ <td>RXParam9</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> <td>PhyRssiConfP</td> 
+</tr>
+<tr> 
+ <td>RXParam10</td> <td>PatternConfP</td> <td>PatternConfP</td> <td>PatternConfP</td> 
+</tr>
+<tr> 
+ <td>RXParam11</td> <td> - </td> <td> - </td> <td> - </td> 
+</tr>
+<tr> 
+ <td>RXParam12</td> <td> - </td> <td> - </td> <td> - </td> 
+</tr>
+<tr> 
+ <td>Pattern13</td> <td> - </td> <td> - </td> <td>PatternConfP</td> 
+</tr>
+<tr> 
+ <td>Pattern14</td> <td> - </td> <td> - </td> <td>PatternConfP</td> 
+</tr>
+<tr> 
+ <td>Pattern15</td> <td> - </td> <td> - </td> <td>PatternConfP</td> 
+</tr>
+<tr> 
+ <td>Pattern16</td> <td> - </td> <td> - </td> <td>PatternConfP</td> 
+</tr>
+<tr> 
+ <td>OscParam17</td> <td> - </td> <td> - </td> <td> - </td> 
+</tr>
+<tr> 
+ <td>OscParam18</td> <td> - </td> <td> - </td> <td> - </td> 
+</tr>
+<tr> 
+ <td>TParam19</td> <td> - </td> <td> - </td> <td> - </td> 
+</tr>
+<tr> 
+ <td>TParam21</td> <td> - </td> <td> - </td> <td> - </td> 
+</tr>
+<tr> 
+ <td>TParam22</td> <td> - </td> <td> - </td> <td> - </td> 
+</tr>
+</table>
+</body>
\ No newline at end of file
diff --git a/tos/chips/xe1205/conf/registers.txt b/tos/chips/xe1205/conf/registers.txt
new file mode 100644
index 00000000..b3fd0500
--- /dev/null
+++ b/tos/chips/xe1205/conf/registers.txt
@@ -0,0 +1,26 @@
+
+Changeable registers:
+
+name         | Addr           | (a)sync  |  r/w(*) | Interface          | init
+--------------------------------------------------------------------------------------------------
+freq_dev     | 0[0], 1[0-7]   |  ?       |  r/w    | XE1205PhyConf      |
+bitrate      | 2[0-6]         |  ?       |  r/w    | XE1205PhyConf      |
+freq_lo      | 3[0-7],4[0-7]  |  ?       |  r/w    | XE1205PhyConf      |
+rx_irq_0     | 5[6-7]         | async    |  w	   | XE1205IrqConf      |
+rx_irq_1     | 5[4-5]         | async    |  w      | XE1205IrqConf      |
+tx_irq_1     | 5[3]           | async    |  w      | XE1205IrqConf      |
+fifooverun   | 5[0]           | async    |  w      | XE1205IrqConf      |
+start_detect | 6[6]           | async    |  w      | XE1205IrqConf      |
+power        | 7[6-7]         |  ?       |  r/w    | XE1205PhyConf      |
+bw           | 8[4-6]         | same as  |  w      | XE1205PhyConf      |
+                              | bitrate  |         |                    |
+rssi         | 9[7]           | async    |  w      | XE1205RssiConf     |
+rssi_range   | 9[6]           | async    |  r/w    | XE1205RssiConf     |
+rssi_out     | 9[4-5]         | async    |  r      | XE1205RssiConf     |
+pattern      | 10[4]          | ?        |  w      | XE1205PatternConf  | *
+pat_size     | 10[2-3]        | async    |  w      | XE1205PatternConf  | 
+pat_tol      | 10[0-1]        | ?        |  w      | XE1205PatternConf  |
+reg_pattern  | 13-16          | async    |  w      | XE1205PatternConf  |
+
+
+(*) (at higher levels, reads my be cached)
diff --git a/tos/chips/xe1205/crc.h b/tos/chips/xe1205/crc.h
new file mode 100644
index 00000000..60da3dcf
--- /dev/null
+++ b/tos/chips/xe1205/crc.h
@@ -0,0 +1,84 @@
+// $Id: crc.h,v 1.6 2010-06-29 22:07:46 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#ifndef CRC_H
+#define CRC_H
+uint16_t const ccitt_crc16_table[256] = {
+  0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+  0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+  0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+  0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+  0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+  0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+  0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+  0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+  0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+  0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+  0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+  0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+  0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+  0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+  0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+  0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+  0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+  0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+  0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+  0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+  0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+  0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+  0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+  0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+  0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+  0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+  0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+  0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+  0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+  0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+  0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+  0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
+};
+
+uint16_t crcByte(uint16_t fcs, uint8_t c)
+{
+  fcs = ccitt_crc16_table[(fcs >> 8 ^ c) & 0xffU] ^ (fcs << 8);
+  return fcs;
+}
+#endif
diff --git a/tos/chips/xe1205/phy/XE1205PhyC.nc b/tos/chips/xe1205/phy/XE1205PhyC.nc
new file mode 100644
index 00000000..06bc684f
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhyC.nc
@@ -0,0 +1,95 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+configuration XE1205PhyC {
+  provides interface XE1205PhyRxTx;
+  provides interface XE1205PhyRssi;
+  provides interface SplitControl;
+}
+implementation {
+
+  components XE1205PhyP;
+
+  components XE1205PhySwitchC;
+  XE1205PhyP.XE1205PhySwitch -> XE1205PhySwitchC;
+
+  components new XE1205SpiC();
+  XE1205PhyP.XE1205Fifo -> XE1205SpiC;
+  XE1205PhyP.SpiResourceRX -> XE1205SpiC;
+
+  components new XE1205SpiC() as SpiTX;
+  XE1205PhyP.SpiResourceTX -> SpiTX;
+
+  components new XE1205SpiC() as SpiConfig;
+  XE1205PhyP.SpiResourceConfig -> SpiConfig;
+
+  components new XE1205SpiC() as SpiRSSI;
+  XE1205PhyP.SpiResourceRssi -> SpiRSSI;
+
+  components HplXE1205InterruptsC;
+  XE1205PhyP.Interrupt0 -> HplXE1205InterruptsC.Interrupt0;
+  XE1205PhyP.Interrupt1 -> HplXE1205InterruptsC.Interrupt1;
+
+
+  XE1205PhyRxTx = XE1205PhyP;
+  SplitControl = XE1205PhyP;
+  XE1205PhyRssi = XE1205PhyP;
+
+  components MainC;
+  MainC.SoftwareInit -> XE1205PhyP.Init;
+
+  components XE1205PatternConfC;
+  XE1205PhyP.XE1205PatternConf -> XE1205PatternConfC;
+
+  components XE1205IrqConfC;
+  XE1205PhyP.XE1205IrqConf -> XE1205IrqConfC;
+
+  components XE1205PhyRssiConfC;
+  XE1205PhyP.XE1205RssiConf -> XE1205PhyRssiConfC;
+
+  components new Alarm32khz16C();
+  XE1205PhyP.Alarm32khz16 -> Alarm32khz16C.Alarm;
+#if 0
+  components new Msp430GpioC() as DpinM, HplMsp430GeneralIOC;
+  DpinM -> HplMsp430GeneralIOC.Port41;
+  XE1205PhyP.Dpin   -> DpinM;
+#endif
+}
+
+
+
diff --git a/tos/chips/xe1205/phy/XE1205PhyP.nc b/tos/chips/xe1205/phy/XE1205PhyP.nc
new file mode 100644
index 00000000..7aedd4fd
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhyP.nc
@@ -0,0 +1,649 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+#include "Timer.h"
+
+module XE1205PhyP {
+    provides interface XE1205PhyRxTx;
+    provides interface XE1205PhyRssi;
+
+    provides interface Init @atleastonce();
+    provides interface SplitControl @atleastonce();
+
+    uses interface Resource as SpiResourceTX;
+    uses interface Resource as SpiResourceRX;
+    uses interface Resource as SpiResourceConfig;
+    uses interface Resource as SpiResourceRssi;
+
+    uses interface XE1205PhySwitch;
+    uses interface XE1205IrqConf;
+    uses interface XE1205Fifo;
+    uses interface XE1205RssiConf;
+    uses interface XE1205PatternConf;
+
+    uses interface GpioInterrupt as Interrupt0;
+    uses interface GpioInterrupt as Interrupt1;
+
+    uses interface Alarm<T32khz,uint16_t> as Alarm32khz16;
+#if 0
+    uses interface GeneralIO as Dpin;
+#endif
+}
+implementation {
+
+#include "xe1205debug.h"
+
+    char* txBuf = NULL;
+    uint8_t rxFrameIndex = 0;
+    uint8_t rxFrameLen = 0;
+    uint8_t nextTxLen=0;
+    uint8_t nextRxLen;
+    // Bugfix 29.1.2010: Plus 2 Bytes for the xe1205_phy_header_t 
+    // defined in XE1205SendReceiveP.nc
+    // This is just a hack to make it work, this entire code needs
+    // to be cleaned up & documented!
+    char rxFrame[xe1205_mtu + 2];
+    uint8_t headerLen = 4;
+
+    uint16_t stats_rxOverruns;
+
+    enum {
+	RSSI_RANGE_LOW=1,
+	RSSI_RANGE_HIGH=2,
+	RSSI_OFF=0,
+    };
+    uint8_t rssiRange = RSSI_OFF;
+    norace uint8_t rssiL,rssiH;
+    uint8_t * rLow = &rssiL;
+    uint8_t * rHigh = &rssiH;
+
+
+    bool enableAck = FALSE;
+
+    typedef enum { // remember to update busy() and off(), start(), stop() if states are added
+	RADIO_LISTEN=0, 
+	RADIO_RX_HEADER=1, 
+	RADIO_RX_PACKET=2, 
+	RADIO_RX_PACKET_LAST=3, 
+	RADIO_TX=4,
+	RADIO_SLEEP=5, 
+	RADIO_STARTING=6,
+	RADIO_RSSI=7,
+	RADIO_RX_ACK=8,
+	RADIO_TX_ACK=9
+    } phy_state_t;
+
+    phy_state_t state = RADIO_SLEEP;
+
+
+    void armPatternDetect();
+
+    ////////////////////////////////////////////////////////////////////////////////////
+    //
+    // jiffy/microseconds/bytetime conversion functions.
+    //
+    ////////////////////////////////////////////////////////////////////////////////////
+
+    // 1 jiffie = 1/32768 = 30.52us; 
+    // we approximate to 32us for quicker computation and also to account for interrupt/processing overhead.
+    inline uint32_t usecs_to_jiffies(uint32_t usecs) {
+	return usecs >> 5;
+    }
+
+    command error_t Init.init() 
+    { 
+#if 0
+	call Dpin.makeOutput();
+#endif
+	call XE1205PhySwitch.sleepMode();
+	call XE1205PhySwitch.antennaOff();
+	return SUCCESS;
+    }
+
+    task void startDone() {	
+	signal SplitControl.startDone(SUCCESS);
+    }
+
+    event void SpiResourceTX.granted() {  }
+    event void SpiResourceRX.granted() {  }
+    event void SpiResourceConfig.granted() { 
+	armPatternDetect();
+	call SpiResourceConfig.release();
+	atomic {
+	    if (state == RADIO_STARTING){
+	
+		post startDone();
+	    }
+	    if (state == RADIO_RX_ACK) { 
+		enableAck=FALSE; 
+		signal XE1205PhyRxTx.sendFrameDone(FAIL);
+	    }
+	    state = RADIO_LISTEN;
+
+	    call Interrupt0.enableRisingEdge();
+	}
+    }
+    event void SpiResourceRssi.granted() {  }
+
+    task void stopDone() {
+	signal SplitControl.stopDone(SUCCESS);
+    }
+
+    command error_t SplitControl.start() 
+    {
+
+	atomic {
+	    if (state == RADIO_LISTEN){ post startDone(); return SUCCESS;}
+	    if (state != RADIO_SLEEP) return EBUSY;
+	    state = RADIO_STARTING;
+	}
+	call XE1205PhySwitch.rxMode();
+	call XE1205PhySwitch.antennaRx();
+	call Alarm32khz16.start(usecs_to_jiffies(XE1205_Sleep_to_RX_Time));
+	return SUCCESS;
+    }
+
+    command error_t SplitControl.stop() 
+    {
+	atomic {
+	    if (!call XE1205PhyRxTx.busy()) {
+		
+		call XE1205PhySwitch.sleepMode();
+		call XE1205PhySwitch.antennaOff();
+		state = RADIO_SLEEP;
+		call Interrupt0.disable();
+		call Interrupt1.disable();
+		post stopDone();
+		return SUCCESS;
+	    } else return FAIL;
+	}
+
+    }
+
+ default event void SplitControl.startDone(error_t error) { }
+ default event void SplitControl.stopDone(error_t error) { }
+ default async event void XE1205PhyRssi.rssiDone(uint8_t _rssi) { }
+
+ async command bool XE1205PhyRxTx.busy() {
+     atomic return (state != RADIO_LISTEN &&
+		    state != RADIO_SLEEP);
+ }
+
+ async command bool XE1205PhyRxTx.off() {
+     atomic return (state == RADIO_SLEEP ||
+		    state == RADIO_STARTING);
+ }
+
+
+ async command void XE1205PhyRxTx.enableAck(bool onOff) {
+     atomic enableAck = onOff;
+ }
+
+
+ void armPatternDetect() 
+ {
+     // small chance of a pattern arriving right after we arm, 
+     // and IRQ0 hasn't been enabled yet, so we would miss the interrupt
+     // xxx maybe this can also be addressed with periodic timer?
+     call XE1205IrqConf.armPatternDetector(TRUE);
+     call XE1205IrqConf.clearFifoOverrun(TRUE);  
+ }
+
+ async command void XE1205PhyRxTx.setRxHeaderLen(uint8_t l) 
+ {
+     if (l > 8) l = 8;
+     if (!l) return;
+     headerLen = l;
+ }
+
+ async command uint8_t XE1205PhyRxTx.getRxHeaderLen() {
+     return headerLen;
+ }
+
+ void computeNextRxLength() 
+ {
+     uint8_t n = rxFrameLen - rxFrameIndex; 
+    
+     // for timesync and such, we want the end of the packet to coincide with a fifofull event, 
+     // so that we know precisely when last byte was received 
+
+     if (n > 16) {
+	 if (n < 32) nextRxLen = n - 15; else nextRxLen = 15;
+     } 
+     else {
+	 nextRxLen = n;
+     }
+ }
+
+ async command uint8_t  XE1205PhyRssi.readRxRssi() {
+     return rssiTab[(rssiH<<2) |rssiL];
+ }
+
+ task void rssiDone() {
+
+     signal XE1205PhyRssi.rssiDone( rssiTab[(rssiH<<2) |rssiL]);
+ }
+
+ void readRssi() {
+     if(rssiRange ==RSSI_RANGE_LOW ) {
+	 rssiRange = RSSI_RANGE_HIGH;
+	 call XE1205RssiConf.getRssi(rLow);
+	 call XE1205RssiConf.setRssiRange(TRUE);
+	 call Alarm32khz16.start(usecs_to_jiffies(call XE1205RssiConf.getRssiMeasurePeriod_us()));
+     } else {
+	 call XE1205RssiConf.getRssi(rHigh);
+	 call XE1205RssiConf.setRssiMode(FALSE);
+
+	 if(state == RADIO_RSSI) {
+	     armPatternDetect();
+	     call SpiResourceRssi.release();
+	     call Interrupt0.enableRisingEdge();
+	     atomic state = RADIO_LISTEN;
+	     signal XE1205PhyRssi.rssiDone( rssiTab[(rssiH<<2) |rssiL]);
+	 } else { // go on with rx of packet
+	     call Alarm32khz16.start(3000);
+	 }
+	 rssiRange = RSSI_OFF;
+     }
+ }
+
+
+ error_t getRssi() {
+     error_t err;
+
+     err = call XE1205RssiConf.setRssiMode(TRUE);
+     err = ecombine(err,call XE1205RssiConf.setRssiRange(FALSE));
+     rssiRange=RSSI_RANGE_LOW;
+     call Alarm32khz16.start(usecs_to_jiffies(call XE1205RssiConf.getRssiMeasurePeriod_us()));
+     return err;
+ }
+
+
+ async command error_t XE1205PhyRssi.getRssi() {
+ 
+     error_t err;
+     atomic {
+	 if (state != RADIO_LISTEN&&rssiRange==RSSI_OFF) return EBUSY;
+	 if (call XE1205PhyRxTx.off()) {
+	     return EOFF;
+	 }
+	 
+	 if(call SpiResourceRssi.immediateRequest() != SUCCESS) {
+	     return FAIL;
+	 }
+
+	 err=getRssi();
+	 if (SUCCESS ==err) {
+	     state = RADIO_RSSI;
+	 }
+	 return err;
+     }
+ }
+
+ async command error_t XE1205PhyRxTx.sendFrame(char* data, uint8_t frameLen)  __attribute__ ((noinline)) 
+ {
+     error_t status;
+   
+     if (frameLen < 6) return EINVAL;
+
+     atomic {
+	 if (state == RADIO_SLEEP) return EOFF;
+
+	 if (call XE1205PhyRxTx.busy()) return EBUSY;
+	 if (frameLen == 0 || frameLen > xe1205_mtu + 7) return EINVAL; // 7 = 4 preamble + 3 sync
+      
+	 call XE1205PhySwitch.txMode(); // it takes 100us to switch from rx to tx, ie less than one byte at 76kbps
+	 call Interrupt0.disable();
+
+	 status = call SpiResourceTX.immediateRequest();
+	 xe1205check(3, status);
+	 if (status != SUCCESS) {
+	     call XE1205PhySwitch.rxMode(); 
+	     call SpiResourceConfig.request();
+	     return status;
+	 }
+	 call XE1205PhySwitch.antennaTx();
+	 state = RADIO_TX;
+	 
+     }
+
+
+     call XE1205Fifo.write(data, frameLen);
+     atomic {
+	
+	 txBuf = signal XE1205PhyRxTx.continueSend(&nextTxLen);
+     }
+     if (nextTxLen) {
+	 call Interrupt0.enableFallingEdge();
+     } else {
+	 call Interrupt0.disable();
+	 call Interrupt1.enableRisingEdge();
+     }
+     // cannot happen with current SPI implementation (at least with NoDma)
+#if 0
+     if (status != SUCCESS) {
+	 xe1205error(8, status);
+	 call XE1205PhySwitch.rxMode(); 
+	 call XE1205PhySwitch.antennaRx();
+	 call XE1205PatternConf.loadDataPatternHasBus();
+	 armPatternDetect();
+	 call SpiResourceTX.release();
+	 atomic {
+	     call Interrupt0.enableRisingEdge();
+	     state = RADIO_LISTEN;
+	 }
+	 return status;
+     }
+#endif
+
+     return SUCCESS;
+ }
+
+
+
+ uint16_t rxByte=0;
+
+ /**
+  * In transmit: nTxFifoEmpty. (ie after the last byte has been *read out of the fifo*)
+  * In receive: write_byte. 
+  */
+ async event void Interrupt0.fired() __attribute__ ((noinline)) 
+ { 
+     error_t status;
+    
+     switch (state) {
+
+     case RADIO_RX_ACK:
+
+	 call Alarm32khz16.stop();
+     case RADIO_LISTEN:
+	 rxByte=1;
+	 atomic state = RADIO_RX_HEADER;
+	 status = call SpiResourceRX.immediateRequest();
+	 atomic {
+	     if (status != SUCCESS) {
+		 state = RADIO_LISTEN;
+		 call Interrupt0.disable(); // because pattern detector won't be rearmed right away
+		 call SpiResourceConfig.request();
+		 return;
+	     }
+	 }
+	 call Alarm32khz16.start(3000);
+	 return;
+
+     case RADIO_RX_HEADER:
+	 rxByte++;
+	 if (rxByte == 2) {
+	     call Alarm32khz16.start(3000);
+	 }
+	 if (rxByte == headerLen + 1) {
+	     call Interrupt0.disable();
+	     call XE1205Fifo.read(rxFrame, headerLen);
+	     call Interrupt1.enableRisingEdge();
+	 }
+
+	 return;
+
+     case RADIO_TX:
+	 call Interrupt0.disable(); // avoid spurious IRQ0s from nTxFifoEmpty rebounding briefly after first byte is written.
+	 // note that we should really wait till writedone() to re-enable either interrupt.
+	 call XE1205Fifo.write(txBuf, nextTxLen);
+	 txBuf = signal XE1205PhyRxTx.continueSend(&nextTxLen);
+	 if (nextTxLen) {
+	     call Interrupt0.enableFallingEdge();
+	 } else {
+	     call Interrupt0.disable();
+	     call Interrupt1.enableRisingEdge();
+	 }
+	 return;
+
+     case RADIO_RSSI: // trigged while getting rssi
+	 call Interrupt0.disable(); // because pattern detector won't be rearmed right away
+	 return;
+
+     default:
+	 
+	 return;
+     }
+ }
+
+
+
+ /**
+  * In transmit: TxStopped. (ie after the last byte has been *sent*)
+  * In receive: Fifofull.
+  */
+ async event void Interrupt1.fired()  __attribute__ ((noinline)) 
+ { 
+
+     switch (state) {
+
+     case RADIO_RX_PACKET:
+	 call Interrupt1.disable(); // in case it briefly goes back to full just after we read first byte
+	 call XE1205Fifo.read(&rxFrame[rxFrameIndex], nextRxLen);
+
+	 rxFrameIndex += nextRxLen;
+	 computeNextRxLength();
+	 if (nextRxLen==0) {
+	     state = RADIO_RX_PACKET_LAST;
+	 }
+	 return;
+
+     case RADIO_RX_HEADER: // somehow the FIFO has filled before we finished reading the header bytes
+
+	 call Interrupt1.disable();
+	 call Alarm32khz16.stop();
+
+	 signal XE1205PhyRxTx.rxFrameEnd(NULL, 0, FAIL);
+	 call XE1205PatternConf.loadDataPatternHasBus();
+	 armPatternDetect();
+	 call SpiResourceRX.release();
+	 atomic {	     
+	     call Interrupt0.enableRisingEdge();
+	     state = RADIO_LISTEN;
+	 }
+	 return;
+
+     case RADIO_TX:
+
+	 call Interrupt1.disable();
+	 call XE1205PhySwitch.rxMode(); 
+	 call XE1205PhySwitch.antennaRx();
+	 if (enableAck==FALSE) {
+	     call XE1205PatternConf.loadDataPatternHasBus();
+	     armPatternDetect();
+	     signal XE1205PhyRxTx.sendFrameDone(SUCCESS);
+	     call SpiResourceTX.release();
+	     atomic {
+		 call Interrupt0.enableRisingEdge();
+		 state = RADIO_LISTEN;
+	     }
+	 } else {
+
+	     call XE1205PatternConf.loadAckPatternHasBus();
+	     armPatternDetect();
+	     call SpiResourceTX.release();
+	     call Alarm32khz16.start(usecs_to_jiffies(8000));
+	     atomic {
+		 call Interrupt0.enableRisingEdge();
+		 state = RADIO_RX_ACK;
+	     }
+	 }
+
+	 return;
+
+     default:
+	 return;
+     }
+ }
+
+
+
+ async event void XE1205Fifo.readDone(error_t error) {
+
+     switch(state) {
+     case RADIO_RX_HEADER:
+	 rxFrameLen = signal XE1205PhyRxTx.rxFrameBegin(rxFrame, headerLen);
+	 if (rxFrameLen <= headerLen) {
+	     call Interrupt1.disable();
+	     call Alarm32khz16.stop();
+
+	     signal XE1205PhyRxTx.rxFrameEnd(NULL, 0, FAIL);
+	     call XE1205PatternConf.loadDataPatternHasBus();
+	     armPatternDetect();
+	     call SpiResourceRX.release();
+	     atomic {
+		 state = RADIO_LISTEN;
+		 call Interrupt0.enableRisingEdge();
+	     }
+	     return;
+	 }
+	 atomic {
+	     if(rssiRange==RSSI_OFF) {
+		 getRssi();
+	     }
+	 }
+	 rxFrameIndex = headerLen;
+	 computeNextRxLength();
+	 state = RADIO_RX_PACKET;
+
+	 return;
+
+     case RADIO_RX_PACKET_LAST:
+	 call Alarm32khz16.stop();
+
+	 atomic {
+	     call XE1205PatternConf.loadDataPatternHasBus();
+	     armPatternDetect(); 
+	     state = RADIO_LISTEN;
+	     call Interrupt0.enableRisingEdge();
+	     call SpiResourceRX.release();
+	 }
+	 if( enableAck == FALSE) {
+	     signal XE1205PhyRxTx.rxFrameEnd(rxFrame, rxFrameLen + headerLen, SUCCESS); 
+
+	 } else {
+	     enableAck = FALSE;
+	     signal XE1205PhyRxTx.rxAckEnd(rxFrame, rxFrameLen + headerLen, SUCCESS); 
+	 }
+
+
+	 return;
+
+     case RADIO_RX_PACKET:
+
+	 call Interrupt1.enableRisingEdge();
+	 return;
+
+     default:
+	 xe1205check(10, FAIL);
+	 return;
+     }
+ }
+
+ async event void XE1205Fifo.writeDone(error_t error)  __attribute__ ((noinline)) { 
+
+ }
+   
+
+ async event void Alarm32khz16.fired() {
+
+     switch(state) {
+
+     case RADIO_STARTING:
+	 call SpiResourceConfig.request();	
+	 return;
+
+     case RADIO_LISTEN:
+     case RADIO_RX_HEADER:
+     case RADIO_RX_PACKET:
+	 if (rssiRange!=RSSI_OFF) {
+	     readRssi();
+	     return;
+	 }
+	 stats_rxOverruns++;
+
+	 signal XE1205PhyRxTx.rxFrameEnd(NULL, 0, FAIL);
+	 call XE1205PatternConf.loadDataPatternHasBus();
+	 armPatternDetect(); 
+	 call SpiResourceRX.release();
+
+	 atomic {
+	     state = RADIO_LISTEN;
+	     call Interrupt0.enableRisingEdge();
+	 }
+
+	 return;
+
+     case RADIO_RSSI:
+	 readRssi();
+	 return;
+
+     case RADIO_RX_ACK: // ack timeout
+
+	 enableAck = FALSE;
+	 call SpiResourceRX.immediateRequest();
+	     
+	 signal XE1205PhyRxTx.rxFrameEnd(NULL, 0, FAIL);
+	
+	 call XE1205PatternConf.loadDataPatternHasBus();
+
+	 armPatternDetect();
+
+	 call SpiResourceRX.release();
+	 
+	 atomic {
+	     state = RADIO_LISTEN;
+	     call Interrupt0.enableRisingEdge();
+
+	 }
+
+	 signal XE1205PhyRxTx.sendFrameDone(ENOACK);
+	 return;
+     default:
+	 
+	 return;
+     }
+
+ }
+
+
+}
+
+
+
diff --git a/tos/chips/xe1205/phy/XE1205PhyRssi.nc b/tos/chips/xe1205/phy/XE1205PhyRssi.nc
new file mode 100644
index 00000000..a7158b69
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhyRssi.nc
@@ -0,0 +1,6 @@
+interface XE1205PhyRssi {
+
+    async command error_t getRssi();
+    async command uint8_t readRxRssi();
+    async event void rssiDone(uint8_t _rssi);
+}
diff --git a/tos/chips/xe1205/phy/XE1205PhyRxTx.nc b/tos/chips/xe1205/phy/XE1205PhyRxTx.nc
new file mode 100644
index 00000000..872da62e
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhyRxTx.nc
@@ -0,0 +1,144 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+
+interface XE1205PhyRxTx {
+
+  /**
+   * Send a buffer. This call will be followed up with continueSend() events 
+   * (see below) until the client module indicates that there is nothing left to send.
+   *
+   * @param data a pointer to an array of bytes to send
+   * @param len length of the array (6 <= len <= 16)
+   * @return error SUCCESS if the operation initiated successfully, otherwise EOFF, EBUSY, EINVAL, or FAIL.
+   *
+   */
+  async command error_t sendFrame(char* data, uint8_t len);
+
+  /** 
+   * Signalled by the Phy layer to fetch more bytes to send. 
+   *
+   * @param len pointer to length field indicating number of bytes in next send. If 0, nothing more to send.
+   * @return pointer to bytes to be sent. If NULL, nothing more to send.
+   * 
+   */
+  async event char* continueSend(uint8_t* len);
+
+  /**
+   * Signalled after the last buffer has been sent, where the 'last buffer' is the one following which
+   * the client module returned NULL to continueSendBuf().
+   *
+   */
+  async event void sendFrameDone(error_t err);
+
+
+  /**
+   * Receive a frame header. This is called when 'len' bytes have been received after 
+   * detecting a preamble, where 'len' is the value set by calling setRxHeaderLen.
+   * 
+   * The client should return the total number to read in this frame (which can be 
+   * equal to len, for example if this frame is a short ack code). 
+   *
+   * @param data pointer to frame header
+   * @param len length of frame header 
+   * @return total number of bytes in this frame (including header bytes). 
+   *
+   */
+  async event uint8_t rxFrameBegin(char* data, uint8_t len);
+
+
+  /**
+   * Signalled at end of a frame reception.
+   *
+   * @param data pointer to frame (at first byte of header)
+   * @param len length of frame 
+   * @param status SUCCESS if packet received ok, ERROR if packet reception was aborted.
+   *
+   */
+  async event void rxFrameEnd(char* data, uint8_t len, error_t status);
+
+
+ /**
+   * Signalled at end of a Ack reception.
+   *
+   * @param data pointer to Ack (at first byte of header)
+   * @param len length of the Ack 
+   * @param status SUCCESS if packet received ok, ERROR if packet reception was aborted.
+   *
+   */
+  async event void rxAckEnd(char* data, uint8_t len, error_t status);
+
+
+  /** 
+   * Set header size, ie number of bytes at start of packet to be read and passed along 
+   * with the rxFrameBegin() event.
+   *
+   * @param len length of header, 2 <= len <= 8
+   *
+   */
+  async command void setRxHeaderLen(uint8_t len);
+
+  /**
+   * Get the current header size.
+   *
+   * @return header size
+   *
+   */
+  async command uint8_t getRxHeaderLen();
+
+
+  /** 
+   * Check busy/idle state of phy.
+   *
+   * @return TRUE if phy is sending or receiving a packet, FALSE otherwise.
+   *
+   */
+  async command bool busy();
+
+  /** 
+   * Check on/off state of phy.
+   *
+   * @return TRUE if phy is idle, standby, starting, or stopping, FALSE otherwise.
+   *
+   */
+  async command bool off();
+
+
+
+  async command void enableAck(bool onOff);
+}
diff --git a/tos/chips/xe1205/phy/XE1205PhySwitch.nc b/tos/chips/xe1205/phy/XE1205PhySwitch.nc
new file mode 100644
index 00000000..aba85e72
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhySwitch.nc
@@ -0,0 +1,78 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * Interface for phy mode switches on XE1205 radio.
+ *
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+
+interface XE1205PhySwitch {
+
+  /**
+   * Power down the XE1205.
+   */
+  async command void sleepMode();
+
+  /**
+   * Set the XE1205 to standby mode, i.e. oscillator running but everything else disabled.
+   */
+  async command void standbyMode();
+  /**
+   * Set the XE1205 to receive mode.
+   */
+  async command void rxMode();
+
+  /**
+   * Set the XE1205 to transmit mode.
+   */
+  async command void txMode();
+
+  /**
+   * Disconnect the antenna from both receiver and transmitter.
+   */
+  async command void antennaOff();
+
+  /**
+   * Connect the antenna to the receiver.
+   */
+  async command void antennaRx();
+        
+  /**
+   * Connect the antenna to the transmitter.
+   */
+  async command void antennaTx();
+
+}
diff --git a/tos/chips/xe1205/phy/XE1205PhySwitchC.nc b/tos/chips/xe1205/phy/XE1205PhySwitchC.nc
new file mode 100644
index 00000000..f4a5d71a
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhySwitchC.nc
@@ -0,0 +1,61 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+
+configuration XE1205PhySwitchC {
+  
+  provides interface XE1205PhySwitch;
+
+}
+implementation {
+
+  components XE1205PhySwitchP;
+  XE1205PhySwitch = XE1205PhySwitchP;
+
+  components HplXE1205PinsC;
+  XE1205PhySwitchP.AntSelTXPin   -> HplXE1205PinsC.AntSelTXPin;
+  XE1205PhySwitchP.AntSelRXPin   -> HplXE1205PinsC.AntSelRXPin;
+  XE1205PhySwitchP.DataPin       -> HplXE1205PinsC.DataPin;
+  XE1205PhySwitchP.ModeSel0Pin   -> HplXE1205PinsC.ModeSel0Pin;
+  XE1205PhySwitchP.ModeSel1Pin   -> HplXE1205PinsC.ModeSel1Pin;
+  XE1205PhySwitchP.Irq0Pin       -> HplXE1205PinsC.Irq0Pin;
+  XE1205PhySwitchP.Irq1Pin       -> HplXE1205PinsC.Irq1Pin;
+
+  components MainC;
+  MainC.SoftwareInit ->   XE1205PhySwitchP.Init;
+}
diff --git a/tos/chips/xe1205/phy/XE1205PhySwitchP.nc b/tos/chips/xe1205/phy/XE1205PhySwitchP.nc
new file mode 100644
index 00000000..53f5b914
--- /dev/null
+++ b/tos/chips/xe1205/phy/XE1205PhySwitchP.nc
@@ -0,0 +1,114 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+
+module XE1205PhySwitchP {
+  
+  provides interface XE1205PhySwitch;
+  provides interface Init @atleastonce();
+
+  uses interface GeneralIO as AntSelTXPin;
+  uses interface GeneralIO as AntSelRXPin;
+  uses interface GeneralIO as DataPin; // only used in continuous mode, not currently supported
+  uses interface GeneralIO as ModeSel0Pin;
+  uses interface GeneralIO as ModeSel1Pin;
+  uses interface GeneralIO as Irq0Pin;
+  uses interface GeneralIO as Irq1Pin;
+}
+implementation {
+
+  command error_t Init.init() {
+    call ModeSel0Pin.makeOutput();
+    call ModeSel1Pin.makeOutput();
+    call AntSelTXPin.makeOutput();
+    call AntSelRXPin.makeOutput();
+    call DataPin.makeOutput();
+    call XE1205PhySwitch.standbyMode();
+    return SUCCESS;
+  }
+
+  async command void XE1205PhySwitch.sleepMode() { 
+    call ModeSel0Pin.clr();
+    call ModeSel1Pin.clr();
+    call Irq0Pin.makeOutput();
+    call Irq1Pin.makeOutput();
+    call DataPin.makeOutput();
+  }
+
+  async command void XE1205PhySwitch.standbyMode() { 
+    call ModeSel0Pin.set();
+    call ModeSel1Pin.set();
+    call Irq0Pin.makeOutput();
+    call Irq1Pin.makeOutput();
+    call DataPin.makeOutput();
+  }
+
+  async command void XE1205PhySwitch.rxMode() {
+    call Irq0Pin.makeInput();
+    call Irq1Pin.makeInput();
+    call DataPin.makeInput();
+
+    call ModeSel0Pin.set();
+    call ModeSel1Pin.clr();
+
+  }
+
+  async command void XE1205PhySwitch.txMode() {
+    call Irq0Pin.makeInput();
+    call Irq1Pin.makeInput();
+    call DataPin.makeOutput();
+    call ModeSel1Pin.set();
+    call ModeSel0Pin.clr();
+  }
+
+  async command void XE1205PhySwitch.antennaOff() { 
+    call AntSelRXPin.clr();
+    call AntSelTXPin.clr();
+  }
+
+  async command void XE1205PhySwitch.antennaRx() {
+    call AntSelRXPin.set();
+    call AntSelTXPin.clr();
+  }
+        
+  async command void XE1205PhySwitch.antennaTx() {
+    call AntSelRXPin.clr();
+    call AntSelTXPin.set();
+  }
+
+}
diff --git a/tos/chips/xe1205/xe1205debug.h b/tos/chips/xe1205/xe1205debug.h
new file mode 100644
index 00000000..c2a3a014
--- /dev/null
+++ b/tos/chips/xe1205/xe1205debug.h
@@ -0,0 +1,17 @@
+uint8_t var;
+uint16_t lasterr;
+
+void xe1205error(uint8_t loc, uint8_t value_)  __attribute__ ((noinline)) {
+  // this is just to make sure the compiler doesn't optimize 
+  // out calls to this function, since we use it as a gdb breakpoint
+  atomic var += value_ + loc;
+}
+
+
+void xe1205check(uint8_t loc, error_t err)   __attribute__ ((noinline)) {
+  if (err != SUCCESS) {
+    atomic lasterr = loc;
+    xe1205error(loc, err);
+  }
+}
+
diff --git a/tos/interfaces/AMPacket.nc b/tos/interfaces/AMPacket.nc
new file mode 100644
index 00000000..24a64bb8
--- /dev/null
+++ b/tos/interfaces/AMPacket.nc
@@ -0,0 +1,196 @@
+// $Id: AMPacket.nc,v 1.8 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+  * The Active Message accessors, which provide the AM local address and
+  * functionality for querying packets. Active Messages are a single-hop
+  * communication protocol. Therefore, fields such as source and destination
+  * represent the single-hop source and destination. Multihop sources and
+  * destinations are defined by the corresponding multihop protocol (if any).
+  * Also see the Packet interface.
+  *
+  * @author Philip Levis 
+  * @date   January 18 2005
+  * @see    Packet
+  * @see    AMSend
+  * @see    TEP 116: Packet Protocols
+  */ 
+
+
+#include <message.h>
+#include <AM.h>
+
+interface AMPacket {
+
+  /**
+   * Return the node's active message address associated with this AM stack.
+   * @return The address
+   */
+
+  command am_addr_t address();
+
+  /**
+   * Return the AM address of the destination of the AM packet.
+   * If <tt>amsg</tt> is not an AM packet, the results of this command
+   * are undefined.
+   * @param 'message_t* ONE amsg'    the packet
+   * @return        the destination address of the packet.
+   */
+  
+  command am_addr_t destination(message_t* amsg);
+
+  /**
+   * Return the AM address of the source of the AM packet.
+   * If <tt>amsg</tt> is not an AM packet, the results of this command
+   * are undefined.
+   * @param 'message_t* ONE amsg'  the packet
+   * @return      the source address of the packet.
+   */
+   
+  command am_addr_t source(message_t* amsg);
+  
+  /**
+   * Set the AM address of the destination field of the AM packet.  As
+   * the AM address is set as part of sending with the AMSend
+   * interface, this command is not used for sending packets.  Rather,
+   * it is used when a component, such as a queue, needs to buffer a
+   * request to send. The component can save the destination address
+   * and then recover it when actually sending. If <tt>amsg</tt> is
+   * not an AM packet, the results of this command are undefined.
+   *
+   * @param  'message_t* ONE amsg'   the packet
+   * @param  addr   the address
+   */
+
+  command void setDestination(message_t* amsg, am_addr_t addr);
+
+  /**
+   * Set the AM address of the source field of the AM packet.  As
+   * the AM address is set as part of sending with the AMSend
+   * interface, this command is not used for sending packets.  Rather,
+   * it is used when a component, such as a queue, needs to buffer a
+   * request to send. The component can save the source address
+   * and then recover it when actually sending. As an AM layer generally
+   * sets the source address to be the local address, this interface
+   * is not commonly used except when a system is bypassing the AM
+   * layer (e.g., a protocol bridge). If <tt>amsg</tt> is
+   * not an AM packet, the results of this command are undefined.
+   *
+   * @param  'message_t* ONE amsg'   the packet
+   * @param  addr   the address
+   */
+
+  command void setSource(message_t* amsg, am_addr_t addr);
+
+  /**
+   * Return whether <tt>amsg</tt> is destined for this mote. This is
+   * partially a shortcut for testing whether the return value of
+   * <tt>destination</tt> and <tt>address</tt> are the same. It
+   * may, however, include additional logic. For example, there
+   * may be an AM broadcast address: <tt>destination</tt> will return
+   * the broadcast address, but <tt>address</tt> will still be
+   * the mote's local address. If <tt>amsg</tt> is not an AM packet,
+   * the results of this command are undefined.
+   *
+   * @param  'message_t* ONE amsg'   the packet
+   * @return        whether the packet is addressed to this AM stack
+   */
+  command bool isForMe(message_t* amsg);
+  
+  /**
+   * Return the AM type of the AM packet.
+   * If <tt>amsg</tt> is not an AM packet, the results of this command
+   * are undefined.
+   *
+   * @param  'message_t* ONE amsg'   the packet
+   * @return        the AM type
+   */
+  
+  command am_id_t type(message_t* amsg);
+
+  /**
+   * Set the AM type of the AM packet.  As the AM type is set as part
+   * of sending with the AMSend interface, this command is not used
+   * for sending packets. Instead, it is used when a component, such
+   * as a queue, needs to buffer a request to send. The component can
+   * save the AM type in the packet then recover it when actually
+   * sending. If <tt>amsg</tt> is not an AM packet, the results of
+   * this command are undefined.
+   * 
+   * @param  'message_t* ONE amsg'    the packet
+   * @param  t       the AM type
+   */
+  
+  command void setType(message_t* amsg, am_id_t t);
+
+  /**
+   * Get the AM group of the AM packet. The AM group is a logical
+   * identifier that distinguishes sets of nodes which may share
+   * a physical communication medium but wish to not communicate.
+   * The AM group logically separates the sets of nodes. When
+   * a node sends a packet, it fills in its AM group, and typically
+   * nodes only receive packets whose AM group field matches their
+   * own.
+   *
+   * @param 'message_t* ONE amsg' the packet
+   * @return the AM group of this packet
+   */
+  
+  command am_group_t group(message_t* amsg);
+
+  /**
+   * Set the AM group field of a packet. Note that most data link
+   * stacks will set this field automatically on a send request, which
+   * may overwrite changes made with this command.
+   *
+   * @param 'message_t* ONE amsg' the packet
+   * @param group the packet's new AM group value
+   */
+  command void setGroup(message_t* amsg, am_group_t grp);
+
+  /**
+   * Provides the current AM group of this communication interface.
+   *
+   * @return The AM group.
+   */
+  
+  command am_group_t localGroup();
+}
diff --git a/tos/interfaces/AMSend.nc b/tos/interfaces/AMSend.nc
new file mode 100644
index 00000000..8aea5274
--- /dev/null
+++ b/tos/interfaces/AMSend.nc
@@ -0,0 +1,138 @@
+// $Id: AMSend.nc,v 1.8 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** The basic active message message sending interface. Also see
+  * Packet, Receive, and Send.
+  *
+  * @author Philip Levis
+  * @date   January 5 2005
+  * @see   Packet
+  * @see   AMPacket
+  * @see   Receive
+  * @see   TEP 116: Packet Protocols
+  */ 
+
+
+#include <TinyError.h>
+#include <message.h>
+#include <AM.h>
+
+interface AMSend {
+
+  /** 
+    * Send a packet with a data payload of <tt>len</tt> to address
+    * <tt>addr</tt>. To determine the maximum available size, use the
+    * Packet interface of the component providing AMSend. If send
+    * returns SUCCESS, then the component will signal the sendDone
+    * event in the future; if send returns an error, it will not
+    * signal the event.  Note that a component may accept a send
+    * request which it later finds it cannot satisfy; in this case, it
+    * will signal sendDone with error code.
+    *
+    * @param addr   address to which to send the packet
+    * @param 'message_t* ONE msg'    the packet
+    * @param len    the length of the data in the packet payload
+    * @return       SUCCESS if the request to send succeeded and a
+    *               sendDone will be signaled later, EBUSY if the
+    *               abstraction cannot send now but will be able to
+    *               later, or FAIL if the communication layer is not
+    *               in a state that can send (e.g., off).
+    * @see          sendDone
+    */ 
+  command error_t send(am_addr_t addr, message_t* msg, uint8_t len);
+
+  /**
+    * Cancel a requested transmission. Returns SUCCESS if the 
+    * transmission was canceled properly (not sent in its
+    * entirety). Note that the component may not know
+    * if the send was successfully canceled, if the radio is
+    * handling much of the logic; in this case, a component
+    * should be conservative and return an appropriate error code.
+    * A successful call to cancel must always result in a 
+    * sendFailed event, and never a sendSucceeded event.
+    * 
+    * @param  'message_t* ONE msg'    the packet whose transmission should be cancelled.
+    * @return SUCCESS if the transmission was cancelled, FAIL otherwise.
+    * @see    sendDone
+    */
+  command error_t cancel(message_t* msg);
+
+  /** 
+    * Signaled in response to an accepted send request. <tt>msg</tt> is
+    * the message buffer sent, and <tt>error</tt> indicates whether
+    * the send was successful.
+    *
+    * @param  'message_t* ONE msg'   the packet which was submitted as a send request
+    * @param  error SUCCESS if it was sent successfully, FAIL if it was not,
+    *               ECANCEL if it was cancelled
+    * @see send
+    * @see cancel
+    */ 
+
+  event void sendDone(message_t* msg, error_t error);
+
+
+   /**
+   * Return the maximum payload length that this communication layer
+   * can provide. This command behaves identically to
+   * <tt>Packet.maxPayloadLength</tt> and is included in this
+   * interface as a convenience.
+   *
+   * @return the maximum payload length
+   */
+
+  
+  command uint8_t maxPayloadLength();
+
+
+   /**
+    * Return a pointer to a protocol's payload region in a packet.
+    * This command behaves identically to <tt>Packet.getPayload</tt>
+    * (minus the length parameter) and is included in this interface
+    * as a convenience.
+    *
+    * @param  'message_t* ONE msg'    the packet
+    * @return 'void* COUNT(len)'      the payload of the packet
+    */
+  command void* getPayload(message_t* msg, uint8_t len);
+
+  
+}
diff --git a/tos/interfaces/ActiveMessageAddress.nc b/tos/interfaces/ActiveMessageAddress.nc
new file mode 100644
index 00000000..0e629315
--- /dev/null
+++ b/tos/interfaces/ActiveMessageAddress.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "AM.h"
+
+/**
+ * @author Phil Levis
+ * @author David Moss
+ */
+interface ActiveMessageAddress {
+
+  /**
+   * Set the active message address of this node
+   * @param group The node's group ID
+   * @param addr The node's active message address
+   */
+  async command void setAddress(am_group_t group, am_addr_t addr);
+  
+  /**
+   * @return the active message address of this node
+   */
+  async command am_addr_t amAddress();
+  
+  /**
+   * @return the group address of this node
+   */
+  async command am_group_t amGroup();
+  
+  /**
+   * Notification that the address or group settings changed.
+   */
+  async event void changed();
+  
+}
diff --git a/tos/interfaces/AdcConfigure.nc b/tos/interfaces/AdcConfigure.nc
new file mode 100644
index 00000000..10b76a3a
--- /dev/null
+++ b/tos/interfaces/AdcConfigure.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:14 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * This interface is intended to be provided by an ADC client and used by the
+ * ADC subsystem to retrieve the client's ADC configuration. 
+ * 
+ * @author Jan Hauer 
+ * @see  Please refer to TEP 101 for more information about this interface and
+ * its intended use.
+ */
+
+interface AdcConfigure<adc_config_t> 
+{
+
+  /** 
+   * Returns the configuration of an ADC client.  <code>adc_config_t</code> is
+   * a hardware specific data type that contains all information necessary to
+   * configure the respective ADC hardware for the client. A client MUST always
+   * return the same configuration and, if configuration data is passed as a
+   * pointer, the ADC subsystem (HIL component) MUST NOT reference it after the
+   * return of this command.
+   *  
+   * @return chip specific configuration.
+   */
+  async command adc_config_t getConfiguration(); 
+}
diff --git a/tos/interfaces/ArbiterInfo.nc b/tos/interfaces/ArbiterInfo.nc
new file mode 100644
index 00000000..98bab9fb
--- /dev/null
+++ b/tos/interfaces/ArbiterInfo.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2010-06-29 22:07:46 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about this interface and its
+ * intended use.<br><br>
+ *
+ * The ArbiterInfo interface allows a component to query the current 
+ * status of an arbiter.  It must be provided by ALL arbiter implementations,
+ * and can be used for a variety of different purposes.  Normally it will be
+ * used in conjunction with the Resource interface for performing run time
+ * checks on access rights to a particular shared resource.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+
+interface ArbiterInfo {
+  /**
+   * Check whether a resource is currently allocated.
+   *
+   * @return TRUE If the resource being arbitrated is currently allocated
+   *              to any of its users<br>
+   *         FALSE Otherwise.
+   */
+  async command bool inUse();
+
+  /**
+   * Get the id of the client currently using a resource.
+   * 
+   * @return Id of the current owner of the resource<br>
+   *         0xFF if no one currently owns the resource
+   */
+  async command uint8_t userId();
+}
diff --git a/tos/interfaces/AsyncStdControl.nc b/tos/interfaces/AsyncStdControl.nc
new file mode 100644
index 00000000..a1f18b15
--- /dev/null
+++ b/tos/interfaces/AsyncStdControl.nc
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-06-29 22:07:46 $ 
+ * ======================================================================== 
+ */ 
+
+/**
+ * Please refer to TEP 115 for more information about this interface and its
+ * intended use.<br><br>
+ *
+ * This is the asynchronous counterpart to the StdContol interface.  It
+ * should be used for switching between the on and off power states of
+ * the component providing it.  This interface differs from the
+ * StdControl interface only in the fact that any of its commands can
+ * be called from asynchronous context.
+ *
+ * @author Joe Polastre
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+
+interface AsyncStdControl
+{
+  /**
+   * Start this component and all of its subcomponents.
+   *
+   * @return SUCCESS if the component was either already on or was 
+   *         successfully turned on<br>
+   *         FAIL otherwise
+   */
+  async command error_t start();
+
+  /**
+   * Stop the component and any pertinent subcomponents (not all
+   * subcomponents may be turned off due to wakeup timers, etc.).
+   *
+   * @return SUCCESS if the component was either already off or was 
+   *         successfully turned off<br>
+   *         FAIL otherwise
+   */
+  async command error_t stop();
+}
diff --git a/tos/interfaces/BigQueue.nc b/tos/interfaces/BigQueue.nc
new file mode 100644
index 00000000..6a23bf67
--- /dev/null
+++ b/tos/interfaces/BigQueue.nc
@@ -0,0 +1,102 @@
+/* $Id: BigQueue.nc,v 1.2 2007-09-19 17:29:17 klueska Exp $ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  Interface to a FIFO list (queue) that contains items
+ *  of a specific type. The queue has a maximum size.
+ *
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @date   $Date: 2007-09-19 17:29:17 $
+ */
+
+   
+interface BigQueue<t> {
+
+  /**
+   * Returns if the queue is empty.
+   *
+   * @return Whether the queue is empty.
+   */
+  command bool empty();
+
+  /**
+   * The number of elements currently in the queue.
+   * Always less than or equal to maxSize().
+   *
+   * @return The number of elements in the queue.
+   */
+  command uint16_t size();
+
+  /**
+   * The maximum number of elements the queue can hold.
+   *
+   * @return The maximum queue size.
+   */
+  command uint16_t maxSize();
+
+  /**
+   * Get the head of the queue without removing it. If the queue
+   * is empty, the return value is undefined.
+   *
+   * @return The head of the queue.
+   */
+  command t head();
+  
+  /**
+   * Remove the head of the queue. If the queue is empty, the return
+   * value is undefined.
+   *
+   * @return The head of the queue.
+   */
+  command t dequeue();
+
+  /**
+   * Enqueue an element to the tail of the queue.
+   *
+   * @param newVal - the element to enqueue
+   * @return SUCCESS if the element was enqueued successfully, FAIL
+   *                 if it was not enqueued.
+   */
+  command error_t enqueue(t newVal);
+
+  /**
+   * Return the nth element of the queue without dequeueing it, 
+   * where 0 is the head of the queue and (size - 1) is the tail. 
+   * If the element requested is larger than the current queue size,
+   * the return value is undefined.
+   *
+   * @param index - the index of the element to return
+   * @return the requested element in the queue.
+   */
+  command t element(uint16_t idx);
+}
diff --git a/tos/interfaces/BitVector.nc b/tos/interfaces/BitVector.nc
new file mode 100644
index 00000000..fe1c5087
--- /dev/null
+++ b/tos/interfaces/BitVector.nc
@@ -0,0 +1,90 @@
+//$Id: BitVector.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to a bit vector.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+interface BitVector
+{
+  /**
+   * Clear all bits in the vector.
+   */
+  async command void clearAll();
+
+  /**
+   * Set all bits in the vector.
+   */
+  async command void setAll();
+
+  /**
+   * Read a bit from the vector.
+   * @param bitnum Bit to read.
+   * @return Bit value.
+   */
+  async command bool get(uint16_t bitnum);
+
+  /**
+   * Set a bit in the vector.
+   * @param bitnum Bit to set.
+   */
+  async command void set(uint16_t bitnum);
+
+  /**
+   * Set a bit in the vector.
+   * @param bitnum Bit to clear.
+   */
+  async command void clear(uint16_t bitnum);
+
+  /**
+   * Toggle a bit in the vector.
+   * @param bitnum Bit to toggle.
+   */
+  async command void toggle(uint16_t bitnum);
+
+  /**
+   * Write a bit in the vector.
+   * @param bitnum Bit to clear.
+   * @param value New bit value.
+   */
+  async command void assign(uint16_t bitnum, bool value);
+
+  /**
+   * Return bit vector length.
+   * @return Bit vector length.
+   */
+  async command uint16_t size();
+}
+
diff --git a/tos/interfaces/BlockRead.nc b/tos/interfaces/BlockRead.nc
new file mode 100644
index 00000000..d42b6f54
--- /dev/null
+++ b/tos/interfaces/BlockRead.nc
@@ -0,0 +1,104 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Read interface for the block storage abstraction described in
+ * TEP103.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:25 $
+ */
+
+#include "Storage.h"
+
+interface BlockRead {
+  /**
+   * Initiate a read operation within a given volume. On SUCCESS, the
+   * <code>readDone</code> event will signal completion of the
+   * operation.
+   * 
+   * @param addr starting address to begin reading.
+   * @param 'void* COUNT(len) buf' buffer to place read data.
+   * @param len number of bytes to read.
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EINVAL if the parameters are invalid
+   *   <li>EBUSY if a request is already being processed.
+   */
+  command error_t read(storage_addr_t addr, void* buf, storage_len_t len);
+
+  /**
+   * Signals the completion of a read operation.
+   *
+   * @param addr starting address of read.
+   * @param 'void* COUNT(len) buf' buffer where read data was placed.
+   * @param len number of bytes read.
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void readDone(storage_addr_t addr, void* buf, storage_len_t len, 
+		      error_t error);
+  
+  /**
+   * Initiate a crc computation. On SUCCESS, the
+   * <code>computeCrcDone</code> event will signal completion of the
+   * operation.
+   *
+   * @param addr starting address.
+   * @param len the number of bytes to compute the crc over.
+   * @parm crc initial CRC value
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EINVAL if the parameters are invalid
+   *   <li>EBUSY if a request is already being processed.
+   */
+  command error_t computeCrc(storage_addr_t addr, storage_len_t len,
+			     uint16_t crc);
+
+  /**
+   * Signals the completion of a crc computation.
+   *
+   * @param addr stating address.
+   * @param len number of bytes the crc was computed over.
+   * @param crc the resulting crc value.
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void computeCrcDone(storage_addr_t addr, storage_len_t len,
+			    uint16_t crc, error_t error);
+
+  /**
+   * Report the usable volume size in bytes (this may be different than
+   * the actual volume size because of metadata overheads).
+   * @return Volume size.
+   */
+  command storage_len_t getSize();
+}
diff --git a/tos/interfaces/BlockWrite.nc b/tos/interfaces/BlockWrite.nc
new file mode 100644
index 00000000..6090035a
--- /dev/null
+++ b/tos/interfaces/BlockWrite.nc
@@ -0,0 +1,113 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Write interface for the block storage abstraction described in
+ * TEP103.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.6 $ $Date: 2008-06-04 03:00:25 $
+ */
+
+#include "Storage.h"
+
+interface BlockWrite {
+  /**
+   * Initiate a write operation within a given volume. On SUCCESS, the
+   * <code>writeDone</code> event will signal completion of the
+   * operation.
+   * <p>
+   * Between two erases, no byte may be written more than once.
+   * 
+   * @param addr starting address to begin write.
+   * @param 'void* COUNT(len) buf' buffer to write data from.
+   * @param len number of bytes to write.
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EINVAL if the parameters are invalid
+   *   <li>EBUSY if a request is already being processed.
+   */
+  command error_t write(storage_addr_t addr, void* buf, storage_len_t len);
+
+  /**
+   * Signals the completion of a write operation. However, data is not
+   * guaranteed to survive a power-cycle unless a sync operation has
+   * been completed.
+   *
+   * @param addr starting address of write.
+   * @param 'void* COUNT(len) buf' buffer that written data was read from.
+   * @param len number of bytes written.
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void writeDone(storage_addr_t addr, void* buf, storage_len_t len, 
+		       error_t error);
+  
+  /**
+   * Initiate an erase operation. On SUCCESS, the
+   * <code>eraseDone</code> event will signal completion of the
+   * operation.
+   *
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EBUSY if a request is already being processed.
+   */
+  command error_t erase();
+  
+  /**
+   * Signals the completion of an erase operation.
+   *
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void eraseDone(error_t error);
+
+  /**
+   * Initiate a sync operation to finalize writes to the volume. A
+   * sync operation must be issued to ensure that data is stored in
+   * non-volatile storage. On SUCCES, the <code>syncDone</code> event
+   * will signal completion of the operation.
+   *
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EBUSY if a request is already being processed.
+   */
+  command error_t sync();
+
+  /**
+   * Signals the completion of a sync operation. All written data is
+   * flushed to non-volatile storage after this event.
+   *
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void syncDone(error_t error);
+}
diff --git a/tos/interfaces/Boot.nc b/tos/interfaces/Boot.nc
new file mode 100644
index 00000000..319c438e
--- /dev/null
+++ b/tos/interfaces/Boot.nc
@@ -0,0 +1,62 @@
+// $Id: Boot.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+  * Interface that notifies components when TinyOS has booted
+  * (initialized all of its components), as discussed in TEP 107.
+  *
+  * @author Philip Levis
+  * @date   January 5 2005
+  */ 
+
+interface Boot {
+  /**
+   * Signaled when the system has booted successfully. Components can
+   * assume the system has been initialized properly. Services may
+   * need to be started to work, however.
+   *
+   * @see StdControl
+   * @see SplitConrol
+   * @see TEP 107: Boot Sequence
+   */
+  event void booted();
+}
+
diff --git a/tos/interfaces/Cache.nc b/tos/interfaces/Cache.nc
new file mode 100644
index 00000000..60e8b3a6
--- /dev/null
+++ b/tos/interfaces/Cache.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * A data item cache. The cache does not own the items it caches:
+ * there is no allocation/deallocation policy, or notification of
+ * eviction. Correspondingly, using references (pointers) as data
+ * items can be difficult.
+ * 
+ * @author Rodrigo Fonseca
+ * @author Philip Levis 
+ */
+
+interface Cache<t> {
+    /**
+     * Inserts an item in the cache, evicting if necessary.
+     * An atomic lookup after insert should return true.
+     *
+     * @param item - the data item to insert.
+     */
+    command void insert(t item);
+
+    /**
+      * Return whether the data item is in the cache.
+      *
+      * @param item - the data item to query
+      * @return Whether the item is in the cache.
+      */ 
+    command bool lookup(t item);
+   
+    /**
+      * Flush the cache of all entries.
+      *
+      */
+    command void flush();
+}
+
diff --git a/tos/interfaces/ConfigStorage.nc b/tos/interfaces/ConfigStorage.nc
new file mode 100644
index 00000000..37629329
--- /dev/null
+++ b/tos/interfaces/ConfigStorage.nc
@@ -0,0 +1,153 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Read interface for the log storage abstraction described in
+ * TEP103.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Gay
+ * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:25 $
+ */
+
+#include "Storage.h"
+
+interface ConfigStorage {
+  /**
+   * Initiate a read operation within a given volume. On SUCCESS, the
+   * <code>readDone</code> event will signal completion of the
+   * operation. The data read is the contents of the config volume
+   * as of the last commit operation.
+   * 
+   * @param addr starting address to begin reading.
+   * @param 'void* COUNT(len) buf' buffer to place read data.
+   * @param len number of bytes to read.
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EINVAL if the parameters are invalid
+   *   <li>EOFF if the volume has not been mounted
+   *   <li>EBUSY if a request is already being processed.
+   *   <li>FAIL if the volume does not contain valid data 
+   *       (see <code>valid</code>)
+   */
+  command error_t read(storage_addr_t addr, void* buf, storage_len_t len);
+
+  /**
+   * Signals the completion of a read operation.
+   *
+   * @param addr starting address of read.
+   * @param 'void* COUNT(len) buf' buffer where read data was placed.
+   * @param len number of bytes read.
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void readDone(storage_addr_t addr, void* buf, storage_len_t len, 
+		      error_t error);
+  
+  /**
+   * Initiate a write operation within a given volume. On SUCCESS, the
+   * <code>writeDone</code> event will signal completion of the
+   * operation.
+   * 
+   * @param addr starting address to begin write.
+   * @param 'void* COUNT(len) buf' buffer to write data from.
+   * @param len number of bytes to write.
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EINVAL if the parameters are invalid
+   *   <li>EOFF if the volume has not been mounted
+   *   <li>EBUSY if a request is already being processed.
+   */
+  command error_t write(storage_addr_t addr, void* buf, storage_len_t len);
+
+  /**
+   * Signals the completion of a write operation. However, data is not
+   * guaranteed to survive a power-cycle unless a commit operation has
+   * been completed.
+   *
+   * @param addr starting address of write.
+   * @param 'void* COUNT(len) buf' buffer that written data was read from.
+   * @param len number of bytes written.
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void writeDone(storage_addr_t addr, void* buf, storage_len_t len, 
+		       error_t error);
+  
+  /**
+   * Initiate a commit operation and finialize any additional writes to the
+   * volume. A commit operation must be issued to ensure that data is
+   * stored in non-volatile storage. On SUCCES, the <code>commitDone</code>
+   * event will signal completion of the operation.
+   *
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EBUSY if a request is already being processed.
+   *   <li>EOFF if the volume has not been mounted
+   */
+  command error_t commit();
+
+  /**
+   * Signals the completion of a commit operation. All written data is
+   * flushed to non-volatile storage after this event.
+   *
+   * @param error SUCCESS if the operation was successful, FAIL if
+   *   it failed
+   */
+  event void commitDone(error_t error);
+
+  /**
+   * Report the usable volume size in bytes (this may be significantly
+   * different from the actual volume size, e.g., it's approximately
+   * half the volume size on the AT45DB implementation).
+   *
+   * @return Volume size. The result is undefined if the volume hasn't
+   *    been mounted.
+   */
+  command storage_len_t getSize();
+
+  /**
+   * Report whether this config volume contains valid data. Committing
+   * a volume makes it valid.
+   *
+   * @return TRUE if the volume contains valid data, FALSE otherwise. The
+   *    result is undefined if the volume hasn't been mounted.
+   */
+  command bool valid();
+}
diff --git a/tos/interfaces/Crc.nc b/tos/interfaces/Crc.nc
new file mode 100644
index 00000000..4ecaa642
--- /dev/null
+++ b/tos/interfaces/Crc.nc
@@ -0,0 +1,63 @@
+/*                                                                      
+ *
+ * Copyright (c) 2000-2007 The Regents of the University of
+ * California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Compute the CRC-16 value of a byte array.
+ *
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author David Moss
+ */
+interface Crc {
+
+  /**
+   * Compute the CRC-16 value of a byte array.
+   *
+   * @param   'void* COUNT(len) buf' A pointer to the buffer over which to compute CRC.
+   * @param   len The length of the buffer over which to compute CRC.
+   * @return  The CRC-16 value.
+   */
+  async command uint16_t crc16(void* buf, uint8_t len);
+  
+  /**
+   * Compute a generic CRC-16 using a given seed.  Used to compute CRC's
+   * of discontinuous data.
+   * 
+   * @param startCrc An initial CRC value to begin with
+   * @param 'void* COUNT(len) buf' A pointer to a buffer of data
+   * @param len The length of the buffer
+   * @return The CRC-16 value.
+   */
+  async command uint16_t seededCrc16(uint16_t startCrc, void *buf, uint8_t len);
+  
+}
diff --git a/tos/interfaces/CsmaBackoff.nc b/tos/interfaces/CsmaBackoff.nc
new file mode 100644
index 00000000..69aad610
--- /dev/null
+++ b/tos/interfaces/CsmaBackoff.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**
+ * Interface for MAC Backoff values from the radio stack.
+ * Allows application to change the backoff on a per packet basis.
+ * Only used if congestion control is enabled.
+ *
+ * @author Joe Polastre
+ */
+interface CsmaBackoff
+{
+  /**
+   * Return initial backoff time before attempting to send message m. The
+   * units are radio dependent.
+   * @param 'message_t* ONE m'
+   * @return Initial backoff time
+   */
+  async event uint16_t initial(message_t* m);
+
+  /**
+   * Return backoff time after message m could not be send due to congestion.
+   * The units are raio dependent.
+   * @param 'message_t* ONE m'
+   * @return Backoff time after congestion
+   */
+  async event uint16_t congestion(message_t* m);
+}
diff --git a/tos/interfaces/DeviceMetadata.nc b/tos/interfaces/DeviceMetadata.nc
new file mode 100644
index 00000000..291d4705
--- /dev/null
+++ b/tos/interfaces/DeviceMetadata.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * DeviceMetadata is a way to obtain information about a generic data
+ * access device represented by a SID. See TEP109 and TEP114 for details.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+interface DeviceMetadata {
+  command uint8_t getSignificantBits();
+}
diff --git a/tos/interfaces/FastSpiByte.nc b/tos/interfaces/FastSpiByte.nc
new file mode 100644
index 00000000..257bf933
--- /dev/null
+++ b/tos/interfaces/FastSpiByte.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+/**
+ * This is a natural extension of the SpiByte interface which allows fast 
+ * data transfers comparable to the SpiStream interface. You may want to
+ * use the following code sequence to write a buffer as fast as possible
+ *
+ *	call FastSpiByte.spiSplitWrite(data[0]); // start the first byte
+ *	for(i = 1; i < length; ++i) {
+ *	   // finish the previous one and write the next one
+ *	  call FastSpiByte.spiSplitReadWrite(data[i]);
+ *	}
+ *	call FastSpiByte.spiSlitRead(); // finish the last byte
+ *
+ * You can also do some useful computation (like calculate a CRC) while the
+ * hardware is sending the byte.
+ */
+interface FastSpiByte
+{
+	/**
+	 * Starts a split-phase SPI data transfer with the given data.
+	 * A splitRead/splitReadWrite command must follow this command even 
+	 * if the result is unimportant.
+	 */
+	async command void splitWrite(uint8_t data);
+
+	/**
+	 * Finishes the split-phase SPI data transfer by waiting till 
+	 * the write command comletes and returning the received data.
+	 */
+	async command uint8_t splitRead();
+
+	/**
+	 * This command first reads the SPI register and then writes
+	 * there the new data, then returns. 
+	 */
+	async command uint8_t splitReadWrite(uint8_t data);
+
+	/**
+	 * This is the standard SpiByte.write command but a little
+	 * faster as we should not need to adjust the power state there.
+	 * (To be consistent, this command could have be named splitWriteRead).
+	 */
+	async command uint8_t write(uint8_t data);
+}
diff --git a/tos/interfaces/GeneralIO.nc b/tos/interfaces/GeneralIO.nc
new file mode 100644
index 00000000..2cfcfbc2
--- /dev/null
+++ b/tos/interfaces/GeneralIO.nc
@@ -0,0 +1,48 @@
+// $Id: GeneralIO.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ */
+
+interface GeneralIO
+{
+  async command void set();
+  async command void clr();
+  async command void toggle();
+  async command bool get();
+  async command void makeInput();
+  async command bool isInput();
+  async command void makeOutput();
+  async command bool isOutput();
+}
diff --git a/tos/interfaces/Get.nc b/tos/interfaces/Get.nc
new file mode 100644
index 00000000..9c15b167
--- /dev/null
+++ b/tos/interfaces/Get.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The Get interface is intended for synchronous reading of small
+ * values. The type of the value is given as a template
+ * argument. Generally, these values are backed by memory or
+ * computation. Because no error code is included, the get() call must
+ * be guaranteed to succeed.
+ *
+ * <p>
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be returned
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+interface Get<val_t> {
+  /**
+   * Retrieves a value of type val_t.
+   *
+   * @return the value itself
+   */
+  command val_t get();
+}
diff --git a/tos/interfaces/GetNow.nc b/tos/interfaces/GetNow.nc
new file mode 100644
index 00000000..a04312f2
--- /dev/null
+++ b/tos/interfaces/GetNow.nc
@@ -0,0 +1,52 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-06-10 14:41:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * Similar to the <tt>Get</tt> interface (see TEP 114) this interface can be
+ * used for reading small values, but in contrast to the <tt>Get</tt> interface
+ * the value is read asynchronously.
+ *
+ * @param data_type the type of the object that will be returned
+ */
+
+interface GetNow<data_type> 
+{ 
+  /**
+   * Returns a value of type <tt>data_type</tt>.
+   *
+   * @return the value itself
+   */  
+  async command data_type getNow();
+}
diff --git a/tos/interfaces/GetSet.nc b/tos/interfaces/GetSet.nc
new file mode 100644
index 00000000..b4e2afa3
--- /dev/null
+++ b/tos/interfaces/GetSet.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The GetSet interface is intended for synchronous reading and
+ * writing of small values. The type of the value is given as a
+ * template argument. Generally, these values are backed by memory or
+ * computation. Because no error code is included, both calls must be
+ * guaranteed to succeed. This interface should be used when a single
+ * logical unit supports both getting and setting.
+ *
+ * <p>
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be stored
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+interface GetSet<val_t> {
+  /**
+   * Retrieves a value of type val_t.
+   *
+   * @return the value itself
+   */
+  command val_t get();
+
+  /**
+   * Stores a value of type val_t.
+   *
+   * @param val the value to be stored
+   */
+  command void set( val_t val );
+}
diff --git a/tos/interfaces/GpioCapture.nc b/tos/interfaces/GpioCapture.nc
new file mode 100644
index 00000000..ba4121d2
--- /dev/null
+++ b/tos/interfaces/GpioCapture.nc
@@ -0,0 +1,68 @@
+// $Id: GpioCapture.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface for microcontroller-independent 32kHz timer capture events.
+ * 
+ * @author Jonathan Hui
+ * @author Philip Levis
+ * @author Joe Polastre
+ * @date   September 30 2005
+ *
+ */
+
+#include "TinyError.h"
+
+interface GpioCapture {
+
+  /** 
+   * Enable an edge based timer capture event.
+   *
+   * @return Whether the timer capture has been enabled.
+   */
+  async command error_t captureRisingEdge();
+  async command error_t captureFallingEdge();
+
+  /**
+   * Fired when an edge interrupt occurs.
+   *
+   * @param val The value of the 32kHz timer.
+   */
+  async event void captured(uint16_t time);
+
+  /**
+   * Disable further captures.
+   */ 
+  async command void disable();
+
+}
diff --git a/tos/interfaces/GpioInterrupt.nc b/tos/interfaces/GpioInterrupt.nc
new file mode 100644
index 00000000..b691ba8c
--- /dev/null
+++ b/tos/interfaces/GpioInterrupt.nc
@@ -0,0 +1,70 @@
+// $Id: GpioInterrupt.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Jonathan Hui
+ * @author Joe Polastre
+ * Revision:  $Revision: 1.5 $
+ *
+ * Provides a microcontroller-independent presentation of interrupts
+ */
+
+
+interface GpioInterrupt {
+
+  /** 
+   * Enable an edge based interrupt. Calls to these functions are
+   * not cumulative: only the transition type of the last called function
+   * will be monitored for.
+   *
+   *
+   * @return SUCCESS if the interrupt has been enabled
+   */
+  async command error_t enableRisingEdge();
+  async command error_t enableFallingEdge();
+
+  /**  
+   * Diables an edge interrupt or capture interrupt
+   * 
+   * @return SUCCESS if the interrupt has been disabled
+   */ 
+  async command error_t disable();
+
+  /**
+   * Fired when an edge interrupt occurs.
+   *
+   * NOTE: Interrupts keep running until "disable()" is called
+   */
+  async event void fired();
+
+}
diff --git a/tos/interfaces/I2CPacket.nc b/tos/interfaces/I2CPacket.nc
new file mode 100644
index 00000000..1c48fd6e
--- /dev/null
+++ b/tos/interfaces/I2CPacket.nc
@@ -0,0 +1,113 @@
+// $Id: I2CPacket.nc,v 1.7 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * I2C Packet/buffer interface for sending data over the I2C bus.
+ * The address, length, and buffer must be specified.  The I2C bus then
+ * has control of that buffer and returns it when the operation has
+ * completed.  The I2CPacket interface supports master-mode communication
+ * and provides for multiple repeated STARTs and multiple reads/writes 
+ * within the same START transaction. 
+ * The interface is typed according to the address size supported by 
+ * the master hardware.  Masters capable of supporting extended (10-bit)
+ * I2C addressing MUST export both types. Applications should use the 
+ * smallest address size to ensure best portability.
+ *
+ * @param addr_size A type indicating the slave address size. Supported
+ * values are TI2CExtdAddr (for 10-bit addressing) and TI2CBasicAddr (7-bit
+ * addressing). 
+ *
+ * @author Joe Polastre
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Phil Levis <pal@cs.stanford.edu>
+ * Revision:  $Revision: 1.7 $
+ */
+
+#include <I2C.h>
+
+interface I2CPacket<addr_size> {
+  /**
+   * Perform an I2C read operation
+   *
+   * @param flags Flags that may be logical ORed and defined by:
+   *    I2C_START   - The START condition is transmitted at the beginning 
+   *                   of the packet if set.
+   *    I2C_STOP    - The STOP condition is transmitted at the end of the 
+   *                   packet if set.
+   *    I2C_ACK_END - ACK the last byte if set. Otherwise NACK last byte. This
+   *                   flag cannot be used with the I2C_STOP flag.
+   * @param addr The slave device address. Only used if I2C_START is set.
+   * @param length Length, in bytes, to be read
+   * @param 'uint8_t* COUNT(length) data' A point to a data buffer to read into
+   *
+   * @return SUCCESS if bus available and request accepted. 
+   */
+  async command error_t read(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data);
+
+  /**
+   * Perform an I2C write operation
+   *
+   * @param flags Flags that may be logical ORed and defined by:
+   *    I2C_START   - The START condition is transmitted at the beginning 
+   *                   of the packet if set.
+   *    I2C_STOP    - The STOP condition is transmitted at the end of the 
+   *                   packet if set.
+   * @param addr The slave device address. Only used if I2C_START is set.
+   * @param length Length, in bytes, to be read
+   * @param 'uint8_t* COUNT(length) data' A point to a data buffer to read into
+   *
+   * @return SUCCESS if bus available and request accepted. 
+   */
+  async command error_t write(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data);
+
+  /**
+   * Notification that the read operation has completed
+   *
+   * @param addr The slave device address
+   * @param length Length, in bytes, read
+   * @param 'uint8_t* COUNT(length) data' Pointer to the received data buffer
+   * @param success SUCCESS if transfer completed without error.
+   */
+  async event void readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data);
+
+  /**
+   * Notification that the write operation has completed
+   *
+   * @param addr The slave device address
+   * @param length Length, in bytes, written
+   * @param 'uint8_t* COUNT(length) data' Pointer to the data buffer written
+   * @param success SUCCESS if transfer completed without error.
+   */
+  async event void writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data);
+}
diff --git a/tos/interfaces/Ieee154Packet.nc b/tos/interfaces/Ieee154Packet.nc
new file mode 100644
index 00000000..7636ec5c
--- /dev/null
+++ b/tos/interfaces/Ieee154Packet.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#include <Ieee154.h>
+
+interface Ieee154Packet {
+
+  command ieee154_saddr_t address();
+ 
+  command ieee154_saddr_t destination(message_t* msg);
+ 
+  command ieee154_saddr_t source(message_t* msg);
+
+  command void setDestination(message_t* msg, ieee154_saddr_t addr);
+
+  command void setSource(message_t* msg, ieee154_saddr_t addr);
+
+  command bool isForMe(message_t* msg);
+
+  command ieee154_panid_t pan(message_t* msg);
+
+  command void setPan(message_t* msg, ieee154_panid_t grp);
+
+  command ieee154_panid_t localPan();
+}
diff --git a/tos/interfaces/Ieee154Send.nc b/tos/interfaces/Ieee154Send.nc
new file mode 100644
index 00000000..6d3d533c
--- /dev/null
+++ b/tos/interfaces/Ieee154Send.nc
@@ -0,0 +1,125 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <TinyError.h>
+#include <message.h>
+#include <Ieee154.h>
+
+/*
+ *
+ * The only change from the AMSend interface is that instead of
+ * sending to an AMID, we now send to a ieee154_saddr_t.
+ *
+ */
+
+interface Ieee154Send {
+
+  /** 
+    * Send a packet with a data payload of <tt>len</tt> to address
+    * <tt>addr</tt>. To determine the maximum available size, use the
+    * Packet interface of the component providing AMSend. If send
+    * returns SUCCESS, then the component will signal the sendDone
+    * event in the future; if send returns an error, it will not
+    * signal the event.  Note that a component may accept a send
+    * request which it later finds it cannot satisfy; in this case, it
+    * will signal sendDone with error code.
+    *
+    * @param addr   address to which to send the packet
+    * @param msg    the packet
+    * @param len    the length of the data in the packet payload
+    * @return       SUCCESS if the request to send succeeded and a
+    *               sendDone will be signaled later, EBUSY if the
+    *               abstraction cannot send now but will be able to
+    *               later, or FAIL if the communication layer is not
+    *               in a state that can send (e.g., off).
+    * @see          sendDone
+    */ 
+  command error_t send(ieee154_saddr_t addr, message_t* msg, uint8_t len);
+
+  /**
+    * Cancel a requested transmission. Returns SUCCESS if the 
+    * transmission was canceled properly (not sent in its
+    * entirety). Note that the component may not know
+    * if the send was successfully canceled, if the radio is
+    * handling much of the logic; in this case, a component
+    * should be conservative and return an appropriate error code.
+    * A successful call to cancel must always result in a 
+    * sendFailed event, and never a sendSucceeded event.
+    * 
+    * @param  msg     the packet whose transmission should be cancelled.
+    * @return SUCCESS if the transmission was cancelled, FAIL otherwise.
+    * @see    sendDone
+    */
+  command error_t cancel(message_t* msg);
+
+  /** 
+    * Signaled in response to an accepted send request. <tt>msg</tt> is
+    * the message buffer sent, and <tt>error</tt> indicates whether
+    * the send was successful.
+    *
+    * @param  msg   the packet which was submitted as a send request
+    * @param  error SUCCESS if it was sent successfully, FAIL if it was not,
+    *               ECANCEL if it was cancelled
+    * @see send
+    * @see cancel
+    */ 
+
+  event void sendDone(message_t* msg, error_t error);
+
+
+   /**
+   * Return the maximum payload length that this communication layer
+   * can provide. This command behaves identically to
+   * <tt>Packet.maxPayloadLength</tt> and is included in this
+   * interface as a convenience.
+   *
+   * @return the maximum payload length
+   */
+
+  
+  command uint8_t maxPayloadLength();
+
+
+   /**
+    * Return a pointer to a protocol's payload region in a packet.
+    * This command behaves identically to <tt>Packet.getPayload</tt>
+    * (minus the length parameter) and is included in this interface
+    * as a convenience.
+    *
+    * @param  msg    the packet
+    * @return        the payload of the packet
+    */
+  command void* getPayload(message_t* msg, uint8_t len);
+
+  
+}
diff --git a/tos/interfaces/Init.nc b/tos/interfaces/Init.nc
new file mode 100644
index 00000000..ce2dd3b1
--- /dev/null
+++ b/tos/interfaces/Init.nc
@@ -0,0 +1,63 @@
+// $Id: Init.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** The basic synchronous initialization interface.
+  *
+  * @author Philip Levis
+  * @date   January 17 2005
+  */ 
+
+
+#include "TinyError.h"
+
+interface Init {
+
+  /**
+   * Initialize this component. Initialization should not assume that
+   * any component is running: init() cannot call any commands besides
+   * those that initialize other components.  
+   * 
+   * @return SUCCESS if initialized properly, FAIL otherwise.
+   * @see TEP 107: Boot Sequence
+   *
+   */
+  command error_t init();
+}
diff --git a/tos/interfaces/Intercept.nc b/tos/interfaces/Intercept.nc
new file mode 100644
index 00000000..4b663af2
--- /dev/null
+++ b/tos/interfaces/Intercept.nc
@@ -0,0 +1,32 @@
+/**
+ * Allows protocol layers above the routing layer to perform data
+ * aggregation or make application-specific decisions on whether to
+ * forward via the return value of the forward event.
+ *
+ * @author Philip Levis
+ * @author Kyle Jamieson
+ * @version $Id: Intercept.nc,v 1.6 2008-06-04 03:00:26 regehr Exp $
+ * @see TEP 116: Packet Protocols, TEP 119: Collection
+ */
+
+#include <TinyError.h>
+#include <message.h>
+
+interface Intercept {
+  /**
+   * Signals that a message has been received, which is supposed to be
+   * forwarded to another destination. 
+   *
+   * @param 'message_t* ONE msg' The complete message received.
+   *
+   * @param 'void* COUNT(len) payload' The payload portion of the packet for this
+   * protocol layer.
+   *
+   * @param len The length of the payload buffer.
+   *
+   * @return TRUE indicates the packet should be forwarded, FALSE
+   * indicates that it should not be forwarded.
+   *
+   */
+  event bool forward(message_t* msg, void* payload, uint8_t len);
+}
diff --git a/tos/interfaces/InternalFlash.nc b/tos/interfaces/InternalFlash.nc
new file mode 100644
index 00000000..3734e933
--- /dev/null
+++ b/tos/interfaces/InternalFlash.nc
@@ -0,0 +1,69 @@
+/*                                                                      
+ *
+ * Copyright (c) 2000-2007 The Regents of the University of
+ * California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+/**
+ * A generic interface to read from and write to the internal flash of
+ * a microcontroller.
+ *
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Prabal Dutta <prabal@cs.berkeley.edu> (Port to T2)
+ */
+interface InternalFlash {
+
+  /**
+   * Read <code>size</code> bytes starting from <code>addr</code> and
+   * return them in <code>buf</code>.
+   *
+   * @param   addr A pointer to the starting address from which to read.
+   * @param   'void* COUNT(size) buf'  A pointer to the buffer into which read bytes are
+   *               placed.
+   * @param   size The number of bytes to read.
+   * @return  SUCCESS if the bytes were successfully read.
+   *          FAIL if the call could not be completed.
+   */
+  command error_t read(void* addr, void* buf, uint16_t size);
+
+  /**
+   * Write <code>size</code> bytes from <code>buf</code> into internal
+   * flash starting at <code>addr</code>.
+   *
+   * @param   addr A pointer to the starting address to which to write.
+   * @param   'void* COUNT(size) buf'  A pointer to the buffer from which bytes are read.
+   * @param   size The number of bytes to write.
+   * @return  SUCCESS if the bytes were successfully written.
+   *          FAIL if the call could not be completed.
+   */
+  command error_t write(void* addr, void* buf, uint16_t size);
+}
diff --git a/tos/interfaces/Leds.nc b/tos/interfaces/Leds.nc
new file mode 100644
index 00000000..19535356
--- /dev/null
+++ b/tos/interfaces/Leds.nc
@@ -0,0 +1,136 @@
+// $Id: Leds.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $
+
+/*
+ * Copyright (c) 2005-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Commands for controlling three LEDs. A platform can provide this
+ * interface if it has more than or fewer than three LEDs. In the
+ * former case, these commands refer to the first three LEDs. In the
+ * latter case, some of the commands are null operations, and the set
+ * of non-null operations must be contiguous and start at Led1. That
+ * is, on platforms with 2 LEDs, LED 3's commands are null operations,
+ * while on platforms with 1 LED, LED 2 and LED 3's commands are null
+ * opertations.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ */
+
+#include "Leds.h"
+
+interface Leds {
+
+  /**
+   * Turn on LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0On();
+
+  /**
+   * Turn off LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0Off();
+
+  /**
+   * Toggle LED 0; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led0Toggle();
+
+  /**
+   * Turn on LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1On();
+
+  /**
+   * Turn off LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1Off();
+
+   /**
+   * Toggle LED 1; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led1Toggle();
+
+ 
+  /**
+   * Turn on LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2On();
+
+  /**
+   * Turn off LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2Off();
+
+   /**
+   * Toggle LED 2; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led2Toggle();
+
+
+  /**
+   * Get the current LED settings as a bitmask. Each bit corresponds to
+   * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can
+   * also use the enums LEDS_LED0, LEDS_LED1. For example, this expression
+   * will determine whether LED 2 is on:
+   *
+   * <pre> (call Leds.get() & LEDS_LED2) </pre>
+   *
+   * This command supports up to 8 LEDs; if a platform has fewer, then
+   * those LEDs should always be off (their bit is zero). Also see
+   * <tt>set()</tt>.
+   *
+   * @return a bitmask describing which LEDs are on and which are off
+   */ 
+  async command uint8_t get();
+
+  
+  /**
+   * Set the current LED configuration using a bitmask.  Each bit
+   * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED
+   * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example,
+   * this statement will configure the LEDs so LED 0 and LED 2 are on:
+   *
+   * <pre> call Leds.set(LEDS_LED0 | LEDS_LED2); </pre>
+   *
+   * This statement will turn LED 1 on if it was not already:
+   *
+   * <pre>call Leds.set(call Leds.get() | LEDS_LED1);</pre>
+   *
+   * @param  val   a bitmask describing the on/off settings of the LEDs
+   */
+   async command void set(uint8_t val);
+  
+}
diff --git a/tos/interfaces/LinkPacketMetadata.nc b/tos/interfaces/LinkPacketMetadata.nc
new file mode 100644
index 00000000..b3047853
--- /dev/null
+++ b/tos/interfaces/LinkPacketMetadata.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This interface provides metadata associated with a link layer packet.
+ * @author Philip Levis
+ */
+
+interface LinkPacketMetadata {
+
+  /**
+   * Return true if the channel during this packet had high quality (few bit errors).
+   * A good rule of thumb for "high quality" is that the channel quality
+   * would enable MTU packets to have a reception rate of 90% or greater.
+   *
+   * @param 'message_t* ONE msg' A received packet during which the channel was measured.
+   * @return Whether the channel had high quality.
+   */
+  async command bool highChannelQuality(message_t* msg);
+
+}
diff --git a/tos/interfaces/LocalIeeeEui64.nc b/tos/interfaces/LocalIeeeEui64.nc
new file mode 100644
index 00000000..45121dc2
--- /dev/null
+++ b/tos/interfaces/LocalIeeeEui64.nc
@@ -0,0 +1,49 @@
+// $Id: LocalIeeeEui64.nc,v 1.2 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ * Author: Gilman Tolle, Jonathan Hui (TEP 122)
+ */
+
+#include "IeeeEui64.h"
+
+/**
+ * Interface to read the 64-bit IEEE EUI.
+ *
+ */
+interface LocalIeeeEui64 {
+  /**
+   * Get the 64-bit IEEE EUI.
+   * @returns the 64-bit IEEE EUI type, defined in tos/types/IeeeEui64.h
+   */
+  command ieee_eui64_t getId();
+}
diff --git a/tos/interfaces/LogRead.nc b/tos/interfaces/LogRead.nc
new file mode 100644
index 00000000..ec9a3603
--- /dev/null
+++ b/tos/interfaces/LogRead.nc
@@ -0,0 +1,125 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Read interface for the log storage abstraction described in
+ * TEP103.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Gay
+ * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:29 $
+ */
+
+#include "Storage.h"
+
+interface LogRead {
+  /**
+   * Initiate a read operation from the current position within a given log
+   * volume. On SUCCESS, the <code>readDone</code> event will signal
+   * completion of the operation.
+   * 
+   * @param 'void* COUNT(len) buf' buffer to place read data.
+   * @param len number of bytes to read.
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EBUSY if a request is already being processed.
+   */
+  command error_t read(void* buf, storage_len_t len);
+
+  /**
+   * Signals the completion of a read operation. The current read position is
+   * advanced by <code>len</code> bytes.
+   *
+   * @param addr starting address of read.
+   * @param 'void* COUNT(len) buf' buffer where read data was placed.
+   * @param len number of bytes read - this may be less than requested
+   *    (even equal to 0) if the end of the log was reached
+   * @param error SUCCESS if read was possible, FAIL otherwise
+   */
+  event void readDone(void* buf, storage_len_t len, error_t error);
+
+  /**
+   * Return a "cookie" representing the current read offset within the
+   * log. This cookie can be used in a subsequent seek operation to
+   * return to the same place in the log (if it hasn't been overwritten).
+   *
+   * @return Cookie representing current offset. 
+   *   <code>SEEK_BEGINNING</code> will be returned if:<ul>
+   *   <li> a write in a circular log overwrote the previous read position
+   *   <li> seek was passed a cookie representing a position before the
+   *        current beginning of a circular log
+   *   </ul>
+   *   Note that <code>SEEK_BEGINNING</code> can also be returned at
+   *   other times (just after erasing a log, etc).
+   */
+  command storage_cookie_t currentOffset();
+
+  /**
+   * Set the read position in the log, using a cookie returned by the
+   * <code>currentOffset</code> commands of <code>LogRead</code> or
+   * <code>LogWrite</code>, or the special value <code>SEEK_BEGINNING</code>.
+   *
+   * If the specified position has been overwritten, the read position
+   * will be set to the beginning of the log.
+   *
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EBUSY if a request is already being processed.
+   */
+  command error_t seek(storage_cookie_t offset);
+
+  /**
+   * Report success of seek operation. If <code>SUCCESS</code> is returned,
+   * the read position has been changed as requested. If other values are
+   * returned, the read position is undefined.
+   *
+   * @param error SUCCESS if the seek was succesful, EINVAL if the cookie
+   *   was invalid and FAIL for other errors.
+   */
+  event void seekDone(error_t error);
+  
+  /**
+   * Report approximate log capacity in bytes. Note that use of
+   * <code>sync</code>, failures and general overhead may reduce the number
+   * of bytes available to the log. 
+   *
+   * @return Volume size.
+   */
+  command storage_len_t getSize();
+}
diff --git a/tos/interfaces/LogWrite.nc b/tos/interfaces/LogWrite.nc
new file mode 100644
index 00000000..74e4c4fd
--- /dev/null
+++ b/tos/interfaces/LogWrite.nc
@@ -0,0 +1,119 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Write interface for the log storage abstraction described in
+ * TEP103.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:29 $
+ */
+
+#include "Storage.h"
+
+interface LogWrite {
+  /**
+   * Append data to a given volume. On SUCCESS, the <code>appendDone</code> 
+   * event will signal completion of the operation.
+   * 
+   * @param 'void* COUNT(len) buf' buffer to write data from.
+   * @param len number of bytes to write.
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EINVAL if the request is invalid (len too large).
+   *   <li>EBUSY if a request is already being processed.
+   */
+  command error_t append(void* buf, storage_len_t len);
+
+  /**
+   * Signals the completion of an append operation. However, data is not
+   * guaranteed to survive a power-cycle unless a commit operation has
+   * been completed.
+   *
+   * @param 'void* COUNT(len) buf' buffer that written data was read from.
+   * @param len number of bytes actually written (valid even in case of error)
+   * @param records_lost TRUE if this append destroyed some old records from
+   *   the beginning of the log (only possible for circular logs).
+   * @param error SUCCESS if append was possible, ESIZE if the (linear) log
+   *    is full and FAIL for other errors.
+   */
+  event void appendDone(void* buf, storage_len_t len, bool recordsLost,
+			error_t error);
+  
+  /**
+   * Return a "cookie" representing the current append offset within the
+   * log. This cookie can be used in a subsequent seek operation (see
+   * <code>LogRead</code> to start reading from this place in the log (if
+   * it hasn't been overwritten).
+   *
+   * The current write position is not known before the first read, append,
+   * seek, erase or sync.
+   *
+   * @return Cookie representing current offset. 
+   */
+  command storage_cookie_t currentOffset();
+
+  /**
+   * Initiate an erase operation. On SUCCESS, the
+   * <code>eraseDone</code> event will signal completion of the
+   * operation.
+   *
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EBUSY if a request is already being processed.
+   */
+  command error_t erase();
+  
+  /**
+   * Signals the completion of an erase operation.
+   *
+   * @param error SUCCESS if the log was erased, FAIL otherwise.
+   */
+  event void eraseDone(error_t error);
+
+  /**
+   * Ensure all writes are present on flash, and that failure in subsequent
+   * writes cannot cause loss of earlier writes. On SUCCES, the 
+   * <code>commitDone</code> event will signal completion of the operation.
+   *
+   * @return 
+   *   <li>SUCCESS if the request was accepted, 
+   *   <li>EBUSY if a request is already being processed.
+   */
+  command error_t sync();
+
+  /**
+   * Signals the successful or unsuccessful completion of a sync operation. 
+   *
+   * @param error SUCCESS if the log was synchronised, FAIL otherwise.
+   */
+  event void syncDone(error_t error);
+}
diff --git a/tos/interfaces/LowPowerListening.nc b/tos/interfaces/LowPowerListening.nc
new file mode 100644
index 00000000..68d9cc4a
--- /dev/null
+++ b/tos/interfaces/LowPowerListening.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Low Power Listening interface
+ *
+ * @author Jonathan Hui
+ * @author David Moss
+ */
+
+#include "message.h"
+
+interface LowPowerListening {
+  /**
+   * Set this this node's radio wakeup interval, in milliseconds. After
+   * each interval, the node will wakeup and check for radio activity.
+   *
+   * Note: The wakeup interval can be set to 0 to indicate that the radio
+   * should stay on all the time but in order to get a startDone this
+   * should only be done when the duty-cycling is off (after a stopDone).
+   *
+   * @param intervalMs the length of this node's Rx check interval, in [ms]
+   */
+  command void setLocalWakeupInterval(uint16_t intervalMs);
+  
+  /**
+   * @return the local node's wakeup interval, in [ms]
+   */
+  command uint16_t getLocalWakeupInterval();
+
+  /**
+   * Configure this outgoing message so it can be transmitted to a neighbor mote
+   * with the specified wakeup interval.
+   * @param 'message_t* ONE msg' Pointer to the message that will be sent
+   * @param intervalMs The receiving node's wakeup interval, in [ms]
+   */
+  command void setRemoteWakeupInterval(message_t *msg, uint16_t intervalMs);
+
+  /**
+   * @param 'message_t* ONE msg'
+   * @return the destination node's wakeup interval configured in this message
+   */
+  command uint16_t getRemoteWakeupInterval(message_t *msg);
+}
diff --git a/tos/interfaces/McuPowerOverride.nc b/tos/interfaces/McuPowerOverride.nc
new file mode 100644
index 00000000..c1daa255
--- /dev/null
+++ b/tos/interfaces/McuPowerOverride.nc
@@ -0,0 +1,63 @@
+/// $Id: McuPowerOverride.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $
+
+/**
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Interface to allow high-level components to set a lower bound for a
+ * microcontroller's low power state. This is sometimes necessary,
+ * e.g., if a very low power state has a long wakeup latency that will
+ * violate application timing requirements. TEP 112 describes how
+ * TinyOS incorporates this information when the Scheduler tells
+ * the MCU to enter a low power state.
+ * 
+ * @author Philip Levis
+ * @date   Oct 26, 2005
+ * @see    TEP 112: Microconroller Power Management
+ */
+
+#include "hardware.h"
+
+interface McuPowerOverride {
+
+  /**
+   * Called when computing the low power state, in order to allow
+   * a high-level component to institute a lower bound. Because
+   * this command originates deep within the basic TinyOS scheduling
+   * mechanisms, it should be used very sparingly. Refer to TEP 112 for
+   * details.
+   *
+   * @return    the lowest power state the system can enter to meet the 
+   *            requirements of this component
+   */
+  async command mcu_power_t lowestState();
+}
diff --git a/tos/interfaces/McuPowerState.nc b/tos/interfaces/McuPowerState.nc
new file mode 100644
index 00000000..9130043e
--- /dev/null
+++ b/tos/interfaces/McuPowerState.nc
@@ -0,0 +1,53 @@
+/// $Id: McuPowerState.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $
+
+/**
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Interface to instruct TinyOS that the low-power state of the MCU
+ * may have changed. TEP 112 describes how an MCU computes this state
+ * and how the Scheduler uses this interface to manage system power
+ * draw.
+ * 
+ * @author Philip Levis
+ * @date   Oct 26, 2005
+ * @see    TEP 112: Microcontroller Power Management
+ */
+
+interface McuPowerState {
+    /** 
+     * Called by any component to tell TinyOS that the MCU low
+     * power state may have changed. Generally, this should be
+     * called whenever a peripheral/timer is started/stopped. 
+     */
+    async command void update();
+}
diff --git a/tos/interfaces/McuSleep.nc b/tos/interfaces/McuSleep.nc
new file mode 100644
index 00000000..250a1189
--- /dev/null
+++ b/tos/interfaces/McuSleep.nc
@@ -0,0 +1,77 @@
+/// $Id: McuSleep.nc,v 1.5 2010-06-29 22:07:46 scipio Exp $
+
+/**
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2005 Crossbow Technology, Inc. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to instruct the MCU to enter a low power state. TEP112
+ * describes how an MCU computes this state and how the Scheduler uses
+ * this interface to manage system power draw.
+ * 
+ * @author Philip Levis
+ * @author Martin Turon <mturon@xbow.com>
+ * @date   Oct 26, 2005
+ *
+ */
+
+interface McuSleep {
+    /** Called by the scheduler to put the MCU to sleep. */
+    async command void    sleep();
+}
diff --git a/tos/interfaces/Mount.nc b/tos/interfaces/Mount.nc
new file mode 100644
index 00000000..4ebe26ee
--- /dev/null
+++ b/tos/interfaces/Mount.nc
@@ -0,0 +1,37 @@
+/* Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Mount a volume.
+ *
+ * @author David Gay
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+interface Mount {
+  /**
+   * Mount a particular volume. This must be done before the volume's
+   * first use. <code>mountDone</code> will be signaled if SUCCESS is
+   * returned.
+   * @return SUCCESS if mount request is accepted, FAIL if mount has
+   *   already been attempted.
+   */
+  command error_t mount();
+
+  /**
+   * Report success or failure of mount operation. If the mount failed,
+   * no operation should be perfomed on the volume. Note that success
+   * should not be used to indicate that the volume contains valid data,
+   * rather failure indicates some major internal problem that prevents
+   * the volume from being used.
+   *
+   * @param error SUCCESS if the mount succeeded, FAIL otherwise.
+   */
+  event void mountDone(error_t error);
+}
diff --git a/tos/interfaces/Notify.nc b/tos/interfaces/Notify.nc
new file mode 100644
index 00000000..36dab664
--- /dev/null
+++ b/tos/interfaces/Notify.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The Notify interface is intended for delivery of values from
+ * self-triggered devices, at relatively low rates. For example, a
+ * driver for a motion detector or a switch might provide this
+ * interface. The type of the value is given as a template
+ * argument. Generally, these values are backed by memory or
+ * computation. Because no error code is included, both calls must be
+ * guaranteed to succeed. This interface should be used when a single
+ * logical unit supports both getting and setting.
+ *
+ * <p>
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be stored
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+interface Notify<val_t> {
+  /**
+   * Enables delivery of notifications from the device to the calling
+   * generic client component.
+   *
+   * @return SUCCESS if notifications were enabled
+   */
+  command error_t enable();
+
+  /**
+   * Disables delivery of notifications from the device to the calling
+   * generic client component.
+   *
+   * @return SUCCESS if notifications were disabled
+   */
+  command error_t disable();
+
+  /**
+   * Signals the arrival of a new value from the device.
+   *
+   * @param val the value arriving from the device
+   */
+  event void notify( val_t val );
+}
diff --git a/tos/interfaces/Packet.nc b/tos/interfaces/Packet.nc
new file mode 100644
index 00000000..32846f96
--- /dev/null
+++ b/tos/interfaces/Packet.nc
@@ -0,0 +1,128 @@
+// $Id: Packet.nc,v 1.9 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** 
+  * The basic message data type accessors. Protocols may use
+  * additional packet interfaces for their protocol specific
+  * data/metadata.
+  *
+  * @author Philip Levis
+  * @date   January 5 2005
+  * @see    TEP 116: Packet Protocols
+  */ 
+
+
+#include <message.h>
+
+interface Packet {
+
+
+  /**
+    * Clear out this packet.  Note that this is a deep operation and
+    * total operation: calling clear() on any layer will completely
+    * clear the packet for reuse.
+    * @param  'message_t* ONE msg'    the packet to clear
+    */
+
+  command void clear(message_t* msg);
+
+  /**
+    * Return the length of the payload of msg. This value may be less
+    * than what maxPayloadLength() returns, if the packet is smaller than
+    * the MTU. If a communication component does not support variably
+    * sized data regions, then payloadLength() will always return
+    * the same value as maxPayloadLength(). 
+    *
+    * @param  'message_t* ONE msg'    the packet to examine
+    * @return        the length of its current payload
+    */
+
+  command uint8_t payloadLength(message_t* msg);
+
+  /**
+    * Set the length field of the packet. This value is not checked
+    * for validity (e.g., if it is larger than the maximum payload
+    * size). This command is not used when sending packets, as calls
+    * to send include a length parameter. Rather, it is used by
+    * components, such as queues, that need to buffer requests to
+    * send.  This command allows the component to store the length
+    * specified in the request and later recover it when actually
+    * sending.
+    *
+    * @param 'message_t* ONE msg'   the packet
+    * @param len   the value to set its length field to
+    */
+
+  command void setPayloadLength(message_t* msg, uint8_t len);
+
+ /**
+   * Return the maximum payload length that this communication layer
+   * can provide. Note that, depending on protocol fields, a given
+   * request to send a packet may not be able to send the maximum
+   * payload length (e.g., if there are variable length
+   * fields). Protocols may provide specialized interfaces for these
+   * circumstances.
+   *
+   * @return   the maximum size payload allowed by this layer
+   */
+  command uint8_t maxPayloadLength();
+
+
+ /**
+   * Return a pointer to a protocol's payload region in a packet.
+   * If the caller intends to write to the payload region then
+   * the <tt>len</tt> parameter must reflect the maximum required
+   * length. If the caller (only) wants to read from the payload
+   * region, then <tt>len</tt> may be set to the value of
+   * payloadLength(). If the payload region is smaller than 
+   * <tt>len</tt> this command returns NULL. The offset where
+   * the payload region starts within a packet is fixed, i.e. for
+   * a given <tt>msg</tt> this command will always return the same
+   * pointer or NULL.
+   *
+   * @param 'message_t* ONE msg'   the packet 
+   * @param len   the length of payload required
+   * @return 'void* COUNT_NOK(len)'     a pointer to the packet's data payload for this layer
+   *              or NULL if <tt>len</tt> is too big
+   */
+  command void* getPayload(message_t* msg, uint8_t len);
+
+}
diff --git a/tos/interfaces/PacketAcknowledgements.nc b/tos/interfaces/PacketAcknowledgements.nc
new file mode 100644
index 00000000..694c5c15
--- /dev/null
+++ b/tos/interfaces/PacketAcknowledgements.nc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2000-2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * This interface allows a component to enable or disable acknowledgments
+ * on a per-packet basis.
+ *
+ * @author Jonathan Hui
+ * @author Philip Levis
+ * @author Joe Polastre
+ * @date   June 21 2006
+ */
+
+interface PacketAcknowledgements {
+
+  /**
+   * Tell a protocol that when it sends this packet, it should use synchronous
+   * acknowledgments.
+   * The acknowledgment is synchronous as the caller can check whether the
+   * ack was received through the wasAcked() command as soon as a send operation
+   * completes.
+   *
+   * @param 'message_t* ONE msg' - A message which should be acknowledged when transmitted.
+   * @return SUCCESS if acknowledgements are enabled, EBUSY
+   * if the communication layer cannot enable them at this time, FAIL
+   * if it does not support them.
+   */
+  
+  async command error_t requestAck( message_t* msg );
+
+  /**
+   * Tell a protocol that when it sends this packet, it should not use
+   * synchronous acknowledgments.
+   *
+   * @param 'message_t* ONE msg' - A message which should not be acknowledged when transmitted.
+   * @return SUCCESS if acknowledgements are disabled, EBUSY
+   * if the communication layer cannot disable them at this time, FAIL
+   * if it cannot support unacknowledged communication.
+   */
+
+  async command error_t noAck( message_t* msg );
+
+  /**
+   * Tell a caller whether or not a transmitted packet was acknowledged.
+   * If acknowledgments on the packet had been disabled through noAck(),
+   * then the return value is undefined. If a packet
+   * layer does not support acknowledgements, this command must return always
+   * return FALSE.
+   *
+   * @param 'message_t* ONE msg' - A transmitted message.
+   * @return Whether the packet was acknowledged.
+   *
+   */
+  
+  async command bool wasAcked(message_t* msg);
+  
+}
diff --git a/tos/interfaces/PacketLink.nc b/tos/interfaces/PacketLink.nc
new file mode 100644
index 00000000..dd8285b2
--- /dev/null
+++ b/tos/interfaces/PacketLink.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * @author David Moss
+ * @author Jon Wyant
+ */
+
+interface PacketLink {
+
+  /**
+   * Set the maximum number of times attempt message delivery
+   * Default is 0
+   * @param 'message_t* ONE msg'
+   * @param maxRetries the maximum number of attempts to deliver
+   *     the message
+   */
+  command void setRetries(message_t *msg, uint16_t maxRetries);
+
+  /**
+   * Set a delay between each retry attempt
+   * @param msg
+   * @param retryDelay the delay betweeen retry attempts, in milliseconds
+   */
+  command void setRetryDelay(message_t *msg, uint16_t retryDelay);
+
+  /** 
+   * @param 'message_t* ONE msg'
+   * @return the maximum number of retry attempts for this message
+   */
+  command uint16_t getRetries(message_t *msg);
+
+  /**
+   * @param 'message_t* ONE msg'
+   * @return the delay between retry attempts in ms for this message
+   */
+  command uint16_t getRetryDelay(message_t *msg);
+
+  /**
+   * @param 'message_t* ONE msg'
+   * @return TRUE if the message was delivered.
+   */
+  command bool wasDelivered(message_t *msg);
+
+}
+
+
diff --git a/tos/interfaces/PacketTimeStamp.nc b/tos/interfaces/PacketTimeStamp.nc
new file mode 100644
index 00000000..1b028ba0
--- /dev/null
+++ b/tos/interfaces/PacketTimeStamp.nc
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface PacketTimeStamp<precision_tag, size_type>
+{
+	/**
+	 * @param 'message_t *ONE msg' Message to examine.
+	 *
+	 * Returns TRUE if the time stamp of the message is valid. Under special
+	 * circumstances the radio chip might not be able to correctly assign a
+	 * precise time value to an incoming packet (e.g. under very heavy traffic
+	 * multiple interrupts can occur before they could be serviced, and even
+	 * if capture registers are used, it is not possible to get the time stamp
+	 * for the first or last unserviced event), in which case the time stamp
+	 * value should not be used. It is recommended that the isValid command be
+	 * called from the receive or sendDone event handler.
+	 */
+	async command bool isValid(message_t* msg);
+
+	/**
+	 * @param 'message_t *ONE msg' Message to get timestamp from.
+	 *
+	 * Return the time stamp for the given message. Please check with the
+	 * isValid command if this value can be relied upon. If this command is
+	 * called after transmission, then the transmit time of the packet
+	 * is returned (the time when the frame synchronization byte was
+	 * transmitted). If this command is called after the message is received,
+	 * the tne receive time of the message is returned. It is recommended that
+	 * the timestamp command be called only from the receive or sendDone event
+	 * handler.
+	 */
+	async command size_type timestamp(message_t* msg);
+
+	/**
+	 * @param 'message_t *ONE msg' Message to modify.
+	 *
+	 * Sets the isValid flag to FALSE.
+	 */
+	async command void clear(message_t* msg);
+
+	/**
+	 * @param 'message_t *ONE msg' Message to modify.
+	 *
+	 * Sets the isValid flag to TRUE and the time stamp value to the
+	 * specified value.
+	 */
+	async command void set(message_t* msg, size_type value);
+}
diff --git a/tos/interfaces/ParameterInit.nc b/tos/interfaces/ParameterInit.nc
new file mode 100644
index 00000000..e73cbce3
--- /dev/null
+++ b/tos/interfaces/ParameterInit.nc
@@ -0,0 +1,65 @@
+// $Id: ParameterInit.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** 
+  * A synchronous initialization interface that takes a single parameter.
+  *
+  * @author Philip Levis
+  * @date   June 6 2005
+  * @see    TEP 107: Boot Sequence
+  */ 
+
+
+#include "TinyError.h"
+
+interface ParameterInit <parameter> {
+
+  /**
+   * Initialize this component. Initialization should not assume that
+   * any component is running: init() cannot call any commands besides
+   * those that initialize other components. This command behaves
+   * identically to Init.init, except that it takes a parameter.
+   *
+   * @param   param   the initialization parameter
+   * @return          SUCCESS if initialized properly, FAIL otherwise.
+   */
+  command error_t init(parameter param);
+}
diff --git a/tos/interfaces/Pool.nc b/tos/interfaces/Pool.nc
new file mode 100644
index 00000000..ddc167fa
--- /dev/null
+++ b/tos/interfaces/Pool.nc
@@ -0,0 +1,98 @@
+/* $Id: Pool.nc,v 1.5 2008-06-04 03:00:31 regehr Exp $ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  An allocation pool of a specific type memory objects.
+ *  The Pool allows components to allocate (<code>get</code>)
+ *  and deallocate (<code>put</code>) elements. The pool
+ *  does not require that deallocations be items which were
+ *  originally allocated. E.g., a program can create two
+ *  pools of the same type and pass items between them.
+ *  This allows, for example, a component to allocate a pool
+ *  of message buffers and freely buffer swap them on
+ *  Receive.receive events.
+ *
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @date   $Date: 2008-06-04 03:00:31 $
+ */
+
+   
+interface Pool<t> {
+
+  /**
+    * Returns whether there any elements remaining in the pool.
+    * If empty returns TRUE, then <code>get</code> will return
+    * NULL. If empty returns FALSE, then <code>get</code> will
+    * return a pointer to an object.
+    *
+    * @return Whether the pool is empty.
+    */
+
+  command bool empty();
+
+  /**
+    * Returns how many elements are in the pool. If size
+    * returns 0, empty() will return TRUE. If size returns
+    * a non-zero value, empty() will return FALSE. The
+    * return value of size is always &lte; the return
+    * value of maxSize().
+    *
+    * @return How many elements are in the pool.
+    */
+  command uint8_t size();
+  
+  /**
+    * Returns the maximum number of elements in the pool
+    * (the size of a full pool).
+    *
+    * @return Maximum size.
+    */
+  command uint8_t maxSize();
+
+  /**
+    * Deallocate an object, putting it back into the pool.
+    *
+    * @param 't* ONE newVal'
+    * @return SUCCESS if the entry was put in successfully, FAIL
+    * if the pool is full.
+    */
+  command error_t put(t* newVal);
+
+  /**
+    * Allocate an element from the pool.
+    *
+    * @return 't* ONE_NOK' A pointer if the pool is not empty, NULL if
+    * the pool is empty.
+    */
+  command t* get();
+}
diff --git a/tos/interfaces/Queue.nc b/tos/interfaces/Queue.nc
new file mode 100644
index 00000000..901a4969
--- /dev/null
+++ b/tos/interfaces/Queue.nc
@@ -0,0 +1,102 @@
+/* $Id: Queue.nc,v 1.5 2008-06-04 03:00:31 regehr Exp $ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  Interface to a FIFO list (queue) that contains items
+ *  of a specific type. The queue has a maximum size.
+ *
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @date   $Date: 2008-06-04 03:00:31 $
+ */
+
+   
+interface Queue<t> {
+
+  /**
+   * Returns if the queue is empty.
+   *
+   * @return Whether the queue is empty.
+   */
+  command bool empty();
+
+  /**
+   * The number of elements currently in the queue.
+   * Always less than or equal to maxSize().
+   *
+   * @return The number of elements in the queue.
+   */
+  command uint8_t size();
+
+  /**
+   * The maximum number of elements the queue can hold.
+   *
+   * @return The maximum queue size.
+   */
+  command uint8_t maxSize();
+
+  /**
+   * Get the head of the queue without removing it. If the queue
+   * is empty, the return value is undefined.
+   *
+   * @return 't ONE' The head of the queue.
+   */
+  command t head();
+  
+  /**
+   * Remove the head of the queue. If the queue is empty, the return
+   * value is undefined.
+   *
+   * @return 't ONE' The head of the queue.
+   */
+  command t dequeue();
+
+  /**
+   * Enqueue an element to the tail of the queue.
+   *
+   * @param 't ONE newVal' - the element to enqueue
+   * @return SUCCESS if the element was enqueued successfully, FAIL
+   *                 if it was not enqueued.
+   */
+  command error_t enqueue(t newVal);
+
+  /**
+   * Return the nth element of the queue without dequeueing it, 
+   * where 0 is the head of the queue and (size - 1) is the tail. 
+   * If the element requested is larger than the current queue size,
+   * the return value is undefined.
+   *
+   * @param index - the index of the element to return
+   * @return 't ONE' the requested element in the queue.
+   */
+  command t element(uint8_t idx);
+}
diff --git a/tos/interfaces/README b/tos/interfaces/README
new file mode 100644
index 00000000..aac31ad1
--- /dev/null
+++ b/tos/interfaces/README
@@ -0,0 +1,2 @@
+Update this.
+
diff --git a/tos/interfaces/RadioTimeStamping.nc b/tos/interfaces/RadioTimeStamping.nc
new file mode 100644
index 00000000..1cd25942
--- /dev/null
+++ b/tos/interfaces/RadioTimeStamping.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**
+ * Interface for receiving time stamp information from the radio.
+ * This information is also embedded in packet metadata.
+ *
+ * @author Jonathan Hui
+ * @author Philip Levis
+ * @author Joe Polastre
+ * @date   October 10 2005
+ *
+ */
+
+interface RadioTimeStamping
+{
+  /** 
+   * Provides the time at which start of frame delimiter has been
+   * transmitted: units are in terms of a 32kHz clock.
+   * @param 'message_t* ONE p_msg'
+   */
+  async event void transmittedSFD( uint16_t time, message_t* p_msg );
+  
+  /** 
+   * Provides the time at which start of frame delimiter was received:
+   * units are in terms of a 32kHz clock.  <b>NOTE</b> that receiving
+   * a receivedSFD() event does NOT mean that a packet will be
+   * received; the transmission may stop, become corrupted, or be
+   * filtered by the physical or link layers.  The number of rxSFD
+   * events will always be great than or equal to the number of
+   * Receive message events.
+   */
+  async event void receivedSFD( uint16_t time );
+}
diff --git a/tos/interfaces/Random.nc b/tos/interfaces/Random.nc
new file mode 100644
index 00000000..b4f77723
--- /dev/null
+++ b/tos/interfaces/Random.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** 
+  * Interface for generating 16-bit and 32-bit random numbers.
+  *
+  * @author Barbara Hohlt 
+  * @date   March 1 2005 
+  */ 
+interface Random
+{
+    /** 
+     * Produces a 32-bit pseudorandom number. 
+     * @return Returns the 32-bit pseudorandom number.
+     */
+  async command uint32_t rand32();
+
+    /** 
+     * Produces a 32-bit pseudorandom number. 
+     * @return Returns low 16 bits of the pseudorandom number.
+     */
+  async command uint16_t rand16();
+
+}
+
+    
diff --git a/tos/interfaces/Read.nc b/tos/interfaces/Read.nc
new file mode 100644
index 00000000..7593e897
--- /dev/null
+++ b/tos/interfaces/Read.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The Read interface is intended for split-phase low-rate or
+ * high-latency reading of small values. The type of the value is
+ * given as a template argument. Because this interface is
+ * split-phase, these values may be backed by hardware, or a
+ * long-running computation.
+ *
+ * <p>
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be returned
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:14 $
+ */
+
+interface Read<val_t> {
+  /**
+   * Initiates a read of the value.
+   * 
+   * @return SUCCESS if a readDone() event will eventually come back.
+   */
+  command error_t read();
+
+  /**
+   * Signals the completion of the read().
+   *
+   * @param result SUCCESS if the read() was successful
+   * @param val the value that has been read
+   */
+  event void readDone( error_t result, val_t val );
+}
diff --git a/tos/interfaces/ReadNow.nc b/tos/interfaces/ReadNow.nc
new file mode 100644
index 00000000..7448eb5c
--- /dev/null
+++ b/tos/interfaces/ReadNow.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The ReadNow interface is intended for split-phase low-latency
+ * reading of small values. The type of the value is given as a
+ * template argument. Because this interface is split-phase, these
+ * values may be backed by hardware. Providers of this interface
+ * should also provide a Resource interface, and this interface should
+ * only be used after the resource has been acquired. Otherwise, the
+ * low-latency requirement may be impossible to meet.
+ *
+ * <p>
+ * This interface has the same calling semantics as the Read interface
+ * described in TEP 114, except that it is async.
+ * 
+ * @param val_t the type of the object that will be returned
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-06-16 18:58:51 $
+ */
+
+interface ReadNow<val_t> {
+  /**
+   * Initiates a read of the value.
+   * 
+   * @return SUCCESS if a readDone() event will eventually come back.
+   */
+  async command error_t read();
+
+  /**
+   * Signals the completion of the read().
+   *
+   * @param result SUCCESS if the read() was successful
+   * @param val the value that has been read
+   */
+  async event void readDone( error_t result, val_t val );
+}
diff --git a/tos/interfaces/ReadRef.nc b/tos/interfaces/ReadRef.nc
new file mode 100644
index 00000000..1e41536b
--- /dev/null
+++ b/tos/interfaces/ReadRef.nc
@@ -0,0 +1,68 @@
+/**
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The ReadRef interface is intended for split-phase low-rate or
+ * high-latency reading of large values. The type of the value is
+ * given as a template argument. When a value is too large to be
+ * comfortably passed on the stack, the caller should allocate space
+ * for the value and pass the pointer to read(). When the readDone()
+ * comes back, the space will be filled with the new value.
+ *
+ * <p>
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be returned
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:31 $
+ */
+
+interface ReadRef<val_t> {
+  /**
+   * Initiates a read of the value.
+   * 
+   * @param 'val_t* ONE val' a pointer to space that will be filled by the value
+   *
+   * @return SUCCESS if a readDone() event will eventually come back.
+   */
+  command error_t read( val_t* val );
+  
+  /**
+   * Signals the completion of the read(). The returned pointer will
+   * be the same as the original pointer passed to read().
+   *
+   * @param result SUCCESS if the read() was successful
+   * @param 'val_t* ONE val' a pointer to the value that has been read
+   */
+  event void readDone( error_t result, val_t* val );
+}
diff --git a/tos/interfaces/ReadStream.nc b/tos/interfaces/ReadStream.nc
new file mode 100644
index 00000000..04ed1e7c
--- /dev/null
+++ b/tos/interfaces/ReadStream.nc
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The ReadStream interface is intended for buffered high data rate
+ * reading, usually from sensor devices. The type of the values being
+ * read is given as a template argument. 
+ *
+ * <p> To use this interface, allocate one or more buffers in your own
+ * space. Then, call postBuffer to pass these buffers into the
+ * device. Call read() to begin the sampling process. The buffers will
+ * be filled in the order originally posted, and a bufferDone() event
+ * will be signaled once each buffer has been filled with data. At any
+ * time while the read() is running, you may post new buffers to be
+ * filled. If the lower layer finishes signaling readDone() and then
+ * finds that no more buffers have been posted, it will consider the
+ * read to be finished, and signal readDone(). 
+ *
+ * <p>
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be returned
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:31 $
+ */
+
+interface ReadStream<val_t> {
+  /**
+   * Passes a buffer to the device, and indicates how many values
+   * should be placed into the buffer. Make sure your count doesn't
+   * overrun the buffer.
+   *
+   * @param 'val_t* COUNT(count) buf' a pointer to the buffer
+   * @param count the number of values the buffer should hold
+   *
+   * @return SUCCESS if the post was successful
+   */
+  command error_t postBuffer(val_t* buf, uint16_t count);
+
+  /**
+   * Directs the device to start filling buffers by sampling with the
+   * specified period. 
+   * 
+   * @param usPeriod the between-sample period in microseconds
+   * 
+   * @return SUCCESS if the reading process began
+   */
+  command error_t read(uint32_t usPeriod);
+
+  /**
+   * Signalled when a previously posted buffer has been filled by the
+   * device. In the event of a read error, result will not equal
+   * SUCCESS, and the buffer will be filled with zeroes.
+   *
+   * @param result SUCCESS if the buffer was filled without errors
+   * @param 'val_t* COUNT(count) buf' a pointer to the buffer that has been filled
+   * @param count the number of values actually read
+   */
+  event void bufferDone(error_t result, 
+			 val_t* buf, uint16_t count);
+
+  /**
+   * Signalled when a buffer has been filled but no more buffers have
+   * been posted. In the event of a read error, all previously posted
+   * buffers will have their bufferDone() event signalled, and then
+   * this event will be signalled with a non-SUCCESS argument.
+   *
+   * @param result SUCCESS if all buffers were filled without errors
+   * @param usActualPeriod Actual sampling period used - may be different
+   *   from period requested at read time. Undefined if result != SUCCESS.
+   */
+  event void readDone(error_t result, uint32_t usActualPeriod);
+}    
+
diff --git a/tos/interfaces/Receive.nc b/tos/interfaces/Receive.nc
new file mode 100644
index 00000000..8625c902
--- /dev/null
+++ b/tos/interfaces/Receive.nc
@@ -0,0 +1,80 @@
+// $Id: Receive.nc,v 1.8 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * The basic message reception interface. 
+ *
+ * @author Philip Levis
+ * @date   November 16, 2004
+ * @see    Packet
+ * @see    Send
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+
+#include <TinyError.h>
+#include <message.h>
+
+interface Receive {
+
+  /**
+   * Receive a packet buffer, returning a buffer for the signaling
+   * component to use for the next reception. The return value
+   * can be the same as <tt>msg</tt>, as long as the handling
+   * component copies out the data it needs.
+   *
+   * <b>Note</b> that misuse of this interface is one of the most
+   * common bugs in TinyOS code. For example, if a component both calls a
+   * send on the passed message and returns it, then it is possible
+   * the buffer will be reused before the send occurs, overwriting
+   * the component's data. This would cause the mote to possibly
+   * instead send a packet it most recently received.
+   *
+   * @param  'message_t* ONE msg'        the receied packet
+   * @param  'void* COUNT(len) payload'  a pointer to the packet's payload
+   * @param  len      the length of the data region pointed to by payload
+   * @return 'message_t* ONE'              a packet buffer for the stack to use for the next
+   *                  received packet.
+   */
+  
+  event message_t* receive(message_t* msg, void* payload, uint8_t len);
+  
+}
diff --git a/tos/interfaces/Resource.nc b/tos/interfaces/Resource.nc
new file mode 100644
index 00000000..1e41b2ca
--- /dev/null
+++ b/tos/interfaces/Resource.nc
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about this interface and its
+ * intended use.<br><br>
+ *
+ * The Resource interface can be used to gain access to
+ * shared resources.  It is always offered as a parameterized
+ * interface, and its users gain access to the resource through some
+ * predefined arbitration policy.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.6 $
+ * @date $Date: 2010-06-29 22:07:46 $
+ */
+
+interface Resource {
+  /**
+   * Request access to a shared resource. You must call release()
+   * when you are done with it.
+   *
+   * @return SUCCESS When a request has been accepted. The granted()
+   *                 event will be signaled once you have control of the
+   *                 resource.<br>
+   *         EBUSY You have already requested this resource and a
+   *               granted event is pending
+   */
+  async command error_t request();
+
+  /**
+  * Request immediate access to a shared resource. You must call release()
+  * when you are done with it.
+  *
+  * @return SUCCESS When a request has been accepted. <br>
+  *            FAIL The request cannot be fulfilled
+  */
+  async command error_t immediateRequest();
+
+  /**
+   * You are now in control of the resource.
+   */
+  event void granted();
+   
+  /**
+  * Release a shared resource you previously acquired.  
+  *
+  * @return SUCCESS The resource has been released <br>
+  *         FAIL You tried to release but you are not the
+  *              owner of the resource 
+  *
+  * @note This command should never be called between putting in a request 	  
+  *       and waiting for a granted event.  Doing so will result in a
+  *       potential race condition.  There are ways to guarantee that no
+  *       race will occur, but they are clumsy and overly complicated.
+  *       Since it doesn't logically make since to be calling
+  *       <code>release</code> before receiving a <code>granted</code> event, 
+  *       we have opted to keep thing simple and warn you about the potential 
+  *       race.
+  */
+  async command error_t release();
+
+  /**
+   *  Check if the user of this interface is the current
+   *  owner of the Resource
+   *  @return TRUE  It is the owner <br>
+   *             FALSE It is not the owner
+   */
+  async command bool isOwner();
+}
diff --git a/tos/interfaces/ResourceConfigure.nc b/tos/interfaces/ResourceConfigure.nc
new file mode 100644
index 00000000..5fc3e63f
--- /dev/null
+++ b/tos/interfaces/ResourceConfigure.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-06-29 22:07:46 $ 
+ * ======================================================================== 
+ *
+ */
+ 
+ /**
+ * Please refer to TEP 108 for more information about this interface and its
+ * intended use.<br><br>
+ * 
+ * This interface is provided by a Resource arbiter in order to allow
+ * users of a shared resource to configure that resource just before being
+ * granted access to it.  It will always be parameterized along side 
+ * a parameterized Resource interface, with the ids from one mapping directly
+ * onto the ids of the other.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+
+interface ResourceConfigure {
+  /**
+   * Used to configure a resource just before being granted access to it.
+   * Must always be used in conjuntion with the Resource interface.
+   */
+  async command void configure();
+
+  /**
+   * Used to unconfigure a resource just before releasing it.
+   * Must always be used in conjuntion with the Resource interface.
+   */
+  async command void unconfigure();
+} 
diff --git a/tos/interfaces/ResourceDefaultOwner.nc b/tos/interfaces/ResourceDefaultOwner.nc
new file mode 100644
index 00000000..518b0c9d
--- /dev/null
+++ b/tos/interfaces/ResourceDefaultOwner.nc
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2005, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about this interface and its
+ * intended use.<br><br>
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.edu)
+ * @version $ $
+ * @date $Date: 2007-02-04 20:06:42 $ 
+ */
+
+interface ResourceDefaultOwner {
+  /**
+   * Event sent to the resource controller giving it control whenever a resource
+   * goes idle. That is to say, whenever no one currently owns the resource,
+   * and there are no more pending requests
+  */
+  async event void granted();
+
+  /**
+  * Release control of the resource
+  *
+  * @return SUCCESS The resource has been released and pending requests
+  *                 can resume. <br>
+  *             FAIL You tried to release but you are not the
+  *                  owner of the resource
+  */
+  async command error_t release();
+
+  /**
+   *  Check if the user of this interface is the current
+   *  owner of the Resource
+   * 
+   *  @return TRUE  It is the owner <br>
+   *          FALSE It is not the owner
+   */
+  async command bool isOwner();
+
+  /**
+   * This event is signalled whenever the user of this interface
+   * currently has control of the resource, and another user requests
+   * it through the Resource.request() command. You may want to
+   * consider releasing a resource based on this event
+   */
+  async event void requested();
+
+  /**
+  * This event is signalled whenever the user of this interface
+  * currently has control of the resource, and another user requests
+  * it through the Resource.immediateRequest() command. You may
+  * want to consider releasing a resource based on this event
+  */
+  async event void immediateRequested();
+}
diff --git a/tos/interfaces/ResourceQueue.nc b/tos/interfaces/ResourceQueue.nc
new file mode 100644
index 00000000..b042ee12
--- /dev/null
+++ b/tos/interfaces/ResourceQueue.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  A queue interface for managing client ids when performing resource 
+ *  arbitration. A single slot in the queue is guaranteed to each resource
+ *  client, with the actual queing policy determined by the implementation
+ *  of the interface.
+ *
+ *  @author Kevin Klues <klueska@cs.wustl.edu>
+ *  @date   $Date: 2010-06-29 22:07:46 $
+ */
+ 
+#include "Resource.h"
+   
+interface ResourceQueue {
+	
+  /**
+   * Check to see if the queue is empty.
+   *
+   * @return TRUE  if the queue is empty. <br>
+   *         FALSE if there is at least one entry in the queue
+   */
+  async command bool isEmpty();
+  
+  /**
+   * Check to see if a given client id has already been enqueued
+   * and is waiting to be processed.
+   *
+   * @return TRUE  if the client id is in the queue. <br>
+   *         FALSE if it does not
+   */
+  async command bool isEnqueued(resource_client_id_t id);
+  
+  /**
+   * Retreive the client id of the next resource in the queue. 
+   * If the queue is empty, the return value is undefined.
+   *
+   * @return The client id at the head of the queue.
+   */
+  async command resource_client_id_t dequeue();
+
+  /**
+   * Enqueue a client id
+   *
+   * @param clientId - the client id to enqueue
+   * @return SUCCESS if the client id was enqueued successfully <br>
+   *         EBUSY   if it has already been enqueued.
+   */
+  async command error_t enqueue(resource_client_id_t id);
+}
diff --git a/tos/interfaces/ResourceRequested.nc b/tos/interfaces/ResourceRequested.nc
new file mode 100644
index 00000000..6736143f
--- /dev/null
+++ b/tos/interfaces/ResourceRequested.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about this interface and its
+ * intended use.<br><br>
+ *
+ * The ResourceRequested interface can be used in conjunction with the 
+ * Resource interface in order to receive events based on other users
+ * requests.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.5 $
+ * @date $Date: 2010-06-29 22:07:46 $
+ */
+
+interface ResourceRequested {
+  /**
+   * This event is signalled whenever the user of this interface
+   * currently has control of the resource, and another user requests
+   * it through the Resource.request() command. You may want to
+   * consider releasing a resource based on this event
+  */
+  async event void requested();
+
+  /**
+  * This event is signalled whenever the user of this interface
+  * currently has control of the resource, and another user requests
+  * it through the Resource.immediateRequest() command. You may
+  * want to consider releasing a resource based on this event
+  */
+  async event void immediateRequested();
+}
diff --git a/tos/interfaces/Scheduler.nc b/tos/interfaces/Scheduler.nc
new file mode 100644
index 00000000..cab8465a
--- /dev/null
+++ b/tos/interfaces/Scheduler.nc
@@ -0,0 +1,74 @@
+// $Id: Scheduler.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** 
+  * The interface to a TinyOS task scheduler.
+  *
+  * @author Philip Levis
+  * @date   January 19 2005
+  * @see TEP 106: Tasks and Schedulers
+  * @see TEP 107: Boot Sequence
+  */ 
+
+
+interface Scheduler {
+
+  /** 
+   * Initialize the scheduler.
+   */
+  command void init();
+
+  /** 
+    * Run the next task if one is waiting, otherwise return immediately. 
+    *
+    * @return        whether a task was run -- TRUE indicates a task
+    *                ran, FALSE indicates there was no task to run.
+    */
+  command bool runNextTask();
+
+  /**
+   * Enter an infinite task-running loop. Put the MCU into a low power
+   * state when the processor is idle (task queue empty, waiting for
+   * interrupts). This call never returns.
+   */
+  command void taskLoop();
+}
+
diff --git a/tos/interfaces/Send.nc b/tos/interfaces/Send.nc
new file mode 100644
index 00000000..9226da68
--- /dev/null
+++ b/tos/interfaces/Send.nc
@@ -0,0 +1,127 @@
+// $Id: Send.nc,v 1.8 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** 
+  * The basic address-free message sending interface. 
+  *
+  * @author Philip Levis
+  * @date   January 5 2005
+  * @see    Packet
+  * @see    Receive
+  */ 
+
+
+#include <TinyError.h>
+#include <message.h>
+
+interface Send {
+
+  /** 
+    * Send a packet with a data payload of <tt>len</tt>. To determine
+    * the maximum available size, use the Packet interface of the
+    * component providing Send. If send returns SUCCESS, then the
+    * component will signal the sendDone event in the future; if send
+    * returns an error, it will not signal sendDone.  Note that a
+    * component may accept a send request which it later finds it
+    * cannot satisfy; in this case, it will signal sendDone with an
+    * appropriate error code.
+    *
+    * @param   'message_t* ONE msg'     the packet to send
+    * @param   len     the length of the packet payload
+    * @return          SUCCESS if the request was accepted and will issue
+    *                  a sendDone event, EBUSY if the component cannot accept
+    *                  the request now but will be able to later, FAIL
+    *                  if the stack is in a state that cannot accept requests
+    *                  (e.g., it's off).
+    */ 
+  command error_t send(message_t* msg, uint8_t len);
+
+  /**
+    * Cancel a requested transmission. Returns SUCCESS if the 
+    * transmission was cancelled properly (not sent in its
+    * entirety). Note that the component may not know
+    * if the send was successfully cancelled, if the radio is
+    * handling much of the logic; in this case, a component
+    * should be conservative and return an appropriate error code.
+    *
+    * @param   'message_t* ONE msg'    the packet whose transmission should be cancelled
+    * @return         SUCCESS if the packet was successfully cancelled, FAIL
+    *                 otherwise
+    */
+  command error_t cancel(message_t* msg);
+
+  /** 
+    * Signaled in response to an accepted send request. <tt>msg</tt>
+    * is the sent buffer, and <tt>error</tt> indicates whether the
+    * send was succesful, and if not, the cause of the failure.
+    * 
+    * @param 'message_t* ONE msg'   the message which was requested to send
+    * @param error SUCCESS if it was transmitted successfully, FAIL if
+    *              it was not, ECANCEL if it was cancelled via <tt>cancel</tt>
+    */ 
+  event void sendDone(message_t* msg, error_t error);
+
+   /**
+   * Return the maximum payload length that this communication layer
+   * can provide. This command behaves identically to
+   * <tt>Packet.maxPayloadLength</tt> and is included in this
+   * interface as a convenience.
+   *
+   * @return  the maximum payload length
+   */
+
+  
+  command uint8_t maxPayloadLength();
+
+
+   /**
+    * Return a pointer to a protocol's payload region in a packet which
+    * at least a certain length.  If the payload region is smaller than
+    * the len parameter, then getPayload returns NULL. This command
+    * behaves identicallt to <tt>Packet.getPayload</tt> and is
+    * included in this interface as a convenience.
+    *
+    * @param   'message_t* ONE msg'    the packet
+    * @return  'void* COUNT_NOK(len)'  a pointer to the packet's payload
+    */
+  command void* getPayload(message_t* msg, uint8_t len);
+
+}
diff --git a/tos/interfaces/SendNotifier.nc b/tos/interfaces/SendNotifier.nc
new file mode 100644
index 00000000..c70a84ef
--- /dev/null
+++ b/tos/interfaces/SendNotifier.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/** 
+ * The radio stack notifies the entire system that it is about to send
+ * a packet.  Other modules in the system can call back within this event
+ * to modify the packet's metadata. For example, we can setup a module
+ * in the system to make every CTP data packet send with low power listening
+ * enabled:
+ *
+ *   event void SendNotifier.aboutToSend[AM_COLLECTION_DATA](uint8_t dest,
+ *       message_t *msg) {
+ *     call LowPowerListening.setRxSleepInterval(msg, 512);
+ *   }
+ * 
+ * @author David Moss
+ */
+
+#include "message.h"
+#include "AM.h"
+
+interface SendNotifier {
+
+  /**
+   * The system is about to send this message. Fill in any last modifications
+   * and the message will be sent.
+   * 
+   * @param dest The destination address of the messsage
+   * @param 'message_t* ONE msg' The message about to be transmitted
+   */
+  event void aboutToSend(am_addr_t dest, message_t *msg);
+  
+}
diff --git a/tos/interfaces/Set.nc b/tos/interfaces/Set.nc
new file mode 100644
index 00000000..004d2e99
--- /dev/null
+++ b/tos/interfaces/Set.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The Set interface is intended for synchronous writing of small
+ * values. The type of the value is given as a template
+ * argument. Generally, these values are backed by memory or
+ * computation. Because no error code is included, the set() call must
+ * be guaranteed to succeed.
+ *
+ * <p>
+ * See TEP114 - SIDs: Source and Sink Independent Drivers for details.
+ * 
+ * @param val_t the type of the object that will be stored
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:15 $
+ */
+
+interface Set<val_t> {
+  /**
+   * Stores a value of type val_t.
+   *
+   * @param val the value to be stored
+   */
+  command void set( val_t val );
+}
diff --git a/tos/interfaces/SetNow.nc b/tos/interfaces/SetNow.nc
new file mode 100644
index 00000000..25972529
--- /dev/null
+++ b/tos/interfaces/SetNow.nc
@@ -0,0 +1,55 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-06-10 14:41:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * Similar to the <tt>Set</tt> interface (see TEP 114) this interface can be
+ * used for storing small values, but in contrast to the <tt>Set</tt> interface
+ * the value is stored asynchronously.
+ *
+ * @param data_type the type of the object that will be stored
+ */
+
+interface SetNow<data_type> 
+{
+  /**
+   * Stores a value of type <tt>data_type</tt>.
+   *
+   * @param val the value to be stored
+   * @return SUCCESS if the value was stored,
+   *         FAIL otherwise
+   */
+  async command error_t setNow(data_type val);
+}
+
diff --git a/tos/interfaces/SpiByte.nc b/tos/interfaces/SpiByte.nc
new file mode 100644
index 00000000..da3bea12
--- /dev/null
+++ b/tos/interfaces/SpiByte.nc
@@ -0,0 +1,46 @@
+// $Id: SpiByte.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $
+
+/*                                                                      
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Jonathan Hui
+ * @author Joe Polastre
+ */
+interface SpiByte
+{
+  /**
+   * Synchronous transmit and receive (can be in interrupt context)
+   * @param tx Byte to transmit
+   * @param rx Received byte is stored here.
+   */
+  async command uint8_t write( uint8_t tx );
+}
diff --git a/tos/interfaces/SpiPacket.nc b/tos/interfaces/SpiPacket.nc
new file mode 100644
index 00000000..a5c508e3
--- /dev/null
+++ b/tos/interfaces/SpiPacket.nc
@@ -0,0 +1,85 @@
+// $Id: SpiPacket.nc,v 1.8 2010-06-29 22:07:46 scipio Exp $
+
+/*                                                                      
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SPI Packet/buffer interface for sending data over an SPI bus.  This
+ * interface provides a split-phase send command which can be used for
+ * sending, receiving or both. It is a "send" command because reading
+ * from the SPI requires writing bytes. The send call allows NULL
+ * parameters for receive or send only operations. This interface is
+ * for buffer based transfers where the microcontroller is the master
+ * (clocking) device.
+ *
+ * Often, an SPI bus must first be acquired using a Resource interface
+ * before sending commands with SPIPacket. In the case of multiple
+ * devices attached to a single SPI bus, chip select pins are often also
+ * used.
+ *
+ * @author Philip Levis
+ * @author Jonathan Hui
+ * @author Joe Polastre
+ * Revision:  $Revision: 1.8 $
+ */
+interface SpiPacket {
+
+  /**
+   * Send a message over the SPI bus.
+   *
+   * @param 'uint8_t* COUNT_NOK(len) txBuf' A pointer to the buffer to send over the bus. If this
+   *              parameter is NULL, then the SPI will send zeroes.
+   * @param 'uint8_t* COUNT_NOK(len) rxBuf' A pointer to the buffer where received data should
+   *              be stored. If this parameter is NULL, then the SPI will
+   *              discard incoming bytes.
+   * @param len   Length of the message.  Note that non-NULL rxBuf and txBuf
+   *              parameters must be AT LEAST as large as len, or the SPI
+   *              will overflow a buffer.
+   *
+   * @return SUCCESS if the request was accepted for transfer
+   */
+  async command error_t send( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len );
+
+  /**
+   * Notification that the send command has completed.
+   *
+   * @param 'uint8_t* COUNT_NOK(len) txBuf' The buffer used for transmission
+   * @param 'uint8_t* COUNT_NOK(len) rxBuf' The buffer used for reception
+   * @param len    The request length of the transfer, but not necessarily
+   *               the number of bytes that were actually transferred
+   * @param error  SUCCESS if the operation completed successfully, FAIL
+   *               otherwise
+   */
+  async event void sendDone( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len,
+                             error_t error );
+
+}
diff --git a/tos/interfaces/SplitControl.nc b/tos/interfaces/SplitControl.nc
new file mode 100644
index 00000000..4f5147c5
--- /dev/null
+++ b/tos/interfaces/SplitControl.nc
@@ -0,0 +1,139 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-06-29 22:07:46 $ 
+ * ======================================================================== 
+ */ 
+
+/**
+ * Please refer to TEP 115 for more information about this interface and its
+ * intended use.<br><br>
+ *
+ * This is the split-phase counterpart to the StdContol interface.  It
+ * should be used for switching between the on and off power states of
+ * the component providing it.  For each <code>start()</code> or
+ * <code>stop()</code> command, if the command returns SUCCESS, then a
+ * corresponding  <code>startDone()</code> or <code>stopDone()</code> event
+ * must be signalled.
+ *
+ * @author Joe Polastre
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+
+interface SplitControl
+{
+  /**
+   * Start this component and all of its subcomponents.  Return
+   * values of SUCCESS will always result in a <code>startDone()</code>
+   * event being signalled.
+   *
+   * @return SUCCESS if the device is already in the process of 
+   *         starting or the device was off and the device is now ready to turn 
+   *         on.  After receiving this return value, you should expect a 
+   *         <code>startDone</code> event in the near future.<br>
+   *         EBUSY if the component is in the middle of powering down
+   *               i.e. a <code>stop()</code> command has been called,
+   *               and a <code>stopDone()</code> event is pending<br>
+   *         EALREADY if the device is already on <br>
+   *         FAIL Otherwise
+   */
+  command error_t start();
+
+  /** 
+   * Notify caller that the component has been started and is ready to
+   * receive other commands.
+   *
+   * @param <b>error</b> -- SUCCESS if the component was successfully
+   *                        turned on, FAIL otherwise
+   */
+  event void startDone(error_t error);
+
+  /**
+   * Start this component and all of its subcomponents.  Return
+   * values of SUCCESS will always result in a <code>startDone()</code>
+   * event being signalled.
+   *
+   * @return SUCCESS if the device is already in the process of 
+   *         stopping or the device was on and the device is now ready to turn 
+   *         off.  After receiving this return value, you should expect a 
+   *         <code>stopDone</code> event in the near future.<br>
+   *         EBUSY if the component is in the middle of powering up
+   *               i.e. a <code>start()</code> command has been called,
+   *               and a <code>startDone()</code> event is pending<br>
+   *         EALREADY if the device is already off <br>
+   *         FAIL Otherwise
+   */
+  command error_t stop();
+
+  /**
+   * Notify caller that the component has been stopped.
+   *
+  * @param <b>error</b> -- SUCCESS if the component was successfully
+  *                        turned off, FAIL otherwise
+   */
+  event void stopDone(error_t error);
+}
diff --git a/tos/interfaces/State.nc b/tos/interfaces/State.nc
new file mode 100644
index 00000000..bbf1f1c3
--- /dev/null
+++ b/tos/interfaces/State.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+
+/**
+ * State machine interface
+ * @author David Moss - dmm@rincon.com
+ */
+ 
+interface State {
+
+  /**
+   * This will allow a state change so long as the current
+   * state is S_IDLE.
+   * @return SUCCESS if the state is change, FAIL if it isn't
+   */
+  async command error_t requestState(uint8_t reqState);
+  
+  /**
+   * Force the state machine to go into a certain state,
+   * regardless of the current state it's in.
+   */
+  async command void forceState(uint8_t reqState);
+  
+  /**
+   * Set the current state back to S_IDLE
+   */
+  async command void toIdle();
+  
+  /**
+   * @return TRUE if the state machine is in S_IDLE
+   */
+  async command bool isIdle();
+  
+  /**
+   * @return TRUE if the state machine is in the given state
+   */
+  async command bool isState(uint8_t myState);
+  
+  /**
+   * Get the current state
+   */
+  async command uint8_t getState();
+
+}
diff --git a/tos/interfaces/StdControl.nc b/tos/interfaces/StdControl.nc
new file mode 100644
index 00000000..c78dd5b8
--- /dev/null
+++ b/tos/interfaces/StdControl.nc
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-06-29 22:07:46 $ 
+ * ======================================================================== 
+ */
+
+/**
+ * Please refer to TEP 115 for more information about this interface and its
+ * intended use.<br><br>
+ *
+ * This interface is used to switch between
+ * the on and off power states of the component providing it.  A call to the
+ * <code>start()</code> command is a request to switch a component into the
+ * on state, and a call to the <code>stop()</code> is a request to switch a
+ * component into the off state.
+ *
+ * @author Joe Polastre
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+
+interface StdControl
+{
+  /**
+   * Start this component and all of its subcomponents.
+   *
+   * @return SUCCESS if the component was either already on or was 
+   *         successfully turned on<br>
+   *         FAIL otherwise
+   */
+  command error_t start();
+
+  /**
+   * Stop the component and any pertinent subcomponents (not all
+   * subcomponents may be turned off due to wakeup timers, etc.).
+   *
+   * @return SUCCESS if the component was either already off or was 
+   *         successfully turned off<br>
+   *         FAIL otherwise
+   */
+  command error_t stop();
+}
diff --git a/tos/interfaces/SystemLowPowerListening.nc b/tos/interfaces/SystemLowPowerListening.nc
new file mode 100644
index 00000000..d64bcca2
--- /dev/null
+++ b/tos/interfaces/SystemLowPowerListening.nc
@@ -0,0 +1,8 @@
+interface SystemLowPowerListening
+{
+  command void setDefaultRemoteWakeupInterval(uint16_t intervalMs);
+  command void setDelayAfterReceive(uint16_t intervalMs);
+
+  command uint16_t getDefaultRemoteWakeupInterval();
+  command uint16_t getDelayAfterReceive();
+}
diff --git a/tos/interfaces/TaskBasic.nc b/tos/interfaces/TaskBasic.nc
new file mode 100644
index 00000000..622b66f4
--- /dev/null
+++ b/tos/interfaces/TaskBasic.nc
@@ -0,0 +1,77 @@
+// $Id: TaskBasic.nc,v 1.6 2010-06-29 22:07:46 scipio Exp $
+/*
+ * Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+  * The basic TinyOS task interface. Components generally do not wire to
+  * this interface: the nesC compiler handles it automatically through the
+  * <tt>post</tt> and <tt>task</tt> keywords.
+  *
+  * @author Philip Levis
+  * @date   January 12, 2005
+  * @see    TEP 106: Tasks and Schedulers
+  */ 
+
+
+#include "TinyError.h"
+
+interface TaskBasic {
+
+  /**
+   * Post this task to the TinyOS scheduler. At some later time,
+   * depending on the scheduling policy, the scheduler will signal the
+   * <tt>run()</tt> event. 
+   *
+   * @return SUCCESS if task was successfuly
+   * posted; the semantics of a non-SUCCESS return value depend on the
+   * implementation of this interface (the class of task).
+   */
+  
+  async command error_t postTask();
+
+  /**
+   * Event from the scheduler to run this task. Following the TinyOS
+   * concurrency model, the codes invoked from <tt>run()</tt> signals
+   * execute atomically with respect to one another, but can be
+   * preempted by async commands/events.
+   */
+  event void runTask();
+}
+
diff --git a/tos/interfaces/TimeSyncAMSend.nc b/tos/interfaces/TimeSyncAMSend.nc
new file mode 100644
index 00000000..d4deb0bd
--- /dev/null
+++ b/tos/interfaces/TimeSyncAMSend.nc
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+  * @author Philip Levis
+  * @author Miklos Maroti
+  *
+  * @see TimeSyncPacket
+  */
+
+#include <TinyError.h>
+#include <message.h>
+#include <AM.h>
+
+interface TimeSyncAMSend<precision_tag, size_type>
+{
+	/**
+	* This command sends a regular message just like <tt>AMSend.send</tt>, but
+	* it also performs sender-receiver time synchronization. The <tt>event_time</tt>
+	* parameter holds the time of some event as expressed in the local clock of
+	* the sender. The receiver can obtain the time of this event (expressed in its
+	* own local time) via the <tt>TimeSyncPacket</tt> interface.
+	*
+	* @param addr         address to which to send the packet
+	* @param msg          the packet
+	* @param len          the length of the data in the packet payload
+	* @param event_time	  the synchronization point to be transfered with the message
+	* @return             SUCCESS if the request to send succeeded and a
+	*                     sendDone will be signaled later, EBUSY if the
+	*                     abstraction cannot send now but will be able to
+	*                     later, or FAIL if the communication layer is not
+	*                     in a state that can send (e.g., off).
+  * @see sendDone
+	*/
+  command error_t send(am_addr_t addr, message_t* msg, uint8_t len, size_type event_time);
+
+	/**
+	* Cancel a requested transmission. Returns SUCCESS if the
+	* transmission was canceled properly (not sent in its
+	* entirety). Note that the component may not know
+	* if the send was successfully canceled, if the radio is
+	* handling much of the logic; in this case, a component
+	* should be conservative and return an appropriate error code.
+	* A successful call to cancel must always result in a
+	* sendFailed event, and never a sendSucceeded event.
+	*
+	* @param  msg     the packet whose transmission should be cancelled.
+	* @return SUCCESS if the transmission was cancelled, FAIL otherwise.
+	* @see    sendDone
+	*/
+	command error_t cancel(message_t* msg);
+
+	/**
+	* Signaled in response to an accepted send request. <tt>msg</tt> is
+	* the message buffer sent, and <tt>error</tt> indicates whether
+	* the send was successful.
+	*
+	* @param  msg   the packet which was submitted as a send request
+	* @param  error SUCCESS if it was sent successfully, FAIL if it was not,
+	*               ECANCEL if it was cancelled
+	* @see send
+	* @see cancel
+	*/
+	event void sendDone(message_t* msg, error_t error);
+
+	/**
+	* Return the maximum payload length that this communication layer
+	* can provide. This command behaves identically to
+	* <tt>Packet.maxPayloadLength</tt> and is included in this
+	* interface as a convenience.
+	*
+	* @return the maximum payload length
+	*/
+	command uint8_t maxPayloadLength();
+
+	/**
+	* Return a pointer to a protocol's payload region in a packet.
+	* This command behaves identically to <tt>Packet.getPayload</tt>
+	* (minus the length parameter) and is included in this interface
+	* as a convenience.
+	*
+	* @param  msg    the packet
+	* @return        the payload of the packet
+	*/
+	command void* getPayload(message_t* msg, uint8_t len);
+}
diff --git a/tos/interfaces/TimeSyncPacket.nc b/tos/interfaces/TimeSyncPacket.nc
new file mode 100644
index 00000000..e5bfe412
--- /dev/null
+++ b/tos/interfaces/TimeSyncPacket.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface TimeSyncPacket<precision_tag, size_type>
+{
+	/**
+	 * Returns TRUE if the value returned by <tt>getTime</tt> can be trusted.
+	 * Under certain circumstances the received message cannot be properly
+	 * time stamped, so the sender-receiver synchronization cannot be finished
+	 * on the receiver side. In this case, this command returns FALSE.
+	 * This command MUST BE called only on the receiver side and only for
+	 * messages transmitted via the TimeSyncSend interface. It is recommended
+	 * that this command be called from the receive event handler.
+	 */
+	command bool isValid(message_t* msg);
+
+	/**
+	 * This command should be called by the receiver of a message. The time
+	 * of the synchronization event is returned as expressed in the local
+	 * clock of the caller. This command MUST BE called only on the receiver
+	 * side and only for messages transmitted via the TimeSyncSend interface.
+	 * It is recommended that this command be called from the receive event
+	 * handler.
+	 */
+	command size_type eventTime(message_t* msg);
+}
diff --git a/tos/interfaces/UartByte.nc b/tos/interfaces/UartByte.nc
new file mode 100644
index 00000000..4263917b
--- /dev/null
+++ b/tos/interfaces/UartByte.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:35 $
+ */
+
+interface UartByte {
+
+  /**
+   * Send a single uart byte. The call blocks until it is ready to
+   * accept another byte for sending.
+   *
+   * @param byte The byte to send.
+   * @return SUCCESS if byte was sent, FAIL otherwise.
+   */
+  async command error_t send( uint8_t byte );
+
+  /**
+   * Receive a single uart byte. The call blocks until a byte is
+   * received.
+   *
+   * @param 'uint8_t* ONE byte' Where to place received byte.
+   * @param timeout How long in byte times to wait.
+   * @return SUCCESS if a byte was received, FAIL if timed out.
+   */
+  async command error_t receive( uint8_t* byte, uint8_t timeout );
+
+}
diff --git a/tos/interfaces/UartControl.nc b/tos/interfaces/UartControl.nc
new file mode 100644
index 00000000..60f27d71
--- /dev/null
+++ b/tos/interfaces/UartControl.nc
@@ -0,0 +1,120 @@
+/* $Id: UartControl.nc,v 1.2 2009-09-14 00:25:59 scipio Exp $ */
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  A hardware-independent (HIL) interface for configuring a UART.
+ *  Allows setting speed, parity bits, stop bits, and duplex mode.
+ *  Parameters are generally TinyOS enum constants, defined within a 
+ *  chip's header files, such that using an unsupported setting
+ *  will reference an undefined constant and lead to a compilation
+ *  error.
+ *
+ *  @author Philip Levis
+ *  @date   $Date: 2009-09-14 00:25:59 $
+ */
+
+
+interface UartControl {
+
+  /** Set the UART speed for both reception and transmission.
+    * This command should be called only when both reception
+    * and transmission are disabled, either through a power interface
+    * or setDuplexMode(). The parameter is a constant of the
+    * form TOS_UART_XX, where XX is the speed, such as 
+    * TOS_UART_57600. Different platforms support different speeds.
+    * A compilation error on the constant indicates the platform
+    * does not support that speed.
+    *
+    *  @param speed The UART speed to change to.
+    */
+  async command error_t setSpeed(uart_speed_t speed);
+
+  /**
+    * Returns the current UART speed. 
+    */
+  async command uart_speed_t speed();
+
+  /**
+    * Set the duplex mode of the UART. Valid modes are
+    * TOS_UART_OFF, TOS_UART_RONLY, TOS_UART_TONLY, and
+    * TOS_UART_DUPLEX. Some platforms may support only
+    * a subset of these modes: trying to use an unsupported
+    * mode is a compile-time error. The duplex mode setting
+    * affects what kinds of interrupts the UART will issue.
+    *
+    *  @param duplex The duplex mode to change to.
+    */
+  async command error_t setDuplexMode(uart_duplex_t duplex);
+
+  /**
+    * Return the current duplex mode. 
+    */
+  async command uart_duplex_t duplexMode();
+
+  /**
+    * Set whether UART bytes have even parity bits, odd
+    * parity bits, or no parity bits. This command should
+    * only be called when both the receive and transmit paths
+    * are disabled, either through a power control interface
+    * or setDuplexMode. Valid parity settings are
+    * TOS_UART_PARITY_NONE, TOS_UART_PARITY_EVEN, 
+    * and TOS_UART_PARITY_ODD.
+    *
+    *  @param parity The parity mode to change to.
+    */
+
+  async command error_t setParity(uart_parity_t parity);
+
+  /**
+    * Return the current parity mode.
+    */
+  async command uart_parity_t parity();
+
+  /**
+    * Enable stop bits. This command should only be called
+    * when both the receive and transmits paths are disabled,
+    * either through a power control interface or setDuplexMode.
+    */
+  async command error_t setStop();
+
+  /**
+    * Disable stop bits. This command should only be called
+    * when both the receive and transmits paths are disabled,
+    * either through a power control interface or setDuplexMode.
+    */
+  async command error_t setNoStop();
+
+  /**
+    * Returns whether stop bits are enabled.
+    */
+  async command bool stopBits();
+}
diff --git a/tos/interfaces/UartStream.nc b/tos/interfaces/UartStream.nc
new file mode 100644
index 00000000..698399ff
--- /dev/null
+++ b/tos/interfaces/UartStream.nc
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-06-04 03:00:35 $
+ */
+
+interface UartStream {
+
+  /**
+   * Begin transmission of a UART stream. If SUCCESS is returned,
+   * <code>sendDone</code> will be signalled when transmission is
+   * complete.
+   *
+   * @param 'uint8_t* COUNT(len) buf' Buffer for bytes to send.
+   * @param len Number of bytes to send.
+   * @return SUCCESS if request was accepted, FAIL otherwise.
+   */
+  async command error_t send( uint8_t* buf, uint16_t len );
+
+  /**
+   * Signal completion of sending a stream.
+   *
+   * @param 'uint8_t* COUNT(len) buf' Bytes sent.
+   * @param len Number of bytes sent.
+   * @param error SUCCESS if the transmission was successful, FAIL otherwise.
+   */
+  async event void sendDone( uint8_t* buf, uint16_t len, error_t error );
+
+  /**
+   * Enable the receive byte interrupt. The <code>receive</code> event
+   * is signalled each time a byte is received.
+   *
+   * @return SUCCESS if interrupt was enabled, FAIL otherwise.
+   */
+  async command error_t enableReceiveInterrupt();
+
+  /**
+   * Disable the receive byte interrupt.
+   *
+   * @return SUCCESS if interrupt was disabled, FAIL otherwise.
+   */
+  async command error_t disableReceiveInterrupt();
+
+  /**
+   * Signals the receipt of a byte.
+   *
+   * @param byte The byte received.
+   */
+  async event void receivedByte( uint8_t byte );
+
+  /**
+   * Begin reception of a UART stream. If SUCCESS is returned,
+   * <code>receiveDone</code> will be signalled when reception is
+   * complete.
+   *
+   * @param 'uint8_t* COUNT(len) buf' Buffer for received bytes.
+   * @param len Number of bytes to receive.
+   * @return SUCCESS if request was accepted, FAIL otherwise.
+   */
+  async command error_t receive( uint8_t* buf, uint16_t len );
+
+  /**
+   * Signal completion of receiving a stream.
+   *
+   * @param 'uint8_t* COUNT(len) buf' Buffer for bytes received.
+   * @param len Number of bytes received.
+   * @param error SUCCESS if the reception was successful, FAIL otherwise.
+   */
+  async event void receiveDone( uint8_t* buf, uint16_t len, error_t error );
+
+}
diff --git a/tos/lib/byte_radio/ChannelMonitor.nc b/tos/lib/byte_radio/ChannelMonitor.nc
new file mode 100644
index 00000000..208956ba
--- /dev/null
+++ b/tos/lib/byte_radio/ChannelMonitor.nc
@@ -0,0 +1,67 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+ 
+ /**
+ * 
+ * This interface is an abstraction of Clear Channel Assessment (CCA) in byte radios.
+ * It provides commands and events to perform CCA.
+ *
+ * @see ChannelMonitorControl
+ * @see ChannelMonitorData
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+interface ChannelMonitor {
+    /** 
+    * Start observing the channel.
+    * Either the event channelBusy() or channelIdle() will be indicated.
+    *
+    * @return SUCCESS on success
+    *         FAIL otherwise.
+    */
+    async command error_t start();
+
+    /**
+     *  Indicates that the channel is busy.
+     */
+    async event void channelBusy();
+
+    /** 
+     *  Indicates that the channel is idle.
+     */
+    async event void channelIdle();
+    
+    /**
+     * Tells the channel monitor that the last busy event
+     * actually indicated a message.
+     */
+    async command void rxSuccess();
+}
+
diff --git a/tos/lib/byte_radio/ChannelMonitorControl.nc b/tos/lib/byte_radio/ChannelMonitorControl.nc
new file mode 100644
index 00000000..73a00ae6
--- /dev/null
+++ b/tos/lib/byte_radio/ChannelMonitorControl.nc
@@ -0,0 +1,55 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+*/
+
+/**
+* This control interface is used by byte radio CCA components based on RSSI 
+* valid detection with a floating threshold.
+*
+* @see ChannelMonitor
+* @see ChannelMonitorData
+*
+* @author Kevin Klues (klues@tkn.tu-berlin.de)
+* @author Andreas Koepke (koepke@tkn.tu-berlin.de)
+*/
+interface ChannelMonitorControl
+{
+  /**
+  * Update the noise floor.
+  *
+  * @return SUCCESS if the noise floor can be updated
+  *         FAIL otherwise.
+  */
+  async command error_t updateNoiseFloor();
+  
+  /**
+  * Indicates that the noisefloor has been updated.
+  */
+  event void updateNoiseFloorDone();
+}
diff --git a/tos/lib/byte_radio/ChannelMonitorData.nc b/tos/lib/byte_radio/ChannelMonitorData.nc
new file mode 100644
index 00000000..c2c0b788
--- /dev/null
+++ b/tos/lib/byte_radio/ChannelMonitorData.nc
@@ -0,0 +1,88 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * This interface is used by byte radio CCA components based on RSSI 
+ * valid detection with a floating threshold.
+ *
+ * It provides commands and events to read the Signal to Noise Ratio 
+ * (SNR) and noisefloor of the radio channel.
+ *
+ * @see ChannelMonitor
+ * @see ChannelMonitorControl 
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+interface ChannelMonitorData
+{
+    /** 
+     * Sets the gradient for the conversion of mV and dB. 
+     *
+     *  @param grad This is calculated as grad = mV/dB
+     */
+    async command void setGradient(int16_t grad);
+    
+    /**
+     * Returns the currently used gradient to convert between
+     * dB and mV.
+     *
+     * @return The currently used gradient.
+     */ 
+    async command int16_t getGradient();
+
+    /** 
+     * Starts the SNR measurement 
+     * 
+     * @returns SUCCESS on success
+     *          FAIL otherwise.
+     */
+    async command error_t getSnr();
+    
+    /**
+     * Returns the SNR value in dB.
+     *
+     * @param snr The SNR value in dB.
+    */
+    async event void getSnrDone(int16_t snr);
+
+    /**
+     * try to be lucky: read anything stored as the rssi and
+     * make a crude and fast conversion to an snr value
+     */
+    async command uint16_t readSnr();
+
+    /** 
+     * Get the noisefloor in mV.
+     *
+     * @return The noisefloor in mV.
+     */
+    async command uint16_t getNoiseFloor();
+}
diff --git a/tos/lib/byte_radio/LinkLayerC.nc b/tos/lib/byte_radio/LinkLayerC.nc
new file mode 100644
index 00000000..0bed3137
--- /dev/null
+++ b/tos/lib/byte_radio/LinkLayerC.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+ /**
+ * This is the configuration for a really simple link layer.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+ */
+configuration LinkLayerC {
+   provides {
+     interface SplitControl;
+     interface Send;
+     interface Receive;
+     interface PacketAcknowledgements;
+   }
+   uses {
+     interface SplitControl as MacSplitControl;
+     interface SplitControl as RadioSplitControl;
+     interface MacSend as SendDown;
+     interface MacReceive as ReceiveLower;     
+     interface Packet;   
+   }
+}
+implementation
+{
+  components LinkLayerP as Llc,
+             MainC;
+    MainC.SoftwareInit -> Llc;
+    SplitControl = Llc;
+    MacSplitControl =  Llc.MacSplitControl;
+    RadioSplitControl =  Llc.RadioSplitControl;
+    Send = Llc.Send;
+    Receive = Llc.Receive;
+    Packet = Llc.Packet;
+    PacketAcknowledgements = Llc;    
+    ReceiveLower = Llc.ReceiveLower;
+    SendDown = Llc.SendDown;
+}
diff --git a/tos/lib/byte_radio/LinkLayerP.nc b/tos/lib/byte_radio/LinkLayerP.nc
new file mode 100644
index 00000000..abb01636
--- /dev/null
+++ b/tos/lib/byte_radio/LinkLayerP.nc
@@ -0,0 +1,257 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include "radiopacketfunctions.h"
+#include "message.h"
+#include "PacketAck.h"
+
+/**
+ * This is the implementation of a really simple link layer. 
+ *
+ * @author Andreas Koepke <koepke@tkn.tu-berlin.de>
+ */
+module LinkLayerP {
+    provides {
+      interface Init;
+      interface SplitControl;
+      interface Receive;
+      interface Send;
+      interface PacketAcknowledgements;
+    }
+    uses {
+      interface SplitControl as MacSplitControl;
+      interface SplitControl as RadioSplitControl;
+      interface MacSend as SendDown;
+      interface MacReceive as ReceiveLower;
+      interface Packet;
+    }
+}
+implementation
+{
+  /* Tx/Rx buffers & pointers */
+  message_t* txBufPtr;
+  message_t* rxBufPtr;
+  message_t  rxBuf;
+
+  /* state vars */
+  error_t splitStateError;    // state of SplitControl interfaces
+  bool rxBusy;                // blocks an incoming packet if the rxBuffer is in use
+    
+// #define LLCM_DEBUG  
+    /**************** Helper functions ******/
+    void signalFailure() {
+#ifdef LLCM_DEBUG
+        atomic {
+            for(;;) {
+                ;
+            }
+        }
+#endif
+    }
+    
+    /**************** Init  *****************/
+    command error_t Init.init(){
+        atomic {
+          rxBufPtr = &rxBuf;
+          txBufPtr = 0;
+          splitStateError = EOFF;
+          rxBusy = FALSE;
+        }
+        return SUCCESS;
+    }
+
+    /**************** Start  *****************/
+    void checkStartDone(error_t error) {
+      atomic {
+        if ( (splitStateError == SUCCESS) && (error == SUCCESS) ) {
+          signal SplitControl.startDone(SUCCESS);
+        } else if ( (error == SUCCESS) && (splitStateError == EOFF) ) {
+          splitStateError = SUCCESS;
+        } else {
+          signal SplitControl.startDone(FAIL);
+        }
+      }
+    }
+    
+    event void MacSplitControl.startDone(error_t error) {
+      checkStartDone(error);
+    }
+    
+    event void RadioSplitControl.startDone(error_t error) {
+      checkStartDone(error);
+    }
+    
+    command error_t SplitControl.start() {
+      call MacSplitControl.start();
+      call RadioSplitControl.start();
+      return SUCCESS;
+    }
+    /**************** Stop  *****************/
+    void checkStopDone(error_t error) {
+      atomic {
+        if ( (splitStateError == EOFF) && (error == SUCCESS) ) {
+          signal SplitControl.stopDone(SUCCESS);
+        } else if ( (error == SUCCESS) && (splitStateError == SUCCESS) ) {
+          splitStateError = EOFF;
+        } else {
+          signal SplitControl.stopDone(FAIL);
+        }
+      }
+    }
+    
+    event void MacSplitControl.stopDone(error_t error) {
+      checkStopDone(error);
+    }
+    
+    event void RadioSplitControl.stopDone(error_t error) {
+      checkStopDone(error);
+    }
+    
+    command error_t SplitControl.stop(){
+      call MacSplitControl.stop();
+      call RadioSplitControl.stop();
+      return SUCCESS;
+    }
+    /**************** Send ****************/
+    task void SendDoneSuccessTask() {
+      message_t* txPtr;
+      atomic txPtr = txBufPtr;
+      signal Send.sendDone(txPtr, SUCCESS);
+    }
+    task void SendDoneCancelTask() {
+      message_t* txPtr;
+      atomic txPtr = txBufPtr;
+      signal Send.sendDone(txPtr, ECANCEL); 
+    }
+    task void SendDoneFailTask() {
+      message_t* txPtr;
+      atomic txPtr = txBufPtr;
+      signal Send.sendDone(txPtr, FAIL);
+    }
+    
+    command error_t Send.send(message_t *msg, uint8_t len) {
+        if(getMetadata(msg)->ack != NO_ACK_REQUESTED) {
+            // ensure reasonable value
+            getMetadata(msg)->ack = ACK_REQUESTED;
+        }
+        return call SendDown.send(msg, len);
+    }
+
+    command error_t Send.cancel(message_t* msg) {
+      return call SendDown.cancel(msg);
+    }
+    
+    command uint8_t Send.maxPayloadLength() {
+      return call Packet.maxPayloadLength();
+    }
+
+    command void* Send.getPayload(message_t* msg, uint8_t len) {
+      return call Packet.getPayload(msg, len);
+    }
+    
+    async event void SendDown.sendDone(message_t* msg, error_t error) { 
+        atomic {
+          txBufPtr = msg;
+        }
+        if (error == SUCCESS) {
+          post SendDoneSuccessTask();
+        } else if (error == ECANCEL) {
+          post SendDoneCancelTask();
+        } else {
+          post SendDoneFailTask();
+        }
+    }
+    
+    /*************** Receive ***************/
+    task void ReceiveTask() {
+      void *payload;
+      uint8_t len;
+      message_t* tmpMsgPtr;
+      atomic {
+        len = call Packet.payloadLength(rxBufPtr);
+        payload = call Packet.getPayload(rxBufPtr, len);
+        tmpMsgPtr = rxBufPtr;
+      }
+      tmpMsgPtr = signal Receive.receive(tmpMsgPtr, payload , len);
+      atomic {
+        rxBufPtr = tmpMsgPtr;
+        rxBusy = FALSE;
+      }
+    }
+    
+    async event message_t* ReceiveLower.receiveDone(message_t* msg) {
+      message_t* msgPtr;
+      atomic {
+        if (rxBusy) {
+          msgPtr = msg;
+        }
+        else {
+          rxBusy = TRUE;
+          msgPtr = rxBufPtr;
+          rxBufPtr = msg;
+          post ReceiveTask();
+        }
+      } 
+      return msgPtr;
+    }
+
+
+    /*************** default events ***********/
+
+    /* for lazy buggers who do not want to do something with a packet */
+    default event void Send.sendDone(message_t* sent, error_t success) {
+    }
+
+    default event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+        return msg;
+    }     
+    
+    
+    /* PacketAcknowledgements interface */
+
+    async command error_t PacketAcknowledgements.requestAck(message_t* msg) {
+        getMetadata(msg)->ack = ACK_REQUESTED;
+        return SUCCESS;
+    }
+
+    async command error_t PacketAcknowledgements.noAck(message_t* msg) {
+        getMetadata(msg)->ack = NO_ACK_REQUESTED;
+        return SUCCESS;
+    }
+
+    async command bool PacketAcknowledgements.wasAcked(message_t* msg) {
+        bool rVal = FALSE;
+        if(getMetadata(msg)->ack == WAS_ACKED) rVal = TRUE;
+        return rVal;
+    }
+}
+
+
+
diff --git a/tos/lib/byte_radio/MacReceive.nc b/tos/lib/byte_radio/MacReceive.nc
new file mode 100644
index 00000000..54d7cba6
--- /dev/null
+++ b/tos/lib/byte_radio/MacReceive.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include <TinyError.h>
+#include <message.h>
+
+/**
+ * This interface is similar to the Receive interface.
+ *   
+ * The interface provides one event in async context which indicates that
+ * a packet was received. It Is provided by the MAC layer ofi
+ * a byte radio.
+ *
+ * @see Receive
+ *
+ * @author Philipp Huppertz
+ */ 
+interface MacReceive {
+
+   /**
+   * Receive a packet buffer, returning a buffer for the signaling
+   * component to use for the next reception. The return value
+   * can be the same as <tt>msg</tt>, as long as the handling
+   * component copies out the data it needs.
+   *
+   * <b>Note</b> that misuse of this interface is one of the most
+   * common bugs in TinyOS code. For example, if a component both calls a
+   * send on the passed message and returns it, then it is possible
+   * the buffer will be reused before the send occurs, overwriting
+   * the component's data. This would cause the mote to possibly
+   * instead send a packet it most recently received.
+   *
+   * @param  msg      the received packet
+   * @return          a packet buffer for the stack to use for the next
+   *                  received packet.
+   */
+  async event message_t* receiveDone(message_t* msg);
+
+}
diff --git a/tos/lib/byte_radio/MacSend.nc b/tos/lib/byte_radio/MacSend.nc
new file mode 100644
index 00000000..15479e99
--- /dev/null
+++ b/tos/lib/byte_radio/MacSend.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#include <TinyError.h>
+#include <message.h>
+ 
+/** 
+  * This interface is similar to the Send interface.
+  *
+  * It provides the same basic functionality as the Send interface in async 
+  * context. It is provided by the MAC layer of byte radios. 
+  *
+  * @see    Send
+  *
+  * @author Philipp Huppertz
+  */ 
+interface MacSend {
+
+    /** 
+    * Send a packet with a data payload of <tt>len</tt>. To determine
+    * the maximum available size, use the Packet interface of the
+    * component providing Send. If send returns SUCCESS, then the
+    * component will signal the sendDone event in the future; if send
+    * returns an error, it will not signal sendDone.  Note that a
+    * component may accept a send request which it later finds it
+    * cannot satisfy; in this case, it will signal sendDone with an
+    * appropriate error code.
+    *
+    * @param   msg     the packet to send
+    * @param   len     the length of the packet payload
+    * @return          SUCCESS if the request was accepted and will issue
+    *                  a sendDone event, EBUSY if the component cannot accept
+    *                  the request now but will be able to later, FAIL
+    *                  if the stack is in a state that cannot accept requests
+    *                  (e.g., it's off).
+    */ 
+  async command error_t send(message_t* msg, uint8_t len);
+  
+  /**
+  * Cancel a requested transmission. Returns SUCCESS if the 
+  * transmission was cancelled properly (not sent at all)
+  *
+  * @param   msg    the packet whose transmission should be cancelled
+  * @return         SUCCESS if the packet was successfully cancelled, FAIL
+  *                 otherwise
+  */
+  async command error_t cancel(message_t* msg);
+
+  /** 
+  * Signaled in response to an accepted send request. <tt>msg</tt>
+  * is the sent buffer, and <tt>error</tt> indicates whether the
+  * send was succesful, and if not, the cause of the failure.
+  * 
+  * @param msg   the message which was requested to send
+  * @param error SUCCESS if it was transmitted successfully, FAIL if
+  *              it was not, ECANCEL if it was cancelled via <tt>cancel</tt>
+  */ 
+  async event void sendDone(message_t* msg, error_t error);
+}
diff --git a/tos/lib/byte_radio/PacketAck.h b/tos/lib/byte_radio/PacketAck.h
new file mode 100644
index 00000000..fd5dd5f9
--- /dev/null
+++ b/tos/lib/byte_radio/PacketAck.h
@@ -0,0 +1,51 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * provide constants for packet ack interface
+ * - Author --------------------------------------------------------------
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#ifndef PACKET_ACK_H
+#define PACKET_ACK_H
+/*
+#define NO_ACK_REQUESTED  1
+#define WAS_ACKED  2 
+#define ACK_REQUESTED 128
+*/
+typedef enum {
+    NO_ACK_REQUESTED = 1,
+    WAS_ACKED,
+    WAS_NOT_ACKED,
+    ACK_REQUESTED = 128U
+} packet_ack_t;
+
+
+#endif
diff --git a/tos/lib/byte_radio/PacketSerializerP.nc b/tos/lib/byte_radio/PacketSerializerP.nc
new file mode 100644
index 00000000..65ed2156
--- /dev/null
+++ b/tos/lib/byte_radio/PacketSerializerP.nc
@@ -0,0 +1,227 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.9 $
+ * $Date: 2010-01-27 14:42:10 $
+ * ========================================================================
+ */
+
+#include "crc.h"
+#include "message.h"
+#include "radiopacketfunctions.h"
+
+/**
+ * This module in conjunction with the UartPhyC turns byte streams
+ * into packtes.
+ *
+ * @see UartPhyC
+ *
+ * @author Kevin Klues <klues@tkn.tu-berlin.de>
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+module PacketSerializerP {
+    provides {
+        interface PhySend;
+        interface PhyReceive;
+        interface Packet;
+        interface RadioTimeStamping;
+    }
+    uses {
+        interface RadioByteComm;
+        interface PhyPacketTx;
+        interface PhyPacketRx;
+#ifdef PACKETSERIALIZER_DEBUG
+        interface SerialDebug;
+#endif
+    }
+}
+implementation {
+    
+#ifdef PACKETSERIALIZER_DEBUG
+    void sdDebug(uint16_t p) {
+        call SerialDebug.putPlace(p);
+    }
+#else
+    void sdDebug(uint16_t p) {};
+#endif
+
+    /* Module Global Variables */
+
+    message_t rxMsg;      // rx message buffer
+    message_t *rxBufPtr = &rxMsg;  // pointer to rx buffer
+    message_t *txBufPtr = NULL;  // pointer to tx buffer
+    uint16_t crc = 0;         // CRC value of either the current incoming or outgoing packet
+    uint8_t byteCnt = 0;      // index into current datapacket
+      
+    /* Local Function Declarations */
+    void TransmitNextByte();
+    void ReceiveNextByte(uint8_t data);
+
+    typedef enum {
+        SFD_OFFSET  =  sizeof(message_header_t) - sizeof(message_radio_header_t) + 2
+    } pserializer_constants_t;
+  
+    /*- Radio Send */
+    async command error_t PhySend.send(message_t* msg, uint8_t len) {
+        atomic {
+            crc = 0;
+            txBufPtr = msg;
+            // assume "right (LSB) aligned" unions -- highly compiler and platform specific
+            byteCnt = sizeof(message_header_t) - sizeof(message_radio_header_t);
+            getHeader(msg)->length = len;
+            sdDebug(4000 + getHeader(msg)->token);
+        }
+        call PhyPacketTx.sendHeader();
+        return SUCCESS;
+    }
+  
+    async event void PhyPacketTx.sendHeaderDone() {
+        TransmitNextByte();
+    }
+
+    async event void RadioByteComm.txByteReady(error_t error) {
+        if(error == SUCCESS) {
+            TransmitNextByte();
+        } else {
+            signal PhySend.sendDone(txBufPtr, FAIL);
+        }
+    }
+
+    void TransmitNextByte() {
+        if(byteCnt < sizeof(message_header_t) + getHeader(txBufPtr)->length) {
+            // transmit the data part
+            uint8_t* buf = (uint8_t *)(txBufPtr);
+            crc = crcByte(crc, buf[byteCnt]);
+            call RadioByteComm.txByte(buf[byteCnt]);
+            byteCnt++;
+            if(byteCnt == SFD_OFFSET) {
+                signal RadioTimeStamping.transmittedSFD(0, txBufPtr);
+            }
+        }
+        else if(byteCnt == sizeof(message_header_t) + getHeader(txBufPtr)->length) {
+            call RadioByteComm.txByte(crc);
+            byteCnt++;            
+        }
+        else if(byteCnt == sizeof(message_header_t) + getHeader(txBufPtr)->length + 1) {
+            call RadioByteComm.txByte(crc >> 8);
+            byteCnt++;
+        }
+        else {
+            call PhyPacketTx.sendFooter();
+        }
+    }
+    
+    async event void PhyPacketTx.sendFooterDone() {
+        sdDebug(6000 + getHeader(txBufPtr)->token);
+        signal PhySend.sendDone((message_t*)txBufPtr, SUCCESS);
+    }
+  
+    /* Radio Receive */
+    async event void PhyPacketRx.recvHeaderDone(error_t error) {
+        if(error == SUCCESS) {
+            byteCnt = sizeof(message_header_t) - sizeof(message_radio_header_t);
+            getHeader(rxBufPtr)->length = sizeof(message_radio_header_t);
+            crc = 0;
+            signal PhyReceive.receiveDetected();
+        }
+    }
+    
+    async event void RadioByteComm.rxByteReady(uint8_t data) {
+        ReceiveNextByte(data);
+    }
+
+    async event void PhyPacketRx.recvFooterDone(error_t error) {
+        // we care about wrong crc in this layer
+        if(!getFooter(rxBufPtr)->crc) {
+            error = FAIL;
+        }
+        else {
+            
+        }
+        byteCnt = 0;
+        rxBufPtr = signal PhyReceive.receiveDone(rxBufPtr, rxBufPtr->data, getHeader(rxBufPtr)->length, error);
+    }
+    
+    /* Receive the next Byte from the USART */
+    void ReceiveNextByte(uint8_t data) {
+        uint8_t* buf = (uint8_t *)(rxBufPtr);
+        buf[byteCnt++] = data;
+        if(byteCnt <= sizeof(message_header_t) + getHeader(rxBufPtr)->length) {
+            crc = crcByte(crc, data);
+            if(byteCnt == SFD_OFFSET) {
+                signal RadioTimeStamping.receivedSFD(0);
+            }
+            else if(byteCnt == sizeof(message_header_t) + getHeader(rxBufPtr)->length) {
+                byteCnt = offsetof(message_t, footer) + offsetof(message_radio_footer_t, crc);
+            }
+            if(getHeader(rxBufPtr)->length > TOSH_DATA_LENGTH) {
+                getFooter(rxBufPtr)->crc = 0;
+                call PhyPacketRx.recvFooter();
+            }
+        }
+        else if(byteCnt >= offsetof(message_t, footer) + offsetof(message_radio_footer_t, crc) + sizeof(crc)) {
+            message_radio_footer_t* footer = getFooter(rxBufPtr);
+            footer->crc = (footer->crc == crc);
+            call PhyPacketRx.recvFooter();
+            sdDebug(5000 + getHeader(rxBufPtr)->token);
+        }
+    }
+    
+    /* Packet interface */
+      
+    command void Packet.clear(message_t* msg) {
+        memset(msg, 0, sizeof(message_t));
+    }
+
+    command uint8_t Packet.payloadLength(message_t* msg) {
+        return (getHeader(msg))->length;
+    }
+
+    command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+        getHeader(msg)->length  = len;
+    }
+    command uint8_t Packet.maxPayloadLength() {
+        return TOSH_DATA_LENGTH;
+    }
+
+    command void* Packet.getPayload(message_t* msg, uint8_t len) {
+        if (len <= TOSH_DATA_LENGTH) {
+            return (void*)msg->data;
+        }
+        else {
+            return NULL;
+        }
+    }
+  
+    // Default events for radio send/receive coordinators do nothing.
+    // Be very careful using these, or you'll break the stack.
+    default async event void RadioTimeStamping.transmittedSFD(uint16_t time, message_t* msgBuff) { }
+    default async event void RadioTimeStamping.receivedSFD(uint16_t time) { }
+}
diff --git a/tos/lib/byte_radio/PhyPacketRx.nc b/tos/lib/byte_radio/PhyPacketRx.nc
new file mode 100644
index 00000000..8a4446be
--- /dev/null
+++ b/tos/lib/byte_radio/PhyPacketRx.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:28 $
+ * ========================================================================
+ */
+ 
+/**
+ * Physical Packet Receive Interface for byte radios.
+ * Commands and events provided by the Radio Interface
+ * to communicate with upper layers about the status of a 
+ * received packet.
+ *
+ * @author Kevin Klues <klues@tkn.tu-berlin.de>
+ */ 
+interface PhyPacketRx {
+  /**
+  * Notification that a packet header was received. 
+  *
+  * @param error Will be SUCCESS if a packet header has been received FAIL
+  * otherwise.
+  */
+  async event void recvHeaderDone(error_t error);
+  
+  /**
+  * Start receiving the packet footer.
+  */
+  async command void recvFooter();
+  
+  /**
+  * Notification that the the packet footer was received.
+  *
+  * @param error Will be SUCCESS if a packet incl. footer was received.
+  * It will be FAIL if the packet was not fully received (timeout).
+  */
+  async event void recvFooterDone(error_t error);
+}
diff --git a/tos/lib/byte_radio/PhyPacketTx.nc b/tos/lib/byte_radio/PhyPacketTx.nc
new file mode 100644
index 00000000..6e56e798
--- /dev/null
+++ b/tos/lib/byte_radio/PhyPacketTx.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:28 $
+ * ========================================================================
+ */
+
+/**
+ * Physical Packet Transmission Interface for byte radios.
+ * Commands and events provided by the Physical Layer
+ * to communicate with upper layers about the status of a 
+ * packet that is being transmitted.
+ *
+ * @author Kevin Klues <klues@tkn.tu-berlin.de)>
+ */  
+ 
+interface PhyPacketTx {
+  /**
+  * Start sending a new packet header. 
+  */
+  async command void sendHeader();
+  
+  /**
+  * Notification that the packet header was sent.
+  *
+  */
+  async event void sendHeaderDone();
+  
+  /**
+  * Start sending the packet footer.
+  */
+  async command void sendFooter();
+  
+  /**
+  * Notification that the the packet footer was sent.
+  *
+  */
+  async event void sendFooterDone();  
+}
diff --git a/tos/lib/byte_radio/PhyReceive.nc b/tos/lib/byte_radio/PhyReceive.nc
new file mode 100644
index 00000000..34b74720
--- /dev/null
+++ b/tos/lib/byte_radio/PhyReceive.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#include <TinyError.h>
+#include <message.h>
+
+/**
+ * This interface is similar to the Receive interface.
+ *   
+ * The interface provides two events in async context which indicate that
+ * a packet is detected or was received. It is provided by the Phy layer
+ * of byte radios.
+ *
+ * @see Receive
+ *
+ * @author Philipp Huppertz
+ */ 
+
+interface PhyReceive {
+   /**
+   * Receive a packet buffer, returning a buffer for the signaling
+   * component to use for the next reception. The return value
+   * can be the same as <tt>msg</tt>, as long as the handling
+   * component copies out the data it needs. The <tt>msg</tt> may
+   * be invalid when <tt>error</tt> is not SUCCESS !
+   *
+   * <b>Note</b> that misuse of this interface is one of the most
+   * common bugs in TinyOS code. For example, if a component both calls a
+   * send on the passed message and returns it, then it is possible
+   * the buffer will be reused before the send occurs, overwriting
+   * the component's data. This would cause the mote to possibly
+   * instead send a packet it most recently received.
+   *
+   * @param  msg      the received packet
+   * @param  payload  a pointer to the packet's payload
+   * @param  len      the length of the data region pointed to by payload
+   * @param  error    FAIL if the packet was corrupted (e.g. wrong crc)
+   * @return          a packet buffer for the stack to use for the next
+   *                  received packet.
+   */
+  async event message_t* receiveDone(message_t* msg, void* payload, uint8_t len, error_t error);
+
+  /**
+  * Indicates that a packet has been detected. This means that the packet's physical header
+  * (preamble bytes + sync byte + SFD byte) was received.
+  *
+  */
+  async event void receiveDetected();
+  
+}
diff --git a/tos/lib/byte_radio/PhySend.nc b/tos/lib/byte_radio/PhySend.nc
new file mode 100644
index 00000000..4dbfea7d
--- /dev/null
+++ b/tos/lib/byte_radio/PhySend.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+#include <TinyError.h>
+#include <message.h>
+ 
+/** 
+  * This interface is similar to the Send interface.
+  *
+  * This interface provides the basic functionality of the Send interface
+  * in async context. It is provided by the Phy Layer.
+  *
+  * @see    Send
+  *
+  * @author Philipp Huppertz
+  */ 
+
+interface PhySend {
+
+    /** 
+    * Send a packet with a data payload of <tt>len</tt>. To determine
+    * the maximum available size, use the Packet interface of the
+    * component providing Send. If send returns SUCCESS, then the
+    * component will signal the sendDone event in the future; if send
+    * returns an error, it will not signal sendDone.  Note that a
+    * component may accept a send request which it later finds it
+    * cannot satisfy; in this case, it will signal sendDone with an
+    * appropriate error code.
+    *
+    * @param   msg     the packet to send
+    * @param   len     the length of the packet payload
+    * @return          SUCCESS if the request was accepted and will issue
+    *                  a sendDone event, EBUSY if the component cannot accept
+    *                  the request now but will be able to later, FAIL
+    *                  if the stack is in a state that cannot accept requests
+    *                  (e.g., it's off).
+    */ 
+  async command error_t send(message_t* msg, uint8_t len);
+
+  /** 
+  * Signaled in response to an accepted send request. <tt>msg</tt>
+  * is the sent buffer, and <tt>error</tt> indicates whether the
+  * send was succesful, and if not, the cause of the failure.
+  * 
+  * @param msg   the message which was requested to send
+  * @param error SUCCESS if it was transmitted successfully, FAIL if
+  *              it was not.
+  */ 
+  async event void sendDone(message_t* msg, error_t error);
+}
diff --git a/tos/lib/byte_radio/RadioByteComm.nc b/tos/lib/byte_radio/RadioByteComm.nc
new file mode 100644
index 00000000..279c7cfa
--- /dev/null
+++ b/tos/lib/byte_radio/RadioByteComm.nc
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/** 
+ * A byte-level communication interface for byte radios.
+ * It signals byte receptions and
+ * provides a split-phased byte send interface. txByteReady states
+ * that the component can accept another byte in its queue to send,
+ * while txDone states that the send queue has been emptied.
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ */
+interface RadioByteComm {
+  /**
+   * Transmits a byte over the radio.
+   *
+   * @param data The byte to be transmitted.
+   */
+  async command void txByte(uint8_t data);
+	
+  /**
+   * Notification that the radio is ready to receive another byte.
+   *
+   * @param data The byte read from the radio.
+   */
+  async event void rxByteReady(uint8_t data);
+
+  /**
+   * Notification that the bus is ready to transmit/queue another byte.
+   *
+   * @param error Success Notification of the successful transmission of the last byte.
+   */
+  async event void txByteReady(error_t error);
+
+  /**
+   * Check to see if the transmission is done and the queue is empty
+   *
+   * @return TRUE if the queue is empty and no more bytes will be sent.
+   *         FALSE if bytes remain in the queue.
+   */
+  async command bool isTxDone();
+}
diff --git a/tos/lib/byte_radio/UartPhyControl.nc b/tos/lib/byte_radio/UartPhyControl.nc
new file mode 100644
index 00000000..cf617d98
--- /dev/null
+++ b/tos/lib/byte_radio/UartPhyControl.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * This interface provides commands to control the structure of 
+ * transmitted (physical) packets and provides commands and events
+ * to control the physical layer of byte radios.
+ *
+ * @author Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+ */ 
+interface UartPhyControl {
+  
+  /**
+  * Sets the number of transmitted preamble bytes.
+  *
+  * @param numPreambleBytes the numbeof preamble bytes.
+  *
+  * @return SUCCESS if it could be set (no current receiving/transmitting)
+            FALSE otherwise.
+  */
+  async command error_t setNumPreambles(uint16_t numPreambleBytes);
+    
+  /**
+  * Sets the timeout after the byte-stream is considered dead if no more
+  * bytes occur on the sending or receiving side. This means isBusy()
+  * returns FALSE.
+  *
+  * @param byteTimeout timeout in ms.
+  *
+  * @return SUCCESS if it could be set (no current receiving/transmitting)
+  *         FALSE otherwise.
+  */
+  command error_t setByteTimeout(uint8_t byteTimeout);
+  
+  /** 
+  * Tests if the UartPhy is busy with sending or receiving a packet. 
+  *
+  * @return TRUE if active
+  *         FALSE otherwise.
+  */
+  async command bool isBusy();
+
+}
diff --git a/tos/lib/byte_radio/flagfunctions.h b/tos/lib/byte_radio/flagfunctions.h
new file mode 100644
index 00000000..e6fe09c1
--- /dev/null
+++ b/tos/lib/byte_radio/flagfunctions.h
@@ -0,0 +1,51 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2005, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * some helper functions that ease dealing with flags in a bit field
+ * - Author --------------------------------------------------------------
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#ifndef FLAG_FUNCTIONS_H
+#define FLAG_FUNCTIONS_H
+
+void setFlag(uint8_t *which, uint8_t pos) {
+    (*which) |= pos;
+}
+
+void clearFlag(uint8_t *which, uint8_t pos) {
+    (*which) = (*which) & (~pos);
+}
+
+bool isFlagSet(const uint8_t *which, uint8_t pos) {
+    return (*which) & pos;
+}
+
+#endif
diff --git a/tos/lib/byte_radio/manchester.h b/tos/lib/byte_radio/manchester.h
new file mode 100644
index 00000000..d75438f7
--- /dev/null
+++ b/tos/lib/byte_radio/manchester.h
@@ -0,0 +1,165 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * provide functions to encode/decode a manchester stream
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:28 $
+ * @author Andreas Koepke <koepke@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+const uint8_t nibbleToManchesterByte[] = {
+    0x55,
+    0x56,
+    0x59,
+    0x5a,
+    0x65,
+    0x66,
+    0x69,
+    0x6a,
+    0x95,
+    0x96,
+    0x99,
+    0x9a,
+    0xa5,
+    0xa6,
+    0xa9,
+    0xaa
+};
+
+const uint8_t manchesterByteToNibble[] = {
+    0x0,
+    0x1,
+    0xff,
+    0xff,
+    0x2,
+    0x3,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0x4,
+    0x5,
+    0xff,
+    0xff,
+    0x6,
+    0x7,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0x8,
+    0x9,
+    0xff,
+    0xff,
+    0xa,
+    0xb,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xc,
+    0xd,
+    0xff,
+    0xff,
+    0xe,
+    0xf
+};
+
+uint8_t manchesterEncodeNibble(uint8_t nib) 
+{
+    return nibbleToManchesterByte[nib];
+}
+
+uint8_t manchesterDecodeByte(uint8_t b) 
+{
+    uint8_t dec;
+    
+    if(b < 0x55) {
+        dec = 0xff;
+    }
+    else if(b > 0xaa) {
+        dec = 0xff;
+    }
+    else {
+        dec = manchesterByteToNibble[b - 0x55];
+    }
+    return dec;
+}
diff --git a/tos/lib/byte_radio/radiopacketfunctions.h b/tos/lib/byte_radio/radiopacketfunctions.h
new file mode 100644
index 00000000..aca2f5a7
--- /dev/null
+++ b/tos/lib/byte_radio/radiopacketfunctions.h
@@ -0,0 +1,56 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * Platformindependant packet structure accessor functions
+ * - Author --------------------------------------------------------------
+ * @author: Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+
+#ifndef RADIO_PACKET_FUNCTIONS_H
+#define RADIO_PACKET_FUNCTIONS_H
+
+#include "message.h"
+
+/* Packet structure accessor functions
+   * note: platform-independant radiostructures are called message_radio_header_t & message_radio_footer_t */
+  message_radio_header_t* getHeader(message_t* amsg) {
+    return (message_radio_header_t*)(amsg->data - sizeof(message_radio_header_t));
+  }
+
+  message_radio_footer_t* getFooter(message_t* amsg) {
+    return (message_radio_footer_t*)(amsg->footer);
+  }
+
+  message_radio_metadata_t* getMetadata(message_t* amsg) {
+    return (message_radio_metadata_t*)((uint8_t*)amsg->footer + sizeof(message_radio_footer_t));
+  }
+
+#endif
diff --git a/tos/lib/byte_radio/shellsort.h b/tos/lib/byte_radio/shellsort.h
new file mode 100644
index 00000000..704c3e55
--- /dev/null
+++ b/tos/lib/byte_radio/shellsort.h
@@ -0,0 +1,20 @@
+/*integriert shellsort Algorithmus*/
+/*shellsort aufsteigend sortierend aus Kernighan Ritchie (S.61)*/
+
+
+#ifndef __SHELLSORT_H__
+#define __SHELLSORT_H__
+
+void shellsort(uint16_t basis[] , uint16_t size)
+{
+	int gap, i, j, temp;
+	
+	for (gap = size/2; gap > 0; gap /= 2)
+		for (i = gap; i < size; i++)
+			for (j = i-gap; j >= 0 && basis[j] > basis[j+gap]; j-=gap) {
+				temp = basis[j];
+				basis[j] = basis[j+gap];
+				basis[j+gap] = temp;
+			}
+}
+#endif /* __SHELLSORT_H__ */
diff --git a/tos/lib/diagmsg/Assert.h b/tos/lib/diagmsg/Assert.h
new file mode 100644
index 00000000..6c2c9f67
--- /dev/null
+++ b/tos/lib/diagmsg/Assert.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __ASSERT_H__
+#define __ASSERT_H__
+
+#ifdef ASSERT_NONE
+
+	#define ASSERT(COND) for(;0;)
+
+#else
+
+	void assert(bool condition, const char* file, uint16_t line);
+	#define ASSERT(COND) assert(COND, __FILE__, __LINE__)
+
+#endif
+
+#endif//__ASSERT_H__
diff --git a/tos/lib/diagmsg/AssertC.nc b/tos/lib/diagmsg/AssertC.nc
new file mode 100644
index 00000000..55813f8c
--- /dev/null
+++ b/tos/lib/diagmsg/AssertC.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+configuration AssertC
+{
+}
+
+implementation
+{
+#ifndef ASSERT_NONE
+
+	components AssertP, DiagMsgC, LedsC;
+	AssertP.DiagMsg -> DiagMsgC;
+	AssertP.Leds -> LedsC;
+
+#endif
+}
diff --git a/tos/lib/diagmsg/AssertP.nc b/tos/lib/diagmsg/AssertP.nc
new file mode 100644
index 00000000..5ea9da0f
--- /dev/null
+++ b/tos/lib/diagmsg/AssertP.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+module AssertP
+{
+	uses
+	{
+		interface DiagMsg;
+		interface Leds;
+	}
+}
+
+implementation
+{
+	void assert(bool condition, const char* file, uint16_t line) __attribute__((noinline)) @C() @spontaneous()
+	{
+		if( ! condition )
+		{
+#ifdef ASSERT_LEDON
+			call Leds.led0On();
+#endif
+
+			if( call DiagMsg.record() )
+			{
+				uint8_t del = 0;
+				uint8_t len = 0;
+
+				while( file[len] != 0 )
+				{
+					if( file[len] == '\\' || file[len] == '/' )
+						del = len + 1;
+
+					++len;
+				}
+
+				file += del;
+
+				call DiagMsg.str("assert");
+				call DiagMsg.str(file);
+				call DiagMsg.uint16(line);
+				call DiagMsg.send();
+			}
+		}
+	}
+}
diff --git a/tos/lib/diagmsg/DiagMsg.nc b/tos/lib/diagmsg/DiagMsg.nc
new file mode 100644
index 00000000..fb0c9ac5
--- /dev/null
+++ b/tos/lib/diagmsg/DiagMsg.nc
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2002-2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+/**
+ * The DiagMsg interface allows messages to be sent back to the base station
+ * containing several values and their type information, like in 
+ * <code>printf(...)</code>. The base station must be connected to a PC using 
+ * a serial cable. On the PC a Java application (net.tinyos.util.DiagMsg) 
+ * decodes the message and displays its content using the correct type 
+ * information. See the implementation for the format of the message.
+ */
+interface DiagMsg
+{
+	/**
+	 * Initiates the recording of a new DiagMsg. It returns FALSE if
+	 * the component is busy recording or sending another message.
+	 */
+	async command bool record();
+
+	/**
+	 * Adds a new value to the end of the message. If the message 
+	 * cannot hold more information, then the new value is simply dropped.
+	 */
+	async command void int8(int8_t value);
+	async command void uint8(uint8_t value);
+	async command void hex8(uint8_t value);
+	async command void int16(int16_t value);
+	async command void uint16(uint16_t value);
+	async command void hex16(uint16_t value);
+	async command void int32(int32_t value);
+	async command void int64(int64_t value);
+	async command void uint64(uint64_t value);
+	async command void uint32(uint32_t value);
+	async command void hex32(uint32_t value);
+	async command void real(float value);
+	async command void chr(char value);
+
+	/**
+	 * Adds an array of values to the end of the message. 
+	 * The maximum length of the array is <code>15</code>.
+	 * If the message cannot hold all elements of the array,
+	 * then no value is stored.
+	 */
+	async command void int8s(const int8_t *value, uint8_t len);
+	async command void uint8s(const uint8_t *value, uint8_t len);
+	async command void hex8s(const uint8_t *value, uint8_t len);
+	async command void int16s(const int16_t *value, uint8_t len);
+	async command void uint16s(const uint16_t *value, uint8_t len);
+	async command void hex16s(const uint16_t *value, uint8_t len);
+	async command void int32s(const int32_t *value, uint8_t len);
+	async command void uint32s(const uint32_t *value, uint8_t len);
+	async command void hex32s(const uint32_t *value, uint8_t len);
+	async command void int64s(const int64_t *value, uint8_t len);
+	async command void uint64s(const uint64_t *value, uint8_t len);
+	async command void reals(const float *value, uint8_t len);
+	async command void chrs(const char *value, uint8_t len);
+
+	/**
+	 * This is a shorthand method for <code>chrs</code>
+	 */
+	async command void str(const char* value);
+
+	/**
+	 * Initiates the sending of the recorded message. 
+	 */
+	async command void send();
+}
diff --git a/tos/lib/diagmsg/DiagMsgC.nc b/tos/lib/diagmsg/DiagMsgC.nc
new file mode 100644
index 00000000..f558b35b
--- /dev/null
+++ b/tos/lib/diagmsg/DiagMsgC.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2002-2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+configuration DiagMsgC
+{
+	provides interface DiagMsg;
+}
+
+implementation 
+{
+#ifdef DIAGMSG_NONE
+
+components NoDiagMsgC;
+	DiagMsg = NoDiagMsgC;
+
+#else
+
+	enum
+	{
+		AM_DIAG_MSG = 0xB1,
+	};
+	
+	components DiagMsgP, MainC;
+
+	DiagMsg = DiagMsgP.DiagMsg;
+	MainC.SoftwareInit -> DiagMsgP.Init;
+
+#ifdef DIAGMSG_RADIO
+	components new AMSenderC(AM_DIAG_MSG);
+#else
+	components new SerialAMSenderC(AM_DIAG_MSG) as AMSenderC;
+#endif
+
+	DiagMsgP.AMSend -> AMSenderC;
+	DiagMsgP.Packet -> AMSenderC;
+
+#endif
+}
diff --git a/tos/lib/diagmsg/DiagMsgP.nc b/tos/lib/diagmsg/DiagMsgP.nc
new file mode 100644
index 00000000..99a7b8ff
--- /dev/null
+++ b/tos/lib/diagmsg/DiagMsgP.nc
@@ -0,0 +1,331 @@
+/*
+ * Copyright (c) 2002-2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <message.h>
+
+module DiagMsgP
+{
+	provides 
+	{
+		interface DiagMsg;
+		interface Init;
+	}
+
+	uses 
+	{
+		interface AMSend;
+		interface Packet;
+	}
+}
+
+#ifndef DIAGMSG_BASE_STATION
+#define	DIAGMSG_BASE_STATION	AM_BROADCAST_ADDR
+#endif
+
+#ifndef DIAGMSG_RETRY_COUNT
+#define	DIAGMSG_RETRY_COUNT	2
+#endif
+
+#ifndef DIAGMSG_RECORDED_MSGS
+#define DIAGMSG_RECORDED_MSGS	10
+#endif
+
+implementation
+{
+	enum
+	{
+		STATE_READY = 1,
+		STATE_RECORDING_FIRST = 2,	// recording the first 4-bit descriptor
+		STATE_RECORDING_SECOND = 3,	// recording the second 4-bit descriptor
+		STATE_MSG_FULL = 4,
+		STATE_BUFFER_FULL = 5,
+	};
+
+	norace volatile uint8_t state;	// the state of the recording
+
+	message_t msgs[DIAGMSG_RECORDED_MSGS];	// circular buffer of messages
+
+	norace message_t *recording;	// the message that is beeing or going to be recorded
+	message_t *sending;	// the message that is beeing sent, or the null pointer
+
+	norace uint8_t nextData;	// points to the next unsued byte
+	norace uint8_t prevType;	// points to the type descriptor
+	norace uint8_t retries;	// number of remaining retries
+
+	command error_t Init.init()
+	{
+		state = STATE_READY;
+		recording = msgs;
+		sending = 0;
+
+		return SUCCESS;
+	}
+
+	// two type fields are stored in on byte
+	enum
+	{
+		TYPE_END = 0,
+		TYPE_INT8 = 1,
+		TYPE_UINT8 = 2,
+		TYPE_HEX8 = 3,
+		TYPE_INT16 = 4,
+		TYPE_UINT16 = 5,
+		TYPE_HEX16 = 6,
+		TYPE_INT32 = 7,
+		TYPE_UINT32 = 8,
+		TYPE_HEX32 = 9,
+		TYPE_FLOAT = 10,
+		TYPE_CHAR = 11,
+		TYPE_INT64 = 12,
+		TYPE_UINT64 = 13,
+		TYPE_ARRAY = 15,
+	};
+
+/*
+	The format of the payload is as follows: 
+	
+	Each value has an associated data type descriptor. The descriptor takes 4-bits,
+	and two descriptors are packed into one byte. The double-descriptor is followed
+	by the data bytes needed to store the corresponding value. Two sample layouts are:
+
+	[D2, D1] [V1] ... [V1] [V2] ... [V2]
+	[D2, D1] [V1] ... [V1] [V2] ... [V2] [0, D3] [V3] ... [V3]
+
+	where D1, D2, D3 denotes the data type descriptors, and V1, V2 and V3
+	denotes the bytes where the corresponding values are stored. If there is an odd
+	number of data descriptors, then a zero data descriptor <code>TYPE_END</code> 
+	is inserted.
+
+	Each data type (except arrays) uses a fixed number of bytes to store the value.
+	For arrays, the first byte of the array holds the data type of the array (higer
+	4 bits) and the length of the array (lower 4 bits). The actual data follows 
+	this first byte.
+*/
+
+	async command bool DiagMsg.record()
+	{
+		atomic
+		{
+			// currently recording or no more space
+			if( state != STATE_READY )
+				return FALSE;
+
+			state = STATE_RECORDING_FIRST;
+			nextData = 0;
+		}
+
+		return TRUE;
+	}
+
+	/**
+	 * Allocates space in the message for <code>size</code> bytes
+	 * and sets the type information to <code>type</code>. 
+	 * Returns the index in <code>msg.data</code> where the data 
+	 * should be stored or <code>-1</code> if no more space is avaliable.
+	 */
+	int8_t allocate(uint8_t size, uint8_t type)
+	{
+		int8_t ret = -1;
+
+		if( state == STATE_RECORDING_FIRST )
+		{
+			if( nextData + 1 + size <= TOSH_DATA_LENGTH )
+			{
+				state = STATE_RECORDING_SECOND;
+
+				prevType = nextData++;
+				((uint8_t*) &(recording->data))[prevType] = type;
+				ret = nextData;
+				nextData += size;
+			}
+			else
+				state = STATE_MSG_FULL;
+		}
+		else if( state == STATE_RECORDING_SECOND )
+		{
+			if( nextData + size <= TOSH_DATA_LENGTH )
+			{
+				state = STATE_RECORDING_FIRST;
+
+				((uint8_t*) &(recording->data))[prevType] += (type << 4);
+				ret = nextData;
+				nextData += size;
+			}
+			else
+				state = STATE_MSG_FULL;
+		}
+
+		return ret;
+	}
+
+	void copyData(uint8_t size, uint8_t type2, const void* data)
+	{
+		int8_t start = allocate(size, type2);
+		if( start >= 0 )
+			memcpy(&(recording->data[start]), data, size);
+	}
+
+	void copyArray(uint8_t size, uint8_t type2, const void* data, uint8_t len)
+	{
+		int8_t start;
+
+		if( len > 15 )
+			len = 15;
+
+		start = allocate(size*len + 1, TYPE_ARRAY);
+		if( start >= 0 )
+		{
+			recording->data[start] = (type2 << 4) + len;
+			memcpy(&(recording->data[start + 1]), data, size*len);
+		}
+	}
+	
+#define IMPLEMENT(NAME, TYPE, TYPE2) \
+	async command void DiagMsg.NAME(TYPE value) { copyData(sizeof(TYPE), TYPE2, &value); } \
+	async command void DiagMsg.NAME##s(const TYPE *value, uint8_t len) { copyArray(sizeof(TYPE), TYPE2, value, len); }
+
+	IMPLEMENT(int8, int8_t, TYPE_INT8)
+	IMPLEMENT(uint8, uint8_t, TYPE_UINT8)
+	IMPLEMENT(hex8, uint8_t, TYPE_HEX8)
+	IMPLEMENT(int16, int16_t, TYPE_INT16)
+	IMPLEMENT(uint16, uint16_t, TYPE_UINT16)
+	IMPLEMENT(hex16, uint16_t, TYPE_HEX16)
+	IMPLEMENT(int32, int32_t, TYPE_INT32)
+	IMPLEMENT(uint32, uint32_t, TYPE_UINT32)
+	IMPLEMENT(hex32, uint32_t, TYPE_HEX32)
+	IMPLEMENT(int64, int64_t, TYPE_INT64)
+	IMPLEMENT(uint64, uint64_t, TYPE_UINT64)
+	IMPLEMENT(real, float, TYPE_FLOAT)
+	IMPLEMENT(chr, char, TYPE_CHAR)
+
+	async command void DiagMsg.str(const char* str)
+	{
+		int8_t len = 0;
+		while( str[len] != 0 && len < 15 )
+			++len;
+		
+		call DiagMsg.chrs(str, len);
+	}
+
+	// TODO: this is a hack because setPayloadLength should be async
+	inline void setPayloadLength(message_t* msg, uint8_t length)
+	{
+		(*(uint8_t*) &(msg->header)) = length;
+	}
+
+	inline uint8_t getPayloadLength(message_t* msg)
+	{
+		return *(uint8_t*) &(msg->header);
+	}
+
+	task void send()
+	{
+		message_t* msg;
+
+		atomic msg = sending;
+
+		if( call AMSend.send(DIAGMSG_BASE_STATION, msg, getPayloadLength(msg)) != SUCCESS )
+			post send();
+	}
+
+	// calculates the next message_t pointer in the <code>msgs</code> circular buffer
+	static inline message_t* nextPointer(message_t* ptr)
+	{
+		if( ++ptr >= msgs + DIAGMSG_RECORDED_MSGS )
+			return msgs;
+		else
+			return ptr;
+	}
+
+	async command void DiagMsg.send()
+	{
+		// no message recorded
+		if( state == STATE_READY )
+			return;
+
+		// store the length
+		setPayloadLength(recording, nextData);
+
+		atomic
+		{
+			if( sending == 0 )
+			{
+				sending = recording;
+				retries = DIAGMSG_RETRY_COUNT;
+				post send();
+			}
+	
+			recording = nextPointer(recording);
+
+			if( recording == sending )
+				state = STATE_BUFFER_FULL;
+			else
+				state = STATE_READY;
+		}
+	}
+
+	event void AMSend.sendDone(message_t* p, error_t error)
+	{
+		atomic
+		{
+			// retry if not successful
+			if( error != SUCCESS && --retries > 0 )
+				post send();
+			else
+			{
+				p = nextPointer(sending);
+				if( p != recording )
+				{
+					sending = p;
+					retries = DIAGMSG_RETRY_COUNT;
+					post send();
+				}
+				else
+				{
+					sending = 0;
+
+					if( state == STATE_BUFFER_FULL )
+					{
+						state = STATE_READY;
+						if( call DiagMsg.record() )
+						{
+							call DiagMsg.str("DiagMsgOverflow");
+							call DiagMsg.send();
+						}
+					}
+				}
+			}
+		}
+	}
+}
diff --git a/tos/lib/diagmsg/NoDiagMsgC.nc b/tos/lib/diagmsg/NoDiagMsgC.nc
new file mode 100644
index 00000000..7e871526
--- /dev/null
+++ b/tos/lib/diagmsg/NoDiagMsgC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2003-2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+module NoDiagMsgC
+{
+	provides interface DiagMsg;
+}
+
+implementation
+{
+	async command bool DiagMsg.record()
+	{
+		return FALSE;
+	}
+
+#define IMPLEMENT(NAME, TYPE, TYPE2) \
+	async command void DiagMsg.NAME(TYPE value) { } \
+	async command void DiagMsg.NAME##s(const TYPE *value, uint8_t len) { }
+
+	IMPLEMENT(int8, int8_t, TYPE_INT8)
+	IMPLEMENT(uint8, uint8_t, TYPE_UINT8)
+	IMPLEMENT(hex8, uint8_t, TYPE_HEX8)
+	IMPLEMENT(int16, int16_t, TYPE_INT16)
+	IMPLEMENT(uint16, uint16_t, TYPE_UINT16)
+	IMPLEMENT(hex16, uint16_t, TYPE_HEX16)
+	IMPLEMENT(int32, int32_t, TYPE_INT32)
+	IMPLEMENT(uint32, uint32_t, TYPE_UINT32)
+	IMPLEMENT(hex32, uint32_t, TYPE_HEX32)
+	IMPLEMENT(int64, int64_t, TYPE_INT64)
+	IMPLEMENT(uint64, uint64_t, TYPE_UINT64)
+	IMPLEMENT(real, float, TYPE_FLOAT)
+	IMPLEMENT(chr, char, TYPE_CHAR)
+
+	async command void DiagMsg.str(const char* str) { }
+	async command void DiagMsg.send() { }
+}
diff --git a/tos/lib/diagmsg/README b/tos/lib/diagmsg/README
new file mode 100644
index 00000000..b46a01ae
--- /dev/null
+++ b/tos/lib/diagmsg/README
@@ -0,0 +1,84 @@
+DiagMsg:
+
+Author/Contact: miklos.maroti@vanderbilt.edu (Miklos Maroti, ISIS, Vanderbilt)
+
+DESCRIPTION:
+
+The DiagMsg component allows messages to be sent back to the base station 
+containing several diagnostic or debugging values together with their type 
+information. The base station must run the GenericBase or TOSBase application 
+which forwards all messages to a PC connected to the base station. A java 
+programm (java net.tinyos.util.DiagMsg) displays the messages on the screen 
+according to the formating rules contained in the message.
+
+The following data types are supported: 1,2, 4 and 8 byte long signed, unsigned
+and hexadecimal integers, characters, floating point numbers, strings and arrays 
+of the previous types (of length up to 15). Each field requires an additional 
+4 bit type descriptor.
+
+
+USAGE:
+
+When you want to report some data, write code something like this:
+
+	if( call DiagMsg.record() )
+	{
+		call DiagMsg.str("test");
+		call DiagMsg.uint8(17);
+		call DiagMsg.int16(1973);
+		call DiagMsg.real(12.345);
+		call DiagMsg.chr('Z');
+		call DiagMsg.uint32(123456789);
+		call DiagMsg.send();
+	}
+
+The DiagMsg component will record the message and will send it as soon 
+as possible. You can record up to 29 bytes of data in a single message.
+Each field uses and additional 4-bit type descriptor. For arrays, including
+strings, there is an additional 1-byte length descriptor as well. The diag 
+message above, for example, uses
+
+	5+1+1+2+4+1+4+7*0.5 = 21.5
+
+that is 22 bytes. If the message cannot hold more fields, then additional 
+fields will be silently ignored. 
+
+
+THE JAVA PROGRAM:
+
+The java program (DiagMsgs) displays each DiagMsg in a line. The program 
+can connect to a SerialForward application, or can use the serial port directly.
+
+
+ASSERT:
+
+A separate component (AssertC) provides an ASSERT macro that can be used to
+signal error conditions with a DiagMsg. You have to include the AssertC
+component only once in your application, and where ever you want to use
+the ASSERT macro you need to include only the Assert.h header file.
+
+
+TUNABLE PARAMETERS:
+
+The DiagMsg component can be configured by defining the following values in 
+your make file:
+
+DIAGMSG_NONE: Turns off sending diagmessage completely
+
+DIAGMSG_RADIO: By default all diag messages are sent over the serial line,
+this will reroute them to the radio
+
+DIAGMSG_BASE_STATION: The node ID of the base station or 0xFFFF to broadcast
+the message. The default value is to broadcast the message.
+
+DIAGMSG_RETRY_COUNT: The DiagMsg component will retry messages this many times 
+before dropping them. The base station must acknowledge them (this is done 
+automatically).
+
+DIAGMSG_RECORDED_MSGS: The DiagMsg component keeps an internal buffer of this 
+many messages. This allows sending several small messages without waiting for 
+their completion.
+
+ASSERT_NONE: Disables assertion checking
+
+ASSERT_LEDON: Turns on LED0 when an assert fails.
diff --git a/tos/lib/ftsp/GlobalTime.nc b/tos/lib/ftsp/GlobalTime.nc
new file mode 100644
index 00000000..546b2465
--- /dev/null
+++ b/tos/lib/ftsp/GlobalTime.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu)
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ */
+#include "Timer.h"
+
+interface GlobalTime<precision_tag>
+{
+	/**
+	 * Returns the current local time of this mote.
+	 */
+	async command uint32_t getLocalTime();
+
+	/**
+	 * Reads the current global time. This method is a combination
+	 * of <code>getLocalTime</code> and <code>local2Global</code>.
+	 * @return SUCCESS if this mote is synchronized, FAIL otherwise.
+	 */
+	async command error_t getGlobalTime(uint32_t *time);
+
+	/**
+	 * Converts the local time given in <code>time</code> into the
+	 * corresponding global time and stores this again in
+	 * <code>time</code>. The following equation is used to compute the
+	 * conversion:
+	 *
+	 *	globalTime = localTime + offset + skew * (localTime - syncPoint)
+	 *
+	 * The skew is normalized to 0.0 (1.0 is subtracted) to increase the
+	 * machine precision. The syncPoint value is periodically updated to
+	 * increase the machine precision of the floating point arithmetic and
+	 * also to allow time wrap.
+	 *
+	 * @return SUCCESS if this mote is synchronized, FAIL otherwise.
+	 */
+	async command error_t local2Global(uint32_t *time);
+
+	/**
+	 * Converts the global time given in <code>time</code> into the
+	 * correspoding local time and stores this again in
+	 * <code>time</code>. This method performs the inverse of the
+	 * <code>local2Global</clode> transformation.
+	 *
+	 * @return SUCCESS if this mote is synchronized, FAIL otherwise.
+	 */
+	async command error_t global2Local(uint32_t *time);
+}
diff --git a/tos/lib/ftsp/TimeSync32kC.nc b/tos/lib/ftsp/TimeSync32kC.nc
new file mode 100755
index 00000000..450197df
--- /dev/null
+++ b/tos/lib/ftsp/TimeSync32kC.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti, Brano Kusy, Janos Sallai
+ * Date last modified: 3/17/03
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ * Adapted for 32kHz and LPL: 6/16/09 by Thomas Schmid (thomas.schmid@ucla.edu)
+ */
+
+#include "TimeSyncMsg.h"
+
+configuration TimeSync32kC
+{
+  uses interface Boot;
+  provides interface Init;
+  provides interface StdControl;
+  provides interface GlobalTime<T32khz>;
+
+  //interfaces for extra fcionality: need not to be wired
+  provides interface TimeSyncInfo;
+  provides interface TimeSyncMode;
+  provides interface TimeSyncNotify;
+}
+
+implementation
+{
+#if defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB)
+;
+#else
+#error "LPL timesync is not available for your platform"
+#endif
+
+  components new TimeSyncP(T32khz) as TimeSyncP;
+
+  GlobalTime      =   TimeSyncP;
+  StdControl      =   TimeSyncP;
+  Init            =   TimeSyncP;
+  Boot            =   TimeSyncP;
+  TimeSyncInfo    =   TimeSyncP;
+  TimeSyncMode    =   TimeSyncP;
+  TimeSyncNotify  =   TimeSyncP;
+
+  components TimeSyncMessageC as ActiveMessageC;
+  TimeSyncP.RadioControl    ->  ActiveMessageC;
+  TimeSyncP.Send            ->  ActiveMessageC.TimeSyncAMSend32khz[TIMESYNC_AM_FTSP];
+  TimeSyncP.Receive         ->  ActiveMessageC.Receive[TIMESYNC_AM_FTSP];
+  TimeSyncP.TimeSyncPacket  ->  ActiveMessageC;
+
+  components Counter32khz32C, new CounterToLocalTimeC(T32khz) as LocalTime32khzC;
+  LocalTime32khzC.Counter -> Counter32khz32C;
+  TimeSyncP.LocalTime     -> LocalTime32khzC;
+
+  components new TimerMilliC() as TimerC;
+  TimeSyncP.Timer ->  TimerC;
+
+  components RandomC;
+  TimeSyncP.Random -> RandomC;
+  
+#if defined(TIMESYNC_LEDS)
+  components LedsC;
+#else
+  components NoLedsC as LedsC;
+#endif
+  TimeSyncP.Leds  ->  LedsC;
+
+#ifdef LOW_POWER_LISTENING
+  TimeSyncP.LowPowerListening -> ActiveMessageC;
+#endif
+
+
+}
diff --git a/tos/lib/ftsp/TimeSyncC.nc b/tos/lib/ftsp/TimeSyncC.nc
new file mode 100644
index 00000000..a08229d1
--- /dev/null
+++ b/tos/lib/ftsp/TimeSyncC.nc
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti, Brano Kusy, Janos Sallai
+ * Date last modified: 3/17/03
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ */
+
+#include "TimeSyncMsg.h"
+
+configuration TimeSyncC
+{
+  uses interface Boot;
+  provides interface Init;
+  provides interface StdControl;
+  provides interface GlobalTime<TMilli>;
+
+  //interfaces for extra fcionality: need not to be wired
+  provides interface TimeSyncInfo;
+  provides interface TimeSyncMode;
+  provides interface TimeSyncNotify;
+}
+
+implementation
+{
+  components new TimeSyncP(TMilli);
+
+  GlobalTime      =   TimeSyncP;
+  StdControl      =   TimeSyncP;
+  Init            =   TimeSyncP;
+  Boot            =   TimeSyncP;
+  TimeSyncInfo    =   TimeSyncP;
+  TimeSyncMode    =   TimeSyncP;
+  TimeSyncNotify  =   TimeSyncP;
+
+  components TimeSyncMessageC as ActiveMessageC;
+  TimeSyncP.RadioControl    ->  ActiveMessageC;
+  TimeSyncP.Send            ->  ActiveMessageC.TimeSyncAMSendMilli[TIMESYNC_AM_FTSP];
+  TimeSyncP.Receive         ->  ActiveMessageC.Receive[TIMESYNC_AM_FTSP];
+  TimeSyncP.TimeSyncPacket  ->  ActiveMessageC;
+
+  components HilTimerMilliC;
+  TimeSyncP.LocalTime       ->  HilTimerMilliC;
+
+  components new TimerMilliC() as TimerC;
+  TimeSyncP.Timer ->  TimerC;
+
+  components RandomC;
+  TimeSyncP.Random -> RandomC;
+
+#if defined(TIMESYNC_LEDS)
+  components LedsC;
+#else
+  components NoLedsC as LedsC;
+#endif
+  TimeSyncP.Leds  ->  LedsC;
+
+#ifdef LOW_POWER_LISTENING
+  components CC2420ActiveMessageC;
+  TimeSyncP.LowPowerListening -> CC2420ActiveMessageC;
+#endif
+
+}
diff --git a/tos/lib/ftsp/TimeSyncInfo.nc b/tos/lib/ftsp/TimeSyncInfo.nc
new file mode 100644
index 00000000..f7520c16
--- /dev/null
+++ b/tos/lib/ftsp/TimeSyncInfo.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu)
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ */
+
+interface TimeSyncInfo
+{
+	/**
+	 * Returns current offset of the local time wrt global time.
+	 */
+	async command uint32_t getOffset();
+
+	/**
+	 * Returns current skew of the local time wrt global time.
+	 * This value is normalized to 0.0 (1.0 is subtracted) to get maximum 
+	 * representation precision.
+	 */
+	async command float getSkew();
+
+	/**
+	 * Returns the local time of the last synchronization point. This 
+	 * value is close to the current local time and updated when a new
+	 * time synchronization message arrives.
+	 */
+	async command uint32_t getSyncPoint();
+
+	/**
+	 * Returns the current root to which this node is synchronized. 
+	 */
+	async command uint16_t getRootID();
+
+	/**
+	 * Returns the latest seq number seen from the current root.
+	 */
+	async command uint8_t getSeqNum();
+
+	/**
+	 * Returns the number of entries stored currently in the 
+	 * regerssion table.
+	 */
+	async command uint8_t getNumEntries();
+
+	/**
+	 * Returns the value of heartBeats variable. 
+	 */
+	async command uint8_t getHeartBeats();
+}
diff --git a/tos/lib/ftsp/TimeSyncMode.nc b/tos/lib/ftsp/TimeSyncMode.nc
new file mode 100644
index 00000000..63d595f3
--- /dev/null
+++ b/tos/lib/ftsp/TimeSyncMode.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu)
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ */
+
+/**
+  * the time sync module can work in two modes:
+  *            - TS_TIMER_MODE (default): TS msgs sent period. from the timer
+  *            - TS_USER_MODE: TS msgs sent only when explic. asked by user 
+  *                            via TimeSyncMode.send() command, TimeSync.Timer 
+  *                            is stopped in this mode
+  */
+  
+interface TimeSyncMode
+{
+	/**
+	 * Sets the current mode of the TimeSync module.
+	 * returns FAIL if didn't succeed
+	 */
+	command error_t setMode(uint8_t mode);
+
+	/**
+	 * Gets the current mode of the TimeSync module.
+	 */
+	command uint8_t getMode();
+	
+	/**
+	 * command to send out time synchronization message.
+	 * returns FAIL if TimeSync not in TS_USER_MODE
+	 */
+	command error_t send();
+	
+ }
+
+
diff --git a/tos/lib/ftsp/TimeSyncMsg.h b/tos/lib/ftsp/TimeSyncMsg.h
new file mode 100644
index 00000000..df672948
--- /dev/null
+++ b/tos/lib/ftsp/TimeSyncMsg.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu)
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ */
+
+#if defined(TIMESYNCMSG_H)
+#else
+#define TIMESYNCMSG_H
+
+typedef nx_struct TimeSyncMsg
+{
+	nx_uint16_t	rootID;		// the node id of the synchronization root
+	nx_uint16_t	nodeID;		// the node if of the sender
+	nx_uint8_t	seqNum;		// sequence number for the root
+
+	/*
+	* After TEP 133, the message timestamp contains the difference between
+	* event time and the time the message was actually sent out. TimeSyncP
+	* sends the local time associated with this globalTime to the
+	* TimeStamping mechanism, which then calculates the difference.
+	*
+	* On the receiving side, the difference is applied to the local
+	* timestamp. The receiving timestamp thus represents the time on the
+	* receiving clock when the remote globalTime was taken.
+	*/
+	nx_uint32_t	globalTime;
+
+	//just for convenience
+	nx_uint32_t 	localTime;
+} TimeSyncMsg;
+
+enum {
+    TIMESYNC_AM_FTSP = 0x3E,
+    TIMESYNCMSG_LEN = sizeof(TimeSyncMsg) - sizeof(nx_uint32_t),
+    TS_TIMER_MODE = 0,      // see TimeSyncMode interface
+    TS_USER_MODE = 1,       // see TimeSyncMode interface
+};
+
+#endif
diff --git a/tos/lib/ftsp/TimeSyncNotify.nc b/tos/lib/ftsp/TimeSyncNotify.nc
new file mode 100644
index 00000000..bc21db67
--- /dev/null
+++ b/tos/lib/ftsp/TimeSyncNotify.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu)
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ */
+
+/**
+  * time sync module (TimeSyncM) provides notification of arriving
+  * and transmitted time-sync msgs through TimeSyncNotify interface:
+  */
+  
+interface TimeSyncNotify
+{
+	/**
+	 * fired when time-sync msg is received and accepted
+	 */
+	event void msg_received();
+
+	/**
+	 * fired when time-sync msg is sent by TimeSyncM or the sending did not
+	 * succeed
+	 */
+	event void msg_sent();
+	
+ }
+
+
diff --git a/tos/lib/ftsp/TimeSyncP.nc b/tos/lib/ftsp/TimeSyncP.nc
new file mode 100644
index 00000000..6d9a0b0b
--- /dev/null
+++ b/tos/lib/ftsp/TimeSyncP.nc
@@ -0,0 +1,505 @@
+/*
+ * Copyright (c) 2002, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author: Miklos Maroti, Brano Kusy (kusy@isis.vanderbilt.edu), Janos Sallai
+ * Ported to T2: 3/17/08 by Brano Kusy (branislav.kusy@gmail.com)
+ */
+#include "TimeSyncMsg.h"
+
+generic module TimeSyncP(typedef precision_tag)
+{
+    provides
+    {
+        interface Init;
+        interface StdControl;
+        interface GlobalTime<precision_tag>;
+
+        //interfaces for extra functionality: need not to be wired
+        interface TimeSyncInfo;
+        interface TimeSyncMode;
+        interface TimeSyncNotify;
+    }
+    uses
+    {
+        interface Boot;
+        interface SplitControl as RadioControl;
+        interface TimeSyncAMSend<precision_tag,uint32_t> as Send;
+        interface Receive;
+        interface Timer<TMilli>;
+        interface Random;
+        interface Leds;
+        interface TimeSyncPacket<precision_tag,uint32_t>;
+        interface LocalTime<precision_tag> as LocalTime;
+
+
+#ifdef LOW_POWER_LISTENING
+        interface LowPowerListening;
+#endif
+
+    }
+}
+implementation
+{
+#ifndef TIMESYNC_RATE
+#define TIMESYNC_RATE   10
+#endif
+
+    enum {
+        MAX_ENTRIES           = 8,              // number of entries in the table
+        BEACON_RATE           = TIMESYNC_RATE,  // how often send the beacon msg (in seconds)
+        ROOT_TIMEOUT          = 5,              //time to declare itself the root if no msg was received (in sync periods)
+        IGNORE_ROOT_MSG       = 4,              // after becoming the root ignore other roots messages (in send period)
+        ENTRY_VALID_LIMIT     = 4,              // number of entries to become synchronized
+        ENTRY_SEND_LIMIT      = 3,              // number of entries to send sync messages
+        ENTRY_THROWOUT_LIMIT  = 500,            // if time sync error is bigger than this clear the table
+    };
+
+    typedef struct TableItem
+    {
+        uint8_t     state;
+        uint32_t    localTime;
+        int32_t     timeOffset; // globalTime - localTime
+    } TableItem;
+
+    enum {
+        ENTRY_EMPTY = 0,
+        ENTRY_FULL = 1,
+    };
+
+    TableItem   table[MAX_ENTRIES];
+    uint8_t tableEntries;
+
+    enum {
+        STATE_IDLE = 0x00,
+        STATE_PROCESSING = 0x01,
+        STATE_SENDING = 0x02,
+        STATE_INIT = 0x04,
+    };
+
+    uint8_t state, mode;
+
+/*
+    We do linear regression from localTime to timeOffset (globalTime - localTime).
+    This way we can keep the slope close to zero (ideally) and represent it
+    as a float with high precision.
+
+        timeOffset - offsetAverage = skew * (localTime - localAverage)
+        timeOffset = offsetAverage + skew * (localTime - localAverage)
+        globalTime = localTime + offsetAverage + skew * (localTime - localAverage)
+*/
+
+    float       skew;
+    uint32_t    localAverage;
+    int32_t     offsetAverage;
+    uint8_t     numEntries; // the number of full entries in the table
+
+    message_t processedMsgBuffer;
+    message_t* processedMsg;
+
+    message_t outgoingMsgBuffer;
+    TimeSyncMsg* outgoingMsg;
+
+    uint8_t heartBeats; // the number of sucessfully sent messages
+                        // since adding a new entry with lower beacon id than ours
+
+    async command uint32_t GlobalTime.getLocalTime()
+    {
+        return call LocalTime.get();
+    }
+
+    async command error_t GlobalTime.getGlobalTime(uint32_t *time)
+    {
+        *time = call GlobalTime.getLocalTime();
+        return call GlobalTime.local2Global(time);
+    }
+
+    error_t is_synced()
+    {
+      if (numEntries>=ENTRY_VALID_LIMIT || outgoingMsg->rootID==TOS_NODE_ID)
+        return SUCCESS;
+      else
+        return FAIL;
+    }
+
+
+    async command error_t GlobalTime.local2Global(uint32_t *time)
+    {
+        *time += offsetAverage + (int32_t)(skew * (int32_t)(*time - localAverage));
+        return is_synced();
+    }
+
+    async command error_t GlobalTime.global2Local(uint32_t *time)
+    {
+        uint32_t approxLocalTime = *time - offsetAverage;
+        *time = approxLocalTime - (int32_t)(skew * (int32_t)(approxLocalTime - localAverage));
+        return is_synced();
+    }
+
+    void calculateConversion()
+    {
+        float newSkew = skew;
+        uint32_t newLocalAverage;
+        int32_t newOffsetAverage;
+        int32_t localAverageRest;
+        int32_t offsetAverageRest;
+
+        int64_t localSum;
+        int64_t offsetSum;
+
+        int8_t i;
+
+        for(i = 0; i < MAX_ENTRIES && table[i].state != ENTRY_FULL; ++i)
+            ;
+
+        if( i >= MAX_ENTRIES )  // table is empty
+            return;
+/*
+        We use a rough approximation first to avoid time overflow errors. The idea
+        is that all times in the table should be relatively close to each other.
+*/
+        newLocalAverage = table[i].localTime;
+        newOffsetAverage = table[i].timeOffset;
+
+        localSum = 0;
+        localAverageRest = 0;
+        offsetSum = 0;
+        offsetAverageRest = 0;
+
+        while( ++i < MAX_ENTRIES )
+            if( table[i].state == ENTRY_FULL ) {
+                /*
+                   This only works because C ISO 1999 defines the signe for modulo the same as for the Dividend!
+                */ 
+                localSum += (int32_t)(table[i].localTime - newLocalAverage) / tableEntries;
+                localAverageRest += (table[i].localTime - newLocalAverage) % tableEntries;
+                offsetSum += (int32_t)(table[i].timeOffset - newOffsetAverage) / tableEntries;
+                offsetAverageRest += (table[i].timeOffset - newOffsetAverage) % tableEntries;
+            }
+
+        newLocalAverage += localSum + localAverageRest / tableEntries;
+        newOffsetAverage += offsetSum + offsetAverageRest / tableEntries;
+
+        localSum = offsetSum = 0;
+        for(i = 0; i < MAX_ENTRIES; ++i)
+            if( table[i].state == ENTRY_FULL ) {
+                int32_t a = table[i].localTime - newLocalAverage;
+                int32_t b = table[i].timeOffset - newOffsetAverage;
+
+                localSum += (int64_t)a * a;
+                offsetSum += (int64_t)a * b;
+            }
+
+        if( localSum != 0 )
+            newSkew = (float)offsetSum / (float)localSum;
+
+        atomic
+        {
+            skew = newSkew;
+            offsetAverage = newOffsetAverage;
+            localAverage = newLocalAverage;
+            numEntries = tableEntries;
+        }
+    }
+
+    void clearTable()
+    {
+        int8_t i;
+        for(i = 0; i < MAX_ENTRIES; ++i)
+            table[i].state = ENTRY_EMPTY;
+
+        atomic numEntries = 0;
+    }
+
+    uint8_t numErrors=0;
+    void addNewEntry(TimeSyncMsg *msg)
+    {
+        int8_t i, freeItem = -1, oldestItem = 0;
+        uint32_t age, oldestTime = 0;
+        int32_t timeError;
+
+        // clear table if the received entry's been inconsistent for some time
+        timeError = msg->localTime;
+        call GlobalTime.local2Global((uint32_t*)(&timeError));
+        timeError -= msg->globalTime;
+        if( (is_synced() == SUCCESS) &&
+            (timeError > ENTRY_THROWOUT_LIMIT || timeError < -ENTRY_THROWOUT_LIMIT))
+        {
+            if (++numErrors>3)
+                clearTable();
+            return; // don't incorporate a bad reading
+        }
+
+        tableEntries = 0; // don't reset table size unless you're recounting
+        numErrors = 0;
+
+        for(i = 0; i < MAX_ENTRIES; ++i) {
+            age = msg->localTime - table[i].localTime;
+
+            //logical time error compensation
+            if( age >= 0x7FFFFFFFL )
+                table[i].state = ENTRY_EMPTY;
+
+            if( table[i].state == ENTRY_EMPTY )
+                freeItem = i;
+            else
+                ++tableEntries;
+
+            if( age >= oldestTime ) {
+                oldestTime = age;
+                oldestItem = i;
+            }
+        }
+
+        if( freeItem < 0 )
+            freeItem = oldestItem;
+        else
+            ++tableEntries;
+
+        table[freeItem].state = ENTRY_FULL;
+
+        table[freeItem].localTime = msg->localTime;
+        table[freeItem].timeOffset = msg->globalTime - msg->localTime;
+    }
+
+    void task processMsg()
+    {
+        TimeSyncMsg* msg = (TimeSyncMsg*)(call Send.getPayload(processedMsg, sizeof(TimeSyncMsg)));
+
+        if( msg->rootID < outgoingMsg->rootID &&
+            //after becoming the root, a node ignores messages that advertise the old root (it may take
+            //some time for all nodes to timeout and discard the old root) 
+            !(heartBeats < IGNORE_ROOT_MSG && outgoingMsg->rootID == TOS_NODE_ID) ){
+            outgoingMsg->rootID = msg->rootID;
+            outgoingMsg->seqNum = msg->seqNum;
+        }
+        else if( outgoingMsg->rootID == msg->rootID && (int8_t)(msg->seqNum - outgoingMsg->seqNum) > 0 ) {
+            outgoingMsg->seqNum = msg->seqNum;
+        }
+        else
+            goto exit;
+
+        call Leds.led0Toggle();
+        if( outgoingMsg->rootID < TOS_NODE_ID )
+            heartBeats = 0;
+
+        addNewEntry(msg);
+        calculateConversion();
+        signal TimeSyncNotify.msg_received();
+
+    exit:
+        state &= ~STATE_PROCESSING;
+    }
+
+    event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len)
+    {
+#ifdef TIMESYNC_DEBUG   // this code can be used to simulate multiple hopsf
+        uint8_t incomingID = (uint8_t)((TimeSyncMsg*)payload)->nodeID;
+        int8_t diff = (incomingID & 0x0F) - (TOS_NODE_ID & 0x0F);
+        if( diff < -1 || diff > 1 )
+            return msg;
+        diff = (incomingID & 0xF0) - (TOS_NODE_ID & 0xF0);
+        if( diff < -16 || diff > 16 )
+            return msg;
+#endif
+
+        if( (state & STATE_PROCESSING) == 0
+            && call TimeSyncPacket.isValid(msg)) {
+            message_t* old = processedMsg;
+
+            processedMsg = msg;
+            ((TimeSyncMsg*)(payload))->localTime = call TimeSyncPacket.eventTime(msg);
+
+            state |= STATE_PROCESSING;
+            post processMsg();
+
+            return old;
+        }
+
+        return msg;
+    }
+
+    task void sendMsg()
+    {
+        uint32_t localTime, globalTime;
+
+        globalTime = localTime = call GlobalTime.getLocalTime();
+        call GlobalTime.local2Global(&globalTime);
+
+        // we need to periodically update the reference point for the root
+        // to avoid wrapping the 32-bit (localTime - localAverage) value
+        if( outgoingMsg->rootID == TOS_NODE_ID ) {
+            if( (int32_t)(localTime - localAverage) >= 0x20000000 )
+            {
+                atomic
+                {
+                    localAverage = localTime;
+                    offsetAverage = globalTime - localTime;
+                }
+            }
+        }
+        else if( heartBeats >= ROOT_TIMEOUT ) {
+            heartBeats = 0; //to allow ROOT_SWITCH_IGNORE to work
+            outgoingMsg->rootID = TOS_NODE_ID;
+            ++(outgoingMsg->seqNum); // maybe set it to zero?
+        }
+
+        outgoingMsg->globalTime = globalTime;
+#ifdef LOW_POWER_LISTENING
+        call LowPowerListening.setRemoteWakeupInterval(&outgoingMsgBuffer, LPL_INTERVAL);
+#endif
+        // we don't send time sync msg, if we don't have enough data
+        if( numEntries < ENTRY_SEND_LIMIT && outgoingMsg->rootID != TOS_NODE_ID ){
+            ++heartBeats;
+            state &= ~STATE_SENDING;
+        }
+        else if( call Send.send(AM_BROADCAST_ADDR, &outgoingMsgBuffer, TIMESYNCMSG_LEN, localTime ) != SUCCESS ){
+            state &= ~STATE_SENDING;
+            signal TimeSyncNotify.msg_sent();
+        }
+    }
+
+    event void Send.sendDone(message_t* ptr, error_t error)
+    {
+        if (ptr != &outgoingMsgBuffer)
+          return;
+
+        if(error == SUCCESS)
+        {
+            ++heartBeats;
+            call Leds.led1Toggle();
+
+            if( outgoingMsg->rootID == TOS_NODE_ID )
+                ++(outgoingMsg->seqNum);
+        }
+
+        state &= ~STATE_SENDING;
+        signal TimeSyncNotify.msg_sent();
+    }
+
+    void timeSyncMsgSend()
+    {
+        if( outgoingMsg->rootID == 0xFFFF && ++heartBeats >= ROOT_TIMEOUT ) {
+            outgoingMsg->seqNum = 0;
+            outgoingMsg->rootID = TOS_NODE_ID;
+        }
+
+        if( outgoingMsg->rootID != 0xFFFF && (state & STATE_SENDING) == 0 ) {
+           state |= STATE_SENDING;
+           post sendMsg();
+        }
+    }
+
+    event void Timer.fired()
+    {
+      if (mode == TS_TIMER_MODE) {
+        timeSyncMsgSend();
+      }
+      else
+        call Timer.stop();
+    }
+
+    command error_t TimeSyncMode.setMode(uint8_t mode_){
+        if (mode_ == TS_TIMER_MODE){
+            call Timer.startPeriodic((uint32_t)(896U+(call Random.rand16()&0xFF)) * BEACON_RATE);
+        }
+        else
+            call Timer.stop();
+
+        mode = mode_;
+        return SUCCESS;
+    }
+
+    command uint8_t TimeSyncMode.getMode(){
+        return mode;
+    }
+
+    command error_t TimeSyncMode.send(){
+        if (mode == TS_USER_MODE){
+            timeSyncMsgSend();
+            return SUCCESS;
+        }
+        return FAIL;
+    }
+
+    command error_t Init.init()
+    {
+        atomic{
+            skew = 0.0;
+            localAverage = 0;
+            offsetAverage = 0;
+        };
+
+        clearTable();
+
+        atomic outgoingMsg = (TimeSyncMsg*)call Send.getPayload(&outgoingMsgBuffer, sizeof(TimeSyncMsg));
+        outgoingMsg->rootID = 0xFFFF;
+
+        processedMsg = &processedMsgBuffer;
+        state = STATE_INIT;
+
+        return SUCCESS;
+    }
+
+    event void Boot.booted()
+    {
+      call RadioControl.start();
+      call StdControl.start();
+    }
+
+    command error_t StdControl.start()
+    {
+        heartBeats = 0;
+        outgoingMsg->nodeID = TOS_NODE_ID;
+        call TimeSyncMode.setMode(TS_TIMER_MODE);
+
+        return SUCCESS;
+    }
+
+    command error_t StdControl.stop()
+    {
+        call Timer.stop();
+        return SUCCESS;
+    }
+
+    async command float     TimeSyncInfo.getSkew() { return skew; }
+    async command uint32_t  TimeSyncInfo.getOffset() { return offsetAverage; }
+    async command uint32_t  TimeSyncInfo.getSyncPoint() { return localAverage; }
+    async command uint16_t  TimeSyncInfo.getRootID() { return outgoingMsg->rootID; }
+    async command uint8_t   TimeSyncInfo.getSeqNum() { return outgoingMsg->seqNum; }
+    async command uint8_t   TimeSyncInfo.getNumEntries() { return numEntries; }
+    async command uint8_t   TimeSyncInfo.getHeartBeats() { return heartBeats; }
+
+    default event void TimeSyncNotify.msg_received(){}
+    default event void TimeSyncNotify.msg_sent(){}
+
+    event void RadioControl.startDone(error_t error){}
+    event void RadioControl.stopDone(error_t error){}
+}
diff --git a/tos/lib/gpio/SoftCaptureC.nc b/tos/lib/gpio/SoftCaptureC.nc
new file mode 100644
index 00000000..27ac65e5
--- /dev/null
+++ b/tos/lib/gpio/SoftCaptureC.nc
@@ -0,0 +1,63 @@
+// $Id: SoftCaptureC.nc,v 1.6 2008-06-11 00:46:24 razvanm Exp $
+
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+/**
+ * Emulates GPIO capture functionality using GpioInterrupt and the 
+ * standard 32khz counter
+ *
+ * @author Phil Buonadonna
+ */
+generic configuration SoftCaptureC() 
+{
+  provides interface GpioCapture;
+  uses interface GpioInterrupt;
+}
+
+implementation
+{
+  components new SoftCaptureP();
+  components Counter32khzC;
+  
+  GpioCapture = SoftCaptureP;
+  GpioInterrupt = SoftCaptureP;
+
+  SoftCaptureP.Counter32khz32 -> Counter32khzC.Counter32khz32;
+}
+
diff --git a/tos/lib/gpio/SoftCaptureP.nc b/tos/lib/gpio/SoftCaptureP.nc
new file mode 100644
index 00000000..465b58c7
--- /dev/null
+++ b/tos/lib/gpio/SoftCaptureP.nc
@@ -0,0 +1,87 @@
+// $Id: SoftCaptureP.nc,v 1.6 2008-06-11 00:46:24 razvanm Exp $
+
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+/**
+ * Emulates GPIO capture functionality using GpioInterrupt and the 
+ * standard 32khz counter
+ *
+ * @author Phil Buonadonna
+ */
+generic module SoftCaptureP ()
+{
+  provides interface GpioCapture;
+  uses {
+    interface GpioInterrupt;
+    interface Counter<T32khz,uint32_t> as Counter32khz32;
+  }
+}
+
+implementation 
+{
+
+  async command error_t GpioCapture.captureRisingEdge() {
+    return (call GpioInterrupt.enableRisingEdge());
+  }
+
+  async command error_t GpioCapture.captureFallingEdge() {
+    return (call GpioInterrupt.enableFallingEdge());
+  }
+
+  async command void GpioCapture.disable() {
+    call GpioInterrupt.disable();
+    return;
+  }
+  
+  async event void GpioInterrupt.fired() {
+    uint16_t captureTime;
+
+    captureTime = (uint16_t) call Counter32khz32.get();
+    signal GpioCapture.captured(captureTime);
+    return;
+  }
+
+  async event void Counter32khz32.overflow() {
+    return;
+  }
+
+  default async event void GpioCapture.captured(uint16_t time) {
+    return;
+  }
+}
diff --git a/tos/lib/gpio/SoftIrqC.nc b/tos/lib/gpio/SoftIrqC.nc
new file mode 100644
index 00000000..201e76d0
--- /dev/null
+++ b/tos/lib/gpio/SoftIrqC.nc
@@ -0,0 +1,58 @@
+/**
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Martin Turon <mturon@xbow.com>
+ *
+ *  $Id: SoftIrqC.nc,v 1.5 2010-06-29 22:07:47 scipio Exp $
+ */
+
+/**
+ * Software emulation of external interrupt pin.
+ */
+generic configuration SoftIrqC (uint8_t interval) {
+    provides {
+	interface Interrupt;         // interrupt interface to emulate
+    }
+    uses {
+	interface GeneralIO;         // pin to poll for irq
+    }
+}
+implementation
+{
+    components
+	new SoftIrqP(interval), 
+	new TimerMilliC() as IrqTimer;
+
+    Interrupt = SoftIrqP;
+    GeneralIO = SoftIrqP;
+    
+    SoftIrqP.IrqTimer -> IrqTimer;   // strap into an OSKI system timer
+}
diff --git a/tos/lib/gpio/SoftIrqP.nc b/tos/lib/gpio/SoftIrqP.nc
new file mode 100644
index 00000000..3560ce77
--- /dev/null
+++ b/tos/lib/gpio/SoftIrqP.nc
@@ -0,0 +1,99 @@
+/**
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Matt Miller, Crossbow <mmiller@xbow.com>
+ *  @author Martin Turon, Crossbow <mturon@xbow.com>
+ *
+ *  $Id: SoftIrqP.nc,v 1.5 2010-06-29 22:07:47 scipio Exp $
+ */
+
+/**
+ * Interrupt emulation interface access for GPIO pins.
+ *
+ * @param  interval   How often to check soft irq pin in msec
+ */
+generic module SoftIrqP (uint8_t interval)
+{
+    provides interface Interrupt as SoftIrq;
+    
+    uses {
+	interface Timer<TMilli> as IrqTimer;
+	interface GeneralIO as IrqPin;
+    }
+}
+implementation
+{
+    norace struct {
+	uint8_t final : 1;
+	uint8_t last  : 1;
+    } state;
+
+    // ************* SoftIrq Interrupt handlers and dispatch *************
+  
+    /**
+     * Enable an edge interrupt on a SoftIrq pin that is not capable of 
+     * external hardware INTERRUPT.  Best we can do is poll periodically 
+     * and monitor line level changes
+     */
+    async command error_t SoftIrq.startWait(bool low_to_high) {	
+	atomic { state.final = low_to_high; }    // save state we await
+	state.last = call IrqPin.get();          // get current state
+	call IrqTimer.startOneShotNow(interval); // wait interval in msec
+	return SUCCESS;
+    }
+    
+    /**
+     * Timer Event fired so now check SoftIrq pin level
+     */
+    event void IrqTimer.fired() {
+	uint8_t  l_state = call IrqPin.get();
+
+	if ((state.last != state.final) && 
+	    (state.final == l_state)) {
+	    // If we found an edge, fire SoftIrq!
+	    signal SoftIrq.fired();
+        } 
+
+	// Otherwise, restart timer and try again
+	state.last = l_state;
+	return call IrqTimer.startOneShotNow(interval);
+    }  
+    
+    /**
+     * disables Irq interrupts
+     */
+    async command error_t SoftIrq.disable() {
+	call IrqTimer.stop();
+	return SUCCESS;
+    }
+    
+    //default async event void SoftIrq.fired() { return FAIL; }
+}
diff --git a/tos/lib/mac/tkn154/AssociateP.nc b/tos/lib/mac/tkn154/AssociateP.nc
new file mode 100644
index 00000000..4d3ba74a
--- /dev/null
+++ b/tos/lib/mac/tkn154/AssociateP.nc
@@ -0,0 +1,331 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.9 $
+ * $Date: 2009-12-14 12:50:06 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+
+#include "TKN154_MAC.h"
+
+module AssociateP
+{
+  provides
+  {
+    interface Init;
+    interface MLME_ASSOCIATE;
+    interface MLME_COMM_STATUS;
+  }
+  uses
+  {
+    interface FrameRx as AssociationRequestRx;
+    interface FrameTx as AssociationRequestTx;
+    interface FrameExtracted as AssociationResponseExtracted;
+    interface FrameTx as AssociationResponseTx;
+
+    interface DataRequest;
+    interface Timer<TSymbolIEEE802154> as ResponseTimeout;
+    interface Pool<ieee154_txframe_t> as TxFramePool;
+    interface Pool<ieee154_txcontrol_t> as TxControlPool;
+    interface MLME_GET;
+    interface MLME_SET;
+    interface FrameUtility;
+    interface IEEE154Frame as Frame;
+    interface Get<uint64_t> as LocalExtendedAddress;
+  }
+}
+implementation
+{
+  enum {
+    S_IDLE = 0xFF,
+  };
+  uint8_t m_payloadAssocRequest[2];
+  uint8_t m_payloadAssocResponse[MAX_PENDING_ASSOC_RESPONSES][4];
+  uint8_t m_coordAddrMode;
+  uint8_t m_assocRespStatus;
+  uint16_t m_shortAddress;
+  bool m_associationOngoing;
+
+  command error_t Init.init()
+  {
+    uint8_t i;
+    call ResponseTimeout.stop();
+    m_payloadAssocRequest[0] = S_IDLE;
+    m_coordAddrMode = 0;
+    m_associationOngoing = FALSE;
+    for (i=0; i<MAX_PENDING_ASSOC_RESPONSES; i++)
+      m_payloadAssocResponse[i][0] = S_IDLE;
+    return SUCCESS;
+  }
+
+  /* ------------------- MLME_ASSOCIATE Request ------------------- */
+
+  command ieee154_status_t MLME_ASSOCIATE.request  (
+                          uint8_t LogicalChannel,
+                          uint8_t ChannelPage,
+                          uint8_t CoordAddrMode,
+                          uint16_t CoordPANID,
+                          ieee154_address_t CoordAddress,
+                          ieee154_CapabilityInformation_t CapabilityInformation,
+                          ieee154_security_t *security)
+  {
+    ieee154_status_t status = IEEE154_SUCCESS;
+    ieee154_txframe_t *txFrame=0;
+    ieee154_txcontrol_t *txControl=0;
+    ieee154_address_t srcAddress;
+
+    if (security && security->SecurityLevel)
+      status = IEEE154_UNSUPPORTED_SECURITY;
+    else if (ChannelPage != IEEE154_SUPPORTED_CHANNELPAGE || LogicalChannel > 26 ||
+         !(IEEE154_SUPPORTED_CHANNELS & ((uint32_t) 1 << LogicalChannel)) ||
+        (CoordAddrMode != ADDR_MODE_SHORT_ADDRESS && CoordAddrMode != ADDR_MODE_EXTENDED_ADDRESS))
+      status = IEEE154_INVALID_PARAMETER;
+    else if (m_associationOngoing || !(txFrame = call TxFramePool.get()))
+      status = IEEE154_TRANSACTION_OVERFLOW;
+    else if (!(txControl = call TxControlPool.get())) {
+      call TxFramePool.put(txFrame);
+      status = IEEE154_TRANSACTION_OVERFLOW;
+    }
+    if (status == IEEE154_SUCCESS) {
+      m_assocRespStatus = IEEE154_NO_DATA;
+      m_shortAddress = 0xFFFF;
+      call MLME_SET.phyCurrentChannel(LogicalChannel);
+      call MLME_SET.macPANId(CoordPANID);
+      m_coordAddrMode = CoordAddrMode;
+      if (CoordAddrMode == ADDR_MODE_SHORT_ADDRESS)
+        call MLME_SET.macCoordShortAddress(CoordAddress.shortAddress);
+      else
+        call MLME_SET.macCoordExtendedAddress(CoordAddress.extendedAddress);
+      txFrame->header = &txControl->header;
+      txFrame->metadata = &txControl->metadata;
+      srcAddress.extendedAddress = call LocalExtendedAddress.get();
+      txFrame->headerLen = call FrameUtility.writeHeader(
+          txFrame->header->mhr,
+          CoordAddrMode,
+          CoordPANID,
+          &CoordAddress,
+          ADDR_MODE_EXTENDED_ADDRESS,
+          0xFFFF,
+          &srcAddress,
+          0);
+      txFrame->header->mhr[MHR_INDEX_FC1] = FC1_ACK_REQUEST | FC1_FRAMETYPE_CMD;
+      txFrame->header->mhr[MHR_INDEX_FC2] = FC2_SRC_MODE_EXTENDED |
+        (CoordAddrMode == ADDR_MODE_SHORT_ADDRESS ? FC2_DEST_MODE_SHORT : FC2_DEST_MODE_EXTENDED);
+      m_payloadAssocRequest[0] = CMD_FRAME_ASSOCIATION_REQUEST;
+      m_payloadAssocRequest[1] = *((uint8_t*) &CapabilityInformation);
+      txFrame->payload = m_payloadAssocRequest;
+      txFrame->payloadLen = 2;
+      m_associationOngoing = TRUE;
+      if ((status = call AssociationRequestTx.transmit(txFrame)) != IEEE154_SUCCESS) {
+        m_associationOngoing = FALSE;
+        call TxFramePool.put(txFrame);
+        call TxControlPool.put(txControl);
+      }
+    }
+    dbg_serial("AssociationP", "MLME_ASSOCIATE.request -> result: %lu\n", (uint32_t) status);
+    return status;
+  }
+
+  event void AssociationRequestTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) txFrame->header - offsetof(ieee154_txcontrol_t, header)));
+    call TxFramePool.put(txFrame);
+    if (status != IEEE154_SUCCESS) {
+      dbg_serial("AssociationP", "transmitDone() failed!\n");
+      m_associationOngoing = FALSE;
+      signal MLME_ASSOCIATE.confirm(0xFFFF, status, 0);
+    } else {
+      // we expect a response from the coordinator within "macResponseWaitTime"
+      call ResponseTimeout.startOneShot(call MLME_GET.macResponseWaitTime()*IEEE154_aBaseSuperframeDuration);
+      dbg_serial("AssociationP", "transmitDone() ok, waiting for %lu\n", 
+          (uint32_t) (call MLME_GET.macResponseWaitTime() * IEEE154_aBaseSuperframeDuration));
+    }
+  }
+ 
+  event message_t* AssociationResponseExtracted.received(message_t* frame, ieee154_txframe_t *txFrame)
+  {
+    uint8_t *payload = (uint8_t *) &frame->data;
+    ieee154_macShortAddress_t shortAddress = *((nxle_uint16_t*) (payload + 1));
+    ieee154_status_t assocRespStatus = *(payload + 3);
+
+    if (m_associationOngoing) {
+      call ResponseTimeout.stop();
+      m_associationOngoing = FALSE;
+      if (assocRespStatus == IEEE154_ASSOCIATION_SUCCESSFUL) {
+        call MLME_SET.macShortAddress(shortAddress);
+        if ((call MLME_GET.macCoordShortAddress() != IEEE154_DEFAULT_COORDSHORTADDRESS) &&
+            (call Frame.getSrcAddrMode(frame) == ADDR_MODE_EXTENDED_ADDRESS)) {
+          ieee154_address_t coordExtendedAddress;
+          call Frame.getSrcAddr(frame, &coordExtendedAddress);
+          call MLME_SET.macCoordExtendedAddress(coordExtendedAddress.extendedAddress);
+        }
+      } else
+        call MLME_SET.macPANId(0xFFFF);
+      signal MLME_ASSOCIATE.confirm( call MLME_GET.macShortAddress(), assocRespStatus, NULL);
+      dbg_serial("AssociationP", "confirm, status:  %lu, my new address: 0x%lx\n", 
+          (uint32_t) assocRespStatus, (uint32_t) shortAddress);
+    }
+    return frame;
+  } 
+
+  event void ResponseTimeout.fired()
+  {
+    uint8_t coordAddress[8];
+
+    if (!m_associationOngoing)
+      return;
+
+    // have not yet received an AssociationResponse within "macResponseWaitTime", 
+    // -> we explicitly poll the coordinator now
+    dbg_serial("AssociationP", "Polling the coordinator for an AssociationResponse now...\n");
+    if (m_coordAddrMode == ADDR_MODE_SHORT_ADDRESS)
+      *((nxle_uint16_t*) &coordAddress) = call MLME_GET.macCoordShortAddress();
+    else
+      call FrameUtility.copyCoordExtendedAddressLE(coordAddress);
+
+    if (call DataRequest.poll(m_coordAddrMode, call MLME_GET.macPANId(), 
+          coordAddress, ADDR_MODE_EXTENDED_ADDRESS) != IEEE154_SUCCESS) {
+      signal DataRequest.pollDone(); // this will signal FAIL to the next higher layer
+      dbg_serial("AssociationP", "Poll failed (locally)...\n");
+    }
+  }
+
+  event void DataRequest.pollDone()
+  {
+    if (m_associationOngoing) {
+      // our explicit poll did not result in an AssociationResponse, give up...
+      call ResponseTimeout.stop();
+      m_associationOngoing = FALSE;
+      call MLME_SET.macPANId(0xFFFF);
+      signal MLME_ASSOCIATE.confirm(0xFFFF, IEEE154_NO_DATA, 0);
+      dbg_serial("AssociationP", "No AssociationResponse after polling...\n");
+    }
+  }
+
+  /* ------------------- MLME_ASSOCIATE Response ------------------- */
+
+  event message_t* AssociationRequestRx.received(message_t* frame)
+  {
+    uint8_t *payload = (uint8_t *) &frame->data;
+    ieee154_address_t srcAddress;
+    if (call Frame.getSrcAddrMode(frame) == ADDR_MODE_EXTENDED_ADDRESS &&
+        call Frame.getSrcAddr(frame, &srcAddress) == SUCCESS)
+      signal MLME_ASSOCIATE.indication(srcAddress.extendedAddress,
+          *((ieee154_CapabilityInformation_t*) (payload + 1)), 0);
+    return frame;
+  }
+
+  command ieee154_status_t MLME_ASSOCIATE.response (
+                          uint64_t deviceAddress,
+                          uint16_t assocShortAddress,
+                          ieee154_association_status_t status,
+                          ieee154_security_t *security)
+  {
+    uint8_t i;
+    ieee154_status_t txStatus = IEEE154_SUCCESS;
+    ieee154_txframe_t *txFrame;
+    ieee154_txcontrol_t *txControl;
+    ieee154_address_t srcAddress;
+
+    for (i=0; i<MAX_PENDING_ASSOC_RESPONSES;i++)
+      if (m_payloadAssocResponse[i][0] == S_IDLE)
+        break;    
+    if (security && security->SecurityLevel)
+      txStatus = IEEE154_UNSUPPORTED_SECURITY;
+    else if (i == MAX_PENDING_ASSOC_RESPONSES || !(txFrame = call TxFramePool.get()))
+      txStatus = IEEE154_TRANSACTION_OVERFLOW;
+    else if (!(txControl = call TxControlPool.get())) {
+      call TxFramePool.put(txFrame);
+      txStatus = IEEE154_TRANSACTION_OVERFLOW;
+    } else {
+      txFrame->header = &txControl->header;
+      txFrame->metadata = &txControl->metadata;      
+      txFrame->payload = m_payloadAssocResponse[i];
+      srcAddress.extendedAddress = call LocalExtendedAddress.get();
+      txFrame->headerLen = call FrameUtility.writeHeader(
+          txFrame->header->mhr,
+          ADDR_MODE_EXTENDED_ADDRESS,
+          call MLME_GET.macPANId(),
+          (ieee154_address_t*) &deviceAddress,
+          ADDR_MODE_EXTENDED_ADDRESS,
+          call MLME_GET.macPANId(),
+          &srcAddress,
+          1);
+      txFrame->header->mhr[MHR_INDEX_FC1] = FC1_ACK_REQUEST | FC1_FRAMETYPE_CMD | FC1_PAN_ID_COMPRESSION;
+      txFrame->header->mhr[MHR_INDEX_FC2] = FC2_SRC_MODE_EXTENDED | FC2_DEST_MODE_EXTENDED;
+      txFrame->payload[0] = CMD_FRAME_ASSOCIATION_RESPONSE;
+      *((nxle_uint16_t*) &txFrame->payload[1]) = assocShortAddress;
+      txFrame->payload[3] = status;
+      txFrame->payloadLen = 4;
+      if ((txStatus = call AssociationResponseTx.transmit(txFrame)) != IEEE154_SUCCESS) {
+        txFrame->payload[0] = S_IDLE;
+        call TxFramePool.put(txFrame);
+        call TxControlPool.put(txControl);
+      }
+    }
+    return txStatus;
+  }
+
+  event void AssociationResponseTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    ieee154_address_t srcAddress, deviceAddress;
+    srcAddress.extendedAddress = call LocalExtendedAddress.get();
+    if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_SHORT)
+      deviceAddress.shortAddress = *((nxle_uint16_t*) (&(txFrame->header->mhr[MHR_INDEX_ADDRESS]) + 2));
+    else
+      call FrameUtility.convertToNative(&deviceAddress.extendedAddress,  (&(txFrame->header->mhr[MHR_INDEX_ADDRESS]) + 2));
+    txFrame->payload[0] = S_IDLE;
+    call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) txFrame->header - offsetof(ieee154_txcontrol_t, header)));
+    call TxFramePool.put(txFrame);
+    signal MLME_COMM_STATUS.indication(call MLME_GET.macPANId(), ADDR_MODE_EXTENDED_ADDRESS,
+                          srcAddress, ADDR_MODE_EXTENDED_ADDRESS, deviceAddress,
+                          status, 0);
+  }
+
+  /* ------------------- Defaults ------------------- */
+
+  default event void MLME_ASSOCIATE.indication (
+                          uint64_t DeviceAddress,
+                          ieee154_CapabilityInformation_t CapabilityInformation,
+                          ieee154_security_t *security) {}
+  default event void MLME_ASSOCIATE.confirm    (
+                          uint16_t AssocShortAddress,
+                          uint8_t status,
+                          ieee154_security_t *security) {}
+  default event void MLME_COMM_STATUS.indication (
+                          uint16_t PANId,
+                          uint8_t SrcAddrMode,
+                          ieee154_address_t SrcAddr,
+                          uint8_t DstAddrMode,
+                          ieee154_address_t DstAddr,
+                          ieee154_status_t status,
+                          ieee154_security_t *security) {}
+}
diff --git a/tos/lib/mac/tkn154/BackupP.nc b/tos/lib/mac/tkn154/BackupP.nc
new file mode 100644
index 00000000..27fe3e20
--- /dev/null
+++ b/tos/lib/mac/tkn154/BackupP.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-06-16 18:00:22 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+generic module BackupP(typedef backup_t)
+{
+  provides
+  {
+    interface SetNow<backup_t*> as Store;
+    interface GetNow<backup_t*> as Retrieve;
+  }
+}
+implementation
+{
+  backup_t m_backup;
+  async command error_t Store.setNow(backup_t* backup)
+  {
+    memcpy(&m_backup, backup, sizeof(backup_t));
+    return SUCCESS;
+  }
+
+  async command backup_t* Retrieve.getNow()
+  {
+    return &m_backup;
+  }
+}
diff --git a/tos/lib/mac/tkn154/BeaconRequestRxP.nc b/tos/lib/mac/tkn154/BeaconRequestRxP.nc
new file mode 100644
index 00000000..7246dd6a
--- /dev/null
+++ b/tos/lib/mac/tkn154/BeaconRequestRxP.nc
@@ -0,0 +1,172 @@
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-05-28 09:52:54 $
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+
+#include "TKN154_MAC.h"
+#include "TKN154.h"
+module BeaconRequestRxP
+{
+  provides
+  {
+    interface Init as Reset;
+    interface IEEE154TxBeaconPayload;
+  }
+  uses
+  {
+    interface FrameRx as BeaconRequestRx;
+    interface FrameTx as BeaconRequestResponseTx;
+    interface MLME_GET;
+    interface FrameUtility;
+    interface IEEE154Frame as Frame;
+
+  }
+}
+implementation
+{
+  /* variables that describe the beacon (payload) */
+  norace ieee154_txframe_t  m_beaconFrame;
+  ieee154_header_t          m_header;
+  ieee154_metadata_t        m_metadata;  
+  uint8_t                   m_beaconPayloadLen;
+  uint8_t                   m_payload[IEEE154_aMaxBeaconPayloadLength];
+
+  /* ------------------- Init ------------------- */
+
+  command error_t Reset.init()
+  {
+    m_beaconPayloadLen = 0;
+    m_beaconFrame.header = &m_header;
+    m_beaconFrame.headerLen = 0;
+    m_beaconFrame.payload = m_payload;
+    m_beaconFrame.payloadLen = 4;  // first 4 bytes belong to superframe- & gts-fields
+    m_beaconFrame.metadata = &m_metadata;
+
+    dbg_serial("BeaconRequestResponderP","Init()\n");
+    return SUCCESS;
+  }
+
+  /* ------------------- Beacon-Request Response ------------------- */
+
+  task void sendBeaconTask(){
+    call BeaconRequestResponseTx.transmit(&m_beaconFrame);
+  }
+
+  event message_t* BeaconRequestRx.received(message_t* frame) 
+  {
+    uint8_t offset = 0;
+    ieee154_macShortAddress_t shortAddress = call MLME_GET.macShortAddress();
+    bool isShortAddr;
+
+    shortAddress = call MLME_GET.macShortAddress();
+    isShortAddr = (shortAddress != 0xFFFE);
+    m_beaconFrame.header->mhr[MHR_INDEX_FC1] = FC1_FRAMETYPE_BEACON;
+    m_beaconFrame.header->mhr[MHR_INDEX_FC2] = isShortAddr ? FC2_SRC_MODE_SHORT : FC2_SRC_MODE_EXTENDED;
+    offset = MHR_INDEX_ADDRESS;
+    *((nxle_uint16_t*) &m_beaconFrame.header->mhr[offset]) = call MLME_GET.macPANId();
+    offset += sizeof(ieee154_macPANId_t);
+    if (isShortAddr) {
+      *((nxle_uint16_t*) &m_beaconFrame.header->mhr[offset]) = shortAddress;
+      offset += sizeof(ieee154_macShortAddress_t);
+    } else {
+      call FrameUtility.copyLocalExtendedAddressLE(&m_beaconFrame.header->mhr[offset]);
+      offset += 8;
+    }
+    m_beaconFrame.headerLen = offset;
+
+    // Superframe-spec
+    m_payload[BEACON_INDEX_SF_SPEC1] = 0xff; // beacon- and superframe order always 15 in nonbeacon-enabled mode
+    m_payload[BEACON_INDEX_SF_SPEC2] = 0x00; 
+    if (call MLME_GET.macPanCoordinator() == TRUE) 
+      m_payload[BEACON_INDEX_SF_SPEC2] |= SF_SPEC2_PAN_COORD;
+    if (call MLME_GET.macAssociationPermit() == TRUE) 
+      m_payload[BEACON_INDEX_SF_SPEC2] |= SF_SPEC2_ASSOCIATION_PERMIT;
+    if (call MLME_GET.macBattLifeExt() == TRUE) 
+      m_payload[BEACON_INDEX_SF_SPEC2] |= SF_SPEC2_BATT_LIFE_EXT;
+    // GTS-spec
+    m_payload[BEACON_INDEX_GTS_SPEC] = 0;
+    // Pending-Address-spec (behind empty single-byte GTS field)
+    m_payload[BEACON_INDEX_GTS_SPEC + 1] = 0;
+
+    signal IEEE154TxBeaconPayload.aboutToTransmit(); 
+    post sendBeaconTask();
+
+    return frame;
+
+  }
+ 
+  event void BeaconRequestResponseTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status){
+    signal IEEE154TxBeaconPayload.beaconTransmitted();
+  }
+
+  /* ----------------------- Beacon Payload ----------------------- */
+
+  command error_t IEEE154TxBeaconPayload.setBeaconPayload(void *beaconPayload, uint8_t length) {
+    dbg_serial("BeaconRequestResponderP","IEEE154TxBeaconPayload.setBeaconPayload\n\n");
+    if (length < IEEE154_aMaxBeaconPayloadLength){
+      memcpy(&m_payload[4], beaconPayload, length);
+      m_beaconFrame.payloadLen = 4 + length;
+      signal IEEE154TxBeaconPayload.setBeaconPayloadDone(beaconPayload, length); 
+      return SUCCESS;
+    } else 
+      return ESIZE;
+  }
+
+  command const void* IEEE154TxBeaconPayload.getBeaconPayload(){
+    return &m_payload[4]; // the first four bytes are non-user bytes
+  }
+
+  command uint8_t IEEE154TxBeaconPayload.getBeaconPayloadLength(){
+    return m_beaconFrame.payloadLen - 4; // Beacon-Payload in NonBeaconed mode at least 4 bytes (non-user payload) 
+  }
+
+  command error_t IEEE154TxBeaconPayload.modifyBeaconPayload(uint8_t offset, void *buffer, uint8_t bufferLength){
+    uint16_t totalLen = offset + bufferLength;
+    if (totalLen > IEEE154_aMaxBeaconPayloadLength ||
+        call IEEE154TxBeaconPayload.getBeaconPayloadLength() < totalLen)
+      return ESIZE;
+    else {
+      memcpy(&m_payload[4+offset], buffer, bufferLength);
+      signal IEEE154TxBeaconPayload.modifyBeaconPayloadDone(offset, buffer , bufferLength); 
+    }
+    return SUCCESS;
+  }
+
+  default event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) {}
+  default event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) {}
+  default event void IEEE154TxBeaconPayload.aboutToTransmit() {}
+  default event void IEEE154TxBeaconPayload.beaconTransmitted() {}
+
+}
+
diff --git a/tos/lib/mac/tkn154/BeaconSynchronizeP.nc b/tos/lib/mac/tkn154/BeaconSynchronizeP.nc
new file mode 100644
index 00000000..f09ad571
--- /dev/null
+++ b/tos/lib/mac/tkn154/BeaconSynchronizeP.nc
@@ -0,0 +1,578 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.11 $
+ * $Date: 2009-12-14 12:50:06 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * This module is responsible for periodic beacon tracking in a 
+ * beacon-enabled PAN.
+ */
+
+#include "TKN154_MAC.h"
+
+module BeaconSynchronizeP
+{
+  provides
+  {
+    interface Init as Reset;
+    interface MLME_SYNC;
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_SYNC_LOSS;
+    interface SuperframeStructure as IncomingSF;
+    interface GetNow<bool> as IsTrackingBeacons;
+    interface SplitControl as TrackSingleBeacon;
+  }
+  uses
+  {
+    interface MLME_GET;
+    interface MLME_SET;
+    interface FrameUtility;
+    interface IEEE154BeaconFrame as BeaconFrame;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as TrackAlarm;
+    interface RadioRx as BeaconRx;
+    interface RadioOff;
+    interface DataRequest;
+    interface FrameRx as CoordRealignmentRx;
+    interface TransferableResource as RadioToken;
+    interface TimeCalc;
+    interface IEEE154Frame as Frame;
+    interface Leds;
+  }
+}
+implementation
+{
+  /* state variables */
+  norace uint8_t m_state;
+  norace uint8_t m_numBeaconsMissed;
+
+  /* temporary buffers for the MLME-SYNC parameters */
+  uint8_t m_updateLogicalChannel;
+  bool m_updateTrackBeacon;
+
+  /* variables that describe the current beacon configuration */
+  norace ieee154_macBeaconOrder_t m_beaconOrder;
+  norace uint32_t m_dt;
+  norace uint32_t m_lastBeaconRxTime;
+  message_t m_beacon;
+  norace message_t *m_beaconPtr = &m_beacon;
+
+  /* variables that describe the latest superframe */
+  norace uint32_t m_sfSlotDuration;
+  norace bool m_framePendingBit;
+  norace uint8_t m_numCapSlots;
+  norace uint8_t m_numGtsSlots;
+  norace uint16_t m_battLifeExtDuration;
+  uint8_t m_gtsField[1+1+3*7];
+  
+  enum {
+    RX_PREPARE = 0x00,
+    RX_RECEIVING = 0x01,
+    RX_RADIO_OFF = 0x02,
+    RX_FIRST_SCAN= 0x03,
+    RX_MASK = 0x03,
+
+    MODE_INACTIVE = 0x00,
+    MODE_TRACK_SINGLE = 0x04,
+    MODE_TRACK_CONTINUOUS = 0x08,
+    MODE_MASK = 0x0C,
+
+    BEACON_RECEIVED = 0x10,
+    UPDATE_PENDING = 0x20,
+    INTERNAL_REQUEST = 0x40,
+    EXTERNAL_REQUEST = 0x80,
+  };
+
+  /* function/task prototypes */
+  void trackNextBeacon();
+  uint32_t getBeaconInterval(ieee154_macBeaconOrder_t BO);
+  task void processBeaconTask();
+  task void signalGrantedTask();
+
+  /* accessing/manipulating the current state */
+  void setBeaconReceived() { m_state |= BEACON_RECEIVED; }
+  void resetBeaconReceived() { m_state &= ~BEACON_RECEIVED; }
+  bool wasBeaconReceived() { return (m_state & BEACON_RECEIVED) ? TRUE : FALSE; }
+  void setUpdatePending() { m_state |= UPDATE_PENDING; }
+  void resetUpdatePending() { m_state &= ~UPDATE_PENDING; }
+  bool isUpdatePending() { return (m_state & UPDATE_PENDING) ? TRUE : FALSE; }
+  void setInternalRequest() { m_state |= INTERNAL_REQUEST; }
+  void resetInternalRequest() { m_state &= ~INTERNAL_REQUEST; }
+  bool isInternalRequest() { return (m_state & INTERNAL_REQUEST) ? TRUE : FALSE; }
+  void setExternalRequest() { m_state |= EXTERNAL_REQUEST; }
+  void resetExternalRequest() { m_state &= ~EXTERNAL_REQUEST; }
+  bool isExternalRequest() { return (m_state & EXTERNAL_REQUEST) ? TRUE : FALSE; }
+  uint8_t getMode() { return (m_state & MODE_MASK); }
+  void setMode(uint8_t mode) { m_state &= ~MODE_MASK; m_state |= (mode & MODE_MASK); }
+  uint8_t getRxState() { return (m_state & RX_MASK); }
+  void setRxState(uint8_t state) { m_state &= ~RX_MASK; m_state |= (state & RX_MASK); }  
+  
+  command error_t Reset.init()
+  {
+    // Reset this component - will only be called while we're not owning the token
+    if (call IsTrackingBeacons.getNow() || 
+        (isUpdatePending() && isExternalRequest() && m_updateTrackBeacon))
+      signal MLME_SYNC_LOSS.indication(
+          IEEE154_BEACON_LOSS,
+          call MLME_GET.macPANId(),
+          call MLME_GET.phyCurrentChannel(),
+          call MLME_GET.phyCurrentPage(),
+          NULL);
+    if (isInternalRequest())
+      signal TrackSingleBeacon.startDone(FAIL);
+    resetUpdatePending();
+    resetInternalRequest();
+    resetExternalRequest();
+    setMode(MODE_INACTIVE); 
+    return SUCCESS;
+  }  
+
+  /* ----------------------- MLME-SYNC ----------------------- */
+  /*
+   * Allows to synchronize with the beacons from a coordinator.
+   */
+
+  command ieee154_status_t MLME_SYNC.request  (
+      uint8_t logicalChannel,
+      uint8_t channelPage,
+      bool trackBeacon)
+  {
+    error_t status = IEEE154_SUCCESS;
+    uint32_t supportedChannels = IEEE154_SUPPORTED_CHANNELS;
+    uint32_t currentChannelBit = 1;
+
+    currentChannelBit <<= logicalChannel;
+    if (!(currentChannelBit & supportedChannels) || (call MLME_GET.macPANId() == 0xFFFF) ||
+        (channelPage != IEEE154_SUPPORTED_CHANNELPAGE) || !IEEE154_BEACON_ENABLED_PAN)
+      status = IEEE154_INVALID_PARAMETER;
+    else {
+      m_updateTrackBeacon = trackBeacon;
+      m_updateLogicalChannel = logicalChannel;
+      setExternalRequest();
+      setUpdatePending();
+      call RadioToken.request();
+    }
+
+    dbg_serial("BeaconSynchronizeP", "MLME_SYNC.request -> result: %lu\n", (uint32_t) status);
+    return status;
+  }
+
+  event void RadioToken.granted()
+  {
+    if (isUpdatePending()) {
+      dbg_serial("BeaconSynchronizeP", "Updating configuration...\n"); 
+      if (m_updateTrackBeacon)
+        setMode(MODE_TRACK_CONTINUOUS);
+      else
+        setMode(MODE_TRACK_SINGLE);
+      call MLME_SET.phyCurrentChannel(m_updateLogicalChannel);
+      m_beaconOrder = call MLME_GET.macBeaconOrder();
+      m_dt = getBeaconInterval(m_beaconOrder);
+      m_numBeaconsMissed = IEEE154_aMaxLostBeacons;  // will be reset when first beacon is received
+      resetUpdatePending();
+      setRxState(RX_FIRST_SCAN);
+    } 
+    trackNextBeacon();
+  }
+
+  async event void RadioToken.transferredFrom(uint8_t clientFrom)
+  {
+    dbg_serial("BeaconSynchronizeP", "Got token (transferred).\n");
+    if (isUpdatePending())
+      post signalGrantedTask();
+    else
+      trackNextBeacon();
+  }
+
+  task void signalGrantedTask()
+  {
+    signal RadioToken.granted();
+  }
+
+  void trackNextBeacon()
+  {
+    bool missed = FALSE;
+
+    if (getMode() == MODE_INACTIVE) {
+      // nothing to do, just give up the token
+      dbg_serial("BeaconSynchronizeP", "Stop tracking.\n");
+      call RadioToken.release();
+      return;
+    }
+
+    if (getRxState() != RX_FIRST_SCAN) {
+
+      dbg_serial("BeaconSynchronizeP","Token.transferred(), expecting beacon in %lu symbols.\n",
+        (uint32_t) ((m_lastBeaconRxTime + m_dt) - call TrackAlarm.getNow())); 
+
+      // we have received at least one previous beacon, get ready for the next
+      setRxState(RX_PREPARE);
+
+      while (call TimeCalc.hasExpired(m_lastBeaconRxTime, m_dt)) { // missed a beacon!
+        dbg_serial("BeaconSynchronizeP", "Missed a beacon, expected it: %lu, now: %lu\n", 
+            m_lastBeaconRxTime + m_dt, call TrackAlarm.getNow());
+        missed = TRUE;
+        m_dt += getBeaconInterval(m_beaconOrder);
+        m_numBeaconsMissed++;
+      }
+
+      if (m_numBeaconsMissed >= IEEE154_aMaxLostBeacons) {
+        dbg_serial("BeaconSynchronizeP", "Missed too many beacons.\n");
+        post processBeaconTask();
+        return;
+      }
+
+      if (missed) {
+        // let other components get a chance to use the radio
+        call RadioToken.request();
+        dbg_serial("BeaconSynchronizeP", "Skipping a beacon.\n");
+        call RadioToken.release();
+        return;
+      }
+    }
+
+    if (call RadioOff.isOff())
+      signal RadioOff.offDone();
+    else if (call RadioOff.off() != SUCCESS) 
+      ASSERT(0);
+  }
+
+  async event void RadioOff.offDone()
+  {
+    uint32_t delay = IEEE154_RADIO_RX_DELAY + IEEE154_MAX_BEACON_JITTER(m_beaconOrder);
+
+    if (getRxState() == RX_FIRST_SCAN) {
+      // initial scan: switch to Rx immediately
+      call BeaconRx.enableRx(0, 0);
+    } else if (getRxState() == RX_PREPARE) {
+      if (!call TimeCalc.hasExpired(m_lastBeaconRxTime - delay, m_dt))
+        call TrackAlarm.startAt(m_lastBeaconRxTime - delay, m_dt);
+      else
+        signal TrackAlarm.fired();
+    } else {
+      post processBeaconTask();
+    }
+  }
+
+  async event void BeaconRx.enableRxDone()
+  {
+    uint32_t dt;
+    uint8_t previousState = getRxState();
+
+    setRxState(RX_RECEIVING);
+
+    switch (previousState)
+    {
+      case RX_FIRST_SCAN: 
+        // "To acquire beacon synchronization, a device shall enable its 
+        // receiver and search for at most [aBaseSuperframeDuration * (2^n + 1)]
+        // symbols, where n is the value of macBeaconOrder [...] Once the number
+        // of missed beacons reaches aMaxLostBeacons, the MLME shall notify the 
+        // next higher layer." (Sect. 7.5.4.1)
+        dt = (((uint32_t) 1 << m_beaconOrder) + (uint32_t) 1) * 
+          (uint32_t) IEEE154_aBaseSuperframeDuration * 
+          (uint32_t) IEEE154_aMaxLostBeacons;
+        call TrackAlarm.start(dt);
+        dbg_serial("BeaconSynchronizeP","Rx enabled, expecting first beacon within next %lu symbols.\n", dt);
+        break;
+      case RX_PREPARE:
+        dt = m_dt + IEEE154_MAX_BEACON_LISTEN_TIME(m_beaconOrder);
+        call TrackAlarm.startAt(m_lastBeaconRxTime, dt);
+        dbg_serial("BeaconSynchronizeP","Rx enabled, expecting beacon within next %lu symbols.\n",
+            (uint32_t) ((m_lastBeaconRxTime + dt) - call TrackAlarm.getNow())); 
+        break;
+      default:
+        ASSERT(0);
+        break;
+    }
+  }
+
+  async event void TrackAlarm.fired()
+  {
+    if (getRxState() == RX_PREPARE) { // enable Rx
+      uint32_t maxBeaconJitter = IEEE154_MAX_BEACON_JITTER(m_beaconOrder);
+      if (maxBeaconJitter > m_dt)
+        maxBeaconJitter = m_dt; // receive immediately
+      call BeaconRx.enableRx(m_lastBeaconRxTime, m_dt - maxBeaconJitter);
+    } else { // disable Rx
+      error_t error = call RadioOff.off();
+      ASSERT(getRxState() == RX_RECEIVING && error == SUCCESS); 
+    }
+  }
+
+  event message_t* BeaconRx.received(message_t *frame)
+  {
+    if (wasBeaconReceived()) {
+      dbg_serial("BeaconSynchronizeP", "Got another beacon! -> ignoring it ...\n");
+      return frame;
+    } else if (!call FrameUtility.isBeaconFromCoord(frame)) {
+      dbg_serial("BeaconSynchronizeP", "Got a beacon, but not from my coordinator.\n");
+      return frame;
+    } else {
+      message_t *tmp = m_beaconPtr;
+      setBeaconReceived();
+      m_beaconPtr = frame;
+      dbg_serial("BeaconSynchronizeP", "Got beacon, timestamp: %lu, now: %lu\n", 
+          ((ieee154_metadata_t*) m_beaconPtr->metadata)->timestamp, (uint32_t) call TrackAlarm.getNow());
+      if (getRxState() == RX_RECEIVING) { 
+        call TrackAlarm.stop(); // may fail
+        call RadioOff.off();    // may fail
+      }
+      return tmp;
+    }
+  }
+
+
+
+  task void processBeaconTask()
+  {
+    // task will be executed after every (un)successful attempt to track a beacon
+    bool wasInternalRequest = isInternalRequest();
+    
+    if (wasBeaconReceived() && !call Frame.isTimestampValid(m_beaconPtr)) {
+      dbg_serial("BeaconSynchronizeP", "Received beacon has invalid timestamp, discarding it!\n");
+      resetBeaconReceived();
+    }
+
+    if (getMode() == MODE_TRACK_SINGLE)
+      setMode(MODE_INACTIVE); // we're done with a single shot
+    resetInternalRequest();
+
+    // whether we next release the token or pass it to the CAP 
+    // component, we want it back (because we decide later
+    // whether we'll actually stop tracking the beacon in future)
+    call RadioToken.request();  
+
+    if (!wasBeaconReceived()) {
+
+      resetBeaconReceived(); // buffer ready
+      m_numBeaconsMissed += 1;
+      m_dt += getBeaconInterval(m_beaconOrder);
+      dbg_serial("BeaconSynchronizeP", "Missed a beacon (total missed: %lu).\n", (uint32_t) m_numBeaconsMissed);
+
+      if (wasInternalRequest) {
+        // note: if it only was an internal request, the
+        // mode was reset above already (SINGLE_SHOT)
+        signal TrackSingleBeacon.startDone(FAIL);
+      } 
+      if (isExternalRequest() && m_numBeaconsMissed >= IEEE154_aMaxLostBeacons) {
+        resetExternalRequest();
+        setMode(MODE_INACTIVE);
+        dbg_serial("BeaconSynchronizeP", "MLME_SYNC_LOSS!\n");
+        signal MLME_SYNC_LOSS.indication( 
+            IEEE154_BEACON_LOSS, 
+            call MLME_GET.macPANId(),
+            call MLME_GET.phyCurrentChannel(),
+            call MLME_GET.phyCurrentPage(), 
+            NULL);
+      }
+
+      call RadioToken.release();
+    
+    } else { 
+      // received the beacon!
+      uint8_t *payload = (uint8_t *) m_beaconPtr->data;
+      ieee154_macAutoRequest_t autoRequest = call MLME_GET.macAutoRequest();
+      uint8_t pendAddrSpecOffset = 3 + (((payload[2] & 7) > 0) ? 1 + (payload[2] & 7) * 3: 0); // skip GTS
+      uint8_t pendAddrSpec = payload[pendAddrSpecOffset];
+      uint8_t *beaconPayload = payload + pendAddrSpecOffset + 1;
+      uint8_t beaconPayloadSize = call BeaconFrame.getBeaconPayloadLength(m_beaconPtr);
+      uint8_t pendingAddrMode = ADDR_MODE_NOT_PRESENT;
+      uint8_t *mhr = MHR(m_beaconPtr);
+      uint8_t frameLen = ((uint8_t*) m_beaconPtr)[0] & FRAMECTL_LENGTH_MASK;
+      uint8_t gtsFieldLength;
+      uint32_t timestamp = call Frame.getTimestamp(m_beaconPtr);
+
+      dbg_serial("BeaconSynchronizeP", "Got beacon, bsn: %lu, offset to last: %lu\n", 
+        (uint32_t) mhr[MHR_INDEX_SEQNO], (uint32_t) (timestamp - m_lastBeaconRxTime));
+
+      m_numBeaconsMissed = 0;
+      m_numGtsSlots = payload[BEACON_INDEX_GTS_SPEC] & GTS_DESCRIPTOR_COUNT_MASK;
+      gtsFieldLength = 1 + ((m_numGtsSlots > 0) ? 1 + m_numGtsSlots * 3: 0);
+      m_lastBeaconRxTime = timestamp;
+      m_numCapSlots = ((payload[BEACON_INDEX_SF_SPEC2] & SF_SPEC2_FINAL_CAPSLOT_MASK) >> SF_SPEC2_FINAL_CAPSLOT_OFFSET) + 1;
+      m_sfSlotDuration = (((uint32_t) 1) << ((payload[BEACON_INDEX_SF_SPEC1] & SF_SPEC1_SO_MASK) >> SF_SPEC1_SO_OFFSET)) * IEEE154_aBaseSlotDuration;
+      memcpy(m_gtsField, &payload[BEACON_INDEX_GTS_SPEC], gtsFieldLength);
+
+      // check for battery life extension
+      if (payload[BEACON_INDEX_SF_SPEC2] & SF_SPEC2_BATT_LIFE_EXT) {
+        // BLE is active; calculate the time offset from slot0
+        m_battLifeExtDuration = IEEE154_SHR_DURATION + frameLen * IEEE154_SYMBOLS_PER_OCTET;
+        if (frameLen > IEEE154_aMaxSIFSFrameSize)
+          m_battLifeExtDuration += call MLME_GET.macMinLIFSPeriod();
+        else
+          m_battLifeExtDuration += call MLME_GET.macMinSIFSPeriod();
+        m_battLifeExtDuration = m_battLifeExtDuration + call MLME_GET.macBattLifeExtPeriods() * 20;
+      } else
+        m_battLifeExtDuration = 0;
+
+      m_framePendingBit = mhr[MHR_INDEX_FC1] & FC1_FRAME_PENDING ? TRUE : FALSE;
+      m_beaconOrder = (payload[BEACON_INDEX_SF_SPEC1] & SF_SPEC1_BO_MASK) >> SF_SPEC1_BO_OFFSET; 
+      m_dt = getBeaconInterval(m_beaconOrder);
+
+      dbg_serial("BeaconSynchronizeP", "Handing over to CAP.\n");
+      call RadioToken.transferTo(RADIO_CLIENT_DEVICECAP); 
+      
+      if (pendAddrSpec & PENDING_ADDRESS_SHORT_MASK)
+        beaconPayload += (pendAddrSpec & PENDING_ADDRESS_SHORT_MASK) * 2;
+      if (pendAddrSpec & PENDING_ADDRESS_EXT_MASK)
+        beaconPayload += ((pendAddrSpec & PENDING_ADDRESS_EXT_MASK) >> 4) * 8;
+
+      // check for pending data (once we signal MLME_BEACON_NOTIFY we cannot
+      // touch this frame anymore!)
+      if (autoRequest)
+        pendingAddrMode = call BeaconFrame.isLocalAddrPending(m_beaconPtr);
+      if (pendingAddrMode != ADDR_MODE_NOT_PRESENT) {
+        // the coord has pending data
+        uint8_t CoordAddrMode;
+        uint16_t CoordPANId;
+        uint8_t *CoordAddress;
+        uint8_t SrcAddrMode = pendingAddrMode;
+        if ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == FC2_SRC_MODE_SHORT)
+          CoordAddrMode = ADDR_MODE_SHORT_ADDRESS;
+        else
+          CoordAddrMode = ADDR_MODE_EXTENDED_ADDRESS;
+        CoordAddress = &(mhr[MHR_INDEX_ADDRESS+2]);
+        CoordPANId = *((nxle_uint16_t*) &(mhr[MHR_INDEX_ADDRESS]));
+        call DataRequest.poll(CoordAddrMode, CoordPANId, CoordAddress, SrcAddrMode);
+      }
+
+      if (!autoRequest || beaconPayloadSize)
+        m_beaconPtr = signal MLME_BEACON_NOTIFY.indication(m_beaconPtr);
+      resetBeaconReceived(); // buffer ready
+    }
+    dbg_serial_flush();
+  }
+
+  command error_t TrackSingleBeacon.start()
+  {
+    // Track a single beacon now
+    dbg_serial("BeaconSynchronizeP", "Internal request.\n");
+    setInternalRequest();
+    call RadioToken.request();
+    if (!isUpdatePending()) {
+      m_updateLogicalChannel = call MLME_GET.phyCurrentChannel();
+      m_updateTrackBeacon = FALSE;
+      setUpdatePending();
+    }
+    return SUCCESS;
+  }
+
+  command error_t TrackSingleBeacon.stop()
+  {
+    // we will stop automatically after beacon was tracked/not found
+    return FAIL;
+  }
+  
+  /* -----------------------  SF Structure, etc. ----------------------- */
+
+  async command uint32_t IncomingSF.sfStartTime()
+  { 
+    return m_lastBeaconRxTime; 
+  }
+
+  async command uint32_t IncomingSF.sfSlotDuration()
+  { 
+    return m_sfSlotDuration;
+  }
+
+  async command uint8_t IncomingSF.numCapSlots()
+  {
+    return m_numCapSlots;
+  }
+
+  async command uint8_t IncomingSF.numGtsSlots()
+  {
+    return m_numGtsSlots;
+  }
+
+  async command uint16_t IncomingSF.battLifeExtDuration()
+  {
+    return m_battLifeExtDuration;
+  }
+
+  async command const uint8_t* IncomingSF.gtsFields()
+  {
+    return m_gtsField;
+  }
+
+  async command uint16_t IncomingSF.guardTime()
+  {
+    return IEEE154_MAX_BEACON_JITTER(m_beaconOrder) + IEEE154_RADIO_RX_DELAY;
+  }
+
+  async command bool IncomingSF.isBroadcastPending()
+  {
+    return m_framePendingBit;
+  }
+
+  async command uint32_t IncomingSF.beaconInterval()
+  {
+    return getBeaconInterval(m_beaconOrder);
+  }
+
+  async command bool IsTrackingBeacons.getNow()
+  { 
+    return (getMode() == MODE_TRACK_CONTINUOUS);
+  }
+
+  uint32_t getBeaconInterval(ieee154_macBeaconOrder_t BO)
+  {
+    if (BO >= 15)
+      BO = 14;
+    return (((uint32_t) 1 << BO) * (uint32_t) IEEE154_aBaseSuperframeDuration);
+  }
+
+  event void DataRequest.pollDone() {}
+
+  default event message_t* MLME_BEACON_NOTIFY.indication (message_t* frame) {return frame;}
+  default event void MLME_SYNC_LOSS.indication (
+                          ieee154_status_t lossReason,
+                          uint16_t panID,
+                          uint8_t logicalChannel,
+                          uint8_t channelPage,
+                          ieee154_security_t *security) {}
+
+  event message_t* CoordRealignmentRx.received(message_t* frame)
+  {
+    uint8_t *payload = call Frame.getPayload(frame);
+    ieee154_macPANId_t panID = *(nxle_uint16_t*) &payload[1];
+    if (panID == call MLME_GET.macPANId())
+        signal MLME_SYNC_LOSS.indication(
+          IEEE154_REALIGNMENT,   // LossReason
+          panID,                 // PANId
+          payload[5],            // LogicalChannel,
+          call Frame.getPayloadLength(frame) == 9 ? payload[8] : call MLME_GET.phyCurrentPage(),
+          NULL);
+    return frame;
+  }
+}
diff --git a/tos/lib/mac/tkn154/BeaconTransmitP.nc b/tos/lib/mac/tkn154/BeaconTransmitP.nc
new file mode 100644
index 00000000..b560d70f
--- /dev/null
+++ b/tos/lib/mac/tkn154/BeaconTransmitP.nc
@@ -0,0 +1,846 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.12 $
+ * $Date: 2010-01-05 16:41:16 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * This module is responsible for periodic beacon transmission in a 
+ * beacon-enabled PAN.
+ */
+
+#include "TKN154_MAC.h"
+#include "TKN154_PHY.h"
+module BeaconTransmitP
+{
+  provides
+  {
+    interface Init as Reset;
+    interface MLME_START;
+    interface IEEE154TxBeaconPayload;
+    interface SuperframeStructure as OutgoingSF;
+    interface GetNow<bool> as IsSendingBeacons;
+  } uses {
+    interface Notify<bool> as GtsSpecUpdated;
+    interface Notify<bool> as PendingAddrSpecUpdated;
+    interface Notify<const void*> as PIBUpdate[uint8_t attributeID];
+    interface Alarm<TSymbolIEEE802154,uint32_t> as BeaconSendAlarm;
+    interface Timer<TSymbolIEEE802154> as BeaconPayloadUpdateTimer;
+    interface RadioOff;
+    interface RadioTx as BeaconTx;
+    interface MLME_GET;
+    interface MLME_SET;
+    interface TransferableResource as RadioToken;
+    interface FrameTx as RealignmentBeaconEnabledTx;
+    interface FrameTx as RealignmentNonBeaconEnabledTx;
+    interface FrameRx as BeaconRequestRx;
+    interface WriteBeaconField as GtsInfoWrite;
+    interface WriteBeaconField as PendingAddrWrite;
+    interface FrameUtility;
+    interface GetNow<bool> as IsTrackingBeacons;
+    interface SuperframeStructure as IncomingSF;
+    interface Set<ieee154_macSuperframeOrder_t> as SetMacSuperframeOrder;
+    interface Set<ieee154_macBeaconTxTime_t> as SetMacBeaconTxTime;
+    interface Set<ieee154_macPanCoordinator_t> as SetMacPanCoordinator;
+    interface GetSet<ieee154_txframe_t*> as GetSetRealignmentFrame;
+    interface GetNow<bool> as IsBroadcastReady; 
+    interface TimeCalc;
+    interface Random;
+    interface Leds;
+  }
+}
+implementation
+{
+  /* state variables */
+  norace uint8_t m_requestBitmap;
+  norace uint8_t m_txState;
+  uint8_t m_payloadState;
+  norace bool m_txOneBeaconImmediately;
+
+  /* variables that describe the current superframe configuration */
+  norace uint32_t m_startTime;
+  norace uint8_t m_beaconOrder;
+  norace uint8_t m_superframeOrder;
+  norace uint32_t m_beaconInterval;
+  norace uint32_t m_previousBeaconInterval;
+  norace uint32_t m_dt;
+  norace uint32_t m_lastBeaconTxTime;
+  norace ieee154_macBattLifeExtPeriods_t m_battLifeExtPeriods;
+
+  /* variables that describe the latest superframe */
+  norace uint32_t m_sfSlotDuration;
+  norace bool m_framePendingBit;
+  norace uint8_t m_numCapSlots;
+  norace uint8_t m_numGtsSlots;
+  norace uint16_t m_battLifeExtDuration;
+  uint8_t m_gtsField[1+1+3*7];
+
+  /* variables that describe the beacon (payload) */
+  norace ieee154_txframe_t m_beaconFrame;
+  ieee154_header_t m_header; 
+  ieee154_metadata_t m_metadata; 
+  void *m_updateBeaconPayload;
+  uint8_t m_updateBeaconOffset;
+  uint8_t m_updateBeaconLength;
+  uint8_t m_beaconPayloadLen;
+  uint8_t m_pendingAddrLen;
+  uint8_t m_pendingGtsLen;
+
+  /* buffers for the parameters of the MLME-START request */
+  uint16_t m_updatePANId;
+  uint8_t m_updateLogicalChannel;
+  uint32_t m_updateStartTime;
+  norace uint8_t m_updateBeaconOrder;
+  uint8_t m_updateSuperframeOrder;
+  bool m_updatePANCoordinator;
+  bool m_updateBatteryLifeExtension;
+
+  enum {
+    MAX_BEACON_PAYLOAD_SIZE =  IEEE154_aMaxBeaconOverhead + IEEE154_aMaxBeaconPayloadLength,
+
+    REQUEST_UPDATE_SF = 0x01,
+    REQUEST_REALIGNMENT = 0x02,
+    REQUEST_CONFIRM_PENDING = 0x04,
+    REQUEST_REALIGNMENT_DONE_PENDING = 0x08,
+
+    MODIFIED_SF_SPEC = 0x01,
+    MODIFIED_GTS_FIELD = 0x02,
+    MODIFIED_PENDING_ADDR_FIELD = 0x04,
+    MODIFIED_SPECS_MASK = 0x0F,
+
+    MODIFIED_BEACON_PAYLOAD = 0x10,
+    MODIFIED_BEACON_PAYLOAD_NEW = 0x20,
+    MODIFIED_BEACON_PAYLOAD_MASK = 0xF0,
+
+    S_TX_IDLE = 0,
+    S_TX_LOCKED = 1,
+    S_TX_WAITING = 2,
+  };
+  uint8_t m_payload[MAX_BEACON_PAYLOAD_SIZE]; 
+
+  /* function/task prototypes */
+  task void txDoneTask();
+  task void signalStartConfirmSuccessTask();
+  void nextRound();
+  void prepareBeaconTransmission();
+  void continueStartRequest();
+  void finishRealignment(ieee154_txframe_t *frame, ieee154_status_t status);
+
+  command error_t Reset.init()
+  {
+    // reset this component, will only be called while we're not owning the token
+    // TODO: check to signal MLME_START.confirm ?
+
+    call MLME_SET.macBSN(call Random.rand16());
+    m_beaconFrame.header = &m_header;
+    m_beaconFrame.headerLen = 0;
+    m_beaconFrame.payload = m_payload;
+    m_beaconFrame.payloadLen = 0;
+    m_beaconFrame.metadata = &m_metadata;
+    m_updateBeaconPayload = NULL;
+    m_updateBeaconLength = 0;
+    m_requestBitmap = m_payloadState = m_txState = 0;
+    m_beaconPayloadLen = m_pendingAddrLen = m_pendingGtsLen = 0;
+    m_gtsField[0] = 0;
+    m_numCapSlots = 0;
+    m_numGtsSlots = 0;
+    m_beaconOrder = 15;
+    call BeaconPayloadUpdateTimer.stop();
+    call BeaconSendAlarm.stop();
+    return SUCCESS;
+  }
+
+  /* ----------------------- MLME-START ----------------------- */
+  /* "The MLME-START.request primitive allows the PAN coordinator to initiate a
+   * new PAN or to begin using a new superframe configuration. This primitive may
+   * also be used by a device already associated with an existing PAN to begin
+   * using a new superframe configuration." (IEEE 802.15.4-2006 Sect. 7.1.14.1)
+   **/
+
+  command ieee154_status_t MLME_START.request  (
+                          uint16_t panID,
+                          uint8_t logicalChannel,
+                          uint8_t channelPage,
+                          uint32_t startTime,
+                          uint8_t beaconOrder,
+                          uint8_t superframeOrder,
+                          bool panCoordinator,
+                          bool batteryLifeExtension,
+                          bool coordRealignment,
+                          ieee154_security_t *coordRealignSecurity,
+                          ieee154_security_t *beaconSecurity)
+  {
+    ieee154_status_t status = IEEE154_SUCCESS;
+    ieee154_macShortAddress_t shortAddress = call MLME_GET.macShortAddress();
+
+    // check parameters
+    if ((coordRealignSecurity && coordRealignSecurity->SecurityLevel) ||
+        (beaconSecurity && beaconSecurity->SecurityLevel))
+      status = IEEE154_UNSUPPORTED_SECURITY;
+    else if (shortAddress == 0xFFFF) 
+      status = IEEE154_NO_SHORT_ADDRESS;
+    else if (logicalChannel > 26 || beaconOrder > 15 || 
+        (channelPage != IEEE154_SUPPORTED_CHANNELPAGE) ||
+        !(IEEE154_SUPPORTED_CHANNELS & ((uint32_t) 1 << logicalChannel)) ||
+        (superframeOrder > beaconOrder))
+      status =  IEEE154_INVALID_PARAMETER;
+    else if (startTime && !call IsTrackingBeacons.getNow())
+      status = IEEE154_TRACKING_OFF;
+    else if (startTime & 0xFF000000)
+      status = IEEE154_INVALID_PARAMETER;
+    else if (m_requestBitmap & (REQUEST_CONFIRM_PENDING | REQUEST_UPDATE_SF))
+      status = IEEE154_TRANSACTION_OVERFLOW;
+    else {
+
+      // New configuration *will* be put in operation, we'll buffer
+      // the parameters now, and continue once we get the token.
+      if (panCoordinator)
+        startTime = 0;        // start immediately
+      if (beaconOrder == 15)
+        superframeOrder = 15; // beaconless PAN 
+      m_updatePANId = panID;
+      m_updateLogicalChannel = logicalChannel;
+      m_updateStartTime = startTime;
+      m_updateBeaconOrder = beaconOrder; 
+      m_updateSuperframeOrder = superframeOrder;
+      m_updatePANCoordinator = panCoordinator;
+      m_updateBatteryLifeExtension = batteryLifeExtension;   
+      m_requestBitmap = (REQUEST_CONFIRM_PENDING | REQUEST_UPDATE_SF); // lock
+
+      if (coordRealignment)
+        m_requestBitmap |= REQUEST_REALIGNMENT;
+      if (m_beaconOrder == 15) {
+        // We're not already transmitting beacons, i.e. we have to request the token
+        // (otherwise we'd get the token "automatically" for the next scheduled beacon).
+        call RadioToken.request();
+      }
+      // We'll continue the MLME_START operation in continueStartRequest() once we have the token
+    }
+    dbg_serial("BeaconTransmitP", "MLME_START.request -> result: %lu\n", (uint32_t) status);
+    return status;
+  }
+
+  void continueStartRequest()
+  {
+    uint8_t offset;
+    ieee154_macShortAddress_t shortAddress;
+    bool isShortAddr;
+
+    // (1) coord realignment?
+    if (m_requestBitmap & REQUEST_REALIGNMENT) {
+      ieee154_txframe_t *realignmentFrame = call GetSetRealignmentFrame.get();
+      m_requestBitmap &= ~REQUEST_REALIGNMENT;
+      if (realignmentFrame == NULL) {
+        // allocation failed!
+        m_requestBitmap = 0;
+        signal MLME_START.confirm(IEEE154_TRANSACTION_OVERFLOW);
+        return;
+      }
+      // set the payload portion of the realignmentFrame
+      // (the header fields are already set correctly)
+      realignmentFrame->payload[0] = CMD_FRAME_COORDINATOR_REALIGNMENT;
+      *((nxle_uint16_t*) &realignmentFrame->payload[1]) = m_updatePANId;
+      *((nxle_uint16_t*) &realignmentFrame->payload[3]) = call MLME_GET.macShortAddress();
+      realignmentFrame->payload[5] = m_updateLogicalChannel;
+      *((nxle_uint16_t*) &realignmentFrame->payload[6]) = 0xFFFF;
+      realignmentFrame->payloadLen = 8;
+      
+      if (m_beaconOrder < 15) {
+        // we're already transmitting beacons; the realignment frame
+        // must be sent (broadcast) after the next beacon
+        if (call RealignmentBeaconEnabledTx.transmit(realignmentFrame) != IEEE154_SUCCESS) {
+          m_requestBitmap = 0;
+          call GetSetRealignmentFrame.set(realignmentFrame);
+          signal MLME_START.confirm(IEEE154_TRANSACTION_OVERFLOW);
+        } else {
+          // The realignment frame will be transmitted immediately after 
+          // the next beacon - the result will be signalled in 
+          // RealignmentBeaconEnabledTx.transmitDone(). Only then the superframe
+          // structure is updated and MLME_START.confirm signalled.
+          m_requestBitmap |= REQUEST_REALIGNMENT_DONE_PENDING; // lock
+        }
+      } else {
+        // send realignment frame in unslotted csma-ca now
+        if (call RealignmentNonBeaconEnabledTx.transmit(realignmentFrame) != IEEE154_SUCCESS) {
+          m_requestBitmap = 0;
+          call GetSetRealignmentFrame.set(realignmentFrame);
+          signal MLME_START.confirm(IEEE154_TRANSACTION_OVERFLOW);
+        } else {
+          // A realignment frame will be transmitted now, the result will 
+          // be signalled in RealignmentNonBeaconEnabledTx.transmitDone(). Only 
+          // then the superframe structure is updated and MLME_START.confirm 
+          // signalled.
+          m_requestBitmap |= REQUEST_REALIGNMENT_DONE_PENDING; // lock
+        }
+      }
+      return; 
+    }
+
+    // (2) update internal state
+    m_startTime = m_updateStartTime;
+    m_txOneBeaconImmediately = FALSE;
+    m_previousBeaconInterval = 0;
+    if (m_startTime) {
+      m_lastBeaconTxTime = call IncomingSF.sfStartTime();
+    } else {
+      // no StartTime defined by next higher layer - but
+      // if a realignment frame was transmitted, the next
+      // beacon tx time must take the old BI into consideration
+      if (m_requestBitmap & REQUEST_REALIGNMENT_DONE_PENDING)
+        m_previousBeaconInterval = m_beaconInterval;
+      else
+        m_txOneBeaconImmediately = TRUE;
+    }
+    m_beaconOrder = m_updateBeaconOrder; 
+    m_superframeOrder = m_updateSuperframeOrder;
+    if (m_beaconOrder < 15) {
+      m_beaconInterval = ((uint32_t) 1 << m_updateBeaconOrder) * IEEE154_aBaseSuperframeDuration;
+    } else {
+      m_beaconInterval = 0;
+    }
+    m_dt = m_beaconInterval;
+    m_txState = S_TX_IDLE;
+    m_battLifeExtPeriods = call MLME_GET.macBattLifeExtPeriods();
+
+    // (3) update PIB
+    call MLME_SET.macBeaconOrder(m_beaconOrder);
+    call SetMacSuperframeOrder.set(m_superframeOrder);
+    call MLME_SET.macPANId(m_updatePANId);
+    call MLME_SET.phyCurrentChannel(m_updateLogicalChannel);
+    if (m_beaconOrder < 15)
+      call MLME_SET.macBattLifeExt(m_updateBatteryLifeExtension);
+    call SetMacPanCoordinator.set(m_updatePANCoordinator);
+
+    // (4) assemble beacon header and payload
+    shortAddress = call MLME_GET.macShortAddress();
+    isShortAddr = (shortAddress != 0xFFFE);
+    m_beaconFrame.header->mhr[MHR_INDEX_FC1] = FC1_FRAMETYPE_BEACON;
+    m_beaconFrame.header->mhr[MHR_INDEX_FC2] = isShortAddr ? FC2_SRC_MODE_SHORT : FC2_SRC_MODE_EXTENDED;
+    m_beaconFrame.header->mhr[MHR_INDEX_SEQNO] = call MLME_GET.macBSN() + 1;
+    offset = MHR_INDEX_ADDRESS;
+    *((nxle_uint16_t*) &m_beaconFrame.header->mhr[offset]) = m_updatePANId;
+    offset += sizeof(ieee154_macPANId_t);
+    if (isShortAddr) {
+      *((nxle_uint16_t*) &m_beaconFrame.header->mhr[offset]) = shortAddress;
+      offset += sizeof(ieee154_macShortAddress_t);
+    } else {
+      call FrameUtility.copyLocalExtendedAddressLE(&m_beaconFrame.header->mhr[offset]);
+      offset += 8;
+    }
+    m_beaconFrame.headerLen = offset;
+    m_payloadState |= MODIFIED_SPECS_MASK;    // update beacon payload
+    signal BeaconPayloadUpdateTimer.fired();  // assemble initial beacon payload
+
+    if (m_beaconOrder < 15) {
+      // beacon-enabled PAN, signal confirm after next 
+      // beacon has been transmitted (see MSC, Fig. 38)
+      m_requestBitmap = REQUEST_CONFIRM_PENDING;
+    } else {
+      // beaconless PAN, we're done
+      m_requestBitmap = 0;
+      signal MLME_START.confirm(IEEE154_SUCCESS);
+    }
+  }
+
+  task void signalGrantedTask()
+  {
+    signal RadioToken.granted();
+  }
+
+  event void RadioToken.granted()
+  {
+    dbg_serial("BeaconSynchronizeP","Token granted.\n");
+    if (m_requestBitmap & REQUEST_REALIGNMENT_DONE_PENDING) {
+      // very unlikely: we have not yet received a done()
+      // event after sending out a realignment frame 
+      dbg_serial("BeaconTransmitP", "Realignment pending (request: %lu) !\n", (uint32_t) m_requestBitmap);
+      post signalGrantedTask(); // spin
+      return;
+    } else if (m_requestBitmap & REQUEST_UPDATE_SF) {
+      dbg_serial("BeaconTransmitP","Putting new superframe spec into operation\n"); 
+      m_requestBitmap &= ~REQUEST_UPDATE_SF;
+      continueStartRequest();
+    }
+    nextRound();
+  }
+
+  void nextRound()
+  {
+    if (call RadioOff.isOff())
+      prepareBeaconTransmission();
+    else
+      ASSERT(call RadioOff.off() == SUCCESS); // will continue in prepareBeaconTransmission()
+  }
+
+  async event void RadioToken.transferredFrom(uint8_t fromClientID)
+  {
+    dbg_serial("BeaconTransmitP","Token transferred, will Tx beacon in %lu\n",
+        (uint32_t) ((m_lastBeaconTxTime + m_dt) - call BeaconSendAlarm.getNow())); 
+    if (m_requestBitmap & (REQUEST_REALIGNMENT_DONE_PENDING | REQUEST_UPDATE_SF))
+      post signalGrantedTask(); // need to be in sync context
+    else
+      nextRound();
+  }  
+
+  async event void RadioOff.offDone()
+  {
+    prepareBeaconTransmission();
+  }
+
+  void prepareBeaconTransmission()
+  {
+    if (m_txState == S_TX_LOCKED) {
+      // have not had time to finish processing the last sent beacon
+      dbg_serial("BeaconTransmitP", "Token was returned too fast!\n");
+      post signalGrantedTask();
+    } else if (m_beaconOrder == 15) {
+      // we're not sending any beacons!?
+      dbg_serial("BeaconTransmitP", "Stop sending beacons.\n");
+      call RadioToken.release();
+    } else {
+      // get ready for next beacon transmission
+      atomic {
+        uint32_t delay = IEEE154_RADIO_TX_DELAY; 
+        m_txState = S_TX_WAITING;
+        if (m_txOneBeaconImmediately) {
+          // transmit the beacon now
+          dbg_serial("BeaconTransmitP", "Sending a beacon immediately.\n");
+          signal BeaconSendAlarm.fired();
+          return;
+        } else if (m_startTime != 0) {
+          // a new sf spec was put into operation, with a user-defined StartTime    
+          // here m_lastBeaconTxTime is actually the last time a beacon was received
+
+          dbg_serial("BeaconTransmitP", "First beacon to be sent at %lu.\n", m_startTime);
+          m_dt = m_startTime;
+          m_startTime = 0;
+        } else if (m_previousBeaconInterval != 0) {
+          // a new sf spec was put into operation, after a realignment frame 
+          // broadcast; the next beacon time should still be calculated using the
+          // old BI (one last time)
+
+          dbg_serial("BeaconTransmitP", "Sending beacon after realignment dt=%lu.\n", m_previousBeaconInterval);
+          m_dt = m_previousBeaconInterval;
+          m_previousBeaconInterval = 0;
+          if (m_requestBitmap & REQUEST_CONFIRM_PENDING) {
+            // only now the next higher layer is to be informed 
+            m_requestBitmap &= ~REQUEST_CONFIRM_PENDING;
+            post signalStartConfirmSuccessTask();
+          }
+        }
+
+        // The next beacon should be transmitted at time m_lastBeaconTxTime + m_dt, where m_dt
+        // is typically the beacon interval. First we check if we're still in time.
+        while (call TimeCalc.hasExpired(m_lastBeaconTxTime, m_dt)) { 
+          // too late, we need to skip a beacon!
+          dbg_serial("BeaconTransmitP", "Skipping a beacon: scheduled=%lu, now=%lu.\n", 
+              (uint32_t) m_lastBeaconTxTime + m_dt, (uint32_t) call BeaconSendAlarm.getNow());
+          m_dt += m_beaconInterval;
+        }
+        if (!call TimeCalc.hasExpired(m_lastBeaconTxTime - delay, m_dt)) {
+          // don't load the beacon frame in the radio just yet - rather set a timer and
+          // give the next higher layer the chance to modify the beacon payload 
+          call BeaconSendAlarm.startAt(m_lastBeaconTxTime - delay, m_dt);
+        } else
+          signal BeaconSendAlarm.fired();
+      }
+    }
+  }
+
+  task void signalStartConfirmSuccessTask()
+  {
+    signal MLME_START.confirm(SUCCESS);
+  }
+
+  async event void BeaconSendAlarm.fired()
+  {
+    // start/schedule beacon transmission
+    m_txState = S_TX_LOCKED;
+
+    if (call IsBroadcastReady.getNow())
+      m_beaconFrame.header->mhr[MHR_INDEX_FC1] |= FC1_FRAME_PENDING;
+    else
+      m_beaconFrame.header->mhr[MHR_INDEX_FC1] &= ~FC1_FRAME_PENDING;
+
+    if (m_txOneBeaconImmediately) {
+      m_txOneBeaconImmediately = FALSE;
+      m_dt = 0;
+    }
+    call BeaconTx.transmit(&m_beaconFrame, m_lastBeaconTxTime, m_dt);
+    dbg_serial("BeaconTransmitP","Beacon Tx scheduled for %lu\n", m_lastBeaconTxTime + m_dt);
+  }
+
+  async event void BeaconTx.transmitDone(ieee154_txframe_t *frame, error_t result)
+  {
+    // The beacon frame was transmitted, i.e. the CAP has just started
+    // update the state then pass the token on to the next component 
+
+    uint8_t gtsFieldLength;
+    uint32_t timestamp = ((ieee154_metadata_t*) frame->metadata)->timestamp;
+
+    ASSERT(result == SUCCESS); // must succeed, we're sending without CCA or ACK request
+    if (timestamp != IEEE154_INVALID_TIMESTAMP) {
+      dbg_serial("BeaconTransmitP", "Beacon Tx (bsn: %lu), offset to last %lu\n", 
+          (uint32_t) frame->header->mhr[MHR_INDEX_SEQNO], (uint32_t) (timestamp - m_lastBeaconTxTime));
+      m_lastBeaconTxTime = timestamp;
+      m_dt = m_beaconInterval; // transmit the next beacon at m_lastBeaconTxTime + m_dt 
+    } else {
+      // Timestamp is invalid; this is bad. We need the beacon timestamp for the 
+      // slotted CSMA-CA, because it defines the slot reference time. We can't use this superframe
+      dbg_serial("BeaconTransmitP", "Invalid timestamp!\n");
+      m_dt += m_beaconInterval;
+      call RadioToken.request();
+      call RadioToken.release();      
+      return;
+    }
+
+    // update superframe-related variables
+    m_numGtsSlots = 
+      (frame->payload[BEACON_INDEX_GTS_SPEC] & GTS_DESCRIPTOR_COUNT_MASK) >> GTS_DESCRIPTOR_COUNT_OFFSET;
+    gtsFieldLength = 1 + ((m_numGtsSlots > 0) ? 1 + m_numGtsSlots * 3: 0);
+    m_numCapSlots = 
+      ((frame->payload[BEACON_INDEX_SF_SPEC2] & SF_SPEC2_FINAL_CAPSLOT_MASK) >> SF_SPEC2_FINAL_CAPSLOT_OFFSET) + 1;
+    m_sfSlotDuration = 
+      (((uint32_t) 1) << ((frame->payload[BEACON_INDEX_SF_SPEC1] & SF_SPEC1_SO_MASK) >> SF_SPEC1_SO_OFFSET)) * 
+      (uint32_t) IEEE154_aBaseSlotDuration;
+
+    if (frame->header->mhr[MHR_INDEX_FC1] & FC1_FRAME_PENDING)
+      m_framePendingBit = TRUE;
+    else
+      m_framePendingBit = FALSE;
+    memcpy(m_gtsField, &frame->payload[BEACON_INDEX_GTS_SPEC], gtsFieldLength);
+    if (frame->payload[BEACON_INDEX_SF_SPEC2] & SF_SPEC2_BATT_LIFE_EXT) {
+      // BLE is active; calculate the time offset from slot 0
+      m_battLifeExtDuration = IEEE154_SHR_DURATION + 
+        (frame->headerLen + frame->payloadLen + 2) * IEEE154_SYMBOLS_PER_OCTET; 
+      if (frame->headerLen + frame->payloadLen + 2 > IEEE154_aMaxSIFSFrameSize)
+        m_battLifeExtDuration += IEEE154_MIN_LIFS_PERIOD;
+      else
+        m_battLifeExtDuration += IEEE154_MIN_SIFS_PERIOD;
+      m_battLifeExtDuration = m_battLifeExtDuration + m_battLifeExtPeriods * 20;
+    } else
+      m_battLifeExtDuration = 0;
+
+    // we pass on the token now, but make a reservation to get it back 
+    // to transmit the next beacon (at the start of the next superframe)
+    call RadioToken.request();  
+    call RadioToken.transferTo(RADIO_CLIENT_COORDBROADCAST); 
+    post txDoneTask();
+  }
+
+  task void txDoneTask()
+  {
+    call MLME_SET.macBSN(m_beaconFrame.header->mhr[MHR_INDEX_SEQNO]);
+    m_beaconFrame.header->mhr[MHR_INDEX_SEQNO] += 1; // may be overwritten by the next higher layer
+    call SetMacBeaconTxTime.set(m_lastBeaconTxTime); // start of slot0, ie. first preamble byte of beacon
+    call BeaconPayloadUpdateTimer.startOneShotAt(m_lastBeaconTxTime, 
+        (m_beaconInterval>BEACON_PAYLOAD_UPDATE_INTERVAL) ? (m_beaconInterval - BEACON_PAYLOAD_UPDATE_INTERVAL): 0);
+    if (m_requestBitmap & REQUEST_CONFIRM_PENDING) {
+      m_requestBitmap &= ~REQUEST_CONFIRM_PENDING;
+      signal MLME_START.confirm(IEEE154_SUCCESS);
+    }
+    m_txState = S_TX_IDLE;
+    signal IEEE154TxBeaconPayload.beaconTransmitted();
+    dbg_serial_flush();
+  }
+
+
+  /* ----------------------- Beacon Payload ----------------------- */
+  /*
+   * All access to the payload fields in the beacon happen
+   * through a set of temporary variables/flags, and just before 
+   * the frame is loaded into the radio these changes are 
+   * written into the actual payload portion of the beacon frame.
+   */
+
+  command error_t IEEE154TxBeaconPayload.setBeaconPayload(void *beaconPayload, uint8_t length)
+  {
+    if (length > IEEE154_aMaxBeaconPayloadLength)
+      return ESIZE;
+    else {
+      if (m_payloadState & MODIFIED_BEACON_PAYLOAD)
+        return EBUSY;
+      m_updateBeaconPayload = beaconPayload;
+      m_updateBeaconLength = length;
+      m_updateBeaconOffset = 0;
+      m_payloadState |= (MODIFIED_BEACON_PAYLOAD | MODIFIED_BEACON_PAYLOAD_NEW);
+    }
+    return SUCCESS;
+  }
+
+  command const void* IEEE154TxBeaconPayload.getBeaconPayload()
+  {
+    return &m_payload[IEEE154_aMaxBeaconOverhead];
+  }
+
+  command uint8_t IEEE154TxBeaconPayload.getBeaconPayloadLength()
+  {
+    return m_beaconFrame.payloadLen - (m_pendingAddrLen + m_pendingGtsLen + 2);
+  }
+
+  command error_t IEEE154TxBeaconPayload.modifyBeaconPayload(uint8_t offset, void *buffer, uint8_t bufferLength)
+  {
+    uint16_t totalLen = offset + bufferLength;
+    if (totalLen > IEEE154_aMaxBeaconPayloadLength ||
+        call IEEE154TxBeaconPayload.getBeaconPayloadLength() < totalLen)
+      return ESIZE;
+    else {
+      if (m_payloadState & MODIFIED_BEACON_PAYLOAD)
+        return EBUSY;
+      m_updateBeaconPayload = buffer;
+      m_updateBeaconOffset = offset;
+      m_updateBeaconLength = bufferLength;
+      m_payloadState |= MODIFIED_BEACON_PAYLOAD;
+    }
+    return SUCCESS;
+  }
+
+  event void PIBUpdate.notify[uint8_t attributeID](const void* attributeValue)
+  {
+    switch (attributeID)
+    {
+      case IEEE154_macAssociationPermit:  
+        atomic m_payloadState |= MODIFIED_SF_SPEC;
+        break;
+      case IEEE154_macGTSPermit:
+        atomic m_payloadState |= MODIFIED_GTS_FIELD;
+        break;
+      default:
+        break;
+    }
+  }
+
+  event void PendingAddrSpecUpdated.notify(bool val)
+  {
+    atomic m_payloadState |= MODIFIED_PENDING_ADDR_FIELD;
+  }
+
+  event void GtsSpecUpdated.notify(bool val)
+  {
+    atomic m_payloadState |= MODIFIED_GTS_FIELD;
+  }
+
+  uint8_t getNumGtsSlots(uint8_t *gtsInfoField)
+  {
+    uint8_t i, num=0;
+    for (i=0; i<((gtsInfoField[0] & GTS_DESCRIPTOR_COUNT_MASK) >> GTS_DESCRIPTOR_COUNT_OFFSET); i++)
+      num += ((gtsInfoField[4+i*3] & GTS_LENGTH_MASK) >> GTS_LENGTH_OFFSET);
+    return num;
+  }
+
+  event void BeaconPayloadUpdateTimer.fired()
+  {
+    // in this order the MAC payload is updated:
+    // (1) pending addresses
+    // (2) GTS spec
+    // (3) SF spec
+    // (4) beacon payload (if there's enough time)
+    uint8_t len=0, *beaconSpecs = &m_payload[IEEE154_aMaxBeaconOverhead]; // going backwards
+    uint8_t beaconPayloadUpdated = 0, numGtsSlots = m_numGtsSlots;
+
+    atomic {
+      if (m_txState == S_TX_LOCKED) 
+      {
+        dbg_serial("BeaconTransmitP", "BeaconPayloadUpdateTimer fired too late!\n");
+        return; // too late !
+      }
+
+      // (1) update pending addresses
+      if (m_payloadState & MODIFIED_PENDING_ADDR_FIELD) {
+        len = call PendingAddrWrite.write(beaconSpecs-1, beaconSpecs-m_payload);
+        beaconSpecs -= len;
+        if (len != m_pendingAddrLen) {
+          m_pendingAddrLen = len;
+          m_payloadState |= MODIFIED_SPECS_MASK; // need to rewrite specs before
+        }
+      } else 
+        beaconSpecs -= m_pendingAddrLen;
+      
+      // (2) update GTS spec
+      if (m_payloadState & MODIFIED_GTS_FIELD) {
+        len = call GtsInfoWrite.write(beaconSpecs-1, beaconSpecs-m_payload);
+        beaconSpecs -= len;
+        numGtsSlots = getNumGtsSlots(beaconSpecs);
+        if (len != m_pendingGtsLen || ((15-numGtsSlots) != m_numCapSlots-1)) {
+          m_pendingGtsLen = len;
+          m_payloadState |= MODIFIED_SPECS_MASK; // need to rewrite specs before
+        }
+      } else 
+        beaconSpecs -= m_pendingGtsLen;
+
+      // (3) update SF spec
+      beaconSpecs -= 2; // sizeof SF Spec
+      if (m_payloadState & MODIFIED_SF_SPEC) {
+        beaconSpecs[BEACON_INDEX_SF_SPEC1] = 
+          (m_beaconOrder << SF_SPEC1_BO_OFFSET) | (m_superframeOrder << SF_SPEC1_SO_OFFSET);
+        beaconSpecs[BEACON_INDEX_SF_SPEC2] = 0;
+        if (call MLME_GET.macAssociationPermit())
+          beaconSpecs[BEACON_INDEX_SF_SPEC2] |= SF_SPEC2_ASSOCIATION_PERMIT;        
+        if (call MLME_GET.macPanCoordinator())
+          beaconSpecs[BEACON_INDEX_SF_SPEC2] |= SF_SPEC2_PAN_COORD;
+        beaconSpecs[BEACON_INDEX_SF_SPEC2] |= 
+          ((15-numGtsSlots) & SF_SPEC2_FINAL_CAPSLOT_MASK);
+      }
+      m_beaconFrame.payloadLen = (m_pendingAddrLen + m_pendingGtsLen + 2) + m_beaconPayloadLen;
+      m_beaconFrame.payload = beaconSpecs;
+      m_payloadState &= ~MODIFIED_SPECS_MASK; // clear flags
+    } // end atomic (give BeaconSendAlarm.fired() the chance to execute)
+
+    signal IEEE154TxBeaconPayload.aboutToTransmit();
+    m_beaconFrame.header->mhr[MHR_INDEX_SEQNO] = call MLME_GET.macBSN() + 1;
+
+    atomic {
+      // (4) try to update beacon payload 
+      if (m_txState == S_TX_LOCKED) 
+      {
+        dbg_serial("BeaconTransmitP", "Not enough time for beacon payload update!\n");
+        return; // too late !
+      }
+      if (m_payloadState & MODIFIED_BEACON_PAYLOAD) {
+        memcpy(&m_payload[IEEE154_aMaxBeaconOverhead + m_updateBeaconOffset], 
+            m_updateBeaconPayload, m_updateBeaconLength);
+        beaconPayloadUpdated = (m_payloadState & MODIFIED_BEACON_PAYLOAD_MASK);
+        if (beaconPayloadUpdated & MODIFIED_BEACON_PAYLOAD_NEW)
+          m_beaconPayloadLen = m_updateBeaconOffset + m_updateBeaconLength;
+      }
+      m_beaconFrame.payloadLen = (m_pendingAddrLen + m_pendingGtsLen + 2) + m_beaconPayloadLen;
+      m_payloadState &= ~MODIFIED_BEACON_PAYLOAD_MASK;
+    }
+    if (beaconPayloadUpdated) {
+      if ((beaconPayloadUpdated & MODIFIED_BEACON_PAYLOAD_NEW))
+        signal IEEE154TxBeaconPayload.setBeaconPayloadDone(m_updateBeaconPayload, m_updateBeaconLength);
+      else
+        signal IEEE154TxBeaconPayload.modifyBeaconPayloadDone(m_updateBeaconOffset,
+            m_updateBeaconPayload, m_updateBeaconLength);
+    }
+  }
+
+  /* ----------------------- Realignment ----------------------- */
+  /* In beaconenabled mode a realignment frame is broadcast in the CAP
+   * immediately after the beacon was transmitted.  In non-beaconenabled mode a
+   * realignment frame is sent using unslotted CSMA. In both cases, if the
+   * transmission was successful, the superframe spec should be updated now.
+   **/
+
+  event void RealignmentBeaconEnabledTx.transmitDone(ieee154_txframe_t *frame, ieee154_status_t status)
+  {
+    finishRealignment(frame, status);
+  }
+ 
+  event void RealignmentNonBeaconEnabledTx.transmitDone(ieee154_txframe_t *frame, ieee154_status_t status)
+  {
+    finishRealignment(frame, status);
+  }
+
+  void finishRealignment(ieee154_txframe_t *frame, ieee154_status_t status)
+  {
+    call GetSetRealignmentFrame.set(frame);
+    if (status == IEEE154_SUCCESS) {
+      continueStartRequest();
+      m_requestBitmap &= ~REQUEST_REALIGNMENT_DONE_PENDING; // unlock
+      // signal confirm where we calculate the next beacon transmission time
+    } else {
+      m_requestBitmap = 0;
+      signal MLME_START.confirm(status);
+    }
+  }
+
+  /* ----------------------- BeaconRequest ----------------------- */
+
+  event message_t* BeaconRequestRx.received(message_t* frame)
+  {
+    if (m_beaconOrder == 15) {
+      // transmit the beacon frame using unslotted CSMA-CA
+      // TODO
+    }
+    return frame;
+  }
+
+  /* -----------------------  SF Structure, etc. ----------------------- */
+
+  async command uint32_t OutgoingSF.sfStartTime()
+  { 
+    return m_lastBeaconTxTime; 
+  }
+
+  async command uint32_t OutgoingSF.sfSlotDuration()
+  { 
+    return m_sfSlotDuration;
+  }
+
+  async command uint8_t OutgoingSF.numCapSlots()
+  {
+    return m_numCapSlots;
+  }
+
+  async command uint8_t OutgoingSF.numGtsSlots()
+  {
+    return m_numGtsSlots;
+  }
+
+  async command uint16_t OutgoingSF.battLifeExtDuration()
+  {
+    return m_battLifeExtDuration;
+  }
+
+  async command const uint8_t* OutgoingSF.gtsFields()
+  {
+    return m_gtsField;
+  }
+
+  async command uint16_t OutgoingSF.guardTime()
+  {
+    return IEEE154_MAX_BEACON_JITTER(m_beaconOrder) + IEEE154_RADIO_TX_DELAY;
+  }
+
+  async command bool OutgoingSF.isBroadcastPending()
+  {
+    return m_framePendingBit;
+  }
+
+  async command uint32_t OutgoingSF.beaconInterval()
+  {
+    return ((uint32_t) 1 << m_beaconOrder) * IEEE154_aBaseSuperframeDuration;
+  }
+
+  async command bool IsSendingBeacons.getNow()
+  { 
+    return (m_beaconOrder < 15) || ((m_requestBitmap & REQUEST_CONFIRM_PENDING) && m_updateBeaconOrder < 15);
+  }
+
+  default event void MLME_START.confirm(ieee154_status_t status) {}
+  default event void IEEE154TxBeaconPayload.setBeaconPayloadDone(void *beaconPayload, uint8_t length) {}
+  default event void IEEE154TxBeaconPayload.modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength) {}
+  default event void IEEE154TxBeaconPayload.aboutToTransmit() {}
+  default event void IEEE154TxBeaconPayload.beaconTransmitted() {}
+
+}
diff --git a/tos/lib/mac/tkn154/CoordBroadcastP.nc b/tos/lib/mac/tkn154/CoordBroadcastP.nc
new file mode 100644
index 00000000..edb3d859
--- /dev/null
+++ b/tos/lib/mac/tkn154/CoordBroadcastP.nc
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2009-03-24 12:56:46 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/* This component is responsible for sending broadcast frames from
+ * a coordinator to devices.
+ **/
+
+#include "TKN154_MAC.h"
+module CoordBroadcastP
+{
+  provides
+  {
+    interface Init as Reset;
+    interface FrameTx as BroadcastDataFrame;
+    interface FrameTx as RealignmentTx;
+    interface GetNow<bool> as IsBroadcastReady; 
+  } uses {
+    interface Queue<ieee154_txframe_t*>; 
+    interface FrameTxNow as CapTransmitNow;
+    interface TransferableResource as RadioToken;
+    interface SuperframeStructure as OutgoingSF;
+  }
+}
+implementation
+{
+  norace bool m_lock;
+  norace ieee154_txframe_t *m_realignmentFrame;
+  norace ieee154_txframe_t *m_queueHead;
+  norace ieee154_txframe_t *m_transmittedFrame;
+  norace ieee154_status_t m_status;
+
+  task void transmitNowDoneTask();
+
+  command error_t Reset.init()
+  {
+    while (call Queue.size())
+      signal BroadcastDataFrame.transmitDone(call Queue.dequeue(), IEEE154_TRANSACTION_OVERFLOW);
+    if (m_realignmentFrame) 
+      signal RealignmentTx.transmitDone(m_realignmentFrame, IEEE154_TRANSACTION_OVERFLOW);
+    m_realignmentFrame = m_queueHead = m_transmittedFrame = NULL;
+    m_lock = FALSE;
+    return SUCCESS;
+  }
+
+  command ieee154_status_t BroadcastDataFrame.transmit(ieee154_txframe_t *txFrame)
+  {
+    if (call Queue.enqueue(txFrame) != SUCCESS)
+      return IEEE154_TRANSACTION_OVERFLOW;
+    atomic {
+      if (m_queueHead == NULL)
+        m_queueHead = call Queue.head();
+    }
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t RealignmentTx.transmit(ieee154_txframe_t *frame)
+  {
+    atomic {
+      if (!m_realignmentFrame) {
+        m_realignmentFrame = frame;
+        return IEEE154_SUCCESS;
+      } else
+        return IEEE154_TRANSACTION_OVERFLOW;
+    }
+  }
+
+  async command bool IsBroadcastReady.getNow()
+  {
+    if (m_lock)
+      return FALSE;
+    else
+      return (m_realignmentFrame != NULL || m_queueHead != NULL);
+  }
+
+  async event void RadioToken.transferredFrom(uint8_t fromClient)
+  {
+    // CAP has started - are there any broadcast frames to be transmitted?
+    if (call OutgoingSF.isBroadcastPending()) {
+      ieee154_txframe_t *broadcastFrame = m_realignmentFrame;
+      if (broadcastFrame == NULL)
+        broadcastFrame = m_queueHead;
+      ASSERT(broadcastFrame != NULL);
+      m_lock = TRUE;
+      call CapTransmitNow.transmitNow(broadcastFrame);
+    }
+    call RadioToken.transferTo(RADIO_CLIENT_COORDCAP);
+  }
+
+  async event void CapTransmitNow.transmitNowDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    m_transmittedFrame = txFrame;
+    m_status = status;
+    post transmitNowDoneTask();
+  }
+
+  task void transmitNowDoneTask()
+  {
+    if (!m_lock)
+      return;
+    if (m_transmittedFrame == m_realignmentFrame) {
+      m_realignmentFrame = NULL;
+      signal RealignmentTx.transmitDone(m_transmittedFrame, m_status);
+    } else if (m_transmittedFrame == m_queueHead) {
+      call Queue.dequeue();
+      if (call Queue.empty())
+        m_queueHead = NULL;
+      else
+        m_queueHead = call Queue.head();
+      signal BroadcastDataFrame.transmitDone(m_transmittedFrame, m_status);
+    }
+    m_lock = FALSE;
+  }
+
+  event void RadioToken.granted(){ ASSERT(0); }
+}
diff --git a/tos/lib/mac/tkn154/CoordRealignmentP.nc b/tos/lib/mac/tkn154/CoordRealignmentP.nc
new file mode 100644
index 00000000..534fa2fe
--- /dev/null
+++ b/tos/lib/mac/tkn154/CoordRealignmentP.nc
@@ -0,0 +1,217 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-06-02 08:40:12 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/* "The coordinator realignment command is sent by the PAN coordinator or a
+ * coordinator either following the reception of an orphan notification command
+ * from a device that is recognized to be on its PAN or when any of its PAN
+ * configuration attributes change due to the receipt of an MLME-START.request
+ * primitive." IEEE 802.15.4-2006, Sec. 7.3.8 **/ 
+
+#include "TKN154_MAC.h"
+module CoordRealignmentP
+{
+  provides
+  {
+    interface Init;
+    interface MLME_ORPHAN;
+    interface MLME_COMM_STATUS;
+    interface GetSet<ieee154_txframe_t*> as GetSetRealignmentFrame;
+  }
+  uses
+  {
+    interface FrameTx as CoordRealignmentTx;
+    interface FrameRx as OrphanNotificationRx;
+    interface FrameUtility;
+    interface MLME_GET;
+    interface IEEE154Frame as Frame;
+    interface Pool<ieee154_txframe_t> as TxFramePool;
+    interface Pool<ieee154_txcontrol_t> as TxControlPool;
+    interface Get<uint64_t> as LocalExtendedAddress;
+  }
+}
+implementation
+{
+  enum {
+    ORPHAN_RESPONSE,
+    BEACON_REALIGNMENT,
+  };
+
+  uint8_t m_payload[9];
+  bool m_busy = FALSE;
+  void destroyRealignmentFrame(ieee154_txframe_t *frame);
+  ieee154_txframe_t *newRealignmentFrame(uint8_t type, ieee154_address_t *dstAddress);
+
+  command error_t Init.init()
+  {
+    return SUCCESS;
+  }
+
+  command ieee154_txframe_t* GetSetRealignmentFrame.get()
+  {
+    ieee154_address_t bcastAddr;
+    bcastAddr.shortAddress = 0xFFFF;
+    return newRealignmentFrame(BEACON_REALIGNMENT, &bcastAddr);
+  }
+
+  command void GetSetRealignmentFrame.set(ieee154_txframe_t*  frame)
+  {
+    destroyRealignmentFrame(frame);
+  }
+
+  event message_t* OrphanNotificationRx.received(message_t* frame)
+  {
+    ieee154_address_t srcAddress;
+    if (call Frame.getSrcAddrMode(frame) == ADDR_MODE_EXTENDED_ADDRESS &&
+        call Frame.getSrcAddr(frame, &srcAddress) == SUCCESS)    
+      signal MLME_ORPHAN.indication (
+                          srcAddress.extendedAddress,
+                          NULL);
+    return frame;
+  }
+
+  command ieee154_status_t MLME_ORPHAN.response (
+                          uint64_t OrphanAddress,
+                          uint16_t ShortAddress,
+                          bool AssociatedMember,
+                          ieee154_security_t *security)
+  {
+    ieee154_txframe_t *txFrame;
+    ieee154_status_t txStatus;
+    ieee154_address_t dstAddress;
+
+    dstAddress.extendedAddress = OrphanAddress;
+    if (!AssociatedMember)
+      txStatus = IEEE154_SUCCESS;
+    else if (m_busy || (txFrame = newRealignmentFrame(ORPHAN_RESPONSE, &dstAddress)) == NULL)
+      txStatus = IEEE154_TRANSACTION_OVERFLOW;
+    else {
+      m_busy = TRUE;
+      txFrame->payload[0] = CMD_FRAME_COORDINATOR_REALIGNMENT;
+      *((nxle_uint16_t*) &txFrame->payload[1]) = call MLME_GET.macPANId();
+      *((nxle_uint16_t*) &txFrame->payload[3]) = call MLME_GET.macShortAddress();
+      txFrame->payload[5] = call MLME_GET.phyCurrentChannel();
+      *((nxle_uint16_t*) &txFrame->payload[6]) = ShortAddress;
+      txFrame->payloadLen = 8;
+      if ((txStatus = call CoordRealignmentTx.transmit(txFrame)) != IEEE154_SUCCESS) {
+        m_busy = FALSE;
+        destroyRealignmentFrame(txFrame);
+      }
+    }
+    return txStatus;
+  }
+
+  ieee154_txframe_t *newRealignmentFrame(uint8_t type, ieee154_address_t *dstAddress)
+  {
+    ieee154_txframe_t *txFrame = NULL;
+    ieee154_txcontrol_t *txControl;
+    uint8_t dstAddrMode;
+    ieee154_address_t srcAddress;
+
+    if ((txFrame = call TxFramePool.get()) != NULL) {
+      if ((txControl = call TxControlPool.get()) == NULL) {
+        call TxFramePool.put(txFrame);
+        txFrame = NULL;
+      } else {
+        txFrame->header = &txControl->header;
+        txFrame->metadata = &txControl->metadata;      
+        txFrame->payload = m_payload;
+        txFrame->header->mhr[MHR_INDEX_FC1] = FC1_FRAMETYPE_CMD;
+        txFrame->header->mhr[MHR_INDEX_FC2] = FC2_SRC_MODE_EXTENDED;
+        if (type == ORPHAN_RESPONSE) {
+          txFrame->header->mhr[MHR_INDEX_FC2] |= FC2_DEST_MODE_EXTENDED;
+          dstAddrMode = ADDR_MODE_EXTENDED_ADDRESS;
+          txFrame->header->mhr[MHR_INDEX_FC1] |= FC1_ACK_REQUEST;
+        } else {
+          txFrame->header->mhr[MHR_INDEX_FC2] |= FC2_DEST_MODE_SHORT;
+          dstAddrMode = ADDR_MODE_SHORT_ADDRESS;
+        }
+        srcAddress.extendedAddress = call LocalExtendedAddress.get();
+        txFrame->headerLen = call FrameUtility.writeHeader(
+              txFrame->header->mhr,
+              dstAddrMode,
+              0xFFFF,
+              dstAddress,
+              ADDR_MODE_EXTENDED_ADDRESS,
+              call MLME_GET.macPANId(),
+              &srcAddress,
+              FALSE);
+      }
+    }
+    return txFrame;
+  }
+
+  void destroyRealignmentFrame(ieee154_txframe_t *frame)
+  {
+    call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) frame->header - offsetof(ieee154_txcontrol_t, header)));
+    call TxFramePool.put(frame);
+  }
+
+  
+  event void CoordRealignmentTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    uint8_t *mhr = MHR(txFrame);
+    ieee154_address_t dstAddr;
+    ieee154_address_t srcAddr;
+
+    if (m_busy) {
+      call FrameUtility.convertToNative(&dstAddr.extendedAddress, &mhr[MHR_INDEX_ADDRESS+2]);
+      call FrameUtility.convertToNative(&srcAddr.extendedAddress, &mhr[MHR_INDEX_ADDRESS+2+8+2]);
+      signal MLME_COMM_STATUS.indication (
+          *((nxle_uint16_t*) &txFrame->payload[1]), // PANId
+          ADDR_MODE_EXTENDED_ADDRESS, // SrcAddrMode
+          srcAddr,
+          ADDR_MODE_EXTENDED_ADDRESS, // DstAddrMode
+          dstAddr,
+          status,
+          NULL);
+      call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) txFrame->header - offsetof(ieee154_txcontrol_t, header)));
+      call TxFramePool.put(txFrame);
+      m_busy = FALSE;
+    }
+  }
+
+  default event void MLME_COMM_STATUS.indication (
+                          uint16_t PANId,
+                          uint8_t SrcAddrMode,
+                          ieee154_address_t SrcAddr,
+                          uint8_t DstAddrMode,
+                          ieee154_address_t DstAddr,
+                          ieee154_status_t status,
+                          ieee154_security_t *security) {}
+
+  default event void MLME_ORPHAN.indication (
+                          uint64_t OrphanAddress,
+                          ieee154_security_t *security) {}
+}
diff --git a/tos/lib/mac/tkn154/DataP.nc b/tos/lib/mac/tkn154/DataP.nc
new file mode 100644
index 00000000..c2591160
--- /dev/null
+++ b/tos/lib/mac/tkn154/DataP.nc
@@ -0,0 +1,276 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2009-04-28 14:12:03 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154_MAC.h"
+
+module DataP
+{
+  provides
+  {
+    interface Init;
+    interface MCPS_DATA; 
+    interface MCPS_PURGE;
+  } uses {
+    interface FrameRx as CoordCapRx;
+    interface FrameTx as DeviceCapTx;
+    interface FrameTx as CoordCapTx;
+    interface FrameTx as BroadcastTx;
+    interface FrameRx as DeviceCapRx;
+    interface Pool<ieee154_txframe_t> as TxFramePool;
+    interface FrameTx as DeviceCfpTx;
+    interface FrameTx as CoordCfpTx;
+    interface FrameTx as IndirectTx;
+    interface FrameRx as CoordCfpRx;
+    interface FrameRx as DeviceCfpRx;
+    interface FrameUtility;
+    interface Purge as PurgeDirect;
+    interface Purge as PurgeIndirect;
+    interface Purge as PurgeGtsDevice;
+    interface Purge as PurgeGtsCoord;
+    interface MLME_GET;
+    interface Leds;
+    interface Packet;
+    interface IEEE154Frame as Frame;
+    interface Get<uint64_t> as LocalExtendedAddress;
+  }
+}
+implementation
+{
+  message_t* dataReceived(message_t* frame);
+  void finishTxTransaction(ieee154_txframe_t *txFrame, ieee154_status_t status);
+
+  command error_t Init.init()
+  {
+    return SUCCESS;
+  }
+  
+  command ieee154_status_t MCPS_DATA.request  (
+                          message_t *frame,
+                          uint8_t payloadLen,
+                          uint8_t msduHandle,
+                          uint8_t txOptions)
+  {
+    uint8_t srcAddrMode = call Frame.getSrcAddrMode(frame);
+    uint8_t dstAddrMode = call Frame.getDstAddrMode(frame);
+    ieee154_address_t dstAddr;
+    ieee154_status_t txStatus;
+    ieee154_txframe_t *txFrame;
+    uint8_t sfType=0;
+    uint8_t *mhr, mhrLen = call Frame.getHeaderLength(frame);
+
+    if (payloadLen > call Packet.maxPayloadLength() || 
+        mhrLen + payloadLen + 2 > IEEE154_aMaxPHYPacketSize) // extra 2 for MAC footer (CRC)
+      txStatus = IEEE154_INVALID_PARAMETER;
+    else if ((!srcAddrMode && !dstAddrMode) || 
+        (srcAddrMode > ADDR_MODE_EXTENDED_ADDRESS || dstAddrMode > ADDR_MODE_EXTENDED_ADDRESS) ||
+        (srcAddrMode == ADDR_MODE_RESERVED || dstAddrMode  == ADDR_MODE_RESERVED))
+      txStatus = IEEE154_INVALID_ADDRESS; 
+    else if (!(txFrame = call TxFramePool.get()))
+      txStatus = IEEE154_TRANSACTION_OVERFLOW;
+    else {
+      // construct the DATA frame
+      txFrame->header = &((message_header_t*) frame->header)->ieee154;
+      txFrame->payload = (uint8_t*) frame->data;
+      txFrame->metadata = &((message_metadata_t*) frame->metadata)->ieee154;
+      txFrame->payloadLen = payloadLen;
+      mhr = txFrame->header->mhr;
+      txFrame->headerLen = mhrLen;
+      mhr[MHR_INDEX_FC1] &= ~(FC1_FRAMETYPE_MASK | FC1_FRAME_PENDING | FC1_ACK_REQUEST);
+      mhr[MHR_INDEX_FC1] |= FC1_FRAMETYPE_DATA;
+      if (txOptions & TX_OPTIONS_ACK)
+        mhr[MHR_INDEX_FC1] |= FC1_ACK_REQUEST;
+      mhr[MHR_INDEX_FC2] &= ~FC2_FRAME_VERSION_MASK;
+      if (payloadLen > IEEE154_aMaxMACSafePayloadSize)
+        mhr[MHR_INDEX_FC2] |= FC2_FRAME_VERSION_1;
+      txFrame->handle = msduHandle;
+      
+      // in case a node is both, coordinator and device (e.g. in a 
+      // cluster-tree topology), it has to be decided whether the frame 
+      // is to be sent in the incoming or outgoing superframe (sf); 
+      // we do this by comparing the destination address to the
+      // coordinator address in the PIB, if they match the frame is
+      // sent in the incoming sf otherwise in the outgoing sf
+      call Frame.getDstAddr(frame, &dstAddr);
+      if (dstAddrMode == ADDR_MODE_SHORT_ADDRESS) {
+        if (dstAddr.shortAddress == call MLME_GET.macCoordShortAddress())
+          sfType = INCOMING_SUPERFRAME;
+        else
+          sfType = OUTGOING_SUPERFRAME;
+      } else if (dstAddrMode == ADDR_MODE_EXTENDED_ADDRESS) {
+        if (dstAddr.extendedAddress == call MLME_GET.macCoordExtendedAddress())
+          sfType = INCOMING_SUPERFRAME;
+        else
+          sfType = OUTGOING_SUPERFRAME;
+      } else if (dstAddrMode == ADDR_MODE_NOT_PRESENT) // to PAN Coord
+        sfType = INCOMING_SUPERFRAME;
+
+      // GTS?
+      if (txOptions & TX_OPTIONS_GTS) {
+        if (sfType == INCOMING_SUPERFRAME)
+          txStatus = call DeviceCfpTx.transmit(txFrame);
+        else
+          txStatus = call CoordCfpTx.transmit(txFrame);
+
+      // indirect transmission?
+      } else if ((txOptions & TX_OPTIONS_INDIRECT) && 
+          (dstAddrMode >= ADDR_MODE_SHORT_ADDRESS)) {
+        if (dstAddrMode == ADDR_MODE_SHORT_ADDRESS && dstAddr.shortAddress == 0xFFFF) {
+          mhr[MHR_INDEX_FC1] &= ~FC1_ACK_REQUEST;
+          txStatus = call BroadcastTx.transmit(txFrame);
+        } else
+          txStatus = call IndirectTx.transmit(txFrame);
+
+      // transmission in the CAP
+      } else 
+        if (sfType == INCOMING_SUPERFRAME)
+          txStatus = call DeviceCapTx.transmit(txFrame);
+        else
+          txStatus = call CoordCapTx.transmit(txFrame);
+
+      if (txStatus != IEEE154_SUCCESS) {
+        call TxFramePool.put(txFrame);
+      }
+    }
+    return txStatus;
+  }
+
+  command ieee154_status_t MCPS_PURGE.request  (
+                          uint8_t msduHandle)
+  {
+    if (call PurgeDirect.purge(msduHandle) == IEEE154_SUCCESS ||
+        call PurgeIndirect.purge(msduHandle) == IEEE154_SUCCESS ||
+        call PurgeGtsDevice.purge(msduHandle) == IEEE154_SUCCESS ||
+        call PurgeGtsCoord.purge(msduHandle) == IEEE154_SUCCESS)
+      return IEEE154_SUCCESS;
+    else
+      return IEEE154_INVALID_HANDLE;
+  }
+
+  event void PurgeDirect.purgeDone(ieee154_txframe_t *data, ieee154_status_t status)
+  {
+    finishTxTransaction(data, status);
+  }
+
+  event void PurgeIndirect.purgeDone(ieee154_txframe_t *data, ieee154_status_t status)
+  {
+    finishTxTransaction(data, status);
+  }
+
+  event void PurgeGtsDevice.purgeDone(ieee154_txframe_t *data, ieee154_status_t status)
+  {
+    finishTxTransaction(data, status);
+  }
+
+  event void PurgeGtsCoord.purgeDone(ieee154_txframe_t *data, ieee154_status_t status)
+  {
+    finishTxTransaction(data, status);
+  }
+
+  event message_t* CoordCfpRx.received(message_t* frame)
+  {
+    return dataReceived(frame);
+  }
+
+  event message_t* DeviceCfpRx.received(message_t* frame)
+  {
+    return dataReceived(frame);
+  }
+
+  event message_t* CoordCapRx.received(message_t* frame)
+  {
+    return dataReceived(frame);
+  }
+
+  event message_t* DeviceCapRx.received(message_t* frame)
+  {
+    return dataReceived(frame);
+  }
+
+  message_t* dataReceived(message_t* frame)
+  {
+    return signal MCPS_DATA.indication(frame);
+  }
+
+  void finishTxTransaction(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    uint8_t handle = txFrame->handle;
+    uint32_t txTime = txFrame->metadata->timestamp;
+    message_t *msg = (message_t*) ((uint8_t*) txFrame->header - offsetof(message_t, header));
+
+    call TxFramePool.put(txFrame);
+    signal MCPS_DATA.confirm(msg, handle, status, txTime);
+  }
+
+  event void BroadcastTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    finishTxTransaction(txFrame, status);
+  }
+
+  event void DeviceCapTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    finishTxTransaction(txFrame, status);
+  }
+  
+  event void CoordCapTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    finishTxTransaction(txFrame, status);
+  }
+
+  event void DeviceCfpTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    finishTxTransaction(txFrame, status);
+  }
+  
+  event void CoordCfpTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    finishTxTransaction(txFrame, status);
+  }
+
+
+  event void IndirectTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    finishTxTransaction(txFrame, status);
+  }
+
+  default event void MCPS_DATA.confirm(  
+                          message_t *msg,
+                          uint8_t msduHandle,
+                          ieee154_status_t status,
+                          uint32_t Timestamp) {}
+
+  default event message_t* MCPS_DATA.indication(message_t* frame) { return frame; }
+  default command ieee154_status_t DeviceCfpTx.transmit(ieee154_txframe_t *data) {return IEEE154_INVALID_GTS;}
+  default command ieee154_status_t BroadcastTx.transmit(ieee154_txframe_t *data) {return IEEE154_INVALID_PARAMETER;}
+  default command ieee154_status_t CoordCfpTx.transmit(ieee154_txframe_t *data) {return IEEE154_INVALID_GTS;}
+}
diff --git a/tos/lib/mac/tkn154/DebugC.nc b/tos/lib/mac/tkn154/DebugC.nc
new file mode 100644
index 00000000..986f02ea
--- /dev/null
+++ b/tos/lib/mac/tkn154/DebugC.nc
@@ -0,0 +1,48 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-25 16:47:49 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+configuration DebugC {
+}
+implementation {
+  components DebugP, LedsC, MainC;
+  DebugP.Boot -> MainC;
+  DebugP.Leds -> LedsC;
+
+#if defined(PLATFORM_TELOSB)
+  components UserButtonC;
+  DebugP.ButtonPressed -> UserButtonC;
+#endif
+}
+
diff --git a/tos/lib/mac/tkn154/DebugP.nc b/tos/lib/mac/tkn154/DebugP.nc
new file mode 100644
index 00000000..3f90de2b
--- /dev/null
+++ b/tos/lib/mac/tkn154/DebugP.nc
@@ -0,0 +1,169 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-04-17 14:47:09 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "printf.h"
+#include <stdio.h>
+#ifdef __STDC__
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+#if defined(PLATFORM_TELOSB)
+#include <UserButton.h>
+#endif
+
+module DebugP {
+  uses {
+    interface Boot;
+    interface Leds;
+#if defined(PLATFORM_TELOSB)
+    interface Notify<button_state_t> as ButtonPressed;
+#endif
+  }
+}
+implementation {
+
+  enum {
+    MAX_LEN_FUNNAME = 50,
+    MAX_LEN_FILENAME = 50,
+    NUM_LIST_ENTRIES = 20,
+  };
+
+  typedef struct {
+    const char *filename;
+    uint16_t line;
+    const char *format;
+    uint32_t param[2];
+  } debug_list_entry_t;
+
+  norace debug_list_entry_t m_list[NUM_LIST_ENTRIES];
+  norace uint8_t m_head;
+  norace uint8_t m_tail;
+  norace bool m_overflow;
+
+
+  uint16_t m_assertCounter;
+  norace uint16_t m_assertLine;
+  norace char m_assertFilename[MAX_LEN_FILENAME];
+  norace char m_assertFunction[MAX_LEN_FUNNAME];
+
+  event void Boot.booted() {
+#if defined(PLATFORM_TELOSB)
+    call ButtonPressed.enable();
+#endif
+  }
+
+#if defined(PLATFORM_TELOSB)
+  event void ButtonPressed.notify( button_state_t val )
+  {
+    dbg_serial_flush();
+  }
+#endif
+
+  task void assertFailTask()
+  {
+    if (m_assertCounter == 0) {
+      printf("Assert failed: File: %s, line: %d, function: %s.\n", m_assertFilename, m_assertLine, m_assertFunction);
+      printfflush();
+    }
+    if (m_assertCounter++ < 3000) {
+      call Leds.led0On(); 
+      call Leds.led1On(); 
+      call Leds.led2On(); 
+    } else {
+      call Leds.led0Off();
+      call Leds.led1Off();
+      call Leds.led2Off(); 
+    }
+    if (m_assertCounter > 6000)
+      m_assertCounter = 0;
+    post assertFailTask();
+  }
+
+  void tkn154_assert(bool val, const char *filename, uint16_t line, const char *func) @C() @spontaneous()
+  {
+    if (!val) {
+      if (m_assertLine == 0) {
+        // only catch the first failure, output it periodically
+        m_assertLine = line;
+        strncpy(m_assertFilename, filename, MAX_LEN_FILENAME);
+        strncpy(m_assertFunction, func, MAX_LEN_FUNNAME);
+        post assertFailTask();
+      }
+    }
+  }
+
+  void tkn154_dbg_serial(const char *filename, uint16_t line, ...) @C() @spontaneous()
+  { 
+    // This function must be fast: we just copy the strings and 
+    // output them later in the flush-function 
+
+    if ((m_head + 1) % NUM_LIST_ENTRIES != m_tail) {
+      va_list argp;
+
+      m_list[m_head].filename = filename;
+      m_list[m_head].line = line;
+      va_start(argp, line);
+      m_list[m_head].format = va_arg(argp, char*);
+      m_list[m_head].param[0] = va_arg(argp, uint32_t);
+      m_list[m_head].param[1] = va_arg(argp, uint32_t);
+      va_end(argp);
+      m_head = (m_head  + 1) % NUM_LIST_ENTRIES;
+    } else
+      m_overflow = TRUE;
+  }
+
+  task void serialFlushTask()
+  {
+    if (m_overflow)
+      printf("SERIAL OVERFLOW!\n");
+    if (m_head != m_tail) {
+      printf("%s:%d:", m_list[m_tail].filename, m_list[m_tail].line);
+      printf(m_list[m_tail].format, m_list[m_tail].param[0], m_list[m_tail].param[1]);
+      atomic {
+        if (++m_tail >= NUM_LIST_ENTRIES)
+          m_tail = 0;
+      }
+    }
+    if (m_head != m_tail)
+      post serialFlushTask();
+    printfflush();
+  }
+
+  void tkn154_dbg_serial_flush() @C() @spontaneous()
+  {
+    post serialFlushTask();
+  }
+}
diff --git a/tos/lib/mac/tkn154/DisassociateP.nc b/tos/lib/mac/tkn154/DisassociateP.nc
new file mode 100644
index 00000000..67fd94c0
--- /dev/null
+++ b/tos/lib/mac/tkn154/DisassociateP.nc
@@ -0,0 +1,254 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2009-10-16 12:25:45 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+
+#include "TKN154_MAC.h"
+
+module DisassociateP
+{
+  provides
+  {
+    interface Init;
+    interface MLME_DISASSOCIATE;
+  } uses {
+
+    interface FrameTx as DisassociationIndirectTx;
+    interface FrameTx as DisassociationDirectTx;
+    interface FrameTx as DisassociationToCoord;
+
+    interface FrameRx as DisassociationDirectRxFromCoord;
+    interface FrameExtracted as DisassociationExtractedFromCoord;
+    interface FrameRx as DisassociationRxFromDevice;
+
+    interface Pool<ieee154_txframe_t> as TxFramePool;
+    interface Pool<ieee154_txcontrol_t> as TxControlPool;
+    interface MLME_GET;
+    interface MLME_SET;
+    interface FrameUtility;
+    interface IEEE154Frame as Frame;
+    interface Get<uint64_t> as LocalExtendedAddress;
+  }
+}
+implementation
+{
+  enum {
+    S_IDLE = 0xFF,
+  };
+  uint8_t m_payloadDisassocRequest[2];
+  uint8_t m_coordAddrMode;
+  bool m_disAssociationOngoing;
+  void resetPanValuesInPib();
+
+  command error_t Init.init()
+  {
+    m_payloadDisassocRequest[0] = S_IDLE;
+    m_coordAddrMode = 0;
+    m_disAssociationOngoing = FALSE;
+    return SUCCESS;
+  }
+
+  /* ------------------- MLME_DISASSOCIATE (initiating) ------------------- */
+
+  command ieee154_status_t MLME_DISASSOCIATE.request  (
+                          uint8_t DeviceAddrMode,
+                          uint16_t DevicePANID,
+                          ieee154_address_t DeviceAddress,
+                          ieee154_disassociation_reason_t DisassociateReason,
+                          bool TxIndirect,
+                          ieee154_security_t *security)
+  {
+    ieee154_status_t status = IEEE154_SUCCESS;
+    ieee154_txframe_t *txFrame=0;
+    ieee154_txcontrol_t *txControl=0;
+    ieee154_address_t srcAddress;
+
+    if (security && security->SecurityLevel)
+      status = IEEE154_UNSUPPORTED_SECURITY;
+    else if (call MLME_GET.macPANId() != DevicePANID || 
+        (DeviceAddrMode != ADDR_MODE_SHORT_ADDRESS && DeviceAddrMode != ADDR_MODE_EXTENDED_ADDRESS))
+      status = IEEE154_INVALID_PARAMETER;
+    else if (m_disAssociationOngoing || !(txFrame = call TxFramePool.get()))
+      status = IEEE154_TRANSACTION_OVERFLOW;
+    else if (!(txControl = call TxControlPool.get())) {
+      call TxFramePool.put(txFrame);
+      status = IEEE154_TRANSACTION_OVERFLOW;
+    } 
+    if (status == IEEE154_SUCCESS) {
+      txFrame->header = &txControl->header;
+      txFrame->metadata = &txControl->metadata;
+      srcAddress.extendedAddress = call LocalExtendedAddress.get();
+      txFrame->headerLen = call FrameUtility.writeHeader(
+          txFrame->header->mhr,
+          DeviceAddrMode,
+          call MLME_GET.macPANId(),
+          &DeviceAddress,
+          ADDR_MODE_EXTENDED_ADDRESS,
+          call MLME_GET.macPANId(),
+          &srcAddress,
+          TRUE);
+      txFrame->header->mhr[MHR_INDEX_FC1] = FC1_ACK_REQUEST | FC1_FRAMETYPE_CMD | FC1_PAN_ID_COMPRESSION;
+      txFrame->header->mhr[MHR_INDEX_FC2] = FC2_SRC_MODE_EXTENDED |
+        (DeviceAddrMode == ADDR_MODE_SHORT_ADDRESS ? FC2_DEST_MODE_SHORT : FC2_DEST_MODE_EXTENDED);
+      m_payloadDisassocRequest[0] = CMD_FRAME_DISASSOCIATION_NOTIFICATION;
+      m_payloadDisassocRequest[1] = DisassociateReason;
+      txFrame->payload = m_payloadDisassocRequest;
+      txFrame->payloadLen = 2;
+      m_disAssociationOngoing = TRUE;
+      if ((DeviceAddrMode == ADDR_MODE_SHORT_ADDRESS &&
+            DeviceAddress.shortAddress == call MLME_GET.macCoordShortAddress()) ||
+          (DeviceAddrMode == ADDR_MODE_EXTENDED_ADDRESS &&
+           DeviceAddress.extendedAddress == call MLME_GET.macCoordExtendedAddress())) {
+        status = call DisassociationToCoord.transmit(txFrame);
+      } else if (TxIndirect) {
+        status = call DisassociationIndirectTx.transmit(txFrame);
+      } else {
+        status = call DisassociationDirectTx.transmit(txFrame);
+      }
+      if (status != IEEE154_SUCCESS) {
+        m_disAssociationOngoing = FALSE;
+        call TxFramePool.put(txFrame);
+        call TxControlPool.put(txControl);
+      }
+    }
+    dbg_serial("DisassociateP", "MLME_DISASSOCIATE.request -> result: %lu\n", (uint32_t) status);
+    return status;
+  }
+
+  event void DisassociationToCoord.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) 
+  { 
+    // transmitted a disassociation notification to our coordinator
+    uint8_t *mhr = MHR(data), srcAddrOffset = 7;
+    uint8_t DeviceAddrMode = (mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) >> FC2_SRC_MODE_OFFSET;
+    uint16_t DevicePANID = *((nxle_uint16_t*) (&(mhr[MHR_INDEX_ADDRESS])));
+    ieee154_address_t DeviceAddress;
+
+    if ((mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_EXTENDED)
+      srcAddrOffset += 6;
+    call FrameUtility.convertToNative(&DeviceAddress.extendedAddress, &mhr[srcAddrOffset]);
+    call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) data->header - offsetof(ieee154_txcontrol_t, header)));
+    call TxFramePool.put(data);
+    dbg_serial("DisassociateP", "transmitDone() -> result: %lu\n", (uint32_t) status);
+    m_disAssociationOngoing = FALSE;
+
+    // "[...] even if the acknowledgment is not received, 
+    // the device should consider itself disassociated."  (Sect. 7.5.3.2)
+    if (status == IEEE154_SUCCESS || status == IEEE154_NO_ACK)
+      resetPanValuesInPib();  
+    signal MLME_DISASSOCIATE.confirm(status, DeviceAddrMode, DevicePANID, DeviceAddress);
+  }
+
+  event void DisassociationIndirectTx.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) 
+  {
+    signal DisassociationDirectTx.transmitDone(data, status);
+  }
+
+  event void DisassociationDirectTx.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) 
+  { 
+    // transmitted a disassociation notification to a device
+    uint8_t *mhr = MHR(data), dstAddrOffset = 5;
+    uint8_t DeviceAddrMode = (mhr[1] & FC2_DEST_MODE_MASK) >> FC2_DEST_MODE_OFFSET;
+    uint16_t DevicePANID = *((nxle_uint16_t*) (&(mhr[MHR_INDEX_ADDRESS])));
+    ieee154_address_t DeviceAddress;
+
+    call FrameUtility.convertToNative(&DeviceAddress.extendedAddress, &mhr[dstAddrOffset]);
+    call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) data->header - offsetof(ieee154_txcontrol_t, header)));
+    call TxFramePool.put(data);
+    dbg_serial("DisassociateP", "transmitDone() -> result: %lu\n", (uint32_t) status);
+    m_disAssociationOngoing = FALSE;
+
+    // "[...] even if the acknowledgment is not received, 
+    // the device should consider itself disassociated." (Sect. 7.5.3.2)
+    if (status == IEEE154_SUCCESS || status == IEEE154_NO_ACK)
+      resetPanValuesInPib();      
+    signal MLME_DISASSOCIATE.confirm(status, DeviceAddrMode, DevicePANID, DeviceAddress);
+  }
+
+  /* ------------------- MLME_DISASSOCIATE (receiving) ------------------- */
+
+  event message_t* DisassociationDirectRxFromCoord.received(message_t* frame)
+  {
+    // received a disassociation notification from the coordinator (direct tx)
+    ieee154_address_t address;
+
+    address.extendedAddress = call LocalExtendedAddress.get();
+    signal MLME_DISASSOCIATE.indication(address.extendedAddress, frame->data[1], NULL);
+    return frame;
+  }
+
+  event message_t* DisassociationExtractedFromCoord.received(message_t* frame, ieee154_txframe_t *txFrame)
+  {
+    // received a disassociation notification from the coordinator (indirect transmission)
+    return signal DisassociationDirectRxFromCoord.received(frame);
+  }
+
+  event message_t* DisassociationRxFromDevice.received(message_t* frame)
+  {
+    // received a disassociation notification from the device
+    ieee154_address_t address;
+
+    if (call Frame.getSrcAddrMode(frame) == ADDR_MODE_EXTENDED_ADDRESS && 
+        call Frame.getSrcAddr(frame, &address) == SUCCESS)
+      signal MLME_DISASSOCIATE.indication(address.extendedAddress, frame->data[1], NULL);
+    dbg_serial("DisassociateP", "Received disassociation request from %lx\n", (uint32_t) address.shortAddress);
+    return frame;
+  }
+
+  void resetPanValuesInPib()
+  {
+    // "An associated device shall disassociate itself by removing 
+    // all references to the PAN; the MLME shall set macPANId, 
+    // macShortAddress, macAssociatedPANCoord, macCoordShortAddress 
+    // and macCoordExtended- Address to the default values." (Sect. 7.5.3.2) 
+    call MLME_SET.macPANId(IEEE154_DEFAULT_PANID);
+    call MLME_SET.macShortAddress(IEEE154_DEFAULT_SHORTADDRESS);
+    call MLME_SET.macAssociatedPANCoord(IEEE154_DEFAULT_ASSOCIATEDPANCOORD);
+    call MLME_SET.macCoordShortAddress(IEEE154_DEFAULT_COORDSHORTADDRESS);
+    call MLME_SET.macCoordExtendedAddress(0);
+  }
+
+  /* ------------------- Defaults ------------------- */
+
+  default event void MLME_DISASSOCIATE.indication (
+                          uint64_t DeviceAddress,
+                          ieee154_disassociation_reason_t DisassociateReason,
+                          ieee154_security_t *security) {}
+
+  default event void MLME_DISASSOCIATE.confirm    (
+                          ieee154_status_t status,
+                          uint8_t DeviceAddrMode,
+                          uint16_t DevicePANID,
+                          ieee154_address_t DeviceAddress) {}
+
+}
diff --git a/tos/lib/mac/tkn154/DispatchQueueP.nc b/tos/lib/mac/tkn154/DispatchQueueP.nc
new file mode 100644
index 00000000..a38b243e
--- /dev/null
+++ b/tos/lib/mac/tkn154/DispatchQueueP.nc
@@ -0,0 +1,152 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-12-14 12:50:06 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154_MAC.h"
+generic module DispatchQueueP() {
+  provides
+  {
+    interface Init as Reset;
+    interface FrameTx[uint8_t client];
+    interface FrameRx as FrameExtracted[uint8_t client];
+    interface Purge;
+  } uses {
+    interface Queue<ieee154_txframe_t*>;
+    interface FrameTx as FrameTxCsma;
+    interface FrameRx as SubFrameExtracted;
+  }
+}
+implementation
+{
+  task void txTask();
+  bool m_state;
+  uint8_t m_client;
+
+  enum {
+    TX_DONE_PENDING = 0x01,
+    RESET_PENDING = 0x02,
+  };
+
+  bool isTxDonePending() { return (m_state & TX_DONE_PENDING) ? TRUE : FALSE; }
+  void setTxDonePending() { m_state |= TX_DONE_PENDING; }
+  void resetTxDonePending() { m_state &= ~TX_DONE_PENDING; }
+
+  bool isResetPending() { return (m_state & RESET_PENDING) ? TRUE : FALSE; }
+  void setResetPending() { m_state |= RESET_PENDING; }
+  void resetResetPending() { m_state &= ~RESET_PENDING; }
+
+  command error_t Reset.init()
+  {
+    setResetPending();
+    while (call Queue.size()) {
+      ieee154_txframe_t *txFrame = call Queue.dequeue();
+      signal FrameTx.transmitDone[txFrame->client](txFrame, IEEE154_TRANSACTION_OVERFLOW);
+    }
+    resetResetPending();
+    return SUCCESS;
+  }
+
+  command ieee154_status_t FrameTx.transmit[uint8_t client](ieee154_txframe_t *txFrame)
+  {
+    txFrame->client = client;
+    if (isResetPending() || call Queue.enqueue(txFrame) != SUCCESS)
+      return IEEE154_TRANSACTION_OVERFLOW;
+    else {
+      post txTask();
+      return IEEE154_SUCCESS;
+    }
+  }
+
+  task void txTask()
+  {
+    if (!isTxDonePending() && call Queue.size()) {
+      ieee154_txframe_t *txFrame = call Queue.head();
+      if (txFrame->headerLen == 0) { 
+        // was purged
+        call Queue.dequeue();
+        signal Purge.purgeDone(txFrame, IEEE154_SUCCESS);
+        post txTask();
+      }
+      m_client = txFrame->client;
+      setTxDonePending();
+      if (call FrameTxCsma.transmit(txFrame) != IEEE154_SUCCESS)
+        resetTxDonePending();
+    }
+  }
+
+  event void FrameTxCsma.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    resetTxDonePending();
+    if (!call Queue.size())
+      return; // all frames were spooled out (reset)
+    call Queue.dequeue();
+    signal FrameTx.transmitDone[txFrame->client](txFrame, status);
+    if (IEEE154_BEACON_ENABLED_PAN && status == IEEE154_NO_BEACON) {
+      // this means that we lost sync -> spool out all queued frames 
+      while (call Queue.size()) {
+        ieee154_txframe_t *frame = call Queue.dequeue();
+        signal FrameTx.transmitDone[frame->client](frame, IEEE154_NO_BEACON);
+      }
+    }
+    post txTask();
+  }
+
+  event message_t* SubFrameExtracted.received(message_t* frame)
+  {
+    // this event is signalled when a frame has been received
+    // in response to a data request command frame. The transmitDone 
+    // event will be signalled later
+    return signal FrameExtracted.received[m_client](frame);
+  }
+
+  default event void FrameTx.transmitDone[uint8_t client](ieee154_txframe_t *txFrame, ieee154_status_t status) {}
+
+  command ieee154_status_t Purge.purge(uint8_t msduHandle)
+  {
+    uint8_t qSize = call Queue.size(), i;
+
+    // must never purge the first element (element 0), because it was already handed down to
+    // the dispatcher (we don't own it anymore), all others may be purged.
+    for (i=1; i<qSize; i++) {
+      ieee154_txframe_t *txFrame = call Queue.element(i);
+      if (((txFrame->header->mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_DATA) &&
+          txFrame->handle == msduHandle) {
+        txFrame->headerLen = 0; // mark as invalid
+        return IEEE154_SUCCESS;
+      }
+    }
+    return IEEE154_INVALID_HANDLE;
+  }
+  
+  default event void Purge.purgeDone(ieee154_txframe_t *txFrame, ieee154_status_t status) {}
+}
diff --git a/tos/lib/mac/tkn154/DispatchSlottedCsmaP.nc b/tos/lib/mac/tkn154/DispatchSlottedCsmaP.nc
new file mode 100644
index 00000000..3ae9a3e8
--- /dev/null
+++ b/tos/lib/mac/tkn154/DispatchSlottedCsmaP.nc
@@ -0,0 +1,766 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.8 $
+ * $Date: 2009-12-14 12:50:06 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154_PHY.h"
+#include "TKN154_MAC.h"
+
+
+/** 
+ * This module is responsible for the transmission/reception of DATA and
+ * COMMAND frames in the CAP of beacon-enabled PANs. Its main tasks are
+ * initialization of the parameters of the slotted CSMA-CA algorithm (NB, BE,
+ * etc.), initiating retransmissions and dealing with broadcast transmissions.
+ * It does not implement the actual CSMA-CA algorithm, because due to its
+ * timing requirements the CSMA-CA algorithm is not part of the MAC
+ * implementation but of the chip-specific radio driver.
+ *
+ * This module does slightly different things depending on whether it is the
+ * CAP for an outgoing superframe (sfDirection = OUTGOING_SUPERFRAME), i.e. the
+ * CAP from the perspective of a coordinator after it has transmitted its own
+ * beacon; or for an incoming superframe (sfDirection = INCOMING_SUPERFRAME),
+ * i.e.  the CAP from the perspective of a device after it has received a
+ * beacon from its coordinator. For example, in the CAP a coordinator will
+ * typically listen for incoming frames from the devices, and a device will
+ * typically switch the radio off unless it has a frame to transmit.
+ */
+
+generic module DispatchSlottedCsmaP(uint8_t sfDirection)
+{
+  provides
+  {
+    interface Init as Reset;
+    interface FrameTx as FrameTx;
+    interface FrameRx as FrameRx[uint8_t frameType];
+    interface FrameExtracted as FrameExtracted[uint8_t frameType];
+    interface FrameTxNow as BroadcastTx;
+    interface Notify<bool> as WasRxEnabled;
+  }
+  uses
+  {
+    interface Alarm<TSymbolIEEE802154,uint32_t> as CapEndAlarm;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as BLEAlarm;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as RxWaitAlarm;
+    interface TransferableResource as RadioToken;
+    interface ResourceRequested as RadioTokenRequested;
+    interface SuperframeStructure; 
+    interface GetNow<token_requested_t> as IsRadioTokenRequested;
+    interface GetNow<bool> as IsRxEnableActive; 
+    interface Get<ieee154_txframe_t*> as GetIndirectTxFrame; 
+    interface Notify<bool> as RxEnableStateChange;
+    interface GetNow<bool> as IsTrackingBeacons;
+    interface Notify<const void*> as PIBUpdateMacRxOnWhenIdle;
+    interface FrameUtility;
+    interface SlottedCsmaCa;
+    interface RadioRx;
+    interface RadioOff;
+    interface MLME_GET;
+    interface MLME_SET;
+    interface TimeCalc;
+    interface Leds;
+    interface SetNow<ieee154_cap_frame_backup_t*> as FrameBackup;
+    interface GetNow<ieee154_cap_frame_backup_t*> as FrameRestore;
+    interface SplitControl as TrackSingleBeacon;
+    interface MLME_SYNC_LOSS;
+  }
+}
+implementation
+{
+  typedef enum {
+    SWITCH_OFF,       
+    WAIT_FOR_RXDONE,  
+    WAIT_FOR_TXDONE,  
+    DO_NOTHING,       
+  } next_state_t; 
+
+  typedef enum {
+    INDIRECT_TX_ALARM,
+    BROADCAST_ALARM,
+    NO_ALARM,
+  } rx_alarm_t;
+
+  enum {
+    COORD_ROLE = (sfDirection == OUTGOING_SUPERFRAME),
+    DEVICE_ROLE = !COORD_ROLE,
+    RADIO_CLIENT_CFP = COORD_ROLE ? RADIO_CLIENT_COORDCFP : RADIO_CLIENT_DEVICECFP,
+  };
+
+  /* state / frame management */
+  norace bool m_lock;
+  norace bool m_resume;
+  norace ieee154_txframe_t *m_currentFrame;
+  norace ieee154_txframe_t *m_bcastFrame;
+  norace ieee154_txframe_t *m_lastFrame;
+  norace uint16_t m_remainingBackoff;
+  ieee154_macRxOnWhenIdle_t macRxOnWhenIdle;
+
+  /* variables for the slotted CSMA-CA */
+  norace ieee154_csma_t m_csma;
+  norace ieee154_macMaxBE_t m_BE;
+  norace ieee154_macMaxCSMABackoffs_t m_macMaxCSMABackoffs;
+  norace ieee154_macMaxBE_t m_macMaxBE;
+  norace ieee154_macMaxFrameRetries_t m_macMaxFrameRetries;
+  norace ieee154_status_t m_txStatus;
+  norace uint32_t m_transactionTime;
+  norace bool m_indirectTxPending = FALSE;
+  norace bool m_broadcastRxPending;
+  norace ieee154_macMaxFrameTotalWaitTime_t m_macMaxFrameTotalWaitTime;
+
+  /* function / task prototypes */
+  void stopAllAlarms();
+  next_state_t tryReceive();
+  next_state_t tryTransmit();
+  next_state_t trySwitchOff();
+  void backupCurrentFrame();
+  void restoreFrameFromBackup();  
+  void updateState();
+  void setCurrentFrame(ieee154_txframe_t *frame);
+  void signalTxBroadcastDone(ieee154_txframe_t *frame, ieee154_status_t error);
+  task void signalTxDoneTask();
+  task void setupTxBroadcastTask();
+  task void wasRxEnabledTask();
+
+#ifdef TKN154_DEBUG
+  enum {
+    HEADER_STR_LEN = 27,
+    DBG_STR_SIZE = 250,
+  };
+  norace uint16_t m_dbgNumEntries;
+  norace char m_dbgStr[HEADER_STR_LEN + DBG_STR_SIZE] = "updateState() transitions: ";
+  void dbg_push_state(uint8_t state) {
+    if (m_dbgNumEntries < DBG_STR_SIZE-3)
+      m_dbgStr[HEADER_STR_LEN + m_dbgNumEntries++] = '0' + state; 
+  }
+  void dbg_flush_state() {
+    m_dbgStr[HEADER_STR_LEN + m_dbgNumEntries++] = '\n'; 
+    m_dbgStr[HEADER_STR_LEN + m_dbgNumEntries++] = 0; 
+    dbg_serial("DispatchSlottedCsmaP",m_dbgStr);
+    m_dbgNumEntries = 0;
+  }
+#else 
+#define dbg_push_state(X)
+#define dbg_flush_state()
+#endif
+
+  error_t reset(error_t error)
+  {
+    if (call RadioToken.isOwner()) // internal error! this must not happen!
+      return FAIL;
+    if (m_currentFrame)
+      signal FrameTx.transmitDone(m_currentFrame, error);
+    if (m_lastFrame)
+      signal FrameTx.transmitDone(m_lastFrame, error);
+    if (m_bcastFrame)
+      signalTxBroadcastDone(m_bcastFrame, error);
+    m_currentFrame = m_lastFrame = m_bcastFrame = NULL;
+    m_macMaxFrameTotalWaitTime = call MLME_GET.macMaxFrameTotalWaitTime();
+    stopAllAlarms();
+    return SUCCESS;
+  }
+
+  command error_t Reset.init()
+  {
+    return reset(IEEE154_TRANSACTION_OVERFLOW);
+  }
+
+  event void MLME_SYNC_LOSS.indication (
+                          ieee154_status_t lossReason,
+                          uint16_t PANId,
+                          uint8_t LogicalChannel,
+                          uint8_t ChannelPage,
+                          ieee154_security_t *security
+                        )
+  {
+    // we lost sync to the coordinator -> spool out current packet
+    reset(IEEE154_NO_BEACON);
+  }
+
+  async event void RadioToken.transferredFrom(uint8_t fromClient)
+  {
+    // we got the token, i.e. CAP has just started
+    uint32_t capDuration = (uint32_t) call SuperframeStructure.numCapSlots() * 
+      (uint32_t) call SuperframeStructure.sfSlotDuration();
+    uint16_t guardTime = call SuperframeStructure.guardTime();
+
+    dbg_serial("DispatchSlottedCsmaP", "Got token, remaining CAP time: %lu\n", 
+        call SuperframeStructure.sfStartTime() + capDuration - guardTime - call CapEndAlarm.getNow());
+
+    if (capDuration < guardTime) {
+      // CAP is too short to do anything useful
+      dbg_serial("DispatchSlottedCsmaP", "CAP too short!\n");
+      call RadioToken.transferTo(RADIO_CLIENT_CFP);
+      return;
+    } else {
+      capDuration -= guardTime;
+      if (DEVICE_ROLE)
+        m_broadcastRxPending = call SuperframeStructure.isBroadcastPending();
+      else { 
+        // COORD_ROLE
+        if (m_bcastFrame != NULL) {
+          // we have to transmit a broadcast frame immediately; this
+          // may require to a backup of the previously active frame 
+          // and a reinitializing the CSMA parameters -> will do it 
+          // in task context and then continue
+          m_lock = TRUE;
+          post setupTxBroadcastTask(); 
+          dbg_serial("DispatchSlottedCsmaP", "Preparing broadcast...\n");
+        }
+      }
+      call CapEndAlarm.startAt(call SuperframeStructure.sfStartTime(), capDuration);
+      if (call SuperframeStructure.battLifeExtDuration() > 0) {
+        dbg_serial("DispatchSlottedCsmaP", "battLifeExtDuration enabled!\n");
+        call BLEAlarm.startAt(call SuperframeStructure.sfStartTime(), call SuperframeStructure.battLifeExtDuration());
+      }
+    }
+    updateState();
+  }
+
+  command ieee154_status_t FrameTx.transmit(ieee154_txframe_t *frame)
+  {
+    if (m_currentFrame != NULL) {
+      // we've not finished transmitting the current frame yet
+      dbg_serial("DispatchSlottedCsmaP", "Overflow\n");
+      return IEEE154_TRANSACTION_OVERFLOW;
+    } else {
+      setCurrentFrame(frame);
+      dbg("DispatchSlottedCsmaP", "New frame to transmit, DSN: %lu\n", (uint32_t) MHR(frame)[MHR_INDEX_SEQNO]);
+      // a beacon must be found before transmitting in a beacon-enabled PAN
+      if (DEVICE_ROLE && !call IsTrackingBeacons.getNow()) {
+        call TrackSingleBeacon.start();
+        dbg_serial("DispatchSlottedCsmaP", "Tracking single beacon now\n");
+        // we'll get the Token after a beacon was found or a SYNC_LOSS event
+        // if none was found during the next aBaseSuperframeDuration*(2n+1) symbols  
+      }
+      updateState();
+      return IEEE154_SUCCESS;
+    }
+  }
+
+  event void TrackSingleBeacon.startDone(error_t error)
+  {
+    if (error != SUCCESS) // beacon could not be tracked
+      reset(IEEE154_NO_BEACON);
+    // else: we'll get the RadioToken and continue as usual ...
+  }
+
+  task void setupTxBroadcastTask()
+  {
+    ieee154_macDSN_t tmp;
+    ieee154_txframe_t *oldFrame = m_currentFrame;
+    if (COORD_ROLE) {
+      if (m_bcastFrame != NULL) {
+        // broadcasts should be transmitted *immediately* after the beacon,  
+        // which may interrupt a pending transmit operation from the previous
+        // CAP; back up the last active frame configuration (may be none)    
+        // and restore it after the broadcast frame has been transmitted;    
+        // do this through interfaces and don't wire them for DEVICE_ROLE,   
+        // so we don't waste the RAM of devices
+        backupCurrentFrame();
+        setCurrentFrame(m_bcastFrame);
+        if (oldFrame) {
+          // now the sequence number are out of order... swap them back
+          tmp = m_bcastFrame->header->mhr[MHR_INDEX_SEQNO];
+          m_bcastFrame->header->mhr[MHR_INDEX_SEQNO] = 
+            oldFrame->header->mhr[MHR_INDEX_SEQNO];
+          oldFrame->header->mhr[MHR_INDEX_SEQNO] = tmp;
+        }
+      }
+    }
+    m_lock = FALSE;
+    updateState(); 
+  }
+
+  void setCurrentFrame(ieee154_txframe_t *frame)
+  {
+    ieee154_macDSN_t dsn = call MLME_GET.macDSN();
+    frame->header->mhr[MHR_INDEX_SEQNO] = dsn++;
+    call MLME_SET.macDSN(dsn);
+    m_csma.NB = 0;
+    m_csma.macMaxCsmaBackoffs = m_macMaxCSMABackoffs = call MLME_GET.macMaxCSMABackoffs();
+    m_csma.macMaxBE = m_macMaxBE = call MLME_GET.macMaxBE();
+    m_csma.BE = call MLME_GET.macMinBE();
+    if (call MLME_GET.macBattLifeExt() && m_csma.BE > 2)
+      m_csma.BE = 2;
+    m_BE = m_csma.BE;
+    if (COORD_ROLE && call GetIndirectTxFrame.get() == frame)
+      m_macMaxFrameRetries =  0; // this is an indirect transmissions (never retransmit)
+    else
+      m_macMaxFrameRetries =  call MLME_GET.macMaxFrameRetries();
+    m_transactionTime = IEEE154_SHR_DURATION + 
+      (frame->headerLen + frame->payloadLen + 2) * IEEE154_SYMBOLS_PER_OCTET; // extra 2 for CRC
+    if (frame->header->mhr[MHR_INDEX_FC1] & FC1_ACK_REQUEST)
+      m_transactionTime += (IEEE154_aTurnaroundTime + IEEE154_aUnitBackoffPeriod + 
+          11 * IEEE154_SYMBOLS_PER_OCTET); // 11 byte for the ACK PPDU
+    // if (frame->headerLen + frame->payloadLen > IEEE154_aMaxSIFSFrameSize) 
+    //  m_transactionTime += call MLME_GET.macMinLIFSPeriod(); 
+    // else 
+    //  m_transactionTime += call MLME_GET.macMinSIFSPeriod(); 
+    m_macMaxFrameTotalWaitTime = call MLME_GET.macMaxFrameTotalWaitTime();
+    m_currentFrame = frame;
+  }
+ 
+  void stopAllAlarms()
+  {
+    call CapEndAlarm.stop();
+    if (DEVICE_ROLE)
+      call RxWaitAlarm.stop();
+    call BLEAlarm.stop();
+  }
+
+  /** 
+   * The updateState() function is called whenever something happened that
+   * might require a state transition; it implements a lock mechanism (m_lock)
+   * to prevent race conditions. Whenever the lock is set a "done"-event (from
+   * the SlottedCsmaCa/RadioRx/RadioOff interface) is pending and will "soon"
+   * unset the lock (and then updateState() will called again).  The
+   * updateState() function decides about the next state by checking a list of
+   * possible current states ordered by priority, e.g. it first always checks
+   * whether the CAP is still active. Calling this function more than necessary
+   * can do no harm.
+   */ 
+
+  void updateState()
+  {
+    uint32_t capDuration; 
+    next_state_t next;
+    atomic {
+      // long atomics are bad... but in this block, once the/ current state has
+      // been determined only one branch will/ be taken (there are no loops)
+      if (m_lock || !call RadioToken.isOwner())
+        return;
+      m_lock = TRUE; // lock
+      capDuration = (uint32_t) call SuperframeStructure.numCapSlots() * 
+               (uint32_t) call SuperframeStructure.sfSlotDuration();
+
+      // Check 1: has the CAP finished?
+      if ((call TimeCalc.hasExpired(call SuperframeStructure.sfStartTime(), 
+                capDuration - call SuperframeStructure.guardTime()) ||
+          !call CapEndAlarm.isRunning())) {
+        dbg_push_state(1);
+        if (call RadioOff.isOff()) {
+          stopAllAlarms();  // may still fire, but is locked through isOwner()
+          if (DEVICE_ROLE && m_indirectTxPending)
+            signal RxWaitAlarm.fired();
+          m_broadcastRxPending = FALSE;
+          if (COORD_ROLE && m_bcastFrame) {
+            // didn't manage to transmit a broadcast
+            restoreFrameFromBackup();
+            signalTxBroadcastDone(m_bcastFrame, IEEE154_CHANNEL_ACCESS_FAILURE);
+            m_bcastFrame = NULL;
+          }
+          m_lock = FALSE; // unlock
+          dbg_flush_state();
+          dbg_serial("DispatchSlottedCsmaP", "Handing over to CFP.\n");
+          call RadioToken.transferTo(RADIO_CLIENT_CFP);
+          return;
+        } else 
+          next = SWITCH_OFF;
+      }
+
+      // Check 2: should a broadcast frame be received/transmitted
+      // immediately at the start of CAP?
+      else if (DEVICE_ROLE && m_broadcastRxPending) {
+        // receive a broadcast from coordinator
+        dbg_push_state(2);
+        next = tryReceive();
+      } else if (COORD_ROLE && m_bcastFrame) {
+        dbg_push_state(2);
+        next = tryTransmit();
+      }
+
+      // Check 3: was an indirect transmission successfully started 
+      // and are we now waiting for a frame from the coordinator?
+      else if (DEVICE_ROLE && m_indirectTxPending) {
+        dbg_push_state(3);
+        next = tryReceive();
+      }
+
+      // Check 4: is some other operation (like MLME-SCAN or MLME-RESET) pending? 
+      else if (call IsRadioTokenRequested.getNow()) {
+        dbg_push_state(4);
+        if (call RadioOff.isOff()) {
+          stopAllAlarms();  // may still fire, but is locked through isOwner()
+          // nothing more to do... just release the Token
+          m_lock = FALSE; // unlock
+          dbg_serial("DispatchSlottedCsmaP", "Token requested: Handing over to CFP.\n");
+          call RadioToken.release();
+          return;
+        } else 
+          next = SWITCH_OFF;
+      }
+
+      // Check 5: is battery life extension (BLE) active and 
+      // has the BLE period expired?
+      else if (call SuperframeStructure.battLifeExtDuration() > 0 &&
+          call TimeCalc.hasExpired(call SuperframeStructure.sfStartTime(), 
+            call SuperframeStructure.battLifeExtDuration()) &&
+          !call IsRxEnableActive.getNow() && !macRxOnWhenIdle) {
+        dbg_push_state(5);
+        next = trySwitchOff();
+      }
+
+      // Check 6: is there a frame ready to transmit?
+      else if (m_currentFrame != NULL) {
+        dbg_push_state(6);
+        next = tryTransmit();
+      }
+
+      // Check 7: should we be in receive mode?
+      else if (COORD_ROLE || call IsRxEnableActive.getNow() || macRxOnWhenIdle) {
+        dbg_push_state(7);
+        next = tryReceive();
+        if (next == DO_NOTHING) {
+          // if there was an active MLME_RX_ENABLE.request then we'll
+          // inform the next higher layer that radio is now in Rx mode
+          post wasRxEnabledTask();
+        }
+      }
+
+      // Check 8: just make sure the radio is switched off  
+      else {
+        dbg_push_state(8);
+        next = trySwitchOff();
+      }
+
+      // if there is nothing to do, then we must clear the lock
+      if (next == DO_NOTHING)
+        m_lock = FALSE;
+    } // atomic
+
+    // put next state in operation (possibly keeping the lock)
+    switch (next)
+    {
+      case SWITCH_OFF: ASSERT(call RadioOff.off() == SUCCESS); break;
+      case WAIT_FOR_RXDONE: break;
+      case WAIT_FOR_TXDONE: break;
+      case DO_NOTHING: break;
+    }
+  }
+  
+  next_state_t tryTransmit()
+  {
+    // tries to transmit m_currentFrame
+    uint32_t capDuration = (uint32_t) call SuperframeStructure.numCapSlots() * 
+      (uint32_t) call SuperframeStructure.sfSlotDuration();
+    next_state_t next;
+
+    if (!call RadioOff.isOff())
+      next = SWITCH_OFF;
+    else {
+      uint32_t dtMax = capDuration - call SuperframeStructure.guardTime() - m_transactionTime;
+      // round to backoff boundary
+      dtMax = dtMax + (IEEE154_aUnitBackoffPeriod - (dtMax % IEEE154_aUnitBackoffPeriod));
+      if (dtMax > capDuration)
+        dtMax = 0;
+      if (call SuperframeStructure.battLifeExtDuration() > 0) {
+        // battery life extension
+        uint16_t bleLen = call SuperframeStructure.battLifeExtDuration();
+        if (bleLen < dtMax)
+          dtMax = bleLen;
+      }
+      if (call TimeCalc.hasExpired(call SuperframeStructure.sfStartTime(), dtMax))
+        next = DO_NOTHING; // frame doesn't fit in the remaining CAP
+      else {
+        error_t res;
+        res = call SlottedCsmaCa.transmit(m_currentFrame, &m_csma, 
+                   call SuperframeStructure.sfStartTime(), dtMax, m_resume, m_remainingBackoff);
+        dbg("DispatchSlottedCsmaP", "SlottedCsmaCa.transmit() -> %lu\n", (uint32_t) res);
+        next = WAIT_FOR_TXDONE; // this will NOT clear the lock
+      }
+    }
+    return next;
+  }
+
+  next_state_t tryReceive()
+  {
+    next_state_t next;
+    if (call RadioRx.isReceiving())
+      next = DO_NOTHING;
+    else if (!call RadioOff.isOff())
+      next = SWITCH_OFF;
+    else {
+      call RadioRx.enableRx(0, 0);
+      next = WAIT_FOR_RXDONE;
+    }
+    return next;
+  }
+
+  next_state_t trySwitchOff()
+  {
+    next_state_t next;
+    if (call RadioOff.isOff())
+      next = DO_NOTHING;
+    else
+      next = SWITCH_OFF;
+    return next;
+  }
+
+  async event void RadioOff.offDone() 
+  { 
+    m_lock = FALSE; 
+    updateState();
+  }
+
+  async event void RadioRx.enableRxDone() 
+  { 
+    if (DEVICE_ROLE && (m_indirectTxPending || m_broadcastRxPending))
+      call RxWaitAlarm.start(m_macMaxFrameTotalWaitTime);
+    m_lock = FALSE; 
+    updateState();
+  }
+
+  async event void CapEndAlarm.fired() { 
+    dbg_serial("DispatchSlottedCsmaP", "CapEndAlarm.fired()\n");
+    updateState();
+  }
+  async event void BLEAlarm.fired() { updateState();}
+  event void RxEnableStateChange.notify(bool whatever) { updateState();}
+  event void PIBUpdateMacRxOnWhenIdle.notify( const void* val ) {
+    atomic macRxOnWhenIdle = *((ieee154_macRxOnWhenIdle_t*) val);
+    updateState();
+  }
+
+  async event void RxWaitAlarm.fired() 
+  { 
+    if (DEVICE_ROLE && (m_indirectTxPending || m_broadcastRxPending))
+      atomic {
+        if (m_indirectTxPending) {
+          m_indirectTxPending = FALSE; 
+          post signalTxDoneTask(); 
+        } else if (m_broadcastRxPending) {
+          m_broadcastRxPending = FALSE;
+          updateState();
+        }
+      }
+  }
+
+  async event void SlottedCsmaCa.transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, 
+      bool ackPendingFlag,  uint16_t remainingBackoff, error_t result)
+  {
+    bool done = TRUE;
+    dbg("DispatchSlottedCsmaP", "SlottedCsmaCa.transmitDone() -> %lu\n", (uint32_t) result);
+    m_resume = FALSE;
+
+    switch (result)
+    {
+      case SUCCESS:
+        // frame was successfully transmitted, if ACK was requested
+        // then a matching ACK was successfully received as well   
+        m_txStatus = IEEE154_SUCCESS;
+        if (DEVICE_ROLE && frame->payload[0] == CMD_FRAME_DATA_REQUEST &&
+            ((frame->header->mhr[MHR_INDEX_FC1]) & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_CMD) {
+          // this was a data request frame
+          m_txStatus = IEEE154_NO_DATA; // pessimistic 
+          if (ackPendingFlag) {
+            // the coordinator has data for us; switch to Rx 
+            // to complete the indirect transmission         
+            m_indirectTxPending = TRUE;
+            m_lastFrame = m_currentFrame;
+            m_currentFrame = NULL;
+            ASSERT(call RadioRx.enableRx(0, 0) == SUCCESS);
+            return;
+          }
+        }
+        break;
+      case FAIL:
+        // The CSMA-CA algorithm failed: the frame was not transmitted,
+        // because channel was never idle                              
+        m_txStatus = IEEE154_CHANNEL_ACCESS_FAILURE;
+        break;
+      case ENOACK:
+        // frame was transmitted, but we didn't receive an ACK (although
+        // we requested an one). note: coordinator never retransmits an 
+        // indirect transmission (see above) 
+        if (m_macMaxFrameRetries > 0) {
+          // retransmit: reinitialize CSMA-CA parameters
+          done = FALSE;
+          m_csma.NB = 0;
+          m_csma.macMaxCsmaBackoffs = m_macMaxCSMABackoffs;
+          m_csma.macMaxBE = m_macMaxBE;
+          m_csma.BE = m_BE;
+          m_macMaxFrameRetries -= 1;
+        } else
+          m_txStatus = IEEE154_NO_ACK;
+        break;
+      case EINVAL: // DEBUG!!!
+        dbg_serial("DispatchSlottedCsmaP", "EINVAL returned by transmitDone()!\n");
+        // fall through
+      case ERETRY:
+        // frame was not transmitted, because the transaction does not
+        // fit in the remaining CAP (in beacon-enabled PANs only)
+        dbg_serial("DispatchSlottedCsmaP", "Transaction didn't fit, current BE: %lu\n", (uint32_t) csma->BE);
+        m_resume = TRUE;
+        m_remainingBackoff = remainingBackoff;
+        done = FALSE;
+        m_lock = FALSE; // debug! problem: if CAP endalarm has fired it's a deadlock!
+        if (!call CapEndAlarm.isRunning())
+          updateState();
+        return;
+        break;
+      default: 
+        ASSERT(0);
+        break;
+    }
+
+    if (COORD_ROLE && frame == m_bcastFrame) {
+      // always signal result of broadcast transmissions immediately 
+      restoreFrameFromBackup();
+      signalTxBroadcastDone(m_bcastFrame, (!done) ? IEEE154_CHANNEL_ACCESS_FAILURE : m_txStatus);
+      m_bcastFrame = NULL;
+    } else if (done) {
+      m_lastFrame = m_currentFrame;
+      m_currentFrame = NULL;
+      post signalTxDoneTask();
+    }  
+
+    m_lock = FALSE;
+    updateState();
+  }
+
+  task void signalTxDoneTask()
+  {
+    ieee154_txframe_t *lastFrame = m_lastFrame;
+    ieee154_status_t status = m_txStatus;
+    m_indirectTxPending = FALSE;
+    m_lastFrame = NULL; // only now can the next transmission can begin 
+    if (lastFrame) {
+      dbg("DispatchSlottedCsmaP", "Transmit done, DSN: %lu, result: 0x%lx\n", 
+          (uint32_t) MHR(lastFrame)[MHR_INDEX_SEQNO], (uint32_t) status);
+      signal FrameTx.transmitDone(lastFrame, status);
+    }
+    updateState();
+  }
+
+  event message_t* RadioRx.received(message_t* frame)
+  {
+    // received a frame -> find out frame type and
+    // signal it to responsible client component
+    uint8_t *payload = (uint8_t *) frame->data;
+    uint8_t *mhr = MHR(frame);
+    uint8_t frameType = mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK;
+
+    if (frameType == FC1_FRAMETYPE_CMD)
+      frameType += payload[0];
+    dbg("DispatchSlottedCsmaP", "Received frame, DSN: %lu, type: 0x%lu\n", 
+        (uint32_t) mhr[MHR_INDEX_SEQNO], (uint32_t) frameType);
+    atomic {
+      if (DEVICE_ROLE && (m_indirectTxPending || m_broadcastRxPending)) {
+        message_t* frameBuf;
+        call RxWaitAlarm.stop();
+        // TODO: check the following: 
+        // is this frame from our coordinator? hmm... we cannot say/ with
+        // certainty, because we might only know either the  coordinator
+        // extended or short address (and the frame could/ have been sent
+        // with the other addressing mode) ??
+        m_txStatus = IEEE154_SUCCESS;
+        if (m_indirectTxPending)
+          frameBuf = signal FrameExtracted.received[frameType](frame, m_lastFrame); // indirect tx from coord
+        else
+          frameBuf = signal FrameRx.received[frameType](frame); // broadcast from coordinator
+        signal RxWaitAlarm.fired();
+        return frameBuf;
+      } else
+        return signal FrameRx.received[frameType](frame);
+    }
+  }
+
+  void backupCurrentFrame()
+  {
+    ieee154_cap_frame_backup_t backup = {m_currentFrame, m_csma, m_transactionTime};
+    call FrameBackup.setNow(&backup);
+  }
+
+  void restoreFrameFromBackup()
+  {
+    ieee154_cap_frame_backup_t *backup = call FrameRestore.getNow();
+    if (backup != NULL) {
+      m_currentFrame = backup->frame;
+      memcpy(&m_csma, &backup->csma, sizeof(ieee154_csma_t));
+      m_transactionTime = backup->transactionTime;
+    }
+  }
+
+  async command ieee154_status_t BroadcastTx.transmitNow(ieee154_txframe_t *frame) 
+  {
+    // if this command is called then it is (MUST be) called only just before
+    // the token is transferred to this component and it is then called
+    // only once per CAP (max. one broadcast is allowed after a beacon
+    // transmission)
+    atomic {
+      if (!call RadioToken.isOwner() && m_bcastFrame == NULL) {
+        m_bcastFrame = frame;
+        return IEEE154_SUCCESS;
+      } else {
+        ASSERT(0);
+        return IEEE154_TRANSACTION_OVERFLOW;
+      }
+    }
+  }
+
+  void signalTxBroadcastDone(ieee154_txframe_t *frame, ieee154_status_t error)
+  {
+    signal BroadcastTx.transmitNowDone(frame, error);
+  }
+
+  task void wasRxEnabledTask()
+  {
+    signal WasRxEnabled.notify(TRUE);
+  }
+
+  event void RadioToken.granted()
+  {
+    ASSERT(0); // should never happen
+  }
+
+  default event void FrameTx.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) {}
+  default event message_t* FrameRx.received[uint8_t client](message_t* data) {return data;}
+  default async command bool IsRxEnableActive.getNow() {return FALSE;}
+
+  default async command void RxWaitAlarm.start(uint32_t dt) {ASSERT(0);}
+  default async command void RxWaitAlarm.stop() {ASSERT(0);}
+  default async command void RxWaitAlarm.startAt(uint32_t t0, uint32_t dt) {ASSERT(0);}
+  
+  default async command bool SuperframeStructure.isBroadcastPending() { return FALSE;}
+  default async event void BroadcastTx.transmitNowDone(ieee154_txframe_t *frame, ieee154_status_t status) {}
+  default event message_t* FrameExtracted.received[uint8_t client](message_t* msg, ieee154_txframe_t *txFrame) {return msg;}
+  default async command error_t FrameBackup.setNow(ieee154_cap_frame_backup_t* val) {return FAIL;}
+  default async command ieee154_cap_frame_backup_t* FrameRestore.getNow() {return NULL;}
+  event void TrackSingleBeacon.stopDone(error_t error){}
+  default command error_t TrackSingleBeacon.start() {if (DEVICE_ROLE) ASSERT(0); return SUCCESS;}
+
+  command error_t WasRxEnabled.enable() {return FAIL;}
+  command error_t WasRxEnabled.disable() {return FAIL;}
+  async event void RadioTokenRequested.requested(){ updateState(); }
+  async event void RadioTokenRequested.immediateRequested(){ updateState(); }
+}
diff --git a/tos/lib/mac/tkn154/DispatchUnslottedCsmaP.nc b/tos/lib/mac/tkn154/DispatchUnslottedCsmaP.nc
new file mode 100644
index 00000000..b0098b72
--- /dev/null
+++ b/tos/lib/mac/tkn154/DispatchUnslottedCsmaP.nc
@@ -0,0 +1,533 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.10 $
+ * $Date: 2009-05-18 12:54:10 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154_PHY.h"
+#include "TKN154_MAC.h"
+
+/** 
+ * This module is responsible for the transmission/reception of DATA and
+ * COMMAND frames in a nonbeacon-enabled PAN. Its main tasks are initialization
+ * of the parameters of the unslotted CSMA-CA algorithm (NB, BE, etc.),
+ * initiating retransmissions and managing requests for enabling the receiver
+ * for a finite period of time. It does not implement the actual CSMA-CA
+ * algorithm, because due to its timing requirements the CSMA-CA algorithm is
+ * not part of the MAC implementation but of the chip-specific radio driver.
+ */
+
+module DispatchUnslottedCsmaP
+{
+  provides
+  {
+    interface Init as Reset;
+    interface MLME_START;
+    interface FrameTx as FrameTx;
+    interface FrameRx as FrameRx[uint8_t frameType];
+    interface FrameExtracted as FrameExtracted[uint8_t frameType];
+    interface Notify<bool> as WasRxEnabled;
+  }
+  uses
+  {
+    interface Timer<TSymbolIEEE802154> as IndirectTxWaitTimer;
+    interface TransferableResource as RadioToken;
+    interface ResourceRequested as RadioTokenRequested;
+    interface GetNow<token_requested_t> as IsRadioTokenRequested;
+    interface GetNow<bool> as IsRxEnableActive; 
+    interface Set<ieee154_macSuperframeOrder_t> as SetMacSuperframeOrder;
+    interface Set<ieee154_macPanCoordinator_t> as SetMacPanCoordinator;     
+    interface Get<ieee154_txframe_t*> as GetIndirectTxFrame; 
+    interface Notify<bool> as RxEnableStateChange;
+    interface Notify<const void*> as PIBUpdateMacRxOnWhenIdle;
+    interface FrameUtility;
+    interface UnslottedCsmaCa;
+    interface RadioRx;
+    interface RadioOff;
+    interface MLME_GET;
+    interface MLME_SET;
+    interface TimeCalc;
+    interface Leds;
+  }
+}
+implementation
+{
+  typedef enum {
+    SWITCH_OFF,       
+    WAIT_FOR_RXDONE,  
+    WAIT_FOR_TXDONE,  
+    DO_NOTHING,       
+  } next_state_t; 
+
+  typedef enum {
+    INDIRECT_TX_ALARM,
+    NO_ALARM,
+  } rx_alarm_t;
+
+  /* state / frame management */
+  norace bool m_lock;
+  norace bool m_resume;
+  norace ieee154_txframe_t *m_currentFrame;
+  norace ieee154_txframe_t *m_lastFrame;
+  norace ieee154_macRxOnWhenIdle_t m_macRxOnWhenIdle;
+
+  /* variables for the unslotted CSMA-CA */
+  norace ieee154_csma_t m_csma;
+  norace ieee154_macMaxBE_t m_BE;
+  norace ieee154_macMaxCSMABackoffs_t m_macMaxCSMABackoffs;
+  norace ieee154_macMaxBE_t m_macMaxBE;
+  norace ieee154_macMaxFrameRetries_t m_macMaxFrameRetries;
+  norace ieee154_status_t m_txStatus;
+  norace uint32_t m_transactionTime;
+  norace bool m_indirectTxPending = FALSE;
+
+  /* function / task prototypes */
+  next_state_t tryReceive();
+  next_state_t tryTransmit();
+  next_state_t trySwitchOff();
+  void backupCurrentFrame();
+  void restoreFrameFromBackup();  
+  void updateState();
+  void setCurrentFrame(ieee154_txframe_t *frame);
+  void signalTxBroadcastDone(ieee154_txframe_t *frame, ieee154_status_t error);
+  task void signalTxDoneTask();
+  task void wasRxEnabledTask();
+  task void startIndirectTxTimerTask();
+  task void signalStartConfirmTask();
+
+  command error_t Reset.init()
+  {
+    if (m_currentFrame)
+      signal FrameTx.transmitDone(m_currentFrame, IEEE154_TRANSACTION_OVERFLOW);
+    if (m_lastFrame)
+      signal FrameTx.transmitDone(m_lastFrame, IEEE154_TRANSACTION_OVERFLOW);
+    m_currentFrame = m_lastFrame = NULL;
+    call IndirectTxWaitTimer.stop();
+    return SUCCESS;
+  }
+
+  command ieee154_status_t MLME_START.request  (
+                          uint16_t panID,
+                          uint8_t logicalChannel,
+                          uint8_t channelPage,
+                          uint32_t startTime,
+                          uint8_t beaconOrder,
+                          uint8_t superframeOrder,
+                          bool panCoordinator,
+                          bool batteryLifeExtension,
+                          bool coordRealignment,
+                          ieee154_security_t *coordRealignSecurity,
+                          ieee154_security_t *beaconSecurity)
+  {
+    ieee154_status_t status;
+    ieee154_macShortAddress_t shortAddress = call MLME_GET.macShortAddress();
+
+    // check parameters
+    if ((coordRealignSecurity && coordRealignSecurity->SecurityLevel) ||
+        (beaconSecurity && beaconSecurity->SecurityLevel))
+      status = IEEE154_UNSUPPORTED_SECURITY;
+    else if (shortAddress == 0xFFFF) 
+      status = IEEE154_NO_SHORT_ADDRESS;
+    else if (logicalChannel > 26 ||
+        (channelPage != IEEE154_SUPPORTED_CHANNELPAGE) ||
+        !(IEEE154_SUPPORTED_CHANNELS & ((uint32_t) 1 << logicalChannel)))
+      status =  IEEE154_INVALID_PARAMETER;
+    else if (beaconOrder != 15) 
+      status = IEEE154_INVALID_PARAMETER;
+    else {
+      call MLME_SET.macPANId(panID);
+      call MLME_SET.phyCurrentChannel(logicalChannel);
+      call MLME_SET.macBeaconOrder(beaconOrder);
+      call SetMacPanCoordinator.set(panCoordinator);
+      //TODO: check realignment
+      post signalStartConfirmTask();
+      status = IEEE154_SUCCESS;
+    }      
+    dbg_serial("DispatchUnslottedCsmaP", "MLME_START.request -> result: %lu\n", (uint32_t) status);
+    return status;
+  }
+
+  task void signalStartConfirmTask()
+  {
+    signal MLME_START.confirm(IEEE154_SUCCESS);
+  }
+
+  command ieee154_status_t FrameTx.transmit(ieee154_txframe_t *frame)
+  {
+    if (m_currentFrame != NULL) {
+      // we've not finished transmitting the current frame yet
+      dbg_serial("DispatchUnslottedCsmaP", "Overflow\n");
+      return IEEE154_TRANSACTION_OVERFLOW;
+    } else {
+      setCurrentFrame(frame);
+      if (call RadioToken.isOwner())
+        updateState();
+      else
+        call RadioToken.request();      
+      return IEEE154_SUCCESS;
+    }
+  }
+
+  event void RadioToken.granted()
+  {
+    updateState();
+  }
+
+  void setCurrentFrame(ieee154_txframe_t *frame)
+  {
+    if (frame->header->mhr[MHR_INDEX_FC1] != FC1_FRAMETYPE_BEACON) { 
+      // set the sequence number for command/data frame
+      ieee154_macDSN_t dsn = call MLME_GET.macDSN();
+      frame->header->mhr[MHR_INDEX_SEQNO] = dsn++;
+      call MLME_SET.macDSN(dsn);
+    } else {
+      // set the sequence number for beacon frame
+      ieee154_macBSN_t bsn = call MLME_GET.macBSN(); 
+      frame->header->mhr[MHR_INDEX_SEQNO] = bsn++;
+      call MLME_SET.macBSN(bsn);
+    }    
+    m_csma.NB = 0;
+    m_csma.macMaxCsmaBackoffs = m_macMaxCSMABackoffs = call MLME_GET.macMaxCSMABackoffs();
+    m_csma.macMaxBE = m_macMaxBE = call MLME_GET.macMaxBE();
+    m_csma.BE = call MLME_GET.macMinBE();
+    if (call MLME_GET.macBattLifeExt() && m_csma.BE > 2)
+      m_csma.BE = 2;
+    m_BE = m_csma.BE;
+    if (call GetIndirectTxFrame.get() == frame)
+      m_macMaxFrameRetries =  0; // this is an indirect transmissions (never retransmit)
+    else
+      m_macMaxFrameRetries =  call MLME_GET.macMaxFrameRetries();
+    m_transactionTime = IEEE154_SHR_DURATION + 
+      (frame->headerLen + frame->payloadLen + 2) * IEEE154_SYMBOLS_PER_OCTET; // extra 2 for CRC
+    if (frame->header->mhr[MHR_INDEX_FC1] & FC1_ACK_REQUEST)
+      m_transactionTime += (IEEE154_aTurnaroundTime + IEEE154_aUnitBackoffPeriod + 
+          11 * IEEE154_SYMBOLS_PER_OCTET); // 11 byte for the ACK PPDU
+    // if (frame->headerLen + frame->payloadLen > IEEE154_aMaxSIFSFrameSize) 
+    //  m_transactionTime += call MLME_GET.macMinLIFSPeriod(); 
+    // else 
+    //  m_transactionTime += call MLME_GET.macMinSIFSPeriod(); 
+    m_currentFrame = frame;
+  }
+
+  /** 
+   * The updateState() function is called whenever some event happened that
+   * might require a state transition; it implements a lock mechanism (m_lock)
+   * to prevent race conditions. Whenever the lock is set a "done"-event (from
+   * a RadioTx/RadioRx/RadioOff interface) is pending and will "soon" unset the
+   * lock (and then updateState() will called again).  The updateState()
+   * function decides about the next state by checking a list of possible
+   * current states ordered by priority. Calling this function more than
+   * necessary can do no harm.
+   */ 
+
+  void updateState()
+  {
+    next_state_t next;
+    atomic {
+      // long atomics are bad... but in this block, once the
+      // current state has been determined only one branch will
+      // be taken (there are no loops)
+      if (m_lock || !call RadioToken.isOwner())
+        return;
+      m_lock = TRUE; // lock
+
+      // Check 1: was an indirect transmission successfully started 
+      // and are we now waiting for a frame from the coordinator?
+      if (m_indirectTxPending) {
+        next = tryReceive();
+      }
+
+      // Check 2: is some other operation (like MLME-SCAN or MLME-RESET) pending? 
+      else if (call IsRadioTokenRequested.getNow()) {
+        if (call RadioOff.isOff()) {
+          // nothing more to do... just release the Token
+          dbg_serial("DispatchUnslottedCsmaP", "Token requested: releasing it.\n");
+          call RadioToken.request(); // we want it back afterwards ...
+          m_lock = FALSE; // unlock
+          call RadioToken.release();
+          return;
+        } else 
+          next = SWITCH_OFF;
+      }
+
+      // Check 3: is there a frame ready to transmit?
+      else if (m_currentFrame != NULL) {
+        next = tryTransmit();
+      }
+
+      // Check 4: should we be in receive mode?
+      else if (call IsRxEnableActive.getNow() || m_macRxOnWhenIdle) {
+        next = tryReceive();
+        if (next == DO_NOTHING) {
+          // if there was an active MLME_RX_ENABLE.request then we'll
+          // inform the next higher layer that radio is now in Rx mode
+          post wasRxEnabledTask();
+        }
+      }
+
+      // Check 5: just make sure the radio is switched off  
+      else {
+        next = trySwitchOff();
+        if (next == DO_NOTHING) {
+          // nothing more to do... just release the Token
+          m_lock = FALSE; // unlock
+          dbg_serial("DispatchUnslottedCsmaP", "Releasing token\n");
+          call RadioToken.release();
+          return;
+        }
+      }
+
+      // if there is nothing to do, then we must clear the lock
+      if (next == DO_NOTHING)
+        m_lock = FALSE;
+    } // atomic
+
+    // put next state in operation (possibly keeping the lock)
+    switch (next)
+    {
+      case SWITCH_OFF: ASSERT(call RadioOff.off() == SUCCESS); break;
+      case WAIT_FOR_RXDONE: break;
+      case WAIT_FOR_TXDONE: break;
+      case DO_NOTHING: break;
+    }
+  }
+  
+  next_state_t tryTransmit()
+  {
+    // tries to transmit m_currentFrame
+    next_state_t next;
+
+    if (!call RadioOff.isOff())
+      next = SWITCH_OFF;
+    else {
+      error_t res;
+      res = call UnslottedCsmaCa.transmit(m_currentFrame, &m_csma);
+      dbg("DispatchUnslottedCsmaP", "UnslottedCsmaCa.transmit() -> %lu\n", (uint32_t) res);
+      next = WAIT_FOR_TXDONE; // this will NOT clear the lock
+    }
+    return next;
+  }
+
+  next_state_t tryReceive()
+  {
+    next_state_t next;
+    if (call RadioRx.isReceiving())
+      next = DO_NOTHING;
+    else if (!call RadioOff.isOff())
+      next = SWITCH_OFF;
+    else {
+      call RadioRx.enableRx(0, 0);
+      next = WAIT_FOR_RXDONE;
+    }
+    return next;
+  }
+
+  next_state_t trySwitchOff()
+  {
+    next_state_t next;
+    if (call RadioOff.isOff())
+      next = DO_NOTHING;
+    else
+      next = SWITCH_OFF;
+    return next;
+  }
+
+  async event void RadioOff.offDone() 
+  { 
+    m_lock = FALSE; 
+    updateState();
+  }
+
+  async event void RadioRx.enableRxDone() 
+  { 
+    if (m_indirectTxPending) // indirect transmission, now waiting for data
+      post startIndirectTxTimerTask();
+    m_lock = FALSE; 
+    updateState();
+  }
+
+  event void RxEnableStateChange.notify(bool whatever) 
+  { 
+    if (!call RadioToken.isOwner())
+      call RadioToken.request();
+    else
+      updateState();
+  }
+
+  event void PIBUpdateMacRxOnWhenIdle.notify( const void* val ) 
+  {
+    atomic m_macRxOnWhenIdle = *((ieee154_macRxOnWhenIdle_t*) val);
+    signal RxEnableStateChange.notify(TRUE);
+  }
+
+  event void IndirectTxWaitTimer.fired() 
+  { 
+    atomic {
+      if (m_indirectTxPending) {
+        m_indirectTxPending = FALSE; 
+        post signalTxDoneTask(); 
+      }
+    }
+  }
+
+  task void startIndirectTxTimerTask()
+  {
+    call IndirectTxWaitTimer.startOneShot(call MLME_GET.macMaxFrameTotalWaitTime()); 
+  }
+
+  async event void UnslottedCsmaCa.transmitDone(ieee154_txframe_t *frame, 
+      ieee154_csma_t *csma, bool ackPendingFlag, error_t result)
+  {
+    bool done = TRUE;
+    dbg("DispatchUnslottedCsmaP", "UnslottedCsmaCa.transmitDone() -> %lu\n", (uint32_t) result);
+    m_resume = FALSE;
+
+    switch (result)
+    {
+      case SUCCESS:
+        // frame was successfully transmitted, if ACK was requested
+        // then a matching ACK was successfully received as well   
+        m_txStatus = IEEE154_SUCCESS;
+        if (frame->payload[0] == CMD_FRAME_DATA_REQUEST &&
+            ((frame->header->mhr[MHR_INDEX_FC1]) & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_CMD) {
+          // this was a data request frame
+          m_txStatus = IEEE154_NO_DATA; // pessimistic 
+          if (ackPendingFlag) {
+            // the coordinator has data for us; switch to Rx 
+            // to complete the indirect transmission         
+            m_indirectTxPending = TRUE;
+            m_lastFrame = m_currentFrame;
+            m_currentFrame = NULL;
+            ASSERT(call RadioRx.enableRx(0, 0) == SUCCESS);
+            return;
+          }
+        }
+        break;
+      case FAIL:
+        // The CSMA-CA algorithm failed: the frame was not transmitted,
+        // because channel was never idle                              
+        m_txStatus = IEEE154_CHANNEL_ACCESS_FAILURE;
+        break;
+      case ENOACK:
+        // frame was transmitted, but we didn't receive an ACK (although
+        // we requested an one). note: coordinator never retransmits an 
+        // indirect transmission (see above) 
+        if (m_macMaxFrameRetries > 0) {
+          // retransmit: reinitialize CSMA-CA parameters
+          done = FALSE;
+          m_csma.NB = 0;
+          m_csma.macMaxCsmaBackoffs = m_macMaxCSMABackoffs;
+          m_csma.macMaxBE = m_macMaxBE;
+          m_csma.BE = m_BE;
+          m_macMaxFrameRetries -= 1;
+        } else
+          m_txStatus = IEEE154_NO_ACK;
+        break;
+      default: 
+        ASSERT(0);
+        break;
+    }
+
+    if (done) {
+      m_lastFrame = m_currentFrame;
+      m_currentFrame = NULL;
+      post signalTxDoneTask();
+    }  
+
+    m_lock = FALSE;
+    updateState();
+  }
+
+  task void signalTxDoneTask()
+  {
+    ieee154_txframe_t *lastFrame = m_lastFrame;
+    ieee154_status_t status = m_txStatus;
+    m_indirectTxPending = FALSE;
+    m_lastFrame = NULL; // only now the next transmission can begin 
+    if (lastFrame) {
+      dbg("DispatchUnslottedCsmaP", "Transmit done, DSN: %lu, result: 0x%lx\n", 
+          (uint32_t) MHR(lastFrame)[MHR_INDEX_SEQNO], (uint32_t) status);
+      signal FrameTx.transmitDone(lastFrame, status);
+    }
+    updateState();
+  }
+
+  event message_t* RadioRx.received(message_t* frame)
+  {
+    // received a frame -> find out frame type and
+    // signal it to responsible client component
+    uint8_t *payload = (uint8_t *) frame->data;
+    uint8_t *mhr = MHR(frame);
+    uint8_t frameType = mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK;
+
+    if (frameType == FC1_FRAMETYPE_CMD)
+      frameType += payload[0];
+    dbg("DispatchUnslottedCsmaP", "Received frame, DSN: %lu, type: 0x%lu\n", 
+        (uint32_t) mhr[MHR_INDEX_SEQNO], (uint32_t) frameType);
+    atomic {
+      if (m_indirectTxPending) {
+        message_t* frameBuf;
+        call IndirectTxWaitTimer.stop();
+        // TODO: check!
+        //if (frame->payloadLen)
+          // is this frame from our coordinator? hmm... we cannot say
+          // with certainty, because we might only know either the 
+          // coordinator extended or short address (and the frame could
+          // have been sent with the other addressing mode) ??
+          m_txStatus = IEEE154_SUCCESS;
+        frameBuf = signal FrameExtracted.received[frameType](frame, m_lastFrame);
+        signal IndirectTxWaitTimer.fired();
+        return frameBuf;
+      } else
+        return signal FrameRx.received[frameType](frame);
+    }
+  }
+
+  task void wasRxEnabledTask()
+  {
+    signal WasRxEnabled.notify(TRUE);
+  }
+
+
+  default event void FrameTx.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) {}
+  default event message_t* FrameRx.received[uint8_t client](message_t* data) {return data;}
+  default async command bool IsRxEnableActive.getNow() {return FALSE;}
+
+  default event message_t* FrameExtracted.received[uint8_t client](message_t* msg, ieee154_txframe_t *txFrame) {return msg;}
+
+  command error_t WasRxEnabled.enable() {return FAIL;}
+  command error_t WasRxEnabled.disable() {return FAIL;}
+  default event void MLME_START.confirm(ieee154_status_t status) {}
+  async event void RadioToken.transferredFrom(uint8_t fromClientID) {ASSERT(0);}
+  async event void RadioTokenRequested.requested(){ updateState(); }
+  async event void RadioTokenRequested.immediateRequested(){ updateState(); }
+}
diff --git a/tos/lib/mac/tkn154/InactivePeriodP.nc b/tos/lib/mac/tkn154/InactivePeriodP.nc
new file mode 100644
index 00000000..3238d61d
--- /dev/null
+++ b/tos/lib/mac/tkn154/InactivePeriodP.nc
@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2010, KTH Royal Institute of Technology
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 
+ *  - Redistributions of source code must retain the above copyright notice, this list
+ *  of conditions and the following disclaimer.
+ * 
+ * - Redistributions in binary form must reproduce the above copyright notice, this
+ *    list of conditions and the following disclaimer in the documentation and/or other
+ *  materials provided with the distribution.
+ * 
+ * - Neither the name of the Royal Institute of Technology nor the names of its 
+ *    contributors may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+ * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ */
+/** 
+ * The component InactivePeriodP owns the radio token during the inactive period in
+ * nodes in beacon-enabled networks. It powers the radio down and restarts it before
+ * handing over the radio token to the beacon reception/transmission component.
+ * Depending on the actual radio, powering it down may result in less energy 
+ * consumption than idle, e.g. for the CC2420 powering down means disabling the
+ * crystal oscillator, which saves a significant amount energy compard to the
+ * idle state. 
+ *
+ * @author João Faria <jfff@kth.se>
+ * @author Aitor Hernandez <aitorhh@kth.se>
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ */
+
+#include "TKN154_MAC.h"
+
+generic module InactivePeriodP(uint8_t sfDirection)
+{
+  uses {
+    interface TransferableResource as RadioToken;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm;
+    interface SplitControl as RadioControl;
+    interface SuperframeStructure as SF;
+    interface GetNow<bool> as IsEmbedded;
+    interface RadioOff;
+    interface MLME_GET;
+    interface TimeCalc;
+  }
+}
+implementation {
+
+#ifndef IEEE154_RADIO_POWERUP_TIME  
+
+  async event void RadioToken.transferredFrom(uint8_t fromClient) 
+  {
+    dbg_serial("InactivePeriodP", "Power down disabled, transferring token\n");
+    if (sfDirection == OUTGOING_SUPERFRAME) {
+      call RadioToken.transferTo(RADIO_CLIENT_BEACONSYNCHRONIZE);
+    } else {
+      call RadioToken.transferTo(RADIO_CLIENT_BEACONTRANSMIT);
+    }
+  }
+
+  async event void RadioOff.offDone() { ASSERT(0);}
+  event void RadioControl.stopDone(error_t result) { }
+  event void RadioControl.startDone(error_t result) { }
+  async event void Alarm.fired() { ASSERT(0);}
+  event void RadioToken.granted() { ASSERT(0);}
+
+#else
+
+  task void offDoneTask();
+  task void firedTask();
+
+  void transferToken() 
+  {
+    dbg_serial("InactivePeriodP", "Transferring token\n");
+    if (sfDirection == OUTGOING_SUPERFRAME) {
+      call RadioToken.transferTo(RADIO_CLIENT_BEACONSYNCHRONIZE);
+    } else {
+      call RadioToken.transferTo(RADIO_CLIENT_BEACONTRANSMIT);
+    }
+  }
+
+  uint32_t maxDt()
+  {
+    return call SF.beaconInterval() - IEEE154_RADIO_POWERUP_TIME - call SF.guardTime();
+  }
+
+  bool tooLate()
+  {
+    if (call IsEmbedded.getNow()) {
+      // we have a situation where there is an incoming and outgoing superframe 
+      // (scenario as indicated in 802.15.4-2006 Fig. 67), so the inactive period 
+      // is not "inactive", we should not power down (TODO: we might power down
+      // for a smaller amount of time, the time in between two superframes)
+      return TRUE;
+    } else
+      return call TimeCalc.hasExpired(call SF.sfStartTime(), maxDt());
+  }
+
+  async event void RadioToken.transferredFrom(uint8_t fromClient) 
+  {
+    if (tooLate()) {
+      dbg_serial("InactivePeriodP", "Got token: Not enough time to powerdown %lu, %lu.\n", (uint32_t) call SF.beaconInterval(), maxDt());
+      transferToken();
+    } else {
+      error_t error = call RadioOff.off();
+      dbg_serial("InactivePeriodP", "Got token, switching radio off: %lu (%lu)\n", (uint32_t) error, call Alarm.getNow());
+      if (error == EALREADY) 
+        signal RadioOff.offDone();
+      else if (error != SUCCESS) 
+        transferToken();
+    }
+  }
+
+  async event void RadioOff.offDone() 
+  {
+    post offDoneTask(); 
+  }
+
+  task void offDoneTask() 
+  {
+    dbg_serial("InactivePeriodP", "Trying to power radio down\n");
+    if (tooLate() || call RadioControl.stop() != SUCCESS) /* Disable the radio chip, voltage reg, oscillator, mm */
+      transferToken();
+  }
+
+  event void RadioControl.stopDone(error_t result) 
+  {
+    // NOTE: RadioControl is fanning out, so we have to check if we
+    // are the actual client that is owning the radio (or if someone 
+    // else has called RadioControl.stop).
+    if (call RadioToken.isOwner()) {
+      dbg_serial("InactivePeriodP", "Radio powered down: %lu\n", (uint32_t) result);
+      call Alarm.startAt(call SF.sfStartTime(), maxDt());
+    }
+  }
+
+  async event void Alarm.fired() 
+  { 
+    post firedTask(); 
+  }
+
+  task void firedTask() {
+    dbg_serial("InactivePeriodP", "Powering radio up again (%lu)\n", call Alarm.getNow());
+    call RadioControl.start();
+  }
+
+  event void RadioControl.startDone(error_t error) {
+    // comment at RadioControl.stopDone() applies here as well
+    if (call RadioToken.isOwner()) {
+      dbg_serial("InactivePeriodP", "Done: radio powered up (%lu)\n", call Alarm.getNow());
+      transferToken();
+    }
+  }
+
+  event void RadioToken.granted() { ASSERT(0);}
+#endif
+}
diff --git a/tos/lib/mac/tkn154/IndirectTxP.nc b/tos/lib/mac/tkn154/IndirectTxP.nc
new file mode 100644
index 00000000..ac39b460
--- /dev/null
+++ b/tos/lib/mac/tkn154/IndirectTxP.nc
@@ -0,0 +1,386 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.10 $
+ * $Date: 2010-02-04 16:31:15 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * @author: Jasper Buesch <buesch@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+module IndirectTxP
+{
+  provides
+  {
+    interface Init as Reset;
+    interface FrameTx[uint8_t client];
+    interface WriteBeaconField as PendingAddrWrite;
+    interface Notify<bool> as PendingAddrSpecUpdated;
+    interface Get<ieee154_txframe_t*> as GetIndirectTxFrame; 
+    interface Purge;
+  }
+  uses
+  {
+    interface FrameTx as CoordCapTx;
+    interface FrameRx as DataRequestRx;
+    interface MLME_GET;
+    interface IEEE154Frame;
+    interface Timer<TSymbolIEEE802154> as IndirectTxTimeout;
+    interface TimeCalc;
+    interface Leds;
+  }
+}
+implementation
+{
+  enum {
+    SEND_THIS_FRAME = 0x80,
+    NUM_MAX_PENDING = 7,
+  };
+
+  ieee154_txframe_t *m_txFrameTable[NUM_MAX_PENDING];
+  ieee154_txframe_t *m_pendingTxFrame;
+  uint8_t m_client;
+  uint8_t m_numTableEntries;
+  uint8_t m_numShortPending;
+  uint8_t m_numExtPending;
+  ieee154_txframe_t m_emptyDataFrame;
+  ieee154_metadata_t m_emptyDataFrameMetadata;
+  ieee154_header_t m_emptyDataFrameHeader;
+
+  task void tryCoordCapTxTask();
+  void tryCoordCapTx();
+  void transmitEmptyDataFrame(message_t* dataRequestFrame);
+
+  command error_t Reset.init()
+  {
+    uint8_t i;
+    // CAP/Queue component is always reset first, i.e. there
+    // should be no outstanding frames
+    call IndirectTxTimeout.stop();
+    for (i=0; i<NUM_MAX_PENDING; i++)
+      if (m_txFrameTable[i] != NULL)
+        signal FrameTx.transmitDone[m_txFrameTable[i]->client](m_txFrameTable[i], IEEE154_TRANSACTION_OVERFLOW);    
+    for (i=0; i<NUM_MAX_PENDING; i++)
+      m_txFrameTable[i] = NULL; // empty slot
+    m_pendingTxFrame = NULL;
+    m_numTableEntries = 0;
+    m_numShortPending = 0;
+    m_numExtPending = 0;
+
+    m_emptyDataFrame.header = &m_emptyDataFrameHeader;
+    m_emptyDataFrame.metadata = &m_emptyDataFrameMetadata;
+    m_emptyDataFrame.payload = &m_numExtPending; // dummy (payloadLen is always 0)
+    m_emptyDataFrame.payloadLen = 0;
+    m_emptyDataFrame.client = 0; // unlock
+    return SUCCESS;
+  }
+
+  uint32_t getPersistenceTimeSymbols()
+  {
+    // transform macTransactionPersistenceTime PIB attribute
+    // from "unit periods" to symbols (cf. page 166) 
+    uint32_t unitPeriod;
+    ieee154_macBeaconOrder_t BO = call MLME_GET.macBeaconOrder();
+
+    if (BO <= 14) {
+      unitPeriod = IEEE154_aBaseSuperframeDuration;
+      unitPeriod *= ((uint16_t) 1) << BO;
+    } else
+      unitPeriod = IEEE154_aBaseSuperframeDuration;
+    return unitPeriod * call MLME_GET.macTransactionPersistenceTime();
+  }
+
+  command ieee154_status_t Purge.purge(uint8_t msduHandle)
+  {
+    uint8_t i = 0;
+    for (i=0; i<NUM_MAX_PENDING; i++) {
+      if ((m_txFrameTable[i]->handle == msduHandle) && (m_client != m_txFrameTable[i]->client) ){
+        ieee154_txframe_t *purgedFrame;
+        purgedFrame = m_txFrameTable[i];
+        m_txFrameTable[i] = NULL;
+        m_numTableEntries -= 1;
+        signal Purge.purgeDone(purgedFrame, IEEE154_PURGED);
+        return IEEE154_SUCCESS;
+      }
+    }
+    return IEEE154_INVALID_HANDLE;
+  }
+
+  command uint8_t PendingAddrWrite.write(uint8_t *lastBytePtr, uint8_t maxlen)
+  {
+    // writes the pending addr field (inside the beacon frame)
+    // we go "backwards", i.e. start with the extended addresses,
+    // then the short addresses, then the "Pending Address Specification" 
+    uint8_t i, j, k;
+    uint8_t numShort, numExt;
+    nxle_uint16_t *shortAddrPtr;
+    ieee154_txframe_t *txFrame;
+    
+    numExt = 0;
+    for (i=0; i<NUM_MAX_PENDING && numExt <= 7; i++) {
+      if (m_txFrameTable[i] == NULL)
+        continue;
+      txFrame = m_txFrameTable[i];
+      if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_EXTENDED) {
+        uint8_t *curExtAddrPtr = &(txFrame->header->mhr[MHR_INDEX_ADDRESS + sizeof(ieee154_macPANId_t)]);
+        k = 0;
+        // search for duplicate dest. address
+        for (j=0; j<numExt && k!=8; j++) {
+          for (k=0; k<8; k++)
+            if (curExtAddrPtr[k] != lastBytePtr[-7-j*8+k])
+              break;
+        }
+        if (k == 8)
+          break; // was a duplicate dest address
+        numExt += 1;
+        for (j=0; j<8; j++)
+          lastBytePtr[-numExt*8+1+j] = curExtAddrPtr[j];
+      }
+    }
+
+    shortAddrPtr = (nxle_uint16_t *) &lastBytePtr[-numExt*8+1];
+    numShort = 0;
+    for (i=0; i<NUM_MAX_PENDING && numShort < 7; i++) {
+      if (m_txFrameTable[i] == NULL)
+        continue;
+      txFrame = m_txFrameTable[i];
+      if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_SHORT) {
+        nxle_uint16_t shortAddr;
+        shortAddr = *((nxle_uint16_t*) &txFrame->header->mhr[MHR_INDEX_ADDRESS + sizeof(ieee154_macPANId_t)]);
+        for (j=0; j<numShort; j++)
+          if (shortAddr == shortAddrPtr[-j-1])
+            break;
+        if (j != numShort)
+          break; // was a duplicate dest address
+        numShort += 1;
+        shortAddrPtr[-numShort] = shortAddr;
+      }
+    }
+    lastBytePtr[-(numShort*2+numExt*8)] = numShort | (numExt << 4); // writes the pendingAddrField
+    return 1 + numExt * 8 + numShort * 2;
+  }
+
+  command ieee154_status_t FrameTx.transmit[uint8_t client](ieee154_txframe_t *txFrame)
+  {
+    // sends a frame using indirect transmission
+    uint8_t i;
+    if (m_numTableEntries >= NUM_MAX_PENDING) {
+      dbg_serial("IndirectTxP", "Overflow\n");
+      return IEEE154_TRANSACTION_OVERFLOW;
+    }
+    txFrame->client = client;
+    txFrame->metadata->timestamp = call IndirectTxTimeout.getNow();
+    for (i=0; i<NUM_MAX_PENDING; i++)
+      if (!m_txFrameTable[i]) // there must be an empty slot
+        break;
+    m_txFrameTable[i] = txFrame;
+    m_numTableEntries += 1;
+    if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_SHORT)
+      m_numShortPending++;
+    else if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_EXTENDED)
+      m_numExtPending++;
+    if (!call IndirectTxTimeout.isRunning())
+      call IndirectTxTimeout.startOneShot(getPersistenceTimeSymbols());
+    dbg_serial("IndirectTxP", "Preparing a transmission.\n");
+    signal PendingAddrSpecUpdated.notify(TRUE);
+    return IEEE154_SUCCESS;
+  }
+
+  event message_t* DataRequestRx.received(message_t* frame)
+  {
+    uint8_t i, j, srcAddressMode, dstAddressMode, *src;
+    uint8_t *mhr = MHR(frame);
+    uint8_t destMode = (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK);
+    ieee154_txframe_t *dataResponseFrame = NULL;
+
+    // received a data request frame from a device
+    // have we got some pending data for it ?
+    srcAddressMode = (mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK);
+    if (!(srcAddressMode & FC2_SRC_MODE_SHORT))
+      return frame;  // no source address
+    src = mhr + MHR_INDEX_ADDRESS;
+    if (destMode == FC2_DEST_MODE_SHORT)
+      src += 4;
+    else if (destMode == FC2_DEST_MODE_EXTENDED)
+      src += 10;
+    if (!((mhr[MHR_INDEX_FC1] & FC1_PAN_ID_COMPRESSION) && (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_SHORT)))
+      src += 2;
+    for (i=0; i<NUM_MAX_PENDING; i++) {
+      if (m_txFrameTable[i] == NULL)
+        continue;
+      else {
+        dstAddressMode = (m_txFrameTable[i]->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK);
+        if ((dstAddressMode << 4) != srcAddressMode)
+          continue;
+        else {
+          // we know: dstAddressMode IN [2,3]
+          uint8_t *dst = &(m_txFrameTable[i]->header->mhr[MHR_INDEX_ADDRESS]) + 2;
+          uint8_t len = ((srcAddressMode == FC2_SRC_MODE_SHORT) ? 2 : 8);
+          for (j=0; j<len; j++)
+            if (dst[j] != src[j])
+              break;  // no match!
+          if (j==len) { // match!
+            if (dataResponseFrame == NULL)
+              dataResponseFrame = m_txFrameTable[i];
+            else // got even more than one frame for this device: set pending flag
+              dataResponseFrame->header->mhr[MHR_INDEX_FC1] |= FC1_FRAME_PENDING;
+          }
+        }
+      }
+    }
+    if (dataResponseFrame != NULL) {
+      // found a matching frame, mark it for transmission
+      dbg_serial("IndirectTxP", "We have data for this device, trying to transmit...\n");
+      dataResponseFrame->client |= SEND_THIS_FRAME;
+      post tryCoordCapTxTask();
+    } else {
+      dbg_serial("IndirectTxP", "We don't have data for this device, sending an empty frame...\n");
+      transmitEmptyDataFrame(frame);
+    }
+    return frame;
+  }
+
+  void transmitEmptyDataFrame(message_t* dataRequestFrame)
+  {
+    // the cast in the next line is dangerous -> this is only a temporary workaround!
+    // (until the new T2 message buffer abstraction is available)
+    message_t *emptyDataMsg = (message_t *) m_emptyDataFrame.header;
+    ieee154_address_t dstAddr;
+    uint16_t dstPanID;
+
+    if (m_emptyDataFrame.client != 0)
+      return; // locked (already transmitting an empty data frame)
+    if (call IEEE154Frame.getSrcAddr(dataRequestFrame, &dstAddr) != IEEE154_SUCCESS ||
+        call IEEE154Frame.getSrcPANId(dataRequestFrame, &dstPanID) != IEEE154_SUCCESS)
+      return;
+    call IEEE154Frame.setAddressingFields(emptyDataMsg,
+        call IEEE154Frame.getDstAddrMode(dataRequestFrame), // will become srcAddrMode
+        call IEEE154Frame.getSrcAddrMode(dataRequestFrame), // will become dstAddrMode
+        dstPanID,
+        &dstAddr,
+        NULL //security
+        );
+    MHR(&m_emptyDataFrame)[MHR_INDEX_FC1] |= FC1_FRAMETYPE_DATA;
+    m_emptyDataFrame.headerLen = call IEEE154Frame.getHeaderLength(emptyDataMsg);
+    m_emptyDataFrame.client = 1; // lock
+    if (call CoordCapTx.transmit(&m_emptyDataFrame) != IEEE154_SUCCESS)
+      m_emptyDataFrame.client = 0; // unlock
+  }
+
+  void tryCoordCapTx()
+  {
+    // iterate over the queued frames and transmit them in the CAP 
+    // (if they are marked for transmission)
+    uint8_t i;
+    if (m_pendingTxFrame == NULL && m_numTableEntries) {
+      for (i=0; i<NUM_MAX_PENDING; i++)
+        if (m_txFrameTable[i] && (m_txFrameTable[i]->client & SEND_THIS_FRAME)) {
+          m_pendingTxFrame = m_txFrameTable[i];
+          m_client = m_txFrameTable[i]->client;
+          if (call CoordCapTx.transmit(m_txFrameTable[i]) == IEEE154_SUCCESS) {
+            dbg_serial("IndirectTxP", "Started a transmission.\n");
+          } else {
+            m_pendingTxFrame = NULL;
+            post tryCoordCapTxTask();
+          }
+          return; // done - wait for txDone
+        }
+    }
+  }
+
+  task void tryCoordCapTxTask()
+  {
+    tryCoordCapTx();
+  }
+
+  event void IndirectTxTimeout.fired()
+  {
+    // a transaction has expired 
+    uint32_t now = call IndirectTxTimeout.getNow(), dt=0;
+    uint32_t persistenceTime = getPersistenceTimeSymbols();
+    uint8_t i;
+
+    for (i=0; i<NUM_MAX_PENDING; i++)
+      if (m_txFrameTable[i] && m_txFrameTable[i] != m_pendingTxFrame) {
+        if (call TimeCalc.hasExpired(m_txFrameTable[i]->metadata->timestamp, persistenceTime)) { 
+          ieee154_txframe_t *txFrame = m_txFrameTable[i];
+          txFrame->client &= ~SEND_THIS_FRAME;
+          m_txFrameTable[i] = NULL;
+          m_numTableEntries -= 1;
+          if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_SHORT)
+            m_numShortPending--;
+          else if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_EXTENDED)
+            m_numExtPending--;
+          signal FrameTx.transmitDone[txFrame->client](txFrame, IEEE154_TRANSACTION_EXPIRED);
+          signal PendingAddrSpecUpdated.notify(TRUE);
+        } else if (call TimeCalc.timeElapsed(m_txFrameTable[i]->metadata->timestamp, now) > dt) {
+          dt = call TimeCalc.timeElapsed(m_txFrameTable[i]->metadata->timestamp, now);
+        }
+      }
+    if (dt != 0) {
+      if (dt > persistenceTime)
+        dt = persistenceTime;
+      call IndirectTxTimeout.startOneShot(persistenceTime - dt);
+    }
+  }
+
+  event void CoordCapTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    uint8_t i;
+    // TODO: if CSMA-CA algorithm failed, then frame shall still remain in transaction queue
+    dbg_serial("IndirectTxP", "transmitDone(), status: %lu\n", (uint32_t) status);
+
+    if (txFrame == &m_emptyDataFrame) {
+      m_emptyDataFrame.client = 0; // unlock
+      return;
+    }
+    for (i=0; i<NUM_MAX_PENDING; i++)
+      if (m_txFrameTable[i] == txFrame) {
+        m_txFrameTable[i] = NULL; // slot is now empty
+        break;
+      }
+    signal PendingAddrSpecUpdated.notify(TRUE);
+    m_pendingTxFrame = NULL;
+    txFrame->client = m_client;
+    txFrame->client &= ~SEND_THIS_FRAME;
+    m_numTableEntries -= 1;
+    if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_SHORT)
+      m_numShortPending--;
+    else if ((txFrame->header->mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_EXTENDED)
+      m_numExtPending--;    
+    signal FrameTx.transmitDone[txFrame->client](txFrame, status);
+    post tryCoordCapTxTask();
+  }
+
+  command ieee154_txframe_t* GetIndirectTxFrame.get() { return m_pendingTxFrame;}
+  command error_t PendingAddrSpecUpdated.enable() {return FAIL;}
+  command error_t PendingAddrSpecUpdated.disable() {return FAIL;}
+  default event void PendingAddrSpecUpdated.notify( bool val ) {return;}
+  default event void FrameTx.transmitDone[uint8_t client](ieee154_txframe_t *txFrame, ieee154_status_t status) {}
+}
diff --git a/tos/lib/mac/tkn154/PibP.nc b/tos/lib/mac/tkn154/PibP.nc
new file mode 100644
index 00000000..e1f4ad0b
--- /dev/null
+++ b/tos/lib/mac/tkn154/PibP.nc
@@ -0,0 +1,1061 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Date: 2009-09-08 09:04:43 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * This component maintains the PIB (PAN Information Base) attributes and
+ * provides interfaces for accessing fields in a MAC frame. 
+ */
+
+#include "TKN154.h"
+#include "TKN154_PIB.h"
+#include "TKN154_PHY.h"
+
+module PibP {
+  provides 
+  {
+    interface Init as LocalInit;
+    interface MLME_RESET;
+    interface MLME_GET;
+    interface MLME_SET;
+    interface Set<ieee154_macSuperframeOrder_t> as SetMacSuperframeOrder;
+    interface Set<ieee154_macBeaconTxTime_t> as SetMacBeaconTxTime;
+    interface Set<ieee154_macPanCoordinator_t> as SetMacPanCoordinator;
+    interface FrameUtility;
+    interface IEEE154Frame as Frame;
+    interface IEEE154BeaconFrame as BeaconFrame;
+    interface Get<uint64_t> as GetLocalExtendedAddress;
+    interface GetNow<token_requested_t> as IsRadioTokenRequested;
+    interface Notify<const void*> as PIBUpdate[uint8_t PIBAttributeID];
+    interface Packet;
+    interface TimeCalc;
+  }
+  uses
+  {
+    interface Get<bool> as PromiscuousModeGet;
+    interface Init as DispatchReset;
+    interface Init as DispatchQueueReset;
+    interface Init as MacReset;
+    interface SplitControl as RadioControl;
+    interface Random;
+    interface TransferableResource as RadioToken;
+    interface RadioOff;
+    interface LocalTime<TSymbolIEEE802154>;
+  }
+}
+implementation
+{
+  ieee154_PIB_t m_pib;
+  uint8_t m_numResetClientPending;
+  bool m_setDefaultPIB;
+  norace uint8_t m_resetSpin;
+
+#ifdef IEEE154_EXTENDED_ADDRESS
+  const uint64_t m_aExtendedAddressLE = IEEE154_EXTENDED_ADDRESS;
+#else
+  norace uint64_t m_aExtendedAddressLE;
+#endif
+  task void radioControlStopTask();
+  void updateMacMaxFrameTotalWaitTime();
+  void resetAttributesToDefault();
+  bool isLocalExtendedAddress(uint8_t *addrLE);
+  bool isCoordExtendedAddress(uint8_t *addrLE); 
+  uint8_t getPendAddrSpecOffset(uint8_t *macPayloadField);
+  task void resetSpinTask();
+  
+  command error_t LocalInit.init()
+  {
+#ifndef IEEE154_EXTENDED_ADDRESS
+    m_aExtendedAddressLE = (((uint64_t) call Random.rand32() ) << 32 ) | call Random.rand32(); 
+#endif
+    resetAttributesToDefault();
+    return SUCCESS;
+  }
+
+  void resetAttributesToDefault() {
+    m_pib.phyCurrentChannel = IEEE154_DEFAULT_CURRENTCHANNEL;
+    m_pib.phyTransmitPower = (IEEE154_TXPOWER_TOLERANCE | (IEEE154_DEFAULT_TRANSMITPOWER_dBm & 0x3F));
+    m_pib.phyCCAMode = IEEE154_DEFAULT_CCAMODE;
+    m_pib.phyCurrentPage = IEEE154_DEFAULT_CURRENTPAGE;
+
+    m_pib.macAssociatedPANCoord = IEEE154_DEFAULT_ASSOCIATEDPANCOORD;
+    m_pib.macAssociationPermit = IEEE154_DEFAULT_ASSOCIATIONPERMIT;
+    m_pib.macAutoRequest = IEEE154_DEFAULT_AUTOREQUEST;
+    m_pib.macBattLifeExt = IEEE154_DEFAULT_BATTLIFEEXT;
+    m_pib.macBattLifeExtPeriods = IEEE154_DEFAULT_BATTLIFEEXTPERIODS;
+    m_pib.macBeaconPayloadLength = IEEE154_DEFAULT_BEACONPAYLOADLENGTH;
+    m_pib.macBeaconOrder = IEEE154_DEFAULT_BEACONORDER;
+    m_pib.macBeaconTxTime = IEEE154_DEFAULT_BEACONTXTIME;
+    m_pib.macBSN = 0xFF & (call Random.rand16());
+    //  macCoordExtendedAddress: default is undefined
+    m_pib.macCoordShortAddress = IEEE154_DEFAULT_COORDSHORTADDRESS;
+    m_pib.macDSN = 0xFF & (call Random.rand16());
+    m_pib.macGTSPermit = IEEE154_DEFAULT_GTSPERMIT;
+    m_pib.macMaxBE = IEEE154_DEFAULT_MAXBE;
+    m_pib.macMaxCSMABackoffs = IEEE154_DEFAULT_MAXCSMABACKOFFS;
+    m_pib.macMaxFrameRetries = IEEE154_DEFAULT_MAXFRAMERETRIES;
+    m_pib.macMinBE = IEEE154_DEFAULT_MINBE;
+    m_pib.macPANId = IEEE154_DEFAULT_PANID;
+    m_pib.macPromiscuousMode = IEEE154_DEFAULT_PROMISCUOUSMODE;
+    m_pib.macResponseWaitTime = IEEE154_DEFAULT_RESPONSEWAITTIME;
+    m_pib.macRxOnWhenIdle = IEEE154_DEFAULT_RXONWHENIDLE;
+    m_pib.macSecurityEnabled = IEEE154_DEFAULT_SECURITYENABLED;
+    m_pib.macShortAddress = IEEE154_DEFAULT_SHORTADDRESS;
+    m_pib.macSuperframeOrder = IEEE154_DEFAULT_SUPERFRAMEORDER;
+    m_pib.macTransactionPersistenceTime = IEEE154_DEFAULT_TRANSACTIONPERSISTENCETIME;
+    m_pib.macPanCoordinator = IEEE154_DEFAULT_MACPANCOORDINATOR;
+    updateMacMaxFrameTotalWaitTime();
+  }
+
+  void updateMacMaxFrameTotalWaitTime()
+  {
+    // using equation 14 on page 160
+    ieee154_macMinBE_t macMinBE = m_pib.macMinBE; 
+    ieee154_macMaxBE_t macMaxBE = m_pib.macMaxBE; 
+    ieee154_macMaxCSMABackoffs_t macMaxCSMABackoffs = m_pib.macMaxCSMABackoffs;
+    uint8_t m = macMaxBE - macMinBE, k;
+    uint32_t waitTime = 0;
+
+    if (macMaxCSMABackoffs < m)
+      m = macMaxCSMABackoffs;
+    waitTime = (((uint16_t) 1 << macMaxBE) - 1) * (macMaxCSMABackoffs - m);
+    if (m) {
+      k = 0;
+      while (k != m) {
+        waitTime += ((uint16_t) 1 << (macMinBE+k));
+        k += 1;
+      }
+    }
+    waitTime *= IEEE154_aUnitBackoffPeriod;
+    waitTime += call MLME_GET.phyMaxFrameDuration();
+    m_pib.macMaxFrameTotalWaitTime = waitTime;
+  }
+
+  command ieee154_status_t MLME_RESET.request(bool SetDefaultPIB) 
+  {
+    // resetting the complete stack is not so easy...
+    // first we acquire the Token (get exclusive radio access), then we switch off 
+    // the radio and reset all MAC components, starting from the ones that might 
+    // still have any frames queued / allocated to get them flushed out. While we 
+    // own the Token all other components are "inactive" (and there are no pending
+    // Alarms!), but there can still be pending Timers/tasks -> we stop all Timers
+    // through MacReset.init() and then spin a few tasks in between to get 
+    // everything "flushed out"
+    ieee154_status_t status = IEEE154_SUCCESS;
+    if (call PromiscuousModeGet.get())
+      status = IEEE154_TRANSACTION_OVERFLOW; // must first cancel promiscuous mode!
+    else {
+      m_setDefaultPIB = SetDefaultPIB;
+      m_resetSpin = 5;
+      call RadioToken.request();
+    }   
+    dbg_serial("PibP", "MLME_RESET.request(%lu) -> result: %lu\n", 
+        (uint32_t) SetDefaultPIB, (uint32_t) status);
+    return status;
+  }
+
+  event void RadioToken.granted()
+  {
+    if (call RadioOff.off() != SUCCESS)
+      signal RadioOff.offDone();
+  }
+
+  async event void RadioOff.offDone()
+  {
+    post radioControlStopTask();
+  }
+
+  task void radioControlStopTask()
+  {
+    error_t result = call RadioControl.stop();
+    if (result == EALREADY)
+      signal RadioControl.stopDone(SUCCESS);
+    else
+      ASSERT(result == SUCCESS);
+  }
+
+  event void RadioControl.stopDone(error_t result)
+  {
+    // NOTE: RadioControl is fanning out, so we have to check if we
+    // are the actual client that is owning the radio (or if someone
+    // else has called RadioControl.stop).
+
+    if (call RadioToken.isOwner()) {
+      ASSERT(result == SUCCESS);
+      call DispatchReset.init();       // resets the dispatch component(s), spools out frames
+      call DispatchQueueReset.init();  // resets the dispatch queue component(s), spools out frames
+      call MacReset.init();            // resets the remaining components
+      post resetSpinTask();
+    }
+  }
+
+  task void resetSpinTask()
+  {
+    m_resetSpin -= 1;
+    if (m_resetSpin != 0) {
+      post resetSpinTask();
+      return;
+    }
+    ASSERT(call RadioControl.start() == SUCCESS);
+  }
+
+  async command token_requested_t IsRadioTokenRequested.getNow(){ return m_resetSpin != 0; }
+
+  event void RadioControl.startDone(error_t error)
+  {
+    // comment at RadioControl.stopDone() applies here as well
+    if (call RadioToken.isOwner()) {
+      if (m_setDefaultPIB)
+        resetAttributesToDefault();
+
+      signal PIBUpdate.notify[IEEE154_phyCurrentChannel](&m_pib.phyCurrentChannel);
+      signal PIBUpdate.notify[IEEE154_macShortAddress](&m_pib.macShortAddress);
+      signal PIBUpdate.notify[IEEE154_macPANId](&m_pib.macPANId);
+      signal PIBUpdate.notify[IEEE154_phyCCAMode](&m_pib.phyCCAMode);
+      signal PIBUpdate.notify[IEEE154_phyTransmitPower](&m_pib.phyTransmitPower);
+      signal PIBUpdate.notify[IEEE154_phyCurrentPage](&m_pib.phyCurrentPage);
+      signal PIBUpdate.notify[IEEE154_macPanCoordinator](&m_pib.macPanCoordinator);
+
+      call RadioToken.release();
+      signal MLME_RESET.confirm(IEEE154_SUCCESS);
+    }
+  }
+
+  /* ----------------------- MLME-GET ----------------------- */
+
+  command ieee154_phyCurrentChannel_t MLME_GET.phyCurrentChannel() { return m_pib.phyCurrentChannel;}
+
+  command ieee154_phyChannelsSupported_t MLME_GET.phyChannelsSupported() { return IEEE154_SUPPORTED_CHANNELS;}
+
+  command ieee154_phyTransmitPower_t MLME_GET.phyTransmitPower() { return m_pib.phyTransmitPower;}
+
+  command ieee154_phyCCAMode_t MLME_GET.phyCCAMode() { return m_pib.phyCCAMode;}
+
+  command ieee154_phyCurrentPage_t MLME_GET.phyCurrentPage() { return m_pib.phyCurrentPage;}
+
+  command ieee154_phyMaxFrameDuration_t MLME_GET.phyMaxFrameDuration() { return IEEE154_MAX_FRAME_DURATION;}
+
+  command ieee154_phySHRDuration_t MLME_GET.phySHRDuration() { return IEEE154_SHR_DURATION;}
+
+  command ieee154_phySymbolsPerOctet_t MLME_GET.phySymbolsPerOctet() { return IEEE154_SYMBOLS_PER_OCTET;}
+
+  command ieee154_macAckWaitDuration_t MLME_GET.macAckWaitDuration() { return IEEE154_ACK_WAIT_DURATION;}
+
+  command ieee154_macAssociationPermit_t MLME_GET.macAssociationPermit() { return m_pib.macAssociationPermit;}
+
+  command ieee154_macAutoRequest_t MLME_GET.macAutoRequest() { return m_pib.macAutoRequest;}
+
+  command ieee154_macBattLifeExt_t MLME_GET.macBattLifeExt() { return m_pib.macBattLifeExt;}
+
+  command ieee154_macBattLifeExtPeriods_t MLME_GET.macBattLifeExtPeriods() { return m_pib.macBattLifeExtPeriods;}
+
+  command ieee154_macBeaconOrder_t MLME_GET.macBeaconOrder() { return m_pib.macBeaconOrder;}
+
+  command ieee154_macBeaconTxTime_t MLME_GET.macBeaconTxTime() { return m_pib.macBeaconTxTime;}
+
+  command ieee154_macBSN_t MLME_GET.macBSN() { return m_pib.macBSN;}
+
+  command ieee154_macCoordExtendedAddress_t MLME_GET.macCoordExtendedAddress() { return m_pib.macCoordExtendedAddress;}
+
+  command ieee154_macCoordShortAddress_t MLME_GET.macCoordShortAddress() { return m_pib.macCoordShortAddress;}
+
+  command ieee154_macDSN_t MLME_GET.macDSN() { return m_pib.macDSN;}
+
+  command ieee154_macGTSPermit_t MLME_GET.macGTSPermit() { return m_pib.macGTSPermit;}
+
+  command ieee154_macMaxCSMABackoffs_t MLME_GET.macMaxCSMABackoffs() { return m_pib.macMaxCSMABackoffs;}
+
+  command ieee154_macMinBE_t MLME_GET.macMinBE() { return m_pib.macMinBE;}
+
+  command ieee154_macPANId_t MLME_GET.macPANId() { return m_pib.macPANId;}
+
+  command ieee154_macPromiscuousMode_t MLME_GET.macPromiscuousMode() { return call PromiscuousModeGet.get();}
+
+  command ieee154_macRxOnWhenIdle_t MLME_GET.macRxOnWhenIdle() { return m_pib.macRxOnWhenIdle;}
+
+  command ieee154_macShortAddress_t MLME_GET.macShortAddress() { return m_pib.macShortAddress;}
+
+  command ieee154_macSuperframeOrder_t MLME_GET.macSuperframeOrder() { return m_pib.macSuperframeOrder;}
+
+  command ieee154_macTransactionPersistenceTime_t MLME_GET.macTransactionPersistenceTime() { return m_pib.macTransactionPersistenceTime;}
+
+  command ieee154_macAssociatedPANCoord_t MLME_GET.macAssociatedPANCoord() { return m_pib.macAssociatedPANCoord;}
+
+  command ieee154_macMaxBE_t MLME_GET.macMaxBE() { return m_pib.macMaxBE;}
+
+  command ieee154_macMaxFrameTotalWaitTime_t MLME_GET.macMaxFrameTotalWaitTime() { return m_pib.macMaxFrameTotalWaitTime;}
+
+  command ieee154_macMaxFrameRetries_t MLME_GET.macMaxFrameRetries() { return m_pib.macMaxFrameRetries;}
+
+  command ieee154_macResponseWaitTime_t MLME_GET.macResponseWaitTime() { return m_pib.macResponseWaitTime;}
+
+  command ieee154_macSyncSymbolOffset_t MLME_GET.macSyncSymbolOffset() { return IEEE154_SYNC_SYMBOL_OFFSET;}
+
+  command ieee154_macTimestampSupported_t MLME_GET.macTimestampSupported() { return IEEE154_TIMESTAMP_SUPPORTED;}
+
+  command ieee154_macSecurityEnabled_t MLME_GET.macSecurityEnabled() { return m_pib.macSecurityEnabled;}
+
+  command ieee154_macMinLIFSPeriod_t MLME_GET.macMinLIFSPeriod() { return IEEE154_MIN_LIFS_PERIOD;}
+
+  command ieee154_macMinSIFSPeriod_t MLME_GET.macMinSIFSPeriod() { return IEEE154_MIN_SIFS_PERIOD;}
+
+  command ieee154_macPanCoordinator_t MLME_GET.macPanCoordinator() { return m_pib.macPanCoordinator;}
+
+  /* ----------------------- MLME-SET ----------------------- */
+
+  command ieee154_status_t MLME_SET.phyCurrentChannel(ieee154_phyCurrentChannel_t value) {
+    uint32_t i = 1;
+    uint8_t k = value;
+    while (i && k) {
+      i <<= 1;
+      k -= 1;
+    }
+    if (!(IEEE154_SUPPORTED_CHANNELS & i))
+      return IEEE154_INVALID_PARAMETER;
+    m_pib.phyCurrentChannel = value;
+    signal PIBUpdate.notify[IEEE154_phyCurrentChannel](&m_pib.phyCurrentChannel);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.phyTransmitPower(ieee154_phyTransmitPower_t value) {
+    m_pib.phyTransmitPower = (value & 0x3F);
+    signal PIBUpdate.notify[IEEE154_phyTransmitPower](&m_pib.phyTransmitPower);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.phyCCAMode(ieee154_phyCCAMode_t value) {
+    if (value < 1 || value > 3)
+      return IEEE154_INVALID_PARAMETER;
+    m_pib.phyCCAMode = value;
+    signal PIBUpdate.notify[IEEE154_phyCCAMode](&m_pib.phyCCAMode);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.phyCurrentPage(ieee154_phyCurrentPage_t value) {
+    if (value > 31)
+      return IEEE154_INVALID_PARAMETER;
+    m_pib.phyCurrentPage = value;
+    signal PIBUpdate.notify[IEEE154_phyCurrentPage](&m_pib.phyCurrentPage);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macAssociationPermit(ieee154_macAssociationPermit_t value) {
+    m_pib.macAssociationPermit = value;
+    signal PIBUpdate.notify[IEEE154_macAssociationPermit](&m_pib.macAssociationPermit);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macAutoRequest(ieee154_macAutoRequest_t value) {
+    m_pib.macAutoRequest = value;
+    signal PIBUpdate.notify[IEEE154_macAutoRequest](&m_pib.macAutoRequest);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macBattLifeExt(ieee154_macBattLifeExt_t value) {
+    m_pib.macBattLifeExt = value;
+    signal PIBUpdate.notify[IEEE154_macBattLifeExt](&m_pib.macBattLifeExt);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macBattLifeExtPeriods(ieee154_macBattLifeExtPeriods_t value) {
+    if (value < 6 || value > 41)
+      return IEEE154_INVALID_PARAMETER;
+    m_pib.macBattLifeExtPeriods = value;
+    signal PIBUpdate.notify[IEEE154_macBattLifeExtPeriods](&m_pib.macBattLifeExtPeriods);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macBeaconOrder(ieee154_macBeaconOrder_t value) {
+    if (value > 15)
+      return IEEE154_INVALID_PARAMETER;
+    m_pib.macBeaconOrder = value;
+    signal PIBUpdate.notify[IEEE154_macBeaconOrder](&m_pib.macBeaconOrder);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macBSN(ieee154_macBSN_t value) {
+    m_pib.macBSN = value;
+    signal PIBUpdate.notify[IEEE154_macBSN](&m_pib.macBSN);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macCoordExtendedAddress(ieee154_macCoordExtendedAddress_t value) {
+    m_pib.macCoordExtendedAddress = value;
+    signal PIBUpdate.notify[IEEE154_macCoordExtendedAddress](&m_pib.macCoordExtendedAddress);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macCoordShortAddress(ieee154_macCoordShortAddress_t value) {
+    m_pib.macCoordShortAddress = value;
+    signal PIBUpdate.notify[IEEE154_macCoordShortAddress](&m_pib.macCoordShortAddress);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macDSN(ieee154_macDSN_t value) {
+    m_pib.macDSN = value;
+    signal PIBUpdate.notify[IEEE154_macDSN](&m_pib.macDSN);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macGTSPermit(ieee154_macGTSPermit_t value) {
+    m_pib.macGTSPermit = value;
+    signal PIBUpdate.notify[IEEE154_macGTSPermit](&m_pib.macGTSPermit);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macMaxCSMABackoffs(ieee154_macMaxCSMABackoffs_t value) {
+    if (value > 5)
+      return IEEE154_INVALID_PARAMETER;
+    m_pib.macMaxCSMABackoffs = value;
+    updateMacMaxFrameTotalWaitTime();
+    signal PIBUpdate.notify[IEEE154_macMaxCSMABackoffs](&m_pib.macMaxCSMABackoffs);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macMinBE(ieee154_macMinBE_t value) {
+    if (value > m_pib.macMaxBE)
+      return IEEE154_INVALID_PARAMETER;
+    m_pib.macMinBE = value;
+    updateMacMaxFrameTotalWaitTime();
+    signal PIBUpdate.notify[IEEE154_macMinBE](&m_pib.macMinBE);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macPANId(ieee154_macPANId_t value) {
+    m_pib.macPANId = value;
+    signal PIBUpdate.notify[IEEE154_macPANId](&m_pib.macPANId);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macRxOnWhenIdle(ieee154_macRxOnWhenIdle_t value) {
+    m_pib.macRxOnWhenIdle = value;
+    signal PIBUpdate.notify[IEEE154_macRxOnWhenIdle](&m_pib.macRxOnWhenIdle);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macShortAddress(ieee154_macShortAddress_t value) {
+    m_pib.macShortAddress = value;
+    signal PIBUpdate.notify[IEEE154_macShortAddress](&m_pib.macShortAddress);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macTransactionPersistenceTime(ieee154_macTransactionPersistenceTime_t value) {
+    m_pib.macTransactionPersistenceTime = value;
+    signal PIBUpdate.notify[IEEE154_macTransactionPersistenceTime](&m_pib.macTransactionPersistenceTime);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macAssociatedPANCoord(ieee154_macAssociatedPANCoord_t value) {
+    m_pib.macAssociatedPANCoord = value;
+    signal PIBUpdate.notify[IEEE154_macAssociatedPANCoord](&m_pib.macAssociatedPANCoord);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macMaxBE(ieee154_macMaxBE_t value) {
+    if (value < 3 || value > 8)
+      return IEEE154_INVALID_PARAMETER;
+    m_pib.macMaxBE = value;
+    updateMacMaxFrameTotalWaitTime();
+    signal PIBUpdate.notify[IEEE154_macMaxBE](&m_pib.macMaxBE);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macMaxFrameTotalWaitTime(ieee154_macMaxFrameTotalWaitTime_t value) {
+    // equation 14 on page 160 defines how macMaxFrameTotalWaitTime is calculated;
+    // its value depends only on other PIB attributes and constants - why does the standard 
+    // allow setting it by the next higher layer ??
+    m_pib.macMaxFrameTotalWaitTime = value;
+    signal PIBUpdate.notify[IEEE154_macMaxFrameTotalWaitTime](&m_pib.macMaxFrameTotalWaitTime);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macMaxFrameRetries(ieee154_macMaxFrameRetries_t value) {
+    if (value > 7)
+      return IEEE154_INVALID_PARAMETER;
+    m_pib.macMaxFrameRetries = value;
+    signal PIBUpdate.notify[IEEE154_macMaxFrameRetries](&m_pib.macMaxFrameRetries);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macResponseWaitTime(ieee154_macResponseWaitTime_t value) {
+    if (value < 2 || value > 64)
+      return IEEE154_INVALID_PARAMETER;
+    m_pib.macResponseWaitTime = value;
+    signal PIBUpdate.notify[IEEE154_macResponseWaitTime](&m_pib.macResponseWaitTime);
+    return IEEE154_SUCCESS;
+  }
+
+  command ieee154_status_t MLME_SET.macSecurityEnabled(ieee154_macSecurityEnabled_t value) {
+    return IEEE154_UNSUPPORTED_ATTRIBUTE;
+  }
+  
+  // Read-only attributes (writable only by MAC components)
+  command void SetMacSuperframeOrder.set( ieee154_macSuperframeOrder_t value) {
+    m_pib.macSuperframeOrder = value;
+    signal PIBUpdate.notify[IEEE154_macSuperframeOrder](&m_pib.macSuperframeOrder);
+  }
+
+  command void SetMacBeaconTxTime.set( ieee154_macBeaconTxTime_t value) {
+    m_pib.macBeaconTxTime = value;
+    signal PIBUpdate.notify[IEEE154_macBeaconTxTime](&m_pib.macBeaconTxTime);
+  }
+
+  command void SetMacPanCoordinator.set( ieee154_macPanCoordinator_t value) {
+    m_pib.macPanCoordinator = value;
+    signal PIBUpdate.notify[IEEE154_macPanCoordinator](&m_pib.macPanCoordinator);
+  }
+
+  /* ----------------------- TimeCalc ----------------------- */
+
+  async command uint32_t TimeCalc.timeElapsed(uint32_t t0, uint32_t t1)
+  {
+    // t0 occured before t1, what is the delta?
+    if (t0 <= t1)
+      return t1 - t0;
+    else
+      return ~(t0 - t1) + 1;
+  }
+  
+  async command bool TimeCalc.hasExpired(uint32_t t0, uint32_t dt)
+  {
+    // t0 is in the past, what about t0+dt?
+    uint32_t now = call LocalTime.get(), elapsed;
+    if (now >= t0)
+      elapsed = now - t0;
+    else
+      elapsed = ~(t0 - now) + 1;
+    return (elapsed >= dt);
+  }
+
+  /* ----------------------- Frame Access ----------------------- */
+
+  command void Packet.clear(message_t* msg)
+  {
+    memset(msg->header, 0, sizeof(message_header_t));
+    memset(msg->metadata, 0, sizeof(message_metadata_t));
+  }
+
+  command uint8_t Packet.payloadLength(message_t* msg)
+  {
+    return ((message_header_t*) msg->header)->ieee154.length;
+  }
+
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len)
+  {
+    ((message_header_t*) msg->header)->ieee154.length = len;
+  }
+
+  command uint8_t Packet.maxPayloadLength()
+  {
+#if TOSH_DATA_LENGTH < IEEE154_aMaxMACPayloadSize
+#warning Payload portion in message_t is smaller than required (TOSH_DATA_LENGTH < IEEE154_aMaxMACPayloadSize). This means that larger packets cannot be sent/received.
+#endif
+    return TOSH_DATA_LENGTH;
+  }
+
+  command void* Packet.getPayload(message_t* msg, uint8_t len)
+  {
+    return msg->data;
+  }
+
+  async command uint8_t FrameUtility.writeHeader(
+      uint8_t* mhr,
+      uint8_t DstAddrMode,
+      uint16_t DstPANId,
+      ieee154_address_t* DstAddr,
+      uint8_t SrcAddrMode,
+      uint16_t SrcPANId,
+      const ieee154_address_t* SrcAddr,
+      bool PANIDCompression)      
+  {
+    uint8_t offset = MHR_INDEX_ADDRESS;
+    if (DstAddrMode == ADDR_MODE_SHORT_ADDRESS || DstAddrMode == ADDR_MODE_EXTENDED_ADDRESS) {
+      *((nxle_uint16_t*) &mhr[offset]) = DstPANId;
+      offset += 2;
+      if (DstAddrMode == ADDR_MODE_SHORT_ADDRESS) {
+        *((nxle_uint16_t*) &mhr[offset]) = DstAddr->shortAddress;
+        offset += 2;
+      } else {
+        call FrameUtility.convertToLE(&mhr[offset], &DstAddr->extendedAddress);
+        offset += 8; 
+      }
+    }
+    if (SrcAddrMode == ADDR_MODE_SHORT_ADDRESS || SrcAddrMode == ADDR_MODE_EXTENDED_ADDRESS) {
+      if (DstPANId != SrcPANId || !PANIDCompression) {
+        *((nxle_uint16_t*) &mhr[offset]) = SrcPANId;
+        offset += 2;
+      }
+      if (SrcAddrMode == ADDR_MODE_SHORT_ADDRESS) {
+        *((nxle_uint16_t*) &mhr[offset]) = SrcAddr->shortAddress;
+        offset += 2;
+      } else {
+        call FrameUtility.convertToLE(&mhr[offset], &SrcAddr->extendedAddress);
+        offset += 8; 
+      }
+    }
+    return offset;
+  }
+
+  command bool FrameUtility.isBeaconFromCoord(message_t *frame)
+  {
+    uint8_t offset = MHR_INDEX_ADDRESS;
+    uint8_t *mhr = MHR(frame);
+ 
+    if ((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) != FC1_FRAMETYPE_BEACON) 
+      return FALSE; // not a beacon frame
+    if (!(mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK))
+      return FALSE; // source address information missing
+    if (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK)
+      return FALSE; // beacons don't include dest address
+    if ((*(nxle_uint16_t*) (&mhr[offset])) != m_pib.macPANId)
+      return FALSE; // wrong PAN ID
+    offset += 2;         
+    if ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == FC2_SRC_MODE_SHORT) {
+      if ((*(nxle_uint16_t*) (&mhr[offset])) != m_pib.macCoordShortAddress)
+        return FALSE;
+    } else if ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == FC2_SRC_MODE_EXTENDED) {
+      if (!isCoordExtendedAddress(mhr + offset))
+        return FALSE;
+    }
+    return TRUE;
+  }
+
+  async command error_t FrameUtility.getMHRLength(uint8_t fcf1, uint8_t fcf2, uint8_t *len)
+  {
+    uint8_t idCompression;
+    uint8_t offset = MHR_INDEX_ADDRESS;
+ 
+    if (fcf1 & FC1_SECURITY_ENABLED)
+      return FAIL; // not supported 
+    idCompression = (fcf1 & FC1_PAN_ID_COMPRESSION);
+    if (fcf2 & 0x08) { // short or ext. address
+      offset += 4; // pan id + short address
+      if (fcf2 & 0x04) // ext. address
+        offset += 6; // diff to short address
+    }
+    if (fcf2 & 0x80) { // short or ext. address
+      offset += 2;
+      if (!idCompression)
+        offset += 2;
+      if (fcf2 & 0x40) // ext. address
+        offset += 6; // diff to short address
+    }
+    *len = offset;
+    return SUCCESS;
+  }
+    
+
+  command error_t Frame.setAddressingFields(message_t* frame,
+                          uint8_t srcAddrMode,
+                          uint8_t dstAddrMode,
+                          uint16_t dstPANId,
+                          ieee154_address_t *dstAddr,
+                          ieee154_security_t *security)
+  {
+    uint8_t *mhr = MHR(frame);
+    ieee154_address_t srcAddress;
+    ieee154_macPANId_t srcPANId = call MLME_GET.macPANId();
+
+    if (security && security->SecurityLevel)
+      return FAIL; // not implemented
+    mhr[MHR_INDEX_FC2] &= ~(FC2_DEST_MODE_MASK | FC2_SRC_MODE_MASK);
+    mhr[MHR_INDEX_FC2] |= dstAddrMode << FC2_DEST_MODE_OFFSET;
+    mhr[MHR_INDEX_FC2] |= srcAddrMode << FC2_SRC_MODE_OFFSET;
+    if (srcAddrMode == ADDR_MODE_SHORT_ADDRESS)
+      srcAddress.shortAddress = call MLME_GET.macShortAddress();
+    else  
+      srcAddress.extendedAddress = call GetLocalExtendedAddress.get();
+    if (dstAddrMode >= ADDR_MODE_SHORT_ADDRESS && 
+        srcAddrMode >= ADDR_MODE_SHORT_ADDRESS && 
+        dstPANId == srcPANId)
+      mhr[MHR_INDEX_FC1] |= FC1_PAN_ID_COMPRESSION;
+    else
+      mhr[MHR_INDEX_FC1] &= ~FC1_PAN_ID_COMPRESSION;
+    call FrameUtility.writeHeader(
+            mhr,
+            dstAddrMode,
+            dstPANId,
+            dstAddr,
+            srcAddrMode,
+            srcPANId,
+            &srcAddress,
+            (mhr[MHR_INDEX_FC1] & FC1_PAN_ID_COMPRESSION) ? TRUE: FALSE);
+    return SUCCESS;
+  }
+
+  command uint8_t Frame.getFrameType(message_t* frame)
+  {
+    uint8_t *mhr = MHR(frame);
+    return (mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK);
+  }
+
+  command void* Frame.getHeader(message_t* frame)
+  {
+    uint8_t *mhr = MHR(frame);
+    return (void*) &(mhr[MHR_INDEX_FC1]);
+  }
+
+  command uint8_t Frame.getHeaderLength(message_t* frame)
+  {
+    uint8_t len;
+    uint8_t *mhr = MHR(frame);
+    call FrameUtility.getMHRLength(mhr[0], mhr[1], &len);
+    return len;
+  }
+
+  command void* Frame.getPayload(message_t* frame)
+  {
+    uint8_t *payload = (uint8_t *) frame->data;
+    return payload;
+  }
+
+  command uint8_t Frame.getPayloadLength(message_t* frame)
+  {
+    uint8_t len = ((ieee154_header_t*) frame->header)->length & FRAMECTL_LENGTH_MASK;
+    return len;
+  }
+
+  command uint32_t Frame.getTimestamp(message_t* frame)
+  {
+    ieee154_metadata_t *metadata = (ieee154_metadata_t*) frame->metadata;
+    return metadata->timestamp;
+  }
+
+  command bool Frame.isTimestampValid(message_t* frame)
+  {
+    ieee154_metadata_t *metadata = (ieee154_metadata_t*) frame->metadata;
+    if (metadata->timestamp == IEEE154_INVALID_TIMESTAMP)
+      return FALSE;
+    else
+      return TRUE;
+  }
+
+  command uint8_t Frame.getDSN(message_t* frame)
+  {
+    uint8_t *mhr = MHR(frame);
+    return mhr[MHR_INDEX_SEQNO];
+  }
+
+  command uint8_t Frame.getLinkQuality(message_t* frame)
+  {
+    ieee154_metadata_t *metadata = (ieee154_metadata_t*) frame->metadata;
+    return metadata->linkQuality;
+  }
+
+  command uint8_t Frame.getSrcAddrMode(message_t* frame)
+  {
+    uint8_t *mhr = MHR(frame);
+    return (mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) >> FC2_SRC_MODE_OFFSET;
+  }
+
+  command error_t Frame.getSrcAddr(message_t* frame, ieee154_address_t *address)
+  {
+    uint8_t *mhr = MHR(frame);
+    uint8_t offset = MHR_INDEX_ADDRESS;
+    uint8_t destMode = (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK);
+    if (!(mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_SHORT))
+      return FAIL;
+    if (destMode == FC2_DEST_MODE_SHORT)
+      offset += 4;
+    else if (destMode == FC2_DEST_MODE_EXTENDED)
+      offset += 10;
+    if (!((mhr[MHR_INDEX_FC1] & FC1_PAN_ID_COMPRESSION) && (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_SHORT)))
+      offset += 2;
+    if ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == FC2_SRC_MODE_SHORT)
+      address->shortAddress = *((nxle_uint16_t*) (&(mhr[offset])));
+    else
+      call FrameUtility.convertToNative(&address->extendedAddress, (&(mhr[offset])));
+    return SUCCESS;
+  }
+
+  command error_t Frame.getSrcPANId(message_t* frame, uint16_t *PANID)
+  {
+    uint8_t *mhr = MHR(frame);
+    uint8_t offset = MHR_INDEX_ADDRESS;
+    uint8_t destMode = (mhr[1] & FC2_DEST_MODE_MASK);
+    if (!(mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_SHORT))
+      return FAIL;
+    if (destMode == FC2_DEST_MODE_SHORT)
+      offset += 4;
+    else if (destMode == FC2_DEST_MODE_EXTENDED)
+      offset += 10;
+    if ((mhr[MHR_INDEX_FC1] & FC1_PAN_ID_COMPRESSION) && (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_SHORT))
+      *PANID = *((nxle_uint16_t*) (&(mhr[MHR_INDEX_ADDRESS])));
+    else if ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == FC2_SRC_MODE_SHORT)
+      *PANID = *((nxle_uint16_t*) (&(mhr[offset])));
+    else
+      *PANID = *((nxle_uint16_t*) (&(mhr[offset])));
+    return SUCCESS;
+  }
+
+  command uint8_t Frame.getDstAddrMode(message_t* frame)
+  {
+    uint8_t *mhr = MHR(frame);
+    return (mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) >> FC2_DEST_MODE_OFFSET;
+  }
+
+  command error_t Frame.getDstAddr(message_t* frame, ieee154_address_t *address)
+  { 
+    uint8_t *mhr = MHR(frame);
+    if (!(mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_SHORT))
+      return FAIL;
+    if ((mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == FC2_DEST_MODE_SHORT)
+      address->shortAddress = *((nxle_uint16_t*) (&(mhr[MHR_INDEX_ADDRESS]) + 2));
+    else
+      call FrameUtility.convertToNative(&address->extendedAddress, (&(mhr[MHR_INDEX_ADDRESS]) + 2));
+    return SUCCESS;
+  }
+
+  command error_t Frame.getDstPANId(message_t* frame, uint16_t *PANID)
+  {
+    uint8_t *mhr = MHR(frame);
+    if (!(mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_SHORT))
+      return FAIL;
+    *PANID = *((nxle_uint16_t*) (&(mhr[MHR_INDEX_ADDRESS])));
+    return SUCCESS;
+  }
+
+  command bool Frame.wasPromiscuousModeEnabled(message_t* frame)
+  {
+    return (((ieee154_header_t*) frame->header)->length & FRAMECTL_PROMISCUOUS) ? TRUE : FALSE;
+  }
+
+  command bool Frame.hasStandardCompliantHeader(message_t* frame)
+  {
+    uint8_t *mhr = MHR(frame);
+    if (((mhr[0] & FC1_FRAMETYPE_MASK) > 0x03) ||
+         ((mhr[MHR_INDEX_FC2] & FC2_DEST_MODE_MASK) == 0x04) || 
+         ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == 0x40) || 
+#ifndef IEEE154_SECURITY_ENABLED
+         ((mhr[0] & FC1_SECURITY_ENABLED)) || 
+#endif
+         (mhr[MHR_INDEX_FC2] & FC2_FRAME_VERSION_2))
+      return FALSE;
+    else
+      return TRUE;
+  }
+
+  /* ----------------------- Beacon Frame Access ----------------------- */
+
+  uint8_t getPendAddrSpecOffset(uint8_t *macPayloadField)
+  {
+    uint8_t gtsDescriptorCount = macPayloadField[BEACON_INDEX_GTS_SPEC] & GTS_DESCRIPTOR_COUNT_MASK;
+    return BEACON_INDEX_GTS_SPEC + 1 + ((gtsDescriptorCount > 0) ? 1 + gtsDescriptorCount * 3: 0);
+  }    
+
+  command error_t BeaconFrame.getPendAddrSpec(message_t* frame, uint8_t* pendAddrSpec)
+  {
+    uint8_t *mhr = MHR(frame);
+    if (((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) != FC1_FRAMETYPE_BEACON))
+      return FAIL;
+    else {
+      uint8_t *payload = (uint8_t *) frame->data;
+      uint8_t pendAddrSpecOffset = getPendAddrSpecOffset(payload);      
+      *pendAddrSpec = payload[pendAddrSpecOffset];
+      return SUCCESS;
+    }
+  }
+
+  command error_t BeaconFrame.getPendAddr(message_t* frame, uint8_t addrMode, 
+      ieee154_address_t buffer[], uint8_t bufferSize)
+  {
+    uint8_t *mhr = MHR(frame);
+    uint8_t *payload = (uint8_t *) frame->data;
+    uint8_t pendAddrSpecOffset = getPendAddrSpecOffset(payload);      
+    uint8_t pendAddrSpec = payload[pendAddrSpecOffset], i;
+    if (((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) != FC1_FRAMETYPE_BEACON))
+      return FAIL;
+    if (addrMode == ADDR_MODE_SHORT_ADDRESS) {
+      for (i=0; i<(pendAddrSpec & PENDING_ADDRESS_SHORT_MASK) && i<bufferSize; i++)
+        buffer[i].shortAddress = *((nxle_uint16_t*) (payload + pendAddrSpecOffset + 1 + 2*i));
+      return SUCCESS;
+    } else if (addrMode == ADDR_MODE_EXTENDED_ADDRESS) {
+      for (i=0; i<((pendAddrSpec & PENDING_ADDRESS_EXT_MASK) >> 4) && i<bufferSize; i++)
+        call FrameUtility.convertToNative(&(buffer[i].extendedAddress),
+            ((payload + pendAddrSpecOffset +
+              1 + (pendAddrSpec & PENDING_ADDRESS_SHORT_MASK)*2 + 8*i)));
+      return SUCCESS;
+    }
+    return EINVAL;
+  }
+
+  command uint8_t BeaconFrame.isLocalAddrPending(message_t* frame)
+  {
+    uint8_t *mhr = MHR(frame);
+    uint8_t *payload = (uint8_t *) frame->data;
+    uint8_t pendAddrSpecOffset = getPendAddrSpecOffset(payload);      
+    uint8_t pendAddrSpec = payload[pendAddrSpecOffset], i;
+    ieee154_macShortAddress_t shortAddress = call MLME_GET.macShortAddress();
+    if (((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) != FC1_FRAMETYPE_BEACON))
+      return ADDR_MODE_NOT_PRESENT;
+    for (i=0; i<(pendAddrSpec & PENDING_ADDRESS_SHORT_MASK); i++)
+      if (*((nxle_uint16_t*) (payload + pendAddrSpecOffset + 1 + 2*i)) == shortAddress)
+        return ADDR_MODE_SHORT_ADDRESS;
+    for (i=0; i<((pendAddrSpec & PENDING_ADDRESS_EXT_MASK) >> 4); i++)
+      if (isLocalExtendedAddress(((payload + pendAddrSpecOffset + 
+              1 + (pendAddrSpec & PENDING_ADDRESS_SHORT_MASK)*2 + 8*i))))
+        return ADDR_MODE_EXTENDED_ADDRESS;
+    return ADDR_MODE_NOT_PRESENT;
+  }
+
+  command void* BeaconFrame.getBeaconPayload(message_t* frame)
+  {
+    uint8_t *mhr = MHR(frame);
+    uint8_t *payload = (uint8_t *) frame->data;
+    if ((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_BEACON) {
+      uint8_t pendAddrSpecOffset = getPendAddrSpecOffset(payload);
+      uint8_t pendAddrSpec = payload[pendAddrSpecOffset];
+      payload += (pendAddrSpecOffset + 1);
+      if (pendAddrSpec & PENDING_ADDRESS_SHORT_MASK)
+        payload += (pendAddrSpec & PENDING_ADDRESS_SHORT_MASK) * 2;
+      if (pendAddrSpec & PENDING_ADDRESS_EXT_MASK)
+        payload += ((pendAddrSpec & PENDING_ADDRESS_EXT_MASK) >> 4) * 8;
+    }
+    return payload;    
+  }
+
+  command uint8_t BeaconFrame.getBeaconPayloadLength(message_t* frame)
+  {
+    uint8_t *mhr = MHR(frame);
+    uint8_t len = ((ieee154_header_t*) frame->header)->length & FRAMECTL_LENGTH_MASK;
+    if ((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_BEACON) {
+      uint8_t *payload = call BeaconFrame.getBeaconPayload(frame);
+      len = len - (payload - (uint8_t *) frame->data);
+    } 
+    return len;
+  }
+
+  command uint8_t BeaconFrame.getBSN(message_t* frame)
+  {
+    return call Frame.getDSN(frame);
+  }
+
+  command error_t BeaconFrame.parsePANDescriptor(
+      message_t *frame,
+      uint8_t LogicalChannel,
+      uint8_t ChannelPage,
+      ieee154_PANDescriptor_t *pdescriptor)
+  {
+    uint8_t *mhr = MHR(frame);
+    uint8_t offset;
+    ieee154_metadata_t *metadata = (ieee154_metadata_t*) frame->metadata;
+
+    if ((mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK) != FC1_FRAMETYPE_BEACON ||
+         (((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) != FC2_SRC_MODE_SHORT) && 
+          ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) != FC2_SRC_MODE_EXTENDED)))
+      return FAIL;
+
+    pdescriptor->CoordAddrMode = (mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) >> FC2_SRC_MODE_OFFSET;
+    offset = MHR_INDEX_ADDRESS;
+    pdescriptor->CoordPANId = *((nxle_uint16_t*) &mhr[offset]);
+    offset += sizeof(ieee154_macPANId_t);
+
+    if ((mhr[MHR_INDEX_FC2] & FC2_SRC_MODE_MASK) == FC2_SRC_MODE_SHORT)
+      pdescriptor->CoordAddress.shortAddress = *((nxle_uint16_t*) &mhr[offset]);
+    else
+      call FrameUtility.convertToNative(&pdescriptor->CoordAddress.extendedAddress, &mhr[offset]);
+
+    pdescriptor->LogicalChannel = LogicalChannel;
+    pdescriptor->ChannelPage = ChannelPage;
+    ((uint8_t*) &pdescriptor->SuperframeSpec)[0] = frame->data[BEACON_INDEX_SF_SPEC1]; // little endian
+    ((uint8_t*) &pdescriptor->SuperframeSpec)[1] = frame->data[BEACON_INDEX_SF_SPEC2];
+    pdescriptor->GTSPermit = (frame->data[BEACON_INDEX_GTS_SPEC] & GTS_SPEC_PERMIT) ? 1 : 0;
+    pdescriptor->LinkQuality = metadata->linkQuality;
+    pdescriptor->TimeStamp = metadata->timestamp;
+#ifndef IEEE154_SECURITY_ENABLED
+    pdescriptor->SecurityFailure = IEEE154_SUCCESS;
+    pdescriptor->SecurityLevel = 0;
+    pdescriptor->KeyIdMode = 0;
+    pdescriptor->KeySource = 0;
+    pdescriptor->KeyIndex = 0;    
+#else
+#error Implementation of BeaconFrame.parsePANDescriptor() needs to be adapted!
+#endif
+    return SUCCESS;   
+  }
+
+  /* ----------------------- FrameUtility, etc. ----------------------- */
+
+  command uint64_t GetLocalExtendedAddress.get()
+  {
+    return m_aExtendedAddressLE;
+  }
+
+  async command void FrameUtility.convertToLE(uint8_t *destLE, const uint64_t *src)
+  {
+    uint8_t i;
+    uint64_t srcCopy = *src;
+    for (i=0; i<8; i++) {
+      destLE[i] = srcCopy;
+      srcCopy >>= 8;
+    }
+  }
+
+  async command void FrameUtility.convertToNative(uint64_t *dest, const uint8_t *srcLE)
+  {
+    // on msp430 nxle_uint64_t doesn't work, this is a workaround
+    uint32_t lower = *((nxle_uint32_t*) srcLE);
+    uint64_t upper = *((nxle_uint32_t*) (srcLE+4));
+    *dest = (upper << 32) + lower;
+
+  }
+
+  async command void FrameUtility.copyLocalExtendedAddressLE(uint8_t *destLE)
+  {
+    call FrameUtility.convertToLE(destLE, &m_aExtendedAddressLE);
+  }
+
+  command void FrameUtility.copyCoordExtendedAddressLE(uint8_t *destLE)
+  {
+    call FrameUtility.convertToLE(destLE, &m_pib.macCoordExtendedAddress);
+  }
+
+  bool isLocalExtendedAddress(uint8_t *addrLE)
+  {
+    uint64_t dest;
+    call FrameUtility.convertToNative(&dest, addrLE);
+    return dest == m_aExtendedAddressLE;
+  }
+
+  bool isCoordExtendedAddress(uint8_t *addrLE)
+  {
+    uint64_t dest;
+    call FrameUtility.convertToNative(&dest, addrLE);
+    return dest == m_pib.macCoordExtendedAddress;
+  }
+
+  default event void PIBUpdate.notify[uint8_t PIBAttributeID](const void* PIBAttributeValue) {}
+  command error_t PIBUpdate.enable[uint8_t PIBAttributeID]() {return FAIL;}
+  command error_t PIBUpdate.disable[uint8_t PIBAttributeID]() {return FAIL;}
+  async event void RadioToken.transferredFrom(uint8_t fromClient){ASSERT(0);}
+}
diff --git a/tos/lib/mac/tkn154/PollP.nc b/tos/lib/mac/tkn154/PollP.nc
new file mode 100644
index 00000000..0cfc5d75
--- /dev/null
+++ b/tos/lib/mac/tkn154/PollP.nc
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2010-01-05 16:41:16 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+
+#include "TKN154_MAC.h"
+
+module PollP
+{
+  provides
+  {
+    interface Init;
+    interface MLME_POLL;
+    interface FrameRx as DataRx;
+    interface DataRequest as DataRequest[uint8_t client];
+  }
+  uses
+  {
+    interface FrameTx as PollTx;
+    interface FrameExtracted as DataExtracted;
+    interface FrameUtility;
+    interface Pool<ieee154_txframe_t> as TxFramePool;
+    interface Pool<ieee154_txcontrol_t> as TxControlPool;
+    interface MLME_GET;
+    interface Get<uint64_t> as LocalExtendedAddress;
+  }
+}
+implementation
+{
+  enum {
+    HANDLE_MLME_POLL_REQUEST = 0xFF,
+    HANDLE_MLME_POLL_SUCCESS = 0xFE,
+  };
+  int m_numPending;
+  uint8_t m_dataRequestCmdID = CMD_FRAME_DATA_REQUEST;
+  void assembleDataRequestFrame( uint8_t destAddrMode, uint16_t destPANId,
+      uint8_t* DstAddr, uint8_t srcAddrMode, ieee154_txframe_t *txFrame);
+
+  command error_t Init.init()
+  {
+    m_numPending = 0;
+    return SUCCESS;
+  }
+
+  command ieee154_status_t MLME_POLL.request  (
+                          uint8_t coordAddrMode,
+                          uint16_t coordPANID,
+                          ieee154_address_t coordAddress,
+                          ieee154_security_t *security)
+  {
+    ieee154_txframe_t *txFrame;
+    ieee154_txcontrol_t *txControl;
+    uint8_t srcAddrMode = 2;
+    ieee154_status_t status = IEEE154_SUCCESS;
+    uint8_t coordAddressLE[8]; // little endian is what we want
+
+    if (security && security->SecurityLevel)
+      status = IEEE154_UNSUPPORTED_SECURITY;
+    else if (coordAddrMode < 2 || coordAddrMode > 3 || coordPANID == 0xFFFF)
+      status = IEEE154_INVALID_PARAMETER; 
+    else if (!(txFrame = call TxFramePool.get()))
+      // none of the predefined return value really fits
+      status = IEEE154_TRANSACTION_OVERFLOW; 
+    else if (!(txControl = call TxControlPool.get())) {
+      call TxFramePool.put(txFrame);
+      status = IEEE154_TRANSACTION_OVERFLOW;
+    } else {
+      txFrame->header = &txControl->header;
+      txFrame->metadata = &txControl->metadata;
+      if (coordAddrMode == ADDR_MODE_SHORT_ADDRESS)
+        *((nxle_uint16_t*) &coordAddressLE) = coordAddress.shortAddress;
+      else 
+        call FrameUtility.convertToLE(coordAddressLE, &coordAddress.extendedAddress);
+      txFrame->handle = HANDLE_MLME_POLL_REQUEST;
+      if (call MLME_GET.macShortAddress() >= 0xFFFE)
+        srcAddrMode = 3;
+      assembleDataRequestFrame(coordAddrMode, coordPANID, coordAddressLE, srcAddrMode, txFrame);
+      if ((status = call PollTx.transmit(txFrame)) != IEEE154_SUCCESS) {
+        call TxFramePool.put(txFrame);
+        call TxControlPool.put(txControl);
+        status = IEEE154_TRANSACTION_OVERFLOW;
+      } else 
+        m_numPending++;
+    }
+
+    dbg_serial("PollP", "MLME_POLL.request -> result: %lu\n", (uint32_t) status);
+    return status;
+  }
+
+  command ieee154_status_t DataRequest.poll[uint8_t client](uint8_t CoordAddrMode, 
+      uint16_t CoordPANId, uint8_t *CoordAddressLE, uint8_t srcAddrMode)
+  {
+    ieee154_txframe_t *txFrame;
+    ieee154_txcontrol_t *txControl;
+    ieee154_status_t status = IEEE154_TRANSACTION_OVERFLOW;
+
+    dbg_serial("PollP", "Internal Poll\n");
+    if (client == SYNC_POLL_CLIENT && m_numPending != 0) {
+      // no point in auto-requesting if user request is pending
+      signal DataRequest.pollDone[client]();
+      return IEEE154_SUCCESS;
+    } else if ((txFrame = call TxFramePool.get()) != NULL) {
+      if ((txControl = call TxControlPool.get()) != NULL) {
+        txFrame->header = &txControl->header;
+        txFrame->metadata = &txControl->metadata;
+        txFrame->handle = client;
+        assembleDataRequestFrame(CoordAddrMode, CoordPANId, 
+            CoordAddressLE, srcAddrMode, txFrame);
+        if ((status = call PollTx.transmit(txFrame)) != IEEE154_SUCCESS) {
+          call TxControlPool.put(txControl);
+          call TxFramePool.put(txFrame);
+          dbg_serial("PollP", "Tx Overflow\n");
+        } else 
+          m_numPending++;
+      } else {
+        call TxFramePool.put(txFrame);
+      } 
+    }
+    dbg_serial("PollP", "Status %lu, numPending: %lu\n", (uint32_t) status, (uint32_t) m_numPending);
+    if (status != IEEE154_SUCCESS)
+      signal DataRequest.pollDone[client]();
+    return status;
+  }
+
+  void assembleDataRequestFrame(uint8_t destAddrMode, uint16_t destPANId,
+      uint8_t* destAddrPtrLE, uint8_t srcAddrMode, ieee154_txframe_t *txFrame)
+  {
+    // destAddrPtrLE points to an address in little-endian format !
+    ieee154_address_t srcAddress;
+    uint8_t *mhr;
+    uint16_t srcPANId;
+    ieee154_address_t DstAddr;
+    srcPANId = call MLME_GET.macPANId();
+
+    memcpy(&DstAddr, destAddrPtrLE, destAddrMode == 2 ? 2 : 8);
+    mhr = txFrame->header->mhr;
+    mhr[MHR_INDEX_FC1] = FC1_FRAMETYPE_CMD | FC1_ACK_REQUEST;
+    if (destAddrMode >= 2 && srcAddrMode >= 2 && destPANId == srcPANId)
+      mhr[MHR_INDEX_FC1] |= FC1_PAN_ID_COMPRESSION;
+    mhr[MHR_INDEX_FC2] = destAddrMode << FC2_DEST_MODE_OFFSET;
+    mhr[MHR_INDEX_FC2] |= srcAddrMode << FC2_SRC_MODE_OFFSET;
+    if (srcAddrMode == 2)
+      srcAddress.shortAddress = call MLME_GET.macShortAddress();
+    else  
+      srcAddress.extendedAddress = call LocalExtendedAddress.get();
+    txFrame->headerLen = call FrameUtility.writeHeader(
+          txFrame->header->mhr,
+          destAddrMode,
+          destPANId,
+          &DstAddr,
+          srcAddrMode,
+          srcPANId,
+          &srcAddress,
+          (mhr[MHR_INDEX_FC1] & FC1_PAN_ID_COMPRESSION) ? TRUE: FALSE);
+    txFrame->payload = &m_dataRequestCmdID;
+    txFrame->payloadLen = 1;
+  }
+
+  event message_t* DataExtracted.received(message_t* frame, ieee154_txframe_t *txFrame)
+  {
+    if (!txFrame) {
+      dbg_serial("PollP", "Internal error\n");
+      return frame;
+    } else
+      dbg_serial("PollP", "Extracted data successfully\n");
+    if (txFrame->handle == HANDLE_MLME_POLL_REQUEST)
+      signal MLME_POLL.confirm(IEEE154_SUCCESS);
+    else
+      signal DataRequest.pollDone[txFrame->handle]();
+    txFrame->handle = HANDLE_MLME_POLL_SUCCESS; // mark as processed
+    // TODO: check if pending bit is set (then initiate another POLL)
+    return signal DataRx.received(frame);
+  }
+
+  event void PollTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+    dbg_serial("PollP", "transmitDone()\n");
+    m_numPending--;
+    if (txFrame->handle != HANDLE_MLME_POLL_SUCCESS) {
+      // didn't receive a DATA frame from the coordinator
+      if (status == IEEE154_SUCCESS) // TODO: can this happen if a frame other than DATA was extracted?
+        status = IEEE154_NO_DATA;
+      if (txFrame->handle == HANDLE_MLME_POLL_REQUEST)
+        signal MLME_POLL.confirm(status);
+      else
+        signal DataRequest.pollDone[txFrame->handle]();
+    }
+    call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) txFrame->header - offsetof(ieee154_txcontrol_t, header)));
+    call TxFramePool.put(txFrame);
+  }
+  default event void MLME_POLL.confirm(ieee154_status_t status) {}
+  default event void DataRequest.pollDone[uint8_t client]() {}
+}
diff --git a/tos/lib/mac/tkn154/PromiscuousModeP.nc b/tos/lib/mac/tkn154/PromiscuousModeP.nc
new file mode 100644
index 00000000..de497558
--- /dev/null
+++ b/tos/lib/mac/tkn154/PromiscuousModeP.nc
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2009-03-24 12:56:46 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154_PHY.h"
+#include "TKN154_MAC.h"
+module PromiscuousModeP 
+{
+  provides {
+    interface Init;
+    interface SplitControl as PromiscuousMode;
+    interface Get<bool> as PromiscuousModeGet;
+    interface FrameRx;
+    interface GetNow<token_requested_t> as IsRadioTokenRequested;
+  } uses {
+    interface TransferableResource as RadioToken;
+    interface RadioRx as PromiscuousRx;
+    interface RadioOff;
+    interface Set<bool> as RadioPromiscuousMode;
+  }
+}
+implementation
+{
+  norace enum promiscuous_state {
+    S_STOPPING,
+    S_STOPPED,
+    S_STARTING,
+    S_STARTED,
+  } m_state;
+
+  command error_t Init.init()
+  {
+    m_state = S_STOPPED;
+    return SUCCESS;
+  }
+
+  /* ----------------------- Promiscuous Mode ----------------------- */
+
+  command bool PromiscuousModeGet.get()
+  {
+    return (m_state == S_STARTED);
+  }
+
+  command error_t PromiscuousMode.start()
+  {
+    error_t result = FAIL;
+    if (m_state == S_STOPPED) {
+      m_state = S_STARTING;
+      call RadioToken.request();
+      result = SUCCESS;
+    }
+    dbg_serial("PromiscuousModeP", "PromiscuousMode.start -> result: %lu\n", (uint32_t) result);
+    return result;
+  }
+
+  event void RadioToken.granted()
+  {
+    call RadioPromiscuousMode.set(TRUE);
+    if (call RadioOff.isOff())
+      signal RadioOff.offDone();
+    else
+      call RadioOff.off();
+  }
+
+  task void signalStartDoneTask()
+  {
+    m_state = S_STARTED;
+    dbg_serial("PromiscuousModeP", "Promiscuous mode enabled.\n");
+    signal PromiscuousMode.startDone(SUCCESS);
+  }
+
+  async event void PromiscuousRx.enableRxDone()
+  {
+    post signalStartDoneTask();
+  }
+
+  event message_t* PromiscuousRx.received(message_t *frame)
+  {
+    if (m_state == S_STARTED) {
+      ((ieee154_header_t*) frame->header)->length |= FRAMECTL_PROMISCUOUS;
+      return signal FrameRx.received(frame);
+    } else
+      return frame;
+  }
+
+  command error_t PromiscuousMode.stop()
+  {
+    error_t result = FAIL;
+    if (m_state == S_STARTED) {
+      m_state = S_STOPPING;
+      call RadioOff.off();
+      result = SUCCESS;
+    }
+    dbg_serial("PromiscuousModeP", "PromiscuousMode.stop -> result: %lu\n", (uint32_t) result);
+    return result;
+  }
+
+  task void continueStopTask()
+  {
+    call RadioPromiscuousMode.set(FALSE);
+    m_state = S_STOPPED;
+    call RadioToken.release();
+    dbg_serial("PromiscuousModeP", "Promiscuous mode disabled.\n");
+    signal PromiscuousMode.stopDone(SUCCESS);
+  }
+
+  async event void RadioOff.offDone()
+  {
+    if (m_state == S_STARTING) {
+      call PromiscuousRx.enableRx(0, 0);
+    } else
+      post continueStopTask();
+  }
+
+  async command token_requested_t IsRadioTokenRequested.getNow(){ return m_state == S_STARTING; }
+  default event void PromiscuousMode.startDone(error_t error) {}
+  default event void PromiscuousMode.stopDone(error_t error) {}
+  async event void RadioToken.transferredFrom(uint8_t clientFrom){ASSERT(0);}
+}
diff --git a/tos/lib/mac/tkn154/README.txt b/tos/lib/mac/tkn154/README.txt
new file mode 100644
index 00000000..6a081b61
--- /dev/null
+++ b/tos/lib/mac/tkn154/README.txt
@@ -0,0 +1,94 @@
+This directory contains "TKN15.4", a platform-independent IEEE 802.15.4-2006
+MAC implementation. The code is under active development and most of the
+functionality described in the standard is implemented and tested.  The MAC
+itself is platform-independent, but it requires (1) a suitable radio driver,
+(2) Alarms/Timers with symbol precision and (3) some "platform glue" code
+(defining guard times, etc.). Currently the only supported platforms are TelosB
+and micaZ (note: because they do not have a clock that satisfies the
+precision/accuracy requirements of the IEEE 802.15.4 standard -- 62.500 Hz,
++-40 ppm in the 2.4 GHz band -- the timing in beacon-enabled mode is not
+standard compliant).
+
+Status (last updated 9/14/09)
+-----------------------------
+
+Missing functionality:
+- GTS
+- security services
+- PAN ID conflict notification/resolution
+- indirect transmissions: frames are not kept in transaction queue 
+  in case CSMA-CA algorithm fails
+
+Known Issues:
+- resetting the MAC during operation (via MLME_RESET) has not been tested
+- if initial beacon Tx timestamp is invalid, the coordinator will hang 
+- frame pending flags are (need to be) always set in the ACK headers
+- transmitting coordinator realignment frames has not been tested
+- using an incoming and outgoing superframe at the same time has not been tested
+- during an ongoing CSMA-CA transmission incoming frames are ignored
+- on a beacon-enabled PAN: if the device cannot find the beacon the DATA frame 
+  is not transmitted (but it should be transmitted using unslotted CSMA-CA, see 
+  Sect. 7.5.6.1 "Transmission")
+
+Implementation 
+--------------
+
+MAC implementation: tinyos-2.x/tos/lib/mac/tkn154
+MAC interfaces: tinyos-2.x/tos/lib/mac/tkn154/interfaces
+CC2420 driver: tinyos-2.x/tos/chips/cc2420_tkn154
+TelosB "platform glue" code: tinyos-2.x/tos/platforms/telosb/mac/tkn154
+micaZ "platform glue" code: tinyos-2.x/tos/platforms/micaz/mac/tkn154
+Example applications: tinyos-2.x/apps/tests/tkn154
+
+Note: TEP3 recommends that interface names "should be mixed case, starting
+upper case". To match the syntax used in the IEEE 802.15.4 standard the
+interfaces provided by the MAC to the next higher layer deviate from this
+convention (they are all caps, e.g. MLME_START).
+
+Documentation
+-------------
+
+A technical report on TKN15.4 is available here:
+http://www.tkn.tu-berlin.de/publications/papers/TKN154.pdf
+
+TKN15.4 is the basis for the implementation of the TinyOS 15.4 WG:
+http://tinyos.stanford.edu:8000/15.4_WG
+
+Copyright
+---------
+
+This work was supported by the European Commision within the 6th Framework
+Programme ICT Project ANGEL (Reference: 033506) and within the 7th Framework
+Programme ICT Project CONET (Reference: 224053).
+
+Author: Jan-Hinrich Hauer <hauer@tkn.tu-berlin.de>
+
+/*
+ * Copyright (c) 2009, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
diff --git a/tos/lib/mac/tkn154/RadioClientC.nc b/tos/lib/mac/tkn154/RadioClientC.nc
new file mode 100644
index 00000000..632b306d
--- /dev/null
+++ b/tos/lib/mac/tkn154/RadioClientC.nc
@@ -0,0 +1,61 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2009-05-14 13:20:35 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154_MAC.h"
+generic configuration RadioClientC(uint8_t clientID) 
+{
+  provides
+  {
+    interface RadioOff;
+    interface RadioRx;
+    interface RadioTx;
+    interface SlottedCsmaCa;
+    interface UnslottedCsmaCa;
+    interface TransferableResource as RadioToken;
+    interface ResourceRequested as RadioTokenRequested;
+  }
+}
+implementation
+{
+  components RadioControlP;
+  RadioRx = RadioControlP.RadioRx[clientID];
+  RadioTx = RadioControlP.RadioTx[clientID];
+  RadioOff = RadioControlP.RadioOff[clientID];
+  SlottedCsmaCa = RadioControlP.SlottedCsmaCa[clientID];
+  UnslottedCsmaCa = RadioControlP.UnslottedCsmaCa[clientID];
+  RadioToken = RadioControlP.TransferableResource[clientID];
+  RadioTokenRequested = RadioControlP.ResourceRequested[clientID];
+}
+
diff --git a/tos/lib/mac/tkn154/RadioControlImplP.nc b/tos/lib/mac/tkn154/RadioControlImplP.nc
new file mode 100644
index 00000000..993ef2ba
--- /dev/null
+++ b/tos/lib/mac/tkn154/RadioControlImplP.nc
@@ -0,0 +1,218 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2010-01-05 16:41:16 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154_MAC.h"
+
+module RadioControlImplP 
+{
+  provides
+  {
+    interface RadioRx as MacRx[uint8_t client];
+    interface RadioTx as MacTx[uint8_t client];
+    interface SlottedCsmaCa as SlottedCsmaCa[uint8_t client];
+    interface UnslottedCsmaCa as UnslottedCsmaCa[uint8_t client];
+    interface RadioOff as MacRadioOff[uint8_t client];
+  } uses {
+    interface ArbiterInfo;
+    interface RadioRx as PhyRx;
+    interface RadioTx as PhyTx;
+    interface SlottedCsmaCa as PhySlottedCsmaCa;
+    interface UnslottedCsmaCa as PhyUnslottedCsmaCa;
+    interface RadioOff as PhyRadioOff;
+    interface Get<bool> as RadioPromiscuousMode;
+    interface Leds;
+  }
+}
+implementation
+{
+
+  /* ----------------------- RadioRx ----------------------- */
+
+  async command error_t MacRx.enableRx[uint8_t client](uint32_t t0, uint32_t dt)
+  {
+    if (client == call ArbiterInfo.userId()) 
+      return call PhyRx.enableRx(t0, dt);
+    else {
+      ASSERT(0);
+      return IEEE154_TRANSACTION_OVERFLOW;
+    }
+  }
+
+  async event void PhyRx.enableRxDone()
+  {
+    signal MacRx.enableRxDone[call ArbiterInfo.userId()]();
+  }
+
+  event message_t* PhyRx.received(message_t *msg)
+  {
+    uint8_t *mhr = MHR(msg);
+
+    dbg("RadioControlImplP", "Received frame, DSN: %lu, type: 0x%lu\n", 
+        (uint32_t) mhr[MHR_INDEX_SEQNO], (uint32_t) mhr[MHR_INDEX_FC1] & FC1_FRAMETYPE_MASK);
+
+    if (((mhr[1] & FC2_FRAME_VERSION_MASK) > FC2_FRAME_VERSION_1)
+        && (!call RadioPromiscuousMode.get()))
+      return msg;
+
+#ifndef IEEE154_SECURITY_ENABLED
+    if ((mhr[0] & FC1_SECURITY_ENABLED)
+        && (!call RadioPromiscuousMode.get()))
+      return msg;
+#endif
+    return signal MacRx.received[call ArbiterInfo.userId()](msg);
+  }
+
+  async command bool MacRx.isReceiving[uint8_t client]()
+  {
+    if (client == call ArbiterInfo.userId())
+      return call PhyRx.isReceiving();
+    else {
+      ASSERT(0);
+      return FAIL;
+    } 
+  }
+
+  default async event void MacRx.enableRxDone[uint8_t client]() { ASSERT(0); }
+
+  default event message_t* MacRx.received[uint8_t client](message_t *frame)
+  {
+    ASSERT(0);
+    return frame;
+  }
+
+  /* ----------------------- RadioTx ----------------------- */
+
+  async command error_t MacTx.transmit[uint8_t client](ieee154_txframe_t *frame, uint32_t t0, uint32_t dt)
+  {
+    if (client == call ArbiterInfo.userId())
+      return call PhyTx.transmit(frame, t0, dt);
+    else {
+      ASSERT(0);
+      return IEEE154_TRANSACTION_OVERFLOW;
+    }
+  }
+  
+  async event void PhyTx.transmitDone(ieee154_txframe_t *frame, error_t result)
+  {
+    signal MacTx.transmitDone[call ArbiterInfo.userId()](frame, result);
+  }
+
+  default async event void MacTx.transmitDone[uint8_t client](ieee154_txframe_t *frame, error_t result) 
+  {
+    ASSERT(0);
+  }
+
+  /* ----------------------- Unslotted CSMA ----------------------- */
+
+  async command error_t UnslottedCsmaCa.transmit[uint8_t client](ieee154_txframe_t *frame, ieee154_csma_t *csma)
+  {
+    if (client == call ArbiterInfo.userId()) 
+      return call PhyUnslottedCsmaCa.transmit(frame, csma);
+    else {
+      ASSERT(0);
+      return IEEE154_TRANSACTION_OVERFLOW;
+    }
+  }
+
+  async event void PhyUnslottedCsmaCa.transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, error_t result)
+  {
+    signal UnslottedCsmaCa.transmitDone[call ArbiterInfo.userId()](
+        frame, csma, ackPendingFlag, result);
+  }
+
+  default async event void UnslottedCsmaCa.transmitDone[uint8_t client](
+      ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, error_t result)
+  {
+    ASSERT(0);
+  }
+
+  /* ----------------------- Slotted CSMA ----------------------- */
+
+  async command error_t SlottedCsmaCa.transmit[uint8_t client](ieee154_txframe_t *frame, ieee154_csma_t *csma,
+      uint32_t slot0Time, uint32_t dtMax, bool resume, uint16_t remainingBackoff)
+  {
+    if (client == call ArbiterInfo.userId()) 
+      return call PhySlottedCsmaCa.transmit(frame, csma, slot0Time, dtMax, resume, remainingBackoff);
+    else {
+      ASSERT(0);
+      return IEEE154_TRANSACTION_OVERFLOW;
+    }
+  }
+
+  async event void PhySlottedCsmaCa.transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, 
+      bool ackPendingFlag,  uint16_t remainingBackoff, error_t result)
+  {
+    signal SlottedCsmaCa.transmitDone[call ArbiterInfo.userId()](
+        frame, csma, ackPendingFlag, remainingBackoff, result);
+  }
+
+  default async event void SlottedCsmaCa.transmitDone[uint8_t client](
+      ieee154_txframe_t *frame, ieee154_csma_t *csma, 
+      bool ackPendingFlag,  uint16_t remainingBackoff, error_t result)
+  {
+    ASSERT(0);
+  }
+
+  /* ----------------------- RadioOff ----------------------- */
+
+  async command error_t MacRadioOff.off[uint8_t client]()
+  {
+    if (client == call ArbiterInfo.userId())
+      return call PhyRadioOff.off();
+    else {
+      ASSERT(0);
+      return EBUSY;
+    }
+  }
+
+  async event void PhyRadioOff.offDone()
+  {
+    signal MacRadioOff.offDone[call ArbiterInfo.userId()]();
+  }
+
+  
+  async command bool MacRadioOff.isOff[uint8_t client]()
+  {
+    if (client == call ArbiterInfo.userId())
+      return call PhyRadioOff.isOff();
+    else
+      return EBUSY;
+  }
+
+  default async event void MacRadioOff.offDone[uint8_t client]()
+  {
+    ASSERT(0);
+  }
+}
diff --git a/tos/lib/mac/tkn154/RadioControlP.nc b/tos/lib/mac/tkn154/RadioControlP.nc
new file mode 100644
index 00000000..1f6de457
--- /dev/null
+++ b/tos/lib/mac/tkn154/RadioControlP.nc
@@ -0,0 +1,86 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-24 12:56:46 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154_MAC.h"
+configuration RadioControlP  
+{
+  provides
+  {
+    interface RadioRx as RadioRx[uint8_t client];
+    interface RadioTx as RadioTx[uint8_t client];
+    interface SlottedCsmaCa as SlottedCsmaCa[uint8_t client];
+    interface UnslottedCsmaCa as UnslottedCsmaCa[uint8_t client];
+    interface RadioOff as RadioOff[uint8_t client];
+    interface TransferableResource[uint8_t id];
+    interface ResourceRequested[uint8_t id];
+  } uses {
+    interface RadioRx as PhyRx;
+    interface RadioTx as PhyTx;
+    interface SlottedCsmaCa as PhySlottedCsmaCa;
+    interface UnslottedCsmaCa as PhyUnslottedCsmaCa;
+    interface RadioOff as PhyRadioOff;
+    interface Get<bool> as RadioPromiscuousMode;
+    interface ResourceConfigure[uint8_t id];
+    interface Leds;
+  }
+}
+implementation
+{
+  components RadioControlImplP;
+  RadioRx = RadioControlImplP.MacRx;
+  RadioTx = RadioControlImplP.MacTx;
+  SlottedCsmaCa = RadioControlImplP.SlottedCsmaCa;
+  UnslottedCsmaCa = RadioControlImplP.UnslottedCsmaCa;
+  RadioOff = RadioControlImplP.MacRadioOff;
+  PhyRx = RadioControlImplP.PhyRx;
+  PhyTx = RadioControlImplP.PhyTx;
+  PhySlottedCsmaCa = RadioControlImplP.PhySlottedCsmaCa;
+  PhyUnslottedCsmaCa = RadioControlImplP.PhyUnslottedCsmaCa;
+  PhyRadioOff = RadioControlImplP.PhyRadioOff;
+  RadioPromiscuousMode = RadioControlImplP;
+  Leds = RadioControlImplP;
+
+  components MainC;
+  components new RoundRobinResourceQueueC(uniqueCount(IEEE802154_RADIO_RESOURCE)) as Queue;
+  components new SimpleTransferArbiterP() as Arbiter;
+
+  MainC.SoftwareInit -> Queue;
+
+  TransferableResource = Arbiter;
+  ResourceRequested = Arbiter;
+  RadioControlImplP.ArbiterInfo -> Arbiter;
+  ResourceConfigure = Arbiter;
+
+  Arbiter.Queue -> Queue;
+}
diff --git a/tos/lib/mac/tkn154/RxEnableP.nc b/tos/lib/mac/tkn154/RxEnableP.nc
new file mode 100644
index 00000000..b157670b
--- /dev/null
+++ b/tos/lib/mac/tkn154/RxEnableP.nc
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2009-03-04 18:31:29 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154_PHY.h"
+#include "TKN154_MAC.h"
+module RxEnableP
+{
+  provides
+  {
+    interface Init as Reset;
+    interface MLME_RX_ENABLE;
+    interface GetNow<bool> as IsRxEnableActive; 
+    interface Notify<bool> as RxEnableStateChange;
+  }
+  uses
+  {
+    interface Timer<TSymbolIEEE802154> as RxEnableTimer;
+    interface Get<ieee154_macPanCoordinator_t> as IsMacPanCoordinator;
+    interface SuperframeStructure as IncomingSuperframeStructure;
+    interface SuperframeStructure as OutgoingSuperframeStructure;
+    interface GetNow<bool> as IsTrackingBeacons;
+    interface GetNow<bool> as IsSendingBeacons;
+    interface Notify<bool> as WasRxEnabled;
+    interface TimeCalc;
+  }
+}
+implementation
+{
+
+  uint32_t m_rxOnDuration;
+  uint32_t m_rxOnOffset;
+  uint32_t m_rxOnAnchor;
+  norace bool m_isRxEnabled;
+  bool m_confirmPending;
+
+  command error_t Reset.init()
+  {
+    if (m_confirmPending) {
+      m_confirmPending = FALSE;
+      signal MLME_RX_ENABLE.confirm(IEEE154_SUCCESS);
+    }
+    m_isRxEnabled = FALSE;
+    call RxEnableTimer.stop();
+    return SUCCESS;
+  }
+
+  /* ----------------------- MLME-RX-ENABLE ----------------------- */
+
+  command ieee154_status_t MLME_RX_ENABLE.request  ( 
+                          bool DeferPermit,
+                          uint32_t RxOnTime,
+                          uint32_t RxOnDuration)
+  {
+    ieee154_status_t status = IEEE154_SUCCESS;
+    uint32_t lastBeaconTime=0;
+    uint32_t beaconInterval=0;
+
+    if (m_confirmPending)
+      status = IEEE154_TRANSACTION_OVERFLOW;
+    else if (IEEE154_BEACON_ENABLED_PAN && RxOnTime > 0xFFFFFF)
+      status = IEEE154_INVALID_PARAMETER;
+    else if (RxOnDuration > 0xFFFFFF)
+      status = IEEE154_INVALID_PARAMETER;
+    else if (IEEE154_BEACON_ENABLED_PAN) {
+      if (call IsSendingBeacons.getNow() && call IsMacPanCoordinator.get()) {
+        // for OUTGOING SUPERFRAME
+        lastBeaconTime = call OutgoingSuperframeStructure.sfStartTime();
+        beaconInterval = call OutgoingSuperframeStructure.sfSlotDuration() * 16;
+      } else if (call IsTrackingBeacons.getNow()) {
+        // for INCOMING SUPERFRAME 
+        lastBeaconTime = call IncomingSuperframeStructure.sfStartTime();
+        beaconInterval = call IncomingSuperframeStructure.sfSlotDuration() * 16;
+      }
+      if (beaconInterval == 0)
+        status = IEEE154_PAST_TIME; // we're not even sending/receiving beacons
+      else if (RxOnTime+RxOnDuration >= beaconInterval)
+        status = IEEE154_ON_TIME_TOO_LONG;
+      else if (call TimeCalc.hasExpired(lastBeaconTime, RxOnTime - IEEE154_aTurnaroundTime)) {
+        if (!DeferPermit)
+          status = IEEE154_PAST_TIME;
+        else {
+          // defer to next beacon
+          RxOnTime += beaconInterval;
+        }
+      }
+      if (status == IEEE154_SUCCESS) {
+        m_rxOnAnchor = lastBeaconTime;
+        m_rxOnOffset = RxOnTime;
+      }
+    } else {
+      // this is a nonbeacon-enabled PAN
+      m_rxOnAnchor = call RxEnableTimer.getNow();
+      m_rxOnOffset = 0;
+    }
+
+    if (status == IEEE154_SUCCESS) {
+      m_rxOnDuration = RxOnDuration;      
+      m_isRxEnabled = FALSE;
+      m_confirmPending = TRUE;
+      call RxEnableTimer.startOneShotAt(m_rxOnAnchor, m_rxOnOffset);
+      signal RxEnableStateChange.notify(TRUE);
+    }
+    dbg_serial("RxEnableP", "MLME_RX_ENABLE.request -> result: %lu\n", (uint32_t) status);
+    return status;
+  }
+
+  event void RxEnableTimer.fired()
+  {
+    if (!m_isRxEnabled) {
+      m_isRxEnabled = TRUE;
+      call RxEnableTimer.startOneShotAt(m_rxOnAnchor, m_rxOnOffset + m_rxOnDuration);
+    } else {
+      m_isRxEnabled = FALSE;
+      if (m_confirmPending) {
+        // this means we tried to enable rx, but never succeeded, because
+        // there were  "other responsibilities" - but is SUCCESS really
+        // an appropriate error code in this case?
+        m_confirmPending = FALSE;
+        dbg_serial("RxEnableP", "never actually managed to switch to Rx mode\n");
+        signal MLME_RX_ENABLE.confirm(IEEE154_SUCCESS);
+      }
+    }
+    signal RxEnableStateChange.notify(TRUE);
+  }
+
+  async command bool IsRxEnableActive.getNow()
+  { 
+    return m_isRxEnabled;
+  }
+
+  event void WasRxEnabled.notify(bool val)
+  {
+    if (m_isRxEnabled && m_confirmPending) {
+      m_confirmPending = FALSE;
+      dbg_serial("RxEnableP", "MLME_RX_ENABLE.confirm, radio is now in Rx mode\n");
+      signal MLME_RX_ENABLE.confirm(IEEE154_SUCCESS);
+    }
+  }
+
+  command error_t RxEnableStateChange.enable() {return FAIL;}
+  command error_t RxEnableStateChange.disable() {return FAIL;}
+  default event void MLME_RX_ENABLE.confirm(ieee154_status_t status) {}
+  default async command uint32_t IncomingSuperframeStructure.sfStartTime() {return 0;}
+  default async command uint32_t IncomingSuperframeStructure.sfSlotDuration() {return 0;}
+  default async command uint32_t OutgoingSuperframeStructure.sfStartTime() {return 0;}
+  default async command uint32_t OutgoingSuperframeStructure.sfSlotDuration() {return 0;}
+  default async command bool IsTrackingBeacons.getNow() { return FALSE;}
+  default async command bool IsSendingBeacons.getNow() { return FALSE;}
+  default command ieee154_macPanCoordinator_t IsMacPanCoordinator.get() { return FALSE;}
+}
diff --git a/tos/lib/mac/tkn154/ScanP.nc b/tos/lib/mac/tkn154/ScanP.nc
new file mode 100644
index 00000000..7c7dd5c3
--- /dev/null
+++ b/tos/lib/mac/tkn154/ScanP.nc
@@ -0,0 +1,457 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.12 $
+ * $Date: 2009-06-02 08:40:12 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * This module is responsible for channel scanning.
+ */
+
+#include "TKN154_MAC.h"
+module ScanP
+{
+  provides
+  {
+    interface Init;
+    interface MLME_SCAN;
+    interface MLME_BEACON_NOTIFY;
+    interface GetNow<token_requested_t> as IsRadioTokenRequested;
+  }
+  uses
+  {
+    interface MLME_GET;
+    interface MLME_SET;
+    interface EnergyDetection;
+    interface RadioOff;
+    interface RadioRx;
+    interface RadioTx;
+    interface IEEE154Frame as Frame;
+    interface IEEE154BeaconFrame as BeaconFrame;
+    interface Timer<TSymbolIEEE802154> as ScanTimer;
+    interface Pool<ieee154_txframe_t> as TxFramePool;
+    interface Pool<ieee154_txcontrol_t> as TxControlPool;
+    interface TransferableResource as RadioToken;
+    interface FrameUtility;
+    interface Leds;
+  }
+}
+implementation
+{
+  enum {
+    MAX_PAYLOAD_SIZE = 1,
+    LAST_CHANNEL = 26,
+  };
+#define INVALID_CHANNEL_BITMASK 0xFC000000L
+
+  ieee154_txframe_t *m_txFrame = NULL;
+  uint8_t m_payload[MAX_PAYLOAD_SIZE];  
+  uint8_t m_scanType;
+  uint32_t m_scanChannels;
+  norace uint8_t m_currentChannelNum;
+  bool m_terminateScan;
+  void* m_resultList;
+  uint8_t m_resultListNumEntries;
+  uint8_t m_resultIndex;
+  ieee154_macPANId_t m_PANID;
+  norace uint32_t m_scanDuration;
+  norace bool m_busy = FALSE;
+
+  void nextIteration();
+  void continueScanRequest();
+  task void startTimerTask();
+  task void nextIterationTask();
+
+  command error_t Init.init()
+  {
+    // triggered by MLME_RESET; Note: Init will not be called
+    // while this component owns the RadioToken, so the worst case is 
+    // that a MLME_SCAN was accepted (returned IEEE154_SUCCESS)  
+    // but the RadioToken.granted() has not been signalled            
+    if (m_busy) {
+      m_terminateScan = TRUE;
+      nextIteration(); // signals confirm and resets state
+    }
+    return SUCCESS;
+  }
+
+  /* ----------------------- MLME-SCAN ----------------------- */
+  /* "The MLME-SCAN.request primitive is used to initiate a channel scan over a
+   * given list of channels. A device can use a channel scan to measure the
+   * energy on the channel, search for the coordinator with which it associated,
+   * or search for all coordinators transmitting beacon frames within the POS of
+   * the scanning device." (IEEE 802.15.4-2006 Sect. 7.1.11.1) 
+   **/
+
+  command ieee154_status_t MLME_SCAN.request  (
+                          uint8_t ScanType,
+                          uint32_t ScanChannels,
+                          uint8_t ScanDuration,
+                          uint8_t ChannelPage,
+                          uint8_t EnergyDetectListNumEntries,
+                          int8_t* EnergyDetectList,
+                          uint8_t PANDescriptorListNumEntries,
+                          ieee154_PANDescriptor_t* PANDescriptorList,
+                          ieee154_security_t *security)
+  {
+    ieee154_status_t status = IEEE154_SUCCESS;
+    ieee154_phyChannelsSupported_t supportedChannels = call MLME_GET.phyChannelsSupported();
+    ieee154_txcontrol_t *txControl = NULL;
+
+    if (m_busy) {
+      status = IEEE154_SCAN_IN_PROGRESS;
+    } else if (security && security->SecurityLevel) {
+      status = IEEE154_UNSUPPORTED_SECURITY;
+    } if ((ScanType > 3) || (ScanType < 3 && ScanDuration > 14) || 
+        (ChannelPage != IEEE154_SUPPORTED_CHANNELPAGE) ||
+        !(supportedChannels & ScanChannels) ||
+        ((ScanType != ORPHAN_SCAN) &&
+         ((EnergyDetectListNumEntries && PANDescriptorListNumEntries) ||
+          (EnergyDetectList != NULL && PANDescriptorList != NULL) ||
+          (EnergyDetectListNumEntries && EnergyDetectList == NULL) ||
+          (PANDescriptorListNumEntries && PANDescriptorList == NULL)))) {
+      status = IEEE154_INVALID_PARAMETER;
+    } else if ((ScanType == ACTIVE_SCAN || ScanType == ORPHAN_SCAN) &&
+        ((m_txFrame = call TxFramePool.get()) == NULL)) {
+      status = IEEE154_TRANSACTION_OVERFLOW;
+    } else if ((ScanType == ACTIVE_SCAN || ScanType == ORPHAN_SCAN) &&
+        ((txControl = call TxControlPool.get()) == NULL)) { 
+      call TxFramePool.put(m_txFrame);
+      m_txFrame = NULL;
+      status = IEEE154_TRANSACTION_OVERFLOW;
+    } else {
+      if (m_txFrame != NULL){
+        m_txFrame->header = &txControl->header;
+        m_txFrame->payload = m_payload;
+        m_txFrame->metadata = &txControl->metadata;
+      }
+      m_busy = TRUE;
+      m_scanType = ScanType;
+      m_scanChannels = ScanChannels;
+      m_scanDuration = (((uint32_t) 1 << ScanDuration) + 1) * IEEE154_aBaseSuperframeDuration;
+      m_PANID = call MLME_GET.macPANId();
+      m_currentChannelNum = 0;
+      m_terminateScan = FALSE;
+      m_resultIndex = 0;
+      if (ScanType == ENERGY_DETECTION_SCAN) {
+        m_resultList = EnergyDetectList;
+        m_resultListNumEntries = EnergyDetectListNumEntries;
+      } else {
+        m_resultList = PANDescriptorList;
+        m_resultListNumEntries = PANDescriptorListNumEntries;
+      }
+      if (m_resultList == NULL)
+        m_resultListNumEntries = 0;
+      call RadioToken.request();
+    }
+    dbg_serial("ScanP", "MLME_SCAN.request -> result: %lu\n", (uint32_t) status);
+    return status;
+  }
+
+  event void RadioToken.granted()
+  {
+    if (call RadioOff.isOff())
+      continueScanRequest();
+    else {
+      error_t e = call RadioOff.off();
+      ASSERT(e == SUCCESS);
+    }
+    // will continue in continueScanRequest()
+  }
+
+  task void continueScanRequestTask() 
+  { 
+    continueScanRequest(); 
+  }
+
+  void continueScanRequest()
+  {
+    uint8_t i;
+    ieee154_macPANId_t bcastPANID = 0xFFFF;
+    ieee154_macDSN_t dsn = call MLME_GET.macDSN();
+
+    if (!m_busy) {
+      call RadioToken.release();
+      return;
+    }
+    switch (m_scanType) {
+      case ACTIVE_SCAN:
+        // beacon request frame
+        m_txFrame->header->mhr[MHR_INDEX_FC1] = FC1_FRAMETYPE_CMD;
+        m_txFrame->header->mhr[MHR_INDEX_FC2] = FC2_DEST_MODE_SHORT;
+        m_txFrame->header->mhr[MHR_INDEX_SEQNO] = dsn;
+        call MLME_SET.macDSN(dsn+1);
+        for (i=0; i<4; i++) // broadcast dest PAN ID + broadcast dest addr
+          m_txFrame->header->mhr[MHR_INDEX_ADDRESS + i] = 0xFF;    
+        m_txFrame->headerLen = 7;
+        m_payload[0] = CMD_FRAME_BEACON_REQUEST;
+        m_txFrame->payloadLen = 1;
+        // fall through
+      case PASSIVE_SCAN:
+        call MLME_SET.macPANId(bcastPANID);
+        break;
+      case ORPHAN_SCAN:
+        // orphan notification frame
+        m_scanDuration = call MLME_GET.macResponseWaitTime() * IEEE154_aBaseSuperframeDuration;
+        m_txFrame->header->mhr[MHR_INDEX_FC1] = FC1_FRAMETYPE_CMD | FC1_PAN_ID_COMPRESSION;
+        m_txFrame->header->mhr[MHR_INDEX_FC2] = FC2_SRC_MODE_EXTENDED | FC2_DEST_MODE_SHORT;
+        m_txFrame->header->mhr[MHR_INDEX_SEQNO] = dsn;
+        call MLME_SET.macDSN(dsn+1);
+        for (i=0; i<4; i++) // broadcast dest PAN ID + broadcast dest addr
+          m_txFrame->header->mhr[MHR_INDEX_ADDRESS + i] = 0xFF;
+        call FrameUtility.copyLocalExtendedAddressLE((uint8_t*) &(m_txFrame->header->mhr[MHR_INDEX_ADDRESS + i]));
+        m_txFrame->headerLen = 15;
+        m_payload[0] = CMD_FRAME_ORPHAN_NOTIFICATION;
+        m_txFrame->payloadLen = 1;
+        break;
+    }
+    nextIteration();
+  }
+
+  void nextIteration()
+  {
+    ieee154_phyChannelsSupported_t supportedChannels = call MLME_GET.phyChannelsSupported();
+    uint32_t currentChannelBit = (uint32_t) 1 << m_currentChannelNum;
+    error_t radioStatus = SUCCESS;
+
+    if (!m_terminateScan){
+      while (m_currentChannelNum <= LAST_CHANNEL &&  
+          !(m_scanChannels & currentChannelBit & supportedChannels)){
+        m_currentChannelNum++;
+        currentChannelBit <<= 1;
+      }
+    }
+
+    if (m_currentChannelNum <= LAST_CHANNEL && !m_terminateScan) {
+      // scan the next channel
+      call MLME_SET.phyCurrentChannel(m_currentChannelNum);
+      dbg_serial("ScanP", "Scanning channel %lu...\n", (uint32_t) m_currentChannelNum);
+      switch (m_scanType) {
+        case PASSIVE_SCAN:
+          radioStatus = call RadioRx.enableRx(0, 0);
+          break;
+        case ACTIVE_SCAN: // fall through
+        case ORPHAN_SCAN:
+          radioStatus = call RadioTx.transmit(m_txFrame, 0, 0);
+          break;
+        case ENERGY_DETECTION_SCAN:
+          radioStatus = call EnergyDetection.start(m_scanDuration);
+          break;
+      }
+      ASSERT(radioStatus == SUCCESS);
+    } else {
+      // we're done
+      ieee154_status_t result = IEEE154_SUCCESS;
+      uint32_t unscannedChannels = 0;
+
+      if (m_terminateScan){
+        // Scan operation terminated because the max. 
+        // number of PAN descriptors/ED samples was reached.
+        // Check if there are channels that were unscanned.
+        // In active/passive scan we consider a channel 
+        // unscanned if it was not completely scanned.
+        if (m_scanType == PASSIVE_SCAN || m_scanType == ACTIVE_SCAN) 
+          currentChannelBit >>= 1; // last (partially) scanned channel
+        while (!(currentChannelBit & INVALID_CHANNEL_BITMASK) &&
+               (m_scanChannels & currentChannelBit)){
+          unscannedChannels |= currentChannelBit;
+          currentChannelBit <<= 1;
+        }
+        if (unscannedChannels) // some channels were not (completely) scanned
+          result = IEEE154_LIMIT_REACHED;
+      } else if (m_scanType != ENERGY_DETECTION_SCAN && !m_resultIndex)
+        result = IEEE154_NO_BEACON;
+
+      if (m_scanType == PASSIVE_SCAN || m_scanType == ACTIVE_SCAN) 
+        call MLME_SET.macPANId(m_PANID);
+      if (m_txFrame != NULL) {
+        call TxControlPool.put((ieee154_txcontrol_t*) ((uint8_t*) m_txFrame->header - offsetof(ieee154_txcontrol_t, header)));
+        call TxFramePool.put(m_txFrame);
+      }
+      m_txFrame = NULL;
+      if (call RadioToken.isOwner())
+        call RadioToken.release();
+      m_busy = FALSE;
+      dbg_serial("ScanP", "MLME_SCAN.confirm()\n");
+      signal MLME_SCAN.confirm (
+          result,
+          m_scanType,
+          IEEE154_SUPPORTED_CHANNELPAGE,
+          unscannedChannels,
+          (m_scanType == ENERGY_DETECTION_SCAN) ? m_resultIndex : 0,
+          (m_scanType == ENERGY_DETECTION_SCAN) ? (int8_t*) m_resultList : NULL,
+          ((m_scanType == ACTIVE_SCAN ||
+           m_scanType == PASSIVE_SCAN) && call MLME_GET.macAutoRequest()) ? m_resultIndex : 0,
+          ((m_scanType == ACTIVE_SCAN ||
+           m_scanType == PASSIVE_SCAN) && call MLME_GET.macAutoRequest()) ? (ieee154_PANDescriptor_t*) m_resultList : NULL);
+    }
+    dbg_serial_flush();
+  }
+  
+  async event void RadioRx.enableRxDone()
+  {
+    post startTimerTask();
+  }
+
+  /* ----------------------- EnergyDetection ----------------------- */
+
+  event void EnergyDetection.done(error_t status, int8_t EnergyLevel)
+  {
+    if (status == SUCCESS && m_resultListNumEntries)
+      ((uint8_t*) m_resultList)[m_resultIndex++] = EnergyLevel;
+    if (m_resultIndex == m_resultListNumEntries)
+      m_terminateScan = TRUE; // done
+    if (call RadioOff.off() == EALREADY)
+      signal RadioOff.offDone();
+  }
+
+  /* ----------------------- Active/Orphan scan ----------------------- */
+  
+  async event void RadioTx.transmitDone(ieee154_txframe_t *frame, error_t result)
+  {
+    error_t e = call RadioRx.enableRx(0, 0);
+    ASSERT(e == SUCCESS);
+  }
+
+  /* -------- Receive events (for  Active/Passive/Orphan scan) -------- */
+
+  event message_t* RadioRx.received(message_t *frame)
+  {
+    if (!m_busy)
+      return frame;
+
+    if (m_scanType == ORPHAN_SCAN) {
+      uint8_t *payload = call Frame.getPayload(frame);
+      if (!m_resultIndex)
+        if ((MHR(frame)[0] & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_CMD &&
+            payload[0] == CMD_FRAME_COORDINATOR_REALIGNMENT) {
+
+          // Sect. 7.5.4.3: "the device shall update its MAC PIB with the PAN  
+          // information contained in the coordinator realignment command"
+           
+          call MLME_SET.macPANId( *((nxle_uint16_t*) &payload[1]) );
+          call MLME_SET.macCoordShortAddress( *((nxle_uint16_t*) &payload[3]) );
+          call MLME_SET.phyCurrentChannel( *((nxle_uint16_t*) &payload[5]) );
+          call MLME_SET.macShortAddress( *((nxle_uint16_t*) &payload[6]) );
+          m_resultIndex++; 
+          dbg_serial("ScanP", "Received coordinator realignment frame.\n");
+          m_terminateScan = TRUE;
+          call ScanTimer.stop();
+          call RadioOff.off();
+        }
+    } else if ((((ieee154_header_t*) frame->header)->mhr[0] & FC1_FRAMETYPE_MASK) == FC1_FRAMETYPE_BEACON) {
+
+      // PASSIVE_SCAN / ACTIVE_SCAN:
+      // A beacon frame containing a non-empty payload is always signalled
+      // to the next higher layer (regardless of the value of macAutoRequest);
+      // when macAutoRequest is set to TRUE, then the beacon is always 
+      // stored in the PAN Descriptor list (see 7.1.11.2.1 - Table 68)
+
+      if (!call MLME_GET.macAutoRequest())
+        return signal MLME_BEACON_NOTIFY.indication (frame);
+      else if (m_resultIndex >= m_resultListNumEntries) {
+        m_terminateScan = TRUE;
+        call ScanTimer.stop();
+        call RadioOff.off();
+      } else if (call BeaconFrame.parsePANDescriptor(
+            frame, 
+            m_currentChannelNum, 
+            IEEE154_SUPPORTED_CHANNELPAGE,
+            &((ieee154_PANDescriptor_t*) m_resultList)[m_resultIndex]) == SUCCESS) {
+
+        // check uniqueness: PAN ID and source address must 
+        // not be found in a previously received beacon
+        uint8_t i;
+        ieee154_PANDescriptor_t* descriptor = (ieee154_PANDescriptor_t*) m_resultList;
+
+        dbg_serial("ScanP", "Received beacon, source: 0x%lx, channel: %lu.\n", 
+            (uint32_t) descriptor[m_resultIndex].CoordAddress.shortAddress, (uint32_t) m_currentChannelNum);
+        for (i=0; i<m_resultIndex; i++)
+          if (descriptor[i].CoordPANId == descriptor[m_resultIndex].CoordPANId &&
+              descriptor[i].CoordAddrMode == descriptor[m_resultIndex].CoordAddrMode)
+            if ((descriptor[i].CoordAddrMode == ADDR_MODE_SHORT_ADDRESS &&
+                  descriptor[i].CoordAddress.shortAddress ==
+                  descriptor[m_resultIndex].CoordAddress.shortAddress) ||
+                (descriptor[i].CoordAddrMode == ADDR_MODE_EXTENDED_ADDRESS &&
+                 descriptor[i].CoordAddress.extendedAddress ==
+                 descriptor[m_resultIndex].CoordAddress.extendedAddress))
+              break; // not unique
+        if (i == m_resultIndex)
+          m_resultIndex++; // was unique
+      }
+      if (call BeaconFrame.getBeaconPayloadLength(frame) > 0)
+        return signal MLME_BEACON_NOTIFY.indication (frame);
+    } //  PASSIVE_SCAN / ACTIVE_SCAN
+    return frame;
+  }
+
+  /* ----------------------- Common ----------------------- */
+
+  task void startTimerTask() 
+  { 
+    call ScanTimer.startOneShot(m_scanDuration); 
+  }
+
+  event void ScanTimer.fired()
+  {
+    if (call RadioToken.isOwner())
+      call RadioOff.off();
+  }
+
+  async event void RadioOff.offDone()
+  {
+    if (m_currentChannelNum == 0)
+      post continueScanRequestTask();
+    else {
+      m_currentChannelNum++;    
+      post nextIterationTask();
+    }
+  }
+
+  task void nextIterationTask()
+  {
+    nextIteration();
+  }
+
+  async command token_requested_t IsRadioTokenRequested.getNow(){ return m_busy;}
+  async event void RadioToken.transferredFrom(uint8_t id){ ASSERT(0);}
+  default event message_t* MLME_BEACON_NOTIFY.indication (message_t *beaconFrame) {return beaconFrame;}
+  default event void MLME_SCAN.confirm    (
+                          ieee154_status_t status,
+                          uint8_t ScanType,
+                          uint8_t ChannelPage,
+                          uint32_t UnscannedChannels,
+                          uint8_t EnergyDetectListNumEntries,
+                          int8_t* EnergyDetectList,
+                          uint8_t PANDescriptorListNumEntries,
+                          ieee154_PANDescriptor_t* PANDescriptorList) {}
+}
diff --git a/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc b/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc
new file mode 100644
index 00000000..1262c5a2
--- /dev/null
+++ b/tos/lib/mac/tkn154/SimpleTransferArbiterP.nc
@@ -0,0 +1,191 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * Please refer to TEP 108 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component provides the Resource, ArbiterInfo, and ResourceRequested
+ * interfaces and uses the ResourceConfigure interface as
+ * described in TEP 108.  It provides arbitration to a shared resource.
+ * An queue is used to keep track of which users have put
+ * in requests for the resource.  Upon the release of the resource by one
+ * of these users, the queue is checked and the next user
+ * that has a pending request will ge granted control of the resource.  If
+ * there are no pending requests, then the resource becomes idle and any
+ * user can put in a request and immediately receive access to the
+ * Resource.
+ * 
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Philip Levis
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de> (added TransferableResource interface)
+ */
+ 
+generic module SimpleTransferArbiterP() {
+  provides {
+    interface TransferableResource as Resource[uint8_t id];
+    interface ResourceRequested[uint8_t id];
+    interface ArbiterInfo;
+  }
+  uses {
+    interface ResourceConfigure[uint8_t id];
+    interface ResourceQueue as Queue;
+  }
+}
+implementation {
+
+  enum {RES_IDLE = 0, RES_GRANTING = 1, RES_BUSY = 2};
+  enum {NO_RES = 0xFF};
+
+  uint8_t state = RES_IDLE;
+  norace uint8_t resId = NO_RES;
+  norace uint8_t reqResId;
+  
+  task void grantedTask();
+  
+  async command error_t Resource.request[uint8_t id]() {
+    signal ResourceRequested.requested[resId]();
+    atomic {
+      if(state == RES_IDLE) {
+        state = RES_GRANTING;
+        reqResId = id;
+        post grantedTask();
+        return SUCCESS;
+      }
+      return call Queue.enqueue(id);
+    }
+  }
+
+  async command error_t Resource.immediateRequest[uint8_t id]() {
+    signal ResourceRequested.immediateRequested[resId]();
+    atomic {
+      if(state == RES_IDLE) {
+        state = RES_BUSY;
+        resId = id;
+        call ResourceConfigure.configure[resId]();
+        return SUCCESS;
+      }
+      return FAIL;
+    }
+  }
+   
+  async command error_t Resource.release[uint8_t id]() {
+    bool released = FALSE;
+    atomic {
+      if(state == RES_BUSY && resId == id) {
+        if(call Queue.isEmpty() == FALSE) {
+          reqResId = call Queue.dequeue();
+          state = RES_GRANTING;
+          post grantedTask();
+        }
+        else {
+          resId = NO_RES;
+          state = RES_IDLE;
+        }
+        released = TRUE;
+      }
+    }
+    if(released == TRUE) {
+      call ResourceConfigure.unconfigure[id]();
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+
+  async command error_t Resource.transferTo[uint8_t fromID](uint8_t toID)
+  {
+    atomic {
+      if (call ArbiterInfo.userId() == fromID) {
+        call ResourceConfigure.unconfigure[fromID]();
+        call ResourceConfigure.configure[resId]();
+        resId = toID;
+        signal Resource.transferredFrom[toID](fromID); // consider moving this outside the atomic
+        return SUCCESS;
+      }
+    }
+    return FAIL;
+  }
+    
+  /**
+    Check if the Resource is currently in use
+  */    
+  async command bool ArbiterInfo.inUse() {
+    atomic {
+      if (state == RES_IDLE)
+        return FALSE;
+    }
+    return TRUE;
+  }
+
+  /**
+    Returns the current user of the Resource.
+    If there is no current user, the return value
+    will be 0xFF
+  */      
+  async command uint8_t ArbiterInfo.userId() {
+    atomic {
+      if(state != RES_BUSY)
+        return NO_RES;
+      return resId;
+    }
+  }
+
+  /**
+   * Returns whether you are the current owner of the resource or not
+   */      
+  async command uint8_t Resource.isOwner[uint8_t id]() {
+    atomic {
+      if(resId == id && state == RES_BUSY) return TRUE;
+      else return FALSE;
+    }
+  }
+  
+  task void grantedTask() {
+    atomic {
+      resId = reqResId;
+      state = RES_BUSY;
+    }
+    call ResourceConfigure.configure[resId]();
+    signal Resource.granted[resId]();
+  }
+  
+  //Default event/command handlers
+  default event void Resource.granted[uint8_t id]() {
+  }
+  default async event void ResourceRequested.requested[uint8_t id]() {
+  }
+  default async event void ResourceRequested.immediateRequested[uint8_t id]() {
+  }
+  default async command void ResourceConfigure.configure[uint8_t id]() {
+  }
+  default async command void ResourceConfigure.unconfigure[uint8_t id]() {
+  }
+  default async event void Resource.transferredFrom[uint8_t id](uint8_t c) {
+  }
+}
diff --git a/tos/lib/mac/tkn154/TKN154.h b/tos/lib/mac/tkn154/TKN154.h
new file mode 100644
index 00000000..4a3c37e6
--- /dev/null
+++ b/tos/lib/mac/tkn154/TKN154.h
@@ -0,0 +1,293 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-09-14 12:17:18 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __TKN154_H
+#define __TKN154_H
+
+/****************************************************
+ * IEEE 802.15.4 Enumerations
+ */
+
+typedef enum ieee154_status 
+{
+  IEEE154_SUCCESS                 = 0x00,
+  IEEE154_BEACON_LOSS             = 0xE0,
+  IEEE154_CHANNEL_ACCESS_FAILURE  = 0xE1,
+  IEEE154_COUNTER_ERROR           = 0xDB,
+  IEEE154_DENIED                  = 0xE2,
+  IEEE154_DISABLE_TRX_FAILURE     = 0xE3,
+  IEEE154_FRAME_TOO_LONG          = 0xE5,
+  IEEE154_IMPROPER_KEY_TYPE       = 0xDC,
+  IEEE154_IMPROPER_SECURITY_LEVEL = 0xDD,
+  IEEE154_INVALID_ADDRESS         = 0xF5,
+  IEEE154_INVALID_GTS             = 0xE6,
+  IEEE154_INVALID_HANDLE          = 0xE7,
+  IEEE154_INVALID_INDEX           = 0xF9,
+  IEEE154_INVALID_PARAMETER       = 0xE8,
+  IEEE154_LIMIT_REACHED           = 0xFA,
+  IEEE154_NO_ACK                  = 0xE9,
+  IEEE154_NO_BEACON               = 0xEA,
+  IEEE154_NO_DATA                 = 0xEB,
+  IEEE154_NO_SHORT_ADDRESS        = 0xEC,
+  IEEE154_ON_TIME_TOO_LONG        = 0xF6,
+  IEEE154_OUT_OF_CAP              = 0xED,
+  IEEE154_PAN_ID_CONFLICT         = 0xEE,
+  IEEE154_PAST_TIME               = 0xF7,
+  IEEE154_READ_ONLY               = 0xFB,
+  IEEE154_REALIGNMENT             = 0xEF,
+  IEEE154_SCAN_IN_PROGRESS        = 0xFC,
+  IEEE154_SECURITY_ERROR          = 0xE4,  //FAILED_SECURITY_CHECK  = 0xE4 //802.15.4_2003
+  IEEE154_SUPERFRAME_OVERLAP      = 0xFD,
+  IEEE154_TRACKING_OFF            = 0xF8,
+  IEEE154_TRANSACTION_EXPIRED     = 0xF0,
+  IEEE154_TRANSACTION_OVERFLOW    = 0xF1,
+  IEEE154_TX_ACTIVE               = 0xF2,
+  IEEE154_UNAVAILABLE_KEY         = 0xF3,
+  IEEE154_UNSUPPORTED_ATTRIBUTE   = 0xF4,
+  IEEE154_UNSUPPORTED_LEGACY      = 0xDE,
+  IEEE154_UNSUPPORTED_SECURITY    = 0xDF,
+  IEEE154_PURGED                  = 0xDA, // custom attribute
+} ieee154_status_t;
+
+typedef enum ieee154_association_status 
+{
+  IEEE154_ASSOCIATION_SUCCESSFUL  = 0x00,
+  IEEE154_PAN_AT_CAPACITY         = 0x01,   
+  IEEE154_ACCESS_DENIED           = 0x02    
+} ieee154_association_status_t;
+
+typedef enum ieee154_disassociation_reason 
+{
+  IEEE154_COORDINATOR_WISHES_DEVICE_TO_LEAVE  = 0x01,   
+  IEEE154_DEVICE_WISHES_TO_LEAVE              = 0x02    
+} ieee154_disassociation_reason_t;
+
+typedef union ieee154_address {
+  // Whether this is a short or extended address
+  // depends on the respective addressing mode
+  uint16_t shortAddress;
+  uint64_t extendedAddress;
+} ieee154_address_t;
+
+typedef struct ieee154_security {
+  // Whether the first 0, 4 or 8 byte of KeySource
+  // are valid depends on the KeyIdMode parameter
+  uint8_t SecurityLevel;
+  uint8_t KeyIdMode;
+  uint8_t KeySource[8];
+  uint8_t KeyIndex;
+} ieee154_security_t;
+
+typedef nx_struct
+{
+  nxle_uint8_t AlternatePANCoordinator  :1;
+  nxle_uint8_t DeviceType               :1;
+  nxle_uint8_t PowerSource              :1;
+  nxle_uint8_t ReceiverOnWhenIdle       :1;
+  nxle_uint8_t Reserved                 :2;
+  nxle_uint8_t SecurityCapability       :1;
+  nxle_uint8_t AllocateAddress          :1;
+} ieee154_CapabilityInformation_t;
+
+typedef nx_struct
+{
+  nxle_uint8_t BeaconOrder          :4;
+  nxle_uint8_t SuperframeOrder      :4;
+  nxle_uint8_t FinalCAPSlot         :4;
+  nxle_uint8_t BatteryLifeExtension :1;
+  nxle_uint8_t Reserved             :1;
+  nxle_uint8_t PANCoordinator       :1;
+  nxle_uint8_t AssociationPermit    :1;
+} ieee154_SuperframeSpec_t;
+
+typedef struct ieee154_PANDescriptor {
+  uint8_t CoordAddrMode;
+  uint16_t CoordPANId;
+  ieee154_address_t CoordAddress;
+  uint8_t LogicalChannel;
+  uint8_t ChannelPage;
+  ieee154_SuperframeSpec_t SuperframeSpec;
+  bool GTSPermit;
+  uint8_t LinkQuality;
+  uint32_t TimeStamp;
+  ieee154_status_t SecurityFailure;
+  uint8_t SecurityLevel;
+  uint8_t KeyIdMode;
+  uint64_t KeySource;
+  uint8_t KeyIndex;
+} ieee154_PANDescriptor_t;
+
+enum {
+  // Values for the PANType parameter of the MLME_RESET.request primitive 
+  BEACON_ENABLED_PAN, 
+  NONBEACON_ENABLED_PAN,
+
+  // Values for the TxOptions parameter of MCPS_DATA.request()
+  TX_OPTIONS_ACK      = 0x01,
+  TX_OPTIONS_GTS      = 0x02,
+  TX_OPTIONS_INDIRECT = 0x04,
+
+  // Values for Destination/Source Addressing Mode (MCPS_DATA.request(), etc.)
+  ADDR_MODE_NOT_PRESENT       = 0x00,
+  ADDR_MODE_RESERVED          = 0x01,
+  ADDR_MODE_SHORT_ADDRESS     = 0x02,
+  ADDR_MODE_EXTENDED_ADDRESS  = 0x03,
+
+  // ScanType parameter for MLME-SCAN primitive
+  ENERGY_DETECTION_SCAN    = 0x00,
+  ACTIVE_SCAN              = 0x01,
+  PASSIVE_SCAN             = 0x02,
+  ORPHAN_SCAN              = 0x03,
+
+  // Frame types
+  FRAMETYPE_BEACON       = 0x00,
+  FRAMETYPE_DATA         = 0x01,
+  FRAMETYPE_ACK          = 0x02,
+  FRAMETYPE_CMD          = 0x03,
+};
+
+/**************************************************** 
+ * typedefs PIB value types
+ */
+
+typedef uint8_t             ieee154_phyCurrentChannel_t;
+typedef uint32_t            ieee154_phyChannelsSupported_t;
+typedef uint8_t             ieee154_phyTransmitPower_t;
+typedef uint8_t             ieee154_phyCCAMode_t;
+typedef uint8_t             ieee154_phyCurrentPage_t;
+typedef uint16_t            ieee154_phyMaxFrameDuration_t;
+typedef uint8_t             ieee154_phySHRDuration_t;
+typedef uint8_t             ieee154_phySymbolsPerOctet_t;
+
+typedef uint8_t             ieee154_macAckWaitDuration_t;
+typedef bool                ieee154_macAssociatedPANCoord_t;
+typedef bool                ieee154_macAssociationPermit_t;
+typedef bool                ieee154_macAutoRequest_t;
+typedef bool                ieee154_macBattLifeExt_t;
+typedef uint8_t             ieee154_macBattLifeExtPeriods_t;
+typedef uint8_t*            ieee154_macBeaconPayload_t;
+typedef uint8_t             ieee154_macBeaconPayloadLength_t;
+typedef uint8_t             ieee154_macBeaconOrder_t;
+typedef uint32_t            ieee154_macBeaconTxTime_t;
+typedef uint8_t             ieee154_macBSN_t;
+typedef uint64_t            ieee154_macCoordExtendedAddress_t;
+typedef uint16_t            ieee154_macCoordShortAddress_t;
+typedef uint8_t             ieee154_macDSN_t;
+typedef bool                ieee154_macGTSPermit_t;
+typedef uint8_t             ieee154_macMaxBE_t;
+typedef uint8_t             ieee154_macMaxCSMABackoffs_t;
+typedef uint32_t            ieee154_macMaxFrameTotalWaitTime_t;
+typedef uint8_t             ieee154_macMaxFrameRetries_t;
+typedef uint8_t             ieee154_macMinBE_t;
+typedef uint8_t             ieee154_macMinLIFSPeriod_t;
+typedef uint8_t             ieee154_macMinSIFSPeriod_t;
+typedef uint16_t            ieee154_macPANId_t;
+typedef bool                ieee154_macPromiscuousMode_t;
+typedef uint8_t             ieee154_macResponseWaitTime_t;
+typedef bool                ieee154_macRxOnWhenIdle_t;
+typedef bool                ieee154_macSecurityEnabled_t;
+typedef uint16_t            ieee154_macShortAddress_t;
+typedef uint8_t             ieee154_macSuperframeOrder_t;
+typedef uint16_t            ieee154_macSyncSymbolOffset_t;
+typedef bool                ieee154_macTimestampSupported_t;
+typedef uint16_t            ieee154_macTransactionPersistenceTime_t;
+
+// own typedefs
+typedef bool                ieee154_macPanCoordinator_t; 
+
+// When security is implemented the following line should be commented out
+#define IEEE154_SECURITY_DISABLED
+
+/**************************************************** 
+ * Flags for disabling MAC functionality (to save program memory)
+ */
+
+// Disable scanning (MLME_SCAN will not work):
+// #define IEEE154_SCAN_DISABLED
+//
+// Disable beacon tracking (MLME_SYNC will not work):
+// #define IEEE154_BEACON_SYNC_DISABLED
+//
+// Disable beacon transmission (MLME_START will not work):
+// #define IEEE154_BEACON_TX_DISABLED
+//
+// Disable promiscuous mode (PromiscuousMode.start() will not work):
+// #define IEEE154_PROMISCUOUS_MODE_DISABLED
+//
+// Disallow next higher layer to switch to receive mode (MLME_RX_ENABLE will not work):
+// #define IEEE154_RXENABLE_DISABLED
+//
+// Disable association (MLME_ASSOCIATE will not work):
+// #define IEEE154_ASSOCIATION_DISABLED
+//
+// Disable association (MLME_DISASSOCIATE will not work):
+// #define IEEE154_DISASSOCIATION_DISABLED
+//
+// Disable coordinator realignment (MLME_ORPHAN will not work):
+// #define IEEE154_COORD_REALIGNMENT_DISABLED
+//
+// Disable transmission of broadcasts from coordinator to devices:
+// #define IEEE154_COORD_BROADCAST_DISABLED
+
+/**************************************************** 
+ * Static memory allocation for Queue/Pool
+ */
+
+#ifndef TXFRAME_POOL_SIZE
+#define TXFRAME_POOL_SIZE 5
+#endif
+
+#ifndef TXCONTROL_POOL_SIZE
+#define TXCONTROL_POOL_SIZE 5
+#endif
+
+#ifndef CAP_TX_QUEUE_SIZE
+#define CAP_TX_QUEUE_SIZE 10
+#endif
+
+#ifndef INDIRECT_TX_QUEUE_SIZE
+#define INDIRECT_TX_QUEUE_SIZE 7
+#endif
+
+#ifndef MAX_PENDING_ASSOC_RESPONSES
+#define MAX_PENDING_ASSOC_RESPONSES INDIRECT_TX_QUEUE_SIZE
+#endif
+
+enum {
+  // PHY sublayer constant needed to calculate mpdu size
+  IEEE154_aMaxPHYPacketSize          = 127,
+};
+
+#endif // __TKN154_H
diff --git a/tos/lib/mac/tkn154/TKN154BeaconEnabledP.nc b/tos/lib/mac/tkn154/TKN154BeaconEnabledP.nc
new file mode 100644
index 00000000..c941eef7
--- /dev/null
+++ b/tos/lib/mac/tkn154/TKN154BeaconEnabledP.nc
@@ -0,0 +1,557 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.11 $
+ * $Date: 2009-12-14 16:46:49 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154_PHY.h"
+#include "TKN154_MAC.h"
+#include "TKN154_PIB.h"
+
+#define IEEE154_BEACON_ENABLED_PAN TRUE
+
+configuration TKN154BeaconEnabledP
+{
+  provides
+  {
+    /* MCPS-SAP */
+    interface MCPS_DATA;
+    interface MCPS_PURGE;
+    interface Packet;
+
+    /* MLME-SAP */
+    interface MLME_ASSOCIATE;
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_COMM_STATUS;
+    interface MLME_DISASSOCIATE;
+    interface MLME_GET;
+/*    interface MLME_GTS;*/
+    interface MLME_ORPHAN;
+    interface MLME_POLL;
+    interface MLME_RESET;
+    interface MLME_RX_ENABLE;
+    interface MLME_SCAN;
+    interface MLME_SET;
+    interface MLME_START;
+    interface MLME_SYNC;
+    interface MLME_SYNC_LOSS;
+
+    interface Notify<const void*> as PIBUpdate[uint8_t attributeID];
+    interface IEEE154Frame;
+    interface IEEE154BeaconFrame;
+    interface IEEE154TxBeaconPayload;
+    interface SplitControl as PromiscuousMode;
+    interface Get<uint64_t> as GetLocalExtendedAddress;
+    interface TimeCalc;
+    interface FrameUtility;
+
+  } uses {
+
+    interface RadioRx;
+    interface RadioTx;
+    interface RadioOff;
+    interface SlottedCsmaCa;
+    interface EnergyDetection;
+    interface SplitControl as PhySplitControl;
+    interface Set<bool> as RadioPromiscuousMode;
+
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm1;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm2;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm3;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm4;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm5;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm6;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm7;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm8;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm9;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm10;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm11;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm12;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as Alarm13;
+
+    interface Timer<TSymbolIEEE802154> as Timer1;
+    interface Timer<TSymbolIEEE802154> as Timer2;
+    interface Timer<TSymbolIEEE802154> as Timer3;
+    interface Timer<TSymbolIEEE802154> as Timer4;
+    interface Timer<TSymbolIEEE802154> as Timer5;
+
+    interface LocalTime<TSymbolIEEE802154>;
+    interface Random;
+    interface Leds;
+  }
+}
+implementation
+{
+  components DataP,
+             PibP,
+             RadioControlP,
+             IndirectTxP,
+             PollP,
+
+#ifndef IEEE154_SCAN_DISABLED
+             ScanP,
+#else
+             NoScanP as ScanP,
+#endif
+
+#ifndef IEEE154_ASSOCIATION_DISABLED
+             AssociateP,
+#else
+             NoAssociateP as AssociateP,
+#endif
+
+#ifndef IEEE154_DISASSOCIATION_DISABLED
+             DisassociateP,
+#else
+             NoDisassociateP as DisassociateP,
+#endif
+
+#ifndef IEEE154_BEACON_SYNC_DISABLED
+             BeaconSynchronizeP,
+             new DispatchQueueP() as DeviceCapQueue,
+             new DispatchSlottedCsmaP(INCOMING_SUPERFRAME) as DeviceCap,
+#else
+             NoBeaconSynchronizeP as BeaconSynchronizeP,
+             new NoDispatchQueueP() as DeviceCapQueue,
+             new NoDispatchSlottedCsmaP(INCOMING_SUPERFRAME) as DeviceCap,
+#endif
+             NoDeviceCfpP as DeviceCfp,
+
+#ifndef IEEE154_BEACON_TX_DISABLED
+             BeaconTransmitP,
+             new DispatchQueueP() as CoordCapQueue,
+             new DispatchSlottedCsmaP(OUTGOING_SUPERFRAME) as CoordCap,
+#else
+             NoBeaconTransmitP as BeaconTransmitP,
+             new NoDispatchQueueP() as CoordCapQueue,
+             new NoDispatchSlottedCsmaP(OUTGOING_SUPERFRAME) as CoordCap,
+#endif
+             NoCoordCfpP as CoordCfp,
+
+             new InactivePeriodP(INCOMING_SUPERFRAME) as DeviceInactivePeriod,
+             new InactivePeriodP(OUTGOING_SUPERFRAME) as CoordInactivePeriod,
+
+#ifndef IEEE154_RXENABLE_DISABLED
+             RxEnableP,
+#else
+             NoRxEnableP as RxEnableP,
+#endif
+
+
+#ifndef IEEE154_PROMISCUOUS_MODE_DISABLED
+             PromiscuousModeP,
+#else
+             NoPromiscuousModeP as PromiscuousModeP,
+#endif
+
+#ifndef IEEE154_COORD_REALIGNMENT_DISABLED
+             CoordRealignmentP,
+#else
+             NoCoordRealignmentP as CoordRealignmentP,
+#endif
+
+#ifndef IEEE154_COORD_BROADCAST_DISABLED
+             CoordBroadcastP,
+#else
+             NoCoordBroadcastP as CoordBroadcastP,
+#endif
+
+             new PoolC(ieee154_txframe_t, TXFRAME_POOL_SIZE) as TxFramePoolP,
+             new PoolC(ieee154_txcontrol_t, TXCONTROL_POOL_SIZE) as TxControlPoolP,
+             new QueueC(ieee154_txframe_t*, CAP_TX_QUEUE_SIZE) as DeviceCapQueueC,
+             new QueueC(ieee154_txframe_t*, CAP_TX_QUEUE_SIZE) as CoordCapQueueC,
+             new QueueC(ieee154_txframe_t*, CAP_TX_QUEUE_SIZE) as BroadcastQueueC;
+
+  components MainC;
+
+  /* MCPS */
+  MCPS_DATA = DataP; 
+  MCPS_PURGE = DataP; 
+
+  /* MLME */
+  MLME_START = BeaconTransmitP;
+  MLME_ASSOCIATE = AssociateP;
+  MLME_DISASSOCIATE = DisassociateP;
+  MLME_BEACON_NOTIFY = BeaconSynchronizeP;
+  MLME_BEACON_NOTIFY = ScanP;
+  MLME_COMM_STATUS = AssociateP;
+  MLME_COMM_STATUS = CoordRealignmentP;
+  MLME_GET = PibP;
+  MLME_ORPHAN = CoordRealignmentP;
+  /* MLME_GTS = CfpTransmitP;*/
+  MLME_POLL = PollP;
+  MLME_RESET = PibP;
+  MLME_RX_ENABLE = RxEnableP;
+  MLME_SCAN = ScanP;
+  MLME_SET = PibP;
+  MLME_SYNC = BeaconSynchronizeP;
+  MLME_SYNC_LOSS = BeaconSynchronizeP;
+  IEEE154Frame = PibP;
+  IEEE154BeaconFrame = PibP;
+  PromiscuousMode = PromiscuousModeP;
+  GetLocalExtendedAddress = PibP.GetLocalExtendedAddress;
+  IEEE154TxBeaconPayload = BeaconTransmitP;
+  Packet = PibP; 
+  TimeCalc = PibP;
+  FrameUtility = PibP;
+  
+  /* ----------------------- Scanning (MLME-SCAN) ----------------------- */
+
+  components new RadioClientC(RADIO_CLIENT_SCAN) as ScanRadioClient;
+  PibP.MacReset -> ScanP;
+  ScanP.MLME_GET -> PibP;
+  ScanP.MLME_SET -> PibP.MLME_SET;
+  ScanP.EnergyDetection = EnergyDetection;
+  ScanP.RadioRx -> ScanRadioClient;
+  ScanP.RadioTx -> ScanRadioClient;
+  ScanP.Frame -> PibP;
+  ScanP.BeaconFrame -> PibP;
+  ScanP.RadioOff -> ScanRadioClient;
+  ScanP.ScanTimer = Timer1;
+  ScanP.TxFramePool -> TxFramePoolP;
+  ScanP.TxControlPool -> TxControlPoolP;
+  ScanP.RadioToken -> ScanRadioClient;
+  ScanP.Leds = Leds;
+  ScanP.FrameUtility -> PibP;
+
+  /* ----------------- Beacon Transmission (MLME-START) ----------------- */
+  
+  components new RadioClientC(RADIO_CLIENT_BEACONTRANSMIT) as BeaconTxRadioClient;
+  PibP.MacReset -> BeaconTransmitP;
+  BeaconTransmitP.PIBUpdate[IEEE154_macAssociationPermit] -> PibP.PIBUpdate[IEEE154_macAssociationPermit];
+  BeaconTransmitP.PIBUpdate[IEEE154_macGTSPermit] -> PibP.PIBUpdate[IEEE154_macGTSPermit];
+  BeaconTransmitP.BeaconSendAlarm = Alarm1;
+  BeaconTransmitP.BeaconPayloadUpdateTimer = Timer2;
+  BeaconTransmitP.RadioOff -> BeaconTxRadioClient;
+  BeaconTransmitP.BeaconTx -> BeaconTxRadioClient;
+  BeaconTransmitP.MLME_SET -> PibP.MLME_SET;
+  BeaconTransmitP.MLME_GET -> PibP;
+  BeaconTransmitP.SetMacSuperframeOrder -> PibP.SetMacSuperframeOrder;
+  BeaconTransmitP.SetMacBeaconTxTime -> PibP.SetMacBeaconTxTime;
+  BeaconTransmitP.SetMacPanCoordinator -> PibP.SetMacPanCoordinator;
+  BeaconTransmitP.RadioToken -> BeaconTxRadioClient;
+  BeaconTransmitP.RealignmentBeaconEnabledTx -> CoordBroadcastP.RealignmentTx;
+  BeaconTransmitP.RealignmentNonBeaconEnabledTx -> CoordCapQueue.FrameTx[unique(CAP_TX_CLIENT)];
+  BeaconTransmitP.BeaconRequestRx -> CoordCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_BEACON_REQUEST];
+  BeaconTransmitP.GtsInfoWrite -> CoordCfp.GtsInfoWrite;
+  BeaconTransmitP.PendingAddrSpecUpdated -> IndirectTxP.PendingAddrSpecUpdated;
+  BeaconTransmitP.PendingAddrWrite -> IndirectTxP.PendingAddrWrite;
+  BeaconTransmitP.FrameUtility -> PibP.FrameUtility;
+  BeaconTransmitP.IsTrackingBeacons -> BeaconSynchronizeP.IsTrackingBeacons;
+  BeaconTransmitP.IncomingSF -> BeaconSynchronizeP.IncomingSF;
+  BeaconTransmitP.GetSetRealignmentFrame -> CoordRealignmentP;
+  BeaconTransmitP.IsBroadcastReady -> CoordBroadcastP.IsBroadcastReady;
+  BeaconTransmitP.TimeCalc -> PibP;
+  BeaconTransmitP.Random = Random;
+  BeaconTransmitP.Leds = Leds;
+
+  /* ------------------ Beacon Tracking (MLME-SYNC) ------------------ */
+
+  components new RadioClientC(RADIO_CLIENT_BEACONSYNCHRONIZE) as SyncRadioClient;
+  PibP.MacReset -> BeaconSynchronizeP;
+  BeaconSynchronizeP.MLME_SET -> PibP.MLME_SET;
+  BeaconSynchronizeP.MLME_GET -> PibP;
+  BeaconSynchronizeP.TrackAlarm = Alarm2;
+  BeaconSynchronizeP.FrameUtility -> PibP;
+  BeaconSynchronizeP.Frame -> PibP;
+  BeaconSynchronizeP.BeaconFrame -> PibP;
+  BeaconSynchronizeP.BeaconRx -> SyncRadioClient;
+  BeaconSynchronizeP.RadioOff -> SyncRadioClient;
+  BeaconSynchronizeP.DataRequest -> PollP.DataRequest[SYNC_POLL_CLIENT];
+  BeaconSynchronizeP.RadioToken -> SyncRadioClient;
+  BeaconSynchronizeP.TimeCalc -> PibP;
+  BeaconSynchronizeP.CoordRealignmentRx -> DeviceCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_COORDINATOR_REALIGNMENT];
+  BeaconSynchronizeP.Leds = Leds;
+
+  /* -------------------- Association (MLME-ASSOCIATE) -------------------- */
+
+  PibP.MacReset -> AssociateP;
+  AssociateP.AssociationRequestRx -> CoordCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_ASSOCIATION_REQUEST];
+  AssociateP.AssociationRequestTx -> DeviceCapQueue.FrameTx[unique(CAP_TX_CLIENT)];
+  AssociateP.AssociationResponseExtracted -> DeviceCap.FrameExtracted[FC1_FRAMETYPE_CMD + CMD_FRAME_ASSOCIATION_RESPONSE];
+  AssociateP.AssociationResponseTx -> IndirectTxP.FrameTx[unique(INDIRECT_TX_CLIENT)];
+  AssociateP.DataRequest -> PollP.DataRequest[ASSOCIATE_POLL_CLIENT];
+  AssociateP.ResponseTimeout = Timer3;
+  AssociateP.TxFramePool -> TxFramePoolP;
+  AssociateP.TxControlPool -> TxControlPoolP;
+  AssociateP.MLME_GET -> PibP;
+  AssociateP.MLME_SET -> PibP.MLME_SET;
+  AssociateP.FrameUtility -> PibP;
+  AssociateP.Frame -> PibP;
+  AssociateP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress;
+
+  /* --------------- Disassociation (MLME-DISASSOCIATE) --------------- */
+
+  PibP.MacReset -> DisassociateP;
+  DisassociateP.DisassociationIndirectTx -> IndirectTxP.FrameTx[unique(INDIRECT_TX_CLIENT)];
+  DisassociateP.DisassociationDirectTx -> CoordCapQueue.FrameTx[unique(CAP_TX_CLIENT)];
+  DisassociateP.DisassociationToCoord -> DeviceCapQueue.FrameTx[unique(CAP_TX_CLIENT)];
+  DisassociateP.DisassociationDirectRxFromCoord -> 
+    DeviceCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_DISASSOCIATION_NOTIFICATION];
+  DisassociateP.DisassociationExtractedFromCoord -> 
+    DeviceCap.FrameExtracted[FC1_FRAMETYPE_CMD + CMD_FRAME_DISASSOCIATION_NOTIFICATION];
+  DisassociateP.DisassociationRxFromDevice -> 
+    CoordCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_DISASSOCIATION_NOTIFICATION];
+  DisassociateP.TxFramePool -> TxFramePoolP;
+  DisassociateP.TxControlPool -> TxControlPoolP;
+  DisassociateP.MLME_GET -> PibP;
+  DisassociateP.MLME_SET -> PibP;
+  DisassociateP.FrameUtility -> PibP;
+  DisassociateP.Frame -> PibP;
+  DisassociateP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress;
+
+  /* ------------------ Data Transmission (MCPS-DATA) ------------------- */
+
+  DataP.CoordCapRx -> CoordCap.FrameRx[FC1_FRAMETYPE_DATA]; 
+  DataP.DeviceCapTx -> DeviceCapQueue.FrameTx[unique(CAP_TX_CLIENT)];
+  DataP.CoordCapTx -> CoordCapQueue.FrameTx[unique(CAP_TX_CLIENT)];
+  DataP.DeviceCapRx -> PollP.DataRx;                          
+  DataP.DeviceCapRx -> PromiscuousModeP.FrameRx;              
+  DataP.DeviceCapRx -> DeviceCap.FrameRx[FC1_FRAMETYPE_DATA]; 
+  DataP.TxFramePool -> TxFramePoolP;
+  DataP.BroadcastTx -> CoordBroadcastP.BroadcastDataFrame;
+  DataP.DeviceCfpTx -> DeviceCfp.CfpTx;
+  DataP.IndirectTx -> IndirectTxP.FrameTx[unique(INDIRECT_TX_CLIENT)];
+  DataP.FrameUtility -> PibP;
+  DataP.Frame -> PibP;
+  DataP.PurgeDirect -> DeviceCapQueue;
+  DataP.PurgeIndirect -> IndirectTxP;
+  DataP.PurgeGtsDevice -> DeviceCfp;
+  DataP.PurgeGtsCoord -> CoordCfp;
+  DataP.MLME_GET -> PibP;
+  DataP.Packet -> PibP;
+  DataP.Leds = Leds;
+
+  /* ------------------------ Polling (MLME-POLL) ----------------------- */
+
+  PibP.MacReset -> PollP;
+  PollP.PollTx -> DeviceCapQueue.FrameTx[unique(CAP_TX_CLIENT)];
+  PollP.DataExtracted -> DeviceCap.FrameExtracted[FC1_FRAMETYPE_DATA];
+  PollP.FrameUtility -> PibP;
+  PollP.TxFramePool -> TxFramePoolP;
+  PollP.TxControlPool -> TxControlPoolP;
+  PollP.MLME_GET -> PibP;
+  PollP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress;
+
+  /* ---------------------- Indirect transmission ----------------------- */
+
+  PibP.MacReset -> IndirectTxP;
+  IndirectTxP.CoordCapTx -> CoordCapQueue.FrameTx[unique(CAP_TX_CLIENT)];
+  IndirectTxP.DataRequestRx -> CoordCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_DATA_REQUEST];
+  IndirectTxP.MLME_GET -> PibP;
+  IndirectTxP.IEEE154Frame -> PibP;
+  IndirectTxP.IndirectTxTimeout = Timer4;
+  IndirectTxP.TimeCalc -> PibP;
+  IndirectTxP.Leds = Leds;
+
+  /* ---------------------------- Realignment --------------------------- */
+
+  PibP.MacReset -> CoordRealignmentP;
+  CoordRealignmentP.CoordRealignmentTx -> CoordCapQueue.FrameTx[unique(CAP_TX_CLIENT)];
+  CoordRealignmentP.OrphanNotificationRx -> CoordCap.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_ORPHAN_NOTIFICATION];
+  CoordRealignmentP.FrameUtility -> PibP;
+  CoordRealignmentP.Frame -> PibP;
+  CoordRealignmentP.TxFramePool -> TxFramePoolP;
+  CoordRealignmentP.TxControlPool -> TxControlPoolP;
+  CoordRealignmentP.MLME_GET -> PibP;
+  CoordRealignmentP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress;
+
+  /* ---------------------------- Broadcasts ---------------------------- */
+
+  components new RadioClientC(RADIO_CLIENT_COORDBROADCAST) as CoordBroadcastRadioClient;
+  PibP.MacReset -> CoordBroadcastP;
+  CoordBroadcastP.RadioToken -> CoordBroadcastRadioClient;
+  CoordBroadcastP.OutgoingSF -> BeaconTransmitP.OutgoingSF;
+  CoordBroadcastP.CapTransmitNow -> CoordCap.BroadcastTx;
+  CoordBroadcastP.Queue -> BroadcastQueueC;
+
+  /* --------------------- CAP (incoming superframe) -------------------- */
+
+  PibP.DispatchQueueReset -> DeviceCapQueue;
+  DeviceCapQueue.Queue -> DeviceCapQueueC;
+  DeviceCapQueue.FrameTxCsma -> DeviceCap;
+
+  PibP.DispatchQueueReset -> CoordCapQueue;
+  CoordCapQueue.Queue -> CoordCapQueueC;
+  CoordCapQueue.FrameTxCsma -> CoordCap;
+  
+  components new RadioClientC(RADIO_CLIENT_DEVICECAP) as DeviceCapRadioClient;
+  PibP.DispatchReset -> DeviceCap;
+  DeviceCap.CapEndAlarm = Alarm3;
+  DeviceCap.BLEAlarm = Alarm4;
+  DeviceCap.RxWaitAlarm = Alarm5;
+  DeviceCap.RadioToken -> DeviceCapRadioClient;
+  DeviceCap.RadioTokenRequested -> DeviceCapRadioClient;
+  DeviceCap.SuperframeStructure -> BeaconSynchronizeP.IncomingSF;
+  DeviceCap.IsRxEnableActive -> RxEnableP.IsRxEnableActive;
+  DeviceCap.IsRadioTokenRequested -> PibP.IsRadioTokenRequested; // fan out...
+  DeviceCap.IsRadioTokenRequested -> PromiscuousModeP.IsRadioTokenRequested;
+  DeviceCap.IsRadioTokenRequested -> ScanP.IsRadioTokenRequested;
+  DeviceCap.GetIndirectTxFrame -> IndirectTxP;
+  DeviceCap.RxEnableStateChange -> RxEnableP.RxEnableStateChange;  
+  DeviceCap.IsTrackingBeacons -> BeaconSynchronizeP.IsTrackingBeacons;  
+  DeviceCap.PIBUpdateMacRxOnWhenIdle -> PibP.PIBUpdate[IEEE154_macRxOnWhenIdle];
+  DeviceCap.FrameUtility -> PibP;
+  DeviceCap.SlottedCsmaCa -> DeviceCapRadioClient;
+  DeviceCap.RadioRx -> DeviceCapRadioClient;
+  DeviceCap.RadioOff -> DeviceCapRadioClient;
+  DeviceCap.MLME_GET -> PibP;
+  DeviceCap.MLME_SET -> PibP.MLME_SET;
+  DeviceCap.TimeCalc -> PibP;
+  DeviceCap.Leds = Leds;
+  DeviceCap.TrackSingleBeacon -> BeaconSynchronizeP.TrackSingleBeacon;
+  DeviceCap.MLME_SYNC_LOSS -> BeaconSynchronizeP;
+
+  /* ---------------------- CAP (outgoing superframe) ------------------- */
+
+  components new RadioClientC(RADIO_CLIENT_COORDCAP) as CoordCapRadioClient, 
+             new BackupP(ieee154_cap_frame_backup_t);
+  PibP.DispatchReset -> CoordCap;
+  CoordCap.CapEndAlarm = Alarm6;
+  CoordCap.BLEAlarm = Alarm7;
+  CoordCap.RadioToken -> CoordCapRadioClient;
+  CoordCap.RadioTokenRequested -> CoordCapRadioClient;
+  CoordCap.SuperframeStructure -> BeaconTransmitP.OutgoingSF;
+  CoordCap.IsRxEnableActive -> RxEnableP.IsRxEnableActive;
+  CoordCap.IsRadioTokenRequested -> PibP.IsRadioTokenRequested; // fan out...
+  CoordCap.IsRadioTokenRequested -> PromiscuousModeP.IsRadioTokenRequested;
+  CoordCap.IsRadioTokenRequested -> ScanP.IsRadioTokenRequested;
+  CoordCap.GetIndirectTxFrame -> IndirectTxP;
+  CoordCap.RxEnableStateChange -> RxEnableP.RxEnableStateChange;  
+  CoordCap.IsTrackingBeacons -> BeaconSynchronizeP.IsTrackingBeacons;  
+  CoordCap.PIBUpdateMacRxOnWhenIdle -> PibP.PIBUpdate[IEEE154_macRxOnWhenIdle];
+  CoordCap.FrameUtility -> PibP;
+  CoordCap.SlottedCsmaCa -> CoordCapRadioClient;
+  CoordCap.RadioRx -> CoordCapRadioClient;
+  CoordCap.RadioOff -> CoordCapRadioClient;
+  CoordCap.MLME_GET -> PibP;
+  CoordCap.MLME_SET -> PibP.MLME_SET;
+  CoordCap.TimeCalc -> PibP;
+  CoordCap.Leds = Leds;
+  CoordCap.FrameBackup -> BackupP;
+  CoordCap.FrameRestore -> BackupP;
+
+  /* -------------------- GTS (incoming superframe) --------------------- */
+
+  components new RadioClientC(RADIO_CLIENT_DEVICECFP) as DeviceCfpRadioClient;
+  PibP.MacReset -> DeviceCfp;
+  DeviceCfp.RadioToken -> DeviceCfpRadioClient;
+  DeviceCfp.IncomingSF -> BeaconSynchronizeP.IncomingSF; 
+  DeviceCfp.CfpSlotAlarm = Alarm8;
+  DeviceCfp.CfpEndAlarm = Alarm9;
+  DeviceCfp.RadioTx -> DeviceCfpRadioClient;
+  DeviceCfp.RadioRx -> DeviceCfpRadioClient;
+  DeviceCfp.RadioOff -> DeviceCfpRadioClient;
+  DeviceCfp.MLME_GET -> PibP;
+  DeviceCfp.MLME_SET -> PibP.MLME_SET; 
+
+  /* -------------------- GTS (outgoing superframe) --------------------- */
+
+  components new RadioClientC(RADIO_CLIENT_COORDCFP) as CoordCfpRadioClient;
+  PibP.MacReset -> CoordCfp;
+  CoordCfp.RadioToken -> CoordCfpRadioClient;
+  CoordCfp.OutgoingSF -> BeaconTransmitP.OutgoingSF; 
+  CoordCfp.CfpSlotAlarm = Alarm10;
+  CoordCfp.CfpEndAlarm = Alarm11;
+  CoordCfp.RadioTx -> CoordCfpRadioClient;
+  CoordCfp.RadioRx -> CoordCfpRadioClient;
+  CoordCfp.RadioOff -> CoordCfpRadioClient;
+  CoordCfp.MLME_GET -> PibP;
+  CoordCfp.MLME_SET -> PibP.MLME_SET;
+
+  /* --------------- Inactive Period (incoming superframe) -------------- */
+
+   components new RadioClientC(RADIO_CLIENT_DEVICE_INACTIVE_PERIOD) as DeviceInactivePeriodClient;
+   DeviceInactivePeriod.RadioToken -> DeviceInactivePeriodClient;
+   DeviceInactivePeriod.Alarm = Alarm12;
+   DeviceInactivePeriod.RadioControl = PhySplitControl;
+   DeviceInactivePeriod.SF -> BeaconSynchronizeP.IncomingSF;
+   DeviceInactivePeriod.IsEmbedded -> BeaconTransmitP.IsSendingBeacons;
+   DeviceInactivePeriod.RadioOff -> DeviceInactivePeriodClient;
+   DeviceInactivePeriod.MLME_GET -> PibP;
+   DeviceInactivePeriod.TimeCalc -> PibP;
+
+  /* --------------- Inactive Period (outgoing superframe) -------------- */
+
+   components new RadioClientC(RADIO_CLIENT_COORD_INACTIVE_PERIOD) as CoordInactivePeriodClient;
+   CoordInactivePeriod.RadioToken -> CoordInactivePeriodClient;
+   CoordInactivePeriod.Alarm = Alarm13;
+   CoordInactivePeriod.RadioControl = PhySplitControl;
+   CoordInactivePeriod.SF -> BeaconTransmitP.OutgoingSF;
+   CoordInactivePeriod.IsEmbedded -> BeaconSynchronizeP.IsTrackingBeacons;
+   CoordInactivePeriod.RadioOff -> CoordInactivePeriodClient;
+   CoordInactivePeriod.MLME_GET -> PibP;
+   CoordInactivePeriod.TimeCalc -> PibP;
+
+  /* -------------------------- promiscuous mode ------------------------ */
+
+  components new RadioClientC(RADIO_CLIENT_PROMISCUOUSMODE) as PromiscuousModeRadioClient;
+  PibP.MacReset -> PromiscuousModeP;
+  PromiscuousModeP.RadioToken -> PromiscuousModeRadioClient;
+  PromiscuousModeP.PromiscuousRx -> PromiscuousModeRadioClient;
+  PromiscuousModeP.RadioOff -> PromiscuousModeRadioClient;
+  PromiscuousModeP.RadioPromiscuousMode = RadioPromiscuousMode;
+
+  /* --------------------------- MLME-RX-ENABLE  ------------------------ */
+
+  PibP.MacReset -> RxEnableP;
+  RxEnableP.IncomingSuperframeStructure -> BeaconSynchronizeP;
+  RxEnableP.OutgoingSuperframeStructure -> BeaconTransmitP;
+  RxEnableP.IsTrackingBeacons -> BeaconSynchronizeP.IsTrackingBeacons;
+  RxEnableP.IsSendingBeacons-> BeaconTransmitP.IsSendingBeacons;
+  RxEnableP.TimeCalc -> PibP.TimeCalc;
+  RxEnableP.WasRxEnabled -> DeviceCap.WasRxEnabled;
+  RxEnableP.WasRxEnabled -> CoordCap.WasRxEnabled;
+  RxEnableP.RxEnableTimer = Timer5;
+
+  /* ------------------------------- PIB -------------------------------- */
+
+  components new RadioClientC(RADIO_CLIENT_PIB) as PibRadioClient;
+  PIBUpdate = PibP;
+  MainC.SoftwareInit -> PibP.LocalInit;
+  PibP.RadioControl = PhySplitControl;
+  PibP.Random = Random; 
+  PibP.PromiscuousModeGet -> PromiscuousModeP; 
+  PibP.LocalTime = LocalTime;
+  PibP.RadioToken -> PibRadioClient;
+  PibP.RadioOff -> PibRadioClient;
+
+  /* ------------------------- Radio Control ---------------------------- */
+
+  RadioControlP.PhyTx = RadioTx;
+  RadioControlP.PhySlottedCsmaCa = SlottedCsmaCa;
+  RadioControlP.PhyRx = RadioRx;
+  RadioControlP.PhyRadioOff = RadioOff;
+  RadioControlP.RadioPromiscuousMode -> PromiscuousModeP;
+  RadioControlP.Leds = Leds;
+
+}
diff --git a/tos/lib/mac/tkn154/TKN154NonBeaconEnabledP.nc b/tos/lib/mac/tkn154/TKN154NonBeaconEnabledP.nc
new file mode 100644
index 00000000..1eb57e24
--- /dev/null
+++ b/tos/lib/mac/tkn154/TKN154NonBeaconEnabledP.nc
@@ -0,0 +1,357 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.10 $
+ * $Date: 2009-10-16 12:25:46 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154_PHY.h"
+#include "TKN154_MAC.h"
+#include "TKN154_PIB.h"
+
+#define IEEE154_BEACON_ENABLED_PAN FALSE
+
+configuration TKN154NonBeaconEnabledP
+{
+  provides
+  {
+    /* MCPS-SAP */
+    interface MCPS_DATA;
+    interface MCPS_PURGE;
+    interface Packet;
+
+    /* MLME-SAP */
+    interface MLME_ASSOCIATE;
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_COMM_STATUS;
+    interface MLME_DISASSOCIATE;
+    interface MLME_GET;
+    interface MLME_ORPHAN;
+    interface MLME_POLL;
+    interface MLME_RESET;
+    interface MLME_RX_ENABLE;
+    interface MLME_SCAN;
+    interface MLME_SET;
+    interface MLME_START;
+
+    interface Notify<const void*> as PIBUpdate[uint8_t attributeID];
+    interface IEEE154Frame;
+    interface IEEE154BeaconFrame;
+    interface IEEE154TxBeaconPayload;
+    interface SplitControl as PromiscuousMode;
+    interface Get<uint64_t> as GetLocalExtendedAddress;
+    interface TimeCalc;
+    interface FrameUtility;
+
+  } uses {
+
+    interface RadioRx;
+    interface RadioTx;
+    interface RadioOff;
+    interface UnslottedCsmaCa;
+    interface EnergyDetection;
+    interface SplitControl as PhySplitControl;
+    interface Set<bool> as RadioPromiscuousMode;
+
+    interface Timer<TSymbolIEEE802154> as Timer1;
+    interface Timer<TSymbolIEEE802154> as Timer2;
+    interface Timer<TSymbolIEEE802154> as Timer3;
+    interface Timer<TSymbolIEEE802154> as Timer4;
+    interface Timer<TSymbolIEEE802154> as Timer5;
+
+    interface LocalTime<TSymbolIEEE802154>;
+    interface Random;
+    interface Leds;
+  }
+}
+implementation
+{
+  components DataP,
+             PibP,
+             RadioControlP,
+             IndirectTxP,
+             PollP,
+             BeaconRequestRxP,
+
+#ifndef IEEE154_SCAN_DISABLED
+             ScanP,
+#else
+             NoScanP as ScanP,
+#endif
+
+#ifndef IEEE154_ASSOCIATION_DISABLED
+             AssociateP,
+#else
+             NoAssociateP as AssociateP,
+#endif
+
+#ifndef IEEE154_DISASSOCIATION_DISABLED
+             DisassociateP,
+#else
+             NoDisassociateP as DisassociateP,
+#endif
+             new DispatchQueueP() as DispatchQueueP,
+             DispatchUnslottedCsmaP as DispatchP,
+
+#ifndef IEEE154_RXENABLE_DISABLED
+             RxEnableP,
+#else
+             NoRxEnableP as RxEnableP,
+#endif
+
+
+#ifndef IEEE154_PROMISCUOUS_MODE_DISABLED
+             PromiscuousModeP,
+#else
+             NoPromiscuousModeP as PromiscuousModeP,
+#endif
+
+#ifndef IEEE154_COORD_REALIGNMENT_DISABLED
+             CoordRealignmentP,
+#else
+             NoCoordRealignmentP as CoordRealignmentP,
+#endif
+
+             new PoolC(ieee154_txframe_t, TXFRAME_POOL_SIZE) as TxFramePoolP,
+             new PoolC(ieee154_txcontrol_t, TXCONTROL_POOL_SIZE) as TxControlPoolP,
+             new QueueC(ieee154_txframe_t*, CAP_TX_QUEUE_SIZE) as DispatchQueueC;
+
+  components MainC;
+
+  /* MCPS */
+  MCPS_DATA = DataP; 
+  MCPS_PURGE = DataP; 
+
+  /* MLME */
+  MLME_START = DispatchP;
+  MLME_ASSOCIATE = AssociateP;
+  MLME_DISASSOCIATE = DisassociateP;
+  MLME_BEACON_NOTIFY = ScanP;
+  MLME_COMM_STATUS = AssociateP;
+  MLME_COMM_STATUS = CoordRealignmentP;
+  MLME_GET = PibP;
+  MLME_ORPHAN = CoordRealignmentP;
+  MLME_POLL = PollP;
+  MLME_RESET = PibP;
+  MLME_RX_ENABLE = RxEnableP;
+  MLME_SCAN = ScanP;
+  MLME_SET = PibP;
+  IEEE154Frame = PibP;
+  IEEE154BeaconFrame = PibP;
+  IEEE154TxBeaconPayload = BeaconRequestRxP;
+  PromiscuousMode = PromiscuousModeP;
+  GetLocalExtendedAddress = PibP.GetLocalExtendedAddress;
+  Packet = PibP; 
+  TimeCalc = PibP;
+  FrameUtility = PibP;
+
+  /* ----------------------- Scanning (MLME-SCAN) ----------------------- */
+
+  components new RadioClientC(RADIO_CLIENT_SCAN) as ScanRadioClient;
+  PibP.MacReset -> ScanP;
+  ScanP.MLME_GET -> PibP;
+  ScanP.MLME_SET -> PibP.MLME_SET;
+  ScanP.EnergyDetection = EnergyDetection;
+  ScanP.RadioRx -> ScanRadioClient;
+  ScanP.RadioTx -> ScanRadioClient;
+  ScanP.Frame -> PibP;
+  ScanP.BeaconFrame -> PibP;
+  ScanP.RadioOff -> ScanRadioClient;
+  ScanP.ScanTimer = Timer1;
+  ScanP.TxFramePool -> TxFramePoolP;
+  ScanP.TxControlPool -> TxControlPoolP;
+  ScanP.RadioToken -> ScanRadioClient;
+  ScanP.Leds = Leds;
+  ScanP.FrameUtility -> PibP;
+
+  /* -------------------- Responding to Active Scans  --------------------- */
+
+  PibP.MacReset -> BeaconRequestRxP;
+  BeaconRequestRxP.BeaconRequestRx -> DispatchP.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_BEACON_REQUEST];
+  BeaconRequestRxP.BeaconRequestResponseTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)];
+  BeaconRequestRxP.MLME_GET -> PibP;
+  BeaconRequestRxP.FrameUtility -> PibP;
+  BeaconRequestRxP.Frame -> PibP;
+
+  /* -------------------- Association (MLME-ASSOCIATE) -------------------- */
+
+  PibP.MacReset -> AssociateP;
+  AssociateP.AssociationRequestRx -> DispatchP.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_ASSOCIATION_REQUEST];
+  AssociateP.AssociationRequestTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)];
+  AssociateP.AssociationResponseExtracted -> DispatchP.FrameExtracted[FC1_FRAMETYPE_CMD + CMD_FRAME_ASSOCIATION_RESPONSE];
+  AssociateP.AssociationResponseTx -> IndirectTxP.FrameTx[unique(INDIRECT_TX_CLIENT)];
+  AssociateP.DataRequest -> PollP.DataRequest[ASSOCIATE_POLL_CLIENT];
+  AssociateP.ResponseTimeout = Timer2;
+  AssociateP.TxFramePool -> TxFramePoolP;
+  AssociateP.TxControlPool -> TxControlPoolP;
+  AssociateP.MLME_GET -> PibP;
+  AssociateP.MLME_SET -> PibP.MLME_SET;
+  AssociateP.FrameUtility -> PibP;
+  AssociateP.Frame -> PibP;
+  AssociateP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress;
+
+  /* --------------- Disassociation (MLME-DISASSOCIATE) --------------- */
+
+  PibP.MacReset -> DisassociateP;
+  DisassociateP.DisassociationIndirectTx -> IndirectTxP.FrameTx[unique(INDIRECT_TX_CLIENT)];
+  DisassociateP.DisassociationDirectTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)];
+  DisassociateP.DisassociationToCoord -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)];
+  DisassociateP.DisassociationExtractedFromCoord -> 
+    DispatchP.FrameExtracted[FC1_FRAMETYPE_CMD + CMD_FRAME_DISASSOCIATION_NOTIFICATION];
+  DisassociateP.DisassociationRxFromDevice -> 
+    DispatchP.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_DISASSOCIATION_NOTIFICATION];
+  DisassociateP.TxFramePool -> TxFramePoolP;
+  DisassociateP.TxControlPool -> TxControlPoolP;
+  DisassociateP.MLME_GET -> PibP;
+  DisassociateP.MLME_SET -> PibP;
+  DisassociateP.FrameUtility -> PibP;
+  DisassociateP.Frame -> PibP;
+  DisassociateP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress;
+
+  /* ------------------ Data Transmission (MCPS-DATA) ------------------- */
+
+  DataP.DeviceCapTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)];
+  DataP.CoordCapTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)];
+  DataP.DeviceCapRx -> PollP.DataRx;                          
+  DataP.DeviceCapRx -> PromiscuousModeP.FrameRx;              
+  DataP.DeviceCapRx -> DispatchP.FrameRx[FC1_FRAMETYPE_DATA]; 
+  DataP.TxFramePool -> TxFramePoolP;
+  DataP.IndirectTx -> IndirectTxP.FrameTx[unique(INDIRECT_TX_CLIENT)];
+  DataP.FrameUtility -> PibP;
+  DataP.Frame -> PibP;
+  DataP.PurgeDirect -> DispatchQueueP;
+  DataP.PurgeIndirect -> IndirectTxP;
+  DataP.MLME_GET -> PibP;
+  DataP.Packet -> PibP;
+  DataP.Leds = Leds;
+
+  /* ------------------------ Polling (MLME-POLL) ----------------------- */
+
+  PibP.MacReset -> PollP;
+  PollP.PollTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)];
+  PollP.DataExtracted -> DispatchP.FrameExtracted[FC1_FRAMETYPE_DATA];
+  PollP.FrameUtility -> PibP;
+  PollP.TxFramePool -> TxFramePoolP;
+  PollP.TxControlPool -> TxControlPoolP;
+  PollP.MLME_GET -> PibP;
+  PollP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress;
+
+  /* ---------------------- Indirect transmission ----------------------- */
+
+  PibP.MacReset -> IndirectTxP;
+  IndirectTxP.CoordCapTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)];
+  IndirectTxP.DataRequestRx -> DispatchP.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_DATA_REQUEST];
+  IndirectTxP.MLME_GET -> PibP;
+  IndirectTxP.IEEE154Frame -> PibP;
+  IndirectTxP.IndirectTxTimeout = Timer3;
+  IndirectTxP.TimeCalc -> PibP;
+  IndirectTxP.Leds = Leds;
+
+  /* ---------------------------- Realignment --------------------------- */
+
+  PibP.MacReset -> CoordRealignmentP;
+  CoordRealignmentP.CoordRealignmentTx -> DispatchQueueP.FrameTx[unique(CAP_TX_CLIENT)];
+  CoordRealignmentP.OrphanNotificationRx -> DispatchP.FrameRx[FC1_FRAMETYPE_CMD + CMD_FRAME_ORPHAN_NOTIFICATION];
+  CoordRealignmentP.FrameUtility -> PibP;
+  CoordRealignmentP.Frame -> PibP;
+  CoordRealignmentP.TxFramePool -> TxFramePoolP;
+  CoordRealignmentP.TxControlPool -> TxControlPoolP;
+  CoordRealignmentP.MLME_GET -> PibP;
+  CoordRealignmentP.LocalExtendedAddress -> PibP.GetLocalExtendedAddress;
+
+  /* --------------------- DispatchP -------------------- */
+
+  PibP.DispatchReset -> DispatchP;
+  PibP.DispatchQueueReset -> DispatchQueueP;
+  DispatchQueueP.Queue -> DispatchQueueC;
+  DispatchQueueP.FrameTxCsma -> DispatchP;
+  
+  components new RadioClientC(unique(IEEE802154_RADIO_RESOURCE)) as DispatchRadioClient;
+  PibP.DispatchReset -> DispatchP;
+  DispatchP.IndirectTxWaitTimer = Timer4;
+  DispatchP.RadioToken -> DispatchRadioClient;
+  DispatchP.SetMacSuperframeOrder -> PibP.SetMacSuperframeOrder;
+  DispatchP.SetMacPanCoordinator -> PibP.SetMacPanCoordinator;
+  DispatchP.IsRxEnableActive -> RxEnableP.IsRxEnableActive;
+  DispatchP.RadioTokenRequested -> DispatchRadioClient;
+  DispatchP.IsRadioTokenRequested -> PibP.IsRadioTokenRequested; // fan out...
+  DispatchP.IsRadioTokenRequested -> PromiscuousModeP.IsRadioTokenRequested;
+  DispatchP.IsRadioTokenRequested -> ScanP.IsRadioTokenRequested;
+  DispatchP.GetIndirectTxFrame -> IndirectTxP;
+  DispatchP.RxEnableStateChange -> RxEnableP.RxEnableStateChange;  
+  DispatchP.PIBUpdateMacRxOnWhenIdle -> PibP.PIBUpdate[IEEE154_macRxOnWhenIdle];
+  DispatchP.FrameUtility -> PibP;
+  DispatchP.UnslottedCsmaCa -> DispatchRadioClient;
+  DispatchP.RadioRx -> DispatchRadioClient;
+  DispatchP.RadioOff -> DispatchRadioClient;
+  DispatchP.MLME_GET -> PibP;
+  DispatchP.MLME_SET -> PibP.MLME_SET;
+  DispatchP.TimeCalc -> PibP;
+  DispatchP.Leds = Leds;
+
+  /* -------------------------- promiscuous mode ------------------------ */
+
+  components new RadioClientC(RADIO_CLIENT_PROMISCUOUSMODE) as PromiscuousModeRadioClient;
+  PibP.MacReset -> PromiscuousModeP;
+  PromiscuousModeP.RadioToken -> PromiscuousModeRadioClient;
+  PromiscuousModeP.PromiscuousRx -> PromiscuousModeRadioClient;
+  PromiscuousModeP.RadioOff -> PromiscuousModeRadioClient;
+  PromiscuousModeP.RadioPromiscuousMode = RadioPromiscuousMode;
+
+  /* --------------------------- MLME-RX-ENABLE  ------------------------ */
+
+  PibP.MacReset -> RxEnableP;
+  RxEnableP.TimeCalc -> PibP.TimeCalc;
+  RxEnableP.WasRxEnabled -> DispatchP.WasRxEnabled;
+  RxEnableP.WasRxEnabled -> DispatchP.WasRxEnabled;
+  RxEnableP.RxEnableTimer = Timer5;
+
+  /* ------------------------------- PIB -------------------------------- */
+
+  components new RadioClientC(RADIO_CLIENT_PIB) as PibRadioClient;
+  PIBUpdate = PibP;
+  MainC.SoftwareInit -> PibP.LocalInit;
+  PibP.RadioControl = PhySplitControl;
+  PibP.Random = Random; 
+  PibP.PromiscuousModeGet -> PromiscuousModeP; 
+  PibP.LocalTime = LocalTime;
+  PibP.RadioToken -> PibRadioClient;
+  PibP.RadioOff -> PibRadioClient;
+
+  /* ------------------------- Radio Control ---------------------------- */
+
+  RadioControlP.PhyTx = RadioTx;
+  RadioControlP.PhyUnslottedCsmaCa = UnslottedCsmaCa;
+  RadioControlP.PhyRx = RadioRx;
+  RadioControlP.PhyRadioOff = RadioOff;
+  RadioControlP.RadioPromiscuousMode -> PromiscuousModeP;
+  RadioControlP.Leds = Leds;
+}
diff --git a/tos/lib/mac/tkn154/TKN154_MAC.h b/tos/lib/mac/tkn154/TKN154_MAC.h
new file mode 100644
index 00000000..3bb9b1f8
--- /dev/null
+++ b/tos/lib/mac/tkn154/TKN154_MAC.h
@@ -0,0 +1,350 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Date: 2009-05-28 09:52:54 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __TKN154_MAC_H
+#define __TKN154_MAC_H
+
+#include "TKN154.h"
+#include "TKN154_PHY.h"
+#include "TKN154_platform.h"
+
+/****************************************************
+ * IEEE 802.15.4 PAN information base identifiers
+ **/
+
+enum {
+  // PHY Sublayer PIB
+  IEEE154_phyCurrentChannel          = 0x00,
+  IEEE154_phyChannelsSupported       = 0x01,
+  IEEE154_phyTransmitPower           = 0x02,
+  IEEE154_phyCCAMode                 = 0x03,
+  IEEE154_phyCurrentPage             = 0x04,
+  IEEE154_phyMaxFrameDuration        = 0x05,
+  IEEE154_phySHRDuration             = 0x06,
+  IEEE154_phySymbolsPerOctet         = 0x07,
+
+  // MAC Sublayer PIB
+  IEEE154_macAckWaitDuration         = 0x40,
+  IEEE154_macAssociatedPANCoord      = 0x56,
+  IEEE154_macAssociationPermit       = 0x41,
+  IEEE154_macAutoRequest             = 0x42,
+  IEEE154_macBattLifeExt             = 0x43,
+  IEEE154_macBattLifeExtPeriods      = 0x44,
+  IEEE154_macBeaconPayload           = 0x45,
+  IEEE154_macBeaconPayloadLength     = 0x46,
+  IEEE154_macBeaconOrder             = 0x47,
+  IEEE154_macBeaconTxTime            = 0x48,
+  IEEE154_macBSN                     = 0x49,
+  IEEE154_macCoordExtendedAddress    = 0x4A,
+  IEEE154_macCoordShortAddress       = 0x4B,
+  IEEE154_macDSN                     = 0x4C,
+  IEEE154_macGTSPermit               = 0x4D,
+  IEEE154_macMaxBE                   = 0x57,
+  IEEE154_macMaxCSMABackoffs         = 0x4E,
+  IEEE154_macMaxFrameTotalWaitTime   = 0x58,
+  IEEE154_macMaxFrameRetries         = 0x59,
+  IEEE154_macMinBE                   = 0x4F,
+  IEEE154_macMinLIFSPeriod           = 0xA0,
+  IEEE154_macMinSIFSPeriod           = 0xA1,
+  IEEE154_macPANId                   = 0x50,
+  IEEE154_macPromiscuousMode         = 0x51,
+  IEEE154_macResponseWaitTime        = 0x5A,
+  IEEE154_macRxOnWhenIdle            = 0x52,
+  IEEE154_macSecurityEnabled         = 0x5D,
+  IEEE154_macShortAddress            = 0x53,
+  IEEE154_macSuperframeOrder         = 0x54,
+  IEEE154_macSyncSymbolOffset        = 0x5B,
+  IEEE154_macTimestampSupported      = 0x5C,
+  IEEE154_macTransactionPersistenceTime = 0x55,
+
+  // custom attributes (not present in the standard PIB)
+  IEEE154_macPanCoordinator = 0xF0,
+};
+
+enum {
+  // MAC header indices 
+  MHR_INDEX_FC1     = 0,
+  MHR_INDEX_FC2     = 1,
+  MHR_INDEX_SEQNO   = 2,
+  MHR_INDEX_ADDRESS = 3,
+  MHR_MAX_LEN       = 23,
+  
+  // Frame Control field in MHR
+  FC1_FRAMETYPE_BEACON       = 0x00,
+  FC1_FRAMETYPE_DATA         = 0x01,
+  FC1_FRAMETYPE_ACK          = 0x02,
+  FC1_FRAMETYPE_CMD          = 0x03,
+  FC1_FRAMETYPE_MASK         = 0x07,
+
+  FC1_SECURITY_ENABLED        = 0x08,
+  FC1_FRAME_PENDING           = 0x10,
+  FC1_ACK_REQUEST             = 0x20,
+  FC1_PAN_ID_COMPRESSION      = 0x40,
+
+  FC2_DEST_MODE_SHORT         = 0x08,
+  FC2_DEST_MODE_EXTENDED      = 0x0c,
+  FC2_DEST_MODE_MASK          = 0x0c,
+  FC2_DEST_MODE_OFFSET        = 2,
+
+  FC2_SRC_MODE_SHORT          = 0x80,
+  FC2_SRC_MODE_EXTENDED       = 0xc0,
+  FC2_SRC_MODE_MASK           = 0xc0,
+  FC2_SRC_MODE_OFFSET         = 6,
+
+  FC2_FRAME_VERSION_1         = 0x10,
+  FC2_FRAME_VERSION_2         = 0x20,
+  FC2_FRAME_VERSION_MASK      = 0x30,
+};
+
+/** some unique strings */
+#define SYNC_POLL_CLIENT unique("PollP.client")
+#define ASSOCIATE_POLL_CLIENT unique("PollP.client")
+#define CAP_TX_CLIENT "CapQueueP.FrameTx.client"
+#define INDIRECT_TX_CLIENT "IndirectTx.client"
+#define IEEE802154_RADIO_RESOURCE "RadioRxTxP.resource"
+
+enum {
+  // The following identfiers map to components that access the radio
+  // via RadioClientC(). They are used as parameters for RadioClientC(),
+  // the TransferableResource.transferTo() command and in
+  // the TransferableResource.transferredFrom() event
+
+  RADIO_CLIENT_SCAN = unique(IEEE802154_RADIO_RESOURCE),
+  RADIO_CLIENT_PIB = unique(IEEE802154_RADIO_RESOURCE),
+  RADIO_CLIENT_PROMISCUOUSMODE = unique(IEEE802154_RADIO_RESOURCE),
+
+  RADIO_CLIENT_BEACONTRANSMIT = unique(IEEE802154_RADIO_RESOURCE),
+  RADIO_CLIENT_COORDBROADCAST = unique(IEEE802154_RADIO_RESOURCE),
+  RADIO_CLIENT_COORDCAP = unique(IEEE802154_RADIO_RESOURCE),
+  RADIO_CLIENT_COORDCFP = unique(IEEE802154_RADIO_RESOURCE),
+  RADIO_CLIENT_COORD_INACTIVE_PERIOD = unique(IEEE802154_RADIO_RESOURCE),
+
+  RADIO_CLIENT_BEACONSYNCHRONIZE = unique(IEEE802154_RADIO_RESOURCE),
+  RADIO_CLIENT_DEVICECAP = unique(IEEE802154_RADIO_RESOURCE),
+  RADIO_CLIENT_DEVICECFP = unique(IEEE802154_RADIO_RESOURCE),
+  RADIO_CLIENT_DEVICE_INACTIVE_PERIOD = unique(IEEE802154_RADIO_RESOURCE),
+};
+
+enum {
+  // parameter for the generic DispatchSlottedCsmaP
+  OUTGOING_SUPERFRAME,
+  INCOMING_SUPERFRAME,
+};
+
+/****************************************************
+ * Default time-related constants for beacon-enabled PANs,
+ * these may be overridden by platform-specific constants.
+ * */   
+
+#ifndef IEEE154_MAX_BEACON_JITTER
+  // will start to listen for a beacon MAX_BEACON_JITTER_TIME(BO) symbols  
+  // before its expected arrival, where BO is the current beacon order 
+  // (here --by default-- BO is ignored)
+  #define IEEE154_MAX_BEACON_JITTER(BO) 20
+#endif
+
+#ifndef IEEE154_MAX_BEACON_LISTEN_TIME
+  // maximum time to listen for a beacon after its expected arrival,
+  // before it is declared as missed
+  #define IEEE154_MAX_BEACON_LISTEN_TIME(BO) (128 * IEEE154_SYMBOLS_PER_OCTET + IEEE154_MAX_BEACON_JITTER(BO))
+#endif
+
+typedef struct {
+  uint8_t length;   // top bit denotes -> promiscuous mode
+  uint8_t mhr[MHR_MAX_LEN];  
+} ieee154_header_t;
+
+typedef struct {
+  uint8_t rssi;
+  uint8_t linkQuality;
+  uint32_t timestamp;
+} ieee154_metadata_t;
+
+typedef struct
+{
+  uint8_t client;
+  uint8_t handle;
+  ieee154_header_t *header;
+  uint8_t headerLen;
+  uint8_t *payload;
+  uint8_t payloadLen;
+  ieee154_metadata_t *metadata;
+} ieee154_txframe_t;
+
+typedef struct
+{
+  ieee154_header_t header;
+  ieee154_metadata_t metadata;
+} ieee154_txcontrol_t;
+
+typedef struct ieee154_csma {
+  uint8_t BE;                 // initial backoff exponent
+  uint8_t macMaxBE;           // maximum backoff exponent
+  uint8_t macMaxCsmaBackoffs; // maximum number of allowed backoffs
+  uint8_t NB;                 // number of backoff during current transmission
+} ieee154_csma_t;
+
+typedef struct {
+  ieee154_txframe_t *frame;
+  ieee154_csma_t csma;
+  uint32_t transactionTime;
+} ieee154_cap_frame_backup_t;
+
+#define MHR(x) (((ieee154_header_t*) (x)->header)->mhr)
+
+// COMMAND frames
+enum {
+  CMD_FRAME_ASSOCIATION_REQUEST          = 1,
+  CMD_FRAME_ASSOCIATION_RESPONSE         = 2,
+  CMD_FRAME_DISASSOCIATION_NOTIFICATION  = 3,
+  CMD_FRAME_DATA_REQUEST                 = 4,
+  CMD_FRAME_PAN_ID_CONFLICT_NOTIFICATION = 5,
+  CMD_FRAME_ORPHAN_NOTIFICATION          = 6,
+  CMD_FRAME_BEACON_REQUEST               = 7,
+  CMD_FRAME_COORDINATOR_REALIGNMENT      = 8,
+  CMD_FRAME_GTS_REQUEST                  = 9
+};
+
+enum {
+  // MAC payload fields inside a beacon frame
+  BEACON_INDEX_SF_SPEC1 = 0,
+  BEACON_INDEX_SF_SPEC2 = 1,
+  BEACON_INDEX_GTS_SPEC = 2,
+
+  SF_SPEC1_BO_MASK = 0x0F,
+  SF_SPEC1_BO_OFFSET = 0,
+  SF_SPEC1_SO_MASK = 0xF0,
+  SF_SPEC1_SO_OFFSET = 4,
+
+  SF_SPEC2_FINAL_CAPSLOT_MASK = 0x0F,
+  SF_SPEC2_FINAL_CAPSLOT_OFFSET = 0,
+  SF_SPEC2_BATT_LIFE_EXT = 0x10,
+  SF_SPEC2_PAN_COORD = 0x40,
+  SF_SPEC2_ASSOCIATION_PERMIT = 0x80,
+
+  GTS_DESCRIPTOR_COUNT_MASK = 0x07,
+  GTS_DESCRIPTOR_COUNT_OFFSET = 0,
+  GTS_LENGTH_MASK = 0xF0,
+  GTS_LENGTH_OFFSET = 4,
+  GTS_SPEC_PERMIT = 0x80,
+  
+  PENDING_ADDRESS_SHORT_MASK = 0x07,
+  PENDING_ADDRESS_EXT_MASK = 0x70,
+};
+
+enum {
+  // PHY sublayer constants
+  IEEE154_aTurnaroundTime              = 12,
+
+  FRAMECTL_LENGTH_MASK                 = 0x7F, // "length" member in ieee154_header_t
+  FRAMECTL_PROMISCUOUS                 = 0x80, // "length" member in ieee154_header_t
+};
+#define IEEE154_SUPPORTED_CHANNELPAGE  (IEEE154_SUPPORTED_CHANNELS >> 27)
+
+enum {
+  // MAC sublayer constants
+  IEEE154_aNumSuperframeSlots          = 16,
+  IEEE154_aMaxMPDUUnsecuredOverhead    = 25,
+  IEEE154_aMinMPDUOverhead             = 9,
+  IEEE154_aBaseSlotDuration            = 60,
+  IEEE154_aBaseSuperframeDuration      = (IEEE154_aBaseSlotDuration * IEEE154_aNumSuperframeSlots),
+  IEEE154_aGTSDescPersistenceTime      = 4,
+  IEEE154_aMaxBeaconOverhead           = 75,
+  IEEE154_aMaxBeaconPayloadLength      = (IEEE154_aMaxPHYPacketSize - IEEE154_aMaxBeaconOverhead),
+  IEEE154_aMaxLostBeacons              = 4,
+  IEEE154_aMaxMACSafePayloadSize       = (IEEE154_aMaxPHYPacketSize -  IEEE154_aMaxMPDUUnsecuredOverhead),
+  IEEE154_aMaxMACPayloadSize           = (IEEE154_aMaxPHYPacketSize -  IEEE154_aMinMPDUOverhead),
+  IEEE154_aMaxSIFSFrameSize            = 18,
+  IEEE154_aMinCAPLength                = 440,
+  IEEE154_aUnitBackoffPeriod           = 20,
+};
+
+// combine function for IsRadioTokenRequested (GetNow) interface
+typedef bool token_requested_t __attribute__((combine(rcombine)));
+token_requested_t rcombine(token_requested_t r1, token_requested_t r2)
+{
+  return r1 || r2;
+}
+
+#ifdef TKN154_DEBUG
+
+  /****************************************************************** 
+   * ATTENTION! Debugging over serial is a lot of overhead. To
+   * keep it simple, here are the rules you have to follow when
+   * using the dbg_serial() macro:
+   *
+   * - dbg_serial() is used like dbg(), i.e. you pass it at least
+   *   two strings, the first one describing the component/file,
+   *   the second is a format string (like in printf())
+   * - following the second string, there may be zero up to 
+   *   two parameters -- these must be (cast to) uint32_t and
+   *   the format specifier must be "%lu", e.g.
+   *   dbg_serial("MyComponentP", "Value: %lu\n", (uint32_t) val);
+   * - both strings must be constants (pointers always valid)
+   * - no data is sent over serial, unless dbg_serial_flush() is
+   *   called; try to call it when the system is idle or at least
+   *   when no time-critical operations are pending; on TelosB
+   *   you can also press the user button to trigger a flush
+   * - on the PC use the printf java client to display the debug
+   *   output (see tinyos-2.x/apps/tests/TestPrintf/README.txt);
+   *   the output format is component:line-in-source-code:text
+   *
+   * The ASSERT(X) macro is used to test for errors. If X evaluates 
+   * to zero, then 3 leds start blinking simulataneously (about 2Hz)
+   * and the node *continuously* outputs over serial the filename/line
+   * where the (first) ASSERT has failed. This means, even if your
+   * TelosB was not attached to your PC while the ASSERT failed you
+   * can typically still pull the information out later.
+   *
+   * When TKN154_DEBUG is not defined (which is the default), then
+   * dbg_serial() maps to dbg(), i.e. is completely removed unless 
+   * the platform is TOSSIM, and in the ASSERT(X) statement X is 
+   * evaluated/executed, but the result is ignored.
+   **/
+
+  /* -> functions are defined in DebugP.nc */
+  void tkn154_assert(bool val, const char *filename, uint16_t line, const char *func);
+  void tkn154_dbg_serial(const char *filename, uint16_t line, ...);
+  void tkn154_dbg_serial_flush();
+  #define ASSERT(X) tkn154_assert(X, __FILE__,__LINE__,__FUNCTION__)
+  #define dbg_serial(m, ...) tkn154_dbg_serial(m, __LINE__,__VA_ARGS__)
+  #define dbg_serial_flush() tkn154_dbg_serial_flush()
+#else
+  // Note: in an ASSERT(X) the X must always be evaluated/executed!
+  #define ASSERT(X) while(!(X)){ break;}
+  #define dbg_serial(m, ...) dbg(m, __VA_ARGS__)
+  #define dbg_serial_flush()
+#endif
+
+#endif // __TKN154_MAC_H
diff --git a/tos/lib/mac/tkn154/TKN154_PIB.h b/tos/lib/mac/tkn154/TKN154_PIB.h
new file mode 100644
index 00000000..5f294f8a
--- /dev/null
+++ b/tos/lib/mac/tkn154/TKN154_PIB.h
@@ -0,0 +1,235 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Date: 2009-03-04 18:31:37 $
+ * @author Torsten Halbhuebner <hhuebner@tkn.tu-berlin.de>
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __TKN154_PIB_H
+#define __TKN154_PIB_H
+
+/**************************************************** 
+ * IEEE 802.15.4 PAN information base (PIB)
+ */
+
+
+typedef struct ieee154_PIB {
+
+  /** bool types */
+   
+  // 0x41
+  ieee154_macAssociationPermit_t macAssociationPermit;
+  // 0x42
+  ieee154_macAutoRequest_t macAutoRequest;
+  // 0x43
+  ieee154_macBattLifeExt_t macBattLifeExt;
+  // 0x4D
+  ieee154_macGTSPermit_t macGTSPermit;
+  // 0x51
+  ieee154_macPromiscuousMode_t macPromiscuousMode;
+  // 0x52
+  ieee154_macRxOnWhenIdle_t macRxOnWhenIdle;
+  // 0x56
+  ieee154_macAssociatedPANCoord_t macAssociatedPANCoord;
+  // 0x5D
+  ieee154_macSecurityEnabled_t macSecurityEnabled;
+  // custom attribute
+  ieee154_macPanCoordinator_t macPanCoordinator;
+
+  /** uint8_t types */
+
+  // 0x00
+  ieee154_phyCurrentChannel_t phyCurrentChannel;
+  // 0x02
+  ieee154_phyTransmitPower_t phyTransmitPower;
+  // 0x03
+  ieee154_phyCCAMode_t phyCCAMode;
+  // 0x04
+  ieee154_phyCurrentPage_t phyCurrentPage;
+  // 0x44
+  ieee154_macBattLifeExtPeriods_t macBattLifeExtPeriods;
+  // 0x46
+  ieee154_macBeaconPayloadLength_t macBeaconPayloadLength;
+  // 0x47
+  ieee154_macBeaconOrder_t macBeaconOrder;
+  // 0x49
+  ieee154_macBSN_t macBSN;
+  // 0x4C
+  ieee154_macDSN_t macDSN;
+  // 0x4E
+  ieee154_macMaxCSMABackoffs_t macMaxCSMABackoffs;
+  // 0x4F
+  ieee154_macMinBE_t macMinBE;
+  // 0x54
+  ieee154_macSuperframeOrder_t macSuperframeOrder;
+  // 0x57
+  ieee154_macMaxBE_t macMaxBE;
+  // 0x59
+  ieee154_macMaxFrameRetries_t macMaxFrameRetries;
+  // 0x5a
+  ieee154_macResponseWaitTime_t macResponseWaitTime;
+
+  /** larger than uint8_t types */
+
+  // 0x4B
+  ieee154_macCoordShortAddress_t macCoordShortAddress;
+  // 0x50
+  ieee154_macPANId_t macPANId;
+  // 0x53
+  ieee154_macShortAddress_t macShortAddress;
+  // 0x55
+  ieee154_macTransactionPersistenceTime_t macTransactionPersistenceTime;
+
+  // TODO: check type
+  ieee154_macMaxFrameTotalWaitTime_t macMaxFrameTotalWaitTime;
+
+  ieee154_macBeaconTxTime_t macBeaconTxTime;
+  // 0x4A
+  ieee154_macCoordExtendedAddress_t macCoordExtendedAddress;
+
+} ieee154_PIB_t;
+
+// PHY PIB default attributes
+#ifndef IEEE154_DEFAULT_CURRENTCHANNEL          
+  #define IEEE154_DEFAULT_CURRENTCHANNEL          26
+#endif
+#ifndef IEEE154_DEFAULT_CHANNELSSUPPORTED_PAGE0 
+  #define IEEE154_DEFAULT_CHANNELSSUPPORTED_PAGE0 0x07FFF800
+#endif
+#ifndef IEEE154_DEFAULT_CHANNELSSUPPORTED_PAGE1 
+  #define IEEE154_DEFAULT_CHANNELSSUPPORTED_PAGE1 0
+#endif
+#ifndef IEEE154_DEFAULT_CHANNELSSUPPORTED_PAGE2 
+  #define IEEE154_DEFAULT_CHANNELSSUPPORTED_PAGE2 0
+#endif
+#ifndef IEEE154_DEFAULT_CCAMODE                 
+  #define IEEE154_DEFAULT_CCAMODE                 3
+#endif
+#ifndef IEEE154_DEFAULT_CURRENTPAGE             
+  #define IEEE154_DEFAULT_CURRENTPAGE             0
+#endif
+#ifndef IEEE154_DEFAULT_TRANSMITPOWER_dBm       
+  #define IEEE154_DEFAULT_TRANSMITPOWER_dBm       0
+#endif
+
+// MAC PIB default attributes
+#ifndef IEEE154_DEFAULT_ASSOCIATEDPANCOORD      
+  #define IEEE154_DEFAULT_ASSOCIATEDPANCOORD      FALSE
+#endif
+#ifndef IEEE154_DEFAULT_ASSOCIATIONPERMIT       
+  #define IEEE154_DEFAULT_ASSOCIATIONPERMIT       FALSE
+#endif
+#ifndef IEEE154_DEFAULT_AUTOREQUEST             
+  #define IEEE154_DEFAULT_AUTOREQUEST             TRUE
+#endif
+#ifndef IEEE154_DEFAULT_BATTLIFEEXT             
+  #define IEEE154_DEFAULT_BATTLIFEEXT             FALSE
+#endif
+#ifndef IEEE154_DEFAULT_BATTLIFEEXTPERIODS      
+  #define IEEE154_DEFAULT_BATTLIFEEXTPERIODS      6
+#endif
+#ifndef IEEE154_DEFAULT_BEACONPAYLOAD           
+  #define IEEE154_DEFAULT_BEACONPAYLOAD           NULL
+#endif
+#ifndef IEEE154_DEFAULT_BEACONPAYLOADLENGTH     
+  #define IEEE154_DEFAULT_BEACONPAYLOADLENGTH     0
+#endif
+#ifndef IEEE154_DEFAULT_BEACONORDER             
+  #define IEEE154_DEFAULT_BEACONORDER             15
+#endif
+#ifndef IEEE154_DEFAULT_BEACONTXTIME            
+  #define IEEE154_DEFAULT_BEACONTXTIME            0
+#endif
+#ifndef IEEE154_DEFAULT_COORDSHORTADDRESS       
+  #define IEEE154_DEFAULT_COORDSHORTADDRESS       0xFFFF
+#endif
+#ifndef IEEE154_DEFAULT_GTSPERMIT               
+  #define IEEE154_DEFAULT_GTSPERMIT               TRUE
+#endif
+#ifndef IEEE154_DEFAULT_MAXBE                   
+  #define IEEE154_DEFAULT_MAXBE                   5
+#endif
+#ifndef IEEE154_DEFAULT_MAXCSMABACKOFFS         
+  #define IEEE154_DEFAULT_MAXCSMABACKOFFS         4
+#endif
+#ifndef IEEE154_DEFAULT_MAXFRAMETOTALWAITTIME   
+  #define IEEE154_DEFAULT_MAXFRAMETOTALWAITTIME   2626
+#endif
+#ifndef IEEE154_DEFAULT_MAXFRAMERETRIES         
+  #define IEEE154_DEFAULT_MAXFRAMERETRIES         3
+#endif
+#ifndef IEEE154_DEFAULT_MINBE                   
+  #define IEEE154_DEFAULT_MINBE                   3
+#endif
+#ifndef IEEE154_DEFAULT_MINLIFSPERIOD           
+  #define IEEE154_DEFAULT_MINLIFSPERIOD           40
+#endif
+#ifndef IEEE154_DEFAULT_MINSIFSPERIOD           
+  #define IEEE154_DEFAULT_MINSIFSPERIOD           12
+#endif
+#ifndef IEEE154_DEFAULT_PANID                   
+  #define IEEE154_DEFAULT_PANID                   0xFFFF
+#endif
+#ifndef IEEE154_DEFAULT_PROMISCUOUSMODE         
+  #define IEEE154_DEFAULT_PROMISCUOUSMODE         FALSE
+#endif
+#ifndef IEEE154_DEFAULT_RESPONSEWAITTIME        
+  #define IEEE154_DEFAULT_RESPONSEWAITTIME        32
+#endif
+#ifndef IEEE154_DEFAULT_RXONWHENIDLE            
+  #define IEEE154_DEFAULT_RXONWHENIDLE            FALSE
+#endif
+#ifndef IEEE154_DEFAULT_SECURITYENABLED         
+  #define IEEE154_DEFAULT_SECURITYENABLED         FALSE
+#endif
+#ifndef IEEE154_DEFAULT_SHORTADDRESS            
+  #define IEEE154_DEFAULT_SHORTADDRESS            0xFFFF
+#endif
+
+#ifndef IEEE154_DEFAULT_SUPERFRAMEORDER         
+  #define IEEE154_DEFAULT_SUPERFRAMEORDER         15
+#endif
+#ifndef IEEE154_DEFAULT_SYNCSYMBOLOFFSET        
+  #define IEEE154_DEFAULT_SYNCSYMBOLOFFSET        0
+#endif
+#ifndef IEEE154_DEFAULT_TIMESTAMPSUPPORTED      
+  #define IEEE154_DEFAULT_TIMESTAMPSUPPORTED      TRUE
+#endif
+#ifndef IEEE154_DEFAULT_TRANSACTIONPERSISTENCETIME  
+  #define IEEE154_DEFAULT_TRANSACTIONPERSISTENCETIME  0x01F4
+#endif
+#ifndef IEEE154_DEFAULT_MACPANCOORDINATOR  
+  #define IEEE154_DEFAULT_MACPANCOORDINATOR  FALSE
+#endif
+
+#define IEEE154_INVALID_TIMESTAMP (0xffffffff)
+
+#endif // __TKN154_PIB_H
diff --git a/tos/lib/mac/tkn154/dummies/NoAssociateP.nc b/tos/lib/mac/tkn154/dummies/NoAssociateP.nc
new file mode 100644
index 00000000..ac3aa28b
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoAssociateP.nc
@@ -0,0 +1,131 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:39 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /** Empty placeholder component for AssociateP. */
+
+#include "TKN154_MAC.h"
+
+module NoAssociateP
+{
+  provides
+  {
+    interface Init;
+    interface MLME_ASSOCIATE;
+    interface MLME_COMM_STATUS;
+  }
+  uses
+  {
+    interface FrameRx as AssociationRequestRx;
+    interface FrameTx as AssociationRequestTx;
+    interface FrameExtracted as AssociationResponseExtracted;
+    interface FrameTx as AssociationResponseTx;
+
+    interface DataRequest;
+    interface Timer<TSymbolIEEE802154> as ResponseTimeout;
+    interface Pool<ieee154_txframe_t> as TxFramePool;
+    interface Pool<ieee154_txcontrol_t> as TxControlPool;
+    interface MLME_GET;
+    interface MLME_SET;
+    interface FrameUtility;
+    interface IEEE154Frame as Frame;
+    interface Get<uint64_t> as LocalExtendedAddress;
+  }
+}
+implementation
+{
+
+  command error_t Init.init() { return SUCCESS; }
+
+  /* ------------------- MLME_ASSOCIATE Request ------------------- */
+
+  command ieee154_status_t MLME_ASSOCIATE.request  (
+                          uint8_t LogicalChannel,
+                          uint8_t ChannelPage,
+                          uint8_t CoordAddrMode,
+                          uint16_t CoordPANID,
+                          ieee154_address_t CoordAddress,
+                          ieee154_CapabilityInformation_t CapabilityInformation,
+                          ieee154_security_t *security
+                        )
+  {
+    return IEEE154_TRANSACTION_OVERFLOW;
+  }
+
+  event void AssociationRequestTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { }
+  
+  event void ResponseTimeout.fired() { }
+
+  event message_t* AssociationResponseExtracted.received(message_t* frame, ieee154_txframe_t *txFrame) { return frame; }
+
+  event void DataRequest.pollDone() { }
+
+  /* ------------------- MLME_ASSOCIATE Response ------------------- */
+
+  event message_t* AssociationRequestRx.received(message_t* frame) { return frame; }
+
+  command ieee154_status_t MLME_ASSOCIATE.response (
+                          uint64_t deviceAddress,
+                          uint16_t assocShortAddress,
+                          ieee154_association_status_t status,
+                          ieee154_security_t *security
+                        )
+  {
+    return IEEE154_TRANSACTION_OVERFLOW;
+  }
+
+  event void AssociationResponseTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { }
+
+  /* ------------------- Defaults ------------------- */
+
+  default event void MLME_ASSOCIATE.indication (
+                          uint64_t DeviceAddress,
+                          ieee154_CapabilityInformation_t CapabilityInformation,
+                          ieee154_security_t *security
+                        ){}
+  default event void MLME_ASSOCIATE.confirm    (
+                          uint16_t AssocShortAddress,
+                          uint8_t status,
+                          ieee154_security_t *security
+                        ){}
+  default event void MLME_COMM_STATUS.indication (
+                          uint16_t PANId,
+                          uint8_t SrcAddrMode,
+                          ieee154_address_t SrcAddr,
+                          uint8_t DstAddrMode,
+                          ieee154_address_t DstAddr,
+                          ieee154_status_t status,
+                          ieee154_security_t *security
+                        ){}
+}
diff --git a/tos/lib/mac/tkn154/dummies/NoBeaconSynchronizeP.nc b/tos/lib/mac/tkn154/dummies/NoBeaconSynchronizeP.nc
new file mode 100644
index 00000000..adb2682e
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoBeaconSynchronizeP.nc
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2009-03-24 12:56:47 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /** Empty placeholder component for BeaconSynchronizeP. */
+
+#include "TKN154_MAC.h"
+
+module NoBeaconSynchronizeP
+{
+  provides
+  {
+    interface Init as Reset;
+    interface MLME_SYNC;
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_SYNC_LOSS;
+    interface SuperframeStructure as IncomingSF;
+    interface GetNow<bool> as IsTrackingBeacons;
+    interface StdControl as TrackSingleBeacon;
+  }
+  uses
+  {
+    interface MLME_GET;
+    interface MLME_SET;
+    interface FrameUtility;
+    interface IEEE154BeaconFrame as BeaconFrame;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as TrackAlarm;
+    interface RadioRx as BeaconRx;
+    interface RadioOff;
+    interface DataRequest;
+    interface FrameRx as CoordRealignmentRx;
+    interface TransferableResource as RadioToken;
+    interface TimeCalc;
+    interface IEEE154Frame as Frame;
+    interface Leds;
+  }
+}
+implementation
+{
+  command error_t Reset.init() { return SUCCESS; }  
+
+  command ieee154_status_t MLME_SYNC.request  ( uint8_t logicalChannel, uint8_t channelPage, bool trackBeacon)
+  {
+    return IEEE154_TRANSACTION_OVERFLOW;
+  }
+
+  event void RadioToken.granted() { }
+
+  async event void RadioToken.transferredFrom(uint8_t fromClient) { call RadioToken.transferTo(RADIO_CLIENT_BEACONTRANSMIT); }
+
+  async event void RadioOff.offDone() { }
+
+  async event void BeaconRx.enableRxDone() { }
+
+  async event void TrackAlarm.fired() { }
+
+  event message_t* BeaconRx.received(message_t *frame) { return frame; }
+
+  command error_t TrackSingleBeacon.start()
+  {
+    return FAIL;
+  }
+
+  command error_t TrackSingleBeacon.stop()
+  {
+    return FAIL;
+  }
+  
+  /* -----------------------  SF Structure, etc. ----------------------- */
+
+  async command uint32_t IncomingSF.sfStartTime() { return 0; }
+  async command uint32_t IncomingSF.sfSlotDuration() { return 0; }
+  async command uint8_t IncomingSF.numCapSlots() { return 0; }
+  async command uint8_t IncomingSF.numGtsSlots() { return 0; }
+  async command uint16_t IncomingSF.battLifeExtDuration() { return 0; }
+  async command const uint8_t* IncomingSF.gtsFields() { return NULL; }
+  async command uint16_t IncomingSF.guardTime() { return 0; }
+  async command bool IncomingSF.isBroadcastPending() { return 0; }
+  async command uint32_t IncomingSF.beaconInterval() { return 0;}
+  async command bool IsTrackingBeacons.getNow() { return 0; }
+
+  event void DataRequest.pollDone(){}
+
+  default event message_t* MLME_BEACON_NOTIFY.indication (message_t* frame){return frame;}
+  default event void MLME_SYNC_LOSS.indication (
+                          ieee154_status_t lossReason,
+                          uint16_t panID,
+                          uint8_t logicalChannel,
+                          uint8_t channelPage,
+                          ieee154_security_t *security){}
+
+  event message_t* CoordRealignmentRx.received(message_t* frame) { return frame; }
+}
diff --git a/tos/lib/mac/tkn154/dummies/NoBeaconTransmitP.nc b/tos/lib/mac/tkn154/dummies/NoBeaconTransmitP.nc
new file mode 100644
index 00000000..092476e6
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoBeaconTransmitP.nc
@@ -0,0 +1,167 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.8 $
+ * $Date: 2009-12-14 16:46:49 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /** Empty placeholder component for BeaconTransmitP. */
+
+#include "TKN154_MAC.h"
+#include "TKN154_PHY.h"
+module NoBeaconTransmitP
+{
+  provides
+  {
+    interface Init as Reset;
+    interface MLME_START;
+    interface IEEE154TxBeaconPayload;
+    interface SuperframeStructure as OutgoingSF;
+    interface GetNow<bool> as IsSendingBeacons;
+  } uses {
+    interface Notify<bool> as GtsSpecUpdated;
+    interface Notify<bool> as PendingAddrSpecUpdated;
+    interface Notify<const void*> as PIBUpdate[uint8_t attributeID];
+    interface Alarm<TSymbolIEEE802154,uint32_t> as BeaconSendAlarm;
+    interface Timer<TSymbolIEEE802154> as BeaconPayloadUpdateTimer;
+    interface RadioOff;
+    interface RadioTx as BeaconTx;
+    interface MLME_GET;
+    interface MLME_SET;
+    interface TransferableResource as RadioToken;
+    interface FrameTx as RealignmentBeaconEnabledTx;
+    interface FrameTx as RealignmentNonBeaconEnabledTx;
+    interface FrameRx as BeaconRequestRx;
+    interface WriteBeaconField as GtsInfoWrite;
+    interface WriteBeaconField as PendingAddrWrite;
+    interface FrameUtility;
+    interface GetNow<bool> as IsTrackingBeacons;
+    interface SuperframeStructure as IncomingSF;
+    interface Set<ieee154_macSuperframeOrder_t> as SetMacSuperframeOrder;
+    interface Set<ieee154_macBeaconTxTime_t> as SetMacBeaconTxTime;
+    interface Set<ieee154_macPanCoordinator_t> as SetMacPanCoordinator;
+    interface GetSet<ieee154_txframe_t*> as GetSetRealignmentFrame;
+    interface GetNow<bool> as IsBroadcastReady; 
+    interface TimeCalc;
+    interface Random;
+    interface Leds;
+  }
+}
+implementation
+{
+  command error_t Reset.init() { return SUCCESS; }
+
+  command ieee154_status_t MLME_START.request  (
+                          uint16_t panID,
+                          uint8_t logicalChannel,
+                          uint8_t channelPage,
+                          uint32_t startTime,
+                          uint8_t beaconOrder,
+                          uint8_t superframeOrder,
+                          bool panCoordinator,
+                          bool batteryLifeExtension,
+                          bool coordRealignment,
+                          ieee154_security_t *coordRealignSecurity,
+                          ieee154_security_t *beaconSecurity)
+  {
+    return IEEE154_TRANSACTION_OVERFLOW;
+  }
+
+  event void RadioToken.granted() { }
+
+  async event void RadioToken.transferredFrom(uint8_t from) { call RadioToken.transferTo(RADIO_CLIENT_BEACONSYNCHRONIZE); }
+
+  async event void RadioOff.offDone() { }
+
+  async event void BeaconSendAlarm.fired() {}
+
+  async event void BeaconTx.transmitDone(ieee154_txframe_t *frame, error_t result){}
+
+  command error_t IEEE154TxBeaconPayload.setBeaconPayload(void *beaconPayload, uint8_t length) { return ESIZE; }
+
+  command const void* IEEE154TxBeaconPayload.getBeaconPayload() { return NULL; }
+
+  command uint8_t IEEE154TxBeaconPayload.getBeaconPayloadLength() {return 0; }
+
+  command error_t IEEE154TxBeaconPayload.modifyBeaconPayload(uint8_t offset, void *buffer, uint8_t bufferLength)
+  {
+    return ESIZE;
+  }
+
+  event void PIBUpdate.notify[uint8_t attributeID](const void* attributeValue)
+  {
+  }
+
+  event void PendingAddrSpecUpdated.notify(bool val)
+  {
+  }
+
+  event void GtsSpecUpdated.notify(bool val)
+  {
+  }
+
+  event void BeaconPayloadUpdateTimer.fired()
+  {
+  }
+
+  event void RealignmentBeaconEnabledTx.transmitDone(ieee154_txframe_t *frame, ieee154_status_t status)
+  {
+  }
+ 
+  event void RealignmentNonBeaconEnabledTx.transmitDone(ieee154_txframe_t *frame, ieee154_status_t status)
+  {
+  }
+
+  event message_t* BeaconRequestRx.received(message_t* frame)
+  {
+    return frame;
+  }
+
+  async command uint32_t OutgoingSF.sfStartTime() {return 0;}
+
+  async command uint32_t OutgoingSF.sfSlotDuration() {return 0;}
+
+  async command uint8_t OutgoingSF.numCapSlots() {return 0;}
+
+  async command uint8_t OutgoingSF.numGtsSlots() {return 0;}
+
+  async command uint16_t OutgoingSF.battLifeExtDuration() {return 0;}
+
+  async command const uint8_t* OutgoingSF.gtsFields() {return NULL;}
+
+  async command uint16_t OutgoingSF.guardTime() {return 0;}
+
+  async command bool OutgoingSF.isBroadcastPending() {return FALSE;}
+
+  async command uint32_t OutgoingSF.beaconInterval() { return 0;}
+
+  async command bool IsSendingBeacons.getNow() {return FALSE;}
+}
diff --git a/tos/lib/mac/tkn154/dummies/NoCoordBroadcastP.nc b/tos/lib/mac/tkn154/dummies/NoCoordBroadcastP.nc
new file mode 100644
index 00000000..1503af8b
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoCoordBroadcastP.nc
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-24 12:56:47 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /** Empty placeholder component for CoordBroadcastP. */
+
+#include "TKN154_MAC.h"
+module NoCoordBroadcastP
+{
+  provides
+  {
+    interface Init as Reset;
+    interface FrameTx as BroadcastDataFrame;
+    interface FrameTx as RealignmentTx;
+    interface GetNow<bool> as IsBroadcastReady; 
+  } uses {
+    interface Queue<ieee154_txframe_t*>; 
+    interface FrameTxNow as CapTransmitNow;
+    interface TransferableResource as RadioToken;
+    interface GetNow<bool> as BeaconFramePendingBit;
+    interface SuperframeStructure as OutgoingSF;
+    interface Leds;
+  }
+}
+implementation
+{
+
+  command error_t Reset.init() { return SUCCESS; }
+
+  command ieee154_status_t BroadcastDataFrame.transmit(ieee154_txframe_t *txFrame)
+  {
+    return IEEE154_TRANSACTION_OVERFLOW;
+  }
+
+  command ieee154_status_t RealignmentTx.transmit(ieee154_txframe_t *frame)
+  {
+    return IEEE154_TRANSACTION_OVERFLOW;
+  }
+
+  async command bool IsBroadcastReady.getNow()
+  {
+    return FALSE;
+  }
+
+  async event void RadioToken.transferredFrom(uint8_t fromClient)
+  {
+    call RadioToken.transferTo(RADIO_CLIENT_COORDCAP);
+  }
+
+  async event void CapTransmitNow.transmitNowDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+  }
+  event void RadioToken.granted(){ }
+}
diff --git a/tos/lib/mac/tkn154/dummies/NoCoordCfpP.nc b/tos/lib/mac/tkn154/dummies/NoCoordCfpP.nc
new file mode 100644
index 00000000..2a0d05f1
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoCoordCfpP.nc
@@ -0,0 +1,118 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.7 $
+ * $Date: 2009-03-24 12:56:47 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+ 
+/**
+ * The contention free period (CFP) in beacon mode, a.k.a. GTS, is not yet
+ * implemented - this is only an empty placeholder. In contrast to the CAP
+ * component the GTS component for an incoming superframe will probably be very
+ * different from the GTS for an outgoing superframe. That is why there are two
+ * separate placeholder components (DeviceCfpP and CoordCfpP) instead of one
+ * generic CfpP component. This component would deal with the GTS for an
+ * outgoing superframe, i.e. from the perspective of a coordinator.
+ */
+
+#include "TKN154_MAC.h"
+module NoCoordCfpP
+{
+  provides {
+    interface Init;
+    interface WriteBeaconField as GtsInfoWrite;
+    interface FrameTx as CfpTx;
+    interface Purge;
+  } uses {
+    interface TransferableResource as RadioToken;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as CfpSlotAlarm;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as CfpEndAlarm;
+    interface SuperframeStructure as OutgoingSF; 
+    interface RadioTx;
+    interface RadioRx;
+    interface RadioOff;
+    interface MLME_GET;
+    interface MLME_SET;
+  }
+}
+implementation
+{
+  command error_t Init.init()
+  {
+    // initialize any module variables
+    return SUCCESS;
+  }
+
+  command ieee154_status_t CfpTx.transmit(ieee154_txframe_t *data)
+  {
+    // send a frame in a GTS slot (triggered by MCPS_DATA.request())
+    return IEEE154_INVALID_GTS;
+  }
+
+  command ieee154_status_t Purge.purge(uint8_t msduHandle)
+  {
+    // request to purge a frame (triggered by MCPS_DATA.purge())
+    return IEEE154_INVALID_HANDLE; 
+  } 
+
+  async event void RadioToken.transferredFrom(uint8_t fromClient)
+  {
+    // the CFP has started, this component now owns the token -  
+    // because GTS is not implemented we pass it on
+    call RadioToken.transferTo(RADIO_CLIENT_COORD_INACTIVE_PERIOD);
+  }
+
+  async event void CfpEndAlarm.fired() {}
+
+  async event void CfpSlotAlarm.fired() {}
+
+  async event void RadioOff.offDone() {}
+
+  command uint8_t GtsInfoWrite.write(uint8_t *lastBytePtr, uint8_t maxlen)
+  {
+    if (maxlen == 0)
+      return 0;
+    else {
+      lastBytePtr[0] = 0; // GTS Specificationtos2
+      return 1;
+    }
+  }
+
+  async event void RadioTx.transmitDone(ieee154_txframe_t *frame, error_t result){}
+
+  async event void RadioRx.enableRxDone(){} 
+  event message_t* RadioRx.received(message_t *frame) {return frame;}
+
+  event void RadioToken.granted()
+  {
+    ASSERT(0); // should never happen, because we never call RadioToken.request()
+  }  
+}
diff --git a/tos/lib/mac/tkn154/dummies/NoCoordRealignmentP.nc b/tos/lib/mac/tkn154/dummies/NoCoordRealignmentP.nc
new file mode 100644
index 00000000..989bb469
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoCoordRealignmentP.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:40 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /** Empty placeholder component for CoordRealignmentP. */
+
+#include "TKN154_MAC.h"
+module NoCoordRealignmentP
+{
+  provides
+  {
+    interface Init;
+    interface MLME_ORPHAN;
+    interface MLME_COMM_STATUS;
+    interface GetSet<ieee154_txframe_t*> as GetSetRealignmentFrame;
+  }
+  uses
+  {
+    interface FrameTx as CoordRealignmentTx;
+    interface FrameRx as OrphanNotificationRx;
+    interface FrameUtility;
+    interface MLME_GET;
+    interface IEEE154Frame as Frame;
+    interface Pool<ieee154_txframe_t> as TxFramePool;
+    interface Pool<ieee154_txcontrol_t> as TxControlPool;
+    interface Get<uint64_t> as LocalExtendedAddress;
+  }
+}
+implementation
+{
+
+  command error_t Init.init() { return SUCCESS; }
+
+  command ieee154_txframe_t* GetSetRealignmentFrame.get() { return NULL; }
+
+  command void GetSetRealignmentFrame.set(ieee154_txframe_t*  frame) { }
+
+  event message_t* OrphanNotificationRx.received(message_t* frame) { return frame; }
+
+  command ieee154_status_t MLME_ORPHAN.response (
+                          uint64_t OrphanAddress,
+                          uint16_t ShortAddress,
+                          bool AssociatedMember,
+                          ieee154_security_t *security
+                        )
+  {
+    return IEEE154_TRANSACTION_OVERFLOW;
+  }
+  
+  event void CoordRealignmentTx.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status)
+  {
+  }
+
+  default event void MLME_COMM_STATUS.indication (
+                          uint16_t PANId,
+                          uint8_t SrcAddrMode,
+                          ieee154_address_t SrcAddr,
+                          uint8_t DstAddrMode,
+                          ieee154_address_t DstAddr,
+                          ieee154_status_t status,
+                          ieee154_security_t *security
+                        ){}
+
+  default event void MLME_ORPHAN.indication (
+                          uint64_t OrphanAddress,
+                          ieee154_security_t *security
+                        ){}
+}
diff --git a/tos/lib/mac/tkn154/dummies/NoDeviceCfpP.nc b/tos/lib/mac/tkn154/dummies/NoDeviceCfpP.nc
new file mode 100644
index 00000000..afcc1a1c
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoDeviceCfpP.nc
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.7 $
+ * $Date: 2009-03-24 12:56:47 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * The contention free period (CFP) in beacon mode, a.k.a. GTS, is not yet
+ * implemented - this is only an empty placeholder. In contrast to the CAP
+ * component the GTS component for an incoming superframe will probably be very
+ * different from the GTS for an outgoing superframe. That is why there are two
+ * separate placeholder components (DeviceCfpP and CoordCfpP) instead of one
+ * generic CfpP component. This component would deal with the GTS for an
+ * incoming superframe, i.e. from the perspective of a device.
+ */
+
+#include "TKN154_MAC.h"
+module NoDeviceCfpP
+{
+  provides {
+    interface Init;
+    interface FrameTx as CfpTx;
+    interface Purge;
+  } uses {
+    interface TransferableResource as RadioToken;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as CfpSlotAlarm;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as CfpEndAlarm;
+    interface SuperframeStructure as IncomingSF; 
+    interface RadioTx;
+    interface RadioRx;
+    interface RadioOff;
+    interface MLME_GET;
+    interface MLME_SET;
+  }
+}
+implementation
+{
+  command error_t Init.init()
+  {
+    // initialize any module variables
+    return SUCCESS;
+  }
+
+  command ieee154_status_t CfpTx.transmit(ieee154_txframe_t *data)
+  {
+    // request to send a frame in a GTS slot (triggered by MCPS_DATA.request())
+    return IEEE154_INVALID_GTS;
+  }
+
+  command ieee154_status_t Purge.purge(uint8_t msduHandle)
+  {
+    // request to purge a frame (triggered by MCPS_DATA.purge())
+    return IEEE154_INVALID_HANDLE; 
+  } 
+
+  async event void RadioToken.transferredFrom(uint8_t fromClient)
+  { 
+    // the CFP has started, this component now owns the token -  
+    // because GTS is not implemented we pass it on
+    call RadioToken.transferTo(RADIO_CLIENT_DEVICE_INACTIVE_PERIOD);
+  }
+
+  async event void CfpEndAlarm.fired() {}
+
+  async event void CfpSlotAlarm.fired() {}
+
+  async event void RadioOff.offDone() {}
+
+  async event void RadioTx.transmitDone(ieee154_txframe_t *frame, error_t result){}
+  async event void RadioRx.enableRxDone(){} 
+  event message_t* RadioRx.received(message_t *frame){return frame;} 
+
+  event void RadioToken.granted()
+  {
+    ASSERT(0); // should never happen, because we never call RadioToken.request()
+  }   
+}
diff --git a/tos/lib/mac/tkn154/dummies/NoDisassociateP.nc b/tos/lib/mac/tkn154/dummies/NoDisassociateP.nc
new file mode 100644
index 00000000..f5f71c18
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoDisassociateP.nc
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-10-16 16:18:29 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /** Empty placeholder component for DisassociateP. */
+
+#include "TKN154_MAC.h"
+
+module NoDisassociateP
+{
+  provides
+  {
+    interface Init;
+    interface MLME_DISASSOCIATE;
+  } uses {
+
+    interface FrameTx as DisassociationIndirectTx;
+    interface FrameTx as DisassociationDirectTx;
+    interface FrameTx as DisassociationToCoord;
+
+    interface FrameRx as DisassociationDirectRxFromCoord;
+    interface FrameExtracted as DisassociationExtractedFromCoord;
+    interface FrameRx as DisassociationRxFromDevice;
+
+    interface Pool<ieee154_txframe_t> as TxFramePool;
+    interface Pool<ieee154_txcontrol_t> as TxControlPool;
+    interface MLME_GET;
+    interface MLME_SET;
+    interface FrameUtility;
+    interface IEEE154Frame as Frame;
+    interface Get<uint64_t> as LocalExtendedAddress;
+  }
+}
+implementation
+{
+
+  command error_t Init.init() { return SUCCESS; }
+
+  /* ------------------- MLME_DISASSOCIATE (initiating) ------------------- */
+
+  command ieee154_status_t MLME_DISASSOCIATE.request  (
+                          uint8_t DeviceAddrMode,
+                          uint16_t DevicePANID,
+                          ieee154_address_t DeviceAddress,
+                          ieee154_disassociation_reason_t DisassociateReason,
+                          bool TxIndirect,
+                          ieee154_security_t *security
+                        )
+  {
+    return IEEE154_TRANSACTION_OVERFLOW;
+  }
+
+  event void DisassociationToCoord.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) { }
+
+  event void DisassociationIndirectTx.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) { }
+
+  event void DisassociationDirectTx.transmitDone(ieee154_txframe_t *data, ieee154_status_t status) { }
+
+  /* ------------------- MLME_DISASSOCIATE (receiving) ------------------- */
+
+  event message_t* DisassociationDirectRxFromCoord.received(message_t* frame) { return frame; }
+
+  event message_t* DisassociationExtractedFromCoord.received(message_t* frame, ieee154_txframe_t *txFrame) { return frame;
+  }
+
+  event message_t* DisassociationRxFromDevice.received(message_t* frame) { return frame; }
+
+  /* ------------------- Defaults ------------------- */
+
+  default event void MLME_DISASSOCIATE.indication (
+                          uint64_t DeviceAddress,
+                          ieee154_disassociation_reason_t DisassociateReason,
+                          ieee154_security_t *security
+                        ){}
+  default event void MLME_DISASSOCIATE.confirm    (
+                          ieee154_status_t status,
+                          uint8_t DeviceAddrMode,
+                          uint16_t DevicePANID,
+                          ieee154_address_t DeviceAddress
+                        ){}
+
+}
diff --git a/tos/lib/mac/tkn154/dummies/NoDispatchQueueP.nc b/tos/lib/mac/tkn154/dummies/NoDispatchQueueP.nc
new file mode 100644
index 00000000..d8053636
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoDispatchQueueP.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-03-05 10:07:14 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /** Empty placeholder component for DispatchQueueP. */
+
+#include "TKN154_MAC.h"
+generic module NoDispatchQueueP() {
+  provides
+  {
+    interface Init as Reset;
+    interface FrameTx[uint8_t client];
+    interface FrameRx as FrameExtracted[uint8_t client];
+    interface Purge;
+  } uses {
+    interface Queue<ieee154_txframe_t*>;
+    interface FrameTx as FrameTxCsma;
+    interface FrameRx as SubFrameExtracted;
+  }
+}
+implementation
+{
+  command error_t Reset.init() { return SUCCESS; }
+
+  command ieee154_status_t FrameTx.transmit[uint8_t client](ieee154_txframe_t *txFrame)
+  {
+    return IEEE154_TRANSACTION_OVERFLOW;
+  }
+
+  event void FrameTxCsma.transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status) { }
+
+  event message_t* SubFrameExtracted.received(message_t* frame) { return frame; }
+
+  default event void FrameTx.transmitDone[uint8_t client](ieee154_txframe_t *txFrame, ieee154_status_t status){}
+
+  command ieee154_status_t Purge.purge(uint8_t msduHandle)
+  {
+    return IEEE154_INVALID_HANDLE;
+  }
+  
+  default event void Purge.purgeDone(ieee154_txframe_t *txFrame, ieee154_status_t status){}
+}
diff --git a/tos/lib/mac/tkn154/dummies/NoDispatchSlottedCsmaP.nc b/tos/lib/mac/tkn154/dummies/NoDispatchSlottedCsmaP.nc
new file mode 100644
index 00000000..f5ed53f7
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoDispatchSlottedCsmaP.nc
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2009-10-27 11:29:15 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /** Empty placeholder component for DispatchSlottedCsmaP. */
+
+#include "TKN154_PHY.h"
+#include "TKN154_MAC.h"
+
+generic module NoDispatchSlottedCsmaP(uint8_t sfDirection)
+{
+  provides
+  {
+    interface Init as Reset;
+    interface FrameTx as FrameTx;
+    interface FrameRx as FrameRx[uint8_t frameType];
+    interface FrameExtracted as FrameExtracted[uint8_t frameType];
+    interface FrameTxNow as BroadcastTx;
+    interface Notify<bool> as WasRxEnabled;
+  }
+  uses
+  {
+    interface Alarm<TSymbolIEEE802154,uint32_t> as CapEndAlarm;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as BLEAlarm;
+    interface Alarm<TSymbolIEEE802154,uint32_t> as RxWaitAlarm;
+    interface GetNow<token_requested_t> as IsRadioTokenRequested;
+    interface TransferableResource as RadioToken;
+    interface ResourceRequested as RadioTokenRequested;
+    interface SuperframeStructure; 
+    interface GetNow<bool> as IsRxEnableActive; 
+    interface Get<ieee154_txframe_t*> as GetIndirectTxFrame; 
+    interface Notify<bool> as RxEnableStateChange;
+    interface GetNow<bool> as IsTrackingBeacons;
+    interface Notify<const void*> as PIBUpdateMacRxOnWhenIdle;
+    interface FrameUtility;
+    interface SlottedCsmaCa;
+    interface RadioRx;
+    interface RadioOff;
+    interface MLME_GET;
+    interface MLME_SET;
+    interface TimeCalc;
+    interface Leds;
+    interface SetNow<ieee154_cap_frame_backup_t*> as FrameBackup;
+    interface GetNow<ieee154_cap_frame_backup_t*> as FrameRestore;
+    interface StdControl as TrackSingleBeacon;
+    interface MLME_SYNC_LOSS;
+  }
+}
+implementation
+{
+  enum {
+    COORD_ROLE = (sfDirection == OUTGOING_SUPERFRAME),
+    DEVICE_ROLE = !COORD_ROLE,
+    RADIO_CLIENT_CFP = COORD_ROLE ? RADIO_CLIENT_COORDCFP : RADIO_CLIENT_DEVICECFP,
+  };  
+
+  command error_t Reset.init() { return SUCCESS; }
+
+  async event void RadioToken.transferredFrom(uint8_t c) { call RadioToken.transferTo(RADIO_CLIENT_CFP); }
+
+  command ieee154_status_t FrameTx.transmit(ieee154_txframe_t *frame) { return IEEE154_TRANSACTION_OVERFLOW; }
+
+  async event void RadioOff.offDone(){ }
+
+  async event void RadioRx.enableRxDone(){}
+
+  async event void CapEndAlarm.fired(){ }
+
+  async event void BLEAlarm.fired(){ }
+
+  event void RxEnableStateChange.notify(bool whatever){ }
+
+  async event void RxWaitAlarm.fired(){ }
+
+  async event void SlottedCsmaCa.transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, 
+      bool ackPendingFlag,  uint16_t remainingBackoff, error_t result) { }
+
+  event message_t* RadioRx.received(message_t* frame) { return frame; }
+
+  async command ieee154_status_t BroadcastTx.transmitNow(ieee154_txframe_t *frame) { return IEEE154_TRANSACTION_OVERFLOW;}
+
+  event void RadioToken.granted() { }
+
+  command error_t WasRxEnabled.enable(){return FAIL;}
+  command error_t WasRxEnabled.disable(){return FAIL;}
+  event void PIBUpdateMacRxOnWhenIdle.notify( const void* val ) {}
+  async event void RadioTokenRequested.requested(){ }
+  async event void RadioTokenRequested.immediateRequested(){ }
+ 
+  event void MLME_SYNC_LOSS.indication (
+                          ieee154_status_t lossReason,
+                          uint16_t PANId,
+                          uint8_t LogicalChannel,
+                          uint8_t ChannelPage,
+                          ieee154_security_t *security
+                        ){ }
+}
diff --git a/tos/lib/mac/tkn154/dummies/NoPromiscuousModeP.nc b/tos/lib/mac/tkn154/dummies/NoPromiscuousModeP.nc
new file mode 100644
index 00000000..8a5b10da
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoPromiscuousModeP.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2010-02-04 16:31:15 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /** Empty placeholder component for PromiscuousModeP. */
+
+#include "TKN154_PHY.h"
+#include "TKN154_MAC.h"
+module NoPromiscuousModeP 
+{
+  provides {
+    interface Init;
+    interface SplitControl as PromiscuousMode;
+    interface Get<bool> as PromiscuousModeGet;
+    interface FrameRx;
+    interface GetNow<token_requested_t> as IsRadioTokenRequested;
+  } uses {
+    interface TransferableResource as RadioToken;
+    interface RadioRx as PromiscuousRx;
+    interface RadioOff;
+    interface Set<bool> as RadioPromiscuousMode;
+  }
+}
+implementation
+{
+
+  command error_t Init.init() { return SUCCESS; }
+
+  /* ----------------------- Promiscuous Mode ----------------------- */
+
+  command bool PromiscuousModeGet.get() { return FALSE; }
+
+  command error_t PromiscuousMode.start() { return FAIL; }
+
+  event void RadioToken.granted() { ASSERT(0);}
+
+  event message_t* PromiscuousRx.received(message_t *frame) { return frame; }
+
+  async event void PromiscuousRx.enableRxDone(){}
+
+  command error_t PromiscuousMode.stop() { return FAIL; }
+
+  async event void RadioOff.offDone() { }
+
+  default event void PromiscuousMode.startDone(error_t error){}
+  default event void PromiscuousMode.stopDone(error_t error){}
+  async command token_requested_t IsRadioTokenRequested.getNow(){ return FALSE;}
+  async event void RadioToken.transferredFrom(uint8_t clientFrom){ASSERT(0);}
+}
diff --git a/tos/lib/mac/tkn154/dummies/NoRxEnableP.nc b/tos/lib/mac/tkn154/dummies/NoRxEnableP.nc
new file mode 100644
index 00000000..a42aca96
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoRxEnableP.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:40 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /** Empty placeholder component for RxEnableP. */
+
+#include "TKN154_PHY.h"
+#include "TKN154_MAC.h"
+module NoRxEnableP
+{
+  provides
+  {
+    interface Init;
+    interface MLME_RX_ENABLE;
+    interface GetNow<bool> as IsRxEnableActive; 
+    interface Notify<bool> as RxEnableStateChange;
+  }
+  uses
+  {
+    interface Timer<TSymbolIEEE802154> as RxEnableTimer;
+    interface Get<ieee154_macPanCoordinator_t> as IsMacPanCoordinator;
+    interface GetNow<bool> as IsTrackingBeacons;
+    interface GetNow<bool> as IsSendingBeacons;
+    interface SuperframeStructure as IncomingSuperframeStructure;
+    interface SuperframeStructure as OutgoingSuperframeStructure;
+    interface Notify<bool> as WasRxEnabled;
+    interface TimeCalc;
+  }
+}
+implementation
+{
+
+  command error_t Init.init() { return SUCCESS; }
+
+  /* ----------------------- MLME-RX-ENABLE ----------------------- */
+
+  command ieee154_status_t MLME_RX_ENABLE.request  ( 
+                          bool DeferPermit,
+                          uint32_t RxOnTime,
+                          uint32_t RxOnDuration
+                        )
+  {
+    return IEEE154_TRANSACTION_OVERFLOW;
+  }
+
+  event void RxEnableTimer.fired() {}
+
+  async command bool IsRxEnableActive.getNow() { return FALSE; }
+
+  event void WasRxEnabled.notify( bool val ) { }
+
+  command error_t RxEnableStateChange.enable(){return FAIL;}
+  command error_t RxEnableStateChange.disable(){return FAIL;}
+  default event void MLME_RX_ENABLE.confirm(ieee154_status_t status){}
+}
diff --git a/tos/lib/mac/tkn154/dummies/NoScanP.nc b/tos/lib/mac/tkn154/dummies/NoScanP.nc
new file mode 100644
index 00000000..64b93645
--- /dev/null
+++ b/tos/lib/mac/tkn154/dummies/NoScanP.nc
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2009-03-24 12:56:47 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /** Empty placeholder component for ScanP. */
+
+#include "TKN154_MAC.h"
+
+module NoScanP
+{
+  provides
+  {
+    interface Init;
+    interface MLME_SCAN;
+    interface MLME_BEACON_NOTIFY;
+    interface GetNow<token_requested_t> as IsRadioTokenRequested;
+  }
+  uses
+  {
+    interface MLME_GET;
+    interface MLME_SET;
+    interface EnergyDetection;
+    interface RadioOff;
+    interface RadioRx;
+    interface RadioTx;
+    interface IEEE154Frame as Frame;
+    interface IEEE154BeaconFrame as BeaconFrame;
+    interface Timer<TSymbolIEEE802154> as ScanTimer;
+    interface Pool<ieee154_txframe_t> as TxFramePool;
+    interface Pool<ieee154_txcontrol_t> as TxControlPool;
+    interface TransferableResource as RadioToken;
+    interface FrameUtility;
+    interface Leds;
+  }
+}
+implementation
+{
+
+  command error_t Init.init() { return SUCCESS;}
+
+  command ieee154_status_t MLME_SCAN.request  (
+                          uint8_t ScanType,
+                          uint32_t ScanChannels,
+                          uint8_t ScanDuration,
+                          uint8_t ChannelPage,
+                          uint8_t EnergyDetectListNumEntries,
+                          int8_t* EnergyDetectList,
+                          uint8_t PANDescriptorListNumEntries,
+                          ieee154_PANDescriptor_t* PANDescriptorList,
+                          ieee154_security_t *security
+                        )
+  {
+    return IEEE154_TRANSACTION_OVERFLOW;
+  }
+
+  event void RadioToken.granted()
+  {
+    ASSERT(0);
+  }
+
+  event void EnergyDetection.done(error_t status, int8_t EnergyLevel){}
+
+  async event void RadioRx.enableRxDone(){}
+
+  event message_t* RadioRx.received(message_t *frame)
+  {
+    return frame;
+  }
+
+  async event void RadioTx.transmitDone(ieee154_txframe_t *frame, error_t result){}
+
+  event void ScanTimer.fired() { }
+
+  async event void RadioOff.offDone() { }
+  async event void RadioToken.transferredFrom(uint8_t fromClient){ASSERT(0);}
+  async command token_requested_t IsRadioTokenRequested.getNow(){ return FALSE;}
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MCPS/MCPS_DATA.nc b/tos/lib/mac/tkn154/interfaces/MCPS/MCPS_DATA.nc
new file mode 100644
index 00000000..651dd919
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MCPS/MCPS_DATA.nc
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:40 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * The MCPS-DATA.request primitive requests the transfer of a data SPDU (i.e.,
+ * MSDU) from a local SSCS entity to a single peer SSCS entity. (IEEE
+ * 802.15.4-2006, Sect. 7.1.1)
+ */
+
+#include "TKN154.h"
+#include <message.h>
+
+interface MCPS_DATA 
+{
+
+  /**
+   * "Requests to transfer a data SPDU (i.e., MSDU) from a local SSCS
+   * entity to a single peer SSCS entity." (IEEE 802.15.4-2006, Sec.
+   * 7.1.1.1) 
+   *
+   * The source/destination addressing mode, destination PAN
+   * identifier, destination address, the payload and (optionally) the
+   * security mode/key are part of the <tt>frame</tt> and must have
+   * been set (through the <tt>IEEE154Frame</tt> interface) before
+   * calling this command.
+   * 
+   * If this command returns IEEE154_SUCCESS, then the confirm event
+   * will be signalled in the future; otherwise, the confirm event
+   * will not be signalled.
+   * 
+   * @param frame         The frame to send
+   * @param payloadLen    The length of the frame payload
+   * @param msduHandle    Handle associated with the frame
+   * @param TxOptions     Bitwised OR transmission options
+   *
+   * @return       IEEE154_SUCCESS if the request succeeded and only
+   *               then the <tt>confirm()</tt> event will be signalled;
+   *               an appropriate error code otherwise 
+   * @see          confirm
+   */
+
+  command ieee154_status_t request  (
+                          message_t *frame,
+                          uint8_t payloadLen,
+                          uint8_t msduHandle,
+                          uint8_t TxOptions
+                        );
+
+  /**
+   * Reports the result of a request to transfer a frame to a peer
+   * SSCS entity.
+   *
+   * @param frame      The frame which was requested to be sent
+   * @param msduHandle The handle associated with the frame
+   * @param status     The status of the last MSDU transmission
+   * @param timestamp  Time of transmission (invalid if <tt>status</tt> 
+   *                   is not IEEE154_SUCCESS)
+   */
+  event void confirm    (  
+                          message_t *frame,
+                          uint8_t msduHandle,
+                          ieee154_status_t status,
+                          uint32_t Timestamp
+                        );
+
+  /**
+   * Indicates the arrival of a frame. Use the <tt>IEEE154Frame</tt>
+   * interface to get the payload, source/destination addresses, DSN
+   * and other information associated with this frame.
+   * 
+   * @return A frame buffer for the stack to use for the next received frame
+   */
+  event message_t* indication ( message_t* frame );
+
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MCPS/MCPS_PURGE.nc b/tos/lib/mac/tkn154/interfaces/MCPS/MCPS_PURGE.nc
new file mode 100644
index 00000000..bce6ac1b
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MCPS/MCPS_PURGE.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:40 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * The MCPS-PURGE.request primitive allows the next higher layer to purge an
+ * MSDU from the transaction queue. (IEEE 802.15.4-2006, Sect. 7.1.1)
+ */
+
+#include "TKN154.h"
+
+interface MCPS_PURGE {
+
+  /**
+   * Requests to purge a frame from the transaction queue. The result
+   * will be returned immediately (there is no confirm event for this
+   * command).
+   * 
+   * @param msduHandle The handle of the frame to be purged from the
+   *                   transaction queue
+   *
+   * @return       IEEE154_SUCCESS if the request succeeded, an 
+   *               appropriate error code otherwise 
+   */
+  command ieee154_status_t request  (
+                          uint8_t msduHandle
+                        );
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_ASSOCIATE.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_ASSOCIATE.nc
new file mode 100644
index 00000000..dd94640f
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_ASSOCIATE.nc
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:40 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * MLME-SAP association primitives define how a device becomes
+ * associated with a PAN. (IEEE 802.15.4-2006, Sect. 7.1.3)
+ */
+
+#include "TKN154.h"
+
+interface MLME_ASSOCIATE {
+
+  /**
+   * Requests to associate with a PAN.
+   * 
+   * @param LogicalChannel  The logical channel on which to attempt
+   *                        association
+   * @param ChannelPage     The channel page on which to attempt association
+   * @param CoordAddrMode   The coordinator addressing mode
+   * @param CoordPANID      The 16 bit PAN identifier of the coordinator
+   * @param CoordAddress    Individual device address of the coordinator as
+   *                        per the CoordAddrMode
+   * @param CapabilityInformation Specifies the operational capabilities
+   *                        of the associating device
+   * @param security        The security options (NULL means security is 
+   *                        disabled)
+   *
+   * @return       IEEE154_SUCCESS if the request succeeded and a confirm event
+   *               will be signalled, an appropriate error code otherwise 
+   *               (no confirm event will be signalled in this case)
+   * @see          confirm
+   */
+  command ieee154_status_t request  (
+                          uint8_t LogicalChannel,
+                          uint8_t ChannelPage,
+                          uint8_t CoordAddrMode,
+                          uint16_t CoordPANID,
+                          ieee154_address_t CoordAddress,
+                          ieee154_CapabilityInformation_t CapabilityInformation,
+                          ieee154_security_t *security
+                        );
+
+  /**
+   * Notification that a device has requested to associate with this PAN.
+   *
+   * @param DeviceAddress the 64-bit address of the requesting device
+   * @param CapabilityInformation Specifies the operational capabilities
+   *                              of the associating device
+   * @param security      The security options (NULL means security is 
+   *                      disabled)
+   */
+  event void indication (
+                          uint64_t DeviceAddress,
+                          ieee154_CapabilityInformation_t CapabilityInformation,
+                          ieee154_security_t *security
+                        );
+
+  /**
+   * Sends a response to a device that requested to associate with this PAN.
+   *
+   * @param DeviceAddress     The 64-bit address of the device to respond to
+   * @param AssocShortAddress The short device address allocated by the
+   *                          coordinator on successful allocation.
+   * @param status          The status of the association attempt
+   * @param security        The security options (NULL means security is 
+   *                        disabled)
+   *
+   * @return IEEE154_SUCCESS if the request succeeded and an indication event
+   *         will be signalled through the MLME_COMM_STATUS interface later,  
+   *         an appropriate error code otherwise (no MLME_COMM_STATUS.indication
+   *         event will be signalled in this case)
+   */
+  command ieee154_status_t response (
+                          uint64_t DeviceAddress,
+                          uint16_t AssocShortAddress,
+                          ieee154_association_status_t status,
+                          ieee154_security_t *security
+                        );
+
+  /**
+   * Confirms an association attempt.
+   *
+   * @param AssocShortAddress The short device address allocated by the
+   *                          coordinator on successful association
+   * @param status          The status of the association attempt
+   * @param security        The security options, NULL means security is 
+   *                        disabled
+   */
+  event void confirm    (
+                          uint16_t AssocShortAddress,
+                          uint8_t status,
+                          ieee154_security_t *security
+                        );
+
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_BEACON_NOTIFY.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_BEACON_NOTIFY.nc
new file mode 100644
index 00000000..66d2ecf6
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_BEACON_NOTIFY.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:40 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * The MLME-SAP beacon notification primitive defines how a device may be
+ * notified when a beacon is received during normal operating conditions. 
+ * (IEEE 802.15.4-2006, Sect. 7.1.5)
+ */
+
+#include "TKN154.h"
+#include <message.h>
+
+interface MLME_BEACON_NOTIFY {
+
+  /**
+   * A beacon frame has been received. This event is signalled only if
+   * either the PIB attribute <tt>macAutoRequest</tt> is set to FALSE
+   * or the beacon payload is not empty.
+   *
+   * The beacon parameters can be accessed through the
+   * <tt>IEEE154BeaconFrame</tt> interface. The <tt>IEEE154Frame</tt>
+   * interface can be used to inspect the addressing fields in the MAC
+   * header.
+   *
+   * @param beacon The beacon frame
+   *
+   * @return A frame buffer for the stack to use for the next received frame
+   */
+  event message_t* indication ( message_t *beaconFrame );
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_COMM_STATUS.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_COMM_STATUS.nc
new file mode 100644
index 00000000..482bd8a2
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_COMM_STATUS.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:40 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * The MLME-SAP communication status primitive defines how the MLME
+ * communicates to the next higher layer about transmission status,
+ * when the transmission was instigated by a response primitive, and
+ * about security errors on incoming packets. (IEEE 802.15.4-2006,
+ * Sect. 7.1.12)
+ */
+
+#include "TKN154.h"
+interface MLME_COMM_STATUS {
+
+  /** 
+   * Allows the MLME to indicate a communications status.
+   *
+   * @param PanID The 16-bit PAN identifier of the device from which the
+   *              frame was received or to which the frame was being sent
+   * @param SrcAddrMode The source addressing mode
+   * @param SrcAddr Individual device address of the source as per SrcAddrMode
+   * @param DstAddrMode The destination addressing mode
+   * @param DstAddr Individual device address of the destination
+   *                as per DstAddrMode
+   * @param status The communications status
+   * @param security The security options, NULL means security is 
+   *                 disabled
+   */
+  event void indication (
+                          uint16_t PANId,
+                          uint8_t SrcAddrMode,
+                          ieee154_address_t SrcAddr,
+                          uint8_t DstAddrMode,
+                          ieee154_address_t DstAddr,
+                          ieee154_status_t status,
+                          ieee154_security_t *security
+                        );
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_DISASSOCIATE.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_DISASSOCIATE.nc
new file mode 100644
index 00000000..d07c9fdd
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_DISASSOCIATE.nc
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:42 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * The MLME-SAP disassociation primitives define how a device can
+ * disassociate from a PAN. (IEEE 802.15.4-2006, Sect. 7.1.4)
+ */
+
+#include "TKN154.h"
+interface MLME_DISASSOCIATE {
+
+  /**
+   * Requests disassociation from a PAN.
+   * 
+   * @param DeviceAddrMode The addressing mode of the device to which to send 
+   *                       the disassociation notification command.
+   * @param DevicePANID The PAN identifier of the device to which to send the
+   *                    disassociation notification command.
+   * @param DeviceAddress The address of the device to which to send the
+   *                      disassociation notification command
+   * @param DisassociateReason The reason for the disassociation
+   * @param TxIndirect TRUE if disassociation notification command is to be sent
+   *                   indirectly
+   * @param security   The security options (NULL means security is 
+   *                   disabled)
+   *
+   * @return       IEEE154_SUCCESS if the request succeeded and a confirm event
+   *               will be signalled, an appropriate error code otherwise 
+   *               (no confirm event will be signalled in this case)
+   * @see          confirm
+   */
+  command ieee154_status_t request  (
+                          uint8_t DeviceAddrMode,
+                          uint16_t DevicePANID,
+                          ieee154_address_t DeviceAddress,
+                          ieee154_disassociation_reason_t DisassociateReason,
+                          bool TxIndirect,
+                          ieee154_security_t *security
+                        );
+
+  /**
+   * Signals that a device has requested disassociation from this PAN.
+   *
+   * @param DeviceAddress the 64-bit address of the requesting device
+   * @param DisassociateReason Reason for the disassociation
+   * @param security      The security options (NULL means security is 
+   *                      disabled)
+   */
+  event void indication (
+                          uint64_t DeviceAddress,
+                          ieee154_disassociation_reason_t DisassociateReason,
+                          ieee154_security_t *security
+                        );
+
+  /**
+   * Confirmsn a disassociation attempt.
+   *
+   * @param status The status of the disassociation attempt
+   * @param DeviceAddrMode The addressing mode of the device that has either
+   *                       requested disassociation or been instructed to
+   *                       disassociate by its coordinator.
+   * @param DevicePANID The PAN identifier of the device that has either 
+   *                    requested disassociation or been instructed to 
+   *                    disassociate by its coordinator.
+   * @param DeviceAddress The address of the device that has either requested 
+   *                       disassociation or been instructed to disassociate 
+   *                       by its coordinator.
+   */
+  event void confirm    (
+                          ieee154_status_t status,
+                          uint8_t DeviceAddrMode,
+                          uint16_t DevicePANID,
+                          ieee154_address_t DeviceAddress
+                        );
+
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_GET.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_GET.nc
new file mode 100644
index 00000000..ebaa9edd
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_GET.nc
@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * This interface allows to read attribute values from the PHY/MAC PIB.
+ * Instead of passing the PIB attribute identifier, there is a separate
+ * command per attribute (and there are no confirm events). 
+ *
+ * NOTE: for the attributes <tt>macBeaconPayload</tt> (0x45) and
+ * <tt>macBeaconPayloadLength </tt>(0x46) use the
+ * <tt>IEEE154TxBeaconPayload</tt> interface; for promiscuous mode
+ * there is a separate (SplitControl) interface. 
+ */
+
+#include "TKN154.h" 
+interface MLME_GET {
+
+  /** @return PIB attribute phyCurrentChannel (0x00) */
+  command ieee154_phyCurrentChannel_t phyCurrentChannel();
+
+  /** @return PIB attribute phyChannelsSupported (0x01) */
+  command ieee154_phyChannelsSupported_t phyChannelsSupported();
+
+  /** @return PIB attribute phyTransmitPower (0x02) */
+  command ieee154_phyTransmitPower_t phyTransmitPower();
+
+  /** @return PIB attribute phyCCAMode (0x03) */
+  command ieee154_phyCCAMode_t phyCCAMode();
+
+  /** @return PIB attribute phyCurrentPage (0x04) */
+  command ieee154_phyCurrentPage_t phyCurrentPage();
+
+  /** @return PIB attribute phyMaxFrameDuration (0x05) */
+  command ieee154_phyMaxFrameDuration_t phyMaxFrameDuration();
+
+  /** @return PIB attribute phySHRDuration (0x06) */
+  command ieee154_phySHRDuration_t phySHRDuration();
+
+  /** @return PIB attribute phySymbolsPerOctet (0x07) */
+  command ieee154_phySymbolsPerOctet_t phySymbolsPerOctet();
+
+  /** @return PIB attribute macAckWaitDuration (0x40) */
+  command ieee154_macAckWaitDuration_t macAckWaitDuration();
+
+  /** @return PIB attribute macAssociationPermit (0x41) */
+  command ieee154_macAssociationPermit_t macAssociationPermit();
+
+  /** @return PIB attribute macAutoRequest (0x42) */
+  command ieee154_macAutoRequest_t macAutoRequest();
+
+  /** @return PIB attribute macBattLifeExt (0x43) */
+  command ieee154_macBattLifeExt_t macBattLifeExt();
+
+  /** @return PIB attribute macBattLifeExtPeriods (0x44) */
+  command ieee154_macBattLifeExtPeriods_t macBattLifeExtPeriods();
+
+  /* macBeaconPayload (0x45) and macBeaconPayloadLength (0x46) are read
+   * through the <tt>IEEE154TxBeaconPayload</tt> interface. */
+
+  /** @return PIB attribute macBeaconOrder (0x47) */
+  command ieee154_macBeaconOrder_t macBeaconOrder();
+
+  /** @return PIB attribute macBeaconTxTime (0x48) */
+  command ieee154_macBeaconTxTime_t macBeaconTxTime();
+
+  /** @return PIB attribute macBSN (0x49) */
+  command ieee154_macBSN_t macBSN();
+
+  /** @return PIB attribute macCoordExtendedAddress (0x4A) */
+  command ieee154_macCoordExtendedAddress_t macCoordExtendedAddress();
+
+  /** @return PIB attribute macCoordShortAddress (0x4B) */
+  command ieee154_macCoordShortAddress_t macCoordShortAddress();
+
+  /** @return PIB attribute macDSN (0x4C) */
+  command ieee154_macDSN_t macDSN();
+
+  /** @return PIB attribute macGTSPermit (0x4D) */
+  command ieee154_macGTSPermit_t macGTSPermit();
+
+  /** @return PIB attribute macMaxCSMABackoffs (0x4E) */
+  command ieee154_macMaxCSMABackoffs_t macMaxCSMABackoffs();
+
+  /** @return PIB attribute macMinBE (0x4F) */
+  command ieee154_macMinBE_t macMinBE();
+
+  /** @return PIB attribute macPANId (0x50) */
+  command ieee154_macPANId_t macPANId();
+
+  /** @return PIB attribute macPromiscuousMode (0x51) */
+  command ieee154_macPromiscuousMode_t macPromiscuousMode();
+
+  /** @return PIB attribute macRxOnWhenIdle (0x52) */
+  command ieee154_macRxOnWhenIdle_t macRxOnWhenIdle();
+
+  /** @return PIB attribute macShortAddress (0x53) */
+  command ieee154_macShortAddress_t macShortAddress();
+
+  /** @return PIB attribute macSuperframeOrder (0x54) */
+  command ieee154_macSuperframeOrder_t macSuperframeOrder();
+
+  /** @return PIB attribute macTransactionPersistenceTime (0x55) */
+  command ieee154_macTransactionPersistenceTime_t macTransactionPersistenceTime();
+
+  /** @return PIB attribute macAssociatedPANCoord (0x56) */
+  command ieee154_macAssociatedPANCoord_t macAssociatedPANCoord();
+
+  /** @return PIB attribute macMaxBE (0x57) */
+  command ieee154_macMaxBE_t macMaxBE();
+
+  /** @return PIB attribute macMaxFrameTotalWaitTime (0x58) */
+  command ieee154_macMaxFrameTotalWaitTime_t macMaxFrameTotalWaitTime();
+
+  /** @return PIB attribute macMaxFrameRetries (0x59) */
+  command ieee154_macMaxFrameRetries_t macMaxFrameRetries();
+
+  /** @return PIB attribute macResponseWaitTime (0x5A) */
+  command ieee154_macResponseWaitTime_t macResponseWaitTime();
+
+  /** @return PIB attribute macSyncSymbolOffset (0x5B) */
+  command ieee154_macSyncSymbolOffset_t macSyncSymbolOffset();
+
+  /** @return PIB attribute macTimestampSupported (0x5C) */
+  command ieee154_macTimestampSupported_t macTimestampSupported();
+
+  /** @return PIB attribute macSecurityEnabled (0x5D) */
+  command ieee154_macSecurityEnabled_t macSecurityEnabled();
+
+  /** @return PIB attribute macMinLIFSPeriod */
+  command ieee154_macMinLIFSPeriod_t macMinLIFSPeriod();
+
+  /** @return PIB attribute macMinSIFSPeriod */
+  command ieee154_macMinSIFSPeriod_t macMinSIFSPeriod();
+
+  /** @return custom attribute macPanCoordinator */
+  command ieee154_macPanCoordinator_t macPanCoordinator();
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_GTS.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_GTS.nc
new file mode 100644
index 00000000..9eae26f2
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_GTS.nc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * The MLME-SAP GTS management primitives define how GTSs are
+ * requested and maintained. A device wishing to use these primitives
+ * and GTSs in general will already be tracking the beacons of its PAN
+ * coordinator. (IEEE 802.15.4-2006, Sect. 7.1.7)
+ */
+
+#include "TKN154.h"
+interface MLME_GTS {
+
+  /**
+   * Request allocation of a new GTS or deallocation from the PAN
+   * coordinator.
+   *
+   * @param GtsCharacteristics The characteristics of the GTS request
+   * @param security      The security options (NULL means security is 
+   *                      disabled)
+   * @return       IEEE154_SUCCESS if the request succeeded and a confirm event
+   *               will be signalled, an appropriate error code otherwise 
+   *               (no confirm event will be signalled in this case)
+   * @see          confirm
+   */
+  command ieee154_status_t request  (
+                          uint8_t GtsCharacteristics,
+                          ieee154_security_t *security
+                        );
+
+  /**
+   * Reports the results of a request to allocated a new GTS or
+   * deallocate an existing GTS
+   *
+   * @param GtsCharacteristics The characteristics of the GTS request
+   * @param status The status of the GTS request
+   */
+  event void confirm    (
+                          uint8_t GtsCharacteristics,
+                          ieee154_status_t status
+                        );
+
+  /**
+   * Indicates that a GTS has been allocated or that a previously allocated
+   * GTS has been deallocated
+   *
+   * All pointers are valid only until the return of this event.
+   * 
+   * @param DeviceAddress Short address of the device that has been allocated
+   *                   or deallocated a GTS
+   * @param GtsCharacteristics The characteristics of the GTS request
+   * @param security        The security options, NULL means security is 
+   *                        disabled
+   */   
+  event void indication (
+                          uint16_t DeviceAddress,
+                          uint8_t GtsCharacteristics,
+                          ieee154_security_t *security
+                        );
+
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_ORPHAN.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_ORPHAN.nc
new file mode 100644
index 00000000..8046d822
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_ORPHAN.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * MLME-SAP orphan notification primitives define how a coordinator
+ * can issue a notification of an orphaned device. (IEEE 802.15.4-2006,
+ * Sect. 7.1.8)
+ */
+
+#include "TKN154.h" 
+interface MLME_ORPHAN {
+
+  /**
+   * Allows the MLME of a coordinator to notify the next higher layer of the
+   * presence of an orphaned device
+   * 
+   * @param OrphanAddress The 64-bit extended address of the orphaned device
+   * @param security        The security options (NULL means security is 
+   *                        disabled)
+  */
+  event void indication (
+                          uint64_t OrphanAddress,
+                          ieee154_security_t *security
+                        );
+
+  /**
+   * Allows the next higher layer of a coordinator to respond to the
+   * indication primitive
+   *
+   * @param OrphanAddres The 64-bit extended address of the orphaned device
+   * @param ShortAddress The 16-bit short address allocated to the orphaned
+   *                     device if it is associated with this coordinator. The
+   *                     special short address 0xfffe indicates that no short
+   *                     address was allocated, and the device will use its
+   *                     64-bit extended address in all communications. If the
+   *                     device was not associated with this coordinator, this
+   *                     field will contain the value 0xffff and be ignored on
+   *                     receipt.
+   * @param AssociatedMember TRUE if the orphaned device is associated 
+   *                         with this coordinator
+   * @param security        The security options (NULL means security is 
+   *                        disabled)
+   * @return       IEEE154_SUCCESS if the request succeeded and an indication event
+   *               will be signalled through the MLME_COMM_STATUS interface later,  
+   *               otherwise an appropriate error code (no MLME_COMM_STATUS.indication 
+   *               event will be signalled in this case)
+   */
+  command ieee154_status_t response (
+                          uint64_t OrphanAddres,
+                          uint16_t ShortAddress,
+                          bool AssociatedMember,
+                          ieee154_security_t *security
+                        );
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_POLL.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_POLL.nc
new file mode 100644
index 00000000..716800f3
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_POLL.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * MLME-SAP polling primitives define how to request data from a
+ * coordinator. (IEEE 802.15.4-2006, Sect. 7.1.16)
+ */
+
+#include "TKN154.h"
+
+interface MLME_POLL {
+
+  /**
+   * Prompts the device to request data from the coordinator.
+   *
+   * @param CoordAddrMode The addressing mode of the coordinator to which
+   *                      the poll is intended
+   * @param CoordPANID The PAN identifier of the coordinator to which the
+   *                   poll is intended
+   * @param CoordAddress The address of the coordinator to which the
+   *                     poll is intended
+   * @param security     The security options (NULL means security is 
+   *                     disabled)
+   * @return       IEEE154_SUCCESS if the request succeeded and a confirm event
+   *               will be signalled, an appropriate error code otherwise 
+   *               (no confirm event will be signalled in this case)
+   * @see          confirm
+   */
+  command ieee154_status_t request  (
+                          uint8_t CoordAddrMode,
+                          uint16_t CoordPANID,
+                          ieee154_address_t CoordAddress,
+                          ieee154_security_t *security
+                        );
+
+  /**
+   * Reports the results of a request to poll the coordinator for data
+   *
+   * @param status The status of the data request
+   */
+  event void confirm    (
+                          ieee154_status_t status
+                        );
+
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_RESET.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_RESET.nc
new file mode 100644
index 00000000..44ab9504
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_RESET.nc
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * MLME-SAP reset primitives specify how to reset the MAC sublayer to
+ * its default values. (IEEE 802.15.4-2006, Sect. 7.1.9)
+ */
+
+#include "TKN154.h"
+interface MLME_RESET {
+
+  /**
+   * Allows the next higher layer to request that the MLME performs a
+   * reset operation. This command initializes the MAC and must be 
+   * called at least once before the MAC can be used.
+   *
+   * Two things are important:
+   * (1) This command will fail while promiscuous mode is enabled 
+   * (promiscuous mode is controlled through a separate SplitControl 
+   * interface). (2) While the MLME_RESET.confirm is pending the next
+   * higher layer MUST NOT call any MAC commands; if there are any
+   * other pending request the MAC will signal their corresponding confirm 
+   * events before MLME_RESET.confirm is signalled (with a status code of
+   * IEEE154_TRANSACTION_OVERFLOW).
+   * 
+   * @param SetDefaultPIB If TRUE, the MAC sublayer is reset and all MAC PIB
+   *                      attributes are set to their default values.  If
+   *                      FALSE, the MAC sublayer is reset but all MAC PIB
+   *                      attributes retain their values prior to the
+   *                      generation of the reset primitive.
+   *
+   * @return       IEEE154_SUCCESS if the request succeeded and a confirm event
+   *               will be signalled, an appropriate error code otherwise 
+   *               (no confirm event will be signalled in this case)
+   *                      
+   */
+  command ieee154_status_t request  (
+                          bool SetDefaultPIB
+                        );
+
+  /**
+   * Reports the results of the reset operation
+   *
+   * @param status The status of the reset operation
+   */
+  event void confirm    (
+                          ieee154_status_t status
+                        );
+
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_RX_ENABLE.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_RX_ENABLE.nc
new file mode 100644
index 00000000..1322116f
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_RX_ENABLE.nc
@@ -0,0 +1,79 @@
+
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * MLME-SAP receiver state primitives define how a device can enable
+ * or disable the receiver at a given time. (IEEE 802.15.4-2006, Sect.
+ * 7.1.10)
+ */
+
+#include "TKN154.h"
+interface MLME_RX_ENABLE {
+
+  /**
+   * Allows the next higher layer to request that the receiver is
+   * enabled for a finite period of time
+   * 
+   * @param DeferPermit TRUE if the receiver enable can be deferred until
+   *                    during the next superframe if the requested time has
+   *                    already passed
+   * @param RxOnTime The number of symbols from the start of the superframe 
+   *                 before the receiver is to be enabled.  The precision 
+   *                 of this value is a minimum of 20 bits.  This parameter 
+   *                 is ignored for nonbeacon-enabled PANs
+   * @param RxOnDuration The number of symbols for which the receiver 
+   *                     is to be enabled
+   * @return       IEEE154_SUCCESS if the request succeeded and a confirm event
+   *               will be signalled, an appropriate error code otherwise 
+   *               (no confirm event will be signalled in this case)
+   * @see          confirm
+   */
+  command ieee154_status_t request  (
+                          bool DeferPermit,
+                          uint32_t RxOnTime,
+                          uint32_t RxOnDuration
+                        );
+
+  /**
+   * Reports the results of the attempt to enable the receiver
+   *
+   * @param status The status of the receiver enable request
+   */
+  event void confirm    (
+                          ieee154_status_t status
+                        );
+
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_SCAN.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_SCAN.nc
new file mode 100644
index 00000000..8e7e8e1d
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_SCAN.nc
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * MLME-SAP scan primitives define how a device can determine the
+ * energy usage or the presence or absence of PANs in a communications
+ * channel. (IEEE 802.15.4-2006, Sect. 7.1.10)
+ */
+
+#include "TKN154.h"
+interface MLME_SCAN 
+{
+
+  /**
+   * Initializes a channel scan over a given list of channels.
+   * 
+   * If the PIB attribute <tt>macAutoRequest</tt> is set to FALSE, then
+   * for each received beacon a PAN descriptor is signalled to the next higher
+   * layer through a separate <tt>MLME_BEACON_NOTIFY.indication()</tt> 
+   * event; otherwise the result of the channel scan is stored in a user
+   * allocated buffer, either <tt>EnergyDetectList</tt> or 
+   * <tt>PANDescriptorList</tt> depending on <tt>ScanType</tt>, and the 
+   * buffer is returned when the scan is completed.
+   *
+   * Both of the parameters <tt>EnergyDetectList</tt> and 
+   * <tt>PANDescriptorList</tt> may be NULL, but at least one of them 
+   * must be NULL.
+   *
+   * @param ScanType The type of scan performed: ENERGY_DETECTION_SCAN,
+   *                 ACTIVE_SCAN, PASSIVE_SCAN or ORPHAN_SCAN
+   * @param ScanChannels The 27 LSBs indicate which channels are to be
+   *                     scanned (1 = scan, 0 = don't scan)
+   * @param ScanDuration Value used to calculate the length of time to
+   *                     spend scanning each channel for ED, active, and
+   *                     passive scans.  This parameter is ignored for
+   *                     orphan scans.
+   * @param ChannelPage The channel page on which to perform the scan
+   * @param EnergyDetectListNumEntries The number of entries in the 
+   *                    <tt>EnergyDetectList</tt>.
+   * @param EnergyDetectList An empty buffer (allocated by the caller)  
+   *                    to store the result of the energy measurements  
+   *                    or NULL if the result should not be stored
+   * @param PANDescriptorListNumEntries The number of entries in the
+   *                    <tt>PANDescriptorList</tt>.
+   * @param PANDescriptorList An empty buffer (allocated by the caller)   
+   *                     to store the result of the active/passive scan 
+   *                     or NULL if the result should not be stored
+   * @param security    The security options (NULL means security is 
+   *                    disabled)
+   * @return       IEEE154_SUCCESS if the request succeeded and a confirm event
+   *               will be signalled, an appropriate error code otherwise 
+   *               (no confirm event will be signalled in this case)
+   * @see          confirm
+   */
+  command ieee154_status_t request  (
+                          uint8_t ScanType,
+                          uint32_t ScanChannels,
+                          uint8_t ScanDuration,
+                          uint8_t ChannelPage,
+                          uint8_t EnergyDetectListNumEntries,
+                          int8_t* EnergyDetectList,
+                          uint8_t PANDescriptorListNumEntries,
+                          ieee154_PANDescriptor_t* PANDescriptorList,
+                          ieee154_security_t *security
+                        );
+
+  /**
+   * Reports the results of the channel scan request, returning
+   * the buffers passed in the <tt>request</tt> command.
+   *
+   * @param status The status of the scan request
+   * @param ScanType The type of scan performed
+   * @param ChannelPage The channel page on which the scan
+   *                    was performed (see 6.1.2).
+   * @param UnscannedChannels The 27 LSBs indicate which channels are not
+   *                    scanned (0 = scanned, 1 = not scanned)
+   * @param EnergyDetectNumResults The number of valid entries in the 
+   *                    <tt>EnergyDetectList</tt>.
+   * @param EnergyDetectList The buffer list of energy measurements, one for 
+   *                    each channel searched during an ED scan
+     @param PANDescriptorListNumResults The number of valid entries in the
+   *                    <tt>PANDescriptorList</tt>.
+   * @param PANDescriptorList The list of PAN descriptors, one for each
+   *                    unique beacon found during an active or passive scan
+   */
+  event void confirm    (
+                          ieee154_status_t status,
+                          uint8_t ScanType,
+                          uint8_t ChannelPage,
+                          uint32_t UnscannedChannels,
+                          uint8_t EnergyDetectNumResults,
+                          int8_t* EnergyDetectList,
+                          uint8_t PANDescriptorListNumResults,
+                          ieee154_PANDescriptor_t* PANDescriptorList
+                        );
+
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_SET.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_SET.nc
new file mode 100644
index 00000000..f68a05e4
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_SET.nc
@@ -0,0 +1,187 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+
+/** 
+ * This interface allows to set attribute values in the PHY/MAC PIB.
+ * Instead of passing the PIB attribute identifier, there is a separate
+ * command per attribute (and there are no confirm events). 
+ *
+ * NOTE: for the attributes <tt>macBeaconPayload</tt> (0x45) and
+ * <tt>macBeaconPayloadLength</tt> (0x46) use the
+ * <tt>IEEE154TxBeaconPayload</tt> interface; for promiscuous mode
+ * there is a separate (SplitControl) interface. 
+ */
+
+#include "TKN154.h" 
+interface MLME_SET {
+
+  /** @param value new PIB attribute value for phyCurrentChannel (0x00)
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t phyCurrentChannel(ieee154_phyCurrentChannel_t value);
+
+  /** @param value new PIB attribute value for phyTransmitPower (0x02)
+   *              (2 MSBs are ignored) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t phyTransmitPower(ieee154_phyTransmitPower_t value);
+
+  /** @param value new PIB attribute value for phyCCAMode (0x03) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t phyCCAMode(ieee154_phyCCAMode_t value);
+
+  /** @param value new PIB attribute value for phyCurrentPage (0x04) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t phyCurrentPage(ieee154_phyCurrentPage_t value);
+
+  /** @param value new PIB attribute value for macAssociationPermit (0x41) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macAssociationPermit(ieee154_macAssociationPermit_t value);
+
+  /** @param value new PIB attribute value for macAutoRequest (0x42) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macAutoRequest(ieee154_macAutoRequest_t value);
+
+  /** @param value new PIB attribute value for macBattLifeExt (0x43) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macBattLifeExt(ieee154_macBattLifeExt_t value);
+
+  /** @param value new PIB attribute value for macBattLifeExtPeriods (0x44) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macBattLifeExtPeriods(ieee154_macBattLifeExtPeriods_t value);
+
+  /* macBeaconPayload (0x45) and macBeaconPayloadLength (0x46) are set
+   * through the <tt>IEEE154TxBeaconPayload</tt> interface. */
+
+  /** @param value new PIB attribute value for macBeaconOrder (0x47) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macBeaconOrder(ieee154_macBeaconOrder_t value);
+
+  /** @param value new PIB attribute value for macBSN (0x49)
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macBSN(ieee154_macBSN_t value);
+
+  /** @param value new PIB attribute value for macCoordExtendedAddress (0x4A) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macCoordExtendedAddress(ieee154_macCoordExtendedAddress_t value);
+
+  /** @param value new PIB attribute value for macCoordShortAddress (0x4B) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macCoordShortAddress(ieee154_macCoordShortAddress_t value);
+
+  /** @param value new PIB attribute value for macDSN (0x4C) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macDSN(ieee154_macDSN_t value);
+
+  /** @param value new PIB attribute value for macGTSPermit (0x4D) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macGTSPermit(ieee154_macGTSPermit_t value);
+
+  /** @param value new PIB attribute value for macMaxCSMABackoffs (0x4E) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macMaxCSMABackoffs(ieee154_macMaxCSMABackoffs_t value);
+
+  /** @param value new PIB attribute value for macMinBE (0x4F)
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macMinBE(ieee154_macMinBE_t value);
+
+  /** @param value new PIB attribute value for macPANId (0x50) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macPANId(ieee154_macPANId_t value);
+
+  /* macPromiscuousMode (0x51) is (re-)set through the 
+   * <tt>PromiscuousMode</tt> (SplitControl) interface. */
+
+  /** @param value new PIB attribute value for macRxOnWhenIdle (0x52) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macRxOnWhenIdle(ieee154_macRxOnWhenIdle_t value);
+
+  /** @param value new PIB attribute value for macShortAddress (0x53) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macShortAddress(ieee154_macShortAddress_t value);
+
+  /** @param value new PIB attribute value for macTransactionPersistenceTime (0x55) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macTransactionPersistenceTime(ieee154_macTransactionPersistenceTime_t value);
+
+  /** @param value new PIB attribute value for macAssociatedPANCoord (0x56) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macAssociatedPANCoord(ieee154_macAssociatedPANCoord_t value);
+
+  /** @param value new PIB attribute value for macMaxBE (0x57) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macMaxBE(ieee154_macMaxBE_t value);
+
+  /** @param value new PIB attribute value for macMaxFrameTotalWaitTime (0x58) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macMaxFrameTotalWaitTime(ieee154_macMaxFrameTotalWaitTime_t value);
+
+  /** @param value new PIB attribute value for macMaxFrameRetries (0x59) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macMaxFrameRetries(ieee154_macMaxFrameRetries_t value);
+
+  /** @param value new PIB attribute value for macResponseWaitTime (0x5A) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macResponseWaitTime(ieee154_macResponseWaitTime_t value);
+
+  /** @param value new PIB attribute value for macSecurityEnabled (0x5D) 
+   *  @returns IEEE154_SUCCESS if PIB attribute was updated, INVALID_PARAMETER if 
+   *           parameter value is out of valid range and PIB was not updated */
+  command ieee154_status_t macSecurityEnabled(ieee154_macSecurityEnabled_t value);
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_START.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_START.nc
new file mode 100644
index 00000000..cc895f5a
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_START.nc
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-04-17 14:47:09 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * MLME-SAP start primitives define how an FFD can request to start
+ * using a new superframe configuration in order to initiate a PAN,
+ * begin transmitting beacons on an already existing PAN, thus
+ * facilitating device discovery, or to stop transmitting beacons.
+ * (IEEE 802.15.4-2006, Sect. 7.1.14)
+ */
+
+#include "TKN154.h"
+interface MLME_START {
+
+  /**
+   * Requests to start using a new superframe configuration.
+   * 
+   * @param PANId The PAN identifier to be used by the device
+   * @param LogicalChannel The logical channel on which to start transmitting
+   *                       beacons
+   * @param ChannelPage The channel page on which to begin using the new 
+   *                    superframe configuration.
+   * @param StartTime The time at which to begin transmitting beacons. If this
+   *                  parameter is equal to 0x000000, beacon transmissions 
+   *                  will begin immediately. Otherwise, the specified time is
+   *                  relative to the received beacon of the coordinator with
+   *                  which the device synchronizes.
+   *                  This parameter is ignored if either the beaconOrder 
+   *                  parameter has a value of 15 or the panCoordinator
+   *                  parameter is TRUE.The time is specified in symbols and
+   *                  is rounded to a backoff slot boundary. This is a 24-bit
+   *                  value, and the precision of this value shall be a
+   *                  minimum of 20 bits, with the lowest 4 bits being the 
+   *                  least significant.
+   * @param BeaconOrder The beacon order of the superframe
+   * @param SuperframeOrder The superframe order of the superframe
+   * @param PanCoordinator If TRUE, the device will become the PAN coordinator
+   *                       of a new PAN.  If FALSE, the device will begin
+   *                       transmitting beacons on the PAN with which it 
+   *                       is associated
+   * @param BatteryLifeExtension If TRUE, the receiver of the beaconing
+   *                             device is disabled after the IFS period
+   * @param CoordRealignment TRUE if a coordinator realignment command is to
+   *                         be transmitted prior to changing the superframe
+   *                         configuration
+   * @param coordRealignSecurity The security options for the coordinator
+   *                         realignment command (NULL means security
+   *                         is disabled)
+   * @param beaconSecurity The security options for beacon frames
+   *                         (NULL means security is disabled)
+   *
+   * @return       IEEE154_SUCCESS if the request succeeded and a confirm event
+   *               will be signalled, an appropriate error code otherwise 
+   *               (no confirm event will be signalled in this case)
+   * @see          confirm
+  */
+  command ieee154_status_t request  (
+                          uint16_t PANId,
+                          uint8_t LogicalChannel,
+                          uint8_t ChannelPage,
+                          uint32_t StartTime,
+                          uint8_t BeaconOrder,
+                          uint8_t SuperframeOrder,
+                          bool PanCoordinator,
+                          bool BatteryLifeExtension,
+                          bool CoordRealignment,
+                          ieee154_security_t *coordRealignSecurity,
+                          ieee154_security_t *beaconSecurity
+                        );
+
+  /**
+   * Signalled in response to a successful request.
+   * Reports the results of the attempt to start using a new superframe
+   * configuration
+   *
+   * @param status The result of the attempt to start using an 
+   *               updated superframe configuration
+   */
+  event void confirm    (
+                          ieee154_status_t status
+                        );
+
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_SYNC.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_SYNC.nc
new file mode 100644
index 00000000..c4d33fb5
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_SYNC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * MLME-SAP synchronization primitives define how synchronization with
+ * a coordinator may be achieved and how a loss of synchronization is
+ * communicated to the next higher layer. (IEEE 802.15.4-2006, Sect.
+ * 7.1.15)
+ */
+
+interface MLME_SYNC {
+
+  /**
+   * Requests to synchronize with the coordinator by acquiring and, if
+   * specified, tracking its beacons.
+   * 
+   * @param LogicalChannel Logical channel on which to attempt coordinator
+   *                       synchronization
+   * @param ChannelPage The channel page on which to attempt coordinator
+   *                    synchronization.
+   * @param TrackBeacon TRUE if the MLME is to synchronize with the next
+   *                    beacon and attempt to track all future beacons.
+   *                    FALSE if the MLME is to synchronize with only the
+   *                    next beacon.
+   * @return       IEEE154_SUCCESS if the request succeeded and the device
+   *               is now trying to acquire synchronization with the coordinator.
+   *               Note: the MLME_SYNC_LOSS interface is used to signal
+   *               when synchronization was lost (or never acquired)
+   */
+  command ieee154_status_t request  (
+                          uint8_t LogicalChannel,
+                          uint8_t ChannelPage,
+                          bool TrackBeacon
+                        );
+
+}
diff --git a/tos/lib/mac/tkn154/interfaces/MLME/MLME_SYNC_LOSS.nc b/tos/lib/mac/tkn154/interfaces/MLME/MLME_SYNC_LOSS.nc
new file mode 100644
index 00000000..fb5acee9
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/MLME/MLME_SYNC_LOSS.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * MLME-SAP synchronization primitives define how synchronization with
+ * a coordinator may be achieved and how a loss of synchronization is
+ * communicated to the next higher layer. (IEEE 802.15.4-2006, Sect.
+ * 7.1.15)
+ */
+
+#include "TKN154.h"
+interface MLME_SYNC_LOSS {
+
+  /**
+   * Indicates the loss of synchronization with a coordinator
+   *
+   * @param lossReason The reason that synchronization was lost
+   * @param PANId The PAN identifier with which the device lost 
+   *              synchronization or to which it was realigned.
+   * @param LogicalChannel The logical channel on which the device lost
+                           synchronization or to which it was realigned.
+   * @param ChannelPage The channel page on which the device lost 
+   *                    synchronization or to which it was realigned.
+   * @param security        The security options, NULL means security is 
+   *                        disabled.
+   */
+  event void indication (
+                          ieee154_status_t lossReason,
+                          uint16_t PANId,
+                          uint8_t LogicalChannel,
+                          uint8_t ChannelPage,
+                          ieee154_security_t *security
+                        );
+
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/DataRequest.nc b/tos/lib/mac/tkn154/interfaces/private/DataRequest.nc
new file mode 100644
index 00000000..e73185d5
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/DataRequest.nc
@@ -0,0 +1,53 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-06-16 18:00:32 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+interface DataRequest
+{
+  /**
+   * Sends a data request frame to the coordinator. 
+   *
+   * @param CoordAddrMode coordinator address mode
+   * @param CoordPANId coordinator PAN ID
+   * @param CoordAddressLE points to coordinator address stored in 
+   *                       little endian format
+   * @param SrcAddrMode source address mode
+   * @returns IEEE154_SUCCESS if a data request frame will be transmitted and
+   * only then pollDone will be signalled. 
+   **/
+  command ieee154_status_t poll(uint8_t CoordAddrMode, uint16_t CoordPANId, uint8_t *CoordAddressLE, uint8_t SrcAddrMode);
+
+
+  /**
+   * Signalled in response to a successful poll command
+   **/
+  event void pollDone();
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/EnergyDetection.nc b/tos/lib/mac/tkn154/interfaces/private/EnergyDetection.nc
new file mode 100644
index 00000000..e048a90b
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/EnergyDetection.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:42 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154_MAC.h"
+interface EnergyDetection
+{
+  /**
+   * Requests to measure the energy level on the current channel; the
+   * measurement should last for <tt>duration</tt> symbols and the  
+   * maximum energy level is signalled through the <tt>done</tt>
+   * event.
+   *
+   * @param duration Duration of the energy detection measurement 
+   * (in symbol time)
+   * @return SUCCESS if the request was accepted and only then 
+   * the <tt>done</tt> event will be signalled, FAIL otherwise
+   **/
+  command error_t start(uint32_t duration);
+
+  /**
+   * Signalled in response to a call to <tt>start</tt>;
+   * returns the maximum energy measured on the channel over the
+   * specified period of time.
+   *
+   * @param status SUCCESS if the measurement succeeded
+   * and only then <tt>EnergyLevel</tt> is valid, FAIL 
+   * otherwise
+   * @param EnergyLevel The maximum energy on the channel
+   **/
+  event void done(error_t status, int8_t EnergyLevel);
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/FrameExtracted.nc b/tos/lib/mac/tkn154/interfaces/private/FrameExtracted.nc
new file mode 100644
index 00000000..d1527259
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/FrameExtracted.nc
@@ -0,0 +1,44 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-06-16 18:00:32 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154_MAC.h"
+interface FrameExtracted
+{
+  /** 
+   * A frame was extracted from the coordinator.
+   *
+   * @param rxFrame The frame received from the coordinator
+   * @param txFrame The data request frame sent to the coordinator
+   * @return A frame buffer for the stack to use for the next received frame
+   **/
+  event message_t* received(message_t* rxFrame, ieee154_txframe_t *txFrame);
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/FrameRx.nc b/tos/lib/mac/tkn154/interfaces/private/FrameRx.nc
new file mode 100644
index 00000000..06c671c4
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/FrameRx.nc
@@ -0,0 +1,44 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:31:44 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154_MAC.h"
+interface FrameRx
+{
+  /**
+   * Received a frame.
+   *
+   * @param   frame     the received frame
+   * @return            a buffer to be used by the stack for the next 
+   *                    incoming frame 
+   */
+  event message_t* received(message_t* frame);
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/FrameTx.nc b/tos/lib/mac/tkn154/interfaces/private/FrameTx.nc
new file mode 100644
index 00000000..b80efd94
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/FrameTx.nc
@@ -0,0 +1,52 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:44 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154_MAC.h"
+interface FrameTx
+{
+  /**
+   * Transmits a frame.
+   *
+   * @param  txFrame    the frame to transmit
+   * @return IEEE154_SUCCESS if the request was accepted and
+   * only then <tt>transmitDone()</tt> will be signalled
+   */  
+  command ieee154_status_t transmit(ieee154_txframe_t *txFrame); 
+
+  /**
+   * Signals the completion of the transmission of a frame.
+   *
+   * @param  txFrame    the frame that was transmitted
+   * @param  status     the result of the transmission
+   */  
+  event void transmitDone(ieee154_txframe_t *txFrame, ieee154_status_t status);
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/FrameTxNow.nc b/tos/lib/mac/tkn154/interfaces/private/FrameTxNow.nc
new file mode 100644
index 00000000..0a2b802e
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/FrameTxNow.nc
@@ -0,0 +1,54 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:44 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154_MAC.h"
+interface FrameTxNow
+{
+  /**
+   * Transmits a frame.
+   *
+   * @param  txFrame    the frame to transmit
+   * @return IEEE154_SUCCESS if the request was accepted and
+   * only then <tt>transmitDone()</tt> will be signalled
+   */  
+  async command ieee154_status_t transmitNow(ieee154_txframe_t *frame); 
+
+
+  /**
+   * Signals the completion of the transmission of a frame.
+   *
+   * @param  txFrame    the frame that was transmitted
+   * @param  status     the result of the transmission
+   */  
+  
+  async event void transmitNowDone(ieee154_txframe_t *frame, ieee154_status_t status);
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/FrameUtility.nc b/tos/lib/mac/tkn154/interfaces/private/FrameUtility.nc
new file mode 100644
index 00000000..3a909658
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/FrameUtility.nc
@@ -0,0 +1,65 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $ $Date: 2008-06-16 18:00:33 $ 
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154.h" 
+interface FrameUtility
+{
+  /* Writes the addressing fields in the MAC header of a frame
+   * and returns number of bytes in the MAC header.*/
+  async command uint8_t writeHeader(
+      uint8_t* mhr,
+      uint8_t DstAddrMode,
+      uint16_t DstPANId,
+      ieee154_address_t* DstAddr,
+      uint8_t SrcAddrMode,
+      uint16_t SrcPANId,
+      const ieee154_address_t* SrcAddr,
+      bool PANIDCompression);
+
+  /* Determines the lenght of the MAC header depending on the frame control field*/ 
+  async command error_t getMHRLength(uint8_t fcf1, uint8_t fcf2, uint8_t *len);
+
+  /* Returns TRUE if source address is the current coordinator and
+   * src PAN is current PAN */
+  command bool isBeaconFromCoord(message_t *frame);
+
+  /* writes the local extended address in little endian format */
+  async command void copyLocalExtendedAddressLE(uint8_t *destLE);
+
+  /* writes the coordinator's extended address in little endian format */
+  command void copyCoordExtendedAddressLE(uint8_t *destLE);
+
+  /* converts a uint64_t to little endian */
+  async command void convertToLE(uint8_t *destLE, const uint64_t *srcNative);
+
+  /* converts little endian to a uint64_t */
+  async command void convertToNative(uint64_t *destNative, const uint8_t *srcLE);
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/Purge.nc b/tos/lib/mac/tkn154/interfaces/private/Purge.nc
new file mode 100644
index 00000000..81595178
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/Purge.nc
@@ -0,0 +1,39 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-06-16 18:00:33 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154.h"
+interface Purge {
+  /* purges a frame from the transaction queue */
+  command ieee154_status_t purge(uint8_t msduHandle);
+  event void purgeDone(ieee154_txframe_t *txFrame, ieee154_status_t status);
+}
+
diff --git a/tos/lib/mac/tkn154/interfaces/private/RadioOff.nc b/tos/lib/mac/tkn154/interfaces/private/RadioOff.nc
new file mode 100644
index 00000000..b570d2c3
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/RadioOff.nc
@@ -0,0 +1,61 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:44 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+interface RadioOff
+{
+  /** 
+   * Disables the transceiver and changes the radio state to RADIO_OFF. This
+   * command will succeed only if the current state of the radio is RECEIVING.
+   *
+   * @return SUCCESS if the command was accepted and the <tt>offDone()</tt>
+   * event will be signalled; EALREADY if the radio is already switched off,
+   * i.e. in state RADIO_OFF; FAIL if the radio was not switched of because 
+   * the current state is not RECEIVING.
+   */
+  async command error_t off();
+
+  /** 
+   * Signalled in response to a successful call to <tt>off()</tt>. The radio is
+   * now in the state RADIO_OFF.
+   **/  
+  async event void offDone();
+
+  /** 
+   * Tells whether the radio is in state RADIO_OFF.
+   *
+   * @return TRUE if the radio is in the state RADIO_OFF, FALSE otherwise 
+   */
+  async command bool isOff(); 
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/RadioRx.nc b/tos/lib/mac/tkn154/interfaces/private/RadioRx.nc
new file mode 100644
index 00000000..d3c125f0
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/RadioRx.nc
@@ -0,0 +1,86 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:44 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "TKN154_platform.h"
+interface RadioRx
+{
+  /** 
+   * Switches the radio to receive mode at time <tt>t0 + dt</tt> or immediately
+   * if <tt>t0 + dt</tt> lies in the past. Analogous to the <tt>Timer</tt>
+   * interface <tt>t0</tt> is interpreted as a time in the past. Consequently,
+   * if <tt>dt = 0</tt> then the radio is always switched to receive mode
+   * immediately. This command will fail, if the radio is currently not in
+   * state RADIO_OFF. Once the radio is in receive mode an event
+   * <tt>enableRxDone</tt> will be signalled.
+   *
+   * @param t0 Reference time for receive operation  
+   *
+   * @param dt A positive offset relative to <tt>t0</tt>.  
+   *
+   * @return SUCCESS if the command was accepted and only then the
+   * <tt>enableRxDone()</tt> event will be signalled; FAIL, if the command was
+   * not accepted, because the radio is currently not in the state RADIO_OFF.
+   */
+  async command error_t enableRx(uint32_t t0, uint32_t dt);
+
+  /** 
+   * Signalled in response to a successful call to <tt>enableRx()</tt>. This
+   * event is completing the <tt>enableRx()</tt> operation, the radio is now in
+   * the state RECEIVING. It will stay in receive mode until it is switched off
+   * through the <tt>RadioOff</tt> interface. Received frames will be signalled
+   * through the <tt>received()</tt> event.
+   **/    
+  async event void enableRxDone(); 
+
+  /**
+   * Tells whether the radio is in state RECEIVING, i.e. in receive
+   * mode.
+   *
+   * @return TRUE if the radio is in the state RECEIVING, FALSE otherwise 
+   */
+  async command bool isReceiving();
+
+  /** 
+   * A frame was received and passed the filters described in 
+   * IEEE 802.15.4-2006 Sec. 7.5.6.2 ("Reception and rejection").
+   *
+   * @param frame The received frame  
+   *
+   * @return            a buffer to be used by the driver for the next 
+   *                    incoming frame 
+   */
+  event message_t* received(message_t *frame); 
+}
+
diff --git a/tos/lib/mac/tkn154/interfaces/private/RadioTx.nc b/tos/lib/mac/tkn154/interfaces/private/RadioTx.nc
new file mode 100644
index 00000000..25972a9d
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/RadioTx.nc
@@ -0,0 +1,84 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:44 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154_MAC.h"
+#include "TKN154_platform.h"
+
+interface RadioTx 
+{
+  /** 
+   * Transmits a frame at time <tt>t0 + dt</tt> or immediately if <tt>t0 +
+   * dt</tt> lies in the past. The frame is transmitted regardless of the
+   * channel condition (without prior CCA). Analogous to the <tt>Timer</tt> 
+   * interface <tt>t0</tt> is interpreted as a time in the past. If 
+   * <tt>dt</tt> is zero then the frame is transmitted immediately. This
+   * command will fail, if the radio is currently not in state RADIO_OFF.
+   *
+   * Iff the ACK_REQUESTED flag is set in the frame's header a successful
+   * transmission will include an acknowledgement from the destination; then,
+   * the callee will perform the necessary steps for receiving this
+   * acknowledgement following the specification in IEEE 802.15.4-2006 Sect.
+   * 7.5.6.4. 
+   *
+   * @param frame The frame to transmit
+   *
+   * @param t0 Reference time for transmission
+   *
+   * @param dt A positive offset relative to <tt>t0</tt>
+   * 
+   * @return SUCCESS if the transmission was triggered successfully and only
+   * then <tt>transmitDone()</tt> will be signalled; FAIL, if the command was
+   * not accepted, because the radio is currently not in the state RADIO_OFF;
+   * EINVAL if <tt>frame</tt> or a pointer therein is invalid, or the length
+   * of the frame is invalid
+   */
+  async command error_t transmit(ieee154_txframe_t *frame, uint32_t t0, uint32_t dt);
+
+  /**
+   * Signalled in response to a call to <tt>transmit()</tt> and completing 
+   * the transmission of a frame. The radio is now back in state RADIO_OFF. 
+   * The time of the transmission -- the point in time when the first bit of the
+   * PPDU was transmitted -- is given by <tt>timestamp</tt>. Since the
+   * frame was transmitted without CCA the transmission can only have
+   * failed if no acknowledgement was received although one was requested.
+   *
+   * @param frame The frame that was transmitted.  
+   *
+   * @param result SUCCESS if the frame was transmitted (and a matching
+   * acknowledgement was received, if requested); ENOACK if the frame was 
+   * transmitted, but no matching acknowledgement was received although one
+   * was requested     
+   **/
+  async event void transmitDone(ieee154_txframe_t *frame, error_t result);
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/SlottedCsmaCa.nc b/tos/lib/mac/tkn154/interfaces/private/SlottedCsmaCa.nc
new file mode 100644
index 00000000..5577ed5d
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/SlottedCsmaCa.nc
@@ -0,0 +1,117 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-03-04 18:31:45 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154_MAC.h"
+#include "TKN154_PHY.h"
+
+interface SlottedCsmaCa 
+{
+  /** 
+   * Transmits a frame using the slotted CSMA-CA algorithm as specified in IEEE
+   * 802.15.4-2006 standard Sect. 7.5.1.4. This command will fail if the
+   * current state of the radio is not RADIO_OFF. The initial CSMA-CA
+   * parameters are passed as a parameter and may be modified by the callee.
+   * The caller must not access <tt>csma</tt> until the <tt>transmitDone</tt>
+   * event has been signalled.
+   *
+   * <tt>slot0Time</tt> defines the beginning of the first slot in the CAP.
+   * Any transmission must commence on a backoff slot boundary relative to
+   * <tt>slot0Time</tt>. The last possible time for transmission is defined by
+   * <tt>slot0Time+dtMax</tt>. If the transmission cannot commence at or before
+   * <tt>slot0Time+dtMax</tt> then an event <tt>transmitDone()</tt> with error
+   * code ERETRY will be signalled and <tt>csma</tt> will reflect the current
+   * state of the CSMA-CA algorithm. The caller can then resume the
+   * transmission of this frame in the next CAP based on the
+   * <tt>remainingBackoff</tt> passed in the <tt>transmitDone()</tt> event, by
+   * setting <tt>resume</tt> to TRUE in the <tt>transmit()</tt> call.
+   *
+   * Iff the ACK_REQUESTED flag is set in the frame's header a successful
+   * transmission will include an acknowledgement from the destination; then,
+   * the callee will perform the necessary steps for receiving this
+   * acknowledgement following the specification in IEEE 802.15.4-2006 Sect.
+   * 7.5.6.4. 
+   * 
+   * @param frame The frame to transmit.
+   *
+   * @param csma Initial parameters for the slotted CSMA-CA algorithm. 
+   *
+   * @param slot0Time Reference time for the backoff slot boundaries  
+   *
+   * @param dtMax <tt>slot0Time+dtMax</tt> is the last time the frame may be 
+   *              transmitted.
+   *
+   * @param resume TRUE means that the initial backoff is defined by the
+   *               <tt>remainingBackoff</tt> parameter, FALSE means the 
+   *               <tt>remainingBackoff</tt> is to be ignored.
+   *
+   * @param remainingBackoff initial backoff (ignored if <tt>resume</tt>
+   * is FALSE.
+   *
+   * @return SUCCESS if the slotted CSMA-CA was triggered successfully;
+   * EINVAL if <tt>frame</tt> or a pointer therein is invalid; FAIL otherwise.
+   */
+  async command error_t transmit(ieee154_txframe_t *frame, ieee154_csma_t *csma,
+      uint32_t slot0Time, uint32_t dtMax, bool resume, uint16_t remainingBackoff);
+
+  /**
+   * Signalled in response to a call to <tt>transmit()</tt>. This event
+   * completes the <tt>transmit</tt> operation. A transmission failed if either
+   * the channel was never idle during any of the <tt>macMaxCsmaBackoffs+1</tt>
+   * transmission attempts, if no acknowledgement was received although one was
+   * requested or if the frame could not be transmitted before the specified
+   * deadline (<tt>slot0Time+dtMax</tt>).
+   *
+   * @param frame The frame that was to be transmitted.  
+   *
+   * @param csma Parameters for the slotted CSMA-CA algorithm; this pointer is
+   * identical to the one passed to the <tt>transmit</tt> command, the content,
+   * however, may have changed.
+   *
+   * @param ackPendingFlag TRUE if an acknowledgement was received and the
+   * "pending" flag is set in the header of the ACK frame, FALSE otherwise
+   * (this is typically only relevant for indirect transmissions)
+   * 
+   * @param remainingBackoff Only valid if <tt>result = ERETRY</tt>, and
+   * then it describes the remaining backoff time (in symbols) to be used
+   * for the transmission of the frame in the following CAP.   
+   *
+   * @result result SUCCESS if the the frame was transmitted (and a matching
+   * acknowledgement was received, if requested); FAIL if the CSMA-CA algorithm
+   * failed because NB > macMaxCsmaBackoffs; ERETRY if the frame could not be 
+   * transmitted because transmission would have started later than 
+   * <tt>slot0Time+dtMax</tt>
+   */
+  async event void transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, 
+      bool ackPendingFlag,  uint16_t remainingBackoff, error_t result);
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/SuperframeStructure.nc b/tos/lib/mac/tkn154/interfaces/private/SuperframeStructure.nc
new file mode 100644
index 00000000..14fe35a7
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/SuperframeStructure.nc
@@ -0,0 +1,116 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-03-04 18:31:45 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /* A superframe is bounded by beacons and divided into 16 equally-sized slots,
+  * which are part of either CAP or CFP (GTS). This interface can be used to
+  * determine the various parameters of a superframe, for example the begin of
+  * the inactive period would be calculated as:
+  *
+  *    sfStartTime + (numCapSlot + numGtsSlots) * sfSlotDuration
+  *
+  **/
+
+interface SuperframeStructure 
+{
+  /**
+   * Returns the absolute time (in symbols) when the superframe started, 
+   * i.e. the timestamp of the beacon marking the first slot.
+   * 
+   * @returns  superframe start time 
+   **/
+  async command uint32_t sfStartTime(); 
+
+  /**
+   * Duration (in symbols) of a single superframe slot.
+   * Zero means, the CAP is not valid (no valid beacon was received).
+   * 
+   * @returns  superframe slot duration
+   **/
+  async command uint32_t sfSlotDuration();
+
+  /**
+   * Number of CAP slots.
+   * 
+   * @returns  number of CAP slots
+   **/
+  async command uint8_t numCapSlots();
+
+  /**
+   * Number of GTS slots.
+   * 
+   * @returns  number of GTS slots
+   **/
+  async command uint8_t numGtsSlots();
+
+  /**
+   * Duration of the battery life extension period (in symbols), 
+   * Zero means battery life extension is not used (disabled).
+   * 
+   * @returns  duration of the battery life extension period, 
+   * zero means battery life extension is disabled
+   **/
+  async command uint16_t battLifeExtDuration();     
+
+  /**
+   * Returns a pointer to the content of the GTS fields of the 
+   * last received/transmitted beacon. 
+   * 
+   * @returns GTS fields 
+   **/
+  async command const uint8_t* gtsFields();
+
+  /**
+   * The last "guardTime" symbols of CAP/CFP should not be used,
+   * i.e. transmission/reception should stop "guardTime" symbols
+   * before the actual end of the CAP/CFP.
+   * 
+   * @returns guard time
+   **/
+  async command uint16_t guardTime();
+
+  /**
+   * Tells whether the frame pending bit is set in the header
+   * of the beacon frame.
+   * 
+   * @returns TRUE is frame pending bit in beacon header is set, FALSE otherwise
+   **/
+  async command bool isBroadcastPending();  
+
+  /**
+   * The beacon interval (in symbols) in which the superframe is embedded.
+   *
+   * @returns beacon interval
+   **/
+  async command uint32_t beaconInterval();
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/TimeCalc.nc b/tos/lib/mac/tkn154/interfaces/private/TimeCalc.nc
new file mode 100644
index 00000000..15c41a7f
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/TimeCalc.nc
@@ -0,0 +1,48 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-06-16 18:00:34 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+interface TimeCalc
+{
+  /**
+   * Returns the interval between time t1 and time t0 assuming
+   * that t0 happened before t1.
+   * @return interval between t1 and t0
+   */
+  async command uint32_t timeElapsed(uint32_t t0, uint32_t t1);
+
+  /**
+   * Assuming that t0 lies in the past, this command returns TRUE
+   * iff t0+dt lies also in the past.
+   * @return TRUE if t0+dt is later than "now"
+   */
+  async command bool hasExpired(uint32_t t0, uint32_t dt);
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/TransferableResource.nc b/tos/lib/mac/tkn154/interfaces/private/TransferableResource.nc
new file mode 100644
index 00000000..f65ae221
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/TransferableResource.nc
@@ -0,0 +1,146 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+  /** 
+   * This interface is the same as the standard <tt>Resource</tt> 
+   * interface, except that it has one new command <tt>transferTo()</tt> 
+   * and one new event <tt>transferred()</tt>, which allow to pass 
+   * the resource from one component to another.
+   *
+   * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+   */
+
+interface TransferableResource
+{
+  /**
+   * Request access to a shared resource. You must call release()
+   * when you are done with it.
+   *
+   * @return SUCCESS When a request has been accepted. The granted()
+   *                 event will be signaled once you have control of the
+   *                 resource.<br>
+   *         EBUSY You have already requested this resource and a
+   *               granted event is pending
+   */
+  async command error_t request();
+
+  /**
+  * Request immediate access to a shared resource. You must call release()
+  * when you are done with it.
+  *
+  * @return SUCCESS When a request has been accepted. <br>
+  *            FAIL The request cannot be fulfilled
+  */
+  async command error_t immediateRequest();
+
+  /**
+   * You are now in control of the resource.
+   */
+  event void granted();
+
+  /** 
+   * Transfers ownership of a resource to another client, which will in turn
+   * be signalled the <tt>transferred()</tt> event. This command may override 
+   * the default queueing policy.
+   *
+   * @param dstClient The identifier of the client to transfer the resource to.
+   *
+   * @return SUCCESS If ownership has been transferred; FAIL if ownership has
+   * not been transferred, because the caller is not owner of the resource or
+   * a client with the identifer <tt>dstClient</tt> is not present.
+   */   
+  async command error_t transferTo(uint8_t dstClient); 
+
+  /** 
+   * Another client transferred ownership of the resource to you by calling
+   * the <tt>transfer()</tt> command, i.e. you are now in control of the resource.
+   *
+   * @param srcClient The identifier of the client that transferred the resource to you.
+   */
+  async event void transferredFrom(uint8_t srcClient); 
+
+  /**
+  * Release a shared resource you previously acquired.  
+  *
+  * @return SUCCESS The resource has been released <br>
+  *         FAIL You tried to release but you are not the
+  *              owner of the resource 
+  *
+  * @note This command should never be called between putting in a request 	  
+  *       and waiting for a granted event.  Doing so will result in a
+  *       potential race condition.  There are ways to guarantee that no
+  *       race will occur, but they are clumsy and overly complicated.
+  *       Since it doesn't logically make since to be calling
+  *       <code>release</code> before receiving a <code>granted</code> event, 
+  *       we have opted to keep thing simple and warn you about the potential 
+  *       race.
+  */
+  async command error_t release();
+
+  /**
+   *  Check if the user of this interface is the current
+   *  owner of the Resource
+   *  @return TRUE  It is the owner <br>
+   *             FALSE It is not the owner
+   */
+  async command bool isOwner();
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/UnslottedCsmaCa.nc b/tos/lib/mac/tkn154/interfaces/private/UnslottedCsmaCa.nc
new file mode 100644
index 00000000..af1ba450
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/UnslottedCsmaCa.nc
@@ -0,0 +1,90 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-03-04 18:31:45 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154_MAC.h"
+#include "TKN154_platform.h"
+
+interface UnslottedCsmaCa
+{
+  /** 
+   * Transmits a frame using the unslotted CSMA-CA algorithm as specified in 
+   * IEEE 802.15.4-2006 standard Sect. 7.5.1.4. This command will fail if the
+   * current state of the radio is not RADIO_OFF. The initial CSMA-CA parameters
+   * are passed as a parameter and may be modified by the callee. The caller
+   * must not access <tt>csma</tt> until the <tt>transmitDone</tt> event
+   * has been signalled. 
+   *
+   * Iff the ACK_REQUESTED flag is set in the frame's header a successful 
+   * transmission will include an acknowledgement from the destination; 
+   * then, the callee will perform the necessary steps for receiving this
+   * acknowledgement following the specification in IEEE 802.15.4-2006 
+   * Sect. 7.5.6.4. 
+   * 
+   * @param frame The frame to transmit.
+   *
+   * @param csma Parameters for the unslotted CSMA-CA algorithm. 
+   *
+   * @return SUCCESS if the unslotted CSMA-CA algorithm was triggered 
+   * successfully; EINVAL if <tt>frame</tt> or a pointer therein is invalid; 
+   * FAIL if the radio is not in state RADIO_OFF.
+   */
+  async command error_t transmit(ieee154_txframe_t *frame, ieee154_csma_t *csma);
+
+  /**
+   * Signalled in response to a call to <tt>transmit()</tt>. This event completes
+   * the <tt>transmit</tt> operation. If the transmission succeeded then
+   * the time of the transmission -- the point in time when the first bit of the
+   * PPDU was transmitted -- will be stored in the metadata field of the frame. 
+   * A transmission failed if either all CCA operation(s) failed (including
+   * backoffs, i.e. NB > macMaxCsmaBackoffs) or if no acknowledgement was received
+   * although one was requested.
+   *
+   * @param frame The frame that was to be transmitted.  
+   *
+   * @param csma Parameters for the unslotted CSMA-CA algorithm; this
+   * pointer is identical to the one passed to the <tt>transmit</tt> command,
+   * the content, however, may have changed.
+   *
+   * @param ackPendingFlag TRUE if an acknowledgement was received and the
+   * "pending" flag is set in the header of the ACK frame, FALSE otherwise
+   * (this is typically only relevant for indirect transmissions)
+   *
+   * @param result SUCCESS if the frame was transmitted (and a matching
+   * acknowledgement was received, if requested); ENOACK if the frame was 
+   * transmitted, but no matching acknowledgement was received, although one
+   * was requested; FAIL if the CSMA-CA algorithm failed because 
+   * NB > macMaxCsmaBackoffs.  
+   */
+  async event void transmitDone(ieee154_txframe_t *frame, ieee154_csma_t *csma, bool ackPendingFlag, error_t result);
+}
diff --git a/tos/lib/mac/tkn154/interfaces/private/WriteBeaconField.nc b/tos/lib/mac/tkn154/interfaces/private/WriteBeaconField.nc
new file mode 100644
index 00000000..cc1666e3
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/private/WriteBeaconField.nc
@@ -0,0 +1,51 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.  - Redistributions in
+ * binary form must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.  - Neither the name of the
+ * Technische Universitaet Berlin nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-06-16 18:00:34 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+interface WriteBeaconField
+{
+  /** 
+   * Writes a field inside a beacon frame (either "GTS fields" 
+   * or "Pending address field", see Fig. 44). IMPORTANT:
+   * the pointer <tt>lastBytePtr</tt> points to the address of
+   * the last byte that the callee may write. E.g. assume
+   * we want to write a GTS information field of total 4 byte, 
+   * the "GTS Specification" byte would be written at lastBytePtr[-3],
+   * the "GTS Directions" field at at lastBytePtr[-2] and so on.
+   *
+   * @param lastBytePtr Address of last byte to write
+   *
+   * @param maxlen Maximum number of bytes that may be written
+   * 
+   * @return The number of bytes that have actually been written
+   */  
+  command uint8_t write(uint8_t *lastBytePtr, uint8_t maxlen);
+}
diff --git a/tos/lib/mac/tkn154/interfaces/public/IEEE154BeaconFrame.nc b/tos/lib/mac/tkn154/interfaces/public/IEEE154BeaconFrame.nc
new file mode 100644
index 00000000..17cb5a00
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/public/IEEE154BeaconFrame.nc
@@ -0,0 +1,141 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-09-07 15:29:20 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * The IEEE154BeaconFrame interface allows to access the content of a beacon
+ * frame.
+ */
+
+#include <TKN154.h>
+
+interface IEEE154BeaconFrame 
+{
+ 
+ /**
+   * Reads the Pending Address Specification of a beacon frame.
+   *
+   * @param frame         the beacon frame
+   * @param pendAddrSpec  a pointer to where the Pending Address 
+   *                      Specification should be written
+   * @return              FAIL if the frame is not a beacon frame,
+   *                      SUCCESS otherwise
+   */
+  command error_t getPendAddrSpec(message_t* frame, uint8_t* pendAddrSpec);
+
+ /**
+   * Reads the Pending Addresses of a given type (short or extended) from a 
+   * beacon frame.
+   *
+   * @param frame         the beacon frame
+   * @param addrMode      the address mode of the sought addresses, either 
+   *                      ADDR_MODE_SHORT_ADDRESS or ADDR_MODE_EXTENDED_ADDRESS
+   * @param buffer        a pointer to an array of "bufferSize" addresses
+   * @param bufferSize    number of address entries in the buffer
+   *
+   * @return              FAIL if the frame is not a beacon frame,
+   *                      SUCCESS otherwise
+   */
+  command error_t getPendAddr(message_t* frame, uint8_t addrMode, 
+      ieee154_address_t buffer[], uint8_t bufferSize);
+
+ /**
+   * Determines whether the local macShortAddress or aExtendedAddress
+   * (as currently registered in the PIB) is part of the pending 
+   * address list of a beacon.
+   *
+   * @param frame the beacon frame
+   * 
+   * @return      ADDR_MODE_NOT_PRESENT if the frame is not a beacon
+   *              beacon frame, or the local address is not part of
+   *              the pending address list,
+   *              ADDR_MODE_SHORT_ADDRESS if the local macShortAddress 
+   *              is part of the pending address list,
+   *              ADDR_MODE_EXTENDED_ADDRESS if the local aExtendedAddress
+   *              is part of the pending address list
+   */
+  command uint8_t isLocalAddrPending(message_t* frame);
+
+ /**
+   * Parses the PAN Descriptor of a beacon frame. Since a frame
+   * does not include information about the channel that it was 
+   * received on this information must be provided by the caller. 
+   *
+   * @param frame          the beacon frame
+   * @param LogicalChannel will be written to PANDescriptor->LogicalChannel
+   * @param ChannelPage    will be written to PANDescriptor->ChannelPage
+   * @param PANDescriptor  a pointer to a PAN Descriptor, that will hold 
+   *                       the PAN Descriptor as parsed of the beacon frame 
+   * @param bufferSize     number of address entries in the buffer
+   *
+   * @return               SUCCESS if the frame is a valid beacon frame and the 
+   *                       PANDescriptor was successfully parsed, FAIL
+   *                       otherwise
+   */
+  command error_t parsePANDescriptor(message_t *frame, uint8_t LogicalChannel,
+      uint8_t ChannelPage, ieee154_PANDescriptor_t *pdescriptor);  
+
+ /**
+   * Returns a pointer to the beacon payload.
+   *
+   * @param frame         the beacon frame
+   * @return              a pointer to the beacon payload, or, if the
+   *                      frame is not a beacon frame, a pointer to
+   *                      the MAC payload. If the frame was received
+   *                      while in promiscuous mode, then this command
+   *                      returns a pointer to the first byte of the MHR.
+   */
+  command void* getBeaconPayload(message_t* frame);
+
+  /**
+    * Returns the length of the beacon payload portion of the frame
+    * (in byte).
+    *
+    * @param  frame   the frame 
+    * @return         the length (in byte) of the frame's beacon payload
+    *                 portion, or, if the frame is not a beacon frame 
+    *                 the length of the MAC payload. If the frame 
+    *                 was received while in promiscuous mode, then 
+    *                 this command returns the length of MHR + MAC Payload.
+    */
+  command uint8_t getBeaconPayloadLength(message_t* frame);
+
+ /**
+   * Returns the (beacon) sequence number of the frame.
+   *
+   * @param frame     the frame
+   * @return          sequence number of the frame
+   */
+  command uint8_t getBSN(message_t* frame);  
+}
diff --git a/tos/lib/mac/tkn154/interfaces/public/IEEE154Frame.nc b/tos/lib/mac/tkn154/interfaces/public/IEEE154Frame.nc
new file mode 100644
index 00000000..f19a3c5b
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/public/IEEE154Frame.nc
@@ -0,0 +1,253 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:46 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * The IEEE154Frame interface allows to access the content of a IEEE 802.15.4
+ * frame.
+ */
+
+#include <TKN154.h>
+#include <message.h>
+
+interface IEEE154Frame 
+{
+
+ /**
+   * Returns the source addressing mode of the frame.
+   *
+   * @param frame     the frame
+   * @return          source addressing mode of the frame; either
+   *                  ADDR_MODE_NOT_PRESENT, ADDR_MODE_RESERVED,
+   *                  ADDR_MODE_SHORT_ADDRESS or ADDR_MODE_EXTENDED_ADDRESS
+   */
+  command uint8_t getSrcAddrMode(message_t* frame);    
+
+ /**
+   * Reads the source address (to be interpreted
+   * as specified by the source addressing mode) of the frame.
+   *
+   * @param frame     the frame
+   * @param address   a pointer to where the source address 
+   *                  will be written
+   * @return          SUCCESS, if the source address is present 
+   *                  and was written to "address",
+   *                  FAIL otherwise (source address remains
+   *                  unmodified)
+   */
+  command error_t getSrcAddr(message_t* frame, ieee154_address_t *address);   
+
+ /**
+   * Reads the source PAN identifier of the frame.
+   *
+   * @param frame     the frame
+   * @param PANID     a pointer to where the source PAN identifier 
+   *                  will be written
+   * @return          SUCCESS, if the source PAN identifier is present 
+   *                  and was written to "PANID", 
+   *                  FAIL otherwise (PANID remains unmodified)
+   */
+  command error_t getSrcPANId(message_t* frame, uint16_t* PANID);  
+
+ /**
+   * Returns the destination addressing mode of the frame.
+   *
+   * @param frame     the frame
+   * @return          destination addressing mode of the frame; either
+   *                  ADDR_MODE_NOT_PRESENT, ADDR_MODE_RESERVED,
+   *                  ADDR_MODE_SHORT_ADDRESS or ADDR_MODE_EXTENDED_ADDRESS
+   */
+  command uint8_t getDstAddrMode(message_t* frame);    
+
+ /**
+   * Reads the destination address (to be interpreted
+   * as specified by the destination addressing mode) of the frame.
+   *
+   * @param frame     the frame
+   * @param address   a pointer to where the destination address 
+   *                  will be written
+   * @return          SUCCESS, if the destination address is present 
+   *                  and was written to "address",
+   *                  FAIL otherwise (destination address 
+   *                  remains unmodified)
+   */
+  command error_t getDstAddr(message_t* frame, ieee154_address_t *address);   
+
+ /**
+   * Reads the destination PAN identifier of the frame.
+   *
+   * @param PANID     a pointer to where the destination 
+   *                  PAN identifier should be written
+   * @param frame     the frame
+   * @return          SUCCESS, if the destination PAN identifier 
+   *                  is present and was copied to "PANID", 
+   *                  FAIL otherwise (PANID remains unmodified)
+   */
+  command error_t getDstPANId(message_t* frame, uint16_t* PANID);  
+
+ /**
+   * Sets the addressing fields in the MAC header of a frame. The source 
+   * PAN identifier and the source address will be set automatically, their
+   * values depend on the <tt>SrcAddrMode</tt> parameter: if 
+   * <tt>SrcAddrMode</tt> is a short or extended address, then
+   * the current PIB attributes <tt>macShortAddress</tt> or 
+   * <tt>aExtendedAddress</tt> and <tt>macPANId</tt> are used.
+   *
+   * @param frame         the frame
+   * @param srcAddrMode   the source addressing mode
+   * @param dstAddrMode   the destination addressing mode
+   * @param dstPANID      the 16 bit PAN identifier of the destination
+   * @param dstAddr       individual device address of the destination as per
+   *                      the dstAddrMode
+   * @param security      the security options (NULL means security is
+   *                      disabled)
+   *                      
+   * @return          SUCCESS if the addressing fields where written,
+   *                  FAIL if a wrong addressing mode was specified
+   */
+  command error_t setAddressingFields(message_t* frame,
+                          uint8_t SrcAddrMode,
+                          uint8_t DstAddrMode,
+                          uint16_t DstPANID,
+                          ieee154_address_t *DstAddr,
+                          ieee154_security_t *security);
+
+ /**
+   * Returns a pointer to the MAC payload portion of a frame.
+   *
+   * @param frame     the frame
+   * @return          a pointer to the frame's payload 
+   */
+  command void* getPayload(message_t* frame);
+
+  /**
+    * Returns the length of the MAC payload portion of the frame (in byte). 
+    *
+    * @param  frame   the frame 
+    * @return         the length of the frame's payload (in byte)
+    */
+  command uint8_t getPayloadLength(message_t* frame);
+
+ /** 
+  * Returns the point in time when the first bit (of the PHY preamble) of the
+  * frame was received or transmitted. Time is expressed in symbols as local
+  * time (which can also be accessed via the LocalTime<T62500hz> interface
+  * provided by your platform, e.g.
+  * tos/platforms/telosb/mac/tkn154/timer/LocalTime62500hzC).  If
+  * <tt>isTimestampValid()</tt> returns FALSE then the timestamp is not valid
+  * and must be ignored.
+  *
+  * @param frame     the frame 
+  * @return          timestamp of the frame
+  */
+  command uint32_t getTimestamp(message_t* frame);  
+
+ /**
+   * Tells whether the timestamp is valid.
+   *
+   * @return          TRUE if timestamp is valid, FALSE otherwise.
+   */
+  command bool isTimestampValid(message_t* frame);  
+
+ /**
+   * Returns the sequence number of the frame.
+   *
+   * @param frame     the frame
+   * @return          sequence number of the frame
+   */
+  command uint8_t getDSN(message_t* frame);  
+
+ /**
+   * Returns the link quality level at which the frame was received.
+   *
+   * @param frame     the frame
+   * @return          link quality level 
+   */
+  command uint8_t getLinkQuality(message_t* frame);  
+
+  /**
+    * Returns the type of the frame
+    * BEACON=0, DATA=1, ACK=2, COMMAND=3.
+    *
+    * Note: For beacon frames one can use the <tt>IEEE154BeaconFrame</tt>
+    * interface to inspect additional fields of the frame.
+    *
+    * @param  frame   the frame
+    * @return         the type of the frame
+    */
+  command uint8_t getFrameType(message_t* frame);
+
+ /**
+   * Returns a pointer to the MAC header (i.e. to the first byte of 
+   * the Frame Control field).
+   *
+   * @param frame     the frame
+   * @return          a pointer to the frame's header
+   */
+  command void* getHeader(message_t* frame);
+
+  /**
+    * Returns the length of the MAC header.
+    *
+    * @param  frame   the frame 
+    * @return         the length of the MAC header (in byte)
+    */
+  command uint8_t getHeaderLength(message_t* frame);
+
+  /**
+    * Tells whether or not the frame was received while 
+    * promiscuous mode was enabled.
+    *
+    * @param  frame   the frame
+    * @return         TRUE if frame was received while in promiscuous
+    *                 mode, FALSE otherwise
+    */
+  command bool wasPromiscuousModeEnabled(message_t* frame);
+
+  /**
+    * Tells whether or not the frame has a standard compliant
+    * IEEE 802.15.4 header - this will only be relevant for frames 
+    * received while in promiscuous mode, because then no filtering
+    * (except CRC check) was applied. Note: if this command returns
+    * FALSE, then all other commands in this interface (except
+    * <tt>wasPromiscuousModeEnabled()</tt>) and the 
+    * <tt>IEEE154BeaconFrame</tt> interface return undefined values!
+    *
+    * @param  frame   the frame
+    * @return         TRUE if frame has a standard compliant header,
+    *                 FALSE otherwise
+    */
+  command bool hasStandardCompliantHeader(message_t* frame);
+
+}
diff --git a/tos/lib/mac/tkn154/interfaces/public/IEEE154TxBeaconPayload.nc b/tos/lib/mac/tkn154/interfaces/public/IEEE154TxBeaconPayload.nc
new file mode 100644
index 00000000..e3aa6ea4
--- /dev/null
+++ b/tos/lib/mac/tkn154/interfaces/public/IEEE154TxBeaconPayload.nc
@@ -0,0 +1,139 @@
+/* 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:46 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * The IEEE154TxBeaconPayload interface allows to access the payload portion of
+ * the beacon frame that is periodically transmitted by a coordinator in a
+ * beacon-enabled PAN. This interface replaces the MLME-SET command for the PIB
+ * attribute values 0x45 (macBeaconPayload) and 0x46 (macBeaconPayloadLength).
+ */
+
+#include <TKN154.h>
+
+interface IEEE154TxBeaconPayload 
+{
+  /** 
+   * Sets the beacon payload portion for all subsequently transmitted beacons.
+   * This command replaces the MLME-SET command for the PIB attribute values
+   * 0x45 (macBeaconPayload) and 0x46 (macBeaconPayloadLength). The
+   * <tt>setBeaconPayloadDone()</tt> event will be signalled when the 
+   * beacon payload has been set -- until then <tt>beaconPayload</tt> must 
+   * not be modified.
+   *
+   * @param beaconPayload   the new beacon payload
+   * @param length          the length of the new beacon payload (in byte)
+   *
+   * @return EBUSY if another transaction is pending, ESIZE if length is too big, 
+   * SUCCESS otherwise (and only then the <tt>setBeaconPayloadDone</tt> event 
+   * will be signalled)
+   */
+ command error_t setBeaconPayload(void *beaconPayload, uint8_t length);
+
+  /**
+   * Signalled in response to a <tt>setBeaconPayload()</tt> request.
+   * Indicates that the beacon payload has been copied and returns the
+   * ownership of the buffer to the next higher layer. 
+   * 
+   * @param beaconPayload   the <tt>beaconPayload</tt> passed in the 
+   *                        <tt>setBeaconPayload()</tt> command
+   * @param length          the <tt>length</tt> passed in the 
+   *                        <tt>setBeaconPayload()</tt> command
+   */
+ event void setBeaconPayloadDone(void *beaconPayload, uint8_t length);
+
+  /**
+   * Returns a pointer to the current beacon payload.
+   * 
+   * @return the current beacon payload
+   */
+ command const void* getBeaconPayload();
+
+  /**
+   * Returns the length of the current beacon payload (in byte). 
+   * 
+   * @return length of the current beacon payload
+   */
+ command uint8_t getBeaconPayloadLength();
+
+  /**
+   * Replaces (overwrites) a portion of the current beacon payload. Whenever
+   * possible, to minimize overhead, the next higher layer should prefer this
+   * command over the <tt>setBeaconPayload()</tt> command.  The
+   * <tt>modifyBeaconPayloadDone()</tt> event will be signalled when the beacon
+   * payload has been updated -- until then <tt>buffer</tt> must not be
+   * modified.
+   *
+   * @param offset      offset into the current beacon payload
+   * @param buffer      the buffer to be written 
+   * @param length      the length of the buffer
+   *
+   * @return EBUSY if another transaction is pending, ESIZE if offset+length is
+   * too big, SUCCESS otherwise (and only then the
+   * <tt>modifyBeaconPayloadDone</tt> event will be signalled)
+   */
+ command error_t modifyBeaconPayload(uint8_t offset, void *buffer, uint8_t bufferLength);
+
+  /**
+   * Signalled in response to a <tt>modifyBeaconPayload()</tt> request.
+   * Indicates that the beacon payload has been updated. 
+   * 
+   * @param offset        the <tt>offset</tt> passed in the 
+   *                      <tt>modifyBeaconPayload()</tt> command
+   * @param buffer        the <tt>buffer</tt> passed in the 
+   *                      <tt>modifyBeaconPayload()</tt> command
+   * @param bufferLength  the <tt>bufferLength</tt> passed in the 
+   *                      <tt>modifyBeaconPayload()</tt> command
+   */
+ event void modifyBeaconPayloadDone(uint8_t offset, void *buffer, uint8_t bufferLength);
+
+  /** 
+   * Indicates that a beacon frame will be transmitted "soon" and now is a good
+   * time to update the beacon payload (if desired).
+   *
+   * The usual policy is that (1) this event is signalled before every beacon
+   * transmission, and (2) that a subsequent call to <tt>setPayload</tt>
+   * will still update the beacon payload portion of this beacon. However, 
+   * because of tight timing constraints in beacon-enabled mode neither can be
+   * guaranteed!
+   */
+ event void aboutToTransmit();  
+
+  /** 
+   * Indicates that a beacon frame has been transmitted (the 
+   * <tt>getBeaconPayload</tt> command can be used to inspect the
+   * beacon payload).
+   */
+ event void beaconTransmitted();  
+}
diff --git a/tos/lib/net/4bitle/LinkEstimator.h b/tos/lib/net/4bitle/LinkEstimator.h
new file mode 100644
index 00000000..3fecdc12
--- /dev/null
+++ b/tos/lib/net/4bitle/LinkEstimator.h
@@ -0,0 +1,122 @@
+/* $Id: LinkEstimator.h,v 1.5 2010-06-29 22:07:47 scipio Exp $ */
+/*
+ * Copyright (c) 2006 University of Southern California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef LINK_ESITIMATOR_H
+#define LINK_ESITIMATOR_H
+/*
+ @ author Omprakash Gnawali
+ @ Created: June 08, 2006
+ */
+
+// Number of entries in the neighbor table
+#define NEIGHBOR_TABLE_SIZE 10
+
+// Masks for the flag field in the link estimation header
+enum {
+  // use last four bits to keep track of
+  // how many footer entries there are
+  NUM_ENTRIES_FLAG = 15,
+};
+
+// The first byte of each outgoing packet is a control byte
+// Bits 4..7 reserved for routing and other protocols
+// Bits 0..3 is used by the link estimator to encode the
+//   number of linkest entries in the packet
+
+// link estimator header added to
+// every message passing through the link estimator
+typedef nx_struct linkest_header {
+  nx_uint8_t flags;
+  nx_uint8_t seq;
+} linkest_header_t;
+
+
+// for outgoing link estimator message
+// so that we can compute bi-directional quality
+typedef nx_struct neighbor_stat_entry {
+  nx_am_addr_t ll_addr;
+  nx_uint8_t inquality;
+} neighbor_stat_entry_t;
+
+// we put the above neighbor entry in the footer
+typedef nx_struct linkest_footer {
+  neighbor_stat_entry_t neighborList[1];
+} linkest_footer_t;
+
+
+// Flags for the neighbor table entry
+enum {
+  VALID_ENTRY = 0x1, 
+  // A link becomes mature after BLQ_PKT_WINDOW
+  // packets are received and an estimate is computed
+  MATURE_ENTRY = 0x2,
+  // Flag to indicate that this link has received the
+  // first sequence number
+  INIT_ENTRY = 0x4,
+  // The upper layer has requested that this link be pinned
+  // Useful if we don't want to lose the root from the table
+  PINNED_ENTRY = 0x8
+};
+
+
+// neighbor table entry
+typedef struct neighbor_table_entry {
+  // link layer address of the neighbor
+  am_addr_t ll_addr;
+  // last beacon sequence number received from this neighbor
+  uint8_t lastseq;
+  // number of beacons received after last beacon estimator update
+  // the update happens every BLQ_PKT_WINDOW beacon packets
+  uint8_t rcvcnt;
+  // number of beacon packets missed after last beacon estimator update
+  uint8_t failcnt;
+  // flags to describe the state of this entry
+  uint8_t flags;
+  // inbound qualities in the range [1..255]
+  // 1 bad, 255 good
+  uint8_t inquality;
+  // ETX for the link to this neighbor. This is the quality returned to
+  // the users of the link estimator
+  uint16_t etx;
+  // Number of data packets successfully sent (ack'd) to this neighbor
+  // since the last data estimator update round. This update happens
+  // every DLQ_PKT_WINDOW data packets
+  uint8_t data_success;
+  // The total number of data packets transmission attempt to this neighbor
+  // since the last data estimator update round.
+  uint8_t data_total;
+} neighbor_table_entry_t;
+
+
+#endif
diff --git a/tos/lib/net/4bitle/LinkEstimator.nc b/tos/lib/net/4bitle/LinkEstimator.nc
new file mode 100644
index 00000000..dc11ba60
--- /dev/null
+++ b/tos/lib/net/4bitle/LinkEstimator.nc
@@ -0,0 +1,75 @@
+/* $Id: LinkEstimator.nc,v 1.3 2010-06-29 22:07:47 scipio Exp $ */
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** Provides an additive quality measure for a neighbor. The
+ * provided quality increases when the true link quality increases.
+ *  @author Rodrigo Fonseca
+ *  @author Omprakash Gnawali
+ *  @date   $Date: 2010-06-29 22:07:47 $
+ */
+
+/* Quality of a link is defined by the implementor of this interface.
+ * It could be ETX, PRR, etc.
+ */
+
+interface LinkEstimator {
+  
+  /* get link quality for link to the neighbor */
+  command uint16_t getLinkQuality(uint16_t neighbor);
+
+  /* insert this neighbor into the neighbor table */
+  command error_t insertNeighbor(am_addr_t neighbor);
+
+  /* pin a neighbor so that it does not get evicted */
+  command error_t pinNeighbor(am_addr_t neighbor);
+
+  /* pin a neighbor so that it does not get evicted */
+  command error_t unpinNeighbor(am_addr_t neighbor);
+
+  /* called when an acknowledgement is received; sign of a successful
+     data transmission; to update forward link quality */
+  command error_t txAck(am_addr_t neighbor);
+
+  /* called when an acknowledgement is not received; could be due to
+     data pkt or acknowledgement loss; to update forward link quality */
+  command error_t txNoAck(am_addr_t neighbor);
+
+  /* called when the parent changes; clear state about data-driven link quality  */
+  command error_t clearDLQ(am_addr_t neighbor);
+
+  /* signal when this neighbor is evicted from the neighbor table */
+  event void evicted(am_addr_t neighbor);
+}
+
+
diff --git a/tos/lib/net/4bitle/LinkEstimatorC.nc b/tos/lib/net/4bitle/LinkEstimatorC.nc
new file mode 100644
index 00000000..c88d9d67
--- /dev/null
+++ b/tos/lib/net/4bitle/LinkEstimatorC.nc
@@ -0,0 +1,45 @@
+/* $Id: LinkEstimatorC.nc,v 1.2 2010-06-29 22:07:47 scipio Exp $ */
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** The public component of the link estimator that provides the
+ * quality to and from a neighbor 
+ * 
+ *  @author Rodrigo Fonseca
+ *  @date   $Date: 2010-06-29 22:07:47 $
+ */
+configuration LinkEstimatorC {
+    provides {
+        interface LinkEstimator;
+    }
+}
diff --git a/tos/lib/net/4bitle/LinkEstimatorP.nc b/tos/lib/net/4bitle/LinkEstimatorP.nc
new file mode 100644
index 00000000..892511d4
--- /dev/null
+++ b/tos/lib/net/4bitle/LinkEstimatorP.nc
@@ -0,0 +1,716 @@
+/* $Id: LinkEstimatorP.nc,v 1.19 2010-06-29 22:07:47 scipio Exp $ */
+/*
+ * Copyright (c) 2006 University of Southern California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ @ author Omprakash Gnawali
+ @ Created: April 24, 2006
+ */
+
+#include "./LinkEstimator.h"
+
+module LinkEstimatorP {
+  provides {
+    interface StdControl;
+    interface AMSend as Send;
+    interface Receive;
+    interface LinkEstimator;
+    interface Init;
+    interface Packet;
+    interface CompareBit;
+  }
+
+  uses {
+    interface AMSend;
+    interface AMPacket as SubAMPacket;
+    interface Packet as SubPacket;
+    interface Receive as SubReceive;
+    interface LinkPacketMetadata;
+    interface Random;
+  }
+}
+
+implementation {
+
+  // configure the link estimator and some constants
+  enum {
+    // If the etx estimate is below this threshold
+    // do not evict a link
+    EVICT_ETX_THRESHOLD = 65,
+    // if received sequence number if larger than the last sequence
+    // number by this gap, we reinitialize the link
+    MAX_PKT_GAP = 10,
+    BEST_ETX = 10,
+    INVALID_RVAL = 0xff,
+    INVALID_NEIGHBOR_ADDR = 0xff,
+    // if we don't know the link quality, we need to return a value so
+    // large that it will not be used to form paths
+    VERY_LARGE_ETX_VALUE = 0xffff,
+    // decay the link estimate using this alpha
+    // we use a denominator of 10, so this corresponds to 0.2
+    ALPHA = 9,
+    // number of packets to wait before computing a new
+    // DLQ (Data-driven Link Quality)
+    DLQ_PKT_WINDOW = 5,
+    // number of beacons to wait before computing a new
+    // BLQ (Beacon-driven Link Quality)
+    BLQ_PKT_WINDOW = 3,
+    // largest ETX value that we feed into the link quality EWMA
+    // a value of 70 corresponds to having to make six transmissions
+    // to successfully receive one acknowledgement
+    LARGE_ETX_VALUE = 70
+  };
+
+  // keep information about links from the neighbors
+  neighbor_table_entry_t NeighborTable[NEIGHBOR_TABLE_SIZE];
+  // link estimation sequence, increment every time a beacon is sent
+  uint8_t linkEstSeq = 0;
+  // if there is not enough room in the packet to put all the neighbor table
+  // entries, in order to do round robin we need to remember which entry
+  // we sent in the last beacon
+  uint8_t prevSentIdx = 0;
+
+  // get the link estimation header in the packet
+  linkest_header_t* getHeader(message_t* m) {
+    return (linkest_header_t*)call SubPacket.getPayload(m, sizeof(linkest_header_t));
+  }
+
+  // get the link estimation footer (neighbor entries) in the packet
+  linkest_footer_t* getFooter(message_t* m, uint8_t len) {
+    // To get a footer at offset "len", the payload must be len + sizeof large.
+    return (linkest_footer_t*)(len + (uint8_t *)call Packet.getPayload(m,len + sizeof(linkest_footer_t)));
+  }
+
+  // add the link estimation header (seq no) and link estimation
+  // footer (neighbor entries) in the packet. Call just before sending
+  // the packet.
+  uint8_t addLinkEstHeaderAndFooter(message_t *msg, uint8_t len) {
+    uint8_t newlen;
+    linkest_header_t * ONE hdr;
+    linkest_footer_t * ONE footer;
+    uint8_t i, j, k;
+    uint8_t maxEntries, newPrevSentIdx;
+    dbg("LI", "newlen1 = %d\n", len);
+    hdr = getHeader(msg);
+    footer = getFooter(msg, len);
+
+    maxEntries = ((call SubPacket.maxPayloadLength() - len - sizeof(linkest_header_t))
+		  / sizeof(linkest_footer_t));
+
+    // Depending on the number of bits used to store the number
+    // of entries, we can encode up to NUM_ENTRIES_FLAG using those bits
+    if (maxEntries > NUM_ENTRIES_FLAG) {
+      maxEntries = NUM_ENTRIES_FLAG;
+    }
+    dbg("LI", "Max payload is: %d, maxEntries is: %d\n", call SubPacket.maxPayloadLength(), maxEntries);
+
+    j = 0;
+    newPrevSentIdx = 0;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE && j < maxEntries; i++) {
+      uint8_t neighborCount;
+      neighbor_stat_entry_t * COUNT(neighborCount) neighborLists;
+      if(maxEntries <= NEIGHBOR_TABLE_SIZE)
+        neighborCount = maxEntries;
+      else
+        neighborCount = NEIGHBOR_TABLE_SIZE;
+      
+      neighborLists = TCAST(neighbor_stat_entry_t * COUNT(neighborCount), footer->neighborList);
+      k = (prevSentIdx + i + 1) % NEIGHBOR_TABLE_SIZE;
+      if ((NeighborTable[k].flags & VALID_ENTRY) &&
+	  (NeighborTable[k].flags & MATURE_ENTRY)) {
+	neighborLists[j].ll_addr = NeighborTable[k].ll_addr;
+	neighborLists[j].inquality = NeighborTable[k].inquality;
+	newPrevSentIdx = k;
+	dbg("LI", "Loaded on footer: %d %d %d\n", j, neighborLists[j].ll_addr,
+	    neighborLists[j].inquality);
+	j++;
+      }
+    }
+    prevSentIdx = newPrevSentIdx;
+
+    hdr->seq = linkEstSeq++;
+    hdr->flags = 0;
+    hdr->flags |= (NUM_ENTRIES_FLAG & j);
+    newlen = sizeof(linkest_header_t) + len + j*sizeof(linkest_footer_t);
+    dbg("LI", "newlen2 = %d\n", newlen);
+    return newlen;
+  }
+
+
+  // initialize the given entry in the table for neighbor ll_addr
+  void initNeighborIdx(uint8_t i, am_addr_t ll_addr) {
+    neighbor_table_entry_t *ne;
+    ne = &NeighborTable[i];
+    ne->ll_addr = ll_addr;
+    ne->lastseq = 0;
+    ne->rcvcnt = 0;
+    ne->failcnt = 0;
+    ne->flags = (INIT_ENTRY | VALID_ENTRY);
+    ne->inquality = 0;
+    ne->etx = 0;
+  }
+
+  // find the index to the entry for neighbor ll_addr
+  uint8_t findIdx(am_addr_t ll_addr) {
+    uint8_t i;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      if (NeighborTable[i].flags & VALID_ENTRY) {
+	if (NeighborTable[i].ll_addr == ll_addr) {
+	  return i;
+	}
+      }
+    }
+    return INVALID_RVAL;
+  }
+
+  // find an empty slot in the neighbor table
+  uint8_t findEmptyNeighborIdx() {
+    uint8_t i;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      if (NeighborTable[i].flags & VALID_ENTRY) {
+      } else {
+	return i;
+      }
+    }
+      return INVALID_RVAL;
+  }
+
+  // find the index to the worst neighbor if the eetx
+  // estimate is greater than the given threshold
+  uint8_t findWorstNeighborIdx(uint8_t thresholdETX) {
+    uint8_t i, worstNeighborIdx;
+    uint16_t worstETX, thisETX;
+
+    worstNeighborIdx = INVALID_RVAL;
+    worstETX = 0;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      if (!(NeighborTable[i].flags & VALID_ENTRY)) {
+	dbg("LI", "Invalid so continuing\n");
+	continue;
+      }
+      if (!(NeighborTable[i].flags & MATURE_ENTRY)) {
+	dbg("LI", "Not mature, so continuing\n");
+	continue;
+      }
+      if (NeighborTable[i].flags & PINNED_ENTRY) {
+	dbg("LI", "Pinned entry, so continuing\n");
+	continue;
+      }
+      thisETX = NeighborTable[i].etx;
+      if (thisETX >= worstETX) {
+	worstNeighborIdx = i;
+	worstETX = thisETX;
+      }
+    }
+    if (worstETX >= thresholdETX) {
+      return worstNeighborIdx;
+    } else {
+      return INVALID_RVAL;
+    }
+  }
+
+
+  // find the index to a random entry that is
+  // valid but not pinned
+  uint8_t findRandomNeighborIdx() {
+    uint8_t i;
+    uint8_t cnt;
+    uint8_t num_eligible_eviction;
+
+    num_eligible_eviction = 0;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      if (NeighborTable[i].flags & VALID_ENTRY) {
+        if (NeighborTable[i].flags & PINNED_ENTRY ||
+            NeighborTable[i].flags & MATURE_ENTRY) {
+        }  else {
+          num_eligible_eviction++;
+        }
+      }
+    }
+
+    if (num_eligible_eviction == 0) {
+      return INVALID_RVAL;
+    }
+
+    cnt = call Random.rand16() % num_eligible_eviction;
+
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      if (!NeighborTable[i].flags & VALID_ENTRY)
+        continue;
+      if (NeighborTable[i].flags & PINNED_ENTRY ||
+          NeighborTable[i].flags & MATURE_ENTRY)
+        continue;
+      if (cnt-- == 0)
+        return i;
+    }
+    return INVALID_RVAL;
+  }
+
+
+  // update the ETX estimator
+  // called when new beacon estimate is done
+  // also called when new DEETX estimate is done
+  void updateETX(neighbor_table_entry_t *ne, uint16_t newEst) {
+    ne->etx = (ALPHA * ne->etx + (10 - ALPHA) * newEst)/10;
+  }
+
+
+  // update data driven ETX
+  void updateDETX(neighbor_table_entry_t *ne) {
+    uint16_t estETX;
+
+    if (ne->data_success == 0) {
+      // if there were no successful packet transmission in the
+      // last window, our current estimate is the number of failed
+      // transmissions
+      estETX = ne->data_total * 10;
+    } else {
+      estETX = (10 * ne->data_total) / ne->data_success;
+      ne->data_success = 0;
+      ne->data_total = 0;
+    }
+    updateETX(ne, estETX);
+  }
+
+
+  // ETX (Expected number of Transmission)
+  // computeETX returns ETX*10
+  uint16_t computeETX(uint8_t q1) {
+    uint16_t q;
+    if (q1 > 0) {
+      q =  2500 / q1;
+      if (q > 250) {
+	q = VERY_LARGE_ETX_VALUE;
+      }
+      return q;
+    } else {
+      return VERY_LARGE_ETX_VALUE;
+    }
+  }
+
+  // update the inbound link quality by
+  // munging receive, fail count since last update
+  void updateNeighborTableEst(am_addr_t n) {
+    uint8_t i, totalPkt;
+    neighbor_table_entry_t *ne;
+    uint8_t newEst;
+    uint8_t minPkt;
+
+    minPkt = BLQ_PKT_WINDOW;
+    dbg("LI", "%s\n", __FUNCTION__);
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      ne = &NeighborTable[i];
+      if (ne->ll_addr == n) {
+	if (ne->flags & VALID_ENTRY) {
+	  dbg("LI", "Making link: %d mature\n", i);
+	  totalPkt = ne->rcvcnt + ne->failcnt;
+
+	  if (!(ne->flags & MATURE_ENTRY)) {
+	    newEst = (250UL * ne->rcvcnt) / totalPkt;
+	    ne->inquality = newEst;
+	    ne->etx =
+	      computeETX(ne->inquality);
+	  }
+
+	  ne->flags |= MATURE_ENTRY;
+	  dbg("LI", "MinPkt: %d, totalPkt: %d\n", minPkt, totalPkt);
+	  newEst = (250UL * ne->rcvcnt) / totalPkt;
+	  dbg("LI,LITest", "  %hu: %hhu -> %hhu", ne->ll_addr, ne->inquality, (ALPHA * ne->inquality + (10-ALPHA) * newEst)/10);
+	  ne->inquality = (ALPHA * ne->inquality + (10-ALPHA) * newEst)/10;
+	  ne->rcvcnt = 0;
+	  ne->failcnt = 0;
+	  updateETX(ne, computeETX(ne->inquality));
+	} else {
+	  dbg("LI", " - entry %i is invalid.\n", (int)i);
+	}
+      }
+    }
+  }
+
+
+  // we received seq from the neighbor in idx
+  // update the last seen seq, receive and fail count
+  // refresh the age
+  void updateNeighborEntryIdx(uint8_t idx, uint8_t seq) {
+    uint8_t packetGap;
+
+    if (NeighborTable[idx].flags & INIT_ENTRY) {
+      dbg("LI", "Init entry update\n");
+      NeighborTable[idx].flags &= ~INIT_ENTRY;
+    }
+    
+    packetGap = seq - NeighborTable[idx].lastseq;
+    dbg("LI", "updateNeighborEntryIdx: prevseq %d, curseq %d, gap %d\n",
+	NeighborTable[idx].lastseq, seq, packetGap);
+    NeighborTable[idx].lastseq = seq;
+    NeighborTable[idx].rcvcnt++;
+    if (packetGap > 0) {
+      NeighborTable[idx].failcnt += packetGap - 1;
+    }
+
+    if (packetGap > MAX_PKT_GAP) {
+      initNeighborIdx(idx, NeighborTable[idx].ll_addr);
+      NeighborTable[idx].lastseq = seq;
+      NeighborTable[idx].rcvcnt = 1;
+    } else if (((NeighborTable[idx].rcvcnt + NeighborTable[idx].failcnt) >= BLQ_PKT_WINDOW)
+	       || (packetGap >= BLQ_PKT_WINDOW)) {
+      updateNeighborTableEst(NeighborTable[idx].ll_addr);
+    }
+
+  }
+
+
+
+  // print the neighbor table. for debugging.
+  void print_neighbor_table() {
+    uint8_t i;
+    neighbor_table_entry_t *ne;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      ne = &NeighborTable[i];
+      if (ne->flags & VALID_ENTRY) {
+	dbg("LI,LITest", "%d:%d inQ=%d, rcv=%d, fail=%d, Q=%d\n",
+	    i, ne->ll_addr, ne->inquality, 
+	    ne->rcvcnt, ne->failcnt, computeETX(ne->inquality));
+      }
+    }
+  }
+
+  // print the packet. for debugging.
+  void print_packet(message_t* msg, uint8_t len) {
+    uint8_t i;
+    uint8_t* b;
+
+    b = (uint8_t *)msg->data;
+    for(i=0; i<len; i++)
+      dbg_clear("LI", "%x ", b[i]);
+    dbg_clear("LI", "\n");
+  }
+
+  // initialize the neighbor table in the very beginning
+  void initNeighborTable() {
+    uint8_t i;
+
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      NeighborTable[i].flags = 0;
+    }
+  }
+
+  command error_t StdControl.start() {
+    dbg("LI", "Link estimator start\n");
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    return SUCCESS;
+  }
+
+  // initialize the link estimator
+  command error_t Init.init() {
+    dbg("LI", "Link estimator init\n");
+    initNeighborTable();
+    return SUCCESS;
+  }
+
+  // return bi-directional link quality to the neighbor
+  command uint16_t LinkEstimator.getLinkQuality(am_addr_t neighbor) {
+    uint8_t idx;
+    idx = findIdx(neighbor);
+    if (idx == INVALID_RVAL) {
+      return VERY_LARGE_ETX_VALUE;
+    } else {
+      if (NeighborTable[idx].flags & MATURE_ENTRY) {
+	return NeighborTable[idx].etx;
+      } else {
+	return VERY_LARGE_ETX_VALUE;
+      }
+    }
+  }
+
+  // insert the neighbor at any cost (if there is a room for it)
+  // even if eviction of a perfectly fine neighbor is called for
+  command error_t LinkEstimator.insertNeighbor(am_addr_t neighbor) {
+    uint8_t nidx;
+
+    nidx = findIdx(neighbor);
+    if (nidx != INVALID_RVAL) {
+      dbg("LI", "insert: Found the entry, no need to insert\n");
+      return SUCCESS;
+    }
+
+    nidx = findEmptyNeighborIdx();
+    if (nidx != INVALID_RVAL) {
+      dbg("LI", "insert: inserted into the empty slot\n");
+      initNeighborIdx(nidx, neighbor);
+      return SUCCESS;
+    } else {
+      nidx = findWorstNeighborIdx(BEST_ETX);
+      if (nidx != INVALID_RVAL) {
+	dbg("LI", "insert: inserted by replacing an entry for neighbor: %d\n",
+	    NeighborTable[nidx].ll_addr);
+	signal LinkEstimator.evicted(NeighborTable[nidx].ll_addr);
+	initNeighborIdx(nidx, neighbor);
+	return SUCCESS;
+      }
+    }
+    return FAIL;
+  }
+
+  // pin a neighbor so that it does not get evicted
+  command error_t LinkEstimator.pinNeighbor(am_addr_t neighbor) {
+    uint8_t nidx = findIdx(neighbor);
+    if (nidx == INVALID_RVAL) {
+      return FAIL;
+    }
+    NeighborTable[nidx].flags |= PINNED_ENTRY;
+    return SUCCESS;
+  }
+
+  // pin a neighbor so that it does not get evicted
+  command error_t LinkEstimator.unpinNeighbor(am_addr_t neighbor) {
+    uint8_t nidx = findIdx(neighbor);
+    if (nidx == INVALID_RVAL) {
+      return FAIL;
+    }
+    NeighborTable[nidx].flags &= ~PINNED_ENTRY;
+    return SUCCESS;
+  }
+
+
+  // called when an acknowledgement is received; sign of a successful
+  // data transmission; to update forward link quality
+  command error_t LinkEstimator.txAck(am_addr_t neighbor) {
+    neighbor_table_entry_t *ne;
+    uint8_t nidx = findIdx(neighbor);
+    if (nidx == INVALID_RVAL) {
+      return FAIL;
+    }
+    ne = &NeighborTable[nidx];
+    ne->data_success++;
+    ne->data_total++;
+    if (ne->data_total >= DLQ_PKT_WINDOW) {
+      updateDETX(ne);
+    }
+    return SUCCESS;
+  }
+
+  // called when an acknowledgement is not received; could be due to
+  // data pkt or acknowledgement loss; to update forward link quality
+  command error_t LinkEstimator.txNoAck(am_addr_t neighbor) {
+    neighbor_table_entry_t *ne;
+    uint8_t nidx = findIdx(neighbor);
+    if (nidx == INVALID_RVAL) {
+      return FAIL;
+    }
+
+    ne = &NeighborTable[nidx];
+    ne->data_total++;
+    if (ne->data_total >= DLQ_PKT_WINDOW) {
+      updateDETX(ne);
+    }
+    return SUCCESS;
+  }
+
+  // called when the parent changes; clear state about data-driven link quality
+  command error_t LinkEstimator.clearDLQ(am_addr_t neighbor) {
+    neighbor_table_entry_t *ne;
+    uint8_t nidx = findIdx(neighbor);
+    if (nidx == INVALID_RVAL) {
+      return FAIL;
+    }
+    ne = &NeighborTable[nidx];
+    ne->data_total = 0;
+    ne->data_success = 0;
+    return SUCCESS;
+  }
+
+
+  // user of link estimator calls send here
+  // slap the header and footer before sending the message
+  command error_t Send.send(am_addr_t addr, message_t* msg, uint8_t len) {
+    uint8_t newlen;
+    newlen = addLinkEstHeaderAndFooter(msg, len);
+    dbg("LITest", "%s packet of length %hhu became %hhu\n", __FUNCTION__, len, newlen);
+    dbg("LI", "Sending seq: %d\n", linkEstSeq);
+    print_packet(msg, newlen);
+    return call AMSend.send(addr, msg, newlen);
+  }
+
+  // done sending the message that originated by
+  // the user of this component
+  event void AMSend.sendDone(message_t* msg, error_t error ) {
+    signal Send.sendDone(msg, error);
+  }
+
+  // cascade the calls down
+  command uint8_t Send.cancel(message_t* msg) {
+    return call AMSend.cancel(msg);
+  }
+
+  command uint8_t Send.maxPayloadLength() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* Send.getPayload(message_t* msg, uint8_t len) {
+    return call Packet.getPayload(msg, len);
+  }
+
+  // called when link estimator generator packet or
+  // packets from upper layer that are wired to pass through
+  // link estimator is received
+  void processReceivedMessage(message_t* ONE msg, void* COUNT_NOK(len) payload, uint8_t len) {
+    uint8_t nidx;
+    uint8_t num_entries;
+
+    dbg("LI", "LI receiving packet, buf addr: %x\n", payload);
+    print_packet(msg, len);
+
+    if (call SubAMPacket.destination(msg) == AM_BROADCAST_ADDR) {
+      linkest_header_t* hdr = getHeader(msg);
+      am_addr_t ll_addr;
+
+      ll_addr = call SubAMPacket.source(msg);
+
+      dbg("LI", "Got seq: %d from link: %d\n", hdr->seq, ll_addr);
+
+      num_entries = hdr->flags & NUM_ENTRIES_FLAG;
+      print_neighbor_table();
+
+      // update neighbor table with this information
+      // find the neighbor
+      // if found
+      //   update the entry
+      // else
+      //   find an empty entry
+      //   if found
+      //     initialize the entry
+      //   else
+      //     find a bad neighbor to be evicted
+      //     if found
+      //       evict the neighbor and init the entry
+      //     else
+      //       we can not accommodate this neighbor in the table
+      nidx = findIdx(ll_addr);
+      if (nidx != INVALID_RVAL) {
+	dbg("LI", "Found the entry so updating\n");
+	updateNeighborEntryIdx(nidx, hdr->seq);
+      } else {
+	nidx = findEmptyNeighborIdx();
+	if (nidx != INVALID_RVAL) {
+	  dbg("LI", "Found an empty entry\n");
+	  initNeighborIdx(nidx, ll_addr);
+	  NeighborTable[nidx].lastseq = hdr->seq;
+	  updateNeighborEntryIdx(nidx, hdr->seq);
+	} else {
+	  nidx = findWorstNeighborIdx(EVICT_ETX_THRESHOLD);
+	  if (nidx != INVALID_RVAL) {
+	    dbg("LI", "Evicted neighbor %d at idx %d\n",
+		NeighborTable[nidx].ll_addr, nidx);
+	    signal LinkEstimator.evicted(NeighborTable[nidx].ll_addr);
+	    initNeighborIdx(nidx, ll_addr);
+	  } else {
+	    dbg("LI", "No room in the table\n");
+
+	    /* if the white bit is set, lets ask the router if the path through
+	       this link is better than at least one known path - if so
+	       lets insert this link into the table.
+	    */
+	    if (call LinkPacketMetadata.highChannelQuality(msg)) {
+	      if (signal CompareBit.shouldInsert(msg, 
+						 call Packet.getPayload(msg, call Packet.payloadLength(msg)),
+						 call Packet.payloadLength(msg))) {
+		nidx = findRandomNeighborIdx();
+		if (nidx != INVALID_RVAL) {
+		  signal LinkEstimator.evicted(NeighborTable[nidx].ll_addr);
+		  initNeighborIdx(nidx, ll_addr);
+		}
+	      }
+	    }
+	  }
+	}
+      }
+    }
+  }
+
+  // new messages are received here
+  // update the neighbor table with the header
+  // and footer in the message
+  // then signal the user of this component
+  event message_t* SubReceive.receive(message_t* msg,
+				      void* payload,
+				      uint8_t len) {
+    dbg("LI", "Received upper packet. Will signal up\n");
+    processReceivedMessage(msg, payload, len);
+    return signal Receive.receive(msg,
+				  call Packet.getPayload(msg, call Packet.payloadLength(msg)),
+				  call Packet.payloadLength(msg));
+  }
+
+  command void Packet.clear(message_t* msg) {
+    call SubPacket.clear(msg);
+  }
+
+  // subtract the space occupied by the link estimation
+  // header and footer from the incoming payload size
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    linkest_header_t *hdr;
+    hdr = getHeader(msg);
+    return call SubPacket.payloadLength(msg)
+      - sizeof(linkest_header_t)
+      - sizeof(linkest_footer_t)*(NUM_ENTRIES_FLAG & hdr->flags);
+  }
+
+  // account for the space used by header and footer
+  // while setting the payload length
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    linkest_header_t *hdr;
+    hdr = getHeader(msg);
+    call SubPacket.setPayloadLength(msg,
+				    len
+				    + sizeof(linkest_header_t)
+				    + sizeof(linkest_footer_t)*(NUM_ENTRIES_FLAG & hdr->flags));
+  }
+
+  command uint8_t Packet.maxPayloadLength() {
+    return call SubPacket.maxPayloadLength() - sizeof(linkest_header_t);
+  }
+
+  // application payload pointer is just past the link estimation header
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    void* payload = call SubPacket.getPayload(msg, len + sizeof(linkest_header_t));
+    if (payload != NULL) {
+      payload += sizeof(linkest_header_t);
+    }
+    return payload;
+  }
+
+}
diff --git a/tos/lib/net/6lowpan/IP.h b/tos/lib/net/6lowpan/IP.h
new file mode 100644
index 00000000..0adbf497
--- /dev/null
+++ b/tos/lib/net/6lowpan/IP.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __IP_H__
+#define __IP_H__
+
+typedef struct {
+    uint8_t addr[16];
+} ip6_addr_t;
+
+#endif // __IP_H__
diff --git a/tos/lib/net/6lowpan/IP.nc b/tos/lib/net/6lowpan/IP.nc
new file mode 100644
index 00000000..65427031
--- /dev/null
+++ b/tos/lib/net/6lowpan/IP.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This interface design was inspired Andrew Christian's port
+ * of Adam Dunkel's uIP to TinyOS 1.x. The original interface file
+ * is distributed under the following copyrights:
+ *
+ * Copyright (c) 2005 Hewlett-Packard Company
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of the Hewlett-Packard Company nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+
+/*
+ * IP address interface.
+ *
+ */
+
+#include "IP.h"
+
+interface IP {
+    command void getAddress(ip6_addr_t *addr);
+    command void setAddress(const ip6_addr_t *addr);
+    command void setAddressAutoconf(const ip6_addr_t *addr);
+}
diff --git a/tos/lib/net/6lowpan/IPC.nc b/tos/lib/net/6lowpan/IPC.nc
new file mode 100644
index 00000000..7f2be6ca
--- /dev/null
+++ b/tos/lib/net/6lowpan/IPC.nc
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "IP.h"
+#include "IP_internal.h"
+#include "message.h"
+
+#ifdef ENABLE_PRINTF_DEBUG
+#include "printf.h"
+#endif /* ENABLE_PRINTF_DEBUG */
+
+configuration IPC {
+    provides {
+	interface SplitControl as IPControl;
+	interface IP;
+	interface UDPClient[uint8_t i];
+    }
+}
+ 
+implementation { 
+    components IPP;
+    components ActiveMessageC as AM;
+    //TODO: need at least 2 pkts for ND
+    components new PoolC(lowpan_pkt_t, SEND_PKTS) as SendPktPool;
+    components new PoolC(app_data_t, FRAG_BUFS) as AppDataPool;
+    components new PoolC(frag_info_t, FRAG_BUFS*FRAGS_PER_DATAGRAM)
+	as FragInfoPool;
+    components new TimerMilliC() as Timer;
+    components LedsC;
+    
+    IPControl = IPP;
+    UDPClient = IPP.UDPClient;
+    IP = IPP.IP;
+
+    IPP.MessageControl -> AM;
+    IPP.Receive -> AM.Receive[AM_IP_MSG];
+    IPP.AMSend -> AM.AMSend[AM_IP_MSG];
+    IPP.Packet -> AM;
+    IPP.AMPacket -> AM;
+
+    IPP.SendPktPool -> SendPktPool;
+    IPP.AppDataPool -> AppDataPool;
+    IPP.FragInfoPool -> FragInfoPool;
+
+    IPP.Leds -> LedsC;
+    IPP.Timer -> Timer;
+
+#ifdef ENABLE_PRINTF_DEBUG
+    components PrintfC;
+    IPP.PrintfControl -> PrintfC;
+    IPP.PrintfFlush -> PrintfC;
+#endif /* ENABLE_PRINTF_DEBUG */
+}
+
diff --git a/tos/lib/net/6lowpan/IPP.nc b/tos/lib/net/6lowpan/IPP.nc
new file mode 100644
index 00000000..2864a7cb
--- /dev/null
+++ b/tos/lib/net/6lowpan/IPP.nc
@@ -0,0 +1,2192 @@
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Parts of the 6lowpan implementation design were inspired Andrew
+ * Christian's port of Adam Dunkel's uIP to TinyOS 1.x. This work is
+ * distributed under the following copyrights:
+ *
+ * Copyright (c) 2001-2003, Adam Dunkels.
+ * All rights reserved. 
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 1. Redistributions of source code must retain the above copyright 
+ *    notice, this list of conditions and the following disclaimer. 
+ * 2. Redistributions in binary form must reproduce the above copyright 
+ *    notice, this list of conditions and the following disclaimer in the 
+ *    documentation and/or other materials provided with the distribution. 
+ * 3. The name of the author may not be used to endorse or promote
+ *    products derived from this software without specific prior
+ *    written permission.  
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.  
+ *
+ * Copyright (c) 2005, Hewlett-Packard Company
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of the Hewlett-Packard Company nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * The actual implementaion of the 6lowpan/IPv6 stack lives in this file.
+ */
+
+#include "IP.h"
+#include "IP_internal.h"
+#include "message.h"
+#ifdef ENABLE_PRINTF_DEBUG
+#include "printf.h"
+#endif /* ENABLE_PRINTF_DEBUG */
+
+module IPP {
+    provides {
+	interface SplitControl as IPControl;
+	interface IP;
+	interface UDPClient[uint8_t i];
+    }
+    uses {
+	interface Timer<TMilli> as Timer;
+	interface Pool<lowpan_pkt_t> as SendPktPool;
+	interface Pool<app_data_t> as AppDataPool;
+	interface Pool<frag_info_t> as FragInfoPool;
+
+	interface SplitControl as MessageControl;
+	interface Receive;
+	interface AMSend;
+	interface Packet;
+	interface AMPacket;
+
+#ifdef ENABLE_PRINTF_DEBUG
+	interface PrintfFlush;
+	interface SplitControl as PrintfControl;
+#endif /* ENABLE_PRINTF_DEBUG */
+
+	interface Leds;
+    }
+}
+ 
+implementation { 
+    /* global variables */
+  enum {
+    COUNT_UDP_CLIENT = uniqueCount("UDPClient"),
+    COUNT_UDP_CONNS  = COUNT_UDP_CLIENT
+  };
+    
+    ip6_addr_t global_addr;       
+    ip6_addr_t linklocal_addr;       
+
+    uint16_t g_dgram_tag = 0;
+    uint16_t uip_len, uip_slen;
+    uint8_t  uip_flags;     /* The uip_flags variable is used for
+			     communication between the TCP/IP stack
+			     and the application program. */
+
+    message_t g_msg; // AM for sending
+    lowpan_pkt_t rx_pkt; // packet used for receiving
+    //struct lowpan_pkt send_pkt[SEND_PKTS]; // packets to be sent
+    lowpan_pkt_t *send_queue; // packets to be sent - queue
+
+    frag_buf_t frag_bufs[FRAG_BUFS]; // fragment reassembly buffers
+
+    struct udp_conn udp_conns[COUNT_UDP_CONNS];
+    static uint16_t lastport;       /* Keeps track of the last port used for
+				       a new connection. */
+    static int g_send_pending = 0;
+
+    // Pre-declare
+    // clear all fields, set app_data = NULL
+    void lowpan_pkt_clear(lowpan_pkt_t *pkt);
+    int ip6_addr_cmp(const ip6_addr_t *a, const ip6_addr_t *b);
+
+    static void dump_serial_packet(const unsigned char *packet, const int len);
+/*---------------------------------------------------------------------------*/
+/* from http://www.nabble.com/memcpy-assumes-16-bit-alignment--t712619.html */
+void * 
+my_memcpy(void *dst0, const void *src0, size_t len) 
+{ 
+        char *dst = (char *)dst0; 
+        const char *src = (const char *)src0; 
+        void *ret = dst0; 
+
+        for (; len > 0; len--) 
+                *dst++ = *src++; 
+
+        return ret; 
+}
+
+/*
+ * Use this function for copying/setting/memset() 16-bit values
+ * on the MSP430 !!!
+ *
+ * The mspgcc compiler geenrates broken code when doing memset with 16
+ * bit values, i.e. things go wrong if they are not aligned at 16-bit
+ * boundaries. See
+ * http://www.nabble.com/msp430-gcc-generating-unaligned-access.-t2261862.html
+ * and page 25 in http://www.eecs.harvard.edu/~konrad/projects/motetrack/mspgcc-manual-20031127.pdf for details.
+ */
+/* use when DST may be UNALIGNED */
+inline void set_16t(void *dst, uint16_t val)
+{
+    *((uint8_t*)dst) = *((uint8_t*)&val);
+    *(((uint8_t*)dst)+1) = *(((uint8_t*)&val)+1);
+    //memcpy((uint8_t*)dst, (uint8_t*)&val, sizeof(uint8_t));
+    //memcpy(((uint8_t*)dst)+1, ((uint8_t*)&val)+1, sizeof(uint8_t));
+}
+
+/* use when SRC may be UNALIGNED */
+inline uint16_t get_16t(void *val)
+{
+    uint16_t tmp;
+    *((uint8_t*)&tmp) = *((uint8_t*)val);
+    *(((uint8_t*)&tmp)+1) = *(((uint8_t*)val)+1);
+    //memcpy((uint8_t*)&tmp, (uint8_t*)val, sizeof(uint8_t));
+    //memcpy(((uint8_t*)&tmp)+1, ((uint8_t*)val)+1, sizeof(uint8_t));
+    return tmp;
+}
+
+  inline uint16_t htons( uint16_t val )
+  {
+    // The MSB is little-endian; network order is big
+    return ((val & 0xff) << 8) | ((val & 0xff00) >> 8);
+  }
+
+  inline uint16_t ntohs( uint16_t val )
+  {
+    // The MSB is little-endian; network order is big
+    return ((val & 0xff) << 8) | ((val & 0xff00) >> 8);
+  }
+
+  inline void htonl( uint32_t val, uint8_t *dest )
+  {
+    dest[0] = (val & 0xff000000) >> 24;
+    dest[1] = (val & 0x00ff0000) >> 16;
+    dest[2] = (val & 0x0000ff00) >> 8;
+    dest[3] = (val & 0x000000ff);
+  }
+
+  inline uint32_t ntohl( uint8_t *src )
+  {
+    return (((uint32_t) src[0]) << 24) | (((uint32_t) src[1]) << 16) |
+      (((uint32_t) src[2]) << 8) | (((uint32_t) src[3]));
+  }
+
+    /*
+  inline void uip_pack_ipaddr( ip6_addr_t *addr, uint8_t *new_addr) 
+  {
+      memcpy(addr, new_addr, sizeof(addr));
+  }
+
+  // Unpack the IP address into an array of octet
+  inline void uip_unpack_ipaddr( uint8_t *in, uint8_t *out )
+  {
+      memcpy(out, in, sizeof(ip6_addr_t));
+  }
+    */
+/*---------------------------------------------------------------------------*/
+    
+    /* This should be optimized for aligned and unaligned case */
+    static uint16_t ip_chksum(const uint8_t *buf, uint16_t len,
+			      uint16_t acc)
+    {
+	uint16_t v;
+	
+	for (; len > 1; len -= 2) {
+	    v = (((uint16_t) buf[1]) << 8) | ((uint16_t) buf[0]);
+	    
+	    if ( (acc += v) < v ) acc++;
+	    buf += 2;
+    }
+	
+	// add an odd byte (note we pad with 0)
+	if (len) {
+	    v = (uint16_t) buf[0];
+	    if ( (acc += v) < v ) acc++;
+	}
+	
+	return acc;
+    }
+    
+    /* 
+     * IPv6 checksum of the pseudo-header (RFC 2460, Sec 8.1)
+     * src_addr and dst_addr are in nerwork byte order
+     * len is in host byte order (will internally be converted)
+     */
+    static uint16_t ipv6_chksum(const ip6_addr_t* src_addr,
+				const ip6_addr_t* dst_addr,
+				const uint8_t next_header,
+				const uint16_t upper_layer_len,
+				uint16_t acc)
+    {
+	uint16_t tmp;
+	
+	/* source address */
+	acc =  ip_chksum((const uint8_t *) src_addr, sizeof(*src_addr), acc);
+
+	/* destination address */
+	acc =  ip_chksum((const uint8_t *) dst_addr, sizeof(*dst_addr), acc);
+
+	/* upper-layer packet length */
+	tmp = htons(upper_layer_len);
+	acc = ip_chksum((const uint8_t *) &tmp, sizeof(tmp), acc);
+
+	/* next header */
+	tmp = htons(next_header);
+	acc = ip_chksum((const uint8_t *) &tmp, sizeof(tmp), acc);
+	
+	return acc;
+    }
+
+    /* same as above, but including the uppel-layer buffer */
+    static uint16_t ipv6_chksum_data(const ip6_addr_t* src_addr,
+				     const ip6_addr_t* dst_addr, 
+				     const uint8_t next_header,
+				     const uint8_t *data, uint16_t data_len,
+				     uint16_t acc)
+    {
+	/* upper-layer payload */
+	acc = ip_chksum(data, data_len, acc);
+	
+	return ipv6_chksum(src_addr, dst_addr, next_header, data_len, acc);
+    }
+/*---------------------------------------------------------------------------*/
+    bool ipv6_addr_is_zero(const ip6_addr_t *addr)
+    {
+	int i;
+	for (i=0;i<16;i++) {
+	    if (addr->addr[i]) {
+		return FALSE;
+	    }
+	}
+	return TRUE;
+    }
+
+    bool ipv6_addr_is_linklocal_unicast(const ip6_addr_t *addr)
+    {
+	if (   addr->addr[0] == 0xFE
+	    && addr->addr[1] == 0x80
+	    && addr->addr[2] == 0
+	    && addr->addr[3] == 0
+	    && addr->addr[4] == 0
+	    && addr->addr[5] == 0
+	    && addr->addr[6] == 0
+	    && addr->addr[7] == 0
+	    )
+	    return TRUE;
+	else
+	    return FALSE;
+    }
+    
+//TODO: prepend pan_id once we have a proper 802.15.4 stack
+void ipv6_iface_id_from_am_addr(am_addr_t am_addr, uint8_t *host_part)
+{
+    memset(host_part, 0, 6);
+    host_part[4] = 0xFF;
+    host_part[5] = 0xFE;
+    host_part += 6;
+    set_16t(host_part, htons(am_addr));
+}
+
+void ipv6_iface_id_from_hw_addr(hw_addr_t *hw_addr, uint8_t *host_part)
+{
+    if (hw_addr->type == HW_ADDR_SHORT) {
+	memset(host_part, 0, 6);
+	host_part[4] = 0xFF;
+	host_part[5] = 0xFE;
+	host_part[7] = hw_addr->addr_short[0];
+	host_part[8] = hw_addr->addr_short[1];
+	//ipv6_iface_id_from_am_addr(hw_addr->addr_short, host_part);
+    } else {
+	//TODO
+    }
+}
+    
+bool ipv6_addr_is_linklocal_multicast(const ip6_addr_t *addr)
+{
+    if (addr->addr[0] == 0xFF
+	&& addr->addr[1] == 0x02)
+	return TRUE;
+    else
+	return FALSE;
+}
+
+bool ipv6_addr_is_linklocal(const ip6_addr_t *addr)
+{
+    return (ipv6_addr_is_linklocal_unicast(addr)
+	    || ipv6_addr_is_linklocal_multicast(addr));
+}
+
+bool ipv6_addr_is_linklocal_allnodes(const ip6_addr_t *addr)
+{
+    //TODO: interface-local addr FF01::1
+    if (   addr->addr[0] == 0xFF
+	   && addr->addr[1] == 0x02
+	   && addr->addr[2] == 0
+	   && addr->addr[3] == 0
+	   && addr->addr[4] == 0
+	   && addr->addr[5] == 0
+	   && addr->addr[6] == 0
+	   && addr->addr[7] == 0
+	   && addr->addr[8] == 0
+	   && addr->addr[9] == 0
+	   && addr->addr[10] == 0
+	   && addr->addr[11] == 0
+	   && addr->addr[12] == 0
+	   && addr->addr[13] == 0
+	   && addr->addr[14] == 0
+	    && addr->addr[15] == 0x01
+	   )
+	return TRUE;
+    else
+	return FALSE;
+}
+
+bool ipv6_addr_is_solicited_node_multicast_prefix(const ip6_addr_t *addr)
+{
+//       Solicited-Node Address:  FF02:0:0:0:0:1:FFXX:XXXX
+
+//    Solicited-Node multicast address are computed as a function of a
+//    node's unicast and anycast addresses.  A Solicited-Node multicast
+//    address is formed by taking the low-order 24 bits of an address
+//    (unicast or anycast) and appending those bits to the prefix
+//    FF02:0:0:0:0:1:FF00::/104 resulting in a multicast address in the
+//    range
+
+//          FF02:0:0:0:0:1:FF00:0000
+
+//    to
+
+//          FF02:0:0:0:0:1:FFFF:FFFF
+
+    if (   addr->addr[0] == 0xFF
+	   && addr->addr[1] == 0x02
+	   && addr->addr[2] == 0
+	   && addr->addr[3] == 0
+	   && addr->addr[4] == 0
+	   && addr->addr[5] == 0
+	   && addr->addr[6] == 0
+	   && addr->addr[7] == 0
+	   && addr->addr[8] == 0
+	   && addr->addr[9] == 0
+	   && addr->addr[10] == 0
+	   && addr->addr[11] == 0x01
+	   && addr->addr[12] == 0xFF
+	   )
+	return TRUE;
+    else
+	return FALSE;
+}
+
+uint8_t cmp_ipv6_addr(const ip6_addr_t *addr1, const ip6_addr_t *addr2)
+{
+    return memcmp(addr1, addr2, sizeof(ip6_addr_t));
+}
+
+uint8_t ipv6_addr_is_for_me(const ip6_addr_t *addr)
+{
+    //TODO: loopback addr (::1)
+    //TODO: interface-local addr FF01::1
+    if (cmp_ipv6_addr(addr, &global_addr) == 0 ||
+	cmp_ipv6_addr(addr, &linklocal_addr) == 0 ||
+	ipv6_addr_is_linklocal_allnodes(addr) ||
+	(ipv6_addr_is_solicited_node_multicast_prefix(addr)
+	 && (((addr->addr[13] == global_addr.addr[13])
+	      && (addr->addr[14] == global_addr.addr[14])
+	      && (addr->addr[15] == global_addr.addr[15])
+	      ) ||
+	     ((addr->addr[13] == linklocal_addr.addr[13])
+		  && (addr->addr[14] == linklocal_addr.addr[14])
+	      && (addr->addr[15] == linklocal_addr.addr[15])
+	      )
+	     )
+	 )
+	)
+	return 1;
+    else
+	return 0;
+}
+
+/* determine the right src_addr given a dst_addr */
+ip6_addr_t * determine_src_ipv6_addr(const ip6_addr_t *dst_addr)
+{
+    if (ipv6_addr_is_linklocal(dst_addr)) {
+	return &linklocal_addr;
+    } else {
+	return &global_addr;
+    }
+}
+
+uint8_t cmp_hw_addr(const hw_addr_t *addr1, const hw_addr_t *addr2)
+{
+    // for short addresses compare only the first two bytes
+    if (addr1->type == HW_ADDR_SHORT && addr2->type == HW_ADDR_SHORT) {
+	return memcmp(addr1->addr_short, addr2->addr_short, 2);
+    } else {
+	return memcmp(addr1, addr2, sizeof(hw_addr_t));
+    }
+}
+
+uint8_t hw_addr_is_broadcat(const hw_addr_t *hw_addr)
+{
+    if (hw_addr->type == HW_ADDR_SHORT
+	&& hw_addr->addr_short[0] == 0xFF
+	&& hw_addr->addr_short[1] == 0xFF)
+	return 1;
+    // TODO: long address
+    else return 0;
+}
+
+uint8_t hw_addr_is_for_me(const hw_addr_t *addr)
+{
+    am_addr_t am_addr = call AMPacket.address();
+    if (hw_addr_is_broadcat(addr) ||
+	(addr->addr_short[0] == (uint8_t) am_addr
+	 && addr->addr_short[1] == (uint8_t) (am_addr >> 8))
+	)
+	return 1;
+    else
+	return 0;
+}
+/*---------------------------------------------------------------------------*/
+
+void increment_g_dgram_tag()
+{
+    uint16_t tmp = ntohs(g_dgram_tag);
+    if (tmp == 0xFFFF)
+	tmp = 0;
+    else
+	tmp++;
+    g_dgram_tag = htons(tmp);
+}
+
+void lowpan_pkt_clear(lowpan_pkt_t *pkt)
+{
+    memset(pkt, 0, sizeof(*pkt));
+    pkt->header_begin = pkt->header + sizeof(pkt->header);
+}
+
+/*
+void frag_buf_clear(frag_buf_t *frag_buf)
+{
+    memset(frag_buf, 0, sizeof(*frag_buf));
+    frag_buf->buf_begin = frag_buf->buf;
+}
+*/
+
+frag_buf_t * find_fragment(hw_addr_t *hw_src_addr, hw_addr_t *hw_dst_addr,
+			   uint16_t dgram_size, uint16_t dgram_tag)
+{
+    int i;
+    for (i = 0; i< FRAG_BUFS; i++) {
+	//printf("find_frag\n");
+	if (frag_bufs[i].frag_timeout != FRAG_FREE) {
+	    //printf("find: [%d] %d\n", i, frag_bufs[i].frag_timeout);
+	    /*
+	  printf("find: tag: 0x%04X, size: %d\n",
+		 get_16t(&frag_bufs[i].dgram_tag),
+		 ntohs(get_16t(&frag_bufs[i].dgram_size)));
+	    */
+	    if (   get_16t(&(frag_bufs[i].dgram_tag)) == dgram_tag
+		&& get_16t(&(frag_bufs[i].dgram_size)) == dgram_size
+		&& cmp_hw_addr(&frag_bufs[i].hw_src_addr, hw_src_addr) == 0
+		&& cmp_hw_addr(&frag_bufs[i].hw_dst_addr, hw_dst_addr) == 0
+		) {
+		return &(frag_bufs[i]);
+	    }
+	} else {
+	    //printf("find: [%d] FREE\n", i);
+	}
+    }
+    return NULL;
+}
+
+void free_frag_list(frag_info_t *p)
+{
+    frag_info_t *q;
+    while (p) {
+	q = p->next;
+	call FragInfoPool.put(p);
+	p = q;
+    }
+}
+/*---------------------------------------------------------------------------*/
+  
+    void ip_init()
+    {
+	//int i;
+	lastport = 1024;
+	memset(udp_conns, 0, sizeof(udp_conns));
+	//memset(&global_addr, 0, sizeof(global_addr));
+	memset(&linklocal_addr, 0, sizeof(linklocal_addr));
+	memset(frag_bufs, 0, sizeof(frag_bufs));
+	/*
+	for(i=0;i<FAG_BUFS,i++) {
+	    frag_buf_clear(frag_bufs[i]);
+	}
+	*/
+    }
+
+    uint16_t udp_assign_port()
+    {
+	int c;
+	
+	/* Find an unused local port. */
+    again:
+	++lastport;
+	
+	if (lastport >= 32000) {
+	    lastport = 4096;
+	}
+	
+	for (c = 0; c < COUNT_UDP_CONNS; ++c) {
+	    if (udp_conns[c].lport == lastport) {
+		goto again;
+	    }
+	}
+	
+	return lastport;
+    }    
+
+/* ========================= IPv6 - output ================================= */
+task void sendTask()
+{
+    lowpan_pkt_t *pkt = send_queue;
+    struct lowpan_frag_hdr *frag_hdr;
+    uint8_t *payload;
+    uint8_t frame_len;
+    uint8_t len; /* length of the fragment just being sent
+		  * excluding the 6lowpan optional headers */
+    uint8_t remaining_len; /* how much more data can we fit 
+			    * into this fragment */
+
+    uint8_t *tmp_cpy_buf; /* simplifies memcpy */
+    uint8_t tmp_cpy_len; /* simplifies memcpy */
+
+    if (!pkt || g_send_pending) {
+	return;
+    }
+    
+    //len = pkt->header_len + pkt->app_data_len - pkt->dgram_offset*8;
+    if (pkt->header_len + pkt->app_data_len <= LINK_DATA_MTU) {
+	/* fragmentation not needed */
+	frame_len = pkt->header_len + pkt->app_data_len;
+	/* prepare the AM */
+	call Packet.clear(&g_msg);
+	call Packet.setPayloadLength(&g_msg, frame_len);
+	payload = call Packet.getPayload(&g_msg, frame_len);
+	// memset(payload, 0 , payload_len);
+	// should check payload_len here
+	
+	/* copy header */
+	if (pkt->header_begin && pkt->header_len)
+	    memcpy(payload, pkt->header_begin, pkt->header_len);
+	payload += pkt->header_len;
+
+	/* copy app_data */
+	if (pkt->app_data_begin && pkt->app_data_len)
+	    memcpy(payload, pkt->app_data_begin, pkt->app_data_len);
+
+    } else {
+	/* do fragmentation */
+	if (pkt->dgram_offset == 0) {
+	    /* first fragment */
+	    increment_g_dgram_tag();
+	    set_16t(&pkt->dgram_size,
+		    htons(pkt->header_len + pkt->app_data_len));
+	    
+	    /* align fragment length at an 8-byte multiple */
+	    len = LINK_DATA_MTU - sizeof(struct lowpan_frag_hdr);
+	    len -= len%8;
+	    frame_len = len + sizeof(struct lowpan_frag_hdr);
+	} else {
+	    /* subsequent fragment */
+	    if (pkt->header_len + pkt->app_data_len - pkt->dgram_offset*8
+		<= LINK_DATA_MTU - sizeof(struct lowpan_frag_hdr)
+		- sizeof(uint8_t)) {
+		/* last fragment -- does not have to be aligned
+		 * at an 8-byte multiple */
+		len = pkt->header_len + pkt->app_data_len
+		    - pkt->dgram_offset*8;
+	    } else {
+		/* align fragment length at an 8-byte multiple */
+		len = LINK_DATA_MTU - sizeof(struct lowpan_frag_hdr)
+		    - sizeof(uint8_t);
+		len -= len%8;
+	    }
+	    frame_len = len + sizeof(struct lowpan_frag_hdr)
+		+ sizeof(uint8_t);
+	}
+    
+	/* prepare the AM */
+	call Packet.clear(&g_msg);
+	call Packet.setPayloadLength(&g_msg,frame_len);
+	payload = call Packet.getPayload(&g_msg, frame_len);
+	remaining_len = frame_len;
+	if (remaining_len != frame_len) {
+	    //TODO: report an error
+#ifdef ENABLE_PRINTF_DEBUG
+	    printf("payload length does not match requested length\n");
+	    call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	    return;
+	}
+
+	/* fill in the fragment header */
+	frag_hdr = (struct lowpan_frag_hdr *) payload;
+	set_16t(&frag_hdr->dgram_size, pkt->dgram_size);
+	set_16t(&frag_hdr->dgram_tag, g_dgram_tag);
+	payload += sizeof(struct lowpan_frag_hdr);
+	remaining_len -= sizeof(struct lowpan_frag_hdr);
+	
+	if (pkt->dgram_offset == 0) {
+	    /* first fragment */
+	    frag_hdr->dispatch |= DISPATCH_FIRST_FRAG;
+	} else {
+	    /* subsequent fragment */
+	    frag_hdr->dispatch |= DISPATCH_SUBSEQ_FRAG;
+	    *payload = pkt->dgram_offset;
+	    payload += sizeof(uint8_t);
+	}
+
+	/* copy header */
+	if (pkt->header_begin
+	    && pkt->header_len
+	    && pkt->header_len > pkt->dgram_offset*8
+	       /* don't copy the header if offset is beyond it*/
+	    ) {
+	    /* determine what has to be copied */
+	    tmp_cpy_buf = pkt->header_begin + pkt->dgram_offset*8;
+	    tmp_cpy_len = min(pkt->header_len - pkt->dgram_offset*8,
+			  remaining_len);
+	    /* copy it */
+	    memcpy(payload, tmp_cpy_buf, tmp_cpy_len);
+	    payload += tmp_cpy_len;
+	    remaining_len -= tmp_cpy_len;
+	}
+	
+	/* copy app_data */
+	if (remaining_len
+	    && pkt->app_data_begin
+	    && pkt->app_data_len
+	    ) {
+	    /* determine what has to be copied */
+	    if (pkt->dgram_offset*8 > pkt->header_len) {
+		tmp_cpy_buf = pkt->app_data_begin
+		              + pkt->dgram_offset*8 - pkt->header_len;
+	    } else {
+		/* header has been copied only now, offset not yet updated */
+		tmp_cpy_buf = pkt->app_data_begin;
+	    }
+	    tmp_cpy_len = min(remaining_len,
+			      pkt->app_data_len
+			      - (pkt->dgram_offset*8 - pkt->header_len));
+	    /* copy it */
+	    memcpy(payload, tmp_cpy_buf, tmp_cpy_len);
+	    payload += tmp_cpy_len;
+	    remaining_len -= tmp_cpy_len;
+	}
+		
+	/* update the offset - in 8-byte multiples */
+	pkt->dgram_offset += len/8;
+	if (len%8) {
+	    /* last fragment with a special length */
+	    pkt->dgram_offset++;
+	}
+    }
+
+    /* send the AM */
+    g_send_pending = 1;
+    call AMSend.send(AM_BROADCAST_ADDR, &g_msg, frame_len);
+    //call AMSend.send(0x12, &g_msg, frame_len);
+}
+
+event void AMSend.sendDone(message_t* msg, error_t error)
+{
+    uint16_t len;
+    lowpan_pkt_t *pkt = send_queue;
+
+    g_send_pending = 0;
+
+    if (!send_queue) {
+	// somethign really went wrong...
+	return;
+    }
+
+    len = pkt->header_len + pkt->app_data_len;
+    if (len <= LINK_DATA_MTU || pkt->dgram_offset*8 >= len){
+	/* packet has been completely sent, we can move on to the next one */
+
+	/* UDPClient.sendDone notification */
+	if (send_queue->notify_num != LOWPAN_PKT_NO_NOTIFY) {
+	    signal UDPClient.sendDone[send_queue->notify_num - 1]
+		(SUCCESS, send_queue->app_data);
+	}
+
+	/* deallocation of app_data (fragment reassembly buffer) */
+	if (send_queue->app_data_dealloc == APP_DATA_DEALLOC_TRUE
+	    && send_queue->app_data) {
+	    call AppDataPool.put((app_data_t*) send_queue->app_data);
+	    send_queue->app_data = NULL;
+	}
+	
+	pkt = send_queue->next;
+	call SendPktPool.put(send_queue);
+	send_queue = pkt;
+    }
+    if (send_queue) {
+	post sendTask();
+    }
+}
+
+void ipv6_output_uncompressed(lowpan_pkt_t *pkt, const uint8_t next_header)
+{
+    struct ip6_hdr *hdr;
+    lowpan_pkt_t *p;
+
+    pkt->header_begin -= sizeof(struct ip6_hdr);
+    pkt->header_len += sizeof(struct ip6_hdr);
+    hdr = (struct ip6_hdr *) pkt->header_begin;
+
+    /* fill in the IPv6 header */
+    hdr->vtc = IPV6_VERSION; /* IPv6 version */
+    /* payload length */
+    set_16t(&hdr->plen, htons(pkt->header_len + pkt->app_data_len
+			      - sizeof(struct ip6_hdr)));
+    
+    hdr->nxt_hdr = next_header;
+    hdr->hlim = IP_HOP_LIMIT; /* hop limit */
+    
+    memcpy(&hdr->src_addr, &pkt->ip_src_addr, sizeof(hdr->src_addr));
+    memcpy(&hdr->dst_addr, &pkt->ip_dst_addr, sizeof(hdr->dst_addr));
+
+    /* set 6lowpan dispatch value */
+    pkt->header_begin -= sizeof(uint8_t);
+    pkt->header_len += sizeof(uint8_t);
+    *(pkt->header_begin) = DISPATCH_UNCOMPRESSED_IPV6;
+
+    //TODO: check if neighbor is information available
+    //  if yes
+    //    fill in hw_addr
+    //    append to send_queue
+    //  else
+    //    append to neighbor_queue
+    //    request ND, add an entry into the neighbor table
+
+    /* append pkt to send queue */
+    if(!send_queue) {
+	send_queue = pkt;
+    } else {
+	for(p=send_queue; p->next; p=p->next);
+	p->next = pkt;
+    }
+
+    /* schedule sendTask */
+    post sendTask();
+}
+
+/* determines length of the inline carried fields for the HC1 encoding
+ * the return value is the number of bits, bot bytes !!!
+ */
+int get_hc1_length(uint8_t hc1_enc)
+{
+    int len = 0;
+    /* Hop Limit always carried inline */
+    len += 8;
+    
+    /* source IP address */
+    if ((hc1_enc & HC1_SRC_PREFIX_MASK) == HC1_SRC_PREFIX_INLINE)
+	len += 64;
+     
+    if ((hc1_enc & HC1_SRC_IFACEID_MASK) == HC1_SRC_IFACEID_INLINE)
+	len += 64;
+
+    /* destination IP address */
+    if ((hc1_enc & HC1_DST_PREFIX_MASK) == HC1_DST_PREFIX_INLINE)
+	len += 64;
+     
+    if ((hc1_enc & HC1_DST_IFACEID_MASK) == HC1_DST_IFACEID_INLINE)
+	len += 64;
+
+    /* Traffic Class and Flow Label */
+    if ((hc1_enc & HC1_TCFL_MASK) == HC1_TCFL_INLINE)
+	len += 24;
+
+    /* Next Header */
+    if ((hc1_enc & HC1_NEXTHDR_MASK) == HC1_NEXTHDR_INLINE)
+	len += 8;
+
+    return len;
+}
+
+void ipv6_compressed_output(lowpan_pkt_t *pkt, const uint8_t next_header,
+			    uint8_t hc2_enc, bool hc2_present)
+{
+    lowpan_pkt_t *p;
+    uint8_t hc1_enc = 0;
+
+    /* HC2 compression */
+    if (hc2_present) {
+	hc1_enc |= HC1_HC2_PRESENT;
+    } else {    
+	hc1_enc |= HC1_HC2_NONE;
+    }
+
+    /* next header */
+    switch (next_header) {
+    case NEXT_HEADER_UDP:
+	hc1_enc |= HC1_NEXTHDR_UDP;
+	break;
+    case NEXT_HEADER_ICMP6:
+	hc1_enc |= HC1_NEXTHDR_ICMP;
+	break;
+    case NEXT_HEADER_TCP:
+	hc1_enc |= HC1_NEXTHDR_TCP;
+	break;
+    default:
+	hc1_enc |= HC1_NEXTHDR_INLINE;
+
+	pkt->header_begin -= sizeof(next_header);
+	pkt->header_len += sizeof(next_header);
+	*(pkt->header_begin) = next_header;
+	break;
+    }
+
+    /* we're always sending packets with TC anf FL zero */
+    hc1_enc |= HC1_TCFL_ZERO;
+    
+    /* destination address interface identifier */
+    hc1_enc |= HC1_DST_IFACEID_INLINE;
+    
+    pkt->header_begin -= 8;
+    pkt->header_len += 8;
+    memcpy(pkt->header_begin, ((void*)&(pkt->ip_dst_addr)) + 8, 8);
+
+    /* destination address prefix */
+    if (ipv6_addr_is_linklocal_unicast(&pkt->ip_dst_addr)) {
+	hc1_enc |= HC1_DST_PREFIX_LINKLOCAL;
+    } else {
+	hc1_enc |= HC1_DST_PREFIX_INLINE;
+
+	pkt->header_begin -= 8;
+	pkt->header_len += 8;
+	memcpy(pkt->header_begin, &(pkt->ip_dst_addr), 8);
+    }
+
+    /* source address interface identifier */
+    hc1_enc |= HC1_SRC_IFACEID_INLINE;
+    
+    pkt->header_begin -= 8;
+    pkt->header_len += 8;
+    memcpy(pkt->header_begin, ((void*)&(pkt->ip_src_addr)) + 8, 8);
+
+    /* source address prefix */
+    if (ipv6_addr_is_linklocal_unicast(&pkt->ip_src_addr)) {
+	hc1_enc |= HC1_SRC_PREFIX_LINKLOCAL;
+    } else {
+	hc1_enc |= HC1_SRC_PREFIX_INLINE;
+
+	pkt->header_begin -= 8;
+	pkt->header_len += 8;
+	memcpy(pkt->header_begin, &(pkt->ip_src_addr), 8);
+    }
+
+    /* Hop Limit */
+    pkt->header_begin -= sizeof(uint8_t);
+    pkt->header_len += sizeof(uint8_t);
+    *pkt->header_begin = IP_HOP_LIMIT;
+    
+    /* HC2 encoding field */
+    if (hc2_present) {
+	pkt->header_begin -= sizeof(uint8_t);
+	pkt->header_len += sizeof(uint8_t);
+	*(pkt->header_begin) = hc2_enc;
+    }
+
+    /* HC1 encoding field */
+    pkt->header_begin -= sizeof(uint8_t);
+    pkt->header_len += sizeof(uint8_t);
+    *(pkt->header_begin) = hc1_enc;
+
+    /* set 6lowpan dispatch value */
+    pkt->header_begin -= sizeof(uint8_t);
+    pkt->header_len += sizeof(uint8_t);
+    *(pkt->header_begin) = DISPATCH_COMPRESSED_IPV6;
+
+    /* append pkt to send queue */
+    if(!send_queue) {
+	send_queue = pkt;
+    } else {
+	for(p=send_queue; p->next; p=p->next);
+	p->next = pkt;
+    }
+
+    /* schedule sendTask */
+    post sendTask();
+}
+
+void icmpv6_output(lowpan_pkt_t *pkt,
+		   uint8_t type, uint8_t code)
+{
+    struct icmp6_hdr *hdr;
+    uint16_t cksum = 0;
+    /* fill in the source address if not set */
+    if (ipv6_addr_is_zero(&pkt->ip_src_addr)) {
+	memcpy(&pkt->ip_src_addr,
+	       determine_src_ipv6_addr(&pkt->ip_dst_addr),
+	       sizeof(pkt->ip_src_addr));
+    }
+
+    /* fill in the ICMPv6 header */
+    pkt->header_begin -= sizeof(struct icmp6_hdr);
+    pkt->header_len += sizeof(struct icmp6_hdr);
+    hdr = (struct icmp6_hdr *) pkt->header_begin;
+
+    hdr->type = type;
+    hdr->code = code;
+
+    /* calculate the  checksum */
+    set_16t(&hdr->cksum, 0);
+    cksum = ipv6_chksum(&pkt->ip_src_addr, &pkt->ip_dst_addr,
+			NEXT_HEADER_ICMP6,
+			pkt->header_len + pkt->app_data_len, cksum);
+    cksum = ip_chksum((void*)hdr, sizeof(struct icmp6_hdr), cksum);
+    cksum = ip_chksum(pkt->app_data_begin, pkt->app_data_len,
+			   cksum);
+    cksum = ~cksum;
+    set_16t(&hdr->cksum, cksum);
+    
+    ipv6_compressed_output(pkt, NEXT_HEADER_ICMP6, 0, FALSE);
+}
+
+error_t udp_uncompressed_output(void* buf, uint16_t len,
+				const ip6_addr_t *src_addr,
+				const ip6_addr_t *dst_addr,
+				uint16_t src_port,
+				uint16_t dst_port,
+				uint8_t udp_client_num)
+{
+    struct udp_hdr *hdr;
+    lowpan_pkt_t *pkt;
+    uint16_t cksum = 0;
+
+    if (!dst_addr) return FAIL;
+
+    pkt = call SendPktPool.get();
+    if (!pkt) return FAIL;
+
+    lowpan_pkt_clear(pkt);
+    
+    /* set the UDPCliemt number to allow for signalling sendDone */
+    pkt->notify_num = udp_client_num;
+
+    /* set application data */
+    pkt->app_data = buf;
+    pkt->app_data_begin = buf;
+    pkt->app_data_len = len;
+    
+    /* set IP addresses */
+    memcpy(&pkt->ip_dst_addr, dst_addr, sizeof(pkt->ip_dst_addr));
+    if (src_addr) {
+	memcpy(&pkt->ip_src_addr, src_addr, sizeof(pkt->ip_src_addr));
+    } else {
+	memcpy(&pkt->ip_src_addr,
+	       determine_src_ipv6_addr(dst_addr),
+	       sizeof(pkt->ip_src_addr));
+    }
+
+    /* fill in the UDP header */
+    pkt->header_begin -= sizeof(struct udp_hdr);
+    pkt->header_len += sizeof(struct udp_hdr);
+    hdr = (struct udp_hdr *) pkt->header_begin;
+    /* src port */
+    set_16t(&hdr->srcport, src_port);
+    /* dst port */
+    set_16t(&hdr->dstport, dst_port);
+    /* length */
+    set_16t(&hdr->len,htons(len + sizeof(struct udp_hdr)));
+    /* checksum */
+    set_16t(&hdr->chksum, 0);
+    cksum = ip_chksum((uint8_t*) hdr, sizeof(struct udp_hdr), cksum);
+    cksum = ipv6_chksum(&pkt->ip_dst_addr,
+			&pkt->ip_src_addr,
+			NEXT_HEADER_UDP,
+			sizeof(struct udp_hdr) + len, cksum);
+    cksum = ip_chksum(buf, len, cksum);
+    if (cksum != 0xFFFF) {
+	cksum = ~cksum;
+    }
+    set_16t(&hdr->chksum, cksum);
+
+    ipv6_compressed_output(pkt, NEXT_HEADER_UDP, 0, FALSE);
+
+    return SUCCESS;
+}
+
+error_t udp_compressed_output(void* buf, uint16_t len,
+			      const ip6_addr_t *src_addr,
+			      const ip6_addr_t *dst_addr,
+			      uint16_t src_port,
+			      uint16_t dst_port,
+			      uint8_t udp_client_num)
+{
+    lowpan_pkt_t *pkt;
+    uint16_t cksum = 0;
+    uint16_t hc2_enc = 0;
+    uint16_t udp_len = htons(len + sizeof(struct udp_hdr));
+
+    if (!dst_addr) return FAIL;
+
+    pkt = call SendPktPool.get();
+    if (!pkt) return FAIL;
+
+    lowpan_pkt_clear(pkt);
+    
+    /* set the UDPCliemt number to allow for signalling sendDone */
+    pkt->notify_num = udp_client_num;
+
+    /* set application data */
+    pkt->app_data = buf;
+    pkt->app_data_begin = buf;
+    pkt->app_data_len = len;
+    
+    /* set IP addresses */
+    memcpy(&pkt->ip_dst_addr, dst_addr, sizeof(pkt->ip_dst_addr));
+    if (src_addr) {
+	memcpy(&pkt->ip_src_addr, src_addr, sizeof(pkt->ip_src_addr));
+    } else {
+	memcpy(&pkt->ip_src_addr,
+	       determine_src_ipv6_addr(dst_addr),
+	       sizeof(pkt->ip_src_addr));
+    }
+
+    /* Checksum */
+    cksum = 0;
+    cksum = ip_chksum((void*) &src_port, sizeof(src_port), cksum);
+    cksum = ip_chksum((void*) &dst_port, sizeof(src_port), cksum);
+    cksum = ip_chksum((void*) &udp_len, sizeof(udp_len), cksum);
+    cksum = ipv6_chksum(&pkt->ip_dst_addr,
+			&pkt->ip_src_addr,
+			NEXT_HEADER_UDP,
+			sizeof(struct udp_hdr) + len, cksum);
+    cksum = ip_chksum(buf, len, cksum);
+    if (cksum != 0xFFFF) {
+	cksum = ~cksum;
+    }
+
+    /* HC_UDP encoding */
+    /* Checksum */
+    pkt->header_begin -= sizeof(cksum);
+    pkt->header_len += sizeof(cksum);
+    set_16t(pkt->header_begin, cksum);
+
+    /* Length */
+    //hc2_enc |= HC2_UDP_LEN_COMPR;
+    hc2_enc |= HC2_UDP_LEN_INLINE;
+    pkt->header_begin -= sizeof(udp_len);
+    pkt->header_len += sizeof(udp_len);
+    set_16t(pkt->header_begin, udp_len);
+
+    /* Destination Port */
+    hc2_enc |= HC2_UDP_DST_PORT_INLINE;
+    pkt->header_begin -= sizeof(dst_port);
+    pkt->header_len += sizeof(dst_port);
+    set_16t(pkt->header_begin, dst_port);
+
+    /* Source Port */
+    hc2_enc |= HC2_UDP_SRC_PORT_INLINE;
+    pkt->header_begin -= sizeof(src_port);
+    pkt->header_len += sizeof(src_port);
+    set_16t(pkt->header_begin, src_port);
+    
+    ipv6_compressed_output(pkt, NEXT_HEADER_UDP, hc2_enc, TRUE);
+
+    return SUCCESS;
+}
+/* ========================== IPv6 - input ================================= */
+void icmpv6_input(uint8_t* buf, uint16_t len)
+{
+    lowpan_pkt_t *pkt;
+    struct icmp6_hdr *hdr = (struct icmp6_hdr *)buf;
+
+    /* Compute and check the IP header checksum. */
+    if (ipv6_chksum_data(&rx_pkt.ip_src_addr, &rx_pkt.ip_dst_addr,
+		    NEXT_HEADER_ICMP6, buf, len, 0)
+	!= 0xffff) {
+#ifdef ENABLE_PRINTF_DEBUG
+	printf("icmpv6_input(): checksum failed\n");
+	call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	call Leds.led0Toggle();
+	return;
+    }
+
+    buf += sizeof(struct icmp6_hdr);
+    len -= sizeof(struct icmp6_hdr);
+    
+    switch (hdr->type) {
+    case ICMP_TYPE_ECHO_REQUEST:
+	/* ICMP code has to be 0 */
+	if (hdr->code != 0) {
+	    return;
+	}
+	
+	call Leds.led2Toggle();
+ 	/* send back an ICMP ECHO REPLY */
+
+	/* allocate a packet for the reply */
+	pkt = call SendPktPool.get();
+	if (!pkt) {
+#ifdef ENABLE_PRINTF_DEBUG
+	    printf("icmpv6_input() - failed to alloc pkt\n");
+	    call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	    return;
+	}
+	lowpan_pkt_clear(pkt);
+	
+	/* copy/set ICMP data */
+	if (rx_pkt.app_data) {
+	    /* fragment reassembly took place - ICMP data is in app_data buf */
+	    pkt->app_data = rx_pkt.app_data;
+	    pkt->app_data_begin = buf;
+	    pkt->app_data_len = len;
+	    pkt->app_data_dealloc = rx_pkt.app_data_dealloc;
+
+	    rx_pkt.app_data_dealloc = APP_DATA_DEALLOC_FALSE;
+	    rx_pkt.app_data = NULL;
+	} else {
+	    /* there is no app_data buf, everything fits into the header buf */
+	    pkt->header_begin -= len;
+	    my_memcpy(pkt->header_begin, buf, len);
+	    pkt->app_data_begin = pkt->header_begin;
+	    pkt->app_data_len = len;
+	}
+	
+	/* set destination address */
+	memcpy(&pkt->ip_dst_addr, &rx_pkt.ip_src_addr,
+	       sizeof(pkt->ip_dst_addr));
+	// source address determined automatically
+
+	icmpv6_output(pkt, ICMP_TYPE_ECHO_REPLY, 0);
+	break;
+    case ICMP_TYPE_ECHO_REPLY:
+	break;
+	
+    }
+}
+
+/* UDP input processing. */
+void udp_input(uint8_t* buf, uint16_t len)
+{
+    struct udp_conn *conn;
+    int c;
+    struct udp_hdr *hdr = (struct udp_hdr *)buf;
+    
+    /* Compute and check the IP header checksum. */
+    if (ipv6_chksum_data(&rx_pkt.ip_src_addr, &rx_pkt.ip_dst_addr,
+		    NEXT_HEADER_UDP, buf, len, 0)
+	!= 0xffff) {
+#ifdef ENABLE_PRINTF_DEBUG
+	printf("udp_input(): checksum failed\n");
+	call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	call Leds.led0Toggle();
+	return;
+    }
+
+    if (htons(len) != hdr->len) {
+#ifdef ENABLE_PRINTF_DEBUG
+	printf("length check failed\n");
+	printf("reported length: %d\n", len);
+	printf("UDP header len: %d\n", ntohs(hdr->len));
+	call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	return;
+    }
+    /* Scan the list of UDP sockets and look for one that is accepting
+       this port */
+    for (c = 0, conn = udp_conns; c < COUNT_UDP_CONNS; c++, conn++) {
+	/*
+	printf("lport: 0x%X\n", conn->lport);
+	printf("rport: 0x%X\n", conn->rport);
+	printf("conn->ripaddr: ");
+	dump_serial_packet(&(conn->ripaddr), sizeof(ip6_addr_t));
+	printf("src_addr: ");
+	dump_serial_packet(src_addr, sizeof(ip6_addr_t));
+	*/
+	if ( (conn->lport != 0 && conn->lport == hdr->dstport) &&
+	     (conn->rport == 0 || conn->rport == hdr->srcport) &&
+	     (ipv6_addr_is_zero(&(conn->ripaddr)) ||
+	      (cmp_ipv6_addr(&conn->ripaddr, &rx_pkt.ip_src_addr) == 0))
+	     )
+	    goto udp_match_found;
+    }
+#ifdef ENABLE_PRINTF_DEBUG
+    printf("udp_input(): no connection matched - dropping UDP packet\n");
+    call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+    return;
+    
+ udp_match_found:
+    len -= sizeof(struct udp_hdr);
+    if (len > 0) {
+	signal UDPClient.receive[c](&rx_pkt.ip_src_addr, ntohs(hdr->srcport),
+				    buf+sizeof(struct udp_hdr), len);
+    }
+}
+
+void udp_input_compressed(uint8_t* buf, uint16_t len, uint8_t hc2_enc)
+{
+    struct udp_conn *conn;
+    int c;
+    uint16_t src_port;
+    uint16_t dst_port;
+    uint16_t chksum;
+    uint16_t tmp_chksum;
+    uint16_t tmp_len;
+    
+    /* UDP Source Port */
+    if ((hc2_enc & HC2_UDP_SRC_PORT_MASK) == HC2_UDP_SRC_PORT_INLINE) {
+	src_port = get_16t(buf);
+	buf += sizeof(src_port);
+	len -= sizeof(src_port);
+    } else {
+	//TODO
+	return;
+    }
+
+    /* UDP Destination Port */
+    if ((hc2_enc & HC2_UDP_DST_PORT_MASK) == HC2_UDP_DST_PORT_INLINE) {
+	dst_port = get_16t(buf);
+	buf += sizeof(dst_port);
+	len -= sizeof(dst_port);
+    } else {
+	//TODO
+	return;
+    }
+
+    /* UDP Length */
+    if ((hc2_enc & HC2_UDP_LEN_MASK) == HC2_UDP_LEN_INLINE) {
+	/* check the length */
+	if (ntohs(get_16t(buf)) != len + sizeof(uint16_t)*2) {
+#ifdef ENABLE_PRINTF_DEBUG
+	    printf("length check failed\n");
+	    printf("reported length: %d\n", len + sizeof(uint16_t)*2);
+	    printf("UDP header len: %d\n", ntohs(get_16t(buf)));
+	    call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	    return;
+	}
+	buf += sizeof(uint16_t);
+	len -= sizeof(uint16_t);
+    }
+	
+    /* Checksum */
+    chksum = get_16t(buf);
+    buf += sizeof(chksum);
+    len -= sizeof(chksum);
+
+    /* --- end of decompression --- */
+
+    /* Compute and check the IP header checksum. */
+    tmp_chksum = 0;
+    /* IPv6 pseaudo header */
+    tmp_chksum = ipv6_chksum(&rx_pkt.ip_src_addr, &rx_pkt.ip_dst_addr,
+			     NEXT_HEADER_UDP,
+			     /* len is only app data, so add UDP header
+			      * length to get the length for chksum */
+			     len + sizeof(struct udp_hdr),
+			     tmp_chksum);
+    /* UDP header */
+    tmp_len = htons(len + sizeof(struct udp_hdr));
+    tmp_chksum = ip_chksum((void*) &src_port, sizeof(src_port), tmp_chksum);
+    tmp_chksum = ip_chksum((void*) &dst_port, sizeof(src_port), tmp_chksum);
+    tmp_chksum = ip_chksum((void*) &chksum, sizeof(chksum), tmp_chksum);
+    tmp_chksum = ip_chksum((void*) &tmp_len, sizeof(len), tmp_chksum);
+    /* UDP payload - application data */
+    tmp_chksum = ip_chksum(buf, len, tmp_chksum);
+
+    if (tmp_chksum != 0xffff) {
+#ifdef ENABLE_PRINTF_DEBUG
+	printf("udp_input_compressed(): checksum failed\n");
+	call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	call Leds.led0Toggle();
+	return;
+    }
+
+//     printf("udp_input_compressed()\n");
+//     printf("src_port: 0x%X\n", src_port);
+//     printf("dst_port: 0x%X\n", dst_port);
+//     printf("len (app_data): %d\n", len);
+//     call PrintfFlush.flush();
+
+    /* Scan the list of UDP sockets and look for one that is accepting
+       this port */
+    for (c = 0, conn = udp_conns; c < COUNT_UDP_CONNS; c++, conn++) {
+	/*
+	printf("lport: 0x%X\n", conn->lport);
+	printf("rport: 0x%X\n", conn->rport);
+	printf("conn->ripaddr: ");
+	dump_serial_packet(&(conn->ripaddr), sizeof(ip6_addr_t));
+	printf("src_addr: ");
+	dump_serial_packet(&rx_pkt.ip_src_addr, sizeof(ip6_addr_t));
+	*/
+	if ( (conn->lport != 0 && conn->lport == dst_port) &&
+	     (conn->rport == 0 || conn->rport == src_port) &&
+	     (ipv6_addr_is_zero(&(conn->ripaddr)) ||
+	      (cmp_ipv6_addr(&conn->ripaddr, &rx_pkt.ip_src_addr) == 0))
+	     )
+	    goto udp_match_found;
+    }
+#ifdef ENABLE_PRINTF_DEBUG
+    printf("udp_input_compressed(): "\
+	   "no connection matched - dropping UDP packet\n");
+    call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+    return;
+    
+ udp_match_found:
+    if (len > 0) {
+	signal UDPClient.receive[c](&rx_pkt.ip_src_addr, ntohs(src_port),
+				    buf, len);
+    }
+}
+
+/* processed the IPv6 header (uncompressed) */
+void ipv6_input_uncompressed(uint8_t* buf, uint16_t len)
+{
+    struct ip6_hdr *hdr = (struct ip6_hdr *) buf;
+
+    /* check the version */
+    if ((hdr->vtc & IPV6_VERSION_MASK) != 0x60) {
+#ifdef ENABLE_PRINTF_DEBUG
+	printf("IP version check failed (%X)\n",
+	       hdr->vtc & IPV6_VERSION_MASK);
+	call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	return;
+    }
+    
+    /* Hop Limit */
+    if (! hdr->hlim) {
+	/* Hop Limit reached zero */
+#ifdef ENABLE_PRINTF_DEBUG
+	printf("Hop Limit reached zero\n");
+	call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	return;
+    }
+
+    /* check dst IP address */
+    if (! ipv6_addr_is_for_me(&hdr->dst_addr)) {
+	return;
+    }
+
+    /* Check the size of the packet. If the size reported to us in
+     * uip_len doesn't match the size reported in the IP header, there
+     * has been a transmission error and we drop the packet.
+     */
+    if ( hdr->plen != htons(len - sizeof(struct ip6_hdr))) {
+#ifdef ENABLE_PRINTF_DEBUG
+	printf("length check failed\n");
+	printf("l2 reported length: %d\n", len - sizeof(struct ip6_hdr));
+	printf("IPv6 header plen: %d (network byte order: 0x%X\n",
+	       ntohs(hdr->plen), hdr->plen);
+	//((hdr->plen & 0xff00) >> 8) & ((hdr->plen & 0xff) << 8));
+	call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	return;
+    }
+    
+    /* copy IP addresses to rx_pkt */
+    memcpy(&rx_pkt.ip_src_addr, &(hdr->src_addr), sizeof(rx_pkt.ip_src_addr));
+    memcpy(&rx_pkt.ip_dst_addr, &(hdr->dst_addr), sizeof(rx_pkt.ip_dst_addr));
+
+    /* multipex on next header */
+    switch (hdr->nxt_hdr) {
+    case NEXT_HEADER_ICMP6:
+	icmpv6_input(buf + sizeof(struct ip6_hdr),
+		     len - sizeof(struct ip6_hdr));
+	break;
+    case NEXT_HEADER_UDP:
+	udp_input(buf + sizeof(struct ip6_hdr),
+		  len - sizeof(struct ip6_hdr));
+	break;
+	/*
+    case NEXT_HEADER_TCP:
+	break;
+	*/
+    default:
+#ifdef ENABLE_PRINTF_DEBUG
+	printf("unknown IPv6 next header: 0x%X\n", hdr->nxt_hdr);
+	call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	break;
+    }
+}
+
+/* processed the IPv6 header (uncompressed) */
+void ipv6_input_compressed(uint8_t* buf, uint16_t len)
+{
+    struct ip6_hdr *ip_hdr = (struct ip6_hdr *) buf;
+
+    uint8_t hc1_enc;
+    uint8_t hc2_enc = 0;
+    uint8_t next_header;
+
+    /*
+    printf("nxt_hdr: 0x%X\n", hdr->nxt_hdr);
+    dump_serial_packet(buf, len);
+    call PrintfFlush.flush();
+    */
+
+    hc1_enc = *buf;
+    buf += sizeof(hc1_enc);
+    len -= sizeof(hc1_enc);
+
+    /* HC2 encoding follows HC1 encoding */
+    if ((hc1_enc & HC1_HC2_MASK) == HC1_HC2_PRESENT) {
+	hc2_enc = *buf;
+	buf += sizeof(hc2_enc);
+	len -= sizeof(hc2_enc);
+    }
+
+    /* Hop Limit */
+    if (*buf) {
+	buf += sizeof(ip_hdr->hlim);
+	len -= sizeof(ip_hdr->hlim);
+    } else {
+	/* Hop Limit reached zero */
+	return;
+    }
+
+    /* source IP address */
+    if ((hc1_enc & HC1_SRC_PREFIX_MASK) == HC1_SRC_PREFIX_INLINE) {
+	memcpy(&rx_pkt.ip_src_addr, buf, sizeof(rx_pkt.ip_src_addr)/2);
+	buf += sizeof(rx_pkt.ip_src_addr)/2;
+	len -= sizeof(rx_pkt.ip_src_addr)/2;
+    } else {
+	/* linl-local prefix */
+	memset(&rx_pkt.ip_src_addr, 0, sizeof(rx_pkt.ip_src_addr)/2);
+	rx_pkt.ip_src_addr.addr[0] = 0xFE;
+	rx_pkt.ip_src_addr.addr[1] = 0x80;
+    }
+     
+    if ((hc1_enc & HC1_SRC_IFACEID_MASK) == HC1_SRC_IFACEID_INLINE) {
+	memcpy(((void*)&rx_pkt.ip_src_addr) + sizeof(rx_pkt.ip_src_addr)/2,
+	       buf, sizeof(rx_pkt.ip_src_addr)/2);
+	buf += sizeof(rx_pkt.ip_src_addr)/2;
+	len -= sizeof(rx_pkt.ip_src_addr)/2;
+    }
+
+    /* destination IP address */
+    if ((hc1_enc & HC1_DST_PREFIX_MASK) == HC1_DST_PREFIX_INLINE) {
+	memcpy(&rx_pkt.ip_dst_addr, buf, sizeof(rx_pkt.ip_dst_addr)/2);
+	buf += sizeof(rx_pkt.ip_dst_addr)/2;
+	len -= sizeof(rx_pkt.ip_dst_addr)/2;
+    } else {
+	/* linl-local prefix */
+	memset(&rx_pkt.ip_dst_addr, 0, sizeof(rx_pkt.ip_dst_addr)/2);
+	rx_pkt.ip_dst_addr.addr[0] = 0xFE;
+	rx_pkt.ip_dst_addr.addr[1] = 0x80;
+    }
+     
+    if ((hc1_enc & HC1_DST_IFACEID_MASK) == HC1_DST_IFACEID_INLINE) {
+	memcpy(((void*)&rx_pkt.ip_dst_addr) + sizeof(rx_pkt.ip_dst_addr)/2,
+	       buf, sizeof(rx_pkt.ip_dst_addr)/2);
+	buf += sizeof(rx_pkt.ip_dst_addr)/2;
+	len -= sizeof(rx_pkt.ip_dst_addr)/2;
+    }
+
+    /* check dst IP address */
+    if (! ipv6_addr_is_for_me(&rx_pkt.ip_dst_addr)) {
+	/*
+	printf("IP address check failed\n");
+	dump_serial_packet(hdr->dst_addr.addr, sizeof(hdr->dst_addr.addr));
+	call PrintfFlush.flush();
+	*/
+	return;
+    }
+
+    /* Traffic Class and Flow Label */
+    if ((hc1_enc & HC1_TCFL_MASK) == HC1_TCFL_INLINE) {
+	//TODO
+	return;
+    }
+
+    /* Next Header */
+    switch (hc1_enc & HC1_NEXTHDR_MASK) {
+    case HC1_NEXTHDR_INLINE:
+	next_header = *buf;
+	buf += sizeof(uint8_t);
+	len -= sizeof(uint8_t);
+	break;
+    case HC1_NEXTHDR_UDP:
+	next_header = NEXT_HEADER_UDP;
+	break;
+    case HC1_NEXTHDR_ICMP:
+	next_header = NEXT_HEADER_ICMP6;
+	break;
+    case HC1_NEXTHDR_TCP:
+	next_header = NEXT_HEADER_TCP;
+	break;
+    default:
+#ifdef ENABLE_PRINTF_DEBUG
+	printf("unknown next header HC1 encoding\n");
+	call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	return;
+    }
+    
+    /* multipex on the next header */
+    switch (next_header) {
+    case NEXT_HEADER_ICMP6:
+	icmpv6_input(buf, len);
+	break;
+    case NEXT_HEADER_UDP:
+	/* HC_UDP compression */
+	if ((hc1_enc & HC1_HC2_MASK) == HC1_HC2_PRESENT
+	    && (hc1_enc & HC1_NEXTHDR_MASK) == HC1_NEXTHDR_UDP) {
+	    udp_input_compressed(buf, len, hc2_enc);
+	    break;
+	} else {
+	    udp_input(buf, len);
+	    break;
+	}
+	/*
+    case NEXT_HEADER_TCP:
+	break;
+	*/
+    default:
+#ifdef ENABLE_PRINTF_DEBUG
+	printf("unknown IPv6 next header: 0x%X\n", next_header);
+	call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	break;
+    }
+}
+
+/* call the right fct for processing the IPv6 header */
+void layer3_input(uint8_t *buf, uint16_t len)
+{
+    uint8_t *dispatch = buf;
+    buf++;
+    len--;
+
+    /* uncompressed IPv6 */
+    if (*dispatch == DISPATCH_UNCOMPRESSED_IPV6) {
+	ipv6_input_uncompressed(buf, len);
+    }
+    /* LOWPAN_HC1 compressed IPv6 */
+    else if (*dispatch == DISPATCH_COMPRESSED_IPV6) {
+	//call Leds.led1Toggle();
+ 	return ipv6_input_compressed(buf, len);
+    }
+    /* unknown dispatch value if we got here */
+    else {
+	//TODO: report an error
+    }
+}
+
+/* process the optional 6lowpan headers */
+void TRUSTEDBLOCK lowpan_input(uint8_t* buf, uint8_t len )
+{
+      uint8_t *dispatch;
+      struct lowpan_broadcast_hdr *bc_hdr;
+      struct lowpan_frag_hdr *frag_hdr;
+      int i;
+
+      frag_buf_t *frag;
+      uint16_t dgram_tag;
+      uint16_t dgram_size;
+      uint8_t dgram_offset;
+      frag_info_t *p;
+      frag_info_t **q;
+      uint8_t last_frag;
+
+      dispatch = buf;
+      /* --- 6lowpan optional headers --- */
+      /* Mesh Addressing header */
+      if ( (*dispatch & DISPATCH_MESH_MASK) == DISPATCH_MESH) {
+	  // check if we're the final recipient in the mesh addressing header
+	  buf++;
+	  len--;
+
+	  /* Hops Left */
+	  if ((*dispatch & 0x0F) == 0) {
+	      goto discard_packet;
+	  }
+
+	  /* Final Destination Address */
+	  if (*dispatch & DISPATCH_MESH_F_FLAG) {
+	      rx_pkt.hw_dst_addr.type = HW_ADDR_LONG;
+	      memcpy(&rx_pkt.hw_dst_addr.addr_long, buf,
+		     sizeof(rx_pkt.hw_dst_addr.addr_long));
+	      buf += sizeof(rx_pkt.hw_dst_addr.addr_long);
+	      len -= sizeof(rx_pkt.hw_dst_addr.addr_long);
+	  } else {
+	      rx_pkt.hw_dst_addr.type = HW_ADDR_SHORT;
+	      memcpy(&rx_pkt.hw_dst_addr.addr_short, buf,
+		     sizeof(rx_pkt.hw_dst_addr.addr_short));
+	      buf += sizeof(rx_pkt.hw_dst_addr.addr_short);
+	      len -= sizeof(rx_pkt.hw_dst_addr.addr_short);
+	  }
+
+	  /* check if we're the recipient */
+	  if (! hw_addr_is_for_me(&rx_pkt.hw_dst_addr)) {
+	      // TODO: if mesh forwarding enabled, then forward
+	      goto discard_packet;
+	  }
+
+	  /* Originator Address */
+	  if (*dispatch & DISPATCH_MESH_O_FLAG) {
+	      rx_pkt.hw_src_addr.type = HW_ADDR_LONG;
+	      memcpy(&rx_pkt.hw_src_addr.addr_long, buf,
+		     sizeof(rx_pkt.hw_src_addr.addr_long));
+	      buf += sizeof(rx_pkt.hw_src_addr.addr_long);
+	      len -= sizeof(rx_pkt.hw_src_addr.addr_long);
+	  } else {
+	      rx_pkt.hw_src_addr.type = HW_ADDR_SHORT;
+	      memcpy(rx_pkt.hw_src_addr.addr_short, buf,
+		     sizeof(rx_pkt.hw_src_addr.addr_short));
+	      buf += sizeof(rx_pkt.hw_src_addr.addr_short);
+	      len -= sizeof(rx_pkt.hw_src_addr.addr_short);
+	  }
+
+	  dispatch = buf;
+      }
+      if (*dispatch == DISPATCH_BC0) { /* Broadcast header */
+	  bc_hdr = (struct lowpan_broadcast_hdr *) buf;
+	  // do something usefull with bc_hdr->seq_no...
+	  
+	  buf += (sizeof(struct lowpan_broadcast_hdr));
+	  len -= (sizeof(struct lowpan_broadcast_hdr));
+	  dispatch = buf;
+      }
+
+      /* fragment header */
+      if ((*dispatch & DISPATCH_FRAG_MASK)
+	  == DISPATCH_FIRST_FRAG
+	  || (*dispatch & DISPATCH_FRAG_MASK)
+	  == DISPATCH_SUBSEQ_FRAG
+	  ) {
+	  frag_hdr = (struct lowpan_frag_hdr *) buf;
+	  buf += sizeof(struct lowpan_frag_hdr);
+	  len -= sizeof(struct lowpan_frag_hdr);
+
+	  /* collect information about the fragment */
+	  dgram_tag = get_16t(&frag_hdr->dgram_tag);
+	  //dgram_size = get_16t(&frag_hdr->dgram_size);
+	  //dgram_size &= htons(0x07FF);
+	  dgram_size = frag_hdr->dgram_size8[1];
+	  dgram_size += (frag_hdr->dgram_size8[0] & 0x07) << 8;
+	  dgram_size = htons(dgram_size);
+	  if ((*dispatch & DISPATCH_FRAG_MASK) == DISPATCH_SUBSEQ_FRAG) {
+	      dgram_offset = *buf;
+	      buf += 1;
+	      len -= 1;
+	  } else {
+	      dgram_offset = 0;
+	  }
+
+#ifdef ENABLE_PRINTF_DEBUG
+	  printf("off: %d\n", dgram_offset);
+#endif /* ENABLE_PRINTF_DEBUG */
+	  /*
+	  printf("off: %d, f_b[%d] %d\n",
+		 dgram_offset, 0, frag_bufs[0].frag_timeout);
+	  */
+	  frag = find_fragment(&rx_pkt.hw_src_addr, &rx_pkt.hw_dst_addr,
+			       dgram_size, dgram_tag);
+	  /*
+	  if (frag) {
+	      printf("frag found\n");
+	  } else {
+	      printf("frag NOT found\n");
+	  }
+	  */
+	  if (frag) {
+	      /* fragment reassembly buffer found */
+	      /* check for overlap */
+	      //TODO: ENABLE THIS PART !!!
+// 	      for (p = frag->frag_list; p; p=p->next) {
+// 		  if (dgram_offset == p->offset){
+// 		      if (len == p->len) {
+// 			  /* same offset, same len => discard this duplicate */
+// 			  goto discard_packet;
+// 		      } else {
+// 			  /* same offset, but different len */
+// 			  goto frag_overlap;
+// 		      }
+// 		  } else if (dgram_offset > p->offset
+// 			     && dgram_offset < p->offset + p->len/8
+// 			     ) {
+// 		      /* offset inside another frag*/
+// 		      goto frag_overlap;
+// 		  }
+// 	      }
+	      /* no overlap found */
+	      //printf("frag found: %d\n", frag->frag_timeout);
+	      goto frag_reassemble;
+	  } else {
+	      /* fragment reassembly buffer not found - set up a new one */
+	      // no match found -- need a new frag_buf_t
+	      for (i = 0; i< FRAG_BUFS; i++) {
+		  if (frag_bufs[i].frag_timeout == FRAG_FREE
+		      && call AppDataPool.empty() == FALSE) {
+		      frag = &frag_bufs[i];
+		      set_16t(&frag->dgram_tag, get_16t(&frag_hdr->dgram_tag));
+		      set_16t(&frag->dgram_size, dgram_size);
+		      memcpy(&frag->hw_src_addr, &rx_pkt.hw_src_addr,
+			     sizeof(frag->hw_src_addr));
+		      memcpy(&frag->hw_dst_addr, &rx_pkt.hw_dst_addr,
+			     sizeof(frag->hw_dst_addr));
+		      frag->frag_timeout = FRAG_TIMEOUT;
+		      frag->buf = (uint8_t *) call AppDataPool.get();
+		      frag->frag_list = NULL;
+		      /*
+		      printf("new frag_buf[%d] %d\n", i,
+			     frag_bufs[i].frag_timeout);
+		      printf("frag pool size: %d\n", call FragInfoPool.size());
+		      call PrintfFlush.flush();
+		      */
+		      goto frag_reassemble;
+		  }
+	      }
+	      // no free slot for reassembling fragments
+#ifdef ENABLE_PRINTF_DEBUG
+	      printf("no free slot - discarding frag\n");
+	      call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	      goto discard_packet;
+	  }
+	  
+      frag_overlap:
+	  /* overlap - discard previous frags
+	   * and restart fragment reassembly
+	   */
+	  free_frag_list(frag->frag_list);
+	  frag->frag_list = NULL;
+	  frag->frag_timeout = FRAG_TIMEOUT;
+	  goto frag_reassemble;
+	  
+      frag_reassemble:
+	  /*
+	  printf("tag: 0x%04X, size: %d, off: %d, t: %d\n",
+		 get_16t(&frag->dgram_tag),
+		 ntohs(get_16t(&frag->dgram_size)),
+		 dgram_offset,
+		 frag->frag_timeout);
+	  //printf("f_b[%d] %d\n", 0, frag_bufs[0].frag_timeout);
+	  if (dgram_offset > 0) {
+	      call PrintfFlush.flush();
+	  }
+	  */
+	  /* copy buf data */
+	  //if (dgram_offset*8 + len <= sizeof(frag->buf)) {
+	  if (dgram_offset*8 + len <= FRAG_BUF_SIZE) {
+	      memcpy(frag->buf + (dgram_offset*8), buf, len);
+	  } else {
+	      call Leds.led0Toggle();
+	  }
+	  
+	  /* update frag_info */
+	  p = call FragInfoPool.get();
+	  if (!p) {
+	      //out of memory - fragment reassembly failing
+	      //TODO
+	      call Leds.led0Toggle();
+#ifdef ENABLE_PRINTF_DEBUG
+	      printf("FAILED to alloc frag_info_t\n");
+	      call PrintfFlush.flush();
+#endif /* ENABLE_PRINTF_DEBUG */
+	  } else {
+	      p->offset = dgram_offset;
+	      p->len = len;
+	      
+	      /* insert frag_info into the orderer list */
+	      if (frag->frag_list) {
+		  for(q = &(frag->frag_list); (*q)->next; q=&((*q)->next)) {
+		      if (p->offset > (*q)->offset) {
+			  break;
+		      }
+		  }
+		  p->next = *q;
+		  *q = p;
+	      } else {
+		  p->next = frag->frag_list;
+		  frag->frag_list = p;
+	      }
+	  }
+
+#ifdef ENABLE_PRINTF_DEBUG
+	  if (dgram_offset > 20) {
+	      printf("frag_list:\n");
+	      //ntohs(get_16t(&frag->dgram_tag)),
+	      //ntohs(get_16t(&frag->dgram_size)));
+	      for (p=frag->frag_list;p;p=p->next) {
+		  printf("off: %d, len: %d\n", p->offset, p->len);
+	      }
+	      call PrintfFlush.flush();
+	  }
+#endif /* ENABLE_PRINTF_DEBUG */
+
+	  /* check if this is not the last fragment */
+	  if (!dgram_offset) {
+	      /* the first fragment cannot be the last one */
+	      last_frag = 0;
+	  } else {
+	      last_frag=1;
+	      dgram_offset = ntohs(dgram_size)/8;
+	      for(p=frag->frag_list; p && dgram_offset; p=p->next) {
+		  //debug("dgram_offset: %d, p->offset: %d, p->len: %d\n",
+		  //  dgram_offset, p->offset, p->len);
+		  if (p->offset + p->len/8 != dgram_offset) {
+		      //debug("offset mismatch - not the last fragment\n");
+		      last_frag = 0;
+		      break;
+		  }
+		    dgram_offset = p->offset;
+	      }
+	  }
+	  
+	  if (last_frag) {
+	      call Leds.led1Toggle();
+	      /* prepare the complete packet to be passed up*/
+	      lowpan_pkt_clear(&rx_pkt);
+	      rx_pkt.app_data = frag->buf;
+	      rx_pkt.app_data_dealloc = APP_DATA_DEALLOC_TRUE;
+	      rx_pkt.header_begin = frag->buf;
+	      rx_pkt.header_len = ntohs(dgram_size);
+
+	      //debug("dumping reassembled datagram...\n");
+	      //dump_serial_packet(pkt->buf_begin, pkt->len);
+
+	      /* pass up the packet */
+	      layer3_input(rx_pkt.header_begin, rx_pkt.header_len);
+	      
+	      /* deallocate all fragment info */
+	      free_frag_list(frag->frag_list);
+	      frag->frag_list = NULL;
+	      frag->frag_timeout = FRAG_FREE;
+     	      if (rx_pkt.app_data_dealloc == APP_DATA_DEALLOC_TRUE
+		  && rx_pkt.app_data) {
+		  /* deallocate the frag_buf */
+		  call AppDataPool.put((app_data_t *) rx_pkt.app_data);
+	      }
+	  } else {
+	      /* packet not yet complete */
+	      return;
+	  }
+	  dispatch = buf;
+      } else {
+	  /* no fragmentation */
+
+	  /* pass up the complete packet */
+	  lowpan_pkt_clear(&rx_pkt);
+	  rx_pkt.header_begin = buf;
+	  rx_pkt.header_len = len;
+	  layer3_input(buf, len);
+      }
+      
+      
+ discard_packet:
+      // deallocate pkt
+      // update stats
+}
+
+/* Receive an AM from the lower layer */
+event TRUSTEDBLOCK message_t* Receive.receive(message_t* msg, void* payload, uint8_t len)
+{
+    am_addr_t am_addr;
+    
+    //call Leds.led0Toggle();
+    
+    /* 802.15.4 source address */
+    rx_pkt.hw_src_addr.type = HW_ADDR_SHORT;
+    am_addr = call AMPacket.source(msg);
+    memcpy(&rx_pkt.hw_src_addr.addr_short, &am_addr, sizeof(am_addr_t));
+    
+    /* 802.15.4 destination address */
+    rx_pkt.hw_dst_addr.type = HW_ADDR_SHORT;
+    am_addr = call AMPacket.destination(msg);
+    memcpy(&rx_pkt.hw_dst_addr.addr_short, &am_addr, sizeof(am_addr_t));
+    
+    lowpan_input(payload, len);
+    return msg;
+}
+
+/******************************************
+ *  Interface StdControl
+ ******************************************/
+  
+command error_t IPControl.start() 
+{
+#ifdef ENABLE_PRINTF_DEBUG
+    call PrintfControl.start();
+#endif /* ENABLE_PRINTF_DEBUG */
+    ip_init();
+    linklocal_addr.addr[0] = 0xfe;
+    linklocal_addr.addr[1] = 0x80;
+    ipv6_iface_id_from_am_addr(call AMPacket.address(),
+			       &(linklocal_addr.addr[8]));
+    //set_16t((uint16_t *)&(linklocal_addr.addr[14]), am_addr);
+    call MessageControl.start();
+    return SUCCESS;
+}
+
+event void MessageControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+	signal IPControl.startDone(err);
+	call Timer.startPeriodic(1024); /* fire every second */
+    }
+    else {
+	call MessageControl.start();
+    }
+}
+
+command error_t IPControl.stop()
+{
+    call MessageControl.stop();
+    call Timer.stop();      
+#ifdef ENABLE_PRINTF_DEBUG
+    call PrintfControl.stop();
+#endif /* ENABLE_PRINTF_DEBUG */
+    return SUCCESS;
+}
+
+event void MessageControl.stopDone(error_t err) {
+    signal IPControl.stopDone(err);
+}
+
+/******************************************
+ *  IP Interface
+ ******************************************/
+command void IP.getAddress(ip6_addr_t *addr)
+{
+    addr =  &global_addr;
+    //uip_unpack_ipaddr( uip_global_addr, addr->addr );
+}
+
+command void IP.setAddress(const ip6_addr_t *addr)
+{
+    memcpy(&global_addr, addr, sizeof(*addr));
+    //uip_pack_ipaddr(uip_global_addr,octet1,octet2,octet3,octet4);
+}
+
+command void IP.setAddressAutoconf(const ip6_addr_t *addr)
+{
+    memcpy(&global_addr, addr, sizeof(*addr));
+    ipv6_iface_id_from_am_addr(call AMPacket.address(),
+			       &(global_addr.addr[8]));
+    //set_16t((uint16_t *)&(global_addr.addr[14]), am_addr);
+}
+
+/*****************************
+ *  UDP functions
+ *****************************/
+command error_t UDPClient.listen[uint8_t num](uint16_t port)
+{
+    if (port) {
+	memset(&udp_conns[num].ripaddr, 0,
+	       sizeof(udp_conns[num].ripaddr));
+	set_16t(&udp_conns[num].lport, htons(port));
+    } else {
+	set_16t(&udp_conns[num].lport, 0);
+    }
+    return SUCCESS;
+}
+
+command error_t
+UDPClient.connect[uint8_t num](const ip6_addr_t *addr, const uint16_t port)
+{
+    struct udp_conn *conn = &udp_conns[num];
+    
+    if (addr && port) {
+	memcpy(&conn->ripaddr, addr, sizeof(conn->ripaddr));
+	set_16t(&conn->rport, htons(port));
+    }
+    else {
+	memset(&conn->ripaddr, 0 , sizeof(conn->ripaddr));
+	set_16t(&conn->rport, 0);
+    }
+
+    return SUCCESS;
+}
+
+command error_t
+UDPClient.sendTo[uint8_t num](const ip6_addr_t *addr, uint16_t port,
+			      const uint8_t *buf, uint16_t len)
+{
+    if (udp_conns[num].lport == 0) {
+	set_16t(&udp_conns[num].lport, htons(udp_assign_port()));
+    }
+    return udp_compressed_output(buf, len,
+				 NULL, addr,
+				 udp_conns[num].lport, htons(port), num+1);
+}
+
+command error_t UDPClient.send[uint8_t num]( const uint8_t *buf, uint16_t len )
+{
+    if (udp_conns[num].rport == 0
+	|| ipv6_addr_is_zero(&udp_conns[num].ripaddr))
+	return FAIL;
+    return call UDPClient.sendTo[num](&(udp_conns[num].ripaddr),
+				      udp_conns[num].rport,
+				      buf, len);
+}
+
+default event void
+UDPClient.sendDone[uint8_t num](error_t result, void* buf)
+{
+}
+
+default event void
+UDPClient.receive[uint8_t num](const ip6_addr_t *addr, uint16_t port, 
+			       uint8_t *buf, uint16_t len)
+{
+}
+
+/******************************************
+ *  Printf Timer
+ ******************************************/
+#ifdef ENABLE_PRINTF_DEBUG
+event void PrintfFlush.flushDone(error_t error) {}
+event void PrintfControl.startDone(error_t error) {}
+event void PrintfControl.stopDone(error_t error) {}
+static void dump_serial_packet(const unsigned char *packet, const int len)
+{
+    int i;
+    printf("len: %d\n", len);
+    //call PrintfFlush.flush();
+    if (!packet) {
+	printf("packet is NULL");
+    } else {
+	for (i = 0; i < len; i++)
+	    printf("%02x ", packet[i]);
+    }
+    printf("\n");
+    //call PrintfFlush.flush();
+}
+#endif /* ENABLE_PRINTF_DEBUG */
+#ifndef ENABLE_PRINTF_DEBUG
+static void dump_serial_packet(const unsigned char *packet, const int len)
+{}
+#endif /* ENABLE_PRINTF_DEBUG */
+
+/******************************************
+ *  Interface Timer
+ ******************************************/
+
+event void Timer.fired() {
+    int i=0;
+
+    /* heartbeat led */
+    //call Leds.led0Toggle();
+    
+    /* discard timed-out and not yet assembled fragmented packet */
+    for (i=0;i<FRAG_BUFS; i++) {
+	if (frag_bufs[i].frag_timeout != FRAG_FREE) {
+	    if (frag_bufs[i].frag_timeout > 0) {
+		frag_bufs[i].frag_timeout--;
+	    } else {
+		/* fragment reassembly timed out */
+		frag_bufs[i].frag_timeout = FRAG_FREE;
+		free_frag_list(frag_bufs[i].frag_list);
+		if (frag_bufs[i].buf) {
+		    call AppDataPool.put((app_data_t *) frag_bufs[i].buf);
+		}
+		//call Leds.led0Toggle();
+	    }
+	}
+    }
+    
+    //TODO: check for timed-out ND request and resend/give up and mark as such
+    //TODO: check outgoing pkts queue and schedule ND or sending
+    /*
+      counter++;
+      if (locked) {
+      return;
+      }
+      else {
+      //Packet.clear(&test_packet);
+      uint8_t* data=(uint8_t*) call Packet.getPayload(&test_packet,NULL);
+      if (call Packet.maxPayloadLength() < 1) {
+      return;
+      }
+      
+      data[0] = counter;
+      call AMPacket.setSource(&test_packet, 0x14);
+      if (call AMSend.send(3, &test_packet, 1) == SUCCESS) {
+      //      if (call AMSend.send(AM_BROADCAST_ADDR, &test_packet, sizeof(test_serial_msg_t)) == SUCCESS) {
+      locked = TRUE;
+      }
+      }
+    */
+}
+
+}
diff --git a/tos/lib/net/6lowpan/IP_internal.h b/tos/lib/net/6lowpan/IP_internal.h
new file mode 100644
index 00000000..d2015585
--- /dev/null
+++ b/tos/lib/net/6lowpan/IP_internal.h
@@ -0,0 +1,401 @@
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * The structures are based on the ones from FreeBSD header files
+ * in /usr/include/netinet6/, which are distributed unred the following
+ * copyright:
+ *
+ * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * Copyright (c) 1982, 1986, 1990, 1993
+ *      The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Header file for the 6lowpan/IPv6 stack.
+ */
+
+#ifndef __IP_INTERNAL_H__
+#define __IP_INTERNAL_H__
+
+enum {
+    HW_ADDR_SHORT,
+    HW_ADDR_LONG
+};
+
+typedef struct hw_addr {
+    uint8_t type; // HW_ADDR_SHORT | HW_ADDR_LONG
+    union {
+	uint8_t addr_short[2];
+	uint8_t addr_long[8];
+    };
+} hw_addr_t;
+
+/* number of packets in SendPktPool */
+#define SEND_PKTS 1
+
+/* number of fragment reassembly buffers */
+#define FRAG_BUFS 1
+
+/* timeout for discarding a fragment reassembly buffer
+ * 60 seconds max in 6lowpan draft */
+#define FRAG_TIMEOUT 10
+
+/* number of fragments per reassembled datagram */
+#define FRAGS_PER_DATAGRAM 15
+
+/* fragment reassembmly buffer size */
+#define FRAG_BUF_SIZE 1280
+
+/* default IPv6 Hop Limit for outgoing packets (except Neighbor Discovery) */
+#define IP_HOP_LIMIT 64
+
+#define LOWPAN_MTU 1280
+#define LOWPAN_OVERHEAD 17
+// 16 bytes opt. headers and 1 byte dispatch
+#define LINK_DATA_MTU 100
+// 802.15.4 space left after the 802.15.4 header: 128 - xx = 102 bytes max
+
+
+/* size of app_data buffer */
+#define LOWPAN_APP_DATA_LEN FRAG_BUF_SIZE
+/* maximum length of 6lowpan headers */
+//#define LOWPAN_HEADER_LEN 49
+#define LOWPAN_HEADER_LEN 102
+
+/* flag marking an unused fragment reassembly buffer/structure */
+#define FRAG_FREE 0xFF
+
+/* 6lowpan dispatch values */
+#define DISPATCH_UNCOMPRESSED_IPV6 0x41
+#define DISPATCH_COMPRESSED_IPV6 0x42
+
+#define DISPATCH_FIRST_FRAG 0xC0
+#define DISPATCH_SUBSEQ_FRAG 0xE0
+#define DISPATCH_FRAG_MASK 0xF8
+
+#define DISPATCH_BC0 0x50
+
+#define DISPATCH_MESH 0x80
+#define DISPATCH_MESH_MASK 0xC0
+#define DISPATCH_MESH_O_FLAG 0x20
+#define DISPATCH_MESH_F_FLAG 0x10
+#define DISPATCH_MESH_HOPSLEFT_MASK 0x0F
+
+enum {
+    /* lowpan_pkt_t.app_data_dealloc */
+    APP_DATA_DEALLOC_FALSE=0,
+    APP_DATA_DEALLOC_TRUE=1,
+
+    /* lowpan_pkt_t.notify_num */
+    LOWPAN_PKT_NO_NOTIFY = 0,
+
+    /* HC1 encoding */
+    HC1_SRC_PREFIX_MASK = 0x80,
+    HC1_SRC_PREFIX_LINKLOCAL = 0x80,
+    HC1_SRC_PREFIX_INLINE = 0,
+    HC1_SRC_IFACEID_MASK = 0x40,
+    HC1_SRC_IFACEID_COMRP = 0x40,
+    HC1_SRC_IFACEID_INLINE = 0,
+
+    HC1_DST_PREFIX_MASK = 0x20,
+    HC1_DST_PREFIX_LINKLOCAL = 0x20,
+    HC1_DST_PREFIX_INLINE = 0,
+    HC1_DST_IFACEID_MASK = 0x10,
+    HC1_DST_IFACEID_COMRP = 0x10,
+    HC1_DST_IFACEID_INLINE = 0,
+
+    HC1_TCFL_MASK = 0x08,
+    HC1_TCFL_ZERO = 0x08,
+    HC1_TCFL_INLINE = 0,
+
+    HC1_NEXTHDR_MASK = 0x06,
+    HC1_NEXTHDR_INLINE = 0,
+    HC1_NEXTHDR_UDP = 0x02,
+    HC1_NEXTHDR_ICMP = 0x04,
+    HC1_NEXTHDR_TCP = 0x06,
+
+    HC1_HC2_MASK = 0x01,
+    HC1_HC2_PRESENT = 0x01,
+    HC1_HC2_NONE = 0,
+
+    HC2_UDP_P_VALUE = 0x61616,
+
+    HC2_UDP_SRC_PORT_MASK = 0x80,
+    HC2_UDP_SRC_PORT_COMPR = 0x80,
+    HC2_UDP_SRC_PORT_INLINE = 0,
+
+    HC2_UDP_DST_PORT_MASK = 0x40,
+    HC2_UDP_DST_PORT_COMPR = 0x40,
+    HC2_UDP_DST_PORT_INLINE = 0,
+
+    HC2_UDP_LEN_MASK = 0x20,
+    HC2_UDP_LEN_COMPR = 0x20,
+    HC2_UDP_LEN_INLINE = 0
+};
+
+/* used for fragment reassembly */
+typedef struct _frag_info_t {
+    uint8_t offset;
+    uint8_t len;
+    struct _frag_info_t *next;
+} frag_info_t;
+
+/* used for fragment reassembly */
+typedef struct _app_data_t {
+    uint8_t buf[LOWPAN_MTU];
+} app_data_t;
+
+/* used for fragment reassembly */
+typedef struct _frag_buf_t {
+    uint8_t *buf;          /* usually a pointer to app_data_t */
+    hw_addr_t hw_src_addr;
+    hw_addr_t hw_dst_addr;
+    uint16_t dgram_tag;    /* network byte order */
+    uint16_t dgram_size;   /* host byte order */
+    uint8_t frag_timeout;  /* discarded when zero is reached
+			    * FRAG_FREE means not used at the moment */
+
+    frag_info_t *frag_list; /* sorted by offset in decreasing order */
+} frag_buf_t;
+
+/*
+ * sending - application provides app_data and clears app_data_dealloc
+ *         - a pointer to app_data is returned in sendDone to do deallocation
+ * receiving with fragment reassembly
+ *           - IPP provides app_data and sets app_data_dealloc
+ *           - header_begin is set to point into app_data
+ *             and the received packet is put into app_data
+ * receiving without fragment reassembly
+ *           - the complete 802.15.4 frame is put into header
+ *             (802.15.4 header is left out) and heade_begin points into header
+ */
+typedef struct _lowpan_pkt_t {
+    /* buffers */
+    uint8_t  *app_data;         /* buffer for application data */
+    uint16_t  app_data_len;     /* how much data is in the buffer */
+    uint8_t  *app_data_begin;   /* start of the data in the buffer */
+    uint8_t   app_data_dealloc; /* shall IPC deallocate the app_data buffer?
+                           /* APP_DATA_DEALLOC_FALSE | APP_DATA_DEALLOC_TRUE */
+
+    uint8_t header[LINK_DATA_MTU]; /* buffer for the header (tx)
+                                    * or unfragmented 802.15.4 frame (rx) */
+    uint16_t  header_len;          /* how much data is in the buffer */
+    uint8_t *header_begin;         /* start of the data in the buffer */
+
+    /* fragmentation */
+    uint16_t dgram_tag;     /* network byte order */
+    uint16_t dgram_size;    /* host byte order */
+    uint8_t dgram_offset;   /* offset where next fragment starts (tx)
+                             * (in multiples of 8 bytes) */
+    /* IP addresses */
+    ip6_addr_t ip_src_addr; /* needed for ND and usefull elsewhere */ 
+    ip6_addr_t ip_dst_addr; /* both IP addresses filled in by ipv6*_input */
+    /* 802.15.4 addresses */
+    hw_addr_t hw_src_addr; 
+    hw_addr_t hw_dst_addr;  /* 802.15.4 MAC addresses
+			     * needed for fragment identification
+			     * needed for 6lowpan IPv6 header decompression
+			     * contains mesh header entries if applicable
+			     */
+    /* to notify app with sendDone */
+    uint8_t notify_num;     /* num of UDPClient + 1, 0 means o not notify */
+
+    struct _lowpan_pkt_t *next;
+} lowpan_pkt_t;
+
+enum {
+    FRAG_NONE = 0,
+    FRAG_6LOWPAN = 1,
+    FRAG_IPV6 = 2,
+
+    ND_DONE = 0,
+    ND_TODO = 1,
+    ND_SENT = 2,
+ };
+
+struct lowpan_mesh_hdr {
+    uint8_t dispatch; // dispatch and flags
+    // address length depends on flags in dispatch
+};
+
+struct lowpan_broadcast_hdr {
+    uint8_t dispatch;
+    uint8_t seq_no; // sequence number
+};
+
+struct lowpan_frag_hdr {
+    union {
+	uint8_t dispatch;
+	uint16_t dgram_size;
+	uint8_t dgram_size8[2];
+    };
+    uint16_t dgram_tag;
+};
+
+/*
+ * Definition for internet protocol version 6.
+ * RFC 2460
+ */
+
+struct ip6_hdr {
+    union {
+	uint8_t  vtc;    /* 4 bits version, 8 bits class label*/
+	uint32_t flow;   /* 20 bits flow label at the end */
+    };
+    uint16_t  plen;      /* payload length */
+    uint8_t   nxt_hdr;       /* next header */
+    uint8_t   hlim;      /* hop limit */
+    ip6_addr_t src_addr; /* source address */
+    ip6_addr_t dst_addr; /* destination address */
+} /* __attribute__((packed))*/;
+
+#define IPV6_VERSION            0x60
+#define IPV6_VERSION_MASK       0xf0
+
+/*
+ * Extension Headers
+ */
+
+struct  ip6_ext {
+        uint8_t ip6e_nxt;
+        uint8_t ip6e_len;
+};
+
+
+struct  icmp6_hdr {
+        uint8_t        type;     /* type field */
+        uint8_t        code;     /* code field */
+        uint16_t       cksum;    /* checksum field */
+};
+
+enum {
+    ICMP_TYPE_ECHO_DEST_UNREACH     = 1,
+    ICMP_TYPE_ECHO_PKT_TOO_BIG      = 129,
+    ICMP_TYPE_ECHO_TIME_EXCEEDED    = 129,
+    ICMP_TYPE_ECHO_PARAM_PROBLEM    = 129,
+    ICMP_TYPE_ECHO_REQUEST          = 128,
+    ICMP_TYPE_ECHO_REPLY            = 129,
+    ICMP_TYPE_NEIGHBOR_SOL          = 135,
+    ICMP_TYPE_NEIGHBOR_ADV          = 136,
+    ICMP_NEIGHBOR_HOPLIMIT          = 255
+};
+
+/*
+ * Udp protocol header.
+ * Per RFC 768, September, 1981.
+ */
+struct udp_hdr {
+    uint16_t srcport;               /* source port */
+    uint16_t dstport;               /* destination port */
+    uint16_t len;                   /* udp length */
+    uint16_t chksum;                /* udp checksum */
+};
+
+enum {
+    //NEXT_HEADER_ICMP = 1,
+    NEXT_HEADER_TCP = 6,
+    NEXT_HEADER_UDP = 17,
+    NEXT_HEADER_ICMP6 = 58
+};
+
+
+struct udp_conn {
+    ip6_addr_t ripaddr;   /* IP address of the remote peer. */
+    uint16_t  lport;      /* local port number (network byte order) */
+    uint16_t  rport;      /* remote port number (network byte order) */
+};
+
+
+/* // from uip-1.0/uip/uip-neighbor.c */
+/* #define NEIGHBOR_MAX_TIME 128 */
+
+/* #ifndef NEIGHBOR_ENTRIES */
+/* #define NEIGHBOR_ENTRIES 8 */
+/* #endif */
+
+/* struct neighbor_entry { */
+/*   ip6_addr_t ip_addr; */
+/*   struct hw_addr hw_addr; */
+/*   uint8_t time; */
+/* }; */
+/* struct neighbor_entry neighbor_entries[NEIGHBOR_ENTRIES]; */
+
+#endif /* __IP_INTERNAL_H__ */
diff --git a/tos/lib/net/6lowpan/README b/tos/lib/net/6lowpan/README
new file mode 100644
index 00000000..e260a948
--- /dev/null
+++ b/tos/lib/net/6lowpan/README
@@ -0,0 +1,87 @@
+	       A 6lowpan implementation for TinyOS 2.x
+
+This is a 6lowpan implementation for TinyOS 2.x. Mesh Addressing and
+Broadcast headers are parsed, but no mesh-networking/multi-hopping is
+implemented. 6lowpan fragmentation and fragment reassembly is fully
+supported. The 6lowpan-specified HC1 compression of the IPv6 header
+and the HC_UDP compression of the UDP header are supported as well as
+handling of the uncompressed headers. The implementation can respond
+to ICMP echo requests and handles communication over the UDP
+protocol. It has been tested on the TelosB and MicaZ hardware
+platforms. In addition a 6lowpan-translating daemon has been
+implemented to allow a linux PC to use a mote as an 802.15.4
+interface.
+
+Shortcomings and missing features:
+ * 6lowpan payload is sent as Active Message payload. This means that
+   the 802.15.4 payload is prefixed with the 1-byte AM Type field.
+ * non-zero Traffic Class and Flow Label are not supported by the
+   current HC1 implementation
+ * UDP port numbers compression is not supported and port numbers are
+   always sent in full by the current HC_UDP compression
+ * Neighbor Discovery has not been implemented and link local
+   broadcasts are used instead.
+ * Not all fragments of a datagram seem to be always received by the
+   mote. A workaround is to add a usleep(10000) before sending subsequent
+   fragments in the serial_tun daemon on the PC.
+ * The mspgcc compiler generates broken code using 16-bit values not
+   aligned at 16-bit boundaries. See
+   http://www.nabble.com/msp430-gcc-generating-unaligned-access.-t2261862.html
+   and page 25 in
+   http://www.eecs.harvard.edu/~konrad/projects/motetrack/
+   mspgcc-manual-20031127.pdf
+   for details. This seems to only happen with packed structs, where
+   some elements cannot be aligned. For example, a struct with an
+   8-bit, 16-bit, 8-bit and 16-bit value in the given order. As the
+   struct is packed, one of the 16-bit values can be aligned at a
+   16-bit boundary.
+   The current workaround is to force 8-bit operations for cases where
+   this can happen. This is done by the set_16t(), get_16t()
+   functions. In cases where unaligned accesses could happen, these
+   functions have to be used.
+
+More details can be found in
+	http://www.inf.ethz.ch/personal/mharvan/docs/msc-thesis.pdf
+or by reading the source code.
+
+
+USAGE - MOTE
+The 6lowpan/IPv6 stack is implemented in the IPP module. Applications
+should use the IPC component which takes care of wiring the necessary
+components. The stack offers the UDPClient interface to application
+wishing to exchange UDP datagrams. Replying to ICMP echo requests is
+done by the 6lowpan stack.
+
+The stack support two IPv6 addresses:
+ * a global address
+ * a link-local address
+
+The link-local address is assigned using an interface identifier
+computed from the Active Message address of the mote. This is almost
+like the stateless autoconfiguration, but Duplicate Address Detection
+or Router Solicitations are not implemented.
+
+The global address can be set manually with
+IPC.setAddress(). Alternatively, only the prefix of the global address
+can be set with IPC.setAddressAutoconf() and the suffix will be
+generated from the Active Message address of the mote.
+
+A sample application using the 6lowpan stack is in apps/6lowpancli.
+
+USAGE - PC
+To interact with a 6lowpan mote from a PC, a mote flashed with the
+BaseStation application (apps/BaseStation) has to be attached to the
+PC. Note that the application has to be built with
+	CFLAGS += -D'TOSH_DATA_LENGTH=102'.
+
+Furthermore, the serial_tun daemon (support/sdk/c/6lowpan/serial_tun/)
+has to run on the PC.
+
+Afterwards, ping6 and nc6 should work for talking to the motes.
+
+Debugging output with printf over USB can be enabled with
+	CFLAGS="-D'ENABLE_PRINTF_DEBUG=1'
+
+To minimize memory usage, i.e. disable everything (at the moment only
+the UDP cli) to determine minimum RAM/ROM requirements, use
+	CFLAGS="-D'MINIMIZE_MEMORY=1'
\ No newline at end of file
diff --git a/tos/lib/net/6lowpan/UDPClient.nc b/tos/lib/net/6lowpan/UDPClient.nc
new file mode 100644
index 00000000..d2b727fc
--- /dev/null
+++ b/tos/lib/net/6lowpan/UDPClient.nc
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2007 Matus Harvan
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * The name of the author may not be used to endorse or promote
+ *       products derived from this software without specific prior
+ *       written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * This file is based on Andrew Christian's UDPClient interface from
+ * the uIP port to TinyOS 1.x, which is distributed under the
+ * following licence:
+ *
+ * Copyright (c) 2005 Hewlett-Packard Company
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of the Hewlett-Packard Company nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Parameterized interface for creating a UDP client or server
+ */
+
+#include "IP.h"
+
+interface UDPClient {
+  /**
+   * 'Listening' to a socket binds the local port to a fixed number and allows
+   * the socket to receive packets.  If you call send or sendto on an unbound
+   * socket, a dynamic local port is assigned.  Pass 0 to unbind the port.
+   */
+
+    command error_t listen( uint16_t port );   // Start listening to a port
+
+  /**
+   * 'Connecting' a UDP socket fixes the remote address and port.  Once fixed,
+   * you can send datagrams with the 'send' command.  You can un-fix the socket
+   * by passing NULL as the argument.
+   */
+
+    command error_t connect(const ip6_addr_t *addr, const uint16_t port);
+
+  /**
+   *  Send a datagram to a remote host.  Call 'connect' on a socket before
+   *  calling 'send'.  If a local port has not yet been assigned, a dynamic
+   *  one will be assigned by these commands.  Both commands are asynchronous
+   *  and will generate the 'sendDone' event once the datagram has been sent.
+   */  
+
+  command  error_t sendTo(const ip6_addr_t *addr, uint16_t port,
+			  const uint8_t *buf, uint16_t len );
+  command  error_t send(const uint8_t *buf, uint16_t len );
+
+  /**
+   *  The previous send or sendTo command has completed.
+   */
+
+  event    void     sendDone(error_t result, void* buf);
+
+  /**
+   *  A datagram has been received.  Datagrams are only received on sockets
+   *  that have had 'listen' called to assign a local port, or have used
+   *  the 'send' or 'sendTo' command.
+   */
+
+  event    void     receive(const ip6_addr_t *addr, uint16_t port,
+			    uint8_t *buf, uint16_t len );
+}
diff --git a/tos/lib/net/CollectionDebug.nc b/tos/lib/net/CollectionDebug.nc
new file mode 100644
index 00000000..6b78c49f
--- /dev/null
+++ b/tos/lib/net/CollectionDebug.nc
@@ -0,0 +1,80 @@
+/* $Id: CollectionDebug.nc,v 1.5 2010-06-29 22:07:47 scipio Exp $*/
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** 
+ *  The CollectionDebug is an interface for sending debugging events to
+ *  a logging infrastructure. An implementer can choose to send the event
+ *  information to different destinations. Primary examples can include:
+ *  <ul>
+ *    <li> logging to the UART, in case of a testbed of network-connected
+ *         nodes;
+ *    <li> logging to flash, if the logs are to be retrieved later
+ *    <li> logging to the standard output, in the case of TOSSIM.
+ *  </ul>
+ *  
+ *  The interface does not specify in what format the log is to be produced,
+ *  or if other information, like timestamps, should be added, and this is
+ *  up to the implementer.
+ * 
+ *  Some commands are generic, like Event, EventSimple, and EventDbg, while others
+ *  are for more specific events related to collection, like EventRoute and EventMsg.
+ *
+ 
+ * @author Rodrigo Fonseca
+ * @author Kyle Jamieson
+ * @date   $Date: 2010-06-29 22:07:47 $
+ */
+
+interface CollectionDebug {
+    /* Log the occurrence of an event of type type */
+    command error_t logEvent(uint8_t type);
+
+    /* Log the occurrence of an event and a single parameter */
+    command error_t logEventSimple(uint8_t type, uint16_t arg);
+
+    /* Log the occurrence of an event and 3 16bit parameters */
+    command error_t logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3);
+
+    /* Log the occurrence of an event related to forwarding a message.
+     * This is intended to allow following the same message as it goes from one
+     * hop to the next 
+     */
+    command error_t logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node);
+
+    /* Log the occurrence of an event related to a route update message, 
+     * such as a node receiving a route, updating its own route information,
+     * or looking at a particular entry in its routing table.
+     */
+    command error_t logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric);
+}
diff --git a/tos/lib/net/CollectionDebugMsg.h b/tos/lib/net/CollectionDebugMsg.h
new file mode 100644
index 00000000..e666979f
--- /dev/null
+++ b/tos/lib/net/CollectionDebugMsg.h
@@ -0,0 +1,74 @@
+#ifndef _COLLECTION_UART_MSG
+#define _COLLECTION_UART_MSG
+
+#include "AM.h"
+
+//Comment format ->   :meaning:args
+enum {
+    NET_C_DEBUG_STARTED = 0xDE,
+
+    NET_C_FE_MSG_POOL_EMPTY = 0x10,    //::no args
+    NET_C_FE_SEND_QUEUE_FULL = 0x11,   //::no args
+    NET_C_FE_NO_ROUTE = 0x12,          //::no args
+    NET_C_FE_SUBSEND_OFF = 0x13,
+    NET_C_FE_SUBSEND_BUSY = 0x14,
+    NET_C_FE_BAD_SENDDONE = 0x15,
+    NET_C_FE_QENTRY_POOL_EMPTY = 0x16,
+    NET_C_FE_SUBSEND_SIZE = 0x17,
+    NET_C_FE_LOOP_DETECTED = 0x18,
+    NET_C_FE_SEND_BUSY = 0x19,
+
+    NET_C_FE_SENDQUEUE_EMPTY = 0x50,
+    NET_C_FE_PUT_MSGPOOL_ERR = 0x51,
+    NET_C_FE_PUT_QEPOOL_ERR = 0x52,
+    NET_C_FE_GET_MSGPOOL_ERR = 0x53,
+    NET_C_FE_GET_QEPOOL_ERR = 0x54,
+
+    NET_C_FE_SENT_MSG = 0x20,  //:app. send       :msg uid, origin, next_hop
+    NET_C_FE_RCV_MSG =  0x21,  //:next hop receive:msg uid, origin, last_hop
+    NET_C_FE_FWD_MSG =  0x22,  //:fwd msg         :msg uid, origin, next_hop
+    NET_C_FE_DST_MSG =  0x23,  //:base app. recv  :msg_uid, origin, last_hop
+    NET_C_FE_SENDDONE_FAIL = 0x24,
+    NET_C_FE_SENDDONE_WAITACK = 0x25,
+    NET_C_FE_SENDDONE_FAIL_ACK_SEND = 0x26,
+    NET_C_FE_SENDDONE_FAIL_ACK_FWD  = 0x27,
+    NET_C_FE_DUPLICATE_CACHE = 0x28,  //dropped duplicate packet seen in cache
+    NET_C_FE_DUPLICATE_QUEUE = 0x29,  //dropped duplicate packet seen in queue
+    NET_C_FE_DUPLICATE_CACHE_AT_SEND = 0x2A,  //dropped duplicate packet seen in cache
+
+
+    NET_C_TREE_NO_ROUTE   = 0x30,   //:        :no args
+    NET_C_TREE_NEW_PARENT = 0x31,   //:        :parent_id, hopcount, metric
+    NET_C_TREE_ROUTE_INFO = 0x32,   //:periodic:parent_id, hopcount, metric
+    NET_C_TREE_SENT_BEACON = 0x33,
+    NET_C_TREE_RCV_BEACON = 0x34,
+
+    NET_C_DBG_1 = 0x40,             //:any     :uint16_t a
+    NET_C_DBG_2 = 0x41,             //:any     :uint16_t a, b, c
+    NET_C_DBG_3 = 0x42,             //:any     :uint16_t a, b, c
+};
+
+typedef nx_struct CollectionDebugMsg {
+    nx_uint8_t type;
+    nx_union {
+        nx_uint16_t arg;
+        nx_struct {
+            nx_uint16_t msg_uid;   
+            nx_am_addr_t origin;
+            nx_am_addr_t other_node;
+        } msg;
+        nx_struct {
+            nx_am_addr_t parent;
+            nx_uint8_t hopcount;
+            nx_uint16_t metric;
+        } route_info;
+        nx_struct {
+            nx_uint16_t a;
+            nx_uint16_t b;
+            nx_uint16_t c;
+        } dbg;
+    } data;
+    nx_uint16_t seqno;
+} CollectionDebugMsg;
+
+#endif
diff --git a/tos/lib/net/CollectionId.nc b/tos/lib/net/CollectionId.nc
new file mode 100644
index 00000000..912182e1
--- /dev/null
+++ b/tos/lib/net/CollectionId.nc
@@ -0,0 +1,47 @@
+/* $Id: CollectionId.nc,v 1.4 2006-12-12 18:23:28 vlahan Exp $ */
+/*
+ * Copyright (c) 2006 Massachusetts Institute of Technology (MIT).
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Massachusetts Institute of Technology nor
+ *   the names of its contributors may be used to endorse or promote
+ *   products derived from this software without specific prior written
+ *   permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * MASSACHUSETTS INSITIUTE OF TECHNOLOGY OR ITS CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ *  Interface for fetching the collection ID associated with a
+ *  collection sender instance.
+ *
+ *  @author Kyle Jamieson
+ *  @date   $Date: 2006-12-12 18:23:28 $
+ */
+
+#include "Collection.h"
+
+interface CollectionId {
+  command collection_id_t fetch();
+}
diff --git a/tos/lib/net/CollectionIdP.nc b/tos/lib/net/CollectionIdP.nc
new file mode 100644
index 00000000..f338ad4b
--- /dev/null
+++ b/tos/lib/net/CollectionIdP.nc
@@ -0,0 +1,53 @@
+/* $Id: CollectionIdP.nc,v 1.4 2006-12-12 18:23:28 vlahan Exp $ */
+/*
+ * Copyright (c) 2006 Massachusetts Institute of Technology (MIT).
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Massachusetts Institute of Technology nor
+ *   the names of its contributors may be used to endorse or promote
+ *   products derived from this software without specific prior written
+ *   permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * MASSACHUSETTS INSITIUTE OF TECHNOLOGY OR ITS CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ *  Interface for fetching the collection ID associated with a
+ *  collection sender instance.
+ *
+ *  @author Kyle Jamieson
+ *  @date   $Date: 2006-12-12 18:23:28 $
+ */
+
+#include "Collection.h"
+
+generic module CollectionIdP(collection_id_t collectid) {
+  provides interface CollectionId;
+}
+
+implementation {
+  command collection_id_t CollectionId.fetch() {
+    return collectid;
+  }
+}
diff --git a/tos/lib/net/CollectionPacket.nc b/tos/lib/net/CollectionPacket.nc
new file mode 100644
index 00000000..fbf78163
--- /dev/null
+++ b/tos/lib/net/CollectionPacket.nc
@@ -0,0 +1,52 @@
+/* $Id: CollectionPacket.nc,v 1.4 2006-12-12 18:23:28 vlahan Exp $ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @date   $Date: 2006-12-12 18:23:28 $
+ */
+
+#include <AM.h>
+#include <Collection.h>
+
+interface CollectionPacket {
+  command am_addr_t getOrigin(message_t* msg);
+  command void setOrigin(message_t* msg, am_addr_t addr);
+  
+  command collection_id_t getType(message_t* msg);
+  command void setType(message_t* msg, collection_id_t id);
+  
+  command uint8_t getSequenceNumber(message_t* msg);
+  command void setSequenceNumber(message_t* msg, uint8_t seqno);
+}
+
diff --git a/tos/lib/net/Deluge/AutoStarterC.nc b/tos/lib/net/Deluge/AutoStarterC.nc
new file mode 100644
index 00000000..1521613a
--- /dev/null
+++ b/tos/lib/net/Deluge/AutoStarterC.nc
@@ -0,0 +1,48 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+configuration AutoStarterC
+{
+  uses interface SplitControl;
+}
+
+implementation
+{
+  components MainC, AutoStarterP;
+  
+  SplitControl = AutoStarterP;
+  AutoStarterP.Boot -> MainC;
+}
diff --git a/tos/lib/net/Deluge/AutoStarterP.nc b/tos/lib/net/Deluge/AutoStarterP.nc
new file mode 100644
index 00000000..2a59f3f0
--- /dev/null
+++ b/tos/lib/net/Deluge/AutoStarterP.nc
@@ -0,0 +1,55 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+module AutoStarterP
+{
+  uses {
+    interface Boot;
+    interface SplitControl;
+  }
+}
+
+implementation
+{
+  event void Boot.booted()
+  {
+    call SplitControl.start();
+  }
+  
+  event void SplitControl.startDone(error_t error) { }
+  event void SplitControl.stopDone(error_t error) { }
+
+}
diff --git a/tos/lib/net/Deluge/BitVecUtils.h b/tos/lib/net/Deluge/BitVecUtils.h
new file mode 100644
index 00000000..86c112cc
--- /dev/null
+++ b/tos/lib/net/Deluge/BitVecUtils.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Provides generic methods for manipulating bit vectors.
+ *
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __BITVEC_UTILS_H__
+#define __BITVEC_UTILS_H__
+
+#define BIT_GET(x, i) ((x) & (1 << (i)))
+#define BIT_SET(x, i) ((x) | (1 << (i)))
+#define BIT_CLEAR(x, i) ((x) & ~(1 << (i)))
+
+#define BITVEC_GET(x, i) (BIT_GET((x)[(i)/8], (i)%8))
+#define BITVEC_SET(x, i) ((x)[(i)/8] = BIT_SET((x)[(i)/8], (i)%8))
+#define BITVEC_CLEAR(x, i) ((x)[(i)/8] = BIT_CLEAR((x)[(i)/8], (i)%8))
+
+#endif
diff --git a/tos/lib/net/Deluge/BitVecUtils.nc b/tos/lib/net/Deluge/BitVecUtils.nc
new file mode 100644
index 00000000..45c01d20
--- /dev/null
+++ b/tos/lib/net/Deluge/BitVecUtils.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Provides generic methods for manipulating bit vectors.
+ *
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+interface BitVecUtils {
+  /**
+   * Locates the index of the first '1' bit in a bit vector.
+   *
+   * @param result     the location of the '1' bit
+   * @param fromIndex  the index to start search for '1' bit
+   * @param bitVec     the bit vector
+   * @param length     the length of the bit vector in bits
+   * @return           <code>SUCCESS</code> if a '1' bit was found;
+   *                   <code>FAIL</code> otherwise.
+   */
+  command error_t indexOf(uint16_t* pResult, uint16_t fromIndex, 
+			   uint8_t* bitVec, uint16_t length);
+
+  /**
+   * Counts the number of '1' bits in a bit vector.
+   *
+   * @param result  the number of '1' bits
+   * @param bitVec  the bit vector
+   * @param length  the length of the bit vector in bits
+   * @return        <code>SUCCESS</code> if the operation completed successfully;
+   *                <code>FAIL</code> otherwise.
+   */
+  command error_t countOnes(uint16_t* pResult, uint8_t* bitVec, 
+			     uint16_t length);
+
+  /**
+   * Generates an ASCII representation of the bit vector.
+   *
+   * @param buf     the character array to place the ASCII string
+   * @param bitVec  the bit vector
+   * @param length  the length of the bit vector in bits
+   */
+  command void printBitVec(char* buf, uint8_t* bitVec, uint16_t length);
+}
diff --git a/tos/lib/net/Deluge/BitVecUtilsC.nc b/tos/lib/net/Deluge/BitVecUtilsC.nc
new file mode 100644
index 00000000..63d25aca
--- /dev/null
+++ b/tos/lib/net/Deluge/BitVecUtilsC.nc
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Provides generic methods for manipulating bit vectors.
+ *
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#include "BitVecUtils.h"
+
+module BitVecUtilsC {
+  provides interface BitVecUtils;
+}
+
+implementation {
+  command error_t BitVecUtils.indexOf(uint16_t* pResult, uint16_t fromIndex, 
+				                               uint8_t* bitVec, uint16_t length) {
+    uint16_t i = fromIndex;
+
+    if (length == 0)
+      return FAIL;
+    
+    do {
+      if (BITVEC_GET(bitVec, i)) {
+        *pResult = i;
+        return SUCCESS;
+      }
+      i = (i+1) % length;
+    } while (i != fromIndex);
+    
+    return FAIL;
+  }
+
+  command error_t BitVecUtils.countOnes(uint16_t* pResult, uint8_t* bitVec, uint16_t length) {
+
+    int count = 0;
+    int i;
+
+    for ( i = 0; i < length; i++ ) {
+      if (BITVEC_GET(bitVec, i))
+	count++;
+    }
+
+    *pResult = count;
+
+    return SUCCESS;
+
+  }
+
+  command void BitVecUtils.printBitVec(char* buf, uint8_t* bitVec, uint16_t length) {
+#ifdef PLATFORM_PC
+    uint16_t i;
+    
+    dbg(DBG_TEMP, "");
+    for ( i = 0; i < length; i++ ) {
+      sprintf(buf++, "%d", !!BITVEC_GET(bitVec, i));
+    }
+#endif	  
+  }
+
+}
diff --git a/tos/lib/net/Deluge/BlockStorageManager/BlockReaderC.nc b/tos/lib/net/Deluge/BlockStorageManager/BlockReaderC.nc
new file mode 100644
index 00000000..00e288e3
--- /dev/null
+++ b/tos/lib/net/Deluge/BlockStorageManager/BlockReaderC.nc
@@ -0,0 +1,61 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "BlockStorageManager.h"
+#include "Storage.h"
+
+generic configuration BlockReaderC(volume_id_t id)
+{
+  provides {
+    interface BlockRead;
+    interface Resource;
+  }
+}
+
+implementation
+{
+  enum {
+    CLIENT_ID = unique(UQ_BSTORAGEM_CLIENT)
+  };
+
+  components new VolumeIdC(id);
+  components BlockStorageManagerC;
+  components new BlockStorageLockClientC();
+
+  BlockRead = BlockStorageManagerC.BlockRead[CLIENT_ID];
+  Resource = BlockStorageLockClientC;
+  BlockStorageManagerC.VolumeId[CLIENT_ID] -> VolumeIdC;
+}
diff --git a/tos/lib/net/Deluge/BlockStorageManager/BlockStorageLockC.nc b/tos/lib/net/Deluge/BlockStorageManager/BlockStorageLockC.nc
new file mode 100644
index 00000000..e7d2423f
--- /dev/null
+++ b/tos/lib/net/Deluge/BlockStorageManager/BlockStorageLockC.nc
@@ -0,0 +1,50 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration BlockStorageLockC
+{
+  provides {
+    interface Resource[uint8_t client];
+    interface ArbiterInfo;
+  }
+}
+
+implementation
+{
+  components new SimpleFcfsArbiterC(UQ_BSTORAGEL_CLIENT) as Arbiter;
+  Resource = Arbiter;
+  ArbiterInfo = Arbiter;
+}
diff --git a/tos/lib/net/Deluge/BlockStorageManager/BlockStorageLockClientC.nc b/tos/lib/net/Deluge/BlockStorageManager/BlockStorageLockClientC.nc
new file mode 100644
index 00000000..d5be0b05
--- /dev/null
+++ b/tos/lib/net/Deluge/BlockStorageManager/BlockStorageLockClientC.nc
@@ -0,0 +1,50 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+generic configuration BlockStorageLockClientC()
+{
+  provides interface Resource;
+}
+
+implementation
+{
+  enum {
+    CLIENT_ID = unique(UQ_BSTORAGEL_CLIENT)
+  };
+
+  components BlockStorageLockC;
+  Resource = BlockStorageLockC.Resource[CLIENT_ID];
+}
diff --git a/tos/lib/net/Deluge/BlockStorageManager/BlockStorageManager.h b/tos/lib/net/Deluge/BlockStorageManager/BlockStorageManager.h
new file mode 100644
index 00000000..32e144b4
--- /dev/null
+++ b/tos/lib/net/Deluge/BlockStorageManager/BlockStorageManager.h
@@ -0,0 +1,43 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#ifndef BLOCK_STORAGE_MANAGER_H
+#define BLOCK_STORAGE_MANAGER_H
+
+#define UQ_BSTORAGEM_CLIENT "BlockStorageManager.client"
+#define UQ_BSTORAGEL_CLIENT "BlockStorageLock.client"
+
+#endif
diff --git a/tos/lib/net/Deluge/BlockStorageManager/BlockStorageManagerC.nc b/tos/lib/net/Deluge/BlockStorageManager/BlockStorageManagerC.nc
new file mode 100644
index 00000000..476c4674
--- /dev/null
+++ b/tos/lib/net/Deluge/BlockStorageManager/BlockStorageManagerC.nc
@@ -0,0 +1,86 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "BlockStorageManager.h"
+
+configuration BlockStorageManagerC
+{
+  provides {
+    interface BlockRead[uint8_t client];
+    interface BlockWrite[uint8_t client];
+    interface StorageMap[uint8_t volume_id];
+  }
+  uses interface VolumeId[uint8_t client];
+}
+
+implementation
+{
+  enum {
+    NUM_CLIENTS = uniqueCount(UQ_BSTORAGEM_CLIENT)
+  };
+
+  components new BlockStorageManagerP(NUM_CLIENTS);
+
+  BlockRead  = BlockStorageManagerP;
+  BlockWrite = BlockStorageManagerP;
+  VolumeId   = BlockStorageManagerP;
+  StorageMap = BlockStorageManagerP;
+
+  components new BlockStorageC(VOLUME_GOLDENIMAGE) as BlockStorageC_Golden;
+  components new BlockStorageC(VOLUME_DELUGE1)     as BlockStorageC_1;
+  components new BlockStorageC(VOLUME_DELUGE2)     as BlockStorageC_2;
+  components new BlockStorageC(VOLUME_DELUGE3)     as BlockStorageC_3;
+
+  BlockStorageManagerP.SubBlockRead[VOLUME_GOLDENIMAGE] -> BlockStorageC_Golden;
+  BlockStorageManagerP.SubBlockRead[VOLUME_DELUGE1]     -> BlockStorageC_1;
+  BlockStorageManagerP.SubBlockRead[VOLUME_DELUGE2]     -> BlockStorageC_2;
+  BlockStorageManagerP.SubBlockRead[VOLUME_DELUGE3]     -> BlockStorageC_3;
+
+  BlockStorageManagerP.SubBlockWrite[VOLUME_GOLDENIMAGE] -> BlockStorageC_Golden;
+  BlockStorageManagerP.SubBlockWrite[VOLUME_DELUGE1]     -> BlockStorageC_1;
+  BlockStorageManagerP.SubBlockWrite[VOLUME_DELUGE2]     -> BlockStorageC_2;
+  BlockStorageManagerP.SubBlockWrite[VOLUME_DELUGE3]     -> BlockStorageC_3;
+
+#if defined(PLATFORM_TELOSB)
+  BlockStorageManagerP.SubStorageMap[VOLUME_GOLDENIMAGE] -> BlockStorageC_Golden;
+  BlockStorageManagerP.SubStorageMap[VOLUME_DELUGE1]     -> BlockStorageC_1;
+  BlockStorageManagerP.SubStorageMap[VOLUME_DELUGE2]     -> BlockStorageC_2;
+  BlockStorageManagerP.SubStorageMap[VOLUME_DELUGE3]     -> BlockStorageC_3;
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS) || defined(PLATFORM_EPIC) || defined(PLATFORM_MULLE) || defined(PLATFORM_TINYNODE)
+  components At45dbStorageManagerC;
+  BlockStorageManagerP.At45dbVolume -> At45dbStorageManagerC;
+#endif
+}
diff --git a/tos/lib/net/Deluge/BlockStorageManager/BlockStorageManagerP.nc b/tos/lib/net/Deluge/BlockStorageManager/BlockStorageManagerP.nc
new file mode 100644
index 00000000..aceb493b
--- /dev/null
+++ b/tos/lib/net/Deluge/BlockStorageManager/BlockStorageManagerP.nc
@@ -0,0 +1,222 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+generic module BlockStorageManagerP(uint8_t clients)
+{
+  provides {
+    interface BlockRead[uint8_t client];
+    interface BlockWrite[uint8_t client];
+    interface StorageMap[uint8_t volume_id];
+  }
+  uses {
+    interface BlockRead as SubBlockRead[volume_id_t volume_id];
+    interface BlockWrite as SubBlockWrite[volume_id_t volume_id];
+    interface VolumeId[uint8_t client];
+#if defined(PLATFORM_TELOSB)
+    interface StorageMap as SubStorageMap[volume_id_t volume_id];
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS) || defined(PLATFORM_EPIC) || defined(PLATFORM_MULLE) || defined(PLATFORM_TINYNODE)
+    interface At45dbVolume[volume_id_t volume_id];
+#endif
+  }
+}
+
+implementation
+{
+  enum {
+    S_READY,
+    S_BUSY
+  };
+
+  uint8_t state = S_READY;
+  uint8_t current_client;
+
+  /* BlockRead **************************/
+  command error_t BlockRead.read[uint8_t client](storage_addr_t addr, void* buf, storage_len_t len)
+  {
+    error_t error;
+    if (state != S_READY) {
+      return EBUSY;
+    }
+    error = call SubBlockRead.read[call VolumeId.get[client]()](addr, buf, len);
+    if (error == SUCCESS)
+    {
+      state = S_BUSY;
+      current_client = client;
+      return SUCCESS;
+    }
+    return error;
+  }
+
+  command error_t BlockRead.computeCrc[uint8_t client](storage_addr_t addr, storage_len_t len, uint16_t crc)
+  {
+    error_t error;
+    if (state != S_READY) {
+      return EBUSY;
+    }
+    error = call SubBlockRead.computeCrc[call VolumeId.get[client]()](addr, len, crc);
+    if (error == SUCCESS)
+    {
+      state = S_BUSY;
+      current_client = client;
+      return SUCCESS;
+    }
+    return error;
+  }
+
+  command storage_len_t BlockRead.getSize[uint8_t client]()
+  {
+    return call SubBlockRead.getSize[client]();
+  }
+
+  event void SubBlockRead.readDone[volume_id_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error)
+  {
+    state = S_READY;
+    signal BlockRead.readDone[current_client](addr, buf, len, error);
+  }
+
+  event void SubBlockRead.computeCrcDone[volume_id_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error)
+  {
+    state = S_READY;
+    signal BlockRead.computeCrcDone[current_client](addr, len, crc, error);
+  }
+
+  default command error_t SubBlockRead.read[uint8_t client](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t SubBlockRead.computeCrc[uint8_t client](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; }
+  default event void BlockRead.readDone[volume_id_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void BlockRead.computeCrcDone[volume_id_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {}
+
+
+  /* BlockWrite **************************/
+  command error_t BlockWrite.write[uint8_t client](storage_addr_t addr, void* buf, storage_len_t len)
+  {
+    error_t error;
+    if (state != S_READY) {
+      return EBUSY;
+    }
+    error = call SubBlockWrite.write[call VolumeId.get[client]()](addr, buf, len);
+    if (error == SUCCESS)
+    {
+      state = S_BUSY;
+      current_client = client;
+      return SUCCESS;
+    }
+    return error;
+  }
+
+  command error_t BlockWrite.erase[uint8_t client]()
+  {
+    error_t error;
+    if (state != S_READY) {
+      return EBUSY;
+    }
+    error = call SubBlockWrite.erase[call VolumeId.get[client]()]();
+    if (error == SUCCESS)
+    {
+      state = S_BUSY;
+      current_client = client;
+      return SUCCESS;
+    }
+    return error;
+  }
+
+  command error_t BlockWrite.sync[uint8_t client]()
+  {
+    error_t error;
+    if (state != S_READY) {
+      return EBUSY;
+    }
+    error = call SubBlockWrite.sync[call VolumeId.get[client]()]();
+    if (error == SUCCESS)
+    {
+      state = S_BUSY;
+      return SUCCESS;
+    }
+    return error;
+  }
+
+  event void SubBlockWrite.writeDone[volume_id_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error)
+  {
+    state = S_READY;
+    signal BlockWrite.writeDone[current_client](addr, buf, len, error);
+  }
+
+  event void SubBlockWrite.eraseDone[volume_id_t volume_id](error_t error)
+  {
+    state = S_READY;
+    signal BlockWrite.eraseDone[current_client](error);
+  }
+
+  event void SubBlockWrite.syncDone[volume_id_t volume_id](error_t error)
+  {
+    state = S_READY;
+    signal BlockWrite.syncDone[current_client](error);
+  }
+
+  command storage_addr_t StorageMap.getPhysicalAddress[uint8_t volume_id](storage_addr_t addr)
+  {
+    storage_addr_t p_addr = 0xFFFFFFFF;
+#if defined(PLATFORM_TELOSB)
+    p_addr = call SubStorageMap.getPhysicalAddress[volume_id](addr);
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS) || defined(PLATFORM_EPIC) || defined(PLATFORM_MULLE) || defined(PLATFORM_TINYNODE)
+    at45page_t page = call At45dbVolume.remap[volume_id]((addr >> AT45_PAGE_SIZE_LOG2));
+    at45pageoffset_t offset = addr & ((1 << AT45_PAGE_SIZE_LOG2) - 1);
+    p_addr = page;
+    p_addr = p_addr << AT45_PAGE_SIZE_LOG2;
+    p_addr += offset;
+#endif
+    return p_addr;
+  }
+
+#if defined(PLATFORM_TELOSB)
+  default command storage_addr_t SubStorageMap.getPhysicalAddress[uint8_t volume_id](storage_addr_t addr)
+  {
+    return 0xffffffff;
+  }
+#endif
+
+  default command error_t SubBlockWrite.write[uint8_t client](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t SubBlockWrite.erase[uint8_t client]() { return FAIL; }
+  default command error_t SubBlockWrite.sync[uint8_t client]() { return FAIL; }
+  default event void BlockWrite.writeDone[volume_id_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void BlockWrite.eraseDone[volume_id_t volume_id](error_t error) {}
+  default event void BlockWrite.syncDone[volume_id_t volume_id](error_t error) {}
+
+
+  default command volume_id_t VolumeId.get[uint8_t client]()
+  {
+    return 0xFF; // This is an invalid volume at least for STM25P.
+  }
+}
diff --git a/tos/lib/net/Deluge/BlockStorageManager/BlockWriterC.nc b/tos/lib/net/Deluge/BlockStorageManager/BlockWriterC.nc
new file mode 100644
index 00000000..db736327
--- /dev/null
+++ b/tos/lib/net/Deluge/BlockStorageManager/BlockWriterC.nc
@@ -0,0 +1,61 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "BlockStorageManager.h"
+#include "Storage.h"
+
+generic configuration BlockWriterC(volume_id_t id)
+{
+  provides {
+    interface BlockWrite;
+    interface Resource;
+  }
+}
+
+implementation
+{
+  enum {
+    CLIENT_ID = unique(UQ_BSTORAGEM_CLIENT)
+  };
+
+  components new VolumeIdC(id);
+  components BlockStorageManagerC;
+  components new BlockStorageLockClientC();
+
+  BlockWrite = BlockStorageManagerC.BlockWrite[CLIENT_ID];
+  Resource = BlockStorageLockClientC;
+  BlockStorageManagerC.VolumeId[CLIENT_ID] -> VolumeIdC;
+}
diff --git a/tos/lib/net/Deluge/BlockStorageManager/VolumeId.nc b/tos/lib/net/Deluge/BlockStorageManager/VolumeId.nc
new file mode 100644
index 00000000..7df220c3
--- /dev/null
+++ b/tos/lib/net/Deluge/BlockStorageManager/VolumeId.nc
@@ -0,0 +1,40 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+interface VolumeId
+{
+  command volume_id_t get();
+}
diff --git a/tos/lib/net/Deluge/BlockStorageManager/VolumeIdC.nc b/tos/lib/net/Deluge/BlockStorageManager/VolumeIdC.nc
new file mode 100644
index 00000000..9d9ed002
--- /dev/null
+++ b/tos/lib/net/Deluge/BlockStorageManager/VolumeIdC.nc
@@ -0,0 +1,48 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+generic module VolumeIdC(volume_id_t id)
+{
+  provides interface VolumeId;
+}
+
+implementation
+{
+  command volume_id_t VolumeId.get()
+  {
+    return id;
+  }
+}
diff --git a/tos/lib/net/Deluge/Deluge.h b/tos/lib/net/Deluge/Deluge.h
new file mode 100644
index 00000000..767b0ff2
--- /dev/null
+++ b/tos/lib/net/Deluge/Deluge.h
@@ -0,0 +1,88 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#ifndef __DELUGE_H__
+#define __DELUGE_H__
+
+typedef nx_struct DelugeIdent {
+  nx_uint32_t  uidhash;        // unique id of the image
+  nx_uint32_t  size;           // size of the whole image (ident + CRCs + binary)
+  nx_uint8_t   numPgs;         // number of pages of complete image
+  nx_uint8_t   reserved;
+  nx_uint16_t  crc;            // crc over the above 4 fields
+  nx_uint8_t   appname[16];
+  nx_uint8_t   username[16];
+  nx_uint8_t   hostname[16];
+  nx_uint8_t   platform[16];
+  nx_uint32_t  timestamp;
+  nx_uint32_t  userhash;
+} DelugeIdent;
+
+enum {
+  DELUGE_INVALID_UID = 0xffffffff,
+  DELUGE_NUM_VOLUMES = 4, 
+  DELUGE_KEY = 0xDE00,
+  DELUGE_AM_FLASH_VOL_MANAGER = 0x53,
+  DELUGE_AM_DELUGE_MANAGER = 0x54,
+};
+
+enum {
+  DELUGE_CMD_STOP = 1,
+  DELUGE_CMD_LOCAL_STOP = 2,
+  DELUGE_CMD_ONLY_DISSEMINATE = 3,
+  DELUGE_CMD_DISSEMINATE_AND_REPROGRAM = 4,
+  DELUGE_CMD_REPROGRAM = 5, // Reprogram the local mote
+  DELUGE_CMD_REBOOT = 6,    // Reboot the local mode
+};
+
+#define UQ_DELUGE_METADATA "DelugeMetadata.client"
+#define UQ_DELUGE_VOLUME_MANAGER "DelugeVolumeManager.client"
+
+typedef nx_struct DelugeCmd {
+  nx_uint8_t type;
+  nx_uint32_t uidhash;  // unique id of image
+  nx_uint8_t  imgNum;   // image number
+  nx_uint32_t size;     // size of the image
+} DelugeCmd;
+
+typedef struct BootArgs {
+  uint16_t  address;
+  uint32_t imageAddr;
+  uint8_t  gestureCount;
+  bool     noReprogram;
+} BootArgs;
+
+#endif
diff --git a/tos/lib/net/Deluge/DelugeC.nc b/tos/lib/net/Deluge/DelugeC.nc
new file mode 100644
index 00000000..11b91ba6
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeC.nc
@@ -0,0 +1,104 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#include "Deluge.h"
+#include "StorageVolumes.h"
+
+configuration DelugeC {
+  uses interface Leds;
+}
+
+implementation
+{
+  components ObjectTransferC;
+  
+  components new BlockReaderC(VOLUME_DELUGE1) as BlockReaderDeluge1;
+  components new BlockReaderC(VOLUME_DELUGE2) as BlockReaderDeluge2;
+  components new BlockReaderC(VOLUME_DELUGE3) as BlockReaderDeluge3;
+
+  components new BlockWriterC(VOLUME_DELUGE1) as BlockWriterDeluge1;
+  components new BlockWriterC(VOLUME_DELUGE2) as BlockWriterDeluge2;
+  components new BlockWriterC(VOLUME_DELUGE3) as BlockWriterDeluge3;
+  
+  ObjectTransferC.BlockRead[VOLUME_DELUGE1]  -> BlockReaderDeluge1;
+  ObjectTransferC.BlockRead[VOLUME_DELUGE2]  -> BlockReaderDeluge2;
+  ObjectTransferC.BlockRead[VOLUME_DELUGE3]  -> BlockReaderDeluge3;
+
+  ObjectTransferC.BlockWrite[VOLUME_DELUGE1] ->  BlockWriterDeluge1;
+  ObjectTransferC.BlockWrite[VOLUME_DELUGE2] ->  BlockWriterDeluge2;
+  ObjectTransferC.BlockWrite[VOLUME_DELUGE3] ->  BlockWriterDeluge3;
+
+  ObjectTransferC.Leds = Leds;
+  
+  components new DisseminatorC(DelugeCmd, DELUGE_KEY);
+  components DisseminationC;
+  components ActiveMessageC;
+  components NetProgC, DelugeP;
+  components new TimerMilliC() as Timer;
+  components BlockStorageManagerC;
+  components DelugeMetadataC;
+  components new DelugeMetadataClientC();
+  components new DelugeVolumeManagerClientC();
+  components new BlockStorageLockClientC();
+  components MainC;
+
+  DelugeP.Boot -> MainC;
+  DelugeP.Leds = Leds;  
+#ifndef DELUGE_BASESTATION
+  DelugeP.DisseminationValue -> DisseminatorC;
+#endif
+  DelugeP.DisseminationStdControl -> DisseminationC;
+  DelugeP.ObjectTransfer -> ObjectTransferC;
+  DelugeP.NetProg -> NetProgC;
+  DelugeP.RadioSplitControl -> ActiveMessageC;
+  DelugeP.StorageMap -> BlockStorageManagerC;
+  DelugeP.DelugeMetadata -> DelugeMetadataClientC;
+  DelugeP.storageReady <- DelugeMetadataC;
+  DelugeP.DelugeVolumeManager -> DelugeVolumeManagerClientC;
+  DelugeP.Resource -> BlockStorageLockClientC;
+
+#if defined(DELUGE_BASESTATION) || defined(DELUGE_LIGHT_BASESTATION)
+  components SerialStarterC;
+  components new FlashVolumeManagerC(DELUGE_AM_FLASH_VOL_MANAGER);
+#endif
+
+#ifdef DELUGE_BASESTATION
+  components new DelugeManagerC(DELUGE_AM_DELUGE_MANAGER);
+
+  DelugeManagerC.DisseminationUpdate -> DisseminatorC;
+#endif
+
+}
diff --git a/tos/lib/net/Deluge/DelugeManagerC.nc b/tos/lib/net/Deluge/DelugeManagerC.nc
new file mode 100644
index 00000000..d2b54d6d
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeManagerC.nc
@@ -0,0 +1,73 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "StorageVolumes.h"
+
+generic configuration DelugeManagerC(am_id_t AMId)
+{
+   uses interface DisseminationUpdate<DelugeCmd>;
+}
+
+implementation
+{
+  components new SerialAMSenderC(AMId);
+  components new SerialAMReceiverC(AMId);  
+  components new TimerMilliC() as Timer;
+  components NoLedsC, LedsC;
+  components new DelugeManagerP();
+  components NetProgC;
+  components BlockStorageManagerC;
+  components ObjectTransferC;
+  components new DelugeMetadataClientC();
+  components new DelugeVolumeManagerClientC();
+  components new BlockStorageLockClientC();
+
+  DelugeManagerP.DelayTimer -> Timer;
+  DelugeManagerP.SerialAMSender -> SerialAMSenderC;
+  DelugeManagerP.SerialAMReceiver -> SerialAMReceiverC;
+  DelugeManagerP.Leds -> LedsC;
+  DelugeManagerP.DisseminationUpdate = DisseminationUpdate;
+  DelugeManagerP.NetProg -> NetProgC;
+  DelugeManagerP.ObjectTransfer -> ObjectTransferC;
+
+  DelugeManagerP.StorageMap -> BlockStorageManagerC;
+  DelugeManagerP.DelugeMetadata -> DelugeMetadataClientC;
+  DelugeManagerP.DelugeVolumeManager -> DelugeVolumeManagerClientC;
+  DelugeManagerP.Resource -> BlockStorageLockClientC;
+
+  components DelugeP;
+  DelugeManagerP.stop -> DelugeP;
+}
diff --git a/tos/lib/net/Deluge/DelugeManagerP.nc b/tos/lib/net/Deluge/DelugeManagerP.nc
new file mode 100644
index 00000000..47025e9d
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeManagerP.nc
@@ -0,0 +1,156 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "imgNum2volumeId.h"
+
+generic module DelugeManagerP()
+{
+  uses {
+    interface DisseminationUpdate<DelugeCmd>;
+    interface AMSend as SerialAMSender;
+    interface Receive as SerialAMReceiver;
+    interface Timer<TMilli> as DelayTimer;
+    interface NetProg;
+    interface Leds;
+    interface StorageMap[uint8_t volumeId];
+    interface DelugeMetadata;
+    interface ObjectTransfer;
+    interface DelugeVolumeManager;
+    interface Resource;
+    command void stop();
+  }
+}
+
+implementation
+{
+  typedef nx_struct SerialReqPacket {
+    nx_uint8_t cmd;
+    nx_uint8_t imgNum;
+  } SerialReqPacket;
+  
+  typedef nx_struct SerialReplyPacket {
+    nx_uint8_t error;
+  } SerialReplyPacket;
+
+  message_t serialMsg;
+  DelugeCmd delugeCmd;
+
+  void sendReply(error_t error)
+  {
+    uint8_t len = sizeof(SerialReplyPacket);
+    SerialReplyPacket *reply = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, len);
+    if (reply == NULL) {
+      return;
+    }
+    reply->error = error;
+    call SerialAMSender.send(AM_BROADCAST_ADDR, &serialMsg, len);
+  }
+
+  event message_t* SerialAMReceiver.receive(message_t* msg, void* payload, uint8_t len)
+  {
+    SerialReqPacket *request = (SerialReqPacket *)payload;
+    memset(&delugeCmd, 0, sizeof(DelugeCmd));
+    call stop();
+    delugeCmd.type = request->cmd;
+    // Converts the image number that the user wants to the real image number
+    request->imgNum = imgNum2volumeId(request->imgNum);
+
+    switch (request->cmd) {
+    case DELUGE_CMD_STOP:
+      call DisseminationUpdate.change(&delugeCmd);
+    case DELUGE_CMD_LOCAL_STOP:
+      sendReply(SUCCESS);
+      call Resource.release();
+      break;
+    case DELUGE_CMD_ONLY_DISSEMINATE:
+    case DELUGE_CMD_DISSEMINATE_AND_REPROGRAM:
+      if (request->imgNum != NON_DELUGE_VOLUME &&
+	  (call Resource.isOwner() || 
+	   call Resource.immediateRequest() == SUCCESS)) {
+	call DelugeMetadata.read(request->imgNum);
+      } else {
+	sendReply(FAIL);
+      }
+      break;
+    case DELUGE_CMD_REPROGRAM:
+    case DELUGE_CMD_REBOOT:
+      if (request->imgNum == NON_DELUGE_VOLUME) {
+	sendReply(FAIL);
+	break;
+      }
+      delugeCmd.imgNum = request->imgNum;
+      call DelayTimer.startOneShot(1024);
+      sendReply(SUCCESS);
+      break;
+    }
+    return msg;
+  }
+
+  event void DelayTimer.fired()
+  {
+    switch (delugeCmd.type) {
+    case DELUGE_CMD_REPROGRAM:
+      call NetProg.programImageAndReboot(call StorageMap.getPhysicalAddress[delugeCmd.imgNum](0));
+      break;
+    case DELUGE_CMD_REBOOT:
+      call NetProg.reboot();
+      break;
+    }
+  }
+
+  event void DelugeMetadata.readDone(uint8_t imgNum, DelugeIdent* ident, error_t error)
+  {
+    delugeCmd.imgNum = imgNum;
+    sendReply(error);
+    if (error != SUCCESS) {
+      return;
+    }
+    switch (delugeCmd.type) {
+    case DELUGE_CMD_ONLY_DISSEMINATE:
+    case DELUGE_CMD_DISSEMINATE_AND_REPROGRAM:
+      delugeCmd.uidhash = ident->uidhash;
+      delugeCmd.size = ident->size;
+      call DisseminationUpdate.change(&delugeCmd);
+      call ObjectTransfer.publish(delugeCmd.uidhash, delugeCmd.size, delugeCmd.imgNum);
+      break;
+    }    
+  }
+
+  event void Resource.granted() {}
+  event void ObjectTransfer.receiveDone(error_t error) {}
+  event void SerialAMSender.sendDone(message_t* msg, error_t error) {}
+  event void DelugeVolumeManager.eraseDone(uint8_t imgNum) {}
+}
diff --git a/tos/lib/net/Deluge/DelugeMetadata.nc b/tos/lib/net/Deluge/DelugeMetadata.nc
new file mode 100644
index 00000000..3664bb2d
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeMetadata.nc
@@ -0,0 +1,14 @@
+/**
+ *  An interface for obtaining the identification data of an
+ *  image. The pointer returned by readDone will be destroyed by the
+ *  next read.
+ *
+ *  @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ *  @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+interface DelugeMetadata
+{
+  command error_t read(uint8_t imgNum);
+  event void readDone(uint8_t imgNum, DelugeIdent* ident, error_t error);
+}
diff --git a/tos/lib/net/Deluge/DelugeMetadataC.nc b/tos/lib/net/Deluge/DelugeMetadataC.nc
new file mode 100644
index 00000000..7228eb9a
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeMetadataC.nc
@@ -0,0 +1,71 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration DelugeMetadataC
+{
+  provides interface DelugeMetadata[uint8_t client];
+  uses event void storageReady();
+}
+
+implementation
+{
+  components MainC;
+  components DelugeMetadataP;
+
+  DelugeMetadata = DelugeMetadataP;
+  storageReady = DelugeMetadataP;
+  DelugeMetadataP.Boot -> MainC;
+
+  components new BlockReaderC(VOLUME_GOLDENIMAGE) as BlockReaderGoldenImage;
+  components new BlockReaderC(VOLUME_DELUGE1) as BlockReaderDeluge1;
+  components new BlockReaderC(VOLUME_DELUGE2) as BlockReaderDeluge2;
+  components new BlockReaderC(VOLUME_DELUGE3) as BlockReaderDeluge3;
+
+  DelugeMetadataP.BlockRead[VOLUME_GOLDENIMAGE] -> BlockReaderGoldenImage;
+  DelugeMetadataP.BlockRead[VOLUME_DELUGE1] -> BlockReaderDeluge1;
+  DelugeMetadataP.BlockRead[VOLUME_DELUGE2] -> BlockReaderDeluge2;
+  DelugeMetadataP.BlockRead[VOLUME_DELUGE3] -> BlockReaderDeluge3;
+
+  components new BlockWriterC(VOLUME_GOLDENIMAGE) as BlockWriterGoldenImage;
+  components new BlockWriterC(VOLUME_DELUGE1) as BlockWriterDeluge1;
+  components new BlockWriterC(VOLUME_DELUGE2) as BlockWriterDeluge2;
+  components new BlockWriterC(VOLUME_DELUGE3) as BlockWriterDeluge3;
+
+  DelugeMetadataP.BlockWrite[VOLUME_GOLDENIMAGE] -> BlockWriterGoldenImage;
+  DelugeMetadataP.BlockWrite[VOLUME_DELUGE1] -> BlockWriterDeluge1;
+  DelugeMetadataP.BlockWrite[VOLUME_DELUGE2] -> BlockWriterDeluge2;
+  DelugeMetadataP.BlockWrite[VOLUME_DELUGE3] -> BlockWriterDeluge3;
+}
diff --git a/tos/lib/net/Deluge/DelugeMetadataClientC.nc b/tos/lib/net/Deluge/DelugeMetadataClientC.nc
new file mode 100644
index 00000000..a0720b6a
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeMetadataClientC.nc
@@ -0,0 +1,50 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+generic configuration DelugeMetadataClientC()
+{
+  provides interface DelugeMetadata;
+}
+
+implementation
+{
+  enum {
+    CLIENT_ID = unique(UQ_DELUGE_METADATA)
+  };
+
+  components DelugeMetadataC;
+  DelugeMetadata = DelugeMetadataC.DelugeMetadata[CLIENT_ID];
+}
diff --git a/tos/lib/net/Deluge/DelugeMetadataP.nc b/tos/lib/net/Deluge/DelugeMetadataP.nc
new file mode 100644
index 00000000..42f79f5b
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeMetadataP.nc
@@ -0,0 +1,188 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "imgNum2volumeId.h"
+
+module DelugeMetadataP
+{
+  provides interface DelugeMetadata[uint8_t client];
+  uses {
+    interface Boot;
+    interface BlockRead[uint8_t volumeId];
+    interface BlockWrite[uint8_t volumeId];
+    interface StorageMap[uint8_t volumeId];
+    event void storageReady();
+  }
+}
+
+implementation
+{
+  enum {
+    S_READ_IDENT,
+    S_READ_CRC,
+    S_CRC,
+    S_READY,
+    S_BUSY
+  };
+  
+  DelugeIdent ident;
+  uint8_t state;
+  uint8_t currentVolume;
+  uint8_t currentImageIdx;
+  uint8_t currentPage;
+  nx_uint16_t currentCrc;
+  uint8_t currentClient;
+
+  void nextImage()
+  {
+    if (currentImageIdx < DELUGE_NUM_VOLUMES) {
+      state = S_READ_IDENT;
+      call BlockRead.read[currentVolume](0, &ident, sizeof(ident));
+    } else {
+      signal storageReady();
+      state = S_READY;
+    }
+  }
+
+  uint32_t calcCrcAddr()
+  {
+    return DELUGE_IDENT_SIZE + currentPage * sizeof(uint16_t);
+  }
+
+  uint32_t calcPageAddr()
+  {
+    return DELUGE_IDENT_SIZE + DELUGE_CRC_BLOCK_SIZE + currentPage * (uint32_t)DELUGE_BYTES_PER_PAGE;
+  }
+
+  event void Boot.booted()
+  {
+    // We are going to iterate over all the images and verify their
+    // integrity. For each image we first read the ident to find the
+    // number of pages and then iterate over all of them, compute the
+    // CRC and check it against the corresponding value from the CRCs
+    // block.
+    state = S_READ_IDENT;
+    currentImageIdx = 0;
+    currentVolume = _imgNum2volumeId[currentImageIdx];
+    nextImage();
+  }
+
+  command error_t DelugeMetadata.read[uint8_t client](uint8_t imgNum)
+  {
+    error_t error;
+    if (state != S_READY) {
+      return FAIL;
+    }
+    currentClient = client;
+    error = call BlockRead.read[imgNum](0, &ident, sizeof(ident));
+    state = error == SUCCESS ? S_BUSY : state;
+    return error;
+  }
+
+  event void BlockRead.readDone[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len, error_t error)
+  {
+    switch (state) {
+    case S_BUSY:
+      state = S_READY;
+      signal DelugeMetadata.readDone[currentClient](imgNum, buf, error);
+      break;
+    case S_READ_IDENT:
+      if (error == SUCCESS) {
+        if (ident.uidhash != DELUGE_INVALID_UID) {
+          currentPage = 0;
+          state = S_READ_CRC;
+          call BlockRead.read[currentVolume](calcCrcAddr(), &currentCrc, sizeof(currentCrc));
+        } else {
+          currentImageIdx++;
+          currentVolume = _imgNum2volumeId[currentImageIdx];
+          nextImage();
+        }
+      }
+      break;
+    case S_READ_CRC:
+      state = S_CRC;
+      call BlockRead.computeCrc[currentVolume](calcPageAddr(), DELUGE_BYTES_PER_PAGE, 0);
+      break;
+    }
+  }
+
+  event void BlockRead.computeCrcDone[uint8_t imgNum](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error)
+  {
+    switch (state) {
+    case S_CRC:
+      if (crc != currentCrc) {
+//	printf("%04x %04x\n", crc, currentCrc);
+        // invalidate the image by erasing it
+        call BlockWrite.erase[currentVolume]();
+      } else {
+        currentPage++;
+        if (currentPage < ident.numPgs) {
+          state = S_READ_CRC;
+          call BlockRead.read[currentVolume](calcCrcAddr(), &currentCrc, sizeof(currentCrc));
+        } else {
+          currentImageIdx++;
+          currentVolume = _imgNum2volumeId[currentImageIdx];
+          nextImage();
+        }
+      }
+      break;
+    }
+  }
+
+  default command error_t BlockRead.read[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t BlockRead.computeCrc[uint8_t imgNum](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; }
+
+  event void BlockWrite.writeDone[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  event void BlockWrite.eraseDone[uint8_t imgNum](error_t error)
+  {
+    switch (state) {
+    case S_READY:
+      signal BlockWrite.eraseDone[imgNum](error);
+      break;
+    case S_CRC:
+      currentImageIdx++;
+      currentVolume = _imgNum2volumeId[currentImageIdx];
+      nextImage();
+      break;
+    }
+  }
+
+  event void BlockWrite.syncDone[uint8_t imgNum](error_t error) {}
+  default command error_t BlockWrite.erase[uint8_t imgNum]() { return FAIL; }
+
+  default event void DelugeMetadata.readDone[uint8_t client](uint8_t imgNum, DelugeIdent* i, error_t error) {}
+  default event void storageReady() {}
+}
diff --git a/tos/lib/net/Deluge/DelugeMsgs.h b/tos/lib/net/Deluge/DelugeMsgs.h
new file mode 100644
index 00000000..3e417533
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeMsgs.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#ifndef __DELUGE_MSGS_H__
+#define __DELUGE_MSGS_H__
+
+#include "DelugePageTransfer.h"
+
+enum {
+  DELUGE_ADV_NORMAL = 0,
+  DELUGE_ADV_ERROR  = 1,
+  DELUGE_ADV_PC     = 2,
+  DELUGE_ADV_PING   = 3,
+  DELUGE_ADV_RESET  = 4,
+};
+
+typedef nx_struct DelugeAdvMsg {
+  nx_uint16_t    sourceAddr;
+  nx_uint8_t     version;    // Deluge Version
+  nx_uint8_t     type;
+  DelugeObjDesc  objDesc;
+  nx_uint8_t     reserved;
+} DelugeAdvMsg;
+
+typedef nx_struct DelugeReqMsg {
+  nx_uint16_t    dest;
+  nx_uint16_t    sourceAddr;
+  nx_object_id_t objid;
+  nx_page_num_t  pgNum;
+  nx_uint8_t     requestedPkts[DELUGET2_PKT_BITVEC_SIZE];
+} DelugeReqMsg;
+
+typedef nx_struct DelugeDataMsg {
+  nx_object_id_t objid;
+  nx_page_num_t  pgNum;
+  nx_uint8_t     pktNum;
+  nx_uint8_t     data[DELUGET2_PKT_PAYLOAD_SIZE];
+} DelugeDataMsg;
+
+#endif
diff --git a/tos/lib/net/Deluge/DelugeP.nc b/tos/lib/net/Deluge/DelugeP.nc
new file mode 100644
index 00000000..8cb9ede5
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeP.nc
@@ -0,0 +1,197 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module DelugeP
+{
+  uses {
+    interface Boot;
+    interface Leds;
+    interface DisseminationValue<DelugeCmd>;
+    interface StdControl as DisseminationStdControl;
+    interface ObjectTransfer;
+    interface SplitControl as RadioSplitControl;
+    interface NetProg;
+    interface StorageMap[uint8_t volumeId];
+    interface DelugeMetadata;
+    interface DelugeVolumeManager;
+    interface Resource;
+  }
+  provides {
+    event void storageReady();
+    command void stop();
+  }
+}
+
+implementation
+{
+  enum {
+    S_IDLE,
+    S_PUB,
+    S_RECV
+  };
+
+  DelugeCmd lastCmd;
+  uint8_t state = S_IDLE;
+
+  event void storageReady()
+  {
+    call RadioSplitControl.start();
+  }
+
+  event void Boot.booted()
+  {
+    lastCmd.uidhash = DELUGE_INVALID_UID;
+  }
+
+  event void RadioSplitControl.startDone(error_t error)
+  {
+    if (error == SUCCESS) {
+      call DisseminationStdControl.start();
+    }
+  }
+
+  command void stop()
+  {
+    call Resource.release();
+    if (state == S_RECV) {
+//      printf("erase %d\n", lastCmd.imgNum);
+      call DelugeVolumeManager.erase(lastCmd.imgNum);
+    }
+    call ObjectTransfer.stop();
+    state = S_IDLE;
+  }
+
+  task void taskRequest()
+  {
+    signal Resource.granted();
+  }
+  
+  void request()
+  {
+    if (call Resource.isOwner()) {
+      post taskRequest();
+    } else {
+      call Resource.request();
+    }
+  }
+
+  event void DisseminationValue.changed()
+  {
+    const DelugeCmd *cmd = call DisseminationValue.get();
+//    printf("cmd: %d uidhash: 0x%lx imgNum: %d size: %u\n", cmd->type, cmd->uidhash, cmd->imgNum, cmd->size);
+    switch (cmd->type) {
+    case DELUGE_CMD_STOP:
+      call stop();
+      break;
+    case DELUGE_CMD_ONLY_DISSEMINATE:
+    case DELUGE_CMD_DISSEMINATE_AND_REPROGRAM:
+      if (state == S_RECV) {
+	if (cmd->uidhash == lastCmd.uidhash) {
+	  if (cmd->imgNum == lastCmd.imgNum) {
+	    // Same uidhash, same imgNum, only cmd should be
+	    // different.  That will be properly updated by the last
+	    // statement from this function.
+	    break;
+	  }
+	}
+	call stop();
+      }
+      if (cmd->uidhash != IDENT_UIDHASH) {
+	call DelugeMetadata.read(cmd->imgNum);
+      } else {
+	state = S_PUB;
+	request();
+      }
+      break;
+    }
+    lastCmd = *cmd;
+//    printf("lastCmd: %d uidhash: 0x%lx\n", lastCmd.type, lastCmd.uidhash);
+  }
+  
+  event void ObjectTransfer.receiveDone(error_t error)
+  {
+    call Leds.set(LEDS_LED1 | LEDS_LED2);
+    state = S_IDLE;
+    
+    if (error == SUCCESS) {
+      switch (lastCmd.type) {
+      case DELUGE_CMD_ONLY_DISSEMINATE:
+	state = S_PUB;
+	request();
+	break;
+      case DELUGE_CMD_DISSEMINATE_AND_REPROGRAM:
+	call NetProg.programImageAndReboot(call StorageMap.getPhysicalAddress[lastCmd.imgNum](0));
+	break;
+      }
+    } else {
+      call DelugeVolumeManager.erase(lastCmd.imgNum);
+    }
+  }
+
+  event void DelugeMetadata.readDone(uint8_t imgNum, DelugeIdent* ident, error_t error)
+  {
+//    printf("readDone 0x%lx imgNum: %d size: %lu\n", lastCmd.uidhash, lastCmd.imgNum, lastCmd.size);
+    if (ident->uidhash == lastCmd.uidhash) {
+      if (lastCmd.type == DELUGE_CMD_DISSEMINATE_AND_REPROGRAM) {
+	call NetProg.programImageAndReboot(call StorageMap.getPhysicalAddress[imgNum](0));
+      } else {
+	// We already have the image so we'll go ahead and start publishing.
+	state = S_PUB;
+	request();
+      }
+    } else {
+      state = S_RECV;
+      request();
+    }
+  }
+
+  event void Resource.granted()
+  {
+    switch (state) {
+    case S_PUB:
+//      printf("start pub 0x%lx imgNum: %d size: %u\n", lastCmd.uidhash, lastCmd.imgNum, lastCmd.size);
+      call ObjectTransfer.publish(lastCmd.uidhash, lastCmd.size, lastCmd.imgNum);
+      break;
+    case S_RECV:
+      call ObjectTransfer.receive(lastCmd.uidhash, lastCmd.size, lastCmd.imgNum);
+      break;
+    }
+  }
+
+  event void DelugeVolumeManager.eraseDone(uint8_t imgNum) {}
+  event void RadioSplitControl.stopDone(error_t error) {}
+  default async void command Leds.set(uint8_t val) {}
+}
diff --git a/tos/lib/net/Deluge/DelugePageTransfer.h b/tos/lib/net/Deluge/DelugePageTransfer.h
new file mode 100644
index 00000000..3abd6642
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugePageTransfer.h
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2000-2004 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#ifndef DELUGEPAGETRANSFER_H
+#define DELUGEPAGETRANSFER_H
+
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)
+  #include "extra/telosb/TOSBoot_platform.h"
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS)
+  #include "extra/micaz/TOSBoot_platform.h"
+#elif defined(PLATFORM_MULLE)
+  #include "extra/mulle/TOSBoot_platform.h"
+#elif defined(PLATFORM_TINYNODE)
+  #include "extra/tinynode/TOSBoot_platform.h"
+#else
+  #error "Target platform is not currently supported by Deluge T2"
+#endif
+
+#include <message.h>
+
+#define AM_DELUGEADVMSG  0x50
+#define AM_DELUGEREQMSG  0x51
+#define AM_DELUGEDATAMSG 0x52
+
+typedef int32_t object_id_t;
+typedef nx_int32_t nx_object_id_t;
+typedef uint32_t object_size_t;
+typedef nx_uint32_t nx_object_size_t;
+typedef uint8_t page_num_t;
+typedef nx_uint8_t nx_page_num_t;
+
+enum {
+  DELUGET2_PKT_PAYLOAD_SIZE  = TOSH_DATA_LENGTH - sizeof(nx_object_id_t) - sizeof(nx_page_num_t) - sizeof(nx_uint8_t),
+  DELUGET2_BYTES_PER_PAGE    = 1024,
+  DELUGET2_PKTS_PER_PAGE     = ((DELUGET2_BYTES_PER_PAGE - 1) / DELUGET2_PKT_PAYLOAD_SIZE) + 1,
+  DELUGET2_PKT_BITVEC_SIZE   = (((DELUGET2_PKTS_PER_PAGE - 1) / 8) + 1),
+
+  DELUGE_PKT_PAYLOAD_SIZE           = 23,
+  DELUGE_PKTS_PER_PAGE              = 48,
+  DELUGE_BYTES_PER_PAGE             = (DELUGE_PKTS_PER_PAGE*DELUGE_PKT_PAYLOAD_SIZE),
+
+  DELUGE_VERSION                    = 2,
+  DELUGE_MAX_ADV_PERIOD_LOG2        = 22,
+  DELUGE_NUM_NEWDATA_ADVS_REQUIRED  = 2,
+  DELUGE_NUM_MIN_ADV_PERIODS        = 2,
+  DELUGE_MAX_NUM_REQ_TRIES          = 1,
+  DELUGE_REBOOT_DELAY               = 4,
+  DELUGE_FAILED_SEND_DELAY          = 16,
+  DELUGE_MIN_DELAY                  = 16,
+//  DELUGE_DATA_OFFSET                = 128,
+  DELUGE_IDENT_SIZE                 = 128,
+  DELUGE_INVALID_ADDR               = (0x7fffffffL),
+  DELUGE_MIN_ADV_PERIOD_LOG2        = 9,
+  DELUGE_MAX_REQ_DELAY              = (0x1L << (DELUGE_MIN_ADV_PERIOD_LOG2 - 1)),
+  DELUGE_NACK_TIMEOUT               = (DELUGE_MAX_REQ_DELAY >> 0x1),
+  DELUGE_MAX_IMAGE_SIZE             = (128L * 1024L),
+  DELUGE_MAX_PAGES                  = 128,
+  DELUGE_CRC_SIZE                   = sizeof(uint16_t),
+  DELUGE_CRC_BLOCK_SIZE             = DELUGE_MAX_PAGES * DELUGE_CRC_SIZE,
+  DELUGE_GOLDEN_IMAGE_NUM           = 0x0,
+  DELUGE_INVALID_OBJID              = 0xff,
+  DELUGE_INVALID_PKTNUM             = 0xff,
+  DELUGE_INVALID_PGNUM              = 0xff,
+  DELUGE_QSIZE                      = 2
+};
+
+typedef struct DelugeAdvTimer {
+  uint32_t timer      : 32;
+  uint8_t  periodLog2 : 8;
+  bool     overheard  : 1;
+  uint8_t  newAdvs    : 7;
+} DelugeAdvTimer;
+
+typedef nx_struct DelugeObjDesc {
+  nx_object_id_t objid;
+  nx_page_num_t  numPgs;         // num pages of complete image
+  nx_uint16_t    crc;            // crc for vNum and numPgs
+  nx_page_num_t  numPgsComplete; // numPgsComplete in image
+  nx_uint8_t     reserved;
+} DelugeObjDesc;
+
+#endif
diff --git a/tos/lib/net/Deluge/DelugePageTransfer.nc b/tos/lib/net/Deluge/DelugePageTransfer.nc
new file mode 100644
index 00000000..afc3d97d
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugePageTransfer.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#include "DelugePageTransfer.h"
+
+interface DelugePageTransfer {
+  command error_t setWorkingPage(object_id_t new_objid, page_num_t new_pgNum);
+  command error_t dataAvailable(uint16_t sourceAddr);
+  command bool isTransferring();
+  event void suppressMsgs(object_id_t new_objid);
+  event void receivedPage(object_id_t new_objid, page_num_t new_pgNum);
+  command void setImgNum(uint8_t new_img_num);
+  command error_t stop();
+}
diff --git a/tos/lib/net/Deluge/DelugePageTransferC.nc b/tos/lib/net/Deluge/DelugePageTransferC.nc
new file mode 100644
index 00000000..306bce6e
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugePageTransferC.nc
@@ -0,0 +1,80 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+configuration DelugePageTransferC
+{
+  provides interface DelugePageTransfer;
+  uses {
+    interface BlockRead[uint8_t img_num];
+    interface BlockWrite[uint8_t img_num];
+    
+    interface Receive as ReceiveDataMsg;
+    interface Receive as ReceiveReqMsg;
+    interface AMSend as SendDataMsg;
+    interface AMSend as SendReqMsg;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface Leds;
+  }
+}
+
+implementation
+{
+  components DelugePageTransferP;
+  
+  DelugePageTransfer = DelugePageTransferP;
+  BlockRead = DelugePageTransferP.BlockRead;
+  BlockWrite = DelugePageTransferP.BlockWrite;
+  
+  ReceiveDataMsg = DelugePageTransferP.ReceiveDataMsg;
+  ReceiveReqMsg = DelugePageTransferP.ReceiveReqMsg;
+  SendDataMsg = DelugePageTransferP.SendDataMsg;
+  SendReqMsg = DelugePageTransferP.SendReqMsg;
+  
+  AMPacket = DelugePageTransferP.AMPacket;
+  PacketAcknowledgements = DelugePageTransferP.PacketAcknowledgements;
+  
+  components RandomC, BitVecUtilsC, new TimerMilliC() as Timer;
+  DelugePageTransferP.Random -> RandomC;
+  DelugePageTransferP.Timer -> Timer;
+  DelugePageTransferP.BitVecUtils -> BitVecUtilsC;
+  
+  DelugePageTransferP.Leds = Leds;
+  
+  // For collecting statistics
+  //components StatsCollectorC;
+  //DelugePageTransferP.StatsCollector -> StatsCollectorC.StatsCollector;
+}
diff --git a/tos/lib/net/Deluge/DelugePageTransferP.nc b/tos/lib/net/Deluge/DelugePageTransferP.nc
new file mode 100644
index 00000000..c315d216
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugePageTransferP.nc
@@ -0,0 +1,499 @@
+/*
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#include "DelugeMsgs.h"
+#include "BitVecUtils.h"
+
+module DelugePageTransferP
+{
+  provides interface DelugePageTransfer;
+  uses {
+    interface BitVecUtils;
+    interface BlockRead[uint8_t img_num];
+    interface BlockWrite[uint8_t img_num];
+    
+    interface Receive as ReceiveDataMsg;
+    interface Receive as ReceiveReqMsg;
+    interface AMSend as SendDataMsg;
+    interface AMSend as SendReqMsg;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface Timer<TMilli> as Timer;
+    interface Random;
+    
+    interface Leds;
+    //interface StatsCollector;
+  }
+}
+
+implementation
+{
+  // send/receive page buffers, and state variables for buffers
+  uint8_t pktsToSend[DELUGET2_PKT_BITVEC_SIZE];    // bit vec of packets to send
+  uint8_t pktsToReceive[DELUGET2_PKT_BITVEC_SIZE]; // bit vec of packets to receive
+
+  DelugeDataMsg rxQueue[DELUGE_QSIZE];
+  uint8_t       head, size;
+
+  enum {
+    S_DISABLED,
+    S_IDLE,     
+    S_TX_LOCKING,
+    S_SENDING,
+    S_RX_LOCKING,
+    S_RECEIVING,
+  };
+  
+  // state variables
+  uint8_t      state        = S_DISABLED;
+  uint16_t     nodeAddr;
+  uint8_t      remainingAttempts;
+  bool         suppressReq;
+  object_id_t  objToSend    = DELUGE_INVALID_OBJID;
+  page_num_t   pageToSend   = DELUGE_INVALID_PGNUM;
+  object_id_t  workingObjid = DELUGE_INVALID_OBJID;
+  page_num_t   workingPgNum = DELUGE_INVALID_PGNUM;
+  uint8_t      imgNum       = 0;
+  
+  message_t pMsgBuf;
+  bool      isBusy_pMsgBuf = FALSE;
+  uint8_t   publisher_addr;   // For collecting stats only
+  
+  void changeState(uint8_t newState);
+  
+  void startReqTimer(bool first)
+  {
+    uint32_t delay;
+    if (first) {
+      delay = DELUGE_MIN_DELAY + (call Random.rand32() % DELUGE_MAX_REQ_DELAY);
+    } else {
+      delay = DELUGE_NACK_TIMEOUT + (call Random.rand32() % DELUGE_NACK_TIMEOUT);
+    }
+    call Timer.startOneShot(delay);
+  }
+  
+  void setupReqMsg()
+  {
+    DelugeReqMsg *pReqMsg = (DelugeReqMsg *)(call SendReqMsg.getPayload(&pMsgBuf, sizeof(DelugeReqMsg)));
+    if (pReqMsg == NULL) {
+      return;
+    }
+    if (state == S_RX_LOCKING) {
+      if (isBusy_pMsgBuf) {
+        return;
+      }
+      isBusy_pMsgBuf = TRUE;
+      changeState(S_RECEIVING);
+      pReqMsg->dest = nodeAddr;
+      pReqMsg->sourceAddr = TOS_NODE_ID;
+      pReqMsg->objid = workingObjid;
+      pReqMsg->pgNum = workingPgNum;
+    }
+    
+    if (state != S_RECEIVING) {
+      return;
+    }
+    
+    // suppress request
+    if (suppressReq) {
+      startReqTimer(FALSE);
+      suppressReq = FALSE;
+    }
+    // tried too many times, give up
+    else if (remainingAttempts == 0) {
+      changeState(S_IDLE);
+    }
+    // send req message
+    else {
+      uint32_t i;
+      for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) {
+        pReqMsg->requestedPkts[i] = pktsToReceive[i];
+      }
+      //memcpy(pReqMsg->requestedPkts, pktsToReceive, DELUGE_PKT_BITVEC_SIZE);
+      
+      if (call SendReqMsg.send(pReqMsg->dest, &pMsgBuf, sizeof(DelugeReqMsg)) != SUCCESS) {
+	startReqTimer(FALSE);
+      }
+    }
+  }
+  
+  storage_addr_t calcOffset(page_num_t pgNum, uint8_t pktNum)
+  {
+    return (storage_addr_t)pgNum * (storage_addr_t)DELUGET2_BYTES_PER_PAGE
+            + (uint16_t)pktNum * (uint16_t)DELUGET2_PKT_PAYLOAD_SIZE;
+  }
+  
+  void setupDataMsg()
+  {
+    DelugeDataMsg *pDataMsg = (DelugeDataMsg *)(call SendDataMsg.getPayload(&pMsgBuf, sizeof(DelugeDataMsg)));
+    uint16_t nextPkt;
+    
+    if (state != S_SENDING && state != S_TX_LOCKING) {
+      return;
+    }
+    
+    signal DelugePageTransfer.suppressMsgs(objToSend);
+    
+    if (state == S_TX_LOCKING) {
+      if (isBusy_pMsgBuf) {
+        return;
+      }
+      isBusy_pMsgBuf = TRUE;
+      changeState(S_SENDING);
+      pDataMsg->objid = objToSend;
+      pDataMsg->pgNum = pageToSend;
+      pDataMsg->pktNum = 0;
+    }
+    
+    if (call BitVecUtils.indexOf(&nextPkt, pDataMsg->pktNum, pktsToSend, DELUGET2_PKTS_PER_PAGE) != SUCCESS) {
+      // no more packets to send
+      changeState(S_IDLE);
+    } else {
+      pDataMsg->pktNum = nextPkt;
+      if (call BlockRead.read[imgNum](calcOffset(pageToSend, nextPkt), pDataMsg->data, DELUGET2_PKT_PAYLOAD_SIZE) != SUCCESS) {
+        call Timer.startOneShot(DELUGE_FAILED_SEND_DELAY);
+      }
+    }
+  }
+  
+  void unlockPMsgBuf()
+  {
+    isBusy_pMsgBuf = FALSE;
+    
+    switch(state) {
+      case S_TX_LOCKING:
+        setupDataMsg();
+        break;
+      case S_RX_LOCKING:
+        setupReqMsg();
+        break;
+    }
+  }
+  
+  void changeState(uint8_t newState)
+  {
+    if ((newState == S_DISABLED || newState == S_IDLE)
+	&& (state == S_SENDING || state == S_RECEIVING)) {
+      unlockPMsgBuf();
+    }
+    
+    state = newState;
+  }
+  
+  void suppressMsgs(object_id_t objid, page_num_t pgNum)
+  {
+    if (state == S_SENDING || state == S_TX_LOCKING) {
+      if (objid < objToSend || (objid == objToSend && pgNum < pageToSend)) {
+	uint32_t i;
+	changeState(S_IDLE);
+	for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) {
+          pktsToSend[i] = 0x00;
+	}
+	//memset(pktsToSend, 0x00, DELUGE_PKT_BITVEC_SIZE);
+      }
+    } else if (state == S_RECEIVING || state == S_RX_LOCKING) {
+      if (objid < workingObjid || (objid == workingObjid && pgNum <= workingPgNum)) {
+	// suppress next request since similar request has been overheard
+	suppressReq = TRUE;
+      }
+    }
+  }
+  
+  void writeData()
+  {
+    if(call BlockWrite.write[imgNum](calcOffset(rxQueue[head].pgNum, rxQueue[head].pktNum),
+                            rxQueue[head].data, DELUGET2_PKT_PAYLOAD_SIZE) != SUCCESS) {
+      size = 0;
+    }
+  }
+  
+  command error_t DelugePageTransfer.stop()
+  {
+    uint32_t i;
+    
+    call Timer.stop();
+    changeState(S_DISABLED);
+    workingObjid = DELUGE_INVALID_OBJID;
+    workingPgNum = DELUGE_INVALID_PGNUM;
+    
+    for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) {
+      pktsToReceive[i] = 0x00;
+    }
+    for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) {
+      pktsToSend[i] = 0x00;
+    }
+    //memset(pktsToReceive, 0x00, DELUGE_PKT_BITVEC_SIZE);
+    //memset(pktsToSend, 0x00, DELUGE_PKT_BITVEC_SIZE);
+    
+    return SUCCESS;
+  }
+  
+  command error_t DelugePageTransfer.setWorkingPage(object_id_t new_objid, page_num_t new_pgNum)
+  {
+    uint32_t i;
+    
+    if (state == S_DISABLED) {
+      changeState(S_IDLE);
+    }
+    
+    workingObjid = new_objid;
+    workingPgNum = new_pgNum;
+    
+    for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) {
+      pktsToReceive[i] = 0xFF;
+    }
+    //memset(pktsToReceive, (nx_uint8_t)0xff, DELUGE_PKT_BITVEC_SIZE);
+    
+    return SUCCESS;
+  }
+  
+  command bool DelugePageTransfer.isTransferring()
+  {
+    return (state != S_IDLE && state != S_DISABLED);
+  }
+  
+  command error_t DelugePageTransfer.dataAvailable(uint16_t sourceAddr)
+  {
+    if (state == S_IDLE) {
+      // currently idle, so request data from source
+      changeState(S_RX_LOCKING);
+      nodeAddr = sourceAddr;
+      remainingAttempts = DELUGE_MAX_NUM_REQ_TRIES;
+      suppressReq = FALSE;
+      
+      // randomize request to prevent collision
+      startReqTimer(TRUE);
+    }
+    
+    return SUCCESS;
+  }
+  
+  event void Timer.fired()
+  {
+    setupReqMsg();
+    setupDataMsg();
+  }
+  
+  event void SendReqMsg.sendDone(message_t* msg, error_t error)
+  {
+    if (state != S_RECEIVING) {
+      return;
+    }
+    
+    remainingAttempts--;
+    // start timeout timer in case request is not serviced
+    startReqTimer(FALSE);
+  }
+  
+  event message_t* ReceiveReqMsg.receive(message_t* msg, void* payload, uint8_t len)
+  {
+    DelugeReqMsg *rxReqMsg = (DelugeReqMsg*)payload;
+    object_id_t objid;
+    page_num_t pgNum;
+    int i;
+    
+    if (state == S_DISABLED) {
+      return msg;
+    }
+    
+    objid = rxReqMsg->objid;
+    pgNum = rxReqMsg->pgNum;
+    
+    // check if need to suppress req or data msgs
+    suppressMsgs(objid, pgNum);
+    
+    // if not for me, ignore request
+    if (rxReqMsg->dest != TOS_NODE_ID
+        || objid != workingObjid
+	|| pgNum >= workingPgNum) {
+      return msg;
+    }
+    
+    if (state == S_IDLE
+	|| ((state == S_SENDING || state == S_TX_LOCKING)
+           && objid == objToSend
+           && pgNum == pageToSend)) {
+      // take union of packet bit vectors
+      for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) {
+        pktsToSend[i] |= rxReqMsg->requestedPkts[i];
+      }
+    }
+    
+    if (state == S_IDLE) {
+      // not currently sending, so start sending data
+      changeState(S_TX_LOCKING);
+      objToSend = objid;
+      pageToSend = pgNum;
+      nodeAddr = AM_BROADCAST_ADDR;
+      setupDataMsg();
+    }
+    
+    return msg;
+  }
+  
+  event void SendDataMsg.sendDone(message_t* msg, error_t error)
+  {
+    DelugeDataMsg *pDataMsg = (DelugeDataMsg *)(call SendDataMsg.getPayload(&pMsgBuf, sizeof (DelugeDataMsg)));
+    if (pDataMsg == NULL) {
+      return;
+    }
+    BITVEC_CLEAR(pktsToSend, pDataMsg->pktNum);
+    call Timer.startOneShot(2);
+    
+// For collecting stats
+if (error == SUCCESS) {
+  //call StatsCollector.endPubPktTransTime();
+}
+  }
+  
+  event message_t* ReceiveDataMsg.receive(message_t* msg, void* payload, uint8_t len)
+  {
+    DelugeDataMsg* rxDataMsg = (DelugeDataMsg*)payload;
+    
+    if (state == S_DISABLED) {
+      return msg;
+    }
+    
+    // check if need to suppress req or data messages
+    suppressMsgs(rxDataMsg->objid, rxDataMsg->pgNum);
+    
+    if (rxDataMsg->objid == workingObjid
+	&& rxDataMsg->pgNum == workingPgNum
+	&& BITVEC_GET(pktsToReceive, rxDataMsg->pktNum)
+	&& size < DELUGE_QSIZE) {
+      // got a packet we need
+      
+// For collecting stats
+if (rxDataMsg->pktNum == 0) {
+  //call StatsCollector.startRecvPageTransTime(0);
+}
+call Leds.led1Toggle();
+//call Leds.set(rxDataMsg->pktNum);
+      
+      // copy data
+      memcpy(&rxQueue[head^size], rxDataMsg, sizeof(DelugeDataMsg));
+      if (++size == 1) {
+        publisher_addr = call AMPacket.source(msg);   // For collecting stats
+	writeData();
+      }
+    }
+    
+    return msg;
+  }
+  
+  event void BlockRead.readDone[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len, error_t error)
+  {
+    DelugeDataMsg *pDataMsg = (DelugeDataMsg *)(call SendDataMsg.getPayload(&pMsgBuf, sizeof(DelugeDataMsg)));
+    // make sure this event for us
+    if (buf != pDataMsg->data) {
+      return;
+    }
+    
+    if (state != S_SENDING) {
+      return;
+    }
+    
+    if (error != SUCCESS) {
+      changeState(S_IDLE);
+      return;
+    }
+    
+    if (call SendDataMsg.send(nodeAddr, &pMsgBuf, sizeof(DelugeDataMsg)) != SUCCESS) {
+      call Timer.startOneShot(DELUGE_FAILED_SEND_DELAY);
+    } else {
+// For collecting stats
+//call StatsCollector.startPubPktTransTime();
+//call Leds.led1Toggle();
+    }
+  }
+  
+  event void BlockRead.computeCrcDone[uint8_t img_num](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) { }
+  
+  event void BlockWrite.writeDone[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len, error_t error)
+  {
+    uint16_t tmp;
+    
+    // make sure this event for us
+    if (buf != rxQueue[head].data) {
+      return;
+    }
+    
+    // failed to write
+    if (error != SUCCESS) {
+      uint32_t i;
+      for (i = 0; i < DELUGET2_PKT_BITVEC_SIZE; i++) {
+        pktsToReceive[i] = 0xFF;
+      }
+      size = 0;
+      return;
+    }
+    
+    // mark packet as received
+    BITVEC_CLEAR(pktsToReceive, rxQueue[head].pktNum);
+    head = (head + 1) % DELUGE_QSIZE;
+    size--;
+    
+    if (call BitVecUtils.indexOf(&tmp, 0, pktsToReceive, DELUGET2_PKTS_PER_PAGE) != SUCCESS) {
+// For collecting stats
+//call StatsCollector.endRecvPageTransTime(publisher_addr);
+
+call Leds.led1Off();
+      signal DelugePageTransfer.receivedPage(workingObjid, workingPgNum);
+      changeState(S_IDLE);
+      size = 0;
+    } else if (size) {
+      writeData();
+    }
+  }
+  
+  event void BlockWrite.eraseDone[uint8_t img_num](error_t error) {}
+  event void BlockWrite.syncDone[uint8_t img_num](error_t error) {}
+  
+  command void DelugePageTransfer.setImgNum(uint8_t new_img_num)
+  {
+    imgNum = new_img_num;
+  }
+  
+  default command error_t BlockRead.read[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t BlockWrite.write[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default async command void Leds.led1Toggle() {}
+  default async command void Leds.led1Off() {}
+}
diff --git a/tos/lib/net/Deluge/DelugeVolumeManager.nc b/tos/lib/net/Deluge/DelugeVolumeManager.nc
new file mode 100644
index 00000000..204ab63d
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeVolumeManager.nc
@@ -0,0 +1,41 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+interface DelugeVolumeManager
+{
+  command error_t erase(uint8_t imgNum);
+  event void eraseDone(uint8_t imgNum);
+}
diff --git a/tos/lib/net/Deluge/DelugeVolumeManagerC.nc b/tos/lib/net/Deluge/DelugeVolumeManagerC.nc
new file mode 100644
index 00000000..77896020
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeVolumeManagerC.nc
@@ -0,0 +1,59 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration DelugeVolumeManagerC
+{
+  provides interface DelugeVolumeManager[uint8_t client];
+}
+
+implementation
+{
+  components DelugeVolumeManagerP;
+
+  DelugeVolumeManager = DelugeVolumeManagerP;
+
+  components new BlockWriterC(VOLUME_DELUGE1) as BlockWriterDeluge1;
+  components new BlockWriterC(VOLUME_DELUGE2) as BlockWriterDeluge2;
+  components new BlockWriterC(VOLUME_DELUGE3) as BlockWriterDeluge3;
+
+  DelugeVolumeManagerP.BlockWrite[VOLUME_DELUGE1] -> BlockWriterDeluge1;
+  DelugeVolumeManagerP.BlockWrite[VOLUME_DELUGE2] -> BlockWriterDeluge2;
+  DelugeVolumeManagerP.BlockWrite[VOLUME_DELUGE3] -> BlockWriterDeluge3;
+
+  DelugeVolumeManagerP.Resource[VOLUME_DELUGE1] -> BlockWriterDeluge1;
+  DelugeVolumeManagerP.Resource[VOLUME_DELUGE2] -> BlockWriterDeluge2;
+  DelugeVolumeManagerP.Resource[VOLUME_DELUGE3] -> BlockWriterDeluge3;
+}
diff --git a/tos/lib/net/Deluge/DelugeVolumeManagerClientC.nc b/tos/lib/net/Deluge/DelugeVolumeManagerClientC.nc
new file mode 100644
index 00000000..82767ede
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeVolumeManagerClientC.nc
@@ -0,0 +1,50 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+generic configuration DelugeVolumeManagerClientC()
+{
+  provides interface DelugeVolumeManager;
+}
+
+implementation
+{
+  enum {
+    CLIENT_ID = unique(UQ_DELUGE_VOLUME_MANAGER)
+  };
+
+  components DelugeVolumeManagerC;
+  DelugeVolumeManager = DelugeVolumeManagerC.DelugeVolumeManager[CLIENT_ID];
+}
diff --git a/tos/lib/net/Deluge/DelugeVolumeManagerP.nc b/tos/lib/net/Deluge/DelugeVolumeManagerP.nc
new file mode 100644
index 00000000..1825c7a5
--- /dev/null
+++ b/tos/lib/net/Deluge/DelugeVolumeManagerP.nc
@@ -0,0 +1,81 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module DelugeVolumeManagerP
+{
+  provides interface DelugeVolumeManager[uint8_t client];
+  uses {
+    interface BlockWrite[uint8_t volumeId];
+    interface Resource[uint8_t volumeId];
+  }
+}
+
+implementation
+{
+  uint8_t currentClient;
+  bool busy = FALSE;
+
+  command error_t DelugeVolumeManager.erase[uint8_t client](uint8_t imgNum)
+  {
+    if (busy)
+      return FAIL;
+    busy = call Resource.request[imgNum]() == SUCCESS;
+    if (busy) {
+      currentClient = client;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+
+  event void Resource.granted[uint8_t imgNum]()
+  {
+    call BlockWrite.erase[imgNum]();
+  }
+
+  event void BlockWrite.eraseDone[uint8_t imgNum](error_t error)
+  {
+    busy = FALSE;
+    call Resource.release[imgNum]();
+    signal DelugeVolumeManager.eraseDone[currentClient](error);
+  }
+
+  event void BlockWrite.writeDone[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  event void BlockWrite.syncDone[uint8_t imgNum](error_t error) {}
+  default command error_t BlockWrite.erase[uint8_t imgNum]() { return FAIL; }
+  default event void DelugeVolumeManager.eraseDone[uint8_t client](uint8_t imgNum) {}
+  default async command error_t Resource.request[uint8_t imgNum]() { return FAIL; }
+  default async command error_t Resource.release[uint8_t imgNum]() { return FAIL; }
+}
diff --git a/tos/lib/net/Deluge/FakeBlockReaderC.nc b/tos/lib/net/Deluge/FakeBlockReaderC.nc
new file mode 100644
index 00000000..d0afe175
--- /dev/null
+++ b/tos/lib/net/Deluge/FakeBlockReaderC.nc
@@ -0,0 +1,105 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+generic module FakeBlockReaderC(uint32_t size)
+{
+  provides interface BlockRead;
+}
+
+implementation
+{
+  enum {
+    S_IDLE,
+    S_BUSY
+  };
+
+  storage_addr_t saddr;
+  uint8_t *oribuf;
+  uint8_t *sbuf;
+  storage_len_t slen;
+  uint8_t state = S_IDLE;
+
+  task void task_read()
+  {
+    while (slen > 0) {
+      *sbuf = saddr & 0xFF;
+      saddr++;
+      sbuf++;
+      slen--;
+    }
+
+    signal BlockRead.readDone(saddr, oribuf, slen, SUCCESS);
+    state = S_IDLE;
+  }
+
+  command error_t BlockRead.read(storage_addr_t addr,
+				 void* buf,
+				 storage_len_t len)
+  {
+    if (state != S_IDLE) {
+      return FAIL;
+    }
+
+
+    state = S_BUSY;
+    saddr = addr;
+    sbuf = buf;
+    oribuf = buf;
+    slen = len;
+    post task_read();
+    return SUCCESS;
+  };
+
+  task void task_computeCRC()
+  {
+    signal BlockRead.computeCrcDone(saddr, slen, 0, SUCCESS);
+  }
+
+  command error_t BlockRead.computeCrc(storage_addr_t addr,
+				       storage_len_t len,
+				       uint16_t crc)
+  {
+    saddr = addr;
+    slen = len;
+    post task_computeCRC();
+    return SUCCESS;
+  }
+
+  command storage_len_t BlockRead.getSize()
+  {
+    return size;
+  }
+}
diff --git a/tos/lib/net/Deluge/FakeBlockWriterC.nc b/tos/lib/net/Deluge/FakeBlockWriterC.nc
new file mode 100644
index 00000000..ecd83bcd
--- /dev/null
+++ b/tos/lib/net/Deluge/FakeBlockWriterC.nc
@@ -0,0 +1,49 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+generic configuration FakeBlockWriterC(uint32_t size)
+{
+  provides interface BlockWrite;
+}
+
+implementation
+{
+  components LedsC, NoLedsC,
+             new FakeBlockWriterP(size);
+  
+  BlockWrite = FakeBlockWriterP;
+  FakeBlockWriterP.Leds -> NoLedsC;
+}
diff --git a/tos/lib/net/Deluge/FakeBlockWriterP.nc b/tos/lib/net/Deluge/FakeBlockWriterP.nc
new file mode 100644
index 00000000..9a18dc24
--- /dev/null
+++ b/tos/lib/net/Deluge/FakeBlockWriterP.nc
@@ -0,0 +1,112 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+generic module FakeBlockWriterP(uint32_t size)
+{
+  provides interface BlockWrite;
+  uses interface Leds;
+}
+
+implementation
+{
+  enum {
+    S_IDLE,
+    S_BUSY
+  };
+  
+  storage_addr_t saddr;
+  uint8_t *oribuf;
+  uint8_t *sbuf;
+  storage_len_t slen;
+  uint8_t state;
+  
+  task void task_write()
+  {
+    error_t error = SUCCESS;
+    
+    while (slen > 0) {
+      if (*sbuf != (saddr & 0xFF)) {
+        error = FAIL;
+call Leds.led2Toggle();
+      }
+      saddr++;
+      sbuf++;
+      slen--;
+    }
+    
+    signal BlockWrite.writeDone(saddr, oribuf, slen, error);
+    state = S_IDLE;
+  }
+  
+  command error_t BlockWrite.write(storage_addr_t addr,
+				   void* buf,
+				   storage_len_t len)
+  {
+    if (state != S_IDLE) {
+      return FAIL;
+    }
+    
+    state = S_BUSY;
+    saddr = addr;
+    sbuf = buf;
+    oribuf = buf;
+    slen = len;
+    post task_write();
+    return SUCCESS;
+  }
+  
+  task void task_erase()
+  {
+    signal BlockWrite.eraseDone(SUCCESS);
+  }
+  
+  command error_t BlockWrite.erase()
+  {
+    post task_erase();
+    return SUCCESS;
+  }
+  
+  task void task_sync()
+  {
+    signal BlockWrite.syncDone(SUCCESS);
+  }
+  
+  command error_t BlockWrite.sync()
+  {
+    post task_sync();
+    return SUCCESS;
+  }
+}
diff --git a/tos/lib/net/Deluge/FlashVolumeManager/FlashVolumeManagerC.nc b/tos/lib/net/Deluge/FlashVolumeManager/FlashVolumeManagerC.nc
new file mode 100644
index 00000000..784c947b
--- /dev/null
+++ b/tos/lib/net/Deluge/FlashVolumeManager/FlashVolumeManagerC.nc
@@ -0,0 +1,79 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#include "AM.h"
+#include "StorageVolumes.h"
+
+generic configuration FlashVolumeManagerC(am_id_t AMId) {}
+
+implementation
+{
+  components new SerialAMSenderC(AMId);
+  components new SerialAMReceiverC(AMId);
+  components new FlashVolumeManagerP();
+  components new TimerMilliC() as TimeoutTimer;
+  components NoLedsC, LedsC;
+  components BlockStorageLockC;
+  components new BlockStorageLockClientC();
+
+  components new BlockReaderC(VOLUME_GOLDENIMAGE) as BlockReaderGoldenImage;
+  components new BlockReaderC(VOLUME_DELUGE1)     as BlockReaderDeluge1;
+  components new BlockReaderC(VOLUME_DELUGE2)     as BlockReaderDeluge2;
+  components new BlockReaderC(VOLUME_DELUGE3)     as BlockReaderDeluge3;
+
+  components new BlockWriterC(VOLUME_GOLDENIMAGE) as BlockWriterGoldenImage;
+  components new BlockWriterC(VOLUME_DELUGE1)     as BlockWriterDeluge1;
+  components new BlockWriterC(VOLUME_DELUGE2)     as BlockWriterDeluge2;
+  components new BlockWriterC(VOLUME_DELUGE3)     as BlockWriterDeluge3;
+  
+  FlashVolumeManagerP.BlockRead[VOLUME_GOLDENIMAGE] -> BlockReaderGoldenImage;
+  FlashVolumeManagerP.BlockRead[VOLUME_DELUGE1]     -> BlockReaderDeluge1;
+  FlashVolumeManagerP.BlockRead[VOLUME_DELUGE2]     -> BlockReaderDeluge2;
+  FlashVolumeManagerP.BlockRead[VOLUME_DELUGE3]     -> BlockReaderDeluge3;
+
+  FlashVolumeManagerP.BlockWrite[VOLUME_GOLDENIMAGE] -> BlockWriterGoldenImage;
+  FlashVolumeManagerP.BlockWrite[VOLUME_DELUGE1]     -> BlockWriterDeluge1;
+  FlashVolumeManagerP.BlockWrite[VOLUME_DELUGE2]     -> BlockWriterDeluge2;
+  FlashVolumeManagerP.BlockWrite[VOLUME_DELUGE3]     -> BlockWriterDeluge3;
+
+  FlashVolumeManagerP.Resource -> BlockStorageLockClientC;
+  FlashVolumeManagerP.ArbiterInfo -> BlockStorageLockC;
+ 
+  FlashVolumeManagerP.TimeoutTimer -> TimeoutTimer;
+  FlashVolumeManagerP.SerialAMSender -> SerialAMSenderC;
+  FlashVolumeManagerP.SerialAMReceiver -> SerialAMReceiverC;
+  FlashVolumeManagerP.Leds -> LedsC;
+}
diff --git a/tos/lib/net/Deluge/FlashVolumeManager/FlashVolumeManagerP.nc b/tos/lib/net/Deluge/FlashVolumeManager/FlashVolumeManagerP.nc
new file mode 100644
index 00000000..3777d9fb
--- /dev/null
+++ b/tos/lib/net/Deluge/FlashVolumeManager/FlashVolumeManagerP.nc
@@ -0,0 +1,290 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#include "imgNum2volumeId.h"
+
+generic module FlashVolumeManagerP()
+{
+  uses {
+    interface BlockRead[uint8_t imgNum];
+    interface BlockWrite[uint8_t imgNum];
+    interface Resource;
+    interface ArbiterInfo;
+    interface AMSend as SerialAMSender;
+    interface Receive as SerialAMReceiver;
+    interface Timer<TMilli> as TimeoutTimer;
+    interface Leds;
+  }
+}
+
+implementation
+{
+  typedef nx_struct SerialReqPacket {
+    nx_uint8_t cmd;
+    nx_uint8_t imgNum;
+    nx_uint32_t offset;
+    nx_uint16_t len;
+    nx_uint8_t data[0];
+  } SerialReqPacket;
+  
+  typedef nx_struct SerialReplyPacket {
+    nx_uint8_t error;
+    nx_uint8_t data[0];
+  } SerialReplyPacket;
+
+
+  enum {
+    CMD_ERASE = 0,
+    CMD_WRITE = 1,
+    CMD_READ  = 2,
+    CMD_CRC   = 3,
+    CMD_ADDR  = 4,
+    CMD_SYNC  = 5,
+    CMD_IDENT = 6
+  };
+
+  enum {
+    S_IDLE,
+    S_ERASE,
+    S_WRITE,
+    S_READ,
+    S_CRC,
+    S_REPROG,
+    S_SYNC,
+  };
+  
+  message_t serialMsg;
+  uint8_t buffer[TOSH_DATA_LENGTH];    // Temporary buffer for "write" operation
+  uint8_t currentImgNum = 0xFF;      // Image number to reprogram
+  uint8_t state = S_IDLE;              // Manager state for multiplexing "done" events
+
+  nx_struct ShortIdent {
+    nx_uint8_t name[16];
+    //nx_uint8_t username[16];
+    //nx_uint8_t hostname[16];
+    nx_uint32_t timestamp;
+    nx_uint32_t uidhash;
+    nx_uint16_t nodeid;
+  };
+
+  void sendReply(error_t error, storage_len_t len)
+  {
+    SerialReplyPacket *reply = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket));
+    if (reply == NULL) {
+      return;
+    }
+    reply->error = error;
+    call SerialAMSender.send(AM_BROADCAST_ADDR, &serialMsg, len);
+  }
+  
+  event void BlockRead.readDone[uint8_t imgNum](storage_addr_t addr, 
+				void* buf, 
+				storage_len_t len, 
+				error_t error)
+  {
+    if (state == S_READ) {
+      SerialReplyPacket *reply = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket));
+      if (reply == NULL) {
+	return;
+      }
+      if (buf == reply->data) {
+        state = S_IDLE;
+        sendReply(error, len + sizeof(SerialReplyPacket));
+      }
+    }
+  }
+  
+  event void BlockRead.computeCrcDone[uint8_t imgNum](storage_addr_t addr, 
+				      storage_len_t len, 
+				      uint16_t crc, 
+				      error_t error)
+  {
+    if (state == S_CRC) {
+      state = S_IDLE;
+      
+      if (error == SUCCESS) {
+        SerialReplyPacket *srpkt = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket));
+	if (srpkt == NULL) {
+	  return;
+	}
+        srpkt->data[1] = crc & 0xFF;
+        srpkt->data[0] = (crc >> 8) & 0xFF;
+      }
+      sendReply(error, 2 + sizeof(SerialReplyPacket));
+    }
+  }
+  
+  event void BlockWrite.writeDone[uint8_t imgNum](storage_addr_t addr, 
+				  void* buf, 
+				  storage_len_t len, 
+				  error_t error)
+  {
+    if (state == S_WRITE && buf == buffer) {
+      state = S_IDLE;
+      sendReply(error, sizeof(SerialReplyPacket));
+    }
+  }
+  
+  event void BlockWrite.eraseDone[uint8_t imgNum](error_t error)
+  {
+    if (state == S_ERASE) {
+      call BlockWrite.sync[imgNum]();
+    }
+  }
+  
+  event void BlockWrite.syncDone[uint8_t imgNum](error_t error)
+  {
+    if (state == S_ERASE || state == S_SYNC) {
+      state = S_IDLE;
+      sendReply(error, sizeof(SerialReplyPacket));
+    }
+  }
+  
+ 
+  event message_t* SerialAMReceiver.receive(message_t* msg, void* payload, uint8_t len)
+  {
+    error_t error = SUCCESS;
+    SerialReqPacket *request = (SerialReqPacket *)payload;
+    SerialReplyPacket *reply = (SerialReplyPacket *)call SerialAMSender.getPayload(&serialMsg, sizeof(SerialReplyPacket));
+    nx_struct ShortIdent *shortIdent;
+    uint8_t imgNum = 0xFF;
+
+    if (reply == NULL) {
+      return msg;
+    }
+
+    if (state != S_IDLE) {
+      return msg;
+    }
+
+    // Converts the image number that the user wants to the real image number
+    imgNum = imgNum2volumeId(request->imgNum);
+    
+    if (imgNum != NON_DELUGE_VOLUME) {
+      error = SUCCESS;
+      // We ask for a reservation only for erase and write.
+      switch (request->cmd) {
+	case CMD_ERASE:
+	case CMD_WRITE:
+	  if (!call Resource.isOwner()) {
+	    error = call Resource.immediateRequest();
+	  }
+      }
+      if (error == SUCCESS) {
+	call Leds.led1On();
+	call TimeoutTimer.startOneShot(2*1024);
+	currentImgNum = imgNum;
+	switch (request->cmd) {
+        case CMD_ERASE:    // === Erases a volume ===
+          state = S_ERASE;
+#if defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS) || defined(PLATFORM_EPIC)
+          error = FAIL;
+#else
+          error = call BlockWrite.erase[imgNum]();
+#endif
+          break;
+        case CMD_WRITE:    // === Writes to a volume ===
+          state = S_WRITE;
+          memcpy(buffer, request->data, request->len);
+          error = call BlockWrite.write[imgNum](request->offset,
+						 buffer,
+						 request->len);
+          break;
+        case CMD_READ:     // === Reads a portion of a volume ===
+          state = S_READ;
+          error = call BlockRead.read[imgNum](request->offset,
+					       reply->data,
+					       request->len);
+          break;
+        case CMD_CRC:      // === Computes CRC over a portion of a volume ===
+          state = S_CRC;
+          error = call BlockRead.computeCrc[imgNum](request->offset,
+						     request->len, 0);
+          break;
+        case CMD_SYNC:     // === Sync the flash ===
+          state = S_SYNC;
+          error = call BlockWrite.sync[imgNum]();
+	  break;
+        case CMD_IDENT:
+	  shortIdent = (nx_struct ShortIdent*)&reply->data;
+	  memset(shortIdent, 0, sizeof(nx_struct ShortIdent));
+	  memcpy(shortIdent->name, IDENT_APPNAME, sizeof(IDENT_APPNAME));
+	  //memcpy(shortIdent->username, IDENT_USER_ID, sizeof(IDENT_USER_ID));
+	  //memcpy(shortIdent->hostname, IDENT_HOSTNAME, sizeof(IDENT_HOSTNAME));
+          shortIdent->timestamp = IDENT_TIMESTAMP;
+          shortIdent->uidhash  = IDENT_UIDHASH;
+          shortIdent->nodeid = TOS_NODE_ID;
+	  sendReply(SUCCESS, sizeof(SerialReplyPacket) + sizeof(nx_struct ShortIdent));
+	  break;
+	}
+      } 
+    } else {
+      error = FAIL;
+    }
+    
+    // If a split-phase operation fails when being requested, signals the failure now
+    if (error != SUCCESS) {
+      state = S_IDLE;
+      sendReply(error, sizeof(SerialReplyPacket));
+    }
+    
+    return msg;
+  }
+
+  event void TimeoutTimer.fired()
+  {
+    // Release the resource.
+    if (state == S_IDLE && call Resource.isOwner()) {
+      call Resource.release();
+    }
+    if (state == S_IDLE) {
+      call Leds.led1Off();
+    }
+  }
+
+  event void SerialAMSender.sendDone(message_t* msg, error_t error) {}
+  event void Resource.granted() {}
+
+  default command error_t BlockWrite.write[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t BlockWrite.erase[uint8_t imgNum]() { return FAIL; }
+  default command error_t BlockWrite.sync[uint8_t imgNum]() { return FAIL; }
+  default command error_t BlockRead.read[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t BlockRead.computeCrc[uint8_t imgNum](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; }
+
+  default async command error_t Resource.immediateRequest() { return FAIL; }
+  default async command error_t Resource.release() { return FAIL; }
+  default async command bool Resource.isOwner() { return FAIL; }
+}
diff --git a/tos/lib/net/Deluge/Globals.nc b/tos/lib/net/Deluge/Globals.nc
new file mode 100644
index 00000000..cec27f81
--- /dev/null
+++ b/tos/lib/net/Deluge/Globals.nc
@@ -0,0 +1,67 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+interface Globals
+{
+  command uint32_t getNumPubPktTrans();
+  command void setNumPubPktTrans(uint32_t val);
+  command void incNumPubPktTrans();
+
+  command uint32_t getNumRecvPageTrans();
+  command void setNumRecvPageTrans(uint32_t val);
+  command void incNumRecvPageTrans();
+
+  command uint32_t getAvgPubPktTransTime();
+  command void setAvgPubPktTransTime(uint32_t val);
+
+  command uint32_t getAvgRecvPageTransTime();
+  command void setAvgRecvPageTransTime(uint32_t val);
+
+  command uint32_t getNumPubPktRetrans();
+  command void setNumPubPktRetrans(uint32_t val);
+  command void incNumPubPktRetrans();
+
+  command uint32_t getNumPubHSRetrans();
+  command void setNumPubHSRetrans(uint32_t val);
+  command void incNumPubHSRetrans();
+
+  command uint32_t getNumRecvHSRetrans();
+  command void setNumRecvHSRetrans(uint32_t val);
+  command void incNumRecvHSRetrans();
+
+  command void* _getStartAddr();
+  command uint32_t _getSize();
+}
diff --git a/tos/lib/net/Deluge/GlobalsC.nc b/tos/lib/net/Deluge/GlobalsC.nc
new file mode 100644
index 00000000..4659a688
--- /dev/null
+++ b/tos/lib/net/Deluge/GlobalsC.nc
@@ -0,0 +1,82 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+module GlobalsC
+{
+  provides interface Globals;
+}
+
+implementation
+{
+  struct {
+    uint32_t NumPubPktTrans;
+    uint32_t NumRecvPageTrans;
+    uint32_t AvgPubPktTransTime;
+    uint32_t AvgRecvPageTransTime;
+    uint32_t NumPubPktRetrans;
+    uint32_t NumPubHSRetrans;
+    uint32_t NumRecvHSRetrans;
+  } _g = {0, 0, 0, 0, 0, 0, 0};
+
+  command uint32_t Globals.getNumPubPktTrans() { return _g.NumPubPktTrans; }
+  command void Globals.setNumPubPktTrans(uint32_t val) { _g.NumPubPktTrans = val; }
+  command void Globals.incNumPubPktTrans() { _g.NumPubPktTrans++; }
+
+  command uint32_t Globals.getNumRecvPageTrans() { return _g.NumRecvPageTrans; }
+  command void Globals.setNumRecvPageTrans(uint32_t val) { _g.NumRecvPageTrans = val; }
+  command void Globals.incNumRecvPageTrans() { _g.NumRecvPageTrans++; }
+
+  command uint32_t Globals.getAvgPubPktTransTime() { return _g.AvgPubPktTransTime; }
+  command void Globals.setAvgPubPktTransTime(uint32_t val) { _g.AvgPubPktTransTime = val; }
+
+  command uint32_t Globals.getAvgRecvPageTransTime() { return _g.AvgRecvPageTransTime; }
+  command void Globals.setAvgRecvPageTransTime(uint32_t val) { _g.AvgRecvPageTransTime = val; }
+
+  command uint32_t Globals.getNumPubPktRetrans() { return _g.NumPubPktRetrans; }
+  command void Globals.setNumPubPktRetrans(uint32_t val) { _g.NumPubPktRetrans = val; }
+  command void Globals.incNumPubPktRetrans() { _g.NumPubPktRetrans++; }
+
+  command uint32_t Globals.getNumPubHSRetrans() { return _g.NumPubHSRetrans; }
+  command void Globals.setNumPubHSRetrans(uint32_t val) { _g.NumPubHSRetrans = val; }
+  command void Globals.incNumPubHSRetrans() { _g.NumPubHSRetrans++; }
+
+  command uint32_t Globals.getNumRecvHSRetrans() { return _g.NumRecvHSRetrans; }
+  command void Globals.setNumRecvHSRetrans(uint32_t val) { _g.NumRecvHSRetrans = val; }
+  command void Globals.incNumRecvHSRetrans() { _g.NumRecvHSRetrans++; }
+
+  command void* Globals._getStartAddr() { return &_g; }
+  command uint32_t Globals._getSize() { return sizeof(_g); }
+}
diff --git a/tos/lib/net/Deluge/ObjectTransfer.nc b/tos/lib/net/Deluge/ObjectTransfer.nc
new file mode 100644
index 00000000..9ce25e99
--- /dev/null
+++ b/tos/lib/net/Deluge/ObjectTransfer.nc
@@ -0,0 +1,46 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#include "DelugePageTransfer.h"
+
+interface ObjectTransfer
+{
+  command error_t publish(object_id_t new_objid, object_size_t new_size, uint8_t img_num);
+  command error_t receive(object_id_t new_objid, object_size_t new_size, uint8_t img_num);
+  event void receiveDone(error_t error);
+
+  command error_t stop();
+}
diff --git a/tos/lib/net/Deluge/ObjectTransferC.nc b/tos/lib/net/Deluge/ObjectTransferC.nc
new file mode 100644
index 00000000..af11fd54
--- /dev/null
+++ b/tos/lib/net/Deluge/ObjectTransferC.nc
@@ -0,0 +1,86 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#include "DelugePageTransfer.h"
+#include "StorageVolumes.h"
+
+configuration ObjectTransferC
+{
+  provides interface ObjectTransfer;
+  uses {
+    interface BlockRead[uint8_t img_num];
+    interface BlockWrite[uint8_t img_num];
+    interface Leds;
+  }
+}
+
+implementation
+{
+  components ObjectTransferP, DelugePageTransferC;
+  components CrcC;
+  
+  ObjectTransfer = ObjectTransferP;
+  DelugePageTransferC.BlockRead = BlockRead;
+  DelugePageTransferC.BlockWrite = BlockWrite;
+  ObjectTransferP.DelugePageTransfer -> DelugePageTransferC.DelugePageTransfer;
+  ObjectTransferP.Crc -> CrcC.Crc;
+  
+  components new AMSenderC(AM_DELUGEADVMSG) as SendAdvMsg, 
+             new AMReceiverC(AM_DELUGEADVMSG) as ReceiveAdvMsg,
+             new AMSenderC(AM_DELUGEREQMSG) as SendReqMsg, 
+             new AMReceiverC(AM_DELUGEREQMSG) as ReceiveReqMsg,
+             new AMSenderC(AM_DELUGEDATAMSG) as SendDataMsg, 
+             new AMReceiverC(AM_DELUGEDATAMSG) as ReceiveDataMsg;
+  
+  ObjectTransferP.SendAdvMsg -> SendAdvMsg;
+  ObjectTransferP.ReceiveAdvMsg -> ReceiveAdvMsg;
+  DelugePageTransferC.SendReqMsg -> SendReqMsg;
+  DelugePageTransferC.ReceiveReqMsg -> ReceiveReqMsg;
+  DelugePageTransferC.SendDataMsg -> SendDataMsg;
+  DelugePageTransferC.ReceiveDataMsg -> ReceiveDataMsg;
+  DelugePageTransferC.AMPacket -> SendDataMsg;
+  DelugePageTransferC.Leds = Leds;
+  
+  ObjectTransferP.BlockWrite = BlockWrite;
+  
+  components RandomC, new TimerMilliC() as Timer;
+  ObjectTransferP.Random -> RandomC;
+  ObjectTransferP.Timer -> Timer;
+  
+  // For collecting statistics
+//  components StatsCollectorC;
+//  ObjectTransferP.StatsCollector -> StatsCollectorC.StatsCollector;
+}
diff --git a/tos/lib/net/Deluge/ObjectTransferP.nc b/tos/lib/net/Deluge/ObjectTransferP.nc
new file mode 100644
index 00000000..7a3a4bd0
--- /dev/null
+++ b/tos/lib/net/Deluge/ObjectTransferP.nc
@@ -0,0 +1,344 @@
+/*
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#include "DelugePageTransfer.h"
+#include "DelugeMsgs.h"
+
+module ObjectTransferP
+{
+  provides interface ObjectTransfer;
+  uses {
+    interface Random;
+    interface Timer<TMilli> as Timer;
+    interface DelugePageTransfer;
+    interface Crc;
+    
+    interface AMSend as SendAdvMsg;
+    interface Receive as ReceiveAdvMsg;
+    
+    interface BlockWrite[uint8_t img_num];
+    
+    interface Leds;
+//  interface StatsCollector;
+  }
+}
+
+implementation
+{
+  // States
+  enum {
+    S_ERASE,
+    S_SYNC,
+    S_INITIALIZING_PUB,
+    S_INITIALIZING_RECV,
+    S_STARTED,
+    S_STOPPED,
+  };
+  
+  DelugeAdvTimer advTimers;
+  uint8_t state = S_STOPPED;
+  
+  object_id_t cont_receive_new_objid;
+  object_size_t cont_receive_new_size;
+  uint8_t cont_receive_img_num;
+  
+  message_t pMsgBuf;
+  bool isBusy_pMsgBuf = FALSE;
+  DelugeObjDesc curObjDesc;
+  
+  void updateTimers()
+  {
+    //advTimers.timer = 0;
+  }
+  
+  void setupAdvTimer()
+  {
+    advTimers.timer = (uint32_t)0x1 << (advTimers.periodLog2 - 1);
+    advTimers.timer += call Random.rand16() & (advTimers.timer - 1);
+    advTimers.overheard = 0;
+    
+    call Timer.stop();
+    call Timer.startOneShot(advTimers.timer);
+  }
+  
+  void resetTimer()
+  {
+    if (advTimers.periodLog2 != DELUGE_MIN_ADV_PERIOD_LOG2) {
+      advTimers.periodLog2 = DELUGE_MIN_ADV_PERIOD_LOG2;
+      setupAdvTimer();
+    }
+  }
+  
+  task void signalObjRecvDone()
+  {
+    signal ObjectTransfer.receiveDone(SUCCESS);
+  }
+  
+  void setNextPage()
+  {
+    if (curObjDesc.numPgsComplete < curObjDesc.numPgs) {
+      call DelugePageTransfer.setWorkingPage(curObjDesc.objid, curObjDesc.numPgsComplete);
+      advTimers.newAdvs = DELUGE_NUM_NEWDATA_ADVS_REQUIRED;    
+      advTimers.overheard = 0;
+      resetTimer();
+    } else {
+      call DelugePageTransfer.setWorkingPage(DELUGE_INVALID_OBJID, DELUGE_INVALID_PGNUM);
+      call ObjectTransfer.stop();
+      state = S_SYNC;
+      call BlockWrite.sync[cont_receive_img_num]();
+    }
+  }
+  
+  bool isObjDescValid(DelugeObjDesc* tmpObjDesc)
+  {
+    return (tmpObjDesc->crc == call Crc.crc16(tmpObjDesc, sizeof(object_id_t) + sizeof(page_num_t))
+	    && tmpObjDesc->crc != 0);
+  }
+  
+  void sendAdvMsg(uint16_t addr)
+  {
+    DelugeAdvMsg *pMsg = (DelugeAdvMsg *)(call SendAdvMsg.getPayload(&pMsgBuf, sizeof(DelugeAdvMsg)));
+    if (pMsg == NULL) {
+      return;
+    }
+    if (isBusy_pMsgBuf == FALSE) {
+      pMsg->sourceAddr = TOS_NODE_ID;
+      pMsg->version = DELUGE_VERSION;
+      pMsg->type = DELUGE_ADV_NORMAL;
+     
+      memcpy(&(pMsg->objDesc), &curObjDesc, sizeof(DelugeObjDesc));
+      
+      if (call SendAdvMsg.send(addr, &pMsgBuf, sizeof(DelugeAdvMsg)) == SUCCESS) {
+//call StatsCollector.msg_bcastReq();
+        isBusy_pMsgBuf = TRUE;
+      }
+    }
+  }
+  
+  /**
+   * Starts publisher
+   */
+  command error_t ObjectTransfer.publish(object_id_t new_objid, object_size_t new_size, uint8_t img_num)
+  {
+    call ObjectTransfer.stop();
+//call StatsCollector.startStatsCollector();
+    
+    state = S_INITIALIZING_PUB;
+    curObjDesc.objid = new_objid;
+    curObjDesc.numPgs = ((new_size - 1) / DELUGET2_BYTES_PER_PAGE) + 1;   // Number of pages to transmit
+    curObjDesc.numPgsComplete = curObjDesc.numPgs;   // Publisher doesn't really care about this
+    curObjDesc.crc = call Crc.crc16(&curObjDesc, sizeof(object_id_t) + sizeof(page_num_t));
+    
+    if (state == S_INITIALIZING_PUB) {
+      resetTimer();
+    }
+    state = S_STARTED;
+    
+    call DelugePageTransfer.setImgNum(img_num);
+    call DelugePageTransfer.setWorkingPage(curObjDesc.objid, curObjDesc.numPgs);
+    
+    return SUCCESS;
+  }
+  
+  /**
+   * Resumes the process of preparing the receiver after the target volume is erased
+   */
+  void cont_receive() {
+    state = S_INITIALIZING_RECV;
+    curObjDesc.objid = cont_receive_new_objid;
+    curObjDesc.numPgs = ((cont_receive_new_size - 1) / DELUGET2_BYTES_PER_PAGE) + 1;   // Number of pages to receive
+    curObjDesc.numPgsComplete = 0;
+    curObjDesc.crc = call Crc.crc16(&curObjDesc, sizeof(object_id_t) + sizeof(page_num_t));
+    
+    if (state == S_INITIALIZING_RECV) {
+      resetTimer();
+    }
+    state = S_STARTED;
+    
+    call DelugePageTransfer.setImgNum(cont_receive_img_num);
+    setNextPage();
+  }
+  
+  /**
+   * Starts receiver
+   */
+  command error_t ObjectTransfer.receive(object_id_t new_objid, object_size_t new_size, uint8_t img_num)
+  {
+    error_t error;
+    
+    call ObjectTransfer.stop();
+//call StatsCollector.startStatsCollector();
+    
+    cont_receive_new_objid = new_objid;
+    cont_receive_new_size = new_size;
+    cont_receive_img_num = img_num;
+    
+    error = call BlockWrite.erase[cont_receive_img_num]();
+    if (error == SUCCESS) {
+      state = S_ERASE;
+    }
+    
+    return error;
+  }
+  
+  command error_t ObjectTransfer.stop()
+  {
+    call Timer.stop();
+    call DelugePageTransfer.stop();
+    state = S_STOPPED;
+//call StatsCollector.stopStatsCollector();
+    
+    curObjDesc.objid = DELUGE_INVALID_OBJID;
+    curObjDesc.numPgs = DELUGE_INVALID_PGNUM;
+    curObjDesc.numPgsComplete = DELUGE_INVALID_PGNUM;
+    advTimers.periodLog2 = 0;
+    
+    return SUCCESS;
+  }
+  
+  event void DelugePageTransfer.receivedPage(object_id_t new_objid, page_num_t new_pgNum)
+  {
+//    printf("R: %08lx %d\n", new_objid, new_pgNum);
+    if (new_objid == curObjDesc.objid && new_pgNum == curObjDesc.numPgsComplete) {
+      curObjDesc.numPgsComplete++;
+      curObjDesc.crc = call Crc.crc16(&curObjDesc, sizeof(object_id_t) + sizeof(page_num_t));
+      if (curObjDesc.numPgsComplete < curObjDesc.numPgs) {
+        setNextPage();
+      } else {
+        call DelugePageTransfer.setWorkingPage(curObjDesc.objid, curObjDesc.numPgsComplete);
+        state = S_SYNC;
+        if (call BlockWrite.sync[cont_receive_img_num]() != SUCCESS) {
+          post signalObjRecvDone();
+        }
+      }
+    }
+  }
+  
+  event void BlockWrite.syncDone[uint8_t img_num](error_t error)
+  {
+    if (state == S_SYNC) {
+      post signalObjRecvDone();
+    }
+  }
+  
+  event void DelugePageTransfer.suppressMsgs(object_id_t new_objid)
+  {
+    if (new_objid == curObjDesc.objid) {
+      advTimers.overheard = 1;
+    }
+  }
+  
+  event void SendAdvMsg.sendDone(message_t* msg, error_t error)
+  {
+    isBusy_pMsgBuf = FALSE;
+  }
+  
+  event message_t* ReceiveAdvMsg.receive(message_t* msg, void* payload, uint8_t len)
+  {
+    DelugeAdvMsg *rxAdvMsg = (DelugeAdvMsg*)payload;
+    DelugeObjDesc *cmpObjDesc = &(rxAdvMsg->objDesc);
+    bool isEqual = FALSE;
+ 
+    if (cmpObjDesc->objid != curObjDesc.objid) {
+      return msg;
+    }
+    
+    if (rxAdvMsg->version != DELUGE_VERSION || state != S_STARTED) {
+      return msg;
+    }
+    
+    if (isObjDescValid(&(rxAdvMsg->objDesc)) && state == S_STARTED) {
+      // Their image is larger (They have something we need)
+      if (cmpObjDesc->numPgsComplete > curObjDesc.numPgsComplete) {
+        if ( advTimers.newAdvs == 0 ) {
+          call DelugePageTransfer.dataAvailable(rxAdvMsg->sourceAddr);
+        }
+      }
+      // Their image is smaller (They need something we have)
+      else if (cmpObjDesc->numPgsComplete < curObjDesc.numPgsComplete) {
+        advTimers.newAdvs = DELUGE_NUM_NEWDATA_ADVS_REQUIRED;
+      }      
+      // image is the same
+      else {
+        advTimers.overheard = 1;
+        isEqual = TRUE;
+      }
+      
+      if (!isEqual) {
+        resetTimer();
+      }
+    }
+    
+    return msg;
+  }
+    
+  event void Timer.fired()
+  {    
+    updateTimers();
+    
+    if (advTimers.overheard == 0) {
+      sendAdvMsg(AM_BROADCAST_ADDR);
+    }
+    
+    if (call DelugePageTransfer.isTransferring())
+      advTimers.newAdvs = DELUGE_NUM_NEWDATA_ADVS_REQUIRED;
+    else if (advTimers.newAdvs > 0)
+      advTimers.newAdvs--;
+    
+    if (advTimers.newAdvs == 0 &&
+        advTimers.periodLog2 < DELUGE_MAX_ADV_PERIOD_LOG2) {
+      advTimers.periodLog2++;
+    }
+    
+    setupAdvTimer();
+  }
+  
+  default command error_t BlockWrite.erase[uint8_t img_num]() { return FAIL; }
+  default command error_t BlockWrite.sync[uint8_t img_num]() { return FAIL; }
+  
+  event void BlockWrite.writeDone[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  event void BlockWrite.eraseDone[uint8_t img_num](error_t error)
+  {
+    if (state == S_ERASE) {
+      cont_receive();
+    }
+  }
+}
diff --git a/tos/lib/net/Deluge/ReprogramGuard.nc b/tos/lib/net/Deluge/ReprogramGuard.nc
new file mode 100644
index 00000000..df3ca418
--- /dev/null
+++ b/tos/lib/net/Deluge/ReprogramGuard.nc
@@ -0,0 +1,5 @@
+interface ReprogramGuard
+{
+  command error_t okToProgram();
+  event void okToProgramDone(bool ok);
+}
diff --git a/tos/lib/net/Deluge/SerialStarterC.nc b/tos/lib/net/Deluge/SerialStarterC.nc
new file mode 100644
index 00000000..1fedfa47
--- /dev/null
+++ b/tos/lib/net/Deluge/SerialStarterC.nc
@@ -0,0 +1,44 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+configuration SerialStarterC { }
+
+implementation
+{
+  components SerialActiveMessageC, AutoStarterC;
+  
+  AutoStarterC.SplitControl -> SerialActiveMessageC;
+}
diff --git a/tos/lib/net/Deluge/StatsCollector.nc b/tos/lib/net/Deluge/StatsCollector.nc
new file mode 100644
index 00000000..d959697d
--- /dev/null
+++ b/tos/lib/net/Deluge/StatsCollector.nc
@@ -0,0 +1,53 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+interface StatsCollector
+{
+  command void stopStatsCollector();
+  command void startStatsCollector();
+  command void startPubPktTransTime();
+  command void endPubPktTransTime();
+  command void startRecvPageTransTime(uint8_t channel);
+  command void endRecvPageTransTime(uint8_t senderAddr);
+  command void incPub_numPktRetrans();
+  command void incNumRecvHSRetrans();
+  
+  command void startCCTime();
+  command void endCCTime();
+  
+  command void sendVariableReport(uint32_t value);
+  command void msg_bcastReq();
+}
diff --git a/tos/lib/net/Deluge/StatsCollectorC.nc b/tos/lib/net/Deluge/StatsCollectorC.nc
new file mode 100644
index 00000000..fa8c0ea3
--- /dev/null
+++ b/tos/lib/net/Deluge/StatsCollectorC.nc
@@ -0,0 +1,70 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+configuration StatsCollectorC
+{
+  provides {
+    interface StatsCollector;
+  }
+}
+
+implementation
+{
+  components GlobalsC, StatsCollectorP,
+    new CounterToLocalTimeC(TMilli),
+#ifdef TOSSIM
+    HilTimerMilliC,
+#else
+    new TransformCounterC(TMilli, uint32_t, T32khz, uint16_t, 5, uint32_t) as Transform,
+    Msp430Counter32khzC,
+#endif
+    new TimerMilliC() as Timer;
+
+#ifdef TOSSIM
+    StatsCollectorP.LocalTime -> HilTimerMilliC;
+#else
+  CounterToLocalTimeC.Counter -> Transform;
+  Transform.CounterFrom -> Msp430Counter32khzC;
+  StatsCollectorP.LocalTime -> CounterToLocalTimeC;
+#endif
+  
+  StatsCollectorP.Globals -> GlobalsC.Globals;
+  StatsCollector = StatsCollectorP.StatsCollector;
+  StatsCollectorP.Timer -> Timer;
+  
+  components SerialStarterC, new SerialAMSenderC(0);
+  StatsCollectorP.AMSend -> SerialAMSenderC;
+}
diff --git a/tos/lib/net/Deluge/StatsCollectorP.nc b/tos/lib/net/Deluge/StatsCollectorP.nc
new file mode 100644
index 00000000..0e733da4
--- /dev/null
+++ b/tos/lib/net/Deluge/StatsCollectorP.nc
@@ -0,0 +1,213 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+module StatsCollectorP
+{
+  provides {
+    interface StatsCollector;
+  }
+  uses {
+    interface LocalTime<TMilli> as LocalTime;
+    interface Globals;
+    interface Timer<TMilli> as Timer;
+    interface AMSend;
+  }
+}
+
+implementation
+{
+  enum {
+    TIMER = 0,
+    FORCED_START = 1,
+    FORCED_END = 2
+  };
+  
+  enum {
+    BROADCAST_REQ = 0,
+    START_RECV_DATA = 1,
+    END_RECV_DATA = 2
+  };
+  
+  typedef nx_struct StatsReport {
+    nx_uint8_t text[5];
+    nx_uint32_t NumPubPktTrans;
+    nx_uint32_t NumRecvPageTrans;
+    nx_uint32_t AvgPubPktTransTime;
+    nx_uint32_t AvgRecvPageTransTime;
+    nx_uint32_t NumPubPktRetrans;
+    nx_uint32_t NumRecvHSRetrans;
+  } StatsReport;
+  
+  typedef nx_struct StatusReport {
+    nx_uint8_t text[5];
+    nx_uint8_t flag;
+    nx_uint8_t channel;
+  } StatusReport;
+  
+  typedef nx_struct VariableReport {
+    nx_uint8_t text[5];
+    nx_uint32_t value;
+  } VariableReport;
+  
+  uint32_t startPubTime = 0;
+  uint32_t startRecvTime = 0;
+  uint32_t startCCTime = 0;   // Change channel
+  message_t stats_msg;
+  message_t status_msg;
+  message_t variable_msg;
+ 
+  void startTimer() {
+    if(call Timer.isRunning() == FALSE || call Timer.isOneShot() == TRUE) {
+      call Timer.startPeriodic(5000);
+    }
+  }
+  
+  void stopTimer() {
+    if(call Timer.isRunning() == TRUE) {
+      call Timer.stop();
+    }
+  }
+  
+  void sendStatsReport() {
+    StatsReport *report = (StatsReport *)call AMSend.getPayload(&stats_msg);
+
+    report->text[0] = 's';
+    report->text[1] = 't';
+    report->text[2] = 'a';
+    report->text[3] = 't';
+    report->text[4] = 's';
+    report->NumPubPktTrans = call Globals.getNumPubPktTrans();
+    report->NumRecvPageTrans = call Globals.getNumRecvPageTrans();
+    report->AvgPubPktTransTime = call Globals.getAvgPubPktTransTime();
+    report->AvgRecvPageTransTime = call Globals.getAvgRecvPageTransTime();
+    report->NumPubPktRetrans = call Globals.getNumPubPktRetrans();
+    report->NumRecvHSRetrans = call Globals.getNumRecvHSRetrans();
+    
+    call AMSend.send(AM_BROADCAST_ADDR, &stats_msg, sizeof(StatsReport));
+  }
+  
+  void sendStatusMsg(uint8_t flag, uint8_t channel) {
+    StatusReport *report = (StatusReport *)call AMSend.getPayload(&status_msg);
+    
+    report->text[0] = 's';
+    report->text[1] = 't';
+    report->text[2] = 't';
+    report->text[3] = 'u';
+    report->text[4] = 's';
+    report->flag = flag;
+    report->channel = channel;
+    
+    call AMSend.send(AM_BROADCAST_ADDR, &status_msg, sizeof(StatusReport));
+  }
+  
+  command void StatsCollector.sendVariableReport(uint32_t value) {
+    VariableReport *report = (VariableReport *)call AMSend.getPayload(&variable_msg);
+    
+    report->text[0] = 'r';
+    report->text[1] = 'e';
+    report->text[2] = 'p';
+    report->text[3] = 'r';
+    report->text[4] = 't';
+    report->value = value;
+    
+    call AMSend.send(AM_BROADCAST_ADDR, &variable_msg, sizeof(VariableReport));
+  }
+  
+  command void StatsCollector.msg_bcastReq() {
+    sendStatusMsg(BROADCAST_REQ, CC2420_DEF_CHANNEL);
+  }
+  
+  event void Timer.fired() {
+    sendStatsReport();
+  }
+  
+  event void AMSend.sendDone(message_t* pstats_msg, error_t error) { }
+  
+  command void StatsCollector.startStatsCollector()
+  {
+    startTimer();
+  }
+  
+  command void StatsCollector.stopStatsCollector()
+  {
+    stopTimer();
+    call Timer.startOneShot(500);
+    //sendStatsReport();   // Just in case
+  }
+  
+  command void StatsCollector.startPubPktTransTime()
+  {
+    startPubTime = call LocalTime.get();
+  }
+  command void StatsCollector.endPubPktTransTime()
+  {
+    uint32_t diff = (call LocalTime.get()) - startPubTime;
+    uint32_t temp = (call Globals.getAvgPubPktTransTime()) * (call Globals.getNumPubPktTrans());
+    call Globals.incNumPubPktTrans();
+    call Globals.setAvgPubPktTransTime((temp + diff) / (call Globals.getNumPubPktTrans()));
+  }
+  command void StatsCollector.startRecvPageTransTime(uint8_t channel)
+  {
+    startRecvTime = call LocalTime.get();
+    sendStatusMsg(START_RECV_DATA, channel);
+  }
+  command void StatsCollector.endRecvPageTransTime(uint8_t senderAddr)
+  {
+    uint32_t curTime = call LocalTime.get();
+    uint32_t temp = (call Globals.getAvgRecvPageTransTime()) * (call Globals.getNumRecvPageTrans());
+    call Globals.incNumRecvPageTrans();
+    call Globals.setAvgRecvPageTransTime((temp + (curTime - startRecvTime)) / (call Globals.getNumRecvPageTrans()));
+    sendStatusMsg(END_RECV_DATA, senderAddr);
+  }
+  
+  command void StatsCollector.incPub_numPktRetrans()
+  {
+    call Globals.incNumPubPktRetrans();
+  }
+  
+  command void StatsCollector.startCCTime() {
+    startCCTime = call LocalTime.get();
+  }
+  
+  command void StatsCollector.endCCTime() {
+    uint32_t diff = (call LocalTime.get()) - startCCTime;
+    call StatsCollector.sendVariableReport(diff);
+  }
+  
+  command void StatsCollector.incNumRecvHSRetrans() {
+    call Globals.incNumRecvHSRetrans();
+  }
+}
diff --git a/tos/lib/net/Deluge/StorageMap.nc b/tos/lib/net/Deluge/StorageMap.nc
new file mode 100644
index 00000000..4e6a5636
--- /dev/null
+++ b/tos/lib/net/Deluge/StorageMap.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An abstraction to map volume addresses to physical addresses.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-01-25 00:50:15 $
+ */
+
+interface StorageMap {
+
+  /**
+   * Get the physical address of a volume address.
+   *
+   * @param addr the volume addres.
+   * @return the physical address.
+   */
+  command storage_addr_t getPhysicalAddress( storage_addr_t addr );
+
+}
diff --git a/tos/lib/net/Deluge/extra/NetProg.h b/tos/lib/net/Deluge/extra/NetProg.h
new file mode 100644
index 00000000..1f1e850f
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/NetProg.h
@@ -0,0 +1,59 @@
+// $Id: NetProg.h,v 1.4 2010-06-29 22:07:47 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __NETPROG_H__
+#define __NETPROG_H__
+
+#include "NetProg_platform.h"
+
+#ifndef IDENT_UID_HASH
+#define IDENT_UID_HASH 0
+#endif
+
+static const uint32_t DELUGE_IMAGE_UID = IDENT_UID_HASH;
+/*
+typedef struct NetProg_TOSInfo {
+  uint16_t addr;
+  uint8_t  groupId;
+  uint16_t crc;
+} NetProg_TOSInfo;
+*/
+#endif
diff --git a/tos/lib/net/Deluge/extra/NetProg.nc b/tos/lib/net/Deluge/extra/NetProg.nc
new file mode 100644
index 00000000..81ddb6b1
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/NetProg.nc
@@ -0,0 +1,66 @@
+// $Id: NetProg.nc,v 1.4 2010-06-29 22:07:47 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Top level interface for network programming integration with
+ * applications.
+ *
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+interface NetProg
+{
+
+  /**
+   * Reboot the node.
+   *
+   * @return  Does not return.
+   */
+  command error_t reboot();
+
+  /**
+   * Reboot into the image specified by <code>imageAddr</code>. This
+   * assumes that an image is present into the external flash
+   * at the <code>imageAddr</code> address.
+   *
+   * @param imageAddr  Address in external flash
+   * @return        <code>FAIL</code> if the reboot command fails to 
+   *                complete, does not return, otherwise.
+   */
+  command error_t programImageAndReboot(uint32_t imageAddr);
+
+}
diff --git a/tos/lib/net/Deluge/extra/NetProgC.nc b/tos/lib/net/Deluge/extra/NetProgC.nc
new file mode 100644
index 00000000..94e3d63f
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/NetProgC.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+includes NetProg;
+includes TOSBoot;
+
+configuration NetProgC {
+  provides {
+    interface NetProg;
+  }
+}
+
+implementation {
+
+  components MainC, InternalFlashC as IFlash, CrcC;
+  components NetProgM, ReprogramGuardC;
+
+  NetProg = NetProgM;
+
+  MainC.SoftwareInit -> NetProgM.Init;
+  NetProgM.IFlash -> IFlash;
+  NetProgM.Crc -> CrcC;
+  NetProgM.ReprogramGuard -> ReprogramGuardC;
+
+  components LedsC;
+  NetProgM.Leds -> LedsC;
+  
+  components ActiveMessageAddressC;
+  NetProgM.setAmAddress -> ActiveMessageAddressC;
+
+#if !defined(PLATFORM_TINYNODE) && !defined(PLATFORM_MULLE)
+  components CC2420ControlP;
+  NetProgM.CC2420Config -> CC2420ControlP;
+#endif
+}
diff --git a/tos/lib/net/Deluge/extra/NetProgM.nc b/tos/lib/net/Deluge/extra/NetProgM.nc
new file mode 100644
index 00000000..37e818b3
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/NetProgM.nc
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "AM.h"
+
+module NetProgM {
+  provides {
+    interface NetProg;
+    interface Init;
+  }
+  uses {
+    interface InternalFlash as IFlash;
+    interface Crc;
+    interface Leds;
+#if !defined(PLATFORM_TINYNODE) && !defined(PLATFORM_MULLE)
+    interface CC2420Config;
+#endif
+    async command void setAmAddress(am_addr_t a);
+    interface ReprogramGuard;
+  }
+}
+
+implementation {
+
+  uint32_t reprogramImgAddr;
+
+  command error_t Init.init()
+  {
+    BootArgs bootArgs;
+    call IFlash.read(TCAST(uint8_t* COUNT(sizeof(bootArgs)),TOSBOOT_ARGS_ADDR), &bootArgs, sizeof(bootArgs));
+
+    // Update the local node ID
+    if (bootArgs.address != 0xFFFF) {
+      TOS_NODE_ID = bootArgs.address;
+      call setAmAddress(bootArgs.address);
+    }
+#if !defined(PLATFORM_TINYNODE) && !defined(PLATFORM_MULLE)
+    call CC2420Config.setShortAddr(bootArgs.address);
+    call CC2420Config.sync();
+#endif    
+    return SUCCESS;
+  }
+  
+  command error_t NetProg.reboot()
+  {
+    BootArgs bootArgs;
+
+    atomic {
+      call IFlash.read(TCAST(uint8_t* COUNT(sizeof(bootArgs)),TOSBOOT_ARGS_ADDR), &bootArgs, sizeof(bootArgs));
+
+      if (bootArgs.address != TOS_NODE_ID) {
+	bootArgs.address = TOS_NODE_ID;
+	call IFlash.write(TCAST(uint8_t* COUNT(sizeof(bootArgs)),TOSBOOT_ARGS_ADDR), &bootArgs, sizeof(bootArgs));
+      }
+      netprog_reboot();
+    }
+
+    return FAIL;
+  }
+  
+  command error_t NetProg.programImageAndReboot(uint32_t imgAddr)
+  {
+    reprogramImgAddr = imgAddr;
+    return call ReprogramGuard.okToProgram();
+  }
+
+  event void ReprogramGuard.okToProgramDone(bool ok)
+  {
+    BootArgs bootArgs;
+
+    if (!ok) {
+      // The voltage is too low. Nothing to do.
+      return;
+    }
+
+    atomic {
+      call IFlash.read(TCAST(uint8_t* COUNT(sizeof(bootArgs)),TOSBOOT_ARGS_ADDR), &bootArgs, sizeof(bootArgs));
+      
+      bootArgs.imageAddr = reprogramImgAddr;
+      bootArgs.gestureCount = 0xff;
+      bootArgs.noReprogram = FALSE;
+      bootArgs.address = TOS_NODE_ID;
+
+      call IFlash.write(TCAST(uint8_t* COUNT(sizeof(bootArgs)),TOSBOOT_ARGS_ADDR), &bootArgs, sizeof(bootArgs));
+
+      // reboot
+      netprog_reboot();
+    }
+  }
+
+#if !defined(PLATFORM_TINYNODE) && !defined(PLATFORM_MULLE)
+  event void CC2420Config.syncDone(error_t error) {}
+#endif
+}
diff --git a/tos/lib/net/Deluge/extra/TOSBoot.h b/tos/lib/net/Deluge/extra/TOSBoot.h
new file mode 100644
index 00000000..15da7941
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/TOSBoot.h
@@ -0,0 +1,50 @@
+// $Id: TOSBoot.h,v 1.3 2010-06-29 22:07:47 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author  Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __TOSBOOT_H__
+#define __TOSBOOT_H__
+
+#include "TOSBoot_platform.h"
+
+typedef struct tosboot_args_t {
+  uint32_t imageAddr;
+  uint8_t  gestureCount;
+  bool     noReprogram;
+} tosboot_args_t;
+
+#endif
diff --git a/tos/lib/net/Deluge/extra/avr/InternalFlashC.nc b/tos/lib/net/Deluge/extra/avr/InternalFlashC.nc
new file mode 100644
index 00000000..97d32db9
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/avr/InternalFlashC.nc
@@ -0,0 +1,76 @@
+// $Id: InternalFlashC.nc,v 1.3 2010-06-29 22:07:47 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#include "InternalFlash.h"
+
+module InternalFlashC {
+  provides interface InternalFlash;
+}
+
+implementation {
+
+  command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) {
+
+    uint8_t *addrPtr = (uint8_t*)addr;
+    uint8_t *bufPtr = (uint8_t*)buf;
+
+    for ( ; size; size-- )
+      eeprom_write_byte(addrPtr++, *bufPtr++);
+
+    while(!eeprom_is_ready());
+
+    return SUCCESS;
+
+  }
+
+  command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) {
+
+    uint8_t *addrPtr = (uint8_t*)addr;
+    uint8_t *bufPtr = (uint8_t*)buf;
+
+    for ( ; size; size-- )
+      *bufPtr++ = eeprom_read_byte(addrPtr++);
+
+    return SUCCESS;
+
+  }
+
+}
diff --git a/tos/lib/net/Deluge/extra/epic/TOSBoot_platform.h b/tos/lib/net/Deluge/extra/epic/TOSBoot_platform.h
new file mode 100644
index 00000000..09bbe8b0
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/epic/TOSBoot_platform.h
@@ -0,0 +1,49 @@
+// $Id: TOSBoot_platform.h,v 1.2 2010-06-29 22:07:47 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author  Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __TOSBOOT_PLATFORM_H__
+#define __TOSBOOT_PLATFORM_H__
+
+enum {
+  TOSBOOT_ARGS_ADDR = 0x70,       // address of TOSBoot args in internal flash
+  TOSBOOT_GESTURE_MAX_COUNT = 3,  // number of resets to force golden image
+  TOSBOOT_GOLDEN_IMG_ADDR = 0x0L, // address of the golden image in external flash
+  TOSBOOT_INT_PAGE_SIZE = 512L,   // size of each internal program flash page
+};
+
+#endif
diff --git a/tos/lib/net/Deluge/extra/iris/NetProgC.nc b/tos/lib/net/Deluge/extra/iris/NetProgC.nc
new file mode 100644
index 00000000..ab588727
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/iris/NetProgC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+includes NetProg;
+includes TOSBoot;
+
+configuration NetProgC {
+  provides {
+    interface NetProg;
+  }
+}
+
+implementation {
+
+  components MainC, InternalFlashC as IFlash, CrcC, NetProgM;
+
+  NetProg = NetProgM;
+
+  MainC.SoftwareInit -> NetProgM.Init;
+  NetProgM.IFlash -> IFlash;
+  NetProgM.Crc -> CrcC;
+
+  components LedsC;
+  NetProgM.Leds -> LedsC;
+
+  components ActiveMessageAddressC;
+  NetProgM.setAmAddress -> ActiveMessageAddressC;
+}
diff --git a/tos/lib/net/Deluge/extra/iris/NetProgM.nc b/tos/lib/net/Deluge/extra/iris/NetProgM.nc
new file mode 100644
index 00000000..b2319729
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/iris/NetProgM.nc
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "AM.h"
+
+module NetProgM {
+  provides {
+    interface NetProg;
+    interface Init;
+  }
+  uses {
+    interface InternalFlash as IFlash;
+    interface Crc;
+    interface Leds;
+    async command void setAmAddress(am_addr_t a);
+  }
+}
+
+implementation {
+
+  command error_t Init.init()
+  {
+    BootArgs bootArgs;
+    call IFlash.read((uint8_t*)TOSBOOT_ARGS_ADDR, &bootArgs, sizeof(bootArgs));
+
+    // Update the local node ID
+    if (bootArgs.address != 0xFFFF) {
+      TOS_NODE_ID = bootArgs.address;
+      call setAmAddress(bootArgs.address);
+    }
+
+    return SUCCESS;
+  }
+
+  command error_t NetProg.reboot()
+  {
+    BootArgs bootArgs;
+
+    atomic {
+      call IFlash.read((uint8_t*)TOSBOOT_ARGS_ADDR, &bootArgs, sizeof(bootArgs));
+
+      if (bootArgs.address != TOS_NODE_ID) {
+	bootArgs.address = TOS_NODE_ID;
+	call IFlash.write((uint8_t*)TOSBOOT_ARGS_ADDR, &bootArgs, sizeof(bootArgs));
+      }
+      netprog_reboot();
+    }
+
+    return FAIL;
+  }
+
+  command error_t NetProg.programImageAndReboot(uint32_t imgAddr)
+  {
+    BootArgs bootArgs;
+
+    atomic {
+      call IFlash.read((uint8_t*)TOSBOOT_ARGS_ADDR, &bootArgs, sizeof(bootArgs));
+
+      bootArgs.imageAddr = imgAddr;
+      bootArgs.gestureCount = 0xff;
+      bootArgs.noReprogram = FALSE;
+      bootArgs.address = TOS_NODE_ID;
+
+      call IFlash.write((uint8_t*)TOSBOOT_ARGS_ADDR, &bootArgs, sizeof(bootArgs));
+
+      // reboot
+      netprog_reboot();
+    }
+
+    // couldn't reboot
+    return FAIL;
+  }
+
+}
diff --git a/tos/lib/net/Deluge/extra/m16c62p/HplM16c62pFlash.nc b/tos/lib/net/Deluge/extra/m16c62p/HplM16c62pFlash.nc
new file mode 100644
index 00000000..1dba5f37
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/m16c62p/HplM16c62pFlash.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Interface to access the program flash of the M16c/62p mcu.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+interface HplM16c62pFlash
+{
+  /**
+   * Erases a block in the program flash.
+   *
+   * @param block The block that should be erased.
+   * @return SUCCESS if the erase succeeded without errors else FAIL.
+   */
+  command error_t erase(unsigned char block);
+  
+  /**
+   * Writes bytes into the program flash.
+   *
+   * @param flash_addr The program flash address where the write should begin. This MUST be an EVEN address.
+   * @param buffer_addr The bytes that should be written to the address.
+   * @param bytes The number of bytes that should be written. This MUST be an EVEN number.
+   * @return FAIL if the flash control reported an error. EINVAL if the parameters that where passed contained an error
+   * 		 if everything went ok it returns SUCCESS.
+   */
+  command error_t write(unsigned long flash_addr_in,
+                        unsigned int* buffer_addr,
+                        unsigned int bytes);
+                              
+  /**
+   * Reads the byte at am address using a LDE instruction.
+   *
+   * @param address The address that a byte should be read from.
+   * @return Byte read.
+   */
+  command uint8_t read(unsigned long flash_addr_in);
+}
diff --git a/tos/lib/net/Deluge/extra/m16c62p/HplM16c62pFlashC.nc b/tos/lib/net/Deluge/extra/m16c62p/HplM16c62pFlashC.nc
new file mode 100644
index 00000000..173f4c2b
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/m16c62p/HplM16c62pFlashC.nc
@@ -0,0 +1,268 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "M16c62pFlash.h"
+#include "iom16c62p.h"
+/**
+ * Implementation of the HplM16c62pFlash interface. Note that this module
+ * should be used with caution so that one doesn't erase the flash where the
+ * executing program lies.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Renesas
+ */
+// TODO(henrik) This implementation expects a main clock speed <=10 MHz, fix it.
+module HplM16c62pFlashC
+{
+  provides interface HplM16c62pFlash;
+}
+implementation
+{
+
+  // Defines an array of highest even addresses for each block
+  const unsigned long block_addresses[14] =
+  {0xFFFFE,0xFEFFE,0xFDFFE,0xFBFFE,0xF9FFE,0xF7FFE,0xEFFFE,0xDFFFE,0xCFFFE,
+    0xBFFFE,0xAFFFE,0x9FFFE,0x8FFFE,0xFFFE };
+
+  unsigned char cm0_saved; // For saving the Clock Mode 0 register
+  unsigned char cm1_saved; // For saving the Clock Mode 1 register
+  unsigned char pm0_saved; // For saving the Processor Mode 0 register
+  unsigned char pm1_saved; // For saving the Processor Mode 1 register
+  unsigned char prcr_saved; //  Save Protection register
+
+  /**   
+   * Sets the processor mode for programming flash and saves current
+   * settings to restore later. You cannot run the processor faster
+   * than 10.0 MHz (with wait state) or 6.25MHz (without wait state)
+   * when sending commands to the flash controller.
+   */
+  void slowMCUClock(void)
+  {
+    // Unprotect registers CM0 and CM1 and PM0 registers by writting to protection register
+    prcr_saved = *((char *)0xA); // Save Protection register
+    *((char *)0xA) = 3; // Allow writting to protected system registers
+    // Force to Single chip mode for processors that have memory expansion mode
+    pm0_saved = *((char *)0x4); // Save pm0 register
+    *((char *)0x4) = pm0_saved & 0xFC; // bit 0 and 1 to zero
+
+    cm0_saved = *((char *)0x6); // Save cm0 register
+    cm1_saved = *((char *)0x7); // Save cm1 register
+    pm1_saved = *((char *)0x5); // Save pm1 register
+
+    // Insert Wait state for all bus access (needed for talking to the
+    // internal flash controller)
+    asm("BSET	7,0x05"); // Set bit PM17
+    CM0.BYTE = 0;
+    CM1.BYTE = 0;
+
+  }
+
+  /**
+   * Restores the processor mode back to original settings.
+   */
+  void restoreMCUClock(void)
+  {
+    *((char *)0x4) = pm0_saved; // Restore pm0 register
+
+    /* Clock settings for R8C and M16C */
+    *((char *)0x7) = cm1_saved;   // Restore cm1 register
+    *((char *)0x6) = cm0_saved;   // Restore cm0 register
+    *((char *)0x5) = pm1_saved;   // Restore pm1 register
+    *((char *)0xA) = prcr_saved;  // Protection back on
+  }
+
+/**
+ * Disable and enable interrups macros. A call to
+ * disableInterrupt must be followed by a call to RestoreInterrupt.
+ */
+#define disableInterrupt() \
+    { \
+		__nesc_atomic_t flg_saved; \
+		asm volatile ("stc flg, %0": "=r"(flg_saved): : "%flg"); \
+		asm("fclr i"); \
+		asm volatile("" : : : "memory");
+
+#define restoreInterrupt() \
+    asm volatile("" : : : "memory"); \
+    asm volatile ("ldc %0, flg": : "r"(flg_saved): "%flg"); \
+  }
+
+  void clearStatus(unsigned long addr)
+  {
+    unsigned int low = (unsigned int) addr;
+    unsigned int high = (unsigned int)( addr >> 16);
+
+    asm volatile (
+        "mov.w #0x0050, r3\n\t"
+        "ste.w r3, [a1a0]\n\t"
+        :
+        : "Ra0"(low), "Ra1"(high)
+        : "memory", "r3");
+  }
+
+  bool writeWord(unsigned long addr, unsigned int word)
+  {
+    unsigned int low = (unsigned int) addr;
+    unsigned int high = (unsigned int)( addr >> 16);
+
+    asm volatile (
+        "mov.w #0x0040, r3\n\t" // Send write command
+        "ste.w r3, [a1a0]\n\t"
+        "ste.w %[data], [a1a0]\n\t"
+        :
+        :"Ra0"(low), "Ra1" (high), [data] "r" (word)
+        : "memory", "r3");
+    return !FMR0.BIT.FMR06;
+  }
+
+  command error_t HplM16c62pFlash.erase( unsigned char block )
+  {
+    unsigned int low = (unsigned int) block_addresses[ block ];
+    unsigned int high = (unsigned int)( block_addresses[ block ] >> 16);
+
+    // Must change main clock speed to meet flash requirements
+    disableInterrupt();
+    slowMCUClock();
+    FMR0.BIT.FMR01 = 0;
+    FMR0.BIT.FMR01 = 1;
+    FMR1.BIT.FMR11 = 0;
+    FMR1.BIT.FMR11 = 1;
+    FMR0.BIT.FMR02 = 0;
+    FMR0.BIT.FMR02 = 1;
+
+    asm volatile (
+        "mov.w #0x0050, r3\n\t" // Clear status register
+        "ste.w r3, [a1a0]\n\t"
+
+        "mov.w #0x0020, r3\n\t" // Block Erase 1(2)
+        "ste.w r3, [a1a0]\n\t"
+
+        "mov.w #0x00D0, r3\n\t" // Block Erase 2(2)
+        "ste.w r3, [a1a0]\n\t"
+        :
+        : "Ra0"(low), "Ra1"(high)
+        : "memory", "r3");
+
+    // Note: In EW1 Mode, the MCU is suspended until the operation is completed.
+    while (!FMR0.BIT.FMR00);
+    // Disable CPU rewriting commands by clearing EW entry bit.
+    FMR0.BYTE = 0;
+
+    restoreMCUClock(); // Restore clock back to original speed
+    restoreInterrupt();
+    if( FMR0.BIT.FMR07) // Erasing error?
+    {
+      return FAIL;  // Erase Fail
+    }
+    return SUCCESS;  // Erase Pass
+  }
+
+  command uint8_t HplM16c62pFlash.write( unsigned long flash_addr,
+      unsigned int * buffer_addr,
+      unsigned int bytes)
+  {
+    error_t ret_value = SUCCESS;
+    unsigned int i;
+    // Check for odd number of bytes &c heck for odd address 
+    if( bytes & 1 || (int)flash_addr & 1)
+      return EINVAL; // ERROR!! You must always pass an even number of bytes.
+
+
+    disableInterrupt();
+    // Must change main clock speed to meet flash requirements
+    slowMCUClock();
+
+    FMR0.BIT.FMR01 = 0;
+    FMR0.BIT.FMR01 = 1;
+    FMR1.BIT.FMR11 = 0;
+    FMR1.BIT.FMR11 = 1;
+    FMR0.BIT.FMR02 = 0;
+    FMR0.BIT.FMR02 = 1;
+
+    // Clear status register
+    clearStatus(flash_addr);
+
+    for (i = 0; i < (bytes >> 1); ++i)
+    {
+      // Write to the flash sequencer by writing to that area of flash memory
+      if (!writeWord(flash_addr, buffer_addr[i]))
+      {
+        uint8_t j;
+        bool fail = 1;
+
+        clearStatus(flash_addr);
+        for (j = 0; j < 3; ++j)
+        {
+          if (writeWord(flash_addr, buffer_addr[i]))
+          {
+            fail = 0;
+            break;
+          }
+        }
+        if (fail)
+        {
+          ret_value = FAIL; // Signal that we had got an error
+          break; // Break out of for loop
+        }
+      }
+
+      flash_addr += 2; // Advance to next flash write address
+    }
+    // Disable CPU rewriting commands by clearing EW entry bit
+    FMR0.BYTE = 0;
+    restoreMCUClock(); // Restore clock back to original speed
+    restoreInterrupt();
+    return ret_value; // Return Pass/Fail
+  }
+
+  command uint8_t HplM16c62pFlash.read(unsigned long address) {
+    unsigned int low = (unsigned int)(address);
+    unsigned int high = (unsigned int)(address >> 16);
+    unsigned int data;
+    disableInterrupt();
+    asm volatile (
+    	"mov.w #0x00FF, r3\n\t" // Read Array Command, once is enough but to be certain that
+    							// a Read Array Command has been executed do it before every
+    							// read for now.
+        "ste.w r3, [a1a0]\n\t"
+        "lde.w [a1a0], %[data]"
+        :[data] "=r" (data)
+        :"Ra0"(low), "Ra1"(high)
+        : "memory", "r3");
+    restoreInterrupt();
+    return data;
+  }
+}
diff --git a/tos/lib/net/Deluge/extra/m16c62p/InternalFlashC.nc b/tos/lib/net/Deluge/extra/m16c62p/InternalFlashC.nc
new file mode 100644
index 00000000..71a2a4e4
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/m16c62p/InternalFlashC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Wiring so that the M16c/62p InternalFlashP module gets access to the 
+ * HplM16c62pFlashC module.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+configuration InternalFlashC
+{
+  provides interface InternalFlash;
+}
+implementation
+{
+  components HplM16c62pFlashC, new InternalFlashP(M16C62P_BLOCK_2, M16C62P_BLOCK_3);
+  InternalFlashP.Flash -> HplM16c62pFlashC;
+  InternalFlash = InternalFlashP;
+}
\ No newline at end of file
diff --git a/tos/lib/net/Deluge/extra/m16c62p/InternalFlashP.nc b/tos/lib/net/Deluge/extra/m16c62p/InternalFlashP.nc
new file mode 100644
index 00000000..18c6be66
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/m16c62p/InternalFlashP.nc
@@ -0,0 +1,239 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "M16c62pFlash.h"
+
+/**
+ * Implementation of the InternalFlash interface for the
+ * M16c/62p mcu to be used as the TOSBoot arguments storage.
+ * 
+ * The implementation uses 2 flash blocks to store the arguments into. First one
+ * block is filled up or written to until a error occurs. After that the second block
+ * will be written to. Everytime the start address of one block is written to the
+ * otherone will be erased. If a erase is not executed due to powerdown or some other
+ * error a erase command will be executed on that block the next time.
+ * 
+ * A argument writing is surrounded by two 0x1 bytes:
+ * 0x1 [arguments data] 0x1. The first byte indicating a new TOSBoot argument entry
+ * and the last one indicating a successfull write of a TOSBoot argument to the flash.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+generic module InternalFlashP(M16C62P_BLOCK block1, M16C62P_BLOCK block2)
+{
+  provides interface InternalFlash;
+
+  uses interface HplM16c62pFlash as Flash;
+}
+
+implementation
+{
+
+#define INTERNAL_ADDRESS_1 m16c62p_block_start_addresses[block1]
+#define INTERNAL_ADDRESS_1_END m16c62p_block_end_addresses[block1]
+
+#define INTERNAL_ADDRESS_2 m16c62p_block_start_addresses[block2]
+#define INTERNAL_ADDRESS_2_END m16c62p_block_end_addresses[block2]
+
+#define INTERNAL_BLOCK_1 block1
+#define INTERNAL_BLOCK_2 block2
+
+  void sanityCheck(uint16_t size)
+  {
+    if (call Flash.read(INTERNAL_ADDRESS_1) != 0xff &&
+        call Flash.read(INTERNAL_ADDRESS_2) != 0xff)
+    {
+      // Something happened last time we wrote with a erase command
+      // that should have been executet or failed.
+      if (call Flash.read(INTERNAL_ADDRESS_1+size+2) != 0x1)
+      {
+        if (call Flash.read(INTERNAL_ADDRESS_1+size+1) == 0x1)
+        {
+          call Flash.erase(INTERNAL_BLOCK_2);
+        }
+        else
+        {
+          call Flash.erase(INTERNAL_BLOCK_1);
+        }
+      }
+      else
+      {
+        if (call Flash.read(INTERNAL_ADDRESS_2+size+1) == 0x1)
+        {
+          call Flash.erase(INTERNAL_BLOCK_1);
+        }
+        else
+        {
+          call Flash.erase(INTERNAL_BLOCK_2);
+        }
+      }
+    }
+  }
+
+  error_t writableAddressInBlock(unsigned long start, unsigned long end, uint16_t size, unsigned long* address)
+  {
+    for(; (start < end) && (start+size < end); start += (unsigned long)size)
+    {
+      if (call Flash.read(start) == 0xFF)
+      {
+        if (call Flash.read(start-1) != 0x1)
+        {
+          return FAIL;
+        }
+        *address = start;
+        return SUCCESS;
+      }
+    }
+    return FAIL;
+  }
+
+  unsigned long writableAddress(uint16_t size)
+  {
+    if (call Flash.read(INTERNAL_ADDRESS_1) == 0xFF)
+    {
+      if (call Flash.read(INTERNAL_ADDRESS_2) == 0xFF)
+      {
+        return INTERNAL_ADDRESS_1;
+      }
+      else
+      {
+        unsigned long address;
+        if (writableAddressInBlock(INTERNAL_ADDRESS_2, INTERNAL_ADDRESS_2_END, size+2, &address) == SUCCESS)
+        {
+          return address;
+        }
+        return INTERNAL_ADDRESS_1;
+      }
+    }
+    else
+    {
+      unsigned long address;
+      if (writableAddressInBlock(INTERNAL_ADDRESS_1, INTERNAL_ADDRESS_1_END, size+2, &address) == SUCCESS)
+      {
+        return address;
+      }
+      return INTERNAL_ADDRESS_2;
+    }
+  }
+
+  command error_t InternalFlash.write(void* addr, void* buf, uint16_t size)
+  {
+    uint8_t wbuf[sizeof(BootArgs)+2];
+    unsigned long address;
+
+    sanityCheck(size);
+
+    wbuf[0] = 0x1;
+    wbuf[size+1] = 0x1;
+    memcpy(wbuf+1, buf, size);
+
+    address = writableAddress(size);
+    if (call Flash.write(address, (unsigned int*)wbuf, size+2) != 0)
+    {
+      return FAIL;
+    }
+    if (address == INTERNAL_ADDRESS_1)
+    {
+      return call Flash.erase(INTERNAL_BLOCK_2);
+    }
+    else if (address == INTERNAL_ADDRESS_2)
+    {
+      return call Flash.erase(INTERNAL_BLOCK_1);
+    }
+    return SUCCESS;
+  }
+
+  void readFromFlash(unsigned long address, uint8_t* buf, uint16_t size)
+  {
+    uint16_t i;
+    for (i = 0; i < size; ++i, ++address)
+    {
+      buf[i] = call Flash.read(address);
+    }
+  }
+
+  void readFromBlock(unsigned long start, unsigned long end, uint8_t *buffer, uint16_t size)
+  {
+    unsigned long address = start;
+    for (; address < end; address += 2 + size)
+    {
+      if (call Flash.read(address) != 0x1)
+      {
+        break;
+      }
+    }
+
+    for (; address > start; address -= size + 2)
+    {
+      if(call Flash.read(address+size+1) == 0x1)
+      {
+        break;
+      }
+    }
+    if(call Flash.read(address+size+1) == 0x1)
+    {
+      address++;
+      readFromFlash(address, buffer, size);
+    }
+    else
+    {
+      memset(buffer, 0xff, size);
+    }
+  }
+
+  command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) 
+  {
+    uint8_t* buffer = (uint8_t*)buf;
+
+    sanityCheck(size);
+    if (call Flash.read(INTERNAL_ADDRESS_1) == 0xFF)
+    {
+      if (call Flash.read(INTERNAL_ADDRESS_2) == 0xFF)
+      {
+        memset(buf, 0xff, size);
+      }
+      else
+      {
+        readFromBlock(INTERNAL_ADDRESS_2, INTERNAL_ADDRESS_2_END, buffer, size);
+      }
+    }
+    else
+    {
+      readFromBlock(INTERNAL_ADDRESS_1, INTERNAL_ADDRESS_1_END, buffer, size);
+    }
+    return SUCCESS;
+  }
+}
diff --git a/tos/lib/net/Deluge/extra/m16c62p/M16c62pFlash.h b/tos/lib/net/Deluge/extra/m16c62p/M16c62pFlash.h
new file mode 100644
index 00000000..e3532ba6
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/m16c62p/M16c62pFlash.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Defines for the program flash blocks.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Renesas
+ */
+ 
+#ifndef __M16C62PFLASH_H__
+#define __M16C62PFLASH_H__
+
+// User Block Area
+typedef enum
+{
+M16C62P_BLOCK_0 = 0,		//  4KB: 0xFF000 - 0xFFFFF
+M16C62P_BLOCK_1 = 1,		//  4KB: 0xFE000 - 0xFEFFF
+M16C62P_BLOCK_2 = 2,		//  8KB: 0xFC000 - 0xFDFFF
+M16C62P_BLOCK_3 = 3,		//  8KB: 0xFA000 - 0xFBFFF
+M16C62P_BLOCK_4 = 4,		//  8KB: 0xF8000 - 0xF9FFF
+M16C62P_BLOCK_5 = 5,		// 32KB: 0xF0000 - 0xF7FFF
+M16C62P_BLOCK_6 = 6,		// 64KB: 0xE0000 - 0xEFFFF
+M16C62P_BLOCK_7 = 7,		// 64KB: 0xD0000 - 0xDFFFF
+M16C62P_BLOCK_8 = 8,		// 64KB: 0xC0000 - 0xCFFFF
+M16C62P_BLOCK_9 = 9,		// 64KB: 0xB0000 - 0xBFFFF
+M16C62P_BLOCK_10 = 10,		// 64KB: 0xA0000 - 0xAFFFF
+M16C62P_BLOCK_11 = 11,		// 64KB: 0x90000 - 0x9FFFF
+M16C62P_BLOCK_12 = 12,		// 64KB: 0x80000 - 0x8FFFF
+
+// Data Block Area
+M16C62P_BLOCK_A = 13		// 4KB: F000 - FFFF
+} M16C62P_BLOCK;
+
+const unsigned long m16c62p_block_start_addresses[14] =
+	{0xFF000,0xFE000,0xFC000,0xFA000,0xF8000,0xF0000,0xE0000,0xD0000,0xC0000,
+		0xB0000,0xA0000,0x90000,0x80000,0xF000 };
+		
+const unsigned long m16c62p_block_end_addresses[14] =
+	{0xFFFFF,0xFEFFF,0xFDFFF,0xFBFFF,0xF9FFF,0xF7FFF,0xEFFFF,0xDFFFF,0xCFFFF,
+		0xBFFFF,0xAFFFF,0x9FFFF,0x8FFFF,0xFFFF };
+
+#endif  // __M16C62PFLASH_H__
\ No newline at end of file
diff --git a/tos/lib/net/Deluge/extra/mica2/NetProg_platform.h b/tos/lib/net/Deluge/extra/mica2/NetProg_platform.h
new file mode 100644
index 00000000..2f4ecb8b
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/mica2/NetProg_platform.h
@@ -0,0 +1,50 @@
+// $Id: NetProg_platform.h,v 1.5 2010-06-29 22:07:47 scipio Exp $
+
+/*                                                                      
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __NETPROG_PLATFORM_H__
+#define __NETPROG_PLATFORM_H__
+
+void netprog_reboot() {
+  wdt_enable(1);
+  while(1);
+}
+
+#endif
diff --git a/tos/lib/net/Deluge/extra/micaz/InternalFlash.h b/tos/lib/net/Deluge/extra/micaz/InternalFlash.h
new file mode 100644
index 00000000..90ad0c5d
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/micaz/InternalFlash.h
@@ -0,0 +1,52 @@
+// $Id: InternalFlash.h,v 1.3 2010-06-29 22:07:47 scipio Exp $
+
+/*                                                                      
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * InternalFlash.h - Internal flash implementation for the avr
+ * platform.
+ *
+ * Valid address range is 0x0 - 0xFFF.
+ *
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __INTERNAL_FLASH_H__
+#define __INTERNAL_FLASH_H__
+
+#include <avr/eeprom.h>
+
+#endif
diff --git a/tos/lib/net/Deluge/extra/micaz/ReprogramGuardC.nc b/tos/lib/net/Deluge/extra/micaz/ReprogramGuardC.nc
new file mode 100644
index 00000000..9f25e503
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/micaz/ReprogramGuardC.nc
@@ -0,0 +1,13 @@
+configuration ReprogramGuardC
+{
+  provides interface ReprogramGuard;
+}
+
+implementation
+{
+  components ReprogramGuardP;
+  components new VoltageC();
+  
+  ReprogramGuard = ReprogramGuardP;
+  ReprogramGuardP.Voltage -> VoltageC;
+}
diff --git a/tos/lib/net/Deluge/extra/micaz/ReprogramGuardP.nc b/tos/lib/net/Deluge/extra/micaz/ReprogramGuardP.nc
new file mode 100644
index 00000000..c5dc0c89
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/micaz/ReprogramGuardP.nc
@@ -0,0 +1,23 @@
+module ReprogramGuardP
+{
+  provides interface ReprogramGuard;
+  uses interface Read<uint16_t> as Voltage;
+}
+
+implementation
+{
+  enum {
+    VTHRESH = 0x1CF, // 2.7V
+  };
+
+  command error_t ReprogramGuard.okToProgram()
+  {
+    return call Voltage.read();
+  }
+
+  event void Voltage.readDone(error_t result, uint16_t val)
+  {
+    signal ReprogramGuard.okToProgramDone(result == SUCCESS && val < VTHRESH);
+  }
+  
+}
diff --git a/tos/lib/net/Deluge/extra/micaz/TOSBoot_platform.h b/tos/lib/net/Deluge/extra/micaz/TOSBoot_platform.h
new file mode 100644
index 00000000..574f09c5
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/micaz/TOSBoot_platform.h
@@ -0,0 +1,49 @@
+// $Id: TOSBoot_platform.h,v 1.4 2010-06-29 22:07:47 scipio Exp $
+
+/*                                                                      
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author  Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __TOSBOOT_PLATFORM_H__
+#define __TOSBOOT_PLATFORM_H__
+
+enum {
+  TOSBOOT_ARGS_ADDR = 0xff0,      // address of TOSBoot args in internal flash
+  TOSBOOT_GESTURE_MAX_COUNT = 3,  // number of resets to force golden image
+  TOSBOOT_GOLDEN_IMG_ADDR = 0x0L, // address of the golden image in external flash
+  TOSBOOT_INT_PAGE_SIZE = SPM_PAGESIZE, // size of each internal program flash page
+};
+
+#endif
diff --git a/tos/lib/net/Deluge/extra/msp430/InternalFlashC.nc b/tos/lib/net/Deluge/extra/msp430/InternalFlashC.nc
new file mode 100644
index 00000000..69c2109b
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/msp430/InternalFlashC.nc
@@ -0,0 +1,131 @@
+// $Id: InternalFlashC.nc,v 1.4 2010-06-29 22:07:48 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * InternalFlashC.nc - Internal flash implementation for telos msp
+ * platform. On the msp, the flash must first be erased before a value
+ * can be written. However, the msp can only erase the flash at a
+ * segment granularity (128 bytes for the information section). This
+ * module allows transparent read/write of individual bytes to the
+ * information section by dynamically switching between the two
+ * provided segments in the information section.
+ *
+ * Valid address range is 0x1000 - 0x107E (0x107F is used to store the
+ * version number of the information segment).
+ *
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module InternalFlashC {
+  provides interface InternalFlash;
+}
+
+implementation {
+
+  enum {
+    IFLASH_OFFSET     = 0x1000,
+    IFLASH_SIZE       = 128,
+    IFLASH_SEG0_VNUM_ADDR = 0x107f,
+    IFLASH_SEG1_VNUM_ADDR = 0x10ff,
+    IFLASH_INVALID_VNUM = -1,
+  };
+
+  uint8_t chooseSegment() {
+    int8_t vnum0 = *(int8_t*)IFLASH_SEG0_VNUM_ADDR;
+    int8_t vnum1 = *(int8_t*)IFLASH_SEG1_VNUM_ADDR;
+    if (vnum0 == IFLASH_INVALID_VNUM)
+      return 1;
+    else if (vnum1 == IFLASH_INVALID_VNUM)
+      return 0;
+    return ( (int8_t)(vnum0 - vnum1) < 0 );
+  }
+
+  command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) {
+
+    volatile int8_t *newPtr;
+    int8_t *oldPtr;
+    int8_t *bufPtr = (int8_t*)buf;
+    int8_t version;
+    uint16_t i;
+
+    addr += IFLASH_OFFSET;
+    newPtr = oldPtr = (int8_t*)IFLASH_OFFSET;
+    if (chooseSegment()) {
+      oldPtr += IFLASH_SIZE;
+    }
+    else {
+      addr += IFLASH_SIZE;
+      newPtr += IFLASH_SIZE;
+    }
+
+    FCTL2 = FWKEY + FSSEL1 + FN2;
+    FCTL3 = FWKEY;
+    FCTL1 = FWKEY + ERASE;
+    *newPtr = 0;
+    FCTL1 = FWKEY + WRT;
+    
+    for ( i = 0; i < IFLASH_SIZE-1; i++, newPtr++, oldPtr++ ) {
+      if ((uint16_t)newPtr < (uint16_t)addr || (uint16_t)addr+size <= (uint16_t)newPtr)
+	*newPtr = *oldPtr;
+      else
+	*newPtr = *bufPtr++;
+    }
+    version = *oldPtr + 1;
+    if (version == IFLASH_INVALID_VNUM)
+      version++;
+    *newPtr = version;
+    
+    FCTL1 = FWKEY;
+    FCTL3 = FWKEY + LOCK;
+
+    return SUCCESS;
+
+  }
+
+  command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) {
+
+    addr += IFLASH_OFFSET;
+    if (chooseSegment())
+      addr += IFLASH_SIZE;
+
+    memcpy(buf, addr, size);
+
+    return SUCCESS;
+
+  }
+
+}
diff --git a/tos/lib/net/Deluge/extra/mulle/NetProg_platform.h b/tos/lib/net/Deluge/extra/mulle/NetProg_platform.h
new file mode 100644
index 00000000..6ff2f6ba
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/mulle/NetProg_platform.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This file contains the netprog_reboot function that
+ * reboots the mcu.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#ifndef __NETPROG_PLATFORM_H__
+#define __NETPROG_PLATFORM_H__
+
+void netprog_reboot() {
+  PRCR.BIT.PRC1 = 1; // Turn off protection on PM registers.
+  PM0.BIT.PM03 = 1;
+}
+
+#endif  // __NETPROG_PLATFORM_H__
diff --git a/tos/lib/net/Deluge/extra/mulle/ReprogramGuardC.nc b/tos/lib/net/Deluge/extra/mulle/ReprogramGuardC.nc
new file mode 100644
index 00000000..943289d2
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/mulle/ReprogramGuardC.nc
@@ -0,0 +1,11 @@
+configuration ReprogramGuardC
+{
+  provides interface ReprogramGuard;
+}
+
+implementation
+{
+  components ReprogramGuardP;
+  
+  ReprogramGuard = ReprogramGuardP;
+}
diff --git a/tos/lib/net/Deluge/extra/mulle/ReprogramGuardP.nc b/tos/lib/net/Deluge/extra/mulle/ReprogramGuardP.nc
new file mode 100644
index 00000000..b8064cb6
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/mulle/ReprogramGuardP.nc
@@ -0,0 +1,22 @@
+// TODO(henrik) implement.
+
+module ReprogramGuardP
+{
+  provides interface ReprogramGuard;
+}
+implementation
+{
+  enum {
+    VTHRESH = 0x0, // 0V
+  };
+  task void sendOk()
+  {
+    signal ReprogramGuard.okToProgramDone(true);
+  }
+
+  command error_t ReprogramGuard.okToProgram()
+  {
+    post sendOk();
+    return SUCCESS;
+  }
+}
diff --git a/tos/lib/net/Deluge/extra/mulle/TOSBoot_platform.h b/tos/lib/net/Deluge/extra/mulle/TOSBoot_platform.h
new file mode 100644
index 00000000..ebeb735e
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/mulle/TOSBoot_platform.h
@@ -0,0 +1,15 @@
+/**
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#ifndef __TOSBOOT_PLATFORM_H__
+#define __TOSBOOT_PLATFORM_H__
+
+enum {
+  TOSBOOT_ARGS_ADDR = 0,      // address of TOSBoot args in internal flash
+  TOSBOOT_GESTURE_MAX_COUNT = 3,  // number of resets to force golden image
+  TOSBOOT_GOLDEN_IMG_ADDR = 0x0L, // address of the golden image in external flash
+  TOSBOOT_INT_PAGE_SIZE = 512L, // size of each internal program flash page. Each page is 64Kbytes but it is better to split it into 128 parts (65536/512=128).
+};
+
+#endif  // __TOSBOOT_PLATFORM_H__
diff --git a/tos/lib/net/Deluge/extra/telos/NetProg_platform.h b/tos/lib/net/Deluge/extra/telos/NetProg_platform.h
new file mode 100644
index 00000000..e6f0b56f
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/telos/NetProg_platform.h
@@ -0,0 +1,50 @@
+// $Id: NetProg_platform.h,v 1.4 2010-06-29 22:07:48 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __NETPROG_PLATFORM_H__
+#define __NETPROG_PLATFORM_H__
+
+void netprog_reboot() {
+  WDTCTL = WDT_ARST_1_9; 
+  while(1);
+}
+
+#endif
diff --git a/tos/lib/net/Deluge/extra/telos/ReprogramGuardC.nc b/tos/lib/net/Deluge/extra/telos/ReprogramGuardC.nc
new file mode 100644
index 00000000..9f25e503
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/telos/ReprogramGuardC.nc
@@ -0,0 +1,13 @@
+configuration ReprogramGuardC
+{
+  provides interface ReprogramGuard;
+}
+
+implementation
+{
+  components ReprogramGuardP;
+  components new VoltageC();
+  
+  ReprogramGuard = ReprogramGuardP;
+  ReprogramGuardP.Voltage -> VoltageC;
+}
diff --git a/tos/lib/net/Deluge/extra/telos/ReprogramGuardP.nc b/tos/lib/net/Deluge/extra/telos/ReprogramGuardP.nc
new file mode 100644
index 00000000..1ffb1e9a
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/telos/ReprogramGuardP.nc
@@ -0,0 +1,23 @@
+module ReprogramGuardP
+{
+  provides interface ReprogramGuard;
+  uses interface Read<uint16_t> as Voltage;
+}
+
+implementation
+{
+  enum {
+    VTHRESH = 0xE66, // 2.7V
+  };
+
+  command error_t ReprogramGuard.okToProgram()
+  {
+    return call Voltage.read();
+  }
+
+  event void Voltage.readDone(error_t result, uint16_t val)
+  {
+    signal ReprogramGuard.okToProgramDone(result == SUCCESS && val > VTHRESH);
+  }
+  
+}
diff --git a/tos/lib/net/Deluge/extra/telosb/ReprogramGuardC.nc b/tos/lib/net/Deluge/extra/telosb/ReprogramGuardC.nc
new file mode 100644
index 00000000..9f25e503
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/telosb/ReprogramGuardC.nc
@@ -0,0 +1,13 @@
+configuration ReprogramGuardC
+{
+  provides interface ReprogramGuard;
+}
+
+implementation
+{
+  components ReprogramGuardP;
+  components new VoltageC();
+  
+  ReprogramGuard = ReprogramGuardP;
+  ReprogramGuardP.Voltage -> VoltageC;
+}
diff --git a/tos/lib/net/Deluge/extra/telosb/ReprogramGuardP.nc b/tos/lib/net/Deluge/extra/telosb/ReprogramGuardP.nc
new file mode 100644
index 00000000..1ffb1e9a
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/telosb/ReprogramGuardP.nc
@@ -0,0 +1,23 @@
+module ReprogramGuardP
+{
+  provides interface ReprogramGuard;
+  uses interface Read<uint16_t> as Voltage;
+}
+
+implementation
+{
+  enum {
+    VTHRESH = 0xE66, // 2.7V
+  };
+
+  command error_t ReprogramGuard.okToProgram()
+  {
+    return call Voltage.read();
+  }
+
+  event void Voltage.readDone(error_t result, uint16_t val)
+  {
+    signal ReprogramGuard.okToProgramDone(result == SUCCESS && val > VTHRESH);
+  }
+  
+}
diff --git a/tos/lib/net/Deluge/extra/telosb/TOSBoot_platform.h b/tos/lib/net/Deluge/extra/telosb/TOSBoot_platform.h
new file mode 100644
index 00000000..f8b9675f
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/telosb/TOSBoot_platform.h
@@ -0,0 +1,49 @@
+// $Id: TOSBoot_platform.h,v 1.4 2010-06-29 22:07:48 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author  Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __TOSBOOT_PLATFORM_H__
+#define __TOSBOOT_PLATFORM_H__
+
+enum {
+  TOSBOOT_ARGS_ADDR = 0x70,      // address of TOSBoot args in internal flash
+  TOSBOOT_GESTURE_MAX_COUNT = 3, // number of resets to force golden image
+  TOSBOOT_GOLDEN_IMG_ADDR = 0xf0000L, // address of the golden image in external flash
+  TOSBOOT_INT_PAGE_SIZE = 512L,  // size of each internal program flash page
+};
+
+#endif
diff --git a/tos/lib/net/Deluge/extra/tinynode/NetProg_platform.h b/tos/lib/net/Deluge/extra/tinynode/NetProg_platform.h
new file mode 100644
index 00000000..3e94fe0a
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/tinynode/NetProg_platform.h
@@ -0,0 +1,50 @@
+// $Id: NetProg_platform.h,v 1.2 2010-06-29 22:07:48 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __NETPROG_PLATFORM_H__
+#define __NETPROG_PLATFORM_H__
+
+void netprog_reboot() {
+  WDTCTL = WDT_ARST_1_9; 
+  while(1);
+}
+
+#endif
diff --git a/tos/lib/net/Deluge/extra/tinynode/README b/tos/lib/net/Deluge/extra/tinynode/README
new file mode 100644
index 00000000..4b5cd7d2
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/tinynode/README
@@ -0,0 +1,15 @@
+Deluge T2 for TinyNode
+----------------------------------
+
+
+These files are needed by Deluge T2 to compile for the TinyNode platform. 
+
+Note: 
+
+Reprogramming fails if the voltage of the node is not above a given 
+threshold. Currently, this is set to 2.7V, which may be too high if 
+you run your mote on batteries. In this case, set the value of
+VTHRESH in the ReprogramGaurdP.nc file to a different value. 
+
+In case you wish not to test the voltage at all, modify ReprogramGuardP.nc
+s.t. the command okToProgram() posts readDone with SUCCESS. 
\ No newline at end of file
diff --git a/tos/lib/net/Deluge/extra/tinynode/ReprogramGuardC.nc b/tos/lib/net/Deluge/extra/tinynode/ReprogramGuardC.nc
new file mode 100644
index 00000000..9f25e503
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/tinynode/ReprogramGuardC.nc
@@ -0,0 +1,13 @@
+configuration ReprogramGuardC
+{
+  provides interface ReprogramGuard;
+}
+
+implementation
+{
+  components ReprogramGuardP;
+  components new VoltageC();
+  
+  ReprogramGuard = ReprogramGuardP;
+  ReprogramGuardP.Voltage -> VoltageC;
+}
diff --git a/tos/lib/net/Deluge/extra/tinynode/ReprogramGuardP.nc b/tos/lib/net/Deluge/extra/tinynode/ReprogramGuardP.nc
new file mode 100644
index 00000000..2a3b010b
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/tinynode/ReprogramGuardP.nc
@@ -0,0 +1,18 @@
+module ReprogramGuardP {
+  provides interface ReprogramGuard;
+  uses interface Read<uint16_t> as Voltage;
+}
+
+implementation {
+  enum {
+    VTHRESH = 0xE66, // 2.7V
+  };
+
+  command error_t ReprogramGuard.okToProgram() {
+    return call Voltage.read();
+  }
+
+  event void Voltage.readDone(error_t result, uint16_t val) {
+    signal ReprogramGuard.okToProgramDone(result == SUCCESS && val > VTHRESH);
+  }
+}
diff --git a/tos/lib/net/Deluge/extra/tinynode/TOSBoot_platform.h b/tos/lib/net/Deluge/extra/tinynode/TOSBoot_platform.h
new file mode 100644
index 00000000..8829eba5
--- /dev/null
+++ b/tos/lib/net/Deluge/extra/tinynode/TOSBoot_platform.h
@@ -0,0 +1,49 @@
+// $Id: TOSBoot_platform.h,v 1.2 2010-06-29 22:07:48 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author  Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __TOSBOOT_PLATFORM_H__
+#define __TOSBOOT_PLATFORM_H__
+
+enum {
+  TOSBOOT_ARGS_ADDR = 0x70,      // address of TOSBoot args in internal flash
+  TOSBOOT_GESTURE_MAX_COUNT = 3, // number of resets to force golden image
+  TOSBOOT_GOLDEN_IMG_ADDR = 0x0L, // address of the golden image in external flash
+  TOSBOOT_INT_PAGE_SIZE = 512L,  // size of each internal program flash page
+};
+
+#endif
diff --git a/tos/lib/net/Deluge/imgNum2volumeId.h b/tos/lib/net/Deluge/imgNum2volumeId.h
new file mode 100644
index 00000000..0c3170ba
--- /dev/null
+++ b/tos/lib/net/Deluge/imgNum2volumeId.h
@@ -0,0 +1,20 @@
+#ifndef __IMGNUM2VOLUMEID_H__
+#define __IMGNUM2VOLUMEID_H__
+
+uint8_t _imgNum2volumeId[] = {
+  VOLUME_GOLDENIMAGE,
+  VOLUME_DELUGE1,
+  VOLUME_DELUGE2,
+  VOLUME_DELUGE3
+};
+
+enum {
+  NON_DELUGE_VOLUME = 0xFF
+};
+
+uint8_t imgNum2volumeId(uint8_t imgNum)
+{
+  return imgNum < DELUGE_NUM_VOLUMES ? _imgNum2volumeId[imgNum] : NON_DELUGE_VOLUME;
+}
+
+#endif
diff --git a/tos/lib/net/DisseminationUpdate.nc b/tos/lib/net/DisseminationUpdate.nc
new file mode 100644
index 00000000..712c9866
--- /dev/null
+++ b/tos/lib/net/DisseminationUpdate.nc
@@ -0,0 +1,61 @@
+// $Id: DisseminationUpdate.nc,v 1.6 2010-06-29 22:07:47 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Update a network shared (disseminated) value. Updates are assured
+ * to be eventually consistent across a connected network. If multiple
+ * nodes update a value simultaneously, then nodes within the network
+ * will see a series of one or more updates, the last update will
+ * be the same for all nodes. Components that need to use the
+ * variable should use the DisseminationValue interface.
+ *
+ * @author Philip Levis
+ * @author Gilman Tolle
+ * @date   January 7 2006
+ */ 
+
+
+
+interface DisseminationUpdate<t> {
+  /**
+   * Update the variable to a new value. This changes the local copy
+   * and begins to disseminate the new value throughout the network.
+   * As other nodes may have also changed the variable, it is possible
+   * that an update may not 'stick,' but will instead be overwritten by
+   * a separate update.
+   *
+   * @param newVal A pointer to the new value. The memory pointed to
+   * by newVal is copied out, so newVal can be reclaimed when
+   * <tt>change</tt> returns.
+   */
+  command void change(t* ONE newVal);
+}
diff --git a/tos/lib/net/DisseminationValue.nc b/tos/lib/net/DisseminationValue.nc
new file mode 100644
index 00000000..1a7ec41d
--- /dev/null
+++ b/tos/lib/net/DisseminationValue.nc
@@ -0,0 +1,73 @@
+// $Id: DisseminationValue.nc,v 1.6 2010-06-29 22:07:47 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Read a network shared (disseminated) variable and be notified
+ * of updates.
+ *
+ * @author Philip Levis
+ * @author Gilman Tolle
+ *
+ * @date   Jan 7 2006
+ */ 
+
+
+interface DisseminationValue<t> {
+
+  /**
+   * Obtain a pointer to the variable. The provider of this
+   * interface only will change the memory the pointer references
+   * in tasks. Therefore the memory region does not change during
+   * the execution of any other task. A user of this interface
+   * must not in any circumstance write to this memory location.
+   *
+   * @return A const pointer to the variable.
+   */
+  command const t* get();
+
+  /**
+   * Set the variable to a new value. The provider of this interface
+   * will copy the value from the pointer. NOTE: This command does
+   * not cause the new value to begin disseminating. It is intended to
+   * be used for setting default values.
+   */
+
+  command void set( const t* );
+
+  /**
+   * Signalled whenever variable may have changed.
+   */
+  event void changed();
+}
+
+
+
diff --git a/tos/lib/net/NeighborTableEviction.nc b/tos/lib/net/NeighborTableEviction.nc
new file mode 100644
index 00000000..4eaeda58
--- /dev/null
+++ b/tos/lib/net/NeighborTableEviction.nc
@@ -0,0 +1,47 @@
+/*
+ * "Copyright (c) 2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright.
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor
+ *   the names of its contributors may be used to endorse or promote
+ *   products derived from this software without specific prior written
+ *   permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * REGENTS OF THE UNVERSITY OF CALIFORNIA OR ITS CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ * Notify when a neighbor has been evicted from the neighbor table.
+ *
+ * @author Rodrigo Fonseca
+ */
+
+interface NeighborTableEviction {
+
+  /**
+   * Signals to users that the neighbor has been evicted from the table
+   */
+  event void evicted(uint16_t neighbor)
+}
+
diff --git a/tos/lib/net/README b/tos/lib/net/README
new file mode 100644
index 00000000..72c418de
--- /dev/null
+++ b/tos/lib/net/README
@@ -0,0 +1,8 @@
+This directory contains network protocols that are part of
+the TinyOS core distribution. They are:
+
+ctp: Collection Tree Protocol (TEP 123), a collection (TEP 119) protocol
+drip: Drip, a dissemination (TEP 118) protocol 
+le: Link Estimation Exchange Protocol (TEP 124)
+lqi: MultihopLQI, a collection (TEP 119) protocol, only works on CC2420 radio 
+
diff --git a/tos/lib/net/RootControl.nc b/tos/lib/net/RootControl.nc
new file mode 100644
index 00000000..e6b7d223
--- /dev/null
+++ b/tos/lib/net/RootControl.nc
@@ -0,0 +1,44 @@
+/* $Id: RootControl.nc,v 1.4 2006-12-12 18:23:29 vlahan Exp $ */
+/*
+ * "Copyright (c) 2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright.
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor
+ *   the names of its contributors may be used to endorse or promote
+ *   products derived from this software without specific prior written
+ *   permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * REGENTS OF THE UNVERSITY OF CALIFORNIA OR ITS CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/** Controls whether the current node is a root of the tree
+ *  @author Rodrigo Fonseca
+ *  @date   $Date: 2006-12-12 18:23:29 $
+ */
+
+interface RootControl {
+    command error_t setRoot();
+    command error_t unsetRoot();
+    command bool isRoot();
+}
diff --git a/tos/lib/net/SendVirtualizerP.nc b/tos/lib/net/SendVirtualizerP.nc
new file mode 100644
index 00000000..275ee494
--- /dev/null
+++ b/tos/lib/net/SendVirtualizerP.nc
@@ -0,0 +1,200 @@
+// $Id: SendVirtualizerP.nc,v 1.3 2010-06-29 22:07:47 scipio Exp $
+/*
+* Copyright (c) 2005 Stanford University. All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * A Send queue that provides a Service Instance pattern for formatted
+ * packets and calls an underlying Send in a round-robin fashion. Used
+ * to share L3 bandwidth between different communication clients.
+ *
+ * @author Philip Levis
+ * @date   April 6 2007
+ */ 
+
+#include "AM.h"
+
+generic module SendVirtualizerP(int numClients) {
+    provides interface Send[uint8_t client];
+    uses { 
+      interface Send as SubSend;
+      interface Packet;
+    }
+}
+
+implementation {
+    typedef struct {
+        message_t* msg;
+    } queue_entry_t;
+  
+    uint8_t current = numClients; // mark as empty
+    queue_entry_t queue[numClients];
+    uint8_t cancelMask[numClients/8 + 1];
+
+    void tryToSend();
+    
+    void nextPacket() {
+        uint8_t i;
+        current = (current + 1) % numClients;
+        for(i = 0; i < numClients; i++) {
+            if((queue[current].msg == NULL) ||
+               (cancelMask[current/8] & (1 << current%8)))
+            {
+                current = (current + 1) % numClients;
+            }
+            else {
+                break;
+            }
+        }
+        if(i >= numClients) current = numClients;
+    }
+
+    /**
+     * Accepts a properly formatted AM packet for later sending.
+     * Assumes that someone has filled in the AM packet fields
+     * (destination, AM type).
+     *
+     * @param msg - the message to send
+     * @param len - the length of the payload
+     *
+     */
+    command error_t Send.send[uint8_t clientId](message_t* msg,
+                                                uint8_t len) {
+        if (clientId >= numClients) {
+            return FAIL;
+        }
+        if (queue[clientId].msg != NULL) {
+            return EBUSY;
+        }
+        dbg("AMQueue", "AMQueue: request to send from %hhu (%p): passed checks\n", clientId, msg);
+        
+        queue[clientId].msg = msg;
+        call Packet.setPayloadLength(msg, len);
+    
+        if (current >= numClients) { // queue empty
+            error_t err;
+            current = clientId;
+            
+            err = call SubSend.send(msg, len);
+            if (err != SUCCESS) {
+	      dbg("AMQueue", "%s: underlying send failed.\n", __FUNCTION__);
+	      current = numClients;
+	      queue[clientId].msg = NULL;
+            }
+            return err;
+        }
+        else {
+	  dbg("AMQueue", "AMQueue: request to send from %hhu (%p): queue not empty\n", clientId, msg);
+        }
+        return SUCCESS;
+    }
+
+    task void CancelTask() {
+      uint8_t i,j,mask,last;
+      message_t *msg;
+      for(i = 0; i < numClients/8 + 1; i++) {
+	if(cancelMask[i]) {
+	  for(mask = 1, j = 0; j < 8; j++) {
+	    if(cancelMask[i] & mask) {
+	      last = i*8 + j;
+	      msg = queue[last].msg;
+		queue[last].msg = NULL;
+		cancelMask[i] &= ~mask;
+		signal Send.sendDone[last](msg, ECANCEL);
+	    }
+	    mask <<= 1;
+	  }
+	}
+      }
+    }
+    
+    command error_t Send.cancel[uint8_t clientId](message_t* msg) {
+      if (clientId >= numClients ||         // Not a valid client    
+	  queue[clientId].msg == NULL ||    // No packet pending
+	  queue[clientId].msg != msg) {     // Not the right packet
+	return FAIL;
+      }
+      if(current == clientId) {
+	error_t err = call SubSend.cancel(msg);
+	return err;
+      }
+      else {
+	cancelMask[clientId/8] |= 1 << clientId % 8;
+	post CancelTask();
+	return SUCCESS;
+      }
+    }
+
+    void sendDone(uint8_t last, message_t *msg, error_t err) {
+      queue[last].msg = NULL;
+      tryToSend();
+      signal Send.sendDone[last](msg, err);
+    }
+
+    task void errorTask() {
+      sendDone(current, queue[current].msg, FAIL);
+    }
+    
+    // NOTE: Increments current!
+    void tryToSend() {
+      nextPacket();
+      if (current < numClients) { // queue not empty
+	error_t nextErr;
+	message_t* nextMsg = queue[current].msg;
+	uint8_t len = call Packet.payloadLength(nextMsg);
+	nextErr = call SubSend.send(nextMsg, len);
+	if(nextErr != SUCCESS) {
+	  post errorTask();
+	}
+      }
+    }
+    
+    event void SubSend.sendDone(message_t* msg, error_t err) {
+      if(queue[current].msg == msg) {
+	sendDone(current, msg, err);
+      }
+      else {
+	dbg("PointerBug", "%s received send done for %p, signaling for %p.\n",
+	    __FUNCTION__, msg, queue[current].msg);
+      }
+    }
+    
+    command uint8_t Send.maxPayloadLength[uint8_t id]() {
+        return call SubSend.maxPayloadLength();
+    }
+
+    command void* Send.getPayload[uint8_t id](message_t* m, uint8_t len) {
+      return call SubSend.getPayload(m, len);
+    }
+
+    default event void Send.sendDone[uint8_t id](message_t* msg, error_t err) {
+        // Do nothing
+    }
+}
diff --git a/tos/lib/net/TrickleTimer.nc b/tos/lib/net/TrickleTimer.nc
new file mode 100644
index 00000000..17c046f9
--- /dev/null
+++ b/tos/lib/net/TrickleTimer.nc
@@ -0,0 +1,91 @@
+// $Id: TrickleTimer.nc,v 1.5 2010-06-29 22:07:47 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * A network trickle timer. A trickle timer has a period in the range
+ * [L, H]. After firing, the period is doubled, up to H. If the period
+ * is P, then the timer is scheduled to fire in the interval [0.5P, P]
+ * (the second half of a period). The period can be reset to L (the
+ * smallest period, and therefore the highest frequency).
+ *
+ * The timer may be suppressed. If a user of the interface has heard
+ * enough packets from other nodes that indicate its transmitting a
+ * packet would be unncessarily redundant, then the timer does not
+ * fire. The timer has a constant K and a counter C. If C &gte; K, then
+ * the timer does not fire. When an interval ends, C is reset to 0.
+ * Calling <tt>incrementCounter</tt> increments C by one.
+ *
+ * For details, refer to Levis et al., "A Self-Regulating Algorithm
+ * for Code Maintenance and Propagation in Wireless Sensor Networks,"
+ * NSDI 2004. The component providing this interface defines the
+ * constants L, H, and K.
+ *
+ * @author Philip Levis
+ * @date   Jan 7 2006
+ */ 
+
+
+interface TrickleTimer {
+
+  /**
+   * Start the trickle timer. At boot, the timer period is its maximum
+   * value (H). If a protocol requires starting at the minimum value
+   * (e.g., fast start), then it should call <tt>reset</tt> before
+   * <tt>start</tt>.
+   *
+   * @return error_t SUCCESS if the timer was started, EBUSY if it is already
+   * running, and FAIL otherwise.
+   */
+  command error_t start();
+
+  /**
+   * Stop the trickle timer. This call sets the timer period to H and
+   * C to 0.
+   */
+  command void stop();
+
+  /**
+   * Reset the timer period to L. If called while the timer is running,
+   * then a new interval (of length L) begins immediately.
+   */
+  command void reset();
+
+  /**
+   * Increment the counter C. When an interval ends, C is set to 0.
+   */
+  command void incrementCounter();
+  
+  /**
+   * The trickle timer has fired. Signaled if C &gt; K.
+   */  
+  event void fired();
+}
diff --git a/tos/lib/net/TrickleTimerImplP.nc b/tos/lib/net/TrickleTimerImplP.nc
new file mode 100644
index 00000000..0982bc5f
--- /dev/null
+++ b/tos/lib/net/TrickleTimerImplP.nc
@@ -0,0 +1,297 @@
+// $Id: TrickleTimerImplP.nc,v 1.8 2010-06-29 22:07:47 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Module that provides a service instance of trickle timers. For
+ * details on the working of the parameters, please refer to Levis et
+ * al., "A Self-Regulating Algorithm for Code Maintenance and
+ * Propagation in Wireless Sensor Networks," NSDI 2004.
+ *
+ * @param l Lower bound of the time period in seconds.
+ * @param h Upper bound of the time period in seconds.
+ * @param k Redundancy constant.
+ * @param count How many timers to provide.
+ *
+ * @author Philip Levis
+ * @author Gilman Tolle
+ * @date   Jan 7 2006
+ */ 
+
+#include <Timer.h>
+
+generic module TrickleTimerImplP(uint16_t low,
+				 uint16_t high,
+				 uint8_t k,
+				 uint8_t count,
+				 uint8_t scale) {
+  provides {
+    interface Init;
+    interface TrickleTimer[uint8_t id];
+  }
+  uses {
+    interface Timer<TMilli>;
+    interface BitVector as Pending;
+    interface BitVector as Changed;
+    interface Random;
+    interface Leds;
+  }
+}
+implementation {
+
+  typedef struct {
+    uint16_t period;
+    uint32_t time;
+    uint32_t remainder;
+    uint8_t count;
+  } trickle_t;
+
+  trickle_t trickles[count];
+  
+  void adjustTimer();
+  void generateTime(uint8_t id);
+  
+  command error_t Init.init() {
+    int i;
+    for (i = 0; i < count; i++) {
+      trickles[i].period = high;
+      trickles[i].count = 0;
+      trickles[i].time = 0;
+      trickles[i].remainder = 0;
+    }
+    atomic {
+      call Pending.clearAll();
+      call Changed.clearAll();
+    }
+    return SUCCESS;
+  }
+
+  /**
+   * Start a trickle timer. Reset the counter to 0.
+   */
+  command error_t TrickleTimer.start[uint8_t id]() {
+    if (trickles[id].time != 0) {
+      return EBUSY;
+    }
+    trickles[id].time = 0;
+    trickles[id].remainder = 0;
+    trickles[id].count = 0;
+    generateTime(id);
+    atomic {
+      call Changed.set(id);
+    }
+    adjustTimer();
+    dbg("Trickle", "Starting trickle timer %hhu @ %s\n", id, sim_time_string());
+    return SUCCESS;
+  }
+
+  /**
+   * Stop the trickle timer. This call sets the timer period to H.
+   */
+  command void TrickleTimer.stop[uint8_t id]() {
+    trickles[id].time = 0;
+    trickles[id].period = high;
+    adjustTimer();
+    dbg("Trickle", "Stopping trickle timer %hhu @ %s\n", id, sim_time_string());
+  }
+
+  /**
+   * Reset the timer period to L. If called while the timer is running,
+   * then a new interval (of length L) begins immediately.
+   */
+  command void TrickleTimer.reset[uint8_t id]() {
+    trickles[id].period = low;
+    trickles[id].count = 0;
+    if (trickles[id].time != 0) {
+      dbg("Trickle", "Resetting running trickle timer %hhu @ %s\n", id, sim_time_string());
+      atomic {
+	call Changed.set(id);
+      }
+      trickles[id].time = 0;
+      trickles[id].remainder = 0;
+      generateTime(id);
+      adjustTimer();
+    } else {
+      dbg("Trickle", "Resetting  trickle timer %hhu @ %s\n", id, sim_time_string());
+    }
+  }
+
+  /**
+   * Increment the counter C. When an interval ends, C is set to 0.
+   */
+  command void TrickleTimer.incrementCounter[uint8_t id]() {
+    trickles[id].count++;
+  }
+
+  task void timerTask() {
+    uint8_t i;
+    for (i = 0; i < count; i++) {
+      bool fire = FALSE;
+      atomic {
+	if (call Pending.get(i)) {
+	  call Pending.clear(i);
+	  fire = TRUE;
+	}
+      }
+      if (fire) {
+	dbg("Trickle", "Firing trickle timer %hhu @ %s\n", i, sim_time_string());
+	signal TrickleTimer.fired[i]();
+	post timerTask();
+	return;
+      }
+    }
+  }
+  
+  /**
+   * The trickle timer has fired. Signaled if C &gt; K.
+   */
+  event void Timer.fired() {
+    uint8_t i;
+    uint32_t dt = call Timer.getdt();
+    dbg("Trickle", "Trickle Sub-timer fired\n");
+    for (i = 0; i < count; i++) {
+      uint32_t remaining = trickles[i].time;
+      if (remaining != 0) {
+	remaining -= dt;
+	if (remaining == 0) {
+	  if (trickles[i].count < k) {
+	    atomic {
+	      dbg("Trickle", "Trickle: mark timer %hhi as pending\n", i);
+	      call Pending.set(i);
+	    }
+	    post timerTask();
+	  }
+	  call Changed.set(i);
+	  generateTime(i);
+	    
+	  /* Note that this logic is not the exact trickle algorithm.
+	   * Rather than C being reset at the beginning of an interval,
+	   * it is being reset at a firing point. This means that the
+	   * listening period, rather than of length tau/2, is in the
+	   * range [tau/2, tau]. 
+	   */
+	  trickles[i].count = 0;
+	}
+      }
+    }
+    adjustTimer();
+  }
+
+  // This is where all of the work is done!
+  void adjustTimer() {
+    uint8_t i;
+    uint32_t lowest = 0;
+    bool set = FALSE;
+
+    // How much time has elapsed on the current timer
+    // since it was scheduled? This value is needed because
+    // the time remaining of a running timer is its time
+    // value minus time elapsed.
+    uint32_t elapsed = (call Timer.getNow() - call Timer.gett0());
+	
+    for (i = 0; i < count; i++) {
+      uint32_t timeRemaining = trickles[i].time;
+      dbg("Trickle", "Adjusting: timer %hhi (%u)\n", i, timeRemaining);
+
+      if (timeRemaining == 0) { // Not running, go to next timer
+	continue;
+      }
+      
+      atomic {
+	if (!call Changed.get(i)) {
+	  if (timeRemaining > elapsed) {
+	    dbg("Trickle", "  not changed, elapse time remaining to %u.\n", trickles[i].time - elapsed);
+	    timeRemaining -= elapsed;
+	    trickles[i].time -= elapsed;
+	  }
+	  else { // Time has already passed, so fire immediately
+	    dbg("Trickle", "  not changed, ready to elapse, fire immediately\n");
+	    timeRemaining = 1;
+	    trickles[i].time = 1;
+	  }
+	}
+	else {
+	  dbg("Trickle", "  changed, fall through.\n");
+	  call Changed.clear(i);
+	}
+      }
+      if (!set) {
+	lowest = timeRemaining;
+	set = TRUE;
+      }
+      else if (timeRemaining < lowest) {
+	lowest = timeRemaining;
+      }
+    }
+    
+    if (set) {
+      uint32_t timerVal = lowest;
+      dbg("Trickle", "Starting sub-timer with interval %u.\n", timerVal);
+      call Timer.startOneShot(timerVal);
+    }
+    else {
+      call Timer.stop();
+    }
+  }
+
+  /* Generate a new firing time for a timer. if the timer was already
+   * running (time != 0), then double the period.
+   */
+  void generateTime(uint8_t id) {
+    uint32_t newTime;
+    uint16_t rval;
+    
+    if (trickles[id].time != 0) {
+      trickles[id].period *= 2;
+      if (trickles[id].period > high) {
+	trickles[id].period = high;
+      }
+    }
+    
+    trickles[id].time = trickles[id].remainder;
+    
+    newTime = trickles[id].period;
+    newTime = newTime << (scale - 1);
+
+    rval = call Random.rand16() % (trickles[id].period << (scale - 1));
+    newTime += rval;
+    
+    trickles[id].remainder = (((uint32_t)trickles[id].period) << scale) - newTime;
+    trickles[id].time += newTime;
+    dbg("Trickle,TrickleTimes", "Generated time for %hhu with period %hu (%u) is %u (%i + %hu)\n", id, trickles[id].period, (uint32_t)trickles[id].period << scale, trickles[id].time, (trickles[id].period << (scale - 1)), rval);
+  }
+
+ default event void TrickleTimer.fired[uint8_t id]() {
+   return;
+ }
+}
+
+  
diff --git a/tos/lib/net/TrickleTimerMilliC.nc b/tos/lib/net/TrickleTimerMilliC.nc
new file mode 100644
index 00000000..c6709bfc
--- /dev/null
+++ b/tos/lib/net/TrickleTimerMilliC.nc
@@ -0,0 +1,74 @@
+// $Id: TrickleTimerMilliC.nc,v 1.5 2010-06-29 22:07:47 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Configuration that encapsulates the trickle timer implementation to
+ * its needed services and initialization. For details on the working
+ * of the parameters, please refer to Levis et al., "A Self-Regulating
+ * Algorithm for Code Maintenance and Propagation in Wireless Sensor
+ * Networks," NSDI 2004.
+ *
+ * @param l Lower bound of the time period in seconds.
+ * @param h Upper bound of the time period in seconds.
+ * @param k Redundancy constant.
+ * @param count How many timers to provide.
+ *
+ * @author Philip Levis
+ * @author Gilman Tolle
+ * @date   Jan 7 2006
+ */ 
+
+
+generic configuration TrickleTimerMilliC(uint16_t low,
+					 uint16_t high,
+					 uint8_t k,
+					 uint8_t count) {
+  provides interface TrickleTimer[uint8_t];
+}
+implementation {
+  components new TrickleTimerImplP(low, high, k, count, 10), MainC, RandomC;
+  components new TimerMilliC();
+  components new BitVectorC(count) as PendingVector;
+  components new BitVectorC(count) as ChangeVector;
+  components LedsC;
+  TrickleTimer = TrickleTimerImplP;
+
+  TrickleTimerImplP.Timer -> TimerMilliC;
+  TrickleTimerImplP.Random -> RandomC;
+  TrickleTimerImplP.Changed -> ChangeVector;
+  TrickleTimerImplP.Pending -> PendingVector;
+  
+  TrickleTimerImplP.Leds -> LedsC;
+  MainC.SoftwareInit -> TrickleTimerImplP;
+}
+
+  
diff --git a/tos/lib/net/UARTDebugSenderP.nc b/tos/lib/net/UARTDebugSenderP.nc
new file mode 100644
index 00000000..4c118513
--- /dev/null
+++ b/tos/lib/net/UARTDebugSenderP.nc
@@ -0,0 +1,218 @@
+#include <CollectionDebugMsg.h>
+module UARTDebugSenderP {
+    provides {
+        interface CollectionDebug;
+    }
+    uses {
+        interface Boot;
+        interface Pool<message_t> as MessagePool;
+        interface Queue<message_t*> as SendQueue;
+        interface AMSend as UARTSend;
+    }
+} 
+implementation {
+    message_t uartPacket;
+    bool sending;
+    uint8_t len;
+    uint16_t statLogReceived = 0;
+    uint16_t statEnqueueFail = 0;
+    uint16_t statSendFail = 0;
+    uint16_t statSendDoneFail = 0;
+    uint16_t statSendDoneOk = 0;
+    uint16_t statSendDoneBug = 0;
+ 
+
+    event void Boot.booted() {
+        sending = FALSE;
+        len = sizeof(CollectionDebugMsg);
+        statSendFail = 0;
+        statLogReceived = 0;
+        statEnqueueFail = 0;
+        statSendDoneOk = 0;
+        statSendDoneFail = 0;
+        statSendDoneBug = 0;
+    }
+
+    task void sendTask() {
+        if (sending) {
+            return;
+        } else if (call SendQueue.empty()) {
+            return;
+        } else {
+            message_t* smsg = call SendQueue.head();
+            error_t eval = call UARTSend.send(AM_BROADCAST_ADDR, smsg, len);
+            if (eval == SUCCESS) {
+                sending = TRUE;
+                return;
+            } else {
+                //Drop packet. Don't retry.
+                statSendFail++;
+                call SendQueue.dequeue();
+                call MessagePool.put(smsg);
+                if (! call SendQueue.empty())
+                    post sendTask();
+            }
+        }
+    }
+
+    event void UARTSend.sendDone(message_t *msg, error_t error) {
+        message_t* qh = call SendQueue.head();
+        if (qh == NULL || qh != msg) {
+            //bad mojo
+            statSendDoneBug++;
+        } else {
+            call SendQueue.dequeue();
+            call MessagePool.put(msg);  
+            if (error == SUCCESS) 
+                statSendDoneOk++;
+            else 
+                statSendDoneFail++;
+        }
+        sending = FALSE;
+        if (!call SendQueue.empty()) 
+            post sendTask();
+    }
+
+    command error_t CollectionDebug.logEvent(uint8_t type) {
+        statLogReceived++;
+        if (call MessagePool.empty()) {
+            return FAIL;
+        } else {
+            message_t* msg = call MessagePool.get();
+            CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg, sizeof(CollectionDebugMsg));
+	    if (dbg_msg == NULL) {
+	      return FAIL;
+	    }
+	    
+            memset(dbg_msg, 0, len);
+
+            dbg_msg->type = type;
+            dbg_msg->seqno = statLogReceived;
+
+            if (call SendQueue.enqueue(msg) == SUCCESS) {
+                post sendTask();
+                return SUCCESS;
+            } else {
+                statEnqueueFail++;
+                call MessagePool.put(msg);
+                return FAIL;
+            }
+        }
+    }
+    /* Used for FE_SENT_MSG, FE_RCV_MSG, FE_FWD_MSG, FE_DST_MSG */
+    command error_t TRUSTEDBLOCK CollectionDebug.logEventMsg(uint8_t type, uint16_t msg_id, am_addr_t origin, am_addr_t node) {
+        statLogReceived++;
+        if (call MessagePool.empty()) {
+            return FAIL;
+        } else {
+            message_t* msg = call MessagePool.get();
+            CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg, sizeof(CollectionDebugMsg));
+	    if (dbg_msg == NULL) {
+	      return FAIL;
+	    }
+            memset(dbg_msg, 0, len);
+
+            dbg_msg->type = type;
+            dbg_msg->data.msg.msg_uid = msg_id;
+            dbg_msg->data.msg.origin = origin;
+            dbg_msg->data.msg.other_node = node;
+            dbg_msg->seqno = statLogReceived;
+
+            if (call SendQueue.enqueue(msg) == SUCCESS) {
+                post sendTask();
+                return SUCCESS;
+            } else {
+                statEnqueueFail++;
+                call MessagePool.put(msg);
+                return FAIL;
+            }
+        }
+    }
+    /* Used for TREE_NEW_PARENT, TREE_ROUTE_INFO */
+    command error_t TRUSTEDBLOCK CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) {
+        statLogReceived++;
+        if (call MessagePool.empty()) {
+            return FAIL;
+        } else {
+            message_t* msg = call MessagePool.get();
+            CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg, sizeof(CollectionDebugMsg));
+	    if (dbg_msg == NULL) {
+	      return FAIL;
+	    }
+            memset(dbg_msg, 0, len);
+
+            dbg_msg->type = type;
+            dbg_msg->data.route_info.parent = parent;
+            dbg_msg->data.route_info.hopcount = hopcount;
+            dbg_msg->data.route_info.metric = metric;
+            dbg_msg->seqno = statLogReceived;
+
+            if (call SendQueue.enqueue(msg) == SUCCESS) {
+                post sendTask();
+                return SUCCESS;
+            } else {
+                statEnqueueFail++;
+                call MessagePool.put(msg);
+                return FAIL;
+            }
+        }
+    }
+    /* Used for DBG_1 */ 
+    command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) {
+        statLogReceived++;
+        if (call MessagePool.empty()) {
+            return FAIL;
+        } else {
+            message_t* msg = call MessagePool.get();
+            CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg, sizeof(CollectionDebugMsg));
+	    if (dbg_msg == NULL) {
+	      return FAIL;
+	    }
+            memset(dbg_msg, 0, len);
+
+            dbg_msg->type = type;
+            dbg_msg->data.arg = arg;
+            dbg_msg->seqno = statLogReceived;
+
+            if (call SendQueue.enqueue(msg) == SUCCESS) {
+                post sendTask();
+                return SUCCESS;
+            } else {
+                statEnqueueFail++;
+                call MessagePool.put(msg);
+                return FAIL;
+            }
+        }
+    }
+    /* Used for DBG_2, DBG_3 */
+    command TRUSTEDBLOCK error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) {
+        statLogReceived++;
+        if (call MessagePool.empty()) {
+            return FAIL;
+        } else {
+            message_t* msg = call MessagePool.get();
+            CollectionDebugMsg* dbg_msg = call UARTSend.getPayload(msg, sizeof(CollectionDebugMsg));
+	    if (dbg_msg == NULL) {
+	      return FAIL;
+	    }
+            memset(dbg_msg, 0, len);
+
+            dbg_msg->type = type;
+            dbg_msg->data.dbg.a = arg1;
+            dbg_msg->data.dbg.b = arg2;
+            dbg_msg->data.dbg.c = arg3;
+            dbg_msg->seqno = statLogReceived;
+
+            if (call SendQueue.enqueue(msg) == SUCCESS) {
+                post sendTask();
+                return SUCCESS;
+            } else {
+                statEnqueueFail++;
+                call MessagePool.put(msg);
+                return FAIL;
+            }
+        }
+    }
+
+}
+    
diff --git a/tos/lib/net/UnicastNameFreeRouting.nc b/tos/lib/net/UnicastNameFreeRouting.nc
new file mode 100644
index 00000000..827faf80
--- /dev/null
+++ b/tos/lib/net/UnicastNameFreeRouting.nc
@@ -0,0 +1,54 @@
+/* $Id: UnicastNameFreeRouting.nc,v 1.4 2006-12-12 18:23:29 vlahan Exp $ */
+/*
+ * "Copyright (c) 2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright.
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor
+ *   the names of its contributors may be used to endorse or promote
+ *   products derived from this software without specific prior written
+ *   permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * REGENTS OF THE UNVERSITY OF CALIFORNIA OR ITS CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ *  Provides a single next hop on a name-free protocol.
+ *
+ *  @author Philip Levis
+ *  @date   $Date: 2006-12-12 18:23:29 $
+ */
+interface UnicastNameFreeRouting {
+
+  /**
+   * Get the address of the best next hop set to the destination.
+   * If there is not best next hop, the address is the local address.
+   * @return : The next best hop, or the local address if there is no route.
+   */
+  command am_addr_t nextHop();
+  command bool hasRoute();
+  
+  event void routeFound();
+  event void noRoute();
+}
+
diff --git a/tos/lib/net/blip/BlipStatistics.h b/tos/lib/net/blip/BlipStatistics.h
new file mode 100644
index 00000000..82eccf41
--- /dev/null
+++ b/tos/lib/net/blip/BlipStatistics.h
@@ -0,0 +1,91 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef _BLIP_STATISTICS_H_
+#define _BLIP_STATISTICS_H_
+
+/* Different IP components provide statistics about their operation. 
+ *
+ * Structures with this information is available here.
+ */
+
+#ifdef BLIP_STATS
+// if we get rid of the increments the compiler can optimize out the
+// statistics data structures when we don't use them.
+#define BLIP_STATS_INCR(X) X++
+#else
+#define BLIP_STATS_INCR(X)
+#endif
+
+
+/* Statistics from the core 6lowpan/IPv6 fragmentation and forwarding engine */
+typedef nx_struct {
+  nx_uint16_t sent;       // total IP datagrams sent
+  nx_uint16_t forwarded;  // total IP datagrams forwarded
+  nx_uint8_t rx_drop;     // L2 frags dropped due to 6lowpan failure
+  nx_uint8_t tx_drop;     // L2 frags dropped due to link failures
+  nx_uint8_t fw_drop;     // L2 frags dropped when forwarding due to queue overflow
+  nx_uint8_t rx_total;    // L2 frags received
+  nx_uint8_t encfail;     // frags dropped due to send queue
+
+#ifdef BLIP_STATS_IP_MEM
+  // statistics about free memory
+  // mostly useful for looking for memory leaks, or looking at
+  // forwarding queue depth.
+  nx_uint8_t fragpool;    // free fragments in pool
+  nx_uint8_t sendinfo;    // free sendinfo structures
+  nx_uint8_t sendentry;   // free send entryies
+  nx_uint8_t sndqueue;    // free send queue entries
+  nx_uint16_t heapfree;   // available free space in the heap
+#endif
+} ip_statistics_t;
+
+
+typedef nx_struct {
+  nx_uint8_t hop_limit;
+  nx_uint16_t parent;
+  nx_uint16_t parent_metric;
+  nx_uint16_t parent_etx;
+} route_statistics_t;
+
+typedef nx_struct {
+  nx_uint8_t sol_rx;
+  nx_uint8_t sol_tx;
+  nx_uint8_t adv_rx;
+  nx_uint8_t adv_tx;
+  nx_uint8_t echo_rx;
+  nx_uint8_t echo_tx;
+  nx_uint8_t unk_rx;
+  nx_uint16_t rx;
+} icmp_statistics_t;
+
+/* Statistics from the UDP transport protocol  */
+typedef nx_struct {
+  nx_uint16_t sent;  // UDP datagrams sent from app
+  nx_uint16_t rcvd;  // UDP datagrams delivered to apps
+  nx_uint16_t cksum; // UDP datagrams dropped due to checksum error
+} udp_statistics_t;
+
+typedef nx_struct {
+  nx_uint16_t lsn;
+} mcast_statistics_t;
+
+#endif
diff --git a/tos/lib/net/blip/IPAddressC.nc b/tos/lib/net/blip/IPAddressC.nc
new file mode 100644
index 00000000..5070918e
--- /dev/null
+++ b/tos/lib/net/blip/IPAddressC.nc
@@ -0,0 +1,33 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+
+configuration IPAddressC {
+  provides interface IPAddress;
+
+} implementation {
+  components IPAddressP, Ieee154AddressC;
+
+  IPAddress = IPAddressP;
+  IPAddressP.Ieee154Address -> Ieee154AddressC;
+}
+
diff --git a/tos/lib/net/blip/IPAddressP.nc b/tos/lib/net/blip/IPAddressP.nc
new file mode 100644
index 00000000..4921553b
--- /dev/null
+++ b/tos/lib/net/blip/IPAddressP.nc
@@ -0,0 +1,167 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+#include <lib6lowpan/lib6lowpan.h>
+#include <lib6lowpan/6lowpan.h>
+
+module IPAddressP {
+  provides {
+    interface IPAddress;
+  }
+  uses {
+    interface Ieee154Address;
+  }
+} implementation {
+  bool m_valid_addr = FALSE, m_short_addr = FALSE;
+  struct in6_addr m_addr;
+
+  command bool IPAddress.getLLAddr(struct in6_addr *addr) {
+    ieee154_panid_t panid = letohs(call Ieee154Address.getPanId());
+    ieee154_saddr_t saddr = letohs(call Ieee154Address.getShortAddr());
+    ieee154_laddr_t laddr = call Ieee154Address.getExtAddr();
+
+    memclr(addr->s6_addr, 16);
+    addr->s6_addr16[0] = htons(0xfe80);
+    if (m_short_addr) {
+      addr->s6_addr16[4] = htons(panid);
+      addr->s6_addr16[5] = htons(0x00FF);
+      addr->s6_addr16[6] = htons(0xFE00);
+      addr->s6_addr16[7] = htons(saddr);
+      addr->s6_addr[8] &= ~0x2;  /* unset U bit  */
+    } else {
+      int i;
+      for (i = 0; i < 8; i++)
+        addr->s6_addr[8+i] = laddr.data[7-i];
+      addr->s6_addr[8] ^= 0x2;  /* toggle U/L bit */
+    }
+
+    return TRUE;
+  }
+
+  command bool IPAddress.getGlobalAddr(struct in6_addr *addr) {
+    *addr = m_addr;
+    return m_valid_addr;
+  }
+
+  command bool IPAddress.setSource(struct ip6_hdr *hdr) {
+    enum { LOCAL, GLOBAL } type = GLOBAL;
+      
+    if (hdr->ip6_dst.s6_addr[0] == 0xff) {
+      // link-local multicast sent from local address
+      if ((hdr->ip6_dst.s6_addr[1] & 0x0f) <= 0x2) {
+        type = LOCAL;
+      }
+    } else if (hdr->ip6_dst.s6_addr[0] == 0xfe) {
+      // link-local destinations sent from link-local
+      if ((hdr->ip6_dst.s6_addr[1] & 0xf0) <= 0x80) {
+        type = LOCAL;
+      }
+    }
+
+    if (type == LOCAL) {
+      return call IPAddress.getLLAddr(&hdr->ip6_src);
+    } else {
+      return call IPAddress.getGlobalAddr(&hdr->ip6_src);
+    }
+  }
+
+  command bool IPAddress.isLocalAddress(struct in6_addr *addr) {
+    ieee154_panid_t panid = letohs(call Ieee154Address.getPanId());
+    ieee154_saddr_t saddr = letohs(call Ieee154Address.getShortAddr());
+    ieee154_laddr_t eui = call Ieee154Address.getExtAddr();
+
+    if (addr->s6_addr16[0] == htons(0xfe80)) {
+      // link-local
+      if (m_short_addr && 
+          addr->s6_addr16[5] == ntohs(0x00FF) &&
+          addr->s6_addr16[6] == ntohs(0xFE00)) {
+        if (ntohs(addr->s6_addr16[4]) == (panid & ~0x200) && 
+            ntohs(addr->s6_addr16[7]) == saddr) {
+          return TRUE;
+        } else {
+          return FALSE;
+        }
+      } 
+
+      return (addr->s6_addr[8] == (eui.data[7] ^ 0x2) && /* invert U/L bit */
+              addr->s6_addr[9] == eui.data[6] &&
+              addr->s6_addr[10] == eui.data[5] &&
+              addr->s6_addr[11] == eui.data[4] &&
+              addr->s6_addr[12] == eui.data[3] &&
+              addr->s6_addr[13] == eui.data[2] &&
+              addr->s6_addr[14] == eui.data[1] &&
+              addr->s6_addr[15] == eui.data[0]);
+
+    } else if (addr->s6_addr[0] == 0xff) {
+      // multicast
+      if ((addr->s6_addr[1] & 0x0f) <= 2) {
+        // accept all LL multicast messages
+        return TRUE;
+      }
+    } else if (memcmp(addr->s6_addr, m_addr.s6_addr, 16) == 0) {
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  /* Check if the address needs routing or of it's link local in scope
+   */
+  command bool IPAddress.isLLAddress(struct in6_addr *addr) {
+    if (addr->s6_addr16[0] == htons(0xfe80) ||
+        (addr->s6_addr[0] == 0xff &&
+         (addr->s6_addr[1] & 0x0f) <= 2))
+      return TRUE;
+    return FALSE;
+  }
+
+  command error_t IPAddress.setAddress(struct in6_addr *addr) {
+    m_addr = *addr;
+#ifdef BLIP_DERIVE_SHORTADDRS
+    if (m_addr.s6_addr[8] == 0 &&
+        m_addr.s6_addr[9] == 0 &&
+        m_addr.s6_addr[10] == 0 &&
+        m_addr.s6_addr[11] == 0 &&
+        m_addr.s6_addr[12] == 0 &&
+        m_addr.s6_addr[13] == 0) {
+      call Ieee154Address.setShortAddr(ntohs(m_addr.s6_addr16[7]));
+      m_short_addr = TRUE;
+    } else {
+      call Ieee154Address.setShortAddr(0);
+      m_short_addr = FALSE;
+    }
+#endif
+
+    m_valid_addr = TRUE;
+    signal IPAddress.changed(TRUE);
+    return SUCCESS;
+  }
+
+  command error_t IPAddress.removeAddress() {
+    m_valid_addr = FALSE;
+    m_short_addr = FALSE;
+    signal IPAddress.changed(FALSE);
+    return SUCCESS;
+  }
+
+  event void Ieee154Address.changed() {}
+
+}
diff --git a/tos/lib/net/blip/IPDispatch.h b/tos/lib/net/blip/IPDispatch.h
new file mode 100644
index 00000000..855f060c
--- /dev/null
+++ b/tos/lib/net/blip/IPDispatch.h
@@ -0,0 +1,46 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef _IPDISPATCH_H_
+#define _IPDISPATCH_H_
+
+#include <message.h>
+
+enum {
+  N_RECONSTRUCTIONS = 3,        /* number of concurrent reconstructions */
+  N_CONCURRENT_SENDS = 3,       /* number of concurrent sends */
+  N_FRAGMENTS = 12,             /* number of link-layer fragments to buffer */
+};
+
+struct send_info {
+  void   *upper_data;
+  uint8_t link_fragments;
+  uint8_t link_transmissions;
+  bool    failed;
+  uint8_t _refcount;
+};
+
+struct send_entry {
+  struct send_info *info;
+  message_t  *msg;
+};
+
+#endif
diff --git a/tos/lib/net/blip/IPDispatchC.nc b/tos/lib/net/blip/IPDispatchC.nc
new file mode 100644
index 00000000..4d1b6a55
--- /dev/null
+++ b/tos/lib/net/blip/IPDispatchC.nc
@@ -0,0 +1,103 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * 
+ *
+ */
+#include "IPDispatch.h"
+#include "BlipStatistics.h"
+
+configuration IPDispatchC {
+  provides {
+    interface SplitControl;
+    interface IPLower;
+    interface BlipStatistics<ip_statistics_t>;
+  }
+} implementation {
+  
+  components MainC;
+  components NoLedsC as LedsC;
+
+  /* IPDispatchP wiring -- fragment rassembly and lib6lowpan bindings */
+  components IPDispatchP;
+  components CC2420RadioC as MessageC;
+  components ReadLqiC;
+  components new TimerMilliC();
+
+  SplitControl = IPDispatchP.SplitControl;
+  IPLower = IPDispatchP;
+  BlipStatistics    = IPDispatchP;
+
+  IPDispatchP.Boot -> MainC;
+/* #else */
+/*   components ResourceSendP; */
+/*   ResourceSendP.SubSend -> MessageC; */
+/*   ResourceSendP.Resource -> MessageC.SendResource[unique("RADIO_SEND_RESOURCE")]; */
+/*   IPDispatchP.Ieee154Send -> ResourceSendP.Ieee154Send; */
+/* #endif */
+  IPDispatchP.RadioControl -> MessageC;
+
+  IPDispatchP.BarePacket -> MessageC.BarePacket;
+  IPDispatchP.Ieee154Send -> MessageC.BareSend;
+  IPDispatchP.Ieee154Receive -> MessageC.BareReceive;
+
+#ifdef LOW_POWER_LISTENING
+   IPDispatchP.LowPowerListening -> MessageC;
+#endif
+
+  IPDispatchP.PacketLink -> MessageC;
+  IPDispatchP.ReadLqi -> ReadLqiC;
+  IPDispatchP.Leds -> LedsC;
+  IPDispatchP.ExpireTimer -> TimerMilliC;
+
+  components new PoolC(message_t, N_FRAGMENTS) as FragPool;
+  components new PoolC(struct send_entry, N_FRAGMENTS) as SendEntryPool;
+  components new QueueC(struct send_entry *, N_FRAGMENTS);
+  components new PoolC(struct send_info, N_CONCURRENT_SENDS) as SendInfoPool;
+  
+  IPDispatchP.FragPool -> FragPool;
+  IPDispatchP.SendEntryPool -> SendEntryPool;
+  IPDispatchP.SendInfoPool  -> SendInfoPool;
+  IPDispatchP.SendQueue -> QueueC;
+
+  components IPNeighborDiscoveryP;
+  IPDispatchP.NeighborDiscovery -> IPNeighborDiscoveryP;
+
+/*   components ICMPResponderC; */
+/* #ifdef BLIP_MULTICAST */
+/*   components MulticastP; */
+/*   components new TrickleTimerMilliC(2, 30, 2, 1); */
+/*   IP = MulticastP.IP; */
+  
+/*   MainC.SoftwareInit -> MulticastP.Init; */
+/*   MulticastP.MulticastRx -> IPDispatchP.Multicast; */
+/*   MulticastP.HopHeader -> IPExtensionP.HopByHopExt[0]; */
+/*   MulticastP.TrickleTimer -> TrickleTimerMilliC.TrickleTimer[0]; */
+/*   MulticastP.IPExtensions -> IPDispatchP; */
+/* #endif */
+
+#ifdef DELUGE
+  components NWProgC;
+#endif
+
+}
diff --git a/tos/lib/net/blip/IPDispatchP.nc b/tos/lib/net/blip/IPDispatchP.nc
new file mode 100644
index 00000000..88263295
--- /dev/null
+++ b/tos/lib/net/blip/IPDispatchP.nc
@@ -0,0 +1,657 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+#include <lib6lowpan/blip-tinyos-includes.h>
+#include <lib6lowpan/6lowpan.h>
+#include <lib6lowpan/lib6lowpan.h>
+#include <lib6lowpan/ip.h>
+#include <lib6lowpan/in_cksum.h>
+#include <lib6lowpan/ip_malloc.h>
+#include <PrintfUART.h>
+
+#include "IPDispatch.h"
+#include "BlipStatistics.h"
+#include "table.h"
+
+/*
+ * Provides IP layer reception to applications on motes.
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@cs.berkeley.edu>
+ */
+
+module IPDispatchP {
+  provides {
+    interface SplitControl;
+    // interface for protocols not requiring special hand-holding
+    interface IPLower;
+
+    interface BlipStatistics<ip_statistics_t>;
+
+  }
+  uses {
+    interface Boot;
+
+
+    /* link-layer wiring */
+    interface SplitControl as RadioControl;
+
+    interface Packet as BarePacket;
+    interface Send as Ieee154Send;
+    interface Receive as Ieee154Receive;
+
+    /* context lookup */
+    interface NeighborDiscovery;
+
+    interface ReadLqi;
+    interface PacketLink;
+    interface LowPowerListening;
+
+    /* buffers for outgoing fragments */
+    interface Pool<message_t> as FragPool;
+    interface Pool<struct send_info> as SendInfoPool;
+    interface Pool<struct send_entry> as SendEntryPool;
+    interface Queue<struct send_entry *> as SendQueue;
+
+    /* expire reconstruction */
+    interface Timer<TMilli> as ExpireTimer;
+
+    interface Leds;
+
+  }
+} implementation {
+
+/* #undef printfUART */
+/* #undef printfUART_buf */
+/* #define printfUART(FMT, args ...) */
+/* #define printfUART_buf(buf, len) */
+
+#ifndef BLIP_L2_RETRIES
+#define BLIP_L2_RETRIES 3
+#endif
+
+#ifndef BLIP_L2_DELAY
+#define BLIP_L2_DELAY 103
+#endif
+
+#define HAVE_LOWPAN_EXTERN_MATCH_CONTEXT
+int lowpan_extern_read_context(struct in6_addr *addr, int context) {
+  return call NeighborDiscovery.getContext(context, addr);
+}
+
+int lowpan_extern_match_context(struct in6_addr *addr, uint8_t *ctx_id) {
+  return call NeighborDiscovery.matchContext(addr, ctx_id);
+}
+
+
+#include <lib6lowpan/ieee154_header.c>
+#include <lib6lowpan/lib6lowpan.c>
+#include <lib6lowpan/lib6lowpan_4944.c>
+#include <lib6lowpan/lib6lowpan_frag.c>
+
+  enum {
+    S_RUNNING,
+    S_STOPPED,
+    S_STOPPING,
+  };
+  uint8_t state = S_STOPPED;
+  bool radioBusy;
+  uint8_t current_local_label = 0;
+  ip_statistics_t stats;
+
+  // this in theory could be arbitrarily large; however, it needs to
+  // be large enough to hold all active reconstructions, and any tags
+  // which we are dropping.  It's important to keep dropped tags
+  // around for a while, or else there are pathological situations
+  // where you continually allocate buffers for packets which will
+  // never complete.
+
+  ////////////////////////////////////////
+  //
+  //
+
+  table_t recon_cache;
+
+  // table of packets we are currently receiving fragments from, that
+  // are destined to us
+  struct lowpan_reconstruct recon_data[N_RECONSTRUCTIONS];
+
+  //
+  //
+  ////////////////////////////////////////
+
+  // task void sendTask();
+
+  void reconstruct_clear(void *ent) {
+    struct lowpan_reconstruct *recon = (struct lowpan_reconstruct *)ent;
+    memclr((uint8_t *)&recon->r_meta, sizeof(struct ip6_metadata));
+    recon->r_timeout = T_UNUSED;
+    recon->r_buf = NULL;
+  }
+
+  struct send_info *getSendInfo() {
+    struct send_info *ret = call SendInfoPool.get();
+    if (ret == NULL) return ret;
+    ret->_refcount = 1;
+    ret->upper_data = NULL;
+    ret->failed = FALSE;
+    ret->link_transmissions = 0;
+    ret->link_fragments = 0;
+    return ret;
+  }
+#define SENDINFO_INCR(X) ((X)->_refcount)++
+void SENDINFO_DECR(struct send_info *si) {
+  if (--(si->_refcount) == 0) {
+    call SendInfoPool.put(si);
+  }
+}
+
+  command error_t SplitControl.start() {
+    return call RadioControl.start();
+  }
+
+  command error_t SplitControl.stop() {
+    if (!radioBusy) {
+      state = S_STOPPED;
+      return call RadioControl.stop();
+    } else {
+      // if there's a packet in the radio, wait for it to exit before
+      // stopping
+      state = S_STOPPING;
+      return SUCCESS;
+    }
+  }
+
+  event void RadioControl.startDone(error_t error) {
+#ifdef LPL_SLEEP_INTERVAL
+    call LowPowerListening.setLocalWakeupInterval(LPL_SLEEP_INTERVAL);
+#endif
+
+    if (error == SUCCESS) {
+      call Leds.led2Toggle();
+      call ExpireTimer.startPeriodic(FRAG_EXPIRE_TIME);
+      state = S_RUNNING;
+      radioBusy = FALSE;
+    }
+
+    signal SplitControl.startDone(error);
+  }
+
+  event void RadioControl.stopDone(error_t error) {
+    signal SplitControl.stopDone(error);
+  }
+
+  event void Boot.booted() {
+    call BlipStatistics.clear();
+
+    ip_malloc_init();
+
+    /* set up our reconstruction cache */
+    table_init(&recon_cache, recon_data, sizeof(struct lowpan_reconstruct), N_RECONSTRUCTIONS);
+    table_map(&recon_cache, reconstruct_clear);
+
+    call SplitControl.start();
+  }
+
+  /*
+   *  Receive-side code.
+   */ 
+  void deliver(struct lowpan_reconstruct *recon) {
+    struct ip6_hdr *iph = (struct ip6_hdr *)recon->r_buf;
+
+    printfUART("deliver [%i]: ", recon->r_bytes_rcvd);
+    printfUART_buf(recon->r_buf, recon->r_bytes_rcvd);
+
+    /* the payload length field is always compressed, have to put it back here */
+    iph->ip6_plen = htons(recon->r_bytes_rcvd - sizeof(struct ip6_hdr));
+    signal IPLower.recv(iph, (void *)(iph + 1), NULL);
+
+    // printfUART("free(%p)\n", recon->r_buf); 
+    free(recon->r_buf);
+    recon->r_timeout = T_UNUSED;
+    recon->r_buf = NULL;
+  }
+
+  /*
+   * Bulletproof recovery logic is very important to make sure we
+   * don't get wedged with no free buffers.
+   * 
+   * The table is managed as follows:
+   *  - unused entries are marked T_UNUSED
+   *  - entries which 
+   *     o have a buffer allocated
+   *     o have had a fragment reception before we fired
+   *     are marked T_ACTIVE
+   *  - entries which have not had a fragment reception during the last timer period
+   *     and were active are marked T_ZOMBIE
+   *  - zombie receptions are deleted: their buffer is freed and table entry marked unused.
+   *  - when a fragment is dropped, it is entered into the table as T_FAILED1.
+   *     no buffer is allocated
+   *  - when the timer fires, T_FAILED1 entries are aged to T_FAILED2.
+   * - T_FAILED2 entries are deleted.  Incomming fragments with tags
+   *     that are marked either FAILED1 or FAILED2 are dropped; this
+   *     prevents us from allocating a buffer for a packet which we
+   *     have already dropped fragments from.
+   *
+   */ 
+  void reconstruct_age(void *elt) {
+    struct lowpan_reconstruct *recon = (struct lowpan_reconstruct *)elt;
+    if (recon->r_timeout != T_UNUSED) 
+      printfUART("recon src: 0x%x tag: 0x%x buf: %p recvd: %i/%i\n", 
+                 recon->r_source_key, recon->r_tag, recon->r_buf, 
+                 recon->r_bytes_rcvd, recon->r_size);
+    switch (recon->r_timeout) {
+    case T_ACTIVE:
+      recon->r_timeout = T_ZOMBIE; break; // age existing receptions
+    case T_FAILED1:
+      recon->r_timeout = T_FAILED2; break; // age existing receptions
+    case T_ZOMBIE:
+    case T_FAILED2:
+      // deallocate the space for reconstruction
+      printfUART("timing out buffer: src: %i tag: %i\n", recon->r_source_key, recon->r_tag);
+      if (recon->r_buf != NULL) {
+        printfUART("free(%p)\n", recon->r_buf); 
+        free(recon->r_buf);
+      }
+      recon->r_timeout = T_UNUSED;
+      recon->r_buf = NULL;
+      break;
+    }
+  }
+
+  void ip_print_heap() {
+#ifdef PRINTFUART_ENABLED
+    bndrt_t *cur = (bndrt_t *)heap;
+    while (((uint8_t *)cur)  - heap < IP_MALLOC_HEAP_SIZE) {
+      printfUART ("heap region start: %p length: %u used: %u\n", 
+                  cur, (*cur & IP_MALLOC_LEN), (*cur & IP_MALLOC_INUSE) >> 15);
+      cur = (bndrt_t *)(((uint8_t *)cur) + ((*cur) & IP_MALLOC_LEN));
+    }
+#endif
+  }
+
+  event void ExpireTimer.fired() {
+    table_map(&recon_cache, reconstruct_age);
+
+    
+    printfUART("Frag pool size: %i\n", call FragPool.size());
+    printfUART("SendInfo pool size: %i\n", call SendInfoPool.size());
+    printfUART("SendEntry pool size: %i\n", call SendEntryPool.size());
+    printfUART("Forward queue length: %i\n", call SendQueue.size());
+    ip_print_heap();
+  }
+
+  /*
+   * allocate a structure for recording information about incomming fragments.
+   */
+
+  struct lowpan_reconstruct *get_reconstruct(uint16_t key, uint16_t tag) {
+    struct lowpan_reconstruct *ret = NULL;
+    int i;
+
+    // printfUART("get_reconstruct: %x %i\n", key, tag);
+
+    for (i = 0; i < N_RECONSTRUCTIONS; i++) {
+      struct lowpan_reconstruct *recon = (struct lowpan_reconstruct *)&recon_data[i];
+
+      if (recon->r_tag == tag &&
+          recon->r_source_key == key) {
+
+        if (recon->r_timeout > T_UNUSED) {          
+          recon->r_timeout = T_ACTIVE;
+          ret = recon;
+          goto done;
+
+        } else if (recon->r_timeout < T_UNUSED) {
+          // if we have already tried and failed to get a buffer, we
+          // need to drop remaining fragments.
+          ret = NULL;
+          goto done;
+        }
+      }
+      if (recon->r_timeout == T_UNUSED) 
+        ret = recon;
+    }
+  done:
+    // printfUART("got%p\n", ret);
+    return ret;
+  }
+
+  event message_t *Ieee154Receive.receive(message_t *msg, void *msg_payload, uint8_t len) {
+    struct packed_lowmsg lowmsg;
+    struct ieee154_frame_addr frame_address;
+    uint8_t *buf = msg_payload;
+
+    printfUART(" -- RECEIVE -- len : %i\n", len);
+
+    BLIP_STATS_INCR(stats.rx_total);
+
+    /* unpack the 802.15.4 address fields */
+    buf  = unpack_ieee154_hdr(msg_payload, &frame_address);
+    len -= buf - (uint8_t *)msg_payload;
+
+    /* unpack and 6lowpan headers */
+    lowmsg.data = buf;
+    lowmsg.len  = len;
+    lowmsg.headers = getHeaderBitmap(&lowmsg);
+    if (lowmsg.headers == LOWMSG_NALP) {
+      goto fail;
+    }
+
+    if (hasFrag1Header(&lowmsg) || hasFragNHeader(&lowmsg)) {
+      // start reassembly
+      int rv;
+      struct lowpan_reconstruct *recon;
+      uint16_t tag, source_key;
+
+      source_key = ieee154_hashaddr(&frame_address.ieee_src);
+      getFragDgramTag(&lowmsg, &tag);
+      recon = get_reconstruct(source_key, tag);
+      if (!recon) {
+        goto fail;
+      }
+
+      if (hasFrag1Header(&lowmsg)) {
+        if (recon->r_buf != NULL) goto fail;
+        rv = lowpan_recon_start(&frame_address, recon, buf, len);
+      } else {
+        rv = lowpan_recon_add(recon, buf, len);
+      }
+        
+      if (rv < 0) {
+        recon->r_timeout = T_FAILED1;
+        goto fail;
+      } else {
+        // printfUART("start recon buf: %p\n", recon->r_buf);
+        recon->r_timeout = T_ACTIVE;
+        recon->r_source_key = source_key;
+        recon->r_tag = tag;
+      }
+
+      if (recon->r_size == recon->r_bytes_rcvd) {
+        deliver(recon);
+      }
+
+    } else {
+      /* no fragmentation, just deliver it */
+      int rv;
+      struct lowpan_reconstruct recon;
+
+      buf = getLowpanPayload(&lowmsg);
+      if ((rv = lowpan_recon_start(&frame_address, &recon, buf, len)) < 0) {
+        goto fail;
+      }
+
+      if (recon.r_size == recon.r_bytes_rcvd) {
+        deliver(&recon);
+      } else {
+        // printfUART("free(%p)\n", recon.r_buf); 
+        free(recon.r_buf);
+      }
+    }
+    goto done;
+  fail:
+    BLIP_STATS_INCR(stats.rx_drop);
+  done:
+    return msg;
+  }
+
+
+  /*
+   * Send-side functionality
+   */
+  task void sendTask() {
+    struct send_entry *s_entry;
+
+    // printfUART("sendTask() - sending\n");
+
+    if (radioBusy || state != S_RUNNING) return;
+    if (call SendQueue.empty()) return;
+    // this does not dequeue
+    s_entry = call SendQueue.head();
+
+/* #ifdef LPL_SLEEP_INTERVAL */
+/*     call LowPowerListening.setRemoteWakeupInterval(s_entry->msg,  */
+/*             call LowPowerListening.getLocalWakeupInterval()); */
+/* #endif */
+
+    if (s_entry->info->failed) {
+      dbg("Drops", "drops: sendTask: dropping failed fragment\n");
+      goto fail;
+    }
+
+    if ((call Ieee154Send.send(s_entry->msg,
+                               call BarePacket.payloadLength(s_entry->msg))) != SUCCESS) {
+      dbg("Drops", "drops: sendTask: send failed\n");
+      goto fail;
+    } else {
+      radioBusy = TRUE;
+    }
+
+    return;
+  fail:
+    printfUART("SEND FAIL\n");
+    post sendTask();
+    BLIP_STATS_INCR(stats.tx_drop);
+
+    // deallocate the memory associated with this request.
+    // other fragments associated with this packet will get dropped.
+    s_entry->info->failed = TRUE;
+    SENDINFO_DECR(s_entry->info);
+    call FragPool.put(s_entry->msg);
+    call SendEntryPool.put(s_entry);
+    call SendQueue.dequeue();
+  }
+  
+
+  /*
+   *  it will pack the message into the fragment pool and enqueue
+   *  those fragments for sending
+   *
+   * it will set
+   *  - payload length
+   *  - version, traffic class and flow label
+   *
+   * the source and destination IP addresses must be set by higher
+   * layers.
+   */
+  command error_t IPLower.send(struct ieee154_frame_addr *frame_addr,
+                               struct ip6_packet *msg,
+                               void  *data) {
+    struct lowpan_ctx ctx;
+    struct send_info  *s_info;
+    struct send_entry *s_entry;
+    message_t *outgoing;
+
+    int frag_len = 1;
+    error_t rc = SUCCESS;
+
+    if (state != S_RUNNING) {
+      return EOFF;
+    }
+
+    /* set version to 6 in case upper layers forgot */
+    msg->ip6_hdr.ip6_vfc &= ~IPV6_VERSION_MASK;
+    msg->ip6_hdr.ip6_vfc |= IPV6_VERSION;
+
+    ctx.tag = current_local_label++;
+    ctx.offset = 0;
+
+    s_info = getSendInfo();
+    if (s_info == NULL) {
+      rc = ERETRY;
+      goto cleanup_outer;
+    }
+    s_info->upper_data = data;
+
+    while (frag_len > 0) {
+      s_entry  = call SendEntryPool.get();
+      outgoing = call FragPool.get();
+
+      if (s_entry == NULL || outgoing == NULL) {
+        if (s_entry != NULL)
+          call SendEntryPool.put(s_entry);
+        if (outgoing != NULL)
+          call FragPool.put(outgoing);
+        // this will cause any fragments we have already enqueued to
+        // be dropped by the send task.
+        s_info->failed = TRUE;
+        printfUART("drops: IP send: no fragments\n");
+        rc = ERETRY;
+        goto done;
+      }
+
+      call BarePacket.clear(outgoing);
+      frag_len = lowpan_frag_get(call Ieee154Send.getPayload(outgoing, 0),
+                                 call BarePacket.maxPayloadLength(),
+                                 msg,
+                                 frame_addr,
+                                 &ctx);
+      if (frag_len < 0) {
+        printfUART(" get frag error: %i\n", frag_len);
+      }
+
+      printfUART("fragment length: %i offset: %i\n", frag_len, ctx.offset);
+      call BarePacket.setPayloadLength(outgoing, frag_len);
+
+      if (frag_len <= 0) {
+        call FragPool.put(outgoing);
+        call SendEntryPool.put(s_entry);
+        goto done;
+      }
+
+      if (call SendQueue.enqueue(s_entry) != SUCCESS) {
+        BLIP_STATS_INCR(stats.encfail);
+        s_info->failed = TRUE;
+        printfUART("drops: IP send: enqueue failed\n");
+        goto done;
+      }
+
+      s_info->link_fragments++;
+      s_entry->msg = outgoing;
+      s_entry->info = s_info;
+
+      /* configure the L2 */
+      if (frame_addr->ieee_dst.ieee_mode == IEEE154_ADDR_SHORT &&
+          frame_addr->ieee_dst.i_saddr == IEEE154_BROADCAST_ADDR) {
+        call PacketLink.setRetries(s_entry->msg, 0);
+      } else {
+        call PacketLink.setRetries(s_entry->msg, BLIP_L2_RETRIES);
+      }
+      call PacketLink.setRetryDelay(s_entry->msg, BLIP_L2_DELAY);
+
+      SENDINFO_INCR(s_info);}
+       
+    // printfUART("got %i frags\n", s_info->link_fragments);
+  done:
+    BLIP_STATS_INCR(stats.sent);
+    SENDINFO_DECR(s_info);
+    post sendTask();
+  cleanup_outer:
+    return rc;
+  }
+
+  event void Ieee154Send.sendDone(message_t *msg, error_t error) {
+    struct send_entry *s_entry = call SendQueue.head();
+
+    radioBusy = FALSE;
+
+    // printfUART("sendDone: %p %i\n", msg, error);
+
+    if (state == S_STOPPING) {
+      call RadioControl.stop();
+      state = S_STOPPED;
+      goto done;
+    }
+    
+    s_entry->info->link_transmissions += (call PacketLink.getRetries(msg));
+    signal IPLower.sendDone(s_entry->info);
+
+    if (!call PacketLink.wasDelivered(msg)) {
+      printfUART("sendDone: was not delivered! (%i tries)\n", 
+                 call PacketLink.getRetries(msg));
+      s_entry->info->failed = TRUE;
+/*       if (s_entry->info->policy.dest[0] != 0xffff) */
+/*         dbg("Drops", "drops: sendDone: frag was not delivered\n"); */
+      // need to check for broadcast frames
+      // BLIP_STATS_INCR(stats.tx_drop);
+    }
+
+  done:
+    // kill off any pending fragments
+    SENDINFO_DECR(s_entry->info);
+    call FragPool.put(s_entry->msg);
+    call SendEntryPool.put(s_entry);
+    call SendQueue.dequeue();
+
+    post sendTask();
+  }
+
+#if 0
+  command struct tlv_hdr *IPExtensions.findTlv(struct ip6_ext *ext, uint8_t tlv_val) {
+    int len = ext->len - sizeof(struct ip6_ext);
+    struct tlv_hdr *tlv = (struct tlv_hdr *)(ext + 1);
+    while (len > 0) {
+      if (tlv->type == tlv_val) return tlv;
+      if (tlv->len == 0) return NULL;
+      tlv = (struct tlv_hdr *)(((uint8_t *)tlv) + tlv->len);
+      len -= tlv->len;
+    }
+    return NULL;
+  }
+#endif
+
+
+  /*
+   * BlipStatistics interface
+   */
+  command void BlipStatistics.get(ip_statistics_t *statistics) {
+#ifdef BLIP_STATS_IP_MEM
+    stats.fragpool = call FragPool.size();
+    stats.sendinfo = call SendInfoPool.size();
+    stats.sendentry= call SendEntryPool.size();
+    stats.sndqueue = call SendQueue.size();
+    stats.heapfree = ip_malloc_freespace();
+    printfUART("frag: %i sendinfo: %i sendentry: %i sendqueue: %i heap: %i\n",
+               stats.fragpool,
+               stats.sendinfo,
+               stats.sendentry,
+               stats.sndqueue,
+               stats.heapfree);
+#endif
+    memcpy(statistics, &stats, sizeof(ip_statistics_t));
+
+  }
+
+  command void BlipStatistics.clear() {
+    memclr((uint8_t *)&stats, sizeof(ip_statistics_t));
+  }
+
+/*   default event void IP.recv[uint8_t nxt_hdr](struct ip6_hdr *iph, */
+/*                                               void *payload, */
+/*                                               struct ip_metadata *meta) { */
+/*   } */
+
+/*   default event void Multicast.recv[uint8_t scope](struct ip6_hdr *iph, */
+/*                                                    void *payload, */
+/*                                                    struct ip_metadata *meta) { */
+/*   } */
+}
diff --git a/tos/lib/net/blip/IPExtensionP.nc b/tos/lib/net/blip/IPExtensionP.nc
new file mode 100644
index 00000000..415e868b
--- /dev/null
+++ b/tos/lib/net/blip/IPExtensionP.nc
@@ -0,0 +1,144 @@
+
+/* 
+ * Provides various functions for dealing with IP extension header
+ * processing
+
+ *
+ */
+
+#include <ip_malloc.h>
+
+module IPExtensionP {
+  provides {
+    // for inserting destination and hop-by-hop headers on outgoing packets.
+    // routing headers are handled through the IPRouting interface
+    interface Init;
+    interface TLVHeader as HopByHopExt[uint8_t client];
+    interface TLVHeader as DestinationExt[uint8_t client];
+    interface InternalIPExtension;
+  }
+} implementation {
+
+  struct generic_header *ext_dest, *ext_hop;
+
+  command error_t Init.init() {
+    ext_hop = ext_dest = NULL;
+    return SUCCESS;
+  }
+
+  struct tlv_hdr *destopt_get(int i, int nxt_hdr, struct ip6_hdr *iph) {
+    return signal DestinationExt.getHeader[i](0, nxt_hdr, iph);
+  }
+  struct tlv_hdr *hopopt_get(struct ip6_hdr *iph, int i) { //, uint8_t nxt_hdr) {
+    // return signal HopByHopExt.getHeader[i](label, iph, nxt_hdr);
+    return NULL;
+  }
+
+  /* build up a sequence of TLV headers for hop-by-hop or
+     destination only extension headers */
+  struct generic_header *buildTLVHdr(struct split_ip_msg *msg,
+                                     int which, 
+                                     int n, int nxt_hdr) {
+    // allocate generic headers for all the possible TLV-encoded
+    // headers we might get
+    int i;
+    uint8_t *buf = ip_malloc(sizeof(struct ip6_ext) + (sizeof(struct generic_header) * (n + 1)));
+    struct ip6_ext *real_hdr;
+    struct generic_header *ghdrs;
+    if (buf == NULL) return NULL;
+    ghdrs = (struct generic_header *)buf;
+    real_hdr = (struct ip6_ext *)(ghdrs + (n + 1));
+
+
+    real_hdr->len = sizeof(struct ip6_ext);
+
+    ghdrs[0].len = sizeof(struct ip6_ext);
+    ghdrs[0].hdr.data = (uint8_t *)real_hdr;
+    ghdrs[0].next = msg->headers;
+
+    for (i = 0; i < n; i++) {
+      struct tlv_hdr *this_hdr;
+      if (which == 0) {
+        printfUART("adding destination idx %i\n", i);
+        this_hdr = signal DestinationExt.getHeader[i](0, nxt_hdr, &msg->hdr);
+      } else {
+        this_hdr = signal HopByHopExt.getHeader[i](0, nxt_hdr, &msg->hdr);
+      }
+
+      printfUART("buildTLV: got %p\n", this_hdr);
+      if (this_hdr == NULL) continue;
+
+      real_hdr->len += this_hdr->len;
+      ghdrs[i+1].len = this_hdr->len;
+      ghdrs[i+1].hdr.data = (uint8_t *)this_hdr;
+      ghdrs[i].next = &ghdrs[i+1];
+      ghdrs[i+1].next = msg->headers;
+    }
+    if (real_hdr->len == sizeof(struct ip6_ext)) {
+      ip_free(buf);
+      return NULL;
+    } else {
+      real_hdr->nxt_hdr = msg->hdr.nxt_hdr;
+      msg->headers = ghdrs;
+      return ghdrs;
+    }
+  }
+
+  command void InternalIPExtension.addHeaders(struct split_ip_msg *msg, 
+                                              uint8_t nxt_hdr,
+                                              uint16_t label) {
+
+    ext_dest = ext_hop = NULL;
+    msg->hdr.nxt_hdr = nxt_hdr;
+    ext_dest = buildTLVHdr(msg, 0, 1, nxt_hdr);
+    if (ext_dest != NULL) msg->hdr.nxt_hdr = IPV6_DEST;
+
+    ext_hop = buildTLVHdr(msg, 1, 1, msg->hdr.nxt_hdr);
+    if (ext_hop != NULL) msg->hdr.nxt_hdr = IPV6_HOP;
+  }
+
+  command void InternalIPExtension.free() {
+    if (ext_dest != NULL) ip_free(ext_dest);
+    if (ext_hop  != NULL) ip_free(ext_hop);
+    ext_dest = ext_hop = NULL;
+    // signal HopByHopExt.free[0]();
+    // signal DestinationExt.free[0]();
+  }
+
+#if 0
+  void ip_dump_msg(struct split_ip_msg *msg) {
+    struct generic_header *cur = msg->headers;
+    int i;
+    printfUART("DUMPING IP PACKET\n ");
+    for (i = 0; i < sizeof(struct ip6_hdr); i++)
+      printfUART("0x%x ", ((uint8_t *)&msg->hdr)[i]);
+    printfUART("\n");
+
+    while (cur != NULL) {
+      printfUART(" header [%i]: ", cur->len);
+      for (i = 0; i < cur->len; i++) 
+        printfUART("0x%x ", cur->hdr.data[i]);
+      printfUART("\n");
+      cur = cur->next;
+    }
+
+    printfUART("data [%i]: ", msg->data_len);
+    for (i = 0; i < msg->data_len; i++) 
+      printfUART("0x%x ", ((uint8_t *)msg->data)[i]);
+    printfUART("\n\n");
+  }
+#endif
+
+  default event struct tlv_hdr *DestinationExt.getHeader[uint8_t i](int label,int nxt_hdr,
+                                                                   struct ip6_hdr *msg) {
+    printfUART("default dest handler?\n");
+    return NULL;
+  }
+
+  default event struct tlv_hdr *HopByHopExt.getHeader[uint8_t i](int label,int nxt_hdr,
+                                                                   struct ip6_hdr *msg) {
+    return NULL;
+  }
+
+
+}
diff --git a/tos/lib/net/blip/IPExtensionsP.nc b/tos/lib/net/blip/IPExtensionsP.nc
new file mode 100644
index 00000000..d82322ce
--- /dev/null
+++ b/tos/lib/net/blip/IPExtensionsP.nc
@@ -0,0 +1,33 @@
+
+module IPExtensionsP {
+  provides interface IPExtensions[uint8_t client];
+  uses interface IPExtensions;
+} implementation {
+
+
+
+
+  command struct tlv_hdr *findTlv(struct ip6_ext *ext, uint8_t tlv) {
+
+  }
+
+  event void handleExtensions(uint8_t label,
+                              struct ip6_hdr *iph,
+                              struct ip6_ext *hop,
+                              struct ip6_ext *dst,
+                              struct ip6_route *route,
+                              uint8_t nxt_hdr) {
+
+  }
+
+
+
+
+  /*
+   * will be called once for each fragment when sending or forwarding
+   */
+  event void reportTransmission(uint8_t label, send_policy_t *send) {
+
+  }
+
+}
diff --git a/tos/lib/net/blip/IPForwardingEngineP.nc b/tos/lib/net/blip/IPForwardingEngineP.nc
new file mode 100644
index 00000000..e9263f00
--- /dev/null
+++ b/tos/lib/net/blip/IPForwardingEngineP.nc
@@ -0,0 +1,329 @@
+/**
+ * Forwarding abstractions for blip IPv6 stack.
+ *
+ * Routing protocols can manipulate the forwarding state using the
+ * ForwardingTable interface and receive notifications of forwarding
+ * events using ForwardingEvents.  In particular, the forwarding
+ * events are useful for datapath validation and updating link
+ * estimates.
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+
+#include <PrintfUART.h>
+#include <iprouting.h>
+#include <lib6lowpan/ip.h>
+module IPForwardingEngineP {
+  provides {
+    interface ForwardingTable;
+    interface ForwardingEvents[uint8_t ifindex];
+    interface IP;
+    interface IP as IPRaw;
+    interface Init;
+  }
+  uses {
+    interface IPForward[uint8_t ifindex];
+    interface IPAddress;
+    interface IPPacket;
+
+    interface Timer<TMilli> as PrintTimer;
+    interface Leds;
+  }
+} implementation {
+  /*
+#undef printfUART
+#undef printfUART_buf
+#undef printfUART_in6addr
+#define printfUART(FMT, args ...)
+#define printfUART_buf(buf, len)
+#define printfUART_in6addr(X)
+*/
+#define min(X,Y) (((X) < (Y)) ? (X) : (Y))
+
+  /* simple routing table for now */
+  /* we can optimize memory consumption later since most of these
+     address will have known prefixes -- either LL or the shared
+     global prefix. */
+  /* the routing table is sorted by prefix length, so that the entries
+     with the longest prefix are at the top. */
+  /* if a route to the given prefix already exists, this updates it. */
+  struct route_entry routing_table[ROUTE_TABLE_SZ];
+
+  route_key_t last_key = 1;
+
+  command error_t Init.init() {
+    memset(routing_table, 0, sizeof(routing_table));
+  }
+
+  struct route_entry *alloc_entry(int pfxlen) {
+    int i;
+    /* full table */
+    if (routing_table[ROUTE_TABLE_SZ-1].valid) return NULL;
+
+    for (i = 0; i < ROUTE_TABLE_SZ; i++) {
+      /* if there's an invalid entry there are spare entries and we
+         don't have to insert in the middle of the table. */
+      if (!routing_table[i].valid) goto init_entry;
+      /* we keep the table sorted by prefix length so we skip all the
+         entries with longer prefixes. */
+      else if (routing_table[i].prefixlen >= pfxlen) continue;
+
+      /* we're pointing at a valid entry that is our new slot; we know
+         there's at least one free entry in the table, too. */
+      /* shift the table down and return the current entry; */
+      memmove((void *)&routing_table[i+1], (void *)&routing_table[i],
+              sizeof(struct route_entry) * (ROUTE_TABLE_SZ - i - 1));
+      goto init_entry;
+    }
+    return NULL;
+  init_entry:
+    routing_table[i].valid = 1;
+    routing_table[i].key = ++last_key;
+    return &routing_table[i];
+  }
+
+  command route_key_t ForwardingTable.addRoute(const uint8_t *prefix, 
+                                               int prefix_len_bits,
+                                               struct in6_addr *next_hop,
+                                               uint8_t ifindex) {
+    struct route_entry *entry;
+    /* no reason to support non-byte length prefixes for now... */
+    if (prefix_len_bits % 8 != 0 || prefix_len_bits > 128) return ROUTE_INVAL_KEY;
+    entry = call ForwardingTable.lookupRoute(prefix, prefix_len_bits);
+    if (entry == NULL || entry->prefixlen != prefix_len_bits) {
+      /* if there's no entry, or there's another entry but it has a
+         different prefix length, we allocate a new slot in the
+         table. */
+      entry = alloc_entry(prefix_len_bits);
+    }
+    if (entry == NULL) 
+      return ROUTE_INVAL_KEY;
+
+    entry->prefixlen = prefix_len_bits;
+    entry->ifindex = ifindex;
+    memcpy(&entry->prefix, prefix, prefix_len_bits / 8);
+    if (next_hop)
+      memcpy(&entry->next_hop, next_hop, sizeof(struct in6_addr));
+    return entry->key;
+  }
+
+  command error_t ForwardingTable.delRoute(route_key_t key) {
+    int i;
+    for (i = 0; i < ROUTE_TABLE_SZ; i++) {
+      if (routing_table[i].key == key) {
+        memmove((void *)&routing_table[i], (void *)&routing_table[i+1],
+                sizeof(struct route_entry) * (ROUTE_TABLE_SZ - i - 1));
+        return SUCCESS;
+      }
+    }
+    return FAIL;
+  }
+
+  /**
+   * Look up the route to a prefix.
+   *
+   * If next_hop is not NULL, the next hop will be written in there. 
+   * @return the route key associated with this route.
+   */
+  command struct route_entry *ForwardingTable.lookupRoute(const uint8_t *prefix, 
+                                                          int prefix_len_bits) {
+    int i;
+    for (i = 0; i < ROUTE_TABLE_SZ; i++) {
+      if (routing_table[i].valid &&
+	  ((routing_table[i].prefixlen == 0) || 
+	   (memcmp(prefix, routing_table[i].prefix.s6_addr, 
+		   min(prefix_len_bits, routing_table[i].prefixlen) / 8) == 0 && 
+            prefix_len_bits))) {
+        /* match! */
+        return &routing_table[i];
+      }
+    }
+    return NULL;
+  }
+  command struct route_entry *ForwardingTable.lookupRouteKey(route_key_t key) {
+    int i;
+    for (i = 0; i < ROUTE_TABLE_SZ; i++) {
+      if (routing_table[i].valid && 
+          routing_table[i].key == key)
+        return &routing_table[i];
+    }
+    return NULL;
+  }
+
+  command struct route_entry *ForwardingTable.getTable(int *n) {
+    *n = ROUTE_TABLE_SZ;
+    return routing_table;
+  }
+
+  command error_t IP.send(struct ip6_packet *pkt) {
+
+    struct route_entry *next_hop_entry = 
+      call ForwardingTable.lookupRoute(pkt->ip6_hdr.ip6_dst.s6_addr, 128);
+
+    if (!call PrintTimer.isRunning())
+      call PrintTimer.startPeriodic(10000);
+
+    if (call IPAddress.isLocalAddress(&pkt->ip6_hdr.ip6_dst) && 
+        pkt->ip6_hdr.ip6_dst.s6_addr[0] != 0xff) {
+      printfUART("Forwarding -- send with local unicast address!\n");
+      return FAIL;
+    } else if (call IPAddress.isLLAddress(&pkt->ip6_hdr.ip6_dst) &&
+               (!next_hop_entry || next_hop_entry->prefixlen < 128)) {
+      /* in this case, we need to figure out which interface the
+         source address is attached to, and send the packet out on
+         that interface. */
+      /* with traditional ND we would check the cache for each
+         interface and then start discover on all of them; however,
+         since we're assuming that link-local addresses are on-link
+         for the 15.4 side, we just send all LL addresses that way. */
+      /* this is probably the worst part about not doing ND -- LL
+         addressed don't work on other links...  we should probably do
+         ND in this case, or at least keep a cache so we can reply to
+         messages on the right interface. */
+      printfUART("Forwarding -- send to LL address\n");
+      pkt->ip6_hdr.ip6_hlim = 1;
+      return call IPForward.send[ROUTE_IFACE_154](&pkt->ip6_hdr.ip6_dst, pkt, 
+                                                  (void *)ROUTE_INVAL_KEY);
+    } else if (next_hop_entry) {
+      printfUART("Forwarding -- got from routing table\n");
+
+      /* control messages do not need routing headers */
+      if (!(signal ForwardingEvents.initiate[next_hop_entry->ifindex](pkt,
+                                             &next_hop_entry->next_hop)))
+        return FAIL;
+
+      return call IPForward.send[next_hop_entry->ifindex](&next_hop_entry->next_hop, pkt, 
+                                                          (void *)next_hop_entry->key);
+    } 
+    return FAIL;
+  }
+
+  command error_t IPRaw.send(struct ip6_packet *pkt) {
+    return FAIL;
+  }
+
+  event void IPForward.recv[uint8_t ifindex](struct ip6_hdr *iph, void *payload, 
+                                             struct ip6_metadata *meta) {
+    struct ip6_packet pkt;
+    struct in6_addr *next_hop;
+    size_t len = ntohs(iph->ip6_plen);
+    struct ip_iovec v[1];
+    route_key_t next_hop_key = ROUTE_INVAL_KEY;
+    uint8_t next_hop_ifindex;
+
+    /* signaled before *any* processing  */
+    signal IPRaw.recv(iph, payload, len, meta);
+
+    if (call IPAddress.isLocalAddress(&iph->ip6_dst)) {
+      /* local delivery */
+      printfUART("Local delivery\n");
+      signal IP.recv(iph, payload, len, meta);
+    } else {
+      /* forwarding */
+      int header_off = call IPPacket.findHeader(payload, len,
+                                                iph->ip6_nxt, IPV6_ROUTING);
+      if (!(--iph->ip6_hlim)) {
+        /* ICMP may send time exceeded */
+        // call ForwardingEvents.drop(iph, payload, len, ROUTE_DROP_HLIM);
+        return;
+      }
+
+      if (header_off >= 0) {
+        //  we found a routing header in the packet
+        //  look up the next hop in the header if we understand it (type 4)
+        // TODO
+        //  next_hop_ifindex = ifindex;
+        return;
+      } else {
+        /* look up the next hop in the routing table */
+        struct route_entry *next_hop_entry = 
+          call ForwardingTable.lookupRoute(iph->ip6_dst.s6_addr,
+                                           128);
+        if (next_hop_entry == NULL) {
+          /* oops, no route. */
+          /* RPL will reencapsulate the packet in some cases here */
+          // call ForwardingEvents.drop(iph, payload, len, ROUTE_DROP_NOROUTE);
+          return; 
+        }
+        next_hop = &next_hop_entry->next_hop;
+        next_hop_key = next_hop_entry->key;
+        next_hop_ifindex = next_hop_entry->ifindex;
+      }
+
+      memcpy(&pkt.ip6_hdr, iph, sizeof(struct ip6_hdr));
+      pkt.ip6_data = &v[0];
+      v[0].iov_next = NULL;
+      v[0].iov_base = payload;
+      v[0].iov_len  = len;
+
+      /* give the routing protocol a chance to do data-path validation
+         on this packet. */
+      /* RPL uses this to update the flow label fields */
+      if (!(signal ForwardingEvents.approve[next_hop_ifindex](iph, 
+                   (struct ip6_route*) payload, next_hop)))
+        return;
+      printfUART("Recv: Forward Packet\n");
+      call IPForward.send[next_hop_ifindex](next_hop, &pkt, (void *)next_hop_key);
+    }
+  }
+  
+  event void IPForward.sendDone[uint8_t ifindex](struct send_info *status) {
+    struct route_entry *entry;
+    uint8_t etx = status->link_transmissions;
+    int key = (int)status->upper_data;
+    printfUART("sendDone: iface: %i key: %i\n", ifindex, key);
+    if (key != ROUTE_INVAL_KEY) {
+      entry = call ForwardingTable.lookupRouteKey(key);
+      if (entry) {
+        printfUART("got entry... signal %d\n", etx);
+        signal ForwardingEvents.linkResult[ifindex](&entry->next_hop, status);
+      }
+    }
+  }
+
+  event void PrintTimer.fired() {
+    int i;
+    printfUART("\ndestination                 gateway            interface\n");
+    for (i = 0; i < ROUTE_TABLE_SZ; i++) {
+      if (routing_table[i].valid) {
+        printfUART_in6addr(&routing_table[i].prefix);
+        printfUART("/%i\t\t", routing_table[i].prefixlen);
+        printfUART_in6addr(&routing_table[i].next_hop);
+        printfUART("\t\t%i\n", routing_table[i].ifindex);
+      }
+    }
+    printfUART("\n");
+  }
+
+  default event bool ForwardingEvents.approve[uint8_t idx](struct ip6_hdr *iph,
+                                                          struct ip6_route *rhdr,
+                                                          struct in6_addr *next_hop) {
+    return TRUE;
+  }
+  default event bool ForwardingEvents.initiate[uint8_t idx](struct ip6_packet *pkt,
+                                                            struct in6_addr *next_hop) {
+    return TRUE;
+  }
+  default event void ForwardingEvents.linkResult[uint8_t idx](struct in6_addr *host,
+                                                              struct send_info * info) {}
+  
+/*   default event void ForwardingEvents.drop[uint8_t idx](struct ip6_hdr *iph, */
+/*                                                         void *payload, */
+/*                                                         size_t len, */
+/*                                                         int reason) {} */
+
+  default command error_t IPForward.send[uint8_t ifindex](struct in6_addr *next_hop,
+                                                          struct ip6_packet *pkt,
+                                                          void *data) {
+//     if (ifindex == ROUTE_IFACE_ALL) {
+//       call IPForward.send[ROUTE_IFACE_PPP](next_hop, pkt, data);
+//       call IPForward.send[ROUTE_IFACE_154](next_hop, pkt, data);
+//     }
+    return SUCCESS;
+  }
+
+  default event void IPRaw.recv(struct ip6_hdr *iph, void *payload,
+                                size_t len, struct ip6_metadata *meta) {}
+
+  event void IPAddress.changed(bool global_valid) {}
+}
diff --git a/tos/lib/net/blip/IPNeighborDiscoveryC.nc b/tos/lib/net/blip/IPNeighborDiscoveryC.nc
new file mode 100644
index 00000000..05913e31
--- /dev/null
+++ b/tos/lib/net/blip/IPNeighborDiscoveryC.nc
@@ -0,0 +1,19 @@
+
+configuration IPNeighborDiscoveryC {
+  provides {
+    interface NeighborDiscovery;
+    interface IPForward;
+  } 
+  uses {
+    interface IPLower;
+  }
+} implementation {
+  components IPNeighborDiscoveryP, IPAddressC, Ieee154AddressC;
+
+  NeighborDiscovery = IPNeighborDiscoveryP;
+  IPForward = IPNeighborDiscoveryP;
+  IPNeighborDiscoveryP.IPLower = IPLower;
+
+  IPNeighborDiscoveryP.IPAddress -> IPAddressC;
+  IPNeighborDiscoveryP.Ieee154Address -> Ieee154AddressC;
+}
diff --git a/tos/lib/net/blip/IPNeighborDiscoveryP.nc b/tos/lib/net/blip/IPNeighborDiscoveryP.nc
new file mode 100644
index 00000000..b4e06b43
--- /dev/null
+++ b/tos/lib/net/blip/IPNeighborDiscoveryP.nc
@@ -0,0 +1,139 @@
+/**
+ * Neighbor Discover for blip
+ *
+ * In IPv6, neighbor discovery resolves IPv6 address which have been
+ * determined to be on-link to their associated link-layer addresses.
+ * This simple component follows the advice of 6lowpan-nd, which
+ * states that link-local addresses are derived from the associated
+ * link-layer addressed deterministically.  Therefore, we can do a
+ * very simple translation between the two types of addresses.
+ *
+ * In the future, implementors could consider adding more complicated
+ * address resolution mechanisms here.
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+#include <lib6lowpan/ip.h>
+
+module IPNeighborDiscoveryP {
+  provides {
+    interface IPForward;
+    interface NeighborDiscovery;
+  } 
+  uses {
+    interface IPLower;
+    interface IPAddress;
+    interface Ieee154Address;
+  }
+} implementation {
+
+#undef printfUART
+#undef printfUART_buf
+#undef printfUART_in6addr
+#define printfUART(FMT, args ...)
+#define printfUART_buf(buf, len)
+#define printfUART_in6addr(X)
+
+
+  command int NeighborDiscovery.matchContext(struct in6_addr *addr, 
+                                             uint8_t *ctx) {
+    if (addr->s6_addr[0] == 0xaa &&
+        addr->s6_addr[1] == 0xaa &&
+        addr->s6_addr16[1] == 0 &&
+        addr->s6_addr16[2] == 0 &&
+        addr->s6_addr16[3] == 0) {
+      *ctx = 0;
+      return 64;
+    } else {
+      return 0;
+    }
+  }
+
+  command int NeighborDiscovery.getContext(uint8_t context, 
+                                           struct in6_addr *ctx) {
+    if (context == 0) {
+      memset(ctx->s6_addr, 0, 8);
+      ctx->s6_addr16[0] = htons(0xaaaa);
+      return 64;
+    } else {
+      return 0;
+    }
+  }
+
+  command error_t NeighborDiscovery.resolveAddress(struct in6_addr *addr,
+                                                   ieee154_addr_t *link_addr) {
+    ieee154_panid_t panid = letohs(call Ieee154Address.getPanId());
+
+    if (addr->s6_addr16[0] == htons(0xfe80)) {
+      if (addr->s6_addr16[5] == htons(0x00FF) &&
+          addr->s6_addr16[6] == htons(0xFE00)) {
+        /* U bit must not be set if a short address is in use */
+        if (ntohs(addr->s6_addr16[4]) == (panid & ~0x0200)) {
+          link_addr->ieee_mode = IEEE154_ADDR_SHORT;
+          link_addr->i_saddr = htole16(ntohs(addr->s6_addr16[7]));
+        } else {
+          return FAIL;
+        }
+      } else {
+        int i;
+        link_addr->ieee_mode = IEEE154_ADDR_EXT;
+        for (i = 0; i < 8; i++)
+          link_addr->i_laddr.data[i] = addr->s6_addr[15 - i];
+        link_addr->i_laddr.data[7] ^= 0x2;    /* toggle U/L */
+      }
+      return SUCCESS;
+    } else if (addr->s6_addr[0] == 0xff) {
+      /* LL - multicast */
+      if ((addr->s6_addr[1] & 0x0f) == 0x02) {
+        link_addr->ieee_mode = IEEE154_ADDR_SHORT;
+        link_addr->i_saddr   = IEEE154_BROADCAST_ADDR;
+        return SUCCESS;
+      }
+    }
+    /* only resolve Link-Local addresses */
+    return FAIL;
+  }
+
+  /**************** Send and Receive path of the stack ****************/
+  /* this is where the translation to L2 addresses take place         */
+
+  command error_t IPForward.send(struct in6_addr *next, struct ip6_packet *msg, void *ptr) {
+    struct ieee154_frame_addr fr_addr;
+    struct in6_addr local_addr;
+    fr_addr.ieee_dstpan = call Ieee154Address.getPanId();
+    call IPAddress.getLLAddr(&local_addr);
+
+    printfUART("IPNeighborDiscovery - send - next: ");
+    printfUART_in6addr(next);
+    printfUART(" - ll source: ");
+    printfUART_in6addr(&local_addr);
+    printfUART("\n");
+    // iov_print(msg->ip6_data);
+
+    if (call NeighborDiscovery.resolveAddress(&local_addr, &fr_addr.ieee_src) != SUCCESS) {
+      printfUART("IPND - local address resolution failed\n");
+      return FAIL;
+    }
+
+    if (call NeighborDiscovery.resolveAddress(next, &fr_addr.ieee_dst) != SUCCESS) {
+      printfUART("IPND - next-hop address resolution failed\n");
+      return FAIL;
+    }
+    printfUART("l2 source: "); printfUART_buf(fr_addr.ieee_src.i_laddr.data, 8);
+    printfUART("l2 dest: "); printfUART_buf(fr_addr.ieee_dst.i_laddr.data, 8);
+    printfUART("\n");
+
+    return call IPLower.send(&fr_addr, msg, ptr);
+  }
+
+  event void IPLower.recv(struct ip6_hdr *iph, void *payload, struct ip6_metadata *meta) {
+    signal IPForward.recv(iph, payload, meta);
+  }
+
+  event void IPLower.sendDone(struct send_info *status) {
+    signal IPForward.sendDone(status);
+  }
+
+  event void Ieee154Address.changed() {}
+  event void IPAddress.changed(bool global_valid) {}
+}
diff --git a/tos/lib/net/blip/IPPacketP.nc b/tos/lib/net/blip/IPPacketP.nc
new file mode 100644
index 00000000..c41ffaff
--- /dev/null
+++ b/tos/lib/net/blip/IPPacketP.nc
@@ -0,0 +1,48 @@
+
+#include <lib6lowpan/iovec.h>
+#include <lib6lowpan/ip.h>
+
+#define IP6PKT_TRANSPORT 0xff
+
+module IPPacketP {
+  provides interface IPPacket;
+} implementation {
+
+  /*
+   * @type the next header value to look for.  valid choices are in
+   * ip.h and can be any valid IANA next-header value.  The special
+   * value IP6PKT_TRANSPORT will return the offset of the transport
+   * header (ie, the first header which is not an IPv6 extension
+   * header).
+
+   * @return the offset of the start of a given header within the
+   * packet, or -1 if it was not found.
+   */
+  command int IPPacket.findHeader(void *payload, size_t len, 
+                                  uint8_t first_type, uint8_t search_type) {
+    int off = 0;
+    uint8_t nxt = first_type;
+    struct ip6_ext *ext = payload;
+
+    while ((search_type == IP6PKT_TRANSPORT && 
+            (nxt == IPV6_HOP  || nxt == IPV6_ROUTING  || nxt == IPV6_FRAG ||
+             nxt == IPV6_DEST || nxt == IPV6_MOBILITY || nxt == IPV6_IPV6)) ||
+           search_type != nxt) {
+      /* don't want to walk off the end */
+      if (off > len - sizeof(struct ip6_ext))
+        return -1;
+
+      /* don't want to get caught in a loop */
+      if (ext->ip6e_len == 0)
+        return -1;
+
+      nxt = ext->ip6e_nxt;
+      off += ext->ip6e_len;
+    }
+
+    if (nxt == IPV6_NONEXT) 
+      return -1;
+    else
+      return off;
+  }
+}
diff --git a/tos/lib/net/blip/IPProtocolsP.nc b/tos/lib/net/blip/IPProtocolsP.nc
new file mode 100644
index 00000000..4fd15ebd
--- /dev/null
+++ b/tos/lib/net/blip/IPProtocolsP.nc
@@ -0,0 +1,42 @@
+
+#include <lib6lowpan/ip.h>
+#include <PrintfUART.h>
+
+module IPProtocolsP {
+  provides {
+    interface IP[uint8_t nxt_hdr];
+  }
+  uses {
+    interface IPAddress;
+    interface IP as SubIP;
+  }
+} implementation {
+
+  event void SubIP.recv(struct ip6_hdr *iph, 
+                        void *payload, 
+                        size_t len, 
+                        struct ip6_metadata *meta) {
+    struct ip6_ext *cur = (struct ip6_ext *)(iph + 1);
+    uint8_t nxt = iph->ip6_nxt;
+
+    while (nxt == IPV6_HOP  || nxt == IPV6_ROUTING  || nxt == IPV6_FRAG ||
+           nxt == IPV6_DEST || nxt == IPV6_MOBILITY || nxt == IPV6_IPV6) {
+      nxt = cur->ip6e_nxt;
+      cur = (struct ip6_ext *)((uint8_t *)cur + cur->ip6e_len);
+    }
+
+    len -= POINTER_DIFF(cur, payload);
+    signal IP.recv[nxt](iph, cur, len, meta);
+  }
+
+  command error_t IP.send[uint8_t nxt_hdr](struct ip6_packet *msg) {
+    msg->ip6_hdr.ip6_vfc = IPV6_VERSION;
+    msg->ip6_hdr.ip6_hops = 16;
+    printfUART("IP Protocol send - nxt_hdr: %i\n", nxt_hdr);
+    return call SubIP.send(msg);
+  }
+
+  default event void IP.recv[uint8_t nxt_hdr](struct ip6_hdr *iph, void *payload, 
+                                              size_t len, struct ip6_metadata *meta) {}
+  event void IPAddress.changed(bool global_valid) {}
+}
diff --git a/tos/lib/net/blip/IPStackC.nc b/tos/lib/net/blip/IPStackC.nc
new file mode 100644
index 00000000..6923cb99
--- /dev/null
+++ b/tos/lib/net/blip/IPStackC.nc
@@ -0,0 +1,93 @@
+/**
+ * Wire together the IP stack
+ *
+ * To make it somewhat flexible, the stack consists of four main
+ * layers: Protocol, Routing, NeighborDiscovery, and Dispatch.  This
+ * component wires them together.
+ *
+ * Protocol: dispatch based on the final next header value in an
+ * ipv6_packet.
+ *
+ * Routing: determine the next-hop for a packet.  If it needs to be
+ * reencapsulated in order to insert a routing header, it should do
+ * this as well.  Currently, the routing protocol must also implement
+ * a forwarding engine; since the lowest level already queues, this
+ * isn't too onerous.  At the bottom, packets come out with a
+ * link-local next hop address attached.
+ *
+ * NeighborDiscovery: responsible for address resolution.  Very
+ * simple, since only link-local addresses are considered to be
+ * on-link.  
+ *
+ * Dispatch: okay, this one's badly named.  It's the 6lowpan engine
+ * which talks to a packet radio on the bottom and presents fully
+ * reassembled and decompressed IPv6 packets on top.  This means most
+ * of the stack can ignore the fact that there's all this magic going
+ * on.
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+#include <iprouting.h>
+
+configuration IPStackC {
+  provides {
+    interface SplitControl;
+    interface IP[uint8_t nxt_hdr];
+    interface IP as IPRaw;
+    interface ForwardingTable;
+    interface ForwardingEvents[uint8_t ifindex];
+  }
+  uses {
+    /* provided to stack components to turn themselves on and off */
+    interface StdControl;
+    interface StdControl as RoutingControl;
+  }
+} implementation {
+
+  components IPProtocolsP, 
+    IPForwardingEngineP as FwdP, 
+    IPNeighborDiscoveryC as NdC, 
+    IPDispatchC;
+  components IPStackControlP;
+  SplitControl = IPStackControlP;
+  IPStackControlP.StdControl = StdControl;
+  IPStackControlP.RoutingControl = RoutingControl;
+  IPStackControlP.SubSplitControl -> IPDispatchC;
+  
+  ForwardingTable = FwdP;
+  ForwardingEvents = FwdP;
+
+  /* wiring up of the IP stack */
+  IP = IPProtocolsP;            /* top layer - dispatch protocols */
+  IPProtocolsP.SubIP -> FwdP.IP; /* routing layer - provision next hops */
+  /* this wiring for an 802.15.4 stack */
+  FwdP.IPForward[ROUTE_IFACE_154] -> NdC; /* this layer translates L3->L2 addresses */
+  NdC.IPLower -> IPDispatchC.IPLower; /* wire to the 6lowpan engine */
+
+  IPRaw = FwdP.IPRaw;
+
+  /* wire in core protocols -- this is only protocol included by default */
+  /* it pretty much just replies to pings... */
+  components ICMPCoreP, LedsC;
+  components IPAddressC, IPPacketP;
+  ICMPCoreP.IP -> IPProtocolsP.IP[IANA_ICMP];
+  ICMPCoreP.Leds -> LedsC;
+  ICMPCoreP.IPAddress -> IPAddressC;
+
+  FwdP.IPAddress -> IPAddressC;
+  FwdP.IPPacket -> IPPacketP;
+  IPStackControlP.IPAddress -> IPAddressC;
+
+  components new TimerMilliC();
+  FwdP.PrintTimer -> TimerMilliC;
+  FwdP.Leds -> LedsC;
+
+#if defined(IN6_PREFIX)
+  components MainC, NoDhcpC;
+  NoDhcpC.Boot -> MainC;
+  NoDhcpC.IPAddress -> IPAddressC;
+#elif ! defined(IN6_NO_GLOBAL)
+  components Dhcp6RelayC;
+  components Dhcp6ClientC;
+#endif
+}
diff --git a/tos/lib/net/blip/IPStackControlP.nc b/tos/lib/net/blip/IPStackControlP.nc
new file mode 100644
index 00000000..29091935
--- /dev/null
+++ b/tos/lib/net/blip/IPStackControlP.nc
@@ -0,0 +1,53 @@
+
+module IPStackControlP {
+  provides interface SplitControl;
+  uses {
+    interface StdControl;
+    interface StdControl as RoutingControl;
+    interface SplitControl as SubSplitControl;
+    interface IPAddress;
+  }
+} implementation {
+
+  command error_t SplitControl.start() {
+    return call SubSplitControl.start();
+  }
+
+  event void SubSplitControl.startDone(error_t error) {
+    struct in6_addr addr;
+    if (error == SUCCESS) {
+      call StdControl.start();
+    }
+
+    // if we have a global address, we can start any routing protocols now.
+    if (call IPAddress.getGlobalAddr(&addr)) {
+      call RoutingControl.start();
+    }
+
+    signal SplitControl.startDone(error);
+  }
+
+  command error_t SplitControl.stop() {
+    call StdControl.stop();
+    call RoutingControl.stop();
+
+    return call SubSplitControl.stop();
+  }
+
+  event void SubSplitControl.stopDone(error_t error) {
+    signal SplitControl.stopDone(error);
+  }
+  
+  event void IPAddress.changed(bool valid) {
+    if (valid)
+      call RoutingControl.start();
+    else 
+      call RoutingControl.stop();
+  }
+
+ default command error_t StdControl.start() { return SUCCESS; }
+ default command error_t StdControl.stop() { return SUCCESS; }
+ default command error_t RoutingControl.start() { return SUCCESS; }
+ default command error_t RoutingControl.stop() { return SUCCESS; }
+  
+}
diff --git a/tos/lib/net/blip/Ieee154AddressC.nc b/tos/lib/net/blip/Ieee154AddressC.nc
new file mode 100644
index 00000000..74d83eb4
--- /dev/null
+++ b/tos/lib/net/blip/Ieee154AddressC.nc
@@ -0,0 +1,17 @@
+
+configuration Ieee154AddressC {
+  provides interface Ieee154Address;
+
+} implementation {
+  components Ieee154AddressP;
+  components LocalIeeeEui64C;
+  components MainC;
+  Ieee154Address = Ieee154AddressP;
+
+  MainC.SoftwareInit -> Ieee154AddressP;
+  Ieee154AddressP.LocalIeeeEui64 -> LocalIeeeEui64C;
+
+  // workaround until the radio stack uses this interface
+  components CC2420ControlC;
+  Ieee154AddressP.CC2420Config -> CC2420ControlC;
+}
diff --git a/tos/lib/net/blip/Ieee154AddressP.nc b/tos/lib/net/blip/Ieee154AddressP.nc
new file mode 100644
index 00000000..9d80116d
--- /dev/null
+++ b/tos/lib/net/blip/Ieee154AddressP.nc
@@ -0,0 +1,50 @@
+
+module Ieee154AddressP {
+  provides {
+    interface Init;
+    interface Ieee154Address;
+  }
+  uses {
+    interface LocalIeeeEui64;
+    interface CC2420Config;
+  }
+} implementation {
+  ieee154_saddr_t m_saddr;
+  ieee154_panid_t m_panid;
+
+  command error_t Init.init() {
+    m_saddr = TOS_NODE_ID;
+    m_panid = 0xabcd;
+    return SUCCESS;
+  }
+
+  command ieee154_panid_t Ieee154Address.getPanId() {
+    return m_panid;
+  }
+  command ieee154_saddr_t Ieee154Address.getShortAddr() {
+    return m_saddr;
+  }
+  command ieee154_laddr_t Ieee154Address.getExtAddr() {
+    ieee154_laddr_t addr = call LocalIeeeEui64.getId();
+    int i;
+    uint8_t tmp;
+    /* the LocalIeeeEui is big endian */
+    /* however, Ieee 802.15.4 addresses are little endian */
+    for (i = 0; i < 4; i++) {
+      tmp = addr.data[i];
+      addr.data[i] = addr.data[7 - i];
+      addr.data[7 - i] = tmp;
+    }
+    return addr;
+  }
+
+  command error_t Ieee154Address.setShortAddr(ieee154_saddr_t addr) {
+    m_saddr = addr;
+    call CC2420Config.setShortAddr(addr);
+    call CC2420Config.sync();
+    signal Ieee154Address.changed();
+    return SUCCESS;
+  }
+
+  event void CC2420Config.syncDone(error_t err) {}
+}
diff --git a/tos/lib/net/blip/MulticastP.nc b/tos/lib/net/blip/MulticastP.nc
new file mode 100644
index 00000000..c6568ed9
--- /dev/null
+++ b/tos/lib/net/blip/MulticastP.nc
@@ -0,0 +1,212 @@
+
+#include <ip.h>
+#include <PrintfUART.h>
+
+#include "Statistics.h"
+#include "ipmulticast.h"
+
+#define MAX_MSG_COUNT 5 // only send multicast messages this many times
+
+module MulticastP {
+  provides {
+    interface Init;
+    interface IP[uint8_t nxt_hdr];
+    interface Statistics<mcast_statistics_t>;
+  }
+
+  uses  {
+    interface IP as MulticastRx[uint8_t nxt_hdr];
+    interface TLVHeader as HopHeader;
+    interface TrickleTimer;
+    interface IPExtensions;
+  }
+} implementation {
+  
+  bool trickle_running;
+  uint16_t last_seqno;
+  uint8_t fw_hdr;  
+  struct split_ip_msg fw_msg;
+  uint8_t fw_data[MCAST_FW_MAXLEN];
+  int fw_data_len;
+  uint8_t msg_count;
+
+  command error_t Init.init() {
+    last_seqno = 0;
+    return SUCCESS;
+  }
+
+  void startNewMsg(struct ip6_hdr *iph, uint8_t nxt_hdr) {
+
+    // store a copy of the message for forwarding
+    ip_memclr((void *)&fw_msg, sizeof(struct split_ip_msg));
+    ip_memcpy(&fw_msg.hdr, iph, sizeof(struct ip6_hdr));
+
+    fw_hdr = nxt_hdr;
+    fw_msg.headers = NULL;
+    fw_msg.data = fw_data;
+    fw_msg.data_len = fw_data_len;
+    msg_count = 0;
+
+//	printfUART("MCAST: startNewMsg\n");
+    call TrickleTimer.stop();
+    call TrickleTimer.reset();
+    call TrickleTimer.start();
+
+  }
+
+  /*
+   * receive all IP datagrams.
+   * we store and forward ones with scope 3
+   */
+  event void MulticastRx.recv[uint8_t nxt_hdr](struct ip6_hdr *iph, 
+                                               void *payload, 
+                                               struct ip_metadata *meta) {
+    struct ip6_ext *hop;
+    struct tlv_hdr *mcast_tlv;
+    struct mcast_hdr *mcast;
+    // no sequence number attached?
+
+//    printfUART("MCAST: recv\n");
+
+    if (iph->nxt_hdr != IPV6_HOP) {
+      goto deliver;
+    }
+    hop = (struct ip6_ext *)(iph + 1);
+    mcast_tlv = call IPExtensions.findTlv(hop, TLV_TYPE_MCASTSEQ);
+    mcast = (struct mcast_hdr *)mcast_tlv;
+    // no mcast sequence number?
+    if (mcast == NULL) {
+      goto deliver;
+    }
+
+    if (ntohs(mcast->mcast_seqno) > last_seqno || 
+        (last_seqno > 0xfff0 && ntohs(mcast->mcast_seqno) < 0x0f)) {
+      uint16_t length = ntohs(iph->plen);
+      if (length < MCAST_FW_MAXLEN) {
+//        printfUART("MCAST: seqno was: %i now: %i\n", last_seqno, ntohs(mcast->mcast_seqno));
+        last_seqno = ntohs(mcast->mcast_seqno);
+        memcpy(fw_data, payload, length);
+        fw_data_len = length;
+
+        startNewMsg(iph, nxt_hdr);
+
+//        printfUART("MCAST: starting new mcast message seqno: %i\n", last_seqno);
+      }
+      goto deliver;
+    } else if (ntohs(mcast->mcast_seqno) == last_seqno &&
+               memcmp(iph->ip6_src.s6_addr, fw_msg.hdr.ip6_src.s6_addr, 16) == 0) {
+      // received a retranmission.  just update the trickle timer.
+//	  printfUART("MCAST: received consistent transmission, seqno: %d\n", ntohs(mcast->mcast_seqno));
+      call TrickleTimer.incrementCounter();
+    }
+    return;
+  deliver:
+    signal IP.recv[nxt_hdr](iph, payload, meta);
+  }
+
+  /* 
+   * add sequence numbers to outgoing multicast packets so we can
+   * detect when there are new ones.
+   */
+  event struct tlv_hdr *HopHeader.getHeader(int label,int nxt_hdr,
+                                            struct ip6_hdr *iph) {
+    // only add sequence number headers to outgoing flood messages
+    static struct mcast_hdr hdr;
+    if (iph->ip6_dst.s6_addr16[0] != htons(0xff03))  return NULL;
+//    printfUART("MCAST: adding multicast header, seqno: %d\n",last_seqno);
+
+    hdr.tlv.type = TLV_TYPE_MCASTSEQ;
+    hdr.tlv.len = sizeof(struct mcast_hdr);
+    hdr.mcast_seqno = htons(last_seqno);
+    return (struct tlv_hdr *)&hdr;
+  }
+
+  event void HopHeader.free() {}
+
+  event void TrickleTimer.fired() {
+    // it's that easy... the sequence number will get added when
+    // outgoing headers are added.
+    fw_msg.headers = NULL;
+    fw_msg.hdr.nxt_hdr = fw_hdr;
+    fw_msg.hdr.plen = htons(fw_data_len);
+    fw_msg.data_len = fw_data_len;
+    call MulticastRx.bareSend[fw_hdr](&fw_msg, NULL, IP_MCAST);
+
+    msg_count = msg_count + 1;
+    if (msg_count >= MAX_MSG_COUNT) {
+      msg_count = 0;
+      call TrickleTimer.stop();
+    }
+  }
+
+  command error_t IP.send[uint8_t nxt_hdr](struct split_ip_msg *msg) {
+    
+    if (msg->hdr.ip6_dst.s6_addr[0] == 0xff) {
+      if ((msg->hdr.ip6_dst.s6_addr[1] & 0x0f) == 0x3) {
+        int total_length = ntohs(msg->hdr.plen);
+        unsigned char *cur = fw_data;
+        struct generic_header *g_hdr;
+
+        if (total_length > MCAST_FW_MAXLEN) return FAIL;
+
+        last_seqno++;
+        startNewMsg(&msg->hdr, nxt_hdr);
+        
+        fw_data_len = total_length;
+        g_hdr = msg->headers;
+        while (g_hdr != NULL) {
+          total_length -= g_hdr->len;
+          if (total_length < 0) goto fail;
+          memcpy(cur, g_hdr->hdr.data, g_hdr->len);
+          cur +=g_hdr->len;
+          g_hdr = g_hdr->next;
+        }
+        if (msg->data_len > total_length) goto fail;
+        memcpy(cur, msg->data, msg->data_len);
+
+        return SUCCESS;
+      fail:
+        call TrickleTimer.stop();
+        return FAIL;
+
+      } else {
+        return call MulticastRx.bareSend[nxt_hdr](msg, NULL, IP_MCAST);
+      }
+    }
+    return SUCCESS;
+  }
+  command error_t IP.bareSend[uint8_t prot](struct split_ip_msg *msg,
+                                            struct ip6_route *route,
+                                            int flags) {
+    if (msg->hdr.ip6_dst.s6_addr[0] == 0xff) {
+      return call MulticastRx.bareSend[prot](msg, route, flags | IP_MCAST);
+    } else {
+      return SUCCESS;
+    }
+  }
+
+  event void IPExtensions.reportTransmission(uint8_t label, send_policy_t *policy) {
+
+  }
+  event void IPExtensions.handleExtensions(uint8_t label,
+                                           struct ip6_hdr *iph,
+                                           struct ip6_ext *hop,
+                                           struct ip6_ext *dst,
+                                           struct ip6_route *route,
+                                           uint8_t nxt_hdr) {
+  }
+  default event void IP.recv[uint8_t nxt_hdr](struct ip6_hdr *iph,
+                                              void *payload,
+                                              struct ip_metadata *meta) {
+  }
+
+  command void Statistics.get(mcast_statistics_t *stats) {
+    stats->lsn = last_seqno;
+  }
+  
+  /*
+   * Reset whatever statistics are being collected.
+   */
+  command void Statistics.clear() {}
+
+}
diff --git a/tos/lib/net/blip/PrintfUART.h b/tos/lib/net/blip/PrintfUART.h
new file mode 100644
index 00000000..7e4e5941
--- /dev/null
+++ b/tos/lib/net/blip/PrintfUART.h
@@ -0,0 +1,397 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+/*                          
+ * Copyright (c) 2005
+ *	The President and Fellows of Harvard College.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* 
+ * Writes printf like output to the UART.  
+ * This works only on the AVR and MSP430 Microcontrollers!
+ * <p>
+ * Note: For AVR we explicitly place the print statements in ROM; for
+ * MSP430 this is done by default!  For AVR, if we don't place it
+ * explicitely in ROM, the statements will go in RAM, which will
+ * quickly cause a descent size program to run out of RAM.  By default
+ * it doesn't disable the interupts; disabling the interupts when
+ * writing to the UART, slows down/makes the mote quite unresponsive,
+ * and can lead to problems!  If you wish to disable all printfs to
+ * the UART, then comment the flag: <code>PRINTFUART_ENABLED</code>.
+
+ * <p> <pre>
+ * How to use:
+ *   // (0) In your Makefile, define PRINTFUART_ENABLED
+ *   CFLAGS += -DPRINTFUART_ENABLED
+ *   // (1) Call printfUART_init() from your initialization function 
+ *   //     to initialize the UART
+ *   printfUART_init();
+ *   // (2) Set your UART client to the correct baud rate.  Look at 
+ *   //     the comments in printfUART_init(), to figure out what 
+ *   //     baud to use for your particular mote
+ *
+ *   // (3) Send printf statements like this:
+ *   printfUART("Hello World, we are in year= %u\n", 2004);
+ *   printfUART("Printing uint32_t variable, value= %lu\n", 4294967295);
+ *
+ * Examples and caveats:
+ *   // (1) - Must use curly braces in single section statements.  
+ *            (Look in the app.c to see why -- hint: it's a macro)
+ *   if (x < 3)
+ *       {printfUART("The value of x is %i\n", x);}
+ *   // (2) - Otherwise it more or less works like regular printf
+ *   printfUART("\nThe value of x=%u, and y=%u\n", x, y); 
+ * </pre>
+ * <pre>URL: http://www.eecs.harvard.edu/~konrad/projects/motetrack</pre>
+ * @author Konrad Lorincz
+ * @version 2.0, January 5, 2005
+ */
+#ifndef PRINTFUART_H
+#define PRINTFUART_H
+#include <stdarg.h>
+#include <stdio.h>
+
+// -------------------------------------------------------------------
+#ifdef PRINTFUART_ENABLED
+    #define DEBUGBUF_SIZE 256
+    char debugbuf[DEBUGBUF_SIZE];
+    char debugbufROMtoRAM[DEBUGBUF_SIZE];
+
+    #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+        #define printfUART(__format...) {                          \
+            static const char strROM[] PROGMEM = __format;         \
+            strcpy_P((char*) &debugbufROMtoRAM, (PGM_P) &strROM);  \
+            sprintf(debugbuf, debugbufROMtoRAM);                   \
+            writedebug();                                          \
+        }   
+    #else  // assume MSP430 architecture (e.g. TelosA, TelosB, etc.)
+        #define printfUART(__format...) {      \
+            sprintf(debugbuf, __format);       \
+            writedebug();                      \
+        }  
+    #endif
+#else
+    #define printfUART(X, args...) dbg("printf", X, ## args)
+// #define printfUART(__format...) {}
+    void printfUART_init() {}
+#endif
+
+#define NOprintfUART(__format...)
+
+
+// -------------------------------------------------------------------
+#ifdef PRINTFUART_ENABLED
+
+/**
+ * Initialize the UART port.  Call this from your startup routine.
+ */
+#define printfUART_init() {atomic printfUART_init_private();}
+void printfUART_init_private()
+{
+    #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2)
+        // 56K baud
+        outp(0,UBRR0H);
+        outp(15, UBRR0L);                              //set baud rate
+        outp((1<<U2X),UCSR0A);                         // Set UART double speed
+        outp(((1 << UCSZ1) | (1 << UCSZ0)) , UCSR0C);  // Set frame format: 8 data-bits, 1 stop-bit
+        inp(UDR0);
+        outp((1 << TXEN) ,UCSR0B);   // Enable uart reciever and transmitter
+
+    #else
+    #if defined(PLATFORM_MICA2DOT)  
+        // 19.2K baud
+        outp(0,UBRR0H);            // Set baudrate to 19.2 KBps
+        outp(12, UBRR0L);
+        outp(0,UCSR0A);            // Disable U2X and MPCM
+        outp(((1 << UCSZ1) | (1 << UCSZ0)) , UCSR0C);
+        inp(UDR0);
+        outp((1 << TXEN) ,UCSR0B);
+  
+    #else
+    #if defined(PLATFORM_IMOTE2)
+      //async command result_t UART.init() {
+        
+        /*** 
+           need to configure the ST UART pins for the correct functionality
+           
+           GPIO<46> = STDRXD = ALT2(in)
+           GPIO<47> = STDTXD = ALT1(out)
+        *********/
+        //atomic{
+          
+        //configure the GPIO Alt functions and directions
+        _GPIO_setaltfn(46,2);   // STD_RXD
+        _GPIO_setaltfn(47,1);   // STD_TXD
+        
+        _GPDR(46) &= ~_GPIO_bit(46);  // input
+        _GPDR(47) |= _GPIO_bit(47);   // output
+        
+        STLCR |=LCR_DLAB; //turn on DLAB so we can change the divisor
+        STDLL = 8;  //configure to 115200;
+        STDLH = 0;
+        STLCR &= ~(LCR_DLAB);  //turn off DLAB
+        
+        STLCR |= 0x3; //configure to 8 bits
+        
+        STMCR &= ~MCR_LOOP;
+        STMCR |= MCR_OUT2;
+        STIER |= IER_RAVIE;
+        STIER |= IER_TIE;
+        STIER |= IER_UUE; //enable the UART
+        
+        //STMCR |= MCR_AFE; //Auto flow control enabled;
+        //STMCR |= MCR_RTS;
+        
+        STFCR |= FCR_TRFIFOE; //enable the fifos
+        
+//        call Interrupt.allocate();
+//        call Interrupt.enable();
+        //configure all the interrupt stuff
+        //make sure that the interrupt causes an IRQ not an FIQ
+        // __REG(0x40D00008) &= ~(1<<21);
+        //configure the priority as IPR1
+        //__REG(0x40D00020) = (1<<31 | 21);
+        //unmask the interrupt
+        //__REG(0x40D00004) |= (1<<21);
+        
+        CKEN |= CKEN5_STUART; //enable the UART's clk    
+
+
+    #else  // assume TelosA, TelosB, etc.
+        // Variabel baud 
+        // To change the baud rate, see /tos/platform/msp430/msp430baudrates.h
+        uint8_t source = SSEL_SMCLK;
+        uint16_t baudrate = 0x0012; // UBR_SMCLK_57600=0x0012
+        uint8_t mctl = 0x84;        // UMCTL_SMCLK_57600=0x84
+        //uint16_t baudrate = 0x0009; // UBR_SMCLK_115200=0x0009
+        //uint8_t mctl = 0x10;        // UMCTL_SMCLK_115200=0x10
+
+
+        uint16_t l_br = 0;
+        uint8_t l_mctl = 0;
+        uint8_t l_ssel = 0;
+
+        TOSH_SEL_UTXD1_MODFUNC();
+        TOSH_SEL_URXD1_MODFUNC();
+
+
+        UCTL1 = SWRST;  
+        UCTL1 |= CHAR;  // 8-bit char, UART-mode
+    
+        U1RCTL &= ~URXEIE;  // even erroneous characters trigger interrupts
+
+        UCTL1 = SWRST;
+        UCTL1 |= CHAR;  // 8-bit char, UART-mode
+
+        if (l_ssel & 0x80) {
+            U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+            U1TCTL |= (l_ssel & 0x7F); 
+        }
+        else {
+            U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+            U1TCTL |= SSEL_ACLK; // use ACLK, assuming 32khz
+        }
+
+        if ((l_mctl != 0) || (l_br != 0)) {
+            U1BR0 = l_br & 0x0FF;
+            U1BR1 = (l_br >> 8) & 0x0FF;
+            U1MCTL = l_mctl;
+        }
+        else {
+            U1BR0 = 0x03;   // 9600 baud
+            U1BR1 = 0x00;
+            U1MCTL = 0x4A;
+        }
+      
+        ME2 &= ~USPIE1;   // USART1 SPI module disable
+        ME2 |= (UTXE1 | URXE1);   // USART1 UART module enable
+      
+        U1CTL &= ~SWRST;
+    
+        IFG2 &= ~(UTXIFG1 | URXIFG1);
+        IE2 &= ~(UTXIE1 | URXIE1);  // interrupt disabled
+
+   
+
+        //async command void USARTControl.setClockSource(uint8_t source) {
+        //    atomic {
+                l_ssel = source | 0x80;
+                U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+                U1TCTL |= (l_ssel & 0x7F); 
+                //    }
+                //}
+                //async command void USARTControl.setClockRate(uint16_t baudrate, uint8_t mctl) {
+                //atomic {
+                l_br = baudrate;
+                l_mctl = mctl;
+                U1BR0 = baudrate & 0x0FF;
+                U1BR1 = (baudrate >> 8) & 0x0FF;
+                U1MCTL = mctl;
+                //}
+                //}
+
+                //async command result_t USARTControl.enableRxIntr(){
+                //atomic {
+                IFG2 &= ~URXIFG1;
+                IE2 |= URXIE1;
+                //}
+                //return SUCCESS;
+                //}
+
+                //async command result_t USARTControl.enableTxIntr(){
+                //atomic {
+                IFG2 &= ~UTXIFG1;
+                IE2 |= UTXIE1;
+                //}
+                //return SUCCESS;
+                //}     
+
+    #endif
+    #endif
+    #endif
+}
+
+#if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+#else
+#if defined(PLATFORM_IMOTE2)
+#else // assume AVR architecture (e.g. TelosA, TelosB)
+    bool isTxIntrPending()
+    {
+        if (U1TCTL & TXEPT) {
+            return TRUE;
+        }
+        return FALSE;
+    }
+#endif
+#endif
+
+/**
+ * Outputs a char to the UART.
+ */
+void UARTPutChar(char c)
+{
+    if (c == '\n')
+        UARTPutChar('\r');
+
+
+    #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+        loop_until_bit_is_set(UCSR0A, UDRE);
+        outb(UDR0,c);
+
+    #else
+    #if defined(PLATFORM_IMOTE2)
+        STTHR = c;    
+
+    #else // assume AVR architecture (e.g. TelosA, TelosB)
+        U1TXBUF = c;  
+        while( !isTxIntrPending() )  
+            continue;
+    #endif
+    #endif
+}
+
+/**
+ * Outputs the entire debugbuf to the UART, or until it encounters '\0'.
+ */
+void writedebug()
+{
+    uint16_t i = 0;
+    
+    while (debugbuf[i] != '\0' && i < DEBUGBUF_SIZE)
+        UARTPutChar(debugbuf[i++]);
+}
+
+#endif  // PRINTFUART_ENABLED
+// -------------------------------------------------------------------
+
+#if 1
+// --------------------------------------------------------------
+#define assertUART(x) if (!(x)) { __assertUART(__FILE__, __LINE__); }
+void __assertUART(const char* file, int line)
+{
+    printfUART("ASSERT FAILED: file= %s, lineNbr= %i\n", file, line);
+    // for some reason, CLR means on
+    for (;;);
+}
+// --------------------------------------------------------------
+#endif
+
+#ifdef PRINTFUART_ENABLED
+void printfUART_buf(char *buf, int len) {
+  int i;
+  for (i = 0; i < len; i++) {
+    printfUART("%02hhx ", buf[i]);
+  }
+  printfUART("\n");
+}
+
+#include <lib6lowpan/iovec.h>
+#include <lib6lowpan/ip.h>
+void iov_print(struct ip_iovec *iov) {
+  struct ip_iovec *cur = iov;
+  while (cur != NULL) {
+    int i;
+    printfUART("iovec (%p, %i) ", cur, cur->iov_len);
+    for (i = 0; i < cur->iov_len; i++) {
+      printfUART("%02hhx ", (uint8_t)cur->iov_base[i]);
+    }
+    printfUART("\n");
+    cur = cur->iov_next;
+  }
+}
+void printfUART_in6addr(struct in6_addr *a) {
+  static char print_buf[64];
+  inet_ntop6(a, print_buf, 64);
+  printfUART(print_buf);
+}
+
+#else
+#define printfUART_buf(x, y) ;
+#define iov_print(X) ;
+#define printfUART_in6addr(X) ;
+#endif
+
+#endif  // PRINTFUART_H
+
diff --git a/tos/lib/net/blip/README b/tos/lib/net/blip/README
new file mode 100644
index 00000000..0c4a2c89
--- /dev/null
+++ b/tos/lib/net/blip/README
@@ -0,0 +1,46 @@
+# @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu
+# @status dev
+
+blip-2.0 Overview
+
+Rebuilding from the ground up, we're trying to make blip a robust
+foundation for experimenting with either routing protocols or
+adaptation layers, without needing extensive re-writes.
+
+In the diagram below, routing protcols and neighbor discovery runs
+between the L2.5 and L3 interfaces, and can completly re-work the
+stack structure within those limits.  In truth, there is a fair amount
+of modularity in that space as well, since (for instance) it is
+probably desirable to be able to work on the routing protocol while
+also using 6lowpan neighbor discovery.  Utility components for
+managing bound addresses should be shared as well.
+
+
+UdpC  TcpC  ICMPCoreC  -- provide true higher layer services -- transport and management
+  |
+  | 
+-+--------------   Layer 3 top interface
+IPDispatchC -- wires together layers
+  |
+  |
+IPProtocolsP -- sets up IP header, resolves next hop.  Currently works only for LL.
+ |              strips off extention headers, dispatches based on transport "next header" field
+ | 
+IPAddressFilterP -- split up packets depending on what their destination is:
+                      - for local packets, dispatch them up through the stack to the appropriate protocol handler
+                      - non-local packets go to the ForwardIP
+                        interface; routing protocols are responsible
+                        for dealing with packets deliver via this
+                        interface.  The default behavior is to drop
+  |                     the packets if no routing protocol is wired.
+  |
+  |
+--+--------------   Layer 2.5 Interface
+IPDispatchP -- Interface to the 6lowpan compression engine
+               provides header compression and packet fragmentation
+               some additional upper-layer interfaces are necessary for propagating context information
+-+---------------   Layer 2 interface
+ |                  sends packets over links using the 802.15.4 frame format
+ |                  6lowpan component writes the frame header
+
+
diff --git a/tos/lib/net/blip/ReadLqiC.nc b/tos/lib/net/blip/ReadLqiC.nc
new file mode 100644
index 00000000..cd6005ad
--- /dev/null
+++ b/tos/lib/net/blip/ReadLqiC.nc
@@ -0,0 +1,30 @@
+
+/*
+ * Different platforms have different ways of getting in touch with
+ * the LQI reading the radio provides.  This module wraps the
+ * different ways in platform-independent logic.
+ *
+ * 
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+
+configuration ReadLqiC {
+  provides interface ReadLqi;
+} implementation {
+  
+#if defined(PLATFORM_MICAZ) || defined(PLATFORM_TELOSB)  || \
+    defined(PLATFORM_EPIC)  || defined(PLATFORM_SHIMMER) || \
+    defined(PLATFORM_SHIMMER2) || defined(PLATFORM_INTELMOTE2)
+  // cc2420 platforms
+  components CC2420ReadLqiC, CC2420PacketC;
+  ReadLqi = CC2420ReadLqiC;
+  CC2420ReadLqiC.CC2420Packet -> CC2420PacketC;
+#elif defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE) 
+  components RF230ReadLqiC, RF230Ieee154MessageC;
+  ReadLqi = RF230ReadLqiC;
+  RF230ReadLqiC.SubLqi -> RF230Ieee154MessageC.PacketLinkQuality;
+#else
+#error "No radio support is available for your platform"
+#endif
+
+}
diff --git a/tos/lib/net/blip/ResourceSendP.nc b/tos/lib/net/blip/ResourceSendP.nc
new file mode 100644
index 00000000..31f6ff07
--- /dev/null
+++ b/tos/lib/net/blip/ResourceSendP.nc
@@ -0,0 +1,62 @@
+
+#include <Ieee154.h>
+
+#include "PrintfUART.h"
+
+module ResourceSendP {
+  provides interface Ieee154Send;
+  uses interface Resource;
+  uses interface Ieee154Send as SubSend;
+} implementation {
+  ieee154_saddr_t m_addr;
+  message_t      *m_msg = NULL;
+  uint8_t         m_len;
+  
+  command error_t Ieee154Send.send(ieee154_saddr_t addr,
+                                   message_t* msg,
+                                   uint8_t len) {
+    if (m_msg != NULL) return EBUSY;
+
+    m_addr = addr;
+    m_msg = msg;
+    m_len = len;
+
+    call Resource.request();
+    return SUCCESS;
+  }
+
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    call Resource.release();
+    signal Ieee154Send.sendDone(msg, result);
+    m_msg = NULL;
+  }
+
+  event void Resource.granted() {
+    error_t rc;
+    if ((rc = (call SubSend.send(m_addr, m_msg, m_len))) != SUCCESS) {
+      signal Ieee154Send.sendDone(m_msg, rc);
+      m_msg = NULL;
+      call Resource.release();
+    }
+  }
+
+  command error_t Ieee154Send.cancel(message_t* msg) {
+    if (m_msg != NULL) {
+      call Resource.release();
+      m_msg = NULL;
+      return call SubSend.cancel(msg);
+    } else {
+      return FAIL;
+    }
+  }
+
+  command uint8_t Ieee154Send.maxPayloadLength() {
+    return call SubSend.maxPayloadLength();
+  }
+
+  command void* Ieee154Send.getPayload(message_t* m, uint8_t len) {
+    return call SubSend.getPayload(m, len);
+  }
+
+
+}
diff --git a/tos/lib/net/blip/TcpC.nc b/tos/lib/net/blip/TcpC.nc
new file mode 100644
index 00000000..43e9ecd5
--- /dev/null
+++ b/tos/lib/net/blip/TcpC.nc
@@ -0,0 +1,17 @@
+
+configuration TcpC {
+  provides interface Tcp[uint8_t client];
+} implementation {
+
+  components MainC, IPStackC, TcpP, IPAddressC;
+  components new TimerMilliC();
+
+  Tcp = TcpP;
+
+  MainC -> TcpP.Init;
+  TcpP.Boot -> MainC;
+  TcpP.IP -> IPStackC.IP[IANA_TCP];
+
+  TcpP.Timer -> TimerMilliC;
+  TcpP.IPAddress -> IPAddressC;
+}
diff --git a/tos/lib/net/blip/TcpP.nc b/tos/lib/net/blip/TcpP.nc
new file mode 100644
index 00000000..ef73f337
--- /dev/null
+++ b/tos/lib/net/blip/TcpP.nc
@@ -0,0 +1,155 @@
+
+#include <table.h>
+#include <ip.h>
+
+module TcpP {
+  provides interface Tcp[uint8_t client];
+  provides interface Init;
+  uses {
+    interface Boot;
+
+    interface IP;
+    interface Timer<TMilli>;
+    interface IPAddress;
+  }
+} implementation {
+
+  enum {
+    N_CLIENTS = uniqueCount("TCP_CLIENT"),
+  };
+
+#include <tcplib.h>
+  struct tcplib_sock socks[N_CLIENTS];
+
+  int find_client(struct tcplib_sock *conn) {
+    int i;
+    for (i = 0; i < N_CLIENTS; i++)
+      if (&socks[i] == conn) break;
+
+    return i;
+  }
+
+  void tcplib_extern_connectdone(struct tcplib_sock *sock, int error) {
+    int cid = find_client(sock);
+    if (cid < N_CLIENTS)
+      signal Tcp.connectDone[cid](error == 0);
+  }
+
+  void tcplib_extern_recv(struct tcplib_sock *sock, void *data, int len) {
+    int cid = find_client(sock);
+    if (cid < N_CLIENTS)
+      signal Tcp.recv[cid](data, len);
+  }
+
+  void tcplib_extern_closed(struct tcplib_sock *sock) {
+    tcplib_close(sock);
+  }
+
+  void tcplib_extern_closedone(struct tcplib_sock *sock) {
+    int cid = find_client(sock);
+    tcplib_init_sock(sock);
+    if (cid < N_CLIENTS)
+      signal Tcp.closed[cid](0);
+  }
+
+  void tcplib_extern_acked(struct tcplib_sock *sock) {
+    int cid = find_client(sock);
+    if (cid < N_CLIENTS)
+      signal Tcp.acked[cid]();
+  }
+#include "circ.c"
+#include "tcplib.c"
+
+  struct tcplib_sock socks[uniqueCount("TCP_CLIENT")];
+
+  struct tcplib_sock *tcplib_accept(struct tcplib_sock *conn,
+                                    struct sockaddr_in6 *from) {
+    int cid = find_client(conn);
+
+    printfUART("tcplib_accept: cid: %i\n", cid);
+
+    if (cid == N_CLIENTS) return NULL;
+    if (signal Tcp.accept[cid](from, &conn->tx_buf, &conn->tx_buf_len)) {
+      if (conn->tx_buf == NULL) return NULL;
+      return conn;
+    }
+    return NULL;
+  }
+
+  void tcplib_send_out(struct ip6_packet *msg, struct tcp_hdr *tcph) {
+    printfUART("tcp output\n");
+    call IPAddress.setSource(&msg->ip6_hdr);
+    tcph->chksum = htons(msg_cksum(&msg->ip6_hdr, msg->ip6_data, IANA_TCP));
+    call IP.send(msg);
+  }
+
+  command error_t Init.init() {
+    int i;
+    for (i = 0; i < uniqueCount("TCP_CLIENT"); i++) {
+      tcplib_init_sock(&socks[i]);
+    }
+    return SUCCESS;
+  }
+
+  event void Boot.booted() {
+    call Timer.startPeriodic(512);
+  }
+
+  event void Timer.fired() {
+    tcplib_timer_process();
+  }
+
+  event void IP.recv(struct ip6_hdr *iph, 
+                     void *payload, size_t len,
+                     struct ip6_metadata *meta) {
+    
+    printfUART("tcp packet received\n");
+    tcplib_process(iph, payload);
+  }
+
+
+  command error_t Tcp.bind[uint8_t client](uint16_t port) {
+    struct sockaddr_in6 addr;
+    memclr(addr.sin6_addr.s6_addr, 16);
+    addr.sin6_port = htons(port);
+    tcplib_bind(&socks[client], &addr);
+    return SUCCESS;
+  }
+
+  command error_t Tcp.connect[uint8_t client](struct sockaddr_in6 *dest,
+                                              void *tx_buf, int tx_buf_len) {
+    socks[client].tx_buf = tx_buf;
+    socks[client].tx_buf_len = tx_buf_len;
+    tcplib_connect(&socks[client], dest);
+  }
+
+  command error_t Tcp.send[uint8_t client](void *payload, uint16_t len) {
+    if (tcplib_send(&socks[client], payload, len) < 0) return FAIL;
+    return SUCCESS;
+  }
+  
+  command error_t Tcp.close[uint8_t client]() {
+    if (!tcplib_close(&socks[client]))
+      return SUCCESS;
+    return FAIL;
+  }
+
+  command error_t Tcp.abort[uint8_t client]() {
+    if (tcplib_abort(&socks[client]) < 0) return FAIL;
+    return SUCCESS;
+  }
+
+  event void IPAddress.changed(bool valid) { }
+
+  default event bool Tcp.accept[uint8_t cid](struct sockaddr_in6 *from, 
+                                             void **tx_buf, int *tx_buf_len) {
+    return FALSE;
+  }
+
+ default event void Tcp.connectDone[uint8_t cid](error_t e) {}
+ default event void Tcp.recv[uint8_t cid](void *payload, uint16_t len) {  }
+ default event void Tcp.closed[uint8_t cid](error_t e) { }
+ default event void Tcp.acked[uint8_t cid]() { }
+
+ 
+}
diff --git a/tos/lib/net/blip/TcpSocketC.nc b/tos/lib/net/blip/TcpSocketC.nc
new file mode 100644
index 00000000..1c832f1f
--- /dev/null
+++ b/tos/lib/net/blip/TcpSocketC.nc
@@ -0,0 +1,11 @@
+
+
+generic configuration TcpSocketC() {
+  provides interface Tcp;
+} implementation {
+
+  components TcpC;
+
+  Tcp = TcpC.Tcp[unique("TCP_CLIENT")];
+  
+}
diff --git a/tos/lib/net/blip/TrackFlowsC.nc b/tos/lib/net/blip/TrackFlowsC.nc
new file mode 100644
index 00000000..729d9355
--- /dev/null
+++ b/tos/lib/net/blip/TrackFlowsC.nc
@@ -0,0 +1,16 @@
+
+configuration TrackFlowsC {
+
+} implementation {
+  
+  components MainC, TrackFlowsP, IPDispatchP;
+  components SerialActiveMessageC as Serial;
+
+  TrackFlowsP.Boot -> MainC;
+  TrackFlowsP.SerialControl -> Serial;
+  TrackFlowsP.IPExtensions -> IPDispatchP.IPExtensions;
+  TrackFlowsP.Headers -> IPDispatchP.HopByHopExt;
+
+  TrackFlowsP.FlowSend -> Serial.AMSend[AM_FLOW_ID_MSG];
+  
+}
diff --git a/tos/lib/net/blip/TrackFlowsP.nc b/tos/lib/net/blip/TrackFlowsP.nc
new file mode 100644
index 00000000..f06bcae8
--- /dev/null
+++ b/tos/lib/net/blip/TrackFlowsP.nc
@@ -0,0 +1,140 @@
+
+#include "TrackFlows.h"
+
+module TrackFlowsP {
+  uses {
+    interface Boot;
+    interface SplitControl as SerialControl;
+    interface IPExtensions;
+    interface TLVHeader as Headers;
+    interface AMSend as FlowSend;
+  }
+} implementation {
+  
+
+  bool flow_send_busy = FALSE;
+  uint16_t current_flowid = 0;
+  message_t flow_send;
+
+  int send_flow_idx = -1, cur_idx = 0;
+  nx_struct {
+    nx_uint8_t flags;
+    nx_uint8_t label;
+    nx_struct flow_id_msg flow;
+  } flow_cache[N_FORWARD_ENT * 3];
+
+  int get_entry() {
+    cur_idx = (cur_idx + 1) % (N_FORWARD_ENT * 3);
+    return cur_idx;
+  }
+  int lookup_entry(uint8_t label) {
+    int i;
+    for (i = 0; i < N_FORWARD_ENT * 3; i++) {
+      if (flow_cache[i].flags == 1 && flow_cache[i].label == label)
+        return i;
+    } 
+    return -1;
+  }
+  
+  event void Boot.booted() {
+    call SerialControl.start();
+    flow_send_busy = FALSE;
+    ip_memclr((void *)flow_cache, sizeof(flow_cache));
+  }
+
+  event void FlowSend.sendDone(message_t *msg, error_t error) {
+    flow_send_busy = FALSE;
+    flow_cache[send_flow_idx].flags = 0;
+  }
+
+  void update_msg(struct ip6_hdr *iph, nx_struct flow_id *flow, uint8_t label, uint8_t nxt_hdr) {
+    nx_struct flow_id_msg *payload;
+    int i = get_entry();
+    if (i < 0) return;
+    flow_cache[i].flags = 1;
+    flow_cache[i].label = label;
+    payload = &flow_cache[i].flow;
+
+    memcpy(&payload->flow, flow, sizeof(nx_struct flow_id));
+    payload->src = ntohs(iph->ip6_src.s6_addr16[7]);
+    payload->dst = ntohs(iph->ip6_dst.s6_addr16[7]);
+    payload->local_address = TOS_NODE_ID;
+    payload->nxt_hdr = nxt_hdr;
+  }
+
+  event void IPExtensions.handleExtensions(uint8_t label,
+                                           struct ip6_hdr *iph,
+                                           struct ip6_ext *hop,
+                                           struct ip6_ext *dst,
+                                           struct ip6_route *route,
+                                           uint8_t nxt_hdr) {
+    if (hop != NULL) {
+      struct tlv_hdr *tlv = call IPExtensions.findTlv(hop, TLV_TYPE_FLOW);
+      if (tlv != NULL && tlv->len == sizeof(struct tlv_hdr) + sizeof(nx_struct flow_id)) {
+        update_msg(iph, (nx_struct flow_id *)(tlv + 1), label, nxt_hdr);
+      }
+    }
+  }
+
+  event void IPExtensions.reportTransmission(uint8_t label, send_policy_t *send) {
+    int i, flow_idx = lookup_entry(label);
+    nx_struct flow_id_msg *payload =
+      (nx_struct flow_id_msg *)call FlowSend.getPayload(&flow_send, sizeof(nx_struct flow_id_msg));
+
+    
+    if (flow_idx < 0) return;
+    memcpy(payload, &flow_cache[flow_idx].flow, sizeof(nx_struct flow_id_msg));
+
+
+    payload->n_attempts = 0;
+    for (i = 0; i < send->current && i < 3; i++) {
+      // if (send->dest[i] == IEEE154_BROADCAST_ADDR) return;
+      
+      payload->attempts[i].next_hop = send->dest[i];
+      payload->attempts[i].tx = send->retries;
+    }
+    if (i < 3) {
+      payload->attempts[i].next_hop = send->dest[i];
+      payload->attempts[i].tx = send->actRetries;
+      i++;
+    }
+    payload->n_attempts = i;
+    
+    if (!flow_send_busy) {
+      if (call FlowSend.send(0xffff, &flow_send, sizeof(nx_struct flow_id_msg)) == SUCCESS) {
+        flow_send_busy = TRUE;
+        send_flow_idx = flow_idx;
+        return;
+      } 
+      // otherwise fall through and invalidate the cache
+    }
+    flow_cache[flow_idx].flags = 0;
+  }
+
+  event struct tlv_hdr *Headers.getHeader(uint8_t label,
+                                          struct ip6_hdr *msg,
+                                          uint8_t nxt_hdr) {
+    static uint8_t buf[sizeof(struct tlv_hdr) + sizeof(nx_struct flow_id)];
+    struct tlv_hdr *tlv;
+    nx_struct flow_id *flow;
+    tlv = (struct tlv_hdr *)buf;
+    flow = (nx_struct flow_id *)(tlv + 1);
+
+    tlv->type = TLV_TYPE_FLOW;
+    tlv->len = sizeof(struct tlv_hdr) + sizeof(nx_struct flow_id);
+
+/*     if (msg->ip6_dst.s6_addr[0] != 0xff ||  */
+/*         (msg->ip6_dst.s6_addr[0] == 0xff &&  */
+/*          (msg->ip6_dst.s6_addr[1] & 0x0f) > 2)) { */
+      flow->id  = current_flowid++;
+
+      update_msg(msg, flow, label, nxt_hdr);
+      return tlv;
+/*     } */
+/*     return NULL; */
+  }
+
+  event void SerialControl.startDone(error_t e) { }
+  event void SerialControl.stopDone(error_t e) { }
+
+}
diff --git a/tos/lib/net/blip/UdpC.nc b/tos/lib/net/blip/UdpC.nc
new file mode 100644
index 00000000..75944195
--- /dev/null
+++ b/tos/lib/net/blip/UdpC.nc
@@ -0,0 +1,16 @@
+
+#include <BlipStatistics.h>
+
+configuration UdpC {
+  provides interface UDP[uint8_t clnt];
+  provides interface BlipStatistics<udp_statistics_t>;
+} implementation {
+
+  components MainC, IPStackC, UdpP, IPAddressC;
+  UDP = UdpP;
+  BlipStatistics = UdpP;
+
+  MainC -> UdpP.Init;
+  UdpP.IP -> IPStackC.IP[IANA_UDP];
+  UdpP.IPAddress -> IPAddressC;
+}
diff --git a/tos/lib/net/blip/UdpP.nc b/tos/lib/net/blip/UdpP.nc
new file mode 100644
index 00000000..8f592675
--- /dev/null
+++ b/tos/lib/net/blip/UdpP.nc
@@ -0,0 +1,193 @@
+
+#include <lib6lowpan/in_cksum.h>
+#include <BlipStatistics.h>
+
+module UdpP {
+  provides interface UDP[uint8_t clnt];
+  provides interface Init;
+  provides interface BlipStatistics<udp_statistics_t>;
+  uses interface IP;
+  uses interface IPAddress;
+} implementation {
+
+#ifdef PRINTFUART_ENABLED
+#undef dbg
+#define dbg(X,fmt, args...) printfUART(fmt, ##args)
+#endif
+#undef printfUART
+#undef printfUART_in6addr
+#define printfUART(X, fmt ...) ;
+#define printfUART_in6addr(X) ;
+
+  enum {
+    N_CLIENTS = uniqueCount("UDP_CLIENT"),
+  };
+
+  udp_statistics_t stats;
+  uint16_t local_ports[N_CLIENTS];
+
+  enum {
+    LOCAL_PORT_START = 51024U,
+    LOCAL_PORT_STOP  = 54999U,
+  };
+  uint16_t last_localport = LOCAL_PORT_START;
+
+  uint16_t alloc_lport(uint8_t clnt) {
+    int i, done = 0;
+    uint16_t compare = htons(last_localport);
+    last_localport = (last_localport < LOCAL_PORT_START) ? last_localport + 1 : LOCAL_PORT_START;
+    while (!done) {
+      done = 1;
+      for (i = 0; i < N_CLIENTS; i++) {
+        if (local_ports[i] == compare) {
+          last_localport = (last_localport < LOCAL_PORT_START) ? last_localport + 1 : LOCAL_PORT_START;
+          compare = htons(last_localport);
+          done = 0;
+          break;
+        }
+      }
+    }
+    return last_localport;
+  }
+
+  command error_t Init.init() {
+    call BlipStatistics.clear();
+    memclr((uint8_t *)local_ports, sizeof(uint16_t) * N_CLIENTS);
+    return SUCCESS;
+  }
+
+  command error_t UDP.bind[uint8_t clnt](uint16_t port) {
+    int i;
+    port = htons(port);
+    if (port > 0) {
+      for (i = 0; i < N_CLIENTS; i++)
+        if (i != clnt && local_ports[i] == port)
+          return FAIL;
+    }
+    local_ports[clnt] = port;
+    return SUCCESS;
+  }
+
+  event void IP.recv(struct ip6_hdr *iph, void *packet, size_t len, struct ip6_metadata *meta) {
+    uint8_t i;
+    struct sockaddr_in6 addr;
+    struct udp_hdr *udph = (struct udp_hdr *)packet;
+    uint16_t my_cksum, rx_cksum = ntohs(udph->chksum);
+    struct ip_iovec v;
+
+    dbg("UDP", "UDP - IP.recv: len: %i (%i, %i) srcport: %i dstport: %i\n",
+        ntohs(iph->ip6_plen), len, ntohs(udph->len),
+        ntohs(udph->srcport), ntohs(udph->dstport));
+
+    for (i = 0; i < N_CLIENTS; i++)
+      if (local_ports[i] == udph->dstport)
+        break;
+
+    if (i == N_CLIENTS) {
+      // TODO : send ICMP port closed message here.
+      return;
+    }
+    memcpy(&addr.sin6_addr, &iph->ip6_src, 16);
+    addr.sin6_port = udph->srcport;
+
+    udph->chksum = 0;
+    v.iov_base = packet;
+    v.iov_len  = len;
+    v.iov_next = NULL;
+
+    my_cksum = msg_cksum(iph, &v, IANA_UDP);
+    printfUART("rx_cksum: 0x%x my_cksum: 0x%x\n", rx_cksum, my_cksum);
+    if (rx_cksum != my_cksum) {
+      BLIP_STATS_INCR(stats.cksum);
+      printfUART("udp ckecksum computation failed: mine: 0x%x theirs: 0x%x [0x%x]\n", 
+                 my_cksum, rx_cksum, len);
+      printfUART_buf((void *)iph, sizeof(struct ip6_hdr));
+      iov_print(&v);
+      // drop
+      return;
+    }
+
+    BLIP_STATS_INCR(stats.rcvd);
+    signal UDP.recvfrom[i](&addr, (void *)(udph + 1), len - sizeof(struct udp_hdr), meta);
+  }
+
+  /**
+   * Injection point of IP datagrams.  This is only called for packets
+   * being sent from this mote; packets which are being forwarded
+   * never lave the stack and so never use this entry point.
+   *
+   * @msg an IP datagram with header fields (except for length)
+   * @plen the length of the data payload added after the headers.
+   */
+  command error_t UDP.sendto[uint8_t clnt](struct sockaddr_in6 *dest, void *payload, 
+                                           uint16_t len) {
+    struct ip_iovec v[1];
+    v[0].iov_base = payload;
+    v[0].iov_len  = len;
+    v[0].iov_next = NULL;
+    return call UDP.sendtov[clnt](dest, &v[0]);
+  }
+
+  command error_t UDP.sendtov[uint8_t clnt](struct sockaddr_in6 *dest, 
+                                            struct ip_iovec *iov) {
+    error_t rc;
+    struct ip6_packet pkt;
+    struct udp_hdr    udp;
+    struct ip_iovec   v[1];
+    size_t len = iov_len(iov);
+
+    // fill in all the packet fields
+    memclr((uint8_t *)&pkt.ip6_hdr, sizeof(pkt));
+    memclr((uint8_t *)&udp, sizeof(udp));
+    memcpy(&pkt.ip6_hdr.ip6_dst, dest->sin6_addr.s6_addr, 16);
+    call IPAddress.setSource(&pkt.ip6_hdr);
+    
+    if (local_ports[clnt] == 0 && 
+        (local_ports[clnt] = alloc_lport(clnt)) == 0) {
+      return FAIL;
+    }
+    /* udp fields */
+    udp.srcport = local_ports[clnt];
+    udp.dstport = dest->sin6_port;
+    udp.len = htons(len + sizeof(struct udp_hdr));
+    udp.chksum = 0;
+
+    /* ip fields -- everything must be filled in now */
+    pkt.ip6_hdr.ip6_vfc = IPV6_VERSION;
+    pkt.ip6_hdr.ip6_nxt = IANA_UDP;
+    pkt.ip6_hdr.ip6_plen = udp.len;
+
+    // set up the pointers
+    v[0].iov_base = (uint8_t *)&udp;
+    v[0].iov_len  = sizeof(struct udp_hdr);
+    v[0].iov_next = iov;
+    pkt.ip6_data = &v[0];
+    
+    udp.chksum = htons(msg_cksum(&pkt.ip6_hdr, v, IANA_UDP));
+
+    rc = call IP.send(&pkt);
+    BLIP_STATS_INCR(stats.sent);
+    return rc;
+    
+  }
+
+
+  command void BlipStatistics.clear() {
+#ifdef BLIP_STATS
+    memclr((uint8_t *)&stats, sizeof(udp_statistics_t));
+#endif
+  }
+
+  command void BlipStatistics.get(udp_statistics_t *buf) {
+#ifdef BLIP_STATS
+    ip_memcpy(buf, &stats, sizeof(udp_statistics_t));
+#endif
+  }
+
+  default event void UDP.recvfrom[uint8_t clnt](struct sockaddr_in6 *from, void *payload,
+                                               uint16_t len, struct ip6_metadata *meta) {
+
+ }
+
+  event void IPAddress.changed(bool global_valid) {}
+}
diff --git a/tos/lib/net/blip/UdpSocketC.nc b/tos/lib/net/blip/UdpSocketC.nc
new file mode 100644
index 00000000..e4323b7d
--- /dev/null
+++ b/tos/lib/net/blip/UdpSocketC.nc
@@ -0,0 +1,9 @@
+
+generic configuration UdpSocketC() {
+  provides interface UDP;
+} implementation {
+  
+  components UdpC;
+
+  UDP = UdpC.UDP[unique("UDP_CLIENT")];
+}
diff --git a/tos/lib/net/blip/dhcp/Dhcp6ClientC.nc b/tos/lib/net/blip/dhcp/Dhcp6ClientC.nc
new file mode 100644
index 00000000..78c37baf
--- /dev/null
+++ b/tos/lib/net/blip/dhcp/Dhcp6ClientC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**
+ * DHCP v6 Client implementation for TinyOS
+ *
+ * Implements a simple subset of RFC3315 DHCP for stateful address
+ * configuration.  This protocol engine solicits on-link DHCP servers
+ * or relay agents, and then attempts to obtain permanent (IA_NA)
+ * addresses from them.  After an address is acquired, it will renew
+ * it using the parameters contained in the Identity Association
+ * binding; if the lease expires, it will revoke the address using the
+ * IPAddress interface.  At that point all components should stop
+ * using that address as it is no longer valid.
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+configuration Dhcp6ClientC {
+  provides interface Dhcp6Info;
+} implementation {
+  components Dhcp6ClientP;
+  components IPStackControlP;
+  components new UdpSocketC();
+  components new TimerMilliC();
+  components RandomC, Ieee154AddressC, IPAddressC;
+
+  Dhcp6Info = Dhcp6ClientP;
+
+  IPStackControlP.StdControl -> Dhcp6ClientP;
+  
+  Dhcp6ClientP.UDP -> UdpSocketC;
+  Dhcp6ClientP.Timer -> TimerMilliC;
+  Dhcp6ClientP.Ieee154Address -> Ieee154AddressC;
+  Dhcp6ClientP.IPAddress -> IPAddressC;
+  Dhcp6ClientP.Random -> RandomC;
+
+  components LedsC;
+  Dhcp6ClientP.Leds -> LedsC;
+}
diff --git a/tos/lib/net/blip/dhcp/Dhcp6ClientP.nc b/tos/lib/net/blip/dhcp/Dhcp6ClientP.nc
new file mode 100644
index 00000000..27b7414d
--- /dev/null
+++ b/tos/lib/net/blip/dhcp/Dhcp6ClientP.nc
@@ -0,0 +1,361 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**
+ * DHCP v6 Client implementation for TinyOS
+ *
+ * Implements a simple subset of RFC3315 DHCP for stateful address
+ * configuration.  This protocol engine solicits on-link DHCP servers
+ * or relay agents, and then attempts to obtain permanent (IA_NA)
+ * addresses from them.  After an address is acquired, it will renew
+ * it using the parameters contained in the Identity Association
+ * binding; if the lease expires, it will revoke the address using the
+ * IPAddress interface.  At that point all components should stop
+ * using that address as it is no longer valid.
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+#include "dhcp6.h"
+
+module Dhcp6ClientP {
+  provides {
+    interface Dhcp6Info;
+    interface StdControl;
+  }
+  uses {
+    interface UDP;
+    interface Timer<TMilli>;
+    interface Random;
+    interface IPAddress;
+    interface Ieee154Address;
+    interface Leds;
+  }
+} implementation {
+
+  int m_state;
+
+  // txid: current transaction id
+  // t1: time after which to renew the current IA binding from the original server
+  // t2: time after which to renew using any available server
+  // m_time: timeout clock used for state machine transitions
+  // valid_lifetime: valid life of address obtained 
+  uint32_t m_txid, t1, t2, m_time = 0, valid_lifetime = 0;
+
+  // the dhcp6 server we are currently interacting with
+  struct sockaddr_in6 m_srv_addr;
+
+  // DUID of the server we're talking and have obtained the binding from
+  bool m_serverid_valid = FALSE;
+  char m_serverid[24];
+
+  // weather to send unicast messages once we've picked a server from
+  // ADVERTIZE messages
+  bool m_unicast = TRUE;
+
+  enum {
+    // my IAID for all transactions
+    IAID = 1,
+    VALID_WAIT = 0xff,
+    
+    // how long to send requests before hopping back to SOLICIT
+    REQUEST_TIMEOUT = 60,
+
+    TIMER_PERIOD = 5,
+  };
+  
+  command error_t StdControl.start() {
+    m_state = DH6_SOLICIT;
+    call UDP.bind(DH6PORT_DOWNSTREAM);
+    call Timer.startPeriodic(1024 * TIMER_PERIOD);
+    return SUCCESS;
+  }
+  
+  command error_t StdControl.stop() { 
+    call Timer.stop();
+    valid_lifetime = 0;
+    call UDP.bind(0);
+    call IPAddress.removeAddress();
+    return SUCCESS;
+  }
+
+  void setup(struct dh6_request *req, int type) {
+    ieee154_laddr_t eui64;
+    m_txid = call Random.rand32() & 0xffffff;
+
+    eui64 = call Ieee154Address.getExtAddr();
+    req->dh6_hdr.dh6_type_txid = htonl((((uint32_t)type << 24)) | m_txid);
+    req->dh6_id.type = htons(DH6OPT_CLIENTID);
+    req->dh6_id.len = htons(12);
+    req->dh6_id.duid_ll.duid_type = htons(3);
+    req->dh6_id.duid_ll.hw_type = htons(HWTYPE_EUI64);
+    memcpy(req->dh6_id.duid_ll.eui64, eui64.data, 8);
+  }
+
+  void sendSolicit() {
+    struct dh6_request sol;
+    // create a solicit message
+    setup(&sol, DH6_SOLICIT);
+
+    // these always go to the ALLAGENT multicast group, so overwrite
+    // whoever we might have been corresponding with.
+    inet_pton6(DH6ADDR_ALLAGENT, &m_srv_addr.sin6_addr);
+    m_srv_addr.sin6_port = htons(DH6PORT_UPSTREAM);
+
+    call Leds.led0Toggle();
+    call UDP.sendto(&m_srv_addr, &sol, sizeof(struct dh6_solicit));
+  }
+
+  void sendRequest() {
+    char msg[sizeof(struct dh6_request) + sizeof(m_serverid)];
+    struct dh6_request *req = (struct dh6_request *)msg;
+    int len = sizeof(struct dh6_request);
+    struct dh6_opt_header *hdr = (struct dh6_opt_header *)m_serverid;
+
+    setup(req, DH6_REQUEST);
+
+    req->dh6_ia.type = ntohs(DH6OPT_IA_NA);
+    req->dh6_ia.len = ntohs(12);
+    req->dh6_ia.iaid = ntohl(IAID);
+    req->dh6_ia.t1 = 0xffffffff;
+    req->dh6_ia.t2 = 0xffffffff;
+    
+    memcpy(msg + sizeof(struct dh6_request), 
+           m_serverid,
+           sizeof(m_serverid));
+    len += ntohs(hdr->len) + sizeof(struct dh6_opt_header);
+
+    call UDP.sendto(&m_srv_addr, msg, len);
+  }
+
+  void sendRenew() {
+    char msg[sizeof(struct dh6_request) + 
+             sizeof(m_serverid) +
+             sizeof(struct dh6_iaaddr)];
+    struct dh6_request *req = (struct dh6_request *)msg;
+    int len;
+    struct dh6_opt_header *srvid = (struct dh6_opt_header *)m_serverid;
+    struct dh6_iaaddr *iaaddr = (struct dh6_iaaddr *)(req + 1);
+    void *msg_srvid = (iaaddr + 1);
+
+    // request and server DUID
+    len = sizeof(struct dh6_request) + 
+      sizeof(struct dh6_opt_header) + ntohs(srvid->len);
+    setup(req, DH6_RENEW);
+
+    req->dh6_ia.type = ntohs(DH6OPT_IA_NA);
+    req->dh6_ia.len = ntohs(12 + sizeof(struct dh6_iaaddr));
+    req->dh6_ia.iaid = ntohl(IAID);
+    req->dh6_ia.t1 = t1;
+    req->dh6_ia.t2 = t2;
+    
+    len += sizeof(struct dh6_iaaddr);
+    iaaddr->type = htons(5);
+    iaaddr->len = htons(24);
+    call IPAddress.getGlobalAddr(&iaaddr->addr);
+    iaaddr->preferred_lifetime = htonl(3600); //preferred_lifetime);
+    iaaddr->valid_lifetime = htonl(7200);//preferred_lifetime);
+
+    memcpy(msg_srvid, m_serverid, sizeof(m_serverid));
+    call UDP.sendto(&m_srv_addr, msg, len);
+  }
+
+  event void Timer.fired() {
+    // state machine transition timeouts
+    switch (m_state) {
+    case DH6_SOLICIT:
+      sendSolicit();
+      break;
+    case DH6_REQUEST:
+      sendRequest();
+      if (m_time > REQUEST_TIMEOUT) {
+        m_state = DH6_SOLICIT;
+        m_time = 0;
+      }
+      break;
+    case DH6_RENEW:
+      sendRenew();
+      if (m_time > 0 && m_time > ntohl(t2)) {
+        // maybe pick a different server...
+        m_state = DH6_SOLICIT;
+        m_time = 0;
+      }
+      break;
+    case VALID_WAIT:
+      if (m_time > 0 && m_time > ntohl(t1)) {
+        m_state = DH6_RENEW;
+      }
+      break;
+    }
+    if (m_time > 0) 
+      m_time += TIMER_PERIOD;
+
+    // address expirations are separate from the state machine
+    // transitions
+    if (valid_lifetime > TIMER_PERIOD && 
+        valid_lifetime <= TIMER_PERIOD * 2) {
+      // lease really expired
+      m_state = DH6_SOLICIT;
+      call IPAddress.removeAddress();
+      valid_lifetime = 0;
+    } 
+
+    if (valid_lifetime > 0) 
+      valid_lifetime -= TIMER_PERIOD;
+  }
+
+  void *findOption(void *msg, int len, int type) {
+    while (len >= sizeof(struct dh6_opt_header)) {
+      struct dh6_opt_header *opt = msg;
+      if (opt->type == htons(type)) {
+        return msg;
+      } else if (opt->len == 0) {
+        break;
+      } else {
+        msg = 
+          ((char*)msg) + ntohs(opt->len) + sizeof(struct dh6_opt_header);
+        len -= ntohs(opt->len) + sizeof(struct dh6_opt_header);
+      }
+    }
+    return NULL;
+  }
+
+  event void UDP.recvfrom(struct sockaddr_in6 *src, void *payload, 
+                          uint16_t len, struct ip6_metadata *meta) {
+    struct dh6_header *hdr = payload;
+    struct dh6_opt_header *opt;
+    void *id;
+    uint16_t type = ntohl(hdr->dh6_type_txid) >> 24;
+    uint32_t txid = ntohl(hdr->dh6_type_txid) & 0xffffff;
+
+    if (txid != m_txid) 
+      return;      
+
+    switch (m_state) {
+    case DH6_SOLICIT:
+      switch (type) {
+      case DH6_ADVERTISE:
+        opt = id = findOption(hdr + 1, len - sizeof(struct dh6_header), 
+                              DH6OPT_SERVERID);
+        if (id) {
+          // save the server DUID for use in reply messages and start
+          // requesting an address.
+          m_serverid_valid = TRUE;
+          memcpy(m_serverid, id, ntohs(opt->len) + 
+                 sizeof(struct dh6_opt_header));
+          // we can unicast to this guy now
+          // memcpy(&m_srv_addr, src, sizeof(struct sockaddr_in6));
+          m_time = 1;
+          m_state = DH6_REQUEST;
+          if (m_unicast) 
+            memcpy(&m_srv_addr, src, sizeof(struct sockaddr_in6));
+        }
+      }
+      break;
+    case DH6_REQUEST:
+    case DH6_RENEW:
+      call Leds.led1Toggle();
+      if (type != DH6_REPLY) return;
+      opt = id = findOption(hdr + 1, len - sizeof(struct dh6_header),
+                            DH6OPT_SERVERID);
+      if (id) {
+        // check that the serverid is the one we asked for
+        if (memcmp(m_serverid, id, ntohs(opt->len) +
+                   sizeof(struct dh6_opt_header)) != 0) 
+          return;
+        // TODO : check client id
+      }
+      opt = id = findOption(hdr + 1, len - sizeof(struct dh6_header), DH6OPT_IA_NA);
+      if (id) {
+        struct dh6_ia *ia = id;
+        struct dh6_status *status;
+        void *addr_opt;
+        // we got an IA_NA block back
+        if (ntohl(ia->iaid) != IAID)
+          return;
+
+        // see if there's an error code
+        status = findOption(ia + 1, ntohs(ia->len) - sizeof(struct dh6_ia), 13);
+        if (status) {
+          if (status->code != htons(0)) {
+            m_state = DH6_SOLICIT;
+            call IPAddress.removeAddress();
+            return;
+          }
+        }
+
+        // otherwise, hopefully there's an address
+        addr_opt = findOption(ia + 1, ntohs(ia->len) - sizeof(struct dh6_ia), 5);
+        if (addr_opt) {
+          struct dh6_iaaddr *addr = addr_opt;
+          // got an address... save it and wait for it to expire
+          call IPAddress.setAddress(&addr->addr);
+          t1 = ia->t1;
+          t2 = ia->t2;
+          m_time = 1;
+          valid_lifetime = ntohl(addr->valid_lifetime);
+          m_state = VALID_WAIT;
+          call Leds.led2Toggle();
+        }
+      }
+      break;
+    }
+  }
+
+  command int Dhcp6Info.getTimers(struct dh6_timers *t) {
+    t->iaid = IAID;
+    t->valid_lifetime = valid_lifetime;
+    t->clock = m_time;
+    t->t1 = ntohl(t1);
+    t->t2 = ntohl(t2);
+    return 0;
+  }
+
+  command int Dhcp6Info.getDuid(uint8_t *buf, int len) {
+    if (m_serverid_valid) {
+      struct dh6_opt_header *opt = (struct dh6_opt_header *)m_serverid;
+      if (ntohs(opt->len) < len) {
+        memcpy(buf, m_serverid + sizeof(struct dh6_opt_header),
+               ntohs(opt->len));
+        return ntohs(opt->len);
+      }
+    }
+    return -1;
+  }
+
+  command void Dhcp6Info.useUnicast(bool yes) {
+    m_unicast = yes;
+  }
+
+  event void IPAddress.changed(bool global_valid) {}
+  event void Ieee154Address.changed() {}
+
+}
diff --git a/tos/lib/net/blip/dhcp/Dhcp6Info.nc b/tos/lib/net/blip/dhcp/Dhcp6Info.nc
new file mode 100644
index 00000000..39fa3370
--- /dev/null
+++ b/tos/lib/net/blip/dhcp/Dhcp6Info.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**
+ * Interface for getting information about a client's status.
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+#include <dhcp6.h>
+
+interface Dhcp6Info {
+  /**
+   * Get the DHCP Unique Identifier of the server the client is talking to.
+   *
+   * @buf return buffer
+   * @len length of buf
+   * @return number of bytes written, or -1 on error
+   */
+  command int getDuid(uint8_t *buf, int len);
+
+  /**
+   * @t struct containing the current state of timers associated with our lease.
+   */
+  command int getTimers(struct dh6_timers *t);
+
+  /**
+   * controls weather or not the client sends unicast messages to dhcp
+   * servers.  default is yes; if no, the client will always use the
+   * link-local all dhcp agents multicast group (ff02::1:a)
+   */
+  command void useUnicast(bool yes);
+}
diff --git a/tos/lib/net/blip/dhcp/Dhcp6P.nc b/tos/lib/net/blip/dhcp/Dhcp6P.nc
new file mode 100644
index 00000000..2b3d488a
--- /dev/null
+++ b/tos/lib/net/blip/dhcp/Dhcp6P.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include "dhcp6.h"
+
+module Dhcp6P {
+  provides interface StdControl;
+  uses {
+    interface UDP;
+    interface Timer<TMilli>;
+    interface Random;
+  }
+} implementation {
+  int m_state;
+  uint32_t m_txid;
+  
+  command error_t StdControl.start() {
+    m_state = DH6_SOLICIT;
+    m_txid = call Random.rand32();
+    call UDP.bind(DH6PORT_DOWNSTREAM);
+  }
+
+  command error_t StdControl.stop() { }
+
+  void sendSolicit() {
+    struct dh6_solicit sol;
+    sol.dh6_hdr.dh6_type_txid = htonl((DHCP_SOLICIT << 16) | m_txid);
+    sol.dh6_id.type = htons(DH6OPT_CLIENTID);
+    sol.dh6_id.len = htons(8);
+    sol.dh6_id.duid_ll.duid_type = 3;
+    sol.dh6_id.duid_ll.hw_type = HWTYPE_EUI64;
+    
+  }
+
+  event void Timer.fired() {
+    switch (m_state) {
+    case DH6_SOLICIT:
+      sendSolicit();
+      break;
+    }
+  }
+}
diff --git a/tos/lib/net/blip/dhcp/Dhcp6RelayC.nc b/tos/lib/net/blip/dhcp/Dhcp6RelayC.nc
new file mode 100644
index 00000000..ca430515
--- /dev/null
+++ b/tos/lib/net/blip/dhcp/Dhcp6RelayC.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**
+ * DHCP v6 relay agent for TinyOS
+ *
+ * DHCP allows relay agents to forward traffic to an external DHCP
+ * server which is not on-link with the requesting client.  To do
+ * this, the relay agent reencapsulates the request message and
+ * includes its own address and the address of the peer, before
+ * sending the request on to the DCHP servers multicast group.  In
+ * blip, this group is routed to the edge of the network where the
+ * dhcp server is presumably running.
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+
+configuration Dhcp6RelayC {
+
+} implementation {
+  components Dhcp6RelayP;
+  components IPAddressC, Ieee154AddressC;
+  components new TimerMilliC(), new UdpSocketC();
+  components RandomC;
+  components MainC;
+
+  Dhcp6RelayP.UDP -> UdpSocketC;
+  Dhcp6RelayP.IPAddress -> IPAddressC;
+  Dhcp6RelayP.Ieee154Address -> Ieee154AddressC;
+  Dhcp6RelayP.Random -> RandomC;
+  Dhcp6RelayP.Boot -> MainC;
+  Dhcp6RelayP.AdvTimer -> TimerMilliC;
+
+}
diff --git a/tos/lib/net/blip/dhcp/Dhcp6RelayP.nc b/tos/lib/net/blip/dhcp/Dhcp6RelayP.nc
new file mode 100644
index 00000000..2e53afdf
--- /dev/null
+++ b/tos/lib/net/blip/dhcp/Dhcp6RelayP.nc
@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/*
+ * DHCP v6 Relay Agent
+ *
+ * This agent currently all forwards requests to the edge of the
+ * network.  In the future, we will cache ADVERTISE messages so we can
+ * reply without a round trip to the edge.
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+
+#include "dhcp6.h"
+
+module Dhcp6RelayP {
+  uses {
+    interface UDP;
+    interface Timer<TMilli> as AdvTimer;
+    interface IPAddress;
+    interface Ieee154Address;
+    interface Boot;
+    interface Random;
+  }
+} implementation {
+//   void *m_msg;
+//   int m_len;
+  bool m_alive = FALSE;
+
+  event void Boot.booted() {
+    call UDP.bind(DH6PORT_UPSTREAM);
+  }
+
+  void *findOption(void *msg, int len, int type) {
+    while (len >= sizeof(struct dh6_opt_header)) {
+      struct dh6_opt_header *opt = msg;
+      if (opt->type == htons(type)) {
+        return msg;
+      } else if (opt->len == 0) {
+        break;
+      } else {
+        msg = 
+          ((char*)msg) + ntohs(opt->len) + sizeof(struct dh6_opt_header);
+        len -= ntohs(opt->len) + sizeof(struct dh6_opt_header);
+      }
+    }
+    return NULL;
+  }
+
+  void setup(struct dh6_request *req, int type, uint32_t txid) {
+    ieee154_laddr_t eui64;
+
+    eui64 = call Ieee154Address.getExtAddr();
+    req->dh6_hdr.dh6_type_txid = htonl((((uint32_t)type << 24)) | 
+                                      (txid & 0xffffff));
+    req->dh6_id.type = htons(DH6OPT_SERVERID);
+    req->dh6_id.len = htons(12);
+    req->dh6_id.duid_ll.duid_type = htons(3);
+    req->dh6_id.duid_ll.hw_type = htons(HWTYPE_EUI64);
+    memcpy(req->dh6_id.duid_ll.eui64, eui64.data, 8);
+  }
+
+  event void UDP.recvfrom(struct sockaddr_in6 *src, void *payload,
+                          uint16_t len, struct ip6_metadata *meta) {
+    struct dh6_header *hdr = payload;
+    uint16_t type = ntohl(hdr->dh6_type_txid) >> 24;
+    printfUART("relay agent RX!: %i\n", type);
+
+    if (!m_alive) return;
+    
+//     if (type == DH6_SOLICIT) {
+//       // send ADVERTISE
+//       if (!call AdvTimer.isRunning()) {
+//         struct dh6_request *req;
+//         struct sockaddr_in6 *m_src;
+//         m_msg = malloc(sizeof(struct dh6_request) + 
+//                        sizeof(struct sockaddr_in6));
+//         if (!m_msg) return;
+
+//         req = (struct dh6_request *)(((char *)m_msg) + 
+//                                       sizeof(struct sockaddr_in6));
+//         m_src = (struct sockaddr_in6 *)m_msg;
+
+//         setup(req, DH6_ADVERTISE, ntohl(hdr->dh6_type_txid) & 0xffffff );
+//         m_len = sizeof(struct dh6_request);
+
+//         memcpy(m_src, src, sizeof(struct sockaddr_in6));
+//         call AdvTimer.startOneShot(call Random.rand16() & 0x7);
+//       }
+//     } else
+    if (type == DH6_RELAY_REPLY) {
+      struct dh6_relay_hdr *fw_hdr = payload;
+      struct sockaddr_in6 peer;
+      memcpy(&peer.sin6_addr, &fw_hdr->peer_addr, sizeof(struct in6_addr));
+      // inet_pton6(DH6ADDR_ALLSERVER, &peer.sin6_addr);
+      peer.sin6_port = htons(DH6PORT_DOWNSTREAM);
+      
+      if (ntohs(fw_hdr->opt_type) != 9) return;
+      // if (ntohs(fw_hdr->opt_len) > len - sizeof(struct dh6_relay_hdr)) return;
+      call UDP.sendto(&peer, (void *)(fw_hdr + 1), len - sizeof(struct dh6_relay_hdr));
+    } else {
+      // just forward it...
+      struct dh6_relay_hdr fw_hdr;
+      struct ip_iovec v[2];
+      struct sockaddr_in6 srv_addr;
+
+      inet_pton6(DH6ADDR_ALLSERVER, &srv_addr.sin6_addr);
+      srv_addr.sin6_port = htons(DH6PORT_UPSTREAM);
+
+
+      fw_hdr.type = DH6_RELAY_FORW;
+      fw_hdr.hopcount = 1;
+      call IPAddress.getGlobalAddr(&fw_hdr.link_addr);
+      memcpy(&fw_hdr.peer_addr, &src->sin6_addr, sizeof(struct in6_addr));
+      fw_hdr.opt_type = htons(9);
+      fw_hdr.opt_len = htons(len);
+
+      v[0].iov_base = (void *)&fw_hdr;
+      v[0].iov_len = sizeof(fw_hdr);
+      v[0].iov_next = &v[1];
+      v[1].iov_base = payload;
+      v[1].iov_len = len;
+      v[1].iov_next = NULL;
+
+      call UDP.sendtov(&srv_addr, v);
+    }
+  }
+
+  event void AdvTimer.fired() {
+#if 0
+    struct dh6_request *req;
+    struct sockaddr_in6 *m_src;
+    req = (struct dh6_request *)(((char *)m_msg) + 
+                                 sizeof(struct sockaddr_in6));
+    m_src = (struct sockaddr_in6 *)m_msg;
+    
+    call UDP.sendto(m_src, req, m_len);
+    free(m_msg);
+#endif
+  }
+
+  event void Ieee154Address.changed() {}
+  event void IPAddress.changed(bool global_valid) {
+    m_alive = global_valid;
+  }
+}
diff --git a/tos/lib/net/blip/dhcp/DhcpCmdC.nc b/tos/lib/net/blip/dhcp/DhcpCmdC.nc
new file mode 100644
index 00000000..7ce49098
--- /dev/null
+++ b/tos/lib/net/blip/dhcp/DhcpCmdC.nc
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+configuration DhcpCmdC {
+
+} implementation {
+  components DhcpCmdP;
+  components new ShellCommandC("leases");
+  components Dhcp6ClientC, IPAddressC;
+
+  DhcpCmdP.ShellCommand -> ShellCommandC;
+  DhcpCmdP.Dhcp6Info -> Dhcp6ClientC;
+  DhcpCmdP.IPAddress -> IPAddressC;
+}
diff --git a/tos/lib/net/blip/dhcp/DhcpCmdP.nc b/tos/lib/net/blip/dhcp/DhcpCmdP.nc
new file mode 100644
index 00000000..9810508b
--- /dev/null
+++ b/tos/lib/net/blip/dhcp/DhcpCmdP.nc
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+module DhcpCmdP {
+  uses {
+    interface ShellCommand;
+    interface Dhcp6Info;
+    interface IPAddress;
+  }
+
+} implementation {
+
+#define TO_CHAR(X) (((X) < 10) ? ('0' + (X)) : ('a' + ((X) - 10)))
+  
+  event char *ShellCommand.eval(int argc, char **argv) {
+#define LEN (MAX_REPLY_LEN - (cur - buf))
+    char *cur, *buf = call ShellCommand.getBuffer(MAX_REPLY_LEN);
+    struct in6_addr addr;
+    struct dh6_timers timers;
+    int duid_len;
+    uint8_t duid[24];
+
+    if (!(call IPAddress.getGlobalAddr(&addr)))
+      return "no valid lease\n";
+
+    call Dhcp6Info.getTimers(&timers);
+
+    cur = buf;
+    cur += snprintf(cur, LEN, "lease on ");
+    cur += inet_ntop6(&addr, cur, LEN) - 1;
+    *cur++ = '\n';
+    cur += snprintf(cur, LEN, "iaid: %i valid: %li t1: %li t2: %li\n",
+                   timers.iaid, timers.valid_lifetime, timers.t1, timers.t2);
+
+    if ((duid_len = call Dhcp6Info.getDuid(duid, sizeof(duid))) > 0 &&
+        LEN > duid_len * 3 + 6) {
+      int i;
+      cur += snprintf(cur, LEN, "duid: ");
+      for (i = 0; i < duid_len; i++) {
+        *cur++ = TO_CHAR(duid[i] >> 4);
+        *cur++ = TO_CHAR(duid[i] & 0x0f);
+        if (i < duid_len - 1)
+          *cur++ = ':';
+      }
+      *cur++ = '\n';
+    }
+    *cur++ = '\0';
+    return buf;
+  }
+
+  event void IPAddress.changed(bool valid) {}
+}
diff --git a/tos/lib/net/blip/dhcp/NoDhcpC.nc b/tos/lib/net/blip/dhcp/NoDhcpC.nc
new file mode 100644
index 00000000..faa3546c
--- /dev/null
+++ b/tos/lib/net/blip/dhcp/NoDhcpC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**
+ * Component for doing compile-time address allocation.  Wired by the
+ * stack, sets a static address based on IN6_PREFIX and TOS_NODE_ID on
+ * boot.  Useful for development or of you want to hard-code addresses.
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+#include <lib6lowpan/ip.h>
+
+module NoDhcpC {
+  uses {
+    interface Boot;
+    interface IPAddress;
+  }
+} implementation {
+
+  event void Boot.booted() {
+    struct in6_addr addr;
+    memset(&addr, 0, sizeof(addr));
+    inet_pton6(IN6_PREFIX, &addr);
+    addr.s6_addr16[7] = htons(TOS_NODE_ID);
+    call IPAddress.setAddress(&addr);
+  }
+
+  event void IPAddress.changed(bool valid) {}
+}
diff --git a/tos/lib/net/blip/dhcp/dhcp6.h b/tos/lib/net/blip/dhcp/dhcp6.h
new file mode 100644
index 00000000..2058bb8d
--- /dev/null
+++ b/tos/lib/net/blip/dhcp/dhcp6.h
@@ -0,0 +1,164 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef _DHCP_H
+#define _DHCP_H
+
+#include <stdint.h>
+
+/* Error Values */
+#define DH6ERR_FAILURE          16
+#define DH6ERR_AUTHFAIL         17
+#define DH6ERR_POORLYFORMED     18
+#define DH6ERR_UNAVAIL          19
+#define DH6ERR_OPTUNAVAIL       20
+
+/* Message type */
+#define DH6_SOLICIT     1
+#define DH6_ADVERTISE   2
+#define DH6_REQUEST     3
+#define DH6_CONFIRM     4
+#define DH6_RENEW       5
+#define DH6_REBIND      6
+#define DH6_REPLY       7
+#define DH6_RELEASE     8
+#define DH6_DECLINE     9
+#define DH6_RECONFIGURE 10
+#define DH6_INFORM_REQ  11
+#define DH6_RELAY_FORW  12
+#define DH6_RELAY_REPLY 13
+
+/* Predefined addresses */
+#define DH6ADDR_ALLAGENT        "ff02::1:2"
+#define DH6ADDR_ALLSERVER       "ff05::1:3"
+#define DH6PORT_DOWNSTREAM      546
+#define DH6PORT_UPSTREAM        547
+
+/* Protocol constants */
+
+/* timer parameters (msec, unless explicitly commented) */
+#define SOL_MAX_DELAY   1000
+#define SOL_TIMEOUT     1000
+#define SOL_MAX_RT      120000
+#define INF_TIMEOUT     1000
+#define INF_MAX_RT      120000
+#define REQ_TIMEOUT     1000
+#define REQ_MAX_RT      30000
+#define REQ_MAX_RC      10      /* Max Request retry attempts */
+#define REN_TIMEOUT     10000   /* 10secs */
+#define REN_MAX_RT      600000  /* 600secs */
+#define REB_TIMEOUT     10000   /* 10secs */
+#define REB_MAX_RT      600000  /* 600secs */
+#define REL_TIMEOUT     1000    /* 1 sec */
+#define REL_MAX_RC      5
+
+
+#define DH6OPT_CLIENTID 1
+#define DH6OPT_SERVERID 2
+#define DH6OPT_IA_NA 3
+#define DH6OPT_IA_TA 4
+#define DH6OPT_IAADDR 5
+#define DH6OPT_ORO 6
+#define DH6OPT_PREFERENCE 7
+
+#define HWTYPE_EUI64 27
+
+struct dh6_header {
+  uint32_t dh6_type_txid;
+};
+
+struct dh6_opt_header {
+  uint16_t type;
+  uint16_t len;
+} __attribute__ ((__packed__));
+
+struct dh6_clientid {
+  uint16_t type;
+  uint16_t len;
+  struct {
+    uint16_t duid_type;
+    uint16_t hw_type;
+    uint8_t eui64[8];
+  } duid_ll;
+} __attribute__ ((__packed__));
+
+struct dh6_ia {
+  uint16_t type;
+  uint16_t len;
+  uint32_t iaid;
+  uint32_t t1;
+  uint32_t t2;
+} __attribute__ ((__packed__));;
+
+struct dh6_iaaddr {
+  uint16_t type;
+  uint16_t len;
+  struct in6_addr addr;
+  uint32_t preferred_lifetime;
+  uint32_t valid_lifetime;
+} __attribute__ ((__packed__));;
+
+struct dh6_status {
+  uint16_t type;
+  uint16_t len;
+  uint16_t code;
+};
+
+struct dh6_solicit {
+  struct dh6_header dh6_hdr;
+  struct dh6_clientid dh6_id;
+} __attribute__ ((__packed__));
+
+struct dh6_request {
+  struct dh6_header dh6_hdr;
+  struct dh6_clientid dh6_id;
+  struct dh6_ia dh6_ia;
+} __attribute__ ((__packed__));
+
+struct dh6_relay_hdr {
+  uint8_t type;
+  uint8_t hopcount;
+  struct in6_addr link_addr;
+  struct in6_addr peer_addr;
+  uint16_t opt_type;
+  uint16_t opt_len;
+} __attribute__ ((__packed__));
+
+struct dh6_timers {
+  int iaid;
+  uint32_t valid_lifetime;
+  uint32_t clock;
+  uint32_t t1;
+  uint32_t t2;
+};
+
+#endif
diff --git a/tos/lib/net/blip/doc/README b/tos/lib/net/blip/doc/README
new file mode 100644
index 00000000..8ae52d26
--- /dev/null
+++ b/tos/lib/net/blip/doc/README
@@ -0,0 +1,94 @@
+
+ @title blip documentation
+ @author Stephen Dawson-Haggerty stevedh@eecs.berkeley.edu
+ @release public
+---------------------------------------------------------------------
+
+ 1. Installation
+
+ - This is only going to work on linux.
+
+ - The recommended version of TinyOS is a recent CVS checkout.  This
+   is necessary for appropriate radio stack support.
+
+ - Make sure the c serial tools are built in
+   $TOSROOT/support/sdk/c/sf.  You may need to run ./bootstrap,
+   ./configure, and make in that folder to generate libmote.a.
+
+ 2. Building
+
+ - Build a test app:
+      * cd to $TOSROOT/apps/UDPEcho/ and try typing `make <platform> blip`
+ - Build the Ieee802.15.4 bridge to your computer
+      * cd to $TOSROOT/apps/IPBaseStation/ and `make <platform> blip`
+ - Build the driver 
+      * cd to $TOSROOT/support/sdk/c/blip
+      * run ./bootstrap
+      * run ./configure
+      * run make
+
+ 3. Running
+
+ - Install IPBaseStation on a mote.  This will be your
+       computer's interface to the world of low-power radio.  Setting
+       the node id and channel is not important-- these settings will be
+       overwritten.
+
+ - Start the driver (once you've built it)
+      * cd $TOSROOT/support/sdk/c/blip
+      * edit the config file $TOSROOT/support/sdk/c/blip/serial_tun.conf
+         * set 'addr' you would like your computer's interface to use on the PAN
+         * leave 'proxy' set to 'lo'
+      * sudo driver/ip-driver /dev/ttyUSB0 telosb
+           (replace the device and baud with whatever you're using)
+   The config file is assumed to be in the CWD when ip-driver starts;
+       if this is not the case it may be specified using '-c <config file>'
+
+ - The driver registers itself on the fec0::/64
+       subnet (or whatever you have specified in the config file).
+
+ - If you program a few motes with UDPEcho, their addresses are formed
+       with octets 15 and 16 of the IPv6 address comming from the
+       802.15.4 short address you programmed them with.  Octets 9-14
+       are zero, so the address formed is:
+
+       +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
+       |  network prefix       |     zero        | id  | 
+       +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
+
+       ICMPv6 DAD is not performed.
+
+ - For instance, if you program a mote with ID 101 (0x65), you can try
+       ping6 fec0::65
+       tracert6 fec0::65
+       nc6 -u fec0::65 7
+       nc6 -u fec0::65 2000
+       
+       UDPEcho runs an echo service on port 7, and a simple shell on
+       port 2000; type 'help' for a list of commands.
+
+ - The motes can also report back statistics every 15 seconds over
+       UDP.  They will send these reports to an address specified in the
+       application make file; however these reports are disabled by default.
+       You can observe these statistics using the Listener.py
+       script in $TOSROOT/apps/UDPEcho/: `python Listener.py`.
+
+ - The driver provides a simple console when running, which allows you
+       to inspect and manipulates routes, and view statistics.  The
+       console runs as a telnet service on port 6106.
+
+ - A good way of understanding what is happening is to start wireshark
+       on tun0; you should be able to observe the neighbor discovery
+       process as motes boot.  You may also notice messages sent to
+       ff05::1; these are routing updates.  They are sent from a
+       binary exponential timer with a maximum period of 5 minutes to
+       inform the router of mote's presence; however, they are
+       suppressed by data traffic since the routing updates will be
+       piggybacked on it.
+
+ - Further reading: doc/ contains a numbers of README's related to
+       pieces of blip such as the socket interface, the shell, and
+       network programming support.  For more technical details on
+       IPv6, please see any reference on the subject.  Many of the
+       documents produced by the IETF ROLL and 6lowpan working groups
+       are relevent to this design space.  
diff --git a/tos/lib/net/blip/doc/README-IP b/tos/lib/net/blip/doc/README-IP
new file mode 100644
index 00000000..a73fbf9b
--- /dev/null
+++ b/tos/lib/net/blip/doc/README-IP
@@ -0,0 +1,56 @@
+
+ @title IP data-structure documentation
+ @author Stephen Dawson-Haggerty
+ @release public
+----------------------------------------------------------------------
+
+The ip-stack provides a bare IP datagram interface to the network
+layer; this is documented in comments in the code.
+
+For the purposes of socket programming, two data structures are most
+important.  The 'struct sockaddr_in6' and the 'struct in6_addr'.  They
+are substantially shared with the linux/bsd versions, and reproduced
+below.
+
+struct in6_addr
+  {
+    union
+      {
+	uint8_t	u6_addr8[16];
+	uint16_t u6_addr16[8];
+	uint32_t u6_addr32[4];
+      } in6_u;
+#define s6_addr			in6_u.u6_addr8
+#define s6_addr16		in6_u.u6_addr16
+#define s6_addr32		in6_u.u6_addr32
+  };
+
+struct sockaddr_in6 {
+  uint16_t sin6_port;
+  struct in6_addr sin6_addr;
+};
+
+void inet_pton6(char *addr, struct in6_addr *dest);
+
+Usage
+----------------------------------------------------------------------
+
+ Example 1: Suppose we want to setup a sockaddr_in6 to point to ff02::5, port 10000:
+ {
+   struct sockaddr_in6 sa6;
+   inet_pton6("ff02::5", &sa6.sin6_addr);
+   sa6.sin6_port = htons(10000);
+ }
+
+ Example 2: Do the same thing, but without the overhead of storing and
+  parsing the string address representation.
+ {
+   struct sockaddr_in6 sa6;
+   memset(&sa6, 0, sizeof(struct sockaddr_in6));
+   sa6.sin6_addr.s6_addr16[0] = htons(0xff02);
+   sa6.sin6_addr.s6_addr[15] = 5;
+   sa6.sin6_port = htons(10000);
+ }
+
+ This code is very unix-y; the second example will work on *nix's.
+
diff --git a/tos/lib/net/blip/doc/README-MERAKI b/tos/lib/net/blip/doc/README-MERAKI
new file mode 100644
index 00000000..ab9514b0
--- /dev/null
+++ b/tos/lib/net/blip/doc/README-MERAKI
@@ -0,0 +1,53 @@
+
+ @title Meraki Documentation
+ @author Stephen Dawson-Haggerty stevedh@eecs.berkeley.edu
+ @release internal
+---------------------------------------------------------------------
+
+This README explains how to use a Meraki Mini programmed with
+OpenWRT/kamikaze as a border router.  This document and the code make
+the following assumptions:
+
+ - The Meraki has a public IP address or is in a DMZ such that the
+        6over4 tunneling protocol will work.
+ - The Meraki is the sole router for a prefix
+
+Background
+---------------------------------------------------------------------
+
+To ease configuration, the important parameters are stored in a
+database.  When the meraki waits up, it hits the database and
+downloads a few config files which it then uses.  To grab new
+configuration, you can either log in and manually restart the router
+daemon, or just reboot.  The parameters stored are:
+ prefix : the one received from the hurricane electric tunnel broker
+ short addr : the address of this device on the network
+ channel : which channel to use
+
+Install
+---------------------------------------------------------------------
+
+ 1. Install the router daemon on the meraki using either the provided
+ipkg, or your own if you've built a version.  Building the package is
+very easy but not covered here.
+   'ipkg update'
+   'ipkg install lowpan-bridge_1.2-855_mips.ipk' 
+In order for the dependancies to be automatically installed, you must
+do the update first so that the package system downloads the directory
+with the necessary packages.
+ 2. Set up the configuration parameters in the database.  The key used
+is the hostname; precisely, whatever 'uname -n' prints.  If no key is
+found in the database the meraki will just use defaults.
+ 3. Start the daemon with '/etc/init.d/lowpan-bridge start' This will
+run automatically when the meraki boots.
+
+... I think that's it.  Pretty easy!
+
+Bugs/Notes
+---------------------------------------------------------------------
+
+There seems to be an issue with the serial port on the meraki.  The
+effect is that packets are dropped when you send too quickly.  This
+mostly effects fragmentation.  As a stopgap, I've inserted a timeout
+between fragments, but this means the performance is somewhat worse
+then on a PC and a micaz.
diff --git a/tos/lib/net/blip/doc/README-NWPROG b/tos/lib/net/blip/doc/README-NWPROG
new file mode 100644
index 00000000..ef59590d
--- /dev/null
+++ b/tos/lib/net/blip/doc/README-NWPROG
@@ -0,0 +1,70 @@
+
+ @title Meraki Documentation
+ @author Stephen Dawson-Haggerty stevedh@eecs.berkeley.edu
+ @release public
+---------------------------------------------------------------------
+
+What is it?
+---------------------------------------------------------------------
+nwprog is a method of over-the-air programming.  It uses much of the
+machinery Deluge has developed, like the boot loader and flash layout,
+but substitutes a simpler transport using UDP for Deluge's
+dissemination algorithm.  This means that it is point-to-point, and
+not incredibly appropriate for reprogramming an entire network all at
+once.
+
+How do I get it?
+---------------------------------------------------------------------
+It is included with the b6lowpan stack.  It reuses much of the Deluge
+code directly from the TinyOS tree without shadowing the files.
+
+Differences from Deluge?
+---------------------------------------------------------------------
+ - no dissemination 
+ - no base station or serial port for injection
+
+ The application is very simple: flash is formatted into several
+volumes (a golden image and three application volumes), which are used
+to store application images.  Flash management, boot loading, and
+image formatting are all provided by Deluge.
+
+How to use it?
+---------------------------------------------------------------------
+Build your application with support by include a line in your
+application Makefile, and include the IPDispatchC component.
+== application makefile ==
+BOOTLOADER=tosboot
+== </snip> == 
+Also, it is necessary to include a volumes xml file for your flash
+chip; examples for the stm25p and at45db are present in apps/UDPEcho.
+
+First built the tosboot bootloader for your platform by going to
+tinyos-2.x/tos/lib/tosboot and typing `make <platform>`.
+
+Then just build and install your application like usual.  If
+networking is working, you should have no problem following the rest
+of the instructions.
+
+Interactions with the motes happen using the 'nwprog' tool in a shell.
+Connect the shell with `nc6 -u 2001:470:1f04:56d::65 2000`.
+It has three commands:
+ `nwprog list`: examine the flash and print out information on volumes
+        containing images believed to be valid
+ `nwprog reboot`: reboot into the same image
+ `nwprog boot N`: reboot, and flash the mote with the binary stored in
+        volume N
+
+In order to upload new images, use the tos-nwprog tool, located in
+$LOWPAN_ROOT/tools/tinyos/misc.  This tool provides minimal
+functionality; only erasing and uploading are supported.
+
+ `./tos-nwprog 2001:470:1f04:56d::65 -e 0`: erase image 0 from the
+        mote at the given IP address.
+ `./tos-nwprog 2001:470:1f04:56d::65 -u 0 tos_image.xml`: upload the
+        image in tos_image.xml to volume 0 on the mote at the IP
+        address.  This will erase the volume before uploading it.
+
+To integrate with your own application, there are several internal
+interfaces which can be used to examine the flash.  Looking at the
+example code in UDPShellP component is the best way of finding out
+about these.
diff --git a/tos/lib/net/blip/doc/README-SHELL b/tos/lib/net/blip/doc/README-SHELL
new file mode 100644
index 00000000..dd09536e
--- /dev/null
+++ b/tos/lib/net/blip/doc/README-SHELL
@@ -0,0 +1,55 @@
+ 
+ @title UDPShell Documentation
+ @author Stephen Dawson-Haggerty
+ @release public
+----------------------------------------------------------------------
+
+UDPShell is a simple text-based command processor which comes with the
+ip-stack.  It is an optional, although convenient way of
+implementating debugging commands on a mote.
+
+Usage
+----------------------------------------------------------------------
+
+By default, the shell contains only a few simple commands: help, echo,
+uptime, ping, and ident.  It is designed to be very easy to extend by
+adding your own commands.
+
+To include just the basic shell, include the UDPShellC component in
+your application.  To augment the shell with a new shell command, use
+the generic component ShellCommandC.
+
+Example
+----------------------------------------------------------------------
+
+Suppose we want to implement `expr`, a simple arithmetic evaluator.
+First, bind the 'expr' command string in your application configuration.
+
+configuration App {} implementation {
+  components AppImplP;
+  components new ShellCommandC("expr") as Expr;
+  AppImplP.Expr -> Expr;
+}
+
+Within AppImplP, you must implement the ShellCommand interface.  The
+interface has only one event, 'eval' which has the same prototype as
+main() in a typical c program.
+
+event char *Expr.eval(int argc, char **argv) {
+  static char ret[10];
+  return ret;
+}
+
+If expr returns a non-null value, it is assumed to be a
+null-terminated string which will be echoed back to a connected
+client.  The buffer returned must obviously not be allocated on the
+stack.  The shell does maintain a single buffer which components can
+use to print their reply to; it can be requested with a call to
+Expr.getBuffer(uint16_t len).
+
+More running code
+----------------------------------------------------------------------
+
+Fully fleshed out examples of code using this interface are available
+within the stack; see tos/lib/net/b6lowpan/shell/FlashShell[CP].nc and
+tos/lib/net/b6lowpan/nwprog/NWProg[CP].nc
\ No newline at end of file
diff --git a/tos/lib/net/blip/doc/README-SIM b/tos/lib/net/blip/doc/README-SIM
new file mode 100644
index 00000000..5461d94f
--- /dev/null
+++ b/tos/lib/net/blip/doc/README-SIM
@@ -0,0 +1,43 @@
+
+ @title blip + TOSSIM documentation
+ @author Stephen Dawson-Haggerty stevedh@eecs.berkeley.edu
+ @release internal
+---------------------------------------------------------------------
+
+The state of blip + TOSSIM
+---------------------------------------------------------------------
+
+TOSSIM and blip have worked reliably together in the not-so-distant
+past.  However, blip makes several assumptions about the radio stack
+which are not (yet) reflected in TOSSIM-cvs.  It expects a PacketLink
+and Unique layer a la the cc2420 stack in order to provide reliable
+transmissions with link duplicate suppression.  Performance without
+these is very poor.  There are also several other minor changes which
+deal with the deliver of serial packets.
+
+Ported versions of those components exist and are present in the blip
+distribution.  However, they require patching an existing tinyos
+stack, so it is probably a good idea to do a sideways checkout of
+tinyos for experimenting on.
+
+Instructions for using TOSSIM with UDPEcho
+---------------------------------------------------------------------
+
+This is completely unsupported right now.  If you really want TOSSIM +
+blip, it ought to work, but there are definitly NO GUARANTEES and NO
+SUPPORT.  It's just too much of a hack at the moment.
+
+ - patch your tossim installation.  The patch is in $LOWPAN_ROOT/tos/lib/tossim.patch, so apply that using
+    * `cd $TOSDIR/tos/lib`
+    * `patch -p0 < $LOWPAN_ROOT/tos/lib/tossim.patch`
+   Then copy $LOWPAN_ROOT/tos/lib/tossim/Packet* to $TOSDIR/tos/lib/tossim
+
+ - I think you should then be able to cd to apps/UDPEcho/sim and type `make`
+    * make sure you have python2.5 and python2.5-dev installed
+ - run `./Sim.py` (or `python2.5 ./Sim.py` if 2.4 is default)
+ - build the driver in support/sdh/c/lib6lowpan/tunnel using `make
+     sim` (probably doing make clean first)
+ - you can then run the driver as usually, except using `./serial_tun
+     localhost 9001` to point it at the serialforwarder running in the simulator.
+
+
diff --git a/tos/lib/net/blip/doc/README-TCP b/tos/lib/net/blip/doc/README-TCP
new file mode 100644
index 00000000..d20e4e63
--- /dev/null
+++ b/tos/lib/net/blip/doc/README-TCP
@@ -0,0 +1,101 @@
+
+ @title TCP Socket Documentation
+ @author Stephen Dawson-Haggerty
+ @release internal
+ @target 2.1.1
+----------------------------------------------------------------------
+
+TCP is the standard  Internet protocol for reliable, in-order delivery
+of data across the  network.  Although inefficient, its ubiquity makes
+it impossible to ignore; thus, blip provides a very simple TCP stack.
+TCP is considerably more complicated then UDP, and requires careful
+use in the embedded setting to prevent resource exhaustion.  It is
+essential that one understand the BSD sockets API; this brief README
+does not cover many details.
+
+For memory-constrained operation, blip's TCP does not do any
+receive-side buffering.  Instead, it will immediately dispatch
+new, in-order data to the application and otherwise drop the segment.
+Blip does provide send-buffering so that it can automatically
+retransmit missing segments; this buffer may be of any size and is
+provided by the application.  
+
+Important parameters:
+
+MSS: Maximum Segment Size: the maximum amount of data that a TCP packet
+will contain.  Since blip immediately delivers new data, this is also
+greater then or equal to the maximum amount of data which will ever be
+delivered in a recv() call.
+
+Window: TCP keeps the other side informed about how much buffer is
+available for new data.  Since blip does not have a receive buffer,
+this parameter is not adjusted by blip; only set to a reasonable
+value.  Applications using TCP may wish to dynamically control this
+value for various reasons.
+
+Notes
+----------------------------------------------------------------------
+
+The TCP interface is located in
+$LOWPAN_ROOT/tos/lib/net/blip/interfaces/Tcp.nc.  For the most part,
+it should be familier.
+
+Since the application is responsible for buffering, both accept() and
+connect() require the implementer to include a buffer for the stack's
+use.  Once passed to the stack, the buffer is reserved until a
+closed() event is signaled on that socket.
+
+A few of the most important caveats/brokeness:
+
+ - there is no listen().  calling bind() on a socket also begins to listen.
+
+ - there is no way to accept() multiple sockets like you can in Unix.
+   More precisely, all the code would support it but then there is
+   dynamic allocation since you have to allocate a new socket struct
+   on the fly.
+
+ - (sort of) as a result of these, if the socket is closed, you have
+   to call bind() if you want to continue listening.
+
+ - you'll need to carefully manage buffer and window sized by hand if
+   you want to be sure of correct operation.  Make sure you check
+   return codes from send() since it will fail if there is not enough
+   local buffer for the entire request.
+
+
+Example
+----------------------------------------------------------------------
+
+
+configuration {
+  components new TcpSocketC() as TcpEcho;
+  TCPEchoP.TcpEcho -> TcpEcho;
+}
+
+module {} implementation {
+  // allocate a send buffer
+  char tcp_buf[150];
+
+  // accept connections from anyone.  no need to save the endpoint,
+  // but this is the only time its available (add an API call?)
+  event bool TcpEcho.accept(struct sockaddr_in6 *from, 
+                            void **tx_buf, int *tx_buf_len) {
+    *tx_buf = tcp_buf;
+    *tx_buf_len = 150;
+    // indicates we are accepting the connection
+    return TRUE;
+  }
+  // potentially useful?
+  event void TcpEcho.connectDone(error_t e) {}
+
+  // just echo the data back.
+  event void TcpEcho.recv(void *payload, uint16_t len) {
+    call TcpEcho.send(payload,len);
+  }
+
+  // rebind to accept other connections.
+  event void TcpEcho.closed(error_t e) {
+    call Leds.led0Toggle();
+    call TcpEcho.bind(7);
+  }
+}
\ No newline at end of file
diff --git a/tos/lib/net/blip/doc/README-UDP b/tos/lib/net/blip/doc/README-UDP
new file mode 100644
index 00000000..e85e793a
--- /dev/null
+++ b/tos/lib/net/blip/doc/README-UDP
@@ -0,0 +1,70 @@
+
+ @title UDP Socket Documentation
+ @author Stephen Dawson-Haggerty
+ @release public
+----------------------------------------------------------------------
+
+ip-stack provides a UDP sockets layer as a basic application transport
+service.  The UDP interface is located in
+tos/lib/net/b6lowpan/interfaces/UDP.nc and is simple:
+
+interface UDP {
+
+  /*
+   * bind a local address.  to cut down memory requirements and handle the 
+   * common case well, you can only bind a port; all local interfaces are 
+   * implicitly bound.  the port should be passed in host byte-order (is 
+   * this confusing?
+   */
+  command error_t bind(uint16_t port);
+
+  /*
+   * send a payload to the socket address indicated
+   * once the call returns, the stack has no claim on the buffer pointed to
+   */ 
+  command error_t sendto(struct sockaddr_in6 *dest, void *payload, 
+                         uint16_t len);
+
+  /*
+   * indicate that the stack has finished writing data into the
+   * receive buffer.  if error is not SUCCESS, the payload does not
+   * contain valid data and the src pointer should not be used.
+   */
+  event void recvfrom(struct sockaddr_in6 *src, void *payload, 
+                      uint16_t len, struct ip_metadata *meta);
+
+}
+
+Usage
+----------------------------------------------------------------------
+
+Each socket must be allocated using the generic component UdpSocketC.
+
+For clients, no initialization is necessary; they may send to a
+destination without calling bind.  The stack will allocate a unique
+ephemeral port number and send out the datagram.
+
+Servers wishing to provide a service using a well-known port should
+call bind() on that port number before generating datagrams.
+
+Example
+----------------------------------------------------------------------
+
+The simplest server is an echo service running on port 7.
+
+Because of the buffer semantics, it is safe to call send directly from
+a receive event handler.
+
+  event void Boot.booted() {
+    call Echo.bind(7);
+  }
+
+  event void Echo.recvfrom(struct sockaddr_in6 *from, void *data,
+                           uint16_t len, struct ip_metadata *meta) {
+    call Echo.sendto(from, data, len);
+  }
+
+The wiring is as follows. 
+
+  components new UdpSocketC();
+  UDPEchoP.Echo -> UdpSocketC;
diff --git a/tos/lib/net/blip/icmp/ICMPCodeDispatchC.nc b/tos/lib/net/blip/icmp/ICMPCodeDispatchC.nc
new file mode 100644
index 00000000..a5f006c7
--- /dev/null
+++ b/tos/lib/net/blip/icmp/ICMPCodeDispatchC.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+generic configuration ICMPCodeDispatchC(uint8_t type) {
+  provides interface IP[uint8_t code];
+} implementation {
+  components ICMPCoreP;
+  components new ICMPCodeDispatchP();
+  
+  IP = ICMPCodeDispatchP;
+  ICMPCodeDispatchP.RA -> ICMPCoreP.ICMP_IP[type];
+}
diff --git a/tos/lib/net/blip/icmp/ICMPCodeDispatchP.nc b/tos/lib/net/blip/icmp/ICMPCodeDispatchP.nc
new file mode 100644
index 00000000..dee18752
--- /dev/null
+++ b/tos/lib/net/blip/icmp/ICMPCodeDispatchP.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+generic module ICMPCodeDispatchP() {
+  provides interface IP[uint8_t code];
+  uses interface IP as RA;
+} implementation {
+
+  event void RA.recv(struct ip6_hdr *iph, void *packet, 
+                     size_t len, struct ip6_metadata *meta) {
+    struct icmp6_hdr *icmph = packet;
+    /* the ICMP component has already stripped off any extension headers. */
+    signal IP.recv[icmph->code](iph, packet, len, meta);
+  }
+
+  command error_t IP.send[uint8_t code](struct ip6_packet *msg) {
+    return call RA.send(msg);
+  }
+
+  default event void IP.recv[uint8_t code](struct ip6_hdr *iph, void *packet, 
+                                           size_t len, struct ip6_metadata *meta) {}
+
+}
diff --git a/tos/lib/net/blip/icmp/ICMPCoreP.nc b/tos/lib/net/blip/icmp/ICMPCoreP.nc
new file mode 100644
index 00000000..95a6e086
--- /dev/null
+++ b/tos/lib/net/blip/icmp/ICMPCoreP.nc
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** 
+ *
+ * This module implements core ICMP functionality, like replying to
+ * echo requests and sending time exceeded messages.  Other modules
+ * which want to implement other functionality can wire to the IP
+ * interface.
+ *
+ */
+#include <lib6lowpan/ip.h>
+#include <lib6lowpan/in_cksum.h>
+
+#include "icmp6.h"
+
+module ICMPCoreP {
+  provides {
+    interface IP as ICMP_IP[uint8_t type];
+  }
+  uses {
+    interface IP;
+    interface IPAddress;
+    interface Leds;
+  }
+} implementation {
+  
+  event void IP.recv(struct ip6_hdr *iph, 
+                     void *packet, 
+                     size_t len, 
+                     struct ip6_metadata *meta) {
+    struct ip6_hdr *hdr = iph;
+    struct ip6_packet reply;
+    struct ip_iovec v;
+    struct icmp6_hdr *req = (struct icmp6_hdr *)packet;
+
+    switch (req->type) {
+    case ICMP_TYPE_ECHO_REQUEST:
+      req->type = ICMP_TYPE_ECHO_REPLY;
+      req->cksum = 0;
+
+      memset(&reply, 0, sizeof(reply));
+      memcpy(reply.ip6_hdr.ip6_dst.s6_addr, hdr->ip6_src.s6_addr, 16);
+      call IPAddress.setSource(&reply.ip6_hdr);
+
+      reply.ip6_hdr.ip6_vfc = IPV6_VERSION;
+      reply.ip6_hdr.ip6_nxt = IANA_ICMP;
+      reply.ip6_data = &v;
+
+      v.iov_next = NULL;
+      v.iov_base = (void *)req;
+      v.iov_len  = len;
+
+      reply.ip6_hdr.ip6_plen = htons(len);
+      req->cksum = htons(msg_cksum(&reply.ip6_hdr, reply.ip6_data, IANA_ICMP));
+      // iov_print(&v);
+
+      call IP.send(&reply);
+      break;
+
+    default:
+      signal ICMP_IP.recv[req->type](iph, packet, len, meta);
+    }
+  }
+
+  command error_t ICMP_IP.send[uint8_t type](struct ip6_packet *pkt) {
+    struct icmp6_hdr *req = (struct icmp6_hdr *)pkt->ip6_data; 
+    if (pkt->ip6_data->iov_len >= sizeof(struct icmp6_hdr) && 
+        pkt->ip6_hdr.ip6_nxt == IANA_ICMP) {
+      req->cksum = 0;
+      req->cksum = htons(msg_cksum(&pkt->ip6_hdr, pkt->ip6_data, IANA_ICMP));
+    }
+    return call IP.send(pkt);
+  }
+
+  event void IPAddress.changed(bool valid) {}
+
+  default event void ICMP_IP.recv[uint8_t type](struct ip6_hdr *iph, void *payload, 
+                                                size_t len, struct ip6_metadata *meta) {}
+}
diff --git a/tos/lib/net/blip/icmp/ICMPPingC.nc b/tos/lib/net/blip/icmp/ICMPPingC.nc
new file mode 100644
index 00000000..f5cea58e
--- /dev/null
+++ b/tos/lib/net/blip/icmp/ICMPPingC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Provide an interface for pinging other motes.
+ *
+ * Replying to ICMP echos is built into all motes running blip;
+ * sending requests requires a component like this one.
+ *
+ */
+configuration ICMPPingC {
+  provides interface ICMPPing[uint8_t client];
+} implementation {
+  components ICMPPingP, ICMPCoreP;
+  components new TimerMilliC();
+  components IPAddressC;
+
+  ICMPPing = ICMPPingP;
+
+  ICMPPingP.IP_ECHO -> ICMPCoreP.ICMP_IP[ICMP_TYPE_ECHO_REPLY];
+  ICMPPingP.PingTimer -> TimerMilliC;
+  ICMPPingP.IPAddress -> IPAddressC;
+}
diff --git a/tos/lib/net/blip/icmp/ICMPPingP.nc b/tos/lib/net/blip/icmp/ICMPPingP.nc
new file mode 100644
index 00000000..77713745
--- /dev/null
+++ b/tos/lib/net/blip/icmp/ICMPPingP.nc
@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+module ICMPPingP {
+  provides interface ICMPPing[uint8_t client];
+  uses {
+    interface Timer<TMilli> as PingTimer;
+    interface IP as IP_ECHO;
+    interface IPAddress;
+  }
+} implementation {
+
+  uint16_t ping_seq, ping_n, ping_rcv, ping_ident;
+  struct in6_addr ping_dest;
+
+  void sendPing(struct in6_addr *dest, uint16_t seqno) {
+    struct ip6_packet *ipmsg = (struct ip6_packet *)ip_malloc(sizeof(struct ip6_packet) + 
+                                                              sizeof(icmp_echo_hdr_t) + 
+                                                              sizeof(nx_uint32_t));
+    icmp_echo_hdr_t *e_hdr = (icmp_echo_hdr_t *)(ipmsg + 1);
+    nx_uint32_t *sendTime = (nx_uint32_t *)(e_hdr + 1);
+    struct ip_iovec v;
+
+    if (ipmsg == NULL) return;
+
+    // iovec
+    v.iov_base = (void *)(ipmsg + 1);
+    v.iov_len = sizeof(icmp_echo_hdr_t) + sizeof(nx_uint32_t);
+    v.iov_next = NULL;
+    ipmsg->ip6_data = &v;
+
+    // icmp hdr
+    e_hdr->type = ICMP_TYPE_ECHO_REQUEST;
+    e_hdr->code = 0;
+    e_hdr->cksum = 0;
+    e_hdr->ident = ping_ident;
+    e_hdr->seqno = seqno;
+    *sendTime = call PingTimer.getNow();
+
+    // ip hdr
+    memclr(&ipmsg->ip6_hdr, sizeof(struct ip6_hdr));
+    ipmsg->ip6_hdr.ip6_vfc = IPV6_VERSION;
+    ipmsg->ip6_hdr.ip6_nxt = IANA_ICMP;
+    ipmsg->ip6_hdr.ip6_plen = htons(v.iov_len);
+    memcpy(&ipmsg->ip6_hdr.ip6_dst, dest->s6_addr, 16);
+    call IPAddress.setSource(&ipmsg->ip6_hdr);
+
+    e_hdr->cksum = msg_cksum(&ipmsg->ip6_hdr, ipmsg->ip6_data, IANA_ICMP);
+
+    call IP_ECHO.send(ipmsg);
+    ip_free(ipmsg);
+  }
+
+  command error_t ICMPPing.ping[uint8_t client](struct in6_addr *target, 
+                                                 uint16_t period, 
+                                                 uint16_t n) {
+    if (call PingTimer.isRunning()) return ERETRY;
+    call PingTimer.startPeriodic(period);
+    memcpy(&ping_dest, target, 16);
+    ping_n = n;
+    ping_seq = 0;
+    ping_rcv = 0;
+    ping_ident = client;
+    return SUCCESS;
+  }
+
+  event void PingTimer.fired() {
+    // send a ping request
+    if (ping_seq == ping_n) {
+      signal ICMPPing.pingDone[ping_ident](ping_rcv, ping_n);
+      call PingTimer.stop();
+      return;
+    }
+    sendPing(&ping_dest, ping_seq);
+    ping_seq++;
+  }
+
+  // ping replies come here.
+  event void IP_ECHO.recv(struct ip6_hdr *iph, 
+                          void *packet, 
+                          size_t len, 
+                          struct ip6_metadata *meta) {
+    icmp_echo_hdr_t *req = (icmp_echo_hdr_t *)packet;
+    nx_uint32_t *sendTime = (nx_uint32_t *)(req + 1);
+    struct icmp_stats p_stat;
+
+    p_stat.seq = req->seqno;
+    p_stat.ttl = iph->ip6_hlim;
+    p_stat.rtt = (call PingTimer.getNow()) - (*sendTime);
+    signal ICMPPing.pingReply[req->ident](&iph->ip6_src, &p_stat);
+    ping_rcv++;
+//     BLIP_STATS_INCR(stats.echo_rx);
+
+  }
+  default event void ICMPPing.pingReply[uint8_t client](struct in6_addr *source, 
+                                                         struct icmp_stats *ping_stats) {
+  }
+
+  default event void ICMPPing.pingDone[uint8_t client](uint16_t n, uint16_t m) {
+
+  }
+
+  event void IPAddress.changed(bool global_valid) {}
+
+}
diff --git a/tos/lib/net/blip/icmp/icmp6.h b/tos/lib/net/blip/icmp/icmp6.h
new file mode 100644
index 00000000..eac35a62
--- /dev/null
+++ b/tos/lib/net/blip/icmp/icmp6.h
@@ -0,0 +1,106 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef _ICMP_H_
+#define _ICMP_H_
+
+enum {
+  ICMP_EXT_TYPE_PREFIX = 3,
+  ICMP_EXT_TYPE_BEACON = 17,
+};
+
+#ifndef LOW_POWER_LISTENING     /* parameters for CSMA MAC */
+enum {
+  // jitter start requests by 10 seconds
+  TRICKLE_JITTER = 10240,
+  // have a trickle timer with a period of 4
+  TRICKLE_PERIOD = 4096,
+
+  // send a maximum of three trickle messages
+  TRICKLE_MAX = (TRICKLE_PERIOD << 5),
+  
+};
+#else  /* parameters for LPL */
+enum {
+  // have a trickle timer with a period of 4
+  TRICKLE_PERIOD = 16384L, 
+  // jitter start requests by 10 seconds
+  TRICKLE_JITTER = TRICKLE_PERIOD,
+
+  // send a maximum of three trickle messages
+  TRICKLE_MAX = (TRICKLE_PERIOD << 5),
+  
+};
+#endif
+
+typedef nx_struct icmp6_echo_hdr {
+  nx_uint8_t        type;     /* type field */
+  nx_uint8_t        code;     /* code field */
+  nx_uint16_t       cksum;    /* checksum field */
+  nx_uint16_t       ident;
+  nx_uint16_t       seqno;
+} icmp_echo_hdr_t;
+
+typedef nx_struct radv {
+  nx_uint8_t        type;
+  nx_uint8_t        code;
+  nx_uint16_t       cksum;
+  nx_uint8_t        hlim;
+  nx_uint8_t        flags;
+  nx_uint16_t       lifetime;
+  nx_uint32_t       reachable_time;
+  nx_uint32_t       retrans_time;
+  nx_uint8_t        options[0];
+} radv_t;
+
+typedef nx_struct rsol {
+  nx_uint8_t type;
+  nx_uint8_t code;
+  nx_uint16_t cksum;
+  nx_uint32_t reserved;
+} rsol_t;
+
+typedef nx_struct rpfx {
+  nx_uint8_t type;
+  nx_uint8_t length;
+  nx_uint8_t pfx_len;
+  nx_uint8_t flags;
+  nx_uint32_t valid_lifetime;
+  nx_uint32_t preferred_lifetime;
+  nx_uint32_t reserved;
+  nx_uint8_t  prefix[16];
+} pfx_t;
+
+typedef nx_struct {
+  nx_uint8_t type;
+  nx_uint8_t length;
+  nx_uint16_t metric;
+  nx_uint16_t seqno;
+  nx_uint8_t pad[2];
+} rqual_t;
+
+struct icmp_stats {
+  uint16_t seq;
+  uint8_t ttl;
+  uint32_t rtt;
+};
+
+#endif
diff --git a/tos/lib/net/blip/interfaces/BlipStatistics.nc b/tos/lib/net/blip/interfaces/BlipStatistics.nc
new file mode 100644
index 00000000..57722075
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/BlipStatistics.nc
@@ -0,0 +1,36 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+
+interface BlipStatistics <stat_str> {
+  
+  /*
+   * Fills the given structure with the requested statistics.
+   */
+  command void get(stat_str *stats);
+
+  /*
+   * Reset whatever statistics are being collected.
+   */
+  command void clear();
+
+}
diff --git a/tos/lib/net/blip/interfaces/ForwardingEvents.nc b/tos/lib/net/blip/interfaces/ForwardingEvents.nc
new file mode 100644
index 00000000..1666ff4f
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/ForwardingEvents.nc
@@ -0,0 +1,41 @@
+
+#include <iprouting.h>
+#include <IPDispatch.h>
+
+interface ForwardingEvents {
+  /**
+   * Signaled when initiating a new flow (not forwarding).
+   *
+   * This allows higher-layer components to modify the payload or
+   * insert new headers before the packet is sent.
+   */
+  event bool initiate(struct ip6_packet *pkt,
+                      struct in6_addr *next_hop);
+
+  /**
+   * Signaled for each packet being forwarded.
+   *
+   * For datapath validation.  Allows the routing protocol to look at
+   * a packet as it flows through.  If the event returns FALSE the
+   * packet is dropped.  The routing protocol may change fields in the
+   * packet header such as the flow label.
+   *
+   * @iph the ipv6 header of the packet
+   * @rhdr a routing header in the packet, or NULL if not present
+   * @next_hop the ipv6 address of the next hop, as determined by the 
+         forwarding engine.
+   */
+  event bool approve(struct ip6_hdr *iph, 
+                     struct ip6_route *rhdr,
+                     struct in6_addr *next_hop);
+
+  /**
+   * Signaled once per link frame sent to an address in the routing table.
+   *
+   * (isn't signaled for packets which don't have an entry in the
+   * routing table.)  Allows a higher-level component to maintain
+   * statistics on the link behavior of their routes.
+   */
+  event void linkResult(struct in6_addr *dest, struct send_info *info);
+
+}
diff --git a/tos/lib/net/blip/interfaces/ForwardingTable.nc b/tos/lib/net/blip/interfaces/ForwardingTable.nc
new file mode 100644
index 00000000..c012d70f
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/ForwardingTable.nc
@@ -0,0 +1,23 @@
+
+#include <iprouting.h>
+
+interface ForwardingTable {
+
+  /**
+   * Insert a forwarding-table mapping for the given prefix, with the
+   * given next-hop.
+   */
+  command route_key_t addRoute(const uint8_t *prefix, int prefix_len_bits,
+                               struct in6_addr *next_hop, uint8_t ifindex);
+
+  /**
+   * Remove a routing table entry previously inserted using addRoute
+   */
+  command error_t delRoute(route_key_t key);
+
+  command struct route_entry *lookupRoute(const uint8_t *prefix, int prefix_len_bits);
+
+  command struct route_entry *lookupRouteKey(route_key_t key);
+
+  command struct route_entry *getTable(int *size);
+}
diff --git a/tos/lib/net/blip/interfaces/ICMP.nc b/tos/lib/net/blip/interfaces/ICMP.nc
new file mode 100644
index 00000000..fea40803
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/ICMP.nc
@@ -0,0 +1,29 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+interface ICMP {
+
+  command uint16_t cksum(struct split_ip_msg *msg, uint8_t nxt_hdr);
+
+  command void sendTimeExceeded(struct ip6_hdr *hdr, unpack_info_t *u_info, uint16_t amount_here);
+
+}
diff --git a/tos/lib/net/blip/interfaces/ICMPPing.nc b/tos/lib/net/blip/interfaces/ICMPPing.nc
new file mode 100644
index 00000000..1acc5a65
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/ICMPPing.nc
@@ -0,0 +1,12 @@
+
+#include <icmp6.h>
+
+interface ICMPPing {
+
+  command error_t ping(struct in6_addr *target, uint16_t period, uint16_t n);
+
+  event void pingReply(struct in6_addr *source, struct icmp_stats *stats);
+
+  event void pingDone(uint16_t ping_rcv, uint16_t ping_n);
+
+}
diff --git a/tos/lib/net/blip/interfaces/IP.nc b/tos/lib/net/blip/interfaces/IP.nc
new file mode 100644
index 00000000..8eb21fb2
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/IP.nc
@@ -0,0 +1,26 @@
+
+#include <lib6lowpan/ip.h>
+
+interface IP {
+
+  /*
+   * sends the message with the headers and payload given.  Things
+   * which we know how to compress should be part of the data passed
+   * in as headers; things which we cannot compress must be passed as
+   * payload.
+
+   * the interface is this way so that the stack may insert extra
+   * (routing, snooping) headers between the two sections.
+   * once the call returns, the stack has no claim on the buffer
+   * pointed to
+   */ 
+  command error_t send(struct ip6_packet *msg);
+
+  /*
+   * indicate that the stack has finished writing data into the
+   * receive buffer. 
+   */
+  event void recv(struct ip6_hdr *hdr, void *packet, 
+                  size_t len, struct ip6_metadata *meta);
+
+}
diff --git a/tos/lib/net/blip/interfaces/IPAddress.nc b/tos/lib/net/blip/interfaces/IPAddress.nc
new file mode 100644
index 00000000..70ff1e9a
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/IPAddress.nc
@@ -0,0 +1,58 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#include <lib6lowpan/6lowpan.h>
+
+interface IPAddress {
+
+  /**
+   * Get the preferred link-local interface for this node
+   */
+  command bool getLLAddr(struct in6_addr *addr);
+
+  /** 
+   * Get the preferred global IPv6 address for this node
+   */
+  command bool getGlobalAddr(struct in6_addr *addr);
+
+  /**
+   * Choose a source address for a packet originating at this node.
+   */
+  command bool setSource(struct ip6_hdr *hdr);
+
+  /**
+   * @return TRUE if the address is assigned to a local interface
+   */
+  command bool isLocalAddress(struct in6_addr *addr);
+
+  /**
+   * @return TRUE of the address is a link local address not requiring
+   * routing.
+   */
+  command bool isLLAddress(struct in6_addr *addr);
+
+  command error_t setAddress(struct in6_addr *addr);
+
+  command error_t removeAddress();
+
+  event void changed(bool valid);
+
+}
diff --git a/tos/lib/net/blip/interfaces/IPApp.nc b/tos/lib/net/blip/interfaces/IPApp.nc
new file mode 100644
index 00000000..8b137891
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/IPApp.nc
@@ -0,0 +1 @@
+
diff --git a/tos/lib/net/blip/interfaces/IPExtensions.nc b/tos/lib/net/blip/interfaces/IPExtensions.nc
new file mode 100644
index 00000000..eb6f5c35
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/IPExtensions.nc
@@ -0,0 +1,19 @@
+
+interface IPExtensions {
+
+  command struct tlv_hdr *findTlv(struct ip6_ext *ext, uint8_t tlv);
+
+  event void handleExtensions(uint8_t label,
+                              struct ip6_hdr *iph,
+                              struct ip6_ext *hop,
+                              struct ip6_ext *dst,
+                              struct ip6_route *route,
+                              uint8_t nxt_hdr);
+
+
+  /*
+   * will be called once for each fragment when sending or forwarding
+   */
+  event void reportTransmission(uint8_t label, send_policy_t *send);
+
+}
diff --git a/tos/lib/net/blip/interfaces/IPForward.nc b/tos/lib/net/blip/interfaces/IPForward.nc
new file mode 100644
index 00000000..f0ae8cd6
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/IPForward.nc
@@ -0,0 +1,30 @@
+
+#include <lib6lowpan/ip.h>
+#include "IPDispatch.h"
+
+interface IPForward {
+
+  /*
+   * sends the message with the headers and payload given.  Things
+   * which we know how to compress should be part of the data passed
+   * in as headers; things which we cannot compress must be passed as
+   * payload.
+
+   * the interface is this way so that the stack may insert extra
+   * (routing, snooping) headers between the two sections.
+   * once the call returns, the stack has no claim on the buffer
+   * pointed to
+   */ 
+  command error_t send(struct in6_addr *next_hop, 
+                       struct ip6_packet *msg,
+                       void *data);
+
+  event void sendDone(struct send_info *status);
+
+  /*
+   * indicate that the stack has finished writing data into the
+   * receive buffer. 
+   */
+  event void recv(struct ip6_hdr *iph, void *payload, struct ip6_metadata *meta);
+
+}
diff --git a/tos/lib/net/blip/interfaces/IPLower.nc b/tos/lib/net/blip/interfaces/IPLower.nc
new file mode 100644
index 00000000..4e99ad81
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/IPLower.nc
@@ -0,0 +1,30 @@
+
+#include <lib6lowpan/ip.h>
+#include "IPDispatch.h"
+
+interface IPLower {
+
+  /*
+   * sends the message with the headers and payload given.  Things
+   * which we know how to compress should be part of the data passed
+   * in as headers; things which we cannot compress must be passed as
+   * payload.
+
+   * the interface is this way so that the stack may insert extra
+   * (routing, snooping) headers between the two sections.
+   * once the call returns, the stack has no claim on the buffer
+   * pointed to
+   */ 
+  command error_t send(struct ieee154_frame_addr *next_hop, 
+                       struct ip6_packet *msg,
+                       void *data);
+
+  event void sendDone(struct send_info *status);
+
+  /*
+   * indicate that the stack has finished writing data into the
+   * receive buffer. 
+   */
+  event void recv(struct ip6_hdr *iph, void *payload, struct ip6_metadata *meta);
+
+}
diff --git a/tos/lib/net/blip/interfaces/IPMiddle.nc b/tos/lib/net/blip/interfaces/IPMiddle.nc
new file mode 100644
index 00000000..e55523e9
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/IPMiddle.nc
@@ -0,0 +1,30 @@
+
+#include <ip.h>
+#include "IPDispatch.h"
+
+interface IPForward {
+
+  /*
+   * sends the message with the headers and payload given.  Things
+   * which we know how to compress should be part of the data passed
+   * in as headers; things which we cannot compress must be passed as
+   * payload.
+
+   * the interface is this way so that the stack may insert extra
+   * (routing, snooping) headers between the two sections.
+   * once the call returns, the stack has no claim on the buffer
+   * pointed to
+   */ 
+  command error_t send(struct ieee154_frame_addr *next_hop, 
+                       struct ip6_packet *msg,
+                       void *data);
+
+  event void sendDone(struct send_info *status);
+
+  /*
+   * indicate that the stack has finished writing data into the
+   * receive buffer. 
+   */
+  event void recv(struct ip6_hdr *iph, void *payload, struct ip6_metadata *meta);
+
+}
diff --git a/tos/lib/net/blip/interfaces/IPPacket.nc b/tos/lib/net/blip/interfaces/IPPacket.nc
new file mode 100644
index 00000000..13459538
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/IPPacket.nc
@@ -0,0 +1,16 @@
+
+interface IPPacket {
+  /*
+   * @type the next header value to look for.  valid choices are in
+   * ip.h and can be any valid IANA next-header value.  The special
+   * value IP6PKT_TRANSPORT will return the offset of the transport
+   * header (ie, the first header which is not an IPv6 extension
+   * header).
+
+   * @return the offset of the
+   * start of a given header within the packet, or -1 if it was not
+   * found.
+   */
+  command int findHeader(void *payload, size_t len, 
+                         uint8_t first_type, uint8_t search_type);
+}
diff --git a/tos/lib/net/blip/interfaces/Ieee154Address.nc b/tos/lib/net/blip/interfaces/Ieee154Address.nc
new file mode 100644
index 00000000..8157e409
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/Ieee154Address.nc
@@ -0,0 +1,12 @@
+
+#include <Ieee154.h>
+
+interface Ieee154Address {
+  command ieee154_panid_t getPanId();
+  command ieee154_saddr_t getShortAddr();
+  command ieee154_laddr_t getExtAddr();
+  command error_t setShortAddr(ieee154_saddr_t addr);
+
+  event void changed();
+
+}
diff --git a/tos/lib/net/blip/interfaces/InternalIPExtension.nc b/tos/lib/net/blip/interfaces/InternalIPExtension.nc
new file mode 100644
index 00000000..e6f69588
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/InternalIPExtension.nc
@@ -0,0 +1,8 @@
+
+interface InternalIPExtension {
+
+  command void addHeaders(struct split_ip_msg *msg, uint8_t nxt_hdr, uint16_t label);
+
+  command void free();
+
+}
diff --git a/tos/lib/net/blip/interfaces/NeighborAddresses.nc b/tos/lib/net/blip/interfaces/NeighborAddresses.nc
new file mode 100644
index 00000000..772302b0
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/NeighborAddresses.nc
@@ -0,0 +1,10 @@
+
+interface NeighborAddresses {
+
+  /* 
+   * Look up the IP addresses in the IP header and fill in the
+   * appropriate link-layer addresses in the packet header structure.
+   */
+  command error_t lookupAddresses(struct ip6_addr *hdr, struct ieee154_frame_addr *addrs);
+
+}
diff --git a/tos/lib/net/blip/interfaces/NeighborDiscovery.nc b/tos/lib/net/blip/interfaces/NeighborDiscovery.nc
new file mode 100644
index 00000000..02300ad8
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/NeighborDiscovery.nc
@@ -0,0 +1,18 @@
+
+#include <lib6lowpan/ip.h>
+
+interface NeighborDiscovery {
+
+  /**
+   * Map the IPv6 address to a link-layer address.
+   * @return FAIL if the address cannot be resolved, either becasue 
+   * it is not known or because the given IPv6 address is not on the link.
+   */
+  command error_t resolveAddress(struct in6_addr *addr, ieee154_addr_t *link_addr);
+
+  /**
+   * Match 
+   */
+  command int matchContext(struct in6_addr *addr, uint8_t *ctx);
+  command int getContext(uint8_t context, struct in6_addr *ctx);
+}
diff --git a/tos/lib/net/blip/interfaces/ReadLqi.nc b/tos/lib/net/blip/interfaces/ReadLqi.nc
new file mode 100644
index 00000000..0d874f7f
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/ReadLqi.nc
@@ -0,0 +1,4 @@
+
+interface ReadLqi {
+  command uint8_t read(message_t *msg);
+}
diff --git a/tos/lib/net/blip/interfaces/TLVHeader.nc b/tos/lib/net/blip/interfaces/TLVHeader.nc
new file mode 100644
index 00000000..faeb368e
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/TLVHeader.nc
@@ -0,0 +1,9 @@
+
+#include <ip.h>
+
+interface TLVHeader {
+  event struct tlv_hdr *getHeader(int label,int nxt_hdr,
+                                  struct ip6_hdr *msg);
+
+  event void free();
+}
diff --git a/tos/lib/net/blip/interfaces/Tcp.nc b/tos/lib/net/blip/interfaces/Tcp.nc
new file mode 100644
index 00000000..a87bb019
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/Tcp.nc
@@ -0,0 +1,55 @@
+
+
+interface Tcp { 
+
+  /*
+   * Bind the socket to a local address
+   * 
+   */
+  command error_t bind(uint16_t port);
+
+  /*
+   * Accept an incomming connection.
+   *
+   * the app should return FALSE to reject the connection attempt
+   */
+  event bool accept(struct sockaddr_in6 *from, 
+                    void **tx_buf, int *tx_buf_len);
+
+  /*
+   * Split-phase connect: connect to a remote endpoint.
+   *
+   * The socket should not be used until connectDone is signaled.
+   */
+  command error_t connect(struct sockaddr_in6 *dest,
+                          void *tx_buf, int tx_buf_len);
+  event void connectDone(error_t e);
+
+  /*
+   * Send and receive data on a socket.  The socket must be CONNECTed
+   * for these to succeed.
+   */
+  command error_t send(void *payload, uint16_t len);
+
+  event void recv(void *payload, uint16_t len);
+
+  /*
+   * terminate a connection.
+   */
+  command error_t close();
+  command error_t abort();
+
+  /*
+   * notify the app that the socket connection has been closed or
+   * reset by the other end, or else a timeout has occured and the
+   * local side has given up.
+   */
+  event void closed(error_t e);
+
+  /* 
+   * returns TRUE if all previously sent data has been ACKed
+   */
+  event void acked();
+
+
+}
diff --git a/tos/lib/net/blip/interfaces/UDP.nc b/tos/lib/net/blip/interfaces/UDP.nc
new file mode 100644
index 00000000..019c848a
--- /dev/null
+++ b/tos/lib/net/blip/interfaces/UDP.nc
@@ -0,0 +1,32 @@
+
+#include <lib6lowpan/ip.h>
+
+interface UDP {
+  /*
+   * bind a local address.  to cut down memory requirements and handle the
+   * common case well, you can only bind a port; all local interfaces are
+   * implicitly bound.  the port should be passed in host byte-order (is 
+   * this confusing?  
+   */       
+
+  command error_t bind(uint16_t port);
+
+  /*
+   * send a payload to the socket address indicated
+   * once the call returns, the stack has no claim on the buffer pointed to
+   */ 
+  command error_t sendto(struct sockaddr_in6 *dest, void *payload, 
+                         uint16_t len);
+
+  command error_t sendtov(struct sockaddr_in6 *dest, 
+                          struct ip_iovec *iov);
+
+  /*
+   * indicate that the stack has finished writing data into the
+   * receive buffer.  if error is not SUCCESS, the payload does not
+   * contain valid data and the src pointer should not be used.
+   */
+  event void recvfrom(struct sockaddr_in6 *src, void *payload, 
+                      uint16_t len, struct ip6_metadata *meta);
+
+}
diff --git a/tos/lib/net/blip/ipmulticast.h b/tos/lib/net/blip/ipmulticast.h
new file mode 100644
index 00000000..bbdee10d
--- /dev/null
+++ b/tos/lib/net/blip/ipmulticast.h
@@ -0,0 +1,15 @@
+#ifndef IPMULTICAST_H_
+#define IPMULTICAST_H_
+
+#include <ip.h>
+
+enum {
+  MCAST_FW_MAXLEN = 50,
+};
+
+struct mcast_hdr {
+  struct tlv_hdr tlv;
+  uint16_t mcast_seqno;
+};
+
+#endif
diff --git a/tos/lib/net/blip/iprouting.h b/tos/lib/net/blip/iprouting.h
new file mode 100644
index 00000000..4c82dbac
--- /dev/null
+++ b/tos/lib/net/blip/iprouting.h
@@ -0,0 +1,33 @@
+#ifndef _IPROUTING_H_
+#define _IPROUTING_H_
+
+#include <lib6lowpan/ip.h>
+
+enum {
+  ROUTE_INVAL_KEY = -1,
+  ROUTE_TABLE_SZ = 10,
+};
+
+enum {
+  ROUTE_IFACE_ALL = 0,
+  ROUTE_IFACE_154 = 1,
+  ROUTE_IFACE_PPP = 2,
+};
+
+enum {
+  ROUTE_DROP_NOROUTE,
+  ROUTE_DROP_HLIM,
+};
+
+typedef int route_key_t;
+
+struct route_entry {
+  int valid:1;                  /* table entry is valid */
+  route_key_t key;              /* a key used to identify this entry */
+  struct in6_addr prefix;       /* destination */
+  uint8_t prefixlen;            /* how many bits of the destination to match on */
+  struct in6_addr next_hop;     /* next hop (must be an on-link address) */
+  uint8_t ifindex;              /* interface index to send the packet out on */
+};
+
+#endif
diff --git a/tos/lib/net/blip/nwprog/At45dbStorageMapP.nc b/tos/lib/net/blip/nwprog/At45dbStorageMapP.nc
new file mode 100644
index 00000000..4205340b
--- /dev/null
+++ b/tos/lib/net/blip/nwprog/At45dbStorageMapP.nc
@@ -0,0 +1,49 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+*  Permission to use, copy, modify, and distribute this software and its
+*  documentation for any purpose, without fee, and without written
+*  agreement is hereby granted, provided that the above copyright
+*  notice, the (updated) modification history and the author appear in
+*  all copies of this source code.
+*
+*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+*  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+*  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+*  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS
+*  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+*  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA,
+*  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+*  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+*  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+*  THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module At45dbStorageMapP
+{
+  provides {
+    interface StorageMap[uint8_t volume_id];
+  }
+  uses {
+    interface At45dbVolume[volume_id_t volume_id];
+  }
+}
+
+implementation
+{
+  command storage_addr_t StorageMap.getPhysicalAddress[uint8_t volume_id](storage_addr_t addr)
+  {
+    storage_addr_t p_addr = 0xFFFFFFFF;
+    at45page_t page = call At45dbVolume.remap[volume_id]((addr >> AT45_PAGE_SIZE_LOG2));
+    at45pageoffset_t offset = addr & ((1 << AT45_PAGE_SIZE_LOG2) - 1);
+    p_addr = page;
+    p_addr = p_addr << AT45_PAGE_SIZE_LOG2;
+    p_addr += offset;
+    return p_addr;
+  }
+}
diff --git a/tos/lib/net/blip/nwprog/BootImage.nc b/tos/lib/net/blip/nwprog/BootImage.nc
new file mode 100644
index 00000000..034d1b07
--- /dev/null
+++ b/tos/lib/net/blip/nwprog/BootImage.nc
@@ -0,0 +1,8 @@
+
+interface BootImage {
+  command void reboot();
+  command error_t boot(uint8_t img_num);
+  
+  // Added by Jaein Jeong
+  command error_t erase(uint8_t img_num);
+}
diff --git a/tos/lib/net/blip/nwprog/Deluge.h b/tos/lib/net/blip/nwprog/Deluge.h
new file mode 100644
index 00000000..77bab3d0
--- /dev/null
+++ b/tos/lib/net/blip/nwprog/Deluge.h
@@ -0,0 +1,126 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+*  Permission to use, copy, modify, and distribute this software and its
+*  documentation for any purpose, without fee, and without written
+*  agreement is hereby granted, provided that the above copyright
+*  notice, the (updated) modification history and the author appear in
+*  all copies of this source code.
+*
+*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+*  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+*  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+*  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS
+*  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+*  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA,
+*  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+*  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+*  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+*  THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#ifndef __DELUGE_H__
+#define __DELUGE_H__
+
+typedef nx_struct DelugeIdent {
+  nx_uint32_t  uidhash;        // unique id of the image
+  nx_uint32_t  size;           // size of the whole image (ident + CRCs + binary)
+  nx_uint8_t   numPgs;         // number of pages of complete image
+  nx_uint8_t   reserved;
+  nx_uint16_t  crc;            // crc over the above 4 fields
+  nx_uint8_t   appname[16];
+  nx_uint8_t   username[16];
+  nx_uint8_t   hostname[16];
+  nx_uint8_t   platform[16];
+  nx_uint32_t  timestamp;
+  nx_uint32_t  userhash;
+} DelugeIdent;
+
+typedef nx_struct DelugePatchCmd {
+  nx_uint16_t linenum;      // sequence number of patches, starting from 0
+  nx_uint8_t  cmd;          // patch cmd: 16 for upload, 17 for copy
+  nx_uint16_t dst_offset;
+  nx_uint16_t data_length;  // byte length of the data
+  nx_uint16_t src_offset;
+  nx_uint8_t  reserved[7];
+  nx_uint8_t  data[0];      // data for the upload command
+} DelugePatchCmd;
+
+enum {
+  DELUGE_INVALID_UID = 0xffffffff,
+  DELUGE_NUM_VOLUMES = 2, 
+  DELUGE_IDENT_SIZE                 = 128,
+  DELUGE_MAX_PAGES                  = 128,
+  DELUGE_CRC_SIZE                   = sizeof(uint16_t),
+  DELUGE_CRC_BLOCK_SIZE             = DELUGE_MAX_PAGES * DELUGE_CRC_SIZE,
+  DELUGE_BYTES_PER_PAGE             = 23 * 48,
+};
+
+enum {
+  MAX_PATCH_DATA_SIZE = 512,
+  PATCH_LINE_SIZE = 16,
+};
+
+#define UQ_DELUGE_METADATA "DelugeMetadata.client"
+#define UQ_DELUGE_VOLUME_MANAGER "DelugeVolumeManager.client"
+#define UQ_DELUGE_VERIFY "DelugeVerify.client"
+#define UQ_DELUGE_PATCH "DelugePatch.client"
+#define UQ_DELUGE_READ_IDENT "DelugeReadIdent.client"
+
+typedef struct BootArgs {
+  uint16_t  address;
+  uint32_t imageAddr;
+  uint8_t  gestureCount;
+  bool     noReprogram;
+} BootArgs;
+
+enum {
+  NWPROG_CMD_ERASE = 1,
+  NWPROG_CMD_WRITE = 2,
+  NWPROG_CMD_READ  = 3,
+  NWPROG_CMD_LIST  = 4,
+  NWPROG_CMD_BOOT  = 5,
+  NWPROG_CMD_REBOOT= 6,
+  NWPROG_CMD_READDONE = 7,
+  NWPROG_CMD_IMAGEIFO = 8,
+};
+
+enum {
+  NWPROG_ERROR_OK = 0,
+};
+
+enum{
+  PATCH_CMD_UPLOAD = 16,
+  PATCH_CMD_COPY   = 17,
+};
+
+nx_struct ShortDelugeIdent {
+  nx_uint8_t   appname[16];
+  nx_uint8_t   username[16];
+  nx_uint8_t   hostname[16];
+  nx_uint32_t  timestamp;
+};
+
+typedef nx_struct prog_req {
+  nx_uint8_t cmd;
+  nx_uint8_t imgno;
+  nx_union {
+    nx_uint16_t offset;
+    nx_uint16_t when;
+    nx_uint16_t nimages;
+  } cmd_data;
+  nx_uint8_t data[0];
+} prog_req_t;
+
+typedef nx_struct prog_reply {
+  nx_uint8_t error;
+  nx_uint8_t pad;
+  nx_struct prog_req req;
+} prog_reply_t;
+
+#endif
diff --git a/tos/lib/net/blip/nwprog/DelugeReadIdentP.nc b/tos/lib/net/blip/nwprog/DelugeReadIdentP.nc
new file mode 100644
index 00000000..87b1fd56
--- /dev/null
+++ b/tos/lib/net/blip/nwprog/DelugeReadIdentP.nc
@@ -0,0 +1,143 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+*  All rights reserved.
+*
+*  Permission to use, copy, modify, and distribute this software and its
+*  documentation for any purpose, without fee, and without written
+*  agreement is hereby granted, provided that the above copyright
+*  notice, the (updated) modification history and the author appear in
+*  all copies of this source code.
+*
+*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS `AS IS'
+*  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+*  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+*  ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS
+*  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+*  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, LOSS OF USE, DATA,
+*  OR PROFITS) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+*  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+*  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+*  THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "imgNum2volumeId.h"
+
+module DelugeReadIdentP {
+
+  provides interface DelugeMetadata;
+  uses {
+    interface Boot;
+    interface BlockRead[uint8_t volumeId];
+    interface StorageMap[uint8_t volumeId];
+    event void storageReady();
+  }
+}
+
+implementation
+{
+  enum {
+    S_READY,
+    S_READ_VOLUME,
+    S_READ_NUM_VOLUMES,
+  };
+  
+  DelugeIdent ident;
+  uint8_t state;
+  uint8_t currentIdx;
+  uint8_t currentVolume;
+  uint8_t fields;
+  uint8_t validVolumes;
+
+  event void Boot.booted() { }
+
+  command error_t DelugeReadIdent.readVolume(uint8_t imgNum)
+  {
+    if (state != S_READY) {
+      return FAIL;
+    }
+    else {
+      currentIdx = imgNum;
+      currentVolume = _imgNum2volumeId[currentIdx];
+      if (imgNum < DELUGE_NUM_VOLUMES) {
+        state = S_READ_VOLUME;
+        return call BlockRead.read[currentVolume](0, &ident, sizeof(ident)); 
+      }
+      else {
+        return FAIL;
+      } 
+    }
+  }
+
+  command error_t DelugeReadIdent.readNumVolumes()
+  {
+    if (state != S_READY) {
+      return FAIL;
+    }
+    else {
+      fields = 0;
+      validVolumes = 0;
+      currentIdx = 0;
+      currentVolume = _imgNum2volumeId[currentIdx];
+      state = S_READ_NUM_VOLUMES;
+      return call BlockRead.read[currentVolume](0, &ident, sizeof(ident)); 
+    }
+  }
+
+
+  event void BlockRead.readDone[uint8_t imgNum](
+    storage_addr_t addr, void* buf, storage_len_t len, error_t error)
+  {
+    switch (state) {
+    case S_READ_VOLUME:
+      if (error == SUCCESS && ident.uidhash != DELUGE_INVALID_UID) {
+        signal DelugeReadIdent.readVolumeDone(currentIdx, buf, SUCCESS);
+      }
+      else {
+        signal DelugeReadIdent.readVolumeDone(currentIdx, buf, FAIL);
+      }
+      state = S_READY;
+      signal storageReady();
+      break; 
+    case S_READ_NUM_VOLUMES:
+      if (error == SUCCESS && ident.uidhash != DELUGE_INVALID_UID) {
+        // Increment valid volumes only when uidhash is valid.
+        fields |= (1 << currentIdx);
+        validVolumes++; 
+      } 
+
+      // Increment the number volumes read.
+      currentIdx++;
+      currentVolume = _imgNum2volumeId[currentIdx];
+
+      // Read the next volume when it didn't reach the end.
+      if (currentIdx < DELUGE_NUM_VOLUMES) {
+        call BlockRead.read[currentVolume](0, &ident, sizeof(ident)); 
+      }
+      // Otherwise, notify the success.
+      else {
+        state = S_READY;
+        signal storageReady();
+        signal DelugeReadIdent.readNumVolumesDone(validVolumes, fields, SUCCESS);
+      }
+      break; 
+    }
+  }
+
+  event void BlockRead.computeCrcDone[uint8_t imgNum](
+    storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {}
+  default command error_t BlockRead.read[uint8_t imgNum](
+    storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t BlockRead.computeCrc[uint8_t imgNum](
+    storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; }
+  default event void storageReady() {} 
+  default event void DelugeReadIdent.readNumVolumesDone(
+    uint8_t validVols, uint8_t volumeFields, error_t error) {}
+  default event void DelugeReadIdent.readVolumeDone(
+    uint8_t imgNum, DelugeIdent* id, error_t error) {} 
+
+}
+
diff --git a/tos/lib/net/blip/nwprog/NWProgC.nc b/tos/lib/net/blip/nwprog/NWProgC.nc
new file mode 100644
index 00000000..b56d80d0
--- /dev/null
+++ b/tos/lib/net/blip/nwprog/NWProgC.nc
@@ -0,0 +1,61 @@
+
+// #include <BinaryShell.h>
+#include <StorageVolumes.h>
+
+#include "Deluge.h"
+
+configuration NWProgC {
+  provides interface BootImage;
+} implementation {
+
+  // send and receive pages
+  components MainC, new UdpSocketC();
+  components NetProgC, NWProgP;
+
+  BootImage = NWProgP;
+
+
+  components new BlockStorageC(VOLUME_GOLDENIMAGE) as BlockDeluge0;
+  components new BlockStorageC(VOLUME_DELUGE1) as BlockDeluge1;
+
+
+  NWProgP.Boot -> MainC;
+  NWProgP.NetProg -> NetProgC;
+  // NWProgP.StorageMap -> BlockStorageManagerC;
+  NWProgP.Recv -> UdpSocketC; 
+
+  NWProgP.BlockWrite[VOLUME_GOLDENIMAGE] -> BlockDeluge0;
+  NWProgP.BlockWrite[VOLUME_DELUGE1] -> BlockDeluge1;
+
+  NWProgP.BlockRead[VOLUME_GOLDENIMAGE] -> BlockDeluge0;
+  NWProgP.BlockRead[VOLUME_DELUGE1] -> BlockDeluge1;
+
+#ifdef BINARY_SHELL
+  components BinaryShellC;
+  NWProgP.ShellCommand -> BinaryShellC.BinaryCommand[BSHELL_NWPROG];
+#else
+  components new ShellCommandC("nwprog");
+  NWProgP.ShellCommand -> ShellCommandC;
+#endif
+
+  components new TimerMilliC();
+  NWProgP.RebootTimer -> TimerMilliC;
+
+  // deluge metadata stuff 
+  components DelugeMetadataP;
+  NWProgP.DelugeMetadata -> DelugeMetadataP;
+
+  DelugeMetadataP.Boot -> MainC;
+  DelugeMetadataP.BlockRead[VOLUME_GOLDENIMAGE] -> BlockDeluge0;
+  DelugeMetadataP.BlockRead[VOLUME_DELUGE1] -> BlockDeluge1;
+
+#if defined(PLATFORM_TELOSB)
+  NWProgP.StorageMap[VOLUME_GOLDENIMAGE] -> BlockDeluge0;
+  NWProgP.StorageMap[VOLUME_DELUGE1]     -> BlockDeluge1;
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS) || defined(PLATFORM_EPIC) || defined(PLATFORM_MULLE)
+  components At45dbStorageMapP, At45dbStorageManagerC;
+  At45dbStorageMapP.At45dbVolume -> At45dbStorageManagerC;
+  NWProgP.StorageMap -> At45dbStorageMapP;
+#endif
+
+}
diff --git a/tos/lib/net/blip/nwprog/NWProgP.nc b/tos/lib/net/blip/nwprog/NWProgP.nc
new file mode 100644
index 00000000..3c7b7108
--- /dev/null
+++ b/tos/lib/net/blip/nwprog/NWProgP.nc
@@ -0,0 +1,386 @@
+
+#include <Storage.h>
+#include <Shell.h>
+#include "imgNum2volumeId.h"
+#include "Deluge.h"
+#include "PrintfUART.h"
+module NWProgP {
+  provides interface BootImage;
+  uses {
+    interface Boot;
+    interface UDP as Recv;
+    interface StorageMap[uint8_t imag_num];
+    interface NetProg;
+
+    interface BlockRead[uint8_t img_num];
+    interface BlockWrite[uint8_t img_num];
+
+    interface DelugeMetadata;
+    interface Timer<TMilli> as RebootTimer;
+
+    event void storageReady();
+
+#ifdef BINARY_SHELL
+    interface BinaryCommand as ShellCommand;
+#else
+    interface ShellCommand;
+#endif
+  }
+} implementation {
+
+  enum {
+    S_IDLE,
+    S_BUSY,
+  };
+  uint8_t state;
+  struct sockaddr_in6 endpoint;
+  prog_reply_t reply;
+  prog_reply_t *read_buffer;
+
+  // SDH : if this is defined, we read back each packet after we write
+  // it and check that it matches.  It turns out that this doesn't
+  // actually guarantee you much, due to buffering.
+#undef PARANOID
+
+#ifdef PARANOID
+  bool paranoid_read;
+  uint16_t cmp_len;
+  uint8_t cmp_img;
+  uint32_t cmp_off;
+  uint8_t cmp_buf[256];
+#endif
+
+  // Begin-added by Jaein Jeong
+  command error_t BootImage.erase(uint8_t img_num) {
+    error_t error = call BlockWrite.erase[img_num]();
+    return error;
+  }
+  // End-added
+
+  command void BootImage.reboot() {
+    call NetProg.reboot();
+  }
+
+  command error_t BootImage.boot(uint8_t img_num) {
+    return call NetProg.programImageAndReboot(call StorageMap.getPhysicalAddress[img_num](0));
+  }
+
+  event void Boot.booted() {
+#ifdef PARANOID
+    paranoid_read = FALSE;
+#endif
+    state = S_IDLE;
+    call Recv.bind(5213);
+  }
+
+  void sendDone(error_t error) {
+    reply.error = error;
+    call Recv.sendto(&endpoint, &reply, sizeof(prog_reply_t));
+  }
+
+  event void Recv.recvfrom(struct sockaddr_in6 *from,
+                           void *payload, uint16_t len,
+                           struct ip_metadata *meta) {
+    prog_req_t *req = (prog_req_t *)payload;
+    uint8_t imgNum = imgNum2volumeId(req->imgno);
+    error_t error = FAIL;
+    void *buffer;
+
+    // just copy the payload out and write it into flash
+    // we'll send the ack from the write done event.
+    if (state != S_IDLE) return;
+    
+    memcpy(&endpoint, from, sizeof(struct sockaddr_in6));
+    memcpy(&reply.req, req, sizeof(prog_req_t));
+
+    switch (req->cmd) {
+    case NWPROG_CMD_ERASE:
+      error = call BlockWrite.erase[imgNum]();
+      break;
+    case NWPROG_CMD_WRITE:
+      len -= sizeof(prog_req_t);
+
+#ifdef PARANOID
+      if (len > sizeof(cmp_buf)) {
+        error = ENOMEM;
+        break;
+      }
+      memcpy(cmp_buf, req->data, len);
+      cmp_len = len;
+      cmp_off = req->cmd_data.offset;
+      cmp_img = imgNum;
+#endif
+        
+      buffer = ip_malloc(len);
+      if (buffer == NULL) {
+        error = ENOMEM;
+        break;
+      }
+      memcpy(buffer, req->data, len);
+      error = call BlockWrite.write[imgNum](req->cmd_data.offset,
+                                            buffer,
+                                            len);
+      if (error != SUCCESS) ip_free(buffer);
+      break;
+    case NWPROG_CMD_READ: {
+
+      read_buffer = (prog_reply_t *)ip_malloc(64 + sizeof(prog_reply_t));
+      if (read_buffer == NULL) {
+        error = ENOMEM;
+        break;
+      }
+      memcpy(&read_buffer->req, req, sizeof(prog_req_t));
+      error = call BlockRead.read[imgNum](req->cmd_data.offset,
+                                          read_buffer->req.data,
+                                          64);
+      if (error != SUCCESS) {
+        ip_free(read_buffer);
+      }
+      break;
+    }
+    default:
+      error = FAIL;
+    }
+    // }
+
+    if (error != SUCCESS) {
+      sendDone(error);
+//       if (call Resource.isOwner()) {
+//         call Resource.release();
+//       }
+    } else {
+      state = S_BUSY;
+    }
+  }
+
+  event void BlockWrite.writeDone[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {
+    if (state != S_BUSY) return;
+
+#ifdef PARANOID
+    if (len != cmp_len) {
+      printfUART("WARNING: write length changed from %i to %lu!\n", cmp_len, len);
+    }
+    if (addr != cmp_off) {
+      printfUART("WARNING: write address changed from %li to %li!\n", cmp_off, addr);
+    }
+    if (img_num != cmp_img) {
+      printfUART("WARNING: write volume changed from %i to %i\n", cmp_img, img_num);
+    }
+    if (memcmp(buf, cmp_buf, cmp_len) != 0) {
+      printfUART("WARNING: write data changed during call!\n");
+    }
+    memset(buf, 0, cmp_len);
+    if (call BlockRead.read[cmp_img](cmp_off, buf, cmp_len) == SUCCESS) {
+      paranoid_read = TRUE;
+      return;
+    } 
+
+
+#else
+    ip_free(buf);
+#endif
+
+    if (error == SUCCESS) {
+      call BlockWrite.sync[img_num]();
+    } else {
+      state = S_IDLE;
+      // call Resource.release();
+      sendDone(error);
+    }
+  }
+  event void BlockRead.readDone[uint8_t img_num](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {
+
+#ifdef PARANOID
+    if (paranoid_read) {
+      if (len != cmp_len) {
+        printfUART("WARNING: read length changed from %u to %lu!\n", cmp_len, len);
+      }
+      if (addr != cmp_off) {
+        printfUART("WARNING: read address changed from %li to %li!\n", cmp_off, addr);
+      }
+      if (img_num != cmp_img) {
+        printfUART("WARNING: read volume changed from %i to %i\n", cmp_img, img_num);
+      }
+      if (memcmp(buf, cmp_buf, cmp_len) != 0) {
+        printfUART("WARNING: write data changed during call!\n");
+      } else {
+        printfUART("SUCCESS: write verified!\n");
+      }
+
+      paranoid_read = FALSE;
+      ip_free(buf);
+      if (error == SUCCESS) {
+        call BlockWrite.sync[img_num]();
+      } else {
+        // call Resource.release();
+        state = S_IDLE;
+        sendDone(error);
+      }
+
+      return;
+    }
+#endif
+
+
+    if (state != S_BUSY || buf != read_buffer->req.data) return;
+
+    read_buffer->error = error;
+    call Recv.sendto(&endpoint, read_buffer, sizeof(prog_reply_t) + 64);
+
+    ip_free(read_buffer);
+    state = S_IDLE;
+  }
+
+  event void BlockWrite.eraseDone[uint8_t img_num](error_t error) {
+    if (state != S_BUSY) return;
+    if (error == SUCCESS) 
+      call BlockWrite.sync[img_num]();
+    else {
+      sendDone(error);
+      state = S_IDLE;
+    }
+  }
+
+  event void BlockWrite.syncDone[uint8_t img_num](error_t error) { 
+    if (state != S_BUSY) return;
+    sendDone(error);
+    state = S_IDLE;
+  }
+
+  /*
+   * Shell command implementation
+   */
+  uint8_t nwprog_currentvol, nwprog_validvols;
+  uint8_t boot_image;
+
+  uint8_t volumeID2imgNum(uint8_t volumeID) {
+    switch(volumeID) {
+    case VOLUME_GOLDENIMAGE: return 0;
+    case VOLUME_DELUGE1: return 1;
+//     case VOLUME_DELUGE2: return 2;
+//     case VOLUME_DELUGE3: return 3;
+    }
+  }
+
+  event void DelugeMetadata.readDone(uint8_t imgNum, DelugeIdent* ident, error_t error) {
+    char *reply_buf = call ShellCommand.getBuffer(MAX_REPLY_LEN);
+    if (error == SUCCESS) {
+      if (ident->uidhash != DELUGE_INVALID_UID) {
+#ifdef BINARY_SHELL
+        nx_struct cmd_payload *payload = (nx_struct cmd_payload *)reply_buf;
+        prog_req_t *rep = (prog_req_t *)payload->data;
+        nx_struct ShortDelugeIdent *i = (nx_struct ShortDelugeIdent *)rep->data;
+        rep->cmd = NWPROG_CMD_IMAGEIFO;
+        rep->imgno = volumeID2imgNum(imgNum);
+        memcpy(i->appname, ident->appname, 16);
+        memcpy(i->username, ident->username, 16);
+        memcpy(i->hostname, ident->hostname, 16);
+        i->timestamp = ident->timestamp;
+        nwprog_validvols++;
+        call ShellCommand.write(payload, sizeof(nx_struct cmd_payload) + 
+                                sizeof(prog_reply_t) + sizeof(nx_struct ShortDelugeIdent));
+
+#else
+        int len;
+        len = snprintf(reply_buf, MAX_REPLY_LEN,
+                       "image: %i\n\t[size: %li]\n\t[app: %s]\n\t[user: %s]\n\t[host: %s]\n\t[arch: %s]\n\t[time: 0x%lx]\n",
+                       volumeID2imgNum(imgNum), ident->size, (char *)ident->appname, (char *) ident->username,
+                       (char *)ident->hostname, (char *)ident->platform, (uint32_t)ident->timestamp);
+        nwprog_validvols++;
+        call ShellCommand.write(reply_buf, len);
+#endif 
+      }
+    }
+    if (++nwprog_currentvol < DELUGE_NUM_VOLUMES) {
+      call DelugeMetadata.read(imgNum2volumeId(nwprog_currentvol));
+    } else {
+#ifdef BINARY_SHELL
+      nx_struct cmd_payload *payload = (nx_struct cmd_payload *)reply_buf;
+      prog_req_t *rep = (prog_req_t *)payload->data; 
+      rep->cmd = NWPROG_CMD_READDONE;
+      rep->cmd_data.nimages = nwprog_validvols;
+      call ShellCommand.write(payload, sizeof(nx_struct cmd_payload) + sizeof(prog_req_t));
+#else
+      int len;
+      len = snprintf(reply_buf, MAX_REPLY_LEN,
+                     "%i valid image(s)\n", nwprog_validvols);
+      call ShellCommand.write(reply_buf, len);
+#endif
+    }
+  }
+
+  event void RebootTimer.fired() {
+    call BootImage.boot(boot_image);
+  }
+
+#ifdef BINARY_SHELL
+  event void ShellCommand.dispatch(nx_struct cmd_payload *data, int len) {
+    nx_struct prog_req *req = (nx_struct prog_req *)data->data;
+
+    switch (req->cmd) {
+    case NWPROG_CMD_LIST:
+      nwprog_currentvol = 0;
+      nwprog_validvols = 0;
+      call DelugeMetadata.read(imgNum2volumeId(nwprog_currentvol));
+      return;
+      break;
+    case NWPROG_CMD_BOOT:
+      call ShellCommand.write(data, len);
+
+      boot_image = imgNum2volumeId(req->imgno);
+      call RebootTimer.startOneShot(req->cmd_data.when);
+      break;
+    case NWPROG_CMD_REBOOT:
+      call BootImage.reboot();
+      break;
+    }
+  }
+#else
+  event char *ShellCommand.eval(int argc, char **argv) {
+    char *nwprog_help_str = "nwprog [list | boot <imgno> [when] | reboot]\n";
+    if (state != S_IDLE) return NULL;
+
+    if (argc >= 2) {
+      if (memcmp(argv[1], "list", 4) == 0) {
+        nwprog_currentvol = 0;
+        nwprog_validvols = 0;
+        call DelugeMetadata.read(imgNum2volumeId(nwprog_currentvol));
+        return NULL;
+      } else if (memcmp(argv[1], "boot", 4) == 0 && (argc == 3 || argc == 4)) {
+
+        uint32_t when = 15;
+        boot_image = atoi(argv[2]),
+        boot_image = imgNum2volumeId(boot_image);
+        if (argc == 4)
+          when = atoi(argv[3]);
+        if (when == 0)
+          call RebootTimer.stop();
+        else {
+          char *ack = call ShellCommand.getBuffer(15);
+          snprintf(ack, 15, "REBOOT %li %i\n", when, boot_image);
+          call RebootTimer.startOneShot(when);
+          return ack;
+        }
+        return NULL;
+      } else if (memcmp(argv[1], "reboot", 6) == 0) {
+        call BootImage.reboot();
+        return NULL;
+      } 
+    }
+    return nwprog_help_str;
+  }
+#endif
+
+  default command error_t BlockWrite.write[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t BlockWrite.erase[uint8_t imgNum]() { return FAIL; }
+  default command error_t BlockWrite.sync[uint8_t imgNum]() { return FAIL; }
+  
+ default command error_t BlockRead.read[uint8_t imgNum](storage_addr_t addr, void* buf, storage_len_t len) {return FAIL;}
+
+  event void BlockRead.computeCrcDone[uint8_t imgNum](storage_addr_t addr, storage_len_t len,uint16_t crc, error_t error) {}
+  default command storage_addr_t StorageMap.getPhysicalAddress[uint8_t volume_id](storage_addr_t addr) {
+    return 0xffffffff;
+  }
+
+
+}
diff --git a/tos/lib/net/blip/platform/CC2420ReadLqiC.nc b/tos/lib/net/blip/platform/CC2420ReadLqiC.nc
new file mode 100644
index 00000000..372d24c8
--- /dev/null
+++ b/tos/lib/net/blip/platform/CC2420ReadLqiC.nc
@@ -0,0 +1,15 @@
+
+uint16_t adjustLQI(uint8_t val) {
+  uint16_t result = (80 - (val - 50));
+  result = (((result * result) >> 3) * result) >> 3;  // result = (result ^ 3) / 64
+  return result;
+}
+
+module CC2420ReadLqiC {
+  provides interface ReadLqi;
+  uses interface CC2420Packet;
+} implementation {
+  command uint8_t ReadLqi.read(message_t *msg) {
+    return call CC2420Packet.getLqi(msg);
+  }
+}
diff --git a/tos/lib/net/blip/platform/RF230ReadLqiC.nc b/tos/lib/net/blip/platform/RF230ReadLqiC.nc
new file mode 100644
index 00000000..f814aee6
--- /dev/null
+++ b/tos/lib/net/blip/platform/RF230ReadLqiC.nc
@@ -0,0 +1,15 @@
+
+uint16_t adjustLQI(uint8_t val) {
+  uint16_t result = 64 - (val / 4);
+  result = (((result * result) >> 3) * result) >> 3;  // result = (result ^ 3) / 64
+  return result;
+}
+
+module RF230ReadLqiC {
+  provides interface ReadLqi;
+  uses interface PacketField<uint8_t> as SubLqi;
+} implementation {
+  command uint8_t ReadLqi.read(message_t *msg) {
+    return call SubLqi.get(msg);
+  }
+}
diff --git a/tos/lib/net/blip/serial/SerialDevConfC.nc b/tos/lib/net/blip/serial/SerialDevConfC.nc
new file mode 100644
index 00000000..aed6dbbf
--- /dev/null
+++ b/tos/lib/net/blip/serial/SerialDevConfC.nc
@@ -0,0 +1,69 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+//$Id: SerialDevConfC.nc,v 1.2 2009/08/09 23:36:06 sdhsdh Exp $
+
+/* "Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement
+ * is hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY
+ * OF CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * Implementation of communication 802.15.4 message_t packets over the
+ * serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include "SerialDevConf.h"
+configuration SerialDevConfC {
+  provides {
+    interface Send;
+    interface Receive;
+  }
+  uses interface Leds;
+}
+implementation { 
+  components SerialPacketInfoDevConfP as Info, SerialDispatcherC;
+
+  Leds = SerialDispatcherC;
+  Send = SerialDispatcherC.Send[TOS_SERIAL_DEVCONF];
+  Receive = SerialDispatcherC.Receive[TOS_SERIAL_DEVCONF];
+  SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_DEVCONF] -> Info;
+}
diff --git a/tos/lib/net/blip/shell/BinaryCommand.nc b/tos/lib/net/blip/shell/BinaryCommand.nc
new file mode 100644
index 00000000..3acab431
--- /dev/null
+++ b/tos/lib/net/blip/shell/BinaryCommand.nc
@@ -0,0 +1,27 @@
+
+#include "BinaryShell.h"
+
+interface BinaryCommand {
+
+  /*
+   * evaluate the command that this command provides
+   * @argc the number of arguments
+   * @argv the arguments
+   * @return a string to send back as the reply to the shell client.
+   *         if NULL, nothing is sent.
+   */
+  event void dispatch(nx_struct cmd_payload *cmd, int len);
+
+  /*
+   * request a buffer.  The result of this command may be returned
+   * from 'eval', but otherwise the buffer may not be used outside of
+   * the context it is called from.
+   */
+  command char *getBuffer(int len);
+
+  /*
+   * write a string to the shell buffer; if no client is connected it
+   * will fail silently
+   */
+  command void write(nx_struct cmd_payload *data, int len);
+}
diff --git a/tos/lib/net/blip/shell/BinaryShell.h b/tos/lib/net/blip/shell/BinaryShell.h
new file mode 100644
index 00000000..9d38326a
--- /dev/null
+++ b/tos/lib/net/blip/shell/BinaryShell.h
@@ -0,0 +1,94 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef BINARYSHELL_H_
+#define BINARYSHELL_H_
+
+#define BINARY_SHELL
+
+/* Struct definitions for builtin shell commands */
+
+/* type ids for the builtin commands  */
+enum  {
+  BSHELL_ERROR = 0,
+  BSHELL_ENUMERATE = 1,
+  BSHELL_ECHO = 2,
+  BSHELL_PING6 = 3,
+  BSHELL_PING6_REPLY = 4,
+  BSHELL_PING6_DONE = 5,
+  BSHELL_UPTIME = 6,
+  BSHELL_IDENT = 7,
+  BSHELL_NWPROG = 8,
+};
+  
+
+nx_struct cmd_payload {
+  nx_uint16_t id;
+  nx_uint8_t  data[0];
+};
+
+enum {
+  BSHELL_ERROR_NOTFOUND = 0,
+};
+nx_struct bshell_error {
+  nx_uint16_t code;
+};
+
+nx_struct bshell_enumerate {
+  nx_uint16_t cmdlist[0];
+};
+
+nx_struct bshell_echo {
+  nx_uint8_t data[0];
+};
+
+nx_struct bshell_ping6 {
+  nx_uint16_t cnt;
+  nx_uint16_t dt;
+  nx_uint8_t  addr[16];
+};
+
+nx_struct bshell_ping6_reply {
+  nx_uint8_t addr[16];
+  nx_uint16_t seqno;
+  nx_uint16_t dt;
+  nx_uint8_t ttl;
+};
+
+nx_struct bshell_ping6_done {
+  nx_uint16_t sent;
+  nx_uint16_t received;
+};
+
+nx_struct bshell_uptime {
+  nx_uint32_t uptime_hi;
+  nx_uint32_t uptime_lo;
+};
+
+nx_struct bshell_ident {
+  nx_uint8_t appname[16];
+  nx_uint8_t username[16];
+  nx_uint8_t hostname[16];
+  nx_uint32_t timestamp;
+};
+
+
+#endif
diff --git a/tos/lib/net/blip/shell/BinaryShellC.nc b/tos/lib/net/blip/shell/BinaryShellC.nc
new file mode 100644
index 00000000..f484f936
--- /dev/null
+++ b/tos/lib/net/blip/shell/BinaryShellC.nc
@@ -0,0 +1,53 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+#include <6lowpan.h>
+
+configuration BinaryShellC {
+  provides interface BinaryCommand[uint16_t];
+
+} implementation {
+
+  components new UdpSocketC();
+  components BinaryShellP, LedsC;
+
+  BinaryCommand = BinaryShellP;
+
+  BinaryShellP.UDP -> UdpSocketC;
+
+  components ICMPResponderC;
+  BinaryShellP.ICMPPing -> ICMPResponderC.ICMPPing[unique("PING")];
+
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)
+  components CounterMilli32C;
+  BinaryShellP.Uptime -> CounterMilli32C;
+#endif
+
+  components MainC;
+  BinaryShellP.Boot -> MainC;
+
+  BinaryShellP.CmdEcho -> BinaryShellP.BinaryCommand[BSHELL_ECHO];
+  BinaryShellP.CmdPing6 -> BinaryShellP.BinaryCommand[BSHELL_PING6];
+  BinaryShellP.CmdIdent -> BinaryShellP.BinaryCommand[BSHELL_IDENT];
+  BinaryShellP.CmdUptime -> BinaryShellP.BinaryCommand[BSHELL_UPTIME];
+
+}
diff --git a/tos/lib/net/blip/shell/BinaryShellP.nc b/tos/lib/net/blip/shell/BinaryShellP.nc
new file mode 100644
index 00000000..6a9be878
--- /dev/null
+++ b/tos/lib/net/blip/shell/BinaryShellP.nc
@@ -0,0 +1,158 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+#include <ip.h>
+#include <IPDispatch.h>
+#include <icmp6.h>
+#include "Shell.h"
+#include "BinaryShell.h"
+
+module BinaryShellP {
+  provides {
+    interface BinaryCommand[uint16_t cmd_id];
+  }
+  uses {
+    interface Boot;
+    interface UDP;
+    interface Leds;
+    
+    interface ICMPPing;
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)
+    interface Counter<TMilli, uint32_t> as Uptime;
+#endif
+
+    // interface BinaryCommand as CmdEnumerate;
+    interface BinaryCommand as CmdEcho;
+    interface BinaryCommand as CmdPing6;
+    interface BinaryCommand as CmdUptime;
+    interface BinaryCommand as CmdIdent;
+
+  }
+
+} implementation {
+
+  bool session_active;
+  struct sockaddr_in6 session_endpoint;
+  uint32_t boot_time;
+  uint64_t uptime;
+  uint8_t reply_buf[MAX_REPLY_LEN];
+
+  event void Boot.booted() {
+    atomic {
+      uptime = 0;
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)
+      boot_time = call Uptime.get();
+#endif
+    }
+    call UDP.bind(2001);
+  }
+
+
+  command char *BinaryCommand.getBuffer[uint16_t cmd_id](int len) {
+    if (len <= MAX_REPLY_LEN) return reply_buf;
+    return NULL;
+  }
+
+  command void BinaryCommand.write[uint16_t cmd_id](nx_struct cmd_payload *data, int len) {
+    data->id = cmd_id;
+    call UDP.sendto(&session_endpoint, data, len);    
+  }
+
+  event void CmdEcho.dispatch(nx_struct cmd_payload *cmd, int len) {
+    call CmdEcho.write(cmd, len);
+  }
+
+  event void CmdPing6.dispatch(nx_struct cmd_payload *cmd, int len) {
+    nx_struct bshell_ping6 *ping = (nx_struct bshell_ping6 *)(cmd->data);
+
+    call ICMPPing.ping((struct in6_addr *)ping->addr, ping->dt, ping->cnt);
+  }
+
+  event void CmdUptime.dispatch(nx_struct cmd_payload *cmd, int len) {
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)
+    nx_struct cmd_payload        *p = (nx_struct cmd_payload *)reply_buf;
+    nx_struct bshell_uptime      *u = (nx_struct bshell_uptime *)p->data;
+    uint64_t tval = call Uptime.get();
+    atomic {
+      tval = (uptime + tval - boot_time) / 1024;
+    }
+    u->uptime_hi = tval >> 32;
+    u->uptime_lo = tval & 0xffffffff;
+
+    call CmdUptime.write(p,  sizeof(nx_struct cmd_payload) +
+                         sizeof(nx_struct bshell_uptime));
+#endif
+  }
+
+  event void CmdIdent.dispatch(nx_struct cmd_payload *cmd, int len) {
+    nx_struct cmd_payload        *p = (nx_struct cmd_payload *)reply_buf;
+    nx_struct bshell_ident       *i = (nx_struct bshell_ident *)p->data;
+    memcpy(i->appname,  IDENT_APPNAME, 16);
+    memcpy(i->username, IDENT_USERNAME, 16);
+    memcpy(i->hostname, IDENT_HOSTNAME, 16);
+    i->timestamp = IDENT_TIMESTAMP;
+    call CmdIdent.write(p,sizeof(nx_struct cmd_payload) +
+                        sizeof(nx_struct bshell_ident)); 
+  }
+
+  event void UDP.recvfrom(struct sockaddr_in6 *from, void *data, 
+                          uint16_t len, struct ip_metadata *meta) {
+    nx_struct cmd_payload *payload = (nx_struct cmd_payload *)data;
+    memcpy(&session_endpoint, from, sizeof(struct sockaddr_in6));
+    signal BinaryCommand.dispatch[payload->id](payload, len);
+  }
+
+  event void ICMPPing.pingReply(struct in6_addr *source, struct icmp_stats *stats) {
+    nx_struct cmd_payload        *p = (nx_struct cmd_payload *)reply_buf;
+    nx_struct bshell_ping6_reply *r = (nx_struct bshell_ping6_reply   *)p->data;
+    memcpy(r->addr, source, 16);
+    r->seqno = stats->seq;
+    r->dt    = stats->rtt;
+    r->ttl   = stats->ttl;
+    call BinaryCommand.write[BSHELL_PING6_REPLY](p, sizeof(nx_struct cmd_payload) +
+                                                 sizeof(nx_struct bshell_ping6_reply));
+  }
+
+  event void ICMPPing.pingDone(uint16_t ping_rcv, uint16_t ping_n) {
+    nx_struct cmd_payload        *p = (nx_struct cmd_payload *)reply_buf;
+    nx_struct bshell_ping6_done  *d = (nx_struct bshell_ping6_done *)p->data;
+    d->sent = ping_n;
+    d->received = ping_rcv;
+    call BinaryCommand.write[BSHELL_PING6_DONE](p, sizeof(nx_struct cmd_payload) +
+                                                 sizeof(nx_struct bshell_ping6_done));
+  }
+
+#if  defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)
+  async event void Uptime.overflow() {
+    atomic
+      uptime += 0xffffffff;
+  }
+#endif
+
+  default event void BinaryCommand.dispatch[uint16_t cmd_id](nx_struct cmd_payload *cmd, int len) {
+    nx_struct cmd_payload      *p = (nx_struct cmd_payload *)reply_buf;
+    nx_struct bshell_error     *e = (nx_struct bshell_error   *)p->data;
+    e->code = BSHELL_ERROR_NOTFOUND;
+    call BinaryCommand.write[BSHELL_ERROR](p, sizeof(nx_struct cmd_payload) +
+                                           sizeof(nx_struct bshell_enumerate));
+  }
+}
diff --git a/tos/lib/net/blip/shell/FlashShellC.nc b/tos/lib/net/blip/shell/FlashShellC.nc
new file mode 100644
index 00000000..cc09e4e7
--- /dev/null
+++ b/tos/lib/net/blip/shell/FlashShellC.nc
@@ -0,0 +1,14 @@
+
+#include "StorageVolumes.h"
+
+configuration FlashShellC {
+  
+} implementation {
+  components new ShellCommandC("flash");
+  FlashShellP.ShellCommand -> ShellCommandC;
+
+  components new BlockStorageC(VOLUME_DELUGE1);
+  FlashShellP.BlockRead -> BlockStorageC;
+  FlashShellP.BlockWrite -> BlockStorageC;
+
+}
diff --git a/tos/lib/net/blip/shell/FlashShellP.nc b/tos/lib/net/blip/shell/FlashShellP.nc
new file mode 100644
index 00000000..cb87f9a8
--- /dev/null
+++ b/tos/lib/net/blip/shell/FlashShellP.nc
@@ -0,0 +1,46 @@
+module FlashShellP {
+  uses {
+    interface Boot;
+    interface Leds;
+    interface ShellCommand;
+    interface BlockRead;
+    interface BlockWrite;
+  }
+} implementation {
+
+  event void Boot.booted() {
+    if (call BlockWrite.erase() != SUCCESS)
+       call Leds.led1Toggle();
+  }
+
+  event void BlockRead.readDone(storage_addr_t addr, void* buf, storage_len_t len,
+                                error_t error) {
+    uint16_t r_len = snprintf(reply_buf, MAX_REPLY_LEN,"read done addr: 0x%x len: %i error: %i data: ", 
+                              addr, len, error);
+    if (len < MAX_REPLY_LEN - r_len - 1)
+      memcpy(reply_buf + r_len, buf, len);
+    reply_buf[r_len + len + 1] = '\n';
+    call UDP.sendto(&session_endpoint, reply_buf, r_len + len + 1);
+    
+  }
+
+  event void BlockRead.computeCrcDone(storage_addr_t addr, storage_len_t len,
+                                         uint16_t crc, error_t error) {
+
+  }
+
+  event void BlockWrite.writeDone(storage_addr_t addr, void* buf, storage_len_t len,
+                                  error_t error) {
+    uint16_t r_len = snprintf(reply_buf, MAX_REPLY_LEN,"write done addr: 0x%x len: %i error: %i\n", 
+                              addr, len, error);
+    call UDP.sendto(&session_endpoint, reply_buf, r_len);
+  }
+
+  event void BlockWrite.eraseDone(error_t error) {
+    call Leds.led0Toggle();
+  }
+
+  event void BlockWrite.syncDone(error_t error) {
+
+  }
+}
diff --git a/tos/lib/net/blip/shell/RegisterShellCommand.nc b/tos/lib/net/blip/shell/RegisterShellCommand.nc
new file mode 100644
index 00000000..fb980138
--- /dev/null
+++ b/tos/lib/net/blip/shell/RegisterShellCommand.nc
@@ -0,0 +1,4 @@
+
+interface RegisterShellCommand {
+  event char *getCommandName();
+}
diff --git a/tos/lib/net/blip/shell/RouteCmdC.nc b/tos/lib/net/blip/shell/RouteCmdC.nc
new file mode 100644
index 00000000..57cd1ee5
--- /dev/null
+++ b/tos/lib/net/blip/shell/RouteCmdC.nc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+configuration RouteCmdC {
+
+} implementation {
+  components RouteCmdP;
+  components new ShellCommandC("route");
+  components IPStackC;
+
+  RouteCmdP.ShellCommand -> ShellCommandC;
+  RouteCmdP.ForwardingTable -> IPStackC;
+}
diff --git a/tos/lib/net/blip/shell/RouteCmdP.nc b/tos/lib/net/blip/shell/RouteCmdP.nc
new file mode 100644
index 00000000..40580a60
--- /dev/null
+++ b/tos/lib/net/blip/shell/RouteCmdP.nc
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2008-2010 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <Shell.h>
+#include <iprouting.h>
+
+module RouteCmdP {
+  uses interface ShellCommand;
+  uses interface ForwardingTable;
+} implementation {
+  
+  char *header = "destination\t\tgateway\t\tiface\n";
+  struct {
+    int ifindex;
+    char *name;
+  } ifaces[3] = {{0, "any"}, {1, "pan"}, {2, "ppp"}};
+
+  char *ifnam(int ifidx) {
+    int i;
+    for (i = 0; i < sizeof(ifaces) / sizeof(ifaces[0]); i++) {
+      if (ifaces[i].ifindex == ifidx) 
+        return ifaces[i].name;
+    }
+    return NULL;
+  }
+
+  event char *ShellCommand.eval(int argc, char **argv) {
+#define LEN (MAX_REPLY_LEN - (cur - buf))
+    struct route_entry *entry;
+    char *cur, *buf = call ShellCommand.getBuffer(MAX_REPLY_LEN);
+    int i, n;
+
+    entry = call ForwardingTable.getTable(&n);
+    if (!buf || !entry)
+      return NULL;
+
+    cur = buf;
+    memcpy(cur, header, strlen(header));
+    cur += strlen(header);
+    for (i = 0; i < n; i++) {
+      if (entry[i].valid) {
+        cur += inet_ntop6(&entry[i].prefix, cur, LEN) - 1;
+        cur += snprintf(cur, LEN, "/%i\t\t", entry[i].prefixlen);
+        cur += inet_ntop6(&entry[i].next_hop, cur, LEN) - 1;
+        if (LEN < 6) continue;
+        *cur++ = '\t'; *cur++ = '\t';
+        strncpy(cur, ifnam(entry[i].ifindex), LEN);
+        cur += 3;
+        *cur++ = '\n';
+        if (LEN < MAX_REPLY_LEN / 2) {
+          call ShellCommand.write(buf, cur - buf);
+          cur = buf;
+        }
+      }
+    }
+    if (cur > buf) 
+      call ShellCommand.write(buf, cur - buf);
+    return NULL;
+  }
+}
diff --git a/tos/lib/net/blip/shell/Shell.h b/tos/lib/net/blip/shell/Shell.h
new file mode 100644
index 00000000..c9bdc25b
--- /dev/null
+++ b/tos/lib/net/blip/shell/Shell.h
@@ -0,0 +1,29 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef _SHELL_H
+#define _SHELL_H
+
+enum {
+  MAX_REPLY_LEN = 128,
+};
+
+#endif
diff --git a/tos/lib/net/blip/shell/ShellCommand.nc b/tos/lib/net/blip/shell/ShellCommand.nc
new file mode 100644
index 00000000..075c55c9
--- /dev/null
+++ b/tos/lib/net/blip/shell/ShellCommand.nc
@@ -0,0 +1,25 @@
+
+interface ShellCommand {
+
+  /*
+   * evaluate the command that this command provides
+   * @argc the number of arguments
+   * @argv the arguments
+   * @return a string to send back as the reply to the shell client.
+   *         if NULL, nothing is sent.
+   */
+  event char *eval(int argc, char **argv);
+
+  /*
+   * request a buffer.  The result of this command may be returned
+   * from 'eval', but otherwise the buffer may not be used outside of
+   * the context it is called from.
+   */
+  command char *getBuffer(uint16_t len);
+
+  /*
+   * write a string to the shell buffer; if no client is connected it
+   * will fail silently
+   */
+  command void write(char *str, int len);
+}
diff --git a/tos/lib/net/blip/shell/ShellCommandC.nc b/tos/lib/net/blip/shell/ShellCommandC.nc
new file mode 100644
index 00000000..7343617b
--- /dev/null
+++ b/tos/lib/net/blip/shell/ShellCommandC.nc
@@ -0,0 +1,14 @@
+
+generic configuration ShellCommandC(char cmd_name[]) {
+  provides interface ShellCommand;
+} implementation {
+
+  enum {
+    CMD_ID = unique("UDPSHELL_CLIENTCOUNT"),
+  };
+
+  components new ShellCommandP(cmd_name), UDPShellP;
+
+  ShellCommandP.RegisterShellCommand ->  UDPShellP.RegisterShellCommand[CMD_ID];
+  ShellCommand = UDPShellP.ShellCommand[CMD_ID];
+}
diff --git a/tos/lib/net/blip/shell/ShellCommandP.nc b/tos/lib/net/blip/shell/ShellCommandP.nc
new file mode 100644
index 00000000..6f9af62d
--- /dev/null
+++ b/tos/lib/net/blip/shell/ShellCommandP.nc
@@ -0,0 +1,8 @@
+
+generic module ShellCommandP(char cmd_name[]) {
+  uses interface RegisterShellCommand;
+} implementation {
+  event char *RegisterShellCommand.getCommandName() {
+    return cmd_name;
+  }
+}
diff --git a/tos/lib/net/blip/shell/UDPShellC.nc b/tos/lib/net/blip/shell/UDPShellC.nc
new file mode 100644
index 00000000..2ebed354
--- /dev/null
+++ b/tos/lib/net/blip/shell/UDPShellC.nc
@@ -0,0 +1,46 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+#include <lib6lowpan/6lowpan.h>
+
+configuration UDPShellC {
+
+
+} implementation {
+
+  components new UdpSocketC();
+  components UDPShellP, LedsC;
+
+  UDPShellP.UDP -> UdpSocketC;
+
+  UDPShellP.Leds -> LedsC;
+  components ICMPPingC;
+  UDPShellP.ICMPPing -> ICMPPingC.ICMPPing[unique("PING")];
+
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)
+  components CounterMilli32C;
+  UDPShellP.Uptime -> CounterMilli32C;
+#endif
+
+  components MainC;
+  UDPShellP.Boot -> MainC;
+}
diff --git a/tos/lib/net/blip/shell/UDPShellP.nc b/tos/lib/net/blip/shell/UDPShellP.nc
new file mode 100644
index 00000000..44aa5e9a
--- /dev/null
+++ b/tos/lib/net/blip/shell/UDPShellP.nc
@@ -0,0 +1,293 @@
+/*
+ * "Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+#include <lib6lowpan/ip.h>
+#include <IPDispatch.h>
+#include <icmp6.h>
+#include "Shell.h"
+
+module UDPShellP {
+  provides {
+    interface ShellCommand[uint8_t cmd_id];
+    interface RegisterShellCommand[uint8_t cmd_id];
+  }
+  uses {
+    interface Boot;
+    interface UDP;
+    interface Leds;
+    
+    interface ICMPPing;
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)
+    interface Counter<TMilli, uint32_t> as Uptime;
+#endif
+
+  }
+
+} implementation {
+
+  bool session_active;
+  struct sockaddr_in6 session_endpoint;
+  uint32_t boot_time;
+  uint64_t uptime;
+
+  enum {
+    N_EXTERNAL = uniqueCount("UDPSHELL_CLIENTCOUNT"),
+  };
+
+  // and corresponding indeces
+  enum {
+    N_BUILTINS = 5,
+    // the maximum number of arguments a command can take
+    N_ARGS = 10,
+    CMD_HELP = 0,
+    CMD_ECHO = 1,
+    CMD_PING6 = 2,
+    CMD_TRACERT6 = 3,
+
+    CMD_NO_CMD = 0xfe,
+    CMDNAMSIZ = 10,
+  };
+  
+  struct cmd_name {
+    uint8_t c_len;
+    char c_name[CMDNAMSIZ];
+  };
+  struct cmd_builtin {
+    void (*action)(int, char **);
+  };
+
+  struct cmd_name externals[N_EXTERNAL];
+
+
+  event void Boot.booted() {
+    int i;
+    atomic {
+      uptime = 0;
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)
+      boot_time = call Uptime.get();
+#endif
+    }
+    for (i = 0; i < N_EXTERNAL; i++) {
+      externals[i].c_name[CMDNAMSIZ-1] = '\0';
+      strncpy(externals[i].c_name, signal RegisterShellCommand.getCommandName[i](), CMDNAMSIZ);
+      externals[i].c_len = strlen(externals[i].c_name);
+    }
+    call UDP.bind(2000);
+
+  }
+
+
+#define DEREF(X)  #X
+#define QUOTE(X)  DEREF(X)
+  char reply_buf[MAX_REPLY_LEN];
+  char *help_str = "sdsh-0.9\tbuiltins: [help, echo, ping6, uptime, ident]\n";
+  const char *ping_fmt = " icmp_seq=%i ttl=%i time=%i ms\n";
+  const char *ping_summary = "%i packets transmitted, %i received\n";
+  char *ident_string = "\t[app: "
+    IDENT_APPNAME "]\n\t[user: " IDENT_USERNAME "]\n\t[host: " IDENT_HOSTNAME
+    "]\n\t[time: " QUOTE(IDENT_TIMESTAMP) "]\n";
+  
+
+  void action_help(int argc, char **argv) {
+    int i = 0;
+    char *pos = reply_buf;
+    call UDP.sendto(&session_endpoint, help_str, strlen(help_str));
+    if (N_EXTERNAL > 0) {
+      strcpy(pos, "\t\t[");
+      pos += 3;
+      for (i = 0; i < N_EXTERNAL; i++) {
+        if (externals[i].c_len + 4 < MAX_REPLY_LEN - (pos - reply_buf)) {
+          memcpy(pos, externals[i].c_name, externals[i].c_len);
+          pos += externals[i].c_len;
+          if (i < N_EXTERNAL-1) {
+            pos[0] = ',';
+            pos[1] = ' ';
+            pos += 2;
+          } 
+        } else {
+          pos[0] = '.';
+          pos[1] = '.';
+          pos[2] = '.';
+          pos += 3;
+          break;
+        }
+      }
+      *pos++ = ']';
+      *pos++ = '\n';
+      call UDP.sendto(&session_endpoint, reply_buf, pos - reply_buf);
+    }
+  }
+
+  command char *ShellCommand.getBuffer[uint8_t cmd_id](uint16_t len) {
+    reply_buf[0] = '\0';
+    if (len <= MAX_REPLY_LEN) return reply_buf;
+    return NULL;
+  }
+
+  command void ShellCommand.write[uint8_t cmd_id](char *str, int len) {
+    call UDP.sendto(&session_endpoint, str, len);    
+  }
+
+  void action_echo(int argc, char **argv) {
+    int i, arg_len;
+    char *payload = reply_buf;
+
+    if (argc < 2) return;
+    for (i = 1; i < argc; i++) {
+      arg_len = strlen(argv[i]);
+      if ((payload - reply_buf) + arg_len + 1 > MAX_REPLY_LEN) break;
+      memcpy(payload, argv[i], arg_len);
+      payload += arg_len;
+      *payload = ' ';
+      payload++;
+    }
+    *(payload - 1) = '\n';
+
+    call UDP.sendto(&session_endpoint, reply_buf, payload - reply_buf);
+  }
+
+  void action_ping6(int argc, char **argv) {
+    struct in6_addr dest;
+
+    if (argc < 2) return;
+        inet_pton6(argv[1], &dest);
+        call ICMPPing.ping(&dest, 1024, 10);
+  }
+
+
+  void action_uptime(int argc, char **argv) {
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)
+    int len;
+    uint64_t tval = call Uptime.get();
+    atomic
+      tval = (uptime + tval - boot_time) / 1024;
+    len = snprintf(reply_buf, MAX_REPLY_LEN, "up %li seconds\n",
+                   (uint32_t)tval);
+    call UDP.sendto(&session_endpoint, reply_buf, len);
+#endif
+  }
+
+  void action_ident(int argc, char **argv) {
+    call UDP.sendto(&session_endpoint, ident_string, strlen(ident_string));
+  }
+
+  // commands 
+  struct cmd_name builtins[N_BUILTINS] = {{4, "help"},
+                                          {4, "echo"},  
+                                          {5, "ping6"},
+                                          {6, "uptime"},
+                                          {5, "ident"}};
+  struct cmd_builtin builtin_actions[N_BUILTINS] = {{action_help},
+                                                    {action_echo},
+                                                    {action_ping6},
+                                                    {action_uptime},
+                                                    {action_ident}};
+
+
+  // break up a command given as a string into a sequence of null terminated
+  // strings, and initialize the argv array to point into it.
+  void init_argv(char *cmd, uint16_t len, char **argv, int *argc) {
+    int inArg = 0;
+    *argc = 0;
+    while (len > 0 && *argc < N_ARGS) {
+      if (*cmd == ' ' || *cmd == '\n' || *cmd == '\t' || *cmd == '\0' || len == 1){
+        if (inArg) {
+          *argc = *argc + 1;
+          inArg = 0;
+          *cmd = '\0';
+        }
+      } else if (!inArg) {
+        argv[*argc] = cmd;
+        inArg = 1;
+      }
+      cmd ++;
+      len --;
+    }
+  }
+
+  int lookup_cmd(char *cmd, int dbsize, struct cmd_name *db) {
+    int i;
+    for (i = 0; i < dbsize; i++) {
+      if (memcmp(cmd, db[i].c_name, db[i].c_len) == 0 
+          && cmd[db[i].c_len] == '\0')
+        return i;
+    }
+    return CMD_NO_CMD;
+  }
+
+  event void UDP.recvfrom(struct sockaddr_in6 *from, void *data, 
+                          uint16_t len, struct ip6_metadata *meta) {
+    char *argv[N_ARGS];
+    int argc, cmd;
+
+    memcpy(&session_endpoint, from, sizeof(struct sockaddr_in6));
+    init_argv((char *)data, len, argv, &argc);
+
+    if (argc > 0) {
+      cmd = lookup_cmd(argv[0], N_BUILTINS, builtins);
+      if (cmd != CMD_NO_CMD) {
+        builtin_actions[cmd].action(argc, argv);
+        return;
+      }
+      cmd = lookup_cmd(argv[0], N_EXTERNAL, externals);
+      if (cmd != CMD_NO_CMD) {
+        char *reply = signal ShellCommand.eval[cmd](argc, argv);
+        if (reply != NULL)
+          call UDP.sendto(&session_endpoint, reply, strlen(reply));
+        return;
+      }
+      cmd = snprintf(reply_buf, MAX_REPLY_LEN, "sdsh: %s: command not found\n", argv[0]);
+      call UDP.sendto(&session_endpoint, reply_buf, cmd);
+    }
+  }
+
+  event void ICMPPing.pingReply(struct in6_addr *source, struct icmp_stats *stats) {
+    int len;
+    len = inet_ntop6(source, reply_buf, MAX_REPLY_LEN);
+    if (len > 0) {
+      len += snprintf(reply_buf + len - 1, MAX_REPLY_LEN - len + 1, ping_fmt,
+                      stats->seq, stats->ttl, stats->rtt);
+      reply_buf[len] = '\0';
+      call UDP.sendto(&session_endpoint, reply_buf, len);
+    }
+  }
+
+  event void ICMPPing.pingDone(uint16_t ping_rcv, uint16_t ping_n) {
+    int len;
+    len = snprintf(reply_buf, MAX_REPLY_LEN, ping_summary, ping_n, ping_rcv);
+    call UDP.sendto(&session_endpoint, reply_buf, len);
+  }
+
+#if  defined(PLATFORM_TELOSB) || defined(PLATFORM_EPIC)
+  async event void Uptime.overflow() {
+    atomic
+      uptime += 0xffffffff;
+  }
+#endif
+
+  default event char *ShellCommand.eval[uint8_t cmd_id](int argc, char **argv) {
+    return NULL;
+  }
+  default event char *RegisterShellCommand.getCommandName[uint8_t cmd_id]() {
+    return NULL;
+  }
+}
diff --git a/tos/lib/net/blip/table.c b/tos/lib/net/blip/table.c
new file mode 100644
index 00000000..3cb912e7
--- /dev/null
+++ b/tos/lib/net/blip/table.c
@@ -0,0 +1,52 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+#include <stdlib.h>
+#include "table.h"
+
+void table_init(table_t *table, void *data,
+                uint16_t elt_len, uint16_t n_elts) {
+  table->data = data;
+  table->elt_len  = elt_len;
+  table->n_elts   = n_elts;
+}
+
+void *table_search(table_t *table, int (*pred)(void *)) {
+  int i;
+  void *cur;
+  for (i = 0; i < table->n_elts; i++) {
+    cur = table->data + (i * table->elt_len);
+    switch (pred(cur)) {
+    case 1: return cur;
+    case -1: return NULL;
+    default: continue;
+    }
+  }
+  return NULL;
+}
+
+void table_map(table_t *table, void(*fn)(void *)) {
+  int i;
+  for (i = 0; i < table->n_elts; i++)
+    fn(table->data + (i * table->elt_len));
+}
+
diff --git a/tos/lib/net/blip/table.h b/tos/lib/net/blip/table.h
new file mode 100644
index 00000000..3f2914b2
--- /dev/null
+++ b/tos/lib/net/blip/table.h
@@ -0,0 +1,37 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+#ifndef TABLE_H_
+#define TABLE_H_
+
+#include <stdint.h>
+
+typedef struct {
+  void *data;
+  uint16_t elt_len;
+  uint16_t n_elts;
+} table_t;
+
+void table_init(table_t *table, void *data,uint16_t elt_len, uint16_t n_elts);
+void *table_search(table_t *table, int (*pred)(void *));
+void table_map(table_t *table, void (*fn)(void *));
+
+#endif
diff --git a/tos/lib/net/ctp/.cvsignore b/tos/lib/net/ctp/.cvsignore
new file mode 100644
index 00000000..a01ee289
--- /dev/null
+++ b/tos/lib/net/ctp/.cvsignore
@@ -0,0 +1 @@
+.*.swp
diff --git a/tos/lib/net/ctp/Collection.h b/tos/lib/net/ctp/Collection.h
new file mode 100644
index 00000000..f993ade9
--- /dev/null
+++ b/tos/lib/net/ctp/Collection.h
@@ -0,0 +1,51 @@
+/* $Id: Collection.h,v 1.5 2010-06-29 22:07:49 scipio Exp $ */
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ *  @author Rodrigo Fonseca
+ *  @date   $Date: 2010-06-29 22:07:49 $
+ */
+#ifndef COLLECTION_H
+#define COLLECTION_H
+
+enum {
+    AM_COLLECTION_DATA = 20,
+    AM_COLLECTION_CONTROL = 21,
+    AM_COLLECTION_DEBUG = 22,
+};
+
+typedef uint8_t collection_id_t;
+typedef nx_uint8_t nx_collection_id_t;
+
+#endif
diff --git a/tos/lib/net/ctp/CollectionC.nc b/tos/lib/net/ctp/CollectionC.nc
new file mode 100644
index 00000000..bca0c793
--- /dev/null
+++ b/tos/lib/net/ctp/CollectionC.nc
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Ctp.h"
+
+/**
+ * A data collection service that uses a tree routing protocol
+ * to deliver data to collection roots, following TEP 119.
+ *
+ * @author Rodrigo Fonseca
+ * @author Omprakash Gnawali
+ * @author Kyle Jamieson
+ * @author Philip Levis
+ */
+
+
+configuration CollectionC {
+  provides {
+    interface StdControl;
+    interface Send[uint8_t client];
+    interface Receive[collection_id_t id];
+    interface Receive as Snoop[collection_id_t];
+    interface Intercept[collection_id_t id];
+
+    interface Packet;
+    interface CollectionPacket;
+    interface CtpPacket;
+
+    interface CtpInfo;
+    interface CtpCongestion;
+    interface RootControl;    
+  }
+
+  uses {
+    interface CollectionId[uint8_t client];
+    interface CollectionDebug;
+  }
+}
+
+implementation {
+  components CtpP;
+
+  StdControl = CtpP;
+  Send = CtpP;
+  Receive = CtpP.Receive;
+  Snoop = CtpP.Snoop;
+  Intercept = CtpP;
+
+  Packet = CtpP;
+  CollectionPacket = CtpP;
+  CtpPacket = CtpP;
+
+  CtpInfo = CtpP;
+  CtpCongestion = CtpP;
+  RootControl = CtpP;
+
+  CollectionId = CtpP;
+  CollectionDebug = CtpP;
+}
+
diff --git a/tos/lib/net/ctp/CollectionSenderC.nc b/tos/lib/net/ctp/CollectionSenderC.nc
new file mode 100644
index 00000000..bdb118aa
--- /dev/null
+++ b/tos/lib/net/ctp/CollectionSenderC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The virtualized collection sender abstraction.
+ *
+ * @author Kyle Jamieson
+ * @author Philip Levis
+ * @date April 25 2006
+ * @see TinyOS Net2-WG
+ */
+
+#include <Ctp.h>
+
+generic configuration CollectionSenderC(collection_id_t collectid) {
+  provides {
+    interface Send;
+    interface Packet;
+  }
+}
+implementation {
+  components new CollectionSenderP(collectid, unique(UQ_CTP_CLIENT));
+  Send = CollectionSenderP;
+  Packet = CollectionSenderP;
+}
diff --git a/tos/lib/net/ctp/CollectionSenderP.nc b/tos/lib/net/ctp/CollectionSenderP.nc
new file mode 100644
index 00000000..9c854c7f
--- /dev/null
+++ b/tos/lib/net/ctp/CollectionSenderP.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Collection.h"
+
+generic configuration 
+CollectionSenderP(collection_id_t collectid, uint8_t clientid) {
+  provides {
+    interface Send;
+    interface Packet;
+  }
+}
+
+implementation {
+  components CollectionC as Collector;
+  components new CollectionIdP(collectid);
+  
+  Send = Collector.Send[clientid];
+  Packet = Collector.Packet;
+  Collector.CollectionId[clientid] -> CollectionIdP;
+}
diff --git a/tos/lib/net/ctp/CompareBit.nc b/tos/lib/net/ctp/CompareBit.nc
new file mode 100644
index 00000000..3838de94
--- /dev/null
+++ b/tos/lib/net/ctp/CompareBit.nc
@@ -0,0 +1,52 @@
+/* $Id: CompareBit.nc,v 1.4 2010-06-29 22:07:49 scipio Exp $ */
+/*
+ * Copyright (c) 2006 University of Southern California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** Link estimator asks the routing engine if this entry
+ * should be inserted into the neighbor table if the
+ * white bit on a link is set but there is no room for the link
+ * on the link table. The return value is the "pin bit" - if true
+ * insert into the neighbor table. In the reference implementation
+ * the router will return true if the path through the source
+ * will be better than a path through at least one current neighbor.
+ @ author Omprakash Gnawali
+ @ Created: September 16, 2006
+ @date   $Date: 2010-06-29 22:07:49 $
+ */
+
+interface CompareBit {
+
+  /* should the source of this message be inserted into the neighbor table? */
+  /* expect to be called only for links with the white bit set */
+   event bool shouldInsert(message_t * ONE msg, void* COUNT_NOK(len) payload, uint8_t len);
+}
diff --git a/tos/lib/net/ctp/Ctp.h b/tos/lib/net/ctp/Ctp.h
new file mode 100644
index 00000000..40456256
--- /dev/null
+++ b/tos/lib/net/ctp/Ctp.h
@@ -0,0 +1,83 @@
+/* $Id: Ctp.h,v 1.7 2009-08-10 23:50:06 scipio Exp $ */
+
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ *  Header file that declares the AM types, message formats, and
+ *  constants for the TinyOS reference implementation of the
+ *  Collection Tree Protocol (CTP), as documented in TEP 123.
+ *
+ *  @author Philip Levis
+ *  @date   $Date: 2009-08-10 23:50:06 $
+ */
+
+#ifndef CTP_H
+#define CTP_H
+
+#include <Collection.h>
+#include <AM.h>
+
+#define UQ_CTP_CLIENT "CtpSenderC.CollectId"
+
+enum {
+    // AM types:
+    AM_CTP_ROUTING = 0x70,
+    AM_CTP_DATA    = 0x71,
+    AM_CTP_DEBUG   = 0x72,
+
+    // CTP Options:
+    CTP_OPT_PULL      = 0x80, // TEP 123: P field
+    CTP_OPT_ECN       = 0x40, // TEP 123: C field
+    CTP_OPT_ALL       = 0xff
+};
+
+typedef nx_uint8_t nx_ctp_options_t;
+typedef uint8_t ctp_options_t;
+
+typedef nx_struct {
+  nx_ctp_options_t    options;
+  nx_uint8_t          thl;
+  nx_uint16_t         etx;
+  nx_am_addr_t        origin;
+  nx_uint8_t          originSeqNo;
+  nx_collection_id_t  type;
+  nx_uint8_t (COUNT(0) data)[0]; // Deputy place-holder, field will probably be removed when we Deputize Ctp
+} ctp_data_header_t;
+
+typedef nx_struct {
+  nx_ctp_options_t    options;
+  nx_am_addr_t        parent;
+  nx_uint16_t         etx;
+  nx_uint8_t (COUNT(0) data)[0]; // Deputy place-holder, field will probably be removed when we Deputize Ctp
+} ctp_routing_header_t;
+
+#endif
diff --git a/tos/lib/net/ctp/CtpCongestion.nc b/tos/lib/net/ctp/CtpCongestion.nc
new file mode 100644
index 00000000..a1561e8e
--- /dev/null
+++ b/tos/lib/net/ctp/CtpCongestion.nc
@@ -0,0 +1,15 @@
+interface CtpCongestion {
+
+    /* Returns the current state of congestion from the provider. Ctp may be
+     * congested because its internal queue is congested or because the receive
+     * client called isCongested with TRUE. */
+
+    command bool isCongested();
+
+    /* Idempotent call to let the provider know whether a client is congested.
+     * If not previously congested, Ctp will take measures to slow down.
+     * Ctp has an internal congested condition as well. The result of isCongested
+     * is a logical OR with the parameter set here and the internal congestion.
+     */
+    command void setClientCongested(bool congested);
+}
diff --git a/tos/lib/net/ctp/CtpDebug.nc b/tos/lib/net/ctp/CtpDebug.nc
new file mode 100644
index 00000000..7e7257f3
--- /dev/null
+++ b/tos/lib/net/ctp/CtpDebug.nc
@@ -0,0 +1,80 @@
+/* $Id: CtpDebug.nc,v 1.5 2010-06-29 22:07:49 scipio Exp $*/
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** 
+ *  The CollectionDebug is an interface for sending debugging events to
+ *  a logging infrastructure. An implementer can choose to send the event
+ *  information to different destinations. Primary examples can include:
+ *  <ul>
+ *    <li> logging to the UART, in case of a testbed of network-connected
+ *         nodes;
+ *    <li> logging to flash, if the logs are to be retrieved later
+ *    <li> logging to the standard output, in the case of TOSSIM.
+ *  </ul>
+ *  
+ *  The interface does not specify in what format the log is to be produced,
+ *  or if other information, like timestamps, should be added, and this is
+ *  up to the implementer.
+ * 
+ *  Some commands are generic, like Event, EventSimple, and EventDbg, while others
+ *  are for more specific events related to collection, like EventRoute and EventMsg.
+ *
+ 
+ * @author Rodrigo Fonseca
+ * @author Kyle Jamieson
+ * @date   $Date: 2010-06-29 22:07:49 $
+ */
+
+interface CollectionDebug {
+    /* Log the occurrence of an event of type type */
+    command error_t logEvent(uint8_t type);
+
+    /* Log the occurrence of an event and a single parameter */
+    command error_t logEventSimple(uint8_t type, uint16_t arg);
+
+    /* Log the occurrence of an event and 3 16bit parameters */
+    command error_t logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3);
+
+    /* Log the occurrence of an event related to forwarding a message.
+     * This is intended to allow following the same message as it goes from one
+     * hop to the next 
+     */
+    command error_t logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node);
+
+    /* Log the occurrence of an event related to a route update message, 
+     * such as a node receiving a route, updating its own route information,
+     * or looking at a particular entry in its routing table.
+     */
+    command error_t logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric);
+}
diff --git a/tos/lib/net/ctp/CtpDebugMsg.h b/tos/lib/net/ctp/CtpDebugMsg.h
new file mode 100644
index 00000000..59e1f73b
--- /dev/null
+++ b/tos/lib/net/ctp/CtpDebugMsg.h
@@ -0,0 +1,81 @@
+#ifndef _COLLECTION_UART_MSG
+#define _COLLECTION_UART_MSG
+
+#include "AM.h"
+
+//Comment format ->   :meaning:args
+enum {
+    NET_C_DEBUG_STARTED = 0xDE,
+
+    NET_C_FE_MSG_POOL_EMPTY = 0x10,    //::no args
+    NET_C_FE_SEND_QUEUE_FULL = 0x11,   //::no args
+    NET_C_FE_NO_ROUTE = 0x12,          //::no args
+    NET_C_FE_SUBSEND_OFF = 0x13,
+    NET_C_FE_SUBSEND_BUSY = 0x14,
+    NET_C_FE_BAD_SENDDONE = 0x15,
+    NET_C_FE_QENTRY_POOL_EMPTY = 0x16,
+    NET_C_FE_SUBSEND_SIZE = 0x17,
+    NET_C_FE_LOOP_DETECTED = 0x18,
+    NET_C_FE_SEND_BUSY = 0x19,
+
+    NET_C_FE_SENDQUEUE_EMPTY = 0x50,
+    NET_C_FE_PUT_MSGPOOL_ERR = 0x51,
+    NET_C_FE_PUT_QEPOOL_ERR = 0x52,
+    NET_C_FE_GET_MSGPOOL_ERR = 0x53,
+    NET_C_FE_GET_QEPOOL_ERR = 0x54,
+    NET_C_FE_QUEUE_SIZE=0x55,
+
+    NET_C_FE_SENT_MSG = 0x20,  //:app. send       :msg uid, origin, next_hop
+    NET_C_FE_RCV_MSG =  0x21,  //:next hop receive:msg uid, origin, last_hop
+    NET_C_FE_FWD_MSG =  0x22,  //:fwd msg         :msg uid, origin, next_hop
+    NET_C_FE_DST_MSG =  0x23,  //:base app. recv  :msg_uid, origin, last_hop
+    NET_C_FE_SENDDONE_FAIL = 0x24,
+    NET_C_FE_SENDDONE_WAITACK = 0x25,
+    NET_C_FE_SENDDONE_FAIL_ACK_SEND = 0x26,
+    NET_C_FE_SENDDONE_FAIL_ACK_FWD  = 0x27,
+    NET_C_FE_DUPLICATE_CACHE = 0x28,  //dropped duplicate packet seen in cache
+    NET_C_FE_DUPLICATE_QUEUE = 0x29,  //dropped duplicate packet seen in queue
+    NET_C_FE_DUPLICATE_CACHE_AT_SEND = 0x2A,  //dropped duplicate packet seen in cache
+    NET_C_FE_CONGESTION_SENDWAIT = 0x2B, // sendTask deferring for congested parent
+    NET_C_FE_CONGESTION_BEGIN = 0x2C, // 
+    NET_C_FE_CONGESTION_END = 0x2D, // congestion over: reason is arg;
+                                    //  arg=1 => overheard parent's
+                                    //           ECN cleared.
+                                    //  arg=0 => timeout.
+    NET_C_FE_CONGESTED = 0x2E,
+
+    NET_C_TREE_NO_ROUTE   = 0x30,   //:        :no args
+    NET_C_TREE_NEW_PARENT = 0x31,   //:        :parent_id, hopcount, metric
+    NET_C_TREE_ROUTE_INFO = 0x32,   //:periodic:parent_id, hopcount, metric
+    NET_C_TREE_SENT_BEACON = 0x33,
+    NET_C_TREE_RCV_BEACON = 0x34,
+
+    NET_C_DBG_1 = 0x40,             //:any     :uint16_t a
+    NET_C_DBG_2 = 0x41,             //:any     :uint16_t a, b, c
+    NET_C_DBG_3 = 0x42,             //:any     :uint16_t a, b, c
+};
+
+typedef nx_struct CollectionDebugMsg {
+    nx_uint8_t type;
+    nx_union {
+        nx_uint16_t arg;
+        nx_struct {
+            nx_uint16_t msg_uid;   
+            nx_am_addr_t origin;
+            nx_am_addr_t other_node;
+        } msg;
+        nx_struct {
+            nx_am_addr_t parent;
+            nx_uint8_t hopcount;
+            nx_uint16_t metric;
+        } route_info;
+        nx_struct {
+            nx_uint16_t a;
+            nx_uint16_t b;
+            nx_uint16_t c;
+        } dbg;
+    } data;
+    nx_uint16_t seqno;
+} CollectionDebugMsg;
+
+#endif
diff --git a/tos/lib/net/ctp/CtpForwardingEngine.h b/tos/lib/net/ctp/CtpForwardingEngine.h
new file mode 100644
index 00000000..ccb92dbf
--- /dev/null
+++ b/tos/lib/net/ctp/CtpForwardingEngine.h
@@ -0,0 +1,106 @@
+#ifndef FORWARDING_ENGINE_H
+#define FORWARDING_ENGINE_H
+
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <AM.h>
+#include <message.h>
+
+/**
+ * Author: Philip Levis
+ * Author: Kyle Jamieson 
+ * Author: Omprakash Gnawali
+ * Author: Rodrigo Fonseca
+ */
+
+/* 
+ * These timings are in milliseconds, and are used by
+ * ForwardingEngineP. Each pair of values represents a range of
+ * [OFFSET - (OFFSET + WINDOW)]. The ForwardingEngine uses these
+ * values to determine when to send the next packet after an
+ * event. FAIL refers to a send fail (an error from the radio below),
+ * NOACK refers to the previous packet not being acknowledged,
+ * OK refers to an acknowledged packet, and LOOPY refers to when
+ * a loop is detected.
+ *
+ * These timings are defined in terms of packet times. Currently,
+ * two values are defined: for CC2420-based platforms (4ms) and
+ * all other platfoms (32ms). 
+ */
+
+enum {
+#if PLATFORM_MICAZ || PLATFORM_TELOSA || PLATFORM_TELOSB || PLATFORM_TMOTE || PLATFORM_INTELMOTE2 || PLATFORM_SHIMMER || PLATFORM_IRIS
+  FORWARD_PACKET_TIME = 7,
+#else
+  FORWARD_PACKET_TIME = 32,
+#endif
+};
+
+enum {
+  SENDDONE_OK_OFFSET        = FORWARD_PACKET_TIME,
+  SENDDONE_OK_WINDOW        = FORWARD_PACKET_TIME,
+  SENDDONE_NOACK_OFFSET     = FORWARD_PACKET_TIME,
+  SENDDONE_NOACK_WINDOW     = FORWARD_PACKET_TIME,
+  SENDDONE_FAIL_OFFSET      = FORWARD_PACKET_TIME  << 2,
+  SENDDONE_FAIL_WINDOW      = SENDDONE_FAIL_OFFSET,
+  LOOPY_OFFSET              = FORWARD_PACKET_TIME  << 2,
+  LOOPY_WINDOW              = LOOPY_OFFSET,
+  CONGESTED_WAIT_OFFSET     = FORWARD_PACKET_TIME  << 2,
+  CONGESTED_WAIT_WINDOW     = CONGESTED_WAIT_OFFSET,
+  NO_ROUTE_RETRY            = 10000
+};
+
+
+/* 
+ * The number of times the ForwardingEngine will try to 
+ * transmit a packet before giving up if the link layer
+ * supports acknowledgments. If the link layer does
+ * not support acknowledgments it sends the packet once.
+ */
+enum {
+  MAX_RETRIES = 30
+};
+
+/*
+ * An element in the ForwardingEngine send queue.
+ * The client field keeps track of which send client 
+ * submitted the packet or if the packet is being forwarded
+ * from another node (client == 255). Retries keeps track
+ * of how many times the packet has been transmitted.
+ */
+typedef struct {
+  message_t * ONE_NOK msg;
+  uint8_t client;
+  uint8_t retries;
+} fe_queue_entry_t;
+
+#endif
diff --git a/tos/lib/net/ctp/CtpForwardingEngineP.nc b/tos/lib/net/ctp/CtpForwardingEngineP.nc
new file mode 100644
index 00000000..2bdd4a02
--- /dev/null
+++ b/tos/lib/net/ctp/CtpForwardingEngineP.nc
@@ -0,0 +1,892 @@
+/* $Id: CtpForwardingEngineP.nc,v 1.24 2010-04-11 23:27:30 gnawali Exp $ */
+/*
+ * Copyright (c) 2008-9 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  This component contains the forwarding path of CTP Noe, the
+ *  standard CTP implementation packaged with TinyOS 2.x. The CTP
+ *  specification can be found in TEP 123.  The paper entitled
+ *  "Collection Tree Protocol," by Omprakash Gnawali et al., in SenSys
+ *  2009, describes the implementation and provides detailed
+ *  performance results of CTP Noe.</p>
+ *
+ *  <p>The CTP ForwardingEngine is responsible for queueing and
+ *  scheduling outgoing packets. It maintains a pool of forwarding
+ *  messages and a packet send queue. A ForwardingEngine with a
+ *  forwarding message pool of size <i>F</i> and <i>C</i>
+ *  CollectionSenderC clients has a send queue of size <i>F +
+ *  C</i>. This implementation several configuration constants, which
+ *  can be found in <code>ForwardingEngine.h</code>.</p>
+ *
+ *  <p>Packets in the send queue are sent in FIFO order, with
+ *  head-of-line blocking. Because this is a tree collection protocol,
+ *  all packets are going to the same destination, and so the
+ *  ForwardingEngine does not distinguish packets from one
+ *  another. Packets from CollectionSenderC clients are sent
+ *  identically to forwarded packets: only their buffer handling is
+ *  different.</p>
+ *
+ *  <p>If ForwardingEngine is on top of a link layer that supports
+ *  synchronous acknowledgments, it enables them and retransmits packets
+ *  when they are not acked. It transmits a packet up to MAX_RETRIES times
+ *  before giving up and dropping the packet. MAX_RETRIES is typically a
+ *  large number (e.g., >20), as this implementation assumes there is
+ *  link layer feedback on failed packets, such that link costs will go
+ *  up and cause the routing layer to pick a next hop. If the underlying
+ *  link layer does not support acknowledgments, ForwardingEngine sends
+ *  a packet only once.</p> 
+ *
+ *  <p>The ForwardingEngine detects routing loops and tries to correct
+ *  them. Routing is in terms of a cost gradient, where the collection
+ *  root has a cost of zero and a node's cost is the cost of its next
+ *  hop plus the cost of the link to that next hop.  If there are no
+ *  loops, then this gradient value decreases monotonically along a
+ *  route. When the ForwardingEngine sends a packet to the next hop,
+ *  it puts the local gradient value in the packet header. If a node
+ *  receives a packet to forward whose gradient value is less than its
+ *  own, then the gradient is not monotonically decreasing and there
+ *  may be a routing loop. When the ForwardingEngine receives such a
+ *  packet, it tells the RoutingEngine to advertise its gradient value
+ *  soon, with the hope that the advertisement will update the node
+ *  who just sent a packet and break the loop. It also pauses the
+ *  before the next packet transmission, in hopes of giving the
+ *  routing layer's packet a priority.</p>
+ *  
+ *  <p>ForwardingEngine times its packet transmissions. It
+ *  differentiates between four transmission cases: forwarding,
+ *  success, ack failure, and loop detection. In each case, the
+ *  ForwardingEngine waits a randomized period of time before sending
+ *  the next packet. This approach assumes that the network is
+ *  operating at low utilization; its goal is to prevent correlated
+ *  traffic -- such as nodes along a route forwarding packets -- from
+ *  interfering with itself.</p>
+ *
+ *  <p>While this implementation can work on top of a variety of link
+ *  estimators, it is designed to work with a 4-bit link estimator
+ *  (4B). Details on 4B can be found in the HotNets paper "Four Bit
+ *  Link Estimation" by Rodrigo Fonseca et al. The forwarder provides
+ *  the "ack" bit for each sent packet, telling the estimator whether
+ *  the packet was acknowledged.</p>
+ *
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @date   $Date: 2010-04-11 23:27:30 $
+ */
+
+#include <CtpForwardingEngine.h>
+#include <CtpDebugMsg.h>
+   
+generic module CtpForwardingEngineP() {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface Send[uint8_t client];
+    interface Receive[collection_id_t id];
+    interface Receive as Snoop[collection_id_t id];
+    interface Intercept[collection_id_t id];
+    interface Packet;
+    interface CollectionPacket;
+    interface CtpPacket;
+    interface CtpCongestion;
+  }
+  uses {
+    // These five interfaces are used in the forwarding path
+    //   SubSend is for sending packets
+    //   PacketAcknowledgements is for enabling layer 2 acknowledgments
+    //   RetxmitTimer is for timing packet sends for improved performance
+    //   LinkEstimator is for providing the ack bit to a link estimator
+    interface AMSend as SubSend;
+    interface PacketAcknowledgements;
+    interface Timer<TMilli> as RetxmitTimer;
+    interface LinkEstimator; 
+    interface UnicastNameFreeRouting;
+    interface Packet as SubPacket;
+
+    // These four data structures are used to manage packets to forward.
+    // SendQueue and QEntryPool are the forwarding queue.
+    // MessagePool is the buffer pool for messages to forward.
+    // SentCache is for suppressing duplicate packet transmissions.
+    interface Queue<fe_queue_entry_t*> as SendQueue;
+    interface Pool<fe_queue_entry_t> as QEntryPool;
+    interface Pool<message_t> as MessagePool;
+    interface Cache<message_t*> as SentCache;
+    
+    interface Receive as SubReceive;
+    interface Receive as SubSnoop;
+    interface CtpInfo;
+    interface RootControl;
+    interface CollectionId[uint8_t client];
+    interface AMPacket;
+    interface Leds;
+    interface Random;
+
+    // This implementation has extensive debugging instrumentation.
+    // Wiring up the CollectionDebug interface provides information
+    // on important events, such as transmissions, receptions,
+    // and cache checks. The TinyOS release includes scripts for
+    // parsing these messages.
+    interface CollectionDebug;
+
+    
+    // The ForwardingEngine monitors whether the underlying
+    // radio is on or not in order to start/stop forwarding
+    // as appropriate.
+    interface SplitControl as RadioControl;
+  }
+}
+implementation {
+  /* Helper functions to start the given timer with a random number
+   * masked by the given mask and added to the given offset.
+   */
+  static void startRetxmitTimer(uint16_t mask, uint16_t offset);
+  void clearState(uint8_t state);
+  bool hasState(uint8_t state);
+  void setState(uint8_t state);
+
+  // CTP state variables.
+  enum {
+    QUEUE_CONGESTED  = 0x1, // Need to set C bit?
+    ROUTING_ON       = 0x2, // Forwarding running?
+    RADIO_ON         = 0x4, // Radio is on?
+    ACK_PENDING      = 0x8, // Have an ACK pending?
+    SENDING          = 0x10 // Am sending a packet?
+  };
+
+  // Start with all states false
+  uint8_t forwardingState = 0; 
+  
+  /* Network-level sequence number, so that receivers
+   * can distinguish retransmissions from different packets. */
+  uint8_t seqno;
+
+  enum {
+    CLIENT_COUNT = uniqueCount(UQ_CTP_CLIENT)
+  };
+
+  /* Each sending client has its own reserved queue entry.
+     If the client has a packet pending, its queue entry is in the 
+     queue, and its clientPtr is NULL. If the client is idle,
+     its queue entry is pointed to by clientPtrs. */
+
+  fe_queue_entry_t clientEntries[CLIENT_COUNT];
+  fe_queue_entry_t* ONE_NOK clientPtrs[CLIENT_COUNT];
+
+  /* The loopback message is for when a collection roots calls
+     Send.send. Since Send passes a pointer but Receive allows
+     buffer swaps, the forwarder copies the sent packet into 
+     the loopbackMsgPtr and performs a buffer swap with it.
+     See sendTask(). */
+     
+  message_t loopbackMsg;
+  message_t* ONE_NOK loopbackMsgPtr;
+
+  command error_t Init.init() {
+    int i;
+    for (i = 0; i < CLIENT_COUNT; i++) {
+      clientPtrs[i] = clientEntries + i;
+      dbg("Forwarder", "clientPtrs[%hhu] = %p\n", i, clientPtrs[i]);
+    }
+    loopbackMsgPtr = &loopbackMsg;
+    seqno = 0;
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start() {
+    setState(ROUTING_ON);
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    clearState(ROUTING_ON);
+    return SUCCESS;
+  }
+
+  /* sendTask is where the first phase of all send logic
+   * exists (the second phase is in SubSend.sendDone()). */
+  task void sendTask();
+  
+  /* ForwardingEngine keeps track of whether the underlying
+     radio is powered on. If not, it enqueues packets;
+     when it turns on, it then starts sending packets. */ 
+  event void RadioControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+      setState(RADIO_ON);
+      if (!call SendQueue.empty()) {
+	dbg("FHangBug", "%s posted sendTask.\n", __FUNCTION__);
+        post sendTask();
+      }
+    }
+  }
+
+  static void startRetxmitTimer(uint16_t window, uint16_t offset) {
+    uint16_t r = call Random.rand16();
+    r %= window;
+    r += offset;
+    call RetxmitTimer.startOneShot(r);
+    dbg("Forwarder", "Rexmit timer will fire in %hu ms\n", r);
+  }
+  
+  /* 
+   * If the ForwardingEngine has stopped sending packets because
+   * these has been no route, then as soon as one is found, start
+   * sending packets.
+   */ 
+  event void UnicastNameFreeRouting.routeFound() {
+    dbg("FHangBug", "%s posted sendTask.\n", __FUNCTION__);
+    post sendTask();
+  }
+
+  event void UnicastNameFreeRouting.noRoute() {
+    // Depend on the sendTask to take care of this case;
+    // if there is no route the component will just resume
+    // operation on the routeFound event
+  }
+  
+  event void RadioControl.stopDone(error_t err) {
+    if (err == SUCCESS) {
+      clearState(RADIO_ON);
+    }
+  }
+
+  ctp_data_header_t* getHeader(message_t* m) {
+    return (ctp_data_header_t*)call SubPacket.getPayload(m, sizeof(ctp_data_header_t));
+  }
+ 
+  /*
+   * The send call from a client. Return EBUSY if the client is busy
+   * (clientPtrs is NULL), otherwise configure its queue entry
+   * and put it in the send queue. If the ForwardingEngine is not
+   * already sending packets (the RetxmitTimer isn't running), post
+   * sendTask. It could be that the engine is running and sendTask
+   * has already been posted, but the post-once semantics make this
+   * not matter. What's important is that you don't post sendTask
+   * if the retransmit timer is running; this would circumvent the
+   * timer and send a packet before it fires.
+   */ 
+  command error_t Send.send[uint8_t client](message_t* msg, uint8_t len) {
+    ctp_data_header_t* hdr;
+    fe_queue_entry_t *qe;
+    dbg("Forwarder", "%s: sending packet from client %hhu: %x, len %hhu\n", __FUNCTION__, client, msg, len);
+    if (!hasState(ROUTING_ON)) {return EOFF;}
+    if (len > call Send.maxPayloadLength[client]()) {return ESIZE;}
+    
+    call Packet.setPayloadLength(msg, len);
+    hdr = getHeader(msg);
+    hdr->origin = TOS_NODE_ID;
+    hdr->originSeqNo  = seqno++;
+    hdr->type = call CollectionId.fetch[client]();
+    hdr->thl = 0;
+
+    if (clientPtrs[client] == NULL) {
+      dbg("Forwarder", "%s: send failed as client is busy.\n", __FUNCTION__);
+      return EBUSY;
+    }
+
+    qe = clientPtrs[client];
+    qe->msg = msg;
+    qe->client = client;
+    qe->retries = MAX_RETRIES;
+    dbg("Forwarder", "%s: queue entry for %hhu is %hhu deep\n", __FUNCTION__, client, call SendQueue.size());
+    if (call SendQueue.enqueue(qe) == SUCCESS) {
+      if (hasState(RADIO_ON) && !hasState(SENDING)) {
+	dbg("FHangBug", "%s posted sendTask.\n", __FUNCTION__);
+        post sendTask();
+      }
+      clientPtrs[client] = NULL;
+      return SUCCESS;
+    }
+    else {
+      dbg("Forwarder", 
+          "%s: send failed as packet could not be enqueued.\n", 
+          __FUNCTION__);
+      
+      // send a debug message to the uart
+      call CollectionDebug.logEvent(NET_C_FE_SEND_QUEUE_FULL);
+
+      // Return the pool entry, as it's not for me...
+      return FAIL;
+    }
+  }
+
+  command error_t Send.cancel[uint8_t client](message_t* msg) {
+    // cancel not implemented. will require being able
+    // to pull entries out of the queue.
+    return FAIL;
+  }
+
+  command uint8_t Send.maxPayloadLength[uint8_t client]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* Send.getPayload[uint8_t client](message_t* msg, uint8_t len) {
+    return call Packet.getPayload(msg, len);
+  }
+
+  /*
+   * These is where all of the send logic is. When the ForwardingEngine
+   * wants to send a packet, it posts this task. The send logic is
+   * independent of whether it is a forwarded packet or a packet from
+   * a send clientL the two cases differ in how memory is managed in
+   * sendDone.
+   *
+   * The task first checks that there is a packet to send and that
+   * there is a valid route. It then marshals the relevant arguments
+   * and prepares the packet for sending. If the node is a collection
+   * root, it signals Receive with the loopback message. Otherwise,
+   * it sets the packet to be acknowledged and sends it. It does not
+   * remove the packet from the send queue: while sending, the 
+   * packet being sent is at the head of the queue; a packet is dequeued
+   * in the sendDone handler, either due to retransmission failure
+   * or to a successful send.
+   */
+
+  task void sendTask() {
+    uint16_t gradient;
+    dbg("Forwarder", "%s: Trying to send a packet. Queue size is %hhu.\n", __FUNCTION__, call SendQueue.size());
+    if (hasState(SENDING) || call SendQueue.empty()) {
+      call CollectionDebug.logEvent(NET_C_FE_SENDQUEUE_EMPTY);
+      return;
+    }
+    else if ((!call RootControl.isRoot() && 
+	      !call UnicastNameFreeRouting.hasRoute()) ||
+	     (call CtpInfo.getEtx(&gradient) != SUCCESS)) {
+      /* This code path is for when we don't have a valid next
+       * hop. We set a retry timer.
+       *
+       * Technically, this timer isn't necessary, as if a route
+       * is found we'll get an event. But just in case such an event
+       * is lost (e.g., a bug in the routing engine), we retry.
+       * Otherwise the forwarder might hang indefinitely. As this test
+       * doesn't require radio activity, the energy cost is minimal. */
+      dbg("Forwarder", "%s: no route, don't send, try again in %i.\n", __FUNCTION__, NO_ROUTE_RETRY);
+      call RetxmitTimer.startOneShot(NO_ROUTE_RETRY);
+      call CollectionDebug.logEvent(NET_C_FE_NO_ROUTE);
+      return;
+    }
+    else {
+      /* We can send a packet.
+	 First check if it's a duplicate;
+	 if not, try to send/forward. */
+      error_t subsendResult;
+      fe_queue_entry_t* qe = call SendQueue.head();
+      uint8_t payloadLen = call SubPacket.payloadLength(qe->msg);
+      am_addr_t dest = call UnicastNameFreeRouting.nextHop();
+
+      if (call SentCache.lookup(qe->msg)) {
+	/* This packet is a duplicate, so suppress it: free memory and
+	 * send next packet.  Duplicates are only possible for
+	 * forwarded packets, so we can circumvent the client or
+	 * forwarded branch for freeing the buffer. */
+        call CollectionDebug.logEvent(NET_C_FE_DUPLICATE_CACHE_AT_SEND);
+        call SendQueue.dequeue();
+	if (call MessagePool.put(qe->msg) != SUCCESS) 
+	  call CollectionDebug.logEvent(NET_C_FE_PUT_MSGPOOL_ERR); 
+	if (call QEntryPool.put(qe) != SUCCESS) 
+	  call CollectionDebug.logEvent(NET_C_FE_PUT_QEPOOL_ERR); 
+	  
+        post sendTask();
+        return;
+      }
+      
+      // Not a duplicate: we've decided we're going to send.
+      dbg("Forwarder", "Sending queue entry %p\n", qe);
+
+      if (call RootControl.isRoot()) {
+	/* Code path for roots: copy the packet and signal receive. */
+        collection_id_t collectid = getHeader(qe->msg)->type;
+	uint8_t* payload;
+	uint8_t payloadLength;
+
+        memcpy(loopbackMsgPtr, qe->msg, sizeof(message_t));
+
+	payload = call Packet.getPayload(loopbackMsgPtr, call Packet.payloadLength(loopbackMsgPtr));
+	payloadLength =  call Packet.payloadLength(loopbackMsgPtr);
+        dbg("Forwarder", "%s: I'm a root, so loopback and signal receive.\n", __FUNCTION__);
+        loopbackMsgPtr = signal Receive.receive[collectid](loopbackMsgPtr,
+							   payload,
+							   payloadLength);
+        signal SubSend.sendDone(qe->msg, SUCCESS);
+      }
+      else {
+	/* The basic forwarding/sending case. */
+	call CtpPacket.setEtx(qe->msg, gradient);
+	call CtpPacket.clearOption(qe->msg, CTP_OPT_ECN | CTP_OPT_PULL);
+	if (call PacketAcknowledgements.requestAck(qe->msg) == SUCCESS) {
+	  setState(ACK_PENDING);
+	}
+	if (hasState(QUEUE_CONGESTED)) {
+	  call CtpPacket.setOption(qe->msg, CTP_OPT_ECN); 
+	  clearState(QUEUE_CONGESTED);
+	}
+	
+	subsendResult = call SubSend.send(dest, qe->msg, payloadLen);
+	if (subsendResult == SUCCESS) {
+	  // Successfully submitted to the data-link layer.
+	  setState(SENDING);
+	  dbg("Forwarder", "%s: subsend succeeded with %p.\n", __FUNCTION__, qe->msg);
+	  return;
+	}
+	// The packet is too big: truncate it and retry.
+	else if (subsendResult == ESIZE) {
+	  dbg("Forwarder", "%s: subsend failed from ESIZE: truncate packet.\n", __FUNCTION__);
+	  call Packet.setPayloadLength(qe->msg, call Packet.maxPayloadLength());
+	  post sendTask();
+	  call CollectionDebug.logEvent(NET_C_FE_SUBSEND_SIZE);
+	}
+	else {
+	  dbg("Forwarder", "%s: subsend failed from %i\n", __FUNCTION__, (int)subsendResult);
+	}
+      }
+    }
+  }
+
+
+  /*
+   * The second phase of a send operation; based on whether the transmission was
+   * successful, the ForwardingEngine either stops sending or starts the
+   * RetxmitTimer with an interval based on what has occured. If the send was
+   * successful or the maximum number of retransmissions has been reached, then
+   * the ForwardingEngine dequeues the current packet. If the packet is from a
+   * client it signals Send.sendDone(); if it is a forwarded packet it returns
+   * the packet and queue entry to their respective pools.
+   * 
+   */
+
+  void packetComplete(fe_queue_entry_t* qe, message_t* msg, bool success) {
+    // Four cases:
+    // Local packet: success or failure
+    // Forwarded packet: success or failure
+    if (qe->client < CLIENT_COUNT) { 
+      clientPtrs[qe->client] = qe;
+      signal Send.sendDone[qe->client](msg, SUCCESS);
+      if (success) {
+	dbg("CtpForwarder", "%s: packet %hu.%hhu for client %hhu acknowledged.\n", __FUNCTION__, call CollectionPacket.getOrigin(msg), call CollectionPacket.getSequenceNumber(msg), qe->client);
+	call CollectionDebug.logEventMsg(NET_C_FE_SENT_MSG, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+      } else {
+	dbg("CtpForwarder", "%s: packet %hu.%hhu for client %hhu dropped.\n", __FUNCTION__, call CollectionPacket.getOrigin(msg), call CollectionPacket.getSequenceNumber(msg), qe->client);
+	call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL_ACK_SEND, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+					 call AMPacket.destination(msg));
+      }
+    }
+    else { 
+      if (success) {
+	call SentCache.insert(qe->msg);
+	dbg("CtpForwarder", "%s: forwarded packet %hu.%hhu acknowledged: insert in transmit queue.\n", __FUNCTION__, call CollectionPacket.getOrigin(msg), call CollectionPacket.getSequenceNumber(msg));
+	call CollectionDebug.logEventMsg(NET_C_FE_FWD_MSG, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+      }
+      else {
+	dbg("CtpForwarder", "%s: forwarded packet %hu.%hhu dropped.\n", __FUNCTION__, call CollectionPacket.getOrigin(msg), call CollectionPacket.getSequenceNumber(msg));
+	call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL_ACK_FWD, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+					 call AMPacket.destination(msg));
+      }
+      if (call MessagePool.put(qe->msg) != SUCCESS)
+	call CollectionDebug.logEvent(NET_C_FE_PUT_MSGPOOL_ERR);
+      if (call QEntryPool.put(qe) != SUCCESS)
+	call CollectionDebug.logEvent(NET_C_FE_PUT_QEPOOL_ERR);
+    }
+  }
+  
+  event void SubSend.sendDone(message_t* msg, error_t error) {
+    fe_queue_entry_t *qe = call SendQueue.head();
+    dbg("Forwarder", "%s to %hu and %hhu\n", __FUNCTION__, call AMPacket.destination(msg), error);
+
+    if (error != SUCCESS) {
+      /* The radio wasn't able to send the packet: retransmit it. */
+      dbg("Forwarder", "%s: send failed\n", __FUNCTION__);
+      call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL, 
+				       call CollectionPacket.getSequenceNumber(msg), 
+				       call CollectionPacket.getOrigin(msg), 
+				       call AMPacket.destination(msg));
+      startRetxmitTimer(SENDDONE_FAIL_WINDOW, SENDDONE_FAIL_OFFSET);
+    }
+    else if (hasState(ACK_PENDING) && !call PacketAcknowledgements.wasAcked(msg)) {
+      /* No ack: if countdown is not 0, retransmit, else drop the packet. */
+      call LinkEstimator.txNoAck(call AMPacket.destination(msg));
+      call CtpInfo.recomputeRoutes();
+      if (--qe->retries) { 
+        dbg("Forwarder", "%s: not acked, retransmit\n", __FUNCTION__);
+        call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_WAITACK, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+        startRetxmitTimer(SENDDONE_NOACK_WINDOW, SENDDONE_NOACK_OFFSET);
+      } else {
+	/* Hit max retransmit threshold: drop the packet. */
+	call SendQueue.dequeue();
+        clearState(SENDING);
+        startRetxmitTimer(SENDDONE_OK_WINDOW, SENDDONE_OK_OFFSET);
+	
+	packetComplete(qe, msg, FALSE);
+      }
+    }
+    else {
+      /* Packet was acknowledged. Updated the link estimator,
+	 free the buffer (pool or sendDone), start timer to
+	 send next packet. */
+      call SendQueue.dequeue();
+      clearState(SENDING);
+      startRetxmitTimer(SENDDONE_OK_WINDOW, SENDDONE_OK_OFFSET);
+      call LinkEstimator.txAck(call AMPacket.destination(msg));
+      packetComplete(qe, msg, TRUE);
+    }
+  }
+
+  /*
+   * Function for preparing a packet for forwarding. Performs
+   * a buffer swap from the message pool. If there are no free
+   * message in the pool, it returns the passed message and does not
+   * put it on the send queue.
+   */
+  message_t* ONE forward(message_t* ONE m) {
+    if (call MessagePool.empty()) {
+      dbg("Route", "%s cannot forward, message pool empty.\n", __FUNCTION__);
+      // send a debug message to the uart
+      call CollectionDebug.logEvent(NET_C_FE_MSG_POOL_EMPTY);
+    }
+    else if (call QEntryPool.empty()) {
+      dbg("Route", "%s cannot forward, queue entry pool empty.\n", 
+          __FUNCTION__);
+      // send a debug message to the uart
+      call CollectionDebug.logEvent(NET_C_FE_QENTRY_POOL_EMPTY);
+    }
+    else {
+      message_t* newMsg;
+      fe_queue_entry_t *qe;
+      uint16_t gradient;
+      
+      qe = call QEntryPool.get();
+      if (qe == NULL) {
+        call CollectionDebug.logEvent(NET_C_FE_GET_MSGPOOL_ERR);
+        return m;
+      }
+
+      newMsg = call MessagePool.get();
+      if (newMsg == NULL) {
+        call CollectionDebug.logEvent(NET_C_FE_GET_QEPOOL_ERR);
+        return m;
+      }
+
+      memset(newMsg, 0, sizeof(message_t));
+      memset(m->metadata, 0, sizeof(message_metadata_t));
+      
+      qe->msg = m;
+      qe->client = 0xff;
+      qe->retries = MAX_RETRIES;
+
+      
+      if (call SendQueue.enqueue(qe) == SUCCESS) {
+        dbg("Forwarder,Route", "%s forwarding packet %p with queue size %hhu\n", __FUNCTION__, m, call SendQueue.size());
+        // Loop-detection code:
+        if (call CtpInfo.getEtx(&gradient) == SUCCESS) {
+          // We only check for loops if we know our own metric
+          if (call CtpPacket.getEtx(m) <= gradient) {
+            // If our etx metric is less than or equal to the etx value
+	    // on the packet (etx of the previous hop node), then we believe
+	    // we are in a loop.
+	    // Trigger a route update and backoff.
+            call CtpInfo.triggerImmediateRouteUpdate();
+            startRetxmitTimer(LOOPY_WINDOW, LOOPY_OFFSET);
+            call CollectionDebug.logEventMsg(NET_C_FE_LOOP_DETECTED,
+					 call CollectionPacket.getSequenceNumber(m), 
+					 call CollectionPacket.getOrigin(m), 
+                                         call AMPacket.destination(m));
+          }
+        }
+
+        if (!call RetxmitTimer.isRunning()) {
+          // sendTask is only immediately posted if we don't detect a
+          // loop.
+	  dbg("FHangBug", "%s: posted sendTask.\n", __FUNCTION__);
+          post sendTask();
+        }
+        
+        // Successful function exit point:
+        return newMsg;
+      } else {
+        // There was a problem enqueuing to the send queue.
+        if (call MessagePool.put(newMsg) != SUCCESS)
+          call CollectionDebug.logEvent(NET_C_FE_PUT_MSGPOOL_ERR);
+        if (call QEntryPool.put(qe) != SUCCESS)
+          call CollectionDebug.logEvent(NET_C_FE_PUT_QEPOOL_ERR);
+      }
+    }
+
+    // NB: at this point, we have a resource acquistion problem.
+    // Log the event, and drop the
+    // packet on the floor.
+
+    call CollectionDebug.logEvent(NET_C_FE_SEND_QUEUE_FULL);
+    return m;
+  }
+ 
+  /*
+   * Received a message to forward. Check whether it is a duplicate by
+   * checking the packets currently in the queue as well as the 
+   * send history cache (in case we recently forwarded this packet).
+   * The cache is important as nodes immediately forward packets
+   * but wait a period before retransmitting after an ack failure.
+   * If this node is a root, signal receive.
+   */ 
+  event message_t* 
+  SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    collection_id_t collectid;
+    bool duplicate = FALSE;
+    fe_queue_entry_t* qe;
+    uint8_t i, thl;
+
+
+    collectid = call CtpPacket.getType(msg);
+
+    // Update the THL here, since it has lived another hop, and so
+    // that the root sees the correct THL.
+    thl = call CtpPacket.getThl(msg);
+    thl++;
+    call CtpPacket.setThl(msg, thl);
+
+    call CollectionDebug.logEventMsg(NET_C_FE_RCV_MSG,
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+				     thl--);
+    if (len > call SubSend.maxPayloadLength()) {
+      return msg;
+    }
+
+    //See if we remember having seen this packet
+    //We look in the sent cache ...
+    if (call SentCache.lookup(msg)) {
+        call CollectionDebug.logEvent(NET_C_FE_DUPLICATE_CACHE);
+        return msg;
+    }
+    //... and in the queue for duplicates
+    if (call SendQueue.size() > 0) {
+      for (i = call SendQueue.size(); i >0; i--) {
+	qe = call SendQueue.element(i-1);
+	if (call CtpPacket.matchInstance(qe->msg, msg)) {
+	  duplicate = TRUE;
+	  break;
+	}
+      }
+    }
+    
+    if (duplicate) {
+        call CollectionDebug.logEvent(NET_C_FE_DUPLICATE_QUEUE);
+        return msg;
+    }
+
+    // If I'm the root, signal receive. 
+    else if (call RootControl.isRoot())
+      return signal Receive.receive[collectid](msg, 
+					       call Packet.getPayload(msg, call Packet.payloadLength(msg)), 
+					       call Packet.payloadLength(msg));
+    // I'm on the routing path and Intercept indicates that I
+    // should not forward the packet.
+    else if (!signal Intercept.forward[collectid](msg, 
+						  call Packet.getPayload(msg, call Packet.payloadLength(msg)), 
+						  call Packet.payloadLength(msg)))
+      return msg;
+    else {
+      dbg("Route", "Forwarding packet from %hu.\n", getHeader(msg)->origin);
+      return forward(msg);
+    }
+  }
+
+  event message_t* 
+  SubSnoop.receive(message_t* msg, void *payload, uint8_t len) {
+    // Check for the pull bit (P) [TEP123] and act accordingly.  This
+    // check is made for all packets, not just ones addressed to us.
+    if (call CtpPacket.option(msg, CTP_OPT_PULL)) {
+      call CtpInfo.triggerRouteUpdate();
+    }
+
+    return signal Snoop.receive[call CtpPacket.getType(msg)] 
+      (msg, payload + sizeof(ctp_data_header_t), 
+       len - sizeof(ctp_data_header_t));
+  }
+  
+  event void RetxmitTimer.fired() {
+    clearState(SENDING);
+    dbg("FHangBug", "%s posted sendTask.\n", __FUNCTION__);
+    post sendTask();
+  }
+
+  command bool CtpCongestion.isCongested() {
+    return FALSE;
+  }
+
+  command void CtpCongestion.setClientCongested(bool congested) {
+    // Do not respond to congestion.
+  }
+  
+  /* signalled when this neighbor is evicted from the neighbor table */
+  event void LinkEstimator.evicted(am_addr_t neighbor) {}
+
+  
+  // Packet ADT commands
+  command void Packet.clear(message_t* msg) {
+    call SubPacket.clear(msg);
+  }
+
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return call SubPacket.payloadLength(msg) - sizeof(ctp_data_header_t);
+  }
+
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    call SubPacket.setPayloadLength(msg, len + sizeof(ctp_data_header_t));
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return call SubPacket.maxPayloadLength() - sizeof(ctp_data_header_t);
+  }
+
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    uint8_t* payload = call SubPacket.getPayload(msg, len + sizeof(ctp_data_header_t));
+    if (payload != NULL) {
+      payload += sizeof(ctp_data_header_t);
+    }
+    return payload;
+  }
+
+  // CollectionPacket ADT commands
+  command am_addr_t       CollectionPacket.getOrigin(message_t* msg) {return getHeader(msg)->origin;}
+  command collection_id_t CollectionPacket.getType(message_t* msg) {return getHeader(msg)->type;}
+  command uint8_t         CollectionPacket.getSequenceNumber(message_t* msg) {return getHeader(msg)->originSeqNo;}
+  command void CollectionPacket.setOrigin(message_t* msg, am_addr_t addr) {getHeader(msg)->origin = addr;}
+  command void CollectionPacket.setType(message_t* msg, collection_id_t id) {getHeader(msg)->type = id;}
+  command void CollectionPacket.setSequenceNumber(message_t* msg, uint8_t _seqno) {getHeader(msg)->originSeqNo = _seqno;}
+
+  // CtpPacket ADT commands
+  command uint8_t       CtpPacket.getType(message_t* msg) {return getHeader(msg)->type;}
+  command am_addr_t     CtpPacket.getOrigin(message_t* msg) {return getHeader(msg)->origin;}
+  command uint16_t      CtpPacket.getEtx(message_t* msg) {return getHeader(msg)->etx;}
+  command uint8_t       CtpPacket.getSequenceNumber(message_t* msg) {return getHeader(msg)->originSeqNo;}
+  command uint8_t       CtpPacket.getThl(message_t* msg) {return getHeader(msg)->thl;}
+  command void CtpPacket.setThl(message_t* msg, uint8_t thl) {getHeader(msg)->thl = thl;}
+  command void CtpPacket.setOrigin(message_t* msg, am_addr_t addr) {getHeader(msg)->origin = addr;}
+  command void CtpPacket.setType(message_t* msg, uint8_t id) {getHeader(msg)->type = id;}
+  command void CtpPacket.setEtx(message_t* msg, uint16_t e) {getHeader(msg)->etx = e;}
+  command void CtpPacket.setSequenceNumber(message_t* msg, uint8_t _seqno) {getHeader(msg)->originSeqNo = _seqno;}
+  command bool CtpPacket.option(message_t* msg, ctp_options_t opt) {
+    return ((getHeader(msg)->options & opt) == opt) ? TRUE : FALSE;
+  }
+  command void CtpPacket.setOption(message_t* msg, ctp_options_t opt) {
+    getHeader(msg)->options |= opt;
+  }
+  command void CtpPacket.clearOption(message_t* msg, ctp_options_t opt) {
+    getHeader(msg)->options &= ~opt;
+  }
+
+
+  // A CTP packet ID is based on the origin and the THL field, to
+  // implement duplicate suppression as described in TEP 123.
+  command bool CtpPacket.matchInstance(message_t* m1, message_t* m2) {
+    return (call CtpPacket.getOrigin(m1) == call CtpPacket.getOrigin(m2) &&
+	    call CtpPacket.getSequenceNumber(m1) == call CtpPacket.getSequenceNumber(m2) &&
+	    call CtpPacket.getThl(m1) == call CtpPacket.getThl(m2) &&
+	    call CtpPacket.getType(m1) == call CtpPacket.getType(m2));
+  }
+
+  command bool CtpPacket.matchPacket(message_t* m1, message_t* m2) {
+    return (call CtpPacket.getOrigin(m1) == call CtpPacket.getOrigin(m2) &&
+	    call CtpPacket.getSequenceNumber(m1) == call CtpPacket.getSequenceNumber(m2) &&
+	    call CtpPacket.getType(m1) == call CtpPacket.getType(m2));
+  }
+
+
+  void clearState(uint8_t state) {
+    forwardingState = forwardingState & ~state;
+  }
+  bool hasState(uint8_t state) {
+    return forwardingState & state;
+  }
+  void setState(uint8_t state) {
+    forwardingState = forwardingState | state;
+  }
+  
+  /******** Defaults. **************/
+   
+  default event void
+  Send.sendDone[uint8_t client](message_t *msg, error_t error) {
+  }
+
+  default event bool
+  Intercept.forward[collection_id_t collectid](message_t* msg, void* payload, 
+                                               uint8_t len) {
+    return TRUE;
+  }
+
+  default event message_t *
+  Receive.receive[collection_id_t collectid](message_t *msg, void *payload,
+                                             uint8_t len) {
+    return msg;
+  }
+
+  default event message_t *
+  Snoop.receive[collection_id_t collectid](message_t *msg, void *payload,
+                                           uint8_t len) {
+    return msg;
+  }
+
+  default command collection_id_t CollectionId.fetch[uint8_t client]() {
+    return 0;
+  }
+  
+  /* Default implementations for CollectionDebug calls.
+   * These allow CollectionDebug not to be wired to anything if debugging
+   * is not desired. */
+  
+  default command error_t CollectionDebug.logEvent(uint8_t type) {
+    return SUCCESS;
+  }
+  default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) {
+    return SUCCESS;
+  }
+  default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) {
+    return SUCCESS;
+  }
+  default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) {
+    return SUCCESS;
+  }
+  default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) {
+    return SUCCESS;
+  }
+   
+}
+
diff --git a/tos/lib/net/ctp/CtpInfo.nc b/tos/lib/net/ctp/CtpInfo.nc
new file mode 100644
index 00000000..923c55d5
--- /dev/null
+++ b/tos/lib/net/ctp/CtpInfo.nc
@@ -0,0 +1,99 @@
+/* $Id: CtpInfo.nc,v 1.8 2010-06-29 22:07:49 scipio Exp $ */
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ *  @author Rodrigo Fonseca
+ *  @author Philip Levis
+ *  @date   $Date: 2010-06-29 22:07:49 $
+ *  @see Net2-WG
+ */
+
+#include "AM.h"
+
+interface CtpInfo {
+
+  /**
+   * Get the parent of the node in the tree.  The pointer is allocated
+   * by the caller.  If the parent is invalid, return FAIL.  The
+   * caller MUST NOT use the value in parent if the return is not
+   * SUCCESS.
+   */
+  
+  command error_t getParent(am_addr_t* parent);
+  
+  /**
+   * Get the ETX for the current path to the root through the current
+   * parent. Sets etx argument to ETX*10.  The pointer is allocated by
+   * the caller.  If the parent is invalid, return FAIL (no info).
+   * The caller MUST NOT use the value in parent if the return is not
+   * SUCCESS. Calling getEtx at the root will set the etx argument to
+   * 0.
+   */
+  
+  command error_t getEtx(uint16_t* etx);
+
+  /**
+   * This informs the routing engine that sending a beacon soon is
+   * advisable, e.g., in response to a pull bit.
+   */
+  
+  command void triggerRouteUpdate();
+
+  /**
+   * This informs the routing engine that sending a beacon as soon
+   * as possible is advisable, e.g., due to queue overflow or
+   * a detected loop.
+   */
+  command void triggerImmediateRouteUpdate();
+
+  /** 
+   * Tell the routing engine it might want to recompute its routes.
+   */
+  command void recomputeRoutes();
+
+  /**
+   * Informs the routing engine that a neighbor is congested
+   */
+  command void setNeighborCongested(am_addr_t n, bool congested);
+
+  /**
+   *  Returns the currently known state about a neighbor's congestion state
+   */
+  command bool isNeighborCongested(am_addr_t n);
+
+  command uint8_t numNeighbors();
+  command uint16_t getNeighborLinkQuality(uint8_t n);
+  command uint16_t getNeighborRouteQuality(uint8_t n);
+  command am_addr_t getNeighborAddr(uint8_t n);
+}
diff --git a/tos/lib/net/ctp/CtpP.nc b/tos/lib/net/ctp/CtpP.nc
new file mode 100644
index 00000000..215adee5
--- /dev/null
+++ b/tos/lib/net/ctp/CtpP.nc
@@ -0,0 +1,219 @@
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Ctp.h"
+
+/**
+ * A data collection service that uses a tree routing protocol
+ * to deliver data to collection roots, following TEP 119.
+ *
+ * @author Rodrigo Fonseca
+ * @author Omprakash Gnawali
+ * @author Kyle Jamieson
+ * @author Philip Levis
+ */
+
+
+configuration CtpP {
+  provides {
+    interface StdControl;
+    interface Send[uint8_t client];
+    interface Receive[collection_id_t id];
+    interface Receive as Snoop[collection_id_t];
+    interface Intercept[collection_id_t id];
+
+    interface Packet;
+    interface CollectionPacket;
+    interface CtpPacket;
+
+    interface CtpInfo;
+    interface LinkEstimator;
+    interface CtpCongestion;
+    interface RootControl;    
+  }
+
+  uses {
+    interface CollectionId[uint8_t client];
+    interface CollectionDebug;
+  }
+}
+
+implementation {
+  enum {
+    CLIENT_COUNT = uniqueCount(UQ_CTP_CLIENT),
+    FORWARD_COUNT = 12,
+    TREE_ROUTING_TABLE_SIZE = 10,
+    QUEUE_SIZE = CLIENT_COUNT + FORWARD_COUNT,
+    CACHE_SIZE = 4,
+  };
+
+  components ActiveMessageC;
+  components new CtpForwardingEngineP() as Forwarder;
+  components MainC, LedsC;
+  
+  Send = Forwarder;
+  StdControl = Forwarder;
+  Receive = Forwarder.Receive;
+  Snoop = Forwarder.Snoop;
+  Intercept = Forwarder;
+  Packet = Forwarder;
+  CollectionId = Forwarder;
+  CollectionPacket = Forwarder;
+  CtpPacket = Forwarder;
+  CtpCongestion = Forwarder;
+  
+  components new PoolC(message_t, FORWARD_COUNT) as MessagePoolP;
+  components new PoolC(fe_queue_entry_t, FORWARD_COUNT) as QEntryPoolP;
+  Forwarder.QEntryPool -> QEntryPoolP;
+  Forwarder.MessagePool -> MessagePoolP;
+
+  components new QueueC(fe_queue_entry_t*, QUEUE_SIZE) as SendQueueP;
+  Forwarder.SendQueue -> SendQueueP;
+
+  components new LruCtpMsgCacheC(CACHE_SIZE) as SentCacheP;
+  Forwarder.SentCache -> SentCacheP;
+
+  components new TimerMilliC() as RoutingBeaconTimer;
+  components new TimerMilliC() as RouteUpdateTimer;
+  components LinkEstimatorP as Estimator;
+  Forwarder.LinkEstimator -> Estimator;
+
+  components new AMSenderC(AM_CTP_DATA);
+  components new AMReceiverC(AM_CTP_DATA);
+  components new AMSnooperC(AM_CTP_DATA);
+
+  components new CtpRoutingEngineP(TREE_ROUTING_TABLE_SIZE, 128, 512000) as Router;
+
+  StdControl = Router;
+  StdControl = Estimator;
+  RootControl = Router;
+  MainC.SoftwareInit -> Router;
+  Router.BeaconSend -> Estimator.Send;
+  Router.BeaconReceive -> Estimator.Receive;
+  Router.LinkEstimator -> Estimator.LinkEstimator;
+
+  Router.CompareBit -> Estimator.CompareBit;
+
+  Router.AMPacket -> ActiveMessageC;
+  Router.RadioControl -> ActiveMessageC;
+  Router.BeaconTimer -> RoutingBeaconTimer;
+  Router.RouteTimer -> RouteUpdateTimer;
+  Router.CollectionDebug = CollectionDebug;
+  Forwarder.CollectionDebug = CollectionDebug;
+  Forwarder.CtpInfo -> Router;
+  Router.CtpCongestion -> Forwarder;
+  CtpInfo = Router;
+
+  
+  components new TimerMilliC() as RetxmitTimer;
+  Forwarder.RetxmitTimer -> RetxmitTimer;
+
+  components RandomC;
+  Router.Random -> RandomC;
+  Forwarder.Random -> RandomC;
+
+  MainC.SoftwareInit -> Forwarder;
+  Forwarder.SubSend -> AMSenderC;
+  Forwarder.SubReceive -> AMReceiverC;
+  Forwarder.SubSnoop -> AMSnooperC;
+  Forwarder.SubPacket -> AMSenderC;
+  Forwarder.RootControl -> Router;
+  Forwarder.UnicastNameFreeRouting -> Router.Routing;
+  Forwarder.RadioControl -> ActiveMessageC;
+  Forwarder.PacketAcknowledgements -> AMSenderC.Acks;
+  Forwarder.AMPacket -> AMSenderC;
+  Forwarder.Leds -> LedsC;
+  
+  components new AMSenderC(AM_CTP_ROUTING) as SendControl;
+  components new AMReceiverC(AM_CTP_ROUTING) as ReceiveControl;
+
+  LinkEstimator = Estimator;
+  
+  Estimator.Random -> RandomC;
+
+  Estimator.AMSend -> SendControl;
+  Estimator.SubReceive -> ReceiveControl;
+  Estimator.SubPacket -> SendControl;
+  Estimator.SubAMPacket -> SendControl;
+
+#if defined(PLATFORM_TELOSB) || defined(PLATFORM_MICAZ)
+#ifndef TOSSIM
+  components CC2420ActiveMessageC as PlatformActiveMessageC;
+#else
+  components DummyActiveMessageP as PlatformActiveMessageC;
+#endif
+#elif defined (PLATFORM_MICA2) || defined (PLATFORM_MICA2DOT)
+  components CC1000ActiveMessageC as PlatformActiveMessageC;
+#elif defined(PLATFORM_EYESIFXV1) || defined(PLATFORM_EYESIFXV2)
+  components WhiteBitAccessorC as PlatformActiveMessageC;    
+#else
+  components DummyActiveMessageP as PlatformActiveMessageC;
+#endif
+
+  Estimator.LinkPacketMetadata -> PlatformActiveMessageC;
+
+  // eventually
+  //  Estimator.LinkPacketMetadata -> ActiveMessageC;
+
+  MainC.SoftwareInit -> Estimator;
+}
diff --git a/tos/lib/net/ctp/CtpPacket.nc b/tos/lib/net/ctp/CtpPacket.nc
new file mode 100644
index 00000000..45a95ab8
--- /dev/null
+++ b/tos/lib/net/ctp/CtpPacket.nc
@@ -0,0 +1,71 @@
+/* $Id: CtpPacket.nc,v 1.5 2007-11-28 04:42:52 rincon Exp $ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  ADT for CTP data frames.
+ *
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @date   $Date: 2007-11-28 04:42:52 $
+ */
+
+#include <AM.h>
+#include "Ctp.h"
+   
+interface CtpPacket {
+  // Sets the given options bit.
+  command void          setOption(message_t* msg, ctp_options_t option);
+
+  // Clears the given options bit.
+  command void          clearOption(message_t* msg, ctp_options_t option);
+
+  // Returns TRUE iff all of the given options bits are set.
+  command bool          option(message_t* msg, ctp_options_t opt);
+
+  command uint8_t       getThl(message_t* msg);
+  command void          setThl(message_t* msg, uint8_t thl);
+
+  command uint16_t      getEtx(message_t* msg);
+  command void          setEtx(message_t* msg, uint16_t etx);
+
+  command am_addr_t     getOrigin(message_t* msg);
+  command void          setOrigin(message_t* msg, am_addr_t addr);
+
+  command uint8_t       getSequenceNumber(message_t* msg);
+  command void          setSequenceNumber(message_t* msg, uint8_t seqno);
+
+  command uint8_t       getType(message_t* msg);
+  command void          setType(message_t* msg, uint8_t id);
+
+  command bool          matchInstance(message_t* m1, message_t* m2);
+  command bool          matchPacket(message_t* m1, message_t* m2);
+}
diff --git a/tos/lib/net/ctp/CtpRoutingEngineP.nc b/tos/lib/net/ctp/CtpRoutingEngineP.nc
new file mode 100644
index 00000000..b46cd8b9
--- /dev/null
+++ b/tos/lib/net/ctp/CtpRoutingEngineP.nc
@@ -0,0 +1,828 @@
+#include <Timer.h>
+#include <TreeRouting.h>
+#include <CollectionDebugMsg.h>
+/* $Id: CtpRoutingEngineP.nc,v 1.25 2010-06-29 22:07:49 scipio Exp $ */
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** 
+ *  The TreeRoutingEngine is responsible for computing the routes for
+ *  collection.  It builds a set of trees rooted at specific nodes (roots) and
+ *  maintains these trees using information provided by the link estimator on
+ *  the quality of one hop links.
+ * 
+ *  <p>Each node is part of only one tree at any given time, but there is no
+ *  difference from the node's point of view of which tree it is part. In other
+ *  words, a message is sent towards <i>a</i> root, but which one is not
+ *  specified. It is assumed that the roots will work together to have all data
+ *  aggregated later if need be.  The tree routing engine's responsibility is
+ *  for each node to find the path with the least number of transmissions to
+ *  any one root.
+ *
+ *  <p>The tree is proactively maintained by periodic beacons sent by each
+ *  node. These beacons are jittered in time to prevent synchronizations in the
+ *  network. All nodes maintain the same <i>average</i> beacon sending rate
+ *  (defined by BEACON_INTERVAL +- 50%). The beacon contains the node's parent,
+ *  the current hopcount, and the cumulative path quality metric. The metric is
+ *  defined as the parent's metric plus the bidirectional quality of the link
+ *  between the current node and its parent.  The metric represents the
+ *  expected number of transmissions along the path to the root, and is 0 by
+ *  definition at the root.
+ * 
+ *  <p>Every time a node receives an update from a neighbor it records the
+ *  information if the node is part of the neighbor table. The neighbor table
+ *  keeps the best candidates for being parents i.e., the nodes with the best
+ *  path metric. The neighbor table does not store the full path metric,
+ *  though. It stores the parent's path metric, and the link quality to the
+ *  parent is only added when the information is needed: (i) when choosing a
+ *  parent and (ii) when choosing a route. The nodes in the neighbor table are
+ *  a subset of the nodes in the link estimator table, as a node is not
+ *  admitted in the neighbor table with an estimate of infinity.
+ * 
+ *  <p>There are two uses for the neighbor table, as mentioned above. The first
+ *  one is to select a parent. The parent is just the neighbor with the best
+ *  path metric. It serves to define the node's own path metric and hopcount,
+ *  and the set of child-parent links is what defines the tree. In a sense the
+ *  tree is defined to form a coherent propagation substrate for the path
+ *  metrics. The parent is (re)-selected periodically, immediately before a
+ *  node sends its own beacon, in the updateRouteTask.
+ *  
+ *  <p>The second use is to actually choose a next hop towards any root at
+ *  message forwarding time.  This need not be the current parent, even though
+ *  it is currently implemented as such.
+ *
+ *  <p>The operation of the routing engine has two main tasks and one main
+ *  event: updateRouteTask is called periodically and chooses a new parent;
+ *  sendBeaconTask broadcasts the current route information to the neighbors.
+ *  The main event is the receiving of a neighbor's beacon, which updates the
+ *  neighbor table.
+ *  
+ *  <p> The interface with the ForwardingEngine occurs through the nextHop()
+ *  call.
+ * 
+ *  <p> Any node can become a root, and routed messages from a subset of the
+ *  network will be routed towards it. The RootControl interface allows
+ *  setting, unsetting, and querying the root state of a node. By convention,
+ *  when a node is root its hopcount and metric are 0, and the parent is
+ *  itself. A root always has a valid route, to itself.
+ *
+ *  @author Rodrigo Fonseca
+ *  @author Philip Levis (added trickle-like updates)
+ *  Acknowledgment: based on MintRoute, MultiHopLQI, BVR tree construction, Berkeley's MTree
+ *                           
+ *  @date   $Date: 2010-06-29 22:07:49 $
+ *  @see Net2-WG
+ */
+
+generic module CtpRoutingEngineP(uint8_t routingTableSize, uint32_t minInterval, uint32_t maxInterval) {
+    provides {
+        interface UnicastNameFreeRouting as Routing;
+        interface RootControl;
+        interface CtpInfo;
+        interface StdControl;
+        interface CtpRoutingPacket;
+        interface Init;
+    } 
+    uses {
+        interface AMSend as BeaconSend;
+        interface Receive as BeaconReceive;
+        interface LinkEstimator;
+        interface AMPacket;
+        interface SplitControl as RadioControl;
+        interface Timer<TMilli> as BeaconTimer;
+        interface Timer<TMilli> as RouteTimer;
+        interface Random;
+        interface CollectionDebug;
+        interface CtpCongestion;
+
+	interface CompareBit;
+
+    }
+}
+
+
+implementation {
+
+    bool ECNOff = TRUE;
+
+    /* Keeps track of whether the radio is on. No sense updating or sending
+     * beacons if radio is off */
+    bool radioOn = FALSE;
+    /* Controls whether the node's periodic timer will fire. The node will not
+     * send any beacon, and will not update the route. Start and stop control this. */
+    bool running = FALSE;
+    /* Guards the beacon buffer: only one beacon being sent at a time */
+    bool sending = FALSE;
+
+    /* Tells updateNeighbor that the parent was just evicted.*/ 
+    bool justEvicted = FALSE;
+
+    route_info_t routeInfo;
+    bool state_is_root;
+    am_addr_t my_ll_addr;
+
+    message_t beaconMsgBuffer;
+    ctp_routing_header_t* beaconMsg;
+
+    /* routing table -- routing info about neighbors */
+    routing_table_entry routingTable[routingTableSize];
+    uint8_t routingTableActive;
+
+    /* statistics */
+    uint32_t parentChanges;
+    /* end statistics */
+
+    // forward declarations
+    void routingTableInit();
+    uint8_t routingTableFind(am_addr_t);
+    error_t routingTableUpdateEntry(am_addr_t, am_addr_t , uint16_t);
+    error_t routingTableEvict(am_addr_t neighbor);
+
+
+
+  /* 
+     For each interval t, you set a timer to fire between t/2 and t
+     (chooseAdvertiseTime), and you wait until t (remainingInterval). Once
+     you are at t, you double the interval (decayInterval) if you haven't
+     reached the max. For reasons such as topological inconsistency, you
+     reset the timer to a small value (resetInterval).
+  */
+
+    uint32_t currentInterval = minInterval;
+    uint32_t t; 
+    bool tHasPassed;
+
+    void chooseAdvertiseTime() {
+       t = currentInterval;
+       t /= 2;
+       t += call Random.rand32() % t;
+       tHasPassed = FALSE;
+       call BeaconTimer.startOneShot(t);
+    }
+
+    void resetInterval() {
+      currentInterval = minInterval;
+      chooseAdvertiseTime();
+    }
+
+    void decayInterval() {
+        currentInterval *= 2;
+        if (currentInterval > maxInterval) {
+          currentInterval = maxInterval;
+        }
+      chooseAdvertiseTime();
+    }
+
+    void remainingInterval() {
+       uint32_t remaining = currentInterval;
+       remaining -= t;
+       tHasPassed = TRUE;
+       call BeaconTimer.startOneShot(remaining);
+    }
+
+    command error_t Init.init() {
+        uint8_t maxLength;
+        radioOn = FALSE;
+        running = FALSE;
+        parentChanges = 0;
+        state_is_root = 0;
+        routeInfoInit(&routeInfo);
+        routingTableInit();
+        beaconMsg = call BeaconSend.getPayload(&beaconMsgBuffer, call BeaconSend.maxPayloadLength());
+        maxLength = call BeaconSend.maxPayloadLength();
+        dbg("TreeRoutingCtl","TreeRouting initialized. (used payload:%d max payload:%d!\n", 
+              sizeof(beaconMsg), maxLength);
+        return SUCCESS;
+    }
+
+    command error_t StdControl.start() {
+      my_ll_addr = call AMPacket.address();
+      //start will (re)start the sending of messages
+      if (!running) {
+	running = TRUE;
+	resetInterval();
+	call RouteTimer.startPeriodic(BEACON_INTERVAL);
+	dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn);
+      }     
+      return SUCCESS;
+    }
+
+    command error_t StdControl.stop() {
+        running = FALSE;
+        dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn);
+        return SUCCESS;
+    } 
+
+    event void RadioControl.startDone(error_t error) {
+        radioOn = TRUE;
+        dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn);
+        if (running) {
+            uint16_t nextInt;
+            nextInt = call Random.rand16() % BEACON_INTERVAL;
+            nextInt += BEACON_INTERVAL >> 1;
+        }
+    } 
+
+    event void RadioControl.stopDone(error_t error) {
+        radioOn = FALSE;
+        dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn);
+    }
+
+    /* Is this quality measure better than the minimum threshold? */
+    // Implemented assuming quality is EETX
+    bool passLinkEtxThreshold(uint16_t etx) {
+        return (etx < ETX_THRESHOLD);
+    }
+
+
+    /* updates the routing information, using the info that has been received
+     * from neighbor beacons. Two things can cause this info to change: 
+     * neighbor beacons, changes in link estimates, including neighbor eviction */
+    task void updateRouteTask() {
+        uint8_t i;
+        routing_table_entry* entry;
+        routing_table_entry* best;
+        uint16_t minEtx;
+        uint16_t currentEtx;
+        uint16_t linkEtx, pathEtx;
+
+        if (state_is_root)
+            return;
+       
+        best = NULL;
+        /* Minimum etx found among neighbors, initially infinity */
+        minEtx = MAX_METRIC;
+        /* Metric through current parent, initially infinity */
+        currentEtx = MAX_METRIC;
+
+        dbg("TreeRouting","%s\n",__FUNCTION__);
+
+        /* Find best path in table, other than our current */
+        for (i = 0; i < routingTableActive; i++) {
+            entry = &routingTable[i];
+
+            // Avoid bad entries and 1-hop loops
+            if (entry->info.parent == INVALID_ADDR || entry->info.parent == my_ll_addr) {
+              dbg("TreeRouting", 
+                  "routingTable[%d]: neighbor: [id: %d parent: %d  etx: NO ROUTE]\n",  
+                  i, entry->neighbor, entry->info.parent);
+              continue;
+            }
+
+            linkEtx = call LinkEstimator.getLinkQuality(entry->neighbor);
+            dbg("TreeRouting", 
+                "routingTable[%d]: neighbor: [id: %d parent: %d etx: %d retx: %d]\n",  
+                i, entry->neighbor, entry->info.parent, linkEtx, entry->info.etx);
+            pathEtx = linkEtx + entry->info.etx;
+            /* Operations specific to the current parent */
+            if (entry->neighbor == routeInfo.parent) {
+                dbg("TreeRouting", "   already parent.\n");
+                currentEtx = pathEtx;
+                /* update routeInfo with parent's current info */
+		routeInfo.etx = entry->info.etx;
+		routeInfo.congested = entry->info.congested;
+                continue;
+            }
+            /* Ignore links that are congested */
+            if (entry->info.congested)
+                continue;
+            /* Ignore links that are bad */
+            if (!passLinkEtxThreshold(linkEtx)) {
+              dbg("TreeRouting", "   did not pass threshold.\n");
+              continue;
+            }
+            
+            if (pathEtx < minEtx) {
+	      dbg("TreeRouting", "   best is %d, setting to %d\n", pathEtx, entry->neighbor);
+                minEtx = pathEtx;
+                best = entry;
+            }  
+        }
+
+        //call CollectionDebug.logEventDbg(NET_C_DBG_3, routeInfo.parent, currentEtx, minEtx);  
+
+        /* Now choose between the current parent and the best neighbor */
+        /* Requires that: 
+            1. at least another neighbor was found with ok quality and not congested
+            2. the current parent is congested and the other best route is at least as good
+            3. or the current parent is not congested and the neighbor quality is better by 
+               the PARENT_SWITCH_THRESHOLD.
+          Note: if our parent is congested, in order to avoid forming loops, we try to select
+                a node which is not a descendent of our parent. routeInfo.ext is our parent's
+                etx. Any descendent will be at least that + 10 (1 hop), so we restrict the 
+                selection to be less than that.
+        */
+        if (minEtx != MAX_METRIC) {
+            if (currentEtx == MAX_METRIC ||
+                (routeInfo.congested && (minEtx < (routeInfo.etx + 10))) ||
+                minEtx + PARENT_SWITCH_THRESHOLD < currentEtx) {
+                // routeInfo.metric will not store the composed metric.
+                // since the linkMetric may change, we will compose whenever
+                // we need it: i. when choosing a parent (here); 
+                //            ii. when choosing a next hop
+                parentChanges++;
+
+                dbg("TreeRouting","Changed parent. from %d to %d\n", routeInfo.parent, best->neighbor);
+                call CollectionDebug.logEventDbg(NET_C_TREE_NEW_PARENT, best->neighbor, best->info.etx, minEtx);
+                call LinkEstimator.unpinNeighbor(routeInfo.parent);
+                call LinkEstimator.pinNeighbor(best->neighbor);
+                call LinkEstimator.clearDLQ(best->neighbor);
+
+		routeInfo.parent = best->neighbor;
+		routeInfo.etx = best->info.etx;
+		routeInfo.congested = best->info.congested;
+		if (currentEtx - minEtx > 20) {
+		  call CtpInfo.triggerRouteUpdate();
+		}
+            }
+        }    
+
+        /* Finally, tell people what happened:  */
+        /* We can only loose a route to a parent if it has been evicted. If it hasn't 
+         * been just evicted then we already did not have a route */
+        if (justEvicted && routeInfo.parent == INVALID_ADDR) 
+            signal Routing.noRoute();
+        /* On the other hand, if we didn't have a parent (no currentEtx) and now we
+         * do, then we signal route found. The exception is if we just evicted the 
+         * parent and immediately found a replacement route: we don't signal in this 
+         * case */
+        else if (!justEvicted && 
+                  currentEtx == MAX_METRIC &&
+                  minEtx != MAX_METRIC)
+            signal Routing.routeFound();
+        justEvicted = FALSE; 
+    }
+
+    
+
+    /* send a beacon advertising this node's routeInfo */
+    // only posted if running and radioOn
+    task void sendBeaconTask() {
+        error_t eval;
+        if (sending) {
+            return;
+        }
+
+        beaconMsg->options = 0;
+
+        /* Congestion notification: am I congested? */
+        if (call CtpCongestion.isCongested()) {
+            beaconMsg->options |= CTP_OPT_ECN;
+        }
+
+        beaconMsg->parent = routeInfo.parent;
+        if (state_is_root) {
+            beaconMsg->etx = routeInfo.etx;
+        }
+        else if (routeInfo.parent == INVALID_ADDR) {
+            beaconMsg->etx = routeInfo.etx;
+            beaconMsg->options |= CTP_OPT_PULL;
+        } else {
+            beaconMsg->etx = routeInfo.etx + call LinkEstimator.getLinkQuality(routeInfo.parent);
+        }
+
+        dbg("TreeRouting", "%s parent: %d etx: %d\n",
+                  __FUNCTION__,
+                  beaconMsg->parent, 
+                  beaconMsg->etx);
+        call CollectionDebug.logEventRoute(NET_C_TREE_SENT_BEACON, beaconMsg->parent, 0, beaconMsg->etx);
+
+        eval = call BeaconSend.send(AM_BROADCAST_ADDR, 
+                                    &beaconMsgBuffer, 
+                                    sizeof(ctp_routing_header_t));
+        if (eval == SUCCESS) {
+            sending = TRUE;
+        } else if (eval == EOFF) {
+            radioOn = FALSE;
+            dbg("TreeRoutingCtl","%s running: %d radioOn: %d\n", __FUNCTION__, running, radioOn);
+        }
+    }
+
+    event void BeaconSend.sendDone(message_t* msg, error_t error) {
+        if ((msg != &beaconMsgBuffer) || !sending) {
+            //something smells bad around here
+            return;
+        }
+        sending = FALSE;
+    }
+
+    event void RouteTimer.fired() {
+      if (radioOn && running) {
+         post updateRouteTask();
+      }
+    }
+      
+    event void BeaconTimer.fired() {
+      if (radioOn && running) {
+        if (!tHasPassed) {
+          post updateRouteTask(); //always send the most up to date info
+          post sendBeaconTask();
+          dbg("RoutingTimer", "Beacon timer fired at %s\n", sim_time_string());
+          remainingInterval();
+        }
+        else {
+          decayInterval();
+        }
+      }
+    }
+
+
+    ctp_routing_header_t* getHeader(message_t* ONE m) {
+      return (ctp_routing_header_t*)call BeaconSend.getPayload(m, call BeaconSend.maxPayloadLength());
+    }
+    
+    
+    /* Handle the receiving of beacon messages from the neighbors. We update the
+     * table, but wait for the next route update to choose a new parent */
+    event message_t* BeaconReceive.receive(message_t* msg, void* payload, uint8_t len) {
+        am_addr_t from;
+        ctp_routing_header_t* rcvBeacon;
+        bool congested;
+
+        // Received a beacon, but it's not from us.
+        if (len != sizeof(ctp_routing_header_t)) {
+          dbg("LITest", "%s, received beacon of size %hhu, expected %i\n",
+                     __FUNCTION__, 
+                     len,
+                     (int)sizeof(ctp_routing_header_t));
+              
+          return msg;
+        }
+        
+        //need to get the am_addr_t of the source
+        from = call AMPacket.source(msg);
+        rcvBeacon = (ctp_routing_header_t*)payload;
+
+        congested = call CtpRoutingPacket.getOption(msg, CTP_OPT_ECN);
+
+        dbg("TreeRouting","%s from: %d  [ parent: %d etx: %d]\n",
+            __FUNCTION__, from, 
+            rcvBeacon->parent, rcvBeacon->etx);
+
+        //update neighbor table
+        if (rcvBeacon->parent != INVALID_ADDR) {
+
+            /* If this node is a root, request a forced insert in the link
+             * estimator table and pin the node. */
+            if (rcvBeacon->etx == 0) {
+                dbg("TreeRouting","from a root, inserting if not in table\n");
+                call LinkEstimator.insertNeighbor(from);
+                call LinkEstimator.pinNeighbor(from);
+            }
+            //TODO: also, if better than my current parent's path etx, insert
+
+            routingTableUpdateEntry(from, rcvBeacon->parent, rcvBeacon->etx);
+            call CtpInfo.setNeighborCongested(from, congested);
+        }
+
+        if (call CtpRoutingPacket.getOption(msg, CTP_OPT_PULL)) {
+              resetInterval();
+        }
+        return msg;
+    }
+
+
+    /* Signals that a neighbor is no longer reachable. need special care if
+     * that neighbor is our parent */
+    event void LinkEstimator.evicted(am_addr_t neighbor) {
+        routingTableEvict(neighbor);
+        dbg("TreeRouting","%s\n",__FUNCTION__);
+        if (routeInfo.parent == neighbor) {
+            routeInfoInit(&routeInfo);
+            justEvicted = TRUE;
+            post updateRouteTask();
+        }
+    }
+
+    /* Interface UnicastNameFreeRouting */
+    /* Simple implementation: return the current routeInfo */
+    command am_addr_t Routing.nextHop() {
+        return routeInfo.parent;    
+    }
+    command bool Routing.hasRoute() {
+        return (routeInfo.parent != INVALID_ADDR);
+    }
+   
+    /* CtpInfo interface */
+    command error_t CtpInfo.getParent(am_addr_t* parent) {
+        if (parent == NULL) 
+            return FAIL;
+        if (routeInfo.parent == INVALID_ADDR)    
+            return FAIL;
+        *parent = routeInfo.parent;
+        return SUCCESS;
+    }
+
+    command error_t CtpInfo.getEtx(uint16_t* etx) {
+        if (etx == NULL) 
+            return FAIL;
+        if (routeInfo.parent == INVALID_ADDR)    
+            return FAIL;
+	if (state_is_root == 1) {
+	  *etx = 0;
+	} else {
+	  *etx = routeInfo.etx + call LinkEstimator.getLinkQuality(routeInfo.parent);
+	}
+        return SUCCESS;
+    }
+
+    command void CtpInfo.recomputeRoutes() {
+      post updateRouteTask();
+    }
+
+    command void CtpInfo.triggerRouteUpdate() {
+      resetInterval();
+     }
+
+    command void CtpInfo.triggerImmediateRouteUpdate() {
+      resetInterval();
+    }
+
+    command void CtpInfo.setNeighborCongested(am_addr_t n, bool congested) {
+        uint8_t idx;    
+        if (ECNOff)
+            return;
+        idx = routingTableFind(n);
+        if (idx < routingTableActive) {
+            routingTable[idx].info.congested = congested;
+        }
+        if (routeInfo.congested && !congested) 
+            post updateRouteTask();
+        else if (routeInfo.parent == n && congested) 
+            post updateRouteTask();
+    }
+
+    command bool CtpInfo.isNeighborCongested(am_addr_t n) {
+        uint8_t idx;    
+
+        if (ECNOff) 
+            return FALSE;
+
+        idx = routingTableFind(n);
+        if (idx < routingTableActive) {
+            return routingTable[idx].info.congested;
+        }
+        return FALSE;
+    }
+    
+    /* RootControl interface */
+    /** sets the current node as a root, if not already a root */
+    /*  returns FAIL if it's not possible for some reason      */
+    command error_t RootControl.setRoot() {
+        bool route_found = FALSE;
+        route_found = (routeInfo.parent == INVALID_ADDR);
+	state_is_root = 1;
+	routeInfo.parent = my_ll_addr; //myself
+	routeInfo.etx = 0;
+
+        if (route_found) 
+            signal Routing.routeFound();
+        dbg("TreeRouting","%s I'm a root now!\n",__FUNCTION__);
+        call CollectionDebug.logEventRoute(NET_C_TREE_NEW_PARENT, routeInfo.parent, 0, routeInfo.etx);
+        return SUCCESS;
+    }
+
+    command error_t RootControl.unsetRoot() {
+      state_is_root = 0;
+      routeInfoInit(&routeInfo);
+
+      dbg("TreeRouting","%s I'm not a root now!\n",__FUNCTION__);
+      post updateRouteTask();
+      return SUCCESS;
+    }
+
+    command bool RootControl.isRoot() {
+        return state_is_root;
+    }
+
+    default event void Routing.noRoute() {
+    }
+    
+    default event void Routing.routeFound() {
+    }
+
+
+  /* The link will be recommended for insertion if it is better* than some
+   * link in the routing table that is not our parent.
+   * We are comparing the path quality up to the node, and ignoring the link
+   * quality from us to the node. This is because of a couple of things:
+   *   1. we expect this call only for links with white bit set
+   *   2. we are being optimistic to the nodes in the table, by ignoring the
+   *      1-hop quality to them (which means we are assuming it's 1 as well)
+   *      This actually sets the bar a little higher for replacement
+   *   3. this is faster
+   */
+    event bool CompareBit.shouldInsert(message_t *msg, void* payload, uint8_t len) {
+        
+        bool found = FALSE;
+        uint16_t pathEtx;
+        uint16_t neighEtx;
+        int i;
+        routing_table_entry* entry;
+        ctp_routing_header_t* rcvBeacon;
+
+        if ((call AMPacket.type(msg) != AM_CTP_ROUTING) ||
+            (len != sizeof(ctp_routing_header_t))) 
+            return FALSE;
+
+        /* 1.determine this packet's path quality */
+        rcvBeacon = (ctp_routing_header_t*)payload;
+
+        if (rcvBeacon->parent == INVALID_ADDR)
+            return FALSE;
+        /* the node is a root, recommend insertion! */
+        if (rcvBeacon->etx == 0) {
+            return TRUE;
+        }
+    
+        pathEtx = rcvBeacon->etx; // + linkEtx;
+
+        /* 2. see if we find some neighbor that is worse */
+        for (i = 0; i < routingTableActive && !found; i++) {
+            entry = &routingTable[i];
+            //ignore parent, since we can't replace it
+            if (entry->neighbor == routeInfo.parent)
+                continue;
+            neighEtx = entry->info.etx;
+            found |= (pathEtx < neighEtx); 
+        }
+        return found;
+    }
+
+
+    /************************************************************/
+    /* Routing Table Functions                                  */
+
+    /* The routing table keeps info about neighbor's route_info,
+     * and is used when choosing a parent.
+     * The table is simple: 
+     *   - not fragmented (all entries in 0..routingTableActive)
+     *   - not ordered
+     *   - no replacement: eviction follows the LinkEstimator table
+     */
+
+    void routingTableInit() {
+        routingTableActive = 0;
+    }
+
+    /* Returns the index of parent in the table or
+     * routingTableActive if not found */
+    uint8_t routingTableFind(am_addr_t neighbor) {
+        uint8_t i;
+        if (neighbor == INVALID_ADDR)
+            return routingTableActive;
+        for (i = 0; i < routingTableActive; i++) {
+            if (routingTable[i].neighbor == neighbor)
+                break;
+        }
+        return i;
+    }
+
+
+    error_t routingTableUpdateEntry(am_addr_t from, am_addr_t parent, uint16_t etx)    {
+        uint8_t idx;
+        uint16_t  linkEtx;
+        linkEtx = call LinkEstimator.getLinkQuality(from);
+
+        idx = routingTableFind(from);
+        if (idx == routingTableSize) {
+            //not found and table is full
+            //if (passLinkEtxThreshold(linkEtx))
+                //TODO: add replacement here, replace the worst
+            //}
+            dbg("TreeRouting", "%s FAIL, table full\n", __FUNCTION__);
+            return FAIL;
+        }
+        else if (idx == routingTableActive) {
+            //not found and there is space
+            if (passLinkEtxThreshold(linkEtx)) {
+	      routingTable[idx].neighbor = from;
+	      routingTable[idx].info.parent = parent;
+	      routingTable[idx].info.etx = etx;
+	      routingTable[idx].info.haveHeard = 1;
+	      routingTable[idx].info.congested = FALSE;
+	      routingTableActive++;
+	      dbg("TreeRouting", "%s OK, new entry\n", __FUNCTION__);
+            } else {
+                dbg("TreeRouting", "%s Fail, link quality (%hu) below threshold\n", __FUNCTION__, linkEtx);
+            }
+        } else {
+            //found, just update
+	  routingTable[idx].neighbor = from;
+	  routingTable[idx].info.parent = parent;
+	  routingTable[idx].info.etx = etx;
+	  routingTable[idx].info.haveHeard = 1;
+	  dbg("TreeRouting", "%s OK, updated entry\n", __FUNCTION__);
+        }
+        return SUCCESS;
+    }
+
+    /* if this gets expensive, introduce indirection through an array of pointers */
+    error_t routingTableEvict(am_addr_t neighbor) {
+        uint8_t idx,i;
+        idx = routingTableFind(neighbor);
+        if (idx == routingTableActive) 
+            return FAIL;
+        routingTableActive--;
+        for (i = idx; i < routingTableActive; i++) {
+            routingTable[i] = routingTable[i+1];    
+        } 
+        return SUCCESS; 
+    }
+    /*********** end routing table functions ***************/
+
+    /* Default implementations for CollectionDebug calls.
+     * These allow CollectionDebug not to be wired to anything if debugging
+     * is not desired. */
+
+    default command error_t CollectionDebug.logEvent(uint8_t type) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) {
+        return SUCCESS;
+    }
+    default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t etx) {
+        return SUCCESS;
+    }
+
+    command bool CtpRoutingPacket.getOption(message_t* msg, ctp_options_t opt) {
+      return ((getHeader(msg)->options & opt) == opt) ? TRUE : FALSE;
+    }
+
+    command void CtpRoutingPacket.setOption(message_t* msg, ctp_options_t opt) {
+      getHeader(msg)->options |= opt;
+    }
+
+    command void CtpRoutingPacket.clearOption(message_t* msg, ctp_options_t opt) {
+      getHeader(msg)->options &= ~opt;
+    }
+
+    command void CtpRoutingPacket.clearOptions(message_t* msg) {
+      getHeader(msg)->options = 0;
+    }
+
+    
+    command am_addr_t     CtpRoutingPacket.getParent(message_t* msg) {
+      return getHeader(msg)->parent;
+    }
+    command void          CtpRoutingPacket.setParent(message_t* msg, am_addr_t addr) {
+      getHeader(msg)->parent = addr;
+    }
+    
+    command uint16_t      CtpRoutingPacket.getEtx(message_t* msg) {
+      return getHeader(msg)->etx;
+    }
+    command void          CtpRoutingPacket.setEtx(message_t* msg, uint16_t etx) {
+      getHeader(msg)->etx = etx;
+    }
+
+    command uint8_t CtpInfo.numNeighbors() {
+      return routingTableActive;
+    }
+    command uint16_t CtpInfo.getNeighborLinkQuality(uint8_t n) {
+      return (n < routingTableActive)? call LinkEstimator.getLinkQuality(routingTable[n].neighbor):0xffff;
+    }
+    command uint16_t CtpInfo.getNeighborRouteQuality(uint8_t n) {
+      return (n < routingTableActive)? call LinkEstimator.getLinkQuality(routingTable[n].neighbor) + routingTable[n].info.etx:0xfffff;
+    }
+    command am_addr_t CtpInfo.getNeighborAddr(uint8_t n) {
+      return (n < routingTableActive)? routingTable[n].neighbor:AM_BROADCAST_ADDR;
+    }
+    
+} 
diff --git a/tos/lib/net/ctp/CtpRoutingPacket.nc b/tos/lib/net/ctp/CtpRoutingPacket.nc
new file mode 100644
index 00000000..a8f933a8
--- /dev/null
+++ b/tos/lib/net/ctp/CtpRoutingPacket.nc
@@ -0,0 +1,58 @@
+/* $Id: CtpRoutingPacket.nc,v 1.6 2009-09-21 02:19:42 gnawali Exp $ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  ADT for CTP routing frames.
+ *
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @date   $Date: 2009-09-21 02:19:42 $
+ */
+
+#include <AM.h>
+   
+interface CtpRoutingPacket {
+
+  /* Allow individual options to be read, set, and reset independently */
+  command bool          getOption(message_t* ONE msg, ctp_options_t opt);
+  command void          setOption(message_t* ONE msg, ctp_options_t opt);
+  command void          clearOption(message_t* ONE msg, ctp_options_t opt);
+  
+  /* Clear all options */
+  command void          clearOptions(message_t* ONE msg);
+
+  command am_addr_t     getParent(message_t* ONE msg);
+  command void          setParent(message_t* ONE msg, am_addr_t addr);
+
+  command uint16_t      getEtx(message_t* ONE msg);
+  command void          setEtx(message_t* ONE msg, uint16_t etx);
+}
diff --git a/tos/lib/net/ctp/CtpSenderC.nc b/tos/lib/net/ctp/CtpSenderC.nc
new file mode 100644
index 00000000..2f70dd65
--- /dev/null
+++ b/tos/lib/net/ctp/CtpSenderC.nc
@@ -0,0 +1,58 @@
+/* $Id: CtpSenderC.nc,v 1.4 2006-12-12 18:23:29 vlahan Exp $ */
+/*
+ * Copyright (c) 2006 Massachusetts Institute of Technology (MIT).
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Massachusetts Institute of Technology nor
+ *   the names of its contributors may be used to endorse or promote
+ *   products derived from this software without specific prior written
+ *   permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * MASSACHUSETTS INSITIUTE OF TECHNOLOGY OR ITS CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ * The virtualized collection sender abstraction.
+ *
+ * @author Kyle Jamieson
+ * @author Philip Levis
+ * @date April 25 2006
+ * @see TinyOS Net2-WG
+ */
+
+#include "Collection.h"
+#include "Ctp.h"
+
+generic configuration CtpSenderC(collection_id_t collectid) {
+  provides {
+    interface Send;
+    interface Packet;
+  }
+}
+
+implementation {
+  components new CtpSenderP(collectid, unique(UQ_CTP_CLIENT));
+  Send = CtpSenderP;
+  Packet = CtpSenderP;
+}
diff --git a/tos/lib/net/ctp/CtpSenderP.nc b/tos/lib/net/ctp/CtpSenderP.nc
new file mode 100644
index 00000000..922f47f8
--- /dev/null
+++ b/tos/lib/net/ctp/CtpSenderP.nc
@@ -0,0 +1,51 @@
+/* $Id: CtpSenderP.nc,v 1.4 2006-12-12 18:23:29 vlahan Exp $ */
+/*
+ * Copyright (c) 2006 Massachusetts Institute of Technology (MIT).
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Massachusetts Institute of Technology nor
+ *   the names of its contributors may be used to endorse or promote
+ *   products derived from this software without specific prior written
+ *   permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * MASSACHUSETTS INSITIUTE OF TECHNOLOGY OR ITS CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+#include "Collection.h"
+
+generic configuration CtpSenderP(collection_id_t collectid, uint8_t clientid) {
+  provides {
+    interface Send;
+    interface Packet;
+  }
+}
+
+implementation {
+  components CtpC as Collector;
+  components new CollectionIdP(collectid);
+  
+  Send = Collector.Send[clientid];
+  Packet = Collector.Packet;
+  Collector.CollectionId[clientid] -> CollectionIdP;
+}
diff --git a/tos/lib/net/ctp/DummyActiveMessageP.nc b/tos/lib/net/ctp/DummyActiveMessageP.nc
new file mode 100644
index 00000000..243f497d
--- /dev/null
+++ b/tos/lib/net/ctp/DummyActiveMessageP.nc
@@ -0,0 +1,12 @@
+module DummyActiveMessageP {
+  provides interface LinkPacketMetadata;
+}
+
+implementation
+{
+
+  async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) {
+    return 0;
+  }
+
+}
diff --git a/tos/lib/net/ctp/LruCtpMsgCacheC.nc b/tos/lib/net/ctp/LruCtpMsgCacheC.nc
new file mode 100644
index 00000000..f1f3106e
--- /dev/null
+++ b/tos/lib/net/ctp/LruCtpMsgCacheC.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+  * An LRU cache CTP packet instances, where insertion represents use.
+  *
+  * @author Philip Levis
+  */
+
+generic configuration LruCtpMsgCacheC(uint8_t CACHE_SIZE) {
+    provides interface Cache<message_t*>;
+}
+implementation {
+    components MainC, new LruCtpMsgCacheP(CACHE_SIZE) as CacheP;
+    components CtpP;
+    Cache = CacheP;
+    CacheP.CtpPacket -> CtpP;
+    MainC.SoftwareInit -> CacheP;
+}
diff --git a/tos/lib/net/ctp/LruCtpMsgCacheP.nc b/tos/lib/net/ctp/LruCtpMsgCacheP.nc
new file mode 100644
index 00000000..b4fd8299
--- /dev/null
+++ b/tos/lib/net/ctp/LruCtpMsgCacheP.nc
@@ -0,0 +1,143 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * An LRU cache that stores the signature of a CTP packet instance.
+ * An insert operation indicates "use".  Inserting an element not in
+ * the cache will replace the oldest, and inserting an element already
+ * in the cache will refresh its age.
+ *
+ * @author Philip Levis 
+ */
+
+#include <message.h>
+
+generic module LruCtpMsgCacheP(uint8_t size) {
+    provides {
+      interface Init;
+      interface Cache<message_t*>;
+    }
+    uses {
+      interface CtpPacket;
+    }
+}
+implementation {
+  typedef struct {
+    am_addr_t origin;
+    uint8_t seqno;
+    collection_id_t type;
+    uint8_t thl;
+  } ctp_packet_sig_t;
+  
+  ctp_packet_sig_t cache[size];
+  uint8_t first;
+  uint8_t count;
+
+  command error_t Init.init() {
+    first = 0;
+    count = 0;
+    return SUCCESS;
+  } 
+
+  void printCache() {
+#ifdef TOSSIM
+    int i;
+    dbg("Cache","Cache:");
+    for (i = 0; i < count; i++) {
+      dbg_clear("Cache", " %04x %02x %02x %02x", cache[i].origin, cache[i].seqno, cache[i].type, cache[i].thl);
+      if (i == first)
+	dbg_clear("Cache","*");
+    } 
+    dbg_clear("Cache","\n");
+#endif
+    }
+
+    /* if key is in cache returns the index (offset by first), otherwise returns count */
+  uint8_t lookup(message_t* m) {
+    uint8_t i;
+    uint8_t idx;
+    for (i = 0; i < count; i++) {
+      idx = (i + first) % size;
+      if (call CtpPacket.getOrigin(m)         == cache[idx].origin &&
+	  call CtpPacket.getSequenceNumber(m) == cache[idx].seqno &&
+	  call CtpPacket.getThl(m)            == cache[idx].thl &&
+	  call CtpPacket.getType(m)           == cache[idx].type) {
+	break;
+      }
+    }
+    return i;
+  }
+  
+  /* remove the entry with index i (relative to first) */
+    void remove(uint8_t i) {
+        uint8_t j;
+        if (i >= count) 
+            return;
+        if (i == 0) {
+            //shift all by moving first
+            first = (first + 1) % size;
+        } else {
+            //shift everyone down
+            for (j = i; j < count; j++) {
+	      memcpy(&cache[(j + first) % size], &cache[(j + first + 1) % size], sizeof(ctp_packet_sig_t));
+	    }
+        }
+        count--;
+    }
+
+    command void Cache.insert(message_t* m) {
+        uint8_t i;
+        if (count == size ) {
+            //remove someone. If item not in 
+            //cache, remove the first item.
+            //otherwise remove the item temporarily for
+            //reinsertion. This moves the item up in the
+            //LRU stack.
+	  i = lookup(m);
+	  remove(i % count);
+        }
+        //now count < size
+        cache[(first + count) % size].origin = call CtpPacket.getOrigin(m);
+	cache[(first + count) % size].seqno  = call CtpPacket.getSequenceNumber(m);
+	cache[(first + count) % size].thl    = call CtpPacket.getThl(m);
+	cache[(first + count) % size].type   = call CtpPacket.getType(m);
+        count++;
+    }
+
+    command bool Cache.lookup(message_t* m) {
+        return (lookup(m) < count);
+    }
+
+    command void Cache.flush() {
+      call Init.init(); 
+    }
+
+}
diff --git a/tos/lib/net/ctp/TreeRouting.h b/tos/lib/net/ctp/TreeRouting.h
new file mode 100644
index 00000000..66b44d76
--- /dev/null
+++ b/tos/lib/net/ctp/TreeRouting.h
@@ -0,0 +1,33 @@
+#ifndef _TREE_ROUTING_H
+#define _TREE_ROUTING_H
+
+enum {
+    AM_TREE_ROUTING_CONTROL = 0xCE,
+    BEACON_INTERVAL = 8192, 
+    INVALID_ADDR  = TOS_BCAST_ADDR,
+    ETX_THRESHOLD = 50,      // link quality=20% -> ETX=5 -> Metric=50 
+    PARENT_SWITCH_THRESHOLD = 15,
+    MAX_METRIC = 0xFFFF,
+}; 
+ 
+
+typedef struct {
+  am_addr_t parent;
+  uint16_t etx;
+  bool haveHeard;
+  bool congested;
+} route_info_t;
+
+typedef struct {
+  am_addr_t neighbor;
+  route_info_t info;
+} routing_table_entry;
+
+inline void routeInfoInit(route_info_t *ri) {
+    ri->parent = INVALID_ADDR;
+    ri->etx = 0;
+    ri->haveHeard = 0;
+    ri->congested = FALSE;
+}
+
+#endif
diff --git a/tos/lib/net/dhv/AMDhvC.nc b/tos/lib/net/dhv/AMDhvC.nc
new file mode 100755
index 00000000..34882e87
--- /dev/null
+++ b/tos/lib/net/dhv/AMDhvC.nc
@@ -0,0 +1,44 @@
+/**
+ * Active Message Configuration.
+ *
+ * Define the interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Took the source code from Dip
+ **/
+
+#include <Dhv.h>
+
+configuration AMDhvC {
+  provides interface DhvSend;
+  provides interface DhvReceive as DataReceive;
+  provides interface DhvReceive as VectorReceive;
+  provides interface DhvReceive as SummaryReceive;
+  provides interface DhvReceive as DhvVBitReceive;
+  provides interface DhvReceive as DhvHSumReceive;
+}
+
+implementation {
+  components AMDhvP;
+  components new AMSenderC(AM_DHV) as SendC;
+  components new AMReceiverC(AM_DHV) as ReceiveC;
+
+  AMDhvP.NetAMSend -> SendC.AMSend;
+  AMDhvP.NetReceive -> ReceiveC.Receive;
+
+  components MainC;
+  MainC.SoftwareInit -> AMDhvP.Init;
+  AMDhvP.Boot -> MainC;
+
+
+  DhvSend = AMDhvP.DhvSend;
+  DataReceive = AMDhvP.DhvDataReceive;
+  VectorReceive = AMDhvP.DhvVectorReceive;
+  SummaryReceive = AMDhvP.DhvSummaryReceive;
+  DhvVBitReceive = AMDhvP.DhvVBitReceive;
+  DhvHSumReceive = AMDhvP.DhvHSumReceive;
+
+}
diff --git a/tos/lib/net/dhv/AMDhvP.nc b/tos/lib/net/dhv/AMDhvP.nc
new file mode 100755
index 00000000..98601000
--- /dev/null
+++ b/tos/lib/net/dhv/AMDhvP.nc
@@ -0,0 +1,147 @@
+/**
+ * Active Message Implementation.
+ *
+ * Define the interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV interfaces type and renamed the instances to distinguish from DIP.
+ * @modified 8/28/2008  Took the source code from DIP.
+ **/
+
+module AMDhvP {
+  provides interface Init;
+  provides interface DhvSend;
+  provides interface DhvReceive as DhvDataReceive;
+  provides interface DhvReceive as DhvVectorReceive;
+  provides interface DhvReceive as DhvSummaryReceive;
+  provides interface DhvReceive as DhvHSumReceive;
+  provides interface DhvReceive as DhvVBitReceive;
+
+  uses interface AMSend as NetAMSend;
+  uses interface Receive as NetReceive;
+  uses interface Boot;
+}
+
+implementation {
+  message_t am_msg;
+  uint32_t send_count;
+  bool busy;
+
+  event void Boot.booted() {
+    send_count = 0;
+  }
+
+
+  command error_t Init.init() {
+    busy = FALSE;
+    return SUCCESS;
+  }
+
+  command error_t DhvSend.send(uint8_t len) {
+    error_t err;
+    dhv_msg_t* dmsg;
+    uint8_t type;
+
+    dmsg = (dhv_msg_t *) (&am_msg)->data;
+    type = dmsg->type;
+
+    send_count = send_count + 1;
+
+    switch(type){
+      case ID_DHV_SUMMARY: 
+        dbg("AMDhvP", "Sending SUMMARY : length %d  count %d at %s \n", len, send_count, sim_time_string());
+        break;
+      case ID_DHV_VBIT: 
+        dbg("AMDhvP", "Sending VBIT : length %d  count %d at %s \n", len, send_count, sim_time_string());
+        break;
+      case ID_DHV_HSUM: 
+        dbg("AMDhvP", "Sending HSUM : length %d  count %d at %s \n", len, send_count, sim_time_string());
+        break;
+      case ID_DHV_VECTOR: 
+        dbg("AMDhvP", "Sending VECTOR : length %d  count %d at %s \n", len, send_count, sim_time_string());
+        break;
+      case ID_DHV_VECTOR_REQ: 
+        dbg("AMDhvP", "Sending VECTOR_REQ : length %d  count %d at %s \n", len, send_count, sim_time_string());
+        break;
+      case ID_DHV_DATA: 
+        dbg("AMDhvP", "Sending DATA : length %d  count %d at %s \n", len, send_count, sim_time_string());
+        break;
+      default : 
+        dbg("AMDhvP", "Sending UNKNOWN : length %d  count %d at %s \n", len, send_count, sim_time_string());
+        break;
+    }
+    err = call NetAMSend.send(AM_BROADCAST_ADDR, &am_msg, len);
+
+    if(err == SUCCESS) {
+      busy = TRUE;
+    }else{
+      dbg("AMDhvP", "Send failed \n");
+    }
+
+    return err;
+  }
+
+  command void* DhvSend.getPayloadPtr() {
+    // returns NULL if message is busy
+    if(busy) {
+      return NULL;
+    }
+    return call NetAMSend.getPayload(&am_msg, 0);
+  }
+
+  command uint8_t DhvSend.maxPayloadLength() {
+    return call NetAMSend.maxPayloadLength();
+  }
+
+  event void NetAMSend.sendDone(message_t* msg, error_t err) {
+    //dbg("AMDhvP", "Data send successfully in the air\n");
+    if(msg == &am_msg) {
+      busy = FALSE;
+    }
+  }
+
+  event message_t* NetReceive.receive(message_t* msg, void* payload,
+      uint8_t len) {
+    dhv_msg_t* dmsg;
+    uint8_t type;
+
+    dmsg = (dhv_msg_t*) payload;
+    type = dmsg->type;
+    switch(type) {
+      case ID_DHV_DATA:
+
+        dbg("AMDhvPReceive", "Receive DATA : length %d at %s  \n",len,  sim_time_string() );
+        signal DhvDataReceive.receive(dmsg->content, len);
+        break;
+      case ID_DHV_VECTOR:
+
+        dbg("AMDhvPReceive", "Receive VECTOR : length %d at %s \n",len,  sim_time_string() );
+        signal DhvVectorReceive.receive(dmsg, len);
+        break;
+      case ID_DHV_SUMMARY:
+
+        dbg("AMDhvPReceive", "Receive SUMMARY : length %d at %s \n", len, sim_time_string() );
+        signal DhvSummaryReceive.receive(dmsg->content, len);
+        break;
+      case ID_DHV_HSUM:
+        dbg("AMDhvPReceive", "Receive HSUM length %d at %s \n", len, sim_time_string());
+        signal DhvHSumReceive.receive(dmsg->content, len);
+        break;  
+      case ID_DHV_VBIT:
+
+        dbg("AMDhvPReceive", "Receive VBIT : length %d at %s \n", len, sim_time_string());
+        signal DhvVBitReceive.receive(dmsg->content, len);
+        break;
+
+      case ID_DHV_VECTOR_REQ:
+
+        dbg("AMDhvPReceive", "Receive VECTOR_REQ : length %d at %s \n", len, sim_time_string());
+        signal DhvVectorReceive.receive(dmsg, len);
+        break;
+    }
+    return msg;
+  }
+}
diff --git a/tos/lib/net/dhv/Dhv.h b/tos/lib/net/dhv/Dhv.h
new file mode 100755
index 00000000..a3568422
--- /dev/null
+++ b/tos/lib/net/dhv/Dhv.h
@@ -0,0 +1,123 @@
+/**
+ * DHV header file.
+ *
+ * Define the interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV packet type and renamed the variable
+ * @modified 8/28/2008  Take the source code from Dip
+ **/
+
+
+#ifndef __DHV_H__
+#define __DHV_H__
+
+#define DHV_TAU_LOW (1024L)
+#define DHV_TAU_HIGH (65535L)
+
+#define UQ_DHV unique("DHV")
+#define UQCOUNT_DHV uniqueCount("DHV")
+
+#define DHV_UNKNOWN_VERSION 0xFFFFFFFF
+#define DHV_UNKNOWN_INDEX 0xFFFF
+#define DHV_VERSION_LENGTH 4
+
+#define VBIT_LENGTH 8
+#define INFO_THRESHOLD 1
+enum {
+  AM_DHV_TEST_MSG = 0xAB
+};
+
+
+typedef enum {
+  ID_DHV_INVALID = 0x0,
+  ID_DHV_SUMMARY = 0x1,
+  ID_DHV_VECTOR = 0x2,
+  ID_DHV_DATA = 0x3,
+  ID_DHV_HSUM = 0x4,
+  ID_DHV_VBIT = 0x5,
+  ID_DHV_VECTOR_REQ = 0x6
+} dhv_msgid_t;
+
+//status indicator : no action, ads, request
+enum{
+  ID_DHV_NO  = 0x0,
+  ID_DHV_ADS = 0x1,
+  ID_DHV_REQ = 0x2
+};
+
+enum {
+  AM_DHV = 0x63,
+  AM_DHV_DATA_MSG = 0x63, // For MIG tool
+  AM_DHV_MSG = 0x63, // For MIG tool
+  AM_DHV_DATA = 0x63 // For MIG tool
+};
+
+typedef uint16_t dhv_key_t;
+typedef uint16_t dhv_index_t;
+typedef nx_uint16_t nx_dhv_key_t;
+typedef uint32_t dhv_version_t;
+typedef nx_uint32_t nx_dhv_version_t;
+typedef uint8_t dhv_estimate_t;
+typedef dhv_index_t dhv_hashlen_t;
+
+typedef nx_struct dhv_msg {
+  nx_uint8_t type; 
+  nx_uint8_t content[0];
+} dhv_msg_t;
+
+typedef nx_struct dhv_data_msg {
+  nx_dhv_key_t key;
+  nx_dhv_version_t version;
+  nx_uint8_t size;
+  nx_uint8_t data[0];
+} dhv_data_msg_t;
+
+typedef nx_struct dhv_vector_msg {
+  nx_uint8_t unitLen;
+  nx_uint32_t vector[0];
+} dhv_vector_msg_t;
+
+typedef nx_struct dhv_summary_msg {
+  //nx_uint8_t unitLen;
+  nx_uint32_t salt;
+  nx_uint32_t info;
+} dhv_summary_msg_t;
+
+typedef nx_struct dhv_hsum_msg{
+  nx_uint32_t salt;
+  nx_uint32_t info;
+  nx_uint32_t checksum;
+} dhv_hsum_msg_t;
+
+typedef nx_struct dhv_vbit_msg{
+  nx_uint8_t numKey;
+  nx_uint8_t bindex;
+  nx_uint8_t vindex;
+  nx_uint32_t salt;
+  nx_uint32_t info; //include hash into vbit message
+  nx_uint8_t vbit[0];
+}dhv_vbit_msg_t;
+
+typedef nx_struct dhv_data {
+  nx_uint8_t data[16];
+} dhv_data_t;
+
+
+typedef nx_struct dhv_test_msg {
+  nx_uint16_t id;
+  nx_uint8_t count;
+  nx_uint8_t isOk;
+} dhv_test_msg_t;
+
+
+/* TUNABLE PARAMETERS */
+#define DHV_SUMMARY_VALUES_PER_PACKET 2
+#define DHV_VECTOR_VALUES_PER_PACKET 2
+
+#define DHV_SUMMARY_ENTRIES_PER_PACKET (DHV_SUMMARY_VALUES_PER_PACKET * 3)
+#define DHV_VECTOR_ENTRIES_PER_PACKET (DHV_VECTOR_VALUES_PER_PACKET * 2)
+#endif
diff --git a/tos/lib/net/dhv/DhvDataC.nc b/tos/lib/net/dhv/DhvDataC.nc
new file mode 100755
index 00000000..6b0d15b0
--- /dev/null
+++ b/tos/lib/net/dhv/DhvDataC.nc
@@ -0,0 +1,44 @@
+/**
+* DHV header file.
+*
+* Define the interfaces and components.
+*
+* @author Thanh Dang
+* @author Seungweon Park
+*
+* @modified 1/3/2009   Added meaningful documentation.
+* @modified 8/28/2008  Defined DHV packet type and renamed the variable
+* @modified 8/28/2008  Take the source code from Dip
+**/
+
+
+
+configuration DhvDataC {
+  provides interface DhvDecision;
+
+  uses interface DhvSend as DataSend;
+  uses interface DhvReceive as DataReceive;
+
+  uses interface DisseminationUpdate<dhv_data_t>[dhv_key_t key];
+  uses interface DisseminationValue<dhv_data_t>[dhv_key_t key];
+	
+	uses interface DhvLogic as DataLogic;
+	uses interface DhvLogic as VectorLogic;
+
+  uses interface DhvHelp;
+}
+
+implementation {
+  components DhvDataP;
+  DhvDecision = DhvDataP;
+  DataSend = DhvDataP;
+  DataReceive = DhvDataP;
+  DisseminationUpdate = DhvDataP;
+  DisseminationValue = DhvDataP;
+  DhvHelp = DhvDataP;
+  DataLogic = DhvDataP.DataLogic;
+	VectorLogic = DhvDataP.VectorLogic;
+
+  components LedsC;
+  DhvDataP.Leds -> LedsC;
+}
diff --git a/tos/lib/net/dhv/DhvDataP.nc b/tos/lib/net/dhv/DhvDataP.nc
new file mode 100755
index 00000000..5834bda6
--- /dev/null
+++ b/tos/lib/net/dhv/DhvDataP.nc
@@ -0,0 +1,127 @@
+/**
+ * DHV DATA Implementation.
+ *
+ * Define the interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV interfaces type.
+ * @modified 8/28/2008  Took the source code from DIP.
+ **/
+
+
+#include <Dhv.h>
+
+module DhvDataP {
+  provides interface DhvDecision;
+
+  uses interface DhvSend as DataSend;
+  uses interface DhvReceive as DataReceive;
+
+  uses interface DisseminationUpdate<dhv_data_t>[dhv_key_t key];
+  uses interface DisseminationValue<dhv_data_t>[dhv_key_t key];
+  uses interface DhvLogic as DataLogic;
+  uses interface DhvLogic as VectorLogic;
+
+  uses interface DhvHelp;
+  uses interface Leds;
+}
+
+implementation {
+  uint8_t commRate = 0;
+
+  command uint8_t DhvDecision.getCommRate() {
+    return commRate;
+  }
+
+  command void DhvDecision.resetCommRate() {
+    commRate = 0;
+  }
+
+  command error_t DhvDecision.send() {
+    dhv_key_t key;
+    uint8_t i;
+    dhv_version_t ver;
+    dhv_msg_t* dmsg;
+    dhv_data_msg_t* ddmsg;
+    const dhv_data_t* data;
+    error_t status;
+
+    status = FAIL;
+    //get the associated key of the data needed to send
+    i = call DataLogic.nextItem();
+    if(i == UQCOUNT_DHV){
+      return FAIL;
+    }
+    key = call DhvHelp.indexToKey(i);
+    ver = call DhvHelp.keyToVersion(key);
+    data = call DisseminationValue.get[key]();
+    dmsg = (dhv_msg_t*) call DataSend.getPayloadPtr();
+    if(dmsg == NULL) {
+      return FAIL;
+    }
+    ddmsg = (dhv_data_msg_t*) dmsg->content;
+    dmsg->type = ID_DHV_DATA;
+    ddmsg->key = key;
+    ddmsg->version = ver;
+    ddmsg->size = sizeof(dhv_data_t);
+    memcpy(ddmsg->data, data, sizeof(dhv_data_t));
+
+    dbg("DhvDataP", "Data sent with index %d key %x and version %08x\n",i, key, ver);
+    status = call DataSend.send(sizeof(dhv_data_msg_t) + sizeof(dhv_msg_t) + sizeof(dhv_data_t));
+    if(status == SUCCESS){
+      call DataLogic.unsetItem(key);
+    }
+
+    return status;
+  }
+
+  event void DataReceive.receive(void* payload, uint8_t len) {
+    dhv_key_t key;
+    dhv_version_t myVer;
+    dhv_version_t msgVer;
+    dhv_data_msg_t* ddmsg;
+
+    ddmsg = (dhv_data_msg_t*) payload;
+    key = ddmsg->key;
+    msgVer = ddmsg->version;
+    myVer = call DhvHelp.keyToVersion(key);
+    dbg("DhvDataP", "Data rcved with key %x and version %08x\n", key, msgVer);
+
+    // TODO: handle the invalid versions
+    if(myVer < msgVer) {
+      dbg("DhvDataP", "new version\n");
+      call DisseminationUpdate.change[key]((dhv_data_t*)ddmsg->data);
+      call DhvHelp.setVersion(key, msgVer);
+      call DataLogic.setItem(key);
+      call VectorLogic.setItem(key);
+      //set bindex to 0
+    }
+    else if (myVer > msgVer) {
+      dbg("DhvDataP", "Old version\n");
+      //report older key to dhvlogic to set data item to send
+      //reset timer
+      call DataLogic.setItem(key);
+      call VectorLogic.setItem(key);
+
+    }
+    else {
+      dbg("DhvDataP", "Same version\n");
+      //keep quite
+      call DataLogic.unsetItem(key);
+      call VectorLogic.unsetItem(key);
+      commRate = commRate + 1;
+      //set bindex to 0
+    }
+  }
+
+  event void DisseminationValue.changed[dhv_key_t key]() {  }
+
+  default command const dhv_data_t* DisseminationValue.get[dhv_key_t key]() {
+    return NULL;
+  }
+
+  default command void DisseminationUpdate.change[dhv_key_t key](dhv_data_t* val) { }
+
+}
diff --git a/tos/lib/net/dhv/DhvHSumC.nc b/tos/lib/net/dhv/DhvHSumC.nc
new file mode 100755
index 00000000..6b98086f
--- /dev/null
+++ b/tos/lib/net/dhv/DhvHSumC.nc
@@ -0,0 +1,29 @@
+/**
+ * DHV Horizontal Summary Implementation.
+ *
+ * Define the interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV interfaces type.
+ **/
+
+configuration DhvHSumC{
+  provides interface DhvDecision;
+
+  uses interface DhvSend as HSumSend;
+  uses interface DhvReceive as HSumReceive;
+  uses interface DhvStateLogic as VBitLogic;
+  uses interface DhvHelp;
+}
+
+implementation{	
+  components DhvHSumP, RandomC;
+  DhvDecision 		= DhvHSumP;
+  HSumSend 		= DhvHSumP;
+  HSumReceive 		= DhvHSumP;
+  VBitLogic 		= DhvHSumP;
+  DhvHelp 		= DhvHSumP;
+  DhvHSumP.Random 	-> RandomC;
+}
diff --git a/tos/lib/net/dhv/DhvHSumP.nc b/tos/lib/net/dhv/DhvHSumP.nc
new file mode 100755
index 00000000..32dd414a
--- /dev/null
+++ b/tos/lib/net/dhv/DhvHSumP.nc
@@ -0,0 +1,90 @@
+/**
+ * DHV Horizontal Summary Implementation.
+ *
+ * Define the interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV interfaces type.
+ **/
+
+#include<Dhv.h>
+
+module DhvHSumP{
+  provides interface DhvDecision;
+
+  uses interface DhvSend as HSumSend;
+  uses interface DhvReceive as HSumReceive;
+  uses interface DhvStateLogic as VBitLogic;
+  uses interface DhvHelp;
+  uses interface Random;	
+}
+
+implementation{
+  uint8_t commRate;
+
+  command uint8_t DhvDecision.getCommRate(){
+    return commRate;
+  }
+  command void DhvDecision.resetCommRate(){
+    commRate = 0;
+  }
+  command error_t DhvDecision.send(){
+    dhv_hsum_msg_t* dhsmsg;
+    dhv_msg_t* 			dmsg;
+    uint32_t  salt;
+    error_t sendResult;
+
+    dmsg = call HSumSend.getPayloadPtr();
+    if(dmsg == NULL)
+        return FAIL;
+
+    dmsg->type = ID_DHV_HSUM;
+    dhsmsg = (dhv_hsum_msg_t*) dmsg->content;
+
+    //add the hash value
+    salt = call Random.rand32();
+    dhsmsg->info = call DhvHelp.computeHash(0, UQCOUNT_DHV, salt);
+    dhsmsg->salt = salt;
+    dhsmsg->checksum = call DhvHelp.getHSum();
+
+    sendResult = call HSumSend.send(sizeof(dhv_msg_t) + sizeof(dhv_hsum_msg_t));
+    if(sendResult == SUCCESS){
+      call VBitLogic.unsetHSumStatus();
+    }
+    return sendResult;
+  }	
+
+  event void HSumReceive.receive(void* payload, uint8_t len){
+    dhv_hsum_msg_t * rcv_dhmsg;
+    int32_t local_checksum;
+    int32_t rcv_checksum;
+    int32_t xor_checksum;
+    int32_t salt;
+    int32_t rcv_hash;
+    int32_t local_hash;
+
+    rcv_dhmsg = (dhv_hsum_msg_t*) payload;
+
+    rcv_checksum = rcv_dhmsg->checksum;
+    local_checksum = call DhvHelp.getHSum();
+    xor_checksum = rcv_checksum^local_checksum;
+    dbg("DhvHSumP", " xor_checksum 0x%08x  0x%08x  0x%08x \n",rcv_checksum, local_checksum, xor_checksum);
+    if(xor_checksum == 0){
+      //check for the hash
+      rcv_hash = rcv_dhmsg->info;
+      salt = rcv_dhmsg->salt;
+      local_hash = call DhvHelp.computeHash(0, UQCOUNT_DHV, salt);
+      if(rcv_hash == local_hash) {
+        call VBitLogic.setSameSummary();
+        commRate = commRate + 1;
+      }else{
+        call VBitLogic.setVBitState(1);
+      }
+    }else{
+      dbg("DhvHSumP"," detect a difference in checksum \n" );
+      call VBitLogic.setVBitState(xor_checksum);
+    }
+  }
+}
diff --git a/tos/lib/net/dhv/DhvLogicC.nc b/tos/lib/net/dhv/DhvLogicC.nc
new file mode 100755
index 00000000..b349bdfe
--- /dev/null
+++ b/tos/lib/net/dhv/DhvLogicC.nc
@@ -0,0 +1,84 @@
+/**
+ * DHV Logic Implementation.
+ *
+ * Define the interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV interfaces type.
+ * @modified 8/28/2008  Took the source code from DIP.
+ **/
+
+#include <Dhv.h>
+
+configuration DhvLogicC {
+  provides interface DisseminationUpdate<dhv_data_t>[dhv_key_t key];
+	provides interface DhvLogic as DataLogic;
+	provides interface DhvLogic as VectorLogic;
+	provides interface DhvStateLogic;
+  provides interface StdControl;
+}
+
+implementation {
+  components DhvLogicP;
+  DisseminationUpdate = DhvLogicP;
+  StdControl = DhvLogicP;
+  DataLogic  = DhvLogicP.DataLogic;
+	VectorLogic= DhvLogicP.VectorLogic;
+	DhvStateLogic = DhvLogicP;
+
+  components MainC;
+  MainC.SoftwareInit -> DhvLogicP;
+  DhvLogicP.Boot -> MainC;
+
+  components DhvTrickleMilliC;
+  DhvLogicP.DhvTrickleTimer -> DhvTrickleMilliC;
+
+  components DhvVersionC;
+  DhvLogicP.VersionUpdate -> DhvVersionC;
+  DhvLogicP.DhvHelp -> DhvVersionC;
+	DhvLogicP.DhvDataCache -> DhvVersionC.DataCache;
+	DhvLogicP.DhvVectorCache -> DhvVersionC.VectorCache;
+
+  components AMDhvC;
+
+  components DhvDataC;
+  DhvLogicP.DhvDataDecision -> DhvDataC;
+  DhvDataC.DataSend -> AMDhvC.DhvSend;
+  DhvDataC.DataReceive -> AMDhvC.DataReceive;
+  DhvDataC.DhvHelp -> DhvVersionC;
+  DhvDataC.DataLogic -> DhvLogicP.DataLogic;
+  DhvDataC.VectorLogic -> DhvLogicP.VectorLogic;	
+
+  components DhvVectorC;
+  DhvLogicP.DhvVectorDecision -> DhvVectorC;
+  DhvVectorC.VectorSend -> AMDhvC.DhvSend;
+  DhvVectorC.VectorReceive -> AMDhvC.VectorReceive;
+  DhvVectorC.DhvHelp -> DhvVersionC;
+	DhvVectorC.VectorLogic -> DhvLogicP.VectorLogic;
+	DhvVectorC.DataLogic -> DhvLogicP.DataLogic;
+
+  components DhvSummaryC;
+  DhvLogicP.DhvSummaryDecision -> DhvSummaryC;
+  DhvSummaryC.SummarySend -> AMDhvC.DhvSend;
+  DhvSummaryC.SummaryReceive -> AMDhvC.SummaryReceive;
+  DhvSummaryC.DhvHelp -> DhvVersionC;
+	DhvSummaryC.StateLogic -> DhvLogicP.DhvStateLogic;
+
+	components DhvVBitC;
+	DhvLogicP.DhvVBitDecision -> DhvVBitC;
+	DhvVBitC.VBitSend -> AMDhvC.DhvSend;
+	DhvVBitC.VBitReceive -> AMDhvC.DhvVBitReceive;
+	DhvVBitC.DhvHelp -> DhvVersionC;
+	DhvVBitC.VectorLogic -> DhvLogicP.VectorLogic;
+	DhvVBitC.VBitLogic  -> DhvLogicP.DhvStateLogic;
+
+  components DhvHSumC;
+  DhvHSumC.VBitLogic -> DhvLogicP.DhvStateLogic;
+  DhvHSumC.DhvHelp    -> DhvVersionC;
+  DhvHSumC.HSumSend   -> AMDhvC.DhvSend;
+  DhvHSumC.HSumReceive-> AMDhvC.DhvHSumReceive;
+  DhvLogicP.DhvHSumDecision -> DhvHSumC;
+}
diff --git a/tos/lib/net/dhv/DhvLogicP.nc b/tos/lib/net/dhv/DhvLogicP.nc
new file mode 100755
index 00000000..84cacfc7
--- /dev/null
+++ b/tos/lib/net/dhv/DhvLogicP.nc
@@ -0,0 +1,352 @@
+/**
+ * DHV Logic Implementation.
+ *
+ * Define the interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV interfaces type.
+ * @modified 8/28/2008  Took the source code from DIP.
+ **/
+
+#include <Dhv.h>
+
+module DhvLogicP {
+  provides interface DisseminationUpdate<dhv_data_t>[dhv_key_t key];
+
+  provides interface Init;
+  provides interface StdControl;
+  provides interface DhvLogic as VectorLogic;
+  provides interface DhvLogic as DataLogic;
+  provides interface DhvStateLogic;	
+
+  uses interface Boot;
+  uses interface DhvTrickleTimer;
+  uses interface DisseminationUpdate<dhv_data_t> as VersionUpdate[dhv_key_t key];
+
+  uses interface DhvDecision as DhvDataDecision;
+  uses interface DhvDecision as DhvVectorDecision;
+  uses interface DhvDecision as DhvSummaryDecision;
+  uses interface DhvDecision as DhvVBitDecision;
+  uses interface DhvDecision as DhvHSumDecision;
+
+  uses interface DhvCache as DhvDataCache;
+  uses interface DhvCache as DhvVectorCache;
+  uses interface DhvHelp;
+
+}
+
+implementation {
+  uint32_t windowSize;
+  uint8_t sendDecision();
+  uint32_t bitIndex;
+  uint8_t hsum_status;
+  uint32_t diffHash;
+
+  command error_t Init.init() {
+    windowSize = DHV_TAU_LOW;
+    dbg("DhvLogicP","DHV ready\n");
+    return SUCCESS;
+  }
+
+  event void Boot.booted() {
+    hsum_status = 0;
+    bitIndex = 0;
+  }
+
+  command error_t StdControl.start() {
+    return call DhvTrickleTimer.start();
+  }
+
+  command error_t StdControl.stop() {
+    call DhvTrickleTimer.stop();
+    return SUCCESS;
+  }
+
+
+  /*Logic operation on the vector */	
+  command error_t VectorLogic.setItem(dhv_key_t key){
+    call DhvVectorCache.addItem(key);
+    call DhvTrickleTimer.reset();
+    return SUCCESS;
+  }
+
+  command error_t VectorLogic.setReqItem(dhv_key_t key){
+    call DhvVectorCache.addReqItem(key);
+    call DhvTrickleTimer.reset();
+    return SUCCESS;
+  }
+
+  command error_t VectorLogic.unsetItem(dhv_key_t key){
+    call DhvVectorCache.removeItem(key);
+    call DhvStateLogic.setVBitState(0);
+    return SUCCESS;
+  }
+
+  command uint8_t * VectorLogic.allItem(){
+    return call DhvVectorCache.allItem();
+  }
+
+  command uint8_t VectorLogic.nextItem(){
+    return call DhvVectorCache.nextItem();
+  }
+
+  /*logic operations on the data*/
+  command error_t DataLogic.setItem(dhv_key_t key){
+    call DhvDataCache.addItem( key);
+    call DhvTrickleTimer.reset();
+    return SUCCESS;
+  }
+
+  command error_t DataLogic.setReqItem(dhv_key_t key){
+    call DhvDataCache.addReqItem( key);
+    call DhvTrickleTimer.reset();
+    return SUCCESS;
+  }
+
+  command error_t  DataLogic.unsetItem(dhv_key_t key){
+    call DhvDataCache.removeItem(key);
+    call DhvStateLogic.setVBitState(0);
+    return SUCCESS;
+  }
+
+  command uint8_t* DataLogic.allItem(){
+    return call DhvDataCache.allItem();
+  }
+
+  command uint8_t DataLogic.nextItem(){
+    return call DhvDataCache.nextItem();
+  }
+
+  /*logic operation for the summary and vbit*/
+  command void DhvStateLogic.setHSumStatus(){
+    hsum_status = 1;
+    call	DhvTrickleTimer.reset();
+  }
+
+  command void DhvStateLogic.unsetHSumStatus(){
+    hsum_status = 0;
+  }
+
+  command uint8_t DhvStateLogic.getHSumStatus(){
+    return hsum_status;
+  }
+
+  command void DhvStateLogic.setDiffSummary(){
+    if(bitIndex == 0){
+      bitIndex=1;
+    }
+
+    call	DhvTrickleTimer.reset();
+  }
+
+  command void DhvStateLogic.setSameSummary(){
+    bitIndex = 0;
+    hsum_status = 0;
+    //reset all the vector and data status to avoid flooding
+    call DhvDataCache.removeAll();
+    call DhvVectorCache.removeAll();
+
+  }	
+
+  command void DhvStateLogic.setVBitState(uint32_t state){
+    bitIndex = state;
+    if(state != 0){
+      call	DhvTrickleTimer.reset();
+    }
+  }
+
+  command uint32_t DhvStateLogic.getVBitState(){
+    return bitIndex;
+  }
+
+  //unset one bit at index location
+  command void DhvStateLogic.unsetVBitIndex(uint8_t dindex){
+    uint32_t mask;
+    mask = 1;
+
+    mask = mask << (dindex-1);
+    dbg("TempDebug", "TempDebug: Before mask dindex bitIndex %d %d %d\n", mask, dindex, bitIndex);
+    if((bitIndex & mask) != 0){
+      bitIndex = bitIndex^mask;
+    }
+    dbg("TempDebug", "TempDebug: After bitIndex %d\n", bitIndex); 
+  }
+
+  command void DhvStateLogic.setVBitIndex(uint8_t dindex){
+    uint32_t mask;
+    mask = 1;
+    mask = mask << (dindex-1);
+
+    bitIndex = bitIndex | mask;
+
+    call	DhvTrickleTimer.reset();
+  }
+
+  //get the non-zero bit index to extract the vertical bits.
+  command uint8_t DhvStateLogic.getVBitIndex(){
+
+    uint32_t mask;
+    uint8_t i;
+    uint32_t xor;
+
+    if(bitIndex == 0){
+      return 0;
+    }else
+    {
+      mask = 1;
+      for(i = 1; i <= 32; i++){
+        xor = bitIndex & mask;
+
+        dbg("TempDebug", "TempDebug: %d  %d  %d  %d \n", i, bitIndex, mask, xor);
+        if(xor != 0){
+          return i;
+        }
+        mask = mask << 1;			
+      }
+      return 0;
+    }
+  }
+
+
+
+  command void DisseminationUpdate.change[dhv_key_t key](dhv_data_t* val) {
+
+    dbg("DhvLogicP","App notified key %x is new\n", key);
+
+    //update data: actual reprogramming job
+    call VersionUpdate.change[key](val);
+
+    //set data
+    call DhvDataCache.addItem(key);
+
+    //set to advertise its version
+    call DhvVectorCache.addItem(key);
+
+    //reset bindex
+    call DhvStateLogic.setVBitState(0);	
+
+    dbg("DhvLogicP","Reset bindex to 0\n");
+    //reset timer		  
+    call DhvTrickleTimer.reset();
+  }
+
+  event uint32_t DhvTrickleTimer.requestWindowSize() {
+    //TODO: consider if this is neccessary
+    uint8_t decision;
+
+    decision =  sendDecision();
+
+    if(decision == ID_DHV_SUMMARY){
+      windowSize = windowSize << 1;
+      if(windowSize > DHV_TAU_HIGH){
+        windowSize = DHV_TAU_HIGH;
+      }
+    }else{
+      if(decision != ID_DHV_INVALID){
+        windowSize = DHV_TAU_LOW;
+      }
+    }
+
+    dbg("DhvLogicP", "Time window size requested, give %u : send decision %d \n", windowSize, decision);
+    return windowSize;
+  }
+
+  event void DhvTrickleTimer.fired() {
+    uint8_t decision;
+
+    dbg("DhvLogicP","Trickle Timer fired!\n");
+
+    decision = sendDecision();
+
+    switch(decision) {
+      case ID_DHV_INVALID:
+        dbg("DhvLogicP", "Decision to SUPPRESS\n");
+        break;
+      case ID_DHV_SUMMARY:
+        dbg("DhvLogicP", "Decision to SUMMARY\n");
+        call DhvSummaryDecision.send();
+        break;
+      case ID_DHV_VECTOR:
+        dbg("DhvLogicP", "Decision to VECTOR\n");
+        call DhvVectorDecision.send();
+        break;
+      case ID_DHV_DATA:
+        dbg("DhvLogicP", "Decision to DATA\n");
+        call DhvDataDecision.send();
+        break;
+      case ID_DHV_VBIT:
+        dbg("DhvLogicP", "Decision to VSUM\n");
+        call DhvVBitDecision.send();
+        break;
+      case ID_DHV_HSUM:
+        dbg("DhvLogicP", "Decision to HSUM\n");
+        call DhvHSumDecision.send();
+        break;
+    }
+    call DhvDataDecision.resetCommRate();
+    call DhvVectorDecision.resetCommRate();
+    call DhvSummaryDecision.resetCommRate();
+    call DhvVBitDecision.resetCommRate();
+    call DhvHSumDecision.resetCommRate();
+
+    //set bitstate to zero
+    call DhvStateLogic.setVBitState(0);	
+  }
+
+  uint8_t sendDecision() {
+
+    bool hasItemToSend;
+    uint32_t bindex;
+    uint8_t dataCommRate;
+    uint8_t vectorCommRate;
+    uint8_t summaryCommRate;
+    uint8_t vbitCommRate;
+    uint8_t hsumCommRate;
+
+    dataCommRate = call DhvDataDecision.getCommRate();
+    vectorCommRate = call DhvVectorDecision.getCommRate();
+    summaryCommRate = call DhvSummaryDecision.getCommRate();
+    vbitCommRate    = call DhvVBitDecision.getCommRate();
+    hsumCommRate    = call DhvHSumDecision.getCommRate();
+
+    if(dataCommRate > INFO_THRESHOLD){
+      return ID_DHV_INVALID;  
+    }
+
+    hasItemToSend = FALSE;
+    hasItemToSend = call DhvDataCache.hasItemToSend();
+    if(hasItemToSend){
+      dbg("DhvLogicP", "has data to send? %u \n", hasItemToSend);
+      return ID_DHV_DATA;
+    }
+
+    // didn't send or hear data at this point
+    if(dataCommRate + vectorCommRate + summaryCommRate + vbitCommRate + hsumCommRate >= INFO_THRESHOLD) {
+      dbg("DhvLogicP", "Heard an advertisement\n");
+      return ID_DHV_INVALID;
+    }
+
+    hasItemToSend = call DhvVectorCache.hasItemToSend();
+    dbg("DhvLogicP", "has vector to send? %u \n", hasItemToSend);
+
+    if(hasItemToSend){
+      return ID_DHV_VECTOR;
+    }
+
+    bindex = call DhvStateLogic.getVBitState();
+    dbg("DhvLogicP", "send decision bindex %d \n", bindex);		
+
+    if(bindex != 0){
+      return ID_DHV_VBIT;
+    }
+
+    if(hsum_status != 0){
+      return ID_DHV_HSUM;
+    }
+
+    return ID_DHV_SUMMARY;		
+  }
+}
diff --git a/tos/lib/net/dhv/DhvSummaryC.nc b/tos/lib/net/dhv/DhvSummaryC.nc
new file mode 100755
index 00000000..0cece24d
--- /dev/null
+++ b/tos/lib/net/dhv/DhvSummaryC.nc
@@ -0,0 +1,32 @@
+/**
+ * DHV Summary Message Configuration.
+ *
+ * Define the interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV interfaces type.
+ * @modified 8/28/2008  Took the source code from DIP.
+ **/
+
+configuration DhvSummaryC {
+  provides interface DhvDecision;
+
+  uses interface DhvSend as SummarySend;
+  uses interface DhvReceive as SummaryReceive;
+	uses interface DhvStateLogic as StateLogic;
+  uses interface DhvHelp;
+}
+
+implementation {
+  components DhvSummaryP;
+  DhvDecision = DhvSummaryP;
+  SummarySend = DhvSummaryP;
+  SummaryReceive = DhvSummaryP;
+	StateLogic = DhvSummaryP;
+  DhvHelp = DhvSummaryP;
+  components RandomC;
+  DhvSummaryP.Random -> RandomC; 
+}
diff --git a/tos/lib/net/dhv/DhvSummaryP.nc b/tos/lib/net/dhv/DhvSummaryP.nc
new file mode 100755
index 00000000..5323fb73
--- /dev/null
+++ b/tos/lib/net/dhv/DhvSummaryP.nc
@@ -0,0 +1,79 @@
+/**
+ * DHV Summary Message Implementation.
+ *
+ * Define the interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV interfaces type.
+ * @modified 8/28/2008  Took the source code from DIP.
+ **/
+
+#include <Dhv.h>
+
+module DhvSummaryP {
+  provides interface DhvDecision;
+
+  uses interface DhvSend as SummarySend;
+  uses interface DhvReceive as SummaryReceive;
+  uses interface DhvHelp;
+  uses interface Random;
+	uses interface DhvStateLogic as StateLogic;
+}
+
+implementation {
+  uint32_t computeHash(dhv_index_t left, dhv_index_t right,
+		       dhv_version_t* basedata, uint32_t salt);
+  uint8_t commRate;
+
+  command uint8_t DhvDecision.getCommRate() {
+    return commRate;
+  }
+
+  command void DhvDecision.resetCommRate() {
+    commRate = 0;
+  }
+
+  command error_t DhvDecision.send() {
+    uint32_t salt;
+    dhv_msg_t* dmsg;
+    dhv_summary_msg_t* dsmsg;
+
+    dmsg = (dhv_msg_t*) call SummarySend.getPayloadPtr();
+    if(dmsg == NULL)
+        return FAIL;
+
+    dmsg->type = ID_DHV_SUMMARY;
+    dsmsg = (dhv_summary_msg_t*) dmsg->content;
+
+    salt = call Random.rand32();
+    dsmsg->info = call DhvHelp.computeHash(0, UQCOUNT_DHV, salt);
+    dsmsg->salt = salt;
+
+    dbg("DhvSummaryP", "Hash Entry: %08x \n",	 dsmsg->info);
+    return call SummarySend.send(sizeof(dhv_msg_t) + sizeof(dhv_summary_msg_t));
+  }
+
+  event void SummaryReceive.receive(void* payload, uint8_t len) {
+    dhv_summary_msg_t* dsmsg;
+    uint32_t salt, myHash;
+
+
+    dsmsg = (dhv_summary_msg_t*) payload;
+    salt = dsmsg->salt;
+    
+    myHash = call DhvHelp.computeHash(0, UQCOUNT_DHV, salt);
+    if(myHash != dsmsg->info) {
+				//call StateLogic.setDiffSummary();
+				call StateLogic.setHSumStatus();
+        dbg("DhvSummaryP", "Hashes don't match\n");
+    }
+      else {
+				call StateLogic.setSameSummary();
+        commRate = commRate + 1;
+        dbg("DhvSummaryP", "Hashes match\n");
+    }
+  }
+}
diff --git a/tos/lib/net/dhv/DhvTrickleMilliC.nc b/tos/lib/net/dhv/DhvTrickleMilliC.nc
new file mode 100755
index 00000000..845f8470
--- /dev/null
+++ b/tos/lib/net/dhv/DhvTrickleMilliC.nc
@@ -0,0 +1,70 @@
+// $Id: DhvTrickleMilliC.nc,v 1.2 2010-06-29 22:07:49 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Configuration that encapsulates the trickle timer implementation to
+ * its needed services and initialization. For details on the working
+ * of the parameters, please refer to Levis et al., "A Self-Regulating
+ * Algorithm for Code Maintenance and Propagation in Wireless Sensor
+ * Networks," NSDI 2004.
+ *
+ * @param l Lower bound of the time period in seconds.
+ * @param h Upper bound of the time period in seconds.
+ * @param k Redundancy constant.
+ * @param count How many timers to provide.
+ *
+ * @author Philip Levis
+ * @author Gilman Tolle
+ * @date   Jan 7 2006
+ */ 
+
+
+configuration DhvTrickleMilliC {
+  provides interface DhvTrickleTimer as TrickleTimer;
+}
+implementation {
+  components DhvTrickleMilliP as TrickleP;
+  components MainC, RandomC;
+  components new TimerMilliC() as PeriodicIntervalTimer;
+  components new TimerMilliC() as SingleEventTimer;
+  components LedsC;
+  TrickleTimer = TrickleP;
+
+  TrickleP.PeriodicIntervalTimer -> PeriodicIntervalTimer;
+  TrickleP.SingleEventTimer -> SingleEventTimer;
+  TrickleP.Random -> RandomC;
+  
+  TrickleP.Leds -> LedsC;
+  MainC.SoftwareInit -> TrickleP;
+}
+
+  
diff --git a/tos/lib/net/dhv/DhvTrickleMilliP.nc b/tos/lib/net/dhv/DhvTrickleMilliP.nc
new file mode 100755
index 00000000..07bbabc1
--- /dev/null
+++ b/tos/lib/net/dhv/DhvTrickleMilliP.nc
@@ -0,0 +1,128 @@
+// $Id: DhvTrickleMilliP.nc,v 1.2 2010-06-29 22:07:49 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Module that provides a service instance of trickle timers. For
+ * details on the working of the parameters, please refer to Levis et
+ * al., "A Self-Regulating Algorithm for Code Maintenance and
+ * Propagation in Wireless Sensor Networks," NSDI 2004.
+ *
+ * @param l Lower bound of the time period in seconds.
+ * @param h Upper bound of the time period in seconds.
+ * @param k Redundancy constant.
+ * @param count How many timers to provide.
+ *
+ * @author Philip Levis
+ * @author Gilman Tolle
+ * @date   Jan 7 2006
+ */ 
+
+#include <Timer.h>
+#include <Dhv.h>
+
+module DhvTrickleMilliP {
+  provides {
+    interface Init;
+    interface DhvTrickleTimer as TrickleTimer;
+  }
+  uses {
+    interface Timer<TMilli> as PeriodicIntervalTimer;
+    interface Timer<TMilli> as SingleEventTimer;
+    interface Random;
+    interface Leds;
+  }
+}
+implementation {
+
+  uint32_t period;
+
+  command error_t Init.init() {
+    period = DHV_TAU_HIGH;
+    return SUCCESS;
+  }
+
+  /**
+   * Start a trickle timer. Reset the counter to 0.
+   */
+  command error_t TrickleTimer.start() {
+    call PeriodicIntervalTimer.startOneShot(period);
+    dbg("DhvTrickleMilliP",
+	"Starting trickle timer @ %s\n", sim_time_string());
+    return SUCCESS;
+  }
+
+  /**
+   * Stop the trickle timer. This call sets the timer period to H.
+   */
+  command void TrickleTimer.stop() {
+    call PeriodicIntervalTimer.stop();
+    dbg("DhvTrickleMilliP",
+	"Stopping trickle timer @ %s\n", sim_time_string());
+  }
+
+  /**
+   * Reset the timer period to L. If called while the timer is running,
+   * then a new interval (of length L) begins immediately.
+   */
+  command void TrickleTimer.reset() {
+    period = DHV_TAU_LOW;
+    call PeriodicIntervalTimer.stop();
+    call PeriodicIntervalTimer.startOneShot(period);
+    dbg("DhvTrickleMilliP",
+	"Resetting trickle timer @ %s\n", sim_time_string());
+  }
+
+  command void TrickleTimer.maxInterval() {
+    period = DHV_TAU_HIGH;
+  }
+
+  /**
+   * The trickle timer has fired. Signaled if C &gt; K.
+   */
+  event void PeriodicIntervalTimer.fired() {
+    uint32_t dtfire;
+
+    dtfire = (call Random.rand16() % (period / 2)) + (period / 2);
+    dbg("DhvTrickleMilliP", "Scheduling Trickle event with %u\n", dtfire);
+    call SingleEventTimer.startOneShot(dtfire);
+    period = signal TrickleTimer.requestWindowSize();
+    call PeriodicIntervalTimer.startOneShot(period);
+    //call Leds.led0Toggle();
+  }
+
+  event void SingleEventTimer.fired() {
+    dbg("Trickle", "Firing Trickle Event Timer\n");
+    signal TrickleTimer.fired();
+  }
+}
+
+  
diff --git a/tos/lib/net/dhv/DhvVBitC.nc b/tos/lib/net/dhv/DhvVBitC.nc
new file mode 100755
index 00000000..cdec7ee8
--- /dev/null
+++ b/tos/lib/net/dhv/DhvVBitC.nc
@@ -0,0 +1,35 @@
+/**
+ * DHV Virtual Bits Check Configuration
+ *
+ * Define interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV modules.
+ **/
+
+configuration DhvVBitC{
+	provides interface DhvDecision;
+	
+	uses interface DhvSend as VBitSend;
+	uses interface DhvReceive as VBitReceive;
+	uses interface DhvStateLogic as VBitLogic;
+	uses interface DhvLogic as VectorLogic;
+	uses interface DhvHelp;
+}
+
+implementation{
+	
+	components DhvVBitP;
+	DhvDecision = DhvVBitP;
+	VBitSend 		= DhvVBitP;
+	VBitReceive = DhvVBitP;
+	VBitLogic 	= DhvVBitP;
+	VectorLogic = DhvVBitP;
+	DhvHelp 		= DhvVBitP;
+
+	components RandomC;
+	DhvVBitP.Random -> RandomC;
+}
diff --git a/tos/lib/net/dhv/DhvVBitP.nc b/tos/lib/net/dhv/DhvVBitP.nc
new file mode 100755
index 00000000..95e8b825
--- /dev/null
+++ b/tos/lib/net/dhv/DhvVBitP.nc
@@ -0,0 +1,220 @@
+/**
+ * DHV Virtual Bits Check Configuration
+ *
+ * Define interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV modules.
+ **/
+
+#include<Dhv.h>
+
+module DhvVBitP{
+  provides interface DhvDecision;
+
+  uses interface DhvSend as VBitSend;
+  uses interface DhvReceive as VBitReceive;
+  uses interface DhvStateLogic as VBitLogic;
+  uses interface DhvLogic as VectorLogic;
+  uses interface DhvHelp;	
+  uses interface Random;
+}
+
+implementation{
+  uint8_t commRate;
+
+  command uint8_t DhvDecision.getCommRate()
+  {
+    return commRate;
+  }
+
+  command void DhvDecision.resetCommRate(){
+    commRate  = 0;
+  }
+
+
+  /*construct a vector of bits and send it*/
+  command error_t DhvDecision.send(){
+    uint8_t bindex;
+    uint8_t vbit_size;
+    uint8_t msg_size;
+    uint8_t numMsg;
+    uint8_t maxDataLength;
+    uint8_t i, j;
+    dhv_msg_t* dmsg;
+    dhv_vbit_msg_t* dvbmsg;
+    uint8_t *versionPtr;
+    error_t sendResult;
+    uint32_t salt;
+
+    maxDataLength = TOSH_DATA_LENGTH - sizeof(dhv_msg_t) - sizeof(dhv_vbit_msg_t); 
+    sendResult = FAIL;
+
+    if(UQCOUNT_DHV != 0)
+    {
+      vbit_size = ((uint8_t)(UQCOUNT_DHV-1)/VBIT_LENGTH) + 1;
+      numMsg    = (vbit_size -1)/maxDataLength + 1;
+    }else
+    {
+      vbit_size = 0;
+      numMsg    = 0;
+    }
+
+    bindex = call VBitLogic.getVBitIndex();
+
+    //return if 0
+    if(bindex  == 0){
+      dbg("DhvVBitP", "Error: no vbit to send \n");
+    }
+
+
+    dmsg = call VBitSend.getPayloadPtr();
+    if(dmsg == NULL)
+      return FAIL;
+
+    dmsg->type = ID_DHV_VBIT;
+    dvbmsg = (dhv_vbit_msg_t*) dmsg->content;
+    dvbmsg->bindex = bindex;
+
+    //put the hash into the message
+    salt = call Random.rand32();
+    dvbmsg->info = call DhvHelp.computeHash(0, UQCOUNT_DHV, salt);
+    dvbmsg->salt = salt;			
+
+    //put the vbit into the message
+    versionPtr = call DhvHelp.getVBits(bindex);
+
+    for(j = 0; j < numMsg; j++){//number of tos message_t 
+      if(j == numMsg-1){
+        //last message
+        msg_size = vbit_size - j*maxDataLength;
+      }else{
+        msg_size = maxDataLength;
+      }
+
+      //TODO: need to get this right
+      dvbmsg->numKey = msg_size*8;             //number of keys
+
+      for(i = 0; i < msg_size; i++){
+        dvbmsg->vindex = j;
+        dvbmsg->vbit[i] = versionPtr[j*maxDataLength + i];
+        dbg("DhvVBitP", "bindex %d vbit %d:  0x%02x  0x%02x \n",bindex, i, dvbmsg->vbit[i], versionPtr[i]);
+      }
+
+      //dbg("DhvVBitP", "Sending vbit of index %d size %d \n", bindex, sizeof(dhv_msg_t) + sizeof(dhv_vbit_msg_t) + msg_size );
+
+      for(i = 0; i < msg_size; i++){
+        dbg("DhvVBitP", "vbit to send %d, 0x%02x \n", i, dvbmsg->vbit[i]);
+      }
+
+      //send the vbit out
+      sendResult = call VBitSend.send(sizeof(dhv_msg_t) + sizeof(dhv_vbit_msg_t) + msg_size);
+      if(sendResult == SUCCESS){
+        //call VBitLogic.unsetVBitIndex(bindex);
+        call VBitLogic.setVBitState(0);
+        call VBitLogic.unsetHSumStatus();
+      }
+    }
+    return sendResult;	
+  }
+
+
+  event void VBitReceive.receive(void* payload, uint8_t len){
+    dhv_vbit_msg_t * rcv_dvbmsg;
+    uint8_t bindex, vindex;
+    int i,j;
+    dhv_version_t version;
+    dhv_version_t mask;
+    uint8_t diffIndex;
+    dhv_key_t diffKey;
+    bool isDiff;
+    uint8_t vbit_size;
+    uint8_t* vbit;
+    uint32_t salt, myHash;
+    uint8_t maxDataLength;
+    uint8_t msg_size;
+    uint8_t numMsg;
+    uint32_t bitIndexValue;
+
+    isDiff = FALSE;
+
+    maxDataLength = TOSH_DATA_LENGTH - sizeof(dhv_msg_t) - sizeof(dhv_vbit_msg_t);
+    if(UQCOUNT_DHV != 0)
+    {
+      vbit_size = ((uint8_t)(UQCOUNT_DHV-1)/VBIT_LENGTH) + 1;	
+      numMsg = (vbit_size -1)/maxDataLength + 1;
+
+    }else
+    {
+      vbit_size = 0;
+      numMsg    = 0;	
+    }
+
+    rcv_dvbmsg = (dhv_vbit_msg_t*) payload;
+    bindex = rcv_dvbmsg->bindex;
+    vindex = rcv_dvbmsg->vindex;
+
+    dbg("DhvVBitP", "Receive vbit of index %d numMsg %d vbit_size %d \n", bindex, numMsg, vbit_size );
+
+    //compare the hash first
+    salt = rcv_dvbmsg->salt;
+    myHash = call DhvHelp.computeHash(0, UQCOUNT_DHV, salt);
+
+    if(myHash == rcv_dvbmsg->info){
+      //some duplicates
+      dbg("DhvVBitP", "same summary\n");
+      call VBitLogic.setSameSummary();
+      commRate = commRate + 1;
+    }else{
+      vbit = call DhvHelp.getVBits(bindex);	
+      if(vindex == numMsg-1){
+        msg_size = vbit_size - vindex*maxDataLength;
+        //dbg("DhvVBitP", "Last message vindex %d  numMsg %d msg_size %d \n", vindex, numMsg, msg_size );
+      }else{
+        msg_size = maxDataLength;
+        //dbg("DhvVBitP", "Not last message %d\n", msg_size);
+      }
+
+      //compare with the rcv vbits
+      for(i = 0; i < msg_size; i++){
+        dbg("DhvVBitP", "numMsg %d bindex %d vbit %d vindex %d: msg_size %d  local 0x%02x -  rcv  0x%02x \n",numMsg, bindex, i, vindex, msg_size ,vbit[vindex*maxDataLength+i],rcv_dvbmsg->vbit[i]);
+        if(vbit[vindex*maxDataLength + i] != rcv_dvbmsg->vbit[i]){
+          version = rcv_dvbmsg->vbit[i]^vbit[vindex*maxDataLength + i];
+          mask = 1;
+          if(version != 0){
+            dbg("DhvVBitP", "There is a difference \n");
+            isDiff = TRUE;
+            for(j = 0; j < VBIT_LENGTH; j++){
+              if((version & mask) != 0){
+                diffIndex = (VBIT_LENGTH -j) + VBIT_LENGTH*i + vindex*maxDataLength - 1 ;
+                dbg("DhvVBitP", "Detect difference at %d, %d %d  %d %d \n", diffIndex, i, j, vindex, maxDataLength);								
+
+                diffKey = call DhvHelp.indexToKey(diffIndex);
+                call VectorLogic.setItem(diffKey);
+              }
+              mask = mask << 1;
+            }
+          } 
+        }
+      }
+
+      //reset this bit
+      call VBitLogic.unsetVBitIndex(bindex);
+
+      if((isDiff == FALSE)){
+        bitIndexValue = call VBitLogic.getVBitState();
+        if(bitIndexValue == 0){
+          //tell DhvLogic to send the next bindex
+          bindex++;
+          dbg("DhvVBitP", "No Difference detected, move to bindex %d \n", bindex );
+          call VBitLogic.setVBitIndex(bindex);						
+        }
+      }else{
+        dbg("DhvVBitP","difference detected, reset to 0 \n");
+      }	
+    }	
+  }
+}
diff --git a/tos/lib/net/dhv/DhvVectorC.nc b/tos/lib/net/dhv/DhvVectorC.nc
new file mode 100755
index 00000000..7f14e558
--- /dev/null
+++ b/tos/lib/net/dhv/DhvVectorC.nc
@@ -0,0 +1,35 @@
+/**
+ * DHV Vector Message Configuration
+ *
+ * Define interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV modules.
+ * @modified 8/28/2008  Took the source code from DIP.
+ **/
+
+configuration DhvVectorC {
+  provides interface DhvDecision;
+
+  uses interface DhvSend as VectorSend;
+  uses interface DhvReceive as VectorReceive;
+  uses interface DhvLogic as VectorLogic;
+	uses interface DhvLogic as DataLogic;
+  uses interface DhvHelp;
+}
+
+implementation {
+  components DhvVectorP;
+  DhvDecision = DhvVectorP;
+  VectorSend = DhvVectorP;
+  VectorReceive = DhvVectorP;
+  DhvHelp = DhvVectorP;
+  VectorLogic = DhvVectorP.VectorLogic;
+	DataLogic   = DhvVectorP.DataLogic;
+  components RandomC;
+  DhvVectorP.Random -> RandomC;
+
+}
diff --git a/tos/lib/net/dhv/DhvVectorP.nc b/tos/lib/net/dhv/DhvVectorP.nc
new file mode 100755
index 00000000..f909bda7
--- /dev/null
+++ b/tos/lib/net/dhv/DhvVectorP.nc
@@ -0,0 +1,157 @@
+/**
+ * DHV Vector Message Configuration
+ *
+ * Define interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV modules.
+ * @modified 8/28/2008  Took the source code from DIP.
+ **/
+
+#include <Dhv.h>
+
+module DhvVectorP {
+  provides interface DhvDecision;
+
+  uses interface DhvSend as VectorSend;
+  uses interface DhvReceive as VectorReceive;
+  uses interface DhvLogic as VectorLogic;
+  uses interface DhvLogic as DataLogic;
+  uses interface DhvHelp;
+  uses interface Random;
+}
+
+implementation {
+  uint8_t commRate = 0;
+
+  int myComparator(const void* a, const void* b);
+
+  command uint8_t DhvDecision.getCommRate() {
+    return commRate;
+  }
+
+  command void DhvDecision.resetCommRate() {
+    commRate = 0;
+  }
+
+  command error_t DhvDecision.send() {
+    dhv_index_t i, j;
+    dhv_key_t sendkey;
+    bool* keyvector;
+    dhv_msg_t* dmsg;
+    dhv_vector_msg_t* dvmsg;
+    error_t status;
+
+    dbg("DhvVectorP", "prepare to send vector out \n");
+
+    dmsg = call VectorSend.getPayloadPtr();
+    if(dmsg == NULL) {
+      return FAIL;
+    }
+
+    keyvector = call VectorLogic.allItem();
+    dmsg->type = ID_DHV_VECTOR;
+    dvmsg = (dhv_vector_msg_t*) dmsg->content;
+
+    //dvmsg->unitLen = DHV_VECTOR_ENTRIES_PER_PACKET;
+
+    //TODO: need to check for concurrency in here
+    i = 0;
+    for(j = 0; j < UQCOUNT_DHV; j++){
+      if(keyvector[j] > ID_DHV_NO){
+        sendkey = call DhvHelp.indexToKey(j);
+
+        /*if(keyvector[j] == ID_DHV_REQ){
+          dbg("DhvVectorP", " keyvector %d == %d \n", keyvector[j], ID_DHV_REQ);
+          dmsg->type = ID_DHV_VECTOR_REQ;
+          }*/
+
+        if(i < DHV_VECTOR_ENTRIES_PER_PACKET) {
+          dvmsg->vector[i] = sendkey;
+          dvmsg->vector[i+1] = call DhvHelp.keyToVersion(sendkey);
+          dbg("DhvVectorP","diff vector 0x%08x  0x%08x %d %d \n",dvmsg->vector[i] ,  dvmsg->vector[i+1], j, keyvector[j]);
+          i = i + 2;
+        }else{ break; }		
+      }
+    }
+
+    dvmsg->unitLen = i;
+
+    //TODO: need to fix
+    //	dbg("DhvVectorP", "Sending vector message out ...unitLen 0x%02x \n", dvmsg->unitLen);
+    status = call VectorSend.send(sizeof(dhv_msg_t) + sizeof(dhv_vector_msg_t) +
+        (i*sizeof(uint32_t)));
+
+    i = 0;
+    dbg("DhvVectorP","Send status %d vs FALSE %d \n", status, FALSE);
+
+    if(status == SUCCESS){dbg("DhvVectorP","status == SUCCESS\n");}
+    if(status == FAIL){dbg("DhvVectorP","status == FAIL\n");}
+
+    //TODO: need to check for actual send status here 
+    if(TRUE)
+    {
+      dbg("DhvVectorP", "Send msg successfully \n");			
+      for(j = 0; j < UQCOUNT_DHV; j++){
+        if(keyvector[j] > ID_DHV_NO){
+          sendkey = call DhvHelp.indexToKey(j);
+          if(i < DHV_VECTOR_ENTRIES_PER_PACKET) {
+            call VectorLogic.unsetItem(sendkey);
+            i = i + 2;
+          }else{
+            break;
+          }			
+        }
+      }
+    }
+
+    dbg("DhvVectorP", "Sent vector message out ...unitLen %d \n", dvmsg->unitLen);
+    return SUCCESS;	
+  }
+
+  /*TODO: a callback event to remove the sent vectors*/
+  event void VectorReceive.receive(void* payload, uint8_t len) {
+    dhv_vector_msg_t* dvmsg;
+    dhv_msg_t* dmsg;
+
+    uint8_t unitlen;
+    uint8_t i;
+    uint8_t type;
+    uint32_t vectorkey;
+    uint32_t vectorver;
+    uint32_t myver;
+
+    commRate  = commRate + 1;        	
+    dmsg  = (dhv_msg_t*) payload; 
+    type = dmsg->type;
+
+    dvmsg = (dhv_vector_msg_t*) dmsg->content;
+    unitlen = dvmsg->unitLen;
+
+    dbg("DhvVectorP", "Receive vector msg len %u  unitlen 0x%02x  0x%02x \n", len, unitlen, dvmsg->unitLen);			
+
+    for(i = 0; i < unitlen; i += 2) {
+      vectorkey = dvmsg->vector[i];
+      vectorver = dvmsg->vector[i+1];
+      myver = call DhvHelp.keyToVersion(vectorkey);
+      dbg("DhvVectorP", "key 0x%08x  version 0x%08x myver 0x%08x \n", vectorkey, vectorver, myver);
+      // TODO: handle the invalid versions
+
+      if(myver < vectorver) {
+        dbg("DhvVectorP", "I have an older version -> setItem \n");
+        call VectorLogic.setItem(vectorkey);
+      }
+      else if(myver > vectorver) {
+        dbg("DhvVectorP", "I have a newer version -> Data.setItem \n");
+        call DataLogic.setItem(vectorkey);
+      }
+      else{
+        dbg("DhvVectorP", "Request msg and I have the same version -> keep quite \n");
+        call VectorLogic.unsetItem(vectorkey);					
+      }
+    }
+  }
+}
diff --git a/tos/lib/net/dhv/DhvVersionC.nc b/tos/lib/net/dhv/DhvVersionC.nc
new file mode 100755
index 00000000..7b7f320d
--- /dev/null
+++ b/tos/lib/net/dhv/DhvVersionC.nc
@@ -0,0 +1,29 @@
+/**
+ * DHV Vector Message Configuration
+ *
+ * Define interfaces and components.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV modules.
+ * @modified 8/28/2008  Took the source code from DIP.
+ **/
+
+#include <Dhv.h>
+
+configuration DhvVersionC {
+  provides interface DhvHelp;
+  provides interface DisseminationUpdate<dhv_data_t>[dhv_key_t key];
+	provides interface DhvCache as DataCache;
+	provides interface DhvCache as VectorCache; 
+}
+
+implementation {
+  components DhvVersionP;
+  DhvHelp = DhvVersionP;
+  DisseminationUpdate = DhvVersionP;
+	DataCache = DhvVersionP.DhvDataCache;
+	VectorCache = DhvVersionP.DhvVectorCache;
+}
diff --git a/tos/lib/net/dhv/DhvVersionP.nc b/tos/lib/net/dhv/DhvVersionP.nc
new file mode 100755
index 00000000..0df65c1f
--- /dev/null
+++ b/tos/lib/net/dhv/DhvVersionP.nc
@@ -0,0 +1,321 @@
+/**
+ * DHV Version Check Module
+ *
+ * Module checks version of the data item.
+ * details on the working of the parameters, please refer to Thanh Dang et al.,
+ * "DHV: A Code Consistency Maintenance Protocol for Multi-Hop Wireless Sensor
+ * Networks" EWSN 09.
+ *
+ * @author Thanh Dang
+ * @author Seungweon Park
+ *
+ * @modified 1/3/2009   Added meaningful documentation.
+ * @modified 8/28/2008  Defined DHV modules.
+ * @modified 8/28/2008  Took the source code from DIP.
+ **/
+
+module DhvVersionP {
+  provides interface DhvHelp;
+  provides interface DisseminationUpdate<dhv_data_t>[dhv_key_t key];
+	provides interface DhvCache as DhvDataCache;
+  provides interface DhvCache as DhvVectorCache;
+}
+
+implementation {
+
+  // keys are ordered from smallest to largest.
+  dhv_key_t keys[UQCOUNT_DHV];
+  dhv_version_t versions[UQCOUNT_DHV];
+  dhv_index_t count = 0;
+
+  //keep track of task
+  uint8_t data_to_send[UQCOUNT_DHV];
+  uint8_t vector_to_send[UQCOUNT_DHV];
+  uint8_t vbit[(UQCOUNT_DHV == 0)?0:((UQCOUNT_DHV-1)/VBIT_LENGTH +1)];
+
+/*utility for debugging purposes */
+	void printDataStatus()
+	{
+		dhv_index_t i;
+
+		for(i = 0; i < UQCOUNT_DHV; i++){
+			dbg("DhvVersionP", "Data Status %d: %u \n",i, data_to_send[i]);
+		}
+	}
+
+
+	void printVectorStatus()
+	{
+		dhv_index_t i;
+
+		for(i = 0; i < UQCOUNT_DHV; i++){
+			dbg("DhvVersionP", "T Vector Status %d: %u \n",i, vector_to_send[i]);
+		}
+	}
+
+	
+	void printVersionStatus()
+	{
+		dhv_index_t i;
+
+		for(i = 0; i < UQCOUNT_DHV; i++){
+			dbg("DhvVersionP", "Version Status %d: 0x%08x \n",i, versions[i]);
+		}
+	}
+
+
+  /*DhvDataCache interface implementation */
+	command void DhvDataCache.addItem(dhv_key_t key){
+		dhv_index_t i;
+	  
+		dbg("DhvVersionP", "Add Item to data vector key %d\n", i);	
+		i = call DhvHelp.keyToIndex(key);
+		data_to_send[i] = ID_DHV_ADS;
+		printDataStatus();
+	}
+
+	command void DhvDataCache.addReqItem(dhv_key_t key){
+		dhv_index_t i;
+	  
+		dbg("DhvVersionP", "Add Req Item to data vector key %d\n", i);	
+		i = call DhvHelp.keyToIndex(key);
+		data_to_send[i] = ID_DHV_REQ;
+		printDataStatus();
+	}
+
+	command void DhvDataCache.removeItem(dhv_key_t key){
+		dhv_index_t i;
+
+		i = call DhvHelp.keyToIndex(key);
+		data_to_send[i] = ID_DHV_NO;
+		
+		dbg("DhvVersionP", "Remove Item from data vector key %d\n", i);	
+		printDataStatus();
+	}
+
+	command bool DhvDataCache.hasItemToSend(){
+		dhv_index_t i;
+
+		for(i = 0; i < UQCOUNT_DHV; i++){
+			if(data_to_send[i] > ID_DHV_NO){return TRUE;}
+		}
+		return FALSE;
+	}
+
+	command uint8_t* DhvDataCache.allItem(){
+		return data_to_send;
+	}
+	
+	command uint8_t DhvDataCache.nextItem(){
+		dhv_index_t i;
+		for(i = 0; i < UQCOUNT_DHV; i++){
+			if(data_to_send[i] > ID_DHV_NO ){
+				return i;
+			}
+		}
+		return UQCOUNT_DHV;
+	}
+
+	command void DhvDataCache.removeAll(){
+		dhv_index_t i;
+
+		for(i=0; i < UQCOUNT_DHV; i++){
+			data_to_send[i] = ID_DHV_NO;
+		}
+	}
+
+	/*vector cache */
+	command void DhvVectorCache.addItem(dhv_key_t key){
+		dhv_index_t i;
+
+		i = call DhvHelp.keyToIndex(key);
+		vector_to_send[i] = ID_DHV_ADS;
+		
+		dbg("DhvVersionP", "Add Item to vector_to_send index %d\n", i);
+		printVectorStatus();
+	}
+
+	command void DhvVectorCache.addReqItem(dhv_key_t key){
+		dhv_index_t i;
+
+		i = call DhvHelp.keyToIndex(key);
+		vector_to_send[i] = ID_DHV_ADS;
+		
+		dbg("DhvVersionP", "Add Item to vector_to_send index %d\n", i);
+		printVectorStatus();
+	}
+
+	command void DhvVectorCache.removeItem(dhv_key_t key){
+		dhv_index_t i;
+
+		i = call DhvHelp.keyToIndex(key);
+		vector_to_send[i] = ID_DHV_NO;
+		
+		dbg("DhvVersionP", "Remove Item from vector_to_send index %d\n", i);
+		printVectorStatus();
+	}
+
+
+	command bool DhvVectorCache.hasItemToSend(){
+		dhv_index_t i;
+
+		for(i = 0; i < UQCOUNT_DHV; i++){
+			if(vector_to_send[i] > ID_DHV_NO){return TRUE;}
+		}
+		return FALSE;
+	}
+
+  command uint8_t* DhvVectorCache.allItem(){
+		return vector_to_send;
+	}
+
+
+	command uint8_t DhvVectorCache.nextItem(){
+		dhv_index_t i;
+
+		for(i = 0; i < UQCOUNT_DHV; i++){
+			if(vector_to_send[i] > ID_DHV_NO){
+				return i;
+			}
+		}
+		return UQCOUNT_DHV;
+	}
+
+
+	command void DhvVectorCache.removeAll(){
+		dhv_index_t i;
+
+		for(i=0; i < UQCOUNT_DHV; i++){
+			vector_to_send[i] = ID_DHV_NO;
+		}
+	}
+
+
+  command void DhvHelp.registerKey(dhv_key_t key) {
+    keys[count] = key;
+    count = count + 1;
+    if(count == UQCOUNT_DHV) {
+      dbg("DhvVersionP","Key registration complete!\n");
+    }
+		//printVersionStatus();
+  }
+
+  command void DisseminationUpdate.change[dhv_key_t key](dhv_data_t* val) {
+    dhv_index_t i;
+    dhv_version_t ver;
+
+		dbg("DhvVersioP", "Updateing version for key %d \n", key);
+    i = call DhvHelp.keyToIndex(key);
+    ver = versions[i];
+    ver++;
+    versions[i] = ver;
+		printVersionStatus();
+  }
+
+  command dhv_index_t DhvHelp.keyToIndex(dhv_key_t key) {
+    dhv_index_t answer;
+    dhv_index_t i;
+
+    answer = DHV_UNKNOWN_INDEX;
+    // linear search for now since it's easier
+
+    for(i = 0; i < UQCOUNT_DHV; i++) {
+      if(keys[i] == key) { 
+				answer = i;
+				break;
+      }
+    }
+    dbg("DhvVersionP", "Converting key %x to index %u\n", key, answer);
+    return answer;
+  }
+
+  command dhv_key_t DhvHelp.indexToKey(dhv_index_t ind) {
+    return keys[ind];
+  }
+
+  command dhv_version_t DhvHelp.keyToVersion(dhv_key_t key) {
+    dhv_index_t i;
+    i = call DhvHelp.keyToIndex(key);
+    return versions[i];
+  }
+
+  command void DhvHelp.setVersion(dhv_key_t key, dhv_version_t ver) {
+    dhv_index_t i;
+    i = call DhvHelp.keyToIndex(key);
+    versions[i] = ver;
+    dbg("DhvVersionP","Setting key %x at index %u to version 0x%08x\n", key, i, ver);
+  }
+
+  command dhv_version_t* DhvHelp.getAllVersions() {
+    return versions;
+  }
+
+	command uint32_t DhvHelp.computeHash(uint8_t left, uint8_t right, uint32_t salt) {
+     dhv_index_t i;
+     uint32_t hashValue = salt;
+     uint8_t *sequence;
+     if(right <= left) return 0;
+     sequence = ((uint8_t*) (versions + left)); 
+     for(i = 0; i <= (right-left-1)*sizeof(dhv_version_t); i++) {
+       hashValue += sequence[i];
+       hashValue += (hashValue << 10);
+       hashValue ^= (hashValue >> 6);
+     }
+     hashValue += (hashValue << 3);
+     hashValue ^= (hashValue >> 11);
+     hashValue += (hashValue << 15);
+     return hashValue;
+   }
+
+ command uint8_t* DhvHelp.getVBits(uint32_t bindex){
+	dhv_version_t version;
+	uint8_t cur_byte;
+	dhv_index_t i,j;
+	
+
+	j = 0;
+	version = 0;
+	cur_byte = 0;
+
+	dbg("DhvVersionP", "getVBits at index %d \n", bindex);
+	printVersionStatus();
+
+	for(i = 1; i <= UQCOUNT_DHV; i++){
+      version = versions[i-1];
+			//dbg("DhvVersionP", "version %d 0x%08x \n", i, version);
+      version = (version >>(bindex-1)) << (DHV_VERSION_LENGTH*8-1) >> (j + 24); //get the bindex bit
+
+			//dbg("DhvVersionP", "shifted version 1 by %d :  0x%08x   -> 0x%08x : %d \n", VBIT_LENGTH-1, versions[i-1], version, j);
+      cur_byte = cur_byte | version; 
+			//dbg("DhvVersionP", "shifted version 2  0x%08x   -> 0x%08x : %d  cur_byte 0x%08x \n\n\n", versions[i-1], version, j, cur_byte);
+      j++;
+
+      if(j == VBIT_LENGTH){  
+        //reset j
+        j = 0;
+        vbit[(i-1)/VBIT_LENGTH] = cur_byte;
+				dbg("DhvVersionP", "vertical bits %d  0x%02x 0x%02x \n", (i-1)/VBIT_LENGTH, cur_byte, vbit[(i-1)/VBIT_LENGTH]);
+        cur_byte = 0;
+      }   
+    }
+		
+		//debug
+		for(i= 0; i < sizeof(vbit); i++){
+			dbg("DhvVersionP", "vbit %d -> 0x%02x \n", i, vbit[i]);
+		}
+
+		return vbit;   		
+ 	}
+
+	command dhv_version_t DhvHelp.getHSum(){
+		dhv_version_t hsum;
+		dhv_index_t i;
+		hsum = versions[0];
+
+		for(i =1 ; i < UQCOUNT_DHV; i++){
+			hsum = hsum^versions[i];
+		}
+		return hsum;
+	}
+
+}
diff --git a/tos/lib/net/dhv/DisseminationC.nc b/tos/lib/net/dhv/DisseminationC.nc
new file mode 100755
index 00000000..989eca94
--- /dev/null
+++ b/tos/lib/net/dhv/DisseminationC.nc
@@ -0,0 +1,11 @@
+
+#include <Dhv.h>
+
+configuration DisseminationC {
+  provides interface StdControl;
+}
+
+implementation {
+  components DhvLogicC;
+  StdControl = DhvLogicC;
+}
diff --git a/tos/lib/net/dhv/DisseminatorC.nc b/tos/lib/net/dhv/DisseminatorC.nc
new file mode 100755
index 00000000..8e1917b4
--- /dev/null
+++ b/tos/lib/net/dhv/DisseminatorC.nc
@@ -0,0 +1,77 @@
+#include <Dhv.h>
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminatorC component holds and synchronizes a single value
+ * of a chosen type, and identifies that value by a chosen 16-bit key.
+ * Different nodes should use the same key for the same value.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @param t the type of the object that will be disseminated
+ * @param key the 16-bit identifier of the disseminated object
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2009-08-22 08:24:06 $
+ */
+
+generic configuration DisseminatorC(typedef t, dhv_key_t key) {
+  provides interface DisseminationValue<t>;
+  provides interface DisseminationUpdate<t>;
+}
+implementation {
+  enum {
+    JUST_NEED_COUNT = UQ_DHV
+  };
+
+  components new DisseminatorP(t, key);
+  DisseminationValue = DisseminatorP.AppDisseminationValue;
+  DisseminationUpdate = DisseminatorP.AppDisseminationUpdate;
+
+  components LedsC;
+  DisseminatorP.Leds -> LedsC;
+
+  components DhvLogicC;
+  DisseminatorP.DhvDisseminationUpdate -> DhvLogicC.DisseminationUpdate[key];
+
+  components DhvVersionC;
+  DisseminatorP.DhvHelp -> DhvVersionC;
+
+  components MainC;
+  MainC.SoftwareInit -> DisseminatorP;
+
+  components DhvDataC;
+  DhvDataC.DisseminationUpdate[key] -> DisseminatorP.DataDisseminationUpdate;
+  DhvDataC.DisseminationValue[key] -> DisseminatorP.DataDisseminationValue;
+}
diff --git a/tos/lib/net/dhv/DisseminatorP.nc b/tos/lib/net/dhv/DisseminatorP.nc
new file mode 100755
index 00000000..839258f5
--- /dev/null
+++ b/tos/lib/net/dhv/DisseminatorP.nc
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminatorP module holds and synchronizes a single value of a
+ * chosen type.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @param t the type of the object that will be disseminated
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2009-08-22 08:24:06 $
+ */
+
+generic module DisseminatorP(typedef t, dhv_key_t key) {
+  provides interface DisseminationValue<t> as AppDisseminationValue;
+  provides interface DisseminationUpdate<t> as AppDisseminationUpdate;
+  provides interface DisseminationUpdate<dhv_data_t> as DataDisseminationUpdate;
+  provides interface DisseminationValue<dhv_data_t> as DataDisseminationValue;
+
+  provides interface Init;
+
+  uses interface DisseminationUpdate<dhv_data_t> as DhvDisseminationUpdate;
+  uses interface DhvHelp;
+  uses interface Leds;
+}
+implementation {
+  dhv_data_t valueCache;
+  
+  task void signalNewData() {
+    signal AppDisseminationValue.changed();
+  }
+  
+  command error_t Init.init() {
+    call DhvHelp.registerKey(key);
+    return SUCCESS;
+  }
+
+  // A sequence number is 32 bits. The top 16 bits are an incrementing
+  // counter, while the bottom 16 bits are a unique node identifier.
+  // But versions aren't stored here.
+
+  command const t* AppDisseminationValue.get() {
+    return (t*) &valueCache;
+  }
+
+  command void AppDisseminationValue.set( const t* val ) {
+    memcpy( &valueCache, val, sizeof(t) );
+    // must signal here instead of posting task to prevent race condition
+    signal AppDisseminationValue.changed();
+  }
+
+  command void AppDisseminationUpdate.change( t* newVal ) {
+    memcpy( &valueCache, newVal, sizeof(t) );
+    /* Increment the counter and append the local node ID later. */
+    /* DhvLogicC doesn't care what the data actually is,
+       it just wants the key, so we cast it recklessly */
+    call DhvDisseminationUpdate.change((dhv_data_t*)newVal);
+    post signalNewData();
+  }
+
+  command const dhv_data_t* DataDisseminationValue.get() {
+    return (dhv_data_t*) &valueCache;
+  }
+
+  command void DataDisseminationValue.set( const dhv_data_t* val ) {  }
+
+  command void DataDisseminationUpdate.change( dhv_data_t* newVal ) {
+    memcpy( &valueCache, newVal, sizeof(dhv_data_t) );
+    // don't post the task, this came from the network
+    signal AppDisseminationValue.changed();
+  }
+
+
+  default event void AppDisseminationValue.changed() { }
+
+  default event void DataDisseminationValue.changed() { }
+
+}
diff --git a/tos/lib/net/dhv/README b/tos/lib/net/dhv/README
new file mode 100755
index 00000000..b465e6cf
--- /dev/null
+++ b/tos/lib/net/dhv/README
@@ -0,0 +1,29 @@
+
+Title: Dhv
+Author: Thanh Dang, Seungweon Park
+------------------
+
+DHV is a code consistency maintenance protocol to ensure that every node
+in a network will eventually have the same code. DHV is based on the
+simple observation that if two code versions are different, their
+corresponding version numbers often differ in only a few least significant
+bits of their binary representation. DHV allows nodes to carefully select
+and transmit only necessary bit level information to detect a newer code version
+in the network. Detail of the protocol can be found here
+
+Thanh Dang, Nirupama Bulusu, Wu-chi Feng, and Seungweon Park, 
+"DHV: A Code Consistent Maintenance Protocol for Wireless Sensor Networks.", 
+In Proceedings of EWSN 2009, Cork, Ireland, Feb 2009.
+
+Usage:
+------
+
+To use include the following in your Makefile:
+
+CFLAGS += -I$(TOSDIR)/lib/net
+CFLAGS += -I$(TOSDIR)/lib/net/dhv
+CFLAGS += -I$(TOSDIR)/lib/net/dhv/interfaces
+
+* add a following line when use BaseStation
+CFLAGS += -DTOSH_DATA_LENGTH=32
+ 
diff --git a/tos/lib/net/dhv/interfaces/DhvCache.nc b/tos/lib/net/dhv/interfaces/DhvCache.nc
new file mode 100755
index 00000000..973ca190
--- /dev/null
+++ b/tos/lib/net/dhv/interfaces/DhvCache.nc
@@ -0,0 +1,12 @@
+#include<Dhv.h>
+
+interface DhvCache{
+	command void addItem(dhv_key_t key);
+	command void addReqItem(dhv_key_t key);
+	command void removeItem(dhv_key_t key);
+	command bool hasItemToSend();
+	command uint8_t* allItem();
+	command uint8_t nextItem();
+	command void removeAll();
+}
+
diff --git a/tos/lib/net/dhv/interfaces/DhvDecision.nc b/tos/lib/net/dhv/interfaces/DhvDecision.nc
new file mode 100755
index 00000000..8580760c
--- /dev/null
+++ b/tos/lib/net/dhv/interfaces/DhvDecision.nc
@@ -0,0 +1,6 @@
+
+interface DhvDecision {
+  command uint8_t getCommRate();
+  command void resetCommRate();
+  command error_t send();
+}
diff --git a/tos/lib/net/dhv/interfaces/DhvEstimates.nc b/tos/lib/net/dhv/interfaces/DhvEstimates.nc
new file mode 100755
index 00000000..9143677d
--- /dev/null
+++ b/tos/lib/net/dhv/interfaces/DhvEstimates.nc
@@ -0,0 +1,15 @@
+
+#include <Dhv.h>
+
+interface DhvEstimates {
+  command dhv_estimate_t* getEstimates();
+  command void decEstimateByIndex(dhv_index_t i);
+  command void decEstimateByKey(dhv_key_t key);
+  command dhv_hashlen_t estimateToHashlength(dhv_estimate_t est);
+  command dhv_estimate_t hashlengthToEstimate(dhv_hashlen_t len);
+  // special event to reset trickle timer too
+  command void setDataEstimate(dhv_key_t key);
+  command void setVectorEstimate(dhv_key_t key);
+  command void setSummaryEstimateByIndex(dhv_index_t ind,
+					 dhv_estimate_t est);
+}
diff --git a/tos/lib/net/dhv/interfaces/DhvHelp.nc b/tos/lib/net/dhv/interfaces/DhvHelp.nc
new file mode 100755
index 00000000..806ebabd
--- /dev/null
+++ b/tos/lib/net/dhv/interfaces/DhvHelp.nc
@@ -0,0 +1,15 @@
+
+#include <Dhv.h>
+
+interface DhvHelp {
+  command void registerKey(dhv_key_t key);
+
+  command dhv_index_t keyToIndex(dhv_key_t key);
+  command dhv_key_t indexToKey(dhv_index_t ind);
+  command dhv_version_t keyToVersion(dhv_key_t key);
+  command void setVersion(dhv_key_t key, dhv_version_t ver);
+  command dhv_version_t* getAllVersions();
+	command dhv_version_t getHSum();
+	command uint8_t* getVBits(uint32_t bindex);
+	command uint32_t computeHash(uint8_t left, uint8_t right,uint32_t salt);	 
+}
diff --git a/tos/lib/net/dhv/interfaces/DhvLogic.nc b/tos/lib/net/dhv/interfaces/DhvLogic.nc
new file mode 100755
index 00000000..dc57e2c0
--- /dev/null
+++ b/tos/lib/net/dhv/interfaces/DhvLogic.nc
@@ -0,0 +1,9 @@
+#include<Dhv.h>
+
+interface DhvLogic{
+	command error_t setItem(dhv_key_t key);
+	command error_t setReqItem(dhv_key_t key);
+	command error_t unsetItem(dhv_key_t key);
+	command uint8_t nextItem();
+  command uint8_t * allItem();
+} 
diff --git a/tos/lib/net/dhv/interfaces/DhvNeighbour.nc b/tos/lib/net/dhv/interfaces/DhvNeighbour.nc
new file mode 100755
index 00000000..b8ea315d
--- /dev/null
+++ b/tos/lib/net/dhv/interfaces/DhvNeighbour.nc
@@ -0,0 +1,5 @@
+#include<Dhv.h>
+interface DhvNeighbour{
+	command uint8_t getNeighbourCount();
+	command void addNeighbour(uint8_t nodeId);
+}
diff --git a/tos/lib/net/dhv/interfaces/DhvReceive.nc b/tos/lib/net/dhv/interfaces/DhvReceive.nc
new file mode 100755
index 00000000..ebaeeb10
--- /dev/null
+++ b/tos/lib/net/dhv/interfaces/DhvReceive.nc
@@ -0,0 +1,4 @@
+
+interface DhvReceive {
+  event void receive(void* payload, uint8_t len);
+}
diff --git a/tos/lib/net/dhv/interfaces/DhvSend.nc b/tos/lib/net/dhv/interfaces/DhvSend.nc
new file mode 100755
index 00000000..9fef6fbe
--- /dev/null
+++ b/tos/lib/net/dhv/interfaces/DhvSend.nc
@@ -0,0 +1,6 @@
+
+interface DhvSend {
+  command error_t send(uint8_t len);
+  command void* getPayloadPtr();
+  command uint8_t maxPayloadLength();
+}
diff --git a/tos/lib/net/dhv/interfaces/DhvStateLogic.nc b/tos/lib/net/dhv/interfaces/DhvStateLogic.nc
new file mode 100755
index 00000000..9d2e71c2
--- /dev/null
+++ b/tos/lib/net/dhv/interfaces/DhvStateLogic.nc
@@ -0,0 +1,12 @@
+interface DhvStateLogic{
+	command void setDiffSummary();
+	command void setSameSummary();
+	command uint32_t getVBitState();
+	command void setVBitState(uint32_t state);
+  command void unsetVBitIndex(uint8_t dindex);
+  command uint8_t getVBitIndex();
+  command void setVBitIndex(uint8_t dindex);
+  command void setHSumStatus();
+  command void unsetHSumStatus();
+  command uint8_t getHSumStatus();
+}
diff --git a/tos/lib/net/dhv/interfaces/DhvTrickleTimer.nc b/tos/lib/net/dhv/interfaces/DhvTrickleTimer.nc
new file mode 100755
index 00000000..56739f2b
--- /dev/null
+++ b/tos/lib/net/dhv/interfaces/DhvTrickleTimer.nc
@@ -0,0 +1,98 @@
+// $Id: DhvTrickleTimer.nc,v 1.2 2010-06-29 22:07:49 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * A network trickle timer. A trickle timer has a period in the range
+ * [L, H]. After firing, the period is doubled, up to H. If the period
+ * is P, then the timer is scheduled to fire in the interval [0.5P, P]
+ * (the second half of a period). The period can be reset to L (the
+ * smallest period, and therefore the highest frequency).
+ *
+ * The timer may be suppressed. If a user of the interface has heard
+ * enough packets from other nodes that indicate its transmitting a
+ * packet would be unncessarily redundant, then the timer does not
+ * fire. The timer has a constant K and a counter C. If C &gte; K, then
+ * the timer does not fire. When an interval ends, C is reset to 0.
+ * Calling <tt>incrementCounter</tt> increments C by one.
+ *
+ * For details, refer to Levis et al., "A Self-Regulating Algorithm
+ * for Code Maintenance and Propagation in Wireless Sensor Networks,"
+ * NSDI 2004. The component providing this interface defines the
+ * constants L, H, and K.
+ *
+ * @author Philip Levis
+ * @date   Jan 7 2006
+ * @author Thanh Dang
+ * @date   Aug 5 2009
+ */ 
+
+
+interface DhvTrickleTimer {
+
+  /**
+   * Start the trickle timer. At boot, the timer period is its maximum
+   * value (H). If a protocol requires starting at the minimum value
+   * (e.g., fast start), then it should call <tt>reset</tt> before
+   * <tt>start</tt>.
+   *
+   * @return error_t SUCCESS if the timer was started, EBUSY if it is already
+   * running, and FAIL otherwise.
+   */
+  command error_t start();
+
+  /**
+   * Stop the trickle timer. This call sets the timer period to H and
+   * C to 0.
+   */
+  command void stop();
+
+  /**
+   * Reset the timer period to L. If called while the timer is
+   * running, then a new interval (of length L) begins immediately.
+   */
+  command void reset();
+
+  /**
+   * The trickle timer has fired. Signaled if C &gt; K.
+   */  
+  event void fired();
+
+  /**
+   * Compute the window size based on Dip's estimates
+   */
+  event uint32_t requestWindowSize();
+
+  /**
+   * Resets the timer period to H.
+   */
+  command void maxInterval();
+}
diff --git a/tos/lib/net/dhv/interfaces/DhvVersion.nc b/tos/lib/net/dhv/interfaces/DhvVersion.nc
new file mode 100755
index 00000000..b2b36843
--- /dev/null
+++ b/tos/lib/net/dhv/interfaces/DhvVersion.nc
@@ -0,0 +1,7 @@
+
+#include <Dhv.h>
+
+interface DhvVersion {
+  command void setVersion();
+  command void incVersion();
+}
diff --git a/tos/lib/net/dip/AMDipC.nc b/tos/lib/net/dip/AMDipC.nc
new file mode 100644
index 00000000..edac8b17
--- /dev/null
+++ b/tos/lib/net/dip/AMDipC.nc
@@ -0,0 +1,25 @@
+#include <Dip.h>
+
+configuration AMDipC {
+  provides interface DipSend;
+  provides interface DipReceive as DataReceive;
+  provides interface DipReceive as VectorReceive;
+  provides interface DipReceive as SummaryReceive;
+}
+
+implementation {
+  components AMDipP;
+  components new AMSenderC(AM_DIP) as SendC;
+  components new AMReceiverC(AM_DIP) as ReceiveC;
+
+  AMDipP.NetAMSend -> SendC.AMSend;
+  AMDipP.NetReceive -> ReceiveC.Receive;
+
+  components MainC;
+  MainC.SoftwareInit -> AMDipP.Init;
+
+  DipSend = AMDipP.DipSend;
+  DataReceive = AMDipP.DipDataReceive;
+  VectorReceive = AMDipP.DipVectorReceive;
+  SummaryReceive = AMDipP.DipSummaryReceive;
+}
diff --git a/tos/lib/net/dip/AMDipP.nc b/tos/lib/net/dip/AMDipP.nc
new file mode 100644
index 00000000..a3be418f
--- /dev/null
+++ b/tos/lib/net/dip/AMDipP.nc
@@ -0,0 +1,74 @@
+
+module AMDipP {
+  provides interface Init;
+
+  provides interface DipSend;
+  provides interface DipReceive as DipDataReceive;
+  provides interface DipReceive as DipVectorReceive;
+  provides interface DipReceive as DipSummaryReceive;
+
+  uses interface AMSend as NetAMSend;
+  uses interface Receive as NetReceive;
+
+}
+
+implementation {
+  message_t am_msg;
+  bool busy;
+
+  command error_t Init.init() {
+    busy = FALSE;
+    return SUCCESS;
+  }
+
+  command error_t DipSend.send(uint8_t len) {
+    error_t err;
+    dbg("AMDipP", "Attempting to send data in the air\n");
+    err = call NetAMSend.send(AM_BROADCAST_ADDR, &am_msg, len);
+    if(err == SUCCESS) {
+      busy = TRUE;
+    }
+    return err;
+  }
+
+  command void* DipSend.getPayloadPtr() {
+    // returns NULL if message is busy
+    if(busy) {
+      return NULL;
+    }
+    return call NetAMSend.getPayload(&am_msg, 0);
+  }
+
+  command uint8_t DipSend.maxPayloadLength() {
+    return call NetAMSend.maxPayloadLength();
+  }
+
+  event void NetAMSend.sendDone(message_t* msg, error_t err) {
+    dbg("AMDipP", "Data send successfully in the air\n");
+    if(msg == &am_msg) {
+      busy = FALSE;
+    }
+  }
+
+  event message_t* NetReceive.receive(message_t* msg, void* payload,
+				      uint8_t len) {
+    dip_msg_t* dmsg;
+    uint8_t type;
+
+    dmsg = (dip_msg_t*) payload;
+    type = dmsg->type;
+    switch(type) {
+    case ID_DIP_DATA:
+      signal DipDataReceive.receive(dmsg->content, len);
+      break;
+    case ID_DIP_VECTOR:
+      signal DipVectorReceive.receive(dmsg->content, len);
+      break;
+    case ID_DIP_SUMMARY:
+      signal DipSummaryReceive.receive(dmsg->content, len);
+      break;
+    }
+    return msg;
+  }
+
+}
diff --git a/tos/lib/net/dip/Dip.h b/tos/lib/net/dip/Dip.h
new file mode 100644
index 00000000..ca1970c8
--- /dev/null
+++ b/tos/lib/net/dip/Dip.h
@@ -0,0 +1,83 @@
+
+#ifndef __DIP_H__
+#define __DIP_H__
+
+
+#define UQ_DIP unique("DIP")
+#define UQCOUNT_DIP uniqueCount("DIP")
+
+enum {
+  DIP_TAU_LOW = 1024L,
+  DIP_TAU_HIGH = 65535L,
+  DIP_UNKNOWN_VERSION = 0xFFFFFFFF,
+  DIP_UNKNOWN_INDEX = 0xFFFF,
+  DIP_DATA_SUPPRESSION = 1,
+  DIP_ADV_SUPPRESSION = 1
+};
+
+typedef enum {
+  ID_DIP_INVALID = 0x0,
+  ID_DIP_SUMMARY = 0x1,
+  ID_DIP_VECTOR = 0x2,
+  ID_DIP_DATA = 0x3
+} dip_msgid_t;
+
+enum {
+  AM_DIP = 0x62,
+  AM_DIP_DATA_MSG = 0x62, // For MIG tool
+  AM_DIP_MSG = 0x62, // For MIG tool
+  AM_DIP_DATA = 0x62 // For MIG tool
+};
+
+typedef uint16_t dip_index_t;
+typedef uint16_t dip_key_t;
+typedef nx_uint16_t nx_dip_key_t;
+typedef uint32_t dip_version_t;
+typedef nx_uint32_t nx_dip_version_t;
+typedef uint8_t dip_estimate_t;
+typedef dip_index_t dip_hashlen_t;
+
+typedef nx_struct dip_msg {
+  nx_uint8_t type; // dip_msgid_t
+  nx_uint8_t content[0];
+} dip_msg_t;
+
+typedef nx_struct dip_data_msg {
+  nx_dip_key_t key;
+  nx_dip_version_t version;
+  nx_uint8_t size;
+  nx_uint8_t data[0];
+} dip_data_msg_t;
+
+typedef nx_struct dip_vector_msg {
+  nx_uint8_t unitLen;
+  nx_uint32_t vector[0];
+} dip_vector_msg_t;
+
+typedef nx_struct dip_summary_msg {
+  nx_uint8_t unitLen;
+  nx_uint32_t salt;
+  nx_uint32_t info[0];
+} dip_summary_msg_t;
+
+dip_estimate_t DIP_DATA_ESTIMATE;
+dip_estimate_t DIP_MAX_ESTIMATE;
+dip_estimate_t DIP_VECTOR_ESTIMATE;
+
+#define DIP_SUMMARY_ENTRIES_PER_PACKET (DIP_SUMMARY_VALUES_PER_PACKET * 3)
+#define DIP_VECTOR_ENTRIES_PER_PACKET (DIP_VECTOR_VALUES_PER_PACKET * 2)
+
+#include "qsort.c"
+
+/* TUNABLE PARAMETERS */
+
+typedef nx_struct dip_data {
+  nx_uint8_t data[16];
+} dip_data_t;
+
+enum {
+  DIP_SUMMARY_VALUES_PER_PACKET = 2,
+  DIP_VECTOR_VALUES_PER_PACKET = 2
+};
+
+#endif
diff --git a/tos/lib/net/dip/DipDataC.nc b/tos/lib/net/dip/DipDataC.nc
new file mode 100644
index 00000000..0fd2a4d9
--- /dev/null
+++ b/tos/lib/net/dip/DipDataC.nc
@@ -0,0 +1,27 @@
+
+configuration DipDataC {
+  provides interface DipDecision;
+
+  uses interface DipSend as DataSend;
+  uses interface DipReceive as DataReceive;
+
+  uses interface DisseminationUpdate<dip_data_t>[dip_key_t key];
+  uses interface DisseminationValue<dip_data_t>[dip_key_t key];
+
+  uses interface DipHelp;
+  uses interface DipEstimates;
+}
+
+implementation {
+  components DipDataP;
+  DipDecision = DipDataP;
+  DataSend = DipDataP;
+  DataReceive = DipDataP;
+  DisseminationUpdate = DipDataP;
+  DisseminationValue = DipDataP;
+  DipHelp = DipDataP;
+  DipEstimates = DipDataP;
+
+  components LedsC;
+  DipDataP.Leds -> LedsC;
+}
diff --git a/tos/lib/net/dip/DipDataP.nc b/tos/lib/net/dip/DipDataP.nc
new file mode 100644
index 00000000..27451206
--- /dev/null
+++ b/tos/lib/net/dip/DipDataP.nc
@@ -0,0 +1,107 @@
+
+#include <Dip.h>
+
+module DipDataP {
+  provides interface DipDecision;
+
+  uses interface DipSend as DataSend;
+  uses interface DipReceive as DataReceive;
+
+  uses interface DisseminationUpdate<dip_data_t>[dip_key_t key];
+  uses interface DisseminationValue<dip_data_t>[dip_key_t key];
+
+  uses interface DipHelp;
+  uses interface DipEstimates;
+
+  uses interface Leds;
+}
+
+implementation {
+  uint8_t commRate = 0;
+
+  command uint8_t DipDecision.getCommRate() {
+    return commRate;
+  }
+
+  command void DipDecision.resetCommRate() {
+    commRate = 0;
+  }
+
+  command error_t DipDecision.send() {
+    // Scan all estimates and send the highest estimate in deterministic order
+    dip_index_t i;
+    dip_index_t high_i;
+    dip_index_t high_est;
+    dip_key_t key;
+    dip_version_t ver;
+    dip_estimate_t* ests;
+    dip_msg_t* dmsg;
+    dip_data_msg_t* ddmsg;
+    const dip_data_t* data;
+
+    ests = call DipEstimates.getEstimates();
+    high_i = 0;
+    high_est = 0;
+    for(i = 0; i < UQCOUNT_DIP; i++) {
+      if(ests[i] > high_est) {
+	high_i = i;
+	high_est = ests[i];
+      }
+    }
+    key = call DipHelp.indexToKey(high_i);
+    ver = call DipHelp.keyToVersion(key);
+    data = call DisseminationValue.get[key]();
+    dmsg = (dip_msg_t*) call DataSend.getPayloadPtr();
+    if(dmsg == NULL) {
+      return FAIL;
+    }
+    ddmsg = (dip_data_msg_t*) dmsg->content;
+    dmsg->type = ID_DIP_DATA;
+
+    ddmsg->key = key;
+    ddmsg->version = ver;
+    ddmsg->size = sizeof(dip_data_t);
+    memcpy(ddmsg->data, data, sizeof(dip_data_t));
+
+    call DipEstimates.decEstimateByKey(key);
+    dbg("DipDataP", "Data sent with key %x and version %08x\n", key, ver);
+    return call DataSend.send(sizeof(dip_data_msg_t) + sizeof(dip_msg_t) + sizeof(dip_data_t));
+  }
+  
+  event void DataReceive.receive(void* payload, uint8_t len) {
+    dip_key_t key;
+    dip_version_t myVer;
+    dip_version_t msgVer;
+    dip_data_msg_t* ddmsg;
+
+    commRate = commRate + 1;
+
+    ddmsg = (dip_data_msg_t*) payload;
+    key = ddmsg->key;
+    msgVer = ddmsg->version;
+    myVer = call DipHelp.keyToVersion(key);
+    dbg("DipDataP", "Data rcved with key %x and version %08x\n", key, msgVer);
+
+    // TODO: handle the invalid versions
+    if(myVer < msgVer) {
+      call DisseminationUpdate.change[key]((dip_data_t*)ddmsg->data);
+      call DipHelp.setVersion(key, msgVer);
+      call DipEstimates.setDataEstimate(key);
+    }
+    else if (myVer > msgVer) {
+      call DipEstimates.setDataEstimate(key);
+    }
+    else {
+      call DipEstimates.decEstimateByKey(key);
+    }
+  }
+  
+  event void DisseminationValue.changed[dip_key_t key]() {  }
+  
+ default command const dip_data_t* DisseminationValue.get[dip_key_t key]() {
+   return NULL;
+ }
+
+ default command void DisseminationUpdate.change[dip_key_t key](dip_data_t* val) { }
+  
+}
diff --git a/tos/lib/net/dip/DipLogicC.nc b/tos/lib/net/dip/DipLogicC.nc
new file mode 100644
index 00000000..8fad75d4
--- /dev/null
+++ b/tos/lib/net/dip/DipLogicC.nc
@@ -0,0 +1,48 @@
+
+#include <Dip.h>
+
+configuration DipLogicC {
+  provides interface DisseminationUpdate<dip_data_t>[dip_key_t key];
+
+  provides interface StdControl;
+}
+
+implementation {
+  components DipLogicP;
+  DisseminationUpdate = DipLogicP;
+  StdControl = DipLogicP;
+
+  components MainC;
+  MainC.SoftwareInit -> DipLogicP;
+  DipLogicP.Boot -> MainC;
+
+  components DipTrickleMilliC;
+  DipLogicP.DipTrickleTimer -> DipTrickleMilliC;
+
+  components DipVersionC;
+  DipLogicP.VersionUpdate -> DipVersionC;
+  DipLogicP.DipHelp -> DipVersionC;
+
+  components AMDipC;
+
+  components DipDataC;
+  DipLogicP.DipDataDecision -> DipDataC;
+  DipDataC.DataSend -> AMDipC.DipSend;
+  DipDataC.DataReceive -> AMDipC.DataReceive;
+  DipDataC.DipHelp -> DipVersionC;
+  DipDataC.DipEstimates -> DipLogicP;
+
+  components DipVectorC;
+  DipLogicP.DipVectorDecision -> DipVectorC;
+  DipVectorC.VectorSend -> AMDipC.DipSend;
+  DipVectorC.VectorReceive -> AMDipC.VectorReceive;
+  DipVectorC.DipHelp -> DipVersionC;
+  DipVectorC.DipEstimates -> DipLogicP;
+
+  components DipSummaryC;
+  DipLogicP.DipSummaryDecision -> DipSummaryC;
+  DipSummaryC.SummarySend -> AMDipC.DipSend;
+  DipSummaryC.SummaryReceive -> AMDipC.SummaryReceive;
+  DipSummaryC.DipHelp -> DipVersionC;
+  DipSummaryC.DipEstimates -> DipLogicP;
+}
diff --git a/tos/lib/net/dip/DipLogicP.nc b/tos/lib/net/dip/DipLogicP.nc
new file mode 100644
index 00000000..640c51be
--- /dev/null
+++ b/tos/lib/net/dip/DipLogicP.nc
@@ -0,0 +1,299 @@
+
+#include <Dip.h>
+
+module DipLogicP {
+  provides interface DisseminationUpdate<dip_data_t>[dip_key_t key];
+  provides interface DipEstimates;
+
+  provides interface Init;
+  provides interface StdControl;
+
+  uses interface Boot;
+  uses interface DipTrickleTimer;
+  uses interface DisseminationUpdate<dip_data_t> as VersionUpdate[dip_key_t key];
+  uses interface DipDecision as DipDataDecision;
+  uses interface DipDecision as DipVectorDecision;
+  uses interface DipDecision as DipSummaryDecision;
+  uses interface DipHelp;
+}
+
+implementation {
+  uint32_t windowSize;
+  dip_hashlen_t totalPossible;
+
+  dip_estimate_t estimates[UQCOUNT_DIP];
+
+  uint16_t diplog(uint16_t base, uint16_t num);
+  uint16_t dipexp(uint16_t base, uint16_t expt);
+  dip_estimate_t getDataEstimate(dip_hashlen_t len);
+  dip_estimate_t getMaxEstimate(dip_hashlen_t len);
+  uint8_t sendDecision();
+
+  command error_t Init.init() {
+    windowSize = DIP_TAU_HIGH;
+    DIP_DATA_ESTIMATE = getDataEstimate(UQCOUNT_DIP);
+    DIP_MAX_ESTIMATE = getMaxEstimate(UQCOUNT_DIP);
+    DIP_VECTOR_ESTIMATE = DIP_DATA_ESTIMATE - 1;
+    totalPossible = call DipEstimates.estimateToHashlength(0);
+    dbg("DipLogicP", "Real Total: %u, Dip Total: %u\n", UQCOUNT_DIP, totalPossible);
+    if(totalPossible < UQCOUNT_DIP) {
+      DIP_DATA_ESTIMATE++;
+      DIP_MAX_ESTIMATE++;
+      DIP_VECTOR_ESTIMATE++;
+      totalPossible = call DipEstimates.estimateToHashlength(0);
+    }
+    dbg("DipLogicP", "Real Total: %u, DIP New Total: %u\n", UQCOUNT_DIP, totalPossible);
+    dbg("DipLogicP","DATA_ESTIMATE initialized to %u\n", DIP_DATA_ESTIMATE);
+    dbg("DipLogicP","MAX_ESTIMATE initialized to %u\n", DIP_MAX_ESTIMATE);
+    dbg("DipLogicP","VECT_ESTIMATE initialized to %u\n", DIP_VECTOR_ESTIMATE);
+    dbg("DipLogicP","DIP ready\n");
+
+    return SUCCESS;
+  }
+
+  event void Boot.booted() {
+
+  }
+
+  command error_t StdControl.start() {
+    return call DipTrickleTimer.start();
+  }
+
+  command error_t StdControl.stop() {
+    call DipTrickleTimer.stop();
+    return SUCCESS;
+  }
+
+  command void DisseminationUpdate.change[dip_key_t key](dip_data_t* val) {
+    dip_index_t i;
+
+    dbg("DipLogicP","App notified key %x is new\n", key);
+    i = call DipHelp.keyToIndex(key);
+#ifndef DIP_JOINTEST
+    estimates[i] = DIP_DATA_ESTIMATE;
+#endif
+    call VersionUpdate.change[key](val);
+    call DipTrickleTimer.reset();
+  }
+
+  event uint32_t DipTrickleTimer.requestWindowSize() {
+    dip_index_t i;
+    dip_estimate_t max = 0;
+
+    for(i = 0; i < UQCOUNT_DIP; i++) {
+      if(estimates[i] > 0) {
+	max = estimates[i];
+	windowSize = DIP_TAU_LOW;
+	break;
+      }
+    }
+    if(max == 0) {
+      windowSize = windowSize << 1;
+      if(windowSize > DIP_TAU_HIGH) {
+	windowSize = DIP_TAU_HIGH;
+      }
+    }
+
+    dbg("DipLogicP", "Window size requested, give %u\n", windowSize);
+    return windowSize;
+  }
+
+  event void DipTrickleTimer.fired() {
+    dip_index_t i;
+    uint8_t decision;
+
+    dbg("DipLogicP","Trickle Timer fired!\n");
+
+    for(i = 0; i < UQCOUNT_DIP; i++) {
+      dbg("DipLogicP","Index-%u Estimate-%u\n", i, estimates[i]);
+    }
+
+    decision = sendDecision();
+
+    switch(decision) {
+    case ID_DIP_INVALID:
+      dbg("DipLogicP", "Decision to SUPPRESS\n");
+      break;
+    case ID_DIP_SUMMARY:
+      dbg("DipLogicP", "Decision to SUMMARY\n");
+      call DipSummaryDecision.send();
+      break;
+    case ID_DIP_VECTOR:
+      dbg("DipLogicP", "Decision to VECTOR\n");
+      call DipVectorDecision.send();
+      break;
+    case ID_DIP_DATA:
+      dbg("DipLogicP", "Decision to DATA\n");
+      call DipDataDecision.send();
+      break;
+    }
+    call DipDataDecision.resetCommRate();
+    call DipVectorDecision.resetCommRate();
+    call DipSummaryDecision.resetCommRate();
+  }
+
+  command dip_estimate_t* DipEstimates.getEstimates() {
+    return estimates;
+  }
+
+  command void DipEstimates.decEstimateByIndex(dip_index_t i) {
+    if(estimates[i] != 0) {
+      estimates[i] = estimates[i] - 1;
+    }
+  }
+
+  command void DipEstimates.decEstimateByKey(dip_key_t key) {
+    dip_index_t i;
+
+    i = call DipHelp.keyToIndex(key);
+    call DipEstimates.decEstimateByIndex(i);
+  }
+
+  command dip_estimate_t DipEstimates.hashlengthToEstimate(dip_hashlen_t len) {
+    if(len == UQCOUNT_DIP) {
+      len = totalPossible;
+    }
+    return DIP_MAX_ESTIMATE - diplog(DIP_SUMMARY_VALUES_PER_PACKET, len);
+  }
+
+  command dip_hashlen_t DipEstimates.estimateToHashlength(dip_estimate_t est) {
+    uint8_t expt, base;
+    uint16_t val;
+
+    base = DIP_SUMMARY_VALUES_PER_PACKET;
+    expt = DIP_MAX_ESTIMATE - est;
+    val = dipexp(base, expt);
+    
+    if(val > UQCOUNT_DIP) { // bring length back down if over UQCOUNT_DIP
+      val = UQCOUNT_DIP;
+    }
+
+    return val;
+  }
+
+  /* Calculation functions */
+  uint16_t diplog(uint16_t base, uint16_t num) {
+    uint8_t counter;
+
+    counter = 0;
+    while(num != 0) {
+      num = num / base;
+      counter++;
+    }
+    return counter - 1;
+  }
+
+  command void DipEstimates.setDataEstimate(dip_key_t key) {
+    dip_index_t i;
+
+    i = call DipHelp.keyToIndex(key);
+    estimates[i] = DIP_DATA_ESTIMATE;
+    call DipTrickleTimer.reset();
+  }
+
+  command void DipEstimates.setVectorEstimate(dip_key_t key) {
+    dip_index_t i;
+    
+    i = call DipHelp.keyToIndex(key);
+    if(estimates[i] < DIP_VECTOR_ESTIMATE) {
+      estimates[i] = DIP_VECTOR_ESTIMATE;
+    }
+    call DipTrickleTimer.reset();
+  }
+
+  command void DipEstimates.setSummaryEstimateByIndex(dip_index_t ind,
+						      dip_estimate_t est) {
+    if(estimates[ind] < est) {
+      estimates[ind] = est;
+    }
+    call DipTrickleTimer.reset();
+  }
+
+  uint16_t dipexp(uint16_t base, uint16_t expt) {
+    uint16_t ans;
+
+    ans = 1;
+    while(expt > 0) {
+      if((expt & 1) == 0) {
+	base = base * base;
+	expt = expt >> 1;
+      }
+      else {
+	ans = ans * base;
+	expt = expt - 1;
+      }
+    }
+    return ans;
+  }
+
+  dip_estimate_t getDataEstimate(dip_hashlen_t len) {
+    dip_estimate_t h_total;
+    dip_estimate_t v_total;
+
+    h_total = diplog(DIP_SUMMARY_VALUES_PER_PACKET, len);
+    v_total = diplog(DIP_SUMMARY_VALUES_PER_PACKET,
+		     DIP_VECTOR_VALUES_PER_PACKET);
+
+    return h_total - v_total + 1;
+  }
+
+  dip_estimate_t getMaxEstimate(dip_hashlen_t len) {
+    return diplog(DIP_SUMMARY_VALUES_PER_PACKET, len);
+  }
+  
+  uint8_t sendDecision() {
+    dip_estimate_t highEst;
+    dip_estimate_t est;
+    uint8_t dataCommRate;
+    uint8_t vectorCommRate;
+    uint8_t summaryCommRate;
+    dip_estimate_t* allEsts;
+    dip_index_t i;
+
+    uint16_t E, D, L, V, C;
+
+    allEsts = call DipEstimates.getEstimates();
+    highEst = 0;
+    dataCommRate = call DipDataDecision.getCommRate();
+    vectorCommRate = call DipVectorDecision.getCommRate();
+    summaryCommRate = call DipSummaryDecision.getCommRate();
+
+    if(dataCommRate >= DIP_DATA_SUPPRESSION) {
+      dbg("DipLogicP", "Heard data\n");
+      return ID_DIP_INVALID;
+    }
+
+    // if there is an estimate with highest estimate value, send
+    for(i = 0; i < UQCOUNT_DIP; i++) {
+      est = allEsts[i];
+      if(est >= DIP_DATA_ESTIMATE) { return ID_DIP_DATA; }
+      if(est > highEst) { highEst = est; };
+    }
+
+    // didn't send or hear data at this point
+    if(vectorCommRate + summaryCommRate >= DIP_ADV_SUPPRESSION) {
+      dbg("DipLogicP", "Heard an advertisement\n");
+      return ID_DIP_INVALID;
+    }
+
+    // corner case, if hash is too short
+    if(call DipEstimates.estimateToHashlength(highEst) <= DIP_VECTOR_VALUES_PER_PACKET) {
+      return ID_DIP_VECTOR;
+    }
+
+    // now we make the DIP decision
+    C = dataCommRate + vectorCommRate + summaryCommRate;
+    if(C == 0) C = 1; // don't want to divide by zero
+    E = highEst;
+    D = DIP_DATA_ESTIMATE;
+    L = call DipEstimates.estimateToHashlength(E);
+    V = DIP_VECTOR_VALUES_PER_PACKET;
+
+    dbg("DipLogicP", "D=%u, E=%u, L=%u, V=%u, C=%u\n", D, E, L, V, C);
+    if((D - E) < (L / (C * V))) {
+      return ID_DIP_SUMMARY;
+    }
+    return ID_DIP_VECTOR;
+  }
+
+}
diff --git a/tos/lib/net/dip/DipSummaryC.nc b/tos/lib/net/dip/DipSummaryC.nc
new file mode 100644
index 00000000..5d228182
--- /dev/null
+++ b/tos/lib/net/dip/DipSummaryC.nc
@@ -0,0 +1,22 @@
+
+configuration DipSummaryC {
+  provides interface DipDecision;
+
+  uses interface DipSend as SummarySend;
+  uses interface DipReceive as SummaryReceive;
+
+  uses interface DipHelp;
+  uses interface DipEstimates;
+}
+
+implementation {
+  components DipSummaryP;
+  DipDecision = DipSummaryP;
+  SummarySend = DipSummaryP;
+  SummaryReceive = DipSummaryP;
+  DipHelp = DipSummaryP;
+  DipEstimates = DipSummaryP;
+
+  components RandomC;
+  DipSummaryP.Random -> RandomC; 
+}
diff --git a/tos/lib/net/dip/DipSummaryP.nc b/tos/lib/net/dip/DipSummaryP.nc
new file mode 100644
index 00000000..ea08cb81
--- /dev/null
+++ b/tos/lib/net/dip/DipSummaryP.nc
@@ -0,0 +1,289 @@
+
+// Need to deal with non powers of base for the length of the hash
+
+#include <Dip.h>
+
+module DipSummaryP {
+  provides interface DipDecision;
+
+  uses interface DipSend as SummarySend;
+  uses interface DipReceive as SummaryReceive;
+
+  uses interface DipHelp;
+  uses interface DipEstimates;
+
+  uses interface Random;
+}
+
+implementation {
+  void findRangeShadow(dip_index_t* left, dip_index_t *right);
+  uint32_t buildRange(dip_index_t left, dip_index_t right);
+  uint32_t computeHash(dip_index_t left, dip_index_t right,
+		       dip_version_t* basedata, uint32_t salt);
+  uint32_t computeBloomHash(dip_index_t left, dip_index_t right,
+			    dip_version_t* basedata, uint32_t salt);
+  void splitRange(uint32_t info, dip_index_t* left, dip_index_t* right);
+  void adjustEstimatesSame(dip_index_t left, dip_index_t right);
+  void adjustEstimatesDiff(dip_index_t left, dip_index_t rightt,
+			   dip_version_t* data, uint32_t salt,
+			   uint32_t bHash);
+
+  uint8_t commRate;
+  // this can be combined with pairs_t in DIPVectorP maybe?
+  dip_estimate_t shadowEstimates[UQCOUNT_DIP];
+
+  command uint8_t DipDecision.getCommRate() {
+    return commRate;
+  }
+
+  command void DipDecision.resetCommRate() {
+    commRate = 0;
+  }
+
+  command error_t DipDecision.send() {
+    dip_index_t i, j, left, right;
+    dip_version_t* allVers;
+    dip_estimate_t* allEsts;
+    uint32_t salt;
+
+    dip_msg_t* dmsg;
+    dip_summary_msg_t* dsmsg;
+
+    dmsg = (dip_msg_t*) call SummarySend.getPayloadPtr();
+    if(dmsg == NULL) {
+      return FAIL;
+    }
+    dmsg->type = ID_DIP_SUMMARY;
+    dsmsg = (dip_summary_msg_t*) dmsg->content;
+
+    allVers = call DipHelp.getAllVersions();
+    allEsts = call DipEstimates.getEstimates();
+    salt = call Random.rand32();
+    
+    for(i = 0; i < UQCOUNT_DIP; i++) {
+      shadowEstimates[i] = allEsts[i];
+    }
+
+    for(i = 0; i < DIP_SUMMARY_ENTRIES_PER_PACKET; i += 3) {
+      findRangeShadow(&left, &right);
+      dbg("DipSummaryP", "Found range %u, %u\n", left, right);
+      dsmsg->info[i] = buildRange(left, right);
+      dsmsg->info[i+1] = computeHash(left, right, allVers, salt);
+      dsmsg->info[i+2] = computeBloomHash(left, right, allVers, salt);
+      for(j = left; j < right; j++) {
+	shadowEstimates[j] = 0;
+      }
+      dbg("DipSummaryP", "Hash Entry: %08x %08x %08x\n",
+	  dsmsg->info[i], dsmsg->info[i+1], dsmsg->info[i+2]);
+    }
+
+    dsmsg->unitLen = DIP_SUMMARY_ENTRIES_PER_PACKET;
+    dsmsg->salt = salt;
+
+    for(i = 0; i < DIP_SUMMARY_ENTRIES_PER_PACKET; i += 3) {
+      splitRange(dsmsg->info[i], &left, &right);
+      adjustEstimatesSame(left, right);
+    }
+
+    return call SummarySend.send(sizeof(dip_msg_t) +
+				 sizeof(dip_summary_msg_t) +
+				 (sizeof(uint32_t) * DIP_SUMMARY_ENTRIES_PER_PACKET));
+  }
+
+  event void SummaryReceive.receive(void* payload, uint8_t len) {
+    dip_summary_msg_t* dsmsg;
+    uint8_t unitlen;
+    uint32_t salt, myHash;
+    uint8_t i;
+    dip_index_t left, right;
+    dip_version_t* allVers;
+
+    commRate = commRate + 1;
+
+    dsmsg = (dip_summary_msg_t*) payload;
+    unitlen = dsmsg->unitLen;
+    salt = dsmsg->salt;
+    allVers = call DipHelp.getAllVersions();
+    
+    for(i = 0; i < unitlen; i += 3) {
+      splitRange(dsmsg->info[i], &left, &right);
+      myHash = computeHash(left, right, allVers, salt);
+      //dbg("DipSummaryP", "Received Range: %u, %u\n", left, right);
+      //dbg("DipSummaryP", "Received Hash: %08x\n", dsmsg->info[i+1]);
+      //dbg("DipSummaryP", "My Hash: %08x\n", myHash);
+      if(myHash != dsmsg->info[i+1]) {
+	// hashes don't match
+	adjustEstimatesDiff(left, right, allVers, salt, dsmsg->info[i+2]);
+      }
+      else {
+	// hashes match
+	adjustEstimatesSame(left, right);
+      }
+    }
+
+  }
+
+  void findRangeShadow(dip_index_t* left, dip_index_t *right) {
+    dip_estimate_t est1;
+    dip_estimate_t est2;
+    dip_hashlen_t len;
+    dip_index_t highIndex;
+    dip_index_t i;
+    dip_index_t LBound;
+    dip_index_t RBound;
+    uint16_t runEstSum;
+    uint16_t highEstSum;
+    
+    // find highest estimate
+    // initialize test
+    highIndex = 0;
+    est1 = shadowEstimates[0];
+
+    // Get the highest estimate key
+    for(i = 0; i < UQCOUNT_DIP; i++) {
+      est2 = shadowEstimates[i];
+      if(est2 > est1) {
+	highIndex = i;
+	est1 = est2;
+      }
+    }
+    len = call DipEstimates.estimateToHashlength(est1);
+    dbg("DipSummaryP","Highest key at %u with estimate %u and thus len %u\n",
+	highIndex, est1, len);
+
+    // initialize bounds on range
+    if(highIndex < len - 1) { LBound = 0; }
+    else { LBound = highIndex - len + 1; }
+    if(highIndex + len > UQCOUNT_DIP) { RBound = UQCOUNT_DIP; }
+    else { RBound = highIndex + len; }
+
+    // adjust length if necessary
+    if(RBound - LBound < len) { len = RBound - LBound; }
+
+    // initialize first range
+    highEstSum = 0;
+    highIndex = LBound;
+    for(i = LBound; i < LBound + len; i++) {
+      est1 = shadowEstimates[i];
+      highEstSum += est1;
+    }
+    dbg("DipSummaryP", "First range: %u, %u = %u\n", LBound, LBound + len,
+	highEstSum);
+
+    // iterate through the range
+    runEstSum = highEstSum;
+    dbg("DipSummaryP", "Iterating from %u to %u with len %u\n", LBound, RBound, len);
+
+    for(i = LBound ; i + len < RBound; i++) {
+      est1 = shadowEstimates[i];
+      est2 = shadowEstimates[i + len];
+      //dbg("DipSummaryP", "i: %u\n", i);
+      //dbg("DipSummaryP", "i+len: %u\n", i+len);
+      runEstSum = runEstSum - est1 + est2;
+      // dbg("Dissemination","Next sum: %u\n", runEstSum);
+      if(runEstSum > highEstSum) {
+	highEstSum = runEstSum;
+	highIndex = i + 1;
+	dbg("DipSummaryP", "Next range: %u, %u = %u\n", highIndex,
+	    highIndex + len, highEstSum);
+      }
+    }
+
+    // and finish
+    *left = highIndex;
+    *right = highIndex + len;
+    dbg("DipSummaryP","Final Range: %u, %u\n", *left, *right);
+  }
+
+  uint32_t buildRange(dip_index_t left, dip_index_t right) {
+    uint32_t range;
+    
+    range = ((uint32_t) left << 16) | right;
+    return range;
+  }
+
+  uint32_t computeHash(dip_index_t left, dip_index_t right,
+		       dip_version_t* basedata, uint32_t salt) {
+    dip_index_t i;
+    uint32_t hashValue = salt;
+    //uint8_t *sequence;
+    dip_version_t* sequence;
+    uint32_t iterations;
+
+    if(right <= left) return 0;
+    //sequence = ((uint8_t*) (basedata + left));
+    sequence = (basedata + left);
+    //iterations = (right - left - 1)*sizeof(dip_version_t);
+    iterations = (right - left - 1);
+
+    //dbg("DipSummaryP","Computing hash for %u, %u for %u iters\n", left, right,  iterations);
+
+    for(i = 0; i <= iterations; i++) {
+      hashValue += sequence[i];
+      hashValue += (hashValue << 10);
+      hashValue ^= (hashValue >> 6);
+    }
+    hashValue += (hashValue << 3);
+    hashValue ^= (hashValue >> 11);
+    hashValue += (hashValue << 15);
+    return hashValue;
+  }
+
+  uint32_t computeBloomHash(dip_index_t left, dip_index_t right,
+			    dip_version_t* basedata, uint32_t salt) {
+    dip_index_t i;
+    uint32_t bit;
+    uint32_t returnHash;
+    uint32_t indexSeqPair[2];
+
+    returnHash = 0;
+    for(i = left; i < right; i++) {
+      indexSeqPair[0] = i;
+      indexSeqPair[1] = basedata[i];
+      bit = computeHash(0, 2, indexSeqPair, salt) % 32;
+      //dbg("DipSummaryP", "Bloom Hash: %u, %u, %u\n", indexSeqPair[0], indexSeqPair[1], bit);
+      returnHash |= (1 << bit);
+    }
+    return returnHash;
+  }
+
+  void splitRange(uint32_t info, dip_index_t* left, dip_index_t* right) {
+    *right = info & 0xFFFF;
+    *left = (info >> 16) & 0xFFFF;
+  }
+  
+  void adjustEstimatesSame(dip_index_t left, dip_index_t right) {
+    dip_index_t i;
+
+    for(i = left; i < right; i++) {
+      call DipEstimates.decEstimateByIndex(i);
+    }
+  }
+
+  void adjustEstimatesDiff(dip_index_t left, dip_index_t right,
+			   dip_version_t* data, uint32_t salt,
+			   uint32_t bHash) {
+    dip_index_t i;
+    dip_estimate_t est;
+    dip_key_t key;
+    uint32_t indexSeqPair[2];
+    uint32_t bit;
+
+    est = call DipEstimates.hashlengthToEstimate(right - left) + 1; // + 1 to improve search
+    for(i = left; i < right; i++) {
+      indexSeqPair[0] = i;
+      indexSeqPair[1] = data[i];
+      bit = computeHash(0, 2, indexSeqPair, salt) % 32;
+      key = call DipHelp.indexToKey(i);
+      if(bHash & (1 << bit)) {
+	//set estimate only if better
+	call DipEstimates.setSummaryEstimateByIndex(i, est);
+      }
+      else {
+	dbg("DisseminationDebug", "Key %x definitely different\n", key);
+	call DipEstimates.setVectorEstimate(key);
+      }
+    }
+  }
+
+}
diff --git a/tos/lib/net/dip/DipTrickleMilliC.nc b/tos/lib/net/dip/DipTrickleMilliC.nc
new file mode 100644
index 00000000..1624c15d
--- /dev/null
+++ b/tos/lib/net/dip/DipTrickleMilliC.nc
@@ -0,0 +1,70 @@
+// $Id: DipTrickleMilliC.nc,v 1.2 2010-06-29 22:07:49 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Configuration that encapsulates the trickle timer implementation to
+ * its needed services and initialization. For details on the working
+ * of the parameters, please refer to Levis et al., "A Self-Regulating
+ * Algorithm for Code Maintenance and Propagation in Wireless Sensor
+ * Networks," NSDI 2004.
+ *
+ * @param l Lower bound of the time period in seconds.
+ * @param h Upper bound of the time period in seconds.
+ * @param k Redundancy constant.
+ * @param count How many timers to provide.
+ *
+ * @author Philip Levis
+ * @author Gilman Tolle
+ * @date   Jan 7 2006
+ */ 
+
+
+configuration DipTrickleMilliC {
+  provides interface DipTrickleTimer as TrickleTimer;
+}
+implementation {
+  components DipTrickleMilliP as TrickleP;
+  components MainC, RandomC;
+  components new TimerMilliC() as PeriodicIntervalTimer;
+  components new TimerMilliC() as SingleEventTimer;
+  components LedsC;
+  TrickleTimer = TrickleP;
+
+  TrickleP.PeriodicIntervalTimer -> PeriodicIntervalTimer;
+  TrickleP.SingleEventTimer -> SingleEventTimer;
+  TrickleP.Random -> RandomC;
+  
+  TrickleP.Leds -> LedsC;
+  MainC.SoftwareInit -> TrickleP;
+}
+
+  
diff --git a/tos/lib/net/dip/DipTrickleMilliP.nc b/tos/lib/net/dip/DipTrickleMilliP.nc
new file mode 100644
index 00000000..607b40ff
--- /dev/null
+++ b/tos/lib/net/dip/DipTrickleMilliP.nc
@@ -0,0 +1,128 @@
+// $Id: DipTrickleMilliP.nc,v 1.2 2010-06-29 22:07:49 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Module that provides a service instance of trickle timers. For
+ * details on the working of the parameters, please refer to Levis et
+ * al., "A Self-Regulating Algorithm for Code Maintenance and
+ * Propagation in Wireless Sensor Networks," NSDI 2004.
+ *
+ * @param l Lower bound of the time period in seconds.
+ * @param h Upper bound of the time period in seconds.
+ * @param k Redundancy constant.
+ * @param count How many timers to provide.
+ *
+ * @author Philip Levis
+ * @author Gilman Tolle
+ * @date   Jan 7 2006
+ */ 
+
+#include <Timer.h>
+#include <Dip.h>
+
+module DipTrickleMilliP {
+  provides {
+    interface Init;
+    interface DipTrickleTimer as TrickleTimer;
+  }
+  uses {
+    interface Timer<TMilli> as PeriodicIntervalTimer;
+    interface Timer<TMilli> as SingleEventTimer;
+    interface Random;
+    interface Leds;
+  }
+}
+implementation {
+
+  uint32_t period;
+
+  command error_t Init.init() {
+    period = DIP_TAU_HIGH;
+    return SUCCESS;
+  }
+
+  /**
+   * Start a trickle timer. Reset the counter to 0.
+   */
+  command error_t TrickleTimer.start() {
+    call PeriodicIntervalTimer.startOneShot(period);
+    dbg("DipTrickleMilliP",
+	"Starting trickle timer @ %s\n", sim_time_string());
+    return SUCCESS;
+  }
+
+  /**
+   * Stop the trickle timer. This call sets the timer period to H.
+   */
+  command void TrickleTimer.stop() {
+    call PeriodicIntervalTimer.stop();
+    dbg("DipTrickleMilliP",
+	"Stopping trickle timer @ %s\n", sim_time_string());
+  }
+
+  /**
+   * Reset the timer period to L. If called while the timer is running,
+   * then a new interval (of length L) begins immediately.
+   */
+  command void TrickleTimer.reset() {
+    period = DIP_TAU_LOW;
+    call PeriodicIntervalTimer.stop();
+    call PeriodicIntervalTimer.startOneShot(period);
+    dbg("DipTrickleMilliP",
+	"Resetting trickle timer @ %s\n", sim_time_string());
+  }
+
+  command void TrickleTimer.maxInterval() {
+    period = DIP_TAU_HIGH;
+  }
+
+  /**
+   * The trickle timer has fired. Signaled if C &gt; K.
+   */
+  event void PeriodicIntervalTimer.fired() {
+    uint32_t dtfire;
+
+    dtfire = (call Random.rand16() % (period / 2)) + (period / 2);
+    dbg("DipTrickleMilliP", "Scheduling Trickle event with %u\n", dtfire);
+    call SingleEventTimer.startOneShot(dtfire);
+    period = signal TrickleTimer.requestWindowSize();
+    call PeriodicIntervalTimer.startOneShot(period);
+    //call Leds.led0Toggle();
+  }
+
+  event void SingleEventTimer.fired() {
+    dbg("Trickle", "Firing Trickle Event Timer\n");
+    signal TrickleTimer.fired();
+  }
+}
+
+  
diff --git a/tos/lib/net/dip/DipVectorC.nc b/tos/lib/net/dip/DipVectorC.nc
new file mode 100644
index 00000000..a906da8e
--- /dev/null
+++ b/tos/lib/net/dip/DipVectorC.nc
@@ -0,0 +1,23 @@
+
+configuration DipVectorC {
+  provides interface DipDecision;
+
+  uses interface DipSend as VectorSend;
+  uses interface DipReceive as VectorReceive;
+
+  uses interface DipHelp;
+  uses interface DipEstimates;
+}
+
+implementation {
+  components DipVectorP;
+  DipDecision = DipVectorP;
+  VectorSend = DipVectorP;
+  VectorReceive = DipVectorP;
+  DipHelp = DipVectorP;
+  DipEstimates = DipVectorP;
+
+  components RandomC;
+  DipVectorP.Random -> RandomC;
+
+}
diff --git a/tos/lib/net/dip/DipVectorP.nc b/tos/lib/net/dip/DipVectorP.nc
new file mode 100644
index 00000000..a892ad46
--- /dev/null
+++ b/tos/lib/net/dip/DipVectorP.nc
@@ -0,0 +1,142 @@
+
+#include <Dip.h>
+
+module DipVectorP {
+  provides interface DipDecision;
+
+  uses interface DipSend as VectorSend;
+  uses interface DipReceive as VectorReceive;
+
+  uses interface DipHelp;
+  uses interface DipEstimates;
+
+  uses interface Random;
+}
+
+implementation {
+  uint8_t commRate = 0;
+  typedef struct pairs_t {
+    dip_estimate_t estimate;
+    dip_key_t key;
+  } pairs_t;
+  pairs_t pairs[UQCOUNT_DIP]; // This is large memory footprint
+
+  int myComparator(const void* a, const void* b);
+  void randomizeRun(pairs_t* localPairs, dip_index_t length);
+
+  command uint8_t DipDecision.getCommRate() {
+    return commRate;
+  }
+
+  command void DipDecision.resetCommRate() {
+    commRate = 0;
+  }
+
+  command error_t DipDecision.send() {
+    dip_index_t i, j, r;
+    dip_key_t sendkey;
+    dip_estimate_t* ests;
+
+    dip_msg_t* dmsg;
+    dip_vector_msg_t* dvmsg;
+
+    dmsg = call VectorSend.getPayloadPtr();
+    if(dmsg == NULL) {
+      return FAIL;
+    }
+
+    ests = call DipEstimates.getEstimates();
+    // get all estimates and sort
+    for(i = 0; i < UQCOUNT_DIP; i++) {
+      pairs[i].key = call DipHelp.indexToKey(i);
+      pairs[i].estimate = ests[i];
+    }
+    qsort(pairs, UQCOUNT_DIP, sizeof(pairs_t), myComparator);
+    j = pairs[0].estimate;
+    r = 0;
+    for(i = 0; i < UQCOUNT_DIP; i++) {
+      if(pairs[i].estimate < j) {
+	randomizeRun(&pairs[r], i - r);
+	j = pairs[i].estimate;
+	r = i;
+      }
+    }
+    // randomize the last set
+    randomizeRun(&pairs[r], UQCOUNT_DIP - r);
+
+    // fill up the packet
+    dmsg->type = ID_DIP_VECTOR;
+    dvmsg = (dip_vector_msg_t*) dmsg->content;
+    dvmsg->unitLen = DIP_VECTOR_ENTRIES_PER_PACKET;
+    for(i = 0, j = 0;
+	i < DIP_VECTOR_ENTRIES_PER_PACKET;
+	i += 2, j++) {
+      sendkey = pairs[j].key;
+      dvmsg->vector[i] = sendkey;
+      dvmsg->vector[i+1] = call DipHelp.keyToVersion(sendkey);
+      // adjust estimate
+      call DipEstimates.decEstimateByKey(sendkey);
+    }
+
+    return call VectorSend.send(sizeof(dip_msg_t) + sizeof(dip_vector_msg_t) +
+				(DIP_VECTOR_ENTRIES_PER_PACKET * sizeof(uint32_t)));
+  }
+
+  event void VectorReceive.receive(void* payload, uint8_t len) {
+    dip_vector_msg_t* dvmsg;
+    uint8_t unitlen;
+
+    uint8_t i;
+    dip_key_t vectorkey;
+    dip_version_t vectorver;
+    dip_version_t myver;
+
+    commRate = commRate + 1;
+    dvmsg = (dip_vector_msg_t*) payload;
+    unitlen = dvmsg->unitLen;
+
+    for(i = 0; i < unitlen; i += 2) {
+      vectorkey = dvmsg->vector[i];
+      vectorver = dvmsg->vector[i+1];
+      myver = call DipHelp.keyToVersion(vectorkey);
+
+      // TODO: handle the invalid versions
+      if(myver < vectorver) {
+	call DipEstimates.setVectorEstimate(vectorkey);
+      }
+      else if(myver > vectorver) {
+	call DipEstimates.setDataEstimate(vectorkey);
+      }
+      else if(myver == vectorver) {
+	call DipEstimates.decEstimateByKey(vectorkey);
+      }
+    }
+
+  }
+
+  int myComparator(const void* a, const void* b) {
+    const pairs_t *x = (const pairs_t *) a;
+    const pairs_t *y = (const pairs_t *) b;
+    if( x->estimate < y->estimate ) { return 1; }
+    if( x->estimate > y->estimate ) { return -1; }
+    return 0;
+  }
+
+  void randomizeRun(pairs_t* localPairs, dip_index_t length) {
+    dip_index_t i,j;
+    dip_index_t rLength = length;
+    pairs_t temp;
+
+    // don't move the last one
+    for(i = 0; i < length - 1; i++, rLength--) {
+      j = i + (call Random.rand16() % rLength);
+      temp.key = localPairs[i].key;
+      temp.estimate = localPairs[i].estimate;
+      localPairs[i].key = localPairs[j].key;
+      localPairs[i].estimate = localPairs[j].estimate;
+      localPairs[j].key = temp.key;
+      localPairs[j].estimate = temp.estimate;
+    }
+  }
+
+}
diff --git a/tos/lib/net/dip/DipVersionC.nc b/tos/lib/net/dip/DipVersionC.nc
new file mode 100644
index 00000000..8a80e32f
--- /dev/null
+++ b/tos/lib/net/dip/DipVersionC.nc
@@ -0,0 +1,14 @@
+
+#include <Dip.h>
+
+configuration DipVersionC {
+  provides interface DipHelp;
+
+  provides interface DisseminationUpdate<dip_data_t>[dip_key_t key];
+}
+
+implementation {
+  components DipVersionP;
+  DipHelp = DipVersionP;
+  DisseminationUpdate = DipVersionP;
+}
diff --git a/tos/lib/net/dip/DipVersionP.nc b/tos/lib/net/dip/DipVersionP.nc
new file mode 100644
index 00000000..e315b6c2
--- /dev/null
+++ b/tos/lib/net/dip/DipVersionP.nc
@@ -0,0 +1,110 @@
+
+module DipVersionP {
+  provides interface DipHelp;
+
+  provides interface DisseminationUpdate<dip_data_t>[dip_key_t key];
+}
+
+implementation {
+  int lessThan(const void* a, const void* b);
+
+  // keys are ordered from smallest to largest.
+  dip_key_t keys[UQCOUNT_DIP];
+  dip_version_t versions[UQCOUNT_DIP];
+  dip_index_t count = 0;
+
+  command void DipHelp.registerKey(dip_key_t key) {
+    dip_index_t i;
+
+    keys[count] = key;
+    count = count + 1;
+    if(count == UQCOUNT_DIP) {
+      qsort(keys, UQCOUNT_DIP, sizeof(dip_key_t), lessThan);
+      dbg("DipVersionP","Key registration complete!\n");
+      for(i = 0; i < UQCOUNT_DIP; i++) {
+	dbg("DipVersionP","Key %x\n", keys[i]);
+      }
+    }
+  }
+
+  command void DisseminationUpdate.change[dip_key_t key](dip_data_t* val) {
+    dip_index_t i;
+    dip_version_t ver;
+
+    i = call DipHelp.keyToIndex(key);
+    ver = versions[i];
+
+    // the version has node ID embedded in it, so need to do some shifts
+    ver = ver >> 16;
+    ver++;
+    if ( ver == DIP_UNKNOWN_VERSION ) { ver++; }
+    ver = ver << 16;
+    ver += TOS_NODE_ID;
+
+    versions[i] = ver;
+  }
+
+  command dip_index_t DipHelp.keyToIndex(dip_key_t key) {
+    dip_index_t answer;
+    dip_index_t i;
+
+    answer = DIP_UNKNOWN_INDEX;
+    // linear search for now since it's easier
+    for(i = 0; i < UQCOUNT_DIP; i++) {
+      if(keys[i] == key) { 
+	answer = i;
+	break;
+      }
+    }
+    dbg("DipVersionP", "Converting key %x to index %u\n", key, answer);
+    return answer;
+  }
+
+  command dip_key_t DipHelp.indexToKey(dip_index_t ind) {
+    return keys[ind];
+  }
+
+  command dip_version_t DipHelp.keyToVersion(dip_key_t key) {
+    dip_index_t i;
+
+    i = call DipHelp.keyToIndex(key);
+    if(i == DIP_UNKNOWN_INDEX) {
+      return DIP_UNKNOWN_VERSION;
+    }
+    return versions[i];
+  }
+
+  command void DipHelp.setVersion(dip_key_t key, dip_version_t ver) {
+    dip_index_t i;
+
+    i = call DipHelp.keyToIndex(key);
+    versions[i] = ver;
+    dbg("DipVersionP","Setting key %x at index %u to version %x\n", key, i, ver);
+  }
+
+  command dip_version_t* DipHelp.getAllVersions() {
+    return versions;
+  }
+
+  int lessThan(const void* a, const void* b) {
+    if ((*(dip_key_t*) a) < (*(dip_key_t*) b)) {
+      return -1;
+    }
+    else if ((*(dip_key_t*) a) > (*(dip_key_t*) b)) {
+      return 1;
+    }
+    return 0;
+  }
+
+  // binary search code which may be unstable
+  /*
+  dip_index_t answer;
+
+  search_result = (dip_key_t*) bsearch(&key, &keys, UQCOUNT_DIP,
+				       sizeof(dip_key_t), lessThan);
+  if(search_result == NULL) {
+    return DIP_UNKNOWN_INDEX;
+  }
+  answer = search_result - keys;
+  */
+}
diff --git a/tos/lib/net/dip/DisseminationC.nc b/tos/lib/net/dip/DisseminationC.nc
new file mode 100644
index 00000000..fac6b683
--- /dev/null
+++ b/tos/lib/net/dip/DisseminationC.nc
@@ -0,0 +1,11 @@
+
+#include <Dip.h>
+
+configuration DisseminationC {
+  provides interface StdControl;
+}
+
+implementation {
+  components DipLogicC;
+  StdControl = DipLogicC;
+}
diff --git a/tos/lib/net/dip/DisseminatorC.nc b/tos/lib/net/dip/DisseminatorC.nc
new file mode 100644
index 00000000..6a339f11
--- /dev/null
+++ b/tos/lib/net/dip/DisseminatorC.nc
@@ -0,0 +1,77 @@
+#include <Dip.h>
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminatorC component holds and synchronizes a single value
+ * of a chosen type, and identifies that value by a chosen 16-bit key.
+ * Different nodes should use the same key for the same value.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @param t the type of the object that will be disseminated
+ * @param key the 16-bit identifier of the disseminated object
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2008-01-03 21:30:35 $
+ */
+
+generic configuration DisseminatorC(typedef t, dip_key_t key) {
+  provides interface DisseminationValue<t>;
+  provides interface DisseminationUpdate<t>;
+}
+implementation {
+  enum {
+    JUST_NEED_COUNT = UQ_DIP
+  };
+
+  components new DisseminatorP(t, key);
+  DisseminationValue = DisseminatorP.AppDisseminationValue;
+  DisseminationUpdate = DisseminatorP.AppDisseminationUpdate;
+
+  components LedsC;
+  DisseminatorP.Leds -> LedsC;
+
+  components DipLogicC;
+  DisseminatorP.DipDisseminationUpdate -> DipLogicC.DisseminationUpdate[key];
+
+  components DipVersionC;
+  DisseminatorP.DipHelp -> DipVersionC;
+
+  components MainC;
+  MainC.SoftwareInit -> DisseminatorP;
+
+  components DipDataC;
+  DipDataC.DisseminationUpdate[key] -> DisseminatorP.DataDisseminationUpdate;
+  DipDataC.DisseminationValue[key] -> DisseminatorP.DataDisseminationValue;
+}
diff --git a/tos/lib/net/dip/DisseminatorP.nc b/tos/lib/net/dip/DisseminatorP.nc
new file mode 100644
index 00000000..76e67ea9
--- /dev/null
+++ b/tos/lib/net/dip/DisseminatorP.nc
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminatorP module holds and synchronizes a single value of a
+ * chosen type.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @param t the type of the object that will be disseminated
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.3 $ $Date: 2008-02-16 10:56:07 $
+ */
+
+generic module DisseminatorP(typedef t, dip_key_t key) {
+  provides interface DisseminationValue<t> as AppDisseminationValue;
+  provides interface DisseminationUpdate<t> as AppDisseminationUpdate;
+  provides interface DisseminationUpdate<dip_data_t> as DataDisseminationUpdate;
+  provides interface DisseminationValue<dip_data_t> as DataDisseminationValue;
+
+  provides interface Init;
+
+  uses interface DisseminationUpdate<dip_data_t> as DipDisseminationUpdate;
+  uses interface DipHelp;
+
+  uses interface Leds;
+}
+implementation {
+  dip_data_t valueCache;
+  
+  task void signalNewData() {
+    signal AppDisseminationValue.changed();
+  }
+  
+  command error_t Init.init() {
+    call DipHelp.registerKey(key);
+    return SUCCESS;
+  }
+
+  // A sequence number is 32 bits. The top 16 bits are an incrementing
+  // counter, while the bottom 16 bits are a unique node identifier.
+  // But versions aren't stored here.
+
+  command const t* AppDisseminationValue.get() {
+    return (t*) &valueCache;
+  }
+
+  command void AppDisseminationValue.set( const t* val ) {
+    memcpy( &valueCache, val, sizeof(t) );
+    // must signal here instead of posting task to prevent race condition
+    signal AppDisseminationValue.changed();
+  }
+
+  command void AppDisseminationUpdate.change( t* newVal ) {
+    memcpy( &valueCache, newVal, sizeof(t) );
+    /* Increment the counter and append the local node ID later. */
+    /* DipLogicC doesn't care what the data actually is,
+       it just wants the key, so we cast it recklessly */
+    call DipDisseminationUpdate.change((dip_data_t*)newVal);
+    post signalNewData();
+  }
+
+  command const dip_data_t* DataDisseminationValue.get() {
+    return (dip_data_t*) &valueCache;
+  }
+
+  command void DataDisseminationValue.set( const dip_data_t* val ) {  }
+
+  command void DataDisseminationUpdate.change( dip_data_t* newVal ) {
+    memcpy( &valueCache, newVal, sizeof(dip_data_t) );
+    // don't post the task, this came from the network
+    signal AppDisseminationValue.changed();
+  }
+
+
+  default event void AppDisseminationValue.changed() { }
+
+  default event void DataDisseminationValue.changed() { }
+
+}
diff --git a/tos/lib/net/dip/README b/tos/lib/net/dip/README
new file mode 100644
index 00000000..16c80aca
--- /dev/null
+++ b/tos/lib/net/dip/README
@@ -0,0 +1,36 @@
+
+Title: Dip
+Author: Kaisen Lin (kaisenl@cs.ucsd.edu)
+------------------
+
+Dip is a dissemination protocol for detecting and disseminating new
+items in a network. It uses the same interfaces as Drip. It improves
+node density and item scalability by sending only one packet per
+interval rather than many. If the network is small and with very few
+data items, Drip may be more efficient due to Dip's advertisement
+overhead.
+
+
+
+Notes:
+------
+
+Data disseminated under Dip cannot be larger than 16 bytes. It was not
+designed for large data items, but rather for many small data items.
+
+Ties, like Drip, are handled with higher node IDs serving as
+tiebreakers.
+
+Key 0 is reserved, do not use it.
+
+There is minimal error checking, don't try to intentionally break
+it. (e.g. illegal keys, weird and wacky version numbers)
+
+Usage:
+------
+
+To use include the following in your Makefile:
+
+CFLAGS += -I$(TOSDIR)/lib/net
+CFLAGS += -I$(TOSDIR)/lib/net/dip
+CFLAGS += -I$(TOSDIR)/lib/net/dip/interfaces
diff --git a/tos/lib/net/dip/interfaces/DipDecision.nc b/tos/lib/net/dip/interfaces/DipDecision.nc
new file mode 100644
index 00000000..e285392b
--- /dev/null
+++ b/tos/lib/net/dip/interfaces/DipDecision.nc
@@ -0,0 +1,6 @@
+
+interface DipDecision {
+  command uint8_t getCommRate();
+  command void resetCommRate();
+  command error_t send();
+}
diff --git a/tos/lib/net/dip/interfaces/DipEstimates.nc b/tos/lib/net/dip/interfaces/DipEstimates.nc
new file mode 100644
index 00000000..c9b5a20d
--- /dev/null
+++ b/tos/lib/net/dip/interfaces/DipEstimates.nc
@@ -0,0 +1,15 @@
+
+#include <Dip.h>
+
+interface DipEstimates {
+  command dip_estimate_t* getEstimates();
+  command void decEstimateByIndex(dip_index_t i);
+  command void decEstimateByKey(dip_key_t key);
+  command dip_hashlen_t estimateToHashlength(dip_estimate_t est);
+  command dip_estimate_t hashlengthToEstimate(dip_hashlen_t len);
+  // special event to reset trickle timer too
+  command void setDataEstimate(dip_key_t key);
+  command void setVectorEstimate(dip_key_t key);
+  command void setSummaryEstimateByIndex(dip_index_t ind,
+					 dip_estimate_t est);
+}
diff --git a/tos/lib/net/dip/interfaces/DipHelp.nc b/tos/lib/net/dip/interfaces/DipHelp.nc
new file mode 100644
index 00000000..d1864ea4
--- /dev/null
+++ b/tos/lib/net/dip/interfaces/DipHelp.nc
@@ -0,0 +1,12 @@
+
+#include <Dip.h>
+
+interface DipHelp {
+  command void registerKey(dip_key_t key);
+
+  command dip_index_t keyToIndex(dip_key_t key);
+  command dip_key_t indexToKey(dip_index_t ind);
+  command dip_version_t keyToVersion(dip_key_t key);
+  command void setVersion(dip_key_t key, dip_version_t ver);
+  command dip_version_t* getAllVersions(); 
+}
diff --git a/tos/lib/net/dip/interfaces/DipReceive.nc b/tos/lib/net/dip/interfaces/DipReceive.nc
new file mode 100644
index 00000000..9dbd72a7
--- /dev/null
+++ b/tos/lib/net/dip/interfaces/DipReceive.nc
@@ -0,0 +1,4 @@
+
+interface DipReceive {
+  event void receive(void* payload, uint8_t len);
+}
diff --git a/tos/lib/net/dip/interfaces/DipSend.nc b/tos/lib/net/dip/interfaces/DipSend.nc
new file mode 100644
index 00000000..9709b7f5
--- /dev/null
+++ b/tos/lib/net/dip/interfaces/DipSend.nc
@@ -0,0 +1,6 @@
+
+interface DipSend {
+  command error_t send(uint8_t len);
+  command void* getPayloadPtr();
+  command uint8_t maxPayloadLength();
+}
diff --git a/tos/lib/net/dip/interfaces/DipTrickleTimer.nc b/tos/lib/net/dip/interfaces/DipTrickleTimer.nc
new file mode 100644
index 00000000..2dbe3041
--- /dev/null
+++ b/tos/lib/net/dip/interfaces/DipTrickleTimer.nc
@@ -0,0 +1,96 @@
+// $Id: DipTrickleTimer.nc,v 1.2 2010-06-29 22:07:49 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * A network trickle timer. A trickle timer has a period in the range
+ * [L, H]. After firing, the period is doubled, up to H. If the period
+ * is P, then the timer is scheduled to fire in the interval [0.5P, P]
+ * (the second half of a period). The period can be reset to L (the
+ * smallest period, and therefore the highest frequency).
+ *
+ * The timer may be suppressed. If a user of the interface has heard
+ * enough packets from other nodes that indicate its transmitting a
+ * packet would be unncessarily redundant, then the timer does not
+ * fire. The timer has a constant K and a counter C. If C &gte; K, then
+ * the timer does not fire. When an interval ends, C is reset to 0.
+ * Calling <tt>incrementCounter</tt> increments C by one.
+ *
+ * For details, refer to Levis et al., "A Self-Regulating Algorithm
+ * for Code Maintenance and Propagation in Wireless Sensor Networks,"
+ * NSDI 2004. The component providing this interface defines the
+ * constants L, H, and K.
+ *
+ * @author Philip Levis
+ * @date   Jan 7 2006
+ */ 
+
+
+interface DipTrickleTimer {
+
+  /**
+   * Start the trickle timer. At boot, the timer period is its maximum
+   * value (H). If a protocol requires starting at the minimum value
+   * (e.g., fast start), then it should call <tt>reset</tt> before
+   * <tt>start</tt>.
+   *
+   * @return error_t SUCCESS if the timer was started, EBUSY if it is already
+   * running, and FAIL otherwise.
+   */
+  command error_t start();
+
+  /**
+   * Stop the trickle timer. This call sets the timer period to H and
+   * C to 0.
+   */
+  command void stop();
+
+  /**
+   * Reset the timer period to L. If called while the timer is
+   * running, then a new interval (of length L) begins immediately.
+   */
+  command void reset();
+
+  /**
+   * The trickle timer has fired. Signaled if C &gt; K.
+   */  
+  event void fired();
+
+  /**
+   * Compute the window size based on Dip's estimates
+   */
+  event uint32_t requestWindowSize();
+
+  /**
+   * Resets the timer period to H.
+   */
+  command void maxInterval();
+}
diff --git a/tos/lib/net/dip/interfaces/DipVersion.nc b/tos/lib/net/dip/interfaces/DipVersion.nc
new file mode 100644
index 00000000..c431ec5a
--- /dev/null
+++ b/tos/lib/net/dip/interfaces/DipVersion.nc
@@ -0,0 +1,7 @@
+
+#include <Dip.h>
+
+interface DipVersion {
+  command void setVersion();
+  command void incVersion();
+}
\ No newline at end of file
diff --git a/tos/lib/net/dip/qsort.c b/tos/lib/net/dip/qsort.c
new file mode 100644
index 00000000..4b48e008
--- /dev/null
+++ b/tos/lib/net/dip/qsort.c
@@ -0,0 +1,151 @@
+/*-
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+//#include <stdlib.h>
+
+typedef int		 cmp_t(const void *, const void *);
+static char	*med3(char *, char *, char *, cmp_t *);
+static void	 swapfunc(char *, char *, int);
+
+#define min(a, b)	((a) < (b) ? (a) : (b))
+
+/*
+ * Qsort routine from Bentley & McIlroy's "Engineering a Sort Function".
+ */
+#define swapcode(TYPE, parmi, parmj, n) { 		\
+	int i = (n) / sizeof (TYPE); 			\
+	register TYPE *pi = (TYPE *) (parmi); 		\
+	register TYPE *pj = (TYPE *) (parmj); 		\
+	do { 						\
+		register TYPE	t = *pi;		\
+		*pi++ = *pj;				\
+		*pj++ = t;				\
+        } while (--i > 0);				\
+}
+
+static void
+swapfunc(char *a, char* b, int n)
+{
+	swapcode(char, a, b, n)
+}
+
+#define swap(a, b) swapfunc(a, b, es)
+
+#define vecswap(a, b, n) 	if ((n) > 0) swapfunc(a, b, n)
+
+static char *
+med3(char* a, char* b, char* c, cmp_t* cmp)
+{
+	return cmp(a, b) < 0 ?
+	       (cmp(b, c) < 0 ? b : (cmp(a, c) < 0 ? c : a ))
+              :(cmp(b, c) > 0 ? b : (cmp(a, c) < 0 ? a : c ));
+}
+
+void
+qsort(void* a, size_t n, size_t es, cmp_t* cmp)
+{
+	char *pa, *pb, *pc, *pd, *pl, *pm, *pn;
+	int d, r, swap_cnt;
+
+loop:
+	swap_cnt = 0;
+	if (n < 7) {
+		for (pm = (char *)a + es; pm < (char *)a + n * es; pm += es)
+			for (pl = pm; pl > (char *)a && cmp(pl - es, pl) > 0;
+			     pl -= es)
+				swap(pl, pl - es);
+		return;
+	}
+	pm = (char *)a + (n / 2) * es;
+	if (n > 7) {
+		pl = a;
+		pn = (char *)a + (n - 1) * es;
+		if (n > 40) {
+			d = (n / 8) * es;
+			pl = med3(pl, pl + d, pl + 2 * d, cmp);
+			pm = med3(pm - d, pm, pm + d, cmp);
+			pn = med3(pn - 2 * d, pn - d, pn, cmp);
+		}
+		pm = med3(pl, pm, pn, cmp);
+	}
+	swap(a, pm);
+	pa = pb = (char *)a + es;
+
+	pc = pd = (char *)a + (n - 1) * es;
+	for (;;) {
+		while (pb <= pc && (r = cmp(pb, a)) <= 0) {
+			if (r == 0) {
+				swap_cnt = 1;
+				swap(pa, pb);
+				pa += es;
+			}
+			pb += es;
+		}
+		while (pb <= pc && (r = cmp(pc, a)) >= 0) {
+			if (r == 0) {
+				swap_cnt = 1;
+				swap(pc, pd);
+				pd -= es;
+			}
+			pc -= es;
+		}
+		if (pb > pc)
+			break;
+		swap(pb, pc);
+		swap_cnt = 1;
+		pb += es;
+		pc -= es;
+	}
+	if (swap_cnt == 0) {  /* Switch to insertion sort */
+		for (pm = (char *)a + es; pm < (char *)a + n * es; pm += es)
+			for (pl = pm; pl > (char *)a && cmp(pl - es, pl) > 0;
+			     pl -= es)
+				swap(pl, pl - es);
+		return;
+	}
+
+	pn = (char *)a + n * es;
+	r = min(pa - (char *)a, pb - pa);
+	vecswap(a, pb - r, r);
+	r = min(pd - pc, pn - pd - es);
+	vecswap(pb, pn - r, r);
+	if ((r = pb - pa) > es)
+		qsort(a, r / es, es, cmp);
+	if ((r = pd - pc) > es) {
+		/* Iterate rather than recurse to save stack space */
+		a = pn - r;
+		n = r / es;
+		goto loop;
+	}
+/*		qsort(pn - r, r / es, es, cmp);*/
+}
diff --git a/tos/lib/net/drip/DisseminationC.nc b/tos/lib/net/drip/DisseminationC.nc
new file mode 100644
index 00000000..bdeca5ec
--- /dev/null
+++ b/tos/lib/net/drip/DisseminationC.nc
@@ -0,0 +1,52 @@
+#include <DisseminationEngine.h>
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminationC component is the top-level interface to the
+ * dissemination protocol. StdControl controls all of the trickle
+ * timers used for all of the keys. 
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+configuration DisseminationC {
+  provides interface StdControl;
+}
+implementation {
+  components DisseminationEngineP;
+  StdControl = DisseminationEngineP;
+}
diff --git a/tos/lib/net/drip/DisseminationCache.nc b/tos/lib/net/drip/DisseminationCache.nc
new file mode 100644
index 00000000..c56fcc0a
--- /dev/null
+++ b/tos/lib/net/drip/DisseminationCache.nc
@@ -0,0 +1,51 @@
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminationCache interface connects each DisseminatorC
+ * component to the DisseminationEngineC component.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2008-06-04 04:31:08 $
+ */
+
+interface DisseminationCache {
+  event error_t start();
+  event error_t stop();
+  command void* requestData( uint8_t* size );
+  command void storeData( void* COUNT(size) data, uint8_t size, uint32_t seqno );
+  command uint32_t requestSeqno();
+  event void newData();
+}
diff --git a/tos/lib/net/drip/DisseminationEngine.h b/tos/lib/net/drip/DisseminationEngine.h
new file mode 100644
index 00000000..0edd29bd
--- /dev/null
+++ b/tos/lib/net/drip/DisseminationEngine.h
@@ -0,0 +1,57 @@
+#ifndef DISSEMINATION_ENGINE_H
+#define DISSEMINATION_ENGINE_H
+
+/*
+ * Copyright (c) 2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/*
+ * TODO: Add a tiebreaker and an application GUID to the header
+ */
+
+enum {
+  AM_DISSEMINATION_MESSAGE = 0x60,
+  AM_DISSEMINATION_PROBE_MESSAGE = 0x61,
+  DISSEMINATION_SEQNO_UNKNOWN = 0,
+};
+
+typedef nx_struct dissemination_message {
+  nx_uint16_t key;
+  nx_uint32_t seqno;
+  nx_uint8_t (COUNT(0) data)[0]; // Deputy place-holder, field will probably be removed when we Deputize Drip
+} dissemination_message_t;
+
+typedef nx_struct dissemination_probe_message {
+  nx_uint16_t key;
+} dissemination_probe_message_t;
+
+#endif
+
diff --git a/tos/lib/net/drip/DisseminationEngineImplP.nc b/tos/lib/net/drip/DisseminationEngineImplP.nc
new file mode 100644
index 00000000..fb283366
--- /dev/null
+++ b/tos/lib/net/drip/DisseminationEngineImplP.nc
@@ -0,0 +1,264 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminationEngineImplP component implements the dissemination
+ * logic.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2007-09-14 00:22:18 $
+ */
+
+#include <DisseminationEngine.h>
+
+module DisseminationEngineImplP {
+  provides interface StdControl;
+
+  uses {
+    interface DisseminationCache[uint16_t key];
+    interface TrickleTimer[uint16_t key];
+    interface StdControl as DisseminatorControl[uint16_t id];
+
+    interface AMSend;
+    interface Receive;
+
+    interface AMSend as ProbeAMSend;
+    interface Receive as ProbeReceive;
+
+    interface Leds;
+  }
+}
+implementation {
+
+  enum { NUM_DISSEMINATORS = uniqueCount("DisseminationTimerC.TrickleTimer") };
+
+  message_t m_buf;
+  bool m_running;
+  bool m_bufBusy;
+
+  void sendProbe( uint16_t key );
+  void sendObject( uint16_t key );
+
+  command error_t StdControl.start() {
+    uint8_t i;
+    for ( i = 0; i < NUM_DISSEMINATORS; i++ ) {
+      call DisseminatorControl.start[ i ]();
+    }
+    m_running = TRUE;
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    uint8_t i;
+    for ( i = 0; i < NUM_DISSEMINATORS; i++ ) {
+      call DisseminatorControl.stop[ i ]();
+    }
+    m_running = FALSE;
+    return SUCCESS;
+  }
+
+  event error_t DisseminationCache.start[ uint16_t key ]() {
+    error_t result = call TrickleTimer.start[ key ]();
+    call TrickleTimer.reset[ key ]();
+    return result;
+  }
+
+  event error_t DisseminationCache.stop[ uint16_t key ]() {
+    call TrickleTimer.stop[ key ]();
+    return SUCCESS;
+  }
+
+  event void DisseminationCache.newData[ uint16_t key ]() {
+    sendObject( key );
+    // Note we reset even if not running. This means that if Drip is
+    // off and new data is received, it will reset the timer but not
+    // send the object. This means that the timer continues properly,
+    // but transmissions are suppressed. This is a better approach than
+    // just leaving the timer in its prior state.
+    
+    call TrickleTimer.reset[ key ]();
+  }
+
+  event void TrickleTimer.fired[ uint16_t key ]() {
+
+    sendObject( key );
+  }
+
+  void sendProbe( uint16_t key ) {
+    dissemination_probe_message_t* dpMsg = 
+      (dissemination_probe_message_t*) call ProbeAMSend.getPayload( &m_buf, sizeof(dissemination_probe_message_t));
+    if (dpMsg != NULL) {
+      m_bufBusy = TRUE;
+      
+      dpMsg->key = key;
+      
+      call ProbeAMSend.send( AM_BROADCAST_ADDR, &m_buf,
+			     sizeof( dissemination_probe_message_t ) );
+    }
+  }
+
+  void sendObject( uint16_t key ) {
+    void* object;
+    uint8_t objectSize = 0;
+    dissemination_message_t* dMsg;
+    
+    // If Drip is not running or if the Drip buffer
+    // is busy, do not send. This fixes Issue #12 in the
+    // Google code tracker. -pal
+    if ( !m_running || m_bufBusy ) { return; }
+
+    dMsg = 
+      (dissemination_message_t*) call AMSend.getPayload( &m_buf, sizeof(dissemination_message_t) );
+    if (dMsg != NULL) {
+      m_bufBusy = TRUE;
+      
+      dMsg->key = key;
+      dMsg->seqno = call DisseminationCache.requestSeqno[ key ]();
+      
+      if ( dMsg->seqno != DISSEMINATION_SEQNO_UNKNOWN ) {
+	object = call DisseminationCache.requestData[ key ]( &objectSize );
+	if ((objectSize + sizeof(dissemination_message_t)) > 
+	    call AMSend.maxPayloadLength()) {
+	  objectSize = call AMSend.maxPayloadLength() - sizeof(dissemination_message_t);
+	}
+	memcpy( dMsg->data, object, objectSize );
+      }      
+      call AMSend.send( AM_BROADCAST_ADDR,
+			&m_buf, sizeof( dissemination_message_t ) + objectSize );
+    }
+  }
+
+  event void ProbeAMSend.sendDone( message_t* msg, error_t error ) {
+    m_bufBusy = FALSE;
+  }
+
+  event void AMSend.sendDone( message_t* msg, error_t error ) {
+    m_bufBusy = FALSE;
+  }
+
+  event message_t* Receive.receive( message_t* msg, 
+				    void* payload, 
+				    uint8_t len ) {
+
+    dissemination_message_t* dMsg = 
+      (dissemination_message_t*) payload;
+
+    uint16_t key = dMsg->key;
+    uint32_t incomingSeqno = dMsg->seqno;
+    uint32_t currentSeqno = call DisseminationCache.requestSeqno[ key ]();
+
+    if ( !m_running ) { return msg; }
+
+    if ( currentSeqno == DISSEMINATION_SEQNO_UNKNOWN &&
+	 incomingSeqno != DISSEMINATION_SEQNO_UNKNOWN ) {
+
+      call DisseminationCache.storeData[ key ]
+	( dMsg->data, 
+	  len - sizeof( dissemination_message_t ),
+	  incomingSeqno );
+      
+      call TrickleTimer.reset[ key ]();
+      return msg;
+    }
+
+    if ( incomingSeqno == DISSEMINATION_SEQNO_UNKNOWN &&
+	 currentSeqno != DISSEMINATION_SEQNO_UNKNOWN ) {
+
+      call TrickleTimer.reset[ key ]();
+      return msg;
+    }
+
+    if ( (int32_t)( incomingSeqno - currentSeqno ) > 0 ) {
+
+      call DisseminationCache.storeData[key]
+	( dMsg->data, 
+	  len - sizeof(dissemination_message_t),
+	  incomingSeqno );
+      dbg("Dissemination", "Received dissemination value 0x%08x,0x%08x @ %s\n", (int)key, (int)incomingSeqno, sim_time_string());
+      call TrickleTimer.reset[ key ]();
+
+    } else if ( (int32_t)( incomingSeqno - currentSeqno ) == 0 ) {
+      
+      call TrickleTimer.incrementCounter[ key ]();
+
+    } else {
+
+      // Still not sure which of these is the best. Immediate send for now.
+      sendObject( key );
+      // call TrickleTimer.reset[ key ]();
+
+    }
+
+    return msg;
+  }
+
+  event message_t* ProbeReceive.receive( message_t* msg, 
+					 void* payload, 
+					 uint8_t len) {
+    
+    dissemination_probe_message_t* dpMsg = 
+      (dissemination_probe_message_t*) payload;
+
+    if ( !m_running ) { return msg; }
+
+    if ( call DisseminationCache.requestSeqno[ dpMsg->key ]() != 
+	 DISSEMINATION_SEQNO_UNKNOWN ) {    
+      sendObject( dpMsg->key );
+    }
+
+    return msg;
+  }
+  
+  default command void* 
+    DisseminationCache.requestData[uint16_t key]( uint8_t* size ) { return NULL; }
+
+  default command void 
+    DisseminationCache.storeData[uint16_t key]( void* data, 
+						uint8_t size, 
+						uint32_t seqno ) {}
+
+  default command uint32_t 
+    DisseminationCache.requestSeqno[uint16_t key]() { return DISSEMINATION_SEQNO_UNKNOWN; }
+
+  default command error_t TrickleTimer.start[uint16_t key]() { return FAIL; }
+
+  default command void TrickleTimer.stop[uint16_t key]() { }
+
+  default command void TrickleTimer.reset[uint16_t key]() { }
+
+  default command void TrickleTimer.incrementCounter[uint16_t key]() { }
+
+  default command error_t DisseminatorControl.start[uint16_t id]() { return FAIL; }
+  default command error_t DisseminatorControl.stop[uint16_t id]() { return FAIL; }
+}
diff --git a/tos/lib/net/drip/DisseminationEngineP.nc b/tos/lib/net/drip/DisseminationEngineP.nc
new file mode 100644
index 00000000..9e94f9db
--- /dev/null
+++ b/tos/lib/net/drip/DisseminationEngineP.nc
@@ -0,0 +1,78 @@
+#include <DisseminationEngine.h>
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminationEngineP component retrieves values from the
+ * DisseminatorP components and disseminates them over the radio.
+ *
+ * TODO: Hook DisseminationProbe up to the serial instead of the radio.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2007-09-14 00:22:18 $
+ */
+
+configuration DisseminationEngineP {
+  provides interface StdControl;
+
+  uses {
+    interface DisseminationCache[uint16_t key];
+    interface TrickleTimer[uint16_t key];
+    interface StdControl as DisseminatorControl[uint16_t id];
+  }
+}
+implementation {
+  components DisseminationEngineImplP;
+  StdControl = DisseminationEngineImplP;
+  DisseminationCache = DisseminationEngineImplP;
+  TrickleTimer = DisseminationEngineImplP;
+  DisseminatorControl = DisseminationEngineImplP;
+
+  components new AMSenderC(AM_DISSEMINATION_MESSAGE) as DisseminationSendC;
+  DisseminationEngineImplP.AMSend -> DisseminationSendC.AMSend;
+
+  components new AMReceiverC(AM_DISSEMINATION_MESSAGE) as DisseminationReceiveC;
+  DisseminationEngineImplP.Receive -> DisseminationReceiveC.Receive;
+
+  components new AMSenderC(AM_DISSEMINATION_PROBE_MESSAGE) as DisseminationProbeSendC;
+  DisseminationEngineImplP.ProbeAMSend -> DisseminationProbeSendC.AMSend;
+
+  components new AMReceiverC(AM_DISSEMINATION_PROBE_MESSAGE) 
+    as DisseminationProbeReceiveC;
+  DisseminationEngineImplP.ProbeReceive -> DisseminationProbeReceiveC.Receive;
+
+  components NoLedsC;
+  DisseminationEngineImplP.Leds -> NoLedsC;
+}
diff --git a/tos/lib/net/drip/DisseminationTimerP.nc b/tos/lib/net/drip/DisseminationTimerP.nc
new file mode 100644
index 00000000..b4c8789d
--- /dev/null
+++ b/tos/lib/net/drip/DisseminationTimerP.nc
@@ -0,0 +1,51 @@
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/*
+ * The DisseminationTimerP component maintains a set of Trickle timers
+ * and is wired to DisseminationEngineC once for each DisseminatorC.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2007-09-14 00:22:18 $
+ */
+
+configuration DisseminationTimerP {
+  provides interface TrickleTimer[uint8_t id];
+}
+implementation {
+  components new TrickleTimerMilliC(1, 1024, 1, 
+				    uniqueCount("DisseminationTimerC.TrickleTimer"));
+  TrickleTimer = TrickleTimerMilliC;
+}
diff --git a/tos/lib/net/drip/DisseminatorC.nc b/tos/lib/net/drip/DisseminatorC.nc
new file mode 100644
index 00000000..fbc22d87
--- /dev/null
+++ b/tos/lib/net/drip/DisseminatorC.nc
@@ -0,0 +1,72 @@
+#include <DisseminationEngine.h>
+
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminatorC component holds and synchronizes a single value
+ * of a chosen type, and identifies that value by a chosen 16-bit key.
+ * Different nodes should use the same key for the same value.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @param t the type of the object that will be disseminated
+ * @param key the 16-bit identifier of the disseminated object
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2007-09-14 00:22:18 $
+ */
+
+generic configuration DisseminatorC(typedef t, uint16_t key) {
+  provides interface DisseminationValue<t>;
+  provides interface DisseminationUpdate<t>;
+}
+implementation {
+  enum {
+    TIMER_ID = unique("DisseminationTimerC.TrickleTimer")
+  };
+
+  components new DisseminatorP(t);
+  DisseminationValue = DisseminatorP;
+  DisseminationUpdate = DisseminatorP;
+
+  components DisseminationEngineP;
+  DisseminationEngineP.DisseminationCache[key] -> DisseminatorP;
+  DisseminationEngineP.DisseminatorControl[TIMER_ID] -> DisseminatorP;
+
+  components DisseminationTimerP;
+  DisseminationEngineP.TrickleTimer[key] -> 
+    DisseminationTimerP.TrickleTimer[TIMER_ID];
+
+  components LedsC;
+  DisseminatorP.Leds -> LedsC;
+}
diff --git a/tos/lib/net/drip/DisseminatorP.nc b/tos/lib/net/drip/DisseminatorP.nc
new file mode 100644
index 00000000..2a3a2309
--- /dev/null
+++ b/tos/lib/net/drip/DisseminatorP.nc
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+/**
+ * The DisseminatorP module holds and synchronizes a single value of a
+ * chosen type.
+ *
+ * See TEP118 - Dissemination for details.
+ * 
+ * @param t the type of the object that will be disseminated
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.3 $ $Date: 2008-02-16 01:31:50 $
+ */
+
+generic module DisseminatorP(typedef t) {
+  provides interface StdControl;
+
+  provides interface DisseminationValue<t>;
+  provides interface DisseminationUpdate<t>;
+  provides interface DisseminationCache;
+
+  uses interface Leds;
+}
+implementation {
+  t valueCache;
+  bool m_running;
+
+  // A sequence number is 32 bits. The top 16 bits are an incrementing
+  // counter, while the bottom 16 bits are a unique node identifier.
+  uint32_t seqno = DISSEMINATION_SEQNO_UNKNOWN;
+
+  task void changedTask() {
+    signal DisseminationValue.changed();
+  }
+  
+  command error_t StdControl.start() {
+    error_t result = signal DisseminationCache.start();
+    if ( result == SUCCESS ) { m_running = TRUE; }
+    return result;
+  }
+
+  command error_t StdControl.stop() {
+    if ( !m_running ) { return EOFF; }
+    m_running = FALSE;
+    return signal DisseminationCache.stop();
+  }
+
+  command const t* DisseminationValue.get() {
+    return &valueCache;
+  }
+
+  command void DisseminationValue.set( const t* val ) {
+    if (seqno == DISSEMINATION_SEQNO_UNKNOWN) {
+      valueCache = *val;
+    }
+  }
+
+  command void DisseminationUpdate.change( t* newVal ) {
+    if ( !m_running ) { return; }
+    memcpy( &valueCache, newVal, sizeof(t) );
+    /* Increment the counter and append the local node ID. */
+    seqno = seqno >> 16;
+    seqno++;
+    if ( seqno == DISSEMINATION_SEQNO_UNKNOWN ) { seqno++; }
+    seqno = seqno << 16;
+    seqno += TOS_NODE_ID;
+    signal DisseminationCache.newData();
+    post changedTask();
+  }
+
+  command void* DisseminationCache.requestData( uint8_t* size ) {
+    *size = sizeof(t);
+    return &valueCache;
+  }
+
+  command void DisseminationCache.storeData( void* data, uint8_t size,
+					     uint32_t newSeqno ) {
+    memcpy( &valueCache, data, size < sizeof(t) ? size : sizeof(t) );
+    seqno = newSeqno;
+    // We need to signal here and can't go through a task to
+    // ensure that the update and changed event are atomic.
+    // Otherwise, it is possible that storeData is called,
+    // but before the task runs, the client calls set(). -pal
+    signal DisseminationValue.changed();
+  }
+
+  command uint32_t DisseminationCache.requestSeqno() {
+    return seqno;
+  }
+
+  default event void DisseminationValue.changed() { }
+}
diff --git a/tos/lib/net/le/LinkEstimator.h b/tos/lib/net/le/LinkEstimator.h
new file mode 100644
index 00000000..ed7b6663
--- /dev/null
+++ b/tos/lib/net/le/LinkEstimator.h
@@ -0,0 +1,129 @@
+/* $Id: LinkEstimator.h,v 1.5 2010-06-29 22:07:49 scipio Exp $ */
+/*
+ * Copyright (c) 2006 University of Southern California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef LINK_ESITIMATOR_H
+#define LINK_ESITIMATOR_H
+/*
+ @ author Omprakash Gnawali
+ @ Created: June 08, 2006
+ */
+
+// Number of entries in the neighbor table
+#define NEIGHBOR_TABLE_SIZE 10
+
+// Masks for the flag field in the link estimation header
+enum {
+  // use last four bits to keep track of
+  // how many footer entries there are
+  NUM_ENTRIES_FLAG = 15,
+};
+
+// The first byte of each outgoing packet is a control byte
+// Bits 4..7 reserved for routing and other protocols
+// Bits 0..3 is used by the link estimator to encode the
+//   number of linkest entries in the packet
+
+// link estimator header added to
+// every message passing through the link estimator
+typedef nx_struct linkest_header {
+  nx_uint8_t flags;
+  nx_uint8_t seq;
+} linkest_header_t;
+
+
+// for outgoing link estimator message
+// so that we can compute bi-directional quality
+typedef nx_struct neighbor_stat_entry {
+  nx_am_addr_t ll_addr;
+  nx_uint8_t inquality;
+} neighbor_stat_entry_t;
+
+// we put the above neighbor entry in the footer
+typedef nx_struct linkest_footer {
+  neighbor_stat_entry_t neighborList[1];
+} linkest_footer_t;
+
+
+// Flags for the neighbor table entry
+enum {
+  VALID_ENTRY = 0x1, 
+  // A link becomes mature after BLQ_PKT_WINDOW
+  // packets are received and an estimate is computed
+  MATURE_ENTRY = 0x2,
+  // Flag to indicate that this link has received the
+  // first sequence number
+  INIT_ENTRY = 0x4,
+  // The upper layer has requested that this link be pinned
+  // Useful if we don't want to lose the root from the table
+  PINNED_ENTRY = 0x8
+};
+
+
+// neighbor table entry
+typedef struct neighbor_table_entry {
+  // link layer address of the neighbor
+  am_addr_t ll_addr;
+  // last beacon sequence number received from this neighbor
+  uint8_t lastseq;
+  // number of beacons received after last beacon estimator update
+  // the update happens every BLQ_PKT_WINDOW beacon packets
+  uint8_t rcvcnt;
+  // number of beacon packets missed after last beacon estimator update
+  uint8_t failcnt;
+  // flags to describe the state of this entry
+  uint8_t flags;
+  // MAXAGE-inage gives the number of update rounds we haven't been able
+  // update the inbound beacon estimator
+  uint8_t inage;
+  // MAXAGE-outage gives the number of update rounds we haven't received
+  // the outbound link quality
+  uint8_t outage;
+  // inbound and outbound link qualities in the range [1..255]
+  // 1 bad, 255 good
+  uint8_t inquality;
+  uint8_t outquality;
+  // EETX for the link to this neighbor. This is the quality returned to
+  // the users of the link estimator
+  uint16_t eetx;
+  // Number of data packets successfully sent (ack'd) to this neighbor
+  // since the last data estimator update round. This update happens
+  // every DLQ_PKT_WINDOW data packets
+  uint8_t data_success;
+  // The total number of data packets transmission attempt to this neighbor
+  // since the last data estimator update round.
+  uint8_t data_total;
+} neighbor_table_entry_t;
+
+
+#endif
diff --git a/tos/lib/net/le/LinkEstimator.nc b/tos/lib/net/le/LinkEstimator.nc
new file mode 100644
index 00000000..ffbf5ddf
--- /dev/null
+++ b/tos/lib/net/le/LinkEstimator.nc
@@ -0,0 +1,81 @@
+/* $Id: LinkEstimator.nc,v 1.6 2010-06-29 22:07:49 scipio Exp $ */
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** Provides an additive quality measure for a neighbor. The
+ * provided quality increases when the true link quality increases.
+ *  @author Rodrigo Fonseca
+ *  @author Omprakash Gnawali
+ *  @date   $Date: 2010-06-29 22:07:49 $
+ */
+
+/* Quality of a link is defined by the implementor of this interface.
+ * It could be ETX, PRR, etc.
+ */
+
+interface LinkEstimator {
+  
+  /* get bi-directional link quality for link to the neighbor */
+  command uint16_t getLinkQuality(uint16_t neighbor);
+
+  /* get quality of the link from neighbor to this node */
+  command uint16_t getReverseQuality(uint16_t neighbor);
+
+  /* get quality of the link from this node to the neighbor */
+  command uint16_t getForwardQuality(uint16_t neighbor);
+
+  /* insert this neighbor into the neighbor table */
+  command error_t insertNeighbor(am_addr_t neighbor);
+
+  /* pin a neighbor so that it does not get evicted */
+  command error_t pinNeighbor(am_addr_t neighbor);
+
+  /* pin a neighbor so that it does not get evicted */
+  command error_t unpinNeighbor(am_addr_t neighbor);
+
+  /* called when an acknowledgement is received; sign of a successful
+     data transmission; to update forward link quality */
+  command error_t txAck(am_addr_t neighbor);
+
+  /* called when an acknowledgement is not received; could be due to
+     data pkt or acknowledgement loss; to update forward link quality */
+  command error_t txNoAck(am_addr_t neighbor);
+
+  /* called when the parent changes; clear state about data-driven link quality  */
+  command error_t clearDLQ(am_addr_t neighbor);
+
+  /* signal when this neighbor is evicted from the neighbor table */
+  event void evicted(am_addr_t neighbor);
+}
+
+
diff --git a/tos/lib/net/le/LinkEstimatorC.nc b/tos/lib/net/le/LinkEstimatorC.nc
new file mode 100644
index 00000000..fe4b3557
--- /dev/null
+++ b/tos/lib/net/le/LinkEstimatorC.nc
@@ -0,0 +1,45 @@
+/* $Id: LinkEstimatorC.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $ */
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** The public component of the link estimator that provides the
+ * quality to and from a neighbor 
+ * 
+ *  @author Rodrigo Fonseca
+ *  @date   $Date: 2010-06-29 22:07:50 $
+ */
+configuration LinkEstimatorC {
+    provides {
+        interface LinkEstimator;
+    }
+}
diff --git a/tos/lib/net/le/LinkEstimatorP.nc b/tos/lib/net/le/LinkEstimatorP.nc
new file mode 100644
index 00000000..bcdf3040
--- /dev/null
+++ b/tos/lib/net/le/LinkEstimatorP.nc
@@ -0,0 +1,781 @@
+/* $Id: LinkEstimatorP.nc,v 1.17 2010-06-29 22:07:50 scipio Exp $ */
+/*
+ * Copyright (c) 2006 University of Southern California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ @ author Omprakash Gnawali
+ @ Created: April 24, 2006
+ */
+
+#include "LinkEstimator.h"
+
+module LinkEstimatorP {
+  provides {
+    interface StdControl;
+    interface AMSend as Send;
+    interface Receive;
+    interface LinkEstimator;
+    interface Init;
+    interface Packet;
+    interface CompareBit;
+  }
+
+  uses {
+    interface AMSend;
+    interface AMPacket as SubAMPacket;
+    interface Packet as SubPacket;
+    interface Receive as SubReceive;
+    interface LinkPacketMetadata;
+    interface Random;
+  }
+}
+
+implementation {
+
+  // configure the link estimator and some constants
+  enum {
+    // If the eetx estimate is below this threshold
+    // do not evict a link
+    EVICT_EETX_THRESHOLD = 55,
+    // maximum link update rounds before we expire the link
+    MAX_AGE = 6,
+    // if received sequence number if larger than the last sequence
+    // number by this gap, we reinitialize the link
+    MAX_PKT_GAP = 10,
+    BEST_EETX = 0,
+    INVALID_RVAL = 0xff,
+    INVALID_NEIGHBOR_ADDR = 0xff,
+    // if we don't know the link quality, we need to return a value so
+    // large that it will not be used to form paths
+    VERY_LARGE_EETX_VALUE = 0xff,
+    // decay the link estimate using this alpha
+    // we use a denominator of 10, so this corresponds to 0.2
+    ALPHA = 9,
+    // number of packets to wait before computing a new
+    // DLQ (Data-driven Link Quality)
+    DLQ_PKT_WINDOW = 5,
+    // number of beacons to wait before computing a new
+    // BLQ (Beacon-driven Link Quality)
+    BLQ_PKT_WINDOW = 3,
+    // largest EETX value that we feed into the link quality EWMA
+    // a value of 60 corresponds to having to make six transmissions
+    // to successfully receive one acknowledgement
+    LARGE_EETX_VALUE = 60
+  };
+
+  // keep information about links from the neighbors
+  neighbor_table_entry_t NeighborTable[NEIGHBOR_TABLE_SIZE];
+  // link estimation sequence, increment every time a beacon is sent
+  uint8_t linkEstSeq = 0;
+  // if there is not enough room in the packet to put all the neighbor table
+  // entries, in order to do round robin we need to remember which entry
+  // we sent in the last beacon
+  uint8_t prevSentIdx = 0;
+
+  // get the link estimation header in the packet
+  linkest_header_t* getHeader(message_t* m) {
+    return (linkest_header_t*)call SubPacket.getPayload(m, sizeof(linkest_header_t));
+  }
+
+  // get the link estimation footer (neighbor entries) in the packet
+  linkest_footer_t* getFooter(message_t* ONE m, uint8_t len) {
+    // To get a footer at offset "len", the payload must be len + sizeof large.
+    return (linkest_footer_t* ONE)(len + (uint8_t *)call Packet.getPayload(m,len + sizeof(linkest_footer_t)));
+  }
+
+  // add the link estimation header (seq no) and link estimation
+  // footer (neighbor entries) in the packet. Call just before sending
+  // the packet.
+  uint8_t addLinkEstHeaderAndFooter(message_t * ONE msg, uint8_t len) {
+    uint8_t newlen;
+    linkest_header_t *hdr;
+    linkest_footer_t *footer;
+    uint8_t i, j, k;
+    uint8_t maxEntries, newPrevSentIdx;
+    dbg("LI", "newlen1 = %d\n", len);
+    hdr = getHeader(msg);
+    footer = getFooter(msg, len);
+
+    maxEntries = ((call SubPacket.maxPayloadLength() - len - sizeof(linkest_header_t))
+		  / sizeof(linkest_footer_t));
+
+    // Depending on the number of bits used to store the number
+    // of entries, we can encode up to NUM_ENTRIES_FLAG using those bits
+    if (maxEntries > NUM_ENTRIES_FLAG) {
+      maxEntries = NUM_ENTRIES_FLAG;
+    }
+    dbg("LI", "Max payload is: %d, maxEntries is: %d\n", call SubPacket.maxPayloadLength(), maxEntries);
+
+    j = 0;
+    newPrevSentIdx = 0;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE && j < maxEntries; i++) {
+      uint8_t neighborCount;
+      neighbor_stat_entry_t * COUNT(neighborCount) neighborLists;
+      if(maxEntries <= NEIGHBOR_TABLE_SIZE)
+        neighborCount = maxEntries;
+      else
+        neighborCount = NEIGHBOR_TABLE_SIZE;
+      
+      neighborLists = TCAST(neighbor_stat_entry_t * COUNT(neighborCount), footer->neighborList);
+
+      k = (prevSentIdx + i + 1) % NEIGHBOR_TABLE_SIZE;
+      if ((NeighborTable[k].flags & VALID_ENTRY) &&
+	  (NeighborTable[k].flags & MATURE_ENTRY)) {
+	neighborLists[j].ll_addr = NeighborTable[k].ll_addr;
+	neighborLists[j].inquality = NeighborTable[k].inquality;
+	newPrevSentIdx = k;
+	dbg("LI", "Loaded on footer: %d %d %d\n", j, neighborLists[j].ll_addr,
+	    neighborLists[j].inquality);
+	j++;
+      }
+    }
+    prevSentIdx = newPrevSentIdx;
+
+    hdr->seq = linkEstSeq++;
+    hdr->flags = 0;
+    hdr->flags |= (NUM_ENTRIES_FLAG & j);
+    newlen = sizeof(linkest_header_t) + len + j*sizeof(linkest_footer_t);
+    dbg("LI", "newlen2 = %d\n", newlen);
+    return newlen;
+  }
+
+
+  // initialize the given entry in the table for neighbor ll_addr
+  void initNeighborIdx(uint8_t i, am_addr_t ll_addr) {
+    neighbor_table_entry_t *ne;
+    ne = &NeighborTable[i];
+    ne->ll_addr = ll_addr;
+    ne->lastseq = 0;
+    ne->rcvcnt = 0;
+    ne->failcnt = 0;
+    ne->flags = (INIT_ENTRY | VALID_ENTRY);
+    ne->inage = MAX_AGE;
+    ne->outage = MAX_AGE;
+    ne->inquality = 0;
+    ne->outquality = 0;
+    ne->eetx = 0;
+  }
+
+  // find the index to the entry for neighbor ll_addr
+  uint8_t findIdx(am_addr_t ll_addr) {
+    uint8_t i;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      if (NeighborTable[i].flags & VALID_ENTRY) {
+	if (NeighborTable[i].ll_addr == ll_addr) {
+	  return i;
+	}
+      }
+    }
+    return INVALID_RVAL;
+  }
+
+  // find an empty slot in the neighbor table
+  uint8_t findEmptyNeighborIdx() {
+    uint8_t i;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      if (NeighborTable[i].flags & VALID_ENTRY) {
+      } else {
+	return i;
+      }
+    }
+      return INVALID_RVAL;
+  }
+
+  // find the index to the worst neighbor if the eetx
+  // estimate is greater than the given threshold
+  uint8_t findWorstNeighborIdx(uint8_t thresholdEETX) {
+    uint8_t i, worstNeighborIdx;
+    uint16_t worstEETX, thisEETX;
+
+    worstNeighborIdx = INVALID_RVAL;
+    worstEETX = 0;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      if (!(NeighborTable[i].flags & VALID_ENTRY)) {
+	dbg("LI", "Invalid so continuing\n");
+	continue;
+      }
+      if (!(NeighborTable[i].flags & MATURE_ENTRY)) {
+	dbg("LI", "Not mature, so continuing\n");
+	continue;
+      }
+      if (NeighborTable[i].flags & PINNED_ENTRY) {
+	dbg("LI", "Pinned entry, so continuing\n");
+	continue;
+      }
+      thisEETX = NeighborTable[i].eetx;
+      if (thisEETX >= worstEETX) {
+	worstNeighborIdx = i;
+	worstEETX = thisEETX;
+      }
+    }
+    if (worstEETX >= thresholdEETX) {
+      return worstNeighborIdx;
+    } else {
+      return INVALID_RVAL;
+    }
+  }
+
+  // update the quality of the link link: self->neighbor
+  // this is found in the entries in the footer of incoming message
+  void updateReverseQuality(am_addr_t neighbor, uint8_t outquality) {
+    uint8_t idx;
+    idx = findIdx(neighbor);
+    if (idx != INVALID_RVAL) {
+      NeighborTable[idx].outquality = outquality;
+      NeighborTable[idx].outage = MAX_AGE;
+    }
+  }
+
+  // update the EETX estimator
+  // called when new beacon estimate is done
+  // also called when new DEETX estimate is done
+  void updateEETX(neighbor_table_entry_t *ne, uint16_t newEst) {
+    ne->eetx = (ALPHA * ne->eetx + (10 - ALPHA) * newEst + 5)/10;
+  }
+
+
+  // update data driven EETX
+  void updateDEETX(neighbor_table_entry_t *ne) {
+    uint16_t estETX;
+
+    if (ne->data_success == 0) {
+      // if there were no successful packet transmission in the
+      // last window, our current estimate is the number of failed
+      // transmissions
+      estETX = (ne->data_total - 1)* 10;
+    } else {
+      estETX = (10 * ne->data_total) / ne->data_success - 10;
+      ne->data_success = 0;
+      ne->data_total = 0;
+    }
+    updateEETX(ne, estETX);
+  }
+
+
+  // EETX (Extra Expected number of Transmission)
+  // EETX = ETX - 1
+  // computeEETX returns EETX*10
+  uint8_t computeEETX(uint8_t q1) {
+    uint16_t q;
+    if (q1 > 0) {
+      q =  2550 / q1 - 10;
+      if (q > 255) {
+	q = VERY_LARGE_EETX_VALUE;
+      }
+      return (uint8_t)q;
+    } else {
+      return VERY_LARGE_EETX_VALUE;
+    }
+  }
+
+  // BidirETX = 1 / (q1*q2)
+  // BidirEETX = BidirETX - 1
+  // computeBidirEETX return BidirEETX*10
+  uint8_t computeBidirEETX(uint8_t q1, uint8_t q2) {
+    uint16_t q;
+    if ((q1 > 0) && (q2 > 0)) {
+      q =  65025u / q1;
+      q = (10*q) / q2 - 10;
+      if (q > 255) {
+	q = LARGE_EETX_VALUE;
+      }
+      return (uint8_t)q;
+    } else {
+      return LARGE_EETX_VALUE;
+    }
+  }
+
+  // update the inbound link quality by
+  // munging receive, fail count since last update
+  void updateNeighborTableEst(am_addr_t n) {
+    uint8_t i, totalPkt;
+    neighbor_table_entry_t *ne;
+    uint8_t newEst;
+    uint8_t minPkt;
+
+    minPkt = BLQ_PKT_WINDOW;
+    dbg("LI", "%s\n", __FUNCTION__);
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      ne = &NeighborTable[i];
+      if (ne->ll_addr == n) {
+	if (ne->flags & VALID_ENTRY) {
+	  if (ne->inage > 0)
+	    ne->inage--;
+	  if (ne->outage > 0)
+	    ne->outage--;
+	  
+	  if ((ne->inage == 0) && (ne->outage == 0)) {
+	    ne->flags ^= VALID_ENTRY;
+	    ne->inquality = ne->outquality = 0;
+	  } else {
+	    dbg("LI", "Making link: %d mature\n", i);
+	    ne->flags |= MATURE_ENTRY;
+	    totalPkt = ne->rcvcnt + ne->failcnt;
+	    dbg("LI", "MinPkt: %d, totalPkt: %d\n", minPkt, totalPkt);
+	    if (totalPkt < minPkt) {
+	      totalPkt = minPkt;
+	    }
+	    if (totalPkt == 0) {
+	      ne->inquality = (ALPHA * ne->inquality) / 10;
+	    } else {
+	      newEst = (255 * ne->rcvcnt) / totalPkt;
+	      dbg("LI,LITest", "  %hu: %hhu -> %hhu", ne->ll_addr, ne->inquality, (ALPHA * ne->inquality + (10-ALPHA) * newEst + 5)/10);
+	      ne->inquality = (ALPHA * ne->inquality + (10-ALPHA) * newEst + 5)/10;
+	    }
+	    ne->rcvcnt = 0;
+	    ne->failcnt = 0;
+	  }
+	  updateEETX(ne, computeBidirEETX(ne->inquality, ne->outquality));
+	}
+	else {
+	  dbg("LI", " - entry %i is invalid.\n", (int)i);
+	}
+      }
+    }
+  }
+
+
+  // we received seq from the neighbor in idx
+  // update the last seen seq, receive and fail count
+  // refresh the age
+  void updateNeighborEntryIdx(uint8_t idx, uint8_t seq) {
+    uint8_t packetGap;
+
+    if (NeighborTable[idx].flags & INIT_ENTRY) {
+      dbg("LI", "Init entry update\n");
+      NeighborTable[idx].lastseq = seq;
+      NeighborTable[idx].flags &= ~INIT_ENTRY;
+    }
+    
+    packetGap = seq - NeighborTable[idx].lastseq;
+    dbg("LI", "updateNeighborEntryIdx: prevseq %d, curseq %d, gap %d\n",
+	NeighborTable[idx].lastseq, seq, packetGap);
+    NeighborTable[idx].lastseq = seq;
+    NeighborTable[idx].rcvcnt++;
+    NeighborTable[idx].inage = MAX_AGE;
+    if (packetGap > 0) {
+      NeighborTable[idx].failcnt += packetGap - 1;
+    }
+    if (packetGap > MAX_PKT_GAP) {
+      NeighborTable[idx].failcnt = 0;
+      NeighborTable[idx].rcvcnt = 1;
+      NeighborTable[idx].outage = 0;
+      NeighborTable[idx].outquality = 0;
+      NeighborTable[idx].inquality = 0;
+    }
+
+    if (NeighborTable[idx].rcvcnt >= BLQ_PKT_WINDOW) {
+      updateNeighborTableEst(NeighborTable[idx].ll_addr);
+    }
+
+  }
+
+
+
+  // print the neighbor table. for debugging.
+  void print_neighbor_table() {
+    uint8_t i;
+    neighbor_table_entry_t *ne;
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      ne = &NeighborTable[i];
+      if (ne->flags & VALID_ENTRY) {
+	dbg("LI,LITest", "%d:%d inQ=%d, inA=%d, outQ=%d, outA=%d, rcv=%d, fail=%d, biQ=%d\n",
+	    i, ne->ll_addr, ne->inquality, ne->inage, ne->outquality, ne->outage,
+	    ne->rcvcnt, ne->failcnt, computeBidirEETX(ne->inquality, ne->outquality));
+      }
+    }
+  }
+
+  // print the packet. for debugging.
+  void print_packet(message_t* msg, uint8_t len) {
+    uint8_t i;
+    uint8_t* b;
+
+    b = (uint8_t *)msg->data;
+    for(i=0; i<len; i++)
+      dbg_clear("LI", "%x ", b[i]);
+    dbg_clear("LI", "\n");
+  }
+
+  // initialize the neighbor table in the very beginning
+  void initNeighborTable() {
+    uint8_t i;
+
+    for (i = 0; i < NEIGHBOR_TABLE_SIZE; i++) {
+      NeighborTable[i].flags = 0;
+    }
+  }
+
+  command error_t StdControl.start() {
+    dbg("LI", "Link estimator start\n");
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    return SUCCESS;
+  }
+
+  // initialize the link estimator
+  command error_t Init.init() {
+    dbg("LI", "Link estimator init\n");
+    initNeighborTable();
+    return SUCCESS;
+  }
+
+  // return bi-directional link quality to the neighbor
+  command uint16_t LinkEstimator.getLinkQuality(am_addr_t neighbor) {
+    uint8_t idx;
+    idx = findIdx(neighbor);
+    if (idx == INVALID_RVAL) {
+      return VERY_LARGE_EETX_VALUE;
+    } else {
+      if (NeighborTable[idx].flags & MATURE_ENTRY) {
+	return NeighborTable[idx].eetx;
+      } else {
+	return VERY_LARGE_EETX_VALUE;
+      }
+    }
+  }
+
+  // return the quality of the link: neighor->self
+  command uint16_t LinkEstimator.getReverseQuality(am_addr_t neighbor) {
+    uint8_t idx;
+    idx = findIdx(neighbor);
+    if (idx == INVALID_RVAL) {
+      return VERY_LARGE_EETX_VALUE;
+    } else {
+      if (NeighborTable[idx].flags & MATURE_ENTRY) {
+	return computeEETX(NeighborTable[idx].inquality);
+      } else {
+	return VERY_LARGE_EETX_VALUE;
+      }
+    }
+  }
+
+  // return the quality of the link: self->neighbor
+  command uint16_t LinkEstimator.getForwardQuality(am_addr_t neighbor) {
+    uint8_t idx;
+    idx = findIdx(neighbor);
+    if (idx == INVALID_RVAL) {
+      return VERY_LARGE_EETX_VALUE;
+    } else {
+      if (NeighborTable[idx].flags & MATURE_ENTRY) {
+	return computeEETX(NeighborTable[idx].outquality);
+      } else {
+	return VERY_LARGE_EETX_VALUE;
+      }
+    }
+  }
+
+  // insert the neighbor at any cost (if there is a room for it)
+  // even if eviction of a perfectly fine neighbor is called for
+  command error_t LinkEstimator.insertNeighbor(am_addr_t neighbor) {
+    uint8_t nidx;
+
+    nidx = findIdx(neighbor);
+    if (nidx != INVALID_RVAL) {
+      dbg("LI", "insert: Found the entry, no need to insert\n");
+      return SUCCESS;
+    }
+
+    nidx = findEmptyNeighborIdx();
+    if (nidx != INVALID_RVAL) {
+      dbg("LI", "insert: inserted into the empty slot\n");
+      initNeighborIdx(nidx, neighbor);
+      return SUCCESS;
+    } else {
+      nidx = findWorstNeighborIdx(BEST_EETX);
+      if (nidx != INVALID_RVAL) {
+	dbg("LI", "insert: inserted by replacing an entry for neighbor: %d\n",
+	    NeighborTable[nidx].ll_addr);
+	signal LinkEstimator.evicted(NeighborTable[nidx].ll_addr);
+	initNeighborIdx(nidx, neighbor);
+	return SUCCESS;
+      }
+    }
+    return FAIL;
+  }
+
+  // pin a neighbor so that it does not get evicted
+  command error_t LinkEstimator.pinNeighbor(am_addr_t neighbor) {
+    uint8_t nidx = findIdx(neighbor);
+    if (nidx == INVALID_RVAL) {
+      return FAIL;
+    }
+    NeighborTable[nidx].flags |= PINNED_ENTRY;
+    return SUCCESS;
+  }
+
+  // pin a neighbor so that it does not get evicted
+  command error_t LinkEstimator.unpinNeighbor(am_addr_t neighbor) {
+    uint8_t nidx = findIdx(neighbor);
+    if (nidx == INVALID_RVAL) {
+      return FAIL;
+    }
+    NeighborTable[nidx].flags &= ~PINNED_ENTRY;
+    return SUCCESS;
+  }
+
+
+  // called when an acknowledgement is received; sign of a successful
+  // data transmission; to update forward link quality
+  command error_t LinkEstimator.txAck(am_addr_t neighbor) {
+    neighbor_table_entry_t *ne;
+    uint8_t nidx = findIdx(neighbor);
+    if (nidx == INVALID_RVAL) {
+      return FAIL;
+    }
+    ne = &NeighborTable[nidx];
+    ne->data_success++;
+    ne->data_total++;
+    if (ne->data_total >= DLQ_PKT_WINDOW) {
+      updateDEETX(ne);
+    }
+    return SUCCESS;
+  }
+
+  // called when an acknowledgement is not received; could be due to
+  // data pkt or acknowledgement loss; to update forward link quality
+  command error_t LinkEstimator.txNoAck(am_addr_t neighbor) {
+    neighbor_table_entry_t *ne;
+    uint8_t nidx = findIdx(neighbor);
+    if (nidx == INVALID_RVAL) {
+      return FAIL;
+    }
+
+    ne = &NeighborTable[nidx];
+    ne->data_total++;
+    if (ne->data_total >= DLQ_PKT_WINDOW) {
+      updateDEETX(ne);
+    }
+    return SUCCESS;
+  }
+
+  // called when the parent changes; clear state about data-driven link quality
+  command error_t LinkEstimator.clearDLQ(am_addr_t neighbor) {
+    neighbor_table_entry_t *ne;
+    uint8_t nidx = findIdx(neighbor);
+    if (nidx == INVALID_RVAL) {
+      return FAIL;
+    }
+    ne = &NeighborTable[nidx];
+    ne->data_total = 0;
+    ne->data_success = 0;
+    return SUCCESS;
+  }
+
+
+  // user of link estimator calls send here
+  // slap the header and footer before sending the message
+  command error_t Send.send(am_addr_t addr, message_t* msg, uint8_t len) {
+    uint8_t newlen;
+    newlen = addLinkEstHeaderAndFooter(msg, len);
+    dbg("LITest", "%s packet of length %hhu became %hhu\n", __FUNCTION__, len, newlen);
+    dbg("LI", "Sending seq: %d\n", linkEstSeq);
+    print_packet(msg, newlen);
+    return call AMSend.send(addr, msg, newlen);
+  }
+
+  // done sending the message that originated by
+  // the user of this component
+  event void AMSend.sendDone(message_t* msg, error_t error ) {
+    return signal Send.sendDone(msg, error);
+  }
+
+  // cascade the calls down
+  command uint8_t Send.cancel(message_t* msg) {
+    return call AMSend.cancel(msg);
+  }
+
+  command uint8_t Send.maxPayloadLength() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* Send.getPayload(message_t* msg, uint8_t len) {
+    return call Packet.getPayload(msg, len);
+  }
+
+  // called when link estimator generator packet or
+  // packets from upper layer that are wired to pass through
+  // link estimator is received
+  void processReceivedMessage(message_t* ONE msg, void* COUNT_NOK(len) payload, uint8_t len) {
+    uint8_t nidx;
+    uint8_t num_entries;
+
+    dbg("LI", "LI receiving packet, buf addr: %x\n", payload);
+    print_packet(msg, len);
+
+    if (call SubAMPacket.destination(msg) == AM_BROADCAST_ADDR) {
+      linkest_header_t* hdr = getHeader(msg);
+      linkest_footer_t* ONE footer;
+      am_addr_t ll_addr;
+
+      ll_addr = call SubAMPacket.source(msg);
+
+      dbg("LI", "Got seq: %d from link: %d\n", hdr->seq, ll_addr);
+
+      num_entries = hdr->flags & NUM_ENTRIES_FLAG;
+      print_neighbor_table();
+
+      // update neighbor table with this information
+      // find the neighbor
+      // if found
+      //   update the entry
+      // else
+      //   find an empty entry
+      //   if found
+      //     initialize the entry
+      //   else
+      //     find a bad neighbor to be evicted
+      //     if found
+      //       evict the neighbor and init the entry
+      //     else
+      //       we can not accommodate this neighbor in the table
+      nidx = findIdx(ll_addr);
+      if (nidx != INVALID_RVAL) {
+	dbg("LI", "Found the entry so updating\n");
+	updateNeighborEntryIdx(nidx, hdr->seq);
+      } else {
+	nidx = findEmptyNeighborIdx();
+	if (nidx != INVALID_RVAL) {
+	  dbg("LI", "Found an empty entry\n");
+	  initNeighborIdx(nidx, ll_addr);
+	  updateNeighborEntryIdx(nidx, hdr->seq);
+	} else {
+	  nidx = findWorstNeighborIdx(EVICT_EETX_THRESHOLD);
+	  if (nidx != INVALID_RVAL) {
+	    dbg("LI", "Evicted neighbor %d at idx %d\n",
+		NeighborTable[nidx].ll_addr, nidx);
+	    signal LinkEstimator.evicted(NeighborTable[nidx].ll_addr);
+	    initNeighborIdx(nidx, ll_addr);
+	  } else {
+	    dbg("LI", "No room in the table\n");
+	  }
+	}
+      }
+
+
+      /* Graphical explanation of how we get to the head of the
+       * footer in the following code 
+       * <---------------------- payloadLen ------------------->
+       * -------------------------------------------------------
+       * linkest_header_t  | payload  | linkest_footer_t* ...|
+       * -------------------------------------------------------
+       * ^                              ^                      ^
+       * |                              |                      |
+       * subpayload                     |                      payloadEnd
+       *                                |
+       *                                payloadEnd - footersize*num footers
+      */
+
+      if ((nidx != INVALID_RVAL) && (num_entries > 0)) {
+	uint8_t payloadLen = call SubPacket.payloadLength(msg);
+	void* COUNT_NOK(payloadLen) subPayload = call SubPacket.getPayload(msg, payloadLen);
+	void* payloadEnd = subPayload + payloadLen;
+	dbg("LI", "Number of footer entries: %d\n", num_entries);
+	
+	footer = TCAST(linkest_footer_t* COUNT(num_entries), (payloadEnd - (num_entries*sizeof(linkest_footer_t))));
+	{
+	  uint8_t i;
+	  am_addr_t my_ll_addr;
+          neighbor_stat_entry_t * COUNT(num_entries) neighborLists;
+	  my_ll_addr = call SubAMPacket.address();
+          neighborLists = TCAST(neighbor_stat_entry_t * COUNT(num_entries), footer->neighborList);
+	  for (i = 0; i < num_entries; i++) {
+	    dbg("LI", "%d %d %d\n", i, neighborLists[i].ll_addr,
+	    	neighborLists[i].inquality);
+	    if (neighborLists[i].ll_addr == my_ll_addr) {
+	      updateReverseQuality(ll_addr, neighborLists[i].inquality);
+	    }
+	  }
+	}
+      }
+      print_neighbor_table();
+    }
+
+
+  }
+
+  // new messages are received here
+  // update the neighbor table with the header
+  // and footer in the message
+  // then signal the user of this component
+  event message_t* SubReceive.receive(message_t* msg,
+				      void* payload,
+				      uint8_t len) {
+    dbg("LI", "Received upper packet. Will signal up\n");
+    processReceivedMessage(msg, payload, len);
+    return signal Receive.receive(msg,
+				  call Packet.getPayload(msg, call Packet.payloadLength(msg)),
+				  call Packet.payloadLength(msg));
+  }
+
+  command void Packet.clear(message_t* msg) {
+    call SubPacket.clear(msg);
+  }
+
+  // subtract the space occupied by the link estimation
+  // header and footer from the incoming payload size
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    linkest_header_t *hdr;
+    hdr = getHeader(msg);
+    return call SubPacket.payloadLength(msg)
+      - sizeof(linkest_header_t)
+      - sizeof(linkest_footer_t)*(NUM_ENTRIES_FLAG & hdr->flags);
+  }
+
+  // account for the space used by header and footer
+  // while setting the payload length
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    linkest_header_t *hdr;
+    hdr = getHeader(msg);
+    call SubPacket.setPayloadLength(msg,
+				    len
+				    + sizeof(linkest_header_t)
+				    + sizeof(linkest_footer_t)*(NUM_ENTRIES_FLAG & hdr->flags));
+  }
+
+  command uint8_t Packet.maxPayloadLength() {
+    return call SubPacket.maxPayloadLength() - sizeof(linkest_header_t);
+  }
+
+  // application payload pointer is just past the link estimation header
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    void* payload = call SubPacket.getPayload(msg, len +  sizeof(linkest_header_t));
+    if (payload != NULL) {
+      payload += sizeof(linkest_header_t);
+    }
+    return payload;
+  }
+}
+
diff --git a/tos/lib/net/lqi/Collection.h b/tos/lib/net/lqi/Collection.h
new file mode 100644
index 00000000..706dd08b
--- /dev/null
+++ b/tos/lib/net/lqi/Collection.h
@@ -0,0 +1,51 @@
+/* $Id: Collection.h,v 1.3 2010-06-29 22:07:50 scipio Exp $ */
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ *  @author Rodrigo Fonseca
+ *  @date   $Date: 2010-06-29 22:07:50 $
+ */
+#ifndef COLLECTION_H
+#define COLLECTION_H
+
+enum {
+    AM_COLLECTION_DATA = 20,
+    AM_COLLECTION_CONTROL = 21,
+    AM_COLLECTION_DEBUG = 22,
+};
+
+typedef uint8_t collection_id_t;
+typedef nx_uint8_t nx_collection_id_t;
+
+#endif
diff --git a/tos/lib/net/lqi/CollectionC.nc b/tos/lib/net/lqi/CollectionC.nc
new file mode 100644
index 00000000..d3dc199e
--- /dev/null
+++ b/tos/lib/net/lqi/CollectionC.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ * @author Philip Levis
+ */
+
+#include "MultiHopLqi.h"
+
+configuration CollectionC {
+  
+  provides {
+    interface StdControl;
+    interface Send[uint8_t client];
+    interface Receive[collection_id_t id];
+    interface Receive as Snoop[collection_id_t];
+    interface Intercept[collection_id_t id];
+    interface Packet;
+    interface CollectionPacket;
+    interface RootControl;
+    interface RouteControl;
+  }
+  uses interface CollectionDebug;
+  
+}
+
+implementation {
+  components MultiHopLqiP as Router;
+  components new SendVirtualizerP(NUM_LQI_CLIENTS);
+  
+  RouteControl = Router;
+
+  Send =        SendVirtualizerP;
+  SendVirtualizerP.SubSend -> Router.Send;
+  SendVirtualizerP.Packet -> Router;
+  
+  StdControl =  Router;
+  Receive =     Router.Receive;
+  RootControl = Router;
+  Packet =      Router;
+  Snoop =       Router.Snoop;
+  Intercept =   Router.Intercept;
+  CollectionPacket = Router;
+
+  Router.CollectionDebug = CollectionDebug;
+}
diff --git a/tos/lib/net/lqi/CollectionSenderC.nc b/tos/lib/net/lqi/CollectionSenderC.nc
new file mode 100644
index 00000000..374d2e67
--- /dev/null
+++ b/tos/lib/net/lqi/CollectionSenderC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * The virtualized collection sender abstraction.
+ *
+ * @author Kyle Jamieson
+ * @author Philip Levis
+ * @date April 25 2006
+ * @see TinyOS Net2-WG
+ */
+
+#include <MultiHopLqi.h>
+
+generic configuration CollectionSenderC(collection_id_t collectid) {
+  provides {
+    interface Send;
+    interface Packet;
+  }
+}
+implementation {
+  components new CollectionSenderP(collectid), CollectionC;
+  Send = CollectionSenderP;
+  Packet = CollectionC;
+  CollectionSenderP.SubSend -> CollectionC.Send[unique(UQ_LQI_CLIENT)];
+  CollectionSenderP.CollectionPacket -> CollectionC;
+}
diff --git a/tos/lib/net/lqi/CollectionSenderP.nc b/tos/lib/net/lqi/CollectionSenderP.nc
new file mode 100644
index 00000000..f8395944
--- /dev/null
+++ b/tos/lib/net/lqi/CollectionSenderP.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Collection.h"
+
+generic module CollectionSenderP(collection_id_t collectid) {
+  provides interface Send;
+  uses interface Send as SubSend;
+  uses interface CollectionPacket;
+}
+
+implementation {
+  command error_t Send.send(message_t* msg, uint8_t len) {
+    call CollectionPacket.setType(msg, collectid);
+    return call SubSend.send(msg, len);
+  }
+
+  command error_t Send.cancel(message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  command void* Send.getPayload(message_t* m, uint8_t len) {
+    return call SubSend.getPayload(m, len);
+  }
+
+  command uint8_t Send.maxPayloadLength() {
+    return call SubSend.maxPayloadLength();
+  }
+  
+  event void SubSend.sendDone(message_t* m, error_t err) {
+    signal Send.sendDone(m, err);
+  }
+}
diff --git a/tos/lib/net/lqi/LqiForwardingEngineP.nc b/tos/lib/net/lqi/LqiForwardingEngineP.nc
new file mode 100644
index 00000000..8bf22b89
--- /dev/null
+++ b/tos/lib/net/lqi/LqiForwardingEngineP.nc
@@ -0,0 +1,566 @@
+// $Id: LqiForwardingEngineP.nc,v 1.16 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/* 
+ * A simple module that handles multihop packet movement.  It accepts 
+ * messages from both applications and the network and does the necessary
+ * interception and forwarding.
+ * It interfaces to an algorithmic componenet via RouteSelect. It also acts
+ * as a front end for RouteControl
+ */
+
+
+/**
+ * @author Philip Buonadonna
+ * @auihor Alec Woo
+ * @author Crossbow Inc.
+ * @author Philip Levis (port from TinyOS 1.x)
+ */
+
+#include "AM.h"
+#include "MultiHopLqi.h"
+#include "CollectionDebugMsg.h"
+
+module LqiForwardingEngineP {
+  provides {
+    interface Init;
+    interface Send;
+    interface Receive[collection_id_t id];
+    interface Receive as Snoop[collection_id_t];
+    interface Intercept[collection_id_t id];
+    interface CollectionPacket;
+    interface RouteControl;
+    interface LqiRouteStats;
+    interface Packet;
+  }
+  uses {
+    interface SplitControl;
+    interface Receive as SubReceive;
+    interface AMSend as SubSend;
+    interface AMSend as SubSendMine;
+    interface RouteControl as RouteSelectCntl;
+    interface RouteSelect;
+    interface Leds;
+    interface Packet as SubPacket;
+    interface AMPacket;
+    interface RootControl;
+    interface Random;
+    interface PacketAcknowledgements;
+    interface CollectionDebug;
+  }
+}
+
+implementation {
+
+  enum {
+    FWD_QUEUE_SIZE = MHOP_QUEUE_SIZE, // Forwarding Queue
+    EMPTY = 0xff,
+    MAX_RETRIES = 5
+  };
+
+  /* Internal storage and scheduling state */
+  message_t FwdBuffers[FWD_QUEUE_SIZE];
+  message_t *FwdBufList[FWD_QUEUE_SIZE];
+  uint8_t FwdBufBusy[FWD_QUEUE_SIZE];
+  uint8_t iFwdBufHead, iFwdBufTail;
+  uint16_t sendFailures = 0;
+  uint8_t fwd_fail_count = 0;
+  uint8_t my_fail_count = 0;
+  bool fwdbusy = FALSE;
+  bool running = FALSE;
+ 
+  lqi_header_t* getHeader(message_t* msg) {
+    return (lqi_header_t*) call SubPacket.getPayload(msg, sizeof(lqi_header_t));
+  }
+  
+  /***********************************************************************
+   * Initialization 
+   ***********************************************************************/
+
+
+  static void initialize() {
+    int n;
+
+    for (n=0; n < FWD_QUEUE_SIZE; n++) {
+      FwdBufList[n] = &FwdBuffers[n];
+      FwdBufBusy[n] = 0;
+    } 
+    iFwdBufHead = iFwdBufTail = 0;
+
+    sendFailures = 0;
+  }
+
+  command error_t Init.init() {
+    initialize();
+    return SUCCESS;
+  }
+ 
+  message_t* nextMsg();
+  static void forward(message_t* msg);
+
+  event void SplitControl.startDone(error_t err) {
+    message_t* nextToSend;
+    if (err != SUCCESS) {return;}
+    nextToSend = nextMsg();
+    running = TRUE;
+    fwdbusy = FALSE;
+
+    if (nextToSend != NULL) {
+      forward(nextToSend);
+    }
+  }
+
+
+  event void SplitControl.stopDone(error_t err) {
+    if (err != SUCCESS) {return;}
+    running = FALSE;
+  }
+  /***********************************************************************
+   * Commands and events
+   ***********************************************************************/
+  command error_t Send.send(message_t* pMsg, uint8_t len) {
+    len += sizeof(lqi_header_t);
+    if (len > call SubPacket.maxPayloadLength()) {
+      return ESIZE;
+    }
+    if (call RootControl.isRoot()) {
+      return FAIL;
+    }
+    if (running == FALSE) {
+      return EOFF;
+    }
+    call RouteSelect.initializeFields(pMsg);
+    
+    if (call RouteSelect.selectRoute(pMsg, 0) != SUCCESS) {
+      return FAIL;
+    }
+    call PacketAcknowledgements.requestAck(pMsg);
+    if (call SubSendMine.send(call AMPacket.destination(pMsg), pMsg, len) != SUCCESS) {
+      sendFailures++;
+      return FAIL;
+    }
+
+    return SUCCESS;
+  } 
+  
+  int8_t get_buff(){
+    uint8_t n;
+    for (n=0; n < FWD_QUEUE_SIZE; n++) {
+	uint8_t done = 0;
+        atomic{
+	  if(FwdBufBusy[n] == 0){
+	    FwdBufBusy[n] = 1;
+	    done = 1;
+	  }
+        }
+	if(done == 1) return n;
+      
+    } 
+    return -1;
+  }
+
+  int8_t is_ours(message_t* ptr){
+    uint8_t n;
+    for (n=0; n < FWD_QUEUE_SIZE; n++) {
+       if(FwdBufList[n] == ptr){
+		return n;
+       }
+    } 
+    return -1;
+  }
+
+  static char* fields(message_t* msg) {
+#ifdef TOSSIM
+    static char mbuf[1024];
+    lqi_header_t* hdr = getHeader(msg);
+    sprintf(mbuf, "origin = %hu, seqno = %hu, oseqno = %hu, hopcount =%hu", hdr->originaddr, hdr->seqno, hdr->originseqno, hdr->hopcount);
+    return mbuf;
+#else
+    return NULL;
+#endif
+  }
+
+  static void forward(message_t* msg);
+  
+  static message_t* mForward(message_t* msg) {
+    int8_t buf = get_buff();
+    dbg("LQI", " Asked to forward packet @%s:\t%s\n", sim_time_string(), fields(msg));
+    if (buf == -1) {
+      dbg("LQI", "%s Dropped packet due to no space in queue.\n", __FUNCTION__);
+      call CollectionDebug.logEvent(NET_C_FE_SEND_QUEUE_FULL);
+      return msg;
+    }
+    if ((call RouteSelect.selectRoute(msg, 0)) != SUCCESS) {
+      FwdBufBusy[(uint8_t)buf] = 0;
+      call CollectionDebug.logEvent(NET_C_FE_NO_ROUTE);
+      dbg("LQI", "%s Dropped packet due to no route.\n", __FUNCTION__);
+      return msg;
+    }
+    else {
+      message_t* newMsg = FwdBufList[(uint8_t)buf];
+      FwdBufList[(uint8_t)buf] = msg;
+      forward(msg);
+      return newMsg;
+    }
+  }
+  
+  static void forward(message_t* msg) {
+    // Failures at the send level do not cause the seq. number space to be 
+    // rolled back properly.  This is somewhat broken.
+    if (fwdbusy || running == FALSE) {
+      dbg("LQI", "%s forwarding busy or off, wait for later.\n", __FUNCTION__);
+      return;
+    }
+    else {
+      call PacketAcknowledgements.requestAck(msg);
+      if (call SubSend.send(call AMPacket.destination(msg),
+			    msg,
+			    call SubPacket.payloadLength(msg)) == SUCCESS) {
+	call CollectionDebug.logEventMsg(NET_C_DBG_1, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+					 call AMPacket.destination(msg));
+	dbg("LQI", "%s: Send to %hu success.\n", __FUNCTION__, call AMPacket.destination(msg));
+        fwdbusy = TRUE;
+      }
+    }
+  }
+
+  event message_t* SubReceive.receive(message_t* ONE msg, void* COUNT_NOK(len) payload, uint8_t len) {
+    collection_id_t id = call CollectionPacket.getType(msg);
+    payload += sizeof(lqi_header_t);
+    len -= sizeof(lqi_header_t);
+
+    call CollectionDebug.logEventMsg(NET_C_FE_RCV_MSG, 
+				     call CollectionPacket.getSequenceNumber(msg), 
+				     call CollectionPacket.getOrigin(msg), 
+				     call AMPacket.destination(msg));
+    if (call RootControl.isRoot()) {
+      dbg("LQI,LQIDeliver", "LQI Root is receiving packet from node %hu @%s\n", getHeader(msg)->originaddr, sim_time_string());
+      return signal Receive.receive[id](msg, payload, len);
+    }
+    else if (call AMPacket.destination(msg) != call AMPacket.address()) {
+      return msg;
+    }
+    else if (signal Intercept.forward[id](msg, payload, len)) {
+      dbg("LQI,LQIDeliver", "LQI fwd is forwarding packet from node %hu @%s\n", getHeader(msg)->originaddr, sim_time_string());
+      return mForward(msg);
+    }
+    else {
+      return msg;
+    }
+  }
+  
+  message_t* nextMsg() {
+    int i;
+    uint16_t inc = call Random.rand16() & 0xfff;
+    for (i = 0; i < FWD_QUEUE_SIZE; i++) {
+      int pindex = (i + inc) % FWD_QUEUE_SIZE;
+      if (FwdBufBusy[pindex]) {
+	return FwdBufList[pindex];
+      }
+    }
+    return NULL;
+  }
+  
+  event void SubSend.sendDone(message_t* msg, error_t success) {
+    int8_t buf;
+    message_t* nextToSend;
+    if (!call PacketAcknowledgements.wasAcked(msg) &&
+	call AMPacket.destination(msg) != TOS_BCAST_ADDR &&
+	fwd_fail_count < MAX_RETRIES){
+      call RouteSelect.selectRoute(msg, 1);
+      call PacketAcknowledgements.requestAck(msg);
+      if (call SubSend.send(call AMPacket.destination(msg),
+			    msg,
+			    call SubPacket.payloadLength(msg)) == SUCCESS) {
+	dbg("LQI", "Packet not acked, retransmit @%s:\n\t%s\n", sim_time_string(), fields(msg));
+        call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_WAITACK, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+	fwd_fail_count ++;
+	return;
+      } else {
+	call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+	dbg("LQI", "Packet not acked, retransmit fail @%s:\n\t%s\n", sim_time_string(), fields(msg));
+	sendFailures++;
+	return;
+      }
+    }
+    else if (fwd_fail_count >= MAX_RETRIES) {
+      call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL_ACK_FWD, 
+				       call CollectionPacket.getSequenceNumber(msg), 
+				       call CollectionPacket.getOrigin(msg), 
+				       call AMPacket.destination(msg));
+      dbg("LQI", "Packet failed:\t%s\n", fields(msg));
+    }
+    else if (call PacketAcknowledgements.wasAcked(msg)) {
+      dbg("LQI", "Packet acked:\t%s\n", fields(msg));
+      call CollectionDebug.logEventMsg(NET_C_FE_FWD_MSG, 
+				       call CollectionPacket.getSequenceNumber(msg), 
+				       call CollectionPacket.getOrigin(msg), 
+				       call AMPacket.destination(msg));
+    }
+    
+    fwd_fail_count = 0;
+    buf = is_ours(msg);
+    if (buf != -1) {
+      FwdBufBusy[(uint8_t)buf] = 0;
+    }
+    
+    nextToSend = nextMsg();
+    fwdbusy = FALSE;
+	  
+    if (nextToSend != NULL) {
+      forward(nextToSend);
+    }
+    
+    dbg("LQI", "Packet not longer busy:\t%s\n", fields(msg));
+  }
+
+  event void SubSendMine.sendDone(message_t* msg, error_t success) {
+    if (!call PacketAcknowledgements.wasAcked(msg) &&
+	call AMPacket.destination(msg) != TOS_BCAST_ADDR &&
+	my_fail_count < MAX_RETRIES){
+      call RouteSelect.selectRoute(msg, 1);
+      call PacketAcknowledgements.requestAck(msg);
+      if (call SubSendMine.send(call AMPacket.destination(msg),
+			    msg,
+			    call SubPacket.payloadLength(msg)) == SUCCESS) {
+	dbg("LQI", "Local packet not acked, retransmit (%hhu) @%s:\n\t%s\n", my_fail_count, sim_time_string(), fields(msg));
+	call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_WAITACK, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+	my_fail_count ++;
+	return;
+      } else {
+	call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL, 
+					 call CollectionPacket.getSequenceNumber(msg), 
+					 call CollectionPacket.getOrigin(msg), 
+                                         call AMPacket.destination(msg));
+	dbg("LQI", "Local packet not acked, retransmit fail @%s:\n\t%s\n", sim_time_string(), fields(msg));
+	sendFailures++;
+	signal Send.sendDone(msg, FAIL);
+	return;
+      }
+    }
+    else if (my_fail_count >= MAX_RETRIES) {
+      call CollectionDebug.logEventMsg(NET_C_FE_SENDDONE_FAIL_ACK_SEND, 
+				       call CollectionPacket.getSequenceNumber(msg), 
+				       call CollectionPacket.getOrigin(msg), 
+				       call AMPacket.destination(msg));
+      dbg("LQI", "Local packet failed:\t%s\n", fields(msg));
+    }
+    else if (call PacketAcknowledgements.wasAcked(msg)) {
+      dbg("LQI", "Local packet acked:\t%s\n", fields(msg));
+      call CollectionDebug.logEventMsg(NET_C_FE_SENT_MSG, 
+				       call CollectionPacket.getSequenceNumber(msg), 
+				       call CollectionPacket.getOrigin(msg), 
+				       call AMPacket.destination(msg));
+    }
+
+    my_fail_count = 0;
+    dbg("LQI", "Local send done with success %d\n", success);
+    signal Send.sendDone(msg, success);
+  }
+
+
+  command uint16_t RouteControl.getParent() {
+    return call RouteSelectCntl.getParent();
+  }
+
+  command uint8_t RouteControl.getQuality() {
+    return call RouteSelectCntl.getQuality();
+  }
+
+  command uint8_t RouteControl.getDepth() {
+    return call RouteSelectCntl.getDepth();
+  }
+
+  command uint8_t RouteControl.getOccupancy() {
+    uint16_t uiOutstanding = (uint16_t)iFwdBufTail - (uint16_t)iFwdBufHead;
+    uiOutstanding %= FWD_QUEUE_SIZE;
+    return (uint8_t)uiOutstanding;
+  }
+
+
+  command error_t RouteControl.setUpdateInterval(uint16_t Interval) {
+    return call RouteSelectCntl.setUpdateInterval(Interval);
+  }
+
+  command error_t RouteControl.manualUpdate() {
+    return call RouteSelectCntl.manualUpdate();
+  }
+
+  command uint16_t LqiRouteStats.getSendFailures() {
+    return sendFailures;
+  }
+
+  command void Packet.clear(message_t* msg) {
+    
+  }
+
+  command void* Send.getPayload(message_t* m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Send.maxPayloadLength() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command error_t Send.cancel(message_t* m) {
+    return FAIL;
+  }
+
+  
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return call SubPacket.payloadLength(msg) - sizeof(lqi_header_t);
+  }
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    call SubPacket.setPayloadLength(msg, len + sizeof(lqi_header_t));
+  }
+  command uint8_t Packet.maxPayloadLength() {
+    return (call SubPacket.maxPayloadLength() - sizeof(lqi_header_t));
+  }
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    void* rval = call SubPacket.getPayload(msg, len + sizeof(lqi_header_t));
+    if (rval != NULL) {
+      rval += sizeof(lqi_header_t);
+    }
+    return rval;
+  }
+
+  command am_addr_t CollectionPacket.getOrigin(message_t* msg) {
+    lqi_header_t* hdr = getHeader(msg);
+    return hdr->originaddr;  
+  }
+
+  command void CollectionPacket.setOrigin(message_t* msg, am_addr_t addr) {
+    lqi_header_t* hdr = getHeader(msg);
+    hdr->originaddr = addr;
+  }
+
+  command collection_id_t CollectionPacket.getType(message_t* msg) {
+    return getHeader(msg)->collectId;
+  }
+
+  command void CollectionPacket.setType(message_t* msg, collection_id_t id) {
+    getHeader(msg)->collectId = id;
+  }
+  
+  command uint8_t CollectionPacket.getSequenceNumber(message_t* msg) {
+    lqi_header_t* hdr = getHeader(msg);
+    return hdr->originseqno;
+  }
+  
+  command void CollectionPacket.setSequenceNumber(message_t* msg, uint8_t seqno) {
+    lqi_header_t* hdr = getHeader(msg);
+    hdr->originseqno = seqno;
+  }
+
+
+  
+ default event void Send.sendDone(message_t* pMsg, error_t success) {}
+ default event message_t* Snoop.receive[collection_id_t id](message_t* pMsg, void* payload, uint8_t len) {return pMsg;}
+ default event message_t* Receive.receive[collection_id_t id](message_t* pMsg, void* payload, uint8_t len) {
+   return pMsg;
+ }
+ default event bool Intercept.forward[collection_id_t id](message_t* pMsg, void* payload, uint8_t len) {
+   return 1;
+ }
+
+  /* Default implementations for CollectionDebug calls.
+   * These allow CollectionDebug not to be wired to anything if debugging
+   * is not desired. */
+    
+  default command error_t CollectionDebug.logEvent(uint8_t type) {
+    return SUCCESS;
+  }
+  default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) {
+    return SUCCESS;
+  }
+  default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) {
+    return SUCCESS;
+  }
+  default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) {
+    return SUCCESS;
+  }
+  default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t metric) {
+    return SUCCESS;
+  }
+}
+
diff --git a/tos/lib/net/lqi/LqiRouteStats.nc b/tos/lib/net/lqi/LqiRouteStats.nc
new file mode 100644
index 00000000..8807c398
--- /dev/null
+++ b/tos/lib/net/lqi/LqiRouteStats.nc
@@ -0,0 +1,83 @@
+
+/* Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*                                                                      
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+                                                                                
+                                                                                
+                                                                                
+/**
+ * Provides information on how many send failures there have been.
+ * @author Joe Polastre
+ * @author Philip Levis (port from TinyOS 1.x)
+ */
+
+
+interface LqiRouteStats {
+  command uint16_t getSendFailures();
+}
diff --git a/tos/lib/net/lqi/LqiRoutingEngineP.nc b/tos/lib/net/lqi/LqiRoutingEngineP.nc
new file mode 100644
index 00000000..547c258f
--- /dev/null
+++ b/tos/lib/net/lqi/LqiRoutingEngineP.nc
@@ -0,0 +1,433 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+
+/**
+ *
+ * @author Gilman Tolle
+ * @author Philip Levis (port to TinyOS 2.x)
+ */
+
+
+#include "MultiHopLqi.h"
+#include "CollectionDebugMsg.h"
+
+module LqiRoutingEngineP {
+
+  provides {
+    interface Init;
+    interface StdControl;
+    interface RouteSelect;
+    interface RouteControl;
+    interface RootControl;
+  }
+
+  uses {
+    interface Timer<TMilli>;
+    interface AMSend;
+    interface Receive;
+    interface Random;
+    interface Packet;
+    interface AMPacket;
+    interface LqiRouteStats;
+    interface CC2420Packet;
+    interface Leds;
+    interface CollectionDebug;
+  }
+}
+
+implementation {
+
+  enum {
+    BASE_STATION_ADDRESS = 0,
+    BEACON_PERIOD        = 32,
+    BEACON_TIMEOUT       = 8,
+  };
+
+  enum {
+    ROUTE_INVALID    = 0xff
+  };
+
+  bool isRoot = FALSE;
+  
+  message_t msgBuf;
+  bool msgBufBusy;
+
+  uint16_t gbCurrentParent;
+  uint16_t gbCurrentParentCost;
+  uint16_t gbCurrentLinkEst;
+  uint8_t  gbCurrentHopCount;
+  uint16_t gbCurrentCost;
+
+  uint8_t gLastHeard;
+
+  int16_t gCurrentSeqNo;
+  int16_t gOriginSeqNo;
+  
+  uint16_t gUpdateInterval;
+
+  uint8_t gRecentIndex;
+  uint16_t gRecentPacketSender[MHOP_HISTORY_SIZE];
+  int16_t gRecentPacketSeqNo[MHOP_HISTORY_SIZE];
+
+  uint8_t gRecentOriginIndex;
+  uint16_t gRecentOriginPacketSender[MHOP_HISTORY_SIZE];
+  int16_t gRecentOriginPacketSeqNo[MHOP_HISTORY_SIZE];
+
+  uint16_t adjustLQI(uint8_t val) {
+    uint16_t result = (80 - (val - 50));
+    result = (((result * result) >> 3) * result) >> 3;
+    return result;
+  }
+
+  lqi_header_t* getHeader(message_t* msg) {
+    return (lqi_header_t*)call Packet.getPayload(msg, sizeof(lqi_header_t));
+  }
+  
+  lqi_beacon_msg_t* getBeacon(message_t* msg) {
+    return (lqi_beacon_msg_t*)call Packet.getPayload(msg, sizeof(lqi_beacon_msg_t));
+  }
+
+  task void SendRouteTask() {
+    lqi_beacon_msg_t* bMsg = getBeacon(&msgBuf);
+    uint8_t length = sizeof(lqi_beacon_msg_t);
+    
+    dbg("LQI","MultiHopRSSI Sending route update msg.\n");
+
+    if (gbCurrentParent != TOS_BCAST_ADDR) {
+      dbg("LQI","MultiHopRSSI: Parent = %d\n", gbCurrentParent);
+    }
+    
+    if (msgBufBusy) {
+      post SendRouteTask();
+      return;
+    }
+
+    dbg("LQI","MultiHopRSSI: Current cost: %d.\n", 
+	gbCurrentParentCost + gbCurrentLinkEst);
+
+    if (isRoot) {
+      bMsg->parent = TOS_NODE_ID;
+      bMsg->cost = 0;
+      bMsg->originaddr = TOS_NODE_ID;
+      bMsg->hopcount = 0;
+      bMsg->seqno = gCurrentSeqNo++;
+    }
+    else {
+      bMsg->parent = gbCurrentParent;
+      bMsg->cost = gbCurrentParentCost + gbCurrentLinkEst;
+      bMsg->originaddr = TOS_NODE_ID;
+      bMsg->hopcount = gbCurrentHopCount;
+      bMsg->seqno = gCurrentSeqNo++;
+    }
+    
+    if (call AMSend.send(TOS_BCAST_ADDR, &msgBuf, length) == SUCCESS) {
+      msgBufBusy = TRUE;
+      call CollectionDebug.logEventRoute(NET_C_TREE_SENT_BEACON, bMsg->parent, 0, bMsg->cost);
+    }
+  }
+
+  task void TimerTask() {
+    uint8_t val;
+    val = ++gLastHeard;
+    if (!isRoot && (val > BEACON_TIMEOUT)) {
+      gbCurrentParent = TOS_BCAST_ADDR;
+      gbCurrentParentCost = 0x7fff;
+      gbCurrentLinkEst = 0x7fff;
+      gbCurrentHopCount = ROUTE_INVALID;
+      gbCurrentCost = 0xfffe;
+    }
+    post SendRouteTask();
+  }
+
+  command error_t Init.init() {
+    int n;
+
+    gRecentIndex = 0;
+    for (n = 0; n < MHOP_HISTORY_SIZE; n++) {
+      gRecentPacketSender[n] = TOS_BCAST_ADDR;
+      gRecentPacketSeqNo[n] = 0;
+    }
+
+    gRecentOriginIndex = 0;
+    for (n = 0; n < MHOP_HISTORY_SIZE; n++) {
+      gRecentOriginPacketSender[n] = TOS_BCAST_ADDR;
+      gRecentOriginPacketSeqNo[n] = 0;
+    }
+
+    gbCurrentParent = TOS_BCAST_ADDR;
+    gbCurrentParentCost = 0x7fff;
+    gbCurrentLinkEst = 0x7fff;
+    gbCurrentHopCount = ROUTE_INVALID;
+    gbCurrentCost = 0xfffe;
+
+    gOriginSeqNo = 0;
+    gCurrentSeqNo = 0;
+    gUpdateInterval = BEACON_PERIOD;
+    msgBufBusy = FALSE;
+
+    return SUCCESS;
+  }
+
+  command error_t RootControl.setRoot() {
+    call Leds.led2On();
+    call CollectionDebug.logEventRoute(NET_C_TREE_NEW_PARENT, TOS_NODE_ID, 0, 0);
+    isRoot = TRUE;
+    return SUCCESS;
+  }
+
+  command error_t RootControl.unsetRoot() {
+    isRoot = FALSE;
+    return SUCCESS;
+  }
+
+  command bool RootControl.isRoot() {
+    return isRoot;
+  }
+  
+  command error_t StdControl.start() {
+    gLastHeard = 0;
+    call Timer.startOneShot(call Random.rand32() % (1024 * gUpdateInterval));
+    return SUCCESS;
+  }
+  
+  command error_t StdControl.stop() {
+    call Timer.stop();
+    return SUCCESS;
+  }
+
+  command bool RouteSelect.isActive() {
+    return TRUE;
+  }
+
+  command error_t RouteSelect.selectRoute(message_t* msg, uint8_t resend) {
+    int i;
+    lqi_header_t* hdr = getHeader(msg);
+    if (isRoot) {
+      return FAIL;
+    }
+
+    if (hdr->originaddr != TOS_NODE_ID && resend == 0) {
+      // supress duplicate packets
+      for (i = 0; i < MHOP_HISTORY_SIZE; i++) {
+        if ((gRecentPacketSender[i] == call AMPacket.source(msg)) &&
+            (gRecentPacketSeqNo[i] == hdr->seqno)) {
+	  call CollectionDebug.logEvent(NET_C_FE_DUPLICATE_CACHE_AT_SEND);
+	  dbg("LQI", "%s no route as this is a duplicate!\n", __FUNCTION__);
+          return FAIL;
+        }
+      }
+    
+      gRecentPacketSender[gRecentIndex] = call AMPacket.source(msg);
+      gRecentPacketSeqNo[gRecentIndex] = hdr->seqno;
+      gRecentIndex = (gRecentIndex + 1) % MHOP_HISTORY_SIZE;
+
+      // supress multihop cycles and try to break out of it
+      for (i = 0; i < MHOP_HISTORY_SIZE; i++) {
+        if ((gRecentOriginPacketSender[i] == hdr->originaddr) &&
+            (gRecentOriginPacketSeqNo[i] == hdr->originseqno)) {
+          gbCurrentParentCost = 0x7fff;
+          gbCurrentLinkEst = 0x7fff;
+          gbCurrentParent = TOS_BCAST_ADDR;
+          gbCurrentHopCount = ROUTE_INVALID;
+	  dbg("LQI", "%s no route as we are in a cycle!\n", __FUNCTION__);
+          return FAIL;
+        }
+      }
+      gRecentOriginPacketSender[gRecentOriginIndex] = hdr->originaddr;
+      gRecentOriginPacketSeqNo[gRecentOriginIndex] = hdr->originseqno;
+      gRecentOriginIndex = (gRecentOriginIndex + 1) % MHOP_HISTORY_SIZE;
+    }
+
+    if (resend == 0) {
+      hdr->seqno = gCurrentSeqNo++;
+    }
+    
+    dbg("LQI", "LQI setting destination to %hu and link quality ?\n", gbCurrentParent);
+    call AMPacket.setDestination(msg, gbCurrentParent);
+
+    return SUCCESS;
+  }
+
+  command error_t RouteSelect.initializeFields(message_t* msg) {
+    lqi_header_t* header = getHeader(msg);
+
+    header->originaddr = TOS_NODE_ID;
+    header->originseqno = gOriginSeqNo++;
+    header->seqno = gCurrentSeqNo;
+    
+    if (isRoot) {
+      header->hopcount = 0;
+    }
+    else {
+      header->hopcount = gbCurrentHopCount;
+    }
+
+    dbg("LQI", "LQI setting hopcount to %hhu\n", gbCurrentHopCount);
+    return SUCCESS;
+  }
+
+  command uint8_t* RouteSelect.getBuffer(message_t* Msg, uint16_t* Len) {
+
+  }
+
+
+  command uint16_t RouteControl.getParent() {
+    return gbCurrentParent;
+  }
+
+  command uint8_t RouteControl.getQuality() {
+    return gbCurrentLinkEst;
+  }
+
+  command uint8_t RouteControl.getDepth() {
+    return gbCurrentHopCount;
+  }
+
+  command uint8_t RouteControl.getOccupancy() {
+    return 0;
+  }
+
+  command error_t RouteControl.setUpdateInterval(uint16_t Interval) {
+
+    gUpdateInterval = Interval;
+    return SUCCESS;
+  }
+
+  command error_t RouteControl.manualUpdate() {
+    post SendRouteTask();
+    return SUCCESS;
+  }
+
+
+  event void Timer.fired() {
+    call Leds.led0Toggle();
+    post TimerTask();
+    call Timer.startOneShot((uint32_t)1024 * gUpdateInterval + 1);
+  }
+
+  event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len) {
+    lqi_beacon_msg_t* bMsg = (lqi_beacon_msg_t*)payload;
+    am_addr_t source = call AMPacket.source(msg);
+    uint8_t lqi = call CC2420Packet.getLqi(msg);
+    
+    call CollectionDebug.logEventRoute(NET_C_TREE_RCV_BEACON, source, 0, bMsg->cost);
+    
+    if (isRoot) {
+      return msg;
+    }
+    else {
+      dbg("LQI,LQIRoute", "LQI receiving routing beacon from %hu with LQI %hhu that advertises %hu.\n", source, lqi, bMsg->cost);
+      if (source == gbCurrentParent) {
+	// try to prevent cycles
+	if (bMsg->parent != TOS_NODE_ID) {
+	  gLastHeard = 0;
+	  gbCurrentParentCost = bMsg->cost;
+	  gbCurrentLinkEst = adjustLQI(lqi);
+	  gbCurrentHopCount = bMsg->hopcount + 1;
+	  dbg("LQI,LQIRoute", "  -- Not a loop\n");
+	}
+	else {
+	  gLastHeard = 0;
+	  gbCurrentParentCost = 0x7fff;
+	  gbCurrentLinkEst = 0x7fff;
+	  gbCurrentParent = TOS_BCAST_ADDR;
+	  gbCurrentHopCount = ROUTE_INVALID;
+	  dbg("LQI,LQIRoute", "  -- Detected a loop\n");
+	}
+	
+      } else {
+	
+	/* if the message is not from my parent, 
+	   compare the message's cost + link estimate to my current cost,
+	   switch if necessary */
+	
+	// make sure you don't pick a parent that creates a cycle
+	if (((uint32_t) bMsg->cost + (uint32_t) adjustLQI(lqi) 
+	     <
+	     ((uint32_t) gbCurrentParentCost + (uint32_t) gbCurrentLinkEst) -
+	     (((uint32_t) gbCurrentParentCost + (uint32_t) gbCurrentLinkEst) >> 2)
+	     ) &&
+	    (bMsg->parent != TOS_NODE_ID)) {
+	  gLastHeard = 0;
+	  gbCurrentParent = call AMPacket.source(msg);
+	  gbCurrentParentCost = bMsg->cost;
+	  gbCurrentLinkEst = adjustLQI(lqi);	
+	  gbCurrentHopCount = bMsg->hopcount + 1;
+	  call CollectionDebug.logEventRoute(NET_C_TREE_NEW_PARENT, gbCurrentParent, 0, gbCurrentParentCost + gbCurrentLinkEst);
+	  dbg("LQI,LQIRoute", "  -- Not a cycle.\n");
+	}
+	else {
+	  dbg("LQI,LQIRoute", "  -- CYCLE.\n");
+	}
+      }
+    }
+    dbg("LQI,LQIRoute", "Set my count to %hhu, my link to %hu and my cost to %hu.\n", gbCurrentHopCount, gbCurrentLinkEst, gbCurrentParentCost);
+
+    return msg;
+  }
+
+  event void AMSend.sendDone(message_t* msg, error_t success) {
+    msgBufBusy = FALSE;
+  }
+
+    /* Default implementations for CollectionDebug calls.
+     * These allow CollectionDebug not to be wired to anything if debugging
+     * is not desired. */
+
+  default command error_t CollectionDebug.logEvent(uint8_t type) {
+    return SUCCESS;
+  }
+  default command error_t CollectionDebug.logEventSimple(uint8_t type, uint16_t arg) {
+    return SUCCESS;
+  }
+  default command error_t CollectionDebug.logEventDbg(uint8_t type, uint16_t arg1, uint16_t arg2, uint16_t arg3) {
+    return SUCCESS;
+  }
+  default command error_t CollectionDebug.logEventMsg(uint8_t type, uint16_t msg, am_addr_t origin, am_addr_t node) {
+    return SUCCESS;
+  }
+  default command error_t CollectionDebug.logEventRoute(uint8_t type, am_addr_t parent, uint8_t hopcount, uint16_t etx) {
+    return SUCCESS;
+  }
+  
+}
+  
diff --git a/tos/lib/net/lqi/MultiHopEngineM.nc b/tos/lib/net/lqi/MultiHopEngineM.nc
new file mode 100644
index 00000000..cfa6491b
--- /dev/null
+++ b/tos/lib/net/lqi/MultiHopEngineM.nc
@@ -0,0 +1,351 @@
+// $Id: MultiHopEngineM.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/* 
+ * A simple module that handles multihop packet movement.  It accepts 
+ * messages from both applications and the network and does the necessary
+ * interception and forwarding.
+ * It interfaces to an algorithmic componenet via RouteSelect. It also acts
+ * as a front end for RouteControl
+ */
+
+
+/*
+ * Authors:          Philip Buonadonna, Alec Woo, Crossbow Inc.
+ *
+ */
+
+#include "AM.h"
+#include "MultiHop.h"
+
+module MultiHopEngineM {
+  provides {
+    interface Init;
+    interface Receive;
+    interface Send;
+    interface Packet;
+    interface CollectionPacket;
+    interface RouteControl;
+    interface LqiRouteStats;
+  }
+  uses {
+    interface Receive as SubReceive;
+    interface AMSend as SubSend;
+    interface RouteControl as RouteSelectCntl;
+    interface RouteSelect;
+    interface Leds;
+    interface Packet as SubPacket;
+    interface AMPacket;
+    interface RootControl;
+    interface PacketAcknowledgements;
+  }
+}
+
+implementation {
+
+  enum {
+    FWD_QUEUE_SIZE = MHOP_QUEUE_SIZE, // Forwarding Queue
+    EMPTY = 0xff
+  };
+
+  /* Internal storage and scheduling state */
+  message_t FwdBuffers[FWD_QUEUE_SIZE];
+  message_t *FwdBufList[FWD_QUEUE_SIZE];
+  uint8_t FwdBufBusy[FWD_QUEUE_SIZE];
+  uint8_t iFwdBufHead, iFwdBufTail;
+  uint16_t sendFailures = 0;
+  uint8_t fail_count = 0;
+
+
+
+  lqi_header_t* getHeader(message_t* msg) {
+    return (lqi_header_t*) call SubPacket.getPayload(msg, NULL);
+  }
+  
+  /***********************************************************************
+   * Initialization 
+   ***********************************************************************/
+
+
+  static void initialize() {
+    int n;
+
+    for (n=0; n < FWD_QUEUE_SIZE; n++) {
+      FwdBufList[n] = &FwdBuffers[n];
+      FwdBufBusy[n] = 0;
+    } 
+
+    iFwdBufHead = iFwdBufTail = 0;
+
+    sendFailures = 0;
+  }
+
+  command error_t Init.init() {
+    initialize();
+    return SUCCESS;
+  }
+
+
+  /***********************************************************************
+   * Commands and events
+   ***********************************************************************/
+  command error_t Send.send(message_t* pMsg, uint8_t len) {
+    len += sizeof(lqi_header_t);
+    if (len > call SubPacket.maxPayloadLength()) {
+      call Leds.led0On();
+      return ESIZE;
+    }
+    if (call RootControl.isRoot()) {
+      call Leds.led1On();
+      return FAIL;
+    }
+    call RouteSelect.initializeFields(pMsg);
+    
+    if (call RouteSelect.selectRoute(pMsg, 0) != SUCCESS) {
+      call Leds.led2On();
+      return FAIL;
+    }
+    call PacketAcknowledgements.requestAck(pMsg);
+    if (call SubSend.send(call AMPacket.destination(pMsg), pMsg, len) != SUCCESS) {
+      sendFailures++;
+      return FAIL;
+    }
+
+    return SUCCESS;
+  } 
+  
+  int8_t get_buff(){
+    uint8_t n;
+    for (n=0; n < FWD_QUEUE_SIZE; n++) {
+	uint8_t done = 0;
+        atomic{
+	  if(FwdBufBusy[n] == 0){
+	    FwdBufBusy[n] = 1;
+	    done = 1;
+	  }
+        }
+	if(done == 1) return n;
+      
+    } 
+    return -1;
+  }
+
+  int8_t is_ours(message_t* ptr){
+    uint8_t n;
+    for (n=0; n < FWD_QUEUE_SIZE; n++) {
+       if(FwdBufList[n] == ptr){
+		return n;
+       }
+    } 
+    return -1;
+  }
+  
+  static message_t* mForward(message_t* msg) {
+    message_t* newMsg = msg;
+    int8_t buf = get_buff();
+    call Leds.led2Toggle();
+    
+    if (call RootControl.isRoot()) {
+      return signal Receive.receive(msg, call Packet.getPayload(msg, NULL), call Packet.payloadLength(msg));
+    }
+    
+    if (buf == -1) {
+      dbg("LQI", "Dropped packet due to no space in queue.\n");
+      return msg;
+    }
+    
+    if ((call RouteSelect.selectRoute(msg, 0)) != SUCCESS) {
+      FwdBufBusy[(uint8_t)buf] = 0;
+      return msg;
+    }
+ 
+    // Failures at the send level do not cause the seq. number space to be 
+    // rolled back properly.  This is somewhat broken.
+    call PacketAcknowledgements.requestAck(msg);
+    if (call SubSend.send(call AMPacket.destination(msg),
+			  msg,
+			  call SubPacket.payloadLength(msg) == SUCCESS)) {
+      newMsg = FwdBufList[(uint8_t)buf];
+      FwdBufList[(uint8_t)buf] = msg;
+    }
+    else{
+      FwdBufBusy[(uint8_t)buf] = 0;
+      sendFailures++;
+    }
+    return newMsg;    
+  }
+
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    return mForward(msg);
+  }
+  
+
+  event void SubSend.sendDone(message_t* msg, error_t success) {
+    int8_t buf;
+    if (!call PacketAcknowledgements.wasAcked(msg) &&
+	call AMPacket.destination(msg) != TOS_BCAST_ADDR &&
+	fail_count < 5){
+      call RouteSelect.selectRoute(msg, 1);
+      if (call SubSend.send(call AMPacket.destination(msg),
+			    msg,
+			    call SubPacket.payloadLength(msg)) == SUCCESS) {
+	fail_count ++;
+      } else {
+	sendFailures++;
+      }
+    }
+    
+    fail_count = 0;
+
+    buf = is_ours(msg);
+
+    if (buf != -1) { // Msg was from forwarding queue
+      FwdBufBusy[(uint8_t)buf] = 0;
+    } else {
+      signal Send.sendDone(msg, success);
+    } 
+  }
+
+
+  command uint16_t RouteControl.getParent() {
+    return call RouteSelectCntl.getParent();
+  }
+
+  command uint8_t RouteControl.getQuality() {
+    return call RouteSelectCntl.getQuality();
+  }
+
+  command uint8_t RouteControl.getDepth() {
+    return call RouteSelectCntl.getDepth();
+  }
+
+  command uint8_t RouteControl.getOccupancy() {
+    uint16_t uiOutstanding = (uint16_t)iFwdBufTail - (uint16_t)iFwdBufHead;
+    uiOutstanding %= FWD_QUEUE_SIZE;
+    return (uint8_t)uiOutstanding;
+  }
+
+
+  command error_t RouteControl.setUpdateInterval(uint16_t Interval) {
+    return call RouteSelectCntl.setUpdateInterval(Interval);
+  }
+
+  command error_t RouteControl.manualUpdate() {
+    return call RouteSelectCntl.manualUpdate();
+  }
+
+  command uint16_t LqiRouteStats.getSendFailures() {
+    return sendFailures;
+  }
+
+  command void Packet.clear(message_t* msg) {
+    
+  }
+
+  command void* Send.getPayload(message_t* m) {
+    return call Packet.getPayload(m, NULL);
+  }
+
+  command uint8_t Send.maxPayloadLength() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command error_t Send.cancel(message_t* m) {
+    return FAIL;
+  }
+
+  command void* Receive.getPayload(message_t* m, uint8_t* len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command uint8_t Receive.payloadLength(message_t* m) {
+    return call Packet.payloadLength(m);
+  }
+  
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return call SubPacket.payloadLength(msg) - sizeof(lqi_header_t);
+  }
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    call SubPacket.setPayloadLength(msg, len + sizeof(lqi_header_t));
+  }
+  command uint8_t Packet.maxPayloadLength() {
+    return (call SubPacket.maxPayloadLength() - sizeof(lqi_header_t));
+  }
+  command void* Packet.getPayload(message_t* msg, uint8_t* len) {
+    void* rval = call SubPacket.getPayload(msg, len);
+    *len -= sizeof(lqi_header_t);
+    rval += sizeof(lqi_header_t);
+    return rval;
+  }
+
+  command am_addr_t CollectionPacket.getOrigin(message_t* msg) {
+    lqi_header_t* hdr = getHeader(msg);
+    return hdr->originaddr;  
+  }
+
+  command void CollectionPacket.setOrigin(message_t* msg, am_addr_t addr) {
+    lqi_header_t* hdr = getHeader(msg);
+    hdr->originaddr = addr;
+  }
+
+  command collection_id_t CollectionPacket.getType(message_t* msg) {
+    return 0;
+  }
+
+  command void CollectionPacket.setType(message_t* msg, collection_id_t id) {}
+  
+  command uint8_t CollectionPacket.getSequenceNumber(message_t* msg) {
+    lqi_header_t* hdr = getHeader(msg);
+    return hdr->originseqno;
+  }
+  
+  command void CollectionPacket.setSequenceNumber(message_t* msg, uint8_t seqno) {
+    lqi_header_t* hdr = getHeader(msg);
+    hdr->originseqno = seqno;
+  }
+  
+  default event void Send.sendDone(message_t* pMsg, error_t success) {}
+
+
+
+}
+
diff --git a/tos/lib/net/lqi/MultiHopLqi.h b/tos/lib/net/lqi/MultiHopLqi.h
new file mode 100644
index 00000000..baaa8ac2
--- /dev/null
+++ b/tos/lib/net/lqi/MultiHopLqi.h
@@ -0,0 +1,151 @@
+// $Id: MultiHopLqi.h,v 1.6 2010-06-29 22:07:50 scipio Exp $
+
+
+/* Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ *
+ * Authors:		Philip Buonadonna, Crossbow, Gilman Tolle
+ * Date last modified:  2/20/03
+ *
+ */
+
+/**
+ * @author Philip Buonadonna
+ * @author Philip Levis (port from TinyOS 1.x)
+ */
+
+
+#ifndef _TOS_MULTIHOP_H
+#define _TOS_MULTIHOP_H
+
+#ifndef MHOP_QUEUE_SIZE
+#define MHOP_QUEUE_SIZE	2
+#endif
+
+#ifndef MHOP_HISTORY_SIZE
+#define MHOP_HISTORY_SIZE 4
+#endif
+
+#include "AM.h"
+#include "Collection.h"
+
+#define UQ_LQI_CLIENT "LqiForwardingEngineP.Send"
+
+enum {
+  AM_LQI_BEACON_MSG = 0x73,
+  AM_LQI_DATA_MSG = 0x74,
+  AM_LQI_DEBUG = 0x75,
+  AM_LQI_DEBUG_PACKET = 3,
+  NUM_LQI_CLIENTS = uniqueCount(UQ_LQI_CLIENT),
+};
+
+/* Fields of neighbor table */
+typedef struct TOS_MHopNeighbor {
+  uint16_t addr;                     // state provided by nbr
+  uint16_t recv_count;               // since last goodness update
+  uint16_t fail_count;               // since last goodness, adjusted by TOs
+  uint16_t hopcount;
+  uint8_t goodness;
+  uint8_t timeouts;		     // since last recv
+} TOS_MHopNeighbor;
+  
+typedef nx_struct lqi_data_msg {
+  nx_uint16_t originaddr;
+  nx_int16_t seqno;
+  nx_int16_t originseqno;
+  nx_uint16_t hopcount;
+  nx_collection_id_t collectId;
+} lqi_header_t;
+
+typedef nx_struct lqi_beacon_msg {
+  nx_uint16_t originaddr;
+  nx_int16_t seqno;
+  nx_int16_t originseqno;
+  nx_uint16_t parent;
+  nx_uint16_t cost;
+  nx_uint16_t hopcount;
+} lqi_beacon_msg_t;
+
+typedef struct DBGEstEntry {
+  uint16_t id;
+  uint8_t hopcount;
+  uint8_t sendEst;
+} DBGEstEntry;
+
+typedef struct DebugPacket {
+//  uint16_t seqno;
+  uint16_t estEntries;
+  DBGEstEntry estList[0];
+} DebugPacket;
+
+#endif /* _TOS_MULTIHOP_H */
+
diff --git a/tos/lib/net/lqi/MultiHopLqiP.nc b/tos/lib/net/lqi/MultiHopLqiP.nc
new file mode 100644
index 00000000..c9ff3ec7
--- /dev/null
+++ b/tos/lib/net/lqi/MultiHopLqiP.nc
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*                                                                      
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * @author Joe Polastre
+ * @author Philip Levis (port to TinyOS 2.x)
+ */
+
+#include "MultiHopLqi.h"
+
+configuration MultiHopLqiP {
+  provides {
+    interface StdControl;
+    interface Send;
+    interface Receive[collection_id_t id];
+    interface Receive as Snoop[collection_id_t];
+    interface Intercept[collection_id_t id];
+    interface RouteControl;
+    interface LqiRouteStats;
+    interface Packet;
+    interface RootControl;
+    interface CollectionPacket;
+  }
+
+  uses interface CollectionDebug;
+
+}
+
+implementation {
+
+  components LqiForwardingEngineP as Forwarder, LqiRoutingEngineP as Router;
+  components 
+    new AMSenderC(AM_LQI_BEACON_MSG) as BeaconSender,
+    new AMReceiverC(AM_LQI_BEACON_MSG) as BeaconReceiver,
+    new AMSenderC(AM_LQI_DATA_MSG) as DataSender,
+    new AMSenderC(AM_LQI_DATA_MSG) as DataSenderMine,
+    new AMReceiverC(AM_LQI_DATA_MSG) as DataReceiver,
+    new TimerMilliC(), 
+    NoLedsC, LedsC,
+    RandomC,
+    ActiveMessageC,
+    MainC;
+
+  MainC.SoftwareInit -> Forwarder;
+  MainC.SoftwareInit -> Router;
+  
+  components CC2420ActiveMessageC as CC2420;
+  
+  StdControl = Router.StdControl;
+  
+  Receive = Forwarder.Receive;
+  Send = Forwarder;
+  Intercept = Forwarder.Intercept;
+  Snoop = Forwarder.Snoop;
+  RouteControl = Forwarder;
+  LqiRouteStats = Forwarder;
+  Packet = Forwarder;
+  CollectionPacket = Forwarder;
+  RootControl = Router;
+  //CC2420.SubPacket -> DataSender;
+  
+  Forwarder.SplitControl -> ActiveMessageC;
+  Forwarder.RouteSelectCntl -> Router.RouteControl;
+  Forwarder.RouteSelect -> Router;
+  Forwarder.SubSend -> DataSender;
+  Forwarder.SubSendMine -> DataSenderMine;
+  Forwarder.SubReceive -> DataReceiver;
+  Forwarder.Leds -> LedsC;
+  Forwarder.AMPacket -> ActiveMessageC;
+  Forwarder.SubPacket -> ActiveMessageC;
+  Forwarder.PacketAcknowledgements -> ActiveMessageC;
+  Forwarder.RootControl -> Router;
+  Forwarder.Random -> RandomC;
+  Forwarder.CollectionDebug = CollectionDebug;
+  
+  Router.AMSend -> BeaconSender;
+  Router.Receive -> BeaconReceiver;
+  Router.Random -> RandomC;
+  Router.Timer -> TimerMilliC; 
+  Router.LqiRouteStats -> Forwarder;
+  Router.CC2420Packet -> CC2420;
+  Router.AMPacket -> ActiveMessageC;
+  Router.Packet -> ActiveMessageC;
+  Router.Leds -> NoLedsC;
+  Router.CollectionDebug = CollectionDebug;
+}
diff --git a/tos/lib/net/lqi/RouteControl.nc b/tos/lib/net/lqi/RouteControl.nc
new file mode 100644
index 00000000..38cb10b2
--- /dev/null
+++ b/tos/lib/net/lqi/RouteControl.nc
@@ -0,0 +1,133 @@
+// $Id: RouteControl.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * Authors:	Phil Buonadonna
+ * Rev:		$Id: RouteControl.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+ */
+
+/** 
+ * Control/Monitor interface to a routing component 
+ * @author Phil Buonadonna
+ * @author Philip Levis (port from TinyOS 1.x)
+ */
+
+interface RouteControl {
+
+  /**
+   * Get this node's present parent address.
+   * 
+   * @return The address of the parent
+   */
+  command uint16_t getParent();
+
+  /** 
+   * Get this node's depth in the network
+   * 
+   * @return The network depth.
+   */
+  command uint8_t getDepth();
+
+ 
+  /**
+   * Return length of the routing forwarding queue 
+   *
+   * @return The number of outstanding entries in the queue.
+   */
+  command uint8_t getOccupancy();
+
+  /**
+   * Get a measure of goodness for the current parent 
+   * 
+   * @return A value between 0-256 where 256 represent the best
+   * goodness
+   */
+  command uint8_t getQuality();
+
+  /** 
+   * Set the routing componenets internal update interval.
+   *
+   * @param The duration, in seconds, of successive routing
+   * updates.
+   * 
+   * @return SUCCESS if the operation succeeded.
+   */
+  command error_t setUpdateInterval(uint16_t Interval);
+
+  /**
+   * Queue a manual update of the routing state.  This may or may
+   * not include the transmission of a message.
+   *
+   * @return SUCCESS if a route update was queued.
+   */
+  command error_t manualUpdate();
+}
diff --git a/tos/lib/net/lqi/RouteSelect.nc b/tos/lib/net/lqi/RouteSelect.nc
new file mode 100644
index 00000000..f31bb6ae
--- /dev/null
+++ b/tos/lib/net/lqi/RouteSelect.nc
@@ -0,0 +1,144 @@
+// $Id: RouteSelect.nc,v 1.6 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ * Authors:		Philip Levis
+ * Date last modified:  8/12/02
+ *
+ * The RouteSelect interface is part of the TinyOS ad-hoc routing
+ * system architecture. The component that keeps track of routing
+ * information and makes route selection decisions provides this
+ * interface. When a Send component wants to send a packet, it passes
+ * it to RouteSelect for its routing information to be filled in. This
+ * way, the Send component is entirely unaware of the routing
+ * header/footer structure.
+ */
+
+/**
+ * Interface to a route selection component in the TinyOS ad-hoc
+ * system architecture.
+ * @author Philip Levis
+ */
+
+#include "AM.h"
+
+interface RouteSelect {
+
+  /**
+   * Whether there is currently a valid route.
+   *
+   * @return Whether there is a valid route.
+   */
+  command bool isActive();
+
+  /**
+   * Select a route and fill in all of the necessary routing
+   * information to a packet.
+   *
+   * @param msg Message to select route for and fill in routing information.
+   *
+   * @return Whether a route was selected succesfully. On FAIL the
+   * packet should not be sent.
+   *
+   */
+  
+  command error_t selectRoute(message_t* ONE msg, uint8_t resend);
+
+
+  /**
+   * Given a TOS_MstPtr, initialize its routing fields to a known
+   * state, specifying that the message is originating from this node.
+   * This known state can then be used by selectRoute() to fill in
+   * the necessary data.
+   *
+   * @param msg Message to select route for and fill in init data.
+   *
+   * @return Should always return SUCCESS.
+   *
+   */
+
+  command error_t initializeFields(message_t* msg);
+  
+  
+  /**
+   * Given a TinyOS message buffer, provide a pointer to the data
+   * buffer within it that an application can use as well as its
+   * length. Unlike the getBuffer of the Send interface, this can
+   * be called freely and does not modify the buffer.
+   *
+   * @param msg The message to get the data region of.
+   *
+   * @param length Pointer to a field to store the length of the data region.
+   *
+   * @return A pointer to the data region.
+   */
+  
+  command uint8_t* getBuffer(message_t* msg, uint16_t* len);
+}
diff --git a/tos/lib/net/rpl/README b/tos/lib/net/rpl/README
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/lib/net/rpl/RPL.h b/tos/lib/net/rpl/RPL.h
new file mode 100644
index 00000000..25940d79
--- /dev/null
+++ b/tos/lib/net/rpl/RPL.h
@@ -0,0 +1,379 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * RPLRankC.nc
+ * @ author JeongGil Ko (John) <jgko@cs.jhu.edu>
+ */
+
+/*
+ * Copyright (c) 2010 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @ author Yiwei Yao <yaoyiwei@stanford.edu>
+ */
+
+#ifndef RPL_H
+#define RPL_H
+
+#include <iprouting.h>
+
+#define ETX_THRESHOLD 200
+#define MAX_ETX 200
+#define MAX_PARENT 20
+#define MAX_HOPCOUNT 30
+#define RPL_QUEUE_SIZE 5
+#define minHopRankIncrease 1
+#define INIT_ETX 35
+#define RPL_MAX_SOURCEROUTE 10
+
+enum {
+  RPL_DODAG_METRIC_CONTAINER_TYPE = 2,
+  RPL_DST_PREFIX_TYPE = 3,
+  RPL_DODAG_CONFIG_TYPE = 4,
+  RPL_TARGET_TYPE = 5,
+  RPL_TRANSIT_INFORMATION_TYPE = 6,
+  RPL_MOP_No_Downward = 0,
+  RPL_MOP_No_Storing = 1,
+  RPL_MOP_Storing_No_Multicast = 2,
+  RPL_MOP_Storing_With_Multicast = 3,
+};
+
+enum {
+  RPL_IFACE = ROUTE_IFACE_154,
+  RPL_HBH_RANK_TYPE = 243,
+};
+
+struct icmpv6_header_t {
+  uint8_t	type;
+  uint8_t	code;
+  nx_uint16_t	checksum;
+};
+
+struct dis_base_t {
+  struct icmpv6_header_t icmpv6;
+  uint16_t reserved;
+};
+
+struct rpl_instance_id {
+  /* Global RPLInstance ID
+  uint8_t reserved  : 1;
+  uint8_t id        : 7;
+  */
+  uint8_t id;
+};
+
+struct transit_info_option_t {
+  uint8_t type;
+  uint8_t option_length;
+  uint8_t path_sequence;
+  uint8_t path_control;
+  uint32_t path_lifetime;
+  struct in6_addr parent_address;
+};
+
+struct target_option_t {
+  uint8_t type;
+  uint8_t option_length;
+  uint8_t reserved;
+  uint8_t prefix_length;
+  struct in6_addr target_prefix;
+};
+
+struct dao_base_t {
+  struct icmpv6_header_t icmpv6;
+  struct rpl_instance_id instance_id; // used to be RPLinstanceID
+  uint16_t k_bit : 1;
+  uint16_t d_bit : 1;
+  uint16_t reserved : 14;
+  uint8_t DAOsequence;
+  struct in6_addr dodagID;
+  struct target_option_t target_option;
+  struct transit_info_option_t transit_info_option;
+};
+
+struct dio_base_t {
+  struct icmpv6_header_t icmpv6;
+  struct rpl_instance_id instance_id; // used to be instanceID
+  nx_uint8_t version; //used to be sequence
+  nx_uint16_t dagRank;
+  union{
+    /*
+    struct flags_t {
+      uint8_t grounded        :1;
+      uint8_t reserved        :1;
+      uint8_t mop             :3; // mode of operation // flag changes
+      uint8_t dag_preference  :3;
+    } __attribute__((packed)) flags_element;
+    */
+    uint8_t flags_chunk;
+  } flags;
+  uint8_t dtsn;
+  uint16_t reserved2;
+  struct in6_addr dodagID; // was dagID
+};
+
+struct dio_body_t{ // type 2 ; contains metrics
+  uint8_t type;
+  uint8_t container_len;
+  //uint8_t *metric_data;
+};
+
+struct dio_dodag_config_t{ // type 4 ; contains DODAG configuration
+  nx_uint8_t type;
+  nx_uint8_t length;
+  uint8_t flags : 4;
+  uint8_t A     : 1;
+  uint8_t PCS   : 3;
+  nx_uint8_t DIOIntDoubl;
+  nx_uint8_t DIOIntMin;
+  nx_uint8_t DIORedun;
+  nx_uint16_t MaxRankInc;
+  nx_uint16_t MinHopRankInc;
+  nx_uint16_t ocp;
+  nx_uint8_t reserved;
+  nx_uint8_t default_lifetime;
+  nx_uint16_t lifetime_unit;
+};
+
+struct dio_metric_header_t{ 
+  uint8_t routing_obj_type;
+  uint8_t reserved    :  2;
+  uint8_t R_flag      :  1;
+  uint8_t G_flag      :  1;
+  uint8_t A_flag      :  2;
+  uint8_t O_flag      :  1;
+  uint8_t C_flag      :  1;
+  nx_uint16_t object_len;
+};
+
+struct dio_etx_t{
+  nx_uint16_t etx;
+};
+
+struct dio_latency_t{
+  float latency;
+};
+
+struct dio_prefix_t{
+  uint8_t type;
+  nx_uint16_t suboption_len;
+  uint8_t reserved : 3;
+  uint8_t preference : 2;
+  uint8_t reserved2 : 3;
+  nx_uint32_t lifetime;
+  uint8_t prefix_len;
+  struct in6_addr prefix;
+};
+
+struct rpl_route {
+  uint8_t next_header;
+  uint8_t hdr_ext_len;
+  uint8_t routing_type;
+  uint8_t segments_left;
+  uint8_t compr : 4;
+  uint8_t pad   : 4;
+  uint8_t reserved;
+  uint16_t reserved1;
+  struct in6_addr addr[RPL_MAX_SOURCEROUTE];
+};
+
+/* Necessary constants for RPL*/
+enum {
+  ROOT_RANK = 1,
+  BASE_RANK = 0,
+  INFINITE_RANK = 0xFFFF,
+  RPL_DEFAULT_INSTANCE = 0,
+  NUMBER_OF_PARENTS = 10,
+  DIS_INTERVAL = 3*1024U,
+  DEFAULT_LIFETIME = 10000,
+};
+
+/*RFC defined parameters*/
+enum {
+  ICMPV6_TYPE = 58,
+};
+
+enum {
+  ICMPV6_CODE_DIS = 0x00,
+  ICMPV6_CODE_DIO = 0x01,
+  ICMPV6_CODE_DAO = 0x02,
+};
+
+enum {
+  DIO_BASE_FLAG_GRD = 0,
+  DIO_BASE_FLAG_DA_TRIGGER = 1,
+  DIO_BASE_FLAG_DA_SUPPORT = 2,
+  DIO_BASE_FLAG_PREF_5 = 5,
+  DIO_BASE_FLAG_PREF_6 = 6,
+  DIO_BASE_FLAG_PREF_7 = 7,
+};
+
+enum {
+  DIO_BASE_OPT_PAD1 = 0,
+  DIO_BASE_OPT_PADN = 1,
+  DIO_BASE_OPT_DAG_METRIC = 2,
+  DIO_BASE_OPT_DST_PREFIX = 3,
+  DIO_BASE_OPT_DAG_TIMER_CONFIG = 4,
+};
+
+///////////////////////// for forwarding engine ////////////////////////////////////////////////////////////
+
+typedef struct {
+  struct in6_addr next_hop;
+  uint8_t* data;
+} rpl_data_packet_t;
+
+typedef struct {
+  struct ip6_hdr iphdr;
+  uint8_t retries;
+  rpl_data_packet_t packet;
+} queue_entry_t;
+
+typedef struct {
+  struct ip6_packet s_pkt;
+  struct dao_base_t dao_base;
+  struct ip_iovec v[1];
+} dao_entry_t;
+
+typedef struct {
+  struct in6_addr nodeID;
+  uint8_t interfaceID;
+  uint8_t DAOsequence;
+  //uint16_t DAOrank;
+  uint32_t DAOlifetime;
+  uint8_t routeTag;
+  uint8_t RRlength;
+  uint8_t prefixLength;
+  struct in6_addr prefix;
+  uint8_t* RRStack;
+} dao_table_entry;
+
+typedef struct {
+  struct in6_addr nodeID;
+  uint16_t successTx;
+  uint16_t totalTx;
+  uint16_t etx;
+} parentTableEntryDAO;
+
+typedef struct {
+  route_key_t key;
+  uint32_t lifetime;
+} downwards_table_t;
+
+
+/* draft-ietf-6man-rpl-option-01 */
+typedef struct {
+  struct ip6_ext ip6_ext_outer;
+  struct ip6_ext ip6_ext_inner;
+  /*
+  uint8_t o_bit  : 1;
+  uint8_t r_bit  : 1;
+  uint8_t f_bit  : 1;
+  uint8_t reserved : 5;
+  */
+  uint8_t bitflag;
+  struct rpl_instance_id instance_id; // used to be instanceID 
+  nx_uint16_t senderRank;
+} __attribute__((packed)) rpl_data_hdr_t ;
+
+#define RPL_DATA_O_BIT_MASK 0x80
+#define RPL_DATA_O_BIT_SHIFT 7
+#define RPL_DATA_R_BIT_MASK 0x40
+#define RPL_DATA_R_BIT_SHIFT 6
+#define RPL_DATA_F_BIT_MASK 0x20
+#define RPL_DATA_F_BIT_SHIFT 5
+
+////////////////////////////////////////////////////////////////////////////////////////////////////////////
+
+/////////////////////// for rank component /////////////////////////////////////////////////////////////////
+
+typedef struct {
+  struct in6_addr parentIP;
+  uint16_t rank;
+  //uint16_t successNum;
+  //uint16_t totalNum;
+  uint16_t etx;
+  uint16_t etx_hop;
+  //float latency;
+  bool valid;
+} parent_t;
+
+struct dio_dest_prefix_t {
+  uint8_t type;
+  uint16_t length;
+  uint8_t* data;
+};
+
+/*
+struct padN_t{
+  uint8_t type;
+  uint16_t padN_len;
+  uint8_t *padN_data;
+};
+*/
+parent_t parentSet[MAX_PARENT];
+
+#define DIO_GROUNDED_MASK 0x80
+#define DIO_MOP_MASK 0x3c
+#define DIO_MOP_SHIFT 3
+#define DIO_PREF_MASK 0x07
+#define DIO_PREF_SHIFT 0
+
+#endif
diff --git a/tos/lib/net/rpl/RPLDAORoutingEngine.nc b/tos/lib/net/rpl/RPLDAORoutingEngine.nc
new file mode 100644
index 00000000..4f2afb1c
--- /dev/null
+++ b/tos/lib/net/rpl/RPLDAORoutingEngine.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * RPLDAORoutingEngine.nc
+ * @ author JeongGil Ko (John) <jgko@cs.jhu.edu>
+ */
+
+#include <RPL.h>
+
+interface RPLDAORoutingEngine{
+  command error_t startDAO();
+  command bool getStoreState();
+}
diff --git a/tos/lib/net/rpl/RPLDAORoutingEngineC.nc b/tos/lib/net/rpl/RPLDAORoutingEngineC.nc
new file mode 100644
index 00000000..5397318d
--- /dev/null
+++ b/tos/lib/net/rpl/RPLDAORoutingEngineC.nc
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * RPLDAORoutingEngineC.nc
+ * @ author JeongGil Ko (John) <jgko@cs.jhu.edu>
+ */
+
+#include <RPL.h>
+#include <lib6lowpan/ip_malloc.h>
+#include <lib6lowpan/in_cksum.h>
+#include <lib6lowpan/ip.h>
+
+configuration RPLDAORoutingEngineC{
+  provides {
+    interface StdControl;
+    interface RPLDAORoutingEngine;
+  }
+  uses {
+    interface IP as ICMP_RA[uint8_t code];
+  }
+} implementation{
+  components new RPLDAORoutingEngineP() as DAORouting;
+  components MainC, RandomC;
+  components new TimerMilliC() as DelayDAOTimer;
+  components new TimerMilliC() as GenerateDAOTimer;
+  components new TimerMilliC() as RemoveTimer;
+  components IPAddressC;
+  components RPLRankC;
+  components RPLRoutingEngineC;
+  components IPStackC;
+
+  StdControl = DAORouting;
+  RPLDAORoutingEngine = DAORouting;
+  DAORouting.IP_DAO = ICMP_RA[ICMPV6_CODE_DAO];
+
+  DAORouting.DelayDAOTimer -> DelayDAOTimer;
+  DAORouting.GenerateDAOTimer -> GenerateDAOTimer;
+  DAORouting.RemoveTimer -> RemoveTimer;
+  DAORouting.Random -> RandomC;
+  DAORouting.IPAddress -> IPAddressC;
+  DAORouting.RPLRouteInfo -> RPLRoutingEngineC;
+  DAORouting.RootControl -> RPLRoutingEngineC;
+  DAORouting.ForwardingTable -> IPStackC;
+
+  components new QueueC(dao_entry_t*, RPL_QUEUE_SIZE) as SendQueueP;
+  DAORouting.SendQueue -> SendQueueP;
+
+  components new PoolC(dao_entry_t, RPL_QUEUE_SIZE) as SendPoolP;
+  DAORouting.SendPool -> SendPoolP;
+
+  components IPPacketP;
+  DAORouting.IPPacket -> IPPacketP;
+
+  components LedsC;
+  DAORouting.Leds -> LedsC;
+}
diff --git a/tos/lib/net/rpl/RPLDAORoutingEngineP.nc b/tos/lib/net/rpl/RPLDAORoutingEngineP.nc
new file mode 100644
index 00000000..69ebbec2
--- /dev/null
+++ b/tos/lib/net/rpl/RPLDAORoutingEngineP.nc
@@ -0,0 +1,379 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * RPLDAORoutingEngineP.nc
+ * @ author JeongGil Ko (John) <jgko@cs.jhu.edu>
+ */
+
+#include <RPL.h>
+#include <lib6lowpan/in_cksum.h>
+#include <lib6lowpan/ip.h>
+#include <RPL.h>
+
+generic module RPLDAORoutingEngineP(){
+  provides {
+    interface RPLDAORoutingEngine as RPLDAORouteInfo;
+    interface StdControl;
+  }
+  uses {
+    interface Timer<TMilli> as DelayDAOTimer;
+    interface Timer<TMilli> as RemoveTimer;
+    interface Timer<TMilli> as GenerateDAOTimer;
+    interface Random;
+    interface IP as IP_DAO;
+    interface IPAddress;
+    interface Queue<dao_entry_t*> as SendQueue;
+    interface Pool<dao_entry_t> as SendPool;
+    interface RPLRoutingEngine as RPLRouteInfo;
+    interface RootControl;
+    interface IPPacket;
+    interface ForwardingTable;
+    interface Leds;
+  }
+} implementation {
+
+#define RPL_GLOBALADDR
+  //#undef printfUART
+  //#define printfUART(X, args ...) ;
+
+  uint32_t dao_rate = 20 * 1024U;
+  uint32_t delay_dao = 256; // dao batches will be fired 256 ms after the first dao message is scheduled
+  // every 100 ms, check if elememts in the entry should be deleted --
+  // only for storing nodes
+  uint32_t remove_time = 60 * 1024U; 
+  uint8_t dao_table_pos = 0;
+  uint16_t DTSN = 0;
+  uint16_t daoseq = 0;
+  uint16_t init_daorank = 1;
+  struct in6_addr MY_ADDR;
+
+  uint8_t PATH_SEQUENCE = 0;
+  uint8_t PATH_CONTROL = 0;
+
+  downwards_table_t downwards_table[ROUTE_TABLE_SZ];
+  uint8_t downwards_table_count = 0;
+  bool m_running = FALSE;
+
+  command error_t StdControl.start() {
+    call RPLDAORouteInfo.startDAO();
+    m_running = TRUE;
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    m_running = FALSE;
+    return FAIL;
+  }
+
+  uint32_t count = 0;
+
+  task void sendDAO() {
+    dao_entry_t* dao_msg;
+    // struct ieee154_frame_addr addr_struct;
+
+    // for now the next hop for the DAO is ONLY the desired parent on
+    // the path to the DODAG root
+    struct in6_addr next_hop; 
+    struct dao_base_t* dao;
+
+    if(call RPLRouteInfo.getRank() == ROOT_RANK){
+      return;
+    }
+
+    if (call SendQueue.size() > 0 && call RPLRouteInfo.getMOP() != 0) {
+      dao_msg = call SendQueue.dequeue();
+      // this should be my desired parent for now
+
+#if RPL_STORING_MODE
+      /* in storing mode we unicast using LL addresses (9.2) */
+      call IPAddress.getLLAddr(&dao_msg->s_pkt.ip6_hdr.ip6_src);
+      if (call RPLRouteInfo.getDefaultRoute(&next_hop) != SUCCESS)
+        return;
+      memcpy(&dao_msg->s_pkt.ip6_hdr.ip6_dst, &next_hop, 
+             sizeof(struct in6_addr));
+#else 
+      /* in non-storing mode we must use global addresses */
+      call IPAddress.getGlobalAddr(&dao_msg->s_pkt.ip6_hdr.ip6_src);
+      /* and unicast to the DODAG root */
+      call RPLRouteInfo.getDodagId(&dao_msg->s_pkt.ip6_hdr.ip6_dst);
+#endif
+      dao = (struct dao_base_t *) dao_msg->s_pkt.ip6_data->iov_base;
+
+      //printfUART(">> sendDAO %d %lu \n", TOS_NODE_ID, ++count);
+      //call IP_DAO.send(&dao_msg->s_pkt);
+      call SendPool.put(dao_msg);
+
+      if (call SendQueue.size()) {
+	// Once fired, shoot all the DAOs in the current sendqueue;
+        // Assume that there is no aggregation on DAO messages.
+	post sendDAO();
+      }
+    }
+  }
+
+  command error_t RPLDAORouteInfo.startDAO() {
+    //printfUART("START DAO \n");
+
+#ifdef RPL_STORING_MODE
+    call RemoveTimer.startPeriodic(remove_time);
+#else
+    if (call RPLRouteInfo.getRank() != ROOT_RANK) {
+    } else {
+      call RemoveTimer.startPeriodic(remove_time);
+    }
+#endif
+    /*
+    if (call RPLRouteInfo.getRank() != ROOT_RANK) {
+      call GenerateDAOTimer.startPeriodic(dao_rate);
+    }
+    */
+    call GenerateDAOTimer.startPeriodic(dao_rate);
+    call DelayDAOTimer.startPeriodic(delay_dao);
+
+    if(call GenerateDAOTimer.isRunning()){
+      return SUCCESS;
+    }else if(call RPLRouteInfo.getRank() == ROOT_RANK){
+      return SUCCESS;
+    }else{
+      return call RPLDAORouteInfo.startDAO();
+    }
+  }
+
+  command bool RPLDAORouteInfo.getStoreState() {
+#if RPL_STORING_MODE
+    return TRUE;
+#else
+    return call RootControl.isRoot();
+#endif
+  }
+
+  task void initDAO();
+
+  event void GenerateDAOTimer.fired() { // Initiate my own DAO messages
+    post initDAO();
+  }
+
+  task void initDAO(){
+    error_t error;
+    dao_entry_t* dao_msg;
+    uint16_t length = sizeof(struct dao_base_t);
+
+    dao_msg = call SendPool.get();
+    if (dao_msg == NULL){
+      return;
+    }
+
+    if(!call RPLRouteInfo.hasDODAG() || call RPLRouteInfo.getRank() == ROOT_RANK){
+      call SendPool.put(dao_msg);
+      return;
+    }
+
+    // call IPAddress.setSource(&dao_msg->s_pkt.ip6_hdr);
+    dao_msg->dao_base.icmpv6.type = 155;//ICMP_TYPE_ROUTER_ADV; // Is this type correct?
+    dao_msg->dao_base.icmpv6.code = ICMPV6_CODE_DAO;
+    dao_msg->dao_base.icmpv6.checksum = 0;
+    dao_msg->dao_base.DAOsequence = daoseq;
+    dao_msg->dao_base.instance_id.id = call RPLRouteInfo.getInstanceID(); // get instance ID from Rtg eng
+
+    dao_msg->dao_base.target_option.type = RPL_TARGET_TYPE;
+    dao_msg->dao_base.target_option.option_length = 18;
+    dao_msg->dao_base.target_option.prefix_length = sizeof(struct in6_addr) * 8; // length of my address
+    //call IPAddress.getGlobalAddr(&dao_msg->dao_base.target_option.target_prefix);
+#ifdef RPL_GLOBALADDR
+    call IPAddress.getGlobalAddr(&MY_ADDR);
+#else
+    call IPAddress.getLLAddr(&MY_ADDR);
+#endif
+    memcpy(&dao_msg->dao_base.target_option.target_prefix, &MY_ADDR, sizeof(struct in6_addr));
+    
+    dao_msg->dao_base.transit_info_option.type = RPL_TRANSIT_INFORMATION_TYPE;
+    dao_msg->dao_base.transit_info_option.option_length = 22;
+    dao_msg->dao_base.transit_info_option.path_sequence = PATH_SEQUENCE;
+    dao_msg->dao_base.transit_info_option.path_control = PATH_CONTROL;
+    dao_msg->dao_base.transit_info_option.path_lifetime = DEFAULT_LIFETIME;
+    if (call RPLRouteInfo.getDefaultRoute(&dao_msg->dao_base.transit_info_option.parent_address) != SUCCESS)
+      return;
+
+    dao_msg->v[0].iov_base = (uint8_t *)&dao_msg->dao_base;
+    dao_msg->v[0].iov_len  = length;
+    dao_msg->v[0].iov_next = NULL;
+
+    dao_msg->s_pkt.ip6_hdr.ip6_vfc = IPV6_VERSION;
+    dao_msg->s_pkt.ip6_hdr.ip6_nxt = IANA_ICMP;
+    dao_msg->s_pkt.ip6_hdr.ip6_plen = htons(length);
+    dao_msg->s_pkt.ip6_data = &dao_msg->v[0];
+
+    error = call SendQueue.enqueue(dao_msg);
+
+    if (error != SUCCESS) {
+      call SendPool.put(dao_msg);
+      return;
+    } else {
+      if (!call DelayDAOTimer.isRunning()) {
+	call DelayDAOTimer.startOneShot(delay_dao);
+      }
+    }
+  }
+
+  event void DelayDAOTimer.fired() {
+    post sendDAO();
+  }
+
+  event void RemoveTimer.fired() {
+    // check stored table's life-time
+    uint8_t i, j;
+    if (!call RPLDAORouteInfo.getStoreState())
+      return;
+
+    for (i = 0; i < downwards_table_count; i++) {
+      downwards_table[i].lifetime -= delay_dao;
+      if (downwards_table[i].lifetime <= delay_dao) {
+        /* SDH : expire the route to this destination */
+        call ForwardingTable.delRoute(downwards_table[i].key);
+	for (j = i; j < downwards_table_count-1; j++) {
+	  downwards_table[j] = downwards_table[j+1];
+	}
+	downwards_table[downwards_table_count-1].lifetime = 0;
+	downwards_table_count --;
+      }
+    }
+  }
+
+  event void IP_DAO.recv(struct ip6_hdr *iph, void *payload, 
+                          size_t len, struct ip6_metadata *meta) {
+    dao_entry_t* dao_msg;
+    error_t error;
+    // This is where the message is actually cast
+    struct dao_base_t *dao = (struct dao_base_t *)payload; 
+    struct route_entry *entry;
+    route_key_t new_key = ROUTE_INVAL_KEY;
+
+    //printfUART("receive DAO: %i\n", call RPLDAORouteInfo.getStoreState());
+    if (!m_running) return;
+
+#ifndef RPL_STORING_MODE
+    if (!call RPLDAORouteInfo.getStoreState())
+      return;
+#endif
+//     if (dao->target_option.prefix_length == 128)
+//       call Leds.led1Toggle();
+    /* SDH : the two cases are the same...  */
+    entry = call ForwardingTable.lookupRoute(dao->target_option.target_prefix.s6_addr,
+                                             dao->target_option.prefix_length);
+    if (entry != NULL && entry->prefixlen == dao->target_option.prefix_length) {
+      /* exact match in the forwarding table */
+      if (memcmp(entry->next_hop.s6_addr, iph->ip6_src.s6_addr, 16) == 0) {
+	// same old destination with same DTSN
+      } else {
+        /* SDH : shouldn't we, like, save the new route? */
+	// new next hop for an existing downswards node
+        //call ForwardingTable.delRoute(entry.key);
+	call RPLRouteInfo.setDTSN(call RPLRouteInfo.getDTSN()+1);
+	if(dao->target_option.prefix_length > 0)
+	  new_key = call ForwardingTable.addRoute(dao->target_option.target_prefix.s6_addr,
+						  dao->target_option.prefix_length,
+						  &iph->ip6_src,
+						  RPL_IFACE);
+      }
+    }else {
+      /* new prefix */
+      if (downwards_table_count == ROUTE_TABLE_SZ) {
+        //printfUART("Downward table full -- not adding route\n");
+        return;
+      }
+      //printfUART("Add new route\n");
+      if(dao->target_option.prefix_length > 0){
+	new_key = call ForwardingTable.addRoute(dao->target_option.target_prefix.s6_addr,
+						dao->target_option.prefix_length,
+						&iph->ip6_src,
+						RPL_IFACE);
+	/*
+	if (new_key == ROUTE_INVAL_KEY) {
+	  call Leds.led1Toggle();
+	  return;
+	}
+	*/
+      }
+
+      if(new_key != ROUTE_INVAL_KEY){
+	downwards_table[downwards_table_count].lifetime = dao->transit_info_option.path_lifetime;
+	downwards_table[downwards_table_count].key = new_key;
+	// for next element
+	downwards_table_count ++;
+      }
+
+      /*
+      printfUART("DAO RX-- new prefix %d %d %d \n",
+                 downwards_table_count, 
+                 ntohs(dao->target_option.target_prefix.s6_addr16[7]), 
+                 ntohs(iph->ip6_src.s6_addr16[7]));
+      */
+    }
+
+    /***********************************************************************/
+    // FROM THIS POINT, ITS ABOUT FORWARDING THE DAO INFORMATION UPWARDS!!!
+    /***********************************************************************/
+    if (call RPLRouteInfo.getRank() == ROOT_RANK) {
+      // no need to futher process packets
+      return;
+    }else{
+      if(!call GenerateDAOTimer.isRunning())
+	call GenerateDAOTimer.startPeriodic(dao_rate);
+    }
+    dao_msg = call SendPool.get();
+    if (dao_msg == NULL) {
+      return;
+    }
+
+    // NO MODIFICATION TO DAO's RR-LIST NEEDED! -- just make sure I keep what I have and the prefix
+    //printfUART("Continue! %d \n", ntohs(iph->ip6_plen));
+    memcpy(&dao_msg->s_pkt.ip6_hdr, iph, sizeof(struct ip6_hdr));
+
+    // copy new payload information
+    memcpy(&dao_msg->dao_base, (uint8_t*)payload, sizeof(struct dao_base_t));
+    dao_msg->v[0].iov_base = (uint8_t *)&dao_msg->dao_base;
+    dao_msg->v[0].iov_len = ntohs(iph->ip6_plen);
+    dao_msg->v[0].iov_next = NULL;
+    dao_msg->s_pkt.ip6_data = &dao_msg->v[0];
+
+    error = call SendQueue.enqueue(dao_msg);
+    if (error != SUCCESS) {
+      call SendPool.put(dao_msg);
+      return;
+    } /*else {
+      if (!call DelayDAOTimer.isRunning())
+	call DelayDAOTimer.startOneShot(delay_dao);
+    }
+    */
+  }
+  event void IPAddress.changed(bool global_valid) {}
+}
diff --git a/tos/lib/net/rpl/RPLMRHOFP.nc b/tos/lib/net/rpl/RPLMRHOFP.nc
new file mode 100644
index 00000000..f2abd91e
--- /dev/null
+++ b/tos/lib/net/rpl/RPLMRHOFP.nc
@@ -0,0 +1,150 @@
+module RPLMRHOFP{
+  provides interface RPLOF;
+  uses interface ForwardingTable;
+  uses interface RPLRoutingEngine as RPLRoute;
+}
+implementation{
+
+#define STABILITY_BOUND 5
+// this determines the stability bound for switching parents.
+// 0 is the min value to have nodes aggressively seek new parents
+// 5 or 10 is suggested
+
+  //uint16_t minRank = INFINITE_RANK;
+  uint16_t nodeRank = INFINITE_RANK;
+  uint16_t minMetric = MAX_ETX;
+
+  uint8_t divideRank = 10;
+  uint32_t parentChanges = 0;
+  uint8_t desiredParent;
+  uint16_t nodeEtx = 10;
+  uint16_t prevParent;
+  bool newParent = FALSE;
+
+  void setRoot(){
+    nodeEtx = 10;
+    nodeRank = 1;
+  }
+
+  /* OCP for MRHOF */
+  command bool RPLOF.OCP(uint16_t ocp){
+    if(ocp == 1)
+      return TRUE;
+    return FALSE;
+  }
+
+  /* Which metrics does this implementation support */
+  command bool RPLOF.objectSupported(uint16_t objectType){
+    if(objectType == 7){
+      return TRUE;
+    }
+
+    return FALSE;
+  }
+
+  command uint16_t RPLOF.getObjectValue(){
+    if(TOS_NODE_ID == RPL_ROOT_ADDR){
+      setRoot();
+    }
+    //    if(nodeRank == INFINITE_RANK)
+    //nodeEtx = 0xFFFF;
+    return nodeEtx;
+  }
+
+  /* Current parent */
+  command struct in6_addr* RPLOF.getParent(){
+    return &parentSet[desiredParent].parentIP;
+  }
+
+  /* Current rank */
+  command uint16_t RPLOF.getRank(){
+    return nodeRank;
+  }
+
+  command bool RPLOF.recalcualateRank(){
+    // return TRUE if this is the first time that the rank is computed for this parent.
+
+    uint16_t prevEtx, prevRank;
+
+    prevEtx = nodeEtx;
+    prevRank = nodeRank;
+
+    nodeEtx = parentSet[desiredParent].etx_hop + parentSet[desiredParent].etx;
+    nodeRank = nodeEtx / divideRank;
+
+    if (nodeRank <= 1 && prevRank > 1) {
+      nodeRank = prevRank;
+      nodeEtx = prevEtx;
+    }
+
+    if(newParent){
+      newParent = FALSE;
+      return TRUE;
+    }else{
+      return FALSE;
+    }
+  }
+
+  /* Recompute the routes, return TRUE if rank updated */
+  command bool RPLOF.recomputeRoutes(){
+
+    uint8_t indexset;
+    uint8_t min = 0;
+    uint16_t minDesired;
+    //choose the first valid
+    while (!parentSet[min++].valid/* && parentSet[min].etx < 0x7FFF && parentSet[min++].etx >= 10*/ && min < MAX_PARENT); 
+
+    if (min == MAX_PARENT){ 
+      call RPLOF.resetRank();
+      call RPLRoute.inconsistency();
+      return FALSE;
+    }
+
+    min--;
+    minDesired = parentSet[min].etx_hop + parentSet[min].etx;
+
+    for (indexset = min + 1; indexset < MAX_PARENT; indexset++) {
+      if (parentSet[indexset].valid && parentSet[indexset].etx >= 10 && parentSet[indexset].etx_hop >= 0 &&
+	  (parentSet[indexset].etx_hop + parentSet[indexset].etx < minDesired) && parentSet[indexset].rank < nodeRank && parentSet[indexset].rank != INFINITE_RANK) {
+	min = indexset;
+	minDesired = parentSet[indexset].etx_hop + parentSet[indexset].etx;
+	if(min == desiredParent) // this is the metric measurement for the current parent
+	  minMetric = minDesired;
+      }
+    }
+
+    if(parentSet[min].rank > nodeRank || parentSet[min].rank == INFINITE_RANK){
+      printfUART("SELECTED PARENT is FFFF %d\n", TOS_NODE_ID);
+      return FAIL;
+    }
+
+    if(minDesired+STABILITY_BOUND >= minMetric){ 
+      // if the min measurement (minDesired) is not significantly better than the previous parent's (minMetric), stay with what we have...
+      min = desiredParent;
+      minDesired = minMetric;
+    }
+
+    minMetric = minDesired;
+    desiredParent = min;
+    printfUART("MRHOF %d %d %u %u\n", TOS_NODE_ID, htons(parentSet[desiredParent].parentIP.s6_addr16[7]), parentSet[desiredParent].etx_hop, parentSet[desiredParent].etx);
+
+    /* set the new default route */
+    /* set one of the below of maybe set both? */
+    //call ForwardingTable.addRoute((const uint8_t*)&DODAGID, 128, &parentSet[desiredParent].parentIP, RPL_IFACE);
+    call ForwardingTable.addRoute(NULL, 0, &parentSet[desiredParent].parentIP, RPL_IFACE); // will this give me the default path?
+
+    if(prevParent != parentSet[desiredParent].parentIP.s6_addr16[7]){
+      printfUART(">> New Parent %d %d %lu \n", TOS_NODE_ID, htons(parentSet[desiredParent].parentIP.s6_addr16[7]), parentChanges++);
+      newParent = TRUE;
+    }
+    prevParent = parentSet[desiredParent].parentIP.s6_addr16[7];
+
+    return TRUE;
+  }
+
+  command void RPLOF.resetRank(){
+    nodeRank = INFINITE_RANK;
+    minMetric = MAX_ETX;
+  }
+
+}
diff --git a/tos/lib/net/rpl/RPLOF.nc b/tos/lib/net/rpl/RPLOF.nc
new file mode 100644
index 00000000..954d65eb
--- /dev/null
+++ b/tos/lib/net/rpl/RPLOF.nc
@@ -0,0 +1,22 @@
+interface RPLOF {
+
+  /* OCP for this OF */
+  command bool OCP(uint16_t ocp);
+
+  /* Which metrics does this implementation support */
+  command bool objectSupported(uint16_t objectType);
+
+  command uint16_t getObjectValue();
+  /* Current parent */
+  command struct in6_addr* getParent();
+
+  /* Current rank */
+  command uint16_t getRank();
+  command void resetRank();
+
+  command bool recalcualateRank();
+
+  /* Recompute the routes, return TRUE if rank updated */
+  command bool recomputeRoutes();
+
+}
diff --git a/tos/lib/net/rpl/RPLOF0P.nc b/tos/lib/net/rpl/RPLOF0P.nc
new file mode 100644
index 00000000..384e0f59
--- /dev/null
+++ b/tos/lib/net/rpl/RPLOF0P.nc
@@ -0,0 +1,139 @@
+module RPLOF0P{
+  provides interface RPLOF;
+  uses interface ForwardingTable;
+  uses interface RPLRoutingEngine as RPLRoute;
+}
+implementation{
+
+#define STABILITY_BOUND 10 // this determines the stability bound for switching parents.
+
+  //#undef printfUART
+  //#define printfUART(X, fmt ...) ;
+
+  uint16_t nodeRank = INFINITE_RANK;
+  uint16_t minMetric = MAX_ETX;
+  uint16_t prevParent;
+
+  uint8_t divideRank = 10;
+  uint32_t parentChanges = 0;
+  uint8_t desiredParent;
+  uint16_t nodeEtx = 10;
+  bool newParent = FALSE;
+
+  /* OCP for OF0 */
+  command bool RPLOF.OCP(uint16_t ocp){
+    if(ocp == 0)
+      return TRUE;
+    return FALSE;
+  }
+
+  /* Which metrics does this implementation support */
+  command bool RPLOF.objectSupported(uint16_t objectType){
+    if(objectType == 7){
+      return TRUE;
+    }
+
+    return TRUE;
+  }
+
+  command uint16_t RPLOF.getObjectValue(){
+    return nodeEtx;
+  }
+
+  /* Current parent */
+  command struct in6_addr* RPLOF.getParent(){
+    return &parentSet[desiredParent].parentIP;
+  }
+
+  /* Current rank */
+  command uint16_t RPLOF.getRank(){
+    return nodeRank;
+  }
+
+  command bool RPLOF.recalcualateRank(){
+    uint16_t prevEtx, prevRank;
+
+    prevEtx = nodeEtx;
+    prevRank = nodeRank;
+
+    nodeRank = parentSet[desiredParent].rank + (parentSet[desiredParent].etx_hop / divideRank);
+
+    if (nodeRank == 1 && prevRank != 0) {
+      nodeRank = prevRank;
+      nodeEtx = prevEtx;
+    }
+
+    if(newParent){
+      newParent = FALSE;
+      return TRUE;
+    }else{
+      return FALSE;
+    }
+  }
+
+  /* Recompute the routes, return TRUE if rank updated */
+  command bool RPLOF.recomputeRoutes(){
+
+    uint8_t indexset;
+    uint8_t min = 0;
+    uint16_t minDesired;
+
+    //choose the first valid
+    while (!parentSet[min++].valid && min < MAX_PARENT); 
+
+    if (min == MAX_PARENT){ 
+      call RPLOF.resetRank();
+      call RPLRoute.inconsistency();
+      return FALSE;
+    }
+
+    min--;
+    minDesired = parentSet[min].etx_hop + parentSet[min].etx;
+
+    for (indexset = min + 1; indexset < MAX_PARENT; indexset++) {
+      if (parentSet[indexset].valid && parentSet[indexset].etx >= 10 && parentSet[indexset].etx_hop >= 0 &&
+	  (parentSet[indexset].etx_hop + parentSet[indexset].etx < minDesired) && parentSet[indexset].rank < nodeRank && parentSet[indexset].rank != INFINITE_RANK) {
+	min = indexset;
+	minDesired = parentSet[indexset].rank + parentSet[indexset].etx_hop/divideRank;
+	if(min == desiredParent) // this is the metric measurement for the current parent
+	  minMetric = minDesired;
+      }
+    }
+
+    if(parentSet[min].rank > nodeRank || parentSet[min].rank == INFINITE_RANK){
+      printfUART("SELECTED PARENT is FFFF %d\n", TOS_NODE_ID);
+      return FAIL;
+    }
+
+    if(minDesired+STABILITY_BOUND >= minMetric){ 
+      // if the min measurement (minDesired) is not significantly better than the previous parent's (minMetric), stay with what we have...
+      min = desiredParent;
+      minDesired = minMetric;
+    }
+
+    minMetric = minDesired;
+    desiredParent = min;
+
+    /* set the new default route */
+    /* set one of the below of maybe set both? */
+    //call ForwardingTable.addRoute((const uint8_t*)&DODAGID, 128, &parentSet[desiredParent].parentIP, RPL_IFACE);
+
+    call ForwardingTable.addRoute(NULL, 0, &parentSet[desiredParent].parentIP, RPL_IFACE); // will this give me the default path?
+
+    //printfUART_in6addr(&parentSet[desiredParent].parentIP);
+
+    if(prevParent != parentSet[desiredParent].parentIP.s6_addr16[7]){
+      printfUART(">> New Parent %d %d %lu \n", TOS_NODE_ID, htons(parentSet[desiredParent].parentIP.s6_addr16[7]), parentChanges++);
+      newParent = TRUE;
+    }
+    prevParent = parentSet[desiredParent].parentIP.s6_addr16[7];
+
+    return TRUE;
+  }
+
+  command void RPLOF.resetRank(){
+    nodeRank = INFINITE_RANK;
+    minMetric = MAX_ETX;
+  }
+
+}
diff --git a/tos/lib/net/rpl/RPLRank.nc b/tos/lib/net/rpl/RPLRank.nc
new file mode 100644
index 00000000..b2f2c717
--- /dev/null
+++ b/tos/lib/net/rpl/RPLRank.nc
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * RPLRank.nc
+ * @ author JeongGil Ko (John) <jgko@cs.jhu.edu>
+ */
+
+/*
+ * Copyright (c) 2010 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @ author Yiwei Yao <yaoyiwei@stanford.edu>
+ */
+
+interface RPLRank {
+
+  // declare the I am the root
+  command void declareRoot();
+  
+  // I am no longer a root
+  command void cancelRoot();
+  
+  // return the rank of the specified IP addr
+  command uint16_t getRank(struct in6_addr *node);
+
+  // return if IP is in parent set
+  command bool isParent(struct in6_addr *node);
+  
+  // new iteration has begun
+  //command void notifyNewIteration();
+  
+  // inconsistency is seen for the link with IP
+  // record this as part of entry in table as well
+  command void inconsistencyDetected();
+
+  /*new adding*/ 
+  // ping rank component if there are parents
+  command uint8_t hasParent();
+  command bool isLeaf();
+
+  command uint16_t getEtx();
+
+  command bool compareAddr(struct in6_addr *node1, struct in6_addr *node2);
+  command bool validInstance(uint8_t instanceID);
+
+  event void parentRankChange();
+
+  //////Feel free to add events or commands below this line//////
+  ///////////////////////////////////////////////////////////////
+
+  command void setQueuingDelay(uint32_t delay);    
+
+  command error_t getDefaultRoute(struct in6_addr *next_hop);
+
+}
diff --git a/tos/lib/net/rpl/RPLRankC.nc b/tos/lib/net/rpl/RPLRankC.nc
new file mode 100644
index 00000000..f2923024
--- /dev/null
+++ b/tos/lib/net/rpl/RPLRankC.nc
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * RPLRankC.nc
+ * @ author JeongGil Ko (John) <jgko@cs.jhu.edu>
+ */
+
+/*
+ * Copyright (c) 2010 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @ author Yiwei Yao <yaoyiwei@stanford.edu>
+ */
+
+
+configuration RPLRankC{
+  provides {
+    interface IP as IP_DIO_Filter;
+    interface RPLRank;
+    interface StdControl;
+  }
+  uses {
+    interface IP as ICMP_RA[uint8_t code];
+  }
+}
+implementation {
+  components RPLRankP, IPAddressC;
+  components RPLRoutingEngineC;
+  components IPStackC;
+  components LedsC;
+
+  RPLRank = RPLRankP;
+  StdControl = RPLRankP;
+  IP_DIO_Filter = RPLRankP.IP_DIO_Filter;
+  RPLRankP.IP_DIO = ICMP_RA[ICMPV6_CODE_DIO];
+
+  RPLRankP.Leds -> LedsC;
+  RPLRankP.RouteInfo -> RPLRoutingEngineC;
+  RPLRankP.IPAddress -> IPAddressC;
+  //RPLRankP.ForwardingTable -> IPStackC;
+  RPLRankP.ForwardingEvents -> IPStackC.ForwardingEvents[RPL_IFACE];
+
+#ifdef RPL_OF_MRHOF
+  components RPLMRHOFP;
+  RPLRankP.RPLOF -> RPLMRHOFP;
+  RPLMRHOFP.ForwardingTable -> IPStackC;
+  RPLMRHOFP.RPLRoute -> RPLRoutingEngineC;
+#else
+  components RPLOF0P;
+  RPLRankP.RPLOF -> RPLOF0P;
+  RPLOF0P.ForwardingTable -> IPStackC;
+  RPLOF0P.RPLRoute -> RPLRoutingEngineC;
+#endif
+
+}
diff --git a/tos/lib/net/rpl/RPLRankP.nc b/tos/lib/net/rpl/RPLRankP.nc
new file mode 100644
index 00000000..d78a71bd
--- /dev/null
+++ b/tos/lib/net/rpl/RPLRankP.nc
@@ -0,0 +1,937 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * RPLRankC.nc
+ * @ author JeongGil Ko (John) <jgko@cs.jhu.edu>
+ */
+
+/*
+ * Copyright (c) 2010 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @ author Yiwei Yao <yaoyiwei@stanford.edu>
+ */
+
+#include <PrintfUART.h>
+#include <RPL.h>
+#include <lib6lowpan/ip_malloc.h>
+module RPLRankP{
+  provides{
+    interface RPLRank as RPLRankInfo;
+    interface StdControl;
+    interface IP as IP_DIO_Filter;
+  }
+  uses {
+    interface IP as IP_DIO;
+    interface RPLRoutingEngine as RouteInfo;
+    interface Leds;
+    interface IPAddress;
+    interface ForwardingTable;
+    interface ForwardingEvents;
+    interface RPLOF;
+  }
+}
+
+implementation {
+
+  uint16_t nodeRank = INFINITE_RANK; // 0 is the initialization state
+  uint16_t minRank = INFINITE_RANK;
+  bool leafState = FALSE;
+  /* SDH : this is essentially the Default Route List */
+  struct in6_addr prevParent;
+  uint32_t parentChanges = 0;
+  uint8_t parentNum = 0;
+  uint16_t minMetric = MAX_ETX;
+  uint16_t desiredParent = MAX_PARENT;
+  uint16_t VERSION = 0;
+  uint16_t nodeEtx = 10;
+  uint8_t MAX_RANK_INCREASE = 1;
+  
+  uint8_t etxConstraint;
+  uint32_t latencyConstraint;
+  bool hasConstraint[2] = {FALSE,FALSE}; //hasConstraint[0] represents ETX, hasConstraint[1] represent Latency
+  
+  struct in6_addr DODAGID;
+  struct in6_addr DODAG_MAX;
+  uint8_t METRICID; //which metric
+  uint16_t OCP;
+  uint32_t myQDelay = 1.0;
+  bool hasOF = FALSE;
+  uint8_t Prf = 0xFF;
+  uint8_t alpha; //configuration parameter
+  uint8_t beta;
+  bool ignore = FALSE;
+  bool m_running = FALSE;
+  uint8_t divideRank = 10;
+
+  void resetValid();
+  void getNewRank();
+
+  //#undef printfUART
+  //#undef printfUART_in6addr
+  //#define printfUART(X, fmt ...) ;
+  //#define printfUART_in6addr(X) ;
+#define compare_ipv6(node1, node2) (!memcmp((node1), (node2), sizeof(struct in6_addr)))
+
+#define RPL_GLOBALADDR
+
+  command error_t StdControl.start() { //initialization
+    uint8_t indexset;
+
+    DODAG_MAX.s6_addr16[7] = htons(0);
+
+    memcpy(&DODAGID, &DODAG_MAX, sizeof(struct in6_addr));
+
+    for (indexset = 0; indexset < MAX_PARENT; indexset++) {
+      parentSet[indexset].valid = FALSE;
+    }
+
+    m_running = TRUE;
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() { 
+    m_running = FALSE;
+    return SUCCESS;
+  }
+
+  // declare the I am the root
+  command void RPLRankInfo.declareRoot(){ //done
+    minMetric = 10;
+    nodeRank = 1;
+  }
+
+  command bool RPLRankInfo.validInstance(uint8_t instanceID){ //done
+    return TRUE;
+  }
+
+  // I am no longer a root
+  command void RPLRankInfo.cancelRoot(){ //done
+  }
+
+  uint8_t getParent(struct in6_addr *node);
+  
+  // return the rank of the specified IP addr
+  command uint16_t RPLRankInfo.getRank(struct in6_addr *node){ //done
+    uint8_t indexset;
+    struct in6_addr my_addr;
+
+#ifdef RPL_GLOBALADDR
+    call IPAddress.getGlobalAddr(&my_addr);
+#else
+    call IPAddress.getLLAddr(&my_addr);
+#endif
+
+    if(compare_ipv6(&my_addr, node)){
+      return nodeRank;
+    }
+
+    indexset = getParent(node);
+
+    if (indexset != MAX_PARENT){
+      return parentSet[indexset].rank;
+    }
+
+    return 1234;
+  }
+
+  command error_t RPLRankInfo.getDefaultRoute(struct in6_addr *next) {
+    if (parentNum) {
+      memcpy(next, &parentSet[desiredParent].parentIP, sizeof(struct in6_addr));
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+
+  bool exceedThreshold(uint8_t indexset, uint8_t ID) { //done
+    return parentSet[indexset].etx_hop > ETX_THRESHOLD;
+  }
+
+  command bool RPLRankInfo.compareAddr(struct in6_addr *node1, struct in6_addr *node2){ //done
+    return compare_ipv6(node1, node2);
+  }
+
+  //return the index of parent
+  uint8_t getParent(struct in6_addr *node) { //done
+    uint8_t indexset;
+    if (parentNum == 0) {
+      return MAX_PARENT;
+    }
+    for (indexset = 0; indexset < MAX_PARENT; indexset++) {
+      if (compare_ipv6(&(parentSet[indexset].parentIP),node) && 
+          parentSet[indexset].valid) {
+	return indexset;
+      }
+    }
+    return MAX_PARENT;
+  }
+
+  // return if IP is in parent set
+  command bool RPLRankInfo.isParent(struct in6_addr *node) { //done
+    return (getParent(node) != MAX_PARENT);
+  }
+
+  /*
+  // new iteration has begun, all need to be cleared
+  command void RPLRankInfo.notifyNewIteration(){ //done
+    parentNum = 0;
+    resetValid();
+  }
+  */
+
+  void resetValid(){    //done
+    uint8_t indexset;
+    for (indexset = 0; indexset < MAX_PARENT; indexset++) {
+      parentSet[indexset].valid = FALSE;
+    }
+  }
+
+  // inconsistency is seen for the link with IP
+  // record this as part of entry in table as well
+  // Other layers will report this information
+  command void RPLRankInfo.inconsistencyDetected(){ //done
+    parentNum = 0;
+    call RPLOF.resetRank();
+    nodeRank = INFINITE_RANK;
+    minMetric = MAX_ETX;
+    desiredParent = MAX_PARENT;
+    resetValid();
+    //memcpy(&DODAGID, 0, 16);
+    //call RouteInfo.inconsistency();
+  }
+
+  // ping rank component if there are parents
+  command uint8_t RPLRankInfo.hasParent(){ //done
+    return parentNum;
+  }
+
+  command bool RPLRankInfo.isLeaf(){ //done
+    //return TRUE;
+    return leafState;
+  }
+
+  uint8_t getPreExistingParent(struct in6_addr *node) {
+    // just find if there are any pre existing information on this node...
+    uint8_t indexset;
+    if (parentNum == 0) {
+      return MAX_PARENT;
+    }
+
+    for (indexset = 0; indexset < MAX_PARENT; indexset++) {
+      if (compare_ipv6(&(parentSet[indexset].parentIP),node)) {
+	return indexset;
+      }
+    }
+    return MAX_PARENT;
+  }
+
+  command uint16_t RPLRankInfo.getEtx(){ //done
+    return call RPLOF.getObjectValue();
+  }
+
+  void insertParent(parent_t parent) {
+    uint8_t indexset;
+    uint16_t tempEtx_hop;
+
+    indexset = getPreExistingParent(&parent.parentIP);
+
+    if(indexset != MAX_PARENT) // we have previous information
+      {
+	tempEtx_hop = parentSet[indexset].etx_hop;
+	parentSet[indexset] = parent;
+
+	if(tempEtx_hop > INIT_ETX && tempEtx_hop < BLIP_L2_RETRIES){
+	  tempEtx_hop = tempEtx_hop-INIT_ETX;
+	  if(tempEtx_hop < 10)
+	    tempEtx_hop = INIT_ETX;
+	}else{
+	  tempEtx_hop = INIT_ETX;
+	}
+
+	parentSet[indexset].etx_hop = tempEtx_hop;
+	parentNum++;
+	//printfUART("Parent Added %d \n",parentNum);
+	return;
+      }
+
+    for (indexset = 0; indexset < MAX_PARENT; indexset++) {
+      if (!parentSet[indexset].valid) {
+	parentSet[indexset] = parent;
+	parentNum++;
+	break;
+      }
+    }
+    //printfUART("Parent Added 2 %d \n",parentNum);
+  }
+
+  void evictParent(uint8_t indexset) {//done
+    parentSet[indexset].valid = FALSE;
+    parentNum--;
+    //printfUART("Evict parent %d \n", parentNum);
+    if (parentNum == 0) {
+      //should do something
+      call RouteInfo.resetTrickle();
+    }
+  }
+
+  task void newParentSearch(){
+    // only called when evictAll just cleared out my current desired parent
+    call RPLOF.recomputeRoutes();
+    getNewRank();
+  }
+
+  /* check and remove parents on rank change */
+  void evictAll() {//done
+    uint8_t indexset, myParent;
+
+    myParent = getParent(call RPLOF.getParent());
+
+    for (indexset = 0; indexset < MAX_PARENT; indexset++) {
+      if (parentSet[indexset].valid && parentSet[indexset].rank >= nodeRank) {
+	parentSet[indexset].valid = FALSE;
+	parentNum--;
+	//printfUART("Evict all %d \n", parentNum);
+	if(indexset == myParent){
+	  // i just cleared out my own parent...
+	  post newParentSearch();
+	  return;
+	}
+      }
+    }
+  }
+
+  command void RPLRankInfo.setQueuingDelay(uint32_t delay){    
+    myQDelay = delay;
+  }
+
+#if 0
+  event error_t ForwardingEvents.deleteHeader(struct ip6_hdr *iph, void* payload){
+    uint16_t len;
+    /* Reconfigure length */
+    len = ntohs(iph->ip6_plen);
+    //printfUART("delete header %d \n",len);
+    len = len - sizeof(rpl_data_hdr_t);;
+    iph->ip6_plen = htons(len);
+
+    /* Move data back up */
+    memcpy(payload, (uint8_t*)payload + sizeof(rpl_data_hdr_t), len);
+
+    /* configure length*/
+    //&length -= sizeof(sizeof(rpl_data_hdr_t));
+
+    return SUCCESS;
+  }
+#endif
+
+
+  event bool ForwardingEvents.initiate(struct ip6_packet *pkt,
+                                       struct in6_addr *next_hop) {
+
+    struct ip_iovec v;
+    uint16_t len; 
+    rpl_data_hdr_t data_hdr;
+
+#ifndef RPL_OF_MRHOF
+    return TRUE;
+#endif
+
+    if(pkt->ip6_hdr.ip6_nxt == IANA_ICMP)
+      return TRUE;
+
+    data_hdr.ip6_ext_outer.ip6e_nxt = pkt->ip6_hdr.ip6_nxt;
+    data_hdr.ip6_ext_outer.ip6e_len = sizeof(rpl_data_hdr_t);
+
+    data_hdr.ip6_ext_inner.ip6e_nxt = RPL_HBH_RANK_TYPE; /* well, this is actually the type */
+    data_hdr.ip6_ext_inner.ip6e_len = sizeof(rpl_data_hdr_t) - 4;
+    data_hdr.bitflag = 0;
+    data_hdr.bitflag = 0 << RPL_DATA_O_BIT_SHIFT;
+    data_hdr.bitflag |= 0 << RPL_DATA_R_BIT_SHIFT;
+    data_hdr.bitflag |= 0 << RPL_DATA_F_BIT_SHIFT;
+    //data_hdr.o_bit = 0;
+    //data_hdr.r_bit = 0;
+    //data_hdr.f_bit = 0;
+    //data_hdr.reserved = 0;
+    data_hdr.instance_id.id = call RouteInfo.getInstanceID();
+    data_hdr.senderRank = nodeRank;
+    pkt->ip6_hdr.ip6_nxt = IPV6_HOP;
+
+    len = ntohs(pkt->ip6_hdr.ip6_plen);
+
+    /* add the header */
+    v.iov_base = (uint8_t*) &data_hdr;
+    v.iov_len = sizeof(rpl_data_hdr_t);
+    v.iov_next = pkt->ip6_data; // original upper layer goes here!
+    
+    /* increase length in ipv6 header and relocate beginning*/
+    pkt->ip6_data = &v;
+    len = len + v.iov_len;
+    pkt->ip6_hdr.ip6_plen = htons(len);
+
+    //iov_print(&v);
+
+    return TRUE;
+
+  }
+
+  /**
+   * Signaled by the forwarding engine for each packet being forwarded.
+   *
+   * If we return FALSE, the stack will drop the packet instead of
+   * doing whatever was in the routing table.
+   *
+   */
+  event bool ForwardingEvents.approve(struct ip6_hdr *iph, struct ip6_route *route,
+                                      struct in6_addr *next_hop) {
+
+    rpl_data_hdr_t* data_hdr = (rpl_data_hdr_t*) route;
+    bool inconsistent = FALSE;
+    uint8_t o_bit = (data_hdr->bitflag & RPL_DATA_O_BIT_MASK) >> RPL_DATA_O_BIT_SHIFT ;
+
+#ifndef RPL_OF_MRHOF
+    return TRUE;
+#endif
+    //data_hdr = (rpl_data_hdr_t*) route;
+
+    //printfUART("approve test: %d %d %d %d %d \n", data_hdr->senderRank, data_hdr->instance_id.id, nodeRank, o_bit, call RPLRankInfo.getRank(next_hop));
+
+    /* SDH : we'd want to dispatch on the instance id if there are
+       multiple dags */
+
+    if (data_hdr->senderRank == 1){
+      o_bit = 1;
+      goto approve;
+    }
+
+    if (o_bit && data_hdr->senderRank > nodeRank) {
+      /* loop */
+      inconsistent = TRUE;
+    } else if (!o_bit && data_hdr->senderRank < nodeRank) {
+      inconsistent = TRUE;
+    }
+
+    if (call RPLRankInfo.getRank(next_hop) >= nodeRank){
+      /* Packet is heading down if the next_hop rank is not smaller than the current one (not in the parent set) */
+      /* By the time I am here, it means that there is a next hop but if this is not in my parent set, then it should be downward*/
+      data_hdr->bitflag |= 1 << RPL_DATA_O_BIT_SHIFT;
+      //data_hdr->o_bit = 1;
+    }
+
+    if (inconsistent) {
+      if ((data_hdr->bitflag & RPL_DATA_R_BIT_MASK) >> RPL_DATA_R_BIT_SHIFT) {
+        /*  this is not the first time  */
+        /*  ditch this packet! */
+	call RouteInfo.inconsistency();
+        return FALSE;
+      } else {
+        /* just mark it */
+	data_hdr->bitflag |= 1 << RPL_DATA_R_BIT_SHIFT;
+        //data_hdr->r_bit = 1;
+	//chooseDesired();
+	//call RPLOF.recomputeRoutes();
+	//recaRank();
+	//getNewRank();
+	//call RouteInfo.inconsistency();
+	goto approve;
+      }
+    }
+
+  approve:
+    //printfUART("Approving: %d %d %d\n", data_hdr->senderRank, data_hdr->instance_id.id, inconsistent);
+    data_hdr->senderRank = nodeRank;
+    return TRUE;
+  }
+
+  /*  Compute ETX! */
+  event void ForwardingEvents.linkResult(struct in6_addr *node, struct send_info *info) {
+    uint8_t indexset;
+    uint8_t etx_now = info->link_transmissions;
+
+    //printfUART("linkResult: ");
+    //printfUART_in6addr(node);
+    //printfUART(" %d [%i]\n", TOS_NODE_ID, info->link_transmissions);
+
+    if(nodeRank == 1) { //root
+      return;
+    }
+
+    for (indexset = 0; indexset < MAX_PARENT; indexset++) {
+      if (parentSet[indexset].valid && 
+          compare_ipv6(&(parentSet[indexset].parentIP), node))
+	break;
+    }
+
+    if (indexset != MAX_PARENT) { // not empty...
+      parentSet[indexset].etx_hop = (parentSet[indexset].etx_hop * 5 + etx_now * 10 * 5) / 10;
+
+      if (exceedThreshold(indexset, METRICID)) {
+	evictParent(indexset);
+	if (indexset == desiredParent && parentNum > 0)
+	  call RPLOF.recomputeRoutes();
+      }
+
+      else if(etx_now > 1 && parentNum > 1){ // if a packet is not transmitted on its first try... see if there is something better...
+	//call RPLOF.recomputeRoutes();
+      }
+
+      getNewRank();
+
+      //printfUART(">> P_ETX UPDATE %d %d %d %d %d \n", indexset, parentSet[indexset].etx_hop, etx_now, ntohs(parentSet[indexset].parentIP.s6_addr16[7]), nodeRank);
+      return;
+    }
+    // not contained in either parent set, do nothing
+  }
+
+  /* old <= new, return true;  */
+  bool compareParent(parent_t oldP, parent_t newP) { 
+    return (oldP.etx_hop + oldP.etx) <= (newP.etx_hop + newP.etx);
+  }
+
+  /*
+  void performConsCheck() {
+    uint8_t indexset = 0;
+    for (indexset = 0; indexset < MAX_PARENT; indexset++) {
+      if (!checkConstraint(0, latencyConstraint, 
+                           parentSet[indexset].etx, etxConstraint, 
+                           METRICID, indexset)) {
+	parentSet[indexset].valid = FALSE;
+      }
+    }
+  }
+  */
+
+  void getNewRank(){
+    uint16_t prevRank = nodeRank;
+    bool newParent = FALSE;
+
+    newParent = call RPLOF.recalcualateRank();
+    nodeRank = call RPLOF.getRank();
+
+    if(newParent){
+      minRank = nodeRank;
+      return;
+    }
+
+    if(nodeRank < minRank)
+      minRank = nodeRank;
+
+    // did the node rank get worse than the limit? 
+    if (nodeRank > prevRank && 
+        nodeRank - minRank >= MAX_RANK_INCREASE && MAX_RANK_INCREASE != 0) {
+      // this is inconsistency!
+      //call RPLOF.recomputeRoutes();
+      printfUART("Inconsistent %d\n", TOS_NODE_ID);
+      nodeRank = INFINITE_RANK;
+      minRank = INFINITE_RANK;
+      call RouteInfo.inconsistency();
+      return;
+    }
+    evictAll();
+  }
+
+  void parseDIO(struct ip6_hdr *iph, struct dio_base_t *dio) { 
+    uint16_t pParentRank;
+    struct in6_addr rDODAGID;
+    uint16_t etx = 0xFFFF;
+    parent_t tempParent;
+    uint8_t parentIndex;
+    uint16_t preRank;
+    uint8_t tempPrf;
+    bool newDodag = FALSE;
+
+    struct dio_body_t* dio_body;
+    struct dio_metric_header_t* dio_metric_header;
+    struct dio_etx_t* dio_etx;
+    struct dio_dodag_config_t* dio_dodag_config;
+    struct dio_prefix_t* dio_prefix;
+    uint8_t* newPoint;
+    uint16_t trackLength = ntohs(iph->ip6_plen);
+
+    /* I am root */
+    if (nodeRank == 1) return; 
+
+    /* new iteration */
+    if (dio->version != VERSION && compare_ipv6(&dio->dodagID, &DODAGID)) {
+      //printfUART("new iteration!\n");
+      parentNum = 0;
+      VERSION = dio->version;
+      call RPLOF.resetRank();
+      nodeRank = INFINITE_RANK;
+      minRank = INFINITE_RANK;
+      minMetric = MAX_ETX;
+      desiredParent = MAX_PARENT;
+      resetValid();
+    }
+
+    //if (dio->dagRank >= nodeRank && nodeRank != INFINITE_RANK) return;
+
+    //printfUART("DIO in Rank %d %d %d %d\n", ntohs(iph->ip6_src.s6_addr16[7]), dio->dagRank, nodeRank, parentNum);
+    //printfUART_in6addr(&iph->ip6_src);
+    //printfUART("\n");
+    
+    pParentRank = dio->dagRank;
+    // DODAG ID in this DIO packet (received DODAGID)
+
+    memcpy(&rDODAGID, &dio->dodagID, sizeof(struct in6_addr));
+    tempPrf = dio->flags.flags_chunk & DIO_PREF_MASK;
+
+    if (!compare_ipv6(&DODAGID, &DODAG_MAX) && 
+        !compare_ipv6(&DODAGID, &rDODAGID)) { 
+      // I have a DODAG but this packet is from a new DODAG
+      if (Prf < tempPrf) { //ignore
+	//printfUART("LESS PREFERENCE IGNORE \n");
+	ignore = TRUE;
+	return;
+      } else if (Prf > tempPrf) { //move
+        //printfUART("MOVE TO NEW DODAG \n");
+	Prf = tempPrf;
+	memcpy(&DODAGID, &rDODAGID, sizeof(struct in6_addr));
+	parentNum = 0;
+	VERSION = dio->version;
+	call RPLOF.resetRank();
+	nodeRank = INFINITE_RANK;
+	minRank = INFINITE_RANK;
+	minMetric = MAX_ETX;
+	desiredParent = MAX_PARENT;
+	resetValid();
+      } else { // it depends
+        //printfUART("MOVE TO NEW DODAG %d %d\n",compare_ipv6(&DODAGID, &DODAG_MAX), compare_ipv6(&DODAGID, &rDODAGID));
+	//newDodag = TRUE;
+      }
+    } else if (compare_ipv6(&DODAGID, &DODAG_MAX)) { //not belong to a DODAG yet
+      //printfUART("TOTALLY NEW DODAG \n");
+      Prf = tempPrf;
+      memcpy(&DODAGID, &rDODAGID, sizeof(struct in6_addr));
+      parentNum = 0;
+      VERSION = dio->version;
+      call RPLOF.resetRank();
+      nodeRank = INFINITE_RANK;
+      minRank = INFINITE_RANK;
+      minMetric = MAX_ETX;
+      desiredParent = MAX_PARENT;
+      resetValid();
+    } else { // same DODAG
+      //printfUART("FROM SAME DODAG \n");
+      //Prf = tempPrf; // update prf
+    }
+
+    /////////////////////////////Collect data from DIOs/////////////////////////////////
+    trackLength -= sizeof(struct dio_base_t);
+    newPoint = (uint8_t*)(struct dio_base_t*)(dio + 1);
+    dio_body = (struct dio_body_t*) newPoint;
+
+    METRICID = 0;
+    OCP = 0;
+
+    // SDH : TODO : make some #defs for DODAG constants
+
+    if (dio_body->type == 2) { // this is metric
+
+      trackLength -= sizeof(struct dio_body_t);
+
+      newPoint = (uint8_t*)(struct dio_body_t*)(dio_body + 1);
+      dio_metric_header = (struct dio_metric_header_t*) newPoint;
+      trackLength -= sizeof(struct dio_metric_header_t);
+
+      if (dio_metric_header->routing_obj_type) {
+	// etx metric
+        // SDH : double cast
+	// newPoint = (uint8_t*)(struct dio_metric_header_t*)(dio_metric_header + 1);
+        newPoint = (uint8_t*)(dio_metric_header + 1);
+	dio_etx = (struct dio_etx_t*)newPoint;
+	trackLength -= sizeof(struct dio_etx_t);
+	etx = dio_etx->etx;
+	//printfUART("ETX RECV %d \n", etx);
+	METRICID = 7;
+	newPoint = (uint8_t*)(struct dio_etx_t*)(dio_etx + 1);
+      }
+    }else{
+      etx = pParentRank*10;
+      //printfUART("No ETX %d \n", dio_body->type);
+    }
+
+    /* SDH : what is type 3? */
+    dio_prefix = (struct dio_prefix_t*) newPoint;
+
+    if (trackLength > 0 && dio_prefix->type == 3) {
+      trackLength -= sizeof(struct dio_prefix_t);
+      if (ignore == FALSE){
+        /* SDH : this will be a call to NeighborDiscovery */
+        /* although we might want to make a PrefixManager component... */
+	// New Prefix!!!!
+	// TODO: Save prefix somewhere and make it a searchable command
+      }
+    }
+
+    /* SDH : type 4 is a configuration header. */
+    dio_dodag_config = (struct dio_dodag_config_t*) newPoint;
+
+    //printfUART("%d %d %d %d %d \n", trackLength, METRICID, dio_body->type, dio_prefix->type, dio_dodag_config->type);
+
+    if (trackLength > 0 && dio_dodag_config->type == 4) {
+      // this is configuration header
+      trackLength -= sizeof(struct dio_dodag_config_t);
+
+      //printfUART(" > %d %d %d %d %d \n", trackLength, METRICID, dio_dodag_config->type, ignore, dio_dodag_config->ocp);
+
+      if (ignore == FALSE) {
+
+	OCP = dio_dodag_config->ocp;
+
+	//printfUART("CONFIGURATION! %d %d %d \n", trackLength, ignore, dio_dodag_config->MaxRankInc);
+	MAX_RANK_INCREASE = dio_dodag_config->MaxRankInc;
+	call RouteInfo.setDODAGConfig(dio_dodag_config->DIOIntDoubl, 
+                                      dio_dodag_config->DIOIntMin, 
+				      dio_dodag_config->DIORedun, 
+                                      dio_dodag_config->MaxRankInc, 
+                                      dio_dodag_config->MinHopRankInc);
+	/*
+	printfUART("Doub %d, min %d, redun %d, maxrank %d, minhop %d \n", 
+		   dio_dodag_config->DIOIntDoubl, 
+		   dio_dodag_config->DIOIntMin, 
+		   dio_dodag_config->DIORedun, 
+		   dio_dodag_config->MaxRankInc, 
+		   dio_dodag_config->MinHopRankInc);
+        */
+      }
+    //printfUART("CONFIGURATION! %d %d %d %d %d\n", trackLength, ignore, dio_dodag_config->MaxRankInc, METRICID, OCP);
+      //OCP = 0; // temp for interop -- I know that Contiki is using OF0
+    }
+
+    ///////////////////////////////////////////////////////////////////////////////////
+
+    //printfUART("PR %d NR %d OCP %d MID %d \n", pParentRank, nodeRank, OCP, METRICID);
+
+    // temporaily keep the parent information first
+    memcpy(&tempParent.parentIP, &iph->ip6_src, sizeof(struct in6_addr)); //may be not right!!!
+    tempParent.rank = pParentRank;
+    tempParent.etx_hop = INIT_ETX;
+    tempParent.valid = TRUE;
+    tempParent.etx = etx;
+
+
+    if((!call RPLOF.objectSupported(METRICID) || !call RPLOF.OCP(OCP)) && parentNum == 0){
+      // either I dont know the metric object or I don't support the OF
+      printfUART("LEAF STATE! \n");
+      /*
+      Prf = tempPrf;
+      memcpy(&DODAGID, &rDODAGID, sizeof(struct in6_addr));
+      parentNum = 0;
+      VERSION = dio->version;
+      minMetric = MAX_ETX;
+      desiredParent = MAX_PARENT;
+      resetValid();
+      */
+      insertParent(tempParent);
+      call RPLOF.recomputeRoutes();
+      //getNewRank(); no need to compute routes when I am going to stay as a leaf!
+      nodeRank = INFINITE_RANK;
+      leafState = TRUE;
+      return;
+    }
+
+    if ((parentIndex = getParent(&iph->ip6_src)) != MAX_PARENT) { 
+      // parent already there and the rank is useful
+
+      //printfUART("HOW many parents 1 ? %d %d \n", parentNum, newDodag);
+
+      if(newDodag){
+	// old parent has to move to a new DODAG now
+	if (parentNum != 0) {
+	  //chooseDesired();
+	  call RPLOF.recomputeRoutes(); // we do this to make sure that this parent is still the best and it is worth moving
+	  
+	  if (!compareParent(parentSet[desiredParent], tempParent)) {
+	    // the new dodag is not from my desired parent node
+	    Prf = tempPrf;
+	    memcpy(&DODAGID, &rDODAGID, sizeof(struct in6_addr));
+	    parentNum = 0;
+	    VERSION = dio->version;
+	    minMetric = MAX_ETX;
+	    desiredParent = MAX_PARENT;
+	    resetValid();
+	    insertParent(tempParent);
+	    call RPLOF.recomputeRoutes();
+	    getNewRank();
+	  } else {
+	    // I have a better node in the current DODAG so I am not moving!
+	    call RPLOF.recomputeRoutes();
+	    getNewRank();
+	    ignore = TRUE;
+	  }
+	} else {
+	  // not likely to happen but this is a new DODAG...
+	  Prf = tempPrf;
+	  memcpy(&DODAGID, &rDODAGID, sizeof(struct in6_addr));
+	  parentNum = 0;
+	  VERSION = dio->version;
+	  minMetric = MAX_ETX;
+	  desiredParent = MAX_PARENT;
+	  resetValid();
+	  insertParent(tempParent);
+	  call RPLOF.recomputeRoutes();
+	  getNewRank();
+	}
+
+      }else{
+	// this DIO is just from a parent that I know already, update and re-evaluate
+	//printfUART("known parent -- update\n");
+	parentSet[parentIndex].rank = pParentRank; //update rank
+	parentSet[parentIndex].etx = etx;//pParentRank*10;
+	call RPLOF.recomputeRoutes();
+	getNewRank();
+	ignore = TRUE;
+      }
+
+    }else{
+      // this parent is not in my routing table
+
+      //printfUART("HOW many parents? %d \n", parentNum);
+
+      if(parentNum > MAX_PARENT) // ><><><><><>< how do i share the parent count?
+	return;
+
+      // at this point know that its a meaningful packet from a new node and we have space to store
+      
+      //printfUART("New parent %d %d %d\n", ntohs(iph->ip6_src.s6_addr16[7]), tempParent.etx_hop, parentNum);
+
+      if(newDodag){
+	// not only is this parent new but we have to move to a new DODAG now
+	//printfUART("New DODAG \n");
+	if (parentNum != 0) {
+	  call RPLOF.recomputeRoutes(); // make sure that I don't have an alternative path on this DODAG
+	  if (!compareParent(parentSet[desiredParent], tempParent)) {
+	    // parentIndex == desiredParent, parentNum != 0, !compareParent
+	    //printfUART("changing DODAG\n");
+	    Prf = tempPrf;
+	    memcpy(&DODAGID, &rDODAGID, sizeof(struct in6_addr));
+	    parentNum = 0;
+	    VERSION = dio->version;
+	    minMetric = MAX_ETX;
+	    desiredParent = MAX_PARENT;
+	    resetValid();
+	    insertParent(tempParent);
+	    call RPLOF.recomputeRoutes();
+	    getNewRank();
+	  } else {
+	    //do nothing
+	    ignore = TRUE;
+	  }
+	} else {
+	  // This is the first DODAG I am registering ... or the once before are all goners already
+	  //printfUART("First DODAG\n");
+	  Prf = tempPrf;
+	  memcpy(&DODAGID, &rDODAGID, sizeof(struct in6_addr));
+	  parentNum = 0;
+	  VERSION = dio->version;
+	  minMetric = MAX_ETX;
+	  desiredParent = MAX_PARENT;
+	  resetValid();
+	  insertParent(tempParent);
+	  call RPLOF.recomputeRoutes();
+	  getNewRank();
+	}
+      }else{
+	// its a new parent from the current DODAG .. so no need for DODAG configuarion just insert
+	//printfUART("Same DODAG %d \n", parentNum);
+	insertParent(tempParent);
+	call RPLOF.recomputeRoutes();
+	preRank = nodeRank;
+	getNewRank();
+      }
+    }
+  }
+
+  /* 
+   * Processing for incomming DIO, DAO, and DIS messages.
+   *
+   * SDH : we should not snoop on these from the forwarding engine;
+   * instead we now go through the IPProtocols component to receive
+   * them the normal way through the ICMP stack.  Things like
+   * verifying the checksum can go in there.
+   *
+   */
+  event void IP_DIO.recv(struct ip6_hdr *iph, void *payload, 
+                         size_t len, struct ip6_metadata *meta){
+    struct dio_base_t *dio;
+    dio = (struct dio_base_t *) payload;
+
+    if (!m_running) return;
+
+    //printfUART_in6addr(&iph->ip6_src);
+    //printfUART(" >  I GOT %d %d %d %d %d!!\n", iph->ip6_nxt, dio->icmpv6.code, dio->dagRank, nodeRank, parentNum);
+    if(nodeRank != 1)
+      parseDIO(iph, dio);
+
+    //leafState = FALSE;
+    if (nodeRank > dio->dagRank || dio->dagRank == INFINITE_RANK) {
+      if (!ignore) {
+        /* SDH : where did this go? */
+        signal IP_DIO_Filter.recv(iph, payload, len, meta);
+      }
+      ignore = FALSE;
+    }
+  }
+
+  command error_t IP_DIO_Filter.send(struct ip6_packet *msg) {
+    return call IP_DIO.send(msg);
+  }
+
+  event void IPAddress.changed(bool global_valid) {}
+}
diff --git a/tos/lib/net/rpl/RPLRoutingC.nc b/tos/lib/net/rpl/RPLRoutingC.nc
new file mode 100644
index 00000000..e54b0955
--- /dev/null
+++ b/tos/lib/net/rpl/RPLRoutingC.nc
@@ -0,0 +1,29 @@
+/* Top-level component to wire together the RPL layers */
+
+configuration RPLRoutingC {
+  provides {
+    interface StdControl;
+    interface RootControl;
+  }
+} implementation {
+  components RPLRankC;
+  components RPLRoutingEngineC;
+  components RPLDAORoutingEngineC;
+
+  /* we receive routing messages through the ICMP component, which
+     recieves all packets with the ICMP  */
+  components IPStackC;
+  components new ICMPCodeDispatchC(155) as ICMP_RA;
+
+  StdControl = RPLRoutingEngineC;
+  StdControl = RPLRankC;
+  /* Cancel below for no-downstream messages */
+  StdControl = RPLDAORoutingEngineC;
+  RootControl = RPLRoutingEngineC;
+
+  RPLRankC.ICMP_RA -> ICMP_RA;
+  RPLDAORoutingEngineC.ICMP_RA -> ICMP_RA;
+  IPStackC.RoutingControl -> RPLRoutingEngineC.StdControl;
+  IPStackC.RoutingControl -> RPLDAORoutingEngineC.StdControl;
+
+}
diff --git a/tos/lib/net/rpl/RPLRoutingEngine.nc b/tos/lib/net/rpl/RPLRoutingEngine.nc
new file mode 100644
index 00000000..7ded520a
--- /dev/null
+++ b/tos/lib/net/rpl/RPLRoutingEngine.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * RPLRoutingEngine.nc
+ * @ author JeongGil Ko (John) <jgko@cs.jhu.edu>
+ */
+
+#include <lib6lowpan/ip.h>
+#include <lib6lowpan/6lowpan.h>
+
+interface RPLRoutingEngine{
+  command void resetTrickle();
+  command bool hasDODAG();
+  command error_t getDefaultRoute(struct in6_addr *next_hop);
+  command uint16_t getRank();
+  command uint8_t getInstanceID();
+  command bool validInstance(uint8_t instanceID);
+  command struct in6_addr* getDodagId(); // returns the default dodagid
+  // below is called when sub type 4 DIOs are received
+  command void setDODAGConfig(uint8_t DIOIntDouble, uint8_t DIOIntMin, 
+			      uint8_t DIORedun, uint8_t MaxRankInc, uint8_t MinHopRankInc);
+
+  command uint8_t getMOP();
+  command void setDTSN(uint8_t dtsn);
+  command uint8_t getDTSN();
+
+  command void inconsistency();
+}
diff --git a/tos/lib/net/rpl/RPLRoutingEngineC.nc b/tos/lib/net/rpl/RPLRoutingEngineC.nc
new file mode 100644
index 00000000..89f6be2f
--- /dev/null
+++ b/tos/lib/net/rpl/RPLRoutingEngineC.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * RPLRoutingEngineC.nc
+ * @ author JeongGil Ko (John) <jgko@cs.jhu.edu>
+ */
+
+#include <RPL.h>
+
+configuration RPLRoutingEngineC{
+  provides {
+    interface RootControl;
+    interface StdControl;
+    interface RPLRoutingEngine; // This is for the ForwardingEngine to use
+  }
+}
+
+implementation{
+  components new RPLRoutingEngineP() as Routing;
+  components MainC, RandomC;
+  components new TimerMilliC() as TrickleTimer;
+  components new TimerMilliC() as InitDISTimer;
+  components new TimerMilliC() as VersionTimer;
+  components IPAddressC;
+  components LedsC, NoLedsC;
+  components RPLRankC as RankC;
+  components RPLDAORoutingEngineC;
+  components new ICMPCodeDispatchC(155) as ICMP_RS;
+
+  RootControl = Routing;
+  StdControl = Routing;
+  RPLRoutingEngine = Routing;
+
+  Routing.IP_DIO -> RankC.IP_DIO_Filter; // This should be connected to RankC;
+  Routing.IP_DIS -> ICMP_RS.IP[ICMPV6_CODE_DIS];
+  Routing.TrickleTimer -> TrickleTimer;
+  Routing.InitDISTimer -> InitDISTimer;
+  Routing.Random -> RandomC;
+  Routing.RPLRankInfo -> RankC;
+  Routing.IPAddress -> IPAddressC;
+  Routing.Leds -> LedsC;
+  Routing.RankControl -> RankC;
+  Routing.RPLDAORoutingEngine -> RPLDAORoutingEngineC;
+  Routing.IncreaseVersionTimer -> VersionTimer;
+}
diff --git a/tos/lib/net/rpl/RPLRoutingEngineP.nc b/tos/lib/net/rpl/RPLRoutingEngineP.nc
new file mode 100644
index 00000000..7438d9ca
--- /dev/null
+++ b/tos/lib/net/rpl/RPLRoutingEngineP.nc
@@ -0,0 +1,674 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * RPLRoutingEngineP.nc
+ * @ author JeongGil Ko (John) <jgko@cs.jhu.edu>
+ */
+
+#include <PrintfUART.h>
+#include <lib6lowpan/ip_malloc.h>
+#include <lib6lowpan/in_cksum.h>
+#include <lib6lowpan/ip.h>
+
+#include "RPL.h"
+
+generic module RPLRoutingEngineP(){
+  provides {
+    interface RootControl;
+    interface StdControl;
+    interface RPLRoutingEngine as RPLRouteInfo;
+  }
+  uses {
+    interface IP as IP_DIO;     /* filtered DIO messages from the rank engine */
+    interface IP as IP_DIS;     /* DIS messages from the ICMP driver */
+
+    interface Timer<TMilli> as TrickleTimer;
+    interface Timer<TMilli> as InitDISTimer;
+    interface Timer<TMilli> as IncreaseVersionTimer;
+    interface Random;
+    interface RPLRank as RPLRankInfo;
+    interface IPAddress;
+    interface Leds;
+    interface StdControl as RankControl;
+    interface RPLDAORoutingEngine;
+  }
+}
+
+implementation{
+
+#define RPL_GLOBALADDR
+  //#undef printfUART
+  //#define printfUART(X, args ...) ;
+
+  /* Declare Global Variables */
+  uint32_t tricklePeriod;
+  uint32_t randomTime;
+  bool sentDIOFlag = FALSE;
+  bool I_AM_ROOT = FALSE;
+  bool I_AM_LEAF = FALSE;
+  bool running = FALSE;
+  bool hasDODAG = FALSE;
+  bool riskHigh = FALSE;
+  uint16_t node_rank = INFINITE_RANK;
+  uint16_t LOWRANK = INFINITE_RANK;
+  uint8_t GROUND_STATE = 1;
+
+  uint8_t RPLInstanceID = 1;
+  struct in6_addr DODAGID;
+  uint8_t DODAGVersionNumber = 1;
+  uint8_t MOP = RPL_MOP_Storing_No_Multicast;
+  uint8_t DAG_PREF = 7;
+
+  uint8_t redunCounter = 0xFF;
+  uint8_t doubleCounter = 0;
+
+  uint8_t DIOIntDouble = 11;
+  uint8_t DIOIntMin = 8;
+  uint8_t DIORedun = 0xFF;
+  uint16_t MaxRankInc = 3;
+  uint16_t MinHopRankInc = 1;
+
+  uint8_t DTSN = 0;
+
+  uint32_t countdio = 0;
+  uint32_t countdis = 0;
+
+  bool UNICAST_DIO = FALSE;
+
+  struct in6_addr DEF_PREFIX;
+
+  struct in6_addr ADDR_MY_IP;
+  struct in6_addr ROOT_ADDR;
+  struct in6_addr MULTICAST_ADDR;
+  struct in6_addr UNICAST_DIO_ADDR;
+
+  /* Define Functions and Tasks */
+  void resetTrickleTime();
+  void chooseAdvertiseTime();
+  void computeTrickleRemaining();	
+  void nextTrickleTime();
+  void inconsistencyDetected();
+  void poison();
+  task void sendDIOTask();
+  task void sendDISTask();
+  task void init();
+  task void initDIO();
+
+  /* Start the routing with DIS message probing */
+  task void init(){
+#ifdef RPL_STORING_MODE
+    MOP = RPL_MOP_Storing_No_Multicast;
+#else
+    MOP = RPL_MOP_No_Storing;
+#endif
+
+#ifdef RPL_GLOBALADDR
+    call IPAddress.getGlobalAddr(&ADDR_MY_IP);
+#else
+    call IPAddress.getLLAddr(&ADDR_MY_IP);
+#endif
+
+    /* SDH : FF02::2 -- link-local all-routers group? */
+    memset(MULTICAST_ADDR.s6_addr, 0, 16);
+    MULTICAST_ADDR.s6_addr[0] = 0xFF;
+    MULTICAST_ADDR.s6_addr[1] = 0x2;
+    MULTICAST_ADDR.s6_addr[15] = 0x1A;
+
+    if (I_AM_ROOT) {
+#ifdef RPL_GLOBALADDR
+      call IPAddress.getGlobalAddr(&DODAGID);
+#else
+      call IPAddress.getLLAddr(&DODAGID);
+#endif
+      /* Global recovery every 60 mins */ 
+      //call IncreaseVersionTimer.startPeriodic(60*60*1024UL);
+      post initDIO();
+    } else {
+      call InitDISTimer.startPeriodic(DIS_INTERVAL);
+    }
+  }
+
+  /* When finding a DODAG post initDIO()*/
+  task void initDIO(){
+    if(I_AM_ROOT){
+      call RPLRouteInfo.resetTrickle();
+    }
+   }
+
+  task void computeRemaining(){
+    computeTrickleRemaining();
+  }
+
+  task void sendDIOTask(){
+    struct ip6_packet pkt;
+    struct ip_iovec   v[1];
+    uint8_t data[60];
+    struct dio_base_t msg;
+    struct dio_body_t body;
+    struct dio_metric_header_t metric_header;
+    struct dio_etx_t etx_value;
+    struct dio_dodag_config_t dodag_config;
+    uint16_t length;
+
+/*     struct in6_addr next_hop; */
+
+/*     if ((call RPLRankInfo.nextHop(&DEF_PREFIX, &next_hop)) != SUCCESS) */
+/*       return; */
+
+    if ((!running)  || (!hasDODAG) /* || ((redunCounter < DIORedun) && (DIORedun != 0xFF))*/ ){
+      //printfUART("NoTxDIO %d %d %d\n", redunCounter, DIORedun, hasDODAG);
+      return; 
+    }
+
+    call RPLDAORoutingEngine.startDAO();
+    // call IPAddress.setSource(&pkt.ip6_hdr);
+
+
+    msg.icmpv6.type = 155;//ICMP_TYPE_ROUTER_ADV; // Is this type correct?
+    msg.icmpv6.code = ICMPV6_CODE_DIO;
+    msg.icmpv6.checksum = 0;
+    msg.flags.flags_chunk = 0;
+    msg.flags.flags_chunk = GROUND_STATE << 7;
+    //msg.grounded = GROUND_STATE;
+    msg.flags.flags_chunk |= MOP << DIO_MOP_SHIFT;
+    //msg.mop = MOP;
+    msg.flags.flags_chunk |= DAG_PREF << 0;
+    //msg.dag_preference = DAG_PREF;
+    msg.version = DODAGVersionNumber;
+    msg.instance_id.id = RPLInstanceID;
+    msg.dtsn = DTSN;
+    memcpy(&msg.dodagID, &DODAGID, sizeof(struct in6_addr));
+    
+    if (I_AM_ROOT) {
+#ifdef RPL_GLOBALADDR
+      call IPAddress.getGlobalAddr(&DODAGID);
+#else
+      call IPAddress.getLLAddr(&DODAGID);
+#endif
+      msg.dagRank = ROOT_RANK;
+    } else {
+      msg.dagRank = call RPLRankInfo.getRank(&ADDR_MY_IP);
+    }
+    
+    if (!I_AM_LEAF) {
+      dodag_config.type = RPL_DODAG_CONFIG_TYPE;
+      dodag_config.length = 14;
+      dodag_config.A = 0; // no auth
+      dodag_config.PCS = 0;
+#ifdef RPL_OF_MRHOF
+      dodag_config.ocp = 1; //MRHOF
+#else
+      dodag_config.ocp = 0; //OF0
+#endif
+      dodag_config.default_lifetime = 6;  // six
+      dodag_config.lifetime_unit = 3600; // hours
+      dodag_config.DIOIntDoubl = DIOIntDouble;
+      dodag_config.DIOIntMin = DIOIntMin;
+      dodag_config.DIORedun = DIORedun;
+      dodag_config.MaxRankInc = MaxRankInc;
+      dodag_config.MinHopRankInc = MinHopRankInc;
+
+      // For now just go with etx as the only metric
+      etx_value.etx = call RPLRankInfo.getEtx();
+
+      metric_header.routing_obj_type = 7; // for etx
+      metric_header.reserved = 0;
+      metric_header.R_flag = 0;
+      metric_header.G_flag = 1;
+      metric_header.A_flag = 0; // aggregate!
+      metric_header.O_flag = 0;
+      metric_header.C_flag = 0;
+      metric_header.object_len = 1;
+
+      body.type = RPL_DODAG_METRIC_CONTAINER_TYPE; // metric container
+      body.container_len = 5;
+
+#ifdef RPL_OF_MRHOF
+      length = sizeof(struct dio_base_t) + sizeof(struct dio_body_t) + sizeof(struct dio_metric_header_t) + sizeof(struct dio_etx_t) + sizeof(struct dio_dodag_config_t);
+      memcpy(&data, &msg, sizeof(struct dio_base_t));
+      memcpy(&data+sizeof(struct dio_base_t), &body, sizeof(struct dio_body_t));
+      memcpy(&data+sizeof(struct dio_base_t)+sizeof(struct dio_body_t), &metric_header, sizeof(struct dio_metric_header_t));
+      memcpy(&data+sizeof(struct dio_base_t)+sizeof(struct dio_body_t)+sizeof(struct dio_metric_header_t), &etx_value, sizeof(struct dio_etx_t));
+      memcpy(&data+sizeof(struct dio_base_t)+sizeof(struct dio_body_t)+sizeof(struct dio_metric_header_t)+sizeof(struct dio_etx_t), &dodag_config, sizeof(struct dio_dodag_config_t));
+#else
+      length = sizeof(struct dio_base_t) + sizeof(struct dio_dodag_config_t); 
+      memcpy(&data, &msg, sizeof(struct dio_base_t));
+      memcpy(&data+sizeof(struct dio_base_t), &dodag_config, sizeof(struct dio_dodag_config_t));
+#endif
+
+      // TODO: add prefix info (optional)
+      v[0].iov_base = (uint8_t*)&data;
+      v[0].iov_len = length;
+      v[0].iov_next = NULL;
+
+      pkt.ip6_hdr.ip6_nxt = IANA_ICMP;
+      pkt.ip6_hdr.ip6_plen = htons(length);
+
+      pkt.ip6_data = &v[0];		
+
+      //iov_print(&v[0]);
+
+    } else {
+      length = sizeof(struct dio_base_t);
+      pkt.ip6_hdr.ip6_nxt = IANA_ICMP;
+      pkt.ip6_hdr.ip6_plen = htons(length);
+
+      v[0].iov_base = (uint8_t *)&msg;
+      v[0].iov_len  = sizeof(struct dio_base_t);
+      v[0].iov_next = NULL;
+
+      pkt.ip6_data = &v[0];		
+    }
+    /*
+    printfUART("\n >>>>>> TxDIO etx %d %d %d %lu \n", call RPLRankInfo.getEtx(),  \
+               ntohs(DODAGID.s6_addr16[7]), msg.dagRank, tricklePeriod);
+    */
+    printfUART(">> sendDIO %d %lu \n", TOS_NODE_ID, ++countdio);
+    printfUART("RANK %d %d %d\n", TOS_NODE_ID, call RPLRankInfo.getRank(&ADDR_MY_IP), call RPLRankInfo.getEtx());
+
+    if (UNICAST_DIO) {
+      UNICAST_DIO = FALSE;
+      memcpy(&pkt.ip6_hdr.ip6_dst, &UNICAST_DIO_ADDR, 16);
+    } else {
+      memcpy(&pkt.ip6_hdr.ip6_dst, &MULTICAST_ADDR, 16);
+    }
+    call IPAddress.getLLAddr(&pkt.ip6_hdr.ip6_src);
+    //call IPAddress.getGlobalAddr(&pkt.ip6_hdr.ip6_src);
+    // memcpy(&pkt.ip6_hdr.ip6_src, &ADDR_MY_IP, 16);
+
+    call IP_DIO.send(&pkt);
+  }
+
+  task void sendDISTask(){
+    struct ip6_packet pkt;
+    struct ip_iovec v[1];
+    struct dis_base_t msg;
+    uint16_t length;
+
+    if (!running) 
+      return;
+    
+    length = sizeof(struct dis_base_t);
+    msg.icmpv6.type = 155;//ICMP_TYPE_ROUTER_SOL; // router soicitation
+    msg.icmpv6.code = ICMPV6_CODE_DIS;
+    msg.icmpv6.checksum = 0;
+
+    // pkt.ip6_hdr.ip6_vfc = IPV6_VERSION;
+    pkt.ip6_hdr.ip6_nxt = IANA_ICMP;
+    pkt.ip6_hdr.ip6_plen = htons(length);
+
+    v[0].iov_base = (uint8_t *)&msg;
+    v[0].iov_len  = sizeof(struct dis_base_t);
+    v[0].iov_next = NULL;
+    pkt.ip6_data = &v[0];		
+
+    memcpy(&pkt.ip6_hdr.ip6_dst, &MULTICAST_ADDR, 16);
+    call IPAddress.getLLAddr(&pkt.ip6_hdr.ip6_src);
+    //call IPAddress.getGlobalAddr(&pkt.ip6_hdr.ip6_src);
+
+    //printfUART("\n >>>>>> TxDIS\n");
+    printfUART(">> sendDIS %d %lu \n", TOS_NODE_ID, ++countdis);
+
+    call IP_DIS.send(&pkt);
+  }
+
+  uint16_t INCONSISTENCY_COUNT = 0;
+
+  void inconsistencyDetected(){
+    // when inconsistency detected, reset trickle
+    INCONSISTENCY_COUNT ++;
+    call RPLRankInfo.inconsistencyDetected(/*&ADDR_MY_IP*/); // inconsistency on my on node detected?
+
+    /* JK: This reaction is TinyRPL specific -- to reduce the amount of DIO traffic -- helps when minmal leaf nodes exist */
+    call RPLRouteInfo.resetTrickle();
+    /* JK: Below is the Spec way of reacting to inconsistencies */
+    /*
+    if(call RPLRankInfo.hasParent())
+      call RPLRouteInfo.resetTrickle();
+    else{
+      call TrickleTimer.stop();
+      call InitDISTimer.startPeriodic(1024);
+    }
+    */
+  }
+
+  void poison(){
+    node_rank = INFINITE_RANK;
+    call RPLRouteInfo.resetTrickle();
+  }
+
+  void resetTrickleTime(){
+    call TrickleTimer.stop();
+    tricklePeriod = 2 << (DIOIntMin-1);
+    redunCounter = 0;
+    doubleCounter = 0;
+  }
+
+  void chooseAdvertiseTime(){
+    if(!running){
+      return;
+    }
+    randomTime = tricklePeriod;
+    randomTime /= 2;
+    randomTime += call Random.rand32() % randomTime;
+    call TrickleTimer.stop();
+    call TrickleTimer.startOneShot(randomTime);
+  }
+
+  void computeTrickleRemaining(){
+    // start timer for the remainder time (TricklePeriod - randomTime)
+    uint32_t remain;
+    remain = tricklePeriod - randomTime;
+    sentDIOFlag = TRUE;
+    call TrickleTimer.startOneShot(remain);
+  }
+
+  void nextTrickleTime(){
+    sentDIOFlag = FALSE;
+    if(doubleCounter < DIOIntDouble){
+      doubleCounter ++;
+      tricklePeriod *= 2;
+    }
+    if(!call TrickleTimer.isRunning())
+      chooseAdvertiseTime();
+  }
+
+  /********************* RPLRouteInfo *********************/
+  command void RPLRouteInfo.inconsistency(){
+    inconsistencyDetected();
+  }
+
+  command bool RPLRouteInfo.hasDODAG() {
+    return hasDODAG;
+  }
+
+  command uint8_t RPLRouteInfo.getMOP() {
+    return MOP;
+  }
+
+  command error_t RPLRouteInfo.getDefaultRoute(struct in6_addr *next) {
+    return call RPLRankInfo.getDefaultRoute(next);
+  }
+
+  command void RPLRouteInfo.setDODAGConfig(uint8_t IntDouble, 
+					   uint8_t IntMin, 
+					   uint8_t Redun, 
+					   uint8_t RankInc,
+					   uint8_t HopRankInc) {
+    DIOIntDouble = IntDouble;
+    DIOIntMin = IntMin;
+    DIORedun = Redun;
+    MaxRankInc = RankInc;
+    MinHopRankInc = HopRankInc;
+    //printfUART("Config %d %d %d %d %d \n", IntDouble, IntMin, Redun, RankInc, HopRankInc);
+  }
+
+  command struct in6_addr* RPLRouteInfo.getDodagId(){
+    return &DODAGID;
+  }
+
+  command uint8_t RPLRouteInfo.getInstanceID(){
+    return RPLInstanceID;
+  }
+
+  command bool RPLRouteInfo.validInstance(uint8_t instanceID){
+    return call RPLRankInfo.validInstance(instanceID);
+  }
+
+  command void RPLRouteInfo.resetTrickle(){
+    resetTrickleTime();
+    if(!call TrickleTimer.isRunning())
+      chooseAdvertiseTime();
+  }
+
+  command uint16_t RPLRouteInfo.getRank(){
+    return call RPLRankInfo.getRank(&ADDR_MY_IP);
+  }
+
+  command void RPLRouteInfo.setDTSN(uint8_t dtsn){
+    DTSN = dtsn;
+  }
+
+  command uint8_t RPLRouteInfo.getDTSN(){
+    return DTSN;
+  }
+
+  /********************* RootControl *********************/
+  command error_t RootControl.setRoot() {
+    I_AM_ROOT = TRUE;
+    hasDODAG = TRUE;
+    call RPLRankInfo.declareRoot();
+    return SUCCESS;
+  }
+
+  command error_t RootControl.unsetRoot() {
+    I_AM_ROOT = FALSE;
+    hasDODAG = FALSE;
+    call RPLRankInfo.cancelRoot();
+    return SUCCESS;
+  }
+
+  command bool RootControl.isRoot(){
+    return I_AM_ROOT;
+  }
+
+  /********************* StdControl *********************/
+  command error_t StdControl.start() {
+    //printfUART("RPL STARTING\n");
+    if(!running){
+      post init();
+      call RankControl.start();
+      running = TRUE;
+    }
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    running = FALSE;
+    call RankControl.start();
+    call TrickleTimer.stop();
+    return SUCCESS;
+  }
+
+  event void InitDISTimer.fired() {
+    post sendDISTask();
+  }
+
+  event void IncreaseVersionTimer.fired(){
+    printfUART(">>>> Version Increase!! \n");
+    DODAGVersionNumber++;
+    call RPLRouteInfo.resetTrickle();
+  }
+
+  event void TrickleTimer.fired() {
+    if (sentDIOFlag) {
+      // DIO is already sent and trickle period has passed 
+      // increase tricklePeriod
+      nextTrickleTime();
+    } else {
+      // send DIO, randomly selected time has passed
+      // compute the remaining time
+      // Change back to DIO
+      post sendDIOTask();
+      //post sendDISTask();
+      post computeRemaining();
+    }
+  }
+
+  bool compare_ip6_addr(struct in6_addr *node1, struct in6_addr *node2) { //done
+    return !memcmp(node1, node2, sizeof(struct in6_addr));
+  }
+
+  event void RPLRankInfo.parentRankChange(){
+    // type 6 inconsistency
+    inconsistencyDetected();
+  }
+
+  /* SDH :
+   * This is called to process new routing update messages, I think.
+   */
+  event void IP_DIS.recv(struct ip6_hdr *iph, void *payload, 
+                         size_t len, struct ip6_metadata *meta) {
+    printfUART("Receiving DIS %d\n", TOS_NODE_ID);
+    if (!running) return;
+    // I received a DIS
+    if (I_AM_LEAF) {
+      // I am a leaf so don't do anything
+      return;
+    }
+
+    if (call IPAddress.isLocalAddress(&iph->ip6_dst)) {
+      // This is a multicast message: reset Trickle
+      if(iph->ip6_dst.s6_addr[0] == 0xff && 
+         ((iph->ip6_dst.s6_addr[1] & 0xf) <= 0x3)) {
+        call RPLRouteInfo.resetTrickle();
+      } else {
+        UNICAST_DIO = TRUE;
+        memcpy(&UNICAST_DIO_ADDR, &(iph->ip6_src), sizeof(struct in6_addr));
+        post sendDIOTask();
+      }
+    }
+  }
+
+  event void IP_DIO.recv(struct ip6_hdr *iph, void *payload, 
+                         size_t len, struct ip6_metadata *meta) {
+    struct dio_base_t *dio = (struct dio_base_t *)payload;
+    if (!running) return;
+
+    if (I_AM_ROOT) {
+      return;
+    }
+
+    if (DIORedun != 0xFF) {
+      redunCounter ++;
+    } else {
+      redunCounter = 0xFF;
+    }
+
+    /* JK: The if() statement below is TinyRPL specific and ties up with the inconsistencyDectect case above */
+    if(dio->dagRank == INFINITE_RANK){
+      if(call RPLRankInfo.getRank(&ADDR_MY_IP) != INFINITE_RANK && (call InitDISTimer.getNow()%2) == 1){ // send DIO if I can help!
+	printfUART("Infinite Rank RX %d\n", TOS_NODE_ID);
+	post sendDIOTask();
+      }
+      return;
+    }
+
+    if (call RPLRankInfo.hasParent() && call InitDISTimer.isRunning()) {
+      call InitDISTimer.stop(); // no need for DIS messages anymore
+    }
+
+    // received DIO message
+    I_AM_LEAF = call RPLRankInfo.isLeaf();
+
+    if ((I_AM_LEAF && !hasDODAG)
+        || !compare_ip6_addr(&DODAGID,&dio->dodagID)) {
+      // If I am leaf I do not send any DIO messages
+      // assume that this DIO is from the DODAG with the
+      // highest preference and is the preferred parent's DIO packet?
+      //   OR
+      // If a new DODAGID is reported probably the Rank layer
+      // already took care of all the operations and decided to switch to the
+      // new DODAGID
+      //printfUART("FOUND new dodag %d %d %d\n", I_AM_LEAF, hasDODAG, compare_ip6_addr(&DODAGID,&dio->dodagID));
+      hasDODAG = TRUE;
+      // assume that this DIO is from the DODAG with the
+      // highest preference and is the preferred parent's DIO packet?
+      goto accept_dodag;
+    }
+    
+    if (RPLInstanceID == dio->instance_id.id && 
+        compare_ip6_addr(&DODAGID, &dio->dodagID) && 
+        DODAGVersionNumber != dio->version && 
+        hasDODAG) {
+      // sequence number has changed - new iteration; restart the
+      // trickle timer and configure DIO with new sequence number
+      
+      //printfUART("New iteration %d %d %d\n", dio->instance_id.id, dio->version, I_AM_LEAF);
+      DODAGVersionNumber = dio->version;
+      call RPLRouteInfo.resetTrickle();
+
+      // type 3 inconsistency
+    } else if (call RPLRankInfo.getRank(&ADDR_MY_IP) != node_rank && 
+               hasDODAG && 
+               node_rank != INFINITE_RANK) {
+      /*  inconsistency detected! because rank is not what I previously advertised */
+      //printfUART("ICD %d\n", node_rank);
+      // DO I Still need this?
+      if (call RPLRankInfo.getRank(&ADDR_MY_IP) > LOWRANK + MaxRankInc && 
+          node_rank != INFINITE_RANK) {
+        hasDODAG = FALSE;
+        node_rank = INFINITE_RANK;
+      } else {
+        if (LOWRANK > call RPLRankInfo.getRank(&ADDR_MY_IP)) {
+          LOWRANK = call RPLRankInfo.getRank(&ADDR_MY_IP);
+        }
+        node_rank = call RPLRankInfo.getRank(&ADDR_MY_IP);
+      }
+      // type 2 inconsistency
+      inconsistencyDetected();
+      return;
+    }
+    
+    if (call RPLRankInfo.hasParent() && !hasDODAG) {
+      goto accept_dodag;
+    } else if (!call RPLRankInfo.hasParent() && !I_AM_ROOT) {
+      /*  this else if can lead to errors!! */
+      /*  I have no parent at this point! */
+      //printfUART("noparent %d %d\n", node_rank, call RPLRankInfo.hasParent());
+      hasDODAG = FALSE;
+      GROUND_STATE = dio->flags.flags_chunk & DIO_GROUNDED_MASK;
+      //GROUND_STATE = dio->flags.flags_element.grounded;
+      call TrickleTimer.stop();
+      // new add
+      call RPLRouteInfo.resetTrickle();
+    }
+    return;
+  accept_dodag:
+    //printfUART("new dodag \n");
+    // assume that this DIO is from the DODAG with the
+    // highest preference and is the preferred parent's DIO packet?
+    hasDODAG = TRUE;
+    MOP = (dio->flags.flags_chunk & DIO_MOP_MASK) >> DIO_MOP_SHIFT;
+    DAG_PREF = dio->flags.flags_chunk & DIO_PREF_MASK;
+    RPLInstanceID = dio->instance_id.id;
+    memcpy(&DODAGID, &dio->dodagID, sizeof(struct in6_addr));
+    DODAGVersionNumber = dio->version;
+    GROUND_STATE = dio->flags.flags_chunk & DIO_GROUNDED_MASK;
+    //GROUND_STATE = dio->flags.flags_element.grounded;
+    call RPLRouteInfo.resetTrickle();
+    return;
+  }
+
+  event void IPAddress.changed(bool global_valid) {}
+
+}
diff --git a/tos/lib/net/srp/SourceRouteEngine.h b/tos/lib/net/srp/SourceRouteEngine.h
new file mode 100644
index 00000000..438884e4
--- /dev/null
+++ b/tos/lib/net/srp/SourceRouteEngine.h
@@ -0,0 +1,44 @@
+/*
+* Copyright (c) 2010 Johns Hopkins University.
+* All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+#ifndef SRCROUTEENGINE_H
+#define SRCROUTEENGINE_H
+
+//len == msg len including sr header. len is set to payload len + header on send, not altered during forwarding
+typedef struct { 
+  message_t* msg;
+  uint8_t len;
+  uint8_t client;
+} srf_queue_entry_t;
+
+#endif
diff --git a/tos/lib/net/srp/SourceRouteEngineC.nc b/tos/lib/net/srp/SourceRouteEngineC.nc
new file mode 100644
index 00000000..e3ed58be
--- /dev/null
+++ b/tos/lib/net/srp/SourceRouteEngineC.nc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Doug Carlson
+ */
+
+#include "SourceRouteEngine.h"
+
+generic configuration SourceRouteEngineC(am_id_t AMId) {
+  provides {
+    interface StdControl;
+    interface SourceRouteSend[uint8_t client];
+    interface SourceRoutePacket;
+    interface Receive[sourceroute_id_t id];
+  }
+  uses {
+    interface SourceRouteId[uint8_t client];
+  }
+}
+implementation {
+  enum {
+    CLIENT_COUNT = uniqueCount(UQ_SRP_CLIENT),
+    FORWARD_COUNT = 12,
+    QUEUE_SIZE = CLIENT_COUNT + FORWARD_COUNT,
+  };
+  components MainC;
+
+  components new AMSenderC(AMId) as SubSend;
+  components new AMReceiverC(AMId) as SubReceive;
+  components ActiveMessageC; 
+
+  components SourceRouteEngineP as Engine;
+  
+  components new QueueC(srf_queue_entry_t*, QUEUE_SIZE) as SendQueue;
+  components new PoolC(srf_queue_entry_t, FORWARD_COUNT) as QEntryPool;
+  components new PoolC(message_t, FORWARD_COUNT) as MessagePool;
+
+  Engine.SubReceive -> SubReceive;
+  Engine.SubSend -> SubSend;
+  Engine.SubControl -> ActiveMessageC;
+  Engine.SendQueue -> SendQueue;
+  Engine.QEntryPool -> QEntryPool;
+  Engine.MessagePool -> MessagePool;
+  MainC.SoftwareInit -> Engine.Init;
+
+  StdControl = Engine;
+  SourceRouteSend = Engine;
+  SourceRoutePacket = Engine;
+  Receive = Engine;
+
+  Engine.SourceRouteId = SourceRouteId;
+
+}
diff --git a/tos/lib/net/srp/SourceRouteEngineP.nc b/tos/lib/net/srp/SourceRouteEngineP.nc
new file mode 100644
index 00000000..37c93112
--- /dev/null
+++ b/tos/lib/net/srp/SourceRouteEngineP.nc
@@ -0,0 +1,396 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Doug Carlson
+ */
+
+#include "SourceRouteEngine.h"
+
+module SourceRouteEngineP {
+  provides {
+    interface StdControl;
+    interface SourceRouteSend[uint8_t client];
+    interface SourceRoutePacket;
+    interface Receive[sourceroute_id_t id];
+    interface Init;
+  }
+  uses {
+    interface SourceRouteId[uint8_t client];
+    interface AMSend as SubSend;
+    interface Receive as SubReceive;
+    
+    interface Queue<srf_queue_entry_t*> as SendQueue;
+    interface Pool<srf_queue_entry_t> as QEntryPool;
+    interface Pool<message_t> as MessagePool;
+
+    interface SplitControl as SubControl;
+  }
+}
+implementation {
+  enum{
+    CLIENT_COUNT = uniqueCount(UQ_SRP_CLIENT),
+    FORWARD_CLIENT = 0xff,
+  };
+
+  //Forwarding engine states
+  enum {
+    S_OFF = 0,
+    S_IDLE = 1,
+    S_SENDING = 2,
+    S_ERROR = 3,
+  };
+
+  //client states
+  enum{
+    SC_IDLE = 0,
+    SC_SENDING = 1,
+  };
+
+  //forwarding engine state var
+  uint8_t state = S_OFF;
+  uint8_t seqno;
+
+  //client variables
+  //static space for clients
+  srf_queue_entry_t clientEntries[CLIENT_COUNT];
+  //client statuses
+  uint8_t clientStatus[CLIENT_COUNT];  
+  
+  sr_header_t* getSRPHeader(message_t* msg);
+
+  void printSRPHeader(sr_header_t* hdr) {
+    dbg("SRPDebug", "header %p srlen %d hops_left %d seqno %d payload_id %d\n", hdr, hdr->sr_len, hdr->hops_left, hdr->seqno, hdr->payload_id);
+  }
+  
+  void printQE(srf_queue_entry_t* qe) {
+    dbg("SRPDebug", "QE: msg %p len %d client %d\n", qe->msg, qe->len, qe->client);
+  }  
+
+  command error_t Init.init(){
+    uint8_t i;
+    for (i=0; i < CLIENT_COUNT; i++) {
+      clientEntries[i].client = i;
+    }
+    return SUCCESS;
+  }
+
+  void setState(uint8_t s) {
+    if (state != S_ERROR) {
+      dbg("SRPDebug", "setState %d -> %d\n", state, s);
+      state = s;
+    } else {
+      dbg("SRPDebug", "setState Ignore %d -> %d\n", state, s);
+    }
+  }
+
+  task void sendTask() {
+    srf_queue_entry_t* qe;
+    error_t err;
+    dbg("SRPDebug", "sendTask\n");
+    if (state == S_IDLE) {
+      dbg("SRPDebug", "state OK\n");
+      if (call SendQueue.size() == 0) {
+        dbg("SRPDebug", "queue empty\n");
+        return;
+      } else {
+        dbg("SRPDebug", "queue not  empty\n");
+        state = S_SENDING;
+        qe = call SendQueue.head();
+        printQE(qe);
+        dbg("SRPInfo", "Sending QE %p msg %p to %d. src %d dest %d seqno %d\n", qe, qe->msg, call SourceRoutePacket.getNextHop(qe->msg), (call SourceRoutePacket.getRoute(qe->msg))[0], call SourceRoutePacket.getDest(qe->msg), getSRPHeader(qe->msg)->seqno);
+        err = call SubSend.send(call SourceRoutePacket.getNextHop(qe->msg), qe -> msg, qe->len);
+        if ( err == SUCCESS ) {
+          dbg("SRPDebug", "sendTask subsend OK\n"); 
+        } else {
+          dbg("SRPError", "ERROR sendTask subsend failed\n");
+          //clean up from failed send. signal local clients or drop forwarding packets
+          state = S_IDLE;
+          if (qe->client != FORWARD_CLIENT) {
+            clientStatus[qe->client] = SC_IDLE;
+            signal SourceRouteSend.sendDone[qe->client](qe->msg, FAIL);
+          }
+          call SendQueue.dequeue();
+        }
+      }
+    } else {
+      dbg("SRPDebug", "sendTask: skipping (in state %d)\n", state);
+    }
+  }
+
+  /**
+   * SourceRouteSend commands
+   */
+  command error_t SourceRouteSend.send[uint8_t client](am_addr_t *path, uint8_t pathLen, message_t* msg, uint8_t len) {
+    sr_header_t* hdr; 
+    //NOTE this is only here for the workaround required due to nx_am_addr v. am_addr in SourceRoutePacket
+    nx_am_addr_t nxPath[SRP_MAX_PATHLEN];
+    uint8_t i;
+    dbg("SRPDebug", "Send from %d %p\n", client, msg);
+
+    if (state == S_OFF) {
+      return EOFF;
+    }
+    //busy/fail if client is already sending or no space
+    if (clientStatus[client] == SC_SENDING) {
+      return EBUSY;
+    } 
+    if ( call SendQueue.size() == call SendQueue.maxSize() ) {
+      return FAIL;
+    }
+
+    //NOTE: setting route is unsafe with memcpy as-is (am_addr_t vs nx_am_addr_t)
+    //would like to do:
+    //  call SourceRoutePacket.setRoute(msg, path, pathLen);
+    //this is the workaround until SourceRoutePacket.setRoute signature changes
+    for (i = 0; i < pathLen; i++) {
+      nxPath[i] = path[i];
+    }
+    call SourceRoutePacket.setRoute(msg, nxPath, pathLen);
+
+    hdr = getSRPHeader(msg);
+    hdr -> payload_id = call SourceRouteId.fetch[client]();
+    hdr -> seqno = seqno++;
+    
+    //set hops_left to path length - 2 (NOTE e.g. one-hop path has S, D is of length 2. when a packet is received with hops_left = 0, it is at the destination)
+    hdr -> hops_left = pathLen - 2;
+    
+    clientStatus[client] = SC_SENDING;
+    if (call SendQueue.enqueue(&clientEntries[client]) == SUCCESS) {
+      clientEntries[client].msg = msg;
+      //NOTE: variable-length path will change this
+      clientEntries[client].len = len + sizeof(sr_header_t);
+      post sendTask();
+      printSRPHeader(hdr);
+      return SUCCESS;
+    } else {
+      clientStatus[client] = SC_IDLE;
+      return FAIL;
+    }
+  }
+
+  command void* SourceRouteSend.getPayload[uint8_t client](message_t* msg, uint8_t len) {
+    if (len > call SourceRouteSend.maxPayloadLength[client]()) {
+      return NULL;
+    } else {
+      return call SubSend.getPayload(msg, len + sizeof(sr_header_t)) + sizeof(sr_header_t);
+    }
+  }
+
+  command uint8_t SourceRouteSend.maxPayloadLength[uint8_t client]() {
+    return call SubSend.maxPayloadLength() - sizeof(sr_header_t);
+  }
+
+  command error_t SourceRouteSend.cancel[uint8_t client](message_t* msg) {
+    //TODO: SourceRouteSend.cancel: find msg in queue and remove it if possible
+    return FAIL;
+  }
+
+  /**
+   * SubSend
+   */
+  event void SubSend.sendDone(message_t* msg, error_t err) {
+    srf_queue_entry_t* qe;
+    dbg("SRPDebug", "SubSend.sendDone %d %p\n",err, msg);
+    if (state != S_SENDING) {
+      dbg("SRPError", "ERROR bad state: %d\n", state);
+      setState(S_ERROR);
+    }  else {
+      state = S_IDLE;
+      qe = call SendQueue.dequeue();
+
+      if (qe -> msg != msg ) {
+        dbg("SRPError", "ERROR queue message != sent message %p != %p \n", msg, qe->msg);
+        setState(S_ERROR);
+        return;
+      }
+
+      if (! call SendQueue.empty()) {
+        post sendTask();
+      }
+
+      if (qe -> client == FORWARD_CLIENT) {
+        dbg("SRPDebug", "Finished forwarding qe %p msg %p, put them back in pools\n", qe, msg);
+        call MessagePool.put(msg);
+        call QEntryPool.put(qe);
+      } else {
+        dbg("SRPDebug", "Finished sending for %d\n", qe->client);
+        clientStatus[qe->client] = SC_IDLE;
+        signal SourceRouteSend.sendDone[qe->client](msg, err);
+      } 
+    } 
+    dbg("SRPInfo","After SendDone: state %d SendQueue len %d, QEPool size %d, MsgPool size %d\n", state, call SendQueue.size(), call QEntryPool.size(), call MessagePool.size());
+  }
+
+  /**
+   * SubReceive
+   */
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+     sr_header_t* hdr;
+     srf_queue_entry_t* qe;
+
+     dbg("SRPDebug", "receive m %p p %p l %d\n", msg, payload, len);
+     hdr = getSRPHeader(msg);
+     printSRPHeader(hdr);
+     //remove header/signal up
+     if (hdr -> hops_left == 0) {
+       return signal Receive.receive[hdr -> payload_id](msg, call SourceRouteSend.getPayload[0](msg, len - sizeof(sr_header_t)), len - sizeof(sr_header_t));
+     } else {
+       dbg("SRPDebug", "forwarding %p\n", msg);
+       if ( call SendQueue.size() < call SendQueue.maxSize() 
+            && ! call MessagePool.empty() 
+            && ! call QEntryPool.empty() ) {
+         hdr-> hops_left--;
+         qe = call QEntryPool.get();
+         qe -> client = FORWARD_CLIENT;
+         qe -> len = len;
+         qe -> msg = msg;
+         call SendQueue.enqueue(qe);
+         post sendTask();
+         return call MessagePool.get();
+       } else {
+         dbg("SRPError", "ERROR queue full or message pool empty or queue entry pool empty\n");
+         return msg;
+       }
+     }
+  }
+
+
+  /**
+   * SourceRoutePacket commands
+   */
+  sr_header_t* getSRPHeader(message_t* msg) {
+    sr_header_t* ret = (sr_header_t*)call SubSend.getPayload(msg, sizeof(sr_header_t));
+    return ret;
+  }
+
+  command error_t SourceRoutePacket.clearRoute(message_t *msg) {
+    //NOTE that if the route goes in the footer or is variable-length, we can't safely overwrite the values in it (space might be used for payload). 
+    memset(getSRPHeader(msg)->route, 0, sizeof(nx_am_addr_t)*SRP_MAX_PATHLEN);
+    getSRPHeader(msg)->sr_len = 0; 
+    return SUCCESS;
+  }
+
+  command error_t SourceRoutePacket.setRoute(message_t *msg, nx_am_addr_t *path, uint8_t len) {
+    sr_header_t* hdr = getSRPHeader(msg);
+    hdr -> sr_len = len;
+    memcpy(hdr->route, path, len * sizeof(nx_am_addr_t));
+    return FAIL;
+  }
+
+  command nx_am_addr_t* SourceRoutePacket.getRoute(message_t *msg) {
+    return getSRPHeader(msg) -> route;
+  }
+  
+  command uint8_t SourceRoutePacket.getRouteLen(message_t *msg) {
+    return getSRPHeader(msg) -> sr_len;
+  }
+
+  command error_t SourceRoutePacket.setRouteLen(message_t *msg, uint8_t len) {
+    getSRPHeader(msg) -> sr_len = len;
+    return SUCCESS;
+  }
+
+  //NOTE: The hops_left field is decremented when the packet is enqueued (i.e. at forward, not at sendTask)
+  //NOTE: When a packet reaches the destination, hops_left is 0.
+  //NOTE: So, getNextHop should return the destination addr when hops_left is 0.
+  command am_addr_t SourceRoutePacket.getNextHop(message_t *msg) {
+    sr_header_t* hdr = getSRPHeader(msg);
+    return (call SourceRoutePacket.getRoute(msg))[hdr->sr_len - 1 - hdr->hops_left ];
+  }
+
+  command am_addr_t SourceRoutePacket.getDest(message_t *msg) {
+    sr_header_t* hdr = getSRPHeader(msg);
+    return (call SourceRoutePacket.getRoute(msg))[hdr->sr_len - 1];
+  }
+  
+  command am_addr_t SourceRoutePacket.getSource(message_t *msg) {
+    sr_header_t* hdr = getSRPHeader(msg);
+    return (call SourceRoutePacket.getRoute(msg))[0];
+  }
+  
+  command uint8_t SourceRoutePacket.getHopsLeft(message_t *msg) {
+    sr_header_t* hdr = getSRPHeader(msg);
+    return hdr->hops_left ;
+  }
+
+  command error_t SourceRoutePacket.setHopsLeft(message_t *msg, uint8_t hopsLeft) {
+    getSRPHeader(msg) -> hops_left = hopsLeft;
+    return SUCCESS;
+  }
+  
+  command uint8_t SourceRoutePacket.getSeqNo(message_t *msg) {
+    return getSRPHeader(msg) -> seqno;
+  }
+
+  /**
+   * StdControl commands. should it be splitcontrol?
+   */
+  command error_t StdControl.start() {
+    setState(S_IDLE);
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    setState(S_OFF);
+    return SUCCESS;
+  }
+
+  /**
+   *  SubControl events. 
+   */
+  event void SubControl.startDone(error_t error) {
+    setState(S_IDLE);
+    //OK to start forwarding.
+  }
+
+  event void SubControl.stopDone(error_t error) {
+    setState(S_OFF);
+    //stop forwarding: should tell clients that the radio is off?
+  }
+
+  /** 
+   *  Defaults
+   */
+  default event void SourceRouteSend.sendDone[uint8_t client](message_t *msg, error_t error) {
+  }
+	  
+  default event message_t *
+  Receive.receive[sourceroute_id_t sourcerouteid](message_t *msg, void *payload, uint8_t len) {
+    return msg;
+  }
+
+  default command sourceroute_id_t SourceRouteId.fetch[uint8_t client]() {
+    return 0;
+  }
+
+}
diff --git a/tos/lib/net/srp/SourceRouteId.nc b/tos/lib/net/srp/SourceRouteId.nc
new file mode 100644
index 00000000..ffcb93bb
--- /dev/null
+++ b/tos/lib/net/srp/SourceRouteId.nc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Doug Carlson
+ */
+
+interface SourceRouteId {
+  command sourceroute_id_t fetch();
+}
diff --git a/tos/lib/net/srp/SourceRouteIdP.nc b/tos/lib/net/srp/SourceRouteIdP.nc
new file mode 100644
index 00000000..c430ba44
--- /dev/null
+++ b/tos/lib/net/srp/SourceRouteIdP.nc
@@ -0,0 +1,46 @@
+/**
+ * Copyright (c) 2010 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Doug Carlson
+ */
+
+generic module SourceRouteIdP(sourceroute_id_t id) {
+  provides {
+    interface SourceRouteId;
+  }
+}
+implementation {
+  command sourceroute_id_t SourceRouteId.fetch() {
+    return id;
+  }
+}
diff --git a/tos/lib/net/srp/SourceRoutePacket.nc b/tos/lib/net/srp/SourceRoutePacket.nc
new file mode 100644
index 00000000..d1932f5e
--- /dev/null
+++ b/tos/lib/net/srp/SourceRoutePacket.nc
@@ -0,0 +1,59 @@
+// $Id: LqiForwardingEngineP.nc,v 1.16 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2010 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Omprakash Gnawali
+ */
+
+
+/* applications use this interface to get/set metadata for source routing */
+
+  interface SourceRoutePacket
+  {
+    command error_t clearRoute(message_t *msg);
+
+    //NOTE: mismatch with SourceRouteSend.send (nx_am_addr_t vs. am_addr_t)
+    command error_t setRoute(message_t *msg, nx_am_addr_t *path, uint8_t len);
+    command nx_am_addr_t* getRoute(message_t *msg);
+
+    command uint8_t getRouteLen(message_t *msg);
+    command error_t setRouteLen(message_t *msg, uint8_t len);
+
+    command am_addr_t getNextHop(message_t *msg);
+    command am_addr_t getDest(message_t *msg);
+    command am_addr_t getSource(message_t *msg);
+
+    command uint8_t getHopsLeft(message_t *msg);
+    command error_t setHopsLeft(message_t *msg, uint8_t hopsLeft);
+    
+    command uint8_t getSeqNo(message_t *msg);
+  }
diff --git a/tos/lib/net/srp/SourceRouteReceiverC.nc b/tos/lib/net/srp/SourceRouteReceiverC.nc
new file mode 100644
index 00000000..659d956a
--- /dev/null
+++ b/tos/lib/net/srp/SourceRouteReceiverC.nc
@@ -0,0 +1,46 @@
+/**
+ * Copyright (c) 2010 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Doug Carlson
+ */
+
+generic configuration SourceRouteReceiverC(sourceroute_id_t srID) {
+  provides {
+    interface Receive;
+  }
+}
+implementation {
+  components SourceRoutingC;
+
+  Receive = SourceRoutingC.Receive[srID];
+}
diff --git a/tos/lib/net/srp/SourceRouteSend.nc b/tos/lib/net/srp/SourceRouteSend.nc
new file mode 100644
index 00000000..42d7119f
--- /dev/null
+++ b/tos/lib/net/srp/SourceRouteSend.nc
@@ -0,0 +1,49 @@
+// $Id: LqiForwardingEngineP.nc,v 1.16 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2010 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Omprakash Gnawali
+ */
+
+
+/* applications use this interface to send packet using the interface */
+#include "SourceRouting.h"
+
+interface SourceRouteSend {
+
+  //TODO: Mismatch with SourceRoutePacket.getPath
+  command error_t send(am_addr_t *path, uint8_t pathLen, message_t* msg, uint8_t len);
+  command error_t cancel(message_t* msg);
+  event void sendDone(message_t* msg, error_t error);
+  command uint8_t maxPayloadLength();
+  command void* getPayload(message_t* msg, uint8_t len);
+}
diff --git a/tos/lib/net/srp/SourceRouteSenderC.nc b/tos/lib/net/srp/SourceRouteSenderC.nc
new file mode 100644
index 00000000..bc87a69c
--- /dev/null
+++ b/tos/lib/net/srp/SourceRouteSenderC.nc
@@ -0,0 +1,55 @@
+/**
+ * Copyright (c) 2010 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Doug Carlson
+ */
+
+generic configuration SourceRouteSenderC(sourceroute_id_t srID) {
+  provides {
+    interface SourceRouteSend;
+    interface SourceRoutePacket;
+  }
+}
+implementation {
+  enum {
+    CLIENT_ID = unique(UQ_SRP_CLIENT),
+  };
+
+  components SourceRoutingC;
+  components new SourceRouteIdP(srID);
+  
+  SourceRoutingC.SourceRouteId[CLIENT_ID] -> SourceRouteIdP;
+
+  SourceRouteSend = SourceRoutingC.SourceRouteSend[CLIENT_ID];
+  SourceRoutePacket = SourceRoutingC;
+}
diff --git a/tos/lib/net/srp/SourceRouting.h b/tos/lib/net/srp/SourceRouting.h
new file mode 100644
index 00000000..143f055a
--- /dev/null
+++ b/tos/lib/net/srp/SourceRouting.h
@@ -0,0 +1,58 @@
+/**
+ * Copyright (c) 2010 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+#ifndef SOURCEROUTING_H
+#define SOURCEROUTING_H
+
+#include "AM.h"
+#include "message.h"
+
+#define UQ_SRP_CLIENT "SRP.client"
+
+
+enum {
+ SRP_MAX_PATHLEN = 10,
+ AM_SRP = 0x76,
+};
+
+typedef uint8_t sourceroute_id_t;
+typedef nx_uint8_t nx_sourceroute_id_t;
+
+//TODO: for generic sub-layers, route should be a nx_uint8_t[]
+typedef nx_struct {
+  nx_uint8_t sr_len;
+  nx_uint8_t hops_left;
+  nx_uint8_t seqno;
+  nx_sourceroute_id_t payload_id;
+  nx_am_addr_t route[SRP_MAX_PATHLEN];
+} sr_header_t;
+
+#endif
diff --git a/tos/lib/net/srp/SourceRoutingC.nc b/tos/lib/net/srp/SourceRoutingC.nc
new file mode 100644
index 00000000..9eff7390
--- /dev/null
+++ b/tos/lib/net/srp/SourceRoutingC.nc
@@ -0,0 +1,58 @@
+// $Id: LqiForwardingEngineP.nc,v 1.16 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2010 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Omprakash Gnawali
+ */
+
+
+configuration SourceRoutingC {
+  provides {
+    interface StdControl;
+    interface SourceRouteSend[uint8_t client];
+    interface SourceRoutePacket;
+    interface Receive[sourceroute_id_t id];
+  }
+  uses {
+    interface SourceRouteId[uint8_t client];
+  }
+}
+implementation{
+  components new SourceRouteEngineC(AM_SRP) as Engine;
+
+  StdControl = Engine;
+  SourceRouteSend = Engine;
+  SourceRoutePacket = Engine;
+  Receive = Engine;
+
+  Engine.SourceRouteId = SourceRouteId;
+}
diff --git a/tos/lib/net/tymo/ForwardingEngineM.nc b/tos/lib/net/tymo/ForwardingEngineM.nc
new file mode 100644
index 00000000..65662d18
--- /dev/null
+++ b/tos/lib/net/tymo/ForwardingEngineM.nc
@@ -0,0 +1,244 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "routing.h"
+
+/**
+ * ForwardingEngineM - Handles received packets of a certain protocol
+ * in a multihop context.  The component uses a route selector to
+ * determine if the packet should be forwarded or passed to the upper
+ * layer. If the packet is forwarded, the next hop is given by the
+ * route selector.
+ *
+ * @author Romain Thouvenin
+ */
+
+//TODO probably need a lot of cleaning, and to be moved elsewhere
+generic module ForwardingEngineM () {
+  provides { //For the upper layer
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Intercept[uint8_t id];
+    interface LinkMonitor;
+  }
+  uses {
+    interface RouteSelect;
+    interface AMSend as SubSend;
+    interface AMPacket;
+    interface Packet as PPacket; 
+    interface Packet as SubPacket;
+    interface PacketAcknowledgements as Acks;
+    interface Receive as SubReceive;
+    interface Timer<TMilli>;
+  }
+
+  provides interface MHControl;
+}
+
+implementation {
+  message_t buf; //first available, do NOT use it
+  message_t * avail = &buf;
+  message_t * waiting;
+  uint8_t typebuf;
+  uint8_t lenWaiting;
+  uint8_t amWaiting = 0;
+  am_addr_t bufAddr;
+  am_addr_t * addrWaiting;
+  bool lockAvail, lockWaiting;
+  uint32_t wait_time;
+  bool acks;
+
+  enum {
+    WAIT_BEFORE_RETRY = 100,
+    MAX_WAIT = 10 * WAIT_BEFORE_RETRY
+  };
+
+  command error_t AMSend.send[uint8_t am](am_addr_t addr, message_t * msg, uint8_t len){
+    switch(call RouteSelect.selectRoute(msg, &addr, &am)){
+    case FW_SEND:
+      call PPacket.setPayloadLength(msg, len);
+      acks = DYMO_LINK_FEEDBACK && (call Acks.requestAck(msg) == SUCCESS);
+      typebuf = am;
+      return call SubSend.send(call AMPacket.destination(msg), msg, call SubPacket.payloadLength(msg));
+
+    case FW_WAIT: 
+      atomic {
+	if(lockWaiting)
+	  return EBUSY;
+	lockWaiting = TRUE;
+      }
+      waiting = msg;
+      amWaiting = am;
+      call PPacket.setPayloadLength(msg, len);
+      lenWaiting = call SubPacket.payloadLength(msg);
+      bufAddr = addr;
+      addrWaiting = &bufAddr;
+      wait_time = 0;
+      call Timer.startOneShot(WAIT_BEFORE_RETRY); 
+      dbg("fwe", "FE: I'll retry later.\n");
+      return SUCCESS;
+      
+    default: //We don't allow sending to oneself
+      return FAIL; 
+    }
+  }
+
+  event message_t * SubReceive.receive(message_t * msg, void * payload, uint8_t len){
+    dbg("fwe", "FE: Received a message from %u\n", call AMPacket.source(msg));
+    signal MHControl.msgReceived(msg);
+    switch(call RouteSelect.selectRoute(msg, NULL, &typebuf)){
+    case FW_SEND:
+      atomic {
+	if (lockAvail) {
+          dbg("fwe", "FE: Discarding a received message because no avail buffer.\n");
+	  return msg;
+        }
+	lockAvail = TRUE;
+      }
+      if ( signal Intercept.forward[typebuf](msg, call PPacket.getPayload(msg, call PPacket.payloadLength(msg)), call PPacket.payloadLength(msg)) ) {
+          acks = DYMO_LINK_FEEDBACK && (call Acks.requestAck(msg) == SUCCESS);
+	  call SubSend.send(call AMPacket.destination(msg), msg, len);
+      }
+      return avail;
+
+    case FW_RECEIVE:
+      dbg("fwe", "FE: Received a message, signaling to upper layer.\n");
+      payload = call PPacket.getPayload(msg, call PPacket.payloadLength(msg));
+      return signal Receive.receive[typebuf](msg, payload, call PPacket.payloadLength(msg));
+
+    case FW_WAIT:
+      atomic {
+	if(lockAvail || lockWaiting) {
+          dbg("fwe", "FE: Discarding a received message because no avail or wait buffer.\n");
+	  return msg;
+        }
+	lockAvail = lockWaiting = TRUE;
+      }
+      waiting = msg;
+      lenWaiting = len;
+      addrWaiting = NULL;
+      wait_time = 0;
+      call Timer.startOneShot(WAIT_BEFORE_RETRY);
+      return avail;
+
+    default:
+      dbg("fwe", "FE: Discarding a received message because I don't know what to do.\n");
+      return msg;
+    }
+  }
+
+  event void SubSend.sendDone(message_t * msg, error_t e){
+    dbg("fwe", "FE: Sending done...\n");
+    if ((e == SUCCESS) && acks) {
+      if( !(call Acks.wasAcked(msg)) ){
+	e = FAIL;
+	dbg("fwe", "FE: The message was not acked => FAIL.\n");
+	signal MHControl.sendFailed(msg, 2);
+	signal LinkMonitor.brokenLink(call AMPacket.destination(msg));
+      } else {
+        signal LinkMonitor.refreshedLink(call AMPacket.destination(msg));
+      }
+    } else if (e != SUCCESS) {
+      dbg("fwe", "FE: ...but failed!\n");
+      signal MHControl.sendFailed(msg, 1);
+    }
+    
+    if (lockAvail) {
+      avail = msg;
+      atomic {
+	lockAvail = FALSE;
+      }
+      dbg("fwe", "FE: No need to signal sendDone.\n");
+    } else {
+      dbg("fwe", "FE: Signaling sendDone.\n");
+      if (amWaiting) {
+         signal AMSend.sendDone[amWaiting](msg, e);
+         amWaiting = 0;
+      } else {
+         signal AMSend.sendDone[typebuf](msg, e);
+      }
+      atomic {
+	lockWaiting = FALSE;
+      }
+    }
+  }
+
+  event void Timer.fired(){
+    switch(call RouteSelect.selectRoute(waiting, addrWaiting, &amWaiting)){
+    case FW_SEND:
+      dbg("fwe", "FE: I'm retrying to send my message.\n");
+      if (addrWaiting) {
+	call SubSend.send(call AMPacket.destination(waiting), waiting, lenWaiting);
+      } else if ( signal Intercept.forward[amWaiting](waiting, 
+				      call PPacket.getPayload(waiting, call PPacket.payloadLength(waiting)), 
+				      call PPacket.payloadLength(waiting)) ) {
+	call SubSend.send(call AMPacket.destination(waiting), waiting, lenWaiting);
+      }
+      call Timer.stop();
+      break;
+
+    case FW_WAIT:
+      dbg("fwe", "FE: I'll retry later again.\n");
+      wait_time += call Timer.getdt();
+      if(wait_time < MAX_WAIT){
+	call Timer.startOneShot(wait_time);
+	break;
+      }
+      //else: Continue to default
+
+    default:
+      if(addrWaiting)
+	signal AMSend.sendDone[amWaiting](waiting, FAIL);
+      if(lockAvail){
+	avail = waiting;
+	atomic {
+	  lockAvail = FALSE;
+	}
+      }
+      atomic {
+	lockWaiting = FALSE;
+      }
+    }
+  }
+
+  command error_t AMSend.cancel[uint8_t am](message_t *msg){
+    if(lockWaiting){
+      call Timer.stop();
+      atomic {
+	lockWaiting = FALSE;
+      }
+      return SUCCESS;
+    } else {
+      return call SubSend.cancel(msg);
+    }
+  }
+
+  command void * AMSend.getPayload[uint8_t am](message_t *msg, uint8_t len){
+    return call PPacket.getPayload(msg, len);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[uint8_t am](){
+    return call PPacket.maxPayloadLength();
+  }
+
+
+  /*** defaults ***/
+
+ default event message_t * Receive.receive[uint8_t am](message_t * msg, void * payload, uint8_t len){
+   return msg;
+ }
+
+ default event void AMSend.sendDone[uint8_t am](message_t * msg, error_t e){}
+
+ default event bool Intercept.forward[uint8_t am](message_t * msg, void * payload, uint8_t len){
+   return TRUE;
+ }
+
+ default event void MHControl.msgReceived(message_t * msg){ }
+
+ default event void MHControl.sendFailed(message_t * msg, uint8_t why){ }
+
+ default event void LinkMonitor.brokenLink(addr_t neighbor){ }
+}
diff --git a/tos/lib/net/tymo/LinkMonitor.nc b/tos/lib/net/tymo/LinkMonitor.nc
new file mode 100644
index 00000000..b03ca4df
--- /dev/null
+++ b/tos/lib/net/tymo/LinkMonitor.nc
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "AM.h"
+
+/**
+ * LinkMonitor - Interface to signals broken and used links in the neighborhood.
+ *
+ * @author Romain Thouvenin
+ */
+
+interface LinkMonitor {
+
+  event void brokenLink(am_addr_t neighbor);
+
+  event void refreshedLink(am_addr_t neighbor);
+
+}
diff --git a/tos/lib/net/tymo/LoopBackM.nc b/tos/lib/net/tymo/LoopBackM.nc
new file mode 100644
index 00000000..54ec7de4
--- /dev/null
+++ b/tos/lib/net/tymo/LoopBackM.nc
@@ -0,0 +1,75 @@
+module LoopBackM {
+  provides {
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+  }
+  uses {
+    interface AMSend as SubSend[uint8_t id];
+    interface Receive as SubReceive[uint8_t id];
+    interface AMPacket;
+    interface Packet;
+  }
+}
+implementation {
+
+  message_t first_avail;
+  message_t * avail = &first_avail;
+
+  message_t * buf_msg;
+  uint8_t buf_am;
+
+  task void sendDoneTask(){
+    signal AMSend.sendDone[buf_am](buf_msg, SUCCESS);
+  }
+
+  command error_t AMSend.send[uint8_t am](am_addr_t addr, message_t *msg, uint8_t len){ //TODO set acks
+    if(addr == call AMPacket.address()){
+      buf_am = am;
+      buf_msg = msg;
+      *avail = *msg;
+      dbg("lo", "LO: I am sending the buffer %p.\n", avail);
+      dbg("lo", "LO: its length is %hhu.\n", len);
+      call Packet.setPayloadLength(avail, len);
+      call AMPacket.setDestination(avail, addr);
+      call AMPacket.setSource(avail, addr);
+      post sendDoneTask();
+      avail = signal Receive.receive[call AMPacket.type(msg)](
+				 avail, 
+				 call Packet.getPayload(avail, len),
+				 len);
+      return SUCCESS;
+    } else {
+      return call SubSend.send[am](addr, msg, len);
+    }
+  }
+
+  command error_t AMSend.cancel[uint8_t am](message_t *msg){
+    if(call AMPacket.destination(msg) == call AMPacket.address()){
+      return FAIL;
+    } else {
+      return call SubSend.cancel[am](msg);
+    }
+  }
+
+  command void * AMSend.getPayload[uint8_t am](message_t *msg, uint8_t len){
+    return call SubSend.getPayload[am](msg, len);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[uint8_t am](){
+    return call SubSend.maxPayloadLength[am]();
+  }
+
+  event void SubSend.sendDone[uint8_t am](message_t *msg, error_t error){
+    signal AMSend.sendDone[am](msg, error);
+  }
+
+
+  event message_t * SubReceive.receive[uint8_t am](message_t *msg, void *payload, uint8_t len){
+    return signal Receive.receive[am](msg, payload, len);
+  }
+
+ default event void AMSend.sendDone[uint8_t am](message_t *msg, error_t error){ }
+
+ default event message_t * Receive.receive[uint8_t am](message_t *msg, void *payload, uint8_t len){ return msg; }
+
+}
diff --git a/tos/lib/net/tymo/RouteSelect.nc b/tos/lib/net/tymo/RouteSelect.nc
new file mode 100644
index 00000000..d7103f90
--- /dev/null
+++ b/tos/lib/net/tymo/RouteSelect.nc
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "routing.h"
+
+/**
+ * Interface to a route selection in a multi-hop context.
+ *
+ * @author Romain Thouvenin
+ */
+
+interface RouteSelect {
+
+  /**
+   * Ask the routing engine to fill a message with routing
+   * information, in order to send it to its target.
+   *
+   * @param msg The message to be sent
+   * @param destination The target of the route. If NULL, it is assumed it can be read in the packet
+   * @return The action that should be taken by the forwarding engine.
+   */
+  command fw_action_t selectRoute(message_t * msg, addr_t * destination, uint8_t * am_type);
+  
+}
diff --git a/tos/lib/net/tymo/RoutingTable.nc b/tos/lib/net/tymo/RoutingTable.nc
new file mode 100644
index 00000000..a268d7c4
--- /dev/null
+++ b/tos/lib/net/tymo/RoutingTable.nc
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "routing_table.h"
+
+/**
+ * RoutingTable - Interface to manipulate a data structure that stores
+ * a table of routes toward a number of destinations.
+ *
+ * @author Romain Thouvenin
+ */
+
+interface RoutingTable {
+
+  /**
+   * Request for a route toward a destination.
+   * @param Address of the destination node
+   * @param info A pointer where to store the routing information 
+   *        associated to the destination, ignored if NULL
+   * @return SUCCESS if the route exists<br/>
+   *         EBUSY if the route does not exist but may be available soon
+   *         FAIL  if the route exists but is broken
+   */
+  command error_t getRoute(addr_t address, rt_info_t * info);
+
+  command error_t getForwardingRoute(addr_t address, rt_info_t * info);
+
+  /**
+   * Signal that a route has been removed from the table.
+   * @param route_info Routing information associated to the evicted entry
+   * @param r reason of the eviction
+   */
+  event void evicted(const rt_info_t * route_info, reason_t r);
+
+}
diff --git a/tos/lib/net/tymo/RoutingTableInfo.nc b/tos/lib/net/tymo/RoutingTableInfo.nc
new file mode 100644
index 00000000..d88ea0f3
--- /dev/null
+++ b/tos/lib/net/tymo/RoutingTableInfo.nc
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "routing_table.h"
+
+typedef nx_struct rt_link {
+  nx_addr_t target;
+  nx_addr_t nexthop;
+} rt_link_t;
+
+interface RoutingTableInfo {
+
+  /**
+   * Size of the table.
+   * @return the number of entries stored in the table
+   */
+  command uint8_t size();
+
+  command uint8_t maxSize();
+
+  command uint8_t getTableContent(rt_info_t * buf);
+
+  command uint8_t getLinks(rt_link_t * buf);
+
+}
diff --git a/tos/lib/net/tymo/dymo/DymoEngineM.nc b/tos/lib/net/tymo/dymo/DymoEngineM.nc
new file mode 100644
index 00000000..dfecec27
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/DymoEngineM.nc
@@ -0,0 +1,467 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "routing.h"
+#include "routing_table.h"
+
+/**
+ * DymoEngineM - Implements the algorithms to generate and process
+ * DYMO messages.
+ *
+ * @author Romain Thouvenin
+ */
+
+module DymoEngineM {
+  provides {
+    interface SplitControl;
+  }
+  uses {
+    interface DymoTable;
+    interface RoutingTable;
+    interface DymoPacket;
+    interface AMSend;
+    interface AMPacket;
+    interface Receive;
+    
+    interface Mount;
+    interface ConfigStorage;
+  }
+
+#ifdef DYMO_MONITORING
+  provides interface DymoMonitor;
+  uses {
+    interface Timer<TMilli>;
+  }
+#endif
+}
+
+implementation {
+  message_t * avail_msg; //to be returned by receive
+  message_t buf_avail;   //first avail_msg
+  message_t buf_packet;
+  rt_info_t me;
+  rt_info_t buf_info;
+  addr_t ignoreNeeded;
+  bool busySend;
+
+  /* for processing */
+  bool busyProcess, busyIssue;
+  uint8_t cur_hopcnt;
+  uint8_t cur_info_pos;
+  rt_info_t buf_target;
+  addr_t fw_address; //set to 0 if the message must not be forwarded
+  message_t fw_msg;
+  bool sendRREP;
+
+#ifdef DYMO_MONITORING
+  uint32_t rreq_time;
+#endif
+
+  command error_t SplitControl.start(){
+    me.address = call AMPacket.address();
+    me.has_hopcnt = 1;
+    me.hopcnt = 0;
+
+    avail_msg = &buf_avail;
+    ignoreNeeded = 0;
+    sendRREP = FALSE;
+    busyProcess = FALSE;
+    busyIssue = FALSE;
+    busySend = FALSE;
+    buf_target.address = 0;
+    
+#ifdef DYMO_MONITORING
+    rreq_time = 0;
+#endif
+
+    return call Mount.mount();
+  }
+
+  void incr_seqnum(){
+    if(me.seqnum == 65535)
+      me.seqnum = 256;
+    else
+      me.seqnum++;
+
+    call ConfigStorage.write(0x0, &me.seqnum, sizeof(me.seqnum));
+  }
+
+  event void ConfigStorage.writeDone(storage_addr_t addr, void *buf, 
+    storage_len_t len, error_t err) {
+    // Verify addr and len
+
+    if (err == SUCCESS) {
+      if (call ConfigStorage.commit() != SUCCESS) {
+        // Handle failure
+      }
+    }
+    else {
+      // Handle failure
+    }
+  }
+
+  event void Mount.mountDone(error_t error) {
+    if (error == SUCCESS) {
+      if (call ConfigStorage.valid() == TRUE) {
+        if (call ConfigStorage.read(0x0, &me.seqnum, sizeof(me.seqnum)) != SUCCESS) {
+          me.seqnum = 1;
+	  signal SplitControl.startDone(SUCCESS);
+	}
+      }
+      else {
+	// Invalid volume.  Commit to make valid.
+	if (call ConfigStorage.commit() == SUCCESS) {
+	  me.seqnum = 1;
+	}
+	else {
+	  signal SplitControl.startDone(FAIL);
+	}
+      }
+    }
+    else{
+      signal SplitControl.startDone(error);
+    }
+  }
+
+  event void ConfigStorage.commitDone(error_t err) {
+    if ((err != SUCCESS) && (me.seqnum == 1)) {
+      signal SplitControl.startDone(err);
+    } else if (me.seqnum == 1) {
+      signal SplitControl.startDone(SUCCESS);
+    }
+  }
+
+  event void ConfigStorage.readDone(storage_addr_t addr, void* buf, 
+    storage_len_t len, error_t err) __attribute__((noinline)) {
+
+    if (err == SUCCESS) {
+      me.seqnum = *(seqnum_t *)buf;
+      signal SplitControl.startDone(SUCCESS);
+    } else {
+      signal SplitControl.startDone(err);
+    }
+  }
+
+
+  /* Send a RREQ for buf_info */
+  task void issueRREQ(){
+    atomic {
+      if(busySend)
+	post issueRREQ();
+      else {
+	busySend = TRUE;
+	incr_seqnum();
+	call DymoPacket.createRM(&buf_packet, DYMO_RREQ, &me, &buf_info);
+	call AMSend.send(AM_BROADCAST_ADDR, &buf_packet, call DymoPacket.getSize(&buf_packet));
+      }
+    }
+  }
+
+  /* Send a RREP to buf_info */
+  task void issueRREP(){
+    atomic {
+      if(busySend)
+	post issueRREP();
+      else {
+	busySend = TRUE;
+	call DymoPacket.createRM(&buf_packet, DYMO_RREP, &me, &buf_info);
+	if(buf_target.address)
+	  call DymoPacket.addInfo(&buf_packet, &buf_target);
+	call AMSend.send(buf_info.nexthop, &buf_packet, call DymoPacket.getSize(&buf_packet));
+	buf_target.address = 0;
+      }
+    }
+  }
+
+  /* Send a RERR with buf_info as unreachable */
+  task void issueRERR(){
+    atomic {
+      if(busySend)
+	post issueRERR();
+      else {
+	busySend = TRUE;
+	call DymoPacket.createRM(&buf_packet, DYMO_RERR, NULL, &buf_info);
+	call AMSend.send(AM_BROADCAST_ADDR, &buf_packet, call DymoPacket.getSize(&buf_packet));
+      }
+    }
+  }
+
+  /* Send current fw_msg to fw_address */
+  task void forward(){
+    atomic {
+      if(busySend)
+	post forward();
+      else {
+	busySend = TRUE;
+	call AMSend.send(fw_address, &fw_msg, call DymoPacket.getSize(&fw_msg));
+      }
+    }
+  }
+
+  event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){
+#ifdef DYMO_MONITORING
+    signal DymoMonitor.msgReceived(msg);
+#endif
+    dbg("de", "DE: Message (type %hhu) received.\n", call DymoPacket.getType(msg));
+    atomic {
+      if(busyProcess){
+	dbg("de", "DE: I'm busy, I can't handle this message, sorry.\n");
+	return msg; //we discard msg if a message is already being processed
+      } else {
+	busyProcess = TRUE;
+      }
+    }
+    cur_info_pos = 0;
+    fw_address = AM_BROADCAST_ADDR;
+    call DymoPacket.startProcessing(msg, &fw_msg);
+    return avail_msg;
+  }
+
+  event proc_action_t DymoPacket.hopsProcessed(message_t * msg, uint8_t hop_limit, uint8_t hop_count){
+    cur_hopcnt = hop_count; //TODO use this
+    if(hop_limit == 0){
+      fw_address = 0;
+      dbg("de", "DE: This message has reached its HL (%hhu hops) => discard.\n", hop_count);
+      return ACTION_DISCARD_MSG;
+    } else {
+      return ACTION_KEEP;
+    }
+  }
+
+  proc_action_t process_rm_info(message_t * msg, rt_info_t * info){
+    cur_info_pos++;
+    if(cur_info_pos == 1){ //target
+
+      if(info->address == me.address){
+
+	if(call DymoPacket.getType(msg) == DYMO_RREQ){
+	  dbg("de", "DE: This RREQ is for me => RREP.\n");
+	  if(info->seqnum < me.seqnum)
+	    incr_seqnum();
+	  sendRREP = TRUE; //to send a RREP when we receive the next event (= originator info)
+	} else {
+	  dbg("de", "DE: This RREP is for me, cool!\n");
+	}
+	fw_address = 0;
+	return ACTION_DISCARD_MSG;
+
+      } else { //not for me
+
+	info->nexthop = call AMPacket.source(msg);
+	if(call DymoPacket.getType(msg) == DYMO_RREQ){
+
+#if DYMO_INTER_RREP
+	  //if we know a route to the target, we send a intermediate RREP and don't forward the message
+	  ignoreNeeded = info->address;
+	  if (call RoutingTable.getRoute(info->address, &buf_info) == SUCCESS) {
+#if DYMO_FORCE_INTER_RREP
+	    if( !info->seqnum || !(call DymoTable.isSuperior(info, DYMO_RREQ)) ){
+#else
+	    if( info->seqnum && !(call DymoTable.isSuperior(info, DYMO_RREQ)) ){
+#endif
+	      dbg("de", "DE: This RREQ is for %u, but I know the route => RREP.\n", info->address);
+	      buf_target = buf_info;
+	      sendRREP = TRUE;
+	      fw_address = 0;
+	      return ACTION_DISCARD_MSG;
+	    }
+	  }
+#endif
+	  return ACTION_KEEP;
+
+	} else { //RREP
+
+	  ignoreNeeded = info->address;
+	  dbg("de", "DE: This RREP is for %u.\n", info->address);
+	  if(call RoutingTable.getForwardingRoute(info->address, &buf_info) == SUCCESS){
+	    fw_address = buf_info.nexthop;
+	    return ACTION_KEEP;
+	  } else {
+	    fw_address = 0;
+	    return ACTION_DISCARD_MSG;
+	  }
+
+	}//end RREP
+
+      }//end not for me
+
+    } else if((call DymoPacket.getType(msg) == DYMO_RREQ) //end if(info==target)
+	      && (cur_info_pos == 2)
+	      && (info->address == me.address)){
+
+      fw_address = 0;
+      sendRREP = FALSE;
+      return ACTION_DISCARD_MSG;
+
+    } else {
+
+      info->nexthop = call AMPacket.source(msg);
+      if(call DymoTable.update(info, call DymoPacket.getType(msg)) == EINVAL){
+
+	if(cur_info_pos == 2){ //origin
+	  dbg("de", "DE: I am discarding a msg with a bad origin (%u)\n", info->address);
+	  fw_address = 0;
+	  return ACTION_DISCARD_MSG;
+	} else {               //Additional info
+	  return ACTION_DISCARD;
+	}
+
+      } else {
+
+	if((cur_info_pos == 2) && sendRREP){
+	  buf_info = *info;
+	  atomic {
+	    if(!busyIssue){
+	      busyIssue = 1;
+	      post issueRREP();
+	    }
+	  }
+	  sendRREP = 0;
+	}
+
+#ifdef DYMO_MONITORING 
+	if( rreq_time    //TODO probably misses a test
+	    && (cur_info_pos == 2)
+	    && (call DymoPacket.getType(msg) == DYMO_RREP) ) {
+	  rreq_time = (call Timer.getNow()) - rreq_time;
+	  signal DymoMonitor.routeDiscovered(rreq_time, info->address);
+	  rreq_time = 0;
+	}
+#endif
+	return ACTION_KEEP;
+
+      }
+
+    } //end info!=target
+  }//end event
+
+  proc_action_t process_err_info(message_t * msg, rt_info_t * info){
+    info->nexthop = call AMPacket.source(msg);
+    if(call DymoTable.update(info, call DymoPacket.getType(msg)) == EINVAL){
+      return ACTION_DISCARD;       
+    } else {
+      cur_info_pos++; //we only count kept pieces of info
+      return ACTION_KEEP;
+    }
+  }
+
+  event proc_action_t DymoPacket.infoProcessed(message_t * msg, rt_info_t * info){
+    if(call DymoPacket.getType(msg) == DYMO_RERR)
+      return process_err_info(msg, info);
+    else
+      return process_rm_info(msg, info);
+  }
+
+  event void DymoPacket.messageProcessed(message_t * msg){
+    avail_msg = msg;
+    if( (call DymoPacket.getType(msg) == DYMO_RERR) && cur_info_pos ){
+
+      post forward();
+
+    } else if( (call DymoPacket.getType(msg) != DYMO_RERR) && fw_address ){
+
+#if DYMO_APPEND_INFO
+      call DymoPacket.addInfo(&fw_msg, me);
+#endif
+      dbg("de", "DE: I'll forward this RM.\n");
+      post forward();
+
+    } else {
+
+      atomic {
+	busyProcess = 0;
+      }
+      dbg("de", "DE: I'm not busy anymore.\n");
+
+    }
+    dbg("de", "DE: Message (type %hhu) successfully processed.\n", call DymoPacket.getType(msg));
+  }
+
+  event void DymoTable.routeNeeded(addr_t destination){
+    if(ignoreNeeded == destination){
+      ignoreNeeded = 0;
+    } else {
+      buf_info.address = destination;
+      buf_info.seqnum = 0;
+      buf_info.has_hopcnt = FALSE;
+      atomic {
+	if(!busyIssue){
+	  busyIssue = TRUE;
+#ifdef DYMO_MONITORING
+	  rreq_time = call Timer.getNow();
+#endif
+	  post issueRREQ();
+	}
+      }
+    }
+  }
+  
+  event void DymoTable.brokenRouteNeeded(const rt_info_t * route_info){
+    buf_info = *route_info;
+    buf_info.has_hopcnt = FALSE;
+    atomic {
+      if(!busyIssue){
+	busyIssue = TRUE;
+	post issueRERR();
+      }
+    }
+  }
+
+  event void RoutingTable.evicted(const rt_info_t * route_info, reason_t r){
+    if(r == REASON_UNREACHABLE){
+      buf_info = *route_info;
+      buf_info.has_hopcnt = FALSE;
+      atomic {
+	if(!busyIssue){
+	  busyIssue = TRUE;
+	  post issueRERR();
+	}
+      }
+    }
+  }
+
+  event void AMSend.sendDone(message_t *msg, error_t error){
+    atomic {
+      busySend = FALSE;
+    }
+    if(msg == &fw_msg){
+      atomic{
+	busyProcess = FALSE;
+      }
+    } else if(msg == &buf_packet) {
+      atomic {
+	busyIssue = FALSE;
+      }
+    }
+
+    if(error == SUCCESS){
+      if(msg == &fw_msg)
+	dbg("de", "DE: Message (type %hhu) forwarded.\n", call DymoPacket.getType(msg));
+      else
+	dbg("de", "DE: Message (type %hhu) sent.\n", call DymoPacket.getType(msg));
+    } else
+      dbg("de", "DE: Failed to send message (type %hhu).\n", call DymoPacket.getType(msg));
+
+#ifdef DYMO_MONITORING
+    if(error == SUCCESS)
+      signal DymoMonitor.msgSent(msg);
+#endif
+  }
+
+  command error_t SplitControl.stop(){ }
+
+#ifdef DYMO_MONITORING
+
+  event void Timer.fired(){}
+
+ default event void DymoMonitor.msgReceived(message_t * msg){}
+
+ default event void DymoMonitor.msgSent(message_t * msg){}
+
+ default event void DymoMonitor.routeDiscovered(uint32_t delay, addr_t target){}
+
+#endif
+}
+
diff --git a/tos/lib/net/tymo/dymo/DymoMonitor.nc b/tos/lib/net/tymo/dymo/DymoMonitor.nc
new file mode 100644
index 00000000..f8ec2eda
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/DymoMonitor.nc
@@ -0,0 +1,11 @@
+#include "message.h"
+
+interface DymoMonitor {
+
+  event void msgReceived(message_t * msg);
+
+  event void msgSent(message_t * msg);
+
+  event void routeDiscovered(uint32_t delay, addr_t target);
+
+}
diff --git a/tos/lib/net/tymo/dymo/DymoNetworkC.nc b/tos/lib/net/tymo/dymo/DymoNetworkC.nc
new file mode 100644
index 00000000..ecd8315d
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/DymoNetworkC.nc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "routing.h"
+
+/**
+ * DymoNetworkC - Top level configuration providing a multihop network
+ * layer and implementing DYMO (DYnamic Manet On-demand) routing.
+ *
+ * @author Romain Thouvenin
+ */
+
+configuration DymoNetworkC {
+  provides {
+    interface AMSend as MHSend[uint8_t id];
+    interface AMPacket as MHPacket;
+    interface Packet;
+    interface Receive[uint8_t id];
+    interface Intercept[uint8_t id];
+    interface SplitControl;
+  }
+
+#ifdef DYMO_MONITORING
+  provides {
+    interface DymoMonitor;
+    interface RoutingTableInfo;
+  }
+#endif
+  provides interface MHControl;
+}
+
+implementation {
+  components ActiveMessageC;
+  components new AMReceiverC(AM_MULTIHOP) as MHReceiver, new AMReceiverC(AM_DYMO) as DymoReceiver;
+  components new AMSenderC(AM_MULTIHOP) as MHQueue, new AMSenderC(AM_DYMO) as DymoQueue;
+  components MHServiceC, DymoServiceC, NetControlM, DymoTableC;
+#ifdef LOOPBACK
+  components LoopBackM;
+#endif
+
+#ifdef LOOPBACK
+  MHSend    = LoopBackM.AMSend;
+  Receive   = LoopBackM.Receive;
+#else
+  MHSend    = MHServiceC.MHSend;
+  Receive   = MHServiceC.Receive;
+#endif
+  MHPacket  = MHServiceC.MHPacket;
+  Packet    = MHServiceC.Packet;
+  Intercept = MHServiceC.Intercept;
+
+  SplitControl = NetControlM.SplitControl;
+
+#ifdef LOOPBACK
+  LoopBackM.SubSend    -> MHServiceC.MHSend;
+  LoopBackM.SubReceive -> MHServiceC.Receive;
+  LoopBackM.AMPacket   -> MHServiceC.MHPacket;
+  LoopBackM.Packet     -> MHServiceC.Packet;
+#endif
+
+  MHServiceC.AMPacket    -> ActiveMessageC;
+  MHServiceC.SubPacket   -> ActiveMessageC;
+  MHServiceC.AMSend      -> MHQueue;
+  MHServiceC.SubReceive  -> MHReceiver;
+  MHServiceC.Acks        -> MHQueue;
+
+  DymoServiceC.AMPacket    -> ActiveMessageC;
+  DymoServiceC.Packet      -> ActiveMessageC;
+  DymoServiceC.AMSend      -> DymoQueue;
+  DymoServiceC.Receive     -> DymoReceiver;
+#if DYMO_LINK_FEEDBACK
+  DymoServiceC.LinkMonitor -> MHServiceC;
+#endif
+
+  NetControlM.AMControl     -> ActiveMessageC.SplitControl;
+  NetControlM.TableControl  -> DymoTableC.StdControl;
+  NetControlM.EngineControl -> DymoServiceC.SplitControl;
+
+#ifdef DYMO_MONITORING  
+  RoutingTableInfo = DymoTableC.RoutingTableInfo;
+  DymoMonitor = DymoServiceC.DymoMonitor;
+#endif
+  MHControl   = MHServiceC.MHControl;
+
+}
diff --git a/tos/lib/net/tymo/dymo/DymoPacket.nc b/tos/lib/net/tymo/dymo/DymoPacket.nc
new file mode 100644
index 00000000..cce1e21a
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/DymoPacket.nc
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "routing_table.h"
+
+/**
+ * DymoPacket - Interface to manipulate DYMO packets.
+ *
+ * @author Romain Thouvenin
+ */
+
+interface DymoPacket {
+
+  /*****************
+   * Packet header *
+   *****************/
+
+  /**
+   * Type of the packet.
+   * @return DYMO_RREQ, DYMO_RREP or DYMO_RERR
+   */
+  command dymo_msg_t getType(message_t * msg);
+
+  /**
+   * Size of the packet (all fields included).
+   */
+  command uint16_t getSize(message_t * msg);
+
+
+  /*********************
+   * Creating a packet *
+   *********************/
+
+  /**
+   * Create a routing message.  This is not strictly a Routing Message
+   * as defined by DYMO specs: this is also the command to create a
+   * RERR.
+   * @param msg the buffer to fill
+   * @param msg_type The type of message (RREQ, RREP or RERR)
+   * @param origin The originator of the routing message, should be NULL for a RERR
+   * @param target The target of the routing message, or first unreachable node for a RERR
+   */
+  command void createRM(message_t * msg, dymo_msg_t msg_type, 
+			const rt_info_t * origin, const rt_info_t * target);
+
+  /**
+   * Append additional information to a message.  This is up to the
+   * implementation to choose where in the message the information
+   * should be added. In anycase, it must not be added before the
+   * target and originator.
+   * @param msg the existing message 
+   * @param info The piece of information to append @return
+   * @return ESIZE if the payload has reached its maximum size<br/>
+   *         SUCCESS otherwise
+   */
+  command error_t addInfo(message_t * msg, const rt_info_t * info);
+
+
+  /***********************
+   * Processing a packet *
+   ***********************/
+
+  /**
+   * Start the processing task of a DYMO message.  Currently, the only
+   * way to access the content of a message is to read it entirely
+   * with this command. It will report all information found thanks to
+   * events above.
+   * @param msg The message to process
+   * @param newmsg The message that will contain the processed message
+   * to be forwarded. May be NULL if such a message is not wanted.
+   */
+  command void startProcessing(message_t * msg, message_t * newmsg);
+
+  /**
+   * Hop values have been extracted from the processed packet.
+   * @param msg the message being processed
+   * @param hop_limit the (decremented) hop limit value of the message
+   * @param hop_count the (incremented) hop count value of the message
+   * @return ACTION_DISCARD_MSG if a building a message to be forwarded
+   * is not wanted anymore (typically when hop_limit==0), 
+   * anything else otherwise.
+   */
+  event proc_action_t hopsProcessed(message_t * msg, uint8_t hop_limit, uint8_t hop_count);
+
+  /**
+   * A piece of routing information has been extracted from the processed packet.
+   * @param msg the message being processed
+   * @param info the extracted piece of information. If present, hopcnt has been decremented.
+   * @return ACTION_KEEP to keep this information in the forwarded message<br/>
+   *         ACTION_DISCARD to remove this information in the forwardedmessage<br/>
+   *         ACTION_DISCARD_MSG to cancel the creation of the forwarded message.
+   */
+  event proc_action_t infoProcessed(message_t * msg, rt_info_t * info);
+
+  /**
+   * Processing task finished.
+   * No further processing event will be signaled for this message.
+   */
+  event void messageProcessed(message_t * msg);
+}
diff --git a/tos/lib/net/tymo/dymo/DymoPacketM.nc b/tos/lib/net/tymo/dymo/DymoPacketM.nc
new file mode 100644
index 00000000..1ccd18ff
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/DymoPacketM.nc
@@ -0,0 +1,363 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "dymo_packet.h"
+
+/**
+ * DymoPacketM - Implementation of the DYMO packets format.
+ *
+ * @author Romain Thouvenin
+ */
+
+module DymoPacketM {
+  provides {
+    interface DymoPacket;
+    interface PacketMaker; //For tests and debugging
+  }
+  uses interface Packet;
+}
+//TODO generalize size values
+implementation {
+  message_t * currentMsg;
+  message_t * processedMsg;
+
+  /* Local functions */
+  void    create_block(nx_uint8_t * payload, const rt_info_t * info);
+  uint8_t block_size(nx_uint8_t * block);
+  uint8_t block_info_size(nx_uint8_t * block);
+  uint8_t block_header_size(nx_uint8_t * block);
+  uint8_t block_num_addr(nx_uint8_t * block);
+  void    block_get_info(nx_uint8_t * block, uint8_t pos, rt_info_t * info, bool update);
+  nx_uint8_t * block_get_pointer(nx_uint8_t * block, uint8_t pos, uint8_t * size);
+  bool block_can_contain(nx_uint8_t * block, const rt_info_t * info);
+  void block_add_info(nx_uint8_t * block, const rt_info_t * info);
+  void move_data(nx_uint8_t * data, uint8_t amount, uint8_t offset);
+
+
+  /*****************
+   * Packet header *
+   *****************/
+
+  command dymo_msg_t DymoPacket.getType(message_t * msg){
+    nx_uint8_t * p = call Packet.getPayload(msg, 1);
+    return *p;
+  }
+
+  command uint16_t DymoPacket.getSize(message_t * msg){
+    nx_uint8_t * p = call Packet.getPayload(msg, 3);
+    return *(nx_uint16_t *)(p + 1);
+  }
+
+
+  /*********************
+   * Creating a packet *
+   *********************/
+
+  command void DymoPacket.createRM(message_t * msg, dymo_msg_t msg_type, 
+			const rt_info_t * origin, const rt_info_t * target){
+    nx_uint8_t * payload = call Packet.getPayload(msg, call Packet.maxPayloadLength());
+    nx_uint16_t * size_p;
+    *(payload++) = msg_type;
+    size_p = (nx_uint16_t *) payload;
+    payload += 2;
+    *(payload++) = DYMO_HOPLIMIT;
+    *(payload++) = 0;
+
+    create_block(payload, target);
+   
+    if(origin){
+      if(block_can_contain(payload, origin)){
+	block_add_info(payload, origin);
+	*size_p = block_size(payload);
+      } else {
+	*size_p = block_size(payload);
+	payload += *size_p;
+	create_block(payload, origin);
+	*size_p += block_size(payload);
+      }
+    } else {
+      *size_p = block_size(payload);
+    }
+
+    //size of msg header
+    //it is here to save a few instructions or a byte
+    *size_p += 5; 
+  }
+
+  command error_t DymoPacket.addInfo(message_t * msg, const rt_info_t * info){
+    nx_uint8_t * payload = call Packet.getPayload(msg, call Packet.maxPayloadLength());
+    nx_uint16_t * size_p = (nx_uint16_t *)(payload + 1);
+    nx_uint8_t * block = payload + 5;
+    uint8_t bsize;
+
+    while(block < payload + *size_p){
+      //We don't want to add something before the origin
+      if ( ((block > payload + 5) && block_can_contain(block, info))
+	   || ((block == payload + 5) && (block_num_addr(block) > 1)) ) {
+
+	uint8_t isize = block_info_size(block);
+	if(*size_p + isize > call Packet.maxPayloadLength()){
+	  return ESIZE;
+	} else {
+	  bsize = block_size(block);
+	  move_data(block + bsize, payload + *size_p - (block + bsize), isize);
+	  block_add_info(block, info);
+	  *size_p += isize;
+	  return SUCCESS;
+	}
+
+      } else {
+	block += block_size(block);
+      }
+    }
+
+    create_block(block, info);
+    bsize = block_size(block);
+    if(*size_p +  bsize > call Packet.maxPayloadLength()){
+      return ESIZE;
+    } else {
+      *size_p += bsize;
+      return SUCCESS;
+    }
+  }
+
+
+  /***********************
+   * Processing a packet *
+   ***********************/
+
+  task void processMessage(){
+    nx_uint8_t * payload = call Packet.getPayload(currentMsg, call Packet.maxPayloadLength());
+    nx_uint8_t * end = payload + *(nx_uint16_t *)(payload+1);
+    nx_uint8_t * fw_payload = NULL;
+    nx_uint16_t * fw_size = NULL;
+    nx_uint8_t *fw_block, *info_p;
+    rt_info_t info;
+    uint8_t i,n,s;
+    bool first_block = 1;
+    proc_action_t action;
+
+    payload += 3;
+    *(payload++) -= 1; //decr hopL
+    *(payload++) += 1; //incr hopC
+    action = signal DymoPacket.hopsProcessed(currentMsg, *(payload-2), *(payload-1));
+    if(processedMsg){
+      if(action != ACTION_DISCARD_MSG){
+	fw_payload = call Packet.getPayload(processedMsg, call Packet.maxPayloadLength());
+	memcpy(fw_payload, payload - 5, 5);
+	fw_size = (nx_uint16_t *)(fw_payload + 1);
+	*fw_size = 5;
+	fw_payload += 5;
+      } else {
+	processedMsg = NULL;
+      }
+    }
+
+    while(payload < end){
+      fw_block = NULL;
+      n = block_num_addr(payload);
+
+      for(i=0;i<n;i++){
+	block_get_info(payload, i, &info, !first_block || i);
+	action = signal DymoPacket.infoProcessed(currentMsg, &info);
+
+	if(processedMsg){
+	  switch(action){
+	  case ACTION_KEEP:
+	    if(!fw_block){
+	      s = block_header_size(payload);
+	      memcpy(fw_payload, payload, s);
+	      fw_block = fw_payload;
+	      *(fw_block+1) = 0;
+	      fw_payload += s;
+	    }
+	    info_p = block_get_pointer(payload, i, &s);
+	    memcpy(fw_payload, info_p, s);
+	    fw_payload += s;
+	    *(fw_block+1) += 1; //increments NumAddr
+	    break;
+
+	  case ACTION_DISCARD_MSG:
+	    processedMsg = NULL;
+	  default:
+	  }
+	}//if
+
+      }//for
+      payload += block_size(payload);
+      first_block = 0;
+      if(fw_block)
+	*fw_size += block_size(fw_block);
+    }
+    
+    signal DymoPacket.messageProcessed(currentMsg);
+  }
+
+  command void DymoPacket.startProcessing(message_t * msg, message_t * newmsg){
+    currentMsg = msg;
+    processedMsg = newmsg;
+    post processMessage();
+  }
+
+
+
+  //TODO return block_size, it is always needed after a block creation
+  void create_block(nx_uint8_t * payload, const rt_info_t * info){
+    uint8_t semantics;
+
+    semantics = BLOCK_HEAD;
+    if(info->seqnum)
+      semantics |= BLOCK_SEQNUM;
+    if(info->has_hopcnt)
+      semantics |= BLOCK_HOPCNT;
+
+    *(payload++) = semantics;
+    *(payload++) = 1;
+    *(nx_addr_t *)payload = info->address;
+    payload += sizeof(addr_t);
+    if(info->seqnum){
+      *(nx_seqnum_t *)payload = info->seqnum;
+      payload += 2;
+    }
+    if(info->has_hopcnt){
+      *(payload++) = info->hopcnt;
+    }
+  }
+
+  void block_add_info(nx_uint8_t * block, const rt_info_t * info){
+    uint8_t semantics = *block;
+    nx_uint8_t * size_p = block + 1;
+    block += block_size(block);
+    *size_p += 1;
+    if(semantics & BLOCK_HEAD){
+      *block = info->address % 256;
+      block++;
+    } else {
+      *(nx_addr_t *)block = info->address;
+      block += sizeof(addr_t);
+    }
+
+    if(semantics & BLOCK_SEQNUM){
+      *(nx_seqnum_t *)block = info->seqnum;
+      block += sizeof(seqnum_t);
+    }
+
+    if(semantics & BLOCK_HOPCNT){
+      *block = info->hopcnt;
+    }
+  }
+
+  bool block_can_contain(nx_uint8_t * block, const rt_info_t * info){
+    if( (*block & BLOCK_SEQNUM) && !info->seqnum )
+      return 0;
+    if( !(*block & BLOCK_SEQNUM) && info->seqnum )
+      return 0;
+
+    if( (*block & BLOCK_HOPCNT) && !info->has_hopcnt )
+      return 0;
+    if( !(*block & BLOCK_HOPCNT) && info->has_hopcnt )
+      return 0;
+
+    if( (*block & BLOCK_HEAD) && (*(block + 2) != (info->address / 256)) )
+      return 0;
+
+    return 1;
+  }
+
+  uint8_t block_info_size(nx_uint8_t * block){
+    uint8_t result = 1;
+    if(!(*block & BLOCK_HEAD))
+      result++;
+    if(*block & BLOCK_SEQNUM)
+      result += 2;
+    if(*block & BLOCK_HOPCNT)
+      result++;
+    //TODO add max age
+    return result;
+  }
+
+  uint8_t block_header_size(nx_uint8_t * block){
+    if(*block & BLOCK_HEAD)
+      return 3;
+    else
+      return 2;
+  }
+
+  uint8_t block_num_addr(nx_uint8_t * block){
+    return *(block + 1);
+  }
+
+  uint8_t block_size(nx_uint8_t * block){
+    uint8_t result = 2;
+    if(*block & BLOCK_HEAD){
+      result++;
+    }
+    return result + block_num_addr(block) * block_info_size(block);
+  }
+
+  nx_uint8_t * block_get_pointer(nx_uint8_t * block, uint8_t pos, uint8_t * size){
+    if(size){
+      *size = block_info_size(block);
+      return block + block_header_size(block) + pos * (*size);
+    } else {
+      return block + block_header_size(block) + pos * block_info_size(block);
+    }
+  }
+
+  void block_get_info(nx_uint8_t * block, uint8_t pos, rt_info_t * info, bool update){
+    nx_uint8_t * semantics = block;
+    block = block_get_pointer(block, pos, NULL);
+    
+    if(*semantics & BLOCK_HEAD){
+      info->address = *(semantics + 2) * 256 + *block;
+      block++;
+    } else {
+      info->address = *(nx_addr_t *)block;
+      block += sizeof(addr_t);
+    }
+
+    if(*semantics & BLOCK_SEQNUM){
+      info->seqnum = *(nx_seqnum_t *)block;
+      block += sizeof(seqnum_t);
+    } else {
+      info->seqnum = 0;
+    }
+
+    if(*semantics & BLOCK_HOPCNT){
+      info->has_hopcnt = 1;
+      if(update)
+	*block += 1;
+      info->hopcnt = *block;
+      block++;
+    } else {
+      info->has_hopcnt = 0;
+    }
+  }
+
+  void move_data(nx_uint8_t * data, uint8_t amount, uint8_t offset){
+    nx_uint8_t * newdata = data + amount + offset;
+    data += amount;
+    for(; amount > 0; amount--)
+      *--newdata = *--data;
+  }
+
+
+  /**************
+   * PakerMaker *
+   **************/
+
+  command uint16_t PacketMaker.getSize(message_t * msg){
+    return call DymoPacket.getSize(msg);
+  }
+
+  command void PacketMaker.createRM(message_t * msg, dymo_msg_t msg_type, 
+				   const rt_info_t * origin, const rt_info_t * target){
+    call DymoPacket.createRM(msg, msg_type, origin, target);
+  }
+
+  command error_t PacketMaker.addInfo(message_t * msg, const rt_info_t * info){
+    return call DymoPacket.addInfo(msg, info);
+  }
+}
diff --git a/tos/lib/net/tymo/dymo/DymoServiceC.nc b/tos/lib/net/tymo/dymo/DymoServiceC.nc
new file mode 100644
index 00000000..fe66338d
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/DymoServiceC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "StorageVolumes.h"
+
+/**
+ * DymoServiceC - Implements the DYMO routing protocol
+ *
+ * @author Romain Thouvenin
+ */
+
+configuration DymoServiceC {
+  provides {
+    interface SplitControl;
+  }
+  uses {
+    interface Packet;
+    interface AMPacket;
+    interface AMSend;
+    interface Receive;
+    interface LinkMonitor;
+  }
+
+#ifdef DYMO_MONITORING
+  provides {
+    interface DymoMonitor;
+  }
+#endif
+}
+
+implementation {
+  components DymoTableC, DymoEngineM, DymoPacketM;
+  components new ConfigStorageC(VOLUME_DYMODATA);
+
+  SplitControl = DymoEngineM.SplitControl;
+  Packet       = DymoPacketM.Packet;
+  AMPacket     = DymoEngineM.AMPacket;
+  AMSend       = DymoEngineM.AMSend;
+  Receive      = DymoEngineM.Receive;
+  LinkMonitor  = DymoTableC.LinkMonitor;
+
+  DymoEngineM.DymoPacket   -> DymoPacketM;
+  DymoEngineM.RoutingTable -> DymoTableC;
+  DymoEngineM.DymoTable    -> DymoTableC;
+
+  DymoEngineM.Mount         -> ConfigStorageC;
+  DymoEngineM.ConfigStorage -> ConfigStorageC;
+
+#ifdef DYMO_MONITORING
+  components new TimerMilliC();
+
+  DymoMonitor = DymoEngineM.DymoMonitor;
+  DymoEngineM.Timer     -> TimerMilliC;
+#endif
+}
diff --git a/tos/lib/net/tymo/dymo/DymoTable.nc b/tos/lib/net/tymo/dymo/DymoTable.nc
new file mode 100644
index 00000000..c24e849e
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/DymoTable.nc
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "routing_table.h"
+
+/**
+ * DymoTable - Interface to manipulate a dymo routing table
+ *
+ * @author Romain Thouvenin
+ */
+
+interface DymoTable {
+
+  /**
+   * Update the table with fresh information about a destination.
+   * @param route_info The routing information associated to the destination
+   * @param msg_type The type of message that provided this info
+   * @return SUCCESS if the route was added or updated<br/>
+   *         EINVAL  if route_info was inferior to existing route, 
+   *                 or msg_type = rerr and the route does not exist
+   *         FAIL    if the table was full and no existing route could be deleted<br/>
+   */
+  command error_t update(const rt_info_t * route_info, dymo_msg_t msg_type);
+
+  command bool isSuperior(const rt_info_t * route_info, dymo_msg_t msg_type);
+
+  /**
+   * Signal that a component asked for an unknown route, a RREQ should
+   * be generated.
+   * @param destination Target node of the needed route.
+   */
+  event void routeNeeded(addr_t destination);
+
+  event void brokenRouteNeeded(const rt_info_t * route_info);
+}
diff --git a/tos/lib/net/tymo/dymo/DymoTableC.nc b/tos/lib/net/tymo/dymo/DymoTableC.nc
new file mode 100644
index 00000000..ed18c6aa
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/DymoTableC.nc
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "dymo_table.h"
+
+/**
+ * DymoTableC - Provides a routing table with DYMO routing information.
+ *
+ * @author Romain Thouvenin
+ */
+
+configuration DymoTableC {
+  provides {
+    interface StdControl;
+    interface RoutingTable;
+    interface DymoTable;
+  }
+#ifdef DYMO_MONITORING
+  provides interface RoutingTableInfo;
+#endif
+
+  uses interface LinkMonitor;
+}
+
+implementation {
+  components new DymoTableM(MAX_TABLE_SIZE); 
+  components new TimerMilliC() as BaseTimer;
+  components new VirtualizeTimerC(TMilli, MAX_TABLE_SIZE * NB_ROUTE_TIMERS) as Timers;
+  components TinySchedulerC;
+
+  StdControl   = DymoTableM.StdControl;
+  RoutingTable = DymoTableM.RoutingTable;
+  DymoTable    = DymoTableM.DymoTable;
+  LinkMonitor  = DymoTableM.LinkMonitor;
+
+  DymoTableM.Timer -> Timers;
+
+  Timers.TimerFrom -> BaseTimer.Timer;
+
+#ifdef DYMO_MONITORING
+  RoutingTableInfo = DymoTableM.RoutingTableInfo;
+#endif
+}
diff --git a/tos/lib/net/tymo/dymo/DymoTableM.nc b/tos/lib/net/tymo/dymo/DymoTableM.nc
new file mode 100644
index 00000000..7467d3c7
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/DymoTableM.nc
@@ -0,0 +1,360 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "dymo_table.h"
+
+/**
+ * DymoTableM - Implements a routing table with DYMO routing information.
+ * @param maxsize maximum number of entries in the table, cannot be higher than 51
+ *
+ * @author Romain Thouvenin
+ */
+
+generic module DymoTableM(uint8_t maxsize) {
+  provides {
+    interface StdControl;
+    interface RoutingTable;
+    interface DymoTable;
+  }
+  uses {
+    interface Timer<TMilli>[uint8_t id];
+    interface LinkMonitor;
+  }
+#ifdef DYMO_MONITORING
+  provides interface RoutingTableInfo;
+#endif
+}
+
+implementation {
+
+  rt_entry_t table[maxsize];
+  rt_info_t buf_info;
+  uint8_t size; 
+  uint8_t num_entries;
+  uint8_t replace;
+
+  /* declared at the end */
+  void replace_info(uint8_t entry_id, const rt_info_t * route_info);
+  int8_t get_route(addr_t address);
+  void delete_route(uint8_t entry_id, reason_t r);
+  bool is_superior(const rt_info_t * info1, const rt_entry_t * entry, dymo_msg_t msg_type);
+  void set_timer(uint8_t entry_id, rt_timer_t timer_id);
+  void cancel_timer(uint8_t entry_id, rt_timer_t timer);
+  void cancel_timers(uint8_t entry_id);
+
+  command error_t StdControl.start(){
+    num_entries = 0;
+    size = 0;
+    replace = 0;
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop(){
+    uint8_t i;
+    for(i=0; i<num_entries; i++){
+      if( !(table[i].flags & FLAG_DELETED) ){
+	cancel_timers(i);
+      }
+    }
+    return SUCCESS;
+  }
+
+  command error_t RoutingTable.getForwardingRoute(addr_t address, rt_info_t * info){
+    int8_t i = get_route(address);
+    dbg("dt", "DT: Someone wants a forwarding route for %u.\n", address);
+    if(i == -1){
+      dbg("dt", "DT: But I don't have it. => brokenRouteNeeded\n");
+      buf_info.address = address;
+      buf_info.seqnum = 0;
+      buf_info.has_hopcnt = 0;
+      signal DymoTable.brokenRouteNeeded(&buf_info);
+      return FAIL;
+    }
+
+    //The caller may want to know what is in the table even if it is broken
+    if(info && !(table[i].flags & FLAG_DELETED)){
+      *info = table[i].info;
+    }
+
+    if(table[i].flags & (FLAG_BROKEN | FLAG_DELETED)){
+      dbg("dt", "DT: But it is deleted. => brokenRouteNeeded\n");
+      signal DymoTable.brokenRouteNeeded(&table[i].info); //TODO not if not used recently (for other signals too)
+      return FAIL;
+    }
+
+    cancel_timer(i, ROUTE_NEW);
+    table[i].flags &= ~FLAG_NEW;
+    cancel_timer(i, ROUTE_DELETE);
+    set_timer(i, ROUTE_USED);
+    table[i].flags |= FLAG_USED;
+    dbg("dt", "DT: Here it is: %u.\n", table[i].info.nexthop);
+    return SUCCESS;
+  }
+
+  command error_t RoutingTable.getRoute(addr_t address, rt_info_t * info){
+    int i = get_route(address);
+    dbg("dt", "DT: Someone wants a sending route for %u.\n", address);
+    if(i == -1){
+      dbg("dt", "DT: But I don't have it. => routeNeeded\n");
+      signal DymoTable.routeNeeded(address);
+      return EBUSY;
+    }
+
+    //The caller may want to know what is in the table even if it is broken
+    if(info){
+      *info = table[i].info;
+    }
+
+    if(table[i].flags & (FLAG_DELETED | FLAG_BROKEN)){
+      dbg("dt", "DT: But it is deleted or broken. => routeNeeded\n");
+      signal DymoTable.routeNeeded(address);
+      return EBUSY;
+    }
+    
+    //We assume the route is going to be used
+    cancel_timer(i, ROUTE_NEW);
+    table[i].flags &= ~FLAG_NEW;
+    cancel_timer(i, ROUTE_DELETE);
+    set_timer(i, ROUTE_USED);
+    table[i].flags |= FLAG_USED;
+    dbg("dt", "DT: Here it is: %u-%u-%hhu.\n", table[i].info.nexthop, table[i].info.seqnum, table[i].info.hopcnt);
+    return SUCCESS;
+  }
+
+  command error_t DymoTable.update(const rt_info_t * route_info, dymo_msg_t msg_type){
+    int8_t i = get_route(route_info->address);
+
+    if(msg_type == DYMO_RERR){
+
+      if(i != -1){
+	if( (table[i].info.nexthop == route_info->nexthop) 
+	    && ((table[i].info.seqnum == 0)
+		|| (route_info->seqnum == 0)
+		|| (route_info->seqnum >= table[i].info.seqnum)) ){
+	  table[i].flags |= FLAG_BROKEN;
+	  dbg("dt", "DT: Route for %u evicted because of a RERR.\n", route_info->address);
+	  signal RoutingTable.evicted(&table[i].info, REASON_UNREACHABLE);
+	  return SUCCESS;
+	} else {
+	  return EINVAL;
+	}
+      } else {
+	return EINVAL;
+      }
+
+    } else {
+
+      if(i == -1){
+	
+	if(num_entries < maxsize){ //We have room to add a new route
+	  
+	  replace_info(num_entries, route_info);
+	  num_entries++;
+	  size++;
+	  dbg("dt", "DT: Updated route for %u in entry %hhu.\n", route_info->address, num_entries-1); //TODO debug below too
+	  return SUCCESS;
+
+	} else { //We have to find a route to replace
+	  //TODO possible optimization : caching the last deleted and broken route
+	  int8_t j = -1; //will be set to a non-new route if found
+	  
+	  //We look for a deleted route
+	  for(i=0; i<num_entries; i++){
+	    if(table[i].flags & FLAG_DELETED){
+	      replace_info(i, route_info);
+	      return SUCCESS;
+	    }
+	  }
+
+	  //the table is full, we try to replace an existing route
+	  for(i=0; i<num_entries; i++){
+	    if(table[i].flags & FLAG_BROKEN){
+	      replace_info(i, route_info);
+	      return SUCCESS;
+	    } else if( !(table[i].flags & FLAG_NEW) ){
+	      j = i;
+	    }
+	  }
+
+	  //no broken route found, we a take a non-new route
+	  //TODO rather take a non-used route
+	  if(j != -1){
+	    delete_route(j, REASON_FULL);
+	    replace_info(j, route_info);
+	    return SUCCESS;
+	  }
+
+	  /* No room found. We delete a random route */
+	  delete_route(replace, REASON_FULL);
+	  replace_info(replace++, route_info);
+	  if (replace == maxsize)
+	    replace = 0;
+	  return SUCCESS;
+
+	}
+
+      } else { //if(i == -1)
+
+	if(is_superior(route_info, table + i, msg_type)){
+	  replace_info(i, route_info);
+	  return SUCCESS;
+	} else {
+	  return EINVAL;
+	}
+
+      }
+
+    }
+  }
+
+  command bool DymoTable.isSuperior(const rt_info_t * info, dymo_msg_t t){
+    int8_t i = get_route(info->address);
+    return ((i == -1) || is_superior(info, table + i, t));
+  }
+
+  event void Timer.fired[uint8_t timer_id](){
+    uint8_t e = timer_id / NB_ROUTE_TIMERS;
+    switch(timer_id % NB_ROUTE_TIMERS){
+    case ROUTE_AGE_MIN:
+      table[e].flags &= ~FLAG_NEW;
+      break;
+    case ROUTE_AGE_MAX:
+      dbg("dt", "DT: Route for %u is really old, I delete it.\n", table[e].info.address);
+      delete_route(e, REASON_OLD);
+      break;
+    case ROUTE_NEW:
+      table[e].flags &= ~FLAG_NEW;
+      set_timer(e, ROUTE_DELETE);
+      break;
+    case ROUTE_USED:
+      table[e].flags &= ~FLAG_USED;
+      set_timer(e, ROUTE_DELETE);
+      break;
+    case ROUTE_DELETE:
+      dbg("dt", "DT: Route for %u is unused, I delete it.\n", table[e].info.address);
+      delete_route(e, REASON_OLD);
+      break;
+    }
+  }
+
+  event void LinkMonitor.brokenLink(addr_t neighbor){
+    int8_t i = get_route(neighbor);
+    if (i != -1) {
+      table[i].flags |= FLAG_BROKEN;
+      signal RoutingTable.evicted(&table[i].info, REASON_UNREACHABLE);
+      if (table[i].flags & (FLAG_NEW | FLAG_USED)) {
+	cancel_timer(i, ROUTE_NEW);
+	cancel_timer(i, ROUTE_USED);
+	set_timer(i, ROUTE_DELETE);
+      }
+    }
+  }
+
+  event void LinkMonitor.refreshedLink(addr_t neighbor) {
+    int8_t i = get_route(neighbor);
+    if (i != -1) {
+      replace_info(i, &table[i].info);
+    }
+  }
+
+  void replace_info(uint8_t pos, const rt_info_t * route_info){
+    table[pos].info = *route_info;
+    table[pos].flags = FLAG_NEW;
+    cancel_timers(pos);
+    set_timer(pos, ROUTE_AGE_MIN);
+    set_timer(pos, ROUTE_AGE_MAX);
+    set_timer(pos, ROUTE_NEW);
+  }
+
+  /* Return the index of the route toward address if it exists, -1 otherwise */
+  int8_t get_route(addr_t address){
+    uint8_t i = 0;
+    for(i=0;i<num_entries;i++){
+      if(table[i].info.address == address){
+	return i;
+      }
+    }
+    return -1;
+  }
+
+  /* Remove a route from the table */
+  void delete_route(uint8_t entry_id, reason_t r){
+    table[entry_id].flags = FLAG_DELETED;
+    cancel_timers(entry_id);
+    dbg("dt", "DT: I'm deleting route number %hhu (for node %u).\n", entry_id, table[entry_id].info.address);
+    signal RoutingTable.evicted(&table[entry_id].info, r);
+  }
+
+  /* compare two pieces of routing information
+   * returns true if info1 > entry->info */
+  bool is_superior(const rt_info_t * info1, const rt_entry_t * entry, dymo_msg_t msg_type){
+    //a copy of the superior test in the specifications
+    //with nil values discarded
+    return ((info1->seqnum > entry->info.seqnum)
+	    || ((info1->seqnum == entry->info.seqnum)
+		&& info1->has_hopcnt
+		&& entry->info.has_hopcnt
+		&& ((info1->hopcnt < entry->info.has_hopcnt)
+		    || ((info1->hopcnt == entry->info.has_hopcnt)
+			&& ((msg_type == DYMO_RREP)
+			    || (entry->flags & FLAG_BROKEN))))));
+  }
+
+  /* Start a timer for a route */
+  void set_timer(uint8_t entry_id, rt_timer_t timer_id){
+    call Timer.startOneShot[entry_id * NB_ROUTE_TIMERS + timer_id](timer_values[timer_id]);
+  }
+
+  /* Cancel a timer for a route */
+  void cancel_timer(uint8_t entry_id, rt_timer_t timer_id){
+    call Timer.stop[entry_id * NB_ROUTE_TIMERS + timer_id]();
+  }
+
+  /* Cancel all the timers of an entry */
+  void cancel_timers(uint8_t entry_id){
+    uint8_t i = entry_id * NB_ROUTE_TIMERS;
+    for(i=0; i<NB_ROUTE_TIMERS; i++){
+      call Timer.stop[i]();
+    }
+  }
+
+#ifdef DYMO_MONITORING
+
+  command uint8_t RoutingTableInfo.size(){
+    return size;
+  }
+
+  command uint8_t RoutingTableInfo.maxSize(){
+    return maxsize;
+  }
+
+  command uint8_t  RoutingTableInfo.getTableContent(rt_info_t * buf){
+    uint8_t i=0, j=0;
+    for(i=0; i<num_entries; i++){
+      if( !(table[i].flags & (FLAG_DELETED | FLAG_BROKEN)) ){
+	buf[j++] = table[i].info;
+      }
+    }
+    return j;
+  }
+
+  command uint8_t RoutingTableInfo.getLinks(rt_link_t * buf){
+    uint8_t i=0, j=0;
+    for(i=0; i<num_entries; i++){
+      if( !(table[i].flags & (FLAG_DELETED | FLAG_BROKEN)) ){
+	buf[j].target = table[i].info.address;
+	buf[j].nexthop = table[i].info.nexthop;
+	j++;
+      }
+    }
+    return j;
+  }
+
+#endif
+
+ default event void RoutingTable.evicted(const rt_info_t * route_info, reason_t r){ }
+
+}
+
diff --git a/tos/lib/net/tymo/dymo/NetControlM.nc b/tos/lib/net/tymo/dymo/NetControlM.nc
new file mode 100644
index 00000000..a50b8596
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/NetControlM.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+/**
+ * NetControlM - Manages the control of all components involved in the
+ * DymoNetwork component.
+ *
+ * @author Romain Thouvenin
+ */
+
+// TODO generalize to a multiControl
+module NetControlM {
+  provides interface SplitControl;
+  uses {
+    interface SplitControl as AMControl;
+    interface StdControl   as TableControl;
+    interface SplitControl as EngineControl;
+  }
+}
+
+implementation {
+  uint8_t started;
+
+  command error_t SplitControl.start(){
+    error_t e = call TableControl.start();
+    started = 1;
+
+    if(e == SUCCESS){
+
+      e = call AMControl.start();
+      if(e == SUCCESS)
+	return call EngineControl.start();
+      else
+	return e;
+      
+    } else {
+      return e;
+    }
+  }
+
+  event void AMControl.startDone(error_t e){
+    if (e == SUCCESS) {
+      if (started++ == 2)
+	signal SplitControl.startDone(e);
+    } else if (started) {
+      started = 0;
+      signal SplitControl.startDone(e);
+    }
+  }
+
+  event void EngineControl.startDone(error_t e) {
+    if (e == SUCCESS) {
+      if (started++ == 2)
+	signal SplitControl.startDone(e);
+    } else if (started) {
+      started = 0;
+      signal SplitControl.startDone(e);
+    }
+  }
+
+  command error_t SplitControl.stop(){
+    if(call AMControl.stop() == SUCCESS)
+      return call TableControl.stop();
+    else
+      return FAIL;
+  }
+
+  event void AMControl.stopDone(error_t e){
+    signal SplitControl.stopDone(e);
+  }
+
+  event void EngineControl.stopDone(error_t e){ }
+
+}
diff --git a/tos/lib/net/tymo/dymo/PacketMaker.nc b/tos/lib/net/tymo/dymo/PacketMaker.nc
new file mode 100644
index 00000000..9444b9c4
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/PacketMaker.nc
@@ -0,0 +1,10 @@
+interface PacketMaker {
+
+  command uint16_t getSize(message_t * msg);
+
+  command void createRM(message_t * msg, dymo_msg_t msg_type, 
+			const rt_info_t * origin, const rt_info_t * target);
+
+  command error_t addInfo(message_t * msg, const rt_info_t * info);
+
+}
diff --git a/tos/lib/net/tymo/dymo/dymo_packet.h b/tos/lib/net/tymo/dymo/dymo_packet.h
new file mode 100644
index 00000000..646ac869
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/dymo_packet.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "routing.h"
+
+typedef enum block_semantics {
+  BLOCK_HEAD = 0x1,
+  BLOCK_SEQNUM = 0x2,
+  BLOCK_HOPCNT = 0x4
+} block_semantics_t;
diff --git a/tos/lib/net/tymo/dymo/dymo_table.h b/tos/lib/net/tymo/dymo/dymo_table.h
new file mode 100644
index 00000000..2b2d9315
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/dymo_table.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#ifndef _DYMO_TABLE_H_
+#define _DYMO_TABLE_H_
+
+#include "routing_table.h"
+
+/**
+ * Types associated to a dymo routing table.
+ * @author Romain Thouvenin
+ */
+
+typedef struct rt_entry {
+  rt_info_t info;
+  uint8_t flags;
+} rt_entry_t;
+
+typedef enum {
+  FLAG_BROKEN = 0x01,
+  FLAG_NEW = 0x02,
+  FLAG_USED = 0x04,
+  FLAG_DELETED = 0x08,
+} rt_flag_t;
+
+typedef enum { //TODO optimize the number of timers
+  ROUTE_AGE_MIN = 0,
+  ROUTE_AGE_MAX,
+  ROUTE_NEW,
+  ROUTE_USED,
+  ROUTE_DELETE,
+  NB_ROUTE_TIMERS
+} rt_timer_t;
+
+uint32_t timer_values[NB_ROUTE_TIMERS] = {
+  1000,                //ROUTE_AGE_MIN
+  DYMO_ROUTE_AGE_MAX,  //ROUTE_AGE_MAX
+  DYMO_ROUTE_TIMEOUT,   //ROUTE_NEW
+  DYMO_ROUTE_TIMEOUT,   //ROUTE_USED
+  DYMO_ROUTE_TIMEOUT * 2   //ROUTE_DELETE
+};
+
+
+#endif
diff --git a/tos/lib/net/tymo/dymo/sim/DymoEngineM.nc b/tos/lib/net/tymo/dymo/sim/DymoEngineM.nc
new file mode 100644
index 00000000..3b070f63
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/sim/DymoEngineM.nc
@@ -0,0 +1,416 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "routing.h"
+#include "routing_table.h"
+
+/**
+ * DymoEngineM - Implements the algorithms to generate and process
+ * DYMO messages. This the simultor version, without persistent
+ * storage of the seqnum.
+ *
+ * @author Romain Thouvenin
+ */
+
+module DymoEngineM {
+  provides {
+    interface SplitControl;
+  }
+  uses {
+    interface DymoTable;
+    interface RoutingTable;
+    interface DymoPacket;
+    interface AMSend;
+    interface AMPacket;
+    interface Receive;
+  }
+
+#ifdef DYMO_MONITORING
+  provides interface DymoMonitor;
+  uses {
+    interface Timer<TMilli>;
+  }
+#endif
+}
+
+implementation {
+  message_t * avail_msg; //to be returned by receive
+  message_t buf_avail;   //first avail_msg
+  message_t buf_packet;
+  rt_info_t me;
+  rt_info_t buf_info;
+  addr_t ignoreNeeded;
+  bool busySend;
+
+  /* for processing */
+  bool busyProcess, busyIssue;
+  uint8_t cur_hopcnt;
+  uint8_t cur_info_pos;
+  rt_info_t buf_target;
+  addr_t fw_address; //set to 0 if the message must not be forwarded
+  message_t fw_msg;
+  bool sendRREP;
+
+#ifdef DYMO_MONITORING
+  uint32_t rreq_time;
+#endif
+
+
+  task void startDoneTask() {
+    signal SplitControl.startDone(SUCCESS);
+  }
+
+  command error_t SplitControl.start(){
+    me.address = call AMPacket.address();
+    me.seqnum = 1;
+    me.has_hopcnt = 1;
+    me.hopcnt = 0;
+
+    avail_msg = &buf_avail;
+    ignoreNeeded = 0;
+    sendRREP = FALSE;
+    busyProcess = FALSE;
+    busyIssue = FALSE;
+    busySend = FALSE;
+    buf_target.address = 0;
+    
+#ifdef DYMO_MONITORING
+    rreq_time = 0;
+#endif
+
+    post startDoneTask();
+    return SUCCESS;
+  }
+
+  void incr_seqnum(){
+    if(me.seqnum == 65535)
+      me.seqnum = 256;
+    else
+      me.seqnum++;
+  }
+
+  /* Send a RREQ for buf_info */
+  task void issueRREQ(){
+    atomic {
+      if(busySend)
+	post issueRREQ();
+      else {
+	busySend = TRUE;
+	incr_seqnum();
+	call DymoPacket.createRM(&buf_packet, DYMO_RREQ, &me, &buf_info);
+	call AMSend.send(AM_BROADCAST_ADDR, &buf_packet, call DymoPacket.getSize(&buf_packet));
+      }
+    }
+  }
+
+  /* Send a RREP to buf_info */
+  task void issueRREP(){
+    atomic {
+      if(busySend)
+	post issueRREP();
+      else {
+	busySend = TRUE;
+	call DymoPacket.createRM(&buf_packet, DYMO_RREP, &me, &buf_info);
+	if(buf_target.address)
+	  call DymoPacket.addInfo(&buf_packet, &buf_target);
+	call AMSend.send(buf_info.nexthop, &buf_packet, call DymoPacket.getSize(&buf_packet));
+	buf_target.address = 0;
+      }
+    }
+  }
+
+  /* Send a RERR with buf_info as unreachable */
+  task void issueRERR(){
+    atomic {
+      if(busySend)
+	post issueRERR();
+      else {
+	busySend = TRUE;
+	call DymoPacket.createRM(&buf_packet, DYMO_RERR, NULL, &buf_info);
+	call AMSend.send(AM_BROADCAST_ADDR, &buf_packet, call DymoPacket.getSize(&buf_packet));
+      }
+    }
+  }
+
+  /* Send current fw_msg to fw_address */
+  task void forward(){
+    atomic {
+      if(busySend)
+	post forward();
+      else {
+	busySend = TRUE;
+	call AMSend.send(fw_address, &fw_msg, call DymoPacket.getSize(&fw_msg));
+      }
+    }
+  }
+
+  event message_t* Receive.receive(message_t* msg, void* payload, uint8_t len){
+#ifdef DYMO_MONITORING
+    signal DymoMonitor.msgReceived(msg);
+#endif
+    dbg("de", "DE: Message (type %hhu) received.\n", call DymoPacket.getType(msg));
+    atomic {
+      if(busyProcess){
+	dbg("de", "DE: I'm busy, I can't handle this message, sorry.\n");
+	return msg; //we discard msg if a message is already being processed
+      } else {
+	busyProcess = TRUE;
+      }
+    }
+    cur_info_pos = 0;
+    fw_address = AM_BROADCAST_ADDR;
+    call DymoPacket.startProcessing(msg, &fw_msg);
+    return avail_msg;
+  }
+
+  event proc_action_t DymoPacket.hopsProcessed(message_t * msg, uint8_t hop_limit, uint8_t hop_count){
+    cur_hopcnt = hop_count; //TODO use this
+    if(hop_limit == 0){
+      fw_address = 0;
+      dbg("de", "DE: This message has reached its HL (%hhu hops) => discard.\n", hop_count);
+      return ACTION_DISCARD_MSG;
+    } else {
+      return ACTION_KEEP;
+    }
+  }
+
+  proc_action_t process_rm_info(message_t * msg, rt_info_t * info){
+    cur_info_pos++;
+    if(cur_info_pos == 1){ //target
+
+      if(info->address == me.address){
+
+	if(call DymoPacket.getType(msg) == DYMO_RREQ){
+	  dbg("de", "DE: This RREQ is for me => RREP.\n");
+	  if(info->seqnum < me.seqnum)
+	    incr_seqnum();
+	  dbg("de", "DE: My seqnum for the RREP: %u.\n", me.seqnum);
+	  sendRREP = TRUE; //to send a RREP when we receive the next event (= originator info)
+	} else {
+	  dbg("de", "DE: This RREP is for me, cool!\n");
+	}
+	fw_address = 0;
+	return ACTION_DISCARD_MSG;
+
+      } else { //not for me
+
+	info->nexthop = call AMPacket.source(msg);
+	if(call DymoPacket.getType(msg) == DYMO_RREQ){
+
+#if DYMO_INTER_RREP
+	  //if we know a route to the target, we send a intermediate RREP and don't forward the message
+	  ignoreNeeded = info->address;
+	  if (call RoutingTable.getRoute(info->address, &buf_info) == SUCCESS) {
+#if DYMO_FORCE_INTER_RREP
+	    if( !info->seqnum || !(call DymoTable.isSuperior(info, DYMO_RREQ)) ){
+#else
+	    if( info->seqnum && !(call DymoTable.isSuperior(info, DYMO_RREQ)) ){
+#endif
+	      dbg("de", "DE: This RREQ is for %u, but I know the route => RREP.\n", info->address);
+	      dbg("de", "DE: My seqnum for the RREP: %u.\n", me.seqnum);
+	      buf_target = buf_info;
+	      sendRREP = TRUE;
+	      fw_address = 0;
+	      return ACTION_DISCARD_MSG;
+	    }
+	  }
+#endif
+	  return ACTION_KEEP;
+
+	} else { //RREP
+
+	  ignoreNeeded = info->address;
+	  dbg("de", "DE: This RREP is for %u.\n", info->address);
+	  if(call RoutingTable.getForwardingRoute(info->address, &buf_info) == SUCCESS){
+	    fw_address = buf_info.nexthop;
+	    return ACTION_KEEP;
+	  } else {
+	    fw_address = 0;
+	    return ACTION_DISCARD_MSG;
+	  }
+
+	}//end RREP
+
+      }//end not for me
+
+    } else if((call DymoPacket.getType(msg) == DYMO_RREQ) //end if(info==target)
+	      && (cur_info_pos == 2)
+	      && (info->address == me.address)){
+
+      fw_address = 0;
+      sendRREP = FALSE;
+      return ACTION_DISCARD_MSG;
+
+    } else {
+
+      info->nexthop = call AMPacket.source(msg);
+      if(call DymoTable.update(info, call DymoPacket.getType(msg)) == EINVAL){
+
+	if(cur_info_pos == 2){ //origin
+	  dbg("de", "DE: I am discarding a msg with a bad origin (%u-%u-%hhu)\n", info->address, info->seqnum, info->hopcnt);
+	  fw_address = 0;
+	  return ACTION_DISCARD_MSG;
+	} else {               //Additional info
+	  dbg("de", "DE: I am discarding a bad piece of info (%u-%u-%hhu)\n", info->address, info->seqnum, info->hopcnt);
+	  return ACTION_DISCARD;
+	}
+
+      } else {
+
+	if((cur_info_pos == 2) && sendRREP){
+	  buf_info = *info;
+	  atomic {
+	    if(!busyIssue){
+	      busyIssue = 1;
+	      post issueRREP();
+	    }
+	  }
+	  sendRREP = 0;
+	}
+
+#ifdef DYMO_MONITORING 
+	if( rreq_time    //TODO probably misses a test
+	    && (cur_info_pos == 2)
+	    && (call DymoPacket.getType(msg) == DYMO_RREP) ) {
+	  rreq_time = (call Timer.getNow()) - rreq_time;
+	  signal DymoMonitor.routeDiscovered(rreq_time, info->address);
+	  rreq_time = 0;
+	}
+#endif
+	return ACTION_KEEP;
+
+      }
+
+    } //end info!=target
+  }//end event
+
+  proc_action_t process_err_info(message_t * msg, rt_info_t * info){
+    info->nexthop = call AMPacket.source(msg);
+    if(call DymoTable.update(info, call DymoPacket.getType(msg)) == EINVAL){
+      return ACTION_DISCARD;       
+    } else {
+      cur_info_pos++; //we only count kept pieces of info
+      return ACTION_KEEP;
+    }
+  }
+
+  event proc_action_t DymoPacket.infoProcessed(message_t * msg, rt_info_t * info){
+    if(call DymoPacket.getType(msg) == DYMO_RERR)
+      return process_err_info(msg, info);
+    else
+      return process_rm_info(msg, info);
+  }
+
+  event void DymoPacket.messageProcessed(message_t * msg){
+    avail_msg = msg;
+    if( (call DymoPacket.getType(msg) == DYMO_RERR) && cur_info_pos ){
+
+      post forward();
+
+    } else if( (call DymoPacket.getType(msg) != DYMO_RERR) && fw_address ){
+
+#if DYMO_APPEND_INFO
+      call DymoPacket.addInfo(&fw_msg, me);
+#endif
+      dbg("de", "DE: I'll forward this RM.\n");
+      post forward();
+
+    } else {
+
+      atomic {
+	busyProcess = 0;
+      }
+      dbg("de", "DE: I'm not busy anymore.\n");
+
+    }
+    dbg("de", "DE: Message (type %hhu) successfully processed.\n", call DymoPacket.getType(msg));
+  }
+
+  event void DymoTable.routeNeeded(addr_t destination){
+    if(ignoreNeeded == destination){
+      ignoreNeeded = 0;
+    } else {
+      buf_info.address = destination;
+      buf_info.seqnum = 0;
+      buf_info.has_hopcnt = FALSE;
+      atomic {
+	if(!busyIssue){
+	  busyIssue = TRUE;
+#ifdef DYMO_MONITORING
+	  rreq_time = call Timer.getNow();
+#endif
+	  post issueRREQ();
+	}
+      }
+    }
+  }
+  
+  event void DymoTable.brokenRouteNeeded(const rt_info_t * route_info){
+    buf_info = *route_info;
+    buf_info.has_hopcnt = FALSE;
+    atomic {
+      if(!busyIssue){
+	busyIssue = TRUE;
+	post issueRERR();
+      }
+    }
+  }
+
+  event void RoutingTable.evicted(const rt_info_t * route_info, reason_t r){
+    if(r == REASON_UNREACHABLE){
+      buf_info = *route_info;
+      buf_info.has_hopcnt = FALSE;
+      atomic {
+	if(!busyIssue){
+	  busyIssue = TRUE;
+	  post issueRERR();
+	}
+      }
+    }
+  }
+
+  event void AMSend.sendDone(message_t *msg, error_t error){
+    atomic {
+      busySend = FALSE;
+    }
+    if(msg == &fw_msg){
+      atomic{
+	busyProcess = FALSE;
+      }
+    } else if(msg == &buf_packet) {
+      atomic {
+	busyIssue = FALSE;
+      }
+    }
+
+    if(error == SUCCESS){
+      if(msg == &fw_msg)
+	dbg("de", "DE: Message (type %hhu) forwarded.\n", call DymoPacket.getType(msg));
+      else
+	dbg("de", "DE: Message (type %hhu) sent.\n", call DymoPacket.getType(msg));
+    } else
+      dbg("de", "DE: Failed to send message (type %hhu).\n", call DymoPacket.getType(msg));
+
+#ifdef DYMO_MONITORING
+    if(error == SUCCESS)
+      signal DymoMonitor.msgSent(msg);
+#endif
+  }
+
+  command error_t SplitControl.stop(){ }
+
+#ifdef DYMO_MONITORING
+
+  event void Timer.fired(){}
+
+ default event void DymoMonitor.msgReceived(message_t * msg){}
+
+ default event void DymoMonitor.msgSent(message_t * msg){}
+
+ default event void DymoMonitor.routeDiscovered(uint32_t delay, addr_t target){}
+
+#endif
+}
+
diff --git a/tos/lib/net/tymo/dymo/sim/DymoServiceC.nc b/tos/lib/net/tymo/dymo/sim/DymoServiceC.nc
new file mode 100644
index 00000000..58170757
--- /dev/null
+++ b/tos/lib/net/tymo/dymo/sim/DymoServiceC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+/**
+ * DymoServiceC - Implements the DYMO routing protocol This is the
+ * simulator version, without persistent storage of the sequence
+ * number.
+ *
+ *  @author Romain Thouvenin
+ */
+
+configuration DymoServiceC {
+  provides {
+    interface SplitControl;
+  }
+  uses {
+    interface Packet;
+    interface AMPacket;
+    interface AMSend;
+    interface Receive;
+    interface LinkMonitor;
+  }
+
+#ifdef DYMO_MONITORING
+  provides {
+    interface DymoMonitor;
+  }
+#endif
+}
+
+implementation {
+  components DymoTableC, DymoEngineM, DymoPacketM;
+
+  SplitControl = DymoEngineM.SplitControl;
+  Packet       = DymoPacketM.Packet;
+  AMPacket     = DymoEngineM.AMPacket;
+  AMSend       = DymoEngineM.AMSend;
+  Receive      = DymoEngineM.Receive;
+  LinkMonitor  = DymoTableC.LinkMonitor;
+
+  DymoEngineM.DymoPacket   -> DymoPacketM;
+  DymoEngineM.RoutingTable -> DymoTableC;
+  DymoEngineM.DymoTable    -> DymoTableC;
+
+#ifdef DYMO_MONITORING
+  components new TimerMilliC();
+
+  DymoMonitor = DymoEngineM.DymoMonitor;
+  DymoEngineM.Timer     -> TimerMilliC;
+#endif
+}
diff --git a/tos/lib/net/tymo/mh/MHControl.nc b/tos/lib/net/tymo/mh/MHControl.nc
new file mode 100644
index 00000000..a0cff2f2
--- /dev/null
+++ b/tos/lib/net/tymo/mh/MHControl.nc
@@ -0,0 +1,7 @@
+interface MHControl {
+
+  event void msgReceived(message_t * msg);
+
+  event void sendFailed(message_t * msg, uint8_t why);
+
+}
diff --git a/tos/lib/net/tymo/mh/MHEngineM.nc b/tos/lib/net/tymo/mh/MHEngineM.nc
new file mode 100644
index 00000000..d8efe3b9
--- /dev/null
+++ b/tos/lib/net/tymo/mh/MHEngineM.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "routing.h"
+
+/**
+ * MHEngineM - Implements a simple transport protocol, which is
+ * nothing more than AM on top of the existing AM stack.
+ *
+ * @author Romain Thouvenin
+ */
+module MHEngineM {
+  provides interface RouteSelect;
+  uses {
+    interface AMPacket as MHPacket;
+    interface AMPacket;
+    interface RoutingTable;
+  }
+}
+
+implementation {
+
+  rt_info_t info;
+
+  command fw_action_t RouteSelect.selectRoute(message_t * msg, addr_t * destination, uint8_t * am_type){
+    dbg("mhe", "MHE: Somebody wants a route, let's see...\n");
+    if( call MHPacket.isForMe(msg) 
+	|| (destination && (*destination == call MHPacket.address())) ){
+      
+      *am_type = call MHPacket.type(msg);
+      return FW_RECEIVE;
+
+    } else {
+      
+      error_t e;
+      if(destination)
+	e = call RoutingTable.getRoute(*destination, &info);
+      else
+	e = call RoutingTable.getForwardingRoute(call MHPacket.destination(msg), &info);
+
+      if(e == SUCCESS){
+
+	dbg("mhe", "MHE: I've selected a route to %u through %u.\n", info.address, info.nexthop);
+	call AMPacket.setDestination(msg, info.nexthop);
+
+	if(destination){
+	  call MHPacket.setType(msg, *am_type);
+	  call MHPacket.setDestination(msg, *destination);
+	  call MHPacket.setSource(msg, call MHPacket.address());
+	} else {
+	  *am_type = call MHPacket.type(msg);
+	}
+	return FW_SEND;
+
+      } else if(e == EBUSY){
+	dbg("mhe", "MHE: No route is available for now.\n");
+	return FW_WAIT;
+      } else {
+	dbg("mhe", "MHE: I'm discarding the message.\n");
+	return FW_DISCARD;
+      }
+
+    }
+  }
+
+  event void RoutingTable.evicted(const rt_info_t * rt_info, reason_t r){}
+
+}
diff --git a/tos/lib/net/tymo/mh/MHPacketM.nc b/tos/lib/net/tymo/mh/MHPacketM.nc
new file mode 100644
index 00000000..24d39066
--- /dev/null
+++ b/tos/lib/net/tymo/mh/MHPacketM.nc
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#include "mhpacket.h"
+
+#define HEADER  ((mhpacket_header_t *)(call SubPacket.getPayload(amsg, call SubPacket.maxPayloadLength())))
+
+/**
+ * MHPacketM - Implements ActiveMessage on top of ActiveMessage,
+ * to transport data in a multihop network.
+ *
+ * @author Romain Thouvenin
+ */
+
+module MHPacketM {
+  provides {
+    interface Packet;
+    interface AMPacket as MHPacket;
+  }
+  uses {
+    interface Packet as SubPacket;
+    interface AMPacket;
+  }
+}
+
+implementation {
+  
+  /**********
+   * Packet *
+   **********/
+
+  command void Packet.clear(message_t *msg){
+    call SubPacket.clear(msg);
+  }
+
+  command void * Packet.getPayload(message_t *msg, uint8_t len){
+    nx_uint8_t * p = call SubPacket.getPayload(msg, len + sizeof(mhpacket_header_t));
+    return (void *)(p + sizeof(mhpacket_header_t));
+  }
+
+  command uint8_t Packet.maxPayloadLength(){
+    return call SubPacket.maxPayloadLength() - sizeof(mhpacket_header_t);
+  }
+
+  command uint8_t Packet.payloadLength(message_t *amsg){
+    return HEADER->len;
+  }
+
+  command void Packet.setPayloadLength(message_t *amsg, uint8_t len){
+    HEADER->len = len;
+    call SubPacket.setPayloadLength(amsg, len + sizeof(mhpacket_header_t));
+  }
+
+  
+  /**********
+   * AMPacket *
+   **********/
+
+  command am_addr_t MHPacket.address(){
+    return call AMPacket.address();
+  }
+
+  command am_addr_t MHPacket.destination(message_t *amsg){
+    return HEADER->dest;
+  }
+
+  command bool MHPacket.isForMe(message_t *amsg){
+    return ((HEADER->dest == call MHPacket.address()) || (HEADER->dest == AM_BROADCAST_ADDR));
+  }
+
+  command void MHPacket.setDestination(message_t *amsg, am_addr_t addr){
+    HEADER->dest = addr;
+  }
+
+  command void MHPacket.setSource(message_t *amsg, am_addr_t addr){
+    HEADER->src = addr;
+  }
+
+  command void MHPacket.setType(message_t *amsg, am_id_t t){
+    HEADER->type = t;
+    call AMPacket.setType(amsg, AM_MULTIHOP);
+  }
+
+  command am_addr_t MHPacket.source(message_t *amsg){
+    return HEADER->src;
+  }
+
+  command am_id_t MHPacket.type(message_t *amsg){
+    return HEADER->type;
+  }
+
+  /* *** UNIMPLEMENTED ! *** */
+  //TODO what to do with this?
+
+  command am_group_t MHPacket.group(message_t* amsg) {
+    return 0;
+  }
+
+  command void MHPacket.setGroup(message_t* amsg, am_group_t grp) { }
+
+  command am_group_t MHPacket.localGroup() {
+    return 0;
+  }
+
+}
diff --git a/tos/lib/net/tymo/mh/MHServiceC.nc b/tos/lib/net/tymo/mh/MHServiceC.nc
new file mode 100644
index 00000000..af0e96e1
--- /dev/null
+++ b/tos/lib/net/tymo/mh/MHServiceC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+/**
+ * MHServiceC - Implements a simple multihop transport protocol
+ *
+ * @author Romain Thouvenin
+ */
+
+configuration MHServiceC {
+  provides { //For upper layer
+    interface AMSend as MHSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Intercept[uint8_t id];
+    interface AMPacket as MHPacket;
+    interface Packet;
+    interface LinkMonitor;
+  }
+  uses {  //From lower layer
+    interface AMPacket;
+    interface Packet as SubPacket;
+    interface AMSend;
+    interface Receive as SubReceive;
+    interface PacketAcknowledgements as Acks;
+  }
+
+  provides interface MHControl;
+}
+
+implementation {
+  components DymoTableC, MHEngineM, MHPacketM;
+  components new ForwardingEngineM(), new TimerMilliC();
+
+  //provides
+  MHSend      = ForwardingEngineM.AMSend;
+  Receive     = ForwardingEngineM.Receive;
+  Intercept   = ForwardingEngineM.Intercept;
+  LinkMonitor = ForwardingEngineM.LinkMonitor;
+  MHPacket    = MHPacketM.MHPacket;
+  Packet      = MHPacketM.Packet;
+  Acks        = ForwardingEngineM.Acks;
+
+  //uses
+  ForwardingEngineM.AMPacket   = AMPacket;  
+  MHEngineM.AMPacket	       = AMPacket;  
+  MHPacketM.AMPacket	       = AMPacket;  
+  MHPacketM.SubPacket	       = SubPacket; 
+  ForwardingEngineM.SubPacket  = SubPacket; 
+  ForwardingEngineM.SubSend    = AMSend;    
+  ForwardingEngineM.SubReceive = SubReceive;
+
+  //MHEngine
+  MHEngineM.MHPacket     -> MHPacketM.MHPacket;
+  MHEngineM.RoutingTable -> DymoTableC;
+
+  //ForwardingEngine
+  ForwardingEngineM.RouteSelect -> MHEngineM;
+  ForwardingEngineM.PPacket     -> MHPacketM.Packet;
+  ForwardingEngineM.Timer       -> TimerMilliC;
+
+  MHControl = ForwardingEngineM.MHControl;
+}
diff --git a/tos/lib/net/tymo/mh/mhpacket.h b/tos/lib/net/tymo/mh/mhpacket.h
new file mode 100644
index 00000000..1b33f61d
--- /dev/null
+++ b/tos/lib/net/tymo/mh/mhpacket.h
@@ -0,0 +1,24 @@
+#ifndef MHPACKET_H
+#define MHPACKET_H
+
+#include "AM.h"
+#include "message.h"
+#include "routing.h"
+
+typedef nx_struct mhpacket_header {
+  nx_uint8_t len;
+  nx_uint8_t type;
+  nx_am_addr_t src;
+  nx_am_addr_t dest;
+} mhpacket_header_t;
+
+typedef nx_struct mhpacket {
+  mhpacket_header_t header;
+  nx_uint8_t data[];
+} mhpacket_t;
+
+enum { //for mig
+  AM_MHPACKET = AM_MULTIHOP,
+};
+
+#endif
diff --git a/tos/lib/net/tymo/routing.h b/tos/lib/net/tymo/routing.h
new file mode 100644
index 00000000..95ca305b
--- /dev/null
+++ b/tos/lib/net/tymo/routing.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#ifndef _DYMO_ROUTING_H_
+#define _DYMO_ROUTING_H_
+
+#include "AM.h"
+
+typedef am_addr_t addr_t;
+typedef nx_am_addr_t nx_addr_t;
+typedef uint16_t seqnum_t;
+typedef nx_uint16_t nx_seqnum_t;
+
+#ifndef MAX_TABLE_SIZE
+#define MAX_TABLE_SIZE 5
+#endif
+
+#ifndef DYMO_HOPLIMIT
+#define DYMO_HOPLIMIT 10
+#endif
+
+#ifndef DYMO_ROUTE_AGE_MAX
+#define DYMO_ROUTE_AGE_MAX 300000
+#endif
+
+#ifndef DYMO_ROUTE_TIMEOUT
+#define DYMO_ROUTE_TIMEOUT 10000
+#endif
+
+#ifndef DYMO_APPEND_INFO
+#define DYMO_APPEND_INFO      0      //1 to append info to forwarded RMs
+#endif
+
+#ifndef DYMO_INTER_RREP
+#define DYMO_INTER_RREP       1      //1 to allow intermediate RREP 
+#endif
+
+#ifndef DYMO_FORCE_INTER_RREP
+#define DYMO_FORCE_INTER_RREP 1      //1 to send intermediate RREP even without target's seqnum in the RREQ
+#endif
+
+#ifndef DYMO_LINK_FEEDBACK
+#define DYMO_LINK_FEEDBACK    1      //1 to use acks to detect broken links
+#endif
+
+enum {
+  AM_MULTIHOP = 9,
+  AM_DYMO = 8
+};
+
+typedef enum {
+  DYMO_RREQ = 10,
+  DYMO_RREP,
+  DYMO_RERR
+} dymo_msg_t;
+
+//processing action
+typedef enum {
+  ACTION_KEEP,   //info is kept in the forwarded message
+  //  ACTION_UPDATE, //info is kept, and updated with the provided info
+  ACTION_DISCARD, //info is not kept in the forwarded message
+  ACTION_DISCARD_MSG //The message won't be forwarded, no need to build a forwarded message anymore
+} proc_action_t;
+
+typedef enum {
+  FW_SEND,      //Put the message in the sending queue
+  FW_RECEIVE,   //Give the message to the upper layer
+  FW_WAIT,      //Retry later
+  FW_DISCARD,   //Discard the message
+} fw_action_t;
+
+
+#endif
diff --git a/tos/lib/net/tymo/routing_table.h b/tos/lib/net/tymo/routing_table.h
new file mode 100644
index 00000000..b9a54cd3
--- /dev/null
+++ b/tos/lib/net/tymo/routing_table.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2007 Romain Thouvenin <romain.thouvenin@gmail.com>
+ * Published under the terms of the GNU General Public License (GPLv2).
+ */
+
+#ifndef _ROUTING_TABLE_H_
+#define _ROUTING_TABLE_H_
+
+#include "routing.h"
+
+/**
+ * Types associated to a routing table.
+ */
+
+typedef struct rt_info {
+  addr_t address;
+  addr_t nexthop;
+  seqnum_t seqnum;
+  bool has_hopcnt;
+  uint8_t hopcnt;
+} rt_info_t;
+
+typedef enum {
+  REASON_FULL,
+  REASON_OLD,
+  REASON_UNREACHABLE
+} reason_t;
+
+#endif
diff --git a/tos/lib/net/zigbee/apps/AssociationExample/AssociationExampleC.nc b/tos/lib/net/zigbee/apps/AssociationExample/AssociationExampleC.nc
new file mode 100644
index 00000000..bebb5067
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/AssociationExample/AssociationExampleC.nc
@@ -0,0 +1,61 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+#include <Timer.h>
+
+#include "associationexample.h"
+#include "phy_const.h"
+#include "phy_enumerations.h"
+#include "mac_const.h"
+#include "mac_enumerations.h"
+#include "mac_func.h"
+
+
+configuration AssociationExampleC {
+}
+implementation {
+
+  components MainC;
+  components LedsC;
+  components AssociationExampleP;
+    
+  AssociationExampleP.Boot -> MainC;
+    
+  components MacC;
+  
+  AssociationExampleP.Leds -> LedsC;
+  
+  components new TimerMilliC() as Timer0;
+  AssociationExampleP.Timer0 -> Timer0;
+   
+  components new TimerMilliC() as Timer_Send;
+  AssociationExampleP.Timer_Send ->Timer_Send;
+   
+   
+  //MAC interfaces
+  
+  AssociationExampleP.MLME_START -> MacC.MLME_START;
+  
+  AssociationExampleP.MLME_GET ->MacC.MLME_GET;
+  AssociationExampleP.MLME_SET ->MacC.MLME_SET;
+  
+  AssociationExampleP.MLME_BEACON_NOTIFY ->MacC.MLME_BEACON_NOTIFY;
+  AssociationExampleP.MLME_GTS -> MacC.MLME_GTS;
+  
+  AssociationExampleP.MLME_ASSOCIATE->MacC.MLME_ASSOCIATE;
+  AssociationExampleP.MLME_DISASSOCIATE->MacC.MLME_DISASSOCIATE;
+  
+  AssociationExampleP.MLME_ORPHAN->MacC.MLME_ORPHAN;
+  AssociationExampleP.MLME_SYNC->MacC.MLME_SYNC;
+  AssociationExampleP.MLME_SYNC_LOSS->MacC.MLME_SYNC_LOSS;
+  AssociationExampleP.MLME_RESET->MacC.MLME_RESET;
+  
+  AssociationExampleP.MLME_SCAN->MacC.MLME_SCAN;
+  
+  
+  AssociationExampleP.MCPS_DATA->MacC.MCPS_DATA;
+  
+  
+}
diff --git a/tos/lib/net/zigbee/apps/AssociationExample/AssociationExampleP.nc b/tos/lib/net/zigbee/apps/AssociationExample/AssociationExampleP.nc
new file mode 100644
index 00000000..6ba8d550
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/AssociationExample/AssociationExampleP.nc
@@ -0,0 +1,489 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+#include <Timer.h>
+#include "printfUART.h"
+
+module AssociationExampleP {
+
+	uses interface Boot;
+	uses interface Leds;
+	
+	uses interface Timer<TMilli> as Timer0;
+	
+	uses interface Timer<TMilli> as Timer_Send;
+	//MAC interfaces
+	
+	uses interface MLME_START;
+	
+	uses interface MLME_GET;
+	uses interface MLME_SET;
+	
+	uses interface MLME_BEACON_NOTIFY;
+	uses interface MLME_GTS;
+	
+	uses interface MLME_ASSOCIATE;
+	uses interface MLME_DISASSOCIATE;
+	
+	uses interface MLME_ORPHAN;
+	
+	uses interface MLME_SYNC;
+	uses interface MLME_SYNC_LOSS;
+	
+	uses interface MLME_RESET;
+	
+	uses interface MLME_SCAN;
+	
+	
+	uses interface MCPS_DATA;
+  
+}
+implementation {
+
+
+	//number of data frames sent after association and before dissassociation
+	uint16_t frame_counter=0;
+
+	//associated devices
+	uint16_t address_poll = 0x0003;
+		
+	neighbour_table associated_devices[4];
+	
+	uint16_t search_associated_devices(uint32_t ext1, uint32_t ext2);
+	
+	uint8_t number_associations =0;
+	
+	PANDescriptor pan_des;
+
+	void try_disassociation();
+	
+	uint16_t my_short_address= 0xffff;
+	
+	uint8_t received_beacon_count=0;
+	uint32_t coordinator_addr[2];
+	
+	uint8_t go_associate =0;
+
+  event void Boot.booted() {
+    	
+	printfUART_init();
+	
+	if (TYPE_DEVICE == COORDINATOR)
+	{
+		//assign the short address of the device
+		my_short_address = 0x0000;
+		call Timer0.startOneShot(3000);
+	}
+	else
+	{
+		call Timer0.startOneShot(8000);
+	}
+
+  }
+
+ 
+
+event void Timer0.fired() {
+    
+	uint8_t v_temp[2];
+	uint32_t c_addr[2];
+
+	if (TYPE_DEVICE == COORDINATOR)
+	{
+	
+		associated_devices[0].extended1=0x00000002;
+		associated_devices[0].extended2=0x00000002;
+		associated_devices[0].assigned_short=0x0004;
+	
+		//set the MAC short address variable
+		v_temp[0] = (uint8_t)(my_short_address >> 8);
+		v_temp[1] = (uint8_t)(my_short_address );
+		
+		call MLME_SET.request(MACSHORTADDRESS,v_temp);
+	
+		//set the MAC PANID variable
+		v_temp[0] = (uint8_t)(MAC_PANID >> 8);
+		v_temp[1] = (uint8_t)(MAC_PANID );
+		
+		call MLME_SET.request(MACPANID,v_temp);
+	
+		//start sending beacons
+		call MLME_START.request(MAC_PANID, LOGICAL_CHANNEL, BEACON_ORDER, SUPERFRAME_ORDER,1,0,0,0,0);
+		
+		//call Timer_Send.startPeriodic(3000);
+	}
+	else
+	{
+		//the device will try to scan all the channels looking for a suitable PAN coordinator
+		//only the ACTIVE SCAN/ED SCAN  and a full channel scan is implemented
+		//call MLME_SCAN.request(PASSIVE_SCAN,0xFFFFFFFF,7);
+		//call MLME_SCAN.request(ED_SCAN,0xFFFFFFFF,0x10);
+		
+		c_addr[0] = 0x00000000;
+		c_addr[1] = 0x00000000;
+		
+		call MLME_ASSOCIATE.request(0x15,SHORT_ADDRESS,0x1234,c_addr,0x00,0x00);
+		
+		//call Leds.redOn();
+		call Timer0.stop();
+	}
+}
+  
+event void Timer_Send.fired() {
+
+	uint32_t SrcAddr[2];
+	uint32_t DstAddr[2];
+	
+	uint8_t msdu_payload[4];
+	
+	frame_counter++;
+	
+	if (frame_counter == 5)
+	{
+		//after sending 5 data frames the device tries to dissassociate from the PAN
+		call Timer_Send.stop();
+		try_disassociation();
+	
+	}
+	else
+	{
+		if (my_short_address == 0x0000ffff)
+			return;
+		
+		SrcAddr[0]=0x00000000;
+		SrcAddr[1]=my_short_address;
+		
+		DstAddr[0]=0x00000000;
+		DstAddr[1]=0x00000000;
+				
+		call MCPS_DATA.request(SHORT_ADDRESS, MAC_PANID, SrcAddr, SHORT_ADDRESS, MAC_PANID, DstAddr, 4, msdu_payload,1,set_txoptions(1,0,0,0));
+	}
+}
+
+/*****************************************************************************************************/  
+/**************************************MLME-SCAN*******************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_SCAN.confirm(uint8_t status,uint8_t ScanType, uint32_t UnscannedChannels, uint8_t ResultListSize, uint8_t EnergyDetectList[], SCAN_PANDescriptor PANDescriptorList[])
+{
+//the device channel scan ends with a scan confirm containing a list of the PANs (beacons received during the scan) 
+
+	int i;
+	uint8_t max_lqi=0;
+	uint8_t best_pan_index=0;
+	
+	//call Leds.redOff();
+	
+	printfUART("MLME_SCAN.confirm %i\n", ScanType);
+	
+	if (ScanType == ORPHAN_SCAN)
+	{
+		printfUART("new scan \n", "");
+	
+		call MLME_SCAN.request(PASSIVE_SCAN,0xFFFFFFFF,7);
+		return SUCCESS;
+	}
+	
+	
+	
+	if(ScanType == ED_SCAN)
+	{
+		for(i=0;i<ResultListSize;i++)
+		{
+			printfUART("ED SCAN %i %i\n", (0x0A + i),EnergyDetectList[i]);
+		}
+		return SUCCESS;
+	}
+	
+	for (i=0; i<ResultListSize;i++)
+	{		/*
+			printfUART("cord id %i", PANDescriptorList[i].CoordPANId);
+			printfUART("CoordAddress %i", PANDescriptorList[i].CoordAddress);
+			printfUART("LogicalChannel %i", PANDescriptorList[i].LogicalChannel);
+			printfUART("SuperframeSpec %i", PANDescriptorList[i].SuperframeSpec);
+			printfUART("lqi %i\n", PANDescriptorList[i].lqi);
+			*/
+		if(max_lqi < PANDescriptorList[i].lqi)
+		{
+			max_lqi =PANDescriptorList[i].lqi;
+			best_pan_index = i;
+		}
+	}
+	
+	printfUART("SELECTED cord id %i", PANDescriptorList[best_pan_index].CoordPANId);
+	printfUART("CoordAddress %i", PANDescriptorList[best_pan_index].CoordAddress);
+	printfUART("LogicalChannel %i", PANDescriptorList[best_pan_index].LogicalChannel);
+	printfUART("SuperframeSpec %i", PANDescriptorList[best_pan_index].SuperframeSpec);
+	printfUART("lqi %i\n", PANDescriptorList[best_pan_index].lqi);
+	
+	coordinator_addr[0] = 0x00000001;
+	
+	coordinator_addr[1] = (uint32_t)PANDescriptorList[best_pan_index].CoordAddress;
+	
+	//pan_des = PANDescriptorList[best_pan_index];
+
+	
+	//BUILD the PAN descriptor of the COORDINATOR
+	//assuming that the adress is short
+	pan_des.CoordAddrMode = SHORT_ADDRESS;
+	pan_des.CoordPANId = PANDescriptorList[best_pan_index].CoordAddress;
+	pan_des.CoordAddress0=0x00000000;
+	pan_des.CoordAddress1=0x00000000;
+	pan_des.LogicalChannel=PANDescriptorList[best_pan_index].LogicalChannel;
+	//superframe specification field
+	pan_des.SuperframeSpec = PANDescriptorList[best_pan_index].SuperframeSpec;
+	
+	pan_des.GTSPermit=0x01;
+	pan_des.LinkQuality=0x00;
+	pan_des.TimeStamp=0x000000;
+	pan_des.SecurityUse=0;
+	pan_des.ACLEntry=0x00;
+	pan_des.SecurityFailure=0x00;
+	
+	received_beacon_count=0;
+	go_associate=1;
+	//enables the TimerAsync events, in order to enable the synchronization with the PAN coordinator
+	call MLME_SYNC.request(PANDescriptorList[best_pan_index].LogicalChannel,0);
+	
+	
+	
+	return SUCCESS;
+}
+
+/*****************************************************************************************************/  
+/**************************************MLME-ORPHAN****************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_ORPHAN.indication(uint32_t OrphanAddress[1], uint8_t SecurityUse, uint8_t ACLEntry)
+{
+
+	uint16_t assigned_address;
+	
+	assigned_address = search_associated_devices(OrphanAddress[0],OrphanAddress[1]);
+	
+	if (assigned_address == 0x0000)
+	{
+		printfUART("not my child\n","");
+	}
+	else
+	{
+		//printfUART("my child\n","");
+		call MLME_ORPHAN.response(OrphanAddress,assigned_address,0x01, 0x00);
+	}
+
+	return SUCCESS;
+}
+
+	uint16_t search_associated_devices(uint32_t ext1, uint32_t ext2)
+	{
+		int i;
+		
+		for(i=0;i<4;i++)
+		{
+			//printfUART("ad %i %i %i\n",associated_devices[i].extended1,associated_devices[i].extended2,associated_devices[i].assigned_short);
+			if(associated_devices[i].extended1 == ext1 && associated_devices[i].extended2 == ext2 )
+			{
+			
+				return associated_devices[i].assigned_short;
+			}
+		
+		}
+		
+		return 0x0000;
+	}
+
+/*****************************************************************************************************/  
+/**************************************MLME-RESET*****************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_RESET.confirm(uint8_t status)
+{
+
+
+
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-SYNC-LOSS*************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_SYNC_LOSS.indication(uint8_t LossReason)
+{
+		printfUART("SL\n","");
+		
+		call MLME_SCAN.request(ORPHAN_SCAN,0xFFFFFFFF,7);
+
+
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-GTS*******************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_GTS.confirm(uint8_t GTSCharacteristics, uint8_t status)
+{
+
+
+
+	return SUCCESS;
+}
+
+event error_t MLME_GTS.indication(uint16_t DevAddress, uint8_t GTSCharacteristics, bool SecurityUse, uint8_t ACLEntry)
+{
+
+
+
+	return SUCCESS;
+}
+
+/*****************************************************************************************************/  
+/**************************************MLME-BEACON NOTIFY*********************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_BEACON_NOTIFY.indication(uint8_t BSN,PANDescriptor pan_descriptor, uint8_t PenAddrSpec, uint8_t AddrList, uint8_t sduLength, uint8_t sdu[])
+{
+	
+	if (go_associate==1)
+	{
+		received_beacon_count++;
+		
+		printfUART("bn %i\n", received_beacon_count);
+		
+		if (received_beacon_count==5)
+		{
+				printfUART("sa \n", "");
+				go_associate=0;
+				call MLME_ASSOCIATE.request(pan_des.LogicalChannel,SHORT_ADDRESS,pan_des.CoordPANId,coordinator_addr,0x00,0x00);
+		
+		
+		}
+		
+	}
+
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-START*****************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_START.confirm(uint8_t status)
+{
+	
+	
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**********************				  MLME-SET		  	    ******************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_SET.confirm(uint8_t status,uint8_t PIBAttribute)
+{
+	
+	
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/*************************			MLME-GET			    ******************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_GET.confirm(uint8_t status,uint8_t PIBAttribute, uint8_t PIBAttributeValue[])
+{
+	
+	
+	return SUCCESS;
+}
+	
+/*****************************************************************************************************/  
+/**************************************MLME-ASSOCIATE*************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_ASSOCIATE.indication(uint32_t DeviceAddress[], uint8_t CapabilityInformation, bool SecurityUse, uint8_t ACLEntry)
+{
+		//the coordinator device receives the association request and assigns the device with a short address
+		address_poll ++;
+		number_associations++;
+		
+		printfUART("address pool: %i %i\n", address_poll,number_associations);
+		
+		call MLME_ASSOCIATE.response(DeviceAddress,address_poll, CMD_RESP_ASSOCIATION_SUCCESSFUL, 0);
+	return SUCCESS;
+}
+
+event error_t MLME_ASSOCIATE.confirm(uint16_t AssocShortAddress, uint8_t status)
+{
+
+//the end device receives the association confirm and activates the data frame send timer
+	uint8_t v_temp[2];
+	
+	printfUART("MLME_ASSOCIATE.confirm\n", "");
+
+	printfUART("Short: %x\n", AssocShortAddress);
+	printfUART("Status: %i\n", status);
+	
+	if (AssocShortAddress == 0x0000)
+	{
+		//call Timer0.startOneShot(8000);
+	
+	}
+	else
+	{
+		
+		my_short_address = AssocShortAddress;
+			
+		v_temp[0] = (my_short_address >> 8);
+		v_temp[1] = my_short_address;
+		
+		//call Leds.redOn();
+		call MLME_SET.request(MACSHORTADDRESS,v_temp);
+		
+		call Timer_Send.startPeriodic(3000);
+		
+		call Timer0.stop();
+	}
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-DISASSOCIATE**********************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_DISASSOCIATE.indication(uint32_t DeviceAddress[], uint8_t DisassociateReason, bool SecurityUse, uint8_t ACLEntry)
+{
+	return SUCCESS;
+}
+  
+event error_t MLME_DISASSOCIATE.confirm(uint8_t status)
+{
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/*****************************************************************************************************/  
+/****************					MCPS EVENTS 				 *************************************/
+/*****************************************************************************************************/ 
+/*****************************************************************************************************/  
+
+
+/*****************************************************************************************************/  
+/*********************					MCPS-DATA 		  	   ***************************************/
+/*****************************************************************************************************/ 
+event error_t MCPS_DATA.confirm(uint8_t msduHandle, uint8_t status)
+{
+	
+return SUCCESS;
+}  
+event error_t MCPS_DATA.indication(uint16_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[2], uint16_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[2], uint16_t msduLength,uint8_t msdu[100],uint16_t mpduLinkQuality, uint16_t SecurityUse, uint16_t ACLEntry)
+{
+	//call Leds.led1Toggle();
+	
+return SUCCESS;
+}
+
+
+
+void try_disassociation()
+{
+
+	uint32_t coordinator_addr1[2];
+	
+	coordinator_addr1[0] = 0x00000001;
+	
+	coordinator_addr1[1] = 0x00000001;
+	
+	call MLME_DISASSOCIATE.request(coordinator_addr1,MAC_PAN_DEVICE_LEAVE,0x00);
+	
+
+return;
+}
+  
+}
+
diff --git a/tos/lib/net/zigbee/apps/AssociationExample/Makefile b/tos/lib/net/zigbee/apps/AssociationExample/Makefile
new file mode 100644
index 00000000..3d1ca3b4
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/AssociationExample/Makefile
@@ -0,0 +1,12 @@
+COMPONENT=AssociationExampleC
+
+PFLAGS += 	-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/includes \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/mac \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/phy \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/timerasync \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces/mac \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces/phy \
+			-I$(TOSROOT)/tos/lib/net/zigbee/cc2420
+include $(MAKERULES)
+
diff --git a/tos/lib/net/zigbee/apps/AssociationExample/associationexample.h b/tos/lib/net/zigbee/apps/AssociationExample/associationexample.h
new file mode 100644
index 00000000..a8bde4af
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/AssociationExample/associationexample.h
@@ -0,0 +1,27 @@
+enum {
+	COORDINATOR = 0x00,
+	ROUTER =0x01,
+	END_DEVICE = 0x02
+	};
+
+#define BEACON_ORDER 6
+#define SUPERFRAME_ORDER 4
+//the starting channel needs to be diferrent that the existent coordinator operating channels
+#define LOGICAL_CHANNEL 0x15
+ 
+
+#define TYPE_DEVICE END_DEVICE
+//#define TYPE_DEVICE COORDINATOR
+
+//PAN VARIABLES
+#define MAC_PANID 0x1234
+
+typedef struct{
+
+uint32_t extended1;
+uint32_t extended2;
+uint16_t assigned_short;
+
+}neighbour_table;
+
+
diff --git a/tos/lib/net/zigbee/apps/DataSendExample/DataSendExampleC.nc b/tos/lib/net/zigbee/apps/DataSendExample/DataSendExampleC.nc
new file mode 100644
index 00000000..d4ee637f
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/DataSendExample/DataSendExampleC.nc
@@ -0,0 +1,60 @@
+/**
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ */
+#include <Timer.h>
+
+#include "datasendexample.h"
+#include "phy_const.h"
+#include "phy_enumerations.h"
+#include "mac_const.h"
+#include "mac_enumerations.h"
+#include "mac_func.h"
+ 
+configuration DataSendExampleC {
+}
+ 
+implementation
+{
+  components MainC;
+  components LedsC;
+  components DataSendExampleP;
+    
+  DataSendExampleP.Boot -> MainC;
+    
+  components MacC;
+  
+  DataSendExampleP.Leds -> LedsC;
+  
+  components new TimerMilliC() as Timer0;
+  DataSendExampleP.Timer0 -> Timer0;
+   
+  components new TimerMilliC() as Timer_Send;
+  DataSendExampleP.Timer_Send ->Timer_Send;
+   
+   
+  //MAC interfaces
+  
+  DataSendExampleP.MLME_START -> MacC.MLME_START;
+  
+  DataSendExampleP.MLME_GET ->MacC.MLME_GET;
+  DataSendExampleP.MLME_SET ->MacC.MLME_SET;
+  
+  DataSendExampleP.MLME_BEACON_NOTIFY ->MacC.MLME_BEACON_NOTIFY;
+  DataSendExampleP.MLME_GTS -> MacC.MLME_GTS;
+  
+  DataSendExampleP.MLME_ASSOCIATE->MacC.MLME_ASSOCIATE;
+  DataSendExampleP.MLME_DISASSOCIATE->MacC.MLME_DISASSOCIATE;
+  
+  DataSendExampleP.MLME_ORPHAN->MacC.MLME_ORPHAN;
+  DataSendExampleP.MLME_SYNC->MacC.MLME_SYNC;
+  DataSendExampleP.MLME_SYNC_LOSS->MacC.MLME_SYNC_LOSS;
+  DataSendExampleP.MLME_RESET->MacC.MLME_RESET;
+  
+  DataSendExampleP.MLME_SCAN->MacC.MLME_SCAN;
+  
+  DataSendExampleP.MCPS_DATA->MacC.MCPS_DATA;
+
+  
+}
+
diff --git a/tos/lib/net/zigbee/apps/DataSendExample/DataSendExampleP.nc b/tos/lib/net/zigbee/apps/DataSendExample/DataSendExampleP.nc
new file mode 100644
index 00000000..f9c38353
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/DataSendExample/DataSendExampleP.nc
@@ -0,0 +1,315 @@
+/*
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+ 
+#include <Timer.h>
+#include "printfUART.h"
+
+module DataSendExampleP {
+
+	uses interface Boot;
+	uses interface Leds;
+	
+	uses interface Timer<TMilli> as Timer0;
+	
+	uses interface Timer<TMilli> as Timer_Send;
+	//MAC interfaces
+	
+	uses interface MLME_START;
+	
+	uses interface MLME_GET;
+	uses interface MLME_SET;
+	
+	uses interface MLME_BEACON_NOTIFY;
+	uses interface MLME_GTS;
+	
+	uses interface MLME_ASSOCIATE;
+	uses interface MLME_DISASSOCIATE;
+	
+	uses interface MLME_ORPHAN;
+	
+	uses interface MLME_SYNC;
+	uses interface MLME_SYNC_LOSS;
+		
+	uses interface MLME_RESET;
+	
+	uses interface MLME_SCAN;
+	
+	uses interface MCPS_DATA;
+  
+}
+implementation {
+
+	uint8_t beacon_present=0;
+	uint8_t on_sync=0;
+	
+	PANDescriptor pan_des;
+	
+	uint32_t my_short_address=0x00000000;
+	uint32_t my_pan_id=0x00001234;
+	
+	uint32_t DestinationMote[2];
+	
+
+  event void Boot.booted() {
+    	
+	printfUART_init();
+	
+	printfUART("i_am_pan: %i\n", TYPE_DEVICE);
+	
+	DestinationMote[0]=0x00000000;
+	DestinationMote[1]=0x00000002;
+	
+	if (TYPE_DEVICE == COORDINATOR)
+	{
+		my_short_address = 0x0000;
+		call Timer0.startOneShot(3000);
+	}
+	else
+	{
+		call Timer0.startOneShot(8000);
+	}
+
+  }
+ 
+
+  event void Timer0.fired() {
+    
+	uint8_t v_temp[2];
+	
+	
+	if (TYPE_DEVICE == END_DEVICE)
+	{
+	
+		my_short_address = TOS_NODE_ID;
+		
+		//set the MAC short address variable
+		v_temp[0] = (uint8_t)(my_short_address >> 8);
+		v_temp[1] = (uint8_t)(my_short_address );
+		
+		call MLME_SET.request(MACSHORTADDRESS,v_temp);
+	
+		//set the MAC PANID variable
+		v_temp[0] = (uint8_t)(MAC_PANID >> 8);
+		v_temp[1] = (uint8_t)(MAC_PANID );
+		
+		call MLME_SET.request(MACPANID,v_temp);
+		
+		call Timer_Send.startPeriodic(3000);
+
+	}
+	else
+	{
+		//set the MAC short address variable
+		v_temp[0] = (uint8_t)(my_short_address >> 8);
+		v_temp[1] = (uint8_t)(my_short_address );
+		
+		call MLME_SET.request(MACSHORTADDRESS,v_temp);
+	
+		//set the MAC PANID variable
+		v_temp[0] = (uint8_t)(MAC_PANID >> 8);
+		v_temp[1] = (uint8_t)(MAC_PANID );
+		
+		call MLME_SET.request(MACPANID,v_temp);
+	
+		//start sending beacons
+		call MLME_START.request(MAC_PANID, LOGICAL_CHANNEL, BEACON_ORDER, SUPERFRAME_ORDER,1,0,0,0,0);
+		
+		//call Timer_send.start(TIMER_REPEAT,8000);
+	}
+	
+	
+	
+	
+  }
+  
+event void Timer_Send.fired() {
+	
+	
+	uint32_t SrcAddr[2];
+	
+	uint8_t msdu_payload[4];
+	
+	SrcAddr[0]=0x00000000;
+	SrcAddr[1]=TOS_NODE_ID;
+	
+	//DestinationMote[0]=0x00000000;
+	//DestinationMote[1]=0x0000FFFF;
+	
+	
+	
+	if(TYPE_DEVICE == COORDINATOR)
+	{
+	
+			SrcAddr[0]=0x00000000;
+			SrcAddr[1]=TOS_NODE_ID;
+			
+			if (DestinationMote[1]==0x00000002)
+			{
+				DestinationMote[1]=0x00000003;
+			}else{
+				DestinationMote[1]=0x00000002;
+			}
+			//printfUART("send to: %i\n", DestinationMote[1]);
+			//call Leds.greenToggle();
+																						//set_txoptions(ack, gts, indirect_transmission, security)
+			call MCPS_DATA.request(SHORT_ADDRESS, MAC_PANID, SrcAddr, SHORT_ADDRESS, MAC_PANID, DestinationMote, 4, msdu_payload,1,set_txoptions(1,0,0,0));
+	}
+	else
+	{
+	
+			DestinationMote[0]=0x00000000;
+			DestinationMote[1]=0x00000000;
+																								//set_txoptions(ack, gts, indirect_transmission, security)
+			call MCPS_DATA.request(SHORT_ADDRESS, MAC_PANID, SrcAddr, SHORT_ADDRESS, MAC_PANID, DestinationMote, 4, msdu_payload,1,set_txoptions(1,0,0,0));
+	}
+
+	
+	}
+/*****************************************************************************************************/  
+/**************************************MLME-SCAN*******************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_SCAN.confirm(uint8_t status,uint8_t ScanType, uint32_t UnscannedChannels, uint8_t ResultListSize, uint8_t EnergyDetectList[], SCAN_PANDescriptor PANDescriptorList[])
+{
+
+	
+	return SUCCESS;
+}
+
+/*****************************************************************************************************/  
+/**************************************MLME-ORPHAN*******************************************************/
+/*****************************************************************************************************/ 
+  
+event error_t MLME_ORPHAN.indication(uint32_t OrphanAddress[1], uint8_t SecurityUse, uint8_t ACLEntry)
+{
+
+return SUCCESS;
+}
+
+/*****************************************************************************************************/  
+/**************************************MLME-RESET*******************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_RESET.confirm(uint8_t status)
+{
+
+return SUCCESS;
+}
+
+
+ /*****************************************************************************************************/  
+/**************************************MLME-SYNC-LOSS*******************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_SYNC_LOSS.indication(uint8_t LossReason)
+{
+
+return SUCCESS;
+}
+  
+  
+  /*****************************************************************************************************/  
+/**************************************MLME-GTS*******************************************************/
+/*****************************************************************************************************/ 
+
+event error_t MLME_GTS.confirm(uint8_t GTSCharacteristics, uint8_t status)
+{
+	
+	return SUCCESS;
+}
+
+event error_t MLME_GTS.indication(uint16_t DevAddress, uint8_t GTSCharacteristics, bool SecurityUse, uint8_t ACLEntry)
+{
+	return SUCCESS;
+}
+  /*****************************************************************************************************/  
+/**************************************MLME-BEACON NOTIFY*********************************************/
+/*****************************************************************************************************/ 
+
+event error_t MLME_BEACON_NOTIFY.indication(uint8_t BSN,PANDescriptor pan_descriptor, uint8_t PenAddrSpec, uint8_t AddrList, uint8_t sduLength, uint8_t sdu[])
+{
+
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-START*****************************************************/
+/*****************************************************************************************************/ 
+    event error_t MLME_START.confirm(uint8_t status)
+	{
+	
+	
+	return SUCCESS;
+	}
+  /*****************************************************************************************************/  
+/**********************				  MLME-SET		  	    ******************************************/
+/*****************************************************************************************************/ 
+  
+      event error_t MLME_SET.confirm(uint8_t status,uint8_t PIBAttribute)
+	{
+	
+	
+	return SUCCESS;
+	}
+	/*****************************************************************************************************/  
+/*************************			MLME-GET			    ******************************************/
+/*****************************************************************************************************/ 
+	    event error_t MLME_GET.confirm(uint8_t status,uint8_t PIBAttribute, uint8_t PIBAttributeValue[])
+	{
+	
+	
+	return SUCCESS;
+	}
+	
+	
+	/*****************************************************************************************************/  
+/**************************************MLME-ASSOCIATE*************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_ASSOCIATE.indication(uint32_t DeviceAddress[], uint8_t CapabilityInformation, bool SecurityUse, uint8_t ACLEntry)
+{
+
+	return SUCCESS;
+}
+
+event error_t MLME_ASSOCIATE.confirm(uint16_t AssocShortAddress, uint8_t status)
+{
+
+	return SUCCESS;
+}
+	/*****************************************************************************************************/  
+/**************************************MLME-DISASSOCIATE**********************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_DISASSOCIATE.indication(uint32_t DeviceAddress[], uint8_t DisassociateReason, bool SecurityUse, uint8_t ACLEntry)
+{
+	return SUCCESS;
+}
+  
+event error_t MLME_DISASSOCIATE.confirm(uint8_t status)
+{
+	return SUCCESS;
+}
+  /*****************************************************************************************************/  
+/*****************************************************************************************************/  
+/****************					MCPS EVENTS 				 *************************************/
+/*****************************************************************************************************/ 
+/*****************************************************************************************************/  
+
+
+/*****************************************************************************************************/  
+/*********************					MCPS-DATA 		  	   ***************************************/
+/*****************************************************************************************************/ 
+event error_t MCPS_DATA.confirm(uint8_t msduHandle, uint8_t status)
+{
+	
+return SUCCESS;
+}  
+event error_t MCPS_DATA.indication(uint16_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[2], uint16_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[2], uint16_t msduLength,uint8_t msdu[100],uint16_t mpduLinkQuality, uint16_t SecurityUse, uint16_t ACLEntry)
+{
+	//call Leds.led1Toggle();
+	
+return SUCCESS;
+}
+
+  
+}
+
diff --git a/tos/lib/net/zigbee/apps/DataSendExample/Makefile b/tos/lib/net/zigbee/apps/DataSendExample/Makefile
new file mode 100644
index 00000000..24d32aba
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/DataSendExample/Makefile
@@ -0,0 +1,11 @@
+COMPONENT=DataSendExampleC
+
+PFLAGS += 	-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/includes \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/mac \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/phy \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/timerasync \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces/mac \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces/phy \
+			-I$(TOSROOT)/tos/lib/net/zigbee/cc2420
+include $(MAKERULES)
diff --git a/tos/lib/net/zigbee/apps/DataSendExample/datasendexample.h b/tos/lib/net/zigbee/apps/DataSendExample/datasendexample.h
new file mode 100644
index 00000000..5878f4f8
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/DataSendExample/datasendexample.h
@@ -0,0 +1,19 @@
+enum {
+	COORDINATOR = 0x00,
+	ROUTER =0x01,
+	END_DEVICE = 0x02
+	};
+
+#define BEACON_ORDER 6
+#define SUPERFRAME_ORDER 4
+
+#define LOGICAL_CHANNEL 0x15
+ 
+
+#define TYPE_DEVICE END_DEVICE
+//#define TYPE_DEVICE COORDINATOR
+
+//PAN VARIABLES
+#define MAC_PANID 0x1234
+
+
diff --git a/tos/lib/net/zigbee/apps/GTSManagementExample/GTSManagementExampleC.nc b/tos/lib/net/zigbee/apps/GTSManagementExample/GTSManagementExampleC.nc
new file mode 100644
index 00000000..dd5a929f
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/GTSManagementExample/GTSManagementExampleC.nc
@@ -0,0 +1,61 @@
+/**
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ */
+#include <Timer.h>
+
+#include "gtsmanagementexample.h"
+#include "phy_const.h"
+#include "phy_enumerations.h"
+#include "mac_const.h"
+#include "mac_enumerations.h"
+#include "mac_func.h"
+
+
+configuration GTSManagementExampleC {
+}
+implementation {
+
+  components MainC;
+  components LedsC;
+  components GTSManagementExampleP;
+    
+  GTSManagementExampleP.Boot -> MainC;
+    
+  components MacC;
+  
+  GTSManagementExampleP.Leds -> LedsC;
+  
+  components new TimerMilliC() as Timer0;
+  GTSManagementExampleP.Timer0 -> Timer0;
+   
+  components new TimerMilliC() as Timer_Send;
+  GTSManagementExampleP.Timer_Send ->Timer_Send;
+   
+   
+  //MAC interfaces
+  
+  GTSManagementExampleP.MLME_START -> MacC.MLME_START;
+  
+  GTSManagementExampleP.MLME_GET ->MacC.MLME_GET;
+  GTSManagementExampleP.MLME_SET ->MacC.MLME_SET;
+  
+  GTSManagementExampleP.MLME_BEACON_NOTIFY ->MacC.MLME_BEACON_NOTIFY;
+  GTSManagementExampleP.MLME_GTS -> MacC.MLME_GTS;
+  
+  GTSManagementExampleP.MLME_ASSOCIATE->MacC.MLME_ASSOCIATE;
+  GTSManagementExampleP.MLME_DISASSOCIATE->MacC.MLME_DISASSOCIATE;
+  
+  GTSManagementExampleP.MLME_ORPHAN->MacC.MLME_ORPHAN;
+  GTSManagementExampleP.MLME_SYNC->MacC.MLME_SYNC;
+  GTSManagementExampleP.MLME_SYNC_LOSS->MacC.MLME_SYNC_LOSS;
+  GTSManagementExampleP.MLME_RESET->MacC.MLME_RESET;
+  
+  GTSManagementExampleP.MLME_SCAN->MacC.MLME_SCAN;
+  
+  
+  GTSManagementExampleP.MCPS_DATA->MacC.MCPS_DATA;
+  
+  
+}
+
diff --git a/tos/lib/net/zigbee/apps/GTSManagementExample/GTSManagementExampleP.nc b/tos/lib/net/zigbee/apps/GTSManagementExample/GTSManagementExampleP.nc
new file mode 100644
index 00000000..ff859d01
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/GTSManagementExample/GTSManagementExampleP.nc
@@ -0,0 +1,339 @@
+/*
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+#include <Timer.h>
+#include "printfUART.h"
+
+module GTSManagementExampleP {
+
+	uses interface Boot;
+	uses interface Leds;
+	
+	uses interface Timer<TMilli> as Timer0;
+	
+	uses interface Timer<TMilli> as Timer_Send;
+	//MAC interfaces
+	
+	uses interface MLME_START;
+	
+	uses interface MLME_GET;
+	uses interface MLME_SET;
+	
+	uses interface MLME_BEACON_NOTIFY;
+	uses interface MLME_GTS;
+	
+	uses interface MLME_ASSOCIATE;
+	uses interface MLME_DISASSOCIATE;
+	
+	uses interface MLME_ORPHAN;
+	
+	uses interface MLME_SYNC;
+	uses interface MLME_SYNC_LOSS;
+	
+	uses interface MLME_RESET;
+	
+	uses interface MLME_SCAN;
+	
+	uses interface MCPS_DATA;
+  
+}
+implementation {
+
+
+	uint8_t beacon_present=0;
+	uint8_t on_sync=0;
+	uint8_t gts_allocated=0;
+	
+	uint8_t gts_superframe_count=0;
+	
+	PANDescriptor pan_des;
+	
+	uint32_t my_short_address=0x00000000;
+	uint32_t my_pan_id=0x00000001;
+	
+	
+
+  event void Boot.booted() {
+    	
+	printfUART_init();
+	
+	if (TYPE_DEVICE == COORDINATOR)
+	{
+		//assign the short address of the device
+		my_short_address = 0x0000;
+		call Timer0.startOneShot(5000);
+	}
+	else
+	{
+		call Timer0.startOneShot(8000);
+	}
+
+  }
+
+ 
+
+  event void Timer0.fired() {
+    
+	uint8_t v_temp[2];
+	
+	
+
+	if (TYPE_DEVICE == COORDINATOR)
+	{
+	
+		//set the MAC short address variable
+		v_temp[0] = (uint8_t)(my_short_address >> 8);
+		v_temp[1] = (uint8_t)(my_short_address );
+		
+		call MLME_SET.request(MACSHORTADDRESS,v_temp);
+	
+		//set the MAC PANID variable
+		v_temp[0] = (uint8_t)(MAC_PANID >> 8);
+		v_temp[1] = (uint8_t)(MAC_PANID );
+		
+		call MLME_SET.request(MACPANID,v_temp);
+	
+		//start sending beacons
+		call MLME_START.request(MAC_PANID, LOGICAL_CHANNEL, BEACON_ORDER, SUPERFRAME_ORDER,1,0,0,0,0);
+		
+		//call Timer_Send.startPeriodic(3000);
+	}
+	else
+	{
+		my_short_address = TOS_NODE_ID;
+		v_temp[0] = (uint8_t)(my_short_address >> 8);
+		v_temp[1] = (uint8_t)(my_short_address );
+		
+		call MLME_SET.request(MACSHORTADDRESS,v_temp);
+		
+		//call Leds.greenOn();
+		gts_superframe_count=0;
+		
+		
+		printfUART("GTS req: %i\n", TYPE_DEVICE);
+		
+		
+		//allocate a transmission GTS - enables a GTS time slot allocation for the device transmission to the PAN Coordinator
+		call MLME_GTS.request(set_gts_characteristics(1, GTS_TX_ONLY,1),0x00);
+		
+		//allocate a transmission GTS - enables a GTS time slot allocation for the PAN coordinator transmission to the device
+		//call MLME_GTS.request(set_gts_characteristics(1, GTS_RX_ONLY,1),0x00);
+		
+		
+		//enable the transmission of the device to the PAN coordinator in the allocated transmit GTS
+		call Timer_Send.startPeriodic(1000);
+
+	}
+	
+  }
+  
+event void Timer_Send.fired() {
+	
+	
+	uint32_t SrcAddr[2];
+	uint32_t DstAddr[2];
+	uint8_t msdu_payload[4];
+	
+	if (TYPE_DEVICE == COORDINATOR)
+	{
+		SrcAddr[0]=0x00000000;
+		SrcAddr[1]=TOS_NODE_ID;
+	
+		DstAddr[0]=0x00000000;
+		DstAddr[1]=0x00000002;
+	
+		call MCPS_DATA.request(SHORT_ADDRESS, MAC_PANID, SrcAddr, SHORT_ADDRESS, MAC_PANID, DstAddr, 4, msdu_payload,1,set_txoptions(1,1,0,0));
+	}
+	else
+	{
+	    call Leds.led1Toggle();
+		
+		
+		SrcAddr[0]=0x00000000;
+		SrcAddr[1]=TOS_NODE_ID;
+	
+		DstAddr[0]=0x00000000;
+		DstAddr[1]=0x00000000;
+	
+		call MCPS_DATA.request(SHORT_ADDRESS, MAC_PANID, SrcAddr, SHORT_ADDRESS, MAC_PANID, DstAddr, 4, msdu_payload,1,set_txoptions(1,1,0,0));
+	}
+	
+}
+
+
+/*****************************************************************************************************/  
+/**************************************MLME-SCAN*******************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_SCAN.confirm(uint8_t status,uint8_t ScanType, uint32_t UnscannedChannels, uint8_t ResultListSize, uint8_t EnergyDetectList[], SCAN_PANDescriptor PANDescriptorList[])
+{
+
+	return SUCCESS;
+}
+
+/*****************************************************************************************************/  
+/**************************************MLME-ORPHAN****************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_ORPHAN.indication(uint32_t OrphanAddress[1], uint8_t SecurityUse, uint8_t ACLEntry)
+{
+
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-RESET*****************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_RESET.confirm(uint8_t status)
+{
+
+
+
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-SYNC-LOSS*************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_SYNC_LOSS.indication(uint8_t LossReason)
+{
+
+	return SUCCESS;
+}
+  
+/*****************************************************************************************************/  
+/**************************************MLME-GTS*******************************************************/
+/*****************************************************************************************************/ 
+
+event error_t MLME_GTS.confirm(uint8_t GTSCharacteristics, uint8_t status)
+{
+	switch(status)
+	{
+		case MAC_SUCCESS:  gts_allocated=1;
+							call Leds.led1Toggle();
+							break;
+		
+		case MAC_DENIED: gts_allocated=0;
+							break;
+		
+		case MAC_NO_SHORT_ADDRESS: gts_allocated=0;
+									break;
+		
+		case MAC_CHANNEL_ACCESS_FAILURE: gts_allocated=0;
+									break;
+		
+		case MAC_NO_ACK: gts_allocated=0;break;
+		
+		case MAC_NO_DATA: gts_allocated=0;break;
+						
+		
+		default: break;
+	
+	}
+
+	return SUCCESS;
+}
+
+event error_t MLME_GTS.indication(uint16_t DevAddress, uint8_t GTSCharacteristics, bool SecurityUse, uint8_t ACLEntry)
+{
+	return SUCCESS;
+}
+  /*****************************************************************************************************/  
+/**************************************MLME-BEACON NOTIFY*********************************************/
+/*****************************************************************************************************/ 
+
+event error_t MLME_BEACON_NOTIFY.indication(uint8_t BSN,PANDescriptor pan_descriptor, uint8_t PenAddrSpec, uint8_t AddrList, uint8_t sduLength, uint8_t sdu[])
+{
+	gts_superframe_count++;
+	if (gts_superframe_count==30)
+	{
+		//call Leds.greenOff();
+		call MLME_GTS.request(set_gts_characteristics(1, GTS_TX_ONLY,0),0x00);
+	}
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-START*****************************************************/
+/*****************************************************************************************************/ 
+    event error_t MLME_START.confirm(uint8_t status)
+	{
+	
+	
+	return SUCCESS;
+	}
+  /*****************************************************************************************************/  
+/**********************				  MLME-SET		  	    ******************************************/
+/*****************************************************************************************************/ 
+  
+      event error_t MLME_SET.confirm(uint8_t status,uint8_t PIBAttribute)
+	{
+	
+	
+	return SUCCESS;
+	}
+	/*****************************************************************************************************/  
+/*************************			MLME-GET			    ******************************************/
+/*****************************************************************************************************/ 
+	    event error_t MLME_GET.confirm(uint8_t status,uint8_t PIBAttribute, uint8_t PIBAttributeValue[])
+	{
+	
+	
+	return SUCCESS;
+	}
+	
+	
+	/*****************************************************************************************************/  
+/**************************************MLME-ASSOCIATE*************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_ASSOCIATE.indication(uint32_t DeviceAddress[], uint8_t CapabilityInformation, bool SecurityUse, uint8_t ACLEntry)
+{
+
+	return SUCCESS;
+}
+
+event error_t MLME_ASSOCIATE.confirm(uint16_t AssocShortAddress, uint8_t status)
+{
+
+	return SUCCESS;
+}
+	/*****************************************************************************************************/  
+/**************************************MLME-DISASSOCIATE**********************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_DISASSOCIATE.indication(uint32_t DeviceAddress[], uint8_t DisassociateReason, bool SecurityUse, uint8_t ACLEntry)
+{
+	return SUCCESS;
+}
+  
+event error_t MLME_DISASSOCIATE.confirm(uint8_t status)
+{
+	return SUCCESS;
+}
+  /*****************************************************************************************************/  
+/*****************************************************************************************************/  
+/****************					MCPS EVENTS 				 *************************************/
+/*****************************************************************************************************/ 
+/*****************************************************************************************************/  
+
+
+/*****************************************************************************************************/  
+/*********************					MCPS-DATA 		  	   ***************************************/
+/*****************************************************************************************************/ 
+event error_t MCPS_DATA.confirm(uint8_t msduHandle, uint8_t status)
+{
+	
+return SUCCESS;
+}  
+event error_t MCPS_DATA.indication(uint16_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[2], uint16_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[2], uint16_t msduLength,uint8_t msdu[100],uint16_t mpduLinkQuality, uint16_t SecurityUse, uint16_t ACLEntry)
+{
+	
+	
+return SUCCESS;
+}
+
+  
+}
+
diff --git a/tos/lib/net/zigbee/apps/GTSManagementExample/Makefile b/tos/lib/net/zigbee/apps/GTSManagementExample/Makefile
new file mode 100644
index 00000000..9eab3ac6
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/GTSManagementExample/Makefile
@@ -0,0 +1,11 @@
+COMPONENT=GTSManagementExampleC
+
+PFLAGS += 	-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/includes \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/mac \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/phy \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/timerasync \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces/mac \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces/phy \
+			-I$(TOSROOT)/tos/lib/net/zigbee/cc2420
+include $(MAKERULES)
\ No newline at end of file
diff --git a/tos/lib/net/zigbee/apps/GTSManagementExample/gtsmanagementexample.h b/tos/lib/net/zigbee/apps/GTSManagementExample/gtsmanagementexample.h
new file mode 100644
index 00000000..2d1ffcae
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/GTSManagementExample/gtsmanagementexample.h
@@ -0,0 +1,18 @@
+enum {
+	COORDINATOR = 0x00,
+	ROUTER =0x01,
+	END_DEVICE = 0x02
+	};
+
+#define BEACON_ORDER 6
+#define SUPERFRAME_ORDER 4
+//the starting channel needs to be diferrent that the existent coordinator operating channels
+#define LOGICAL_CHANNEL 0x15
+ 
+
+#define TYPE_DEVICE END_DEVICE
+//#define TYPE_DEVICE COORDINATOR
+
+//PAN VARIABLES
+#define MAC_PANID 0x1234
+
diff --git a/tos/lib/net/zigbee/apps/Makefile b/tos/lib/net/zigbee/apps/Makefile
new file mode 100644
index 00000000..35d2a457
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/Makefile
@@ -0,0 +1,50 @@
+#-*-makefile-*-
+######################################################################
+# 
+# Makes the entire suite of TinyOS applications for a given platform.
+#
+# Author: 	Martin Turon
+# Date:		August 18, 2005
+#
+######################################################################
+# $Id: Makefile,v 1.1 2008-02-11 17:49:59 a_cunha Exp $
+
+# MAKECMDGOALS is the way to get the arguments passed into a Makefile ...
+TARGET=$(MAKECMDGOALS)
+NESDOC_TARGET=$(filter-out nesdoc,$(TARGET))
+
+# Here is a way to get the list of subdirectories in a Makefile ...
+ROOT=.
+SUBDIRS := $(shell find * -type d)
+
+# Okay, match any target, and recurse the subdirectories
+%: 
+	@for i in $(SUBDIRS); do \
+	  HERE=$$PWD; \
+	  if [ -f $$i/Makefile ]; then \
+	      echo Building ... $(PWD)/$$i; \
+	      echo make $(TARGET); \
+	      cd $$i; \
+	      $(MAKE) $(TARGET); \
+	      cd $$HERE; \
+	  fi; \
+	done
+
+BASEDIR = $(shell pwd | sed 's@\(.*\)/apps.*$$@\1@' )
+# The output directory for generated documentation
+DOCDIR = $(BASEDIR)/doc/nesdoc
+
+nesdoc:
+	@echo This target rebuilds documentation for all known platforms.
+	@echo It DOES NOT overwrite any existing documentation, thus, it 
+	@echo is best run after deleting all old documentation.
+	@echo
+	@echo To delete all old documentation, delete the contents of the
+	@echo $(DOCDIR) directory.
+	@echo
+	@echo Press Enter to continue, or ^C to abort.
+	@read
+	for platform in `ncc -print-platforms`; do \
+	  $(MAKE) $$platform docs.nohtml.preserve; \
+	  nesdoc -o $(DOCDIR) -html -target=$$platform; \
+	done
diff --git a/tos/lib/net/zigbee/apps/SimpleRoutingExample/Makefile b/tos/lib/net/zigbee/apps/SimpleRoutingExample/Makefile
new file mode 100644
index 00000000..f44b8b3c
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/SimpleRoutingExample/Makefile
@@ -0,0 +1,11 @@
+COMPONENT=SimpleRoutingExampleC
+
+PFLAGS += 	-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/includes \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/mac \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/phy \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/timerasync \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces/mac \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces/phy \
+			-I$(TOSROOT)/tos/lib/net/zigbee/cc2420
+include $(MAKERULES)
\ No newline at end of file
diff --git a/tos/lib/net/zigbee/apps/SimpleRoutingExample/SimpleRoutingExampleC.nc b/tos/lib/net/zigbee/apps/SimpleRoutingExample/SimpleRoutingExampleC.nc
new file mode 100644
index 00000000..f43915c0
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/SimpleRoutingExample/SimpleRoutingExampleC.nc
@@ -0,0 +1,61 @@
+/**
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ */
+#include <Timer.h>
+
+#include "simpleroutingexample.h"
+#include "phy_const.h"
+#include "phy_enumerations.h"
+#include "mac_const.h"
+#include "mac_enumerations.h"
+#include "mac_func.h"
+
+ configuration SimpleRoutingExampleC {
+}
+ 
+implementation
+{
+  components MainC;
+  components LedsC;
+  components SimpleRoutingExampleP;
+    
+  SimpleRoutingExampleP.Boot -> MainC;
+    
+  components MacC;
+  
+  SimpleRoutingExampleP.Leds -> LedsC;
+  
+  components new TimerMilliC() as Timer0;
+  SimpleRoutingExampleP.Timer0 -> Timer0;
+   
+  components new TimerMilliC() as Timer_Send;
+  SimpleRoutingExampleP.Timer_Send ->Timer_Send;
+   
+   
+  //MAC interfaces
+  
+  SimpleRoutingExampleP.MLME_START -> MacC.MLME_START;
+  
+  SimpleRoutingExampleP.MLME_GET ->MacC.MLME_GET;
+  SimpleRoutingExampleP.MLME_SET ->MacC.MLME_SET;
+  
+  SimpleRoutingExampleP.MLME_BEACON_NOTIFY ->MacC.MLME_BEACON_NOTIFY;
+  SimpleRoutingExampleP.MLME_GTS -> MacC.MLME_GTS;
+  
+  SimpleRoutingExampleP.MLME_ASSOCIATE->MacC.MLME_ASSOCIATE;
+  SimpleRoutingExampleP.MLME_DISASSOCIATE->MacC.MLME_DISASSOCIATE;
+  
+  SimpleRoutingExampleP.MLME_ORPHAN->MacC.MLME_ORPHAN;
+  SimpleRoutingExampleP.MLME_SYNC->MacC.MLME_SYNC;
+  SimpleRoutingExampleP.MLME_SYNC_LOSS->MacC.MLME_SYNC_LOSS;
+  SimpleRoutingExampleP.MLME_RESET->MacC.MLME_RESET;
+  
+  SimpleRoutingExampleP.MLME_SCAN->MacC.MLME_SCAN;
+  
+  
+  SimpleRoutingExampleP.MCPS_DATA->MacC.MCPS_DATA;
+
+  
+}
+
diff --git a/tos/lib/net/zigbee/apps/SimpleRoutingExample/SimpleRoutingExampleP.nc b/tos/lib/net/zigbee/apps/SimpleRoutingExample/SimpleRoutingExampleP.nc
new file mode 100644
index 00000000..33149070
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/SimpleRoutingExample/SimpleRoutingExampleP.nc
@@ -0,0 +1,308 @@
+/*
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+
+#include <Timer.h>
+#include "printfUART.h"
+
+module SimpleRoutingExampleP {
+
+	uses interface Boot;
+	uses interface Leds;
+	
+	uses interface Timer<TMilli> as Timer0;
+	
+	uses interface Timer<TMilli> as Timer_Send;
+	//MAC interfaces
+	
+	uses interface MLME_START;
+	
+	uses interface MLME_GET;
+	uses interface MLME_SET;
+	
+	uses interface MLME_BEACON_NOTIFY;
+	uses interface MLME_GTS;
+	
+	uses interface MLME_ASSOCIATE;
+	uses interface MLME_DISASSOCIATE;
+	
+	uses interface MLME_ORPHAN;
+	
+	uses interface MLME_SYNC;
+	uses interface MLME_SYNC_LOSS;
+	
+	uses interface MLME_RESET;
+	
+	uses interface MLME_SCAN;
+	
+	uses interface MCPS_DATA;
+  
+}
+implementation {
+
+	PANDescriptor pan_des;
+	
+	uint32_t my_short_address=0x00000000;
+
+	uint32_t DestinationMote[2];
+	uint32_t SourceMoteAddr[2];
+	
+	//number of routed packet (coordinator)
+	uint8_t routed_packets = 0x00;
+	
+
+  event void Boot.booted() {
+    	
+	printfUART_init();
+	
+	printfUART("i_am_pan: %i\n", TYPE_DEVICE);
+	
+	DestinationMote[0]=0x00000000;
+	DestinationMote[1]=0x00000002;
+	
+	if (TYPE_DEVICE == COORDINATOR)
+	{
+		my_short_address = 0x0000;
+		call Timer0.startOneShot(4000);
+	}
+	else
+	{
+		call Timer0.startOneShot(4000);
+	}
+
+  }
+ 
+
+  event void Timer0.fired() {
+    
+	uint8_t v_temp[2];
+	
+	
+	if (TYPE_DEVICE == END_DEVICE)
+	{
+	
+		my_short_address = TOS_NODE_ID;
+		
+		//set the MAC short address variable
+		v_temp[0] = (uint8_t)(my_short_address >> 8);
+		v_temp[1] = (uint8_t)(my_short_address );
+		
+		call MLME_SET.request(MACSHORTADDRESS,v_temp);
+	
+		//set the MAC PANID variable
+		v_temp[0] = (uint8_t)(MAC_PANID >> 8);
+		v_temp[1] = (uint8_t)(MAC_PANID );
+		
+		call MLME_SET.request(MACPANID,v_temp);
+		
+		call Timer_Send.startPeriodic(3000);
+
+	}
+	else
+	{
+		//set the MAC short address variable
+		v_temp[0] = (uint8_t)(my_short_address >> 8);
+		v_temp[1] = (uint8_t)(my_short_address );
+		
+		call MLME_SET.request(MACSHORTADDRESS,v_temp);
+	
+		//set the MAC PANID variable
+		v_temp[0] = (uint8_t)(MAC_PANID >> 8);
+		v_temp[1] = (uint8_t)(MAC_PANID );
+		
+		call MLME_SET.request(MACPANID,v_temp);
+	
+		//start sending beacons
+		call MLME_START.request(MAC_PANID, LOGICAL_CHANNEL, BEACON_ORDER, SUPERFRAME_ORDER,1,0,0,0,0);
+		
+		//call Timer_send.start(TIMER_REPEAT,8000);
+	}
+		
+  }
+  
+event void Timer_Send.fired() {
+	
+	
+	uint8_t msdu_payload[4];
+	
+	DestinationMote[0]=0x00000000;
+	DestinationMote[1]=0x00000000;
+	
+	//NKL destination address, coordinator will route packet to this address
+	msdu_payload[0] = 0x00;
+	msdu_payload[1] = 0x03;
+	
+	SourceMoteAddr[0]=0x00000000;
+	SourceMoteAddr[1]=TOS_NODE_ID;
+	
+	if (TOS_NODE_ID == 0x02)
+	{
+		call Leds.led2Toggle();																									//set_txoptions(ack, gts, indirect_transmission, security)
+		call MCPS_DATA.request(SHORT_ADDRESS, MAC_PANID, SourceMoteAddr, SHORT_ADDRESS, MAC_PANID, DestinationMote, 2, msdu_payload,1,set_txoptions(1,0,0,0));
+	}
+
+	
+	}
+
+/*****************************************************************************************************/  
+/**************************************MLME-SCAN*******************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_SCAN.confirm(uint8_t status,uint8_t ScanType, uint32_t UnscannedChannels, uint8_t ResultListSize, uint8_t EnergyDetectList[], SCAN_PANDescriptor PANDescriptorList[])
+{
+
+	return SUCCESS;
+}
+
+/*****************************************************************************************************/  
+/**************************************MLME-ORPHAN****************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_ORPHAN.indication(uint32_t OrphanAddress[1], uint8_t SecurityUse, uint8_t ACLEntry)
+{
+
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-RESET*****************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_RESET.confirm(uint8_t status)
+{
+
+
+
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-SYNC-LOSS*************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_SYNC_LOSS.indication(uint8_t LossReason)
+{
+
+	return SUCCESS;
+}
+   
+/*****************************************************************************************************/  
+/**************************************MLME-GTS*******************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_GTS.confirm(uint8_t GTSCharacteristics, uint8_t status)
+{
+	
+	return SUCCESS;
+}
+
+event error_t MLME_GTS.indication(uint16_t DevAddress, uint8_t GTSCharacteristics, bool SecurityUse, uint8_t ACLEntry)
+{
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-BEACON NOTIFY*********************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_BEACON_NOTIFY.indication(uint8_t BSN,PANDescriptor pan_descriptor, uint8_t PenAddrSpec, uint8_t AddrList, uint8_t sduLength, uint8_t sdu[])
+{
+
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-START*****************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_START.confirm(uint8_t status)
+{
+
+
+return SUCCESS;
+}
+ /*****************************************************************************************************/  
+/**********************				  MLME-SET		  	    ******************************************/
+/*****************************************************************************************************/ 
+  
+event error_t MLME_SET.confirm(uint8_t status,uint8_t PIBAttribute)
+{
+
+
+return SUCCESS;
+}
+/*****************************************************************************************************/  
+/*************************			MLME-GET			    ******************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_GET.confirm(uint8_t status,uint8_t PIBAttribute, uint8_t PIBAttributeValue[])
+{
+
+
+return SUCCESS;
+}
+	
+	
+/*****************************************************************************************************/  
+/**************************************MLME-ASSOCIATE*************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_ASSOCIATE.indication(uint32_t DeviceAddress[], uint8_t CapabilityInformation, bool SecurityUse, uint8_t ACLEntry)
+{
+
+	return SUCCESS;
+}
+
+event error_t MLME_ASSOCIATE.confirm(uint16_t AssocShortAddress, uint8_t status)
+{
+
+	return SUCCESS;
+}
+	/*****************************************************************************************************/  
+/**************************************MLME-DISASSOCIATE**********************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_DISASSOCIATE.indication(uint32_t DeviceAddress[], uint8_t DisassociateReason, bool SecurityUse, uint8_t ACLEntry)
+{
+	return SUCCESS;
+}
+  
+event error_t MLME_DISASSOCIATE.confirm(uint8_t status)
+{
+	return SUCCESS;
+}
+  /*****************************************************************************************************/  
+/*****************************************************************************************************/  
+/****************					MCPS EVENTS 				 *************************************/
+/*****************************************************************************************************/ 
+/*****************************************************************************************************/  
+
+
+/*****************************************************************************************************/  
+/*********************					MCPS-DATA 		  	   ***************************************/
+/*****************************************************************************************************/ 
+event error_t MCPS_DATA.confirm(uint8_t msduHandle, uint8_t status)
+{
+	
+return SUCCESS;
+}  
+event error_t MCPS_DATA.indication(uint16_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[2], uint16_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[2], uint16_t msduLength,uint8_t msdu[100],uint16_t mpduLinkQuality, uint16_t SecurityUse, uint16_t ACLEntry)
+{
+
+//routing procedure, the short address of the destination device is the first 2 bytes of the data payload
+		if (TYPE_DEVICE == COORDINATOR)
+		{
+			
+			//route to the desired address
+			DestinationMote[0]=0x00000000;
+			DestinationMote[1]=(uint32_t) msdu[1];
+			
+			routed_packets++;
+			msdu[0] = routed_packets;
+																										//set_txoptions(ack, gts, indirect_transmission, security)
+			call MCPS_DATA.request(SHORT_ADDRESS, MAC_PANID, SrcAddr, SHORT_ADDRESS, MAC_PANID, DestinationMote, 1, msdu,1,set_txoptions(1,0,0,0));
+		}
+		else
+		{
+		
+			call Leds.led1Toggle();
+		
+		}
+		
+	
+	
+return SUCCESS;
+}
+
+  
+}
+
diff --git a/tos/lib/net/zigbee/apps/SimpleRoutingExample/simpleroutingexample.h b/tos/lib/net/zigbee/apps/SimpleRoutingExample/simpleroutingexample.h
new file mode 100644
index 00000000..30d9e101
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/SimpleRoutingExample/simpleroutingexample.h
@@ -0,0 +1,19 @@
+enum {
+	COORDINATOR = 0x00,
+	ROUTER =0x01,
+	END_DEVICE = 0x02
+	};
+
+#define BEACON_ORDER 6
+#define SUPERFRAME_ORDER 4
+//the starting channel needs to be diferrent that the existent coordinator operating channels
+#define LOGICAL_CHANNEL 0x15
+ 
+
+#define TYPE_DEVICE END_DEVICE
+//#define TYPE_DEVICE COORDINATOR
+
+//PAN VARIABLES
+#define MAC_PANID 0x1234
+
+
diff --git a/tos/lib/net/zigbee/apps/Test_APL/Makefile b/tos/lib/net/zigbee/apps/Test_APL/Makefile
new file mode 100644
index 00000000..31172b4b
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/Test_APL/Makefile
@@ -0,0 +1,42 @@
+COMPONENT=Test_APLC
+
+TKN154_PLATFORM_INCLUDE=$(TOSROOT)/tos/platforms/telosb/mac/tkn154/Makefile.include
+
+ifndef TKN154_MAC
+PFLAGS += 	-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/includes \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/macTDBS \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/phy \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/timerasyncTDBS \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces/mac \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces/phy \
+			-I$(TOSROOT)/tos/lib/net/zigbee/cc2420 \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces/nwk \
+			-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/nwk\
+
+
+
+else
+PFLAGS += -DTKN154_MAC
+PFLAGS += -I$(TOSROOT)/tos/lib/mac/tkn154 \
+	-I$(TOSROOT)/tos/lib/mac/tkn154/dummies \
+	-I$(TOSROOT)/tos/lib/mac/tkn154/interfaces/MCPS \
+	-I$(TOSROOT)/tos/lib/mac/tkn154/interfaces/MLME \
+	-I$(TOSROOT)/tos/lib/mac/tkn154/interfaces/private \
+	-I$(TOSROOT)/tos/lib/mac/tkn154/interfaces/public\
+\
+-I$(TOSROOT)/tos/lib/net/zigbee/wrapper\
+-I$(TOSROOT)/tos/lib/net/zigbee/wrapper/interfaces/mac\
+-I$(TOSROOT)/tos/lib/net/zigbee/wrapper/includes \
+-I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/interfaces/nwk \
+ -I$(TOSROOT)/tos/lib/net/zigbee/ieee802154/nwk
+
+  include $(TKN154_PLATFORM_INCLUDE)	
+
+
+
+endif
+
+include $(MAKERULES)		
+
+
diff --git a/tos/lib/net/zigbee/apps/Test_APL/Test_APLC.nc b/tos/lib/net/zigbee/apps/Test_APL/Test_APLC.nc
new file mode 100644
index 00000000..efd41b86
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/Test_APL/Test_APLC.nc
@@ -0,0 +1,75 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ * @author Ricardo Severino <rars@isep.ipp.pt>
+ *
+ */
+#include <Timer.h>
+
+#ifndef TKN154_MAC
+
+#include "phy_const.h"
+#include "phy_enumerations.h"
+#include "mac_const.h"
+#include "mac_enumerations.h"
+#include "mac_func.h"
+
+#endif
+
+#include "nwk_const.h"
+#include "nwk_enumerations.h"
+#include "nwk_func.h"
+#include "UserButton.h"
+
+
+
+configuration Test_APLC {
+}
+implementation {
+
+  components MainC;
+  components LedsC;
+  components Test_APLP;
+    
+  Test_APLP.Boot -> MainC;
+    
+  components NWKC;
+  
+  Test_APLP.Leds -> LedsC;
+  
+  
+	components new TimerMilliC() as T_init;
+	Test_APLP.T_init -> T_init;
+		
+	components new TimerMilliC() as T_test;
+	Test_APLP.T_test -> T_test;
+		
+	components new TimerMilliC() as T_schedule;
+	Test_APLP.T_schedule -> T_schedule;
+  
+  
+  //User Button
+  components UserButtonC;
+
+  Test_APLP.Get -> UserButtonC;
+  Test_APLP.Notify -> UserButtonC;
+  
+  
+  Test_APLP.NLDE_DATA ->NWKC.NLDE_DATA;
+  
+  Test_APLP.NLME_NETWORK_DISCOVERY -> NWKC.NLME_NETWORK_DISCOVERY;
+  Test_APLP.NLME_NETWORK_FORMATION -> NWKC.NLME_NETWORK_FORMATION;
+  /*Test_APLP.NLME_PERMIT_JOINING-> NWKC.NLME_PERMIT_JOINING;
+  */
+  Test_APLP.NLME_START_ROUTER -> NWKC.NLME_START_ROUTER;
+  Test_APLP.NLME_JOIN -> NWKC.NLME_JOIN;
+  /*Test_APLP.NLME_DIRECT_JOIN -> NWKC.NLME_DIRECT_JOIN;
+  */
+  Test_APLP.NLME_LEAVE -> NWKC.NLME_LEAVE;
+  Test_APLP.NLME_RESET -> NWKC.NLME_RESET;
+  
+  Test_APLP.NLME_SYNC -> NWKC.NLME_SYNC;
+  Test_APLP.NLME_GET -> NWKC.NLME_GET;
+  Test_APLP.NLME_SET -> NWKC.NLME_SET;
+}
+
diff --git a/tos/lib/net/zigbee/apps/Test_APL/Test_APLP.nc b/tos/lib/net/zigbee/apps/Test_APL/Test_APLP.nc
new file mode 100644
index 00000000..2755af5a
--- /dev/null
+++ b/tos/lib/net/zigbee/apps/Test_APL/Test_APLP.nc
@@ -0,0 +1,886 @@
+//#define OPEN_ZB_MAC
+
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ * @author Ricardo Severino <rars@isep.ipp.pt>
+ *
+ */
+#include <Timer.h>
+#include "printfUART.h"
+
+module Test_APLP {
+
+	uses interface Boot;
+	uses interface Leds;
+	
+	uses interface NLDE_DATA;
+//NLME NWK Management services
+	uses interface NLME_NETWORK_DISCOVERY;
+	uses interface NLME_NETWORK_FORMATION;	
+	uses interface NLME_START_ROUTER;
+	uses interface NLME_JOIN;
+	uses interface NLME_LEAVE;
+	uses interface NLME_SYNC;
+	
+	/*
+	uses interface NLME_PERMIT_JOINING;
+	uses interface NLME_DIRECT_JOIN;*/
+	uses interface NLME_RESET;
+	
+	
+	uses interface NLME_GET;
+	uses interface NLME_SET;
+			
+	uses interface Timer<TMilli> as T_init;
+	
+	uses interface Timer<TMilli> as T_test;
+	
+	uses interface Timer<TMilli> as T_schedule;		
+
+//user button
+  uses interface Get<button_state_t>;
+  uses interface Notify<button_state_t>;	
+  
+}
+implementation {
+	
+	//descriptor of the Parent device
+	networkdescriptor PAN_network;
+	//boolean variable definig if the device has joined to the PAN
+	uint8_t joined =0x00;
+	//boolean variable defining if the device is waiting for the beacon request response
+	uint8_t requested_scheduling = 0x00;
+	//function used to start the beacon broadcast (router devices)
+	task void start_sending_beacons_request();
+	//function used to schedule the beacon requests (PAN coordinator)
+	void process_beacon_scheduling(uint16_t source_address,uint8_t beacon_order, uint8_t superframe_order);
+	
+	void process_beacon_scheduling(uint16_t source_address,uint8_t beacon_order, uint8_t superframe_order)
+	{
+	
+		uint8_t nsdu_pay[6];
+		
+		beacon_scheduling *beacon_scheduling_ptr;
+		
+		beacon_scheduling_ptr = (beacon_scheduling *)&nsdu_pay[0];
+		
+		switch(source_address)
+		{
+			
+			/*****************************************************************************/
+			/*DEPTH 
+			mwkMaxChildren (Cm)	6
+			nwkMaxDepth (Lm)	4
+			mwkMaxRouters (Rm)	4
+			*/
+			/*
+			case 0x0001: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0002: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0021: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x01;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x2C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0003: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0022: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0004: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0005: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			
+			case 0x0023: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			
+			case 0x0024: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+						*/			
+			/*****************************************************************************/
+			/*NORMAL TEST
+			mwkMaxChildren (Cm)	6
+			nwkMaxDepth (Lm)	3
+			mwkMaxRouters (Rm)	4
+*/
+			case 0x0001: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0020: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x01;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xE0;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0002: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0009: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xF0;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0021: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0028: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xF0;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0003: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0004: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x000a: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x000b: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0022: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0023: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0029: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x002a: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			
+			/*******************************************************************/
+			/*
+			case 0x0001: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0002: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0009: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+					
+					
+			case 0x0020: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xF0;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0021: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0028: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;		
+			
+			case 0x003F: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x01;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xE0;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0040: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0047: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+					
+			case 0x005e: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x02;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xDC;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x005f: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0066: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;	
+			*/
+			/*******************************************************************/
+			/*
+			case 0x0001: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0002: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0009: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x00010: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xB4;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0017: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xF0;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;		
+			
+			
+			case 0x0020: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x01;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x68;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0021: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0028: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0002F: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xB4;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0036: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xF0;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;		
+			
+			
+			case 0x003F: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x02;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xD0;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0040: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0047: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0004E: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xB4;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0055: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xF0;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;	
+					
+					
+					
+			case 0x005e: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x04;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x38;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x005F: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x3C;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0066: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x78;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0006D: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xB4;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+			case 0x0074: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_ACCEPT;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0xF0;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;	
+			*/
+			default: 
+					beacon_scheduling_ptr->request_type = SCHEDULING_DENY;
+					beacon_scheduling_ptr->beacon_order = beacon_order;
+					beacon_scheduling_ptr->superframe_order = superframe_order;
+					beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[1] = 0x00;
+					beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+					break;
+		
+		}
+
+		
+		call NLDE_DATA.request(source_address,0x06, nsdu_pay, 1, 1, 0x00, 0);
+	return;
+	}
+
+	task void start_sending_beacons_request()
+	{
+		uint8_t nsdu_pay[6];
+		
+		beacon_scheduling *beacon_scheduling_ptr;
+		
+		beacon_scheduling_ptr = (beacon_scheduling *)&nsdu_pay[0];
+		
+		beacon_scheduling_ptr->request_type = SCHEDULING_REQUEST;
+		beacon_scheduling_ptr->beacon_order = BEACON_ORDER;
+		beacon_scheduling_ptr->superframe_order = SUPERFRAME_ORDER;
+		beacon_scheduling_ptr->transmission_offset[0] = 0x00;
+		beacon_scheduling_ptr->transmission_offset[1] = 0x00;
+		beacon_scheduling_ptr->transmission_offset[2] = 0x00;
+	
+		requested_scheduling = 0x01;
+
+		//command result_t NLDE_DATA.request(uint16_t DstAddr, uint8_t NsduLength, uint8_t Nsdu[], uint8_t NsduHandle, uint8_t Radius, uint8_t DiscoverRoute, bool SecurityEnable)
+		call NLDE_DATA.request(0x0000,0x06, nsdu_pay, 0x01, 0x01, 0x00, 0x00);
+	
+		call T_schedule.startOneShot(20000);
+		//call Schedule_timer.start(TIMER_ONE_SHOT,20000);
+	return;
+	}
+	
+	
+	
+  event void Boot.booted() {
+    	
+	call Notify.enable();	
+	
+	//using the telosb motes the used button enables the association to the network (routers and end devices)
+	//or the beacon broadcasting (PAN coordinator)
+	//in the MICAz motes a timer is needed to start all the above operations
+		
+	//if (TYPE_DEVICE == COORDINATOR)
+	//	call T_init.startOneShot(12000);
+		
+  }
+
+
+/*****************************************************
+****************TIMER EVENTS***************************
+******************************************************/ 
+
+
+/*******************T_init**************************/
+  event void T_init.fired() {
+ 
+    //printfUART("Timer fired\n", "");
+	if (TYPE_DEVICE == COORDINATOR)
+	{	
+		
+
+
+//printfUART("coordinator procedure\n", "");
+		//start forming a PAN
+		//command result_t request(uint32_t ScanChannels, uint8_t ScanDuration, uint8_t BeaconOrder, uint8_t SuperframeOrder, uint16_t PANId, bool BatteryLifeExtension);
+		call NLME_NETWORK_FORMATION.request(0x000000ff, 8, BEACON_ORDER, SUPERFRAME_ORDER, MAC_PANID,0);
+		
+		//call Leds.redOff();
+		//call Leds.led0Off();
+		//call Test_timer.start(TIMER_REPEAT, 8000); 
+	}
+	else
+	{	
+
+//printfUART("child procedure\n", "");
+	
+	
+		call NLME_NETWORK_DISCOVERY.request(0x000000ff, 8);
+	
+			
+	}
+	return;
+  }
+
+/*******************T_test**************************/
+  event void T_test.fired() {
+    
+    	uint8_t nsdu_pay[20];
+	//printfUART("Test_timer.fired\n", "");
+ 
+	nsdu_pay[0]=0x05;
+	nsdu_pay[1]=0x05;
+	nsdu_pay[2]=0x05;
+	nsdu_pay[3]=0x05;
+	nsdu_pay[4]=0x05;
+	nsdu_pay[5]=0x05;
+	nsdu_pay[6]=0x05;
+	
+	//call Leds.redToggle();
+	
+	//command result_t NLDE_DATA.request(uint16_t DstAddr, uint8_t NsduLength, uint8_t Nsdu[], uint8_t NsduHandle, uint8_t Radius, uint8_t DiscoverRoute, bool SecurityEnable)
+	call NLDE_DATA.request(0x0000,0x07, nsdu_pay, 1, 1, 0x00, 0);
+  }
+  
+  /*******************T_schedule**************************/
+  event void T_schedule.fired() {
+    	//event that fires if the negotiation for beacon transmission is unsuccessful 
+	//(the device does not receive any negotiation reply)
+	if(requested_scheduling == 0x01)
+	{
+		post start_sending_beacons_request();
+	}
+    
+  }
+
+
+/*****************************************************
+****************NLDE EVENTS***************************
+******************************************************/ 
+
+/*************************NLDE_DATA*****************************/
+
+event error_t NLDE_DATA.confirm(uint8_t NsduHandle, uint8_t Status)
+{
+	//printfUART("NLME_DATA.confirm\n", "");
+	
+	return SUCCESS;
+}
+
+event error_t NLDE_DATA.indication(uint16_t SrcAddress, uint16_t NsduLength,uint8_t Nsdu[100], uint16_t LinkQuality)
+{
+
+	uint32_t start_time=0x00000000;
+	uint16_t start_time1=0x0000;
+	uint16_t start_time2=0x0000;
+		
+	if (TYPE_DEVICE == COORDINATOR)
+	{	
+		if(Nsdu[0] == SCHEDULING_REQUEST)
+		{
+			//the PAN coordinator receives a negotiation request
+			process_beacon_scheduling(SrcAddress,Nsdu[1],Nsdu[2]);
+		}
+	}
+	
+	if(TYPE_DEVICE==ROUTER && requested_scheduling ==0x01)
+	{
+		//the routes receives a negotiation reply
+		atomic requested_scheduling =0x00;
+
+		if(Nsdu[0] == SCHEDULING_ACCEPT)
+		{
+			start_time1 =( (Nsdu[3] << 0) ) ;
+			start_time2 =( (Nsdu[4] << 8 ) | (Nsdu[5] << 0 ) );
+			
+			start_time = ( ((uint32_t)start_time1 << 16) | (start_time2 << 0));
+			
+			call NLME_START_ROUTER.request(Nsdu[1],Nsdu[2],0,start_time);
+		}
+
+	}
+	
+	return SUCCESS;
+}
+
+/*****************************************************
+****************NLME EVENTS***************************
+******************************************************/ 
+
+/*****************NLME_NETWORK_DISCOVERY**************************/
+event error_t NLME_NETWORK_DISCOVERY.confirm(uint8_t NetworkCount,networkdescriptor networkdescriptorlist[], uint8_t Status)
+{
+	//printfUART("NLME_NETWORK_DISCOVERY.confirm\n", ""); 
+
+	PAN_network = networkdescriptorlist[0];
+	
+	if (TYPE_DEVICE == ROUTER)
+	{
+		//printfUART("go join router\n", ""); 
+		call NLME_JOIN.request(networkdescriptorlist[0].PANId, 0x01, 0, 0x000000ff, 8, 0, 0, 0);
+	}
+	else
+	{
+		//printfUART("go join non router\n", ""); 
+		call NLME_SYNC.request(1);
+		call NLME_JOIN.request(networkdescriptorlist[0].PANId, 0x00, 0, 0x000000ff, 8, 0, 0, 0);
+	}	
+	return SUCCESS;
+}
+
+ 
+/*****************NLME_NETWORK_FORMATION**********************/
+
+event error_t NLME_NETWORK_FORMATION.confirm(uint8_t Status)
+{	
+	
+
+//printfUART("NLME_NETWORK_FORMATION.confirm\n", ""); 
+
+	return SUCCESS;
+}
+ 
+/*****************NLME_START_ROUTER*****************************/
+event error_t NLME_START_ROUTER.confirm(uint8_t Status)
+{ 
+	//printfUART("NLME_START_ROUTER.confirm\n", ""); 
+		
+	return SUCCESS;
+}
+
+/*************************NLME_JOIN*****************************/
+
+event error_t NLME_JOIN.indication(uint16_t ShortAddress, uint32_t ExtendedAddress[], uint8_t CapabilityInformation, bool SecureJoin)
+{
+	//printfUART("NLME_JOIN.indication\n", "");
+	
+	return SUCCESS;
+}
+
+event error_t NLME_JOIN.confirm(uint16_t PANId, uint8_t Status)
+{	
+	//printfUART("NLME_JOIN.confirm\n", "");
+	
+	switch(Status)
+	{
+	
+		case NWK_SUCCESS:			joined =0x01;
+									if (TYPE_DEVICE == ROUTER)
+									{
+										//join procedure successful
+										//call Leds.redOff();
+										call Leds.led0Off();
+										
+										requested_scheduling = 0x01;
+										
+										call T_schedule.startOneShot(9000);
+										
+
+										//call Test_timer.start(TIMER_REPEAT, 8000); 
+									}
+									else
+									{
+										//the device is an end device and starts transmitting data periodically
+										call T_test.startPeriodic(10000);
+										//call Test_timer.start(TIMER_REPEAT, 10000); 
+									}
+									break;
+									
+		case NWK_NOT_PERMITTED: 	joined =0x00;
+									//join failed
+									break;
+									
+		default:					//default procedure - join failed
+									joined =0x00;
+									break;
+	}
+	return SUCCESS;
+}
+
+
+/*************************NLME_LEAVE****************************/
+
+event error_t NLME_LEAVE.indication(uint32_t DeviceAddress[])
+{
+	////printfUART("NLME_LEAVE.indication\n", "");
+	return SUCCESS;
+}
+
+event error_t NLME_LEAVE.confirm(uint32_t DeviceAddress[], uint8_t Status)
+{
+	//printfUART("NLME_LEAVE.confirm\n", "");
+	return SUCCESS;
+}
+
+
+
+/*************************NLME_SYNC*****************************/
+
+event error_t NLME_SYNC.indication()
+{
+	//printfUART("NLME_SYNC.indication\n", "");
+	return SUCCESS;
+}
+
+event error_t NLME_SYNC.confirm(uint8_t Status)
+{
+	
+	return SUCCESS;
+}
+
+
+/*************************************************************/
+/*****************        NLME-SET     ********************/
+/*************************************************************/
+
+event error_t NLME_SET.confirm(uint8_t Status, uint8_t NIBAttribute)
+{
+
+return SUCCESS;
+}
+
+/*************************************************************/
+/*****************        NLME-GET     ********************/
+/*************************************************************/
+
+event error_t NLME_GET.confirm(uint8_t Status, uint8_t NIBAttribute, uint16_t NIBAttributeLength, uint16_t NIBAttributeValue)
+{
+
+
+return SUCCESS;
+}
+
+event error_t NLME_RESET.confirm(uint8_t status){
+
+call T_init.startOneShot(5000);
+return SUCCESS;
+}
+
+event void Notify.notify( button_state_t state)
+{
+	if (state == BUTTON_PRESSED) {
+		//call Leds.led0On();
+		
+		call NLME_RESET.request();
+
+	}
+    
+}
+
+
+  
+}
+
diff --git a/tos/lib/net/zigbee/cc2420/AddressFilter.nc b/tos/lib/net/zigbee/cc2420/AddressFilter.nc
new file mode 100644
index 00000000..850da9a7
--- /dev/null
+++ b/tos/lib/net/zigbee/cc2420/AddressFilter.nc
@@ -0,0 +1,20 @@
+/**
+ *
+ * @author André Cunha 
+ * @version 1.0
+ */
+
+interface AddressFilter {
+
+
+   command error_t set_address(uint16_t mac_short_address, uint32_t mac_extended0, uint32_t mac_extended1);
+      
+	  
+   command error_t set_coord_address(uint16_t mac_coord_address, uint16_t mac_panid);
+   
+   
+   command error_t enable_address_decode(uint8_t enable);
+
+
+}
+
diff --git a/tos/lib/net/zigbee/cc2420/CC2420Config.nc b/tos/lib/net/zigbee/cc2420/CC2420Config.nc
new file mode 100644
index 00000000..e7a7dde8
--- /dev/null
+++ b/tos/lib/net/zigbee/cc2420/CC2420Config.nc
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An HAL abstraction of the ChipCon CC2420 radio. This abstraction
+ * deals specifically with radio configurations. All get() and set()
+ * commands are single-phase. After setting some values, a call to
+ * sync() is required for the changes to propagate to the cc2420
+ * hardware chip. This interface allows setting multiple parameters
+ * before calling sync().
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2009-08-25 18:14:42 $
+ */
+
+interface CC2420Config {
+
+  /**
+   * Sync configuration changes with the radio hardware. This only
+   * applies to set commands below.
+   *
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  command error_t sync();
+  event void syncDone( error_t error );
+
+  /**
+   * Change the channel of the radio, between 11 and 26
+   */
+  command uint8_t getChannel();
+  command void setChannel( uint8_t channel );
+
+  /**
+   * Change the short address of the radio.
+   */
+  async command uint16_t getShortAddr();
+  command void setShortAddr( uint16_t address );
+
+  /**
+   * Change the PAN address of the radio.
+   */
+  async command uint16_t getPanAddr();
+  command void setPanAddr( uint16_t address );
+
+  
+  /**
+   * @param on TRUE to turn address recognition on, FALSE to turn it off
+   */
+  command void setAddressRecognition(bool on);
+  
+  /**
+   * @return TRUE if address recognition is enabled
+   */
+  async command bool isAddressRecognitionEnabled();
+  
+  /**
+   * Sync must be called for acknowledgement changes to take effect
+   * @param enableAutoAck TRUE to enable auto acknowledgements
+   * @param hwAutoAck TRUE to default to hardware auto acks, FALSE to
+   *     default to software auto acknowledgements
+   */
+  command void setAutoAck(bool enableAutoAck, bool hwAutoAck);
+  
+  /**
+   * @return TRUE if hardware auto acks are the default, FALSE if software
+   *     acks are the default
+   */
+  async command bool isHwAutoAckDefault();
+  
+  /**
+   * @return TRUE if auto acks are enabled
+   */
+  async command bool isAutoAckEnabled();
+  
+}
diff --git a/tos/lib/net/zigbee/cc2420/CC2420ControlC.nc b/tos/lib/net/zigbee/cc2420/CC2420ControlC.nc
new file mode 100644
index 00000000..3de69221
--- /dev/null
+++ b/tos/lib/net/zigbee/cc2420/CC2420ControlC.nc
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation for configuring a ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-02-11 17:41:25 $
+ */
+
+#include "CC2420.h"
+#include "IEEE802154.h"
+
+configuration CC2420ControlC {
+
+  provides interface Resource;
+  provides interface CC2420Config;
+  provides interface CC2420Power;
+  provides interface Read<uint16_t> as ReadRssi;
+  
+ // provides interface Read_rssi;
+  
+}
+
+implementation {
+  
+  components CC2420ControlP;
+  Resource = CC2420ControlP;
+  CC2420Config = CC2420ControlP;
+  CC2420Power = CC2420ControlP;
+  ReadRssi = CC2420ControlP;
+  
+  //Read_rssi = CC2420ControlP;
+
+  components MainC;
+  MainC.SoftwareInit -> CC2420ControlP;
+  
+  //components CC2420ActiveMessageC;
+  //CC2420ControlP.AMPacket -> CC2420ActiveMessageC;
+  
+  components AlarmMultiplexC as Alarm;
+  CC2420ControlP.StartupTimer -> Alarm;
+
+  components HplCC2420PinsC as Pins;
+  CC2420ControlP.CSN -> Pins.CSN;
+  CC2420ControlP.RSTN -> Pins.RSTN;
+  CC2420ControlP.VREN -> Pins.VREN;
+
+  components HplCC2420InterruptsC as Interrupts;
+  CC2420ControlP.InterruptCCA -> Interrupts.InterruptCCA;
+
+  components new CC2420SpiC() as Spi;
+  CC2420ControlP.SpiResource -> Spi;
+  CC2420ControlP.SRXON -> Spi.SRXON;
+  CC2420ControlP.SRFOFF -> Spi.SRFOFF;
+  CC2420ControlP.SXOSCON -> Spi.SXOSCON;
+  CC2420ControlP.SXOSCOFF -> Spi.SXOSCOFF;
+  CC2420ControlP.FSCTRL -> Spi.FSCTRL;
+  CC2420ControlP.IOCFG0 -> Spi.IOCFG0;
+  CC2420ControlP.IOCFG1 -> Spi.IOCFG1;
+  CC2420ControlP.MDMCTRL0 -> Spi.MDMCTRL0;
+  CC2420ControlP.MDMCTRL1 -> Spi.MDMCTRL1;
+  CC2420ControlP.PANID -> Spi.PANID;
+  CC2420ControlP.RXCTRL1 -> Spi.RXCTRL1;
+  CC2420ControlP.RSSI  -> Spi.RSSI;
+  
+  
+
+  components new CC2420SpiC() as SyncSpiC;
+  CC2420ControlP.SyncResource -> SyncSpiC;
+
+  components new CC2420SpiC() as RssiResource;
+  CC2420ControlP.RssiResource -> RssiResource;
+  
+  //components ActiveMessageAddressC;
+  //CC2420ControlP.ActiveMessageAddress -> ActiveMessageAddressC;
+
+}
+
diff --git a/tos/lib/net/zigbee/cc2420/CC2420ControlP.nc b/tos/lib/net/zigbee/cc2420/CC2420ControlP.nc
new file mode 100644
index 00000000..cc2d4ed4
--- /dev/null
+++ b/tos/lib/net/zigbee/cc2420/CC2420ControlP.nc
@@ -0,0 +1,525 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Urs Hunkeler (ReadRssi implementation)
+ * @version $Revision: 1.1 $ $Date: 2008-02-11 17:41:25 $
+ */
+
+#include "Timer.h"
+
+module CC2420ControlP {
+
+  provides interface Init;
+  provides interface Resource;
+  provides interface CC2420Config;
+  provides interface CC2420Power;
+  provides interface Read<uint16_t> as ReadRssi;
+  
+ // provides interface Read_rssi;
+
+  uses interface Alarm<T32khz,uint32_t> as StartupTimer;
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as RSTN;
+  uses interface GeneralIO as VREN;
+  uses interface GpioInterrupt as InterruptCCA;
+  //uses interface ActiveMessageAddress;
+
+  uses interface CC2420Ram as PANID;
+  uses interface CC2420Register as FSCTRL;
+  uses interface CC2420Register as IOCFG0;
+  uses interface CC2420Register as IOCFG1;
+  uses interface CC2420Register as MDMCTRL0;
+  uses interface CC2420Register as MDMCTRL1;
+  uses interface CC2420Register as RXCTRL1;
+  uses interface CC2420Register as RSSI;
+  uses interface CC2420Strobe as SRXON;
+  uses interface CC2420Strobe as SRFOFF;
+  uses interface CC2420Strobe as SXOSCOFF;
+  uses interface CC2420Strobe as SXOSCON;
+ // uses interface AMPacket;
+  
+  uses interface Resource as SpiResource;
+  uses interface Resource as RssiResource;
+  uses interface Resource as SyncResource;
+
+  uses interface Leds;
+
+}
+
+implementation {
+
+  typedef enum {
+    S_VREG_STOPPED,
+    S_VREG_STARTING,
+    S_VREG_STARTED,
+    S_XOSC_STARTING,
+    S_XOSC_STARTED,
+  } cc2420_control_state_t;
+
+  uint8_t m_channel;
+  
+  uint8_t m_tx_power;
+  
+  uint16_t m_pan;
+  
+  uint16_t m_short_addr;
+  
+  bool m_sync_busy;
+  
+  bool autoAckEnabled;
+  
+  bool hwAutoAckDefault;
+  
+  bool addressRecognition;
+  
+  norace cc2420_control_state_t m_state = S_VREG_STOPPED;
+  
+  /***************** Prototypes ****************/
+
+  void writeFsctrl();
+  void writeMdmctrl0();
+  void writeId();
+
+  task void sync();
+  task void syncDone();
+    
+  /***************** Init Commands ****************/
+  command error_t Init.init() {
+    call CSN.makeOutput();
+    call RSTN.makeOutput();
+    call VREN.makeOutput();
+    
+    //m_short_addr = call ActiveMessageAddress.amAddress();
+   // m_pan = call ActiveMessageAddress.amGroup();
+    m_tx_power = CC2420_DEF_RFPOWER;
+	
+    //m_channel = CC2420_DEF_CHANNEL;
+    m_channel = LOGICAL_CHANNEL;
+	
+	
+//#if defined(CC2420_NO_ACKNOWLEDGEMENTS)
+    autoAckEnabled = FALSE;
+//#else
+//    autoAckEnabled = TRUE;
+//#endif
+
+//#if defined(CC2420_HW_ACKNOWLEDGEMENTS)
+//    hwAutoAckDefault = TRUE;
+//#else
+    hwAutoAckDefault = FALSE;
+//#endif
+
+//#if defined(CC2420_NO_ADDRESS_RECOGNITION)
+    addressRecognition = FALSE;
+//#else
+//    addressRecognition = TRUE;
+//#endif
+
+    return SUCCESS;
+  }
+
+  /***************** Resource Commands ****************/
+  async command error_t Resource.immediateRequest() {
+    error_t error = call SpiResource.immediateRequest();
+    if ( error == SUCCESS ) {
+      call CSN.clr();
+    }
+    return error;
+  }
+
+  async command error_t Resource.request() {
+    return call SpiResource.request();
+  }
+
+  async command uint8_t Resource.isOwner() {
+    return call SpiResource.isOwner();
+  }
+
+  async command error_t Resource.release() {
+    atomic {
+      call CSN.set();
+      return call SpiResource.release();
+    }
+  }
+
+  /***************** CC2420Power Commands ****************/
+  async command error_t CC2420Power.startVReg() {
+    atomic {
+      if ( m_state != S_VREG_STOPPED ) {
+        return FAIL;
+      }
+      m_state = S_VREG_STARTING;
+    }
+    call VREN.set();
+    call StartupTimer.start( CC2420_TIME_VREN );
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.stopVReg() {
+    m_state = S_VREG_STOPPED;
+    call RSTN.clr();
+    call VREN.clr();
+    call RSTN.set();
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.startOscillator() {
+    atomic {
+	//if ( m_state != S_VREG_STARTED ) {
+	//  return FAIL;
+	//}
+	
+	//m_state = S_XOSC_STARTING;
+	
+	/*
+	call IOCFG1.write( CC2420_SFDMUX_XOSC16M_STABLE << 
+					 CC2420_IOCFG1_CCAMUX );
+	*/
+	call IOCFG1.write(0x0018);
+	
+	call InterruptCCA.enableRisingEdge();
+	call SXOSCON.strobe();
+	/*
+	call IOCFG0.write( ( 1 << CC2420_IOCFG0_FIFOP_POLARITY ) |
+	  ( 127 << CC2420_IOCFG0_FIFOP_THR ) );
+	   */              
+	call IOCFG0.write(0x027F);
+	
+	
+	writeFsctrl();
+	  
+	  
+	//call FSCTRL.write(0x4192);
+	//initial set of frequency channel	  
+	//call FSCTRL.write( ( 1 << CC2420_FSCTRL_LOCK_THR ) | ( ( (LOGICAL_CHANNEL - 11)*5+357)   << CC2420_FSCTRL_FREQ ) );
+		  
+	//call MDMCTRL0.write(0x0AE2);
+    call MDMCTRL0.write(0x02E2);
+	 
+	//CHANGE
+	writeMdmctrl0();
+    //call RXCTRL1.write(0x0A56);
+	  
+  /*
+      call RXCTRL1.write( ( 1 << CC2420_RXCTRL1_RXBPF_LOCUR ) |
+          ( 1 << CC2420_RXCTRL1_LOW_LOWGAIN ) |
+          ( 1 << CC2420_RXCTRL1_HIGH_HGM ) |
+          ( 1 << CC2420_RXCTRL1_LNA_CAP_ARRAY ) |
+          ( 1 << CC2420_RXCTRL1_RXMIX_TAIL ) |
+          ( 1 << CC2420_RXCTRL1_RXMIX_VCM ) |
+          ( 2 << CC2420_RXCTRL1_RXMIX_CURRENT ) );
+		  */
+    }
+    return SUCCESS;
+  }
+
+
+  async command error_t CC2420Power.stopOscillator() {
+    atomic {
+      if ( m_state != S_XOSC_STARTED ) {
+        return FAIL;
+      }
+      m_state = S_VREG_STARTED;
+      call SXOSCOFF.strobe();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.rxOn() {
+    atomic {
+      if ( m_state != S_XOSC_STARTED ) {
+        return FAIL;
+      }
+      call SRXON.strobe();
+    }
+    return SUCCESS;
+  }
+
+  async command error_t CC2420Power.rfOff() {
+    atomic {  
+      if ( m_state != S_XOSC_STARTED ) {
+        return FAIL;
+      }
+      call SRFOFF.strobe();
+    }
+    return SUCCESS;
+  }
+
+  
+  /***************** CC2420Config Commands ****************/
+  command uint8_t CC2420Config.getChannel() {
+    atomic return m_channel;
+  }
+
+  command void CC2420Config.setChannel( uint8_t channel ) {
+    atomic m_channel = channel;
+	
+  }
+
+  async command uint16_t CC2420Config.getShortAddr() {
+    atomic return m_short_addr;
+  }
+
+  command void CC2420Config.setShortAddr( uint16_t addr ) {
+    atomic m_short_addr = addr;
+  }
+
+  async command uint16_t CC2420Config.getPanAddr() {
+    atomic return m_pan;
+  }
+
+  command void CC2420Config.setPanAddr( uint16_t pan ) {
+    atomic m_pan = pan;
+  }
+
+  /**
+   * Sync must be called to commit software parameters configured on
+   * the microcontroller (through the CC2420Config interface) to the
+   * CC2420 radio chip.
+   */
+  command error_t CC2420Config.sync() {
+    atomic {
+      if ( m_sync_busy ) {
+        return FAIL;
+      }
+      
+      m_sync_busy = TRUE;
+      if ( m_state == S_XOSC_STARTED ) {
+        call SyncResource.request();
+      } else {
+        post syncDone();
+      }
+    }
+    return SUCCESS;
+  }
+
+  /**
+   * @param on TRUE to turn address recognition on, FALSE to turn it off
+   */
+  command void CC2420Config.setAddressRecognition(bool on) {
+    atomic addressRecognition = on;
+  }
+  
+  /**
+   * @return TRUE if address recognition is enabled
+   */
+  async command bool CC2420Config.isAddressRecognitionEnabled() {
+    atomic return addressRecognition;
+  }
+  
+  
+  /**
+   * Sync must be called for acknowledgement changes to take effect
+   * @param enableAutoAck TRUE to enable auto acknowledgements
+   * @param hwAutoAck TRUE to default to hardware auto acks, FALSE to
+   *     default to software auto acknowledgements
+   */
+  command void CC2420Config.setAutoAck(bool enableAutoAck, bool hwAutoAck) {
+    autoAckEnabled = enableAutoAck;
+    hwAutoAckDefault = hwAutoAck;
+  }
+  
+  /**
+   * @return TRUE if hardware auto acks are the default, FALSE if software
+   *     acks are the default
+   */
+  async command bool CC2420Config.isHwAutoAckDefault() {
+    atomic return hwAutoAckDefault;    
+  }
+  
+  /**
+   * @return TRUE if auto acks are enabled
+   */
+  async command bool CC2420Config.isAutoAckEnabled() {
+    atomic return autoAckEnabled;
+  }
+  
+  /***************** ReadRssi Commands ****************/
+  command error_t ReadRssi.read() { 
+    return call RssiResource.request();
+  }
+  
+  /***************** Spi Resources Events ****************/
+  event void SyncResource.granted() {
+    //possibly this is on the sync of the new configuration of the transceiver //CHECK
+	
+	call CSN.clr();
+    call SRFOFF.strobe();
+    
+	writeFsctrl();
+    //CHANGE
+	writeMdmctrl0();
+    writeId();
+    call CSN.set();
+    call CSN.clr();
+    call SRXON.strobe();
+    call CSN.set();
+    call SyncResource.release();
+    post syncDone();
+  }
+
+  event void SpiResource.granted() {
+    call CSN.clr();
+    signal Resource.granted();
+  }
+
+  event void RssiResource.granted() { 
+    uint16_t data;
+    call CSN.clr();
+    call RSSI.read(&data);
+    call CSN.set();
+    
+    call RssiResource.release();
+    data += 0x7f;
+    data &= 0x00ff;
+    //signal ReadRssi.readDone(SUCCESS, data); 
+	
+	//signal Read_rssi.readDone(SUCCESS, data); 
+  }
+  
+  /***************** StartupTimer Events ****************/
+  async event void StartupTimer.fired() {
+    if ( m_state == S_VREG_STARTING ) {
+      m_state = S_VREG_STARTED;
+      call RSTN.clr();
+      call RSTN.set();
+      signal CC2420Power.startVRegDone();
+    }
+  }
+
+  /***************** InterruptCCA Events ****************/
+  async event void InterruptCCA.fired() {
+    m_state = S_XOSC_STARTED;
+    call InterruptCCA.disable();
+    call IOCFG1.write( 0 );
+    writeId();
+    call CSN.set();
+    call CSN.clr();
+    signal CC2420Power.startOscillatorDone();
+  }
+ 
+  /***************** ActiveMessageAddress Events ****************/
+  /*
+  async event void ActiveMessageAddress.changed() {
+    atomic {
+      m_short_addr = call ActiveMessageAddress.amAddress();
+      m_pan = call ActiveMessageAddress.amGroup();
+    }
+    
+    post sync();
+  }
+  */
+  /***************** Tasks ****************/
+  /**
+   * Attempt to synchronize our current settings with the CC2420
+   */
+  task void sync() {
+    call CC2420Config.sync();
+  }
+  
+  task void syncDone() {
+    atomic m_sync_busy = FALSE;
+    signal CC2420Config.syncDone( SUCCESS );
+  }
+  
+  
+  /***************** Functions ****************/
+  /**
+   * Write teh FSCTRL register
+   */
+  void writeFsctrl() {
+    uint8_t channel;
+    
+    atomic {
+      channel = m_channel;
+    }
+    
+    call FSCTRL.write( ( 1 << CC2420_FSCTRL_LOCK_THR ) |
+          ( ( (channel - 11)*5+357 ) << CC2420_FSCTRL_FREQ ) );
+  /*
+      call FSCTRL.write( ( 1 << CC2420_FSCTRL_LOCK_THR ) |
+          ( channel  << CC2420_FSCTRL_FREQ ) );
+  */
+  }
+
+  /**
+   * Write the MDMCTRL0 register
+   */
+  void writeMdmctrl0() {
+    atomic {
+      call MDMCTRL0.write( ( 1 << CC2420_MDMCTRL0_RESERVED_FRAME_MODE ) |
+          ( addressRecognition << CC2420_MDMCTRL0_ADR_DECODE ) |
+          ( 2 << CC2420_MDMCTRL0_CCA_HYST ) |
+          ( 3 << CC2420_MDMCTRL0_CCA_MOD ) |
+          ( 1 << CC2420_MDMCTRL0_AUTOCRC ) |
+          ( (autoAckEnabled && hwAutoAckDefault) << CC2420_MDMCTRL0_AUTOACK ) |
+          ( 0 << CC2420_MDMCTRL0_AUTOACK ) |
+          ( 2 << CC2420_MDMCTRL0_PREAMBLE_LENGTH ) );
+    }
+    // Jon Green:
+    // MDMCTRL1.CORR_THR is defaulted to 20 instead of 0 like the datasheet says
+    // If we add in changes to MDMCTRL1, be sure to include this fix.
+  }
+  
+  /**
+   * Write the PANID register
+   */
+  void writeId() {
+    nxle_uint16_t id[ 2 ];
+
+    atomic {
+      id[ 0 ] = m_pan;
+      id[ 1 ] = m_short_addr;
+    }
+    
+    call PANID.write(0, (uint8_t*)&id, sizeof(id));
+  }
+
+
+  
+  /***************** Defaults ****************/
+  default event void CC2420Config.syncDone( error_t error ) {
+  }
+
+  default event void ReadRssi.readDone(error_t error, uint16_t data) {
+  }
+  
+  /*
+  
+  command error_t Read_rssi.read() { 
+	return call RssiResource.request();
+  }
+  */
+  
+}
diff --git a/tos/lib/net/zigbee/cc2420/CC2420ReceiveC.nc b/tos/lib/net/zigbee/cc2420/CC2420ReceiveC.nc
new file mode 100644
index 00000000..a50d03cd
--- /dev/null
+++ b/tos/lib/net/zigbee/cc2420/CC2420ReceiveC.nc
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the receive path for the ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-02-11 17:41:25 $
+ */
+
+
+
+configuration CC2420ReceiveC {
+
+	provides interface StdControl;
+	
+	provides interface Receiveframe;
+	
+	provides interface AddressFilter;
+
+}
+
+implementation {
+	components MainC;
+	components CC2420ReceiveP;
+	
+	components new CC2420SpiC() as Spi;
+	components CC2420ControlC;
+	
+	components HplCC2420PinsC as Pins;
+	components HplCC2420InterruptsC as InterruptsC;
+	
+	components LedsC as Leds;
+	CC2420ReceiveP.Leds -> Leds;
+	
+	StdControl = CC2420ReceiveP;
+	
+	Receiveframe = CC2420ReceiveP;
+	
+	AddressFilter = CC2420ReceiveP;
+	
+	
+	MainC.SoftwareInit -> CC2420ReceiveP;
+	
+	CC2420ReceiveP.CSN -> Pins.CSN;
+	CC2420ReceiveP.FIFO -> Pins.FIFO;
+	CC2420ReceiveP.FIFOP -> Pins.FIFOP;
+	CC2420ReceiveP.InterruptFIFOP -> InterruptsC.InterruptFIFOP;
+	CC2420ReceiveP.SpiResource -> Spi;
+	CC2420ReceiveP.RXFIFO -> Spi.RXFIFO;
+	CC2420ReceiveP.SFLUSHRX -> Spi.SFLUSHRX;
+	CC2420ReceiveP.SACK -> Spi.SACK;
+	
+	CC2420ReceiveP.CC2420Config -> CC2420ControlC;
+
+}
diff --git a/tos/lib/net/zigbee/cc2420/CC2420ReceiveP.nc b/tos/lib/net/zigbee/cc2420/CC2420ReceiveP.nc
new file mode 100644
index 00000000..c34d033e
--- /dev/null
+++ b/tos/lib/net/zigbee/cc2420/CC2420ReceiveP.nc
@@ -0,0 +1,1005 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Jung Il Choi
+ * @version $Revision: 1.2 $ $Date: 2009-09-18 16:35:40 $
+ */
+ 
+#include "printfUART.h"
+#include "frame_format.h"
+#include "mac_func.h"
+
+module CC2420ReceiveP {
+
+  provides interface Init;
+  provides interface StdControl;
+  //provides interface CC2420Receive;
+  //provides interface Receive;
+  //provides interface ReceiveIndicator as PacketIndicator;
+
+  provides interface Receiveframe;
+  
+  provides interface AddressFilter;
+
+
+
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as FIFO;
+  uses interface GeneralIO as FIFOP;
+  uses interface GpioInterrupt as InterruptFIFOP;
+
+  uses interface Resource as SpiResource;
+  uses interface CC2420Fifo as RXFIFO;
+  uses interface CC2420Strobe as SACK;
+  uses interface CC2420Strobe as SFLUSHRX;
+  //uses interface CC2420Packet;
+  //uses interface CC2420PacketBody;
+  uses interface CC2420Config;
+  
+  uses interface Leds;
+  
+  
+  
+  
+  
+}
+
+implementation {
+
+typedef enum{
+	S_STOPPED =0,
+	S_STARTED=1,
+	S_RX_LENGTH=2,
+	S_RX_FC=3, //FC - FRAME CONTROL
+	S_RX_ADDR=4,
+	S_RX_PAYLOAD=5,
+	S_RX_DISCARD=6,
+}cc2420_receive_state_t;
+
+
+/*
+  typedef enum {
+    S_STOPPED,
+    S_STARTED,
+    S_RX_LENGTH,
+    S_RX_FCF,
+    S_RX_PAYLOAD,
+  } cc2420_receive_state_t;
+  */
+  enum {
+    RXFIFO_SIZE = 128,
+    TIMESTAMP_QUEUE_SIZE = 8,
+    SACK_HEADER_LENGTH = 7,
+  };
+  
+  //uint16_t m_timestamp_queue[ TIMESTAMP_QUEUE_SIZE ];
+  
+  //uint8_t m_timestamp_head;
+  
+  //uint8_t m_timestamp_size;
+  
+  /** Number of packets we missed because we were doing something else */
+  uint8_t m_missed_packets;
+  
+  /** TRUE if we are receiving a valid packet into the stack */
+ bool receivingPacket;
+  
+  /** The length of the frame we're currently receiving */
+  norace uint8_t rxFrameLength;
+  
+  //number of bytes left in the FIFO Buffer
+  norace uint8_t m_bytes_left;
+  
+  //norace message_t* m_p_rx_buf;
+
+  //message_t m_rx_buf;
+  
+  //already used
+  //cc2420_receive_state_t m_state;
+  
+  
+  norace MPDU rxmpdu;
+  MPDU *rxmpdu_ptr;
+  
+  
+   cc2420_receive_state_t m_state;
+ 
+  
+  uint8_t rssi;
+  
+  
+  uint8_t receive_count=0;
+  
+  
+  
+/*******************************************/
+/****	ADDRESS DECODE VARIABLES		****/
+/*******************************************/
+	//address verification frame control variables
+	//frame control variables
+	uint8_t source_address=0;
+	uint8_t destination_address=0;
+
+	//address verification structure pointers
+	dest_short *dest_short_ptr;
+	dest_long *dest_long_ptr;
+
+	source_short *source_short_ptr;
+	source_long *source_long_ptr;
+
+	beacon_addr_short *beacon_addr_short_ptr;
+
+	uint8_t address_decode = 1;
+
+	//address verification variables
+	uint16_t ver_macCoordShortAddress = 0x0000;
+	uint16_t ver_macShortAddress = 0xffff;
+	
+	uint32_t ver_aExtendedAddress0=0x00000000;
+	uint32_t ver_aExtendedAddress1=0x00000000;
+  
+	uint16_t ver_macPANId=0xffff;
+    
+  
+  
+  /***************** Prototypes ****************/
+  void reset_state();
+  void beginReceive();
+  void receive();
+  void waitForNextPacket();
+  void flush();
+  
+ // task void receiveDone_task();
+  
+  /***************** Init Commands ****************/
+  command error_t Init.init() {
+    //m_p_rx_buf = &m_rx_buf;
+	
+	rxmpdu_ptr = &rxmpdu;
+	
+	  printfUART_init();
+	
+    return SUCCESS;
+  }
+
+  /***************** StdControl ****************/
+  command error_t StdControl.start() {
+   
+    atomic {
+      reset_state();
+      m_state = S_STARTED;
+      atomic receivingPacket = FALSE;
+      call InterruptFIFOP.enableFallingEdge();
+    }
+	
+
+	
+    return SUCCESS;
+  }
+  
+  command error_t StdControl.stop() {
+    atomic {
+      m_state = S_STOPPED;
+      reset_state();
+      call CSN.set();
+      call InterruptFIFOP.disable();
+    }
+    return SUCCESS;
+  }
+
+
+
+
+	command error_t AddressFilter.set_address(uint16_t mac_short_address, uint32_t mac_extended0, uint32_t mac_extended1)
+	{
+		
+		ver_macShortAddress = mac_short_address;
+
+		ver_aExtendedAddress0=mac_extended0;
+		ver_aExtendedAddress1=mac_extended1;
+
+		address_decode = 1;
+
+		//printfUART("sa %i %x %x %x %x\n",address_decode,ver_macShortAddress,ver_aExtendedAddress0,ver_aExtendedAddress1);
+
+
+		return SUCCESS;
+	}
+	  
+	  
+	command error_t AddressFilter.set_coord_address(uint16_t mac_coord_address, uint16_t mac_panid)
+	{
+   
+		ver_macCoordShortAddress = mac_coord_address;
+		ver_macPANId = mac_panid;
+
+		//printfUART("sca %i %x %x\n",address_decode,ver_macCoordShortAddress,ver_macPANId);
+
+		return SUCCESS;
+	}
+   
+   
+	command error_t AddressFilter.enable_address_decode(uint8_t enable)
+	{
+	
+		address_decode = enable;
+		
+		//printfUART("ead %i\n",address_decode);
+	
+		return SUCCESS;
+	}
+	
+
+
+
+  /***************** Receive Commands ****************/
+  /*
+  command void* Receive.getPayload(message_t* m, uint8_t* len) {
+  
+    if (len != NULL) {
+      *len = ((uint8_t*) (call CC2420PacketBody.getHeader( m_p_rx_buf )))[0];
+    }
+    return m->data;
+  }
+
+  command uint8_t Receive.payloadLength(message_t* m) {
+    uint8_t* buf = (uint8_t*)(call CC2420PacketBody.getHeader( m_p_rx_buf ));
+    return buf[0];
+  }
+  
+  */
+  /***************** CC2420Receive Commands ****************/
+  /**
+   * Start frame delimiter signifies the beginning/end of a packet
+   * See the CC2420 datasheet for details.
+   */
+   /*
+  async command void CC2420Receive.sfd( uint16_t time ) {
+  
+    if ( m_timestamp_size < TIMESTAMP_QUEUE_SIZE ) {
+      uint8_t tail =  ( ( m_timestamp_head + m_timestamp_size ) % 
+                        TIMESTAMP_QUEUE_SIZE );
+      m_timestamp_queue[ tail ] = time;
+      m_timestamp_size++;
+    }
+	
+  }
+
+  async command void CC2420Receive.sfd_dropped() {
+  
+    if ( m_timestamp_size ) {
+      m_timestamp_size--;
+    }
+	
+  }
+*/
+  /***************** PacketIndicator Commands ****************/
+  /*
+  command bool PacketIndicator.isReceiving() {
+    bool receiving;
+    atomic {
+      receiving = receivingPacket;
+    }
+    return receiving;
+  }
+  
+  */
+  /***************** InterruptFIFOP Events ****************/
+  async event void InterruptFIFOP.fired() {
+  
+  ////printfUART("Int %i\n",m_state);
+//call Leds.led1Toggle();
+  //call Leds.led2Toggle();
+    
+	
+	if ( m_state == S_STARTED ) {
+	
+	
+      beginReceive();
+	  
+	  
+	  /*
+	if(call SpiResource.isOwner()) {
+      receive();
+      
+    } else if (call SpiResource.immediateRequest() == SUCCESS) {
+      receive();
+      
+    } else {
+      call SpiResource.request();
+    }
+*/
+    } else {
+      m_missed_packets++;
+    }
+	
+  }
+  
+  
+  /***************** SpiResource Events ****************/
+  event void SpiResource.granted() {
+    receive();
+  }
+  
+  /***************** RXFIFO Events ****************/
+  /**
+   * We received some bytes from the SPI bus.  Process them in the context
+   * of the state we're in.  Remember the length byte is not part of the length
+   */
+  async event void RXFIFO.readDone( uint8_t* rx_buf, uint8_t rx_len,error_t error ) {
+  
+  
+  //int i;
+	/*
+	uint8_t len;
+	
+	//uint8_t rssi;
+	//uint8_t lqi;
+	int i;
+	
+	len = rx_buf[0];
+	
+	rssi= 255 - rx_buf[len-1];
+	
+	//lqi = rssi & 0x7f;
+	*/
+	/*
+  
+   //printfUART("r d %i %i\n", len, rssi);
+  
+   // len = rx_buf[0];
+	//rssi=rx_buf[len-2];
+ 
+	
+	for (i=0;i<40;i++)
+	{
+		//printfUART("r %i %x\n",i,rx_buf[i]);
+	}
+ 
+ 
+ 
+ 
+  	//signal Receiveframe.receive((uint8_t*)rxmpdu_ptr, rssi);
+	
+	receive_count++;
+	
+	if (receive_count == 2)
+	{	flush();
+		receive_count =0;
+	}
+	*/
+	
+	atomic{
+	//my code
+	switch(m_state){
+	
+	case S_RX_LENGTH:
+	
+					rxFrameLength = rx_buf[0];
+					
+					m_state = S_RX_FC;
+					
+					//verify print
+					////printfUART("LEN %x %x %i %i\n",rxFrameLength,rxmpdu_ptr->length,m_state,m_bytes_left);
+					
+					//printfUART("r%i %i %i\n",rxmpdu_ptr->seq_num,rxFrameLength,MAC_PACKET_SIZE);
+					
+					if ( rxFrameLength + 1 > m_bytes_left )
+					{
+						// Length of this packet is bigger than the RXFIFO, flush it out.
+						//printfUART("pkt too big\n","");
+						flush();
+						
+					}
+					else
+					{
+						if ( !call FIFO.get() && !call FIFOP.get() )
+						{
+						//printfUART("RED left %x\n",m_bytes_left);
+					
+						  m_bytes_left -= rxFrameLength + 1;
+						}
+						
+						//if(rxFrameLength <= MAC_PACKET_SIZE) 
+						//{
+							if(rxFrameLength > 0) 
+							{
+								//verify read length and read the frame control field (2 bytes)
+								if(rxFrameLength > 2) {
+								  // This packet has an FCF byte plus at least one more byte to read
+								  //call RXFIFO.continueRead(buf + 1, SACK_HEADER_LENGTH);
+								  
+								  ////printfUART("LEN OK\n","");
+								  //read frame control + sequence number
+								  call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 1, 3);
+								}
+								else
+								{
+								  // This is really a bad packet, skip FCF and get it out of here.
+								  //m_state = S_RX_PAYLOAD;
+								  
+									m_state = S_RX_DISCARD;
+									//printfUART("bad len\n","");
+									
+									call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 1, rxFrameLength);
+									return;
+								}
+							} 
+							else 
+							{
+								// Length == 0; start reading the next packet
+								atomic receivingPacket = FALSE;
+								call CSN.set();
+								call SpiResource.release();
+								waitForNextPacket();
+							}
+						  
+						//}
+						//else
+						//{
+							// Length is too large; we have to flush the entire Rx FIFO
+						//	//printfUART("pkt too large\n","");
+						//	flush();
+							
+						//	return;
+						//}
+					}
+					break;
+	case S_RX_FC:
+					
+					//verify print
+					////printfUART("FC %x %x %x %i\n",rxmpdu_ptr->frame_control1,rxmpdu_ptr->frame_control2,rxmpdu_ptr->seq_num, m_state);
+				
+					if ((rxmpdu_ptr->frame_control1 & 0x7) == TYPE_ACK)
+					{
+						m_state = S_RX_PAYLOAD;
+						
+						//printfUART("r ack \n",""); 
+						call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr+4,2);
+						return;
+					}
+					
+				
+					if (address_decode == 1)
+					{
+						m_state = S_RX_ADDR;
+						
+						destination_address=get_fc2_dest_addr(rxmpdu_ptr->frame_control2);
+						
+						if (destination_address > 1)
+						{
+							switch(destination_address)
+							{
+								case SHORT_ADDRESS:
+												//read the short address + destination PAN identifier
+												////printfUART("s ad",""); 
+												call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 4, 6); 
+													break;
+								
+								case LONG_ADDRESS:
+												//read the long address + destination PAN identifier
+												call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 4, 12);
+												break;
+							}
+						}
+						else
+						{
+							//destination address fields not present
+							m_state = S_RX_PAYLOAD;
+							//it is not possible to do the address decoding, there is no destination address fields
+							//send the full packet up
+							call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 4, rxmpdu_ptr->length- 3);
+							
+						}
+					}
+					else
+					{
+						//address decode is not activated
+						m_state = S_RX_PAYLOAD;
+						call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 4, rxmpdu_ptr->length - 3);
+					}
+	
+	
+					break;			
+	case S_RX_ADDR:
+					m_state = S_RX_PAYLOAD;
+					
+					
+					switch ((rxmpdu_ptr->frame_control1 & 0x7))
+					{
+						case TYPE_BEACON:
+									////printfUART("RB \n","");
+									
+									beacon_addr_short_ptr = (beacon_addr_short *) &rxmpdu_ptr->data[0];
+									
+									////printfUART("pb %x %x %x %x\n",rxmpdu_ptr->seq_num, beacon_addr_short_ptr->destination_PAN_identifier,beacon_addr_short_ptr->destination_address, beacon_addr_short_ptr->source_address);
+																		
+									/*
+									for (i=0;i<6;i++)
+									{
+										//printfUART("r %i %x %x %x\n",i,rxmpdu_ptr->data[i],rx_buf[i],rx_buf[i+4]);
+									}
+									*/
+									
+									//printfUART("RB %x %x \n",ver_macCoordShortAddress,ver_macShortAddress);
+
+									
+									//avoid VERIFY static assignment of coordinator parent
+									if (beacon_addr_short_ptr->source_address != ver_macCoordShortAddress)
+									{
+											//printfUART("bad bec %x %x\n", beacon_addr_short_ptr->source_address,ver_macCoordShortAddress);
+											
+											m_state = S_RX_DISCARD;
+											call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 10, rxmpdu_ptr->length - 9);
+											return;
+									}
+									/*
+									if (ver_macShortAddress != 0xffff)
+									{
+										if ( beacon_addr_short_ptr->source_address != ver_macShortAddress)
+										{
+											//printfUART("pb %x %x\n", beacon_addr_short_ptr->source_address,ver_macShortAddress);
+											
+											m_state = S_RX_DISCARD;
+											call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 10, rxmpdu_ptr->length - 9);
+											return;
+										}
+									}
+									*/
+									break;
+							case TYPE_DATA:
+							case TYPE_CMD:
+							
+									//VALIDATION OF DESTINATION ADDRESSES - NOT TO OVERLOAD THE PROCESSOR
+									if (destination_address > 1)
+									{
+										switch(destination_address)
+										{
+											case SHORT_ADDRESS: 
+													dest_short_ptr = (dest_short *) &rxmpdu_ptr->data[0];
+																
+													if ( dest_short_ptr->destination_address != 0xffff && dest_short_ptr->destination_address != ver_macShortAddress)
+													{
+														//printfUART("nsm %x %x\n", dest_short_ptr->destination_address,ver_macShortAddress); 
+														
+														m_state = S_RX_DISCARD;
+														call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 10, rxmpdu_ptr->length - 9);
+														return;
+													}
+													
+													//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+													//broadcast PAN identifier (0 x ffff).
+													if(dest_short_ptr->destination_PAN_identifier != 0xffff && dest_short_ptr->destination_PAN_identifier != ver_macPANId )
+													{
+														//printfUART("wsP %x %x \n", dest_short_ptr->destination_PAN_identifier,ver_macPANId); 
+														
+														m_state = S_RX_DISCARD;
+														call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 10, rxmpdu_ptr->length - 9);
+														return;
+													}
+													
+													break;
+											
+											case LONG_ADDRESS: 
+													
+													dest_long_ptr = (dest_long *) &rxmpdu_ptr->data[0];
+													/*
+													if ( dest_long_ptr->destination_address0 !=ver_aExtendedAddress0 && dest_long_ptr->destination_address1 !=ver_aExtendedAddress1 )
+													{
+														//printfUART("nlm %x %x \n",dest_long_ptr->destination_address0,dest_long_ptr->destination_address1); 
+														
+														m_state = S_RX_DISCARD;
+														call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 16, rxmpdu_ptr->length - 15);
+														return;
+													}
+													
+													
+													//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+													//broadcast PAN identifier (0 x ffff).
+													if(dest_long_ptr->destination_PAN_identifier != 0xffff && dest_long_ptr->destination_PAN_identifier != ver_macPANId )
+													{
+														//printfUART("wLP %x %x\n", dest_long_ptr->destination_PAN_identifier,ver_macPANId); 
+																	
+														m_state = S_RX_DISCARD;
+														call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 16, rxmpdu_ptr->length - 15);
+														return;
+													}
+													*/
+													break;
+										}
+									}
+									
+									break;
+									
+							case TYPE_ACK:
+							
+										//printfUART("error ack \n",""); 
+										//call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr);
+										
+										return;
+										
+									break;
+									
+
+					}
+					
+					//read the remaining packet
+					switch(destination_address)
+					{
+						case SHORT_ADDRESS:
+							////printfUART("as %i\n", (rxmpdu_ptr->length - 9));
+								
+							call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 10, rxmpdu_ptr->length - 9); //7
+							break;
+								
+						case LONG_ADDRESS:
+							////printfUART("al %i\n", (rxmpdu_ptr->length - 15));
+							call RXFIFO.continueRead((uint8_t*)rxmpdu_ptr + 16, rxmpdu_ptr->length - 15);
+							break;
+					}
+			
+			break;
+					
+					
+	case S_RX_PAYLOAD:
+				call CSN.set();
+				//signal Receiveframe.receive((uint8_t*)rxmpdu_ptr, rssi);
+				
+				
+				//rssi= 255 - rx_buf[len-1];
+				
+				/*
+				for (i=6;i<12;i++)
+				{
+					//printfUART("p %i %x %x\n",i,rxmpdu_ptr->data[i],rx_buf[i-6]);
+				}
+				*/
+				
+				if(!m_missed_packets) {
+					// Release the SPI only if there are no more frames to download
+					call SpiResource.release();
+				}
+				
+				rssi = 255 - rxmpdu_ptr->data[rxmpdu_ptr->length-4];
+				
+				//printfUART("pay %i %x %i\n",rxmpdu_ptr->seq_num, rssi,m_missed_packets);
+				
+				signal Receiveframe.receive((uint8_t*)rxmpdu_ptr, rssi);
+				
+				
+				if (m_missed_packets == 0)
+				{
+					flush();
+				}
+				else
+				{
+					waitForNextPacket();
+				}
+				
+			break;
+	
+	
+	case S_RX_DISCARD:
+			atomic receivingPacket = FALSE;
+			call CSN.set();
+			call SpiResource.release();	
+				if (m_missed_packets == 0)
+				{
+					flush();
+				}
+				else
+				{
+					waitForNextPacket();
+				}
+				
+			break;
+				
+	default:
+			  atomic receivingPacket = FALSE;
+			  call CSN.set();
+			  call SpiResource.release();
+			  break;
+	
+	
+	}
+  
+  }
+  
+  
+  /*
+    cc2420_header_t* header = call CC2420PacketBody.getHeader( m_p_rx_buf );
+    cc2420__t* metadata = call CC2420PacketBody.getMetadata( m_p_rx_buf );
+    uint8_t* buf = (uint8_t*) header;
+    rxFrameLength = buf[ 0 ];
+
+    switch( m_state ) {
+
+    case S_RX_LENGTH:
+      m_state = S_RX_FCF;
+      if ( rxFrameLength + 1 > m_bytes_left ) {
+        // Length of this packet is bigger than the RXFIFO, flush it out.
+        flush();
+        
+      } else {
+        if ( !call FIFO.get() && !call FIFOP.get() ) {
+          m_bytes_left -= rxFrameLength + 1;
+        }
+        
+        if(rxFrameLength <= MAC_PACKET_SIZE) {
+          if(rxFrameLength > 0) {
+            if(rxFrameLength > SACK_HEADER_LENGTH) {
+              // This packet has an FCF byte plus at least one more byte to read
+              call RXFIFO.continueRead(buf + 1, SACK_HEADER_LENGTH);
+              
+            } else {
+              // This is really a bad packet, skip FCF and get it out of here.
+              m_state = S_RX_PAYLOAD;
+              call RXFIFO.continueRead(buf + 1, rxFrameLength);
+            }
+                            
+          } else {
+            // Length == 0; start reading the next packet
+            atomic receivingPacket = FALSE;
+            call CSN.set();
+            call SpiResource.release();
+            waitForNextPacket();
+          }
+          
+        } else {
+          // Length is too large; we have to flush the entire Rx FIFO
+          flush();
+        }
+      }
+      break;
+      
+    case S_RX_FCF:
+      m_state = S_RX_PAYLOAD;
+      
+      
+       * The destination address check here is not completely optimized. If you 
+       * are seeing issues with dropped acknowledgements, try removing
+       * the address check and decreasing SACK_HEADER_LENGTH to 2.
+       * The length byte and the FCF byte are the only two bytes required
+       * to know that the packet is valid and requested an ack.  The destination
+       * address is useful when we want to sniff packets from other transmitters
+       * while acknowledging packets that were destined for our local address.
+       *//*
+      if(call CC2420Config.isAutoAckEnabled() && !call CC2420Config.isHwAutoAckDefault()) {
+        if (((( header->fcf >> IEEE154_FCF_ACK_REQ ) & 0x01) == 1)
+            && (header->dest == call CC2420Config.getShortAddr())
+            && ((( header->fcf >> IEEE154_FCF_FRAME_TYPE ) & 7) == IEEE154_TYPE_DATA)) {
+          // CSn flippage cuts off our FIFO; SACK and begin reading again
+          call CSN.set();
+          call CSN.clr();
+          call SACK.strobe();
+          call CSN.set();
+          call CSN.clr();
+          call RXFIFO.beginRead(buf + 1 + SACK_HEADER_LENGTH, 
+              rxFrameLength - SACK_HEADER_LENGTH);
+          return;
+        }
+		
+		
+      }
+      
+      // Didn't flip CSn, we're ok to continue reading.
+      call RXFIFO.continueRead(buf + 1 + SACK_HEADER_LENGTH, 
+          rxFrameLength - SACK_HEADER_LENGTH);
+      break;
+    
+    case S_RX_PAYLOAD:
+      call CSN.set();
+      
+      if(!m_missed_packets) {
+        // Release the SPI only if there are no more frames to download
+        call SpiResource.release();
+      }
+      
+      if ( m_timestamp_size ) {
+        if ( rxFrameLength > 10 ) {
+          metadata->time = m_timestamp_queue[ m_timestamp_head ];
+          m_timestamp_head = ( m_timestamp_head + 1 ) % TIMESTAMP_QUEUE_SIZE;
+          m_timestamp_size--;
+        }
+      } else {
+        metadata->time = 0xffff;
+      }
+      
+      // We may have received an ack that should be processed by Transmit
+      // buf[rxFrameLength] >> 7 checks the CRC
+      if ( ( buf[ rxFrameLength ] >> 7 ) && rx_buf ) {
+        uint8_t type = ( header->fcf >> IEEE154_FCF_FRAME_TYPE ) & 7;
+       // signal CC2420Receive.receive( type, m_p_rx_buf );
+        if ( type == IEEE154_TYPE_DATA ) {
+          post receiveDone_task();
+          return;
+        }
+      }
+      
+      waitForNextPacket();
+      break;
+
+    default:
+      atomic receivingPacket = FALSE;
+      call CSN.set();
+      call SpiResource.release();
+      break;
+      
+    }
+    */
+  }
+
+  async event void RXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len, error_t error ) {
+  }  
+  
+  /***************** Tasks *****************/
+  /**
+   * Fill in metadata details, pass the packet up the stack, and
+   * get the next packet.
+   */
+   /*
+  task void receiveDone_task() {
+    cc2420_metadata_t* metadata = call CC2420PacketBody.getMetadata( m_p_rx_buf );
+    uint8_t* buf = (uint8_t*) call CC2420PacketBody.getHeader( m_p_rx_buf );;
+    
+    metadata->crc = buf[ rxFrameLength ] >> 7;
+    metadata->rssi = buf[ rxFrameLength - 1 ];
+    metadata->lqi = buf[ rxFrameLength ] & 0x7f;
+    m_p_rx_buf = signal Receive.receive( m_p_rx_buf, m_p_rx_buf->data, 
+                                         rxFrameLength );
+
+    atomic receivingPacket = FALSE;
+    waitForNextPacket();
+  }
+  */
+  /****************** CC2420Config Events ****************/
+  event void CC2420Config.syncDone( error_t error ) {
+  }
+  
+  /****************** Functions ****************/
+  /**
+   * Attempt to acquire the SPI bus to receive a packet.
+   */
+   
+  void beginReceive() { 
+  
+    m_state = S_RX_LENGTH;
+    
+    atomic receivingPacket = TRUE;
+  
+  ////printfUART("br %i\n",m_state);
+
+	if(call SpiResource.isOwner()) {
+      receive();
+      
+    } else if (call SpiResource.immediateRequest() == SUCCESS) {
+      receive();
+      
+    } else {
+      call SpiResource.request();
+    }
+  }
+  
+  /**
+   * Flush out the Rx FIFO
+   */
+  void flush() {
+	//printfUART("f %i\n",m_state);
+    reset_state();
+    call CSN.set();
+    call CSN.clr();
+    call SFLUSHRX.strobe();
+    call SFLUSHRX.strobe();
+    call CSN.set();
+    call SpiResource.release();
+    waitForNextPacket();
+  }
+  
+  /**
+   * The first byte of each packet is the length byte.  Read in that single
+   * byte, and then read in the rest of the packet.  The CC2420 could contain
+   * multiple packets that have been buffered up, so if something goes wrong, 
+   * we necessarily want to flush out the FIFO unless we have to.
+   */
+  void receive() {
+	//call Leds.led2Toggle();
+  
+    call CSN.clr();
+    
+	//call RXFIFO.beginRead( (uint8_t*)(call CC2420PacketBody.getHeader( m_p_rx_buf )), 1 );
+  
+	//call RXFIFO.beginRead ((uint8_t*)rxmpdu_ptr,100);
+  
+	//my old
+	call RXFIFO.beginRead((uint8_t*)rxmpdu_ptr,1);
+	
+	
+
+  
+  }
+
+
+  /**
+   * Determine if there's a packet ready to go, or if we should do nothing
+   * until the next packet arrives
+   */
+   
+  void waitForNextPacket() {
+    atomic {
+      if ( m_state == S_STOPPED ) {
+        call SpiResource.release();
+        return;
+      }
+      
+	   //printfUART("wn %i %i\n",m_state,m_missed_packets );
+	  
+	  
+      atomic receivingPacket = FALSE;
+	  
+      if ( ( m_missed_packets && call FIFO.get() ) || !call FIFOP.get() ) {
+        // A new packet is buffered up and ready to go
+        if ( m_missed_packets ) {
+          m_missed_packets--;
+        }
+        
+        beginReceive();
+        
+      } else {
+        // Wait for the next packet to arrive
+		
+		
+		
+        m_state = S_STARTED;
+		
+		//printfUART("wnP %i\n",m_state);
+		
+        m_missed_packets = 0;
+        call SpiResource.release();
+      }
+    }
+  }
+ 
+  /**
+   * Reset this component
+   */
+   
+  void reset_state() {
+    m_bytes_left = RXFIFO_SIZE;
+    atomic receivingPacket = FALSE;
+    //m_timestamp_head = 0;
+    //m_timestamp_size = 0;
+    m_missed_packets = 0;
+  }
+
+}
diff --git a/tos/lib/net/zigbee/cc2420/CC2420SpiP.nc b/tos/lib/net/zigbee/cc2420/CC2420SpiP.nc
new file mode 100644
index 00000000..b88fc1b3
--- /dev/null
+++ b/tos/lib/net/zigbee/cc2420/CC2420SpiP.nc
@@ -0,0 +1,377 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Roman Lim
+ * @version $Revision: 1.1 $ $Date: 2008-02-11 17:41:25 $
+ */
+
+module CC2420SpiP {
+
+  provides {
+    interface ChipSpiResource;
+    interface Resource[ uint8_t id ];
+    interface CC2420Fifo as Fifo[ uint8_t id ];
+    interface CC2420Ram as Ram[ uint16_t id ];
+    interface CC2420Register as Reg[ uint8_t id ];
+    interface CC2420Strobe as Strobe[ uint8_t id ];
+  }
+  
+  uses {
+    interface Resource as SpiResource;
+    interface SpiByte;
+    interface SpiPacket;
+    interface State as WorkingState;
+    interface Leds;
+  }
+}
+
+implementation {
+
+  enum {
+    RESOURCE_COUNT = uniqueCount( "CC2420Spi.Resource" ),
+    NO_HOLDER = 0xFF,
+  };
+
+  /** WorkingStates */
+  enum {
+    S_IDLE,
+    S_BUSY,
+  };
+
+  /** Address to read/write on the CC2420, also maintains caller's client id */
+  norace uint16_t m_addr;
+  
+  /** Each bit represents a client ID that is requesting SPI bus access */
+  uint8_t m_requests = 0;
+  
+  /** The current client that owns the SPI bus */
+  uint8_t m_holder = NO_HOLDER;
+  
+  /** TRUE if it is safe to release the SPI bus after all users say ok */
+  bool release;
+  
+  /***************** Prototypes ****************/
+  error_t attemptRelease();
+  task void grant();
+  
+  /***************** ChipSpiResource Commands ****************/
+  /**
+   * Abort the release of the SPI bus.  This must be called only with the
+   * releasing() event
+   */
+  async command void ChipSpiResource.abortRelease() {
+    atomic release = FALSE;
+  }
+  
+  /**
+   * Release the SPI bus if there are no objections
+   */
+  async command error_t ChipSpiResource.attemptRelease() {
+    return attemptRelease();
+  }
+  
+  /***************** Resource Commands *****************/
+  async command error_t Resource.request[ uint8_t id ]() {
+        
+    atomic {
+      if ( call WorkingState.requestState(S_BUSY) == SUCCESS ) {
+        m_holder = id;
+        if(call SpiResource.isOwner()) {
+          post grant();
+          
+        } else {
+          call SpiResource.request();
+        }
+        
+      } else {
+        m_requests |= 1 << id;
+      }
+    }
+    return SUCCESS;
+  }
+  
+  async command error_t Resource.immediateRequest[ uint8_t id ]() {
+    error_t error;
+        
+    atomic {
+      if ( call WorkingState.requestState(S_BUSY) != SUCCESS ) {
+        return EBUSY;
+      }
+      
+      
+      if(call SpiResource.isOwner()) {
+        m_holder = id;
+        error = SUCCESS;
+      
+      } else if ((error = call SpiResource.immediateRequest()) == SUCCESS ) {
+        m_holder = id;
+        
+      } else {
+        call WorkingState.toIdle();
+      }
+    }
+    return error;
+  }
+
+  async command error_t Resource.release[ uint8_t id ]() {
+    uint8_t i;
+    atomic {
+      if ( m_holder != id ) {
+        return FAIL;
+      }
+
+      m_holder = NO_HOLDER;
+      if ( !m_requests ) {
+        call WorkingState.toIdle();
+        attemptRelease();
+        
+      } else {
+        for ( i = m_holder + 1; ; i++ ) {
+          i %= RESOURCE_COUNT;
+          
+          if ( m_requests & ( 1 << i ) ) {
+            m_holder = i;
+            m_requests &= ~( 1 << i );
+            post grant();
+            return SUCCESS;
+          }
+        }
+      }
+    }
+    
+    return SUCCESS;
+  }
+  
+  async command uint8_t Resource.isOwner[ uint8_t id ]() {
+    atomic return (m_holder == id);
+  }
+
+
+  /***************** SpiResource Events ****************/
+  event void SpiResource.granted() {
+    post grant();
+  }
+  
+  /***************** Fifo Commands ****************/
+  async command cc2420_status_t Fifo.beginRead[ uint8_t addr ]( uint8_t* data, 
+                                                                uint8_t len ) {
+    
+    cc2420_status_t status = 0;
+
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return status;
+      }
+    }
+    
+    m_addr = addr | 0x40;
+        
+    status = call SpiByte.write( m_addr );
+    call Fifo.continueRead[ addr ]( data, len );
+    
+    return status;
+    
+  }
+
+  async command error_t Fifo.continueRead[ uint8_t addr ]( uint8_t* data,
+                                                           uint8_t len ) {
+    return call SpiPacket.send( NULL, data, len );
+  }
+
+  async command cc2420_status_t Fifo.write[ uint8_t addr ]( uint8_t* data, 
+                                                            uint8_t len ) {
+
+    uint8_t status = 0;
+ 
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return status;
+      }
+    }
+    
+    m_addr = addr;
+
+    status = call SpiByte.write( m_addr );
+    call SpiPacket.send( data, NULL, len );
+
+    return status;
+
+  }
+
+  /***************** RAM Commands ****************/
+  async command cc2420_status_t Ram.read[ uint16_t addr ]( uint8_t offset,
+                                                           uint8_t* data, 
+                                                           uint8_t len ) {
+
+    cc2420_status_t status = 0;
+
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return status;
+      }
+    }
+    
+    addr += offset;
+
+    call SpiByte.write( addr | 0x80 );
+    status = call SpiByte.write( ( ( addr >> 1 ) & 0xc0 ) | 0x20 );
+    for ( ; len; len-- ) {
+      *data++ = call SpiByte.write( 0 );
+    }
+
+    return status;
+
+  }
+
+
+  async command cc2420_status_t Ram.write[ uint16_t addr ]( uint8_t offset,
+                                                            uint8_t* data, 
+                                                            uint8_t len ) {
+
+    cc2420_status_t status = 0;
+
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return status;
+      }
+    }
+    
+    addr += offset;
+
+    call SpiByte.write( addr | 0x80 );
+    call SpiByte.write( ( addr >> 1 ) & 0xc0 );
+    for ( ; len; len-- ) {
+      status = call SpiByte.write( *data++ );
+    }
+
+    return status;
+
+  }
+
+  /***************** Register Commands ****************/
+  async command cc2420_status_t Reg.read[ uint8_t addr ]( uint16_t* data ) {
+
+    cc2420_status_t status = 0;
+    
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return status;
+      }
+    }
+    
+    status = call SpiByte.write( addr | 0x40 );
+    *data = (uint16_t)call SpiByte.write( 0 ) << 8;
+    *data |= call SpiByte.write( 0 );
+    
+    return status;
+
+  }
+
+  async command cc2420_status_t Reg.write[ uint8_t addr ]( uint16_t data ) {
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return 0;
+      }
+    }
+    call SpiByte.write( addr );
+    call SpiByte.write( data >> 8 );
+    return call SpiByte.write( data & 0xff );
+  }
+
+  
+  /***************** Strobe Commands ****************/
+  async command cc2420_status_t Strobe.strobe[ uint8_t addr ]() {
+    atomic {
+      if(call WorkingState.isIdle()) {
+        return 0;
+      }
+    }
+    
+    return call SpiByte.write( addr );
+  }
+
+  /***************** SpiPacket Events ****************/
+  async event void SpiPacket.sendDone( uint8_t* tx_buf, uint8_t* rx_buf, 
+                                       uint16_t len, error_t error ) {
+    if ( m_addr & 0x40 ) {
+      signal Fifo.readDone[ m_addr & ~0x40 ]( rx_buf, len, error );
+    } else {
+      signal Fifo.writeDone[ m_addr ]( tx_buf, len, error );
+    }
+  }
+  
+  /***************** Functions ****************/
+  error_t attemptRelease() {
+  
+  atomic{
+    if(m_requests > 0 
+        || m_holder != NO_HOLDER 
+        || !call WorkingState.isIdle()) {
+      return FAIL;
+    }
+    }
+    atomic release = TRUE;
+    signal ChipSpiResource.releasing();
+    atomic {
+      if(release) {
+        call SpiResource.release();
+        return SUCCESS;
+      }
+    }
+    
+    return EBUSY;
+  }
+  
+  task void grant() {
+    uint8_t holder;
+    atomic { 
+      holder = m_holder;
+    }
+    signal Resource.granted[ holder ]();
+  }
+
+  /***************** Defaults ****************/
+  default event void Resource.granted[ uint8_t id ]() {
+  }
+
+  default async event void Fifo.readDone[ uint8_t addr ]( uint8_t* rx_buf, uint8_t rx_len, error_t error ) {
+  }
+  
+  default async event void Fifo.writeDone[ uint8_t addr ]( uint8_t* tx_buf, uint8_t tx_len, error_t error ) {
+  }
+
+  default async event void ChipSpiResource.releasing() {
+  }
+  
+}
diff --git a/tos/lib/net/zigbee/cc2420/CC2420TransmitC.nc b/tos/lib/net/zigbee/cc2420/CC2420TransmitC.nc
new file mode 100644
index 00000000..55f8679b
--- /dev/null
+++ b/tos/lib/net/zigbee/cc2420/CC2420TransmitC.nc
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the transmit path for the ChipCon CC2420 radio.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-02-11 17:41:25 $
+ */
+
+#include "IEEE802154.h"
+
+configuration CC2420TransmitC {
+
+  provides {
+    interface StdControl;
+
+    interface ReceiveIndicator as EnergyIndicator;
+    interface ReceiveIndicator as ByteIndicator;
+	
+	interface Sendframe;
+  }
+}
+
+implementation {
+
+  components CC2420TransmitP;
+  StdControl = CC2420TransmitP;
+
+  EnergyIndicator = CC2420TransmitP.EnergyIndicator;
+  ByteIndicator = CC2420TransmitP.ByteIndicator;
+
+
+	Sendframe = CC2420TransmitP;
+
+  components MainC;
+  MainC.SoftwareInit -> CC2420TransmitP;
+
+
+  components HplCC2420PinsC as Pins;
+  CC2420TransmitP.CCA -> Pins.CCA;
+  CC2420TransmitP.CSN -> Pins.CSN;
+  CC2420TransmitP.SFD -> Pins.SFD;
+
+  components HplCC2420InterruptsC as Interrupts;
+  CC2420TransmitP.CaptureSFD -> Interrupts.CaptureSFD;
+
+  components new CC2420SpiC() as Spi;
+  CC2420TransmitP.SpiResource -> Spi;
+  CC2420TransmitP.ChipSpiResource -> Spi;
+  CC2420TransmitP.SNOP        -> Spi.SNOP;
+  CC2420TransmitP.STXON       -> Spi.STXON;
+  CC2420TransmitP.STXONCCA    -> Spi.STXONCCA;
+  CC2420TransmitP.SFLUSHTX    -> Spi.SFLUSHTX;
+  CC2420TransmitP.TXCTRL      -> Spi.TXCTRL;
+  CC2420TransmitP.TXFIFO      -> Spi.TXFIFO;
+  CC2420TransmitP.TXFIFO_RAM  -> Spi.TXFIFO_RAM;
+  CC2420TransmitP.MDMCTRL1    -> Spi.MDMCTRL1;
+  
+  components LedsC;
+  CC2420TransmitP.Leds -> LedsC;
+}
diff --git a/tos/lib/net/zigbee/cc2420/CC2420TransmitP.nc b/tos/lib/net/zigbee/cc2420/CC2420TransmitP.nc
new file mode 100644
index 00000000..8dbff359
--- /dev/null
+++ b/tos/lib/net/zigbee/cc2420/CC2420TransmitP.nc
@@ -0,0 +1,254 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Jung Il Choi Initial SACK implementation
+ * @version $Revision: 1.1 $ $Date: 2008-02-11 17:41:25 $
+ */
+
+module CC2420TransmitP {
+
+  provides interface Init;
+  provides interface StdControl;
+
+ provides interface Sendframe;
+
+  provides interface ReceiveIndicator as EnergyIndicator;
+  provides interface ReceiveIndicator as ByteIndicator;
+
+  uses interface GpioCapture as CaptureSFD;
+  uses interface GeneralIO as CCA;
+  uses interface GeneralIO as CSN;
+  uses interface GeneralIO as SFD;
+
+  uses interface Resource as SpiResource;
+  uses interface ChipSpiResource;
+  uses interface CC2420Fifo as TXFIFO;
+  uses interface CC2420Ram as TXFIFO_RAM;
+  uses interface CC2420Register as TXCTRL;
+  uses interface CC2420Strobe as SNOP;
+  uses interface CC2420Strobe as STXON;
+  uses interface CC2420Strobe as STXONCCA;
+  uses interface CC2420Strobe as SFLUSHTX;
+  uses interface CC2420Register as MDMCTRL1;
+
+
+  uses interface Leds;
+}
+
+implementation {
+
+  /** Byte reception/transmission indicator */
+  bool sfdHigh;
+
+
+  /***************** Prototypes ****************/
+
+  void attemptSend();
+
+  error_t acquireSpiResource();
+  error_t releaseSpiResource();
+  void signalDone( error_t err );
+  
+  
+  /***************** Init Commands *****************/
+  command error_t Init.init() {
+    call CCA.makeInput();
+    call CSN.makeOutput();
+    call SFD.makeInput();
+    return SUCCESS;
+  }
+
+  /***************** StdControl Commands ****************/
+  command error_t StdControl.start() {
+    atomic {
+      call CaptureSFD.captureRisingEdge();
+	}
+	
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    atomic {
+
+      call CaptureSFD.disable();
+      call SpiResource.release();  // REMOVE
+      call CSN.set();
+    }
+    return SUCCESS;
+  }
+  
+  
+/**************** Send Commands ****************/
+
+	async command error_t Sendframe.send(uint8_t* frame, uint8_t frame_length)
+	{
+		//printfUART("Send Command\n", ""); 
+    
+		if ( acquireSpiResource() == SUCCESS ) {
+			call CSN.clr();
+		
+			call TXCTRL.write( ( 2 << CC2420_TXCTRL_TXMIXBUF_CUR ) |
+							 ( 3 << CC2420_TXCTRL_PA_CURRENT ) |
+							 ( 1 << CC2420_TXCTRL_RESERVED ) |
+							 ( (CC2420_DEF_RFPOWER & 0x1F) << CC2420_TXCTRL_PA_LEVEL ) );
+	
+		
+			call TXFIFO.write( (uint8_t*)frame, frame_length);
+
+		}
+		return SUCCESS;
+	}
+
+
+  /***************** Indicator Commands ****************/
+  command bool EnergyIndicator.isReceiving() {
+    return !(call CCA.get());
+  }
+  
+  command bool ByteIndicator.isReceiving() {
+    bool high;
+    atomic high = sfdHigh;
+    return high;
+  }
+  
+  /**
+   * The CaptureSFD event is actually an interrupt from the capture pin
+   * which is connected to timing circuitry and timer modules.  This
+   * type of interrupt allows us to see what time (being some relative value)
+   * the event occurred, and lets us accurately timestamp our packets.  This
+   * allows higher levels in our system to synchronize with other nodes.
+   *
+   * Because the SFD events can occur so quickly, and the interrupts go
+   * in both directions, we set up the interrupt but check the SFD pin to
+   * determine if that interrupt condition has already been met - meaning,
+   * we should fall through and continue executing code where that interrupt
+   * would have picked up and executed had our microcontroller been fast enough.
+   */
+  async event void CaptureSFD.captured( uint16_t time ) {
+ 
+  }
+
+  /***************** ChipSpiResource Events ****************/
+  async event void ChipSpiResource.releasing() {
+  }
+  
+
+  /***************** SpiResource Events ****************/
+  event void SpiResource.granted() {
+   
+      attemptSend();
+     
+  }
+  
+  /***************** TXFIFO Events ****************/
+  /**
+   * The TXFIFO is used to load packets into the transmit buffer on the
+   * chip
+   */
+  async event void TXFIFO.writeDone( uint8_t* tx_buf, uint8_t tx_len,error_t error ) 
+  {
+
+    call CSN.set();
+	attemptSend();
+     
+  }
+
+  
+  async event void TXFIFO.readDone( uint8_t* tx_buf, uint8_t tx_len,error_t error ) {
+  }
+  
+      
+  /***************** Functions ****************/
+  
+ 
+  /**
+   * Attempt to send the packet we have loaded into the tx buffer on 
+   * the radio chip.  The STXONCCA will send the packet immediately if
+   * the channel is clear.  If we're not concerned about whether or not
+   * the channel is clear (i.e. m_cca == FALSE), then STXON will send the
+   * packet without checking for a clear channel.
+   *
+   * If the packet didn't get sent, then congestion == TRUE.  In that case,
+   * we reset the backoff timer and try again in a moment.
+   *
+   * If the packet got sent, we should expect an SFD interrupt to take
+   * over, signifying the packet is getting sent.
+   */
+  void attemptSend() {
+  
+
+
+   //printfUART("attempt Send Command\n", ""); 
+
+    atomic {
+	
+      
+      call CSN.clr();
+
+       call STXON.strobe();
+     
+      call CSN.set();
+	  
+    releaseSpiResource();
+	}
+    
+
+	signalDone(SUCCESS);
+		
+  }
+  
+  error_t acquireSpiResource() {
+    error_t error = call SpiResource.immediateRequest();
+   
+    //printfUART("acquire spi\n", ""); 
+	if ( error != SUCCESS ) {
+      call SpiResource.request();
+    }
+    return error;
+  }
+
+  error_t releaseSpiResource() {
+    call SpiResource.release();
+    return SUCCESS;
+  }
+
+    
+  void signalDone( error_t err ) {
+
+    call ChipSpiResource.attemptRelease();
+    signal Sendframe.sendDone( err );
+  }
+
+}
+
diff --git a/tos/lib/net/zigbee/cc2420/Receiveframe.nc b/tos/lib/net/zigbee/cc2420/Receiveframe.nc
new file mode 100644
index 00000000..74831804
--- /dev/null
+++ b/tos/lib/net/zigbee/cc2420/Receiveframe.nc
@@ -0,0 +1,16 @@
+/**
+ * Low-level abstraction for the receive path implementaiton of the
+ * ChipCon CC2420 radio.
+ *
+ * @author 
+ * @version 
+ */
+
+interface Receiveframe {
+
+  /**
+   * Signal that a message has been received
+   */
+  async event void receive(uint8_t* frame, uint8_t rssi);
+
+}
diff --git a/tos/lib/net/zigbee/cc2420/Sendframe.nc b/tos/lib/net/zigbee/cc2420/Sendframe.nc
new file mode 100644
index 00000000..365dcbed
--- /dev/null
+++ b/tos/lib/net/zigbee/cc2420/Sendframe.nc
@@ -0,0 +1,24 @@
+/**
+ * Low-level abstraction for the transmit path implementaiton of the
+ * ChipCon CC2420 radio.
+ *
+ * @author 
+ * @version 
+ */
+
+interface Sendframe {
+
+  /**
+   * Send a message
+
+   * @return SUCCESS if the request was accepted, FAIL otherwise.
+   */
+  async command error_t send(uint8_t* frame, uint8_t frame_length);
+  
+  /**
+   * Signal that a message has been sent
+   */
+  async event void sendDone(error_t error );
+
+}
+
diff --git a/tos/lib/net/zigbee/cc2420/readme.txt b/tos/lib/net/zigbee/cc2420/readme.txt
new file mode 100644
index 00000000..115427de
--- /dev/null
+++ b/tos/lib/net/zigbee/cc2420/readme.txt
@@ -0,0 +1,8 @@
+Title: ZigBee
+Author: André Cunha - IPP-HURRAY! http://www.open-zb.net
+----------------------------------------------
+
+
+Notes:
+------
+This folder contains the CC2420 modified files and other additional files.
\ No newline at end of file
diff --git a/tos/lib/net/zigbee/ieee802154/includes/frame_format.h b/tos/lib/net/zigbee/ieee802154/includes/frame_format.h
new file mode 100644
index 00000000..b8ddb79f
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/includes/frame_format.h
@@ -0,0 +1,220 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author open-zb http://www.open-zb.net
+ * @author Andre Cunha
+ */
+
+//MAC frame Superstructure
+
+#ifndef __FRAME_FORMAT__
+#define __FRAME_FORMAT__
+
+
+#define MPDU_HEADER_LEN 5
+
+typedef struct MPDU
+{
+	uint8_t length;
+	//info on frame type/ack/etc
+	uint8_t frame_control1;
+	//info on addressing fields
+	uint8_t frame_control2;
+	//uint16_t frame_control;
+	uint8_t seq_num;
+	uint8_t data[120];
+}MPDU;
+
+typedef struct MPDUBuffer
+{
+	uint8_t length;
+	//uint16_t frame_control;
+	uint8_t frame_control1;
+	uint8_t frame_control2;
+	uint8_t seq_num;
+	uint8_t data[120];
+	uint8_t retransmission;
+	uint8_t indirect;
+}MPDUBuffer;
+
+//PD_DATA validation structures
+
+
+
+/*****************************************************/
+/*				BEACON FRAME SCTRUCTURES			 */
+/*****************************************************/
+
+//#define beacon_addr_short_length 7
+//#define beacon_addr_long_length 12
+
+
+typedef struct beacon_addr_short
+{
+	uint16_t destination_PAN_identifier;
+	uint16_t destination_address;
+	uint16_t source_address;
+	uint16_t superframe_specification;
+}beacon_addr_short;
+/*
+typedef struct beacon_struct
+{
+	uint8_t length;
+	uint16_t frame_control;
+	uint8_t seq_num;
+	uint16_t source_PAN_identifier;
+	uint16_t destination_address;
+	uint16_t source_address;
+	uint16_t superframe_specification;
+}beacon_struct;
+*/
+/*
+typedef struct beacon_addr_long
+{
+	uint16_t source_PAN_identifier;
+	uint32_t source_address0;
+	uint32_t source_address1;
+	uint16_t superframe_specification;
+}beacon_addr_long;
+*/
+/*****************************************************/
+/*				ACK FRAME Structures 				 */
+/*****************************************************/
+
+typedef struct ACK
+{
+	uint8_t length;
+	uint8_t frame_control1;
+	uint8_t frame_control2;
+	//uint16_t frame_control;
+	uint8_t seq_num;
+}ACK;
+
+/*****************************************************/
+/*				COMMAND FRAME Structures 			 */
+/*****************************************************/
+
+typedef struct cmd_association_request
+{
+	uint8_t command_frame_identifier;
+	uint8_t capability_information;
+}cmd_association_request;
+
+typedef struct cmd_association_response
+{
+	uint8_t command_frame_identifier;
+	uint8_t short_address1;
+	uint8_t short_address2;
+	//uint16_t short_address;
+	uint8_t association_status;
+}cmd_association_response;
+
+//disassociacion notification command structure pag. 126
+typedef struct cmd_disassociation_notification
+{
+	uint16_t destination_PAN_identifier;
+	uint32_t destination_address0;
+	uint32_t destination_address1;
+	uint16_t source_PAN_identifier;
+	uint32_t source_address0;
+	uint32_t source_address1;
+	uint8_t command_frame_identifier;
+	uint8_t disassociation_reason;
+}cmd_disassociation_notification;
+
+//pag 130
+typedef struct cmd_beacon_request
+{
+	uint16_t destination_PAN_identifier;
+	uint16_t destination_address;
+	uint8_t command_frame_identifier;
+}cmd_beacon_request;
+
+
+//pag 132
+typedef struct cmd_gts_request
+{
+	uint16_t source_PAN_identifier;
+	uint16_t source_address;
+	uint8_t command_frame_identifier;
+	uint8_t gts_characteristics;
+}cmd_gts_request;
+
+typedef struct cmd_default
+{
+	uint8_t command_frame_identifier;
+}cmd_default;
+
+
+//131
+typedef struct cmd_coord_realignment
+{
+	uint8_t command_frame_identifier;
+	uint8_t PAN_identifier0;
+	uint8_t PAN_identifier1;
+	uint8_t coordinator_short_address0;
+	uint8_t coordinator_short_address1;
+	
+	/*
+	uint16_t PAN_identifier;
+	uint16_t coordinator_short_address;
+	*/
+	uint8_t logical_channel;
+	uint16_t short_address;
+}cmd_coord_realignment;
+
+
+
+/*******************************************************/
+/*     			ADDRESSING FIELDS ONLY				   */
+/*******************************************************/
+#define DEST_SHORT_LEN 4
+#define DEST_LONG_LEN 10
+#define INTRA_PAN_SOURCE_SHORT_LEN 2
+#define INTRA_PAN_SOURCE_LONG_LEN 8
+#define SOURCE_SHORT_LEN 4
+#define SOURCE_LONG_LEN 10
+
+
+//DESTINATION
+typedef struct dest_short
+{
+	uint16_t destination_PAN_identifier;
+	uint16_t destination_address;
+}dest_short;
+
+typedef struct dest_long
+{
+	uint16_t destination_PAN_identifier;
+	uint32_t destination_address0;
+	uint32_t destination_address1;
+}dest_long;
+
+//SOURCE
+typedef struct intra_pan_source_short
+{
+	uint16_t source_address;
+}intra_pan_source_short;
+
+typedef struct intra_pan_source_long
+{
+	uint32_t source_address0;
+	uint32_t source_address1;
+}intra_pan_source_long;
+
+
+typedef struct source_short
+{
+	uint16_t source_PAN_identifier;
+	uint16_t source_address;
+}source_short;
+
+
+typedef struct source_long
+{
+	uint16_t source_PAN_identifier;
+	uint32_t source_address0;
+	uint32_t source_address1;
+}source_long;
+
+#endif
+
diff --git a/tos/lib/net/zigbee/ieee802154/includes/mac_func.h b/tos/lib/net/zigbee/ieee802154/includes/mac_func.h
new file mode 100644
index 00000000..a4f14341
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/includes/mac_func.h
@@ -0,0 +1,384 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author open-zb http://www.open-zb.net
+ * @author Andre Cunha
+ */
+
+
+#ifndef __MAC_FUNC__
+#define __MAC_FUNC__
+
+/*******************************************************************************************************************/ 
+
+uint8_t set_capability_information(uint8_t alternate_PAN_coordinator, uint8_t device_type, uint8_t power_source, uint8_t receiver_on_when_idle, uint8_t security, uint8_t allocate_address)
+{
+	
+	return ((allocate_address << 7 ) | (security << 6 ) | (receiver_on_when_idle << 3 ) | (power_source << 2 ) | ( device_type << 1 ) | (alternate_PAN_coordinator << 0) );
+}
+
+uint8_t get_alternate_PAN_coordinator(uint8_t capability_information)
+{
+
+if ( (capability_information & 0x01) == 0x01)
+	return 1;
+else
+	return 0;
+
+}
+
+  
+/*******************************************************************************************************************/  
+/********************************FRAME CONTROL FUNCTIONS************************************************************/
+/*******************************************************************************************************************/
+  
+ //build MPDU frame control field
+uint16_t set_frame_control(uint8_t frame_type,uint8_t security,uint8_t frame_pending,uint8_t ack_request,uint8_t intra_pan,uint8_t dest_addr_mode,uint8_t source_addr_mode) 
+{
+	  uint8_t fc_b1=0;
+	  uint8_t fc_b2=0;
+  	  fc_b1 = ( (intra_pan << 6) | (ack_request << 5) | (frame_pending << 4) |
+ 	   		  (security << 3) | (frame_type << 0) );				  
+	  fc_b2 = ( (source_addr_mode << 6) | (dest_addr_mode << 2));
+	  return ( (fc_b2 << 8 ) | (fc_b1 << 0) );
+
+} 
+
+
+//return the type of destination address specified in the frame control 
+
+uint8_t get_fc2_dest_addr(uint8_t frame_control)
+{
+	switch( frame_control & 0xC )
+	{
+	case 0x4:	return RESERVED_ADDRESS; 
+							break;
+	case 0x8: return SHORT_ADDRESS;
+						 break;
+	case 0xC: return LONG_ADDRESS;
+						break;
+	default:
+			return 0; 
+			break;
+	}
+}
+
+
+//return the type of source address specified in the frame control 
+
+uint8_t get_fc2_source_addr(uint8_t frame_control)
+{
+	switch(frame_control & 0xC0 )
+	{
+	case 0x40:	return RESERVED_ADDRESS; 
+							break;
+	case 0x80: return SHORT_ADDRESS;
+						 break;
+	case 0xC0: return LONG_ADDRESS;
+						break;
+	default:
+			return 0; 
+			break;
+	}
+}
+
+
+
+bool get_fc1_security(uint8_t frame_control)
+{
+
+if ( (frame_control & 0x8) == 0x8)
+	return 1;
+else
+	return 0;
+
+}
+
+bool get_fc1_frame_pending(uint8_t frame_control)
+{
+
+if ( (frame_control & 0x10) == 0x10)
+	return 1;
+else
+	return 0;
+	
+}
+
+bool get_fc1_ack_request(uint8_t frame_control)
+{
+
+if ( (frame_control & 0x20) == 0x20)
+	return 1;
+else
+	return 0;
+	
+}
+
+bool get_fc1_intra_pan(uint8_t frame_control)
+{
+
+if ( (frame_control & 0x40) == 0x40)
+	return 1;
+else
+	return 0;
+	
+} 
+ 
+  
+/*******************************************************************************************************************/  
+/********************************SUPERFRAME SPECIFICATION FUNCTIONS*************************************************/
+/*******************************************************************************************************************/
+
+//build beacon superframe specification
+uint16_t set_superframe_specification(uint8_t beacon_order,uint8_t superframe_order,uint8_t final_cap_slot,uint8_t battery_life_extension,uint8_t pan_coordinator,uint8_t association_permit)
+{
+	  uint8_t sf_b1=0;
+	  uint8_t sf_b2=0;
+	  sf_b1 = ( (superframe_order << 4) | (beacon_order <<0));
+	  sf_b2 = ( (association_permit << 7) | (pan_coordinator << 6) |
+	  		    (battery_life_extension << 4) | (final_cap_slot << 0) );
+	   return  ( (sf_b2 <<8 ) | (sf_b1 << 0) );  
+   
+}
+
+uint8_t get_beacon_order(uint16_t superframe)
+{
+	return ((uint8_t)superframe &  0xF);
+}
+
+uint8_t get_superframe_order(uint16_t superframe)
+{
+	return (((uint8_t)superframe >> 4) &  0xF);
+}
+
+
+
+bool get_pan_coordinator(uint16_t superframe)
+{
+if ( ((uint8_t)superframe & 0x40) == 0x40)
+	return 1;
+else
+	return 0;
+	
+}
+
+bool get_association_permit(uint16_t superframe)
+{
+if ( ((uint8_t)superframe & 0x80) == 0x80)
+	return 1;
+else
+	return 0;	
+}
+
+bool get_battery_life_extention(uint16_t superframe)
+{
+if ( ((uint8_t)superframe & 0x10) == 0x10)
+	return 1;
+else
+	return 0;	
+}
+
+uint8_t get_final_cap_slot(uint16_t superframe)
+{
+return (((uint8_t)superframe >> 4) &  0xF);
+}
+
+
+/*******************************************************************************************************************/  
+/********************************      DATA TX OPTIONS   ************************************************************/
+/*******************************************************************************************************************/
+  
+  
+uint8_t set_txoptions(uint8_t ack, uint8_t gts, uint8_t indirect_transmission,uint8_t security)
+{
+return ( (ack << 0) | (gts << 1) | (indirect_transmission << 2) | (security << 3 ) );
+}  
+  
+bool get_txoptions_ack(uint8_t txoptions)
+{
+
+if ( (txoptions & 0x1) == 0x1)
+	return 1;
+else
+	return 0;
+
+}
+  
+bool get_txoptions_gts(uint8_t txoptions)
+{
+
+if ( (txoptions & 0x2) == 0x2)
+	return 1;
+else
+	return 0;
+
+}  
+
+bool get_txoptions_indirect_transmission(uint8_t txoptions)
+{
+
+if ( (txoptions & 0x4) == 0x4)
+	return 1;
+else
+	return 0;
+
+}  
+
+bool get_txoptions_security(uint8_t txoptions)
+{
+
+if ( (txoptions & 0x8) == 0x8)
+	return 1;
+else
+	return 0;
+}
+
+
+//BEACON SCHEDULING IMPLEMENTATION
+bool get_txoptions_upstream_buffer(uint8_t txoptions) 
+{
+
+if ( (txoptions & 0x10) == 0x10)
+	return 1;
+else
+	return 0;
+}
+
+uint8_t set_txoptions_upstream(uint8_t ack, uint8_t gts, uint8_t indirect_transmission,uint8_t security,uint8_t upstream)
+{
+return ( (ack << 0) | (gts << 1) | (indirect_transmission << 2) | (security << 3 ) | (upstream << 4) );
+} 
+
+
+/*******************************************************************************************************************/  
+/********************************PENDING ADDRESSES FUNCTIONS********************************************************/
+/*******************************************************************************************************************/
+uint8_t set_pending_address_specification(uint8_t number_short, uint8_t number_extended)
+{
+	return ( (number_extended << 4) | (number_short << 0) );
+}
+
+uint8_t get_number_short(uint8_t pending_specification)
+{
+	return (pending_specification & 0x07);
+}
+
+uint8_t get_number_extended(uint8_t pending_specification)
+{
+	return ( (pending_specification >> 4) & 0x07);
+}
+
+
+/*******************************************************************************************************************/  
+/********************************GTS FIELDS FUNCTIONS***************************************************************/
+/*******************************************************************************************************************/
+uint8_t set_gts_specification(uint8_t gts_descriptor_count, uint8_t gts_permit)
+{
+	return ( ( gts_descriptor_count << 0) | (gts_permit << 7) );  
+}
+
+uint8_t get_gts_permit(uint8_t gts_specification)
+{
+return ( (gts_specification >> 7) & 0x01);
+}
+
+
+///UNUSED
+uint8_t set_gts_directions(uint8_t gts1,uint8_t gts2,uint8_t gts3,uint8_t gts4,uint8_t gts5,uint8_t gts6,uint8_t gts7)
+{
+	return ((gts1 << 0) | (0 << 7));
+}
+
+
+uint8_t set_gts_descriptor(uint8_t GTS_starting_slot, uint8_t GTS_length)
+{
+//part of the descriptor list
+	return ( (GTS_starting_slot << 0) | (GTS_length << 4) );
+}
+
+uint8_t get_gts_descriptor_len(uint8_t gts_des_part)
+{
+	return ( (gts_des_part & 0xf0) >> 4);
+}
+
+uint8_t get_gts_descriptor_ss(uint8_t gts_des_part)
+{
+	return (gts_des_part & 0x0f);
+}
+
+
+
+/************************************************************************************************/  
+/********************************GTS CHARACTERISTICS*************************************************/
+/************************************************************************************************/
+uint8_t set_gts_characteristics(uint8_t gts_length, uint8_t gts_direction, uint8_t characteristic_type)
+{
+	return ( (gts_length << 0) | (gts_direction << 4) | (characteristic_type << 5));
+}  
+ 
+ 
+uint8_t get_gts_length(uint8_t gts_characteristics)
+{
+	return (gts_characteristics &  0xF);
+}
+
+bool get_gts_direction(uint8_t gts_characteristics)
+{
+	if ( (gts_characteristics & 0x10) == 0x10)
+		return 1;
+	else
+		return 0;
+}  
+
+uint8_t get_characteristic_type(uint8_t gts_characteristics)
+{
+	if ( (gts_characteristics & 0x20) == 0x20)
+		return 1;
+	else
+		return 0;
+} 
+
+
+/************************************************************************************************/  
+/********************************OTHER FUNCTIONS*************************************************/
+/************************************************************************************************/
+  /* A Task to calculate CRC for message transmission */
+  /*
+  task void CRCCalc() {
+    uint16_t length = txLength;
+    uint16_t crc = calcrc(sendPtr, length - 2);
+    
+    sendPtr[length - 2] = crc & 0xff;
+    sendPtr[length - 1] = (crc >> 8) & 0xff;
+    
+  }
+  */
+  
+uint16_t get_crcByte(uint16_t crc, uint8_t b)
+{
+  uint8_t i;
+  
+  crc = crc ^ b << 8;
+  i = 8;
+  do
+    if (crc & 0x8000)
+      crc = crc << 1 ^ 0x1021;
+    else
+      crc = crc << 1;
+  while (--i);
+
+  return crc;
+}
+  /* Internal function to calculate 16 bit CRC */
+  uint16_t calcrc(uint8_t *ptr, uint8_t count) {
+    uint16_t crc;
+    //uint8_t i;
+  
+    crc = 0;
+    while (count-- > 0)
+      crc = get_crcByte(crc, *ptr++);
+
+    return crc;
+  }
+
+#endif
+
diff --git a/tos/lib/net/zigbee/ieee802154/includes/nwk_func.h b/tos/lib/net/zigbee/ieee802154/includes/nwk_func.h
new file mode 100644
index 00000000..dbd3975f
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/includes/nwk_func.h
@@ -0,0 +1,141 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ */
+
+#ifndef __NWK_FUNC__
+#define __NWK_FUNC__
+
+//TEST
+typedef struct associated_device
+{
+
+uint32_t address0;
+uint32_t address1;
+
+uint16_t pan_address;
+
+}associated_device;
+//END TEST
+
+typedef struct routing_fields
+{
+
+//uint8_t frame_control1;
+//uint8_t frame_control2;
+uint16_t frame_control;
+uint16_t destination_address;
+uint16_t source_address;
+uint8_t radius;
+uint8_t sequence_number;
+
+}routing_fields;
+
+/*******************************************************************************************************************/  
+/********************************NETWORK LAYER FRAME CONTROL FUNCTIONS************************************************************/
+/*******************************************************************************************************************/
+  
+ //build NPDU frame control field
+uint16_t set_route_frame_control(uint8_t Frame_type,uint8_t Protocol_version,uint8_t Discover_route,uint8_t Security) 
+{
+	  uint8_t fc_byte1=0;
+	  uint8_t fc_byte2=0;
+  	  fc_byte1 = ( (Discover_route << 6) | (Protocol_version << 2) | (Frame_type << 0) );				  
+	  fc_byte2 = ((Security<< 2));
+	  return ( (fc_byte2 <<8 ) | (fc_byte1 << 0) );
+
+}
+
+
+uint8_t route_fc1(uint8_t Security) 
+{
+	uint8_t fc;
+	fc = ((Security << 2));
+	return fc;
+}
+
+uint8_t route_fc2(uint8_t Frame_type,uint8_t Protocol_version,uint8_t Discover_route) 
+{
+	uint8_t fc;
+	fc = ( (Discover_route << 6) | (Protocol_version << 2) | (Frame_type << 0) );	
+	return fc;
+}
+
+uint8_t get_route_frame_type(uint16_t frame_control)
+{
+	return (frame_control & 0x3);
+}
+
+uint8_t get_route_protocol_version(uint16_t frame_control)
+{
+	return ( (frame_control >> 2) & 0xf);
+}
+
+uint8_t get_route_discover_route(uint16_t frame_control)
+{
+	return ( (frame_control >> 6) & 0x3);
+}
+
+uint8_t get_route_security(uint16_t frame_control)
+{
+	if( ((frame_control >> 8) & 0x2) == 0x2)
+		return 1;
+	else
+		return 0;
+}
+
+/*******************************************************************************************************************/  
+/********************************NETWORK LAYER BEACON PAYLOAD INFORMATION FUNCTIONS*********************************/
+/*******************************************************************************************************************/
+
+uint8_t nwk_payload_profile_protocolversion(uint8_t stackprofile,uint8_t nwkcprotocolversion)
+{
+
+return ((stackprofile << 0) | ( nwkcprotocolversion << 4));
+}
+
+uint8_t nwk_payload_capacity(uint8_t routercapacity,uint8_t devicedepth,uint8_t enddevicecapacity)
+{
+
+return ((enddevicecapacity << 7) | ( devicedepth << 3 ) | (routercapacity << 2 ) );
+}
+
+
+uint8_t get_protocolid(uint32_t nwk_information)
+{
+	return (uint8_t)((nwk_information & 0xFF000000) >> 24);
+}
+
+uint8_t get_stackprofile(uint32_t nwk_information)
+{
+	return (uint8_t)((nwk_information & 0x00F00000)>>20);
+}
+
+uint8_t get_nwkcprotocolversion(uint32_t nwk_information)
+{
+	return (uint8_t)((nwk_information & 0x000F0000)>>16);
+}
+
+uint8_t get_routercapacity(uint32_t nwk_information)
+{
+	if ( ( nwk_information & 0x00002000) == 0x00002000)
+		return 1;
+	else
+		return 0;
+}
+
+uint8_t get_devicedepth(uint32_t nwk_information)
+{
+	return (uint8_t)((nwk_information & 0x00001F00) >> 8);
+}
+
+uint8_t get_enddevicecapacity(uint32_t nwk_information)
+{
+	if ( ( nwk_information & 0x00000001) == 0x00000001)
+		return 1;
+	else
+		return 0;
+}
+
+#endif
diff --git a/tos/lib/net/zigbee/ieee802154/includes/printfUART.h b/tos/lib/net/zigbee/ieee802154/includes/printfUART.h
new file mode 100644
index 00000000..35a736fd
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/includes/printfUART.h
@@ -0,0 +1,336 @@
+/*
+ * Copyright (c) 2005
+ *	The President and Fellows of Harvard College.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* 
+ * Writes printf like output to the UART.  
+ * This works only on the AVR and MSP430 Microcontrollers!
+ * <p>
+ * Note: For AVR we explicitly place the print statements in ROM; for
+ * MSP430 this is done by default!  For AVR, if we don't place it
+ * explicitely in ROM, the statements will go in RAM, which will
+ * quickly cause a descent size program to run out of RAM.  By default
+ * it doesn't disable the interupts; disabling the interupts when
+ * writing to the UART, slows down/makes the mote quite unresponsive,
+ * and can lead to problems!  If you wish to disable all printfs to
+ * the UART, then comment the flag: <code>PRINTFUART_ENABLED</code>.
+
+ * <p> <pre>
+ * How to use:
+ *   // (1) Call printfUART_init() from your initialization function 
+ *   //     to initialize the UART
+ *   printfUART_init();
+ *   // (2) Set your UART client to the correct baud rate.  Look at 
+ *   //     the comments in printfUART_init(), to figure out what 
+ *   //     baud to use for your particular mote
+ *
+ *   // (3) Send printf statements like this:
+ *   printfUART("Hello World, we are in year= %i\n", 2004);
+ *
+ * Examples and caveats:
+ *   // (1) - If no parameters are passed, then the second quotes 
+ *            are required because of how the macro is defined
+ *   printfUART("Timer fired\n", ""); 
+ *   // (2) - Must use curly braces in single section statements
+ *   if (x < 3)
+ *       {printfUART("The value of x is %i\n", x);}
+ *   // (3) - Otherwise it more or less works like regular printf
+ *   printfUART("\nThe value of x=%i, and y=%i\n", x, y); 
+ * </pre>
+ * <pre>URL: http://www.eecs.harvard.edu/~konrad/projects/motetrack</pre>
+ * @author Konrad Lorincz
+ * @version 2.0, January 5, 2005
+ */
+#ifndef PRINTFUART_H
+#define PRINTFUART_H
+#include <stdarg.h>
+//#include <stdio.h>
+
+// Comment out the line below to DISABLE printf statements.
+#define PRINTFUART_ENABLED
+
+
+// -------------------------------------------------------------------
+#ifdef PRINTFUART_ENABLED
+    #define DEBUGBUF_SIZE 256
+    char debugbuf[DEBUGBUF_SIZE];
+    char debugbufROMtoRAM[DEBUGBUF_SIZE];
+
+    #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+        #define printfUART(__format, __args...) {                  \
+            static const char strROM[] PROGMEM = __format;         \
+            strcpy_P((char*) &debugbufROMtoRAM, (PGM_P) &strROM);  \
+            sprintf(debugbuf, debugbufROMtoRAM, __args);           \
+            writedebug();                                          \
+        }   
+    #else  // assume MSP430 architecture (e.g. TelosA, TelosB, etc.)
+        #define printfUART(__format, __args...) {      \
+            sprintf(debugbuf, __format, __args);       \
+            writedebug();                              \
+        }   
+    #endif
+#else
+    #define printfUART(__format, __args...)
+    void printfUART_init() {}
+#endif
+
+#define NOprintfUART(__format, __args...)
+
+
+/** Used for terminating the program from a non-nesc file. Calling <code>exit(1)</code> 
+ *  from a non-nesc file doesn't terminate the program immeditely
+ */
+static int EXIT_PROGRAM = 0;  
+
+
+
+// -------------------------------------------------------------------
+#ifdef PRINTFUART_ENABLED
+
+/**
+ * Initialize the UART port.  Call this from your startup routine.
+ */
+#define printfUART_init() {atomic printfUART_init_private();}
+void printfUART_init_private()
+{
+    #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2)
+        // 56K baud
+        outp(0,UBRR0H);
+        outp(15, UBRR0L);                              //set baud rate
+        outp((1<<U2X),UCSR0A);                         // Set UART double speed
+        outp(((1 << UCSZ1) | (1 << UCSZ0)) , UCSR0C);  // Set frame format: 8 data-bits, 1 stop-bit
+        inp(UDR0);
+        outp((1 << TXEN) ,UCSR0B);   // Enable uart reciever and transmitter
+
+    #else
+      #if defined(PLATFORM_MICA2DOT)  
+        // 19.2K baud
+        outp(0,UBRR0H);            // Set baudrate to 19.2 KBps
+        outp(12, UBRR0L);
+        outp(0,UCSR0A);            // Disable U2X and MPCM
+        outp(((1 << UCSZ1) | (1 << UCSZ0)) , UCSR0C);
+        inp(UDR0);
+        outp((1 << TXEN) ,UCSR0B);
+  
+      #else  // assume TelosA, TelosB, etc.
+        //9.6K baud
+        uint16_t l_br = 0;
+        uint8_t l_mctl = 0;
+        uint8_t l_ssel = 0;
+
+
+        TOSH_SEL_UTXD1_MODFUNC();
+        TOSH_SEL_URXD1_MODFUNC();
+
+
+        UCTL1 = SWRST;  
+        UCTL1 |= CHAR;  // 8-bit char, UART-mode
+    
+        U1RCTL &= ~URXEIE;  // even erroneous characters trigger interrupts
+
+        UCTL1 = SWRST;
+        UCTL1 |= CHAR;  // 8-bit char, UART-mode
+
+        if (l_ssel & 0x80) {
+            U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+            U1TCTL |= (l_ssel & 0x7F); 
+        }
+        else {
+            U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+            U1TCTL |= SSEL_ACLK; // use ACLK, assuming 32khz
+        }
+
+        if ((l_mctl != 0) || (l_br != 0)) {
+            U1BR0 = l_br & 0x0FF;
+            U1BR1 = (l_br >> 8) & 0x0FF;
+            U1MCTL = l_mctl;
+        }
+        else {
+            U1BR0 = 0x03;   // 9600 baud
+            U1BR1 = 0x00;
+            U1MCTL = 0x4A;
+        }
+      
+        ME2 &= ~USPIE1;   // USART1 SPI module disable
+        ME2 |= (UTXE1 | URXE1);   // USART1 UART module enable
+      
+        U1CTL &= ~SWRST;
+    
+        IFG2 &= ~(UTXIFG1 | URXIFG1);
+        IE2 &= ~(UTXIE1 | URXIE1);  // interrupt disabled
+
+      #endif
+    #endif
+}
+
+#if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+#else // assume AVR architecture (e.g. TelosA, TelosB)
+    bool isTxIntrPending()
+    {
+        if (U1TCTL & TXEPT) {
+            return TRUE;
+        }
+        return FALSE;
+    }
+#endif
+
+/**
+ * Outputs a char to the UART.
+ */
+void UARTPutChar(char c)
+{
+    if (c == '\n')
+        UARTPutChar('\r');
+
+
+    #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+        loop_until_bit_is_set(UCSR0A, UDRE);
+        outb(UDR0,c);
+    #else // assume AVR architecture (e.g. TelosA, TelosB)
+        U1TXBUF = c;  
+        while( !isTxIntrPending() )  
+            continue;
+    #endif
+}
+
+/**
+ * Outputs the entire debugbuf to the UART, or until it encounters '\0'.
+ */
+void writedebug()
+{
+    uint16_t i = 0;
+    
+    while (debugbuf[i] != '\0' && i < DEBUGBUF_SIZE)
+        UARTPutChar(debugbuf[i++]);
+}
+
+
+
+/**
+ * Simplified sprintf
+ */
+#define SCRATCH 16
+int sprintf(uint8_t *buf, const uint8_t *format, ...)
+{
+    uint8_t scratch[SCRATCH];
+    uint8_t format_flag;
+    uint32_t u_val=0, base;//modified by Andre Cunha
+    uint8_t *ptr;
+    va_list ap;
+
+   //memset(scratch, 0, SCRATCH);
+	
+    buf[0] = '\0';  // KLDEBUG - fixes subtle bug ...
+    va_start (ap, format);
+    for (;;){
+        while ((format_flag = *format++) != '%'){      // Until '%' or '\0'
+            if (!format_flag) {va_end (ap); return (0);}
+            *buf = format_flag; buf++; *buf=0;
+        }
+
+        switch (format_flag = *format++){
+
+        case 'c':
+            format_flag = va_arg(ap,int);
+        default:
+            *buf = format_flag; buf++; *buf=0;
+            continue;
+        case 'S':
+        case 's':
+            ptr = va_arg(ap,char *);
+            strcat(buf, ptr);
+            continue;
+        case 'o':
+            base = 8;
+            *buf = '0'; buf++; *buf=0;
+            goto CONVERSION_LOOP;
+        case 'i':
+            if (((int)u_val) < 0){
+                u_val = - u_val;
+                *buf = '-'; buf++; *buf=0;
+            }
+			base = 10;
+            goto CONVERSION_LOOP;
+            // no break -> run into next case
+		 case 'd'://added by Andre Cunha
+            if (((int32_t)u_val) < 0){
+                u_val = - u_val;
+                *buf = '-'; buf++; *buf=0;
+            }
+            
+			base = 10;
+            goto CONVERSION_LOOP32;
+        case 'u':
+            base = 10;
+            goto CONVERSION_LOOP;
+        case 'x':
+            base = 16;
+			goto CONVERSION_LOOP;
+			
+		case 'y'://unsigned int 32 bits hexadecimal//added by Andre Cunha
+            base = 16;
+			goto CONVERSION_LOOP32;
+			
+        CONVERSION_LOOP:
+            u_val = va_arg(ap,int);
+            ptr = scratch + SCRATCH;
+            *--ptr = 0;
+            do {
+                char ch = u_val % base + '0';
+                if (ch > '9')
+                    ch += 'a' - '9' - 1;
+                *--ptr = ch;
+                u_val /= base;
+            } while (u_val);
+            strcat(buf, ptr);
+            buf += strlen(ptr);
+			break;
+			
+		CONVERSION_LOOP32:
+            u_val = va_arg(ap,int32_t);
+            ptr = scratch + SCRATCH;
+            *--ptr = 0;
+            do {
+                char ch = u_val % base + '0';
+                if (ch > '9')
+                    ch += 'a' - '9' - 1;
+                *--ptr = ch;
+                u_val /= base;
+            } while (u_val);
+            strcat(buf, ptr);
+            buf += strlen(ptr);
+        }
+    }
+}
+
+
+#endif  // PRINTFUART_ENABLED
+// -------------------------------------------------------------------
+
+#endif  // PRINTFUART_H
+
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MCPS_DATA.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MCPS_DATA.nc
new file mode 100644
index 00000000..d7757798
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MCPS_DATA.nc
@@ -0,0 +1,18 @@
+/**
+ * MCPS-DATA-Service Access Point
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *pag 56
+ */
+
+interface MCPS_DATA
+{ 
+  command error_t request(uint8_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[], uint8_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[], uint8_t msduLength, uint8_t msdu[],uint8_t msduHandle, uint8_t TxOptions);
+  
+  event error_t confirm(uint8_t msduHandle, uint8_t status);
+																																								
+  event error_t indication(uint16_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[2], uint16_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[2], uint16_t msduLength,uint8_t msdu[100],uint16_t mpduLinkQuality, uint16_t SecurityUse, uint16_t ACLEntry);  
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MCPS_PURGE.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MCPS_PURGE.nc
new file mode 100644
index 00000000..cad4cd2f
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MCPS_PURGE.nc
@@ -0,0 +1,16 @@
+/**
+ * MCPS-PURGE-Service Access Point
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+
+interface MCPS_PURGE
+{ 
+  command error_t request(uint8_t msduHandle);
+    
+  event error_t confirm(uint8_t msduHandle, uint8_t status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_ASSOCIATE.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_ASSOCIATE.nc
new file mode 100644
index 00000000..74e9027f
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_ASSOCIATE.nc
@@ -0,0 +1,19 @@
+/**
+ * MLME-ASSOCIATE-Service Access Point
+ *	std pag 65
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ */
+
+interface MLME_ASSOCIATE
+{ 
+  command error_t request(uint8_t LogicalChannel,uint8_t CoordAddrMode,uint16_t CoordPANId,uint32_t CoordAddress[],uint8_t CapabilityInformation,bool SecurityEnable);
+  
+  event error_t indication(uint32_t DeviceAddress[], uint8_t CapabilityInformation, bool SecurityUse, uint8_t ACLEntry);
+  
+  command error_t response(uint32_t DeviceAddress[], uint16_t AssocShortAddress, uint8_t status, bool SecurityEnable);
+  
+  event error_t confirm(uint16_t AssocShortAddress, uint8_t status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_BEACON_NOTIFY.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_BEACON_NOTIFY.nc
new file mode 100644
index 00000000..97ff2c03
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_BEACON_NOTIFY.nc
@@ -0,0 +1,14 @@
+/*
+ * MLME-BEACON-NOTIFY-Service Access Point
+ * std pag 75
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ */
+includes mac_const;
+
+interface MLME_BEACON_NOTIFY
+{ 
+	event error_t indication(uint8_t BSN,PANDescriptor pan_descriptor, uint8_t PenAddrSpec, uint8_t AddrList, uint8_t sduLength, uint8_t sdu[]);
+ 
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_COMM_STATUS.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_COMM_STATUS.nc
new file mode 100644
index 00000000..0c734f17
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_COMM_STATUS.nc
@@ -0,0 +1,16 @@
+/*
+ * MLME-COMM-STATUS-Service Access Point
+ * std pag 96
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+
+interface MLME_COMM_STATUS
+{ 
+
+  event result_t indication(uint16_t PANId,uint8_t SrcAddrMode, uint32_t SrcAddr[], uint8_t DstAddrMode, uint32_t DstAddr[], uint8_t status);
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_DISASSOCIATE.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_DISASSOCIATE.nc
new file mode 100644
index 00000000..224112ba
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_DISASSOCIATE.nc
@@ -0,0 +1,18 @@
+/**
+ * MLME-DISASSOCIATE-Service Access Point
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ * pag 73
+ *
+ */
+
+interface MLME_DISASSOCIATE
+{ 
+  command error_t request(uint32_t DeviceAddress[], uint8_t DisassociateReason, uint8_t SecurityEnable);
+  
+  event error_t indication(uint32_t DeviceAddress[], uint8_t DisassociateReason, uint8_t SecurityUse, uint8_t ACLEntry);
+  
+  event error_t confirm(uint8_t status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_GET.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_GET.nc
new file mode 100644
index 00000000..3f6b35fe
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_GET.nc
@@ -0,0 +1,14 @@
+/**
+ * MLME-GET-Service Access Point
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *pag 78
+ */
+
+interface MLME_GET
+{ 
+  command error_t request(uint8_t PIBAttribute);
+    
+  event error_t confirm(uint8_t status,uint8_t PIBAttribute, uint8_t PIBAttributeValue[]);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_GTS.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_GTS.nc
new file mode 100644
index 00000000..04e80d80
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_GTS.nc
@@ -0,0 +1,17 @@
+/**
+ * MLME-GTS-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ * pag 79
+ */
+
+interface MLME_GTS
+{ 
+  command error_t request(uint8_t GTSCharacteristics, uint8_t SecurityEnable);
+  
+  event error_t confirm(uint8_t GTSCharacteristics, uint8_t status);
+  
+  event error_t indication(uint16_t DevAddress, uint8_t GTSCharacteristics, uint8_t SecurityUse, uint8_t ACLEntry);
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_ORPHAN.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_ORPHAN.nc
new file mode 100644
index 00000000..358fdf90
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_ORPHAN.nc
@@ -0,0 +1,17 @@
+/**
+ * MLME-ORPHAN-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ */
+
+interface MLME_ORPHAN
+{ 
+
+  event error_t indication(uint32_t OrphanAddress[1], uint8_t SecurityUse, uint8_t ACLEntry);
+  
+  command error_t response(uint32_t OrphanAddress[1],uint16_t ShortAddress,uint8_t AssociatedMember, uint8_t security_enabled);
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_POLL.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_POLL.nc
new file mode 100644
index 00000000..b8684129
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_POLL.nc
@@ -0,0 +1,15 @@
+/**
+ * MLME-POOL-Service Access Point
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ * pag 107
+ */
+
+interface MLME_POLL
+{ 
+  command result_t request(uint8_t CoordAddrMode, uint16_t CoorPANId, uint32_t CoorAddress[], uint8_t Security);
+  
+  event result_t confirm(uint8_t status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_RESET.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_RESET.nc
new file mode 100644
index 00000000..ac1a36aa
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_RESET.nc
@@ -0,0 +1,19 @@
+/**
+ * MLME-RESET-Service Access Point
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+
+interface MLME_RESET
+{ 
+
+  command error_t request(uint8_t set_default_PIB);
+  
+  event error_t confirm(uint8_t status);
+  
+  
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_RX_ENABLE.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_RX_ENABLE.nc
new file mode 100644
index 00000000..833ff4e5
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_RX_ENABLE.nc
@@ -0,0 +1,19 @@
+/**
+ * MLME-RX-ENABLE-Service Access Point
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+
+interface MLME_RX_ENABLE
+{ 
+
+  command result_t request(uint8_tDeferPermit, uint32_t RxOnTime, uint32_t RxOnDuration);
+  
+  event result_t confirm(uint8_t status);
+  
+  
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_SCAN.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_SCAN.nc
new file mode 100644
index 00000000..ba4bd966
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_SCAN.nc
@@ -0,0 +1,18 @@
+/**
+ * MLME-SCAN-Service Access Point
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ * pag 93
+ *
+ */
+
+interface MLME_SCAN
+{ 
+
+  command error_t request(uint8_t ScanType, uint32_t ScanChannels, uint8_t ScanDuration);
+	
+  event error_t confirm(uint8_t status,uint8_t ScanType, uint32_t UnscannedChannels, uint8_t ResultListSize, uint8_t EnergyDetectList[], SCAN_PANDescriptor PANDescriptorList[]);
+																						//NEED to explain the implementation
+																						//Eache value in sequencial to the scanned channels
+	}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_SET.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_SET.nc
new file mode 100644
index 00000000..6c97e885
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_SET.nc
@@ -0,0 +1,15 @@
+/**
+ * MLME-SET-Service Access Point
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ * pag 98
+ */
+
+interface MLME_SET
+{ 
+  command error_t request(uint8_t PIBAttribute,uint8_t PIBAttributeValue[]);
+
+  event error_t confirm(uint8_t status,uint8_t PIBAttribute);
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_START.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_START.nc
new file mode 100644
index 00000000..b6630c99
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_START.nc
@@ -0,0 +1,17 @@
+/**
+ * MLME-START-Service Access Point
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *pag 100
+ *
+ */
+
+interface MLME_START
+{ 
+
+  //request for the device to start using new superframe configuration
+  command error_t request(uint32_t PANId, uint8_t LogicalChannel, uint8_t BeaconOrder, uint8_t SuperframeOrder,uint8_t PANCoordinator,uint8_t BatteryLifeExtension,uint8_t CoordRealignment,uint8_t SecurityEnable,uint32_t StartTime);
+  
+  event error_t confirm(uint8_t status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_SYNC.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_SYNC.nc
new file mode 100644
index 00000000..d4fd5f12
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_SYNC.nc
@@ -0,0 +1,16 @@
+/**
+ * MLME-SYNC-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+
+interface MLME_SYNC
+{ 
+//sd pag 105
+  command error_t request(uint8_t logical_channel,uint8_t track_beacon);
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_SYNC_LOSS.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_SYNC_LOSS.nc
new file mode 100644
index 00000000..66a56844
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_SYNC_LOSS.nc
@@ -0,0 +1,15 @@
+/**
+ * MLME-SYNC-LOSS-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+
+interface MLME_SYNC_LOSS
+{ 
+//pag 105
+   event error_t indication(uint8_t LossReason);
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_iGAME.nc b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_iGAME.nc
new file mode 100644
index 00000000..e36438c7
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/mac/MLME_iGAME.nc
@@ -0,0 +1,21 @@
+/**
+ * MLME-iGAME-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ * A. Koubâa, M. Alves, E. Tovar " i-GAME: An Implicit GTS Allocation Mechanism in IEEE 802.15.4" 
+ * Proceedings of the Euromicro Conference on Real-Time Systems (ECRTS 2006), July 2006.
+ */
+
+interface MLME_iGAME
+{ 
+  command result_t request(uint8_t GTSCharacteristics,uint16_t Flow_Specification, uint8_t SecurityEnable);
+  
+  command result_t response(Flow Flow_Description,uint8_t shared_time_slots, uint8_t status);
+  
+  event result_t confirm(uint8_t GTSCharacteristics,uint16_t Flow_Specification, uint8_t status);
+  
+  event result_t indication(uint16_t DevAddress, uint8_t GTSCharacteristics,uint16_t Flow_Specification, uint8_t SecurityUse, uint8_t ACLEntry);
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLDE_DATA.nc b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLDE_DATA.nc
new file mode 100644
index 00000000..85b2ee17
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLDE_DATA.nc
@@ -0,0 +1,19 @@
+/**
+ * NLDE-DATA
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author open-zb http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ */
+//page 159-163
+
+interface NLDE_DATA
+{ 
+
+  command error_t request(uint16_t DstAddr, uint16_t NsduLength, uint8_t Nsdu[100], uint8_t NsduHandle, uint8_t Radius, uint8_t DiscoverRoute, uint8_t SecurityEnable);
+  
+  event error_t indication(uint16_t SrcAddress, uint16_t NsduLength,uint8_t Nsdu[100], uint16_t LinkQuality);
+  
+  event error_t confirm(uint8_t NsduHandle, uint8_t Status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_DIRECT_JOIN.nc b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_DIRECT_JOIN.nc
new file mode 100644
index 00000000..06e4f418
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_DIRECT_JOIN.nc
@@ -0,0 +1,17 @@
+/**
+ * NLME-DIRECT-JOIN
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ */
+//page 179-181
+
+interface NLME_DIRECT_JOIN
+{ 
+
+  
+  command error_t request(uint32_t DeviceAddress0, uint32_t DeviceAddress1, CapabilityInformation);
+  
+  event error_t confirm(uint32_t DeviceAddress0,uint32_t DeviceAddress1, uint8_t Status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_GET.nc b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_GET.nc
new file mode 100644
index 00000000..0dca53e4
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_GET.nc
@@ -0,0 +1,18 @@
+/**
+ * NLME-GET
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+//page 190-191
+
+interface NLME_GET
+{ 
+
+  command error_t request(uint8_t NIBAttribute);
+  
+  event error_t confirm(uint8_t Status, uint8_t NIBAttribute, uint16_t NIBAttributeLength, uint16_t NIBAttributeValue);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_JOIN.nc b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_JOIN.nc
new file mode 100644
index 00000000..18b5a600
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_JOIN.nc
@@ -0,0 +1,21 @@
+/**
+ * NLME-JOIN
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+//page 173-179
+
+interface NLME_JOIN
+{ 
+
+  
+  command error_t request(uint16_t PANId, bool JoinAsRouter, bool RejoinNetwork, uint32_t ScanChannels, uint8_t ScanDuration, uint8_t PowerSource, uint8_t RxOnWhenIdle, uint8_t MACSecurity);
+  
+  event error_t indication(uint16_t ShortAddress, uint32_t ExtendedAddress[], uint8_t CapabilityInformation, bool SecureJoin);
+  
+  event error_t confirm(uint16_t PANId, uint8_t Status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_LEAVE.nc b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_LEAVE.nc
new file mode 100644
index 00000000..e160607b
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_LEAVE.nc
@@ -0,0 +1,21 @@
+/**
+ * NLME-LEAVE
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+//page 181-184
+
+interface NLME_LEAVE
+{
+
+  
+  command error_t request(uint32_t DeviceAddress[],uint8_t RemoveChildren, uint8_t MACSecurityEnable);
+  
+  event error_t indication(uint32_t DeviceAddress[]);
+  
+  event error_t confirm(uint32_t DeviceAddress[], uint8_t Status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_NETWORK_DISCOVERY.nc b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_NETWORK_DISCOVERY.nc
new file mode 100644
index 00000000..b66ea88f
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_NETWORK_DISCOVERY.nc
@@ -0,0 +1,18 @@
+/*
+ * NLME-Network-Discovery
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+//page 164-167
+
+interface NLME_NETWORK_DISCOVERY
+{ 
+
+  command error_t request(uint32_t ScanChannels, uint8_t ScanDuration);
+  
+  event error_t confirm(uint8_t NetworkCount,networkdescriptor networkdescriptorlist[], uint8_t Status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_NETWORK_FORMATION.nc b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_NETWORK_FORMATION.nc
new file mode 100644
index 00000000..161e5099
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_NETWORK_FORMATION.nc
@@ -0,0 +1,19 @@
+/*
+ * NLME-NETWORK-FORMATION
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+//page 167-169
+
+interface NLME_NETWORK_FORMATION
+{ 
+
+  
+  command error_t request(uint32_t ScanChannels, uint8_t ScanDuration, uint8_t BeaconOrder, uint8_t SuperframeOrder, uint16_t PANId, uint8_t BatteryLifeExtension);
+  
+  event error_t confirm(uint8_t Status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_PERMIT_JOINING.nc b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_PERMIT_JOINING.nc
new file mode 100644
index 00000000..6f811e2d
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_PERMIT_JOINING.nc
@@ -0,0 +1,18 @@
+/**
+ * NLME-PERMIT_JOINING
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+//page 170-171
+
+interface NLME_PERMIT_JOINING
+{
+
+  command error_t request(uint8_t PermitDuration);
+    
+  event error_t confirm(uint8_t Status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_RESET.nc b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_RESET.nc
new file mode 100644
index 00000000..f3b9c051
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_RESET.nc
@@ -0,0 +1,19 @@
+/**
+ * NLME-RESET
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+//page 185-186
+
+interface NLME_RESET
+{ 
+
+  
+  command error_t request();
+  
+  event error_t confirm(uint8_t Status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_SET.nc b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_SET.nc
new file mode 100644
index 00000000..6d9d831b
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_SET.nc
@@ -0,0 +1,18 @@
+/**
+ * NLME-SET
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+//page 191-192
+
+interface NLME_SET
+{ 
+
+  command error_t request(uint8_t NIBAttribute, uint16_t NIBAttributeLength, uint16_t NIBAttributeValue);
+  
+  event error_t confirm(uint8_t Status, uint8_t NIBAttribute);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_START_ROUTER.nc b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_START_ROUTER.nc
new file mode 100644
index 00000000..68b5d253
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_START_ROUTER.nc
@@ -0,0 +1,17 @@
+/**
+ * NLME-Start-Router
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ */
+//page 171-173
+
+interface NLME_START_ROUTER
+{ 
+
+  command error_t request(uint8_t BeaconOrder, uint8_t SuperframeOrder, uint8_t BatteryLifeExtension,uint32_t StartTime);
+  
+  event error_t confirm(uint8_t Status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_SYNC.nc b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_SYNC.nc
new file mode 100644
index 00000000..22a84195
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/nwk/NLME_SYNC.nc
@@ -0,0 +1,21 @@
+/**
+ * NLME-SYNC
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+//page 186-189
+
+interface NLME_SYNC
+{ 
+
+  
+  command error_t request(uint8_t Track);
+  
+  event error_t indication();
+  
+  event error_t confirm(uint8_t Status);
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/phy/PD_DATA.nc b/tos/lib/net/zigbee/ieee802154/interfaces/phy/PD_DATA.nc
new file mode 100644
index 00000000..6df0efe5
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/phy/PD_DATA.nc
@@ -0,0 +1,19 @@
+/**
+ * PD-Service Access Point
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ *
+ *
+ */
+//#include <phy_enumerations.h>
+
+interface PD_DATA
+{ 
+  async command error_t request(uint8_t psduLenght, uint8_t* psdu);
+  
+  async event error_t confirm(uint8_t status);
+  
+  async event error_t indication(uint8_t psduLenght,uint8_t* psdu, int8_t ppduLinkQuality);
+ 
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_CCA.nc b/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_CCA.nc
new file mode 100644
index 00000000..6878241b
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_CCA.nc
@@ -0,0 +1,17 @@
+/**
+ * Physical Layer Management Entity-Service Access Point
+ * PLME-SAP - PLME-CCA
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+
+interface PLME_CCA
+{ 
+/*PLME_CCA*/
+
+  command error_t request();
+
+  event error_t confirm(uint8_t status);
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_ED.nc b/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_ED.nc
new file mode 100644
index 00000000..fe237cb4
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_ED.nc
@@ -0,0 +1,16 @@
+/**
+ * Physical Layer Management Entity-Service Access Point
+ * PLME-SAP - PLME-ED
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ */
+
+interface PLME_ED
+{ 
+/*PLME_ED*/
+
+  command error_t request();
+
+  event error_t confirm(uint8_t status,int8_t EnergyLevel);
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_GET.nc b/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_GET.nc
new file mode 100644
index 00000000..d352eb31
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_GET.nc
@@ -0,0 +1,18 @@
+/**
+ * Physical Layer Management Entity-Service Access Point
+ * PLME-SAP - PLME-GET
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ *
+ */
+
+interface PLME_GET
+{ 
+/*PLME_GET*/
+
+  command error_t request(uint8_t PIBAttribute);
+
+  event error_t confirm(uint8_t status, uint8_t PIBAttribute, uint8_t PIBAttributeValue);
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_SET.nc b/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_SET.nc
new file mode 100644
index 00000000..2393a53d
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_SET.nc
@@ -0,0 +1,18 @@
+/**
+ * Physical Layer Management Entity-Service Access Point
+ * PLME-SAP - PLME-SET
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ *
+ */
+
+interface PLME_SET
+{ 
+/*PLME_SET*/
+
+  command error_t request(uint8_t PIBAttribute, uint8_t PIBAttributeValue);
+
+  event error_t confirm(uint8_t status, uint8_t PIBAttribute);
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_SET_TRX_STATE.nc b/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_SET_TRX_STATE.nc
new file mode 100644
index 00000000..03dd8bbf
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/phy/PLME_SET_TRX_STATE.nc
@@ -0,0 +1,18 @@
+/**
+ * Physical Layer Management Entity-Service Access Point
+ * PLME-SAP - PLME-SET_TRX_STATE
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+
+interface PLME_SET_TRX_STATE
+{ 
+/*PLME_SET_TRX_STATE*/
+
+  async command error_t request(uint8_t state);
+
+  async event error_t confirm(uint8_t status);
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/interfaces/readme.txt b/tos/lib/net/zigbee/ieee802154/interfaces/readme.txt
new file mode 100644
index 00000000..8e6858c3
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/interfaces/readme.txt
@@ -0,0 +1,16 @@
+Title: ZigBee
+Author: André Cunha - IPP-HURRAY! http://www.open-zb.net
+----------------------------------------------
+
+
+Notes:
+------
+This folder contains the IEEE 802.15.4 and ZigBee network layer interfaces.
+
+Each interface represents a Service access point as specified in the standards.
+
+The interface files are organized as follows:
+
+nwk - includes the interfaces NLDE and NLME used to wire the NWL and the Upper application Layer
+mac - includes the interfaces MCPS and MLME used to wire the Mac and the NWL
+phy - includes the interfaces PD_DATA and PLME used to wire the Phy and the Mac
\ No newline at end of file
diff --git a/tos/lib/net/zigbee/ieee802154/mac/MacC.nc b/tos/lib/net/zigbee/ieee802154/mac/MacC.nc
new file mode 100644
index 00000000..f8262d2f
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/mac/MacC.nc
@@ -0,0 +1,114 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+
+#include <Timer.h>
+
+configuration MacC {
+
+
+		//MLME  
+		provides interface MLME_START;
+		provides interface MLME_SET;
+		provides interface MLME_GET;
+		
+		provides interface MLME_ASSOCIATE;
+		provides interface MLME_DISASSOCIATE;
+		
+		provides interface MLME_BEACON_NOTIFY;
+		provides interface MLME_GTS;
+		
+		provides interface MLME_ORPHAN;
+
+		provides interface MLME_SYNC;
+		provides interface MLME_SYNC_LOSS;
+		
+		provides interface MLME_RESET;
+		
+		provides interface MLME_SCAN;
+		
+		//MCPS
+		provides interface MCPS_DATA;
+		provides interface MCPS_PURGE;
+
+}
+implementation {
+
+	components MainC;
+	MainC.SoftwareInit -> MacP;
+
+	components LedsC;
+	components MacP;
+
+	components PhyC;
+
+	components TimerAsyncC;
+	
+	MacP.TimerAsync ->TimerAsyncC;
+
+	MacP.Leds -> LedsC;
+	
+	
+	MacP.AMControl ->PhyC.SplitControl;
+	
+	components HplCC2420PinsC as Pins;
+	MacP.CCA -> Pins.CCA;
+	
+	components RandomC;
+	MacP.Random -> RandomC;
+
+	components new TimerMilliC() as T_ackwait;
+	MacP.T_ackwait -> T_ackwait;
+	
+	components new TimerMilliC() as T_ResponseWaitTime;
+	MacP.T_ResponseWaitTime -> T_ResponseWaitTime;
+	
+	components new TimerMilliC() as T_ScanDuration;
+	MacP.T_ScanDuration -> T_ScanDuration;
+
+	components CC2420ReceiveC;
+	MacP.AddressFilter -> CC2420ReceiveC;
+
+	/*****************************************************/
+	/*				INTERFACES         					 */
+	/*****************************************************/  
+	MacP.PD_DATA -> PhyC.PD_DATA;
+	MacP.PLME_ED ->PhyC.PLME_ED;
+	MacP.PLME_CCA -> PhyC.PLME_CCA;
+	MacP.PLME_SET -> PhyC.PLME_SET;
+	MacP.PLME_GET -> PhyC.PLME_GET;
+	MacP.PLME_SET_TRX_STATE -> PhyC.PLME_SET_TRX_STATE;
+
+
+	//MLME interfaces
+	MLME_START=MacP;
+
+	MLME_SET=MacP;
+	MLME_GET=MacP;
+	
+	MLME_ASSOCIATE=MacP;
+	MLME_DISASSOCIATE=MacP;
+	
+	MLME_BEACON_NOTIFY = MacP;
+	MLME_GTS=MacP;
+	
+	MLME_ORPHAN=MacP;
+	
+	MLME_SYNC=MacP;
+	MLME_SYNC_LOSS=MacP;
+	
+	MLME_RESET=MacP;
+	
+	MLME_SCAN=MacP;
+	
+	MCPS_DATA=MacP;
+	MCPS_PURGE=MacP;
+	
+	
+	
+	
+
+}
+
diff --git a/tos/lib/net/zigbee/ieee802154/mac/MacP.nc b/tos/lib/net/zigbee/ieee802154/mac/MacP.nc
new file mode 100644
index 00000000..ab2ca9bb
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/mac/MacP.nc
@@ -0,0 +1,5379 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+
+#include <Timer.h>
+
+#include "printfUART.h"
+
+#include "frame_format.h"
+#include "phy_const.h"
+
+#include "mac_const.h"
+#include "mac_enumerations.h"
+
+#include "mac_func.h"
+
+module MacP {
+ 
+	provides interface Init;
+	
+	provides interface MLME_START;
+	provides interface MLME_SET;
+    provides interface MLME_GET;
+	
+	provides interface MLME_ASSOCIATE;
+	provides interface MLME_DISASSOCIATE;
+	
+	provides interface MLME_BEACON_NOTIFY;
+	provides interface MLME_GTS;
+	
+	provides interface MLME_ORPHAN;
+	
+	provides interface MLME_SYNC;
+	provides interface MLME_SYNC_LOSS;
+		
+	provides interface MLME_RESET;
+	
+	provides interface MLME_SCAN;
+	
+	//MCPS
+	provides interface MCPS_DATA;
+	provides interface MCPS_PURGE;
+		
+	
+	uses interface Timer<TMilli> as T_ackwait;	
+		
+	uses interface Timer<TMilli> as	T_ResponseWaitTime;
+	
+	uses interface Timer<TMilli> as	T_ScanDuration;
+	
+	uses interface Leds;
+	
+	uses interface SplitControl as AMControl;
+	
+	uses interface Random;
+	
+	uses interface GeneralIO as CCA;
+	
+	//uses interface Test_send;
+	
+	uses interface TimerAsync;
+	
+	uses interface PD_DATA;
+	
+	uses interface PLME_ED;
+	uses interface PLME_CCA;
+	uses interface PLME_SET;
+	uses interface PLME_GET;
+	uses interface PLME_SET_TRX_STATE;
+
+
+	uses interface AddressFilter;
+
+  
+}
+implementation {
+ 
+/*****************************************************/
+/*				GENERAL 				 */
+/*****************************************************/  
+	/***************Variables*************************/
+	//local extended address
+	uint32_t aExtendedAddress0;
+	uint32_t aExtendedAddress1;
+
+	macPIB mac_PIB;
+
+//If the the MLME receives a start request the node becomes a pan coordinator
+	//and start transmiting beacons 
+	bool PANCoordinator = 0;
+	//(0 NO beacon transmission; 1 beacon transmission);
+	bool Beacon_enabled_PAN = 0;
+	
+	//(RESET) when the reset command arrives it checks whether or not to reset the PIB
+	bool SetDefaultPIB=0;
+	
+	//use security
+	bool SecurityEnable=0;
+	
+	//others
+	bool pending_reset=0;
+	
+	//transceiver status -every time the transceiver changes state this variable is updated
+	uint8_t trx_status;
+	
+	//defines the transmission
+	bool beacon_enabled=0;
+	
+	/***************Functions Definition***************/
+	
+	void init_MacPIB(); 
+	
+	uint8_t min(uint8_t val1, uint8_t val2);
+	
+	void init_MacCon();
+	
+	
+	task void signal_loss();
+	
+
+	void create_data_request_cmd();
+	void create_beacon_request_cmd();
+	void create_gts_request_cmd(uint8_t gts_characteristics);
+	
+	void build_ack(uint8_t sequence,uint8_t frame_pending);
+	
+	void create_data_frame(uint8_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[], uint8_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[], uint8_t msduLength, uint8_t msdu[],uint8_t msduHandle, uint8_t TxOptions,uint8_t on_gts_slot,uint8_t pan);
+
+
+
+
+/*****************************************************/	
+/*				Association 				         */
+/*****************************************************/ 
+	/***************Variables*************************/
+	uint8_t associating = 0;
+	uint8_t association_cmd_seq_num =0;
+	
+	/*association parameters*/
+	
+	uint8_t a_LogicalChannel;
+	uint8_t a_CoordAddrMode;
+	uint16_t a_CoordPANId;
+	uint32_t a_CoordAddress[2];
+	uint8_t a_CapabilityInformation;
+	bool a_securityenable;
+	
+	/***************Functions Definition***************/		
+	
+	void create_association_request_cmd(uint8_t CoordAddrMode,uint16_t CoordPANId,uint32_t CoordAddress[],uint8_t CapabilityInformation);
+
+	error_t create_association_response_cmd(uint32_t DeviceAddress[],uint16_t shortaddress, uint8_t status);
+	
+	void create_disassociation_notification_cmd(uint32_t DeviceAddress[],uint8_t disassociation_reason);
+	
+	void process_dissassociation_notification(MPDU *pdu);
+
+/*****************************************************/
+/*				Synchronization					 */
+/*****************************************************/ 
+	/***************Variables*************************/
+	//(SYNC)the device will try to track the beacon ie enable its receiver just before the espected time of each beacon
+	bool TrackBeacon=0;
+	bool beacon_processed=0;
+	//beacon loss indication
+	uint8_t beacon_loss_reason;
+	
+	//(SYNC)the device will try to locate one beacon
+	bool findabeacon=0;
+	//(SYNC)number of beacons lost before sending a Beacon-Lost indication comparing to aMaxLostBeacons
+	uint8_t missed_beacons=0;
+	//boolean variable stating if the device is synchonized with the beacon or not
+	uint8_t on_sync=0;
+	
+	uint32_t parent_offset=0x00000000;
+
+
+/*****************************************************/
+/*				GTS Variables					 */
+/*****************************************************/  
+	/***************Variables*************************/
+	
+	uint8_t gts_request=0;
+	uint8_t gts_request_seq_num=0;
+	
+	bool gts_confirm;
+	
+	uint8_t GTS_specification;
+	bool GTSCapability=1;
+	
+	uint8_t final_CAP_slot=15;
+	
+	//GTS descriptor variables, coordinator usage only
+	GTSinfoEntryType GTS_db[7];
+	uint8_t GTS_descriptor_count=0;
+	uint8_t GTS_startslot=16;
+	uint8_t GTS_id=0x01;
+
+
+	//null gts descriptors
+	GTSinfoEntryType_null GTS_null_db[7];
+	
+	uint8_t GTS_null_descriptor_count=0;
+	//uint8_t GTS_null_id=0x01;
+	
+	//node GTS variables
+	// 1 GTS for transmit
+	uint8_t s_GTSss=0;           //send gts start slot
+	uint8_t s_GTS_length=0;		 //send gts length
+	//1 GTS for receive
+	uint8_t r_GTSss=0;			 //receive gts start slot
+	uint8_t r_GTS_length=0;		 //receive gts lenght
+	
+	//used to state that the device is on its transmit slot
+	uint8_t on_s_GTS=0;
+	//used to state that the device is on its receive slot
+	uint8_t on_r_GTS=0;
+	
+	//used to determine if the next time slot is used for transmission
+	uint8_t next_on_s_GTS=0;
+	//used to determine if the next time slot is used for reception
+	uint8_t next_on_r_GTS=0;
+	
+	//variable stating if the coordinator allow GTS allocations
+	uint8_t allow_gts=1;
+	
+	//COORDINATOR GTS BUFFER 	
+	gts_slot_element gts_slot_list[7];
+	uint8_t available_gts_index[GTS_SEND_BUFFER_SIZE];
+	uint8_t available_gts_index_count;
+	
+	uint8_t coordinator_gts_send_pending_data=0;
+	uint8_t coordinator_gts_send_time_slot=0;
+	
+	//gts buffer used to store the gts messages both in COORDINATOR and NON COORDINATOR
+	norace MPDU gts_send_buffer[GTS_SEND_BUFFER_SIZE];
+	
+	//NON PAN COORDINATOR BUFFER
+	//buffering for sending
+	uint8_t gts_send_buffer_count=0;
+	uint8_t gts_send_buffer_msg_in=0;
+	uint8_t gts_send_buffer_msg_out=0;
+	uint8_t gts_send_pending_data=0;
+	
+
+	/***************Functions Definition***************/
+	
+	void process_gts_request(MPDU *pdu);	
+	void init_available_gts_index();
+	task void start_coordinator_gts_send();
+	
+	
+	//GTS FUNCTIONS
+	error_t remove_gts_entry(uint16_t DevAddressType);
+	error_t add_gts_entry(uint8_t gts_length,bool direction,uint16_t DevAddressType);
+	error_t add_gts_null_entry(uint8_t gts_length,bool direction,uint16_t DevAddressType);
+	
+	//increment the idle GTS for GTS deallocation purposes, not fully implemented yet
+	task void increment_gts_null();
+	
+	task void start_gts_send();
+	
+	
+	
+	//initialization functions
+	void init_gts_slot_list();
+	void init_GTS_null_db();
+	
+	void init_GTS_db();
+
+
+	uint32_t calculate_gts_expiration();
+	task void check_gts_expiration();
+
+
+/*****************************************************/
+/*				CHANNEL SCAN Variables				 */
+/*****************************************************/ 
+	//current_channel
+	uint8_t current_channel=0;
+
+	/***************Variables*************************/
+	//ED-SCAN variables
+	
+	bool scanning_channels;
+	
+	uint32_t channels_to_scan;
+	uint8_t current_scanning=0;
+	//uint8_t scan_count=0;
+	uint8_t scanned_values[16];
+	uint8_t scan_type;
+	
+	SCAN_PANDescriptor scan_pans[16];
+	
+	uint16_t scan_duration;
+	
+	task void data_channel_scan_indication();
+	
+/*****************************************************/
+/*				TIMER VARIABLES					 */
+/*****************************************************/  
+	/***************Variables*************************/
+	uint32_t response_wait_time;
+	
+	//Beacon Interval
+	uint32_t BI;
+	//Superframe duration
+	uint32_t SD;
+	
+	//timer variables
+	uint32_t time_slot; //backoff boundary timer
+	uint32_t backoff;  //backoff timer
+	
+	//current number of backoffs in the active period
+	uint8_t number_backoff=1;
+	uint8_t number_time_slot=0;
+	
+	bool csma_slotted=0;
+/*****************************************************/
+/*				CSMA VARIABLES					 */
+/*****************************************************/  	
+	/***************Variables*************************/	
+
+	//DEFERENCE CHANGE
+	uint8_t cca_deference = 0;
+	uint8_t backoff_deference = 0;
+	uint8_t check_csma_ca_backoff_send_conditions(uint32_t delay_backoffs);
+
+	//STEP 2
+	uint8_t delay_backoff_period;
+	bool csma_delay=0;
+	
+	bool csma_locate_backoff_boundary=0;
+	
+	bool csma_cca_backoff_boundary=0;
+	
+	//Although the receiver of the device is enabled during the channel assessment portion of this algorithm, the
+	//device shall discard any frames received during this time.
+	bool performing_csma_ca=0;
+	
+	//CSMA-CA variables
+	uint8_t BE; //backoff exponent
+	uint8_t CW; //contention window (number of backoffs to clear the channel)
+	uint8_t NB; //number of backoffs
+
+	/***************Functions Definition***************/	
+	
+	void init_csma_ca(bool slotted);
+	void perform_csma_ca();
+	task void perform_csma_ca_unslotted();
+	task void perform_csma_ca_slotted();
+	//task void start_csma_ca_slotted();
+	
+/*****************************************************/
+/*				Indirect Transmission buffers		 */
+/*****************************************************/
+	/***************Variables*************************/	
+	//indirect transmission buffer
+	norace indirect_transmission_element indirect_trans_queue[INDIRECT_BUFFER_SIZE];
+	//indirect transmission message counter
+	uint8_t indirect_trans_count=0;
+
+	/***************Functions Definition***************/	
+	
+	//function used to initialize the indirect transmission buffer
+	void init_indirect_trans_buffer();
+	//function used to search and send an existing indirect transmission message
+	void send_ind_trans_addr(uint32_t DeviceAddress[]);
+	//function used to remove an existing indirect transmission message
+	error_t remove_indirect_trans(uint8_t handler);
+	//function used to increment the transaction persistent time on each message
+	//if the transaction time expires the messages are discarded
+	void increment_indirect_trans();
+	
+/*****************************************************/
+/*				RECEIVE buffers		                  */
+/*****************************************************/  
+	/***************Variables*************************/
+	
+	//buffering variables
+	norace MPDU buffer_msg[RECEIVE_BUFFER_SIZE];
+	int current_msg_in=0;
+	int current_msg_out=0;
+	int buffer_count=0;
+
+	/***************Functions Definition***************/	
+	
+	task void data_indication();
+	
+	void indication_cmd(MPDU *pdu, int8_t ppduLinkQuality);
+	void indication_ack(MPDU *pdu, int8_t ppduLinkQuality);
+	void indication_data(MPDU *pdu, int8_t ppduLinkQuality);
+/*****************************************************/
+/*				RECEPTION AND TRANSMISSION		                  */
+/*****************************************************/  
+	
+	/***************Variables*************************/
+	
+	//buffering for sending
+	norace MPDUBuffer send_buffer[SEND_BUFFER_SIZE];
+	uint8_t send_buffer_count=0;
+	uint8_t send_buffer_msg_in=0;
+	uint8_t send_buffer_msg_out=0;
+	
+	//retransmission information
+	uint8_t send_ack_check;//ack requested in the transmitted frame
+	uint8_t retransmit_count;//retransmission count
+	uint8_t ack_sequence_number_check;//transmission sequence number
+	uint8_t send_retransmission;
+	uint8_t send_indirect_transmission;
+
+	uint8_t pending_request_data=0;
+	
+	uint8_t ackwait_period;
+	
+	uint8_t link_quality;
+	
+	norace ACK mac_ack;
+	ACK *mac_ack_ptr;
+	
+	uint32_t gts_expiration;
+
+	uint8_t I_AM_IN_CAP=0;
+	uint8_t I_AM_IN_CFP=0;
+	uint8_t I_AM_IN_IP=0;
+	
+	/***************Functions Definition***************/	
+	
+	task void send_frame_csma();
+	
+	uint8_t check_csma_ca_send_conditions(uint8_t frame_length,uint8_t frame_control1);
+
+	uint8_t check_gts_send_conditions(uint8_t frame_length);
+	
+	uint8_t calculate_ifs(uint8_t pk_length);
+
+
+
+/*****************************************************/
+/*				BEACON MANAGEMENT  		              */
+/*****************************************************/ 
+	/***************Variables*************************/
+	norace MPDU mac_beacon_txmpdu;
+	MPDU *mac_beacon_txmpdu_ptr;
+	
+	uint8_t *send_beacon_frame_ptr;
+	uint8_t send_beacon_length;
+
+	/***************Functions Definition***************/	
+	/*function to create the beacon*/
+	task void create_beacon();
+	/*function to process the beacon information*/
+	void process_beacon(MPDU *packet,uint8_t ppduLinkQuality);
+	
+
+/*****************************************************/
+/*				Fault tolerance functions            */
+/*****************************************************/ 
+	
+	void create_coordinator_realignment_cmd(uint32_t device_extended0, uint32_t device_extended1, uint16_t device_short_address);
+
+	void create_orphan_notification();
+	
+	
+
+	void process_coordinator_realignment(MPDU *pdu);
+
+/***************************DEBUG FUNCTIONS******************************/
+/* This function are list functions with the purpose of debug, to use then uncomment the declatarion
+on top of this file*/
+/*
+	void list_mac_pib();
+	
+	void list_gts();
+	
+	void list_my_gts();
+	void list_gts_null();
+	*/
+	//list all the handles in the indirect transmission buffer, debug purposes
+	void list_indirect_trans_buffer();	
+			
+/***************************END DEBUG FUNCTIONS******************************/
+
+
+/***************** Init Commands ****************/
+  command error_t Init.init() {
+  
+  call AMControl.start();
+
+
+	//initialization of the beacon structure
+	mac_beacon_txmpdu_ptr = &mac_beacon_txmpdu;
+
+
+
+   atomic{
+	//inicialize the mac PIB
+	init_MacPIB();
+	
+	init_GTS_db();
+	
+	init_GTS_null_db();
+	
+	init_gts_slot_list();
+	
+	init_available_gts_index();
+	
+	aExtendedAddress0=TOS_NODE_ID;
+	aExtendedAddress1=TOS_NODE_ID;
+	
+	
+	call AddressFilter.set_address(mac_PIB.macShortAddress, aExtendedAddress0, aExtendedAddress1);
+
+	call AddressFilter.set_coord_address(mac_PIB.macCoordShortAddress, mac_PIB.macPANId);
+	
+	
+	
+	
+	init_indirect_trans_buffer();
+
+
+	}
+	
+	//beacon
+	mac_beacon_txmpdu_ptr = &mac_beacon_txmpdu;
+		
+	//ack
+	mac_ack_ptr = &mac_ack;
+	
+	//Other timers, sync timers units expressed in miliseconds
+	ackwait_period = ((mac_PIB.macAckWaitDuration * 4.0 ) / 250.0) * 3;
+
+	response_wait_time = ((aResponseWaitTime * 4.0) / 250.0) * 2;
+
+	atomic{
+	
+		
+		BI = aBaseSuperframeDuration * powf(2,mac_PIB.macBeaconOrder);
+		SD = aBaseSuperframeDuration * powf(2,mac_PIB.macSuperframeOrder);
+		
+		
+		//backoff_period
+		backoff = aUnitBackoffPeriod;
+		//backoff_period_boundary
+		
+		time_slot = SD / NUMBER_TIME_SLOTS;
+			
+		call TimerAsync.set_enable_backoffs(1);	
+		call TimerAsync.set_backoff_symbols(backoff);
+		
+		call TimerAsync.set_bi_sd(BI,SD);
+		
+		call TimerAsync.start();
+	}
+
+
+printfUART_init();
+
+    return SUCCESS;
+  }
+
+  event void AMControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+     	
+	call TimerAsync.start();
+		
+	}
+    else {
+      call AMControl.start();
+    }
+  }
+
+  event void AMControl.stopDone(error_t err) {
+  }
+
+
+/*****************************************************/
+/*				TIMERS FIRED       					 */
+/*****************************************************/ 
+
+async event error_t TimerAsync.before_bi_fired()
+{
+	////printfUART("bbi %i\n",call TimerAsync.get_current_ticks());
+		
+	if (mac_PIB.macBeaconOrder != mac_PIB.macSuperframeOrder )
+	{
+		if ( Beacon_enabled_PAN == 1 )
+		{
+			//
+			//post set_trx();
+			trx_status = PHY_TX_ON;
+			call PLME_SET_TRX_STATE.request(PHY_TX_ON);
+		}
+		else
+		{
+			//
+			//post set_trx();
+			trx_status = PHY_RX_ON;
+			call PLME_SET_TRX_STATE.request(PHY_RX_ON);
+		}
+	}
+	
+	//I_AM_IN_CAP = 1;
+	findabeacon = 1;
+		
+	return SUCCESS;
+}
+
+/*******************Timer BEACON INTERVAL******************/
+async event error_t TimerAsync.bi_fired()
+{
+	call Leds.led2On();
+	//call Test_send.send();
+	
+	I_AM_IN_CAP = 1;
+	I_AM_IN_IP = 0;
+	
+	////printfUART("bi\n","");
+	
+	
+	if ( Beacon_enabled_PAN == 1 )
+	{
+		//the beacon is send directly without CSMA/CA
+		call PD_DATA.request(send_beacon_length,send_beacon_frame_ptr);
+	}
+
+	number_backoff =0;
+	number_time_slot=0;
+	
+	
+	//CHECK there is the need to wait a small amount of time before checking if the beacon as been processed or not
+	//possible solition, if it receives a packet stand by for confirmation it its a beacon
+	//The device must always receive the beacon
+	if (TrackBeacon == 1) 
+	{
+		if (beacon_processed==1) 
+		{
+			beacon_processed=0;
+		}
+		else
+		{
+			//dealocate all GTS
+			//beacon loss
+
+			on_sync =0;
+			beacon_loss_reason = MAC_BEACON_LOSS;
+			
+			//TODO
+			//post signal_loss();
+		}
+	}
+	
+	post send_frame_csma();
+
+	return SUCCESS;
+}
+
+/*******************Timer SUPERFRAME DURATION******************/
+async event error_t TimerAsync.sd_fired()
+{
+	call Leds.led2Off();
+
+	////printfUART("sd\n","");
+
+	I_AM_IN_CFP = 0;
+	I_AM_IN_IP = 1;
+	
+	
+	number_backoff=0;
+	number_time_slot=0;
+	
+	
+	if (PANCoordinator == 0 && TYPE_DEVICE == ROUTER)
+	{
+		trx_status = PHY_RX_ON;
+	
+		call PLME_SET_TRX_STATE.request(PHY_RX_ON);
+	}
+	else
+	{
+		trx_status = PHY_RX_ON;
+		
+		call PLME_SET_TRX_STATE.request(PHY_RX_ON);
+		
+	}
+	
+	if (mac_PIB.macShortAddress==0xffff && TYPE_DEVICE == END_DEVICE)
+	{
+		trx_status = PHY_RX_ON;
+		
+		call PLME_SET_TRX_STATE.request(PHY_RX_ON);
+	}
+	
+	//trx_status = PHY_RX_ON;
+	//post set_trx();
+	/*
+		//turn the transceiver off
+	if (mac_PIB.macBeaconOrder != mac_PIB.macSuperframeOrder )
+	{
+		if ( mac_PIB.macRxOnWhenIdle == 0 && findabeacon == 0) 
+		{
+			trx_status = PHY_TRX_OFF;
+			post set_trx();
+		}
+		else
+		{
+			trx_status = PHY_RX_ON;
+			post set_trx();
+		}
+	}
+	//if the node is trying to synchronize
+		if (on_sync == 0 || mac_PIB.macPromiscuousMode == 1)
+	{
+		atomic{
+			trx_status = PHY_RX_ON;
+			post set_trx();
+		}
+	}
+	*/
+	if (PANCoordinator == 1)
+	{
+		//increment the gts_null descriptors
+		atomic{
+			
+				//if (GTS_null_descriptor_count > 0) post increment_gts_null();
+			
+				//if (GTS_descriptor_count >0 ) post check_gts_expiration();
+			
+				//if (indirect_trans_count > 0) increment_indirect_trans();
+				
+				//creation of the beacon
+				post create_beacon();
+		}
+		//trx_status = PHY_TRX_OFF;
+		//post set_trx();
+	}
+	else
+	{
+	//temporariamente aqui //aten��o quando for para o cluster-tree � preciso mudar para fora
+	//e necessario destinguir ZC de ZR (que tem que manter a sync com o respectivo pai)
+	if (on_sync == 0)
+	{
+		//sync not ok
+		
+		//findabeacon=1;
+		if (missed_beacons == aMaxLostBeacons)
+		{
+		
+			//printfUART("sync_loss %i\n",missed_beacons);
+			//out of sync
+			post signal_loss();
+		}
+		////printfUART("out_sync %i\n",missed_beacons);
+		missed_beacons++;
+		call Leds.led1Off();
+		
+	}
+	else
+	{
+		//sync ok
+		missed_beacons=0;
+	
+		on_sync=0;
+	}
+	
+	}
+
+	//trx_status = PHY_TRX_OFF;
+	//call PLME_SET_TRX_STATE.request(PHY_TRX_OFF);
+
+	return SUCCESS;
+}
+
+/*******************Timer BEFORE TIME SLOT FIRED******************/
+async event error_t TimerAsync.before_time_slot_fired()
+{
+	on_s_GTS=0;
+	on_r_GTS=0;
+	
+	if (next_on_s_GTS == 1)
+	{	
+		on_s_GTS=1;
+		next_on_s_GTS =0;
+		trx_status = PHY_TX_ON;
+		call PLME_SET_TRX_STATE.request(PHY_TX_ON);
+		//post set_trx();
+	}
+	
+	if(next_on_r_GTS == 1)
+	{
+		on_r_GTS=1;
+		next_on_r_GTS=0;
+		trx_status = PHY_RX_ON;
+		call PLME_SET_TRX_STATE.request(PHY_RX_ON);
+		//post set_trx();
+	}
+
+return SUCCESS;
+}
+/*******************Timer TIME SLOT FIRED******************/
+async event error_t TimerAsync.time_slot_fired()
+{
+	//reset the backoff counter and increment the slot boundary
+	number_backoff=0;
+	number_time_slot++;
+		
+	//verify is there is data to send in the GTS, and try to send it
+	if(PANCoordinator == 1 && GTS_db[15-number_time_slot].direction == 1 && GTS_db[15-number_time_slot].gts_id != 0)
+	{
+		//COORDINATOR SEND DATA
+		////////////printfUART("bbck%i:%i:%i\n", (15-number_time_slot),GTS_db[15-number_time_slot].direction,gts_slot_list[15-number_time_slot].element_count);
+		
+		post start_coordinator_gts_send();
+				
+	}
+	else
+	{
+		//DEVICE SEND DATA
+		if (number_time_slot == s_GTSss && gts_send_buffer_count > 0 && on_sync == 1)//(send_s_GTSss-send_s_GTS_len) 
+		{
+				//current_time = call TimerAsync.get_total_tick_counter();
+				post start_gts_send();
+		}		
+	}
+	
+	next_on_r_GTS =0;
+	next_on_s_GTS=0;
+	
+	
+	////printfUART("ts%i %i %i\n", number_time_slot,s_GTSss,r_GTSss);
+	
+	
+	//verification if the time slot is entering the CAP
+	//GTS FIELDS PROCESSING
+	
+	if ((number_time_slot + 1) >= final_CAP_slot && (number_time_slot + 1) < 16)
+	{
+		I_AM_IN_CAP = 0;
+		I_AM_IN_CFP = 1;
+		
+		////printfUART("bts %i\n",I_AM_IN_CAP, number_time_slot); 
+	
+	atomic{
+		
+		//verification of the next time slot
+		if(PANCoordinator == 1 && number_time_slot < 15)
+		{
+		//COORDINATOR verification of the next time slot
+			if(GTS_db[14-number_time_slot].gts_id != 0x00 && GTS_db[14-number_time_slot].DevAddressType != 0x0000)
+			{	
+				if(GTS_db[14-number_time_slot].direction == 1 ) // device wants to receive
+				{
+					next_on_s_GTS =1; //PAN coord mode
+				}
+				else
+				{
+					next_on_r_GTS=1; //PAN coord mode
+				}
+			}	
+		}
+		else
+		{
+		//device verification of the next time slot
+			if( (number_time_slot +1) == s_GTSss || (number_time_slot +1) == r_GTSss )
+			{
+				////printfUART("s_GTSss: %i r_GTSss: %i\n", s_GTSss,r_GTSss);
+				if((number_time_slot + 1) == s_GTSss)
+				{	
+					////printfUART("MY SEND SLOT \n", "");
+					next_on_s_GTS =1;
+					s_GTS_length --;
+					if (s_GTS_length != 0 )
+					{
+						s_GTSss++;
+					}
+				}
+				else			
+				{
+					//////////////printfUART("MY RECEIVE SLOT \n", "");
+					next_on_r_GTS =1;
+					r_GTS_length --;
+					if (r_GTS_length != 0 )
+					{
+						r_GTSss++;
+					}
+				}				
+			}
+			else
+			{
+				//idle
+				next_on_s_GTS=0;
+				next_on_r_GTS=0;
+			}
+		}
+	}
+	}
+	
+return SUCCESS;
+}
+async event error_t TimerAsync.sfd_fired()
+{
+
+return SUCCESS;
+}
+
+/*******************Timer BACKOFF PERIOD******************/
+async event error_t TimerAsync.backoff_fired()
+{
+	//slotted CSMA/CA function
+	atomic{
+	
+		if( csma_locate_backoff_boundary == 1 )
+		{
+			csma_locate_backoff_boundary=0;
+			
+			//post start_csma_ca_slotted();
+			
+			//DEFERENCE CHANGE
+			if (backoff_deference == 0)
+			{
+				//normal situation
+				delay_backoff_period = (call Random.rand16() & ((uint8_t)(powf(2,BE)) - 1));
+				
+				if (check_csma_ca_backoff_send_conditions((uint32_t) delay_backoff_period) == 1)
+				{
+					backoff_deference = 1;
+				}
+				
+			}
+			else
+			{
+				backoff_deference = 0;
+			}
+			
+			csma_delay=1;
+		}
+		if( csma_cca_backoff_boundary == 1 )
+			post perform_csma_ca_slotted();
+	}
+	//CSMA/CA
+	atomic{
+		if(csma_delay == 1 )
+		{
+			if (delay_backoff_period == 0)
+			{
+				if(csma_slotted == 0)
+				{
+					post perform_csma_ca_unslotted();
+				}
+				else
+				{
+					//CSMA/CA SLOTTED
+					csma_delay=0;
+					csma_cca_backoff_boundary=1;
+				}
+			}
+			delay_backoff_period--;
+		}
+	}
+	number_backoff++;
+return SUCCESS;
+}
+
+/*******************T_ackwait**************************/
+  event void T_ackwait.fired() {
+  
+  //////////printfUART("Tfd \n", "");
+	
+	//call Leds.redToggle();
+
+	if (send_ack_check == 1)
+	{
+		retransmit_count++;
+		
+		if (retransmit_count == aMaxFrameRetries || send_indirect_transmission > 0)
+		{
+				//check the type of data being send
+				/*
+				if (associating == 1)
+				{
+					//printfUART("af ack\n", "");
+					associating=0;
+					signal MLME_ASSOCIATE.confirm(0x0000,MAC_NO_ACK);
+				}
+				*/
+				
+			atomic{	
+				////////////printfUART("TRANSMISSION FAIL\n",""); 
+				//stardard procedure, if fail discard the packet
+				atomic send_buffer_count --;
+				send_buffer_msg_out++;
+			
+					//failsafe
+					if(send_buffer_count > SEND_BUFFER_SIZE)
+					{
+						
+						atomic send_buffer_count =0;
+						send_buffer_msg_out=0;
+						send_buffer_msg_in=0;
+						
+					}
+					
+					
+					if (send_buffer_msg_out == SEND_BUFFER_SIZE)
+						send_buffer_msg_out=0;
+					
+					if (send_buffer_count > 0)
+						post send_frame_csma();
+						
+					send_ack_check=0;
+					retransmit_count=0;
+					ack_sequence_number_check=0;
+				
+				}
+		}
+		
+		////////////printfUART("RETRY\n",""); 
+		//retransmissions
+		post send_frame_csma();
+	}
+    
+  }
+
+/*******************T_ResponseWaitTime**************************/
+  event void T_ResponseWaitTime.fired() {
+  	//command response wait time
+	////////////printfUART("T_ResponseWaitTime.fired\n", "");
+
+	if (associating == 1)
+	{
+		//printfUART("af rwt\n", "");
+		associating=0;
+		signal MLME_ASSOCIATE.confirm(0x0000,MAC_NO_DATA);
+		
+	}
+  
+  }
+
+/*****************************************************
+****************PD_DATA EVENTS***********************
+******************************************************/
+  async event error_t PD_DATA.confirm(uint8_t status) {
+
+
+    return SUCCESS;     
+  }
+ 
+/*****************************************************
+****************       PD_DATA     ********************
+******************************************************/ 
+
+async event error_t PD_DATA.indication(uint8_t psduLenght,uint8_t* psdu, int8_t ppduLinkQuality){
+ 
+		//if(I_AM_IN_CAP == 1 || I_AM_IN_CFP == 1 || mac_PIB.macShortAddress==0xffff || scanning_channels ==1 || findabeacon == 1)
+		//{
+			if (buffer_count > RECEIVE_BUFFER_SIZE)
+			{
+				//call Leds.redToggle();
+				//printfUART("full\n","");
+			}
+			else
+			{
+		
+				memcpy(&buffer_msg[current_msg_in],psdu,sizeof(MPDU));
+
+				atomic{
+					current_msg_in++;
+				
+					if ( current_msg_in == RECEIVE_BUFFER_SIZE ) 
+						current_msg_in = 0;
+		
+					buffer_count ++;
+				}
+				
+				link_quality = ppduLinkQuality;
+				
+				if (scanning_channels ==1)
+				{
+					//channel scan operation, accepts beacons only
+					post data_channel_scan_indication();
+				
+				}
+				else
+				{
+				//normal operation
+					post data_indication();
+				}
+			}
+		//}
+		//else
+		//{
+		//	//printfUART("drop\n","");
+		//}
+
+return SUCCESS;
+}
+
+
+
+task void data_indication()
+{
+	//check all the conditions for a receiver packet
+    //pag 155
+ 
+	uint8_t link_qual;
+	
+	atomic link_qual = link_quality;
+
+	////printfUART("data_indication\n","");
+	//////////printfUART("buf  %i %i\n",buffer_count,indirect_trans_count);
+
+	//Although the receiver of the device is enabled during the channel assessment portion of this algorithm, the
+	//device shall discard any frames received during this time.
+	//////////////printfUART("performing_csma_ca: %i\n",performing_csma_ca);
+	if (performing_csma_ca == 1)
+	{	
+		//////////////printfUART("REJ CSMA\n","");
+		atomic{ 
+			buffer_count--;
+		
+			current_msg_out++;
+		if ( current_msg_out == RECEIVE_BUFFER_SIZE )	
+			current_msg_out = 0;
+			}
+		
+		return;
+    }
+	
+	//while performing channel scan disable the packet reception
+	if ( scanning_channels == 1)
+	{	
+		atomic{ 
+			buffer_count--;
+	
+			current_msg_out++;
+		if ( current_msg_out == RECEIVE_BUFFER_SIZE )	
+			current_msg_out = 0;
+			}
+		return;
+	}	
+atomic{
+
+    //////printfUART("data ind %x %x %i\n",buffer_msg[current_msg_out].frame_control1,buffer_msg[current_msg_out].frame_control2,(buffer_msg[current_msg_out].frame_control2 & 0x7));
+	
+	//check the frame type of the received packet
+	switch( (buffer_msg[current_msg_out].frame_control1 & 0x7) )
+	{
+		
+			case TYPE_DATA: ////printfUART("rd %i\n",buffer_msg[current_msg_out].seq_num);
+							indication_data(&buffer_msg[current_msg_out],link_qual);
+							break;
+							
+			case TYPE_ACK: ////printfUART("ra\n","");
+							//ack_received = 1;
+							indication_ack(&buffer_msg[current_msg_out],link_qual);
+							
+							break;
+							
+			case TYPE_CMD:  ////printfUART("rc\n","");
+							indication_cmd(&buffer_msg[current_msg_out],link_qual);
+							break;
+			
+			case TYPE_BEACON:
+							
+							////printfUART("rb %i\n",buffer_msg[current_msg_out].seq_num);
+							if (mac_PIB.macShortAddress == 0x0000) 
+							{
+								buffer_count--;
+							}
+							else
+							{
+								process_beacon(&buffer_msg[current_msg_out],link_qual);
+								
+							}
+
+							break;
+			default: 
+						atomic buffer_count--;
+						//////printfUART("Invalid frame type\n","");
+
+						break;
+	}
+	atomic{
+			current_msg_out++;
+		if ( current_msg_out == RECEIVE_BUFFER_SIZE )	
+			current_msg_out = 0;
+		}
+	}
+	return;
+}
+
+
+
+/*****************************************************
+****************PLME_ED EVENTS***********************
+******************************************************/ 
+event error_t PLME_CCA.confirm(uint8_t status){
+return SUCCESS;
+}
+   
+   
+event error_t PLME_SET.confirm(uint8_t status, uint8_t PIBAttribute){   
+return SUCCESS;
+}
+ 
+async event error_t PLME_SET_TRX_STATE.confirm(uint8_t status){
+
+return SUCCESS;
+}    
+   
+event error_t PLME_GET.confirm(uint8_t status,uint8_t PIBAttribute, uint8_t PIBAttributeValue){
+   
+return SUCCESS;
+}    
+
+event error_t PLME_ED.confirm(uint8_t status,int8_t EnergyLevel){
+
+return SUCCESS;
+}
+
+/*******************************************************************************************************/
+/*******************************************************************************************************/
+/*******************************************************************************************************/
+/****************************************PACKET PROCESSING FUNCTIONS************************************/
+/*******************************************************************************************************/
+/*******************************************************************************************************/
+/*******************************************************************************************************/
+
+void process_beacon(MPDU *packet,uint8_t ppduLinkQuality)
+{
+
+	/*
+	ORGANIZE THE PROCESS BEACON FUNCION AS FOLLOWS.
+	1- GET THE BEACON ORDER
+	2- GET THE SUPERFRAME ORDER
+	3- GET THE FINAL CAP SLOT
+	4 - COMPUTE SD, BI, TS, BACKOFF PERIOD IN MILLISECONDS
+	
+	4- SYNCHRONIZE THE NODE BY DOING THE FOLLOWING
+		- SET A TIMER IN MS FOR THE FINAL TIME SLOT (SUPERFRAME DURATION) : IT EXPRIES AFTER SD - TX TIME - PROCESS TIME
+		- SET A TIMER IN MS FOR THE GTS IF ANY EXIST IT EXPRIES AFTER GTS_NBR * TIME_SLOT - TX TIME - PROCESS TIME 
+	*/
+	uint32_t SO_EXPONENT;
+	uint32_t BO_EXPONENT;
+	int i=0;
+	uint16_t gts_descriptor_addr;
+	uint8_t data_count;
+	
+	uint8_t gts_directions;
+	uint8_t gts_des_count;
+	
+	uint8_t gts_ss;
+	uint8_t gts_l;
+	uint8_t dir;
+	uint8_t dir_mask;
+
+	//end gts variables
+
+	//function that processes the received beacon
+	beacon_addr_short *beacon_ptr;
+	
+	PANDescriptor pan_descriptor;
+
+	// beacon_trans_delay = (((packet->length(bytes) * 8.0) / 250.00(bits/s) ) / 0.34(s) (timer_granularity) ) (symbols)
+
+	//pending frames
+	uint8_t short_addr_pending=0;
+	uint8_t long_addr_pending=0;
+
+	//used in the synchronization
+	//uint32_t process_tick_counter; //symbols
+	
+	//uint32_t becon_trans_delay; //symbols
+	//uint32_t start_reset_ct; //number of clock ticks since the start of the beacon interval
+	
+	//used in the track beacon
+	beacon_processed = 1;
+	missed_beacons=0;
+	
+	//initializing pointer to data structure
+	beacon_ptr = (beacon_addr_short*) (packet->data);
+	
+	
+		//decrement buffer count
+	atomic buffer_count --;
+	
+	////printfUART("Received Beacon\n","");
+	////printfUART("rb panid: %x %x \n",beacon_ptr->source_address,mac_PIB.macCoordShortAddress);
+	////////printfUART("My macPANID: %x\n",mac_PIB.macPANId);
+	
+	if( beacon_ptr->source_address != mac_PIB.macCoordShortAddress)
+	{
+		//
+		return;
+	}
+	////printfUART("bea %i\n",call TimerAsync.get_current_ticks());
+	
+	/**********************************************************************************/
+	/*					PROCESSING THE SUPERFRAME STRUCTURE							  */
+	/**********************************************************************************/
+	
+	if (PANCoordinator == 0)
+	{
+		mac_PIB.macBeaconOrder = get_beacon_order(beacon_ptr->superframe_specification);
+		mac_PIB.macSuperframeOrder = get_superframe_order(beacon_ptr->superframe_specification);
+		
+		//mac_PIB.macCoordShortAddress = beacon_ptr->source_address;
+		
+		////printfUART("BO,SO:%i %i\n",mac_PIB.macBeaconOrder,mac_PIB.macSuperframeOrder);
+		
+		//mac_PIB.macPANId = beacon_ptr->source_PAN_identifier;
+		
+		//beacon order check if it changed
+		if (mac_PIB.macSuperframeOrder == 0)
+		{
+			SO_EXPONENT = 1;
+		}
+		else
+		{
+			SO_EXPONENT = powf(2,mac_PIB.macSuperframeOrder);
+		}
+		
+		if ( mac_PIB.macBeaconOrder ==0)
+		{
+			BO_EXPONENT =1;
+		}
+		else
+		{
+				BO_EXPONENT = powf(2,mac_PIB.macBeaconOrder);
+		}
+		BI = aBaseSuperframeDuration * BO_EXPONENT; 
+		SD = aBaseSuperframeDuration * SO_EXPONENT; 
+		
+		//backoff_period
+		backoff = aUnitBackoffPeriod;
+		time_slot = SD / NUMBER_TIME_SLOTS;
+		
+		call TimerAsync.set_bi_sd(BI,SD);
+	}	
+		
+	/**********************************************************************************/
+	/*							PROCESS GTS CHARACTERISTICS							  */
+	/**********************************************************************************/
+		allow_gts =1;
+	
+		//initializing the gts variables
+		s_GTSss=0;
+		s_GTS_length=0;
+		
+		r_GTSss=0;
+		r_GTS_length=0;
+		
+		/*
+		send_s_GTSss=0;  
+		send_r_GTSss=0;	
+		send_s_GTS_len=0;
+		send_r_GTS_len=0;
+		*/
+		final_CAP_slot = 15;
+
+
+		gts_des_count = (packet->data[8] & 0x0f);
+		
+		data_count = 9;
+		
+		final_CAP_slot = 15 - gts_des_count;
+		
+		if (gts_des_count > 0 )
+		{
+		data_count = 10; //position of the current data count
+		//process descriptors
+		
+			gts_directions = packet->data[9];
+			
+			////printfUART("gts_directions:%x\n",gts_directions);
+			
+			for(i=0; i< gts_des_count; i++)
+			{	
+				gts_descriptor_addr = (uint16_t) packet->data[data_count];
+					
+				////printfUART("gts_des_addr:%x mac short:%x\n",gts_descriptor_addr,mac_PIB.macShortAddress);
+				
+				data_count = data_count+2;
+				//check if it concerns me
+				if (gts_descriptor_addr == mac_PIB.macShortAddress)
+				{
+					//confirm the gts request
+					//////////////printfUART("packet->data[data_count]: %x\n",packet->data[data_count]);
+					//gts_ss = 15 - get_gts_descriptor_ss(packet->data[data_count]);
+					gts_ss = get_gts_descriptor_ss(packet->data[data_count]);
+					gts_l = get_gts_descriptor_len(packet->data[data_count]);
+
+					if ( i == 0 )
+					{
+						dir_mask=1;
+					}
+					else
+					{
+					
+							dir_mask = powf(2,i);
+					}
+					//////////////printfUART("dir_mask: %x i: %x gts_directions: %x \n",dir_mask,i,gts_directions);
+					dir = ( gts_directions & dir_mask);
+					if (dir == 0)
+					{
+						s_GTSss=gts_ss;
+						s_GTS_length=gts_l;
+					}
+					else
+					{
+
+						r_GTSss=gts_ss;
+						r_GTS_length=gts_l;
+					}
+					
+					////printfUART("PB gts_ss: %i gts_l: %i dir: %i \n",gts_ss,gts_l,dir);
+					//////////////printfUART("PB send_s_GTSss: %i send_s_GTS_len: %i\n",send_s_GTSss,send_s_GTS_len);
+					
+					if ( gts_l == 0 )
+					{
+						allow_gts=0;
+					}
+
+					if (gts_confirm == 1 && gts_l != 0)
+					{
+						//signal ok
+						////printfUART("gts confirm \n","");
+						gts_confirm =0;
+						signal MLME_GTS.confirm(GTS_specification,MAC_SUCCESS);
+					}
+					else
+					{
+						//signal not ok
+						//////////////printfUART("gts not confirm \n","");
+						gts_confirm =0;
+						signal MLME_GTS.confirm(GTS_specification,MAC_DENIED);
+					}
+					
+				}
+				data_count++;	
+			}
+		}
+	
+	/**********************************************************************************/
+	/*							PROCESS PENDING ADDRESSES INFORMATION				  */
+	/**********************************************************************************/	
+		//this should pass to the network layer
+		
+		
+		short_addr_pending=get_number_short(packet->data[data_count]);
+		long_addr_pending=get_number_extended(packet->data[data_count]);
+		
+		////////////printfUART("ADD COUNT %i %i\n",short_addr_pending,long_addr_pending);
+		
+		data_count++;
+		
+		if(short_addr_pending > 0)
+		{
+			for(i=0;i < short_addr_pending;i++)
+			{
+				////////////printfUART("PB %i %i\n",(uint16_t)packet->data[data_count],short_addr_pending);
+				
+				//if(packet->data[data_count] == (uint8_t)mac_PIB.macShortAddress && packet->data[data_count+1] == (uint8_t)(mac_PIB.macShortAddress >> 8) )
+				if((uint16_t)packet->data[data_count] == mac_PIB.macShortAddress)
+				{
+					
+					create_data_request_cmd();
+				}
+				data_count = data_count + 2;
+			}
+		}
+		if(long_addr_pending > 0)
+		{
+			for(i=0; i < long_addr_pending;i++)
+			{
+				if((uint32_t)packet->data[data_count] == aExtendedAddress0 && (uint32_t)packet->data[data_count + 4] == aExtendedAddress1)
+				{
+					
+					data_count = data_count + 8;
+
+				}
+			
+			}
+		}
+
+	/**********************************************************************************/
+	/*				BUILD the PAN descriptor of the COORDINATOR						  */
+	/**********************************************************************************/
+		
+		
+	   //Beacon NOTIFICATION
+	   //BUILD the PAN descriptor of the COORDINATOR
+		//assuming that the adress is short
+		pan_descriptor.CoordAddrMode = SHORT_ADDRESS;
+		pan_descriptor.CoordPANId = 0x0000;//beacon_ptr->source_PAN_identifier;
+		pan_descriptor.CoordAddress0=0x00000000;
+		pan_descriptor.CoordAddress1=mac_PIB.macCoordShortAddress;
+		pan_descriptor.LogicalChannel=current_channel;
+		//superframe specification field
+		pan_descriptor.SuperframeSpec = beacon_ptr->superframe_specification;
+		
+		pan_descriptor.GTSPermit=mac_PIB.macGTSPermit;
+		pan_descriptor.LinkQuality=0x00;
+		pan_descriptor.TimeStamp=0x000000;
+		pan_descriptor.SecurityUse=0;
+		pan_descriptor.ACLEntry=0x00;
+		pan_descriptor.SecurityFailure=0x00;
+	   
+		//I_AM_IN_CAP = 1;
+	   
+	/**********************************************************************************/
+	/*								SYNCHRONIZING									  */
+	/**********************************************************************************/
+
+	//processing time + beacon transmission delay
+	
+	//removed not used
+	//process_tick_counter = call TimerAsync.get_process_frame_tick_counter();
+	//removed not used	
+	//start_reset_ct = ((1000 * (packet->length * 8.0) / 250)) / 69.54;  //(process_tick_counter - receive_tick_counter);
+
+	if(PANCoordinator == 0)
+	{
+			I_AM_IN_CAP = 1;
+			I_AM_IN_IP = 0;
+			
+			//call Leds.yellowOn();
+			call Leds.led2On();
+			
+			call Leds.led1On();
+			
+			if(findabeacon == 1)
+			{
+				////printfUART("findabeacon\n", "");
+				call TimerAsync.set_timers_enable(1);
+				findabeacon =0;
+			}
+			
+			//#ifdef PLATFORM_MICAZ
+			//number_time_slot = call TimerAsync.reset_start(start_reset_ct+process_tick_counter+52);// //SOBI=3 52 //SOBI=0 15
+			//#else
+			
+			//call TimerAsync.reset();
+			
+			number_time_slot = call TimerAsync.reset_start(75);   //95 old val sem print
+					
+			// +process_tick_counter+52 //SOBI=3 52 //SOBI=0 
+			//#endif
+			on_sync=1;
+			
+			////printfUART("sED\n", "");
+	}
+	signal MLME_BEACON_NOTIFY.indication((uint8_t)packet->seq_num,pan_descriptor,0, 0, mac_PIB.macBeaconPayloadLenght, packet->data);
+		
+return;
+}
+
+
+void process_gts_request(MPDU *pdu)
+{
+		error_t status;
+		cmd_gts_request *mac_gts_request;
+		
+		mac_gts_request= (cmd_gts_request*) &pdu->data;
+		
+atomic{		
+		if ( get_characteristic_type(mac_gts_request->gts_characteristics) == 1)
+		{
+		//allocation
+	
+	//process the gts request
+		status = add_gts_entry(get_gts_length(mac_gts_request->gts_characteristics),get_gts_direction(mac_gts_request->gts_characteristics),mac_gts_request->source_address);
+		
+		}
+		else
+		{
+		//dealocation
+	
+		status = remove_gts_entry(mac_gts_request->source_address);
+		}
+		
+		signal MLME_GTS.indication(mac_gts_request->source_address, mac_gts_request->gts_characteristics, 0, 0);
+		
+		}
+
+return;
+}
+/****************DATA indication functions******************/
+
+void indication_data(MPDU *pdu, int8_t ppduLinkQuality)
+{
+	uint8_t data_len;
+	
+	uint8_t payload[80];
+	uint8_t msdu_length=0;
+	
+	//int i;
+	
+	uint32_t SrcAddr[2];
+	uint32_t DstAddr[2];
+	
+	
+	//frame control variables
+	uint8_t source_address=0;
+	uint8_t destination_address=0;
+
+
+	dest_short *dest_short_ptr;
+	dest_long *dest_long_ptr;
+	
+	source_short *source_short_ptr;
+	source_long *source_long_ptr;
+
+	//implement the intra PAN data messages
+	//intra_pan_source_short *intra_pan_source_short_ptr;
+	//intra_pan_source_long *intra_pan_source_long_ptr;
+	
+	
+	source_address=get_fc2_source_addr(pdu->frame_control2);
+	destination_address=get_fc2_dest_addr(pdu->frame_control2);
+	
+	//decrement buffer count
+	atomic buffer_count --;
+	
+	SrcAddr[0]=0x00000000;
+	SrcAddr[1]=0x00000000;
+	DstAddr[0]=0x00000000;
+	DstAddr[1]=0x00000000;
+
+
+	////printfUART("id %i %i \n",source_address,destination_address);
+
+
+	if ( get_fc1_intra_pan(pdu->frame_control1)== 0 )
+	{
+	//INTRA PAN
+		if (destination_address > 1 && source_address > 1)
+		{
+			// Destination LONG - Source LONG	
+			if (destination_address == LONG_ADDRESS && source_address == LONG_ADDRESS)
+			{
+				dest_long_ptr = (dest_long *) &pdu->data[0];
+				source_long_ptr = (source_long *) &pdu->data[DEST_LONG_LEN];
+				
+				//If a short destination address is included in the frame, it shall match either macShortAddress or the
+				//broadcast address (0 x ffff). Otherwise, if an extended destination address is included in the frame, it
+				//shall match aExtendedAddress.
+				if ( dest_long_ptr->destination_address0 !=aExtendedAddress0 && dest_long_ptr->destination_address1 !=aExtendedAddress1 )
+				{
+					////////////printfUART("data rejected, ext destination not for me\n", ""); 
+					return;
+				}
+				//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+				//broadcast PAN identifier (0 x ffff).
+				if(dest_long_ptr->destination_PAN_identifier != 0xffff && dest_long_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+				{
+					////////////printfUART("data rejected, wrong destination PAN\n", ""); 
+					return;
+				}
+				data_len = 20;
+				
+				
+				DstAddr[1] = dest_long_ptr->destination_address0;
+				DstAddr[0] =dest_long_ptr->destination_address1;
+				
+				SrcAddr[1] =source_long_ptr->source_address0;
+				SrcAddr[0] =source_long_ptr->source_address1;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+				
+				signal MCPS_DATA.indication((uint16_t)source_address, (uint16_t)source_long_ptr->source_PAN_identifier, SrcAddr,(uint16_t)destination_address, (uint16_t)dest_long_ptr->destination_PAN_identifier, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+				
+			}
+			
+			// Destination SHORT - Source LONG
+			if ( destination_address == SHORT_ADDRESS && source_address == LONG_ADDRESS )
+			{
+				dest_short_ptr = (dest_short *) &pdu->data[0];
+				source_long_ptr = (source_long *) &pdu->data[DEST_SHORT_LEN];
+				
+				//If a short destination address is included in the frame, it shall match either macShortAddress or the
+				//broadcast address (0 x ffff). Otherwise, if an extended destination address is included in the frame, it
+				//shall match aExtendedAddress.
+				if ( dest_short_ptr->destination_address != 0xffff && dest_short_ptr->destination_address != mac_PIB.macShortAddress)
+				{
+					////////////printfUART("data rejected, short destination not for me\n", ""); 
+					return;
+				}
+				//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+				//broadcast PAN identifier (0 x ffff).
+				if(dest_short_ptr->destination_PAN_identifier != 0xffff && dest_short_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+				{
+					////////////printfUART("data rejected, wrong destination PAN\n", ""); 
+					return;
+				}
+				
+				data_len = 14;
+				
+				DstAddr[0] =dest_short_ptr->destination_address;
+				
+				SrcAddr[1] =source_long_ptr->source_address0;
+				SrcAddr[0] =source_long_ptr->source_address1;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+				
+				signal MCPS_DATA.indication((uint16_t)source_address, (uint16_t)source_long_ptr->source_PAN_identifier, SrcAddr,(uint16_t)destination_address, (uint16_t)dest_short_ptr->destination_PAN_identifier, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+			}
+			// Destination LONG - Source SHORT
+			if ( destination_address == LONG_ADDRESS && source_address == SHORT_ADDRESS )
+			{
+				dest_long_ptr = (dest_long *) &pdu->data[0];
+				source_short_ptr = (source_short *) &pdu->data[DEST_LONG_LEN];
+				
+				//If a short destination address is included in the frame, it shall match either macShortAddress or the
+				//broadcast address (0 x ffff). Otherwise, if an extended destination address is included in the frame, it
+				//shall match aExtendedAddress.
+				if ( dest_long_ptr->destination_address0 !=aExtendedAddress0 && dest_long_ptr->destination_address1 !=aExtendedAddress1 )
+				{
+					////////////printfUART("data rejected, ext destination not for me\n", ""); 
+					return;
+				}
+				//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+				//broadcast PAN identifier (0 x ffff).
+				if(dest_long_ptr->destination_PAN_identifier != 0xffff && dest_long_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+				{
+					////////////printfUART("data rejected, wrong destination PAN\n", ""); 
+					return;
+				}
+				
+				data_len = 14;
+				
+				DstAddr[1] = dest_long_ptr->destination_address0;
+				DstAddr[0] =dest_long_ptr->destination_address1;
+				
+				
+				SrcAddr[0] =source_short_ptr->source_address;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+				
+				signal MCPS_DATA.indication((uint16_t)source_address, (uint16_t)source_short_ptr->source_PAN_identifier, SrcAddr,(uint16_t)destination_address, (uint16_t)dest_long_ptr->destination_PAN_identifier, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+			}
+			
+			
+			//Destination SHORT - Source SHORT
+			if ( destination_address == SHORT_ADDRESS && source_address == SHORT_ADDRESS )	
+			{
+				dest_short_ptr = (dest_short *) &pdu->data[0];
+				source_short_ptr = (source_short *) &pdu->data[DEST_SHORT_LEN];
+				
+				//If a short destination address is included in the frame, it shall match either macShortAddress or the
+				//broadcast address (0 x ffff). Otherwise, if an extended destination address is included in the frame, it
+				//shall match aExtendedAddress.
+				if ( dest_short_ptr->destination_address != 0xffff && dest_short_ptr->destination_address != mac_PIB.macShortAddress)
+				{
+					////printfUART("data rejected, short destination not for me\n", ""); 
+					return;
+				}
+				//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+				//broadcast PAN identifier (0 x ffff).
+				if(dest_short_ptr->destination_PAN_identifier != 0xffff && dest_short_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+				{
+					////printfUART("SH SH data rejected, wrong destination PAN %x\n",mac_PIB.macPANId ); 
+					return;
+				}
+				
+				data_len = 8;
+				
+				if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+				{
+					build_ack(pdu->seq_num,0);
+				}
+				
+				DstAddr[0] =dest_short_ptr->destination_address;
+				
+				SrcAddr[0] =source_short_ptr->source_address;
+				
+				msdu_length = (pdu->length - 5) - data_len;
+				
+				
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+			
+				signal MCPS_DATA.indication((uint16_t)source_address, (uint16_t)source_short_ptr->source_PAN_identifier, SrcAddr,(uint16_t)destination_address, (uint16_t)dest_short_ptr->destination_PAN_identifier, DstAddr, (uint16_t)msdu_length,payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+			}
+		}
+		
+		/*********NO DESTINATION ADDRESS PRESENT ****************/
+		
+		if ( destination_address == 0 && source_address > 1 )
+		{
+				
+			if (source_address == LONG_ADDRESS)
+			{//Source LONG
+				source_long_ptr = (source_long *) &pdu->data[0];
+				
+				//If only source addressing fields are included in a data or MAC command frame, the frame shall be
+				//accepted only if the device is a PAN coordinator and the source PAN identifier matches macPANId.
+				if ( PANCoordinator==0 || source_long_ptr->source_PAN_identifier != mac_PIB.macPANId )
+				{
+					////////////printfUART("data rejected, im not pan\n", ""); 
+					return;
+				}
+				
+				data_len = 10;
+				
+				SrcAddr[1] =source_long_ptr->source_address0;
+				SrcAddr[0] =source_long_ptr->source_address1;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+				
+				signal MCPS_DATA.indication((uint16_t)source_address,(uint16_t)source_long_ptr->source_PAN_identifier, SrcAddr,(uint16_t)destination_address, 0x0000, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+			}
+			else
+			{//Source SHORT
+
+				source_short_ptr = (source_short *) &pdu->data[0];
+				//If only source addressing fields are included in a data or MAC command frame, the frame shall be
+				//accepted only if the device is a PAN coordinator and the source PAN identifier matches macPANId.
+				if ( PANCoordinator==0 || source_short_ptr->source_PAN_identifier != mac_PIB.macPANId )
+				{
+					////////////printfUART("data rejected, im not pan\n", ""); 
+					return;
+				}
+				
+				data_len = 4;
+
+				
+				SrcAddr[0] =source_short_ptr->source_address;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+				
+				signal MCPS_DATA.indication((uint16_t)source_address, (uint16_t)source_short_ptr->source_PAN_identifier, SrcAddr,(uint16_t)destination_address, 0x0000, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+			}
+		}
+		/*********NO SOURCE ADDRESS PRESENT ****************/
+		
+		if ( destination_address > 1 && source_address == 0 )
+		{
+			if (destination_address == LONG_ADDRESS)
+			{//Destination LONG
+				dest_long_ptr = (dest_long *) &pdu->data[0];
+				
+				//If a short destination address is included in the frame, it shall match either macShortAddress or the
+				//broadcast address (0 x ffff). Otherwise, if an extended destination address is included in the frame, it
+				//shall match aExtendedAddress.
+				if ( dest_long_ptr->destination_address0 !=aExtendedAddress0 && dest_long_ptr->destination_address1 !=aExtendedAddress1 )
+				{
+					////////////printfUART("data rejected, ext destination not for me\n", ""); 
+					return;
+				}
+				//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+				//broadcast PAN identifier (0 x ffff).
+				if(dest_long_ptr->destination_PAN_identifier != 0xffff && dest_long_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+				{
+					////////////printfUART("data rejected, wrong destination PAN\n", ""); 
+					return;
+				}
+				
+				data_len = 10;
+				
+				DstAddr[1] = dest_long_ptr->destination_address0;
+				DstAddr[0] =dest_long_ptr->destination_address1;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+			
+				signal MCPS_DATA.indication((uint16_t)source_address,0x0000, SrcAddr,(uint16_t)destination_address, (uint16_t)dest_long_ptr->destination_PAN_identifier, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+			}
+			else
+			{//Destination SHORT
+				dest_short_ptr = (dest_short *) &pdu->data[0];
+				
+				//If a short destination address is included in the frame, it shall match either macShortAddress or the
+				//broadcast address (0 x ffff). Otherwise, if an extended destination address is included in the frame, it
+				//shall match aExtendedAddress.
+				if ( dest_short_ptr->destination_address != 0xffff && dest_short_ptr->destination_address != mac_PIB.macShortAddress)
+				{
+					////////////printfUART("data rejected, short destination not for me\n", ""); 
+					return;
+				}
+				//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+				//broadcast PAN identifier (0 x ffff).
+				if(dest_short_ptr->destination_PAN_identifier != 0xffff && dest_short_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+				{
+					////////////printfUART("data rejected, wrong destination PAN\n", ""); 
+					return;
+				}
+				
+				data_len = 4;
+				
+				DstAddr[0] =dest_short_ptr->destination_address;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+				
+				
+				signal MCPS_DATA.indication((uint16_t)source_address,0x0000, SrcAddr,(uint16_t)destination_address, (uint16_t)dest_short_ptr->destination_PAN_identifier, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+				data_len = 4;
+			}
+		}
+		
+	}
+	else
+	{
+	//intra_pan == 1
+	
+	
+	
+	}
+	
+	
+return;
+}
+
+void indication_cmd(MPDU *pdu, int8_t ppduLinkQuality)
+{
+		uint8_t cmd_type;
+		//uint8_t pk_ptr;
+		uint8_t addressing_fields_length=0;
+		
+		uint32_t SrcAddr[2];
+		//uint32_t DstAddr[2];//NOT USED SO FAR
+		
+		//frame control variables
+		uint8_t source_address=0;
+		uint8_t destination_address=0;
+	
+		//NOT USED SO FAR
+		//dest_short *dest_short_ptr;
+		//dest_long *dest_long_ptr;
+		//NOT USED SO FAR
+		//source_short *source_short_ptr;
+		source_long *source_long_ptr;
+		
+		dest_short *dest_short_ptr;
+		dest_long *dest_long_ptr;
+		
+		//CHECK IMPLEMENT
+		//intra_pan_source_short *intra_pan_source_short_ptr; 
+		//intra_pan_source_long *intra_pan_source_long_ptr;
+		
+		destination_address=get_fc2_dest_addr(pdu->frame_control2);
+		source_address=get_fc2_source_addr(pdu->frame_control2);
+		
+		//decrement buffer count
+		atomic buffer_count --;
+		
+		switch(destination_address)
+		{
+			case LONG_ADDRESS: addressing_fields_length = DEST_LONG_LEN;
+								dest_long_ptr = (dest_long *) &pdu->data[0];
+								if(dest_long_ptr->destination_address0 !=aExtendedAddress0 && dest_long_ptr->destination_address1 !=aExtendedAddress1)
+								{
+									//printfUART("NOT FOR ME","");
+									return;
+								}
+								
+								break;
+			case SHORT_ADDRESS: addressing_fields_length = DEST_SHORT_LEN;
+								dest_short_ptr= (dest_short *) &pdu->data[0];
+								//destination command not for me
+								if (dest_short_ptr->destination_address != mac_PIB.macShortAddress && dest_short_ptr->destination_address !=0xffff)
+								{
+									//printfUART("NOT FOR ME","");
+									////////////printfUART("NOT FOR ME %x me %e\n", dest_short_ptr->destination_address,mac_PIB.macShortAddress); 
+									return;
+								}
+								break;
+		}
+		switch(source_address)
+		{
+			case LONG_ADDRESS: addressing_fields_length = addressing_fields_length + SOURCE_LONG_LEN;
+								break;
+			case SHORT_ADDRESS: addressing_fields_length = addressing_fields_length + SOURCE_SHORT_LEN;
+								break;
+		}
+
+		cmd_type = pdu->data[addressing_fields_length];
+		
+				
+		switch(cmd_type)
+		{
+		
+		case CMD_ASSOCIATION_REQUEST: 	
+									//check if association is allowed, if not discard the frame		
+									
+									////////printfUART("CMD_ASSOCIATION_REQUEST \n", "");
+									
+										
+											if (mac_PIB.macAssociationPermit == 0 )
+											{
+												////////////printfUART("Association not alowed\n", "");
+												if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+												{
+													build_ack(pdu->seq_num,0);
+												}
+												return;
+											}
+											
+											if ( PANCoordinator==0 )
+											{
+												////////////printfUART("i�m not a pan\n", ""); 
+												return;
+											}
+									atomic{
+											source_long_ptr = (source_long *) &pdu->data[DEST_SHORT_LEN];
+											
+											SrcAddr[1] =source_long_ptr->source_address0;
+											SrcAddr[0] =source_long_ptr->source_address1;
+											
+											
+											signal MLME_ASSOCIATE.indication(SrcAddr, pdu->data[addressing_fields_length+1] , 0, 0);
+
+											}
+											
+											if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+											{
+												build_ack(pdu->seq_num,1);
+											}	
+
+											
+									break;
+		
+		case CMD_ASSOCIATION_RESPONSE: atomic{
+												//printfUART("CMD_ASSOCIATION_RESPONSE\n", ""); 
+												
+												associating =0;
+												call T_ResponseWaitTime.stop();
+												
+												if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+												{
+													build_ack(pdu->seq_num,0);
+												}
+											
+												signal MLME_ASSOCIATE.confirm((uint16_t)(pdu->data[addressing_fields_length+1] + (pdu->data[addressing_fields_length+2] << 8)), pdu->data[addressing_fields_length+3]);
+												}
+										break;
+
+		case CMD_DISASSOCIATION_NOTIFICATION: 	////////////printfUART("Received CMD_DISASSOCIATION_NOTIFICATION\n", ""); 
+												
+												if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+												{
+													build_ack(pdu->seq_num,0);
+												}
+												
+												process_dissassociation_notification(pdu);
+												break;
+		case CMD_DATA_REQUEST: 
+								////printfUART("CMD_DATA_REQUEST\n", ""); 
+									////////printfUART("DR\n", "");
+									if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+									{
+										//TODO
+										//Problems with consecutive reception of messages
+										
+										//build_ack(pdu->seq_num,0);
+									}
+									
+									//cmd_data_request_0_3_reception = (cmd_data_request_0_3 *) pdu->data;
+									
+									source_long_ptr = (source_long *) &pdu->data[0];
+											
+									SrcAddr[1] =source_long_ptr->source_address0;
+									SrcAddr[0] =source_long_ptr->source_address1;
+									
+									send_ind_trans_addr(SrcAddr);
+
+								break;
+		case CMD_PANID_CONFLICT:
+								break;
+								
+		case CMD_ORPHAN_NOTIFICATION:
+									////printfUART("CMD_ORPHAN_NOTIFICATION\n", ""); 
+									
+									source_long_ptr = (source_long *) &pdu->data[DEST_SHORT_LEN];
+											
+									SrcAddr[1] =source_long_ptr->source_address0;
+									SrcAddr[0] =source_long_ptr->source_address1;
+									
+									signal MLME_ORPHAN.indication(SrcAddr, 0x00,0x00);
+								
+		
+								break;
+		case CMD_BEACON_REQUEST:
+								break;
+		case CMD_COORDINATOR_REALIGNMENT:
+									//printfUART("CMD_COORDINATOR_REALIGNMENT\n", ""); 
+									
+									process_coordinator_realignment(pdu);
+									
+								break;
+		case CMD_GTS_REQUEST: 	
+								//////////////printfUART("Received CMD_GTS_REQUEST\n", ""); 
+								if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+								{
+									build_ack(pdu->seq_num,0);
+								}
+								process_gts_request(pdu);
+								break;
+		default: break;
+
+		}
+
+return;
+}
+
+void indication_ack(MPDU *pdu, int8_t ppduLinkQuality)
+{
+	//decrement buffer count
+
+	atomic buffer_count --;
+
+	//////////////printfUART("ACK Received\n",""); 
+	
+	atomic{
+			if (send_ack_check == 1 && ack_sequence_number_check == pdu->seq_num)
+			{
+				//transmission SUCCESS
+				call T_ackwait.stop();
+				
+				send_buffer_count --;
+				send_buffer_msg_out++;
+				
+				//failsafe
+				if(send_buffer_count > SEND_BUFFER_SIZE)
+				{
+					send_buffer_count =0;
+					send_buffer_msg_out=0;
+					send_buffer_msg_in=0;
+				}
+				
+				if (send_buffer_msg_out == SEND_BUFFER_SIZE)
+					send_buffer_msg_out=0;
+				
+				//received an ack for the association request
+				if( associating == 1 && association_cmd_seq_num == pdu->seq_num )
+				{
+					////////////printfUART("ASSOC ACK\n",""); 
+					call T_ResponseWaitTime.startOneShot(response_wait_time);
+					//call T_ResponseWaitTime.start(TIMER_ONE_SHOT, response_wait_time);
+				}
+				
+				if (gts_request == 1 && gts_request_seq_num == pdu->seq_num)
+				{
+				
+					call T_ResponseWaitTime.startOneShot(response_wait_time);
+					//call T_ResponseWaitTime.start(TIMER_ONE_SHOT, response_wait_time);
+				}
+				
+				////////////printfUART("TRANSMISSION SUCCESS\n",""); 
+
+				if (send_indirect_transmission > 0 )
+				{	//the message send was indirect
+					//remove the message from the indirect transmission queue
+					indirect_trans_queue[send_indirect_transmission-1].handler=0x00;
+					indirect_trans_count--;
+					////////////printfUART("SU id:%i ct:%i\n", send_indirect_transmission,indirect_trans_count);
+				}
+				
+				send_ack_check=0;
+				retransmit_count=0;
+				ack_sequence_number_check=0;
+				
+				
+				if (send_buffer_count > 0)
+					post send_frame_csma();
+				
+				
+			}
+		}
+	
+			//CHECK
+		if (get_fc1_frame_pending(pdu->frame_control1) == 1 && pending_request_data ==1)// && associating == 1
+		{		
+				////////////printfUART("Frame_pending\n",""); 
+				pending_request_data=0;
+				create_data_request_cmd();
+		}
+		
+		//GTS mechanism, after the confirmation of the GTS request, must check if the beacon has the gts
+		/*
+		if (gts_ack == 1)
+		{
+			gts_ack=0;
+			gts_confirm=1;
+			call T_ResponseWaitTime.stop();
+		
+		}
+	*/
+		if(gts_send_pending_data==1)
+			post start_gts_send();
+		
+		if(coordinator_gts_send_pending_data==1 && coordinator_gts_send_time_slot == number_time_slot)
+			post start_coordinator_gts_send();
+	
+return;
+}
+
+
+void process_dissassociation_notification(MPDU *pdu)
+{
+atomic{
+		cmd_disassociation_notification *mac_disassociation_notification;
+		
+		//creation of a pointer to the disassociation notification structure
+		mac_disassociation_notification = (cmd_disassociation_notification*) pdu->data;									
+
+		signal MLME_DISASSOCIATE.indication(&mac_disassociation_notification->source_address0, mac_disassociation_notification->disassociation_reason, 0, 0);
+		}
+
+return;
+}
+
+
+
+
+void process_coordinator_realignment(MPDU *pdu)
+{
+
+atomic{
+	cmd_coord_realignment *cmd_realignment = 0;
+	
+	dest_long *dest_long_ptr=0;
+	source_short *source_short_ptr=0;
+
+	cmd_realignment = (cmd_coord_realignment*) &pdu->data[DEST_LONG_LEN + SOURCE_SHORT_LEN];
+	
+	//creation of a pointer the addressing structures
+	dest_long_ptr = (dest_long *) &pdu->data[0];
+	source_short_ptr = (source_short *) &pdu->data[DEST_LONG_LEN];
+		
+	mac_PIB.macCoordShortAddress = ((cmd_realignment->coordinator_short_address0 << 8) | cmd_realignment->coordinator_short_address0 );
+	mac_PIB.macShortAddress = cmd_realignment->short_address;
+	
+	
+	//printfUART("PCR %i %i\n",mac_PIB.macCoordShortAddress,mac_PIB.macShortAddress); 
+	
+	}
+return;
+}
+
+
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+/************************		BUILD FRAMES FUNCTIONS   			**********************************/
+/*****************************************************************************************************/ 
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+
+
+task void create_beacon()
+{
+	int i=0;
+	uint8_t packet_length = 25;
+	int data_count=0;
+	int pending_data_index=0;
+	MPDU* pkt_ptr=0;
+	//pending frames
+	uint8_t short_addr_pending=0;
+	uint8_t long_addr_pending=0;
+		
+	uint8_t gts_directions=0x00;
+	
+	uint16_t frame_control;
+
+	
+	atomic{
+		
+		beacon_addr_short *mac_beacon_addr_short_ptr;
+		//mac_beacon_addr_short_ptr = (beacon_addr_short*) &mac_txmpdu.data[0];
+		mac_beacon_addr_short_ptr = (beacon_addr_short*) &mac_beacon_txmpdu.data[0];
+		//call PLME_SET_TRX_STATE.request(PHY_TX_ON);
+		
+		mac_beacon_txmpdu_ptr->length = 15;
+		
+		frame_control = set_frame_control(TYPE_BEACON,0,0,0,1,SHORT_ADDRESS,SHORT_ADDRESS);
+		
+		mac_beacon_txmpdu_ptr->frame_control1 = (uint8_t)( frame_control);
+		
+		mac_beacon_txmpdu_ptr->frame_control2 = (uint8_t)( frame_control >> 8);
+		
+		//mac_beacon_txmpdu_ptr->frame_control = set_frame_control(TYPE_BEACON,0,0,0,1,SHORT_ADDRESS,SHORT_ADDRESS);
+		mac_beacon_txmpdu_ptr->seq_num = mac_PIB.macBSN;
+		mac_PIB.macBSN++;
+		
+		
+		//relocation error
+		mac_beacon_addr_short_ptr->destination_PAN_identifier= mac_PIB.macPANId;
+		//relocation error
+		mac_beacon_addr_short_ptr->destination_address = 0xffff;
+		//relocation error
+		mac_beacon_addr_short_ptr->source_address = mac_PIB.macShortAddress;
+		if (mac_PIB.macShortAddress == 0x0000)
+		{	//the device is the PAN Coordinator
+			mac_beacon_addr_short_ptr->superframe_specification = set_superframe_specification(mac_PIB.macBeaconOrder,(uint8_t)mac_PIB.macSuperframeOrder,final_CAP_slot,0,1,mac_PIB.macAssociationPermit);
+		}
+		else
+		{
+			mac_beacon_addr_short_ptr->superframe_specification = set_superframe_specification(mac_PIB.macBeaconOrder,(uint8_t)mac_PIB.macSuperframeOrder,final_CAP_slot,0,1,mac_PIB.macAssociationPermit);
+		}
+		
+		mac_beacon_txmpdu_ptr->data[8] = set_gts_specification(GTS_descriptor_count,mac_PIB.macGTSPermit);
+		
+		mac_beacon_txmpdu_ptr->data[9] = set_pending_address_specification(short_addr_pending,long_addr_pending);
+		
+		data_count = 9;
+		packet_length = 15;
+		
+		
+		//BUILDING the GTS DESCRIPTORS
+		if( (GTS_descriptor_count + GTS_null_descriptor_count) > 0 )
+		{
+			data_count++;
+					
+			for(i=0; i< 7 ; i++)
+			{
+				if( GTS_db[i].gts_id != 0x00 && GTS_db[i].DevAddressType != 0x0000) 
+				{
+					
+					mac_beacon_txmpdu_ptr->data[data_count] = GTS_db[i].DevAddressType;
+					//////////////printfUART("B gts %i\n", (GTS_db[i].DevAddressType >> 8 ) ); 
+					
+					data_count++;
+					mac_beacon_txmpdu_ptr->data[data_count] = (GTS_db[i].DevAddressType >> 8 );
+					//////////////printfUART("B gts %i\n",  GTS_db[i].DevAddressType ); 
+					
+					data_count++;
+					
+					mac_beacon_txmpdu_ptr->data[data_count] = set_gts_descriptor(15-i,GTS_db[i].length);
+					data_count++;
+					//////printfUART("B gts %i\n", set_gts_descriptor(GTS_db[i].starting_slot,GTS_db[i].length) ); 
+					
+					packet_length = packet_length + 3;
+					
+					if ( GTS_db[i].direction == 1 )
+					{
+						gts_directions = gts_directions | (1 << i); 
+					}
+					else
+					{
+						gts_directions = gts_directions | (0 << i); 
+					}
+					//////printfUART("dir %i\n", gts_directions); 
+				}
+			}
+			mac_beacon_txmpdu_ptr->data[9] = gts_directions;
+			//CHECK
+			packet_length++;
+			//BUILDING the NULL GTS DESCRIPTORS
+			if ( GTS_null_descriptor_count > 0 )
+			{
+				for(i=0; i< 7 ; i++)
+				{
+					if( GTS_null_db[i].DevAddressType != 0x0000) 
+					{
+						mac_beacon_txmpdu_ptr->data[data_count] = GTS_null_db[i].DevAddressType;
+						//////////////printfUART("B gts %i\n", (GTS_db[i].DevAddressType >> 8 ) ); 
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count] = (GTS_null_db[i].DevAddressType >> 8 );
+						//////////////printfUART("B gts %i\n",  GTS_db[i].DevAddressType ); 
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count] = 0x00;
+						data_count++;
+						//////////////printfUART("B gts %i\n", set_gts_descriptor(GTS_db[i].starting_slot,GTS_db[i].length) ); 
+						packet_length = packet_length +3;
+					}
+				}
+			}
+			//resetting the GTS specification field
+			mac_beacon_txmpdu_ptr->data[8] = set_gts_specification(GTS_descriptor_count + GTS_null_descriptor_count,mac_PIB.macGTSPermit);
+			
+
+		}
+
+			pending_data_index = data_count;
+			data_count++;
+		//IMPLEMENT PENDING ADDRESSES
+		//temporary
+		//indirect_trans_count =0;
+		
+		if (indirect_trans_count > 0 )
+		{
+				//IMPLEMENT THE PENDING ADDRESSES CONSTRUCTION
+
+			for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+			{
+				if (indirect_trans_queue[i].handler > 0x00)
+				{
+					pkt_ptr = (MPDU *)&indirect_trans_queue[i].frame;
+					//ADD INDIRECT TRANSMISSION DESCRIPTOR
+					if(get_fc2_dest_addr(pkt_ptr->frame_control2) == SHORT_ADDRESS)
+					{
+						short_addr_pending++;
+						packet_length = packet_length + 2;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[2];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[3];
+						data_count++;
+					}
+				}
+			}
+			for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+			{
+				if (indirect_trans_queue[i].handler > 0x00)
+				{
+					if(get_fc2_dest_addr(pkt_ptr->frame_control2) == LONG_ADDRESS)
+					{
+						long_addr_pending++;
+						packet_length = packet_length + 8;
+
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[0];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[1];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[2];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[3];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[4];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[5];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[6];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[7];
+						data_count++;
+						
+					}
+				}
+			}
+				
+		}
+		mac_beacon_txmpdu_ptr->data[pending_data_index] = set_pending_address_specification(short_addr_pending,long_addr_pending);
+		
+		
+		//adding the beacon payload
+		if (mac_PIB.macBeaconPayloadLenght > 0 )
+		{
+			for (i=0;i < mac_PIB.macBeaconPayloadLenght;i++)
+			{
+				mac_beacon_txmpdu_ptr->data[data_count] = mac_PIB.macBeaconPayload[i];
+				data_count++;
+				packet_length++;
+			}
+		
+		
+		}
+		
+		//short_addr_pending=0;
+		//long_addr_pending=0;
+		
+		mac_beacon_txmpdu_ptr->length = packet_length;
+		
+		send_beacon_length = packet_length;
+		
+		send_beacon_frame_ptr = (uint8_t*)mac_beacon_txmpdu_ptr;
+		}
+}
+
+
+void create_data_frame(uint8_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[], uint8_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[], uint8_t msduLength, uint8_t msdu[],uint8_t msduHandle, uint8_t TxOptions,uint8_t on_gts_slot,uint8_t pan)
+{
+	
+	int i_indirect_trans=0;
+
+	dest_short *dest_short_ptr;
+	dest_long *dest_long_ptr;
+	
+	source_short *source_short_ptr;
+	source_long *source_long_ptr;
+
+	//intra_pan_source_short *intra_pan_source_short_ptr;
+	//intra_pan_source_long *intra_pan_source_long_ptr;
+	
+	//CHECK
+	uint8_t intra_pan=0;
+	uint8_t data_len=0;
+	
+	uint8_t current_gts_element_count=0;
+	
+	MPDU *frame_pkt=0;
+	
+	uint16_t frame_control;
+	
+	////printfUART("create df\n","");
+	
+	//decision of the buffer where to store de packet creation
+	if (on_gts_slot > 0 )
+	{
+	
+		if (PANCoordinator == 1)
+		{
+		//setting the coordinator gts frame pointer
+			
+			//get the number of frames in the gts_slot_list
+			atomic current_gts_element_count = gts_slot_list[15-on_gts_slot].element_count;
+			
+			////////////printfUART("element count %i\n",gts_slot_list[15-on_gts_slot].element_count);
+			
+			if (current_gts_element_count  == GTS_SEND_BUFFER_SIZE || available_gts_index_count == 0)
+			{
+				////////////printfUART("FULL\n","");
+				signal MCPS_DATA.confirm(0x00, MAC_TRANSACTION_OVERFLOW);
+				return;
+			}
+			else
+			{
+				frame_pkt = (MPDU *) &gts_send_buffer[available_gts_index[available_gts_index_count]];
+			}
+			
+		}
+		else
+		{
+		//setting the device gts frame pointer
+			//////////////printfUART("start creation %i %i %i \n",gts_send_buffer_count,gts_send_buffer_msg_in,gts_send_buffer_msg_out);
+		
+			if(gts_send_buffer_count == GTS_SEND_BUFFER_SIZE)
+			{
+				signal MCPS_DATA.confirm(0x00, MAC_TRANSACTION_OVERFLOW);
+				return;
+			}
+			if (gts_send_buffer_msg_in == GTS_SEND_BUFFER_SIZE)
+				gts_send_buffer_msg_in=0;
+			
+				frame_pkt = (MPDU *) &gts_send_buffer[gts_send_buffer_msg_in];
+		
+		}
+	}
+	else
+	{
+	
+		if ( get_txoptions_indirect_transmission(TxOptions) == 1)
+		{
+			
+			//CREATE THE INDIRECT TRANSMISSION PACKET POINTER
+			//check if the is enough space to store the indirect transaction
+			if (indirect_trans_count == INDIRECT_BUFFER_SIZE)
+			{
+				signal MCPS_DATA.confirm(0x00, MAC_TRANSACTION_OVERFLOW);
+				////////////printfUART("buffer full %i\n", indirect_trans_count);
+				return;
+			}
+			
+			for(i_indirect_trans=0;i_indirect_trans<INDIRECT_BUFFER_SIZE;i_indirect_trans++)
+			{
+				if (indirect_trans_queue[i_indirect_trans].handler == 0x00)
+				{
+					frame_pkt = (MPDU *) &indirect_trans_queue[i_indirect_trans].frame;
+					break;
+				}
+			}
+			
+			
+		}
+		else
+		{
+			//CREATE NORMAL TRANSMISSION PACKET POINTER
+				//////printfUART("sb  %i\n", send_buffer_count);
+			atomic{
+				if ((send_buffer_count +1) > SEND_BUFFER_SIZE)	
+					return;
+			
+				if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+					send_buffer_msg_in=0;
+		
+				frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+				}
+		}
+	}
+	
+atomic{
+
+	if (intra_pan == 0 )
+	{
+	
+		if ( DstAddrMode > 1 && SrcAddrMode > 1 )
+		{
+			// Destination LONG - Source LONG	
+			if (DstAddrMode == LONG_ADDRESS && SrcAddrMode == LONG_ADDRESS)
+			{
+				dest_long_ptr = (dest_long *) &frame_pkt->data[0];
+				source_long_ptr = (source_long *) &frame_pkt->data[DEST_LONG_LEN];
+				
+				dest_long_ptr->destination_PAN_identifier=DestPANId;
+				dest_long_ptr->destination_address0=DstAddr[1];
+				dest_long_ptr->destination_address1=DstAddr[0];
+				
+				source_long_ptr->source_PAN_identifier=SrcPANId;
+				source_long_ptr->source_address0=SrcAddr[1];
+				source_long_ptr->source_address1=SrcAddr[0];
+				
+				data_len = 20;
+			}
+			
+			// Destination SHORT - Source LONG
+			if ( DstAddrMode == SHORT_ADDRESS && SrcAddrMode == LONG_ADDRESS )
+			{
+				dest_short_ptr = (dest_short *) &frame_pkt->data[0];
+				source_long_ptr = (source_long *) &frame_pkt->data[DEST_SHORT_LEN];
+				
+				dest_short_ptr->destination_PAN_identifier=DestPANId;
+				dest_short_ptr->destination_address=(uint16_t)DstAddr[1];
+				
+				source_long_ptr->source_PAN_identifier=SrcPANId;
+				source_long_ptr->source_address0=SrcAddr[1];
+				source_long_ptr->source_address1=SrcAddr[0];
+				
+				data_len = 14;
+			}
+			// Destination LONG - Source SHORT
+			if ( DstAddrMode == LONG_ADDRESS && SrcAddrMode == SHORT_ADDRESS )
+			{
+				dest_long_ptr = (dest_long *) &frame_pkt->data[0];
+				source_short_ptr = (source_short *) &frame_pkt->data[DEST_LONG_LEN];
+				
+				dest_long_ptr->destination_PAN_identifier=DestPANId;
+				dest_long_ptr->destination_address0=DstAddr[1];
+				dest_long_ptr->destination_address1=DstAddr[0];
+				
+				source_short_ptr->source_PAN_identifier=SrcPANId;
+				source_short_ptr->source_address=(uint16_t)SrcAddr[1];
+				
+				data_len = 14;
+			}
+			
+			
+			//Destination SHORT - Source SHORT
+			if ( DstAddrMode == SHORT_ADDRESS && SrcAddrMode == SHORT_ADDRESS )	
+			{
+				dest_short_ptr = (dest_short *) &frame_pkt->data[0];
+				source_short_ptr = (source_short *) &frame_pkt->data[DEST_SHORT_LEN];
+				
+				dest_short_ptr->destination_PAN_identifier=DestPANId;
+				dest_short_ptr->destination_address=(uint16_t)DstAddr[1];
+				
+				source_short_ptr->source_PAN_identifier=SrcPANId;
+				source_short_ptr->source_address=(uint16_t)SrcAddr[1];
+				
+				data_len = 8;
+			}
+		}
+		
+		if ( DstAddrMode == 0 && SrcAddrMode > 1 )
+		{
+				
+			if (SrcAddrMode == LONG_ADDRESS)
+			{//Source LONG
+				source_long_ptr = (source_long *) &frame_pkt->data[0];
+				
+				source_long_ptr->source_PAN_identifier=SrcPANId;
+				source_long_ptr->source_address0=SrcAddr[1];
+				source_long_ptr->source_address1=SrcAddr[0];
+				
+				data_len = 10;
+			}
+			else
+			{//Source SHORT
+
+				source_short_ptr = (source_short *) &frame_pkt->data[0];
+				
+				source_short_ptr->source_PAN_identifier=SrcPANId;
+				source_short_ptr->source_address=(uint16_t)SrcAddr[1];
+				
+				data_len = 4;
+			}
+		}
+		
+		if ( DstAddrMode > 1 && SrcAddrMode == 0 )
+		{
+			if (DstAddrMode == LONG_ADDRESS)
+			{//Destination LONG
+				dest_long_ptr = (dest_long *) &frame_pkt->data[0];
+		
+				dest_long_ptr->destination_PAN_identifier=DestPANId;
+				dest_long_ptr->destination_address0=DstAddr[1];
+				dest_long_ptr->destination_address1=DstAddr[0];
+
+				data_len = 10;
+			}
+			else
+			{//Destination SHORT
+				dest_short_ptr = (dest_short *) &frame_pkt->data[0];
+
+				dest_short_ptr->destination_PAN_identifier=DestPANId;
+				dest_short_ptr->destination_address=(uint16_t)DstAddr[1];
+				
+				data_len = 4;
+			}
+		}
+	}
+	else
+	{
+	//intra_pan == 1
+
+	}
+		
+		memcpy(&frame_pkt->data[data_len],&msdu[0],msduLength*sizeof(uint8_t));
+		
+		if(on_gts_slot > 0)
+		{
+			//preparing a GTS transmission
+			
+			//////////////printfUART("GTS send slt: %i count %i %u\n",on_gts_slot,gts_slot_list[15-on_gts_slot].element_count,mac_PIB.macDSN);
+			frame_pkt->length = data_len + msduLength + MPDU_HEADER_LEN;
+			
+			frame_control = set_frame_control(TYPE_DATA,0,0,1,intra_pan,DstAddrMode,SrcAddrMode);
+			frame_pkt->frame_control1 =(uint8_t)( frame_control);
+			frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+			
+			frame_pkt->seq_num = mac_PIB.macDSN;
+			mac_PIB.macDSN++;
+						
+			//ADDING DATA TO THE GTS BUFFER
+			atomic{
+					if (PANCoordinator == 1)
+					{
+						gts_slot_list[15-on_gts_slot].element_count ++;
+						gts_slot_list[15-on_gts_slot].gts_send_frame_index[gts_slot_list[15-on_gts_slot].element_in] = available_gts_index[available_gts_index_count];
+						//gts_slot_list[15-on_gts_slot].length = frame_pkt->length;
+						
+						gts_slot_list[15-on_gts_slot].element_in ++;
+						
+						if (gts_slot_list[15-on_gts_slot].element_in == GTS_SEND_BUFFER_SIZE)
+							gts_slot_list[15-on_gts_slot].element_in=0;
+						
+						available_gts_index_count --;
+						
+						//current_gts_pending_frame++;
+					}
+					else
+					{
+						gts_send_buffer_count++;
+						gts_send_buffer_msg_in++;
+						//////////////printfUART("end c %i %i %i \n",gts_send_buffer_count,gts_send_buffer_msg_in,gts_send_buffer_msg_out);
+					}
+			}
+		}
+		else
+		{
+			////////////printfUART("CSMA send %i\n", get_txoptions_ack(TxOptions));
+			frame_pkt->length = data_len + msduLength + MPDU_HEADER_LEN;
+			//frame_pkt->frame_control = set_frame_control(TYPE_DATA,0,0,get_txoptions_ack(TxOptions),intra_pan,DstAddrMode,SrcAddrMode);
+			
+			frame_control = set_frame_control(TYPE_DATA,0,0,get_txoptions_ack(TxOptions),intra_pan,DstAddrMode,SrcAddrMode);
+			frame_pkt->frame_control1 =(uint8_t)( frame_control);
+			frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+			
+			frame_pkt->seq_num = mac_PIB.macDSN;
+			
+			////////printfUART("sqn %i\n", mac_PIB.macDSN);
+			
+			mac_PIB.macDSN++;
+			
+			if ( get_txoptions_indirect_transmission(TxOptions) == 1)
+			{
+					indirect_trans_queue[i_indirect_trans].handler = indirect_trans_count + 1;
+					indirect_trans_queue[i_indirect_trans].transaction_persistent_time = 0x0000;
+	
+					indirect_trans_count++;
+	
+					////////////printfUART("ADDED HDL: %i ADDR: %i\n",indirect_trans_count,DstAddr[1]); 
+			}
+			else
+			{
+					//enable retransmissions
+					send_buffer[send_buffer_msg_in].retransmission = 1;
+					send_buffer[send_buffer_msg_in].indirect = 0;
+					
+					send_buffer_count++;
+					
+					send_buffer_msg_in++;
+					
+					post send_frame_csma();
+			}
+			
+		}
+		
+	}
+return;
+}
+
+
+error_t create_association_response_cmd(uint32_t DeviceAddress[],uint16_t shortaddress, uint8_t status)
+{
+
+	cmd_association_response *mac_association_response;
+	dest_long *dest_long_ptr;
+	source_long *source_long_ptr;
+	
+	int i=0;
+	
+	MPDU *frame_pkt=0;
+	
+	uint16_t frame_control;
+	
+	//atomic{
+	/*
+			if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+	
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+	*/
+	
+	//check if the is enough space to store the indirect transaction
+	if (indirect_trans_count == INDIRECT_BUFFER_SIZE)
+	{
+		//printfUART("i full","");
+		return MAC_TRANSACTION_OVERFLOW;
+	}
+	
+	for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+	{
+		if (indirect_trans_queue[i].handler == 0x00)
+		{
+			//memcpy(&indirect_trans_queue[i].frame,frame_ptr,sizeof(MPDU));
+			frame_pkt = (MPDU *) &indirect_trans_queue[i].frame;
+			//printfUART("found slot","");
+			break;
+		}
+	}
+	
+	//creation of a pointer to the association response structure
+	dest_long_ptr = (dest_long *) &frame_pkt->data[0];
+	source_long_ptr = (source_long *) &frame_pkt->data[DEST_LONG_LEN];
+	
+	mac_association_response = (cmd_association_response *) &frame_pkt->data[DEST_LONG_LEN + SOURCE_LONG_LEN];									
+	
+	frame_pkt->length = 29;
+	//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,1,0,LONG_ADDRESS,LONG_ADDRESS);
+	
+	frame_control = set_frame_control(TYPE_CMD,0,0,1,0,LONG_ADDRESS,LONG_ADDRESS);
+	
+	frame_pkt->frame_control1 =(uint8_t)( frame_control);
+	frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+	
+	frame_pkt->seq_num = mac_PIB.macDSN;
+	mac_PIB.macDSN++;
+	
+	dest_long_ptr->destination_PAN_identifier = mac_PIB.macPANId;
+
+	dest_long_ptr->destination_address0 = DeviceAddress[1];
+	dest_long_ptr->destination_address1 = DeviceAddress[0];
+	
+	source_long_ptr->source_PAN_identifier = mac_PIB.macPANId;
+	
+	source_long_ptr->source_address0 = aExtendedAddress0;
+	source_long_ptr->source_address1 = aExtendedAddress1;
+
+	mac_association_response->command_frame_identifier = CMD_ASSOCIATION_RESPONSE;
+	
+	//mac_association_response->short_address = shortaddress;
+	mac_association_response->short_address1 = (uint8_t)(shortaddress);
+	mac_association_response->short_address2 = (uint8_t)(shortaddress >> 8);
+
+
+	mac_association_response->association_status = status;
+/*
+
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+			}	
+		post send_frame_csma();
+*/
+	//printfUART("ASS RESP S: %i\n",shortaddress); 
+
+	indirect_trans_queue[i].handler = indirect_trans_count+1;
+
+	indirect_trans_queue[i].transaction_persistent_time = 0x0000;
+	
+	indirect_trans_count++;
+	
+	//printfUART("IAD\n", "");
+
+return MAC_SUCCESS;
+}
+
+
+void create_association_request_cmd(uint8_t CoordAddrMode,uint16_t CoordPANId,uint32_t CoordAddress[],uint8_t CapabilityInformation)
+{
+atomic{
+
+		cmd_association_request *cmd_association_request_ptr;
+		dest_short *dest_short_ptr;
+		source_long *source_long_ptr;
+	
+		MPDU *frame_pkt=0;
+		
+		uint16_t frame_control;
+		
+		if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+	
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+		
+		//creation of a pointer to the association response structure
+		dest_short_ptr = (dest_short *) &frame_pkt->data[0];
+		source_long_ptr = (source_long *) &frame_pkt->data[DEST_SHORT_LEN];
+		
+		cmd_association_request_ptr = (cmd_association_request *) &send_buffer[send_buffer_msg_in].data[DEST_SHORT_LEN + SOURCE_LONG_LEN];
+		
+		frame_pkt->length = 21;
+		//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,1,0,SHORT_ADDRESS,LONG_ADDRESS);
+		
+		frame_control = set_frame_control(TYPE_CMD,0,0,1,0,SHORT_ADDRESS,LONG_ADDRESS);
+		frame_pkt->frame_control1 =(uint8_t)( frame_control);
+		frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		
+		frame_pkt->seq_num = mac_PIB.macDSN;
+		
+		association_cmd_seq_num =  mac_PIB.macDSN;
+		
+		mac_PIB.macDSN++;
+		
+		//enable retransmissions
+		send_buffer[send_buffer_msg_in].retransmission =1;
+		send_buffer[send_buffer_msg_in].indirect = 0;
+		
+		dest_short_ptr->destination_PAN_identifier = CoordPANId; //mac_PIB.macPANId;
+		
+		if (CoordAddrMode == SHORT_ADDRESS )
+		{
+			dest_short_ptr->destination_address = (uint16_t)(CoordAddress[1] & 0x000000ff) ;  //mac_PIB.macPANId;
+		}
+		else
+		{
+		//CHECK
+		
+		//implement the long address version
+		
+		}
+		
+		source_long_ptr->source_PAN_identifier = 0xffff;
+		
+		source_long_ptr->source_address0 = aExtendedAddress0;
+		source_long_ptr->source_address1 = aExtendedAddress1;
+		
+		cmd_association_request_ptr->command_frame_identifier = CMD_ASSOCIATION_REQUEST;
+		
+		cmd_association_request_ptr->capability_information = CapabilityInformation;
+
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+		
+		pending_request_data=1;
+		
+		//////printfUART("Association request %i %i \n", send_buffer_count,send_buffer_msg_in);
+		
+		
+		post send_frame_csma();
+
+	}
+return;
+}
+
+void create_data_request_cmd()
+{
+	////////////printfUART("create_data_request_cmd\n", ""); 
+
+atomic{
+		//dest_short *dest_short_ptr;
+		source_long *source_long_ptr;
+
+		
+		MPDU *frame_pkt;
+		
+		uint16_t frame_control;
+		
+		if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+	
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+	
+	
+		source_long_ptr= (source_long *) &send_buffer[send_buffer_msg_in].data[0];
+	
+		//creation of a pointer to the association response structure
+		//dest_short_ptr = (dest_short *) &frame_pkt->data[0];
+		source_long_ptr = (source_long *) &frame_pkt->data[0];
+	
+	
+		frame_pkt->length = 16;							
+		//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,1,1,0,LONG_ADDRESS);   //dest | source
+		
+		frame_control = set_frame_control(TYPE_CMD,0,0,1,1,0,LONG_ADDRESS);
+		frame_pkt->frame_control1 =(uint8_t)( frame_control);
+		frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		
+		frame_pkt->seq_num = mac_PIB.macDSN;
+		
+		mac_PIB.macDSN++;
+		
+		//enable retransmissions
+		send_buffer[send_buffer_msg_in].retransmission =1;
+		send_buffer[send_buffer_msg_in].indirect = 0;
+		
+		
+		source_long_ptr->source_PAN_identifier = mac_PIB.macPANId;
+		
+		source_long_ptr->source_address0 = aExtendedAddress0;//aExtendedAddress0;
+		source_long_ptr->source_address1 = aExtendedAddress1;
+		
+		//command_frame_identifier = CMD_DATA_REQUEST;
+		frame_pkt->data[SOURCE_LONG_LEN]=CMD_DATA_REQUEST;
+		
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+				
+		post send_frame_csma();
+		
+		
+		}
+return;
+}
+
+void create_beacon_request_cmd()
+{
+
+atomic{
+		cmd_beacon_request *mac_beacon_request;
+	
+		MPDU *frame_pkt;
+		
+		uint16_t frame_control;
+		
+		if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+	
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+	
+		mac_beacon_request= (cmd_beacon_request*) &send_buffer[send_buffer_msg_in].data;
+	
+		frame_pkt->length = 10;							
+		//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,0,0,SHORT_ADDRESS,0);   //dest | source
+		
+		frame_control = set_frame_control(TYPE_CMD,0,0,0,0,SHORT_ADDRESS,0);
+		frame_pkt->frame_control1 =(uint8_t)( frame_control);
+		frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		
+		frame_pkt->seq_num = mac_PIB.macDSN;
+		
+		mac_PIB.macDSN++;
+		
+		//enable retransmissions
+		send_buffer[send_buffer_msg_in].retransmission =1;
+		send_buffer[send_buffer_msg_in].indirect = 0;
+		
+		mac_beacon_request->destination_PAN_identifier = 0xffff;
+		
+		mac_beacon_request->destination_address = 0xffff;
+	
+		mac_beacon_request->command_frame_identifier = CMD_BEACON_REQUEST;
+		
+		
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+		
+		post send_frame_csma();
+
+		}
+
+return;
+}
+
+void create_orphan_notification()
+{
+
+	atomic{
+	
+		cmd_default *cmd_orphan_notification=0;
+		
+		dest_short *dest_short_ptr=0;
+		source_long *source_long_ptr=0;
+
+		MPDU *frame_pkt=0;
+			
+		uint16_t frame_control=0;
+		
+		if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+	
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+		
+		frame_pkt->length = 20;							
+				
+		cmd_orphan_notification = (cmd_default*) &send_buffer[send_buffer_msg_in].data[DEST_SHORT_LEN + SOURCE_LONG_LEN];
+		
+		//creation of a pointer the addressing structures
+		dest_short_ptr = (dest_short *) &frame_pkt->data[0];
+		source_long_ptr = (source_long *) &frame_pkt->data[DEST_SHORT_LEN];
+		
+		
+		frame_control = set_frame_control(TYPE_CMD,0,0,0,0,SHORT_ADDRESS,LONG_ADDRESS);
+		frame_pkt->frame_control1 =(uint8_t)( frame_control);
+		frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		
+		
+		frame_pkt->seq_num = mac_PIB.macDSN;
+		
+		mac_PIB.macDSN++;
+		
+		
+		dest_short_ptr->destination_PAN_identifier = 0xffff; //mac_PIB.macPANId;
+		
+		dest_short_ptr->destination_address = 0xffff ;  //mac_PIB.macPANId;
+		
+		source_long_ptr->source_PAN_identifier = 0xffff;
+		
+		source_long_ptr->source_address0 = aExtendedAddress0;
+		source_long_ptr->source_address1 = aExtendedAddress1;
+				
+		
+		cmd_orphan_notification->command_frame_identifier = CMD_ORPHAN_NOTIFICATION;
+		
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+		
+		post send_frame_csma();
+	}
+
+return;
+}
+
+
+void create_coordinator_realignment_cmd(uint32_t device_extended0, uint32_t device_extended1, uint16_t device_short_address)
+{
+
+atomic{
+
+	cmd_coord_realignment *cmd_realignment =0;
+	
+	dest_long *dest_long_ptr=0;
+	source_short *source_short_ptr=0;
+	
+	MPDU *frame_pkt=0;
+	
+	uint16_t frame_control=0;
+	
+	if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+		send_buffer_msg_in=0;
+
+	frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+	
+	frame_pkt->length = 27;							
+	//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,0,0,SHORT_ADDRESS,0);   //dest | source
+	
+	cmd_realignment = (cmd_coord_realignment*) &send_buffer[send_buffer_msg_in].data[DEST_LONG_LEN + SOURCE_SHORT_LEN];
+	
+	//creation of a pointer the addressing structures
+	dest_long_ptr = (dest_long *) &frame_pkt->data[0];
+	source_short_ptr = (source_short *) &frame_pkt->data[DEST_LONG_LEN];
+
+	
+	frame_control = set_frame_control(TYPE_CMD,0,0,0,0,LONG_ADDRESS,SHORT_ADDRESS);
+	frame_pkt->frame_control1 =(uint8_t)( frame_control);
+	frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		
+	frame_pkt->seq_num = mac_PIB.macDSN;
+	
+	mac_PIB.macDSN++;
+	
+	dest_long_ptr->destination_PAN_identifier = 0xffff;
+	dest_long_ptr->destination_address0 = device_extended0;
+	dest_long_ptr->destination_address1 = device_extended1;
+	
+	source_short_ptr->source_PAN_identifier = mac_PIB.macPANId;
+	source_short_ptr->source_address = mac_PIB.macCoordShortAddress;
+	
+	
+	cmd_realignment->command_frame_identifier = CMD_COORDINATOR_REALIGNMENT;
+	
+	mac_PIB.macPANId = 0x1234;
+	
+	mac_PIB.macCoordShortAddress =0x0000;
+	
+	cmd_realignment->PAN_identifier0 = (mac_PIB.macPANId);
+	cmd_realignment->PAN_identifier1 = (mac_PIB.macPANId >> 8);
+
+	cmd_realignment->coordinator_short_address0 = (mac_PIB.macCoordShortAddress);
+	cmd_realignment->coordinator_short_address1 = (mac_PIB.macCoordShortAddress >> 8);
+	
+	cmd_realignment->logical_channel = LOGICAL_CHANNEL;
+	cmd_realignment->short_address = device_short_address;
+
+	
+	//increment the send buffer variables
+	send_buffer_count++;
+	send_buffer_msg_in++;
+	
+	post send_frame_csma();
+
+	}
+
+return;
+}
+
+
+void create_gts_request_cmd(uint8_t gts_characteristics)
+{
+atomic{
+		cmd_gts_request *mac_gts_request;
+		
+		MPDU *frame_pkt;
+		
+		uint16_t frame_control;
+		//////printfUART("create_gts_request_cmd\n", "");
+		
+		
+		if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+		
+		mac_gts_request= (cmd_gts_request*) &send_buffer[send_buffer_msg_in].data;
+
+		frame_pkt->length = 11;
+	
+		if ( get_characteristic_type(gts_characteristics) != 0 )
+		{   
+			//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,1,1,0,SHORT_ADDRESS);   //dest | source
+		
+			frame_control = set_frame_control(TYPE_CMD,0,0,1,1,0,SHORT_ADDRESS); 
+			frame_pkt->frame_control1 =(uint8_t)( frame_control);
+			frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		}
+		else
+		{	
+			//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,1,1,0,SHORT_ADDRESS);
+			
+			frame_control = set_frame_control(TYPE_CMD,0,0,1,1,0,SHORT_ADDRESS);
+			frame_pkt->frame_control1 =(uint8_t)( frame_control);
+			frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		}
+		
+		frame_pkt->seq_num = mac_PIB.macDSN;
+		
+		gts_request_seq_num = frame_pkt->seq_num;
+		
+		mac_PIB.macDSN++;
+		
+		//enable retransmissions
+		send_buffer[send_buffer_msg_in].retransmission =1;
+		send_buffer[send_buffer_msg_in].indirect = 0;
+		
+		//mac_gts_request->source_PAN_identifier = 0x0001;
+		mac_gts_request->source_PAN_identifier = mac_PIB.macPANId;
+		
+		mac_gts_request->source_address = mac_PIB.macShortAddress;
+	
+		mac_gts_request->command_frame_identifier = CMD_GTS_REQUEST;
+		
+		//mac_gts_request->gts_characteristics = set_gts_characteristics(2,1,1);
+		mac_gts_request->gts_characteristics =gts_characteristics;
+		
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+		
+		post send_frame_csma();
+		
+		}
+
+return;
+}
+
+void create_disassociation_notification_cmd(uint32_t DeviceAddress[],uint8_t disassociation_reason)
+{
+
+	atomic{
+		cmd_disassociation_notification *mac_disassociation_notification;
+		MPDU *frame_pkt;
+		
+		uint16_t frame_control;
+		
+		if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+	
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+		
+		//creation of a pointer to the disassociation notification structure
+		mac_disassociation_notification = (cmd_disassociation_notification*) &send_buffer[send_buffer_msg_in].data;								
+		
+		
+		frame_pkt->length = 27;
+		
+		//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,1,0,LONG_ADDRESS,LONG_ADDRESS);
+		
+		frame_control = set_frame_control(TYPE_CMD,0,0,1,0,LONG_ADDRESS,LONG_ADDRESS);
+		frame_pkt->frame_control1 =(uint8_t)( frame_control);
+		frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		
+		frame_pkt->seq_num = mac_PIB.macDSN;
+		
+		mac_PIB.macDSN++;
+		
+		//enable retransmissions
+		send_buffer[send_buffer_msg_in].retransmission =1;
+		send_buffer[send_buffer_msg_in].indirect = 0;
+		
+		mac_disassociation_notification->destination_PAN_identifier = mac_PIB.macPANId;
+
+		mac_disassociation_notification->destination_address0 = DeviceAddress[0];
+		mac_disassociation_notification->destination_address1 = DeviceAddress[1];
+	
+		mac_disassociation_notification->source_PAN_identifier = mac_PIB.macPANId;
+	
+		mac_disassociation_notification->source_address0 = aExtendedAddress0;
+		mac_disassociation_notification->source_address1 = aExtendedAddress1;
+	
+		mac_disassociation_notification->command_frame_identifier = CMD_DISASSOCIATION_NOTIFICATION;
+		
+		mac_disassociation_notification->disassociation_reason = disassociation_reason;
+		
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+		
+		post send_frame_csma();
+
+	}
+return;
+}
+
+
+
+void build_ack(uint8_t sequence,uint8_t frame_pending)
+{
+	uint16_t frame_control;
+	atomic{
+			mac_ack_ptr->length = ACK_LENGTH;
+			//mac_ack_ptr->frame_control = set_frame_control(TYPE_ACK,0,frame_pending,0,0,0,0);
+			
+			frame_control = set_frame_control(TYPE_ACK,0,frame_pending,0,0,0,0);
+			mac_ack_ptr->frame_control1 =(uint8_t)( frame_control);
+			mac_ack_ptr->frame_control2 =(uint8_t)( frame_control >> 8);
+			
+			mac_ack_ptr->seq_num = sequence;
+			
+			call PD_DATA.request(mac_ack_ptr->length,(uint8_t*)mac_ack_ptr);
+	}
+}
+
+
+
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+/************************		INTERFACES PROVIDED   			**********************************/
+/*****************************************************************************************************/ 
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+
+/*********************************************************/
+/**************MLME_SCAN********************************/
+/*********************************************************/
+
+task void data_channel_scan_indication()
+{
+	uint8_t link_qual;
+	
+	beacon_addr_short *beacon_ptr;
+	
+	////printfUART("data_channel_scan_indication\n","");
+
+	atomic link_qual = link_quality;
+
+	atomic buffer_count--;
+
+	switch(scan_type)
+	{
+		case ED_SCAN: 
+						if (scanned_values[current_scanning-1] < link_qual)
+								scanned_values[current_scanning-1] = link_qual;
+						break;
+		
+		case ACTIVE_SCAN:break;
+					
+		case PASSIVE_SCAN: 
+							switch( (buffer_msg[current_msg_out].frame_control1 & 0x7) )
+							{
+								case TYPE_BEACON:
+								printfUART("3 ps rb\n","");
+								beacon_ptr = (beacon_addr_short*) (&buffer_msg[current_msg_out].data);
+
+								//Beacon NOTIFICATION
+								//BUILD the PAN descriptor of the COORDINATOR
+								//assuming that the adress is short
+								scan_pans[current_scanning-1].CoordPANId = beacon_ptr->destination_PAN_identifier;
+								scan_pans[current_scanning-1].CoordAddress=beacon_ptr->source_address;
+								scan_pans[current_scanning-1].LogicalChannel=current_channel;
+								//superframe specification field
+								scan_pans[current_scanning-1].SuperframeSpec = beacon_ptr->superframe_specification;
+								
+								if (scan_pans[current_scanning-1].lqi < link_qual)
+								scan_pans[current_scanning-1].lqi = link_qual;
+							
+								break;
+								
+								default: break;
+							//atomic buffer_count--;
+							//////////////printfUART("Invalid frame type\n","");
+
+							}
+							break;
+		case ORPHAN_SCAN: 
+							////printfUART("osrm\n","");
+							switch( (buffer_msg[current_msg_out].frame_control1 & 0x7) )
+							{
+								case TYPE_CMD:
+										////printfUART("received cmd\n","");
+										if (buffer_msg[current_msg_out].data[SOURCE_SHORT_LEN+ DEST_LONG_LEN] == CMD_COORDINATOR_REALIGNMENT)
+										{	
+											//printfUART("pf\n","");
+											atomic scanning_channels = 0;
+											call T_ScanDuration.stop();
+											process_coordinator_realignment(&buffer_msg[current_msg_out]);
+											
+										}
+										
+										break;
+							default: break;
+							}
+							break;
+		
+	}
+	
+	atomic{
+			current_msg_out++;
+		if ( current_msg_out == RECEIVE_BUFFER_SIZE )	
+			current_msg_out = 0;
+		}
+return;
+}
+/*******************T_ScanDuration**************************/
+event void T_ScanDuration.fired() {
+
+	current_scanning++;
+	
+	printfUART("cs%i c%i\n",current_scanning,(0x0A + current_scanning));
+						
+	call PLME_SET.request(PHYCURRENTCHANNEL, (0x0A + current_scanning));
+
+	current_channel = (0x0A + current_scanning);
+	
+
+	if (current_scanning == 16 )
+	{
+		////printfUART("scan end\n","");
+		
+		atomic scanning_channels = 0;
+		
+		switch(scan_type)
+		{
+			case ED_SCAN: 
+							signal MLME_SCAN.confirm(MAC_SUCCESS,scan_type, 0x00, 16 , scanned_values,0x00);
+							break;
+			
+			case ACTIVE_SCAN:break;
+
+			case PASSIVE_SCAN: 
+							//event result_t confirm(uint8_t status,uint8_t ScanType, uint32_t UnscannedChannels, uint8_t ResultListSize, uint8_t EnergyDetectList[], SCAN_PANDescriptor PANDescriptorList[]);
+							signal MLME_SCAN.confirm(MAC_SUCCESS,scan_type, 0x00, 16 , 0x00, scan_pans);
+							break;
+			
+			case ORPHAN_SCAN: 
+							//orphan scan
+							//send opphan command on every channel directed to the current PAN coordinator
+							//printfUART("oph s end not found\n","");
+							signal MLME_SCAN.confirm(MAC_SUCCESS,scan_type, 0x00, 16 , 0x00, scan_pans);
+							
+							break;
+		}
+	}
+	else
+	{
+		switch(scan_type)
+		{
+			case ORPHAN_SCAN:	//printfUART("con\n","");
+								create_orphan_notification();
+								break;
+		}
+		
+		call T_ScanDuration.startOneShot(scan_duration);
+	}
+  
+}
+
+
+
+command error_t MLME_SCAN.request(uint8_t ScanType, uint32_t ScanChannels, uint8_t ScanDuration)
+{
+//pag 93
+	//printfUART("MLME_SCAN.request\n", ""); 
+		
+	atomic scanning_channels = 1;
+	scan_type = ScanType;
+	channels_to_scan = ScanChannels;
+	
+	atomic current_scanning=0;
+	
+	
+	switch(ScanType)
+	{
+		//ED SCAN only FFD			
+		case ED_SCAN:	
+					call TimerAsync.set_timers_enable(0x00);
+					/*
+				
+					scanning_channels = 1;
+					scan_type = ScanType;
+					current_scanning=0;
+					scan_count=0;
+					channels_to_scan = ScanChannels;
+					scan_duration = ((aBaseSuperframeDuration * pow(2,ScanDuration)) * 4.0) / 250.0;
+					
+					////////////printfUART("channels_to_scan %y scan_duration %y\n", channels_to_scan,scan_duration); 
+					
+					call T_ed_scan.start(TIMER_REPEAT,1);
+					
+					call T_scan_duration.start(TIMER_ONE_SHOT,scan_duration);	
+					*/
+					
+					
+					//calculate the scan_duration in miliseconds
+					//#ifdef PLATFORM_MICAZ
+						scan_duration = ((aBaseSuperframeDuration * (powf(2,ScanDuration)+1)) * EFFECTIVE_SYMBOL_VALUE) / 1000.0;
+					//#else
+					//	scan_duration = ((aBaseSuperframeDuration * (powf(2,ScanDuration)+1)) * EFFECTIVE_SYMBOL_VALUE) / 1000.0;
+					//#endif
+			//scan_duration = 2000;
+					
+					call T_ScanDuration.startOneShot(scan_duration);
+					
+					////printfUART("channels_to_scan %y scan_duration %y\n", channels_to_scan,scan_duration); 
+					break;
+		//active scan only FFD
+		case ACTIVE_SCAN:
+					call TimerAsync.set_timers_enable(0x00);
+					break;
+		//passive scan
+		case PASSIVE_SCAN:	
+					call TimerAsync.set_timers_enable(0x00);
+							
+					//calculate the scan_duration in miliseconds
+					//#ifdef PLATFORM_MICAZ
+					//	scan_duration = ((aBaseSuperframeDuration * (powf(2,ScanDuration)+1)) * EFFECTIVE_SYMBOL_VALUE) / 1000.0;
+					//#else
+					//	scan_duration = ((aBaseSuperframeDuration * (powf(2,ScanDuration)+1)) * EFFECTIVE_SYMBOL_VALUE) / 1000.0;
+					//#endif
+					
+					
+					//defines the time (miliseconds) that the device listen in each channel
+					scan_duration = 2000;
+					
+					//printfUART("channels_to_scan %y scan_duration %i\n", channels_to_scan,scan_duration); 
+					
+					call T_ScanDuration.startOneShot(scan_duration);
+					
+					////printfUART("channels_to_scan %y scan_duration %i\n", channels_to_scan,scan_duration); 
+					
+					//atomic trx_status = PHY_RX_ON;
+					//call PLME_SET_TRX_STATE.request(PHY_RX_ON); 
+		
+		
+		
+					break;
+		//orphan scan
+		case ORPHAN_SCAN:
+		
+					call TimerAsync.set_timers_enable(0x01);
+					
+				    scan_duration = 4000;
+					
+					//printfUART("orphan cts %y sdur %i\n", channels_to_scan,scan_duration); 
+					
+					call T_ScanDuration.startOneShot(scan_duration);
+
+					break;
+	
+		default:
+					break;
+	}
+
+return SUCCESS;
+}
+
+
+
+/*********************************************************/
+/**************MLME_ORPHAN********************************/
+/*********************************************************/
+
+command error_t MLME_ORPHAN.response(uint32_t OrphanAddress[1],uint16_t ShortAddress,uint8_t AssociatedMember, uint8_t security_enabled)
+{
+
+	if (AssociatedMember==0x01)
+	{
+		create_coordinator_realignment_cmd(OrphanAddress[0], OrphanAddress[1], ShortAddress);
+	}
+	
+return SUCCESS;
+}
+
+/*********************************************************/
+/**************MLME_SYNC********************************/
+/*********************************************************/
+
+
+command error_t MLME_SYNC.request(uint8_t logical_channel,uint8_t track_beacon)
+{
+
+call PLME_SET.request(PHYCURRENTCHANNEL,LOGICAL_CHANNEL);	
+	//call PLME_SET.request(PHYCURRENTCHANNEL,logical_channel);	
+	
+	call TimerAsync.set_timers_enable(0x01);
+	
+	//printfUART("sync req\n", ""); 
+	
+	atomic findabeacon = 1;
+
+return SUCCESS;
+}
+
+/*********************************************************/
+/**************MLME_RESET********************************/
+/*********************************************************/
+
+
+command error_t MLME_RESET.request(uint8_t set_default_PIB)
+{
+
+
+return SUCCESS;
+}
+
+/*********************************************************/
+/**************MLME_GTS***********************************/
+/*********************************************************/
+
+command error_t MLME_GTS.request(uint8_t GTSCharacteristics, bool security_enable)
+{
+
+	//uint32_t wait_time;
+	//if there is no short address asigned the node cannot send a GTS request
+	if (mac_PIB.macShortAddress == 0xffff)
+			signal MLME_GTS.confirm(GTSCharacteristics,MAC_NO_SHORT_ADDRESS);
+	
+	//gts_ack=1;
+	
+	gts_request =1;
+	
+	create_gts_request_cmd(GTSCharacteristics);
+
+return SUCCESS;
+}
+
+
+/*********************************************************/
+/**************MLME_START*********************************/
+/*********************************************************/
+
+command error_t MLME_START.request(uint32_t PANId, uint8_t LogicalChannel, uint8_t beacon_order, uint8_t superframe_order,bool pan_coodinator,bool BatteryLifeExtension,bool CoordRealignment,bool securityenable,uint32_t StartTime)
+{
+
+	uint32_t BO_EXPONENT;
+	uint32_t SO_EXPONENT;
+
+	//////////printfUART("MLME_START.request\n", "");
+	//pag 102
+	atomic {
+	PANCoordinator=1;
+	Beacon_enabled_PAN=1;
+	//TEST
+	//atomic mac_PIB.macShortAddress = 0x0000;
+
+
+		if ( mac_PIB.macShortAddress == 0xffff)
+		{
+		
+			signal MLME_START.confirm(MAC_NO_SHORT_ADDRESS);
+			return SUCCESS;
+		}
+		else
+		{
+			atomic mac_PIB.macBeaconOrder = beacon_order;
+			
+			if (beacon_order == 15) 
+				atomic mac_PIB.macSuperframeOrder = 15;
+			else
+				atomic mac_PIB.macSuperframeOrder = superframe_order;
+		
+		
+			//PANCoordinator is set to TRUE
+			if (pan_coodinator == 1)
+			{
+				atomic mac_PIB.macPANId = PANId;
+				call PLME_SET.request(PHYCURRENTCHANNEL,LogicalChannel);
+			}
+			if (CoordRealignment == 1)
+			{
+				//generates and broadcasts a coordinator realignment command containing the new PANId and LogicalChannels
+			}
+			if (securityenable == 1)
+			{
+			//security parameters
+			}
+		}
+	
+		if (mac_PIB.macSuperframeOrder == 0)
+			SO_EXPONENT = 1;
+		else
+		{
+			SO_EXPONENT = powf(2,mac_PIB.macSuperframeOrder);
+		
+		}
+		if ( mac_PIB.macBeaconOrder == 0)
+			BO_EXPONENT = 1;
+		else
+		{
+			BO_EXPONENT = powf(2,mac_PIB.macBeaconOrder);
+		
+		}	
+	}
+	
+	BI = aBaseSuperframeDuration * BO_EXPONENT; 
+		
+	SD = aBaseSuperframeDuration * SO_EXPONENT; 
+	//backoff_period
+	backoff = aUnitBackoffPeriod;
+
+	
+	atomic time_slot = SD / NUMBER_TIME_SLOTS;
+
+	call TimerAsync.set_backoff_symbols(backoff);
+
+	call TimerAsync.set_bi_sd(BI,SD);
+	
+	atomic{
+	
+		call TimerAsync.set_timers_enable(0x01);
+		
+		call TimerAsync.reset();
+		
+	}
+		
+	signal MLME_START.confirm(MAC_SUCCESS);
+
+	return SUCCESS;
+}
+
+/*************************************************************/
+/**************MLME_ASSOCIATE*********************************/
+/*************************************************************/
+
+command error_t MLME_ASSOCIATE.request(uint8_t LogicalChannel,uint8_t CoordAddrMode,uint16_t CoordPANId,uint32_t CoordAddress[],uint8_t CapabilityInformation,bool securityenable)
+{
+	//update current channel
+	//call PLME_SET.request(PHYCURRENTCHANNEL,LogicalChannel);
+	
+	
+	printfUART("MLME_ASSOCIATE.request %x %x\n", mac_PIB.macPANId,mac_PIB.macCoordShortAddress);
+	//updates the PAN ID
+	atomic{ 
+		mac_PIB.macPANId = CoordPANId;
+		mac_PIB.macCoordShortAddress = (uint16_t)(CoordAddress[1] & 0x000000ff);
+		}
+		
+		
+	associating=1; //boolean variable stating that the device is trying to associate
+	
+	call TimerAsync.set_timers_enable(1);
+	
+	//the channel selection is made during the SynC procedure
+	//call PLME_SET.request(PHYCURRENTCHANNEL, LogicalChannel);
+
+	current_channel = LogicalChannel;
+	
+	////printfUART("SELECTED cord id %i\n", mac_PIB.macPANId);
+	////printfUART("CoordAddress %i\n", mac_PIB.macCoordShortAddress);
+	////printfUART("LogicalChannel %i\n", LogicalChannel);
+	////printfUART("Cordaddr %i\n",CoordAddress[0]);
+	////printfUART("Cordaddr %i\n",CoordAddress[1]);
+	/*
+
+	a_CoordAddrMode = CoordAddrMode;
+	a_CoordPANId=CoordPANId;
+	a_CoordAddress[0]=CoordAddress[0];
+	a_CoordAddress[1]=CoordAddress[1];
+	a_CapabilityInformation=CapabilityInformation;
+	a_securityenable=securityenable;
+	*/
+	create_association_request_cmd(CoordAddrMode,CoordPANId,CoordAddress,CapabilityInformation);
+	
+	return SUCCESS;
+}
+
+command error_t MLME_ASSOCIATE.response(uint32_t DeviceAddress[], uint16_t AssocShortAddress, uint8_t status, bool securityenable)
+{
+	
+	error_t status_response;
+	
+	////////printfUART("MAR\n", "");
+	
+	status_response = create_association_response_cmd(DeviceAddress,AssocShortAddress,status);
+	//////////////printfUART("MLME_ASSOCIATE.response\n", "");
+
+
+return SUCCESS;
+}
+
+/*************************************************************/
+/**************MLME_DISASSOCIATE*********************************/
+/*************************************************************/
+
+command error_t MLME_DISASSOCIATE.request(uint32_t DeviceAddress[], uint8_t disassociate_reason, bool securityenable)
+{
+	create_disassociation_notification_cmd(DeviceAddress,disassociate_reason);
+return SUCCESS;
+}
+
+/*********************************************************/
+/**************MLME_GET***********************************/
+/*********************************************************/
+command error_t MLME_GET.request(uint8_t PIBAttribute)
+{
+
+	switch(PIBAttribute)
+	{
+		case MACACKWAITDURATION :		signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macAckWaitDuration);
+										break;
+		case MACASSOCIATIONPERMIT:  	signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macAssociationPermit);
+										break;
+		case MACAUTOREQUEST : 			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macAutoRequest);
+										break;
+		case MACBATTLIFEEXT:			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macBattLifeExt);
+										break;
+		case MACBATTLIFEEXTPERIODS:		signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macBattLifeExtPeriods);
+										break;
+		case MACBEACONPAYLOAD:			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute, mac_PIB.macBeaconPayload);
+										break;
+		case MACMAXBEACONPAYLOADLENGTH:	signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macBeaconPayloadLenght);
+										break;
+		case MACBEACONORDER:			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macBeaconOrder);
+										break;
+		case MACBEACONTXTIME:			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,(uint8_t *)&mac_PIB.macBeaconTxTime);
+										break;
+		case MACBSN:					signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macBSN);
+										break;
+		case MACCOORDEXTENDEDADDRESS:	signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,(uint8_t *) &mac_PIB.macCoordExtendedAddress0);
+										break;
+		case MACCOORDSHORTADDRESS:		signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,(uint8_t *) &mac_PIB.macCoordShortAddress);
+										break;
+		case MACDSN:					signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macDSN);
+										break;
+		case MACGTSPERMIT:				signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macGTSPermit);
+										break;
+		case MACMAXCSMABACKOFFS:		signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macMaxCSMABackoffs);
+										break;
+		case MACMINBE:					signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macMinBE);
+										break;
+		case MACPANID:					signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,(uint8_t *) &mac_PIB.macPANId);
+										break;
+		case MACPROMISCUOUSMODE:		signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macPromiscuousMode);
+										break;
+		case MACRXONWHENIDLE:			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macRxOnWhenIdle);
+										break;
+		case MACSHORTADDRESS:			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,(uint8_t *) &mac_PIB.macShortAddress);
+										break;
+		case MACSUPERFRAMEORDER:		signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macSuperframeOrder);
+										break;
+		case MACTRANSACTIONPERSISTENCETIME:	signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,(uint8_t *) &mac_PIB.macTransactionPersistenceTime);
+											break;
+											
+		default:						signal MLME_GET.confirm(MAC_UNSUPPORTED_ATTRIBUTE,PIBAttribute,0x00);
+										break;
+	}
+
+return SUCCESS;
+}
+
+/*********************************************************/
+/**************MLME_SET***********************************/
+/*********************************************************/
+command error_t MLME_SET.request(uint8_t PIBAttribute,uint8_t PIBAttributeValue[])
+{
+
+//int i;
+
+////printfUART("set %i\n",PIBAttribute);
+
+atomic{
+
+	switch(PIBAttribute)
+	{
+	
+	
+		case MACACKWAITDURATION :		mac_PIB.macAckWaitDuration = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macAckWaitDuration: %x\n",mac_PIB.macAckWaitDuration);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+									
+		case MACASSOCIATIONPERMIT:  	if ((uint8_t)PIBAttributeValue[1] == 0x00)
+										{
+											mac_PIB.macAssociationPermit = 0x00;
+										}
+										else
+										{
+											mac_PIB.macAssociationPermit = 0x01;
+										}
+										//////////printfUART("mac_PIB.macAssociationPermit: %i %y\n",mac_PIB.macAssociationPermit,PIBAttributeValue[1]);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+		case MACAUTOREQUEST : 			mac_PIB.macAutoRequest = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macAutoRequest: %i\n",mac_PIB.macAutoRequest);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+		case MACBATTLIFEEXT:			mac_PIB.macBattLifeExt = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macBattLifeExt %i\n",mac_PIB.macBattLifeExt);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACBATTLIFEEXTPERIODS:		mac_PIB.macBattLifeExtPeriods = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macBattLifeExtPeriods %i\n",mac_PIB.macBattLifeExtPeriods);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+		case MACBEACONPAYLOAD:			/*for(i=0;i < mac_PIB.macBeaconPayloadLenght;i++) 
+										{
+											mac_PIB.macBeaconPayload[i] = PIBAttributeValue[i];
+										}*/
+									
+										memcpy(&PIBAttributeValue[0],&mac_PIB.macBeaconPayload[0],mac_PIB.macBeaconPayloadLenght * sizeof(uint8_t));
+										
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+				
+		case MACMAXBEACONPAYLOADLENGTH:	mac_PIB.macBeaconPayloadLenght = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macBeaconPayloadLenght %i\n",mac_PIB.macBeaconPayloadLenght);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+		case MACBEACONORDER:			mac_PIB.macBeaconOrder = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macBeaconOrder %i\n",mac_PIB.macBeaconOrder);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACBEACONTXTIME:			mac_PIB.macBeaconTxTime =PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macBeaconTxTime %i\n",mac_PIB.macBeaconTxTime);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACBSN:					mac_PIB.macBSN = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macBSN %i\n",mac_PIB.macBSN);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+
+		case MACCOORDEXTENDEDADDRESS:	//mac_PIB.macCoordExtendedAddress0 = ((PIBAttributeValue[0] >> 24) | (PIBAttributeValue[1] >> 16) | (PIBAttributeValue[2] >> 8) | (PIBAttributeValue[3])) ;
+										//mac_PIB.macCoordExtendedAddress1 = ((PIBAttributeValue[4] >> 24) | (PIBAttributeValue[5] >> 16) | (PIBAttributeValue[6] >> 8) | (PIBAttributeValue[7]));
+
+										////////////printfUART("mac_PIB.macCoordExtendedAddress0 %y\n",mac_PIB.macCoordExtendedAddress0);
+										////////////printfUART("mac_PIB.macCoordExtendedAddress1 %y\n",mac_PIB.macCoordExtendedAddress1);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+									
+		case MACCOORDSHORTADDRESS:		mac_PIB.macCoordShortAddress= ((PIBAttributeValue[0] << 8) |PIBAttributeValue[1]);
+										////printfUART("mac_PIB.macCoordShortAddress: %x\n",mac_PIB.macCoordShortAddress);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		
+		case MACDSN:					mac_PIB.macDSN = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macDSN: %x\n",mac_PIB.macDSN);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACGTSPERMIT:				mac_PIB.macGTSPermit = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macGTSPermit: %x\n",mac_PIB.macGTSPermit);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACMAXCSMABACKOFFS:		mac_PIB.macMaxCSMABackoffs = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macMaxCSMABackoffs: %x\n",mac_PIB.macMaxCSMABackoffs);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACMINBE:					mac_PIB.macMinBE = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macMinBE: %x\n",mac_PIB.macMinBE);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		
+		case MACPANID:					mac_PIB.macPANId = ((PIBAttributeValue[0] << 8)| PIBAttributeValue[1]);
+										////printfUART("mac_PIB.macPANId: %x\n",mac_PIB.macPANId);
+										
+										
+										call AddressFilter.set_coord_address(mac_PIB.macCoordShortAddress, mac_PIB.macPANId);
+										
+										
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		
+		case MACPROMISCUOUSMODE:		mac_PIB.macPromiscuousMode = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macPromiscuousMode: %x\n",mac_PIB.macPromiscuousMode);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACRXONWHENIDLE:			mac_PIB.macRxOnWhenIdle = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macRxOnWhenIdle: %x\n",mac_PIB.macRxOnWhenIdle);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+										
+		case MACSHORTADDRESS:			mac_PIB.macShortAddress = ((PIBAttributeValue[0] << 8) |PIBAttributeValue[1]);
+										////printfUART("mac_PIB.macShortAddress: %y\n",mac_PIB.macShortAddress);
+										
+										call AddressFilter.set_address(mac_PIB.macShortAddress, aExtendedAddress0, aExtendedAddress0);
+										
+										
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+		case MACSUPERFRAMEORDER:		mac_PIB.macSuperframeOrder = PIBAttributeValue[0];
+										////////////printfUART("mac_PIB.macSuperframeOrder: %x\n",mac_PIB.macSuperframeOrder);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+		case MACTRANSACTIONPERSISTENCETIME:	 mac_PIB.macTransactionPersistenceTime = PIBAttributeValue[0];
+											 ////////////printfUART("mac_PIB.macTransactionPersistenceTime: %y\n",mac_PIB.macTransactionPersistenceTime);
+											 signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+											 break;
+											
+		default:						signal MLME_SET.confirm(MAC_UNSUPPORTED_ATTRIBUTE,PIBAttribute);
+										break;
+										
+		
+	}
+
+}
+
+return SUCCESS;
+}
+/*************************************************************/
+/**************        MCPS - DATA         *******************/
+/*************************************************************/
+
+command error_t MCPS_DATA.request(uint8_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[], uint8_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[], uint8_t msduLength, uint8_t msdu[],uint8_t msduHandle, uint8_t TxOptions)
+{
+	int i;
+	//uint8_t valid_gts=0;
+	uint32_t total_ticks;
+	
+	////////printfUART("MCPS_DATA.request\n", ""); 
+	//check conditions on page 58
+	
+	//atomic mac_PIB.macShortAddress = TOS_LOCAL_ADDRESS;
+	
+	/*
+	////printfUART("SrcAddrMode %x\n", SrcAddrMode);
+	////printfUART("SrcPANId %x\n", SrcPANId);
+	////printfUART("SrcAddr %x\n", SrcAddr[0]);
+	////printfUART("SrcAddr %x\n", SrcAddr[1]);
+	////printfUART("DstAddrMode %x\n", DstAddrMode);
+	////printfUART("DestPANId %x\n", DestPANId);
+	////printfUART("DstAddr %x\n", DstAddr[0]);
+	////printfUART("DstAddr %x\n", DstAddr[1]);
+	////printfUART("msduLength %x\n", msduLength);
+	////printfUART("msduHandle %x\n", msduHandle);
+	////printfUART("TxOptions %x\n", TxOptions);
+		*/
+	
+	atomic{
+	
+	if (mac_PIB.macShortAddress == 0xffff)
+		return FAIL;
+	}
+	
+	if(PANCoordinator == 1)
+	{
+	//PAN COORDINATOR OPERATION
+		//////////////printfUART("GTS TRANS: %i TxOptions: %u dest:%u\n", get_txoptions_gts(TxOptions),TxOptions,DstAddr[1]); 
+		
+		if (get_txoptions_gts(TxOptions) == 1)
+		{
+		//GTS TRANSMISSION
+			for (i=0 ; i < 7 ; i++)
+			{
+				//SEARCH FOR A VALID GTS
+				if ( GTS_db[i].DevAddressType == (uint16_t)DstAddr[1] && GTS_db[i].direction == 1 && GTS_db[i].gts_id != 0)
+				{
+					
+				//atomic{
+						//////////////printfUART("BUFFER UNTIL GTS SLOT n: %i ss: %i\n",number_time_slot,GTS_db[valid_gts].starting_slot);
+						create_data_frame(SrcAddrMode, SrcPANId, SrcAddr, DstAddrMode, DestPANId, DstAddr, msduLength, msdu, msduHandle, TxOptions,GTS_db[i].starting_slot,1);
+					//}
+					return SUCCESS;
+					break;
+				}
+			}
+			signal MCPS_DATA.confirm(msduHandle, MAC_INVALID_GTS);
+			return FAIL;
+		}
+		else
+		{
+		//NORMAL/INDIRECT TRANSMISSION
+		
+			//////////////printfUART("IND TRANS: %i TxOptions: %u\n", get_txoptions_indirect_transmission(TxOptions),TxOptions);
+			//check if its an indirect transmission
+			//if ( get_txoptions_indirect_transmission(TxOptions) == 1)
+			//{
+				//INDIRECT TRANSMISSION
+				
+				//////////////printfUART("CREATE INDIRECT TRANSMISSION\n","");
+				
+				
+				
+				
+			//}
+			//else
+			//{
+				//NORMAL TRANSMISSION
+				////printfUART("SEND NO GTS NO IND\n","");
+				create_data_frame(SrcAddrMode, SrcPANId, SrcAddr, DstAddrMode, DestPANId, DstAddr, msduLength, msdu, msduHandle, TxOptions,0,0);
+			//}
+		}
+	}
+	else
+	{
+	//NON PAN COORDINATOR OPERATION
+		atomic{
+				
+				//////////////printfUART("sslot: %i ini %i\n",s_GTSss,init_s_GTSss);
+				//check if it a gts transmission
+				if (get_txoptions_gts(TxOptions) == 1)
+				{
+				//GTS TRANSMISSION
+					if (s_GTSss == 0x00)
+					{
+						//////////////printfUART("NO VALID GTS \n","");
+						signal MCPS_DATA.confirm(msduHandle, MAC_INVALID_GTS);
+					}
+					else
+					{
+							total_ticks = call TimerAsync.get_total_tick_counter();
+							msdu[0] =(uint8_t)(total_ticks >> 0 );
+							msdu[1] =(uint8_t)(total_ticks >> 8);
+							msdu[2] =(uint8_t)(total_ticks >> 16);
+							msdu[3] =(uint8_t)(total_ticks >> 24);
+							
+							if (on_sync == 1 && s_GTSss > 0)
+							create_data_frame(SrcAddrMode, SrcPANId, SrcAddr, DstAddrMode, DestPANId, DstAddr, msduLength, msdu, msduHandle, TxOptions,s_GTSss,0);
+					}
+				}
+				else
+				{
+				//NORMAL TRANSMISSION
+					//printfUART("TRnsm\n","");
+					create_data_frame(SrcAddrMode, SrcPANId, SrcAddr, DstAddrMode, DestPANId, DstAddr, msduLength, msdu, msduHandle, TxOptions,0,0);
+				}
+			}
+	}
+	return SUCCESS;
+}
+
+
+
+
+/*************************************************************/
+/**************        MCPS - PURGE         *******************/
+/*************************************************************/
+
+command error_t MCPS_PURGE.request(uint8_t msduHandle)
+{
+
+
+
+return SUCCESS;
+}
+
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+/************************		OTHER FUNCTIONS   			**********************************/
+/*****************************************************************************************************/ 
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+
+task void signal_loss()
+{
+	//TODO
+	atomic signal MLME_SYNC_LOSS.indication(beacon_loss_reason); //MAC_BEACON_LOSS
+	return;
+}
+
+//inicialization of the mac constants
+void init_MacCon()
+{
+/*****************************************************/
+/*				Boolean Variables					 */
+/*****************************************************/  
+PANCoordinator = 0;
+//(0 NO beacon transmission; 1 beacon transmission);
+Beacon_enabled_PAN = 0;
+//(SYNC)the device will try to track the beacon ie enable its receiver just before the espected time of each beacon
+TrackBeacon=0;
+//(SYNC)the device will try to locate one beacon
+findabeacon=0;
+//(RESET) when the reset command arrives it checks whether or not to reset the PIB
+SetDefaultPIB=0;
+/*****************************************************/
+/*				Integer Variables					 */
+/*****************************************************/  
+/*
+//Beacon Interval
+uint32_t BI;
+//Superframe duration
+uint32_t SD;
+*/
+//(SYNC)number of beacons lost before sending a Beacon-Lost indication comparing to aMaxLostBeacons
+missed_beacons=0;
+//current_channel
+current_channel=0;
+
+
+/*****************************************************/
+/*				Other Variables					 */
+/*****************************************************/ 
+pending_reset=0;
+
+}
+
+//inicialization of the mac PIB
+void init_MacPIB()
+{
+
+atomic{
+	//mac PIB default values
+	
+	//mac_PIB.macAckWaitDuration = 54; OLD VALUE//Number os symbols to wait for an acknowledgment
+	mac_PIB.macAckWaitDuration = 65;
+	
+	mac_PIB.macAssociationPermit = 1; //1 - PAN allowing associations
+	mac_PIB.macAutoRequest = 1; //indication if a device automatically sends a data request command if address is listed in the beacon frame
+	
+	mac_PIB.macBattLifeExt= 0; //batery life extension CSMA-CA
+	
+	mac_PIB.macBattLifeExtPeriods=6;
+	//mac_PIB.macBeaconPayload; //payload of the beacon
+	mac_PIB.macBeaconPayloadLenght=0; //beacon payload lenght
+	
+	mac_PIB.macBeaconTxTime=(0xffffff << 24); //*****
+	
+	
+	mac_PIB.macBSN=call Random.rand16(); //sequence number of the beacon frame
+	
+	
+	mac_PIB.macCoordExtendedAddress0 = 0x00000000; //64bits address of the coordinator with witch the device is associated
+	mac_PIB.macCoordExtendedAddress1 = 0x00000000;
+	
+	mac_PIB.macCoordShortAddress = 0x0000; //16bits address of the coordinator with witch the device is associated
+	
+	/*
+	if (DEVICE_DEPTH == 0x01)
+		mac_PIB.macCoordShortAddress =D1_PAN_SHORT;
+	if (DEVICE_DEPTH == 0x02)
+		mac_PIB.macCoordShortAddress =D2_PAN_SHORT;
+	if (DEVICE_DEPTH == 0x03)
+		mac_PIB.macCoordShortAddress =D3_PAN_SHORT;
+	if (DEVICE_DEPTH == 0x04)
+		mac_PIB.macCoordShortAddress =D4_PAN_SHORT;
+	*/
+	
+	mac_PIB.macDSN=call Random.rand16(); //sequence number of the transmited data or MAC command frame
+	
+	//alowing gts requests (used in beacon)
+	mac_PIB.macGTSPermit=1; //
+	
+	//Number of maximum CSMA backoffs
+	mac_PIB.macMaxCSMABackoffs=4;
+	mac_PIB.macMinBE=0;
+	
+	//mac_PIB.macPANId=0xffff; //16bits identifier of the PAN on witch this device is operating
+	mac_PIB.macPANId = MAC_PANID;
+	
+	mac_PIB.macPromiscuousMode=0;
+	mac_PIB.macRxOnWhenIdle=0;
+ 
+	//mac_PIB.macShortAddress=TOS_LOCAL_ADDRESS; //16bits short address
+	mac_PIB.macShortAddress=0xffff;
+
+
+	mac_PIB.macBeaconOrder=7;  //specification of how often the coordinator transmits a beacon
+	mac_PIB.macSuperframeOrder=3;
+	
+	//default mac_PIB.macTransactionPersistenceTime=0x01f4;
+	mac_PIB.macTransactionPersistenceTime=0x0010;
+	
+	//*******************************************
+
+	}
+}
+
+//////////////////////////////////////////////////////////////
+////////////////////////CSMA-CA functions////////////////////
+/////////////////////////////////////////////////////////////
+
+/*****************************************************/
+/*				SEND FRAME FUNCTION   			 */
+/*****************************************************/ 
+
+task void send_frame_csma()
+{
+	atomic{
+	
+		//
+		/////printfUART("I_AM_IN_IP %i %i\n",I_AM_IN_IP,send_buffer_count);
+	
+		if ((send_buffer_count > 0 && send_buffer_count <= SEND_BUFFER_SIZE && performing_csma_ca == 0) || I_AM_IN_IP != 0)
+		{
+			//////printfUART("sf %i\n",send_buffer_count);
+			////////printfUART("peform\n","");
+			
+			performing_csma_ca = 1;
+
+			perform_csma_ca();
+		}
+		else
+		{
+			////printfUART("NOT SEND\n","");
+		}
+
+		
+	}
+	
+}
+
+
+task void perform_csma_ca_slotted()
+{
+	uint8_t random_interval;
+	
+		
+		
+		//DEFERENCE CHANGE
+		if (check_csma_ca_send_conditions(send_buffer[send_buffer_msg_out].length,send_buffer[send_buffer_msg_out].frame_control1) == 1 )
+		{
+			cca_deference = 0;
+		}
+		else
+		{
+			//nao e necessario
+			cca_deference = 1;
+			return;
+		}
+		
+	atomic{
+		////printfUART("CCA: %i\n", call CCA.get()) ;
+	
+		if(call CCA.get() == CCA_BUSY )
+		{
+			//////////////printfUART("CCA: 1\n", "") ;
+			//STEP 5
+			CW--;
+			if (CW == 0 )
+			{
+				//send functions
+				csma_cca_backoff_boundary =0;
+					
+					////////printfUART("rts %i\n",get_ack_request(send_buffer[send_buffer_msg_out].frame_control));
+
+						//verify if the message must be ack
+						if ( get_fc1_ack_request(send_buffer[send_buffer_msg_out].frame_control1) == 1 )
+						{
+							send_ack_check=1;
+							ack_sequence_number_check=send_buffer[send_buffer_msg_out].seq_num;	
+							//verify retransmission
+							send_retransmission = send_buffer[send_buffer_msg_out].retransmission;
+							//verify if its an indirect transmission
+							send_indirect_transmission = send_buffer[send_buffer_msg_out].indirect;
+							//SEND WITH ACK_REQUEST
+							call PD_DATA.request(send_buffer[send_buffer_msg_out].length,(uint8_t *)&send_buffer[send_buffer_msg_out]);
+							
+							////////printfUART("out ck\n","");
+							
+							
+							call T_ackwait.startOneShot(ackwait_period);
+						}
+						else
+						{
+						
+							call PD_DATA.request(send_buffer[send_buffer_msg_out].length,(uint8_t *)&send_buffer[send_buffer_msg_out]);
+							
+							send_buffer_count --;
+							send_buffer_msg_out++;
+						
+							//failsafe
+							if(send_buffer_count > SEND_BUFFER_SIZE)
+							{
+								send_buffer_count =0;
+								send_buffer_msg_out=0;
+								send_buffer_msg_in=0;
+							}
+							
+							if (send_buffer_msg_out == SEND_BUFFER_SIZE)
+								send_buffer_msg_out=0;
+							
+							if (send_buffer_count > 0 && send_buffer_count <= SEND_BUFFER_SIZE)
+								post send_frame_csma();
+							
+							////printfUART("sk %i\n",send_buffer_count);
+							
+							//////////printfUART("%i %i %i\n",send_buffer_count,send_buffer_msg_in,send_buffer_msg_out);
+						}
+					
+				performing_csma_ca = 0;
+			}
+		}
+		else
+		{
+			//CHECK NOT USED
+			//csma_backoff_counter++;
+			//csma_backoff_counter_inst++;
+
+			if (NB < mac_PIB.macMaxCSMABackoffs)
+			{
+				////////////printfUART("NB:%i BE:%i L CW: %i\n",NB,BE,CW);
+				//STEP 4
+				CW = 2;
+				NB++;
+				BE = min(BE+1,aMaxBE);
+				
+				//STEP 2
+				//random_interval = pow(2,BE) - 1;
+				
+				//delay_backoff_period = (call Random.rand() & random_interval);
+				//verification of the backoff_deference
+				//DEFERENCE CHANGE
+				if (backoff_deference == 0)
+				{
+					random_interval = powf(2,BE) - 1;
+					delay_backoff_period = (call Random.rand16() & random_interval );
+						
+					if (check_csma_ca_backoff_send_conditions((uint32_t) delay_backoff_period) == 1)
+					{
+							backoff_deference = 1;
+					}
+				}
+				else
+				{
+					backoff_deference = 0;
+				}
+				
+				
+				//delay_backoff_period=0;
+				
+				////printfUART("delay_backoff_period:%i\n",delay_backoff_period);
+				csma_delay=1;
+			}
+			else
+			{
+				//CSMA/CA FAIL
+				csma_delay=0;
+				csma_cca_backoff_boundary=0;
+				
+				send_buffer_count --;
+				send_buffer_msg_out++;
+			
+				//failsafe
+				if(send_buffer_count > SEND_BUFFER_SIZE)
+				{
+					send_buffer_count =0;
+					send_buffer_msg_out=0;
+					send_buffer_msg_in=0;
+				}
+				
+				if (send_buffer_msg_out == SEND_BUFFER_SIZE)
+					send_buffer_msg_out=0;
+				
+				if (send_buffer_count > 0 && send_buffer_count <= SEND_BUFFER_SIZE)
+					post send_frame_csma();
+					
+				performing_csma_ca = 0;
+				
+				////printfUART("SLOTTED FAIL\n","");
+				/*
+				if(associating == 1)
+				{
+					associating=0;
+					signal MLME_ASSOCIATE.confirm(0x0000,MAC_CHANNEL_ACCESS_FAILURE);
+				}*/
+			}
+		}
+	}
+return;
+}
+
+task void perform_csma_ca_unslotted()
+{
+	uint8_t random_interval;
+	
+	atomic{
+		if (NB < mac_PIB.macMaxCSMABackoffs)
+		{
+			//STEP 3
+			//perform CCA
+			////////////printfUART("CCA: %i\n", TOSH_READ_CC_CCA_PIN()) ;
+			
+			//if CCA is clear send message
+			if(call CCA.get() == CCA_BUSY)
+			{
+				//send functions
+				////////////printfUART("UNSLOTTED SUCCESS\n","");
+				atomic{
+				csma_delay =0;
+				
+
+						
+				if (check_csma_ca_send_conditions(send_buffer[send_buffer_msg_out].length,send_buffer[send_buffer_msg_out].frame_control1) == 1 )
+				{
+					call PD_DATA.request(send_buffer[send_buffer_msg_out].length,(uint8_t *)&send_buffer[send_buffer_msg_out]);
+					
+					send_buffer_count --;
+					send_buffer_msg_out++;
+				
+					//failsafe
+					if(send_buffer_count > SEND_BUFFER_SIZE)
+					{
+						send_buffer_count =0;
+						send_buffer_msg_out=0;
+						send_buffer_msg_in=0;
+					}
+				
+					if (send_buffer_msg_out == SEND_BUFFER_SIZE)
+						send_buffer_msg_out=0;
+				}
+					
+				
+				performing_csma_ca =0;
+
+				}
+				return; //SUCCESS
+			
+			}
+
+			//CCA is not clear, perform new iteration of the CSMA/CA UNSLOTTED
+			
+			//STEP 4
+			NB++;
+			BE = min(BE+1,aMaxBE);
+		
+			////////////printfUART("NB:%i BE:%i\n",NB,BE);
+			
+			//STEP 2
+			//#ifdef PLATFORM_MICAZ
+				random_interval = powf(2,BE) - 1;
+			//#else
+			//	random_interval = powf(2,BE) - 1;
+			//#endif
+			delay_backoff_period = (call Random.rand16() & random_interval );
+			//delay_backoff_period=1;
+			csma_delay=1;
+			
+			//////////////printfUART("delay_backoff_period:%i\n",delay_backoff_period);
+		}
+		else
+		{
+			atomic csma_delay=0;
+			////////////printfUART("UNSLOTTED FAIL\n","");
+		}
+	}
+return;
+}
+
+
+void perform_csma_ca()
+{
+	uint8_t random_interval;
+	csma_slotted=1;
+	//STEP 1
+	if (csma_slotted == 0 )
+	{
+		atomic{
+			//UNSLOTTED version
+			init_csma_ca(csma_slotted);
+			//STEP 2
+			random_interval = powf(2,BE) - 1;
+			delay_backoff_period = (call Random.rand16() & random_interval );
+			
+			csma_delay=1;
+			////////////printfUART("delay_backoff_period:%i\n",delay_backoff_period);
+		}
+		return;
+	}
+	else
+	{
+		//SLOTTED version
+		atomic{
+			//DEFERENCE CHANGE
+			if (cca_deference==0)
+			{
+				init_csma_ca(csma_slotted);
+				if (mac_PIB.macBattLifeExt == 1 )
+				{
+					BE = min(2,	mac_PIB.macMinBE);
+				}
+				else
+				{
+					BE = mac_PIB.macMinBE;
+				}
+				csma_locate_backoff_boundary = 1;
+			}
+			else
+			{
+				cca_deference = 0;
+				csma_delay=0;
+				csma_locate_backoff_boundary=0;
+				csma_cca_backoff_boundary = 1;
+			
+			}
+		}
+		return;
+	}
+}
+
+
+uint8_t min(uint8_t val1, uint8_t val2)
+{
+	if (val1 < val2)
+	{
+		return val1;
+	}
+	else
+	{
+		return val2;
+	}
+}
+
+void init_csma_ca(bool slotted)
+{
+
+//initialization of the CSMA/CA protocol variables
+	//////////////printfUART("init_csma_ca\n", "") ;
+	
+	csma_delay=0;
+	
+	if (slotted == 0 )
+	{
+		NB=0;
+		BE=mac_PIB.macMinBE;
+	}
+	else
+	{
+		NB=0;
+		CW=2;
+		
+		csma_cca_backoff_boundary=0;
+		csma_locate_backoff_boundary=0;
+	}
+
+return;
+}
+
+
+uint8_t calculate_ifs(uint8_t pk_length)
+{
+	if (pk_length > aMaxSIFSFrameSize)
+		return aMinLIFSPeriod; // + ( ((pk_length * 8) / 250.00) / 0.34 );
+	else
+		return aMinSIFSPeriod; // + ( ((pk_length * 8) / 250.00) / 0.34 );
+}
+
+uint32_t calculate_gts_expiration()
+{
+	uint32_t exp_res;
+	if( mac_PIB.macBeaconOrder > 9 )
+		exp_res= 1;
+	else
+	{
+		//#ifdef PLATFORM_MICAZ
+			exp_res= powf(2,(8-mac_PIB.macBeaconOrder));
+		//#else
+		//	exp_res= powf(2,(8-mac_PIB.macBeaconOrder));
+		//#endif
+	}	
+	////////////printfUART("alculat %i\n",exp_res ) ;
+	return exp_res;
+}
+
+uint8_t check_csma_ca_send_conditions(uint8_t frame_length,uint8_t frame_control1)
+{
+	uint8_t ifs_symbols;
+	uint32_t frame_tx_time;
+	uint32_t remaining_gts_duration;
+	
+	
+	ifs_symbols=calculate_ifs(frame_length);
+	//wait_ifs=1;
+	//call TimerAsync.set_ifs_symbols(ifs_symbols);
+	
+	//////////////printfUART("ifs_symbols %i\n",ifs_symbols ) ;
+	
+	if (get_fc1_ack_request(frame_control1) == 1 )
+		frame_tx_time =  frame_length + ACK_LENGTH + aTurnaroundTime + ifs_symbols;
+	else
+		frame_tx_time =  frame_length + ifs_symbols;
+		
+	atomic remaining_gts_duration = time_slot - ( call TimerAsync.get_current_number_backoff_on_time_slot() * aUnitBackoffPeriod);
+	
+	//////////////printfUART("frame_tx %d remaing %d\n",frame_tx_time,remaining_gts_duration ) ;
+	
+	if (frame_tx_time < remaining_gts_duration)
+		return 1;
+	else
+		return 0;
+
+}
+
+//DEFERENCE CHANGE
+uint8_t check_csma_ca_backoff_send_conditions(uint32_t delay_backoffs)
+{
+
+	uint32_t number_of_sd_ticks=0;
+	uint32_t current_ticks=0;
+	uint32_t ticks_remaining =0;
+	uint32_t number_of_backoffs_remaining =0;
+	
+	number_of_sd_ticks = call TimerAsync.get_sd_ticks();
+	
+	current_ticks = call TimerAsync.get_current_ticks();
+	
+	ticks_remaining = number_of_sd_ticks - current_ticks;
+	
+	number_of_backoffs_remaining = ticks_remaining / 5;
+	
+	if (number_of_backoffs_remaining > delay_backoffs)
+		return 0;
+	else
+		return 1;
+
+
+
+}
+
+uint8_t check_gts_send_conditions(uint8_t frame_length)
+{
+	uint8_t ifs_symbols;
+	uint32_t frame_tx_time;
+	uint32_t remaining_gts_duration;
+	
+
+	ifs_symbols=calculate_ifs(frame_length);
+	//wait_ifs=1;
+	//call TimerAsync.set_ifs_symbols(ifs_symbols);
+	
+	//////////////printfUART("ifs_symbols %i\n",ifs_symbols ) ;
+	
+	frame_tx_time =  frame_length + ACK_LENGTH + aTurnaroundTime + ifs_symbols;
+	
+	remaining_gts_duration = time_slot - ( call TimerAsync.get_current_number_backoff_on_time_slot() * aUnitBackoffPeriod);
+	
+	//////////////printfUART("frame_tx %d remaing %d\n",frame_tx_time,remaining_gts_duration ) ;
+	
+	if (frame_tx_time < remaining_gts_duration)
+		return 1;
+	else
+		return 0;
+}
+
+//////////////////////////////////////////////////////////////
+////////////////////////GTS functions////////////////////////
+/////////////////////////////////////////////////////////////
+
+void init_GTS_db()
+{
+	//initialization of the GTS database
+	int i;
+atomic{
+		for (i=0 ; i < 7 ; i++)
+		{
+			GTS_db[i].gts_id=0x00;
+			GTS_db[i].starting_slot=0x00;
+			GTS_db[i].length=0x00;
+			GTS_db[i].direction=0x00;
+			GTS_db[i].DevAddressType=0x0000;
+		
+		}
+	}
+return;
+}
+
+error_t remove_gts_entry(uint16_t DevAddressType)
+{
+	uint8_t r_lenght=0;
+	//int r_start_slot=7;
+	int i;
+	
+	atomic{
+		for (i=0; i < 7 ; i++)
+		{
+			if( GTS_db[i].DevAddressType == DevAddressType )
+			{
+				
+				r_lenght = GTS_db[i].length;
+				//r_start_slot = i;
+				//delete the values
+				GTS_db[i].gts_id=0x00;
+				GTS_db[i].starting_slot=0x00;
+				GTS_db[i].length=0x00;
+				GTS_db[i].direction=0x00;
+				GTS_db[i].DevAddressType=0x0000;
+				GTS_db[i].expiration=0x00;
+				
+				//////////////printfUART("GTS Entry removed dev:%i len:%i pos %i\n", DevAddressType,r_lenght,i);
+				GTS_startslot = GTS_startslot + r_lenght;
+				GTS_descriptor_count--;
+				final_CAP_slot = final_CAP_slot + r_lenght;
+			}
+			
+			if ( r_lenght > 0)
+			{
+				if ( GTS_db[i].gts_id != 0x00 && GTS_db[i].DevAddressType !=0x0000)
+				{				
+					GTS_db[i-r_lenght].gts_id = GTS_db[i].gts_id;
+					GTS_db[i-r_lenght].starting_slot = i-r_lenght;
+					GTS_db[i-r_lenght].length = GTS_db[i].length;
+					GTS_db[i-r_lenght].direction = GTS_db[i].direction;
+					GTS_db[i-r_lenght].DevAddressType = GTS_db[i].DevAddressType;
+					GTS_db[i-r_lenght].expiration = GTS_db[i].expiration;
+					
+					//delete the values
+					GTS_db[i].gts_id=0x00;
+					GTS_db[i].starting_slot=0x00;
+					GTS_db[i].length=0x00;
+					GTS_db[i].direction=0x00;
+					GTS_db[i].DevAddressType=0x0000;
+					GTS_db[i].expiration=0x00;
+					
+					//////////////printfUART("UPDATED\n","" );
+				}
+			}
+		}
+	}
+return SUCCESS;
+}
+
+error_t add_gts_entry(uint8_t gts_length,bool direction,uint16_t DevAddressType)
+{
+	int i;
+	//////////////printfUART("ADDING gts_length: %i\n", gts_length); 
+	//////////////printfUART("dir: %i\n", direction); 
+	//////////////printfUART("addr: %i\n", DevAddressType);
+
+	//check aMinCAPLength
+	if ( (GTS_startslot - gts_length) < 5 )
+	{
+		//////////////printfUART("ADD FAIL%i\n", ""); 
+		
+	}
+	
+	//if it has more than 7 timeslots alocated
+	if ( (GTS_startslot -gts_length) < 9 )
+	{
+		return FAIL;
+	}
+	
+	//check if the address already exists in the GTS list
+	for (i=0 ; i < 7 ; i++)
+	{
+		if ( GTS_db[i].DevAddressType == DevAddressType && GTS_db[i].direction == direction && GTS_db[i].gts_id > 0)
+		{
+			//////////////printfUART("ALREADY ADDED\n", ""); 
+			return FAIL;
+		}
+		if ( GTS_null_db[i].DevAddressType == DevAddressType && GTS_null_db[i].gts_id > 0)
+		{
+			//////////////printfUART("REJECTED\n", ""); 
+			return FAIL;
+		}
+		
+		
+	}
+	
+atomic{	
+	
+	//////////////printfUART("GTS_startslot: %i\n", GTS_startslot); 
+	GTS_startslot = GTS_startslot - gts_length;
+
+	GTS_db[15-GTS_startslot].gts_id=GTS_id;
+	GTS_db[15-GTS_startslot].starting_slot=GTS_startslot;
+	GTS_db[15-GTS_startslot].length=gts_length;
+	GTS_db[15-GTS_startslot].direction=direction;
+	GTS_db[15-GTS_startslot].DevAddressType=DevAddressType;
+	GTS_db[15-GTS_startslot].expiration=0x00;
+
+	//////////////printfUART("GTS Entry added start:%i len:%i\n", GTS_startslot,gts_length); 
+	
+	GTS_id++;
+	GTS_descriptor_count++;
+	
+	final_CAP_slot = final_CAP_slot - gts_length;
+	
+	}
+	return SUCCESS;
+}
+
+
+//GTS null functions
+void init_GTS_null_db()
+{
+	//initialization of the GTS database
+	int i;
+	atomic{
+		for (i=0 ; i < 7 ; i++)
+		{
+			GTS_null_db[i].gts_id=0x00;
+			GTS_null_db[i].starting_slot=0x00;
+			GTS_null_db[i].length=0x00;
+			//GTS_null_db[i].direction=0x00;
+			GTS_null_db[i].DevAddressType=0x0000;
+			GTS_null_db[i].persistencetime=0x00;
+		}
+	}
+return;
+}
+
+
+error_t add_gts_null_entry(uint8_t gts_length,bool direction,uint16_t DevAddressType)
+{
+	int i;
+		
+	//check if the address already exists in the GTS list
+	for (i=0 ; i < 7 ; i++)
+	{
+		if ( GTS_null_db[i].DevAddressType == DevAddressType && GTS_null_db[i].gts_id > 0)
+		{
+			//////////////printfUART("ALREADY ADDED null\n", ""); 
+			return FAIL;
+		}
+	}
+	
+	for (i=0 ; i < 7 ; i++)
+	{
+		if ( GTS_null_db[i].DevAddressType==0x0000 && GTS_null_db[i].gts_id == 0x00)
+		{
+			GTS_null_db[i].gts_id=GTS_id;
+			GTS_null_db[i].starting_slot=0x00;
+			GTS_null_db[i].length=0x00;
+			//GTS_null_db[i].direction=0x00;
+			GTS_null_db[i].DevAddressType=DevAddressType;
+			GTS_null_db[i].persistencetime=0x00;
+			
+			
+			//////////////printfUART("GTS null Entry added addr:%x\n", DevAddressType); 
+			
+			GTS_id++;
+			GTS_null_descriptor_count++;
+			
+		return SUCCESS;
+		}
+	}
+
+	
+return FAIL;	
+}
+
+task void increment_gts_null()
+{
+	int i;
+	
+	//////////////printfUART("init inc\n",""); 
+atomic{
+	for (i=0 ; i < 7 ; i++)
+	{
+		if ( GTS_null_db[i].DevAddressType != 0x0000 && GTS_null_db[i].gts_id != 0x00)
+		{
+			//////////////printfUART("increm %x\n", GTS_null_db[i].DevAddressType); 
+			GTS_null_db[i].persistencetime++;
+		
+		}
+		
+		if ( GTS_null_db[i].persistencetime > (aGTSDescPersistenceTime -1)  )
+		{
+			GTS_null_db[i].gts_id=0x00;
+			GTS_null_db[i].starting_slot=0x00;
+			GTS_null_db[i].length=0x00;
+			//GTS_null_db[i].direction=0x00;
+			GTS_null_db[i].DevAddressType=0x0000;
+			GTS_null_db[i].persistencetime=0x00;
+			
+			//////////////printfUART("GTS null removed addr:%x\n", GTS_null_db[i].DevAddressType); 
+		
+			atomic GTS_null_descriptor_count--;
+		}
+			
+	}
+	
+	}
+//////////////printfUART("end inc\n",""); 
+return;
+}
+
+task void check_gts_expiration()
+{
+	int i;
+//////////////printfUART("init exp\n",""); 
+atomic{	
+	atomic gts_expiration=calculate_gts_expiration();
+	//////////////printfUART("gts_expiration:%i\n", gts_expiration); 
+	atomic gts_expiration=2;
+	//////////////printfUART("gts_expiration:%i\n", gts_expiration); 
+	
+	for (i=0 ; i < 7 ; i++)
+	{
+		
+		if ( GTS_db[i].DevAddressType != 0x0000 && GTS_db[i].gts_id != 0x00)
+		{
+			if( GTS_db[i].expiration == (gts_expiration + 1) && GTS_db[i].direction ==0x00)
+			{
+				//////////////printfUART("GTS expired addr:%x\n", GTS_null_db[i].DevAddressType); 
+				//remove gts, indicate on the gts null list
+				atomic{
+				
+					add_gts_null_entry(GTS_db[i].length,GTS_db[i].direction,GTS_db[i].DevAddressType);
+					
+					remove_gts_entry(GTS_db[i].DevAddressType);
+				}
+			}
+			else
+			{
+				atomic GTS_db[i].expiration ++;
+			}
+		}
+	}
+	
+	
+	}
+	//////////////printfUART("end exp\n",""); 
+return;
+}
+
+void init_available_gts_index()
+	{
+		int i=0;
+		atomic{
+			available_gts_index_count = GTS_SEND_BUFFER_SIZE;
+			for(i=0;i < GTS_SEND_BUFFER_SIZE;i++)
+			{
+				available_gts_index[i]=i;
+			}
+		}
+		return;
+	}
+/*****************************GTS BUFFER******************************/
+void init_gts_slot_list()
+{
+	int i=0;
+	for(i=0;i<7;i++)
+	{
+		gts_slot_list[i].element_count = 0x00;
+		gts_slot_list[i].element_in = 0x00;
+		gts_slot_list[i].element_out = 0x00;
+	}
+}
+
+
+task void start_coordinator_gts_send()
+{
+atomic{
+
+	coordinator_gts_send_pending_data =0;
+	
+	if(gts_slot_list[15-number_time_slot].element_count > 0)
+	{
+		if (check_gts_send_conditions(gts_send_buffer[gts_slot_list[15-number_time_slot].gts_send_frame_index[gts_slot_list[15-number_time_slot].element_out]].length) == 1 )
+		{
+			
+			gts_send_buffer[gts_slot_list[15-number_time_slot].gts_send_frame_index[gts_slot_list[15-number_time_slot].element_out]].length = gts_send_buffer[gts_slot_list[15-number_time_slot].gts_send_frame_index[gts_slot_list[15-number_time_slot].element_out]].length -2;
+			
+			call PD_DATA.request(gts_send_buffer[gts_slot_list[15-number_time_slot].gts_send_frame_index[gts_slot_list[15-number_time_slot].element_out]].length,(uint8_t *)&gts_send_buffer[gts_slot_list[15-number_time_slot].gts_send_frame_index[gts_slot_list[15-number_time_slot].element_out]]);
+	
+			available_gts_index_count++;
+			available_gts_index[available_gts_index_count] = gts_slot_list[15-number_time_slot].gts_send_frame_index[gts_slot_list[15-number_time_slot].element_out];
+			
+			gts_slot_list[15-number_time_slot].element_count--;
+			gts_slot_list[15-number_time_slot].element_out++;
+			
+			if (gts_slot_list[15-number_time_slot].element_out == GTS_SEND_BUFFER_SIZE)
+				gts_slot_list[15-number_time_slot].element_out=0;
+
+			if(gts_slot_list[15-number_time_slot].element_count > 0 )
+			{
+				coordinator_gts_send_pending_data =1;
+				coordinator_gts_send_time_slot = number_time_slot;
+			}
+		}
+	}
+}
+return;
+}
+
+task void start_gts_send()
+{
+
+	atomic{
+	gts_send_pending_data = 0;
+	
+	if(gts_send_buffer_count > 0)
+	{
+		if (check_gts_send_conditions(gts_send_buffer[gts_send_buffer_msg_out].length) == 1 )
+		{
+
+			gts_send_buffer[gts_send_buffer_msg_out].length = gts_send_buffer[gts_send_buffer_msg_out].length -2;
+
+			call PD_DATA.request(gts_send_buffer[gts_send_buffer_msg_out].length,(uint8_t *)&gts_send_buffer[gts_send_buffer_msg_out]);
+	
+			gts_send_buffer_count --;
+			gts_send_buffer_msg_out++;
+
+			if (gts_send_buffer_msg_out == GTS_SEND_BUFFER_SIZE)
+				gts_send_buffer_msg_out=0;
+
+			//////////////printfUART("after send %i %i %i \n",gts_send_buffer_count,gts_send_buffer_msg_in,gts_send_buffer_msg_out);
+			
+			if (gts_send_buffer_count > 0)
+				gts_send_pending_data = 1;	
+		}
+	}
+
+}
+return;
+}
+
+//////////////////////////////////////////////////////////////
+//////////Indirect transmission functions////////////////////
+/////////////////////////////////////////////////////////////
+
+void init_indirect_trans_buffer()
+{
+	int i;
+	for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+	{
+		indirect_trans_queue[i].handler = 0x00;
+		indirect_trans_count=0;
+	}
+
+return;
+}
+
+
+error_t remove_indirect_trans(uint8_t handler)
+{
+
+	int i;
+	uint8_t removed_ok=0;
+	for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+	{
+		if (indirect_trans_queue[i].handler == handler)
+		{
+			indirect_trans_queue[i].handler = 0x00;
+			removed_ok = 1;
+			indirect_trans_count--;
+			break;
+		}
+	}
+
+	if (removed_ok == 0) 
+	{
+		return MAC_INVALID_HANDLE;
+	}
+	else
+	{
+		return SUCCESS;
+	}
+}
+
+
+void increment_indirect_trans()
+{
+	int i;
+	for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+	{
+		if (indirect_trans_queue[i].handler != 0x00)
+		{
+			indirect_trans_queue[i].transaction_persistent_time++;
+			if (indirect_trans_queue[i].transaction_persistent_time == mac_PIB.macTransactionPersistenceTime )
+				remove_indirect_trans(indirect_trans_queue[i].handler);
+		}
+	}
+
+return;
+}
+
+void send_ind_trans_addr(uint32_t DeviceAddress[])
+{
+	
+	uint8_t destination_address=0;
+	
+	dest_short *dest_short_ptr =0;
+	dest_long *dest_long_ptr=0;
+	
+	int i=0;
+	MPDU *frame_ptr=0;
+	
+	////printfUART("send_ind_trans_addr DeviceAddress0: %y DeviceAddress1: %y \n",DeviceAddress[0],DeviceAddress[1]);
+
+    //list_indirect_trans_buffer();
+
+		for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+		{
+			if (indirect_trans_queue[i].handler > 0x00)
+			{
+				frame_ptr = (MPDU *)indirect_trans_queue[i].frame;
+				destination_address=get_fc2_dest_addr(frame_ptr->frame_control2);
+				
+				switch(destination_address)
+				{
+					case LONG_ADDRESS: dest_long_ptr = (dest_long *) frame_ptr->data;
+										break;
+					case SHORT_ADDRESS: dest_short_ptr = (dest_short *) frame_ptr->data; 								
+										break;
+				}
+				
+				//check the full address
+				
+				if ( (dest_long_ptr->destination_address0 == DeviceAddress[1] && dest_long_ptr->destination_address1 == DeviceAddress[0]) || ( dest_short_ptr->destination_address == (uint16_t)DeviceAddress[0] ))
+				{
+					
+					if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+						send_buffer_msg_in=0;
+						
+					memcpy(&send_buffer[send_buffer_msg_in],(MPDU *) &indirect_trans_queue[i].frame,sizeof(MPDU));
+					
+					//enable retransmissions
+					send_buffer[send_buffer_msg_in].retransmission =0;
+					send_buffer[send_buffer_msg_in].indirect = i + 1;
+					
+					//check upon reception
+					indirect_trans_queue[i].handler=0x00;
+					//verify temporary error on the association request
+					
+					indirect_trans_count--;
+					if(indirect_trans_count > INDIRECT_BUFFER_SIZE )
+					{
+						indirect_trans_count=0;
+					}
+					
+					atomic send_buffer_count++;
+					atomic send_buffer_msg_in++;
+			
+					post send_frame_csma();
+					
+					////printfUART("i send\n","");
+					
+					return;
+				}
+			}
+		}
+		////printfUART("i not found","");
+
+	
+return;
+} 
+
+/***************************DEBUG FUNCTIONS******************************/
+/* This function are list functions with the purpose of debug, to use then uncomment the declatarion
+on top of this file*/
+/*
+
+void list_mac_pib()
+{
+////////////printfUART("mac_PIB.macAckWaitDuration: %x\n",mac_PIB.macAckWaitDuration);
+////////////printfUART("mac_PIB.macAssociationPermit: %i\n",mac_PIB.macAssociationPermit);
+////////////printfUART("mac_PIB.macAutoRequest: %i\n",mac_PIB.macAutoRequest);
+////////////printfUART("mac_PIB.macBattLifeExt %i\n",mac_PIB.macBattLifeExt);
+////////////printfUART("mac_PIB.macBattLifeExtPeriods %i\n",mac_PIB.macBattLifeExtPeriods);
+//beacon payload
+////////////printfUART("mac_PIB.macBeaconPayloadLenght %i\n",mac_PIB.macBeaconPayloadLenght);
+////////////printfUART("mac_PIB.macBeaconOrder %i\n",mac_PIB.macBeaconOrder);
+////////////printfUART("mac_PIB.macBeaconTxTime %i\n",mac_PIB.macBeaconTxTime);
+////////////printfUART("mac_PIB.macBSN %i\n",mac_PIB.macBSN);
+////////////printfUART("mac_PIB.macCoordExtendedAddress0 %y\n",mac_PIB.macCoordExtendedAddress0);
+////////////printfUART("mac_PIB.macCoordExtendedAddress1 %y\n",mac_PIB.macCoordExtendedAddress1);
+////////////printfUART("mac_PIB.macCoordShortAddress: %x\n",mac_PIB.macCoordShortAddress);
+////////////printfUART("mac_PIB.macDSN: %x\n",mac_PIB.macDSN);
+////////////printfUART("mac_PIB.macGTSPermit: %x\n",mac_PIB.macGTSPermit);
+////////////printfUART("mac_PIB.macMaxCSMABackoffs: %x\n",mac_PIB.macMaxCSMABackoffs);
+////////////printfUART("mac_PIB.macMinBE: %x\n",mac_PIB.macMinBE);
+////////////printfUART("mac_PIB.macPANId: %x\n",mac_PIB.macPANId);
+////////////printfUART("mac_PIB.macPromiscuousMode: %x\n",mac_PIB.macPromiscuousMode);
+////////////printfUART("mac_PIB.macRxOnWhenIdle: %x\n",mac_PIB.macRxOnWhenIdle);
+////////////printfUART("mac_PIB.macShortAddress: %y\n",mac_PIB.macShortAddress);
+////////////printfUART("mac_PIB.macSuperframeOrder: %x\n",mac_PIB.macSuperframeOrder);
+////////////printfUART("mac_PIB.macTransactionPersistenceTime: %y\n",mac_PIB.macTransactionPersistenceTime);
+
+return;
+}
+
+void list_gts()
+{
+	int i;
+	////////////printfUART("GTS list%i\n", GTS_descriptor_count); 
+	
+	for (i=0; i< 7;i++)
+	{
+		////////////printfUART("GTSID: %i",GTS_db[i].gts_id); 	
+		////////////printfUART("start slot: %i",GTS_db[i].starting_slot);
+		////////////printfUART("lenght: %i",GTS_db[i].length); 	
+		////////////printfUART("dir: %i",GTS_db[i].direction); 	
+		////////////printfUART("DevAddressType: %i",GTS_db[i].DevAddressType);
+	 	////////////printfUART("expiration: %i \n",GTS_db[i].expiration);
+	}
+	
+}
+
+void list_my_gts()
+{
+atomic{
+		////////////printfUART("SEND GTS s_GTSss: %i s_GTS_length: %i\n",s_GTSss,s_GTS_length); 	
+		
+		////////////printfUART("RECEIVE GTS r_GTSss: %i r_GTS_length: %i\n",r_GTSss,r_GTS_length); 
+}
+}
+*/
+
+void list_indirect_trans_buffer()
+{
+	int i;
+	//printfUART("indirect_trans_count %i\n", indirect_trans_count); 
+	
+	for (i=0; i< INDIRECT_BUFFER_SIZE;i++)
+	{
+		//printfUART("hand: %i \n",indirect_trans_queue[i].handler); 
+		
+		////printfUART("start slot: %i",GTS_db[i].starting_slot);
+
+	}
+	
+}
+/*
+void list_gts_null()
+{
+	int i;
+	////////////printfUART("GTS null list%i\n", GTS_null_descriptor_count); 
+	
+	for (i=0; i< GTS_null_descriptor_count;i++)
+	{
+		//////////////printfUART("GTSID: %i",GTS_null_db[i].gts_id); 	
+		////////////printfUART("start slot: %i",GTS_null_db[i].starting_slot);
+		////////////printfUART("lenght: %i",GTS_null_db[i].length); 	
+		//////////////printfUART("dir: %i",GTS_null_db[i].direction); 	
+		////////////printfUART("DevAddressType: %i \n",GTS_null_db[i].DevAddressType); 
+		////////////printfUART("persistencetime: %i \n",GTS_null_db[i].persistencetime); 
+	}
+	
+}
+
+*/
+
+
+}
+
diff --git a/tos/lib/net/zigbee/ieee802154/mac/mac_const.h b/tos/lib/net/zigbee/ieee802154/mac/mac_const.h
new file mode 100644
index 00000000..8c61d05a
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/mac/mac_const.h
@@ -0,0 +1,225 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author open-zb http://www.open-zb.net
+ * @author Andre Cunha
+ */
+
+// The MAC constants are defined in here.
+// Notice that these makes use of the PHY constants.
+//pag 134
+
+#ifndef __MAC_CONST__
+#define __MAC_CONST__
+
+
+#define aBaseSlotDuration          60
+#define aBaseSuperframeDuration    960 //aBaseSlotDuration*aNumSuperframeSlots
+
+//#define aExtendedAddress         // This should be defined by the device!
+
+#define aMaxBE                     5 //CSMA-CA
+
+#define aMaxBeaconOverhead         75
+#define aMaxBeaconPayloadLength    aMaxPHYPacketSize-aMaxBeaconOverhead
+#define aGTSDescPersistenceTime    4
+#define aMaxFrameOverhead          25
+#define aMaxFrameResponseTime      1220
+#define aMaxFrameRetries           1
+
+//(SYNC)number of beacons lost before sending a Beacon-Lost indication
+#define aMaxLostBeacons            4
+#define aMaxMACFrameSize           aMaxPHYPacketSize-aMaxFrameOverhead
+#define aMaxSIFSFrameSize          18
+#define aMinCAPLength              440
+#define aMinLIFSPeriod             40
+#define aMinSIFSPeriod             12
+#define aNumSuperframeSlots        16
+#define aResponseWaitTime          32*aBaseSuperframeDuration
+#define aUnitBackoffPeriod         20
+
+
+#define TYPE_BEACON 0
+#define TYPE_DATA 1
+#define TYPE_ACK 2
+#define TYPE_CMD 3
+
+#define SHORT_ADDRESS 2
+#define LONG_ADDRESS 3
+#define RESERVED_ADDRESS 1
+
+#define NUMBER_TIME_SLOTS 16
+
+#define ACK_LENGTH 5
+
+//buffer sizes
+#define MAX_GTS_BUFFER 7
+
+//#define MAX_GTS_PEND 2
+//#define MAX_GTS_IN_SLOT 1
+
+#define INDIRECT_BUFFER_SIZE 2
+#define RECEIVE_BUFFER_SIZE 4
+#define SEND_BUFFER_SIZE 3
+
+#define UPSTREAM_BUFFER_SIZE 3
+
+#define GTS_SEND_BUFFER_SIZE 3
+
+#define BACKOFF_PERIOD_MS 0.34724
+#define BACKOFF_PERIOD_US 347.24
+
+//value of each symbol in us
+#define EFFECTIVE_SYMBOL_VALUE 17.362
+
+// MAC PIB attribute
+typedef struct
+{
+	//pag 135
+	uint8_t macAckWaitDuration;
+	bool macAssociationPermit;//FDD
+	bool macAutoRequest;
+	bool macBattLifeExt;
+	uint8_t macBattLifeExtPeriods;
+	
+	uint8_t macBeaconPayload[aMaxBeaconPayloadLength];//FDD
+	
+	uint8_t macBeaconPayloadLenght;//FDD
+	uint8_t macBeaconOrder;//FDD
+	
+	uint32_t macBeaconTxTime;//FDD
+	uint8_t macBSN;//FDD
+	uint32_t macCoordExtendedAddress0;
+	uint32_t macCoordExtendedAddress1;
+	uint16_t macCoordShortAddress;
+	uint8_t macDSN;
+	bool macGTSPermit;//FDD
+	uint8_t macMaxCSMABackoffs;
+	uint8_t macMinBE;
+	uint16_t macPANId;
+	bool macPromiscuousMode;//FDD
+	bool macRxOnWhenIdle;
+	uint32_t macShortAddress;
+	uint8_t macSuperframeOrder;//FDD
+	uint32_t macTransactionPersistenceTime;//FDD
+	
+} macPIB;
+
+// MAC PIB security ACL entry descriptor
+typedef struct
+{
+	uint32_t ACLExtendedAddress[2];
+	uint16_t ACLShortAddress;
+	uint16_t ACLPANId;
+	uint8_t ACLSecurityMaterialLength;
+	//variable string
+	uint8_t ACLSecurityMaterial;
+	uint8_t ACLSecuritySuite;
+	
+}ACLDescriptor;
+
+// MAC PIB security attribute
+typedef struct
+{
+	//pag 138
+	ACLDescriptor macACLEntryDescriptorSet;
+	uint8_t macACLEntryDescriptorSetSize;
+	bool macDefaultSecurity;
+	uint8_t macDefaultSecurityMaterialLength;
+	//variable string
+	uint8_t macDefaultSecurityMaterial;
+	uint8_t macDefaultSecuritySuite;
+	uint8_t macSecurityMode;
+	
+}macPIBsec;
+
+//MAC PANDescriptor
+typedef struct
+{
+	//pag76
+	uint8_t CoordAddrMode;
+	uint16_t CoordPANId;
+	uint32_t CoordAddress0;
+	uint32_t CoordAddress1;
+	uint8_t LogicalChannel;
+	//superframe specification field
+	uint16_t SuperframeSpec;
+	bool GTSPermit;
+	uint8_t LinkQuality;
+	uint32_t TimeStamp;
+	bool SecurityUse;
+	uint8_t ACLEntry;
+	bool SecurityFailure;
+
+}PANDescriptor;
+
+//GTS entry (used in the PAN coordinator)
+typedef struct
+{
+	uint8_t gts_id;
+	uint8_t starting_slot;
+	uint8_t length;
+	uint8_t direction;
+	uint16_t DevAddressType;
+	uint8_t expiration;
+
+}GTSinfoEntryType;
+
+//GTS entry (used in the PAN coordinator)
+typedef struct
+{
+	uint8_t gts_id;
+	uint8_t starting_slot;
+	uint8_t length;
+	uint16_t DevAddressType;
+	uint8_t persistencetime;
+
+}GTSinfoEntryType_null;
+
+typedef struct
+{
+	uint8_t handler;
+	uint16_t transaction_persistent_time;
+	
+	//MPDU frame;
+	uint8_t frame[127];
+
+}indirect_transmission_element;
+
+typedef struct gts_slot_element
+{
+	uint8_t element_count;
+	uint8_t element_in;
+	uint8_t element_out;
+	uint8_t gts_send_frame_index[GTS_SEND_BUFFER_SIZE];
+
+}gts_slot_element;
+
+
+typedef struct time_stamp32
+{
+
+uint32_t time_stamp;
+
+}time_stamp32;
+
+typedef struct time_stamp16
+{
+
+uint16_t time_stamp;
+
+}time_stamp16;
+
+//MAC ACTIVE CHANNEL SCAN REDUCED PAN DESCRIPTOR (SHOR ADDRESS ONLY)
+typedef struct SCAN_PANDescriptor
+{
+	//pag76
+	uint16_t CoordPANId;
+	uint16_t CoordAddress;
+	uint8_t LogicalChannel;
+	//superframe specification field
+	uint16_t SuperframeSpec;
+	uint8_t lqi;
+}SCAN_PANDescriptor;
+
+
+#endif
diff --git a/tos/lib/net/zigbee/ieee802154/mac/mac_enumerations.h b/tos/lib/net/zigbee/ieee802154/mac/mac_enumerations.h
new file mode 100644
index 00000000..f8004b2c
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/mac/mac_enumerations.h
@@ -0,0 +1,117 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author open-zb http://www.open-zb.net
+ * @author Andre Cunha
+ */
+ 
+#ifndef __MAC_ENUMERATIONS__
+#define __MAC_ENUMERATIONS__
+ 
+//Mac enumerations standard pag 110
+
+enum { 
+		MAC_SUCCESS = 0x00,
+        MAC_BEACON_LOSS = 0xE0,
+        MAC_CHANNEL_ACCESS_FAILURE = 0xE1,
+        MAC_DENIED = 0xE2,
+		//MLME-RESET
+        MAC_DISABLE_TRX_FAILURE = 0xE3,
+        MAC_FAILED_SECURITY_CHECK = 0xE4,
+        MAC_FRAME_TOO_LONG = 0xE5,
+        MAC_INVALID_GTS = 0xE6,
+        MAC_INVALID_HANDLE = 0xE7,
+        MAC_INVALID_PARAMETER = 0xE8,
+        MAC_NO_ACK = 0xE9,
+        MAC_NO_BEACON = 0xEA,
+        MAC_NO_DATA = 0xEB,
+        MAC_NO_SHORT_ADDRESS = 0xEC,
+        MAC_OUT_OF_CAP = 0xED,
+        MAC_PAN_ID_CONFLICT = 0xEE,
+        MAC_REALIGNMENT = 0xEF,
+        MAC_TRANSACTION_EXPIRED = 0xF0,
+        MAC_TRANSACTION_OVERFLOW = 0xF1,
+        MAC_TX_ACTIVE = 0xF2,
+        MAC_UNAVAILABLE_KEY = 0xF3,
+        MAC_UNSUPPORTED_ATTRIBUTE = 0xF4
+        };
+
+
+
+//mac dissassociation enums
+enum{
+		MAC_PAN_COORD_LEAVE = 0x01,
+        MAC_PAN_DEVICE_LEAVE = 0x02,
+
+};
+
+
+
+//mac commands enums
+enum {
+
+	CMD_ASSOCIATION_REQUEST = 0x01,
+	CMD_ASSOCIATION_RESPONSE = 0x02,
+	CMD_DISASSOCIATION_NOTIFICATION = 0x03,
+	CMD_DATA_REQUEST = 0x04,
+	CMD_PANID_CONFLICT = 0x05,
+	CMD_ORPHAN_NOTIFICATION = 0x06,
+	CMD_BEACON_REQUEST = 0x07,
+	CMD_COORDINATOR_REALIGNMENT = 0x08,
+	CMD_GTS_REQUEST = 0x09
+};
+
+
+//mac association responses
+enum {
+
+	CMD_RESP_ASSOCIATION_SUCCESSFUL = 0x00,
+	CMD_RESP_PAN_CAPACITY =0x01,
+	CMD_RESP_ACCESS_DENIED =0x02
+	
+};
+
+//MAC PIB Enumeration
+enum {
+
+	MACACKWAITDURATION = 0x40,
+	MACASSOCIATIONPERMIT=0x41,
+	MACAUTOREQUEST = 0x42,
+	MACBATTLIFEEXT=0x43,
+	MACBATTLIFEEXTPERIODS=0x44,
+	MACBEACONPAYLOAD=0x45,
+	MACMAXBEACONPAYLOADLENGTH=0x46,
+	MACBEACONORDER=0x47,
+	MACBEACONTXTIME=0x48,
+	MACBSN=0x49,
+	MACCOORDEXTENDEDADDRESS=0x4a,
+	MACCOORDSHORTADDRESS=0x4b,
+	MACDSN=0x4c,
+	MACGTSPERMIT=0x4d,
+	MACMAXCSMABACKOFFS=0x4e,
+	MACMINBE=0x4f,
+	MACPANID=0x50,
+	MACPROMISCUOUSMODE=0x51,
+	MACRXONWHENIDLE=0x52,
+	MACSHORTADDRESS=0x53,
+	MACSUPERFRAMEORDER=0x54,
+	MACTRANSACTIONPERSISTENCETIME=0x55
+
+};
+
+//gts enumerations
+enum{
+	GTS_TX_ONLY = 0x00,
+	GTS_RX_ONLY = 0x01
+};
+
+//channel scan enumerations
+enum{
+	ED_SCAN = 0x00,
+	ACTIVE_SCAN = 0x01,
+	PASSIVE_SCAN = 0x02,
+	ORPHAN_SCAN = 0x03
+};
+
+
+#endif
+
diff --git a/tos/lib/net/zigbee/ieee802154/macTDBS/MacC.nc b/tos/lib/net/zigbee/ieee802154/macTDBS/MacC.nc
new file mode 100644
index 00000000..c69b3b12
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/macTDBS/MacC.nc
@@ -0,0 +1,120 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+
+#include <Timer.h>
+
+configuration MacC {
+
+
+		//MLME  
+		provides interface MLME_START;
+		provides interface MLME_SET;
+		provides interface MLME_GET;
+		
+		provides interface MLME_ASSOCIATE;
+		provides interface MLME_DISASSOCIATE;
+		
+		provides interface MLME_BEACON_NOTIFY;
+		provides interface MLME_GTS;
+		
+		provides interface MLME_ORPHAN;
+
+		provides interface MLME_SYNC;
+		provides interface MLME_SYNC_LOSS;
+		
+		provides interface MLME_RESET;
+		
+		provides interface MLME_SCAN;
+		
+		//MCPS
+		provides interface MCPS_DATA;
+		provides interface MCPS_PURGE;
+
+}
+implementation {
+
+	components MainC;
+	MainC.SoftwareInit -> MacP;
+
+	components LedsC;
+	components MacP;
+
+	components PhyC;
+
+	components TimerAsyncC;
+	
+	MacP.TimerAsync ->TimerAsyncC;
+
+	MacP.Leds -> LedsC;
+	
+	
+	MacP.AMControl ->PhyC.SplitControl;
+	
+	components HplCC2420PinsC as Pins;
+	MacP.CCA -> Pins.CCA;
+	
+	components RandomC;
+	MacP.Random -> RandomC;
+
+	components new TimerMilliC() as T_ackwait;
+	MacP.T_ackwait -> T_ackwait;
+	
+	components new TimerMilliC() as T_ResponseWaitTime;
+	MacP.T_ResponseWaitTime -> T_ResponseWaitTime;
+	
+	components new TimerMilliC() as T_ScanDuration;
+	MacP.T_ScanDuration -> T_ScanDuration;
+
+
+	components CC2420ReceiveC;
+	MacP.AddressFilter -> CC2420ReceiveC;
+
+	//
+	//components CC2420ControlC;
+	//MacP.CC2420Config ->CC2420ControlC;
+
+
+	/*****************************************************/
+	/*				INTERFACES         					 */
+	/*****************************************************/  
+	MacP.PD_DATA -> PhyC.PD_DATA;
+	MacP.PLME_ED ->PhyC.PLME_ED;
+	MacP.PLME_CCA -> PhyC.PLME_CCA;
+	MacP.PLME_SET -> PhyC.PLME_SET;
+	MacP.PLME_GET -> PhyC.PLME_GET;
+	MacP.PLME_SET_TRX_STATE -> PhyC.PLME_SET_TRX_STATE;
+
+
+	//MLME interfaces
+	MLME_START=MacP;
+
+	MLME_SET=MacP;
+	MLME_GET=MacP;
+	
+	MLME_ASSOCIATE=MacP;
+	MLME_DISASSOCIATE=MacP;
+	
+	MLME_BEACON_NOTIFY = MacP;
+	MLME_GTS=MacP;
+	
+	MLME_ORPHAN=MacP;
+	
+	MLME_SYNC=MacP;
+	MLME_SYNC_LOSS=MacP;
+	
+	MLME_RESET=MacP;
+	
+	MLME_SCAN=MacP;
+	
+	MCPS_DATA=MacP;
+	MCPS_PURGE=MacP;
+	
+	
+	
+	
+
+}
+
diff --git a/tos/lib/net/zigbee/ieee802154/macTDBS/MacP.nc b/tos/lib/net/zigbee/ieee802154/macTDBS/MacP.nc
new file mode 100644
index 00000000..75ba457a
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/macTDBS/MacP.nc
@@ -0,0 +1,5679 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+
+#include <Timer.h>
+
+#include "printfUART.h"
+
+#include "frame_format.h"
+#include "phy_const.h"
+
+#include "mac_const.h"
+#include "mac_enumerations.h"
+
+#include "mac_func.h"
+
+module MacP {
+
+#ifndef TKN154_MAC 
+	provides interface Init;
+	
+	provides interface MLME_START;
+	provides interface MLME_SET;
+    provides interface MLME_GET;
+	
+	provides interface MLME_ASSOCIATE;
+	provides interface MLME_DISASSOCIATE;
+	
+	provides interface MLME_BEACON_NOTIFY;
+	provides interface MLME_GTS;
+	
+	provides interface MLME_ORPHAN;
+	
+	provides interface MLME_SYNC;
+	provides interface MLME_SYNC_LOSS;
+		
+	provides interface MLME_RESET;
+	
+	provides interface MLME_SCAN;
+	
+	//MCPS
+	provides interface MCPS_DATA;
+	provides interface MCPS_PURGE;
+#endif
+		
+	
+	uses interface Timer<TMilli> as T_ackwait;	
+		
+	uses interface Timer<TMilli> as	T_ResponseWaitTime;
+	
+	uses interface Timer<TMilli> as	T_ScanDuration;
+	
+	uses interface Leds;
+	
+	uses interface SplitControl as AMControl;
+	
+	uses interface Random;
+	
+	uses interface GeneralIO as CCA;
+	
+	
+	//uses interface CC2420Config;
+	
+	uses interface AddressFilter;
+	
+	//uses interface Test_send;
+	
+	uses interface TimerAsync;
+	
+	uses interface PD_DATA;
+	
+	uses interface PLME_ED;
+	uses interface PLME_CCA;
+	uses interface PLME_SET;
+	uses interface PLME_GET;
+	uses interface PLME_SET_TRX_STATE;
+
+
+  
+}
+implementation {
+ 
+/*****************************************************/
+/*				GENERAL 				 */
+/*****************************************************/  
+	/***************Variables*************************/
+	//local extended address
+	uint32_t aExtendedAddress0;
+	uint32_t aExtendedAddress1;
+
+	macPIB mac_PIB;
+
+//If the the MLME receives a start request the node becomes a pan coordinator
+	//and start transmiting beacons 
+	bool PANCoordinator = 0;
+	//(0 NO beacon transmission; 1 beacon transmission);
+	bool Beacon_enabled_PAN = 0;
+	
+	//(RESET) when the reset command arrives it checks whether or not to reset the PIB
+	bool SetDefaultPIB=0;
+	
+	//use security
+	bool SecurityEnable=0;
+	
+	//others
+	bool pending_reset=0;
+	
+	//transceiver status -every time the transceiver changes state this variable is updated
+	uint8_t trx_status;
+	
+	//defines the transmission
+	bool beacon_enabled=0;
+	
+	/***************Functions Definition***************/
+	
+	void init_MacPIB(); 
+	
+	uint8_t min(uint8_t val1, uint8_t val2);
+	
+	void init_MacCon();
+	
+	
+	task void signal_loss();
+	
+
+	void create_data_request_cmd();
+	void create_beacon_request_cmd();
+	void create_gts_request_cmd(uint8_t gts_characteristics);
+	
+	void build_ack(uint8_t sequence,uint8_t frame_pending);
+	
+	void create_data_frame(uint8_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[], uint8_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[], uint8_t msduLength, uint8_t msdu[],uint8_t msduHandle, uint8_t TxOptions,uint8_t on_gts_slot,uint8_t pan);
+
+
+
+
+/*****************************************************/	
+/*				Association 				         */
+/*****************************************************/ 
+	/***************Variables*************************/
+	uint8_t associating = 0;
+	uint8_t association_cmd_seq_num =0;
+	
+	/*association parameters*/
+	
+	uint8_t a_LogicalChannel;
+	uint8_t a_CoordAddrMode;
+	uint16_t a_CoordPANId;
+	uint32_t a_CoordAddress[2];
+	uint8_t a_CapabilityInformation;
+	bool a_securityenable;
+	
+	/***************Functions Definition***************/		
+	
+	void create_association_request_cmd(uint8_t CoordAddrMode,uint16_t CoordPANId,uint32_t CoordAddress[],uint8_t CapabilityInformation);
+
+	error_t create_association_response_cmd(uint32_t DeviceAddress[],uint16_t shortaddress, uint8_t status);
+	
+	void create_disassociation_notification_cmd(uint32_t DeviceAddress[],uint8_t disassociation_reason);
+	
+	void process_dissassociation_notification(MPDU *pdu);
+
+/*****************************************************/
+/*				Synchronization					 */
+/*****************************************************/ 
+	/***************Variables*************************/
+	//(SYNC)the device will try to track the beacon ie enable its receiver just before the espected time of each beacon
+	bool TrackBeacon=0;
+	bool beacon_processed=0;
+	//beacon loss indication
+	uint8_t beacon_loss_reason;
+	
+	//(SYNC)the device will try to locate one beacon
+	bool findabeacon=0;
+	//(SYNC)number of beacons lost before sending a Beacon-Lost indication comparing to aMaxLostBeacons
+	uint8_t missed_beacons=0;
+	//boolean variable stating if the device is synchonized with the beacon or not
+	uint8_t on_sync=0;
+	
+	uint32_t parent_offset=0x00000000;
+
+
+/*****************************************************/
+/*				GTS Variables					 */
+/*****************************************************/  
+	/***************Variables*************************/
+	
+	uint8_t gts_request=0;
+	uint8_t gts_request_seq_num=0;
+	
+	bool gts_confirm;
+	
+	uint8_t GTS_specification;
+	bool GTSCapability=1;
+	
+	uint8_t final_CAP_slot=15;
+	
+	//GTS descriptor variables, coordinator usage only
+	GTSinfoEntryType GTS_db[7];
+	uint8_t GTS_descriptor_count=0;
+	uint8_t GTS_startslot=16;
+	uint8_t GTS_id=0x01;
+
+
+	//null gts descriptors
+	GTSinfoEntryType_null GTS_null_db[7];
+	
+	uint8_t GTS_null_descriptor_count=0;
+	//uint8_t GTS_null_id=0x01;
+	
+	//node GTS variables
+	// 1 GTS for transmit
+	uint8_t s_GTSss=0;           //send gts start slot
+	uint8_t s_GTS_length=0;		 //send gts length
+	//1 GTS for receive
+	uint8_t r_GTSss=0;			 //receive gts start slot
+	uint8_t r_GTS_length=0;		 //receive gts lenght
+	
+	//used to state that the device is on its transmit slot
+	uint8_t on_s_GTS=0;
+	//used to state that the device is on its receive slot
+	uint8_t on_r_GTS=0;
+	
+	//used to determine if the next time slot is used for transmission
+	uint8_t next_on_s_GTS=0;
+	//used to determine if the next time slot is used for reception
+	uint8_t next_on_r_GTS=0;
+	
+	//variable stating if the coordinator allow GTS allocations
+	uint8_t allow_gts=1;
+	
+	//COORDINATOR GTS BUFFER 	
+	gts_slot_element gts_slot_list[7];
+	uint8_t available_gts_index[GTS_SEND_BUFFER_SIZE];
+	uint8_t available_gts_index_count;
+	
+	uint8_t coordinator_gts_send_pending_data=0;
+	uint8_t coordinator_gts_send_time_slot=0;
+	
+	//gts buffer used to store the gts messages both in COORDINATOR and NON COORDINATOR
+	norace MPDU gts_send_buffer[GTS_SEND_BUFFER_SIZE];
+	
+	//NON PAN COORDINATOR BUFFER
+	//buffering for sending
+	uint8_t gts_send_buffer_count=0;
+	uint8_t gts_send_buffer_msg_in=0;
+	uint8_t gts_send_buffer_msg_out=0;
+	uint8_t gts_send_pending_data=0;
+	
+
+	/***************Functions Definition***************/
+	
+	void process_gts_request(MPDU *pdu);	
+	void init_available_gts_index();
+	task void start_coordinator_gts_send();
+	
+	
+	//GTS FUNCTIONS
+	error_t remove_gts_entry(uint16_t DevAddressType);
+	error_t add_gts_entry(uint8_t gts_length,bool direction,uint16_t DevAddressType);
+	error_t add_gts_null_entry(uint8_t gts_length,bool direction,uint16_t DevAddressType);
+	
+	//increment the idle GTS for GTS deallocation purposes, not fully implemented yet
+	task void increment_gts_null();
+	
+	task void start_gts_send();
+	
+	
+	
+	//initialization functions
+	void init_gts_slot_list();
+	void init_GTS_null_db();
+	
+	void init_GTS_db();
+
+
+	uint32_t calculate_gts_expiration();
+	task void check_gts_expiration();
+
+
+/*****************************************************/
+/*				CHANNEL SCAN Variables				 */
+/*****************************************************/ 
+	//current_channel
+	uint8_t current_channel=0;
+
+	/***************Variables*************************/
+	//ED-SCAN variables
+	
+	bool scanning_channels;
+	
+	uint32_t channels_to_scan;
+	uint8_t current_scanning=0;
+	//uint8_t scan_count=0;
+	uint8_t scanned_values[16];
+	uint8_t scan_type;
+	
+	SCAN_PANDescriptor scan_pans[16];
+	
+	uint16_t scan_duration;
+	
+	task void data_channel_scan_indication();
+	
+/*****************************************************/
+/*				TIMER VARIABLES					 */
+/*****************************************************/  
+	/***************Variables*************************/
+	uint32_t response_wait_time;
+	
+	//Beacon Interval
+	uint32_t BI;
+	//Superframe duration
+	uint32_t SD;
+	
+	//timer variables
+	uint32_t time_slot; //backoff boundary timer
+	uint32_t backoff;  //backoff timer
+	
+	//current number of backoffs in the active period
+	uint8_t number_backoff=1;
+	uint8_t number_time_slot=0;
+	
+	bool csma_slotted=0;
+/*****************************************************/
+/*				CSMA VARIABLES					 */
+/*****************************************************/  	
+	/***************Variables*************************/	
+
+	//DEFERENCE CHANGE
+	uint8_t cca_deference = 0;
+	uint8_t backoff_deference = 0;
+	uint8_t check_csma_ca_backoff_send_conditions(uint32_t delay_backoffs);
+
+	//STEP 2
+	uint8_t delay_backoff_period;
+	bool csma_delay=0;
+	
+	bool csma_locate_backoff_boundary=0;
+	
+	bool csma_cca_backoff_boundary=0;
+	
+	//Although the receiver of the device is enabled during the channel assessment portion of this algorithm, the
+	//device shall discard any frames received during this time.
+	bool performing_csma_ca=0;
+	
+	//CSMA-CA variables
+	uint8_t BE; //backoff exponent
+	uint8_t CW; //contention window (number of backoffs to clear the channel)
+	uint8_t NB; //number of backoffs
+
+	/***************Functions Definition***************/	
+	
+	void init_csma_ca(bool slotted);
+	void perform_csma_ca();
+	task void perform_csma_ca_unslotted();
+	task void perform_csma_ca_slotted();
+	//task void start_csma_ca_slotted();
+	
+/*****************************************************/
+/*				Indirect Transmission buffers		 */
+/*****************************************************/
+	/***************Variables*************************/	
+	//indirect transmission buffer
+	norace indirect_transmission_element indirect_trans_queue[INDIRECT_BUFFER_SIZE];
+	//indirect transmission message counter
+	uint8_t indirect_trans_count=0;
+
+	/***************Functions Definition***************/	
+	
+	//function used to initialize the indirect transmission buffer
+	void init_indirect_trans_buffer();
+	//function used to search and send an existing indirect transmission message
+	void send_ind_trans_addr(uint32_t DeviceAddress[]);
+	//function used to remove an existing indirect transmission message
+	error_t remove_indirect_trans(uint8_t handler);
+	//function used to increment the transaction persistent time on each message
+	//if the transaction time expires the messages are discarded
+	void increment_indirect_trans();
+	
+/*****************************************************/
+/*				RECEIVE buffers		                  */
+/*****************************************************/  
+	/***************Variables*************************/
+	
+	//buffering variables
+	norace MPDU buffer_msg[RECEIVE_BUFFER_SIZE];
+	int current_msg_in=0;
+	int current_msg_out=0;
+	int buffer_count=0;
+
+	/***************Functions Definition***************/	
+	
+	task void data_indication();
+	
+	void indication_cmd(MPDU *pdu, int8_t ppduLinkQuality);
+	void indication_ack(MPDU *pdu, int8_t ppduLinkQuality);
+	void indication_data(MPDU *pdu, int8_t ppduLinkQuality);
+/*****************************************************/
+/*				RECEPTION AND TRANSMISSION		                  */
+/*****************************************************/  
+	
+	/***************Variables*************************/
+	
+	//buffering for sending
+	norace MPDUBuffer send_buffer[SEND_BUFFER_SIZE];
+	uint8_t send_buffer_count=0;
+	uint8_t send_buffer_msg_in=0;
+	uint8_t send_buffer_msg_out=0;
+	
+	//retransmission information
+	uint8_t send_ack_check;//ack requested in the transmitted frame
+	uint8_t retransmit_count;//retransmission count
+	uint8_t ack_sequence_number_check;//transmission sequence number
+	uint8_t send_retransmission;
+	uint8_t send_indirect_transmission;
+
+	uint8_t pending_request_data=0;
+	
+	uint8_t ackwait_period;
+	
+	uint8_t link_quality;
+	
+	norace ACK mac_ack;
+	ACK *mac_ack_ptr;
+	
+	uint32_t gts_expiration;
+
+	uint8_t I_AM_IN_CAP=0;
+	uint8_t I_AM_IN_CFP=0;
+	uint8_t I_AM_IN_IP=0;
+	
+	/***************Functions Definition***************/	
+	
+	task void send_frame_csma();
+	
+	uint8_t check_csma_ca_send_conditions(uint8_t frame_length,uint8_t frame_control1);
+
+	uint8_t check_gts_send_conditions(uint8_t frame_length);
+	
+	uint8_t calculate_ifs(uint8_t pk_length);
+
+
+
+/*****************************************************/
+/*				BEACON MANAGEMENT  		              */
+/*****************************************************/ 
+	/***************Variables*************************/
+	norace MPDU mac_beacon_txmpdu;
+	MPDU *mac_beacon_txmpdu_ptr;
+	
+	uint8_t *send_beacon_frame_ptr;
+	uint8_t send_beacon_length;
+
+	/***************Functions Definition***************/	
+	/*function to create the beacon*/
+	task void create_beacon();
+	/*function to process the beacon information*/
+	void process_beacon(MPDU *packet,uint8_t ppduLinkQuality);
+	
+
+/*****************************************************/
+/*	 Fault tolerance functions            */
+/*****************************************************/ 
+//FAULT-TOLERANCE	
+	void create_coordinator_realignment_cmd(uint32_t device_extended0, uint32_t device_extended1, uint16_t device_short_address);
+
+	void create_orphan_notification();
+	
+	void process_coordinator_realignment(MPDU *pdu);
+
+	/*******************************************/
+	/*******BEACON SCHEDULING IMPLEMENTATION****/
+	/*******************************************/
+	
+	//bolean that checks if the device is in the parent active period
+	uint8_t I_AM_IN_PARENT_CAP = 0;
+	
+	
+	//upstream buffer
+	norace MPDUBuffer upstream_buffer[UPSTREAM_BUFFER_SIZE];
+	uint8_t upstream_buffer_count=0;
+	uint8_t upstream_buffer_msg_in=0;
+	uint8_t upstream_buffer_msg_out=0;
+
+	uint8_t sending_upstream_frame=0;
+	
+	task void send_frame_csma_upstream();
+
+/***************************DEBUG FUNCTIONS******************************/
+/* This function are list functions with the purpose of debug, to use then uncomment the declatarion
+on top of this file*/
+/*
+	void list_mac_pib();
+	
+	void list_gts();
+	
+	void list_my_gts();
+	void list_gts_null();
+	*/
+	//list all the handles in the indirect transmission buffer, debug purposes
+	void list_indirect_trans_buffer();	
+			
+/***************************END DEBUG FUNCTIONS******************************/
+
+
+/***************** Init Commands ****************/
+  command error_t Init.init() {
+  
+  call AMControl.start();
+
+
+	//initialization of the beacon structure
+	mac_beacon_txmpdu_ptr = &mac_beacon_txmpdu;
+
+
+
+   atomic{
+
+	//inicialize the mac PIB
+	init_MacPIB();
+	
+	init_GTS_db();
+	
+	init_GTS_null_db();
+	
+	init_gts_slot_list();
+	
+	init_available_gts_index();
+	
+	aExtendedAddress0=TOS_NODE_ID;
+	aExtendedAddress1=TOS_NODE_ID;
+	
+
+
+	call AddressFilter.set_address(mac_PIB.macShortAddress, aExtendedAddress0, aExtendedAddress1);
+
+	call AddressFilter.set_coord_address(mac_PIB.macCoordShortAddress, mac_PIB.macPANId);
+	
+
+											
+	init_indirect_trans_buffer();
+
+
+	}
+	
+	//beacon
+	mac_beacon_txmpdu_ptr = &mac_beacon_txmpdu;
+		
+	//ack
+	mac_ack_ptr = &mac_ack;
+	
+	//Other timers, sync timers units expressed in miliseconds
+	ackwait_period = ((mac_PIB.macAckWaitDuration * 4.0 ) / 250.0) * 3;
+
+	response_wait_time = ((aResponseWaitTime * 4.0) / 250.0) * 2;
+
+	atomic{
+	
+		
+		BI = aBaseSuperframeDuration * powf(2,mac_PIB.macBeaconOrder);
+		SD = aBaseSuperframeDuration * powf(2,mac_PIB.macSuperframeOrder);
+		
+		
+		//backoff_period
+		backoff = aUnitBackoffPeriod;
+		//backoff_period_boundary
+		
+		time_slot = SD / NUMBER_TIME_SLOTS;
+			
+		call TimerAsync.set_enable_backoffs(1);	
+		call TimerAsync.set_backoff_symbols(backoff);
+		
+		call TimerAsync.set_bi_sd(BI,SD);
+		
+		call TimerAsync.start();
+	}
+
+
+printfUART_init();
+
+    return SUCCESS;
+  }
+
+  event void AMControl.startDone(error_t err) {
+    if (err == SUCCESS) {
+     	
+	call TimerAsync.start();
+		
+	}
+    else {
+      call AMControl.start();
+    }
+  }
+
+  event void AMControl.stopDone(error_t err) {
+  }
+
+
+/*****************************************************/
+/*				TIMERS FIRED       					 */
+/*****************************************************/ 
+
+async event error_t TimerAsync.before_bi_fired()
+{
+	//printfUART("bbi %i\n",call TimerAsync.get_current_ticks());
+		
+	if (mac_PIB.macBeaconOrder != mac_PIB.macSuperframeOrder )
+	{
+		if ( Beacon_enabled_PAN == 1 )
+		{
+			//
+			//post set_trx();
+			trx_status = PHY_TX_ON;
+			call PLME_SET_TRX_STATE.request(PHY_TX_ON);
+		}
+		else
+		{
+			//
+			//post set_trx();
+			trx_status = PHY_RX_ON;
+			call PLME_SET_TRX_STATE.request(PHY_RX_ON);
+		}
+	}
+	
+	//I_AM_IN_CAP = 1;
+	findabeacon = 1;
+		
+	return SUCCESS;
+}
+
+/*******************Timer BEACON INTERVAL******************/
+async event error_t TimerAsync.bi_fired()
+{
+	call Leds.led2On();
+	//call Test_send.send();
+	
+	I_AM_IN_CAP = 1;
+	I_AM_IN_IP = 0;
+	
+	//printfUART("bi\n","");
+	
+	
+	if ( Beacon_enabled_PAN == 1 )
+	{
+		//the beacon is send directly without CSMA/CA
+		call PD_DATA.request(send_beacon_length,send_beacon_frame_ptr);
+	}
+
+	number_backoff =0;
+	number_time_slot=0;
+	
+	
+	//CHECK there is the need to wait a small amount of time before checking if the beacon as been processed or not
+	//possible solition, if it receives a packet stand by for confirmation it its a beacon
+	//The device must always receive the beacon
+	if (TrackBeacon == 1) 
+	{
+		if (beacon_processed==1) 
+		{
+			beacon_processed=0;
+		}
+		else
+		{
+			//dealocate all GTS
+			//beacon loss
+
+			on_sync =0;
+			beacon_loss_reason = MAC_BEACON_LOSS;
+			
+			//TODO
+			//post signal_loss();
+		}
+	}
+	
+	post send_frame_csma();
+
+	return SUCCESS;
+}
+
+/*******************Timer SUPERFRAME DURATION******************/
+async event error_t TimerAsync.sd_fired()
+{
+	call Leds.led2Off();
+
+	//printfUART("sd\n","");
+
+	I_AM_IN_CFP = 0;
+	I_AM_IN_IP = 1;
+	
+	
+	number_backoff=0;
+	number_time_slot=0;
+	
+	
+	if (PANCoordinator == 0 && TYPE_DEVICE == ROUTER)
+	{
+		trx_status = PHY_RX_ON;
+	
+		call PLME_SET_TRX_STATE.request(PHY_RX_ON);
+	}
+	else
+	{
+		trx_status = PHY_RX_ON;
+		
+		call PLME_SET_TRX_STATE.request(PHY_RX_ON);
+		
+	}
+	
+	if (mac_PIB.macShortAddress==0xffff && TYPE_DEVICE == END_DEVICE)
+	{
+		trx_status = PHY_RX_ON;
+		
+		call PLME_SET_TRX_STATE.request(PHY_RX_ON);
+	}
+	
+	//trx_status = PHY_RX_ON;
+	//post set_trx();
+	/*
+		//turn the transceiver off
+	if (mac_PIB.macBeaconOrder != mac_PIB.macSuperframeOrder )
+	{
+		if ( mac_PIB.macRxOnWhenIdle == 0 && findabeacon == 0) 
+		{
+			trx_status = PHY_TRX_OFF;
+			post set_trx();
+		}
+		else
+		{
+			trx_status = PHY_RX_ON;
+			post set_trx();
+		}
+	}
+	//if the node is trying to synchronize
+		if (on_sync == 0 || mac_PIB.macPromiscuousMode == 1)
+	{
+		atomic{
+			trx_status = PHY_RX_ON;
+			post set_trx();
+		}
+	}
+	*/
+	if (PANCoordinator == 1)
+	{
+		//increment the gts_null descriptors
+		atomic{
+			
+				//if (GTS_null_descriptor_count > 0) post increment_gts_null();
+			
+				//if (GTS_descriptor_count >0 ) post check_gts_expiration();
+			
+				//if (indirect_trans_count > 0) increment_indirect_trans();
+				
+				//creation of the beacon
+				post create_beacon();
+		}
+		//trx_status = PHY_TRX_OFF;
+		//post set_trx();
+	}
+	else
+	{
+	//temporariamente aqui //aten��o quando for para o cluster-tree � preciso mudar para fora
+	//e necessario destinguir ZC de ZR (que tem que manter a sync com o respectivo pai)
+	if (on_sync == 0)
+	{
+		//sync not ok
+		
+		//findabeacon=1;
+		if (missed_beacons == aMaxLostBeacons)
+		{
+		
+			printfUART("sync_loss %i\n",missed_beacons);
+			//out of sync
+			post signal_loss();
+		}
+		//printfUART("out_sync %i\n",missed_beacons);
+		missed_beacons++;
+		call Leds.led1Off();
+		
+	}
+	else
+	{
+		//sync ok
+		missed_beacons=0;
+	
+		on_sync=0;
+	}
+	
+	}
+
+	//trx_status = PHY_TRX_OFF;
+	//call PLME_SET_TRX_STATE.request(PHY_TRX_OFF);
+
+	return SUCCESS;
+}
+
+/*******************Timer BEFORE TIME SLOT FIRED******************/
+async event error_t TimerAsync.before_time_slot_fired()
+{
+	on_s_GTS=0;
+	on_r_GTS=0;
+	
+	if (next_on_s_GTS == 1)
+	{	
+		on_s_GTS=1;
+		next_on_s_GTS =0;
+		trx_status = PHY_TX_ON;
+		call PLME_SET_TRX_STATE.request(PHY_TX_ON);
+		//post set_trx();
+	}
+	
+	if(next_on_r_GTS == 1)
+	{
+		on_r_GTS=1;
+		next_on_r_GTS=0;
+		trx_status = PHY_RX_ON;
+		call PLME_SET_TRX_STATE.request(PHY_RX_ON);
+		//post set_trx();
+	}
+
+return SUCCESS;
+}
+/*******************Timer TIME SLOT FIRED******************/
+async event error_t TimerAsync.time_slot_fired()
+{
+	//reset the backoff counter and increment the slot boundary
+	number_backoff=0;
+	number_time_slot++;
+		
+	//verify is there is data to send in the GTS, and try to send it
+	if(PANCoordinator == 1 && GTS_db[15-number_time_slot].direction == 1 && GTS_db[15-number_time_slot].gts_id != 0)
+	{
+		//COORDINATOR SEND DATA
+		//////////printfUART("bbck%i:%i:%i\n", (15-number_time_slot),GTS_db[15-number_time_slot].direction,gts_slot_list[15-number_time_slot].element_count);
+		
+		post start_coordinator_gts_send();
+				
+	}
+	else
+	{
+		//DEVICE SEND DATA
+		if (number_time_slot == s_GTSss && gts_send_buffer_count > 0 && on_sync == 1)//(send_s_GTSss-send_s_GTS_len) 
+		{
+				//current_time = call TimerAsync.get_total_tick_counter();
+				post start_gts_send();
+		}		
+	}
+	
+	next_on_r_GTS =0;
+	next_on_s_GTS=0;
+	
+	
+	//printfUART("ts%i %i %i\n", number_time_slot,s_GTSss,r_GTSss);
+	
+	
+	//verification if the time slot is entering the CAP
+	//GTS FIELDS PROCESSING
+	
+	if ((number_time_slot + 1) >= final_CAP_slot && (number_time_slot + 1) < 16)
+	{
+		I_AM_IN_CAP = 0;
+		I_AM_IN_CFP = 1;
+		
+		//printfUART("bts %i\n",I_AM_IN_CAP, number_time_slot); 
+	
+	atomic{
+		
+		//verification of the next time slot
+		if(PANCoordinator == 1 && number_time_slot < 15)
+		{
+		//COORDINATOR verification of the next time slot
+			if(GTS_db[14-number_time_slot].gts_id != 0x00 && GTS_db[14-number_time_slot].DevAddressType != 0x0000)
+			{	
+				if(GTS_db[14-number_time_slot].direction == 1 ) // device wants to receive
+				{
+					next_on_s_GTS =1; //PAN coord mode
+				}
+				else
+				{
+					next_on_r_GTS=1; //PAN coord mode
+				}
+			}	
+		}
+		else
+		{
+		//device verification of the next time slot
+			if( (number_time_slot +1) == s_GTSss || (number_time_slot +1) == r_GTSss )
+			{
+				//printfUART("s_GTSss: %i r_GTSss: %i\n", s_GTSss,r_GTSss);
+				if((number_time_slot + 1) == s_GTSss)
+				{	
+					//printfUART("MY SEND SLOT \n", "");
+					next_on_s_GTS =1;
+					s_GTS_length --;
+					if (s_GTS_length != 0 )
+					{
+						s_GTSss++;
+					}
+				}
+				else			
+				{
+					////////////printfUART("MY RECEIVE SLOT \n", "");
+					next_on_r_GTS =1;
+					r_GTS_length --;
+					if (r_GTS_length != 0 )
+					{
+						r_GTSss++;
+					}
+				}				
+			}
+			else
+			{
+				//idle
+				next_on_s_GTS=0;
+				next_on_r_GTS=0;
+			}
+		}
+	}
+	}
+	
+return SUCCESS;
+}
+async event error_t TimerAsync.sfd_fired()
+{
+
+return SUCCESS;
+}
+
+/*******************Timer BACKOFF PERIOD******************/
+async event error_t TimerAsync.backoff_fired()
+{
+	//slotted CSMA/CA function
+	atomic{
+	
+		if( csma_locate_backoff_boundary == 1 )
+		{
+			csma_locate_backoff_boundary=0;
+			
+			//post start_csma_ca_slotted();
+			
+			//DEFERENCE CHANGE
+			if (backoff_deference == 0)
+			{
+				//normal situation
+				delay_backoff_period = (call Random.rand16() & ((uint8_t)(powf(2,BE)) - 1));
+				
+				if (check_csma_ca_backoff_send_conditions((uint32_t) delay_backoff_period) == 1)
+				{
+					backoff_deference = 1;
+				}
+				
+			}
+			else
+			{
+				backoff_deference = 0;
+			}
+			
+			csma_delay=1;
+		}
+		
+		
+		
+		if( csma_cca_backoff_boundary == 1 )
+			post perform_csma_ca_slotted();
+	}
+	//CSMA/CA
+	atomic{
+		if(csma_delay == 1 )
+		{
+			if (delay_backoff_period == 0)
+			{
+				if(csma_slotted == 0)
+				{
+					post perform_csma_ca_unslotted();
+				}
+				else
+				{
+					//CSMA/CA SLOTTED
+					csma_delay=0;
+					csma_cca_backoff_boundary=1;
+				}
+			}
+			delay_backoff_period--;
+		}
+	}
+	number_backoff++;
+return SUCCESS;
+}
+
+/*******************T_ackwait**************************/
+  event void T_ackwait.fired() {
+  
+  ////////printfUART("Tfd \n", "");
+	
+	//call Leds.redToggle();
+
+	if (send_ack_check == 1)
+	{
+		retransmit_count++;
+		
+		if (retransmit_count == aMaxFrameRetries || send_indirect_transmission > 0)
+		{
+				//check the type of data being send
+				/*
+				if (associating == 1)
+				{
+					printfUART("af ack\n", "");
+					associating=0;
+					signal MLME_ASSOCIATE.confirm(0x0000,MAC_NO_ACK);
+				}
+				*/
+				
+			atomic{	
+				//////////printfUART("TRANSMISSION FAIL\n",""); 
+				//stardard procedure, if fail discard the packet
+				atomic send_buffer_count --;
+				send_buffer_msg_out++;
+			
+					//failsafe
+					if(send_buffer_count > SEND_BUFFER_SIZE)
+					{
+						
+						atomic send_buffer_count =0;
+						send_buffer_msg_out=0;
+						send_buffer_msg_in=0;
+						
+					}
+					
+					
+					if (send_buffer_msg_out == SEND_BUFFER_SIZE)
+						send_buffer_msg_out=0;
+					
+					if (send_buffer_count > 0)
+						post send_frame_csma();
+						
+					send_ack_check=0;
+					retransmit_count=0;
+					ack_sequence_number_check=0;
+				
+				}
+		}
+		
+		//////////printfUART("RETRY\n",""); 
+		//retransmissions
+		post send_frame_csma();
+	}
+    
+  }
+
+/*******************T_ResponseWaitTime**************************/
+  event void T_ResponseWaitTime.fired() {
+  	//command response wait time
+	//////////printfUART("T_ResponseWaitTime.fired\n", "");
+
+	if (associating == 1)
+	{
+		printfUART("af rwt\n", "");
+		associating=0;
+		signal MLME_ASSOCIATE.confirm(0x0000,MAC_NO_DATA);
+		
+	}
+  
+  }
+
+/*******************TDBS Implementation Timers**************************/
+async event error_t TimerAsync.before_start_track_beacon_fired()
+{
+	I_AM_IN_PARENT_CAP = 1;
+
+return SUCCESS;
+}
+
+
+
+//track beacon events timers
+async event error_t TimerAsync.start_track_beacon_fired()
+{
+	I_AM_IN_PARENT_CAP = 1;
+
+	//printfUART("fi\n","");
+	
+	if (upstream_buffer_count > 0)
+		post send_frame_csma_upstream();
+
+
+
+return SUCCESS;
+}
+async event error_t TimerAsync.end_track_beacon_fired()
+{
+
+	I_AM_IN_PARENT_CAP = 0;
+	
+	//printfUART("unfi\n","");
+	//call Leds.greenOff();
+
+return SUCCESS;
+}
+
+
+
+
+
+/*****************************************************
+****************PD_DATA EVENTS***********************
+******************************************************/
+  async event error_t PD_DATA.confirm(uint8_t status) {
+
+
+    return SUCCESS;     
+  }
+ 
+/*****************************************************
+****************       PD_DATA     ********************
+******************************************************/ 
+
+async event error_t PD_DATA.indication(uint8_t psduLenght,uint8_t* psdu, int8_t ppduLinkQuality){
+/*
+MPDU *packet;
+
+uint8_t destination_address=0;
+
+dest_short *dest_short_ptr;
+dest_long *dest_long_ptr;
+	
+beacon_addr_short *beacon_addr_short_ptr;
+
+*/
+atomic{
+		//if(I_AM_IN_CAP == 1 || I_AM_IN_CFP == 1 || mac_PIB.macShortAddress==0xffff || scanning_channels ==1 || findabeacon == 1)
+		//{
+			if (buffer_count > RECEIVE_BUFFER_SIZE)
+			{
+				//call Leds.redToggle();
+				printfUART("full\n","");
+			}
+			else
+			{
+		
+				/*
+				packet = (MPDU*)psdu;
+							
+				
+				switch ((packet->frame_control1 & 0x7))
+				{
+					case TYPE_BEACON:
+									beacon_addr_short_ptr = (beacon_addr_short *) &packet->data[0];
+									
+									//avoid VERIFY static assignment of coordinator parent
+									if (beacon_addr_short_ptr->source_address != mac_PIB.macCoordShortAddress)
+									{
+											printfUART("pb %x %x\n", beacon_addr_short_ptr->source_address,mac_PIB.macCoordShortAddress);
+											return SUCCESS;
+									}
+									
+									
+									
+									if ( mac_PIB.macShortAddress != 0xffff)
+									{
+										if ( beacon_addr_short_ptr->source_address != mac_PIB.macCoordShortAddress)
+										{
+											printfUART("pb %x %x\n", beacon_addr_short_ptr->source_address,mac_PIB.macCoordShortAddress);
+											return SUCCESS;
+										}
+									}
+					
+					break;
+					case TYPE_DATA:
+					case TYPE_CMD:
+									//VALIDATION OF DESTINATION ADDRESSES - NOT TO OVERLOAD THE PROCESSOR
+									destination_address=get_fc2_dest_addr(packet->frame_control2);
+				
+									if (destination_address > 1)
+									{
+										switch(destination_address)
+										{
+											case SHORT_ADDRESS: 
+																dest_short_ptr = (dest_short *) &packet->data[0];
+																
+																if ( dest_short_ptr->destination_address != 0xffff && dest_short_ptr->destination_address != mac_PIB.macShortAddress)
+																{
+																	printfUART("nsm %x %x\n", dest_short_ptr->destination_address,mac_PIB.macShortAddress); 
+																	return SUCCESS;
+																}
+																//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+																//broadcast PAN identifier (0 x ffff).
+																if(dest_short_ptr->destination_PAN_identifier != 0xffff && dest_short_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+																{
+																	printfUART("wsP %x %x \n", dest_short_ptr->destination_PAN_identifier,mac_PIB.macPANId); 
+																	return SUCCESS;
+																}
+																break;
+											
+											case LONG_ADDRESS: 
+																dest_long_ptr = (dest_long *) &packet->data[0];
+																
+																if ( dest_long_ptr->destination_address0 !=aExtendedAddress0 && dest_long_ptr->destination_address1 !=aExtendedAddress1 )
+																{
+																	printfUART("nlm %x %x \n",dest_long_ptr->destination_address0,dest_long_ptr->destination_address1); 
+																	return SUCCESS;
+																}
+																//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+																//broadcast PAN identifier (0 x ffff).
+																if(dest_long_ptr->destination_PAN_identifier != 0xffff && dest_long_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+																{
+																	printfUART("wLP %x %x\n", dest_long_ptr->destination_PAN_identifier,mac_PIB.macPANId); 
+																	return SUCCESS;
+																}
+																
+																break;
+										}
+									}
+					
+
+					
+									break;
+					case TYPE_ACK:
+				
+									break;
+				}
+						
+				*/
+				memcpy(&buffer_msg[current_msg_in],psdu,sizeof(MPDU));
+
+				atomic{
+					current_msg_in++;
+				
+					if ( current_msg_in == RECEIVE_BUFFER_SIZE ) 
+						current_msg_in = 0;
+		
+					buffer_count ++;
+				}
+				
+				link_quality = ppduLinkQuality;
+				
+				if (scanning_channels ==1)
+				{
+					//channel scan operation, accepts beacons only
+					post data_channel_scan_indication();
+				
+				}
+				else
+				{
+				//normal operation
+					post data_indication();
+				}
+			}
+		//}
+		//else
+		//{
+		//	printfUART("drop\n","");
+		//}
+}
+return SUCCESS;
+}
+
+
+
+task void data_indication()
+{
+	//check all the conditions for a receiver packet
+    //pag 155
+ 
+	uint8_t link_qual;
+	
+	atomic link_qual = link_quality;
+
+	//printfUART("data_indication\n","");
+	////////printfUART("buf  %i %i\n",buffer_count,indirect_trans_count);
+
+	//Although the receiver of the device is enabled during the channel assessment portion of this algorithm, the
+	//device shall discard any frames received during this time.
+	////////////printfUART("performing_csma_ca: %i\n",performing_csma_ca);
+	if (performing_csma_ca == 1)
+	{	
+		////////////printfUART("REJ CSMA\n","");
+		atomic{ 
+			buffer_count--;
+		
+			current_msg_out++;
+		if ( current_msg_out == RECEIVE_BUFFER_SIZE )	
+			current_msg_out = 0;
+			}
+		
+		return;
+    }
+	
+	//while performing channel scan disable the packet reception
+	if ( scanning_channels == 1)
+	{	
+		atomic{ 
+			buffer_count--;
+	
+			current_msg_out++;
+		if ( current_msg_out == RECEIVE_BUFFER_SIZE )	
+			current_msg_out = 0;
+			}
+		return;
+	}	
+atomic{
+
+    ////printfUART("data ind %x %x %i\n",buffer_msg[current_msg_out].frame_control1,buffer_msg[current_msg_out].frame_control2,(buffer_msg[current_msg_out].frame_control2 & 0x7));
+	
+	//check the frame type of the received packet
+	switch( (buffer_msg[current_msg_out].frame_control1 & 0x7) )
+	{
+		
+			case TYPE_DATA: //printfUART("rd %i\n",buffer_msg[current_msg_out].seq_num);
+							indication_data(&buffer_msg[current_msg_out],link_qual);
+							break;
+							
+			case TYPE_ACK: //printfUART("ra\n","");
+							//ack_received = 1;
+							indication_ack(&buffer_msg[current_msg_out],link_qual);
+							
+							break;
+							
+			case TYPE_CMD:  //printfUART("rc\n","");
+							indication_cmd(&buffer_msg[current_msg_out],link_qual);
+							break;
+			
+			case TYPE_BEACON:
+							
+							//printfUART("rb %i\n",buffer_msg[current_msg_out].seq_num);
+							if (mac_PIB.macShortAddress == 0x0000) 
+							{
+								buffer_count--;
+							}
+							else
+							{
+								process_beacon(&buffer_msg[current_msg_out],link_qual);
+								
+							}
+
+							break;
+			default: 
+						atomic buffer_count--;
+						////printfUART("Invalid frame type\n","");
+
+						break;
+	}
+	atomic{
+			current_msg_out++;
+		if ( current_msg_out == RECEIVE_BUFFER_SIZE )	
+			current_msg_out = 0;
+		}
+	}
+	return;
+}
+
+
+
+/*****************************************************
+****************PLME_ED EVENTS***********************
+******************************************************/ 
+event error_t PLME_CCA.confirm(uint8_t status){
+return SUCCESS;
+}
+   
+   
+event error_t PLME_SET.confirm(uint8_t status, uint8_t PIBAttribute){   
+return SUCCESS;
+}
+ 
+async event error_t PLME_SET_TRX_STATE.confirm(uint8_t status){
+
+return SUCCESS;
+}    
+   
+event error_t PLME_GET.confirm(uint8_t status,uint8_t PIBAttribute, uint8_t PIBAttributeValue){
+   
+return SUCCESS;
+}    
+
+event error_t PLME_ED.confirm(uint8_t status,int8_t EnergyLevel){
+
+return SUCCESS;
+}
+
+/*******************************************************************************************************/
+/*******************************************************************************************************/
+/*******************************************************************************************************/
+/****************************************PACKET PROCESSING FUNCTIONS************************************/
+/*******************************************************************************************************/
+/*******************************************************************************************************/
+/*******************************************************************************************************/
+
+void process_beacon(MPDU *packet,uint8_t ppduLinkQuality)
+{
+
+	/*
+	ORGANIZE THE PROCESS BEACON FUNCION AS FOLLOWS.
+	1- GET THE BEACON ORDER
+	2- GET THE SUPERFRAME ORDER
+	3- GET THE FINAL CAP SLOT
+	4 - COMPUTE SD, BI, TS, BACKOFF PERIOD IN MILLISECONDS
+	
+	4- SYNCHRONIZE THE NODE BY DOING THE FOLLOWING
+		- SET A TIMER IN MS FOR THE FINAL TIME SLOT (SUPERFRAME DURATION) : IT EXPRIES AFTER SD - TX TIME - PROCESS TIME
+		- SET A TIMER IN MS FOR THE GTS IF ANY EXIST IT EXPRIES AFTER GTS_NBR * TIME_SLOT - TX TIME - PROCESS TIME 
+	*/
+	uint32_t SO_EXPONENT;
+	uint32_t BO_EXPONENT;
+	int i=0;
+	uint16_t gts_descriptor_addr;
+	uint8_t data_count;
+	
+	uint8_t gts_directions;
+	uint8_t gts_des_count;
+	
+	uint8_t gts_ss;
+	uint8_t gts_l;
+	uint8_t dir;
+	uint8_t dir_mask;
+
+	//end gts variables
+
+	//function that processes the received beacon
+	beacon_addr_short *beacon_ptr;
+	
+	PANDescriptor pan_descriptor;
+
+	// beacon_trans_delay = (((packet->length(bytes) * 8.0) / 250.00(bits/s) ) / 0.34(s) (timer_granularity) ) (symbols)
+
+	//pending frames
+	uint8_t short_addr_pending=0;
+	uint8_t long_addr_pending=0;
+
+	//used in the synchronization
+	//uint32_t process_tick_counter; //symbols
+	
+	//uint32_t becon_trans_delay; //symbols
+	//uint32_t start_reset_ct; //number of clock ticks since the start of the beacon interval
+	
+	//used in the track beacon
+	beacon_processed = 1;
+	missed_beacons=0;
+	
+	//initializing pointer to data structure
+	beacon_ptr = (beacon_addr_short*) (packet->data);
+	
+	
+		//decrement buffer count
+	atomic buffer_count --;
+	
+	//printfUART("Received Beacon\n","");
+	//printfUART("rb panid: %x %x \n",beacon_ptr->source_address,mac_PIB.macCoordShortAddress);
+	//////printfUART("My macPANID: %x\n",mac_PIB.macPANId);
+	printfUART("rb %x %x\n",beacon_ptr->source_address,mac_PIB.macCoordShortAddress);
+	if( beacon_ptr->source_address != mac_PIB.macCoordShortAddress)
+	{
+		printfUART("nmp \n","");
+		return;
+	}
+	//printfUART("bea %i\n",call TimerAsync.get_current_ticks());
+	
+	/**********************************************************************************/
+	/*					PROCESSING THE SUPERFRAME STRUCTURE							  */
+	/**********************************************************************************/
+	
+	if (PANCoordinator == 0)
+	{
+		mac_PIB.macBeaconOrder = get_beacon_order(beacon_ptr->superframe_specification);
+		mac_PIB.macSuperframeOrder = get_superframe_order(beacon_ptr->superframe_specification);
+		
+		//mac_PIB.macCoordShortAddress = beacon_ptr->source_address;
+		
+		//printfUART("BO,SO:%i %i\n",mac_PIB.macBeaconOrder,mac_PIB.macSuperframeOrder);
+		
+		//mac_PIB.macPANId = beacon_ptr->source_PAN_identifier;
+		
+		//beacon order check if it changed
+		if (mac_PIB.macSuperframeOrder == 0)
+		{
+			SO_EXPONENT = 1;
+		}
+		else
+		{
+			SO_EXPONENT = powf(2,mac_PIB.macSuperframeOrder);
+		}
+		
+		if ( mac_PIB.macBeaconOrder ==0)
+		{
+			BO_EXPONENT =1;
+		}
+		else
+		{
+				BO_EXPONENT = powf(2,mac_PIB.macBeaconOrder);
+		}
+		BI = aBaseSuperframeDuration * BO_EXPONENT; 
+		SD = aBaseSuperframeDuration * SO_EXPONENT; 
+		
+		//backoff_period
+		backoff = aUnitBackoffPeriod;
+		time_slot = SD / NUMBER_TIME_SLOTS;
+		
+		call TimerAsync.set_bi_sd(BI,SD);
+	}	
+		
+	/**********************************************************************************/
+	/*							PROCESS GTS CHARACTERISTICS							  */
+	/**********************************************************************************/
+		allow_gts =1;
+	
+		//initializing the gts variables
+		s_GTSss=0;
+		s_GTS_length=0;
+		
+		r_GTSss=0;
+		r_GTS_length=0;
+		
+		/*
+		send_s_GTSss=0;  
+		send_r_GTSss=0;	
+		send_s_GTS_len=0;
+		send_r_GTS_len=0;
+		*/
+		final_CAP_slot = 15;
+
+
+		gts_des_count = (packet->data[8] & 0x0f);
+		
+		data_count = 9;
+		
+		final_CAP_slot = 15 - gts_des_count;
+		
+		if (gts_des_count > 0 )
+		{
+		data_count = 10; //position of the current data count
+		//process descriptors
+		
+			gts_directions = packet->data[9];
+			
+			//printfUART("gts_directions:%x\n",gts_directions);
+			
+			for(i=0; i< gts_des_count; i++)
+			{	
+				gts_descriptor_addr = (uint16_t) packet->data[data_count];
+					
+				//printfUART("gts_des_addr:%x mac short:%x\n",gts_descriptor_addr,mac_PIB.macShortAddress);
+				
+				data_count = data_count+2;
+				//check if it concerns me
+				if (gts_descriptor_addr == mac_PIB.macShortAddress)
+				{
+					//confirm the gts request
+					////////////printfUART("packet->data[data_count]: %x\n",packet->data[data_count]);
+					//gts_ss = 15 - get_gts_descriptor_ss(packet->data[data_count]);
+					gts_ss = get_gts_descriptor_ss(packet->data[data_count]);
+					gts_l = get_gts_descriptor_len(packet->data[data_count]);
+
+					if ( i == 0 )
+					{
+						dir_mask=1;
+					}
+					else
+					{
+					
+							dir_mask = powf(2,i);
+					}
+					////////////printfUART("dir_mask: %x i: %x gts_directions: %x \n",dir_mask,i,gts_directions);
+					dir = ( gts_directions & dir_mask);
+					if (dir == 0)
+					{
+						s_GTSss=gts_ss;
+						s_GTS_length=gts_l;
+					}
+					else
+					{
+
+						r_GTSss=gts_ss;
+						r_GTS_length=gts_l;
+					}
+					
+					//printfUART("PB gts_ss: %i gts_l: %i dir: %i \n",gts_ss,gts_l,dir);
+					////////////printfUART("PB send_s_GTSss: %i send_s_GTS_len: %i\n",send_s_GTSss,send_s_GTS_len);
+					
+					if ( gts_l == 0 )
+					{
+						allow_gts=0;
+					}
+
+					if (gts_confirm == 1 && gts_l != 0)
+					{
+						//signal ok
+						//printfUART("gts confirm \n","");
+						gts_confirm =0;
+						signal MLME_GTS.confirm(GTS_specification,MAC_SUCCESS);
+					}
+					else
+					{
+						//signal not ok
+						////////////printfUART("gts not confirm \n","");
+						gts_confirm =0;
+						signal MLME_GTS.confirm(GTS_specification,MAC_DENIED);
+					}
+					
+				}
+				data_count++;	
+			}
+		}
+	
+	/**********************************************************************************/
+	/*							PROCESS PENDING ADDRESSES INFORMATION				  */
+	/**********************************************************************************/	
+		//this should pass to the network layer
+		
+		
+		short_addr_pending=get_number_short(packet->data[data_count]);
+		long_addr_pending=get_number_extended(packet->data[data_count]);
+		
+		//////////printfUART("ADD COUNT %i %i\n",short_addr_pending,long_addr_pending);
+		
+		data_count++;
+		
+		if(short_addr_pending > 0)
+		{
+			for(i=0;i < short_addr_pending;i++)
+			{
+				//////////printfUART("PB %i %i\n",(uint16_t)packet->data[data_count],short_addr_pending);
+				
+				//if(packet->data[data_count] == (uint8_t)mac_PIB.macShortAddress && packet->data[data_count+1] == (uint8_t)(mac_PIB.macShortAddress >> 8) )
+				if((uint16_t)packet->data[data_count] == mac_PIB.macShortAddress)
+				{
+					
+					create_data_request_cmd();
+				}
+				data_count = data_count + 2;
+			}
+		}
+		if(long_addr_pending > 0)
+		{
+			for(i=0; i < long_addr_pending;i++)
+			{
+				if((uint32_t)packet->data[data_count] == aExtendedAddress0 && (uint32_t)packet->data[data_count + 4] == aExtendedAddress1)
+				{
+					
+					data_count = data_count + 8;
+
+				}
+			
+			}
+		}
+
+	/**********************************************************************************/
+	/*				BUILD the PAN descriptor of the COORDINATOR						  */
+	/**********************************************************************************/
+		
+		
+	   //Beacon NOTIFICATION
+	   //BUILD the PAN descriptor of the COORDINATOR
+		//assuming that the adress is short
+		pan_descriptor.CoordAddrMode = SHORT_ADDRESS;
+		pan_descriptor.CoordPANId = 0x0000;//beacon_ptr->source_PAN_identifier;
+		pan_descriptor.CoordAddress0=0x00000000;
+		pan_descriptor.CoordAddress1=mac_PIB.macCoordShortAddress;
+		pan_descriptor.LogicalChannel=current_channel;
+		//superframe specification field
+		pan_descriptor.SuperframeSpec = beacon_ptr->superframe_specification;
+		
+		pan_descriptor.GTSPermit=mac_PIB.macGTSPermit;
+		pan_descriptor.LinkQuality=0x00;
+		pan_descriptor.TimeStamp=0x000000;
+		pan_descriptor.SecurityUse=0;
+		pan_descriptor.ACLEntry=0x00;
+		pan_descriptor.SecurityFailure=0x00;
+	   
+		//I_AM_IN_CAP = 1;
+	   
+	/**********************************************************************************/
+	/*								SYNCHRONIZING									  */
+	/**********************************************************************************/
+
+	//processing time + beacon transmission delay
+	
+	//removed not used
+	//process_tick_counter = call TimerAsync.get_process_frame_tick_counter();
+	//removed not used	
+	//start_reset_ct = ((1000 * (packet->length * 8.0) / 250)) / 69.54;  //(process_tick_counter - receive_tick_counter);
+
+	if(PANCoordinator == 0)
+	{
+			I_AM_IN_CAP = 1;
+			I_AM_IN_IP = 0;
+			
+			//call Leds.yellowOn();
+			call Leds.led2On();
+			
+			call Leds.led1On();
+			
+			if(findabeacon == 1)
+			{
+				//printfUART("findabeacon\n", "");
+				call TimerAsync.set_timers_enable(1);
+				findabeacon =0;
+			}
+			
+			//#ifdef PLATFORM_MICAZ
+			//number_time_slot = call TimerAsync.reset_start(start_reset_ct+process_tick_counter+52);// //SOBI=3 52 //SOBI=0 15
+			//#else
+			
+			//call TimerAsync.reset();
+			
+			number_time_slot = call TimerAsync.reset_start(75);   //95 old val sem print
+					
+			// +process_tick_counter+52 //SOBI=3 52 //SOBI=0 
+			//#endif
+			on_sync=1;
+			
+			printfUART("sE\n", "");
+	}
+	else
+	{
+		I_AM_IN_PARENT_CAP = 1;
+		
+		call TimerAsync.set_track_beacon(1);
+		
+		//#ifdef PLATFORM_MICAZ
+		//	call TimerAsync.set_track_beacon_start_ticks(parent_offset,0x00001E00,(start_reset_ct+process_tick_counter+18));
+		//#else
+			call TimerAsync.set_track_beacon_start_ticks(parent_offset,0x00001E00,4);//(start_reset_ct)
+		//#endif
+		
+		printfUART("sP \n", "");
+	}
+	
+	call Leds.led1Toggle();
+	signal MLME_BEACON_NOTIFY.indication((uint8_t)packet->seq_num,pan_descriptor,0, 0, mac_PIB.macBeaconPayloadLenght, packet->data);
+		
+return;
+}
+
+
+void process_gts_request(MPDU *pdu)
+{
+		error_t status;
+		cmd_gts_request *mac_gts_request;
+		
+		mac_gts_request= (cmd_gts_request*) &pdu->data;
+		
+atomic{		
+		if ( get_characteristic_type(mac_gts_request->gts_characteristics) == 1)
+		{
+		//allocation
+	
+	//process the gts request
+		status = add_gts_entry(get_gts_length(mac_gts_request->gts_characteristics),get_gts_direction(mac_gts_request->gts_characteristics),mac_gts_request->source_address);
+		
+		}
+		else
+		{
+		//dealocation
+	
+		status = remove_gts_entry(mac_gts_request->source_address);
+		}
+		
+		signal MLME_GTS.indication(mac_gts_request->source_address, mac_gts_request->gts_characteristics, 0, 0);
+		
+		}
+
+return;
+}
+/****************DATA indication functions******************/
+
+void indication_data(MPDU *pdu, int8_t ppduLinkQuality)
+{
+	uint8_t data_len;
+	
+	uint8_t payload[80];
+	uint8_t msdu_length=0;
+	
+	//int i;
+	
+	uint32_t SrcAddr[2];
+	uint32_t DstAddr[2];
+	
+	
+	//frame control variables
+	uint8_t source_address=0;
+	uint8_t destination_address=0;
+
+
+	dest_short *dest_short_ptr;
+	dest_long *dest_long_ptr;
+	
+	source_short *source_short_ptr;
+	source_long *source_long_ptr;
+
+	//implement the intra PAN data messages
+	//intra_pan_source_short *intra_pan_source_short_ptr;
+	//intra_pan_source_long *intra_pan_source_long_ptr;
+	
+	
+	source_address=get_fc2_source_addr(pdu->frame_control2);
+	destination_address=get_fc2_dest_addr(pdu->frame_control2);
+	
+	//decrement buffer count
+	atomic buffer_count --;
+	
+	SrcAddr[0]=0x00000000;
+	SrcAddr[1]=0x00000000;
+	DstAddr[0]=0x00000000;
+	DstAddr[1]=0x00000000;
+
+
+	//printfUART("id %i %i \n",source_address,destination_address);
+
+
+	if ( get_fc1_intra_pan(pdu->frame_control1)== 0 )
+	{
+	//INTRA PAN
+		if (destination_address > 1 && source_address > 1)
+		{
+			// Destination LONG - Source LONG	
+			if (destination_address == LONG_ADDRESS && source_address == LONG_ADDRESS)
+			{
+				dest_long_ptr = (dest_long *) &pdu->data[0];
+				source_long_ptr = (source_long *) &pdu->data[DEST_LONG_LEN];
+				
+				//If a short destination address is included in the frame, it shall match either macShortAddress or the
+				//broadcast address (0 x ffff). Otherwise, if an extended destination address is included in the frame, it
+				//shall match aExtendedAddress.
+				if ( dest_long_ptr->destination_address0 !=aExtendedAddress0 && dest_long_ptr->destination_address1 !=aExtendedAddress1 )
+				{
+					//////////printfUART("data rejected, ext destination not for me\n", ""); 
+					return;
+				}
+				//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+				//broadcast PAN identifier (0 x ffff).
+				if(dest_long_ptr->destination_PAN_identifier != 0xffff && dest_long_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+				{
+					//////////printfUART("data rejected, wrong destination PAN\n", ""); 
+					return;
+				}
+				data_len = 20;
+				
+				
+				DstAddr[1] = dest_long_ptr->destination_address0;
+				DstAddr[0] =dest_long_ptr->destination_address1;
+				
+				SrcAddr[1] =source_long_ptr->source_address0;
+				SrcAddr[0] =source_long_ptr->source_address1;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+				
+				signal MCPS_DATA.indication((uint16_t)source_address, (uint16_t)source_long_ptr->source_PAN_identifier, SrcAddr,(uint16_t)destination_address, (uint16_t)dest_long_ptr->destination_PAN_identifier, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+				
+			}
+			
+			// Destination SHORT - Source LONG
+			if ( destination_address == SHORT_ADDRESS && source_address == LONG_ADDRESS )
+			{
+				dest_short_ptr = (dest_short *) &pdu->data[0];
+				source_long_ptr = (source_long *) &pdu->data[DEST_SHORT_LEN];
+				
+				//If a short destination address is included in the frame, it shall match either macShortAddress or the
+				//broadcast address (0 x ffff). Otherwise, if an extended destination address is included in the frame, it
+				//shall match aExtendedAddress.
+				if ( dest_short_ptr->destination_address != 0xffff && dest_short_ptr->destination_address != mac_PIB.macShortAddress)
+				{
+					//////////printfUART("data rejected, short destination not for me\n", ""); 
+					return;
+				}
+				//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+				//broadcast PAN identifier (0 x ffff).
+				if(dest_short_ptr->destination_PAN_identifier != 0xffff && dest_short_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+				{
+					//////////printfUART("data rejected, wrong destination PAN\n", ""); 
+					return;
+				}
+				
+				data_len = 14;
+				
+				DstAddr[0] =dest_short_ptr->destination_address;
+				
+				SrcAddr[1] =source_long_ptr->source_address0;
+				SrcAddr[0] =source_long_ptr->source_address1;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+				
+				signal MCPS_DATA.indication((uint16_t)source_address, (uint16_t)source_long_ptr->source_PAN_identifier, SrcAddr,(uint16_t)destination_address, (uint16_t)dest_short_ptr->destination_PAN_identifier, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+			}
+			// Destination LONG - Source SHORT
+			if ( destination_address == LONG_ADDRESS && source_address == SHORT_ADDRESS )
+			{
+				dest_long_ptr = (dest_long *) &pdu->data[0];
+				source_short_ptr = (source_short *) &pdu->data[DEST_LONG_LEN];
+				
+				//If a short destination address is included in the frame, it shall match either macShortAddress or the
+				//broadcast address (0 x ffff). Otherwise, if an extended destination address is included in the frame, it
+				//shall match aExtendedAddress.
+				if ( dest_long_ptr->destination_address0 !=aExtendedAddress0 && dest_long_ptr->destination_address1 !=aExtendedAddress1 )
+				{
+					//////////printfUART("data rejected, ext destination not for me\n", ""); 
+					return;
+				}
+				//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+				//broadcast PAN identifier (0 x ffff).
+				if(dest_long_ptr->destination_PAN_identifier != 0xffff && dest_long_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+				{
+					//////////printfUART("data rejected, wrong destination PAN\n", ""); 
+					return;
+				}
+				
+				data_len = 14;
+				
+				DstAddr[1] = dest_long_ptr->destination_address0;
+				DstAddr[0] =dest_long_ptr->destination_address1;
+				
+				
+				SrcAddr[0] =source_short_ptr->source_address;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+				
+				signal MCPS_DATA.indication((uint16_t)source_address, (uint16_t)source_short_ptr->source_PAN_identifier, SrcAddr,(uint16_t)destination_address, (uint16_t)dest_long_ptr->destination_PAN_identifier, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+			}
+			
+			
+			//Destination SHORT - Source SHORT
+			if ( destination_address == SHORT_ADDRESS && source_address == SHORT_ADDRESS )	
+			{
+				dest_short_ptr = (dest_short *) &pdu->data[0];
+				source_short_ptr = (source_short *) &pdu->data[DEST_SHORT_LEN];
+				
+				//If a short destination address is included in the frame, it shall match either macShortAddress or the
+				//broadcast address (0 x ffff). Otherwise, if an extended destination address is included in the frame, it
+				//shall match aExtendedAddress.
+				if ( dest_short_ptr->destination_address != 0xffff && dest_short_ptr->destination_address != mac_PIB.macShortAddress)
+				{
+					//printfUART("data rejected, short destination not for me\n", ""); 
+					return;
+				}
+				//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+				//broadcast PAN identifier (0 x ffff).
+				if(dest_short_ptr->destination_PAN_identifier != 0xffff && dest_short_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+				{
+					//printfUART("SH SH data rejected, wrong destination PAN %x\n",mac_PIB.macPANId ); 
+					return;
+				}
+				
+				data_len = 8;
+				
+				if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+				{
+					build_ack(pdu->seq_num,0);
+				}
+				
+				DstAddr[0] =dest_short_ptr->destination_address;
+				
+				SrcAddr[0] =source_short_ptr->source_address;
+				
+				msdu_length = (pdu->length - 5) - data_len;
+				
+				
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+			
+				signal MCPS_DATA.indication((uint16_t)source_address, (uint16_t)source_short_ptr->source_PAN_identifier, SrcAddr,(uint16_t)destination_address, (uint16_t)dest_short_ptr->destination_PAN_identifier, DstAddr, (uint16_t)msdu_length,payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+			}
+		}
+		
+		/*********NO DESTINATION ADDRESS PRESENT ****************/
+		
+		if ( destination_address == 0 && source_address > 1 )
+		{
+				
+			if (source_address == LONG_ADDRESS)
+			{//Source LONG
+				source_long_ptr = (source_long *) &pdu->data[0];
+				
+				//If only source addressing fields are included in a data or MAC command frame, the frame shall be
+				//accepted only if the device is a PAN coordinator and the source PAN identifier matches macPANId.
+				if ( PANCoordinator==0 || source_long_ptr->source_PAN_identifier != mac_PIB.macPANId )
+				{
+					//////////printfUART("data rejected, im not pan\n", ""); 
+					return;
+				}
+				
+				data_len = 10;
+				
+				SrcAddr[1] =source_long_ptr->source_address0;
+				SrcAddr[0] =source_long_ptr->source_address1;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+				
+				signal MCPS_DATA.indication((uint16_t)source_address,(uint16_t)source_long_ptr->source_PAN_identifier, SrcAddr,(uint16_t)destination_address, 0x0000, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+			}
+			else
+			{//Source SHORT
+
+				source_short_ptr = (source_short *) &pdu->data[0];
+				//If only source addressing fields are included in a data or MAC command frame, the frame shall be
+				//accepted only if the device is a PAN coordinator and the source PAN identifier matches macPANId.
+				if ( PANCoordinator==0 || source_short_ptr->source_PAN_identifier != mac_PIB.macPANId )
+				{
+					//////////printfUART("data rejected, im not pan\n", ""); 
+					return;
+				}
+				
+				data_len = 4;
+
+				
+				SrcAddr[0] =source_short_ptr->source_address;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+				
+				signal MCPS_DATA.indication((uint16_t)source_address, (uint16_t)source_short_ptr->source_PAN_identifier, SrcAddr,(uint16_t)destination_address, 0x0000, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+			}
+		}
+		/*********NO SOURCE ADDRESS PRESENT ****************/
+		
+		if ( destination_address > 1 && source_address == 0 )
+		{
+			if (destination_address == LONG_ADDRESS)
+			{//Destination LONG
+				dest_long_ptr = (dest_long *) &pdu->data[0];
+				
+				//If a short destination address is included in the frame, it shall match either macShortAddress or the
+				//broadcast address (0 x ffff). Otherwise, if an extended destination address is included in the frame, it
+				//shall match aExtendedAddress.
+				if ( dest_long_ptr->destination_address0 !=aExtendedAddress0 && dest_long_ptr->destination_address1 !=aExtendedAddress1 )
+				{
+					//////////printfUART("data rejected, ext destination not for me\n", ""); 
+					return;
+				}
+				//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+				//broadcast PAN identifier (0 x ffff).
+				if(dest_long_ptr->destination_PAN_identifier != 0xffff && dest_long_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+				{
+					//////////printfUART("data rejected, wrong destination PAN\n", ""); 
+					return;
+				}
+				
+				data_len = 10;
+				
+				DstAddr[1] = dest_long_ptr->destination_address0;
+				DstAddr[0] =dest_long_ptr->destination_address1;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+			
+				signal MCPS_DATA.indication((uint16_t)source_address,0x0000, SrcAddr,(uint16_t)destination_address, (uint16_t)dest_long_ptr->destination_PAN_identifier, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+			}
+			else
+			{//Destination SHORT
+				dest_short_ptr = (dest_short *) &pdu->data[0];
+				
+				//If a short destination address is included in the frame, it shall match either macShortAddress or the
+				//broadcast address (0 x ffff). Otherwise, if an extended destination address is included in the frame, it
+				//shall match aExtendedAddress.
+				if ( dest_short_ptr->destination_address != 0xffff && dest_short_ptr->destination_address != mac_PIB.macShortAddress)
+				{
+					//////////printfUART("data rejected, short destination not for me\n", ""); 
+					return;
+				}
+				//If a destination PAN identifier is included in the frame, it shall match macPANId or shall be the
+				//broadcast PAN identifier (0 x ffff).
+				if(dest_short_ptr->destination_PAN_identifier != 0xffff && dest_short_ptr->destination_PAN_identifier != mac_PIB.macPANId )
+				{
+					//////////printfUART("data rejected, wrong destination PAN\n", ""); 
+					return;
+				}
+				
+				data_len = 4;
+				
+				DstAddr[0] =dest_short_ptr->destination_address;
+				
+				msdu_length = pdu->length - data_len;
+
+				memcpy(&payload,&pdu->data[data_len],msdu_length * sizeof(uint8_t));
+				
+				
+				signal MCPS_DATA.indication((uint16_t)source_address,0x0000, SrcAddr,(uint16_t)destination_address, (uint16_t)dest_short_ptr->destination_PAN_identifier, DstAddr, (uint16_t)msdu_length, payload, (uint16_t)ppduLinkQuality, 0x0000,0x0000);  
+
+				data_len = 4;
+			}
+		}
+		
+	}
+	else
+	{
+	//intra_pan == 1
+	
+	
+	
+	}
+	
+	
+return;
+}
+
+void indication_cmd(MPDU *pdu, int8_t ppduLinkQuality)
+{
+		uint8_t cmd_type;
+		//uint8_t pk_ptr;
+		uint8_t addressing_fields_length=0;
+		
+		uint32_t SrcAddr[2];
+		//uint32_t DstAddr[2];//NOT USED SO FAR
+		
+		//frame control variables
+		uint8_t source_address=0;
+		uint8_t destination_address=0;
+	
+		//NOT USED SO FAR
+		//dest_short *dest_short_ptr;
+		//dest_long *dest_long_ptr;
+		//NOT USED SO FAR
+		//source_short *source_short_ptr;
+		source_long *source_long_ptr;
+		
+		dest_short *dest_short_ptr;
+		dest_long *dest_long_ptr;
+		
+		//CHECK IMPLEMENT
+		//intra_pan_source_short *intra_pan_source_short_ptr; 
+		//intra_pan_source_long *intra_pan_source_long_ptr;
+		
+		destination_address=get_fc2_dest_addr(pdu->frame_control2);
+		source_address=get_fc2_source_addr(pdu->frame_control2);
+		
+		//decrement buffer count
+		atomic buffer_count --;
+		
+		switch(destination_address)
+		{
+			case LONG_ADDRESS: addressing_fields_length = DEST_LONG_LEN;
+								dest_long_ptr = (dest_long *) &pdu->data[0];
+								if(dest_long_ptr->destination_address0 !=aExtendedAddress0 && dest_long_ptr->destination_address1 !=aExtendedAddress1)
+								{
+									printfUART("NOT FOR ME","");
+									return;
+								}
+								
+								break;
+			case SHORT_ADDRESS: addressing_fields_length = DEST_SHORT_LEN;
+								dest_short_ptr= (dest_short *) &pdu->data[0];
+								//destination command not for me
+								if (dest_short_ptr->destination_address != mac_PIB.macShortAddress && dest_short_ptr->destination_address !=0xffff)
+								{
+									printfUART("NOT FOR ME","");
+									//////////printfUART("NOT FOR ME %x me %e\n", dest_short_ptr->destination_address,mac_PIB.macShortAddress); 
+									return;
+								}
+								break;
+		}
+		switch(source_address)
+		{
+			case LONG_ADDRESS: addressing_fields_length = addressing_fields_length + SOURCE_LONG_LEN;
+								break;
+			case SHORT_ADDRESS: addressing_fields_length = addressing_fields_length + SOURCE_SHORT_LEN;
+								break;
+		}
+
+		cmd_type = pdu->data[addressing_fields_length];
+		
+				
+		switch(cmd_type)
+		{
+		
+		case CMD_ASSOCIATION_REQUEST: 	
+									//check if association is allowed, if not discard the frame		
+									
+									//////printfUART("CMD_ASSOCIATION_REQUEST \n", "");
+									
+										
+											if (mac_PIB.macAssociationPermit == 0 )
+											{
+												//////////printfUART("Association not alowed\n", "");
+												if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+												{
+													build_ack(pdu->seq_num,0);
+												}
+												return;
+											}
+											
+											if ( PANCoordinator==0 )
+											{
+												//////////printfUART("i�m not a pan\n", ""); 
+												return;
+											}
+									atomic{
+											source_long_ptr = (source_long *) &pdu->data[DEST_SHORT_LEN];
+											
+											SrcAddr[1] =source_long_ptr->source_address0;
+											SrcAddr[0] =source_long_ptr->source_address1;
+											
+											
+											signal MLME_ASSOCIATE.indication(SrcAddr, pdu->data[addressing_fields_length+1] , 0, 0);
+
+											}
+											
+											if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+											{
+												build_ack(pdu->seq_num,1);
+											}	
+
+											
+									break;
+		
+		case CMD_ASSOCIATION_RESPONSE: atomic{
+												printfUART("CMD_ASSOCIATION_RESPONSE\n", ""); 
+												
+												associating =0;
+												call T_ResponseWaitTime.stop();
+												
+												if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+												{
+													build_ack(pdu->seq_num,0);
+												}
+											
+												signal MLME_ASSOCIATE.confirm((uint16_t)(pdu->data[addressing_fields_length+1] + (pdu->data[addressing_fields_length+2] << 8)), pdu->data[addressing_fields_length+3]);
+												}
+										break;
+
+		case CMD_DISASSOCIATION_NOTIFICATION: 	//////////printfUART("Received CMD_DISASSOCIATION_NOTIFICATION\n", ""); 
+												
+												if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+												{
+													build_ack(pdu->seq_num,0);
+												}
+												
+												process_dissassociation_notification(pdu);
+												break;
+		case CMD_DATA_REQUEST: 
+								//printfUART("CMD_DATA_REQUEST\n", ""); 
+									//////printfUART("DR\n", "");
+									if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+									{
+										//TODO
+										//Problems with consecutive reception of messages
+										
+										build_ack(pdu->seq_num,0);
+									}
+									
+									//cmd_data_request_0_3_reception = (cmd_data_request_0_3 *) pdu->data;
+									
+									source_long_ptr = (source_long *) &pdu->data[0];
+											
+									SrcAddr[1] =source_long_ptr->source_address0;
+									SrcAddr[0] =source_long_ptr->source_address1;
+									
+									send_ind_trans_addr(SrcAddr);
+
+								break;
+		case CMD_PANID_CONFLICT:
+								break;
+								
+		case CMD_ORPHAN_NOTIFICATION:
+									//printfUART("CMD_ORPHAN_NOTIFICATION\n", ""); 
+									
+									source_long_ptr = (source_long *) &pdu->data[DEST_SHORT_LEN];
+											
+									SrcAddr[1] =source_long_ptr->source_address0;
+									SrcAddr[0] =source_long_ptr->source_address1;
+									
+									signal MLME_ORPHAN.indication(SrcAddr, 0x00,0x00);
+								
+		
+								break;
+		case CMD_BEACON_REQUEST:
+								break;
+		case CMD_COORDINATOR_REALIGNMENT:
+									printfUART("CMD_COORDINATOR_REALIGNMENT\n", ""); 
+									
+									process_coordinator_realignment(pdu);
+									
+								break;
+		case CMD_GTS_REQUEST: 	
+								////////////printfUART("Received CMD_GTS_REQUEST\n", ""); 
+								if ( get_fc1_ack_request(pdu->frame_control1) == 1 ) 
+								{
+									build_ack(pdu->seq_num,0);
+								}
+								process_gts_request(pdu);
+								break;
+		default: break;
+
+		}
+
+return;
+}
+
+void indication_ack(MPDU *pdu, int8_t ppduLinkQuality)
+{
+	//decrement buffer count
+
+	atomic buffer_count --;
+
+	////////////printfUART("ACK Received\n",""); 
+	
+	atomic{
+			if (send_ack_check == 1 && ack_sequence_number_check == pdu->seq_num)
+			{
+				//transmission SUCCESS
+				call T_ackwait.stop();
+				
+				send_buffer_count --;
+				send_buffer_msg_out++;
+				
+				//failsafe
+				if(send_buffer_count > SEND_BUFFER_SIZE)
+				{
+					send_buffer_count =0;
+					send_buffer_msg_out=0;
+					send_buffer_msg_in=0;
+				}
+				
+				if (send_buffer_msg_out == SEND_BUFFER_SIZE)
+					send_buffer_msg_out=0;
+				
+				//received an ack for the association request
+				if( associating == 1 && association_cmd_seq_num == pdu->seq_num )
+				{
+					//////////printfUART("ASSOC ACK\n",""); 
+					call T_ResponseWaitTime.startOneShot(response_wait_time);
+					//call T_ResponseWaitTime.start(TIMER_ONE_SHOT, response_wait_time);
+				}
+				
+				if (gts_request == 1 && gts_request_seq_num == pdu->seq_num)
+				{
+				
+					call T_ResponseWaitTime.startOneShot(response_wait_time);
+					//call T_ResponseWaitTime.start(TIMER_ONE_SHOT, response_wait_time);
+				}
+				
+				//////////printfUART("TRANSMISSION SUCCESS\n",""); 
+
+				if (send_indirect_transmission > 0 )
+				{	//the message send was indirect
+					//remove the message from the indirect transmission queue
+					indirect_trans_queue[send_indirect_transmission-1].handler=0x00;
+					indirect_trans_count--;
+					//////////printfUART("SU id:%i ct:%i\n", send_indirect_transmission,indirect_trans_count);
+				}
+				
+				send_ack_check=0;
+				retransmit_count=0;
+				ack_sequence_number_check=0;
+				
+				
+				if (send_buffer_count > 0)
+					post send_frame_csma();
+				
+				
+			}
+		}
+	
+			//CHECK
+		if (get_fc1_frame_pending(pdu->frame_control1) == 1 && pending_request_data ==1)// && associating == 1
+		{		
+				//////////printfUART("Frame_pending\n",""); 
+				pending_request_data=0;
+				create_data_request_cmd();
+		}
+		
+		//GTS mechanism, after the confirmation of the GTS request, must check if the beacon has the gts
+		/*
+		if (gts_ack == 1)
+		{
+			gts_ack=0;
+			gts_confirm=1;
+			call T_ResponseWaitTime.stop();
+		
+		}
+	*/
+		if(gts_send_pending_data==1)
+			post start_gts_send();
+		
+		if(coordinator_gts_send_pending_data==1 && coordinator_gts_send_time_slot == number_time_slot)
+			post start_coordinator_gts_send();
+	
+return;
+}
+
+
+void process_dissassociation_notification(MPDU *pdu)
+{
+atomic{
+		cmd_disassociation_notification *mac_disassociation_notification;
+		
+		//creation of a pointer to the disassociation notification structure
+		mac_disassociation_notification = (cmd_disassociation_notification*) pdu->data;									
+
+		signal MLME_DISASSOCIATE.indication(&mac_disassociation_notification->source_address0, mac_disassociation_notification->disassociation_reason, 0, 0);
+		}
+
+return;
+}
+
+
+
+
+void process_coordinator_realignment(MPDU *pdu)
+{
+
+atomic{
+	cmd_coord_realignment *cmd_realignment = 0;
+	
+	dest_long *dest_long_ptr=0;
+	source_short *source_short_ptr=0;
+
+	cmd_realignment = (cmd_coord_realignment*) &pdu->data[DEST_LONG_LEN + SOURCE_SHORT_LEN];
+	
+	//creation of a pointer the addressing structures
+	dest_long_ptr = (dest_long *) &pdu->data[0];
+	source_short_ptr = (source_short *) &pdu->data[DEST_LONG_LEN];
+		
+	mac_PIB.macCoordShortAddress = ((cmd_realignment->coordinator_short_address0 << 8) | cmd_realignment->coordinator_short_address0 );
+	mac_PIB.macShortAddress = cmd_realignment->short_address;
+	
+	
+	printfUART("PCR %i %i\n",mac_PIB.macCoordShortAddress,mac_PIB.macShortAddress); 
+	
+	}
+return;
+}
+
+
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+/************************		BUILD FRAMES FUNCTIONS   			**********************************/
+/*****************************************************************************************************/ 
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+
+
+task void create_beacon()
+{
+	int i=0;
+	uint8_t packet_length = 25;
+	int data_count=0;
+	int pending_data_index=0;
+	MPDU* pkt_ptr=0;
+	//pending frames
+	uint8_t short_addr_pending=0;
+	uint8_t long_addr_pending=0;
+		
+	uint8_t gts_directions=0x00;
+	
+	uint16_t frame_control;
+
+	
+	atomic{
+		
+		beacon_addr_short *mac_beacon_addr_short_ptr;
+		//mac_beacon_addr_short_ptr = (beacon_addr_short*) &mac_txmpdu.data[0];
+		mac_beacon_addr_short_ptr = (beacon_addr_short*) &mac_beacon_txmpdu.data[0];
+		//call PLME_SET_TRX_STATE.request(PHY_TX_ON);
+		
+		mac_beacon_txmpdu_ptr->length = 15;
+		
+		frame_control = set_frame_control(TYPE_BEACON,0,0,0,1,SHORT_ADDRESS,SHORT_ADDRESS);
+		
+		mac_beacon_txmpdu_ptr->frame_control1 = (uint8_t)( frame_control);
+		
+		mac_beacon_txmpdu_ptr->frame_control2 = (uint8_t)( frame_control >> 8);
+		
+		//mac_beacon_txmpdu_ptr->frame_control = set_frame_control(TYPE_BEACON,0,0,0,1,SHORT_ADDRESS,SHORT_ADDRESS);
+		mac_beacon_txmpdu_ptr->seq_num = mac_PIB.macBSN;
+		mac_PIB.macBSN++;
+		
+		
+		//relocation error
+		mac_beacon_addr_short_ptr->destination_PAN_identifier= mac_PIB.macPANId;
+		//relocation error
+		mac_beacon_addr_short_ptr->destination_address = 0xffff;
+		//relocation error
+		mac_beacon_addr_short_ptr->source_address = mac_PIB.macShortAddress;
+		if (mac_PIB.macShortAddress == 0x0000)
+		{	//the device is the PAN Coordinator
+			mac_beacon_addr_short_ptr->superframe_specification = set_superframe_specification(mac_PIB.macBeaconOrder,(uint8_t)mac_PIB.macSuperframeOrder,final_CAP_slot,0,1,mac_PIB.macAssociationPermit);
+		}
+		else
+		{
+			mac_beacon_addr_short_ptr->superframe_specification = set_superframe_specification(mac_PIB.macBeaconOrder,(uint8_t)mac_PIB.macSuperframeOrder,final_CAP_slot,0,1,mac_PIB.macAssociationPermit);
+		}
+		
+		mac_beacon_txmpdu_ptr->data[8] = set_gts_specification(GTS_descriptor_count,mac_PIB.macGTSPermit);
+		
+		mac_beacon_txmpdu_ptr->data[9] = set_pending_address_specification(short_addr_pending,long_addr_pending);
+		
+		data_count = 9;
+		packet_length = 15;
+		
+		
+		//BUILDING the GTS DESCRIPTORS
+		if( (GTS_descriptor_count + GTS_null_descriptor_count) > 0 )
+		{
+			data_count++;
+					
+			for(i=0; i< 7 ; i++)
+			{
+				if( GTS_db[i].gts_id != 0x00 && GTS_db[i].DevAddressType != 0x0000) 
+				{
+					
+					mac_beacon_txmpdu_ptr->data[data_count] = GTS_db[i].DevAddressType;
+					////////////printfUART("B gts %i\n", (GTS_db[i].DevAddressType >> 8 ) ); 
+					
+					data_count++;
+					mac_beacon_txmpdu_ptr->data[data_count] = (GTS_db[i].DevAddressType >> 8 );
+					////////////printfUART("B gts %i\n",  GTS_db[i].DevAddressType ); 
+					
+					data_count++;
+					
+					mac_beacon_txmpdu_ptr->data[data_count] = set_gts_descriptor(15-i,GTS_db[i].length);
+					data_count++;
+					////printfUART("B gts %i\n", set_gts_descriptor(GTS_db[i].starting_slot,GTS_db[i].length) ); 
+					
+					packet_length = packet_length + 3;
+					
+					if ( GTS_db[i].direction == 1 )
+					{
+						gts_directions = gts_directions | (1 << i); 
+					}
+					else
+					{
+						gts_directions = gts_directions | (0 << i); 
+					}
+					////printfUART("dir %i\n", gts_directions); 
+				}
+			}
+			mac_beacon_txmpdu_ptr->data[9] = gts_directions;
+			//CHECK
+			packet_length++;
+			//BUILDING the NULL GTS DESCRIPTORS
+			if ( GTS_null_descriptor_count > 0 )
+			{
+				for(i=0; i< 7 ; i++)
+				{
+					if( GTS_null_db[i].DevAddressType != 0x0000) 
+					{
+						mac_beacon_txmpdu_ptr->data[data_count] = GTS_null_db[i].DevAddressType;
+						////////////printfUART("B gts %i\n", (GTS_db[i].DevAddressType >> 8 ) ); 
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count] = (GTS_null_db[i].DevAddressType >> 8 );
+						////////////printfUART("B gts %i\n",  GTS_db[i].DevAddressType ); 
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count] = 0x00;
+						data_count++;
+						////////////printfUART("B gts %i\n", set_gts_descriptor(GTS_db[i].starting_slot,GTS_db[i].length) ); 
+						packet_length = packet_length +3;
+					}
+				}
+			}
+			//resetting the GTS specification field
+			mac_beacon_txmpdu_ptr->data[8] = set_gts_specification(GTS_descriptor_count + GTS_null_descriptor_count,mac_PIB.macGTSPermit);
+			
+
+		}
+
+			pending_data_index = data_count;
+			data_count++;
+		//IMPLEMENT PENDING ADDRESSES
+		//temporary
+		//indirect_trans_count =0;
+		
+		if (indirect_trans_count > 0 )
+		{
+				//IMPLEMENT THE PENDING ADDRESSES CONSTRUCTION
+
+			for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+			{
+				if (indirect_trans_queue[i].handler > 0x00)
+				{
+					pkt_ptr = (MPDU *)&indirect_trans_queue[i].frame;
+					//ADD INDIRECT TRANSMISSION DESCRIPTOR
+					if(get_fc2_dest_addr(pkt_ptr->frame_control2) == SHORT_ADDRESS)
+					{
+						short_addr_pending++;
+						packet_length = packet_length + 2;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[2];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[3];
+						data_count++;
+					}
+				}
+			}
+			for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+			{
+				if (indirect_trans_queue[i].handler > 0x00)
+				{
+					if(get_fc2_dest_addr(pkt_ptr->frame_control2) == LONG_ADDRESS)
+					{
+						long_addr_pending++;
+						packet_length = packet_length + 8;
+
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[0];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[1];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[2];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[3];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[4];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[5];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[6];
+						data_count++;
+						mac_beacon_txmpdu_ptr->data[data_count]=pkt_ptr->data[7];
+						data_count++;
+						
+					}
+				}
+			}
+				
+		}
+		mac_beacon_txmpdu_ptr->data[pending_data_index] = set_pending_address_specification(short_addr_pending,long_addr_pending);
+		
+		/*
+		//adding the beacon payload
+		if (mac_PIB.macBeaconPayloadLenght > 0 )
+		{
+			for (i=0;i < mac_PIB.macBeaconPayloadLenght;i++)
+			{
+				mac_beacon_txmpdu_ptr->data[data_count] = mac_PIB.macBeaconPayload[i];
+				data_count++;
+				packet_length++;
+			}
+		
+		
+		}
+		*/
+		mac_beacon_txmpdu_ptr->data[data_count] = 0x12;
+		data_count++;
+		packet_length++;
+		mac_beacon_txmpdu_ptr->data[data_count] = 0x34;
+		data_count++;
+		packet_length++;
+		
+		//short_addr_pending=0;
+		//long_addr_pending=0;
+		
+		mac_beacon_txmpdu_ptr->length = packet_length;
+		
+		send_beacon_length = packet_length;
+		
+		send_beacon_frame_ptr = (uint8_t*)mac_beacon_txmpdu_ptr;
+		}
+}
+
+
+void create_data_frame(uint8_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[], uint8_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[], uint8_t msduLength, uint8_t msdu[],uint8_t msduHandle, uint8_t TxOptions,uint8_t on_gts_slot,uint8_t pan)
+{
+	
+	int i_indirect_trans=0;
+
+	dest_short *dest_short_ptr;
+	dest_long *dest_long_ptr;
+	
+	source_short *source_short_ptr;
+	source_long *source_long_ptr;
+
+	//intra_pan_source_short *intra_pan_source_short_ptr;
+	//intra_pan_source_long *intra_pan_source_long_ptr;
+	
+	//CHECK
+	uint8_t intra_pan=0;
+	uint8_t data_len=0;
+	
+	uint8_t current_gts_element_count=0;
+	
+	MPDU *frame_pkt=0;
+	
+	uint16_t frame_control;
+	
+	//printfUART("create df\n","");
+	
+	//decision of the buffer where to store de packet creation
+	if (on_gts_slot > 0 )
+	{
+	
+		if (PANCoordinator == 1)
+		{
+		//setting the coordinator gts frame pointer
+			
+			//get the number of frames in the gts_slot_list
+			atomic current_gts_element_count = gts_slot_list[15-on_gts_slot].element_count;
+			
+			//////////printfUART("element count %i\n",gts_slot_list[15-on_gts_slot].element_count);
+			
+			if (current_gts_element_count  == GTS_SEND_BUFFER_SIZE || available_gts_index_count == 0)
+			{
+				//////////printfUART("FULL\n","");
+				signal MCPS_DATA.confirm(0x00, MAC_TRANSACTION_OVERFLOW);
+				return;
+			}
+			else
+			{
+				frame_pkt = (MPDU *) &gts_send_buffer[available_gts_index[available_gts_index_count]];
+			}
+			
+		}
+		else
+		{
+		//setting the device gts frame pointer
+			////////////printfUART("start creation %i %i %i \n",gts_send_buffer_count,gts_send_buffer_msg_in,gts_send_buffer_msg_out);
+		
+			if(gts_send_buffer_count == GTS_SEND_BUFFER_SIZE)
+			{
+				signal MCPS_DATA.confirm(0x00, MAC_TRANSACTION_OVERFLOW);
+				return;
+			}
+			if (gts_send_buffer_msg_in == GTS_SEND_BUFFER_SIZE)
+				gts_send_buffer_msg_in=0;
+			
+				frame_pkt = (MPDU *) &gts_send_buffer[gts_send_buffer_msg_in];
+		
+		}
+	}
+	else
+	{
+	
+		if ( get_txoptions_indirect_transmission(TxOptions) == 1)
+		{
+			
+			//CREATE THE INDIRECT TRANSMISSION PACKET POINTER
+			//check if the is enough space to store the indirect transaction
+			if (indirect_trans_count == INDIRECT_BUFFER_SIZE)
+			{
+				signal MCPS_DATA.confirm(0x00, MAC_TRANSACTION_OVERFLOW);
+				//////////printfUART("buffer full %i\n", indirect_trans_count);
+				return;
+			}
+			
+			for(i_indirect_trans=0;i_indirect_trans<INDIRECT_BUFFER_SIZE;i_indirect_trans++)
+			{
+				if (indirect_trans_queue[i_indirect_trans].handler == 0x00)
+				{
+					frame_pkt = (MPDU *) &indirect_trans_queue[i_indirect_trans].frame;
+					break;
+				}
+			}
+			
+			
+		}
+		else
+		{
+			//CREATE NORMAL TRANSMISSION PACKET POINTER
+				////printfUART("sb  %i\n", send_buffer_count);
+			atomic{
+			
+			//TDBS Implementation
+			if (get_txoptions_upstream_buffer(TxOptions) == 1)
+			{
+				////printfUART("sel up\n", "");
+				
+				if (upstream_buffer_count > UPSTREAM_BUFFER_SIZE)
+					return;
+				
+				if(upstream_buffer_msg_in == UPSTREAM_BUFFER_SIZE)
+					upstream_buffer_msg_in=0;
+				
+				frame_pkt = (MPDU *) &upstream_buffer[upstream_buffer_msg_in];
+				
+			}
+			else
+			{
+
+				////printfUART("sb  %i\n", send_buffer_count);
+			
+				if ((send_buffer_count +1) > SEND_BUFFER_SIZE)	
+					return;
+			
+				if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+					send_buffer_msg_in=0;
+		
+				frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+			}
+			
+			}
+			
+
+		}
+	}
+	
+atomic{
+
+	if (intra_pan == 0 )
+	{
+	
+		if ( DstAddrMode > 1 && SrcAddrMode > 1 )
+		{
+			// Destination LONG - Source LONG	
+			if (DstAddrMode == LONG_ADDRESS && SrcAddrMode == LONG_ADDRESS)
+			{
+				dest_long_ptr = (dest_long *) &frame_pkt->data[0];
+				source_long_ptr = (source_long *) &frame_pkt->data[DEST_LONG_LEN];
+				
+				dest_long_ptr->destination_PAN_identifier=DestPANId;
+				dest_long_ptr->destination_address0=DstAddr[1];
+				dest_long_ptr->destination_address1=DstAddr[0];
+				
+				source_long_ptr->source_PAN_identifier=SrcPANId;
+				source_long_ptr->source_address0=SrcAddr[1];
+				source_long_ptr->source_address1=SrcAddr[0];
+				
+				data_len = 20;
+			}
+			
+			// Destination SHORT - Source LONG
+			if ( DstAddrMode == SHORT_ADDRESS && SrcAddrMode == LONG_ADDRESS )
+			{
+				dest_short_ptr = (dest_short *) &frame_pkt->data[0];
+				source_long_ptr = (source_long *) &frame_pkt->data[DEST_SHORT_LEN];
+				
+				dest_short_ptr->destination_PAN_identifier=DestPANId;
+				dest_short_ptr->destination_address=(uint16_t)DstAddr[1];
+				
+				source_long_ptr->source_PAN_identifier=SrcPANId;
+				source_long_ptr->source_address0=SrcAddr[1];
+				source_long_ptr->source_address1=SrcAddr[0];
+				
+				data_len = 14;
+			}
+			// Destination LONG - Source SHORT
+			if ( DstAddrMode == LONG_ADDRESS && SrcAddrMode == SHORT_ADDRESS )
+			{
+				dest_long_ptr = (dest_long *) &frame_pkt->data[0];
+				source_short_ptr = (source_short *) &frame_pkt->data[DEST_LONG_LEN];
+				
+				dest_long_ptr->destination_PAN_identifier=DestPANId;
+				dest_long_ptr->destination_address0=DstAddr[1];
+				dest_long_ptr->destination_address1=DstAddr[0];
+				
+				source_short_ptr->source_PAN_identifier=SrcPANId;
+				source_short_ptr->source_address=(uint16_t)SrcAddr[1];
+				
+				data_len = 14;
+			}
+			
+			
+			//Destination SHORT - Source SHORT
+			if ( DstAddrMode == SHORT_ADDRESS && SrcAddrMode == SHORT_ADDRESS )	
+			{
+				dest_short_ptr = (dest_short *) &frame_pkt->data[0];
+				source_short_ptr = (source_short *) &frame_pkt->data[DEST_SHORT_LEN];
+				
+				dest_short_ptr->destination_PAN_identifier=DestPANId;
+				dest_short_ptr->destination_address=(uint16_t)DstAddr[1];
+				
+				source_short_ptr->source_PAN_identifier=SrcPANId;
+				source_short_ptr->source_address=(uint16_t)SrcAddr[1];
+				
+				data_len = 8;
+			}
+		}
+		
+		if ( DstAddrMode == 0 && SrcAddrMode > 1 )
+		{
+				
+			if (SrcAddrMode == LONG_ADDRESS)
+			{//Source LONG
+				source_long_ptr = (source_long *) &frame_pkt->data[0];
+				
+				source_long_ptr->source_PAN_identifier=SrcPANId;
+				source_long_ptr->source_address0=SrcAddr[1];
+				source_long_ptr->source_address1=SrcAddr[0];
+				
+				data_len = 10;
+			}
+			else
+			{//Source SHORT
+
+				source_short_ptr = (source_short *) &frame_pkt->data[0];
+				
+				source_short_ptr->source_PAN_identifier=SrcPANId;
+				source_short_ptr->source_address=(uint16_t)SrcAddr[1];
+				
+				data_len = 4;
+			}
+		}
+		
+		if ( DstAddrMode > 1 && SrcAddrMode == 0 )
+		{
+			if (DstAddrMode == LONG_ADDRESS)
+			{//Destination LONG
+				dest_long_ptr = (dest_long *) &frame_pkt->data[0];
+		
+				dest_long_ptr->destination_PAN_identifier=DestPANId;
+				dest_long_ptr->destination_address0=DstAddr[1];
+				dest_long_ptr->destination_address1=DstAddr[0];
+
+				data_len = 10;
+			}
+			else
+			{//Destination SHORT
+				dest_short_ptr = (dest_short *) &frame_pkt->data[0];
+
+				dest_short_ptr->destination_PAN_identifier=DestPANId;
+				dest_short_ptr->destination_address=(uint16_t)DstAddr[1];
+				
+				data_len = 4;
+			}
+		}
+	}
+	else
+	{
+	//intra_pan == 1
+
+	}
+		
+		memcpy(&frame_pkt->data[data_len],&msdu[0],msduLength*sizeof(uint8_t));
+		
+		if(on_gts_slot > 0)
+		{
+			//preparing a GTS transmission
+			
+			////////////printfUART("GTS send slt: %i count %i %u\n",on_gts_slot,gts_slot_list[15-on_gts_slot].element_count,mac_PIB.macDSN);
+			frame_pkt->length = data_len + msduLength + MPDU_HEADER_LEN;
+			
+			frame_control = set_frame_control(TYPE_DATA,0,0,1,intra_pan,DstAddrMode,SrcAddrMode);
+			frame_pkt->frame_control1 =(uint8_t)( frame_control);
+			frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+			
+			frame_pkt->seq_num = mac_PIB.macDSN;
+			mac_PIB.macDSN++;
+						
+			//ADDING DATA TO THE GTS BUFFER
+			atomic{
+					if (PANCoordinator == 1)
+					{
+						gts_slot_list[15-on_gts_slot].element_count ++;
+						gts_slot_list[15-on_gts_slot].gts_send_frame_index[gts_slot_list[15-on_gts_slot].element_in] = available_gts_index[available_gts_index_count];
+						//gts_slot_list[15-on_gts_slot].length = frame_pkt->length;
+						
+						gts_slot_list[15-on_gts_slot].element_in ++;
+						
+						if (gts_slot_list[15-on_gts_slot].element_in == GTS_SEND_BUFFER_SIZE)
+							gts_slot_list[15-on_gts_slot].element_in=0;
+						
+						available_gts_index_count --;
+						
+						//current_gts_pending_frame++;
+					}
+					else
+					{
+						gts_send_buffer_count++;
+						gts_send_buffer_msg_in++;
+						////////////printfUART("end c %i %i %i \n",gts_send_buffer_count,gts_send_buffer_msg_in,gts_send_buffer_msg_out);
+					}
+			}
+		}
+		else
+		{
+			//////////printfUART("CSMA send %i\n", get_txoptions_ack(TxOptions));
+			frame_pkt->length = data_len + msduLength + MPDU_HEADER_LEN;
+			//frame_pkt->frame_control = set_frame_control(TYPE_DATA,0,0,get_txoptions_ack(TxOptions),intra_pan,DstAddrMode,SrcAddrMode);
+			
+			frame_control = set_frame_control(TYPE_DATA,0,0,get_txoptions_ack(TxOptions),intra_pan,DstAddrMode,SrcAddrMode);
+			frame_pkt->frame_control1 =(uint8_t)( frame_control);
+			frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+			
+			frame_pkt->seq_num = mac_PIB.macDSN;
+			
+			//////printfUART("sqn %i\n", mac_PIB.macDSN);
+			
+			mac_PIB.macDSN++;
+			
+			if ( get_txoptions_indirect_transmission(TxOptions) == 1)
+			{
+					indirect_trans_queue[i_indirect_trans].handler = indirect_trans_count + 1;
+					indirect_trans_queue[i_indirect_trans].transaction_persistent_time = 0x0000;
+	
+					indirect_trans_count++;
+	
+					//////////printfUART("ADDED HDL: %i ADDR: %i\n",indirect_trans_count,DstAddr[1]); 
+			}
+			else
+			{
+				if (get_txoptions_upstream_buffer(TxOptions) == 1)
+				{
+					upstream_buffer[upstream_buffer_msg_in].retransmission =0;
+					upstream_buffer[upstream_buffer_msg_in].indirect =0;
+				
+					upstream_buffer_count++;
+					
+					upstream_buffer_msg_in++;
+					
+					//printfUART("up bc %i\n", upstream_buffer_count);
+					post send_frame_csma_upstream();
+					
+				}
+				else
+				{
+				
+					//enable retransmissions
+					send_buffer[send_buffer_msg_in].retransmission = 1;
+					send_buffer[send_buffer_msg_in].indirect = 0;
+					
+					send_buffer_count++;
+					
+					send_buffer_msg_in++;
+					
+					post send_frame_csma();
+				}
+					
+			}
+			
+		}
+		
+	}
+return;
+}
+
+
+error_t create_association_response_cmd(uint32_t DeviceAddress[],uint16_t shortaddress, uint8_t status)
+{
+
+	cmd_association_response *mac_association_response;
+	dest_long *dest_long_ptr;
+	source_long *source_long_ptr;
+	
+	int i=0;
+	
+	MPDU *frame_pkt=0;
+	
+	uint16_t frame_control;
+	
+	//atomic{
+	/*
+			if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+	
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+	*/
+	
+	//check if the is enough space to store the indirect transaction
+	if (indirect_trans_count == INDIRECT_BUFFER_SIZE)
+	{
+		printfUART("i full","");
+		return MAC_TRANSACTION_OVERFLOW;
+	}
+	
+	for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+	{
+		if (indirect_trans_queue[i].handler == 0x00)
+		{
+			//memcpy(&indirect_trans_queue[i].frame,frame_ptr,sizeof(MPDU));
+			frame_pkt = (MPDU *) &indirect_trans_queue[i].frame;
+			printfUART("found slot","");
+			break;
+		}
+	}
+	
+	//creation of a pointer to the association response structure
+	dest_long_ptr = (dest_long *) &frame_pkt->data[0];
+	source_long_ptr = (source_long *) &frame_pkt->data[DEST_LONG_LEN];
+	
+	mac_association_response = (cmd_association_response *) &frame_pkt->data[DEST_LONG_LEN + SOURCE_LONG_LEN];									
+	
+	frame_pkt->length = 29;
+	//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,1,0,LONG_ADDRESS,LONG_ADDRESS);
+	
+	frame_control = set_frame_control(TYPE_CMD,0,0,1,0,LONG_ADDRESS,LONG_ADDRESS);
+	
+	frame_pkt->frame_control1 =(uint8_t)( frame_control);
+	frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+	
+	frame_pkt->seq_num = mac_PIB.macDSN;
+	mac_PIB.macDSN++;
+	
+	dest_long_ptr->destination_PAN_identifier = mac_PIB.macPANId;
+
+	dest_long_ptr->destination_address0 = DeviceAddress[1];
+	dest_long_ptr->destination_address1 = DeviceAddress[0];
+	
+	source_long_ptr->source_PAN_identifier = mac_PIB.macPANId;
+	
+	source_long_ptr->source_address0 = aExtendedAddress0;
+	source_long_ptr->source_address1 = aExtendedAddress1;
+
+	mac_association_response->command_frame_identifier = CMD_ASSOCIATION_RESPONSE;
+	
+	//mac_association_response->short_address = shortaddress;
+	mac_association_response->short_address1 = (uint8_t)(shortaddress);
+	mac_association_response->short_address2 = (uint8_t)(shortaddress >> 8);
+
+
+	mac_association_response->association_status = status;
+/*
+
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+			}	
+		post send_frame_csma();
+*/
+	printfUART("ASS RESP S: %i\n",shortaddress); 
+
+	indirect_trans_queue[i].handler = indirect_trans_count+1;
+
+	indirect_trans_queue[i].transaction_persistent_time = 0x0000;
+	
+	indirect_trans_count++;
+	
+	printfUART("IAD\n", "");
+
+return MAC_SUCCESS;
+}
+
+
+void create_association_request_cmd(uint8_t CoordAddrMode,uint16_t CoordPANId,uint32_t CoordAddress[],uint8_t CapabilityInformation)
+{
+atomic{
+
+		cmd_association_request *cmd_association_request_ptr;
+		dest_short *dest_short_ptr;
+		source_long *source_long_ptr;
+	
+		MPDU *frame_pkt=0;
+		
+		uint16_t frame_control;
+		
+		if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+	
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+		
+		//creation of a pointer to the association response structure
+		dest_short_ptr = (dest_short *) &frame_pkt->data[0];
+		source_long_ptr = (source_long *) &frame_pkt->data[DEST_SHORT_LEN];
+		
+		cmd_association_request_ptr = (cmd_association_request *) &send_buffer[send_buffer_msg_in].data[DEST_SHORT_LEN + SOURCE_LONG_LEN];
+		
+		frame_pkt->length = 21;
+		//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,1,0,SHORT_ADDRESS,LONG_ADDRESS);
+		
+		frame_control = set_frame_control(TYPE_CMD,0,0,1,0,SHORT_ADDRESS,LONG_ADDRESS);
+		frame_pkt->frame_control1 =(uint8_t)( frame_control);
+		frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		
+		frame_pkt->seq_num = mac_PIB.macDSN;
+		
+		association_cmd_seq_num =  mac_PIB.macDSN;
+		
+		mac_PIB.macDSN++;
+		
+		//enable retransmissions
+		send_buffer[send_buffer_msg_in].retransmission =1;
+		send_buffer[send_buffer_msg_in].indirect = 0;
+		
+		dest_short_ptr->destination_PAN_identifier = CoordPANId; //mac_PIB.macPANId;
+		
+		if (CoordAddrMode == SHORT_ADDRESS )
+		{
+			dest_short_ptr->destination_address = (uint16_t)(CoordAddress[1] & 0x000000ff) ;  //mac_PIB.macPANId;
+		}
+		else
+		{
+		//CHECK
+		
+		//implement the long address version
+		
+		}
+		
+		source_long_ptr->source_PAN_identifier = 0xffff;
+		
+		source_long_ptr->source_address0 = aExtendedAddress0;
+		source_long_ptr->source_address1 = aExtendedAddress1;
+		
+		cmd_association_request_ptr->command_frame_identifier = CMD_ASSOCIATION_REQUEST;
+		
+		cmd_association_request_ptr->capability_information = CapabilityInformation;
+
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+		
+		pending_request_data=1;
+		
+		////printfUART("Association request %i %i \n", send_buffer_count,send_buffer_msg_in);
+		
+		
+		post send_frame_csma();
+
+	}
+return;
+}
+
+void create_data_request_cmd()
+{
+	//////////printfUART("create_data_request_cmd\n", ""); 
+
+atomic{
+		//dest_short *dest_short_ptr;
+		source_long *source_long_ptr;
+
+		
+		MPDU *frame_pkt;
+		
+		uint16_t frame_control;
+		
+		if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+	
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+	
+	
+		source_long_ptr= (source_long *) &send_buffer[send_buffer_msg_in].data[0];
+	
+		//creation of a pointer to the association response structure
+		//dest_short_ptr = (dest_short *) &frame_pkt->data[0];
+		source_long_ptr = (source_long *) &frame_pkt->data[0];
+	
+	
+		frame_pkt->length = 16;							
+		//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,1,1,0,LONG_ADDRESS);   //dest | source
+		
+		frame_control = set_frame_control(TYPE_CMD,0,0,1,1,0,LONG_ADDRESS);
+		frame_pkt->frame_control1 =(uint8_t)( frame_control);
+		frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		
+		frame_pkt->seq_num = mac_PIB.macDSN;
+		
+		mac_PIB.macDSN++;
+		
+		//enable retransmissions
+		send_buffer[send_buffer_msg_in].retransmission =1;
+		send_buffer[send_buffer_msg_in].indirect = 0;
+		
+		
+		source_long_ptr->source_PAN_identifier = mac_PIB.macPANId;
+		
+		source_long_ptr->source_address0 = aExtendedAddress0;//aExtendedAddress0;
+		source_long_ptr->source_address1 = aExtendedAddress1;
+		
+		//command_frame_identifier = CMD_DATA_REQUEST;
+		frame_pkt->data[SOURCE_LONG_LEN]=CMD_DATA_REQUEST;
+		
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+				
+		post send_frame_csma();
+		
+		
+		}
+return;
+}
+
+void create_beacon_request_cmd()
+{
+
+atomic{
+		cmd_beacon_request *mac_beacon_request;
+	
+		MPDU *frame_pkt;
+		
+		uint16_t frame_control;
+		
+		if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+	
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+	
+		mac_beacon_request= (cmd_beacon_request*) &send_buffer[send_buffer_msg_in].data;
+	
+		frame_pkt->length = 10;							
+		//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,0,0,SHORT_ADDRESS,0);   //dest | source
+		
+		frame_control = set_frame_control(TYPE_CMD,0,0,0,0,SHORT_ADDRESS,0);
+		frame_pkt->frame_control1 =(uint8_t)( frame_control);
+		frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		
+		frame_pkt->seq_num = mac_PIB.macDSN;
+		
+		mac_PIB.macDSN++;
+		
+		//enable retransmissions
+		send_buffer[send_buffer_msg_in].retransmission =1;
+		send_buffer[send_buffer_msg_in].indirect = 0;
+		
+		mac_beacon_request->destination_PAN_identifier = 0xffff;
+		
+		mac_beacon_request->destination_address = 0xffff;
+	
+		mac_beacon_request->command_frame_identifier = CMD_BEACON_REQUEST;
+		
+		
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+		
+		post send_frame_csma();
+
+		}
+
+return;
+}
+
+void create_orphan_notification()
+{
+
+	atomic{
+	
+		cmd_default *cmd_orphan_notification=0;
+		
+		dest_short *dest_short_ptr=0;
+		source_long *source_long_ptr=0;
+
+		MPDU *frame_pkt=0;
+			
+		uint16_t frame_control=0;
+		
+		if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+	
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+		
+		frame_pkt->length = 20;							
+				
+		cmd_orphan_notification = (cmd_default*) &send_buffer[send_buffer_msg_in].data[DEST_SHORT_LEN + SOURCE_LONG_LEN];
+		
+		//creation of a pointer the addressing structures
+		dest_short_ptr = (dest_short *) &frame_pkt->data[0];
+		source_long_ptr = (source_long *) &frame_pkt->data[DEST_SHORT_LEN];
+		
+		
+		frame_control = set_frame_control(TYPE_CMD,0,0,0,0,SHORT_ADDRESS,LONG_ADDRESS);
+		frame_pkt->frame_control1 =(uint8_t)( frame_control);
+		frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		
+		
+		frame_pkt->seq_num = mac_PIB.macDSN;
+		
+		mac_PIB.macDSN++;
+		
+		
+		dest_short_ptr->destination_PAN_identifier = 0xffff; //mac_PIB.macPANId;
+		
+		dest_short_ptr->destination_address = 0xffff ;  //mac_PIB.macPANId;
+		
+		source_long_ptr->source_PAN_identifier = 0xffff;
+		
+		source_long_ptr->source_address0 = aExtendedAddress0;
+		source_long_ptr->source_address1 = aExtendedAddress1;
+				
+		
+		cmd_orphan_notification->command_frame_identifier = CMD_ORPHAN_NOTIFICATION;
+		
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+		
+		post send_frame_csma();
+	}
+
+return;
+}
+
+
+void create_coordinator_realignment_cmd(uint32_t device_extended0, uint32_t device_extended1, uint16_t device_short_address)
+{
+
+atomic{
+
+	cmd_coord_realignment *cmd_realignment =0;
+	
+	dest_long *dest_long_ptr=0;
+	source_short *source_short_ptr=0;
+	
+	MPDU *frame_pkt=0;
+	
+	uint16_t frame_control=0;
+	
+	if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+		send_buffer_msg_in=0;
+
+	frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+	
+	frame_pkt->length = 27;							
+	//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,0,0,SHORT_ADDRESS,0);   //dest | source
+	
+	cmd_realignment = (cmd_coord_realignment*) &send_buffer[send_buffer_msg_in].data[DEST_LONG_LEN + SOURCE_SHORT_LEN];
+	
+	//creation of a pointer the addressing structures
+	dest_long_ptr = (dest_long *) &frame_pkt->data[0];
+	source_short_ptr = (source_short *) &frame_pkt->data[DEST_LONG_LEN];
+
+	
+	frame_control = set_frame_control(TYPE_CMD,0,0,0,0,LONG_ADDRESS,SHORT_ADDRESS);
+	frame_pkt->frame_control1 =(uint8_t)( frame_control);
+	frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		
+	frame_pkt->seq_num = mac_PIB.macDSN;
+	
+	mac_PIB.macDSN++;
+	
+	dest_long_ptr->destination_PAN_identifier = 0xffff;
+	dest_long_ptr->destination_address0 = device_extended0;
+	dest_long_ptr->destination_address1 = device_extended1;
+	
+	source_short_ptr->source_PAN_identifier = mac_PIB.macPANId;
+	source_short_ptr->source_address = mac_PIB.macCoordShortAddress;
+	
+	
+	cmd_realignment->command_frame_identifier = CMD_COORDINATOR_REALIGNMENT;
+	
+	mac_PIB.macPANId = 0x1234;
+	
+	mac_PIB.macCoordShortAddress =0x0000;
+	
+	cmd_realignment->PAN_identifier0 = (mac_PIB.macPANId);
+	cmd_realignment->PAN_identifier1 = (mac_PIB.macPANId >> 8);
+
+	cmd_realignment->coordinator_short_address0 = (mac_PIB.macCoordShortAddress);
+	cmd_realignment->coordinator_short_address1 = (mac_PIB.macCoordShortAddress >> 8);
+	
+	cmd_realignment->logical_channel = LOGICAL_CHANNEL;
+	cmd_realignment->short_address = device_short_address;
+
+	
+	//increment the send buffer variables
+	send_buffer_count++;
+	send_buffer_msg_in++;
+	
+	post send_frame_csma();
+
+	}
+
+return;
+}
+
+
+void create_gts_request_cmd(uint8_t gts_characteristics)
+{
+atomic{
+		cmd_gts_request *mac_gts_request;
+		
+		MPDU *frame_pkt;
+		
+		uint16_t frame_control;
+		////printfUART("create_gts_request_cmd\n", "");
+		
+		
+		if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+		
+		mac_gts_request= (cmd_gts_request*) &send_buffer[send_buffer_msg_in].data;
+
+		frame_pkt->length = 11;
+	
+		if ( get_characteristic_type(gts_characteristics) != 0 )
+		{   
+			//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,1,1,0,SHORT_ADDRESS);   //dest | source
+		
+			frame_control = set_frame_control(TYPE_CMD,0,0,1,1,0,SHORT_ADDRESS); 
+			frame_pkt->frame_control1 =(uint8_t)( frame_control);
+			frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		}
+		else
+		{	
+			//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,1,1,0,SHORT_ADDRESS);
+			
+			frame_control = set_frame_control(TYPE_CMD,0,0,1,1,0,SHORT_ADDRESS);
+			frame_pkt->frame_control1 =(uint8_t)( frame_control);
+			frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		}
+		
+		frame_pkt->seq_num = mac_PIB.macDSN;
+		
+		gts_request_seq_num = frame_pkt->seq_num;
+		
+		mac_PIB.macDSN++;
+		
+		//enable retransmissions
+		send_buffer[send_buffer_msg_in].retransmission =1;
+		send_buffer[send_buffer_msg_in].indirect = 0;
+		
+		//mac_gts_request->source_PAN_identifier = 0x0001;
+		mac_gts_request->source_PAN_identifier = mac_PIB.macPANId;
+		
+		mac_gts_request->source_address = mac_PIB.macShortAddress;
+	
+		mac_gts_request->command_frame_identifier = CMD_GTS_REQUEST;
+		
+		//mac_gts_request->gts_characteristics = set_gts_characteristics(2,1,1);
+		mac_gts_request->gts_characteristics =gts_characteristics;
+		
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+		
+		post send_frame_csma();
+		
+		}
+
+return;
+}
+
+void create_disassociation_notification_cmd(uint32_t DeviceAddress[],uint8_t disassociation_reason)
+{
+
+	atomic{
+		cmd_disassociation_notification *mac_disassociation_notification;
+		MPDU *frame_pkt;
+		
+		uint16_t frame_control;
+		
+		if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+			send_buffer_msg_in=0;
+	
+		frame_pkt = (MPDU *) &send_buffer[send_buffer_msg_in];
+		
+		//creation of a pointer to the disassociation notification structure
+		mac_disassociation_notification = (cmd_disassociation_notification*) &send_buffer[send_buffer_msg_in].data;								
+		
+		
+		frame_pkt->length = 27;
+		
+		//frame_pkt->frame_control = set_frame_control(TYPE_CMD,0,0,1,0,LONG_ADDRESS,LONG_ADDRESS);
+		
+		frame_control = set_frame_control(TYPE_CMD,0,0,1,0,LONG_ADDRESS,LONG_ADDRESS);
+		frame_pkt->frame_control1 =(uint8_t)( frame_control);
+		frame_pkt->frame_control2 =(uint8_t)( frame_control >> 8);
+		
+		frame_pkt->seq_num = mac_PIB.macDSN;
+		
+		mac_PIB.macDSN++;
+		
+		//enable retransmissions
+		send_buffer[send_buffer_msg_in].retransmission =1;
+		send_buffer[send_buffer_msg_in].indirect = 0;
+		
+		mac_disassociation_notification->destination_PAN_identifier = mac_PIB.macPANId;
+
+		mac_disassociation_notification->destination_address0 = DeviceAddress[0];
+		mac_disassociation_notification->destination_address1 = DeviceAddress[1];
+	
+		mac_disassociation_notification->source_PAN_identifier = mac_PIB.macPANId;
+	
+		mac_disassociation_notification->source_address0 = aExtendedAddress0;
+		mac_disassociation_notification->source_address1 = aExtendedAddress1;
+	
+		mac_disassociation_notification->command_frame_identifier = CMD_DISASSOCIATION_NOTIFICATION;
+		
+		mac_disassociation_notification->disassociation_reason = disassociation_reason;
+		
+		//increment the send buffer variables
+		send_buffer_count++;
+		send_buffer_msg_in++;
+		
+		post send_frame_csma();
+
+	}
+return;
+}
+
+
+
+void build_ack(uint8_t sequence,uint8_t frame_pending)
+{
+	uint16_t frame_control;
+	atomic{
+			mac_ack_ptr->length = ACK_LENGTH;
+			//mac_ack_ptr->frame_control = set_frame_control(TYPE_ACK,0,frame_pending,0,0,0,0);
+			
+			frame_control = set_frame_control(TYPE_ACK,0,frame_pending,0,0,0,0);
+			mac_ack_ptr->frame_control1 =(uint8_t)( frame_control);
+			mac_ack_ptr->frame_control2 =(uint8_t)( frame_control >> 8);
+			
+			mac_ack_ptr->seq_num = sequence;
+			
+			call PD_DATA.request(mac_ack_ptr->length,(uint8_t*)mac_ack_ptr);
+	}
+}
+
+
+
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+/************************		INTERFACES PROVIDED   			**********************************/
+/*****************************************************************************************************/ 
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+
+/*********************************************************/
+/**************MLME_SCAN********************************/
+/*********************************************************/
+
+task void data_channel_scan_indication()
+{
+	uint8_t link_qual;
+	
+	beacon_addr_short *beacon_ptr;
+	
+	//printfUART("data_channel_scan_indication\n","");
+
+	atomic link_qual = link_quality;
+
+	atomic buffer_count--;
+
+	switch(scan_type)
+	{
+		case ED_SCAN: 
+						if (scanned_values[current_scanning-1] < link_qual)
+								scanned_values[current_scanning-1] = link_qual;
+						break;
+		
+		case ACTIVE_SCAN:break;
+					
+		case PASSIVE_SCAN: 
+							switch( (buffer_msg[current_msg_out].frame_control1 & 0x7) )
+							{
+								case TYPE_BEACON:
+								////////////printfUART("Received Beacon\n","");
+								beacon_ptr = (beacon_addr_short*) (&buffer_msg[current_msg_out].data);
+
+								//Beacon NOTIFICATION
+								//BUILD the PAN descriptor of the COORDINATOR
+								//assuming that the adress is short
+								scan_pans[current_scanning-1].CoordPANId = beacon_ptr->destination_PAN_identifier;
+								scan_pans[current_scanning-1].CoordAddress=beacon_ptr->source_address;
+								scan_pans[current_scanning-1].LogicalChannel=current_channel;
+								//superframe specification field
+								scan_pans[current_scanning-1].SuperframeSpec = beacon_ptr->superframe_specification;
+								
+								if (scan_pans[current_scanning-1].lqi < link_qual)
+								scan_pans[current_scanning-1].lqi = link_qual;
+							
+								break;
+								
+								default: break;
+							//atomic buffer_count--;
+							////////////printfUART("Invalid frame type\n","");
+
+							}
+							break;
+		case ORPHAN_SCAN: 
+							//printfUART("osrm\n","");
+							switch( (buffer_msg[current_msg_out].frame_control1 & 0x7) )
+							{
+								case TYPE_CMD:
+										//printfUART("received cmd\n","");
+										if (buffer_msg[current_msg_out].data[SOURCE_SHORT_LEN+ DEST_LONG_LEN] == CMD_COORDINATOR_REALIGNMENT)
+										{	
+											printfUART("pf\n","");
+											atomic scanning_channels = 0;
+											call T_ScanDuration.stop();
+											process_coordinator_realignment(&buffer_msg[current_msg_out]);
+											
+										}
+										
+										break;
+							default: break;
+							}
+							break;
+		
+	}
+	
+	atomic{
+			current_msg_out++;
+		if ( current_msg_out == RECEIVE_BUFFER_SIZE )	
+			current_msg_out = 0;
+		}
+return;
+}
+/*******************T_ScanDuration**************************/
+event void T_ScanDuration.fired() {
+
+	current_scanning++;
+	
+	printfUART("cs%i c%i\n",current_scanning,(0x0A + current_scanning));
+						
+	call PLME_SET.request(PHYCURRENTCHANNEL, (0x0A + current_scanning));
+
+	current_channel = (0x0A + current_scanning);
+	
+
+	if (current_scanning == 16 )
+	{
+		//printfUART("scan end\n","");
+		
+		atomic scanning_channels = 0;
+		
+		switch(scan_type)
+		{
+			case ED_SCAN: 
+							signal MLME_SCAN.confirm(MAC_SUCCESS,scan_type, 0x00, 16 , scanned_values,0x00);
+							break;
+			
+			case ACTIVE_SCAN:break;
+
+			case PASSIVE_SCAN: 
+							//event result_t confirm(uint8_t status,uint8_t ScanType, uint32_t UnscannedChannels, uint8_t ResultListSize, uint8_t EnergyDetectList[], SCAN_PANDescriptor PANDescriptorList[]);
+							signal MLME_SCAN.confirm(MAC_SUCCESS,scan_type, 0x00, 16 , 0x00, scan_pans);
+							break;
+			
+			case ORPHAN_SCAN: 
+							//orphan scan
+							//send opphan command on every channel directed to the current PAN coordinator
+							printfUART("oph s end not found\n","");
+							signal MLME_SCAN.confirm(MAC_SUCCESS,scan_type, 0x00, 16 , 0x00, scan_pans);
+							
+							break;
+		}
+	}
+	else
+	{
+		switch(scan_type)
+		{
+			case ORPHAN_SCAN:	printfUART("con\n","");
+								create_orphan_notification();
+								break;
+		}
+		
+		call T_ScanDuration.startOneShot(scan_duration);
+	}
+  
+}
+
+
+
+command error_t MLME_SCAN.request(uint8_t ScanType, uint32_t ScanChannels, uint8_t ScanDuration)
+{
+//pag 93
+	printfUART("MLME_SCAN.request\n", ""); 
+		
+	atomic scanning_channels = 1;
+	scan_type = ScanType;
+	channels_to_scan = ScanChannels;
+	
+	atomic current_scanning=0;
+	
+	
+	switch(ScanType)
+	{
+		//ED SCAN only FFD			
+		case ED_SCAN:	
+					call TimerAsync.set_timers_enable(0x00);
+					/*
+				
+					scanning_channels = 1;
+					scan_type = ScanType;
+					current_scanning=0;
+					scan_count=0;
+					channels_to_scan = ScanChannels;
+					scan_duration = ((aBaseSuperframeDuration * pow(2,ScanDuration)) * 4.0) / 250.0;
+					
+					//////////printfUART("channels_to_scan %y scan_duration %y\n", channels_to_scan,scan_duration); 
+					
+					call T_ed_scan.start(TIMER_REPEAT,1);
+					
+					call T_scan_duration.start(TIMER_ONE_SHOT,scan_duration);	
+					*/
+					
+					
+					//calculate the scan_duration in miliseconds
+					//#ifdef PLATFORM_MICAZ
+						scan_duration = ((aBaseSuperframeDuration * (powf(2,ScanDuration)+1)) * EFFECTIVE_SYMBOL_VALUE) / 1000.0;
+					//#else
+					//	scan_duration = ((aBaseSuperframeDuration * (powf(2,ScanDuration)+1)) * EFFECTIVE_SYMBOL_VALUE) / 1000.0;
+					//#endif
+			//scan_duration = 2000;
+					
+					call T_ScanDuration.startOneShot(scan_duration);
+					
+					//printfUART("channels_to_scan %y scan_duration %y\n", channels_to_scan,scan_duration); 
+					break;
+		//active scan only FFD
+		case ACTIVE_SCAN:
+					call TimerAsync.set_timers_enable(0x00);
+					break;
+		//passive scan
+		case PASSIVE_SCAN:	
+					call TimerAsync.set_timers_enable(0x00);
+							
+					//calculate the scan_duration in miliseconds
+					//#ifdef PLATFORM_MICAZ
+					//	scan_duration = ((aBaseSuperframeDuration * (powf(2,ScanDuration)+1)) * EFFECTIVE_SYMBOL_VALUE) / 1000.0;
+					//#else
+					//	scan_duration = ((aBaseSuperframeDuration * (powf(2,ScanDuration)+1)) * EFFECTIVE_SYMBOL_VALUE) / 1000.0;
+					//#endif
+					
+					
+					//defines the time (miliseconds) that the device listen in each channel
+					scan_duration = 2000;
+					
+					printfUART("channels_to_scan %y scan_duration %i\n", channels_to_scan,scan_duration); 
+					
+					call T_ScanDuration.startOneShot(scan_duration);
+					
+					//printfUART("channels_to_scan %y scan_duration %i\n", channels_to_scan,scan_duration); 
+					
+					//atomic trx_status = PHY_RX_ON;
+					//call PLME_SET_TRX_STATE.request(PHY_RX_ON); 
+		
+		
+		
+					break;
+		//orphan scan
+		case ORPHAN_SCAN:
+		
+					call TimerAsync.set_timers_enable(0x01);
+					
+				    scan_duration = 4000;
+					
+					printfUART("orphan cts %y sdur %i\n", channels_to_scan,scan_duration); 
+					
+					call T_ScanDuration.startOneShot(scan_duration);
+
+					break;
+	
+		default:
+					break;
+	}
+
+return SUCCESS;
+}
+
+
+
+/*********************************************************/
+/**************MLME_ORPHAN********************************/
+/*********************************************************/
+
+command error_t MLME_ORPHAN.response(uint32_t OrphanAddress[1],uint16_t ShortAddress,uint8_t AssociatedMember, uint8_t security_enabled)
+{
+
+	if (AssociatedMember==0x01)
+	{
+		create_coordinator_realignment_cmd(OrphanAddress[0], OrphanAddress[1], ShortAddress);
+	}
+	
+return SUCCESS;
+}
+
+/*********************************************************/
+/**************MLME_SYNC********************************/
+/*********************************************************/
+
+
+command error_t MLME_SYNC.request(uint8_t logical_channel,uint8_t track_beacon)
+{
+	call PLME_SET.request(PHYCURRENTCHANNEL,logical_channel);	
+	
+	call TimerAsync.set_timers_enable(0x01);
+	
+	printfUART("sync req\n", ""); 
+	
+	atomic findabeacon = 1;
+
+return SUCCESS;
+}
+
+/*********************************************************/
+/**************MLME_RESET********************************/
+/*********************************************************/
+
+
+command error_t MLME_RESET.request(uint8_t set_default_PIB)
+{
+printfUART("MLME_RESET.request\n", "");
+
+return SUCCESS;
+}
+
+/*********************************************************/
+/**************MLME_GTS***********************************/
+/*********************************************************/
+
+command error_t MLME_GTS.request(uint8_t GTSCharacteristics, bool security_enable)
+{
+
+	//uint32_t wait_time;
+	//if there is no short address asigned the node cannot send a GTS request
+	if (mac_PIB.macShortAddress == 0xffff)
+			signal MLME_GTS.confirm(GTSCharacteristics,MAC_NO_SHORT_ADDRESS);
+	
+	//gts_ack=1;
+	
+	gts_request =1;
+	
+	create_gts_request_cmd(GTSCharacteristics);
+
+return SUCCESS;
+}
+
+
+/*********************************************************/
+/**************MLME_START*********************************/
+/*********************************************************/
+
+command error_t MLME_START.request(uint32_t PANId, uint8_t LogicalChannel, uint8_t beacon_order, uint8_t superframe_order,bool pan_coodinator,bool BatteryLifeExtension,bool CoordRealignment,bool securityenable,uint32_t StartTime)
+{
+
+	uint32_t BO_EXPONENT;
+	uint32_t SO_EXPONENT;
+
+	printfUART("MLME_START.request\n", "");
+	//pag 102
+	atomic {
+	PANCoordinator=1;
+	Beacon_enabled_PAN=1;
+	//TEST
+	//atomic mac_PIB.macShortAddress = 0x0000;
+
+
+		if ( mac_PIB.macShortAddress == 0xffff)
+		{
+		
+			signal MLME_START.confirm(MAC_NO_SHORT_ADDRESS);
+			return SUCCESS;
+		}
+		else
+		{
+			atomic mac_PIB.macBeaconOrder = beacon_order;
+			
+			if (beacon_order == 15) 
+				atomic mac_PIB.macSuperframeOrder = 15;
+			else
+				atomic mac_PIB.macSuperframeOrder = superframe_order;
+		
+		
+			//PANCoordinator is set to TRUE
+			if (pan_coodinator == 1)
+			{
+				atomic mac_PIB.macPANId = PANId;
+				call PLME_SET.request(PHYCURRENTCHANNEL,LogicalChannel);
+			}
+			if (CoordRealignment == 1)
+			{
+				//generates and broadcasts a coordinator realignment command containing the new PANId and LogicalChannels
+			}
+			if (securityenable == 1)
+			{
+			//security parameters
+			}
+		}
+	
+		if (mac_PIB.macSuperframeOrder == 0)
+			SO_EXPONENT = 1;
+		else
+		{
+			SO_EXPONENT = powf(2,mac_PIB.macSuperframeOrder);
+		
+		}
+		if ( mac_PIB.macBeaconOrder == 0)
+			BO_EXPONENT = 1;
+		else
+		{
+			BO_EXPONENT = powf(2,mac_PIB.macBeaconOrder);
+		
+		}	
+	}
+	
+	BI = aBaseSuperframeDuration * BO_EXPONENT; 
+		
+	SD = aBaseSuperframeDuration * SO_EXPONENT; 
+	//backoff_period
+	backoff = aUnitBackoffPeriod;
+
+	
+	atomic time_slot = SD / NUMBER_TIME_SLOTS;
+
+	call TimerAsync.set_backoff_symbols(backoff);
+
+	call TimerAsync.set_bi_sd(BI,SD);
+	
+	atomic{
+	
+		call TimerAsync.set_timers_enable(0x01);
+		
+		call TimerAsync.reset();
+		
+	}
+	
+	////////////////////////////////////////////////////
+	/////////////////TDBS IMPLEMENTATION////////////////
+	////////////////////////////////////////////////////
+	if(TYPE_DEVICE == ROUTER)
+	{
+		atomic parent_offset = StartTime;
+	
+		call TimerAsync.set_track_beacon(1);
+		//initialization of the timer that shedules the beacon transmission offset
+		call TimerAsync.set_track_beacon_start_ticks(StartTime,0x00001E00,0x00000000);
+	}
+	else
+	{
+		atomic I_AM_IN_PARENT_CAP = 1;
+	}
+		
+	signal MLME_START.confirm(MAC_SUCCESS);
+
+	return SUCCESS;
+}
+
+/*************************************************************/
+/**************MLME_ASSOCIATE*********************************/
+/*************************************************************/
+
+command error_t MLME_ASSOCIATE.request(uint8_t LogicalChannel,uint8_t CoordAddrMode,uint16_t CoordPANId,uint32_t CoordAddress[],uint8_t CapabilityInformation,bool securityenable)
+{
+	//update current channel
+	//call PLME_SET.request(PHYCURRENTCHANNEL,LogicalChannel);
+	
+	//printfUART("MLME_ASSOCIATE.request\n", "");
+	
+	//updates the PAN ID
+	atomic{ 
+		mac_PIB.macPANId = CoordPANId;
+		mac_PIB.macCoordShortAddress = (uint16_t)(CoordAddress[1] & 0x000000ff);
+		}
+		
+	associating=1; //boolean variable stating that the device is trying to associate
+	
+	call TimerAsync.set_timers_enable(1);
+	
+	//call PLME_SET.request(PHYCURRENTCHANNEL, LogicalChannel);
+
+	current_channel = LogicalChannel;
+	
+	//printfUART("SELECTED cord id %i\n", mac_PIB.macPANId);
+	//printfUART("CoordAddress %i\n", mac_PIB.macCoordShortAddress);
+	//printfUART("LogicalChannel %i\n", LogicalChannel);
+	//printfUART("Cordaddr %i\n",CoordAddress[0]);
+	//printfUART("Cordaddr %i\n",CoordAddress[1]);
+	/*
+	a_CoordAddrMode = CoordAddrMode;
+	a_CoordPANId=CoordPANId;
+	a_CoordAddress[0]=CoordAddress[0];
+	a_CoordAddress[1]=CoordAddress[1];
+	a_CapabilityInformation=CapabilityInformation;
+	a_securityenable=securityenable;
+	*/
+	create_association_request_cmd(CoordAddrMode,CoordPANId,CoordAddress,CapabilityInformation);
+	
+	return SUCCESS;
+}
+
+command error_t MLME_ASSOCIATE.response(uint32_t DeviceAddress[], uint16_t AssocShortAddress, uint8_t status, bool securityenable)
+{
+	
+	error_t status_response;
+	
+	//////printfUART("MAR\n", "");
+	
+	status_response = create_association_response_cmd(DeviceAddress,AssocShortAddress,status);
+	////////////printfUART("MLME_ASSOCIATE.response\n", "");
+
+
+return SUCCESS;
+}
+
+/*************************************************************/
+/**************MLME_DISASSOCIATE*********************************/
+/*************************************************************/
+
+command error_t MLME_DISASSOCIATE.request(uint32_t DeviceAddress[], uint8_t disassociate_reason, bool securityenable)
+{
+	create_disassociation_notification_cmd(DeviceAddress,disassociate_reason);
+return SUCCESS;
+}
+
+/*********************************************************/
+/**************MLME_GET***********************************/
+/*********************************************************/
+command error_t MLME_GET.request(uint8_t PIBAttribute)
+{
+
+	switch(PIBAttribute)
+	{
+		case MACACKWAITDURATION :		signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macAckWaitDuration);
+										break;
+		case MACASSOCIATIONPERMIT:  	signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macAssociationPermit);
+										break;
+		case MACAUTOREQUEST : 			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macAutoRequest);
+										break;
+		case MACBATTLIFEEXT:			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macBattLifeExt);
+										break;
+		case MACBATTLIFEEXTPERIODS:		signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macBattLifeExtPeriods);
+										break;
+		case MACBEACONPAYLOAD:			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute, mac_PIB.macBeaconPayload);
+										break;
+		case MACMAXBEACONPAYLOADLENGTH:	signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macBeaconPayloadLenght);
+										break;
+		case MACBEACONORDER:			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macBeaconOrder);
+										break;
+		case MACBEACONTXTIME:			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,(uint8_t *)&mac_PIB.macBeaconTxTime);
+										break;
+		case MACBSN:					signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macBSN);
+										break;
+		case MACCOORDEXTENDEDADDRESS:	signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,(uint8_t *) &mac_PIB.macCoordExtendedAddress0);
+										break;
+		case MACCOORDSHORTADDRESS:		signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,(uint8_t *) &mac_PIB.macCoordShortAddress);
+										break;
+		case MACDSN:					signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macDSN);
+										break;
+		case MACGTSPERMIT:				signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macGTSPermit);
+										break;
+		case MACMAXCSMABACKOFFS:		signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macMaxCSMABackoffs);
+										break;
+		case MACMINBE:					signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macMinBE);
+										break;
+		case MACPANID:					signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,(uint8_t *) &mac_PIB.macPANId);
+										break;
+		case MACPROMISCUOUSMODE:		signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macPromiscuousMode);
+										break;
+		case MACRXONWHENIDLE:			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macRxOnWhenIdle);
+										break;
+		case MACSHORTADDRESS:			signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,(uint8_t *) &mac_PIB.macShortAddress);
+										break;
+		case MACSUPERFRAMEORDER:		signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,&mac_PIB.macSuperframeOrder);
+										break;
+		case MACTRANSACTIONPERSISTENCETIME:	signal MLME_GET.confirm(MAC_SUCCESS,PIBAttribute,(uint8_t *) &mac_PIB.macTransactionPersistenceTime);
+											break;
+											
+		default:						signal MLME_GET.confirm(MAC_UNSUPPORTED_ATTRIBUTE,PIBAttribute,0x00);
+										break;
+	}
+
+return SUCCESS;
+}
+
+/*********************************************************/
+/**************MLME_SET***********************************/
+/*********************************************************/
+command error_t MLME_SET.request(uint8_t PIBAttribute,uint8_t PIBAttributeValue[])
+{
+
+//int i;
+
+//printfUART("set %i\n",PIBAttribute);
+
+atomic{
+
+	switch(PIBAttribute)
+	{
+	
+	
+		case MACACKWAITDURATION :		mac_PIB.macAckWaitDuration = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macAckWaitDuration: %x\n",mac_PIB.macAckWaitDuration);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+									
+		case MACASSOCIATIONPERMIT:  	if ((uint8_t)PIBAttributeValue[1] == 0x00)
+										{
+											mac_PIB.macAssociationPermit = 0x00;
+										}
+										else
+										{
+											mac_PIB.macAssociationPermit = 0x01;
+										}
+										////////printfUART("mac_PIB.macAssociationPermit: %i %y\n",mac_PIB.macAssociationPermit,PIBAttributeValue[1]);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+		case MACAUTOREQUEST : 			mac_PIB.macAutoRequest = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macAutoRequest: %i\n",mac_PIB.macAutoRequest);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+		case MACBATTLIFEEXT:			mac_PIB.macBattLifeExt = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macBattLifeExt %i\n",mac_PIB.macBattLifeExt);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACBATTLIFEEXTPERIODS:		mac_PIB.macBattLifeExtPeriods = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macBattLifeExtPeriods %i\n",mac_PIB.macBattLifeExtPeriods);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+		case MACBEACONPAYLOAD:			/*for(i=0;i < mac_PIB.macBeaconPayloadLenght;i++) 
+										{
+											mac_PIB.macBeaconPayload[i] = PIBAttributeValue[i];
+										}*/
+									
+										memcpy(&PIBAttributeValue[0],&mac_PIB.macBeaconPayload[0],mac_PIB.macBeaconPayloadLenght * sizeof(uint8_t));
+										
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+				
+		case MACMAXBEACONPAYLOADLENGTH:	mac_PIB.macBeaconPayloadLenght = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macBeaconPayloadLenght %i\n",mac_PIB.macBeaconPayloadLenght);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+		case MACBEACONORDER:			mac_PIB.macBeaconOrder = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macBeaconOrder %i\n",mac_PIB.macBeaconOrder);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACBEACONTXTIME:			mac_PIB.macBeaconTxTime =PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macBeaconTxTime %i\n",mac_PIB.macBeaconTxTime);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACBSN:					mac_PIB.macBSN = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macBSN %i\n",mac_PIB.macBSN);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+
+		case MACCOORDEXTENDEDADDRESS:	//mac_PIB.macCoordExtendedAddress0 = ((PIBAttributeValue[0] >> 24) | (PIBAttributeValue[1] >> 16) | (PIBAttributeValue[2] >> 8) | (PIBAttributeValue[3])) ;
+										//mac_PIB.macCoordExtendedAddress1 = ((PIBAttributeValue[4] >> 24) | (PIBAttributeValue[5] >> 16) | (PIBAttributeValue[6] >> 8) | (PIBAttributeValue[7]));
+
+										//////////printfUART("mac_PIB.macCoordExtendedAddress0 %y\n",mac_PIB.macCoordExtendedAddress0);
+										//////////printfUART("mac_PIB.macCoordExtendedAddress1 %y\n",mac_PIB.macCoordExtendedAddress1);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+									
+		case MACCOORDSHORTADDRESS:		mac_PIB.macCoordShortAddress= ((PIBAttributeValue[0] << 8) |PIBAttributeValue[1]);
+										//printfUART("mac_PIB.macCoordShortAddress: %x\n",mac_PIB.macCoordShortAddress);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		
+		case MACDSN:					mac_PIB.macDSN = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macDSN: %x\n",mac_PIB.macDSN);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACGTSPERMIT:				mac_PIB.macGTSPermit = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macGTSPermit: %x\n",mac_PIB.macGTSPermit);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACMAXCSMABACKOFFS:		mac_PIB.macMaxCSMABackoffs = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macMaxCSMABackoffs: %x\n",mac_PIB.macMaxCSMABackoffs);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACMINBE:					mac_PIB.macMinBE = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macMinBE: %x\n",mac_PIB.macMinBE);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		
+		case MACPANID:					mac_PIB.macPANId = ((PIBAttributeValue[0] << 8)| PIBAttributeValue[1]);
+										printfUART("mac_PIB.macPANId: %x\n",mac_PIB.macPANId);
+										
+										//TODO ENABLE HARDWARE VERIFICATION
+										//call CC2420Config.setPanAddr(mac_PIB.macPANId);
+										//call CC2420Config.setAddressRecognition(TRUE);
+										//call CC2420Config.sync(); 
+										
+										call AddressFilter.set_coord_address(mac_PIB.macCoordShortAddress, mac_PIB.macPANId);
+										
+										
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		
+		case MACPROMISCUOUSMODE:		mac_PIB.macPromiscuousMode = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macPromiscuousMode: %x\n",mac_PIB.macPromiscuousMode);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+		case MACRXONWHENIDLE:			mac_PIB.macRxOnWhenIdle = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macRxOnWhenIdle: %x\n",mac_PIB.macRxOnWhenIdle);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+										
+		case MACSHORTADDRESS:			mac_PIB.macShortAddress = ((PIBAttributeValue[0] << 8) |PIBAttributeValue[1]);
+										
+										printfUART("mac_PIB.macShortAddress: %y\n",mac_PIB.macShortAddress);
+																			
+										//TODO ENABLE HARDWARE VERIFICATION
+										//call CC2420Config.setPanAddr(0x0000);
+										//call CC2420Config.setShortAddr(0x0001);
+										//call CC2420Config.setAddressRecognition(TRUE);
+										//call CC2420Config.sync(); 
+										
+										call AddressFilter.set_address(mac_PIB.macShortAddress, aExtendedAddress0, aExtendedAddress0);
+										
+										
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+		case MACSUPERFRAMEORDER:		mac_PIB.macSuperframeOrder = PIBAttributeValue[0];
+										//////////printfUART("mac_PIB.macSuperframeOrder: %x\n",mac_PIB.macSuperframeOrder);
+										signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+										break;
+										
+		case MACTRANSACTIONPERSISTENCETIME:	 mac_PIB.macTransactionPersistenceTime = PIBAttributeValue[0];
+											 //////////printfUART("mac_PIB.macTransactionPersistenceTime: %y\n",mac_PIB.macTransactionPersistenceTime);
+											 signal MLME_SET.confirm(MAC_SUCCESS,PIBAttribute);
+											 break;
+											
+		default:						signal MLME_SET.confirm(MAC_UNSUPPORTED_ATTRIBUTE,PIBAttribute);
+										break;
+										
+		
+	}
+
+}
+
+return SUCCESS;
+}
+/*************************************************************/
+/**************        MCPS - DATA         *******************/
+/*************************************************************/
+
+command error_t MCPS_DATA.request(uint8_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[], uint8_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[], uint8_t msduLength, uint8_t msdu[],uint8_t msduHandle, uint8_t TxOptions)
+{
+	int i;
+	//uint8_t valid_gts=0;
+	uint32_t total_ticks;
+	
+	//////printfUART("MCPS_DATA.request\n", ""); 
+	//check conditions on page 58
+	
+	//atomic mac_PIB.macShortAddress = TOS_LOCAL_ADDRESS;
+	
+	/*
+	//printfUART("SrcAddrMode %x\n", SrcAddrMode);
+	//printfUART("SrcPANId %x\n", SrcPANId);
+	//printfUART("SrcAddr %x\n", SrcAddr[0]);
+	//printfUART("SrcAddr %x\n", SrcAddr[1]);
+	//printfUART("DstAddrMode %x\n", DstAddrMode);
+	//printfUART("DestPANId %x\n", DestPANId);
+	//printfUART("DstAddr %x\n", DstAddr[0]);
+	//printfUART("DstAddr %x\n", DstAddr[1]);
+	//printfUART("msduLength %x\n", msduLength);
+	//printfUART("msduHandle %x\n", msduHandle);
+	//printfUART("TxOptions %x\n", TxOptions);
+		*/
+	
+	atomic{
+	
+	if (mac_PIB.macShortAddress == 0xffff)
+		return FAIL;
+	}
+	
+	if(PANCoordinator == 1)
+	{
+	//PAN COORDINATOR OPERATION
+		////////////printfUART("GTS TRANS: %i TxOptions: %u dest:%u\n", get_txoptions_gts(TxOptions),TxOptions,DstAddr[1]); 
+		
+		if (get_txoptions_gts(TxOptions) == 1)
+		{
+		//GTS TRANSMISSION
+			for (i=0 ; i < 7 ; i++)
+			{
+				//SEARCH FOR A VALID GTS
+				if ( GTS_db[i].DevAddressType == (uint16_t)DstAddr[1] && GTS_db[i].direction == 1 && GTS_db[i].gts_id != 0)
+				{
+					
+				//atomic{
+						////////////printfUART("BUFFER UNTIL GTS SLOT n: %i ss: %i\n",number_time_slot,GTS_db[valid_gts].starting_slot);
+						create_data_frame(SrcAddrMode, SrcPANId, SrcAddr, DstAddrMode, DestPANId, DstAddr, msduLength, msdu, msduHandle, TxOptions,GTS_db[i].starting_slot,1);
+					//}
+					return SUCCESS;
+					break;
+				}
+			}
+			signal MCPS_DATA.confirm(msduHandle, MAC_INVALID_GTS);
+			return FAIL;
+		}
+		else
+		{
+		//NORMAL/INDIRECT TRANSMISSION
+		
+			////////////printfUART("IND TRANS: %i TxOptions: %u\n", get_txoptions_indirect_transmission(TxOptions),TxOptions);
+			//check if its an indirect transmission
+			//if ( get_txoptions_indirect_transmission(TxOptions) == 1)
+			//{
+				//INDIRECT TRANSMISSION
+				
+				////////////printfUART("CREATE INDIRECT TRANSMISSION\n","");
+				
+				
+				
+				
+			//}
+			//else
+			//{
+				//NORMAL TRANSMISSION
+				//printfUART("SEND NO GTS NO IND\n","");
+				create_data_frame(SrcAddrMode, SrcPANId, SrcAddr, DstAddrMode, DestPANId, DstAddr, msduLength, msdu, msduHandle, TxOptions,0,0);
+			//}
+		}
+	}
+	else
+	{
+	//NON PAN COORDINATOR OPERATION
+		atomic{
+				
+				////////////printfUART("sslot: %i ini %i\n",s_GTSss,init_s_GTSss);
+				//check if it a gts transmission
+				if (get_txoptions_gts(TxOptions) == 1)
+				{
+				//GTS TRANSMISSION
+					if (s_GTSss == 0x00)
+					{
+						////////////printfUART("NO VALID GTS \n","");
+						signal MCPS_DATA.confirm(msduHandle, MAC_INVALID_GTS);
+					}
+					else
+					{
+							total_ticks = call TimerAsync.get_total_tick_counter();
+							msdu[0] =(uint8_t)(total_ticks >> 0 );
+							msdu[1] =(uint8_t)(total_ticks >> 8);
+							msdu[2] =(uint8_t)(total_ticks >> 16);
+							msdu[3] =(uint8_t)(total_ticks >> 24);
+							
+							if (on_sync == 1 && s_GTSss > 0)
+							create_data_frame(SrcAddrMode, SrcPANId, SrcAddr, DstAddrMode, DestPANId, DstAddr, msduLength, msdu, msduHandle, TxOptions,s_GTSss,0);
+					}
+				}
+				else
+				{
+				//NORMAL TRANSMISSION
+					printfUART("TRnsm\n","");
+					create_data_frame(SrcAddrMode, SrcPANId, SrcAddr, DstAddrMode, DestPANId, DstAddr, msduLength, msdu, msduHandle, TxOptions,0,0);
+				}
+			}
+	}
+	return SUCCESS;
+}
+
+
+
+
+/*************************************************************/
+/**************        MCPS - PURGE         *******************/
+/*************************************************************/
+
+command error_t MCPS_PURGE.request(uint8_t msduHandle)
+{
+
+
+
+return SUCCESS;
+}
+
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+/************************		OTHER FUNCTIONS   			**********************************/
+/*****************************************************************************************************/ 
+/*****************************************************************************************************/
+/*****************************************************************************************************/
+
+task void signal_loss()
+{
+	//TODO
+	atomic signal MLME_SYNC_LOSS.indication(beacon_loss_reason); //MAC_BEACON_LOSS
+	return;
+}
+
+//inicialization of the mac constants
+void init_MacCon()
+{
+/*****************************************************/
+/*				Boolean Variables					 */
+/*****************************************************/  
+PANCoordinator = 0;
+//(0 NO beacon transmission; 1 beacon transmission);
+Beacon_enabled_PAN = 0;
+//(SYNC)the device will try to track the beacon ie enable its receiver just before the espected time of each beacon
+TrackBeacon=0;
+//(SYNC)the device will try to locate one beacon
+findabeacon=0;
+//(RESET) when the reset command arrives it checks whether or not to reset the PIB
+SetDefaultPIB=0;
+/*****************************************************/
+/*				Integer Variables					 */
+/*****************************************************/  
+/*
+//Beacon Interval
+uint32_t BI;
+//Superframe duration
+uint32_t SD;
+*/
+//(SYNC)number of beacons lost before sending a Beacon-Lost indication comparing to aMaxLostBeacons
+missed_beacons=0;
+//current_channel
+current_channel=0;
+
+
+/*****************************************************/
+/*				Other Variables					 */
+/*****************************************************/ 
+pending_reset=0;
+
+}
+
+//inicialization of the mac PIB
+void init_MacPIB()
+{
+
+atomic{
+	//mac PIB default values
+	
+	//mac_PIB.macAckWaitDuration = 54; OLD VALUE//Number os symbols to wait for an acknowledgment
+	mac_PIB.macAckWaitDuration = 65;
+	
+	mac_PIB.macAssociationPermit = 1; //1 - PAN allowing associations
+	mac_PIB.macAutoRequest = 1; //indication if a device automatically sends a data request command if address is listed in the beacon frame
+	
+	mac_PIB.macBattLifeExt= 0; //batery life extension CSMA-CA
+	
+	mac_PIB.macBattLifeExtPeriods=6;
+	//mac_PIB.macBeaconPayload; //payload of the beacon
+	mac_PIB.macBeaconPayloadLenght=0; //beacon payload lenght
+	
+	mac_PIB.macBeaconTxTime=(0xffffff << 24); //*****
+	
+	
+	mac_PIB.macBSN=call Random.rand16(); //sequence number of the beacon frame
+	
+	
+	mac_PIB.macCoordExtendedAddress0 = 0x00000000; //64bits address of the coordinator with witch the device is associated
+	mac_PIB.macCoordExtendedAddress1 = 0x00000000;
+	
+	mac_PIB.macCoordShortAddress = 0x0000; //16bits address of the coordinator with witch the device is associated
+	
+	
+	if (DEVICE_DEPTH == 0x01)
+		mac_PIB.macCoordShortAddress =D1_PAN_SHORT;
+	if (DEVICE_DEPTH == 0x02)
+		mac_PIB.macCoordShortAddress =D2_PAN_SHORT;
+	if (DEVICE_DEPTH == 0x03)
+		mac_PIB.macCoordShortAddress =D3_PAN_SHORT;
+	if (DEVICE_DEPTH == 0x04)
+		mac_PIB.macCoordShortAddress =D4_PAN_SHORT;
+	
+	
+	mac_PIB.macDSN=call Random.rand16(); //sequence number of the transmited data or MAC command frame
+	
+	//alowing gts requests (used in beacon)
+	mac_PIB.macGTSPermit=1; //
+	
+	//Number of maximum CSMA backoffs
+	mac_PIB.macMaxCSMABackoffs=4;
+	mac_PIB.macMinBE=0;
+	
+	//mac_PIB.macPANId=0xffff; //16bits identifier of the PAN on witch this device is operating
+	mac_PIB.macPANId = MAC_PANID;
+	
+	mac_PIB.macPromiscuousMode=0;
+	mac_PIB.macRxOnWhenIdle=0;
+ 
+	//mac_PIB.macShortAddress=TOS_LOCAL_ADDRESS; //16bits short address
+	mac_PIB.macShortAddress=0xffff;
+
+
+	mac_PIB.macBeaconOrder=7;  //specification of how often the coordinator transmits a beacon
+	mac_PIB.macSuperframeOrder=3;
+	
+	//default mac_PIB.macTransactionPersistenceTime=0x01f4;
+	mac_PIB.macTransactionPersistenceTime=0x0010;
+	
+	//*******************************************
+
+	}
+}
+
+//////////////////////////////////////////////////////////////
+////////////////////////CSMA-CA functions////////////////////
+/////////////////////////////////////////////////////////////
+
+/*****************************************************/
+/*				SEND FRAME FUNCTION   			 */
+/*****************************************************/ 
+
+task void send_frame_csma_upstream()
+{//used in TDBS
+	atomic{
+	
+		////////printfUART("sf %i, %i \n",send_buffer_count,upstream_buffer_count);
+		////////printfUART("I_AM_IN_IP %i \n",I_AM_IN_IP);
+		////printfUART("send up IPCAP %i %i \n",I_AM_IN_PARENT_CAP,upstream_buffer_count);
+	
+		//beacon synchronization
+		if(upstream_buffer_count > 0 && I_AM_IN_PARENT_CAP == 1)
+		{
+		
+			////////printfUART("s up\n","");
+			sending_upstream_frame =1;
+			
+			performing_csma_ca = 1;
+
+			perform_csma_ca();
+		}
+		
+		
+	}
+	
+}
+
+
+task void send_frame_csma()
+{
+	atomic{
+	
+		//
+		///printfUART("I_AM_IN_IP %i %i\n",I_AM_IN_IP,send_buffer_count);
+	
+		if ((send_buffer_count > 0 && send_buffer_count <= SEND_BUFFER_SIZE && performing_csma_ca == 0) || I_AM_IN_IP != 0)
+		{
+			////printfUART("sf %i\n",send_buffer_count);
+			//////printfUART("peform\n","");
+			
+			performing_csma_ca = 1;
+
+			perform_csma_ca();
+		}
+		else
+		{
+			//printfUART("NOT SEND\n","");
+		}
+
+		
+	}
+	
+}
+
+
+task void perform_csma_ca_slotted()
+{
+	uint8_t random_interval;
+	
+		
+		
+		//DEFERENCE CHANGE
+		if (check_csma_ca_send_conditions(send_buffer[send_buffer_msg_out].length,send_buffer[send_buffer_msg_out].frame_control1) == 1 )
+		{
+			cca_deference = 0;
+		}
+		else
+		{
+			//nao e necessario
+			cca_deference = 1;
+			return;
+		}
+		
+	atomic{
+		//printfUART("CCA: %i\n", call CCA.get()) ;
+	
+		if(call CCA.get() == CCA_BUSY )
+		{
+			////////////printfUART("CCA: 1\n", "") ;
+			//STEP 5
+			CW--;
+			if (CW == 0 )
+			{
+				//send functions
+				csma_cca_backoff_boundary =0;
+				
+				////////printfUART("s_up_f %i\n",sending_upstream_frame);
+				//TDBS Implementation
+				if(sending_upstream_frame == 0)
+				{
+				
+					//////printfUART("rts %i\n",get_ack_request(send_buffer[send_buffer_msg_out].frame_control));
+
+						//verify if the message must be ack
+						if ( get_fc1_ack_request(send_buffer[send_buffer_msg_out].frame_control1) == 1 )
+						{
+							send_ack_check=1;
+							ack_sequence_number_check=send_buffer[send_buffer_msg_out].seq_num;	
+							//verify retransmission
+							send_retransmission = send_buffer[send_buffer_msg_out].retransmission;
+							//verify if its an indirect transmission
+							send_indirect_transmission = send_buffer[send_buffer_msg_out].indirect;
+							//SEND WITH ACK_REQUEST
+							call PD_DATA.request(send_buffer[send_buffer_msg_out].length,(uint8_t *)&send_buffer[send_buffer_msg_out]);
+							
+							//////printfUART("out ck\n","");
+							
+							
+							call T_ackwait.startOneShot(ackwait_period);
+						}
+						else
+						{
+						
+							call PD_DATA.request(send_buffer[send_buffer_msg_out].length,(uint8_t *)&send_buffer[send_buffer_msg_out]);
+							
+							send_buffer_count --;
+							send_buffer_msg_out++;
+						
+							//failsafe
+							if(send_buffer_count > SEND_BUFFER_SIZE)
+							{
+								send_buffer_count =0;
+								send_buffer_msg_out=0;
+								send_buffer_msg_in=0;
+							}
+							
+							if (send_buffer_msg_out == SEND_BUFFER_SIZE)
+								send_buffer_msg_out=0;
+							
+							if (send_buffer_count > 0 && send_buffer_count <= SEND_BUFFER_SIZE)
+								post send_frame_csma();
+							
+							//printfUART("sk %i\n",send_buffer_count);
+							
+							////////printfUART("%i %i %i\n",send_buffer_count,send_buffer_msg_in,send_buffer_msg_out);
+						}
+						
+				}
+				else
+				{
+					//TDBS Implementation
+						
+						call PD_DATA.request(upstream_buffer[upstream_buffer_msg_out].length,(uint8_t *)&upstream_buffer[upstream_buffer_msg_out]);
+						
+						upstream_buffer_count --;
+						upstream_buffer_msg_out++;
+					
+						if (upstream_buffer_msg_out == UPSTREAM_BUFFER_SIZE)
+							upstream_buffer_msg_out=0;
+							
+						sending_upstream_frame=0;
+				}		
+				performing_csma_ca = 0;
+			}
+		}
+		else
+		{
+			//CHECK NOT USED
+			//csma_backoff_counter++;
+			//csma_backoff_counter_inst++;
+
+			if (NB < mac_PIB.macMaxCSMABackoffs)
+			{
+				//////////printfUART("NB:%i BE:%i L CW: %i\n",NB,BE,CW);
+				//STEP 4
+				CW = 2;
+				NB++;
+				BE = min(BE+1,aMaxBE);
+				
+				//STEP 2
+				//random_interval = pow(2,BE) - 1;
+				
+				//delay_backoff_period = (call Random.rand() & random_interval);
+				//verification of the backoff_deference
+				//DEFERENCE CHANGE
+				if (backoff_deference == 0)
+				{
+					random_interval = powf(2,BE) - 1;
+					delay_backoff_period = (call Random.rand16() & random_interval );
+						
+					if (check_csma_ca_backoff_send_conditions((uint32_t) delay_backoff_period) == 1)
+					{
+							backoff_deference = 1;
+					}
+				}
+				else
+				{
+					backoff_deference = 0;
+				}
+				
+				
+				//delay_backoff_period=0;
+				
+				//printfUART("delay_backoff_period:%i\n",delay_backoff_period);
+				csma_delay=1;
+			}
+			else
+			{
+				//CSMA/CA FAIL
+				csma_delay=0;
+				csma_cca_backoff_boundary=0;
+				
+				send_buffer_count --;
+				send_buffer_msg_out++;
+			
+				//failsafe
+				if(send_buffer_count > SEND_BUFFER_SIZE)
+				{
+					send_buffer_count =0;
+					send_buffer_msg_out=0;
+					send_buffer_msg_in=0;
+				}
+				
+				if (send_buffer_msg_out == SEND_BUFFER_SIZE)
+					send_buffer_msg_out=0;
+				
+				if (send_buffer_count > 0 && send_buffer_count <= SEND_BUFFER_SIZE)
+					post send_frame_csma();
+					
+				performing_csma_ca = 0;
+				
+				//printfUART("SLOTTED FAIL\n","");
+				/*
+				if(associating == 1)
+				{
+					associating=0;
+					signal MLME_ASSOCIATE.confirm(0x0000,MAC_CHANNEL_ACCESS_FAILURE);
+				}*/
+			}
+		}
+	}
+return;
+}
+
+task void perform_csma_ca_unslotted()
+{
+	uint8_t random_interval;
+	
+	atomic{
+		if (NB < mac_PIB.macMaxCSMABackoffs)
+		{
+			//STEP 3
+			//perform CCA
+			//////////printfUART("CCA: %i\n", TOSH_READ_CC_CCA_PIN()) ;
+			
+			//if CCA is clear send message
+			if(call CCA.get() == CCA_BUSY)
+			{
+				//send functions
+				//////////printfUART("UNSLOTTED SUCCESS\n","");
+				atomic{
+				csma_delay =0;
+				
+
+						
+				if (check_csma_ca_send_conditions(send_buffer[send_buffer_msg_out].length,send_buffer[send_buffer_msg_out].frame_control1) == 1 )
+				{
+					call PD_DATA.request(send_buffer[send_buffer_msg_out].length,(uint8_t *)&send_buffer[send_buffer_msg_out]);
+					
+					send_buffer_count --;
+					send_buffer_msg_out++;
+				
+					//failsafe
+					if(send_buffer_count > SEND_BUFFER_SIZE)
+					{
+						send_buffer_count =0;
+						send_buffer_msg_out=0;
+						send_buffer_msg_in=0;
+					}
+				
+					if (send_buffer_msg_out == SEND_BUFFER_SIZE)
+						send_buffer_msg_out=0;
+				}
+					
+				
+				performing_csma_ca =0;
+
+				}
+				return; //SUCCESS
+			
+			}
+
+			//CCA is not clear, perform new iteration of the CSMA/CA UNSLOTTED
+			
+			//STEP 4
+			NB++;
+			BE = min(BE+1,aMaxBE);
+		
+			//////////printfUART("NB:%i BE:%i\n",NB,BE);
+			
+			//STEP 2
+			//#ifdef PLATFORM_MICAZ
+				random_interval = powf(2,BE) - 1;
+			//#else
+			//	random_interval = powf(2,BE) - 1;
+			//#endif
+			delay_backoff_period = (call Random.rand16() & random_interval );
+			//delay_backoff_period=1;
+			csma_delay=1;
+			
+			////////////printfUART("delay_backoff_period:%i\n",delay_backoff_period);
+		}
+		else
+		{
+			atomic csma_delay=0;
+			//////////printfUART("UNSLOTTED FAIL\n","");
+		}
+	}
+return;
+}
+
+
+void perform_csma_ca()
+{
+	uint8_t random_interval;
+	csma_slotted=1;
+	//STEP 1
+	if (csma_slotted == 0 )
+	{
+		atomic{
+			//UNSLOTTED version
+			init_csma_ca(csma_slotted);
+			//STEP 2
+			random_interval = powf(2,BE) - 1;
+			delay_backoff_period = (call Random.rand16() & random_interval );
+			
+			csma_delay=1;
+			//////////printfUART("delay_backoff_period:%i\n",delay_backoff_period);
+		}
+		return;
+	}
+	else
+	{
+		//SLOTTED version
+		atomic{
+			//DEFERENCE CHANGE
+			if (cca_deference==0)
+			{
+				init_csma_ca(csma_slotted);
+				if (mac_PIB.macBattLifeExt == 1 )
+				{
+					BE = min(2,	mac_PIB.macMinBE);
+				}
+				else
+				{
+					BE = mac_PIB.macMinBE;
+				}
+				csma_locate_backoff_boundary = 1;
+			}
+			else
+			{
+				cca_deference = 0;
+				csma_delay=0;
+				csma_locate_backoff_boundary=0;
+				csma_cca_backoff_boundary = 1;
+			
+			}
+		}
+		return;
+	}
+}
+
+
+uint8_t min(uint8_t val1, uint8_t val2)
+{
+	if (val1 < val2)
+	{
+		return val1;
+	}
+	else
+	{
+		return val2;
+	}
+}
+
+void init_csma_ca(bool slotted)
+{
+
+//initialization of the CSMA/CA protocol variables
+	////////////printfUART("init_csma_ca\n", "") ;
+	
+	csma_delay=0;
+	
+	if (slotted == 0 )
+	{
+		NB=0;
+		BE=mac_PIB.macMinBE;
+	}
+	else
+	{
+		NB=0;
+		CW=2;
+		
+		csma_cca_backoff_boundary=0;
+		csma_locate_backoff_boundary=0;
+	}
+
+return;
+}
+
+
+uint8_t calculate_ifs(uint8_t pk_length)
+{
+	if (pk_length > aMaxSIFSFrameSize)
+		return aMinLIFSPeriod; // + ( ((pk_length * 8) / 250.00) / 0.34 );
+	else
+		return aMinSIFSPeriod; // + ( ((pk_length * 8) / 250.00) / 0.34 );
+}
+
+uint32_t calculate_gts_expiration()
+{
+	uint32_t exp_res;
+	if( mac_PIB.macBeaconOrder > 9 )
+		exp_res= 1;
+	else
+	{
+		//#ifdef PLATFORM_MICAZ
+			exp_res= powf(2,(8-mac_PIB.macBeaconOrder));
+		//#else
+		//	exp_res= powf(2,(8-mac_PIB.macBeaconOrder));
+		//#endif
+	}	
+	//////////printfUART("alculat %i\n",exp_res ) ;
+	return exp_res;
+}
+
+uint8_t check_csma_ca_send_conditions(uint8_t frame_length,uint8_t frame_control1)
+{
+	uint8_t ifs_symbols;
+	uint32_t frame_tx_time;
+	uint32_t remaining_gts_duration;
+	
+	
+	ifs_symbols=calculate_ifs(frame_length);
+	//wait_ifs=1;
+	//call TimerAsync.set_ifs_symbols(ifs_symbols);
+	
+	////////////printfUART("ifs_symbols %i\n",ifs_symbols ) ;
+	
+	if (get_fc1_ack_request(frame_control1) == 1 )
+		frame_tx_time =  frame_length + ACK_LENGTH + aTurnaroundTime + ifs_symbols;
+	else
+		frame_tx_time =  frame_length + ifs_symbols;
+		
+	atomic remaining_gts_duration = time_slot - ( call TimerAsync.get_current_number_backoff_on_time_slot() * aUnitBackoffPeriod);
+	
+	////////////printfUART("frame_tx %d remaing %d\n",frame_tx_time,remaining_gts_duration ) ;
+	
+	if (frame_tx_time < remaining_gts_duration)
+		return 1;
+	else
+		return 0;
+
+}
+
+//DEFERENCE CHANGE
+uint8_t check_csma_ca_backoff_send_conditions(uint32_t delay_backoffs)
+{
+
+	uint32_t number_of_sd_ticks=0;
+	uint32_t current_ticks=0;
+	uint32_t ticks_remaining =0;
+	uint32_t number_of_backoffs_remaining =0;
+	
+	number_of_sd_ticks = call TimerAsync.get_sd_ticks();
+	
+	current_ticks = call TimerAsync.get_current_ticks();
+	
+	ticks_remaining = number_of_sd_ticks - current_ticks;
+	
+	number_of_backoffs_remaining = ticks_remaining / 5;
+	
+	if (number_of_backoffs_remaining > delay_backoffs)
+		return 0;
+	else
+		return 1;
+
+
+
+}
+
+uint8_t check_gts_send_conditions(uint8_t frame_length)
+{
+	uint8_t ifs_symbols;
+	uint32_t frame_tx_time;
+	uint32_t remaining_gts_duration;
+	
+
+	ifs_symbols=calculate_ifs(frame_length);
+	//wait_ifs=1;
+	//call TimerAsync.set_ifs_symbols(ifs_symbols);
+	
+	////////////printfUART("ifs_symbols %i\n",ifs_symbols ) ;
+	
+	frame_tx_time =  frame_length + ACK_LENGTH + aTurnaroundTime + ifs_symbols;
+	
+	remaining_gts_duration = time_slot - ( call TimerAsync.get_current_number_backoff_on_time_slot() * aUnitBackoffPeriod);
+	
+	////////////printfUART("frame_tx %d remaing %d\n",frame_tx_time,remaining_gts_duration ) ;
+	
+	if (frame_tx_time < remaining_gts_duration)
+		return 1;
+	else
+		return 0;
+}
+
+//////////////////////////////////////////////////////////////
+////////////////////////GTS functions////////////////////////
+/////////////////////////////////////////////////////////////
+
+void init_GTS_db()
+{
+	//initialization of the GTS database
+	int i;
+atomic{
+		for (i=0 ; i < 7 ; i++)
+		{
+			GTS_db[i].gts_id=0x00;
+			GTS_db[i].starting_slot=0x00;
+			GTS_db[i].length=0x00;
+			GTS_db[i].direction=0x00;
+			GTS_db[i].DevAddressType=0x0000;
+		
+		}
+	}
+return;
+}
+
+error_t remove_gts_entry(uint16_t DevAddressType)
+{
+	uint8_t r_lenght=0;
+	//int r_start_slot=7;
+	int i;
+	
+	atomic{
+		for (i=0; i < 7 ; i++)
+		{
+			if( GTS_db[i].DevAddressType == DevAddressType )
+			{
+				
+				r_lenght = GTS_db[i].length;
+				//r_start_slot = i;
+				//delete the values
+				GTS_db[i].gts_id=0x00;
+				GTS_db[i].starting_slot=0x00;
+				GTS_db[i].length=0x00;
+				GTS_db[i].direction=0x00;
+				GTS_db[i].DevAddressType=0x0000;
+				GTS_db[i].expiration=0x00;
+				
+				////////////printfUART("GTS Entry removed dev:%i len:%i pos %i\n", DevAddressType,r_lenght,i);
+				GTS_startslot = GTS_startslot + r_lenght;
+				GTS_descriptor_count--;
+				final_CAP_slot = final_CAP_slot + r_lenght;
+			}
+			
+			if ( r_lenght > 0)
+			{
+				if ( GTS_db[i].gts_id != 0x00 && GTS_db[i].DevAddressType !=0x0000)
+				{				
+					GTS_db[i-r_lenght].gts_id = GTS_db[i].gts_id;
+					GTS_db[i-r_lenght].starting_slot = i-r_lenght;
+					GTS_db[i-r_lenght].length = GTS_db[i].length;
+					GTS_db[i-r_lenght].direction = GTS_db[i].direction;
+					GTS_db[i-r_lenght].DevAddressType = GTS_db[i].DevAddressType;
+					GTS_db[i-r_lenght].expiration = GTS_db[i].expiration;
+					
+					//delete the values
+					GTS_db[i].gts_id=0x00;
+					GTS_db[i].starting_slot=0x00;
+					GTS_db[i].length=0x00;
+					GTS_db[i].direction=0x00;
+					GTS_db[i].DevAddressType=0x0000;
+					GTS_db[i].expiration=0x00;
+					
+					////////////printfUART("UPDATED\n","" );
+				}
+			}
+		}
+	}
+return SUCCESS;
+}
+
+error_t add_gts_entry(uint8_t gts_length,bool direction,uint16_t DevAddressType)
+{
+	int i;
+	////////////printfUART("ADDING gts_length: %i\n", gts_length); 
+	////////////printfUART("dir: %i\n", direction); 
+	////////////printfUART("addr: %i\n", DevAddressType);
+
+	//check aMinCAPLength
+	if ( (GTS_startslot - gts_length) < 5 )
+	{
+		////////////printfUART("ADD FAIL%i\n", ""); 
+		
+	}
+	
+	//if it has more than 7 timeslots alocated
+	if ( (GTS_startslot -gts_length) < 9 )
+	{
+		return FAIL;
+	}
+	
+	//check if the address already exists in the GTS list
+	for (i=0 ; i < 7 ; i++)
+	{
+		if ( GTS_db[i].DevAddressType == DevAddressType && GTS_db[i].direction == direction && GTS_db[i].gts_id > 0)
+		{
+			////////////printfUART("ALREADY ADDED\n", ""); 
+			return FAIL;
+		}
+		if ( GTS_null_db[i].DevAddressType == DevAddressType && GTS_null_db[i].gts_id > 0)
+		{
+			////////////printfUART("REJECTED\n", ""); 
+			return FAIL;
+		}
+		
+		
+	}
+	
+atomic{	
+	
+	////////////printfUART("GTS_startslot: %i\n", GTS_startslot); 
+	GTS_startslot = GTS_startslot - gts_length;
+
+	GTS_db[15-GTS_startslot].gts_id=GTS_id;
+	GTS_db[15-GTS_startslot].starting_slot=GTS_startslot;
+	GTS_db[15-GTS_startslot].length=gts_length;
+	GTS_db[15-GTS_startslot].direction=direction;
+	GTS_db[15-GTS_startslot].DevAddressType=DevAddressType;
+	GTS_db[15-GTS_startslot].expiration=0x00;
+
+	////////////printfUART("GTS Entry added start:%i len:%i\n", GTS_startslot,gts_length); 
+	
+	GTS_id++;
+	GTS_descriptor_count++;
+	
+	final_CAP_slot = final_CAP_slot - gts_length;
+	
+	}
+	return SUCCESS;
+}
+
+
+//GTS null functions
+void init_GTS_null_db()
+{
+	//initialization of the GTS database
+	int i;
+	atomic{
+		for (i=0 ; i < 7 ; i++)
+		{
+			GTS_null_db[i].gts_id=0x00;
+			GTS_null_db[i].starting_slot=0x00;
+			GTS_null_db[i].length=0x00;
+			//GTS_null_db[i].direction=0x00;
+			GTS_null_db[i].DevAddressType=0x0000;
+			GTS_null_db[i].persistencetime=0x00;
+		}
+	}
+return;
+}
+
+
+error_t add_gts_null_entry(uint8_t gts_length,bool direction,uint16_t DevAddressType)
+{
+	int i;
+		
+	//check if the address already exists in the GTS list
+	for (i=0 ; i < 7 ; i++)
+	{
+		if ( GTS_null_db[i].DevAddressType == DevAddressType && GTS_null_db[i].gts_id > 0)
+		{
+			////////////printfUART("ALREADY ADDED null\n", ""); 
+			return FAIL;
+		}
+	}
+	
+	for (i=0 ; i < 7 ; i++)
+	{
+		if ( GTS_null_db[i].DevAddressType==0x0000 && GTS_null_db[i].gts_id == 0x00)
+		{
+			GTS_null_db[i].gts_id=GTS_id;
+			GTS_null_db[i].starting_slot=0x00;
+			GTS_null_db[i].length=0x00;
+			//GTS_null_db[i].direction=0x00;
+			GTS_null_db[i].DevAddressType=DevAddressType;
+			GTS_null_db[i].persistencetime=0x00;
+			
+			
+			////////////printfUART("GTS null Entry added addr:%x\n", DevAddressType); 
+			
+			GTS_id++;
+			GTS_null_descriptor_count++;
+			
+		return SUCCESS;
+		}
+	}
+
+	
+return FAIL;	
+}
+
+task void increment_gts_null()
+{
+	int i;
+	
+	////////////printfUART("init inc\n",""); 
+atomic{
+	for (i=0 ; i < 7 ; i++)
+	{
+		if ( GTS_null_db[i].DevAddressType != 0x0000 && GTS_null_db[i].gts_id != 0x00)
+		{
+			////////////printfUART("increm %x\n", GTS_null_db[i].DevAddressType); 
+			GTS_null_db[i].persistencetime++;
+		
+		}
+		
+		if ( GTS_null_db[i].persistencetime > (aGTSDescPersistenceTime -1)  )
+		{
+			GTS_null_db[i].gts_id=0x00;
+			GTS_null_db[i].starting_slot=0x00;
+			GTS_null_db[i].length=0x00;
+			//GTS_null_db[i].direction=0x00;
+			GTS_null_db[i].DevAddressType=0x0000;
+			GTS_null_db[i].persistencetime=0x00;
+			
+			////////////printfUART("GTS null removed addr:%x\n", GTS_null_db[i].DevAddressType); 
+		
+			atomic GTS_null_descriptor_count--;
+		}
+			
+	}
+	
+	}
+////////////printfUART("end inc\n",""); 
+return;
+}
+
+task void check_gts_expiration()
+{
+	int i;
+////////////printfUART("init exp\n",""); 
+atomic{	
+	atomic gts_expiration=calculate_gts_expiration();
+	////////////printfUART("gts_expiration:%i\n", gts_expiration); 
+	atomic gts_expiration=2;
+	////////////printfUART("gts_expiration:%i\n", gts_expiration); 
+	
+	for (i=0 ; i < 7 ; i++)
+	{
+		
+		if ( GTS_db[i].DevAddressType != 0x0000 && GTS_db[i].gts_id != 0x00)
+		{
+			if( GTS_db[i].expiration == (gts_expiration + 1) && GTS_db[i].direction ==0x00)
+			{
+				////////////printfUART("GTS expired addr:%x\n", GTS_null_db[i].DevAddressType); 
+				//remove gts, indicate on the gts null list
+				atomic{
+				
+					add_gts_null_entry(GTS_db[i].length,GTS_db[i].direction,GTS_db[i].DevAddressType);
+					
+					remove_gts_entry(GTS_db[i].DevAddressType);
+				}
+			}
+			else
+			{
+				atomic GTS_db[i].expiration ++;
+			}
+		}
+	}
+	
+	
+	}
+	////////////printfUART("end exp\n",""); 
+return;
+}
+
+void init_available_gts_index()
+	{
+		int i=0;
+		atomic{
+			available_gts_index_count = GTS_SEND_BUFFER_SIZE;
+			for(i=0;i < GTS_SEND_BUFFER_SIZE;i++)
+			{
+				available_gts_index[i]=i;
+			}
+		}
+		return;
+	}
+/*****************************GTS BUFFER******************************/
+void init_gts_slot_list()
+{
+	int i=0;
+	for(i=0;i<7;i++)
+	{
+		gts_slot_list[i].element_count = 0x00;
+		gts_slot_list[i].element_in = 0x00;
+		gts_slot_list[i].element_out = 0x00;
+	}
+}
+
+
+task void start_coordinator_gts_send()
+{
+atomic{
+
+	coordinator_gts_send_pending_data =0;
+	
+	if(gts_slot_list[15-number_time_slot].element_count > 0)
+	{
+		if (check_gts_send_conditions(gts_send_buffer[gts_slot_list[15-number_time_slot].gts_send_frame_index[gts_slot_list[15-number_time_slot].element_out]].length) == 1 )
+		{
+			
+			gts_send_buffer[gts_slot_list[15-number_time_slot].gts_send_frame_index[gts_slot_list[15-number_time_slot].element_out]].length = gts_send_buffer[gts_slot_list[15-number_time_slot].gts_send_frame_index[gts_slot_list[15-number_time_slot].element_out]].length -2;
+			
+			call PD_DATA.request(gts_send_buffer[gts_slot_list[15-number_time_slot].gts_send_frame_index[gts_slot_list[15-number_time_slot].element_out]].length,(uint8_t *)&gts_send_buffer[gts_slot_list[15-number_time_slot].gts_send_frame_index[gts_slot_list[15-number_time_slot].element_out]]);
+	
+			available_gts_index_count++;
+			available_gts_index[available_gts_index_count] = gts_slot_list[15-number_time_slot].gts_send_frame_index[gts_slot_list[15-number_time_slot].element_out];
+			
+			gts_slot_list[15-number_time_slot].element_count--;
+			gts_slot_list[15-number_time_slot].element_out++;
+			
+			if (gts_slot_list[15-number_time_slot].element_out == GTS_SEND_BUFFER_SIZE)
+				gts_slot_list[15-number_time_slot].element_out=0;
+
+			if(gts_slot_list[15-number_time_slot].element_count > 0 )
+			{
+				coordinator_gts_send_pending_data =1;
+				coordinator_gts_send_time_slot = number_time_slot;
+			}
+		}
+	}
+}
+return;
+}
+
+task void start_gts_send()
+{
+
+	atomic{
+	gts_send_pending_data = 0;
+	
+	if(gts_send_buffer_count > 0)
+	{
+		if (check_gts_send_conditions(gts_send_buffer[gts_send_buffer_msg_out].length) == 1 )
+		{
+
+			gts_send_buffer[gts_send_buffer_msg_out].length = gts_send_buffer[gts_send_buffer_msg_out].length -2;
+
+			call PD_DATA.request(gts_send_buffer[gts_send_buffer_msg_out].length,(uint8_t *)&gts_send_buffer[gts_send_buffer_msg_out]);
+	
+			gts_send_buffer_count --;
+			gts_send_buffer_msg_out++;
+
+			if (gts_send_buffer_msg_out == GTS_SEND_BUFFER_SIZE)
+				gts_send_buffer_msg_out=0;
+
+			////////////printfUART("after send %i %i %i \n",gts_send_buffer_count,gts_send_buffer_msg_in,gts_send_buffer_msg_out);
+			
+			if (gts_send_buffer_count > 0)
+				gts_send_pending_data = 1;	
+		}
+	}
+
+}
+return;
+}
+
+//////////////////////////////////////////////////////////////
+//////////Indirect transmission functions////////////////////
+/////////////////////////////////////////////////////////////
+
+void init_indirect_trans_buffer()
+{
+	int i;
+	for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+	{
+		indirect_trans_queue[i].handler = 0x00;
+		indirect_trans_count=0;
+	}
+
+return;
+}
+
+
+error_t remove_indirect_trans(uint8_t handler)
+{
+
+	int i;
+	uint8_t removed_ok=0;
+	for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+	{
+		if (indirect_trans_queue[i].handler == handler)
+		{
+			indirect_trans_queue[i].handler = 0x00;
+			removed_ok = 1;
+			indirect_trans_count--;
+			break;
+		}
+	}
+
+	if (removed_ok == 0) 
+	{
+		return MAC_INVALID_HANDLE;
+	}
+	else
+	{
+		return SUCCESS;
+	}
+}
+
+
+void increment_indirect_trans()
+{
+	int i;
+	for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+	{
+		if (indirect_trans_queue[i].handler != 0x00)
+		{
+			indirect_trans_queue[i].transaction_persistent_time++;
+			if (indirect_trans_queue[i].transaction_persistent_time == mac_PIB.macTransactionPersistenceTime )
+				remove_indirect_trans(indirect_trans_queue[i].handler);
+		}
+	}
+
+return;
+}
+
+void send_ind_trans_addr(uint32_t DeviceAddress[])
+{
+	
+	uint8_t destination_address=0;
+	
+	dest_short *dest_short_ptr =0;
+	dest_long *dest_long_ptr=0;
+	
+	int i=0;
+	MPDU *frame_ptr=0;
+	
+	//printfUART("send_ind_trans_addr DeviceAddress0: %y DeviceAddress1: %y \n",DeviceAddress[0],DeviceAddress[1]);
+
+    //list_indirect_trans_buffer();
+
+		for(i=0;i<INDIRECT_BUFFER_SIZE;i++)
+		{
+			if (indirect_trans_queue[i].handler > 0x00)
+			{
+				frame_ptr = (MPDU *)indirect_trans_queue[i].frame;
+				destination_address=get_fc2_dest_addr(frame_ptr->frame_control2);
+				
+				switch(destination_address)
+				{
+					case LONG_ADDRESS: dest_long_ptr = (dest_long *) frame_ptr->data;
+										break;
+					case SHORT_ADDRESS: dest_short_ptr = (dest_short *) frame_ptr->data; 								
+										break;
+				}
+				
+				//check the full address
+				if ( (dest_long_ptr->destination_address0 == DeviceAddress[1] && dest_long_ptr->destination_address1 == DeviceAddress[0]) || ( dest_short_ptr->destination_address == (uint16_t)DeviceAddress[0] ))
+				{
+					
+					if (send_buffer_msg_in == SEND_BUFFER_SIZE)
+						send_buffer_msg_in=0;
+						
+					memcpy(&send_buffer[send_buffer_msg_in],(MPDU *) &indirect_trans_queue[i].frame,sizeof(MPDU));
+					
+					//enable retransmissions
+					send_buffer[send_buffer_msg_in].retransmission =0;
+					send_buffer[send_buffer_msg_in].indirect = i + 1;
+					
+					//check upon reception
+					indirect_trans_queue[i].handler=0x00;
+					//verify temporary error on the association request
+					
+					indirect_trans_count--;
+					if(indirect_trans_count > INDIRECT_BUFFER_SIZE )
+					{
+						indirect_trans_count=0;
+					}
+					
+					atomic send_buffer_count++;
+					atomic send_buffer_msg_in++;
+			
+					post send_frame_csma();
+					
+					//printfUART("i send\n","");
+					
+					return;
+				}
+			}
+		}
+		//printfUART("i not found","");
+
+	
+return;
+} 
+/*
+  event void CC2420Config.syncDone( error_t error )
+  {
+  
+	//printfUART("CC2420Config %i p %x sa %x\n",call CC2420Config.isAddressRecognitionEnabled(),call CC2420Config.getPanAddr(), call CC2420Config.getShortAddr()); 
+  
+  return;
+  }
+
+*/
+
+/***************************DEBUG FUNCTIONS******************************/
+/* This function are list functions with the purpose of debug, to use then uncomment the declatarion
+on top of this file*/
+/*
+
+void list_mac_pib()
+{
+//////////printfUART("mac_PIB.macAckWaitDuration: %x\n",mac_PIB.macAckWaitDuration);
+//////////printfUART("mac_PIB.macAssociationPermit: %i\n",mac_PIB.macAssociationPermit);
+//////////printfUART("mac_PIB.macAutoRequest: %i\n",mac_PIB.macAutoRequest);
+//////////printfUART("mac_PIB.macBattLifeExt %i\n",mac_PIB.macBattLifeExt);
+//////////printfUART("mac_PIB.macBattLifeExtPeriods %i\n",mac_PIB.macBattLifeExtPeriods);
+//beacon payload
+//////////printfUART("mac_PIB.macBeaconPayloadLenght %i\n",mac_PIB.macBeaconPayloadLenght);
+//////////printfUART("mac_PIB.macBeaconOrder %i\n",mac_PIB.macBeaconOrder);
+//////////printfUART("mac_PIB.macBeaconTxTime %i\n",mac_PIB.macBeaconTxTime);
+//////////printfUART("mac_PIB.macBSN %i\n",mac_PIB.macBSN);
+//////////printfUART("mac_PIB.macCoordExtendedAddress0 %y\n",mac_PIB.macCoordExtendedAddress0);
+//////////printfUART("mac_PIB.macCoordExtendedAddress1 %y\n",mac_PIB.macCoordExtendedAddress1);
+//////////printfUART("mac_PIB.macCoordShortAddress: %x\n",mac_PIB.macCoordShortAddress);
+//////////printfUART("mac_PIB.macDSN: %x\n",mac_PIB.macDSN);
+//////////printfUART("mac_PIB.macGTSPermit: %x\n",mac_PIB.macGTSPermit);
+//////////printfUART("mac_PIB.macMaxCSMABackoffs: %x\n",mac_PIB.macMaxCSMABackoffs);
+//////////printfUART("mac_PIB.macMinBE: %x\n",mac_PIB.macMinBE);
+//////////printfUART("mac_PIB.macPANId: %x\n",mac_PIB.macPANId);
+//////////printfUART("mac_PIB.macPromiscuousMode: %x\n",mac_PIB.macPromiscuousMode);
+//////////printfUART("mac_PIB.macRxOnWhenIdle: %x\n",mac_PIB.macRxOnWhenIdle);
+//////////printfUART("mac_PIB.macShortAddress: %y\n",mac_PIB.macShortAddress);
+//////////printfUART("mac_PIB.macSuperframeOrder: %x\n",mac_PIB.macSuperframeOrder);
+//////////printfUART("mac_PIB.macTransactionPersistenceTime: %y\n",mac_PIB.macTransactionPersistenceTime);
+
+return;
+}
+
+void list_gts()
+{
+	int i;
+	//////////printfUART("GTS list%i\n", GTS_descriptor_count); 
+	
+	for (i=0; i< 7;i++)
+	{
+		//////////printfUART("GTSID: %i",GTS_db[i].gts_id); 	
+		//////////printfUART("start slot: %i",GTS_db[i].starting_slot);
+		//////////printfUART("lenght: %i",GTS_db[i].length); 	
+		//////////printfUART("dir: %i",GTS_db[i].direction); 	
+		//////////printfUART("DevAddressType: %i",GTS_db[i].DevAddressType);
+	 	//////////printfUART("expiration: %i \n",GTS_db[i].expiration);
+	}
+	
+}
+
+void list_my_gts()
+{
+atomic{
+		//////////printfUART("SEND GTS s_GTSss: %i s_GTS_length: %i\n",s_GTSss,s_GTS_length); 	
+		
+		//////////printfUART("RECEIVE GTS r_GTSss: %i r_GTS_length: %i\n",r_GTSss,r_GTS_length); 
+}
+}
+*/
+
+void list_indirect_trans_buffer()
+{
+	int i;
+	printfUART("indirect_trans_count %i\n", indirect_trans_count); 
+	
+	for (i=0; i< INDIRECT_BUFFER_SIZE;i++)
+	{
+		printfUART("hand: %i \n",indirect_trans_queue[i].handler); 
+		
+		//printfUART("start slot: %i",GTS_db[i].starting_slot);
+
+	}
+	
+}
+/*
+void list_gts_null()
+{
+	int i;
+	//////////printfUART("GTS null list%i\n", GTS_null_descriptor_count); 
+	
+	for (i=0; i< GTS_null_descriptor_count;i++)
+	{
+		////////////printfUART("GTSID: %i",GTS_null_db[i].gts_id); 	
+		//////////printfUART("start slot: %i",GTS_null_db[i].starting_slot);
+		//////////printfUART("lenght: %i",GTS_null_db[i].length); 	
+		////////////printfUART("dir: %i",GTS_null_db[i].direction); 	
+		//////////printfUART("DevAddressType: %i \n",GTS_null_db[i].DevAddressType); 
+		//////////printfUART("persistencetime: %i \n",GTS_null_db[i].persistencetime); 
+	}
+	
+}
+
+*/
+
+
+}
+
diff --git a/tos/lib/net/zigbee/ieee802154/macTDBS/mac_const.h b/tos/lib/net/zigbee/ieee802154/macTDBS/mac_const.h
new file mode 100644
index 00000000..8c61d05a
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/macTDBS/mac_const.h
@@ -0,0 +1,225 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author open-zb http://www.open-zb.net
+ * @author Andre Cunha
+ */
+
+// The MAC constants are defined in here.
+// Notice that these makes use of the PHY constants.
+//pag 134
+
+#ifndef __MAC_CONST__
+#define __MAC_CONST__
+
+
+#define aBaseSlotDuration          60
+#define aBaseSuperframeDuration    960 //aBaseSlotDuration*aNumSuperframeSlots
+
+//#define aExtendedAddress         // This should be defined by the device!
+
+#define aMaxBE                     5 //CSMA-CA
+
+#define aMaxBeaconOverhead         75
+#define aMaxBeaconPayloadLength    aMaxPHYPacketSize-aMaxBeaconOverhead
+#define aGTSDescPersistenceTime    4
+#define aMaxFrameOverhead          25
+#define aMaxFrameResponseTime      1220
+#define aMaxFrameRetries           1
+
+//(SYNC)number of beacons lost before sending a Beacon-Lost indication
+#define aMaxLostBeacons            4
+#define aMaxMACFrameSize           aMaxPHYPacketSize-aMaxFrameOverhead
+#define aMaxSIFSFrameSize          18
+#define aMinCAPLength              440
+#define aMinLIFSPeriod             40
+#define aMinSIFSPeriod             12
+#define aNumSuperframeSlots        16
+#define aResponseWaitTime          32*aBaseSuperframeDuration
+#define aUnitBackoffPeriod         20
+
+
+#define TYPE_BEACON 0
+#define TYPE_DATA 1
+#define TYPE_ACK 2
+#define TYPE_CMD 3
+
+#define SHORT_ADDRESS 2
+#define LONG_ADDRESS 3
+#define RESERVED_ADDRESS 1
+
+#define NUMBER_TIME_SLOTS 16
+
+#define ACK_LENGTH 5
+
+//buffer sizes
+#define MAX_GTS_BUFFER 7
+
+//#define MAX_GTS_PEND 2
+//#define MAX_GTS_IN_SLOT 1
+
+#define INDIRECT_BUFFER_SIZE 2
+#define RECEIVE_BUFFER_SIZE 4
+#define SEND_BUFFER_SIZE 3
+
+#define UPSTREAM_BUFFER_SIZE 3
+
+#define GTS_SEND_BUFFER_SIZE 3
+
+#define BACKOFF_PERIOD_MS 0.34724
+#define BACKOFF_PERIOD_US 347.24
+
+//value of each symbol in us
+#define EFFECTIVE_SYMBOL_VALUE 17.362
+
+// MAC PIB attribute
+typedef struct
+{
+	//pag 135
+	uint8_t macAckWaitDuration;
+	bool macAssociationPermit;//FDD
+	bool macAutoRequest;
+	bool macBattLifeExt;
+	uint8_t macBattLifeExtPeriods;
+	
+	uint8_t macBeaconPayload[aMaxBeaconPayloadLength];//FDD
+	
+	uint8_t macBeaconPayloadLenght;//FDD
+	uint8_t macBeaconOrder;//FDD
+	
+	uint32_t macBeaconTxTime;//FDD
+	uint8_t macBSN;//FDD
+	uint32_t macCoordExtendedAddress0;
+	uint32_t macCoordExtendedAddress1;
+	uint16_t macCoordShortAddress;
+	uint8_t macDSN;
+	bool macGTSPermit;//FDD
+	uint8_t macMaxCSMABackoffs;
+	uint8_t macMinBE;
+	uint16_t macPANId;
+	bool macPromiscuousMode;//FDD
+	bool macRxOnWhenIdle;
+	uint32_t macShortAddress;
+	uint8_t macSuperframeOrder;//FDD
+	uint32_t macTransactionPersistenceTime;//FDD
+	
+} macPIB;
+
+// MAC PIB security ACL entry descriptor
+typedef struct
+{
+	uint32_t ACLExtendedAddress[2];
+	uint16_t ACLShortAddress;
+	uint16_t ACLPANId;
+	uint8_t ACLSecurityMaterialLength;
+	//variable string
+	uint8_t ACLSecurityMaterial;
+	uint8_t ACLSecuritySuite;
+	
+}ACLDescriptor;
+
+// MAC PIB security attribute
+typedef struct
+{
+	//pag 138
+	ACLDescriptor macACLEntryDescriptorSet;
+	uint8_t macACLEntryDescriptorSetSize;
+	bool macDefaultSecurity;
+	uint8_t macDefaultSecurityMaterialLength;
+	//variable string
+	uint8_t macDefaultSecurityMaterial;
+	uint8_t macDefaultSecuritySuite;
+	uint8_t macSecurityMode;
+	
+}macPIBsec;
+
+//MAC PANDescriptor
+typedef struct
+{
+	//pag76
+	uint8_t CoordAddrMode;
+	uint16_t CoordPANId;
+	uint32_t CoordAddress0;
+	uint32_t CoordAddress1;
+	uint8_t LogicalChannel;
+	//superframe specification field
+	uint16_t SuperframeSpec;
+	bool GTSPermit;
+	uint8_t LinkQuality;
+	uint32_t TimeStamp;
+	bool SecurityUse;
+	uint8_t ACLEntry;
+	bool SecurityFailure;
+
+}PANDescriptor;
+
+//GTS entry (used in the PAN coordinator)
+typedef struct
+{
+	uint8_t gts_id;
+	uint8_t starting_slot;
+	uint8_t length;
+	uint8_t direction;
+	uint16_t DevAddressType;
+	uint8_t expiration;
+
+}GTSinfoEntryType;
+
+//GTS entry (used in the PAN coordinator)
+typedef struct
+{
+	uint8_t gts_id;
+	uint8_t starting_slot;
+	uint8_t length;
+	uint16_t DevAddressType;
+	uint8_t persistencetime;
+
+}GTSinfoEntryType_null;
+
+typedef struct
+{
+	uint8_t handler;
+	uint16_t transaction_persistent_time;
+	
+	//MPDU frame;
+	uint8_t frame[127];
+
+}indirect_transmission_element;
+
+typedef struct gts_slot_element
+{
+	uint8_t element_count;
+	uint8_t element_in;
+	uint8_t element_out;
+	uint8_t gts_send_frame_index[GTS_SEND_BUFFER_SIZE];
+
+}gts_slot_element;
+
+
+typedef struct time_stamp32
+{
+
+uint32_t time_stamp;
+
+}time_stamp32;
+
+typedef struct time_stamp16
+{
+
+uint16_t time_stamp;
+
+}time_stamp16;
+
+//MAC ACTIVE CHANNEL SCAN REDUCED PAN DESCRIPTOR (SHOR ADDRESS ONLY)
+typedef struct SCAN_PANDescriptor
+{
+	//pag76
+	uint16_t CoordPANId;
+	uint16_t CoordAddress;
+	uint8_t LogicalChannel;
+	//superframe specification field
+	uint16_t SuperframeSpec;
+	uint8_t lqi;
+}SCAN_PANDescriptor;
+
+
+#endif
diff --git a/tos/lib/net/zigbee/ieee802154/macTDBS/mac_enumerations.h b/tos/lib/net/zigbee/ieee802154/macTDBS/mac_enumerations.h
new file mode 100644
index 00000000..d53c9cbf
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/macTDBS/mac_enumerations.h
@@ -0,0 +1,122 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author open-zb http://www.open-zb.net
+ * @author Andre Cunha
+ */
+ 
+#ifndef __MAC_ENUMERATIONS__
+#define __MAC_ENUMERATIONS__
+ 
+//Mac enumerations standard pag 110
+
+enum { 
+		MAC_SUCCESS = 0x00,
+        MAC_BEACON_LOSS = 0xE0,
+        MAC_CHANNEL_ACCESS_FAILURE = 0xE1,
+        MAC_DENIED = 0xE2,
+		//MLME-RESET
+        MAC_DISABLE_TRX_FAILURE = 0xE3,
+        MAC_FAILED_SECURITY_CHECK = 0xE4,
+        MAC_FRAME_TOO_LONG = 0xE5,
+        MAC_INVALID_GTS = 0xE6,
+        MAC_INVALID_HANDLE = 0xE7,
+        MAC_INVALID_PARAMETER = 0xE8,
+        MAC_NO_ACK = 0xE9,
+        MAC_NO_BEACON = 0xEA,
+        MAC_NO_DATA = 0xEB,
+        MAC_NO_SHORT_ADDRESS = 0xEC,
+        MAC_OUT_OF_CAP = 0xED,
+        MAC_PAN_ID_CONFLICT = 0xEE,
+        MAC_REALIGNMENT = 0xEF,
+        MAC_TRANSACTION_EXPIRED = 0xF0,
+        MAC_TRANSACTION_OVERFLOW = 0xF1,
+        MAC_TX_ACTIVE = 0xF2,
+        MAC_UNAVAILABLE_KEY = 0xF3,
+        MAC_UNSUPPORTED_ATTRIBUTE = 0xF4
+        };
+
+
+
+//mac dissassociation enums
+enum{
+		MAC_PAN_COORD_LEAVE = 0x01,
+        MAC_PAN_DEVICE_LEAVE = 0x02,
+
+};
+
+
+
+//mac commands enums
+enum {
+
+	CMD_ASSOCIATION_REQUEST = 0x01,
+	CMD_ASSOCIATION_RESPONSE = 0x02,
+	CMD_DISASSOCIATION_NOTIFICATION = 0x03,
+	CMD_DATA_REQUEST = 0x04,
+	CMD_PANID_CONFLICT = 0x05,
+	CMD_ORPHAN_NOTIFICATION = 0x06,
+	CMD_BEACON_REQUEST = 0x07,
+	CMD_COORDINATOR_REALIGNMENT = 0x08,
+	CMD_GTS_REQUEST = 0x09
+};
+
+
+//mac association responses
+enum {
+
+	CMD_RESP_ASSOCIATION_SUCCESSFUL = 0x00,
+	CMD_RESP_PAN_CAPACITY =0x01,
+	CMD_RESP_ACCESS_DENIED =0x02
+	
+};
+
+//MAC PIB Enumeration
+enum {
+
+	MACACKWAITDURATION = 0x40,
+	MACASSOCIATIONPERMIT=0x41,
+	MACAUTOREQUEST = 0x42,
+	MACBATTLIFEEXT=0x43,
+	MACBATTLIFEEXTPERIODS=0x44,
+	MACBEACONPAYLOAD=0x45,
+	MACMAXBEACONPAYLOADLENGTH=0x46,
+	MACBEACONORDER=0x47,
+	MACBEACONTXTIME=0x48,
+	MACBSN=0x49,
+	MACCOORDEXTENDEDADDRESS=0x4a,
+	MACCOORDSHORTADDRESS=0x4b,
+	MACDSN=0x4c,
+	MACGTSPERMIT=0x4d,
+	MACMAXCSMABACKOFFS=0x4e,
+	MACMINBE=0x4f,
+	MACPANID=0x50,
+	MACPROMISCUOUSMODE=0x51,
+	MACRXONWHENIDLE=0x52,
+	MACSHORTADDRESS=0x53,
+	MACSUPERFRAMEORDER=0x54,
+	MACTRANSACTIONPERSISTENCETIME=0x55
+
+};
+
+//gts enumerations
+enum{
+	GTS_TX_ONLY = 0x00,
+	GTS_RX_ONLY = 0x01
+};
+
+//channel scan enumerations
+#ifndef TKN154_MAC
+enum{
+	ED_SCAN = 0x00,
+	ACTIVE_SCAN = 0x01,
+	PASSIVE_SCAN = 0x02,
+	ORPHAN_SCAN = 0x03
+};
+#else
+enum{
+	ED_SCAN = 0x00
+}
+#endif
+//
+#endif
+
diff --git a/tos/lib/net/zigbee/ieee802154/nwk/Makefile b/tos/lib/net/zigbee/ieee802154/nwk/Makefile
new file mode 100644
index 00000000..d06d4ae4
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/nwk/Makefile
@@ -0,0 +1,12 @@
+COMPONENT=NWKC
+
+PFLAGS += 	-I$(TOSROOT)/tos/ieee802154/includes \
+			-I$(TOSROOT)/tos/ieee802154/mac \
+			-I$(TOSROOT)/tos/ieee802154/phy \
+			-I$(TOSROOT)/tos/ieee802154/timerasync \
+			-I$(TOSROOT)/tos/ieee802154/interfaces \
+			-I$(TOSROOT)/tos/ieee802154/interfaces/mac \
+			-I$(TOSROOT)/tos/ieee802154/interfaces/phy \
+			-I$(TOSROOT)/tos/chips/cc2420/ieee802154
+include $(MAKERULES)
+
diff --git a/tos/lib/net/zigbee/ieee802154/nwk/NWKC.nc b/tos/lib/net/zigbee/ieee802154/nwk/NWKC.nc
new file mode 100644
index 00000000..923d4680
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/nwk/NWKC.nc
@@ -0,0 +1,141 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+#include <Timer.h>
+
+#ifndef TKN154_MAC
+#endif
+#include "phy_const.h"
+#include "phy_enumerations.h"
+#include "mac_const.h"
+
+
+
+#include "mac_enumerations.h"
+#include "mac_func.h"
+#include "nwk_func.h"
+#include "nwk_enumerations.h"
+#include "nwk_const.h"
+
+
+configuration NWKC {
+
+	//provides
+	
+	//NLDE NWK data service  
+	
+	provides interface NLDE_DATA;
+	
+	
+	//NLME NWK Management service
+	
+	provides interface NLME_NETWORK_FORMATION;
+	provides interface NLME_NETWORK_DISCOVERY;
+	provides interface NLME_START_ROUTER;
+	provides interface NLME_JOIN;
+	provides interface NLME_LEAVE;
+	
+	/*     
+	provides interface NLME_PERMIT_JOINING;
+	provides interface NLME_DIRECT_JOIN;	*/
+	provides interface NLME_RESET;
+	
+	provides interface NLME_SYNC;
+	
+	provides interface NLME_GET;
+	provides interface NLME_SET;
+
+}
+implementation {
+
+  components MainC;
+  MainC.SoftwareInit -> NWKP;
+  
+  components LedsC;
+  components NWKP;
+       
+
+
+
+  NWKP.Leds -> LedsC;
+   
+   
+	components RandomC;
+	NWKP.Random -> RandomC;
+
+
+ 
+  //MAC interfaces
+#ifndef TKN154_MAC
+
+  components MacC;
+
+  NWKP.MLME_START -> MacC.MLME_START;
+  
+  NWKP.MLME_GET ->MacC.MLME_GET;
+  NWKP.MLME_SET ->MacC.MLME_SET;
+  
+  NWKP.MLME_BEACON_NOTIFY ->MacC.MLME_BEACON_NOTIFY;
+  NWKP.MLME_GTS -> MacC.MLME_GTS;
+  
+  NWKP.MLME_ASSOCIATE->MacC.MLME_ASSOCIATE;
+  NWKP.MLME_DISASSOCIATE->MacC.MLME_DISASSOCIATE;
+  
+  NWKP.MLME_ORPHAN->MacC.MLME_ORPHAN;
+  NWKP.MLME_SYNC->MacC.MLME_SYNC;
+  NWKP.MLME_SYNC_LOSS->MacC.MLME_SYNC_LOSS;
+  NWKP.MLME_RESET->MacC.MLME_RESET;
+  NWKP.MLME_SCAN->MacC.MLME_SCAN;
+  
+  NWKP.MCPS_DATA->MacC.MCPS_DATA;
+#else
+
+
+  components WrapperC;
+  NWKP.MLME_RESET->WrapperC.OPENZB_MLME_RESET;
+  NWKP.MLME_START -> WrapperC.OPENZB_MLME_START;
+  
+  NWKP.MLME_GET ->WrapperC.OPENZB_MLME_GET;
+  NWKP.MLME_SET ->WrapperC.OPENZB_MLME_SET;
+  
+  NWKP.MLME_BEACON_NOTIFY ->WrapperC.OPENZB_MLME_BEACON_NOTIFY;
+  NWKP.MLME_GTS -> WrapperC.OPENZB_MLME_GTS;
+  
+  NWKP.MLME_ASSOCIATE->WrapperC.OPENZB_MLME_ASSOCIATE;
+  NWKP.MLME_DISASSOCIATE->WrapperC.OPENZB_MLME_DISASSOCIATE;
+  
+  NWKP.MLME_ORPHAN->WrapperC.OPENZB_MLME_ORPHAN;
+  NWKP.MLME_SYNC->WrapperC.OPENZB_MLME_SYNC;
+  NWKP.MLME_SYNC_LOSS->WrapperC.OPENZB_MLME_SYNC_LOSS;
+  NWKP.MLME_SCAN->WrapperC.OPENZB_MLME_SCAN;
+  
+  NWKP.MCPS_DATA->WrapperC.OPENZB_MCPS_DATA;
+#endif
+
+///////////////
+  	
+	//NLDE NWK data service  
+	NLDE_DATA=NWKP;
+	
+	//NLME NWK Management service
+	NLME_NETWORK_FORMATION=NWKP;
+	NLME_NETWORK_DISCOVERY=NWKP;
+	
+	NLME_START_ROUTER=NWKP;
+	
+	NLME_JOIN=NWKP;
+	NLME_LEAVE=NWKP;
+	
+	/*
+	NLME_PERMIT_JOINING=NWKP;
+	NLME_DIRECT_JOIN=NWKP;*/
+	NLME_RESET=NWKP;
+	
+	NLME_SYNC=NWKP;
+	NLME_GET=NWKP;
+	NLME_SET=NWKP;
+	  
+	  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/nwk/NWKP.nc b/tos/lib/net/zigbee/ieee802154/nwk/NWKP.nc
new file mode 100644
index 00000000..e1032cc0
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/nwk/NWKP.nc
@@ -0,0 +1,1559 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+#include <Timer.h>
+#include "printfUART.h"
+
+
+
+
+module NWKP {
+	
+
+	uses interface Leds;
+	
+	//MAC interfaces
+#ifndef TKN154_MAC
+	uses interface MLME_START;
+	
+	uses interface MLME_GET;
+	uses interface MLME_SET;
+	
+	uses interface MLME_BEACON_NOTIFY;
+	uses interface MLME_GTS;
+	
+	uses interface MLME_ASSOCIATE;
+	uses interface MLME_DISASSOCIATE;
+	
+	uses interface MLME_ORPHAN;
+	
+	uses interface MLME_SYNC;
+	uses interface MLME_SYNC_LOSS;
+	
+	uses interface MLME_RESET;
+	
+	uses interface MLME_SCAN;
+	
+	
+	uses interface MCPS_DATA;
+
+#else
+	uses interface OPENZB_MLME_START as MLME_START;
+	
+	uses interface OPENZB_MLME_GET as MLME_GET;
+	uses interface OPENZB_MLME_SET as MLME_SET;
+	
+	uses interface OPENZB_MLME_BEACON_NOTIFY as MLME_BEACON_NOTIFY;
+	uses interface OPENZB_MLME_GTS as MLME_GTS;
+	
+	uses interface OPENZB_MLME_ASSOCIATE as MLME_ASSOCIATE;
+	uses interface OPENZB_MLME_DISASSOCIATE as MLME_DISASSOCIATE;
+	
+	uses interface OPENZB_MLME_ORPHAN as MLME_ORPHAN;
+	
+	uses interface OPENZB_MLME_SYNC as MLME_SYNC;
+	uses interface OPENZB_MLME_SYNC_LOSS as MLME_SYNC_LOSS;
+	
+	uses interface OPENZB_MLME_RESET as MLME_RESET;
+	
+	uses interface OPENZB_MLME_SCAN as MLME_SCAN;
+	
+	
+	uses interface OPENZB_MCPS_DATA as MCPS_DATA;
+
+
+#endif
+
+
+	uses interface Random;
+
+//provides
+
+	provides interface Init;
+	provides interface NLDE_DATA;
+
+	//NLME NWK Management services
+    provides interface NLME_NETWORK_FORMATION;
+   	provides interface NLME_NETWORK_DISCOVERY;
+	provides interface NLME_START_ROUTER;
+	provides interface NLME_JOIN;
+	provides interface NLME_LEAVE;
+	provides interface NLME_SYNC;
+ 
+	/*  
+	provides interface NLME_PERMIT_JOINING;
+	provides interface NLME_DIRECT_JOIN;*/
+	provides interface NLME_RESET;
+	
+	provides interface NLME_GET;
+	provides interface NLME_SET;
+
+  
+}
+implementation {
+
+
+	nwkIB nwk_IB;
+	
+	uint8_t device_type = END_DEVICE;
+	
+/*****************************************************/
+/*************Neighbourtable Variables****************/
+/*****************************************************/ 
+
+	//neighbour table array:
+	neighbortableentry neighbortable[NEIGHBOUR_TABLE_SIZE];
+	//number of neigbourtable entries:
+	uint8_t neighbour_count;
+	//the index of the parents neighbortable entry
+	uint8_t parent;
+	
+
+/*****************************************************/
+/****************ASSOCIATION Variables********************/
+/*****************************************************/ 
+
+	//CURRENT NETWORK ADDRESS
+	uint16_t networkaddress=0x0000;
+
+	//COORDINATOR
+	//address assignement variables
+	uint8_t depth=0;
+	uint8_t cskip=0;
+	
+	uint8_t cskip_routing=0;
+
+	//neighbour table parent index
+	uint8_t parent_index;
+
+	//NON COORDINATOR
+
+	//current pan characteristics
+	uint16_t panid;
+	uint8_t beaconorder;
+	uint8_t superframeorder;
+	
+	//next child router address
+	uint16_t next_child_router_address;
+	uint8_t number_child_router=0x01;
+	uint8_t number_child_end_devices=0x01;
+/*****************************************************/
+/****************Integer Variables********************/
+/*****************************************************/ 
+
+	uint8_t joined=0;
+	uint8_t sync_loss=0;
+	//uint8_t synchronizing=0;
+	uint8_t syncwait;
+	
+	
+	//USED AFTER DE SCAN //GIVE SOME TIME TO THE DEVICE TO SYNC WITH THE PARENT
+	uint8_t received_beacon_count=0;
+	
+	uint8_t go_associate =0;
+	
+	PANDescriptor pan_des;
+	uint32_t coordinator_addr[2];
+/******************************************************/
+/*********NEIGHBOuRTABLE  MANAGEMENT FUNCTIONS*********/
+/******************************************************/ 
+
+	void init_nwkIB();
+	
+	uint8_t check_neighbortableentry(uint8_t addrmode,uint32_t Extended_Address0,uint32_t Extended_Address1);
+	
+	void add_neighbortableentry	(uint16_t PAN_Id,uint32_t Extended_Address0,uint32_t Extended_Address1,uint32_t Network_Address,uint8_t Device_Type,uint8_t Relationship);
+	void update_neighbortableentry (uint16_t PAN_Id,uint32_t Extended_Address0,uint32_t Extended_Address1,uint32_t Network_Address,uint8_t Device_Type,uint8_t Relationship);	
+	
+	uint8_t find_suitable_parent();
+	
+	uint16_t Cskip(uint8_t d);
+	
+	uint16_t nexthopaddress(uint16_t destinationaddress,uint8_t d);
+	
+	void list_neighbourtable();
+
+
+
+ command error_t Init.init() {
+  	
+	printfUART_init();//make the possibility to print
+		
+	init_nwkIB();
+	
+	nwk_IB.nwkSequenceNumber=call Random.rand16();
+  
+	return SUCCESS;
+ }
+
+
+ 
+/*****************************************************************************************************/  
+/**************************************MLME-SCAN*******************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_SCAN.confirm(uint8_t status,uint8_t ScanType, uint32_t UnscannedChannels, uint8_t ResultListSize, uint8_t EnergyDetectList[], SCAN_PANDescriptor PANDescriptorList[])
+{
+//FAULT-TOLERANCE
+
+//the device channel scan ends with a scan confirm containing a list of the PANs (beacons received during the scan) 
+
+	int i;
+	uint8_t max_lqi=0;
+	uint8_t best_pan_index=0;
+	
+	
+	networkdescriptor networkdescriptorlist[1];
+	
+	
+	//call Leds.redOff();
+	
+	printfUART("4 rec scan\n", "");
+	
+	//printfUART("MLME_SCAN.confirm %i\n", ScanType);
+	
+	if (ScanType == ORPHAN_SCAN)
+	{
+		printfUART("new scan \n", "");
+	
+		call MLME_SCAN.request(PASSIVE_SCAN,0xFFFFFFFF,7);
+		return SUCCESS;
+	}
+	
+	
+	
+	if(ScanType == ED_SCAN)
+	{
+		for(i=0;i<ResultListSize;i++)
+		{
+			printfUART("ED SCAN %i %i\n", (0x0A + i),EnergyDetectList[i]);
+		}
+		return SUCCESS;
+	}
+	
+	for (i=0; i<ResultListSize;i++)
+	{		/*
+			printfUART("cord id %i", PANDescriptorList[i].CoordPANId);
+			printfUART("CoordAddress %i", PANDescriptorList[i].CoordAddress);
+			printfUART("LogicalChannel %i", PANDescriptorList[i].LogicalChannel);
+			printfUART("SuperframeSpec %i", PANDescriptorList[i].SuperframeSpec);
+			printfUART("lqi %i\n", PANDescriptorList[i].lqi);
+			*/
+		if(max_lqi < PANDescriptorList[i].lqi)
+		{
+			max_lqi =PANDescriptorList[i].lqi;
+			best_pan_index = i;
+		}
+	}
+	
+	printfUART("SELECTED cord id %i", PANDescriptorList[best_pan_index].CoordPANId);
+	printfUART("CoordAddress %i", PANDescriptorList[best_pan_index].CoordAddress);
+	printfUART("LogicalChannel %i", PANDescriptorList[best_pan_index].LogicalChannel);
+	printfUART("SuperframeSpec %i", PANDescriptorList[best_pan_index].SuperframeSpec);
+	printfUART("lqi %i\n", PANDescriptorList[best_pan_index].lqi);
+	
+	
+	
+	/*
+	
+	coordinator_addr[0] = 0x00000001;
+	
+	coordinator_addr[1] = (uint32_t)PANDescriptorList[best_pan_index].CoordAddress;
+	
+	//pan_des = PANDescriptorList[best_pan_index];
+
+	
+	//BUILD the PAN descriptor of the COORDINATOR
+	//assuming that the adress is short
+	pan_des.CoordAddrMode = SHORT_ADDRESS;
+	pan_des.CoordPANId = PANDescriptorList[best_pan_index].CoordAddress;
+	pan_des.CoordAddress0=0x00000000;
+	pan_des.CoordAddress1=0x00000000;
+	pan_des.LogicalChannel=PANDescriptorList[best_pan_index].LogicalChannel;
+	//superframe specification field
+	pan_des.SuperframeSpec = PANDescriptorList[best_pan_index].SuperframeSpec;
+	
+	pan_des.GTSPermit=0x01;
+	pan_des.LinkQuality=0x00;
+	pan_des.TimeStamp=0x000000;
+	pan_des.SecurityUse=0;
+	pan_des.ACLEntry=0x00;
+	pan_des.SecurityFailure=0x00;
+	
+	*/
+
+	
+	
+	printfUART("5 en sync %x \n", PANDescriptorList[best_pan_index].LogicalChannel);
+	// the sync enables the TimerAsync events, in order to enable the synchronization with the PAN coordinator
+	call MLME_SYNC.request(PANDescriptorList[best_pan_index].LogicalChannel,0);
+	
+	
+	
+	//The networkdescriptorlist must contain information about every network that was heard
+	
+	//make NetworkDescriptorList out of the PanDescriptorList
+
+
+    printfUART("6 add neigh\n", "");
+
+	networkdescriptorlist[0].PANId=PANDescriptorList[best_pan_index].CoordPANId;
+	networkdescriptorlist[0].LogicalChannel=LOGICAL_CHANNEL;
+	networkdescriptorlist[0].StackProfile=0x00;
+	networkdescriptorlist[0].ZigBeeVersion=0x01;
+	networkdescriptorlist[0].BeaconOrder=7;
+	networkdescriptorlist[0].SuperframeOrder=6;
+	networkdescriptorlist[0].PermitJoining=1;
+
+	add_neighbortableentry(networkdescriptorlist[0].PANId,0x00000000,0x00000000,PANDescriptorList[best_pan_index].CoordAddress,COORDINATOR,NEIGHBOR_IS_PARENT);
+	
+	signal NLME_NETWORK_DISCOVERY.confirm(1,networkdescriptorlist, NWK_SUCCESS);
+	
+	
+	
+	return SUCCESS;
+}
+
+/*****************************************************************************************************/  
+/**************************************MLME-ORPHAN****************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_ORPHAN.indication(uint32_t OrphanAddress[1], uint8_t SecurityUse, uint8_t ACLEntry)
+{
+
+	
+		
+		return 0x0000;
+	}
+
+/*****************************************************************************************************/  
+/**************************************MLME-RESET*****************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_RESET.confirm(uint8_t status)
+{
+
+  signal NLME_RESET.confirm(status);
+
+  return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-SYNC-LOSS*************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_SYNC_LOSS.indication(uint8_t LossReason)
+{
+	////printfUART("MLME_SYNC_LOSS.indication\n", ""); 
+	sync_loss = 1;
+	syncwait=1;
+	//signal NLME_SYNC.indication();
+/*
+
+printfUART("SL\n","");
+		
+		call MLME_SCAN.request(ORPHAN_SCAN,0xFFFFFFFF,7);
+*/
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-GTS*******************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_GTS.confirm(uint8_t GTSCharacteristics, uint8_t status)
+{
+
+
+
+	return SUCCESS;
+}
+
+event error_t MLME_GTS.indication(uint16_t DevAddress, uint8_t GTSCharacteristics, bool SecurityUse, uint8_t ACLEntry)
+{
+
+
+
+	return SUCCESS;
+}
+
+/*****************************************************************************************************/  
+/**************************************MLME-BEACON NOTIFY*********************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_BEACON_NOTIFY.indication(uint8_t BSN,PANDescriptor pan_descriptor, uint8_t PenAddrSpec, uint8_t AddrList, uint8_t sduLength, uint8_t sdu[])
+{
+	
+	uint32_t destinaddress[2];
+	printfUART("BN\n", "");
+
+	
+	if (go_associate==1)
+	{
+		received_beacon_count++;
+		
+		printfUART("bn %i\n", received_beacon_count);
+		
+		if (received_beacon_count==5)
+		{
+				printfUART("sa \n", "");
+				
+				go_associate=0;
+				//call MLME_ASSOCIATE.request(pan_des.LogicalChannel,SHORT_ADDRESS,pan_des.CoordPANId,coordinator_addr,0x00,0x00);
+		
+		destinaddress[0]=0x00000000;
+		destinaddress[1]=0x00000000;
+		
+		
+		call MLME_ASSOCIATE.request(LOGICAL_CHANNEL,SHORT_ADDRESS,0x1234,destinaddress, set_capability_information(0x00,0x00,0x00,0x00,0x00,0x01),0);
+		
+		}
+		
+	}
+
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-START*****************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_START.confirm(uint8_t status)
+{
+		////printfUART("MLME_START.confirm\n", "");
+	if (device_type==COORDINATOR)
+	{
+		signal NLME_NETWORK_FORMATION.confirm(status);
+		joined=1;
+	}
+	else
+	{
+		signal NLME_START_ROUTER.confirm(status);
+	}
+
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**********************				  MLME-SET		  	    ******************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_SET.confirm(uint8_t status,uint8_t PIBAttribute)
+{
+	
+	
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/*************************			MLME-GET			    ******************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_GET.confirm(uint8_t status,uint8_t PIBAttribute, uint8_t PIBAttributeValue[])
+{
+	
+	
+	return SUCCESS;
+}
+	
+/*****************************************************************************************************/  
+/**************************************MLME-ASSOCIATE*************************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_ASSOCIATE.indication(uint32_t DeviceAddress[], uint8_t CapabilityInformation, bool SecurityUse, uint8_t ACLEntry)
+{
+	
+	//notification that an other device wants to associate
+	//THIS DEVICE IS EITHER A COORDINATOR OR A ROUTER
+		
+	uint8_t cindex=0;
+
+atomic{
+
+	//check the neighbour table
+	cindex = check_neighbortableentry(LONG_ADDRESS,DeviceAddress[0] , DeviceAddress[1]);
+	
+
+	if( cindex > 0 )
+	{
+		call MLME_ASSOCIATE.response(DeviceAddress,neighbortable[cindex - 1].Network_Address,MAC_SUCCESS,0);
+	}
+	else
+	{	
+			if(nwk_IB.nwkAvailableAddresses > 0)
+			{
+			
+				//verify if the device is associating as a router or an end device
+				if ( get_alternate_PAN_coordinator(CapabilityInformation) == 1)
+				{
+					//add device to the neighbour table
+					add_neighbortableentry(panid,DeviceAddress[0],DeviceAddress[1],next_child_router_address,ROUTER,NEIGHBOR_IS_CHILD);
+					
+					printfUART("An_cr %x\n",next_child_router_address);
+
+					//send response, this shall lead to confirm in child device
+					call MLME_ASSOCIATE.response(DeviceAddress,next_child_router_address,MAC_SUCCESS,0);
+					//calculate the next address
+					next_child_router_address = networkaddress + ((number_child_router-1) * cskip) +1 ;
+					//increment the number of associated routers
+					number_child_router++;
+					//decrese the number of available addresses //the available addresses are influenced by the network configurations
+					nwk_IB.nwkAvailableAddresses--;
+					
+					printfUART("Dn_cr %x\n",next_child_router_address);
+				}
+				else
+				{
+					//verify if its possible to associate children in the address space
+					//the number of end devices must be greater than 1 and lesser or iqual to maximum children minus maximum routers
+					if (number_child_end_devices > 1 && number_child_end_devices > (MAXCHILDREN - MAXROUTERS))
+					{
+						call MLME_ASSOCIATE.response(DeviceAddress,0xffff,CMD_RESP_PAN_CAPACITY,0);
+						//return SUCCESS;
+					}
+					else
+					{
+						//CHECK COMMENTED ON SHORT VERSION
+						add_neighbortableentry(panid,DeviceAddress[0],DeviceAddress[1],nwk_IB.nwkNextAddress,END_DEVICE,NEIGHBOR_IS_CHILD);
+						//send response, this shall lead to confirm in child device
+						call MLME_ASSOCIATE.response(DeviceAddress,nwk_IB.nwkNextAddress,MAC_SUCCESS,0);
+						
+						nwk_IB.nwkNextAddress=nwk_IB.nwkNextAddress + nwk_IB.nwkAddressIncrement;
+						
+						number_child_end_devices++;
+						
+						nwk_IB.nwkAvailableAddresses--;
+						
+					}
+				}
+				
+				if (nwk_IB.nwkAvailableAddresses == 0 )
+				{
+					call MLME_SET.request(MACASSOCIATIONPERMIT,(uint8_t *)0x00000000);
+				}
+			}
+			else
+			{
+				//if there are no available addresses the coordinator/router shall not respond to the association request
+				call MLME_ASSOCIATE.response(DeviceAddress,0xffff,CMD_RESP_PAN_CAPACITY,0);
+			}
+	}
+}
+	return SUCCESS;
+}
+
+event error_t MLME_ASSOCIATE.confirm(uint16_t AssocShortAddress, uint8_t status)
+{
+
+	uint8_t v_temp[2];
+	////printfUART("MLME_ASSOCIATE.confirm\n","");
+
+	if (AssocShortAddress == 0xffff)
+	{
+		//association failed
+		//printfUART("nwkass fail\n","");
+		signal NLME_JOIN.confirm(panid,NWK_NOT_PERMITTED);
+	
+	}
+	else
+	{
+	
+		networkaddress = AssocShortAddress;
+		//add_neighbortableentry(panid,DeviceAddress[0],DeviceAddress[1],nwk_IB.nwkNextAddress,END_DEVICE,NEIGHBOR_IS_CHILD);
+		//set the short address
+		
+		if (status == MAC_SUCCESS)
+		{
+			joined = 0x01;
+			v_temp[0] = (uint8_t)(networkaddress >> 8);
+			v_temp[1] = (uint8_t)(networkaddress );
+
+			//call MLME_SET.request(MACSHORTADDRESS,(uint32_t*)(uint32_t)&networkaddress);
+			call MLME_SET.request(MACSHORTADDRESS,v_temp);
+			
+			signal NLME_JOIN.confirm(panid, NWK_SUCCESS);
+		}
+		else
+		{
+			signal NLME_JOIN.confirm(panid,NWK_NOT_PERMITTED);
+		}
+	}
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/**************************************MLME-DISASSOCIATE**********************************************/
+/*****************************************************************************************************/ 
+event error_t MLME_DISASSOCIATE.indication(uint32_t DeviceAddress[], uint8_t DisassociateReason, bool SecurityUse, uint8_t ACLEntry)
+{
+	////printfUART("MLME_DISASSOCIATE.indication:SUCCESS\n", "");
+	signal NLME_LEAVE.confirm(DeviceAddress, NWK_SUCCESS);
+
+	return SUCCESS;
+}
+  
+event error_t MLME_DISASSOCIATE.confirm(uint8_t status)
+{
+	if (status == MAC_SUCCESS)
+	{
+		signal NLME_LEAVE.confirm(0, status);
+		////printfUART("MLME_DISASSOCIATE.confirm:SUCCESS\n", "");
+	}
+	else
+	{
+		signal NLME_LEAVE.confirm(0, NWK_LEAVE_UNCONFIRMED);
+		////printfUART("MLME_DISASSOCIATE.confirm:leave unconfirmed\n", "");
+	}
+
+	return SUCCESS;
+}
+/*****************************************************************************************************/  
+/*****************************************************************************************************/  
+/****************					MCPS EVENTS 				 *************************************/
+/*****************************************************************************************************/ 
+/*****************************************************************************************************/  
+
+
+/*****************************************************************************************************/  
+/*********************					MCPS-DATA 		  	   ***************************************/
+/*****************************************************************************************************/ 
+event error_t MCPS_DATA.confirm(uint8_t msduHandle, uint8_t status)
+{
+	////printfUART("MCPS_DATA.confirm\n", "");
+	signal NLDE_DATA.confirm(1,status);
+	
+	return SUCCESS;
+}  
+event error_t MCPS_DATA.indication(uint16_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[2], uint16_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[2], uint16_t msduLength,uint8_t msdu[100],uint16_t mpduLinkQuality, uint16_t SecurityUse, uint16_t ACLEntry)
+{
+	uint8_t payload[100];
+	uint32_t route_destination_address[2];
+	uint32_t net_addr[2];
+	uint8_t next_hop_index;
+	
+	routing_fields *routing_fields_ptr;
+	routing_fields_ptr = (routing_fields *)&msdu[0];
+	
+	net_addr[1] =(uint32_t) networkaddress;
+	net_addr[0]=0x00000000;
+
+	if ( routing_fields_ptr->destination_address == networkaddress)
+	{
+		//I am the destination
+		memcpy(&payload,&msdu[8],(msduLength-8)*sizeof(uint8_t));
+		
+		//pass data on to APL layer
+		signal NLDE_DATA.indication(routing_fields_ptr->source_address,(uint16_t)(msduLength-8),payload, mpduLinkQuality);
+		
+		return SUCCESS;	
+	}
+	else
+	{
+		//I am not the destination
+		if(device_type != COORDINATOR)
+		{
+			if( (networkaddress < routing_fields_ptr->destination_address) && (routing_fields_ptr->destination_address < (networkaddress + cskip_routing ) ) )
+			{
+				printfUART("route down to appropriate child\n", "");
+				
+				//check if destination is one of my children
+				next_hop_index = check_neighbortableentry(SHORT_ADDRESS,(uint32_t)routing_fields_ptr->destination_address,0x00000000);
+
+				if (next_hop_index == 0)
+				{
+					//destination is not my child
+					route_destination_address[0]=0x00000000;
+					route_destination_address[1]=nexthopaddress(routing_fields_ptr->destination_address,depth);
+				}
+				else
+				{
+					//Im routing to my child
+					route_destination_address[0]=0x00000000;
+					route_destination_address[1]=neighbortable[next_hop_index-1].Network_Address;
+				}
+				//send message
+				call MCPS_DATA.request(SHORT_ADDRESS, panid, net_addr, SHORT_ADDRESS, DestPANId, route_destination_address, msduLength, msdu,1,set_txoptions(1,0,0,0));
+			}
+			else
+			{
+				
+				//changes to meet with the BEACON SYNCHRONIZATION requirements
+				//route up to the parent
+				atomic{
+					route_destination_address[0]=0x00000000;
+					route_destination_address[1]=neighbortable[parent].Network_Address;
+
+					call MCPS_DATA.request(SHORT_ADDRESS, panid, net_addr, SHORT_ADDRESS, DestPANId, route_destination_address, msduLength, msdu,1,set_txoptions_upstream(1,0,0,0,1));
+				}
+			}
+		}
+		else
+		{
+			//I AM THE PAN COORDINATOR
+			//THE COORDINATOR ALWAYS ROUTES DOWN
+			
+			//route down to appropriate child
+			//check if destination is one of my children
+			next_hop_index = check_neighbortableentry(SHORT_ADDRESS,(uint32_t)routing_fields_ptr->destination_address,0x00000000);
+			
+			if (next_hop_index == 0 )
+			{
+				//no entry in neigbortable
+				//calculate route address
+				route_destination_address[0]=0x00000000;
+				route_destination_address[1]=nexthopaddress(routing_fields_ptr->destination_address,depth);
+					
+				call MCPS_DATA.request(SHORT_ADDRESS, panid, net_addr, SHORT_ADDRESS, DestPANId, route_destination_address, msduLength, msdu,1,set_txoptions(1,0,0,0));
+			}
+			else
+			{
+				//is my child
+				route_destination_address[0]=0x00000000;
+				route_destination_address[1]=neighbortable[next_hop_index-1].Network_Address;
+
+				call MCPS_DATA.request(SHORT_ADDRESS, panid, net_addr, SHORT_ADDRESS, DestPANId, route_destination_address, msduLength, msdu,1,set_txoptions(1,0,0,0));
+			}
+			
+		}
+		
+		
+	}
+	
+return SUCCESS;
+}
+
+
+/*************************************************************/
+/*******************NLDE IMPLEMENTATION***********************/
+/*************************************************************/
+	
+/*************************************************************/
+/*************************NLDE - DATA*************************/
+/*************************************************************/
+
+//This primitive requests the transfer of a data PDU
+//page 159-161
+
+command error_t NLDE_DATA.request(uint16_t DstAddr, uint16_t NsduLength, uint8_t Nsdu[100], uint8_t NsduHandle, uint8_t Radius, uint8_t DiscoverRoute, uint8_t SecurityEnable)
+{	
+
+	uint32_t srcadd[2];
+	//prefixed size because the devices reset itself when there is an error in the length
+	uint8_t MSDU[100];
+	uint32_t route_destination_address[2];
+	routing_fields *routing_fields_ptr;
+	uint8_t next_hop_index;
+	
+	routing_fields_ptr = (routing_fields *)&MSDU[0];
+	
+	if(joined==0)
+	{	
+		signal NLDE_DATA.confirm(NsduHandle, NWK_INVALID_REQUEST);
+	}
+	else
+	{
+		routing_fields_ptr->frame_control= set_route_frame_control(0x00,0x01,DiscoverRoute,SecurityEnable);
+		routing_fields_ptr->destination_address=DstAddr;
+		routing_fields_ptr->source_address=networkaddress;
+		routing_fields_ptr->radius=Radius;
+		routing_fields_ptr->sequence_number=nwk_IB.nwkSequenceNumber;
+		nwk_IB.nwkSequenceNumber++;
+		
+		memcpy(&MSDU[8],&Nsdu[0],NsduLength*sizeof(uint8_t));
+
+		srcadd[0] = 0x00000000;
+		srcadd[1] = (uint32_t)networkaddress;
+		
+		if (device_type == END_DEVICE)
+		{
+			//if the device is an end device always sends the message to the parent
+
+			route_destination_address[0]=0x00000000;
+			route_destination_address[1]=neighbortable[parent].Network_Address;
+																																						//ack
+			call MCPS_DATA.request(SHORT_ADDRESS, panid, srcadd, SHORT_ADDRESS,panid, route_destination_address, (NsduLength + 8), MSDU,1,set_txoptions(1,0,0,0));
+			return SUCCESS;
+		}
+		
+		//send message if the device is the COORDINATOR or a ROUTER
+		if( (networkaddress < routing_fields_ptr->destination_address) && (routing_fields_ptr->destination_address < (networkaddress + cskip_routing ) ) )
+		{
+			//route down to appropriate child
+			//check if destination is one of my children
+			next_hop_index = check_neighbortableentry(SHORT_ADDRESS,(uint32_t)routing_fields_ptr->destination_address,0x00000000);
+
+			if (next_hop_index == 0)
+			{
+				//destination is not my child
+				route_destination_address[0]=0x00000000;
+				route_destination_address[1]=nexthopaddress(routing_fields_ptr->destination_address,depth);
+			}
+			else
+			{
+				//Im routing to my child
+				route_destination_address[0]=0x00000000;
+				route_destination_address[1]=neighbortable[next_hop_index-1].Network_Address;
+			}
+			//send the data																																	//ack
+			call MCPS_DATA.request(SHORT_ADDRESS, panid, srcadd, SHORT_ADDRESS, panid, route_destination_address, (NsduLength + 8), MSDU,1,set_txoptions(1,0,0,0));
+		}
+		else
+		{
+			//route up to parent
+			atomic{
+				route_destination_address[0]=0x00000000;
+				route_destination_address[1]=neighbortable[parent].Network_Address;
+																																					//ack
+				call MCPS_DATA.request(SHORT_ADDRESS, panid, srcadd, SHORT_ADDRESS, panid, route_destination_address, (NsduLength + 8), MSDU,1,set_txoptions_upstream(1,0,0,0,1));
+			}
+		}
+		
+	}
+	
+	return SUCCESS;
+}
+
+/*************************************************************/
+/*******************NLME IMPLEMENTATION***********************/
+/*************************************************************/
+
+
+/*************************************************************
+******************* NLME-RESET********************************
+**************************************************************/
+ command error_t NLME_RESET.request(){
+
+  call MLME_RESET.request(TRUE);
+return SUCCESS;
+}
+/*************************************************************/
+/*******************NLME - START - ROUTER*********************/
+/*************************************************************/
+
+//This primitive allows the NHL of a ZigBee Router to initialize or change its superframe configuration.
+//p171 and 210
+command error_t NLME_START_ROUTER.request(uint8_t BeaconOrder, uint8_t SuperframeOrder, bool BatteryLifeExtension,uint32_t StartTime)
+{	
+	//printfUART("NLME_START_ROUTER.request\n", "");
+	
+	device_type = ROUTER;
+	
+	if(TYPE_DEVICE == ROUTER)
+	{
+	
+		//assign current BO and SO
+		beaconorder = BeaconOrder;
+		superframeorder = SuperframeOrder;
+	
+		call MLME_SET.request(MACBEACONORDER, (uint8_t *)&BeaconOrder);
+		
+		call MLME_SET.request(MACSUPERFRAMEORDER, (uint8_t *)&SuperframeOrder);
+		
+		//*******************************************************
+		//***********SET PAN VARIABLES***************************
+		depth=DEVICE_DEPTH;
+		
+		nwk_IB.nwkAvailableAddresses=AVAILABLEADDRESSES;
+		nwk_IB.nwkAddressIncrement= ADDRESSINCREMENT;
+		
+		nwk_IB.nwkMaxChildren=MAXCHILDREN;	//number of children a device is allowed to have on its current network
+		nwk_IB.nwkMaxDepth=MAXDEPTH;	//the depth a device can have
+		nwk_IB.nwkMaxRouters=MAXROUTERS;
+		
+		cskip = Cskip(depth);
+		
+		cskip_routing = Cskip(depth -1);
+		
+		nwk_IB.nwkNextAddress = networkaddress + (cskip * nwk_IB.nwkMaxRouters) + nwk_IB.nwkAddressIncrement;
+	
+		next_child_router_address = networkaddress +((number_child_router-1) * cskip) +1;
+	
+		
+		number_child_router++;
+		
+		
+		printfUART("cskip  %d\n", cskip);
+		printfUART("C %d D %d r %d\n", MAXCHILDREN,MAXDEPTH,MAXROUTERS);
+	
+		//  command error_t request(uint32_t PANId, uint8_t LogicalChannel, uint8_t BeaconOrder, uint8_t SuperframeOrder,bool PANCoordinator,bool BatteryLifeExtension,bool CoordRealignment,bool SecurityEnable);
+		call MLME_START.request(panid,LOGICAL_CHANNEL,BeaconOrder, SuperframeOrder, 0, 0,0,0,StartTime);
+		
+	}
+	else
+	{
+	
+		signal NLME_START_ROUTER.confirm(NWK_INVALID_REQUEST);
+		
+	}
+	return SUCCESS;
+}
+
+
+/*************************************************************/
+/******************NLME - NETWORK - FORMATION*****************/
+/*************************************************************/
+
+//This primitive allows the NHL to request to start a ZigBee network with itself as the coordinator
+//Page 167-169
+command error_t NLME_NETWORK_FORMATION.request(uint32_t ScanChannels, uint8_t ScanDuration, uint8_t BeaconOrder, uint8_t SuperframeOrder, uint16_t PANId, bool BatteryLifeExtension)
+{
+
+	uint8_t v_temp[6];
+
+call Leds.led0On();
+call Leds.led1On();
+call Leds.led2On();
+   
+	v_temp[0] = 0x06;
+	
+	device_type = COORDINATOR;
+	//device_type = ROUTER;
+	
+	call MLME_SET.request(MACMAXBEACONPAYLOADLENGTH,v_temp);
+	
+	//protocol ID
+	v_temp[0] = 0x00;
+	//uint8_t nwk_payload_profile_protocolversion(uint8_t stackprofile,uint8_t nwkcprotocolversion)
+	v_temp[1] = nwk_payload_profile_protocolversion(0x00,0x00);
+	//uint8_t nwk_payload_capacity(uint8_t routercapacity,uint8_t devicedepth,uint8_t enddevicecapacity)
+	v_temp[2] = nwk_payload_capacity(0x01,0x00,0x01);
+	
+	//TX OFFSET (3 bytes)
+	v_temp[3] = 0x56;
+	v_temp[4] = 0x34;
+	v_temp[5] = 0x12;
+	
+	
+	call MLME_SET.request(MACBEACONPAYLOAD,v_temp);
+	
+
+	printfUART("NLME_NETWORK_FORMATION.request\n", "");
+	//perform an energydetection scan
+	//perform an active scan
+	//and select a suitable channel
+	//panid must be less than or equal to 0x3fff
+	
+	//assign current panid
+	panid=PANId;
+	
+	//assign current BO and SO
+	beaconorder = BeaconOrder;
+	superframeorder = SuperframeOrder;
+	
+	call MLME_SET.request(MACBEACONORDER, (uint8_t *)&BeaconOrder);
+
+	call MLME_SET.request(MACSUPERFRAMEORDER, (uint8_t *)&SuperframeOrder);
+	
+	v_temp[0] = (uint8_t)(PANId >> 8);
+	v_temp[1] = (uint8_t)PANId;
+	
+	call MLME_SET.request(MACPANID, v_temp);
+
+	//static assignement of the coordinator address
+	networkaddress=0x0000;//Network address of the ZC of a network always 0x0000;
+	
+	//////printfUART("setting short addr: %i\n", networkaddress);
+	
+	v_temp[0] = (uint8_t)(networkaddress >> 8);
+	v_temp[1] = (uint8_t)(networkaddress);
+
+	
+	call MLME_SET.request(MACSHORTADDRESS,v_temp);
+	
+	
+	//*******************************************************
+	//***********SET PAN VARIABLES***************************
+	//nwk_IB.nwkNextAddress=networkaddress+0x0001;
+	depth=DEVICE_DEPTH;
+	nwk_IB.nwkAvailableAddresses=AVAILABLEADDRESSES;
+	nwk_IB.nwkAddressIncrement= ADDRESSINCREMENT;
+	
+	nwk_IB.nwkMaxChildren=MAXCHILDREN;	//number of children a device is allowed to have on its current network
+	nwk_IB.nwkMaxDepth=MAXDEPTH;	//the depth a device can have
+	nwk_IB.nwkMaxRouters=MAXROUTERS;
+	
+	cskip = Cskip(depth);
+	
+	cskip_routing = Cskip(depth -1 );
+	
+	nwk_IB.nwkNextAddress = networkaddress + (cskip * nwk_IB.nwkMaxRouters) + nwk_IB.nwkAddressIncrement;
+	
+	next_child_router_address = networkaddress +((number_child_router-1) * cskip) +1;
+	
+	number_child_router++;
+	
+	printfUART("cskip  %d\n", cskip);
+	printfUART("C %d D %d r %d\n", MAXCHILDREN,MAXDEPTH,MAXROUTERS);
+	
+	
+	call MLME_START.request(PANId, LOGICAL_CHANNEL,BeaconOrder ,SuperframeOrder,1,0,0,0,0);
+	
+
+
+
+    
+
+
+
+
+	return SUCCESS;
+}
+	
+/*************************************************************/
+/***************NLME - NETWORK - DISCOVERY *******************/
+/*************************************************************/
+
+//This primitive allows the next higher layer to request that the NWK layer discover networks currently operating within the POS.
+//p164 and 210
+command error_t NLME_NETWORK_DISCOVERY.request(uint32_t ScanChannels, uint8_t Scanduration)
+{
+	
+	//ISSUE an MLME_SCAN.request to find the available networks
+	//Temporary descover of the network
+	//Channel Scan is not working properly
+	//manually assign the network descriptor
+	
+	
+	networkdescriptor networkdescriptorlist[1];
+
+	printfUART("2 lauch passive scan\n", "");
+	//The networkdescriptorlist must contain information about every network that was heard
+	
+	//make NetworkDescriptorList out of the PanDescriptorList
+#ifndef TKN154_MAC
+    call MLME_SCAN.request(PASSIVE_SCAN,0xFFFFFFFF,7);
+#else
+
+
+	networkdescriptorlist[0].PANId=0x1234;
+	networkdescriptorlist[0].LogicalChannel=LOGICAL_CHANNEL;
+	networkdescriptorlist[0].StackProfile=0x00;
+	networkdescriptorlist[0].ZigBeeVersion=0x01;
+	networkdescriptorlist[0].BeaconOrder=7;
+	networkdescriptorlist[0].SuperframeOrder=6;
+	networkdescriptorlist[0].PermitJoining=1;
+	
+	//temporary assignement on the neighbout table of the suitable PAN coordinator
+	if (DEVICE_DEPTH == 0x01)
+		add_neighbortableentry(networkdescriptorlist[0].PANId,D1_PAN_EXT0,D1_PAN_EXT1,D1_PAN_SHORT,COORDINATOR,NEIGHBOR_IS_PARENT);
+	if (DEVICE_DEPTH == 0x02)
+		add_neighbortableentry(networkdescriptorlist[0].PANId,D2_PAN_EXT0,D2_PAN_EXT1,D2_PAN_SHORT,COORDINATOR,NEIGHBOR_IS_PARENT);
+	if (DEVICE_DEPTH == 0x03)
+		add_neighbortableentry(networkdescriptorlist[0].PANId,D3_PAN_EXT0,D3_PAN_EXT1,D3_PAN_SHORT,COORDINATOR,NEIGHBOR_IS_PARENT);
+	if (DEVICE_DEPTH == 0x04)
+		add_neighbortableentry(networkdescriptorlist[0].PANId,D4_PAN_EXT0,D4_PAN_EXT1,D4_PAN_SHORT,COORDINATOR,NEIGHBOR_IS_PARENT);
+#endif	
+		
+	signal NLME_NETWORK_DISCOVERY.confirm(1,networkdescriptorlist, NWK_SUCCESS);
+
+	return SUCCESS;
+}
+
+/*************************************************************/
+/************************NLME - JOIN**************************/
+/*************************************************************/
+//This primitive allows the NHL to request to join a network either through association.
+//p173 and 210
+command error_t NLME_JOIN.request(uint16_t PANId, bool JoinAsRouter, bool RejoinNetwork, uint32_t ScanChannels, uint8_t ScanDuration, uint8_t PowerSource, uint8_t RxOnWhenIdle, uint8_t MACSecurity)
+{	
+
+	//Assume we have selected a suitable parent and all previous conditions were true
+	uint32_t destinaddress[2];
+	
+	printfUART("9 find parent\n", "");
+	
+	//list_neighbourtable();
+	
+	parent_index = find_suitable_parent();
+	
+	panid = PANId;
+	
+	//printfUART("NLME_JOIN %i %i\n", parent_index,panid); 
+	
+	if(parent_index == 0)
+	{
+		signal NLME_JOIN.confirm(PANId,NWK_NOT_PERMITTED);
+	}
+	else
+	{
+		//assign the true value to parent index
+		parent_index = parent_index - 1;
+				
+		//destinaddress[0]=neighbortable[parent_index].Extended_Address0;
+		//destinaddress[1]=neighbortable[parent_index].Extended_Address1;
+		//verificar o endere�o do pan coordinator
+		destinaddress[0]=0x00000000;
+		
+		
+		destinaddress[1] = neighbortable[parent_index].Network_Address;
+#ifdef TKN154_MAC		
+		
+		if (DEVICE_DEPTH == 0x01)
+			destinaddress[1]=D1_PAN_SHORT;
+		if (DEVICE_DEPTH == 0x02)
+			destinaddress[1]=D2_PAN_SHORT;
+		if (DEVICE_DEPTH == 0x03)
+			destinaddress[1]=D3_PAN_SHORT;
+		if (DEVICE_DEPTH == 0x04)
+			destinaddress[1]=D4_PAN_SHORT;
+			
+#endif			
+		printfUART("10 associate to %i\n", destinaddress[1]);	
+		//set_capability_information(uint8_t alternate_PAN_coordinator, uint8_t device_type, uint8_t power_source, uint8_t receiver_on_when_idle, uint8_t security, uint8_t allocate_address)
+		
+		if (JoinAsRouter == 0x01)
+			call MLME_ASSOCIATE.request(LOGICAL_CHANNEL,SHORT_ADDRESS,PANId,destinaddress, set_capability_information(JoinAsRouter,0x01,PowerSource,RxOnWhenIdle,MACSecurity,0x01),0);
+		else
+		{
+		
+			printfUART("11 go ass\n", "");	
+		
+			coordinator_addr[0]=0x00000000;
+			coordinator_addr[1] = neighbortable[parent_index].Network_Address;
+			//BUILD the PAN descriptor of the COORDINATOR
+			//assuming that the adress is short
+			pan_des.CoordAddrMode = SHORT_ADDRESS;
+			pan_des.CoordPANId = panid;
+			pan_des.CoordAddress0=0x00000000;
+			pan_des.CoordAddress1=(uint32_t)neighbortable[parent_index].Network_Address;
+			pan_des.LogicalChannel=neighbortable[parent_index].Logical_Channel;
+			//superframe specification field
+			//pan_des.SuperframeSpec = neighbortable[parent_index].SuperframeSpec;
+
+			pan_des.GTSPermit=0x01;
+			pan_des.LinkQuality=0x00;
+			pan_des.TimeStamp=0x000000;
+			pan_des.SecurityUse=0;
+			pan_des.ACLEntry=0x00;
+			pan_des.SecurityFailure=0x00;
+	
+			received_beacon_count=0;
+			go_associate=1;
+#ifdef TKN154_MAC
+
+			
+			//call MLME_ASSOCIATE.request(LOGICAL_CHANNEL,SHORT_ADDRESS,PANId,destinaddress, set_capability_information(JoinAsRouter,0x00,PowerSource,RxOnWhenIdle,MACSecurity,0x01),0);
+#endif
+		}
+	}
+	
+	return SUCCESS;
+}
+
+
+/*************************************************************/
+/************************NLME - LEAVE*************************/
+/*************************************************************/
+
+//This primitive allows the NHL to request that it or another device leaves the network
+//page 181-183
+command error_t NLME_LEAVE.request(uint32_t DeviceAddress[],bool RemoveChildren, bool MACSecurityEnable)
+{ 	
+	uint32_t devaddr[2];
+	////printfUART("NLME_LEAVE.request\n", ""); 
+	if (DeviceAddress == 0)//child asked to leave
+	{	
+		if(RemoveChildren == 0)//implemented like it is always 0
+		{	
+			//send leave request command frame: RemoveChildren subfield=0 of the command option field of the command frame payload
+			//call MCPS_DATA.request(uint8_t SrcAddrMode, uint16_t SrcPANId, uint8_t SrcAddr[], uint8_t DstAddrMode, uint16_t DestPANId, uint8_t DstAddr[], uint8_t msduLength, uint8_t msdu[],uint8_t msduHandle, uint8_t TxOptions);
+			devaddr[0]=neighbortable[parent].Extended_Address0;
+			devaddr[1]=neighbortable[parent].Extended_Address1;
+			call MLME_DISASSOCIATE.request(devaddr,0x02,0);
+		}
+		else
+		{
+			//send leave request command frame: RemoveChildren subfield=1
+			//try to remove the children, call NLME_LEAVE.request(uint32_t DeviceAddress[]=address of child,bool RemoveChildren, bool MACSecurityEnable)
+			//call MCPS_DATA.request(uint8_t SrcAddrMode, uint16_t SrcPANId, uint8_t SrcAddr[], uint8_t DstAddrMode, uint16_t DestPANId, uint8_t DstAddr[], uint8_t msduLength, uint8_t msdu[],uint8_t msduHandle, uint8_t TxOptions);
+		}
+	}
+	else//parent forced a child to leave
+	{
+		//if(check_neighbortableentry(DeviceAddress[0], DeviceAddress[1]) == 0)
+		//{
+		//	signal NLME_LEAVE.confirm(DeviceAddress,NWK_UNKNOWN_DEVICE);
+		//	//call MCPS_DATA.request(uint8_t SrcAddrMode, uint16_t SrcPANId, uint8_t SrcAddr[], uint8_t DstAddrMode, uint16_t DestPANId, uint8_t DstAddr[], uint8_t msduLength, uint8_t msdu[],uint8_t msduHandle, uint8_t TxOptions);
+		//}
+		
+	}
+	
+	
+	return SUCCESS;
+}
+
+/*************************************************************/
+/************************NLME - SYNC**************************/
+/*************************************************************/
+
+//This primitive allows the NHL to synchronize or extract data from its ZigBee coordinator or router
+//page 186-187
+command error_t NLME_SYNC.request(bool Track)
+{
+//call MLME_SET.request(0x00,0x15);
+ // call MLME_SET.request(MACCOORDSHORTADDRESS, 0x0000);
+  //   call MLME_SET.request(0x50,0x1234);
+
+  call MLME_SYNC.request(LOGICAL_CHANNEL,1);
+	return SUCCESS;
+}
+  
+/*************************************************************/
+/*****************        NLME-SET     ********************/
+/*************************************************************/
+	
+command error_t NLME_SET.request(uint8_t NIBAttribute, uint16_t NIBAttributeLength, uint16_t NIBAttributeValue)
+{
+
+	atomic{
+	
+		switch(NIBAttribute)
+		{
+			case NWKSEQUENCENUMBER :		nwk_IB.nwkSequenceNumber = (uint8_t) NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkSequenceNumber: %x\n",nwk_IB.nwkSequenceNumber);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+											
+			case NWKPASSIVEACKTIMEOUT :		nwk_IB.nwkPassiveAckTimeout = (uint8_t) NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkPassiveAckTimeout: %x\n",nwk_IB.nwkPassiveAckTimeout);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+			
+			
+			case NWKMAXBROADCASTRETRIES :	nwk_IB.nwkMaxBroadcastRetries = (uint8_t) NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkMaxBroadcastRetries: %x\n",nwk_IB.nwkMaxBroadcastRetries);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+											
+			case NWKMAXCHILDREN :			nwk_IB.nwkMaxChildren = (uint8_t) NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkMaxChildren: %x\n",nwk_IB.nwkMaxChildren);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+											
+			case NWKMAXDEPTH :				nwk_IB.nwkMaxDepth = (uint8_t) NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkMaxDepth: %x\n",nwk_IB.nwkMaxDepth);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+	
+			case NWKMAXROUTERS :			nwk_IB.nwkMaxRouters = (uint8_t) NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkMaxRouters: %x\n",nwk_IB.nwkMaxRouters);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+	
+			case NWKMETWORKBROADCASTDELIVERYTIME :		nwk_IB.nwkNetworkBroadcastDeliveryTime = (uint8_t) NIBAttributeValue;
+														//////printfUART("nwk_IB.nwkNetworkBroadcastDeliveryTime: %x\n",nwk_IB.nwkNetworkBroadcastDeliveryTime);
+														signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+														break;
+			case NWKREPORTCONSTANTCOST :	nwk_IB.nwkReportConstantCost = (uint8_t) NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkReportConstantCost: %x\n",nwk_IB.nwkReportConstantCost);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+			case NWKROUTEDISCOVERYRETRIESPERMITED :		nwk_IB.nwkRouteDiscoveryRetriesPermitted = (uint8_t) NIBAttributeValue;
+														//////printfUART("nwk_IB.nwkRouteDiscoveryRetriesPermitted: %x\n",nwk_IB.nwkRouteDiscoveryRetriesPermitted);
+														signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+														break;
+	
+			case NWKSYMLINK :				nwk_IB.nwkSymLink = (uint8_t) NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkSymLink: %x\n",nwk_IB.nwkSymLink);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+			
+			case NWKCAPABILITYINFORMATION :	nwk_IB.nwkCapabilityInformation = (uint8_t) NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkCapabilityInformation: %x\n",nwk_IB.nwkCapabilityInformation);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+											
+			case NWKUSETREEADDRALLOC :		nwk_IB.nwkUseTreeAddrAlloc = (uint8_t) NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkUseTreeAddrAlloc: %x\n",nwk_IB.nwkUseTreeAddrAlloc);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+											
+			case NWKUSETREEROUTING :		nwk_IB.nwkUseTreeRouting = (uint8_t) NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkUseTreeRouting: %x\n",nwk_IB.nwkUseTreeRouting);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+											
+			case NWKNEXTADDRESS :			nwk_IB.nwkNextAddress = NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkNextAddress: %x\n",nwk_IB.nwkNextAddress);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+											
+			case NWKAVAILABLEADDRESSES :	nwk_IB.nwkAvailableAddresses = NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkAvailableAddresses: %x\n",nwk_IB.nwkAvailableAddresses);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+											
+			case NWKADDRESSINCREMENT :		nwk_IB.nwkAddressIncrement =NIBAttributeValue;
+											//////printfUART("nwk_IB.nwkAddressIncrement: %x\n",nwk_IB.nwkAddressIncrement);
+											signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+											break;
+											
+			case NWKTRANSACTIONPERSISTENCETIME :	nwk_IB.nwkTransactionPersistenceTime = (uint8_t) NIBAttributeValue;
+													//////printfUART("nwk_IB.nwkTransactionPersistenceTime: %x\n",nwk_IB.nwkTransactionPersistenceTime);
+													signal NLME_SET.confirm(NWK_SUCCESS,NIBAttribute);
+													break;
+											
+			default:						signal NLME_SET.confirm(NWK_UNSUPPORTED_ATTRIBUTE,NIBAttribute);
+											break;
+			
+		}
+		
+	}
+
+
+	return SUCCESS;
+}
+
+/*************************************************************/
+/*****************        NLME-GET     ********************/
+/*************************************************************/
+	
+command error_t NLME_GET.request(uint8_t NIBAttribute)
+{
+	switch(NIBAttribute)
+	{
+		case NWKSEQUENCENUMBER :		signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkSequenceNumber);
+										break;
+									
+		case NWKPASSIVEACKTIMEOUT :		signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkPassiveAckTimeout);
+										break;
+		
+		case NWKMAXBROADCASTRETRIES :	signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkMaxBroadcastRetries);
+										break;
+
+		case NWKMAXCHILDREN :			signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkMaxChildren);
+										break;
+
+		case NWKMAXDEPTH :				signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkMaxDepth);
+										break;
+
+		case NWKMAXROUTERS :			signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkMaxRouters);
+										break;
+
+		case NWKMETWORKBROADCASTDELIVERYTIME :		signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkNetworkBroadcastDeliveryTime);
+													break;
+
+		case NWKREPORTCONSTANTCOST :	signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkReportConstantCost);
+										break;
+
+		case NWKROUTEDISCOVERYRETRIESPERMITED :		signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkRouteDiscoveryRetriesPermitted);
+													break;
+
+		case NWKSYMLINK :				signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkSymLink);
+										break;
+		
+		case NWKCAPABILITYINFORMATION :	signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkCapabilityInformation);
+										break;
+										
+		case NWKUSETREEADDRALLOC :		signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkUseTreeAddrAlloc);
+										break;
+										
+		case NWKUSETREEROUTING :		signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkUseTreeRouting);
+										break;
+										
+		case NWKNEXTADDRESS :			signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0002,(uint16_t)&nwk_IB.nwkNextAddress);
+										break;
+
+		case NWKAVAILABLEADDRESSES :	signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0002,(uint16_t)&nwk_IB.nwkAvailableAddresses);
+										break;
+										
+		case NWKADDRESSINCREMENT :		signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0002,(uint16_t)&nwk_IB.nwkAddressIncrement);
+										break;
+										
+		case NWKTRANSACTIONPERSISTENCETIME :	signal NLME_GET.confirm(NWK_SUCCESS,NIBAttribute,0x0001,(uint16_t)&nwk_IB.nwkTransactionPersistenceTime);
+												break;
+
+		default:						signal NLME_GET.confirm(NWK_UNSUPPORTED_ATTRIBUTE,NIBAttribute,0x0000,0x00);
+										break;
+	}
+	
+	return SUCCESS;
+}
+
+
+/*************************************************************/
+/**************neighbor table management functions************/
+/*************************************************************/
+
+//check if a specific neighbourtable Entry is present
+//Return 0:Entry is not present
+//Return i:Entry is present and return the index of the entry + 1
+	uint8_t check_neighbortableentry(uint8_t addrmode,uint32_t Address0,uint32_t Address1)
+	{	
+		
+		int i=0;
+		
+		
+		//printfUART("neighbourtable check c %i\n", neighbour_count);
+	
+		if (neighbour_count == 0)
+		{
+			//printfUART("no neib\n", "");
+			return 0;
+		}
+		
+		if(addrmode == SHORT_ADDRESS)
+		{	
+			for(i=0; i < neighbour_count; i++)
+			{	
+				///printfUART("compare %i %i\n", neighbortable[i].Network_Address, test);
+				
+				if(neighbortable[i].Network_Address == (uint16_t) Address0)
+				{
+					//printfUART("already present \n", "" );
+					return i+1;
+				}
+			}
+			return 0;
+		}
+		else
+		{
+			for(i=0; i<neighbour_count; i++)
+			{	
+				////printfUART("compare %x %x\n", neighbortable[i].Extended_Address0, Address0);
+				if( (neighbortable[i].Extended_Address0 == Address0) && (neighbortable[i].Extended_Address1 == Address1))
+				{
+					//printfUART("already present \n", "" );
+					return i+1;
+				}
+			}
+			return 0;
+		}
+		
+		return 0;
+	}
+	
+	//function user to find a parent in the neighbour table
+	//Return 0:no parent is present
+	//Return i:parent is present and return the index of the entry + 1
+	uint8_t find_suitable_parent()
+	{
+		int i =0;
+		for (i=0; i<neighbour_count; i++)
+		{
+			if(neighbortable[i].Relationship == NEIGHBOR_IS_PARENT)
+			{
+				return i+1;
+			}
+		}
+		return 0;
+	}
+
+
+	//add a neighbortable entry	
+	void add_neighbortableentry	(uint16_t PAN_Id,uint32_t Extended_Address0,uint32_t Extended_Address1,uint32_t Network_Address,uint8_t Device_Type,uint8_t Relationship)
+	{
+	
+	atomic{
+		neighbortable[neighbour_count].PAN_Id=PAN_Id;
+		neighbortable[neighbour_count].Extended_Address0=Extended_Address0;
+		neighbortable[neighbour_count].Extended_Address1=Extended_Address1;
+		neighbortable[neighbour_count].Network_Address=Network_Address;
+		neighbortable[neighbour_count].Device_Type=Device_Type;
+		neighbortable[neighbour_count].Relationship=Relationship;
+		
+		neighbour_count++;
+		}
+		
+	}
+
+
+	
+	//update a neighbourtable entry
+	void update_neighbortableentry(uint16_t PAN_Id,uint32_t Extended_Address0,uint32_t Extended_Address1,uint32_t Network_Address,uint8_t Device_Type,uint8_t Relationship)
+	{
+		//search entry with correct extended address
+		uint8_t nrofEntry=0;
+		nrofEntry = check_neighbortableentry(0x01,Extended_Address0,Extended_Address1) - 1;
+		
+		//update every attribute
+		neighbortable[nrofEntry].PAN_Id=PAN_Id;
+		neighbortable[nrofEntry].Extended_Address0=Extended_Address0;
+		neighbortable[nrofEntry].Extended_Address1=Extended_Address1;
+		neighbortable[nrofEntry].Network_Address=Network_Address;
+		neighbortable[nrofEntry].Device_Type=Device_Type;
+		neighbortable[nrofEntry].Relationship=Relationship;
+		
+		////printfUART("updated neighbourtable entry\n", "");
+	}
+
+
+	void list_neighbourtable()
+	{
+		int i;
+		////printfUART("N List Count: %u\n", neighbour_count);
+	
+		for(i=0;i<neighbour_count;i++)
+		{
+			printfUART("Panid %x", neighbortable[i].PAN_Id);
+			printfUART("Extaddr0 %x", neighbortable[i].Extended_Address0);
+			printfUART("Extaddr1 %x", neighbortable[i].Extended_Address1);
+			printfUART("nwkaddr %u", neighbortable[i].Network_Address);
+			printfUART("devtype %u", neighbortable[i].Device_Type);
+			printfUART("relation %u", neighbortable[i].Relationship);
+			printfUART("depth %u\n", neighbortable[i].Depth);		
+		}
+	}
+/*************************************************************/
+/*****************Address Assignment functions****************/
+/*************************************************************/
+
+//calculate the size of the address sub-block for a router at depth d
+uint16_t Cskip(uint8_t d)
+{	
+	uint8_t skip;
+	uint8_t power;
+	uint8_t x=1;
+	uint8_t Cm = nwk_IB.nwkMaxChildren;
+	uint8_t Rm = nwk_IB.nwkMaxRouters;
+	uint8_t Lm = nwk_IB.nwkMaxDepth;
+	/*////printfUART("nwk_IB.nwkMaxChildren: %i\n",  nwk_IB.nwkMaxChildren);
+	////printfUART("nwk_IB.nwkMaxRouters: %i\n", nwk_IB.nwkMaxRouters);
+	////printfUART("nwk_IB.nwkMaxDepth: %i\n", nwk_IB.nwkMaxDepth);*/
+	if (Rm == 1)
+	{
+		skip = 1 + Cm * (Lm - d - 1);
+	}
+	else
+	{	
+		int i;
+		
+		power=(Lm - d - 1);
+		for(i=0;i<power;i++)
+		{
+			x=x*Rm;
+		}
+		skip = (1 + Cm - Rm - (Cm * x))/(1-Rm);
+	}
+	////printfUART("Cksip function calculated: %i\n", skip);
+	return skip;
+}
+
+//Calculate the nexthopaddress of the appropriate child if route down is required
+uint16_t nexthopaddress(uint16_t destinationaddress,uint8_t d)
+{
+	uint16_t next_hop;
+
+	next_hop=(networkaddress + 1 + ((destinationaddress-(networkaddress+1))/cskip)* cskip);
+	
+	////printfUART("Nexthop address calculated: %i\n", next_hop);
+	return next_hop;
+}
+
+/*************************************************************/
+/*****************Initialization functions********************/
+/*************************************************************/
+	//initialization of the nwk IB
+	void init_nwkIB()
+	{	
+		//nwk IB default values p 204-206
+		nwk_IB.nwkPassiveAckTimeout=0x03;
+		nwk_IB.nwkMaxBroadcastRetries=0x03;
+		nwk_IB.nwkMaxChildren=0x07;	//number of children a device is allowed to have on its current network
+		nwk_IB.nwkMaxDepth=0x05;	//the depth a device can have
+		nwk_IB.nwkMaxRouters=0x02;	//number of routers anyone device is allowed to have on its current network
+		//neighbortableentry nwkNeighborTable[];//null set
+		nwk_IB.nwkNetworkBroadcastDeliveryTime=( nwk_IB.nwkPassiveAckTimeout * nwk_IB.nwkMaxBroadcastRetries );
+		nwk_IB.nwkReportConstantCost=0x00;
+		nwk_IB.nwkRouteDiscoveryRetriesPermitted=nwkcDiscoveryRetryLimit;
+	//set? nwkRouteTable;//Null set
+		nwk_IB.nwkSymLink=0;
+		nwk_IB.nwkCapabilityInformation=0x00;
+		nwk_IB.nwkUseTreeAddrAlloc=1;
+		nwk_IB.nwkUseTreeRouting=1;
+		nwk_IB.nwkNextAddress=0x0000;
+		nwk_IB.nwkAvailableAddresses=0x0000;
+		nwk_IB.nwkAddressIncrement=0x0001;
+		nwk_IB.nwkTransactionPersistenceTime=0x01f4;
+	}
+
+
+  
+}
+
diff --git a/tos/lib/net/zigbee/ieee802154/nwk/nwk_const.h b/tos/lib/net/zigbee/ieee802154/nwk/nwk_const.h
new file mode 100644
index 00000000..b5df8728
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/nwk/nwk_const.h
@@ -0,0 +1,170 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author http://www.open-zb.net
+ * @author Andre Cunha
+ */
+#ifndef __NWK_CONST__
+#define __NWK_CONST__
+ 
+//GLOBAL VARIABLES
+
+#define MAC_PANID 0x1234
+
+//SELECTED DEVICE TYPE
+
+#define TYPE_DEVICE END_DEVICE
+//#define TYPE_DEVICE ROUTER
+//#define TYPE_DEVICE COORDINATOR
+
+//test definitions
+#define DEVICE_DEPTH 0x01
+
+//used to operate in a fixed channel
+#define LOGICAL_CHANNEL 0x1A
+
+//PAN VARIABLES
+//conflict error
+//#define PANID 0x1234
+
+#define AVAILABLEADDRESSES 0x04
+#define ADDRESSINCREMENT 0x0001
+#define MAXCHILDREN 0x06
+#define MAXDEPTH 0x03
+#define MAXROUTERS 0x04
+
+#define BEACON_ORDER 8
+#define SUPERFRAME_ORDER 4
+
+//test definitions
+
+//activated when the device depth is 0x01
+#define D1_PAN_EXT0 0x00000001
+#define D1_PAN_EXT1 0x00000001
+#define D1_PAN_SHORT 0x0000
+
+//activated when the device depth is 0x02
+#define D2_PAN_EXT0 0x00000002
+#define D2_PAN_EXT1 0x00000002
+#define D2_PAN_SHORT 0x0001
+
+//activated when the device depth is 0x03
+#define D3_PAN_EXT0 0x00000003
+#define D3_PAN_EXT1 0x00000003
+#define D3_PAN_SHORT 0x0002
+
+//activated when the device depth is 0x04
+#define D4_PAN_EXT0 0x00000006
+#define D4_PAN_EXT1 0x00000006
+#define D4_PAN_SHORT 0x0022
+
+
+ 
+// The Network layer constants are defined in here.
+//page 202
+//#define nwkcCoordinatorCapable     //set at build time
+//#define nwkcDefaultSecurityLevel   ENC-MIC-64
+
+#define nwkcDiscoveryRetryLimit		0x03
+#define nwkcMaxDepth				0x0f
+#define nwkcMinHeaderOverhead		0x08
+#define nwkcProtocolVersion			0x01    
+#define nwkcRepairThreshold			0x03
+#define nwkcRouteDiscoveryTime		0x2710
+#define nwkcMaxBroadcastJitter		0x40
+#define nwkcInitialRREQRetries		0x03
+#define nwkcRREQRetries				0x02
+#define nwkcRREQRetryInterval		0xfe
+#define nwkcMinRReQJitter			0x01
+#define nwkcMaxRReQJitter			0x40
+
+
+// The NWK IB attributes are defined in here.
+typedef struct
+{
+//page 204
+	uint8_t nwkSequenceNumber;
+	uint8_t nwkPassiveAckTimeout;
+	uint8_t nwkMaxBroadcastRetries;
+	uint8_t nwkMaxChildren;
+	uint8_t nwkMaxDepth;
+	uint8_t nwkMaxRouters;
+//neighbortableentry nwkNeighborTable[];
+	uint8_t nwkNetworkBroadcastDeliveryTime;
+	uint8_t nwkReportConstantCost;
+	uint8_t nwkRouteDiscoveryRetriesPermitted;
+//set? nwkRouteTable;
+	uint8_t nwkSymLink;
+	uint8_t nwkCapabilityInformation;
+	uint8_t nwkUseTreeAddrAlloc;
+	uint8_t nwkUseTreeRouting;
+	uint16_t nwkNextAddress;
+	uint16_t nwkAvailableAddresses;
+	uint16_t nwkAddressIncrement;
+	uint16_t nwkTransactionPersistenceTime;
+	
+} nwkIB;
+
+
+//NWK layer NeighborTableEntry
+typedef struct
+{
+//page 218
+	uint16_t PAN_Id;
+	uint32_t Extended_Address0;
+	uint32_t Extended_Address1;
+	uint16_t Network_Address;
+	uint8_t Device_Type;
+	uint8_t Relationship;
+	
+	//optional fields
+	//we choose to exclude this fields due to memory limitation
+	
+	//bool RxOnWhenIdle;
+	uint8_t Depth;
+	uint8_t Permit_Joining;
+	uint8_t Logical_Channel;
+	uint8_t Potential_Parent;
+	/*
+	uint8_t Beacon_Order;
+	
+	uint8_t Transmit_Failure;
+	uint8_t Potential_Parent;
+	uint8_t LQI;
+	uint8_t Logical_Channel;
+	uint32_t Incoming_Beacon_Timestamp;
+	uint32_t Beacon_Transmission_Time_Offset;
+*/
+} neighbortableentry;
+
+// NWK layer NetworkDescriptor
+typedef struct
+{
+//page 166
+	uint16_t PANId;
+	uint8_t LogicalChannel;
+	uint8_t StackProfile;
+	uint8_t ZigBeeVersion;
+	uint8_t BeaconOrder;
+	uint8_t SuperframeOrder;
+	uint8_t PermitJoining;
+	
+} networkdescriptor;
+
+//NEIGhBOUR TABLE COUNT
+#define NEIGHBOUR_TABLE_SIZE 7
+
+//beacon scheduling mechanims
+typedef struct
+{
+	uint8_t request_type;
+	uint8_t beacon_order;
+	uint8_t superframe_order;
+	uint8_t transmission_offset[3];
+	
+}beacon_scheduling;
+
+#define SCHEDULING_REQUEST 0x01
+#define SCHEDULING_ACCEPT 0x02
+#define SCHEDULING_DENY 0x03
+
+#endif
diff --git a/tos/lib/net/zigbee/ieee802154/nwk/nwk_enumerations.h b/tos/lib/net/zigbee/ieee802154/nwk/nwk_enumerations.h
new file mode 100644
index 00000000..c4b76b57
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/nwk/nwk_enumerations.h
@@ -0,0 +1,74 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author open-zb http://www.open-zb.net
+ * @author Andre Cunha
+ */
+ 
+#ifndef __NWK_ENUMERATIONS__
+#define __NWK_ENUMERATIONS__
+ 
+//NWK layer status values 
+//page 243
+enum { 
+	NWK_SUCCESS = 0x00,
+    NWK_INVALID_PARAMETER = 0xc1,
+    NWK_INVALID_REQUEST = 0xc2,
+	NWK_NOT_PERMITTED = 0xc3,
+	NWK_STARTUP_FAILURE = 0xc4,
+	NWK_ALREADY_PRESENT = 0xc5,
+	NWK_SYNC_FAILURE = 0xc6,
+	NWK_TABLE_FULL = 0xc7,
+	NWK_UNKNOWN_DEVICE = 0xc8,
+	NWK_UNSUPPORTED_ATTRIBUTE = 0xc9,
+	NWK_NO_NETWORKS = 0xca,
+	NWK_LEAVE_UNCONFIRMED = 0xcb,
+	NWK_MAX_FRM_CNTR = 0xcc,
+	NWK_NO_KEY = 0xcd,
+	NWK_BAD_CCM_OUTPUT = 0xce
+    };
+
+//NWK layer device types
+//page 342
+enum {
+	COORDINATOR = 0x00,
+	ROUTER =0x01,
+	END_DEVICE = 0x02
+	};
+
+
+//NWK layer Relationship
+//page 342
+enum {
+	NEIGHBOR_IS_PARENT = 0x00,
+	NEIGHBOR_IS_CHILD = 0x01,
+	NEIGHBOR_IS_SIBLING = 0x02,
+	NEIGHBOR_IS_NON = 0x03,
+	NEIGHBOR_IS_PREVIOUS_CHILD = 0x04,
+	};
+	
+
+//NWK layer PIB attributs ennumerations
+//PAG 317
+enum{
+	NWKSEQUENCENUMBER = 0x81,
+	NWKPASSIVEACKTIMEOUT = 0x82,
+	NWKMAXBROADCASTRETRIES = 0x83,
+	NWKMAXCHILDREN = 0x84,
+	NWKMAXDEPTH = 0x85,
+	NWKMAXROUTERS = 0x86,
+	//NWKNEIGHBORTABLE = 0x87
+	NWKMETWORKBROADCASTDELIVERYTIME = 0x88,
+	NWKREPORTCONSTANTCOST = 0x89,
+	NWKROUTEDISCOVERYRETRIESPERMITED = 0x8a,
+	//NWKROUTETABLE
+	NWKSYMLINK = 0x8e,
+	NWKCAPABILITYINFORMATION = 0x8f,
+	NWKUSETREEADDRALLOC = 0x90,
+	NWKUSETREEROUTING = 0x91,
+	NWKNEXTADDRESS = 0x92,
+	NWKAVAILABLEADDRESSES = 0x93,
+	NWKADDRESSINCREMENT = 0x94,
+	NWKTRANSACTIONPERSISTENCETIME = 0x95
+};
+
+#endif
diff --git a/tos/lib/net/zigbee/ieee802154/phy/PhyC.nc b/tos/lib/net/zigbee/ieee802154/phy/PhyC.nc
new file mode 100644
index 00000000..c4a5ec54
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/phy/PhyC.nc
@@ -0,0 +1,75 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+
+#include "CC2420.h"
+#include "IEEE802154.h"
+
+configuration PhyC {
+
+  provides interface SplitControl;
+  
+ // provides interface Test_send;
+  
+  
+  //ieee802.15.4 phy interfaces
+  provides interface PD_DATA;
+  
+  provides interface PLME_ED;
+  provides interface PLME_CCA;
+  provides interface PLME_SET;
+  provides interface PLME_GET;
+  provides interface PLME_SET_TRX_STATE;
+  
+}
+
+implementation {
+
+	components PhyP;
+	
+	components MainC;
+	MainC.SoftwareInit -> PhyP;
+	
+	
+	SplitControl = PhyP;
+	
+	//Test_send = PhyP;
+	
+	components CC2420ControlC;
+	PhyP.Resource -> CC2420ControlC;
+	PhyP.CC2420Power -> CC2420ControlC;
+	PhyP.CC2420Config ->CC2420ControlC;
+	
+	components CC2420TransmitC;
+	PhyP.SubControl -> CC2420TransmitC;
+	
+	PhyP.Sendframe ->CC2420TransmitC;
+	
+	components CC2420ReceiveC;
+	
+	//Receive = CC2420ReceiveC;
+	
+	
+	PhyP.SubControl -> CC2420ReceiveC;
+	
+	
+	PhyP.Receiveframe ->CC2420ReceiveC;
+	
+	
+	components RandomC;
+	PhyP.Random -> RandomC;
+	
+	components LedsC as Leds;
+	PhyP.Leds -> Leds;
+	
+	
+	PD_DATA=PhyP;
+	
+	PLME_ED=PhyP;
+	PLME_CCA=PhyP;
+	PLME_GET = PhyP;
+	PLME_SET=PhyP;
+	PLME_SET_TRX_STATE=PhyP;
+}
diff --git a/tos/lib/net/zigbee/ieee802154/phy/PhyP.nc b/tos/lib/net/zigbee/ieee802154/phy/PhyP.nc
new file mode 100644
index 00000000..ca9c842a
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/phy/PhyP.nc
@@ -0,0 +1,345 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+
+#include "frame_format.h"
+
+#include "phy_const.h"
+#include "phy_enumerations.h"
+ 
+
+module PhyP {
+
+	provides interface SplitControl;
+	// provides interface Test_send;
+	
+	
+	//ieee802.15.4 phy interfaces
+	provides interface PD_DATA;
+	
+	provides interface PLME_ED;
+	provides interface PLME_CCA;
+	provides interface PLME_SET;
+	provides interface PLME_GET;
+	provides interface PLME_SET_TRX_STATE;
+	
+	
+	provides interface Init;
+	
+	uses interface Resource;
+	uses interface CC2420Power;
+	uses interface CC2420Config;
+	uses interface StdControl as SubControl;
+	
+	uses interface Random;
+	uses interface Leds;
+	
+	uses interface Sendframe;
+	
+	uses interface Receiveframe;
+
+}
+
+implementation {
+
+
+	phyPIB phy_PIB;
+	
+	//transceiver current status
+	//it can only be PHY_TRX_OFF, PHY_RX_ON and PHY_TX_ON
+	uint8_t currentRxTxState = PHY_TRX_OFF;
+	
+	//message received
+	//norace MPDU rxmpdu;
+	MPDU *rxmpdu_ptr;
+
+  
+  error_t sendErr = SUCCESS;
+
+  
+  
+  /** TRUE if we are to use CCA when sending the current packet */
+  norace bool ccaOn;
+  
+  /****************** Prototypes ****************/
+  task void startDone_task();
+  task void startDone_task();
+  task void stopDone_task();
+  task void sendDone_task();
+  
+  void shutdown();
+
+
+
+/***************** Init Commands ****************/
+  command error_t Init.init() {
+  
+  //atomic rxmpdu_ptr = &rxmpdu;
+  
+  //TODO
+  /*
+  	//PHY PIB initialization
+	//phy_PIB.phyCurrentChannel=INIT_CURRENTCHANNEL;
+	phy_PIB.phyCurrentChannel=LOGICAL_CHANNEL;
+	phy_PIB.phyChannelsSupported=INIT_CHANNELSSUPPORTED;
+	phy_PIB.phyTransmitPower=INIT_TRANSMITPOWER;
+	phy_PIB.phyCcaMode=INIT_CCA_MODE;
+  */
+  
+    return SUCCESS;
+  }
+
+
+  /***************** SplitControl Commands ****************/
+  command error_t SplitControl.start() {
+   
+		//arrancar o controlo
+   
+      call CC2420Power.startVReg();
+	  
+	  	
+      return SUCCESS;
+    
+
+  }
+
+  command error_t SplitControl.stop() {
+ 
+    return EBUSY;
+  }
+
+  /***************** Send Commands ****************/
+
+
+    async event void Sendframe.sendDone(error_t error )
+	{
+	
+	    atomic sendErr = error;
+		post sendDone_task();
+	
+	}
+  
+  
+  
+
+  /**************** Events ****************/
+  async event void CC2420Power.startVRegDone() {
+    call Resource.request();
+
+  }
+  
+  event void Resource.granted() {
+    call CC2420Power.startOscillator();
+  }
+
+  async event void CC2420Power.startOscillatorDone() {
+    post startDone_task();
+  }
+  
+  
+  
+  /***************** Tasks ****************/
+  task void sendDone_task() {
+    error_t packetErr;
+    atomic packetErr = sendErr;
+	
+   // signal Send.sendDone( m_msg, packetErr );
+  }
+
+  task void startDone_task() {
+    call SubControl.start();
+    call CC2420Power.rxOn();
+    call Resource.release();
+  
+    signal SplitControl.startDone( SUCCESS );
+  }
+  
+  task void stopDone_task() {
+    
+    signal SplitControl.stopDone( SUCCESS );
+  }
+  
+  
+  /***************** Functions ****************/
+  /**
+   * Shut down all sub-components and turn off the radio
+   */
+  void shutdown() {
+    call SubControl.stop();
+    call CC2420Power.stopVReg();
+    post stopDone_task();
+  }
+
+  /***************** Defaults ***************/
+  default event void SplitControl.startDone(error_t error) {
+  }
+  
+  default event void SplitControl.stopDone(error_t error) {
+  }
+  
+  
+  
+  async event void Receiveframe.receive(uint8_t* frame, uint8_t rssi)
+  {
+  
+    rxmpdu_ptr=(MPDU*)frame;
+		
+	signal PD_DATA.indication(rxmpdu_ptr->length,(uint8_t*)rxmpdu_ptr, rssi);
+  /*
+  printfUART("n %i\n", TOS_NODE_ID); 
+  
+	printfUART("l %i\n", rxmpdu_ptr->length); 
+  printfUART("fc1 %i\n", rxmpdu_ptr->frame_control1); 
+  printfUART("fc2 %i\n", rxmpdu_ptr->frame_control2); 
+	printfUART("seq %i\n", rxmpdu_ptr->seq_num); 
+  
+  for (i=0;i<120;i++)
+  {
+	printfUART("d %i %x\n",i, rxmpdu_ptr->data[i]); 
+  
+  }
+  */
+  
+  
+  }
+  
+  
+  
+  event void CC2420Config.syncDone( error_t error )
+  {
+  
+  
+  
+  return;
+  }
+  
+  
+/*****************************************************************************************************/  
+/**************************************PD-DATA********************************************************/
+/*****************************************************************************************************/  
+
+
+async command error_t PD_DATA.request(uint8_t psduLength, uint8_t* psdu) {
+	
+	
+	call Sendframe.send(psdu,psduLength);
+
+
+	return SUCCESS;
+}
+
+
+/*****************************************************************************************************/  
+/********************************************PLME-ED**************************************************/
+/*****************************************************************************************************/  
+
+command error_t PLME_ED.request(){
+	//MAC asking for energy detection
+	//TODO
+	
+	return SUCCESS;
+}
+
+/*****************************************************************************************************/  
+/********************************************PLME-CCA*************************************************/
+/*****************************************************************************************************/
+
+command error_t PLME_CCA.request(){
+//MAC asking for CCA
+//TODO
+		
+	
+	return SUCCESS;
+}
+ 
+/*****************************************************************************************************/  
+/********************************************PLME-GET*************************************************/
+/*****************************************************************************************************/
+
+command error_t PLME_GET.request(uint8_t PIBAttribute){
+//MAC asking for PIBAttribute value
+  switch(PIBAttribute)
+		{
+			case PHYCURRENTCHANNEL:
+				signal PLME_GET.confirm(PHY_SUCCESS, PIBAttribute, phy_PIB.phyCurrentChannel);
+				break;
+
+			case PHYCHANNELSSUPPORTED:
+				signal PLME_GET.confirm(PHY_SUCCESS, PIBAttribute, phy_PIB.phyChannelsSupported);
+				break;
+
+			case PHYTRANSMITPOWER:
+				signal PLME_GET.confirm(PHY_SUCCESS, PIBAttribute, phy_PIB.phyTransmitPower);
+				break;
+			case PHYCCAMODE:
+				signal PLME_GET.confirm(PHY_SUCCESS, PIBAttribute, phy_PIB.phyCcaMode);
+				break;
+			default:
+				signal PLME_GET.confirm(PHY_UNSUPPORTED_ATTRIBUTE, PIBAttribute, 0x00);
+				break;
+		}
+		
+  
+  return SUCCESS;
+  }
+  
+/*****************************************************************************************************/  
+/********************************************PLME-SET*************************************************/
+/*****************************************************************************************************/
+command error_t PLME_SET.request(uint8_t PIBAttribute, uint8_t PIBAttributeValue){
+  
+
+	  //MAC is demanding for PHY to write the indicated PIB value
+	  switch(PIBAttribute)
+			{
+				case PHYCURRENTCHANNEL:
+					
+					phy_PIB.phyCurrentChannel = PIBAttributeValue;
+					
+					call CC2420Config.setChannel(phy_PIB.phyCurrentChannel);
+					
+					call CC2420Config.sync();
+					
+					//TunePreset(phy_PIB.phyCurrentChannel);
+					signal PLME_SET.confirm(PHY_SUCCESS, PIBAttribute);
+					break;
+	
+				case PHYCHANNELSSUPPORTED:
+					phy_PIB.phyChannelsSupported = PIBAttributeValue;
+					signal PLME_SET.confirm(PHY_SUCCESS, PIBAttribute);
+					break;
+	
+				case PHYTRANSMITPOWER:
+					phy_PIB.phyTransmitPower= PIBAttributeValue;
+					//SetRFPower(phy_PIB.phyTransmitPower);
+					signal PLME_SET.confirm(PHY_SUCCESS, PIBAttribute);
+					break;
+				case PHYCCAMODE:
+					phy_PIB.phyCcaMode= PIBAttributeValue;
+					signal PLME_SET.confirm(PHY_SUCCESS, PIBAttribute);
+					break;
+				default:
+					signal PLME_SET.confirm(PHY_UNSUPPORTED_ATTRIBUTE, PIBAttribute);
+					break;
+			}
+	  return SUCCESS;
+}  
+
+/*****************************************************************************************************/  
+/**********************************PLME_SET_TRX_STATE*************************************************/
+/*****************************************************************************************************/
+
+
+async command error_t PLME_SET_TRX_STATE.request(uint8_t state){
+
+
+return SUCCESS;
+
+}
+
+
+
+}
+
diff --git a/tos/lib/net/zigbee/ieee802154/phy/phy_const.h b/tos/lib/net/zigbee/ieee802154/phy/phy_const.h
new file mode 100644
index 00000000..8ac3ced6
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/phy/phy_const.h
@@ -0,0 +1,32 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ */
+
+
+#ifndef __PHY_CONST__
+#define __PHY_CONST__
+ 
+// The PHY constants are defined here.
+#define aMaxPHYPacketSize  127
+#define aTurnaroundTime 12
+
+#define INIT_CURRENTCHANNEL 0x15
+#define INIT_CHANNELSSUPPORTED 0x0
+#define INIT_TRANSMITPOWER 15
+#define INIT_CCA_MODE 0
+
+#define CCA_IDLE 0
+#define CCA_BUSY 1
+
+// PHY PIB attribute and psdu
+typedef struct
+{
+	uint8_t phyCurrentChannel;
+	uint8_t phyChannelsSupported;
+	uint8_t phyTransmitPower;
+	uint8_t phyCcaMode;
+} phyPIB;
+
+#endif
+
diff --git a/tos/lib/net/zigbee/ieee802154/phy/phy_enumerations.h b/tos/lib/net/zigbee/ieee802154/phy/phy_enumerations.h
new file mode 100644
index 00000000..9059bf37
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/phy/phy_enumerations.h
@@ -0,0 +1,33 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ */
+ 
+#ifndef __PHY_ENUMERATIONS__
+#define __PHY_ENUMERATIONS__
+ 
+ 
+//phy status enumerations
+enum{
+	PHY_BUSY = 0x00,
+	PHY_BUSY_RX = 0x01,
+	PHY_BUSY_TX = 0x02,
+	PHY_FORCE_TRX_OFF = 0x03,
+	PHY_IDLE = 0x04,
+	PHY_INVALID_PARAMETER = 0x05,
+	PHY_RX_ON = 0x06,
+	PHY_SUCCESS = 0x07,
+	PHY_TRX_OFF = 0x08,
+	PHY_TX_ON = 0x09,
+	PHY_UNSUPPORTED_ATTRIBUTE = 0x0a
+};
+
+//phy PIB attributes enumerations
+enum{
+	PHYCURRENTCHANNEL = 0x00,
+	PHYCHANNELSSUPPORTED = 0X01,
+	PHYTRANSMITPOWER = 0X02,
+	PHYCCAMODE=0X03
+};
+
+#endif
diff --git a/tos/lib/net/zigbee/ieee802154/readme.txt b/tos/lib/net/zigbee/ieee802154/readme.txt
new file mode 100644
index 00000000..db38221a
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/readme.txt
@@ -0,0 +1,12 @@
+Title: ZigBee
+Author: André Cunha - IPP-HURRAY! http://www.open-zb.net
+----------------------------------------------
+
+
+Notes:
+------
+This folder contains the main implementation files.
+
+Note that the IEEE 802.15.4 MAC is implemented in the mac and timerasync folders and the IEEE 802.15.4
+with the Zigbee Network layer including the Cluster-tree formation with the TDBS mechanism (refer to http://www.open-zb.net/publications/hurray-tr-070102.pdf)
+is implemented in the macTDBS and timerasyncTDBS
\ No newline at end of file
diff --git a/tos/lib/net/zigbee/ieee802154/timerasync/TimerAsync.nc b/tos/lib/net/zigbee/ieee802154/timerasync/TimerAsync.nc
new file mode 100644
index 00000000..7fc36b9f
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/timerasync/TimerAsync.nc
@@ -0,0 +1,74 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+ 
+ interface TimerAsync
+ {
+	
+	async command error_t start();
+	
+	async command error_t stop();
+	
+	async command error_t reset();
+ 
+	/***********************************FIRED EVENTS COMMANDS******************************/
+	//time before BI
+	async event error_t before_bi_fired();
+	
+	async event error_t sd_fired();
+	
+	async event error_t bi_fired();
+	
+	//backoff fired
+	async event error_t backoff_fired();
+	
+	//backoff boundary fired
+	async event error_t time_slot_fired();
+	
+	async event error_t before_time_slot_fired();
+	
+	async event error_t sfd_fired();
+	
+	/***********************************INIT/RESET COMMANDS******************************/
+	
+	async command error_t set_bi_sd(uint32_t bi_symbols,uint32_t sd_symbols);
+	
+	async command error_t set_backoff_symbols(uint8_t symbols);
+	
+	async command error_t set_enable_backoffs(bool enable_backoffs);
+	
+	async command uint8_t reset_start(uint32_t start_ticks);
+
+	async command error_t reset_process_frame_tick_counter();
+	
+	/*****************************************************************************/
+	
+	async command error_t set_timers_enable(uint8_t timer);
+	
+	/***********************************GET COMMANDS******************************/
+	async command uint32_t get_total_tick_counter();
+	
+	async command uint32_t get_current_number_backoff();
+	
+	async command uint32_t get_time_slot_backoff_periods();
+	
+	async command uint32_t get_current_time_slot();
+
+	async command uint32_t get_current_number_backoff_on_time_slot();
+	
+	async command uint32_t get_process_frame_tick_counter();
+	
+	async command uint32_t get_time_slot_ticks();
+	
+	async command uint32_t get_current_ticks();
+	
+	async command uint32_t get_sd_ticks();
+	
+	async command uint32_t get_bi_ticks();
+	
+	async command uint32_t get_backoff_ticks();
+ 
+ }
+
diff --git a/tos/lib/net/zigbee/ieee802154/timerasync/TimerAsyncC.nc b/tos/lib/net/zigbee/ieee802154/timerasync/TimerAsyncC.nc
new file mode 100644
index 00000000..32490333
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/timerasync/TimerAsyncC.nc
@@ -0,0 +1,30 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+ 
+ //TIMER ASYNC TELOSB
+ 
+
+configuration TimerAsyncC
+{
+	//provides interface StdControl;
+	provides interface TimerAsync;
+}
+implementation
+{
+
+	components LedsC;
+	components TimerAsyncM;
+
+	components new Alarm32khz32C() as Alarm;
+	
+	//StdControl = TimerAsyncM;
+	TimerAsync = TimerAsyncM;
+	
+	TimerAsyncM.Leds -> LedsC;
+	
+	TimerAsyncM.AsyncTimer -> Alarm;
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/timerasync/TimerAsyncM.nc b/tos/lib/net/zigbee/ieee802154/timerasync/TimerAsyncM.nc
new file mode 100644
index 00000000..44f23194
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/timerasync/TimerAsyncM.nc
@@ -0,0 +1,364 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+ 
+#define BEFORE_BI_INTERVAL 100
+#define BEFORE_BB_INTERVAL 5
+
+#define SO_EQUAL_BO_DIFFERENCE 2
+
+//#define SYMBOL_DIVISION 4
+
+//temporary
+#define NUMBER_TIME_SLOTS 16
+ 
+module TimerAsyncM {
+
+	provides interface TimerAsync;
+	
+	uses interface Leds;
+
+	uses interface Alarm<T32khz,uint32_t> as AsyncTimer;
+  
+	
+  
+  
+}
+implementation
+{
+
+uint32_t ticks_counter;
+
+//BEACON INTERVAL VARIABLES
+uint32_t bi_ticks;
+uint32_t bi_backoff_periods;
+uint32_t before_bi_ticks;
+uint32_t sd_ticks;
+
+//number of backoff periods
+uint32_t time_slot_backoff_periods;
+
+//number of ticks in the timeslot
+uint32_t time_slot_ticks;
+uint32_t before_time_slot_ticks;
+uint32_t time_slot_tick_next_fire;
+
+//BACKOFF VARIABLES
+uint32_t backoff_symbols;
+
+//number of ticks in the backoff
+uint32_t backoff_ticks = 5;
+
+//COUNTER VARIABLES
+uint32_t backoff_ticks_counter=0;
+
+//give the current time slot number
+uint8_t current_time_slot=0;
+//counts the current number of time slots of each time slot
+uint32_t current_number_backoff_on_time_slot=0;
+//count the total number of backoffs
+uint32_t current_number_backoff = 0;
+
+//OTHER
+bool backoffs=0;
+bool enable_backoffs=0;
+
+uint8_t previous_sfd=0;
+uint8_t current_sfd = 0;
+
+uint32_t process_frame_tick_counter=0;
+
+uint32_t total_tick_counter=0;
+
+uint8_t timers_enable=0x01;
+
+  
+async command error_t TimerAsync.start()
+{
+
+call AsyncTimer.start(10);
+
+return SUCCESS;
+
+}
+	
+async command error_t TimerAsync.stop()
+{
+
+return SUCCESS;
+
+}
+  
+/*RESET the tick counter, */
+async command error_t TimerAsync.reset()
+{
+	atomic ticks_counter = 0;
+	call AsyncTimer.start(10);
+	return SUCCESS;
+}
+
+async command error_t TimerAsync.set_bi_sd(uint32_t bi_symbols,uint32_t sd_symbols)
+{
+
+atomic{
+		time_slot_backoff_periods = (sd_symbols / NUMBER_TIME_SLOTS) / backoff_symbols;
+		time_slot_ticks = time_slot_backoff_periods * backoff_ticks;
+		time_slot_tick_next_fire = time_slot_ticks;
+		before_time_slot_ticks = time_slot_ticks - BEFORE_BB_INTERVAL;
+		sd_ticks = time_slot_ticks * NUMBER_TIME_SLOTS;
+
+		if (bi_symbols == sd_symbols )
+		{
+			//in order not to have the same time for both BI and SI
+			sd_ticks = sd_ticks - SO_EQUAL_BO_DIFFERENCE;
+		}
+		
+		bi_backoff_periods = bi_symbols/ backoff_symbols;
+		bi_ticks = bi_backoff_periods * backoff_ticks;
+		
+		before_bi_ticks = bi_ticks - BEFORE_BI_INTERVAL;
+		
+		/*
+		printfUART("bi_ticks %i\n", bi_ticks);
+		printfUART("sd_ticks %i\n", sd_ticks);
+		printfUART("time_slot_ticks %i\n", time_slot_ticks);
+			*/
+	}
+return SUCCESS;
+}
+  
+  
+async command error_t TimerAsync.set_backoff_symbols(uint8_t Backoff_Duration_Symbols)
+{
+	
+	atomic
+	{
+		backoff_symbols = Backoff_Duration_Symbols;
+		backoff_ticks =  1;
+	}
+
+	return SUCCESS;
+} 
+
+
+async command error_t TimerAsync.set_enable_backoffs(bool enable)
+{
+	atomic enable_backoffs = enable;
+	return SUCCESS;
+}
+  
+   
+  
+async event void AsyncTimer.fired() {
+
+atomic{
+
+		if(timers_enable==0x01)
+		{
+			
+			ticks_counter++;
+			process_frame_tick_counter++;
+			
+			total_tick_counter++;
+			
+			if (ticks_counter == before_bi_ticks)
+			{
+				signal TimerAsync.before_bi_fired();	
+			} 
+			
+			if (ticks_counter == bi_ticks)
+			{
+				//printfUART("bi%d\n", ticks_counter);
+				ticks_counter = 0;
+				current_time_slot=0;
+				backoff_ticks_counter=0;
+				time_slot_tick_next_fire=time_slot_ticks;
+				backoffs=1;
+				enable_backoffs = 1;
+				current_number_backoff =0;
+				signal TimerAsync.bi_fired();
+			}
+			
+			if(ticks_counter == sd_ticks)
+			{
+				backoffs=0;
+				signal TimerAsync.sd_fired();
+			}
+	
+			if ((enable_backoffs == 1) && (backoffs == 1))
+			{	
+				backoff_ticks_counter++;
+				
+				if (backoff_ticks_counter == backoff_ticks)
+				{
+					
+					backoff_ticks_counter=0;
+					current_number_backoff ++;
+					current_number_backoff_on_time_slot++;
+					signal TimerAsync.backoff_fired();
+				}
+				
+				//before time slot boundary
+				if(ticks_counter == before_time_slot_ticks)
+				{
+					signal TimerAsync.before_time_slot_fired();
+				}
+				
+				//time slot fired
+				if (ticks_counter == time_slot_tick_next_fire)
+				{
+					time_slot_tick_next_fire = time_slot_tick_next_fire + time_slot_ticks;
+					before_time_slot_ticks = time_slot_tick_next_fire - BEFORE_BB_INTERVAL;
+					backoff_ticks_counter=0;
+					current_number_backoff_on_time_slot=0;
+					current_time_slot++;
+					
+					if ((current_time_slot > 0) && (current_time_slot < 16) )
+						signal TimerAsync.time_slot_fired();
+					
+						
+						
+				}
+			}
+	}
+
+   call AsyncTimer.start(10);
+   
+  }
+}
+    
+
+async command error_t TimerAsync.set_timers_enable(uint8_t timer)
+{
+
+	atomic timers_enable = timer;
+	//printfUART("te%i\n", timers_enable);
+
+	
+return SUCCESS;
+}
+
+async command error_t TimerAsync.reset_process_frame_tick_counter()
+{
+atomic process_frame_tick_counter=0;
+
+return SUCCESS;
+}
+
+
+
+/*RESET the tick counter, to the start ticks */
+
+async command uint8_t TimerAsync.reset_start(uint32_t start_ticks)
+{
+			//ticks_counter =0;
+			//ticks_counter = start_ticks;
+			
+			current_time_slot = start_ticks / time_slot_ticks;
+			
+			if (current_time_slot == 0)
+			{
+				time_slot_tick_next_fire= time_slot_ticks;
+				current_number_backoff = start_ticks / backoff_ticks;
+				current_number_backoff_on_time_slot = current_number_backoff;
+			}
+			else
+			{
+				time_slot_tick_next_fire=  ((current_time_slot+1) * time_slot_ticks);
+				current_number_backoff = start_ticks / backoff_ticks;
+				current_number_backoff_on_time_slot = current_number_backoff - (current_time_slot * time_slot_backoff_periods);
+			}
+			
+			backoff_ticks_counter=0;
+			backoffs=1;
+			//on_sync = 1;
+			
+		total_tick_counter = total_tick_counter + start_ticks;
+		ticks_counter = start_ticks;
+
+/*
+		printfUART("bi_ticks %i\n", bi_ticks);
+		printfUART("sd_ticks %i\n", sd_ticks);
+		printfUART("time_slot_ticks %i\n", time_slot_ticks);
+		printfUART("total_tick_counter %i\n", total_tick_counter);
+		printfUART("ticks_counter %i\n", ticks_counter);
+		printfUART("current_time_slot %i\n", current_time_slot);
+*/
+
+
+
+		return current_time_slot;
+		
+	}
+
+/***********************************SET COMMANDS******************************/
+
+/***********************************GET COMMANDS******************************/
+/*get current clock ticks*/
+
+async command uint32_t TimerAsync.get_current_ticks()
+{
+	return ticks_counter;
+}
+/*get current sd ticks*/  
+async command uint32_t TimerAsync.get_sd_ticks()
+{
+	return time_slot_ticks * NUMBER_TIME_SLOTS;
+}	
+/*get current clock ticks*/
+async command uint32_t TimerAsync.get_bi_ticks()
+{
+	return bi_ticks;
+}	
+/*get current backoff ticks*/
+async command uint32_t TimerAsync.get_backoff_ticks()
+{
+	return backoff_ticks;
+}	
+/*get current time slot ticks*/
+async command uint32_t TimerAsync.get_time_slot_ticks()
+{
+	return time_slot_ticks;
+}	
+
+/*get current backoff ticks*/
+async command uint32_t TimerAsync.get_current_number_backoff()
+{
+return current_number_backoff;
+}	
+
+async command uint32_t TimerAsync.get_time_slot_backoff_periods()
+{
+return time_slot_backoff_periods;
+}
+
+async command uint32_t TimerAsync.get_current_time_slot()
+{
+return current_time_slot;
+}
+
+
+async command uint32_t TimerAsync.get_current_number_backoff_on_time_slot()
+{
+
+return current_number_backoff_on_time_slot;
+
+}
+
+async command uint32_t TimerAsync.get_total_tick_counter()
+{
+return total_tick_counter;
+}
+async command uint32_t TimerAsync.get_process_frame_tick_counter()
+{
+		//printfUART("%d\n", process_frame_tick_counter);
+		
+return process_frame_tick_counter;
+}
+  
+  
+  
+  
+}
diff --git a/tos/lib/net/zigbee/ieee802154/timerasyncTDBS/TimerAsync.nc b/tos/lib/net/zigbee/ieee802154/timerasyncTDBS/TimerAsync.nc
new file mode 100644
index 00000000..6b3554c8
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/timerasyncTDBS/TimerAsync.nc
@@ -0,0 +1,92 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+ 
+ interface TimerAsync
+ {
+	
+	async command error_t start();
+	
+	async command error_t stop();
+	
+	async command error_t reset();
+ 
+	/***********************************FIRED EVENTS COMMANDS******************************/
+	//time before BI
+	async event error_t before_bi_fired();
+	
+	async event error_t sd_fired();
+	
+	async event error_t bi_fired();
+	
+	//backoff fired
+	async event error_t backoff_fired();
+	
+	//backoff boundary fired
+	async event error_t time_slot_fired();
+	
+	async event error_t before_time_slot_fired();
+	
+	async event error_t sfd_fired();
+	
+	/***********************************INIT/RESET COMMANDS******************************/
+	
+	async command error_t set_bi_sd(uint32_t bi_symbols,uint32_t sd_symbols);
+	
+	async command error_t set_backoff_symbols(uint8_t symbols);
+	
+	async command error_t set_enable_backoffs(bool enable_backoffs);
+	
+	async command uint8_t reset_start(uint32_t start_ticks);
+
+	async command error_t reset_process_frame_tick_counter();
+	
+	/*****************************************************************************/
+	
+	async command error_t set_timers_enable(uint8_t timer);
+	
+	/***********************************GET COMMANDS******************************/
+	async command uint32_t get_total_tick_counter();
+	
+	async command uint32_t get_current_number_backoff();
+	
+	async command uint32_t get_time_slot_backoff_periods();
+	
+	async command uint32_t get_current_time_slot();
+
+	async command uint32_t get_current_number_backoff_on_time_slot();
+	
+	async command uint32_t get_process_frame_tick_counter();
+	
+	async command uint32_t get_time_slot_ticks();
+	
+	async command uint32_t get_current_ticks();
+	
+	async command uint32_t get_sd_ticks();
+	
+	async command uint32_t get_bi_ticks();
+	
+	async command uint32_t get_backoff_ticks();
+	
+	
+	/*****************************************************************************/
+	//TDBS IMPLEMENTATION
+	/*****************************************************************************/
+	
+	//track beacon interfaces
+	
+	async command error_t set_track_beacon(uint8_t track);
+	
+	async command error_t set_track_beacon_start_ticks(uint32_t parent_offset_symbols,uint32_t duration_symbols,uint32_t transmission_delay);
+	
+	
+	async event error_t before_start_track_beacon_fired();
+	
+	async event error_t start_track_beacon_fired();
+	
+	async event error_t end_track_beacon_fired();
+ 
+ }
+
diff --git a/tos/lib/net/zigbee/ieee802154/timerasyncTDBS/TimerAsyncC.nc b/tos/lib/net/zigbee/ieee802154/timerasyncTDBS/TimerAsyncC.nc
new file mode 100644
index 00000000..32490333
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/timerasyncTDBS/TimerAsyncC.nc
@@ -0,0 +1,30 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+ 
+ //TIMER ASYNC TELOSB
+ 
+
+configuration TimerAsyncC
+{
+	//provides interface StdControl;
+	provides interface TimerAsync;
+}
+implementation
+{
+
+	components LedsC;
+	components TimerAsyncM;
+
+	components new Alarm32khz32C() as Alarm;
+	
+	//StdControl = TimerAsyncM;
+	TimerAsync = TimerAsyncM;
+	
+	TimerAsyncM.Leds -> LedsC;
+	
+	TimerAsyncM.AsyncTimer -> Alarm;
+
+}
diff --git a/tos/lib/net/zigbee/ieee802154/timerasyncTDBS/TimerAsyncM.nc b/tos/lib/net/zigbee/ieee802154/timerasyncTDBS/TimerAsyncM.nc
new file mode 100644
index 00000000..30b2141f
--- /dev/null
+++ b/tos/lib/net/zigbee/ieee802154/timerasyncTDBS/TimerAsyncM.nc
@@ -0,0 +1,436 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ *
+ */
+ 
+#define BEFORE_BI_INTERVAL 100
+#define BEFORE_BB_INTERVAL 5
+
+#define SO_EQUAL_BO_DIFFERENCE 2
+
+//#define SYMBOL_DIVISION 4
+
+//temporary
+#define NUMBER_TIME_SLOTS 16
+
+//TDBS Implementation
+#define BEFORE_TRACK_BEACON 40
+ 
+module TimerAsyncM {
+
+	provides interface TimerAsync;
+	
+	uses interface Leds;
+
+	uses interface Alarm<T32khz,uint32_t> as AsyncTimer;
+  
+	
+  
+}
+implementation
+{
+
+uint32_t ticks_counter;
+
+//BEACON INTERVAL VARIABLES
+uint32_t bi_ticks;
+uint32_t bi_backoff_periods;
+uint32_t before_bi_ticks;
+uint32_t sd_ticks;
+
+//number of backoff periods
+uint32_t time_slot_backoff_periods;
+
+//number of ticks in the timeslot
+uint32_t time_slot_ticks;
+uint32_t before_time_slot_ticks;
+uint32_t time_slot_tick_next_fire;
+
+//BACKOFF VARIABLES
+uint32_t backoff_symbols;
+
+//number of ticks in the backoff
+uint32_t backoff_ticks = 5;
+
+//COUNTER VARIABLES
+uint32_t backoff_ticks_counter=0;
+
+//give the current time slot number
+uint8_t current_time_slot=0;
+//counts the current number of time slots of each time slot
+uint32_t current_number_backoff_on_time_slot=0;
+//count the total number of backoffs
+uint32_t current_number_backoff = 0;
+
+//OTHER
+bool backoffs=0;
+bool enable_backoffs=0;
+
+uint8_t previous_sfd=0;
+uint8_t current_sfd = 0;
+
+uint32_t process_frame_tick_counter=0;
+
+uint32_t total_tick_counter=0;
+
+uint8_t timers_enable=0x01;
+
+
+//TDBS Implementation
+
+uint32_t start_track_beacon_ticks=0;
+uint32_t end_track_beacon_ticks=0;
+
+uint8_t track_beacon=0;
+
+  
+async command error_t TimerAsync.start()
+{
+
+call AsyncTimer.start(10);
+
+return SUCCESS;
+
+}
+	
+async command error_t TimerAsync.stop()
+{
+
+return SUCCESS;
+
+}
+  
+/*RESET the tick counter, */
+async command error_t TimerAsync.reset()
+{
+	atomic ticks_counter = 0;
+	call AsyncTimer.start(10);
+	return SUCCESS;
+}
+
+async command error_t TimerAsync.set_bi_sd(uint32_t bi_symbols,uint32_t sd_symbols)
+{
+
+atomic{
+		time_slot_backoff_periods = (sd_symbols / NUMBER_TIME_SLOTS) / backoff_symbols;
+		time_slot_ticks = time_slot_backoff_periods * backoff_ticks;
+		time_slot_tick_next_fire = time_slot_ticks;
+		before_time_slot_ticks = time_slot_ticks - BEFORE_BB_INTERVAL;
+		sd_ticks = time_slot_ticks * NUMBER_TIME_SLOTS;
+
+		if (bi_symbols == sd_symbols )
+		{
+			//in order not to have the same time for both BI and SI
+			sd_ticks = sd_ticks - SO_EQUAL_BO_DIFFERENCE;
+		}
+		
+		bi_backoff_periods = bi_symbols/ backoff_symbols;
+		bi_ticks = bi_backoff_periods * backoff_ticks;
+		
+		before_bi_ticks = bi_ticks - BEFORE_BI_INTERVAL;
+		
+		/*
+		printfUART("bi_ticks %i\n", bi_ticks);
+		printfUART("sd_ticks %i\n", sd_ticks);
+		printfUART("time_slot_ticks %i\n", time_slot_ticks);
+			*/
+	}
+return SUCCESS;
+}
+  
+  
+async command error_t TimerAsync.set_backoff_symbols(uint8_t Backoff_Duration_Symbols)
+{
+	
+	atomic
+	{
+		backoff_symbols = Backoff_Duration_Symbols;
+		backoff_ticks =  1;
+	}
+
+	return SUCCESS;
+} 
+
+
+async command error_t TimerAsync.set_enable_backoffs(bool enable)
+{
+	atomic enable_backoffs = enable;
+	return SUCCESS;
+}
+  
+   
+  
+async event void AsyncTimer.fired() {
+
+atomic{
+
+		if(timers_enable==0x01)
+		{
+			
+			ticks_counter++;
+			process_frame_tick_counter++;
+			
+			total_tick_counter++;
+			
+			if (ticks_counter == before_bi_ticks)
+			{
+				signal TimerAsync.before_bi_fired();	
+			} 
+			
+			if (ticks_counter == bi_ticks)
+			{
+				//printfUART("bi%d\n", ticks_counter);
+				ticks_counter = 0;
+				current_time_slot=0;
+				backoff_ticks_counter=0;
+				time_slot_tick_next_fire=time_slot_ticks;
+				backoffs=1;
+				enable_backoffs = 1;
+				current_number_backoff =0;
+				signal TimerAsync.bi_fired();
+			}
+			
+			if(ticks_counter == sd_ticks)
+			{
+				backoffs=0;
+				signal TimerAsync.sd_fired();
+			}
+	
+			if ((enable_backoffs == 1) && (backoffs == 1))
+			{	
+				backoff_ticks_counter++;
+				
+				if (backoff_ticks_counter == backoff_ticks)
+				{
+					
+					backoff_ticks_counter=0;
+					current_number_backoff ++;
+					current_number_backoff_on_time_slot++;
+					signal TimerAsync.backoff_fired();
+				}
+				
+				//before time slot boundary
+				if(ticks_counter == before_time_slot_ticks)
+				{
+					signal TimerAsync.before_time_slot_fired();
+				}
+				
+				//time slot fired
+				if (ticks_counter == time_slot_tick_next_fire)
+				{
+					time_slot_tick_next_fire = time_slot_tick_next_fire + time_slot_ticks;
+					before_time_slot_ticks = time_slot_tick_next_fire - BEFORE_BB_INTERVAL;
+					backoff_ticks_counter=0;
+					current_number_backoff_on_time_slot=0;
+					current_time_slot++;
+					
+					if ((current_time_slot > 0) && (current_time_slot < 16) )
+						signal TimerAsync.time_slot_fired();
+					
+						
+						
+				}
+			}
+			
+			
+			//will only fires when the node is in the inactive period(backoffs==0) and is tracking the beacon
+			//TDBS Implementation
+			if(track_beacon == 1)
+			{
+			
+				if(ticks_counter == (start_track_beacon_ticks - BEFORE_TRACK_BEACON))
+				{
+					//backoff_ticks_counter=0;
+					signal TimerAsync.before_start_track_beacon_fired();
+				}
+				
+				if(ticks_counter == start_track_beacon_ticks)
+				{
+					//backoff_ticks_counter=0;
+					signal TimerAsync.start_track_beacon_fired();
+				}
+				
+				backoff_ticks_counter++;
+				if(backoff_ticks_counter==backoff_ticks)
+				{
+					backoff_ticks_counter=0;
+					signal TimerAsync.backoff_fired();
+				}
+				
+				if(ticks_counter == end_track_beacon_ticks)
+				{
+					signal TimerAsync.end_track_beacon_fired();
+				}
+			}
+	}
+
+   call AsyncTimer.start(10);
+   
+  }
+}
+    
+
+async command error_t TimerAsync.set_timers_enable(uint8_t timer)
+{
+
+	atomic timers_enable = timer;
+	//printfUART("te%i\n", timers_enable);
+
+	
+return SUCCESS;
+}
+
+async command error_t TimerAsync.reset_process_frame_tick_counter()
+{
+atomic process_frame_tick_counter=0;
+
+return SUCCESS;
+}
+
+
+
+/*RESET the tick counter, to the start ticks */
+
+async command uint8_t TimerAsync.reset_start(uint32_t start_ticks)
+{
+			//ticks_counter =0;
+			//ticks_counter = start_ticks;
+			
+			current_time_slot = start_ticks / time_slot_ticks;
+			
+			if (current_time_slot == 0)
+			{
+				time_slot_tick_next_fire= time_slot_ticks;
+				current_number_backoff = start_ticks / backoff_ticks;
+				current_number_backoff_on_time_slot = current_number_backoff;
+			}
+			else
+			{
+				time_slot_tick_next_fire=  ((current_time_slot+1) * time_slot_ticks);
+				current_number_backoff = start_ticks / backoff_ticks;
+				current_number_backoff_on_time_slot = current_number_backoff - (current_time_slot * time_slot_backoff_periods);
+			}
+			
+			backoff_ticks_counter=0;
+			backoffs=1;
+			//on_sync = 1;
+			
+		total_tick_counter = total_tick_counter + start_ticks;
+		ticks_counter = start_ticks;
+
+/*
+		printfUART("bi_ticks %i\n", bi_ticks);
+		printfUART("sd_ticks %i\n", sd_ticks);
+		printfUART("time_slot_ticks %i\n", time_slot_ticks);
+		printfUART("total_tick_counter %i\n", total_tick_counter);
+		printfUART("ticks_counter %i\n", ticks_counter);
+		printfUART("current_time_slot %i\n", current_time_slot);
+*/
+
+
+
+		return current_time_slot;
+		
+	}
+
+/***********************************SET COMMANDS******************************/
+
+/***********************************GET COMMANDS******************************/
+/*get current clock ticks*/
+
+async command uint32_t TimerAsync.get_current_ticks()
+{
+	return ticks_counter;
+}
+/*get current sd ticks*/  
+async command uint32_t TimerAsync.get_sd_ticks()
+{
+	return time_slot_ticks * NUMBER_TIME_SLOTS;
+}	
+/*get current clock ticks*/
+async command uint32_t TimerAsync.get_bi_ticks()
+{
+	return bi_ticks;
+}	
+/*get current backoff ticks*/
+async command uint32_t TimerAsync.get_backoff_ticks()
+{
+	return backoff_ticks;
+}	
+/*get current time slot ticks*/
+async command uint32_t TimerAsync.get_time_slot_ticks()
+{
+	return time_slot_ticks;
+}	
+
+/*get current backoff ticks*/
+async command uint32_t TimerAsync.get_current_number_backoff()
+{
+return current_number_backoff;
+}	
+
+async command uint32_t TimerAsync.get_time_slot_backoff_periods()
+{
+return time_slot_backoff_periods;
+}
+
+async command uint32_t TimerAsync.get_current_time_slot()
+{
+return current_time_slot;
+}
+
+
+async command uint32_t TimerAsync.get_current_number_backoff_on_time_slot()
+{
+
+return current_number_backoff_on_time_slot;
+
+}
+
+async command uint32_t TimerAsync.get_total_tick_counter()
+{
+return total_tick_counter;
+}
+async command uint32_t TimerAsync.get_process_frame_tick_counter()
+{
+		//printfUART("%d\n", process_frame_tick_counter);
+		
+return process_frame_tick_counter;
+}
+ 
+ 
+//TDBS Implementation
+async command error_t TimerAsync.set_track_beacon(uint8_t track)
+{
+	atomic track_beacon = track;
+
+return SUCCESS;
+}
+
+async command error_t TimerAsync.set_track_beacon_start_ticks(uint32_t parent_offset_symbols,uint32_t duration_symbols,uint32_t transmission_delay)
+{
+
+atomic{
+	
+	start_track_beacon_ticks = bi_ticks - ((parent_offset_symbols / backoff_symbols)*backoff_ticks);
+	
+	end_track_beacon_ticks = start_track_beacon_ticks + ((duration_symbols / backoff_symbols)*backoff_ticks);
+
+	//verify, the node must synchronyze with the parent beacon offset
+	ticks_counter = (start_track_beacon_ticks - transmission_delay);
+	
+	
+	//printfUART("start_track_beacon_ticks %i\n", start_track_beacon_ticks);
+	//printfUART("end_track_beacon_ticks %i\n", end_track_beacon_ticks);
+	
+	
+	}
+return SUCCESS;
+}
+
+
+  
+  
+  
+}
diff --git a/tos/lib/net/zigbee/readme.txt b/tos/lib/net/zigbee/readme.txt
new file mode 100644
index 00000000..df5110e5
--- /dev/null
+++ b/tos/lib/net/zigbee/readme.txt
@@ -0,0 +1,110 @@
+Title: open-zb protocol stack implementation for TinyOS v2.x
+Author: Ricardo Severino - IPP-HURRAY! http://www.open-zb.net
+Author: Andr� Cunha - IPP-HURRAY! http://www.open-zb.net
+----------------------------------------------
+
+Implementation of the ZigBee and the beacon-enabled mode of the IEEE 802.15.4.
+
+This project is divided in two, the beacon-enabled mode of the IEEE 802.15.4 without any network level
+and supporting the synchronized star topology, tested in the MicaZ and TelosB motes and the beacon-enabled
+mode of the IEEE 802.15.4 with the ZigBee network layer supporting the Cluster-tree topology.
+
+The current version of the implementation of the IEEE 802.15.4 beacon enabled mode supports the following functionalities:
+
+-CSMA/CA algorithm � slotted version;
+-GTS Mechanism;
+-Indirect transmission mechanism;
+-Direct / Indirect / GTS Data Transmission;
+-Beacon Management;
+-Frame construction � Short Addressing Fields only and extended addressing
+fields in the association request;
+-Association/Disassociation Mechanism;
+-MAC PIB Management;
+-Frame Reception Conditions;
+-ED and PASSIVE channel scan;
+
+The following functionalities are not implemented or tested in the current
+version of the implementation 
+-Unslotted version CSMA/CA;
+-Extended Address Fields of the Frames;
+-IntraPAN Address Fields of the Frames;
+-Active and Orphan channel Scan;
+-Orphan Devices;
+-Frame Reception Conditions (Verify Conditions);
+-Security � Out of the scope of this implementation;
+
+The current version of the ZigBee Network Layer, besides the above functionalities, supports
+
+-Creation of the Cluster-tree topology (statically defined) using the TDBS (refer to http://www.open-zb.net/publications/hurray-tr-070510.pdf)
+-Cluster-tree routing protocol
+-Address Assignment
+-NWL PIB management
+
+
+Notes:
+------
+
+The implementation files is organized as follows:
+
+folders:
+
+app 
+- IEEE 802.15.4 test applications
+	Contains 4 test applications
+	-AssociationExample - uses the associates with the Coordinator, transmits data messages and dissasociates
+	-DataSendExample - data transmission example
+	-GTSManagementExample - Uses the GTS functions to allocate a GTS slot in the Coordinator, sends GTS messages and deallocate the GTS slot
+	-SimpleRoutingExample - evolution of the DataSendExample used to demonstrate a simple netork layer where two nodes use the Coordinator to route messages
+Notes:
+The objective of these examples is to
+provide a demonstration/testing of the protocol functionalities and allowing a simple
+understanding of the implementation functions.
+All the examples have a configuration file associated (eg <AppName>.h) located in
+the application folder. The configuration include the type of device (eg
+COORDINATOR or END_DEVICE), the logical channel, the beacon order, the
+superframe order, the pan id and the device depth in the network (by default all the end
+devices have a depth of 1 and the coordinator a depth of 0).
+
+- ZigBee Network Layer with the TDBS
+	
+	-Test_APL
+This application uses the interfaces provided by the NWKP component and currently is customized
+to use with the TELOSB mote due to the interfacing with the mote user button. The TELOSB mote needs to
+�warmup� before entering into normal operational behaviour, so, the user button is used to start the mote
+operation either by starting to send beacons, in the case of the ZigBee Coordinator, or to associate to a
+network in the case of ZigBee Routers or End Devices.
+In order to test the cluster-tree approach we have forced the association to a specific parent device by
+assigning some static parameters to the device. These parameters are located in the nwk_const.h file under
+the lib.nwk and are the following:
+-TYPE_DEVICE � selecting the role of the device in the network;
+-DEVICE_DEPTH � selecting the depth of the device in the network. This parameter in be used in
+computing the cskip functions used for the address assignment and for the tree-routing. This value
+will also be used to select the appropriate parent selected for the association.
+Depending of the selected depth the device will select the statically defined parent. The parent values are
+assigned in the NLME_NETWORK_DISCOVERY.request primitive.The parents addresses (short address and
+extended address) are defined in the following variables:
+Activated when the device depth is 0x01
+-D1_PAN_EXT0 0x00000001
+-D1_PAN_EXT1 0x00000001
+-D1_PAN_SHORT 0x0000
+Activated when the device depth is 0x02
+-D2_PAN_EXT0 0x00000002
+-D2_PAN_EXT1 0x00000002
+-D2_PAN_SHORT 0x0001
+Activated when the device depth is 0x03
+-D3_PAN_EXT0 0x00000003
+-D3_PAN_EXT1 0x00000003
+-D3_PAN_SHORT 0x0002
+Activated when the device depth is 0x04
+-D4_PAN_EXT0 0x00000006
+-D4_PAN_EXT1 0x00000006
+-D4_PAN_SHORT 0x0022
+In order for a cluster-tree to work properly there is a need to schedule the beacon frames. This is
+done by assigning a time offset to each routers. The device assigned as a ZigBee
+Coordinator will accept the negotiation requests for beacon transmission. Upon the reception of these
+messages the ZC will execute the process_beacon_scheduling function that already has an offset list for each
+device (based on the short address). This function can be replaced with a scheduling algorithm.
+
+More details in http://www.open-zb.net/publications/hurray-tr-070510.pdf
+	
+
diff --git a/tos/lib/net/zigbee/wrapper/WrapperC.nc b/tos/lib/net/zigbee/wrapper/WrapperC.nc
new file mode 100644
index 00000000..6b210a9d
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/WrapperC.nc
@@ -0,0 +1,94 @@
+ /*
+ * 
+ * Wrapper layer to use the TKN 154 MAC
+ * @author: Ricardo Severino <rars@isep.ipp.pt>
+ * ========================================================================
+ */ 
+
+// move to a header file?
+#define WRAPPER_MESSAGE_QUEUE_SIZE 5
+
+configuration WrapperC
+{
+  provides
+  {
+    interface OPENZB_MLME_RESET;
+    interface OPENZB_MLME_START;
+  
+    interface OPENZB_MLME_GET;
+    interface OPENZB_MLME_SET;
+  
+    interface OPENZB_MLME_BEACON_NOTIFY;
+    interface OPENZB_MLME_GTS;
+  
+    interface OPENZB_MLME_ASSOCIATE;
+    interface OPENZB_MLME_DISASSOCIATE;
+  
+    interface OPENZB_MLME_ORPHAN;
+    interface OPENZB_MLME_SYNC;
+    interface OPENZB_MLME_SYNC_LOSS;
+    interface OPENZB_MLME_SCAN;
+    
+    interface OPENZB_MCPS_DATA;
+
+
+  }
+
+}
+
+implementation
+{
+
+  components Ieee802154BeaconEnabledC as MAC; 
+  components WrapperP;
+
+  WrapperP.MLME_RESET -> MAC;
+  WrapperP.MLME_START -> MAC;
+  
+  WrapperP.MLME_GET -> MAC;
+  WrapperP.MLME_SET -> MAC;
+  
+  WrapperP.MLME_BEACON_NOTIFY -> MAC;
+  //WrapperP.MLME_GTS -> MAC;
+  
+  WrapperP.MLME_ASSOCIATE -> MAC;
+  WrapperP.MLME_DISASSOCIATE -> MAC;
+  
+  WrapperP.MLME_ORPHAN -> MAC;
+  WrapperP.MLME_SYNC -> MAC;
+  WrapperP.MLME_SYNC_LOSS -> MAC;
+  WrapperP.MLME_SCAN -> MAC;
+    
+  WrapperP.MCPS_DATA -> MAC;
+  WrapperP.IEEE154Frame -> MAC;
+  WrapperP.IEEE154BeaconFrame -> MAC;
+  WrapperP.Packet -> MAC;
+
+  components new PoolC(message_t, WRAPPER_MESSAGE_QUEUE_SIZE) as MessagePool;
+  WrapperP.MessagePool -> MessagePool;
+
+
+  OPENZB_MLME_RESET = WrapperP;
+  OPENZB_MLME_START = WrapperP;
+
+  OPENZB_MLME_GET = WrapperP;
+  OPENZB_MLME_SET = WrapperP;
+
+  OPENZB_MLME_BEACON_NOTIFY = WrapperP;
+  OPENZB_MLME_GTS = WrapperP;
+
+  OPENZB_MLME_ASSOCIATE = WrapperP;
+  OPENZB_MLME_DISASSOCIATE = WrapperP;
+
+  OPENZB_MLME_ORPHAN = WrapperP;
+  OPENZB_MLME_SYNC = WrapperP;
+  OPENZB_MLME_SYNC_LOSS = WrapperP;
+  OPENZB_MLME_SCAN = WrapperP;
+
+  OPENZB_MCPS_DATA = WrapperP;
+
+
+
+
+
+}
diff --git a/tos/lib/net/zigbee/wrapper/WrapperP.nc b/tos/lib/net/zigbee/wrapper/WrapperP.nc
new file mode 100644
index 00000000..a9ca2c8d
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/WrapperP.nc
@@ -0,0 +1,602 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Date: 2009-09-18 16:41:20 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * @author: Ricardo Severino <rars@isep.ipp.pt>
+ * ========================================================================
+ */
+
+module WrapperP
+{
+  uses {
+    interface MLME_START;
+    interface MLME_SET;
+    interface MLME_GET;
+
+    interface MLME_ASSOCIATE;
+    interface MLME_DISASSOCIATE;
+
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_GTS;
+
+    interface MLME_ORPHAN;
+
+    interface MLME_SYNC;
+    interface MLME_SYNC_LOSS;
+
+    interface MLME_RESET;
+
+    interface MLME_SCAN;
+
+    //MCPS
+    interface MCPS_DATA;
+    interface MCPS_PURGE;
+
+    interface IEEE154Frame;
+    interface IEEE154BeaconFrame;
+    interface Pool<message_t> as MessagePool;
+    interface Packet;
+  }
+
+  provides
+  {
+    interface OPENZB_MLME_RESET;
+    interface OPENZB_MLME_START;
+
+    interface OPENZB_MLME_GET;
+    interface OPENZB_MLME_SET;
+
+    interface OPENZB_MLME_BEACON_NOTIFY;
+    interface OPENZB_MLME_GTS;
+
+    interface OPENZB_MLME_ASSOCIATE;
+    interface OPENZB_MLME_DISASSOCIATE;
+
+    interface OPENZB_MLME_ORPHAN;
+    interface OPENZB_MLME_SYNC;
+    interface OPENZB_MLME_SYNC_LOSS;
+    interface OPENZB_MLME_SCAN;
+
+    interface OPENZB_MCPS_DATA;
+  }
+
+}
+implementation
+{
+
+  /* ----------------------- MLME-RESET ----------------------- */
+
+  command error_t OPENZB_MLME_RESET.request(uint8_t set_default_PIB)
+  {
+    return call MLME_RESET.request(set_default_PIB != 0);
+  }
+
+  event void MLME_RESET.confirm(ieee154_status_t status)
+  {
+    signal OPENZB_MLME_RESET.confirm(status);
+  }
+
+  /* ----------------------- MLME-ASSOCIATE ----------------------- */
+
+  command error_t OPENZB_MLME_ASSOCIATE.request(uint8_t LogicalChannel,uint8_t CoordAddrMode,
+      uint16_t CoordPANId,uint32_t CoordAddress[],uint8_t CapabilityInformation,bool securityenable)
+  {
+    ieee154_CapabilityInformation_t capabilityInformation;
+    ieee154_address_t coordAddress;
+
+    if (securityenable)
+      return IEEE154_UNSUPPORTED_SECURITY;
+    memcpy(&coordAddress, CoordAddress, 8);
+    *((uint8_t*) &capabilityInformation) = CapabilityInformation; // TODO: check
+    return call MLME_ASSOCIATE.request  (
+                          LogicalChannel,
+                          0, // ChannelPage
+                          CoordAddrMode,
+                          CoordPANId,
+                          coordAddress,
+                          capabilityInformation,
+                          NULL //security
+                        );
+  }
+
+  event void MLME_ASSOCIATE.confirm    (
+      uint16_t AssocShortAddress,
+      uint8_t status,
+      ieee154_security_t *security
+      )
+  {
+    signal OPENZB_MLME_ASSOCIATE.confirm(AssocShortAddress, status);
+  }
+
+  command error_t OPENZB_MLME_ASSOCIATE.response(uint32_t DeviceAddress[], 
+      uint16_t AssocShortAddress, uint8_t status, bool securityenable)
+  {
+    uint64_t deviceAddress;
+
+    if (securityenable)
+      return IEEE154_UNSUPPORTED_SECURITY;
+    memcpy(&deviceAddress, DeviceAddress, 8);
+    return call MLME_ASSOCIATE.response  (
+                          deviceAddress,
+                          AssocShortAddress,
+                          status,
+                          NULL //security
+                        );
+  }
+
+  event void MLME_ASSOCIATE.indication (
+      uint64_t DeviceAddress,
+      ieee154_CapabilityInformation_t CapabilityInformation,
+      ieee154_security_t *security
+      )
+  {
+    uint32_t deviceAddress[2];
+    uint8_t capabilityInformation = *((uint8_t*) &CapabilityInformation);
+    memcpy(&DeviceAddress, deviceAddress, 8);
+    signal OPENZB_MLME_ASSOCIATE.indication(
+                          deviceAddress,
+                          capabilityInformation,
+                          FALSE, // SecurityUse
+                          0 //ACLEntry
+        );
+  }
+
+  /* ----------------------- MLME-DISASSOCIATE ----------------------- */
+
+  command error_t OPENZB_MLME_DISASSOCIATE.request(uint32_t DeviceAddress[], 
+      uint8_t disassociate_reason, bool securityenable)
+  {
+    // DeviceAddress is an extended address, c.f. Tab. 37 in 802.15.4-2003 
+    uint16_t panID = call MLME_GET.macPANId();
+    ieee154_address_t deviceAddress;
+    memcpy(&deviceAddress, DeviceAddress, 8);
+    return call MLME_DISASSOCIATE.request(
+                          ADDR_MODE_EXTENDED_ADDRESS, // DeviceAddrMode,
+                          panID,
+                          deviceAddress,
+                          disassociate_reason,
+                          FALSE, // TxIndirect,
+                          NULL // security
+                        );
+
+  }
+
+  event void MLME_DISASSOCIATE.indication (
+      uint64_t DeviceAddress,
+      ieee154_disassociation_reason_t DisassociateReason,
+      ieee154_security_t *security
+      )
+  {
+    uint32_t deviceAddress[2];
+    memcpy(&DeviceAddress, deviceAddress, 8);
+    signal OPENZB_MLME_DISASSOCIATE.indication(
+        deviceAddress, DisassociateReason, 0, 0);
+  }
+
+
+  event void MLME_DISASSOCIATE.confirm    (
+      ieee154_status_t status,
+      uint8_t DeviceAddrMode,
+      uint16_t DevicePANID,
+      ieee154_address_t DeviceAddress
+      )
+  {
+    signal OPENZB_MLME_DISASSOCIATE.confirm(status);
+  }
+
+  /* ----------------------- MLME-START ----------------------- */
+
+  command error_t OPENZB_MLME_START.request(uint32_t PANId, uint8_t LogicalChannel, 
+      uint8_t beacon_order, uint8_t superframe_order,bool pan_coodinator,
+      bool BatteryLifeExtension,bool CoordRealignment,bool securityenable,
+      uint32_t StartTime)
+  {
+    if (securityenable)
+      return IEEE154_UNSUPPORTED_SECURITY;
+    return call MLME_START.request (
+                          PANId,
+                          LogicalChannel,
+                          0, // ChannelPage,
+                          StartTime,
+                          beacon_order,
+                          superframe_order,
+                          pan_coodinator,
+                          BatteryLifeExtension,
+                          CoordRealignment,
+                          NULL, // coordRealignSecurity
+                          NULL  // beaconSecurity
+        );
+  }
+
+  event void MLME_START.confirm    (
+      ieee154_status_t status)
+  {
+    signal OPENZB_MLME_START.confirm(status);
+  }
+
+  /* ----------------------- MLME-SYNC ----------------------- */
+
+  command error_t OPENZB_MLME_SYNC.request(uint8_t logical_channel,uint8_t track_beacon)
+  {
+    return call MLME_SYNC.request(logical_channel, 0, // ChannelPage
+                               track_beacon);
+  }
+
+
+  event void MLME_SYNC_LOSS.indication (
+      ieee154_status_t lossReason,
+      uint16_t PANId,
+      uint8_t LogicalChannel,
+      uint8_t ChannelPage,
+      ieee154_security_t *security
+      )
+  {
+    signal OPENZB_MLME_SYNC_LOSS.indication(lossReason);
+  }
+
+  /* ----------------------- MLME-SCAN ----------------------- */
+
+  enum {
+    NUM_ENERGY_DETECT_LIST_ENTRIES = 16,
+    NUM_PANDESCRIPTOR_LIST_ENTRIES = 16,
+  };
+
+  bool isScanBusy = FALSE;
+  int8_t m_EnergyDetectList[NUM_ENERGY_DETECT_LIST_ENTRIES];
+  ieee154_PANDescriptor_t m_PANDescriptorList[NUM_PANDESCRIPTOR_LIST_ENTRIES];
+
+  command error_t OPENZB_MLME_SCAN.request(uint8_t ScanType, uint32_t ScanChannels, uint8_t ScanDuration)
+  {
+    if (isScanBusy)
+      return IEEE154_TRANSACTION_OVERFLOW;
+    isScanBusy = TRUE;
+    return call MLME_SCAN.request  (
+                          ScanType,
+                          ScanChannels,
+                          ScanDuration,
+                          0, // ChannelPage,
+                          NUM_ENERGY_DETECT_LIST_ENTRIES, // EnergyDetectListNumEntries,
+                          m_EnergyDetectList, // EnergyDetectList,
+                          NUM_PANDESCRIPTOR_LIST_ENTRIES, // PANDescriptorListNumEntries,
+                          m_PANDescriptorList, // PANDescriptorList,
+                          NULL //security
+                        );
+  }
+
+  event void MLME_SCAN.confirm    (
+      ieee154_status_t status,
+      uint8_t ScanType,
+      uint8_t ChannelPage,
+      uint32_t UnscannedChannels,
+      uint8_t EnergyDetectNumResults,
+      int8_t* EnergyDetectList,
+      uint8_t PANDescriptorListNumResults,
+      ieee154_PANDescriptor_t* PANDescriptorList
+      )
+  {
+    uint8_t i;
+    uint8_t numResults = (ScanType == ED_SCAN) ? EnergyDetectNumResults : PANDescriptorListNumResults;
+    SCAN_PANDescriptor pDescriptor[PANDescriptorListNumResults];
+    
+    isScanBusy = FALSE;
+    for (i=0; i<PANDescriptorListNumResults; i++) {
+      pDescriptor[i].CoordPANId = PANDescriptorList[i].CoordPANId;
+      pDescriptor[i].CoordAddress = PANDescriptorList[i].CoordAddress.shortAddress;
+      pDescriptor[i].LogicalChannel = PANDescriptorList[i].LogicalChannel;
+      memcpy(&pDescriptor[i].SuperframeSpec, &PANDescriptorList[i].SuperframeSpec, 2);
+      pDescriptor[i].lqi = PANDescriptorList[i].LinkQuality;
+    }
+    signal OPENZB_MLME_SCAN.confirm(status, ScanType, 
+         UnscannedChannels, numResults, (uint8_t*) EnergyDetectList, pDescriptor);
+  }
+
+  /* ----------------------- MLME-BEACON-NOTIFY ----------------------- */
+
+  enum {
+    MAX_NUM_PENDING_ADDRESSES = 10,
+  };
+
+  void convertPANDescriptor(ieee154_PANDescriptor_t* PANDescriptorTKN154, PANDescriptor *PANDescriptorOPENZB)
+  {
+    PANDescriptorOPENZB->CoordAddrMode = PANDescriptorTKN154->CoordAddrMode;
+    PANDescriptorOPENZB->CoordPANId = PANDescriptorTKN154->CoordPANId;
+    memcpy(&PANDescriptorOPENZB->CoordAddress0, &PANDescriptorTKN154->CoordAddress, 4);
+    memcpy(&PANDescriptorOPENZB->CoordAddress1, ((uint8_t*) &PANDescriptorTKN154->CoordAddress) + 4, 4);
+    PANDescriptorOPENZB->LogicalChannel = PANDescriptorTKN154->LogicalChannel;
+    memcpy(&PANDescriptorOPENZB->SuperframeSpec, &PANDescriptorTKN154->SuperframeSpec, 2);
+    PANDescriptorOPENZB->GTSPermit = PANDescriptorTKN154->GTSPermit;
+    PANDescriptorOPENZB->LinkQuality = PANDescriptorTKN154->LinkQuality;
+    PANDescriptorOPENZB->TimeStamp = PANDescriptorTKN154->TimeStamp;
+    PANDescriptorOPENZB->SecurityUse = 0;
+    PANDescriptorOPENZB->ACLEntry = 0;
+    PANDescriptorOPENZB->SecurityFailure = FALSE;
+  }
+
+  event message_t* MLME_BEACON_NOTIFY.indication ( message_t *beaconFrame )
+  {
+    uint8_t sdu[call IEEE154BeaconFrame.getBeaconPayloadLength(beaconFrame)];
+    uint8_t sduLength = call IEEE154BeaconFrame.getBeaconPayloadLength(beaconFrame);
+    uint8_t BSN = call IEEE154BeaconFrame.getBSN(beaconFrame);
+    ieee154_PANDescriptor_t PANDescriptorTKN154;
+    PANDescriptor PANDescriptorOPENZB; 
+    uint8_t PenAddrSpec;
+    ieee154_address_t buffer[MAX_NUM_PENDING_ADDRESSES];
+
+    call IEEE154BeaconFrame.getPendAddr(beaconFrame, ADDR_MODE_SHORT_ADDRESS, buffer, MAX_NUM_PENDING_ADDRESSES);
+    call IEEE154BeaconFrame.getPendAddrSpec(beaconFrame, &PenAddrSpec);
+    memcpy(sdu, call IEEE154BeaconFrame.getBeaconPayload(beaconFrame), sduLength);
+    call IEEE154BeaconFrame.parsePANDescriptor(beaconFrame, call MLME_GET.phyCurrentChannel(), 0, &PANDescriptorTKN154);
+    convertPANDescriptor(&PANDescriptorTKN154, &PANDescriptorOPENZB);
+    signal OPENZB_MLME_BEACON_NOTIFY.indication(
+      BSN, PANDescriptorOPENZB, PenAddrSpec, 
+      0, //TODO: this should be a list of device addresses -> wrong data type in the OpenZB interfaces 
+      sduLength, sdu);
+    return beaconFrame;
+  }
+
+  /* ----------------------- MLME-ORPHAN ----------------------- */
+
+  event void MLME_ORPHAN.indication (
+      uint64_t OrphanAddress,
+      ieee154_security_t *security
+      )
+  {
+    uint32_t orphanAddress[1]; // TODO: this should be 64 bit
+    memcpy(orphanAddress, &OrphanAddress, 4);
+    signal OPENZB_MLME_ORPHAN.indication(orphanAddress, 
+        0, // SecurityUse, 
+        0 // ACLEntry
+        );
+  }
+  
+  command error_t OPENZB_MLME_ORPHAN.response(uint32_t OrphanAddress[1],
+      uint16_t ShortAddress,uint8_t AssociatedMember, uint8_t security_enabled)
+  {
+    uint64_t orphanAddress;
+    if (security_enabled)
+      return IEEE154_UNSUPPORTED_SECURITY;
+    memcpy(&orphanAddress, OrphanAddress, 4); // see comment above
+    return call MLME_ORPHAN.response (
+                          orphanAddress,
+                          ShortAddress,
+                          AssociatedMember,
+                          0 // security
+                        );
+  }
+
+  /* ----------------------- MLME-GTS ----------------------- */
+
+  command error_t OPENZB_MLME_GTS.request(uint8_t GTSCharacteristics, bool security_enable)
+  {
+    if (security_enable)
+      return IEEE154_UNSUPPORTED_SECURITY;
+    return call MLME_GTS.request( GTSCharacteristics, 
+                          NULL //security
+                        );
+  }
+
+  event void MLME_GTS.confirm    (
+      uint8_t GtsCharacteristics,
+      ieee154_status_t status
+      )
+  {
+    signal OPENZB_MLME_GTS.confirm( GtsCharacteristics, status);
+  }
+
+  event void MLME_GTS.indication (
+      uint16_t DeviceAddress,
+      uint8_t GtsCharacteristics,
+      ieee154_security_t *security
+      )
+  {
+    signal OPENZB_MLME_GTS.indication(DeviceAddress, 
+        GtsCharacteristics, 
+        0, // SecurityUse
+        0 // ACLEntry
+        );
+  }
+
+  /* ----------------------- MCPS-DATA ----------------------- */
+
+  command error_t OPENZB_MCPS_DATA.request(uint8_t SrcAddrMode, uint16_t SrcPANId, 
+      uint32_t SrcAddr[], uint8_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[], 
+      uint8_t msduLength, uint8_t msdu[],uint8_t msduHandle, uint8_t TxOptions)
+  {
+    // note: in 802.15.4-2006 SrcAddr/SrcPANId is not explicitly passed anymore
+    // (they are read by the MAC from the Pib)
+    ieee154_status_t status;
+    message_t *frame = call MessagePool.get();
+    ieee154_address_t dstAddr;
+    uint8_t *payload;
+
+    if (frame == NULL)
+      return IEEE154_TRANSACTION_OVERFLOW;
+    payload = call Packet.getPayload(frame, msduLength);
+    if (payload == NULL || msduLength > call Packet.maxPayloadLength()){
+      call MessagePool.put(frame);
+      return IEEE154_FRAME_TOO_LONG;
+    }
+    memcpy(payload, msdu, msduLength);
+    memcpy(&dstAddr, DstAddr, 8);
+    call IEEE154Frame.setAddressingFields(frame,
+                          SrcAddrMode,
+                          DstAddrMode,
+                          DestPANId,
+                          &dstAddr,
+                          NULL //security
+                          );
+    status = call MCPS_DATA.request (
+                          frame,
+                          msduLength,
+                          msduHandle,
+                          TxOptions
+                        ); 
+    if (status != IEEE154_SUCCESS)
+      call MessagePool.put(frame);
+    return status;   
+  }
+
+  event void MCPS_DATA.confirm    (  
+      message_t *frame,
+      uint8_t msduHandle,
+      ieee154_status_t status,
+      uint32_t Timestamp
+      )
+  {
+    signal OPENZB_MCPS_DATA.confirm(msduHandle, status);
+  }
+
+  event message_t* MCPS_DATA.indication ( message_t* frame )
+  {
+    uint16_t SrcAddrMode = call IEEE154Frame.getSrcAddrMode(frame);
+    uint16_t SrcPANId;
+    uint16_t DstAddrMode = call IEEE154Frame.getDstAddrMode(frame);
+    uint16_t DestPANId;
+    uint16_t msduLength = call IEEE154Frame.getPayloadLength(frame);
+    uint16_t mpduLinkQuality = call IEEE154Frame.getLinkQuality(frame);
+    uint16_t SecurityUse = 0;
+    uint16_t ACLEntry = 0;
+    uint8_t *payload = call IEEE154Frame.getPayload(frame);
+
+    ieee154_address_t srcAddr;
+    ieee154_address_t dstAddr;
+    uint32_t SrcAddr[2];
+    uint32_t DstAddr[2];
+    uint8_t msdu[100];
+
+    if (msduLength > 100)
+      return frame; // TODO: msdu should probably not an array
+    call IEEE154Frame.getSrcPANId(frame, &SrcPANId);
+    call IEEE154Frame.getDstPANId(frame, &DestPANId);
+    call IEEE154Frame.getSrcAddr(frame, &srcAddr);   
+    call IEEE154Frame.getDstAddr(frame, &dstAddr);
+    memcpy(msdu, payload, msduLength);
+    memcpy(SrcAddr, &srcAddr, 8);
+    memcpy(DstAddr, &dstAddr, 8);
+    signal OPENZB_MCPS_DATA.indication(SrcAddrMode, SrcPANId, SrcAddr, 
+        DstAddrMode, DestPANId, DstAddr, msduLength, 
+        msdu, mpduLinkQuality,  SecurityUse,  ACLEntry);
+    return frame;
+  }
+
+  /* ----------------------- MLME-SET/GET ----------------------- */
+
+  command error_t OPENZB_MLME_GET.request(uint8_t PIBAttribute)
+  {
+    uint8_t v[8];
+    switch (PIBAttribute)
+    {
+      case 0x41: { ieee154_macAssociationPermit_t x = call MLME_GET.macAssociationPermit(); memcpy(v, &x, sizeof(ieee154_macAssociationPermit_t)); break;}
+      case 0x42: { ieee154_macAutoRequest_t x = call MLME_GET.macAutoRequest(); memcpy(v, &x, sizeof(ieee154_macAutoRequest_t)); break;}
+      case 0x43: { ieee154_macBattLifeExt_t x = call MLME_GET.macBattLifeExt(); memcpy(v, &x, sizeof(ieee154_macBattLifeExt_t)); break;}
+      case 0x4D: { ieee154_macGTSPermit_t x = call MLME_GET.macGTSPermit(); memcpy(v, &x, sizeof(ieee154_macGTSPermit_t)); break;}
+      case 0x51: { ieee154_macPromiscuousMode_t x = call MLME_GET.macPromiscuousMode(); memcpy(v, &x, sizeof(ieee154_macPromiscuousMode_t)); break;}
+      case 0x52: { ieee154_macRxOnWhenIdle_t x = call MLME_GET.macRxOnWhenIdle(); memcpy(v, &x, sizeof(ieee154_macRxOnWhenIdle_t)); break;}
+      case 0x56: { ieee154_macAssociatedPANCoord_t x = call MLME_GET.macAssociatedPANCoord(); memcpy(v, &x, sizeof(ieee154_macAssociatedPANCoord_t)); break;}
+      case 0x5D: { ieee154_macSecurityEnabled_t x = call MLME_GET.macSecurityEnabled(); memcpy(v, &x, sizeof(ieee154_macSecurityEnabled_t)); break;}
+      case 0x00: { ieee154_phyCurrentChannel_t x = call MLME_GET.phyCurrentChannel(); memcpy(v, &x, sizeof(ieee154_phyCurrentChannel_t)); break;}
+      case 0x02: { ieee154_phyTransmitPower_t x = call MLME_GET.phyTransmitPower(); memcpy(v, &x, sizeof(ieee154_phyTransmitPower_t)); break;}
+      case 0x03: { ieee154_phyCCAMode_t x = call MLME_GET.phyCCAMode(); memcpy(v, &x, sizeof(ieee154_phyCCAMode_t)); break;}
+      case 0x04: { ieee154_phyCurrentPage_t x = call MLME_GET.phyCurrentPage(); memcpy(v, &x, sizeof(ieee154_phyCurrentPage_t)); break;}
+      case 0x44: { ieee154_macBattLifeExtPeriods_t x = call MLME_GET.macBattLifeExtPeriods(); memcpy(v, &x, sizeof(ieee154_macBattLifeExtPeriods_t)); break;}
+      case 0x47: { ieee154_macBeaconOrder_t x = call MLME_GET.macBeaconOrder(); memcpy(v, &x, sizeof(ieee154_macBeaconOrder_t)); break;}
+      case 0x49: { ieee154_macBSN_t x = call MLME_GET.macBSN(); memcpy(v, &x, sizeof(ieee154_macBSN_t)); break;}
+      case 0x4C: { ieee154_macDSN_t x = call MLME_GET.macDSN(); memcpy(v, &x, sizeof(ieee154_macDSN_t)); break;}
+      case 0x4E: { ieee154_macMaxCSMABackoffs_t x = call MLME_GET.macMaxCSMABackoffs(); memcpy(v, &x, sizeof(ieee154_macMaxCSMABackoffs_t)); break;}
+      case 0x4F: { ieee154_macMinBE_t x = call MLME_GET.macMinBE(); memcpy(v, &x, sizeof(ieee154_macMinBE_t)); break;}
+      case 0x54: { ieee154_macSuperframeOrder_t x = call MLME_GET.macSuperframeOrder(); memcpy(v, &x, sizeof(ieee154_macSuperframeOrder_t)); break;}
+      case 0x57: { ieee154_macMaxBE_t x = call MLME_GET.macMaxBE(); memcpy(v, &x, sizeof(ieee154_macMaxBE_t)); break;}
+      case 0x59: { ieee154_macMaxFrameRetries_t x = call MLME_GET.macMaxFrameRetries(); memcpy(v, &x, sizeof(ieee154_macMaxFrameRetries_t)); break;}
+      case 0x5a: { ieee154_macResponseWaitTime_t x = call MLME_GET.macResponseWaitTime(); memcpy(v, &x, sizeof(ieee154_macResponseWaitTime_t)); break;}
+      case 0x4B: { ieee154_macCoordShortAddress_t x = call MLME_GET.macCoordShortAddress(); memcpy(v, &x, sizeof(ieee154_macCoordShortAddress_t)); break;}
+      case 0x50: { ieee154_macPANId_t x = call MLME_GET.macPANId(); memcpy(v, &x, sizeof(ieee154_macPANId_t)); break;}
+      case 0x53: { ieee154_macShortAddress_t x = call MLME_GET.macShortAddress(); memcpy(v, &x, sizeof(ieee154_macShortAddress_t)); break;}
+      case 0x55: { ieee154_macTransactionPersistenceTime_t x = call MLME_GET.macTransactionPersistenceTime(); memcpy(v, &x, sizeof(ieee154_macTransactionPersistenceTime_t)); break;}
+      case 0x58: { ieee154_macMaxFrameTotalWaitTime_t x = call MLME_GET.macMaxFrameTotalWaitTime(); memcpy(v, &x, sizeof(ieee154_macMaxFrameTotalWaitTime_t)); break;}
+      case 0x48: { ieee154_macBeaconTxTime_t x = call MLME_GET.macBeaconTxTime(); memcpy(v, &x, sizeof(ieee154_macBeaconTxTime_t)); break;}
+      case 0x4A: { ieee154_macCoordExtendedAddress_t x = call MLME_GET.macCoordExtendedAddress(); memcpy(v, &x, sizeof(ieee154_macCoordExtendedAddress_t)); break;}
+      case 0x46: // macBeaconPayloadLength is set through the IEEE154TxBeaconPayload interface
+                 // fall through
+      default: return IEEE154_UNSUPPORTED_ATTRIBUTE;
+    }
+    signal OPENZB_MLME_GET.confirm(IEEE154_SUCCESS, PIBAttribute, v);
+    return IEEE154_SUCCESS;
+  }
+
+  command error_t OPENZB_MLME_SET.request(uint8_t PIBAttribute,uint8_t PIBAttributeValue[])
+  {
+    ieee154_status_t status;
+    switch (PIBAttribute)
+    {
+      case 0x41: status = call MLME_SET.macAssociationPermit(*((ieee154_macAssociationPermit_t*) PIBAttributeValue)); break;
+      case 0x42: status = call MLME_SET.macAutoRequest(*((ieee154_macAutoRequest_t*) PIBAttributeValue)); break;
+      case 0x43: status = call MLME_SET.macBattLifeExt(*((ieee154_macBattLifeExt_t*) PIBAttributeValue)); break;
+      case 0x4D: status = call MLME_SET.macGTSPermit(*((ieee154_macGTSPermit_t*) PIBAttributeValue)); break;
+      case 0x52: status = call MLME_SET.macRxOnWhenIdle(*((ieee154_macRxOnWhenIdle_t*) PIBAttributeValue)); break;
+      case 0x56: status = call MLME_SET.macAssociatedPANCoord(*((ieee154_macAssociatedPANCoord_t*) PIBAttributeValue)); break;
+      case 0x5D: status = call MLME_SET.macSecurityEnabled(*((ieee154_macSecurityEnabled_t*) PIBAttributeValue)); break;
+      case 0x00: status = call MLME_SET.phyCurrentChannel(*((ieee154_phyCurrentChannel_t*) PIBAttributeValue)); break;
+      case 0x02: status = call MLME_SET.phyTransmitPower(*((ieee154_phyTransmitPower_t*) PIBAttributeValue)); break;
+      case 0x03: status = call MLME_SET.phyCCAMode(*((ieee154_phyCCAMode_t*) PIBAttributeValue)); break;
+      case 0x04: status = call MLME_SET.phyCurrentPage(*((ieee154_phyCurrentPage_t*) PIBAttributeValue)); break;
+      case 0x44: status = call MLME_SET.macBattLifeExtPeriods(*((ieee154_macBattLifeExtPeriods_t*) PIBAttributeValue)); break;
+      case 0x47: status = call MLME_SET.macBeaconOrder(*((ieee154_macBeaconOrder_t*) PIBAttributeValue)); break;
+      case 0x49: status = call MLME_SET.macBSN(*((ieee154_macBSN_t*) PIBAttributeValue)); break;
+      case 0x4C: status = call MLME_SET.macDSN(*((ieee154_macDSN_t*) PIBAttributeValue)); break;
+      case 0x4E: status = call MLME_SET.macMaxCSMABackoffs(*((ieee154_macMaxCSMABackoffs_t*) PIBAttributeValue)); break;
+      case 0x4F: status = call MLME_SET.macMinBE(*((ieee154_macMinBE_t*) PIBAttributeValue)); break;
+      case 0x57: status = call MLME_SET.macMaxBE(*((ieee154_macMaxBE_t*) PIBAttributeValue)); break;
+      case 0x59: status = call MLME_SET.macMaxFrameRetries(*((ieee154_macMaxFrameRetries_t*) PIBAttributeValue)); break;
+      case 0x5a: status = call MLME_SET.macResponseWaitTime(*((ieee154_macResponseWaitTime_t*) PIBAttributeValue)); break;
+      case 0x4B: status = call MLME_SET.macCoordShortAddress(*((ieee154_macCoordShortAddress_t*) PIBAttributeValue)); break;
+      case 0x50: status = call MLME_SET.macPANId(*((ieee154_macPANId_t*) PIBAttributeValue)); break;
+      case 0x53: status = call MLME_SET.macShortAddress(*((ieee154_macShortAddress_t*) PIBAttributeValue)); break;
+      case 0x55: status = call MLME_SET.macTransactionPersistenceTime(*((ieee154_macTransactionPersistenceTime_t*) PIBAttributeValue)); break;
+      case 0x58: status = call MLME_SET.macMaxFrameTotalWaitTime(*((ieee154_macMaxFrameTotalWaitTime_t*) PIBAttributeValue)); break;
+      case 0x4A: status = call MLME_SET.macCoordExtendedAddress(*((ieee154_macCoordExtendedAddress_t*) PIBAttributeValue)); break;
+      case 0x48: // macBeaconTxTime  is read-only
+                 // fall through
+      case 0x54: // macSuperframeOrder is read-only
+                 // fall through
+      case 0x46: // macBeaconPayloadLength is set through the IEEE154TxBeaconPayload interface
+                 // fall through
+      case 0x51: // macPromiscousMode is set through a SplitControl
+                 // fall through
+      default: status = IEEE154_UNSUPPORTED_ATTRIBUTE; break;
+    }   
+    if (status == IEEE154_SUCCESS)
+      signal OPENZB_MLME_SET.confirm(status, PIBAttribute);
+    return status;
+  }
+}
+
+
+
+
diff --git a/tos/lib/net/zigbee/wrapper/includes/frame_format.h b/tos/lib/net/zigbee/wrapper/includes/frame_format.h
new file mode 100644
index 00000000..b8ddb79f
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/includes/frame_format.h
@@ -0,0 +1,220 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author open-zb http://www.open-zb.net
+ * @author Andre Cunha
+ */
+
+//MAC frame Superstructure
+
+#ifndef __FRAME_FORMAT__
+#define __FRAME_FORMAT__
+
+
+#define MPDU_HEADER_LEN 5
+
+typedef struct MPDU
+{
+	uint8_t length;
+	//info on frame type/ack/etc
+	uint8_t frame_control1;
+	//info on addressing fields
+	uint8_t frame_control2;
+	//uint16_t frame_control;
+	uint8_t seq_num;
+	uint8_t data[120];
+}MPDU;
+
+typedef struct MPDUBuffer
+{
+	uint8_t length;
+	//uint16_t frame_control;
+	uint8_t frame_control1;
+	uint8_t frame_control2;
+	uint8_t seq_num;
+	uint8_t data[120];
+	uint8_t retransmission;
+	uint8_t indirect;
+}MPDUBuffer;
+
+//PD_DATA validation structures
+
+
+
+/*****************************************************/
+/*				BEACON FRAME SCTRUCTURES			 */
+/*****************************************************/
+
+//#define beacon_addr_short_length 7
+//#define beacon_addr_long_length 12
+
+
+typedef struct beacon_addr_short
+{
+	uint16_t destination_PAN_identifier;
+	uint16_t destination_address;
+	uint16_t source_address;
+	uint16_t superframe_specification;
+}beacon_addr_short;
+/*
+typedef struct beacon_struct
+{
+	uint8_t length;
+	uint16_t frame_control;
+	uint8_t seq_num;
+	uint16_t source_PAN_identifier;
+	uint16_t destination_address;
+	uint16_t source_address;
+	uint16_t superframe_specification;
+}beacon_struct;
+*/
+/*
+typedef struct beacon_addr_long
+{
+	uint16_t source_PAN_identifier;
+	uint32_t source_address0;
+	uint32_t source_address1;
+	uint16_t superframe_specification;
+}beacon_addr_long;
+*/
+/*****************************************************/
+/*				ACK FRAME Structures 				 */
+/*****************************************************/
+
+typedef struct ACK
+{
+	uint8_t length;
+	uint8_t frame_control1;
+	uint8_t frame_control2;
+	//uint16_t frame_control;
+	uint8_t seq_num;
+}ACK;
+
+/*****************************************************/
+/*				COMMAND FRAME Structures 			 */
+/*****************************************************/
+
+typedef struct cmd_association_request
+{
+	uint8_t command_frame_identifier;
+	uint8_t capability_information;
+}cmd_association_request;
+
+typedef struct cmd_association_response
+{
+	uint8_t command_frame_identifier;
+	uint8_t short_address1;
+	uint8_t short_address2;
+	//uint16_t short_address;
+	uint8_t association_status;
+}cmd_association_response;
+
+//disassociacion notification command structure pag. 126
+typedef struct cmd_disassociation_notification
+{
+	uint16_t destination_PAN_identifier;
+	uint32_t destination_address0;
+	uint32_t destination_address1;
+	uint16_t source_PAN_identifier;
+	uint32_t source_address0;
+	uint32_t source_address1;
+	uint8_t command_frame_identifier;
+	uint8_t disassociation_reason;
+}cmd_disassociation_notification;
+
+//pag 130
+typedef struct cmd_beacon_request
+{
+	uint16_t destination_PAN_identifier;
+	uint16_t destination_address;
+	uint8_t command_frame_identifier;
+}cmd_beacon_request;
+
+
+//pag 132
+typedef struct cmd_gts_request
+{
+	uint16_t source_PAN_identifier;
+	uint16_t source_address;
+	uint8_t command_frame_identifier;
+	uint8_t gts_characteristics;
+}cmd_gts_request;
+
+typedef struct cmd_default
+{
+	uint8_t command_frame_identifier;
+}cmd_default;
+
+
+//131
+typedef struct cmd_coord_realignment
+{
+	uint8_t command_frame_identifier;
+	uint8_t PAN_identifier0;
+	uint8_t PAN_identifier1;
+	uint8_t coordinator_short_address0;
+	uint8_t coordinator_short_address1;
+	
+	/*
+	uint16_t PAN_identifier;
+	uint16_t coordinator_short_address;
+	*/
+	uint8_t logical_channel;
+	uint16_t short_address;
+}cmd_coord_realignment;
+
+
+
+/*******************************************************/
+/*     			ADDRESSING FIELDS ONLY				   */
+/*******************************************************/
+#define DEST_SHORT_LEN 4
+#define DEST_LONG_LEN 10
+#define INTRA_PAN_SOURCE_SHORT_LEN 2
+#define INTRA_PAN_SOURCE_LONG_LEN 8
+#define SOURCE_SHORT_LEN 4
+#define SOURCE_LONG_LEN 10
+
+
+//DESTINATION
+typedef struct dest_short
+{
+	uint16_t destination_PAN_identifier;
+	uint16_t destination_address;
+}dest_short;
+
+typedef struct dest_long
+{
+	uint16_t destination_PAN_identifier;
+	uint32_t destination_address0;
+	uint32_t destination_address1;
+}dest_long;
+
+//SOURCE
+typedef struct intra_pan_source_short
+{
+	uint16_t source_address;
+}intra_pan_source_short;
+
+typedef struct intra_pan_source_long
+{
+	uint32_t source_address0;
+	uint32_t source_address1;
+}intra_pan_source_long;
+
+
+typedef struct source_short
+{
+	uint16_t source_PAN_identifier;
+	uint16_t source_address;
+}source_short;
+
+
+typedef struct source_long
+{
+	uint16_t source_PAN_identifier;
+	uint32_t source_address0;
+	uint32_t source_address1;
+}source_long;
+
+#endif
+
diff --git a/tos/lib/net/zigbee/wrapper/includes/mac_const.h b/tos/lib/net/zigbee/wrapper/includes/mac_const.h
new file mode 100644
index 00000000..8c61d05a
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/includes/mac_const.h
@@ -0,0 +1,225 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author open-zb http://www.open-zb.net
+ * @author Andre Cunha
+ */
+
+// The MAC constants are defined in here.
+// Notice that these makes use of the PHY constants.
+//pag 134
+
+#ifndef __MAC_CONST__
+#define __MAC_CONST__
+
+
+#define aBaseSlotDuration          60
+#define aBaseSuperframeDuration    960 //aBaseSlotDuration*aNumSuperframeSlots
+
+//#define aExtendedAddress         // This should be defined by the device!
+
+#define aMaxBE                     5 //CSMA-CA
+
+#define aMaxBeaconOverhead         75
+#define aMaxBeaconPayloadLength    aMaxPHYPacketSize-aMaxBeaconOverhead
+#define aGTSDescPersistenceTime    4
+#define aMaxFrameOverhead          25
+#define aMaxFrameResponseTime      1220
+#define aMaxFrameRetries           1
+
+//(SYNC)number of beacons lost before sending a Beacon-Lost indication
+#define aMaxLostBeacons            4
+#define aMaxMACFrameSize           aMaxPHYPacketSize-aMaxFrameOverhead
+#define aMaxSIFSFrameSize          18
+#define aMinCAPLength              440
+#define aMinLIFSPeriod             40
+#define aMinSIFSPeriod             12
+#define aNumSuperframeSlots        16
+#define aResponseWaitTime          32*aBaseSuperframeDuration
+#define aUnitBackoffPeriod         20
+
+
+#define TYPE_BEACON 0
+#define TYPE_DATA 1
+#define TYPE_ACK 2
+#define TYPE_CMD 3
+
+#define SHORT_ADDRESS 2
+#define LONG_ADDRESS 3
+#define RESERVED_ADDRESS 1
+
+#define NUMBER_TIME_SLOTS 16
+
+#define ACK_LENGTH 5
+
+//buffer sizes
+#define MAX_GTS_BUFFER 7
+
+//#define MAX_GTS_PEND 2
+//#define MAX_GTS_IN_SLOT 1
+
+#define INDIRECT_BUFFER_SIZE 2
+#define RECEIVE_BUFFER_SIZE 4
+#define SEND_BUFFER_SIZE 3
+
+#define UPSTREAM_BUFFER_SIZE 3
+
+#define GTS_SEND_BUFFER_SIZE 3
+
+#define BACKOFF_PERIOD_MS 0.34724
+#define BACKOFF_PERIOD_US 347.24
+
+//value of each symbol in us
+#define EFFECTIVE_SYMBOL_VALUE 17.362
+
+// MAC PIB attribute
+typedef struct
+{
+	//pag 135
+	uint8_t macAckWaitDuration;
+	bool macAssociationPermit;//FDD
+	bool macAutoRequest;
+	bool macBattLifeExt;
+	uint8_t macBattLifeExtPeriods;
+	
+	uint8_t macBeaconPayload[aMaxBeaconPayloadLength];//FDD
+	
+	uint8_t macBeaconPayloadLenght;//FDD
+	uint8_t macBeaconOrder;//FDD
+	
+	uint32_t macBeaconTxTime;//FDD
+	uint8_t macBSN;//FDD
+	uint32_t macCoordExtendedAddress0;
+	uint32_t macCoordExtendedAddress1;
+	uint16_t macCoordShortAddress;
+	uint8_t macDSN;
+	bool macGTSPermit;//FDD
+	uint8_t macMaxCSMABackoffs;
+	uint8_t macMinBE;
+	uint16_t macPANId;
+	bool macPromiscuousMode;//FDD
+	bool macRxOnWhenIdle;
+	uint32_t macShortAddress;
+	uint8_t macSuperframeOrder;//FDD
+	uint32_t macTransactionPersistenceTime;//FDD
+	
+} macPIB;
+
+// MAC PIB security ACL entry descriptor
+typedef struct
+{
+	uint32_t ACLExtendedAddress[2];
+	uint16_t ACLShortAddress;
+	uint16_t ACLPANId;
+	uint8_t ACLSecurityMaterialLength;
+	//variable string
+	uint8_t ACLSecurityMaterial;
+	uint8_t ACLSecuritySuite;
+	
+}ACLDescriptor;
+
+// MAC PIB security attribute
+typedef struct
+{
+	//pag 138
+	ACLDescriptor macACLEntryDescriptorSet;
+	uint8_t macACLEntryDescriptorSetSize;
+	bool macDefaultSecurity;
+	uint8_t macDefaultSecurityMaterialLength;
+	//variable string
+	uint8_t macDefaultSecurityMaterial;
+	uint8_t macDefaultSecuritySuite;
+	uint8_t macSecurityMode;
+	
+}macPIBsec;
+
+//MAC PANDescriptor
+typedef struct
+{
+	//pag76
+	uint8_t CoordAddrMode;
+	uint16_t CoordPANId;
+	uint32_t CoordAddress0;
+	uint32_t CoordAddress1;
+	uint8_t LogicalChannel;
+	//superframe specification field
+	uint16_t SuperframeSpec;
+	bool GTSPermit;
+	uint8_t LinkQuality;
+	uint32_t TimeStamp;
+	bool SecurityUse;
+	uint8_t ACLEntry;
+	bool SecurityFailure;
+
+}PANDescriptor;
+
+//GTS entry (used in the PAN coordinator)
+typedef struct
+{
+	uint8_t gts_id;
+	uint8_t starting_slot;
+	uint8_t length;
+	uint8_t direction;
+	uint16_t DevAddressType;
+	uint8_t expiration;
+
+}GTSinfoEntryType;
+
+//GTS entry (used in the PAN coordinator)
+typedef struct
+{
+	uint8_t gts_id;
+	uint8_t starting_slot;
+	uint8_t length;
+	uint16_t DevAddressType;
+	uint8_t persistencetime;
+
+}GTSinfoEntryType_null;
+
+typedef struct
+{
+	uint8_t handler;
+	uint16_t transaction_persistent_time;
+	
+	//MPDU frame;
+	uint8_t frame[127];
+
+}indirect_transmission_element;
+
+typedef struct gts_slot_element
+{
+	uint8_t element_count;
+	uint8_t element_in;
+	uint8_t element_out;
+	uint8_t gts_send_frame_index[GTS_SEND_BUFFER_SIZE];
+
+}gts_slot_element;
+
+
+typedef struct time_stamp32
+{
+
+uint32_t time_stamp;
+
+}time_stamp32;
+
+typedef struct time_stamp16
+{
+
+uint16_t time_stamp;
+
+}time_stamp16;
+
+//MAC ACTIVE CHANNEL SCAN REDUCED PAN DESCRIPTOR (SHOR ADDRESS ONLY)
+typedef struct SCAN_PANDescriptor
+{
+	//pag76
+	uint16_t CoordPANId;
+	uint16_t CoordAddress;
+	uint8_t LogicalChannel;
+	//superframe specification field
+	uint16_t SuperframeSpec;
+	uint8_t lqi;
+}SCAN_PANDescriptor;
+
+
+#endif
diff --git a/tos/lib/net/zigbee/wrapper/includes/mac_enumerations.h b/tos/lib/net/zigbee/wrapper/includes/mac_enumerations.h
new file mode 100644
index 00000000..afde5450
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/includes/mac_enumerations.h
@@ -0,0 +1,118 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author open-zb http://www.open-zb.net
+ * @author Andre Cunha
+ */
+ 
+#ifndef __MAC_ENUMERATIONS__
+#define __MAC_ENUMERATIONS__
+
+#include "TKN154.h"
+ 
+//Mac enumerations standard pag 110
+
+enum { 
+		MAC_SUCCESS = 0x00,
+        MAC_BEACON_LOSS = 0xE0,
+        MAC_CHANNEL_ACCESS_FAILURE = 0xE1,
+        MAC_DENIED = 0xE2,
+		//MLME-RESET
+        MAC_DISABLE_TRX_FAILURE = 0xE3,
+        MAC_FAILED_SECURITY_CHECK = 0xE4,
+        MAC_FRAME_TOO_LONG = 0xE5,
+        MAC_INVALID_GTS = 0xE6,
+        MAC_INVALID_HANDLE = 0xE7,
+        MAC_INVALID_PARAMETER = 0xE8,
+        MAC_NO_ACK = 0xE9,
+        MAC_NO_BEACON = 0xEA,
+        MAC_NO_DATA = 0xEB,
+        MAC_NO_SHORT_ADDRESS = 0xEC,
+        MAC_OUT_OF_CAP = 0xED,
+        MAC_PAN_ID_CONFLICT = 0xEE,
+        MAC_REALIGNMENT = 0xEF,
+        MAC_TRANSACTION_EXPIRED = 0xF0,
+        MAC_TRANSACTION_OVERFLOW = 0xF1,
+        MAC_TX_ACTIVE = 0xF2,
+        MAC_UNAVAILABLE_KEY = 0xF3,
+        MAC_UNSUPPORTED_ATTRIBUTE = 0xF4
+        };
+
+
+
+//mac dissassociation enums
+enum{
+		MAC_PAN_COORD_LEAVE = 0x01,
+        MAC_PAN_DEVICE_LEAVE = 0x02,
+
+};
+
+
+
+//mac commands enums
+enum {
+
+	CMD_ASSOCIATION_REQUEST = 0x01,
+	CMD_ASSOCIATION_RESPONSE = 0x02,
+	CMD_DISASSOCIATION_NOTIFICATION = 0x03,
+	CMD_DATA_REQUEST = 0x04,
+	CMD_PANID_CONFLICT = 0x05,
+	CMD_ORPHAN_NOTIFICATION = 0x06,
+	CMD_BEACON_REQUEST = 0x07,
+	CMD_COORDINATOR_REALIGNMENT = 0x08,
+	CMD_GTS_REQUEST = 0x09
+};
+
+
+//mac association responses
+enum {
+
+	CMD_RESP_ASSOCIATION_SUCCESSFUL = 0x00,
+	CMD_RESP_PAN_CAPACITY =0x01,
+	CMD_RESP_ACCESS_DENIED =0x02
+	
+};
+
+//MAC PIB Enumeration
+enum {
+
+	MACACKWAITDURATION = 0x40,
+	MACASSOCIATIONPERMIT=0x41,
+	MACAUTOREQUEST = 0x42,
+	MACBATTLIFEEXT=0x43,
+	MACBATTLIFEEXTPERIODS=0x44,
+	MACBEACONPAYLOAD=0x45,
+	MACMAXBEACONPAYLOADLENGTH=0x46,
+	MACBEACONORDER=0x47,
+	MACBEACONTXTIME=0x48,
+	MACBSN=0x49,
+	MACCOORDEXTENDEDADDRESS=0x4a,
+	MACCOORDSHORTADDRESS=0x4b,
+	MACDSN=0x4c,
+	MACGTSPERMIT=0x4d,
+	MACMAXCSMABACKOFFS=0x4e,
+	MACMINBE=0x4f,
+	MACPANID=0x50,
+	MACPROMISCUOUSMODE=0x51,
+	MACRXONWHENIDLE=0x52,
+	MACSHORTADDRESS=0x53,
+	MACSUPERFRAMEORDER=0x54,
+	MACTRANSACTIONPERSISTENCETIME=0x55
+
+};
+
+//gts enumerations
+enum{
+	GTS_TX_ONLY = 0x00,
+	GTS_RX_ONLY = 0x01
+};
+
+//channel scan enumerations
+
+enum{
+	ED_SCAN = 0x00,
+};
+
+
+
+#endif
+
diff --git a/tos/lib/net/zigbee/wrapper/includes/mac_func.h b/tos/lib/net/zigbee/wrapper/includes/mac_func.h
new file mode 100644
index 00000000..a4f14341
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/includes/mac_func.h
@@ -0,0 +1,384 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author open-zb http://www.open-zb.net
+ * @author Andre Cunha
+ */
+
+
+#ifndef __MAC_FUNC__
+#define __MAC_FUNC__
+
+/*******************************************************************************************************************/ 
+
+uint8_t set_capability_information(uint8_t alternate_PAN_coordinator, uint8_t device_type, uint8_t power_source, uint8_t receiver_on_when_idle, uint8_t security, uint8_t allocate_address)
+{
+	
+	return ((allocate_address << 7 ) | (security << 6 ) | (receiver_on_when_idle << 3 ) | (power_source << 2 ) | ( device_type << 1 ) | (alternate_PAN_coordinator << 0) );
+}
+
+uint8_t get_alternate_PAN_coordinator(uint8_t capability_information)
+{
+
+if ( (capability_information & 0x01) == 0x01)
+	return 1;
+else
+	return 0;
+
+}
+
+  
+/*******************************************************************************************************************/  
+/********************************FRAME CONTROL FUNCTIONS************************************************************/
+/*******************************************************************************************************************/
+  
+ //build MPDU frame control field
+uint16_t set_frame_control(uint8_t frame_type,uint8_t security,uint8_t frame_pending,uint8_t ack_request,uint8_t intra_pan,uint8_t dest_addr_mode,uint8_t source_addr_mode) 
+{
+	  uint8_t fc_b1=0;
+	  uint8_t fc_b2=0;
+  	  fc_b1 = ( (intra_pan << 6) | (ack_request << 5) | (frame_pending << 4) |
+ 	   		  (security << 3) | (frame_type << 0) );				  
+	  fc_b2 = ( (source_addr_mode << 6) | (dest_addr_mode << 2));
+	  return ( (fc_b2 << 8 ) | (fc_b1 << 0) );
+
+} 
+
+
+//return the type of destination address specified in the frame control 
+
+uint8_t get_fc2_dest_addr(uint8_t frame_control)
+{
+	switch( frame_control & 0xC )
+	{
+	case 0x4:	return RESERVED_ADDRESS; 
+							break;
+	case 0x8: return SHORT_ADDRESS;
+						 break;
+	case 0xC: return LONG_ADDRESS;
+						break;
+	default:
+			return 0; 
+			break;
+	}
+}
+
+
+//return the type of source address specified in the frame control 
+
+uint8_t get_fc2_source_addr(uint8_t frame_control)
+{
+	switch(frame_control & 0xC0 )
+	{
+	case 0x40:	return RESERVED_ADDRESS; 
+							break;
+	case 0x80: return SHORT_ADDRESS;
+						 break;
+	case 0xC0: return LONG_ADDRESS;
+						break;
+	default:
+			return 0; 
+			break;
+	}
+}
+
+
+
+bool get_fc1_security(uint8_t frame_control)
+{
+
+if ( (frame_control & 0x8) == 0x8)
+	return 1;
+else
+	return 0;
+
+}
+
+bool get_fc1_frame_pending(uint8_t frame_control)
+{
+
+if ( (frame_control & 0x10) == 0x10)
+	return 1;
+else
+	return 0;
+	
+}
+
+bool get_fc1_ack_request(uint8_t frame_control)
+{
+
+if ( (frame_control & 0x20) == 0x20)
+	return 1;
+else
+	return 0;
+	
+}
+
+bool get_fc1_intra_pan(uint8_t frame_control)
+{
+
+if ( (frame_control & 0x40) == 0x40)
+	return 1;
+else
+	return 0;
+	
+} 
+ 
+  
+/*******************************************************************************************************************/  
+/********************************SUPERFRAME SPECIFICATION FUNCTIONS*************************************************/
+/*******************************************************************************************************************/
+
+//build beacon superframe specification
+uint16_t set_superframe_specification(uint8_t beacon_order,uint8_t superframe_order,uint8_t final_cap_slot,uint8_t battery_life_extension,uint8_t pan_coordinator,uint8_t association_permit)
+{
+	  uint8_t sf_b1=0;
+	  uint8_t sf_b2=0;
+	  sf_b1 = ( (superframe_order << 4) | (beacon_order <<0));
+	  sf_b2 = ( (association_permit << 7) | (pan_coordinator << 6) |
+	  		    (battery_life_extension << 4) | (final_cap_slot << 0) );
+	   return  ( (sf_b2 <<8 ) | (sf_b1 << 0) );  
+   
+}
+
+uint8_t get_beacon_order(uint16_t superframe)
+{
+	return ((uint8_t)superframe &  0xF);
+}
+
+uint8_t get_superframe_order(uint16_t superframe)
+{
+	return (((uint8_t)superframe >> 4) &  0xF);
+}
+
+
+
+bool get_pan_coordinator(uint16_t superframe)
+{
+if ( ((uint8_t)superframe & 0x40) == 0x40)
+	return 1;
+else
+	return 0;
+	
+}
+
+bool get_association_permit(uint16_t superframe)
+{
+if ( ((uint8_t)superframe & 0x80) == 0x80)
+	return 1;
+else
+	return 0;	
+}
+
+bool get_battery_life_extention(uint16_t superframe)
+{
+if ( ((uint8_t)superframe & 0x10) == 0x10)
+	return 1;
+else
+	return 0;	
+}
+
+uint8_t get_final_cap_slot(uint16_t superframe)
+{
+return (((uint8_t)superframe >> 4) &  0xF);
+}
+
+
+/*******************************************************************************************************************/  
+/********************************      DATA TX OPTIONS   ************************************************************/
+/*******************************************************************************************************************/
+  
+  
+uint8_t set_txoptions(uint8_t ack, uint8_t gts, uint8_t indirect_transmission,uint8_t security)
+{
+return ( (ack << 0) | (gts << 1) | (indirect_transmission << 2) | (security << 3 ) );
+}  
+  
+bool get_txoptions_ack(uint8_t txoptions)
+{
+
+if ( (txoptions & 0x1) == 0x1)
+	return 1;
+else
+	return 0;
+
+}
+  
+bool get_txoptions_gts(uint8_t txoptions)
+{
+
+if ( (txoptions & 0x2) == 0x2)
+	return 1;
+else
+	return 0;
+
+}  
+
+bool get_txoptions_indirect_transmission(uint8_t txoptions)
+{
+
+if ( (txoptions & 0x4) == 0x4)
+	return 1;
+else
+	return 0;
+
+}  
+
+bool get_txoptions_security(uint8_t txoptions)
+{
+
+if ( (txoptions & 0x8) == 0x8)
+	return 1;
+else
+	return 0;
+}
+
+
+//BEACON SCHEDULING IMPLEMENTATION
+bool get_txoptions_upstream_buffer(uint8_t txoptions) 
+{
+
+if ( (txoptions & 0x10) == 0x10)
+	return 1;
+else
+	return 0;
+}
+
+uint8_t set_txoptions_upstream(uint8_t ack, uint8_t gts, uint8_t indirect_transmission,uint8_t security,uint8_t upstream)
+{
+return ( (ack << 0) | (gts << 1) | (indirect_transmission << 2) | (security << 3 ) | (upstream << 4) );
+} 
+
+
+/*******************************************************************************************************************/  
+/********************************PENDING ADDRESSES FUNCTIONS********************************************************/
+/*******************************************************************************************************************/
+uint8_t set_pending_address_specification(uint8_t number_short, uint8_t number_extended)
+{
+	return ( (number_extended << 4) | (number_short << 0) );
+}
+
+uint8_t get_number_short(uint8_t pending_specification)
+{
+	return (pending_specification & 0x07);
+}
+
+uint8_t get_number_extended(uint8_t pending_specification)
+{
+	return ( (pending_specification >> 4) & 0x07);
+}
+
+
+/*******************************************************************************************************************/  
+/********************************GTS FIELDS FUNCTIONS***************************************************************/
+/*******************************************************************************************************************/
+uint8_t set_gts_specification(uint8_t gts_descriptor_count, uint8_t gts_permit)
+{
+	return ( ( gts_descriptor_count << 0) | (gts_permit << 7) );  
+}
+
+uint8_t get_gts_permit(uint8_t gts_specification)
+{
+return ( (gts_specification >> 7) & 0x01);
+}
+
+
+///UNUSED
+uint8_t set_gts_directions(uint8_t gts1,uint8_t gts2,uint8_t gts3,uint8_t gts4,uint8_t gts5,uint8_t gts6,uint8_t gts7)
+{
+	return ((gts1 << 0) | (0 << 7));
+}
+
+
+uint8_t set_gts_descriptor(uint8_t GTS_starting_slot, uint8_t GTS_length)
+{
+//part of the descriptor list
+	return ( (GTS_starting_slot << 0) | (GTS_length << 4) );
+}
+
+uint8_t get_gts_descriptor_len(uint8_t gts_des_part)
+{
+	return ( (gts_des_part & 0xf0) >> 4);
+}
+
+uint8_t get_gts_descriptor_ss(uint8_t gts_des_part)
+{
+	return (gts_des_part & 0x0f);
+}
+
+
+
+/************************************************************************************************/  
+/********************************GTS CHARACTERISTICS*************************************************/
+/************************************************************************************************/
+uint8_t set_gts_characteristics(uint8_t gts_length, uint8_t gts_direction, uint8_t characteristic_type)
+{
+	return ( (gts_length << 0) | (gts_direction << 4) | (characteristic_type << 5));
+}  
+ 
+ 
+uint8_t get_gts_length(uint8_t gts_characteristics)
+{
+	return (gts_characteristics &  0xF);
+}
+
+bool get_gts_direction(uint8_t gts_characteristics)
+{
+	if ( (gts_characteristics & 0x10) == 0x10)
+		return 1;
+	else
+		return 0;
+}  
+
+uint8_t get_characteristic_type(uint8_t gts_characteristics)
+{
+	if ( (gts_characteristics & 0x20) == 0x20)
+		return 1;
+	else
+		return 0;
+} 
+
+
+/************************************************************************************************/  
+/********************************OTHER FUNCTIONS*************************************************/
+/************************************************************************************************/
+  /* A Task to calculate CRC for message transmission */
+  /*
+  task void CRCCalc() {
+    uint16_t length = txLength;
+    uint16_t crc = calcrc(sendPtr, length - 2);
+    
+    sendPtr[length - 2] = crc & 0xff;
+    sendPtr[length - 1] = (crc >> 8) & 0xff;
+    
+  }
+  */
+  
+uint16_t get_crcByte(uint16_t crc, uint8_t b)
+{
+  uint8_t i;
+  
+  crc = crc ^ b << 8;
+  i = 8;
+  do
+    if (crc & 0x8000)
+      crc = crc << 1 ^ 0x1021;
+    else
+      crc = crc << 1;
+  while (--i);
+
+  return crc;
+}
+  /* Internal function to calculate 16 bit CRC */
+  uint16_t calcrc(uint8_t *ptr, uint8_t count) {
+    uint16_t crc;
+    //uint8_t i;
+  
+    crc = 0;
+    while (count-- > 0)
+      crc = get_crcByte(crc, *ptr++);
+
+    return crc;
+  }
+
+#endif
+
diff --git a/tos/lib/net/zigbee/wrapper/includes/nwk_func.h b/tos/lib/net/zigbee/wrapper/includes/nwk_func.h
new file mode 100644
index 00000000..dbd3975f
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/includes/nwk_func.h
@@ -0,0 +1,141 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Andre Cunha
+ */
+
+#ifndef __NWK_FUNC__
+#define __NWK_FUNC__
+
+//TEST
+typedef struct associated_device
+{
+
+uint32_t address0;
+uint32_t address1;
+
+uint16_t pan_address;
+
+}associated_device;
+//END TEST
+
+typedef struct routing_fields
+{
+
+//uint8_t frame_control1;
+//uint8_t frame_control2;
+uint16_t frame_control;
+uint16_t destination_address;
+uint16_t source_address;
+uint8_t radius;
+uint8_t sequence_number;
+
+}routing_fields;
+
+/*******************************************************************************************************************/  
+/********************************NETWORK LAYER FRAME CONTROL FUNCTIONS************************************************************/
+/*******************************************************************************************************************/
+  
+ //build NPDU frame control field
+uint16_t set_route_frame_control(uint8_t Frame_type,uint8_t Protocol_version,uint8_t Discover_route,uint8_t Security) 
+{
+	  uint8_t fc_byte1=0;
+	  uint8_t fc_byte2=0;
+  	  fc_byte1 = ( (Discover_route << 6) | (Protocol_version << 2) | (Frame_type << 0) );				  
+	  fc_byte2 = ((Security<< 2));
+	  return ( (fc_byte2 <<8 ) | (fc_byte1 << 0) );
+
+}
+
+
+uint8_t route_fc1(uint8_t Security) 
+{
+	uint8_t fc;
+	fc = ((Security << 2));
+	return fc;
+}
+
+uint8_t route_fc2(uint8_t Frame_type,uint8_t Protocol_version,uint8_t Discover_route) 
+{
+	uint8_t fc;
+	fc = ( (Discover_route << 6) | (Protocol_version << 2) | (Frame_type << 0) );	
+	return fc;
+}
+
+uint8_t get_route_frame_type(uint16_t frame_control)
+{
+	return (frame_control & 0x3);
+}
+
+uint8_t get_route_protocol_version(uint16_t frame_control)
+{
+	return ( (frame_control >> 2) & 0xf);
+}
+
+uint8_t get_route_discover_route(uint16_t frame_control)
+{
+	return ( (frame_control >> 6) & 0x3);
+}
+
+uint8_t get_route_security(uint16_t frame_control)
+{
+	if( ((frame_control >> 8) & 0x2) == 0x2)
+		return 1;
+	else
+		return 0;
+}
+
+/*******************************************************************************************************************/  
+/********************************NETWORK LAYER BEACON PAYLOAD INFORMATION FUNCTIONS*********************************/
+/*******************************************************************************************************************/
+
+uint8_t nwk_payload_profile_protocolversion(uint8_t stackprofile,uint8_t nwkcprotocolversion)
+{
+
+return ((stackprofile << 0) | ( nwkcprotocolversion << 4));
+}
+
+uint8_t nwk_payload_capacity(uint8_t routercapacity,uint8_t devicedepth,uint8_t enddevicecapacity)
+{
+
+return ((enddevicecapacity << 7) | ( devicedepth << 3 ) | (routercapacity << 2 ) );
+}
+
+
+uint8_t get_protocolid(uint32_t nwk_information)
+{
+	return (uint8_t)((nwk_information & 0xFF000000) >> 24);
+}
+
+uint8_t get_stackprofile(uint32_t nwk_information)
+{
+	return (uint8_t)((nwk_information & 0x00F00000)>>20);
+}
+
+uint8_t get_nwkcprotocolversion(uint32_t nwk_information)
+{
+	return (uint8_t)((nwk_information & 0x000F0000)>>16);
+}
+
+uint8_t get_routercapacity(uint32_t nwk_information)
+{
+	if ( ( nwk_information & 0x00002000) == 0x00002000)
+		return 1;
+	else
+		return 0;
+}
+
+uint8_t get_devicedepth(uint32_t nwk_information)
+{
+	return (uint8_t)((nwk_information & 0x00001F00) >> 8);
+}
+
+uint8_t get_enddevicecapacity(uint32_t nwk_information)
+{
+	if ( ( nwk_information & 0x00000001) == 0x00000001)
+		return 1;
+	else
+		return 0;
+}
+
+#endif
diff --git a/tos/lib/net/zigbee/wrapper/includes/phy_const.h b/tos/lib/net/zigbee/wrapper/includes/phy_const.h
new file mode 100644
index 00000000..8ac3ced6
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/includes/phy_const.h
@@ -0,0 +1,32 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ */
+
+
+#ifndef __PHY_CONST__
+#define __PHY_CONST__
+ 
+// The PHY constants are defined here.
+#define aMaxPHYPacketSize  127
+#define aTurnaroundTime 12
+
+#define INIT_CURRENTCHANNEL 0x15
+#define INIT_CHANNELSSUPPORTED 0x0
+#define INIT_TRANSMITPOWER 15
+#define INIT_CCA_MODE 0
+
+#define CCA_IDLE 0
+#define CCA_BUSY 1
+
+// PHY PIB attribute and psdu
+typedef struct
+{
+	uint8_t phyCurrentChannel;
+	uint8_t phyChannelsSupported;
+	uint8_t phyTransmitPower;
+	uint8_t phyCcaMode;
+} phyPIB;
+
+#endif
+
diff --git a/tos/lib/net/zigbee/wrapper/includes/phy_enumerations.h b/tos/lib/net/zigbee/wrapper/includes/phy_enumerations.h
new file mode 100644
index 00000000..9059bf37
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/includes/phy_enumerations.h
@@ -0,0 +1,33 @@
+/*
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author Andre Cunha
+ */
+ 
+#ifndef __PHY_ENUMERATIONS__
+#define __PHY_ENUMERATIONS__
+ 
+ 
+//phy status enumerations
+enum{
+	PHY_BUSY = 0x00,
+	PHY_BUSY_RX = 0x01,
+	PHY_BUSY_TX = 0x02,
+	PHY_FORCE_TRX_OFF = 0x03,
+	PHY_IDLE = 0x04,
+	PHY_INVALID_PARAMETER = 0x05,
+	PHY_RX_ON = 0x06,
+	PHY_SUCCESS = 0x07,
+	PHY_TRX_OFF = 0x08,
+	PHY_TX_ON = 0x09,
+	PHY_UNSUPPORTED_ATTRIBUTE = 0x0a
+};
+
+//phy PIB attributes enumerations
+enum{
+	PHYCURRENTCHANNEL = 0x00,
+	PHYCHANNELSSUPPORTED = 0X01,
+	PHYTRANSMITPOWER = 0X02,
+	PHYCCAMODE=0X03
+};
+
+#endif
diff --git a/tos/lib/net/zigbee/wrapper/includes/printfUART.h b/tos/lib/net/zigbee/wrapper/includes/printfUART.h
new file mode 100644
index 00000000..35a736fd
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/includes/printfUART.h
@@ -0,0 +1,336 @@
+/*
+ * Copyright (c) 2005
+ *	The President and Fellows of Harvard College.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* 
+ * Writes printf like output to the UART.  
+ * This works only on the AVR and MSP430 Microcontrollers!
+ * <p>
+ * Note: For AVR we explicitly place the print statements in ROM; for
+ * MSP430 this is done by default!  For AVR, if we don't place it
+ * explicitely in ROM, the statements will go in RAM, which will
+ * quickly cause a descent size program to run out of RAM.  By default
+ * it doesn't disable the interupts; disabling the interupts when
+ * writing to the UART, slows down/makes the mote quite unresponsive,
+ * and can lead to problems!  If you wish to disable all printfs to
+ * the UART, then comment the flag: <code>PRINTFUART_ENABLED</code>.
+
+ * <p> <pre>
+ * How to use:
+ *   // (1) Call printfUART_init() from your initialization function 
+ *   //     to initialize the UART
+ *   printfUART_init();
+ *   // (2) Set your UART client to the correct baud rate.  Look at 
+ *   //     the comments in printfUART_init(), to figure out what 
+ *   //     baud to use for your particular mote
+ *
+ *   // (3) Send printf statements like this:
+ *   printfUART("Hello World, we are in year= %i\n", 2004);
+ *
+ * Examples and caveats:
+ *   // (1) - If no parameters are passed, then the second quotes 
+ *            are required because of how the macro is defined
+ *   printfUART("Timer fired\n", ""); 
+ *   // (2) - Must use curly braces in single section statements
+ *   if (x < 3)
+ *       {printfUART("The value of x is %i\n", x);}
+ *   // (3) - Otherwise it more or less works like regular printf
+ *   printfUART("\nThe value of x=%i, and y=%i\n", x, y); 
+ * </pre>
+ * <pre>URL: http://www.eecs.harvard.edu/~konrad/projects/motetrack</pre>
+ * @author Konrad Lorincz
+ * @version 2.0, January 5, 2005
+ */
+#ifndef PRINTFUART_H
+#define PRINTFUART_H
+#include <stdarg.h>
+//#include <stdio.h>
+
+// Comment out the line below to DISABLE printf statements.
+#define PRINTFUART_ENABLED
+
+
+// -------------------------------------------------------------------
+#ifdef PRINTFUART_ENABLED
+    #define DEBUGBUF_SIZE 256
+    char debugbuf[DEBUGBUF_SIZE];
+    char debugbufROMtoRAM[DEBUGBUF_SIZE];
+
+    #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+        #define printfUART(__format, __args...) {                  \
+            static const char strROM[] PROGMEM = __format;         \
+            strcpy_P((char*) &debugbufROMtoRAM, (PGM_P) &strROM);  \
+            sprintf(debugbuf, debugbufROMtoRAM, __args);           \
+            writedebug();                                          \
+        }   
+    #else  // assume MSP430 architecture (e.g. TelosA, TelosB, etc.)
+        #define printfUART(__format, __args...) {      \
+            sprintf(debugbuf, __format, __args);       \
+            writedebug();                              \
+        }   
+    #endif
+#else
+    #define printfUART(__format, __args...)
+    void printfUART_init() {}
+#endif
+
+#define NOprintfUART(__format, __args...)
+
+
+/** Used for terminating the program from a non-nesc file. Calling <code>exit(1)</code> 
+ *  from a non-nesc file doesn't terminate the program immeditely
+ */
+static int EXIT_PROGRAM = 0;  
+
+
+
+// -------------------------------------------------------------------
+#ifdef PRINTFUART_ENABLED
+
+/**
+ * Initialize the UART port.  Call this from your startup routine.
+ */
+#define printfUART_init() {atomic printfUART_init_private();}
+void printfUART_init_private()
+{
+    #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2)
+        // 56K baud
+        outp(0,UBRR0H);
+        outp(15, UBRR0L);                              //set baud rate
+        outp((1<<U2X),UCSR0A);                         // Set UART double speed
+        outp(((1 << UCSZ1) | (1 << UCSZ0)) , UCSR0C);  // Set frame format: 8 data-bits, 1 stop-bit
+        inp(UDR0);
+        outp((1 << TXEN) ,UCSR0B);   // Enable uart reciever and transmitter
+
+    #else
+      #if defined(PLATFORM_MICA2DOT)  
+        // 19.2K baud
+        outp(0,UBRR0H);            // Set baudrate to 19.2 KBps
+        outp(12, UBRR0L);
+        outp(0,UCSR0A);            // Disable U2X and MPCM
+        outp(((1 << UCSZ1) | (1 << UCSZ0)) , UCSR0C);
+        inp(UDR0);
+        outp((1 << TXEN) ,UCSR0B);
+  
+      #else  // assume TelosA, TelosB, etc.
+        //9.6K baud
+        uint16_t l_br = 0;
+        uint8_t l_mctl = 0;
+        uint8_t l_ssel = 0;
+
+
+        TOSH_SEL_UTXD1_MODFUNC();
+        TOSH_SEL_URXD1_MODFUNC();
+
+
+        UCTL1 = SWRST;  
+        UCTL1 |= CHAR;  // 8-bit char, UART-mode
+    
+        U1RCTL &= ~URXEIE;  // even erroneous characters trigger interrupts
+
+        UCTL1 = SWRST;
+        UCTL1 |= CHAR;  // 8-bit char, UART-mode
+
+        if (l_ssel & 0x80) {
+            U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+            U1TCTL |= (l_ssel & 0x7F); 
+        }
+        else {
+            U1TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
+            U1TCTL |= SSEL_ACLK; // use ACLK, assuming 32khz
+        }
+
+        if ((l_mctl != 0) || (l_br != 0)) {
+            U1BR0 = l_br & 0x0FF;
+            U1BR1 = (l_br >> 8) & 0x0FF;
+            U1MCTL = l_mctl;
+        }
+        else {
+            U1BR0 = 0x03;   // 9600 baud
+            U1BR1 = 0x00;
+            U1MCTL = 0x4A;
+        }
+      
+        ME2 &= ~USPIE1;   // USART1 SPI module disable
+        ME2 |= (UTXE1 | URXE1);   // USART1 UART module enable
+      
+        U1CTL &= ~SWRST;
+    
+        IFG2 &= ~(UTXIFG1 | URXIFG1);
+        IE2 &= ~(UTXIE1 | URXIE1);  // interrupt disabled
+
+      #endif
+    #endif
+}
+
+#if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+#else // assume AVR architecture (e.g. TelosA, TelosB)
+    bool isTxIntrPending()
+    {
+        if (U1TCTL & TXEPT) {
+            return TRUE;
+        }
+        return FALSE;
+    }
+#endif
+
+/**
+ * Outputs a char to the UART.
+ */
+void UARTPutChar(char c)
+{
+    if (c == '\n')
+        UARTPutChar('\r');
+
+
+    #if defined(PLATFORM_MICAZ) || defined(PLATFORM_MICA2) || defined(PLATFORM_MICA2DOT)
+        loop_until_bit_is_set(UCSR0A, UDRE);
+        outb(UDR0,c);
+    #else // assume AVR architecture (e.g. TelosA, TelosB)
+        U1TXBUF = c;  
+        while( !isTxIntrPending() )  
+            continue;
+    #endif
+}
+
+/**
+ * Outputs the entire debugbuf to the UART, or until it encounters '\0'.
+ */
+void writedebug()
+{
+    uint16_t i = 0;
+    
+    while (debugbuf[i] != '\0' && i < DEBUGBUF_SIZE)
+        UARTPutChar(debugbuf[i++]);
+}
+
+
+
+/**
+ * Simplified sprintf
+ */
+#define SCRATCH 16
+int sprintf(uint8_t *buf, const uint8_t *format, ...)
+{
+    uint8_t scratch[SCRATCH];
+    uint8_t format_flag;
+    uint32_t u_val=0, base;//modified by Andre Cunha
+    uint8_t *ptr;
+    va_list ap;
+
+   //memset(scratch, 0, SCRATCH);
+	
+    buf[0] = '\0';  // KLDEBUG - fixes subtle bug ...
+    va_start (ap, format);
+    for (;;){
+        while ((format_flag = *format++) != '%'){      // Until '%' or '\0'
+            if (!format_flag) {va_end (ap); return (0);}
+            *buf = format_flag; buf++; *buf=0;
+        }
+
+        switch (format_flag = *format++){
+
+        case 'c':
+            format_flag = va_arg(ap,int);
+        default:
+            *buf = format_flag; buf++; *buf=0;
+            continue;
+        case 'S':
+        case 's':
+            ptr = va_arg(ap,char *);
+            strcat(buf, ptr);
+            continue;
+        case 'o':
+            base = 8;
+            *buf = '0'; buf++; *buf=0;
+            goto CONVERSION_LOOP;
+        case 'i':
+            if (((int)u_val) < 0){
+                u_val = - u_val;
+                *buf = '-'; buf++; *buf=0;
+            }
+			base = 10;
+            goto CONVERSION_LOOP;
+            // no break -> run into next case
+		 case 'd'://added by Andre Cunha
+            if (((int32_t)u_val) < 0){
+                u_val = - u_val;
+                *buf = '-'; buf++; *buf=0;
+            }
+            
+			base = 10;
+            goto CONVERSION_LOOP32;
+        case 'u':
+            base = 10;
+            goto CONVERSION_LOOP;
+        case 'x':
+            base = 16;
+			goto CONVERSION_LOOP;
+			
+		case 'y'://unsigned int 32 bits hexadecimal//added by Andre Cunha
+            base = 16;
+			goto CONVERSION_LOOP32;
+			
+        CONVERSION_LOOP:
+            u_val = va_arg(ap,int);
+            ptr = scratch + SCRATCH;
+            *--ptr = 0;
+            do {
+                char ch = u_val % base + '0';
+                if (ch > '9')
+                    ch += 'a' - '9' - 1;
+                *--ptr = ch;
+                u_val /= base;
+            } while (u_val);
+            strcat(buf, ptr);
+            buf += strlen(ptr);
+			break;
+			
+		CONVERSION_LOOP32:
+            u_val = va_arg(ap,int32_t);
+            ptr = scratch + SCRATCH;
+            *--ptr = 0;
+            do {
+                char ch = u_val % base + '0';
+                if (ch > '9')
+                    ch += 'a' - '9' - 1;
+                *--ptr = ch;
+                u_val /= base;
+            } while (u_val);
+            strcat(buf, ptr);
+            buf += strlen(ptr);
+        }
+    }
+}
+
+
+#endif  // PRINTFUART_ENABLED
+// -------------------------------------------------------------------
+
+#endif  // PRINTFUART_H
+
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MCPS_DATA.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MCPS_DATA.nc
new file mode 100644
index 00000000..983b8081
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MCPS_DATA.nc
@@ -0,0 +1,19 @@
+/**
+ * MCPS-DATA-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+
+interface OPENZB_MCPS_DATA
+{ 
+  command error_t request(uint8_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[], uint8_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[], uint8_t msduLength, uint8_t msdu[],uint8_t msduHandle, uint8_t TxOptions);
+  
+  event error_t confirm(uint8_t msduHandle, uint8_t status);
+																																								
+  event error_t indication(uint16_t SrcAddrMode, uint16_t SrcPANId, uint32_t SrcAddr[2], uint16_t DstAddrMode, uint16_t DestPANId, uint32_t DstAddr[2], uint16_t msduLength,uint8_t msdu[100],uint16_t mpduLinkQuality, uint16_t SecurityUse, uint16_t ACLEntry);  
+
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MCPS_PURGE.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MCPS_PURGE.nc
new file mode 100644
index 00000000..0685a48b
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MCPS_PURGE.nc
@@ -0,0 +1,16 @@
+/**
+ * MCPS-PURGE-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+interface OPENZB_MCPS_PURGE
+{ 
+  command error_t request(uint8_t msduHandle);
+    
+  event error_t confirm(uint8_t msduHandle, uint8_t status);
+  
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_ASSOCIATE.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_ASSOCIATE.nc
new file mode 100644
index 00000000..cc5cf43a
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_ASSOCIATE.nc
@@ -0,0 +1,22 @@
+/**
+ * MLME-ASSOCIATE-Service Access Point
+ *	std pag 65
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+
+interface OPENZB_MLME_ASSOCIATE
+{ 
+  command error_t request(uint8_t LogicalChannel,uint8_t CoordAddrMode,uint16_t CoordPANId,uint32_t CoordAddress[],uint8_t CapabilityInformation,bool SecurityEnable);
+  
+  event error_t indication(uint32_t DeviceAddress[], uint8_t CapabilityInformation, bool SecurityUse, uint8_t ACLEntry);
+  
+  command error_t response(uint32_t DeviceAddress[], uint16_t AssocShortAddress, uint8_t status, bool SecurityEnable);
+  
+  event error_t confirm(uint16_t AssocShortAddress, uint8_t status);
+  
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_BEACON_NOTIFY.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_BEACON_NOTIFY.nc
new file mode 100644
index 00000000..5e66c285
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_BEACON_NOTIFY.nc
@@ -0,0 +1,17 @@
+/*
+ * MLME-BEACON-NOTIFY-Service Access Point
+ * std pag 75
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+includes mac_const;
+
+interface OPENZB_MLME_BEACON_NOTIFY
+{ 
+	event error_t indication(uint8_t BSN,PANDescriptor pan_descriptor, uint8_t PenAddrSpec, uint8_t AddrList, uint8_t sduLength, uint8_t sdu[]);
+ 
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_DISASSOCIATE.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_DISASSOCIATE.nc
new file mode 100644
index 00000000..9c2fc0e7
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_DISASSOCIATE.nc
@@ -0,0 +1,18 @@
+/**
+ * MLME-DISASSOCIATE-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+interface OPENZB_MLME_DISASSOCIATE
+{ 
+  command error_t request(uint32_t DeviceAddress[], uint8_t DisassociateReason, uint8_t SecurityEnable);
+  
+  event error_t indication(uint32_t DeviceAddress[], uint8_t DisassociateReason, uint8_t SecurityUse, uint8_t ACLEntry);
+  
+  event error_t confirm(uint8_t status);
+  
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_GET.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_GET.nc
new file mode 100644
index 00000000..4bd0ca34
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_GET.nc
@@ -0,0 +1,16 @@
+/**
+ * MLME-GET-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+interface OPENZB_MLME_GET
+{ 
+  command error_t request(uint8_t PIBAttribute);
+    
+  event error_t confirm(uint8_t status,uint8_t PIBAttribute, uint8_t PIBAttributeValue[]);
+  
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_GTS.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_GTS.nc
new file mode 100644
index 00000000..40dd8bed
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_GTS.nc
@@ -0,0 +1,17 @@
+/**
+ * MLME-GTS-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+interface OPENZB_MLME_GTS
+{ 
+  command error_t request(uint8_t GTSCharacteristics, uint8_t SecurityEnable);
+  
+  event error_t confirm(uint8_t GTSCharacteristics, uint8_t status);
+  
+  event error_t indication(uint16_t DevAddress, uint8_t GTSCharacteristics, uint8_t SecurityUse, uint8_t ACLEntry);
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_ORPHAN.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_ORPHAN.nc
new file mode 100644
index 00000000..6331dc3b
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_ORPHAN.nc
@@ -0,0 +1,18 @@
+/**
+ * MLME-ORPHAN-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+
+interface OPENZB_MLME_ORPHAN
+{ 
+
+  event error_t indication(uint32_t OrphanAddress[1], uint8_t SecurityUse, uint8_t ACLEntry);
+  
+  command error_t response(uint32_t OrphanAddress[1],uint16_t ShortAddress,uint8_t AssociatedMember, uint8_t security_enabled);
+
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_POLL.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_POLL.nc
new file mode 100644
index 00000000..d337a905
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_POLL.nc
@@ -0,0 +1,17 @@
+/**
+ * MLME-POOL-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+
+interface OPENZB_MLME_POLL
+{ 
+  command result_t request(uint8_t CoordAddrMode, uint16_t CoorPANId, uint32_t CoorAddress[], uint8_t Security);
+  
+  event result_t confirm(uint8_t status);
+  
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_RESET.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_RESET.nc
new file mode 100644
index 00000000..dcea1d4b
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_RESET.nc
@@ -0,0 +1,20 @@
+/**
+ * MLME-RESET-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+
+interface OPENZB_MLME_RESET
+{ 
+
+  command error_t request(uint8_t set_default_PIB);
+  
+  event error_t confirm(uint8_t status);
+  
+  
+
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_RX_ENABLE.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_RX_ENABLE.nc
new file mode 100644
index 00000000..d825f65b
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_RX_ENABLE.nc
@@ -0,0 +1,20 @@
+/**
+ * MLME-RX-ENABLE-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+
+interface OPENZB_MLME_RX_ENABLE
+{ 
+
+  command result_t request(uint8_tDeferPermit, uint32_t RxOnTime, uint32_t RxOnDuration);
+  
+  event result_t confirm(uint8_t status);
+  
+  
+
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_SCAN.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_SCAN.nc
new file mode 100644
index 00000000..76839581
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_SCAN.nc
@@ -0,0 +1,19 @@
+/**
+ * MLME-SCAN-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+
+interface OPENZB_MLME_SCAN
+{ 
+
+  command error_t request(uint8_t ScanType, uint32_t ScanChannels, uint8_t ScanDuration);
+	
+  event error_t confirm(uint8_t status,uint8_t ScanType, uint32_t UnscannedChannels, uint8_t ResultListSize, uint8_t EnergyDetectList[], SCAN_PANDescriptor PANDescriptorList[]);
+																						//NEED to explain the implementation
+																						//Eache value in sequencial to the scanned channels
+	}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_SET.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_SET.nc
new file mode 100644
index 00000000..51c9b276
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_SET.nc
@@ -0,0 +1,17 @@
+/**
+ * MLME-SET-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+
+interface OPENZB_MLME_SET
+{ 
+  command error_t request(uint8_t PIBAttribute,uint8_t PIBAttributeValue[]);
+
+  event error_t confirm(uint8_t status,uint8_t PIBAttribute);
+
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_START.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_START.nc
new file mode 100644
index 00000000..fc979eaa
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_START.nc
@@ -0,0 +1,19 @@
+/**
+ * MLME-START-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+
+interface OPENZB_MLME_START
+{ 
+
+  //request for the device to start using new superframe configuration
+  command error_t request(uint32_t PANId, uint8_t LogicalChannel, uint8_t BeaconOrder, uint8_t SuperframeOrder,uint8_t PANCoordinator,uint8_t BatteryLifeExtension,uint8_t CoordRealignment,uint8_t SecurityEnable,uint32_t StartTime);
+  
+  event error_t confirm(uint8_t status);
+  
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_SYNC.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_SYNC.nc
new file mode 100644
index 00000000..857ed047
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_SYNC.nc
@@ -0,0 +1,17 @@
+/**
+ * MLME-SYNC-Service Access Point
+ *
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+
+interface OPENZB_MLME_SYNC
+{ 
+//sd pag 105
+  command error_t request(uint8_t logical_channel,uint8_t track_beacon);
+
+}
diff --git a/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_SYNC_LOSS.nc b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_SYNC_LOSS.nc
new file mode 100644
index 00000000..ac133bad
--- /dev/null
+++ b/tos/lib/net/zigbee/wrapper/interfaces/mac/OPENZB_MLME_SYNC_LOSS.nc
@@ -0,0 +1,15 @@
+/**
+ * MLME-SYNC-LOSS-Service Access Point
+ *
+ * @author IPP HURRAY http://www.hurray.isep.ipp.pt/art-wise
+ * @author IPP HURRAY http://www.open-zb.net
+ * @author Ricardo Severino
+ *
+ *
+ */
+
+interface OPENZB_MLME_SYNC_LOSS
+{ 
+//pag 105
+   event error_t indication(uint8_t LossReason);
+}
diff --git a/tos/lib/power/AsyncDeferredPowerManagerP.nc b/tos/lib/power/AsyncDeferredPowerManagerP.nc
new file mode 100644
index 00000000..05b2b48e
--- /dev/null
+++ b/tos/lib/power/AsyncDeferredPowerManagerP.nc
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-06-29 22:07:50 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This is the internal implementation of the deffered power management
+ * policy for managing the power states of non-virtualized devices.
+ * Non-virtualized devices are shared using a parameterized Resource
+ * interface, and are powered down according to some policy whenever there
+ * are no more pending requests to that Resource.  The policy implemented
+ * by this component is to delay the power down of a device by some contant
+ * factor.  Such a policy is useful whenever a device has a long wake-up
+ * latency.  The cost of waiting for the device to power up can be
+ * avoided if the device is requested again before some predetermined
+ * amount of time.
+ *
+ * @param <b>delay</b> -- The amount of time the power manager should wait
+ *                        before shutting down the device once it is free.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+ 
+generic module AsyncDeferredPowerManagerP(uint32_t delay) {
+  uses {
+    interface AsyncStdControl;
+
+    interface PowerDownCleanup;
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+    interface Timer<TMilli> as TimerMilli;
+  }
+}
+implementation {
+
+  norace bool stopTimer = FALSE;
+
+  task void stopTimerTask() {
+    call TimerMilli.stop();
+    stopTimer = FALSE;
+  }
+
+  task void timerTask() {
+    if(stopTimer == FALSE)
+      call TimerMilli.startOneShot(delay);
+  }
+
+  async event void ResourceDefaultOwner.requested() {
+    stopTimer = TRUE;
+    post stopTimerTask();
+    call AsyncStdControl.start();
+    call ResourceDefaultOwner.release();
+  }
+
+  async event void ResourceDefaultOwner.immediateRequested() {
+    stopTimer = TRUE;
+    post stopTimerTask();
+    call AsyncStdControl.start();
+    call ResourceDefaultOwner.release();
+  }
+
+  async event void ResourceDefaultOwner.granted() {
+      post timerTask();
+  }
+
+  event void TimerMilli.fired() {
+    if(stopTimer == FALSE) {
+      call PowerDownCleanup.cleanup();
+      call AsyncStdControl.stop();
+    }
+  }
+
+  default async command void PowerDownCleanup.cleanup() {
+  }
+}
diff --git a/tos/lib/power/AsyncPowerManagerP.nc b/tos/lib/power/AsyncPowerManagerP.nc
new file mode 100644
index 00000000..88b787db
--- /dev/null
+++ b/tos/lib/power/AsyncPowerManagerP.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.7 $
+ * $Date: 2010-06-29 22:07:50 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This is the internal implementation of the standard power management
+ * policy for managing the power states of non-virtualized devices.
+ * Non-virtualized devices are shared using a parameterized Resource
+ * interface, and are powered down according to some policy whenever there
+ * are no more pending requests to that Resource.  The policy implemented
+ * by this component is to power down a device as soon as it becomes free.
+ * Such a policy is useful whenever a device has a negligible wake-up
+ * latency.  There is no cost associated with waiting for the device to
+ * power up, so it can be powered on and off as often as possible.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+ 
+generic module AsyncPowerManagerP() @safe() {
+  uses {
+    interface AsyncStdControl;
+
+    interface PowerDownCleanup;
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+}
+implementation {
+
+  async event void ResourceDefaultOwner.requested() {
+    call AsyncStdControl.start();
+    call ResourceDefaultOwner.release(); 
+  }
+
+  async event void ResourceDefaultOwner.immediateRequested() {
+    call AsyncStdControl.start();
+    call ResourceDefaultOwner.release();
+  } 
+
+  async event void ResourceDefaultOwner.granted() {
+    call PowerDownCleanup.cleanup();
+    call AsyncStdControl.stop();
+  }
+
+  default async command void PowerDownCleanup.cleanup() {
+  }
+}
diff --git a/tos/lib/power/AsyncStdControlDeferredPowerManagerC.nc b/tos/lib/power/AsyncStdControlDeferredPowerManagerC.nc
new file mode 100644
index 00000000..30adee72
--- /dev/null
+++ b/tos/lib/power/AsyncStdControlDeferredPowerManagerC.nc
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-06-29 22:07:50 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component povides a power management policy for managing the power
+ * states of non-virtualized devices.  Non-virtualized devices are shared
+ * using a parameterized Resource interface, and are powered down according
+ * to some policy whenever there are no more pending requests to that Resource.
+ * The policy implemented by this component is to delay the power down of a
+ * device by some contant factor.  Such a policy is useful whenever a device
+ * has a long wake-up latency.  The cost of waiting for the device to power
+ * up can be avoided if the device is requested again before some predetermined
+ * amount of time.<br><br>
+ *
+ * Powerdown of the device is done through the <code>AsyncStdControl</code>
+ * interface, so this component can only be used with those devices that
+ * provide that interface.<br><br>
+ *
+ * For devices providing either the <code>StdControl</code> or
+ * <code>SplitControl</code> interfaces, please use either the
+ * <code>StdControlDeferredPowerManagerC</code> component or the
+ * <code>SplitControlDeferredPowerManagerC</code> component respectively.
+ *
+ * @param <b>delay</b> -- The amount of time the power manager should wait
+ *                        before shutting down the device once it is free.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+ 
+generic configuration AsyncStdControlDeferredPowerManagerC(uint32_t delay)
+{
+  uses {
+    interface AsyncStdControl;
+
+    interface PowerDownCleanup;
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+}
+implementation {
+  components new TimerMilliC(),
+             new AsyncDeferredPowerManagerP(delay) as PowerManager;
+ 
+  PowerManager.AsyncStdControl = AsyncStdControl;
+  PowerManager.PowerDownCleanup = PowerDownCleanup;
+ 
+  PowerManager.ResourceDefaultOwner = ResourceDefaultOwner;
+  PowerManager.ArbiterInfo = ArbiterInfo;
+
+  PowerManager.TimerMilli -> TimerMilliC;
+}
+
diff --git a/tos/lib/power/AsyncStdControlPowerManagerC.nc b/tos/lib/power/AsyncStdControlPowerManagerC.nc
new file mode 100644
index 00000000..91c45547
--- /dev/null
+++ b/tos/lib/power/AsyncStdControlPowerManagerC.nc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-06-29 22:07:50 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This is the internal implementation of the standard power management
+ * policy for managing the power states of non-virtualized devices.
+ * Non-virtualized devices are shared using a parameterized Resource
+ * interface, and are powered down according to some policy whenever there
+ * are no more pending requests to that Resource.  The policy implemented
+ * by this component is to power down a device as soon as it becomes free.
+ * Such a policy is useful whenever a device has a negligible wake-up
+ * latency.  There is no cost associated with waiting for the device to
+ * power up, so it can be powered on and off as often as possible.<br><br>
+ *
+ * Powerdown of the device is done through the <code>AsyncStdControl</code>
+ * interface, so this component can only be used with those devices that
+ * provide that interface.<br><br>
+ *
+ * For devices providing either the <code>StdControl</code> or
+ * <code>SplitControl</code> interfaces, please use either the
+ * <code>StdControlPowerManagerC</code> component or the
+ * <code>SplitControlPowerManagerC</code> component respectively.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+ 
+generic configuration AsyncStdControlPowerManagerC()
+{
+  uses {
+    interface AsyncStdControl;
+
+    interface PowerDownCleanup;
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+}
+implementation {
+  components new AsyncPowerManagerP() as PowerManager;
+ 
+  PowerManager.AsyncStdControl = AsyncStdControl;
+
+  PowerManager.PowerDownCleanup = PowerDownCleanup;
+ 
+  PowerManager.ResourceDefaultOwner = ResourceDefaultOwner;
+  PowerManager.ArbiterInfo = ArbiterInfo;
+}
+
diff --git a/tos/lib/power/DeferredPowerManagerP.nc b/tos/lib/power/DeferredPowerManagerP.nc
new file mode 100644
index 00000000..a33a740f
--- /dev/null
+++ b/tos/lib/power/DeferredPowerManagerP.nc
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.7 $
+ * $Date: 2010-06-29 22:07:50 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This is the internal implementation of the deffered power management
+ * policy for managing the power states of non-virtualized devices.
+ * Non-virtualized devices are shared using a parameterized Resource
+ * interface, and are powered down according to some policy whenever there
+ * are no more pending requests to that Resource.  The policy implemented
+ * by this component is to delay the power down of a device by some contant
+ * factor.  Such a policy is useful whenever a device has a long wake-up
+ * latency.  The cost of waiting for the device to power up can be
+ * avoided if the device is requested again before some predetermined
+ * amount of time.
+ *
+ * @param <b>delay</b> -- The amount of time the power manager should wait
+ *                        before shutting down the device once it is free.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+ 
+generic module DeferredPowerManagerP(uint32_t delay) {
+  uses {
+    interface StdControl;
+    interface SplitControl;
+
+    interface PowerDownCleanup;
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+    interface Timer<TMilli> as TimerMilli;
+  }
+}
+implementation {
+
+  norace bool stopping = FALSE;
+  norace bool requested  = FALSE;
+  norace bool stopTimer = FALSE;
+
+  task void startTask() {
+    call TimerMilli.stop();
+    stopTimer = FALSE;
+    call StdControl.start();
+    if (call SplitControl.start()==EALREADY)
+      call ResourceDefaultOwner.release();
+  }
+
+  task void timerTask() { 
+    call TimerMilli.startOneShot(delay); 
+  }
+
+  async event void ResourceDefaultOwner.requested() {
+    if(stopping == FALSE) {
+      stopTimer = TRUE;
+      post startTask();
+    }
+    else requested = TRUE;
+  }
+
+  async event void ResourceDefaultOwner.immediateRequested() {
+  }
+
+  default command error_t StdControl.start() {
+    return SUCCESS;
+  }
+  default command error_t SplitControl.start() {
+    signal SplitControl.startDone(SUCCESS);
+    return SUCCESS;
+  }
+
+  event void SplitControl.startDone(error_t error) {
+    call ResourceDefaultOwner.release();
+  }
+
+  async event void ResourceDefaultOwner.granted() {
+    post timerTask();
+  }
+
+  event void TimerMilli.fired() {
+    atomic {
+      if(stopTimer == FALSE) {
+        stopping = TRUE;
+        call PowerDownCleanup.cleanup();
+        call StdControl.stop();
+        if (call SplitControl.stop()==EALREADY)
+          signal SplitControl.stopDone(SUCCESS);
+      }
+    }
+  }
+
+  event void SplitControl.stopDone(error_t error) {
+    if(requested == TRUE) {
+      call StdControl.start();
+      call SplitControl.start();
+    }
+    atomic {
+      requested = FALSE;
+      stopping = FALSE;
+    }
+  }
+
+  default command error_t StdControl.stop() {
+    return SUCCESS;
+  }
+  default command error_t SplitControl.stop() {
+    signal SplitControl.stopDone(SUCCESS);
+    return SUCCESS;
+  }
+
+  default async command void PowerDownCleanup.cleanup() {
+  }
+}
diff --git a/tos/lib/power/InfiniteRetryPowerManagerP.nc b/tos/lib/power/InfiniteRetryPowerManagerP.nc
new file mode 100644
index 00000000..9ad0f035
--- /dev/null
+++ b/tos/lib/power/InfiniteRetryPowerManagerP.nc
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2010-06-29 22:07:50 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This is the internal implementation of the standard power management
+ * policy for managing the power states of non-virtualized devices.
+ * Non-virtualized devices are shared using a parameterized Resource
+ * interface, and are powered down according to some policy whenever there
+ * are no more pending requests to that Resource.  The policy implemented
+ * by this component is to power down a device as soon as it becomes free.
+ * Such a policy is useful whenever a device has a negligible wake-up
+ * latency.  There is no cost associated with waiting for the device to
+ * power up, so it can be powered on and off as often as possible.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+ 
+generic module PowerManagerP() {
+  uses {
+    interface StdControl;
+    interface SplitControl;
+
+    interface PowerDownCleanup;
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+}
+implementation {
+
+  norace bool stopping = FALSE;
+  norace bool requested  = FALSE;
+
+  task void startTask() {
+    if(call StdControl.start() == SUCCESS)
+      if(call SplitControl.start() == SUCCESS)
+        return;
+    post startTask();
+  }
+
+  task void stopTask() {
+    if(call StdControl.stop() == SUCCESS)
+      if(call SplitControl.stop() == SUCCESS)
+        return;
+    post startTask();
+  }
+
+  async event void ResourceDefaultOwner.requested() {
+    if(stopping == FALSE) {
+      post startTask();
+    }
+    else requested = TRUE;
+  }
+
+  async event void ResourceDefaultOwner.immediateRequested() {
+  }
+  
+  default command error_t StdControl.start() {
+    return SUCCESS;
+  }
+  default command error_t SplitControl.start() {
+    signal SplitControl.startDone(SUCCESS);
+    return SUCCESS;
+  }
+
+  event void SplitControl.startDone(error_t error) {
+    if(error != SUCCESS) {
+      post startTask();
+      return;
+    }
+    if(call ResourceDefaultOwner.isOwner())
+      call ResourceDefaultOwner.release();
+  }
+  
+  async event void ResourceDefaultOwner.granted() {
+    atomic stopping = TRUE;
+    call PowerDownCleanup.cleanup();
+    post stopTask();
+  }
+
+  event void SplitControl.stopDone(error_t error) {
+    if(error != SUCCESS) {
+      post stopTask();
+      return;
+    }
+    if(requested == TRUE) {
+      call StdControl.start();
+      call SplitControl.start();
+    }
+    atomic {
+      requested = FALSE;
+      stopping = FALSE;
+    }
+  }
+
+  default command error_t StdControl.stop() {
+    return SUCCESS;
+  }
+  default command error_t SplitControl.stop() {
+    signal SplitControl.stopDone(SUCCESS);
+    return SUCCESS;
+  }
+
+  default async command void PowerDownCleanup.cleanup() {
+  }
+}
diff --git a/tos/lib/power/PowerDownCleanup.nc b/tos/lib/power/PowerDownCleanup.nc
new file mode 100644
index 00000000..9205120a
--- /dev/null
+++ b/tos/lib/power/PowerDownCleanup.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2010-06-29 22:07:50 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about this interface and its
+ * intended use.<br><br>
+ *
+ * This interface exists to allow a Resource user to cleanup any state
+ * information before a shared Resource is shutdown.  It should be provided
+ * by the user of a shared Resource, and used by the
+ * power managment component for that Resource.  The <code>cleanup()</code>
+ * command will be called by the power manager just before powering down
+ * the shared resource.
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+
+interface PowerDownCleanup {
+  /**
+   * This command will be called by the power management component of
+   * a shared Resource.  The implementation of this command defines
+   * what must be done just before that shared Resource is shut off.
+   *
+   */
+  async command void cleanup();
+} 
diff --git a/tos/lib/power/PowerManagerP.nc b/tos/lib/power/PowerManagerP.nc
new file mode 100644
index 00000000..dc91f128
--- /dev/null
+++ b/tos/lib/power/PowerManagerP.nc
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.7 $
+ * $Date: 2010-06-29 22:07:50 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This is the internal implementation of the standard power management
+ * policy for managing the power states of non-virtualized devices.
+ * Non-virtualized devices are shared using a parameterized Resource
+ * interface, and are powered down according to some policy whenever there
+ * are no more pending requests to that Resource.  The policy implemented
+ * by this component is to power down a device as soon as it becomes free.
+ * Such a policy is useful whenever a device has a negligible wake-up
+ * latency.  There is no cost associated with waiting for the device to
+ * power up, so it can be powered on and off as often as possible.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+ 
+generic module PowerManagerP() {
+  uses {
+    interface StdControl;
+    interface SplitControl;
+
+    interface PowerDownCleanup;
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+}
+implementation {
+
+  norace bool stopping = FALSE;
+  norace bool requested  = FALSE;
+
+  task void startTask() {
+    call StdControl.start();
+    call SplitControl.start();
+  }
+
+  task void stopTask() {
+    call PowerDownCleanup.cleanup();
+    call StdControl.stop();
+    call SplitControl.stop();    
+  }
+
+  async event void ResourceDefaultOwner.requested() {
+    if(stopping == FALSE) {
+      post startTask();
+    }
+    else requested = TRUE;
+  }
+
+  async event void ResourceDefaultOwner.immediateRequested() {
+  }
+  
+  default command error_t StdControl.start() {
+    return SUCCESS;
+  }
+  default command error_t SplitControl.start() {
+    signal SplitControl.startDone(SUCCESS);
+    return SUCCESS;
+  }
+
+  event void SplitControl.startDone(error_t error) {
+    if(call ResourceDefaultOwner.isOwner())
+      call ResourceDefaultOwner.release();
+  }
+  
+  async event void ResourceDefaultOwner.granted() {
+    atomic stopping = TRUE;
+    post stopTask();
+  }
+
+  event void SplitControl.stopDone(error_t error) {
+    if(requested == TRUE) {
+      call StdControl.start();
+      call SplitControl.start();
+    }
+    atomic {
+      requested = FALSE;
+      stopping = FALSE;
+    }
+  }
+
+  default command error_t StdControl.stop() {
+    return SUCCESS;
+  }
+  default command error_t SplitControl.stop() {
+    signal SplitControl.stopDone(SUCCESS);
+    return SUCCESS;
+  }
+
+  default async command void PowerDownCleanup.cleanup() {
+  }
+}
diff --git a/tos/lib/power/SplitControlDeferredPowerManagerC.nc b/tos/lib/power/SplitControlDeferredPowerManagerC.nc
new file mode 100644
index 00000000..4acb8e99
--- /dev/null
+++ b/tos/lib/power/SplitControlDeferredPowerManagerC.nc
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-06-29 22:07:50 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component povides a power management policy for managing the power
+ * states of non-virtualized devices.  Non-virtualized devices are shared
+ * using a parameterized Resource interface, and are powered down according
+ * to some policy whenever there are no more pending requests to that Resource.
+ * The policy implemented by this component is to delay the power down of a
+ * device by some contant factor.  Such a policy is useful whenever a device
+ * has a long wake-up latency.  The cost of waiting for the device to power
+ * up can be avoided if the device is requested again before some predetermined
+ * amount of time.<br><br>
+ *
+ * Powerdown of the device is done through the <code>SplitControl</code>
+ * interface, so this component can only be used with those devices that
+ * provide that interface.<br><br>
+ *
+ * For devices providing either the <code>AsyncStdControl</code> or
+ * <code>StdControl</code> interfaces, please use either the
+ * <code>AsyncStdControlDeferredPowerManagerC</code> component or the
+ * <code>StdControlDeferredPowerManagerC</code> component respectively.
+ *
+ * @param <b>delay</b> -- The amount of time the power manager should wait
+ *                        before shutting down the device once it is free.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+ 
+generic configuration SplitControlDeferredPowerManagerC(uint32_t delay) {
+  uses {
+    interface SplitControl;
+
+    interface PowerDownCleanup;
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+}
+implementation {
+  components new TimerMilliC(),
+             new DeferredPowerManagerP(delay) as PowerManager;
+ 
+  PowerManager.SplitControl = SplitControl;
+
+  PowerManager.PowerDownCleanup = PowerDownCleanup;
+ 
+  PowerManager.ResourceDefaultOwner = ResourceDefaultOwner;
+  PowerManager.ArbiterInfo = ArbiterInfo;
+
+  PowerManager.TimerMilli -> TimerMilliC;
+}
+
diff --git a/tos/lib/power/SplitControlPowerManagerC.nc b/tos/lib/power/SplitControlPowerManagerC.nc
new file mode 100644
index 00000000..c49f81af
--- /dev/null
+++ b/tos/lib/power/SplitControlPowerManagerC.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-06-29 22:07:50 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component povides a power management policy for managing the power
+ * states of non-virtualized devices.  Non-virtualized devices are shared
+ * using a parameterized Resource interface, and are powered down according
+ * to some policy whenever there are no more pending requests to that Resource.
+ * The policy implemented by this component is to delay the power down of a
+ * device by some contant factor.  Such a policy is useful whenever a device
+ * has a long wake-up latency.  The cost of waiting for the device to power
+ * up can be avoided if the device is requested again before some predetermined
+ * amount of time.<br><br>
+ *
+ * Powerdown of the device is done through the <code>SplitControl</code>
+ * interface, so this component can only be used with those devices that
+ * provide that interface.<br><br>
+ *
+ * For devices providing either the <code>AsyncStdControl</code> or
+ * <code>StdControl</code> interfaces, please use either the
+ * <code>AsyncStdControlPowerManagerC</code> component or the
+ * <code>StdControlPowerManagerC</code> component respectively.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+ 
+generic configuration SplitControlPowerManagerC() {
+  uses {
+    interface SplitControl;
+
+    interface PowerDownCleanup;
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+}
+implementation {
+  components  new PowerManagerP() as PowerManager;
+ 
+  PowerManager.SplitControl = SplitControl;
+
+  PowerManager.PowerDownCleanup = PowerDownCleanup;
+ 
+  PowerManager.ResourceDefaultOwner = ResourceDefaultOwner;
+  PowerManager.ArbiterInfo = ArbiterInfo;
+}
+
diff --git a/tos/lib/power/StdControlDeferredPowerManagerC.nc b/tos/lib/power/StdControlDeferredPowerManagerC.nc
new file mode 100644
index 00000000..9a6218bf
--- /dev/null
+++ b/tos/lib/power/StdControlDeferredPowerManagerC.nc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-06-29 22:07:50 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component povides a power management policy for managing the power
+ * states of non-virtualized devices.  Non-virtualized devices are shared
+ * using a parameterized Resource interface, and are powered down according
+ * to some policy whenever there are no more pending requests to that Resource.
+ * The policy implemented by this component is to delay the power down of a
+ * device by some contant factor.  Such a policy is useful whenever a device
+ * has a long wake-up latency.  The cost of waiting for the device to power
+ * up can be avoided if the device is requested again before some predetermined
+ * amount of time.<br><br>
+ *
+ * Powerdown of the device is done through the <code>StdControl</code>
+ * interface, so this component can only be used with those devices that
+ * provide that interface.<br><br>
+ *
+ * For devices providing either the <code>AsyncStdControl</code> or
+ * <code>SplitControl</code> interfaces, please use either the
+ * <code>AsyncStdControlDeferredPowerManagerC</code> component or the
+ * <code>SplitControlDeferredPowerManagerC</code> component respectively.
+ *
+ * @param <b>delay</b> -- The amount of time the power manager should wait
+ *                        before shutting down the device once it is free.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+ 
+generic configuration StdControlDeferredPowerManagerC(uint32_t delay)
+{
+  uses {
+    interface StdControl;
+
+    interface PowerDownCleanup;
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+}
+implementation {
+  components new TimerMilliC(),
+             new DeferredPowerManagerP(delay) as PowerManager;
+ 
+  PowerManager.StdControl = StdControl;
+
+  PowerManager.PowerDownCleanup = PowerDownCleanup;
+ 
+  PowerManager.ResourceDefaultOwner = ResourceDefaultOwner;
+  PowerManager.ArbiterInfo = ArbiterInfo;
+
+  PowerManager.TimerMilli -> TimerMilliC;
+}
+
diff --git a/tos/lib/power/StdControlPowerManagerC.nc b/tos/lib/power/StdControlPowerManagerC.nc
new file mode 100644
index 00000000..d40b5700
--- /dev/null
+++ b/tos/lib/power/StdControlPowerManagerC.nc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-06-29 22:07:50 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 115 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component povides a power management policy for managing the power
+ * states of non-virtualized devices.  Non-virtualized devices are shared
+ * using a parameterized Resource interface, and are powered down according
+ * to some policy whenever there are no more pending requests to that Resource.
+ * The policy implemented by this component is to delay the power down of a
+ * device by some contant factor.  Such a policy is useful whenever a device
+ * has a long wake-up latency.  The cost of waiting for the device to power
+ * up can be avoided if the device is requested again before some predetermined
+ * amount of time.<br><br>
+ *
+ * Powerdown of the device is done through the <code>StdControl</code>
+ * interface, so this component can only be used with those devices that
+ * provide that interface.<br><br>
+ *
+ * For devices providing either the <code>AsyncStdControl</code> or
+ * <code>SplitControl</code> interfaces, please use either the
+ * <code>AsyncStdControPowerManagerC</code> component or the
+ * <code>SplitControlPowerManagerC</code> component respectively.
+ * 
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ */
+ 
+generic configuration StdControlPowerManagerC()
+{
+  uses {
+    interface StdControl;
+
+    interface PowerDownCleanup;
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+}
+implementation {
+  components new PowerManagerP() as PowerManager;
+ 
+  PowerManager.StdControl = StdControl;
+
+  PowerManager.PowerDownCleanup = PowerDownCleanup;
+ 
+  PowerManager.ResourceDefaultOwner = ResourceDefaultOwner;
+  PowerManager.ArbiterInfo = ArbiterInfo;
+}
+
diff --git a/tos/lib/printf/2_0_2/PrintfC.nc b/tos/lib/printf/2_0_2/PrintfC.nc
new file mode 100644
index 00000000..3435b0b0
--- /dev/null
+++ b/tos/lib/printf/2_0_2/PrintfC.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is the PrintfC component.  It provides the printf service for printing
+ * data over the serial interface using the standard c-style printf command.  
+ * It must be started via the SplitControl interface it provides.  Data
+ * printed using printf are buffered and only sent over the serial line after
+ * making a call to PrintfFlush.flush().  This buffer has a maximum size of 
+ * 250 bytes at present.  After calling start on this component, printf
+ * statements can be made anywhere throughout your code, so long as you include
+ * the "printf.h" header file in every file you wish to use it.  Standard
+ * practice is to start the printf service in the main application, and set up 
+ * a timer to periodically flush the printf buffer (500ms should do).  In future
+ * versions, user defined buffer sizes as well as well as automatic flushing at 
+ * user defined intervals will be supported.  
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.2 $
+ * @date $Date: 2010-06-29 22:07:50 $
+ */
+
+#include "printf.h"
+
+configuration PrintfC {
+  provides {
+  	interface SplitControl as PrintfControl;
+  	interface PrintfFlush;
+  }
+}
+implementation {
+  components SerialActiveMessageC;
+  components new SerialAMSenderC(AM_PRINTF_MSG);
+  components PrintfP;
+
+  PrintfControl = PrintfP;
+  PrintfFlush = PrintfP;
+  
+  PrintfP.SerialControl -> SerialActiveMessageC;
+  PrintfP.AMSend -> SerialAMSenderC;
+  PrintfP.Packet -> SerialAMSenderC;
+}
+
diff --git a/tos/lib/printf/2_0_2/PrintfFlush.nc b/tos/lib/printf/2_0_2/PrintfFlush.nc
new file mode 100644
index 00000000..d9094dbc
--- /dev/null
+++ b/tos/lib/printf/2_0_2/PrintfFlush.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.2 $
+ * @date $Date: 2010-06-29 22:07:50 $
+ */
+ 
+#include "printf.h"
+ 
+interface PrintfFlush
+{
+  command error_t flush();
+  event void flushDone(error_t error);
+}
diff --git a/tos/lib/printf/2_0_2/PrintfP.nc b/tos/lib/printf/2_0_2/PrintfP.nc
new file mode 100644
index 00000000..2bb85760
--- /dev/null
+++ b/tos/lib/printf/2_0_2/PrintfP.nc
@@ -0,0 +1,189 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is the PrintfP component.  It provides the printf service for printing
+ * data over the serial interface using the standard c-style printf command.  
+ * It must be started via the SplitControl interface it provides.  Data
+ * printed using printf are buffered and only sent over the serial line after
+ * making a call to PrintfFlush.flush().  This buffer has a maximum size of 
+ * 250 bytes at present.  After calling start on this component, printf
+ * statements can be made anywhere throughout your code, so long as you include
+ * the "printf.h" header file in every file you wish to use it.  Standard
+ * practice is to start the printf service in the main application, and set up 
+ * a timer to periodically flush the printf buffer (500ms should do).  In future
+ * versions, user defined buffer sizes as well as well as automatic flushing at 
+ * user defined intervals will be supported.  
+ *
+ * The printf service is currently only available for msp430 based motes 
+ * (i.e. telos, eyes) and atmega128 based motes (i.e. mica2, micaz).  On the
+ * atmega platforms, avr-libc version 1.4 or above mus tbe used.
+ * 
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.2 $
+ * @date $Date: 2010-06-29 22:07:50 $
+ */
+
+#include "printf.h"
+
+#ifdef _H_atmega128hardware_H
+static int uart_putchar(char c, FILE *stream);
+static FILE atm128_stdout = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE);
+#endif
+
+module PrintfP {
+  provides {
+    interface SplitControl as PrintfControl;
+    interface PrintfFlush;
+  }
+  uses {
+    interface SplitControl as SerialControl;
+    interface AMSend;
+    interface Packet;
+  }
+}
+implementation {
+  
+  enum {
+    S_STARTED,
+    S_STOPPED,
+    S_FLUSHING,
+  };
+
+  message_t printfMsg;
+  nx_uint8_t buffer[PRINTF_BUFFER_SIZE];
+  norace nx_uint8_t* next_byte;
+  uint8_t state = S_STOPPED;
+  uint32_t bytes_left_to_flush;
+  uint8_t length_to_send;
+  
+  task void retrySend() {
+    if(call AMSend.send(AM_BROADCAST_ADDR, &printfMsg, sizeof(printf_msg_t)) != SUCCESS)
+      post retrySend();
+  }
+  
+  void sendNext() {
+    printf_msg_t* m = (printf_msg_t*)call Packet.getPayload(&printfMsg, sizeof(printf_msg_t));
+    length_to_send = (bytes_left_to_flush < sizeof(printf_msg_t)) ? bytes_left_to_flush : sizeof(printf_msg_t);
+    memset(m->buffer, 0, sizeof(printf_msg_t));
+    memcpy(m->buffer, (nx_uint8_t*)next_byte, length_to_send);
+    if(call AMSend.send(AM_BROADCAST_ADDR, &printfMsg, sizeof(printf_msg_t)) != SUCCESS)
+      post retrySend();  
+    else {
+      bytes_left_to_flush -= length_to_send;
+      next_byte += length_to_send;
+    }
+  }
+
+  command error_t PrintfControl.start() {
+    if(state == S_STOPPED)
+      return call SerialControl.start();
+    return FAIL;
+  }
+  
+  command error_t PrintfControl.stop() {
+    if(state == S_STARTED)
+      return call SerialControl.stop();
+    return FAIL;
+  }
+
+  event void SerialControl.startDone(error_t error) {
+    if(error != SUCCESS) {
+      signal PrintfControl.startDone(error);
+      return;
+    }
+#ifdef _H_atmega128hardware_H
+    stdout = &atm128_stdout;
+#endif
+    atomic {
+      memset(buffer, 0, sizeof(buffer));
+      next_byte = buffer;
+      bytes_left_to_flush = 0; 
+      length_to_send = 0;
+      state = S_STARTED;
+    }
+    signal PrintfControl.startDone(error); 
+  }
+
+  event void SerialControl.stopDone(error_t error) {
+    if(error != SUCCESS) {
+      signal PrintfControl.stopDone(error);
+      return;
+    }
+    atomic state = S_STOPPED;
+    signal PrintfControl.stopDone(error); 
+  }
+  
+  command error_t PrintfFlush.flush() {
+    atomic {
+      if(state == S_STARTED && (next_byte > buffer)) {
+        state = S_FLUSHING;
+        bytes_left_to_flush = next_byte - buffer;
+        next_byte = buffer;
+      }
+      else return FAIL;
+    }
+    sendNext();
+    return SUCCESS;
+  }
+    
+  event void AMSend.sendDone(message_t* msg, error_t error) {    
+    if(error == SUCCESS) {
+      if(bytes_left_to_flush > 0)
+        sendNext();
+      else {
+        next_byte = buffer;
+        bytes_left_to_flush = 0; 
+        length_to_send = 0;
+        atomic state = S_STARTED;
+      signal PrintfFlush.flushDone(error);
+    }
+  }
+  else post retrySend();
+  }
+  
+#ifdef _H_msp430hardware_h
+  int putchar(int c) __attribute__((noinline)) @C() @spontaneous() {
+#endif
+#ifdef _H_atmega128hardware_H
+  int uart_putchar(char c, FILE *stream) __attribute__((noinline)) @C() @spontaneous() {
+#endif
+    atomic {
+      if(state == S_STARTED && ((next_byte-buffer) < PRINTF_BUFFER_SIZE)) {
+        *(next_byte++) = c;
+        return 0;
+      }
+      else return -1;
+    }
+  }
+}
diff --git a/tos/lib/printf/2_0_2/avr_stdio.h b/tos/lib/printf/2_0_2/avr_stdio.h
new file mode 100644
index 00000000..73e13be5
--- /dev/null
+++ b/tos/lib/printf/2_0_2/avr_stdio.h
@@ -0,0 +1,1094 @@
+/* Copyright (c) 2002, 2005, Joerg Wunsch
+   All rights reserved.
+
+   Portions of documentation Copyright (c) 1990, 1991, 1993
+   The Regents of the University of California.
+
+   All rights reserved.
+
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+
+   * Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+
+   * Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in
+     the documentation and/or other materials provided with the
+     distribution.
+
+   * Neither the name of the copyright holders nor the names of
+     contributors may be used to endorse or promote products derived
+     from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  POSSIBILITY OF SUCH DAMAGE.
+
+  $Id: avr_stdio.h,v 1.1 2008-06-12 12:33:47 klueska Exp $
+*/
+
+#ifndef _STDIO_H_
+#define	_STDIO_H_ 1
+
+#ifndef __ASSEMBLER__
+
+#include <inttypes.h>
+#include <stdarg.h>
+
+#define __need_NULL
+#define __need_size_t
+#include <stddef.h>
+
+/** \defgroup avr_stdio <stdio.h>: Standard IO facilities
+    \code #include <stdio.h> \endcode
+
+    <h3>Introduction to the Standard IO facilities</h3>
+
+    This file declares the standard IO facilities that are implemented
+    in \c avr-libc.  Due to the nature of the underlying hardware,
+    only a limited subset of standard IO is implemented.  There is no
+    actual file implementation available, so only device IO can be
+    performed.  Since there's no operating system, the application
+    needs to provide enough details about their devices in order to
+    make them usable by the standard IO facilities.
+
+    Due to space constraints, some functionality has not been
+    implemented at all (like some of the \c printf conversions that
+    have been left out).  Nevertheless, potential users of this
+    implementation should be warned: the \c printf and \c scanf families of functions, although
+    usually associated with presumably simple things like the
+    famous "Hello, world!" program, are actually fairly complex
+    which causes their inclusion to eat up a fair amount of code space.
+    Also, they are not fast due to the nature of interpreting the
+    format string at run-time.  Whenever possible, resorting to the
+    (sometimes non-standard) predetermined conversion facilities that are
+    offered by avr-libc will usually cost much less in terms of speed
+    and code size.
+
+    <h3>Tunable options for code size vs. feature set</h3>
+
+    In order to allow programmers a code size vs. functionality tradeoff,
+    the function vfprintf() which is the heart of the printf family can be
+    selected in different flavours using linker options.  See the
+    documentation of vfprintf() for a detailed description.  The same
+    applies to vfscanf() and the \c scanf family of functions.
+
+    <h3>Outline of the chosen API</h3>
+
+    The standard streams \c stdin, \c stdout, and \c stderr are
+    provided, but contrary to the C standard, since avr-libc has no
+    knowledge about applicable devices, these streams are not already
+    pre-initialized at application startup.  Also, since there is no
+    notion of "file" whatsoever to avr-libc, there is no function
+    \c fopen() that could be used to associate a stream to some device.
+    (See \ref stdio_note1 "note 1".)  Instead, the function \c fdevopen()
+    is provided to associate a stream to a device, where the device
+    needs to provide a function to send a character, to receive a
+    character, or both.  There is no differentiation between "text" and
+    "binary" streams inside avr-libc.  Character \c \\n is sent
+    literally down to the device's \c put() function.  If the device
+    requires a carriage return (\c \\r) character to be sent before
+    the linefeed, its \c put() routine must implement this (see
+    \ref stdio_note2 "note 2").
+
+    As an alternative method to fdevopen(), the macro
+    fdev_setup_stream() might be used to setup a user-supplied FILE
+    structure.
+
+    It should be noted that the automatic conversion of a newline
+    character into a carriage return - newline sequence breaks binary
+    transfers.  If binary transfers are desired, no automatic
+    conversion should be performed, but instead any string that aims
+    to issue a CR-LF sequence must use <tt>"\r\n"</tt> explicitly.
+
+    For convenience, the first call to \c fdevopen() that opens a
+    stream for reading will cause the resulting stream to be aliased
+    to \c stdin.  Likewise, the first call to \c fdevopen() that opens
+    a stream for writing will cause the resulting stream to be aliased
+    to both, \c stdout, and \c stderr.  Thus, if the open was done
+    with both, read and write intent, all three standard streams will
+    be identical.  Note that these aliases are indistinguishable from
+    each other, thus calling \c fclose() on such a stream will also
+    effectively close all of its aliases (\ref stdio_note3 "note 3").
+
+    It is possible to tie additional user data to a stream, using
+    fdev_set_udata().  The backend put and get functions can then
+    extract this user data using fdev_get_udata(), and act
+    appropriately.  For example, a single put function could be used
+    to talk to two different UARTs that way, or the put and get
+    functions could keep internal state between calls there.
+
+    <h3>Format strings in flash ROM</h3>
+
+    All the \c printf and \c scanf family functions come in two flavours: the
+    standard name, where the format string is expected to be in
+    SRAM, as well as a version with the suffix "_P" where the format
+    string is expected to reside in the flash ROM.  The macro
+    \c PSTR (explained in \ref avr_pgmspace) becomes very handy
+    for declaring these format strings.
+
+    \anchor stdio_without_malloc
+    <h3>Running stdio without malloc()</h3>
+
+    By default, fdevopen() as well as the floating-point versions of
+    the printf and scanf family require malloc().  As this is often
+    not desired in the limited environment of a microcontroller, an
+    alternative option is provided to run completely without malloc().
+
+    The macro fdev_setup_stream() is provided to prepare a
+    user-supplied FILE buffer for operation with stdio.  If
+    floating-point operation is desired, a user-supplied buffer can as
+    well be passed for the internal buffering for the floating-point
+    numbers (and processing of \%[ scanf data).
+
+    <h4>Example</h4>
+
+    \code
+    #include <stdio.h>
+
+    static int uart_putchar(char c, FILE *stream);
+
+    static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
+                                             _FDEV_SETUP_WRITE);
+
+    static int
+    uart_putchar(char c, FILE *stream)
+    {
+
+      if (c == '\n')
+        uart_putchar('\r', stream);
+      loop_until_bit_is_set(UCSRA, UDRE);
+      UDR = c;
+      return 0;
+    }
+
+    int
+    main(void)
+    {
+      init_uart();
+      stdout = &mystdout;
+      printf("Hello, world!\n");
+
+      return 0;
+    }
+    \endcode
+
+    This example uses the initializer form FDEV_SETUP_STREAM() rather
+    than the function-like fdev_setup_stream(), so all data
+    initialization happens during C start-up.
+
+    If streams initialized that way are no longer needed, they can be
+    destroyed by first calling the macro fdev_close(), and then
+    destroying the object itself.  No call to fclose() should be
+    issued for these streams.  While calling fclose() itself is
+    harmless, it will cause an undefined reference to free() and thus
+    cause the linker to link the malloc module into the application.
+
+    <h3>Notes</h3>
+
+    \anchor stdio_note1 \par Note 1:
+    It might have been possible to implement a device abstraction that
+    is compatible with \c fopen() but since this would have required
+    to parse a string, and to take all the information needed either
+    out of this string, or out of an additional table that would need to be
+    provided by the application, this approach was not taken.
+
+    \anchor stdio_note2 \par Note 2:
+    This basically follows the Unix approach: if a device such as a
+    terminal needs special handling, it is in the domain of the
+    terminal device driver to provide this functionality.  Thus, a
+    simple function suitable as \c put() for \c fdevopen() that talks
+    to a UART interface might look like this:
+
+    \code
+    int
+    uart_putchar(char c, FILE *stream)
+    {
+
+      if (c == '\n')
+        uart_putchar('\r');
+      loop_until_bit_is_set(UCSRA, UDRE);
+      UDR = c;
+      return 0;
+    }
+    \endcode
+
+    \anchor stdio_note3 \par Note 3:
+    This implementation has been chosen because the cost of maintaining
+    an alias is considerably smaller than the cost of maintaining full
+    copies of each stream.  Yet, providing an implementation that offers
+    the complete set of standard streams was deemed to be useful.  Not
+    only that writing \c printf() instead of <tt>fprintf(mystream, ...)</tt>
+    saves typing work, but since avr-gcc needs to resort to pass all
+    arguments of variadic functions on the stack (as opposed to passing
+    them in registers for functions that take a fixed number of
+    parameters), the ability to pass one parameter less by implying
+    \c stdin will also save some execution time.
+*/
+
+#if !defined(__DOXYGEN__)
+
+/*
+ * This is an internal structure of the library that is subject to be
+ * changed without warnings at any time.  Please do *never* reference
+ * elements of it beyond by using the official interfaces provided.
+ */
+struct __file {
+	char	*buf;		/* buffer pointer */
+	unsigned char unget;	/* ungetc() buffer */
+	uint8_t	flags;		/* flags, see below */
+#define __SRD	0x0001		/* OK to read */
+#define __SWR	0x0002		/* OK to write */
+#define __SSTR	0x0004		/* this is an sprintf/snprintf string */
+#define __SPGM	0x0008		/* fmt string is in progmem */
+#define __SERR	0x0010		/* found error */
+#define __SEOF	0x0020		/* found EOF */
+#define __SUNGET 0x040		/* ungetc() happened */
+#define __SMALLOC 0x80		/* handle is malloc()ed */
+#if 0
+/* possible future extensions, will require uint16_t flags */
+#define __SRW	0x0100		/* open for reading & writing */
+#define __SLBF	0x0200		/* line buffered */
+#define __SNBF	0x0400		/* unbuffered */
+#define __SMBF	0x0800		/* buf is from malloc */
+#endif
+	int	size;		/* size of buffer */
+	int	len;		/* characters read or written so far */
+	int	(*put)(char, struct __file *);	/* function to write one char to device */
+	int	(*get)(struct __file *);	/* function to read one char from device */
+	void	*udata;		/* User defined and accessible data. */
+};
+
+#endif /* not __DOXYGEN__ */
+
+/*@{*/
+/**
+   \c FILE is the opaque structure that is passed around between the
+   various standard IO functions.
+*/
+#define FILE	struct __file
+
+/**
+   Stream that will be used as an input stream by the simplified
+   functions that don't take a \c stream argument.
+
+   The first stream opened with read intent using \c fdevopen()
+   will be assigned to \c stdin.
+*/
+#define stdin (__iob[0])
+
+/**
+   Stream that will be used as an output stream by the simplified
+   functions that don't take a \c stream argument.
+
+   The first stream opened with write intent using \c fdevopen()
+   will be assigned to both, \c stdin, and \c stderr.
+*/
+#define stdout (__iob[1])
+
+/**
+   Stream destined for error output.  Unless specifically assigned,
+   identical to \c stdout.
+
+   If \c stderr should point to another stream, the result of
+   another \c fdevopen() must be explicitly assigned to it without
+   closing the previous \c stderr (since this would also close
+   \c stdout).
+*/
+#define stderr (__iob[2])
+
+/**
+   \c EOF declares the value that is returned by various standard IO
+   functions in case of an error.  Since the AVR platform (currently)
+   doesn't contain an abstraction for actual files, its origin as
+   "end of file" is somewhat meaningless here.
+*/
+#define EOF	(-1)
+
+/** This macro inserts a pointer to user defined data into a FILE
+    stream object.
+
+    The user data can be useful for tracking state in the put and get
+    functions supplied to the fdevopen() function. */
+#define fdev_set_udata(stream, u) do { (stream)->udata = u; } while(0)
+
+/** This macro retrieves a pointer to user defined data from a FILE
+    stream object. */
+#define fdev_get_udata(stream) ((stream)->udata)
+
+#if defined(__DOXYGEN__)
+/**
+   \brief Setup a user-supplied buffer as an stdio stream
+
+   This macro takes a user-supplied buffer \c stream, and sets it up
+   as a stream that is valid for stdio operations, similar to one that
+   has been obtained dynamically from fdevopen(). The buffer to setup
+   must be of type FILE.
+
+   The arguments \c put and \c get are identical to those that need to
+   be passed to fdevopen().
+
+   The \c rwflag argument can take one of the values _FDEV_SETUP_READ,
+   _FDEV_SETUP_WRITE, or _FDEV_SETUP_RW, for read, write, or read/write
+   intent, respectively.
+
+   \note No assignments to the standard streams will be performed by
+   fdev_setup_stream().  If standard streams are to be used, these
+   need to be assigned by the user.  See also under
+   \ref stdio_without_malloc "Running stdio without malloc()".
+ */
+#define fdev_setup_stream(stream, put, get, rwflag)
+#else  /* !DOXYGEN */
+#define fdev_setup_stream(stream, p, g, f) \
+	do { \
+		(stream)->put = p; \
+		(stream)->get = g; \
+		(stream)->flags = f; \
+		(stream)->udata = 0; \
+	} while(0)
+#endif /* DOXYGEN */
+
+#define _FDEV_SETUP_READ  __SRD	/**< fdev_setup_stream() with read intent */
+#define _FDEV_SETUP_WRITE __SWR	/**< fdev_setup_stream() with write intent */
+#define _FDEV_SETUP_RW    (__SRD|__SWR)	/**< fdev_setup_stream() with read/write intent */
+
+/**
+ * Return code for an error condition during device read.
+ *
+ * To be used in the get function of fdevopen().
+ */
+#define _FDEV_ERR (-1)
+
+/**
+ * Return code for an end-of-file condition during device read.
+ *
+ * To be used in the get function of fdevopen().
+ */
+#define _FDEV_EOF (-2)
+
+#if defined(__DOXYGEN__)
+/**
+   \brief Initializer for a user-supplied stdio stream
+
+   This macro acts similar to fdev_setup_stream(), but it is to be
+   used as the initializer of a variable of type FILE.
+
+   The remaining arguments are to be used as explained in
+   fdev_setup_stream().
+ */
+#define FDEV_SETUP_STREAM(put, get, rwflag)
+#else  /* !DOXYGEN */
+#define FDEV_SETUP_STREAM(p, g, f) \
+	{ \
+		.put = p, \
+		.get = g, \
+		.flags = f, \
+		.udata = 0, \
+	}
+#endif /* DOXYGEN */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(__DOXYGEN__)
+/*
+ * Doxygen documentation can be found in fdevopen.c.
+ */
+
+extern struct __file *__iob[];
+
+#if defined(__STDIO_FDEVOPEN_COMPAT_12)
+/*
+ * Declare prototype for the discontinued version of fdevopen() that
+ * has been in use up to avr-libc 1.2.x.  The new implementation has
+ * some backwards compatibility with the old version.
+ */
+extern FILE *fdevopen(int (*__put)(char), int (*__get)(void),
+                      int __opts __attribute__((unused)));
+#else  /* !defined(__STDIO_FDEVOPEN_COMPAT_12) */
+/* New prototype for avr-libc 1.4 and above. */
+extern FILE *fdevopen(int (*__put)(char, FILE*), int (*__get)(FILE*));
+#endif /* defined(__STDIO_FDEVOPEN_COMPAT_12) */
+
+#endif /* not __DOXYGEN__ */
+
+/**
+   This function closes \c stream, and disallows and further
+   IO to and from it.
+
+   When using fdevopen() to setup the stream, a call to fclose() is
+   needed in order to free the internal resources allocated.
+
+   If the stream has been set up using fdev_setup_stream() or
+   FDEV_SETUP_STREAM(), use fdev_close() instead.
+
+   It currently always returns 0 (for success).
+*/
+extern int	fclose(FILE *__stream);
+
+/**
+   This macro frees up any library resources that might be associated
+   with \c stream.  It should be called if \c stream is no longer
+   needed, right before the application is going to destroy the
+   \c stream object itself.
+
+   (Currently, this macro evaluates to nothing, but this might change
+   in future versions of the library.)
+*/
+#if defined(__DOXYGEN__)
+# define fdev_close()
+#else
+# define fdev_close() ((void)0)
+#endif
+
+/**
+   \c vfprintf is the central facility of the \c printf family of
+   functions.  It outputs values to \c stream under control of a
+   format string passed in \c fmt.  The actual values to print are
+   passed as a variable argument list \c ap.
+
+   \c vfprintf returns the number of characters written to \c stream,
+   or \c EOF in case of an error.  Currently, this will only happen
+   if \c stream has not been opened with write intent.
+
+   The format string is composed of zero or more directives: ordinary
+   characters (not \c %), which are copied unchanged to the output
+   stream; and conversion specifications, each of which results in
+   fetching zero or more subsequent arguments.  Each conversion
+   specification is introduced by the \c % character.  The arguments must
+   properly correspond (after type promotion) with the conversion
+   specifier.  After the \c %, the following appear in sequence:
+
+   - Zero or more of the following flags:
+      <ul>
+      <li> \c # The value should be converted to an "alternate form".  For
+            c, d, i, s, and u conversions, this option has no effect.
+            For o conversions, the precision of the number is
+            increased to force the first character of the output
+            string to a zero (except if a zero value is printed with
+            an explicit precision of zero).  For x and X conversions,
+            a non-zero result has the string `0x' (or `0X' for X
+            conversions) prepended to it.</li>
+      <li> \c 0 (zero) Zero padding.  For all conversions, the converted
+            value is padded on the left with zeros rather than blanks.
+            If a precision is given with a numeric conversion (d, i,
+            o, u, i, x, and X), the 0 flag is ignored.</li>
+      <li> \c - A negative field width flag; the converted value is to be
+            left adjusted on the field boundary.  The converted value
+            is padded on the right with blanks, rather than on the
+            left with blanks or zeros.  A - overrides a 0 if both are
+            given.</li>
+      <li> ' ' (space) A blank should be left before a positive number
+            produced by a signed conversion (d, or i).</li>
+      <li> \c + A sign must always be placed before a number produced by a
+            signed conversion.  A + overrides a space if both are
+            used.</li>
+      </ul>
+      
+   -   An optional decimal digit string specifying a minimum field width.
+       If the converted value has fewer characters than the field width, it
+       will be padded with spaces on the left (or right, if the left-adjust­
+       ment flag has been given) to fill out the field width.
+   -   An optional precision, in the form of a period . followed by an
+       optional digit string.  If the digit string is omitted, the
+       precision is taken as zero.  This gives the minimum number of
+       digits to appear for d, i, o, u, x, and X conversions, or the
+       maximum number of characters to be printed from a string for \c s
+       conversions.
+   -   An optional \c l length modifier, that specifies that the
+       argument for the d, i, o, u, x, or X conversion is a \c "long int"
+       rather than \c int.
+   -   A character that specifies the type of conversion to be applied.
+
+   The conversion specifiers and their meanings are:
+
+   - \c diouxX The int (or appropriate variant) argument is converted
+           to signed decimal (d and i), unsigned octal (o), unsigned
+           decimal (u), or unsigned hexadecimal (x and X) notation.
+           The letters "abcdef" are used for x conversions; the
+           letters "ABCDEF" are used for X conversions.  The
+           precision, if any, gives the minimum number of digits that
+           must appear; if the converted value requires fewer digits,
+           it is padded on the left with zeros.
+   - \c p  The <tt>void *</tt> argument is taken as an unsigned integer,
+           and converted similarly as a <tt>%\#x</tt> command would do.
+   - \c c  The \c int argument is converted to an \c "unsigned char", and the
+           resulting character is written.
+   - \c s  The \c "char *" argument is expected to be a pointer to an array
+           of character type (pointer to a string).  Characters from
+           the array are written up to (but not including) a
+           terminating NUL character; if a precision is specified, no
+           more than the number specified are written.  If a precision
+           is given, no null character need be present; if the
+           precision is not specified, or is greater than the size of
+           the array, the array must contain a terminating NUL
+           character.
+   - \c %  A \c % is written.  No argument is converted.  The complete
+           conversion specification is "%%".
+   - \c eE The double argument is rounded and converted in the format
+           \c "[-]d.ddde±dd" where there is one digit before the
+           decimal-point character and the number of digits after it
+           is equal to the precision; if the precision is missing, it
+           is taken as 6; if the precision is zero, no decimal-point
+           character appears.  An \e E conversion uses the letter \c 'E'
+           (rather than \c 'e') to introduce the exponent.  The exponent
+           always contains two digits; if the value is zero,
+           the exponent is 00.
+   - \c fF The double argument is rounded and converted to decimal notation
+           in the format \c "[-]ddd.ddd", where the number of digits after the
+           decimal-point character is equal to the precision specification.
+           If the precision is missing, it is taken as 6; if the precision
+           is explicitly zero, no decimal-point character appears.  If a
+           decimal point appears, at least one digit appears before it.
+   - \c gG The double argument is converted in style \c f or \c e (or
+           \c F or \c E for \c G conversions).  The precision
+           specifies the number of significant digits.  If the
+           precision is missing, 6 digits are given; if the precision
+           is zero, it is treated as 1.  Style \c e is used if the
+           exponent from its conversion is less than -4 or greater
+           than or equal to the precision.  Trailing zeros are removed
+           from the fractional part of the result; a decimal point
+           appears only if it is followed by at least one digit.
+   - \c S  Similar to the \c s format, except the pointer is expected to
+           point to a program-memory (ROM) string instead of a RAM string.
+
+   In no case does a non-existent or small field width cause truncation of a
+   numeric field; if the result of a conversion is wider than the field
+   width, the field is expanded to contain the conversion result.
+
+   Since the full implementation of all the mentioned features becomes
+   fairly large, three different flavours of vfprintf() can be
+   selected using linker options.  The default vfprintf() implements
+   all the mentioned functionality except floating point conversions.
+   A minimized version of vfprintf() is available that only implements
+   the very basic integer and string conversion facilities, but none
+   of the additional options that can be specified using conversion
+   flags (these flags are parsed correctly from the format
+   specification, but then simply ignored).  This version can be
+   requested using the following \ref gcc_minusW "compiler options":
+
+   \code
+   -Wl,-u,vfprintf -lprintf_min
+   \endcode
+
+   If the full functionality including the floating point conversions
+   is required, the following options should be used:
+
+   \code
+   -Wl,-u,vfprintf -lprintf_flt -lm
+   \endcode
+
+   \par Limitations:
+   - The specified width and precision can be at most 127.
+   - For floating-point conversions, trailing digits will be lost if
+     a number close to DBL_MAX is converted with a precision > 0.
+
+ */
+
+extern int	vfprintf(FILE *__stream, const char *__fmt, va_list __ap);
+
+/**
+   Variant of \c vfprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	vfprintf_P(FILE *__stream, const char *__fmt, va_list __ap);
+
+/**
+   The function \c fputc sends the character \c c (though given as type
+   \c int) to \c stream.  It returns the character, or \c EOF in case
+   an error occurred.
+*/
+extern int	fputc(int __c, FILE *__stream);
+
+#if !defined(__DOXYGEN__)
+
+/* putc() function implementation, required by standard */
+extern int	putc(int __c, FILE *__stream);
+
+/* putchar() function implementation, required by standard */
+extern int	putchar(int __c);
+
+#endif /* not __DOXYGEN__ */
+
+/**
+   The macro \c putc used to be a "fast" macro implementation with a
+   functionality identical to fputc().  For space constraints, in
+   \c avr-libc, it is just an alias for \c fputc.
+*/
+#define putc(__c, __stream) fputc(__c, __stream)
+
+/**
+   The macro \c putchar sends character \c c to \c stdout.
+*/
+#define putchar(__c) fputc(__c, stdout)
+
+/**
+   The function \c printf performs formatted output to stream
+   \c stderr.  See \c vfprintf() for details.
+*/
+extern int	printf(const char *__fmt, ...);
+
+/**
+   Variant of \c printf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	printf_P(const char *__fmt, ...);
+
+/**
+   The function \c vprintf performs formatted output to stream
+   \c stdout, taking a variable argument list as in vfprintf().
+
+   See vfprintf() for details.
+*/
+extern int	vprintf(const char *__fmt, va_list __ap);
+
+/**
+   Variant of \c printf() that sends the formatted characters
+   to string \c s.
+*/
+extern int	sprintf(char *__s, const char *__fmt, ...);
+
+/**
+   Variant of \c sprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	sprintf_P(char *__s, const char *__fmt, ...);
+
+/**
+   Like \c sprintf(), but instead of assuming \c s to be of infinite
+   size, no more than \c n characters (including the trailing NUL
+   character) will be converted to \c s.
+
+   Returns the number of characters that would have been written to
+   \c s if there were enough space.
+*/
+extern int	snprintf(char *__s, size_t __n, const char *__fmt, ...);
+
+/**
+   Variant of \c snprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	snprintf_P(char *__s, size_t __n, const char *__fmt, ...);
+
+/**
+   Like \c sprintf() but takes a variable argument list for the
+   arguments.
+*/
+extern int	vsprintf(char *__s, const char *__fmt, va_list ap);
+
+/**
+   Variant of \c vsprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	vsprintf_P(char *__s, const char *__fmt, va_list ap);
+
+/**
+   Like \c vsprintf(), but instead of assuming \c s to be of infinite
+   size, no more than \c n characters (including the trailing NUL
+   character) will be converted to \c s.
+
+   Returns the number of characters that would have been written to
+   \c s if there were enough space.
+*/
+extern int	vsnprintf(char *__s, size_t __n, const char *__fmt, va_list ap);
+
+/**
+   Variant of \c vsnprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	vsnprintf_P(char *__s, size_t __n, const char *__fmt, va_list ap);
+/**
+   The function \c fprintf performs formatted output to \c stream.
+   See \c vfprintf() for details.
+*/
+extern int	fprintf(FILE *__stream, const char *__fmt, ...);
+
+/**
+   Variant of \c fprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	fprintf_P(FILE *__stream, const char *__fmt, ...);
+
+/**
+   Write the string pointed to by \c str to stream \c stream.
+
+   Returns 0 on success and EOF on error.
+*/
+extern int	fputs(const char *__str, FILE *__stream);
+
+/**
+   Variant of fputs() where \c str resides in program memory.
+*/
+extern int	fputs_P(const char *__str, FILE *__stream);
+
+/**
+   Write the string pointed to by \c str, and a trailing newline
+   character, to \c stdout.
+*/
+extern int	puts(const char *__str);
+
+/**
+   Variant of puts() where \c str resides in program memory.
+*/
+extern int	puts_P(const char *__str);
+
+/**
+   Write \c nmemb objects, \c size bytes each, to \c stream.
+   The first byte of the first object is referenced by \c ptr.
+
+   Returns the number of objects successfully written, i. e.
+   \c nmemb unless an output error occured.
+ */
+extern size_t	fwrite(const void *__ptr, size_t __size, size_t __nmemb,
+		       FILE *__stream);
+
+/**
+   The function \c fgetc reads a character from \c stream.  It returns
+   the character, or \c EOF in case end-of-file was encountered or an
+   error occurred.  The routines feof() or ferror() must be used to
+   distinguish between both situations.
+*/
+extern int	fgetc(FILE *__stream);
+
+#if !defined(__DOXYGEN__)
+
+/* getc() function implementation, required by standard */
+extern int	getc(FILE *__stream);
+
+/* getchar() function implementation, required by standard */
+extern int	getchar(void);
+
+#endif /* not __DOXYGEN__ */
+
+/**
+   The macro \c getc used to be a "fast" macro implementation with a
+   functionality identical to fgetc().  For space constraints, in
+   \c avr-libc, it is just an alias for \c fgetc.
+*/
+#define getc(__stream) fgetc(__stream)
+
+/**
+   The macro \c getchar reads a character from \c stdin.  Return
+   values and error handling is identical to fgetc().
+*/
+#define getchar() fgetc(stdin)
+
+/**
+   The ungetc() function pushes the character \c c (converted to an
+   unsigned char) back onto the input stream pointed to by \c stream.
+   The pushed-back character will be returned by a subsequent read on
+   the stream.
+
+   Currently, only a single character can be pushed back onto the
+   stream.
+   
+   The ungetc() function returns the character pushed back after the
+   conversion, or \c EOF if the operation fails.  If the value of the
+   argument \c c character equals \c EOF, the operation will fail and
+   the stream will remain unchanged.
+*/
+extern int	ungetc(int __c, FILE *__stream);
+
+/**
+   Read at most <tt>size - 1</tt> bytes from \c stream, until a
+   newline character was encountered, and store the characters in the
+   buffer pointed to by \c str.  Unless an error was encountered while
+   reading, the string will then be terminated with a \c NUL
+   character.
+
+   If an error was encountered, the function returns NULL and sets the
+   error flag of \c stream, which can be tested using ferror().
+   Otherwise, a pointer to the string will be returned.  */
+extern char	*fgets(char *__str, int __size, FILE *__stream);
+
+/**
+   Similar to fgets() except that it will operate on stream \c stdin,
+   and the trailing newline (if any) will not be stored in the string.
+   It is the caller's responsibility to provide enough storage to hold
+   the characters read.  */
+extern char	*gets(char *__str);
+
+/**
+   Read \c nmemb objects, \c size bytes each, from \c stream,
+   to the buffer pointed to by \c ptr.
+
+   Returns the number of objects successfully read, i. e.
+   \c nmemb unless an input error occured or end-of-file was
+   encountered.  feof() and ferror() must be used to distinguish
+   between these two conditions.
+ */
+extern size_t	fread(void *__ptr, size_t __size, size_t __nmemb,
+		      FILE *__stream);
+
+/**
+   Clear the error and end-of-file flags of \c stream.
+ */
+extern void	clearerr(FILE *__stream);
+
+#if !defined(__DOXYGEN__)
+/* fast inlined version of clearerr() */
+#define clearerror(s) do { (s)->flags &= ~(__SERR | __SEOF); } while(0)
+#endif /* !defined(__DOXYGEN__) */
+
+/**
+   Test the end-of-file flag of \c stream.  This flag can only be cleared
+   by a call to clearerr().
+ */
+extern int	feof(FILE *__stream);
+
+#if !defined(__DOXYGEN__)
+/* fast inlined version of feof() */
+#define feof(s) ((s)->flags & __SEOF)
+#endif /* !defined(__DOXYGEN__) */
+
+/**
+   Test the error flag of \c stream.  This flag can only be cleared
+   by a call to clearerr().
+ */
+extern int	ferror(FILE *__stream);
+
+#if !defined(__DOXYGEN__)
+/* fast inlined version of ferror() */
+#define ferror(s) ((s)->flags & __SERR)
+#endif /* !defined(__DOXYGEN__) */
+
+/**
+   Formatted input.  This function is the heart of the \c scanf
+   family of functions.
+
+   Characters are read from \c stream and processed in a way
+   described by \c fmt.  Conversion results will be assigned to the
+   parameters passed via \c ap.
+
+   The format string \c fmt is scanned for conversion specifications.
+   Anything that doesn't comprise a conversion specification is taken
+   as text that is matched literally against the input.  White space
+   in the format string will match any white space in the data
+   (including none), all other characters match only itself.
+   Processing is aborted as soon as the data and format string no
+   longer match, or there is an error or end-of-file condition on
+   \c stream.
+
+   Most conversions skip leading white space before starting the
+   actual conversion.
+
+   Conversions are introduced with the character \b %.  Possible
+   options can follow the \b %:
+
+   - a \c * indicating that the conversion should be performed but
+     the conversion result is to be discarded; no parameters will
+     be processed from \c ap,
+   - the character \c h indicating that the argument is a pointer
+     to <tt>short int</tt> (rather than <tt>int</tt>),
+   - the character \c l indicating that the argument is a pointer
+     to <tt>long int</tt> (rather than <tt>int</tt>, for integer
+     type conversions), or a pointer to \c double (for floating
+     point conversions).
+
+   In addition, a maximal field width may be specified as a nonzero
+   positive decimal integer, which will restrict the conversion to at
+   most this many characters from the input stream.  This field width
+   is limited to at most 127 characters which is also the default
+   value (except for the <tt>%c</tt> conversion that defaults to 1).
+
+   The following conversion flags are supported:
+
+   - \c % Matches a literal \c % character.  This is not a conversion.
+   - \c d Matches an optionally signed decimal integer; the next
+     pointer must be a pointer to \c int.
+   - \c i Matches an optionally signed integer; the next pointer must
+     be a pointer to \c int.  The integer is read in base 16 if it
+     begins with \b 0x or \b 0X, in base 8 if it begins with \b 0, and
+     in base 10 otherwise.  Only characters that correspond to the
+     base are used.
+   - \c o Matches an octal integer; the next pointer must be a pointer to
+     <tt>unsigned int</tt>.
+   - \c u Matches an optionally signed decimal integer; the next
+     pointer must be a pointer to <tt>unsigned int</tt>.
+   - \c x Matches an optionally signed hexadecimal integer; the next
+     pointer must be a pointer to <tt>unsigned int</tt>.
+   - \c f Matches an optionally signed floating-point number; the next
+     pointer must be a pointer to \c float.
+   - <tt>e, g, E, G</tt> Equivalent to \c f.
+   - \c s
+     Matches a sequence of non-white-space characters; the next pointer
+     must be a pointer to \c char, and the array must be large enough to
+     accept all the sequence and the terminating \c NUL character.  The
+     input string stops at white space or at the maximum field width,
+     whichever occurs first.
+   - \c c
+     Matches a sequence of width count characters (default 1); the next
+     pointer must be a pointer to \c char, and there must be enough room
+     for all the characters (no terminating \c NUL is added).  The usual
+     skip of leading white space is suppressed.  To skip white space
+     first, use an explicit space in the format.
+   - \c [
+     Matches a nonempty sequence of characters from the specified set
+     of accepted characters; the next pointer must be a pointer to \c
+     char, and there must be enough room for all the characters in the
+     string, plus a terminating \c NUL character.  The usual skip of
+     leading white space is suppressed.  The string is to be made up
+     of characters in (or not in) a particular set; the set is defined
+     by the characters between the open bracket \c [ character and a
+     close bracket \c ] character.  The set excludes those characters
+     if the first character after the open bracket is a circumflex
+     \c ^.  To include a close bracket in the set, make it the first
+     character after the open bracket or the circumflex; any other
+     position will end the set.  The hyphen character \c - is also
+     special; when placed between two other characters, it adds all
+     intervening characters to the set.  To include a hyphen, make it
+     the last character before the final close bracket.  For instance,
+     <tt>[^]0-9-]</tt> means the set of <em>everything except close
+     bracket, zero through nine, and hyphen</em>.  The string ends
+     with the appearance of a character not in the (or, with a
+     circumflex, in) set or when the field width runs out.
+   - \c p
+     Matches a pointer value (as printed by <tt>%p</tt> in printf()); the
+     next pointer must be a pointer to \c void.
+   - \c n
+     Nothing is expected; instead, the number of characters consumed
+     thus far from the input is stored through the next pointer, which
+     must be a pointer to \c int.  This is not a conversion, although it
+     can be suppressed with the \c * flag.
+
+     These functions return the number of input items assigned, which
+     can be fewer than provided for, or even zero, in the event of a
+     matching failure.  Zero indicates that, while there was input
+     available, no conversions were assigned; typically this is due
+     to an invalid input character, such as an alphabetic character
+     for a <tt>%d</tt> conversion.  The value \c EOF is returned if an input
+     failure occurs before any conversion such as an end-of-file
+     occurs.  If an error or end-of-file occurs after conversion has
+     begun, the number of conversions which were successfully
+     completed is returned.
+
+     By default, all the conversions described above are available
+     except the floating-point conversions, and the <tt>\%[</tt> conversion.
+     These conversions will be available in the extended version
+     provided by the library \c libscanf_flt.a.  Note that either of
+     these conversions requires the availability of a buffer that
+     needs to be obtained at run-time using malloc().  If this buffer
+     cannot be obtained, the operation is aborted, returning the
+     value \c EOF.  To link a program against the extended version,
+     use the following compiler flags in the link stage:
+
+     \code
+     -Wl,-u,vfscanf -lscanf_flt -lm
+     \endcode
+
+     A third version is available for environments that are tight
+     on space.  This version is provided in the library
+     \c libscanf_min.a, and can be requested using the following
+     options in the link stage:
+
+     \code
+     -Wl,-u,vfscanf -lscanf_min -lm
+     \endcode
+
+     In addition to the restrictions of the standard version, this
+     version implements no field width specification, no conversion
+     assignment suppression flag (\c *), no <tt>%n</tt> specification, and
+     no general format character matching at all.  All characters in
+     \c fmt that do not comprise a conversion specification will
+     simply be ignored, including white space (that is normally used
+     to consume \e any amount of white space in the input stream).
+     However, the usual skip of initial white space in the formats
+     that support it is implemented.
+*/
+extern int	vfscanf(FILE *__stream, const char *__fmt, va_list __ap);
+
+/**
+   Variant of vfscanf() using a \c fmt string in program memory.
+ */
+extern int	vfscanf_P(FILE *__stream, const char *__fmt, va_list __ap);
+
+/**
+   The function \c fscanf performs formatted input, reading the
+   input data from \c stream.
+
+   See vfscanf() for details.
+ */
+extern int	fscanf(FILE *__stream, const char *__fmt, ...);
+
+/**
+   Variant of fscanf() using a \c fmt string in program memory.
+ */
+extern int	fscanf_P(FILE *__stream, const char *__fmt, ...);
+
+/**
+   The function \c scanf performs formatted input from stream \c stdin.
+
+   See vfscanf() for details.
+ */
+extern int	scanf(const char *__fmt, ...);
+
+/**
+   Variant of scanf() where \c fmt resides in program memory.
+ */
+extern int	scanf_P(const char *__fmt, ...);
+
+/**
+   The function \c vscanf performs formatted input from stream
+   \c stdin, taking a variable argument list as in vfscanf().
+
+   See vfscanf() for details.
+*/
+extern int	vscanf(const char *__fmt, va_list __ap);
+
+/**
+   The function \c sscanf performs formatted input, reading the
+   input data from the buffer pointed to by \c buf.
+
+   See vfscanf() for details.
+ */
+extern int	sscanf(const char *__buf, const char *__fmt, ...);
+
+/**
+   Variant of sscanf() using a \c fmt string in program memory.
+ */
+extern int	sscanf_P(const char *__buf, const char *__fmt, ...);
+
+#if defined(__DOXYGEN__)
+/**
+   Flush \c stream.
+
+   This is a null operation provided for source-code compatibility
+   only, as the standard IO implementation currently does not perform
+   any buffering.
+ */
+extern int	fflush(FILE *stream);
+#else
+static __inline__ int fflush(FILE *stream __attribute__((unused)))
+{
+	return 0;
+}
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+/*
+ * The following constants are currently not used by avr-libc's
+ * stdio subsystem.  They are defined here since the gcc build
+ * environment expects them to be here.
+ */
+#define SEEK_SET 0
+#define SEEK_CUR 1
+#define SEEK_END 2
+
+#endif /* __ASSEMBLER */
+
+#endif /* _STDLIB_H_ */
diff --git a/tos/lib/printf/2_0_2/printf.h b/tos/lib/printf/2_0_2/printf.h
new file mode 100644
index 00000000..4eb5f684
--- /dev/null
+++ b/tos/lib/printf/2_0_2/printf.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.2 $
+ * @date $Date: 2010-06-29 22:07:50 $
+ */
+
+#ifndef PRINTF_H
+#define PRINTF_H
+
+#ifndef PRINTF_BUFFER_SIZE
+#define PRINTF_BUFFER_SIZE  250
+#endif
+
+#ifdef _H_msp430hardware_h
+  #include <stdio.h>
+#endif
+#ifdef _H_atmega128hardware_H
+  #include "avr_stdio.h"
+#endif
+#include "message.h"
+
+typedef nx_struct printf_msg {
+  nx_uint8_t buffer[TOSH_DATA_LENGTH];
+} printf_msg_t;
+
+enum {
+  AM_PRINTF_MSG = 100,
+};
+
+#endif //PRINTF_H
+
diff --git a/tos/lib/printf/MainC.nc b/tos/lib/printf/MainC.nc
new file mode 100644
index 00000000..d7dbdf2c
--- /dev/null
+++ b/tos/lib/printf/MainC.nc
@@ -0,0 +1,72 @@
+// $Id: MainC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*                                                                      tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Date last modified:  $Id: MainC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+ */
+
+/**
+ * MainC is the system interface the TinyOS boot sequence. It wires the
+ * boot sequence implementation to the scheduler and hardware resources.
+ *
+ * @author Philip Levis
+ * @author Kevin Klues
+ * @date   August 6 2005
+ */
+
+#include "hardware.h"
+
+configuration MainC {
+  provides interface Boot;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  components PlatformC, RealMainP, TinySchedulerC;
+  components PrintfC;
+
+  RealMainP.Scheduler -> TinySchedulerC;
+  RealMainP.PlatformInit -> PlatformC;
+  PrintfC.MainBoot -> RealMainP;
+
+  // Export the SoftwareInit and Booted for applications
+  SoftwareInit = RealMainP.SoftwareInit;
+  Boot = PrintfC;
+}
+
diff --git a/tos/lib/printf/PrintfC.nc b/tos/lib/printf/PrintfC.nc
new file mode 100644
index 00000000..25bcc5a6
--- /dev/null
+++ b/tos/lib/printf/PrintfC.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is the PrintfC component.  It provides the printf service for printing
+ * data over the serial interface using the standard c-style printf command.  
+ * Data printed using printf are buffered and only sent over the serial line after
+ * the buffer is half full or an explicit call to printfflush() is made.  This 
+ * buffer has a maximum size of 250 bytes at present.  This component is wired
+ * to a shadowed MainC component so that printf statements can be made anywhere 
+ * throughout your code, so long as you include the "printf.h" header file in 
+ * every file you wish to use it.  Take a look at the printf tutorial (lesson 15)
+ * for more details.
+ *
+ * The printf service is currently only available for msp430 based motes 
+ * (i.e. telos, eyes) and atmega128x based motes (i.e. mica2, micaz, iris).  On the
+ * atmega platforms, avr-libc version 1.4 or above must be used.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date September 18, 2007
+ */
+#include "printf.h"
+
+configuration PrintfC {
+  provides {
+    interface Boot;
+  }
+  uses interface Boot as MainBoot @exactlyonce();
+}
+implementation {
+  components SerialActiveMessageC;
+  components new SerialAMSenderC(AM_PRINTF_MSG);
+  components new PrintfQueueC(uint8_t, PRINTF_BUFFER_SIZE) as QueueC;
+
+  components PrintfP;
+  components LedsC;
+  
+  MainBoot = PrintfP.MainBoot;
+  Boot = PrintfP.Boot;
+  
+  PrintfP.SerialControl -> SerialActiveMessageC;
+  PrintfP.Queue -> QueueC;
+  PrintfP.AMSend -> SerialAMSenderC;
+  PrintfP.Packet -> SerialAMSenderC;
+  //PrintfP.Leds -> LedsC;
+}
+
diff --git a/tos/lib/printf/PrintfP.nc b/tos/lib/printf/PrintfP.nc
new file mode 100644
index 00000000..bd8d0d6a
--- /dev/null
+++ b/tos/lib/printf/PrintfP.nc
@@ -0,0 +1,197 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+ /*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is the PrintfP component.  It provides the printf service for printing
+ * data over the serial interface using the standard c-style printf command.  
+ * Data printed using printf are buffered and only sent over the serial line after
+ * the buffer is half full or an explicit call to printfflush() is made.  This 
+ * buffer has a maximum size of 250 bytes at present.  This component is wired
+ * to a shadowed MainC component so that printf statements can be made anywhere 
+ * throughout your code, so long as you include the "printf.h" header file in 
+ * every file you wish to use it.  Take a look at the printf tutorial (lesson 15)
+ * for more details.
+ *
+ * The printf service is currently only available for msp430 based motes 
+ * (i.e. telos, eyes) and atmega128x based motes (i.e. mica2, micaz, iris).  On the
+ * atmega platforms, avr-libc version 1.4 or above must be used.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date September 18, 2007
+ */
+
+#include "printf.h"
+
+#ifdef _H_atmega128hardware_H
+static int uart_putchar(char c, FILE *stream);
+static FILE atm128_stdout = 
+	FDEV_SETUP_STREAM(TCAST(int (*)(char c, FILE *stream), uart_putchar), 
+	NULL, _FDEV_SETUP_WRITE);
+#endif
+
+module PrintfP @safe() {
+  provides {
+    interface Boot;
+  }
+  uses {
+    interface Boot as MainBoot;
+    interface SplitControl as SerialControl;
+    interface PrintfQueue<uint8_t> as Queue;
+
+    interface AMSend;
+    interface Packet;
+    interface Leds;
+  }
+}
+implementation {
+  
+  enum {
+    S_STOPPED,
+    S_STARTED,
+    S_FLUSHING,
+  };
+
+  message_t printfMsg;
+  uint8_t state = S_STOPPED;
+  
+  event void MainBoot.booted() {
+    call SerialControl.start();
+  }
+
+  event void SerialControl.startDone(error_t error) {
+    if (state == S_STOPPED) {
+#ifdef _H_atmega128hardware_H
+      stdout = &atm128_stdout;
+#endif
+      atomic state = S_STARTED;
+      signal Boot.booted();
+    }
+  }
+
+  event void SerialControl.stopDone(error_t error) {
+    atomic state = S_STOPPED;
+  }
+  
+  task void retrySend() {
+    if(call AMSend.send(AM_BROADCAST_ADDR, &printfMsg, sizeof(printf_msg_t)) != SUCCESS)
+      post retrySend();
+  }
+  
+  void sendNext() {
+    int i;
+    printf_msg_t* m = (printf_msg_t*)call Packet.getPayload(&printfMsg, sizeof(printf_msg_t));
+    uint16_t length_to_send = (call Queue.size() < sizeof(printf_msg_t)) ? call Queue.size() : sizeof(printf_msg_t);
+    memset(m->buffer, 0, sizeof(printf_msg_t));
+    for(i=0; i<length_to_send; i++)
+      m->buffer[i] = call Queue.dequeue();
+    if(call AMSend.send(AM_BROADCAST_ADDR, &printfMsg, sizeof(printf_msg_t)) != SUCCESS)
+      post retrySend();  
+  }
+  
+  int printfflush() @C() @spontaneous() {
+    atomic {
+      if(state == S_FLUSHING)
+        return SUCCESS;
+      if(call Queue.empty())
+        return FAIL;
+      state = S_FLUSHING;
+    }
+    sendNext();
+    return SUCCESS;
+  }
+    
+  event void AMSend.sendDone(message_t* msg, error_t error) {    
+    if(error == SUCCESS) {
+      if(call Queue.size() > 0)
+        sendNext();
+      else state = S_STARTED;
+    }
+    else post retrySend();
+  }
+  
+#ifdef _H_msp430hardware_h
+  int putchar(int c) __attribute__((noinline)) @C() @spontaneous() {
+#else
+#ifdef _H_atmega128hardware_H
+  int uart_putchar(char c, FILE *stream) __attribute__((noinline)) @C() @spontaneous() {
+#else
+#ifdef __M16C62PHARDWARE_H__
+  int lowlevel_putc(int c) __attribute__((noinline)) @C() @spontaneous() {
+#else
+  int lowlevel_putc(int c) __attribute__((noinline)) @C() @spontaneous() {
+#endif
+#endif
+#endif
+    if((state == S_STARTED) && (call Queue.size() >= ((PRINTF_BUFFER_SIZE)/2))) {
+      state = S_FLUSHING;
+      sendNext();
+    }
+    atomic {
+      if(call Queue.enqueue(c) == SUCCESS)
+        return 0;
+      else return -1;
+    }
+  }
+}
diff --git a/tos/lib/printf/avr_stdio.h b/tos/lib/printf/avr_stdio.h
new file mode 100644
index 00000000..0899a627
--- /dev/null
+++ b/tos/lib/printf/avr_stdio.h
@@ -0,0 +1,1094 @@
+/* Copyright (c) 2002, 2005, Joerg Wunsch
+   All rights reserved.
+
+   Portions of documentation Copyright (c) 1990, 1991, 1993
+   The Regents of the University of California.
+
+   All rights reserved.
+
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+
+   * Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+
+   * Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in
+     the documentation and/or other materials provided with the
+     distribution.
+
+   * Neither the name of the copyright holders nor the names of
+     contributors may be used to endorse or promote products derived
+     from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  POSSIBILITY OF SUCH DAMAGE.
+
+  $Id: avr_stdio.h,v 1.2 2008-07-02 18:46:18 regehr Exp $
+*/
+
+#ifndef _STDIO_H_
+#define	_STDIO_H_ 1
+
+#ifndef __ASSEMBLER__
+
+#include <inttypes.h>
+#include <stdarg.h>
+
+#define __need_NULL
+#define __need_size_t
+#include <stddef.h>
+
+/** \defgroup avr_stdio <stdio.h>: Standard IO facilities
+    \code #include <stdio.h> \endcode
+
+    <h3>Introduction to the Standard IO facilities</h3>
+
+    This file declares the standard IO facilities that are implemented
+    in \c avr-libc.  Due to the nature of the underlying hardware,
+    only a limited subset of standard IO is implemented.  There is no
+    actual file implementation available, so only device IO can be
+    performed.  Since there's no operating system, the application
+    needs to provide enough details about their devices in order to
+    make them usable by the standard IO facilities.
+
+    Due to space constraints, some functionality has not been
+    implemented at all (like some of the \c printf conversions that
+    have been left out).  Nevertheless, potential users of this
+    implementation should be warned: the \c printf and \c scanf families of functions, although
+    usually associated with presumably simple things like the
+    famous "Hello, world!" program, are actually fairly complex
+    which causes their inclusion to eat up a fair amount of code space.
+    Also, they are not fast due to the nature of interpreting the
+    format string at run-time.  Whenever possible, resorting to the
+    (sometimes non-standard) predetermined conversion facilities that are
+    offered by avr-libc will usually cost much less in terms of speed
+    and code size.
+
+    <h3>Tunable options for code size vs. feature set</h3>
+
+    In order to allow programmers a code size vs. functionality tradeoff,
+    the function vfprintf() which is the heart of the printf family can be
+    selected in different flavours using linker options.  See the
+    documentation of vfprintf() for a detailed description.  The same
+    applies to vfscanf() and the \c scanf family of functions.
+
+    <h3>Outline of the chosen API</h3>
+
+    The standard streams \c stdin, \c stdout, and \c stderr are
+    provided, but contrary to the C standard, since avr-libc has no
+    knowledge about applicable devices, these streams are not already
+    pre-initialized at application startup.  Also, since there is no
+    notion of "file" whatsoever to avr-libc, there is no function
+    \c fopen() that could be used to associate a stream to some device.
+    (See \ref stdio_note1 "note 1".)  Instead, the function \c fdevopen()
+    is provided to associate a stream to a device, where the device
+    needs to provide a function to send a character, to receive a
+    character, or both.  There is no differentiation between "text" and
+    "binary" streams inside avr-libc.  Character \c \\n is sent
+    literally down to the device's \c put() function.  If the device
+    requires a carriage return (\c \\r) character to be sent before
+    the linefeed, its \c put() routine must implement this (see
+    \ref stdio_note2 "note 2").
+
+    As an alternative method to fdevopen(), the macro
+    fdev_setup_stream() might be used to setup a user-supplied FILE
+    structure.
+
+    It should be noted that the automatic conversion of a newline
+    character into a carriage return - newline sequence breaks binary
+    transfers.  If binary transfers are desired, no automatic
+    conversion should be performed, but instead any string that aims
+    to issue a CR-LF sequence must use <tt>"\r\n"</tt> explicitly.
+
+    For convenience, the first call to \c fdevopen() that opens a
+    stream for reading will cause the resulting stream to be aliased
+    to \c stdin.  Likewise, the first call to \c fdevopen() that opens
+    a stream for writing will cause the resulting stream to be aliased
+    to both, \c stdout, and \c stderr.  Thus, if the open was done
+    with both, read and write intent, all three standard streams will
+    be identical.  Note that these aliases are indistinguishable from
+    each other, thus calling \c fclose() on such a stream will also
+    effectively close all of its aliases (\ref stdio_note3 "note 3").
+
+    It is possible to tie additional user data to a stream, using
+    fdev_set_udata().  The backend put and get functions can then
+    extract this user data using fdev_get_udata(), and act
+    appropriately.  For example, a single put function could be used
+    to talk to two different UARTs that way, or the put and get
+    functions could keep internal state between calls there.
+
+    <h3>Format strings in flash ROM</h3>
+
+    All the \c printf and \c scanf family functions come in two flavours: the
+    standard name, where the format string is expected to be in
+    SRAM, as well as a version with the suffix "_P" where the format
+    string is expected to reside in the flash ROM.  The macro
+    \c PSTR (explained in \ref avr_pgmspace) becomes very handy
+    for declaring these format strings.
+
+    \anchor stdio_without_malloc
+    <h3>Running stdio without malloc()</h3>
+
+    By default, fdevopen() as well as the floating-point versions of
+    the printf and scanf family require malloc().  As this is often
+    not desired in the limited environment of a microcontroller, an
+    alternative option is provided to run completely without malloc().
+
+    The macro fdev_setup_stream() is provided to prepare a
+    user-supplied FILE buffer for operation with stdio.  If
+    floating-point operation is desired, a user-supplied buffer can as
+    well be passed for the internal buffering for the floating-point
+    numbers (and processing of \%[ scanf data).
+
+    <h4>Example</h4>
+
+    \code
+    #include <stdio.h>
+
+    static int uart_putchar(char c, FILE *stream);
+
+    static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
+                                             _FDEV_SETUP_WRITE);
+
+    static int
+    uart_putchar(char c, FILE *stream)
+    {
+
+      if (c == '\n')
+        uart_putchar('\r', stream);
+      loop_until_bit_is_set(UCSRA, UDRE);
+      UDR = c;
+      return 0;
+    }
+
+    int
+    main(void)
+    {
+      init_uart();
+      stdout = &mystdout;
+      printf("Hello, world!\n");
+
+      return 0;
+    }
+    \endcode
+
+    This example uses the initializer form FDEV_SETUP_STREAM() rather
+    than the function-like fdev_setup_stream(), so all data
+    initialization happens during C start-up.
+
+    If streams initialized that way are no longer needed, they can be
+    destroyed by first calling the macro fdev_close(), and then
+    destroying the object itself.  No call to fclose() should be
+    issued for these streams.  While calling fclose() itself is
+    harmless, it will cause an undefined reference to free() and thus
+    cause the linker to link the malloc module into the application.
+
+    <h3>Notes</h3>
+
+    \anchor stdio_note1 \par Note 1:
+    It might have been possible to implement a device abstraction that
+    is compatible with \c fopen() but since this would have required
+    to parse a string, and to take all the information needed either
+    out of this string, or out of an additional table that would need to be
+    provided by the application, this approach was not taken.
+
+    \anchor stdio_note2 \par Note 2:
+    This basically follows the Unix approach: if a device such as a
+    terminal needs special handling, it is in the domain of the
+    terminal device driver to provide this functionality.  Thus, a
+    simple function suitable as \c put() for \c fdevopen() that talks
+    to a UART interface might look like this:
+
+    \code
+    int
+    uart_putchar(char c, FILE *stream)
+    {
+
+      if (c == '\n')
+        uart_putchar('\r');
+      loop_until_bit_is_set(UCSRA, UDRE);
+      UDR = c;
+      return 0;
+    }
+    \endcode
+
+    \anchor stdio_note3 \par Note 3:
+    This implementation has been chosen because the cost of maintaining
+    an alias is considerably smaller than the cost of maintaining full
+    copies of each stream.  Yet, providing an implementation that offers
+    the complete set of standard streams was deemed to be useful.  Not
+    only that writing \c printf() instead of <tt>fprintf(mystream, ...)</tt>
+    saves typing work, but since avr-gcc needs to resort to pass all
+    arguments of variadic functions on the stack (as opposed to passing
+    them in registers for functions that take a fixed number of
+    parameters), the ability to pass one parameter less by implying
+    \c stdin will also save some execution time.
+*/
+
+#if !defined(__DOXYGEN__)
+
+/*
+ * This is an internal structure of the library that is subject to be
+ * changed without warnings at any time.  Please do *never* reference
+ * elements of it beyond by using the official interfaces provided.
+ */
+struct __file {
+	char	*buf;		/* buffer pointer */
+	unsigned char unget;	/* ungetc() buffer */
+	uint8_t	flags;		/* flags, see below */
+#define __SRD	0x0001		/* OK to read */
+#define __SWR	0x0002		/* OK to write */
+#define __SSTR	0x0004		/* this is an sprintf/snprintf string */
+#define __SPGM	0x0008		/* fmt string is in progmem */
+#define __SERR	0x0010		/* found error */
+#define __SEOF	0x0020		/* found EOF */
+#define __SUNGET 0x040		/* ungetc() happened */
+#define __SMALLOC 0x80		/* handle is malloc()ed */
+#if 0
+/* possible future extensions, will require uint16_t flags */
+#define __SRW	0x0100		/* open for reading & writing */
+#define __SLBF	0x0200		/* line buffered */
+#define __SNBF	0x0400		/* unbuffered */
+#define __SMBF	0x0800		/* buf is from malloc */
+#endif
+	int	size;		/* size of buffer */
+	int	len;		/* characters read or written so far */
+	int	(*put)(char, struct __file *);	/* function to write one char to device */
+	int	(*get)(struct __file *);	/* function to read one char from device */
+	void	*udata;		/* User defined and accessible data. */
+};
+
+#endif /* not __DOXYGEN__ */
+
+/*@{*/
+/**
+   \c FILE is the opaque structure that is passed around between the
+   various standard IO functions.
+*/
+#define FILE	struct __file
+
+/**
+   Stream that will be used as an input stream by the simplified
+   functions that don't take a \c stream argument.
+
+   The first stream opened with read intent using \c fdevopen()
+   will be assigned to \c stdin.
+*/
+#define stdin (__iob[0])
+
+/**
+   Stream that will be used as an output stream by the simplified
+   functions that don't take a \c stream argument.
+
+   The first stream opened with write intent using \c fdevopen()
+   will be assigned to both, \c stdin, and \c stderr.
+*/
+#define stdout (__iob[1])
+
+/**
+   Stream destined for error output.  Unless specifically assigned,
+   identical to \c stdout.
+
+   If \c stderr should point to another stream, the result of
+   another \c fdevopen() must be explicitly assigned to it without
+   closing the previous \c stderr (since this would also close
+   \c stdout).
+*/
+#define stderr (__iob[2])
+
+/**
+   \c EOF declares the value that is returned by various standard IO
+   functions in case of an error.  Since the AVR platform (currently)
+   doesn't contain an abstraction for actual files, its origin as
+   "end of file" is somewhat meaningless here.
+*/
+#define EOF	(-1)
+
+/** This macro inserts a pointer to user defined data into a FILE
+    stream object.
+
+    The user data can be useful for tracking state in the put and get
+    functions supplied to the fdevopen() function. */
+#define fdev_set_udata(stream, u) do { (stream)->udata = u; } while(0)
+
+/** This macro retrieves a pointer to user defined data from a FILE
+    stream object. */
+#define fdev_get_udata(stream) ((stream)->udata)
+
+#if defined(__DOXYGEN__)
+/**
+   \brief Setup a user-supplied buffer as an stdio stream
+
+   This macro takes a user-supplied buffer \c stream, and sets it up
+   as a stream that is valid for stdio operations, similar to one that
+   has been obtained dynamically from fdevopen(). The buffer to setup
+   must be of type FILE.
+
+   The arguments \c put and \c get are identical to those that need to
+   be passed to fdevopen().
+
+   The \c rwflag argument can take one of the values _FDEV_SETUP_READ,
+   _FDEV_SETUP_WRITE, or _FDEV_SETUP_RW, for read, write, or read/write
+   intent, respectively.
+
+   \note No assignments to the standard streams will be performed by
+   fdev_setup_stream().  If standard streams are to be used, these
+   need to be assigned by the user.  See also under
+   \ref stdio_without_malloc "Running stdio without malloc()".
+ */
+#define fdev_setup_stream(stream, put, get, rwflag)
+#else  /* !DOXYGEN */
+#define fdev_setup_stream(stream, p, g, f) \
+	do { \
+		(stream)->put = p; \
+		(stream)->get = g; \
+		(stream)->flags = f; \
+		(stream)->udata = 0; \
+	} while(0)
+#endif /* DOXYGEN */
+
+#define _FDEV_SETUP_READ  __SRD	/**< fdev_setup_stream() with read intent */
+#define _FDEV_SETUP_WRITE __SWR	/**< fdev_setup_stream() with write intent */
+#define _FDEV_SETUP_RW    (__SRD|__SWR)	/**< fdev_setup_stream() with read/write intent */
+
+/**
+ * Return code for an error condition during device read.
+ *
+ * To be used in the get function of fdevopen().
+ */
+#define _FDEV_ERR (-1)
+
+/**
+ * Return code for an end-of-file condition during device read.
+ *
+ * To be used in the get function of fdevopen().
+ */
+#define _FDEV_EOF (-2)
+
+#if defined(__DOXYGEN__)
+/**
+   \brief Initializer for a user-supplied stdio stream
+
+   This macro acts similar to fdev_setup_stream(), but it is to be
+   used as the initializer of a variable of type FILE.
+
+   The remaining arguments are to be used as explained in
+   fdev_setup_stream().
+ */
+#define FDEV_SETUP_STREAM(put, get, rwflag)
+#else  /* !DOXYGEN */
+#define FDEV_SETUP_STREAM(p, g, f) \
+	{ \
+		.put = p, \
+		.get = g, \
+		.flags = f, \
+		.udata = 0, \
+	}
+#endif /* DOXYGEN */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(__DOXYGEN__)
+/*
+ * Doxygen documentation can be found in fdevopen.c.
+ */
+
+extern struct __file * (COUNT(3) __iob)[];
+
+#if defined(__STDIO_FDEVOPEN_COMPAT_12)
+/*
+ * Declare prototype for the discontinued version of fdevopen() that
+ * has been in use up to avr-libc 1.2.x.  The new implementation has
+ * some backwards compatibility with the old version.
+ */
+extern FILE *fdevopen(int (*__put)(char), int (*__get)(void),
+                      int __opts __attribute__((unused)));
+#else  /* !defined(__STDIO_FDEVOPEN_COMPAT_12) */
+/* New prototype for avr-libc 1.4 and above. */
+extern FILE *fdevopen(int (*__put)(char, FILE*), int (*__get)(FILE*));
+#endif /* defined(__STDIO_FDEVOPEN_COMPAT_12) */
+
+#endif /* not __DOXYGEN__ */
+
+/**
+   This function closes \c stream, and disallows and further
+   IO to and from it.
+
+   When using fdevopen() to setup the stream, a call to fclose() is
+   needed in order to free the internal resources allocated.
+
+   If the stream has been set up using fdev_setup_stream() or
+   FDEV_SETUP_STREAM(), use fdev_close() instead.
+
+   It currently always returns 0 (for success).
+*/
+extern int	fclose(FILE *__stream);
+
+/**
+   This macro frees up any library resources that might be associated
+   with \c stream.  It should be called if \c stream is no longer
+   needed, right before the application is going to destroy the
+   \c stream object itself.
+
+   (Currently, this macro evaluates to nothing, but this might change
+   in future versions of the library.)
+*/
+#if defined(__DOXYGEN__)
+# define fdev_close()
+#else
+# define fdev_close() ((void)0)
+#endif
+
+/**
+   \c vfprintf is the central facility of the \c printf family of
+   functions.  It outputs values to \c stream under control of a
+   format string passed in \c fmt.  The actual values to print are
+   passed as a variable argument list \c ap.
+
+   \c vfprintf returns the number of characters written to \c stream,
+   or \c EOF in case of an error.  Currently, this will only happen
+   if \c stream has not been opened with write intent.
+
+   The format string is composed of zero or more directives: ordinary
+   characters (not \c %), which are copied unchanged to the output
+   stream; and conversion specifications, each of which results in
+   fetching zero or more subsequent arguments.  Each conversion
+   specification is introduced by the \c % character.  The arguments must
+   properly correspond (after type promotion) with the conversion
+   specifier.  After the \c %, the following appear in sequence:
+
+   - Zero or more of the following flags:
+      <ul>
+      <li> \c # The value should be converted to an "alternate form".  For
+            c, d, i, s, and u conversions, this option has no effect.
+            For o conversions, the precision of the number is
+            increased to force the first character of the output
+            string to a zero (except if a zero value is printed with
+            an explicit precision of zero).  For x and X conversions,
+            a non-zero result has the string `0x' (or `0X' for X
+            conversions) prepended to it.</li>
+      <li> \c 0 (zero) Zero padding.  For all conversions, the converted
+            value is padded on the left with zeros rather than blanks.
+            If a precision is given with a numeric conversion (d, i,
+            o, u, i, x, and X), the 0 flag is ignored.</li>
+      <li> \c - A negative field width flag; the converted value is to be
+            left adjusted on the field boundary.  The converted value
+            is padded on the right with blanks, rather than on the
+            left with blanks or zeros.  A - overrides a 0 if both are
+            given.</li>
+      <li> ' ' (space) A blank should be left before a positive number
+            produced by a signed conversion (d, or i).</li>
+      <li> \c + A sign must always be placed before a number produced by a
+            signed conversion.  A + overrides a space if both are
+            used.</li>
+      </ul>
+      
+   -   An optional decimal digit string specifying a minimum field width.
+       If the converted value has fewer characters than the field width, it
+       will be padded with spaces on the left (or right, if the left-adjust­
+       ment flag has been given) to fill out the field width.
+   -   An optional precision, in the form of a period . followed by an
+       optional digit string.  If the digit string is omitted, the
+       precision is taken as zero.  This gives the minimum number of
+       digits to appear for d, i, o, u, x, and X conversions, or the
+       maximum number of characters to be printed from a string for \c s
+       conversions.
+   -   An optional \c l length modifier, that specifies that the
+       argument for the d, i, o, u, x, or X conversion is a \c "long int"
+       rather than \c int.
+   -   A character that specifies the type of conversion to be applied.
+
+   The conversion specifiers and their meanings are:
+
+   - \c diouxX The int (or appropriate variant) argument is converted
+           to signed decimal (d and i), unsigned octal (o), unsigned
+           decimal (u), or unsigned hexadecimal (x and X) notation.
+           The letters "abcdef" are used for x conversions; the
+           letters "ABCDEF" are used for X conversions.  The
+           precision, if any, gives the minimum number of digits that
+           must appear; if the converted value requires fewer digits,
+           it is padded on the left with zeros.
+   - \c p  The <tt>void *</tt> argument is taken as an unsigned integer,
+           and converted similarly as a <tt>%\#x</tt> command would do.
+   - \c c  The \c int argument is converted to an \c "unsigned char", and the
+           resulting character is written.
+   - \c s  The \c "char *" argument is expected to be a pointer to an array
+           of character type (pointer to a string).  Characters from
+           the array are written up to (but not including) a
+           terminating NUL character; if a precision is specified, no
+           more than the number specified are written.  If a precision
+           is given, no null character need be present; if the
+           precision is not specified, or is greater than the size of
+           the array, the array must contain a terminating NUL
+           character.
+   - \c %  A \c % is written.  No argument is converted.  The complete
+           conversion specification is "%%".
+   - \c eE The double argument is rounded and converted in the format
+           \c "[-]d.ddde±dd" where there is one digit before the
+           decimal-point character and the number of digits after it
+           is equal to the precision; if the precision is missing, it
+           is taken as 6; if the precision is zero, no decimal-point
+           character appears.  An \e E conversion uses the letter \c 'E'
+           (rather than \c 'e') to introduce the exponent.  The exponent
+           always contains two digits; if the value is zero,
+           the exponent is 00.
+   - \c fF The double argument is rounded and converted to decimal notation
+           in the format \c "[-]ddd.ddd", where the number of digits after the
+           decimal-point character is equal to the precision specification.
+           If the precision is missing, it is taken as 6; if the precision
+           is explicitly zero, no decimal-point character appears.  If a
+           decimal point appears, at least one digit appears before it.
+   - \c gG The double argument is converted in style \c f or \c e (or
+           \c F or \c E for \c G conversions).  The precision
+           specifies the number of significant digits.  If the
+           precision is missing, 6 digits are given; if the precision
+           is zero, it is treated as 1.  Style \c e is used if the
+           exponent from its conversion is less than -4 or greater
+           than or equal to the precision.  Trailing zeros are removed
+           from the fractional part of the result; a decimal point
+           appears only if it is followed by at least one digit.
+   - \c S  Similar to the \c s format, except the pointer is expected to
+           point to a program-memory (ROM) string instead of a RAM string.
+
+   In no case does a non-existent or small field width cause truncation of a
+   numeric field; if the result of a conversion is wider than the field
+   width, the field is expanded to contain the conversion result.
+
+   Since the full implementation of all the mentioned features becomes
+   fairly large, three different flavours of vfprintf() can be
+   selected using linker options.  The default vfprintf() implements
+   all the mentioned functionality except floating point conversions.
+   A minimized version of vfprintf() is available that only implements
+   the very basic integer and string conversion facilities, but none
+   of the additional options that can be specified using conversion
+   flags (these flags are parsed correctly from the format
+   specification, but then simply ignored).  This version can be
+   requested using the following \ref gcc_minusW "compiler options":
+
+   \code
+   -Wl,-u,vfprintf -lprintf_min
+   \endcode
+
+   If the full functionality including the floating point conversions
+   is required, the following options should be used:
+
+   \code
+   -Wl,-u,vfprintf -lprintf_flt -lm
+   \endcode
+
+   \par Limitations:
+   - The specified width and precision can be at most 127.
+   - For floating-point conversions, trailing digits will be lost if
+     a number close to DBL_MAX is converted with a precision > 0.
+
+ */
+
+extern int	vfprintf(FILE * ONE __stream, const char * NTS __fmt, va_list __ap);
+
+/**
+   Variant of \c vfprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	vfprintf_P(FILE * ONE __stream, const char * NTS __fmt, va_list __ap);
+
+/**
+   The function \c fputc sends the character \c c (though given as type
+   \c int) to \c stream.  It returns the character, or \c EOF in case
+   an error occurred.
+*/
+extern int	fputc(int __c, FILE * ONE __stream);
+
+#if !defined(__DOXYGEN__)
+
+/* putc() function implementation, required by standard */
+extern int	putc(int __c, FILE * ONE __stream);
+
+/* putchar() function implementation, required by standard */
+extern int	putchar(int __c);
+
+#endif /* not __DOXYGEN__ */
+
+/**
+   The macro \c putc used to be a "fast" macro implementation with a
+   functionality identical to fputc().  For space constraints, in
+   \c avr-libc, it is just an alias for \c fputc.
+*/
+#define putc(__c, __stream) fputc(__c, __stream)
+
+/**
+   The macro \c putchar sends character \c c to \c stdout.
+*/
+#define putchar(__c) fputc(__c, stdout)
+
+/**
+   The function \c printf performs formatted output to stream
+   \c stderr.  See \c vfprintf() for details.
+*/
+extern int	printf(const char * NTS __fmt, ...);
+
+/**
+   Variant of \c printf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	printf_P(const char * NTS __fmt, ...);
+
+/**
+   The function \c vprintf performs formatted output to stream
+   \c stdout, taking a variable argument list as in vfprintf().
+
+   See vfprintf() for details.
+*/
+extern int	vprintf(const char * NTS __fmt, va_list __ap);
+
+/**
+   Variant of \c printf() that sends the formatted characters
+   to string \c s.
+*/
+extern int	sprintf(char * NTS __s, const char * NTS __fmt, ...);
+
+/**
+   Variant of \c sprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	sprintf_P(char * NTS __s, const char * NTS __fmt, ...);
+
+/**
+   Like \c sprintf(), but instead of assuming \c s to be of infinite
+   size, no more than \c n characters (including the trailing NUL
+   character) will be converted to \c s.
+
+   Returns the number of characters that would have been written to
+   \c s if there were enough space.
+*/
+extern int	snprintf(char * NTS __s, size_t __n, const char * NTS __fmt, ...);
+
+/**
+   Variant of \c snprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	snprintf_P(char * NTS __s, size_t __n, const char * NTS __fmt, ...);
+
+/**
+   Like \c sprintf() but takes a variable argument list for the
+   arguments.
+*/
+extern int	vsprintf(char * NTS __s, const char * NTS __fmt, va_list ap);
+
+/**
+   Variant of \c vsprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	vsprintf_P(char * NTS __s, const char * NTS __fmt, va_list ap);
+
+/**
+   Like \c vsprintf(), but instead of assuming \c s to be of infinite
+   size, no more than \c n characters (including the trailing NUL
+   character) will be converted to \c s.
+
+   Returns the number of characters that would have been written to
+   \c s if there were enough space.
+*/
+extern int	vsnprintf(char * NTS __s, size_t __n, const char * NTS __fmt, va_list ap);
+
+/**
+   Variant of \c vsnprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	vsnprintf_P(char * NTS __s, size_t __n, const char * NTS __fmt, va_list ap);
+/**
+   The function \c fprintf performs formatted output to \c stream.
+   See \c vfprintf() for details.
+*/
+extern int	fprintf(FILE * ONE __stream, const char * NTS __fmt, ...);
+
+/**
+   Variant of \c fprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	fprintf_P(FILE * ONE __stream, const char * NTS __fmt, ...);
+
+/**
+   Write the string pointed to by \c str to stream \c stream.
+
+   Returns 0 on success and EOF on error.
+*/
+extern int	fputs(const char * NTS __str, FILE * ONE __stream);
+
+/**
+   Variant of fputs() where \c str resides in program memory.
+*/
+extern int	fputs_P(const char * NTS __str, FILE * ONE __stream);
+
+/**
+   Write the string pointed to by \c str, and a trailing newline
+   character, to \c stdout.
+*/
+extern int	puts(const char * NTS __str);
+
+/**
+   Variant of puts() where \c str resides in program memory.
+*/
+extern int	puts_P(const char * NTS __str);
+
+/**
+   Write \c nmemb objects, \c size bytes each, to \c stream.
+   The first byte of the first object is referenced by \c ptr.
+
+   Returns the number of objects successfully written, i. e.
+   \c nmemb unless an output error occured.
+ */
+extern size_t	fwrite(const void *__ptr, size_t __size, size_t __nmemb,
+		       FILE * ONE __stream);
+
+/**
+   The function \c fgetc reads a character from \c stream.  It returns
+   the character, or \c EOF in case end-of-file was encountered or an
+   error occurred.  The routines feof() or ferror() must be used to
+   distinguish between both situations.
+*/
+extern int	fgetc(FILE * ONE __stream);
+
+#if !defined(__DOXYGEN__)
+
+/* getc() function implementation, required by standard */
+extern int	getc(FILE * ONE __stream);
+
+/* getchar() function implementation, required by standard */
+extern int	getchar(void);
+
+#endif /* not __DOXYGEN__ */
+
+/**
+   The macro \c getc used to be a "fast" macro implementation with a
+   functionality identical to fgetc().  For space constraints, in
+   \c avr-libc, it is just an alias for \c fgetc.
+*/
+#define getc(__stream) fgetc(__stream)
+
+/**
+   The macro \c getchar reads a character from \c stdin.  Return
+   values and error handling is identical to fgetc().
+*/
+#define getchar() fgetc(stdin)
+
+/**
+   The ungetc() function pushes the character \c c (converted to an
+   unsigned char) back onto the input stream pointed to by \c stream.
+   The pushed-back character will be returned by a subsequent read on
+   the stream.
+
+   Currently, only a single character can be pushed back onto the
+   stream.
+   
+   The ungetc() function returns the character pushed back after the
+   conversion, or \c EOF if the operation fails.  If the value of the
+   argument \c c character equals \c EOF, the operation will fail and
+   the stream will remain unchanged.
+*/
+extern int	ungetc(int __c, FILE * ONE __stream);
+
+/**
+   Read at most <tt>size - 1</tt> bytes from \c stream, until a
+   newline character was encountered, and store the characters in the
+   buffer pointed to by \c str.  Unless an error was encountered while
+   reading, the string will then be terminated with a \c NUL
+   character.
+
+   If an error was encountered, the function returns NULL and sets the
+   error flag of \c stream, which can be tested using ferror().
+   Otherwise, a pointer to the string will be returned.  */
+extern char	*fgets(char * NTS __str, int __size, FILE * ONE __stream);
+
+/**
+   Similar to fgets() except that it will operate on stream \c stdin,
+   and the trailing newline (if any) will not be stored in the string.
+   It is the caller's responsibility to provide enough storage to hold
+   the characters read.  */
+extern char	*gets(char * NTS __str);
+
+/**
+   Read \c nmemb objects, \c size bytes each, from \c stream,
+   to the buffer pointed to by \c ptr.
+
+   Returns the number of objects successfully read, i. e.
+   \c nmemb unless an input error occured or end-of-file was
+   encountered.  feof() and ferror() must be used to distinguish
+   between these two conditions.
+ */
+extern size_t	fread(void *__ptr, size_t __size, size_t __nmemb,
+		      FILE * ONE __stream);
+
+/**
+   Clear the error and end-of-file flags of \c stream.
+ */
+extern void	clearerr(FILE * ONE __stream);
+
+#if !defined(__DOXYGEN__)
+/* fast inlined version of clearerr() */
+#define clearerror(s) do { (s)->flags &= ~(__SERR | __SEOF); } while(0)
+#endif /* !defined(__DOXYGEN__) */
+
+/**
+   Test the end-of-file flag of \c stream.  This flag can only be cleared
+   by a call to clearerr().
+ */
+extern int	feof(FILE * ONE __stream);
+
+#if !defined(__DOXYGEN__)
+/* fast inlined version of feof() */
+#define feof(s) ((s)->flags & __SEOF)
+#endif /* !defined(__DOXYGEN__) */
+
+/**
+   Test the error flag of \c stream.  This flag can only be cleared
+   by a call to clearerr().
+ */
+extern int	ferror(FILE * ONE __stream);
+
+#if !defined(__DOXYGEN__)
+/* fast inlined version of ferror() */
+#define ferror(s) ((s)->flags & __SERR)
+#endif /* !defined(__DOXYGEN__) */
+
+/**
+   Formatted input.  This function is the heart of the \c scanf
+   family of functions.
+
+   Characters are read from \c stream and processed in a way
+   described by \c fmt.  Conversion results will be assigned to the
+   parameters passed via \c ap.
+
+   The format string \c fmt is scanned for conversion specifications.
+   Anything that doesn't comprise a conversion specification is taken
+   as text that is matched literally against the input.  White space
+   in the format string will match any white space in the data
+   (including none), all other characters match only itself.
+   Processing is aborted as soon as the data and format string no
+   longer match, or there is an error or end-of-file condition on
+   \c stream.
+
+   Most conversions skip leading white space before starting the
+   actual conversion.
+
+   Conversions are introduced with the character \b %.  Possible
+   options can follow the \b %:
+
+   - a \c * indicating that the conversion should be performed but
+     the conversion result is to be discarded; no parameters will
+     be processed from \c ap,
+   - the character \c h indicating that the argument is a pointer
+     to <tt>short int</tt> (rather than <tt>int</tt>),
+   - the character \c l indicating that the argument is a pointer
+     to <tt>long int</tt> (rather than <tt>int</tt>, for integer
+     type conversions), or a pointer to \c double (for floating
+     point conversions).
+
+   In addition, a maximal field width may be specified as a nonzero
+   positive decimal integer, which will restrict the conversion to at
+   most this many characters from the input stream.  This field width
+   is limited to at most 127 characters which is also the default
+   value (except for the <tt>%c</tt> conversion that defaults to 1).
+
+   The following conversion flags are supported:
+
+   - \c % Matches a literal \c % character.  This is not a conversion.
+   - \c d Matches an optionally signed decimal integer; the next
+     pointer must be a pointer to \c int.
+   - \c i Matches an optionally signed integer; the next pointer must
+     be a pointer to \c int.  The integer is read in base 16 if it
+     begins with \b 0x or \b 0X, in base 8 if it begins with \b 0, and
+     in base 10 otherwise.  Only characters that correspond to the
+     base are used.
+   - \c o Matches an octal integer; the next pointer must be a pointer to
+     <tt>unsigned int</tt>.
+   - \c u Matches an optionally signed decimal integer; the next
+     pointer must be a pointer to <tt>unsigned int</tt>.
+   - \c x Matches an optionally signed hexadecimal integer; the next
+     pointer must be a pointer to <tt>unsigned int</tt>.
+   - \c f Matches an optionally signed floating-point number; the next
+     pointer must be a pointer to \c float.
+   - <tt>e, g, E, G</tt> Equivalent to \c f.
+   - \c s
+     Matches a sequence of non-white-space characters; the next pointer
+     must be a pointer to \c char, and the array must be large enough to
+     accept all the sequence and the terminating \c NUL character.  The
+     input string stops at white space or at the maximum field width,
+     whichever occurs first.
+   - \c c
+     Matches a sequence of width count characters (default 1); the next
+     pointer must be a pointer to \c char, and there must be enough room
+     for all the characters (no terminating \c NUL is added).  The usual
+     skip of leading white space is suppressed.  To skip white space
+     first, use an explicit space in the format.
+   - \c [
+     Matches a nonempty sequence of characters from the specified set
+     of accepted characters; the next pointer must be a pointer to \c
+     char, and there must be enough room for all the characters in the
+     string, plus a terminating \c NUL character.  The usual skip of
+     leading white space is suppressed.  The string is to be made up
+     of characters in (or not in) a particular set; the set is defined
+     by the characters between the open bracket \c [ character and a
+     close bracket \c ] character.  The set excludes those characters
+     if the first character after the open bracket is a circumflex
+     \c ^.  To include a close bracket in the set, make it the first
+     character after the open bracket or the circumflex; any other
+     position will end the set.  The hyphen character \c - is also
+     special; when placed between two other characters, it adds all
+     intervening characters to the set.  To include a hyphen, make it
+     the last character before the final close bracket.  For instance,
+     <tt>[^]0-9-]</tt> means the set of <em>everything except close
+     bracket, zero through nine, and hyphen</em>.  The string ends
+     with the appearance of a character not in the (or, with a
+     circumflex, in) set or when the field width runs out.
+   - \c p
+     Matches a pointer value (as printed by <tt>%p</tt> in printf()); the
+     next pointer must be a pointer to \c void.
+   - \c n
+     Nothing is expected; instead, the number of characters consumed
+     thus far from the input is stored through the next pointer, which
+     must be a pointer to \c int.  This is not a conversion, although it
+     can be suppressed with the \c * flag.
+
+     These functions return the number of input items assigned, which
+     can be fewer than provided for, or even zero, in the event of a
+     matching failure.  Zero indicates that, while there was input
+     available, no conversions were assigned; typically this is due
+     to an invalid input character, such as an alphabetic character
+     for a <tt>%d</tt> conversion.  The value \c EOF is returned if an input
+     failure occurs before any conversion such as an end-of-file
+     occurs.  If an error or end-of-file occurs after conversion has
+     begun, the number of conversions which were successfully
+     completed is returned.
+
+     By default, all the conversions described above are available
+     except the floating-point conversions, and the <tt>\%[</tt> conversion.
+     These conversions will be available in the extended version
+     provided by the library \c libscanf_flt.a.  Note that either of
+     these conversions requires the availability of a buffer that
+     needs to be obtained at run-time using malloc().  If this buffer
+     cannot be obtained, the operation is aborted, returning the
+     value \c EOF.  To link a program against the extended version,
+     use the following compiler flags in the link stage:
+
+     \code
+     -Wl,-u,vfscanf -lscanf_flt -lm
+     \endcode
+
+     A third version is available for environments that are tight
+     on space.  This version is provided in the library
+     \c libscanf_min.a, and can be requested using the following
+     options in the link stage:
+
+     \code
+     -Wl,-u,vfscanf -lscanf_min -lm
+     \endcode
+
+     In addition to the restrictions of the standard version, this
+     version implements no field width specification, no conversion
+     assignment suppression flag (\c *), no <tt>%n</tt> specification, and
+     no general format character matching at all.  All characters in
+     \c fmt that do not comprise a conversion specification will
+     simply be ignored, including white space (that is normally used
+     to consume \e any amount of white space in the input stream).
+     However, the usual skip of initial white space in the formats
+     that support it is implemented.
+*/
+extern int	vfscanf(FILE * ONE __stream, const char * NTS __fmt, va_list __ap);
+
+/**
+   Variant of vfscanf() using a \c fmt string in program memory.
+ */
+extern int	vfscanf_P(FILE * ONE __stream, const char * NTS __fmt, va_list __ap);
+
+/**
+   The function \c fscanf performs formatted input, reading the
+   input data from \c stream.
+
+   See vfscanf() for details.
+ */
+extern int	fscanf(FILE * ONE __stream, const char * NTS __fmt, ...);
+
+/**
+   Variant of fscanf() using a \c fmt string in program memory.
+ */
+extern int	fscanf_P(FILE * ONE __stream, const char * NTS __fmt, ...);
+
+/**
+   The function \c scanf performs formatted input from stream \c stdin.
+
+   See vfscanf() for details.
+ */
+extern int	scanf(const char * NTS __fmt, ...);
+
+/**
+   Variant of scanf() where \c fmt resides in program memory.
+ */
+extern int	scanf_P(const char * NTS __fmt, ...);
+
+/**
+   The function \c vscanf performs formatted input from stream
+   \c stdin, taking a variable argument list as in vfscanf().
+
+   See vfscanf() for details.
+*/
+extern int	vscanf(const char * NTS __fmt, va_list __ap);
+
+/**
+   The function \c sscanf performs formatted input, reading the
+   input data from the buffer pointed to by \c buf.
+
+   See vfscanf() for details.
+ */
+extern int	sscanf(const char * NTS __buf, const char * NTS __fmt, ...);
+
+/**
+   Variant of sscanf() using a \c fmt string in program memory.
+ */
+extern int	sscanf_P(const char * NTS __buf, const char * NTS __fmt, ...);
+
+#if defined(__DOXYGEN__)
+/**
+   Flush \c stream.
+
+   This is a null operation provided for source-code compatibility
+   only, as the standard IO implementation currently does not perform
+   any buffering.
+ */
+extern int	fflush(FILE * ONE stream);
+#else
+static __inline__ int fflush(FILE * ONE stream __attribute__((unused)))
+{
+	return 0;
+}
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+/*
+ * The following constants are currently not used by avr-libc's
+ * stdio subsystem.  They are defined here since the gcc build
+ * environment expects them to be here.
+ */
+#define SEEK_SET 0
+#define SEEK_CUR 1
+#define SEEK_END 2
+
+#endif /* __ASSEMBLER */
+
+#endif /* _STDLIB_H_ */
diff --git a/tos/lib/printf/generic_printf.h b/tos/lib/printf/generic_printf.h
new file mode 100644
index 00000000..3c14d561
--- /dev/null
+++ b/tos/lib/printf/generic_printf.h
@@ -0,0 +1,482 @@
+/****************************************************************
+  KPIT Cummins Infosystems Ltd, Pune, India. 1-April-2006.
+
+  This program is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+ *****************************************************************/
+
+/*
+   Written By:
+   Shrirang Khishti <shrirangk@kpitcummins.com>.
+
+   This is a smaller version of printf
+   Positive points about this function
+   1. Reduces code size considerably ,very useful in embedded applications
+   2. No malloc calls are used
+   3. Supports almost all the functionalities of GNU std printf routine.
+   4. If user dont want float_support in this customized printf
+   just undef macro float_support
+ */
+
+#ifndef  __M16C62P_PRINTF_H__
+#define __M16C62P_PRINTF_H__
+#include <stdarg.h>
+#include <string.h>
+
+#define printf _printf
+extern int lowlevel_putc(int c); 
+
+int left_val,right_val;
+
+#define condition *format!='f'&&*format!='d'&&*format!='c'&&*format!='s'&&*format!='l'&&*format!='u'&&*format!='\0'&&*format!=' '&&*format!='i'&&*format!='x'&&*format!='X'&&*format!='o'&&*format!='%'&&*format!='p'
+
+#define float_support
+
+long temp_arr[]={100000,10,100,1000,10000,100000,1000000,10000000,100000000,1000000000};
+
+
+/**
+ * @fn
+ * @brief 
+ *
+ * @param c
+ */
+int
+_putchar(int c)
+{     
+  /* Convert CR to CR/LF */
+  if (c == '\n')
+    lowlevel_putc('\r');
+  lowlevel_putc(c);
+
+  return c;
+}
+
+
+/**
+ * @fn void _puts(const char *tempStr)
+ * @brief Prints a NULL-erminated string on UART 1
+ *
+ * @param s The string to output
+ *
+ */
+int
+_puts(const char *s)
+{
+  while( *s != '\0' )
+    _putchar(*s++);
+
+  return 0;
+}
+
+
+/**
+ * @fn void strrev(char *str)
+ * @brief Reverses a string
+ *
+ * @param str The string to reverse
+ */
+void
+strrev(char *str)
+{
+  char *temp, c;
+  int len=strlen(str) ;
+  temp = str + len -1;
+
+  while(str < temp ) {
+
+    c = *str;
+    *str = *temp;
+
+    *temp = c;
+    str++;
+    temp--;
+  }
+}
+
+
+static void print_hex_oct( long int temp_var,int _div,int corr_factor,int ret_val,int sign,int *cntr_val)
+{
+  unsigned long int i1,temp=temp_var;
+  int cntr=0,neg_flag=0;
+  char s1[40];
+
+  if(sign==1&&temp_var<0)
+  {
+    temp=-temp_var;
+    neg_flag=1;
+  }
+  if(temp==0)
+    s1[cntr++]='0';
+  while(temp>0)
+  {
+    i1=temp%_div;
+    temp=temp/_div;
+    if(i1<=9)
+      s1[cntr]=i1+'0';
+    else
+      s1[cntr]=i1+corr_factor-9;
+    cntr++;
+  }
+
+  while((left_val-(right_val>cntr?right_val:cntr+neg_flag))>0)
+  {
+    _putchar(' ');
+    left_val--;
+		(*cntr_val)++;
+	}
+
+	while(right_val-cntr>0)
+	{
+		s1[cntr++]='0';
+	}
+
+	if(neg_flag==1)
+	s1[cntr++]='-';
+
+	s1[cntr]='\0';
+	strrev(s1);
+	_puts(s1);
+	(*cntr_val)+=strlen(s1);
+}
+
+
+#ifdef float_support
+static void float_print(long double f1,long double f2,int multi,int *cntr_val)
+{
+	int temp,cntr=0,i1,neg_flag=0;
+	char s1[10];
+
+	 if(f1<0)
+	 {
+		 f1=f1*-1;
+		 neg_flag=1;
+		 f2=f1;
+	 }
+	 temp=(int)f1;
+
+	 f1=f1-temp;
+     f1=f1*multi;
+
+     temp=f1;
+
+     if(temp==0)
+    	s1[cntr++]='0';
+     while(temp>0)
+     {
+         i1=temp%10;
+         temp=temp/10;
+         s1[cntr]=i1+0x30;
+         cntr++;
+     }
+
+     while(right_val<9&&(right_val -cntr)>0)
+	   s1[cntr++]='0';
+	   s1[cntr]='.';
+	   cntr++;
+
+	   temp=(int)f2;
+	 if(temp==0)
+		s1[cntr++]='0';
+	 while(temp>0)
+	 {
+	      i1=temp%10;
+	      temp=temp/10;
+	      s1[cntr]=i1+0x30;
+	      cntr++;
+	 }
+
+	 while(left_val-- -cntr>0)
+		{
+			_putchar(' ');
+			(*cntr_val)++;
+		}
+			if(neg_flag==1)
+	    s1[cntr++]='-';
+	    s1[cntr]='\0';
+	    cntr--;
+	 	strrev(s1);
+    	_puts(s1);
+		(*cntr_val)+=strlen(s1);
+   		neg_flag=0;
+}
+
+#endif // float_support
+
+static int format_val(char *temp,long float_flag,int *cntr_val,int flag)
+{
+left_val=0;
+right_val=0;
+	if(*temp=='\0'&&flag==1)
+	{
+		right_val=3;
+		return 0;
+	}
+	while(*temp!='.'&&*temp!='\0')
+	{
+		if(*temp<'0'||*temp>'9')
+		{
+			while(*temp)
+			{
+				_putchar(*temp++);
+				(*cntr_val)++;
+			}
+			return -1;
+		}
+		else
+		left_val=left_val*10+*temp-'0';
+    	 temp++;
+	}
+    if(*temp)
+		temp++;
+		else
+		return left_val;
+	while(*temp)
+	{
+	if(*temp<'0'||*temp>'9')
+	{
+	while(*temp)
+		{
+			_putchar(*temp++);
+			(*cntr_val)++;
+		}
+	return -1;
+	}
+	else
+	right_val=right_val*10+*temp-'0';
+     temp++;
+	}
+
+return 0;
+}
+
+
+/**
+ * @fn int _printf(const char *format, ...)
+ * @brief Prints a formatted string on UART1
+ *
+ * @param format The string
+ */
+int _printf(const char *format, ...)
+{
+   int format_cntr=0;
+   char temp_str[20];
+   int return_flag=0,cntr_val;
+   long double f1,f2;
+   char *str_temp;
+   int *cntr=&cntr_val;
+
+   va_list ap;
+   va_start(ap, format);
+   *cntr=0;
+   while(*format) {
+     temp_str[format_cntr]='\0';
+     if(*format=='%')
+     {
+       *format++;
+       while(*format==' ')
+       {
+	 format++;
+	 _putchar(' ');
+       }
+       while(condition)
+
+       {
+	 temp_str[format_cntr++]=*format++;
+       }
+       temp_str[format_cntr]='\0';
+       if(*format=='%')
+       {
+	 _putchar('%');
+	 (*cntr)++;
+	 format_cntr=0;
+	 format++;
+	 continue;
+       }
+
+       /************** print unsigned ****************/
+       else if(*format=='u')
+       {
+	 return_flag=format_val(temp_str,0,cntr,0);
+	 if(return_flag!=-1)
+
+	   print_hex_oct(va_arg(ap,unsigned int),10,0,return_flag,0,cntr);
+
+	 else
+	 {
+	   _putchar(*format);
+	   (*cntr)++;
+	 }
+	 format++;
+	 format_cntr=0;
+	 continue;
+       }
+       /*********** Print Integer Values **************/
+       else if(*format=='d'||*format=='i')
+       {
+	 return_flag=format_val(temp_str,0,cntr,0);
+
+	 if(return_flag!=-1)
+
+	   print_hex_oct(va_arg(ap,int),10,0,return_flag,1,cntr);
+
+	 else
+	 {
+	   _putchar(*format);
+	   (*cntr)++;
+	 }
+	 format++;
+	 format_cntr=0;
+	 continue;
+
+       }
+
+       /*********** Print hex,Octal values ******************/
+       else if(*format=='x'||*format=='X'||*format=='o'||*format=='p')
+       {
+	 return_flag=format_val(temp_str,0,cntr,0);
+	 if(return_flag!=-1) {
+
+	   if(*format=='x'||*format=='p')
+	     print_hex_oct(va_arg(ap,unsigned int),16,0x60,return_flag,0,cntr);
+	   else if(*format=='X')
+	     print_hex_oct(va_arg(ap,unsigned int),16,0x40,return_flag,0,cntr);
+	   else
+	     print_hex_oct(va_arg(ap,unsigned int),8,0,return_flag,0,cntr);
+	 }
+	 else
+	 {
+	   _putchar(*format);
+	   (*cntr)++;
+	 }
+	 format++;
+	 format_cntr=0;
+	 continue;
+       }
+
+       /************ Character printing ****************88*/
+       else if(*format=='c')
+       {
+	 return_flag=format_val(temp_str,0,cntr,0);
+	 if(return_flag!=-1)
+	 {
+	   while(return_flag-->1)
+	   {
+	     _putchar(' ');
+	     (*cntr)++;
+	   }
+	   _putchar(va_arg(ap,int));
+	   (*cntr)+=2;
+	 }
+	 else
+	 {
+	   _putchar(*format);
+	   (*cntr)++;
+	 }
+	 format++;
+	 format_cntr=0;
+	 continue;
+       }
+
+       /*************** Print String *****************/
+       else if(*format=='s')
+       {
+	 return_flag=format_val(temp_str,0,cntr,0);
+	 if(return_flag!=-1)
+	 {
+	   str_temp=va_arg(ap,char*);
+
+	   while((return_flag--  -(int) strlen(str_temp))>0)
+	   {
+	     _putchar(' ');
+	     (*cntr)++;
+
+	   }
+	   _puts(str_temp);
+	   (*cntr)+=strlen(str_temp);
+	 }
+	 else
+	 {
+	   _putchar(*format);
+	   (*cntr)++;
+	 }
+	 format++;
+	 format_cntr=0;
+	 continue;
+
+       }
+       /*************** Print floating point number *****************/
+       else if(*format=='f'||(*format=='l'&&*(format+1)=='f'))
+       {
+
+	 return_flag=format_val(temp_str,1,cntr,1);
+	 if(return_flag!=-1)
+	 {
+	   if(*format=='l')
+	   {
+	     f1=va_arg(ap,long double);
+	     format+=2;
+	   }
+	   else
+	   {
+	     f1=va_arg(ap,double);
+	     format++;
+	   }
+	   f2=f1;
+#ifdef float_support
+	   right_val++;
+	   float_print(f1,f2,temp_arr[right_val%10],cntr);
+#endif
+	 }
+	 else
+	 {
+	   _putchar(*format++);
+	   (*cntr)++;
+	 }
+	 format_cntr=0;
+	 continue;
+       }
+       else if(*format=='l'&&((*(format+1)=='d')||(*(format+1)=='u')))
+       {
+	 return_flag=format_val(temp_str,0,cntr,0);
+
+	 if((return_flag=-1)&&(*(format+1)=='d'))
+	 {
+	   print_hex_oct(va_arg(ap,long int),10,0x00,return_flag,1,cntr);
+	 }
+
+	 else if((return_flag=-1)&&(*(format+1)=='u'))
+	 {
+	   print_hex_oct(va_arg(ap,unsigned long int),10,0x00,return_flag,0,cntr);
+	 }
+
+	 else
+	 {
+	   _putchar(*format);
+	   _putchar(*(format+1));
+	   (*cntr)+=2;
+	 }
+	 format+=2;
+	 format_cntr=0;
+	 continue;
+       }
+       else
+       {
+	 _puts(temp_str);
+	 format_cntr=0;
+	 continue;
+       }
+     }
+     _putchar(*format++);
+
+     (*cntr)++;
+   }
+   va_end(ap);
+   return cntr_val;
+}
+
+
+#endif // __M16C62P_PRINTF_H__
+
diff --git a/tos/lib/printf/printf.h b/tos/lib/printf/printf.h
new file mode 100644
index 00000000..3f7e1ab2
--- /dev/null
+++ b/tos/lib/printf/printf.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.17 $
+ * @date $Date: 2010-06-29 22:07:50 $
+ */
+
+#ifndef PRINTF_H
+#define PRINTF_H
+
+#ifndef PRINTF_BUFFER_SIZE
+#define PRINTF_BUFFER_SIZE 250 
+#endif
+
+#if PRINTF_BUFFER_SIZE > 255
+  #define PrintfQueueC	BigQueueC
+  #define PrintfQueue	BigQueue
+#else
+  #define PrintfQueueC	QueueC
+  #define PrintfQueue	Queue
+#endif
+
+#ifdef _H_msp430hardware_h
+  #include <stdio.h>
+#else
+#ifdef _H_atmega128hardware_H
+  #include "avr_stdio.h"
+#else
+#ifdef __M16C62PHARDWARE_H__ 
+  #include "m16c62p_printf.h"
+#else
+  #include "generic_printf.h"
+#endif
+#endif
+#endif
+#include "message.h"
+int printfflush();
+
+#ifndef PRINTF_MSG_LENGTH
+#define PRINTF_MSG_LENGTH	28
+#endif
+typedef nx_struct printf_msg {
+  nx_uint8_t buffer[PRINTF_MSG_LENGTH];
+} printf_msg_t;
+
+enum {
+  AM_PRINTF_MSG = 100,
+};
+
+#endif //PRINTF_H
+
diff --git a/tos/lib/rfxlink/README b/tos/lib/rfxlink/README
new file mode 100644
index 00000000..1505ae84
--- /dev/null
+++ b/tos/lib/rfxlink/README
@@ -0,0 +1,76 @@
+
+The radio driver interfaces have a set of generic configuration options. 
+Some of these are set in the platforms/xxx/chips/yyy/RadioConfig.h header 
+file (see the platforms/iris/chips/rf230/RadioConfig.h for example), others 
+can be set in your Makefile.
+
+TFRAMES_ENABLED:
+
+If enabled, then tinyos frames are enabled, so 6lowpan will not work. See 
+TEP125 for the details.
+
+LOW_POWER_LISTENING:
+
+If enabled, then the radio will duty cycle the radio (turn it off and on). 
+See TEP105 for the details.
+
+SLOTTED_MAC:
+
+There are two CA (collision avoidance) algorithms: one is the simple random 
+backoff  just like the one used in the CC2420 driver. The other one is a 
+slotted time sync based version where each node makes a guarantee that only 
+at a given time within a time slot (e.g. 1 ms) they will ever start to 
+transmit. This value is monitored by nearby motes (no payload overhead) and 
+they preemptively avoid these time instances. This greatly reduces the 
+chance that two motes will start to transmit within 50-100 microsecs to 
+each other, so the CCA (clear channel assessment) will become much more 
+efficient. This slotted behavior can enabled by defining SLOTTED_MAC.
+
+RADIO_DEBUG:
+
+If enabled, then every component in the radio stack will make sure that 
+everything goes as intended via asserts. For example, we check that certain 
+calls are not made in certain states, the radio hardware responds according 
+to the datasheet, etc. Use the RADIO_ASSERT macro defined in the RadioAssert.h
+and make sure that the AssertC from lib/diagmsg is included in your 
+application. All assert violations are reported over the serial interface. 
+You can use the net.tinyos.util.DiagMsg java application to display 
+diagnostic messages.
+
+RADIO_DEBUG_MESSAGES:
+
+If enabled, then the radio driver will print out all received and 
+transmitted messages via the DiagMsg interface. This feature is used in the 
+RF230Sniffer appliaction.
+
+TRAFFIC_MONITOR:
+
+If enabled, the TrafficMonitorLayer is included in the stack which keeps
+track of the average number of bytes sent, bytes received, the number of 
+transmission errors, and the number of neighboors. If RADIO_DEBUG is enabled
+then this information is also printed.
+
+typedef TRadio:
+
+The radio stack uses a single hardware alarm/counter. The resolution of 
+this counter is platform specific and should be set just like the T32khz or 
+TMilli time resolution types. All time stamps and time related information 
+are recorded in this resolution within the driver.
+
+RADIO_ALARM_MICROSEC:
+
+This should be set to the number of radio alarm ticks per one microsecond. 
+
+RADIO_ALARM_MILLI_EXP:
+
+The base two logarithm of the number of radio alarm ticks per one 
+millisecond.
+
+SOFTWAREACK_TIMEOUT:
+
+The number of microseconds the driver should wait for a software 
+acknowledgement on the sender side. If your SPI bus is slow, then it will 
+take more time to download and upload the message from/to the radio chip, 
+so you need to increase this wait period. For example, for IRIS->IRIS 
+communication 800 microsec is enough, but for IRIS->TELOS we need 1600 
+because the TELOS in software ack mode is slow to reply with an ack packet.
diff --git a/tos/lib/rfxlink/layers/ActiveMessageConfig.nc b/tos/lib/rfxlink/layers/ActiveMessageConfig.nc
new file mode 100755
index 00000000..4fe00da8
--- /dev/null
+++ b/tos/lib/rfxlink/layers/ActiveMessageConfig.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <ActiveMessageLayer.h>
+
+interface ActiveMessageConfig
+{
+	/** Same as AMPacket.destination */
+	command am_addr_t destination(message_t* msg);
+
+	/** Same as AMPacket.setDestination */
+	command void setDestination(message_t* msg, am_addr_t addr);
+
+	/** Same as AMPacket.source */
+	command am_addr_t source(message_t* msg);
+
+	/** Same as AMPacket.setSource */
+	command void setSource(message_t* msg, am_addr_t addr);
+
+	/** Same as AMPacket.group */
+	command am_group_t group(message_t* msg);
+
+	/** Same as AMPacket.setGroup */
+	command void setGroup(message_t* msg, am_group_t grp);
+
+	/**
+	 * Check if the packet is properly formatted, and if the user 
+	 * forgot to call Packet.clear then format it properly.
+	 * Return SUCCESS if the frame is now properly set up, 
+	 * or FAIL of the send operation should be aborted.
+	 */
+	command error_t checkFrame(message_t* msg);
+}
diff --git a/tos/lib/rfxlink/layers/ActiveMessageLayer.h b/tos/lib/rfxlink/layers/ActiveMessageLayer.h
new file mode 100644
index 00000000..45b3dbd5
--- /dev/null
+++ b/tos/lib/rfxlink/layers/ActiveMessageLayer.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __ACTIVEMESSAGELAYER_H__
+#define __ACTIVEMESSAGELAYER_H__
+
+#include "AM.h"
+
+typedef nx_struct activemessage_header_t
+{
+	nx_am_id_t type;
+} activemessage_header_t;
+
+#endif//__ACTIVEMESSAGELAYER_H__
diff --git a/tos/lib/rfxlink/layers/ActiveMessageLayerC.nc b/tos/lib/rfxlink/layers/ActiveMessageLayerC.nc
new file mode 100755
index 00000000..4bd7abb7
--- /dev/null
+++ b/tos/lib/rfxlink/layers/ActiveMessageLayerC.nc
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2009, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic configuration ActiveMessageLayerC()
+{
+	provides
+	{
+		interface AMPacket;
+		interface Packet;
+		interface AMSend[am_id_t id];
+		interface Receive[am_id_t id];
+		interface Receive as Snoop[am_id_t id];	
+		interface SendNotifier[am_id_t id];
+
+		// for TOSThreads
+		interface Receive as ReceiveDefault[am_id_t id];
+		interface Receive as SnoopDefault[am_id_t id];
+	}
+
+	uses
+	{
+		interface RadioPacket as SubPacket;
+		interface BareSend as SubSend;
+		interface BareReceive as SubReceive;
+		interface ActiveMessageConfig as Config;
+	}
+}
+
+implementation
+{
+	components new ActiveMessageLayerP(), ActiveMessageAddressC;
+	ActiveMessageLayerP.ActiveMessageAddress -> ActiveMessageAddressC;
+
+	AMPacket = ActiveMessageLayerP;
+	Packet = ActiveMessageLayerP;
+	AMSend = ActiveMessageLayerP;
+	Receive = ActiveMessageLayerP.Receive;
+	Snoop = ActiveMessageLayerP.Snoop;
+	SendNotifier = ActiveMessageLayerP;
+
+	ReceiveDefault = ActiveMessageLayerP.ReceiveDefault;
+	SnoopDefault = ActiveMessageLayerP.SnoopDefault;
+
+	SubPacket = ActiveMessageLayerP;
+	SubSend = ActiveMessageLayerP;
+	SubReceive = ActiveMessageLayerP;
+	Config = ActiveMessageLayerP;
+}
diff --git a/tos/lib/rfxlink/layers/ActiveMessageLayerP.nc b/tos/lib/rfxlink/layers/ActiveMessageLayerP.nc
new file mode 100644
index 00000000..6f11df92
--- /dev/null
+++ b/tos/lib/rfxlink/layers/ActiveMessageLayerP.nc
@@ -0,0 +1,284 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ * Author: Chieh-Jan Mike Liang (default interfaces for TOSThreads)
+ */
+
+#include <ActiveMessageLayer.h>
+
+generic module ActiveMessageLayerP()
+{
+	provides
+	{
+		interface RadioPacket;
+		interface AMPacket;
+		interface Packet;
+		interface AMSend[am_id_t id];
+		interface Receive[am_id_t id];
+		interface Receive as Snoop[am_id_t id];	
+		interface SendNotifier[am_id_t id];
+
+		// for TOSThreads
+		interface Receive as ReceiveDefault[am_id_t id];
+		interface Receive as SnoopDefault[am_id_t id];
+	}
+
+	uses
+	{
+		interface RadioPacket as SubPacket;
+		interface BareSend as SubSend;
+		interface BareReceive as SubReceive;
+		interface ActiveMessageConfig as Config;
+		interface ActiveMessageAddress;
+	}
+}
+
+implementation
+{
+	activemessage_header_t* getHeader(message_t* msg)
+	{
+		return ((void*)msg) + call SubPacket.headerLength(msg);
+	}
+
+	void* getPayload(message_t* msg)
+	{
+		return ((void*)msg) + call RadioPacket.headerLength(msg);
+	}
+
+/*----------------- Send -----------------*/
+
+	command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len)
+	{
+		if( len > call Packet.maxPayloadLength() )
+			return EINVAL;
+
+		if( call Config.checkFrame(msg) != SUCCESS )
+			return FAIL;
+
+		call Packet.setPayloadLength(msg, len);
+		call AMPacket.setSource(msg, call AMPacket.address());
+		call AMPacket.setGroup(msg, call AMPacket.localGroup());
+		call AMPacket.setType(msg, id);
+		call AMPacket.setDestination(msg, addr);
+
+		signal SendNotifier.aboutToSend[id](addr, msg);
+
+		return call SubSend.send(msg);
+	}
+
+	inline event void SubSend.sendDone(message_t* msg, error_t error)
+	{
+		signal AMSend.sendDone[call AMPacket.type(msg)](msg, error);
+	}
+
+	inline command error_t AMSend.cancel[am_id_t id](message_t* msg)
+	{
+		return call SubSend.cancel(msg);
+	}
+
+	default event void AMSend.sendDone[am_id_t id](message_t* msg, error_t error)
+	{
+	}
+
+	inline command uint8_t AMSend.maxPayloadLength[am_id_t id]()
+	{
+		return call Packet.maxPayloadLength();
+	}
+
+	inline command void* AMSend.getPayload[am_id_t id](message_t* msg, uint8_t len)
+	{
+		return call Packet.getPayload(msg, len);
+	}
+
+	default event void SendNotifier.aboutToSend[am_id_t id](am_addr_t addr, message_t* msg)
+	{
+	}
+
+/*----------------- Receive -----------------*/
+
+	event message_t* SubReceive.receive(message_t* msg)
+	{
+		am_id_t id = call AMPacket.type(msg);
+		void* payload = getPayload(msg);
+		uint8_t len = call Packet.payloadLength(msg);
+
+		msg = call AMPacket.isForMe(msg) 
+			? signal Receive.receive[id](msg, payload, len)
+			: signal Snoop.receive[id](msg, payload, len);
+
+		return msg;
+	}
+
+	default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len)
+	{
+		return signal ReceiveDefault.receive[id](msg, payload, len);;
+	}
+
+	default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len)
+	{
+		return msg;
+	}
+
+	default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len)
+	{
+		return signal SnoopDefault.receive[id](msg, payload, len);;
+	}
+
+	default event message_t* SnoopDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len)
+	{
+		return msg;
+	}
+
+/*----------------- AMPacket -----------------*/
+
+	inline command am_addr_t AMPacket.address()
+	{
+		return call ActiveMessageAddress.amAddress();
+	}
+ 
+	inline command am_group_t AMPacket.localGroup()
+	{
+		return call ActiveMessageAddress.amGroup();
+	}
+
+	inline command bool AMPacket.isForMe(message_t* msg)
+	{
+		am_addr_t addr = call AMPacket.destination(msg);
+		return addr == call AMPacket.address() || addr == AM_BROADCAST_ADDR;
+	}
+
+	inline command am_addr_t AMPacket.destination(message_t* msg)
+	{
+		return call Config.destination(msg);
+	}
+ 
+	inline command void AMPacket.setDestination(message_t* msg, am_addr_t addr)
+	{
+		call Config.setDestination(msg, addr);
+	}
+
+	inline command am_addr_t AMPacket.source(message_t* msg)
+	{
+		return call Config.source(msg);
+	}
+
+	inline command void AMPacket.setSource(message_t* msg, am_addr_t addr)
+	{
+		call Config.setSource(msg, addr);
+	}
+
+	inline command am_id_t AMPacket.type(message_t* msg)
+	{
+		return getHeader(msg)->type;
+	}
+
+	inline command void AMPacket.setType(message_t* msg, am_id_t type)
+	{
+		getHeader(msg)->type = type;
+	}
+  
+	inline command am_group_t AMPacket.group(message_t* msg) 
+	{
+		return call Config.group(msg);
+	}
+
+	inline command void AMPacket.setGroup(message_t* msg, am_group_t grp)
+	{
+		call Config.setGroup(msg, grp);
+	}
+
+	inline async event void ActiveMessageAddress.changed()
+	{
+	}
+
+/*----------------- RadioPacket -----------------*/
+
+	async command uint8_t RadioPacket.headerLength(message_t* msg)
+	{
+		return call SubPacket.headerLength(msg) + sizeof(activemessage_header_t);
+	}
+
+	async command uint8_t RadioPacket.payloadLength(message_t* msg)
+	{
+		return call SubPacket.payloadLength(msg) - sizeof(activemessage_header_t);
+	}
+
+	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		call SubPacket.setPayloadLength(msg, length + sizeof(activemessage_header_t));
+	}
+
+	async command uint8_t RadioPacket.maxPayloadLength()
+	{
+		return call SubPacket.maxPayloadLength() - sizeof(activemessage_header_t);
+	}
+
+	async command uint8_t RadioPacket.metadataLength(message_t* msg)
+	{
+		return call SubPacket.metadataLength(msg);
+	}
+
+	async command void RadioPacket.clear(message_t* msg)
+	{
+		call SubPacket.clear(msg);
+	}
+
+/*----------------- Packet -----------------*/
+
+	command void Packet.clear(message_t* msg)
+	{
+		call RadioPacket.clear(msg);
+	}
+
+	command uint8_t Packet.payloadLength(message_t* msg)
+	{
+		return call RadioPacket.payloadLength(msg);
+	}
+
+	command void Packet.setPayloadLength(message_t* msg, uint8_t len)
+	{
+		call RadioPacket.setPayloadLength(msg, len);
+	}
+
+	command uint8_t Packet.maxPayloadLength()
+	{
+		return call RadioPacket.maxPayloadLength();
+	}
+
+	command void* Packet.getPayload(message_t* msg, uint8_t len)
+	{
+		if( len > call RadioPacket.maxPayloadLength() )
+			return NULL;
+
+		return ((void*)msg) + call RadioPacket.headerLength(msg);
+	}
+}
diff --git a/tos/lib/rfxlink/layers/AutoResourceAcquireLayerC.nc b/tos/lib/rfxlink/layers/AutoResourceAcquireLayerC.nc
new file mode 100644
index 00000000..da8a5e0b
--- /dev/null
+++ b/tos/lib/rfxlink/layers/AutoResourceAcquireLayerC.nc
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2009, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic module AutoResourceAcquireLayerC()
+{
+	provides
+	{
+		interface BareSend;
+	}
+
+	uses
+	{
+		interface BareSend as SubSend;
+		interface Resource;
+	}
+}
+
+implementation
+{
+	message_t *pending;
+
+	command error_t BareSend.send(message_t* msg)
+	{
+		if( call Resource.immediateRequest() == SUCCESS )
+		{
+			error_t result = call SubSend.send(msg);
+			if( result != SUCCESS )
+				call Resource.release();
+
+			return result;
+		}
+
+		pending = msg;
+		return call Resource.request();
+	}
+
+	event void Resource.granted()
+	{
+		error_t result = call SubSend.send(pending);
+		if( result != SUCCESS )
+		{
+			call Resource.release();
+			signal BareSend.sendDone(pending, result);
+		}
+	}
+
+	event void SubSend.sendDone(message_t* msg, error_t result)
+	{
+		call Resource.release();
+		signal BareSend.sendDone(msg, result);
+	}
+
+	command error_t BareSend.cancel(message_t* msg)
+	{
+		return call SubSend.cancel(msg);
+	}
+}
diff --git a/tos/lib/rfxlink/layers/CsmaConfig.nc b/tos/lib/rfxlink/layers/CsmaConfig.nc
new file mode 100755
index 00000000..7271aad8
--- /dev/null
+++ b/tos/lib/rfxlink/layers/CsmaConfig.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface CsmaConfig
+{
+	/**
+	 * This command is called when the message is transmitted to
+	 * check if it needs software clear channel assesment.
+	 */
+	async command bool requiresSoftwareCCA(message_t* msg);
+}
diff --git a/tos/lib/rfxlink/layers/CsmaLayerC.nc b/tos/lib/rfxlink/layers/CsmaLayerC.nc
new file mode 100755
index 00000000..53b5834e
--- /dev/null
+++ b/tos/lib/rfxlink/layers/CsmaLayerC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic configuration CsmaLayerC()
+{
+	provides
+	{
+		interface RadioSend;
+		interface RadioReceive;
+	}
+	uses
+	{
+		interface RadioSend as SubSend;
+		interface RadioReceive as SubReceive;
+		interface RadioCCA as SubCCA;
+
+		interface CsmaConfig as Config;
+	}
+}
+
+implementation
+{
+	components new CsmaLayerP();
+
+	RadioSend = CsmaLayerP;
+	SubSend = CsmaLayerP;
+	RadioReceive = SubReceive;
+	SubCCA = CsmaLayerP;
+	Config = CsmaLayerP;
+}
diff --git a/tos/lib/rfxlink/layers/CsmaLayerP.nc b/tos/lib/rfxlink/layers/CsmaLayerP.nc
new file mode 100755
index 00000000..ff8a2b74
--- /dev/null
+++ b/tos/lib/rfxlink/layers/CsmaLayerP.nc
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+#include <RadioAssert.h>
+
+generic module CsmaLayerP()
+{
+	provides
+	{
+		interface RadioSend;
+	}
+
+	uses
+	{
+		interface CsmaConfig as Config;
+
+		interface RadioSend as SubSend;
+		interface RadioCCA as SubCCA;
+	}
+}
+
+implementation
+{
+	tasklet_norace message_t *txMsg;
+
+	tasklet_norace uint8_t state;
+	enum
+	{
+		STATE_READY = 0,
+		STATE_CCA_WAIT = 1,
+		STATE_SEND = 2,
+	};
+
+	tasklet_async event void SubSend.ready()
+	{
+		if( state == STATE_READY )
+			signal RadioSend.ready();
+	}
+
+	tasklet_async command error_t RadioSend.send(message_t* msg)
+	{
+		error_t error;
+
+		if( state == STATE_READY )
+		{
+			if( call Config.requiresSoftwareCCA(msg) )
+			{
+				txMsg = msg;
+
+				if( (error = call SubCCA.request()) == SUCCESS )
+					state = STATE_CCA_WAIT;
+			}
+			else if( (error = call SubSend.send(msg)) == SUCCESS )
+				state = STATE_SEND;
+		}
+		else
+			error = EBUSY;
+
+		return error;
+	}
+
+	tasklet_async event void SubCCA.done(error_t error)
+	{
+		RADIO_ASSERT( state == STATE_CCA_WAIT );
+
+		if( error == SUCCESS && (error = call SubSend.send(txMsg)) == SUCCESS )
+			state = STATE_SEND;
+		else
+		{
+			state = STATE_READY;
+			signal RadioSend.sendDone(EBUSY);
+		}
+	}
+
+	tasklet_async event void SubSend.sendDone(error_t error)
+	{
+		RADIO_ASSERT( state == STATE_SEND );
+
+		state = STATE_READY;
+		signal RadioSend.sendDone(error);
+	}
+}
diff --git a/tos/lib/rfxlink/layers/DummyConfig.nc b/tos/lib/rfxlink/layers/DummyConfig.nc
new file mode 100755
index 00000000..e05275c5
--- /dev/null
+++ b/tos/lib/rfxlink/layers/DummyConfig.nc
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface DummyConfig
+{
+	/**
+	 * We need to put something here, but this is not going to get called
+	 */
+	async command void nothing();
+}
diff --git a/tos/lib/rfxlink/layers/DummyLayerC.nc b/tos/lib/rfxlink/layers/DummyLayerC.nc
new file mode 100644
index 00000000..fd3a85f6
--- /dev/null
+++ b/tos/lib/rfxlink/layers/DummyLayerC.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic configuration DummyLayerC()
+{
+	provides
+	{
+		interface SplitControl;
+		interface BareSend;
+		interface BareReceive;
+
+		interface RadioState;
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioCCA;
+		interface RadioPacket;
+
+		interface DummyConfig as UnconnectedConfig;
+	}
+
+	uses 
+	{
+		interface SplitControl as SubControl;
+		interface BareSend as SubBareSend;
+		interface BareReceive as SubBareReceive;
+
+		interface RadioState as SubState;
+		interface RadioSend as SubSend;
+		interface RadioReceive as SubReceive;
+		interface RadioCCA as SubRadioCCA;
+		interface RadioPacket as SubPacket;
+
+		interface DummyConfig as Config;
+	}
+}
+
+implementation
+{
+	RadioState = SubState;
+	RadioSend = SubSend;
+	RadioReceive = SubReceive;
+	RadioCCA = SubRadioCCA;
+	RadioPacket = SubPacket;
+
+	SplitControl = SubControl;
+	BareSend = SubBareSend;
+	BareReceive = SubBareReceive;
+
+	Config = UnconnectedConfig;
+}
diff --git a/tos/lib/rfxlink/layers/Ieee154MessageLayerC.nc b/tos/lib/rfxlink/layers/Ieee154MessageLayerC.nc
new file mode 100644
index 00000000..eeb75dcf
--- /dev/null
+++ b/tos/lib/rfxlink/layers/Ieee154MessageLayerC.nc
@@ -0,0 +1,155 @@
+/*
+ * Copyright (c) 2007-2009, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic module Ieee154MessageLayerC()
+{
+	provides 
+	{
+		interface Packet;
+		interface Ieee154Send;
+		interface Receive as Ieee154Receive;
+		interface SendNotifier;
+	}
+
+	uses
+	{
+		interface Ieee154PacketLayer;
+		interface RadioPacket;
+		interface BareSend as SubSend;
+		interface BareReceive as SubReceive;
+	}
+}
+
+implementation
+{
+	void* getPayload(message_t* msg)
+	{
+		return ((void*)msg) + call RadioPacket.headerLength(msg);
+	}
+
+/*----------------- Packet -----------------*/
+
+	command void Packet.clear(message_t* msg)
+	{
+		call RadioPacket.clear(msg);
+	}
+
+	command uint8_t Packet.payloadLength(message_t* msg)
+	{
+		return call RadioPacket.payloadLength(msg);
+	}
+
+	command void Packet.setPayloadLength(message_t* msg, uint8_t len)
+	{
+		call RadioPacket.setPayloadLength(msg, len);
+	}
+
+	command uint8_t Packet.maxPayloadLength()
+	{
+		return call RadioPacket.maxPayloadLength();
+	}
+
+	command void* Packet.getPayload(message_t* msg, uint8_t len)
+	{
+		if( len > call RadioPacket.maxPayloadLength() )
+			return NULL;
+
+		return getPayload(msg);
+	}
+
+/*----------------- Ieee154Send -----------------*/
+
+	command void * Ieee154Send.getPayload(message_t* msg, uint8_t len)
+	{
+		return call Packet.getPayload(msg, len);
+	}
+
+	command uint8_t Ieee154Send.maxPayloadLength()
+	{
+		return call Packet.maxPayloadLength();
+	}
+
+	command error_t Ieee154Send.cancel(message_t* msg)
+	{
+		return call SubSend.cancel(msg);
+	}
+
+	command error_t Ieee154Send.send(ieee154_saddr_t addr, message_t* msg, uint8_t len)
+	{
+		if( len > call Packet.maxPayloadLength() )
+			return EINVAL;
+
+		// user forgot to call Packet.clear(), maybe we should return EFAIL
+		if( ! call Ieee154PacketLayer.isDataFrame(msg) )
+			call Ieee154PacketLayer.createDataFrame(msg);
+
+		call Packet.setPayloadLength(msg, len);
+	    	call Ieee154PacketLayer.setSrcAddr(msg, call Ieee154PacketLayer.localAddr());
+		call Ieee154PacketLayer.setDestAddr(msg, addr);
+	    	call Ieee154PacketLayer.setDestPan(msg, call Ieee154PacketLayer.localPan());
+		
+    		signal SendNotifier.aboutToSend(addr, msg);
+    	
+    		return call SubSend.send(msg);
+	}
+
+	event void SubSend.sendDone(message_t* msg, error_t error)
+	{
+		signal Ieee154Send.sendDone(msg, error);
+	}
+
+	default event void Ieee154Send.sendDone(message_t* msg, error_t error)
+	{
+	}
+
+	default event void SendNotifier.aboutToSend(am_addr_t addr, message_t* msg)
+	{
+	}
+
+/*----------------- Receive -----------------*/
+
+	event message_t* SubReceive.receive(message_t* msg)
+	{
+		if( call Ieee154PacketLayer.isForMe(msg) )
+			return signal Ieee154Receive.receive(msg,
+				getPayload(msg), call Packet.payloadLength(msg));
+		else
+			return msg;
+	}
+
+	default event message_t* Ieee154Receive.receive(message_t* msg, void* payload, uint8_t len)
+	{
+		return msg;
+	}
+}
diff --git a/tos/lib/rfxlink/layers/Ieee154PacketLayer.h b/tos/lib/rfxlink/layers/Ieee154PacketLayer.h
new file mode 100644
index 00000000..2dc29b6c
--- /dev/null
+++ b/tos/lib/rfxlink/layers/Ieee154PacketLayer.h
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __IEEE154PACKETLAYER_H__
+#define __IEEE154PACKETLAYER_H__
+
+typedef nx_struct ieee154_header_t
+{
+	nxle_uint16_t fcf;
+	nxle_uint8_t dsn;
+	nxle_uint16_t destpan;
+	nxle_uint16_t dest;
+	nxle_uint16_t src;
+} ieee154_header_t;
+
+// These ENUMS were moved to tos/types/Ieee154.h
+/* 
+enum ieee154_fcf_enums {
+	IEEE154_FCF_FRAME_TYPE = 0,
+	IEEE154_FCF_SECURITY_ENABLED = 3,
+	IEEE154_FCF_FRAME_PENDING = 4,
+	IEEE154_FCF_ACK_REQ = 5,
+	IEEE154_FCF_INTRAPAN = 6,
+	IEEE154_FCF_DEST_ADDR_MODE = 10,
+	IEEE154_FCF_SRC_ADDR_MODE = 14,
+};
+
+enum ieee154_fcf_type_enums {
+	IEEE154_TYPE_BEACON = 0,
+	IEEE154_TYPE_DATA = 1,
+	IEEE154_TYPE_ACK = 2,
+	IEEE154_TYPE_MAC_CMD = 3,
+	IEEE154_TYPE_MASK = 7,
+};
+
+enum iee154_fcf_addr_mode_enums {
+	IEEE154_ADDR_NONE = 0,
+	IEEE154_ADDR_SHORT = 2,
+	IEEE154_ADDR_EXT = 3,
+	IEEE154_ADDR_MASK = 3,
+};
+*/
+
+enum ieee154_fcf_mask_enums {
+	IEEE154_TYPE_MASK = 7,
+	IEEE154_ADDR_MASK = 3,
+};
+
+#endif//__IEEE154PACKETLAYER_H__
diff --git a/tos/lib/rfxlink/layers/Ieee154PacketLayer.nc b/tos/lib/rfxlink/layers/Ieee154PacketLayer.nc
new file mode 100644
index 00000000..e9b00586
--- /dev/null
+++ b/tos/lib/rfxlink/layers/Ieee154PacketLayer.nc
@@ -0,0 +1,185 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include "Ieee154.h"
+#include "message.h"
+
+/**
+ * This interface encapsulates IEEE 802.15.4 intrapan data frames with 
+ * 16-bit destination pan, source and destination addresses. It also 
+ * supports 6LowPan interoperability mode, and acknowledgement frames.
+ * Note, that this interface does not support the CRC-16 value, which
+ * should be verified before the data can be trusted.
+ */
+interface Ieee154PacketLayer
+{
+	/**
+	 * Returns the frame control field. This method should not be used, 
+	 * isDataFrame and isAckFrame should be used instead.
+	 */
+	async command uint16_t getFCF(message_t* msg);
+
+	/**
+	 * Sets the frame control field. This method should not be used, 
+	 * createDataFrame and createAckFrame should be used instead.
+	 */
+	async command void setFCF(message_t* msg, uint16_t fcf);
+
+	/**
+	 * Returns TRUE if the message is a data frame supported by 
+	 * this interface (based on the value of the FCF).
+	 */
+	async command bool isDataFrame(message_t* msg);
+
+	/**
+	 * Sets the FCF to create a data frame supported by this interface.
+	 * You may call setAckRequired and setFramePending commands after this.
+	 */
+	async command void createDataFrame(message_t* msg);
+
+	/**
+	 * Returns TRUE if the message is an acknowledgement frame supported
+	 * by this interface (based on the value of the FCF).
+	 */
+	async command bool isAckFrame(message_t* msg);
+
+	/**
+	 * Sets the FCF to create an acknowledgement frame supported by
+	 * this interface. You may call setFramePending after this.
+	 */
+	async command void createAckFrame(message_t* msg);
+
+	/**
+	 * Creates an acknowledgement packet for the given data packet.
+	 * This also sets the DSN value. The data message must be a 
+	 * data frame, the ack message will be overwritten.
+	 */
+	async command void createAckReply(message_t* data, message_t* ack);
+
+	/**
+	 * Returns TRUE if the acknowledgement packet corresponds to the
+	 * data packet. The data message must be a data packet.
+	 */
+	async command bool verifyAckReply(message_t* data, message_t* ack);
+
+	/**
+	 * Returns TRUE if the ACK required field is set in the FCF.
+	 */
+	async command bool getAckRequired(message_t* msg);
+
+	/**
+	 * Sets the ACK required field in the FCF, should never be set
+	 * for acknowledgement frames.
+	 */
+	async command void setAckRequired(message_t* msg, bool ack);
+
+	/**
+	 * Returns TRUE if the frame pending field is set in the FCF.
+	 */
+	async command bool getFramePending(message_t* msg);
+
+	/**
+	 * Sets the frame pending field in the FCF.
+	 */
+	async command void setFramePending(message_t* msg, bool pending);
+
+	/**
+	 * Returns the data sequence number
+	 */
+	async command uint8_t getDSN(message_t* msg);
+
+	/**
+	 * Sets the data sequence number
+	 */
+	async command void setDSN(message_t* msg, uint8_t dsn);
+
+	/**
+	 * returns the destination PAN id, values <= 255 are tinyos groups,
+	 * valid only for data frames
+	 */
+	async command uint16_t getDestPan(message_t* msg);
+
+	/**
+	 * Sets the destination PAN id, valid only for data frames
+	 */
+	async command void setDestPan(message_t* msg, uint16_t pan);
+
+	/**
+	 * Returns the destination address, valid only for data frames
+	 */
+	async command uint16_t getDestAddr(message_t* msg);
+
+	/**
+	 * Sets the destination address, valid only for data frames
+	 */
+	async command void setDestAddr(message_t* msg, uint16_t addr);
+
+	/**
+	 * Returns the source address, valid only for data frames
+	 */
+	async command uint16_t getSrcAddr(message_t* msg);
+
+	/**
+	 * Sets the source address, valid only for data frames
+	 */
+	async command void setSrcAddr(message_t* msg, uint16_t addr);
+
+	/**
+	 * Returns TRUE if the packet is a data packet, the ACK_REQ field
+	 * is set and the destination address is not the broadcast address.
+	 */
+	async command bool requiresAckWait(message_t* msg);
+
+	/**
+	 * Returns TRUE if the packet is a data packet, the ACK_REQ field
+	 * is set and the destionation address is this node.
+	 */
+	async command bool requiresAckReply(message_t* msg);
+
+	/**
+	 * Returns the local pan id (AM group)
+	 */
+	async command ieee154_panid_t localPan();
+
+	/**
+	 * Returns the local address of the node (AM address)
+	 */
+	async command ieee154_saddr_t localAddr();
+
+	/**
+	 * Returns TRUE if the destionation of this message is either 0xFFFF
+	 * or is the local address of the node.
+	 */
+	async command bool isForMe(message_t* msg);
+}
diff --git a/tos/lib/rfxlink/layers/Ieee154PacketLayerC.nc b/tos/lib/rfxlink/layers/Ieee154PacketLayerC.nc
new file mode 100644
index 00000000..b46f3799
--- /dev/null
+++ b/tos/lib/rfxlink/layers/Ieee154PacketLayerC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic configuration Ieee154PacketLayerC()
+{
+	provides
+	{
+		interface Ieee154PacketLayer;
+		interface Ieee154Packet;
+		interface RadioPacket;
+	}
+
+	uses
+	{
+		interface RadioPacket as SubPacket;
+	}
+}
+
+implementation
+{
+	components new Ieee154PacketLayerP(), ActiveMessageAddressC;
+	Ieee154PacketLayerP.ActiveMessageAddress -> ActiveMessageAddressC;
+
+	Ieee154PacketLayer = Ieee154PacketLayerP;
+	Ieee154Packet = Ieee154PacketLayerP;
+	RadioPacket = Ieee154PacketLayerP;
+	SubPacket = Ieee154PacketLayerP;
+}
diff --git a/tos/lib/rfxlink/layers/Ieee154PacketLayerP.nc b/tos/lib/rfxlink/layers/Ieee154PacketLayerP.nc
new file mode 100644
index 00000000..218c3fd6
--- /dev/null
+++ b/tos/lib/rfxlink/layers/Ieee154PacketLayerP.nc
@@ -0,0 +1,316 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Ieee154PacketLayer.h>
+
+generic module Ieee154PacketLayerP()
+{
+	provides 
+	{
+		interface Ieee154PacketLayer;
+		interface Ieee154Packet;
+		interface RadioPacket;
+	}
+
+	uses
+	{
+		interface ActiveMessageAddress;
+		interface RadioPacket as SubPacket;
+	}
+}
+
+implementation
+{
+/*----------------- Ieee154Packet -----------------*/
+
+	enum
+	{
+		IEEE154_DATA_FRAME_MASK = (IEEE154_TYPE_MASK << IEEE154_FCF_FRAME_TYPE) 
+			| (1 << IEEE154_FCF_INTRAPAN) 
+			| (IEEE154_ADDR_MASK << IEEE154_FCF_DEST_ADDR_MODE) 
+			| (IEEE154_ADDR_MASK << IEEE154_FCF_SRC_ADDR_MODE),
+
+		IEEE154_DATA_FRAME_VALUE = (IEEE154_TYPE_DATA << IEEE154_FCF_FRAME_TYPE) 
+			| (1 << IEEE154_FCF_INTRAPAN) 
+			| (IEEE154_ADDR_SHORT << IEEE154_FCF_DEST_ADDR_MODE) 
+			| (IEEE154_ADDR_SHORT << IEEE154_FCF_SRC_ADDR_MODE),
+
+		IEEE154_DATA_FRAME_PRESERVE = (1 << IEEE154_FCF_ACK_REQ) 
+			| (1 << IEEE154_FCF_FRAME_PENDING),
+
+		IEEE154_ACK_FRAME_LENGTH = 3,	// includes the FCF, DSN
+		IEEE154_ACK_FRAME_MASK = (IEEE154_TYPE_MASK << IEEE154_FCF_FRAME_TYPE), 
+		IEEE154_ACK_FRAME_VALUE = (IEEE154_TYPE_ACK << IEEE154_FCF_FRAME_TYPE),
+	};
+
+	ieee154_header_t* getHeader(message_t* msg)
+	{
+		return ((void*)msg) + call SubPacket.headerLength(msg);
+	}
+
+	void* getPayload(message_t* msg)
+	{
+		return ((void*)msg) + call RadioPacket.headerLength(msg);
+	}
+
+	async command uint16_t Ieee154PacketLayer.getFCF(message_t* msg)
+	{
+		return getHeader(msg)->fcf;
+	}
+
+	async command void Ieee154PacketLayer.setFCF(message_t* msg, uint16_t fcf)
+	{
+		getHeader(msg)->fcf = fcf;
+	}
+
+	async command bool Ieee154PacketLayer.isDataFrame(message_t* msg)
+	{
+		return (getHeader(msg)->fcf & IEEE154_DATA_FRAME_MASK) == IEEE154_DATA_FRAME_VALUE;
+	}
+
+	async command void Ieee154PacketLayer.createDataFrame(message_t* msg)
+	{
+		// keep the ack requested and frame pending bits
+		getHeader(msg)->fcf = (getHeader(msg)->fcf & IEEE154_DATA_FRAME_PRESERVE)
+			| IEEE154_DATA_FRAME_VALUE;
+	}
+
+	async command bool Ieee154PacketLayer.isAckFrame(message_t* msg)
+	{
+		return (getHeader(msg)->fcf & IEEE154_ACK_FRAME_MASK) == IEEE154_ACK_FRAME_VALUE;
+	}
+
+	async command void Ieee154PacketLayer.createAckFrame(message_t* msg)
+	{
+		call SubPacket.setPayloadLength(msg, IEEE154_ACK_FRAME_LENGTH);
+		getHeader(msg)->fcf = IEEE154_ACK_FRAME_VALUE;
+	}
+
+	async command void Ieee154PacketLayer.createAckReply(message_t* data, message_t* ack)
+	{
+		ieee154_header_t* header = getHeader(ack);
+		call SubPacket.setPayloadLength(ack, IEEE154_ACK_FRAME_LENGTH);
+
+		header->fcf = IEEE154_ACK_FRAME_VALUE;
+		header->dsn = getHeader(data)->dsn;
+	}
+
+	async command bool Ieee154PacketLayer.verifyAckReply(message_t* data, message_t* ack)
+	{
+		ieee154_header_t* header = getHeader(ack);
+
+		return header->dsn == getHeader(data)->dsn
+			&& (header->fcf & IEEE154_ACK_FRAME_MASK) == IEEE154_ACK_FRAME_VALUE;
+	}
+
+	async command bool Ieee154PacketLayer.getAckRequired(message_t* msg)
+	{
+		return getHeader(msg)->fcf & (1 << IEEE154_FCF_ACK_REQ) ? TRUE : FALSE;
+	}
+
+	async command void Ieee154PacketLayer.setAckRequired(message_t* msg, bool ack)
+	{
+		if( ack )
+			getHeader(msg)->fcf |= (1 << IEEE154_FCF_ACK_REQ);
+		else
+			getHeader(msg)->fcf &= ~(uint16_t)(1 << IEEE154_FCF_ACK_REQ);
+	}
+
+	async command bool Ieee154PacketLayer.getFramePending(message_t* msg)
+	{
+		return getHeader(msg)->fcf & (1 << IEEE154_FCF_FRAME_PENDING) ? TRUE : FALSE;
+	}
+
+	async command void Ieee154PacketLayer.setFramePending(message_t* msg, bool pending)
+	{
+		if( pending )
+			getHeader(msg)->fcf |= (1 << IEEE154_FCF_FRAME_PENDING);
+		else
+			getHeader(msg)->fcf &= ~(uint16_t)(1 << IEEE154_FCF_FRAME_PENDING);
+	}
+
+	async command uint8_t Ieee154PacketLayer.getDSN(message_t* msg)
+	{
+		return getHeader(msg)->dsn;
+	}
+
+	async command void Ieee154PacketLayer.setDSN(message_t* msg, uint8_t dsn)
+	{
+		getHeader(msg)->dsn = dsn;
+	}
+
+	async command uint16_t Ieee154PacketLayer.getDestPan(message_t* msg)
+	{
+		return getHeader(msg)->destpan;
+	}
+
+	async command void Ieee154PacketLayer.setDestPan(message_t* msg, uint16_t pan)
+	{
+		getHeader(msg)->destpan = pan;
+	}
+
+	async command uint16_t Ieee154PacketLayer.getDestAddr(message_t* msg)
+	{
+		return getHeader(msg)->dest;
+	}
+
+	async command void Ieee154PacketLayer.setDestAddr(message_t* msg, uint16_t addr)
+	{
+		getHeader(msg)->dest = addr;
+	}
+
+	async command uint16_t Ieee154PacketLayer.getSrcAddr(message_t* msg)
+	{
+		return getHeader(msg)->src;
+	}
+
+	async command void Ieee154PacketLayer.setSrcAddr(message_t* msg, uint16_t addr)
+	{	
+		getHeader(msg)->src = addr;
+	}
+
+	async command bool Ieee154PacketLayer.requiresAckWait(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getAckRequired(msg)
+			&& call Ieee154PacketLayer.isDataFrame(msg)
+			&& call Ieee154PacketLayer.getDestAddr(msg) != 0xFFFF;
+	}
+
+	async command bool Ieee154PacketLayer.requiresAckReply(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getAckRequired(msg)
+			&& call Ieee154PacketLayer.isDataFrame(msg)
+			&& call Ieee154PacketLayer.getDestAddr(msg) == call ActiveMessageAddress.amAddress();
+	}
+
+	async command ieee154_saddr_t Ieee154PacketLayer.localAddr()
+	{
+		return call ActiveMessageAddress.amAddress();
+	}
+
+	async command ieee154_panid_t Ieee154PacketLayer.localPan()
+	{
+		return call ActiveMessageAddress.amGroup();
+	}
+
+	async command bool Ieee154PacketLayer.isForMe(message_t* msg)
+	{
+		ieee154_saddr_t addr = call Ieee154PacketLayer.getDestAddr(msg);
+		return addr == call Ieee154PacketLayer.localAddr() || addr == IEEE154_BROADCAST_ADDR;
+	}
+
+	async event void ActiveMessageAddress.changed()
+	{
+	}
+
+/*----------------- Ieee154Packet -----------------*/
+
+	command ieee154_saddr_t Ieee154Packet.address()
+	{
+		return call Ieee154PacketLayer.localAddr();
+	}
+ 
+	command ieee154_saddr_t Ieee154Packet.destination(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDestAddr(msg);
+	}
+ 
+	command ieee154_saddr_t Ieee154Packet.source(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getSrcAddr(msg);
+	}
+
+	command void Ieee154Packet.setDestination(message_t* msg, ieee154_saddr_t addr)
+	{
+		call Ieee154PacketLayer.setDestAddr(msg, addr);
+	}
+
+	command void Ieee154Packet.setSource(message_t* msg, ieee154_saddr_t addr)
+	{
+		call Ieee154PacketLayer.setSrcAddr(msg, addr);
+	}
+
+	command bool Ieee154Packet.isForMe(message_t* msg)
+	{
+		return call Ieee154PacketLayer.isForMe(msg);
+	}
+
+	command ieee154_panid_t Ieee154Packet.pan(message_t* msg)
+	{
+		return call Ieee154PacketLayer.getDestPan(msg);
+	}
+
+	command void Ieee154Packet.setPan(message_t* msg, ieee154_panid_t grp)
+	{
+		call Ieee154PacketLayer.setDestPan(msg, grp);
+	}
+
+	command ieee154_panid_t Ieee154Packet.localPan()
+	{
+		return call Ieee154PacketLayer.localPan();
+	}
+
+/*----------------- RadioPacket -----------------*/
+
+	async command uint8_t RadioPacket.headerLength(message_t* msg)
+	{
+		return call SubPacket.headerLength(msg) + sizeof(ieee154_header_t);
+	}
+
+	async command uint8_t RadioPacket.payloadLength(message_t* msg)
+	{
+		return call SubPacket.payloadLength(msg) - sizeof(ieee154_header_t);
+	}
+
+	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		call SubPacket.setPayloadLength(msg, length + sizeof(ieee154_header_t));
+	}
+
+	async command uint8_t RadioPacket.maxPayloadLength()
+	{
+		return call SubPacket.maxPayloadLength() - sizeof(ieee154_header_t);
+	}
+
+	async command uint8_t RadioPacket.metadataLength(message_t* msg)
+	{
+		return call SubPacket.metadataLength(msg);
+	}
+
+	async command void RadioPacket.clear(message_t* msg)
+	{
+		call Ieee154PacketLayer.createDataFrame(msg);
+		call SubPacket.clear(msg);
+	}
+}
diff --git a/tos/lib/rfxlink/layers/LowPowerListeningConfig.nc b/tos/lib/rfxlink/layers/LowPowerListeningConfig.nc
new file mode 100644
index 00000000..ad595fe0
--- /dev/null
+++ b/tos/lib/rfxlink/layers/LowPowerListeningConfig.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2009, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface LowPowerListeningConfig
+{
+	/**
+	 * Returns TRUE if an acknowledgement should be requested
+	 * for the message automatically by the LPL code (this should 
+	 * normally happen for all non-broadcast messages).
+	 */
+	command bool needsAutoAckRequest(message_t* msg);
+
+	/**
+	 * Returns TRUE if an acknowledgement has been requested for 
+	 * this message via the PacketAcknowledgements interface.
+	 */
+	command bool ackRequested(message_t* msg);
+
+	/**
+	 * Returns the number of milliseconds the mote should turn on
+	 * its radio to check for incoming messages. This check is 
+	 * performed at every localWakeInterval.
+	 */
+	command uint16_t getListenLength();
+}
diff --git a/tos/lib/rfxlink/layers/LowPowerListeningDummyC.nc b/tos/lib/rfxlink/layers/LowPowerListeningDummyC.nc
new file mode 100644
index 00000000..724a5a6d
--- /dev/null
+++ b/tos/lib/rfxlink/layers/LowPowerListeningDummyC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2009, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic configuration LowPowerListeningDummyC()
+{
+	provides
+	{
+		interface SplitControl;
+		interface BareSend as Send;
+		interface BareReceive as Receive;
+		interface RadioPacket;
+
+		interface LowPowerListening;
+	}
+	uses
+	{
+		interface SplitControl as SubControl;
+		interface BareSend as SubSend;
+		interface BareReceive as SubReceive;
+		interface RadioPacket as SubPacket;
+	}
+}
+
+implementation
+{
+	SplitControl = SubControl;
+	Send = SubSend;
+	Receive = SubReceive;
+	RadioPacket = SubPacket;
+
+	components new LowPowerListeningDummyP();
+	LowPowerListening = LowPowerListeningDummyP;
+}
diff --git a/tos/lib/rfxlink/layers/LowPowerListeningDummyP.nc b/tos/lib/rfxlink/layers/LowPowerListeningDummyP.nc
new file mode 100644
index 00000000..ee9bb646
--- /dev/null
+++ b/tos/lib/rfxlink/layers/LowPowerListeningDummyP.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic module LowPowerListeningDummyP()
+{
+	provides interface LowPowerListening;
+}
+
+implementation
+{
+	command void LowPowerListening.setLocalWakeupInterval(uint16_t intervalMs) { }
+
+	command uint16_t LowPowerListening.getLocalWakeupInterval() { return 0; }
+  
+	command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t intervalMs) { }
+  
+	command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg) { return 0; }
+}
diff --git a/tos/lib/rfxlink/layers/LowPowerListeningLayer.h b/tos/lib/rfxlink/layers/LowPowerListeningLayer.h
new file mode 100644
index 00000000..c5ec4157
--- /dev/null
+++ b/tos/lib/rfxlink/layers/LowPowerListeningLayer.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __LOWPOWERLISTENINGLAYER_H__
+#define __LOWPOWERLISTENINGLAYER_H__
+
+typedef struct lpl_metadata_t
+{
+	uint16_t sleepint;
+} lpl_metadata_t;
+
+#endif//__LOWPOWERLISTENINGLAYER_H__
diff --git a/tos/lib/rfxlink/layers/LowPowerListeningLayerC.nc b/tos/lib/rfxlink/layers/LowPowerListeningLayerC.nc
new file mode 100644
index 00000000..ab44e76b
--- /dev/null
+++ b/tos/lib/rfxlink/layers/LowPowerListeningLayerC.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic configuration LowPowerListeningLayerC()
+{
+	provides
+	{
+		interface SplitControl;
+		interface BareSend as Send;
+		interface BareReceive as Receive;
+		interface RadioPacket;
+
+		interface LowPowerListening;
+	}
+	uses
+	{
+		interface SplitControl as SubControl;
+		interface BareSend as SubSend;
+		interface BareReceive as SubReceive;
+		interface RadioPacket as SubPacket;
+
+		interface LowPowerListeningConfig as Config;
+		interface PacketAcknowledgements;
+	}
+}
+
+implementation
+{
+	components new LowPowerListeningLayerP(), new TimerMilliC();
+	components SystemLowPowerListeningC;
+
+	SplitControl = LowPowerListeningLayerP;
+	Send = LowPowerListeningLayerP;
+	Receive = LowPowerListeningLayerP;
+	RadioPacket = LowPowerListeningLayerP;
+	LowPowerListening = LowPowerListeningLayerP;
+
+	SubControl = LowPowerListeningLayerP;
+	SubSend = LowPowerListeningLayerP;
+	SubReceive = LowPowerListeningLayerP;
+	SubPacket = LowPowerListeningLayerP;
+	Config = LowPowerListeningLayerP;
+	PacketAcknowledgements = LowPowerListeningLayerP;
+	
+	LowPowerListeningLayerP.Timer -> TimerMilliC;
+	LowPowerListeningLayerP.SystemLowPowerListening -> SystemLowPowerListeningC;
+
+	components NoLedsC as LedsC;
+	LowPowerListeningLayerP.Leds -> LedsC;
+}
diff --git a/tos/lib/rfxlink/layers/LowPowerListeningLayerP.nc b/tos/lib/rfxlink/layers/LowPowerListeningLayerP.nc
new file mode 100644
index 00000000..a89a61ce
--- /dev/null
+++ b/tos/lib/rfxlink/layers/LowPowerListeningLayerP.nc
@@ -0,0 +1,445 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioAssert.h>
+#include <LowPowerListeningLayer.h>
+#include <Lpl.h>
+
+generic module LowPowerListeningLayerP()
+{
+	provides
+	{
+		interface SplitControl;
+		interface BareSend as Send;
+		interface BareReceive as Receive;
+		interface RadioPacket;
+
+		interface LowPowerListening;
+	}
+
+	uses
+	{
+		interface SplitControl as SubControl;
+		interface BareSend as SubSend;
+		interface BareReceive as SubReceive;
+		interface RadioPacket as SubPacket;
+
+		interface PacketAcknowledgements;
+		interface LowPowerListeningConfig as Config;
+		interface Timer<TMilli>;
+		interface SystemLowPowerListening;
+
+		interface Leds;
+	}
+}
+
+implementation
+{
+	enum
+	{
+		MIN_SLEEP = 2,		// the minimum sleep interval in milliseconds
+	};
+
+	uint16_t sleepInterval = LPL_DEF_LOCAL_WAKEUP;
+
+	message_t* txMsg;
+	error_t txError;
+
+/*----------------- state machine -----------------*/
+
+	enum
+	{
+		OFF = 0,					
+		OFF_SUBSTOP = 1,			// must have consecutive indices
+		OFF_SUBSTOP_DONE = 2,			// must have consecutive indices
+		OFF_STOP_END = 3,			// must have consecutive indices
+		OFF_START_END = 4,
+
+		LISTEN_SUBSTART = 10,			// must have consecutive indices
+		LISTEN_SUBSTART_DONE = 11,		// must have consecutive indices
+		LISTEN_TIMER = 12,			// must have consecutive indices
+		LISTEN = 13,				// must have consecutive indices
+
+		SLEEP_SUBSTOP = 20,			// must have consecutive indices
+		SLEEP_SUBSTOP_DONE = 21,		// must have consecutive indices
+		SLEEP_TIMER = 22,			// must have consecutive indices
+		SLEEP_WAIT = 23,			// must have consecutive indices
+
+		SLEEP_SUBSTOP_DONE_TOSEND = 29,		// must have consecutive indices
+		SEND_SUBSTART = 30,			// must have consecutive indices
+		SEND_SUBSTART_DONE = 31,		// must have consecutive indices
+		SEND_TIMER = 32,			// must have consecutive indices
+		SEND_SUBSEND= 33,
+		SEND_SUBSEND_DONE = 34,
+		SEND_SUBSEND_DONE_LAST = 35,
+		SEND_DONE = 36,
+	};
+
+	uint8_t state;
+
+	task void transition()
+	{
+		error_t error;
+		uint16_t transmitInterval;
+
+		if( state == LISTEN_SUBSTART || state == SEND_SUBSTART )
+		{
+			error = call SubControl.start();
+			RADIO_ASSERT( error == SUCCESS || error == EBUSY );
+
+			if( error == SUCCESS )
+			{
+				call Leds.led2On();
+				++state;
+			}
+			else
+				post transition();
+		}
+		else if( state == SLEEP_SUBSTOP || state == OFF_SUBSTOP )
+		{
+			error = call SubControl.stop();
+			RADIO_ASSERT( error == SUCCESS || error == EBUSY );
+
+			if( error == SUCCESS )
+			{
+				++state;
+				call Leds.led2Off();
+			}
+			else
+				post transition();
+		}
+		else if( state == OFF_START_END )
+		{
+			state = LISTEN_SUBSTART;
+			post transition();
+
+			signal SplitControl.startDone(SUCCESS);
+		}
+		else if( state == OFF_STOP_END )
+		{
+			state = OFF;
+			signal SplitControl.stopDone(SUCCESS);
+		}
+		else if( state == LISTEN_TIMER )
+		{
+			state = LISTEN;
+			if( sleepInterval > 0 )
+				call Timer.startOneShot(call Config.getListenLength());
+		}
+		else if( state == SLEEP_TIMER )
+		{
+			if( sleepInterval > 0 )
+			{
+				state = SLEEP_WAIT;
+				call Timer.startOneShot(sleepInterval);
+			}
+			else
+			{
+				state = LISTEN_SUBSTART;
+				post transition();
+			}
+		}
+		else if( state == SEND_TIMER )
+		{
+			transmitInterval = call LowPowerListening.getRemoteWakeupInterval(txMsg);
+
+			if( transmitInterval > 0 )
+				call Timer.startOneShot(transmitInterval 
+					+ 2 * call Config.getListenLength());
+
+			state = SEND_SUBSEND;
+			post transition();
+		}
+		else if( state == SEND_SUBSEND)
+		{
+			txError = call SubSend.send(txMsg);
+
+			if( txError == SUCCESS )
+				state = SEND_SUBSEND_DONE;
+			else
+			{
+				state = SEND_DONE;
+				post transition();
+			}
+		}
+		else if( state == SEND_DONE )
+		{
+			state = LISTEN;
+			if( sleepInterval > 0 )
+				call Timer.startOneShot(call SystemLowPowerListening.getDelayAfterReceive());
+
+			signal Send.sendDone(txMsg, txError);
+		}
+	}
+
+	command error_t SplitControl.start()
+	{
+		if( state == OFF_START_END )
+			return EBUSY;
+		else if( state != OFF )
+			return EALREADY;
+
+		state = OFF_START_END;
+		post transition();
+
+		return SUCCESS;
+	}
+
+	event void SubControl.startDone(error_t error)
+	{
+		RADIO_ASSERT( error == SUCCESS || error == EBUSY );
+		RADIO_ASSERT( state == LISTEN_SUBSTART_DONE || state == SEND_SUBSTART_DONE );
+
+		if( error == SUCCESS )
+			++state;
+		else
+			--state;
+
+		post transition();
+	}
+
+	command error_t SplitControl.stop()
+	{
+		if( state == SLEEP_WAIT || state == LISTEN )
+		{
+			call Timer.stop();
+			post transition();
+		}
+
+		if( state == LISTEN_TIMER || state == LISTEN || state == SLEEP_SUBSTOP )
+			state = OFF_SUBSTOP;
+		else if( state == SLEEP_SUBSTOP_DONE )
+			state = OFF_SUBSTOP_DONE;
+		else if( state == LISTEN_SUBSTART || state == SLEEP_TIMER || state == SLEEP_WAIT )
+			state = OFF_STOP_END;
+		else if( state == OFF )
+			return EALREADY;
+		else
+			return EBUSY;
+
+		return SUCCESS;
+	}
+
+	event void SubControl.stopDone(error_t error)
+	{
+		RADIO_ASSERT( error == SUCCESS || error == EBUSY );
+		RADIO_ASSERT( state == SLEEP_SUBSTOP_DONE || state == OFF_SUBSTOP_DONE || state == SLEEP_SUBSTOP_DONE_TOSEND );
+
+		if( error == SUCCESS )
+			++state;
+		else if( state != SLEEP_SUBSTOP_DONE_TOSEND )
+			--state;
+		else
+			state = SEND_TIMER;
+
+		post transition();
+	}
+
+	event void Timer.fired()
+	{
+		if( state == LISTEN )
+			state = SLEEP_SUBSTOP;
+		else if( state == SLEEP_WAIT )
+			state = LISTEN_SUBSTART;
+		else if( state == SEND_SUBSEND_DONE )
+			state = SEND_SUBSEND_DONE_LAST;
+		else if( state == SEND_SUBSEND)
+			state = SEND_DONE;
+		else
+			RADIO_ASSERT(FALSE);
+
+		post transition();
+	}
+
+	event message_t* SubReceive.receive(message_t* msg)
+	{
+		call Leds.led0Toggle();
+
+		if( state == SLEEP_SUBSTOP )
+			state = LISTEN;
+
+		if( state == LISTEN && sleepInterval > 0 )
+			call Timer.startOneShot(call SystemLowPowerListening.getDelayAfterReceive());
+
+		return signal Receive.receive(msg);
+	}
+
+	command error_t Send.send(message_t* msg)
+	{
+		if( state == LISTEN || state == SLEEP_WAIT )
+		{
+			call Timer.stop();
+			post transition();
+		}
+
+		if( state == LISTEN_SUBSTART || state == SLEEP_TIMER || state == SLEEP_WAIT )
+			state = SEND_SUBSTART;
+		else if( state == LISTEN_SUBSTART_DONE )
+			state = SEND_SUBSTART_DONE;
+		else if( state == LISTEN_TIMER || state == SLEEP_SUBSTOP || state == LISTEN )
+			state = SEND_TIMER;
+		else if( state == SLEEP_SUBSTOP_DONE )
+			state = SLEEP_SUBSTOP_DONE_TOSEND;
+		else
+			return EBUSY;
+
+		if( call Config.needsAutoAckRequest(msg) )
+			call PacketAcknowledgements.requestAck(msg);
+
+		txMsg = msg;
+		txError = FAIL;
+
+		return SUCCESS;
+	}
+
+	command error_t Send.cancel(message_t* msg)
+	{
+		if( state == SEND_SUBSEND )
+		{
+			call Timer.stop();
+			state = SEND_DONE;
+			txError = ECANCEL;
+			post transition();
+
+			return SUCCESS;
+		}
+		else if( state == SEND_SUBSEND_DONE )
+		{
+			// we stop sending the message even if SubSend.cancel was not succesfull
+			state = SEND_SUBSEND_DONE_LAST;
+
+			return call SubSend.cancel(txMsg);
+		}
+		else
+			return FAIL;
+	}
+
+	event void SubSend.sendDone(message_t* msg, error_t error)
+	{
+		RADIO_ASSERT( state == SEND_SUBSEND_DONE || state == SEND_SUBSEND_DONE_LAST );
+		RADIO_ASSERT( msg == txMsg );
+
+		txError = error;
+
+		// TODO: extend the PacketAcknowledgements interface with getAckRequired
+		if( error != SUCCESS
+			|| call LowPowerListening.getRemoteWakeupInterval(msg) == 0
+			|| state == SEND_SUBSEND_DONE_LAST
+			|| (call Config.ackRequested(msg) && call PacketAcknowledgements.wasAcked(msg)) )
+		{
+			call Timer.stop();
+			state = SEND_DONE;
+		}
+		else
+			state = SEND_SUBSEND;
+
+		post transition();
+
+		if( error == SUCCESS )
+			call Leds.led1Toggle();
+	}
+
+/*----------------- LowPowerListening -----------------*/
+
+	lpl_metadata_t* getMeta(message_t* msg)
+	{
+		return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg);
+	}
+
+	command void LowPowerListening.setLocalWakeupInterval(uint16_t interval)
+	{
+		if( interval < MIN_SLEEP )
+			interval = 0;
+
+		sleepInterval = interval;
+
+		if( state == LISTEN || state == SLEEP_WAIT )
+		{
+			call Timer.stop();
+			--state;
+			post transition();
+		}
+	}
+
+	command uint16_t LowPowerListening.getLocalWakeupInterval()
+	{	
+		return sleepInterval;
+	}
+
+	command void LowPowerListening.setRemoteWakeupInterval(message_t *msg, uint16_t interval)
+	{
+		if( interval < MIN_SLEEP )
+			interval = 0;
+
+		getMeta(msg)->sleepint = interval;
+	}
+
+	command uint16_t LowPowerListening.getRemoteWakeupInterval(message_t *msg)
+	{
+		return getMeta(msg)->sleepint;
+	}
+
+/*----------------- RadioPacket -----------------*/
+	
+	async command uint8_t RadioPacket.headerLength(message_t* msg)
+	{
+		return call SubPacket.headerLength(msg);
+	}
+
+	async command uint8_t RadioPacket.payloadLength(message_t* msg)
+	{
+		return call SubPacket.payloadLength(msg);
+	}
+
+	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		call SubPacket.setPayloadLength(msg, length);
+	}
+
+	async command uint8_t RadioPacket.maxPayloadLength()
+	{
+		return call SubPacket.maxPayloadLength();
+	}
+
+	async command uint8_t RadioPacket.metadataLength(message_t* msg)
+	{
+		return call SubPacket.metadataLength(msg) + sizeof(lpl_metadata_t);
+	}
+
+	async command void RadioPacket.clear(message_t* msg)
+	{
+		getMeta(msg)->sleepint = 0;
+		call SubPacket.clear(msg);
+	}
+}
diff --git a/tos/lib/rfxlink/layers/MessageBufferLayerC.nc b/tos/lib/rfxlink/layers/MessageBufferLayerC.nc
new file mode 100644
index 00000000..7f4cc0d0
--- /dev/null
+++ b/tos/lib/rfxlink/layers/MessageBufferLayerC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic configuration MessageBufferLayerC()
+{
+	provides
+	{
+		interface SplitControl;
+		interface BareSend as Send;
+		interface BareReceive as Receive;
+		interface RadioChannel;
+	}
+	uses
+	{
+		interface RadioState;
+		interface RadioSend;
+		interface RadioReceive;
+	}
+}
+
+implementation
+{
+	components new MessageBufferLayerP(), MainC, TaskletC;
+
+	MainC.SoftwareInit -> MessageBufferLayerP;
+
+	SplitControl = MessageBufferLayerP;
+	Send = MessageBufferLayerP;
+	Receive = MessageBufferLayerP;
+	RadioChannel = MessageBufferLayerP;
+
+	RadioState = MessageBufferLayerP;
+	MessageBufferLayerP.Tasklet -> TaskletC;
+	RadioSend = MessageBufferLayerP;
+	RadioReceive = MessageBufferLayerP;
+}
diff --git a/tos/lib/rfxlink/layers/MessageBufferLayerP.nc b/tos/lib/rfxlink/layers/MessageBufferLayerP.nc
new file mode 100644
index 00000000..0815b25a
--- /dev/null
+++ b/tos/lib/rfxlink/layers/MessageBufferLayerP.nc
@@ -0,0 +1,376 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ *         Andreas Huber <huberan@ee.ethz.ch>
+ */
+
+#include <Tasklet.h>
+#include <RadioAssert.h>
+
+generic module MessageBufferLayerP()
+{
+	provides
+	{
+		interface SplitControl;
+		interface Init as SoftwareInit;
+
+		interface BareSend as Send;
+		interface BareReceive as Receive;
+		interface RadioChannel;
+	}
+	uses
+	{
+		interface RadioState;
+		interface Tasklet;
+		interface RadioSend;
+		interface RadioReceive;
+	}
+}
+
+implementation
+{
+/*----------------- State -----------------*/
+
+	tasklet_norace uint8_t state;
+	enum
+	{
+		STATE_READY = 0,
+		STATE_TX_PENDING = 1,
+		STATE_TX_RETRY = 2,
+		STATE_TX_SEND = 3,
+		STATE_TX_DONE = 4,
+		STATE_TURN_ON = 5,
+		STATE_TURN_OFF = 6,
+		STATE_CHANNEL = 7,
+	};
+
+	command error_t SplitControl.start()
+	{
+		error_t error;
+
+		call Tasklet.suspend();
+
+		if( state != STATE_READY )
+			error = EBUSY;
+		else
+		{
+			error = call RadioState.turnOn();
+
+			if( error == SUCCESS )
+				state = STATE_TURN_ON;
+		}
+
+		call Tasklet.resume();
+
+		return error;
+	}
+
+	command error_t SplitControl.stop()
+	{
+		error_t error;
+
+		call Tasklet.suspend();
+
+		if( state != STATE_READY )
+			error = EBUSY;
+		else
+		{
+			error = call RadioState.turnOff();
+
+			if( error == SUCCESS )
+				state = STATE_TURN_OFF;
+		}
+
+		call Tasklet.resume();
+
+		return error;
+	}
+
+	command error_t RadioChannel.setChannel(uint8_t channel)
+	{
+		error_t error;
+
+		call Tasklet.suspend();
+
+		if( state != STATE_READY )
+			error = EBUSY;
+		else
+		{
+			error = call RadioState.setChannel(channel);
+
+			if( error == SUCCESS )
+				state = STATE_CHANNEL;
+		}
+
+		call Tasklet.resume();
+
+		return error;
+	}
+
+	command uint8_t RadioChannel.getChannel()
+	{
+		return call RadioState.getChannel();
+	}
+
+	task void stateDoneTask()
+	{
+		uint8_t s;
+		
+		s = state;
+
+		// change the state before so we can be reentered from the event
+		state = STATE_READY;
+
+		if( s == STATE_TURN_ON )
+			signal SplitControl.startDone(SUCCESS);
+		else if( s == STATE_TURN_OFF )
+			signal SplitControl.stopDone(SUCCESS);
+		else if( s == STATE_CHANNEL )
+			signal RadioChannel.setChannelDone();
+		else	// not our event, ignore it
+			state = s;
+	}
+
+	tasklet_async event void RadioState.done()
+	{
+		post stateDoneTask();
+	}
+
+	default event void SplitControl.startDone(error_t error)
+	{
+	}
+
+	default event void SplitControl.stopDone(error_t error)
+	{
+	}
+
+	default event void RadioChannel.setChannelDone()
+	{
+	}
+
+/*----------------- Send -----------------*/
+
+	message_t* txMsg;
+	tasklet_norace error_t txError;
+	uint8_t retries;
+
+	// Many EBUSY replies from RadioSend are normal if the channel is cognested
+	enum { MAX_RETRIES = 5 };
+
+	task void sendTask()
+	{
+		bool done = FALSE;
+
+		call Tasklet.suspend();
+
+		RADIO_ASSERT( state == STATE_TX_PENDING || state == STATE_TX_DONE );
+
+		if( state == STATE_TX_PENDING && ++retries <= MAX_RETRIES )
+		{
+			txError = call RadioSend.send(txMsg);
+			if( txError == SUCCESS )
+				state = STATE_TX_SEND;
+			else
+				state = STATE_TX_RETRY;
+		}
+		else
+		{
+			state = STATE_READY;
+			done = TRUE;
+		}
+
+		call Tasklet.resume();
+
+		if( done )
+			signal Send.sendDone(txMsg, txError);
+	}
+
+	tasklet_async event void RadioSend.sendDone(error_t error)
+	{
+		RADIO_ASSERT( state == STATE_TX_SEND );
+
+		txError = error;
+		if( error == SUCCESS )
+			state = STATE_TX_DONE;
+		else
+			state = STATE_TX_PENDING;
+
+		post sendTask();
+	}
+
+	command error_t Send.send(message_t* msg)
+	{
+		error_t result;
+
+		call Tasklet.suspend();
+
+		if( state != STATE_READY )
+			result = EBUSY;
+		else
+		{
+			txMsg = msg;
+			state = STATE_TX_PENDING;
+			retries = 0;
+			post sendTask();
+			result = SUCCESS;
+		}
+
+		call Tasklet.resume();
+
+		return result;
+	}
+
+	tasklet_async event void RadioSend.ready()
+	{
+		if( state == STATE_TX_RETRY )
+		{
+			state = STATE_TX_PENDING;
+			post sendTask();
+		}
+	}
+
+	tasklet_async event void Tasklet.run()
+	{
+	}
+
+	command error_t Send.cancel(message_t* msg)
+	{
+		error_t result;
+
+		call Tasklet.suspend();
+
+		RADIO_ASSERT( msg == txMsg );
+
+		if( state == STATE_TX_PENDING || state == STATE_TX_RETRY )
+		{
+			state = STATE_TX_DONE;
+			txError = ECANCEL;
+			result = SUCCESS;
+
+			post sendTask();
+		}
+		else
+			result = EBUSY;
+
+		call Tasklet.resume();
+
+		return result;
+	}
+
+/*----------------- Receive -----------------*/
+
+	enum
+	{
+		RECEIVE_QUEUE_SIZE = 3,
+	};
+
+	message_t receiveQueueData[RECEIVE_QUEUE_SIZE];
+	message_t* receiveQueue[RECEIVE_QUEUE_SIZE];
+
+	uint8_t receiveQueueHead;
+	uint8_t receiveQueueSize;
+
+	command error_t SoftwareInit.init()
+	{
+		uint8_t i;
+
+		for(i = 0; i < RECEIVE_QUEUE_SIZE; ++i)
+			receiveQueue[i] = receiveQueueData + i;
+
+		return SUCCESS;
+	}
+
+	tasklet_async event bool RadioReceive.header(message_t* msg)
+	{
+		bool notFull;
+
+		// this prevents undeliverable messages to be acknowledged
+		atomic notFull = receiveQueueSize < RECEIVE_QUEUE_SIZE;
+
+		return notFull;
+	}
+
+	task void deliverTask()
+	{
+		// get rid of as many messages as possible without interveining tasks
+		for(;;)
+		{
+			message_t* msg;
+
+			atomic
+			{
+				if( receiveQueueSize == 0 )
+					return;
+
+				msg = receiveQueue[receiveQueueHead];
+			}
+
+			msg = signal Receive.receive(msg);
+
+			atomic
+			{
+				receiveQueue[receiveQueueHead] = msg;
+
+				if( ++receiveQueueHead >= RECEIVE_QUEUE_SIZE )
+					receiveQueueHead = 0;
+
+				--receiveQueueSize;
+			}
+		}
+	}
+
+	tasklet_async event message_t* RadioReceive.receive(message_t* msg)
+	{
+		message_t *m;
+
+		atomic
+		{
+			if( receiveQueueSize >= RECEIVE_QUEUE_SIZE )
+				m = msg;
+			else
+			{
+				uint8_t idx = receiveQueueHead + receiveQueueSize;
+				if( idx >= RECEIVE_QUEUE_SIZE )
+					idx -= RECEIVE_QUEUE_SIZE;
+
+				m = receiveQueue[idx];
+				receiveQueue[idx] = msg;
+
+				++receiveQueueSize;
+				post deliverTask();
+			}
+		}
+
+		return m;
+	}
+
+}
diff --git a/tos/lib/rfxlink/layers/MetadataFlagsLayer.h b/tos/lib/rfxlink/layers/MetadataFlagsLayer.h
new file mode 100644
index 00000000..19d8a832
--- /dev/null
+++ b/tos/lib/rfxlink/layers/MetadataFlagsLayer.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2009, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __METADATAFLAGSLAYER_H__
+#define __METADATAFLAGSLAYER_H__
+
+typedef struct flags_metadata_t
+{
+	// TODO: make sure that we have no more than 8 flags
+	uint8_t flags;
+} flags_metadata_t;
+
+#endif//__METADATAFLAGSLAYER_H__
diff --git a/tos/lib/rfxlink/layers/MetadataFlagsLayerC.nc b/tos/lib/rfxlink/layers/MetadataFlagsLayerC.nc
new file mode 100644
index 00000000..3eb40640
--- /dev/null
+++ b/tos/lib/rfxlink/layers/MetadataFlagsLayerC.nc
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <MetadataFlagsLayer.h>
+#include <RadioAssert.h>
+
+generic module MetadataFlagsLayerC()
+{
+	provides 
+	{
+		interface PacketFlag[uint8_t bit];
+		interface RadioPacket;
+	}
+
+	uses
+	{
+		interface RadioPacket as SubPacket;
+	}
+}
+
+implementation
+{
+	flags_metadata_t* getMeta(message_t* msg)
+	{
+		return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg);
+	}
+
+/*----------------- RadioPacket -----------------*/
+
+	async command bool PacketFlag.get[uint8_t bit](message_t* msg)
+	{
+		return getMeta(msg)->flags & (1<<bit);
+	}
+
+	async command void PacketFlag.set[uint8_t bit](message_t* msg)
+	{
+		RADIO_ASSERT( bit  < 8 );
+
+		getMeta(msg)->flags |= (1<<bit);
+	}
+
+	async command void PacketFlag.clear[uint8_t bit](message_t* msg)
+	{
+		RADIO_ASSERT( bit  < 8 );
+
+		getMeta(msg)->flags &= ~(1<<bit);
+	}
+
+	async command void PacketFlag.setValue[uint8_t bit](message_t* msg, bool value)
+	{
+		if( value )
+			call PacketFlag.set[bit](msg);
+		else
+			call PacketFlag.clear[bit](msg);
+	}
+
+/*----------------- RadioPacket -----------------*/
+	
+	async command uint8_t RadioPacket.headerLength(message_t* msg)
+	{
+		return call SubPacket.headerLength(msg);
+	}
+
+	async command uint8_t RadioPacket.payloadLength(message_t* msg)
+	{
+		return call SubPacket.payloadLength(msg);
+	}
+
+	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		call SubPacket.setPayloadLength(msg, length);
+	}
+
+	async command uint8_t RadioPacket.maxPayloadLength()
+	{
+		return call SubPacket.maxPayloadLength();
+	}
+
+	async command uint8_t RadioPacket.metadataLength(message_t* msg)
+	{
+		return call SubPacket.metadataLength(msg) + sizeof(flags_metadata_t);
+	}
+
+	async command void RadioPacket.clear(message_t* msg)
+	{
+		getMeta(msg)->flags = 0;
+		call SubPacket.clear(msg);
+	}
+}
diff --git a/tos/lib/rfxlink/layers/PacketLinkLayer.h b/tos/lib/rfxlink/layers/PacketLinkLayer.h
new file mode 100644
index 00000000..3f17bafb
--- /dev/null
+++ b/tos/lib/rfxlink/layers/PacketLinkLayer.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __PACKETLINKLAYER_H__
+#define __PACKETLINKLAYER_H__
+
+typedef struct link_metadata_t
+{
+	uint16_t maxRetries;
+	uint16_t retryDelay;
+} link_metadata_t;
+
+#endif//__PACKETLINKLAYER_H__
diff --git a/tos/lib/rfxlink/layers/PacketLinkLayerC.nc b/tos/lib/rfxlink/layers/PacketLinkLayerC.nc
new file mode 100644
index 00000000..8cb5e0c1
--- /dev/null
+++ b/tos/lib/rfxlink/layers/PacketLinkLayerC.nc
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Reliable Packet Link Functionality
+ * @author David Moss
+ * @author Jon Wyant
+ * @author Miklos Maroti
+ */
+
+#include <PacketLinkLayer.h>
+
+generic configuration PacketLinkLayerC() {
+  provides {
+    interface BareSend as Send;
+    interface BareReceive as Receive;
+    interface PacketLink;
+    interface RadioPacket;
+  }
+  
+  uses {
+    interface BareSend as SubSend;
+    interface BareReceive as SubReceive;
+    interface RadioPacket as SubPacket;
+    interface PacketAcknowledgements;
+  }
+}
+
+implementation {
+  components new PacketLinkLayerP(), new TimerMilliC() as DelayTimerC;
+  
+  PacketLink = PacketLinkLayerP;
+  Send = PacketLinkLayerP;
+  SubSend = PacketLinkLayerP;
+  PacketAcknowledgements = PacketLinkLayerP;
+  RadioPacket = PacketLinkLayerP;
+  SubPacket = PacketLinkLayerP;
+
+  PacketLinkLayerP.DelayTimer -> DelayTimerC;
+
+  Receive = SubReceive;
+}
diff --git a/tos/lib/rfxlink/layers/PacketLinkLayerP.nc b/tos/lib/rfxlink/layers/PacketLinkLayerP.nc
new file mode 100644
index 00000000..05af33f6
--- /dev/null
+++ b/tos/lib/rfxlink/layers/PacketLinkLayerP.nc
@@ -0,0 +1,242 @@
+/*
+ * Copyright (c) 2010, University of Szeged
+ * Copyright (c) 2010, Aarhus Universitet
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti,
+ * Author: Morten Tranberg Hansen
+ */
+
+#include <PacketLinkLayer.h>
+#include <RadioAssert.h>
+
+generic module PacketLinkLayerP()
+{
+	provides
+	{
+		interface BareSend as Send;
+		interface PacketLink;
+		interface RadioPacket;
+	}
+
+	uses
+	{
+		interface BareSend as SubSend;
+		interface PacketAcknowledgements;
+		interface Timer<TMilli> as DelayTimer;
+		interface RadioPacket as SubPacket;
+	}
+}
+
+implementation
+{
+	enum
+	{
+		STATE_READY = 0,
+		STATE_SENDING = 1,
+		STATE_SENDDONE = 2,
+		STATE_SIGNAL = 4,	// add error code
+	};
+
+	uint8_t state = STATE_READY;
+	message_t *currentMsg;
+	uint16_t totalRetries;
+
+	/**
+	 * We do everything from a single task in order to call SubSend.send 
+	 * and Send.sendDone only once. This helps inlining the code and
+	 * reduces the code size.
+	 */
+	task void send()
+	{
+		uint16_t retries;
+	
+		RADIO_ASSERT( state != STATE_READY );
+
+		retries = call PacketLink.getRetries(currentMsg);
+
+		if( state == STATE_SENDDONE )
+		{
+			if( call PacketAcknowledgements.wasAcked(currentMsg) )
+				state = STATE_SIGNAL + SUCCESS;
+			else if( ++totalRetries < retries )
+			{
+				uint16_t delay;
+
+				state = STATE_SENDING;
+				delay = call PacketLink.getRetryDelay(currentMsg);
+
+				if( delay > 0 )
+				{
+					call DelayTimer.startOneShot(delay);
+					return;
+				}
+			}
+			else
+				state = STATE_SIGNAL + FAIL;
+		}
+
+		if( state == STATE_SENDING )
+		{
+			state = STATE_SENDDONE;
+
+			if( call SubSend.send(currentMsg) != SUCCESS )
+				post send();
+
+			return;
+		}
+
+		if( state >= STATE_SIGNAL )
+		{
+			error_t error = state - STATE_SIGNAL;
+
+			// do not update the retries count for non packet link messages
+			if( retries > 0 )
+				call PacketLink.setRetries(currentMsg, totalRetries);
+
+			state = STATE_READY;
+			signal Send.sendDone(currentMsg, error);
+		}
+	}
+
+	event void SubSend.sendDone(message_t* msg, error_t error)
+	{
+		RADIO_ASSERT( state == STATE_SENDDONE || state == STATE_SIGNAL + ECANCEL );
+		RADIO_ASSERT( msg == currentMsg );
+
+		post send();
+	}
+
+	event void DelayTimer.fired()
+	{
+		RADIO_ASSERT( state == STATE_SENDING );
+
+		post send();
+	}
+
+	command error_t Send.send(message_t *msg)
+	{
+		if( state != STATE_READY )
+			return EBUSY;
+
+		// it is enough to set it only once
+		if( call PacketLink.getRetries(msg) > 0 )
+			call PacketAcknowledgements.requestAck(msg);
+
+		currentMsg = msg;
+		totalRetries = 0;
+		state = STATE_SENDING;
+		post send();
+
+		return SUCCESS;
+	}
+
+	command error_t Send.cancel(message_t *msg)
+	{
+		if( currentMsg != msg || state == STATE_READY )
+			return FAIL;
+
+		// if a send is in progress
+		if( state == STATE_SENDDONE )
+			call SubSend.cancel(msg);
+		else
+			post send();
+
+		call DelayTimer.stop();
+		state = STATE_SIGNAL + ECANCEL;
+
+		return SUCCESS;
+	}
+
+// ------- PacketLink
+
+	link_metadata_t* getMeta(message_t* msg)
+	{
+		return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg);
+	}
+
+	command void PacketLink.setRetries(message_t *msg, uint16_t maxRetries)
+	{
+		getMeta(msg)->maxRetries = maxRetries;
+	}
+
+	command void PacketLink.setRetryDelay(message_t *msg, uint16_t retryDelay)
+	{
+		getMeta(msg)->retryDelay = retryDelay;
+	}
+
+	command uint16_t PacketLink.getRetries(message_t *msg)
+	{
+		return getMeta(msg)->maxRetries;
+	}
+
+	command uint16_t PacketLink.getRetryDelay(message_t *msg)
+	{
+		return getMeta(msg)->retryDelay;
+	}
+
+	command bool PacketLink.wasDelivered(message_t *msg)
+	{
+		return call PacketAcknowledgements.wasAcked(msg);
+	}
+
+// ------- RadioPacket
+
+	async command uint8_t RadioPacket.headerLength(message_t* msg)
+	{
+		return call SubPacket.headerLength(msg);
+	}
+
+	async command uint8_t RadioPacket.payloadLength(message_t* msg)
+	{
+		return call SubPacket.payloadLength(msg);
+	}
+
+	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		call SubPacket.setPayloadLength(msg, length);
+	}
+
+	async command uint8_t RadioPacket.maxPayloadLength()
+	{
+		return call SubPacket.maxPayloadLength();
+	}
+
+	async command uint8_t RadioPacket.metadataLength(message_t* msg)
+	{
+		return call SubPacket.metadataLength(msg) + sizeof(link_metadata_t);
+	}
+
+	async command void RadioPacket.clear(message_t* msg)
+	{
+		getMeta(msg)->maxRetries = 0;
+		call SubPacket.clear(msg);
+	}
+}
diff --git a/tos/lib/rfxlink/layers/RandomCollisionConfig.nc b/tos/lib/rfxlink/layers/RandomCollisionConfig.nc
new file mode 100755
index 00000000..4947fafc
--- /dev/null
+++ b/tos/lib/rfxlink/layers/RandomCollisionConfig.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface RandomCollisionConfig
+{
+	/**
+	 * Returns the initial amount of maximum backoff for this message.
+	 */
+	async command uint16_t getInitialBackoff(message_t* msg);
+
+	/**
+	 * Returns the amount of maximum backoff when there is congestion
+	 * (the channel was busy for the first try)
+	 */
+	async command uint16_t getCongestionBackoff(message_t* msg);
+
+	/**
+	 * Returns the minimum ticks before the message could be sent.
+	 */
+	async command uint16_t getMinimumBackoff();
+
+	/**
+	 * The provided message was just received, and this command should return 
+	 * the time till no transmission should be initiated.
+	 */
+	async command uint16_t getTransmitBarrier(message_t* msg);
+}
diff --git a/tos/lib/rfxlink/layers/RandomCollisionLayerC.nc b/tos/lib/rfxlink/layers/RandomCollisionLayerC.nc
new file mode 100755
index 00000000..5fa04c85
--- /dev/null
+++ b/tos/lib/rfxlink/layers/RandomCollisionLayerC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic configuration RandomCollisionLayerC()
+{
+	provides
+	{
+		interface RadioSend;
+		interface RadioReceive;
+	}
+	uses
+	{
+		interface RadioSend as SubSend;
+		interface RadioReceive as SubReceive;
+		interface RadioAlarm;
+
+		interface RandomCollisionConfig as Config;
+	}
+}
+
+implementation
+{
+	components new RandomCollisionLayerP(), RandomC;
+
+	RadioSend = RandomCollisionLayerP;
+	SubSend = RandomCollisionLayerP;
+	Config = RandomCollisionLayerP;
+	RadioReceive = RandomCollisionLayerP;
+	SubReceive = RandomCollisionLayerP;
+	RadioAlarm = RandomCollisionLayerP;
+
+	RandomCollisionLayerP.Random -> RandomC;
+}
diff --git a/tos/lib/rfxlink/layers/RandomCollisionLayerP.nc b/tos/lib/rfxlink/layers/RandomCollisionLayerP.nc
new file mode 100755
index 00000000..79a3c547
--- /dev/null
+++ b/tos/lib/rfxlink/layers/RandomCollisionLayerP.nc
@@ -0,0 +1,192 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+#include <RadioAssert.h>
+
+generic module RandomCollisionLayerP()
+{
+	provides
+	{
+		interface RadioSend;
+		interface RadioReceive;
+	}
+	uses
+	{
+		interface RadioSend as SubSend;
+		interface RadioReceive as SubReceive;
+		interface RadioAlarm;
+		interface Random;
+		interface RandomCollisionConfig as Config;
+	}
+}
+
+implementation
+{
+	tasklet_norace uint8_t state;
+	enum
+	{
+		STATE_READY = 0,
+		STATE_TX_PENDING_FIRST = 1,
+		STATE_TX_PENDING_SECOND = 2,
+		STATE_TX_SENDING = 3,
+
+		STATE_BARRIER = 0x80,
+	};
+
+	tasklet_norace message_t *txMsg;
+	tasklet_norace uint16_t txBarrier;
+
+	tasklet_async event void SubSend.ready()
+	{
+		if( state == STATE_READY && call RadioAlarm.isFree() )
+			signal RadioSend.ready();
+	}
+
+	uint16_t nextRandom;
+	task void calcNextRandom()
+	{
+		uint16_t a = call Random.rand16();
+		atomic nextRandom = a;
+	}
+
+	uint16_t getBackoff(uint16_t maxBackoff)
+	{
+		uint16_t a;
+
+		atomic
+		{
+			a = nextRandom;
+			nextRandom += 273;
+		}
+		post calcNextRandom();
+
+		return (a % maxBackoff) + call Config.getMinimumBackoff();
+	}
+
+	tasklet_async command error_t RadioSend.send(message_t* msg)
+	{
+		if( state != STATE_READY || ! call RadioAlarm.isFree() )
+			return EBUSY;
+
+		txMsg = msg;
+		state = STATE_TX_PENDING_FIRST;
+		call RadioAlarm.wait(getBackoff(call Config.getInitialBackoff(msg)));
+
+		return SUCCESS;
+	}
+
+	tasklet_async event void RadioAlarm.fired()
+	{
+		error_t error;
+		int16_t delay;
+
+		RADIO_ASSERT( state != STATE_READY );
+
+		delay = (int16_t)txBarrier - call RadioAlarm.getNow();
+
+		if( state == STATE_BARRIER )
+		{
+			state = STATE_READY;
+
+			signal RadioSend.ready();
+			return;
+		}
+		else if( (state & STATE_BARRIER) && delay > 0 )
+			error = EBUSY;
+		else
+			error = call SubSend.send(txMsg);
+
+		if( error != SUCCESS )
+		{
+			if( (state & ~STATE_BARRIER) == STATE_TX_PENDING_FIRST )
+			{
+				state = (state & STATE_BARRIER) | STATE_TX_PENDING_SECOND;
+				call RadioAlarm.wait(getBackoff(call Config.getCongestionBackoff(txMsg)));
+			}
+			else
+			{
+				if( (state & STATE_BARRIER) && delay > 0 )
+				{
+					state = STATE_BARRIER;
+					call RadioAlarm.wait(delay);
+				}
+				else
+					state = STATE_READY;
+
+				signal RadioSend.sendDone(error);
+			}
+		}
+		else
+			state = STATE_TX_SENDING;
+	}
+
+	tasklet_async event void SubSend.sendDone(error_t error)
+	{
+		RADIO_ASSERT( state == STATE_TX_SENDING );
+
+		state = STATE_READY;
+		signal RadioSend.sendDone(error);
+	}
+
+	tasklet_async event bool SubReceive.header(message_t* msg)
+	{
+		return signal RadioReceive.header(msg);
+	}
+
+	tasklet_async event message_t* SubReceive.receive(message_t* msg)
+	{
+		int16_t delay;
+
+		txBarrier = call Config.getTransmitBarrier(msg);
+		delay = txBarrier - call RadioAlarm.getNow();
+
+		if( delay > 0 )
+		{
+			if( state == STATE_READY )
+			{
+				// disregard the barrier for now, this needs a better solution
+				if( call RadioAlarm.isFree() )
+				{
+					call RadioAlarm.wait(delay);
+					state = STATE_BARRIER;
+				}
+			}
+			else
+				state |= STATE_BARRIER;
+		}
+
+		return signal RadioReceive.receive(msg);
+	}
+}
diff --git a/tos/lib/rfxlink/layers/SlottedCollisionConfig.nc b/tos/lib/rfxlink/layers/SlottedCollisionConfig.nc
new file mode 100755
index 00000000..1447a873
--- /dev/null
+++ b/tos/lib/rfxlink/layers/SlottedCollisionConfig.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface SlottedCollisionConfig
+{
+	/**
+	 * This command should return the approximate transmit delay between
+	 * setting an alarm, waiting for the fire event, calling send and
+	 * obtaining the timestamp for the transmitted message.
+	 */
+	async command uint16_t getInitialDelay();
+
+	/**
+	 * Must return a binary exponent so that the collision avoidance layer
+	 * can assign slots in the range of [0, 1 << exponent) of size collision
+	 * window.
+	 */
+	async command uint8_t getScheduleExponent();
+
+	/**
+	 * This command must return the time when the message was transmitted.
+	 */
+	async command uint16_t getTransmitTime(message_t* msg);
+
+	/**
+	 * Returns the start of the collision window for this received message,
+	 * so transmit times in this range would be considered possible collisions.
+	 */
+	async command uint16_t getCollisionWindowStart(message_t* msg);
+
+	/**
+	 * Returns the size of the collision window for this received message.
+	 */
+	async command uint16_t getCollisionWindowLength(message_t* msg);
+}
diff --git a/tos/lib/rfxlink/layers/SlottedCollisionLayerC.nc b/tos/lib/rfxlink/layers/SlottedCollisionLayerC.nc
new file mode 100644
index 00000000..c43418b4
--- /dev/null
+++ b/tos/lib/rfxlink/layers/SlottedCollisionLayerC.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic configuration SlottedCollisionLayerC()
+{
+	provides
+	{
+		interface RadioSend;
+		interface RadioReceive;
+	}
+	uses
+	{
+		interface RadioSend as SubSend;
+		interface RadioReceive as SubReceive;
+		interface RadioAlarm;
+
+		interface SlottedCollisionConfig as Config;
+	}
+}
+
+implementation
+{
+	components new SlottedCollisionLayerP(), MainC, RandomC;
+
+	RadioSend = SlottedCollisionLayerP;
+	RadioReceive = SlottedCollisionLayerP;
+	SubSend = SlottedCollisionLayerP;
+	SubReceive = SlottedCollisionLayerP;
+	Config = SlottedCollisionLayerP;
+	RadioAlarm = SlottedCollisionLayerP;
+	
+	SlottedCollisionLayerP.Random -> RandomC;
+	MainC.SoftwareInit -> SlottedCollisionLayerP;
+
+#ifdef RADIO_DEBUG
+	components DiagMsgC;
+	SlottedCollisionLayerP.DiagMsg -> DiagMsgC;
+#endif
+}
diff --git a/tos/lib/rfxlink/layers/SlottedCollisionLayerP.nc b/tos/lib/rfxlink/layers/SlottedCollisionLayerP.nc
new file mode 100644
index 00000000..da366adb
--- /dev/null
+++ b/tos/lib/rfxlink/layers/SlottedCollisionLayerP.nc
@@ -0,0 +1,275 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+#include <RadioAssert.h>
+
+generic module SlottedCollisionLayerP()
+{
+	provides
+	{
+		interface RadioSend;
+		interface RadioReceive;
+		interface Init;
+	}
+	uses
+	{
+		interface RadioSend as SubSend;
+		interface RadioReceive as SubReceive;
+		interface RadioAlarm;
+		interface Random;
+		interface SlottedCollisionConfig as Config;
+#ifdef RADIO_DEBUG
+		interface DiagMsg;
+#endif
+	}
+}
+
+implementation
+{
+/* ----- random ----- */
+
+	uint16_t nextRandom;
+
+	task void calcNextRandom()
+	{
+		uint16_t a = call Random.rand16();
+		atomic nextRandom = a;
+	}
+
+	uint16_t getNextRandom()
+	{
+		uint16_t a;
+
+		atomic
+		{
+			a = nextRandom;
+			nextRandom += 273;
+		}
+		post calcNextRandom();
+
+		return a;
+	}
+
+/* ----- schedule selection ----- */
+
+	void printStats();
+
+	tasklet_async event bool SubReceive.header(message_t* msg)
+	{
+		return signal RadioReceive.header(msg);
+	}
+
+	// WARNING!!! Do not change these values, the error values can overflow
+	enum
+	{
+		ERROR_DECAY = 3,
+		ERROR_SWITCH = 30,		// should be a multiple of (1 << decay)
+		ERROR_COLLISION = 20,	// must be less than (255 - switch) >> decay
+		ERROR_BUSY = 1,			// must be less than collision
+		ERROR_INITIAL = 80,		// must be less than giveup
+		ERROR_GIVEUP = 120,		// must be less than collision * (1 << decay)
+		ERROR_REPRESS = 40,		// must be more than switch
+		ERROR_MAX = 255,
+	};
+
+	/**
+	 * Returns TRUE if time is between start and start + window 
+	 * modulo the schedule size of (1 << exponent)
+	 */
+	inline bool isBetween(uint8_t exponent, uint16_t time, uint16_t start, uint16_t length)
+	{
+		return (uint16_t)((time - start) & ((1 << exponent) - 1)) < length;
+	}
+
+	tasklet_norace uint16_t schedule1;
+	tasklet_norace uint16_t schedule2;
+
+	tasklet_norace uint8_t error1;
+	tasklet_norace uint8_t error2;
+
+	tasklet_async event message_t* SubReceive.receive(message_t* msg)
+	{
+		uint8_t exponent = call Config.getScheduleExponent();
+		uint16_t start = call Config.getCollisionWindowStart(msg);
+		uint16_t length = call Config.getCollisionWindowLength(msg);
+
+		error1 -= (error1 + (1<<ERROR_DECAY) - 1) >> ERROR_DECAY;
+		if( isBetween(exponent, schedule1, start, length) )
+			error1 += ERROR_COLLISION; 
+
+		error2 -= (error1 + (1<<ERROR_DECAY) - 1) >> ERROR_DECAY;
+		if( isBetween(exponent, schedule2, start, length) )
+			error2 += ERROR_COLLISION;
+
+		if( error2 + ERROR_SWITCH <= error1 )
+		{
+			error1 = error2;
+			schedule1 = schedule2;
+			error2 = ERROR_GIVEUP;
+		}
+
+		if( error2 >= ERROR_GIVEUP )
+		{
+			error2 = ERROR_INITIAL;
+			schedule2 = getNextRandom();
+		}
+
+		printStats();
+
+		return signal RadioReceive.receive(msg);
+	}
+
+/* ------ transmit ------ */
+
+	tasklet_norace uint8_t state;
+	enum
+	{
+		STATE_READY = 0,
+		STATE_PENDING = 1,
+		STATE_SENDING = 2,
+	};
+
+	enum { DELAY_DECAY = 2 };
+
+	tasklet_norace message_t *txMsg;
+	tasklet_norace uint16_t txDelay;	// the averaged delay between schedule and timestamp
+	tasklet_norace uint16_t txTime;		// the schedule time of transmission
+
+	tasklet_async event void SubSend.ready()
+	{
+		if( state == STATE_READY && call RadioAlarm.isFree() )
+			signal RadioSend.ready();
+	}
+
+	tasklet_async command error_t RadioSend.send(message_t* msg)
+	{
+		uint16_t backoff;
+		uint16_t time;
+
+		// TODO: we could supress transmission while error is large
+		if( state != STATE_READY || ! call RadioAlarm.isFree() || error1 >= ERROR_REPRESS )
+			return EBUSY;
+
+		txMsg = msg;
+		state = STATE_PENDING;
+
+		time = call RadioAlarm.getNow();
+		backoff = 1 + ((schedule1 - time - (txDelay >> DELAY_DECAY))
+			& ((1 << call Config.getScheduleExponent()) - 1));
+
+		backoff += getNextRandom() & (3 << call Config.getScheduleExponent());
+
+		call RadioAlarm.wait(backoff);
+		txTime = time + backoff;
+
+		printStats();
+
+		return SUCCESS;
+	}
+
+	tasklet_async event void RadioAlarm.fired()
+	{
+		error_t error;
+
+		RADIO_ASSERT( state == STATE_PENDING );
+
+		error = call SubSend.send(txMsg);
+		if( error == SUCCESS )
+			state = STATE_SENDING;
+		else
+		{
+			if( error2 + ERROR_SWITCH <= error1 )
+			{
+				error1 = error2;
+				schedule1 = schedule2;
+				error2 = ERROR_INITIAL;
+				schedule2 = getNextRandom();
+			}
+			else if( error1 < ERROR_MAX - ERROR_BUSY )
+				error1 = error1 + ERROR_BUSY;
+
+			state = STATE_READY;
+			signal RadioSend.sendDone(error);
+		}
+	}
+
+	tasklet_async event void SubSend.sendDone(error_t error)
+	{
+		RADIO_ASSERT( state == STATE_SENDING );
+
+		if( error == SUCCESS )
+		{
+			txDelay += (call Config.getTransmitTime(txMsg) - txTime) - (txDelay >> DELAY_DECAY);
+
+			RADIO_ASSERT( (txDelay >> DELAY_DECAY) < (1 << call Config.getScheduleExponent()) );
+		}
+
+		state = STATE_READY;
+		signal RadioSend.sendDone(error);
+	}
+
+/* ------ init  ------ */
+
+	command error_t Init.init()
+	{
+		// do not use Random here because it might not be initialized
+		schedule1 = (uint16_t)(TOS_NODE_ID * 1973);
+		schedule2 = schedule1 + 0117;
+		txDelay = call Config.getInitialDelay() << DELAY_DECAY;
+
+		return SUCCESS;
+	}
+
+#ifdef RADIO_DEBUG
+	tasklet_norace uint8_t count;
+	void printStats()
+	{
+		if( ++count > 50 && call DiagMsg.record() )
+		{
+			count = 0;
+
+			call DiagMsg.str("slotted");
+			call DiagMsg.uint16(txDelay >> DELAY_DECAY);
+			call DiagMsg.uint16(schedule1);
+			call DiagMsg.uint8(error1);
+			call DiagMsg.uint16(schedule2);
+			call DiagMsg.uint8(error2);
+			call DiagMsg.send();
+		}
+	}
+#else
+	void printStats() { }
+#endif
+}
diff --git a/tos/lib/rfxlink/layers/SoftwareAckConfig.nc b/tos/lib/rfxlink/layers/SoftwareAckConfig.nc
new file mode 100755
index 00000000..bc19232d
--- /dev/null
+++ b/tos/lib/rfxlink/layers/SoftwareAckConfig.nc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+
+interface SoftwareAckConfig
+{
+	/**
+	 * Returns the acknowledgement timeout (in the radio clock units),
+	 * in which a sent packet must be acknowledged.
+	 */
+	async command uint16_t getAckTimeout();
+
+	/**
+	 * Sets the flag in the message indicating to the receiver whether
+	 * the message should be acknowledged.
+	 */
+	async command void setAckRequired(message_t* msg, bool ack);
+	 
+	/**
+	 * Returns TRUE if the layer should wait for a software acknowledgement
+	 * to be received after this packet was transmitted.
+	 */
+	async command bool requiresAckWait(message_t* msg);
+
+	/**
+	 * Returns TRUE if the received packet is an acknowledgement packet.
+	 * The AckedSend layer will filter out all received acknowledgement
+	 * packets and uses  only the matching one for the acknowledgement.
+	 */
+	async command bool isAckPacket(message_t* msg);
+
+	/**
+	 * Returns TRUE if the acknowledgement packet corresponds to the
+	 * data packet. The acknowledgement packect was already verified 
+	 * to be a valid acknowledgement packet via the isAckPacket command.
+	 */
+	async command bool verifyAckPacket(message_t* data, message_t* ack);
+
+	/**
+	 * Returns TRUE if the received packet needs software acknowledgements
+	 * to be sent back to the sender.
+	 */
+	async command bool requiresAckReply(message_t* msg);
+
+	/**
+	 * Creates an acknowledgement packet for the given data packet.
+	 */
+	async command void createAckPacket(message_t* data, message_t* ack);
+
+	/**
+	 * This command is called when a sent packet did not receive an
+	 * acknowledgement.
+	 */
+	tasklet_async command void reportChannelError();
+}
diff --git a/tos/lib/rfxlink/layers/SoftwareAckLayerC.nc b/tos/lib/rfxlink/layers/SoftwareAckLayerC.nc
new file mode 100644
index 00000000..46a12002
--- /dev/null
+++ b/tos/lib/rfxlink/layers/SoftwareAckLayerC.nc
@@ -0,0 +1,198 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+#include <RadioAssert.h>
+
+generic module SoftwareAckLayerC()
+{
+	provides
+	{
+		interface RadioSend;
+		interface RadioReceive;
+		interface PacketAcknowledgements;
+	}
+
+	uses
+	{
+		interface RadioSend as SubSend;
+		interface RadioReceive as SubReceive;
+		interface RadioAlarm;
+
+		interface SoftwareAckConfig as Config;
+		interface PacketFlag as AckReceivedFlag;
+	}
+}
+
+implementation
+{
+	tasklet_norace uint8_t state;
+	enum
+	{
+		STATE_READY = 0,
+		STATE_DATA_SEND = 1,
+		STATE_ACK_WAIT = 2,
+		STATE_ACK_SEND = 3,
+	};
+
+	tasklet_norace message_t *txMsg;
+	tasklet_norace message_t ackMsg;
+
+	tasklet_async event void SubSend.ready()
+	{
+		if( state == STATE_READY )
+			signal RadioSend.ready();
+	}
+
+	tasklet_async command error_t RadioSend.send(message_t* msg)
+	{
+		error_t error;
+
+		if( state == STATE_READY )
+		{
+			if( (error = call SubSend.send(msg)) == SUCCESS )
+			{
+				call AckReceivedFlag.clear(msg);
+				state = STATE_DATA_SEND;
+				txMsg = msg;
+			}
+		}
+		else
+			error = EBUSY;
+
+		return error;
+	}
+
+	tasklet_async event void SubSend.sendDone(error_t error)
+	{
+		if( state == STATE_ACK_SEND )
+		{
+			// TODO: what if error != SUCCESS
+			RADIO_ASSERT( error == SUCCESS );
+
+			state = STATE_READY;
+		}
+		else
+		{
+			RADIO_ASSERT( state == STATE_DATA_SEND );
+			RADIO_ASSERT( call RadioAlarm.isFree() );
+
+			if( error == SUCCESS && call Config.requiresAckWait(txMsg) && call RadioAlarm.isFree() )
+			{
+				call RadioAlarm.wait(call Config.getAckTimeout());
+				state = STATE_ACK_WAIT;
+			}
+			else
+			{
+				state = STATE_READY;
+				signal RadioSend.sendDone(error);
+			}
+		}
+	}
+
+	tasklet_async event void RadioAlarm.fired()
+	{
+		RADIO_ASSERT( state == STATE_ACK_WAIT );
+
+		call Config.reportChannelError();
+
+		state = STATE_READY;
+		signal RadioSend.sendDone(SUCCESS);	// we have sent it, but not acked
+	}
+
+	tasklet_async event bool SubReceive.header(message_t* msg)
+	{
+		if( call Config.isAckPacket(msg) )
+			return state == STATE_ACK_WAIT && call Config.verifyAckPacket(txMsg, msg);
+		else
+			return signal RadioReceive.header(msg);
+	}
+
+	tasklet_async event message_t* SubReceive.receive(message_t* msg)
+	{
+		bool ack = call Config.isAckPacket(msg);
+
+		RADIO_ASSERT( state == STATE_ACK_WAIT || state == STATE_READY );
+
+		if( state == STATE_ACK_WAIT )
+		{
+			RADIO_ASSERT( !ack || call Config.verifyAckPacket(txMsg, msg) );
+
+			call RadioAlarm.cancel();
+			call AckReceivedFlag.setValue(txMsg, ack);
+
+			state = STATE_READY;
+			signal RadioSend.sendDone(SUCCESS);
+		}
+
+		if( ack )
+			return msg;
+
+		if( call Config.requiresAckReply(msg) )
+		{
+			call Config.createAckPacket(msg, &ackMsg);
+
+			// TODO: what to do if we are busy and cannot send an ack
+			if( call SubSend.send(&ackMsg) == SUCCESS )
+				state = STATE_ACK_SEND;
+			else
+				RADIO_ASSERT(FALSE);
+		}
+
+		return signal RadioReceive.receive(msg);
+	}
+
+/*----------------- PacketAcknowledgements -----------------*/
+
+	async command error_t PacketAcknowledgements.requestAck(message_t* msg)
+	{
+		call Config.setAckRequired(msg, TRUE);
+
+		return SUCCESS;
+	}
+
+	async command error_t PacketAcknowledgements.noAck(message_t* msg)
+	{
+		call Config.setAckRequired(msg, FALSE);
+
+		return SUCCESS;
+	}
+
+	async command bool PacketAcknowledgements.wasAcked(message_t* msg)
+	{
+		return call AckReceivedFlag.get(msg);
+	}
+
+
+}
diff --git a/tos/lib/rfxlink/layers/TimeStampingLayer.h b/tos/lib/rfxlink/layers/TimeStampingLayer.h
new file mode 100644
index 00000000..e4356fb1
--- /dev/null
+++ b/tos/lib/rfxlink/layers/TimeStampingLayer.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __TIMESTAMPINGLAYER_H__
+#define __TIMESTAMPINGLAYER_H__
+
+typedef struct timestamp_metadata_t
+{
+	uint32_t timestamp;
+} timestamp_metadata_t;
+
+#endif//__TIMESTAMPINGLAYER_H__
diff --git a/tos/lib/rfxlink/layers/TimeStampingLayerC.nc b/tos/lib/rfxlink/layers/TimeStampingLayerC.nc
new file mode 100644
index 00000000..cd0fcffb
--- /dev/null
+++ b/tos/lib/rfxlink/layers/TimeStampingLayerC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include "RadioConfig.h"
+
+generic configuration TimeStampingLayerC()
+{
+	provides
+	{
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface RadioPacket;
+	}
+
+	uses
+	{
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface RadioPacket as SubPacket;
+		interface PacketFlag as TimeStampFlag;
+	}
+}
+
+implementation
+{
+	components new TimeStampingLayerP(), LocalTimeMilliC;
+
+	PacketTimeStampMilli = TimeStampingLayerP;
+	PacketTimeStampRadio = TimeStampingLayerP;
+	RadioPacket = TimeStampingLayerP.RadioPacket;
+	SubPacket = TimeStampingLayerP.SubPacket;
+
+	LocalTimeRadio = TimeStampingLayerP;
+	TimeStampingLayerP.LocalTimeMilli -> LocalTimeMilliC;
+
+	TimeStampFlag = TimeStampingLayerP.TimeStampFlag;
+}
diff --git a/tos/lib/rfxlink/layers/TimeStampingLayerP.nc b/tos/lib/rfxlink/layers/TimeStampingLayerP.nc
new file mode 100644
index 00000000..6301b236
--- /dev/null
+++ b/tos/lib/rfxlink/layers/TimeStampingLayerP.nc
@@ -0,0 +1,146 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+#include <TimeStampingLayer.h>
+
+generic module TimeStampingLayerP()
+{
+	provides
+	{
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface RadioPacket;
+	}
+
+	uses
+	{
+		interface PacketFlag as TimeStampFlag;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface LocalTime<TMilli> as LocalTimeMilli;
+
+		interface RadioPacket as SubPacket;
+	}
+}
+
+implementation
+{
+	timestamp_metadata_t* getMeta(message_t* msg)
+	{
+		return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg);
+	}
+
+/*----------------- PacketTimeStampRadio -----------------*/
+	
+	async command bool PacketTimeStampRadio.isValid(message_t* msg)
+	{
+		return call TimeStampFlag.get(msg);
+	}
+
+	async command uint32_t PacketTimeStampRadio.timestamp(message_t* msg)
+	{
+		return getMeta(msg)->timestamp;
+	}
+
+	async command void PacketTimeStampRadio.clear(message_t* msg)
+	{
+		call TimeStampFlag.clear(msg);
+	}
+
+	async command void PacketTimeStampRadio.set(message_t* msg, uint32_t value)
+	{
+		call TimeStampFlag.set(msg);
+		getMeta(msg)->timestamp = value;
+	}
+
+/*----------------- PacketTimeStampMilli -----------------*/
+
+	async command bool PacketTimeStampMilli.isValid(message_t* msg)
+	{
+		return call PacketTimeStampRadio.isValid(msg);
+	}
+
+	async command uint32_t PacketTimeStampMilli.timestamp(message_t* msg)
+	{
+		int32_t offset = call PacketTimeStampRadio.timestamp(msg) - call LocalTimeRadio.get();
+
+		return (offset >> RADIO_ALARM_MILLI_EXP) + call LocalTimeMilli.get();
+	}
+
+	async command void PacketTimeStampMilli.clear(message_t* msg)
+	{
+		call PacketTimeStampRadio.clear(msg);
+	}
+
+	async command void PacketTimeStampMilli.set(message_t* msg, uint32_t value)
+	{
+		int32_t offset = (value - call LocalTimeMilli.get()) << RADIO_ALARM_MILLI_EXP;
+
+		call PacketTimeStampRadio.set(msg, offset + call LocalTimeRadio.get());
+	}
+
+/*----------------- RadioPacket -----------------*/
+	
+	async command uint8_t RadioPacket.headerLength(message_t* msg)
+	{
+		return call SubPacket.headerLength(msg);
+	}
+
+	async command uint8_t RadioPacket.payloadLength(message_t* msg)
+	{
+		return call SubPacket.payloadLength(msg);
+	}
+
+	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		call SubPacket.setPayloadLength(msg, length);
+	}
+
+	async command uint8_t RadioPacket.maxPayloadLength()
+	{
+		return call SubPacket.maxPayloadLength();
+	}
+
+	async command uint8_t RadioPacket.metadataLength(message_t* msg)
+	{
+		return call SubPacket.metadataLength(msg) + sizeof(timestamp_metadata_t);
+	}
+
+	async command void RadioPacket.clear(message_t* msg)
+	{
+		// all flags are automatically cleared
+		call SubPacket.clear(msg);
+	}
+}
diff --git a/tos/lib/rfxlink/layers/TimeSyncMessageLayer.h b/tos/lib/rfxlink/layers/TimeSyncMessageLayer.h
new file mode 100644
index 00000000..bfbe8ce2
--- /dev/null
+++ b/tos/lib/rfxlink/layers/TimeSyncMessageLayer.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+ 
+#ifndef __TIMESYNCMESSAGELAYER_H__
+#define __TIMESYNCMESSAGELAYER_H__
+
+#include <AM.h>
+
+#ifndef AM_TIMESYNCMSG
+#define AM_TIMESYNCMSG 0x3D
+#endif
+
+// this is sent over the air
+typedef nx_int32_t timesync_relative_t;
+
+// this is stored in memory
+typedef nx_uint32_t timesync_absolute_t;
+
+typedef nx_struct timesync_footer_t
+{
+	nx_am_id_t type;	
+	nx_union timestamp_t
+	{
+		timesync_relative_t relative;
+		timesync_absolute_t absolute;
+	} timestamp;
+} timesync_footer_t;
+
+#endif//__TIMESYNCMESSAGELAYER_H__
diff --git a/tos/lib/rfxlink/layers/TimeSyncMessageLayerC.nc b/tos/lib/rfxlink/layers/TimeSyncMessageLayerC.nc
new file mode 100644
index 00000000..99bfe5c1
--- /dev/null
+++ b/tos/lib/rfxlink/layers/TimeSyncMessageLayerC.nc
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Timer.h>
+#include <AM.h>
+#include <RadioConfig.h>
+#include <TimeSyncMessageLayer.h>
+
+generic configuration TimeSyncMessageLayerC()
+{
+	provides
+	{
+		interface Receive[uint8_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface AMPacket;
+		interface Packet;
+
+		interface TimeSyncAMSend<TRadio, uint32_t> as TimeSyncAMSendRadio[am_id_t id];
+		interface TimeSyncPacket<TRadio, uint32_t> as TimeSyncPacketRadio;
+
+		interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+		interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+	}
+
+	uses
+	{
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface PacketField<uint8_t> as PacketTimeSyncOffset;
+	}
+}
+
+implementation
+{
+	components new TimeSyncMessageLayerP(), LocalTimeMilliC;
+
+	AMPacket = TimeSyncMessageLayerP;
+	Packet = TimeSyncMessageLayerP;
+
+	Receive = TimeSyncMessageLayerP.Receive;
+	Snoop = TimeSyncMessageLayerP.Snoop;
+
+	TimeSyncAMSendRadio = TimeSyncMessageLayerP;
+	TimeSyncPacketRadio = TimeSyncMessageLayerP;
+
+	TimeSyncAMSendMilli = TimeSyncMessageLayerP;
+	TimeSyncPacketMilli = TimeSyncMessageLayerP;
+
+	// Ok, we use the AMSenderC infrastructure to avoid concurrent send clashes
+	components new AMSenderC(AM_TIMESYNCMSG);
+	TimeSyncMessageLayerP.SubAMSend -> AMSenderC;
+	TimeSyncMessageLayerP.SubAMPacket -> AMSenderC;
+	TimeSyncMessageLayerP.SubPacket -> AMSenderC;
+
+	components ActiveMessageC;
+	TimeSyncMessageLayerP.SubReceive -> ActiveMessageC.Receive[AM_TIMESYNCMSG];
+	TimeSyncMessageLayerP.SubSnoop -> ActiveMessageC.Snoop[AM_TIMESYNCMSG];;
+
+	PacketTimeStampRadio = TimeSyncMessageLayerP;
+	PacketTimeStampMilli = TimeSyncMessageLayerP;
+	
+	TimeSyncMessageLayerP.LocalTimeMilli -> LocalTimeMilliC;
+	LocalTimeRadio = TimeSyncMessageLayerP;
+	PacketTimeSyncOffset = TimeSyncMessageLayerP;
+}
diff --git a/tos/lib/rfxlink/layers/TimeSyncMessageLayerP.nc b/tos/lib/rfxlink/layers/TimeSyncMessageLayerP.nc
new file mode 100644
index 00000000..8f9a3e12
--- /dev/null
+++ b/tos/lib/rfxlink/layers/TimeSyncMessageLayerP.nc
@@ -0,0 +1,277 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <TimeSyncMessageLayer.h>
+
+generic module TimeSyncMessageLayerP()
+{
+	provides
+	{
+		interface Receive[am_id_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface AMPacket;
+		interface Packet;
+
+		interface TimeSyncAMSend<TRadio, uint32_t> as TimeSyncAMSendRadio[am_id_t id];
+		interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+
+		interface TimeSyncPacket<TRadio, uint32_t> as TimeSyncPacketRadio;
+		interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+	}
+
+	uses
+	{
+		interface AMSend as SubAMSend;
+		interface Receive as SubReceive;
+		interface Receive as SubSnoop;
+		interface AMPacket as SubAMPacket;
+		interface Packet as SubPacket;
+
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface LocalTime<TMilli> as LocalTimeMilli;
+
+		interface PacketField<uint8_t> as PacketTimeSyncOffset;
+	}
+}
+
+implementation
+{
+	inline timesync_footer_t* getFooter(message_t* msg)
+	{
+		// we use the payload length that we export (the smaller one)
+		return (timesync_footer_t*)(msg->data + call Packet.payloadLength(msg));
+	}
+
+/*----------------- Packet -----------------*/
+
+	command void Packet.clear(message_t* msg)
+	{
+		call SubPacket.clear(msg);
+	}
+
+	command void Packet.setPayloadLength(message_t* msg, uint8_t len)
+	{
+		call SubPacket.setPayloadLength(msg, len + sizeof(timesync_footer_t));
+	}
+
+	command uint8_t Packet.payloadLength(message_t* msg)
+	{
+		return call SubPacket.payloadLength(msg) - sizeof(timesync_footer_t);
+	}
+
+	command uint8_t Packet.maxPayloadLength()
+	{
+		return call SubPacket.maxPayloadLength() - sizeof(timesync_footer_t);
+	}
+
+	command void* Packet.getPayload(message_t* msg, uint8_t len)
+	{
+		return call SubPacket.getPayload(msg, len + sizeof(timesync_footer_t));
+	}
+
+/*----------------- AMPacket -----------------*/
+
+	inline command am_addr_t AMPacket.address()
+	{
+		return call SubAMPacket.address();
+	}
+ 
+	inline command am_group_t AMPacket.localGroup()
+	{
+		return call SubAMPacket.localGroup();
+	}
+
+	inline command bool AMPacket.isForMe(message_t* msg)
+	{
+		return call SubAMPacket.isForMe(msg) && call SubAMPacket.type(msg) == AM_TIMESYNCMSG;
+	}
+
+	inline command am_addr_t AMPacket.destination(message_t* msg)
+	{
+		return call SubAMPacket.destination(msg);
+	}
+ 
+	inline command void AMPacket.setDestination(message_t* msg, am_addr_t addr)
+	{
+		call SubAMPacket.setDestination(msg, addr);
+	}
+
+	inline command am_addr_t AMPacket.source(message_t* msg)
+	{
+		return call SubAMPacket.source(msg);
+	}
+
+	inline command void AMPacket.setSource(message_t* msg, am_addr_t addr)
+	{
+		call SubAMPacket.setSource(msg, addr);
+	}
+
+	inline command am_id_t AMPacket.type(message_t* msg)
+	{
+		return getFooter(msg)->type;
+	}
+
+	inline command void AMPacket.setType(message_t* msg, am_id_t type)
+	{
+		getFooter(msg)->type = type;
+	}
+  
+	inline command am_group_t AMPacket.group(message_t* msg) 
+	{
+		return call SubAMPacket.group(msg);
+	}
+
+	inline command void AMPacket.setGroup(message_t* msg, am_group_t grp)
+	{
+		call SubAMPacket.setGroup(msg, grp);
+	}
+
+/*----------------- TimeSyncAMSendRadio -----------------*/
+
+	command error_t TimeSyncAMSendRadio.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time)
+	{
+		timesync_footer_t* footer = (timesync_footer_t*)(msg->data + len);
+
+		footer->type = id;
+		footer->timestamp.absolute = event_time;
+		call PacketTimeSyncOffset.set(msg, offsetof(message_t, data) + len + offsetof(timesync_footer_t, timestamp.absolute));
+
+		return call SubAMSend.send(addr, msg, len + sizeof(timesync_footer_t));
+	}
+
+	command error_t TimeSyncAMSendRadio.cancel[am_id_t id](message_t* msg)
+	{
+		return call SubAMSend.cancel(msg);
+	}
+
+	default event void TimeSyncAMSendRadio.sendDone[am_id_t id](message_t* msg, error_t error)
+	{
+	}
+
+	command uint8_t TimeSyncAMSendRadio.maxPayloadLength[am_id_t id]()
+	{
+		return call SubAMSend.maxPayloadLength() - sizeof(timesync_footer_t);
+	}
+
+	command void* TimeSyncAMSendRadio.getPayload[am_id_t id](message_t* msg, uint8_t len)
+	{
+		return call SubAMSend.getPayload(msg, len + sizeof(timesync_footer_t));
+	}
+
+/*----------------- TimeSyncAMSendMilli -----------------*/
+
+	command error_t TimeSyncAMSendMilli.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len, uint32_t event_time)
+	{
+		// compute elapsed time in millisecond
+		event_time = ((int32_t)(event_time - call LocalTimeMilli.get()) << RADIO_ALARM_MILLI_EXP) + call LocalTimeRadio.get();
+
+		return call TimeSyncAMSendRadio.send[id](addr, msg, len, event_time);
+	}
+
+	command error_t TimeSyncAMSendMilli.cancel[am_id_t id](message_t* msg)
+	{
+		return call TimeSyncAMSendRadio.cancel[id](msg);
+	}
+
+	default event void TimeSyncAMSendMilli.sendDone[am_id_t id](message_t* msg, error_t error)
+	{
+	}
+
+	command uint8_t TimeSyncAMSendMilli.maxPayloadLength[am_id_t id]()
+	{
+		return call TimeSyncAMSendRadio.maxPayloadLength[id]();
+	}
+
+	command void* TimeSyncAMSendMilli.getPayload[am_id_t id](message_t* msg, uint8_t len)
+	{
+		return call TimeSyncAMSendRadio.getPayload[id](msg, len);
+	}
+
+/*----------------- SubSend.sendDone -------------------*/
+
+	event void SubAMSend.sendDone(message_t* msg, error_t error)
+	{
+		am_id_t id = call AMPacket.type(msg);
+
+		signal TimeSyncAMSendRadio.sendDone[id](msg, error);
+		signal TimeSyncAMSendMilli.sendDone[id](msg, error);
+	}
+
+/*----------------- SubReceive and SubSnoop -------------------*/
+
+	event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len)
+	{
+		am_id_t id = call AMPacket.type(msg);
+
+		return signal Receive.receive[id](msg, payload, len - sizeof(timesync_footer_t));
+	}
+
+	default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; }
+
+	event message_t* SubSnoop.receive(message_t* msg, void* payload, uint8_t len)
+	{
+		am_id_t id = call AMPacket.type(msg);
+
+		return signal Snoop.receive[id](msg, payload, len - sizeof(timesync_footer_t));
+	}
+
+	default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return msg; }
+
+/*----------------- TimeSyncPacketRadio -----------------*/
+
+	command bool TimeSyncPacketRadio.isValid(message_t* msg)
+	{
+		return call PacketTimeStampRadio.isValid(msg) && getFooter(msg)->timestamp.relative != 0x80000000L;
+	}
+
+	command uint32_t TimeSyncPacketRadio.eventTime(message_t* msg)
+	{
+		return getFooter(msg)->timestamp.relative + call PacketTimeStampRadio.timestamp(msg);
+	}
+
+/*----------------- TimeSyncPacketMilli -----------------*/
+
+	command bool TimeSyncPacketMilli.isValid(message_t* msg)
+	{
+		return call PacketTimeStampMilli.isValid(msg) && getFooter(msg)->timestamp.relative != 0x80000000L;
+	}
+
+	command uint32_t TimeSyncPacketMilli.eventTime(message_t* msg)
+	{
+		return ((int32_t)(getFooter(msg)->timestamp.relative) >> RADIO_ALARM_MILLI_EXP) + call PacketTimeStampMilli.timestamp(msg);
+	}
+}
diff --git a/tos/lib/rfxlink/layers/TinyosNetworkLayer.h b/tos/lib/rfxlink/layers/TinyosNetworkLayer.h
new file mode 100644
index 00000000..4cdbedee
--- /dev/null
+++ b/tos/lib/rfxlink/layers/TinyosNetworkLayer.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __TINYOSNETWORKLAYER_H__
+#define __TINYOSNETWORKLAYER_H__
+
+#ifndef TINYOS_6LOWPAN_NETWORK_ID
+#define TINYOS_6LOWPAN_NETWORK_ID 0x3f
+#endif
+
+typedef nx_struct network_header_t
+{
+	nxle_uint8_t network;
+} network_header_t;
+
+#endif//__TINYOSNETWORKLAYER_H__
diff --git a/tos/lib/rfxlink/layers/TinyosNetworkLayerC.nc b/tos/lib/rfxlink/layers/TinyosNetworkLayerC.nc
new file mode 100644
index 00000000..81e3ceb9
--- /dev/null
+++ b/tos/lib/rfxlink/layers/TinyosNetworkLayerC.nc
@@ -0,0 +1,231 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <TinyosNetworkLayer.h>
+
+/*
+   If TFRAMES_ENABLED is defined, then only TinyOS frames will be supported
+   (with no network byte). If IEEE154FRAMES_ENABLED, then only IEEE 802.15.4 
+   frames will be supported (the network byte is part of the payload). If 
+   neither is defined, then both TinyOS frames and IEEE 802.15.4 frames will
+   be supported where TinyOS frames are the ones whose network byte is
+   TINYOS_6LOWPAN_NETWORK_ID.
+*/
+
+#if defined(TFRAMES_ENABLED) && defined(IEEE154FRAMES_ENABLED)
+#error You cannot specify both TFRAMES_ENABLED and IEEE154FRAMES_ENABLED at the same time
+#endif
+
+generic module TinyosNetworkLayerC()
+{
+	provides
+	{
+#ifndef TFRAMES_ENABLED
+		interface BareSend as Ieee154Send;
+		interface BareReceive as Ieee154Receive;
+		interface RadioPacket as Ieee154Packet;
+#endif
+
+#ifndef IEEE154FRAMES_ENABLED
+		interface BareSend as TinyosSend;
+		interface BareReceive as TinyosReceive;
+		interface RadioPacket as TinyosPacket;
+#endif
+	}
+
+	uses
+	{
+		interface BareSend as SubSend;
+		interface BareReceive as SubReceive;
+		interface RadioPacket as SubPacket;
+	}
+}
+
+implementation
+{
+/*----------------- Ieee154MessageC -----------------*/
+
+#ifndef TFRAMES_ENABLED
+
+	command error_t Ieee154Send.send(message_t* msg)
+	{
+		return call SubSend.send(msg);
+	}
+
+	command error_t Ieee154Send.cancel(message_t* msg)
+	{
+		return call SubSend.cancel(msg);
+	}
+	
+	async command uint8_t Ieee154Packet.headerLength(message_t* msg)
+	{
+		return call SubPacket.headerLength(msg);
+	}
+
+	async command uint8_t Ieee154Packet.payloadLength(message_t* msg)
+	{
+		return call SubPacket.payloadLength(msg);
+	}
+
+	async command void Ieee154Packet.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		call SubPacket.setPayloadLength(msg, length);
+	}
+
+	async command uint8_t Ieee154Packet.maxPayloadLength()
+	{
+		return call SubPacket.maxPayloadLength();
+	}
+
+	async command uint8_t Ieee154Packet.metadataLength(message_t* msg)
+	{
+		return call SubPacket.metadataLength(msg);
+	}
+
+	async command void Ieee154Packet.clear(message_t* msg)
+	{
+		call SubPacket.clear(msg);
+	}
+
+#endif
+
+/*----------------- ActiveMessageC -----------------*/
+
+#ifndef IEEE154FRAMES_ENABLED
+
+	network_header_t* getHeader(message_t* msg)
+	{
+		return ((void*)msg) + call SubPacket.headerLength(msg);
+	}
+
+	command error_t TinyosSend.send(message_t* msg)
+	{
+#ifndef TFRAMES_ENABLED
+		getHeader(msg)->network = TINYOS_6LOWPAN_NETWORK_ID;
+#endif
+		return call SubSend.send(msg);
+	}
+
+	command error_t TinyosSend.cancel(message_t* msg)
+	{
+		return call SubSend.cancel(msg);
+	}
+
+	enum
+	{
+#ifndef TFRAMES_ENABLED
+		PAYLOAD_OFFSET = sizeof(network_header_t),
+#else
+		PAYLOAD_OFFSET = 0,
+#endif
+	};
+
+	async command uint8_t TinyosPacket.headerLength(message_t* msg)
+	{
+		return call SubPacket.headerLength(msg) + PAYLOAD_OFFSET;
+	}
+
+	async command uint8_t TinyosPacket.payloadLength(message_t* msg)
+	{
+		return call SubPacket.payloadLength(msg) - PAYLOAD_OFFSET;
+	}
+
+	async command void TinyosPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		call SubPacket.setPayloadLength(msg, length + PAYLOAD_OFFSET);
+	}
+
+	async command uint8_t TinyosPacket.maxPayloadLength()
+	{
+		return call SubPacket.maxPayloadLength() - PAYLOAD_OFFSET;
+	}
+
+	async command uint8_t TinyosPacket.metadataLength(message_t* msg)
+	{
+		return call SubPacket.metadataLength(msg);
+	}
+
+	async command void TinyosPacket.clear(message_t* msg)
+	{
+		call SubPacket.clear(msg);
+	}
+
+#endif
+
+/*----------------- Events -----------------*/
+
+#if defined(TFRAMES_ENABLED)
+
+	event void SubSend.sendDone(message_t* msg, error_t result)
+	{
+		signal TinyosSend.sendDone(msg, result);
+	}
+
+	event message_t* SubReceive.receive(message_t* msg)
+	{
+		return signal TinyosReceive.receive(msg);
+	}
+
+#elif defined(IEEE154FRAMES_ENABLED)
+
+	event void SubSend.sendDone(message_t* msg, error_t result)
+	{
+		signal Ieee154Send.sendDone(msg, result);
+	}
+
+	event message_t* SubReceive.receive(message_t* msg)
+	{
+		return signal Ieee154Receive.receive(msg);
+	}
+
+#else
+
+	event void SubSend.sendDone(message_t* msg, error_t result)
+	{
+		if( getHeader(msg)->network == TINYOS_6LOWPAN_NETWORK_ID )
+			signal TinyosSend.sendDone(msg, result);
+		else
+			signal Ieee154Send.sendDone(msg, result);
+	}
+
+	event message_t* SubReceive.receive(message_t* msg)
+	{
+		if( getHeader(msg)->network == TINYOS_6LOWPAN_NETWORK_ID )
+			return signal TinyosReceive.receive(msg);
+		else
+			return signal Ieee154Receive.receive(msg);
+	}
+
+#endif
+}
diff --git a/tos/lib/rfxlink/layers/TrafficMonitorConfig.nc b/tos/lib/rfxlink/layers/TrafficMonitorConfig.nc
new file mode 100755
index 00000000..b75a3b00
--- /dev/null
+++ b/tos/lib/rfxlink/layers/TrafficMonitorConfig.nc
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+
+interface TrafficMonitorConfig
+{
+	/**
+	 * Returns the frequency (in milliseconds) when the traffic averages
+	 * should be updated. 
+	 */
+	async command uint16_t getUpdatePeriod();
+
+	/**
+	 * Returns the amount of time this message has occupied the channel.
+	 */
+	async command uint16_t getChannelTime(message_t* msg);
+
+	/**
+	 * Returns the sender address of the message so we can calculate the
+	 * average number of neighbors that send messages per update period.
+	 */
+	async command am_addr_t getSender(message_t* msg);
+
+	/**
+	 * This event should be fired if we notice some anomalies in the operation
+	 * of the channel, such as not receiving acknowledgements, missing
+	 * sequence numbers or packets with corrupted CRC.
+	 */
+	tasklet_async event void channelError();
+
+	/**
+	 * Returns the averaged (exponential decay) transmit channel time 
+	 * during one update period.
+	 */
+	tasklet_async event uint16_t getTransmitAverage();
+
+	/**
+	 * Returns the averaged (exponential decay) receive channel time 
+	 * during one update period.
+	 */
+	tasklet_async event uint16_t getReceiveAverage();
+
+	/**
+	 * Returns the averaged (exponential decay) number of neighbors 
+	 * whose messages this component receives during one update period.
+	 */
+	tasklet_async event uint8_t getNeighborAverage();
+
+	/**
+	 * Returns the averaged error events during one update period.
+	 */
+	tasklet_async event uint8_t getErrorAverage();
+}
diff --git a/tos/lib/rfxlink/layers/TrafficMonitorLayerC.nc b/tos/lib/rfxlink/layers/TrafficMonitorLayerC.nc
new file mode 100644
index 00000000..4be144e9
--- /dev/null
+++ b/tos/lib/rfxlink/layers/TrafficMonitorLayerC.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic configuration TrafficMonitorLayerC()
+{
+	provides
+	{
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioState;
+	}
+	uses
+	{
+		interface RadioSend as SubSend;
+		interface RadioReceive as SubReceive;
+		interface RadioState as SubState;
+
+		interface TrafficMonitorConfig as Config;
+	}
+}
+
+implementation
+{
+	components new TrafficMonitorLayerP(), new TimerMilliC() as UpdateTimerC; 
+	components NeighborhoodC, new NeighborhoodFlagC(), TaskletC;
+
+	RadioSend = TrafficMonitorLayerP;
+	RadioReceive = TrafficMonitorLayerP;
+	RadioState = TrafficMonitorLayerP;
+	SubSend = TrafficMonitorLayerP;
+	SubReceive = TrafficMonitorLayerP;
+	SubState = TrafficMonitorLayerP;
+	Config = TrafficMonitorLayerP;
+
+	TrafficMonitorLayerP.Timer -> UpdateTimerC;
+	TrafficMonitorLayerP.Neighborhood -> NeighborhoodC;
+	TrafficMonitorLayerP.NeighborhoodFlag -> NeighborhoodFlagC;
+	TrafficMonitorLayerP.Tasklet -> TaskletC;
+
+#ifdef RADIO_DEBUG
+	components DiagMsgC;
+	TrafficMonitorLayerP.DiagMsg -> DiagMsgC;
+#endif
+}
diff --git a/tos/lib/rfxlink/layers/TrafficMonitorLayerP.nc b/tos/lib/rfxlink/layers/TrafficMonitorLayerP.nc
new file mode 100644
index 00000000..c7d3198b
--- /dev/null
+++ b/tos/lib/rfxlink/layers/TrafficMonitorLayerP.nc
@@ -0,0 +1,256 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+
+/*
+ * You have to make sure that the maximum channel time in one report
+ * period times (1 << TRAFFIC_MONITOR_DECAY) is less than 65535.
+ */
+#ifndef TRAFFIC_MONITOR_DECAY
+#define TRAFFIC_MONITOR_DECAY	3
+#endif
+
+generic module TrafficMonitorLayerP()
+{
+	provides
+	{
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioState;
+	}
+
+	uses
+	{
+		interface TrafficMonitorConfig;
+		interface RadioSend as SubSend;
+		interface RadioReceive as SubReceive;
+		interface RadioState as SubState;
+		interface Timer<TMilli> as Timer;
+		interface Neighborhood;
+		interface NeighborhoodFlag;
+		interface Tasklet;
+#ifdef RADIO_DEBUG
+		interface DiagMsg;
+#endif
+	}
+}
+
+implementation
+{
+	tasklet_norace message_t *txMsg;
+	tasklet_norace uint8_t neighborCount;
+
+	tasklet_norace uint16_t txAverage;
+	tasklet_norace uint16_t rxAverage;
+	tasklet_norace uint8_t neighborAverage;
+	tasklet_norace uint8_t errorAverage;
+
+	enum
+	{
+		// the maximum average value
+		TRAFFIC_MONITOR_UINT8_MAX = 1 << (7-TRAFFIC_MONITOR_DECAY),
+
+		// the unsignificant bits of the averaged values
+		TRAFFIC_MONITOR_MASK = (1 << TRAFFIC_MONITOR_DECAY) - 1,
+
+		// to get the ceiling integer value
+		TRAFFIC_MONITOR_ROUND_UP = (1 << TRAFFIC_MONITOR_DECAY) - 1,
+	};
+
+	tasklet_async event void SubSend.ready()
+	{
+		signal RadioSend.ready();
+	}
+
+	tasklet_async command error_t RadioSend.send(message_t* msg)
+	{
+		txMsg = msg;
+		return call SubSend.send(msg);
+	}
+
+	tasklet_async event void SubSend.sendDone(error_t error)
+	{
+		if( error == SUCCESS )
+			txAverage += call TrafficMonitorConfig.getChannelTime(txMsg);
+
+		signal RadioSend.sendDone(error);
+	}
+
+	tasklet_async event bool SubReceive.header(message_t* msg)
+	{
+		return signal RadioReceive.header(msg);
+	}
+
+	tasklet_async event message_t* SubReceive.receive(message_t* msg)
+	{
+		uint8_t index;
+
+		rxAverage += call TrafficMonitorConfig.getChannelTime(msg);
+
+		index = call Neighborhood.insertNode(call TrafficMonitorConfig.getSender(msg));
+		if( ! call NeighborhoodFlag.get(index) )
+		{
+			if( neighborCount < TRAFFIC_MONITOR_UINT8_MAX )
+			{
+				++neighborCount;
+				call NeighborhoodFlag.set(index);
+			}
+		}
+
+		return signal RadioReceive.receive(msg);
+	}
+
+	tasklet_async event void TrafficMonitorConfig.channelError()
+	{
+		if( errorAverage < 255 )
+			++errorAverage;
+	}
+
+	uint8_t debugCounter;
+
+	event void Timer.fired()
+	{
+		uint8_t fraction;
+
+		call Tasklet.suspend();
+
+		txAverage -= (txAverage >> TRAFFIC_MONITOR_DECAY);
+		rxAverage -= (rxAverage >> TRAFFIC_MONITOR_DECAY);
+		errorAverage -= (errorAverage >> TRAFFIC_MONITOR_DECAY);
+
+		// we could get stuck in the [1,7] range with no neighbors, so be more precise
+		fraction = neighborAverage >> TRAFFIC_MONITOR_DECAY;
+		if( fraction == neighborCount && (neighborAverage & TRAFFIC_MONITOR_MASK) != 0 )
+			--neighborAverage;
+		else
+			neighborAverage += neighborCount - fraction;
+
+		call NeighborhoodFlag.clearAll();
+		neighborCount = 0;
+
+		call Tasklet.resume();
+
+#ifdef RADIO_DEBUG
+		if( ++debugCounter >= 10 && call DiagMsg.record() )
+		{
+			debugCounter = 0;
+
+			call DiagMsg.str("traffic");
+			call DiagMsg.uint16(signal TrafficMonitorConfig.getTransmitAverage());
+			call DiagMsg.uint16(signal TrafficMonitorConfig.getReceiveAverage());
+			call DiagMsg.uint8(signal TrafficMonitorConfig.getNeighborAverage());
+			call DiagMsg.uint8(signal TrafficMonitorConfig.getErrorAverage());
+			call DiagMsg.send();
+		}
+#endif
+	}
+
+	tasklet_async event void Tasklet.run()
+	{
+	}
+
+	tasklet_async event uint16_t TrafficMonitorConfig.getTransmitAverage()
+	{
+		return txAverage >> TRAFFIC_MONITOR_DECAY;
+	}
+
+	tasklet_async event uint16_t TrafficMonitorConfig.getReceiveAverage()
+	{
+		return rxAverage >> TRAFFIC_MONITOR_DECAY;
+	}
+
+	tasklet_async event uint8_t TrafficMonitorConfig.getNeighborAverage()
+	{
+		return (neighborAverage + TRAFFIC_MONITOR_ROUND_UP) >> TRAFFIC_MONITOR_DECAY;
+	}
+
+	tasklet_async event uint8_t TrafficMonitorConfig.getErrorAverage()
+	{
+		return errorAverage >> TRAFFIC_MONITOR_DECAY;
+	}
+
+	tasklet_async event void Neighborhood.evicted(uint8_t index) { }
+
+	enum
+	{
+		RADIO_CMD_NONE = 0,
+		RADIO_CMD_TURNON = 1,
+		RADIO_CMD_TURNOFF = 2,
+	};
+	tasklet_norace uint8_t radioCmd;
+
+	tasklet_async command error_t RadioState.turnOff()
+	{
+		radioCmd = RADIO_CMD_TURNOFF;
+		return call SubState.turnOff();
+	}
+
+	tasklet_async command error_t RadioState.standby()
+	{
+		radioCmd = RADIO_CMD_TURNOFF;
+		return call SubState.standby();
+	}
+
+	tasklet_async command error_t RadioState.turnOn()
+	{
+		radioCmd = RADIO_CMD_TURNON;
+		return call SubState.turnOn();
+	}
+
+	tasklet_async command error_t RadioState.setChannel(uint8_t channel)
+	{
+		radioCmd = RADIO_CMD_NONE;
+		return call SubState.setChannel(channel);
+	}
+
+	tasklet_async command uint8_t RadioState.getChannel()
+	{
+		return call SubState.getChannel();
+	}
+
+	task void startStopTimer()
+	{
+		if( radioCmd == RADIO_CMD_TURNON )
+			call Timer.startPeriodic(call TrafficMonitorConfig.getUpdatePeriod());
+		else if( radioCmd == RADIO_CMD_TURNOFF )
+			call Timer.stop();
+	}
+
+	tasklet_async event void SubState.done()
+	{
+		post startStopTimer();
+		signal RadioState.done();
+	}
+}
diff --git a/tos/lib/rfxlink/layers/UniqueConfig.nc b/tos/lib/rfxlink/layers/UniqueConfig.nc
new file mode 100755
index 00000000..b263fad2
--- /dev/null
+++ b/tos/lib/rfxlink/layers/UniqueConfig.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+
+interface UniqueConfig
+{
+	/**
+	 * Returns the sequence number of the packet.
+	 */
+	async command uint8_t getSequenceNumber(message_t* msg);
+
+	/**
+	 * Returns the sender of the packet. 
+	 */
+	async command am_addr_t getSender(message_t* msg);
+
+	/**
+	 * Sets the sequence number of the packet.
+	 */
+	async command void setSequenceNumber(message_t*msg, uint8_t number);
+
+	/**
+	 * This command is called when the unqiue layer detects a missing (jump 
+	 * in the data sequence number) or a duplicate packet.
+	 */
+	tasklet_async command void reportChannelError();
+}
diff --git a/tos/lib/rfxlink/layers/UniqueLayerC.nc b/tos/lib/rfxlink/layers/UniqueLayerC.nc
new file mode 100755
index 00000000..516472be
--- /dev/null
+++ b/tos/lib/rfxlink/layers/UniqueLayerC.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic configuration UniqueLayerC()
+{
+	provides
+	{
+		// NOTE, this is a combined layer, should be hooked up at two places
+		interface BareSend as Send;
+		interface RadioReceive;
+	}
+	uses
+	{
+		interface BareSend as SubSend;
+		interface RadioReceive as SubReceive;
+
+		interface UniqueConfig as Config;
+	}
+}
+
+implementation
+{
+	components new UniqueLayerP(), MainC, NeighborhoodC, new NeighborhoodFlagC();
+
+	MainC.SoftwareInit -> UniqueLayerP;
+	UniqueLayerP.Neighborhood -> NeighborhoodC;
+	UniqueLayerP.NeighborhoodFlag -> NeighborhoodFlagC;
+
+	Send = UniqueLayerP;
+	SubSend = UniqueLayerP;
+
+	RadioReceive = UniqueLayerP;
+	SubReceive = UniqueLayerP;
+	Config = UniqueLayerP;
+}
diff --git a/tos/lib/rfxlink/layers/UniqueLayerP.nc b/tos/lib/rfxlink/layers/UniqueLayerP.nc
new file mode 100755
index 00000000..875ce939
--- /dev/null
+++ b/tos/lib/rfxlink/layers/UniqueLayerP.nc
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+#include <Neighborhood.h>
+
+generic module UniqueLayerP()
+{
+	provides
+	{
+		interface BareSend as Send;
+		interface RadioReceive;
+
+		interface Init;
+	}
+
+	uses
+	{
+		interface BareSend as SubSend;
+		interface RadioReceive as SubReceive;
+
+		interface UniqueConfig;
+		interface Neighborhood;
+		interface NeighborhoodFlag;
+	}
+}
+
+implementation
+{
+	uint8_t sequenceNumber;
+
+	command error_t Init.init()
+	{
+		sequenceNumber = TOS_NODE_ID << 4;
+		return SUCCESS;
+	}
+
+	command error_t Send.send(message_t* msg)
+	{
+		call UniqueConfig.setSequenceNumber(msg, ++sequenceNumber);
+		return call SubSend.send(msg);
+	}
+
+	command error_t Send.cancel(message_t* msg)
+	{
+		return call SubSend.cancel(msg);
+	}
+
+	event void SubSend.sendDone(message_t* msg, error_t error)
+	{
+		signal Send.sendDone(msg, error);
+	}
+
+	tasklet_async event bool SubReceive.header(message_t* msg)
+	{
+		// we could scan here, but better be lazy
+		return signal RadioReceive.header(msg);
+	}
+
+	tasklet_norace uint8_t receivedNumbers[NEIGHBORHOOD_SIZE];
+
+	tasklet_async event message_t* SubReceive.receive(message_t* msg)
+	{
+		uint8_t idx = call Neighborhood.insertNode(call UniqueConfig.getSender(msg));
+		uint8_t dsn = call UniqueConfig.getSequenceNumber(msg);
+
+		if( call NeighborhoodFlag.get(idx) )
+		{
+			uint8_t diff = dsn - receivedNumbers[idx];
+
+			if( diff == 0 )
+			{
+				call UniqueConfig.reportChannelError();
+				return msg;
+			}
+		}
+		else
+			call NeighborhoodFlag.set(idx);
+
+		receivedNumbers[idx] = dsn;
+
+		return signal RadioReceive.receive(msg);
+	}
+
+	tasklet_async event void Neighborhood.evicted(uint8_t idx) { }
+}
diff --git a/tos/lib/rfxlink/util/BareReceive.nc b/tos/lib/rfxlink/util/BareReceive.nc
new file mode 100644
index 00000000..874420e4
--- /dev/null
+++ b/tos/lib/rfxlink/util/BareReceive.nc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2009, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface BareReceive
+{
+	/**
+	 * Signals the reception of a message, but only for those messages for
+	 * which SUCCESS was returned in the header event. The usual owner rules 
+	 * apply to the message pointers.
+	 */
+	event message_t* receive(message_t* msg);
+}
diff --git a/tos/lib/rfxlink/util/BareSend.nc b/tos/lib/rfxlink/util/BareSend.nc
new file mode 100644
index 00000000..5609dee6
--- /dev/null
+++ b/tos/lib/rfxlink/util/BareSend.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2009, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface BareSend
+{
+	/**
+	 * Starts the transmission of the given message. This command must not
+	 * be called while another send is in progress (so one must wait for the
+	 * sendDone event). Returns EBUSY if a reception is in progress or for
+	 * some other reason the request cannot be temporarily satisfied (e.g.
+	 * the SPI bus access could not be acquired). In this case the send 
+	 * command could be retried from a task. Returns SUCCESS if the 
+	 * transmission could be started. In this case sendDone will be fired.
+	 */
+	command error_t send(message_t* msg);
+	
+	/**
+	 * Signals the completion of the send command, exactly once for each 
+	 * successfull send command. If the returned error code is SUCCESS, then 
+	 * the message was sent (may not have been acknowledged), otherwise 
+	 * the message was not transmitted over the air.
+	 */
+	event void sendDone(message_t* msg, error_t error);
+
+	/**
+	 * Cancel a requested transmission. Returns SUCCESS if the 
+	 * transmission was cancelled properly (not sent in its
+	 * entirety). Note that the component may not know
+	 * if the send was successfully cancelled, if the radio is
+	 * handling much of the logic; in this case, a component
+	 * should be conservative and return an appropriate error code.
+	 */
+	command error_t cancel(message_t* msg);
+}
diff --git a/tos/lib/rfxlink/util/Neighborhood.h b/tos/lib/rfxlink/util/Neighborhood.h
new file mode 100755
index 00000000..d9c233c0
--- /dev/null
+++ b/tos/lib/rfxlink/util/Neighborhood.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __NEIGHBORHOOD_H__
+#define __NEIGHBORHOOD_H__
+
+#ifndef NEIGHBORHOOD_SIZE
+#define NEIGHBORHOOD_SIZE	5
+#endif
+
+#endif//__NEIGHBORHOOD_H__
diff --git a/tos/lib/rfxlink/util/Neighborhood.nc b/tos/lib/rfxlink/util/Neighborhood.nc
new file mode 100644
index 00000000..544c28ce
--- /dev/null
+++ b/tos/lib/rfxlink/util/Neighborhood.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+
+/**
+ * Every component maintains its own neighborhood data. The Neighboorhood
+ * component maintains only the nodeids and ages of the neighbors, and
+ * evicts old entries from the table when necessary.
+ */
+interface Neighborhood
+{
+	/**
+	 * Returns the index of the neighbor in the table. If the node was not 
+	 * found in the table, then the value NEIGHBORHOOD is  returned, 
+	 * otherwise an index in the range [0, NEIGHBORHOOD-1] is returned.
+	 */
+	tasklet_async command uint8_t getIndex(am_addr_t id);
+
+	/**
+	 * Returns the age of the given entry. The age is incremented by one
+	 * every time a new node is inserted into the neighborhood table that
+	 * is not already at the very end. If the age would get too large to
+	 * fit into a byte, then it is periodically reset to a smaller value.
+	 */
+	tasklet_async command uint8_t getAge(uint8_t idx);
+
+	/**
+	 * Returns the node address for the given entry.
+	 */
+	tasklet_async command am_addr_t getNode(uint8_t idx);
+
+	/**
+	 * Adds a new node into the neighborhood table. If this node was already
+	 * in the table, then it is just brought to the front (its age is reset
+	 * to zero). If the node was not in the table, then the oldest is evicted
+	 * and its entry is replaced with this node. The index of the entry
+	 * is returned in the range [0, NEIGHBORHOOD-1]. 
+	 */
+	tasklet_async command uint8_t insertNode(am_addr_t id);
+
+	/**
+	 * This event is fired when the oldest entry is replaced with a new
+	 * node. The same interface is used by many users, so all of them
+	 * will receive this event and can clear the corresponding entry.
+	 * After this event is fired, all flags for this entry are cleared
+	 * (see the NeighborhoodFlag interface)
+	 */
+	tasklet_async event void evicted(uint8_t idx);
+}
diff --git a/tos/lib/rfxlink/util/NeighborhoodC.nc b/tos/lib/rfxlink/util/NeighborhoodC.nc
new file mode 100755
index 00000000..e894ab38
--- /dev/null
+++ b/tos/lib/rfxlink/util/NeighborhoodC.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+configuration NeighborhoodC
+{
+	provides interface Neighborhood;
+}
+
+implementation
+{
+	components NeighborhoodP, MainC;
+
+	Neighborhood = NeighborhoodP;
+	MainC.SoftwareInit -> NeighborhoodP;
+}
diff --git a/tos/lib/rfxlink/util/NeighborhoodFlag.nc b/tos/lib/rfxlink/util/NeighborhoodFlag.nc
new file mode 100755
index 00000000..d550e93c
--- /dev/null
+++ b/tos/lib/rfxlink/util/NeighborhoodFlag.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+
+/**
+ * This interface provides one bit storage for each neighbor in a very
+ * fast and conveint way (without using shifts for example). 
+ */
+interface NeighborhoodFlag
+{
+	/**
+	 * Returns the value of the flag for the given index
+	 */
+	tasklet_async command bool get(uint8_t idx);
+	
+	/**
+	 * Sets the flag for the given index
+	 */
+	tasklet_async command void set(uint8_t idx);
+
+	/**
+	 * Clears the flag for the given index. The flag is automatically
+	 * cleared after the Neighborhood.evicted event is fired.
+	 */
+	tasklet_async command void clear(uint8_t idx);
+
+	/**
+	 * Clears the flag for all indices
+	 */
+	tasklet_async command void clearAll();
+}
diff --git a/tos/lib/rfxlink/util/NeighborhoodFlagC.nc b/tos/lib/rfxlink/util/NeighborhoodFlagC.nc
new file mode 100755
index 00000000..66b3598b
--- /dev/null
+++ b/tos/lib/rfxlink/util/NeighborhoodFlagC.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic configuration NeighborhoodFlagC()
+{
+	provides interface NeighborhoodFlag;
+}
+
+implementation
+{
+	components NeighborhoodP;
+
+	// TODO: make sure that no more than 8 flags are used at a time
+	NeighborhoodFlag = NeighborhoodP.NeighborhoodFlag[unique("NeighborhoodFlag")];
+}
diff --git a/tos/lib/rfxlink/util/NeighborhoodP.nc b/tos/lib/rfxlink/util/NeighborhoodP.nc
new file mode 100755
index 00000000..a51cd0a7
--- /dev/null
+++ b/tos/lib/rfxlink/util/NeighborhoodP.nc
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Neighborhood.h>
+
+module NeighborhoodP
+{
+	provides
+	{
+		interface Init;
+		interface Neighborhood;
+		interface NeighborhoodFlag[uint8_t bit];
+	}
+}
+
+implementation
+{
+	tasklet_norace am_addr_t nodes[NEIGHBORHOOD_SIZE];
+	tasklet_norace uint8_t ages[NEIGHBORHOOD_SIZE];
+	tasklet_norace uint8_t flags[NEIGHBORHOOD_SIZE];
+	tasklet_norace uint8_t time;
+	tasklet_norace uint8_t last;
+
+	command error_t Init.init()
+	{
+		uint8_t i;
+
+		for(i = 0; i < NEIGHBORHOOD_SIZE; ++i)
+			nodes[i] = AM_BROADCAST_ADDR;
+	
+		return SUCCESS;
+	}
+
+	inline tasklet_async command am_addr_t Neighborhood.getNode(uint8_t idx)
+	{
+		return nodes[idx];
+	}
+
+	inline tasklet_async command uint8_t Neighborhood.getAge(uint8_t idx)
+	{
+		return time - ages[idx];
+	}
+
+	tasklet_async uint8_t command Neighborhood.getIndex(am_addr_t node)
+	{
+		uint8_t i;
+
+		if( nodes[last] == node )
+			return last;
+
+		for(i = 0; i < NEIGHBORHOOD_SIZE; ++i)
+		{
+			if( nodes[i] == node )
+			{
+				last = i;
+				break;
+			}
+		}
+
+		return i;
+	}
+
+	tasklet_async uint8_t command Neighborhood.insertNode(am_addr_t node)
+	{
+		uint8_t i;
+		uint8_t maxAge;
+
+		if( nodes[last] == node )
+		{
+			if( ages[last] == time )
+				return last;
+
+			ages[last] = ++time;
+			maxAge = 0x80;
+		}
+		else
+		{
+			uint8_t oldest = 0;
+			maxAge = 0;
+
+			for(i = 0; i < NEIGHBORHOOD_SIZE; ++i)
+			{
+				uint8_t age;
+
+				if( nodes[i] == node )
+				{
+					last = i;
+					if( ages[i] == time )
+						return i;
+
+					ages[i] = ++time;
+					maxAge = 0x80;
+					break;
+				}
+
+				age = time - ages[i];
+				if( age > maxAge )
+				{
+					maxAge = age;
+					oldest = i;
+				}
+			}
+
+			if( i == NEIGHBORHOOD_SIZE )
+			{
+				signal Neighborhood.evicted(oldest);
+
+				last = oldest;
+				nodes[oldest] = node;
+				ages[oldest] = ++time;
+				flags[oldest] = 0;
+			}
+		}
+
+		if( (time & 0x7F) == 0x7F && maxAge >= 0x7F )
+		{
+			for(i = 0; i < NEIGHBORHOOD_SIZE; ++i)
+			{
+				if( (ages[i] | 0x7F) != time )
+					ages[i] = time & 0x80;
+			}
+		}
+
+		return last;
+	}
+
+	inline tasklet_async command bool NeighborhoodFlag.get[uint8_t bit](uint8_t idx)
+	{
+		return flags[idx] & (1 << bit);
+	}
+
+	inline tasklet_async command void NeighborhoodFlag.set[uint8_t bit](uint8_t idx)
+	{
+		flags[idx] |= (1 << bit);
+	}
+
+	inline tasklet_async command void NeighborhoodFlag.clear[uint8_t bit](uint8_t idx)
+	{
+		flags[idx] &= ~(1 << bit);
+	}
+
+	tasklet_async command void NeighborhoodFlag.clearAll[uint8_t bit]()
+	{
+		uint8_t i;
+
+		bit = ~(1 << bit);
+
+		for(i = 0; i < NEIGHBORHOOD_SIZE; ++i)
+			flags[i] &= bit;
+	}
+}
diff --git a/tos/lib/rfxlink/util/PacketField.nc b/tos/lib/rfxlink/util/PacketField.nc
new file mode 100644
index 00000000..444ed245
--- /dev/null
+++ b/tos/lib/rfxlink/util/PacketField.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface PacketField<value_type>
+{
+	/**
+	 * Returns TRUE if the value is set for this message.
+	 */
+	async command bool isSet(message_t* msg);
+
+	/**
+	 * Returns the stored value of this field in the message. If the
+	 * value is not set, then the returned value is undefined.
+	 */
+	async command value_type get(message_t* msg);
+
+	/**
+	 * Clears the isSet flag.
+	 */
+	async command void clear(message_t* msg);
+
+	/**
+	 * Sets the isSet false to TRUE and the time stamp value to the 
+	 * specified value.
+	 */
+	async command void set(message_t* msg, value_type value);
+}
diff --git a/tos/lib/rfxlink/util/PacketFlag.nc b/tos/lib/rfxlink/util/PacketFlag.nc
new file mode 100644
index 00000000..d692ab9d
--- /dev/null
+++ b/tos/lib/rfxlink/util/PacketFlag.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface PacketFlag
+{
+	/**
+	 * Returns if the flag is set for this message. 
+	 */
+	async command bool get(message_t* msg);
+
+	/**
+	 * Sets the flag in this message to the specified value.
+	 */
+	async command void setValue(message_t* msg, bool value);
+
+	/**
+	 * Sets the flag in this message to TRUE
+	 */
+	async command void set(message_t* msg);
+
+	/**
+	 * Sets the flag in this message to FALSE
+	 */
+	async command void clear(message_t* msg);
+}
diff --git a/tos/lib/rfxlink/util/RadioAlarm.nc b/tos/lib/rfxlink/util/RadioAlarm.nc
new file mode 100755
index 00000000..8d1802d2
--- /dev/null
+++ b/tos/lib/rfxlink/util/RadioAlarm.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+#include "RadioConfig.h"
+
+interface RadioAlarm
+{
+	/**
+	 * Returns TRUE if the alarm is free and ready to be used. Once the alarm
+	 * is free, it cannot become nonfree in the same tasklet block. Note,
+	 * if the alarm is currently set (even if for ourselves) then it is not free.
+	 */
+	tasklet_async command bool isFree();
+
+	/**
+	 * Waits till the specified timeout period expires. The alarm must be free.
+	 */
+	tasklet_async command void wait(tradio_size timeout);
+
+	/**
+	 * Cancels the running alarm. The alarm must be pending.
+	 */
+	tasklet_async command void cancel();
+
+	/**
+	 * This event is fired when the specified timeout period expires.
+	 */
+	tasklet_async event void fired();
+
+	/**
+	 * Returns the current time as measured by the radio stack.
+	 */
+	async command tradio_size getNow();
+}
diff --git a/tos/lib/rfxlink/util/RadioAlarmC.nc b/tos/lib/rfxlink/util/RadioAlarmC.nc
new file mode 100644
index 00000000..ab9f567c
--- /dev/null
+++ b/tos/lib/rfxlink/util/RadioAlarmC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include "RadioConfig.h"
+
+generic configuration RadioAlarmC()
+{
+	provides
+	{
+		interface RadioAlarm[uint8_t id]; // use unique
+	}
+
+	uses
+	{
+		interface Alarm<TRadio, tradio_size> @exactlyonce();
+	}
+}
+
+implementation
+{
+	components new RadioAlarmP(), TaskletC;
+
+	RadioAlarm = RadioAlarmP;
+	Alarm = RadioAlarmP;
+	RadioAlarmP.Tasklet -> TaskletC;
+}
diff --git a/tos/lib/rfxlink/util/RadioAlarmP.nc b/tos/lib/rfxlink/util/RadioAlarmP.nc
new file mode 100644
index 00000000..f9e62875
--- /dev/null
+++ b/tos/lib/rfxlink/util/RadioAlarmP.nc
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+#include <RadioAssert.h>
+#include "RadioConfig.h"
+
+generic module RadioAlarmP()
+{
+	provides
+	{
+		interface RadioAlarm[uint8_t id];
+	}
+
+	uses
+	{
+		interface Alarm<TRadio, tradio_size>;
+		interface Tasklet;
+	}
+}
+
+implementation
+{
+	norace uint8_t state;
+	enum
+	{
+		STATE_READY = 0,
+		STATE_WAIT = 1,
+		STATE_FIRED = 2,
+	};
+
+	tasklet_norace uint8_t alarm;
+
+	async event void Alarm.fired()
+	{
+		atomic
+		{
+			if( state == STATE_WAIT )
+				state = STATE_FIRED;
+		}
+
+		call Tasklet.schedule();
+	}
+
+	inline async command tradio_size RadioAlarm.getNow[uint8_t id]()
+	{
+		return call Alarm.getNow();
+	}
+
+	tasklet_async event void Tasklet.run()
+	{
+		if( state == STATE_FIRED )
+		{
+			state = STATE_READY;
+			signal RadioAlarm.fired[alarm]();
+		}
+	}
+
+	default tasklet_async event void RadioAlarm.fired[uint8_t id]()
+	{
+	}
+
+	inline tasklet_async command bool RadioAlarm.isFree[uint8_t id]()
+	{
+		return state == STATE_READY;
+	}
+
+	tasklet_async command void RadioAlarm.wait[uint8_t id](tradio_size timeout)
+	{
+		RADIO_ASSERT( state == STATE_READY );
+
+		alarm = id;
+		state = STATE_WAIT;
+		call Alarm.start(timeout);
+	}
+
+	tasklet_async command void RadioAlarm.cancel[uint8_t id]()
+	{
+		RADIO_ASSERT( alarm == id );
+		RADIO_ASSERT( state != STATE_READY );
+
+		call Alarm.stop();
+		state = STATE_READY;
+	}
+}
diff --git a/tos/lib/rfxlink/util/RadioAssert.h b/tos/lib/rfxlink/util/RadioAssert.h
new file mode 100644
index 00000000..39252656
--- /dev/null
+++ b/tos/lib/rfxlink/util/RadioAssert.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __RADIOASSERT_H__
+#define __RADIOASSERT_H__
+
+#ifdef RADIO_DEBUG
+
+	void assert(bool condition, const char* file, uint16_t line);
+	#define RADIO_ASSERT(COND) assert(COND, __FILE__, __LINE__)
+
+#else
+
+	#define RADIO_ASSERT(COND) for(;0;)
+
+#endif
+
+#endif//__RADIOASSERT_H__
diff --git a/tos/lib/rfxlink/util/RadioCCA.nc b/tos/lib/rfxlink/util/RadioCCA.nc
new file mode 100755
index 00000000..e515dcf4
--- /dev/null
+++ b/tos/lib/rfxlink/util/RadioCCA.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+
+interface RadioCCA
+{
+	/**
+	 * Starts the clear channel assesment procedure. Returns EBUSY if the radio
+	 * is currently servicing a clear channel assesment, and SUCCESS otherwise.
+	 * The check will be performed only in the RX_READY state.
+	 */
+	tasklet_async command error_t request();
+
+	/**
+	 * Signals the completion of the clear channel assesment send command.
+	 * SUCCESS means the channel is clear, EBUSY means the channel is not
+	 * clear, and FAIL means that the clear channel assesment could not
+	 * be finished or the operation was cancelled.
+	 */
+	tasklet_async event void done(error_t error);
+}
diff --git a/tos/lib/rfxlink/util/RadioChannel.nc b/tos/lib/rfxlink/util/RadioChannel.nc
new file mode 100644
index 00000000..2abe1a82
--- /dev/null
+++ b/tos/lib/rfxlink/util/RadioChannel.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2009, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface RadioChannel
+{
+	/**
+	 * Sets the current channel. Returns EBUSY if the stack is unable
+	 * to change the channel this time (some other operation is in progress),
+	 * EALREADY if the selected channel is already set, SUCCESS otherwise.
+	 */
+	command error_t setChannel(uint8_t channel);
+
+	/**
+	 * This event is signaled exactly once for each sucessfully posted state 
+	 * setChannel command when it is completed.
+	 */
+	event void setChannelDone();
+
+	/**
+	 * Returns the currently selected channel.
+	 */
+	command uint8_t getChannel();
+}
diff --git a/tos/lib/rfxlink/util/RadioPacket.nc b/tos/lib/rfxlink/util/RadioPacket.nc
new file mode 100644
index 00000000..f2a9e80e
--- /dev/null
+++ b/tos/lib/rfxlink/util/RadioPacket.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface RadioPacket
+{
+	/**
+	 * This command returns the length of the header. The header
+	 * starts at the first byte of the message_t structure 
+	 * (some layers may add dummy bytes to allign the payload to
+	 * the msg->data section).
+	 */
+	async command uint8_t headerLength(message_t* msg);
+
+	/**
+	 * Returns the length of the payload. The payload starts right
+	 * after the header.
+	 */
+	async command uint8_t payloadLength(message_t* msg);
+
+	/**
+	 * Sets the length of the payload.
+	 */
+	async command void setPayloadLength(message_t* msg, uint8_t length);
+
+	/**
+	 * Returns the maximum length that can be set for this message.
+	 */
+	async command uint8_t maxPayloadLength();
+
+	/**
+	 * Returns the length of the metadata section. The metadata section
+	 * is at the very end of the message_t structure and grows downwards.
+	 */
+	async command uint8_t metadataLength(message_t* msg);
+
+	/**
+	 * Clears all metadata and sets all default values in the headers.
+	 */
+	async command void clear(message_t* msg);
+}
diff --git a/tos/lib/rfxlink/util/RadioReceive.nc b/tos/lib/rfxlink/util/RadioReceive.nc
new file mode 100755
index 00000000..7c4bc824
--- /dev/null
+++ b/tos/lib/rfxlink/util/RadioReceive.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+
+interface RadioReceive
+{
+	/**
+	 * This event is fired when the header is received/downloaded and the 
+	 * higher layers are consulted whether it needs to be downloaded and 
+	 * further processed. Return FALSE if the message should be discarded.
+	 * In particular, the message buffer layer returns FALSE if there is
+	 * no space for a new message, so this message will not get acknowledged.
+	 */
+	tasklet_async event bool header(message_t* msg);
+
+	/**
+	 * Signals the reception of a message, but only for those messages for
+	 * which SUCCESS was returned in the header event. The usual owner rules 
+	 * apply to the message pointers.
+	 */
+	tasklet_async event message_t* receive(message_t* msg);
+}
diff --git a/tos/lib/rfxlink/util/RadioSend.nc b/tos/lib/rfxlink/util/RadioSend.nc
new file mode 100755
index 00000000..a9533c23
--- /dev/null
+++ b/tos/lib/rfxlink/util/RadioSend.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+
+interface RadioSend
+{
+	/**
+	 * Starts the transmission of the given message. This command must not
+	 * be called while another send is in progress (so one must wait for the
+	 * sendDone event). Returns EBUSY if a reception is in progress or for
+	 * some other reason the request cannot be temporarily satisfied (e.g.
+	 * the SPI bus access could not be acquired). In this case the send 
+	 * command could be retried from a tasklet. Returns SUCCESS if the 
+	 * transmission could be started. In this case sendDone will be fired.
+	 */
+	tasklet_async command error_t send(message_t* msg);
+	
+	/**
+	 * Signals the completion of the send command, exactly once for each 
+	 * successfull send command. If the returned error code is SUCCESS, then 
+	 * the message was sent (may not have been acknowledged), otherwise 
+	 * the message was not transmitted over the air.
+	 */
+	tasklet_async event void sendDone(error_t error);
+
+	/**
+	 * This event is fired when the component is most likely able to accept 
+	 * a send request. If the send command has returned with a failure, then
+	 * this event will be called at least once in the near future.
+	 */
+	tasklet_async event void ready();
+}
diff --git a/tos/lib/rfxlink/util/RadioState.nc b/tos/lib/rfxlink/util/RadioState.nc
new file mode 100644
index 00000000..384966de
--- /dev/null
+++ b/tos/lib/rfxlink/util/RadioState.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+
+interface RadioState
+{
+	/**
+	 * Moves to radio into sleep state with the lowest power consumption but 
+	 * highest wakeup time. The radio cannot send or receive in this state 
+	 * and releases all access to shared resources (e.g. SPI bus). 
+	 */
+	tasklet_async command error_t turnOff();
+
+	/**
+	 * The same as the turnOff command, except it is not as deep sleep, and
+	 * it is quicker to recover from this state.
+	 */
+	tasklet_async command error_t standby();
+
+	/**
+	 * Goes into receive state. The radio continuously receive messages 
+	 * and able to transmit.
+	 */
+	tasklet_async command error_t turnOn();
+
+	/**
+	 * Sets the current channel. Returns EBUSY if the stack is unable
+	 * to change the channel this time (some other operation is in progress)
+	 * SUCCESS otherwise.
+	 */
+	tasklet_async command error_t setChannel(uint8_t channel);
+
+	/**
+	 * This event is signaled exactly once for each sucessfully posted state 
+	 * transition and setChannel command when it is completed.
+	 */
+	tasklet_async event void done();
+
+	/**
+	 * Returns the currently selected channel.
+	 */
+	tasklet_async command uint8_t getChannel();
+}
diff --git a/tos/lib/rfxlink/util/Tasklet.h b/tos/lib/rfxlink/util/Tasklet.h
new file mode 100644
index 00000000..3bbb52d3
--- /dev/null
+++ b/tos/lib/rfxlink/util/Tasklet.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __TASKLET_H__
+#define __TASKLET_H__
+
+#ifdef	TASKLET_IS_TASK
+
+	#define tasklet_async
+	#define tasklet_norace
+
+#else
+
+	#define tasklet_async	async	
+	#define tasklet_norace	norace
+
+#endif
+
+#endif//__TASKLET_H__
diff --git a/tos/lib/rfxlink/util/Tasklet.nc b/tos/lib/rfxlink/util/Tasklet.nc
new file mode 100755
index 00000000..a71adfc5
--- /dev/null
+++ b/tos/lib/rfxlink/util/Tasklet.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+
+/**
+ * This interface is useful in building state machines when the state 
+ * transitions should be executed atomically but with interrupts enabled. 
+ * All state transitions should take place in the run event handler or
+ * in blocks protected by the suspend and resume commands.
+ */
+interface Tasklet
+{
+	/**
+	 * This method is executed atomically. 
+	 */
+	tasklet_async event void run();
+
+	/**
+	 * Makes sure that the run event is called at least once more. If the 
+	 * run event is currently not executing, then it  is called immediately 
+	 * and this command returns only after the completion of the run event. 
+	 * If the run event is currently executed, then this method returns at 
+	 * once, and makes sure that the run event is called once more when 
+	 * it is finished. If this method is called from a task, then by the 
+	 * above rules, the run event will be called from a task as well.
+	 */
+	async command void schedule();
+
+	/**
+	 * Enters a critical section of the code and meakes sure that the
+	 * run event is not called while in this section. No long running
+	 * computation should be called from the critical session, and
+	 * in particular no user event should be fired. This call is only
+	 * possible from task context, otherwise we cannot guarantee that
+	 * the run event is not currently running. The suspend calls
+	 * can be nested. It is very important that the same number of
+	 * resume commands must be called in all control paths, e.g. be very
+	 * careful with the return and break commands.
+	 */
+	command void suspend();
+
+	/**
+	 * Leaves the critical section. This call is conly possible from 
+	 * task context. If there were scheduled executions of the run
+	 * event, then those will be called before this command returns.
+	 */
+	command void resume();
+}
diff --git a/tos/lib/rfxlink/util/TaskletC.nc b/tos/lib/rfxlink/util/TaskletC.nc
new file mode 100755
index 00000000..07ba2a56
--- /dev/null
+++ b/tos/lib/rfxlink/util/TaskletC.nc
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <Tasklet.h>
+#include <RadioAssert.h>
+
+module TaskletC
+{
+	provides interface Tasklet;
+}
+
+implementation
+{
+#ifdef TASKLET_IS_TASK
+
+	task void tasklet()
+	{
+		signal Tasklet.run();
+	}
+
+	inline async command void Tasklet.schedule()
+	{
+		post tasklet();
+	}
+
+	inline command void Tasklet.suspend()
+	{
+	}
+
+	inline command void Tasklet.resume()
+	{
+	}
+
+#else
+	
+	/**
+	 * The lower 7 bits contain the number of suspends plus one if the run 
+	 * event is currently beeing executed. The highest bit is set if the run 
+	 * event needs to be called again when the suspend count goes down to zero.
+	 */
+	uint8_t state;
+
+	void doit()
+	{
+		for(;;)
+		{
+			signal Tasklet.run();
+
+			atomic
+			{
+				if( state == 1 )
+				{
+					state = 0;
+					return;
+				}
+
+				RADIO_ASSERT( state == 0x81 );
+				state = 1;
+			}
+		}
+	}
+
+	inline command void Tasklet.suspend()
+	{
+		atomic ++state;
+	}
+
+	command void Tasklet.resume()
+	{
+		atomic
+		{
+			if( --state != 0x80 )
+				return;
+
+			state = 1;
+		}
+
+		doit();
+	}
+
+	async command void Tasklet.schedule()
+	{
+		atomic
+		{
+			if( state != 0 )
+			{
+				state |= 0x80;
+				return;
+			}
+
+			state = 1;
+		}
+
+		doit();
+	}
+
+#endif
+}
diff --git a/tos/lib/safe/SafeFailureHandlerC.nc b/tos/lib/safe/SafeFailureHandlerC.nc
new file mode 100644
index 00000000..ea8dd852
--- /dev/null
+++ b/tos/lib/safe/SafeFailureHandlerC.nc
@@ -0,0 +1,13 @@
+
+#include "Timer.h"
+
+configuration SafeFailureHandlerC {
+}
+implementation {
+  components LedsC;
+  components SafeFailureHandlerP;
+  components BusyWaitMicroC as Wait;
+
+  SafeFailureHandlerP.Leds -> LedsC;
+  SafeFailureHandlerP.BusyWait -> Wait;
+}
diff --git a/tos/lib/safe/SafeFailureHandlerP.nc b/tos/lib/safe/SafeFailureHandlerP.nc
new file mode 100644
index 00000000..c8fb772e
--- /dev/null
+++ b/tos/lib/safe/SafeFailureHandlerP.nc
@@ -0,0 +1,143 @@
+
+#include "Timer.h"
+
+module SafeFailureHandlerP {
+  uses {
+    interface Leds;
+    interface BusyWait<TMicro, uint16_t>;
+  }
+}
+implementation {
+
+  #ifndef asmlinkage
+    #define asmlinkage
+  #endif
+
+  #ifndef noreturn
+    #define noreturn __attribute__((noreturn))
+  #endif
+
+  void delay (int len) 
+  {
+    volatile int x;
+    for (x=0; x<len; x++) { 
+      call BusyWait.wait(2000);
+    }
+  }
+
+  void v_short_delay (void) { delay (10); }
+
+  void short_delay (void) { delay (80); }
+
+  void long_delay (void) { delay (800); }
+
+  void flicker (void)
+  {
+    int i;
+    for (i=0; i<20; i++) {
+	delay (20);
+	call Leds.led0Off();
+	call Leds.led1Off();
+	call Leds.led2Off();
+	delay (20);
+	call Leds.led0On();
+	call Leds.led1On();
+	call Leds.led2On();
+    }
+    call Leds.led0Off();
+    call Leds.led1Off();
+    call Leds.led2Off();
+  }
+
+  void roll (void)
+  {
+    int i;
+    for (i=0; i<10; i++) {
+	delay (30);
+	call Leds.led0On();
+	call Leds.led2Off();
+	delay (30);
+	call Leds.led1On();
+	call Leds.led0Off();
+	delay (30);
+	call Leds.led2On();
+	call Leds.led1Off();
+    }
+    call Leds.led2Off();
+  }
+	    
+  void separator (void)
+  {
+    call Leds.led0Off();
+    call Leds.led1Off();
+    call Leds.led2Off();
+    short_delay ();
+    call Leds.led0On();
+    call Leds.led1On();
+    call Leds.led2On();
+    v_short_delay ();
+    call Leds.led0Off();
+    call Leds.led1Off();
+    call Leds.led2Off();
+    short_delay ();
+  }
+
+  void display_b4 (int c) 
+  {
+    switch (c) {
+    case 3:
+      call Leds.led2On();
+    case 2:
+      call Leds.led1On();
+    case 1:
+      call Leds.led0On();
+    case 0:
+      long_delay ();
+      break;
+    default:
+      flicker ();
+    }
+    separator ();
+  }
+
+  void display_int (const unsigned int x)
+  {
+    int i = 14;
+    do {
+      display_b4 (0x3 & (x >> i));
+      i -= 2;
+    } while (i >= 0);
+  }
+
+  void display_int_flid (const unsigned int x)
+  {
+    roll ();
+    display_int (x);
+    roll ();
+  }
+
+  asmlinkage noreturn 
+  void deputy_fail_noreturn_fast (int flid) @C() @spontaneous()
+  {
+    atomic {
+#if defined(__AVR_ARCH__)
+      asm volatile ("break");
+#endif
+      while(1) {
+        display_int_flid(flid);
+      }
+    }
+  }
+
+  asmlinkage 
+  void deputy_fail_mayreturn(int flid) @C() @spontaneous()
+  {
+    deputy_fail_noreturn_fast(flid);
+  }
+
+  asmlinkage noreturn 
+  void deputy_fail_noreturn(int flid) @C() @spontaneous()
+  {
+    deputy_fail_noreturn_fast(flid);
+  }
+}
diff --git a/tos/lib/safe/include/annots_stage1.h b/tos/lib/safe/include/annots_stage1.h
new file mode 100644
index 00000000..3a2e850c
--- /dev/null
+++ b/tos/lib/safe/include/annots_stage1.h
@@ -0,0 +1,46 @@
+/* Keep TinyOS happy with pre 1.3.0 nesC's */
+
+#ifndef ANNOTS_STAGE1_INCLUDED
+#define ANNOTS_STAGE1_INCLUDED
+
+// JDR temporary code: define away two obsolete annotations
+#define BOUND(x,y)
+#define SINGLE
+
+// JDR temporary code: define away NTS in unsafe mode
+#ifndef SAFE_TINYOS
+#ifndef NTS
+#define NTS
+#endif
+#endif
+
+#if NESC < 130 
+
+#define __DEPUTY_UNUSED__                      __attribute__((unused))
+
+#define NONNULL                                
+#define BND(x,y)                             
+#define BND_NOK(x,y)                             
+#define COUNT(x)                               
+#define COUNT_NOK(x)                               
+#define ONE 
+#define ONE_NOK
+#define DMEMSET(x,y,z)
+#define DMEMCPY(x,y,z)
+#define TRUSTEDBLOCK
+#define NTS
+
+#define TCAST(__type,__expr)                   ((__type)(__expr))                
+
+#ifdef SAFE_TINYOS
+#warning Safe TinyOS requires nesC >= 1.3.0
+#endif
+
+#ifdef NESC
+struct @safe { };
+struct @unsafe { };
+#endif
+
+#endif // NESC version check
+
+#endif
diff --git a/tos/lib/safe/include/deputy/checks.h b/tos/lib/safe/include/deputy/checks.h
new file mode 100644
index 00000000..f0582b86
--- /dev/null
+++ b/tos/lib/safe/include/deputy/checks.h
@@ -0,0 +1,265 @@
+// Runtime checks for Deputy programs.
+
+// This file is included in deputy_lib and also at the start of every
+// Deputy output file.  Before this file is included you must define
+// DEPUTY_ALWAYS_STOP_ON_ERROR if you want to optimize the checks.
+
+// Note "volatile": We currently use volatile everywhere so that these
+// checks work on any kind of pointer.  In the future, we may want to
+// investigate the performance impact of this annotation in the common
+// (non-volatile) case.
+
+// Use inline even when not optimizing for speed, since it prevents
+// warnings that would occur due to unused static functions.
+#ifdef DEPUTY_ALWAYS_STOP_ON_ERROR
+  #define INLINE inline __attribute__((always_inline))
+#else
+  #define INLINE inline
+#endif
+
+#define __LOCATION__        0
+#define __LOCATION__FORMALS int flid
+#define __LOCATION__ACTUALS flid
+
+#ifndef asmlinkage
+#define asmlinkage
+#endif
+
+#ifndef noreturn
+#define noreturn __attribute__((noreturn))
+#endif
+
+#if defined(__KERNEL__) && defined(DEPUTY_KERNEL_COVERAGE)
+INLINE static
+unsigned int read_pc()
+TRUSTED {
+        unsigned int pc;
+
+        asm("movl %%ebp, %0" : "=r"(pc));
+
+        return *((unsigned int *)pc + 1);
+}
+
+extern void checkBitArrayAdd(unsigned int addr);
+#endif
+
+extern asmlinkage 
+void deputy_fail_mayreturn(__LOCATION__FORMALS);
+
+extern asmlinkage noreturn
+void deputy_fail_noreturn(__LOCATION__FORMALS);
+
+extern asmlinkage noreturn
+void deputy_fail_noreturn_fast(__LOCATION__FORMALS);
+
+/* Search for a NULL starting at e and return its index */
+extern asmlinkage
+int deputy_findnull(const void *e1, unsigned int sz);
+
+#define __deputy_memset memset
+
+#if  defined(DEPUTY_FAST_CHECKS)
+   #define deputy_fail deputy_fail_noreturn_fast
+#elif defined(DEPUTY_ALWAYS_STOP_ON_ERROR)
+   #define deputy_fail deputy_fail_noreturn
+#else
+   #define deputy_fail deputy_fail_mayreturn
+#endif
+
+
+/* Check that there is no NULL between e .. e+len-1. "bytes" is the size of 
+ * an element */
+INLINE static asmlinkage
+int deputy_nullcheck(const volatile void *e, unsigned int len,
+                     unsigned int bytes) {
+#define NULLCHECK(type) \
+    do { \
+        type *p1 = (type*) e; \
+        type *p2 = ((type*) e) + len; \
+        while (p1 < p2 && *p1 != 0) { \
+            p1++; \
+        } \
+        success = (p1 >= p2); \
+    } while (0)
+
+    int success = 0;
+
+    switch (bytes) {
+        case 1:
+            NULLCHECK(char);
+            break;
+        case 2:
+            NULLCHECK(short);
+            break;
+        case 4:
+            NULLCHECK(long);
+            break;
+        default:      
+            deputy_fail(__LOCATION__);
+    }
+    return success;
+#undef NULLCHECK
+}
+
+#if defined(__KERNEL__) && defined(KRECOVER) && !defined(NO_INJECTION)
+extern int kr_failure_injected(void);
+#define INJECTED_FAILURE() (kr_failure_injected())
+#else
+#define INJECTED_FAILURE() 0
+#endif
+
+// what : a boolean that ought to be true
+// checkName: the name of the check
+// checkWhat: a string that explains what goes wrong
+#if defined(__KERNEL__) && defined(DEPUTY_KERNEL_COVERAGE)
+#define DEPUTY_ASSERT_TEXT(what,text,checkName)\
+    checkBitArrayAdd(read_pc());\
+    if (!(what) || INJECTED_FAILURE()) { \
+	    deputy_fail(__LOCATION__ACTUALS); \
+    }
+
+#define DEPUTY_ASSERT(what, checkName) \
+    checkBitArrayAdd(read_pc());\
+    DEPUTY_ASSERT_TEXT(what, text, checkName)
+#else
+#define DEPUTY_ASSERT_TEXT(what, text, checkName) \
+    if (!(what) || INJECTED_FAILURE()) { \
+	    deputy_fail(__LOCATION__ACTUALS); \
+    }
+
+#define DEPUTY_ASSERT(what, checkName) \
+    DEPUTY_ASSERT_TEXT(what, text, checkName)
+#endif
+
+INLINE static void CNonNull(const volatile void* p, __LOCATION__FORMALS) {
+  DEPUTY_ASSERT(p != 0, "non-null check");
+}
+
+INLINE static void CEq(const volatile void* e1, const volatile void* e2,
+                       __LOCATION__FORMALS) {
+  DEPUTY_ASSERT(e1 == e2, why);
+}
+
+INLINE static void CMult(int i1, int i2, __LOCATION__FORMALS) {
+  DEPUTY_ASSERT((i2 % i1) == 0, "alignment check");
+}
+
+/* Check that p + sz * e does not overflow that remains within [lo..hi). It 
+ * is guaranteed on input that lo <= p <= hi, with p and h aligned w.r.t. lo 
+ * and size sz. */
+INLINE static void CPtrArith(const volatile void* lo, const volatile void* hi,
+                             const volatile void* p, int e, unsigned int sz,
+                             __LOCATION__FORMALS) {
+  if (e >= 0) {
+    DEPUTY_ASSERT_TEXT(e <= (hi - p) / sz, texthi, "upper bound check");
+  } else {
+    DEPUTY_ASSERT_TEXT(-e <= (p - lo) / sz, textlo, "lower bound check");
+  }
+}
+
+INLINE static void CPtrArithNT(const volatile void* lo, const volatile void* hi,
+                               const volatile void* p, int e, unsigned int sz,
+                               __LOCATION__FORMALS) {
+  if (e >= 0) {
+    unsigned int len = (hi - p) / sz;
+    if (e > len) {
+      DEPUTY_ASSERT_TEXT(deputy_nullcheck(hi, e - len, sz),
+                         texthi, "nullterm upper bound check");
+    }
+  } else {
+    DEPUTY_ASSERT_TEXT(-e <= (p - lo) / sz, textlo, "lower bound check");
+  }
+}
+
+INLINE static void CPtrArithAccess(const volatile void* lo,
+                                   const volatile void* hi,
+				   const volatile void* p,
+                                   int e, unsigned int sz,
+				   __LOCATION__FORMALS) {
+  if (e >= 0) {
+    DEPUTY_ASSERT_TEXT(e + 1 <= (hi - p) / sz, texthi, "upper bound check");
+  } else {
+    DEPUTY_ASSERT_TEXT(-e <= (p - lo) / sz, textlo, "lower bound check");
+  }
+}
+
+INLINE static void CLeqInt(unsigned int e1, unsigned int e2,
+                           __LOCATION__FORMALS) {
+  DEPUTY_ASSERT(e1 <= e2, why);
+}
+
+INLINE static void CLeq(const volatile void* e1, const volatile void* e2,
+                        __LOCATION__FORMALS) {
+  DEPUTY_ASSERT(e1 <= e2, why);
+}
+
+/* Used to set the upped bounds of an NT string to e1, when we know that e2 
+ * is a safe upper bound. Test that e1 <= e2 OR there is no NULL between 
+ * e2...e1-1. */
+INLINE static void CLeqNT(const volatile void* e1, const volatile void* e2,
+                          unsigned int sz, __LOCATION__FORMALS) {
+  if (e1 > e2) {
+    DEPUTY_ASSERT(deputy_nullcheck(e2, (e1 - e2) / sz, sz), why);
+  }
+}
+
+INLINE static void CNullOrLeq(const volatile void* e, 
+                              const volatile void* e1, const volatile void* e2,
+			      __LOCATION__FORMALS) {
+  if (e) {
+    DEPUTY_ASSERT(e1 <= e2, why);
+  }
+}
+
+/* Check that e is NULL, or e1 <= e2, or there is no NULL from e2 to e1 */
+INLINE static void CNullOrLeqNT(const volatile void* e, 
+                                const volatile void* e1,
+                                const volatile void* e2,
+                                unsigned int sz, __LOCATION__FORMALS) {
+  if (e && e1 > e2) {
+    DEPUTY_ASSERT(deputy_nullcheck(e2, (e1 - e2) / sz, sz), why);
+  }
+}
+
+
+INLINE static void CWriteNT(const volatile void* p,
+                            const volatile void* hi,
+                            int what, unsigned int sz,
+                            __LOCATION__FORMALS) {
+  if (p == hi) {
+    int isNull = 0;
+    switch (sz) {
+      case 1: isNull = (*((const volatile char *)  p) == 0); break;
+      case 2: isNull = (*((const volatile short *) p) == 0); break;
+      case 4: isNull = (*((const volatile int *)   p) == 0); break;
+    }
+    DEPUTY_ASSERT(!isNull || what == 0, "nullterm write check");
+  }
+}
+
+INLINE static void CNullUnionOrSelected(const volatile void* p,
+                                        unsigned int size,
+                                        int sameFieldSelected,
+                                        __LOCATION__FORMALS) {
+  if (!sameFieldSelected) {
+    const volatile char* pp = (const volatile char*)p;
+    const volatile char* pend = pp + size;
+    while (pp < pend) {
+      DEPUTY_ASSERT(0 == *pp++, "null union check");
+    }
+  }
+}
+
+INLINE static void CSelected(int what, __LOCATION__FORMALS) {
+  if (!(what)) {
+    deputy_fail(__LOCATION__ACTUALS); }
+}
+
+INLINE static void CNotSelected(int what, __LOCATION__FORMALS) {
+  if ((what)) {
+    deputy_fail(__LOCATION__ACTUALS); }
+}
+
+#define deputy_max(x, y) ((x) > (y) ? (x) : (y))
+
+#undef DEPUTY_ASSERT
diff --git a/tos/lib/serial/HdlcTranslateC.nc b/tos/lib/serial/HdlcTranslateC.nc
new file mode 100644
index 00000000..d7145109
--- /dev/null
+++ b/tos/lib/serial/HdlcTranslateC.nc
@@ -0,0 +1,134 @@
+//$Id: HdlcTranslateC.nc,v 1.6 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.
+ * Copyright (c) 2010 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is an implementation of HDLC serial encoding, supporting framing
+ * through frame delimiter bytes and escape bytes.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date September 30 2010
+ *
+ */
+
+#include "Serial.h"
+
+module HdlcTranslateC {
+  provides interface SerialFrameComm;
+  uses {
+    interface UartStream;
+    interface Leds;
+  }
+}
+
+implementation {
+  typedef struct {
+    uint8_t sendEscape:1;
+    uint8_t receiveEscape:1;
+  } HdlcState;
+  
+  //norace uint8_t debugCnt = 0;
+  HdlcState state = {0,0};
+  uint8_t txTemp;
+  uint8_t m_data;
+  
+  // TODO: add reset for when SerialM goes no-sync.
+  async command void SerialFrameComm.resetReceive(){
+    state.receiveEscape = 0;
+  }
+  async command void SerialFrameComm.resetSend(){
+    state.sendEscape = 0;
+  }
+  async event void UartStream.receivedByte(uint8_t data) {
+    //debugCnt++;
+    // 7E 41 0E 05 04 03 02 01 00 01 8F 7E
+/*     if (debugCnt == 1 && data == 0x7E) call Leds.led0On(); */
+/*     if (debugCnt == 2 && data == 0x41) call Leds.led1On(); */
+/*     if (debugCnt == 3 && data == 0x0E) call Leds.led2On(); */
+
+    if (data == HDLC_FLAG_BYTE) {
+      //call Leds.led1On();
+      signal SerialFrameComm.delimiterReceived();
+      return;
+    }
+    else if (data == HDLC_CTLESC_BYTE) {
+      //call Leds.led1On();
+      state.receiveEscape = 1;
+      return;
+    }
+    else if (state.receiveEscape) {
+      //call Leds.led1On();
+      state.receiveEscape = 0;
+      data = data ^ 0x20;
+    }
+    signal SerialFrameComm.dataReceived(data);
+  }
+
+  async command error_t SerialFrameComm.putDelimiter() {
+    atomic {
+      state.sendEscape = 0;
+      m_data = HDLC_FLAG_BYTE;
+    }
+    return call UartStream.send(&m_data, 1);
+  }
+  
+  async command error_t SerialFrameComm.putData(uint8_t data) {
+    if (data == HDLC_CTLESC_BYTE || data == HDLC_FLAG_BYTE) {
+      state.sendEscape = 1;
+      txTemp = data ^ 0x20;
+      m_data = HDLC_CTLESC_BYTE;
+    }
+    else {
+      m_data = data;
+    }
+    return call UartStream.send(&m_data, 1);
+  }
+
+  async event void UartStream.sendDone( uint8_t* buf, uint16_t len, 
+					error_t error ) {
+    atomic {
+      if (state.sendEscape) {
+	state.sendEscape = 0;
+	m_data = txTemp;
+	call UartStream.send(&m_data, 1);
+      }
+      else {
+	signal SerialFrameComm.putDone();
+      }
+    }
+  }
+
+  async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ) {}
+
+}
diff --git a/tos/lib/serial/README.txt b/tos/lib/serial/README.txt
new file mode 100644
index 00000000..d847bcc4
--- /dev/null
+++ b/tos/lib/serial/README.txt
@@ -0,0 +1,74 @@
+The purpose of this UART stack is to allow arbitary packet
+formats to be encapsulated within a UART frame. The basic 
+problem is that TinyOS needs to support two mote classes. 
+The first are mote end points, which receive and process packets, 
+possibly moving data between link layers. The second are mote
+bridges, which transparently forward data packets between media.
+
+The first class is simple: the UART can support its own active
+messages implementation, which is platform independent.
+An application that wants to send data to a mote generates a
+AM formatted for the UART and sends it to the mote over the 
+serial connection. The UART implementation then provides standard
+2.x accessors for the AM fields, such as destination. In this
+case, the UART is another packet format written into message_t.
+
+The second class is more difficult. The goal for this class is
+that you can communicate with a TinyOS network through data link
+layer packets, rather than at AM layer packets. So, for example,
+you can snoop on all of the 802.15.4 packets being sent and see
+all of the 802.15.4 specific headers. Or, you can send an 802.15.4
+packet to a mote over a serial port and it will just forward it
+over the radio. This functionality allows a PC to directly
+interact with the network, which has been shown to be an
+important requirement, especially when monitoring or testing
+deployed networks.
+
+The problem is more difficult due to how message_t works. As all 
+data link layers are justified on the data payload of the C
+structure, data link headers can start at offsets within the structure
+(as packets must be contiguous in memory). Therefore, to be
+able to read in an 802.15.4 packet over the serial port, the UART
+subsystem needs to know *where* in message_t the packet begins.
+Assuming what comes in over the serial port is correctly formatted,
+then if it knows the offset, the UART stack can just spool the
+bytes directly into the message_t at that offset.
+
+The send direction has a similar issue: the UART layer has to know
+where in the message_t the actual packet begins, and how long the
+entire packet is.
+
+Given that it might need to receive a wide range of packet formats
+encapsulated in a UART frame, the UART frame needs an identifier
+to dispatch on what type of data is within the frame. The basic
+case -- a platform independent AM packet -- is just one of these
+identifiers. This means that the UART provides a parameterized
+send and receive interface, where the parameter is the type of
+data encapsulated in the frame. The receive and send interfaces 
+need to be able to map one of these identifiers to a message_t offset
+as well as calculate the packet length in terms of a data link
+layer (e.g., if the length only pertains to the data payload of
+the encapsulated packet, then the UART system needs to subtract
+the header and footer length from the frame length).
+
+The solution is that every encapsulated packet type has a component
+that implements the SerialPacketInfo interface, which provides
+three commands.
+
+offset(), which returns the offset at which a packet begins in the message_t
+dataLinkLen(), which returns the length of a data link packet given a 
+data payload length
+upperLen(), which returns the length of a payload given a packet
+length 
+
+
+
+
+
+The offset of a given data link packet in a message_t is known
+at compile time: there is no need to store it in RAM. Therefore,
+whe
+
+
+
+
diff --git a/tos/lib/serial/ReceiveBytePacket.nc b/tos/lib/serial/ReceiveBytePacket.nc
new file mode 100644
index 00000000..5e56ea5e
--- /dev/null
+++ b/tos/lib/serial/ReceiveBytePacket.nc
@@ -0,0 +1,82 @@
+//$Id: ReceiveBytePacket.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This is the data interface that a serial protocol provides and
+ * a serial dispatcher uses. The dispatcher expects the following pattern
+ * of calls: ((startPacket)+ (byteReceived)* (endPacket)+)*
+ * It should ignore any signals that do not follow this pattern.
+ * The interface is used to separate the state machine of the wire protocol
+ * from the complexities of dispatch.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+interface ReceiveBytePacket {
+
+  
+  /**
+   * Signals the upper layer to indicate that reception of a frame has begun.
+   * Used by the upper layer to prepare for packet reception. If the upper
+   * layer does not want to receive a packet (or isn't ready) it may
+   * return a non-SUCCESS code  such as EBUSY to the lower layer to discard
+   * the frame. The underlying layer may signal endPacket in response to
+   * such a discard request.
+   * @return Returns an error_t code indicating whether the
+   * dispatcher would like to receive a packet (SUCCESS), or not
+   * perhaps because it isn't ready (EBUSY).
+   */
+  async event error_t startPacket();
+
+  /**
+   * Signals the upper layer that a byte of the encapsulated packet has been
+   * received. Passes this byte as a parameter to the function.
+   * @param data A byte of the encapsulated packet that has been received.
+   */
+  async event void byteReceived(uint8_t data);
+  /**
+   * Signalled to indicate that a packet encapsulated withing a serial
+   * frame has been received. SUCCESS should be passed by the lower layer
+   * following verification that the packet has been received correctly.
+   * A value of error_t indicating an error should be passed when the lower
+   * layer's verification test fails or when the lower layer loses sync.
+   * @param result An error_t code indicating whether the framer has
+   * passed all bytes of an encapsulated packet it receives from
+   * serial to the dispatcher (SUCCESS) or not (FAIL).
+   */
+  async event void endPacket(error_t result);
+}
+
diff --git a/tos/lib/serial/SendBytePacket.nc b/tos/lib/serial/SendBytePacket.nc
new file mode 100644
index 00000000..1003c719
--- /dev/null
+++ b/tos/lib/serial/SendBytePacket.nc
@@ -0,0 +1,95 @@
+//$Id: SendBytePacket.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ /**
+ * This is an interface that a serial framing protocol provides and a serial
+ * dispatcher uses. The call sequence should be as follows:
+ * The dispatcher should call startSend, specifying the first byte to
+ * send. The framing protocol can then signal as many nextBytes as it
+ * wants/needs, to spool in the bytes. It continues to do so until it receives
+ * a sendComplete call, which will almost certainly happen within a nextByte
+ * signal (i.e., re-entrant to the framing protocol).
+
+ * This allows the framing protocol to buffer as many bytes as it needs to to meet
+ * timing requirements, jitter, etc. 
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+
+interface SendBytePacket {
+  /**
+   * The dispatcher may initiate a serial transmission by calling this function
+   * and passing the first byte to be transmitted.
+   * @param first_byte The first byte to be transmitted.
+   * @return Returns an error_t code indicating either that the framer
+   * has the resources available to transmit the frame (SUCCESS) or
+   * not (EBUSY).
+   */
+  async command error_t startSend(uint8_t first_byte);
+
+  /**
+   * The dispatcher must indicate when the end-of-packet has been reached and does
+   * so by calling completeSend. The function may be called from within the
+   * implementation of a nextByte event.
+   * @return Returns an error_t code indicating whether the framer accepts
+   * this notification (SUCCESS) or not (FAIL).
+   */
+  async command error_t completeSend();
+
+  /**
+   * Used by the framer to request the next byte to transmit. The
+   * framer may allocate a buffer to pre-spool some or all of a
+   * packet; or it may request and transmit a byte at a time. If there
+   * are no more bytes to send, the dispatcher must call completeSend
+   * before returning from this function.
+   * @return The dispatcher must return the next byte to transmit
+   */
+  async event uint8_t nextByte();
+
+  /**
+   * The framer signals sendCompleted to indicate that it is done transmitting a
+   * packet on the dispatcher's behalf. A non-SUCCESS error_t code indicates that
+   * there was a problem in transmission.
+   * @param error The framer indicates whether it has successfully
+   * accepted the entirety of the packet from the dispatcher (SUCCESS)
+   * or not (FAIL).
+   */
+  async event void sendCompleted(error_t error);
+}
+
+
+
diff --git a/tos/lib/serial/Serial.h b/tos/lib/serial/Serial.h
new file mode 100644
index 00000000..4821dbbb
--- /dev/null
+++ b/tos/lib/serial/Serial.h
@@ -0,0 +1,140 @@
+//$Id: Serial.h,v 1.8 2010-06-29 22:07:50 scipio Exp $
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*									
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * Author: Phil Buonadonna
+ * 
+ */
+
+/**
+ * @author Phil Buonadonna
+ * @author Lewis Girod
+ * @author Ben Greenstein
+ * @author Philip Levis
+ * @date   August 7 2005
+ */
+
+#ifndef SERIAL_H
+#define SERIAL_H
+#include "AM.h"
+
+typedef uint8_t uart_id_t;
+
+#define UQ_SERIALQUEUE_SEND "SerialQueueP.Send"
+
+enum {
+  HDLC_FLAG_BYTE	   = 0x7e,
+  HDLC_CTLESC_BYTE	   = 0x7d,
+};
+
+// message_t type dispatch
+
+enum {
+  TOS_SERIAL_ACTIVE_MESSAGE_ID = 0,
+  TOS_SERIAL_CC1000_ID = 1,
+  TOS_SERIAL_802_15_4_ID = 2,
+  TOS_SERIAL_UNKNOWN_ID = 255,
+};
+
+// Framer-level dispatch
+enum {
+  SERIAL_PROTO_ACK = 67,
+  SERIAL_PROTO_PACKET_ACK = 68,
+  SERIAL_PROTO_PACKET_NOACK = 69,
+  SERIAL_PROTO_PACKET_UNKNOWN = 255
+};
+
+typedef struct radio_stats {
+  uint8_t version;
+  uint8_t flags;
+  uint8_t reserved;
+  uint8_t platform;
+  uint16_t MTU;
+  uint16_t radio_crc_fail;
+  uint16_t radio_queue_drops;
+  uint16_t serial_crc_fail;
+  uint16_t serial_tx_fail;
+  uint16_t serial_short_packets;
+  uint16_t serial_proto_drops;
+} radio_stats_t;
+
+typedef nx_struct serial_header {
+  nx_am_addr_t dest;
+  nx_am_addr_t src;
+  nx_uint8_t length;
+  nx_am_group_t group;
+  nx_am_id_t type;
+} serial_header_t;
+
+typedef nx_struct serial_packet {
+  serial_header_t header;
+  nx_uint8_t data[];
+} serial_packet_t;
+
+typedef nx_struct serial_metadata {
+  nx_uint8_t ack;
+} serial_metadata_t;
+    
+#endif
diff --git a/tos/lib/serial/Serial802_15_4C.nc b/tos/lib/serial/Serial802_15_4C.nc
new file mode 100644
index 00000000..5851caee
--- /dev/null
+++ b/tos/lib/serial/Serial802_15_4C.nc
@@ -0,0 +1,63 @@
+//$Id: Serial802_15_4C.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of communication 802.15.4 message_t packets over the
+ * serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include "Serial.h"
+configuration Serial802_15_4C {
+  provides {
+    interface SplitControl;
+    interface Send;
+    interface Receive;
+  }
+  uses interface Leds;
+}
+implementation { 
+  components MainC, SerialPacketInfo802_15_4P, SerialDispatcherC;
+
+  MainC.SoftwareInit -> SerialDispatcherC;
+
+  SplitControl = SerialDispatcherC;
+  Leds = SerialDispatcherC;
+  Send = SerialDispatcherC.Send[TOS_SERIAL_802_15_4_ID];
+  Receive = SerialDispatcherC.Receive[TOS_SERIAL_802_15_4_ID];
+  SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_802_15_4_ID] -> SerialPacketInfo802_15_4P.Info;
+}
diff --git a/tos/lib/serial/SerialAMQueueP.nc b/tos/lib/serial/SerialAMQueueP.nc
new file mode 100644
index 00000000..fb7d3ba0
--- /dev/null
+++ b/tos/lib/serial/SerialAMQueueP.nc
@@ -0,0 +1,60 @@
+// $Id: SerialAMQueueP.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The fair-share AM send queue.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ */ 
+
+#include "AM.h"
+#include "Serial.h"
+
+configuration SerialAMQueueP {
+  provides interface Send[uint8_t client];
+}
+
+implementation {
+  enum {
+    NUM_CLIENTS = uniqueCount(UQ_SERIALQUEUE_SEND)
+  };
+  
+  components new AMQueueImplP(NUM_CLIENTS), SerialActiveMessageC;
+
+  Send = AMQueueImplP;
+  AMQueueImplP.AMSend -> SerialActiveMessageC;
+  AMQueueImplP.AMPacket -> SerialActiveMessageC;
+  AMQueueImplP.Packet -> SerialActiveMessageC;
+  
+}
+
diff --git a/tos/lib/serial/SerialAMReceiverC.nc b/tos/lib/serial/SerialAMReceiverC.nc
new file mode 100644
index 00000000..efe2bb51
--- /dev/null
+++ b/tos/lib/serial/SerialAMReceiverC.nc
@@ -0,0 +1,57 @@
+// $Id: SerialAMReceiverC.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The virtualized AM reception abstraction.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "AM.h"
+
+generic configuration SerialAMReceiverC(am_id_t amId) {
+  provides {
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+
+implementation {
+  components SerialActiveMessageC as AM;
+
+  Receive = AM.Receive[amId];
+  Packet = AM;
+  AMPacket = AM;
+}
diff --git a/tos/lib/serial/SerialAMSenderC.nc b/tos/lib/serial/SerialAMSenderC.nc
new file mode 100644
index 00000000..58296b6c
--- /dev/null
+++ b/tos/lib/serial/SerialAMSenderC.nc
@@ -0,0 +1,67 @@
+// $Id: SerialAMSenderC.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The virtualized active message send abstraction. Each instantiation
+ * of AMSenderC has its own queue of depth one. Therefore, it does not
+ * have to contend with other AMSenderC instantiations for queue space.
+ * The underlying implementation schedules the packets in these queues
+ * using some form of fair-share queueing.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "Serial.h"
+
+generic configuration SerialAMSenderC(am_id_t AMId) {
+  provides {
+    interface AMSend;
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+
+implementation {
+  components new AMQueueEntryP(AMId) as AMQueueEntryP;
+  components SerialAMQueueP, SerialActiveMessageC as AM;
+
+  AMQueueEntryP.Send -> SerialAMQueueP.Send[unique(UQ_SERIALQUEUE_SEND)];
+  AMQueueEntryP.AMPacket -> AM;
+  
+  AMSend = AMQueueEntryP;
+  Packet = AM;
+  AMPacket = AM;
+  Acks = AM;
+}
diff --git a/tos/lib/serial/SerialActiveMessageC.nc b/tos/lib/serial/SerialActiveMessageC.nc
new file mode 100644
index 00000000..9dce47f6
--- /dev/null
+++ b/tos/lib/serial/SerialActiveMessageC.nc
@@ -0,0 +1,73 @@
+//$Id: SerialActiveMessageC.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Sending active messages over the serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include "Serial.h"
+configuration SerialActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+  uses interface Leds;
+}
+implementation {
+  components new SerialActiveMessageP() as AM, SerialDispatcherC;
+  components SerialPacketInfoActiveMessageP as Info, MainC;
+
+  MainC.SoftwareInit -> SerialDispatcherC;
+  Leds = SerialDispatcherC;
+  SplitControl = SerialDispatcherC;
+  
+  AMSend = AM;
+  Receive = AM;
+  Packet = AM;
+  AMPacket = AM;
+  PacketAcknowledgements = AM;
+  
+  AM.SubSend -> SerialDispatcherC.Send[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+  AM.SubReceive -> SerialDispatcherC.Receive[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+  
+  SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_ACTIVE_MESSAGE_ID] -> Info;
+}
diff --git a/tos/lib/serial/SerialActiveMessageP.nc b/tos/lib/serial/SerialActiveMessageP.nc
new file mode 100644
index 00000000..0f9b6bef
--- /dev/null
+++ b/tos/lib/serial/SerialActiveMessageP.nc
@@ -0,0 +1,208 @@
+//$Id: SerialActiveMessageP.nc,v 1.11 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Sending active messages over the serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include <Serial.h>
+
+generic module SerialActiveMessageP () {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface PacketAcknowledgements;
+  }
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+  }
+}
+implementation {
+
+  serial_header_t* ONE getHeader(message_t* ONE msg) {
+    return TCAST(serial_header_t* ONE, (uint8_t*)msg + offsetof(message_t, data) - sizeof(serial_header_t));
+  }
+
+  serial_metadata_t* getMetadata(message_t* msg) {
+    return (serial_metadata_t*)(msg->metadata);
+  }
+  
+  command error_t AMSend.send[am_id_t id](am_addr_t dest,
+					  message_t* msg,
+					  uint8_t len) {
+    serial_header_t* header = getHeader(msg);
+
+    if (len > call Packet.maxPayloadLength()) {
+      return ESIZE;
+    }
+
+    header->dest = dest;
+    // Do not set the source address or group, as doing so
+    // prevents transparent bridging. Need a better long-term
+    // solution for this.
+    //header->src = call AMPacket.address();
+    //header->group = TOS_AM_GROUP;
+    header->type = id;
+    header->length = len;
+
+    return call SubSend.send(msg, len);
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+  
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t result) {
+   return;
+ }
+
+ default event message_t* Receive.receive[uint8_t id](message_t* msg, void* payload, uint8_t len) {
+   return msg;
+ }
+ 
+ event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    return signal Receive.receive[call AMPacket.type(msg)](msg, msg->data, len);
+  }
+
+  command void Packet.clear(message_t* msg) {
+    memset(getHeader(msg), 0, sizeof(serial_header_t));
+    return;
+  }
+
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    serial_header_t* header = getHeader(msg);    
+    return header->length;
+  }
+
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    getHeader(msg)->length  = len;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+  
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    if (len > call Packet.maxPayloadLength()) {
+      return NULL;
+    }
+    else {
+      return (void * COUNT_NOK(len))msg->data;
+    }
+  }
+
+  command am_addr_t AMPacket.address() {
+    return 0;
+  }
+
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->dest;
+  }
+
+  command am_addr_t AMPacket.source(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->src;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    serial_header_t* header = getHeader(amsg);
+    header->dest = addr;
+  }
+
+  command void AMPacket.setSource(message_t* amsg, am_addr_t addr) {
+    serial_header_t* header = getHeader(amsg);
+    header->src = addr;
+  }
+  
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return TRUE;
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t type) {
+    serial_header_t* header = getHeader(amsg);
+    header->type = type;
+  }
+
+  async command error_t PacketAcknowledgements.requestAck( message_t* msg ) {
+    return FAIL;
+  }
+  async command error_t PacketAcknowledgements.noAck( message_t* msg ) {
+    return SUCCESS;
+  }
+  
+  command void AMPacket.setGroup(message_t* msg, am_group_t group) {
+    serial_header_t* header = getHeader(msg);
+    header->group = group;
+  }
+
+  command am_group_t AMPacket.group(message_t* msg) {
+    serial_header_t* header = getHeader(msg);
+    return header->group;
+  }
+
+  command am_group_t AMPacket.localGroup() {
+    return TOS_AM_GROUP;
+  }
+
+ 
+  async command bool PacketAcknowledgements.wasAcked(message_t* msg) {
+    return FALSE;
+  }
+
+}
diff --git a/tos/lib/serial/SerialByteComm.nc b/tos/lib/serial/SerialByteComm.nc
new file mode 100644
index 00000000..d3f8473f
--- /dev/null
+++ b/tos/lib/serial/SerialByteComm.nc
@@ -0,0 +1,65 @@
+//$Id: SerialByteComm.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * A basic byte-level interface to a serial port.
+ *
+ * @author David Gay
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+interface SerialByteComm {
+
+  /** 
+   * Put a single byte to the serial port.
+   * @param data The byte to send to the serial port.
+   * @return Returns an error_t code indicating whether this byte was
+   * successfully put (SUCCESS) or not (FAIL).
+   */
+  async command error_t put(uint8_t data);
+
+  /** 
+   * Receive a single byte from the serial port.
+   * @param data The byte that has been received from the serial port.
+   */
+  async event void get(uint8_t data);
+
+  /** 
+   * Split phase event to indicate that the last put request
+   * has completed.
+   */
+  async event void putDone();
+}
diff --git a/tos/lib/serial/SerialDispatcherC.nc b/tos/lib/serial/SerialDispatcherC.nc
new file mode 100644
index 00000000..30f46200
--- /dev/null
+++ b/tos/lib/serial/SerialDispatcherC.nc
@@ -0,0 +1,83 @@
+//$Id: SerialDispatcherC.nc,v 1.6 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2005 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ * This component provides functionality to send many different kinds
+ * of serial packets on top of a general packet sending component. It
+ * achieves this by knowing where the different packets in a message_t
+ * exist through the SerialPacketInfo interface.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+configuration SerialDispatcherC {
+  provides {
+    interface Init;
+    interface SplitControl;
+    interface Receive[uart_id_t];
+    interface Send[uart_id_t];
+  }
+  uses {
+    interface SerialPacketInfo[uart_id_t];
+    interface Leds;
+  }
+}
+implementation {
+  components SerialP, new SerialDispatcherP(),
+    HdlcTranslateC,
+    PlatformSerialC;
+
+  Send = SerialDispatcherP;
+  Receive = SerialDispatcherP;
+  SerialPacketInfo = SerialDispatcherP.PacketInfo;
+  SplitControl = SerialP;
+
+  Init = SerialP;
+  Leds = SerialP;
+  Leds = SerialDispatcherP;
+  Leds = HdlcTranslateC;
+
+  SerialDispatcherP.ReceiveBytePacket -> SerialP;
+  SerialDispatcherP.SendBytePacket -> SerialP;
+
+  SerialP.SerialFrameComm -> HdlcTranslateC;
+  SerialP.SerialControl -> PlatformSerialC;
+  //  SerialP.SerialFlush -> PlatformSerialC;
+  HdlcTranslateC.UartStream -> PlatformSerialC;
+  
+
+}
diff --git a/tos/lib/serial/SerialDispatcherP.nc b/tos/lib/serial/SerialDispatcherP.nc
new file mode 100644
index 00000000..96a059c4
--- /dev/null
+++ b/tos/lib/serial/SerialDispatcherP.nc
@@ -0,0 +1,381 @@
+//$Id: SerialDispatcherP.nc,v 1.10 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This component provides functionality to send many different kinds
+ * of serial packets on top of a general packet sending component. It
+ * achieves this by knowing where the different packets in a message_t
+ * exist through the SerialPacketInfo interface.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include "Serial.h"
+
+generic module SerialDispatcherP() {
+  provides {
+    interface Receive[uart_id_t id];
+    interface Send[uart_id_t id];
+  }
+  uses {
+    interface SerialPacketInfo as PacketInfo[uart_id_t id];
+    interface ReceiveBytePacket;
+    interface SendBytePacket;
+    interface Leds;
+  }
+}
+implementation {
+
+  typedef enum {
+    SEND_STATE_IDLE = 0,
+    SEND_STATE_BEGIN = 1,
+    SEND_STATE_DATA = 2
+  } send_state_t;
+
+  enum {
+    RECV_STATE_IDLE = 0,
+    RECV_STATE_BEGIN = 1,
+    RECV_STATE_DATA = 2,
+  }; 
+  
+  typedef struct {
+    uint8_t which:1;
+    uint8_t bufZeroLocked:1;
+    uint8_t bufOneLocked:1;
+    uint8_t state:2;
+  } recv_state_t;
+  
+  // We are not busy, the current buffer to use is zero,
+  // neither buffer is locked, and we are idle
+  recv_state_t receiveState = {0, 0, 0, RECV_STATE_IDLE};
+  uint8_t recvType = TOS_SERIAL_UNKNOWN_ID;
+  uint8_t recvIndex = 0;
+
+  /* This component provides double buffering. */
+  message_t messages[2];     // buffer allocation
+  message_t* ONE messagePtrs[2] = { &messages[0], &messages[1]};
+  
+  // We store a separate receiveBuffer variable because indexing
+  // into a pointer array can be costly, and handling interrupts
+  // is time critical.
+  uint8_t* COUNT_NOK(sizeof(message_t)) receiveBuffer = (uint8_t* COUNT_NOK(sizeof(message_t)))(&messages[0]);
+
+  uint8_t *COUNT_NOK(sizeof(message_t)) sendBuffer = NULL;
+  send_state_t sendState = SEND_STATE_IDLE;
+  uint8_t sendLen = 0;
+  uint8_t sendIndex = 0;
+  norace error_t sendError = SUCCESS;
+  bool sendCancelled = FALSE;
+  uint8_t sendId = 0;
+
+
+  uint8_t receiveTaskPending = FALSE;
+  uart_id_t receiveTaskType = 0;
+  uint8_t receiveTaskWhich;
+  message_t * ONE_NOK receiveTaskBuf = NULL;
+  uint8_t receiveTaskSize = 0;
+
+  command error_t Send.send[uint8_t id](message_t* msg, uint8_t len) {
+    if (sendState != SEND_STATE_IDLE) {
+      return EBUSY;
+    }
+
+    atomic {
+      sendIndex = call PacketInfo.offset[id]();
+      if (sendIndex > sizeof(message_header_t)) {
+	return ESIZE;
+      }
+      
+      sendError = SUCCESS;
+      sendBuffer = (uint8_t*)msg;
+      sendState = SEND_STATE_DATA;
+      sendId = id;
+      sendCancelled = FALSE;
+      // If something we're starting past the header, something is wrong
+      // Bug fix from John Regehr
+
+
+      // sendLen is where in the buffer the packet stops.
+      // This is the length of the packet, plus its start point
+      sendLen = call PacketInfo.dataLinkLength[id](msg, len) + sendIndex;
+    }
+    if (call SendBytePacket.startSend(id) == SUCCESS) {
+      return SUCCESS;
+    }
+    else {
+      sendState = SEND_STATE_IDLE;
+      return FAIL;
+    }
+  }
+
+  command uint8_t Send.maxPayloadLength[uint8_t id]() {
+    return (sizeof(message_t));
+  }
+
+  command void* Send.getPayload[uint8_t id](message_t* m, uint8_t len) {
+    if (len > sizeof(message_t)) {
+      return NULL;
+    }
+    else {
+      return m;
+    }
+  }
+
+    
+  task void signalSendDone(){
+    error_t error;
+
+    sendState = SEND_STATE_IDLE;
+    atomic error = sendError;
+
+    if (sendCancelled) error = ECANCEL;
+    signal Send.sendDone[sendId]((message_t *)sendBuffer, error);
+  }
+
+  command error_t Send.cancel[uint8_t id](message_t *msg){
+    if (sendState == SEND_STATE_DATA && sendBuffer == ((uint8_t *)msg) &&
+	id == sendId){
+      call SendBytePacket.completeSend();
+      sendCancelled = TRUE;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+
+  async event uint8_t SendBytePacket.nextByte() {
+    uint8_t b;
+    uint8_t indx;
+    atomic {
+      b = sendBuffer[sendIndex];
+      sendIndex++;
+      indx = sendIndex;
+    }
+    if (indx > sendLen) {
+      call SendBytePacket.completeSend();
+      return 0;
+    }
+    else {
+      return b;
+    }
+  }
+  async event void SendBytePacket.sendCompleted(error_t error){
+    atomic sendError = error;
+    post signalSendDone();
+  }
+
+  bool isCurrentBufferLocked() {
+    return (receiveState.which)? receiveState.bufOneLocked : receiveState.bufZeroLocked;
+  }
+
+  void lockCurrentBuffer() {
+    if (receiveState.which) {
+      receiveState.bufOneLocked = 1;
+    }
+    else {
+      receiveState.bufZeroLocked = 1;
+    }
+  }
+
+  void unlockBuffer(uint8_t which) {
+    if (which) {
+      receiveState.bufOneLocked = 0;
+    }
+    else {
+      receiveState.bufZeroLocked = 0;
+    }
+  }
+  
+  void receiveBufferSwap() {
+    receiveState.which = (receiveState.which)? 0: 1;
+    receiveBuffer = (uint8_t*)(messagePtrs[receiveState.which]);
+  }
+  
+  async event error_t ReceiveBytePacket.startPacket() {
+    error_t result = SUCCESS;
+    atomic {
+      if (!isCurrentBufferLocked()) {
+        // We are implicitly in RECV_STATE_IDLE, as it is the only
+        // way our current buffer could be unlocked.
+        lockCurrentBuffer();
+        receiveState.state = RECV_STATE_BEGIN;
+        recvIndex = 0;
+        recvType = TOS_SERIAL_UNKNOWN_ID;
+      }
+      else {
+        result = EBUSY;
+      }
+    }
+    return result;
+  }
+
+  async event void ReceiveBytePacket.byteReceived(uint8_t b) {
+    atomic {
+      switch (receiveState.state) {
+      case RECV_STATE_BEGIN:
+        receiveState.state = RECV_STATE_DATA;
+        recvIndex = call PacketInfo.offset[b]();
+        recvType = b;
+        break;
+        
+      case RECV_STATE_DATA:
+        if (recvIndex < sizeof(message_t)) {
+          receiveBuffer[recvIndex] = b;
+          recvIndex++;
+        }
+        else {
+          // Drop extra bytes that do not fit in a message_t.
+          // We assume that either the higher layer knows what to
+          // do with partial packets, or performs sanity checks (e.g.,
+          // CRC).
+        }
+        break;
+        
+      case RECV_STATE_IDLE:
+      default:
+        // Do nothing. This case can be reached if the component
+        // does not have free buffers: it will ignore a packet start
+        // and stay in the IDLE state.
+      }
+    }
+  }
+  
+  task void receiveTask(){
+    uart_id_t myType;
+    message_t *myBuf;
+    uint8_t mySize;
+    uint8_t myWhich;
+    atomic {
+      myType = receiveTaskType;
+      myBuf = receiveTaskBuf;
+      mySize = receiveTaskSize;
+      myWhich = receiveTaskWhich;
+    }
+    mySize -= call PacketInfo.offset[myType]();
+    mySize = call PacketInfo.upperLength[myType](myBuf, mySize);
+    myBuf = signal Receive.receive[myType](myBuf, myBuf, mySize);
+    atomic {
+      messagePtrs[myWhich] = myBuf;
+      unlockBuffer(myWhich);
+      receiveTaskPending = FALSE;
+    }
+  }
+
+  async event void ReceiveBytePacket.endPacket(error_t result) {
+    uint8_t postsignalreceive = FALSE;
+    atomic {
+      if (!receiveTaskPending && result == SUCCESS){
+        postsignalreceive = TRUE;
+        receiveTaskPending = TRUE;
+        receiveTaskType = recvType;
+        receiveTaskWhich = receiveState.which;
+        receiveTaskBuf = (message_t *)receiveBuffer;
+        receiveTaskSize = recvIndex;
+        receiveBufferSwap();
+        receiveState.state = RECV_STATE_IDLE;
+      } else {
+        // we can't deliver the packet, better free the current buffer.
+        unlockBuffer(receiveState.which);
+      }
+    }
+    if (postsignalreceive){
+      post receiveTask();
+    }    
+
+    // These are all local variables to release component state that
+    // will allow the component to start receiving serial packets
+    // ASAP.
+    //
+    // We need myWhich in case we happen to receive a whole new packet
+    // before the signal returns, at which point receiveState.which
+    // might revert back to us (via receiveBufferSwap()).
+    
+/*     uart_id_t myType;   // What is the type of the packet in flight?  */
+/*     uint8_t myWhich;  // Which buffer ptr entry is it? */
+/*     uint8_t mySize;   // How large is it? */
+/*     message_t* myBuf; // A pointer, for buffer swapping */
+
+    // First, copy out all of the important state so we can receive
+    // the next packet. Then do a receiveBufferSwap, which will
+    // tell the component to use the other available buffer.
+    // If the buffer is 
+/*     atomic { */
+/*       myType = recvType; */
+/*       myWhich = receiveState.which; */
+/*       myBuf = (message_t*)receiveBuffer; */
+/*       mySize = recvIndex; */
+/*       receiveBufferSwap(); */
+/*       receiveState.state = RECV_STATE_IDLE; */
+/*     } */
+
+/*     mySize -= call PacketInfo.offset[myType](); */
+/*     mySize = call PacketInfo.upperLength[myType](myBuf, mySize); */
+
+/*     if (result == SUCCESS){ */
+/*       // TODO is the payload the same as the message? */
+/*       myBuf = signal Receive.receive[myType](myBuf, myBuf, mySize); */
+/*     } */
+/*     atomic { */
+/*       messagePtrs[myWhich] = myBuf; */
+/*       if (myWhich) { */
+/*         unlockBuffer(myWhich); */
+/*       } */
+/*     } */
+  }
+
+  default async command uint8_t PacketInfo.offset[uart_id_t id](){
+    return 0;
+  }
+  default async command uint8_t PacketInfo.dataLinkLength[uart_id_t id](message_t *msg,
+                                                          uint8_t upperLen){
+    return 0;
+  }
+  default async command uint8_t PacketInfo.upperLength[uart_id_t id](message_t *msg,
+                                                       uint8_t dataLinkLen){
+    return 0;
+  }
+
+
+  default event message_t *Receive.receive[uart_id_t idxxx](message_t *msg,
+                                                         void *payload,
+                                                         uint8_t len){
+    return msg;
+  }
+  default event void Send.sendDone[uart_id_t idxxx](message_t *msg, error_t error){
+    return;
+  }
+
+  
+}
diff --git a/tos/lib/serial/SerialFlush.nc b/tos/lib/serial/SerialFlush.nc
new file mode 100644
index 00000000..62c6c793
--- /dev/null
+++ b/tos/lib/serial/SerialFlush.nc
@@ -0,0 +1,57 @@
+//$Id: SerialFlush.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * A basic interface to flush the serial port.
+ *
+ * @author Ben Greenstein
+ * @author Philip Levis
+ * @date January 23 2006
+ *
+ */
+
+interface SerialFlush {
+
+  /** 
+   * Request that the serial device signal when no more transmissions
+   * are pending (i.e., when the device is idle)
+   */
+  command void flush();
+
+  /** 
+   * Split phase event to indicate that the serial hardware is now idle.
+   */
+  event void flushDone();
+
+}
+
diff --git a/tos/lib/serial/SerialFrameComm.nc b/tos/lib/serial/SerialFrameComm.nc
new file mode 100644
index 00000000..c9db1c0f
--- /dev/null
+++ b/tos/lib/serial/SerialFrameComm.nc
@@ -0,0 +1,101 @@
+//$Id: SerialFrameComm.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * This interface sits between a serial byte encoding component and a
+ * framing/packetizing component. It is to be used with framing protocols
+ * that place delimiters between frames. This interface separates the tasks
+ * of interpreting and coding delimiters and escape bytes from the rest of
+ * the wire protocol.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date   August 7 2005
+ */
+   
+interface SerialFrameComm {
+  /**
+   * Used by the upper layer to request that an interframe delimiter
+   * be sent. The lower layer is responsible for the determining the
+   * actual byte(s) that must be sent to delimit the frame.
+   * @return Returns a error_t code that indicates if the lower layer
+   * was able to put an interframe delimiter to serial (SUCCESS) or
+   * not (FAIL).
+   */
+  async command error_t putDelimiter();
+
+  /**
+   *  Used by the upper layer to request that a byte of data be sent
+   *  over serial.
+   *  @param data The byte to be sent
+   *  @return Returns an error_t code that indicates if the lower layer
+   *  has accepted the byte for sending (SUCCESS) or not (FAIL).
+   */
+  async command error_t putData(uint8_t data);
+
+  /**
+   * Requests that any underlying state associated with send-side frame
+   * delimiting or escaping be reset. Used to initialize the lower
+   * layer's send path and/or cancel a frame mid-transmission.
+   */
+  async command void resetSend();
+
+  /**
+   * Requests that any underlying state associated with receive-side
+   * frame or escaping be reset. Used to initialize the lower layer's
+   * receive path and/or cancel a frame mid-reception when sync is lost.
+   */
+  async command void resetReceive();
+
+  /**
+   * Signals the upper layer that an inter-frame delimiter has been 
+   * received from the serial connection.
+   */
+  async event void delimiterReceived();
+
+  /**
+   * Signals the upper layer that a byte of data has been received
+   * from the serial connection. It passes this byte as a function
+   * parameter.  
+   * @param data The byte of data that has been received
+   * from the serial connection
+   */  
+  async event void dataReceived(uint8_t data);
+
+  /**
+   * Split-phase event to signal when the lower layer has finished writing
+   * the last request (either putDelimiter or putData) to serial.
+   */
+  async event void putDone(); 
+}
diff --git a/tos/lib/serial/SerialP.nc b/tos/lib/serial/SerialP.nc
new file mode 100644
index 00000000..6cb06f6c
--- /dev/null
+++ b/tos/lib/serial/SerialP.nc
@@ -0,0 +1,738 @@
+/*									
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation.
+ *  Copyright (c) 2010 Stanford University.
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * Revision: $Revision: 1.5 $
+ * 
+ */
+
+/*
+ * 
+ * This modules provides framing for TOS_Msgs using PPP-HDLC-like
+ * framing (see RFC 1662).  When sending, a TOS_Msg is encapsulated in
+ * an HDLC frame.  Receiving is similar EXCEPT that the component
+ * expects a special token byte be received before the data
+ * payload. The purpose of the token is to feed back an
+ * acknowledgement to the sender which serves as a crude form of
+ * flow-control.
+ *
+ * @author Phil Buonadonna
+ * @author Lewis Girod
+ * @author Ben Greenstein
+ * @author Philip Levis
+ * @date   September 30 2010
+ */
+
+
+#include "AM.h"
+#include "crc.h"
+
+module SerialP {
+
+  provides {
+    interface Init;
+    interface SplitControl;
+    interface SendBytePacket;
+    interface ReceiveBytePacket;
+  }
+
+  uses {
+    interface SerialFrameComm;
+    interface Leds;
+    interface StdControl as SerialControl;
+    interface SerialFlush;
+  }
+}
+implementation {
+#define NO_TX_SEQNO
+
+  enum {
+    RX_DATA_BUFFER_SIZE = 2,
+    TX_DATA_BUFFER_SIZE = 4,
+    SERIAL_MTU = 255,
+    SERIAL_VERSION = 1,
+    ACK_QUEUE_SIZE = 5,
+  };
+
+  enum {
+    RXSTATE_NOSYNC,
+    RXSTATE_PROTO,
+    RXSTATE_TOKEN,
+    RXSTATE_INFO,
+    RXSTATE_INACTIVE
+  };
+
+  enum {
+    TXSTATE_IDLE,
+    TXSTATE_PROTO,
+    TXSTATE_SEQNO,
+    TXSTATE_INFO,
+    TXSTATE_FCS1,
+    TXSTATE_FCS2,
+    TXSTATE_ENDFLAG,
+    TXSTATE_ENDWAIT,
+    TXSTATE_FINISH,
+    TXSTATE_ERROR,
+    TXSTATE_INACTIVE
+  };
+
+  typedef enum {
+    BUFFER_AVAILABLE,
+    BUFFER_FILLING,
+    BUFFER_COMPLETE,
+  } tx_data_buffer_states_t;
+
+  enum {
+    TX_ACK_INDEX = 0,
+    TX_DATA_INDEX = 1,
+    TX_BUFFER_COUNT = 2,
+  };
+
+
+  typedef struct {
+    uint8_t writePtr;
+    uint8_t readPtr;
+    uint8_t buf[RX_DATA_BUFFER_SIZE+1]; // one wasted byte: writePtr == readPtr means empty
+  } rx_buf_t;
+
+  typedef struct {
+    uint8_t state;
+    uint8_t buf;    
+  } tx_buf_t;
+  
+  typedef struct {
+    uint8_t writePtr;
+    uint8_t readPtr;
+    uint8_t buf[ACK_QUEUE_SIZE+1]; // one wasted byte: writePtr == readPtr means empty    
+  } ack_queue_t;
+
+  /* Buffers */
+
+  rx_buf_t rxBuf;
+  tx_buf_t txBuf[TX_BUFFER_COUNT];
+
+  /* Receive State */
+
+  uint8_t  rxState;
+  uint8_t  rxByteCnt;
+  uint8_t  rxProto;
+  uint8_t  rxSeqno;
+  uint16_t rxCRC;
+
+  /* Transmit State */
+
+  uint8_t  txState;
+  uint8_t  txByteCnt;
+  uint8_t  txProto;
+  uint8_t  txSeqno;
+  uint16_t txCRC;
+  uint8_t  txPending;
+  uint8_t txIndex;
+  
+  /* Ack Queue */
+  ack_queue_t ackQ;
+
+  bool offPending = FALSE;
+
+  // Prototypes
+
+  inline void txInit();
+  inline void rxInit();
+  inline void ackInit();
+
+  inline bool ack_queue_is_full(); 
+  inline bool ack_queue_is_empty(); 
+  inline void ack_queue_push(uint8_t token);
+  inline uint8_t ack_queue_top();
+  uint8_t ack_queue_pop();
+
+  inline void rx_buffer_init();
+  inline bool rx_buffer_is_full();
+  inline bool rx_buffer_is_empty();
+  inline void rx_buffer_push(uint8_t data);
+  inline uint8_t rx_buffer_top();
+  inline uint8_t rx_buffer_pop();
+  inline uint16_t rx_current_crc();
+
+  void rx_state_machine(bool isDelimeter, uint8_t data);
+  void MaybeScheduleTx();
+  task void RunTx();
+  
+
+
+  inline void txInit(){
+    uint8_t i;
+    atomic for (i = 0; i < TX_BUFFER_COUNT; i++) txBuf[i].state = BUFFER_AVAILABLE;
+    txState = TXSTATE_IDLE;
+    txByteCnt = 0;
+    txProto = 0;
+    txSeqno = 0;
+    txCRC = 0; 
+    txPending = FALSE;
+    txIndex = 0;
+  }
+
+  inline void rxInit(){
+    rxBuf.writePtr = rxBuf.readPtr = 0;
+    rxState = RXSTATE_NOSYNC;
+    rxByteCnt = 0;
+    rxProto = 0;
+    rxSeqno = 0;
+    rxCRC = 0;
+  }
+
+  inline void ackInit(){
+    ackQ.writePtr = ackQ.readPtr = 0;
+  }
+
+  command error_t Init.init() {
+
+    txInit();
+    rxInit();
+    ackInit();
+
+    return SUCCESS;
+  }
+
+
+  /*
+   *  buffer and queue manipulation
+   */
+
+  inline bool ack_queue_is_full(){ 
+    uint8_t tmp, tmp2;
+    atomic {
+      tmp = ackQ.writePtr;
+      tmp2 = ackQ.readPtr;
+    }
+    if (++tmp > ACK_QUEUE_SIZE) tmp = 0;
+    return (tmp == tmp2);
+  }
+
+  inline bool ack_queue_is_empty(){
+    bool ret;
+    atomic ret = (ackQ.writePtr == ackQ.readPtr); 
+    return ret;
+  }
+
+  inline void ack_queue_push(uint8_t token) {
+    if (!ack_queue_is_full()){
+      atomic {
+        ackQ.buf[ackQ.writePtr] = token;
+        if (++ackQ.writePtr > ACK_QUEUE_SIZE) ackQ.writePtr = 0;
+      }
+      MaybeScheduleTx();
+    }
+  }
+
+  inline uint8_t ack_queue_top() {
+    uint8_t tmp = 0;
+    atomic {
+      if (!ack_queue_is_empty()){
+        tmp =  ackQ.buf[ackQ.readPtr];
+      }
+    }
+    return tmp;
+  }
+
+  uint8_t ack_queue_pop() {
+    uint8_t retval = 0;
+    atomic {
+      if (ackQ.writePtr != ackQ.readPtr){
+        retval =  ackQ.buf[ackQ.readPtr];
+        if (++(ackQ.readPtr) > ACK_QUEUE_SIZE) ackQ.readPtr = 0;
+      }
+    }
+    return retval;
+  }
+
+
+  /* 
+   * Buffer Manipulation
+   */
+
+  inline void rx_buffer_init(){
+    rxBuf.writePtr = rxBuf.readPtr = 0;
+  }
+  inline bool rx_buffer_is_full() {
+    uint8_t tmp = rxBuf.writePtr;
+    if (++tmp > RX_DATA_BUFFER_SIZE) tmp = 0;
+    return (tmp == rxBuf.readPtr);
+  }
+  inline bool rx_buffer_is_empty(){
+    return (rxBuf.readPtr == rxBuf.writePtr);
+  }
+  inline void rx_buffer_push(uint8_t data){
+    rxBuf.buf[rxBuf.writePtr] = data;
+    if (++(rxBuf.writePtr) > RX_DATA_BUFFER_SIZE) rxBuf.writePtr = 0;
+  }
+  inline uint8_t rx_buffer_top(){
+    uint8_t tmp = rxBuf.buf[rxBuf.readPtr];
+    return tmp;
+  }
+  inline uint8_t rx_buffer_pop(){
+    uint8_t tmp = rxBuf.buf[rxBuf.readPtr];
+    if (++(rxBuf.readPtr) > RX_DATA_BUFFER_SIZE) rxBuf.readPtr = 0;
+    return tmp;
+  }
+  
+  inline uint16_t rx_current_crc(){
+    uint16_t crc;
+    uint8_t tmp = rxBuf.writePtr;
+    tmp = (tmp == 0 ? RX_DATA_BUFFER_SIZE : tmp - 1);
+    crc = rxBuf.buf[tmp] & 0x00ff;
+    crc = (crc << 8) & 0xFF00;
+    tmp = (tmp == 0 ? RX_DATA_BUFFER_SIZE : tmp - 1);
+    crc |= (rxBuf.buf[tmp] & 0x00FF);
+    return crc;
+  }
+
+  task void startDoneTask() {
+    call SerialControl.start();
+    signal SplitControl.startDone(SUCCESS);
+  }
+
+
+  task void stopDoneTask() {
+    call SerialFlush.flush();
+  }
+
+  event void SerialFlush.flushDone(){
+    call SerialControl.stop();
+    signal SplitControl.stopDone(SUCCESS);
+  }
+
+  task void defaultSerialFlushTask(){
+    signal SerialFlush.flushDone();
+  }
+  default command void SerialFlush.flush(){
+    post defaultSerialFlushTask();
+  }
+
+  command error_t SplitControl.start() {
+    post startDoneTask();
+    return SUCCESS;
+  }
+
+  void testOff() {
+    bool turnOff = FALSE;
+    atomic {
+      if (txState == TXSTATE_INACTIVE &&
+	  rxState == RXSTATE_INACTIVE) {
+	turnOff = TRUE;
+      }
+    }
+    if (turnOff) {
+      post stopDoneTask();
+      atomic offPending = FALSE;
+    }
+    else {
+      atomic offPending = TRUE;
+    }
+  }
+    
+  command error_t SplitControl.stop() {
+    atomic {
+      if (rxState == RXSTATE_NOSYNC) {
+	rxState = RXSTATE_INACTIVE;
+      }
+    }
+    atomic {
+      if (txState == TXSTATE_IDLE) {
+	txState = TXSTATE_INACTIVE;
+      }
+    }
+    testOff();
+    return SUCCESS;
+  }
+
+  /*
+   *  Receive Path
+   */ 
+  
+  
+  async event void SerialFrameComm.delimiterReceived(){
+    rx_state_machine(TRUE,0);
+  }
+  async event void SerialFrameComm.dataReceived(uint8_t data){
+    rx_state_machine(FALSE,data);
+  }
+
+  bool valid_rx_proto(uint8_t proto){
+    switch (proto){
+    case SERIAL_PROTO_PACKET_ACK: 
+      return TRUE;
+    case SERIAL_PROTO_ACK:
+    case SERIAL_PROTO_PACKET_NOACK:
+    default: 
+      return FALSE;
+    }
+  }
+
+  void rx_state_machine(bool isDelimeter, uint8_t data){
+
+    switch (rxState) {
+      
+    case RXSTATE_NOSYNC: 
+      if (isDelimeter) {
+        rxInit();
+        rxState = RXSTATE_PROTO;
+      }
+      break;
+      
+    case RXSTATE_PROTO:
+      if (!isDelimeter){
+        rxCRC = crcByte(rxCRC,data);
+        rxState = RXSTATE_TOKEN;
+        rxProto = data;
+        if (!valid_rx_proto(rxProto))
+          goto nosync;
+        // only supports serial proto packet ack
+        if (rxProto != SERIAL_PROTO_PACKET_ACK){
+          goto nosync;
+        }
+        if (signal ReceiveBytePacket.startPacket() != SUCCESS){
+          goto nosync;
+        }
+      }      
+      break;
+      
+    case RXSTATE_TOKEN:
+      if (isDelimeter) {
+        goto nosync;
+      }
+      else {
+        rxSeqno = data;
+        rxCRC = crcByte(rxCRC,rxSeqno);
+        rxState = RXSTATE_INFO;
+      }
+      break;
+      
+    case RXSTATE_INFO:
+      if (rxByteCnt < SERIAL_MTU){ 
+        if (isDelimeter) { /* handle end of frame */
+          if (rxByteCnt >= 2) {
+            if (rx_current_crc() == rxCRC) {
+              signal ReceiveBytePacket.endPacket(SUCCESS);
+              ack_queue_push(rxSeqno);
+	      rxInit();
+	      call SerialFrameComm.resetReceive();
+	      if (offPending) {
+		rxState = RXSTATE_INACTIVE;
+		testOff();
+	      }
+              goto done;
+            }
+            else {
+              goto nosync;
+            }
+          }
+          else {
+            goto nosync;
+          }
+	}
+        else { /* handle new bytes to save */
+          if (rxByteCnt >= 2){ 
+            signal ReceiveBytePacket.byteReceived(rx_buffer_top());
+            rxCRC = crcByte(rxCRC,rx_buffer_pop());
+          }
+	  rx_buffer_push(data);
+          rxByteCnt++;
+        }
+      }
+      
+      /* no valid message.. */
+      else {
+        goto nosync;
+       }
+      break;
+      
+    default:      
+      goto nosync;
+    }
+    goto done;
+
+  nosync:
+    /* reset all counters, etc */
+    rxInit();
+    call SerialFrameComm.resetReceive();
+    signal ReceiveBytePacket.endPacket(FAIL);
+    if (offPending) {
+      rxState = RXSTATE_INACTIVE;
+      testOff();
+    }
+    /* if this was a flag, start in proto state.. */
+    else if (isDelimeter) {
+      rxState = RXSTATE_PROTO;
+    }
+    
+  done:
+  }
+
+  
+  /*
+   *  Send Path
+   */ 
+
+
+  void MaybeScheduleTx() {
+    atomic {
+      if (txPending == 0) {
+        if (post RunTx() == SUCCESS) {
+          txPending = 1;
+        }
+      }
+    }
+  }
+
+
+  async command error_t SendBytePacket.completeSend(){
+    bool ret = FAIL;
+    atomic {
+        txBuf[TX_DATA_INDEX].state = BUFFER_COMPLETE;
+        ret = SUCCESS;
+    }
+    return ret;
+  }
+
+  async command error_t SendBytePacket.startSend(uint8_t b){
+    bool not_busy = FALSE;
+    atomic {
+      if (txBuf[TX_DATA_INDEX].state == BUFFER_AVAILABLE){
+        txBuf[TX_DATA_INDEX].state = BUFFER_FILLING;
+        txBuf[TX_DATA_INDEX].buf = b;
+        not_busy = TRUE;
+      }
+    }
+    if (not_busy) {
+      MaybeScheduleTx();
+      return SUCCESS;
+    }
+    return EBUSY;
+
+  }
+  
+  task void RunTx() {
+    uint8_t idle;
+    uint8_t done;
+    uint8_t fail;
+    
+    /*
+      the following trigger MaybeScheduleTx, which starts at most one RunTx:
+      1) adding an ack to the ack queue (ack_queue_push())
+      2) starting to send a packet (SendBytePacket.startSend())
+      3) failure to send start delimiter in RunTx
+      4) putDone: 
+    */
+    
+    error_t result = SUCCESS;
+    bool send_completed = FALSE;
+    bool start_it = FALSE;
+    
+    atomic { 
+      txPending = 0;
+      idle = (txState == TXSTATE_IDLE);
+      done = (txState == TXSTATE_FINISH);
+      fail = (txState == TXSTATE_ERROR);
+      if (done || fail){ 
+        txState = TXSTATE_IDLE;
+        txBuf[txIndex].state = BUFFER_AVAILABLE;
+      }
+    }
+    
+    /* if done, call the send done */
+    if (done || fail) {
+      atomic {
+	txSeqno++;
+	if (txProto == SERIAL_PROTO_ACK){
+	  ack_queue_pop();
+	}
+	else {
+	  result = done ? SUCCESS : FAIL;
+	  send_completed = TRUE;
+	}
+      }
+      idle = TRUE;
+    }
+    
+    /* if idle, set up next packet to TX */ 
+    if (idle) {
+      bool goInactive;
+      atomic goInactive = offPending;
+      if (goInactive) {
+        atomic txState = TXSTATE_INACTIVE;
+      }
+      else {
+        /* acks are top priority */
+        uint8_t myAckState;
+        uint8_t myDataState;
+        atomic {
+          myAckState = txBuf[TX_ACK_INDEX].state;
+          myDataState = txBuf[TX_DATA_INDEX].state;
+        }
+        if (!ack_queue_is_empty() && myAckState == BUFFER_AVAILABLE) {
+          atomic {
+            txBuf[TX_ACK_INDEX].state = BUFFER_COMPLETE;
+            txBuf[TX_ACK_INDEX].buf = ack_queue_top();
+
+	    txProto = SERIAL_PROTO_ACK;
+	    txIndex = TX_ACK_INDEX;
+	    start_it = TRUE;
+	  }
+        }
+        else if (myDataState == BUFFER_FILLING || myDataState == BUFFER_COMPLETE){
+	  atomic {
+	    txProto = SERIAL_PROTO_PACKET_NOACK;
+	    txIndex = TX_DATA_INDEX;
+	    start_it = TRUE;
+	  }
+        }
+        else {
+          /* nothing to send now.. */
+        }
+      }
+    }
+    else {
+      /* we're in the middle of transmitting */
+    }
+    
+    if (send_completed){
+      signal SendBytePacket.sendCompleted(result);
+    }
+    atomic {
+      if (txState == TXSTATE_INACTIVE) {
+	testOff();
+	return;
+      }
+    }
+    
+    if (start_it){
+      /* OK, start transmitting ! */
+      atomic { 
+        txCRC = 0;
+        txByteCnt = 0;
+        txState = TXSTATE_PROTO; 
+      }
+      if (call SerialFrameComm.putDelimiter() != SUCCESS) {
+        atomic txState = TXSTATE_ERROR; 
+        MaybeScheduleTx();
+      }
+    }
+    
+  }
+  
+  async event void SerialFrameComm.putDone() {
+    {
+      error_t txResult = SUCCESS;
+      atomic {
+	switch (txState) {
+	  
+	case TXSTATE_PROTO:
+	  
+	  txResult = call SerialFrameComm.putData(txProto);
+#ifdef NO_TX_SEQNO
+	  txState = TXSTATE_INFO;
+#else
+	  txState = TXSTATE_SEQNO;
+#endif
+	  txCRC = crcByte(txCRC,txProto);
+	  break;
+        
+	case TXSTATE_SEQNO:
+	  txResult = call SerialFrameComm.putData(txSeqno);
+	  txState = TXSTATE_INFO;
+	  txCRC = crcByte(txCRC,txSeqno);
+	  break;
+	  
+	case TXSTATE_INFO:
+	  atomic {
+	    txResult = call SerialFrameComm.putData(txBuf[txIndex].buf);
+	    txCRC = crcByte(txCRC,txBuf[txIndex].buf);
+	    ++txByteCnt;
+	    
+	    if (txIndex == TX_DATA_INDEX){
+	      uint8_t nextByte;
+	      nextByte = signal SendBytePacket.nextByte();
+	      if (txBuf[txIndex].state == BUFFER_COMPLETE || txByteCnt >= SERIAL_MTU){
+		txState = TXSTATE_FCS1;
+	      }
+	      else { /* never called on ack b/c ack is BUFFER_COMPLETE initially */
+		txBuf[txIndex].buf = nextByte;
+	      }
+	    }
+	    else { // TX_ACK_INDEX
+	      txState = TXSTATE_FCS1;
+	    }
+	  }
+	  break;
+	  
+	case TXSTATE_FCS1:
+	  txResult = call SerialFrameComm.putData(txCRC & 0xff);
+	  txState = TXSTATE_FCS2;
+	  break;
+	  
+	case TXSTATE_FCS2:
+	  txResult = call SerialFrameComm.putData((txCRC >> 8) & 0xff);
+	  txState = TXSTATE_ENDFLAG;
+	  break;
+	  
+	case TXSTATE_ENDFLAG:
+	  txResult = call SerialFrameComm.putDelimiter();
+	  txState = TXSTATE_ENDWAIT;
+	  break;
+	  
+	case TXSTATE_ENDWAIT:
+	  txState = TXSTATE_FINISH;
+	case TXSTATE_FINISH:
+	  MaybeScheduleTx();
+	  break;
+	case TXSTATE_ERROR:
+	default:
+	  txResult = FAIL; 
+	  break;
+	}
+      
+	if (txResult != SUCCESS) {
+	  txState = TXSTATE_ERROR;
+	  MaybeScheduleTx();
+	}
+      }
+    }
+  }
+
+  
+ default event void SplitControl.startDone(error_t err) {}
+ default event void SplitControl.stopDone(error_t err) {}
+}
diff --git a/tos/lib/serial/SerialPacketInfo.nc b/tos/lib/serial/SerialPacketInfo.nc
new file mode 100644
index 00000000..c0b4319c
--- /dev/null
+++ b/tos/lib/serial/SerialPacketInfo.nc
@@ -0,0 +1,32 @@
+/**
+ * Accessor methods used by a serial dispatcher to communicate with various
+ * message_t link formats over a serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ */
+
+interface SerialPacketInfo {
+  /**
+   * Get the offset into a message_t where the header information begins.
+   * @return Returns the offset.
+   */
+  async command uint8_t offset();
+  /**
+   * Get the size of the datalink packet embedded in the message_t, in bytes. 
+   * This is the sum of the payload (upperLen) and the size of the link header.
+   * @param msg A pointer to the message_t to interrogate. (unused)
+   * @param upperLen The size of the payload.
+   * @return Returns the size of the datalink packet.
+   */
+  async command uint8_t dataLinkLength(message_t* msg, uint8_t upperLen);
+  /**
+   * Get the size of the payload (in bytes) given the size of the datalink
+   * packet (dataLinkLen) embedded in the message_t.
+   * @param msg A pointer to the message_t to interrogate. (unused)
+   * @param dataLinkLength The size of the datalink packet.
+   * @return Returns the size of the payload.
+   */
+  async command uint8_t upperLength(message_t* msg, uint8_t dataLinkLen);
+}
diff --git a/tos/lib/serial/SerialPacketInfo802_15_4P.nc b/tos/lib/serial/SerialPacketInfo802_15_4P.nc
new file mode 100644
index 00000000..064b4734
--- /dev/null
+++ b/tos/lib/serial/SerialPacketInfo802_15_4P.nc
@@ -0,0 +1,69 @@
+//$Id: SerialPacketInfo802_15_4P.nc,v 1.8 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the metdata necessary for a dispatcher to
+ * communicate 802.15.4 message_t packets over a serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+module SerialPacketInfo802_15_4P {
+  provides interface SerialPacketInfo as Info;
+}
+implementation {
+#if defined(PLATFORM_IRIS) || defined(PLATFORM_MULLE)
+  enum {
+    HEADER_SIZE = sizeof(rf230packet_header_t),
+    FOOTER_SIZE = sizeof(rf230packet_footer_t),
+  };
+#else
+  enum {
+    HEADER_SIZE = sizeof(cc2420_header_t),
+    FOOTER_SIZE = sizeof(cc2420_footer_t),
+  };
+#endif
+
+  async command uint8_t Info.offset() {
+    return sizeof(message_header_t)-HEADER_SIZE;
+  }
+  async command uint8_t Info.dataLinkLength(message_t* msg, uint8_t upperLen) {
+    return upperLen + HEADER_SIZE + FOOTER_SIZE;
+  }
+  async command uint8_t Info.upperLength(message_t* msg, uint8_t dataLinkLen) {
+    return dataLinkLen - (HEADER_SIZE + FOOTER_SIZE);
+  }
+}
diff --git a/tos/lib/serial/SerialPacketInfoActiveMessageP.nc b/tos/lib/serial/SerialPacketInfoActiveMessageP.nc
new file mode 100644
index 00000000..6dd2e711
--- /dev/null
+++ b/tos/lib/serial/SerialPacketInfoActiveMessageP.nc
@@ -0,0 +1,61 @@
+//$Id: SerialPacketInfoActiveMessageP.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the metadata neccessary for a dispatcher to
+ * communicate with basic active messages packets over a serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include "Serial.h"
+
+module SerialPacketInfoActiveMessageP {
+  provides interface SerialPacketInfo as Info;
+}
+implementation {
+
+  async command uint8_t Info.offset() {
+    return (uint8_t)(sizeof(message_header_t) - sizeof(serial_header_t));
+  }
+  async command uint8_t Info.dataLinkLength(message_t* msg, uint8_t upperLen) {
+    return upperLen + sizeof(serial_header_t);
+  }
+  async command uint8_t Info.upperLength(message_t* msg, uint8_t dataLinkLen) {
+    return dataLinkLen - sizeof(serial_header_t);
+  }
+}
+
diff --git a/tos/lib/serial/SerialQueueP.nc b/tos/lib/serial/SerialQueueP.nc
new file mode 100644
index 00000000..c843bc92
--- /dev/null
+++ b/tos/lib/serial/SerialQueueP.nc
@@ -0,0 +1,59 @@
+// $Id: SerialQueueP.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The fair-share AM send queue.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ */ 
+
+#include "Serial.h"
+
+configuration SerialQueueP {
+  provides interface Send[uint8_t client];
+}
+
+implementation {
+  enum {
+    NUM_CLIENTS = uniqueCount(UQ_SERIALQUEUE_SEND)
+  };
+  
+  components new AMQueueImplP(NUM_CLIENTS), SerialActiveMessageC;
+
+  Send = AMQueueImplP;
+  AMQueueImplP.AMSend -> SerialActiveMessageC;
+  AMQueueImplP.AMPacket -> SerialActiveMessageC;
+  AMQueueImplP.Packet -> SerialActiveMessageC;
+  
+}
+
diff --git a/tos/lib/timer/Alarm.nc b/tos/lib/timer/Alarm.nc
new file mode 100644
index 00000000..67546c5d
--- /dev/null
+++ b/tos/lib/timer/Alarm.nc
@@ -0,0 +1,118 @@
+//$Id: Alarm.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Timer.h"
+
+/**
+ * An Alarm is a low-level interface intended for precise timing.
+ *
+ * <p>An Alarm is parameterised by its "precision" (milliseconds,
+ * microseconds, etc), identified by a type. This prevents, e.g.,
+ * unintentionally mixing components expecting milliseconds with those
+ * expecting microseconds as those interfaces have a different type.
+ *
+ * <p>An Alarm's second parameter is its "width", i.e., the number of
+ * bits used to represent time values. Width is indicated by including
+ * the appropriate size integer type as an Alarm parameter.
+ *
+ * <p>See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of this Alarm.
+ * @param size_type An integer type representing time values for this Alarm.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+interface Alarm<precision_tag, size_type>
+{
+  // basic interface
+  /**
+   * Set a single-short alarm to some time units in the future. Replaces
+   * any current alarm time. Equivalent to start(getNow(), dt). The
+   * <code>fired</code> will be signaled when the alarm expires.
+   *
+   * @param dt Time until the alarm fires.
+   */
+  async command void start(size_type dt);
+
+  /**
+   * Cancel an alarm. Note that the <code>fired</code> event may have
+   * already been signaled (even if your code has not yet started
+   * executing).
+   */
+  async command void stop();
+
+  /**
+   * Signaled when the alarm expires.
+   */
+  async event void fired();
+
+  // extended interface
+  /**
+   * Check if alarm is running. Note that a FALSE return does not indicate
+   * that the <code>fired</code> event will not be signaled (it may have
+   * already started executing, but not reached your code yet).
+   *
+   * @return TRUE if the alarm is still running.
+   */
+  async command bool isRunning();
+
+  /**
+   * Set a single-short alarm to time t0+dt. Replaces any current alarm
+   * time. The <code>fired</code> will be signaled when the alarm expires.
+   * Alarms set in the past will fire "soon".
+   * 
+   * <p>Because the current time may wrap around, it is possible to use
+   * values of t0 greater than the <code>getNow</code>'s result. These
+   * values represent times in the past, i.e., the time at which getNow()
+   * would last of returned that value.
+   *
+   * @param t0 Base time for alarm.
+   * @param dt Alarm time as offset from t0.
+   */
+  async command void startAt(size_type t0, size_type dt);
+
+  /**
+   * Return the current time.
+   * @return Current time.
+   */
+  async command size_type getNow();
+
+  /**
+   * Return the time the currently running alarm will fire or the time that
+   * the previously running alarm was set to fire.
+   * @return Alarm time.
+   */
+  async command size_type getAlarm();
+}
+
diff --git a/tos/lib/timer/AlarmToTimerC.nc b/tos/lib/timer/AlarmToTimerC.nc
new file mode 100644
index 00000000..ca03451d
--- /dev/null
+++ b/tos/lib/timer/AlarmToTimerC.nc
@@ -0,0 +1,105 @@
+//$Id: AlarmToTimerC.nc,v 1.7 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Timer.h"
+
+/**
+ * AlarmToTimerC converts a 32-bit Alarm to a Timer.  
+ *
+ * <p>See TEP102 for more details.
+ * @param precision_tag A type indicating the precision of the Alarm and
+ * Timer being converted.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+generic module AlarmToTimerC(typedef precision_tag) @safe()
+{
+  provides interface Timer<precision_tag>;
+  uses interface Alarm<precision_tag,uint32_t>;
+}
+implementation
+{
+  // there might be ways to save bytes here, but I'll do it in the obviously
+  // right way for now
+  uint32_t m_dt;
+  bool m_oneshot;
+
+  void start(uint32_t t0, uint32_t dt, bool oneshot)
+  {
+    m_dt = dt;
+    m_oneshot = oneshot;
+    call Alarm.startAt(t0, dt);
+  }
+
+  command void Timer.startPeriodic(uint32_t dt)
+  { start(call Alarm.getNow(), dt, FALSE); }
+
+  command void Timer.startOneShot(uint32_t dt)
+  { start(call Alarm.getNow(), dt, TRUE); }
+
+  command void Timer.stop()
+  { call Alarm.stop(); }
+
+  task void fired()
+  { 
+    if(m_oneshot == FALSE)
+      start(call Alarm.getAlarm(), m_dt, FALSE);
+    signal Timer.fired();
+  }
+
+  async event void Alarm.fired()
+  { post fired(); }
+
+  command bool Timer.isRunning()
+  { return call Alarm.isRunning(); }
+
+  command bool Timer.isOneShot()
+  { return m_oneshot; }
+
+  command void Timer.startPeriodicAt(uint32_t t0, uint32_t dt)
+  { start(t0, dt, FALSE); }
+
+  command void Timer.startOneShotAt(uint32_t t0, uint32_t dt)
+  { start(t0, dt, TRUE); }
+
+  command uint32_t Timer.getNow()
+  { return call Alarm.getNow(); }
+
+  command uint32_t Timer.gett0()
+  { return call Alarm.getAlarm() - m_dt; }
+
+  command uint32_t Timer.getdt()
+  { return m_dt; }
+}
+
diff --git a/tos/lib/timer/BusyWait.nc b/tos/lib/timer/BusyWait.nc
new file mode 100644
index 00000000..1e962bef
--- /dev/null
+++ b/tos/lib/timer/BusyWait.nc
@@ -0,0 +1,68 @@
+//$Id: BusyWait.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Timer.h"
+
+/**
+ * BusyWait is a low-level interface intended for busy waiting for short
+ * durations.
+ *
+ * <p>BusyWait is parameterised by its "precision" (milliseconds,
+ * microseconds, etc), identified by a type. This prevents, e.g.,
+ * unintentionally mixing components expecting milliseconds with those
+ * expecting microseconds as those interfaces have a different type.
+ *
+ * <p>BusyWait's second parameter is its "width", i.e., the number of bits
+ * used to represent time values. Width is indicated by including the
+ * appropriate size integer type as a BusyWait parameter.
+ *
+ * <p>See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of this BusyWait
+ *   interface.
+ * @param size_type An integer type representing time values for this 
+ *   BusyWait interface.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+interface BusyWait<precision_tag, size_type>
+{
+  /**
+   * Busy wait for (at least) dt time units. Use sparingly, when the
+   * cost of using an Alarm or Timer would be too high.
+   * @param dt Time to busy wait for.
+   */
+  async command void wait(size_type dt);
+}
+
diff --git a/tos/lib/timer/BusyWaitCounterC.nc b/tos/lib/timer/BusyWaitCounterC.nc
new file mode 100644
index 00000000..f48d2fb1
--- /dev/null
+++ b/tos/lib/timer/BusyWaitCounterC.nc
@@ -0,0 +1,87 @@
+//$Id: BusyWaitCounterC.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Timer.h"
+
+/**
+ * BusyWaitCounterC uses a Counter to implement the BusyWait interface
+ * (block until a specified amount of time elapses). See TEP102 for more
+ * details.
+ *
+ * <p>See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of the BusyWait
+ *   interface.
+ * @param size_type An integer type representing time values for the
+ *   BusyWait interface.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+generic module BusyWaitCounterC(typedef precision_tag, typedef size_type @integer())
+{
+  provides interface BusyWait<precision_tag,size_type>;
+  uses interface Counter<precision_tag,size_type>;
+}
+implementation
+{
+  enum
+  {
+    HALF_MAX_SIZE_TYPE = ((size_type)1) << (8*sizeof(size_type)-1),
+  };
+
+  async command void BusyWait.wait(size_type dt)
+  {
+    atomic
+    {
+      // comparisons are <= to guarantee a wait at least as long as dt
+
+      size_type t0 = call Counter.get();
+
+      if(dt > HALF_MAX_SIZE_TYPE)
+      {
+        dt -= HALF_MAX_SIZE_TYPE;
+        while((call Counter.get() - t0) <= dt);
+        t0 += dt;
+        dt = HALF_MAX_SIZE_TYPE;
+      }
+
+      while((call Counter.get() - t0) <= dt);
+    }
+  }
+
+  async event void Counter.overflow()
+  {
+  }
+}
+
diff --git a/tos/lib/timer/Counter.nc b/tos/lib/timer/Counter.nc
new file mode 100644
index 00000000..a3ca44d2
--- /dev/null
+++ b/tos/lib/timer/Counter.nc
@@ -0,0 +1,84 @@
+//$Id: Counter.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Timer.h"
+
+/**
+ * A Counter counts time in some units and in some width, signaling
+ * overflow.
+ *
+ * <p>A Counter is parameterised by its "precision" (milliseconds,
+ * microseconds, etc), identified by a type. This prevents, e.g.,
+ * unintentionally mixing components expecting milliseconds with those
+ * expecting microseconds as those interfaces have a different type.
+ *
+ * <p>A Counter's second parameter is its "width", i.e., the number of
+ * bits used to represent time values. Width is indicated by including
+ * the appropriate size integer type as a Counter parameter.
+ *
+ * <p>See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of this Counter.
+ * @param size_type An integer type representing time values for this Counter.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+interface Counter<precision_tag, size_type>
+{
+  /** 
+   * Return counter value. Counters start at boot - some time sources may
+   * stop counting while the processor is in low-power mode.
+   * @return Current counter value.
+   */
+  async command size_type get();
+
+  /** 
+   * Return TRUE if an overflow event will occur after the outermost atomic
+   * block is exits.  FALSE otherwise.
+   * @return Counter pending overflow status.
+   */
+  async command bool isOverflowPending();
+
+  /**
+   * Cancel a pending overflow interrupt.
+   */
+  async command void clearOverflow();
+
+  /**
+   * Signals that the current time has overflowed.  That is, the current
+   * time has wrapped around from its maximum value to zero.
+   */ 
+  async event void overflow();
+}
+
diff --git a/tos/lib/timer/CounterToLocalTimeC.nc b/tos/lib/timer/CounterToLocalTimeC.nc
new file mode 100644
index 00000000..36788ea7
--- /dev/null
+++ b/tos/lib/timer/CounterToLocalTimeC.nc
@@ -0,0 +1,62 @@
+//$Id: CounterToLocalTimeC.nc,v 1.6 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Timer.h"
+
+/**
+ * CounterToLocalTimeC converts a 32-bit LocalTime to a Counter.  
+ *
+ * <p>See TEP102 for more details.
+ * @param precision_tag A type indicating the precision of the LocalTime and
+ * Counter being converted.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+generic module CounterToLocalTimeC(typedef precision_tag) @safe()
+{
+  provides interface LocalTime<precision_tag>;
+  uses interface Counter<precision_tag,uint32_t>;
+}
+implementation
+{
+  async command uint32_t LocalTime.get()
+  {
+    return call Counter.get();
+  }
+
+  async event void Counter.overflow()
+  {
+  }
+}
+
diff --git a/tos/lib/timer/LocalTime.nc b/tos/lib/timer/LocalTime.nc
new file mode 100644
index 00000000..8fcd497b
--- /dev/null
+++ b/tos/lib/timer/LocalTime.nc
@@ -0,0 +1,63 @@
+//$Id: LocalTime.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Timer.h"
+
+/**
+ * A LocalTime interface counts time in some units. If you need to detect
+ * time overflow, you should use a component offering the Counter
+ * interface.
+ *
+ * <p>The LocalTime interface is parameterised by its "precision"
+ * (milliseconds, microseconds, etc), identified by a type. This prevents,
+ * e.g., unintentionally mixing components expecting milliseconds with
+ * those expecting microseconds as those interfaces have a different type.
+ *
+ * <p>See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of this Counter.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+interface LocalTime<precision_tag>
+{
+  /** 
+   * Return current time. Time starts counting at boot - some time sources
+   * may stop counting while the processor is in low-power mode.
+   *
+   * @return Current time.
+   */
+  async command uint32_t get();
+}
+
diff --git a/tos/lib/timer/Timer.h b/tos/lib/timer/Timer.h
new file mode 100644
index 00000000..4ac89355
--- /dev/null
+++ b/tos/lib/timer/Timer.h
@@ -0,0 +1,49 @@
+//$Id: Timer.h,v 1.6 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+// The TinyOS Timer structures are discussed in TEP 102.
+#ifndef TIMER_H
+#define TIMER_H
+
+typedef struct { int notUsed; } TMilli;
+typedef struct { int notUsed; } T32khz;
+typedef struct { int notUsed; } TMicro;
+
+#define UQ_TIMER_MILLI "HilTimerMilliC.Timer"
+#define UQ_TIMER_32KHZ "HilTimer32khzC.Timer"
+#define UQ_TIMER_MICRO "HilTimerMicroC.Timer"
+
+#endif
+
diff --git a/tos/lib/timer/Timer.nc b/tos/lib/timer/Timer.nc
new file mode 100644
index 00000000..f699fb96
--- /dev/null
+++ b/tos/lib/timer/Timer.nc
@@ -0,0 +1,153 @@
+//$Id: Timer.nc,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Timer.h"
+
+/**
+ * A Timer is TinyOS's general purpose timing interface. For more precise
+ * timing, you may wish to use a (platform-specific) component offering
+ * an Alarm interface.
+ *
+ * <p>A Timer is parameterised by its "precision" (milliseconds,
+ * microseconds, etc), identified by a type. This prevents, e.g.,
+ * unintentionally mixing components expecting milliseconds with those
+ * expecting microseconds as those interfaces have a different type.
+ *
+ * <p>See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of this Alarm.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+interface Timer<precision_tag>
+{
+  // basic interface 
+  /**
+   * Set a periodic timer to repeat every dt time units. Replaces any
+   * current timer settings. Equivalent to startPeriodicAt(getNow(),
+   * dt). The <code>fired</code> will be signaled every dt units (first
+   * event in dt units).
+   *
+   * @param dt Time until the timer fires.
+   */
+  command void startPeriodic(uint32_t dt);
+
+  /**
+   * Set a single-short timer to some time units in the future. Replaces
+   * any current timer settings. Equivalent to startOneShotAt(getNow(),
+   * dt). The <code>fired</code> will be signaled when the timer expires.
+   *
+   * @param dt Time until the timer fires.
+   */
+  command void startOneShot(uint32_t dt);
+
+  /**
+   * Cancel a timer.
+   */
+  command void stop();
+
+  /**
+   * Signaled when the timer expires (one-shot) or repeats (periodic).
+   */
+  event void fired();
+
+  // extended interface
+  /**
+   * Check if timer is running. Periodic timers run until stopped or
+   * replaced, one-shot timers run until their deadline expires.
+   *
+   * @return TRUE if the timer is still running.
+   */
+  command bool isRunning();
+
+  /**
+   * Check if this is a one-shot timer.
+   * @return TRUE for one-shot timers, FALSE for periodic timers.
+   */
+  command bool isOneShot();
+
+  /**
+   * Set a periodic timer to repeat every dt time units. Replaces any
+   * current timer settings. The <code>fired</code> will be signaled every
+   * dt units (first event at t0+dt units). Periodic timers set in the past
+   * will get a bunch of events in succession, until the timer "catches up".
+   *
+   * <p>Because the current time may wrap around, it is possible to use
+   * values of t0 greater than the <code>getNow</code>'s result. These
+   * values represent times in the past, i.e., the time at which getNow()
+   * would last of returned that value.
+   *
+   * @param t0 Base time for timer.
+   * @param dt Time until the timer fires.
+   */
+  command void startPeriodicAt(uint32_t t0, uint32_t dt);
+
+  /**
+   * Set a single-short timer to time t0+dt. Replaces any current timer
+   * settings. The <code>fired</code> will be signaled when the timer
+   * expires. Timers set in the past will fire "soon".
+   *
+   * <p>Because the current time may wrap around, it is possible to use
+   * values of t0 greater than the <code>getNow</code>'s result. These
+   * values represent times in the past, i.e., the time at which getNow()
+   * would last of returned that value.
+   *
+   * @param t0 Base time for timer.
+   * @param dt Time until the timer fires.
+   */
+  command void startOneShotAt(uint32_t t0, uint32_t dt);
+
+
+  /**
+   * Return the current time.
+   * @return Current time.
+   */
+  command uint32_t getNow();
+
+  /**
+   * Return the time anchor for the previously started timer or the time of
+   * the previous event for periodic timers. The next fired event will occur
+   * at gett0() + getdt().
+   * @return Timer's base time.
+   */
+  command uint32_t gett0();
+
+  /**
+   * Return the delay or period for the previously started timer. The next
+   * fired event will occur at gett0() + getdt().
+   * @return Timer's interval.
+   */
+  command uint32_t getdt();
+}
+
diff --git a/tos/lib/timer/TransformAlarmC.nc b/tos/lib/timer/TransformAlarmC.nc
new file mode 100644
index 00000000..19c75d49
--- /dev/null
+++ b/tos/lib/timer/TransformAlarmC.nc
@@ -0,0 +1,184 @@
+//$Id: TransformAlarmC.nc,v 1.6 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * TransformAlarmC decreases precision and/or widens an Alarm.  An already
+ * widened Counter component is used to help.
+ *
+ * <p>See TEP102 for more details.
+ * @param to_precision_tag A type indicating the precision of the transformed
+ *   Alarm.
+ * @param to_size_type The type for the width of the transformed Alarm.
+ * @param from_precision_tag A type indicating the precision of the original
+ *   Alarm.
+ * @param from_size_type The type for the width of the original Alarm.
+ * @param bit_shift_right Original time units will be 2 to the power 
+ *   <code>bit_shift_right</code> larger than transformed time units.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+generic module TransformAlarmC(
+  typedef to_precision_tag,
+  typedef to_size_type @integer(),
+  typedef from_precision_tag,
+  typedef from_size_type @integer(),
+  uint8_t bit_shift_right) @safe()
+{
+  /**
+   * The transformed Alarm.
+   */
+  provides interface Alarm<to_precision_tag,to_size_type>;
+
+  /**
+   * Users of this component must wire Counter to an already-widened
+   * Counter (with the same precision as the new Alarm). See
+   * TransformCounterC for one possible implementation.
+   */
+  uses interface Counter<to_precision_tag,to_size_type>;
+
+  /**
+   * The original Alarm.
+   */
+  uses interface Alarm<from_precision_tag,from_size_type> as AlarmFrom;
+}
+implementation
+{
+  to_size_type m_t0;
+  to_size_type m_dt;
+
+  enum
+  {
+    MAX_DELAY_LOG2 = 8 * sizeof(from_size_type) - 1 - bit_shift_right,
+    MAX_DELAY = ((to_size_type)1) << MAX_DELAY_LOG2,
+  };
+
+  async command to_size_type Alarm.getNow()
+  {
+    return call Counter.get();
+  }
+
+  async command to_size_type Alarm.getAlarm()
+  {
+    atomic return m_t0 + m_dt;
+    //return m_t0 + m_dt;
+  }
+
+  async command bool Alarm.isRunning()
+  {
+    return call AlarmFrom.isRunning();
+  }
+
+  async command void Alarm.stop()
+  {
+    call AlarmFrom.stop();
+  }
+
+  void set_alarm()
+  {
+    to_size_type now = call Counter.get(), expires, remaining;
+
+    /* m_t0 is assumed to be in the past. If it's > now, we assume
+       that time has wrapped around */
+
+    expires = m_t0 + m_dt;
+
+    /* The cast is necessary to get correct wrap-around arithmetic */
+    remaining = (to_size_type)(expires - now);
+
+    /* if (expires <= now) remaining = 0; in wrap-around arithmetic */
+    if (m_t0 <= now)
+      {
+	if (expires >= m_t0 && // if it wraps, it's > now
+	    expires <= now)
+	  remaining = 0;
+      }
+    else
+      {
+	if (expires >= m_t0 || // didn't wrap so < now
+	    expires <= now)
+	  remaining = 0;
+      }
+    if (remaining > MAX_DELAY)
+      {
+	m_t0 = now + MAX_DELAY;
+	m_dt = remaining - MAX_DELAY;
+	remaining = MAX_DELAY;
+      }
+    else
+      {
+	m_t0 += m_dt;
+	m_dt = 0;
+      }
+    call AlarmFrom.startAt((from_size_type)now << bit_shift_right,
+			   (from_size_type)remaining << bit_shift_right);
+  }
+
+  async command void Alarm.startAt(to_size_type t0, to_size_type dt)
+  {
+    atomic
+    {
+      m_t0 = t0;
+      m_dt = dt;
+      set_alarm();
+    }
+  }
+
+  async command void Alarm.start(to_size_type dt)
+  {
+    call Alarm.startAt(call Alarm.getNow(), dt);
+  }
+
+  async event void AlarmFrom.fired()
+  {
+    atomic
+    {
+      if(m_dt == 0)
+      {
+	signal Alarm.fired();
+      }
+      else
+      {
+	set_alarm();
+      }
+    }
+  }
+
+  async event void Counter.overflow()
+  {
+  }
+
+  default async event void Alarm.fired()
+  {
+  }
+}
diff --git a/tos/lib/timer/TransformAlarmCounterC.nc b/tos/lib/timer/TransformAlarmCounterC.nc
new file mode 100644
index 00000000..10f36ca5
--- /dev/null
+++ b/tos/lib/timer/TransformAlarmCounterC.nc
@@ -0,0 +1,270 @@
+//$Id: TransformAlarmCounterC.nc,v 1.7 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * TransformAlarmCounterC decreases precision and/or widens an Alarm/Counter
+ * pair. This component has a reduced interrupt overhead compared to using
+ * TransformAlarmC and TransformCounterC separately. However, it is not as 
+ * useful for hardware timers with multiple compare registers.
+ *
+ * @param to_precision_tag A type indicating the precision of the transformed
+ *   interfaces.
+ * @param to_size_type The type for the width of the transformed interfaces.
+ * @param from_precision_tag A type indicating the precision of the original
+ *   interfaces.
+ * @param from_size_type The type for the width of the original interfaces.
+ * @param bit_shift_right Original time units will be 2 to the power 
+ *   <code>bit_shift_right</code> larger than transformed time units.
+ * @param upper_count_type A type large enough to store the upper bits --
+ *   those needed above from_size_type after its shift right to fill
+ *   to_size_type.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @author David Gay
+ */
+
+generic module TransformAlarmCounterC(
+  typedef to_precision_tag,
+  typedef to_size_type @integer(),
+  typedef from_precision_tag,
+  typedef from_size_type @integer(),
+  uint8_t bit_shift_right,
+  typedef upper_count_type @integer() )
+{
+  provides interface Alarm<to_precision_tag,to_size_type> as Alarm;
+  provides interface Counter<to_precision_tag,to_size_type> as Counter;
+  uses interface Counter<from_precision_tag,from_size_type> as CounterFrom;
+  uses interface Alarm<from_precision_tag,from_size_type> as AlarmFrom;
+}
+implementation
+{
+  upper_count_type m_upper;
+  to_size_type m_t0;
+  to_size_type m_dt;
+  uint8_t m_skip_overflows;
+
+  enum
+  {
+    MAX_DELAY_LOG2 = 8 * sizeof(from_size_type) - 1 - bit_shift_right,
+    MAX_DELAY = ((to_size_type)1) << MAX_DELAY_LOG2,
+  };
+
+  enum
+  {
+    LOW_SHIFT_RIGHT = bit_shift_right,
+    HIGH_SHIFT_LEFT = 8*sizeof(from_size_type) - LOW_SHIFT_RIGHT,
+    NUM_UPPER_BITS = 8*sizeof(to_size_type) - 8*sizeof(from_size_type) + bit_shift_right,
+    // 1. hack to remove warning when NUM_UPPER_BITS == 8*sizeof(upper_count_type)
+    // 2. still provide warning if NUM_UPPER_BITS > 8*sizeof(upper_count_type)
+    // 3. and allow for the strange case of NUM_UPPER_BITS == 0
+    OVERFLOW_MASK = NUM_UPPER_BITS ? ((((upper_count_type)2) << (NUM_UPPER_BITS-1)) - 1) : 0,
+  };
+
+  void set_alarm();
+
+  async command to_size_type Counter.get()
+  {
+    to_size_type rv = 0;
+    atomic
+    {
+      upper_count_type high = m_upper;
+      from_size_type low = call CounterFrom.get();
+      if (call CounterFrom.isOverflowPending())
+      {
+	// If we signalled CounterFrom.overflow, that might trigger a
+	// Counter.overflow, which breaks atomicity.  The right thing to do
+	// increment a cached version of high without overflow signals.
+	// m_upper will be handled normally as soon as the out-most atomic
+	// block is left unless Clear.clearOverflow is called in the interim.
+	// This is all together the expected behavior.
+	high++;
+	low = call CounterFrom.get();
+      }
+      {
+	to_size_type high_to = high;
+	to_size_type low_to = low >> LOW_SHIFT_RIGHT;
+	rv = (high_to << HIGH_SHIFT_LEFT) | low_to;
+      }
+    }
+    return rv;
+  }
+
+  // isOverflowPending only makes sense when it's already part of a larger
+  // async block, so there's no async inside the command itself, where it
+  // wouldn't do anything useful.
+
+  async command bool Counter.isOverflowPending()
+  {
+    return ((m_upper & OVERFLOW_MASK) == OVERFLOW_MASK)
+	   && call CounterFrom.isOverflowPending();
+  }
+
+  // clearOverflow also only makes sense inside a larger atomic block, but we
+  // include the inner atomic block to ensure consistent internal state just in
+  // case someone calls it non-atomically.
+
+  async command void Counter.clearOverflow()
+  {
+    atomic
+    {
+      if (call Counter.isOverflowPending())
+      {
+	m_upper++;
+	call CounterFrom.clearOverflow();
+      }
+    }
+  }
+
+  async event void CounterFrom.overflow()
+  {
+    atomic
+    {
+      m_upper++;
+      if ((m_upper & OVERFLOW_MASK) == 0)
+	signal Counter.overflow();
+
+      if (m_skip_overflows && !--m_skip_overflows)
+	set_alarm();
+    }
+  }
+
+  async command to_size_type Alarm.getNow()
+  {
+    return call Counter.get();
+  }
+
+  async command to_size_type Alarm.getAlarm()
+  {
+    atomic return m_t0 + m_dt;
+  }
+
+  async command bool Alarm.isRunning()
+  {
+    atomic return call AlarmFrom.isRunning() || m_skip_overflows;
+  }
+
+  async command void Alarm.stop()
+  {
+    call AlarmFrom.stop();
+  }
+
+  void set_alarm()
+  {
+    to_size_type now = call Counter.get(), elapsed = now - m_t0, remaining;
+
+    m_skip_overflows = 0;
+    if (elapsed >= m_dt)
+    {
+      remaining = 0;
+      m_t0 += m_dt;
+      m_dt = 0;
+    }
+    else
+    {
+      remaining = m_dt - elapsed;
+
+      /* MAX_DELAY is 1/2 an underlying counter overflow time. Just count
+	 overflows if the timer is far in the future, and we'll set an
+	 alarm once we're close to the deadline. */
+      if (remaining > MAX_DELAY * 2)
+      {
+	if (remaining >= MAX_DELAY * 2 * (to_size_type)256)
+	  m_skip_overflows = 255;
+	else
+	  m_skip_overflows = remaining / (MAX_DELAY * 2);
+	return;
+      }
+
+      if (remaining > MAX_DELAY)
+      {
+	m_t0 = now + MAX_DELAY;
+	m_dt = remaining - MAX_DELAY;
+	remaining = MAX_DELAY;
+      }
+      else
+      {
+	m_t0 += m_dt;
+	m_dt = 0;
+      }
+    }
+    call AlarmFrom.startAt((from_size_type)now << bit_shift_right,
+			   (from_size_type)remaining << bit_shift_right);
+  }
+
+  async command void Alarm.startAt(to_size_type t0, to_size_type dt)
+  {
+    atomic
+    {
+      m_t0 = t0;
+      m_dt = dt;
+      set_alarm();
+    }
+  }
+
+  async command void Alarm.start(to_size_type dt)
+  {
+    call Alarm.startAt(call Alarm.getNow(), dt);
+  }
+
+  async event void AlarmFrom.fired()
+  {
+    atomic
+    {
+      if (m_dt == 0)
+      {
+	signal Alarm.fired();
+      }
+      else
+      {
+	set_alarm();
+      }
+    }
+  }
+
+  default async event void Alarm.fired()
+  {
+  }
+
+  default async event void Counter.overflow()
+  {
+  }
+}
+
diff --git a/tos/lib/timer/TransformCounterC.nc b/tos/lib/timer/TransformCounterC.nc
new file mode 100644
index 00000000..a743c4dd
--- /dev/null
+++ b/tos/lib/timer/TransformCounterC.nc
@@ -0,0 +1,143 @@
+//$Id: TransformCounterC.nc,v 1.6 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * TransformCounterC decreases precision and/or widens an Counter.
+ *
+ * <p>See TEP102 for more details.
+ *
+ * @param to_precision_tag A type indicating the precision of the transformed
+ *   Counter.
+ * @param to_size_type The type for the width of the transformed Counter.
+ * @param from_precision_tag A type indicating the precision of the original
+ *   Counter.
+ * @param from_size_type The type for the width of the original Counter.
+ * @param bit_shift_right Original time units will be 2 to the power 
+ *   <code>bit_shift_right</code> larger than transformed time units.
+ * @param upper_count_type A type large enough to store the upper bits --
+ *   those needed above from_size_type after its shift right to fill
+ *   to_size_type.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+generic module TransformCounterC(
+  typedef to_precision_tag,
+  typedef to_size_type @integer(),
+  typedef from_precision_tag,
+  typedef from_size_type @integer(),
+  uint8_t bit_shift_right,
+  typedef upper_count_type @integer()) @safe()
+{
+  provides interface Counter<to_precision_tag,to_size_type> as Counter;
+  uses interface Counter<from_precision_tag,from_size_type> as CounterFrom;
+}
+implementation
+{
+  upper_count_type m_upper;
+
+  enum
+  {
+    LOW_SHIFT_RIGHT = bit_shift_right,
+    HIGH_SHIFT_LEFT = 8*sizeof(from_size_type) - LOW_SHIFT_RIGHT,
+    NUM_UPPER_BITS = 8*sizeof(to_size_type) - 8*sizeof(from_size_type) + bit_shift_right,
+    // 1. hack to remove warning when NUM_UPPER_BITS == 8*sizeof(upper_count_type)
+    // 2. still provide warning if NUM_UPPER_BITS > 8*sizeof(upper_count_type)
+    // 3. and allow for the strange case of NUM_UPPER_BITS == 0
+    OVERFLOW_MASK = NUM_UPPER_BITS ? ((((upper_count_type)2) << (NUM_UPPER_BITS-1)) - 1) : 0,
+  };
+
+  async command to_size_type Counter.get()
+  {
+    to_size_type rv = 0;
+    atomic
+    {
+      upper_count_type high = m_upper;
+      from_size_type low = call CounterFrom.get();
+      if (call CounterFrom.isOverflowPending())
+      {
+	// If we signalled CounterFrom.overflow, that might trigger a
+	// Counter.overflow, which breaks atomicity.  The right thing to do
+	// increment a cached version of high without overflow signals.
+	// m_upper will be handled normally as soon as the out-most atomic
+	// block is left unless Clear.clearOverflow is called in the interim.
+	// This is all together the expected behavior.
+	high++;
+	low = call CounterFrom.get();
+      }
+      {
+	to_size_type high_to = high;
+	to_size_type low_to = low >> LOW_SHIFT_RIGHT;
+	rv = (high_to << HIGH_SHIFT_LEFT) | low_to;
+      }
+    }
+    return rv;
+  }
+
+  // isOverflowPending only makes sense when it's already part of a larger
+  // async block, so there's no async inside the command itself, where it
+  // wouldn't do anything useful.
+
+  async command bool Counter.isOverflowPending()
+  {
+    return ((m_upper & OVERFLOW_MASK) == OVERFLOW_MASK)
+	   && call CounterFrom.isOverflowPending();
+  }
+
+  // clearOverflow also only makes sense inside a larger atomic block, but we
+  // include the inner atomic block to ensure consistent internal state just in
+  // case someone calls it non-atomically.
+
+  async command void Counter.clearOverflow()
+  {
+    atomic
+    {
+      if (call Counter.isOverflowPending())
+      {
+	m_upper++;
+	call CounterFrom.clearOverflow();
+      }
+    }
+  }
+
+  async event void CounterFrom.overflow()
+  {
+    atomic
+    {
+      m_upper++;
+      if ((m_upper & OVERFLOW_MASK) == 0)
+	signal Counter.overflow();
+    }
+  }
+}
+
diff --git a/tos/lib/timer/VirtualizeAlarmC.nc b/tos/lib/timer/VirtualizeAlarmC.nc
new file mode 100644
index 00000000..ed25459d
--- /dev/null
+++ b/tos/lib/timer/VirtualizeAlarmC.nc
@@ -0,0 +1,203 @@
+//$Id: VirtualizeAlarmC.nc,v 1.8 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * VirtualizeAlarmC uses a single Alarm to create up to 255 virtual alarms.
+ * Note that a virtualized Alarm will have significantly more overhead than
+ * an Alarm built on a hardware compare register.
+ *
+ * @param precision_tag A type indicating the precision of the Alarm being 
+ *   virtualized.
+ * @param num_alarms Number of virtual alarms to create.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+generic module VirtualizeAlarmC(typedef precision_tag, typedef size_type @integer(), int num_alarms)
+{
+  provides interface Init;
+  provides interface Alarm<precision_tag,size_type> as Alarm[uint8_t id];
+  uses interface Alarm<precision_tag,size_type> as AlarmFrom;
+}
+implementation
+{
+  enum {
+    NUM_ALARMS = num_alarms,
+  };
+
+  typedef struct {
+    size_type t0;
+    size_type dt;
+  } alarm_t;
+
+  // css 26 jul 2006: All computations with respect to the current time ("now")
+  // require that "now" is (non-strictly) monotonically increasing.  Calling
+  // setNextAlarm within Alarm.start within Alarm.fired within signalAlarms
+  // breaks this monotonicity requirements when "now" is cached at the start of
+  // the function.  Two ways around this: 1) refresh "now" each time it is
+  // used, or 2) use the is_signaling flag to prevent setNextAlarm from being
+  // called inside signalAlarms.  The latter is generally more efficient by
+  // preventing redundant calls to setNextAlarm at the expense of an extra byte
+  // of RAM, so that's what the code does now.  Update: option 2 is
+  // unacceptable because an Alarm.start could be called within some other
+  // Alarm.fired, which can break monotonicity in now.
+
+  // A struct of member variables so only one memset is called for init.
+  struct {
+    alarm_t alarm[NUM_ALARMS];
+    bool isset[NUM_ALARMS];
+    bool is_signaling;
+  } m;
+
+  command error_t Init.init() {
+    memset( &m, 0, sizeof(m) );
+    return SUCCESS;
+  }
+
+  void setNextAlarm() {
+    if( !m.is_signaling ) {
+      // css 25 jul 2006: To help prevent various problems with overflow, the
+      // elapsed time from t0 for a particular alarm is calculated as
+      // elapsed=now-t0 then dt-=elapsed and t0=now.  However, this means that
+      // now must be a monotonically increasing value with each call to
+      // setNextAlarm -- overflow in now is okay, but passing in older values of
+      // now=t0 for some arbitrary t0 is not okay, which is what the previous
+      // version of setAlarm did.
+
+      const size_type now = call AlarmFrom.getNow();
+      const alarm_t* pEnd = m.alarm+NUM_ALARMS;
+      bool isset = FALSE;
+      alarm_t* p = m.alarm;
+      bool* pset = m.isset;
+      size_type dt = ((size_type)0)-((size_type)1);
+
+      for( ; p!=pEnd; p++,pset++ ) {
+        if( *pset ) {
+          size_type elapsed = now - p->t0;
+          if( p->dt <= elapsed ) {
+            p->t0 += p->dt;
+            p->dt = 0;
+          }
+          else {
+            p->t0 = now;
+            p->dt -= elapsed;
+          }
+
+          if( p->dt <= dt ) {
+            dt = p->dt;
+            isset = TRUE;
+          }
+        }
+      }
+
+      if( isset ) {
+        // css 25 jul 2006: If dt is big, then wait half of dt.  This helps
+        // significantly reduce the chance of overflow in the elapsed calculation
+        // for the alarm.  "big" is if the most signficant bit in dt is set.
+
+        if( dt & (((size_type)1) << (8*sizeof(size_type)-1)) )
+          dt >>= 1;
+
+        call AlarmFrom.startAt( now, dt );
+      }
+      else {
+        call AlarmFrom.stop();
+      }
+    }
+  }
+  
+  void signalAlarms() {
+    uint8_t id;
+
+    m.is_signaling = TRUE;
+
+    for( id=0; id<NUM_ALARMS; id++ ) {
+      if( m.isset[id] ) {
+        //size_type elapsed = call AlarmFrom.getNow() - m.alarm[id].t0;
+        //if( m.alarm[id].dt <= elapsed ) {
+        size_type t0 = m.alarm[id].t0;
+        size_type elapsed = call AlarmFrom.getNow() - t0;
+        if( m.alarm[id].dt <= elapsed ) {
+          m.isset[id] = FALSE;
+          signal Alarm.fired[id]();
+        }
+      }
+    }
+
+    m.is_signaling = FALSE;
+  }
+
+
+  // basic interface
+  async command void Alarm.start[uint8_t id]( size_type dt ) {
+    call Alarm.startAt[id]( call AlarmFrom.getNow(), dt );
+  }
+
+  async command void Alarm.stop[uint8_t id]() {
+    atomic m.isset[id] = FALSE;
+  }
+
+  async event void AlarmFrom.fired() {
+    atomic {
+      signalAlarms();
+      setNextAlarm();
+    }
+  }
+
+
+  // extended interface
+  async command bool Alarm.isRunning[uint8_t id]() {
+    atomic return m.isset[id];
+  }
+
+  async command void Alarm.startAt[uint8_t id]( size_type t0, size_type dt ) {
+    atomic {
+      m.alarm[id].t0 = t0;
+      m.alarm[id].dt = dt;
+      m.isset[id] = TRUE;
+      setNextAlarm();
+    }
+  }
+
+  async command size_type Alarm.getNow[uint8_t id]() {
+    return call AlarmFrom.getNow();
+  }
+
+  async command size_type Alarm.getAlarm[uint8_t id]() {
+    atomic return m.alarm[id].t0 + m.alarm[id].dt;
+  }
+
+  default async event void Alarm.fired[uint8_t id]() {
+  }
+}
+
diff --git a/tos/lib/timer/VirtualizeTimerC.nc b/tos/lib/timer/VirtualizeTimerC.nc
new file mode 100644
index 00000000..92c05799
--- /dev/null
+++ b/tos/lib/timer/VirtualizeTimerC.nc
@@ -0,0 +1,208 @@
+//$Id: VirtualizeTimerC.nc,v 1.13 2010-06-29 22:07:50 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * VirtualizeTimerC uses a single Timer to create up to 255 virtual timers.
+ *
+ * <p>See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of the Timer being 
+ *   virtualized.
+ * @param max_timers Number of virtual timers to create.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+generic module VirtualizeTimerC(typedef precision_tag, int max_timers) @safe()
+{
+  provides interface Timer<precision_tag> as Timer[uint8_t num];
+  uses interface Timer<precision_tag> as TimerFrom;
+}
+implementation
+{
+  enum
+    {
+      NUM_TIMERS = max_timers,
+      END_OF_LIST = 255,
+    };
+
+  typedef struct
+  {
+    uint32_t t0;
+    uint32_t dt;
+    bool isoneshot : 1;
+    bool isrunning : 1;
+    bool _reserved : 6;
+  } Timer_t;
+
+  Timer_t m_timers[NUM_TIMERS];
+  bool m_timers_changed;
+
+  task void updateFromTimer();
+
+  void fireTimers(uint32_t now)
+  {
+    uint8_t num;
+
+    for (num=0; num<NUM_TIMERS; num++)
+      {
+	Timer_t* timer = &m_timers[num];
+
+	if (timer->isrunning)
+	  {
+	    uint32_t elapsed = now - timer->t0;
+
+	    if (elapsed >= timer->dt)
+	      {
+		if (timer->isoneshot)
+		  timer->isrunning = FALSE;
+		else // Update timer for next event
+		  timer->t0 += timer->dt;
+
+		signal Timer.fired[num]();
+    break;
+	      }
+	  }
+      }
+    post updateFromTimer();
+  }
+  
+  task void updateFromTimer()
+  {
+    /* This code supports a maximum dt of MAXINT. If min_remaining and
+       remaining were switched to uint32_t, and the logic changed a
+       little, dt's up to 2^32-1 should work (but at a slightly higher
+       runtime cost). */
+    uint32_t now = call TimerFrom.getNow();
+    int32_t min_remaining = (1UL << 31) - 1; /* max int32_t */
+    bool min_remaining_isset = FALSE;
+    uint8_t num;
+
+    call TimerFrom.stop();
+
+    for (num=0; num<NUM_TIMERS; num++)
+      {
+	Timer_t* timer = &m_timers[num];
+
+	if (timer->isrunning)
+	  {
+	    uint32_t elapsed = now - timer->t0;
+	    int32_t remaining = timer->dt - elapsed;
+
+	    if (remaining < min_remaining)
+	      {
+		min_remaining = remaining;
+		min_remaining_isset = TRUE;
+	      }
+	  }
+      }
+
+    if (min_remaining_isset)
+      {
+	if (min_remaining <= 0)
+	  fireTimers(now);
+	else
+	  call TimerFrom.startOneShotAt(now, min_remaining);
+      }
+  }
+  
+  event void TimerFrom.fired()
+  {
+    fireTimers(call TimerFrom.getNow());
+  }
+
+  void startTimer(uint8_t num, uint32_t t0, uint32_t dt, bool isoneshot)
+  {
+    Timer_t* timer = &m_timers[num];
+    timer->t0 = t0;
+    timer->dt = dt;
+    timer->isoneshot = isoneshot;
+    timer->isrunning = TRUE;
+    post updateFromTimer();
+  }
+
+  command void Timer.startPeriodic[uint8_t num](uint32_t dt)
+  {
+    startTimer(num, call TimerFrom.getNow(), dt, FALSE);
+  }
+
+  command void Timer.startOneShot[uint8_t num](uint32_t dt)
+  {
+    startTimer(num, call TimerFrom.getNow(), dt, TRUE);
+  }
+
+  command void Timer.stop[uint8_t num]()
+  {
+    m_timers[num].isrunning = FALSE;
+  }
+
+  command bool Timer.isRunning[uint8_t num]()
+  {
+    return m_timers[num].isrunning;
+  }
+
+  command bool Timer.isOneShot[uint8_t num]()
+  {
+    return m_timers[num].isoneshot;
+  }
+
+  command void Timer.startPeriodicAt[uint8_t num](uint32_t t0, uint32_t dt)
+  {
+    startTimer(num, t0, dt, FALSE);
+  }
+
+  command void Timer.startOneShotAt[uint8_t num](uint32_t t0, uint32_t dt)
+  {
+    startTimer(num, t0, dt, TRUE);
+  }
+
+  command uint32_t Timer.getNow[uint8_t num]()
+  {
+    return call TimerFrom.getNow();
+  }
+
+  command uint32_t Timer.gett0[uint8_t num]()
+  {
+    return m_timers[num].t0;
+  }
+
+  command uint32_t Timer.getdt[uint8_t num]()
+  {
+    return m_timers[num].dt;
+  }
+
+  default event void Timer.fired[uint8_t num]()
+  {
+  }
+}
+
diff --git a/tos/lib/tosboot/Exec.nc b/tos/lib/tosboot/Exec.nc
new file mode 100644
index 00000000..3d42c0d9
--- /dev/null
+++ b/tos/lib/tosboot/Exec.nc
@@ -0,0 +1,4 @@
+
+interface Exec {
+  command void exec();
+}
diff --git a/tos/lib/tosboot/ExtFlash.nc b/tos/lib/tosboot/ExtFlash.nc
new file mode 100644
index 00000000..c8cc919d
--- /dev/null
+++ b/tos/lib/tosboot/ExtFlash.nc
@@ -0,0 +1,46 @@
+// $Id: ExtFlash.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+interface ExtFlash {
+  command void startRead(uint32_t addr);
+  command uint8_t  readByte();
+  command void stopRead();
+}
diff --git a/tos/lib/tosboot/Hardware.nc b/tos/lib/tosboot/Hardware.nc
new file mode 100644
index 00000000..e3f42de2
--- /dev/null
+++ b/tos/lib/tosboot/Hardware.nc
@@ -0,0 +1,45 @@
+// $Id: Hardware.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+interface Hardware {
+  command void init();
+  command void reboot();
+}
diff --git a/tos/lib/tosboot/Leds.nc b/tos/lib/tosboot/Leds.nc
new file mode 100644
index 00000000..39ee52ac
--- /dev/null
+++ b/tos/lib/tosboot/Leds.nc
@@ -0,0 +1,46 @@
+// $Id: Leds.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+interface Leds {
+  command void set(uint8_t ledsOn);
+  command void flash(uint8_t a);
+  command void glow(uint8_t a, uint8_t b);
+}
diff --git a/tos/lib/tosboot/Makefile b/tos/lib/tosboot/Makefile
new file mode 100644
index 00000000..680fa721
--- /dev/null
+++ b/tos/lib/tosboot/Makefile
@@ -0,0 +1,113 @@
+# $Id: Makefile,v 1.8 2010-06-29 22:07:50 scipio Exp $
+
+#
+#
+#
+# Copyright (c) 2000-2005 The Regents of the University  of California.
+# All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#
+
+#
+# @author Jonathan Hui <jwhui@cs.berkeley.edu>
+#
+
+COMPONENT=TosBootC
+TINYOS_NP=
+
+PFLAGS += -DNESC_BUILD_BINARY
+
+# ifeq ($(MAKECMDGOALS),mica2)
+#   CFLAGS += -DTOSBOOT_START=0x1f000 -DTOSBOOT_END=0x20000
+#   CFLAGS += -Wl,--section-start=.text=0x1f000
+#   CFLAGS += -Iat45db -Iavr -Imica2 -Ilib
+# endif
+
+# ifeq ($(MAKECMDGOALS),mica2dot)
+#   CFLAGS += -DTOSBOOT_START=0x1f000 -DTOSBOOT_END=0x20000
+#   CFLAGS += -Wl,--section-start=.text=0x1f000
+#   CFLAGS += -Iat45db -Iavr -Imica2dot -Ilib
+# endif
+
+ifeq ($(MAKECMDGOALS),micaz)
+  CFLAGS += -DTOSBOOT_START=0x1f000 -DTOSBOOT_END=0x20000
+  CFLAGS += -Wl,--section-start=.text=0x1f000
+  CFLAGS += -Iat45db -Iavr -Imicaz -Ilib
+  CFLAGS += -I../net/Deluge
+endif
+
+ifeq ($(MAKECMDGOALS),iris)
+  CFLAGS += -DTOSBOOT_START=0x1f000 -DTOSBOOT_END=0x20000
+  CFLAGS += -Wl,--section-start=.text=0x1f000
+  CFLAGS += -Iiris -Iat45db -Iavr -Imicaz -Ilib
+  CFLAGS += -I../net/Deluge
+endif
+
+# ifeq ($(MAKECMDGOALS),telosa)
+#   CFLAGS += -DTOSBOOT_START=0x1100 -DTOSBOOT_END=0x1a00
+#   CFLAGS += -Iat45db -Imsp430 -Itelos -Ilib
+#   POST_BUILD_EXTRA_DEPS += strip_iv
+# endif
+
+ifeq ($(MAKECMDGOALS),telosb)
+  CFLAGS += -DTOSBOOT_START=0x4000 -DTOSBOOT_END=0x4a00
+  CFLAGS += -Imsp430 -Imsp430f1611 -Istm25p -Itelosb -Ilib
+  CFLAGS += -I../net/Deluge
+  POST_BUILD_EXTRA_DEPS += strip_iv
+endif
+
+ifeq ($(MAKECMDGOALS),epic)
+  CFLAGS += -DTOSBOOT_START=0x4000 -DTOSBOOT_END=0x4a00
+  CFLAGS += -Imsp430 -Imsp430f1611 -Iepic -Ilib
+  CFLAGS += -I../net/Deluge
+  POST_BUILD_EXTRA_DEPS += strip_iv
+endif
+
+ifeq ($(MAKECMDGOALS),mulle)
+  CFLAGS += -DTOSBOOT_START=0xe0000 -DTOSBOOT_END=0xeffff
+  CFLAGS += -Iat45db -Imulle -Im16c62p -Ilib
+  CFLAGS += -I../net/Deluge -I../net/Deluge/extra/mulle
+  CFLAGS += -I../net/Deluge/extra/m16c62p
+endif
+
+ifeq ($(MAKECMDGOALS),tinynode)
+  CFLAGS += -DTOSBOOT_START=0x4000 -DTOSBOOT_END=0x4a00
+  CFLAGS += -Itinynode -Imsp430 -Imsp430f1611 -Iat45db -Ilib
+  CFLAGS += -I../net/Deluge
+  POST_BUILD_EXTRA_DEPS += strip_iv 
+endif
+
+
+
+strip_iv: FORCE
+	@echo "    removing interrupt vector from binary"
+	msp430-objcopy -j .text -j .data -O ihex $(BUILDDIR)/main.exe $(BUILDDIR)/main.ihex
+
+include $(MAKERULES)
diff --git a/tos/lib/tosboot/ProgFlash.nc b/tos/lib/tosboot/ProgFlash.nc
new file mode 100644
index 00000000..dd44c805
--- /dev/null
+++ b/tos/lib/tosboot/ProgFlash.nc
@@ -0,0 +1,44 @@
+// $Id: ProgFlash.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+interface ProgFlash {
+  command error_t write(in_flash_addr_t addr, uint8_t* buf, in_flash_addr_t len);
+}
diff --git a/tos/lib/tosboot/TosBoot.h b/tos/lib/tosboot/TosBoot.h
new file mode 100644
index 00000000..39c18c17
--- /dev/null
+++ b/tos/lib/tosboot/TosBoot.h
@@ -0,0 +1,44 @@
+// $Id: TosBoot.h,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author  Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __TOSBOOT_H__
+#define __TOSBOOT_H__
+
+#include "TOSBoot_platform.h"
+
+#endif
diff --git a/tos/lib/tosboot/TosBootC.nc b/tos/lib/tosboot/TosBootC.nc
new file mode 100644
index 00000000..ebbd862b
--- /dev/null
+++ b/tos/lib/tosboot/TosBootC.nc
@@ -0,0 +1,73 @@
+// $Id: TosBootC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#include <Deluge.h>
+#include <DelugePageTransfer.h>
+#include "TosBoot.h"
+
+configuration TosBootC {
+}
+implementation {
+
+  components
+    TosBootP,
+    ExecC,
+    ExtFlashC,
+    HardwareC,
+    InternalFlashC as IntFlash,
+    LedsC,
+    PluginC,
+    ProgFlashC as ProgFlash,
+    VoltageC;
+
+  TosBootP.SubInit -> ExtFlashC;
+  TosBootP.SubControl -> ExtFlashC.StdControl;
+  TosBootP.SubControl -> PluginC;
+
+  TosBootP.Exec -> ExecC;
+  TosBootP.ExtFlash -> ExtFlashC;
+  TosBootP.Hardware -> HardwareC;
+  TosBootP.IntFlash -> IntFlash;
+  TosBootP.Leds -> LedsC;
+  TosBootP.ProgFlash -> ProgFlash;
+  TosBootP.Voltage -> VoltageC;
+
+}
diff --git a/tos/lib/tosboot/TosBootP.nc b/tos/lib/tosboot/TosBootP.nc
new file mode 100644
index 00000000..ddaf0aee
--- /dev/null
+++ b/tos/lib/tosboot/TosBootP.nc
@@ -0,0 +1,290 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+#include "crc.h"
+#include <hardware.h>
+
+module TosBootP {
+  uses {
+    interface Exec;
+    interface ExtFlash;
+    interface Hardware;
+    interface InternalFlash as IntFlash;
+    interface Leds;
+    interface ProgFlash;
+    interface StdControl as SubControl;
+    interface Init as SubInit;
+    interface Voltage;
+  }
+}
+implementation {
+
+  enum {
+    LEDS_LOWBATT = 1,
+    LEDS_GESTURE = 7,
+  };
+
+  enum {
+    R_SUCCESS,
+    R_INVALID_IMAGE_ERROR,
+    R_PROGRAMMING_ERROR,
+  };
+
+  void startupLeds() {
+
+    uint8_t  output = 0x7;
+    uint8_t  i;
+
+    for (i = 3; i; i--, output >>= 1 )
+      call Leds.glow(output, output >> 1);
+
+  }
+
+  in_flash_addr_t extFlashReadAddr() {
+    in_flash_addr_t result = 0;
+    int8_t  i;
+    for ( i = 3; i >= 0; i-- )
+      result |= ((in_flash_addr_t)call ExtFlash.readByte() & 0xff) << (i*8);
+    return result;
+  }
+
+  bool verifyBlock(ex_flash_addr_t crcAddr, ex_flash_addr_t startAddr, uint16_t len)
+  {
+    uint16_t crcTarget, crcTmp;
+
+    // read crc
+    call ExtFlash.startRead(crcAddr);
+    crcTarget = (uint16_t)(call ExtFlash.readByte() & 0xff) << 8;
+    crcTarget |= (uint16_t)(call ExtFlash.readByte() & 0xff);
+    call ExtFlash.stopRead();
+
+    // compute crc
+    call ExtFlash.startRead(startAddr);
+    for ( crcTmp = 0; len; len-- )
+      crcTmp = crcByte(crcTmp, call ExtFlash.readByte());
+    call ExtFlash.stopRead();
+
+    return crcTarget == crcTmp;
+  }
+
+  bool verifyImage(ex_flash_addr_t startAddr) {
+    uint32_t addr;
+    uint8_t  numPgs;
+    uint8_t  i;
+
+
+    if (!verifyBlock(startAddr + offsetof(DelugeIdent,crc),
+		     startAddr, offsetof(DelugeIdent,crc)))
+      return FALSE;
+
+    // read size of image
+    call ExtFlash.startRead(startAddr + offsetof(DelugeIdent,numPgs));
+    numPgs = call ExtFlash.readByte();
+    call ExtFlash.stopRead();
+
+    if (numPgs == 0 || numPgs == 0xff)
+      return FALSE;
+
+    startAddr += DELUGE_IDENT_SIZE;
+    addr = DELUGE_CRC_BLOCK_SIZE;
+
+    for ( i = 0; i < numPgs; i++ ) {
+      if (!verifyBlock(startAddr + i*sizeof(uint16_t),
+		       startAddr + addr, DELUGE_BYTES_PER_PAGE)) {
+	return FALSE;
+      }
+      addr += DELUGE_BYTES_PER_PAGE;
+    }
+
+    return TRUE;
+  }
+
+  error_t programImage(ex_flash_addr_t startAddr) {
+    uint8_t  buf[TOSBOOT_INT_PAGE_SIZE];
+    uint32_t pageAddr, newPageAddr;
+    in_flash_addr_t intAddr;
+    in_flash_addr_t secLength;
+    ex_flash_addr_t curAddr;
+
+    if (!verifyImage(startAddr))
+      return R_INVALID_IMAGE_ERROR;
+
+    curAddr = startAddr + DELUGE_IDENT_SIZE + DELUGE_CRC_BLOCK_SIZE;
+
+    call ExtFlash.startRead(curAddr);
+
+    intAddr = extFlashReadAddr();
+    secLength = extFlashReadAddr();
+    curAddr = curAddr + 8;
+
+#if defined(PLATFORM_TELOSB) || defined (PLATFORM_EPIC) || defined (PLATFORM_TINYNODE)
+    if (intAddr != TOSBOOT_END) {
+#elif defined(PLATFORM_MICAZ) || defined(PLATFORM_IRIS)
+    if (intAddr != 0) {
+#elif defined(PLATFORM_MULLE)
+    if (intAddr != 0xA0000) {
+#else
+  #error "Target platform is not currently supported by Deluge T2"
+#endif
+      call ExtFlash.stopRead();
+      return R_INVALID_IMAGE_ERROR;
+    }
+
+    call ExtFlash.stopRead();
+
+    while ( secLength ) {
+
+      pageAddr = newPageAddr = intAddr / TOSBOOT_INT_PAGE_SIZE;
+
+      call ExtFlash.startRead(curAddr);
+      // fill in ram buffer for internal program flash sector
+      do {
+
+	// check if secLength is all ones
+	if ( secLength == 0xffffffff ) {
+	  call ExtFlash.stopRead();
+	  return FAIL;
+	}
+
+	buf[(uint16_t)intAddr % TOSBOOT_INT_PAGE_SIZE] = call ExtFlash.readByte();
+	intAddr++; curAddr++;
+
+	if ( --secLength == 0 ) {
+	  intAddr = extFlashReadAddr();
+	  secLength = extFlashReadAddr();
+	  curAddr = curAddr + 8;
+	}
+
+	newPageAddr = intAddr / TOSBOOT_INT_PAGE_SIZE;
+
+      } while ( pageAddr == newPageAddr && secLength );
+      call ExtFlash.stopRead();
+
+      call Leds.set(pageAddr);
+
+      // write out page
+      if (call ProgFlash.write(pageAddr*TOSBOOT_INT_PAGE_SIZE, buf,
+			       TOSBOOT_INT_PAGE_SIZE) == FAIL) {
+	return R_PROGRAMMING_ERROR;
+      }
+    }
+
+    return R_SUCCESS;
+
+  }
+
+  void runApp() {
+    call SubControl.stop();
+    call Exec.exec();
+  }
+
+  void startupSequence() {
+
+    BootArgs args;
+
+    // check voltage and make sure flash can be programmed
+    //   if not, just run the app, can't check for gestures
+    //   if we can't write to the internal flash anyway
+    if ( !call Voltage.okToProgram() ) {
+      // give user some time and count down LEDs
+      call Leds.flash(LEDS_LOWBATT);
+      startupLeds();
+      runApp();
+    }
+
+    // get current value of counter
+    call IntFlash.read((uint8_t*)TOSBOOT_ARGS_ADDR, &args, sizeof(args));
+
+    // increment gesture counter, see if it exceeds threshold
+    if ( ++args.gestureCount >= TOSBOOT_GESTURE_MAX_COUNT - 1 ) {
+      // gesture has been detected, display receipt of gesture on LEDs
+      call Leds.flash(LEDS_GESTURE);
+
+      // load golden image from flash
+      // if the golden image is invalid, forget about reprogramming
+      // if an error happened during reprogramming, reboot and try again
+      //   not much else we can do :-/
+      if (programImage(TOSBOOT_GOLDEN_IMG_ADDR) == R_PROGRAMMING_ERROR) {
+	call Hardware.reboot();
+      }
+    }
+    else {
+      // update gesture counter
+      call IntFlash.write((uint8_t*)TOSBOOT_ARGS_ADDR, &args, sizeof(args));
+      if ( !args.noReprogram ) {
+	// if an error happened during reprogramming, reboot and try again
+	//   after two tries, try programming the golden image
+	if (programImage(args.imageAddr) == R_PROGRAMMING_ERROR) {
+	  call Hardware.reboot();
+	}
+      }
+    }
+
+    // give user some time and count down LEDs
+    startupLeds();
+
+    // reset counter and reprogramming flag
+    args.gestureCount = 0xff;
+    args.noReprogram = TRUE;
+    call IntFlash.write((uint8_t*)TOSBOOT_ARGS_ADDR, &args, sizeof(args));
+
+    runApp();
+
+  }
+
+  int main() @C() @spontaneous() {
+
+    __nesc_disable_interrupt();
+
+    TOSH_SET_PIN_DIRECTIONS();
+    call Hardware.init();
+
+    call SubInit.init();
+    call SubControl.start();
+
+    startupSequence();
+
+    return 0;
+
+  }
+
+}
diff --git a/tos/lib/tosboot/Voltage.nc b/tos/lib/tosboot/Voltage.nc
new file mode 100644
index 00000000..de9fc049
--- /dev/null
+++ b/tos/lib/tosboot/Voltage.nc
@@ -0,0 +1,44 @@
+// $Id: Voltage.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+interface Voltage {
+  command bool okToProgram();
+}
diff --git a/tos/lib/tosboot/at45db/ExtFlashC.nc b/tos/lib/tosboot/at45db/ExtFlashC.nc
new file mode 100644
index 00000000..b89ccd87
--- /dev/null
+++ b/tos/lib/tosboot/at45db/ExtFlashC.nc
@@ -0,0 +1,148 @@
+// $Id: ExtFlashC.nc,v 1.4 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module ExtFlashC {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface ExtFlash;
+  }
+}
+
+implementation {
+
+  uint32_t addr;
+
+  command error_t Init.init() {
+    TOSH_MAKE_FLASH_CS_OUTPUT();
+    TOSH_SET_FLASH_CS_PIN();
+    TOSH_MAKE_FLASH_CLK_OUTPUT();
+    TOSH_CLR_FLASH_CLK_PIN();
+    TOSH_MAKE_FLASH_OUT_OUTPUT();      
+    TOSH_SET_FLASH_OUT_PIN();
+    TOSH_MAKE_FLASH_IN_INPUT();
+    TOSH_CLR_FLASH_IN_PIN();
+    return SUCCESS; 
+  }
+
+  command error_t StdControl.start() { return SUCCESS; }
+  command error_t StdControl.stop() { return SUCCESS; }
+
+  uint8_t SPIByte(uint8_t out) {
+
+    uint8_t in = 0;
+    uint8_t i;
+
+    for ( i = 0; i < 8; i++, out <<= 1 ) {
+
+      // write bit
+      if (out & 0x80)
+	TOSH_SET_FLASH_OUT_PIN();
+      else
+	TOSH_CLR_FLASH_OUT_PIN();
+
+      // clock
+      TOSH_SET_FLASH_CLK_PIN();
+
+      // read bit
+      in <<= 1;
+      if (TOSH_READ_FLASH_IN_PIN())
+	in |= 1;
+
+      // clock
+      TOSH_CLR_FLASH_CLK_PIN();
+
+    }
+
+    return in;
+
+  }
+
+  command void ExtFlash.startRead(uint32_t newAddr) {
+
+    uint8_t  cmdBuf[4];
+    uint8_t  i;
+
+    addr = newAddr;
+
+#if defined(PLATFORM_MULLE)
+    cmdBuf[0] = 0x68;
+    cmdBuf[1] = (addr >> 15);
+    cmdBuf[2] = ((addr >> 7) & 0xFC) + ((addr >> 8) & 0x1);
+    cmdBuf[3] = addr & 0xff;
+#else
+    cmdBuf[0] = 0x68;
+    cmdBuf[1] = (addr >> 15) & 0xff;
+    cmdBuf[2] = (addr >> 7) & 0xfe;
+    cmdBuf[3] = addr & 0xff;
+#endif
+    
+    TOSH_CLR_FLASH_CLK_PIN();
+    TOSH_CLR_FLASH_CS_PIN();
+    
+    for(i = 0; i < 4; i++)
+      SPIByte(cmdBuf[i]);
+    for(i = 0; i < 4; i++)
+      SPIByte(0x0);
+    
+    TOSH_SET_FLASH_CLK_PIN();
+    TOSH_CLR_FLASH_CLK_PIN();
+
+  }
+
+  command uint8_t ExtFlash.readByte() {
+#if defined(PLATFORM_MULLE)
+    if (!(addr & 0x1ff)) {
+#else
+    if (!(addr & 0xff)) {
+#endif
+      call ExtFlash.stopRead();
+      call ExtFlash.startRead(addr);
+    }
+    addr++;
+    return SPIByte(0);
+  }
+
+  command void ExtFlash.stopRead() {
+    TOSH_SET_FLASH_CS_PIN();
+  }
+
+}
diff --git a/tos/lib/tosboot/avr/HardwareC.nc b/tos/lib/tosboot/avr/HardwareC.nc
new file mode 100644
index 00000000..bdaa6b6f
--- /dev/null
+++ b/tos/lib/tosboot/avr/HardwareC.nc
@@ -0,0 +1,57 @@
+// $Id: HardwareC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module HardwareC {
+  provides {
+    interface Hardware;
+  }
+}
+
+implementation {
+
+  command void Hardware.init() {}
+  
+  command void Hardware.reboot() {
+    wdt_enable(1);
+    while(1);
+  }
+
+}
diff --git a/tos/lib/tosboot/avr/InternalFlashC.nc b/tos/lib/tosboot/avr/InternalFlashC.nc
new file mode 100644
index 00000000..232df7f4
--- /dev/null
+++ b/tos/lib/tosboot/avr/InternalFlashC.nc
@@ -0,0 +1,76 @@
+// $Id: InternalFlashC.nc,v 1.4 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#include <InternalFlash.h>
+
+module InternalFlashC {
+  provides interface InternalFlash;
+}
+
+implementation {
+
+  command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) {
+
+    uint8_t *addrPtr = (uint8_t*)addr;
+    uint8_t *bufPtr = (uint8_t*)buf;
+
+    for ( ; size; size-- )
+      eeprom_write_byte(addrPtr++, *bufPtr++);
+
+    while(!eeprom_is_ready());
+
+    return SUCCESS;
+
+  }
+
+  command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) {
+
+    uint8_t *addrPtr = (uint8_t*)addr;
+    uint8_t *bufPtr = (uint8_t*)buf;
+
+    for ( ; size; size-- )
+      *bufPtr++ = eeprom_read_byte(addrPtr++);
+
+    return SUCCESS;
+
+  }
+
+}
diff --git a/tos/lib/tosboot/avr/ProgFlashC.nc b/tos/lib/tosboot/avr/ProgFlashC.nc
new file mode 100644
index 00000000..303aa4b6
--- /dev/null
+++ b/tos/lib/tosboot/avr/ProgFlashC.nc
@@ -0,0 +1,76 @@
+// $Id: ProgFlashC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module ProgFlashC {
+  provides {
+    interface ProgFlash;
+  }
+}
+
+implementation {
+
+#include <avr/boot.h>
+
+  command error_t ProgFlash.write(in_flash_addr_t addr, uint8_t* buf, in_flash_addr_t len) {
+
+    uint16_t* wordBuf = (uint16_t*)buf;
+    uint32_t i;
+
+    if ( addr + len > TOSBOOT_START )
+      return FAIL;    
+
+    boot_page_erase_safe( addr );
+    while( boot_rww_busy() )
+      boot_rww_enable_safe();
+    
+    for ( i = 0; i < len; i += 2 )
+      boot_page_fill_safe( addr + i, *wordBuf++ );
+
+    boot_page_write_safe( addr );
+    
+    while ( boot_rww_busy() )
+      boot_rww_enable_safe();
+    
+    return SUCCESS;
+    
+  }
+
+}
diff --git a/tos/lib/tosboot/crc.h b/tos/lib/tosboot/crc.h
new file mode 100644
index 00000000..1b520aa9
--- /dev/null
+++ b/tos/lib/tosboot/crc.h
@@ -0,0 +1,67 @@
+// $Id: crc.h,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Default CRC function. Note that avrmote has a much more efficient one. 
+ *
+ * This CRC-16 function produces a 16-bit running CRC that adheres to the
+ * ITU-T CRC standard.
+ *
+ * The ITU-T polynomial is: G_16(x) = x^16 + x^12 + x^5 + 1
+ *
+ */
+
+uint16_t crcByte(uint16_t crc, uint8_t b)
+{
+  uint8_t i;
+  
+  crc = crc ^ b << 8;
+  i = 8;
+  do
+    if (crc & 0x8000)
+      crc = crc << 1 ^ 0x1021;
+    else
+      crc = crc << 1;
+  while (--i);
+
+  return crc;
+}
diff --git a/tos/lib/tosboot/epic/ExtFlashC.nc b/tos/lib/tosboot/epic/ExtFlashC.nc
new file mode 100644
index 00000000..cf2fe224
--- /dev/null
+++ b/tos/lib/tosboot/epic/ExtFlashC.nc
@@ -0,0 +1,62 @@
+// $Id: ExtFlashC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+configuration ExtFlashC {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface ExtFlash;
+  }
+}
+
+implementation {
+
+  components 
+    ExtFlashP,
+    HplUsart0C;
+
+  Init = ExtFlashP;
+  StdControl = ExtFlashP;
+  ExtFlash = ExtFlashP;
+
+  ExtFlashP.UsartControl -> HplUsart0C;
+
+}
diff --git a/tos/lib/tosboot/epic/ExtFlashP.nc b/tos/lib/tosboot/epic/ExtFlashP.nc
new file mode 100644
index 00000000..89792bd5
--- /dev/null
+++ b/tos/lib/tosboot/epic/ExtFlashP.nc
@@ -0,0 +1,109 @@
+// $Id: ExtFlashP.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+
+module ExtFlashP {
+  provides {
+    interface StdControl;
+    interface Init;
+    interface ExtFlash;
+  }
+  uses {
+    interface HplUsartControl as UsartControl;
+  }
+}
+
+implementation {
+
+  uint32_t addr;
+
+  command error_t Init.init() {
+    TOSH_MAKE_FLASH_CS_OUTPUT();
+    TOSH_SET_FLASH_CS_PIN();
+    call UsartControl.setModeSPI();
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start() { 
+    return SUCCESS; 
+  }
+
+  command error_t StdControl.stop() { 
+    call UsartControl.disableSPI();
+    return SUCCESS; 
+  }
+
+  command void ExtFlash.startRead(uint32_t newAddr) {
+
+    uint8_t cmd[4];
+    uint8_t i;
+    uint32_t page = newAddr / 512;
+    uint32_t offset = newAddr % 512;
+
+    addr = newAddr;
+
+    cmd[0] = 0x03;
+    cmd[1] = page >> 6;
+    cmd[2] = (page << 2) | (offset >> 8);
+    cmd[3] = offset;
+
+    TOSH_CLR_FLASH_CS_PIN();
+
+    for ( i = 0; i < sizeof(cmd); i++ ) {
+      call UsartControl.tx(cmd[i]);
+      while(call UsartControl.isTxEmpty() != SUCCESS);
+    }
+  }
+
+  command uint8_t ExtFlash.readByte() {
+    if (!(addr & 0x1ff)) {
+      call ExtFlash.stopRead();
+      call ExtFlash.startRead(addr);
+    }
+    addr++;
+    call UsartControl.rx();
+    call UsartControl.tx(0);
+    while(call UsartControl.isRxIntrPending() != SUCCESS);
+    return call UsartControl.rx();
+  }
+
+  command void ExtFlash.stopRead() {
+    TOSH_SET_FLASH_CS_PIN();
+  }
+
+}
diff --git a/tos/lib/tosboot/epic/hardware.h b/tos/lib/tosboot/epic/hardware.h
new file mode 100644
index 00000000..2ffde573
--- /dev/null
+++ b/tos/lib/tosboot/epic/hardware.h
@@ -0,0 +1,97 @@
+// $Id: hardware.h,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __HARDWARE_H__
+#define __HARDWARE_H__
+
+#include "msp430hardware.h"
+
+// internal flash is 16 bits in width
+typedef uint16_t in_flash_addr_t;
+// external flash is 32 bits in width
+typedef uint32_t ex_flash_addr_t;
+
+void wait(uint16_t t) {
+  for ( ; t > 0; t-- );
+}
+
+// LEDs
+TOSH_ASSIGN_PIN(RED_LED, 4, 0);
+TOSH_ASSIGN_PIN(GREEN_LED, 4, 3);
+TOSH_ASSIGN_PIN(YELLOW_LED, 4, 7);
+
+// UART pins
+TOSH_ASSIGN_PIN(SOMI0, 3, 2);
+TOSH_ASSIGN_PIN(SIMO0, 3, 1);
+TOSH_ASSIGN_PIN(UCLK0, 3, 3);
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+
+// User Interupt Pin
+TOSH_ASSIGN_PIN(USERINT, 2, 7);
+
+// FLASH
+TOSH_ASSIGN_PIN(FLASH_CS, 4, 4);
+
+void TOSH_SET_PIN_DIRECTIONS(void)
+{
+  P3SEL = 0x0E; // set SPI and I2C to mod func
+  
+  P1DIR = 0xe0;
+  P1OUT = 0x00;
+  
+  P2DIR = 0x7b;
+  P2OUT = 0x10;
+  
+  P3DIR = 0xf1;
+  P3OUT = 0x00;
+  
+  P4DIR = 0xfd;
+  P4OUT = 0xdd;
+  
+  P5DIR = 0xff;
+  P5OUT = 0xff;
+  
+  P6DIR = 0xff;
+  P6OUT = 0x00;
+}
+
+#endif
diff --git a/tos/lib/tosboot/iris/HardwareC.nc b/tos/lib/tosboot/iris/HardwareC.nc
new file mode 100644
index 00000000..05d1599f
--- /dev/null
+++ b/tos/lib/tosboot/iris/HardwareC.nc
@@ -0,0 +1,99 @@
+// $Id: HardwareC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <avr/wdt.h>
+
+module HardwareC {
+  provides {
+    interface Hardware;
+  }
+}
+
+implementation {
+
+  command void Hardware.init() {
+    // disable watchdog (if accidentally left on)
+    MCUSR = 0;
+    wdt_disable();
+  }
+
+  command void Hardware.reboot() {
+    // enable watchdog
+    wdt_enable(WDTO_1S);
+    // enter infinite loop
+    while(1);
+  }
+
+}
diff --git a/tos/lib/tosboot/iris/ProgFlashC.nc b/tos/lib/tosboot/iris/ProgFlashC.nc
new file mode 100644
index 00000000..b4a88947
--- /dev/null
+++ b/tos/lib/tosboot/iris/ProgFlashC.nc
@@ -0,0 +1,76 @@
+// $Id: ProgFlashC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+#include <avr/boot.h>
+
+module ProgFlashC {
+  provides {
+    interface ProgFlash;
+  }
+}
+
+implementation {
+
+
+  command error_t ProgFlash.write(in_flash_addr_t addr, uint8_t* buf, in_flash_addr_t len) {
+
+    uint16_t* wordBuf = (uint16_t*)buf;
+    uint32_t i;
+
+    if ( addr + len > TOSBOOT_START )
+      return FAIL;
+
+    boot_page_erase( addr );
+    while( boot_rww_busy() )
+      boot_rww_enable();
+
+    for ( i = 0; i < len; i += 2 )
+      boot_page_fill( addr + i, *wordBuf++ );
+
+    boot_page_write( addr );
+
+    while ( boot_rww_busy() )
+      boot_rww_enable();
+
+    return SUCCESS;
+
+  }
+
+}
diff --git a/tos/lib/tosboot/iris/VoltageC.nc b/tos/lib/tosboot/iris/VoltageC.nc
new file mode 100644
index 00000000..12688168
--- /dev/null
+++ b/tos/lib/tosboot/iris/VoltageC.nc
@@ -0,0 +1,101 @@
+// $Id: VoltageC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+module VoltageC {
+  provides {
+    interface Voltage;
+  }
+}
+
+implementation {
+
+  command bool Voltage.okToProgram() {
+    // 250 KHz ADC clock (4MHz/16)
+    outp( 0x04, ADCSRA );
+    // clear interrupt flag by writing a 1
+    sbi( ADCSRA, ADIF );
+    // setup input channel
+    outp( VOLTAGE_PORT, ADMUX );
+    // adc enable
+    sbi( ADCSRA, ADEN );
+    // adc start conversion
+    sbi( ADCSRA, ADSC );
+    // wait for conversion to complete
+    while ( !bit_is_set( ADCSRA, ADIF ) );
+
+    return ( __inw(ADCL) < VTHRESH  );
+  }
+
+}
diff --git a/tos/lib/tosboot/lib/ExecC.nc b/tos/lib/tosboot/lib/ExecC.nc
new file mode 100644
index 00000000..c0c1d793
--- /dev/null
+++ b/tos/lib/tosboot/lib/ExecC.nc
@@ -0,0 +1,56 @@
+// $Id: ExecC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module ExecC {
+  provides {
+    interface Exec;
+  }
+}
+
+implementation {
+
+  command void Exec.exec() {
+
+    //goto *(void*)(TOSBOOT_END);
+
+    typedef void __attribute__((noreturn)) (*tosboot_exec)();
+    ((tosboot_exec)TOSBOOT_END)();
+
+  }
+
+}
diff --git a/tos/lib/tosboot/lib/LedsC.nc b/tos/lib/tosboot/lib/LedsC.nc
new file mode 100644
index 00000000..0a22b9c1
--- /dev/null
+++ b/tos/lib/tosboot/lib/LedsC.nc
@@ -0,0 +1,91 @@
+// $Id: LedsC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module LedsC {
+  provides interface Leds;
+}
+
+implementation {
+
+  enum {
+    RED_BIT = 1,
+    GREEN_BIT = 2,
+    YELLOW_BIT = 4
+  };
+
+  command void Leds.set(uint8_t ledsOn) {
+    if (ledsOn & GREEN_BIT) 
+      TOSH_CLR_GREEN_LED_PIN();
+    else
+      TOSH_SET_GREEN_LED_PIN();
+    if (ledsOn & YELLOW_BIT ) 
+      TOSH_CLR_YELLOW_LED_PIN();
+    else 
+      TOSH_SET_YELLOW_LED_PIN();
+    if (ledsOn & RED_BIT) 
+      TOSH_CLR_RED_LED_PIN();
+    else 
+      TOSH_SET_RED_LED_PIN();
+  }
+
+  command void Leds.flash(uint8_t a) {
+    uint8_t i, j;
+    for ( i = 3; i; i-- ) {
+      call Leds.set(a);
+      for ( j = 4; j; j-- )
+	wait(0xffff);
+      call Leds.set(0);
+      for ( j = 4; j; j-- )
+	wait(0xffff);
+    }
+  }
+
+  command void Leds.glow(uint8_t a, uint8_t b) {
+    int i;
+    for (i = 1536; i > 0; i -= 4) {
+      call Leds.set(a);
+      wait(i);
+      call Leds.set(b);
+      wait(1536-i);
+    }
+  }
+
+}
diff --git a/tos/lib/tosboot/m16c62p/HardwareC.nc b/tos/lib/tosboot/m16c62p/HardwareC.nc
new file mode 100644
index 00000000..3fc4f2a1
--- /dev/null
+++ b/tos/lib/tosboot/m16c62p/HardwareC.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Hardware interface implementation for the M16c/62p MCU.
+ * The interface is responsible of initializing the mcu
+ * and rebooting it on request.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "NetProg_platform.h"
+
+module HardwareC
+{
+  provides interface Hardware;
+}
+
+implementation
+{
+  command void Hardware.init()
+  {
+    PRCR.BYTE = BIT1 | BIT0; // Turn off protection for the cpu and clock register
+
+    PM0.BYTE = BIT7;         // Single Chip mode. No BCLK output.
+    PM1.BYTE = BIT3;         // Expand internal memory, no global wait state.
+
+    CM0.BYTE = 0x0;          // No sub-clock (Xc) generation
+    CM1.BYTE = 0x0;          // CPU_CLOCK = MAIN_CLOCK, low drive on Xin
+
+    PRCR.BYTE = 0;           // Turn on protection on all registers.
+  }
+
+  
+  command void Hardware.reboot()
+  {
+    netprog_reboot();
+  }
+}
diff --git a/tos/lib/tosboot/m16c62p/ProgFlashC.nc b/tos/lib/tosboot/m16c62p/ProgFlashC.nc
new file mode 100644
index 00000000..131171e2
--- /dev/null
+++ b/tos/lib/tosboot/m16c62p/ProgFlashC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Wiring so that the ProgFlashP module gets access to the HplM16c62pFlashC
+ * module.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+configuration ProgFlashC
+{
+  provides interface ProgFlash;
+}
+implementation
+{
+  components ProgFlashP, HplM16c62pFlashC;
+  
+  ProgFlashP.Flash -> HplM16c62pFlashC;
+  ProgFlash = ProgFlashP;
+}
\ No newline at end of file
diff --git a/tos/lib/tosboot/m16c62p/ProgFlashP.nc b/tos/lib/tosboot/m16c62p/ProgFlashP.nc
new file mode 100644
index 00000000..a08e4f13
--- /dev/null
+++ b/tos/lib/tosboot/m16c62p/ProgFlashP.nc
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the ProgFlash interface for M16c/62p.
+ * The interface is responsible of reprogramming of the mcus
+ * program flash.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "M16c62pFlash.h"
+
+module ProgFlashP
+{
+  provides interface ProgFlash;
+  
+  uses interface HplM16c62pFlash as Flash;
+}
+implementation
+{
+
+  command error_t ProgFlash.write(in_flash_addr_t addr, uint8_t* buf, in_flash_addr_t len)
+  {
+    // We dont need to rewrite the hw interrupt vector
+    if (addr >= 0xFFE00L)
+    {
+      return SUCCESS;
+    }
+
+    if (addr + len >= TOSBOOT_START)
+    {
+      return FAIL;
+    }
+
+    if (addr == 0xA0000L)
+    {
+      // Erase Block 10
+      if (call Flash.erase(M16C62P_BLOCK_10) != SUCCESS )
+      {
+        return FAIL;
+      }
+    }
+    else if ( addr == 0xB0000L )
+    {
+      // Erase Block 9
+      if (call Flash.erase(M16C62P_BLOCK_9) != SUCCESS )
+      {
+        return FAIL;
+      }
+    }
+    else if ( addr == 0xC0000L )
+    {
+      // Erase Block 8
+      if (call Flash.erase(M16C62P_BLOCK_8) != SUCCESS )
+      {
+        return FAIL;
+      }
+    }
+    else if ( addr == 0xD0000L )
+    {
+      // Erase Block 7
+      if (call Flash.erase(M16C62P_BLOCK_7) != SUCCESS )
+      {
+        return FAIL;
+      }
+    }
+
+    if (call Flash.write(addr, (unsigned int*) buf, len) != SUCCESS)
+    {
+      return FAIL;
+    }
+    
+    return SUCCESS;
+    
+  }
+}
+
diff --git a/tos/lib/tosboot/micaz/ExecC.nc b/tos/lib/tosboot/micaz/ExecC.nc
new file mode 100644
index 00000000..7a352934
--- /dev/null
+++ b/tos/lib/tosboot/micaz/ExecC.nc
@@ -0,0 +1,51 @@
+// $Id: ExecC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module ExecC {
+  provides {
+    interface Exec;
+  }
+}
+
+implementation {
+  
+  command void Exec.exec() {
+    __asm__ __volatile__ ("jmp 0x0000\n\t" ::);
+  }
+
+}
diff --git a/tos/lib/tosboot/micaz/InternalFlash.h b/tos/lib/tosboot/micaz/InternalFlash.h
new file mode 100644
index 00000000..a7692b51
--- /dev/null
+++ b/tos/lib/tosboot/micaz/InternalFlash.h
@@ -0,0 +1,52 @@
+// $Id: InternalFlash.h,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * InternalFlash.h - Internal flash implementation for the avr
+ * platform.
+ *
+ * Valid address range is 0x0 - 0xFFF.
+ *
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __INTERNAL_FLASH_H__
+#define __INTERNAL_FLASH_H__
+
+#include <avr/eeprom.h>
+
+#endif
diff --git a/tos/lib/tosboot/micaz/PluginC.nc b/tos/lib/tosboot/micaz/PluginC.nc
new file mode 100644
index 00000000..237998ed
--- /dev/null
+++ b/tos/lib/tosboot/micaz/PluginC.nc
@@ -0,0 +1,13 @@
+
+module PluginC {
+  provides {
+    interface StdControl;
+  }
+}
+
+implementation {
+
+  command error_t StdControl.start() { return SUCCESS; }
+  command error_t StdControl.stop() { return SUCCESS; }
+
+}
diff --git a/tos/lib/tosboot/micaz/TOSBoot_platform.h b/tos/lib/tosboot/micaz/TOSBoot_platform.h
new file mode 100644
index 00000000..2d8ad091
--- /dev/null
+++ b/tos/lib/tosboot/micaz/TOSBoot_platform.h
@@ -0,0 +1,54 @@
+// $Id: TOSBoot_platform.h,v 1.4 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author  Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __TOSBOOT_PLATFORM_H__
+#define __TOSBOOT_PLATFORM_H__
+
+enum {
+  TOSBOOT_ARGS_ADDR = 0xff0,      // address of TOSBoot args in internal flash
+  TOSBOOT_GESTURE_MAX_COUNT = 3,  // number of resets to force golden image
+  TOSBOOT_GOLDEN_IMG_ADDR = 0x0L, // address of the golden image in external flash
+  TOSBOOT_INT_PAGE_SIZE = SPM_PAGESIZE, // size of each internal program flash page
+};
+
+enum {
+  DELUGE_MIN_ADV_PERIOD_LOG2 = 9,
+  DELUGE_QSIZE = 2,
+};
+
+#endif
diff --git a/tos/lib/tosboot/micaz/VoltageC.nc b/tos/lib/tosboot/micaz/VoltageC.nc
new file mode 100644
index 00000000..19452415
--- /dev/null
+++ b/tos/lib/tosboot/micaz/VoltageC.nc
@@ -0,0 +1,69 @@
+// $Id: VoltageC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module VoltageC {
+  provides {
+    interface Voltage;
+  }
+}
+
+implementation {
+
+  command bool Voltage.okToProgram() {
+
+    // 250 KHz ADC clock (4MHz/16)
+    outp( 0x04, ADCSR );
+    // clear interrupt flag by writing a 1
+    sbi( ADCSR, ADIF );
+    // setup input channel
+    outp( VOLTAGE_PORT, ADMUX );
+    // adc enable
+    sbi( ADCSR, ADEN );
+    // adc start conversion
+    sbi( ADCSR, ADSC );
+    // wait for conversion to complete
+    while ( !bit_is_set( ADCSR, ADIF ) );
+
+    return ( __inw(ADCL) < VTHRESH  );
+
+  }
+
+}
diff --git a/tos/lib/tosboot/micaz/avrhardware.h b/tos/lib/tosboot/micaz/avrhardware.h
new file mode 100644
index 00000000..192e5e37
--- /dev/null
+++ b/tos/lib/tosboot/micaz/avrhardware.h
@@ -0,0 +1,211 @@
+// $Id: avrhardware.h,v 1.4 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:             Jason Hill, Philip Levis, Nelson Lee
+ *
+ *
+ */
+
+/**
+ * @author Jason Hill
+ * @author Philip Levis
+ * @author Nelson Lee
+ */
+
+
+#ifndef TOSH_AVRHARDWARE_H
+#define TOSH_AVRHARDWARE_H
+
+// check for a new-look avr-libc
+#if defined(DTOSTR_ALWAYS_SIGN) && !defined(TOSH_NEW_AVRLIBC)
+#define TOSH_NEW_AVRLIBC
+#endif
+
+#ifdef TOSH_NEW_AVRLIBC
+#include <avr/io.h>
+#if __AVR_LIBC_VERSION__ >= 10400UL
+#include <avr/interrupt.h>
+#else
+#include <avr/interrupt.h>
+#include <avr/signal.h>
+#endif
+#include <avr/wdt.h>
+#include <avr/pgmspace.h>
+#include <avr/eeprom.h>
+
+#ifndef sbi
+/* avr-libc 1.2.3 doesn't include these anymore. */
+#define sbi(port, bit) ((port) |= _BV(bit))
+#define cbi(port, bit) ((port) &= ~_BV(bit))
+#define inp(port) (port)
+#define inb(port) (port)
+#define outp(value, port) ((port) = (value))
+#define outb(port, value) ((port) = (value))
+#define inw(port) (*(volatile uint16_t *)&(port))
+#define outw(port, value) ((*(volatile uint16_t *)&(port)) = (value))
+#define PRG_RDB(addr) pgm_read_byte(addr)
+#endif
+
+#else
+#include <io.h>
+#include <sig-avr.h>
+#include <interrupt.h>
+#include <wdt.h>
+#include <pgmspace.h>
+#endif /* TOSH_NEW_AVRLIBC */
+
+// check for version 3.3 of GNU gcc or later
+#if ((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3))
+#define __outw(val, port) outw(port, val);
+#endif
+
+#ifndef __inw
+#ifndef __SFR_OFFSET
+#define __SFR_OFFSET 0
+#endif /* !__SFR_OFFSET */
+#define __inw(_port) inw(_port)
+
+#define __inw_atomic(__sfrport) ({				\
+	uint16_t __t;					\
+	bool bStatus;					\
+	bStatus = bit_is_set(SREG,7);			\
+	cli();						\
+	__t = inw(__sfrport);				\
+	if (bStatus) sei();				\
+	__t;						\
+ })
+
+#endif /* __inw */
+
+#define TOSH_ASSIGN_PIN(name, port, bit) \
+static inline void TOSH_SET_##name##_PIN() {sbi(PORT##port , bit);} \
+static inline void TOSH_CLR_##name##_PIN() {cbi(PORT##port , bit);} \
+static inline int TOSH_READ_##name##_PIN() \
+  {return (inp(PIN##port) & (1 << bit)) != 0;} \
+static inline void TOSH_MAKE_##name##_OUTPUT() {sbi(DDR##port , bit);} \
+static inline void TOSH_MAKE_##name##_INPUT() {cbi(DDR##port , bit);} 
+
+#define TOSH_ASSIGN_OUTPUT_ONLY_PIN(name, port, bit) \
+static inline void TOSH_SET_##name##_PIN() {sbi(PORT##port , bit);} \
+static inline void TOSH_CLR_##name##_PIN() {cbi(PORT##port , bit);} \
+static inline void TOSH_MAKE_##name##_OUTPUT() {;} 
+
+#define TOSH_ALIAS_OUTPUT_ONLY_PIN(alias, connector)\
+static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \
+static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \
+static inline void TOSH_MAKE_##alias##_OUTPUT() {} \
+
+#define TOSH_ALIAS_PIN(alias, connector) \
+static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \
+static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \
+static inline char TOSH_READ_##alias##_PIN() {return TOSH_READ_##connector##_PIN();} \
+static inline void TOSH_MAKE_##alias##_OUTPUT() {TOSH_MAKE_##connector##_OUTPUT();} \
+static inline void TOSH_MAKE_##alias##_INPUT()  {TOSH_MAKE_##connector##_INPUT();} 
+
+// We need slightly different defs than SIGNAL, INTERRUPT
+#define TOSH_SIGNAL(signame)					\
+  void signame() __attribute__ ((signal)) @spontaneous() @C()
+
+#define TOSH_INTERRUPT(signame)				\
+  void signame() __attribute__ ((interrupt)) @spontaneous() @C()
+
+/* Watchdog Prescaler
+ */
+enum {
+  TOSH_period16 = 0x00, // 47ms
+  TOSH_period32 = 0x01, // 94ms
+  TOSH_period64 = 0x02, // 0.19s
+  TOSH_period128 = 0x03, // 0.38s
+  TOSH_period256 = 0x04, // 0.75s
+  TOSH_period512 = 0x05, // 1.5s
+  TOSH_period1024 = 0x06, // 3.0s
+  TOSH_period2048 = 0x07 // 6.0s
+};
+
+void TOSH_wait()
+{
+  asm volatile("nop");
+  asm volatile("nop");
+}
+
+// atomic statement runtime support
+
+/* typedef uint8_t __nesc_atomic_t; */
+
+/* __nesc_atomic_t __nesc_atomic_start(void); */
+/* void __nesc_atomic_end(__nesc_atomic_t oldSreg); */
+
+/* #ifndef NESC_BUILD_BINARY */
+
+/* inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() */
+/* { */
+/*   __nesc_atomic_t result = inp(SREG); */
+/*   cli(); */
+/*   return result; */
+/* } */
+
+/* inline void __nesc_atomic_end(__nesc_atomic_t oldSreg) @spontaneous() */
+/* { */
+/*   outp(oldSreg, SREG); */
+/* } */
+
+/* #endif */
+
+/* inline void __nesc_atomic_sleep() */
+/* { */
+/*   /\* Atomically enable interrupts and sleep *\/ */
+/*   sei();  // Make sure interrupts are on, so we can wake up! */
+/*   asm volatile ("sleep"); */
+/*   TOSH_wait(); */
+/* } */
+
+
+/* inline void __nesc_enable_interrupt() { */
+/*   sei(); */
+/* } */
+
+/* inline void __nesc_disable_interrupt() { */
+/*   cli(); */
+/* } */
+
+#endif //TOSH_AVRHARDWARE_H
diff --git a/tos/lib/tosboot/micaz/hardware.h b/tos/lib/tosboot/micaz/hardware.h
new file mode 100644
index 00000000..6f394237
--- /dev/null
+++ b/tos/lib/tosboot/micaz/hardware.h
@@ -0,0 +1,168 @@
+// $Id: hardware.h,v 1.5 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * $Id: hardware.h,v 1.5 2010-06-29 22:07:50 scipio Exp $
+ *
+ */
+
+#ifndef __HARDWARE_H__
+#define __HARDWARE_H__
+
+#include <atm128hardware.h>
+#include <avrhardware.h>
+
+#ifndef MHZ
+/* Clock rate is ~8MHz except if specified by user 
+   (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */
+#define MHZ 8
+#endif 
+
+typedef uint32_t in_flash_addr_t;
+typedef uint32_t ex_flash_addr_t;
+
+static inline void wait( uint16_t dt ) {
+  /* In most cases (constant arg), the test is elided at compile-time */
+  if (dt)
+    /* loop takes 8 cycles. this is 1uS if running on an internal 8MHz
+       clock, and 1.09uS if running on the external crystal. */
+    asm volatile (
+      "1:       sbiw    %0,1\n"
+      " adiw    %0,1\n"
+      " sbiw    %0,1\n"
+      " brne    1b" : "+w" (dt));
+}
+
+// LED assignments
+TOSH_ASSIGN_PIN(RED_LED, A, 2);
+TOSH_ASSIGN_PIN(GREEN_LED, A, 1);
+TOSH_ASSIGN_PIN(YELLOW_LED, A, 0);
+
+TOSH_ASSIGN_PIN(SERIAL_ID, A, 4);
+
+// Flash assignments
+TOSH_ASSIGN_PIN(FLASH_CS, A, 3);
+TOSH_ASSIGN_PIN(FLASH_CLK,  D, 5);
+TOSH_ASSIGN_PIN(FLASH_OUT,  D, 3);
+TOSH_ASSIGN_PIN(FLASH_IN,  D, 2);
+
+// power control assignments
+TOSH_ASSIGN_PIN(PW0, C, 0);
+TOSH_ASSIGN_PIN(PW1, C, 1);
+TOSH_ASSIGN_PIN(PW2, C, 2);
+TOSH_ASSIGN_PIN(PW3, C, 3);
+TOSH_ASSIGN_PIN(PW4, C, 4);
+TOSH_ASSIGN_PIN(PW5, C, 5);
+TOSH_ASSIGN_PIN(PW6, C, 6);
+TOSH_ASSIGN_PIN(PW7, C, 7);
+
+void TOSH_SET_PIN_DIRECTIONS(void)
+{
+  TOSH_MAKE_RED_LED_OUTPUT();
+  TOSH_MAKE_YELLOW_LED_OUTPUT();
+  TOSH_MAKE_GREEN_LED_OUTPUT();
+      
+  TOSH_MAKE_PW7_OUTPUT();
+  TOSH_MAKE_PW6_OUTPUT();
+  TOSH_MAKE_PW5_OUTPUT();
+  TOSH_MAKE_PW4_OUTPUT();
+  TOSH_MAKE_PW3_OUTPUT(); 
+  TOSH_MAKE_PW2_OUTPUT();
+  TOSH_MAKE_PW1_OUTPUT();
+  TOSH_MAKE_PW0_OUTPUT();
+
+  TOSH_MAKE_SERIAL_ID_INPUT();
+  TOSH_CLR_SERIAL_ID_PIN();  // Prevent sourcing current
+
+  TOSH_MAKE_FLASH_CS_OUTPUT();
+  TOSH_MAKE_FLASH_OUT_OUTPUT();
+  TOSH_MAKE_FLASH_CLK_OUTPUT();
+  TOSH_SET_FLASH_CS_PIN();
+}
+
+enum {
+  VOLTAGE_PORT = 30,
+  VTHRESH = 0x1cf, // 2.7V
+};
+
+#endif
+
+
+
+
diff --git a/tos/lib/tosboot/msp430/HardwareC.nc b/tos/lib/tosboot/msp430/HardwareC.nc
new file mode 100644
index 00000000..99f4c534
--- /dev/null
+++ b/tos/lib/tosboot/msp430/HardwareC.nc
@@ -0,0 +1,59 @@
+// $Id: HardwareC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module HardwareC {
+  provides {
+    interface Hardware;
+  }
+}
+
+implementation {
+
+  command void Hardware.init() {
+    BCSCTL1 = RSEL0 | RSEL1 | RSEL2 | XT2OFF;
+    DCOCTL = DCO0 | DCO1 | DCO2;
+  }
+  
+  command void Hardware.reboot() {
+    WDTCTL = 0;
+  }
+
+}
diff --git a/tos/lib/tosboot/msp430/HplUsart0C.nc b/tos/lib/tosboot/msp430/HplUsart0C.nc
new file mode 100644
index 00000000..b959d157
--- /dev/null
+++ b/tos/lib/tosboot/msp430/HplUsart0C.nc
@@ -0,0 +1,139 @@
+// $Id: HplUsart0C.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module HplUsart0C {
+  provides interface HplUsartControl;
+}
+implementation {
+
+  command void HplUsartControl.disableSPI() {
+    // USART0 SPI module disable
+    //ME1 &= ~USPIE0;
+
+    // set to PUC values
+    ME1 = 0;
+    U0CTL = 1;
+    U0TCTL = 1;
+    U0RCTL = 0;
+  }
+  
+  command void HplUsartControl.setModeSPI() {
+
+    //U0CTL = SWRST;
+
+    // 8-bit char, SPI-mode, USART as master
+    U0CTL = SWRST | CHAR | SYNC | MM;
+
+    // 3-pin + half-cycle delayed UCLK
+    U0TCTL |= STC + CKPH + SSEL_SMCLK; 
+
+    // as fast as possible
+    U0BR0 = 0x02;
+    U0BR1 = 0;
+
+    // enable SPI
+    ME1 |= USPIE0;
+
+    U0CTL &= ~SWRST;  
+    
+    // clear interrupts
+    IFG1 = 0;
+
+  }
+
+  command void HplUsartControl.disableI2C() {
+    /*
+    U0CTL = 1;
+    U0TCTL = 1;
+    I2CTCTL = 0;
+    */
+    U0CTL &= ~I2CEN;
+    U0CTL &= ~I2C;
+    I2CTCTL = 0;
+    call HplUsartControl.disableSPI();
+  }
+
+  command void HplUsartControl.setModeI2C() {
+   
+    // Recommended init procedure
+    U0CTL = I2C + SYNC + MST;
+
+    // use 1MHz SMCLK as the I2C reference
+    I2CTCTL |= I2CSSEL_2 | I2CTRX;
+
+    // Enable I2C
+    U0CTL |= I2CEN;
+
+    return;
+  }
+
+  command error_t HplUsartControl.isTxEmpty(){
+    if (U0TCTL & TXEPT) {
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+  
+  command error_t HplUsartControl.isTxIntrPending(){
+    if (IFG1 & UTXIFG0){
+      IFG1 &= ~UTXIFG0;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+
+  command error_t HplUsartControl.isRxIntrPending(){
+    if (IFG1 & URXIFG0){
+      IFG1 &= ~URXIFG0;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+
+  command void HplUsartControl.tx(uint8_t data){
+    U0TXBUF = data;
+  }
+  
+  command uint8_t HplUsartControl.rx(){
+    return U0RXBUF;
+  }
+
+}
diff --git a/tos/lib/tosboot/msp430/HplUsartControl.nc b/tos/lib/tosboot/msp430/HplUsartControl.nc
new file mode 100644
index 00000000..0039639c
--- /dev/null
+++ b/tos/lib/tosboot/msp430/HplUsartControl.nc
@@ -0,0 +1,57 @@
+// $Id: HplUsartControl.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+ 
+#include <msp430usart.h>
+
+interface HplUsartControl {
+
+  command void disableSPI();
+  command void setModeSPI();
+  command void disableI2C();
+  command void setModeI2C();
+  command error_t isTxEmpty();
+  command error_t isTxIntrPending();
+  command error_t isRxIntrPending();
+  command void tx(uint8_t data);
+  command uint8_t rx();
+
+}
+
diff --git a/tos/lib/tosboot/msp430/InternalFlashC.nc b/tos/lib/tosboot/msp430/InternalFlashC.nc
new file mode 100644
index 00000000..5486733b
--- /dev/null
+++ b/tos/lib/tosboot/msp430/InternalFlashC.nc
@@ -0,0 +1,131 @@
+// $Id: InternalFlashC.nc,v 1.4 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * InternalFlashC.nc - Internal flash implementation for telos msp
+ * platform. On the msp, the flash must first be erased before a value
+ * can be written. However, the msp can only erase the flash at a
+ * segment granularity (128 bytes for the information section). This
+ * module allows transparent read/write of individual bytes to the
+ * information section by dynamically switching between the two
+ * provided segments in the information section.
+ *
+ * Valid address range is 0x1000 - 0x107E (0x107F is used to store the
+ * version number of the information segment).
+ *
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module InternalFlashC {
+  provides interface InternalFlash;
+}
+
+implementation {
+
+  enum {
+    IFLASH_OFFSET     = 0x1000,
+    IFLASH_SIZE       = 128,
+    IFLASH_SEG0_VNUM_ADDR = 0x107f,
+    IFLASH_SEG1_VNUM_ADDR = 0x10ff,
+    IFLASH_INVALID_VNUM = -1,
+  };
+
+  uint8_t chooseSegment() {
+    int8_t vnum0 = *(int8_t*)IFLASH_SEG0_VNUM_ADDR;
+    int8_t vnum1 = *(int8_t*)IFLASH_SEG1_VNUM_ADDR;
+    if (vnum0 == IFLASH_INVALID_VNUM)
+      return 1;
+    else if (vnum1 == IFLASH_INVALID_VNUM)
+      return 0;
+    return ( (int8_t)(vnum0 - vnum1) < 0 );
+  }
+
+  command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) {
+
+    volatile int8_t *newPtr;
+    int8_t *oldPtr;
+    int8_t *bufPtr = (int8_t*)buf;
+    int8_t version;
+    uint16_t i;
+
+    addr += IFLASH_OFFSET;
+    newPtr = oldPtr = (int8_t*)IFLASH_OFFSET;
+    if (chooseSegment()) {
+      oldPtr += IFLASH_SIZE;
+    }
+    else {
+      addr += IFLASH_SIZE;
+      newPtr += IFLASH_SIZE;
+    }
+
+    FCTL2 = FWKEY + FSSEL1 + FN2;
+    FCTL3 = FWKEY;
+    FCTL1 = FWKEY + ERASE;
+    *newPtr = 0;
+    FCTL1 = FWKEY + WRT;
+    
+    for ( i = 0; i < IFLASH_SIZE-1; i++, newPtr++, oldPtr++ ) {
+      if ((uint16_t)newPtr < (uint16_t)addr || (uint16_t)addr+size <= (uint16_t)newPtr)
+	*newPtr = *oldPtr;
+      else
+	*newPtr = *bufPtr++;
+    }
+    version = *oldPtr + 1;
+    if (version == IFLASH_INVALID_VNUM)
+      version++;
+    *newPtr = version;
+    
+    FCTL1 = FWKEY;
+    FCTL3 = FWKEY + LOCK;
+
+    return SUCCESS;
+
+  }
+
+  command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) {
+
+    addr += IFLASH_OFFSET;
+    if (chooseSegment())
+      addr += IFLASH_SIZE;
+
+    memcpy(buf, addr, size);
+
+    return SUCCESS;
+
+  }
+
+}
diff --git a/tos/lib/tosboot/msp430/ProgFlashC.nc b/tos/lib/tosboot/msp430/ProgFlashC.nc
new file mode 100644
index 00000000..f61b817f
--- /dev/null
+++ b/tos/lib/tosboot/msp430/ProgFlashC.nc
@@ -0,0 +1,81 @@
+// $Id: ProgFlashC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module ProgFlashC {
+  provides {
+    interface ProgFlash;
+  }
+}
+
+implementation {
+
+  enum {
+    RESET_ADDR = 0xfffe,
+  };
+
+  command error_t ProgFlash.write(in_flash_addr_t addr, uint8_t* buf, uint16_t len) {
+
+    volatile uint16_t *flashAddr = (uint16_t*)(uint16_t)addr;
+    uint16_t *wordBuf = (uint16_t*)buf;
+    uint16_t i = 0;
+
+    // len is 16 bits so it can't be larger than 0xffff
+    // make sure we can't wrap around
+    if (addr < (0xffff - (len >> 1))) {
+      FCTL2 = FWKEY + FSSEL1 + FN2;
+      FCTL3 = FWKEY;
+      FCTL1 = FWKEY + ERASE;
+      *flashAddr = 0;
+      FCTL1 = FWKEY + WRT;
+      for (i = 0; i < (len >> 1); i++, flashAddr++) {
+	if ((uint16_t)flashAddr != RESET_ADDR)
+	  *flashAddr = wordBuf[i];
+	else
+	  *flashAddr = TOSBOOT_START;
+      }
+      FCTL1 = FWKEY;
+      FCTL3 = FWKEY + LOCK;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+
+}
diff --git a/tos/lib/tosboot/msp430/VoltageC.nc b/tos/lib/tosboot/msp430/VoltageC.nc
new file mode 100644
index 00000000..e321aa93
--- /dev/null
+++ b/tos/lib/tosboot/msp430/VoltageC.nc
@@ -0,0 +1,83 @@
+// $Id: VoltageC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module VoltageC {
+  provides {
+    interface Voltage;
+  }
+}
+
+implementation {
+
+  enum {
+    VTHRESH = 0xE66, // 2.7V
+  };
+
+  command bool Voltage.okToProgram() {
+
+    int i;
+
+    // Turn on and set up ADC12 with REF_1_5V
+    ADC12CTL0 = ADC12ON | SHT0_2 | REFON;
+    // Use sampling timer
+    ADC12CTL1 = SHP;
+    // Set up to sample voltage
+    ADC12MCTL0 = EOS | SREF_1 | INCH_11;
+    // Delay for reference start-up
+    for ( i=0; i<0x3600; i++ );
+
+    // Enable conversions
+    ADC12CTL0 |= ENC;
+    // Start conversion
+    ADC12CTL0 |= ADC12SC;
+    // Wait for completion
+    while ((ADC12IFG & BIT0) == 0);
+
+    // Turn off ADC12
+    ADC12CTL0 &= ~ENC;
+    ADC12CTL0 = 0;
+
+    // Check if voltage is greater than 2.7V
+    return ( ADC12MEM0 > VTHRESH );
+
+  }
+
+}
diff --git a/tos/lib/tosboot/msp430f1611/PluginC.nc b/tos/lib/tosboot/msp430f1611/PluginC.nc
new file mode 100644
index 00000000..bb264766
--- /dev/null
+++ b/tos/lib/tosboot/msp430f1611/PluginC.nc
@@ -0,0 +1,57 @@
+// $Id: PluginC.nc,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+configuration PluginC {
+  provides {
+    interface StdControl;
+  }
+}
+
+implementation {
+
+  components ExtFlashC, LedsC, PowerOffC;
+
+  StdControl = PowerOffC;
+
+  PowerOffC.Leds -> LedsC;
+  PowerOffC.SubControl -> ExtFlashC;
+
+}
diff --git a/tos/lib/tosboot/msp430f1611/PowerOffC.nc b/tos/lib/tosboot/msp430f1611/PowerOffC.nc
new file mode 100644
index 00000000..2977b613
--- /dev/null
+++ b/tos/lib/tosboot/msp430f1611/PowerOffC.nc
@@ -0,0 +1,96 @@
+// $Id: PowerOffC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module PowerOffC {
+  provides {
+    interface Init;
+    interface StdControl;
+  }
+  uses {
+    interface Leds;
+    interface StdControl as SubControl;
+  }
+}
+
+implementation {
+
+  void haltsystem() {
+
+    uint16_t _lpmreg;
+
+    TOSH_SET_PIN_DIRECTIONS();
+
+    call SubControl.stop();
+
+    call Leds.glow(0x7, 0x0);
+
+    _lpmreg = LPM4_bits;
+    _lpmreg |= SR_GIE;
+
+    __asm__ __volatile__( "bis  %0, r2" : : "m" ((uint16_t)_lpmreg) );
+
+  }
+
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start() {
+
+    int i;
+
+    // wait a short period for things to stabilize
+    for ( i = 0; i < 4; i++ )
+      wait(0xffff);
+
+    // if user button is pressed, power down
+    if (!TOSH_READ_USERINT_PIN())
+      haltsystem();
+
+    return SUCCESS;
+
+  }
+
+  command error_t StdControl.stop() {
+    return SUCCESS;
+  }
+
+}
diff --git a/tos/lib/tosboot/msp430f1611/TOSBoot_platform.h b/tos/lib/tosboot/msp430f1611/TOSBoot_platform.h
new file mode 100644
index 00000000..c41217aa
--- /dev/null
+++ b/tos/lib/tosboot/msp430f1611/TOSBoot_platform.h
@@ -0,0 +1,54 @@
+// $Id: TOSBoot_platform.h,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author  Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __TOSBOOT_PLATFORM_H__
+#define __TOSBOOT_PLATFORM_H__
+
+enum {
+  TOSBOOT_ARGS_ADDR = 0x70,      // address of TOSBoot args in internal flash
+  TOSBOOT_GESTURE_MAX_COUNT = 3, // number of resets to force golden image
+  TOSBOOT_GOLDEN_IMG_ADDR = 0xf0000L, // address of the golden image in external flash
+  TOSBOOT_INT_PAGE_SIZE = 512L,  // size of each internal program flash page
+};
+
+enum {
+  DELUGE_MIN_ADV_PERIOD_LOG2 = 9,
+  DELUGE_QSIZE = 1,
+};
+
+#endif
diff --git a/tos/lib/tosboot/mulle/ExecC.nc b/tos/lib/tosboot/mulle/ExecC.nc
new file mode 100644
index 00000000..cf5dd9b3
--- /dev/null
+++ b/tos/lib/tosboot/mulle/ExecC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the Exec interface for the Mulle platform.
+ * The interface is responsible for starting the execution of
+ * the user program which is located with a starting address
+ * of 0xa0000 in the program flash.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "hardware.h"
+module ExecC
+{
+  provides
+  {
+    interface Exec;
+  }
+}
+
+implementation
+{  
+  command void Exec.exec()
+  {
+    asm volatile ("jmp.a 0xa0000");
+  }
+}
diff --git a/tos/lib/tosboot/mulle/PluginC.nc b/tos/lib/tosboot/mulle/PluginC.nc
new file mode 100644
index 00000000..e7fc7cb3
--- /dev/null
+++ b/tos/lib/tosboot/mulle/PluginC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * No extra plugins are required to be started for tosboot.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+module PluginC
+{
+  provides
+  {
+    interface StdControl;
+  }
+}
+
+implementation 
+{
+  command error_t StdControl.start() { return SUCCESS; }
+  command error_t StdControl.stop() { return SUCCESS; }
+}
diff --git a/tos/lib/tosboot/mulle/VoltageC.nc b/tos/lib/tosboot/mulle/VoltageC.nc
new file mode 100644
index 00000000..e928bf5d
--- /dev/null
+++ b/tos/lib/tosboot/mulle/VoltageC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * VoltageC provides a implementation of the Voltage interface.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+module VoltageC
+{
+  provides
+  {
+    interface Voltage;
+  }
+}
+
+implementation
+{
+  command bool Voltage.okToProgram()
+  {
+    // TODO(henrik) Implement
+    return true;
+  }
+}
diff --git a/tos/lib/tosboot/mulle/hardware.h b/tos/lib/tosboot/mulle/hardware.h
new file mode 100644
index 00000000..3821fc16
--- /dev/null
+++ b/tos/lib/tosboot/mulle/hardware.h
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#ifndef __HARDWARE_H__
+#define __HARDWARE_H__
+
+#include <m16c62phardware.h>
+#include <m16chardware.h>
+
+typedef uint32_t in_flash_addr_t;
+typedef uint32_t ex_flash_addr_t;
+
+static inline void wait( uint16_t dt ) {
+  uint16_t i;
+  for (i = 0; i < dt; ++i) {
+    TOSH_wait();
+  }
+}
+
+// LED assignments
+TOSH_ASSIGN_PIN(RED_LED, 3, 6);
+TOSH_ASSIGN_PIN(GREEN_LED, 3, 7);
+TOSH_ASSIGN_PIN(YELLOW_LED, 3, 4);
+
+// Flash assignments
+TOSH_ASSIGN_PIN(FLASH_IN,  4, 0);
+TOSH_ASSIGN_PIN(FLASH_OUT,  4, 1);
+TOSH_ASSIGN_PIN(FLASH_CLK,  4, 2);
+TOSH_ASSIGN_PIN(FLASH_CS, 4, 5);
+TOSH_ASSIGN_PIN(FLASH_VCC, 3, 2);
+
+void TOSH_SET_PIN_DIRECTIONS(void)
+{
+  TOSH_MAKE_RED_LED_OUTPUT();
+  TOSH_MAKE_YELLOW_LED_OUTPUT();
+  TOSH_MAKE_GREEN_LED_OUTPUT();
+      
+  TOSH_MAKE_FLASH_VCC_OUTPUT();
+  TOSH_CLR_FLASH_VCC_PIN();
+}
+
+// TODO(henrik) Insert correct value
+enum {
+  VTHRESH = 0x0, // 0V
+};
+
+#endif  // __HARDWARE_H__
+
+
+
+
diff --git a/tos/lib/tosboot/mulle/m16chardware.h b/tos/lib/tosboot/mulle/m16chardware.h
new file mode 100644
index 00000000..ddc7f802
--- /dev/null
+++ b/tos/lib/tosboot/mulle/m16chardware.h
@@ -0,0 +1,134 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Jason Hill
+ * @author Philip Levis
+ * @author Nelson Lee
+ */
+ 
+#ifndef __M16CHARDWARE_H__
+#define __M16CHARDWARE_H__
+
+#define sbi(port, bit) SET_BIT(port, bit)
+#define cbi(port, bit) CLR_BIT(port, bit)
+
+#define TOSH_ASSIGN_PIN(name, port, bit) \
+static inline void TOSH_SET_##name##_PIN() {sbi(P##port.BYTE , bit);} \
+static inline void TOSH_CLR_##name##_PIN() {cbi(P##port.BYTE , bit);} \
+static inline int TOSH_READ_##name##_PIN() \
+  {return ((P##port.BYTE) & (1 << bit)) != 0;} \
+static inline void TOSH_MAKE_##name##_OUTPUT() {sbi(PD##port.BYTE , bit);} \
+static inline void TOSH_MAKE_##name##_INPUT() {cbi(PD##port.BYTE , bit);} 
+
+
+
+#define TOSH_ASSIGN_OUTPUT_ONLY_PIN(name, port, bit) \
+static inline void TOSH_SET_##name##_PIN() {sbi(P##port , bit);} \
+static inline void TOSH_CLR_##name##_PIN() {cbi(P##port , bit);} \
+static inline void TOSH_MAKE_##name##_OUTPUT() {;} 
+
+#define TOSH_ALIAS_OUTPUT_ONLY_PIN(alias, connector)\
+static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \
+static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \
+static inline void TOSH_MAKE_##alias##_OUTPUT() {} \
+
+#define TOSH_ALIAS_PIN(alias, connector) \
+static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \
+static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \
+static inline char TOSH_READ_##alias##_PIN() {return TOSH_READ_##connector##_PIN();} \
+static inline void TOSH_MAKE_##alias##_OUTPUT() {TOSH_MAKE_##connector##_OUTPUT();} \
+static inline void TOSH_MAKE_##alias##_INPUT()  {TOSH_MAKE_##connector##_INPUT();} 
+
+
+
+void TOSH_wait()
+{
+  asm volatile("nop");
+  asm volatile("nop");
+  asm volatile("nop");
+  asm volatile("nop");
+  asm volatile("nop");
+  asm volatile("nop");
+  asm volatile("nop");
+  asm volatile("nop");
+  asm volatile("nop");
+  asm volatile("nop");
+}
+
+#endif  // __M16CHARDWARE_H__
diff --git a/tos/lib/tosboot/stm25p/ExtFlashC.nc b/tos/lib/tosboot/stm25p/ExtFlashC.nc
new file mode 100644
index 00000000..9fb8c1fd
--- /dev/null
+++ b/tos/lib/tosboot/stm25p/ExtFlashC.nc
@@ -0,0 +1,62 @@
+// $Id: ExtFlashC.nc,v 1.4 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+configuration ExtFlashC {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface ExtFlash;
+  }
+}
+
+implementation {
+
+  components 
+    ExtFlashP,
+    HplUsart0C;
+
+  Init = ExtFlashP;
+  StdControl = ExtFlashP;
+  ExtFlash = ExtFlashP;
+
+  ExtFlashP.UsartControl -> HplUsart0C;
+
+}
diff --git a/tos/lib/tosboot/stm25p/ExtFlashP.nc b/tos/lib/tosboot/stm25p/ExtFlashP.nc
new file mode 100644
index 00000000..ab426854
--- /dev/null
+++ b/tos/lib/tosboot/stm25p/ExtFlashP.nc
@@ -0,0 +1,125 @@
+// $Id: ExtFlashP.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module ExtFlashP {
+  provides {
+    interface StdControl;
+    interface Init;
+    interface ExtFlash;
+  }
+  uses {
+    interface HplUsartControl as UsartControl;
+  }
+}
+
+implementation {
+
+  command error_t Init.init() {
+    TOSH_MAKE_FLASH_HOLD_OUTPUT();
+    TOSH_MAKE_FLASH_CS_OUTPUT();
+    TOSH_SET_FLASH_HOLD_PIN();
+    call UsartControl.setModeSPI();
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start() { 
+    return SUCCESS; 
+  }
+
+  command error_t StdControl.stop() { 
+
+    TOSH_CLR_FLASH_CS_PIN();
+    
+    call UsartControl.tx(0xb9);
+    while(call UsartControl.isTxEmpty() != SUCCESS);
+
+    TOSH_SET_FLASH_CS_PIN();
+
+    call UsartControl.disableSPI();
+
+    return SUCCESS; 
+
+  }
+
+  void powerOnFlash() {
+
+    uint8_t i;
+
+    TOSH_CLR_FLASH_CS_PIN();
+
+    // command byte + 3 dummy bytes + signature
+    for ( i = 0; i < 5; i++ ) {
+      call UsartControl.tx(0xab);
+      while(call UsartControl.isTxIntrPending() != SUCCESS);
+    }
+    
+    TOSH_SET_FLASH_CS_PIN();
+
+  }
+
+  command void ExtFlash.startRead(uint32_t addr) {
+
+    uint8_t i;
+    
+    powerOnFlash();
+    
+    TOSH_CLR_FLASH_CS_PIN();
+    
+    // add command byte to address
+    addr |= (uint32_t)0x3 << 24;
+
+    // address
+    for ( i = 4; i > 0; i-- ) {
+      call UsartControl.tx((addr >> (i-1)*8) & 0xff);
+      while(call UsartControl.isTxIntrPending() != SUCCESS);
+    }    
+
+  }
+
+  command uint8_t ExtFlash.readByte() {
+    call UsartControl.rx();
+    call UsartControl.tx(0);
+    while(call UsartControl.isRxIntrPending() != SUCCESS);
+    return call UsartControl.rx();
+  }
+
+  command void ExtFlash.stopRead() {
+    TOSH_SET_FLASH_CS_PIN();
+  }
+
+}
diff --git a/tos/lib/tosboot/telosb/hardware.h b/tos/lib/tosboot/telosb/hardware.h
new file mode 100644
index 00000000..648eba6f
--- /dev/null
+++ b/tos/lib/tosboot/telosb/hardware.h
@@ -0,0 +1,99 @@
+// $Id: hardware.h,v 1.3 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __HARDWARE_H__
+#define __HARDWARE_H__
+
+#include "msp430hardware.h"
+
+// internal flash is 16 bits in width
+typedef uint16_t in_flash_addr_t;
+// external flash is 32 bits in width
+typedef uint32_t ex_flash_addr_t;
+
+void wait(uint16_t t) {
+  for ( ; t > 0; t-- );
+}
+
+// LEDs
+TOSH_ASSIGN_PIN(RED_LED, 5, 4);
+TOSH_ASSIGN_PIN(GREEN_LED, 5, 5);
+TOSH_ASSIGN_PIN(YELLOW_LED, 5, 6);
+
+// UART pins
+TOSH_ASSIGN_PIN(SOMI0, 3, 2);
+TOSH_ASSIGN_PIN(SIMO0, 3, 1);
+TOSH_ASSIGN_PIN(UCLK0, 3, 3);
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+
+// User Interupt Pin
+TOSH_ASSIGN_PIN(USERINT, 2, 7);
+
+// FLASH
+TOSH_ASSIGN_PIN(FLASH_PWR, 4, 3);
+TOSH_ASSIGN_PIN(FLASH_CS, 4, 4);
+TOSH_ASSIGN_PIN(FLASH_HOLD, 4, 7);
+
+void TOSH_SET_PIN_DIRECTIONS(void)
+{
+  P3SEL = 0x0E; // set SPI and I2C to mod func
+  
+  P1DIR = 0xe0;
+  P1OUT = 0x00;
+  
+  P2DIR = 0x7b;
+  P2OUT = 0x10;
+  
+  P3DIR = 0xf1;
+  P3OUT = 0x00;
+  
+  P4DIR = 0xfd;
+  P4OUT = 0xdd;
+  
+  P5DIR = 0xff;
+  P5OUT = 0xff;
+  
+  P6DIR = 0xff;
+  P6OUT = 0x00;
+}
+
+#endif
diff --git a/tos/lib/tosboot/tinynode/ExecC.nc b/tos/lib/tosboot/tinynode/ExecC.nc
new file mode 100644
index 00000000..e817c567
--- /dev/null
+++ b/tos/lib/tosboot/tinynode/ExecC.nc
@@ -0,0 +1,56 @@
+// $Id: ExecC.nc,v 1.2 2010-06-29 22:07:50 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module ExecC {
+  provides {
+    interface Exec;
+  }
+}
+
+implementation {
+
+  command void Exec.exec() {
+
+    //goto *(void*)(TOSBOOT_END);
+
+    typedef void __attribute__((noreturn)) (*tosboot_exec)();
+    ((tosboot_exec)TOSBOOT_END)();
+
+  }
+
+}
diff --git a/tos/lib/tosboot/tinynode/ExtFlashC.nc b/tos/lib/tosboot/tinynode/ExtFlashC.nc
new file mode 100644
index 00000000..47553d55
--- /dev/null
+++ b/tos/lib/tosboot/tinynode/ExtFlashC.nc
@@ -0,0 +1,171 @@
+// $Id: ExtFlashC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Roland Flury <roland.flury@shockfish.com>
+ */
+
+module ExtFlashC {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface ExtFlash;
+  }
+}
+
+/**
+ * Simple reader module to access the Atmel at45db041 flash chip
+ */
+implementation {
+
+  uint32_t addr;
+
+  command error_t Init.init() {
+
+    TOSH_SET_FLASH_CS_PIN(); // inverted, deselect by default
+    TOSH_MAKE_FLASH_CS_OUTPUT();
+
+    TOSH_CLR_FLASH_CLK_PIN();
+    TOSH_MAKE_FLASH_CLK_OUTPUT();
+
+    TOSH_SET_FLASH_OUT_PIN();
+    TOSH_MAKE_FLASH_OUT_OUTPUT();      
+
+    TOSH_MAKE_FLASH_IN_INPUT();
+
+		TOSH_SET_FLASH_RESET_PIN(); // inverted
+		TOSH_MAKE_FLASH_RESET_OUTPUT();
+
+    return SUCCESS; 
+  }
+
+  command error_t StdControl.start() { return SUCCESS; }
+  command error_t StdControl.stop() { return SUCCESS; }
+	
+	/**
+	 * Write a Byte over the SPI bus and receive a Byte
+	 *
+	 * upon calling this function, /CS must be CLR
+	 */
+  uint8_t SPIByte(uint8_t out) {
+    uint8_t in = 0;
+    uint8_t i;
+
+    for ( i = 0; i < 8; i++, out <<= 1 ) {
+      // write bit
+      if (out & 0x80) {
+				TOSH_SET_FLASH_OUT_PIN();
+			} else {
+				TOSH_CLR_FLASH_OUT_PIN();
+			}
+			
+      // clock
+      TOSH_SET_FLASH_CLK_PIN();
+			
+      // read bit
+      in <<= 1;
+      if (TOSH_READ_FLASH_IN_PIN()) {
+				in |= 1;
+			}
+			
+      // clock
+      TOSH_CLR_FLASH_CLK_PIN();
+    }
+
+    return in;
+  }
+
+
+
+	/**
+	 * Initializes the flash to read Byte after Byte starting
+	 * from the given address. 
+	 *
+	 * Subsequent calls to readByte() will return the Bytes 
+	 * starting from the specified address. 
+	 *
+	 * stopRead() terminates this process and disables the Flash. 
+	 */
+  command void ExtFlash.startRead(uint32_t newAddr) {
+    uint8_t  cmdBuf[4];
+    uint8_t  i;
+
+		// we're using "Waveform 1 - Inactive Clock Polarity Low"
+		// see p.7 of data sheet
+    TOSH_CLR_FLASH_CLK_PIN(); 
+    TOSH_CLR_FLASH_CS_PIN(); // select the flash
+
+    addr = newAddr;
+
+		// we only use 256 Bytes per block (of 264 Bytes)
+    cmdBuf[0] = 0x52; // command for reading data starting at the following address
+    cmdBuf[1] = (addr >> 15) & 0xff; // 4 LSbits 
+    cmdBuf[2] = (addr >> 7) & 0xfe;  // 7 MSbits with the above 4 bits describe page to read
+    cmdBuf[3] = addr & 0xff;         // Offset to Byte in page to read
+
+		// transmit read command
+    for(i = 0; i < 4; i++) {
+      SPIByte(cmdBuf[i]);
+		}
+		// transmit 4 Bytes "don't care" as to spec
+    for(i = 0; i < 4; i++) {
+      SPIByte(0x0);
+		}
+    
+		// need to do one additional clock transition before reading
+		TOSH_SET_FLASH_CLK_PIN();
+		TOSH_CLR_FLASH_CLK_PIN();
+  }
+
+  command uint8_t ExtFlash.readByte() {
+		uint8_t b = SPIByte(0); // write anything, read Byte
+		addr++;
+		if(0 == (addr & 0xFF)) {
+			// we've just read the last Byte from a page
+			// initialize the Flash to continue reading on the new page
+      call ExtFlash.stopRead();
+      call ExtFlash.startRead(addr);
+		} 
+		return b;
+  }
+
+  command void ExtFlash.stopRead() {
+    TOSH_SET_FLASH_CS_PIN(); // disble Flash & tri-state the OUT-pin
+  }
+
+}
diff --git a/tos/lib/tosboot/tinynode/PowerOffC.nc b/tos/lib/tosboot/tinynode/PowerOffC.nc
new file mode 100644
index 00000000..55c15b91
--- /dev/null
+++ b/tos/lib/tosboot/tinynode/PowerOffC.nc
@@ -0,0 +1,100 @@
+// $Id: PowerOffC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module PowerOffC {
+  provides {
+    interface Init;
+    interface StdControl;
+  }
+  uses {
+    interface Leds;
+    interface StdControl as SubControl;
+  }
+}
+
+implementation {
+
+  void haltsystem() {
+
+    uint16_t _lpmreg;
+
+    TOSH_SET_PIN_DIRECTIONS();
+
+    call SubControl.stop();
+
+    call Leds.glow(0x7, 0x0);
+
+    _lpmreg = LPM4_bits;
+    _lpmreg |= SR_GIE;
+
+    __asm__ __volatile__( "bis  %0, r2" : : "m" ((uint16_t)_lpmreg) );
+
+  }
+
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start() {
+
+    int i;
+
+    // wait a short period for things to stabilize
+    for ( i = 0; i < 4; i++ ) {
+      wait(0xffff);
+		}
+
+		// TinyNode: we don't have a user button
+
+    // if user button is pressed, power down
+    //if (!TOSH_READ_USERINT_PIN()) {
+		//haltsystem(); 
+		//}
+
+    return SUCCESS;
+
+  }
+
+  command error_t StdControl.stop() {
+    return SUCCESS;
+  }
+
+}
diff --git a/tos/lib/tosboot/tinynode/README b/tos/lib/tosboot/tinynode/README
new file mode 100644
index 00000000..86792ef6
--- /dev/null
+++ b/tos/lib/tosboot/tinynode/README
@@ -0,0 +1,15 @@
+Deluge T2 for TinyNode
+----------------------------------
+
+
+These files are needed by Deluge T2 to compile for the TinyNode platform. 
+
+Note: 
+
+Reprogramming fails if the voltage of the node is not above a given 
+threshold. Currently, this is set to 2.7V, which may be too high if 
+you run your mote on batteries. In this case, set the value of
+VTHRESH in the hardware.h file to a different value. 
+
+In case you wish not to test the voltage at all, modify VoltageC.nc
+s.t. the command Voltage.okToProgram() returns always TRUE. 
\ No newline at end of file
diff --git a/tos/lib/tosboot/tinynode/TOSBoot_platform.h b/tos/lib/tosboot/tinynode/TOSBoot_platform.h
new file mode 100644
index 00000000..9c7f40b6
--- /dev/null
+++ b/tos/lib/tosboot/tinynode/TOSBoot_platform.h
@@ -0,0 +1,54 @@
+// $Id: TOSBoot_platform.h,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author  Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+#ifndef __TOSBOOT_PLATFORM_H__
+#define __TOSBOOT_PLATFORM_H__
+
+enum {
+  TOSBOOT_ARGS_ADDR = 0x70,      // address of TOSBoot args in internal flash
+  TOSBOOT_GESTURE_MAX_COUNT = 3, // number of resets to force golden image
+  TOSBOOT_GOLDEN_IMG_ADDR = 0x0L, // address of the golden image in external flash
+  TOSBOOT_INT_PAGE_SIZE = 512L,  // size of each internal program flash page
+};
+
+enum {
+  DELUGE_MIN_ADV_PERIOD_LOG2 = 9,
+  DELUGE_QSIZE = 1,
+};
+
+#endif
diff --git a/tos/lib/tosboot/tinynode/VoltageC.nc b/tos/lib/tosboot/tinynode/VoltageC.nc
new file mode 100644
index 00000000..9914cf1a
--- /dev/null
+++ b/tos/lib/tosboot/tinynode/VoltageC.nc
@@ -0,0 +1,79 @@
+// $Id: VoltageC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module VoltageC {
+  provides {
+    interface Voltage;
+  }
+}
+
+implementation {
+
+  command bool Voltage.okToProgram() {
+
+		/** original code form the msp430 folder */
+    int i;
+
+    // Turn on and set up ADC12 with REF_1_5V
+    ADC12CTL0 = ADC12ON | SHT0_2 | REFON;
+    // Use sampling timer
+    ADC12CTL1 = SHP;
+    // Set up to sample voltage
+    ADC12MCTL0 = EOS | SREF_1 | INCH_11;
+    // Delay for reference start-up
+    for ( i=0; i<0x3600; i++ );
+
+    // Enable conversions
+    ADC12CTL0 |= ENC;
+    // Start conversion
+    ADC12CTL0 |= ADC12SC;
+    // Wait for completion
+    while ((ADC12IFG & BIT0) == 0);
+
+    // Turn off ADC12
+    ADC12CTL0 &= ~ENC;
+    ADC12CTL0 = 0;
+
+    // Check if voltage is greater than 2.7V
+    return ( ADC12MEM0 > VTHRESH );
+  }
+
+}
diff --git a/tos/lib/tosboot/tinynode/hardware.h b/tos/lib/tosboot/tinynode/hardware.h
new file mode 100644
index 00000000..89bd6dcf
--- /dev/null
+++ b/tos/lib/tosboot/tinynode/hardware.h
@@ -0,0 +1,95 @@
+// $Id: hardware.h,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ *
+ *
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author Roland Flury <roland.flury@shockfish.com>
+ */
+
+#ifndef __HARDWARE_H__
+#define __HARDWARE_H__
+
+#include "msp430hardware.h"
+
+// internal flash is 16 bits in width
+typedef uint16_t in_flash_addr_t;
+// external flash is 32 bits in width
+typedef uint32_t ex_flash_addr_t;
+
+void wait(uint16_t t) {
+  for(; t > 0; t--);
+}
+enum {
+  VTHRESH = 0xE66, // 2.7V - threshold for reprogramming the node, if voltage is below, don't reprogram
+};
+
+// LEDs
+TOSH_ASSIGN_PIN(RED_LED2, 1, 5);		// on tinynode
+TOSH_ASSIGN_PIN(RED_LED, 1, 6);	// external
+TOSH_ASSIGN_PIN(GREEN_LED, 2, 3);
+TOSH_ASSIGN_PIN(YELLOW_LED, 2, 4);
+
+// FLASH at45db041
+TOSH_ASSIGN_PIN(FLASH_CS, 4, 7); // inverted
+TOSH_ASSIGN_PIN(FLASH_RESET, 4, 6); // inverted
+TOSH_ASSIGN_PIN(FLASH_CLK, 3, 3);
+TOSH_ASSIGN_PIN(FLASH_OUT, 3, 1); // MOSI - master OUT slave IN
+TOSH_ASSIGN_PIN(FLASH_IN, 3, 2); // MISO - master IN slave OUT
+
+void TOSH_SET_PIN_DIRECTIONS(void) {
+	
+	// FLASH at45db041
+  TOSH_SET_FLASH_CS_PIN(); // inverted 
+  TOSH_MAKE_FLASH_CS_OUTPUT();
+  TOSH_MAKE_FLASH_OUT_OUTPUT();
+  TOSH_MAKE_FLASH_CLK_OUTPUT();
+	TOSH_MAKE_FLASH_IN_INPUT();
+	TOSH_SET_FLASH_RESET_PIN(); // inverted
+	TOSH_MAKE_FLASH_RESET_OUTPUT();
+
+	// LEDs
+	TOSH_CLR_RED_LED2_PIN();
+	TOSH_CLR_RED_LED_PIN();
+	TOSH_CLR_YELLOW_LED_PIN();
+	TOSH_CLR_GREEN_LED_PIN();
+	TOSH_MAKE_RED_LED2_OUTPUT();		
+	TOSH_MAKE_RED_LED_OUTPUT();		
+	TOSH_MAKE_YELLOW_LED_OUTPUT();		
+	TOSH_MAKE_GREEN_LED_OUTPUT();		
+}
+
+#endif
diff --git a/tos/lib/tossim/ActiveMessageAddressC.nc b/tos/lib/tossim/ActiveMessageAddressC.nc
new file mode 100644
index 00000000..64512bf2
--- /dev/null
+++ b/tos/lib/tossim/ActiveMessageAddressC.nc
@@ -0,0 +1,100 @@
+// $Id: ActiveMessageAddressC.nc,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageAddressC.nc,v 1.6 2010-06-29 22:07:51 scipio Exp $
+ *
+ */
+
+/**
+ * Accessor methods for Active Messages.
+ *
+ * @author Philip Levis
+ * @author Morten Tranberg Hansen (added ActiveMessageAddress)
+ * @date June 19 2005
+ */
+
+module ActiveMessageAddressC  {
+  provides {
+    interface ActiveMessageAddress;
+    async command am_addr_t amAddress();
+    async command void setAmAddress(am_addr_t a);
+  }
+}
+implementation {
+  bool set = FALSE;
+  am_addr_t addr;
+  am_group_t group = TOS_AM_GROUP;
+
+  async command void ActiveMessageAddress.setAddress(am_group_t myGroup, am_addr_t myAddr) {
+    addr = myAddr;
+    group = myGroup;
+    set = TRUE;
+    signal ActiveMessageAddress.changed();
+  }
+
+  async command am_addr_t ActiveMessageAddress.amAddress() {
+    if(!set) {
+      addr = TOS_NODE_ID;
+      set = TRUE;
+    }
+    return addr;
+  }
+
+  async command am_group_t ActiveMessageAddress.amGroup() {
+    return group;
+  }
+
+  async command am_addr_t amAddress() {
+    return call ActiveMessageAddress.amAddress();
+  }
+
+  async command void setAmAddress(am_addr_t a) {
+    addr = a;
+    set = TRUE;
+    signal ActiveMessageAddress.changed();
+  }
+
+  default async event void ActiveMessageAddress.changed() {}
+
+}
diff --git a/tos/lib/tossim/ActiveMessageC.nc b/tos/lib/tossim/ActiveMessageC.nc
new file mode 100644
index 00000000..c7dab557
--- /dev/null
+++ b/tos/lib/tossim/ActiveMessageC.nc
@@ -0,0 +1,79 @@
+// $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * The basic chip-independent TOSSIM Active Message layer for radio chips
+ * that do not have simulation support.
+ *
+ * @author Philip Levis
+ * @date December 2 2005
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components TossimActiveMessageC as AM;
+  components TossimPacketModelC as Network;
+
+  components CpmModelC as Model;
+
+  components ActiveMessageAddressC as Address;
+  components MainC;
+  
+  MainC.SoftwareInit -> Network;
+  SplitControl = Network;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = Network;
+
+  AM.Model -> Network.Packet;
+  AM.amAddress -> Address;
+  
+  Network.GainRadioModel -> Model;
+}
+
diff --git a/tos/lib/tossim/BinaryInterferenceModelC.nc b/tos/lib/tossim/BinaryInterferenceModelC.nc
new file mode 100644
index 00000000..a871fc8b
--- /dev/null
+++ b/tos/lib/tossim/BinaryInterferenceModelC.nc
@@ -0,0 +1,176 @@
+// $Id: BinaryInterferenceModelC.nc,v 1.5 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * A binary interference model with length-independent packet error
+ * rates (the old TOSSIM-packet story).
+ *
+ * @author Philip Levis
+ * @date   December 2 2005
+ */ 
+
+#include <sim_binary.h>
+
+module BinaryInterferenceModelC {
+  provides interface SimpleRadioModel as Model;
+}
+
+implementation {
+
+  message_t* outgoing;
+  bool requestAck;
+  
+  void sim_binary_ack_handle(sim_event_t* evt)  {
+    if (outgoing != NULL && requestAck) {
+      signal Model.acked(outgoing);
+    }
+  }
+
+  sim_event_t receiveEvent;
+  sim_time_t clearTime = 0;
+  bool collision = FALSE;
+  message_t* incoming = NULL;
+  int incomingSource;
+
+  
+  command bool Model.clearChannel() {
+    dbg("Binary", "Checking clear channel @ %s: %i\n", sim_time_string(), (clearTime < sim_time()));
+    return clearTime < sim_time();
+  }
+
+  
+  void sim_schedule_ack(int source, sim_time_t time) {
+    sim_event_t* ackEvent = (sim_event_t*)malloc(sizeof(sim_event_t));
+    ackEvent->mote = source;
+    ackEvent->force = 0;
+    ackEvent->cancelled = 0;
+    ackEvent->time = time;
+    ackEvent->handle = sim_binary_ack_handle;
+    ackEvent->cleanup = sim_queue_cleanup_event;
+    sim_queue_insert(ackEvent);
+  }
+  
+  void sim_binary_receive_handle(sim_event_t* evt) {
+    // If there was no collision, and we pass the loss
+    // rate...
+    if (!collision) {
+      double loss = sim_binary_loss(incomingSource, sim_node());
+      int randVal = sim_random() % 1000000;
+      dbg("Binary", "Handling receive event for %i.\n", sim_node());
+      loss *= 1000000.0;
+      if (randVal < (int)loss) {
+	signal Model.receive(incoming);
+
+	loss = sim_binary_loss(sim_node(), incomingSource);
+	randVal = sim_random() % 1000000;
+	loss *= 1000000.0;
+	if (randVal < (int)loss) {
+	  sim_schedule_ack(incomingSource, sim_time());
+	}
+      }
+      else {
+	dbg("Binary", "Packet lost.\n");
+      }
+    }
+    else {
+      dbg("Binary", "Receive event for %i was a collision.\n", sim_node());
+    }
+    incoming = NULL;
+  }
+
+  void enqueue_receive_event(int source, sim_time_t endTime, message_t* msg) {
+    if (incoming == NULL) {
+      dbg("Binary", "Formatting reception event for %i.\n", sim_node());
+      receiveEvent.time = endTime;
+      receiveEvent.mote = sim_node();
+      receiveEvent.cancelled = 0;
+      receiveEvent.force = 0;
+      receiveEvent.handle = sim_binary_receive_handle;
+      receiveEvent.cleanup = sim_queue_cleanup_none;
+      incoming = msg;
+      sim_queue_insert(&receiveEvent);
+      incoming = msg;
+      incomingSource = source;
+    }
+  }
+  
+  void sim_binary_put(int dest, message_t* msg, sim_time_t endTime, bool receive) {
+    int prevNode = sim_node();
+    sim_set_node(dest);
+    if (clearTime < sim_time() && receive) {
+      dbg("Binary", "Enqueing reception event for %i.\n", dest);
+      enqueue_receive_event(prevNode, endTime - 1, msg);
+      collision = FALSE;
+    }
+    else {
+      collision = TRUE;
+    }
+    if (endTime > clearTime) {
+      clearTime = endTime;
+    }
+    sim_set_node(prevNode);
+  }
+
+
+  command void Model.putOnAirToAll(message_t* msg, bool ack, sim_time_t endTime) {
+    link_t* link = sim_binary_first(sim_node());
+    requestAck = FALSE;
+    outgoing = msg;
+    dbg("Binary", "Node %i broadcasting, first link is 0x%p.\n", sim_node(), sim_binary_first(sim_node()));
+    while (link != NULL) {
+      int other = link->mote;
+      dbg("Binary", "Node %i transmitting to %i.\n", sim_node(), other);
+      sim_binary_put(other, msg, endTime, TRUE);
+      link = sim_binary_next(link);
+    }
+  }
+
+  command void Model.putOnAirTo(int dest, message_t* msg, bool ack, sim_time_t endTime) {
+    link_t* link = sim_binary_first(sim_node());
+    requestAck = ack;
+    outgoing = msg;
+    
+    while (link != NULL) {
+      int other = link->mote;
+      sim_binary_put(other, msg, endTime, other == dest);
+      dbg("Binary", "Node %i transmitting to %i.\n", sim_node(), dest);
+      link = sim_binary_next(link);
+    }
+  }
+    
+
+  
+  
+ default event void Model.receive(message_t* msg) {}
+
+
+}
diff --git a/tos/lib/tossim/CpmModelC.nc b/tos/lib/tossim/CpmModelC.nc
new file mode 100644
index 00000000..b2e70104
--- /dev/null
+++ b/tos/lib/tossim/CpmModelC.nc
@@ -0,0 +1,486 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * CPM (closest-pattern matching) is a wireless noise simulation model
+ * based on statistical extraction from empirical noise data.  This
+ * model provides far more precise software simulation environment by
+ * exploiting time-correlated noise characteristics. For details,
+ * please refer to the paper
+ *
+ * "Improving Wireless Simulation through Noise Modeling." HyungJune
+ * Lee and Philip Levis, IPSN 2007. You can find a copy at
+ * http://sing.stanford.edu.
+ * 
+ * @author Hyungjune Lee, Philip Levis
+ * @date   Oct 12 2006
+ */ 
+
+#include <sim_gain.h>
+#include <sim_noise.h>
+#include <randomlib.h>
+
+module CpmModelC {
+  provides interface GainRadioModel as Model;
+}
+
+implementation {
+  
+  message_t* outgoing; // If I'm sending, this is my outgoing packet
+  bool requestAck;
+  bool receiving = 0;  // Whether or not I think I'm receiving a packet
+  bool transmitting = 0; // Whether or not I think I'm tranmitting a packet
+  sim_time_t transmissionEndTime; // to check pending transmission
+  struct receive_message;
+  typedef struct receive_message receive_message_t;
+
+  struct receive_message {
+    int source;
+    sim_time_t start;
+    sim_time_t end;
+    double power;
+    double reversePower;
+    int8_t strength;
+    bool lost;
+    bool ack;
+    message_t* msg;
+    receive_message_t* next;
+  };
+
+  receive_message_t* outstandingReceptionHead = NULL;
+
+  receive_message_t* allocate_receive_message();
+  void free_receive_message(receive_message_t* msg);
+  sim_event_t* allocate_receive_event(sim_time_t t, receive_message_t* m);
+
+  bool shouldReceive(double SNR);
+  bool checkReceive(receive_message_t* msg);
+  double packetNoise(receive_message_t* msg);
+  double checkPrr(receive_message_t* msg);
+  
+  double timeInMs()   {
+    sim_time_t ftime = sim_time();
+    int hours, minutes, seconds;
+    sim_time_t secondBillionths;
+    int temp_time;
+    double ms_time;
+
+    secondBillionths = (ftime % sim_ticks_per_sec());
+    if (sim_ticks_per_sec() > (sim_time_t)1000000000) {
+	secondBillionths /= (sim_ticks_per_sec() / (sim_time_t)1000000000);
+    }
+    else {
+      secondBillionths *= ((sim_time_t)1000000000 / sim_ticks_per_sec());
+    }
+    temp_time = (int)(secondBillionths/10000);
+    
+    if (temp_time % 10 >= 5) {
+	temp_time += (10-(temp_time%10));
+    }
+    else {
+      temp_time -= (temp_time%10);
+    }
+    ms_time = (float)(temp_time/100.0);
+
+    seconds = (int)(ftime / sim_ticks_per_sec());
+    minutes = seconds / 60;
+    hours = minutes / 60;
+    seconds %= 60;
+    minutes %= 60;
+	
+    ms_time += (hours*3600+minutes*60+seconds)*1000;
+
+    return ms_time;
+  }
+	
+  //Generate a CPM noise reading
+  double noise_hash_generation()   {
+    double CT = timeInMs(); 
+    uint32_t quotient = ((sim_time_t)(CT*10))/10;
+    uint8_t remain = (uint8_t)(((sim_time_t)(CT*10))%10);
+    double noise_val;
+    uint16_t node_id = sim_node();
+
+    dbg("CpmModelC", "IN: noise_hash_generation()\n");
+    if (5 <= remain && remain < 10) {
+	noise_val = (double)sim_noise_generate(node_id, quotient+1);
+      }
+    else {
+      noise_val = (double)sim_noise_generate(node_id, quotient);
+    }
+    dbg("CpmModelC,Tal", "%s: OUT: noise_hash_generation(): %lf\n", sim_time_string(), noise_val);
+
+    return noise_val;
+  }
+
+  double packetSnr(receive_message_t* msg) {
+    double signalStr = msg->power;
+    double noise = noise_hash_generation();
+    return (signalStr - noise);
+  }
+  
+  double arr_estimate_from_snr(double SNR) {
+    double beta1 = 0.9794;
+    double beta2 = 2.3851;
+    double X = SNR-beta2;
+    double PSE = 0.5*erfc(beta1*X/sqrt(2));
+    double prr_hat = pow(1-PSE, 23*2);
+    dbg("CpmModelC,SNRLoss", "SNR is %lf, ARR is %lf\n", SNR, prr_hat);
+    if (prr_hat > 1)
+      prr_hat = 1.1;
+    else if (prr_hat < 0)
+      prr_hat = -0.1;
+	
+    return prr_hat;
+  }
+  
+  int shouldAckReceive(double snr) {
+    double prr = arr_estimate_from_snr(snr);
+    double coin = RandomUniform();
+    if ( (prr >= 0) && (prr <= 1) ) {
+      if (coin < prr)
+	prr = 1.0;
+      else
+	prr = 0.0;
+    }
+    return (int)prr;
+  }
+  
+  void sim_gain_ack_handle(sim_event_t* evt)  {
+    // Four conditions must hold for an ack to be issued:
+    // 1) Transmitter is still sending a packet (i.e., not cancelled)
+    // 2) The packet requested an acknowledgment
+    // 3) The transmitter is on
+    // 4) The packet passes the SNR/ARR curve
+    if (requestAck && // This 
+	outgoing != NULL &&
+	sim_mote_is_on(sim_node())) {
+      receive_message_t* rcv = (receive_message_t*)evt->data;
+      double power = rcv->reversePower;
+      double noise = packetNoise(rcv);
+      double snr = power - noise;
+      if (shouldAckReceive(snr)) {
+	signal Model.acked(outgoing);
+      }
+    }
+    free_receive_message((receive_message_t*)evt->data);
+  }
+
+  sim_event_t receiveEvent;
+  // This clear threshold comes from the CC2420 data sheet
+  double clearThreshold = -72.0;
+  bool collision = FALSE;
+  message_t* incoming = NULL;
+  int incomingSource;
+
+  command void Model.setClearValue(double value) {
+    clearThreshold = value;
+    dbg("CpmModelC", "Setting clear threshold to %f\n", clearThreshold);
+	
+  }
+  
+  command bool Model.clearChannel() {
+    dbg("CpmModelC", "Checking clear channel @ %s: %f <= %f \n", sim_time_string(), (double)packetNoise(NULL), clearThreshold);
+    return packetNoise(NULL) < clearThreshold;
+  }
+
+  void sim_gain_schedule_ack(int source, sim_time_t t, receive_message_t* r) {
+    sim_event_t* ackEvent = (sim_event_t*)malloc(sizeof(sim_event_t));
+    
+    ackEvent->mote = source;
+    ackEvent->force = 1;
+    ackEvent->cancelled = 0;
+    ackEvent->time = t;
+    ackEvent->handle = sim_gain_ack_handle;
+    ackEvent->cleanup = sim_queue_cleanup_event;
+    ackEvent->data = r;
+    
+    sim_queue_insert(ackEvent);
+  }
+
+  double prr_estimate_from_snr(double SNR) {
+    // Based on CC2420 measurement by Kannan.
+    // The updated function below fixes the problem of non-zero PRR
+    // at very low SNR. With this function PRR is 0 for SNR <= 3.
+    double beta1 = 0.9794;
+    double beta2 = 2.3851;
+    double X = SNR-beta2;
+    double PSE = 0.5*erfc(beta1*X/sqrt(2));
+    double prr_hat = pow(1-PSE, 23*2);
+    dbg("CpmModelC,SNR", "SNR is %lf, PRR is %lf\n", SNR, prr_hat);
+    if (prr_hat > 1)
+      prr_hat = 1.1;
+    else if (prr_hat < 0)
+      prr_hat = -0.1;
+	
+    return prr_hat;
+  }
+
+  bool shouldReceive(double SNR) {
+    double prr = prr_estimate_from_snr(SNR);
+    double coin = RandomUniform();
+    if ( (prr >= 0) && (prr <= 1) ) {
+      if (coin < prr)
+	prr = 1.0;
+      else
+	prr = 0.0;
+    }
+    return prr;
+  }
+
+  bool checkReceive(receive_message_t* msg) {
+    double noise = noise_hash_generation();
+    receive_message_t* list = outstandingReceptionHead;
+    noise = pow(10.0, noise / 10.0);
+    while (list != NULL) {
+      if (list != msg) {
+	noise += pow(10.0, list->power / 10.0);
+      }
+      list = list->next;
+    }
+    noise = 10.0 * log(noise) / log(10.0);
+    return shouldReceive(msg->power - noise);
+  }
+  
+  double packetNoise(receive_message_t* msg) {
+    double noise = noise_hash_generation();
+    receive_message_t* list = outstandingReceptionHead;
+    noise = pow(10.0, noise / 10.0);
+    while (list != NULL) {
+      if (list != msg) {
+	noise += pow(10.0, list->power / 10.0);
+      }
+      list = list->next;
+    }
+    noise = 10.0 * log(noise) / log(10.0);
+    return noise;
+  }
+
+  double checkPrr(receive_message_t* msg) {
+    return prr_estimate_from_snr(msg->power / packetNoise(msg));
+  }
+  
+
+  /* Handle a packet reception. If the packet is being acked,
+     pass the corresponding receive_message_t* to the ack handler,
+     otherwise free it. */
+  void sim_gain_receive_handle(sim_event_t* evt) {
+    receive_message_t* mine = (receive_message_t*)evt->data;
+    receive_message_t* predecessor = NULL;
+    receive_message_t* list = outstandingReceptionHead;
+
+    dbg("CpmModelC", "Handling reception event @ %s.\n", sim_time_string());
+    while (list != NULL) {
+      if (list->next == mine) {
+	predecessor = list;
+      }
+      list = list->next;
+    }
+    if (predecessor) {
+      predecessor->next = mine->next;
+    }
+    else if (mine == outstandingReceptionHead) { // must be head
+      outstandingReceptionHead = mine->next;
+    }
+    else {
+      dbgerror("CpmModelC", "Incoming packet list structure is corrupted: entry is not the head and no entry points to it.\n");
+    }
+    dbg("CpmModelC,SNRLoss", "Packet from %i to %i\n", (int)mine->source, (int)sim_node());
+    if (!checkReceive(mine)) {
+      dbg("CpmModelC,SNRLoss", " - lost packet from %i as SNR was too low.\n", (int)mine->source);
+      mine->lost = 1;
+    }
+    if (!mine->lost) {
+      // Copy this receiver's packet signal strength to the metadata region
+      // of the packet. Note that this packet is actually shared across all
+      // receivers: a higher layer performs the copy.
+      tossim_metadata_t* meta = (tossim_metadata_t*)(&mine->msg->metadata);
+      meta->strength = mine->strength;
+      
+      dbg_clear("CpmModelC,SNRLoss", "  -signaling reception\n");
+      signal Model.receive(mine->msg);
+      if (mine->ack) {
+        dbg_clear("CpmModelC", " acknowledgment requested, ");
+      }
+      else {
+        dbg_clear("CpmModelC", " no acknowledgment requested.\n");
+      }
+      // If we scheduled an ack, receiving = 0 when it completes
+      if (mine->ack && signal Model.shouldAck(mine->msg)) {
+        dbg_clear("CpmModelC", " scheduling ack.\n");
+	sim_gain_schedule_ack(mine->source, sim_time() + 1, mine);
+      }
+      else { // Otherwise free the receive_message_t*
+	free_receive_message(mine);
+      }
+      // We're searching for new packets again
+      receiving = 0;
+    } // If the packet was lost, then we're searching for new packets again
+    else {
+      if (RandomUniform() < 0.001) {
+	dbg("CpmModelC,SNRLoss", "Packet was technically lost, but TOSSIM introduces an ack false positive rate.\n");
+	if (mine->ack && signal Model.shouldAck(mine->msg)) {
+	  dbg_clear("CpmModelC", " scheduling ack.\n");
+	  sim_gain_schedule_ack(mine->source, sim_time() + 1, mine);
+	}
+	else { // Otherwise free the receive_message_t*
+	  free_receive_message(mine);
+	}
+      }
+      else {
+	free_receive_message(mine);
+      }
+      receiving = 0;
+      dbg_clear("CpmModelC,SNRLoss", "  -packet was lost.\n");
+    }
+  }
+   
+  // Create a record that a node is receiving a packet,
+  // enqueue a receive event to figure out what happens.
+  void enqueue_receive_event(int source, sim_time_t endTime, message_t* msg, bool receive, double power, double reversePower) {
+    sim_event_t* evt;
+    receive_message_t* list;
+    receive_message_t* rcv = allocate_receive_message();
+    double noiseStr = packetNoise(rcv);
+    rcv->source = source;
+    rcv->start = sim_time();
+    rcv->end = endTime;
+    rcv->power = power;
+    rcv->reversePower = reversePower;
+    // The strength of a packet is the sum of the signal and noise. In most cases, this means
+    // the signal. By sampling this here, it assumes that the packet RSSI is sampled at
+    // the beginning of the packet. This is true for the CC2420, but is not true for all
+    // radios. But generalizing seems like complexity for minimal gain at this point.
+    rcv->strength = (int8_t)(floor(10.0 * log(pow(10.0, power/10.0) + pow(10.0, noiseStr/10.0)) / log(10.0)));
+    rcv->msg = msg;
+    rcv->lost = 0;
+    rcv->ack = receive;
+    // If I'm off, I never receive the packet, but I need to keep track of
+    // it in case I turn on and someone else starts sending me a weaker
+    // packet. So I don't set receiving to 1, but I keep track of
+    // the signal strength.
+
+    if (!sim_mote_is_on(sim_node())) { 
+      dbg("CpmModelC", "Lost packet from %i due to %i being off\n", source, sim_node());
+      rcv->lost = 1;
+    }
+    else if (!shouldReceive(power - noiseStr)) {
+      dbg("CpmModelC,SNRLoss", "Lost packet from %i to %i due to SNR being too low (%i)\n", source, sim_node(), (int)(power - noiseStr));
+      rcv->lost = 1;
+    }
+    else if (receiving) {
+      dbg("CpmModelC,SNRLoss", "Lost packet from %i due to %i being mid-reception\n", source, sim_node());
+      rcv->lost = 1;
+    }
+    else if (transmitting && (rcv->start < transmissionEndTime) && (transmissionEndTime <= rcv->end)) {
+      dbg("CpmModelC,SNRLoss", "Lost packet from %i due to %i being mid-transmission, transmissionEndTime %llu\n", source, sim_node(), transmissionEndTime);
+      rcv->lost = 1;
+    }
+    else {
+      receiving = 1;
+    }
+
+    list = outstandingReceptionHead;
+    while (list != NULL) {
+      if (!shouldReceive(list->power - rcv->power)) {
+	dbg("Gain,SNRLoss", "Going to lose packet from %i with signal %lf as am receiving a packet from %i with signal %lf\n", list->source, list->power, source, rcv->power);
+	list->lost = 1;
+      }
+      list = list->next;
+    }
+    
+    rcv->next = outstandingReceptionHead;
+    outstandingReceptionHead = rcv;
+    evt = allocate_receive_event(endTime, rcv);
+    sim_queue_insert(evt);
+
+  }
+  
+  void sim_gain_put(int dest, message_t* msg, sim_time_t endTime, bool receive, double power, double reversePower) {
+    int prevNode = sim_node();
+    dbg("CpmModelC", "Enqueing reception event for %i at %llu with power %lf.\n", dest, endTime, power);
+    sim_set_node(dest);
+    enqueue_receive_event(prevNode, endTime, msg, receive, power, reversePower);
+    sim_set_node(prevNode);
+  }
+
+  command void Model.putOnAirTo(int dest, message_t* msg, bool ack, sim_time_t endTime, double power, double reversePower) {
+    receive_message_t* list;
+    gain_entry_t* neighborEntry = sim_gain_first(sim_node());
+    requestAck = ack;
+    outgoing = msg;
+    transmissionEndTime = endTime;
+    dbg("CpmModelC", "Node %i transmitting to %i, finishes at %llu.\n", sim_node(), dest, endTime);
+
+    while (neighborEntry != NULL) {
+      int other = neighborEntry->mote;
+      sim_gain_put(other, msg, endTime, ack, power + sim_gain_value(sim_node(), other), reversePower + sim_gain_value(other, sim_node()));
+      neighborEntry = sim_gain_next(neighborEntry);
+    }
+
+    list = outstandingReceptionHead;
+    while (list != NULL) {    
+      list->lost = 1;
+      dbg("CpmModelC,SNRLoss", "Lost packet from %i because %i has outstanding reception, startTime %llu endTime %llu\n", list->source, sim_node(), list->start, list->end);
+      list = list->next;
+    }
+  }
+    
+
+  command void Model.setPendingTransmission() {
+    transmitting = TRUE;
+    dbg("CpmModelC", "setPendingTransmission: transmitting %i @ %s\n", transmitting, sim_time_string());
+  }
+
+  
+ default event void Model.receive(message_t* msg) {}
+
+ sim_event_t* allocate_receive_event(sim_time_t endTime, receive_message_t* msg) {
+   sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t));
+   evt->mote = sim_node();
+   evt->time = endTime;
+   evt->handle = sim_gain_receive_handle;
+   evt->cleanup = sim_queue_cleanup_event;
+   evt->cancelled = 0;
+   evt->force = 1; // Need to keep track of air even when node is off
+   evt->data = msg;
+   return evt;
+ }
+
+ receive_message_t* allocate_receive_message() {
+   return (receive_message_t*)malloc(sizeof(receive_message_t));
+ }
+
+ void free_receive_message(receive_message_t* msg) {
+   free(msg);
+ }
+}
diff --git a/tos/lib/tossim/DemoSensorC.nc b/tos/lib/tossim/DemoSensorC.nc
new file mode 100644
index 00000000..f12c4272
--- /dev/null
+++ b/tos/lib/tossim/DemoSensorC.nc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+generic configuration DemoSensorC(){
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new ConstantSensorC(uint16_t, 0xbeef);
+  Read = ConstantSensorC;
+}
diff --git a/tos/lib/tossim/Driver.c b/tos/lib/tossim/Driver.c
new file mode 100644
index 00000000..f5368220
--- /dev/null
+++ b/tos/lib/tossim/Driver.c
@@ -0,0 +1,28 @@
+#include <tossim.h>
+
+int main() {
+  Tossim* t = new Tossim(NULL);
+  t->init();
+  //t->addChannel("Scheduler", fdopen(1, "w"));
+  //t->addChannel("TossimPacketModelC", fdopen(1, "w"));
+  t->addChannel("LedsC", fdopen(1, "w"));
+  t->addChannel("AM", fdopen(1, "w"));
+
+  Radio* r = t->radio();
+    
+  for (int i = 0; i < 2; i++) {
+    printf("Mote %i at %i\n", i, 15000000 * i + 1);
+    Mote* m = t->getNode(i);
+    m->bootAtTime(15000000 * i + 1);
+    r->setNoise(i, -77.0, 3);
+    for (int j = 0; j < 2; j++) {
+      if (i != j) {
+        r->add(i, j, -50.0);
+      }
+    }
+  }
+
+  for (int i = 0; i < 60; i++) {
+    t->runNextEvent();
+  }
+}
diff --git a/tos/lib/tossim/GainRadioModel.nc b/tos/lib/tossim/GainRadioModel.nc
new file mode 100644
index 00000000..b07c6828
--- /dev/null
+++ b/tos/lib/tossim/GainRadioModel.nc
@@ -0,0 +1,62 @@
+// $Id: GainRadioModel.nc,v 1.8 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The interface to a gain-based radio model, which considers
+ * signal strength of transmission and propagation. It also
+ * includes a clear channel estimate. The actual implementation
+ * of the model (e.g., noise, signal collision) is generally
+ * C-based.
+ *
+ * @author Philip Levis
+ * @date   December 2 2005
+ */ 
+
+
+#include "TinyError.h"
+
+interface GainRadioModel {
+  command void putOnAirTo(int dest,
+			  message_t* msg,
+			  bool ack,
+			  sim_time_t endTime,
+			  double gain,
+			  double reverseGain);
+
+  command void setClearValue(double value);
+  command bool clearChannel();
+  command void setPendingTransmission();
+  
+  event void acked(message_t* msg);
+  event void receive(message_t* msg);
+  event bool shouldAck(message_t* msg);
+}
diff --git a/tos/lib/tossim/MainC.nc b/tos/lib/tossim/MainC.nc
new file mode 100644
index 00000000..b0c0c7ae
--- /dev/null
+++ b/tos/lib/tossim/MainC.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This version of Main is the system interface the TinyOS boot
+ * sequence in TOSSIM. It wires the boot sequence implementation to
+ * the scheduler and hardware resources. Unlike the standard Main,
+ * it does not actually define the <tt>main</tt> function, as a
+ * TOSSIM simulation is triggered from Python.
+ *
+ * @author Philip Levis
+ * @date   August 6 2005
+ */
+
+// $Id: MainC.nc,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+#include "hardware.h"
+
+configuration MainC {
+  provides interface Boot;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  components PlatformC, SimMainP, TinySchedulerC;
+  
+  // SimMoteP is not referred to by any component here.
+  // It is included to make sure nesC loads it, as it
+  // includes functionality many other systems depend on.
+  components SimMoteP;
+  
+  SimMainP.Scheduler -> TinySchedulerC;
+  SimMainP.PlatformInit -> PlatformC;
+
+  // Export the SoftwareInit and Booted for applications
+  SoftwareInit = SimMainP.SoftwareInit;
+  Boot = SimMainP;
+
+  // This component may not be used by the application, but it must
+  // be included. This is because there are Python calls that deliver
+  // packets, and those python calls must terminate somewhere. If
+  // the application does not wire this up to, e.g., ActiveMessageC,
+  // the default handlers make sure nothing happens when a script
+  // tries to deliver a packet to a node that has no radio stack.
+  components ActiveMessageC;
+  
+}
+
diff --git a/tos/lib/tossim/PlatformC.nc b/tos/lib/tossim/PlatformC.nc
new file mode 100644
index 00000000..4e161695
--- /dev/null
+++ b/tos/lib/tossim/PlatformC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The default simulation platform, which does nothing.
+ *
+ * @author Phil Levis
+ * @date   November 22 2005
+ */
+
+// $Id: PlatformC.nc,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+module PlatformC {
+  provides interface Init;
+}
+implementation {
+  command error_t Init.init() {
+    dbg("PlatformC", "Initialized mote.\n");
+    return SUCCESS;
+  }
+}
+
diff --git a/tos/lib/tossim/README b/tos/lib/tossim/README
new file mode 100644
index 00000000..2c3c7c29
--- /dev/null
+++ b/tos/lib/tossim/README
@@ -0,0 +1,21 @@
+README for tinyos-2.x/tos/lib/tossim
+
+This directory contains the core code for the TOSSIM TinyOS simulator.
+One characteristic of TOSSIM is that it can controlled through a
+Python script. Building simple yet efficient support for this requires 
+presenting most TOSSIM abstractions in a C++ interface, which is then
+transformed into a Python interface with the SWIG tool.
+
+This leads most TOSSIM abstractions to have three levels: C, nesC, 
+and C++. Because nesC cannot call C++ and vice versa, TOSSIM exports
+its important call points as C functions. It links simple C++ wrapper
+classes against the simulation binary. Python can then call through
+the C++ interface.
+
+The files tossim.h and tossim.c, for example, are the basic TOSSIM
+C++ classes of Mote, Tossim, and Variable. These call functions 
+in sim_tossim.c, which other parts of TOSSIM also call.
+
+The examples/ directory contains some sample Python scripts. 
+
+
diff --git a/tos/lib/tossim/SerialActiveMessageC.nc b/tos/lib/tossim/SerialActiveMessageC.nc
new file mode 100644
index 00000000..0b70c930
--- /dev/null
+++ b/tos/lib/tossim/SerialActiveMessageC.nc
@@ -0,0 +1,202 @@
+// $Id: SerialActiveMessageC.nc,v 1.8 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * The basic chip-independent TOSSIM Active Message layer for radio chips
+ * that do not have simulation support.
+ *
+ * @author Philip Levis
+ * @date December 2 2005
+ */
+
+#include <AM.h>
+#include <Serial.h>
+
+module SerialActiveMessageC {
+  provides {
+    interface SplitControl;
+    
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+  uses {
+    command am_addr_t amAddress();
+  }
+}
+implementation {
+
+  serial_header_t* getHeader(message_t* amsg) {
+    return (serial_header_t*)(amsg->data - sizeof(serial_header_t));
+  }
+
+  task void startDone() { signal SplitControl.startDone(SUCCESS); }
+  task void stopDone() { signal SplitControl.stopDone(SUCCESS); }
+
+  command error_t SplitControl.start() {
+    post startDone();
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.stop() {
+    post stopDone();
+    return SUCCESS;
+  }
+
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+					  message_t* amsg,
+					  uint8_t len) {
+    dbg("Serial", "Serial: sending a packet of size %d\n", len);
+    return FAIL;
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    dbg("Serial", "Serial: cancelled a packet\n");
+    return FAIL;
+  }
+  
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->dest;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    serial_header_t* header = getHeader(amsg);
+    header->dest = addr;
+  }
+
+  command am_addr_t AMPacket.source(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->src;
+  }
+
+  command void AMPacket.setSource(message_t* amsg, am_addr_t addr) {
+    serial_header_t* header = getHeader(amsg);
+    header->src = addr;
+  }
+
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+	    call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t t) {
+    serial_header_t* header = getHeader(amsg);
+    header->type = t;
+  }
+
+  command am_group_t AMPacket.group(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->group;
+  }
+  
+  command void AMPacket.setGroup(message_t* msg, am_group_t group) {
+    serial_header_t* header = getHeader(msg);
+    header->group = group;
+  }
+
+  command am_group_t AMPacket.localGroup() {
+    return TOS_AM_GROUP;
+  }
+  command void Packet.clear(message_t* msg) {}
+  
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return getHeader(msg)->length;
+  }
+  
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    getHeader(msg)->length = len;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+  
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    if (len <= TOSH_DATA_LENGTH) {
+      return msg->data;
+    }
+    else {
+      return NULL;
+    }
+  }
+
+  async command error_t Acks.requestAck(message_t* msg) {
+    return FAIL;
+  }
+
+  async command error_t Acks.noAck(message_t* msg) {
+    return SUCCESS;
+  }
+
+  async command bool Acks.wasAcked(message_t* msg) {
+    return FALSE;
+  }
+ default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+   return;
+ }
+
+ default command am_addr_t amAddress() {
+   return 0;
+ }
+ 
+}
diff --git a/tos/lib/tossim/SimMainP.nc b/tos/lib/tossim/SimMainP.nc
new file mode 100644
index 00000000..eef96ff6
--- /dev/null
+++ b/tos/lib/tossim/SimMainP.nc
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SimMainP implements the TOSSIM TinyOS boot sequence, as documented
+ * in TEP 107. It differs from RealMainP (its mote counterpart) in that
+ * it does not actually define a <tt>main</tt> function.
+ *
+ * @author Philip Levis
+ * @date   August 17 2005
+ */
+
+static void __nesc_nido_initialise(int node);
+
+module SimMainP {
+  provides interface Boot;
+  uses interface Scheduler;
+  uses interface Init as PlatformInit;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+
+  int sim_main_start_mote() @C() @spontaneous() {
+    char timeBuf[128];
+    atomic {
+      /* First, initialize the Scheduler so components can post
+	 tasks. Initialize all of the very hardware specific stuff, such
+	 as CPU settings, counters, etc. After the hardware is ready,
+	 initialize the requisite software components and start
+	 execution.*/
+      
+      call Scheduler.init(); 
+      
+      /* Initialize the platform. Then spin on the Scheduler, passing
+       * FALSE so it will not put the system to sleep if there are no
+       * more tasks; if no tasks remain, continue on to software
+       * initialization */
+      call PlatformInit.init();    
+      while (call Scheduler.runNextTask());
+      
+      /* Initialize software components.Then spin on the Scheduler,
+       * passing FALSE so it will not put the system to sleep if there
+       * are no more tasks; if no tasks remain, the system has booted
+       * successfully.*/
+      call SoftwareInit.init(); 
+      while (call Scheduler.runNextTask());
+    }
+    
+    /* Enable interrupts now that system is ready. */
+    __nesc_enable_interrupt();
+
+    sim_print_now(timeBuf, 128);
+    dbg("SimMainP", "Mote %li signaling boot at time %s.\n", sim_node(), timeBuf);
+    signal Boot.booted();
+    
+    /* Normally, at this point a mote enters a while(1) loop to
+     * execute tasks. In TOSSIM, this call completes: posted tasks
+     * are part of the global TOSSIM event loop. Look at
+     * SimSchedulerBasicP for more details. */
+    return 0;
+  }
+
+  default command error_t PlatformInit.init() { return SUCCESS; }
+  default command error_t SoftwareInit.init() { return SUCCESS; }
+  default event void Boot.booted() { }
+}
+
diff --git a/tos/lib/tossim/SimMote.nc b/tos/lib/tossim/SimMote.nc
new file mode 100644
index 00000000..56c8b8bb
--- /dev/null
+++ b/tos/lib/tossim/SimMote.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * TOSSIM-specific interface to access a mote's state. TinyOS programs
+ * should never use this interface.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id: SimMote.nc,v 1.5 2010-06-29 22:07:51 scipio Exp $
+
+interface SimMote {
+  async command long long int getEuid();
+  async command void setEuid(long long int euid);
+  async command long long int getStartTime();
+  async command bool isOn();
+  async command int getVariableInfo(char* name, void** ptr, size_t* len);
+  command void turnOn();
+  async command void turnOff();
+}
diff --git a/tos/lib/tossim/SimMoteP.nc b/tos/lib/tossim/SimMoteP.nc
new file mode 100644
index 00000000..0424eef2
--- /dev/null
+++ b/tos/lib/tossim/SimMoteP.nc
@@ -0,0 +1,193 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ * The TOSSIM abstraction of a mote. By putting simulation state into
+ * a component, we can scale and reference this state automatically
+ * using nesC's rewriting, rather than managing and indexing into
+ * arrays manually.
+ *
+ * @author Phil Levis
+ * @date   August 19 2005
+ */
+
+// $Id: SimMoteP.nc,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+module SimMoteP {
+  provides interface SimMote;
+}
+
+implementation {
+  long long int euid;
+  long long int startTime;
+  bool isOn;
+  sim_event_t* bootEvent;
+  
+  async command long long int SimMote.getEuid() {
+    return euid;
+  }
+  async command void SimMote.setEuid(long long int e) {
+    euid = e;
+  }
+  async command long long int SimMote.getStartTime() {
+    return startTime;
+  }
+  async command bool SimMote.isOn() {
+    return isOn;
+  }
+
+  async command int SimMote.getVariableInfo(char* name, void** addr, size_t* size) {
+    return __nesc_nido_resolve(sim_node(), name, (uintptr_t*)addr, (size_t*)size);
+  }
+
+  command void SimMote.turnOn() {
+    if (!isOn) {
+      if (bootEvent != NULL) {
+	bootEvent->cancelled = TRUE;
+      }
+      __nesc_nido_initialise(sim_node());
+      startTime = sim_time();
+      dbg("SimMoteP", "Setting start time to %llu\n", startTime);
+      isOn = TRUE;
+      sim_main_start_mote();
+    }
+  }
+
+  async command void SimMote.turnOff() {
+    isOn = FALSE;
+  }
+
+  
+  long long int sim_mote_euid(int mote) @C() @spontaneous() {
+    long long int result;
+    int tmp = sim_node();
+    sim_set_node(mote);
+    result = call SimMote.getEuid();
+    sim_set_node(tmp);
+    return result;
+  }
+
+  void sim_mote_set_euid(int mote, long long int id)  @C() @spontaneous() {
+    int tmp = sim_node();
+    sim_set_node(mote);
+    call SimMote.setEuid(id);
+    sim_set_node(tmp);
+  }
+  
+  long long int sim_mote_start_time(int mote) @C() @spontaneous() {
+    long long int result;
+    int tmp = sim_node();
+    sim_set_node(mote);
+    result = call SimMote.getStartTime();
+    sim_set_node(tmp);
+    return result;
+  }
+
+  int sim_mote_get_variable_info(int mote, char* name, void** ptr, size_t* len) @C() @spontaneous() {
+    int result;
+    int tmpID = sim_node();
+    sim_set_node(mote);
+    result = call SimMote.getVariableInfo(name, ptr, len);
+    dbg("SimMoteP", "Fetched %s of %i to be %p with len %i (result %i)\n", name, mote, *ptr, *len, result);
+    sim_set_node(tmpID);
+    return result;
+  }
+  
+  void sim_mote_set_start_time(int mote, long long int t) @C() @spontaneous() {
+    int tmpID = sim_node();
+    sim_set_node(mote);
+    startTime = t;
+    dbg("SimMoteP", "Setting start time to %llu\n", startTime);
+    sim_set_node(tmpID);
+    return;
+  }
+  
+  bool sim_mote_is_on(int mote) @C() @spontaneous() {
+    bool result;
+    int tmp = sim_node();
+    sim_set_node(mote);
+    result = call SimMote.isOn();
+    sim_set_node(tmp);
+    return result;
+  }
+  
+  void sim_mote_turn_on(int mote) @C() @spontaneous() {
+    int tmp = sim_node();
+    sim_set_node(mote);
+    call SimMote.turnOn();
+    sim_set_node(tmp);
+  }
+  
+  void sim_mote_turn_off(int mote) @C() @spontaneous() {
+    int tmp = sim_node();
+    sim_set_node(mote);
+    call SimMote.turnOff();
+    sim_set_node(tmp);
+  }
+
+  void sim_mote_boot_handle(sim_event_t* e) {
+    char buf[128];
+    sim_print_now(buf, 128);
+	   
+    bootEvent = (sim_event_t*)NULL;
+    dbg("SimMoteP", "Turning on mote %i at time %s.\n", (int)sim_node(), buf);
+    call SimMote.turnOn();
+  }
+  
+  void sim_mote_enqueue_boot_event(int mote) @C() @spontaneous() {
+    int tmp = sim_node();
+    sim_set_node(mote);
+
+    if (bootEvent != NULL)  {
+      if (bootEvent->time == startTime) {
+	// In case we have a cancelled boot event.
+	bootEvent->cancelled = FALSE;
+	return;
+      }
+      else {
+	bootEvent->cancelled = TRUE;
+      }
+    }
+    
+    bootEvent = (sim_event_t*) malloc(sizeof(sim_event_t));
+    bootEvent->time = startTime;
+    bootEvent->mote = mote;
+    bootEvent->force = TRUE;
+    bootEvent->data = NULL;
+    bootEvent->handle = sim_mote_boot_handle;
+    bootEvent->cleanup = sim_queue_cleanup_event;
+    sim_queue_insert(bootEvent);
+    
+    sim_set_node(tmp);
+  }
+
+}
diff --git a/tos/lib/tossim/SimSchedulerBasicP.nc b/tos/lib/tossim/SimSchedulerBasicP.nc
new file mode 100644
index 00000000..2fc8b90a
--- /dev/null
+++ b/tos/lib/tossim/SimSchedulerBasicP.nc
@@ -0,0 +1,228 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * SimSchedulerBasic implements the default TinyOS scheduler sequence
+ * (documented in TEP 106) for the TOSSIM platform. Its major departure
+ * from the standard TinyOS scheduler is that tasks are executed
+ * within TOSSIM events. This introduces task latency.
+ *
+ * @author Philip Levis
+ * @author Cory Sharp
+ * @date   August 19 2005
+ */
+
+
+#include <sim_event_queue.h>
+
+module SimSchedulerBasicP {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t id];
+}
+implementation
+{
+  enum
+  {
+    NUM_TASKS = uniqueCount("TinySchedulerC.TaskBasic"),
+    NO_TASK = 255,
+  };
+
+  uint8_t m_head;
+  uint8_t m_tail;
+  uint8_t m_next[NUM_TASKS];
+
+  /* This simulation state is kept on a per-node basis.
+     Better to take advantage of nesC's automatic state replication
+     than try to do it ourselves. */
+  bool sim_scheduler_event_pending = FALSE;
+  sim_event_t sim_scheduler_event;
+
+  int sim_config_task_latency() {return 100;}
+  
+
+  /* Only enqueue the event for execution if it is
+     not already enqueued. If there are more tasks in the
+     queue, the event will re-enqueue itself (see the handle
+     function). */
+  
+  void sim_scheduler_submit_event() {
+    if (sim_scheduler_event_pending == FALSE) {
+      sim_scheduler_event.time = sim_time() + sim_config_task_latency();
+      sim_queue_insert(&sim_scheduler_event);
+      sim_scheduler_event_pending = TRUE;
+    }
+  }
+
+  void sim_scheduler_event_handle(sim_event_t* e) {
+    sim_scheduler_event_pending = FALSE;
+
+    // If we successfully executed a task, re-enqueue the event. This
+    // will always succeed, as sim_scheduler_event_pending was just
+    // set to be false.  Note that this means there will be an extra
+    // execution (on an empty task queue). We could optimize this
+    // away, but this code is cleaner, and more accurately reflects
+    // the real TinyOS main loop.
+    
+    if (call Scheduler.runNextTask()) {
+      sim_scheduler_submit_event();
+    }
+  }
+
+  
+  /* Initialize a scheduler event. This should only be done
+   * once, when the scheduler is initialized. */
+  void sim_scheduler_event_init(sim_event_t* e) {
+    e->mote = sim_node();
+    e->force = 0;
+    e->data = NULL;
+    e->handle = sim_scheduler_event_handle;
+    e->cleanup = sim_queue_cleanup_none;
+  }
+
+
+
+  // Helper functions (internal functions) intentionally do not have atomic
+  // sections.  It is left as the duty of the exported interface functions to
+  // manage atomicity to minimize chances for binary code bloat.
+
+  // move the head forward
+  // if the head is at the end, mark the tail at the end, too
+  // mark the task as not in the queue
+  uint8_t popTask()
+  {
+    if( m_head != NO_TASK )
+    {
+      uint8_t id = m_head;
+      m_head = m_next[m_head];
+      if( m_head == NO_TASK )
+      {
+	m_tail = NO_TASK;
+      }
+      m_next[id] = NO_TASK;
+      return id;
+    }
+    else
+    {
+      return NO_TASK;
+    }
+  }
+  
+  bool isWaiting( uint8_t id )
+  {
+    return (m_next[id] != NO_TASK) || (m_tail == id);
+  }
+
+  bool pushTask( uint8_t id )
+  {
+    if( !isWaiting(id) )
+    {
+      if( m_head == NO_TASK )
+      {
+	m_head = id;
+	m_tail = id;
+      }
+      else
+      {
+	m_next[m_tail] = id;
+	m_tail = id;
+      }
+      return TRUE;
+    }
+    else
+    {
+      return FALSE;
+    }
+  }
+  
+  command void Scheduler.init()
+  {
+    dbg("Scheduler", "Initializing scheduler.\n");
+    atomic
+    {
+      memset( m_next, NO_TASK, sizeof(m_next) );
+      m_head = NO_TASK;
+      m_tail = NO_TASK;
+
+      sim_scheduler_event_pending = FALSE;
+      sim_scheduler_event_init(&sim_scheduler_event);
+    }
+  }
+  
+  command bool Scheduler.runNextTask()
+  {
+    uint8_t nextTask;
+    atomic
+    {
+      nextTask = popTask();
+      if( nextTask == NO_TASK )
+      {
+	dbg("Scheduler", "Told to run next task, but no task to run.\n");
+	return FALSE;
+      }
+    }
+    dbg("Scheduler", "Running task %hhu.\n", nextTask);
+    signal TaskBasic.runTask[nextTask]();
+    return TRUE;
+  }
+
+  command void Scheduler.taskLoop() {
+    // This should never run.
+  }
+  
+  /**
+   * Return SUCCESS if the post succeeded, EBUSY if it was already posted.
+   */
+  
+  async command error_t TaskBasic.postTask[uint8_t id]()
+  {
+    error_t result;
+    atomic {
+      result =  pushTask(id) ? SUCCESS : EBUSY;
+    }
+    if (result == SUCCESS) {
+      dbg("Scheduler", "Posting task %hhu.\n", id);
+      sim_scheduler_submit_event();
+    }
+    else {
+      dbg("Scheduler", "Posting task %hhu, but already posted.\n", id);
+    }
+    return result;
+  }
+
+  default event void TaskBasic.runTask[uint8_t id]()
+  {
+  }
+
+
+
+}
+
diff --git a/tos/lib/tossim/SimpleRadioModel.nc b/tos/lib/tossim/SimpleRadioModel.nc
new file mode 100644
index 00000000..601e602d
--- /dev/null
+++ b/tos/lib/tossim/SimpleRadioModel.nc
@@ -0,0 +1,53 @@
+// $Id: SimpleRadioModel.nc,v 1.5 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The interface to a simple radio model, which has per-link bit error
+ * probabilities and assumes complete interferences (the old TOSSIM
+ * story).
+ *
+ * @author Philip Levis
+ * @date   December 2 2005
+ */ 
+
+
+#include "TinyError.h"
+
+interface SimpleRadioModel {
+  command void putOnAirTo(int dest, message_t* msg, bool ack, sim_time_t endTime);
+  command void putOnAirToAll(message_t* msg, bool ack, sim_time_t endTime);
+  command bool clearChannel();
+  
+  event void acked(message_t* msg);
+  
+  event void receive(message_t* msg);
+}
diff --git a/tos/lib/tossim/TOSSIM.py b/tos/lib/tossim/TOSSIM.py
new file mode 100644
index 00000000..88fd9bfa
--- /dev/null
+++ b/tos/lib/tossim/TOSSIM.py
@@ -0,0 +1,268 @@
+# This file was automatically generated by SWIG (http://www.swig.org).
+# Version 1.3.33
+#
+# Don't modify this file, modify the SWIG interface instead.
+# This file is compatible with both classic and new-style classes.
+
+import _TOSSIM
+import new
+new_instancemethod = new.instancemethod
+try:
+    _swig_property = property
+except NameError:
+    pass # Python < 2.2 doesn't have 'property'.
+def _swig_setattr_nondynamic(self,class_type,name,value,static=1):
+    if (name == "thisown"): return self.this.own(value)
+    if (name == "this"):
+        if type(value).__name__ == 'PySwigObject':
+            self.__dict__[name] = value
+            return
+    method = class_type.__swig_setmethods__.get(name,None)
+    if method: return method(self,value)
+    if (not static) or hasattr(self,name):
+        self.__dict__[name] = value
+    else:
+        raise AttributeError("You cannot add attributes to %s" % self)
+
+def _swig_setattr(self,class_type,name,value):
+    return _swig_setattr_nondynamic(self,class_type,name,value,0)
+
+def _swig_getattr(self,class_type,name):
+    if (name == "thisown"): return self.this.own()
+    method = class_type.__swig_getmethods__.get(name,None)
+    if method: return method(self)
+    raise AttributeError,name
+
+def _swig_repr(self):
+    try: strthis = "proxy of " + self.this.__repr__()
+    except: strthis = ""
+    return "<%s.%s; %s >" % (self.__class__.__module__, self.__class__.__name__, strthis,)
+
+import types
+try:
+    _object = types.ObjectType
+    _newclass = 1
+except AttributeError:
+    class _object : pass
+    _newclass = 0
+del types
+
+
+class MAC(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, MAC, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, MAC, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_MAC(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_MAC
+    __del__ = lambda self : None;
+    def initHigh(*args): return _TOSSIM.MAC_initHigh(*args)
+    def initLow(*args): return _TOSSIM.MAC_initLow(*args)
+    def high(*args): return _TOSSIM.MAC_high(*args)
+    def low(*args): return _TOSSIM.MAC_low(*args)
+    def symbolsPerSec(*args): return _TOSSIM.MAC_symbolsPerSec(*args)
+    def bitsPerSymbol(*args): return _TOSSIM.MAC_bitsPerSymbol(*args)
+    def preambleLength(*args): return _TOSSIM.MAC_preambleLength(*args)
+    def exponentBase(*args): return _TOSSIM.MAC_exponentBase(*args)
+    def maxIterations(*args): return _TOSSIM.MAC_maxIterations(*args)
+    def minFreeSamples(*args): return _TOSSIM.MAC_minFreeSamples(*args)
+    def rxtxDelay(*args): return _TOSSIM.MAC_rxtxDelay(*args)
+    def ackTime(*args): return _TOSSIM.MAC_ackTime(*args)
+    def setInitHigh(*args): return _TOSSIM.MAC_setInitHigh(*args)
+    def setInitLow(*args): return _TOSSIM.MAC_setInitLow(*args)
+    def setHigh(*args): return _TOSSIM.MAC_setHigh(*args)
+    def setLow(*args): return _TOSSIM.MAC_setLow(*args)
+    def setSymbolsPerSec(*args): return _TOSSIM.MAC_setSymbolsPerSec(*args)
+    def setBitsBerSymbol(*args): return _TOSSIM.MAC_setBitsBerSymbol(*args)
+    def setPreambleLength(*args): return _TOSSIM.MAC_setPreambleLength(*args)
+    def setExponentBase(*args): return _TOSSIM.MAC_setExponentBase(*args)
+    def setMaxIterations(*args): return _TOSSIM.MAC_setMaxIterations(*args)
+    def setMinFreeSamples(*args): return _TOSSIM.MAC_setMinFreeSamples(*args)
+    def setRxtxDelay(*args): return _TOSSIM.MAC_setRxtxDelay(*args)
+    def setAckTime(*args): return _TOSSIM.MAC_setAckTime(*args)
+MAC_swigregister = _TOSSIM.MAC_swigregister
+MAC_swigregister(MAC)
+
+class Radio(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Radio, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Radio, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_Radio(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_Radio
+    __del__ = lambda self : None;
+    def add(*args): return _TOSSIM.Radio_add(*args)
+    def gain(*args): return _TOSSIM.Radio_gain(*args)
+    def connected(*args): return _TOSSIM.Radio_connected(*args)
+    def remove(*args): return _TOSSIM.Radio_remove(*args)
+    def setNoise(*args): return _TOSSIM.Radio_setNoise(*args)
+    def setSensitivity(*args): return _TOSSIM.Radio_setSensitivity(*args)
+Radio_swigregister = _TOSSIM.Radio_swigregister
+Radio_swigregister(Radio)
+
+class Packet(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Packet, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Packet, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_Packet(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_Packet
+    __del__ = lambda self : None;
+    def setSource(*args): return _TOSSIM.Packet_setSource(*args)
+    def source(*args): return _TOSSIM.Packet_source(*args)
+    def setDestination(*args): return _TOSSIM.Packet_setDestination(*args)
+    def destination(*args): return _TOSSIM.Packet_destination(*args)
+    def setLength(*args): return _TOSSIM.Packet_setLength(*args)
+    def length(*args): return _TOSSIM.Packet_length(*args)
+    def setType(*args): return _TOSSIM.Packet_setType(*args)
+    def type(*args): return _TOSSIM.Packet_type(*args)
+    def data(*args): return _TOSSIM.Packet_data(*args)
+    def setData(*args): return _TOSSIM.Packet_setData(*args)
+    def maxLength(*args): return _TOSSIM.Packet_maxLength(*args)
+    def setStrength(*args): return _TOSSIM.Packet_setStrength(*args)
+    def deliver(*args): return _TOSSIM.Packet_deliver(*args)
+    def deliverNow(*args): return _TOSSIM.Packet_deliverNow(*args)
+Packet_swigregister = _TOSSIM.Packet_swigregister
+Packet_swigregister(Packet)
+
+class variable_string_t(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, variable_string_t, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, variable_string_t, name)
+    __repr__ = _swig_repr
+    __swig_setmethods__["type"] = _TOSSIM.variable_string_t_type_set
+    __swig_getmethods__["type"] = _TOSSIM.variable_string_t_type_get
+    if _newclass:type = _swig_property(_TOSSIM.variable_string_t_type_get, _TOSSIM.variable_string_t_type_set)
+    __swig_setmethods__["ptr"] = _TOSSIM.variable_string_t_ptr_set
+    __swig_getmethods__["ptr"] = _TOSSIM.variable_string_t_ptr_get
+    if _newclass:ptr = _swig_property(_TOSSIM.variable_string_t_ptr_get, _TOSSIM.variable_string_t_ptr_set)
+    __swig_setmethods__["len"] = _TOSSIM.variable_string_t_len_set
+    __swig_getmethods__["len"] = _TOSSIM.variable_string_t_len_get
+    if _newclass:len = _swig_property(_TOSSIM.variable_string_t_len_get, _TOSSIM.variable_string_t_len_set)
+    __swig_setmethods__["isArray"] = _TOSSIM.variable_string_t_isArray_set
+    __swig_getmethods__["isArray"] = _TOSSIM.variable_string_t_isArray_get
+    if _newclass:isArray = _swig_property(_TOSSIM.variable_string_t_isArray_get, _TOSSIM.variable_string_t_isArray_set)
+    def __init__(self, *args): 
+        this = _TOSSIM.new_variable_string_t(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_variable_string_t
+    __del__ = lambda self : None;
+variable_string_t_swigregister = _TOSSIM.variable_string_t_swigregister
+variable_string_t_swigregister(variable_string_t)
+
+class nesc_app_t(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, nesc_app_t, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, nesc_app_t, name)
+    __repr__ = _swig_repr
+    __swig_setmethods__["numVariables"] = _TOSSIM.nesc_app_t_numVariables_set
+    __swig_getmethods__["numVariables"] = _TOSSIM.nesc_app_t_numVariables_get
+    if _newclass:numVariables = _swig_property(_TOSSIM.nesc_app_t_numVariables_get, _TOSSIM.nesc_app_t_numVariables_set)
+    __swig_setmethods__["variableNames"] = _TOSSIM.nesc_app_t_variableNames_set
+    __swig_getmethods__["variableNames"] = _TOSSIM.nesc_app_t_variableNames_get
+    if _newclass:variableNames = _swig_property(_TOSSIM.nesc_app_t_variableNames_get, _TOSSIM.nesc_app_t_variableNames_set)
+    __swig_setmethods__["variableTypes"] = _TOSSIM.nesc_app_t_variableTypes_set
+    __swig_getmethods__["variableTypes"] = _TOSSIM.nesc_app_t_variableTypes_get
+    if _newclass:variableTypes = _swig_property(_TOSSIM.nesc_app_t_variableTypes_get, _TOSSIM.nesc_app_t_variableTypes_set)
+    __swig_setmethods__["variableArray"] = _TOSSIM.nesc_app_t_variableArray_set
+    __swig_getmethods__["variableArray"] = _TOSSIM.nesc_app_t_variableArray_get
+    if _newclass:variableArray = _swig_property(_TOSSIM.nesc_app_t_variableArray_get, _TOSSIM.nesc_app_t_variableArray_set)
+    def __init__(self, *args): 
+        this = _TOSSIM.new_nesc_app_t(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_nesc_app_t
+    __del__ = lambda self : None;
+nesc_app_t_swigregister = _TOSSIM.nesc_app_t_swigregister
+nesc_app_t_swigregister(nesc_app_t)
+
+class Variable(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Variable, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Variable, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_Variable(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_Variable
+    __del__ = lambda self : None;
+    def getData(*args): return _TOSSIM.Variable_getData(*args)
+Variable_swigregister = _TOSSIM.Variable_swigregister
+Variable_swigregister(Variable)
+
+class Mote(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Mote, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Mote, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_Mote(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_Mote
+    __del__ = lambda self : None;
+    def id(*args): return _TOSSIM.Mote_id(*args)
+    def euid(*args): return _TOSSIM.Mote_euid(*args)
+    def setEuid(*args): return _TOSSIM.Mote_setEuid(*args)
+    def bootTime(*args): return _TOSSIM.Mote_bootTime(*args)
+    def bootAtTime(*args): return _TOSSIM.Mote_bootAtTime(*args)
+    def isOn(*args): return _TOSSIM.Mote_isOn(*args)
+    def turnOff(*args): return _TOSSIM.Mote_turnOff(*args)
+    def turnOn(*args): return _TOSSIM.Mote_turnOn(*args)
+    def getVariable(*args): return _TOSSIM.Mote_getVariable(*args)
+    def addNoiseTraceReading(*args): return _TOSSIM.Mote_addNoiseTraceReading(*args)
+    def createNoiseModel(*args): return _TOSSIM.Mote_createNoiseModel(*args)
+    def generateNoise(*args): return _TOSSIM.Mote_generateNoise(*args)
+Mote_swigregister = _TOSSIM.Mote_swigregister
+Mote_swigregister(Mote)
+
+class Tossim(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Tossim, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Tossim, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_Tossim(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_Tossim
+    __del__ = lambda self : None;
+    def init(*args): return _TOSSIM.Tossim_init(*args)
+    def time(*args): return _TOSSIM.Tossim_time(*args)
+    def ticksPerSecond(*args): return _TOSSIM.Tossim_ticksPerSecond(*args)
+    def setTime(*args): return _TOSSIM.Tossim_setTime(*args)
+    def timeStr(*args): return _TOSSIM.Tossim_timeStr(*args)
+    def currentNode(*args): return _TOSSIM.Tossim_currentNode(*args)
+    def getNode(*args): return _TOSSIM.Tossim_getNode(*args)
+    def setCurrentNode(*args): return _TOSSIM.Tossim_setCurrentNode(*args)
+    def addChannel(*args): return _TOSSIM.Tossim_addChannel(*args)
+    def removeChannel(*args): return _TOSSIM.Tossim_removeChannel(*args)
+    def randomSeed(*args): return _TOSSIM.Tossim_randomSeed(*args)
+    def runNextEvent(*args): return _TOSSIM.Tossim_runNextEvent(*args)
+    def mac(*args): return _TOSSIM.Tossim_mac(*args)
+    def radio(*args): return _TOSSIM.Tossim_radio(*args)
+    def newPacket(*args): return _TOSSIM.Tossim_newPacket(*args)
+Tossim_swigregister = _TOSSIM.Tossim_swigregister
+Tossim_swigregister(Tossim)
+
+
+
diff --git a/tos/lib/tossim/TinySchedulerC.nc b/tos/lib/tossim/TinySchedulerC.nc
new file mode 100644
index 00000000..cb504fc6
--- /dev/null
+++ b/tos/lib/tossim/TinySchedulerC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * TOSSIM-specific scheduler implementation, which models
+ * tasks as simulation events (in order to capture delay).
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id: TinySchedulerC.nc,v 1.5 2010-06-29 22:07:51 scipio Exp $
+
+configuration TinySchedulerC {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t id];
+}
+implementation {
+  components SimSchedulerBasicP as Sched;
+  Scheduler = Sched;
+  TaskBasic = Sched;
+}
+
diff --git a/tos/lib/tossim/TossimActiveMessageC.nc b/tos/lib/tossim/TossimActiveMessageC.nc
new file mode 100644
index 00000000..725fd70c
--- /dev/null
+++ b/tos/lib/tossim/TossimActiveMessageC.nc
@@ -0,0 +1,259 @@
+// $Id: TossimActiveMessageC.nc,v 1.7 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * The basic chip-independent TOSSIM Active Message layer for radio chips
+ * that do not have simulation support.
+ *
+ * @author Philip Levis
+ * @date December 2 2005
+ */
+
+#include <AM.h>
+
+module TossimActiveMessageC {
+  provides {
+    
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface TossimPacket;
+  }
+  uses {
+    interface TossimPacketModel as Model;
+    command am_addr_t amAddress();
+  }
+}
+implementation {
+
+  message_t buffer;
+  message_t* bufferPointer = &buffer;
+  
+  tossim_header_t* getHeader(message_t* amsg) {
+    return (tossim_header_t*)(amsg->data - sizeof(tossim_header_t));
+  }
+
+  tossim_metadata_t* getMetadata(message_t* amsg) {
+    return (tossim_metadata_t*)(&amsg->metadata);
+  }
+  
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+					  message_t* amsg,
+					  uint8_t len) {
+    error_t err;
+    tossim_header_t* header = getHeader(amsg);
+    dbg("AM", "AM: Sending packet (id=%hhu, len=%hhu) to %hu\n", id, len, addr);
+    header->type = id;
+    header->dest = addr;
+    header->src = call AMPacket.address();
+    header->length = len;
+    err = call Model.send((int)addr, amsg, len + sizeof(tossim_header_t) + sizeof(tossim_footer_t));
+    return err;
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call Model.cancel(msg);
+  }
+  
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command int8_t TossimPacket.strength(message_t* msg) {
+    return getMetadata(msg)->strength;
+  }
+  
+  event void Model.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+  /* Receiving a packet */
+
+  event void Model.receive(message_t* msg) {
+    uint8_t len;
+    void* payload;
+
+    memcpy(bufferPointer, msg, sizeof(message_t));
+    len = call Packet.payloadLength(bufferPointer);
+    payload = call Packet.getPayload(bufferPointer, call Packet.maxPayloadLength());
+
+    if (call AMPacket.isForMe(msg)) {
+      dbg("AM", "Received active message (%p) of type %hhu and length %hhu for me @ %s.\n", bufferPointer, call AMPacket.type(bufferPointer), len, sim_time_string());
+      bufferPointer = signal Receive.receive[call AMPacket.type(bufferPointer)](bufferPointer, payload, len);
+    }
+    else {
+      dbg("AM", "Snooped on active message of type %hhu and length %hhu for %hu @ %s.\n", call AMPacket.type(bufferPointer), len, call AMPacket.destination(bufferPointer), sim_time_string());
+      bufferPointer = signal Snoop.receive[call AMPacket.type(bufferPointer)](bufferPointer, payload, len);
+    }
+  }
+
+  event bool Model.shouldAck(message_t* msg) {
+    tossim_header_t* header = getHeader(msg);
+    if (header->dest == call amAddress()) {
+      dbg("Acks", "Received packet addressed to me so ack it\n");
+      return TRUE;
+    }
+    return FALSE;
+  }
+  
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    tossim_header_t* header = getHeader(amsg);
+    return header->dest;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    tossim_header_t* header = getHeader(amsg);
+    header->dest = addr;
+  }
+
+  command am_addr_t AMPacket.source(message_t* amsg) {
+    tossim_header_t* header = getHeader(amsg);
+    return header->src;
+  }
+
+  command void AMPacket.setSource(message_t* amsg, am_addr_t addr) {
+    tossim_header_t* header = getHeader(amsg);
+    header->src = addr;
+  }
+  
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+	    call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    tossim_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t t) {
+    tossim_header_t* header = getHeader(amsg);
+    header->type = t;
+  }
+ 
+  command void Packet.clear(message_t* msg) {}
+  
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return getHeader(msg)->length;
+  }
+  
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    getHeader(msg)->length = len;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+  
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    if (len <= TOSH_DATA_LENGTH) {
+      return msg->data;
+    }
+    else {
+      return NULL;
+    }
+  }
+
+  command am_group_t AMPacket.group(message_t* amsg) {
+    tossim_header_t* header = getHeader(amsg);
+    return header->group;
+  }
+  
+  command void AMPacket.setGroup(message_t* msg, am_group_t group) {
+    tossim_header_t* header = getHeader(msg);
+    header->group = group;
+  }
+
+  command am_group_t AMPacket.localGroup() {
+    return TOS_AM_GROUP;
+  }
+
+ default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+   return;
+ }
+
+ default command error_t Model.send(int node, message_t* msg, uint8_t len) {
+   return FAIL;
+ }
+
+ default command error_t Model.cancel(message_t* msg) {
+   return FAIL;
+ }
+
+ default command am_addr_t amAddress() {
+   return 0;
+ }
+  
+ void active_message_deliver_handle(sim_event_t* evt) {
+   message_t* m = (message_t*)evt->data;
+   dbg("Packet", "Delivering packet to %i at %s\n", (int)sim_node(), sim_time_string());
+   signal Model.receive(m);
+ }
+ 
+ sim_event_t* allocate_deliver_event(int node, message_t* msg, sim_time_t t) {
+   sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t));
+   evt->mote = node;
+   evt->time = t;
+   evt->handle = active_message_deliver_handle;
+   evt->cleanup = sim_queue_cleanup_event;
+   evt->cancelled = 0;
+   evt->force = 0;
+   evt->data = msg;
+   return evt;
+ }
+ 
+ void active_message_deliver(int node, message_t* msg, sim_time_t t) @C() @spontaneous() {
+   sim_event_t* evt = allocate_deliver_event(node, msg, t);
+   sim_queue_insert(evt);
+ }
+ 
+}
diff --git a/tos/lib/tossim/TossimPacket.nc b/tos/lib/tossim/TossimPacket.nc
new file mode 100644
index 00000000..0586b8b3
--- /dev/null
+++ b/tos/lib/tossim/TossimPacket.nc
@@ -0,0 +1,46 @@
+// $Id: TossimPacket.nc,v 1.1 2007-09-04 17:19:23 scipio Exp $
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Metadata interface for TOSSIM packets.
+ *
+ * @author Philip Levis
+ * @date   September 4 2007
+ */ 
+
+
+#include <TinyError.h>
+#include <message.h>
+
+interface TossimPacket {
+  command int8_t strength(message_t* msg);
+}
diff --git a/tos/lib/tossim/TossimPacketModel.nc b/tos/lib/tossim/TossimPacketModel.nc
new file mode 100644
index 00000000..ee84ae4c
--- /dev/null
+++ b/tos/lib/tossim/TossimPacketModel.nc
@@ -0,0 +1,88 @@
+// $Id: TossimPacketModel.nc,v 1.5 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The interface to a packet-level radio simulation, which may sit
+ * on top of higher fidelity simulators.
+ *
+ * @author Philip Levis
+ * @date   December 2 2005
+ */ 
+
+
+#include <TinyError.h>
+#include <message.h>
+
+interface TossimPacketModel {
+
+  /** 
+    * Send a packet with a data payload of <tt>len</tt>. To determine
+    * the maximum available size, use the Packet interface of the
+    * component providing Send. If send returns SUCCESS, then the
+    * component will signal the sendDone event in the future; if send
+    * returns an error, it will not signal sendDone.  Note that a
+    * component may accept a send request which it later finds it
+    * cannot satisfy; in this case, it will signal sendDone with an
+    * appropriate error code.
+    */ 
+  command error_t send(int node, message_t* msg, uint8_t len);
+
+  /**
+    * Cancel a requested transmission. Returns SUCCESS if the 
+    * transmission was cancelled properly (not sent in its
+    * entirety). Note that the component may not know
+    * if the send was successfully cancelled, if the radio is
+    * handling much of the logic; in this case, a component
+    * should be conservative and return an appropriate error code.
+    * A successful call to cancel must always result in a 
+    * sendFailed event, and never a sendSucceeded event.
+    */
+  command error_t cancel(message_t* msg);
+
+  /** 
+    * Signaled in response to an accepted send request. <tt>msg</tt>
+    * is the sent buffer, and <tt>error</tt> indicates whether the
+    * send was succesful, and if not, the cause of the failure.
+    */ 
+  event void sendDone(message_t* msg, error_t error);
+
+
+  /**
+   * Signal that a packet was received. Note that there is no buffer
+   * swap: a component using this interface must copy out the message
+   * if it needs it.
+   */
+  
+  event void receive(message_t* msg);
+
+  event bool shouldAck(message_t* msg);
+}
diff --git a/tos/lib/tossim/TossimPacketModelC.nc b/tos/lib/tossim/TossimPacketModelC.nc
new file mode 100644
index 00000000..871a0f47
--- /dev/null
+++ b/tos/lib/tossim/TossimPacketModelC.nc
@@ -0,0 +1,324 @@
+// $Id: TossimPacketModelC.nc,v 1.12 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * This packet-level radio component implements a basic CSMA
+ * algorithm. It derives its constants from sim_csma.c. The algorithm
+ * is as follows:
+ *
+ * Transmit iff you measure a clear channel min_free_samples() in a row.
+ * Sample up to max_iterations() times. If you do not detect a free
+ * channel in this time, signal sendDone with an error of EBUSY.
+ * If max_iterations() is zero, then sample indefinitely.
+ *
+ * On a send request, use an initial backoff in the range of
+ * init_low() to init_high().
+ * Subsequent backoffs are in the range
+         <pre>(low, high) * exponent_base() ^ iterations</pre>
+ *
+ * The default exponent_base is 1 (constant backoff).
+ *
+ *
+ * @author Philip Levis
+ * @date Dec 16 2005
+ *
+ */
+
+#include <TossimRadioMsg.h>
+#include <sim_csma.h>
+
+module TossimPacketModelC { 
+  provides {
+    interface Init;
+    interface SplitControl as Control;
+    interface PacketAcknowledgements;
+    interface TossimPacketModel as Packet;
+  }
+  uses interface GainRadioModel;
+}
+implementation {
+  bool initialized = FALSE;
+  bool running = FALSE;
+  uint8_t backoffCount;
+  uint8_t neededFreeSamples;
+  message_t* sending = NULL;
+  bool transmitting = FALSE;
+  uint8_t sendingLength = 0;
+  int destNode;
+  sim_event_t sendEvent;
+  
+  message_t receiveBuffer;
+  
+  tossim_metadata_t* getMetadata(message_t* msg) {
+    return (tossim_metadata_t*)(&msg->metadata);
+  }
+  
+  command error_t Init.init() {
+    dbg("TossimPacketModelC", "TossimPacketModelC: Init.init() called\n");
+    initialized = TRUE;
+    // We need to cancel in case an event is still lying around in the queue from
+    // before a reboot. Otherwise, the event will be executed normally (node is on),
+    // but its memory has been zeroed out.
+    sendEvent.cancelled = 1;
+    return SUCCESS;
+  }
+
+  task void startDoneTask() {
+    running = TRUE;
+    signal Control.startDone(SUCCESS);
+  }
+
+  task void stopDoneTask() {
+    running = FALSE;
+    signal Control.stopDone(SUCCESS);
+  }
+  
+  command error_t Control.start() {
+    if (!initialized) {
+      dbgerror("TossimPacketModelC", "TossimPacketModelC: Control.start() called before initialization!\n");
+      return FAIL;
+    }
+    dbg("TossimPacketModelC", "TossimPacketModelC: Control.start() called.\n");
+    post startDoneTask();
+    return SUCCESS;
+  }
+  command error_t Control.stop() {
+    if (!initialized) {
+      dbgerror("TossimPacketModelC", "TossimPacketModelC: Control.stop() called before initialization!\n");
+      return FAIL;
+    }
+    running = FALSE;
+    dbg("TossimPacketModelC", "TossimPacketModelC: Control.stop() called.\n");
+    post stopDoneTask();
+    return SUCCESS;
+  }
+
+  
+  
+  async command error_t PacketAcknowledgements.requestAck(message_t* msg) {
+    tossim_metadata_t* meta = getMetadata(msg);
+    meta->ack = TRUE;
+    return SUCCESS;
+  }
+
+  async command error_t PacketAcknowledgements.noAck(message_t* ack) {
+    tossim_metadata_t* meta = getMetadata(ack);
+    meta->ack = FALSE;
+    return SUCCESS;
+  }
+
+  async command error_t PacketAcknowledgements.wasAcked(message_t* ack) {
+    tossim_metadata_t* meta = getMetadata(ack);
+    return meta->ack;
+  }
+      
+  task void sendDoneTask() {
+    message_t* msg = sending;
+    tossim_metadata_t* meta = getMetadata(msg);
+    meta->ack = 0;
+    meta->strength = 0;
+    meta->time = 0;
+    sending = FALSE;
+    signal Packet.sendDone(msg, running? SUCCESS:EOFF);
+  }
+
+  command error_t Packet.cancel(message_t* msg) {
+    return FAIL;
+  }
+
+  void start_csma();
+
+  command error_t Packet.send(int dest, message_t* msg, uint8_t len) {
+    if (!initialized) {
+      dbgerror("TossimPacketModelC", "TossimPacketModelC: Send.send() called, but not initialized!\n");
+      return EOFF;
+    }
+    if (!running) {
+      dbgerror("TossimPacketModelC", "TossimPacketModelC: Send.send() called, but not running!\n");
+      return EOFF;
+
+    }
+    if (sending != NULL) {
+      return EBUSY;
+    }
+    sendingLength = len; 
+    sending = msg;
+    destNode = dest;
+    backoffCount = 0;
+    neededFreeSamples = sim_csma_min_free_samples();
+    start_csma();
+    return SUCCESS;
+  }
+
+  void send_backoff(sim_event_t* evt);
+  void send_transmit(sim_event_t* evt);
+  void send_transmit_done(sim_event_t* evt);
+  
+  void start_csma() {
+    sim_time_t first_sample;
+
+    // The backoff is in terms of symbols. So take a random number
+    // in the range of backoff times, and multiply it by the
+    // sim_time per symbol.
+    sim_time_t backoff = sim_random();
+    backoff %= (sim_csma_init_high() - sim_csma_init_low());
+    backoff += sim_csma_init_low();
+    backoff *= (sim_ticks_per_sec() / sim_csma_symbols_per_sec());
+    dbg("TossimPacketModelC", "Starting CMSA with %lli.\n", backoff);
+    first_sample = sim_time() + backoff;
+
+    sendEvent.mote = sim_node();
+    sendEvent.time = first_sample;
+    sendEvent.force = 0;
+    sendEvent.cancelled = 0;
+
+    sendEvent.handle = send_backoff;
+    sendEvent.cleanup = sim_queue_cleanup_none;
+    sim_queue_insert(&sendEvent);
+  }
+
+
+  void send_backoff(sim_event_t* evt) {
+    backoffCount++;
+    if (call GainRadioModel.clearChannel()) {
+      neededFreeSamples--;
+    }
+    else {
+      neededFreeSamples = sim_csma_min_free_samples();
+    }
+    if (neededFreeSamples == 0) {
+      sim_time_t delay;
+      delay = sim_csma_rxtx_delay();
+      delay *= (sim_ticks_per_sec() / sim_csma_symbols_per_sec());
+      evt->time += delay;
+      transmitting = TRUE;
+      call GainRadioModel.setPendingTransmission();
+      evt->handle = send_transmit;
+      sim_queue_insert(evt);
+    }
+    else if (sim_csma_max_iterations() == 0 ||
+	     backoffCount <= sim_csma_max_iterations()) {
+      sim_time_t backoff = sim_random();
+      sim_time_t modulo = sim_csma_high() - sim_csma_low();
+      modulo *= pow(sim_csma_exponent_base(), backoffCount);
+      backoff %= modulo;
+									
+      backoff += sim_csma_init_low();
+      backoff *= (sim_ticks_per_sec() / sim_csma_symbols_per_sec());
+      evt->time += backoff;
+      sim_queue_insert(evt);
+    }
+    else {
+      message_t* rval = sending;
+      sending = NULL;
+      dbg("TossimPacketModelC", "PACKET: Failed to send packet due to busy channel.\n");
+      signal Packet.sendDone(rval, EBUSY);
+    }
+  }
+
+  int sim_packet_header_length() {
+    return sizeof(tossim_header_t);
+  }
+  
+  void send_transmit(sim_event_t* evt) {
+    sim_time_t duration;
+    tossim_metadata_t* metadata = getMetadata(sending);
+
+    duration = 8 * sendingLength;
+    duration /= sim_csma_bits_per_symbol();
+    duration += sim_csma_preamble_length();
+    
+    if (metadata->ack) {
+      duration += sim_csma_ack_time();
+    }
+    duration *= (sim_ticks_per_sec() / sim_csma_symbols_per_sec());
+
+    evt->time += duration;
+    evt->handle = send_transmit_done;
+
+    dbg("TossimPacketModelC", "PACKET: Broadcasting packet to everyone.\n");
+    call GainRadioModel.putOnAirTo(destNode, sending, metadata->ack, evt->time, 0.0, 0.0);
+    metadata->ack = 0;
+
+    evt->time += (sim_csma_rxtx_delay() *  (sim_ticks_per_sec() / sim_csma_symbols_per_sec()));
+
+    dbg("TossimPacketModelC", "PACKET: Send done at %llu.\n", evt->time);
+	
+    sim_queue_insert(evt);
+  }
+
+  void send_transmit_done(sim_event_t* evt) {
+    message_t* rval = sending;
+    sending = NULL;
+    transmitting = FALSE;
+    dbg("TossimPacketModelC", "PACKET: Signaling send done at %llu.\n", sim_time());
+    signal Packet.sendDone(rval, running? SUCCESS:EOFF);
+  }
+
+  event void GainRadioModel.receive(message_t* msg) {
+    if (running && !transmitting) {
+      signal Packet.receive(msg);
+    }
+  }
+
+  uint8_t error = 0;
+  
+  event void GainRadioModel.acked(message_t* msg) {
+    if (running) {
+      tossim_metadata_t* metadata = getMetadata(sending);
+      metadata->ack = 1;
+      if (msg != sending) {
+	error = 1;
+	dbg("TossimPacketModelC", "Requested ack for 0x%x, but outgoing packet is 0x%x.\n", msg, sending);
+      }
+    }
+  }
+
+  event bool GainRadioModel.shouldAck(message_t* msg) {
+    if (running && !transmitting) {
+      return signal Packet.shouldAck(msg);
+    }
+    else {
+      return FALSE;
+    }
+  }
+
+  default event void Control.startDone(error_t err) {
+    return;
+  }
+ 
+  default event void Control.stopDone(error_t err) {
+    return;
+  }
+}
+
diff --git a/tos/lib/tossim/TossimRadioMsg.h b/tos/lib/tossim/TossimRadioMsg.h
new file mode 100644
index 00000000..e9df8dbc
--- /dev/null
+++ b/tos/lib/tossim/TossimRadioMsg.h
@@ -0,0 +1,24 @@
+#ifndef TOSSIM_RADIO_MSG_H
+#define TOSSIM_RADIO_MSG_H
+
+#include "AM.h"
+
+typedef nx_struct tossim_header {
+  nx_am_addr_t dest;
+  nx_am_addr_t src;
+  nx_uint8_t length;
+  nx_am_group_t group;
+  nx_am_id_t type;
+} tossim_header_t;
+
+typedef nx_struct tossim_footer {
+  nxle_uint16_t crc;  
+} tossim_footer_t;
+
+typedef nx_struct tossim_metadata {
+  nx_int8_t strength;
+  nx_uint8_t ack;
+  nx_uint16_t time;
+} tossim_metadata_t;
+
+#endif
diff --git a/tos/lib/tossim/UscGainInterferenceModelC.nc b/tos/lib/tossim/UscGainInterferenceModelC.nc
new file mode 100644
index 00000000..8def4da4
--- /dev/null
+++ b/tos/lib/tossim/UscGainInterferenceModelC.nc
@@ -0,0 +1,298 @@
+// $Id: UscGainInterferenceModelC.nc,v 1.6 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * This interference model is based off experimental data gathered
+ * from mica2 nodes by Dongjin Son and Bhaskar Krishnamachari at USC.
+ * It simplifies their observations in two ways. First, rather than
+ * a smooth curve, this model makes a binary interference assumption
+ * when the packets are within 3dBm of each other (their curve is very
+ * sharp, so this seems like an OK simplification for now). Second,
+ * it uses an additive signal strength model for interference. Their
+ * results (as one might expect from colliding sinusoids) show that
+ * interference signal strength is more complex than this.
+ *
+ * @author Philip Levis
+ * @date   Jun 1 2006
+ */ 
+
+#include <sim_gain.h>
+
+module UscGainInterferenceModelC {
+  provides interface GainRadioModel as Model;
+}
+
+implementation {
+
+  
+  message_t* outgoing; // If I'm sending, this is my outgoing packet
+  bool requestAck;
+  bool receiving = 0;  // Whether or not I think I'm receiving a packet
+  struct receive_message;
+  typedef struct receive_message receive_message_t;
+  
+  struct receive_message {
+    int source;
+    sim_time_t start;
+    sim_time_t end;
+    double power;
+    bool lost;
+    bool ack;
+    message_t* msg;
+    receive_message_t* next;
+  };
+
+  receive_message_t* outstandingReceptionHead = NULL;
+
+  receive_message_t* allocate_receive_message();
+  sim_event_t* allocate_receive_event(sim_time_t t, receive_message_t* m);
+
+  /**
+   * Heard signal is equal to the signal strength of ambient noise
+   * plus the signal strength of all transmissions. The pow() and
+   * log() calls transform dBm into energy and back.
+   */
+  
+  double heardSignal() {
+    receive_message_t* current = outstandingReceptionHead;
+    double localNoise = sim_gain_sample_noise(sim_node());
+    double sig = pow(10.0, localNoise / 10.0);
+    dbg("Gain", "Computing noise @ %s: %0.2f", sim_time_string(), localNoise);
+    while (current != NULL) {
+      sig += pow(10.0, current->power / 10.0);
+      	dbg_clear("Gain", " ");
+      if (current->power >= 0.0) {
+	dbg_clear("Gain", "+");
+      }
+      dbg_clear("Gain", "%0.2f ", current->power);
+      current = current->next;
+    }
+    dbg_clear("Gain", " = %0.2f\n", 10.0 * log(sig) / log(10.0));
+    return 10.0 * log(sig) / log(10.0);
+  }
+  
+  void sim_gain_ack_handle(sim_event_t* evt)  {
+    if (outgoing != NULL && requestAck && sim_mote_is_on(sim_node())) {
+      signal Model.acked(outgoing);
+    }
+  }
+
+  sim_event_t receiveEvent;
+  // This clear threshold comes from the CC2420 data sheet
+  double clearThreshold = -95.0;
+  bool collision = FALSE;
+  message_t* incoming = NULL;
+  int incomingSource;
+
+  command void Model.setClearValue(double value) {
+    clearThreshold = value;
+    dbg("Gain", "Setting clear threshold to %f\n", clearThreshold);
+	
+  }
+  
+  command bool Model.clearChannel() {
+    double channel = heardSignal();
+    dbg("Gain", "Checking clear channel @ %s: %f <= %f \n", sim_time_string(), channel, clearThreshold);
+    return channel < clearThreshold;
+  }
+
+  void sim_gain_schedule_ack(int source, sim_time_t t) {
+    sim_event_t* ackEvent = (sim_event_t*)malloc(sizeof(sim_event_t));
+    ackEvent->mote = source;
+    ackEvent->force = 1;
+    ackEvent->cancelled = 0;
+    ackEvent->time = t;
+    ackEvent->handle = sim_gain_ack_handle;
+    ackEvent->cleanup = sim_queue_cleanup_event;
+    sim_queue_insert(ackEvent);
+  }
+
+  void sim_gain_receive_handle(sim_event_t* evt) {
+    receive_message_t* mine = (receive_message_t*)evt->data;
+    receive_message_t* predecessor = NULL;
+    receive_message_t* list = outstandingReceptionHead;
+    dbg("Gain", "Handling reception event @ %s.\n", sim_time_string());
+    // Scan the list for the node which precedes the one pointing
+    // to the received packet.
+    while (list != NULL) {
+      if (list->next == mine) {
+	predecessor = list;
+      }
+      if (list != mine) {
+	if ((list->power - sim_gain_sensitivity()) < mine->power) {
+	  dbg("Gain", "Lost packet from %i as I concurrently received a packet stronger than %lf\n", list->source, list->power);
+	  list->lost = 1;
+	}
+      }
+      list = list->next;
+    }
+    // Remove the received packet from the oustanding list by updating
+    // the list pointers: A->B->C becomes A->C. If the received packet
+    // is the head of the queue, then update the head pointer.
+    if (predecessor) {
+      predecessor->next = mine->next;
+    }
+    else if (mine == outstandingReceptionHead) { // must be head
+      outstandingReceptionHead = mine->next;
+    }
+    else {
+      dbgerror("Gain", "Incoming packet list structure is corrupted: entry is not the head and no entry points to it.\n");
+    }
+    // Because the packet has been removed from the queue, it is not
+    // included in heardSignal(): this line tests if the Signal of the
+    // packet is above the threshold over the Noise of all other RF
+    // energy sources (local noise, other packets, etc.).
+    if ((mine->power - sim_gain_sensitivity()) < heardSignal()) {
+      dbg("Gain", "Lost packet from %i as its power %lf was below sensitivity threshold\n", mine->source, mine->power);
+      mine->lost = 1;
+    }
+    
+    if (!mine->lost) {
+      dbg_clear("Gain", "  -signaling reception, ");
+      signal Model.receive(mine->msg);
+      if (mine->ack) {
+        dbg_clear("Gain", " acknowledgment requested, ");
+      }
+      else {
+        dbg_clear("Gain", " no acknowledgment requested.\n");
+      }
+      // If we scheduled an ack, receiving = 0 when it completes
+      if (mine->ack && signal Model.shouldAck(mine->msg)) {
+        dbg_clear("Gain", " scheduling ack.\n");
+	sim_gain_schedule_ack(mine->source, sim_time() + 1); 
+      }
+      // We're searching for new packets again
+      receiving = 0;
+    } // If the packet was lost, then we're searching for new packets again
+    else {
+      receiving = 0;
+      dbg_clear("Gain", "  -packet was lost.\n");
+    }
+    free(mine);
+  }
+  
+  
+  // Create a record that a node is receiving a packet,
+  // enqueue a receive event to figure out what happens.
+  void enqueue_receive_event(int source, sim_time_t endTime, message_t* msg, bool receive, double power) {
+    sim_event_t* evt;
+    receive_message_t* list;
+    receive_message_t* rcv = allocate_receive_message();
+    double sigStr = heardSignal();
+    rcv->source = source;
+    rcv->start = sim_time();
+    rcv->end = endTime;
+    rcv->power = power;
+    rcv->msg = msg;
+    rcv->lost = 0;
+    rcv->ack = receive;
+    
+    // If I'm off, I never receive the packet, but I need to keep track of
+    // it in case I turn on and someone else starts sending me a weaker
+    // packet. So I don't set receiving to 1, but I keep track of
+    // the signal strength.
+    if (!sim_mote_is_on(sim_node())) { 
+      dbg("Gain", "Lost packet from %i due to %i being off\n", source, sim_node());
+      rcv->lost = 1;
+    }
+    else if ((sigStr + sim_gain_sensitivity()) >= power) {
+      dbg("Gain", "Lost packet from %i due to power being below reception threshold (%f >= %f)\n", source, sigStr, power);
+      rcv->lost = 1;
+    }
+    else if (receiving) {
+      dbg("Gain", "Lost packet from %i due to being in the midst of a reception.\n", source);
+      rcv->lost = 1;
+    }
+    else { // We are on, are not receiving a packet, and the packet is above the noise floor
+      receiving = 1;
+    }
+
+    list = outstandingReceptionHead;
+    while (list != NULL) {
+      if ((list->power - sim_gain_sensitivity()) < power) {
+	dbg("Gain", "Lost packet from %i as I concurrently received a packet from %i stronger than %lf\n", list->source, source, list->power);
+	list->lost = 1;
+      }
+      list = list->next;
+    }
+    
+    rcv->next = outstandingReceptionHead;
+    
+    outstandingReceptionHead = rcv;
+    evt = allocate_receive_event(endTime, rcv);
+    sim_queue_insert(evt);
+  }
+  
+  void sim_gain_put(int dest, message_t* msg, sim_time_t endTime, bool receive, double power) {
+    int prevNode = sim_node();
+    dbg("Gain", "Enqueing reception event for %i at %llu.\n", dest, endTime);
+    sim_set_node(dest);
+    enqueue_receive_event(prevNode, endTime, msg, receive, power);
+    sim_set_node(prevNode);
+  }
+
+  command void Model.putOnAirTo(int dest, message_t* msg, bool ack, sim_time_t endTime, double power) {
+    gain_entry_t* link = sim_gain_first(sim_node());
+    requestAck = ack;
+    outgoing = msg;
+    dbg("Gain", "Node %i transmitting to %i, finishes at %llu.\n", sim_node(), dest, endTime);
+
+    while (link != NULL) {
+      int other = link->mote;
+      sim_gain_put(other, msg, endTime, ack && (other == dest), power + link->gain);
+      link = sim_gain_next(link);
+    }
+  }
+    
+
+  
+  
+ default event void Model.receive(message_t* msg) {}
+
+ sim_event_t* allocate_receive_event(sim_time_t endTime, receive_message_t* msg) {
+   sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t));
+   evt->mote = sim_node();
+   evt->time = endTime;
+   evt->handle = sim_gain_receive_handle;
+   evt->cleanup = sim_queue_cleanup_event;
+   evt->cancelled = 0;
+   evt->force = 1; // Need to keep track of air even when node is off
+   evt->data = msg;
+   return evt;
+ }
+
+ receive_message_t* allocate_receive_message() {
+   return (receive_message_t*)malloc(sizeof(receive_message_t));
+ }
+ 
+}
diff --git a/tos/lib/tossim/csma.c b/tos/lib/tossim/csma.c
new file mode 100644
index 00000000..3d8f98be
--- /dev/null
+++ b/tos/lib/tossim/csma.c
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * C++ implementation of the default TOSSIM CSMA model.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#include <csma.h>
+
+Csma::Csma() {}
+Csma::~Csma() {}
+
+int Csma::initHigh() {return sim_csma_init_high();}
+int Csma::initLow() {return sim_csma_init_low();}
+int Csma::high() {return sim_csma_high();}
+int Csma::low() {return sim_csma_low();}
+int Csma::symbolsPerSec() {return sim_csma_symbols_per_sec();}
+int Csma::bitsPerSymbol() {return sim_csma_bits_per_symbol();}
+int Csma::preambleLength() {return sim_csma_preamble_length();}
+int Csma::exponentBase() {return sim_csma_exponent_base();}
+int Csma::maxIterations() {return sim_csma_max_iterations();}
+int Csma::minFreeSamples() {return sim_csma_min_free_samples();}
+int Csma::rxtxDelay() {return sim_csma_rxtx_delay();}
+int Csma::ackTime() {return sim_csma_ack_time();}
+
+void Csma::setInitHigh(int val) {sim_csma_set_init_high(val);}
+void Csma::setInitLow(int val) {sim_csma_set_init_low(val);}
+void Csma::setHigh(int val) {sim_csma_set_high(val);}
+void Csma::setLow(int val) {sim_csma_set_low(val);}
+void Csma::setSymbolsPerSec(int val) {sim_csma_set_symbols_per_sec(val);}
+void Csma::setBitsBerSymbol(int val) {sim_csma_set_bits_per_symbol(val);}
+void Csma::setPreambleLength(int val) {sim_csma_set_preamble_length(val);}
+void Csma::setExponentBase(int val) {sim_csma_set_exponent_base(val);}
+void Csma::setMaxIterations(int val) {sim_csma_set_max_iterations(val);}
+void Csma::setMinFreeSamples(int val) {sim_csma_set_min_free_samples(val);}
+void Csma::setRxtxDelay(int val) {sim_csma_set_rxtx_delay(val);}
+void Csma::setAckTime(int val); {sim_csma_set_ack_time(val);}
+
+#endif
diff --git a/tos/lib/tossim/csma.h b/tos/lib/tossim/csma.h
new file mode 100644
index 00000000..e3322139
--- /dev/null
+++ b/tos/lib/tossim/csma.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * Configuration parameters for a CSMA link.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#ifndef CSMA_H_INCLUDED
+#define CSMA_H_INCLUDED
+
+class Csma {
+ public:
+  Csma();
+  ~Csma();
+
+  int initHigh();
+  int initLow();
+  int high();
+  int low();
+  int symbolsPerSec();
+  int bitsPerSymbol();
+  int preambleLength(); // in symbols
+  int exponentBase();
+  int maxIterations();
+  int minFreeSamples();
+  int rxtxDelay();
+  int ackTime(); // in symbols
+  
+  void setInitHigh(int val);
+  void setInitLow(int val);
+  void setHigh(int val);
+  void setLow(int val);
+  void setSymbolsPerSec(int val);
+  void setBitsBerSymbol(int val);
+  void setPreambleLength(int val); // in symbols
+  void setExponentBase(int val);
+  void setMaxIterations(int val);
+  void setMinFreeSamples(int val);
+  void setRxtxDelay(int val);
+  void setAckTime(int val); // in symbols int 
+}
+
+#endif
diff --git a/tos/lib/tossim/examples/packets.py b/tos/lib/tossim/examples/packets.py
new file mode 100644
index 00000000..4f639eaa
--- /dev/null
+++ b/tos/lib/tossim/examples/packets.py
@@ -0,0 +1,52 @@
+# This file is an example Python script from the TOSSIM tutorial.
+# It is intended to be used with the RadioCountToLeds application.
+
+import sys
+from TOSSIM import *
+from RadioCountMsg import *
+
+t = Tossim([])
+m = t.mac();
+r = t.radio();
+
+t.addChannel("RadioCountToLedsC", sys.stdout);
+t.addChannel("LedsC", sys.stdout);
+
+for i in range(0, 2):
+  m = t.getNode(i);
+  m.bootAtTime((31 + t.ticksPerSecond() / 10) * i + 1);
+
+f = open("topo.txt", "r")
+lines = f.readlines()
+for line in lines:
+  s = line.split()
+  if (len(s) > 0):
+    if (s[0] == "gain"):
+      r.add(int(s[1]), int(s[2]), float(s[3]))
+
+noise = open("meyer-heavy.txt", "r")
+lines = noise.readlines()
+for line in lines:
+  str = line.strip()
+  if (str != ""):
+    val = int(str)
+    for i in range(0, 2):
+      t.getNode(i).addNoiseTraceReading(val)
+
+for i in range(0, 60):
+  t.runNextEvent();
+
+msg = RadioCountMsg()
+msg.set_counter(7);
+pkt = t.newPacket();
+pkt.setData(msg.data)
+pkt.setType(msg.get_amType())
+pkt.setDestination(0)
+
+print "Delivering ", msg, " to 0 at ", str(t.time() + 3);
+pkt.deliver(0, t.time() + 3)
+
+
+for i in range(0, 20):
+  t.runNextEvent();
+
diff --git a/tos/lib/tossim/examples/variables.py b/tos/lib/tossim/examples/variables.py
new file mode 100644
index 00000000..58b24c4e
--- /dev/null
+++ b/tos/lib/tossim/examples/variables.py
@@ -0,0 +1,30 @@
+# This is an example script from the TOSSIM tutorials.
+# It can be used with any TinyOS application.
+
+from tinyos.tossim.TossimApp import *
+from TOSSIM import *
+
+n = NescApp()
+t = Tossim(n.variables.variables())
+m = t.getNode(0)
+
+for i in range(0, 1):
+  m = t.getNode(i);
+  time = ((79 + t.ticksPerSecond() / 100) * i + 1)
+  m.bootAtTime(time);
+  print "Mote " + str(i) + " set to boot at " + str(time);
+
+for i in range(0, 500):
+  t.runNextEvent();
+
+v = m.getVariable("SimMoteP.startTime")
+v2 = m.getVariable("SimSchedulerBasicP.m_head");
+
+print "start time: <", v.getData(), ">\nnext task: <", v2.getData(), ">"
+
+for i in range(0, 500):
+  t.runNextEvent();
+
+print "start time: <", v.getData(), ">\nnext task: <", v2.getData(), ">"
+
+
diff --git a/tos/lib/tossim/gain/line70nodes.txt b/tos/lib/tossim/gain/line70nodes.txt
new file mode 100644
index 00000000..e9bbcd68
--- /dev/null
+++ b/tos/lib/tossim/gain/line70nodes.txt
@@ -0,0 +1,75 @@
+% This is the sample topology file (chain topology), the node id should start with 0
+% The format is 
+%   nodeid  x  y
+
+0	0	0
+1	1	0
+2	2	0
+3	3	0
+4	4	0
+5	5	0
+6	6	0
+7	7	0
+8	8	0
+9	9	0
+10	10	0
+11	11	0
+12	12	0
+13	13	0
+14	14	0
+15	15	0
+16	16	0
+17	17	0
+18	18	0
+19	19	0
+20	20	0
+21	21	0
+22	22	0
+23	23	0
+24	24	0
+25	25	0
+26	26	0
+27	27	0
+28	28	0
+29	29	0
+30	30	0
+31	31	0
+32	32	0
+33	33	0
+34	34	0
+35	35	0
+36	36	0
+37	37	0
+38	38	0
+39	39	0
+40	40	0
+41	41	0
+42	42	0
+43	43	0
+44	44	0
+45	45	0
+46	46	0
+47	47	0
+48	48	0
+49	49	0
+50	50	0
+51	51	0
+52	52	0
+53	53	0
+54	54	0
+55	55	0
+56	56	0
+57	57	0
+58	58	0
+59	59	0
+60	60	0
+61	61	0
+62	62	0
+63	63	0
+64	64	0
+65	65	0
+66	66	0
+67	67	0
+68	68	0
+69	69	0
+70	70	0
diff --git a/tos/lib/tossim/gain/mica2grid.txt b/tos/lib/tossim/gain/mica2grid.txt
new file mode 100644
index 00000000..67418f4d
--- /dev/null
+++ b/tos/lib/tossim/gain/mica2grid.txt
@@ -0,0 +1,143 @@
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+%
+% Copyright (c) 2004 The University of Southern California"
+% All rights reserved.
+%
+ % Redistribution and use in source and binary forms, with or without
+ % modification, are permitted provided that the following conditions
+ % are met:
+ %
+ % - Redistributions of source code must retain the above copyright
+ %   notice, this list of conditions and the following disclaimer.
+ % - Redistributions in binary form must reproduce the above copyright
+ %   notice, this list of conditions and the following disclaimer in the
+ %   documentation and/or other materials provided with the
+ %   distribution.
+ % - Neither the name of the copyright holders nor the names of
+ %   its contributors may be used to endorse or promote products derived
+ %   from this software without specific prior written permission.
+ %
+ % THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ % "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ % LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ % FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ % THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ % INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ % (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ % SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ % HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ % STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ % ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ % OF THE POSSIBILITY OF SUCH DAMAGE..
+%
+% Author:		Marco Zuniga
+% Director: Prof. Bhaskar Krishnamachari
+% Autonomous Networks Research Group, University of Southern California
+% http://ceng.usc.edu/~anrg/
+% Contact: marcozun@usc.edu
+%
+% Date last modified:	2004/06/23 marcozun
+%
+% Description:  configuration file for link gain model
+%
+% This example configuration file will produce a network topology for TOSSIM
+% that represents a mica2 network deployed in a tight (1m spacing) 15x15 grid.
+%
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+%%%%%%%%%%%%%%%%%%%%%%
+%
+% Channel Parameters
+%
+%%%%%%%%%%%%%%%%%%%%%%
+%
+% The channel model is based on the Log-Normal Shadowing Path Loss Model.
+% It defines the gain at which other nodes receive a signal when a node
+% transmits. All values must be positive. Parameters:
+%     PATH_LOSS_EXPONENT           an adimensional constant
+%     SHADOWING_STANDARD_DEVIATION in dB
+%     PL_D0                        close-in reference pathloss, in dB 
+%     D0                           close-in reference distance, in meters 
+
+PATH_LOSS_EXPONENT = 3.0;
+SHADOWING_STANDARD_DEVIATION = 4.0;
+PL_D0 = 55.0;
+D0 = 1.0;
+
+%%%%%%%%%%%%%%%%%%%%
+%
+% Radio Parameters 
+%
+%%%%%%%%%%%%%%%%%%%%
+%
+% The radio parameters provide a mechanism to incorporate node variations.
+% These variations introduce link asymmetry. The variations have a static
+% and a dynamic component. WHITE_GAUSSIAN_NOISE encodes the dynamic
+% variation of a node's noise floor readings at runtime, while the
+% covariance matrix encodes the static differences in noise floor and
+% output strength across nodes.
+%
+% Parameters:
+%     NOISE_FLOOR          the baseline noise floor in dBm
+%     WHITE_GAUSSIAN_NOISE the standard deviation of noise measurements
+%     S11, S12, S21, S22   the values of the covariance matrix that
+%                          represents hardware variations.
+%     S11                  the per-node variance of the noise floor
+%     S12                  covariance between noise floor and output power
+%     S21                  must be equal to S12
+%     S22                  the per-node variance of output power
+
+
+NOISE_FLOOR = -105.0;
+WHITE_GAUSSIAN_NOISE = 4;
+
+% These values are for MICA2 radios.
+S11 = 3.7;
+S12 = -3.3;
+S21 = -3.3;
+S22 = 6.0;
+
+%%%%%%%%%%%%%%%%%%%%%%%
+%		  
+% Topology Parameters 
+%		  
+%%%%%%%%%%%%%%%%%%%%%%%
+%
+% Terrain dimensions and node positions are in meters.
+% Parameters:
+%     TOPOLOGY       the basic topology to use, whose valid values are:
+%                      1 for a GRID
+%                      2 for a UNIFORM distribution
+%                      3 for a RANDOM distribution
+%                      4 for positions read from a FILE
+%                    details:
+%                      o GRID: Node placement starts at (0, 0). You must
+%                      specify the GRID_UNIT variable (spacing in meters).
+%                      The number of nodes has to be square of an integer.
+%                      o UNIFORM: Based on the number of nodes, the physical
+%                      terrain is divided into a number of cells. Within
+%                      each cell, a node is placed randomly.
+%                      o RANDOM: Nodes are placed randomly within the physical
+%                      terrain.
+%                      o FILE: Position of nodes is read from TOPOLOGY_FILE
+%                      (user-defined). The format of the file is:
+%                           nodeid  Xcoordinate  Ycoordinate
+%                      The nodeid values must start with 0.
+%     TERRAIN_DIMENSIONS_X the width of the terrain area (meters)
+%     TERRAIN_DIMENSIONS_Y the depth of the terrain area (meters)
+%                          
+
+TOPOLOGY = 1;
+GRID_UNIT = 5.0;
+NUMBER_OF_NODES = 225;
+
+% topology file provided by user
+%TOPOLOGY_FILE = topologyFile.m;
+
+% Physical terrain (meters), not required when user provides topology file
+% nor in GRID topologies.
+% The density (NUMBER_OF_NODES / area) can not be higher than
+% 0.5 nodes / D0^2.
+%TERRAIN_DIMENSIONS_X = 50.0;
+%TERRAIN_DIMENSIONS_Y = 50.0;
+
diff --git a/tos/lib/tossim/generate-swig.bash b/tos/lib/tossim/generate-swig.bash
new file mode 100644
index 00000000..254a5a63
--- /dev/null
+++ b/tos/lib/tossim/generate-swig.bash
@@ -0,0 +1,39 @@
+#!/bin/bash
+
+# Copyright (c) 2005 Stanford University. All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Simple script that generates the Python interfaces to TOSSIM.
+#
+# Author: Philip Levis
+#
+# $Id: generate-swig.bash,v 1.5 2010-06-29 22:07:51 scipio Exp $
+
+swig -shadow -python -c++ tossim.i
+
diff --git a/tos/lib/tossim/hardware.h b/tos/lib/tossim/hardware.h
new file mode 100644
index 00000000..4e31f1bd
--- /dev/null
+++ b/tos/lib/tossim/hardware.h
@@ -0,0 +1 @@
+#include <platform_hardware.h>
diff --git a/tos/lib/tossim/hashtable.c b/tos/lib/tossim/hashtable.c
new file mode 100644
index 00000000..dfd450b7
--- /dev/null
+++ b/tos/lib/tossim/hashtable.c
@@ -0,0 +1,278 @@
+/* Copyright (C) 2004 Christopher Clark <firstname.lastname@cl.cam.ac.uk> */
+
+#include "hashtable.h"
+#include "hashtable_private.h"
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <math.h>
+
+/*
+Credit for primes table: Aaron Krowne
+ http://br.endernet.org/~akrowne/
+ http://planetmath.org/encyclopedia/GoodHashTablePrimes.html
+*/
+static const unsigned int primes[] = {
+53, 97, 193, 389,
+769, 1543, 3079, 6151,
+12289, 24593, 49157, 98317,
+196613, 393241, 786433, 1572869,
+3145739, 6291469, 12582917, 25165843,
+50331653, 100663319, 201326611, 402653189,
+805306457, 1610612741
+};
+const unsigned int prime_table_length = sizeof(primes)/sizeof(primes[0]);
+const float max_load_factor = 0.65;
+
+
+
+/*****************************************************************************/
+struct hashtable *
+create_hashtable(unsigned int minsize,
+                 unsigned int (*hashf) (void*),
+                 int (*eqf) (void*,void*))
+{
+    struct hashtable *h;
+    unsigned int pindex, size = primes[0];
+    /* Check requested hashtable isn't too large */
+    if (minsize > (1u << 30)) return NULL;
+    /* Enforce size as prime */
+    for (pindex=0; pindex < prime_table_length; pindex++) {
+        if (primes[pindex] > minsize) { size = primes[pindex]; break; }
+    }
+    h = (struct hashtable *)malloc(sizeof(struct hashtable));
+    if (NULL == h) return NULL; /*oom*/
+    h->table = (struct entry **)malloc(sizeof(struct entry*) * size);
+    if (NULL == h->table) { free(h); return NULL; } /*oom*/
+    memset(h->table, 0, size * sizeof(struct entry *));
+    h->tablelength  = size;
+    h->primeindex   = pindex;
+    h->entrycount   = 0;
+    h->hashfn       = hashf;
+    h->eqfn         = eqf;
+    h->loadlimit    = (unsigned int) ceil(size * max_load_factor);
+    return h;
+}
+
+/*****************************************************************************/
+unsigned int
+hash(struct hashtable *h, void *k)
+{
+    /* Aim to protect against poor hash functions by adding logic here
+     * - logic taken from java 1.4 hashtable source */
+    unsigned int i = h->hashfn(k);
+    i += ~(i << 9);
+    i ^=  ((i >> 14) | (i << 18)); /* >>> */
+    i +=  (i << 4);
+    i ^=  ((i >> 10) | (i << 22)); /* >>> */
+    return i;
+}
+
+/*****************************************************************************/
+static int
+hashtable_expand(struct hashtable *h)
+{
+    /* Double the size of the table to accomodate more entries */
+    struct entry **newtable;
+    struct entry *e;
+    struct entry **pE;
+    unsigned int newsize, i, tindex;
+    /* Check we're not hitting max capacity */
+    if (h->primeindex == (prime_table_length - 1)) return 0;
+    newsize = primes[++(h->primeindex)];
+
+    newtable = (struct entry **)malloc(sizeof(struct entry*) * newsize);
+    if (NULL != newtable)
+    {
+        memset(newtable, 0, newsize * sizeof(struct entry *));
+        /* This algorithm is not 'stable'. ie. it reverses the list
+         * when it transfers entries between the tables */
+        for (i = 0; i < h->tablelength; i++) {
+            while (NULL != (e = h->table[i])) {
+                h->table[i] = e->next;
+                tindex = indexFor(newsize,e->h);
+                e->next = newtable[tindex];
+                newtable[tindex] = e;
+            }
+        }
+        free(h->table);
+        h->table = newtable;
+    }
+    /* Plan B: realloc instead */
+    else 
+    {
+        newtable = (struct entry **)
+                   realloc(h->table, newsize * sizeof(struct entry *));
+        if (NULL == newtable) { (h->primeindex)--; return 0; }
+        h->table = newtable;
+        memset(newtable[h->tablelength], 0, newsize - h->tablelength);
+        for (i = 0; i < h->tablelength; i++) {
+            for (pE = &(newtable[i]), e = *pE; e != NULL; e = *pE) {
+                tindex = indexFor(newsize,e->h);
+                if (tindex == i)
+                {
+                    pE = &(e->next);
+                }
+                else
+                {
+                    *pE = e->next;
+                    e->next = newtable[tindex];
+                    newtable[tindex] = e;
+                }
+            }
+        }
+    }
+    h->tablelength = newsize;
+    h->loadlimit   = (unsigned int) ceil(newsize * max_load_factor);
+    return -1;
+}
+
+/*****************************************************************************/
+unsigned int
+hashtable_count(struct hashtable *h)
+{
+    return h->entrycount;
+}
+
+/*****************************************************************************/
+int hashtable_insert(struct hashtable *h, void *k, void *v)
+{
+    /* This method allows duplicate keys - but they shouldn't be used */
+    unsigned int tindex;
+    struct entry *e;
+    if (++(h->entrycount) > h->loadlimit)
+    {
+        /* Ignore the return value. If expand fails, we should
+         * still try cramming just this value into the existing table
+         * -- we may not have memory for a larger table, but one more
+         * element may be ok. Next time we insert, we'll try expanding again.*/
+        hashtable_expand(h);
+    }
+    e = (struct entry *)malloc(sizeof(struct entry));
+    if (NULL == e) { --(h->entrycount); return 0; } /*oom*/
+
+    e->h = hash(h,k);
+    tindex = indexFor(h->tablelength,e->h);
+    e->k = k;
+    e->v = v;
+    e->next = h->table[tindex];
+    h->table[tindex] = e;
+    return -1;
+}
+
+/*****************************************************************************/
+void * /* returns value associated with key */
+hashtable_search(struct hashtable *h, void *k)
+{
+    struct entry *e;
+    unsigned int hashvalue, tindex;
+    hashvalue = hash(h,k);
+    tindex = indexFor(h->tablelength,hashvalue);
+    e = h->table[tindex];
+    while (NULL != e)
+    {
+        /* Check hash value to short circuit heavier comparison */
+      if ((hashvalue == e->h) && (h->eqfn(k, e->k))) {
+	return e->v;
+      }
+      e = e->next;
+    }
+    return NULL;
+}
+
+/*****************************************************************************/
+void * /* returns value associated with key */
+hashtable_remove(struct hashtable *h, void *k)
+{
+    /* TODO: consider compacting the table when the load factor drops enough,
+     *       or provide a 'compact' method. */
+
+    struct entry *e;
+    struct entry **pE;
+    void *v;
+    unsigned int hashvalue, tindex;
+
+    hashvalue = hash(h,k);
+    tindex = indexFor(h->tablelength,hash(h,k));
+    pE = &(h->table[tindex]);
+    e = *pE;
+    while (NULL != e)
+    {
+        /* Check hash value to short circuit heavier comparison */
+        if ((hashvalue == e->h) && (h->eqfn(k, e->k)))
+        {
+            *pE = e->next;
+            h->entrycount--;
+            v = e->v;
+            freekey(e->k);
+            free(e);
+            return v;
+        }
+        pE = &(e->next);
+        e = e->next;
+    }
+    return NULL;
+}
+
+/*****************************************************************************/
+/* destroy */
+void
+hashtable_destroy(struct hashtable *h, int free_values)
+{
+    unsigned int i;
+    struct entry *e, *f;
+    struct entry **table = h->table;
+    if (free_values)
+    {
+        for (i = 0; i < h->tablelength; i++)
+        {
+            e = table[i];
+            while (NULL != e)
+            { f = e; e = e->next; freekey(f->k); free(f->v); free(f); }
+        }
+    }
+    else
+    {
+        for (i = 0; i < h->tablelength; i++)
+        {
+            e = table[i];
+            while (NULL != e)
+            { f = e; e = e->next; freekey(f->k); free(f); }
+        }
+    }
+    free(h->table);
+    free(h);
+}
+
+/*
+ * Copyright (c) 2002, Christopher Clark
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 
+ * * Neither the name of the original author; nor the names of any contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ * 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
diff --git a/tos/lib/tossim/hashtable.h b/tos/lib/tossim/hashtable.h
new file mode 100644
index 00000000..1bf9eb30
--- /dev/null
+++ b/tos/lib/tossim/hashtable.h
@@ -0,0 +1,209 @@
+/* Copyright (C) 2002 Christopher Clark <firstname.lastname@cl.cam.ac.uk> */
+
+#ifndef __HASHTABLE_CWC22_H__
+#define __HASHTABLE_CWC22_H__
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct hashtable;
+typedef struct hashtable hashtable_t;
+
+/* Example of use:
+ *
+ *      struct hashtable  *h;
+ *      struct some_key   *k;
+ *      struct some_value *v;
+ *
+ *      static unsigned int         hash_from_key_fn( void *k );
+ *      static int                  keys_equal_fn ( void *key1, void *key2 );
+ *
+ *      h = create_hashtable(16, hash_from_key_fn, keys_equal_fn);
+ *      k = (struct some_key *)     malloc(sizeof(struct some_key));
+ *      v = (struct some_value *)   malloc(sizeof(struct some_value));
+ *
+ *      (initialise k and v to suitable values)
+ * 
+ *      if (! hashtable_insert(h,k,v) )
+ *      {     exit(-1);               }
+ *
+ *      if (NULL == (found = hashtable_search(h,k) ))
+ *      {    printf("not found!");                  }
+ *
+ *      if (NULL == (found = hashtable_remove(h,k) ))
+ *      {    printf("Not found\n");                 }
+ *
+ */
+
+/* Macros may be used to define type-safe(r) hashtable access functions, with
+ * methods specialized to take known key and value types as parameters.
+ * 
+ * Example:
+ *
+ * Insert this at the start of your file:
+ *
+ * DEFINE_HASHTABLE_INSERT(insert_some, struct some_key, struct some_value);
+ * DEFINE_HASHTABLE_SEARCH(search_some, struct some_key, struct some_value);
+ * DEFINE_HASHTABLE_REMOVE(remove_some, struct some_key, struct some_value);
+ *
+ * This defines the functions 'insert_some', 'search_some' and 'remove_some'.
+ * These operate just like hashtable_insert etc., with the same parameters,
+ * but their function signatures have 'struct some_key *' rather than
+ * 'void *', and hence can generate compile time errors if your program is
+ * supplying incorrect data as a key (and similarly for value).
+ *
+ * Note that the hash and key equality functions passed to create_hashtable
+ * still take 'void *' parameters instead of 'some key *'. This shouldn't be
+ * a difficult issue as they're only defined and passed once, and the other
+ * functions will ensure that only valid keys are supplied to them.
+ *
+ * The cost for this checking is increased code size and runtime overhead
+ * - if performance is important, it may be worth switching back to the
+ * unsafe methods once your program has been debugged with the safe methods.
+ * This just requires switching to some simple alternative defines - eg:
+ * #define insert_some hashtable_insert
+ *
+ */
+
+/*****************************************************************************
+ * create_hashtable
+   
+ * @name                    create_hashtable
+ * @param   minsize         minimum initial size of hashtable
+ * @param   hashfunction    function for hashing keys
+ * @param   key_eq_fn       function for determining key equality
+ * @return                  newly created hashtable or NULL on failure
+ */
+
+struct hashtable *
+create_hashtable(unsigned int minsize,
+                 unsigned int (*hashfunction) (void*),
+                 int (*key_eq_fn) (void*,void*));
+
+/*****************************************************************************
+ * hashtable_insert
+   
+ * @name        hashtable_insert
+ * @param   h   the hashtable to insert into
+ * @param   k   the key - hashtable claims ownership and will free on removal
+ * @param   v   the value - does not claim ownership
+ * @return      non-zero for successful insertion
+ *
+ * This function will cause the table to expand if the insertion would take
+ * the ratio of entries to table size over the maximum load factor.
+ *
+ * This function does not check for repeated insertions with a duplicate key.
+ * The value returned when using a duplicate key is undefined -- when
+ * the hashtable changes size, the order of retrieval of duplicate key
+ * entries is reversed.
+ * If in doubt, remove before insert.
+ */
+
+int 
+hashtable_insert(struct hashtable *h, void *k, void *v);
+
+#define DEFINE_HASHTABLE_INSERT(fnname, keytype, valuetype) \
+int fnname (struct hashtable *h, keytype *k, valuetype *v) \
+{ \
+    return hashtable_insert(h,k,v); \
+}
+
+/*****************************************************************************
+ * hashtable_search
+   
+ * @name        hashtable_search
+ * @param   h   the hashtable to search
+ * @param   k   the key to search for  - does not claim ownership
+ * @return      the value associated with the key, or NULL if none found
+ */
+
+void *
+hashtable_search(struct hashtable *h, void *k);
+
+#define DEFINE_HASHTABLE_SEARCH(fnname, keytype, valuetype) \
+valuetype * fnname (struct hashtable *h, keytype *k) \
+{ \
+    return (valuetype *) (hashtable_search(h,k)); \
+}
+
+/*****************************************************************************
+ * hashtable_remove
+   
+ * @name        hashtable_remove
+ * @param   h   the hashtable to remove the item from
+ * @param   k   the key to search for  - does not claim ownership
+ * @return      the value associated with the key, or NULL if none found
+ */
+
+void * /* returns value */
+hashtable_remove(struct hashtable *h, void *k);
+
+#define DEFINE_HASHTABLE_REMOVE(fnname, keytype, valuetype) \
+valuetype * fnname (struct hashtable *h, keytype *k) \
+{ \
+    return (valuetype *) (hashtable_remove(h,k)); \
+}
+
+
+/*****************************************************************************
+ * hashtable_count
+   
+ * @name        hashtable_count
+ * @param   h   the hashtable
+ * @return      the number of items stored in the hashtable
+ */
+unsigned int
+hashtable_count(struct hashtable *h);
+
+
+/*****************************************************************************
+ * hashtable_destroy
+   
+ * @name        hashtable_destroy
+ * @param   h   the hashtable
+ * @param       free_values     whether to call 'free' on the remaining values
+ */
+
+void
+hashtable_destroy(struct hashtable *h, int free_values);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __HASHTABLE_CWC22_H__ */
+
+/*
+ * Copyright (c) 2002, Christopher Clark
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 
+ * * Neither the name of the original author; nor the names of any contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ * 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
diff --git a/tos/lib/tossim/hashtable_private.h b/tos/lib/tossim/hashtable_private.h
new file mode 100644
index 00000000..3e95f600
--- /dev/null
+++ b/tos/lib/tossim/hashtable_private.h
@@ -0,0 +1,85 @@
+/* Copyright (C) 2002, 2004 Christopher Clark <firstname.lastname@cl.cam.ac.uk> */
+
+#ifndef __HASHTABLE_PRIVATE_CWC22_H__
+#define __HASHTABLE_PRIVATE_CWC22_H__
+
+#include "hashtable.h"
+
+/*****************************************************************************/
+struct entry
+{
+    void *k, *v;
+    unsigned int h;
+    struct entry *next;
+};
+
+struct hashtable {
+    unsigned int tablelength;
+    struct entry **table;
+    unsigned int entrycount;
+    unsigned int loadlimit;
+    unsigned int primeindex;
+    unsigned int (*hashfn) (void *k);
+    int (*eqfn) (void *k1, void *k2);
+};
+
+/*****************************************************************************/
+unsigned int
+hash(struct hashtable *h, void *k);
+
+/*****************************************************************************/
+/* indexFor */
+static inline unsigned int
+indexFor(unsigned int tablelength, unsigned int hashvalue) {
+    return (hashvalue % tablelength);
+};
+
+/* Only works if tablelength == 2^N */
+/*static inline unsigned int
+indexFor(unsigned int tablelength, unsigned int hashvalue)
+{
+    return (hashvalue & (tablelength - 1u));
+}
+*/
+
+/*****************************************************************************/
+#define freekey(X) free(X)
+/*define freekey(X) ; */
+
+
+/*****************************************************************************/
+
+#endif /* __HASHTABLE_PRIVATE_CWC22_H__*/
+
+/*
+ * Copyright (c) 2002, Christopher Clark
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 
+ * * Neither the name of the original author; nor the names of any contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ * 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
diff --git a/tos/lib/tossim/heap.c b/tos/lib/tossim/heap.c
new file mode 100644
index 00000000..c0903502
--- /dev/null
+++ b/tos/lib/tossim/heap.c
@@ -0,0 +1,210 @@
+// $Id: heap.c,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/* Authors:             Philip Levis
+ *
+ */
+
+/*
+ *   FILE: heap.h
+ * AUTHOR: Philip Levis <pal@cs.berkeley.edu>
+ *   DESC: Simple array-based priority heap for discrete event simulation.
+ */
+
+#include <heap.h>
+#include <string.h> // For memcpy(3)
+#include <stdlib.h> // for rand(3)
+#include <stdio.h>  // For printf(3)
+
+const int STARTING_SIZE = 511;
+
+#define HEAP_NODE(heap, index) (((node_t*)(heap->data))[index])
+
+typedef struct node {
+  void* data;
+  long long int key;
+} node_t;
+
+void down_heap(heap_t* heap, int findex);
+void up_heap(heap_t* heap, int findex);
+void swap(node_t* first, node_t* second);
+node_t* prev(node_t* node);
+node_t* next(node_t* next);
+
+void init_node(node_t* node) {
+  node->data = NULL;
+  node->key = -1;
+}
+
+void init_heap(heap_t* heap) {
+  heap->size = 0;
+  heap->private_size = STARTING_SIZE;
+  heap->data = malloc(sizeof(node_t) * heap->private_size);
+}
+
+int heap_size(heap_t* heap) {
+  return heap->size;
+}
+
+int is_empty(heap_t* heap) {
+  return heap->size == 0;
+}
+
+int heap_is_empty(heap_t* heap) {
+  return is_empty(heap);
+}
+
+long long int heap_get_min_key(heap_t* heap) {
+  if (is_empty(heap)) {
+    return -1;
+  }
+  else {
+    return HEAP_NODE(heap, 0).key;
+  }
+}
+
+void* heap_peek_min_data(heap_t* heap) {
+  if (is_empty(heap)) {
+    return NULL;
+  }
+  else {
+    return HEAP_NODE(heap, 0).data;
+  }
+}
+
+void* heap_pop_min_data(heap_t* heap, long long int* key) {
+  int last_index = heap->size - 1;
+  void* data = HEAP_NODE(heap, 0).data;
+  if (key != NULL) {
+    *key = HEAP_NODE(heap, 0).key;
+  }
+  HEAP_NODE(heap, 0).data = HEAP_NODE(heap, last_index).data;
+  HEAP_NODE(heap, 0).key = HEAP_NODE(heap, last_index).key;
+
+  heap->size--;
+
+  down_heap(heap, 0);
+
+  return data;
+}
+
+void expand_heap(heap_t* heap) {
+  int new_size = (heap->private_size * 2) + 1;
+  void* new_data = malloc(sizeof(node_t) * new_size);
+
+  //dbg(DBG_SIM, "Resized heap from %i to %i.\n", heap->private_size, new_size);
+  
+  memcpy(new_data, heap->data, (sizeof(node_t) * heap->private_size));
+  free(heap->data);
+
+  heap->data = new_data;
+  heap->private_size = new_size;
+  
+}
+
+void heap_insert(heap_t* heap, void* data, long long int key) {
+  int findex = heap->size;
+  if (findex == heap->private_size) {
+    expand_heap(heap);
+  }
+  
+  findex = heap->size;
+  HEAP_NODE(heap, findex).key = key;
+  HEAP_NODE(heap, findex).data = data;
+  up_heap(heap, findex);
+
+  heap->size++;
+}
+
+void swap(node_t* first, node_t* second) {
+  long long int key;
+  void* data;
+
+  key = first->key;
+  first->key = second->key;
+  second->key = key;
+
+  data = first->data;
+  first->data = second->data;
+  second->data = data;
+}
+
+void down_heap(heap_t* heap, int findex) {
+  int right_index =  ((findex + 1) * 2);
+  int left_index = (findex * 2) + 1;
+
+  if (right_index < heap->size) { // Two children
+    long long int left_key = HEAP_NODE(heap, left_index).key;
+    long long int right_key = HEAP_NODE(heap, right_index).key;
+    int min_key_index = (left_key < right_key)? left_index : right_index;
+
+    if (HEAP_NODE(heap, min_key_index).key < HEAP_NODE(heap, findex).key) {
+      swap(&(HEAP_NODE(heap, findex)), &(HEAP_NODE(heap, min_key_index)));
+      down_heap(heap, min_key_index);
+    }
+  }
+  else if (left_index >= heap->size) { // No children
+    return;
+  }
+  else { // Only left child
+    long long int left_key = HEAP_NODE(heap, left_index).key;
+    if (left_key < HEAP_NODE(heap, findex).key) {
+      swap(&(HEAP_NODE(heap, findex)), &(HEAP_NODE(heap, left_index)));
+      return;
+    }
+  }
+}
+
+void up_heap(heap_t* heap, int findex) {
+  int parent_index;
+  if (findex == 0) {
+    return;
+  }
+
+  parent_index = (findex - 1) / 2;
+
+  if (HEAP_NODE(heap, parent_index).key > HEAP_NODE(heap, findex).key) {
+    swap(&(HEAP_NODE(heap, findex)), &(HEAP_NODE(heap, parent_index)));
+    up_heap(heap, parent_index);
+  }
+}
+
diff --git a/tos/lib/tossim/heap.h b/tos/lib/tossim/heap.h
new file mode 100644
index 00000000..9de75193
--- /dev/null
+++ b/tos/lib/tossim/heap.h
@@ -0,0 +1,77 @@
+// $Id: heap.h,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/* Authors:             Philip Levis
+ *
+ */
+
+/*
+ *   FILE: heap.h
+ * AUTHOR: pal
+ *   DESC: Simple array-based priority heap for discrete event simulation.
+ */
+
+/**
+ * @author Philip Levis
+ */
+
+
+#ifndef HEAP_H_INCLUDED
+#define HEAP_H_INCLUDED
+
+typedef struct heap {
+  int size;
+  void* data;
+  int private_size;
+} heap_t;
+
+void init_heap(heap_t* heap);
+int heap_size(heap_t* heap);
+int heap_is_empty(heap_t* heap);
+
+long long int heap_get_min_key(heap_t* heap);
+void* heap_peek_min_data(heap_t* heap);
+void* heap_pop_min_data(heap_t* heap, long long int* key);
+void heap_insert(heap_t * heap, void* data, long long int key);
+
+
+#endif // HEAP_H_INCLUDED
diff --git a/tos/lib/tossim/mac.c b/tos/lib/tossim/mac.c
new file mode 100644
index 00000000..2c488a77
--- /dev/null
+++ b/tos/lib/tossim/mac.c
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * Configuration parameters for a CSMA link.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#include <mac.h>
+#include <sim_csma.h>
+
+MAC::MAC() {}
+MAC::~MAC() {}
+
+int MAC::initHigh() {return sim_csma_init_high();}
+int MAC::initLow() {return sim_csma_init_low();}
+int MAC::high() {return sim_csma_high();}
+int MAC::low() {return sim_csma_low();}
+int MAC::symbolsPerSec() {return sim_csma_symbols_per_sec();}
+int MAC::bitsPerSymbol() {return sim_csma_bits_per_symbol();}
+int MAC::preambleLength() {return sim_csma_preamble_length();}
+int MAC::exponentBase() {return sim_csma_exponent_base();}
+int MAC::maxIterations() {return sim_csma_max_iterations();}
+int MAC::minFreeSamples() {return sim_csma_min_free_samples();}
+int MAC::rxtxDelay() {return sim_csma_rxtx_delay();}
+int MAC::ackTime() {return sim_csma_ack_time();}
+
+void MAC::setInitHigh(int val) {sim_csma_set_init_high(val);}
+void MAC::setInitLow(int val) {sim_csma_set_init_low(val);}
+void MAC::setHigh(int val) {sim_csma_set_high(val);}
+void MAC::setLow(int val) {sim_csma_set_low(val);}
+void MAC::setSymbolsPerSec(int val) {sim_csma_set_symbols_per_sec(val);}
+void MAC::setBitsBerSymbol(int val) {sim_csma_set_bits_per_symbol(val);}
+void MAC::setPreambleLength(int val) {sim_csma_set_preamble_length(val);}
+void MAC::setExponentBase(int val) {sim_csma_set_exponent_base(val);}
+void MAC::setMaxIterations(int val) {sim_csma_set_max_iterations(val);}
+void MAC::setMinFreeSamples(int val) {sim_csma_set_min_free_samples(val);}
+void MAC::setRxtxDelay(int val) {sim_csma_set_rxtx_delay(val);}
+void MAC::setAckTime(int val) {sim_csma_set_ack_time(val);}
+
diff --git a/tos/lib/tossim/mac.h b/tos/lib/tossim/mac.h
new file mode 100644
index 00000000..57a281e7
--- /dev/null
+++ b/tos/lib/tossim/mac.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * Configuration parameters for a CSMA link.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#ifndef MAC_H_INCLUDED
+#define MAC_H_INCLUDED
+
+class MAC {
+ public:
+  MAC();
+  ~MAC();
+
+  int initHigh();
+  int initLow();
+  int high();
+  int low();
+  int symbolsPerSec();
+  int bitsPerSymbol();
+  int preambleLength(); // in symbols
+  int exponentBase();
+  int maxIterations();
+  int minFreeSamples();
+  int rxtxDelay();
+  int ackTime(); // in symbols
+  
+  void setInitHigh(int val);
+  void setInitLow(int val);
+  void setHigh(int val);
+  void setLow(int val);
+  void setSymbolsPerSec(int val);
+  void setBitsBerSymbol(int val);
+  void setPreambleLength(int val); // in symbols
+  void setExponentBase(int val);
+  void setMaxIterations(int val);
+  void setMinFreeSamples(int val);
+  void setRxtxDelay(int val);
+  void setAckTime(int val); // in symbols int 
+};
+
+#endif
diff --git a/tos/lib/tossim/mac.i b/tos/lib/tossim/mac.i
new file mode 100644
index 00000000..1422a0ee
--- /dev/null
+++ b/tos/lib/tossim/mac.i
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SWIG interface specification for a media access control algorithm
+ * and physical data rate in TOSSIM. This file defines the MAC object
+ * which is exported to
+ * the python scripting interface. This particular MAC is CSMA.
+ * Changing the MAC abstraction requires changing or replacing this
+ * file and rerunning generate-swig.bash in lib/tossim. Note that
+ * this abstraction does not represent an actual MAC implementation,
+ * instead merely a set of configuration constants that a CSMA MAC
+ * implementation might use. The default values model the standard
+ * TinyOS CC2420 stack. Most times (rxtxDelay, etc.) are in terms
+ * of symbols. E.g., an rxTxDelay of 32 means 32 symbol times. This
+ * value can be translated into real time with the symbolsPerSec()
+ * call.
+ *
+ * Note that changing this file only changes the Python interface:
+ * you must also change the underlying TOSSIM code so Python
+ * has the proper functions to call. Look at mac.h, mac.c, and
+ * sim_mac.c.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+%module TOSSIMMAC
+
+%{
+#include <mac.h>
+%}
+
+class MAC {
+ public:
+  MAC();
+  ~MAC();
+
+  int initHigh();
+  int initLow();
+  int high();
+  int low();
+  int symbolsPerSec();
+  int bitsPerSymbol();
+  int preambleLength();
+  int exponentBase();
+  int maxIterations();
+  int minFreeSamples();
+  int rxtxDelay();
+  int ackTime(); 
+  
+  void setInitHigh(int val);
+  void setInitLow(int val);
+  void setHigh(int val);
+  void setLow(int val);
+  void setSymbolsPerSec(int val);
+  void setBitsBerSymbol(int val);
+  void setPreambleLength(int val);
+  void setExponentBase(int val);
+  void setMaxIterations(int val);
+  void setMinFreeSamples(int val);
+  void setRxtxDelay(int val);
+  void setAckTime(int val);
+};
diff --git a/tos/lib/tossim/noise/TTX4-DemoNoiseTrace.txt b/tos/lib/tossim/noise/TTX4-DemoNoiseTrace.txt
new file mode 100644
index 00000000..8c4d7d18
--- /dev/null
+++ b/tos/lib/tossim/noise/TTX4-DemoNoiseTrace.txt
@@ -0,0 +1,196610 @@
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diff --git a/tos/lib/tossim/noise/casino-lab.txt b/tos/lib/tossim/noise/casino-lab.txt
new file mode 100644
index 00000000..b62c50c5
--- /dev/null
+++ b/tos/lib/tossim/noise/casino-lab.txt
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diff --git a/tos/lib/tossim/noise/meyer-heavy.txt b/tos/lib/tossim/noise/meyer-heavy.txt
new file mode 100644
index 00000000..49a3ac5c
--- /dev/null
+++ b/tos/lib/tossim/noise/meyer-heavy.txt
@@ -0,0 +1,196610 @@
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+
+
diff --git a/tos/lib/tossim/packet.c b/tos/lib/tossim/packet.c
new file mode 100644
index 00000000..f191568d
--- /dev/null
+++ b/tos/lib/tossim/packet.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * Injecting packets into TOSSIM.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#include <packet.h>
+#include <sim_packet.h>
+
+Packet::Packet() {
+  msgPtr = sim_packet_allocate();
+  allocated = 1;
+}
+
+Packet::Packet(sim_packet_t* m) {
+  if (m != NULL) {
+    msgPtr = m;
+    allocated = 0;
+  }
+  else {
+    msgPtr = sim_packet_allocate();
+    allocated = 1;
+  }
+}
+
+Packet::~Packet() {
+  if (allocated) {
+    sim_packet_free(msgPtr);
+  }
+}
+
+void Packet::setSource(int src) {
+  sim_packet_set_source(msgPtr, (uint16_t)src);
+}
+int Packet::source() {
+  return sim_packet_source(msgPtr);
+}
+
+void Packet::setDestination(int dest) {
+  sim_packet_set_destination(msgPtr, (uint16_t)dest);
+}
+int Packet::destination() {
+  return sim_packet_destination(msgPtr);
+}
+
+void Packet::setLength(int len) {
+  sim_packet_set_length(msgPtr, (uint8_t)len);
+}
+int Packet::length() {
+  return sim_packet_length(msgPtr);
+}
+
+void Packet::setType(int type) {
+  sim_packet_set_type(msgPtr, (uint8_t)type);
+}
+int Packet::type() {
+  return sim_packet_type(msgPtr);
+}
+
+char* Packet::data() {
+  char* val =  (char*)sim_packet_data(msgPtr);
+  return val;
+}
+
+void Packet::setData(char* data, int len) {
+  len = (len > maxLength())? maxLength():len;
+  memcpy(sim_packet_data(msgPtr), data, len);
+  setLength(len);
+}
+
+int Packet::maxLength() {
+  return (int)sim_packet_max_length(msgPtr);
+}
+
+void Packet::setStrength(int str) {
+  sim_packet_set_strength(msgPtr, (uint16_t)str);
+}
+
+sim_packet_t* Packet::getPacket() {
+  return msgPtr;
+}
+
+void Packet::deliver(int node, long long int t) {
+  sim_packet_deliver(node, msgPtr, t);
+}
+
+void Packet::deliverNow(int node) {
+  deliver(node, 0);
+}
diff --git a/tos/lib/tossim/packet.h b/tos/lib/tossim/packet.h
new file mode 100644
index 00000000..b8562afc
--- /dev/null
+++ b/tos/lib/tossim/packet.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * Injecting packets into TOSSIM.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#ifndef PACKET_H_INCLUDED
+#define PACKET_H_INCLUDED
+
+#include <sim_packet.h>
+
+class Packet {
+  public:
+    Packet();
+    Packet(sim_packet_t* msg);
+    ~Packet();
+
+    void setSource(int src);
+    int source();
+
+    void setDestination(int dest);
+    int destination();
+
+    void setLength(int len);
+    int length();
+
+    void setType(int type);
+    int type();
+
+    char* data();
+    void setData(char* data, int len);
+    int maxLength();
+    
+    void setStrength(int str);
+
+    sim_packet_t* getPacket();
+
+    void deliver(int node, long long int t);
+    void deliverNow(int node);
+    
+ private:
+    int allocated;
+    sim_packet_t* msgPtr;
+};
+
+#endif
diff --git a/tos/lib/tossim/packet.i b/tos/lib/tossim/packet.i
new file mode 100644
index 00000000..e923bf6d
--- /dev/null
+++ b/tos/lib/tossim/packet.i
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SWIG interface specification for delivering packets to a node
+ * (injecting traffic).
+ *
+ * Note that changing this file only changes the Python interface:
+ * you must also change the underlying TOSSIM code so Python
+ * has the proper functions to call. Look at mac.h, mac.c, and
+ * sim_mac.c.
+ *
+ * @author Philip Levis
+ * @date   Jan 2 2006
+ */
+
+
+%{
+#include <packet.h>
+%}
+
+%apply (char *STRING, int LENGTH) { (char *data, int len) };
+
+class Packet {
+  public:
+    Packet();
+    ~Packet();
+    
+    void setSource(int src);
+    int source();
+
+    void setDestination(int dest);
+    int destination();
+
+    void setLength(int len);
+    int length();
+
+    void setType(int type);
+    int type();
+
+    char* data();
+
+    void setData(char* data, int len);	
+    int maxLength();
+    
+    void setStrength(int str);
+
+    void deliver(int node, long long int time);
+    void deliverNow(int node);
+};
diff --git a/tos/lib/tossim/platform_message.h b/tos/lib/tossim/platform_message.h
new file mode 100644
index 00000000..44d49554
--- /dev/null
+++ b/tos/lib/tossim/platform_message.h
@@ -0,0 +1,63 @@
+// $Id: platform_message.h,v 1.5 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+/**
+ * Defining the platform-independently named packet structures to be the
+ * tossim structures.
+ *
+ * @author Philip Levis
+ * @date   Dec 2 2005
+ * Revision:  $Revision: 1.5 $
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include <TossimRadioMsg.h>
+#include <Serial.h>
+
+typedef union message_header {
+  tossim_header_t tossim;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  tossim_footer_t tossim;
+} message_footer_t;
+
+typedef union message_metadata {
+  tossim_metadata_t tossim;
+} message_metadata_t;
+
+#endif
diff --git a/tos/lib/tossim/radio.c b/tos/lib/tossim/radio.c
new file mode 100644
index 00000000..87d07268
--- /dev/null
+++ b/tos/lib/tossim/radio.c
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * C++ implementation of the gain-based TOSSIM radio model.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#include <radio.h>
+#include <sim_gain.h>
+
+Radio::Radio() {}
+Radio::~Radio() {}
+
+void Radio::add(int src, int dest, double gain) {
+  sim_gain_add(src, dest, gain);
+}
+
+double Radio::gain(int src, int dest) {
+  return sim_gain_value(src, dest);
+}
+
+bool Radio::connected(int src, int dest) {
+  return sim_gain_connected(src, dest);
+}
+
+void Radio::remove(int src, int dest) {
+  sim_gain_remove(src, dest);
+}
+
+void Radio::setNoise(int node, double mean, double range) {
+  sim_gain_set_noise_floor(node, mean, range);
+}
+
+
+void Radio::setSensitivity(double sensitivity) {
+  sim_gain_set_sensitivity(sensitivity);
+}
diff --git a/tos/lib/tossim/radio.h b/tos/lib/tossim/radio.h
new file mode 100644
index 00000000..e85933c3
--- /dev/null
+++ b/tos/lib/tossim/radio.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * Configuration parameters for a CSMA link.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#ifndef RADIO_H_INCLUDED
+#define RADIO_H_INCLUDED
+
+class Radio {
+ public:
+  Radio();
+  ~Radio();
+
+  void add(int src, int dest, double value);
+  double gain(int src, int dest);
+  bool connected(int src, int dest);
+  void remove(int src, int dest);
+  void setNoise(int node, double mean, double range);
+  void setSensitivity(double sensitivity);
+};
+
+#endif
diff --git a/tos/lib/tossim/radio.i b/tos/lib/tossim/radio.i
new file mode 100644
index 00000000..945db6c4
--- /dev/null
+++ b/tos/lib/tossim/radio.i
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Stanfoard SWIG interface specification for the TOSSIM radio
+ * propagation model. This file defines the Radio object that
+ * is exported to Python.
+ * This particular radio model is gain-based. If you want to change
+ * the radio model (and the scripting interface), then you must
+ * replace or modify this file and re-run the SWIG interface generation
+ * script generate-swig.bash in lib/tossim. Basic TOSSIM includes
+ * another model, the binary model, which stores packet loss rates
+ * rather than gains.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+%module TOSSIMRadio
+
+%{
+#include <radio.h>
+%}
+
+class Radio {
+ public:
+  Radio();
+  ~Radio();
+
+  void add(int src, int dest, double gain);
+  double gain(int src, int dest);
+  bool connected(int src, int dest);
+  void remove(int src, int dest);
+  void setNoise(int node, double mean, double range);
+  void setSensitivity(double sensitivity);   
+};
+
diff --git a/tos/lib/tossim/randomlib.c b/tos/lib/tossim/randomlib.c
new file mode 100644
index 00000000..c50ebef1
--- /dev/null
+++ b/tos/lib/tossim/randomlib.c
@@ -0,0 +1,200 @@
+/*
+   This Random Number Generator is based on the algorithm in a FORTRAN
+   version published by George Marsaglia and Arif Zaman, Florida State
+   University; ref.: see original comments below.
+   At the fhw (Fachhochschule Wiesbaden, W.Germany), Dept. of Computer
+   Science, we have written sources in further languages (C, Modula-2
+   Turbo-Pascal(3.0, 5.0), Basic and Ada) to get exactly the same test
+   results compared with the original FORTRAN version.
+   April 1989
+   Karl-L. Noell <NOELL@DWIFH1.BITNET>
+      and  Helmut  Weber <WEBER@DWIFH1.BITNET>
+
+   This random number generator originally appeared in "Toward a Universal
+   Random Number Generator" by George Marsaglia and Arif Zaman.
+   Florida State University Report: FSU-SCRI-87-50 (1987)
+   It was later modified by F. James and published in "A Review of Pseudo-
+   random Number Generators"
+   THIS IS THE BEST KNOWN RANDOM NUMBER GENERATOR AVAILABLE.
+   (However, a newly discovered technique can yield
+   a period of 10^600. But that is still in the development stage.)
+   It passes ALL of the tests for random number generators and has a period
+   of 2^144, is completely portable (gives bit identical results on all
+   machines with at least 24-bit mantissas in the floating point
+   representation).
+   The algorithm is a combination of a Fibonacci sequence (with lags of 97
+   and 33, and operation "subtraction plus one, modulo one") and an
+   "arithmetic sequence" (using subtraction).
+
+   Use IJ = 1802 & KL = 9373 to test the random number generator. The
+   subroutine RANMAR should be used to generate 20000 random numbers.
+   Then display the next six random numbers generated multiplied by 4096*4096
+   If the random number generator is working properly, the random numbers
+   should be:
+           6533892.0  14220222.0  7275067.0
+           6172232.0  8354498.0   10633180.0
+*/
+
+/* Globals */
+static double randU[97], randC, randCD, randCM;
+static int i97,j97;
+static int test = FALSE;
+
+/*
+   This is the initialization routine for the random number generator.
+   NOTE: The seed variables can have values between:    0 <= IJ <= 31328
+                                                        0 <= KL <= 30081
+   The random number sequences created by these two seeds are of sufficient
+   length to complete an entire calculation with. For example, if sveral
+   different groups are working on different parts of the same calculation,
+   each group could be assigned its own IJ seed. This would leave each group
+   with 30000 choices for the second seed. That is to say, this random
+   number generator can create 900 million different subsequences -- with
+   each subsequence having a length of approximately 10^30.
+*/
+void RandomInitialise(int ij,int kl)
+{
+   double s,t;
+   int ii,i,j,k,l,jj,m;
+
+   /*
+      Handle the seed range errors
+         First random number seed must be between 0 and 31328
+         Second seed must have a value between 0 and 30081
+   */
+   if (ij < 0 || ij > 31328 || kl < 0 || kl > 30081) {
+		ij = 1802;
+		kl = 9373;
+   }
+
+   i = (ij / 177) % 177 + 2;
+   j = (ij % 177)       + 2;
+   k = (kl / 169) % 178 + 1;
+   l = (kl % 169);
+
+   for (ii=0; ii<97; ii++) {
+      s = 0.0;
+      t = 0.5;
+      for (jj=0; jj<24; jj++) {
+         m = (((i * j) % 179) * k) % 179;
+         i = j;
+         j = k;
+         k = m;
+         l = (53 * l + 1) % 169;
+         if (((l * m % 64)) >= 32)
+            s += t;
+         t *= 0.5;
+      }
+      randU[ii] = s;
+   }
+
+   randC    = 362436.0 / 16777216.0;
+   randCD   = 7654321.0 / 16777216.0;
+   randCM   = 16777213.0 / 16777216.0;
+   i97  = 97;
+   j97  = 33;
+   test = TRUE;
+}
+
+/* 
+   This is the random number generator proposed by George Marsaglia in
+   Florida State University Report: FSU-SCRI-87-50
+*/
+double RandomUniform(void)
+{
+   double uni;
+   int seed1, seed2;
+
+   /* Make sure the initialisation routine has been called */
+   if (!test) 
+   {
+#if 0
+   	RandomInitialise(1802,9373);
+#else
+ 	seed1 = sim_random() % 31329;
+ 	seed2 = sim_random() % 30082;
+   	RandomInitialise(seed1,seed2);
+#endif
+	}
+   uni = randU[i97-1] - randU[j97-1];
+   if (uni <= 0.0)
+      uni++;
+   randU[i97-1] = uni;
+   i97--;
+   if (i97 == 0)
+      i97 = 97;
+   j97--;
+   if (j97 == 0)
+      j97 = 97;
+   randC -= randCD;
+   if (randC < 0.0)
+      randC += randCM;
+   uni -= randC;
+   if (uni < 0.0)
+      uni++;
+
+   return(uni);
+}
+
+/*
+  ALGORITHM 712, COLLECTED ALGORITHMS FROM ACM.
+  THIS WORK PUBLISHED IN TRANSACTIONS ON MATHEMATICAL SOFTWARE,
+  VOL. 18, NO. 4, DECEMBER, 1992, PP. 434-435.
+  The function returns a normally distributed pseudo-random number
+  with a given mean and standard devaiation.  Calls are made to a
+  function subprogram which must return independent random
+  numbers uniform in the interval (0,1).
+  The algorithm uses the ratio of uniforms method of A.J. Kinderman
+  and J.F. Monahan augmented with quadratic bounding curves.
+*/
+double RandomGaussian(double mean,double stddev)
+{
+  double  q,z,v,x,y;
+  
+  /*  
+      Generate P = (u,v) uniform in rect. enclosing acceptance region 
+      Make sure that any random numbers <= 0 are rejected, since
+      gaussian() requires uniforms > 0, but RandomUniform() delivers >= 0.
+  */
+  do {
+      z = RandomUniform();
+      v = RandomUniform();
+      if (z <= 0.0 || v <= 0.0) {
+       	z = 1.0;
+       	v = 1.0;
+      }
+      v = 1.7156 * (v - 0.5);
+      
+      /*  Evaluate the quadratic form */
+      x = z - 0.449871;
+      y = fabs(v) + 0.386595;
+      q = x * x + y * (0.19600 * y - 0.25472 * x);
+      
+      /* Accept P if inside inner ellipse */
+      if (q < 0.27597)
+			break;
+      
+      /*  Reject P if outside outer ellipse, or outside acceptance region */
+  } while ((q > 0.27846) || (v * v > -4.0 * log(z) * z * z));
+  
+  /*  Return ratio of P's coordinates as the normal deviate */
+  return (mean + stddev * v / z);
+}
+
+/*
+   Return random integer within a range, lower -> upper INCLUSIVE
+*/
+int RandomInt(int lower,int upper)
+{
+   return((int)(RandomUniform() * (upper - lower + 1)) + lower);
+}
+
+/*
+   Return random float within a range, lower -> upper
+*/
+double RandomDouble(double lower,double upper)
+{
+   return((upper - lower) * RandomUniform() + lower);
+}
+
+
diff --git a/tos/lib/tossim/randomlib.h b/tos/lib/tossim/randomlib.h
new file mode 100644
index 00000000..1c501b54
--- /dev/null
+++ b/tos/lib/tossim/randomlib.h
@@ -0,0 +1,57 @@
+/*
+   This Random Number Generator is based on the algorithm in a FORTRAN
+   version published by George Marsaglia and Arif Zaman, Florida State
+   University; ref.: see original comments below.
+   At the fhw (Fachhochschule Wiesbaden, W.Germany), Dept. of Computer
+   Science, we have written sources in further languages (C, Modula-2
+   Turbo-Pascal(3.0, 5.0), Basic and Ada) to get exactly the same test
+   results compared with the original FORTRAN version.
+   April 1989
+   Karl-L. Noell <NOELL@DWIFH1.BITNET>
+      and  Helmut  Weber <WEBER@DWIFH1.BITNET>
+
+   This random number generator originally appeared in "Toward a Universal
+   Random Number Generator" by George Marsaglia and Arif Zaman.
+   Florida State University Report: FSU-SCRI-87-50 (1987)
+   It was later modified by F. James and published in "A Review of Pseudo-
+   random Number Generators"
+   THIS IS THE BEST KNOWN RANDOM NUMBER GENERATOR AVAILABLE.
+   (However, a newly discovered technique can yield
+   a period of 10^600. But that is still in the development stage.)
+   It passes ALL of the tests for random number generators and has a period
+   of 2^144, is completely portable (gives bit identical results on all
+   machines with at least 24-bit mantissas in the floating point
+   representation).
+   The algorithm is a combination of a Fibonacci sequence (with lags of 97
+   and 33, and operation "subtraction plus one, modulo one") and an
+   "arithmetic sequence" (using subtraction).
+
+   Use IJ = 1802 & KL = 9373 to test the random number generator. The
+   subroutine RANMAR should be used to generate 20000 random numbers.
+   Then display the next six random numbers generated multiplied by 4096*4096
+   If the random number generator is working properly, the random numbers
+   should be:
+           6533892.0  14220222.0  7275067.0
+           6172232.0  8354498.0   10633180.0
+*/
+
+
+#ifndef _RANDOMLIB_H_
+#define _RANDOMLIB_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void   RandomInitialise(int,int);
+double RandomUniform(void);
+double RandomGaussian(double,double);
+int    RandomInt(int,int);
+double RandomDouble(double,double);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/tos/lib/tossim/sf/SerialForwarder.c b/tos/lib/tossim/sf/SerialForwarder.c
new file mode 100644
index 00000000..e2f5da1a
--- /dev/null
+++ b/tos/lib/tossim/sf/SerialForwarder.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Toilers Research Group - Colorado School of 
+ *   Mines  nor the names of its contributors may be used to endorse 
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Author: Chad Metcalf
+ * Date: July 9, 2007
+ *
+ * A simple C++ wrapper around the serial forwarder for TOSSIM
+ *
+ */
+
+#include "SerialForwarder.h"
+#include "sim_serial_forwarder.h"
+
+SerialForwarder::SerialForwarder(const int port) 
+{ 
+    openServerSocket(port);
+}
+
+SerialForwarder::~SerialForwarder() 
+{
+}
+
+void SerialForwarder::openServerSocket(const int port)
+{
+     sim_sf_open_server_socket(port);
+}
+
+void SerialForwarder::dispatchPacket(const void *packet, const int len)
+{
+    sim_sf_dispatch_packet(packet, len);
+}
+
+void SerialForwarder::forwardPacket(const void *packet, const int len)
+{
+    sim_sf_forward_packet(packet, len);
+}
+
+void SerialForwarder::process ()
+{
+    sim_sf_process();
+}
diff --git a/tos/lib/tossim/sf/SerialForwarder.h b/tos/lib/tossim/sf/SerialForwarder.h
new file mode 100644
index 00000000..6201af36
--- /dev/null
+++ b/tos/lib/tossim/sf/SerialForwarder.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Toilers Research Group - Colorado School of 
+ *   Mines  nor the names of its contributors may be used to endorse 
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Author: Chad Metcalf
+ * Date: July 9, 2007
+ *
+ * A simple C++ wrapper around the serial forwarder for TOSSIM
+ *
+ */
+
+#ifndef  _SERIALFORWARDER_H_
+#define  _SERIALFORWARDER_H_
+
+class SerialForwarder {
+
+    public: 
+    
+    SerialForwarder(const int port);
+    ~SerialForwarder();
+
+    void process ();
+    void dispatchPacket(const void *packet, const int len);
+    void forwardPacket(const void *packet, const int len);
+    void openServerSocket(const int port);
+
+};
+#endif   // ----- #ifndef _SERIALFORWARDER_H_  ----- 
diff --git a/tos/lib/tossim/sf/SerialForwarder.i b/tos/lib/tossim/sf/SerialForwarder.i
new file mode 100644
index 00000000..00d7f577
--- /dev/null
+++ b/tos/lib/tossim/sf/SerialForwarder.i
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Toilers Research Group - Colorado School of 
+ *   Mines  nor the names of its contributors may be used to endorse 
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * SWIG interface specification for the serial forwarder.
+ *
+ * @author Chad Metcalf
+ * @date   July 9, 2007
+ */
+
+
+%{
+#include <SerialForwarder.h>
+%}
+
+%apply (char *STRING, int LENGTH) { (char *data, int len) };
+
+class SerialForwarder {
+
+    public:
+        SerialForwarder(const int port);
+        ~SerialForwarder();
+
+        void process ();
+        void dispatchPacket(const void *packet, const int len);
+        void forwardPacket(const void *packet, const int len);
+
+};
diff --git a/tos/lib/tossim/sf/SerialPacket.c b/tos/lib/tossim/sf/SerialPacket.c
new file mode 100644
index 00000000..9e79e23f
--- /dev/null
+++ b/tos/lib/tossim/sf/SerialPacket.c
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * Injecting packets into TOSSIM.
+ *
+ * @author Philip Levis
+ * @author Chad Metcalf
+ * @date   July 15 2007
+ */
+
+#include <SerialPacket.h>
+#include <sim_serial_packet.h>
+
+SerialPacket::SerialPacket() {
+  msgPtr = sim_serial_packet_allocate();
+  allocated = 1;
+}
+
+SerialPacket::SerialPacket(sim_serial_packet_t* m) {
+  if (m != NULL) {
+    msgPtr = m;
+    allocated = 0;
+  }
+  else {
+    msgPtr = sim_serial_packet_allocate();
+    allocated = 1;
+  }
+}
+
+SerialPacket::~SerialPacket() {
+  if (allocated) {
+    sim_serial_packet_free(msgPtr);
+  }
+}
+
+void SerialPacket::setDestination(int dest) {
+  sim_serial_packet_set_destination(msgPtr, (uint16_t)dest);
+}
+int SerialPacket::destination() {
+  return sim_serial_packet_destination(msgPtr);
+}
+
+void SerialPacket::setLength(int len) {
+  sim_serial_packet_set_length(msgPtr, (uint8_t)len);
+}
+int SerialPacket::length() {
+  return sim_serial_packet_length(msgPtr);
+}
+
+void SerialPacket::setType(int type) {
+  sim_serial_packet_set_type(msgPtr, (uint8_t)type);
+}
+int SerialPacket::type() {
+  return sim_serial_packet_type(msgPtr);
+}
+
+char* SerialPacket::data() {
+  char* val =  (char*)sim_serial_packet_data(msgPtr);
+  return val;
+}
+
+void SerialPacket::setData(char* data, int len) {
+  len = (len > maxLength())? maxLength():len;
+  memcpy(sim_serial_packet_data(msgPtr), data, len);
+  setLength(len);
+}
+
+int SerialPacket::maxLength() {
+  return (int)sim_serial_packet_max_length(msgPtr);
+}
+
+sim_serial_packet_t* SerialPacket::getPacket() {
+  return msgPtr;
+}
+
+void SerialPacket::deliver(int node, long long int t) {
+  sim_serial_packet_deliver(node, msgPtr, t);
+}
+
+void SerialPacket::deliverNow(int node) {
+  deliver(node, 0);
+}
diff --git a/tos/lib/tossim/sf/SerialPacket.h b/tos/lib/tossim/sf/SerialPacket.h
new file mode 100644
index 00000000..f9f896d8
--- /dev/null
+++ b/tos/lib/tossim/sf/SerialPacket.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * Injecting packets into TOSSIM.
+ *
+ * @author Philip Levis
+ * @author Chad Metcalf
+ * @date   July 15 2007
+ */
+
+#ifndef SERIAL_PACKET_H_INCLUDED
+#define SERIAL_PACKET_H_INCLUDED
+
+#include <sim_serial_packet.h>
+
+class SerialPacket {
+  public:
+    SerialPacket();
+    SerialPacket(sim_serial_packet_t* msg);
+    ~SerialPacket();
+
+    void setDestination(int dest);
+    int destination();
+
+    void setLength(int len);
+    int length();
+
+    void setType(int type);
+    int type();
+
+    char* data();
+    void setData(char* data, int len);
+    int maxLength();
+
+    sim_serial_packet_t* getPacket();
+
+    void deliver(int node, long long int t);
+    void deliverNow(int node);
+    
+ private:
+    int allocated;
+    sim_serial_packet_t* msgPtr;
+};
+
+#endif
diff --git a/tos/lib/tossim/sf/SerialPacket.i b/tos/lib/tossim/sf/SerialPacket.i
new file mode 100644
index 00000000..a676adcb
--- /dev/null
+++ b/tos/lib/tossim/sf/SerialPacket.i
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SWIG interface specification for delivering packets to a node
+ * (injecting traffic).
+ *
+ * Note that changing this file only changes the Python interface:
+ * you must also change the underlying TOSSIM code so Python
+ * has the proper functions to call. Look at mac.h, mac.c, and
+ * sim_mac.c.
+ *
+ * @author Philip Levis
+ * @author Chad Metcalf
+ * @date   July 17 2007
+ */
+
+
+%{
+#include <SerialPacket.h>
+%}
+
+%apply (char *STRING, int LENGTH) { (char *data, int len) };
+
+class SerialPacket {
+  public:
+    SerialPacket();
+    ~SerialPacket();
+
+    void setDestination(int dest);
+    int destination();
+
+    void setLength(int len);
+    int length();
+
+    void setType(int type);
+    int type();
+
+    char* data();
+
+    void setData(char* data, int len);
+    int maxLength();
+    
+    void deliver(int node, long long int time);
+    void deliverNow(int node);
+};
diff --git a/tos/lib/tossim/sf/TOSSIM.py b/tos/lib/tossim/sf/TOSSIM.py
new file mode 100644
index 00000000..bbd81f92
--- /dev/null
+++ b/tos/lib/tossim/sf/TOSSIM.py
@@ -0,0 +1,332 @@
+# This file was automatically generated by SWIG (http://www.swig.org).
+# Version 1.3.31
+#
+# Don't modify this file, modify the SWIG interface instead.
+# This file is compatible with both classic and new-style classes.
+
+import _TOSSIM
+import new
+new_instancemethod = new.instancemethod
+try:
+    _swig_property = property
+except NameError:
+    pass # Python < 2.2 doesn't have 'property'.
+def _swig_setattr_nondynamic(self,class_type,name,value,static=1):
+    if (name == "thisown"): return self.this.own(value)
+    if (name == "this"):
+        if type(value).__name__ == 'PySwigObject':
+            self.__dict__[name] = value
+            return
+    method = class_type.__swig_setmethods__.get(name,None)
+    if method: return method(self,value)
+    if (not static) or hasattr(self,name):
+        self.__dict__[name] = value
+    else:
+        raise AttributeError("You cannot add attributes to %s" % self)
+
+def _swig_setattr(self,class_type,name,value):
+    return _swig_setattr_nondynamic(self,class_type,name,value,0)
+
+def _swig_getattr(self,class_type,name):
+    if (name == "thisown"): return self.this.own()
+    method = class_type.__swig_getmethods__.get(name,None)
+    if method: return method(self)
+    raise AttributeError,name
+
+def _swig_repr(self):
+    try: strthis = "proxy of " + self.this.__repr__()
+    except: strthis = ""
+    return "<%s.%s; %s >" % (self.__class__.__module__, self.__class__.__name__, strthis,)
+
+import types
+try:
+    _object = types.ObjectType
+    _newclass = 1
+except AttributeError:
+    class _object : pass
+    _newclass = 0
+del types
+
+
+class MAC(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, MAC, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, MAC, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_MAC(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_MAC
+    __del__ = lambda self : None;
+    def initHigh(*args): return _TOSSIM.MAC_initHigh(*args)
+    def initLow(*args): return _TOSSIM.MAC_initLow(*args)
+    def high(*args): return _TOSSIM.MAC_high(*args)
+    def low(*args): return _TOSSIM.MAC_low(*args)
+    def symbolsPerSec(*args): return _TOSSIM.MAC_symbolsPerSec(*args)
+    def bitsPerSymbol(*args): return _TOSSIM.MAC_bitsPerSymbol(*args)
+    def preambleLength(*args): return _TOSSIM.MAC_preambleLength(*args)
+    def exponentBase(*args): return _TOSSIM.MAC_exponentBase(*args)
+    def maxIterations(*args): return _TOSSIM.MAC_maxIterations(*args)
+    def minFreeSamples(*args): return _TOSSIM.MAC_minFreeSamples(*args)
+    def rxtxDelay(*args): return _TOSSIM.MAC_rxtxDelay(*args)
+    def ackTime(*args): return _TOSSIM.MAC_ackTime(*args)
+    def setInitHigh(*args): return _TOSSIM.MAC_setInitHigh(*args)
+    def setInitLow(*args): return _TOSSIM.MAC_setInitLow(*args)
+    def setHigh(*args): return _TOSSIM.MAC_setHigh(*args)
+    def setLow(*args): return _TOSSIM.MAC_setLow(*args)
+    def setSymbolsPerSec(*args): return _TOSSIM.MAC_setSymbolsPerSec(*args)
+    def setBitsBerSymbol(*args): return _TOSSIM.MAC_setBitsBerSymbol(*args)
+    def setPreambleLength(*args): return _TOSSIM.MAC_setPreambleLength(*args)
+    def setExponentBase(*args): return _TOSSIM.MAC_setExponentBase(*args)
+    def setMaxIterations(*args): return _TOSSIM.MAC_setMaxIterations(*args)
+    def setMinFreeSamples(*args): return _TOSSIM.MAC_setMinFreeSamples(*args)
+    def setRxtxDelay(*args): return _TOSSIM.MAC_setRxtxDelay(*args)
+    def setAckTime(*args): return _TOSSIM.MAC_setAckTime(*args)
+MAC_swigregister = _TOSSIM.MAC_swigregister
+MAC_swigregister(MAC)
+
+class Radio(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Radio, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Radio, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_Radio(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_Radio
+    __del__ = lambda self : None;
+    def add(*args): return _TOSSIM.Radio_add(*args)
+    def gain(*args): return _TOSSIM.Radio_gain(*args)
+    def connected(*args): return _TOSSIM.Radio_connected(*args)
+    def remove(*args): return _TOSSIM.Radio_remove(*args)
+    def setNoise(*args): return _TOSSIM.Radio_setNoise(*args)
+    def setSensitivity(*args): return _TOSSIM.Radio_setSensitivity(*args)
+Radio_swigregister = _TOSSIM.Radio_swigregister
+Radio_swigregister(Radio)
+
+class Packet(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Packet, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Packet, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_Packet(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_Packet
+    __del__ = lambda self : None;
+    def setSource(*args): return _TOSSIM.Packet_setSource(*args)
+    def source(*args): return _TOSSIM.Packet_source(*args)
+    def setDestination(*args): return _TOSSIM.Packet_setDestination(*args)
+    def destination(*args): return _TOSSIM.Packet_destination(*args)
+    def setLength(*args): return _TOSSIM.Packet_setLength(*args)
+    def length(*args): return _TOSSIM.Packet_length(*args)
+    def setType(*args): return _TOSSIM.Packet_setType(*args)
+    def type(*args): return _TOSSIM.Packet_type(*args)
+    def data(*args): return _TOSSIM.Packet_data(*args)
+    def setData(*args): return _TOSSIM.Packet_setData(*args)
+    def maxLength(*args): return _TOSSIM.Packet_maxLength(*args)
+    def setStrength(*args): return _TOSSIM.Packet_setStrength(*args)
+    def deliver(*args): return _TOSSIM.Packet_deliver(*args)
+    def deliverNow(*args): return _TOSSIM.Packet_deliverNow(*args)
+Packet_swigregister = _TOSSIM.Packet_swigregister
+Packet_swigregister(Packet)
+
+class SerialPacket(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, SerialPacket, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, SerialPacket, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_SerialPacket(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_SerialPacket
+    __del__ = lambda self : None;
+    def setDestination(*args): return _TOSSIM.SerialPacket_setDestination(*args)
+    def destination(*args): return _TOSSIM.SerialPacket_destination(*args)
+    def setLength(*args): return _TOSSIM.SerialPacket_setLength(*args)
+    def length(*args): return _TOSSIM.SerialPacket_length(*args)
+    def setType(*args): return _TOSSIM.SerialPacket_setType(*args)
+    def type(*args): return _TOSSIM.SerialPacket_type(*args)
+    def data(*args): return _TOSSIM.SerialPacket_data(*args)
+    def setData(*args): return _TOSSIM.SerialPacket_setData(*args)
+    def maxLength(*args): return _TOSSIM.SerialPacket_maxLength(*args)
+    def deliver(*args): return _TOSSIM.SerialPacket_deliver(*args)
+    def deliverNow(*args): return _TOSSIM.SerialPacket_deliverNow(*args)
+SerialPacket_swigregister = _TOSSIM.SerialPacket_swigregister
+SerialPacket_swigregister(SerialPacket)
+
+class SerialForwarder(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, SerialForwarder, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, SerialForwarder, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_SerialForwarder(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_SerialForwarder
+    __del__ = lambda self : None;
+    def process(*args): return _TOSSIM.SerialForwarder_process(*args)
+    def dispatchPacket(*args): return _TOSSIM.SerialForwarder_dispatchPacket(*args)
+    def forwardPacket(*args): return _TOSSIM.SerialForwarder_forwardPacket(*args)
+SerialForwarder_swigregister = _TOSSIM.SerialForwarder_swigregister
+SerialForwarder_swigregister(SerialForwarder)
+
+class Throttle(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Throttle, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Throttle, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_Throttle(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_Throttle
+    __del__ = lambda self : None;
+    def initialize(*args): return _TOSSIM.Throttle_initialize(*args)
+    def finalize(*args): return _TOSSIM.Throttle_finalize(*args)
+    def checkThrottle(*args): return _TOSSIM.Throttle_checkThrottle(*args)
+    def printStatistics(*args): return _TOSSIM.Throttle_printStatistics(*args)
+Throttle_swigregister = _TOSSIM.Throttle_swigregister
+Throttle_swigregister(Throttle)
+
+class variable_string_t(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, variable_string_t, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, variable_string_t, name)
+    __repr__ = _swig_repr
+    __swig_setmethods__["type"] = _TOSSIM.variable_string_t_type_set
+    __swig_getmethods__["type"] = _TOSSIM.variable_string_t_type_get
+    if _newclass:type = _swig_property(_TOSSIM.variable_string_t_type_get, _TOSSIM.variable_string_t_type_set)
+    __swig_setmethods__["ptr"] = _TOSSIM.variable_string_t_ptr_set
+    __swig_getmethods__["ptr"] = _TOSSIM.variable_string_t_ptr_get
+    if _newclass:ptr = _swig_property(_TOSSIM.variable_string_t_ptr_get, _TOSSIM.variable_string_t_ptr_set)
+    __swig_setmethods__["len"] = _TOSSIM.variable_string_t_len_set
+    __swig_getmethods__["len"] = _TOSSIM.variable_string_t_len_get
+    if _newclass:len = _swig_property(_TOSSIM.variable_string_t_len_get, _TOSSIM.variable_string_t_len_set)
+    __swig_setmethods__["isArray"] = _TOSSIM.variable_string_t_isArray_set
+    __swig_getmethods__["isArray"] = _TOSSIM.variable_string_t_isArray_get
+    if _newclass:isArray = _swig_property(_TOSSIM.variable_string_t_isArray_get, _TOSSIM.variable_string_t_isArray_set)
+    def __init__(self, *args): 
+        this = _TOSSIM.new_variable_string_t(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_variable_string_t
+    __del__ = lambda self : None;
+variable_string_t_swigregister = _TOSSIM.variable_string_t_swigregister
+variable_string_t_swigregister(variable_string_t)
+
+class nesc_app_t(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, nesc_app_t, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, nesc_app_t, name)
+    __repr__ = _swig_repr
+    __swig_setmethods__["numVariables"] = _TOSSIM.nesc_app_t_numVariables_set
+    __swig_getmethods__["numVariables"] = _TOSSIM.nesc_app_t_numVariables_get
+    if _newclass:numVariables = _swig_property(_TOSSIM.nesc_app_t_numVariables_get, _TOSSIM.nesc_app_t_numVariables_set)
+    __swig_setmethods__["variableNames"] = _TOSSIM.nesc_app_t_variableNames_set
+    __swig_getmethods__["variableNames"] = _TOSSIM.nesc_app_t_variableNames_get
+    if _newclass:variableNames = _swig_property(_TOSSIM.nesc_app_t_variableNames_get, _TOSSIM.nesc_app_t_variableNames_set)
+    __swig_setmethods__["variableTypes"] = _TOSSIM.nesc_app_t_variableTypes_set
+    __swig_getmethods__["variableTypes"] = _TOSSIM.nesc_app_t_variableTypes_get
+    if _newclass:variableTypes = _swig_property(_TOSSIM.nesc_app_t_variableTypes_get, _TOSSIM.nesc_app_t_variableTypes_set)
+    __swig_setmethods__["variableArray"] = _TOSSIM.nesc_app_t_variableArray_set
+    __swig_getmethods__["variableArray"] = _TOSSIM.nesc_app_t_variableArray_get
+    if _newclass:variableArray = _swig_property(_TOSSIM.nesc_app_t_variableArray_get, _TOSSIM.nesc_app_t_variableArray_set)
+    def __init__(self, *args): 
+        this = _TOSSIM.new_nesc_app_t(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_nesc_app_t
+    __del__ = lambda self : None;
+nesc_app_t_swigregister = _TOSSIM.nesc_app_t_swigregister
+nesc_app_t_swigregister(nesc_app_t)
+
+class Variable(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Variable, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Variable, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_Variable(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_Variable
+    __del__ = lambda self : None;
+    def getData(*args): return _TOSSIM.Variable_getData(*args)
+Variable_swigregister = _TOSSIM.Variable_swigregister
+Variable_swigregister(Variable)
+
+class Mote(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Mote, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Mote, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_Mote(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_Mote
+    __del__ = lambda self : None;
+    def id(*args): return _TOSSIM.Mote_id(*args)
+    def euid(*args): return _TOSSIM.Mote_euid(*args)
+    def setEuid(*args): return _TOSSIM.Mote_setEuid(*args)
+    def bootTime(*args): return _TOSSIM.Mote_bootTime(*args)
+    def bootAtTime(*args): return _TOSSIM.Mote_bootAtTime(*args)
+    def isOn(*args): return _TOSSIM.Mote_isOn(*args)
+    def turnOff(*args): return _TOSSIM.Mote_turnOff(*args)
+    def turnOn(*args): return _TOSSIM.Mote_turnOn(*args)
+    def getVariable(*args): return _TOSSIM.Mote_getVariable(*args)
+    def addNoiseTraceReading(*args): return _TOSSIM.Mote_addNoiseTraceReading(*args)
+    def createNoiseModel(*args): return _TOSSIM.Mote_createNoiseModel(*args)
+    def generateNoise(*args): return _TOSSIM.Mote_generateNoise(*args)
+Mote_swigregister = _TOSSIM.Mote_swigregister
+Mote_swigregister(Mote)
+
+class Tossim(_object):
+    __swig_setmethods__ = {}
+    __setattr__ = lambda self, name, value: _swig_setattr(self, Tossim, name, value)
+    __swig_getmethods__ = {}
+    __getattr__ = lambda self, name: _swig_getattr(self, Tossim, name)
+    __repr__ = _swig_repr
+    def __init__(self, *args): 
+        this = _TOSSIM.new_Tossim(*args)
+        try: self.this.append(this)
+        except: self.this = this
+    __swig_destroy__ = _TOSSIM.delete_Tossim
+    __del__ = lambda self : None;
+    def init(*args): return _TOSSIM.Tossim_init(*args)
+    def time(*args): return _TOSSIM.Tossim_time(*args)
+    def ticksPerSecond(*args): return _TOSSIM.Tossim_ticksPerSecond(*args)
+    def setTime(*args): return _TOSSIM.Tossim_setTime(*args)
+    def timeStr(*args): return _TOSSIM.Tossim_timeStr(*args)
+    def currentNode(*args): return _TOSSIM.Tossim_currentNode(*args)
+    def getNode(*args): return _TOSSIM.Tossim_getNode(*args)
+    def setCurrentNode(*args): return _TOSSIM.Tossim_setCurrentNode(*args)
+    def addChannel(*args): return _TOSSIM.Tossim_addChannel(*args)
+    def removeChannel(*args): return _TOSSIM.Tossim_removeChannel(*args)
+    def randomSeed(*args): return _TOSSIM.Tossim_randomSeed(*args)
+    def runNextEvent(*args): return _TOSSIM.Tossim_runNextEvent(*args)
+    def mac(*args): return _TOSSIM.Tossim_mac(*args)
+    def radio(*args): return _TOSSIM.Tossim_radio(*args)
+    def newPacket(*args): return _TOSSIM.Tossim_newPacket(*args)
+    def newSerialPacket(*args): return _TOSSIM.Tossim_newSerialPacket(*args)
+Tossim_swigregister = _TOSSIM.Tossim_swigregister
+Tossim_swigregister(Tossim)
+
+
+
diff --git a/tos/lib/tossim/sf/Throttle.cpp b/tos/lib/tossim/sf/Throttle.cpp
new file mode 100644
index 00000000..01520cba
--- /dev/null
+++ b/tos/lib/tossim/sf/Throttle.cpp
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Toilers Research Group - Colorado School of 
+ *   Mines  nor the names of its contributors may be used to endorse 
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Author: Chad Metcalf
+ * Date: July 9, 2007
+ *
+ * A simple Throttle to slow a simulation to near real time.
+ *
+ */
+
+#include "Throttle.h"
+
+Throttle::Throttle(Tossim* tossim, const int ms = 10) : 
+    sim(tossim), simStartTime(0.0), simEndTime(0.0), simPace(0), throttleCount(0) {
+
+        // Convert milliseconds to sim_time_t 
+        simPace =  ms * 10000000ULL;
+}
+
+Throttle::~Throttle() {}
+
+void Throttle::initialize() {
+    simStartTime = getTime();
+}
+
+void Throttle::finalize() {
+    simEndTime = getTime();
+}
+
+void Throttle::checkThrottle() {
+    
+    double secondsElasped = getTime() - simStartTime;
+    sim_time_t ticksElasped = (sim_time_t) secondsElasped*sim->ticksPerSecond();
+
+    sim_time_t difference = sim->time() - ticksElasped;
+
+    if (difference > simPace) {
+        throttleCount++;
+        double sleepDifference = (double) difference / sim->ticksPerSecond();
+        simSleep(sleepDifference);
+    }
+
+}
+
+inline double Throttle::toDouble(struct timeval* tv) {
+    return tv->tv_sec + tv->tv_usec/1e6;
+}
+
+double Throttle::getTime() {
+    struct timeval tv;
+    gettimeofday (&tv, NULL);
+    return toDouble(&tv);  
+}
+
+int Throttle::simSleep(double seconds) {
+
+     struct timespec tv;
+     /* Construct the timespec from the number of whole seconds... */
+     tv.tv_sec = (time_t) seconds;
+     /* ... and the remainder in nanoseconds. */
+     tv.tv_nsec = (long) ((seconds - tv.tv_sec) * 1e+9);
+
+     while (1)
+     {
+         /* Sleep for the time specified in tv. If interrupted by a
+         signal, place the remaining time left to sleep back into tv. */
+         int rval = nanosleep (&tv, &tv);
+
+         if (rval == 0)
+             /* Completed the entire sleep time; all done. */
+             return 0;
+         else if (errno == EINTR)
+             /* Interrupted by a signal. Try again. */
+             continue;
+         else 
+             /* Some other error; bail out. */
+             return rval;
+     }
+
+     return 0;
+}
+
+void Throttle::printStatistics() {
+
+    printf("Number of throttle events %lu\n", throttleCount);
+
+    if (simEndTime > 0.0) {
+        printf("Total Sim Time: %.6f\n", simEndTime - simStartTime);
+    }
+
+}
diff --git a/tos/lib/tossim/sf/Throttle.h b/tos/lib/tossim/sf/Throttle.h
new file mode 100644
index 00000000..22d17d33
--- /dev/null
+++ b/tos/lib/tossim/sf/Throttle.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Toilers Research Group - Colorado School of 
+ *   Mines  nor the names of its contributors may be used to endorse 
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Author: Chad Metcalf
+ * Date: July 9, 2007
+ *
+ * A simple Throttle to slow a simulation to near real time.
+ *
+ */
+#ifndef  _THROTTLE_H_
+#define  _THROTTLE_H_
+
+
+#include <errno.h>
+#include <time.h>
+#include <sys/time.h>
+#include "tossim.h"
+
+class Throttle {
+
+    public:
+
+        Throttle(Tossim* tossim, const int ms);
+        ~Throttle();
+
+        void initialize();
+        void finalize();
+
+        void checkThrottle();
+        void printStatistics();
+
+    private:
+
+        double simStartTime;
+        double simEndTime;
+        sim_time_t simPace;
+
+        Tossim* sim;
+
+        unsigned long throttleCount;
+
+        double getTime();
+        double toDouble(struct timeval* tv);
+        int simSleep(double seconds);
+};
+#endif   // ----- #ifndef _THROTTLE_H_  ----- 
diff --git a/tos/lib/tossim/sf/Throttle.i b/tos/lib/tossim/sf/Throttle.i
new file mode 100644
index 00000000..21076314
--- /dev/null
+++ b/tos/lib/tossim/sf/Throttle.i
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Toilers Research Group - Colorado School of 
+ *   Mines  nor the names of its contributors may be used to endorse 
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Author: Chad Metcalf
+ * Date: July 9, 2007
+ *
+ * SWIG interface specification for the Throttle object.
+ */
+
+
+%{
+#include <Throttle.h>
+%}
+
+%apply (char *STRING, int LENGTH) { (char *data, int len) };
+
+
+class Throttle {
+
+    public:
+
+        Throttle(Tossim* tossim, const int ms);
+        ~Throttle();
+
+        void initialize();
+        void finalize();
+
+        void checkThrottle();
+        void printStatistics();
+
+};
diff --git a/tos/lib/tossim/sf/examples/Makefile.Driver b/tos/lib/tossim/sf/examples/Makefile.Driver
new file mode 100644
index 00000000..c145eeba
--- /dev/null
+++ b/tos/lib/tossim/sf/examples/Makefile.Driver
@@ -0,0 +1,48 @@
+#
+# Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of Toilers Research Group - Colorado School of 
+#   Mines  nor the names of its contributors may be used to endorse 
+#   or promote products derived from this software without specific
+#   prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+# UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE.
+#*
+# Author: Chad Metcalf
+# Date: July 9, 2007
+#
+
+DRIVER_OBJS=build/micaz/c-sf.o build/micaz/sf.o build/micaz/tossim.o build/micaz/c-support.o build/micaz/sim.o build/micaz/throttle.o 
+
+SFDIR=$(TOSDIR)/lib/tossim/sf
+
+all:
+	make micaz sim-sf
+	g++ -g -c -o TestSerial.o TestSerial.c -I$(TOSDIR)/lib/tossim -I$(SFDIR) 
+	g++ -o TestSerial $(DRIVER_OBJS)  TestSerial.o -lpython2.5 
+	mig python -target=null -python-classname=TestSerialMsg TestSerial.h test_serial_msg -o TestSerialMsg.py
+
+clean:
+	make clean
+	rm -f TestSerial TestSerial.o TestSerialMsg.py *.pyc app.xml
diff --git a/tos/lib/tossim/sf/examples/TestSerial.c b/tos/lib/tossim/sf/examples/TestSerial.c
new file mode 100644
index 00000000..71f57544
--- /dev/null
+++ b/tos/lib/tossim/sf/examples/TestSerial.c
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Toilers Research Group - Colorado School of 
+ *   Mines  nor the names of its contributors may be used to endorse 
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Author: Chad Metcalf
+ * Date: Oct 1, 2007
+ *
+ * A simple TOSSIM driver for the TestSerial application that utilizes 
+ * TOSSIM Live extensions.
+ *
+ */
+
+#include <stdio.h>
+#include <tossim.h>
+#include <SerialForwarder.h>
+#include <Throttle.h>
+#include <radio.h>
+#include <math.h>
+#include <unistd.h>
+
+int main() {
+ Tossim* t = new Tossim(NULL);
+ t-> init();
+
+ Throttle throttle(t, 10);
+ SerialForwarder sf(9001);
+
+ for (int i = 0; i < 1; i++) {
+   Mote* m = t->getNode(i);
+   m->bootAtTime(rand() % t->ticksPerSecond());
+ }
+
+
+ t->addChannel("Serial", stdout);
+ t->addChannel("TestSerialC", stdout);
+ t->addChannel("Atm128AlarmC", stdout);
+
+ Radio* r = t->radio();
+ for (int i = 0; i < 1; i++) {
+    r->setNoise(i, -105.0, 1.0);
+   for (int j = 0; j < 1; j++) {
+      r->add(i, j, -96.0 - (double)abs(i - j));
+      r->add(j, i, -96.0 - (double)abs(i - j));
+   }
+ }
+
+sf.process();
+
+ throttle.initialize();
+ while(t->time() < 600 * t->ticksPerSecond()) {
+   throttle.checkThrottle();
+   sf.process();
+   t->runNextEvent();
+ }
+}
diff --git a/tos/lib/tossim/sf/examples/TestSerial.py b/tos/lib/tossim/sf/examples/TestSerial.py
new file mode 100644
index 00000000..a0a935cc
--- /dev/null
+++ b/tos/lib/tossim/sf/examples/TestSerial.py
@@ -0,0 +1,85 @@
+    #
+# Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of Toilers Research Group - Colorado School of 
+#   Mines  nor the names of its contributors may be used to endorse 
+#   or promote products derived from this software without specific
+#   prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+# UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE.
+#*
+# Author: Chad Metcalf
+# Date: July 9, 2007
+#
+# A simple TOSSIM driver for the TestSerial application that utilizes 
+# TOSSIM Live extensions.
+#
+import sys
+import time
+
+from TOSSIM import *
+from TestSerialMsg import *
+
+t = Tossim([])
+m = t.mac()
+r = t.radio()
+sf = SerialForwarder(9001)
+throttle = Throttle(t, 10)
+
+t.addChannel("Serial", sys.stdout);
+t.addChannel("TestSerialC", sys.stdout);
+
+for i in range(0, 2):
+  m = t.getNode(i);
+  m.bootAtTime((31 + t.ticksPerSecond() / 10) * i + 1);
+
+sf.process();
+throttle.initialize();
+
+for i in range(0, 60):
+  throttle.checkThrottle();
+  t.runNextEvent();
+  sf.process();
+
+msg = TestSerialMsg()
+msg.set_counter(7);
+
+serialpkt = t.newSerialPacket();
+serialpkt.setData(msg.data)
+serialpkt.setType(msg.get_amType())
+serialpkt.setDestination(0)
+serialpkt.deliver(0, t.time() + 3)
+
+pkt = t.newPacket();
+pkt.setData(msg.data)
+pkt.setType(msg.get_amType())
+pkt.setDestination(0)
+pkt.deliver(0, t.time() + 10)
+
+for i in range(0, 20):
+  throttle.checkThrottle();
+  t.runNextEvent();
+  sf.process();
+
+throttle.printStatistics()
diff --git a/tos/lib/tossim/sf/examples/TestSerialSFClient.py b/tos/lib/tossim/sf/examples/TestSerialSFClient.py
new file mode 100644
index 00000000..f083d055
--- /dev/null
+++ b/tos/lib/tossim/sf/examples/TestSerialSFClient.py
@@ -0,0 +1,57 @@
+#!/usr/bin/env python
+#
+# Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of Toilers Research Group - Colorado School of 
+#   Mines  nor the names of its contributors may be used to endorse 
+#   or promote products derived from this software without specific
+#   prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+# UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE.
+#*
+# Author: Chad Metcalf
+# Date: July 9, 2007
+#
+# A simple Python script that listens on a SF for TestSerial messages.
+
+from TestSerialMsg import *
+from tinyos.message import MoteIF
+
+class MyClass:
+    def __init__(self):
+        # Create a MoteIF
+        self.mif = MoteIF.MoteIF()
+        # Attach a source to it
+        self.source = self.mif.addSource("sf@localhost:9001")
+
+        # SomeMessageClass.py would be generated by MIG
+        self.mif.addListener(self, TestSerialMsg)
+
+    # Called by the MoteIF's receive thread when a new message
+    # is received
+    def receive(self, src, msg):
+        print "Received message: "+ str(msg)
+
+if __name__ == "__main__":
+    m = MyClass()
diff --git a/tos/lib/tossim/sf/generate-swig.bash b/tos/lib/tossim/sf/generate-swig.bash
new file mode 100644
index 00000000..e0800067
--- /dev/null
+++ b/tos/lib/tossim/sf/generate-swig.bash
@@ -0,0 +1,39 @@
+#!/bin/bash
+# Copyright (c) 2005 Stanford University. All rights reserved.
+#
+ # Redistribution and use in source and binary forms, with or without
+ # modification, are permitted provided that the following conditions
+ # are met:
+ #
+ # - Redistributions of source code must retain the above copyright
+ #   notice, this list of conditions and the following disclaimer.
+ # - Redistributions in binary form must reproduce the above copyright
+ #   notice, this list of conditions and the following disclaimer in the
+ #   documentation and/or other materials provided with the
+ #   distribution.
+ # - Neither the name of the copyright holders nor the names of
+ #   its contributors may be used to endorse or promote products derived
+ #   from this software without specific prior written permission.
+ #
+ # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ # FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ # THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ # OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Simple script that generates the Python interfaces to TOSSIM.
+#
+# Author: Philip Levis
+# Author: Chad Metcalf
+#
+# $Id: generate-swig.bash,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+swig -shadow -python -c++ -I$TOSROOT/tos/lib/tossim tossim.i
+
diff --git a/tos/lib/tossim/sf/sim/MainC.nc b/tos/lib/tossim/sf/sim/MainC.nc
new file mode 100644
index 00000000..934b353e
--- /dev/null
+++ b/tos/lib/tossim/sf/sim/MainC.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This version of Main is the system interface the TinyOS boot
+ * sequence in TOSSIM. It wires the boot sequence implementation to
+ * the scheduler and hardware resources. Unlike the standard Main,
+ * it does not actually define the <tt>main</tt> function, as a
+ * TOSSIM simulation is triggered from Python.
+ *
+ * @author Philip Levis
+ * @author Chad Metcalf
+ * @date   Sep 14 2007
+ */
+
+// $Id: MainC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+#include "hardware.h"
+
+configuration MainC {
+  provides interface Boot;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  components PlatformC, SimMainP, TinySchedulerC;
+  
+  // SimMoteP is not referred to by any component here.
+  // It is included to make sure nesC loads it, as it
+  // includes functionality many other systems depend on.
+  components SimMoteP;
+  
+  SimMainP.Scheduler -> TinySchedulerC;
+  SimMainP.PlatformInit -> PlatformC;
+
+  // Export the SoftwareInit and Booted for applications
+  SoftwareInit = SimMainP.SoftwareInit;
+  Boot = SimMainP;
+
+  // These components may not be used by the application, but must
+  // be included. This is because there are Python calls that deliver
+  // packets, and those python calls must terminate somewhere. If
+  // the application does not wire this up to, e.g., ActiveMessageC,
+  // the default handlers make sure nothing happens when a script
+  // tries to deliver a packet to a node that has no radio stack.
+  components ActiveMessageC;
+  components SerialActiveMessageC;
+  
+}
+
diff --git a/tos/lib/tossim/sf/sim/SerialActiveMessageC.nc b/tos/lib/tossim/sf/sim/SerialActiveMessageC.nc
new file mode 100644
index 00000000..d35e0f08
--- /dev/null
+++ b/tos/lib/tossim/sf/sim/SerialActiveMessageC.nc
@@ -0,0 +1,297 @@
+// $Id: SerialActiveMessageC.nc,v 1.3 2010-06-22 20:50:43 scipio Exp $
+/*
+ * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Toilers Research Group - Colorado School of 
+ *   Mines  nor the names of its contributors may be used to endorse 
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Author: Chad Metcalf
+ * Date: July 9, 2007
+ *
+ * The Serial Active Message implementation for use with the TOSSIM Live
+ * extensions.
+ *
+ */
+
+#include <AM.h>
+#include <Serial.h>
+#include "sim_serial_forwarder.h"
+
+module SerialActiveMessageC {
+    provides {
+        interface SplitControl;
+
+        interface AMSend[am_id_t id];
+        interface Receive[am_id_t id];
+        interface Receive as Snoop[am_id_t id];
+
+        interface Packet;
+        interface AMPacket;
+        interface PacketAcknowledgements as Acks;
+    }
+    uses {
+        interface TossimPacketModel as Model;
+        command am_addr_t amAddress();
+    }
+}
+implementation {
+
+    message_t buffer;
+    message_t* bufferPointer = &buffer;
+    
+    message_t* sendMsgPtr = NULL;
+
+    serial_header_t* getHeader(message_t* amsg) {
+        return (serial_header_t*)(amsg->data - sizeof(serial_header_t));
+    }
+
+    task void startDone() { signal SplitControl.startDone(SUCCESS); }
+    task void stopDone() { signal SplitControl.stopDone(SUCCESS); }
+
+    command error_t SplitControl.start() {
+        post startDone();
+        return SUCCESS;
+    }
+
+    command error_t SplitControl.stop() {
+        post stopDone();
+        return SUCCESS;
+    }
+
+    command error_t AMSend.send[am_id_t id](am_addr_t addr,
+                                            message_t* amsg,
+                                            uint8_t len) {
+        error_t err;
+        serial_header_t* header = getHeader(amsg);
+        
+        header->type = id;
+        header->dest = addr;
+        // For out going serial messages we'll use the real TOS_NODE_ID
+        header->src = TOS_NODE_ID;
+        header->length = len;
+        err = call Model.send((int)addr, amsg, len + sizeof(serial_header_t));
+        return err;
+    }
+
+    command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+        dbg("Serial", "SerialAM: cancelled a packet\n");
+        return call Model.cancel(msg);
+    }
+
+    command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+        return call Packet.maxPayloadLength();
+    }
+
+    command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+        return call Packet.getPayload(m, len);
+    }
+
+    event void Model.sendDone(message_t* msg, error_t result) {
+        signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+    }
+
+    task void modelSendDone ()
+    {
+        signal Model.sendDone(sendMsgPtr, SUCCESS);
+    }
+
+    default command error_t Model.send(int node, message_t* msg, uint8_t len) {
+
+        sendMsgPtr = msg;
+
+        dbg("Serial", "Sending serial message (%p) of type %hhu and length %hhu @ %s.\n",
+            msg, call AMPacket.type(msg), len, sim_time_string());
+        sim_sf_dispatch_packet((void*)msg, len);
+        
+        post modelSendDone ();
+
+        return SUCCESS;
+    }
+
+    /* Receiving a packet */
+
+    event void Model.receive(message_t* msg) {
+        uint8_t len;
+        void* payload;
+
+        memcpy(bufferPointer, msg, sizeof(message_t));
+	
+	if (msg != NULL) {
+	  free(msg);
+	}
+	
+        payload = call Packet.getPayload(bufferPointer, call Packet.maxPayloadLength());
+        len = call Packet.payloadLength(bufferPointer);
+
+        dbg("Serial", "Received serial message (%p) of type %hhu and length %hhu @ %s.\n",
+            bufferPointer, call AMPacket.type(bufferPointer), len, sim_time_string());
+        bufferPointer = signal Receive.receive[call AMPacket.type(bufferPointer)]
+            (bufferPointer, payload, len);
+    }
+
+    event bool Model.shouldAck(message_t* msg) {
+        serial_header_t* header = getHeader(msg);
+        if (header->dest == call amAddress()) {
+            dbg("Acks", "Received packet addressed to me so ack it\n");
+            return TRUE;
+        }
+        return FALSE;
+    }
+
+    command am_addr_t AMPacket.address() {
+        return call amAddress();
+    }
+
+    command am_addr_t AMPacket.destination(message_t* amsg) {
+        serial_header_t* header = getHeader(amsg);
+        return header->dest;
+    }
+
+    command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+        serial_header_t* header = getHeader(amsg);
+        header->dest = addr;
+    }
+
+    command am_addr_t AMPacket.source(message_t* amsg) {
+        serial_header_t* header = getHeader(amsg);
+        return header->src;
+    }
+
+    command void AMPacket.setSource(message_t* amsg, am_addr_t addr) {
+        serial_header_t* header = getHeader(amsg);
+        header->src = addr;
+    }
+
+    command bool AMPacket.isForMe(message_t* amsg) {
+        return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+                call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+    }
+
+    command am_id_t AMPacket.type(message_t* amsg) {
+        serial_header_t* header = getHeader(amsg);
+        return header->type;
+    }
+
+    command void AMPacket.setType(message_t* amsg, am_id_t t) {
+        serial_header_t* header = getHeader(amsg);
+        header->type = t;
+    }
+
+    command am_group_t AMPacket.group(message_t* amsg) {
+        serial_header_t* header = getHeader(amsg);
+        return header->group;
+    }
+
+    command void AMPacket.setGroup(message_t* msg, am_group_t group) {
+        serial_header_t* header = getHeader(msg);
+        header->group = group;
+    }
+
+    command am_group_t AMPacket.localGroup() {
+        return TOS_AM_GROUP;
+    }
+    command void Packet.clear(message_t* msg) {}
+
+    command void* Packet.getPayload(message_t* msg, uint8_t len) {
+        if (len <= TOSH_DATA_LENGTH) {
+            return msg->data;
+        } else {
+            return NULL;
+        }
+    }
+
+    command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+        getHeader(msg)->length = len;
+    }
+
+    command uint8_t Packet.maxPayloadLength() {
+        return TOSH_DATA_LENGTH;
+    }
+
+    command uint8_t Packet.payloadLength(message_t* msg) {
+        return getHeader(msg)->length;
+    }
+
+    async command error_t Acks.requestAck(message_t* msg) {
+        return FAIL;
+    }
+
+    async command error_t Acks.noAck(message_t* msg) {
+        return SUCCESS;
+    }
+
+    async command bool Acks.wasAcked(message_t* msg) {
+        return FALSE;
+    }
+    default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+        return msg;
+    }
+
+    default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+        return msg;
+    }
+
+    default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+        return;
+    }
+
+    default command error_t Model.cancel(message_t* msg) {
+        return FAIL;
+    }
+
+    default command am_addr_t amAddress() {
+        return 0;
+    }
+
+    void serial_active_message_deliver_handle(sim_event_t* evt) {
+        message_t* m = (message_t*)evt->data;
+        signal Model.receive(m);
+    }
+
+    sim_event_t* allocate_serial_deliver_event(int node, message_t* msg, sim_time_t t) {
+        sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t));
+	message_t* newMsg = (message_t*)malloc(sizeof(message_t));
+        uint8_t payloadLength = ((serial_header_t*)msg->header)->length;
+        memcpy(getHeader(newMsg), msg, sizeof(serial_header_t) + payloadLength);
+	
+        evt->mote = node;
+        evt->time = t;
+        evt->handle = serial_active_message_deliver_handle;
+        evt->cleanup = sim_queue_cleanup_event;
+        evt->cancelled = 0;
+        evt->force = 0;
+        evt->data = newMsg;
+        return evt;
+    }
+
+    void serial_active_message_deliver(int node, message_t* msg, sim_time_t t) @C() @spontaneous() {
+        sim_event_t* evt = allocate_serial_deliver_event(node, msg, t);
+        sim_queue_insert(evt);
+    }
+}
diff --git a/tos/lib/tossim/sf/sim/tos.h b/tos/lib/tossim/sf/sim/tos.h
new file mode 100644
index 00000000..c90ed04a
--- /dev/null
+++ b/tos/lib/tossim/sf/sim/tos.h
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of all of the basic TOSSIM primitives and utility
+ * functions.
+ *
+ * @author Philip Levis
+ * @author Chad Metcalf
+ * @date   July 15 2007
+ */
+
+// $Id: tos.h,v 1.3 2010-06-29 22:07:51 scipio Exp $
+
+#ifndef TOS_H_INCLUDED
+#define TOS_H_INCLUDED
+
+#if !defined(__CYGWIN__)
+#if defined(__MSP430__)
+#include <sys/inttypes.h>
+#else
+#include <inttypes.h>
+#endif
+#else //cygwin
+#include <unistd.h>
+#include <stdio.h>
+#include <sys/types.h>
+#endif
+
+#include <string.h>
+#include <stdlib.h>
+#include <math.h>
+#include <stddef.h>
+#include <ctype.h>
+#include <stdio.h>
+
+/* 
+ * TEMPORARY: include the Safe TinyOS macros so that annotations get
+ * defined away for non-safe users -- this will no longer be necessary
+ * after we require users to use the ncc that has Safe TinyOS
+ * support 
+ */
+#include "../../lib/safe/include/annots_stage1.h"
+
+#ifndef __cplusplus
+typedef uint8_t bool;
+#endif
+
+enum { FALSE = 0, TRUE = 1 };
+
+extern uint16_t TOS_NODE_ID;
+
+#define PROGMEM
+
+#ifndef TOSSIM_MAX_NODES
+#define TOSSIM_MAX_NODES 1000
+#endif
+
+#include <sim_event_queue.h>
+#include <sim_tossim.h>
+#include <sim_mote.h>
+#include <sim_log.h>
+
+// We only want to include these files if we are compiling TOSSIM proper,
+// that is, the C file representing the TinyOS application. The TinyOS
+// build process means that this is the only really good place to put
+// them.
+#ifdef TOSSIM
+
+struct @atmostonce { };
+struct @atleastonce { };
+struct @exactlyonce { };
+
+#include <sim_log.c>
+#include <heap.c>
+#include <sim_event_queue.c>
+#include <sim_tossim.c>
+#include <sim_mac.c>
+#include <sim_packet.c>
+#include <sim_serial_packet.c>
+#endif
+
+#endif
diff --git a/tos/lib/tossim/sf/sim_serial_forwarder.c b/tos/lib/tossim/sf/sim_serial_forwarder.c
new file mode 100644
index 00000000..fd700440
--- /dev/null
+++ b/tos/lib/tossim/sf/sim_serial_forwarder.c
@@ -0,0 +1,399 @@
+/*
+ * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Toilers Research Group - Colorado School of 
+ *   Mines  nor the names of its contributors may be used to endorse 
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Author: Chad Metcalf
+ * Date: July 9, 2007
+ *
+ * The serial forwarder for TOSSIM
+ *
+ */
+
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <netinet/in.h>
+#include <netdb.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <signal.h>
+
+#include "sim_serial_forwarder.h"
+#include "sim_serial_packet.h"
+#include "sim_tossim.h"
+
+struct sim_sf_client_list *sim_sf_clients;
+int sim_sf_server_socket;
+int sim_sf_packets_read, sim_sf_packets_written, sim_sf_num_clients;
+
+int sim_sf_unix_check(const char *msg, int result)
+{
+    if (result < 0)
+    {
+        perror(msg);
+        exit(2);
+    }
+
+    return result;
+}
+
+void *sim_sf_xmalloc(size_t s)
+{
+    void *p = malloc(s);
+
+    if (!p)
+    {
+        fprintf(stderr, "out of memory\n");
+        exit(2);
+    }
+    return p;
+}
+
+void sim_sf_fd_wait(fd_set *fds, int *maxfd, int fd)
+{
+    if (fd > *maxfd)
+        *maxfd = fd;
+    FD_SET(fd, fds);
+}
+
+void sim_sf_pstatus(void)
+{
+    printf("clients %d, read %d, wrote %d\n", sim_sf_num_clients, sim_sf_packets_read,
+           sim_sf_packets_written);
+}
+
+void sim_sf_add_client(int fd)
+{
+    struct sim_sf_client_list *c = (struct sim_sf_client_list*)sim_sf_xmalloc(sizeof *c);
+
+    c->next = sim_sf_clients;
+    sim_sf_clients = c;
+    sim_sf_num_clients++;
+    sim_sf_pstatus();
+
+    c->fd = fd;
+}
+
+void sim_sf_rem_client(struct sim_sf_client_list **c)
+{
+    struct sim_sf_client_list *dead = *c;
+
+    *c = dead->next;
+    sim_sf_num_clients--;
+    sim_sf_pstatus();
+    close(dead->fd);
+    free(dead);
+}
+
+void sim_sf_new_client(int fd)
+{
+    fcntl(fd, F_SETFL, 0);
+    if (sim_sf_init_source(fd) < 0)
+        close(fd);
+    else
+        sim_sf_add_client(fd);
+}
+
+void sim_sf_check_clients(fd_set *fds)
+{
+    struct sim_sf_client_list **c;
+
+    for (c = &sim_sf_clients; *c; )
+    {
+        int isNext = 1;
+
+        if (FD_ISSET((*c)->fd, fds))
+        {
+            int len;
+            const void *packet = sim_sf_read_packet((*c)->fd, &len);
+
+            if (packet)
+            {
+                sim_sf_forward_packet(packet, len);
+                free((void *)packet);
+            }
+            else
+            {
+                sim_sf_rem_client(c);
+                isNext = 0;
+            }
+        }
+        if (isNext)
+            c = &(*c)->next;
+    }
+}
+
+void sim_sf_wait_clients(fd_set *fds, int *maxfd)
+{
+    struct sim_sf_client_list *c;
+
+    for (c = sim_sf_clients; c; c = c->next)
+        sim_sf_fd_wait(fds, maxfd, c->fd);
+}
+
+void sim_sf_dispatch_packet(const void *packet, int len)
+{
+    struct sim_sf_client_list **c;
+
+    char* dispatchPacket = (char*) sim_sf_xmalloc(len+1);
+    
+    memset(dispatchPacket, 0, len+1);
+    memcpy(dispatchPacket+1, packet, len);
+
+    for (c = &sim_sf_clients; *c; )
+        if (sim_sf_write_packet((*c)->fd, dispatchPacket, len+1) >= 0)
+        {
+            sim_sf_packets_written++;
+            c = &(*c)->next;
+        }
+        else
+            sim_sf_rem_client(c);
+
+    free(dispatchPacket);
+}
+
+void sim_sf_open_server_socket(int port)
+{
+    struct sockaddr_in me;
+    int opt;
+
+    sim_sf_server_socket = sim_sf_unix_check("socket", socket(AF_INET, SOCK_STREAM, 0));
+    sim_sf_unix_check("socket", fcntl(sim_sf_server_socket, F_SETFL, O_NONBLOCK));
+    memset(&me, 0, sizeof me);
+    me.sin_family = AF_INET;
+    me.sin_port = htons(port);
+
+    opt = 1;
+    sim_sf_unix_check("setsockopt", setsockopt(sim_sf_server_socket, SOL_SOCKET, SO_REUSEADDR,
+                                        (char *)&opt, sizeof(opt)));
+
+    sim_sf_unix_check("bind", bind(sim_sf_server_socket, (struct sockaddr *)&me, sizeof me));
+    sim_sf_unix_check("listen", listen(sim_sf_server_socket, 5));
+}
+
+void sim_sf_check_new_client(void)
+{
+    int clientfd = accept(sim_sf_server_socket, NULL, NULL);
+
+    if (clientfd >= 0)
+        sim_sf_new_client(clientfd);
+}
+
+void sim_sf_forward_packet(const void *packet, int len)
+{
+    char* forwardPacket = (char*)packet + 1;
+
+    uint16_t addr = sim_serial_packet_destination((struct sim_serial_packet*)forwardPacket);
+
+    sim_serial_packet_deliver(addr, 
+                             (struct sim_serial_packet*)forwardPacket,
+                             sim_time());
+    sim_sf_packets_read++;
+}
+
+void sim_sf_process ()
+{
+
+        fd_set rfds;
+        int maxfd = -1;
+        struct timeval zero;
+        int ret;
+
+        zero.tv_sec = zero.tv_usec = 0;
+
+        FD_ZERO(&rfds);
+        sim_sf_fd_wait(&rfds, &maxfd, sim_sf_server_socket);
+        sim_sf_wait_clients(&rfds, &maxfd);
+
+        ret = select(maxfd + 1, &rfds, NULL, NULL, &zero);
+        if (ret >= 0)
+        {
+            if (FD_ISSET(sim_sf_server_socket, &rfds))
+                sim_sf_check_new_client();
+
+            sim_sf_check_clients(&rfds);
+        }
+}
+
+int sim_sf_saferead(int fd, void *buffer, int count)
+{
+  int actual = 0;
+
+  while (count > 0)
+    {
+      int n = read(fd, buffer, count);
+
+      if (n == -1 && errno == EINTR)
+        continue;
+      if (n == -1)
+        return -1;
+      if (n == 0)
+        return actual;
+
+      count -= n;
+      actual += n;
+      buffer = (char*)buffer + n;
+    }
+  return actual;
+}
+
+int sim_sf_safewrite(int fd, const void *buffer, int count)
+{
+  int actual = 0;
+
+  while (count > 0)
+    {
+      int n = write(fd, buffer, count);
+
+      if (n == -1 && errno == EINTR)
+        continue;
+      if (n == -1)
+        return -1;
+
+      count -= n;
+      actual += n;
+      buffer = (char*)buffer + n;
+    }
+  return actual;
+}
+
+int sim_sf_open_source(const char *host, int port)
+/* Returns: file descriptor for serial forwarder at host:port
+ */
+{
+  int fd = socket(AF_INET, SOCK_STREAM, 0);
+  struct hostent *entry;
+  struct sockaddr_in addr;
+
+  if (fd < 0)
+    return fd;
+
+  entry = gethostbyname(host);
+  if (!entry)
+    {
+      close(fd);
+      return -1;
+    }      
+
+  addr.sin_family = entry->h_addrtype;
+  memcpy(&addr.sin_addr, entry->h_addr, entry->h_length);
+  addr.sin_port = htons(port);
+  if (connect(fd, (struct sockaddr *)&addr, sizeof addr) < 0)
+    {
+      close(fd);
+      return -1;
+    }
+
+  if (sim_sf_init_source(fd) < 0)
+    {
+      close(fd);
+      return -1;
+    }
+
+  return fd;
+}
+
+int sim_sf_init_source(int fd)
+/* Effects: Checks that fd is following the TinyOS 2.0 serial forwarder 
+     protocol. Use this if you obtain your file descriptor from some other
+     source than open_sf_source (e.g., you're a server)
+   Returns: 0 if it is, -1 otherwise
+ */
+{
+  char check[2], us[2];
+  int version;
+
+  /* Indicate version and check if a TinyOS 2.0 serial forwarder on the
+     other end */
+  us[0] = 'U'; us[1] = ' ';
+  if (sim_sf_safewrite(fd, us, 2) != 2 ||
+      sim_sf_saferead(fd, check, 2) != 2 ||
+      check[0] != 'U')
+    return -1;
+
+  version = check[1];
+  if (us[1] < version)
+    version = us[1];
+
+  /* Add other cases here for later protocol versions */
+  switch (version)
+    {
+    case ' ': break;
+    default: return -1; /* not a valid version */
+    }
+
+  return 0;
+}
+
+void *sim_sf_read_packet(int fd, int *len)
+/* Effects: reads packet from serial forwarder on file descriptor fd
+   Returns: the packet read (in newly allocated memory), and *len is
+     set to the packet length, or NULL for failure
+*/
+{
+  unsigned char l;
+  void *packet;
+
+  if (sim_sf_saferead(fd, &l, 1) != 1)
+    return NULL;
+
+  packet = malloc(l);
+  if (!packet)
+    return NULL;
+
+  if (sim_sf_saferead(fd, packet, l) != l)
+    {
+      free(packet);
+      return NULL;
+    }
+  *len = l;
+  
+  return packet;
+}
+
+int sim_sf_write_packet(int fd, const void *packet, int len)
+/* Effects: writes len byte packet to serial forwarder on file descriptor
+     fd
+   Returns: 0 if packet successfully written, -1 otherwise
+*/
+{
+  unsigned char l = len;
+
+  if (sim_sf_safewrite(fd, &l, 1) != 1 ||
+      sim_sf_safewrite(fd, packet, l) != l)
+    return -1;
+
+  return 0;
+}
+
diff --git a/tos/lib/tossim/sf/sim_serial_forwarder.h b/tos/lib/tossim/sf/sim_serial_forwarder.h
new file mode 100644
index 00000000..cf71658e
--- /dev/null
+++ b/tos/lib/tossim/sf/sim_serial_forwarder.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2007 Toilers Research Group - Colorado School of Mines
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Toilers Research Group - Colorado School of 
+ *   Mines  nor the names of its contributors may be used to endorse 
+ *   or promote products derived from this software without specific
+ *   prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Author: Chad Metcalf
+ * Date: July 9, 2007
+ *
+ * The serial forwarder for TOSSIM
+ *
+ */
+
+#ifndef  _SIM_SERIAL_FORWARDER_H_
+#define  _SIM_SERIAL_FORWARDER_H_
+#include <sys/types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct sim_sf_client_list
+{
+    struct sim_sf_client_list *next;
+    int fd;
+};
+
+void sim_sf_forward_packet(const void *packet, int len);
+void sim_sf_dispatch_packet(const void *packet, int len);
+void sim_sf_open_server_socket(int port);
+void sim_sf_process ();
+
+int sim_sf_unix_check(const char *msg, int result);
+void *sim_sf_xmalloc(size_t s);
+void sim_sf_fd_wait(fd_set *fds, int *maxfd, int fd);
+void sim_sf_pstatus(void);
+void sim_sf_add_client(int fd);
+void sim_sf_rem_client(struct sim_sf_client_list **c);
+void sim_sf_new_client(int fd);
+void sim_sf_check_clients(fd_set *fds);
+void sim_sf_wait_clients(fd_set *fds, int *maxfd);
+void sim_sf_check_new_client(void);
+void sim_sf_forward_packet(const void *packet, int len);
+int sim_sf_saferead(int fd, void *buffer, int count);
+int sim_sf_safewrite(int fd, const void *buffer, int count);
+int sim_sf_open_source(const char *host, int port);
+int sim_sf_init_source(int fd);
+void *sim_sf_read_packet(int fd, int *len);
+int sim_sf_write_packet(int fd, const void *packet, int len);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif   // ----- #ifndef _SIM_SERIAL_FORWARDER_H_  ----- 
diff --git a/tos/lib/tossim/sf/sim_serial_packet.c b/tos/lib/tossim/sf/sim_serial_packet.c
new file mode 100644
index 00000000..e2761d5e
--- /dev/null
+++ b/tos/lib/tossim/sf/sim_serial_packet.c
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * TOSSIM packet abstract data type, so C++ code can call into nesC
+ * code that does the native-to-network type translation.
+ *
+ * @author Philip Levis
+ * @author Chad Metcalf
+ * @date   July 15 2007
+ */
+
+// $Id: sim_serial_packet.c,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+#include <sim_serial_packet.h>
+#include <message.h>
+#include <platform_message.h>
+
+// NOTE: This function is defined in lib/tossim/ActiveMessageC. It
+// has to be predeclared here because it is defined within that component.
+void serial_active_message_deliver(int node, message_t* m, sim_time_t t);
+
+static serial_header_t* getSerialHeader(message_t* msg) {
+    return (serial_header_t*)(msg->data - sizeof(serial_header_t));
+}
+
+void sim_serial_packet_set_destination(sim_serial_packet_t* msg, uint16_t dest)__attribute__ ((C, spontaneous)) {
+    serial_header_t* hdr = getSerialHeader((message_t*)msg);
+    hdr->dest = dest;
+}__attribute__ ((C, spontaneous))
+
+uint16_t sim_serial_packet_destination(sim_serial_packet_t* msg)__attribute__ ((C, spontaneous)) {
+    serial_header_t* hdr = getSerialHeader((message_t*)msg);
+    return hdr->dest;
+}
+
+void sim_serial_packet_set_source(sim_serial_packet_t* msg, uint16_t src)__attribute__ ((C, spontaneous)) {
+    serial_header_t* hdr = getSerialHeader((message_t*)msg);
+    hdr->src = src;
+}__attribute__ ((C, spontaneous))
+
+uint16_t sim_serial_packet_source(sim_serial_packet_t* msg)__attribute__ ((C, spontaneous)) {
+    serial_header_t* hdr = getSerialHeader((message_t*)msg);
+    return hdr->src;
+}
+
+void sim_serial_packet_set_length(sim_serial_packet_t* msg, uint8_t length)__attribute__ ((C, spontaneous)) {
+    serial_header_t* hdr = getSerialHeader((message_t*)msg);
+    hdr->length = length;
+}
+uint16_t sim_serial_packet_length(sim_serial_packet_t* msg)__attribute__ ((C, spontaneous)) {
+    serial_header_t* hdr = getSerialHeader((message_t*)msg);
+    return hdr->length;
+}
+
+void sim_serial_packet_set_type(sim_serial_packet_t* msg, uint8_t type) __attribute__ ((C, spontaneous)){
+    serial_header_t* hdr = getSerialHeader((message_t*)msg);
+    hdr->type = type;
+}
+
+uint8_t sim_serial_packet_type(sim_serial_packet_t* msg) __attribute__ ((C, spontaneous)){
+    serial_header_t* hdr = getSerialHeader((message_t*)msg);
+    return hdr->type;
+}
+
+uint8_t* sim_serial_packet_data(sim_serial_packet_t* p) __attribute__ ((C, spontaneous)){
+    message_t* msg = (message_t*)p;
+    return (uint8_t*)&msg->data;
+}
+
+void sim_serial_packet_deliver(int node, sim_serial_packet_t* msg, sim_time_t t) __attribute__ ((C, spontaneous)){
+    if (t < sim_time()) {
+        t = sim_time();
+    }
+    dbg("Packet", "sim_serial_packet.c: Delivering packet %p to %i at %llu\n", msg, node, t);
+    serial_active_message_deliver(node, (message_t*)msg, t);
+}
+
+uint8_t sim_serial_packet_max_length(sim_serial_packet_t* msg) __attribute__ ((C, spontaneous)){
+    return TOSH_DATA_LENGTH;
+}
+
+sim_serial_packet_t* sim_serial_packet_allocate () __attribute__ ((C, spontaneous)){
+    return (sim_serial_packet_t*)malloc(sizeof(message_t));
+}
+
+void sim_serial_packet_free(sim_serial_packet_t* p) __attribute__ ((C, spontaneous)) {
+    printf("sim_serial_packet.c: Freeing packet %p\n", p);
+    free(p);
+}
diff --git a/tos/lib/tossim/sf/sim_serial_packet.h b/tos/lib/tossim/sf/sim_serial_packet.h
new file mode 100644
index 00000000..c1c68a8a
--- /dev/null
+++ b/tos/lib/tossim/sf/sim_serial_packet.h
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * TOSSIM packet abstract data type, so C++ code can call into nesC
+ * code that does the native-to-network type translation.
+ *
+ * @author Philip Levis
+ * @author Chad Metcalf
+ * @date   July 15 2007
+ */
+
+// $Id: sim_serial_packet.h,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+#ifndef SIM_SERIAL_PACKET_H_INCLUDED
+#define SIM_SERIAL_PACKET_H_INCLUDED
+
+#include "sim_tossim.h"
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+    /*
+     * sim_serial_packet_t is a weird beast. It's a dummy type that can stand
+     * in for message_t. We need to use sim_serial_packet_t because gcc can't
+     * understand message_t, due to its network types (nx). So the shim
+     * code between Python and TOSSIM can't mention message_t.  Rather
+     * than use a void*, the shim uses sim_serial_packet_t in order to provide
+     * some type checking. A sim_serial_packet_t* is essentially a Python
+     * friendly pointer to a message_t.
+     */
+    typedef struct sim_serial_packet {} sim_serial_packet_t;
+
+    void sim_serial_packet_set_destination(sim_serial_packet_t* msg, uint16_t dest);
+    uint16_t sim_serial_packet_destination(sim_serial_packet_t* msg);
+
+    void sim_serial_packet_set_source(sim_serial_packet_t* msg, uint16_t src);
+    uint16_t sim_serial_packet_source(sim_serial_packet_t* msg);
+
+    void sim_serial_packet_set_length(sim_serial_packet_t* msg, uint8_t len);
+    uint16_t sim_serial_packet_length(sim_serial_packet_t* msg);
+
+    void sim_serial_packet_set_type(sim_serial_packet_t* msg, uint8_t type);
+    uint8_t sim_serial_packet_type(sim_serial_packet_t* msg);
+
+    uint8_t* sim_serial_packet_data(sim_serial_packet_t* msg);
+
+    void sim_serial_packet_deliver(int node, sim_serial_packet_t* msg, sim_time_t t);
+    uint8_t sim_serial_packet_max_length(sim_serial_packet_t* msg);
+
+    sim_serial_packet_t* sim_serial_packet_allocate();
+    void sim_serial_packet_free(sim_serial_packet_t* m);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // SIM_SERIAL_PACKET_H_INCLUDED
diff --git a/tos/lib/tossim/sf/tossim.c b/tos/lib/tossim/sf/tossim.c
new file mode 100644
index 00000000..73db9e6d
--- /dev/null
+++ b/tos/lib/tossim/sf/tossim.c
@@ -0,0 +1,305 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of TOSSIM C++ classes. Generally just directly
+ * call their C analogues.
+ *
+ * @author Philip Levis
+ * @author Chad Metcalf
+ * @date   July 15 2007
+ */
+
+// $Id: tossim.c,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+
+#include <stdint.h>
+#include <tossim.h>
+#include <sim_tossim.h>
+#include <sim_mote.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <hashtable.h>
+
+#include <mac.c>
+#include <radio.c>
+#include <packet.c>
+#include <SerialPacket.c>
+#include <sim_noise.h>
+
+uint16_t TOS_NODE_ID = 1;
+
+Variable::Variable(char* str, char* formatStr, int array, int which) {
+  name = str;
+  format = formatStr;
+  isArray = array;
+  mote = which;
+  
+  int sLen = strlen(name);
+  realName = (char*)malloc(sLen + 1);
+  memcpy(realName, name, sLen + 1);
+  realName[sLen] = 0;
+
+  for (int i = 0; i < sLen; i++) {
+    if (realName[i] == '.') {
+      realName[i] = '$';
+    }
+  }
+
+  //  printf("Creating %s realName: %s format: %s %s\n", name, realName, formatStr, array? "[]":"");
+
+  if (sim_mote_get_variable_info(mote, realName, &ptr, &len) == 0) {
+    data = (char*)malloc(len + 1);
+    data[len] = 0;
+  }
+  else {
+    printf("Could not find variable %s\n", realName);
+    data = NULL;
+    ptr = NULL;
+  }
+  printf("Allocated variable %s\n", realName);
+}
+
+Variable::~Variable() {
+  printf("Freeing variable %s\n", realName);
+  free(data);
+  free(realName);
+}
+
+/* This is the sdbm algorithm, taken from
+   http://www.cs.yorku.ca/~oz/hash.html -pal */
+static unsigned int tossim_hash(void* key) {
+  char* str = (char*)key;
+  unsigned int hashVal = 0;
+  int c;
+  
+  while ((c = *str++))
+    hashVal = c + (hashVal << 6) + (hashVal << 16) - hashVal;
+  
+  return hashVal;
+}
+
+static int tossim_hash_eq(void* key1, void* key2) {
+  return strcmp((char*)key1, (char*)key2) == 0;
+}
+
+
+variable_string_t Variable::getData() {
+  if (data != NULL && ptr != NULL) {
+    str.ptr = data;
+    str.type = format;
+    str.len = len;
+    str.isArray = isArray;
+    //    printf("Getting %s %s %s\n", format, isArray? "[]":"", name);
+    memcpy(data, ptr, len);
+  }
+  else {
+    str.ptr = (char*)"<no such variable>";
+    str.type = (char*)"<no such variable>";
+    str.len = strlen("<no such variable>");
+    str.isArray = 0;
+  }
+  return str;
+}
+
+Mote::Mote(nesc_app_t* n) {
+  app = n;
+  varTable = create_hashtable(128, tossim_hash, tossim_hash_eq);
+}
+
+Mote::~Mote(){}
+
+unsigned long Mote::id() {
+  return nodeID;
+}
+
+long long int Mote::euid() {
+  return sim_mote_euid(nodeID);
+}
+
+void Mote::setEuid(long long int val) {
+  sim_mote_set_euid(nodeID, val);
+}
+
+long long int Mote::bootTime() {
+  return sim_mote_start_time(nodeID);
+}
+
+void Mote::bootAtTime(long long int time) {
+  sim_mote_set_start_time(nodeID, time);
+  sim_mote_enqueue_boot_event(nodeID);
+}
+
+bool Mote::isOn() {
+  return sim_mote_is_on(nodeID);
+}
+
+void Mote::turnOff() {
+  sim_mote_turn_off(nodeID);
+}
+
+void Mote::turnOn() {
+  sim_mote_turn_on(nodeID);
+}
+
+void Mote::setID(unsigned long val) {
+  nodeID = val;
+}
+
+Variable* Mote::getVariable(char* name) {
+  char* typeStr = (char*)"";
+  int isArray;
+  Variable* var;
+  
+  var = (Variable*)hashtable_search(varTable, name);
+  if (var == NULL) {
+    // Could hash this for greater efficiency,
+    // but that would either require transformation
+    // in Tossim class or a more complex typemap.
+    if (app != NULL) {
+      for (int i = 0; i < app->numVariables; i++) {
+	if(strcmp(name, app->variableNames[i]) == 0) {
+	  typeStr = app->variableTypes[i];
+	  isArray = app->variableArray[i];
+	  break;
+	}
+      }
+    }
+    //  printf("Getting variable %s of type %s %s\n", name, typeStr, isArray? "[]" : "");
+    var = new Variable(name, typeStr, isArray, nodeID);
+    hashtable_insert(varTable, name, var);
+  }
+  return var;
+}
+
+void Mote::addNoiseTraceReading(int val) {
+  sim_noise_trace_add(id(), (char)val);
+}
+
+void Mote::createNoiseModel() {
+  sim_noise_create_model(id());
+}
+
+int Mote::generateNoise(int when) {
+  return (int)sim_noise_generate(id(), when);
+}
+
+Tossim::Tossim(nesc_app_t* n) {
+  app = n;
+  init();
+}
+
+Tossim::~Tossim() {
+  sim_end();
+}
+
+void Tossim::init() {
+  sim_init();
+  motes = (Mote**)malloc(sizeof(Mote*) * (TOSSIM_MAX_NODES + 1));
+  memset(motes, 0, sizeof(Mote*) * TOSSIM_MAX_NODES);
+}
+
+long long int Tossim::time() {
+  return sim_time();
+}
+
+long long int Tossim::ticksPerSecond() {
+  return sim_ticks_per_sec();
+}
+
+char* Tossim::timeStr() {
+  sim_print_now(timeBuf, 256);
+  return timeBuf;
+}
+
+void Tossim::setTime(long long int val) {
+  sim_set_time(val);
+}
+
+Mote* Tossim::currentNode() {
+  return getNode(sim_node());
+}
+
+Mote* Tossim::getNode(unsigned long nodeID) {
+  if (nodeID > TOSSIM_MAX_NODES) {
+    nodeID = TOSSIM_MAX_NODES;
+    // log an error, asked for an invalid node
+  }
+  else {
+    if (motes[nodeID] == NULL) {
+      motes[nodeID] = new Mote(app);
+      if (nodeID == TOSSIM_MAX_NODES) {
+	motes[nodeID]->setID(0xffff);
+      }
+      else {
+	motes[nodeID]->setID(nodeID);
+      }
+    }
+    return motes[nodeID];
+  }
+}
+
+void Tossim::setCurrentNode(unsigned long nodeID) {
+  sim_set_node(nodeID);
+}
+
+void Tossim::addChannel(char* channel, FILE* file) {
+  sim_add_channel(channel, file);
+}
+
+bool Tossim::removeChannel(char* channel, FILE* file) {
+  return sim_remove_channel(channel, file);
+}
+
+void Tossim::randomSeed(int seed) {
+  return sim_random_seed(seed);
+}
+
+bool Tossim::runNextEvent() {
+  return sim_run_next_event();
+}
+
+MAC* Tossim::mac() {
+  return new MAC();
+}
+
+Radio* Tossim::radio() {
+  return new Radio();
+}
+
+Packet* Tossim::newPacket() {
+  return new Packet();
+}
+
+SerialPacket* Tossim::newSerialPacket() {
+  return new SerialPacket();
+}
diff --git a/tos/lib/tossim/sf/tossim.h b/tos/lib/tossim/sf/tossim.h
new file mode 100644
index 00000000..6462a3eb
--- /dev/null
+++ b/tos/lib/tossim/sf/tossim.h
@@ -0,0 +1,152 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Declaration of C++ objects representing TOSSIM abstractions.
+ * Used to generate Python objects.
+ *
+ * @author Philip Levis
+ * @author Chad Metcalf
+ * @date   July 15 2007
+ */
+
+// $Id: tossim.h,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+#ifndef TOSSIM_H_INCLUDED
+#define TOSSIM_H_INCLUDED
+
+//#include <stdint.h>
+#include <memory.h>
+#include <tos.h>
+#include <mac.h>
+#include <radio.h>
+#include <packet.h>
+#include <SerialPacket.h>
+#include <hashtable.h>
+
+typedef struct variable_string {
+  char* type;
+  char* ptr;
+  int len;
+  int isArray;
+} variable_string_t;
+
+typedef struct nesc_app {
+  int numVariables;
+  char** variableNames;
+  char** variableTypes;
+  int* variableArray;
+} nesc_app_t;
+
+class Variable {
+ public:
+  Variable(char* name, char* format, int array, int mote);
+  ~Variable();
+  variable_string_t getData();
+  
+ private:
+  char* name;
+  char* realName;
+  char* format;
+  int mote;
+  void* ptr;
+  char* data;
+  size_t len;
+  int isArray;
+  variable_string_t str;
+};
+
+class Mote {
+ public:
+  Mote(nesc_app_t* app);
+  ~Mote();
+
+  unsigned long id();
+  
+  long long int euid();
+  void setEuid(long long int id);
+
+  long long int bootTime();
+  void bootAtTime(long long int time);
+
+  bool isOn();
+  void turnOff();
+  void turnOn();
+  void setID(unsigned long id);  
+
+  void addNoiseTraceReading(int val);
+  void createNoiseModel();
+  int generateNoise(int when);
+  
+  Variable* getVariable(char* name);
+  
+ private:
+  unsigned long nodeID;
+  nesc_app_t* app;
+  struct hashtable* varTable;
+};
+
+class Tossim {
+ public:
+  Tossim(nesc_app_t* app);
+  ~Tossim();
+  
+  void init();
+  
+  long long int time();
+  long long int ticksPerSecond();
+  char* timeStr();
+  void setTime(long long int time);
+  
+  Mote* currentNode();
+  Mote* getNode(unsigned long nodeID);
+  void setCurrentNode(unsigned long nodeID);
+
+  void addChannel(char* channel, FILE* file);
+  bool removeChannel(char* channel, FILE* file);
+  void randomSeed(int seed);
+  
+  bool runNextEvent();
+
+  MAC* mac();
+  Radio* radio();
+  Packet* newPacket();
+  SerialPacket* newSerialPacket();
+
+ private:
+  char timeBuf[256];
+  nesc_app_t* app;
+  Mote** motes;
+};
+
+
+
+#endif // TOSSIM_H_INCLUDED
diff --git a/tos/lib/tossim/sf/tossim.i b/tos/lib/tossim/sf/tossim.i
new file mode 100644
index 00000000..7461f488
--- /dev/null
+++ b/tos/lib/tossim/sf/tossim.i
@@ -0,0 +1,400 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SWIG interface specification for TOSSIM. This file defines
+ * the top-level TOSSIM and Mote objects which are exported to
+ * Python. The typemap at the beginning allows a script to
+ * use Python files as a parameter to a function that takes a
+ * FILE* as a parameter (e.g., the logging system in sim_log.h).
+ *
+ * With updates to include SerialForwarder and Throttle
+ *
+ * @author Philip Levis
+ * @author Chad Metcalf
+ * @date   July 9, 2007
+ */
+
+%module TOSSIM
+
+%{
+#include <memory.h>
+#include <tossim.h>
+
+enum {
+  PRIMITIVE_INTEGER      = 0,
+  PRIMITIVE_FLOAT   = 1,
+  PRIMITIVE_UNKNOWN = 2
+};
+
+int lengthOfType(char* type) {
+  if (strcmp(type, "uint8_t") == 0) {
+    return sizeof(uint8_t);
+  }
+  else if (strcmp(type, "uint16_t") == 0) {
+    return sizeof(uint16_t);
+  }
+  else if (strcmp(type, "uint32_t") == 0) {
+    return sizeof(uint32_t);
+  }
+  else if (strcmp(type, "int8_t") == 0) {
+    return sizeof(int8_t);
+  }
+  else if (strcmp(type, "int16_t") == 0) {
+    return sizeof(int16_t);
+  }
+  else if (strcmp(type, "int32_t") == 0) {
+    return sizeof(int32_t);
+  }
+  else if (strcmp(type, "char") == 0) {
+    return sizeof(char);
+  }
+  else if (strcmp(type, "short") == 0) {
+    return sizeof(short);
+  }
+  else if (strcmp(type, "int") == 0) {
+    return sizeof(int);
+  }
+  else if (strcmp(type, "long") == 0) {
+    return sizeof(long);
+  }
+  else if (strcmp(type, "unsigned char") == 0) {
+    return sizeof(unsigned char);
+  }
+  else if (strcmp(type, "unsigned short") == 0) {
+    return sizeof(unsigned short);
+  }
+  else if (strcmp(type, "unsigned int") == 0) {
+    return sizeof(unsigned int);
+  }
+  else if (strcmp(type, "unsigned long") == 0) {
+    return sizeof(unsigned long);
+  }
+  else if (strcmp(type, "float") == 0) {
+    return sizeof(float);
+  }
+  else if (strcmp(type, "double") == 0) {
+    return sizeof(double);
+  }
+  else {
+    return 1;
+  }
+}
+
+int memoryToPrimitive(char* type, char* ptr, long* lval, double* dval) {
+  if (strcmp(type, "uint8_t") == 0) {
+    uint8_t val;
+    memcpy(&val, ptr, sizeof(uint8_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "uint16_t") == 0) {
+    uint16_t val;
+    memcpy(&val, ptr, sizeof(uint16_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "uint32_t") == 0) {
+    uint32_t val;
+    memcpy(&val, ptr, sizeof(uint32_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int8_t") == 0) {
+    int8_t val;
+    memcpy(&val, ptr, sizeof(int8_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int16_t") == 0) {
+    int16_t val;
+    memcpy(&val, ptr, sizeof(int16_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int32_t") == 0) {
+    int32_t val;
+    memcpy(&val, ptr, sizeof(int32_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "char") == 0) {
+    long val;
+    memcpy(&val, ptr, sizeof(char));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "short") == 0) {
+    short val;
+    memcpy(&val, ptr, sizeof(short));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int") == 0) {
+    int val;
+    memcpy(&val, ptr, sizeof(int));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "long") == 0) {
+    long val;
+    memcpy(&val, ptr, sizeof(long));
+    *lval = val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned char") == 0) {
+    unsigned char val;
+    memcpy(&val, ptr, sizeof(unsigned char));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned short") == 0) {
+    unsigned short val;
+    memcpy(&val, ptr, sizeof(unsigned short));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned int") == 0) {
+    unsigned int val;
+    memcpy(&val, ptr, sizeof(unsigned int));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned long") == 0) {
+    unsigned long val;
+    memcpy(&val, ptr, sizeof(unsigned long));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "float") == 0) {
+    float val;
+    memcpy(&val, ptr, sizeof(float));
+    *dval = (double)val;
+    return PRIMITIVE_FLOAT;
+  }
+  else if (strcmp(type, "double") == 0) {
+    double val;
+    memcpy(&val, ptr, sizeof(double));
+    *dval = val;
+    return PRIMITIVE_FLOAT;
+  }
+  else {
+    return PRIMITIVE_UNKNOWN;
+  }
+}
+
+PyObject* valueFromScalar(char* type, char* ptr, int len) {
+  long lval;
+  double dval;
+  int rval = memoryToPrimitive(type, ptr, &lval, &dval);
+  switch(rval) {
+    case PRIMITIVE_INTEGER:
+      return PyInt_FromLong(lval);
+    case PRIMITIVE_FLOAT:
+      return PyFloat_FromDouble(dval);
+    case PRIMITIVE_UNKNOWN:
+    default:
+      return PyString_FromStringAndSize(ptr, len);
+  }
+}
+
+PyObject* listFromArray(char* type, char* ptr, int len) {
+  long lval;
+  double dval;
+  int elementLen = lengthOfType(type);
+  PyObject* list = PyList_New(0);
+  //printf("Generating list of %s\n", type);
+  for (char* tmpPtr = ptr; tmpPtr < ptr + len; tmpPtr += elementLen) {
+    PyList_Append(list, valueFromScalar(type, tmpPtr, elementLen));    
+  }
+  return list;
+}
+%}
+
+%include mac.i
+%include radio.i
+%include packet.i
+%include SerialPacket.i
+%include SerialForwarder.i
+%include Throttle.i
+
+#if defined(SWIGPYTHON)
+
+%typemap(in) FILE * {
+  if (!PyFile_Check($input)) {
+    PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter.");
+    return NULL;
+  }
+  $1 = PyFile_AsFile($input);
+}
+
+%typemap(out) variable_string_t {
+  if ($1.isArray) {
+    //printf("Generating array %s\n", $1.type);
+    $result = listFromArray  ($1.type, $1.ptr, $1.len);
+  }
+  else {
+    //printf("Generating scalar %s\n", $1.type);
+    $result = valueFromScalar($1.type, $1.ptr, $1.len);
+  }
+  if ($result == NULL) {
+    PyErr_SetString(PyExc_RuntimeError, "Error generating Python type from TinyOS variable.");
+  }
+}
+
+
+%typemap(in) nesc_app_t* {
+  if (!PyList_Check($input)) {
+    PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+    return NULL;
+  }
+  else {
+    int size = PyList_Size($input);
+    int i = 0;
+    nesc_app_t* app;
+
+    if (size % 3 != 0) {
+      PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+      return NULL;
+    }
+
+    app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+
+    app->numVariables = size / 3;
+    app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+    app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+    app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+
+    memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+    memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+    memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+
+    for (i = 0; i < app->numVariables; i++) {
+      PyObject* name = PyList_GetItem($input, 3 * i);
+      PyObject* array = PyList_GetItem($input, (3 * i) + 1);
+      PyObject* format = PyList_GetItem($input, (3 * i) + 2);
+      if (PyString_Check(name) && PyString_Check(format)) {
+        app->variableNames[i] = PyString_AsString(name);
+        app->variableTypes[i] = PyString_AsString(format);
+        if (strcmp(PyString_AsString(array), "array") == 0) {
+          app->variableArray[i] = 1;
+          //printf("%s is an array\n", PyString_AsString(name));
+        }
+        else {
+          app->variableArray[i] = 0;
+          //printf("%s is a scalar\n", PyString_AsString(name));
+        }
+      }
+      else {
+        app->variableNames[i] = (char*)"<bad string>";
+        app->variableTypes[i] = (char*)"<bad string>";
+      }
+    }
+
+    $1 = app;
+  }
+}
+
+#endif
+
+typedef struct var_string {
+  char* type;
+  char* ptr;
+  int len;
+  int isArray;
+} variable_string_t;
+
+typedef struct nesc_app {
+  int numVariables;
+  char** variableNames;
+  char** variableTypes;
+  int* variableArray;
+} nesc_app_t;
+
+class Variable {
+ public:
+  Variable(char* name, char* format, int array, int mote);
+  ~Variable();
+  variable_string_t getData();  
+};
+
+class Mote {
+ public:
+  Mote(nesc_app_t* app);
+  ~Mote();
+
+  unsigned long id();
+  
+  long long int euid();
+  void setEuid(long long int id);
+
+  
+  long long int bootTime();
+  void bootAtTime(long long int time);
+
+  bool isOn();
+  void turnOff();
+  void turnOn();
+  Variable* getVariable(char* name);
+
+  void addNoiseTraceReading(int val);
+  void createNoiseModel();
+  int generateNoise(int when);
+};
+
+class Tossim {
+ public:
+  Tossim(nesc_app_t* app);
+  ~Tossim();
+  
+  void init();
+  
+  long long int time();
+  long long int ticksPerSecond(); 
+  void setTime(long long int time);
+  char* timeStr();
+
+  Mote* currentNode();
+  Mote* getNode(unsigned long nodeID);
+  void setCurrentNode(unsigned long nodeID);
+
+  void addChannel(char* channel, FILE* file);
+  bool removeChannel(char* channel, FILE* file);
+  void randomSeed(int seed);
+
+  bool runNextEvent();
+  MAC* mac();
+  Radio* radio();
+  Packet* newPacket();
+  SerialPacket* newSerialPacket();
+};
+
+
diff --git a/tos/lib/tossim/sf/tossim_wrap.cxx b/tos/lib/tossim/sf/tossim_wrap.cxx
new file mode 100644
index 00000000..9cae2933
--- /dev/null
+++ b/tos/lib/tossim/sf/tossim_wrap.cxx
@@ -0,0 +1,7855 @@
+/* ----------------------------------------------------------------------------
+ * This file was automatically generated by SWIG (http://www.swig.org).
+ * Version 1.3.31
+ * 
+ * This file is not intended to be easily readable and contains a number of 
+ * coding conventions designed to improve portability and efficiency. Do not make
+ * changes to this file unless you know what you are doing--modify the SWIG 
+ * interface file instead. 
+ * ----------------------------------------------------------------------------- */
+
+#define SWIGPYTHON
+#define SWIG_PYTHON_DIRECTOR_NO_VTABLE
+
+#ifdef __cplusplus
+template<class T> class SwigValueWrapper {
+    T *tt;
+public:
+    SwigValueWrapper() : tt(0) { }
+    SwigValueWrapper(const SwigValueWrapper<T>& rhs) : tt(new T(*rhs.tt)) { }
+    SwigValueWrapper(const T& t) : tt(new T(t)) { }
+    ~SwigValueWrapper() { delete tt; } 
+    SwigValueWrapper& operator=(const T& t) { delete tt; tt = new T(t); return *this; }
+    operator T&() const { return *tt; }
+    T *operator&() { return tt; }
+private:
+    SwigValueWrapper& operator=(const SwigValueWrapper<T>& rhs);
+};
+#endif
+
+/* -----------------------------------------------------------------------------
+ *  This section contains generic SWIG labels for method/variable
+ *  declarations/attributes, and other compiler dependent labels.
+ * ----------------------------------------------------------------------------- */
+
+/* template workaround for compilers that cannot correctly implement the C++ standard */
+#ifndef SWIGTEMPLATEDISAMBIGUATOR
+# if defined(__SUNPRO_CC)
+#   if (__SUNPRO_CC <= 0x560)
+#     define SWIGTEMPLATEDISAMBIGUATOR template
+#   else
+#     define SWIGTEMPLATEDISAMBIGUATOR 
+#   endif
+# else
+#   define SWIGTEMPLATEDISAMBIGUATOR 
+# endif
+#endif
+
+/* inline attribute */
+#ifndef SWIGINLINE
+# if defined(__cplusplus) || (defined(__GNUC__) && !defined(__STRICT_ANSI__))
+#   define SWIGINLINE inline
+# else
+#   define SWIGINLINE
+# endif
+#endif
+
+/* attribute recognised by some compilers to avoid 'unused' warnings */
+#ifndef SWIGUNUSED
+# if defined(__GNUC__)
+#   if !(defined(__cplusplus)) || (__GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4))
+#     define SWIGUNUSED __attribute__ ((__unused__)) 
+#   else
+#     define SWIGUNUSED
+#   endif
+# elif defined(__ICC)
+#   define SWIGUNUSED __attribute__ ((__unused__)) 
+# else
+#   define SWIGUNUSED 
+# endif
+#endif
+
+#ifndef SWIGUNUSEDPARM
+# ifdef __cplusplus
+#   define SWIGUNUSEDPARM(p)
+# else
+#   define SWIGUNUSEDPARM(p) p SWIGUNUSED 
+# endif
+#endif
+
+/* internal SWIG method */
+#ifndef SWIGINTERN
+# define SWIGINTERN static SWIGUNUSED
+#endif
+
+/* internal inline SWIG method */
+#ifndef SWIGINTERNINLINE
+# define SWIGINTERNINLINE SWIGINTERN SWIGINLINE
+#endif
+
+/* exporting methods */
+#if (__GNUC__ >= 4) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
+#  ifndef GCC_HASCLASSVISIBILITY
+#    define GCC_HASCLASSVISIBILITY
+#  endif
+#endif
+
+#ifndef SWIGEXPORT
+# if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__)
+#   if defined(STATIC_LINKED)
+#     define SWIGEXPORT
+#   else
+#     define SWIGEXPORT __declspec(dllexport)
+#   endif
+# else
+#   if defined(__GNUC__) && defined(GCC_HASCLASSVISIBILITY)
+#     define SWIGEXPORT __attribute__ ((visibility("default")))
+#   else
+#     define SWIGEXPORT
+#   endif
+# endif
+#endif
+
+/* calling conventions for Windows */
+#ifndef SWIGSTDCALL
+# if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__)
+#   define SWIGSTDCALL __stdcall
+# else
+#   define SWIGSTDCALL
+# endif 
+#endif
+
+/* Deal with Microsoft's attempt at deprecating C standard runtime functions */
+#if !defined(SWIG_NO_CRT_SECURE_NO_DEPRECATE) && defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE)
+# define _CRT_SECURE_NO_DEPRECATE
+#endif
+
+
+/* Python.h has to appear first */
+#include <Python.h>
+
+/* -----------------------------------------------------------------------------
+ * swigrun.swg
+ *
+ * This file contains generic CAPI SWIG runtime support for pointer
+ * type checking.
+ * ----------------------------------------------------------------------------- */
+
+/* This should only be incremented when either the layout of swig_type_info changes,
+   or for whatever reason, the runtime changes incompatibly */
+#define SWIG_RUNTIME_VERSION "3"
+
+/* define SWIG_TYPE_TABLE_NAME as "SWIG_TYPE_TABLE" */
+#ifdef SWIG_TYPE_TABLE
+# define SWIG_QUOTE_STRING(x) #x
+# define SWIG_EXPAND_AND_QUOTE_STRING(x) SWIG_QUOTE_STRING(x)
+# define SWIG_TYPE_TABLE_NAME SWIG_EXPAND_AND_QUOTE_STRING(SWIG_TYPE_TABLE)
+#else
+# define SWIG_TYPE_TABLE_NAME
+#endif
+
+/*
+  You can use the SWIGRUNTIME and SWIGRUNTIMEINLINE macros for
+  creating a static or dynamic library from the swig runtime code.
+  In 99.9% of the cases, swig just needs to declare them as 'static'.
+  
+  But only do this if is strictly necessary, ie, if you have problems
+  with your compiler or so.
+*/
+
+#ifndef SWIGRUNTIME
+# define SWIGRUNTIME SWIGINTERN
+#endif
+
+#ifndef SWIGRUNTIMEINLINE
+# define SWIGRUNTIMEINLINE SWIGRUNTIME SWIGINLINE
+#endif
+
+/*  Generic buffer size */
+#ifndef SWIG_BUFFER_SIZE
+# define SWIG_BUFFER_SIZE 1024
+#endif
+
+/* Flags for pointer conversions */
+#define SWIG_POINTER_DISOWN        0x1
+
+/* Flags for new pointer objects */
+#define SWIG_POINTER_OWN           0x1
+
+
+/* 
+   Flags/methods for returning states.
+   
+   The swig conversion methods, as ConvertPtr, return and integer 
+   that tells if the conversion was successful or not. And if not,
+   an error code can be returned (see swigerrors.swg for the codes).
+   
+   Use the following macros/flags to set or process the returning
+   states.
+   
+   In old swig versions, you usually write code as:
+
+     if (SWIG_ConvertPtr(obj,vptr,ty.flags) != -1) {
+       // success code
+     } else {
+       //fail code
+     }
+
+   Now you can be more explicit as:
+
+    int res = SWIG_ConvertPtr(obj,vptr,ty.flags);
+    if (SWIG_IsOK(res)) {
+      // success code
+    } else {
+      // fail code
+    }
+
+   that seems to be the same, but now you can also do
+
+    Type *ptr;
+    int res = SWIG_ConvertPtr(obj,(void **)(&ptr),ty.flags);
+    if (SWIG_IsOK(res)) {
+      // success code
+      if (SWIG_IsNewObj(res) {
+        ...
+	delete *ptr;
+      } else {
+        ...
+      }
+    } else {
+      // fail code
+    }
+    
+   I.e., now SWIG_ConvertPtr can return new objects and you can
+   identify the case and take care of the deallocation. Of course that
+   requires also to SWIG_ConvertPtr to return new result values, as
+
+      int SWIG_ConvertPtr(obj, ptr,...) {         
+        if (<obj is ok>) {			       
+          if (<need new object>) {		       
+            *ptr = <ptr to new allocated object>; 
+            return SWIG_NEWOBJ;		       
+          } else {				       
+            *ptr = <ptr to old object>;	       
+            return SWIG_OLDOBJ;		       
+          } 				       
+        } else {				       
+          return SWIG_BADOBJ;		       
+        }					       
+      }
+
+   Of course, returning the plain '0(success)/-1(fail)' still works, but you can be
+   more explicit by returning SWIG_BADOBJ, SWIG_ERROR or any of the
+   swig errors code.
+
+   Finally, if the SWIG_CASTRANK_MODE is enabled, the result code
+   allows to return the 'cast rank', for example, if you have this
+
+       int food(double)
+       int fooi(int);
+
+   and you call
+ 
+      food(1)   // cast rank '1'  (1 -> 1.0)
+      fooi(1)   // cast rank '0'
+
+   just use the SWIG_AddCast()/SWIG_CheckState()
+
+
+ */
+#define SWIG_OK                    (0) 
+#define SWIG_ERROR                 (-1)
+#define SWIG_IsOK(r)               (r >= 0)
+#define SWIG_ArgError(r)           ((r != SWIG_ERROR) ? r : SWIG_TypeError)  
+
+/* The CastRankLimit says how many bits are used for the cast rank */
+#define SWIG_CASTRANKLIMIT         (1 << 8)
+/* The NewMask denotes the object was created (using new/malloc) */
+#define SWIG_NEWOBJMASK            (SWIG_CASTRANKLIMIT  << 1)
+/* The TmpMask is for in/out typemaps that use temporal objects */
+#define SWIG_TMPOBJMASK            (SWIG_NEWOBJMASK << 1)
+/* Simple returning values */
+#define SWIG_BADOBJ                (SWIG_ERROR)
+#define SWIG_OLDOBJ                (SWIG_OK)
+#define SWIG_NEWOBJ                (SWIG_OK | SWIG_NEWOBJMASK)
+#define SWIG_TMPOBJ                (SWIG_OK | SWIG_TMPOBJMASK)
+/* Check, add and del mask methods */
+#define SWIG_AddNewMask(r)         (SWIG_IsOK(r) ? (r | SWIG_NEWOBJMASK) : r)
+#define SWIG_DelNewMask(r)         (SWIG_IsOK(r) ? (r & ~SWIG_NEWOBJMASK) : r)
+#define SWIG_IsNewObj(r)           (SWIG_IsOK(r) && (r & SWIG_NEWOBJMASK))
+#define SWIG_AddTmpMask(r)         (SWIG_IsOK(r) ? (r | SWIG_TMPOBJMASK) : r)
+#define SWIG_DelTmpMask(r)         (SWIG_IsOK(r) ? (r & ~SWIG_TMPOBJMASK) : r)
+#define SWIG_IsTmpObj(r)           (SWIG_IsOK(r) && (r & SWIG_TMPOBJMASK))
+
+
+/* Cast-Rank Mode */
+#if defined(SWIG_CASTRANK_MODE)
+#  ifndef SWIG_TypeRank
+#    define SWIG_TypeRank             unsigned long
+#  endif
+#  ifndef SWIG_MAXCASTRANK            /* Default cast allowed */
+#    define SWIG_MAXCASTRANK          (2)
+#  endif
+#  define SWIG_CASTRANKMASK          ((SWIG_CASTRANKLIMIT) -1)
+#  define SWIG_CastRank(r)           (r & SWIG_CASTRANKMASK)
+SWIGINTERNINLINE int SWIG_AddCast(int r) { 
+  return SWIG_IsOK(r) ? ((SWIG_CastRank(r) < SWIG_MAXCASTRANK) ? (r + 1) : SWIG_ERROR) : r;
+}
+SWIGINTERNINLINE int SWIG_CheckState(int r) { 
+  return SWIG_IsOK(r) ? SWIG_CastRank(r) + 1 : 0; 
+}
+#else /* no cast-rank mode */
+#  define SWIG_AddCast
+#  define SWIG_CheckState(r) (SWIG_IsOK(r) ? 1 : 0)
+#endif
+
+
+
+
+#include <string.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void *(*swig_converter_func)(void *);
+typedef struct swig_type_info *(*swig_dycast_func)(void **);
+
+/* Structure to store inforomation on one type */
+typedef struct swig_type_info {
+  const char             *name;			/* mangled name of this type */
+  const char             *str;			/* human readable name of this type */
+  swig_dycast_func        dcast;		/* dynamic cast function down a hierarchy */
+  struct swig_cast_info  *cast;			/* linked list of types that can cast into this type */
+  void                   *clientdata;		/* language specific type data */
+  int                    owndata;		/* flag if the structure owns the clientdata */
+} swig_type_info;
+
+/* Structure to store a type and conversion function used for casting */
+typedef struct swig_cast_info {
+  swig_type_info         *type;			/* pointer to type that is equivalent to this type */
+  swig_converter_func     converter;		/* function to cast the void pointers */
+  struct swig_cast_info  *next;			/* pointer to next cast in linked list */
+  struct swig_cast_info  *prev;			/* pointer to the previous cast */
+} swig_cast_info;
+
+/* Structure used to store module information
+ * Each module generates one structure like this, and the runtime collects
+ * all of these structures and stores them in a circularly linked list.*/
+typedef struct swig_module_info {
+  swig_type_info         **types;		/* Array of pointers to swig_type_info structures that are in this module */
+  size_t                 size;		        /* Number of types in this module */
+  struct swig_module_info *next;		/* Pointer to next element in circularly linked list */
+  swig_type_info         **type_initial;	/* Array of initially generated type structures */
+  swig_cast_info         **cast_initial;	/* Array of initially generated casting structures */
+  void                    *clientdata;		/* Language specific module data */
+} swig_module_info;
+
+/* 
+  Compare two type names skipping the space characters, therefore
+  "char*" == "char *" and "Class<int>" == "Class<int >", etc.
+
+  Return 0 when the two name types are equivalent, as in
+  strncmp, but skipping ' '.
+*/
+SWIGRUNTIME int
+SWIG_TypeNameComp(const char *f1, const char *l1,
+		  const char *f2, const char *l2) {
+  for (;(f1 != l1) && (f2 != l2); ++f1, ++f2) {
+    while ((*f1 == ' ') && (f1 != l1)) ++f1;
+    while ((*f2 == ' ') && (f2 != l2)) ++f2;
+    if (*f1 != *f2) return (*f1 > *f2) ? 1 : -1;
+  }
+  return (l1 - f1) - (l2 - f2);
+}
+
+/*
+  Check type equivalence in a name list like <name1>|<name2>|...
+  Return 0 if not equal, 1 if equal
+*/
+SWIGRUNTIME int
+SWIG_TypeEquiv(const char *nb, const char *tb) {
+  int equiv = 0;
+  const char* te = tb + strlen(tb);
+  const char* ne = nb;
+  while (!equiv && *ne) {
+    for (nb = ne; *ne; ++ne) {
+      if (*ne == '|') break;
+    }
+    equiv = (SWIG_TypeNameComp(nb, ne, tb, te) == 0) ? 1 : 0;
+    if (*ne) ++ne;
+  }
+  return equiv;
+}
+
+/*
+  Check type equivalence in a name list like <name1>|<name2>|...
+  Return 0 if equal, -1 if nb < tb, 1 if nb > tb
+*/
+SWIGRUNTIME int
+SWIG_TypeCompare(const char *nb, const char *tb) {
+  int equiv = 0;
+  const char* te = tb + strlen(tb);
+  const char* ne = nb;
+  while (!equiv && *ne) {
+    for (nb = ne; *ne; ++ne) {
+      if (*ne == '|') break;
+    }
+    equiv = (SWIG_TypeNameComp(nb, ne, tb, te) == 0) ? 1 : 0;
+    if (*ne) ++ne;
+  }
+  return equiv;
+}
+
+
+/* think of this as a c++ template<> or a scheme macro */
+#define SWIG_TypeCheck_Template(comparison, ty)         \
+  if (ty) {                                             \
+    swig_cast_info *iter = ty->cast;                    \
+    while (iter) {                                      \
+      if (comparison) {                                 \
+        if (iter == ty->cast) return iter;              \
+        /* Move iter to the top of the linked list */   \
+        iter->prev->next = iter->next;                  \
+        if (iter->next)                                 \
+          iter->next->prev = iter->prev;                \
+        iter->next = ty->cast;                          \
+        iter->prev = 0;                                 \
+        if (ty->cast) ty->cast->prev = iter;            \
+        ty->cast = iter;                                \
+        return iter;                                    \
+      }                                                 \
+      iter = iter->next;                                \
+    }                                                   \
+  }                                                     \
+  return 0
+
+/*
+  Check the typename
+*/
+SWIGRUNTIME swig_cast_info *
+SWIG_TypeCheck(const char *c, swig_type_info *ty) {
+  SWIG_TypeCheck_Template(strcmp(iter->type->name, c) == 0, ty);
+}
+
+/* Same as previous function, except strcmp is replaced with a pointer comparison */
+SWIGRUNTIME swig_cast_info *
+SWIG_TypeCheckStruct(swig_type_info *from, swig_type_info *into) {
+  SWIG_TypeCheck_Template(iter->type == from, into);
+}
+
+/*
+  Cast a pointer up an inheritance hierarchy
+*/
+SWIGRUNTIMEINLINE void *
+SWIG_TypeCast(swig_cast_info *ty, void *ptr) {
+  return ((!ty) || (!ty->converter)) ? ptr : (*ty->converter)(ptr);
+}
+
+/* 
+   Dynamic pointer casting. Down an inheritance hierarchy
+*/
+SWIGRUNTIME swig_type_info *
+SWIG_TypeDynamicCast(swig_type_info *ty, void **ptr) {
+  swig_type_info *lastty = ty;
+  if (!ty || !ty->dcast) return ty;
+  while (ty && (ty->dcast)) {
+    ty = (*ty->dcast)(ptr);
+    if (ty) lastty = ty;
+  }
+  return lastty;
+}
+
+/*
+  Return the name associated with this type
+*/
+SWIGRUNTIMEINLINE const char *
+SWIG_TypeName(const swig_type_info *ty) {
+  return ty->name;
+}
+
+/*
+  Return the pretty name associated with this type,
+  that is an unmangled type name in a form presentable to the user.
+*/
+SWIGRUNTIME const char *
+SWIG_TypePrettyName(const swig_type_info *type) {
+  /* The "str" field contains the equivalent pretty names of the
+     type, separated by vertical-bar characters.  We choose
+     to print the last name, as it is often (?) the most
+     specific. */
+  if (!type) return NULL;
+  if (type->str != NULL) {
+    const char *last_name = type->str;
+    const char *s;
+    for (s = type->str; *s; s++)
+      if (*s == '|') last_name = s+1;
+    return last_name;
+  }
+  else
+    return type->name;
+}
+
+/* 
+   Set the clientdata field for a type
+*/
+SWIGRUNTIME void
+SWIG_TypeClientData(swig_type_info *ti, void *clientdata) {
+  swig_cast_info *cast = ti->cast;
+  /* if (ti->clientdata == clientdata) return; */
+  ti->clientdata = clientdata;
+  
+  while (cast) {
+    if (!cast->converter) {
+      swig_type_info *tc = cast->type;
+      if (!tc->clientdata) {
+	SWIG_TypeClientData(tc, clientdata);
+      }
+    }    
+    cast = cast->next;
+  }
+}
+SWIGRUNTIME void
+SWIG_TypeNewClientData(swig_type_info *ti, void *clientdata) {
+  SWIG_TypeClientData(ti, clientdata);
+  ti->owndata = 1;
+}
+  
+/*
+  Search for a swig_type_info structure only by mangled name
+  Search is a O(log #types)
+  
+  We start searching at module start, and finish searching when start == end.  
+  Note: if start == end at the beginning of the function, we go all the way around
+  the circular list.
+*/
+SWIGRUNTIME swig_type_info *
+SWIG_MangledTypeQueryModule(swig_module_info *start, 
+                            swig_module_info *end, 
+		            const char *name) {
+  swig_module_info *iter = start;
+  do {
+    if (iter->size) {
+      register size_t l = 0;
+      register size_t r = iter->size - 1;
+      do {
+	/* since l+r >= 0, we can (>> 1) instead (/ 2) */
+	register size_t i = (l + r) >> 1; 
+	const char *iname = iter->types[i]->name;
+	if (iname) {
+	  register int compare = strcmp(name, iname);
+	  if (compare == 0) {	    
+	    return iter->types[i];
+	  } else if (compare < 0) {
+	    if (i) {
+	      r = i - 1;
+	    } else {
+	      break;
+	    }
+	  } else if (compare > 0) {
+	    l = i + 1;
+	  }
+	} else {
+	  break; /* should never happen */
+	}
+      } while (l <= r);
+    }
+    iter = iter->next;
+  } while (iter != end);
+  return 0;
+}
+
+/*
+  Search for a swig_type_info structure for either a mangled name or a human readable name.
+  It first searches the mangled names of the types, which is a O(log #types)
+  If a type is not found it then searches the human readable names, which is O(#types).
+  
+  We start searching at module start, and finish searching when start == end.  
+  Note: if start == end at the beginning of the function, we go all the way around
+  the circular list.
+*/
+SWIGRUNTIME swig_type_info *
+SWIG_TypeQueryModule(swig_module_info *start, 
+                     swig_module_info *end, 
+		     const char *name) {
+  /* STEP 1: Search the name field using binary search */
+  swig_type_info *ret = SWIG_MangledTypeQueryModule(start, end, name);
+  if (ret) {
+    return ret;
+  } else {
+    /* STEP 2: If the type hasn't been found, do a complete search
+       of the str field (the human readable name) */
+    swig_module_info *iter = start;
+    do {
+      register size_t i = 0;
+      for (; i < iter->size; ++i) {
+	if (iter->types[i]->str && (SWIG_TypeEquiv(iter->types[i]->str, name)))
+	  return iter->types[i];
+      }
+      iter = iter->next;
+    } while (iter != end);
+  }
+  
+  /* neither found a match */
+  return 0;
+}
+
+/* 
+   Pack binary data into a string
+*/
+SWIGRUNTIME char *
+SWIG_PackData(char *c, void *ptr, size_t sz) {
+  static const char hex[17] = "0123456789abcdef";
+  register const unsigned char *u = (unsigned char *) ptr;
+  register const unsigned char *eu =  u + sz;
+  for (; u != eu; ++u) {
+    register unsigned char uu = *u;
+    *(c++) = hex[(uu & 0xf0) >> 4];
+    *(c++) = hex[uu & 0xf];
+  }
+  return c;
+}
+
+/* 
+   Unpack binary data from a string
+*/
+SWIGRUNTIME const char *
+SWIG_UnpackData(const char *c, void *ptr, size_t sz) {
+  register unsigned char *u = (unsigned char *) ptr;
+  register const unsigned char *eu = u + sz;
+  for (; u != eu; ++u) {
+    register char d = *(c++);
+    register unsigned char uu;
+    if ((d >= '0') && (d <= '9'))
+      uu = ((d - '0') << 4);
+    else if ((d >= 'a') && (d <= 'f'))
+      uu = ((d - ('a'-10)) << 4);
+    else 
+      return (char *) 0;
+    d = *(c++);
+    if ((d >= '0') && (d <= '9'))
+      uu |= (d - '0');
+    else if ((d >= 'a') && (d <= 'f'))
+      uu |= (d - ('a'-10));
+    else 
+      return (char *) 0;
+    *u = uu;
+  }
+  return c;
+}
+
+/* 
+   Pack 'void *' into a string buffer.
+*/
+SWIGRUNTIME char *
+SWIG_PackVoidPtr(char *buff, void *ptr, const char *name, size_t bsz) {
+  char *r = buff;
+  if ((2*sizeof(void *) + 2) > bsz) return 0;
+  *(r++) = '_';
+  r = SWIG_PackData(r,&ptr,sizeof(void *));
+  if (strlen(name) + 1 > (bsz - (r - buff))) return 0;
+  strcpy(r,name);
+  return buff;
+}
+
+SWIGRUNTIME const char *
+SWIG_UnpackVoidPtr(const char *c, void **ptr, const char *name) {
+  if (*c != '_') {
+    if (strcmp(c,"NULL") == 0) {
+      *ptr = (void *) 0;
+      return name;
+    } else {
+      return 0;
+    }
+  }
+  return SWIG_UnpackData(++c,ptr,sizeof(void *));
+}
+
+SWIGRUNTIME char *
+SWIG_PackDataName(char *buff, void *ptr, size_t sz, const char *name, size_t bsz) {
+  char *r = buff;
+  size_t lname = (name ? strlen(name) : 0);
+  if ((2*sz + 2 + lname) > bsz) return 0;
+  *(r++) = '_';
+  r = SWIG_PackData(r,ptr,sz);
+  if (lname) {
+    strncpy(r,name,lname+1);
+  } else {
+    *r = 0;
+  }
+  return buff;
+}
+
+SWIGRUNTIME const char *
+SWIG_UnpackDataName(const char *c, void *ptr, size_t sz, const char *name) {
+  if (*c != '_') {
+    if (strcmp(c,"NULL") == 0) {
+      memset(ptr,0,sz);
+      return name;
+    } else {
+      return 0;
+    }
+  }
+  return SWIG_UnpackData(++c,ptr,sz);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/*  Errors in SWIG */
+#define  SWIG_UnknownError    	   -1 
+#define  SWIG_IOError        	   -2 
+#define  SWIG_RuntimeError   	   -3 
+#define  SWIG_IndexError     	   -4 
+#define  SWIG_TypeError      	   -5 
+#define  SWIG_DivisionByZero 	   -6 
+#define  SWIG_OverflowError  	   -7 
+#define  SWIG_SyntaxError    	   -8 
+#define  SWIG_ValueError     	   -9 
+#define  SWIG_SystemError    	   -10
+#define  SWIG_AttributeError 	   -11
+#define  SWIG_MemoryError    	   -12 
+#define  SWIG_NullReferenceError   -13
+
+
+
+
+/* Add PyOS_snprintf for old Pythons */
+#if PY_VERSION_HEX < 0x02020000
+# if defined(_MSC_VER) || defined(__BORLANDC__) || defined(_WATCOM)
+#  define PyOS_snprintf _snprintf
+# else
+#  define PyOS_snprintf snprintf
+# endif
+#endif
+
+/* A crude PyString_FromFormat implementation for old Pythons */
+#if PY_VERSION_HEX < 0x02020000
+
+#ifndef SWIG_PYBUFFER_SIZE
+# define SWIG_PYBUFFER_SIZE 1024
+#endif
+
+static PyObject *
+PyString_FromFormat(const char *fmt, ...) {
+  va_list ap;
+  char buf[SWIG_PYBUFFER_SIZE * 2];
+  int res;
+  va_start(ap, fmt);
+  res = vsnprintf(buf, sizeof(buf), fmt, ap);
+  va_end(ap);
+  return (res < 0 || res >= (int)sizeof(buf)) ? 0 : PyString_FromString(buf);
+}
+#endif
+
+/* Add PyObject_Del for old Pythons */
+#if PY_VERSION_HEX < 0x01060000
+# define PyObject_Del(op) PyMem_DEL((op))
+#endif
+#ifndef PyObject_DEL
+# define PyObject_DEL PyObject_Del
+#endif
+
+/* A crude PyExc_StopIteration exception for old Pythons */
+#if PY_VERSION_HEX < 0x02020000
+# ifndef PyExc_StopIteration
+#  define PyExc_StopIteration PyExc_RuntimeError
+# endif
+# ifndef PyObject_GenericGetAttr
+#  define PyObject_GenericGetAttr 0
+# endif
+#endif
+/* Py_NotImplemented is defined in 2.1 and up. */
+#if PY_VERSION_HEX < 0x02010000
+# ifndef Py_NotImplemented
+#  define Py_NotImplemented PyExc_RuntimeError
+# endif
+#endif
+
+
+/* A crude PyString_AsStringAndSize implementation for old Pythons */
+#if PY_VERSION_HEX < 0x02010000
+# ifndef PyString_AsStringAndSize
+#  define PyString_AsStringAndSize(obj, s, len) {*s = PyString_AsString(obj); *len = *s ? strlen(*s) : 0;}
+# endif
+#endif
+
+/* PySequence_Size for old Pythons */
+#if PY_VERSION_HEX < 0x02000000
+# ifndef PySequence_Size
+#  define PySequence_Size PySequence_Length
+# endif
+#endif
+
+
+/* PyBool_FromLong for old Pythons */
+#if PY_VERSION_HEX < 0x02030000
+static
+PyObject *PyBool_FromLong(long ok)
+{
+  PyObject *result = ok ? Py_True : Py_False;
+  Py_INCREF(result);
+  return result;
+}
+#endif
+
+/* Py_ssize_t for old Pythons */
+/* This code is as recommended by: */
+/* http://www.python.org/dev/peps/pep-0353/#conversion-guidelines */
+#if PY_VERSION_HEX < 0x02050000 && !defined(PY_SSIZE_T_MIN)
+typedef int Py_ssize_t;
+# define PY_SSIZE_T_MAX INT_MAX
+# define PY_SSIZE_T_MIN INT_MIN
+#endif
+
+/* -----------------------------------------------------------------------------
+ * error manipulation
+ * ----------------------------------------------------------------------------- */
+
+SWIGRUNTIME PyObject*
+SWIG_Python_ErrorType(int code) {
+  PyObject* type = 0;
+  switch(code) {
+  case SWIG_MemoryError:
+    type = PyExc_MemoryError;
+    break;
+  case SWIG_IOError:
+    type = PyExc_IOError;
+    break;
+  case SWIG_RuntimeError:
+    type = PyExc_RuntimeError;
+    break;
+  case SWIG_IndexError:
+    type = PyExc_IndexError;
+    break;
+  case SWIG_TypeError:
+    type = PyExc_TypeError;
+    break;
+  case SWIG_DivisionByZero:
+    type = PyExc_ZeroDivisionError;
+    break;
+  case SWIG_OverflowError:
+    type = PyExc_OverflowError;
+    break;
+  case SWIG_SyntaxError:
+    type = PyExc_SyntaxError;
+    break;
+  case SWIG_ValueError:
+    type = PyExc_ValueError;
+    break;
+  case SWIG_SystemError:
+    type = PyExc_SystemError;
+    break;
+  case SWIG_AttributeError:
+    type = PyExc_AttributeError;
+    break;
+  default:
+    type = PyExc_RuntimeError;
+  }
+  return type;
+}
+
+
+SWIGRUNTIME void
+SWIG_Python_AddErrorMsg(const char* mesg)
+{
+  PyObject *type = 0;
+  PyObject *value = 0;
+  PyObject *traceback = 0;
+
+  if (PyErr_Occurred()) PyErr_Fetch(&type, &value, &traceback);
+  if (value) {
+    PyObject *old_str = PyObject_Str(value);
+    PyErr_Clear();
+    Py_XINCREF(type);
+    PyErr_Format(type, "%s %s", PyString_AsString(old_str), mesg);
+    Py_DECREF(old_str);
+    Py_DECREF(value);
+  } else {
+    PyErr_Format(PyExc_RuntimeError, mesg);
+  }
+}
+
+
+
+#if defined(SWIG_PYTHON_NO_THREADS)
+#  if defined(SWIG_PYTHON_THREADS)
+#    undef SWIG_PYTHON_THREADS
+#  endif
+#endif
+#if defined(SWIG_PYTHON_THREADS) /* Threading support is enabled */
+#  if !defined(SWIG_PYTHON_USE_GIL) && !defined(SWIG_PYTHON_NO_USE_GIL)
+#    if (PY_VERSION_HEX >= 0x02030000) /* For 2.3 or later, use the PyGILState calls */
+#      define SWIG_PYTHON_USE_GIL
+#    endif
+#  endif
+#  if defined(SWIG_PYTHON_USE_GIL) /* Use PyGILState threads calls */
+#    ifndef SWIG_PYTHON_INITIALIZE_THREADS
+#     define SWIG_PYTHON_INITIALIZE_THREADS  PyEval_InitThreads() 
+#    endif
+#    ifdef __cplusplus /* C++ code */
+       class SWIG_Python_Thread_Block {
+         bool status;
+         PyGILState_STATE state;
+       public:
+         void end() { if (status) { PyGILState_Release(state); status = false;} }
+         SWIG_Python_Thread_Block() : status(true), state(PyGILState_Ensure()) {}
+         ~SWIG_Python_Thread_Block() { end(); }
+       };
+       class SWIG_Python_Thread_Allow {
+         bool status;
+         PyThreadState *save;
+       public:
+         void end() { if (status) { PyEval_RestoreThread(save); status = false; }}
+         SWIG_Python_Thread_Allow() : status(true), save(PyEval_SaveThread()) {}
+         ~SWIG_Python_Thread_Allow() { end(); }
+       };
+#      define SWIG_PYTHON_THREAD_BEGIN_BLOCK   SWIG_Python_Thread_Block _swig_thread_block
+#      define SWIG_PYTHON_THREAD_END_BLOCK     _swig_thread_block.end()
+#      define SWIG_PYTHON_THREAD_BEGIN_ALLOW   SWIG_Python_Thread_Allow _swig_thread_allow
+#      define SWIG_PYTHON_THREAD_END_ALLOW     _swig_thread_allow.end()
+#    else /* C code */
+#      define SWIG_PYTHON_THREAD_BEGIN_BLOCK   PyGILState_STATE _swig_thread_block = PyGILState_Ensure()
+#      define SWIG_PYTHON_THREAD_END_BLOCK     PyGILState_Release(_swig_thread_block)
+#      define SWIG_PYTHON_THREAD_BEGIN_ALLOW   PyThreadState *_swig_thread_allow = PyEval_SaveThread()
+#      define SWIG_PYTHON_THREAD_END_ALLOW     PyEval_RestoreThread(_swig_thread_allow)
+#    endif
+#  else /* Old thread way, not implemented, user must provide it */
+#    if !defined(SWIG_PYTHON_INITIALIZE_THREADS)
+#      define SWIG_PYTHON_INITIALIZE_THREADS
+#    endif
+#    if !defined(SWIG_PYTHON_THREAD_BEGIN_BLOCK)
+#      define SWIG_PYTHON_THREAD_BEGIN_BLOCK
+#    endif
+#    if !defined(SWIG_PYTHON_THREAD_END_BLOCK)
+#      define SWIG_PYTHON_THREAD_END_BLOCK
+#    endif
+#    if !defined(SWIG_PYTHON_THREAD_BEGIN_ALLOW)
+#      define SWIG_PYTHON_THREAD_BEGIN_ALLOW
+#    endif
+#    if !defined(SWIG_PYTHON_THREAD_END_ALLOW)
+#      define SWIG_PYTHON_THREAD_END_ALLOW
+#    endif
+#  endif
+#else /* No thread support */
+#  define SWIG_PYTHON_INITIALIZE_THREADS
+#  define SWIG_PYTHON_THREAD_BEGIN_BLOCK
+#  define SWIG_PYTHON_THREAD_END_BLOCK
+#  define SWIG_PYTHON_THREAD_BEGIN_ALLOW
+#  define SWIG_PYTHON_THREAD_END_ALLOW
+#endif
+
+/* -----------------------------------------------------------------------------
+ * Python API portion that goes into the runtime
+ * ----------------------------------------------------------------------------- */
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* cc-mode */
+#endif
+#endif
+
+/* -----------------------------------------------------------------------------
+ * Constant declarations
+ * ----------------------------------------------------------------------------- */
+
+/* Constant Types */
+#define SWIG_PY_POINTER 4
+#define SWIG_PY_BINARY  5
+
+/* Constant information structure */
+typedef struct swig_const_info {
+  int type;
+  char *name;
+  long lvalue;
+  double dvalue;
+  void   *pvalue;
+  swig_type_info **ptype;
+} swig_const_info;
+
+#ifdef __cplusplus
+#if 0
+{ /* cc-mode */
+#endif
+}
+#endif
+
+
+/* -----------------------------------------------------------------------------
+ * See the LICENSE file for information on copyright, usage and redistribution
+ * of SWIG, and the README file for authors - http://www.swig.org/release.html.
+ *
+ * pyrun.swg
+ *
+ * This file contains the runtime support for Python modules
+ * and includes code for managing global variables and pointer
+ * type checking.
+ *
+ * ----------------------------------------------------------------------------- */
+
+/* Common SWIG API */
+
+/* for raw pointers */
+#define SWIG_Python_ConvertPtr(obj, pptr, type, flags)  SWIG_Python_ConvertPtrAndOwn(obj, pptr, type, flags, 0)
+#define SWIG_ConvertPtr(obj, pptr, type, flags)         SWIG_Python_ConvertPtr(obj, pptr, type, flags)
+#define SWIG_ConvertPtrAndOwn(obj,pptr,type,flags,own)  SWIG_Python_ConvertPtrAndOwn(obj, pptr, type, flags, own)
+#define SWIG_NewPointerObj(ptr, type, flags)            SWIG_Python_NewPointerObj(ptr, type, flags)
+#define SWIG_CheckImplicit(ty)                          SWIG_Python_CheckImplicit(ty) 
+#define SWIG_AcquirePtr(ptr, src)                       SWIG_Python_AcquirePtr(ptr, src)
+#define swig_owntype                                    int
+
+/* for raw packed data */
+#define SWIG_ConvertPacked(obj, ptr, sz, ty)            SWIG_Python_ConvertPacked(obj, ptr, sz, ty)
+#define SWIG_NewPackedObj(ptr, sz, type)                SWIG_Python_NewPackedObj(ptr, sz, type)
+
+/* for class or struct pointers */
+#define SWIG_ConvertInstance(obj, pptr, type, flags)    SWIG_ConvertPtr(obj, pptr, type, flags)
+#define SWIG_NewInstanceObj(ptr, type, flags)           SWIG_NewPointerObj(ptr, type, flags)
+
+/* for C or C++ function pointers */
+#define SWIG_ConvertFunctionPtr(obj, pptr, type)        SWIG_Python_ConvertFunctionPtr(obj, pptr, type)
+#define SWIG_NewFunctionPtrObj(ptr, type)               SWIG_Python_NewPointerObj(ptr, type, 0)
+
+/* for C++ member pointers, ie, member methods */
+#define SWIG_ConvertMember(obj, ptr, sz, ty)            SWIG_Python_ConvertPacked(obj, ptr, sz, ty)
+#define SWIG_NewMemberObj(ptr, sz, type)                SWIG_Python_NewPackedObj(ptr, sz, type)
+
+
+/* Runtime API */
+
+#define SWIG_GetModule(clientdata)                      SWIG_Python_GetModule()
+#define SWIG_SetModule(clientdata, pointer)             SWIG_Python_SetModule(pointer)
+#define SWIG_NewClientData(obj)                         PySwigClientData_New(obj)
+
+#define SWIG_SetErrorObj                                SWIG_Python_SetErrorObj                            
+#define SWIG_SetErrorMsg                        	SWIG_Python_SetErrorMsg				   
+#define SWIG_ErrorType(code)                    	SWIG_Python_ErrorType(code)                        
+#define SWIG_Error(code, msg)            		SWIG_Python_SetErrorMsg(SWIG_ErrorType(code), msg) 
+#define SWIG_fail                        		goto fail					   
+
+
+/* Runtime API implementation */
+
+/* Error manipulation */
+
+SWIGINTERN void 
+SWIG_Python_SetErrorObj(PyObject *errtype, PyObject *obj) {
+  SWIG_PYTHON_THREAD_BEGIN_BLOCK; 
+  PyErr_SetObject(errtype, obj);
+  Py_DECREF(obj);
+  SWIG_PYTHON_THREAD_END_BLOCK;
+}
+
+SWIGINTERN void 
+SWIG_Python_SetErrorMsg(PyObject *errtype, const char *msg) {
+  SWIG_PYTHON_THREAD_BEGIN_BLOCK;
+  PyErr_SetString(errtype, (char *) msg);
+  SWIG_PYTHON_THREAD_END_BLOCK;
+}
+
+#define SWIG_Python_Raise(obj, type, desc)  SWIG_Python_SetErrorObj(SWIG_Python_ExceptionType(desc), obj)
+
+/* Set a constant value */
+
+SWIGINTERN void
+SWIG_Python_SetConstant(PyObject *d, const char *name, PyObject *obj) {   
+  PyDict_SetItemString(d, (char*) name, obj);
+  Py_DECREF(obj);                            
+}
+
+/* Append a value to the result obj */
+
+SWIGINTERN PyObject*
+SWIG_Python_AppendOutput(PyObject* result, PyObject* obj) {
+#if !defined(SWIG_PYTHON_OUTPUT_TUPLE)
+  if (!result) {
+    result = obj;
+  } else if (result == Py_None) {
+    Py_DECREF(result);
+    result = obj;
+  } else {
+    if (!PyList_Check(result)) {
+      PyObject *o2 = result;
+      result = PyList_New(1);
+      PyList_SetItem(result, 0, o2);
+    }
+    PyList_Append(result,obj);
+    Py_DECREF(obj);
+  }
+  return result;
+#else
+  PyObject*   o2;
+  PyObject*   o3;
+  if (!result) {
+    result = obj;
+  } else if (result == Py_None) {
+    Py_DECREF(result);
+    result = obj;
+  } else {
+    if (!PyTuple_Check(result)) {
+      o2 = result;
+      result = PyTuple_New(1);
+      PyTuple_SET_ITEM(result, 0, o2);
+    }
+    o3 = PyTuple_New(1);
+    PyTuple_SET_ITEM(o3, 0, obj);
+    o2 = result;
+    result = PySequence_Concat(o2, o3);
+    Py_DECREF(o2);
+    Py_DECREF(o3);
+  }
+  return result;
+#endif
+}
+
+/* Unpack the argument tuple */
+
+SWIGINTERN int
+SWIG_Python_UnpackTuple(PyObject *args, const char *name, int min, int max, PyObject **objs)
+{
+  if (!args) {
+    if (!min && !max) {
+      return 1;
+    } else {
+      PyErr_Format(PyExc_TypeError, "%s expected %s%d arguments, got none", 
+		   name, (min == max ? "" : "at least "), min);
+      return 0;
+    }
+  }  
+  if (!PyTuple_Check(args)) {
+    PyErr_SetString(PyExc_SystemError, "UnpackTuple() argument list is not a tuple");
+    return 0;
+  } else {
+    register int l = PyTuple_GET_SIZE(args);
+    if (l < min) {
+      PyErr_Format(PyExc_TypeError, "%s expected %s%d arguments, got %d", 
+		   name, (min == max ? "" : "at least "), min, l);
+      return 0;
+    } else if (l > max) {
+      PyErr_Format(PyExc_TypeError, "%s expected %s%d arguments, got %d", 
+		   name, (min == max ? "" : "at most "), max, l);
+      return 0;
+    } else {
+      register int i;
+      for (i = 0; i < l; ++i) {
+	objs[i] = PyTuple_GET_ITEM(args, i);
+      }
+      for (; l < max; ++l) {
+	objs[l] = 0;
+      }
+      return i + 1;
+    }    
+  }
+}
+
+/* A functor is a function object with one single object argument */
+#if PY_VERSION_HEX >= 0x02020000
+#define SWIG_Python_CallFunctor(functor, obj)	        PyObject_CallFunctionObjArgs(functor, obj, NULL);
+#else
+#define SWIG_Python_CallFunctor(functor, obj)	        PyObject_CallFunction(functor, "O", obj);
+#endif
+
+/*
+  Helper for static pointer initialization for both C and C++ code, for example
+  static PyObject *SWIG_STATIC_POINTER(MyVar) = NewSomething(...);
+*/
+#ifdef __cplusplus
+#define SWIG_STATIC_POINTER(var)  var
+#else
+#define SWIG_STATIC_POINTER(var)  var = 0; if (!var) var
+#endif
+
+/* -----------------------------------------------------------------------------
+ * Pointer declarations
+ * ----------------------------------------------------------------------------- */
+
+/* Flags for new pointer objects */
+#define SWIG_POINTER_NOSHADOW       (SWIG_POINTER_OWN      << 1)
+#define SWIG_POINTER_NEW            (SWIG_POINTER_NOSHADOW | SWIG_POINTER_OWN)
+
+#define SWIG_POINTER_IMPLICIT_CONV  (SWIG_POINTER_DISOWN   << 1)
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* cc-mode */
+#endif
+#endif
+
+/*  How to access Py_None */
+#if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__)
+#  ifndef SWIG_PYTHON_NO_BUILD_NONE
+#    ifndef SWIG_PYTHON_BUILD_NONE
+#      define SWIG_PYTHON_BUILD_NONE
+#    endif
+#  endif
+#endif
+
+#ifdef SWIG_PYTHON_BUILD_NONE
+#  ifdef Py_None
+#   undef Py_None
+#   define Py_None SWIG_Py_None()
+#  endif
+SWIGRUNTIMEINLINE PyObject * 
+_SWIG_Py_None(void)
+{
+  PyObject *none = Py_BuildValue((char*)"");
+  Py_DECREF(none);
+  return none;
+}
+SWIGRUNTIME PyObject * 
+SWIG_Py_None(void)
+{
+  static PyObject *SWIG_STATIC_POINTER(none) = _SWIG_Py_None();
+  return none;
+}
+#endif
+
+/* The python void return value */
+
+SWIGRUNTIMEINLINE PyObject * 
+SWIG_Py_Void(void)
+{
+  PyObject *none = Py_None;
+  Py_INCREF(none);
+  return none;
+}
+
+/* PySwigClientData */
+
+typedef struct {
+  PyObject *klass;
+  PyObject *newraw;
+  PyObject *newargs;
+  PyObject *destroy;
+  int delargs;
+  int implicitconv;
+} PySwigClientData;
+
+SWIGRUNTIMEINLINE int 
+SWIG_Python_CheckImplicit(swig_type_info *ty)
+{
+  PySwigClientData *data = (PySwigClientData *)ty->clientdata;
+  return data ? data->implicitconv : 0;
+}
+
+SWIGRUNTIMEINLINE PyObject *
+SWIG_Python_ExceptionType(swig_type_info *desc) {
+  PySwigClientData *data = desc ? (PySwigClientData *) desc->clientdata : 0;
+  PyObject *klass = data ? data->klass : 0;
+  return (klass ? klass : PyExc_RuntimeError);
+}
+
+
+SWIGRUNTIME PySwigClientData * 
+PySwigClientData_New(PyObject* obj)
+{
+  if (!obj) {
+    return 0;
+  } else {
+    PySwigClientData *data = (PySwigClientData *)malloc(sizeof(PySwigClientData));
+    /* the klass element */
+    data->klass = obj;
+    Py_INCREF(data->klass);
+    /* the newraw method and newargs arguments used to create a new raw instance */
+    if (PyClass_Check(obj)) {
+      data->newraw = 0;
+      data->newargs = obj;
+      Py_INCREF(obj);
+    } else {
+#if (PY_VERSION_HEX < 0x02020000)
+      data->newraw = 0;
+#else
+      data->newraw = PyObject_GetAttrString(data->klass, (char *)"__new__");
+#endif
+      if (data->newraw) {
+	Py_INCREF(data->newraw);
+	data->newargs = PyTuple_New(1);
+	PyTuple_SetItem(data->newargs, 0, obj);
+      } else {
+	data->newargs = obj;
+      }
+      Py_INCREF(data->newargs);
+    }
+    /* the destroy method, aka as the C++ delete method */
+    data->destroy = PyObject_GetAttrString(data->klass, (char *)"__swig_destroy__");
+    if (PyErr_Occurred()) {
+      PyErr_Clear();
+      data->destroy = 0;
+    }
+    if (data->destroy) {
+      int flags;
+      Py_INCREF(data->destroy);
+      flags = PyCFunction_GET_FLAGS(data->destroy);
+#ifdef METH_O
+      data->delargs = !(flags & (METH_O));
+#else
+      data->delargs = 0;
+#endif
+    } else {
+      data->delargs = 0;
+    }
+    data->implicitconv = 0;
+    return data;
+  }
+}
+
+SWIGRUNTIME void 
+PySwigClientData_Del(PySwigClientData* data)
+{
+  Py_XDECREF(data->newraw);
+  Py_XDECREF(data->newargs);
+  Py_XDECREF(data->destroy);
+}
+
+/* =============== PySwigObject =====================*/
+
+typedef struct {
+  PyObject_HEAD
+  void *ptr;
+  swig_type_info *ty;
+  int own;
+  PyObject *next;
+} PySwigObject;
+
+SWIGRUNTIME PyObject *
+PySwigObject_long(PySwigObject *v)
+{
+  return PyLong_FromVoidPtr(v->ptr);
+}
+
+SWIGRUNTIME PyObject *
+PySwigObject_format(const char* fmt, PySwigObject *v)
+{
+  PyObject *res = NULL;
+  PyObject *args = PyTuple_New(1);
+  if (args) {
+    if (PyTuple_SetItem(args, 0, PySwigObject_long(v)) == 0) {
+      PyObject *ofmt = PyString_FromString(fmt);
+      if (ofmt) {
+	res = PyString_Format(ofmt,args);
+	Py_DECREF(ofmt);
+      }
+      Py_DECREF(args);
+    }
+  }
+  return res;
+}
+
+SWIGRUNTIME PyObject *
+PySwigObject_oct(PySwigObject *v)
+{
+  return PySwigObject_format("%o",v);
+}
+
+SWIGRUNTIME PyObject *
+PySwigObject_hex(PySwigObject *v)
+{
+  return PySwigObject_format("%x",v);
+}
+
+SWIGRUNTIME PyObject *
+#ifdef METH_NOARGS
+PySwigObject_repr(PySwigObject *v)
+#else
+PySwigObject_repr(PySwigObject *v, PyObject *args)
+#endif
+{
+  const char *name = SWIG_TypePrettyName(v->ty);
+  PyObject *hex = PySwigObject_hex(v);    
+  PyObject *repr = PyString_FromFormat("<Swig Object of type '%s' at 0x%s>", name, PyString_AsString(hex));
+  Py_DECREF(hex);
+  if (v->next) {
+#ifdef METH_NOARGS
+    PyObject *nrep = PySwigObject_repr((PySwigObject *)v->next);
+#else
+    PyObject *nrep = PySwigObject_repr((PySwigObject *)v->next, args);
+#endif
+    PyString_ConcatAndDel(&repr,nrep);
+  }
+  return repr;  
+}
+
+SWIGRUNTIME int
+PySwigObject_print(PySwigObject *v, FILE *fp, int SWIGUNUSEDPARM(flags))
+{
+#ifdef METH_NOARGS
+  PyObject *repr = PySwigObject_repr(v);
+#else
+  PyObject *repr = PySwigObject_repr(v, NULL);
+#endif
+  if (repr) {
+    fputs(PyString_AsString(repr), fp);
+    Py_DECREF(repr);
+    return 0; 
+  } else {
+    return 1; 
+  }
+}
+
+SWIGRUNTIME PyObject *
+PySwigObject_str(PySwigObject *v)
+{
+  char result[SWIG_BUFFER_SIZE];
+  return SWIG_PackVoidPtr(result, v->ptr, v->ty->name, sizeof(result)) ?
+    PyString_FromString(result) : 0;
+}
+
+SWIGRUNTIME int
+PySwigObject_compare(PySwigObject *v, PySwigObject *w)
+{
+  void *i = v->ptr;
+  void *j = w->ptr;
+  return (i < j) ? -1 : ((i > j) ? 1 : 0);
+}
+
+SWIGRUNTIME PyTypeObject* _PySwigObject_type(void);
+
+SWIGRUNTIME PyTypeObject*
+PySwigObject_type(void) {
+  static PyTypeObject *SWIG_STATIC_POINTER(type) = _PySwigObject_type();
+  return type;
+}
+
+SWIGRUNTIMEINLINE int
+PySwigObject_Check(PyObject *op) {
+  return ((op)->ob_type == PySwigObject_type())
+    || (strcmp((op)->ob_type->tp_name,"PySwigObject") == 0);
+}
+
+SWIGRUNTIME PyObject *
+PySwigObject_New(void *ptr, swig_type_info *ty, int own);
+
+SWIGRUNTIME void
+PySwigObject_dealloc(PyObject *v)
+{
+  PySwigObject *sobj = (PySwigObject *) v;
+  PyObject *next = sobj->next;
+  if (sobj->own) {
+    swig_type_info *ty = sobj->ty;
+    PySwigClientData *data = ty ? (PySwigClientData *) ty->clientdata : 0;
+    PyObject *destroy = data ? data->destroy : 0;
+    if (destroy) {
+      /* destroy is always a VARARGS method */
+      PyObject *res;
+      if (data->delargs) {
+	/* we need to create a temporal object to carry the destroy operation */
+	PyObject *tmp = PySwigObject_New(sobj->ptr, ty, 0);
+	res = SWIG_Python_CallFunctor(destroy, tmp);
+	Py_DECREF(tmp);
+      } else {
+	PyCFunction meth = PyCFunction_GET_FUNCTION(destroy);
+	PyObject *mself = PyCFunction_GET_SELF(destroy);
+	res = ((*meth)(mself, v));
+      }
+      Py_XDECREF(res);
+    } else {
+      const char *name = SWIG_TypePrettyName(ty);
+#if !defined(SWIG_PYTHON_SILENT_MEMLEAK)
+      printf("swig/python detected a memory leak of type '%s', no destructor found.\n", name);
+#endif
+    }
+  } 
+  Py_XDECREF(next);
+  PyObject_DEL(v);
+}
+
+SWIGRUNTIME PyObject* 
+PySwigObject_append(PyObject* v, PyObject* next)
+{
+  PySwigObject *sobj = (PySwigObject *) v;
+#ifndef METH_O
+  PyObject *tmp = 0;
+  if (!PyArg_ParseTuple(next,(char *)"O:append", &tmp)) return NULL;
+  next = tmp;
+#endif
+  if (!PySwigObject_Check(next)) {
+    return NULL;
+  }
+  sobj->next = next;
+  Py_INCREF(next);
+  return SWIG_Py_Void();
+}
+
+SWIGRUNTIME PyObject* 
+#ifdef METH_NOARGS
+PySwigObject_next(PyObject* v)
+#else
+PySwigObject_next(PyObject* v, PyObject *SWIGUNUSEDPARM(args))
+#endif
+{
+  PySwigObject *sobj = (PySwigObject *) v;
+  if (sobj->next) {    
+    Py_INCREF(sobj->next);
+    return sobj->next;
+  } else {
+    return SWIG_Py_Void();
+  }
+}
+
+SWIGINTERN PyObject*
+#ifdef METH_NOARGS
+PySwigObject_disown(PyObject *v)
+#else
+PySwigObject_disown(PyObject* v, PyObject *SWIGUNUSEDPARM(args))
+#endif
+{
+  PySwigObject *sobj = (PySwigObject *)v;
+  sobj->own = 0;
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject*
+#ifdef METH_NOARGS
+PySwigObject_acquire(PyObject *v)
+#else
+PySwigObject_acquire(PyObject* v, PyObject *SWIGUNUSEDPARM(args))
+#endif
+{
+  PySwigObject *sobj = (PySwigObject *)v;
+  sobj->own = SWIG_POINTER_OWN;
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject*
+PySwigObject_own(PyObject *v, PyObject *args)
+{
+  PyObject *val = 0;
+#if (PY_VERSION_HEX < 0x02020000)
+  if (!PyArg_ParseTuple(args,(char *)"|O:own",&val))
+#else
+  if (!PyArg_UnpackTuple(args, (char *)"own", 0, 1, &val)) 
+#endif
+    {
+      return NULL;
+    } 
+  else
+    {
+      PySwigObject *sobj = (PySwigObject *)v;
+      PyObject *obj = PyBool_FromLong(sobj->own);
+      if (val) {
+#ifdef METH_NOARGS
+	if (PyObject_IsTrue(val)) {
+	  PySwigObject_acquire(v);
+	} else {
+	  PySwigObject_disown(v);
+	}
+#else
+	if (PyObject_IsTrue(val)) {
+	  PySwigObject_acquire(v,args);
+	} else {
+	  PySwigObject_disown(v,args);
+	}
+#endif
+      } 
+      return obj;
+    }
+}
+
+#ifdef METH_O
+static PyMethodDef
+swigobject_methods[] = {
+  {(char *)"disown",  (PyCFunction)PySwigObject_disown,  METH_NOARGS,  (char *)"releases ownership of the pointer"},
+  {(char *)"acquire", (PyCFunction)PySwigObject_acquire, METH_NOARGS,  (char *)"aquires ownership of the pointer"},
+  {(char *)"own",     (PyCFunction)PySwigObject_own,     METH_VARARGS, (char *)"returns/sets ownership of the pointer"},
+  {(char *)"append",  (PyCFunction)PySwigObject_append,  METH_O,       (char *)"appends another 'this' object"},
+  {(char *)"next",    (PyCFunction)PySwigObject_next,    METH_NOARGS,  (char *)"returns the next 'this' object"},
+  {(char *)"__repr__",(PyCFunction)PySwigObject_repr,    METH_NOARGS,  (char *)"returns object representation"},
+  {0, 0, 0, 0}  
+};
+#else
+static PyMethodDef
+swigobject_methods[] = {
+  {(char *)"disown",  (PyCFunction)PySwigObject_disown,  METH_VARARGS,  (char *)"releases ownership of the pointer"},
+  {(char *)"acquire", (PyCFunction)PySwigObject_acquire, METH_VARARGS,  (char *)"aquires ownership of the pointer"},
+  {(char *)"own",     (PyCFunction)PySwigObject_own,     METH_VARARGS,  (char *)"returns/sets ownership of the pointer"},
+  {(char *)"append",  (PyCFunction)PySwigObject_append,  METH_VARARGS,  (char *)"appends another 'this' object"},
+  {(char *)"next",    (PyCFunction)PySwigObject_next,    METH_VARARGS,  (char *)"returns the next 'this' object"},
+  {(char *)"__repr__",(PyCFunction)PySwigObject_repr,   METH_VARARGS,  (char *)"returns object representation"},
+  {0, 0, 0, 0}  
+};
+#endif
+
+#if PY_VERSION_HEX < 0x02020000
+SWIGINTERN PyObject *
+PySwigObject_getattr(PySwigObject *sobj,char *name)
+{
+  return Py_FindMethod(swigobject_methods, (PyObject *)sobj, name);
+}
+#endif
+
+SWIGRUNTIME PyTypeObject*
+_PySwigObject_type(void) {
+  static char swigobject_doc[] = "Swig object carries a C/C++ instance pointer";
+  
+  static PyNumberMethods PySwigObject_as_number = {
+    (binaryfunc)0, /*nb_add*/
+    (binaryfunc)0, /*nb_subtract*/
+    (binaryfunc)0, /*nb_multiply*/
+    (binaryfunc)0, /*nb_divide*/
+    (binaryfunc)0, /*nb_remainder*/
+    (binaryfunc)0, /*nb_divmod*/
+    (ternaryfunc)0,/*nb_power*/
+    (unaryfunc)0,  /*nb_negative*/
+    (unaryfunc)0,  /*nb_positive*/
+    (unaryfunc)0,  /*nb_absolute*/
+    (inquiry)0,    /*nb_nonzero*/
+    0,		   /*nb_invert*/
+    0,		   /*nb_lshift*/
+    0,		   /*nb_rshift*/
+    0,		   /*nb_and*/
+    0,		   /*nb_xor*/
+    0,		   /*nb_or*/
+    (coercion)0,   /*nb_coerce*/
+    (unaryfunc)PySwigObject_long, /*nb_int*/
+    (unaryfunc)PySwigObject_long, /*nb_long*/
+    (unaryfunc)0,                 /*nb_float*/
+    (unaryfunc)PySwigObject_oct,  /*nb_oct*/
+    (unaryfunc)PySwigObject_hex,  /*nb_hex*/
+#if PY_VERSION_HEX >= 0x02020000
+    0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 /* nb_inplace_add -> nb_inplace_true_divide */ 
+#elif PY_VERSION_HEX >= 0x02000000
+    0,0,0,0,0,0,0,0,0,0,0 /* nb_inplace_add -> nb_inplace_or */
+#endif
+  };
+
+  static PyTypeObject pyswigobject_type;  
+  static int type_init = 0;
+  if (!type_init) {
+    const PyTypeObject tmp
+      = {
+	PyObject_HEAD_INIT(NULL)
+	0,				    /* ob_size */
+	(char *)"PySwigObject",		    /* tp_name */
+	sizeof(PySwigObject),		    /* tp_basicsize */
+	0,			            /* tp_itemsize */
+	(destructor)PySwigObject_dealloc,   /* tp_dealloc */
+	(printfunc)PySwigObject_print,	    /* tp_print */
+#if PY_VERSION_HEX < 0x02020000
+	(getattrfunc)PySwigObject_getattr,  /* tp_getattr */ 
+#else
+	(getattrfunc)0,			    /* tp_getattr */ 
+#endif
+	(setattrfunc)0,			    /* tp_setattr */ 
+	(cmpfunc)PySwigObject_compare,	    /* tp_compare */ 
+	(reprfunc)PySwigObject_repr,	    /* tp_repr */    
+	&PySwigObject_as_number,	    /* tp_as_number */
+	0,				    /* tp_as_sequence */
+	0,				    /* tp_as_mapping */
+	(hashfunc)0,			    /* tp_hash */
+	(ternaryfunc)0,			    /* tp_call */
+	(reprfunc)PySwigObject_str,	    /* tp_str */
+	PyObject_GenericGetAttr,            /* tp_getattro */
+	0,				    /* tp_setattro */
+	0,		                    /* tp_as_buffer */
+	Py_TPFLAGS_DEFAULT,	            /* tp_flags */
+	swigobject_doc, 	            /* tp_doc */        
+	0,                                  /* tp_traverse */
+	0,                                  /* tp_clear */
+	0,                                  /* tp_richcompare */
+	0,                                  /* tp_weaklistoffset */
+#if PY_VERSION_HEX >= 0x02020000
+	0,                                  /* tp_iter */
+	0,                                  /* tp_iternext */
+	swigobject_methods,		    /* tp_methods */ 
+	0,			            /* tp_members */
+	0,				    /* tp_getset */	    	
+	0,			            /* tp_base */	        
+	0,				    /* tp_dict */	    	
+	0,				    /* tp_descr_get */  	
+	0,				    /* tp_descr_set */  	
+	0,				    /* tp_dictoffset */ 	
+	0,				    /* tp_init */	    	
+	0,				    /* tp_alloc */	    	
+	0,			            /* tp_new */	    	
+	0,	                            /* tp_free */	   
+        0,                                  /* tp_is_gc */  
+	0,				    /* tp_bases */   
+	0,				    /* tp_mro */
+	0,				    /* tp_cache */   
+ 	0,				    /* tp_subclasses */
+	0,				    /* tp_weaklist */
+#endif
+#if PY_VERSION_HEX >= 0x02030000
+	0,                                  /* tp_del */
+#endif
+#ifdef COUNT_ALLOCS
+	0,0,0,0                             /* tp_alloc -> tp_next */
+#endif
+      };
+    pyswigobject_type = tmp;
+    pyswigobject_type.ob_type = &PyType_Type;
+    type_init = 1;
+  }
+  return &pyswigobject_type;
+}
+
+SWIGRUNTIME PyObject *
+PySwigObject_New(void *ptr, swig_type_info *ty, int own)
+{
+  PySwigObject *sobj = PyObject_NEW(PySwigObject, PySwigObject_type());
+  if (sobj) {
+    sobj->ptr  = ptr;
+    sobj->ty   = ty;
+    sobj->own  = own;
+    sobj->next = 0;
+  }
+  return (PyObject *)sobj;
+}
+
+/* -----------------------------------------------------------------------------
+ * Implements a simple Swig Packed type, and use it instead of string
+ * ----------------------------------------------------------------------------- */
+
+typedef struct {
+  PyObject_HEAD
+  void *pack;
+  swig_type_info *ty;
+  size_t size;
+} PySwigPacked;
+
+SWIGRUNTIME int
+PySwigPacked_print(PySwigPacked *v, FILE *fp, int SWIGUNUSEDPARM(flags))
+{
+  char result[SWIG_BUFFER_SIZE];
+  fputs("<Swig Packed ", fp); 
+  if (SWIG_PackDataName(result, v->pack, v->size, 0, sizeof(result))) {
+    fputs("at ", fp); 
+    fputs(result, fp); 
+  }
+  fputs(v->ty->name,fp); 
+  fputs(">", fp);
+  return 0; 
+}
+  
+SWIGRUNTIME PyObject *
+PySwigPacked_repr(PySwigPacked *v)
+{
+  char result[SWIG_BUFFER_SIZE];
+  if (SWIG_PackDataName(result, v->pack, v->size, 0, sizeof(result))) {
+    return PyString_FromFormat("<Swig Packed at %s%s>", result, v->ty->name);
+  } else {
+    return PyString_FromFormat("<Swig Packed %s>", v->ty->name);
+  }  
+}
+
+SWIGRUNTIME PyObject *
+PySwigPacked_str(PySwigPacked *v)
+{
+  char result[SWIG_BUFFER_SIZE];
+  if (SWIG_PackDataName(result, v->pack, v->size, 0, sizeof(result))){
+    return PyString_FromFormat("%s%s", result, v->ty->name);
+  } else {
+    return PyString_FromString(v->ty->name);
+  }  
+}
+
+SWIGRUNTIME int
+PySwigPacked_compare(PySwigPacked *v, PySwigPacked *w)
+{
+  size_t i = v->size;
+  size_t j = w->size;
+  int s = (i < j) ? -1 : ((i > j) ? 1 : 0);
+  return s ? s : strncmp((char *)v->pack, (char *)w->pack, 2*v->size);
+}
+
+SWIGRUNTIME PyTypeObject* _PySwigPacked_type(void);
+
+SWIGRUNTIME PyTypeObject*
+PySwigPacked_type(void) {
+  static PyTypeObject *SWIG_STATIC_POINTER(type) = _PySwigPacked_type();
+  return type;
+}
+
+SWIGRUNTIMEINLINE int
+PySwigPacked_Check(PyObject *op) {
+  return ((op)->ob_type == _PySwigPacked_type()) 
+    || (strcmp((op)->ob_type->tp_name,"PySwigPacked") == 0);
+}
+
+SWIGRUNTIME void
+PySwigPacked_dealloc(PyObject *v)
+{
+  if (PySwigPacked_Check(v)) {
+    PySwigPacked *sobj = (PySwigPacked *) v;
+    free(sobj->pack);
+  }
+  PyObject_DEL(v);
+}
+
+SWIGRUNTIME PyTypeObject*
+_PySwigPacked_type(void) {
+  static char swigpacked_doc[] = "Swig object carries a C/C++ instance pointer";
+  static PyTypeObject pyswigpacked_type;
+  static int type_init = 0;  
+  if (!type_init) {
+    const PyTypeObject tmp
+      = {
+	PyObject_HEAD_INIT(NULL)
+	0,				    /* ob_size */	
+	(char *)"PySwigPacked",		    /* tp_name */	
+	sizeof(PySwigPacked),		    /* tp_basicsize */	
+	0,				    /* tp_itemsize */	
+	(destructor)PySwigPacked_dealloc,   /* tp_dealloc */	
+	(printfunc)PySwigPacked_print,	    /* tp_print */   	
+	(getattrfunc)0,			    /* tp_getattr */ 	
+	(setattrfunc)0,			    /* tp_setattr */ 	
+	(cmpfunc)PySwigPacked_compare,	    /* tp_compare */ 	
+	(reprfunc)PySwigPacked_repr,	    /* tp_repr */    	
+	0,	                            /* tp_as_number */	
+	0,				    /* tp_as_sequence */
+	0,				    /* tp_as_mapping */	
+	(hashfunc)0,			    /* tp_hash */	
+	(ternaryfunc)0,			    /* tp_call */	
+	(reprfunc)PySwigPacked_str,	    /* tp_str */	
+	PyObject_GenericGetAttr,            /* tp_getattro */
+	0,				    /* tp_setattro */
+	0,		                    /* tp_as_buffer */
+	Py_TPFLAGS_DEFAULT,	            /* tp_flags */
+	swigpacked_doc, 	            /* tp_doc */
+	0,                                  /* tp_traverse */
+	0,                                  /* tp_clear */
+	0,                                  /* tp_richcompare */
+	0,                                  /* tp_weaklistoffset */
+#if PY_VERSION_HEX >= 0x02020000
+	0,                                  /* tp_iter */
+	0,                                  /* tp_iternext */
+	0,		                    /* tp_methods */ 
+	0,			            /* tp_members */
+	0,				    /* tp_getset */	    	
+	0,			            /* tp_base */	        
+	0,				    /* tp_dict */	    	
+	0,				    /* tp_descr_get */  	
+	0,				    /* tp_descr_set */  	
+	0,				    /* tp_dictoffset */ 	
+	0,				    /* tp_init */	    	
+	0,				    /* tp_alloc */	    	
+	0,			            /* tp_new */	    	
+	0, 	                            /* tp_free */	   
+        0,                                  /* tp_is_gc */  
+	0,				    /* tp_bases */   
+	0,				    /* tp_mro */
+	0,				    /* tp_cache */   
+ 	0,				    /* tp_subclasses */
+	0,				    /* tp_weaklist */
+#endif
+#if PY_VERSION_HEX >= 0x02030000
+	0,                                  /* tp_del */
+#endif
+#ifdef COUNT_ALLOCS
+	0,0,0,0                             /* tp_alloc -> tp_next */
+#endif
+      };
+    pyswigpacked_type = tmp;
+    pyswigpacked_type.ob_type = &PyType_Type;
+    type_init = 1;
+  }
+  return &pyswigpacked_type;
+}
+
+SWIGRUNTIME PyObject *
+PySwigPacked_New(void *ptr, size_t size, swig_type_info *ty)
+{
+  PySwigPacked *sobj = PyObject_NEW(PySwigPacked, PySwigPacked_type());
+  if (sobj) {
+    void *pack = malloc(size);
+    if (pack) {
+      memcpy(pack, ptr, size);
+      sobj->pack = pack;
+      sobj->ty   = ty;
+      sobj->size = size;
+    } else {
+      PyObject_DEL((PyObject *) sobj);
+      sobj = 0;
+    }
+  }
+  return (PyObject *) sobj;
+}
+
+SWIGRUNTIME swig_type_info *
+PySwigPacked_UnpackData(PyObject *obj, void *ptr, size_t size)
+{
+  if (PySwigPacked_Check(obj)) {
+    PySwigPacked *sobj = (PySwigPacked *)obj;
+    if (sobj->size != size) return 0;
+    memcpy(ptr, sobj->pack, size);
+    return sobj->ty;
+  } else {
+    return 0;
+  }
+}
+
+/* -----------------------------------------------------------------------------
+ * pointers/data manipulation
+ * ----------------------------------------------------------------------------- */
+
+SWIGRUNTIMEINLINE PyObject *
+_SWIG_This(void)
+{
+  return PyString_FromString("this");
+}
+
+SWIGRUNTIME PyObject *
+SWIG_This(void)
+{
+  static PyObject *SWIG_STATIC_POINTER(swig_this) = _SWIG_This();
+  return swig_this;
+}
+
+/* #define SWIG_PYTHON_SLOW_GETSET_THIS */
+
+SWIGRUNTIME PySwigObject *
+SWIG_Python_GetSwigThis(PyObject *pyobj) 
+{
+  if (PySwigObject_Check(pyobj)) {
+    return (PySwigObject *) pyobj;
+  } else {
+    PyObject *obj = 0;
+#if (!defined(SWIG_PYTHON_SLOW_GETSET_THIS) && (PY_VERSION_HEX >= 0x02030000))
+    if (PyInstance_Check(pyobj)) {
+      obj = _PyInstance_Lookup(pyobj, SWIG_This());      
+    } else {
+      PyObject **dictptr = _PyObject_GetDictPtr(pyobj);
+      if (dictptr != NULL) {
+	PyObject *dict = *dictptr;
+	obj = dict ? PyDict_GetItem(dict, SWIG_This()) : 0;
+      } else {
+#ifdef PyWeakref_CheckProxy
+	if (PyWeakref_CheckProxy(pyobj)) {
+	  PyObject *wobj = PyWeakref_GET_OBJECT(pyobj);
+	  return wobj ? SWIG_Python_GetSwigThis(wobj) : 0;
+	}
+#endif
+	obj = PyObject_GetAttr(pyobj,SWIG_This());
+	if (obj) {
+	  Py_DECREF(obj);
+	} else {
+	  if (PyErr_Occurred()) PyErr_Clear();
+	  return 0;
+	}
+      }
+    }
+#else
+    obj = PyObject_GetAttr(pyobj,SWIG_This());
+    if (obj) {
+      Py_DECREF(obj);
+    } else {
+      if (PyErr_Occurred()) PyErr_Clear();
+      return 0;
+    }
+#endif
+    if (obj && !PySwigObject_Check(obj)) {
+      /* a PyObject is called 'this', try to get the 'real this'
+	 PySwigObject from it */ 
+      return SWIG_Python_GetSwigThis(obj);
+    }
+    return (PySwigObject *)obj;
+  }
+}
+
+/* Acquire a pointer value */
+
+SWIGRUNTIME int
+SWIG_Python_AcquirePtr(PyObject *obj, int own) {
+  if (own) {
+    PySwigObject *sobj = SWIG_Python_GetSwigThis(obj);
+    if (sobj) {
+      int oldown = sobj->own;
+      sobj->own = own;
+      return oldown;
+    }
+  }
+  return 0;
+}
+
+/* Convert a pointer value */
+
+SWIGRUNTIME int
+SWIG_Python_ConvertPtrAndOwn(PyObject *obj, void **ptr, swig_type_info *ty, int flags, int *own) {
+  if (!obj) return SWIG_ERROR;
+  if (obj == Py_None) {
+    if (ptr) *ptr = 0;
+    return SWIG_OK;
+  } else {
+    PySwigObject *sobj = SWIG_Python_GetSwigThis(obj);
+    while (sobj) {
+      void *vptr = sobj->ptr;
+      if (ty) {
+	swig_type_info *to = sobj->ty;
+	if (to == ty) {
+	  /* no type cast needed */
+	  if (ptr) *ptr = vptr;
+	  break;
+	} else {
+	  swig_cast_info *tc = SWIG_TypeCheck(to->name,ty);
+	  if (!tc) {
+	    sobj = (PySwigObject *)sobj->next;
+	  } else {
+	    if (ptr) *ptr = SWIG_TypeCast(tc,vptr);
+	    break;
+	  }
+	}
+      } else {
+	if (ptr) *ptr = vptr;
+	break;
+      }
+    }
+    if (sobj) {
+      if (own) *own = sobj->own;
+      if (flags & SWIG_POINTER_DISOWN) {
+	sobj->own = 0;
+      }
+      return SWIG_OK;
+    } else {
+      int res = SWIG_ERROR;
+      if (flags & SWIG_POINTER_IMPLICIT_CONV) {
+	PySwigClientData *data = ty ? (PySwigClientData *) ty->clientdata : 0;
+	if (data && !data->implicitconv) {
+	  PyObject *klass = data->klass;
+	  if (klass) {
+	    PyObject *impconv;
+	    data->implicitconv = 1; /* avoid recursion and call 'explicit' constructors*/
+	    impconv = SWIG_Python_CallFunctor(klass, obj);
+	    data->implicitconv = 0;
+	    if (PyErr_Occurred()) {
+	      PyErr_Clear();
+	      impconv = 0;
+	    }
+	    if (impconv) {
+	      PySwigObject *iobj = SWIG_Python_GetSwigThis(impconv);
+	      if (iobj) {
+		void *vptr;
+		res = SWIG_Python_ConvertPtrAndOwn((PyObject*)iobj, &vptr, ty, 0, 0);
+		if (SWIG_IsOK(res)) {
+		  if (ptr) {
+		    *ptr = vptr;
+		    /* transfer the ownership to 'ptr' */
+		    iobj->own = 0;
+		    res = SWIG_AddCast(res);
+		    res = SWIG_AddNewMask(res);
+		  } else {
+		    res = SWIG_AddCast(res);		    
+		  }
+		}
+	      }
+	      Py_DECREF(impconv);
+	    }
+	  }
+	}
+      }
+      return res;
+    }
+  }
+}
+
+/* Convert a function ptr value */
+
+SWIGRUNTIME int
+SWIG_Python_ConvertFunctionPtr(PyObject *obj, void **ptr, swig_type_info *ty) {
+  if (!PyCFunction_Check(obj)) {
+    return SWIG_ConvertPtr(obj, ptr, ty, 0);
+  } else {
+    void *vptr = 0;
+    
+    /* here we get the method pointer for callbacks */
+    const char *doc = (((PyCFunctionObject *)obj) -> m_ml -> ml_doc);
+    const char *desc = doc ? strstr(doc, "swig_ptr: ") : 0;
+    if (desc) {
+      desc = ty ? SWIG_UnpackVoidPtr(desc + 10, &vptr, ty->name) : 0;
+      if (!desc) return SWIG_ERROR;
+    }
+    if (ty) {
+      swig_cast_info *tc = SWIG_TypeCheck(desc,ty);
+      if (!tc) return SWIG_ERROR;
+      *ptr = SWIG_TypeCast(tc,vptr);
+    } else {
+      *ptr = vptr;
+    }
+    return SWIG_OK;
+  }
+}
+
+/* Convert a packed value value */
+
+SWIGRUNTIME int
+SWIG_Python_ConvertPacked(PyObject *obj, void *ptr, size_t sz, swig_type_info *ty) {
+  swig_type_info *to = PySwigPacked_UnpackData(obj, ptr, sz);
+  if (!to) return SWIG_ERROR;
+  if (ty) {
+    if (to != ty) {
+      /* check type cast? */
+      swig_cast_info *tc = SWIG_TypeCheck(to->name,ty);
+      if (!tc) return SWIG_ERROR;
+    }
+  }
+  return SWIG_OK;
+}  
+
+/* -----------------------------------------------------------------------------
+ * Create a new pointer object
+ * ----------------------------------------------------------------------------- */
+
+/*
+  Create a new instance object, whitout calling __init__, and set the
+  'this' attribute.
+*/
+
+SWIGRUNTIME PyObject* 
+SWIG_Python_NewShadowInstance(PySwigClientData *data, PyObject *swig_this)
+{
+#if (PY_VERSION_HEX >= 0x02020000)
+  PyObject *inst = 0;
+  PyObject *newraw = data->newraw;
+  if (newraw) {
+    inst = PyObject_Call(newraw, data->newargs, NULL);
+    if (inst) {
+#if !defined(SWIG_PYTHON_SLOW_GETSET_THIS)
+      PyObject **dictptr = _PyObject_GetDictPtr(inst);
+      if (dictptr != NULL) {
+	PyObject *dict = *dictptr;
+	if (dict == NULL) {
+	  dict = PyDict_New();
+	  *dictptr = dict;
+	  PyDict_SetItem(dict, SWIG_This(), swig_this);
+	}
+      }
+#else
+      PyObject *key = SWIG_This();
+      PyObject_SetAttr(inst, key, swig_this);
+#endif
+    }
+  } else {
+    PyObject *dict = PyDict_New();
+    PyDict_SetItem(dict, SWIG_This(), swig_this);
+    inst = PyInstance_NewRaw(data->newargs, dict);
+    Py_DECREF(dict);
+  }
+  return inst;
+#else
+#if (PY_VERSION_HEX >= 0x02010000)
+  PyObject *inst;
+  PyObject *dict = PyDict_New();
+  PyDict_SetItem(dict, SWIG_This(), swig_this);
+  inst = PyInstance_NewRaw(data->newargs, dict);
+  Py_DECREF(dict);
+  return (PyObject *) inst;
+#else
+  PyInstanceObject *inst = PyObject_NEW(PyInstanceObject, &PyInstance_Type);
+  if (inst == NULL) {
+    return NULL;
+  }
+  inst->in_class = (PyClassObject *)data->newargs;
+  Py_INCREF(inst->in_class);
+  inst->in_dict = PyDict_New();
+  if (inst->in_dict == NULL) {
+    Py_DECREF(inst);
+    return NULL;
+  }
+#ifdef Py_TPFLAGS_HAVE_WEAKREFS
+  inst->in_weakreflist = NULL;
+#endif
+#ifdef Py_TPFLAGS_GC
+  PyObject_GC_Init(inst);
+#endif
+  PyDict_SetItem(inst->in_dict, SWIG_This(), swig_this);
+  return (PyObject *) inst;
+#endif
+#endif
+}
+
+SWIGRUNTIME void
+SWIG_Python_SetSwigThis(PyObject *inst, PyObject *swig_this)
+{
+ PyObject *dict;
+#if (PY_VERSION_HEX >= 0x02020000) && !defined(SWIG_PYTHON_SLOW_GETSET_THIS)
+ PyObject **dictptr = _PyObject_GetDictPtr(inst);
+ if (dictptr != NULL) {
+   dict = *dictptr;
+   if (dict == NULL) {
+     dict = PyDict_New();
+     *dictptr = dict;
+   }
+   PyDict_SetItem(dict, SWIG_This(), swig_this);
+   return;
+ }
+#endif
+ dict = PyObject_GetAttrString(inst, (char*)"__dict__");
+ PyDict_SetItem(dict, SWIG_This(), swig_this);
+ Py_DECREF(dict);
+} 
+
+
+SWIGINTERN PyObject *
+SWIG_Python_InitShadowInstance(PyObject *args) {
+  PyObject *obj[2];
+  if (!SWIG_Python_UnpackTuple(args,(char*)"swiginit", 2, 2, obj)) {
+    return NULL;
+  } else {
+    PySwigObject *sthis = SWIG_Python_GetSwigThis(obj[0]);
+    if (sthis) {
+      PySwigObject_append((PyObject*) sthis, obj[1]);
+    } else {
+      SWIG_Python_SetSwigThis(obj[0], obj[1]);
+    }
+    return SWIG_Py_Void();
+  }
+}
+
+/* Create a new pointer object */
+
+SWIGRUNTIME PyObject *
+SWIG_Python_NewPointerObj(void *ptr, swig_type_info *type, int flags) {
+  if (!ptr) {
+    return SWIG_Py_Void();
+  } else {
+    int own = (flags & SWIG_POINTER_OWN) ? SWIG_POINTER_OWN : 0;
+    PyObject *robj = PySwigObject_New(ptr, type, own);
+    PySwigClientData *clientdata = type ? (PySwigClientData *)(type->clientdata) : 0;
+    if (clientdata && !(flags & SWIG_POINTER_NOSHADOW)) {
+      PyObject *inst = SWIG_Python_NewShadowInstance(clientdata, robj);
+      if (inst) {
+	Py_DECREF(robj);
+	robj = inst;
+      }
+    }
+    return robj;
+  }
+}
+
+/* Create a new packed object */
+
+SWIGRUNTIMEINLINE PyObject *
+SWIG_Python_NewPackedObj(void *ptr, size_t sz, swig_type_info *type) {
+  return ptr ? PySwigPacked_New((void *) ptr, sz, type) : SWIG_Py_Void();
+}
+
+/* -----------------------------------------------------------------------------*
+ *  Get type list 
+ * -----------------------------------------------------------------------------*/
+
+#ifdef SWIG_LINK_RUNTIME
+void *SWIG_ReturnGlobalTypeList(void *);
+#endif
+
+SWIGRUNTIME swig_module_info *
+SWIG_Python_GetModule(void) {
+  static void *type_pointer = (void *)0;
+  /* first check if module already created */
+  if (!type_pointer) {
+#ifdef SWIG_LINK_RUNTIME
+    type_pointer = SWIG_ReturnGlobalTypeList((void *)0);
+#else
+    type_pointer = PyCObject_Import((char*)"swig_runtime_data" SWIG_RUNTIME_VERSION,
+				    (char*)"type_pointer" SWIG_TYPE_TABLE_NAME);
+    if (PyErr_Occurred()) {
+      PyErr_Clear();
+      type_pointer = (void *)0;
+    }
+#endif
+  }
+  return (swig_module_info *) type_pointer;
+}
+
+#if PY_MAJOR_VERSION < 2
+/* PyModule_AddObject function was introduced in Python 2.0.  The following function
+   is copied out of Python/modsupport.c in python version 2.3.4 */
+SWIGINTERN int
+PyModule_AddObject(PyObject *m, char *name, PyObject *o)
+{
+  PyObject *dict;
+  if (!PyModule_Check(m)) {
+    PyErr_SetString(PyExc_TypeError,
+		    "PyModule_AddObject() needs module as first arg");
+    return SWIG_ERROR;
+  }
+  if (!o) {
+    PyErr_SetString(PyExc_TypeError,
+		    "PyModule_AddObject() needs non-NULL value");
+    return SWIG_ERROR;
+  }
+  
+  dict = PyModule_GetDict(m);
+  if (dict == NULL) {
+    /* Internal error -- modules must have a dict! */
+    PyErr_Format(PyExc_SystemError, "module '%s' has no __dict__",
+		 PyModule_GetName(m));
+    return SWIG_ERROR;
+  }
+  if (PyDict_SetItemString(dict, name, o))
+    return SWIG_ERROR;
+  Py_DECREF(o);
+  return SWIG_OK;
+}
+#endif
+
+SWIGRUNTIME void
+SWIG_Python_DestroyModule(void *vptr)
+{
+  swig_module_info *swig_module = (swig_module_info *) vptr;
+  swig_type_info **types = swig_module->types;
+  size_t i;
+  for (i =0; i < swig_module->size; ++i) {
+    swig_type_info *ty = types[i];
+    if (ty->owndata) {
+      PySwigClientData *data = (PySwigClientData *) ty->clientdata;
+      if (data) PySwigClientData_Del(data);
+    }
+  }
+  Py_DECREF(SWIG_This());
+}
+
+SWIGRUNTIME void
+SWIG_Python_SetModule(swig_module_info *swig_module) {
+  static PyMethodDef swig_empty_runtime_method_table[] = { {NULL, NULL, 0, NULL} };/* Sentinel */
+
+  PyObject *module = Py_InitModule((char*)"swig_runtime_data" SWIG_RUNTIME_VERSION,
+				   swig_empty_runtime_method_table);
+  PyObject *pointer = PyCObject_FromVoidPtr((void *) swig_module, SWIG_Python_DestroyModule);
+  if (pointer && module) {
+    PyModule_AddObject(module, (char*)"type_pointer" SWIG_TYPE_TABLE_NAME, pointer);
+  } else {
+    Py_XDECREF(pointer);
+  }
+}
+
+/* The python cached type query */
+SWIGRUNTIME PyObject *
+SWIG_Python_TypeCache(void) {
+  static PyObject *SWIG_STATIC_POINTER(cache) = PyDict_New();
+  return cache;
+}
+
+SWIGRUNTIME swig_type_info *
+SWIG_Python_TypeQuery(const char *type)
+{
+  PyObject *cache = SWIG_Python_TypeCache();
+  PyObject *key = PyString_FromString(type); 
+  PyObject *obj = PyDict_GetItem(cache, key);
+  swig_type_info *descriptor;
+  if (obj) {
+    descriptor = (swig_type_info *) PyCObject_AsVoidPtr(obj);
+  } else {
+    swig_module_info *swig_module = SWIG_Python_GetModule();
+    descriptor = SWIG_TypeQueryModule(swig_module, swig_module, type);
+    if (descriptor) {
+      obj = PyCObject_FromVoidPtr(descriptor, NULL);
+      PyDict_SetItem(cache, key, obj);
+      Py_DECREF(obj);
+    }
+  }
+  Py_DECREF(key);
+  return descriptor;
+}
+
+/* 
+   For backward compatibility only
+*/
+#define SWIG_POINTER_EXCEPTION  0
+#define SWIG_arg_fail(arg)      SWIG_Python_ArgFail(arg)
+#define SWIG_MustGetPtr(p, type, argnum, flags)  SWIG_Python_MustGetPtr(p, type, argnum, flags)
+
+SWIGRUNTIME int
+SWIG_Python_AddErrMesg(const char* mesg, int infront)
+{
+  if (PyErr_Occurred()) {
+    PyObject *type = 0;
+    PyObject *value = 0;
+    PyObject *traceback = 0;
+    PyErr_Fetch(&type, &value, &traceback);
+    if (value) {
+      PyObject *old_str = PyObject_Str(value);
+      Py_XINCREF(type);
+      PyErr_Clear();
+      if (infront) {
+	PyErr_Format(type, "%s %s", mesg, PyString_AsString(old_str));
+      } else {
+	PyErr_Format(type, "%s %s", PyString_AsString(old_str), mesg);
+      }
+      Py_DECREF(old_str);
+    }
+    return 1;
+  } else {
+    return 0;
+  }
+}
+  
+SWIGRUNTIME int
+SWIG_Python_ArgFail(int argnum)
+{
+  if (PyErr_Occurred()) {
+    /* add information about failing argument */
+    char mesg[256];
+    PyOS_snprintf(mesg, sizeof(mesg), "argument number %d:", argnum);
+    return SWIG_Python_AddErrMesg(mesg, 1);
+  } else {
+    return 0;
+  }
+}
+
+SWIGRUNTIMEINLINE const char *
+PySwigObject_GetDesc(PyObject *self)
+{
+  PySwigObject *v = (PySwigObject *)self;
+  swig_type_info *ty = v ? v->ty : 0;
+  return ty ? ty->str : (char*)"";
+}
+
+SWIGRUNTIME void
+SWIG_Python_TypeError(const char *type, PyObject *obj)
+{
+  if (type) {
+#if defined(SWIG_COBJECT_TYPES)
+    if (obj && PySwigObject_Check(obj)) {
+      const char *otype = (const char *) PySwigObject_GetDesc(obj);
+      if (otype) {
+	PyErr_Format(PyExc_TypeError, "a '%s' is expected, 'PySwigObject(%s)' is received",
+		     type, otype);
+	return;
+      }
+    } else 
+#endif      
+    {
+      const char *otype = (obj ? obj->ob_type->tp_name : 0); 
+      if (otype) {
+	PyObject *str = PyObject_Str(obj);
+	const char *cstr = str ? PyString_AsString(str) : 0;
+	if (cstr) {
+	  PyErr_Format(PyExc_TypeError, "a '%s' is expected, '%s(%s)' is received",
+		       type, otype, cstr);
+	} else {
+	  PyErr_Format(PyExc_TypeError, "a '%s' is expected, '%s' is received",
+		       type, otype);
+	}
+	Py_XDECREF(str);
+	return;
+      }
+    }   
+    PyErr_Format(PyExc_TypeError, "a '%s' is expected", type);
+  } else {
+    PyErr_Format(PyExc_TypeError, "unexpected type is received");
+  }
+}
+
+
+/* Convert a pointer value, signal an exception on a type mismatch */
+SWIGRUNTIME void *
+SWIG_Python_MustGetPtr(PyObject *obj, swig_type_info *ty, int argnum, int flags) {
+  void *result;
+  if (SWIG_Python_ConvertPtr(obj, &result, ty, flags) == -1) {
+    PyErr_Clear();
+    if (flags & SWIG_POINTER_EXCEPTION) {
+      SWIG_Python_TypeError(SWIG_TypePrettyName(ty), obj);
+      SWIG_Python_ArgFail(argnum);
+    }
+  }
+  return result;
+}
+
+
+#ifdef __cplusplus
+#if 0
+{ /* cc-mode */
+#endif
+}
+#endif
+
+
+
+#define SWIG_exception_fail(code, msg) do { SWIG_Error(code, msg); SWIG_fail; } while(0) 
+
+#define SWIG_contract_assert(expr, msg) if (!(expr)) { SWIG_Error(SWIG_RuntimeError, msg); SWIG_fail; } else 
+
+
+
+/* -------- TYPES TABLE (BEGIN) -------- */
+
+#define SWIGTYPE_p_FILE swig_types[0]
+#define SWIGTYPE_p_MAC swig_types[1]
+#define SWIGTYPE_p_Mote swig_types[2]
+#define SWIGTYPE_p_Packet swig_types[3]
+#define SWIGTYPE_p_Radio swig_types[4]
+#define SWIGTYPE_p_SerialForwarder swig_types[5]
+#define SWIGTYPE_p_SerialPacket swig_types[6]
+#define SWIGTYPE_p_Throttle swig_types[7]
+#define SWIGTYPE_p_Tossim swig_types[8]
+#define SWIGTYPE_p_Variable swig_types[9]
+#define SWIGTYPE_p_char swig_types[10]
+#define SWIGTYPE_p_int swig_types[11]
+#define SWIGTYPE_p_nesc_app swig_types[12]
+#define SWIGTYPE_p_p_char swig_types[13]
+#define SWIGTYPE_p_var_string swig_types[14]
+static swig_type_info *swig_types[16];
+static swig_module_info swig_module = {swig_types, 15, 0, 0, 0, 0};
+#define SWIG_TypeQuery(name) SWIG_TypeQueryModule(&swig_module, &swig_module, name)
+#define SWIG_MangledTypeQuery(name) SWIG_MangledTypeQueryModule(&swig_module, &swig_module, name)
+
+/* -------- TYPES TABLE (END) -------- */
+
+#if (PY_VERSION_HEX <= 0x02000000)
+# if !defined(SWIG_PYTHON_CLASSIC)
+#  error "This python version requires swig to be run with the '-classic' option"
+# endif
+#endif
+
+/*-----------------------------------------------
+              @(target):= _TOSSIM.so
+  ------------------------------------------------*/
+#define SWIG_init    init_TOSSIM
+
+#define SWIG_name    "_TOSSIM"
+
+#define SWIGVERSION 0x010331 
+#define SWIG_VERSION SWIGVERSION
+
+
+#define SWIG_as_voidptr(a) const_cast< void * >(static_cast< const void * >(a)) 
+#define SWIG_as_voidptrptr(a) ((void)SWIG_as_voidptr(*a),reinterpret_cast< void** >(a)) 
+
+
+#include <stdexcept>
+
+
+namespace swig {
+  class PyObject_ptr {
+  protected:
+    PyObject *_obj;
+
+  public:
+    PyObject_ptr() :_obj(0)
+    {
+    }
+
+    PyObject_ptr(const PyObject_ptr& item) : _obj(item._obj)
+    {
+      Py_XINCREF(_obj);      
+    }
+    
+    PyObject_ptr(PyObject *obj, bool initial_ref = true) :_obj(obj)
+    {
+      if (initial_ref) Py_XINCREF(_obj);
+    }
+    
+    PyObject_ptr & operator=(const PyObject_ptr& item) 
+    {
+      Py_XINCREF(item._obj);
+      Py_XDECREF(_obj);
+      _obj = item._obj;
+      return *this;      
+    }
+    
+    ~PyObject_ptr() 
+    {
+      Py_XDECREF(_obj);
+    }
+    
+    operator PyObject *() const
+    {
+      return _obj;
+    }
+
+    PyObject *operator->() const
+    {
+      return _obj;
+    }
+  };
+}
+
+
+namespace swig {
+  struct PyObject_var : PyObject_ptr {
+    PyObject_var(PyObject* obj = 0) : PyObject_ptr(obj, false) { }
+    
+    PyObject_var & operator = (PyObject* obj)
+    {
+      Py_XDECREF(_obj);
+      _obj = obj;
+      return *this;      
+    }
+  };
+}
+
+
+#include <memory.h>
+#include <tossim.h>
+
+enum {
+  PRIMITIVE_INTEGER      = 0,
+  PRIMITIVE_FLOAT   = 1,
+  PRIMITIVE_UNKNOWN = 2
+};
+
+int lengthOfType(char* type) {
+  if (strcmp(type, "uint8_t") == 0) {
+    return sizeof(uint8_t);
+  }
+  else if (strcmp(type, "uint16_t") == 0) {
+    return sizeof(uint16_t);
+  }
+  else if (strcmp(type, "uint32_t") == 0) {
+    return sizeof(uint32_t);
+  }
+  else if (strcmp(type, "int8_t") == 0) {
+    return sizeof(int8_t);
+  }
+  else if (strcmp(type, "int16_t") == 0) {
+    return sizeof(int16_t);
+  }
+  else if (strcmp(type, "int32_t") == 0) {
+    return sizeof(int32_t);
+  }
+  else if (strcmp(type, "char") == 0) {
+    return sizeof(char);
+  }
+  else if (strcmp(type, "short") == 0) {
+    return sizeof(short);
+  }
+  else if (strcmp(type, "int") == 0) {
+    return sizeof(int);
+  }
+  else if (strcmp(type, "long") == 0) {
+    return sizeof(long);
+  }
+  else if (strcmp(type, "unsigned char") == 0) {
+    return sizeof(unsigned char);
+  }
+  else if (strcmp(type, "unsigned short") == 0) {
+    return sizeof(unsigned short);
+  }
+  else if (strcmp(type, "unsigned int") == 0) {
+    return sizeof(unsigned int);
+  }
+  else if (strcmp(type, "unsigned long") == 0) {
+    return sizeof(unsigned long);
+  }
+  else if (strcmp(type, "float") == 0) {
+    return sizeof(float);
+  }
+  else if (strcmp(type, "double") == 0) {
+    return sizeof(double);
+  }
+  else {
+    return 1;
+  }
+}
+
+int memoryToPrimitive(char* type, char* ptr, long* lval, double* dval) {
+  if (strcmp(type, "uint8_t") == 0) {
+    uint8_t val;
+    memcpy(&val, ptr, sizeof(uint8_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "uint16_t") == 0) {
+    uint16_t val;
+    memcpy(&val, ptr, sizeof(uint16_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "uint32_t") == 0) {
+    uint32_t val;
+    memcpy(&val, ptr, sizeof(uint32_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int8_t") == 0) {
+    int8_t val;
+    memcpy(&val, ptr, sizeof(int8_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int16_t") == 0) {
+    int16_t val;
+    memcpy(&val, ptr, sizeof(int16_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int32_t") == 0) {
+    int32_t val;
+    memcpy(&val, ptr, sizeof(int32_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "char") == 0) {
+    long val;
+    memcpy(&val, ptr, sizeof(char));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "short") == 0) {
+    short val;
+    memcpy(&val, ptr, sizeof(short));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int") == 0) {
+    int val;
+    memcpy(&val, ptr, sizeof(int));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "long") == 0) {
+    long val;
+    memcpy(&val, ptr, sizeof(long));
+    *lval = val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned char") == 0) {
+    unsigned char val;
+    memcpy(&val, ptr, sizeof(unsigned char));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned short") == 0) {
+    unsigned short val;
+    memcpy(&val, ptr, sizeof(unsigned short));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned int") == 0) {
+    unsigned int val;
+    memcpy(&val, ptr, sizeof(unsigned int));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned long") == 0) {
+    unsigned long val;
+    memcpy(&val, ptr, sizeof(unsigned long));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "float") == 0) {
+    float val;
+    memcpy(&val, ptr, sizeof(float));
+    *dval = (double)val;
+    return PRIMITIVE_FLOAT;
+  }
+  else if (strcmp(type, "double") == 0) {
+    double val;
+    memcpy(&val, ptr, sizeof(double));
+    *dval = val;
+    return PRIMITIVE_FLOAT;
+  }
+  else {
+    return PRIMITIVE_UNKNOWN;
+  }
+}
+
+PyObject* valueFromScalar(char* type, char* ptr, int len) {
+  long lval;
+  double dval;
+  int rval = memoryToPrimitive(type, ptr, &lval, &dval);
+  switch(rval) {
+    case PRIMITIVE_INTEGER:
+      return PyInt_FromLong(lval);
+    case PRIMITIVE_FLOAT:
+      return PyFloat_FromDouble(dval);
+    case PRIMITIVE_UNKNOWN:
+    default:
+      return PyString_FromStringAndSize(ptr, len);
+  }
+}
+
+PyObject* listFromArray(char* type, char* ptr, int len) {
+  long lval;
+  double dval;
+  int elementLen = lengthOfType(type);
+  PyObject* list = PyList_New(0);
+  //printf("Generating list of %s\n", type);
+  for (char* tmpPtr = ptr; tmpPtr < ptr + len; tmpPtr += elementLen) {
+    PyList_Append(list, valueFromScalar(type, tmpPtr, elementLen));    
+  }
+  return list;
+}
+
+
+#include <mac.h>
+
+
+  #define SWIG_From_long   PyInt_FromLong 
+
+
+SWIGINTERNINLINE PyObject *
+SWIG_From_int  (int value)
+{    
+  return SWIG_From_long  (value);
+}
+
+
+#include <limits.h>
+#ifndef LLONG_MIN
+# define LLONG_MIN	LONG_LONG_MIN
+#endif
+#ifndef LLONG_MAX
+# define LLONG_MAX	LONG_LONG_MAX
+#endif
+#ifndef ULLONG_MAX
+# define ULLONG_MAX	ULONG_LONG_MAX
+#endif
+
+
+SWIGINTERN int
+SWIG_AsVal_double (PyObject *obj, double *val)
+{
+  int res = SWIG_TypeError;
+  if (PyFloat_Check(obj)) {
+    if (val) *val = PyFloat_AsDouble(obj);
+    return SWIG_OK;
+  } else if (PyInt_Check(obj)) {
+    if (val) *val = PyInt_AsLong(obj);
+    return SWIG_OK;
+  } else if (PyLong_Check(obj)) {
+    double v = PyLong_AsDouble(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = v;
+      return SWIG_OK;
+    } else {
+      PyErr_Clear();
+    }
+  }
+#ifdef SWIG_PYTHON_CAST_MODE
+  {
+    int dispatch = 0;
+    double d = PyFloat_AsDouble(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = d;
+      return SWIG_AddCast(SWIG_OK);
+    } else {
+      PyErr_Clear();
+    }
+    if (!dispatch) {
+      long v = PyLong_AsLong(obj);
+      if (!PyErr_Occurred()) {
+	if (val) *val = v;
+	return SWIG_AddCast(SWIG_AddCast(SWIG_OK));
+      } else {
+	PyErr_Clear();
+      }
+    }
+  }
+#endif
+  return res;
+}
+
+
+#include <float.h>
+
+
+#include <math.h>
+
+
+SWIGINTERNINLINE int
+SWIG_CanCastAsInteger(double *d, double min, double max) {
+  double x = *d;
+  if ((min <= x && x <= max)) {
+   double fx = floor(x);
+   double cx = ceil(x);
+   double rd =  ((x - fx) < 0.5) ? fx : cx; /* simple rint */
+   if ((errno == EDOM) || (errno == ERANGE)) {
+     errno = 0;
+   } else {
+     double summ, reps, diff;
+     if (rd < x) {
+       diff = x - rd;
+     } else if (rd > x) {
+       diff = rd - x;
+     } else {
+       return 1;
+     }
+     summ = rd + x;
+     reps = diff/summ;
+     if (reps < 8*DBL_EPSILON) {
+       *d = rd;
+       return 1;
+     }
+   }
+  }
+  return 0;
+}
+
+
+SWIGINTERN int
+SWIG_AsVal_long (PyObject *obj, long* val)
+{
+  if (PyInt_Check(obj)) {
+    if (val) *val = PyInt_AsLong(obj);
+    return SWIG_OK;
+  } else if (PyLong_Check(obj)) {
+    long v = PyLong_AsLong(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = v;
+      return SWIG_OK;
+    } else {
+      PyErr_Clear();
+    }
+  }
+#ifdef SWIG_PYTHON_CAST_MODE
+  {
+    int dispatch = 0;
+    long v = PyInt_AsLong(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = v;
+      return SWIG_AddCast(SWIG_OK);
+    } else {
+      PyErr_Clear();
+    }
+    if (!dispatch) {
+      double d;
+      int res = SWIG_AddCast(SWIG_AsVal_double (obj,&d));
+      if (SWIG_IsOK(res) && SWIG_CanCastAsInteger(&d, LONG_MIN, LONG_MAX)) {
+	if (val) *val = (long)(d);
+	return res;
+      }
+    }
+  }
+#endif
+  return SWIG_TypeError;
+}
+
+
+SWIGINTERN int
+SWIG_AsVal_int (PyObject * obj, int *val)
+{
+  long v;
+  int res = SWIG_AsVal_long (obj, &v);
+  if (SWIG_IsOK(res)) {
+    if ((v < INT_MIN || v > INT_MAX)) {
+      return SWIG_OverflowError;
+    } else {
+      if (val) *val = static_cast< int >(v);
+    }
+  }  
+  return res;
+}
+
+
+#include <radio.h>
+
+
+  #define SWIG_From_double   PyFloat_FromDouble 
+
+
+SWIGINTERNINLINE PyObject*
+  SWIG_From_bool  (bool value)
+{
+  return PyBool_FromLong(value ? 1 : 0);
+}
+
+
+#include <packet.h>
+
+
+SWIGINTERN swig_type_info*
+SWIG_pchar_descriptor(void)
+{
+  static int init = 0;
+  static swig_type_info* info = 0;
+  if (!init) {
+    info = SWIG_TypeQuery("_p_char");
+    init = 1;
+  }
+  return info;
+}
+
+
+SWIGINTERNINLINE PyObject *
+SWIG_FromCharPtrAndSize(const char* carray, size_t size)
+{
+  if (carray) {
+    if (size > INT_MAX) {
+      swig_type_info* pchar_descriptor = SWIG_pchar_descriptor();
+      return pchar_descriptor ? 
+	SWIG_NewPointerObj(const_cast< char * >(carray), pchar_descriptor, 0) : SWIG_Py_Void();
+    } else {
+      return PyString_FromStringAndSize(carray, static_cast< int >(size));
+    }
+  } else {
+    return SWIG_Py_Void();
+  }
+}
+
+
+SWIGINTERNINLINE PyObject * 
+SWIG_FromCharPtr(const char *cptr)
+{ 
+  return SWIG_FromCharPtrAndSize(cptr, (cptr ? strlen(cptr) : 0));
+}
+
+
+SWIGINTERN int
+SWIG_AsCharPtrAndSize(PyObject *obj, char** cptr, size_t* psize, int *alloc)
+{
+  if (PyString_Check(obj)) {
+    char *cstr; Py_ssize_t len;
+    PyString_AsStringAndSize(obj, &cstr, &len);
+    if (cptr)  {
+      if (alloc) {
+	/* 
+	   In python the user should not be able to modify the inner
+	   string representation. To warranty that, if you define
+	   SWIG_PYTHON_SAFE_CSTRINGS, a new/copy of the python string
+	   buffer is always returned.
+
+	   The default behavior is just to return the pointer value,
+	   so, be careful.
+	*/ 
+#if defined(SWIG_PYTHON_SAFE_CSTRINGS)
+	if (*alloc != SWIG_OLDOBJ) 
+#else
+	if (*alloc == SWIG_NEWOBJ) 
+#endif
+	  {
+	    *cptr = reinterpret_cast< char* >(memcpy((new char[len + 1]), cstr, sizeof(char)*(len + 1)));
+	    *alloc = SWIG_NEWOBJ;
+	  }
+	else {
+	  *cptr = cstr;
+	  *alloc = SWIG_OLDOBJ;
+	}
+      } else {
+	*cptr = PyString_AsString(obj);
+      }
+    }
+    if (psize) *psize = len + 1;
+    return SWIG_OK;
+  } else {
+    swig_type_info* pchar_descriptor = SWIG_pchar_descriptor();
+    if (pchar_descriptor) {
+      void* vptr = 0;
+      if (SWIG_ConvertPtr(obj, &vptr, pchar_descriptor, 0) == SWIG_OK) {
+	if (cptr) *cptr = (char *) vptr;
+	if (psize) *psize = vptr ? (strlen((char *)vptr) + 1) : 0;
+	if (alloc) *alloc = SWIG_OLDOBJ;
+	return SWIG_OK;
+      }
+    }
+  }
+  return SWIG_TypeError;
+}
+
+
+
+
+
+SWIGINTERN int
+SWIG_AsVal_long_SS_long (PyObject *obj, long long *val)
+{
+  int res = SWIG_TypeError;
+  if (PyLong_Check(obj)) {
+    long long v = PyLong_AsLongLong(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = v;
+      return SWIG_OK;
+    } else {
+      PyErr_Clear();
+    }
+  } else {
+    long v;
+    res = SWIG_AsVal_long (obj,&v);
+    if (SWIG_IsOK(res)) {
+      if (val) *val = v;
+      return res;
+    }
+  }
+#ifdef SWIG_PYTHON_CAST_MODE
+  {
+    const double mant_max = 1LL << DBL_MANT_DIG;
+    const double mant_min = -mant_max;
+    double d;
+    res = SWIG_AsVal_double (obj,&d);
+    if (SWIG_IsOK(res) && SWIG_CanCastAsInteger(&d, mant_min, mant_max)) {
+      if (val) *val = (long long)(d);
+      return SWIG_AddCast(res);
+    }
+    res = SWIG_TypeError;
+  }
+#endif
+  return res;
+}
+
+
+#include <SerialPacket.h>
+
+
+#include <SerialForwarder.h>
+
+
+#include <Throttle.h>
+
+
+SWIGINTERNINLINE PyObject* 
+SWIG_From_unsigned_SS_long  (unsigned long value)
+{
+  return (value > LONG_MAX) ?
+    PyLong_FromUnsignedLong(value) : PyInt_FromLong(static_cast< long >(value)); 
+}
+
+
+SWIGINTERNINLINE PyObject* 
+SWIG_From_long_SS_long  (long long value)
+{
+  return ((value < LONG_MIN) || (value > LONG_MAX)) ?
+    PyLong_FromLongLong(value) : PyInt_FromLong(static_cast< long >(value)); 
+}
+
+
+SWIGINTERN int
+SWIG_AsVal_unsigned_SS_long (PyObject *obj, unsigned long *val) 
+{
+  if (PyInt_Check(obj)) {
+    long v = PyInt_AsLong(obj);
+    if (v >= 0) {
+      if (val) *val = v;
+      return SWIG_OK;
+    } else {
+      return SWIG_OverflowError;
+    }
+  } else if (PyLong_Check(obj)) {
+    unsigned long v = PyLong_AsUnsignedLong(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = v;
+      return SWIG_OK;
+    } else {
+      PyErr_Clear();
+    }
+  }
+#ifdef SWIG_PYTHON_CAST_MODE
+  {
+    int dispatch = 0;
+    unsigned long v = PyLong_AsUnsignedLong(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = v;
+      return SWIG_AddCast(SWIG_OK);
+    } else {
+      PyErr_Clear();
+    }
+    if (!dispatch) {
+      double d;
+      int res = SWIG_AddCast(SWIG_AsVal_double (obj,&d));
+      if (SWIG_IsOK(res) && SWIG_CanCastAsInteger(&d, 0, ULONG_MAX)) {
+	if (val) *val = (unsigned long)(d);
+	return res;
+      }
+    }
+  }
+#endif
+  return SWIG_TypeError;
+}
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+SWIGINTERN PyObject *_wrap_new_MAC(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *result = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)":new_MAC")) SWIG_fail;
+  result = (MAC *)new MAC();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_MAC, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_MAC(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_MAC",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_MAC" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_initHigh(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_initHigh",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_initHigh" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->initHigh();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_initLow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_initLow",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_initLow" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->initLow();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_high(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_high",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_high" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->high();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_low(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_low",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_low" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->low();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_symbolsPerSec(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_symbolsPerSec",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_symbolsPerSec" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->symbolsPerSec();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_bitsPerSymbol(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_bitsPerSymbol",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_bitsPerSymbol" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->bitsPerSymbol();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_preambleLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_preambleLength",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_preambleLength" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->preambleLength();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_exponentBase(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_exponentBase",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_exponentBase" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->exponentBase();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_maxIterations(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_maxIterations",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_maxIterations" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->maxIterations();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_minFreeSamples(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_minFreeSamples",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_minFreeSamples" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->minFreeSamples();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_rxtxDelay(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_rxtxDelay",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_rxtxDelay" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->rxtxDelay();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_ackTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_ackTime",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_ackTime" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->ackTime();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setInitHigh(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setInitHigh",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setInitHigh" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setInitHigh" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setInitHigh(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setInitLow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setInitLow",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setInitLow" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setInitLow" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setInitLow(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setHigh(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setHigh",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setHigh" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setHigh" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setHigh(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setLow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setLow",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setLow" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setLow" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setLow(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setSymbolsPerSec(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setSymbolsPerSec",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setSymbolsPerSec" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setSymbolsPerSec" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setSymbolsPerSec(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setBitsBerSymbol(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setBitsBerSymbol",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setBitsBerSymbol" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setBitsBerSymbol" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setBitsBerSymbol(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setPreambleLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setPreambleLength",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setPreambleLength" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setPreambleLength" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setPreambleLength(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setExponentBase(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setExponentBase",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setExponentBase" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setExponentBase" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setExponentBase(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setMaxIterations(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setMaxIterations",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setMaxIterations" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setMaxIterations" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setMaxIterations(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setMinFreeSamples(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setMinFreeSamples",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setMinFreeSamples" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setMinFreeSamples" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setMinFreeSamples(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setRxtxDelay(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setRxtxDelay",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setRxtxDelay" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setRxtxDelay" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setRxtxDelay(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setAckTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setAckTime",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setAckTime" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setAckTime" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setAckTime(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *MAC_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_MAC, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_Radio(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *result = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)":new_Radio")) SWIG_fail;
+  result = (Radio *)new Radio();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Radio, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_Radio(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_Radio",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Radio" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Radio_add(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  int arg2 ;
+  int arg3 ;
+  double arg4 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  int val3 ;
+  int ecode3 = 0 ;
+  double val4 ;
+  int ecode4 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  PyObject * obj3 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOOO:Radio_add",&obj0,&obj1,&obj2,&obj3)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_add" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_add" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_int(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_add" "', argument " "3"" of type '" "int""'");
+  } 
+  arg3 = static_cast< int >(val3);
+  ecode4 = SWIG_AsVal_double(obj3, &val4);
+  if (!SWIG_IsOK(ecode4)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode4), "in method '" "Radio_add" "', argument " "4"" of type '" "double""'");
+  } 
+  arg4 = static_cast< double >(val4);
+  (arg1)->add(arg2,arg3,arg4);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Radio_gain(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  int arg2 ;
+  int arg3 ;
+  double result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  int val3 ;
+  int ecode3 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:Radio_gain",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_gain" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_gain" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_int(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_gain" "', argument " "3"" of type '" "int""'");
+  } 
+  arg3 = static_cast< int >(val3);
+  result = (double)(arg1)->gain(arg2,arg3);
+  resultobj = SWIG_From_double(static_cast< double >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Radio_connected(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  int arg2 ;
+  int arg3 ;
+  bool result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  int val3 ;
+  int ecode3 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:Radio_connected",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_connected" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_connected" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_int(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_connected" "', argument " "3"" of type '" "int""'");
+  } 
+  arg3 = static_cast< int >(val3);
+  result = (bool)(arg1)->connected(arg2,arg3);
+  resultobj = SWIG_From_bool(static_cast< bool >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Radio_remove(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  int arg2 ;
+  int arg3 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  int val3 ;
+  int ecode3 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:Radio_remove",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_remove" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_remove" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_int(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_remove" "', argument " "3"" of type '" "int""'");
+  } 
+  arg3 = static_cast< int >(val3);
+  (arg1)->remove(arg2,arg3);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Radio_setNoise(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  int arg2 ;
+  double arg3 ;
+  double arg4 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  double val3 ;
+  int ecode3 = 0 ;
+  double val4 ;
+  int ecode4 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  PyObject * obj3 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOOO:Radio_setNoise",&obj0,&obj1,&obj2,&obj3)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_setNoise" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_setNoise" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_double(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_setNoise" "', argument " "3"" of type '" "double""'");
+  } 
+  arg3 = static_cast< double >(val3);
+  ecode4 = SWIG_AsVal_double(obj3, &val4);
+  if (!SWIG_IsOK(ecode4)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode4), "in method '" "Radio_setNoise" "', argument " "4"" of type '" "double""'");
+  } 
+  arg4 = static_cast< double >(val4);
+  (arg1)->setNoise(arg2,arg3,arg4);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Radio_setSensitivity(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  double arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  double val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Radio_setSensitivity",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_setSensitivity" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  ecode2 = SWIG_AsVal_double(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_setSensitivity" "', argument " "2"" of type '" "double""'");
+  } 
+  arg2 = static_cast< double >(val2);
+  (arg1)->setSensitivity(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *Radio_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_Radio, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_Packet(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *result = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)":new_Packet")) SWIG_fail;
+  result = (Packet *)new Packet();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Packet, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_Packet(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_Packet",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Packet" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_setSource(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setSource",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setSource" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setSource" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setSource(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_source(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Packet_source",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_source" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  result = (int)(arg1)->source();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_setDestination(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setDestination",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setDestination" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setDestination" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setDestination(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_destination(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Packet_destination",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_destination" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  result = (int)(arg1)->destination();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_setLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setLength",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setLength" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setLength" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setLength(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_length(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Packet_length",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_length" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  result = (int)(arg1)->length();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_setType(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setType",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setType" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setType" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setType(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_type(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Packet_type",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_type" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  result = (int)(arg1)->type();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_data(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  char *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Packet_data",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_data" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  result = (char *)(arg1)->data();
+  resultobj = SWIG_FromCharPtr((const char *)result);
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_setData(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  char *arg2 = (char *) 0 ;
+  int arg3 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  size_t size2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setData",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setData" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, &size2, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Packet_setData" "', argument " "2"" of type '" "char *""'");
+  }  
+  arg2 = reinterpret_cast< char * >(buf2);
+  arg3 = static_cast< int >(size2 - 1);
+  (arg1)->setData(arg2,arg3);
+  resultobj = SWIG_Py_Void();
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_maxLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Packet_maxLength",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_maxLength" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  result = (int)(arg1)->maxLength();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_setStrength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setStrength",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setStrength" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setStrength" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setStrength(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_deliver(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  long long arg3 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  long long val3 ;
+  int ecode3 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:Packet_deliver",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_deliver" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_deliver" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_long_SS_long(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Packet_deliver" "', argument " "3"" of type '" "long long""'");
+  } 
+  arg3 = static_cast< long long >(val3);
+  (arg1)->deliver(arg2,arg3);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_deliverNow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_deliverNow",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_deliverNow" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_deliverNow" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->deliverNow(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *Packet_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_Packet, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_SerialPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *result = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)":new_SerialPacket")) SWIG_fail;
+  result = (SerialPacket *)new SerialPacket();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_SerialPacket, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_SerialPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *arg1 = (SerialPacket *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_SerialPacket",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_SerialPacket" "', argument " "1"" of type '" "SerialPacket *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialPacket * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialPacket_setDestination(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *arg1 = (SerialPacket *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:SerialPacket_setDestination",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_setDestination" "', argument " "1"" of type '" "SerialPacket *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialPacket * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "SerialPacket_setDestination" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setDestination(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialPacket_destination(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *arg1 = (SerialPacket *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:SerialPacket_destination",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_destination" "', argument " "1"" of type '" "SerialPacket *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialPacket * >(argp1);
+  result = (int)(arg1)->destination();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialPacket_setLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *arg1 = (SerialPacket *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:SerialPacket_setLength",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_setLength" "', argument " "1"" of type '" "SerialPacket *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialPacket * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "SerialPacket_setLength" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setLength(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialPacket_length(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *arg1 = (SerialPacket *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:SerialPacket_length",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_length" "', argument " "1"" of type '" "SerialPacket *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialPacket * >(argp1);
+  result = (int)(arg1)->length();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialPacket_setType(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *arg1 = (SerialPacket *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:SerialPacket_setType",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_setType" "', argument " "1"" of type '" "SerialPacket *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialPacket * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "SerialPacket_setType" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setType(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialPacket_type(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *arg1 = (SerialPacket *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:SerialPacket_type",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_type" "', argument " "1"" of type '" "SerialPacket *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialPacket * >(argp1);
+  result = (int)(arg1)->type();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialPacket_data(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *arg1 = (SerialPacket *) 0 ;
+  char *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:SerialPacket_data",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_data" "', argument " "1"" of type '" "SerialPacket *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialPacket * >(argp1);
+  result = (char *)(arg1)->data();
+  resultobj = SWIG_FromCharPtr((const char *)result);
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialPacket_setData(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *arg1 = (SerialPacket *) 0 ;
+  char *arg2 = (char *) 0 ;
+  int arg3 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  size_t size2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:SerialPacket_setData",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_setData" "', argument " "1"" of type '" "SerialPacket *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialPacket * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, &size2, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "SerialPacket_setData" "', argument " "2"" of type '" "char *""'");
+  }  
+  arg2 = reinterpret_cast< char * >(buf2);
+  arg3 = static_cast< int >(size2 - 1);
+  (arg1)->setData(arg2,arg3);
+  resultobj = SWIG_Py_Void();
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialPacket_maxLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *arg1 = (SerialPacket *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:SerialPacket_maxLength",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_maxLength" "', argument " "1"" of type '" "SerialPacket *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialPacket * >(argp1);
+  result = (int)(arg1)->maxLength();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialPacket_deliver(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *arg1 = (SerialPacket *) 0 ;
+  int arg2 ;
+  long long arg3 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  long long val3 ;
+  int ecode3 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:SerialPacket_deliver",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_deliver" "', argument " "1"" of type '" "SerialPacket *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialPacket * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "SerialPacket_deliver" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_long_SS_long(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "SerialPacket_deliver" "', argument " "3"" of type '" "long long""'");
+  } 
+  arg3 = static_cast< long long >(val3);
+  (arg1)->deliver(arg2,arg3);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialPacket_deliverNow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialPacket *arg1 = (SerialPacket *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:SerialPacket_deliverNow",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialPacket, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialPacket_deliverNow" "', argument " "1"" of type '" "SerialPacket *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialPacket * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "SerialPacket_deliverNow" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->deliverNow(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *SerialPacket_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_SerialPacket, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_SerialForwarder(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  int arg1 ;
+  SerialForwarder *result = 0 ;
+  int val1 ;
+  int ecode1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:new_SerialForwarder",&obj0)) SWIG_fail;
+  ecode1 = SWIG_AsVal_int(obj0, &val1);
+  if (!SWIG_IsOK(ecode1)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode1), "in method '" "new_SerialForwarder" "', argument " "1"" of type '" "int""'");
+  } 
+  arg1 = static_cast< int >(val1);
+  result = (SerialForwarder *)new SerialForwarder(arg1);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_SerialForwarder, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_SerialForwarder(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialForwarder *arg1 = (SerialForwarder *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_SerialForwarder",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialForwarder, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_SerialForwarder" "', argument " "1"" of type '" "SerialForwarder *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialForwarder * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialForwarder_process(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialForwarder *arg1 = (SerialForwarder *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:SerialForwarder_process",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialForwarder, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialForwarder_process" "', argument " "1"" of type '" "SerialForwarder *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialForwarder * >(argp1);
+  (arg1)->process();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialForwarder_dispatchPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialForwarder *arg1 = (SerialForwarder *) 0 ;
+  void *arg2 = (void *) 0 ;
+  int arg3 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  int val3 ;
+  int ecode3 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:SerialForwarder_dispatchPacket",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialForwarder, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialForwarder_dispatchPacket" "', argument " "1"" of type '" "SerialForwarder *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialForwarder * >(argp1);
+  res2 = SWIG_ConvertPtr(obj1,SWIG_as_voidptrptr(&arg2), 0, 0);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "SerialForwarder_dispatchPacket" "', argument " "2"" of type '" "void const *""'"); 
+  }
+  ecode3 = SWIG_AsVal_int(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "SerialForwarder_dispatchPacket" "', argument " "3"" of type '" "int""'");
+  } 
+  arg3 = static_cast< int >(val3);
+  (arg1)->dispatchPacket((void const *)arg2,arg3);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_SerialForwarder_forwardPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  SerialForwarder *arg1 = (SerialForwarder *) 0 ;
+  void *arg2 = (void *) 0 ;
+  int arg3 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  int val3 ;
+  int ecode3 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:SerialForwarder_forwardPacket",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_SerialForwarder, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "SerialForwarder_forwardPacket" "', argument " "1"" of type '" "SerialForwarder *""'"); 
+  }
+  arg1 = reinterpret_cast< SerialForwarder * >(argp1);
+  res2 = SWIG_ConvertPtr(obj1,SWIG_as_voidptrptr(&arg2), 0, 0);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "SerialForwarder_forwardPacket" "', argument " "2"" of type '" "void const *""'"); 
+  }
+  ecode3 = SWIG_AsVal_int(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "SerialForwarder_forwardPacket" "', argument " "3"" of type '" "int""'");
+  } 
+  arg3 = static_cast< int >(val3);
+  (arg1)->forwardPacket((void const *)arg2,arg3);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *SerialForwarder_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_SerialForwarder, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_Throttle(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  int arg2 ;
+  Throttle *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:new_Throttle",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "new_Throttle" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "new_Throttle" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  result = (Throttle *)new Throttle(arg1,arg2);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Throttle, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_Throttle(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Throttle *arg1 = (Throttle *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_Throttle",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Throttle, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Throttle" "', argument " "1"" of type '" "Throttle *""'"); 
+  }
+  arg1 = reinterpret_cast< Throttle * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Throttle_initialize(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Throttle *arg1 = (Throttle *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Throttle_initialize",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Throttle, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Throttle_initialize" "', argument " "1"" of type '" "Throttle *""'"); 
+  }
+  arg1 = reinterpret_cast< Throttle * >(argp1);
+  (arg1)->initialize();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Throttle_finalize(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Throttle *arg1 = (Throttle *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Throttle_finalize",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Throttle, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Throttle_finalize" "', argument " "1"" of type '" "Throttle *""'"); 
+  }
+  arg1 = reinterpret_cast< Throttle * >(argp1);
+  (arg1)->finalize();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Throttle_checkThrottle(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Throttle *arg1 = (Throttle *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Throttle_checkThrottle",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Throttle, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Throttle_checkThrottle" "', argument " "1"" of type '" "Throttle *""'"); 
+  }
+  arg1 = reinterpret_cast< Throttle * >(argp1);
+  (arg1)->checkThrottle();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Throttle_printStatistics(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Throttle *arg1 = (Throttle *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Throttle_printStatistics",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Throttle, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Throttle_printStatistics" "', argument " "1"" of type '" "Throttle *""'"); 
+  }
+  arg1 = reinterpret_cast< Throttle * >(argp1);
+  (arg1)->printStatistics();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *Throttle_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_Throttle, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_variable_string_t_type_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  char *arg2 = (char *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_type_set",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_type_set" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "variable_string_t_type_set" "', argument " "2"" of type '" "char *""'");
+  }
+  arg2 = reinterpret_cast< char * >(buf2);
+  if (arg1->type) delete[] arg1->type;
+  if (arg2) {
+    size_t size = strlen(reinterpret_cast< const char * >(arg2)) + 1;
+    arg1->type = (char *)reinterpret_cast< char* >(memcpy((new char[size]), reinterpret_cast< const char * >(arg2), sizeof(char)*(size)));
+  } else {
+    arg1->type = 0;
+  }
+  resultobj = SWIG_Py_Void();
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_type_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  char *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_type_get",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_type_get" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  result = (char *) ((arg1)->type);
+  resultobj = SWIG_FromCharPtr((const char *)result);
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_ptr_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  char *arg2 = (char *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_ptr_set",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_ptr_set" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "variable_string_t_ptr_set" "', argument " "2"" of type '" "char *""'");
+  }
+  arg2 = reinterpret_cast< char * >(buf2);
+  if (arg1->ptr) delete[] arg1->ptr;
+  if (arg2) {
+    size_t size = strlen(reinterpret_cast< const char * >(arg2)) + 1;
+    arg1->ptr = (char *)reinterpret_cast< char* >(memcpy((new char[size]), reinterpret_cast< const char * >(arg2), sizeof(char)*(size)));
+  } else {
+    arg1->ptr = 0;
+  }
+  resultobj = SWIG_Py_Void();
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_ptr_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  char *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_ptr_get",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_ptr_get" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  result = (char *) ((arg1)->ptr);
+  resultobj = SWIG_FromCharPtr((const char *)result);
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_len_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_len_set",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_len_set" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "variable_string_t_len_set" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  if (arg1) (arg1)->len = arg2;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_len_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_len_get",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_len_get" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  result = (int) ((arg1)->len);
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_isArray_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_isArray_set",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_isArray_set" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "variable_string_t_isArray_set" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  if (arg1) (arg1)->isArray = arg2;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_isArray_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_isArray_get",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_isArray_get" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  result = (int) ((arg1)->isArray);
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_new_variable_string_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *result = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)":new_variable_string_t")) SWIG_fail;
+  result = (variable_string_t *)new variable_string_t();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_var_string, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_variable_string_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_variable_string_t",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_variable_string_t" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *variable_string_t_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_var_string, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_numVariables_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  int arg2 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_numVariables_set",&obj0,&obj1)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = "<bad string>";
+          app->variableTypes[i] = "<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "nesc_app_t_numVariables_set" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  if (arg1) (arg1)->numVariables = arg2;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_numVariables_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  int result;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_numVariables_get",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = "<bad string>";
+          app->variableTypes[i] = "<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  result = (int) ((arg1)->numVariables);
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_variableNames_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  char **arg2 = (char **) 0 ;
+  void *argp2 = 0 ;
+  int res2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableNames_set",&obj0,&obj1)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = "<bad string>";
+          app->variableTypes[i] = "<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  res2 = SWIG_ConvertPtr(obj1, &argp2,SWIGTYPE_p_p_char, 0 |  0 );
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "nesc_app_t_variableNames_set" "', argument " "2"" of type '" "char **""'"); 
+  }
+  arg2 = reinterpret_cast< char ** >(argp2);
+  if (arg1) (arg1)->variableNames = arg2;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_variableNames_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  char **result = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableNames_get",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = "<bad string>";
+          app->variableTypes[i] = "<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  result = (char **) ((arg1)->variableNames);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_p_char, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_variableTypes_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  char **arg2 = (char **) 0 ;
+  void *argp2 = 0 ;
+  int res2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableTypes_set",&obj0,&obj1)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = "<bad string>";
+          app->variableTypes[i] = "<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  res2 = SWIG_ConvertPtr(obj1, &argp2,SWIGTYPE_p_p_char, 0 |  0 );
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "nesc_app_t_variableTypes_set" "', argument " "2"" of type '" "char **""'"); 
+  }
+  arg2 = reinterpret_cast< char ** >(argp2);
+  if (arg1) (arg1)->variableTypes = arg2;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_variableTypes_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  char **result = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableTypes_get",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = "<bad string>";
+          app->variableTypes[i] = "<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  result = (char **) ((arg1)->variableTypes);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_p_char, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_variableArray_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  int *arg2 = (int *) 0 ;
+  void *argp2 = 0 ;
+  int res2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableArray_set",&obj0,&obj1)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = "<bad string>";
+          app->variableTypes[i] = "<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  res2 = SWIG_ConvertPtr(obj1, &argp2,SWIGTYPE_p_int, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "nesc_app_t_variableArray_set" "', argument " "2"" of type '" "int *""'"); 
+  }
+  arg2 = reinterpret_cast< int * >(argp2);
+  if (arg1) (arg1)->variableArray = arg2;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_variableArray_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  int *result = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableArray_get",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = "<bad string>";
+          app->variableTypes[i] = "<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  result = (int *) ((arg1)->variableArray);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_int, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_new_nesc_app_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *result = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)":new_nesc_app_t")) SWIG_fail;
+  result = (nesc_app_t *)new nesc_app_t();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_nesc_app, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_nesc_app_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_nesc_app_t",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = "<bad string>";
+          app->variableTypes[i] = "<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *nesc_app_t_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_nesc_app, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_Variable(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  char *arg1 = (char *) 0 ;
+  char *arg2 = (char *) 0 ;
+  int arg3 ;
+  int arg4 ;
+  Variable *result = 0 ;
+  int res1 ;
+  char *buf1 = 0 ;
+  int alloc1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  int alloc2 = 0 ;
+  int val3 ;
+  int ecode3 = 0 ;
+  int val4 ;
+  int ecode4 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  PyObject * obj3 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOOO:new_Variable",&obj0,&obj1,&obj2,&obj3)) SWIG_fail;
+  res1 = SWIG_AsCharPtrAndSize(obj0, &buf1, NULL, &alloc1);
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "new_Variable" "', argument " "1"" of type '" "char *""'");
+  }
+  arg1 = reinterpret_cast< char * >(buf1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "new_Variable" "', argument " "2"" of type '" "char *""'");
+  }
+  arg2 = reinterpret_cast< char * >(buf2);
+  ecode3 = SWIG_AsVal_int(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "new_Variable" "', argument " "3"" of type '" "int""'");
+  } 
+  arg3 = static_cast< int >(val3);
+  ecode4 = SWIG_AsVal_int(obj3, &val4);
+  if (!SWIG_IsOK(ecode4)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode4), "in method '" "new_Variable" "', argument " "4"" of type '" "int""'");
+  } 
+  arg4 = static_cast< int >(val4);
+  result = (Variable *)new Variable(arg1,arg2,arg3,arg4);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Variable, SWIG_POINTER_NEW |  0 );
+  if (alloc1 == SWIG_NEWOBJ) delete[] buf1;
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc1 == SWIG_NEWOBJ) delete[] buf1;
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_Variable(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Variable *arg1 = (Variable *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_Variable",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Variable, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Variable" "', argument " "1"" of type '" "Variable *""'"); 
+  }
+  arg1 = reinterpret_cast< Variable * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Variable_getData(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Variable *arg1 = (Variable *) 0 ;
+  variable_string_t result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Variable_getData",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Variable, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Variable_getData" "', argument " "1"" of type '" "Variable *""'"); 
+  }
+  arg1 = reinterpret_cast< Variable * >(argp1);
+  result = (arg1)->getData();
+  {
+    if ((&result)->isArray) {
+      //printf("Generating array %s\n", (&result)->type);
+      resultobj = listFromArray  ((&result)->type, (&result)->ptr, (&result)->len);
+    }
+    else {
+      //printf("Generating scalar %s\n", (&result)->type);
+      resultobj = valueFromScalar((&result)->type, (&result)->ptr, (&result)->len);
+    }
+    if (resultobj == NULL) {
+      PyErr_SetString(PyExc_RuntimeError, "Error generating Python type from TinyOS variable.");
+    }
+  }
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *Variable_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_Variable, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_Mote(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  Mote *result = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:new_Mote",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = "<bad string>";
+          app->variableTypes[i] = "<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  result = (Mote *)new Mote(arg1);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Mote, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_Mote(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_Mote",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Mote" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_id(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  unsigned long result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_id",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_id" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  result = (unsigned long)(arg1)->id();
+  resultobj = SWIG_From_unsigned_SS_long(static_cast< unsigned long >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_euid(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  long long result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_euid",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_euid" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  result = (long long)(arg1)->euid();
+  resultobj = SWIG_From_long_SS_long(static_cast< long long >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_setEuid(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  long long arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  long long val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Mote_setEuid",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_setEuid" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  ecode2 = SWIG_AsVal_long_SS_long(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_setEuid" "', argument " "2"" of type '" "long long""'");
+  } 
+  arg2 = static_cast< long long >(val2);
+  (arg1)->setEuid(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_bootTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  long long result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_bootTime",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_bootTime" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  result = (long long)(arg1)->bootTime();
+  resultobj = SWIG_From_long_SS_long(static_cast< long long >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_bootAtTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  long long arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  long long val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Mote_bootAtTime",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_bootAtTime" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  ecode2 = SWIG_AsVal_long_SS_long(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_bootAtTime" "', argument " "2"" of type '" "long long""'");
+  } 
+  arg2 = static_cast< long long >(val2);
+  (arg1)->bootAtTime(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_isOn(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  bool result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_isOn",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_isOn" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  result = (bool)(arg1)->isOn();
+  resultobj = SWIG_From_bool(static_cast< bool >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_turnOff(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_turnOff",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_turnOff" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  (arg1)->turnOff();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_turnOn(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_turnOn",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_turnOn" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  (arg1)->turnOn();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_getVariable(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  char *arg2 = (char *) 0 ;
+  Variable *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Mote_getVariable",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_getVariable" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Mote_getVariable" "', argument " "2"" of type '" "char *""'");
+  }
+  arg2 = reinterpret_cast< char * >(buf2);
+  result = (Variable *)(arg1)->getVariable(arg2);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Variable, 0 |  0 );
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_addNoiseTraceReading(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Mote_addNoiseTraceReading",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_addNoiseTraceReading" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_addNoiseTraceReading" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->addNoiseTraceReading(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_createNoiseModel(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_createNoiseModel",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_createNoiseModel" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  (arg1)->createNoiseModel();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_generateNoise(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  int arg2 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Mote_generateNoise",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_generateNoise" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_generateNoise" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  result = (int)(arg1)->generateNoise(arg2);
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *Mote_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_Mote, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_Tossim(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  Tossim *result = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:new_Tossim",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = "<bad string>";
+          app->variableTypes[i] = "<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  result = (Tossim *)new Tossim(arg1);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Tossim, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_Tossim(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_Tossim",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Tossim" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_init(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_init",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_init" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  (arg1)->init();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_time(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  long long result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_time",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_time" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (long long)(arg1)->time();
+  resultobj = SWIG_From_long_SS_long(static_cast< long long >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_ticksPerSecond(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  long long result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_ticksPerSecond",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_ticksPerSecond" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (long long)(arg1)->ticksPerSecond();
+  resultobj = SWIG_From_long_SS_long(static_cast< long long >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_setTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  long long arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  long long val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_setTime",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_setTime" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  ecode2 = SWIG_AsVal_long_SS_long(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_setTime" "', argument " "2"" of type '" "long long""'");
+  } 
+  arg2 = static_cast< long long >(val2);
+  (arg1)->setTime(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_timeStr(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  char *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_timeStr",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_timeStr" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (char *)(arg1)->timeStr();
+  resultobj = SWIG_FromCharPtr((const char *)result);
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_currentNode(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  Mote *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_currentNode",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_currentNode" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (Mote *)(arg1)->currentNode();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Mote, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_getNode(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  unsigned long arg2 ;
+  Mote *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  unsigned long val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_getNode",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_getNode" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  ecode2 = SWIG_AsVal_unsigned_SS_long(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_getNode" "', argument " "2"" of type '" "unsigned long""'");
+  } 
+  arg2 = static_cast< unsigned long >(val2);
+  result = (Mote *)(arg1)->getNode(arg2);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Mote, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_setCurrentNode(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  unsigned long arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  unsigned long val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_setCurrentNode",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_setCurrentNode" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  ecode2 = SWIG_AsVal_unsigned_SS_long(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_setCurrentNode" "', argument " "2"" of type '" "unsigned long""'");
+  } 
+  arg2 = static_cast< unsigned long >(val2);
+  (arg1)->setCurrentNode(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_addChannel(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  char *arg2 = (char *) 0 ;
+  FILE *arg3 = (FILE *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:Tossim_addChannel",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_addChannel" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Tossim_addChannel" "', argument " "2"" of type '" "char *""'");
+  }
+  arg2 = reinterpret_cast< char * >(buf2);
+  {
+    if (!PyFile_Check(obj2)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter.");
+      return NULL;
+    }
+    arg3 = PyFile_AsFile(obj2);
+  }
+  (arg1)->addChannel(arg2,arg3);
+  resultobj = SWIG_Py_Void();
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_removeChannel(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  char *arg2 = (char *) 0 ;
+  FILE *arg3 = (FILE *) 0 ;
+  bool result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:Tossim_removeChannel",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_removeChannel" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Tossim_removeChannel" "', argument " "2"" of type '" "char *""'");
+  }
+  arg2 = reinterpret_cast< char * >(buf2);
+  {
+    if (!PyFile_Check(obj2)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter.");
+      return NULL;
+    }
+    arg3 = PyFile_AsFile(obj2);
+  }
+  result = (bool)(arg1)->removeChannel(arg2,arg3);
+  resultobj = SWIG_From_bool(static_cast< bool >(result));
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_randomSeed(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_randomSeed",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_randomSeed" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_randomSeed" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->randomSeed(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_runNextEvent(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  bool result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_runNextEvent",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_runNextEvent" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (bool)(arg1)->runNextEvent();
+  resultobj = SWIG_From_bool(static_cast< bool >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_mac(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  MAC *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_mac",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_mac" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (MAC *)(arg1)->mac();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_MAC, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_radio(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  Radio *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_radio",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_radio" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (Radio *)(arg1)->radio();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Radio, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_newPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  Packet *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_newPacket",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_newPacket" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (Packet *)(arg1)->newPacket();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Packet, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_newSerialPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  SerialPacket *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_newSerialPacket",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_newSerialPacket" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (SerialPacket *)(arg1)->newSerialPacket();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_SerialPacket, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *Tossim_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_Tossim, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+static PyMethodDef SwigMethods[] = {
+	 { (char *)"new_MAC", _wrap_new_MAC, METH_VARARGS, NULL},
+	 { (char *)"delete_MAC", _wrap_delete_MAC, METH_VARARGS, NULL},
+	 { (char *)"MAC_initHigh", _wrap_MAC_initHigh, METH_VARARGS, NULL},
+	 { (char *)"MAC_initLow", _wrap_MAC_initLow, METH_VARARGS, NULL},
+	 { (char *)"MAC_high", _wrap_MAC_high, METH_VARARGS, NULL},
+	 { (char *)"MAC_low", _wrap_MAC_low, METH_VARARGS, NULL},
+	 { (char *)"MAC_symbolsPerSec", _wrap_MAC_symbolsPerSec, METH_VARARGS, NULL},
+	 { (char *)"MAC_bitsPerSymbol", _wrap_MAC_bitsPerSymbol, METH_VARARGS, NULL},
+	 { (char *)"MAC_preambleLength", _wrap_MAC_preambleLength, METH_VARARGS, NULL},
+	 { (char *)"MAC_exponentBase", _wrap_MAC_exponentBase, METH_VARARGS, NULL},
+	 { (char *)"MAC_maxIterations", _wrap_MAC_maxIterations, METH_VARARGS, NULL},
+	 { (char *)"MAC_minFreeSamples", _wrap_MAC_minFreeSamples, METH_VARARGS, NULL},
+	 { (char *)"MAC_rxtxDelay", _wrap_MAC_rxtxDelay, METH_VARARGS, NULL},
+	 { (char *)"MAC_ackTime", _wrap_MAC_ackTime, METH_VARARGS, NULL},
+	 { (char *)"MAC_setInitHigh", _wrap_MAC_setInitHigh, METH_VARARGS, NULL},
+	 { (char *)"MAC_setInitLow", _wrap_MAC_setInitLow, METH_VARARGS, NULL},
+	 { (char *)"MAC_setHigh", _wrap_MAC_setHigh, METH_VARARGS, NULL},
+	 { (char *)"MAC_setLow", _wrap_MAC_setLow, METH_VARARGS, NULL},
+	 { (char *)"MAC_setSymbolsPerSec", _wrap_MAC_setSymbolsPerSec, METH_VARARGS, NULL},
+	 { (char *)"MAC_setBitsBerSymbol", _wrap_MAC_setBitsBerSymbol, METH_VARARGS, NULL},
+	 { (char *)"MAC_setPreambleLength", _wrap_MAC_setPreambleLength, METH_VARARGS, NULL},
+	 { (char *)"MAC_setExponentBase", _wrap_MAC_setExponentBase, METH_VARARGS, NULL},
+	 { (char *)"MAC_setMaxIterations", _wrap_MAC_setMaxIterations, METH_VARARGS, NULL},
+	 { (char *)"MAC_setMinFreeSamples", _wrap_MAC_setMinFreeSamples, METH_VARARGS, NULL},
+	 { (char *)"MAC_setRxtxDelay", _wrap_MAC_setRxtxDelay, METH_VARARGS, NULL},
+	 { (char *)"MAC_setAckTime", _wrap_MAC_setAckTime, METH_VARARGS, NULL},
+	 { (char *)"MAC_swigregister", MAC_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_Radio", _wrap_new_Radio, METH_VARARGS, NULL},
+	 { (char *)"delete_Radio", _wrap_delete_Radio, METH_VARARGS, NULL},
+	 { (char *)"Radio_add", _wrap_Radio_add, METH_VARARGS, NULL},
+	 { (char *)"Radio_gain", _wrap_Radio_gain, METH_VARARGS, NULL},
+	 { (char *)"Radio_connected", _wrap_Radio_connected, METH_VARARGS, NULL},
+	 { (char *)"Radio_remove", _wrap_Radio_remove, METH_VARARGS, NULL},
+	 { (char *)"Radio_setNoise", _wrap_Radio_setNoise, METH_VARARGS, NULL},
+	 { (char *)"Radio_setSensitivity", _wrap_Radio_setSensitivity, METH_VARARGS, NULL},
+	 { (char *)"Radio_swigregister", Radio_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_Packet", _wrap_new_Packet, METH_VARARGS, NULL},
+	 { (char *)"delete_Packet", _wrap_delete_Packet, METH_VARARGS, NULL},
+	 { (char *)"Packet_setSource", _wrap_Packet_setSource, METH_VARARGS, NULL},
+	 { (char *)"Packet_source", _wrap_Packet_source, METH_VARARGS, NULL},
+	 { (char *)"Packet_setDestination", _wrap_Packet_setDestination, METH_VARARGS, NULL},
+	 { (char *)"Packet_destination", _wrap_Packet_destination, METH_VARARGS, NULL},
+	 { (char *)"Packet_setLength", _wrap_Packet_setLength, METH_VARARGS, NULL},
+	 { (char *)"Packet_length", _wrap_Packet_length, METH_VARARGS, NULL},
+	 { (char *)"Packet_setType", _wrap_Packet_setType, METH_VARARGS, NULL},
+	 { (char *)"Packet_type", _wrap_Packet_type, METH_VARARGS, NULL},
+	 { (char *)"Packet_data", _wrap_Packet_data, METH_VARARGS, NULL},
+	 { (char *)"Packet_setData", _wrap_Packet_setData, METH_VARARGS, NULL},
+	 { (char *)"Packet_maxLength", _wrap_Packet_maxLength, METH_VARARGS, NULL},
+	 { (char *)"Packet_setStrength", _wrap_Packet_setStrength, METH_VARARGS, NULL},
+	 { (char *)"Packet_deliver", _wrap_Packet_deliver, METH_VARARGS, NULL},
+	 { (char *)"Packet_deliverNow", _wrap_Packet_deliverNow, METH_VARARGS, NULL},
+	 { (char *)"Packet_swigregister", Packet_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_SerialPacket", _wrap_new_SerialPacket, METH_VARARGS, NULL},
+	 { (char *)"delete_SerialPacket", _wrap_delete_SerialPacket, METH_VARARGS, NULL},
+	 { (char *)"SerialPacket_setDestination", _wrap_SerialPacket_setDestination, METH_VARARGS, NULL},
+	 { (char *)"SerialPacket_destination", _wrap_SerialPacket_destination, METH_VARARGS, NULL},
+	 { (char *)"SerialPacket_setLength", _wrap_SerialPacket_setLength, METH_VARARGS, NULL},
+	 { (char *)"SerialPacket_length", _wrap_SerialPacket_length, METH_VARARGS, NULL},
+	 { (char *)"SerialPacket_setType", _wrap_SerialPacket_setType, METH_VARARGS, NULL},
+	 { (char *)"SerialPacket_type", _wrap_SerialPacket_type, METH_VARARGS, NULL},
+	 { (char *)"SerialPacket_data", _wrap_SerialPacket_data, METH_VARARGS, NULL},
+	 { (char *)"SerialPacket_setData", _wrap_SerialPacket_setData, METH_VARARGS, NULL},
+	 { (char *)"SerialPacket_maxLength", _wrap_SerialPacket_maxLength, METH_VARARGS, NULL},
+	 { (char *)"SerialPacket_deliver", _wrap_SerialPacket_deliver, METH_VARARGS, NULL},
+	 { (char *)"SerialPacket_deliverNow", _wrap_SerialPacket_deliverNow, METH_VARARGS, NULL},
+	 { (char *)"SerialPacket_swigregister", SerialPacket_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_SerialForwarder", _wrap_new_SerialForwarder, METH_VARARGS, NULL},
+	 { (char *)"delete_SerialForwarder", _wrap_delete_SerialForwarder, METH_VARARGS, NULL},
+	 { (char *)"SerialForwarder_process", _wrap_SerialForwarder_process, METH_VARARGS, NULL},
+	 { (char *)"SerialForwarder_dispatchPacket", _wrap_SerialForwarder_dispatchPacket, METH_VARARGS, NULL},
+	 { (char *)"SerialForwarder_forwardPacket", _wrap_SerialForwarder_forwardPacket, METH_VARARGS, NULL},
+	 { (char *)"SerialForwarder_swigregister", SerialForwarder_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_Throttle", _wrap_new_Throttle, METH_VARARGS, NULL},
+	 { (char *)"delete_Throttle", _wrap_delete_Throttle, METH_VARARGS, NULL},
+	 { (char *)"Throttle_initialize", _wrap_Throttle_initialize, METH_VARARGS, NULL},
+	 { (char *)"Throttle_finalize", _wrap_Throttle_finalize, METH_VARARGS, NULL},
+	 { (char *)"Throttle_checkThrottle", _wrap_Throttle_checkThrottle, METH_VARARGS, NULL},
+	 { (char *)"Throttle_printStatistics", _wrap_Throttle_printStatistics, METH_VARARGS, NULL},
+	 { (char *)"Throttle_swigregister", Throttle_swigregister, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_type_set", _wrap_variable_string_t_type_set, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_type_get", _wrap_variable_string_t_type_get, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_ptr_set", _wrap_variable_string_t_ptr_set, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_ptr_get", _wrap_variable_string_t_ptr_get, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_len_set", _wrap_variable_string_t_len_set, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_len_get", _wrap_variable_string_t_len_get, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_isArray_set", _wrap_variable_string_t_isArray_set, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_isArray_get", _wrap_variable_string_t_isArray_get, METH_VARARGS, NULL},
+	 { (char *)"new_variable_string_t", _wrap_new_variable_string_t, METH_VARARGS, NULL},
+	 { (char *)"delete_variable_string_t", _wrap_delete_variable_string_t, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_swigregister", variable_string_t_swigregister, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_numVariables_set", _wrap_nesc_app_t_numVariables_set, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_numVariables_get", _wrap_nesc_app_t_numVariables_get, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_variableNames_set", _wrap_nesc_app_t_variableNames_set, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_variableNames_get", _wrap_nesc_app_t_variableNames_get, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_variableTypes_set", _wrap_nesc_app_t_variableTypes_set, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_variableTypes_get", _wrap_nesc_app_t_variableTypes_get, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_variableArray_set", _wrap_nesc_app_t_variableArray_set, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_variableArray_get", _wrap_nesc_app_t_variableArray_get, METH_VARARGS, NULL},
+	 { (char *)"new_nesc_app_t", _wrap_new_nesc_app_t, METH_VARARGS, NULL},
+	 { (char *)"delete_nesc_app_t", _wrap_delete_nesc_app_t, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_swigregister", nesc_app_t_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_Variable", _wrap_new_Variable, METH_VARARGS, NULL},
+	 { (char *)"delete_Variable", _wrap_delete_Variable, METH_VARARGS, NULL},
+	 { (char *)"Variable_getData", _wrap_Variable_getData, METH_VARARGS, NULL},
+	 { (char *)"Variable_swigregister", Variable_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_Mote", _wrap_new_Mote, METH_VARARGS, NULL},
+	 { (char *)"delete_Mote", _wrap_delete_Mote, METH_VARARGS, NULL},
+	 { (char *)"Mote_id", _wrap_Mote_id, METH_VARARGS, NULL},
+	 { (char *)"Mote_euid", _wrap_Mote_euid, METH_VARARGS, NULL},
+	 { (char *)"Mote_setEuid", _wrap_Mote_setEuid, METH_VARARGS, NULL},
+	 { (char *)"Mote_bootTime", _wrap_Mote_bootTime, METH_VARARGS, NULL},
+	 { (char *)"Mote_bootAtTime", _wrap_Mote_bootAtTime, METH_VARARGS, NULL},
+	 { (char *)"Mote_isOn", _wrap_Mote_isOn, METH_VARARGS, NULL},
+	 { (char *)"Mote_turnOff", _wrap_Mote_turnOff, METH_VARARGS, NULL},
+	 { (char *)"Mote_turnOn", _wrap_Mote_turnOn, METH_VARARGS, NULL},
+	 { (char *)"Mote_getVariable", _wrap_Mote_getVariable, METH_VARARGS, NULL},
+	 { (char *)"Mote_addNoiseTraceReading", _wrap_Mote_addNoiseTraceReading, METH_VARARGS, NULL},
+	 { (char *)"Mote_createNoiseModel", _wrap_Mote_createNoiseModel, METH_VARARGS, NULL},
+	 { (char *)"Mote_generateNoise", _wrap_Mote_generateNoise, METH_VARARGS, NULL},
+	 { (char *)"Mote_swigregister", Mote_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_Tossim", _wrap_new_Tossim, METH_VARARGS, NULL},
+	 { (char *)"delete_Tossim", _wrap_delete_Tossim, METH_VARARGS, NULL},
+	 { (char *)"Tossim_init", _wrap_Tossim_init, METH_VARARGS, NULL},
+	 { (char *)"Tossim_time", _wrap_Tossim_time, METH_VARARGS, NULL},
+	 { (char *)"Tossim_ticksPerSecond", _wrap_Tossim_ticksPerSecond, METH_VARARGS, NULL},
+	 { (char *)"Tossim_setTime", _wrap_Tossim_setTime, METH_VARARGS, NULL},
+	 { (char *)"Tossim_timeStr", _wrap_Tossim_timeStr, METH_VARARGS, NULL},
+	 { (char *)"Tossim_currentNode", _wrap_Tossim_currentNode, METH_VARARGS, NULL},
+	 { (char *)"Tossim_getNode", _wrap_Tossim_getNode, METH_VARARGS, NULL},
+	 { (char *)"Tossim_setCurrentNode", _wrap_Tossim_setCurrentNode, METH_VARARGS, NULL},
+	 { (char *)"Tossim_addChannel", _wrap_Tossim_addChannel, METH_VARARGS, NULL},
+	 { (char *)"Tossim_removeChannel", _wrap_Tossim_removeChannel, METH_VARARGS, NULL},
+	 { (char *)"Tossim_randomSeed", _wrap_Tossim_randomSeed, METH_VARARGS, NULL},
+	 { (char *)"Tossim_runNextEvent", _wrap_Tossim_runNextEvent, METH_VARARGS, NULL},
+	 { (char *)"Tossim_mac", _wrap_Tossim_mac, METH_VARARGS, NULL},
+	 { (char *)"Tossim_radio", _wrap_Tossim_radio, METH_VARARGS, NULL},
+	 { (char *)"Tossim_newPacket", _wrap_Tossim_newPacket, METH_VARARGS, NULL},
+	 { (char *)"Tossim_newSerialPacket", _wrap_Tossim_newSerialPacket, METH_VARARGS, NULL},
+	 { (char *)"Tossim_swigregister", Tossim_swigregister, METH_VARARGS, NULL},
+	 { NULL, NULL, 0, NULL }
+};
+
+
+/* -------- TYPE CONVERSION AND EQUIVALENCE RULES (BEGIN) -------- */
+
+static swig_type_info _swigt__p_FILE = {"_p_FILE", "FILE *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_MAC = {"_p_MAC", "MAC *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_Mote = {"_p_Mote", "Mote *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_Packet = {"_p_Packet", "Packet *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_Radio = {"_p_Radio", "Radio *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_SerialForwarder = {"_p_SerialForwarder", "SerialForwarder *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_SerialPacket = {"_p_SerialPacket", "SerialPacket *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_Throttle = {"_p_Throttle", "Throttle *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_Tossim = {"_p_Tossim", "Tossim *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_Variable = {"_p_Variable", "Variable *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_char = {"_p_char", "char *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_int = {"_p_int", "int *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_nesc_app = {"_p_nesc_app", "nesc_app *|nesc_app_t *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_p_char = {"_p_p_char", "char **", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_var_string = {"_p_var_string", "var_string *|variable_string_t *", 0, 0, (void*)0, 0};
+
+static swig_type_info *swig_type_initial[] = {
+  &_swigt__p_FILE,
+  &_swigt__p_MAC,
+  &_swigt__p_Mote,
+  &_swigt__p_Packet,
+  &_swigt__p_Radio,
+  &_swigt__p_SerialForwarder,
+  &_swigt__p_SerialPacket,
+  &_swigt__p_Throttle,
+  &_swigt__p_Tossim,
+  &_swigt__p_Variable,
+  &_swigt__p_char,
+  &_swigt__p_int,
+  &_swigt__p_nesc_app,
+  &_swigt__p_p_char,
+  &_swigt__p_var_string,
+};
+
+static swig_cast_info _swigc__p_FILE[] = {  {&_swigt__p_FILE, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_MAC[] = {  {&_swigt__p_MAC, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_Mote[] = {  {&_swigt__p_Mote, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_Packet[] = {  {&_swigt__p_Packet, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_Radio[] = {  {&_swigt__p_Radio, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_SerialForwarder[] = {  {&_swigt__p_SerialForwarder, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_SerialPacket[] = {  {&_swigt__p_SerialPacket, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_Throttle[] = {  {&_swigt__p_Throttle, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_Tossim[] = {  {&_swigt__p_Tossim, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_Variable[] = {  {&_swigt__p_Variable, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_char[] = {  {&_swigt__p_char, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_int[] = {  {&_swigt__p_int, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_nesc_app[] = {  {&_swigt__p_nesc_app, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_p_char[] = {  {&_swigt__p_p_char, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_var_string[] = {  {&_swigt__p_var_string, 0, 0, 0},{0, 0, 0, 0}};
+
+static swig_cast_info *swig_cast_initial[] = {
+  _swigc__p_FILE,
+  _swigc__p_MAC,
+  _swigc__p_Mote,
+  _swigc__p_Packet,
+  _swigc__p_Radio,
+  _swigc__p_SerialForwarder,
+  _swigc__p_SerialPacket,
+  _swigc__p_Throttle,
+  _swigc__p_Tossim,
+  _swigc__p_Variable,
+  _swigc__p_char,
+  _swigc__p_int,
+  _swigc__p_nesc_app,
+  _swigc__p_p_char,
+  _swigc__p_var_string,
+};
+
+
+/* -------- TYPE CONVERSION AND EQUIVALENCE RULES (END) -------- */
+
+static swig_const_info swig_const_table[] = {
+{0, 0, 0, 0.0, 0, 0}};
+
+#ifdef __cplusplus
+}
+#endif
+/* -----------------------------------------------------------------------------
+ * Type initialization:
+ * This problem is tough by the requirement that no dynamic 
+ * memory is used. Also, since swig_type_info structures store pointers to 
+ * swig_cast_info structures and swig_cast_info structures store pointers back
+ * to swig_type_info structures, we need some lookup code at initialization. 
+ * The idea is that swig generates all the structures that are needed. 
+ * The runtime then collects these partially filled structures. 
+ * The SWIG_InitializeModule function takes these initial arrays out of 
+ * swig_module, and does all the lookup, filling in the swig_module.types
+ * array with the correct data and linking the correct swig_cast_info
+ * structures together.
+ *
+ * The generated swig_type_info structures are assigned staticly to an initial 
+ * array. We just loop through that array, and handle each type individually.
+ * First we lookup if this type has been already loaded, and if so, use the
+ * loaded structure instead of the generated one. Then we have to fill in the
+ * cast linked list. The cast data is initially stored in something like a
+ * two-dimensional array. Each row corresponds to a type (there are the same
+ * number of rows as there are in the swig_type_initial array). Each entry in
+ * a column is one of the swig_cast_info structures for that type.
+ * The cast_initial array is actually an array of arrays, because each row has
+ * a variable number of columns. So to actually build the cast linked list,
+ * we find the array of casts associated with the type, and loop through it 
+ * adding the casts to the list. The one last trick we need to do is making
+ * sure the type pointer in the swig_cast_info struct is correct.
+ *
+ * First off, we lookup the cast->type name to see if it is already loaded. 
+ * There are three cases to handle:
+ *  1) If the cast->type has already been loaded AND the type we are adding
+ *     casting info to has not been loaded (it is in this module), THEN we
+ *     replace the cast->type pointer with the type pointer that has already
+ *     been loaded.
+ *  2) If BOTH types (the one we are adding casting info to, and the 
+ *     cast->type) are loaded, THEN the cast info has already been loaded by
+ *     the previous module so we just ignore it.
+ *  3) Finally, if cast->type has not already been loaded, then we add that
+ *     swig_cast_info to the linked list (because the cast->type) pointer will
+ *     be correct.
+ * ----------------------------------------------------------------------------- */
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* c-mode */
+#endif
+#endif
+
+#if 0
+#define SWIGRUNTIME_DEBUG
+#endif
+
+
+SWIGRUNTIME void
+SWIG_InitializeModule(void *clientdata) {
+  size_t i;
+  swig_module_info *module_head, *iter;
+  int found;
+  
+  clientdata = clientdata;
+  
+  /* check to see if the circular list has been setup, if not, set it up */
+  if (swig_module.next==0) {
+    /* Initialize the swig_module */
+    swig_module.type_initial = swig_type_initial;
+    swig_module.cast_initial = swig_cast_initial;
+    swig_module.next = &swig_module;
+  }
+  
+  /* Try and load any already created modules */
+  module_head = SWIG_GetModule(clientdata);
+  if (!module_head) {
+    /* This is the first module loaded for this interpreter */
+    /* so set the swig module into the interpreter */
+    SWIG_SetModule(clientdata, &swig_module);
+    module_head = &swig_module;
+  } else {
+    /* the interpreter has loaded a SWIG module, but has it loaded this one? */
+    found=0;
+    iter=module_head;
+    do {
+      if (iter==&swig_module) {
+        found=1;
+        break;
+      }
+      iter=iter->next;
+    } while (iter!= module_head);
+    
+    /* if the is found in the list, then all is done and we may leave */
+    if (found) return;
+    /* otherwise we must add out module into the list */
+    swig_module.next = module_head->next;
+    module_head->next = &swig_module;
+  }
+  
+  /* Now work on filling in swig_module.types */
+#ifdef SWIGRUNTIME_DEBUG
+  printf("SWIG_InitializeModule: size %d\n", swig_module.size);
+#endif
+  for (i = 0; i < swig_module.size; ++i) {
+    swig_type_info *type = 0;
+    swig_type_info *ret;
+    swig_cast_info *cast;
+    
+#ifdef SWIGRUNTIME_DEBUG
+    printf("SWIG_InitializeModule: type %d %s\n", i, swig_module.type_initial[i]->name);
+#endif
+    
+    /* if there is another module already loaded */
+    if (swig_module.next != &swig_module) {
+      type = SWIG_MangledTypeQueryModule(swig_module.next, &swig_module, swig_module.type_initial[i]->name);
+    }
+    if (type) {
+      /* Overwrite clientdata field */
+#ifdef SWIGRUNTIME_DEBUG
+      printf("SWIG_InitializeModule: found type %s\n", type->name);
+#endif
+      if (swig_module.type_initial[i]->clientdata) {
+        type->clientdata = swig_module.type_initial[i]->clientdata;
+#ifdef SWIGRUNTIME_DEBUG
+        printf("SWIG_InitializeModule: found and overwrite type %s \n", type->name);
+#endif
+      }
+    } else {
+      type = swig_module.type_initial[i];
+    }
+    
+    /* Insert casting types */
+    cast = swig_module.cast_initial[i];
+    while (cast->type) {
+      /* Don't need to add information already in the list */
+      ret = 0;
+#ifdef SWIGRUNTIME_DEBUG
+      printf("SWIG_InitializeModule: look cast %s\n", cast->type->name);
+#endif
+      if (swig_module.next != &swig_module) {
+        ret = SWIG_MangledTypeQueryModule(swig_module.next, &swig_module, cast->type->name);
+#ifdef SWIGRUNTIME_DEBUG
+        if (ret) printf("SWIG_InitializeModule: found cast %s\n", ret->name);
+#endif
+      }
+      if (ret) {
+        if (type == swig_module.type_initial[i]) {
+#ifdef SWIGRUNTIME_DEBUG
+          printf("SWIG_InitializeModule: skip old type %s\n", ret->name);
+#endif
+          cast->type = ret;
+          ret = 0;
+        } else {
+          /* Check for casting already in the list */
+          swig_cast_info *ocast = SWIG_TypeCheck(ret->name, type);
+#ifdef SWIGRUNTIME_DEBUG
+          if (ocast) printf("SWIG_InitializeModule: skip old cast %s\n", ret->name);
+#endif
+          if (!ocast) ret = 0;
+        }
+      }
+      
+      if (!ret) {
+#ifdef SWIGRUNTIME_DEBUG
+        printf("SWIG_InitializeModule: adding cast %s\n", cast->type->name);
+#endif
+        if (type->cast) {
+          type->cast->prev = cast;
+          cast->next = type->cast;
+        }
+        type->cast = cast;
+      }
+      cast++;
+    }
+    /* Set entry in modules->types array equal to the type */
+    swig_module.types[i] = type;
+  }
+  swig_module.types[i] = 0;
+  
+#ifdef SWIGRUNTIME_DEBUG
+  printf("**** SWIG_InitializeModule: Cast List ******\n");
+  for (i = 0; i < swig_module.size; ++i) {
+    int j = 0;
+    swig_cast_info *cast = swig_module.cast_initial[i];
+    printf("SWIG_InitializeModule: type %d %s\n", i, swig_module.type_initial[i]->name);
+    while (cast->type) {
+      printf("SWIG_InitializeModule: cast type %s\n", cast->type->name);
+      cast++;
+      ++j;
+    }
+    printf("---- Total casts: %d\n",j);
+  }
+  printf("**** SWIG_InitializeModule: Cast List ******\n");
+#endif
+}
+
+/* This function will propagate the clientdata field of type to
+* any new swig_type_info structures that have been added into the list
+* of equivalent types.  It is like calling
+* SWIG_TypeClientData(type, clientdata) a second time.
+*/
+SWIGRUNTIME void
+SWIG_PropagateClientData(void) {
+  size_t i;
+  swig_cast_info *equiv;
+  static int init_run = 0;
+  
+  if (init_run) return;
+  init_run = 1;
+  
+  for (i = 0; i < swig_module.size; i++) {
+    if (swig_module.types[i]->clientdata) {
+      equiv = swig_module.types[i]->cast;
+      while (equiv) {
+        if (!equiv->converter) {
+          if (equiv->type && !equiv->type->clientdata)
+          SWIG_TypeClientData(equiv->type, swig_module.types[i]->clientdata);
+        }
+        equiv = equiv->next;
+      }
+    }
+  }
+}
+
+#ifdef __cplusplus
+#if 0
+{
+  /* c-mode */
+#endif
+}
+#endif
+
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+  
+  /* Python-specific SWIG API */
+#define SWIG_newvarlink()                             SWIG_Python_newvarlink()
+#define SWIG_addvarlink(p, name, get_attr, set_attr)  SWIG_Python_addvarlink(p, name, get_attr, set_attr)
+#define SWIG_InstallConstants(d, constants)           SWIG_Python_InstallConstants(d, constants)
+  
+  /* -----------------------------------------------------------------------------
+   * global variable support code.
+   * ----------------------------------------------------------------------------- */
+  
+  typedef struct swig_globalvar {
+    char       *name;                  /* Name of global variable */
+    PyObject *(*get_attr)(void);       /* Return the current value */
+    int       (*set_attr)(PyObject *); /* Set the value */
+    struct swig_globalvar *next;
+  } swig_globalvar;
+  
+  typedef struct swig_varlinkobject {
+    PyObject_HEAD
+    swig_globalvar *vars;
+  } swig_varlinkobject;
+  
+  SWIGINTERN PyObject *
+  swig_varlink_repr(swig_varlinkobject *SWIGUNUSEDPARM(v)) {
+    return PyString_FromString("<Swig global variables>");
+  }
+  
+  SWIGINTERN PyObject *
+  swig_varlink_str(swig_varlinkobject *v) {
+    PyObject *str = PyString_FromString("(");
+    swig_globalvar  *var;
+    for (var = v->vars; var; var=var->next) {
+      PyString_ConcatAndDel(&str,PyString_FromString(var->name));
+      if (var->next) PyString_ConcatAndDel(&str,PyString_FromString(", "));
+    }
+    PyString_ConcatAndDel(&str,PyString_FromString(")"));
+    return str;
+  }
+  
+  SWIGINTERN int
+  swig_varlink_print(swig_varlinkobject *v, FILE *fp, int SWIGUNUSEDPARM(flags)) {
+    PyObject *str = swig_varlink_str(v);
+    fprintf(fp,"Swig global variables ");
+    fprintf(fp,"%s\n", PyString_AsString(str));
+    Py_DECREF(str);
+    return 0;
+  }
+  
+  SWIGINTERN void
+  swig_varlink_dealloc(swig_varlinkobject *v) {
+    swig_globalvar *var = v->vars;
+    while (var) {
+      swig_globalvar *n = var->next;
+      free(var->name);
+      free(var);
+      var = n;
+    }
+  }
+  
+  SWIGINTERN PyObject *
+  swig_varlink_getattr(swig_varlinkobject *v, char *n) {
+    PyObject *res = NULL;
+    swig_globalvar *var = v->vars;
+    while (var) {
+      if (strcmp(var->name,n) == 0) {
+        res = (*var->get_attr)();
+        break;
+      }
+      var = var->next;
+    }
+    if (res == NULL && !PyErr_Occurred()) {
+      PyErr_SetString(PyExc_NameError,"Unknown C global variable");
+    }
+    return res;
+  }
+  
+  SWIGINTERN int
+  swig_varlink_setattr(swig_varlinkobject *v, char *n, PyObject *p) {
+    int res = 1;
+    swig_globalvar *var = v->vars;
+    while (var) {
+      if (strcmp(var->name,n) == 0) {
+        res = (*var->set_attr)(p);
+        break;
+      }
+      var = var->next;
+    }
+    if (res == 1 && !PyErr_Occurred()) {
+      PyErr_SetString(PyExc_NameError,"Unknown C global variable");
+    }
+    return res;
+  }
+  
+  SWIGINTERN PyTypeObject*
+  swig_varlink_type(void) {
+    static char varlink__doc__[] = "Swig var link object";
+    static PyTypeObject varlink_type;
+    static int type_init = 0;  
+    if (!type_init) {
+      const PyTypeObject tmp
+      = {
+        PyObject_HEAD_INIT(NULL)
+        0,                                  /* Number of items in variable part (ob_size) */
+        (char *)"swigvarlink",              /* Type name (tp_name) */
+        sizeof(swig_varlinkobject),         /* Basic size (tp_basicsize) */
+        0,                                  /* Itemsize (tp_itemsize) */
+        (destructor) swig_varlink_dealloc,   /* Deallocator (tp_dealloc) */ 
+        (printfunc) swig_varlink_print,     /* Print (tp_print) */
+        (getattrfunc) swig_varlink_getattr, /* get attr (tp_getattr) */
+        (setattrfunc) swig_varlink_setattr, /* Set attr (tp_setattr) */
+        0,                                  /* tp_compare */
+        (reprfunc) swig_varlink_repr,       /* tp_repr */
+        0,                                  /* tp_as_number */
+        0,                                  /* tp_as_sequence */
+        0,                                  /* tp_as_mapping */
+        0,                                  /* tp_hash */
+        0,                                  /* tp_call */
+        (reprfunc)swig_varlink_str,        /* tp_str */
+        0,                                  /* tp_getattro */
+        0,                                  /* tp_setattro */
+        0,                                  /* tp_as_buffer */
+        0,                                  /* tp_flags */
+        varlink__doc__,                     /* tp_doc */
+        0,                                  /* tp_traverse */
+        0,                                  /* tp_clear */
+        0,                                  /* tp_richcompare */
+        0,                                  /* tp_weaklistoffset */
+#if PY_VERSION_HEX >= 0x02020000
+        0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* tp_iter -> tp_weaklist */
+#endif
+#if PY_VERSION_HEX >= 0x02030000
+        0,                                  /* tp_del */
+#endif
+#ifdef COUNT_ALLOCS
+        0,0,0,0                             /* tp_alloc -> tp_next */
+#endif
+      };
+      varlink_type = tmp;
+      varlink_type.ob_type = &PyType_Type;
+      type_init = 1;
+    }
+    return &varlink_type;
+  }
+  
+  /* Create a variable linking object for use later */
+  SWIGINTERN PyObject *
+  SWIG_Python_newvarlink(void) {
+    swig_varlinkobject *result = PyObject_NEW(swig_varlinkobject, swig_varlink_type());
+    if (result) {
+      result->vars = 0;
+    }
+    return ((PyObject*) result);
+  }
+  
+  SWIGINTERN void 
+  SWIG_Python_addvarlink(PyObject *p, char *name, PyObject *(*get_attr)(void), int (*set_attr)(PyObject *p)) {
+    swig_varlinkobject *v = (swig_varlinkobject *) p;
+    swig_globalvar *gv = (swig_globalvar *) malloc(sizeof(swig_globalvar));
+    if (gv) {
+      size_t size = strlen(name)+1;
+      gv->name = (char *)malloc(size);
+      if (gv->name) {
+        strncpy(gv->name,name,size);
+        gv->get_attr = get_attr;
+        gv->set_attr = set_attr;
+        gv->next = v->vars;
+      }
+    }
+    v->vars = gv;
+  }
+  
+  SWIGINTERN PyObject *
+  SWIG_globals(void) {
+    static PyObject *_SWIG_globals = 0; 
+    if (!_SWIG_globals) _SWIG_globals = SWIG_newvarlink();  
+    return _SWIG_globals;
+  }
+  
+  /* -----------------------------------------------------------------------------
+   * constants/methods manipulation
+   * ----------------------------------------------------------------------------- */
+  
+  /* Install Constants */
+  SWIGINTERN void
+  SWIG_Python_InstallConstants(PyObject *d, swig_const_info constants[]) {
+    PyObject *obj = 0;
+    size_t i;
+    for (i = 0; constants[i].type; ++i) {
+      switch(constants[i].type) {
+      case SWIG_PY_POINTER:
+        obj = SWIG_NewPointerObj(constants[i].pvalue, *(constants[i]).ptype,0);
+        break;
+      case SWIG_PY_BINARY:
+        obj = SWIG_NewPackedObj(constants[i].pvalue, constants[i].lvalue, *(constants[i].ptype));
+        break;
+      default:
+        obj = 0;
+        break;
+      }
+      if (obj) {
+        PyDict_SetItemString(d, constants[i].name, obj);
+        Py_DECREF(obj);
+      }
+    }
+  }
+  
+  /* -----------------------------------------------------------------------------*/
+  /* Fix SwigMethods to carry the callback ptrs when needed */
+  /* -----------------------------------------------------------------------------*/
+  
+  SWIGINTERN void
+  SWIG_Python_FixMethods(PyMethodDef *methods,
+    swig_const_info *const_table,
+    swig_type_info **types,
+    swig_type_info **types_initial) {
+    size_t i;
+    for (i = 0; methods[i].ml_name; ++i) {
+      const char *c = methods[i].ml_doc;
+      if (c && (c = strstr(c, "swig_ptr: "))) {
+        int j;
+        swig_const_info *ci = 0;
+        const char *name = c + 10;
+        for (j = 0; const_table[j].type; ++j) {
+          if (strncmp(const_table[j].name, name, 
+              strlen(const_table[j].name)) == 0) {
+            ci = &(const_table[j]);
+            break;
+          }
+        }
+        if (ci) {
+          size_t shift = (ci->ptype) - types;
+          swig_type_info *ty = types_initial[shift];
+          size_t ldoc = (c - methods[i].ml_doc);
+          size_t lptr = strlen(ty->name)+2*sizeof(void*)+2;
+          char *ndoc = (char*)malloc(ldoc + lptr + 10);
+          if (ndoc) {
+            char *buff = ndoc;
+            void *ptr = (ci->type == SWIG_PY_POINTER) ? ci->pvalue : 0;
+            if (ptr) {
+              strncpy(buff, methods[i].ml_doc, ldoc);
+              buff += ldoc;
+              strncpy(buff, "swig_ptr: ", 10);
+              buff += 10;
+              SWIG_PackVoidPtr(buff, ptr, ty->name, lptr);
+              methods[i].ml_doc = ndoc;
+            }
+          }
+        }
+      }
+    }
+  } 
+  
+#ifdef __cplusplus
+}
+#endif
+
+/* -----------------------------------------------------------------------------*
+ *  Partial Init method
+ * -----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+extern "C"
+#endif
+SWIGEXPORT void SWIG_init(void) {
+  PyObject *m, *d;
+  
+  /* Fix SwigMethods to carry the callback ptrs when needed */
+  SWIG_Python_FixMethods(SwigMethods, swig_const_table, swig_types, swig_type_initial);
+  
+  m = Py_InitModule((char *) SWIG_name, SwigMethods);
+  d = PyModule_GetDict(m);
+  
+  SWIG_InitializeModule(0);
+  SWIG_InstallConstants(d,swig_const_table);
+  
+  
+}
+
diff --git a/tos/lib/tossim/sim_binary.c b/tos/lib/tossim/sim_binary.c
new file mode 100644
index 00000000..a94b6819
--- /dev/null
+++ b/tos/lib/tossim/sim_binary.c
@@ -0,0 +1,111 @@
+#include <sim_binary.h>
+
+link_t* connectivity[TOSSIM_MAX_NODES];
+
+link_t* allocate_link(int mote);
+void deallocate_link(link_t* link);
+
+link_t* sim_binary_first(int src) __attribute__ ((C, spontaneous)) {
+  return connectivity[src];
+}
+
+link_t* sim_binary_next(link_t* link) __attribute__ ((C, spontaneous)) {
+  return link->next;
+}
+
+void sim_binary_add(int src, int dest, double packetLoss) __attribute__ ((C, spontaneous))  {
+  link_t* current;
+  int temp = sim_node();
+  sim_set_node(src);
+
+  current = connectivity[src];
+  while (current != NULL) {
+    if (current->mote == dest) {
+      sim_set_node(temp);
+      break;
+    }
+    current = current->next;
+  }
+
+  if (current == NULL) {
+    current = allocate_link(dest);
+  }
+  current->mote = dest;
+  current->loss = packetLoss;
+  current->next = connectivity[src];
+  connectivity[src] = current;
+  dbg("Binary", "Adding link from %i to %i with loss %llf\n", src, dest, packetLoss);
+  sim_set_node(temp);
+}
+
+double sim_binary_loss(int src, int dest) __attribute__ ((C, spontaneous))  {
+  link_t* current;
+  int temp = sim_node();
+  sim_set_node(src);
+  current = connectivity[src];
+  while (current != NULL) {
+    if (current->mote == dest) {
+      sim_set_node(temp);
+      return current->loss;
+    }
+    current = current->next;
+  }
+  sim_set_node(temp);
+  return 1.0;
+}
+
+bool sim_binary_connected(int src, int dest) __attribute__ ((C, spontaneous)) {
+  link_t* current;
+  int temp = sim_node();
+  sim_set_node(src);
+  current = connectivity[src];
+  while (current != NULL) {
+    if (current->mote == dest) {
+      sim_set_node(temp);
+      return TRUE;
+    }
+    current = current->next;
+  }
+  sim_set_node(temp);
+  return FALSE;
+}
+  
+void sim_binary_remove(int src, int dest) __attribute__ ((C, spontaneous))  {
+  link_t* current;
+  link_t* prevLink;
+  int temp = sim_node();
+  sim_set_node(src);
+    
+  current = connectivity[src];
+  prevLink = NULL;
+    
+  while (current != NULL) {
+    if (current->mote == dest) {
+      if (prevLink == NULL) {
+	connectivity[src] = current->next;
+      }
+      else {
+	prevLink->next = current->next;
+      }
+      deallocate_link(current);
+      current = prevLink->next;
+    }
+    else {
+      prevLink = current;
+      current = current->next;
+    }
+  }
+  sim_set_node(temp);
+}
+
+ link_t* allocate_link(int mote) {
+   link_t* link = (link_t*)malloc(sizeof(link_t));
+   link->next = NULL;
+   link->mote = mote;
+   link->loss = 1.0;
+   return link;
+ }
+
+ void deallocate_link(link_t* link) {
+   free(link);
+ }
diff --git a/tos/lib/tossim/sim_binary.h b/tos/lib/tossim/sim_binary.h
new file mode 100644
index 00000000..a05f4768
--- /dev/null
+++ b/tos/lib/tossim/sim_binary.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The C functions representing the TOSSIM binary interference
+ * model.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+
+// $Id: sim_binary.h,v 1.5 2010-06-29 22:07:51 scipio Exp $
+
+
+
+#ifndef SIM_BINARY_H_INCLUDED
+#define SIM_BINARY_H_INCLUDED
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+  typedef struct link {
+    int mote;
+    double loss;
+    struct link* next;  
+  } link_t;
+  
+  void sim_binary_add(int src, int dest, double packetLoss);
+  double sim_binary_loss(int src, int dest);
+  bool sim_binary_connected(int src, int dest);
+  void sim_binary_remove(int src, int dest);
+
+  link_t* sim_binary_first(int src);
+  link_t* sim_binary_next(link_t* link);
+  
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_BINARY_H_INCLUDED
diff --git a/tos/lib/tossim/sim_csma.c b/tos/lib/tossim/sim_csma.c
new file mode 100644
index 00000000..03f98fa7
--- /dev/null
+++ b/tos/lib/tossim/sim_csma.c
@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * C implementation of configuration parameters for a CSMA link.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+// $Id: sim_csma.c,v 1.5 2010-06-29 22:07:51 scipio Exp $
+
+#include <sim_csma.h>
+
+int csmaInitHigh = SIM_CSMA_INIT_HIGH;
+int csmaInitLow = SIM_CSMA_INIT_LOW;
+int csmaHigh = SIM_CSMA_HIGH;
+int csmaLow = SIM_CSMA_LOW;
+int csmaSymbolsPerSec = SIM_CSMA_SYMBOLS_PER_SEC;
+int csmaBitsPerSymbol = SIM_CSMA_BITS_PER_SYMBOL;
+int csmaPreambleLength = SIM_CSMA_PREAMBLE_LENGTH;
+int csmaExponentBase = SIM_CSMA_EXPONENT_BASE;
+int csmaMaxIterations = SIM_CSMA_MAX_ITERATIONS;
+int csmaMinFreeSamples = SIM_CSMA_MIN_FREE_SAMPLES;
+int csmaRxTxDelay = SIM_CSMA_RXTX_DELAY;
+int csmaAckTime = SIM_CSMA_ACK_TIME;
+
+int sim_csma_init_high() __attribute__ ((C, spontaneous)) {
+  return csmaInitHigh;
+}
+int sim_csma_init_low() __attribute__ ((C, spontaneous)) {
+  return csmaInitLow;
+}
+int sim_csma_high() __attribute__ ((C, spontaneous)) {
+  return csmaHigh;
+}
+int sim_csma_low() __attribute__ ((C, spontaneous)) {
+  return csmaLow;
+}
+int sim_csma_symbols_per_sec() __attribute__ ((C, spontaneous)) {
+  return csmaSymbolsPerSec;
+}
+int sim_csma_bits_per_symbol() __attribute__ ((C, spontaneous)) {
+  return csmaBitsPerSymbol;
+}
+int sim_csma_preamble_length() __attribute__ ((C, spontaneous)) {
+  return csmaPreambleLength;
+}
+int sim_csma_exponent_base() __attribute__ ((C, spontaneous)) {
+  return csmaExponentBase;;
+}
+int sim_csma_max_iterations() __attribute__ ((C, spontaneous)) {
+  return csmaMaxIterations;
+}
+int sim_csma_min_free_samples() __attribute__ ((C, spontaneous)) {
+  return csmaMinFreeSamples;
+}
+int sim_csma_rxtx_delay() __attribute__ ((C, spontaneous)) {
+  return csmaRxTxDelay;
+}
+int sim_csma_ack_time() __attribute__ ((C, spontaneous)) {
+  return csmaAckTime;
+}
+
+
+
+void sim_csma_set_init_high(int val) __attribute__ ((C, spontaneous)) {
+  csmaInitHigh = val;
+}
+void sim_csma_set_init_low(int val) __attribute__ ((C, spontaneous)) {
+  csmaInitLow = val;
+}
+void sim_csma_set_high(int val) __attribute__ ((C, spontaneous)) {
+  csmaHigh = val;
+}
+void sim_csma_set_low(int val) __attribute__ ((C, spontaneous)) {
+  csmaLow = val;
+}
+void sim_csma_set_symbols_per_sec(int val) __attribute__ ((C, spontaneous)) {
+  csmaSymbolsPerSec = val;
+}
+void sim_csma_set_bits_per_symbol(int val) __attribute__ ((C, spontaneous)) {
+  csmaBitsPerSymbol = val;
+}
+void sim_csma_set_preamble_length(int val) __attribute__ ((C, spontaneous)) {
+  csmaPreambleLength = val;
+}
+void sim_csma_set_exponent_base(int val) __attribute__ ((C, spontaneous)) {
+  csmaExponentBase = val;
+}
+void sim_csma_set_max_iterations(int val) __attribute__ ((C, spontaneous)) {
+  csmaMaxIterations = val;
+}
+void sim_csma_set_min_free_samples(int val) __attribute__ ((C, spontaneous)) {
+  csmaMinFreeSamples = val;
+}
+void sim_csma_set_rxtx_delay(int val) __attribute__ ((C, spontaneous)) {
+  csmaRxTxDelay = val;
+}
+void sim_csma_set_ack_time(int val) __attribute__ ((C, spontaneous)) {
+  csmaAckTime = val;
+}
+
diff --git a/tos/lib/tossim/sim_csma.h b/tos/lib/tossim/sim_csma.h
new file mode 100644
index 00000000..b4fc413e
--- /dev/null
+++ b/tos/lib/tossim/sim_csma.h
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * Configuration parameters for a CSMA link.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+// $Id: sim_csma.h,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+#ifndef SIM_CSMA_H_INCLUDED
+#define SIM_CSMA_H_INCLUDED
+
+#ifndef SIM_CSMA_INIT_HIGH
+#define SIM_CSMA_INIT_HIGH 640
+#endif 
+
+#ifndef SIM_CSMA_INIT_LOW
+#define SIM_CSMA_INIT_LOW 20
+#endif
+
+#ifndef SIM_CSMA_HIGH
+#define SIM_CSMA_HIGH 160
+#endif
+
+#ifndef SIM_CSMA_LOW
+#define SIM_CSMA_LOW 20
+#endif
+
+#ifndef SIM_CSMA_SYMBOLS_PER_SEC
+#define SIM_CSMA_SYMBOLS_PER_SEC 65536
+#endif
+
+#ifndef SIM_CSMA_BITS_PER_SYMBOL
+#define SIM_CSMA_BITS_PER_SYMBOL 4
+#endif
+
+#ifndef SIM_CSMA_PREAMBLE_LENGTH
+#define SIM_CSMA_PREAMBLE_LENGTH 12
+#endif
+
+#ifndef SIM_CSMA_MAX_ITERATIONS
+#define SIM_CSMA_MAX_ITERATIONS 0
+#endif
+
+#ifndef SIM_CSMA_EXPONENT_BASE
+#define SIM_CSMA_EXPONENT_BASE 1
+#endif
+
+#ifndef SIM_CSMA_MIN_FREE_SAMPLES
+#define SIM_CSMA_MIN_FREE_SAMPLES 1
+#endif
+
+// 500 us ~= 32 symbols
+#ifndef SIM_CSMA_RXTX_DELAY 
+#define SIM_CSMA_RXTX_DELAY 11
+#endif
+
+// 12 symbol delay + 11 bytes length * (2 bytes/symbol) = 34 symbols
+#ifndef SIM_CSMA_ACK_TIME
+#define SIM_CSMA_ACK_TIME 34
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+  int sim_csma_init_high();
+  int sim_csma_init_low();
+  int sim_csma_high();
+  int sim_csma_low();
+  int sim_csma_symbols_per_sec();
+  int sim_csma_bits_per_symbol();
+  int sim_csma_preamble_length(); // in symbols
+  int sim_csma_exponent_base();
+  int sim_csma_max_iterations();
+  int sim_csma_min_free_samples();
+  int sim_csma_rxtx_delay();
+  int sim_csma_ack_time(); // in symbols
+  
+  void sim_csma_set_init_high(int val);
+  void sim_csma_set_init_low(int val);
+  void sim_csma_set_high(int val);
+  void sim_csma_set_low(int val);
+  void sim_csma_set_symbols_per_sec(int val);
+  void sim_csma_set_bits_per_symbol(int val);
+  void sim_csma_set_preamble_length(int val); // in symbols
+  void sim_csma_set_exponent_base(int val);
+  void sim_csma_set_max_iterations(int val);
+  void sim_csma_set_min_free_samples(int val);
+  void sim_csma_set_rxtx_delay(int val);
+  void sim_csma_set_ack_time(int val); // in symbols
+  
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_TOSSIM_H_INCLUDED
diff --git a/tos/lib/tossim/sim_event_queue.c b/tos/lib/tossim/sim_event_queue.c
new file mode 100644
index 00000000..f89b88f2
--- /dev/null
+++ b/tos/lib/tossim/sim_event_queue.c
@@ -0,0 +1,102 @@
+// $Id: sim_event_queue.c,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+/*
+* Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * The simple TOSSIM wrapper around the underlying heap.
+ *
+ * @author Phil Levis
+ * @date   November 22 2005
+ */
+
+
+#include <heap.h>
+#include <sim_event_queue.h>
+
+static heap_t eventHeap;
+
+void sim_queue_init() __attribute__ ((C, spontaneous)) {
+  init_heap(&eventHeap);
+}
+
+void sim_queue_insert(sim_event_t* event) __attribute__ ((C, spontaneous)) {
+  dbg("Queue", "Inserting 0x%p\n", event);
+  heap_insert(&eventHeap, event, event->time);
+}
+
+sim_event_t* sim_queue_pop() __attribute__ ((C, spontaneous)) {
+  long long int key;
+  return (sim_event_t*)(heap_pop_min_data(&eventHeap, &key));
+}
+
+bool sim_queue_is_empty() __attribute__ ((C, spontaneous)) {
+  return heap_is_empty(&eventHeap);
+}
+
+long long int sim_queue_peek_time() __attribute__ ((C, spontaneous)) {
+  if (heap_is_empty(&eventHeap)) {
+    return -1;
+  }
+  else {
+    return heap_get_min_key(&eventHeap);
+  }
+}
+
+
+void sim_queue_cleanup_none(sim_event_t* event) __attribute__ ((C, spontaneous)) {
+  dbg("Queue", "cleanup_none: 0x%p\n", event);
+  // Do nothing. Useful for statically allocated events.
+}
+
+void sim_queue_cleanup_event(sim_event_t* event) __attribute__ ((C, spontaneous)) {
+  dbg("Queue", "cleanup_event: 0x%p\n", event);
+  free(event);
+}
+
+void sim_queue_cleanup_data(sim_event_t* event) __attribute__ ((C, spontaneous)) {
+  dbg("Queue", "cleanup_data: 0x%p\n", event);
+  free (event->data);
+  event->data = NULL;
+}
+    
+void sim_queue_cleanup_total(sim_event_t* event) __attribute__ ((C, spontaneous)) {
+  dbg("Queue", "cleanup_total: 0x%p\n", event);
+  free (event->data);
+  event->data = NULL;
+  free (event);
+}
+
+sim_event_t* sim_queue_allocate_event() {
+  sim_event_t* evt = (sim_event_t*)malloc(sizeof(sim_event_t));
+  memset(evt, 0, sizeof(sim_event_t));
+  evt->mote = sim_node();
+  return evt;
+}
diff --git a/tos/lib/tossim/sim_event_queue.h b/tos/lib/tossim/sim_event_queue.h
new file mode 100644
index 00000000..f6b17138
--- /dev/null
+++ b/tos/lib/tossim/sim_event_queue.h
@@ -0,0 +1,79 @@
+// $Id: sim_event_queue.h,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+/*
+* Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * The event queue is the core of the mote side of TOSSIM. It is a
+ * wrapper around the underlying heap. Unlike the 1.x version, it is
+ * not re-entrant: merging the Python console and TOSSIM means that
+ * functionality like packet injection/reception from external tools
+ * is on the Python side.
+ *
+ * @author Phil Levis
+ * @date   November 22 2005
+ */
+
+
+#ifndef SIM_EVENT_QUEUE_H_INCLUDED
+#define SIM_EVENT_QUEUE_H_INCLUDED
+
+#include <sim_tossim.h>
+
+struct sim_event;
+typedef struct sim_event sim_event_t;
+
+struct sim_event {
+  sim_time_t time;
+  unsigned long  mote;
+  bool force; // Whether this event type should always be executed
+            // even if a mote is "turned off"
+  bool cancelled; // Whether this event has been cancelled
+  void* data;
+  
+  void (*handle)(sim_event_t* e);
+  void (*cleanup)(sim_event_t* e);
+};
+
+sim_event_t* sim_queue_allocate_event();
+
+void sim_queue_init();
+void sim_queue_insert(sim_event_t* event);
+bool sim_queue_is_empty();
+long long int sim_queue_peek_time();
+sim_event_t* sim_queue_pop();
+
+void sim_queue_cleanup_none(sim_event_t* e);
+void sim_queue_cleanup_event(sim_event_t* e);
+void sim_queue_cleanup_data(sim_event_t* e) ;
+void sim_queue_cleanup_total(sim_event_t* e);
+
+
+#endif // EVENT_QUEUE_H_INCLUDED
diff --git a/tos/lib/tossim/sim_gain.c b/tos/lib/tossim/sim_gain.c
new file mode 100644
index 00000000..1d3ad795
--- /dev/null
+++ b/tos/lib/tossim/sim_gain.c
@@ -0,0 +1,179 @@
+#include <sim_gain.h>
+
+typedef struct sim_gain_noise {
+  double mean;
+  double range;
+} sim_gain_noise_t;
+
+
+gain_entry_t* connectivity[TOSSIM_MAX_NODES + 1];
+sim_gain_noise_t localNoise[TOSSIM_MAX_NODES + 1];
+double sensitivity = 4.0;
+
+gain_entry_t* sim_gain_allocate_link(int mote);
+void sim_gain_deallocate_link(gain_entry_t* linkToDelete);
+
+gain_entry_t* sim_gain_first(int src) __attribute__ ((C, spontaneous)) {
+  if (src > TOSSIM_MAX_NODES) {
+    return connectivity[TOSSIM_MAX_NODES];
+  } 
+  return connectivity[src];
+}
+
+gain_entry_t* sim_gain_next(gain_entry_t* currentLink) __attribute__ ((C, spontaneous)) {
+  return currentLink->next;
+}
+
+void sim_gain_add(int src, int dest, double gain) __attribute__ ((C, spontaneous))  {
+  gain_entry_t* current;
+  int temp = sim_node();
+  if (src > TOSSIM_MAX_NODES) {
+    src = TOSSIM_MAX_NODES;
+  }
+  sim_set_node(src);
+
+  current = sim_gain_first(src);
+  while (current != NULL) {
+    if (current->mote == dest) {
+      sim_set_node(temp);
+      break;
+    }
+    current = current->next;
+  }
+
+  if (current == NULL) {
+    current = sim_gain_allocate_link(dest);
+    current->next = connectivity[src];
+    connectivity[src] = current;
+  }
+  current->mote = dest;
+  current->gain = gain;
+  dbg("Gain", "Adding link from %i to %i with gain %f\n", src, dest, gain);
+  sim_set_node(temp);
+}
+
+double sim_gain_value(int src, int dest) __attribute__ ((C, spontaneous))  {
+  gain_entry_t* current;
+  int temp = sim_node();
+  sim_set_node(src);
+  current = sim_gain_first(src);
+  while (current != NULL) {
+    if (current->mote == dest) {
+      sim_set_node(temp);
+      dbg("Gain", "Getting link from %i to %i with gain %f\n", src, dest, current->gain);
+      return current->gain;
+    }
+    current = current->next;
+  }
+  sim_set_node(temp);
+  dbg("Gain", "Getting default link from %i to %i with gain %f\n", src, dest, 1.0);
+  return 1.0;
+}
+
+bool sim_gain_connected(int src, int dest) __attribute__ ((C, spontaneous)) {
+  gain_entry_t* current;
+  int temp = sim_node();
+  sim_set_node(src);
+  current = sim_gain_first(src);
+  while (current != NULL) {
+    if (current->mote == dest) {
+      sim_set_node(temp);
+      return TRUE;
+    }
+    current = current->next;
+  }
+  sim_set_node(temp);
+  return FALSE;
+}
+  
+void sim_gain_remove(int src, int dest) __attribute__ ((C, spontaneous))  {
+  gain_entry_t* current;
+  gain_entry_t* prevLink;
+  int temp = sim_node();
+  
+  if (src > TOSSIM_MAX_NODES) {
+    src = TOSSIM_MAX_NODES;
+  }
+
+  sim_set_node(src);
+    
+  current = sim_gain_first(src);
+  prevLink = NULL;
+    
+  while (current != NULL) {
+    gain_entry_t* tmp;
+    if (current->mote == dest) {
+      if (prevLink == NULL) {
+	connectivity[src] = current->next;
+      }
+      else {
+	prevLink->next = current->next;
+      }
+      tmp = current->next;
+      sim_gain_deallocate_link(current);
+      current = tmp;
+    }
+    else {
+      prevLink = current;
+      current = current->next;
+    }
+  }
+  sim_set_node(temp);
+}
+
+void sim_gain_set_noise_floor(int node, double mean, double range) __attribute__ ((C, spontaneous))  {
+  if (node > TOSSIM_MAX_NODES) {
+    node = TOSSIM_MAX_NODES;
+  }
+  localNoise[node].mean = mean;
+  localNoise[node].range = range;
+}
+
+double sim_gain_noise_mean(int node) {
+  if (node > TOSSIM_MAX_NODES) {
+    node = TOSSIM_MAX_NODES;
+  }
+  return localNoise[node].mean;
+}
+
+double sim_gain_noise_range(int node) {
+  if (node > TOSSIM_MAX_NODES) {
+    node = TOSSIM_MAX_NODES;
+  }
+  return localNoise[node].range;
+}
+
+// Pick a number a number from the uniform distribution of
+// [mean-range, mean+range].
+double sim_gain_sample_noise(int node)  __attribute__ ((C, spontaneous)) {
+  double val, adjust;
+  if (node > TOSSIM_MAX_NODES) {
+    node = TOSSIM_MAX_NODES;
+  } 
+  val = localNoise[node].mean;
+  adjust = (sim_random() % 2000000);
+  adjust /= 1000000.0;
+  adjust -= 1.0;
+  adjust *= localNoise[node].range;
+  return val + adjust;
+}
+
+gain_entry_t* sim_gain_allocate_link(int mote) {
+  gain_entry_t* newLink = (gain_entry_t*)malloc(sizeof(gain_entry_t));
+  newLink->next = NULL;
+  newLink->mote = mote;
+  newLink->gain = -10000000.0;
+  return newLink;
+}
+
+void sim_gain_deallocate_link(gain_entry_t* linkToDelete) __attribute__ ((C, spontaneous)) {
+  free(linkToDelete);
+}
+
+void sim_gain_set_sensitivity(double s) __attribute__ ((C, spontaneous)) {
+  sensitivity = s;
+}
+
+double sim_gain_sensitivity() __attribute__ ((C, spontaneous)) {
+  return sensitivity;
+}
diff --git a/tos/lib/tossim/sim_gain.h b/tos/lib/tossim/sim_gain.h
new file mode 100644
index 00000000..3d5633bc
--- /dev/null
+++ b/tos/lib/tossim/sim_gain.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The C functions that allow TOSSIM-side code to access the SimMoteP
+ * component.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+
+// $Id: sim_gain.h,v 1.5 2010-06-29 22:07:51 scipio Exp $
+
+
+
+#ifndef SIM_GAIN_H_INCLUDED
+#define SIM_GAIN_H_INCLUDED
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct gain_entry {
+  int mote;
+  double gain;
+  struct gain_entry* next;  
+} gain_entry_t;
+  
+void sim_gain_add(int src, int dest, double gain);
+double sim_gain_value(int src, int dest);
+bool sim_gain_connected(int src, int dest);
+void sim_gain_remove(int src, int dest);
+void sim_gain_set_noise_floor(int node, double mean, double range);
+double sim_gain_sample_noise(int node);
+double sim_gain_noise_mean(int node);
+double sim_gain_noise_range(int node);
+
+void sim_gain_set_sensitivity(double value);
+double sim_gain_sensitivity();
+  
+gain_entry_t* sim_gain_first(int src);
+gain_entry_t* sim_gain_next(gain_entry_t* e);
+  
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_GAIN_H_INCLUDED
diff --git a/tos/lib/tossim/sim_log.c b/tos/lib/tossim/sim_log.c
new file mode 100644
index 00000000..88df1f7b
--- /dev/null
+++ b/tos/lib/tossim/sim_log.c
@@ -0,0 +1,319 @@
+// $Id: sim_log.c,v 1.7 2010-06-29 22:07:51 scipio Exp $
+
+/*
+* Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM logging system.
+ *
+ * @author Phil Levis
+ * @date   November 9 2005
+ */
+
+#include <sim_log.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include <hashtable.h>
+#include <string.h>
+
+enum {
+  DEFAULT_CHANNEL_SIZE = 8
+};
+
+typedef struct sim_log_output {
+  int num;
+  FILE** files;
+} sim_log_output_t;
+
+typedef struct sim_log_channel {
+  const char* name;
+  int numOutputs;
+  int size;
+  FILE** outputs;
+} sim_log_channel_t;
+
+enum {
+  SIM_LOG_OUTPUT_COUNT = uniqueCount("TOSSIM.debug")
+};
+
+sim_log_output_t outputs[SIM_LOG_OUTPUT_COUNT];
+struct hashtable* channelTable = NULL;
+
+
+static unsigned int sim_log_hash(void* key);
+static int sim_log_eq(void* key1, void* key2);
+
+
+// First we count how many outputs there are,
+// then allocate a FILE** large enough and fill it in.
+// This FILE** might be larger than needed, because
+// the outputs of the channels might have redundancies.
+// E.g., if two channels A and B are both to stdout, then
+// you don't want a channel of "A,B" to be doubly printed
+// to stdout. So when the channel's FILE*s are copied
+// into the debug point output array, this checks
+// for redundancies by checking file descriptors.
+static void fillInOutput(int id, char* name) {
+  char* termination = name;
+  char* namePos = name;
+  int count = 0;
+  char* newName = (char*)malloc(strlen(name) + 1);
+  memset(newName, 0, strlen(name) + 1);
+  // Count the outputs
+  while (termination != NULL) {
+    sim_log_channel_t* channel;
+    
+    termination = strrchr(namePos, ',');
+    // If we've reached the end, just copy to the end
+    if (termination == NULL) {
+      strcpy(newName, namePos);
+    }
+    // Otherwise, memcpy over and null terminate
+    else {
+      memcpy(newName, namePos, (termination - namePos));
+      newName[termination - namePos] = 0;
+    }
+    
+    channel = hashtable_search(channelTable, newName);
+    if (channel != NULL) {
+      count += channel->numOutputs;
+    }
+
+    namePos = termination + 1;
+  }
+
+  termination = name;
+  namePos = name;
+  
+  // Allocate
+  outputs[id].files = (FILE**)malloc(sizeof(FILE*) * count);
+  outputs[id].num = 0;
+
+  // Fill it in
+  while (termination != NULL) {
+    sim_log_channel_t* channel;
+    
+    termination = strrchr(namePos, ',');
+    // If we've reached the end, just copy to the end
+    if (termination == NULL) {
+      strcpy(newName, namePos);
+    }
+    // Otherwise, memcpy over and null terminate
+    else {
+      memcpy(newName, namePos, (termination - namePos));
+      newName[termination - namePos] = 0;
+    }
+    
+    channel = hashtable_search(channelTable, newName);
+    if (channel != NULL) {
+      int i, j;
+      for (i = 0; i < channel->numOutputs; i++) {
+	int duplicate = 0;
+	int outputCount = outputs[id].num;
+	// Check if we already have this file descriptor in the output
+	// set, and if so, ignore it.
+	for (j = 0; j < outputCount; j++) {
+	  if (fileno(outputs[id].files[j]) == fileno(channel->outputs[i])) {
+	    duplicate = 1;
+	    j = outputCount;
+	  }
+	}
+	if (!duplicate) {
+	  outputs[id].files[outputCount] = channel->outputs[i];
+	  outputs[id].num++;
+	}
+      }
+    }
+    namePos = termination + 1;
+  }
+}
+
+void sim_log_init() {
+  int i;
+
+  channelTable = create_hashtable(128, sim_log_hash, sim_log_eq);
+  
+  for (i = 0; i < SIM_LOG_OUTPUT_COUNT; i++) {
+    outputs[i].num = 1;
+    outputs[i].files = (FILE**)malloc(sizeof(FILE*));
+    outputs[i].files[0] = fdopen(1, "w"); // STDOUT
+  }
+  
+}
+
+void sim_log_add_channel(char* name, FILE* file) {
+  sim_log_channel_t* channel;
+  channel = (sim_log_channel_t*)hashtable_search(channelTable, name);
+  
+  // If there's no current entry, allocate one, initialize it,
+  // and insert it.
+  if (channel == NULL) {
+    char* newName = (char*)malloc(strlen(name) + 1);
+    strcpy(newName, name);
+    newName[strlen(name)] = 0;
+    
+    channel = (sim_log_channel_t*)malloc(sizeof(sim_log_channel_t));
+    channel->name = newName;
+    channel->numOutputs = 0;
+    channel->size = DEFAULT_CHANNEL_SIZE;
+    channel->outputs = (FILE**)malloc(sizeof(FILE*) * channel->size);
+    memset(channel->outputs, 0, sizeof(FILE*) * channel->size);
+    hashtable_insert(channelTable, newName, channel);
+  }
+
+  // If the channel output table is full, double the size of
+  // channel->outputs.
+  if (channel->numOutputs == channel->size) {
+    FILE** newOutputs;
+    int newSize = channel->size * 2;
+    
+    newOutputs = (FILE**)malloc(sizeof(FILE*) * newSize);
+    memcpy(newOutputs, channel->outputs, channel->size * sizeof(FILE**));
+
+    free(channel->outputs);
+
+    channel->outputs = newOutputs;
+    channel->size    = newSize;
+  }
+
+  channel->outputs[channel->numOutputs] = file;
+  channel->numOutputs++;
+  sim_log_commit_change();
+}
+
+bool sim_log_remove_channel(char* output, FILE* file) {
+  sim_log_channel_t* channel;
+  int i;
+  channel = (sim_log_channel_t*)hashtable_search(channelTable, output);  
+
+  if (channel == NULL) {
+    return FALSE;
+  }
+
+  // Note: if a FILE* has duplicates, this removes all of them
+  for (i = 0; i < channel->numOutputs; i++) {
+    FILE* f = channel->outputs[i];
+    if (file == f) {
+      memcpy(&channel->outputs[i], &channel->outputs[i + 1], (channel->numOutputs) - (i + 1));
+      channel->outputs[channel->numOutputs - 1] = NULL;
+      channel->numOutputs--;
+    }
+  }
+  
+  return TRUE;
+}
+  
+void sim_log_commit_change() {
+  int i;
+  for (i = 0; i < SIM_LOG_OUTPUT_COUNT; i++) {
+    if (outputs[i].files != NULL) {
+      outputs[i].num = 0;
+      free(outputs[i].files);
+      outputs[i].files = NULL;
+    }
+  }
+}
+
+
+void sim_log_debug(uint16_t id, char* string, const char* format, ...) {
+  va_list args;
+  int i;
+  if (outputs[id].files == NULL) {
+    fillInOutput(id, string);
+  }
+  for (i = 0; i < outputs[id].num; i++) {
+    FILE* file = outputs[id].files[i];
+    va_start(args, format);
+    fprintf(file, "DEBUG (%i): ", (int)sim_node());
+    vfprintf(file, format, args); 
+    fflush(file);
+  }
+}
+
+void sim_log_error(uint16_t id, char* string, const char* format, ...) {
+  va_list args;
+  int i;
+  if (outputs[id].files == NULL) {
+    fillInOutput(id, string);
+  }
+  for (i = 0; i < outputs[id].num; i++) {
+    FILE* file = outputs[id].files[i];
+    va_start(args, format);
+    fprintf(file, "ERROR (%i): ", (int)sim_node());
+    vfprintf(file, format, args);
+    fflush(file);
+  }
+}
+
+void sim_log_debug_clear(uint16_t id, char* string, const char* format, ...) {
+  va_list args;
+  int i;
+  if (outputs[id].files == NULL) {
+    fillInOutput(id, string);
+  }
+  for (i = 0; i < outputs[id].num; i++) {
+    FILE* file = outputs[id].files[i];
+    va_start(args, format);
+    vfprintf(file, format, args);
+    fflush(file);
+  }
+}
+
+void sim_log_error_clear(uint16_t id, char* string, const char* format, ...) {
+  va_list args;
+  int i;
+  if (outputs[id].files == NULL) {
+    fillInOutput(id, string);
+  }
+  for (i = 0; i < outputs[id].num; i++) {
+    FILE* file = outputs[id].files[i];
+    va_start(args, format);
+    vfprintf(file, format, args);
+    fflush(file);
+  }
+}
+
+/* This is the sdbm algorithm, taken from
+   http://www.cs.yorku.ca/~oz/hash.html -pal */
+static unsigned int sim_log_hash(void* key) {
+  char* str = (char*)key;
+  unsigned int hashVal = 0;
+  int hashChar;
+  
+  while ((hashChar = *str++))
+    hashVal = hashChar + (hashVal << 6) + (hashVal << 16) - hashVal;
+  
+  return hashVal;
+}
+
+static int sim_log_eq(void* key1, void* key2) {
+  return strcmp((char*)key1, (char*)key2) == 0;
+}
diff --git a/tos/lib/tossim/sim_log.h b/tos/lib/tossim/sim_log.h
new file mode 100644
index 00000000..939038ff
--- /dev/null
+++ b/tos/lib/tossim/sim_log.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM logging system. Unlike in TinyOS 1.x, this logging
+ * system supports an arbitrary number of channels, denoted by
+ * a string identifier. A channel can be connected to any number
+ * of outputs, and a debug statement can be associated with any
+ * number of channels.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id: sim_log.h,v 1.5 2010-06-29 22:07:51 scipio Exp $
+
+
+#ifndef SIM_LOG_H_INCLUDED
+#define SIM_LOG_H_INCLUDED
+
+#ifndef TOSSIM_NO_DEBUG
+#define dbg(s, ...) sim_log_debug(unique("TOSSIM.debug"), s, __VA_ARGS__)
+#define dbg_clear(s, ...) sim_log_debug_clear(unique("TOSSIM.debug"), s, __VA_ARGS__)
+#define dbgerror(s, ...) sim_log_error(unique("TOSSIM.debug"), s, __VA_ARGS__)
+#define dbgerror_clear(s, ...) sim_log_error_clear(unique("TOSSIM.debug"), s, __VA_ARGS__)
+#else
+#define dbg(s, ...)
+#define dbg_clear(s, ...)
+#define dbgerror(s, ...)
+#define dbgerror_clear(s, ...)
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void sim_log_init();
+void sim_log_add_channel(char* output, FILE* file);
+bool sim_log_remove_channel(char* output, FILE* file);
+void sim_log_commit_change();
+
+void sim_log_debug(uint16_t id, char* string, const char* format, ...);
+void sim_log_error(uint16_t id, char* string, const char* format, ...);
+void sim_log_debug_clear(uint16_t id, char* string, const char* format, ...);
+void sim_log_error_clear(uint16_t id, char* string, const char* format, ...);
+
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_LOG_H_INCLUDED
diff --git a/tos/lib/tossim/sim_mac.c b/tos/lib/tossim/sim_mac.c
new file mode 100644
index 00000000..d29e0e98
--- /dev/null
+++ b/tos/lib/tossim/sim_mac.c
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * This file is where you change which MAC and radio models TOSSIM
+ * incorporates.
+ *
+ * @author Philip Levis
+ * @date   Dec 10 2005
+ */
+
+#include <sim_csma.c>
+#include <sim_gain.c>
+
+//Added by HyungJune Lee
+#include <randomlib.c>
+#include <sim_noise.c>
+
diff --git a/tos/lib/tossim/sim_mote.h b/tos/lib/tossim/sim_mote.h
new file mode 100644
index 00000000..50f17fb2
--- /dev/null
+++ b/tos/lib/tossim/sim_mote.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The C functions that allow TOSSIM-side code to access the SimMoteP
+ * component.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+
+// $Id: sim_mote.h,v 1.5 2010-06-29 22:07:51 scipio Exp $
+
+
+
+#ifndef SIM_MOTE_H_INCLUDED
+#define SIM_MOTE_H_INCLUDED
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+long long int sim_mote_euid(int mote);
+void sim_mote_set_euid(int mote, long long int euid);
+
+long long int sim_mote_start_time(int mote);
+void sim_mote_set_start_time(int mote, long long int t);
+
+bool sim_mote_is_on(int mote);
+void sim_mote_turn_on(int mote);
+void sim_mote_turn_off(int mote);
+int sim_mote_get_variable_info(int mote, char* name, void** addr, size_t* len);
+void sim_mote_enqueue_boot_event(int mote);
+
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_MOTE_H_INCLUDED
diff --git a/tos/lib/tossim/sim_noise.c b/tos/lib/tossim/sim_noise.c
new file mode 100644
index 00000000..79c94103
--- /dev/null
+++ b/tos/lib/tossim/sim_noise.c
@@ -0,0 +1,436 @@
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of all of the Hash-Based Learning primitives and utility
+ * functions.
+ *
+ * @author Hyungjune Lee
+ * @date   Oct 13 2006
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <math.h>
+#include <sys/time.h>
+#include <time.h>
+#include "randomlib.h"
+#include "hashtable.h"
+#include "sim_noise.h"
+
+//Tal Debug, to count how often simulation hits the one match case
+int numCase1 = 0;
+int numCase2 = 0;
+int numTotal = 0;
+//End Tal Debug
+
+uint32_t FreqKeyNum = 0;
+
+sim_noise_node_t noiseData[TOSSIM_MAX_NODES];
+
+static unsigned int sim_noise_hash(void *key);
+static int sim_noise_eq(void *key1, void *key2);
+
+void makeNoiseModel(uint16_t node_id);
+void makePmfDistr(uint16_t node_id);
+uint8_t search_bin_num(char noise);
+
+void sim_noise_init()__attribute__ ((C, spontaneous))
+{
+  int j;
+  
+  //printf("Starting\n");
+  
+  for (j=0; j< TOSSIM_MAX_NODES; j++) {
+    noiseData[j].noiseTable = create_hashtable(NOISE_HASHTABLE_SIZE, sim_noise_hash, sim_noise_eq);
+    noiseData[j].noiseGenTime = 0;
+    noiseData[j].noiseTrace = (char*)(malloc(sizeof(char) * NOISE_MIN_TRACE));
+    noiseData[j].noiseTraceLen = NOISE_MIN_TRACE;
+    noiseData[j].noiseTraceIndex = 0;
+
+  }
+  //printf("Done with sim_noise_init()\n");
+}
+
+void sim_noise_create_model(uint16_t node_id)__attribute__ ((C, spontaneous)) {
+  makeNoiseModel(node_id);
+  makePmfDistr(node_id);
+}
+
+char sim_real_noise(uint16_t node_id, uint32_t cur_t) {
+  if (cur_t > noiseData[node_id].noiseTraceLen) {
+    dbg("Noise", "Asked for noise element %u when there are only %u.\n", cur_t, noiseData[node_id].noiseTraceIndex);
+    return 0;
+  }
+  return noiseData[node_id].noiseTrace[cur_t];
+}
+
+void sim_noise_trace_add(uint16_t node_id, char noiseVal)__attribute__ ((C, spontaneous)) {
+  // Need to double size of trace arra
+  if (noiseData[node_id].noiseTraceIndex ==
+      noiseData[node_id].noiseTraceLen) {
+    char* data = (char*)(malloc(sizeof(char) * noiseData[node_id].noiseTraceLen * 2));
+    memcpy(data, noiseData[node_id].noiseTrace, noiseData[node_id].noiseTraceLen);
+    free(noiseData[node_id].noiseTrace);
+    noiseData[node_id].noiseTraceLen *= 2;
+    noiseData[node_id].noiseTrace = data;
+  }
+  noiseData[node_id].noiseTrace[noiseData[node_id].noiseTraceIndex] = noiseVal;
+  noiseData[node_id].noiseTraceIndex++;
+  dbg("Insert", "Adding noise value %i for %i of %i\n", (int)noiseData[node_id].noiseTraceIndex, (int)node_id, (int)noiseVal);
+}
+
+
+uint8_t search_bin_num(char noise)__attribute__ ((C, spontaneous))
+{
+  uint8_t bin;
+  if (noise > NOISE_MAX || noise < NOISE_MIN) {
+    noise = NOISE_MIN;
+  }
+  bin = (noise-NOISE_MIN)/NOISE_QUANTIZE_INTERVAL + 1;
+  return bin;
+}
+
+char search_noise_from_bin_num(int i)__attribute__ ((C, spontaneous))
+{
+  char noise;
+  noise = NOISE_MIN + (i-1)*NOISE_QUANTIZE_INTERVAL;
+  return noise;
+}
+
+static unsigned int sim_noise_hash(void *key) {
+  char *pt = (char *)key;
+  unsigned int hashVal = 0;
+  int i;
+  for (i=0; i< NOISE_HISTORY; i++) {
+    hashVal = pt[i] + (hashVal << 6) + (hashVal << 16) - hashVal;
+  }
+  return hashVal;
+}
+
+static int sim_noise_eq(void *key1, void *key2) {
+  return (memcmp((void *)key1, (void *)key2, NOISE_HISTORY) == 0);
+}
+
+void sim_noise_add(uint16_t node_id, char noise)__attribute__ ((C, spontaneous))
+{
+  int i;
+  struct hashtable *pnoiseTable = noiseData[node_id].noiseTable;
+  char *key = noiseData[node_id].key;
+  sim_noise_hash_t *noise_hash;
+  noise_hash = (sim_noise_hash_t *)hashtable_search(pnoiseTable, key);
+  dbg("Insert", "Adding noise value %hhi\n", noise);
+  if (noise_hash == NULL)	{
+    noise_hash = (sim_noise_hash_t *)malloc(sizeof(sim_noise_hash_t));
+    memcpy((void *)(noise_hash->key), (void *)key, NOISE_HISTORY);
+    
+    noise_hash->numElements = 0;
+    noise_hash->size = NOISE_DEFAULT_ELEMENT_SIZE;
+    noise_hash->elements = (char *)malloc(sizeof(char)*noise_hash->size);
+    memset((void *)noise_hash->elements, 0, sizeof(char)*noise_hash->size);
+
+    noise_hash->flag = 0;
+    for(i=0; i<NOISE_NUM_VALUES; i++) {
+	noise_hash->dist[i] = 0;
+    }
+    hashtable_insert(pnoiseTable, key, noise_hash);
+    dbg("Insert", "Inserting %p into table %p with key ", noise_hash, pnoiseTable);
+    {
+      int ctr;
+      for(ctr = 0; ctr < NOISE_HISTORY; ctr++)
+	dbg_clear("Insert", "%0.3hhi ", key[ctr]);
+    }
+    dbg_clear("Insert", "\n");
+  }
+
+  if (noise_hash->numElements == noise_hash->size)
+    {
+      char *newElements;
+      int newSize = (noise_hash->size)*2;
+
+      newElements = (char *)malloc(sizeof(char)*newSize);
+      memcpy(newElements, noise_hash->elements, noise_hash->size);
+      free(noise_hash->elements);
+      noise_hash->elements = newElements;
+      noise_hash->size = newSize;
+    }
+
+  noise_hash->elements[noise_hash->numElements] = noise;
+//  printf("I hear noise %i\n", noise);
+  noise_hash->numElements++;
+}
+
+void sim_noise_dist(uint16_t node_id)__attribute__ ((C, spontaneous))
+{
+  int i;
+  uint8_t bin;
+  float cmf = 0;
+  struct hashtable *pnoiseTable = noiseData[node_id].noiseTable;
+  char *key = noiseData[node_id].key;
+  char *freqKey = noiseData[node_id].freqKey;
+  sim_noise_hash_t *noise_hash;
+  noise_hash = (sim_noise_hash_t *)hashtable_search(pnoiseTable, key);
+
+//  noise_hash->flag;
+
+  if (noise_hash->flag == 1)
+    return;
+
+  for (i=0; i < NOISE_NUM_VALUES; i++) {
+    noise_hash->dist[i] = 0.0;
+  }
+  
+  for (i=0; i< noise_hash->numElements; i++)
+    {
+      float val;
+      dbg("Noise_output", "Noise is found to be %i\n", noise_hash->elements[i]);
+      bin = noise_hash->elements[i] - NOISE_MIN_QUANTIZE; //search_bin_num(noise_hash->elements[i]) - 1;
+//      printf("Bin %i, Noise %i\n", bin, (NOISE_MIN_QUANTIZE + bin));
+      val = noise_hash->dist[bin];
+      val += (float)1.0;
+      noise_hash->dist[bin] = val;
+    }
+
+  for (i=0; i < NOISE_NUM_VALUES ; i++)
+    {
+      noise_hash->dist[i] = (noise_hash->dist[i])/(noise_hash->numElements);
+      cmf += noise_hash->dist[i];
+      noise_hash->dist[i] = cmf;
+    }
+  noise_hash->flag = 1;
+
+  //Find the most frequent key and store it in noiseData[node_id].freqKey[].
+  if (noise_hash->numElements > FreqKeyNum)
+    {
+      int j;
+      FreqKeyNum = noise_hash->numElements;
+      memcpy((void *)freqKey, (void *)key, NOISE_HISTORY);
+      dbg("HashZeroDebug", "Setting most frequent key (%i): ", (int) FreqKeyNum);
+      for (j = 0; j < NOISE_HISTORY; j++) {
+	dbg_clear("HashZeroDebug", "[%hhu] ", key[j]);
+      }
+      dbg_clear("HashZeroDebug", "\n");
+    }
+}
+
+void arrangeKey(uint16_t node_id)__attribute__ ((C, spontaneous))
+{
+  char *pKey = noiseData[node_id].key;
+  memcpy(pKey, pKey+1, NOISE_HISTORY-1);
+
+}
+
+/*
+ * After makeNoiseModel() is done, make PMF distribution for each bin.
+ */
+void makePmfDistr(uint16_t node_id)__attribute__ ((C, spontaneous))
+{
+  int i;
+  char *pKey = noiseData[node_id].key;
+  char *fKey = noiseData[node_id].freqKey;
+
+  FreqKeyNum = 0;
+  for(i=0; i<NOISE_HISTORY; i++) {
+    pKey[i] = /* noiseData[node_id].noiseTrace[i]; // */ search_bin_num(noiseData[node_id].noiseTrace[i]);
+  }
+
+  for(i = NOISE_HISTORY; i < noiseData[node_id].noiseTraceIndex; i++) {
+    if (i == NOISE_HISTORY) {
+      //printf("Inserting first element.\n");
+    }
+    sim_noise_dist(node_id);
+    arrangeKey(node_id);
+    pKey[NOISE_HISTORY-1] =  search_bin_num(noiseData[node_id].noiseTrace[i]);
+  }
+
+  dbg_clear("HASH", "FreqKey = ");
+  for (i=0; i< NOISE_HISTORY ; i++)
+    {
+      dbg_clear("HASH", "%d,", fKey[i]);
+    }
+  dbg_clear("HASH", "\n");
+}
+
+int dummy;
+void sim_noise_alarm() {
+  dummy = 5;
+}
+
+char sim_noise_gen(uint16_t node_id)__attribute__ ((C, spontaneous))
+{
+  int i;
+  int noiseIndex = 0;
+  char noise;
+  struct hashtable *pnoiseTable = noiseData[node_id].noiseTable;
+  char *pKey = noiseData[node_id].key;
+  char *fKey = noiseData[node_id].freqKey;
+  double ranNum = RandomUniform();
+  sim_noise_hash_t *noise_hash;
+  noise_hash = (sim_noise_hash_t *)hashtable_search(pnoiseTable, pKey);
+
+  if (noise_hash == NULL) {
+    //Tal Debug
+    dbg("Noise_c", "Did not pattern match");
+    //End Tal Debug
+    sim_noise_alarm();
+    noise = 0;
+    dbg_clear("HASH", "(N)Noise\n");
+    dbg("HashZeroDebug", "Defaulting to common hash.\n");
+    memcpy((void *)pKey, (void *)fKey, NOISE_HISTORY);
+    noise_hash = (sim_noise_hash_t *)hashtable_search(pnoiseTable, pKey);
+  }
+  
+  dbg_clear("HASH", "Key = ");
+  for (i=0; i< NOISE_HISTORY ; i++) {
+    dbg_clear("HASH", "%d,", pKey[i]);
+  }
+  dbg_clear("HASH", "\n");
+  
+  dbg("HASH", "Printing Key\n");
+  dbg("HASH", "noise_hash->numElements=%d\n", noise_hash->numElements);
+  
+  //Tal Debug
+  numTotal++;
+  //End Tal Debug
+
+  if (noise_hash->numElements == 1) {
+    noise = noise_hash->elements[0];
+    dbg_clear("HASH", "(E)Noise = %d\n", noise);
+    //Tal Debug
+    numCase1++;
+    dbg("Noise_c", "In case 1: %i of %i\n", numCase1, numTotal);
+    //End Tal Debug
+    dbg("NoiseAudit", "Noise: %i\n", noise);
+    return noise;
+  }
+
+  //Tal Debug
+  numCase2++;
+  dbg("Noise_c", "In case 2: %i of %i\n", numCase2, numTotal);
+  //End Tal Debug
+ 
+  for (i = 0; i < NOISE_NUM_VALUES - 1; i++) {
+    dbg("HASH", "IN:for i=%d\n", i);
+    if (i == 0) {	
+      if (ranNum <= noise_hash->dist[i]) {
+	noiseIndex = i;
+	dbg_clear("HASH", "Selected Bin = %d -> ", i+1);
+	break;
+      }
+    }
+    else if ( (noise_hash->dist[i-1] < ranNum) && 
+	      (ranNum <= noise_hash->dist[i])   ) {
+      noiseIndex = i;
+      dbg_clear("HASH", "Selected Bin = %d -> ", i+1);
+      break;
+    }
+  }
+  dbg("HASH", "OUT:for i=%d\n", i);
+  
+  noise = NOISE_MIN_QUANTIZE + i; //TODO search_noise_from_bin_num(i+1);
+  dbg("NoiseAudit", "Noise: %i\n", noise);		
+  return noise;
+}
+
+char sim_noise_generate(uint16_t node_id, uint32_t cur_t)__attribute__ ((C, spontaneous)) {
+  uint32_t i;
+  uint32_t prev_t;
+  uint32_t delta_t;
+  char *noiseG;
+  char noise;
+
+  prev_t = noiseData[node_id].noiseGenTime;
+
+  if (noiseData[node_id].generated == 0) {
+    dbgerror("TOSSIM", "Tried to generate noise from an uninitialized radio model of node %hu.\n", node_id);
+    return 127;
+  }
+  
+  if ( (0<= cur_t) && (cur_t < NOISE_HISTORY) ) {
+    noiseData[node_id].noiseGenTime = cur_t;
+    noiseData[node_id].key[cur_t] = search_bin_num(noiseData[node_id].noiseTrace[cur_t]);
+    noiseData[node_id].lastNoiseVal = noiseData[node_id].noiseTrace[cur_t];
+    return noiseData[node_id].noiseTrace[cur_t];
+  }
+
+  if (prev_t == 0)
+    delta_t = cur_t - (NOISE_HISTORY-1);
+  else
+    delta_t = cur_t - prev_t;
+  
+  dbg_clear("HASH", "delta_t = %d\n", delta_t);
+  
+  if (delta_t == 0)
+    noise = noiseData[node_id].lastNoiseVal;
+  else {
+    noiseG = (char *)malloc(sizeof(char)*delta_t);
+    
+    for(i=0; i< delta_t; i++) {
+      noiseG[i] = sim_noise_gen(node_id);
+      arrangeKey(node_id);
+      noiseData[node_id].key[NOISE_HISTORY-1] = search_bin_num(noiseG[i]);
+    }
+    noise = noiseG[delta_t-1];
+    noiseData[node_id].lastNoiseVal = noise;
+    
+    free(noiseG);
+  }
+  noiseData[node_id].noiseGenTime = cur_t;
+  if (noise == 0) {
+    dbg("HashZeroDebug", "Generated noise of zero.\n");
+  }
+//  printf("%i\n", noise);
+  return noise;
+}
+
+/* 
+ * When initialization process is going on, make noise model by putting
+ * experimental noise values.
+ */
+void makeNoiseModel(uint16_t node_id)__attribute__ ((C, spontaneous)) {
+  int i;
+  for(i=0; i<NOISE_HISTORY; i++) {
+    noiseData[node_id].key[i] = search_bin_num(noiseData[node_id].noiseTrace[i]);
+    dbg("Insert", "Setting history %i to be %i\n", (int)i, (int)noiseData[node_id].key[i]);
+  }
+  
+  //sim_noise_add(node_id, noiseData[node_id].noiseTrace[NOISE_HISTORY]);
+  //arrangeKey(node_id);
+  
+  for(i = NOISE_HISTORY; i < noiseData[node_id].noiseTraceIndex; i++) {
+    sim_noise_add(node_id, noiseData[node_id].noiseTrace[i]);
+    arrangeKey(node_id);
+    noiseData[node_id].key[NOISE_HISTORY-1] = search_bin_num(noiseData[node_id].noiseTrace[i]);
+  }
+  noiseData[node_id].generated = 1;
+}
+
diff --git a/tos/lib/tossim/sim_noise.h b/tos/lib/tossim/sim_noise.h
new file mode 100644
index 00000000..3de6155e
--- /dev/null
+++ b/tos/lib/tossim/sim_noise.h
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of all of the SNIST primitives and utility
+ * functions.
+ *
+ * @author Hyungjune Lee
+ * @date   Oct 13 2006
+ */
+
+// $Id: sim_noise.h,v 1.8 2010-06-29 22:07:51 scipio Exp $
+
+#ifndef _SIM_NOISE_HASH_H_
+#define _SIM_NOISE_HASH_H_
+
+#include <stdio.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum {
+  NOISE_MIN = -115,
+  NOISE_MAX = -5,
+  NOISE_MIN_QUANTIZE = -115,
+  NOISE_QUANTIZE_INTERVAL = 5,
+  NOISE_BIN_SIZE = ((NOISE_MAX - NOISE_MIN) / NOISE_QUANTIZE_INTERVAL) + 1,
+  NOISE_HISTORY = 20,
+  NOISE_DEFAULT_ELEMENT_SIZE = 8,
+  NOISE_HASHTABLE_SIZE = 128,
+  NOISE_MIN_TRACE = 128, 
+  NOISE_NUM_VALUES = NOISE_MAX - NOISE_MIN + 1,    //TODO check the + 1, also in NOISE_BIN_SIZE above in the inner parens
+};
+  
+typedef struct sim_noise_hash_t {
+  char key[NOISE_HISTORY];
+  int numElements;
+  int size;
+  char *elements;
+  char flag;
+  float dist[NOISE_NUM_VALUES];
+} sim_noise_hash_t;
+
+typedef struct sim_noise_node_t {
+  char key[NOISE_HISTORY];
+  char freqKey[NOISE_HISTORY];
+  char lastNoiseVal;
+  uint32_t noiseGenTime;
+  struct hashtable *noiseTable;
+  char* noiseTrace;
+  uint32_t noiseTraceLen;
+  uint32_t noiseTraceIndex;
+  bool generated;
+} sim_noise_node_t;
+
+void sim_noise_init();
+char sim_real_noise(uint16_t node_id, uint32_t cur_t);
+char sim_noise_generate(uint16_t node_id, uint32_t cur_t);
+void sim_noise_trace_add(uint16_t node_id, char val);
+void sim_noise_create_model(uint16_t node_id);
+  
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // _SIM_NOISE_HASH_H_
diff --git a/tos/lib/tossim/sim_packet.c b/tos/lib/tossim/sim_packet.c
new file mode 100644
index 00000000..c33be06d
--- /dev/null
+++ b/tos/lib/tossim/sim_packet.c
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * TOSSIM packet abstract data type, so C++ code can call into nesC
+ * code that does the native-to-network type translation.
+ *
+ * @author Philip Levis
+ * @date   Jan 2 2006
+ */
+
+// $Id: sim_packet.c,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+#include <sim_packet.h>
+#include <message.h>
+
+// NOTE: This function is defined in lib/tossim/ActiveMessageC. It
+// has to be predeclared here because it is defined within that component.
+void active_message_deliver(int node, message_t* m, sim_time_t t);
+
+static tossim_header_t* getHeader(message_t* msg) {
+  return (tossim_header_t*)(msg->data - sizeof(tossim_header_t));
+}
+
+void sim_packet_set_source(sim_packet_t* msg, uint16_t src)__attribute__ ((C, spontaneous)) {
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  hdr->src = src;
+}
+
+uint16_t sim_packet_source(sim_packet_t* msg)__attribute__ ((C, spontaneous)) {
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  return hdr->src;
+}
+
+void sim_packet_set_destination(sim_packet_t* msg, uint16_t dest)__attribute__ ((C, spontaneous)) {
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  hdr->dest = dest;
+}
+
+uint16_t sim_packet_destination(sim_packet_t* msg)__attribute__ ((C, spontaneous)) {
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  return hdr->dest;
+}
+  
+void sim_packet_set_length(sim_packet_t* msg, uint8_t length)__attribute__ ((C, spontaneous)) {
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  hdr->length = length;
+}
+uint16_t sim_packet_length(sim_packet_t* msg)__attribute__ ((C, spontaneous)) {
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  return hdr->length;
+}
+
+void sim_packet_set_type(sim_packet_t* msg, uint8_t type) __attribute__ ((C, spontaneous)){
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  hdr->type = type;
+}
+
+uint8_t sim_packet_type(sim_packet_t* msg) __attribute__ ((C, spontaneous)){
+  tossim_header_t* hdr = getHeader((message_t*)msg);
+  return hdr->type;
+}
+
+uint8_t* sim_packet_data(sim_packet_t* p) __attribute__ ((C, spontaneous)){
+  message_t* msg = (message_t*)p;
+  return (uint8_t*)&msg->data;
+}
+void sim_packet_set_strength(sim_packet_t* p, uint16_t str) __attribute__ ((C, spontaneous)){
+  message_t* msg = (message_t*)p;
+  tossim_metadata_t* md = (tossim_metadata_t*)(&msg->metadata);
+  md->strength = str;
+}
+void sim_packet_deliver(int node, sim_packet_t* msg, sim_time_t t) __attribute__ ((C, spontaneous)){
+  if (t < sim_time()) {
+    t = sim_time();
+  }
+  dbg("Packet", "sim_packet.c: Delivering packet %p to %i at %llu\n", msg, node, t);
+  active_message_deliver(node, (message_t*)msg, t);
+}
+  
+uint8_t sim_packet_max_length(sim_packet_t* msg) __attribute__ ((C, spontaneous)){
+  return TOSH_DATA_LENGTH;
+}
+
+sim_packet_t* sim_packet_allocate () __attribute__ ((C, spontaneous)){
+  return (sim_packet_t*)malloc(sizeof(message_t));
+}
+
+void sim_packet_free(sim_packet_t* p) __attribute__ ((C, spontaneous)) {
+  printf("sim_packet.c: Freeing packet %p\n", p);
+  free(p);
+}
diff --git a/tos/lib/tossim/sim_packet.h b/tos/lib/tossim/sim_packet.h
new file mode 100644
index 00000000..28a99ea1
--- /dev/null
+++ b/tos/lib/tossim/sim_packet.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * TOSSIM packet abstract data type, so C++ code can call into nesC
+ * code that does the native-to-network type translation.
+ *
+ * @author Philip Levis
+ * @date   Jan 2 2006
+ */
+
+// $Id: sim_packet.h,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+#ifndef SIM_PACKET_H_INCLUDED
+#define SIM_PACKET_H_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+  /*
+   * sim_packet_t is a weird beast. It's a dummy type that can stand
+   * in for message_t. We need to use sim_packet_t because gcc can't
+   * understand message_t, due to its network types (nx). So the shim
+   * code between Python and TOSSIM can't mention message_t.  Rather
+   * than use a void*, the shim uses sim_packet_t in order to provide
+   * some type checking. A sim_packet_t* is essentially a Python
+   * friendly pointer to a message_t.
+   */
+  typedef struct sim_packet {} sim_packet_t;
+  
+  void sim_packet_set_source(sim_packet_t* msg, uint16_t src);
+  uint16_t sim_packet_source(sim_packet_t* msg);
+  
+  void sim_packet_set_destination(sim_packet_t* msg, uint16_t dest);
+  uint16_t sim_packet_destination(sim_packet_t* msg);
+  
+  void sim_packet_set_length(sim_packet_t* msg, uint8_t len);
+  uint16_t sim_packet_length(sim_packet_t* msg);
+
+  void sim_packet_set_type(sim_packet_t* msg, uint8_t type);
+  uint8_t sim_packet_type(sim_packet_t* msg);
+
+  uint8_t* sim_packet_data(sim_packet_t* msg);
+  void sim_packet_set_strength(sim_packet_t* msg, uint16_t str);
+
+  void sim_packet_deliver(int node, sim_packet_t* msg, sim_time_t t);
+  uint8_t sim_packet_max_length(sim_packet_t* msg);
+
+  sim_packet_t* sim_packet_allocate();
+  void sim_packet_free(sim_packet_t* m);
+
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_PACKET_H_INCLUDED
diff --git a/tos/lib/tossim/sim_tossim.c b/tos/lib/tossim/sim_tossim.c
new file mode 100644
index 00000000..4269211b
--- /dev/null
+++ b/tos/lib/tossim/sim_tossim.c
@@ -0,0 +1,195 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of all of the basic TOSSIM primitives and utility
+ * functions.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id: sim_tossim.c,v 1.8 2010-06-29 22:07:51 scipio Exp $
+
+
+#include <sim_tossim.h>
+#include <sim_event_queue.h>
+#include <sim_mote.h>
+#include <stdlib.h>
+#include <sys/time.h>
+
+#include <sim_noise.h> //added by HyungJune Lee
+
+static sim_time_t sim_ticks;
+static unsigned long current_node;
+static int sim_seed;
+
+static int __nesc_nido_resolve(int mote, char* varname, uintptr_t* addr, size_t* size);
+
+void sim_init() __attribute__ ((C, spontaneous)) {
+  sim_queue_init();
+  sim_log_init();
+  sim_log_commit_change();
+  sim_noise_init(); //added by HyungJune Lee
+
+  {
+    struct timeval tv;
+    gettimeofday(&tv, NULL);
+    // Need to make sure we don't pass zero to seed simulation.
+    // But in case some weird timing factor causes usec to always
+    // be zero, default to tv_sec. Note that the explicit
+    // seeding call also has a check for zero. Thanks to Konrad
+    // Iwanicki for finding this. -pal
+    if (tv.tv_usec != 0) {
+      sim_random_seed(tv.tv_usec);
+    }
+    else {
+      sim_random_seed(tv.tv_sec);
+    }
+  } 
+}
+
+void sim_end() __attribute__ ((C, spontaneous)) {
+  sim_queue_init();
+}
+
+
+
+int sim_random() __attribute__ ((C, spontaneous)) {
+  uint32_t mlcg,p,q;
+  uint64_t tmpseed;
+  tmpseed =  (uint64_t)33614U * (uint64_t)sim_seed;
+  q = tmpseed;    /* low */
+  q = q >> 1;
+  p = tmpseed >> 32 ;             /* hi */
+  mlcg = p + q;
+  if (mlcg & 0x80000000) {
+    mlcg = mlcg & 0x7FFFFFFF;
+    mlcg++;
+  }
+  sim_seed = mlcg;
+  return mlcg;
+}
+
+void sim_random_seed(int seed) __attribute__ ((C, spontaneous)) {
+  // A seed of zero wedges on zero, so use 1 instead.
+  if (seed == 0) {
+    seed = 1;
+  }
+  sim_seed = seed;
+}
+
+sim_time_t sim_time() __attribute__ ((C, spontaneous)) {
+  return sim_ticks;
+}
+void sim_set_time(sim_time_t t) __attribute__ ((C, spontaneous)) {
+  sim_ticks = t;
+}
+
+sim_time_t sim_ticks_per_sec() __attribute__ ((C, spontaneous)) {
+  return 10000000000ULL;
+}
+
+unsigned long sim_node() __attribute__ ((C, spontaneous)) {
+  return current_node;
+}
+void sim_set_node(unsigned long node) __attribute__ ((C, spontaneous)) {
+  current_node = node;
+  TOS_NODE_ID = node;
+}
+
+bool sim_run_next_event() __attribute__ ((C, spontaneous)) {
+  bool result = FALSE;
+  if (!sim_queue_is_empty()) {
+    sim_event_t* event = sim_queue_pop();
+    sim_set_time(event->time);
+    sim_set_node(event->mote);
+
+    // Need to test whether function pointers are for statically
+    // allocted events that are zeroed out on reboot
+    dbg("Tossim", "CORE: popping event 0x%p for %i at %llu with handler %p... ", event, sim_node(), sim_time(), event->handle);
+    if ((sim_mote_is_on(event->mote) || event->force) &&
+	event->handle != NULL) {
+      result = TRUE;
+      dbg_clear("Tossim", " mote is on (or forced event), run it.\n");
+      event->handle(event);
+    }
+    else {
+      dbg_clear("Tossim", "\n");
+    }
+    if (event->cleanup != NULL) {
+      event->cleanup(event);
+    }
+  }
+
+  return result;
+}
+
+int sim_print_time(char* buf, int len, sim_time_t ftime) __attribute__ ((C, spontaneous)) {
+  int hours;
+  int minutes;
+  int seconds;
+  sim_time_t  secondBillionths;
+
+  secondBillionths = (ftime % sim_ticks_per_sec());
+  if (sim_ticks_per_sec() > (sim_time_t)1000000000) {
+    secondBillionths /= (sim_ticks_per_sec() / (sim_time_t)1000000000);
+  }
+  else {
+    secondBillionths *= ((sim_time_t)1000000000 / sim_ticks_per_sec());
+  }
+
+  seconds = (int)(ftime / sim_ticks_per_sec());
+  minutes = seconds / 60;
+  hours = minutes / 60;
+  seconds %= 60;
+  minutes %= 60;
+  buf[len-1] = 0;
+  return snprintf(buf, len - 1, "%i:%i:%i.%09llu", hours, minutes, seconds, secondBillionths);
+}
+
+int sim_print_now(char* buf, int len) __attribute__ ((C, spontaneous)) {
+  return sim_print_time(buf, len, sim_time());
+}
+
+char simTimeBuf[128];
+char* sim_time_string() __attribute__ ((C, spontaneous)) {
+  sim_print_now(simTimeBuf, 128);
+  return simTimeBuf;
+}
+
+void sim_add_channel(char* channel, FILE* file) __attribute__ ((C, spontaneous)) {
+  sim_log_add_channel(channel, file);
+}
+
+bool sim_remove_channel(char* channel, FILE* file)  __attribute__ ((C, spontaneous)) {
+  return sim_log_remove_channel(channel, file);
+}
diff --git a/tos/lib/tossim/sim_tossim.h b/tos/lib/tossim/sim_tossim.h
new file mode 100644
index 00000000..e093fd58
--- /dev/null
+++ b/tos/lib/tossim/sim_tossim.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of all of the basic TOSSIM primitives and utility
+ * functions.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id: sim_tossim.h,v 1.5 2010-06-29 22:07:51 scipio Exp $
+
+#ifndef SIM_TOSSIM_H_INCLUDED
+#define SIM_TOSSIM_H_INCLUDED
+
+#include <stdio.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef long long int sim_time_t;
+  
+void sim_init();
+void sim_start();
+void sim_end();
+
+void sim_random_seed(int seed);
+int sim_random();
+  
+sim_time_t sim_time();
+void sim_set_time(sim_time_t time);
+sim_time_t sim_ticks_per_sec();
+  
+unsigned long sim_node();
+void sim_set_node(unsigned long node);
+
+int sim_print_time(char* buf, int bufLen, sim_time_t time);
+int sim_print_now(char* buf, int bufLen);
+char* sim_time_string();
+
+void sim_add_channel(char* channel, FILE* file);
+bool sim_remove_channel(char* channel, FILE* file);
+  
+bool sim_run_next_event();
+
+  
+#ifdef __cplusplus
+}
+#endif
+  
+#endif // SIM_TOSSIM_H_INCLUDED
diff --git a/tos/lib/tossim/topologies/15-15-medium-mica2-grid.txt b/tos/lib/tossim/topologies/15-15-medium-mica2-grid.txt
new file mode 100644
index 00000000..dc5c7939
--- /dev/null
+++ b/tos/lib/tossim/topologies/15-15-medium-mica2-grid.txt
@@ -0,0 +1,50625 @@
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diff --git a/tos/lib/tossim/topologies/15-15-sparse-mica2-grid.txt b/tos/lib/tossim/topologies/15-15-sparse-mica2-grid.txt
new file mode 100644
index 00000000..e5221d46
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index 00000000..0a236481
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+noise	40	-107.18	4.00
+noise	41	-108.98	4.00
+noise	42	-104.54	4.00
+noise	43	-103.78	4.00
+noise	44	-101.29	4.00
+noise	45	-103.04	4.00
+noise	46	-101.71	4.00
+noise	47	-105.70	4.00
+noise	48	-105.95	4.00
+noise	49	-104.81	4.00
+noise	50	-105.76	4.00
+noise	51	-104.39	4.00
+noise	52	-105.50	4.00
+noise	53	-104.76	4.00
+noise	54	-103.87	4.00
+noise	55	-107.94	4.00
+noise	56	-106.21	4.00
+noise	57	-102.57	4.00
+noise	58	-108.67	4.00
+noise	59	-108.49	4.00
+noise	60	-101.09	4.00
+noise	61	-106.75	4.00
+noise	62	-105.89	4.00
+noise	63	-105.63	4.00
+noise	64	-105.21	4.00
+noise	65	-106.70	4.00
+noise	66	-105.20	4.00
+noise	67	-103.78	4.00
+noise	68	-103.54	4.00
+noise	69	-105.60	4.00
+noise	70	-108.26	4.00
+noise	71	-104.10	4.00
+noise	72	-107.74	4.00
+noise	73	-107.17	4.00
+noise	74	-109.12	4.00
+noise	75	-102.11	4.00
+noise	76	-102.35	4.00
+noise	77	-107.43	4.00
+noise	78	-105.30	4.00
+noise	79	-102.05	4.00
+noise	80	-105.01	4.00
+noise	81	-106.69	4.00
+noise	82	-104.25	4.00
+noise	83	-106.55	4.00
+noise	84	-105.81	4.00
+noise	85	-105.35	4.00
+noise	86	-101.90	4.00
+noise	87	-105.91	4.00
+noise	88	-105.17	4.00
+noise	89	-102.68	4.00
+noise	90	-103.33	4.00
+noise	91	-102.72	4.00
+noise	92	-102.19	4.00
+noise	93	-104.62	4.00
+noise	94	-107.11	4.00
+noise	95	-105.85	4.00
+noise	96	-102.73	4.00
+noise	97	-106.00	4.00
+noise	98	-106.23	4.00
+noise	99	-109.34	4.00
+noise	100	-104.19	4.00
+noise	101	-105.56	4.00
+noise	102	-106.47	4.00
+noise	103	-104.93	4.00
+noise	104	-102.02	4.00
+noise	105	-103.98	4.00
+noise	106	-106.92	4.00
+noise	107	-104.94	4.00
+noise	108	-105.32	4.00
+noise	109	-106.48	4.00
+noise	110	-103.62	4.00
+noise	111	-107.14	4.00
+noise	112	-105.69	4.00
+noise	113	-103.91	4.00
+noise	114	-106.58	4.00
+noise	115	-104.76	4.00
+noise	116	-105.81	4.00
+noise	117	-107.57	4.00
+noise	118	-105.61	4.00
+noise	119	-104.80	4.00
+noise	120	-105.56	4.00
+noise	121	-101.83	4.00
+noise	122	-104.75	4.00
+noise	123	-104.33	4.00
+noise	124	-105.18	4.00
+noise	125	-103.77	4.00
+noise	126	-102.99	4.00
+noise	127	-105.24	4.00
+noise	128	-104.70	4.00
+noise	129	-106.44	4.00
+noise	130	-105.71	4.00
+noise	131	-105.68	4.00
+noise	132	-109.54	4.00
+noise	133	-103.21	4.00
+noise	134	-104.70	4.00
+noise	135	-104.87	4.00
+noise	136	-105.16	4.00
+noise	137	-100.10	4.00
+noise	138	-107.09	4.00
+noise	139	-106.97	4.00
+noise	140	-105.97	4.00
+noise	141	-110.76	4.00
+noise	142	-104.63	4.00
+noise	143	-103.05	4.00
+noise	144	-104.72	4.00
+noise	145	-102.08	4.00
+noise	146	-104.29	4.00
+noise	147	-107.63	4.00
+noise	148	-106.26	4.00
+noise	149	-107.66	4.00
+noise	150	-104.62	4.00
+noise	151	-104.32	4.00
+noise	152	-105.95	4.00
+noise	153	-107.90	4.00
+noise	154	-104.05	4.00
+noise	155	-105.61	4.00
+noise	156	-106.50	4.00
+noise	157	-107.23	4.00
+noise	158	-104.61	4.00
+noise	159	-102.21	4.00
+noise	160	-104.39	4.00
+noise	161	-102.77	4.00
+noise	162	-104.82	4.00
+noise	163	-103.61	4.00
+noise	164	-105.32	4.00
+noise	165	-105.68	4.00
+noise	166	-107.07	4.00
+noise	167	-103.66	4.00
+noise	168	-103.98	4.00
+noise	169	-104.68	4.00
+noise	170	-106.21	4.00
+noise	171	-104.07	4.00
+noise	172	-104.75	4.00
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+noise	174	-105.78	4.00
+noise	175	-106.17	4.00
+noise	176	-104.66	4.00
+noise	177	-104.68	4.00
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+noise	188	-103.78	4.00
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+noise	192	-104.84	4.00
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+noise	194	-105.18	4.00
+noise	195	-106.34	4.00
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+noise	197	-106.69	4.00
+noise	198	-105.25	4.00
+noise	199	-103.68	4.00
+noise	200	-104.03	4.00
+noise	201	-104.74	4.00
+noise	202	-104.74	4.00
+noise	203	-102.63	4.00
+noise	204	-108.15	4.00
+noise	205	-107.32	4.00
+noise	206	-103.93	4.00
+noise	207	-103.67	4.00
+noise	208	-104.88	4.00
+noise	209	-103.33	4.00
+noise	210	-103.77	4.00
+noise	211	-107.35	4.00
+noise	212	-104.40	4.00
+noise	213	-102.55	4.00
+noise	214	-99.68	4.00
+noise	215	-102.74	4.00
+noise	216	-102.16	4.00
+noise	217	-102.66	4.00
+noise	218	-107.37	4.00
+noise	219	-105.53	4.00
+noise	220	-109.69	4.00
+noise	221	-104.91	4.00
+noise	222	-107.83	4.00
+noise	223	-103.71	4.00
+noise	224	-102.76	4.00
diff --git a/tos/lib/tossim/topologies/layout.py b/tos/lib/tossim/topologies/layout.py
new file mode 100644
index 00000000..7c375d0a
--- /dev/null
+++ b/tos/lib/tossim/topologies/layout.py
@@ -0,0 +1,285 @@
+#!/usr/bin/env python
+
+import pygtk
+pygtk.require('2.0')
+import gtk
+
+class Mote:
+    def __init__(self):
+        self.x = 0
+        self.y = 0
+        self.selected = False
+
+class HelloWorld:
+    def hello(self, widget, data=None):
+        print "Hello World"
+
+    def delete_event(self, widget, event, data=None):
+        print "delete event occured"
+        return False
+
+    def destroy(self, widget, data=None):
+        gtk.main_quit()
+
+    def addButton(self, string, function, data=None):
+        button = gtk.Button(string)
+        button.connect("clicked", function, data)
+        self.buttonArea.add(button)
+        button.show()
+
+    def close(self, x1, y1, x2, y2):
+        x1 -= x2
+        y1 -= y2
+        x1 *= x1
+        y1 *= y1
+        if (x1 + y1 < 50):
+            print "close: ", x1, " ", y1
+            return True
+        else:
+            print "not close: ", x1, " ", y1 
+            return False
+
+    def within(self, m, x1, y1, x2, y2):
+        gX = max(x1, x2) + 5
+        lX = min(x1, x2) - 5
+        gY = max(y1, y2) + 5
+        lY = min(y1, y2) - 5
+        if (m.x >= lX and m.x <= gX and
+            m.y >= lY and m.y <= gY):
+            print "X: ", lX, "<=", m.x, "<=", gX
+            print "Y: ", lY, "<=", m.y, "<=", gY
+            return True
+        else:
+            print "X: ", lX, ">", m.x, ">", gX
+            print "Y: ", lY, ">", m.y, ">", gY
+            return False
+        
+    def button_press_event(self, widget, event):
+        if event.button == 1 and self.pixmap != None:
+            x = event.x
+            y = event.y
+            print "press at ", x, " ", y
+            self.start_x = event.x
+            self.start_y = event.y
+            self.dx = 0
+            self.dy = 0
+            self.new_target = True
+
+            for m in self.selected:
+                if self.close(m.x, m.y, x, y):
+                    self.new_target = False
+                            
+            if self.new_target:
+                for m in self.selected:
+                    m.selected = False
+                self.selected = []
+                
+            self.redraw_motes()
+
+    def button_release_event(self, widget, event):
+        if event.button == 1 and self.pixmap != None:
+            if self.new_target:
+                x = event.x
+                y = event.y
+                print "release at ", x, " ", y
+                for m in self.motes:
+                    if self.within(m, x, y, self.start_x, self.start_y):
+                        m.selected = True
+                        self.selected.append(m)
+                        self.redraw_motes()
+                        self.new_target = False
+            else:
+                for m in self.selected:
+                    m.x += self.dx
+                    m.y += self.dy
+                    
+            self.dx = 0
+            self.dy = 0
+            self.redraw_motes()
+            
+    def drag_event(self, widget, event):
+        x = y = state = None
+        if event.is_hint:
+            x, y, state = event.window.get_pointer()
+        else:
+            x = event.x
+            y = event.y
+            state = event.state
+            
+        if state & gtk.gdk.BUTTON1_MASK and self.pixmap != None:
+            if not self.new_target:
+                self.dx = event.x - self.start_x
+                self.dy = event.y - self.start_y
+                self.redraw_motes()
+                print "drag"
+
+                
+    def configure_event(self, widget, event):
+        self.widget = widget
+        self.x, self.y, self.width, self.height = widget.get_allocation()
+        self.pixmap = gtk.gdk.Pixmap(widget.window, self.width, self.height)
+        self.pixmap.draw_rectangle(widget.get_style().white_gc, True, 0, 0, self.width, self.height)
+        print "Configuring ", self.x, " ", self.y, " ", self.height, " ", self.width
+        return True
+    
+    def expose_event(self, widget, event):
+        x , y, width, height = event.area
+        print "expose"
+        widget.window.draw_drawable(widget.get_style().fg_gc[gtk.STATE_NORMAL],
+                                    self.pixmap, x, y, x, y, width, height)
+        return False
+
+    def redraw_motes(self):
+        self.pixmap.draw_rectangle(self.widget.get_style().white_gc, True, 0, 0, self.width, self.height)
+        self.widget.queue_draw_area(0, 0, self.width, self.height)
+        for mote in self.motes:
+            self.draw_mote(mote)
+            
+    def draw_mote(self, mote):
+        x = mote.x
+        y = mote.y
+        if mote.selected:
+            x += self.dx
+            y += self.dy
+            
+        rect = (int(x-5), int(y-5), 10, 10)
+        gc = self.widget.get_style().black_gc
+        if mote.selected:
+            gc = self.widget.get_style().light_gc[gtk.STATE_SELECTED]
+            
+        self.pixmap.draw_rectangle(gc, True,
+                                   rect[0], rect[1], rect[2], rect[3])
+
+    def createDrawPanel(self):
+        self.moteArea = gtk.DrawingArea()
+        self.moteArea.set_size_request(400,400)
+        self.drawArea.add(self.moteArea)
+        self.moteArea.show()
+        self.moteArea.connect("expose_event", self.expose_event)
+        self.moteArea.connect("configure_event", self.configure_event)
+        
+        self.moteArea.connect("motion_notify_event", self.drag_event)
+        self.moteArea.connect("button_press_event", self.button_press_event)
+        self.moteArea.connect("button_release_event", self.button_release_event)
+
+        self.moteArea.set_events(gtk.gdk.EXPOSURE_MASK
+                               | gtk.gdk.LEAVE_NOTIFY_MASK
+                               | gtk.gdk.BUTTON_PRESS_MASK
+                               | gtk.gdk.POINTER_MOTION_MASK
+                               | gtk.gdk.POINTER_MOTION_HINT_MASK
+                               | gtk.gdk.BUTTON_RELEASE_MASK)
+
+
+    def createButtonPanel(self):
+        self.addButton("Add", self.addNode)
+        self.addButton("Remove", self.removeSelected)
+        self.addButton("Print", self.printTopology)
+
+        table = gtk.Table(2, 2, True)
+        
+        label = gtk.Label("Area")
+        label.set_justify(gtk.JUSTIFY_LEFT)
+        label.show()
+        self.distanceText = gtk.TextBuffer()
+        self.distanceText.set_text("100")
+        view = gtk.TextView(self.distanceText)
+        table.attach(label, 0, 1, 0, 1)
+        table.attach(view, 1, 2, 0, 1)
+        view.show()    
+
+        label = gtk.Label("File")
+        label.set_justify(gtk.JUSTIFY_LEFT)
+        label.show()
+        self.fileText = gtk.TextBuffer()
+        self.fileText.set_text("layout.txt")
+        view = gtk.TextView(self.fileText)
+        view.show()
+        table.attach(label, 0, 1, 1, 2)
+        table.attach(view, 1, 2, 1, 2)
+
+        self.buttonArea.add(table)
+        table.set_row_spacings(4)
+        table.show()
+        self.addButton("Quit", self.quit);
+        
+    def __init__(self):
+        self.window = gtk.Window(gtk.WINDOW_TOPLEVEL)
+        self.window.connect("delete_event", self.delete_event)
+        self.window.connect("destroy", self.destroy)
+        self.window.set_border_width(10)
+
+        self.buttonArea = gtk.VBox()
+        self.drawArea = gtk.VBox()
+        self.totalArea = gtk.HBox()
+        self.totalArea.add(self.buttonArea)
+        self.totalArea.add(self.drawArea)
+
+        self.createDrawPanel()
+        self.createButtonPanel()
+        
+        self.window.add(self.totalArea)
+        self.buttonArea.show()
+        self.drawArea.show()
+        self.totalArea.show()
+        self.window.show()
+
+        self.motes = []
+
+        # For clicking and selecting motes
+        self.selected = []
+        self.new_target = False
+        self.start_x = 0
+        self.start_y = 0
+        self.dx = 0
+        self.dy = 0
+        
+    def add_mote(self, x, y):
+        m = Mote()
+        m.x = x
+        m.y = y
+        self.motes.append(m)
+
+    def addNode(self, widget, data=None):
+        self.add_mote(50, 50)
+        self.redraw_motes()
+        print "add node"
+
+    def removeSelected(self, widget, data=None):
+        for m in self.selected:
+            for other in self.motes:
+                if m == other:
+                    self.motes.remove(m)
+        self.selected = []
+        self.redraw_motes()
+        print "remove selected"
+
+    def printTopology(self, widget, data=None):
+        counter = 0
+        startiter, enditer = self.fileText.get_bounds()
+        filename = self.fileText.get_text(startiter, enditer)
+        file = open(filename, "w")
+        for m in self.motes:
+            x = m.x
+            y = m.y
+            startiter, enditer = self.distanceText.get_bounds()
+            text = self.distanceText.get_text(startiter, enditer)
+            x *= int(text)
+            y *= int(text)
+            x /= 400
+            y /= 400
+            file.write(str(counter) + " "+ str(x) + " "+ str(y) + "\n")
+        print "print topology"
+
+    def quit(self, widget, data=None):
+        gtk.main_quit()
+        
+    def main(self):
+        gtk.main()
+
+
+
+if __name__ == "__main__":
+    hello = HelloWorld()
+    hello.main()
+
+   
diff --git a/tos/lib/tossim/tos.h b/tos/lib/tossim/tos.h
new file mode 100644
index 00000000..09947186
--- /dev/null
+++ b/tos/lib/tossim/tos.h
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of all of the basic TOSSIM primitives and utility
+ * functions.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id: tos.h,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+#ifndef TOS_H_INCLUDED
+#define TOS_H_INCLUDED
+
+#if !defined(__CYGWIN__)
+#if defined(__MSP430__)
+#include <sys/inttypes.h>
+#else
+#include <inttypes.h>
+#endif
+#else //cygwin
+#include <unistd.h>
+#include <stdio.h>
+#include <sys/types.h>
+#endif
+
+#include <string.h>
+#include <stdlib.h>
+#include <math.h>
+#include <stddef.h>
+#include <ctype.h>
+#include <stdio.h>
+
+#ifndef __cplusplus
+typedef uint8_t bool;
+#endif
+
+/* 
+ * TEMPORARY: include the Safe TinyOS macros so that annotations get
+ * defined away for non-safe users -- this will no longer be necessary
+ * after we require users to use the ncc that has Safe TinyOS
+ * support 
+ */
+#include "../../lib/safe/include/annots_stage1.h"
+
+enum { FALSE = 0, TRUE = 1 };
+
+extern uint16_t TOS_NODE_ID;
+
+#define PROGMEM
+
+#ifndef TOSSIM_MAX_NODES
+#define TOSSIM_MAX_NODES 1000
+#endif
+
+#include <sim_event_queue.h>
+#include <sim_tossim.h>
+#include <sim_mote.h>
+#include <sim_log.h>
+
+// We only want to include these files if we are compiling TOSSIM proper,
+// that is, the C file representing the TinyOS application. The TinyOS
+// build process means that this is the only really good place to put
+// them.
+#ifdef TOSSIM
+
+struct @atmostonce { };
+struct @atleastonce { };
+struct @exactlyonce { };
+
+#include <sim_log.c>
+#include <heap.c>
+#include <sim_event_queue.c>
+#include <sim_tossim.c>
+#include <sim_mac.c>
+#include <sim_packet.c>
+#endif
+
+#endif
diff --git a/tos/lib/tossim/tossim.c b/tos/lib/tossim/tossim.c
new file mode 100644
index 00000000..623982b9
--- /dev/null
+++ b/tos/lib/tossim/tossim.c
@@ -0,0 +1,299 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of TOSSIM C++ classes. Generally just directly
+ * call their C analogues.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id: tossim.c,v 1.7 2010-06-29 22:07:51 scipio Exp $
+
+
+#include <stdint.h>
+#include <tossim.h>
+#include <sim_tossim.h>
+#include <sim_mote.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <hashtable.h>
+
+#include <mac.c>
+#include <radio.c>
+#include <packet.c>
+#include <sim_noise.h>
+
+uint16_t TOS_NODE_ID = 1;
+
+Variable::Variable(char* str, char* formatStr, int array, int which) {
+  name = str;
+  format = formatStr;
+  isArray = array;
+  mote = which;
+  
+  int sLen = strlen(name);
+  realName = (char*)malloc(sLen + 1);
+  memcpy(realName, name, sLen + 1);
+  realName[sLen] = 0;
+
+  for (int i = 0; i < sLen; i++) {
+    if (realName[i] == '.') {
+      realName[i] = '$';
+    }
+  }
+
+  //  printf("Creating %s realName: %s format: %s %s\n", name, realName, formatStr, array? "[]":"");
+
+  if (sim_mote_get_variable_info(mote, realName, &ptr, &len) == 0) {
+    data = (char*)malloc(len + 1);
+    data[len] = 0;
+  }
+  else {
+    printf("Could not find variable %s\n", realName);
+    data = NULL;
+    ptr = NULL;
+  }
+  printf("Allocated variable %s\n", realName);
+}
+
+Variable::~Variable() {
+  printf("Freeing variable %s\n", realName);
+  free(data);
+  free(realName);
+}
+
+/* This is the sdbm algorithm, taken from
+   http://www.cs.yorku.ca/~oz/hash.html -pal */
+static unsigned int tossim_hash(void* key) {
+  char* str = (char*)key;
+  unsigned int hashVal = 0;
+  int c;
+  
+  while ((c = *str++))
+    hashVal = c + (hashVal << 6) + (hashVal << 16) - hashVal;
+  
+  return hashVal;
+}
+
+static int tossim_hash_eq(void* key1, void* key2) {
+  return strcmp((char*)key1, (char*)key2) == 0;
+}
+
+
+variable_string_t Variable::getData() {
+  if (data != NULL && ptr != NULL) {
+    str.ptr = data;
+    str.type = format;
+    str.len = len;
+    str.isArray = isArray;
+    //    printf("Getting %s %s %s\n", format, isArray? "[]":"", name);
+    memcpy(data, ptr, len);
+  }
+  else {
+    str.ptr = (char*)"<no such variable>";
+    str.type = (char*)"<no such variable>";
+    str.len = strlen("<no such variable>");
+    str.isArray = 0;
+  }
+  return str;
+}
+
+Mote::Mote(nesc_app_t* n) {
+  app = n;
+  varTable = create_hashtable(128, tossim_hash, tossim_hash_eq);
+}
+
+Mote::~Mote(){}
+
+unsigned long Mote::id() {
+  return nodeID;
+}
+
+long long int Mote::euid() {
+  return sim_mote_euid(nodeID);
+}
+
+void Mote::setEuid(long long int val) {
+  sim_mote_set_euid(nodeID, val);
+}
+
+long long int Mote::bootTime() {
+  return sim_mote_start_time(nodeID);
+}
+
+void Mote::bootAtTime(long long int time) {
+  sim_mote_set_start_time(nodeID, time);
+  sim_mote_enqueue_boot_event(nodeID);
+}
+
+bool Mote::isOn() {
+  return sim_mote_is_on(nodeID);
+}
+
+void Mote::turnOff() {
+  sim_mote_turn_off(nodeID);
+}
+
+void Mote::turnOn() {
+  sim_mote_turn_on(nodeID);
+}
+
+void Mote::setID(unsigned long val) {
+  nodeID = val;
+}
+
+Variable* Mote::getVariable(char* name) {
+  char* typeStr = (char*)"";
+  int isArray;
+  Variable* var;
+  
+  var = (Variable*)hashtable_search(varTable, name);
+  if (var == NULL) {
+    // Could hash this for greater efficiency,
+    // but that would either require transformation
+    // in Tossim class or a more complex typemap.
+    if (app != NULL) {
+      for (int i = 0; i < app->numVariables; i++) {
+	if(strcmp(name, app->variableNames[i]) == 0) {
+	  typeStr = app->variableTypes[i];
+	  isArray = app->variableArray[i];
+	  break;
+	}
+      }
+    }
+    //  printf("Getting variable %s of type %s %s\n", name, typeStr, isArray? "[]" : "");
+    var = new Variable(name, typeStr, isArray, nodeID);
+    hashtable_insert(varTable, name, var);
+  }
+  return var;
+}
+
+void Mote::addNoiseTraceReading(int val) {
+  sim_noise_trace_add(id(), (char)val);
+}
+
+void Mote::createNoiseModel() {
+  sim_noise_create_model(id());
+}
+
+int Mote::generateNoise(int when) {
+  return (int)sim_noise_generate(id(), when);
+}
+
+Tossim::Tossim(nesc_app_t* n) {
+  app = n;
+  init();
+}
+
+Tossim::~Tossim() {
+  sim_end();
+}
+
+void Tossim::init() {
+  sim_init();
+  motes = (Mote**)malloc(sizeof(Mote*) * (TOSSIM_MAX_NODES + 1));
+  memset(motes, 0, sizeof(Mote*) * TOSSIM_MAX_NODES);
+}
+
+long long int Tossim::time() {
+  return sim_time();
+}
+
+long long int Tossim::ticksPerSecond() {
+  return sim_ticks_per_sec();
+}
+
+char* Tossim::timeStr() {
+  sim_print_now(timeBuf, 256);
+  return timeBuf;
+}
+
+void Tossim::setTime(long long int val) {
+  sim_set_time(val);
+}
+
+Mote* Tossim::currentNode() {
+  return getNode(sim_node());
+}
+
+Mote* Tossim::getNode(unsigned long nodeID) {
+  if (nodeID > TOSSIM_MAX_NODES) {
+    nodeID = TOSSIM_MAX_NODES;
+    // log an error, asked for an invalid node
+  }
+  else {
+    if (motes[nodeID] == NULL) {
+      motes[nodeID] = new Mote(app);
+      if (nodeID == TOSSIM_MAX_NODES) {
+	motes[nodeID]->setID(0xffff);
+      }
+      else {
+	motes[nodeID]->setID(nodeID);
+      }
+    }
+    return motes[nodeID];
+  }
+}
+
+void Tossim::setCurrentNode(unsigned long nodeID) {
+  sim_set_node(nodeID);
+}
+
+void Tossim::addChannel(char* channel, FILE* file) {
+  sim_add_channel(channel, file);
+}
+
+bool Tossim::removeChannel(char* channel, FILE* file) {
+  return sim_remove_channel(channel, file);
+}
+
+void Tossim::randomSeed(int seed) {
+  return sim_random_seed(seed);
+}
+
+bool Tossim::runNextEvent() {
+  return sim_run_next_event();
+}
+
+MAC* Tossim::mac() {
+  return new MAC();
+}
+
+Radio* Tossim::radio() {
+  return new Radio();
+}
+
+Packet* Tossim::newPacket() {
+  return new Packet();
+}
diff --git a/tos/lib/tossim/tossim.h b/tos/lib/tossim/tossim.h
new file mode 100644
index 00000000..dd529bd6
--- /dev/null
+++ b/tos/lib/tossim/tossim.h
@@ -0,0 +1,149 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Declaration of C++ objects representing TOSSIM abstractions.
+ * Used to generate Python objects.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id: tossim.h,v 1.6 2010-06-29 22:07:51 scipio Exp $
+
+#ifndef TOSSIM_H_INCLUDED
+#define TOSSIM_H_INCLUDED
+
+//#include <stdint.h>
+#include <memory.h>
+#include <tos.h>
+#include <mac.h>
+#include <radio.h>
+#include <packet.h>
+#include <hashtable.h>
+
+typedef struct variable_string {
+  char* type;
+  char* ptr;
+  int len;
+  int isArray;
+} variable_string_t;
+
+typedef struct nesc_app {
+  int numVariables;
+  char** variableNames;
+  char** variableTypes;
+  int* variableArray;
+} nesc_app_t;
+
+class Variable {
+ public:
+  Variable(char* name, char* format, int array, int mote);
+  ~Variable();
+  variable_string_t getData();
+  
+ private:
+  char* name;
+  char* realName;
+  char* format;
+  int mote;
+  void* ptr;
+  char* data;
+  size_t len;
+  int isArray;
+  variable_string_t str;
+};
+
+class Mote {
+ public:
+  Mote(nesc_app_t* app);
+  ~Mote();
+
+  unsigned long id();
+  
+  long long int euid();
+  void setEuid(long long int id);
+
+  long long int bootTime();
+  void bootAtTime(long long int time);
+
+  bool isOn();
+  void turnOff();
+  void turnOn();
+  void setID(unsigned long id);  
+
+  void addNoiseTraceReading(int val);
+  void createNoiseModel();
+  int generateNoise(int when);
+  
+  Variable* getVariable(char* name);
+  
+ private:
+  unsigned long nodeID;
+  nesc_app_t* app;
+  struct hashtable* varTable;
+};
+
+class Tossim {
+ public:
+  Tossim(nesc_app_t* app);
+  ~Tossim();
+  
+  void init();
+  
+  long long int time();
+  long long int ticksPerSecond();
+  char* timeStr();
+  void setTime(long long int time);
+  
+  Mote* currentNode();
+  Mote* getNode(unsigned long nodeID);
+  void setCurrentNode(unsigned long nodeID);
+
+  void addChannel(char* channel, FILE* file);
+  bool removeChannel(char* channel, FILE* file);
+  void randomSeed(int seed);
+  
+  bool runNextEvent();
+
+  MAC* mac();
+  Radio* radio();
+  Packet* newPacket();
+
+ private:
+  char timeBuf[256];
+  nesc_app_t* app;
+  Mote** motes;
+};
+
+
+
+#endif // TOSSIM_H_INCLUDED
diff --git a/tos/lib/tossim/tossim.i b/tos/lib/tossim/tossim.i
new file mode 100644
index 00000000..80946574
--- /dev/null
+++ b/tos/lib/tossim/tossim.i
@@ -0,0 +1,389 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * SWIG interface specification for TOSSIM. This file defines
+ * the top-level TOSSIM and Mote objects which are exported to
+ * Python. The typemap at the beginning allows a script to
+ * use Python files as a parameter to a function that takes a
+ * FILE* as a parameter (e.g., the logging system in sim_log.h).
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+%module TOSSIM
+
+%{
+#include <memory.h>
+#include <tossim.h>
+
+enum {
+  PRIMITIVE_INTEGER      = 0,
+  PRIMITIVE_FLOAT   = 1,
+  PRIMITIVE_UNKNOWN = 2
+};
+
+int lengthOfType(char* type) {
+  if (strcmp(type, "uint8_t") == 0) {
+    return sizeof(uint8_t);
+  }
+  else if (strcmp(type, "uint16_t") == 0) {
+    return sizeof(uint16_t);
+  }
+  else if (strcmp(type, "uint32_t") == 0) {
+    return sizeof(uint32_t);
+  }
+  else if (strcmp(type, "int8_t") == 0) {
+    return sizeof(int8_t);
+  }
+  else if (strcmp(type, "int16_t") == 0) {
+    return sizeof(int16_t);
+  }
+  else if (strcmp(type, "int32_t") == 0) {
+    return sizeof(int32_t);
+  }
+  else if (strcmp(type, "char") == 0) {
+    return sizeof(char);
+  }
+  else if (strcmp(type, "short") == 0) {
+    return sizeof(short);
+  }
+  else if (strcmp(type, "int") == 0) {
+    return sizeof(int);
+  }
+  else if (strcmp(type, "long") == 0) {
+    return sizeof(long);
+  }
+  else if (strcmp(type, "unsigned char") == 0) {
+    return sizeof(unsigned char);
+  }
+  else if (strcmp(type, "unsigned short") == 0) {
+    return sizeof(unsigned short);
+  }
+  else if (strcmp(type, "unsigned int") == 0) {
+    return sizeof(unsigned int);
+  }
+  else if (strcmp(type, "unsigned long") == 0) {
+    return sizeof(unsigned long);
+  }
+  else if (strcmp(type, "float") == 0) {
+    return sizeof(float);
+  }
+  else if (strcmp(type, "double") == 0) {
+    return sizeof(double);
+  }
+  else {
+    return 1;
+  }
+}
+
+int memoryToPrimitive(char* type, char* ptr, long* lval, double* dval) {
+  if (strcmp(type, "uint8_t") == 0) {
+    uint8_t val;
+    memcpy(&val, ptr, sizeof(uint8_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "uint16_t") == 0) {
+    uint16_t val;
+    memcpy(&val, ptr, sizeof(uint16_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "uint32_t") == 0) {
+    uint32_t val;
+    memcpy(&val, ptr, sizeof(uint32_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int8_t") == 0) {
+    int8_t val;
+    memcpy(&val, ptr, sizeof(int8_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int16_t") == 0) {
+    int16_t val;
+    memcpy(&val, ptr, sizeof(int16_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int32_t") == 0) {
+    int32_t val;
+    memcpy(&val, ptr, sizeof(int32_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "char") == 0) {
+    long val;
+    memcpy(&val, ptr, sizeof(char));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "short") == 0) {
+    short val;
+    memcpy(&val, ptr, sizeof(short));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int") == 0) {
+    int val;
+    memcpy(&val, ptr, sizeof(int));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "long") == 0) {
+    long val;
+    memcpy(&val, ptr, sizeof(long));
+    *lval = val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned char") == 0) {
+    unsigned char val;
+    memcpy(&val, ptr, sizeof(unsigned char));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned short") == 0) {
+    unsigned short val;
+    memcpy(&val, ptr, sizeof(unsigned short));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned int") == 0) {
+    unsigned int val;
+    memcpy(&val, ptr, sizeof(unsigned int));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned long") == 0) {
+    unsigned long val;
+    memcpy(&val, ptr, sizeof(unsigned long));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "float") == 0) {
+    float val;
+    memcpy(&val, ptr, sizeof(float));
+    *dval = (double)val;
+    return PRIMITIVE_FLOAT;
+  }
+  else if (strcmp(type, "double") == 0) {
+    double val;
+    memcpy(&val, ptr, sizeof(double));
+    *dval = val;
+    return PRIMITIVE_FLOAT;
+  }
+  else {
+    return PRIMITIVE_UNKNOWN;
+  }
+}
+
+PyObject* valueFromScalar(char* type, char* ptr, int len) {
+  long lval;
+  double dval;
+  int rval = memoryToPrimitive(type, ptr, &lval, &dval);
+  switch(rval) {
+    case PRIMITIVE_INTEGER:
+      return PyInt_FromLong(lval);
+    case PRIMITIVE_FLOAT:
+      return PyFloat_FromDouble(dval);
+    case PRIMITIVE_UNKNOWN:
+    default:
+      return PyString_FromStringAndSize(ptr, len);
+  }
+}
+
+PyObject* listFromArray(char* type, char* ptr, int len) {
+  long lval;
+  double dval;
+  int elementLen = lengthOfType(type);
+  PyObject* list = PyList_New(0);
+  //printf("Generating list of %s\n", type);
+  for (char* tmpPtr = ptr; tmpPtr < ptr + len; tmpPtr += elementLen) {
+    PyList_Append(list, valueFromScalar(type, tmpPtr, elementLen));    
+  }
+  return list;
+}
+%}
+
+%include mac.i
+%include radio.i
+%include packet.i
+
+%typemap(python,in) FILE * {
+  if (!PyFile_Check($input)) {
+    PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter.");
+    return NULL;
+  }
+  $1 = PyFile_AsFile($input);
+}
+
+%typemap(python,out) variable_string_t {
+  if ($1.isArray) {
+    //printf("Generating array %s\n", $1.type);
+    $result = listFromArray  ($1.type, $1.ptr, $1.len);
+  }
+  else {
+    //printf("Generating scalar %s\n", $1.type);
+    $result = valueFromScalar($1.type, $1.ptr, $1.len);
+  }
+  if ($result == NULL) {
+    PyErr_SetString(PyExc_RuntimeError, "Error generating Python type from TinyOS variable.");
+  }
+}
+
+
+%typemap(python,in) nesc_app_t* {
+  if (!PyList_Check($input)) {
+    PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+    return NULL;
+  }
+  else {
+    int size = PyList_Size($input);
+    int i = 0;
+    nesc_app_t* app;
+
+    if (size % 3 != 0) {
+      PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+      return NULL;
+    }
+
+    app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+
+    app->numVariables = size / 3;
+    app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+    app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+    app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+
+    memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+    memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+    memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+
+    for (i = 0; i < app->numVariables; i++) {
+      PyObject* name = PyList_GetItem($input, 3 * i);
+      PyObject* array = PyList_GetItem($input, (3 * i) + 1);
+      PyObject* format = PyList_GetItem($input, (3 * i) + 2);
+      if (PyString_Check(name) && PyString_Check(format)) {
+        app->variableNames[i] = PyString_AsString(name);
+        app->variableTypes[i] = PyString_AsString(format);
+        if (strcmp(PyString_AsString(array), "array") == 0) {
+          app->variableArray[i] = 1;
+          //printf("%s is an array\n", PyString_AsString(name));
+        }
+        else {
+          app->variableArray[i] = 0;
+          //printf("%s is a scalar\n", PyString_AsString(name));
+        }
+      }
+      else {
+        app->variableNames[i] = (char*)"<bad string>";
+        app->variableTypes[i] = (char*)"<bad string>";
+      }
+    }
+
+    $1 = app;
+  }
+}
+
+typedef struct var_string {
+  char* type;
+  char* ptr;
+  int len;
+  int isArray;
+} variable_string_t;
+
+typedef struct nesc_app {
+  int numVariables;
+  char** variableNames;
+  char** variableTypes;
+  int* variableArray;
+} nesc_app_t;
+
+class Variable {
+ public:
+  Variable(char* name, char* format, int array, int mote);
+  ~Variable();
+  variable_string_t getData();  
+};
+
+class Mote {
+ public:
+  Mote(nesc_app_t* app);
+  ~Mote();
+
+  unsigned long id();
+  
+  long long int euid();
+  void setEuid(long long int id);
+
+  
+  long long int bootTime();
+  void bootAtTime(long long int time);
+
+  bool isOn();
+  void turnOff();
+  void turnOn();
+  Variable* getVariable(char* name);
+
+  void addNoiseTraceReading(int val);
+  void createNoiseModel();
+  int generateNoise(int when);
+};
+
+class Tossim {
+ public:
+  Tossim(nesc_app_t* app);
+  ~Tossim();
+  
+  void init();
+  
+  long long int time();
+  long long int ticksPerSecond(); 
+  void setTime(long long int time);
+  char* timeStr();
+
+  Mote* currentNode();
+  Mote* getNode(unsigned long nodeID);
+  void setCurrentNode(unsigned long nodeID);
+
+  void addChannel(char* channel, FILE* file);
+  bool removeChannel(char* channel, FILE* file);
+  void randomSeed(int seed);
+
+  bool runNextEvent();
+  MAC* mac();
+  Radio* radio();
+  Packet* newPacket();
+};
+
+
diff --git a/tos/lib/tossim/tossim_wrap.cxx b/tos/lib/tossim/tossim_wrap.cxx
new file mode 100644
index 00000000..88071362
--- /dev/null
+++ b/tos/lib/tossim/tossim_wrap.cxx
@@ -0,0 +1,7154 @@
+/* ----------------------------------------------------------------------------
+ * This file was automatically generated by SWIG (http://www.swig.org).
+ * Version 1.3.33
+ * 
+ * This file is not intended to be easily readable and contains a number of 
+ * coding conventions designed to improve portability and efficiency. Do not make
+ * changes to this file unless you know what you are doing--modify the SWIG 
+ * interface file instead. 
+ * ----------------------------------------------------------------------------- */
+
+#define SWIGPYTHON
+#define SWIG_PYTHON_DIRECTOR_NO_VTABLE
+
+#ifdef __cplusplus
+template<typename T> class SwigValueWrapper {
+    T *tt;
+public:
+    SwigValueWrapper() : tt(0) { }
+    SwigValueWrapper(const SwigValueWrapper<T>& rhs) : tt(new T(*rhs.tt)) { }
+    SwigValueWrapper(const T& t) : tt(new T(t)) { }
+    ~SwigValueWrapper() { delete tt; } 
+    SwigValueWrapper& operator=(const T& t) { delete tt; tt = new T(t); return *this; }
+    operator T&() const { return *tt; }
+    T *operator&() { return tt; }
+private:
+    SwigValueWrapper& operator=(const SwigValueWrapper<T>& rhs);
+};
+
+template <typename T> T SwigValueInit() {
+  return T();
+}
+#endif
+
+/* -----------------------------------------------------------------------------
+ *  This section contains generic SWIG labels for method/variable
+ *  declarations/attributes, and other compiler dependent labels.
+ * ----------------------------------------------------------------------------- */
+
+/* template workaround for compilers that cannot correctly implement the C++ standard */
+#ifndef SWIGTEMPLATEDISAMBIGUATOR
+# if defined(__SUNPRO_CC) && (__SUNPRO_CC <= 0x560)
+#  define SWIGTEMPLATEDISAMBIGUATOR template
+# elif defined(__HP_aCC)
+/* Needed even with `aCC -AA' when `aCC -V' reports HP ANSI C++ B3910B A.03.55 */
+/* If we find a maximum version that requires this, the test would be __HP_aCC <= 35500 for A.03.55 */
+#  define SWIGTEMPLATEDISAMBIGUATOR template
+# else
+#  define SWIGTEMPLATEDISAMBIGUATOR
+# endif
+#endif
+
+/* inline attribute */
+#ifndef SWIGINLINE
+# if defined(__cplusplus) || (defined(__GNUC__) && !defined(__STRICT_ANSI__))
+#   define SWIGINLINE inline
+# else
+#   define SWIGINLINE
+# endif
+#endif
+
+/* attribute recognised by some compilers to avoid 'unused' warnings */
+#ifndef SWIGUNUSED
+# if defined(__GNUC__)
+#   if !(defined(__cplusplus)) || (__GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4))
+#     define SWIGUNUSED __attribute__ ((__unused__)) 
+#   else
+#     define SWIGUNUSED
+#   endif
+# elif defined(__ICC)
+#   define SWIGUNUSED __attribute__ ((__unused__)) 
+# else
+#   define SWIGUNUSED 
+# endif
+#endif
+
+#ifndef SWIGUNUSEDPARM
+# ifdef __cplusplus
+#   define SWIGUNUSEDPARM(p)
+# else
+#   define SWIGUNUSEDPARM(p) p SWIGUNUSED 
+# endif
+#endif
+
+/* internal SWIG method */
+#ifndef SWIGINTERN
+# define SWIGINTERN static SWIGUNUSED
+#endif
+
+/* internal inline SWIG method */
+#ifndef SWIGINTERNINLINE
+# define SWIGINTERNINLINE SWIGINTERN SWIGINLINE
+#endif
+
+/* exporting methods */
+#if (__GNUC__ >= 4) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
+#  ifndef GCC_HASCLASSVISIBILITY
+#    define GCC_HASCLASSVISIBILITY
+#  endif
+#endif
+
+#ifndef SWIGEXPORT
+# if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__)
+#   if defined(STATIC_LINKED)
+#     define SWIGEXPORT
+#   else
+#     define SWIGEXPORT __declspec(dllexport)
+#   endif
+# else
+#   if defined(__GNUC__) && defined(GCC_HASCLASSVISIBILITY)
+#     define SWIGEXPORT __attribute__ ((visibility("default")))
+#   else
+#     define SWIGEXPORT
+#   endif
+# endif
+#endif
+
+/* calling conventions for Windows */
+#ifndef SWIGSTDCALL
+# if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__)
+#   define SWIGSTDCALL __stdcall
+# else
+#   define SWIGSTDCALL
+# endif 
+#endif
+
+/* Deal with Microsoft's attempt at deprecating C standard runtime functions */
+#if !defined(SWIG_NO_CRT_SECURE_NO_DEPRECATE) && defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE)
+# define _CRT_SECURE_NO_DEPRECATE
+#endif
+
+/* Deal with Microsoft's attempt at deprecating methods in the standard C++ library */
+#if !defined(SWIG_NO_SCL_SECURE_NO_DEPRECATE) && defined(_MSC_VER) && !defined(_SCL_SECURE_NO_DEPRECATE)
+# define _SCL_SECURE_NO_DEPRECATE
+#endif
+
+
+
+/* Python.h has to appear first */
+#include <Python.h>
+
+/* -----------------------------------------------------------------------------
+ * swigrun.swg
+ *
+ * This file contains generic CAPI SWIG runtime support for pointer
+ * type checking.
+ * ----------------------------------------------------------------------------- */
+
+/* This should only be incremented when either the layout of swig_type_info changes,
+   or for whatever reason, the runtime changes incompatibly */
+#define SWIG_RUNTIME_VERSION "3"
+
+/* define SWIG_TYPE_TABLE_NAME as "SWIG_TYPE_TABLE" */
+#ifdef SWIG_TYPE_TABLE
+# define SWIG_QUOTE_STRING(x) #x
+# define SWIG_EXPAND_AND_QUOTE_STRING(x) SWIG_QUOTE_STRING(x)
+# define SWIG_TYPE_TABLE_NAME SWIG_EXPAND_AND_QUOTE_STRING(SWIG_TYPE_TABLE)
+#else
+# define SWIG_TYPE_TABLE_NAME
+#endif
+
+/*
+  You can use the SWIGRUNTIME and SWIGRUNTIMEINLINE macros for
+  creating a static or dynamic library from the swig runtime code.
+  In 99.9% of the cases, swig just needs to declare them as 'static'.
+  
+  But only do this if is strictly necessary, ie, if you have problems
+  with your compiler or so.
+*/
+
+#ifndef SWIGRUNTIME
+# define SWIGRUNTIME SWIGINTERN
+#endif
+
+#ifndef SWIGRUNTIMEINLINE
+# define SWIGRUNTIMEINLINE SWIGRUNTIME SWIGINLINE
+#endif
+
+/*  Generic buffer size */
+#ifndef SWIG_BUFFER_SIZE
+# define SWIG_BUFFER_SIZE 1024
+#endif
+
+/* Flags for pointer conversions */
+#define SWIG_POINTER_DISOWN        0x1
+
+/* Flags for new pointer objects */
+#define SWIG_POINTER_OWN           0x1
+
+
+/* 
+   Flags/methods for returning states.
+   
+   The swig conversion methods, as ConvertPtr, return and integer 
+   that tells if the conversion was successful or not. And if not,
+   an error code can be returned (see swigerrors.swg for the codes).
+   
+   Use the following macros/flags to set or process the returning
+   states.
+   
+   In old swig versions, you usually write code as:
+
+     if (SWIG_ConvertPtr(obj,vptr,ty.flags) != -1) {
+       // success code
+     } else {
+       //fail code
+     }
+
+   Now you can be more explicit as:
+
+    int res = SWIG_ConvertPtr(obj,vptr,ty.flags);
+    if (SWIG_IsOK(res)) {
+      // success code
+    } else {
+      // fail code
+    }
+
+   that seems to be the same, but now you can also do
+
+    Type *ptr;
+    int res = SWIG_ConvertPtr(obj,(void **)(&ptr),ty.flags);
+    if (SWIG_IsOK(res)) {
+      // success code
+      if (SWIG_IsNewObj(res) {
+        ...
+	delete *ptr;
+      } else {
+        ...
+      }
+    } else {
+      // fail code
+    }
+    
+   I.e., now SWIG_ConvertPtr can return new objects and you can
+   identify the case and take care of the deallocation. Of course that
+   requires also to SWIG_ConvertPtr to return new result values, as
+
+      int SWIG_ConvertPtr(obj, ptr,...) {         
+        if (<obj is ok>) {			       
+          if (<need new object>) {		       
+            *ptr = <ptr to new allocated object>; 
+            return SWIG_NEWOBJ;		       
+          } else {				       
+            *ptr = <ptr to old object>;	       
+            return SWIG_OLDOBJ;		       
+          } 				       
+        } else {				       
+          return SWIG_BADOBJ;		       
+        }					       
+      }
+
+   Of course, returning the plain '0(success)/-1(fail)' still works, but you can be
+   more explicit by returning SWIG_BADOBJ, SWIG_ERROR or any of the
+   swig errors code.
+
+   Finally, if the SWIG_CASTRANK_MODE is enabled, the result code
+   allows to return the 'cast rank', for example, if you have this
+
+       int food(double)
+       int fooi(int);
+
+   and you call
+ 
+      food(1)   // cast rank '1'  (1 -> 1.0)
+      fooi(1)   // cast rank '0'
+
+   just use the SWIG_AddCast()/SWIG_CheckState()
+
+
+ */
+#define SWIG_OK                    (0) 
+#define SWIG_ERROR                 (-1)
+#define SWIG_IsOK(r)               (r >= 0)
+#define SWIG_ArgError(r)           ((r != SWIG_ERROR) ? r : SWIG_TypeError)  
+
+/* The CastRankLimit says how many bits are used for the cast rank */
+#define SWIG_CASTRANKLIMIT         (1 << 8)
+/* The NewMask denotes the object was created (using new/malloc) */
+#define SWIG_NEWOBJMASK            (SWIG_CASTRANKLIMIT  << 1)
+/* The TmpMask is for in/out typemaps that use temporal objects */
+#define SWIG_TMPOBJMASK            (SWIG_NEWOBJMASK << 1)
+/* Simple returning values */
+#define SWIG_BADOBJ                (SWIG_ERROR)
+#define SWIG_OLDOBJ                (SWIG_OK)
+#define SWIG_NEWOBJ                (SWIG_OK | SWIG_NEWOBJMASK)
+#define SWIG_TMPOBJ                (SWIG_OK | SWIG_TMPOBJMASK)
+/* Check, add and del mask methods */
+#define SWIG_AddNewMask(r)         (SWIG_IsOK(r) ? (r | SWIG_NEWOBJMASK) : r)
+#define SWIG_DelNewMask(r)         (SWIG_IsOK(r) ? (r & ~SWIG_NEWOBJMASK) : r)
+#define SWIG_IsNewObj(r)           (SWIG_IsOK(r) && (r & SWIG_NEWOBJMASK))
+#define SWIG_AddTmpMask(r)         (SWIG_IsOK(r) ? (r | SWIG_TMPOBJMASK) : r)
+#define SWIG_DelTmpMask(r)         (SWIG_IsOK(r) ? (r & ~SWIG_TMPOBJMASK) : r)
+#define SWIG_IsTmpObj(r)           (SWIG_IsOK(r) && (r & SWIG_TMPOBJMASK))
+
+
+/* Cast-Rank Mode */
+#if defined(SWIG_CASTRANK_MODE)
+#  ifndef SWIG_TypeRank
+#    define SWIG_TypeRank             unsigned long
+#  endif
+#  ifndef SWIG_MAXCASTRANK            /* Default cast allowed */
+#    define SWIG_MAXCASTRANK          (2)
+#  endif
+#  define SWIG_CASTRANKMASK          ((SWIG_CASTRANKLIMIT) -1)
+#  define SWIG_CastRank(r)           (r & SWIG_CASTRANKMASK)
+SWIGINTERNINLINE int SWIG_AddCast(int r) { 
+  return SWIG_IsOK(r) ? ((SWIG_CastRank(r) < SWIG_MAXCASTRANK) ? (r + 1) : SWIG_ERROR) : r;
+}
+SWIGINTERNINLINE int SWIG_CheckState(int r) { 
+  return SWIG_IsOK(r) ? SWIG_CastRank(r) + 1 : 0; 
+}
+#else /* no cast-rank mode */
+#  define SWIG_AddCast
+#  define SWIG_CheckState(r) (SWIG_IsOK(r) ? 1 : 0)
+#endif
+
+
+
+
+#include <string.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void *(*swig_converter_func)(void *);
+typedef struct swig_type_info *(*swig_dycast_func)(void **);
+
+/* Structure to store inforomation on one type */
+typedef struct swig_type_info {
+  const char             *name;			/* mangled name of this type */
+  const char             *str;			/* human readable name of this type */
+  swig_dycast_func        dcast;		/* dynamic cast function down a hierarchy */
+  struct swig_cast_info  *cast;			/* linked list of types that can cast into this type */
+  void                   *clientdata;		/* language specific type data */
+  int                    owndata;		/* flag if the structure owns the clientdata */
+} swig_type_info;
+
+/* Structure to store a type and conversion function used for casting */
+typedef struct swig_cast_info {
+  swig_type_info         *type;			/* pointer to type that is equivalent to this type */
+  swig_converter_func     converter;		/* function to cast the void pointers */
+  struct swig_cast_info  *next;			/* pointer to next cast in linked list */
+  struct swig_cast_info  *prev;			/* pointer to the previous cast */
+} swig_cast_info;
+
+/* Structure used to store module information
+ * Each module generates one structure like this, and the runtime collects
+ * all of these structures and stores them in a circularly linked list.*/
+typedef struct swig_module_info {
+  swig_type_info         **types;		/* Array of pointers to swig_type_info structures that are in this module */
+  size_t                 size;		        /* Number of types in this module */
+  struct swig_module_info *next;		/* Pointer to next element in circularly linked list */
+  swig_type_info         **type_initial;	/* Array of initially generated type structures */
+  swig_cast_info         **cast_initial;	/* Array of initially generated casting structures */
+  void                    *clientdata;		/* Language specific module data */
+} swig_module_info;
+
+/* 
+  Compare two type names skipping the space characters, therefore
+  "char*" == "char *" and "Class<int>" == "Class<int >", etc.
+
+  Return 0 when the two name types are equivalent, as in
+  strncmp, but skipping ' '.
+*/
+SWIGRUNTIME int
+SWIG_TypeNameComp(const char *f1, const char *l1,
+		  const char *f2, const char *l2) {
+  for (;(f1 != l1) && (f2 != l2); ++f1, ++f2) {
+    while ((*f1 == ' ') && (f1 != l1)) ++f1;
+    while ((*f2 == ' ') && (f2 != l2)) ++f2;
+    if (*f1 != *f2) return (*f1 > *f2) ? 1 : -1;
+  }
+  return (int)((l1 - f1) - (l2 - f2));
+}
+
+/*
+  Check type equivalence in a name list like <name1>|<name2>|...
+  Return 0 if not equal, 1 if equal
+*/
+SWIGRUNTIME int
+SWIG_TypeEquiv(const char *nb, const char *tb) {
+  int equiv = 0;
+  const char* te = tb + strlen(tb);
+  const char* ne = nb;
+  while (!equiv && *ne) {
+    for (nb = ne; *ne; ++ne) {
+      if (*ne == '|') break;
+    }
+    equiv = (SWIG_TypeNameComp(nb, ne, tb, te) == 0) ? 1 : 0;
+    if (*ne) ++ne;
+  }
+  return equiv;
+}
+
+/*
+  Check type equivalence in a name list like <name1>|<name2>|...
+  Return 0 if equal, -1 if nb < tb, 1 if nb > tb
+*/
+SWIGRUNTIME int
+SWIG_TypeCompare(const char *nb, const char *tb) {
+  int equiv = 0;
+  const char* te = tb + strlen(tb);
+  const char* ne = nb;
+  while (!equiv && *ne) {
+    for (nb = ne; *ne; ++ne) {
+      if (*ne == '|') break;
+    }
+    equiv = (SWIG_TypeNameComp(nb, ne, tb, te) == 0) ? 1 : 0;
+    if (*ne) ++ne;
+  }
+  return equiv;
+}
+
+
+/* think of this as a c++ template<> or a scheme macro */
+#define SWIG_TypeCheck_Template(comparison, ty)         \
+  if (ty) {                                             \
+    swig_cast_info *iter = ty->cast;                    \
+    while (iter) {                                      \
+      if (comparison) {                                 \
+        if (iter == ty->cast) return iter;              \
+        /* Move iter to the top of the linked list */   \
+        iter->prev->next = iter->next;                  \
+        if (iter->next)                                 \
+          iter->next->prev = iter->prev;                \
+        iter->next = ty->cast;                          \
+        iter->prev = 0;                                 \
+        if (ty->cast) ty->cast->prev = iter;            \
+        ty->cast = iter;                                \
+        return iter;                                    \
+      }                                                 \
+      iter = iter->next;                                \
+    }                                                   \
+  }                                                     \
+  return 0
+
+/*
+  Check the typename
+*/
+SWIGRUNTIME swig_cast_info *
+SWIG_TypeCheck(const char *c, swig_type_info *ty) {
+  SWIG_TypeCheck_Template(strcmp(iter->type->name, c) == 0, ty);
+}
+
+/* Same as previous function, except strcmp is replaced with a pointer comparison */
+SWIGRUNTIME swig_cast_info *
+SWIG_TypeCheckStruct(swig_type_info *from, swig_type_info *into) {
+  SWIG_TypeCheck_Template(iter->type == from, into);
+}
+
+/*
+  Cast a pointer up an inheritance hierarchy
+*/
+SWIGRUNTIMEINLINE void *
+SWIG_TypeCast(swig_cast_info *ty, void *ptr) {
+  return ((!ty) || (!ty->converter)) ? ptr : (*ty->converter)(ptr);
+}
+
+/* 
+   Dynamic pointer casting. Down an inheritance hierarchy
+*/
+SWIGRUNTIME swig_type_info *
+SWIG_TypeDynamicCast(swig_type_info *ty, void **ptr) {
+  swig_type_info *lastty = ty;
+  if (!ty || !ty->dcast) return ty;
+  while (ty && (ty->dcast)) {
+    ty = (*ty->dcast)(ptr);
+    if (ty) lastty = ty;
+  }
+  return lastty;
+}
+
+/*
+  Return the name associated with this type
+*/
+SWIGRUNTIMEINLINE const char *
+SWIG_TypeName(const swig_type_info *ty) {
+  return ty->name;
+}
+
+/*
+  Return the pretty name associated with this type,
+  that is an unmangled type name in a form presentable to the user.
+*/
+SWIGRUNTIME const char *
+SWIG_TypePrettyName(const swig_type_info *type) {
+  /* The "str" field contains the equivalent pretty names of the
+     type, separated by vertical-bar characters.  We choose
+     to print the last name, as it is often (?) the most
+     specific. */
+  if (!type) return NULL;
+  if (type->str != NULL) {
+    const char *last_name = type->str;
+    const char *s;
+    for (s = type->str; *s; s++)
+      if (*s == '|') last_name = s+1;
+    return last_name;
+  }
+  else
+    return type->name;
+}
+
+/* 
+   Set the clientdata field for a type
+*/
+SWIGRUNTIME void
+SWIG_TypeClientData(swig_type_info *ti, void *clientdata) {
+  swig_cast_info *cast = ti->cast;
+  /* if (ti->clientdata == clientdata) return; */
+  ti->clientdata = clientdata;
+  
+  while (cast) {
+    if (!cast->converter) {
+      swig_type_info *tc = cast->type;
+      if (!tc->clientdata) {
+	SWIG_TypeClientData(tc, clientdata);
+      }
+    }    
+    cast = cast->next;
+  }
+}
+SWIGRUNTIME void
+SWIG_TypeNewClientData(swig_type_info *ti, void *clientdata) {
+  SWIG_TypeClientData(ti, clientdata);
+  ti->owndata = 1;
+}
+  
+/*
+  Search for a swig_type_info structure only by mangled name
+  Search is a O(log #types)
+  
+  We start searching at module start, and finish searching when start == end.  
+  Note: if start == end at the beginning of the function, we go all the way around
+  the circular list.
+*/
+SWIGRUNTIME swig_type_info *
+SWIG_MangledTypeQueryModule(swig_module_info *start, 
+                            swig_module_info *end, 
+		            const char *name) {
+  swig_module_info *iter = start;
+  do {
+    if (iter->size) {
+      register size_t l = 0;
+      register size_t r = iter->size - 1;
+      do {
+	/* since l+r >= 0, we can (>> 1) instead (/ 2) */
+	register size_t i = (l + r) >> 1; 
+	const char *iname = iter->types[i]->name;
+	if (iname) {
+	  register int compare = strcmp(name, iname);
+	  if (compare == 0) {	    
+	    return iter->types[i];
+	  } else if (compare < 0) {
+	    if (i) {
+	      r = i - 1;
+	    } else {
+	      break;
+	    }
+	  } else if (compare > 0) {
+	    l = i + 1;
+	  }
+	} else {
+	  break; /* should never happen */
+	}
+      } while (l <= r);
+    }
+    iter = iter->next;
+  } while (iter != end);
+  return 0;
+}
+
+/*
+  Search for a swig_type_info structure for either a mangled name or a human readable name.
+  It first searches the mangled names of the types, which is a O(log #types)
+  If a type is not found it then searches the human readable names, which is O(#types).
+  
+  We start searching at module start, and finish searching when start == end.  
+  Note: if start == end at the beginning of the function, we go all the way around
+  the circular list.
+*/
+SWIGRUNTIME swig_type_info *
+SWIG_TypeQueryModule(swig_module_info *start, 
+                     swig_module_info *end, 
+		     const char *name) {
+  /* STEP 1: Search the name field using binary search */
+  swig_type_info *ret = SWIG_MangledTypeQueryModule(start, end, name);
+  if (ret) {
+    return ret;
+  } else {
+    /* STEP 2: If the type hasn't been found, do a complete search
+       of the str field (the human readable name) */
+    swig_module_info *iter = start;
+    do {
+      register size_t i = 0;
+      for (; i < iter->size; ++i) {
+	if (iter->types[i]->str && (SWIG_TypeEquiv(iter->types[i]->str, name)))
+	  return iter->types[i];
+      }
+      iter = iter->next;
+    } while (iter != end);
+  }
+  
+  /* neither found a match */
+  return 0;
+}
+
+/* 
+   Pack binary data into a string
+*/
+SWIGRUNTIME char *
+SWIG_PackData(char *c, void *ptr, size_t sz) {
+  static const char hex[17] = "0123456789abcdef";
+  register const unsigned char *u = (unsigned char *) ptr;
+  register const unsigned char *eu =  u + sz;
+  for (; u != eu; ++u) {
+    register unsigned char uu = *u;
+    *(c++) = hex[(uu & 0xf0) >> 4];
+    *(c++) = hex[uu & 0xf];
+  }
+  return c;
+}
+
+/* 
+   Unpack binary data from a string
+*/
+SWIGRUNTIME const char *
+SWIG_UnpackData(const char *c, void *ptr, size_t sz) {
+  register unsigned char *u = (unsigned char *) ptr;
+  register const unsigned char *eu = u + sz;
+  for (; u != eu; ++u) {
+    register char d = *(c++);
+    register unsigned char uu;
+    if ((d >= '0') && (d <= '9'))
+      uu = ((d - '0') << 4);
+    else if ((d >= 'a') && (d <= 'f'))
+      uu = ((d - ('a'-10)) << 4);
+    else 
+      return (char *) 0;
+    d = *(c++);
+    if ((d >= '0') && (d <= '9'))
+      uu |= (d - '0');
+    else if ((d >= 'a') && (d <= 'f'))
+      uu |= (d - ('a'-10));
+    else 
+      return (char *) 0;
+    *u = uu;
+  }
+  return c;
+}
+
+/* 
+   Pack 'void *' into a string buffer.
+*/
+SWIGRUNTIME char *
+SWIG_PackVoidPtr(char *buff, void *ptr, const char *name, size_t bsz) {
+  char *r = buff;
+  if ((2*sizeof(void *) + 2) > bsz) return 0;
+  *(r++) = '_';
+  r = SWIG_PackData(r,&ptr,sizeof(void *));
+  if (strlen(name) + 1 > (bsz - (r - buff))) return 0;
+  strcpy(r,name);
+  return buff;
+}
+
+SWIGRUNTIME const char *
+SWIG_UnpackVoidPtr(const char *c, void **ptr, const char *name) {
+  if (*c != '_') {
+    if (strcmp(c,"NULL") == 0) {
+      *ptr = (void *) 0;
+      return name;
+    } else {
+      return 0;
+    }
+  }
+  return SWIG_UnpackData(++c,ptr,sizeof(void *));
+}
+
+SWIGRUNTIME char *
+SWIG_PackDataName(char *buff, void *ptr, size_t sz, const char *name, size_t bsz) {
+  char *r = buff;
+  size_t lname = (name ? strlen(name) : 0);
+  if ((2*sz + 2 + lname) > bsz) return 0;
+  *(r++) = '_';
+  r = SWIG_PackData(r,ptr,sz);
+  if (lname) {
+    strncpy(r,name,lname+1);
+  } else {
+    *r = 0;
+  }
+  return buff;
+}
+
+SWIGRUNTIME const char *
+SWIG_UnpackDataName(const char *c, void *ptr, size_t sz, const char *name) {
+  if (*c != '_') {
+    if (strcmp(c,"NULL") == 0) {
+      memset(ptr,0,sz);
+      return name;
+    } else {
+      return 0;
+    }
+  }
+  return SWIG_UnpackData(++c,ptr,sz);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/*  Errors in SWIG */
+#define  SWIG_UnknownError    	   -1 
+#define  SWIG_IOError        	   -2 
+#define  SWIG_RuntimeError   	   -3 
+#define  SWIG_IndexError     	   -4 
+#define  SWIG_TypeError      	   -5 
+#define  SWIG_DivisionByZero 	   -6 
+#define  SWIG_OverflowError  	   -7 
+#define  SWIG_SyntaxError    	   -8 
+#define  SWIG_ValueError     	   -9 
+#define  SWIG_SystemError    	   -10
+#define  SWIG_AttributeError 	   -11
+#define  SWIG_MemoryError    	   -12 
+#define  SWIG_NullReferenceError   -13
+
+
+
+
+/* Add PyOS_snprintf for old Pythons */
+#if PY_VERSION_HEX < 0x02020000
+# if defined(_MSC_VER) || defined(__BORLANDC__) || defined(_WATCOM)
+#  define PyOS_snprintf _snprintf
+# else
+#  define PyOS_snprintf snprintf
+# endif
+#endif
+
+/* A crude PyString_FromFormat implementation for old Pythons */
+#if PY_VERSION_HEX < 0x02020000
+
+#ifndef SWIG_PYBUFFER_SIZE
+# define SWIG_PYBUFFER_SIZE 1024
+#endif
+
+static PyObject *
+PyString_FromFormat(const char *fmt, ...) {
+  va_list ap;
+  char buf[SWIG_PYBUFFER_SIZE * 2];
+  int res;
+  va_start(ap, fmt);
+  res = vsnprintf(buf, sizeof(buf), fmt, ap);
+  va_end(ap);
+  return (res < 0 || res >= (int)sizeof(buf)) ? 0 : PyString_FromString(buf);
+}
+#endif
+
+/* Add PyObject_Del for old Pythons */
+#if PY_VERSION_HEX < 0x01060000
+# define PyObject_Del(op) PyMem_DEL((op))
+#endif
+#ifndef PyObject_DEL
+# define PyObject_DEL PyObject_Del
+#endif
+
+/* A crude PyExc_StopIteration exception for old Pythons */
+#if PY_VERSION_HEX < 0x02020000
+# ifndef PyExc_StopIteration
+#  define PyExc_StopIteration PyExc_RuntimeError
+# endif
+# ifndef PyObject_GenericGetAttr
+#  define PyObject_GenericGetAttr 0
+# endif
+#endif
+/* Py_NotImplemented is defined in 2.1 and up. */
+#if PY_VERSION_HEX < 0x02010000
+# ifndef Py_NotImplemented
+#  define Py_NotImplemented PyExc_RuntimeError
+# endif
+#endif
+
+
+/* A crude PyString_AsStringAndSize implementation for old Pythons */
+#if PY_VERSION_HEX < 0x02010000
+# ifndef PyString_AsStringAndSize
+#  define PyString_AsStringAndSize(obj, s, len) {*s = PyString_AsString(obj); *len = *s ? strlen(*s) : 0;}
+# endif
+#endif
+
+/* PySequence_Size for old Pythons */
+#if PY_VERSION_HEX < 0x02000000
+# ifndef PySequence_Size
+#  define PySequence_Size PySequence_Length
+# endif
+#endif
+
+
+/* PyBool_FromLong for old Pythons */
+#if PY_VERSION_HEX < 0x02030000
+static
+PyObject *PyBool_FromLong(long ok)
+{
+  PyObject *result = ok ? Py_True : Py_False;
+  Py_INCREF(result);
+  return result;
+}
+#endif
+
+/* Py_ssize_t for old Pythons */
+/* This code is as recommended by: */
+/* http://www.python.org/dev/peps/pep-0353/#conversion-guidelines */
+#if PY_VERSION_HEX < 0x02050000 && !defined(PY_SSIZE_T_MIN)
+typedef int Py_ssize_t;
+# define PY_SSIZE_T_MAX INT_MAX
+# define PY_SSIZE_T_MIN INT_MIN
+#endif
+
+/* -----------------------------------------------------------------------------
+ * error manipulation
+ * ----------------------------------------------------------------------------- */
+
+SWIGRUNTIME PyObject*
+SWIG_Python_ErrorType(int code) {
+  PyObject* type = 0;
+  switch(code) {
+  case SWIG_MemoryError:
+    type = PyExc_MemoryError;
+    break;
+  case SWIG_IOError:
+    type = PyExc_IOError;
+    break;
+  case SWIG_RuntimeError:
+    type = PyExc_RuntimeError;
+    break;
+  case SWIG_IndexError:
+    type = PyExc_IndexError;
+    break;
+  case SWIG_TypeError:
+    type = PyExc_TypeError;
+    break;
+  case SWIG_DivisionByZero:
+    type = PyExc_ZeroDivisionError;
+    break;
+  case SWIG_OverflowError:
+    type = PyExc_OverflowError;
+    break;
+  case SWIG_SyntaxError:
+    type = PyExc_SyntaxError;
+    break;
+  case SWIG_ValueError:
+    type = PyExc_ValueError;
+    break;
+  case SWIG_SystemError:
+    type = PyExc_SystemError;
+    break;
+  case SWIG_AttributeError:
+    type = PyExc_AttributeError;
+    break;
+  default:
+    type = PyExc_RuntimeError;
+  }
+  return type;
+}
+
+
+SWIGRUNTIME void
+SWIG_Python_AddErrorMsg(const char* mesg)
+{
+  PyObject *type = 0;
+  PyObject *value = 0;
+  PyObject *traceback = 0;
+
+  if (PyErr_Occurred()) PyErr_Fetch(&type, &value, &traceback);
+  if (value) {
+    PyObject *old_str = PyObject_Str(value);
+    PyErr_Clear();
+    Py_XINCREF(type);
+    PyErr_Format(type, "%s %s", PyString_AsString(old_str), mesg);
+    Py_DECREF(old_str);
+    Py_DECREF(value);
+  } else {
+    PyErr_Format(PyExc_RuntimeError, mesg);
+  }
+}
+
+
+
+#if defined(SWIG_PYTHON_NO_THREADS)
+#  if defined(SWIG_PYTHON_THREADS)
+#    undef SWIG_PYTHON_THREADS
+#  endif
+#endif
+#if defined(SWIG_PYTHON_THREADS) /* Threading support is enabled */
+#  if !defined(SWIG_PYTHON_USE_GIL) && !defined(SWIG_PYTHON_NO_USE_GIL)
+#    if (PY_VERSION_HEX >= 0x02030000) /* For 2.3 or later, use the PyGILState calls */
+#      define SWIG_PYTHON_USE_GIL
+#    endif
+#  endif
+#  if defined(SWIG_PYTHON_USE_GIL) /* Use PyGILState threads calls */
+#    ifndef SWIG_PYTHON_INITIALIZE_THREADS
+#     define SWIG_PYTHON_INITIALIZE_THREADS  PyEval_InitThreads() 
+#    endif
+#    ifdef __cplusplus /* C++ code */
+       class SWIG_Python_Thread_Block {
+         bool status;
+         PyGILState_STATE state;
+       public:
+         void end() { if (status) { PyGILState_Release(state); status = false;} }
+         SWIG_Python_Thread_Block() : status(true), state(PyGILState_Ensure()) {}
+         ~SWIG_Python_Thread_Block() { end(); }
+       };
+       class SWIG_Python_Thread_Allow {
+         bool status;
+         PyThreadState *save;
+       public:
+         void end() { if (status) { PyEval_RestoreThread(save); status = false; }}
+         SWIG_Python_Thread_Allow() : status(true), save(PyEval_SaveThread()) {}
+         ~SWIG_Python_Thread_Allow() { end(); }
+       };
+#      define SWIG_PYTHON_THREAD_BEGIN_BLOCK   SWIG_Python_Thread_Block _swig_thread_block
+#      define SWIG_PYTHON_THREAD_END_BLOCK     _swig_thread_block.end()
+#      define SWIG_PYTHON_THREAD_BEGIN_ALLOW   SWIG_Python_Thread_Allow _swig_thread_allow
+#      define SWIG_PYTHON_THREAD_END_ALLOW     _swig_thread_allow.end()
+#    else /* C code */
+#      define SWIG_PYTHON_THREAD_BEGIN_BLOCK   PyGILState_STATE _swig_thread_block = PyGILState_Ensure()
+#      define SWIG_PYTHON_THREAD_END_BLOCK     PyGILState_Release(_swig_thread_block)
+#      define SWIG_PYTHON_THREAD_BEGIN_ALLOW   PyThreadState *_swig_thread_allow = PyEval_SaveThread()
+#      define SWIG_PYTHON_THREAD_END_ALLOW     PyEval_RestoreThread(_swig_thread_allow)
+#    endif
+#  else /* Old thread way, not implemented, user must provide it */
+#    if !defined(SWIG_PYTHON_INITIALIZE_THREADS)
+#      define SWIG_PYTHON_INITIALIZE_THREADS
+#    endif
+#    if !defined(SWIG_PYTHON_THREAD_BEGIN_BLOCK)
+#      define SWIG_PYTHON_THREAD_BEGIN_BLOCK
+#    endif
+#    if !defined(SWIG_PYTHON_THREAD_END_BLOCK)
+#      define SWIG_PYTHON_THREAD_END_BLOCK
+#    endif
+#    if !defined(SWIG_PYTHON_THREAD_BEGIN_ALLOW)
+#      define SWIG_PYTHON_THREAD_BEGIN_ALLOW
+#    endif
+#    if !defined(SWIG_PYTHON_THREAD_END_ALLOW)
+#      define SWIG_PYTHON_THREAD_END_ALLOW
+#    endif
+#  endif
+#else /* No thread support */
+#  define SWIG_PYTHON_INITIALIZE_THREADS
+#  define SWIG_PYTHON_THREAD_BEGIN_BLOCK
+#  define SWIG_PYTHON_THREAD_END_BLOCK
+#  define SWIG_PYTHON_THREAD_BEGIN_ALLOW
+#  define SWIG_PYTHON_THREAD_END_ALLOW
+#endif
+
+/* -----------------------------------------------------------------------------
+ * Python API portion that goes into the runtime
+ * ----------------------------------------------------------------------------- */
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* cc-mode */
+#endif
+#endif
+
+/* -----------------------------------------------------------------------------
+ * Constant declarations
+ * ----------------------------------------------------------------------------- */
+
+/* Constant Types */
+#define SWIG_PY_POINTER 4
+#define SWIG_PY_BINARY  5
+
+/* Constant information structure */
+typedef struct swig_const_info {
+  int type;
+  char *name;
+  long lvalue;
+  double dvalue;
+  void   *pvalue;
+  swig_type_info **ptype;
+} swig_const_info;
+
+#ifdef __cplusplus
+#if 0
+{ /* cc-mode */
+#endif
+}
+#endif
+
+
+/* -----------------------------------------------------------------------------
+ * See the LICENSE file for information on copyright, usage and redistribution
+ * of SWIG, and the README file for authors - http://www.swig.org/release.html.
+ *
+ * pyrun.swg
+ *
+ * This file contains the runtime support for Python modules
+ * and includes code for managing global variables and pointer
+ * type checking.
+ *
+ * ----------------------------------------------------------------------------- */
+
+/* Common SWIG API */
+
+/* for raw pointers */
+#define SWIG_Python_ConvertPtr(obj, pptr, type, flags)  SWIG_Python_ConvertPtrAndOwn(obj, pptr, type, flags, 0)
+#define SWIG_ConvertPtr(obj, pptr, type, flags)         SWIG_Python_ConvertPtr(obj, pptr, type, flags)
+#define SWIG_ConvertPtrAndOwn(obj,pptr,type,flags,own)  SWIG_Python_ConvertPtrAndOwn(obj, pptr, type, flags, own)
+#define SWIG_NewPointerObj(ptr, type, flags)            SWIG_Python_NewPointerObj(ptr, type, flags)
+#define SWIG_CheckImplicit(ty)                          SWIG_Python_CheckImplicit(ty) 
+#define SWIG_AcquirePtr(ptr, src)                       SWIG_Python_AcquirePtr(ptr, src)
+#define swig_owntype                                    int
+
+/* for raw packed data */
+#define SWIG_ConvertPacked(obj, ptr, sz, ty)            SWIG_Python_ConvertPacked(obj, ptr, sz, ty)
+#define SWIG_NewPackedObj(ptr, sz, type)                SWIG_Python_NewPackedObj(ptr, sz, type)
+
+/* for class or struct pointers */
+#define SWIG_ConvertInstance(obj, pptr, type, flags)    SWIG_ConvertPtr(obj, pptr, type, flags)
+#define SWIG_NewInstanceObj(ptr, type, flags)           SWIG_NewPointerObj(ptr, type, flags)
+
+/* for C or C++ function pointers */
+#define SWIG_ConvertFunctionPtr(obj, pptr, type)        SWIG_Python_ConvertFunctionPtr(obj, pptr, type)
+#define SWIG_NewFunctionPtrObj(ptr, type)               SWIG_Python_NewPointerObj(ptr, type, 0)
+
+/* for C++ member pointers, ie, member methods */
+#define SWIG_ConvertMember(obj, ptr, sz, ty)            SWIG_Python_ConvertPacked(obj, ptr, sz, ty)
+#define SWIG_NewMemberObj(ptr, sz, type)                SWIG_Python_NewPackedObj(ptr, sz, type)
+
+
+/* Runtime API */
+
+#define SWIG_GetModule(clientdata)                      SWIG_Python_GetModule()
+#define SWIG_SetModule(clientdata, pointer)             SWIG_Python_SetModule(pointer)
+#define SWIG_NewClientData(obj)                         PySwigClientData_New(obj)
+
+#define SWIG_SetErrorObj                                SWIG_Python_SetErrorObj                            
+#define SWIG_SetErrorMsg                        	SWIG_Python_SetErrorMsg				   
+#define SWIG_ErrorType(code)                    	SWIG_Python_ErrorType(code)                        
+#define SWIG_Error(code, msg)            		SWIG_Python_SetErrorMsg(SWIG_ErrorType(code), msg) 
+#define SWIG_fail                        		goto fail					   
+
+
+/* Runtime API implementation */
+
+/* Error manipulation */
+
+SWIGINTERN void 
+SWIG_Python_SetErrorObj(PyObject *errtype, PyObject *obj) {
+  SWIG_PYTHON_THREAD_BEGIN_BLOCK; 
+  PyErr_SetObject(errtype, obj);
+  Py_DECREF(obj);
+  SWIG_PYTHON_THREAD_END_BLOCK;
+}
+
+SWIGINTERN void 
+SWIG_Python_SetErrorMsg(PyObject *errtype, const char *msg) {
+  SWIG_PYTHON_THREAD_BEGIN_BLOCK;
+  PyErr_SetString(errtype, (char *) msg);
+  SWIG_PYTHON_THREAD_END_BLOCK;
+}
+
+#define SWIG_Python_Raise(obj, type, desc)  SWIG_Python_SetErrorObj(SWIG_Python_ExceptionType(desc), obj)
+
+/* Set a constant value */
+
+SWIGINTERN void
+SWIG_Python_SetConstant(PyObject *d, const char *name, PyObject *obj) {   
+  PyDict_SetItemString(d, (char*) name, obj);
+  Py_DECREF(obj);                            
+}
+
+/* Append a value to the result obj */
+
+SWIGINTERN PyObject*
+SWIG_Python_AppendOutput(PyObject* result, PyObject* obj) {
+#if !defined(SWIG_PYTHON_OUTPUT_TUPLE)
+  if (!result) {
+    result = obj;
+  } else if (result == Py_None) {
+    Py_DECREF(result);
+    result = obj;
+  } else {
+    if (!PyList_Check(result)) {
+      PyObject *o2 = result;
+      result = PyList_New(1);
+      PyList_SetItem(result, 0, o2);
+    }
+    PyList_Append(result,obj);
+    Py_DECREF(obj);
+  }
+  return result;
+#else
+  PyObject*   o2;
+  PyObject*   o3;
+  if (!result) {
+    result = obj;
+  } else if (result == Py_None) {
+    Py_DECREF(result);
+    result = obj;
+  } else {
+    if (!PyTuple_Check(result)) {
+      o2 = result;
+      result = PyTuple_New(1);
+      PyTuple_SET_ITEM(result, 0, o2);
+    }
+    o3 = PyTuple_New(1);
+    PyTuple_SET_ITEM(o3, 0, obj);
+    o2 = result;
+    result = PySequence_Concat(o2, o3);
+    Py_DECREF(o2);
+    Py_DECREF(o3);
+  }
+  return result;
+#endif
+}
+
+/* Unpack the argument tuple */
+
+SWIGINTERN int
+SWIG_Python_UnpackTuple(PyObject *args, const char *name, Py_ssize_t min, Py_ssize_t max, PyObject **objs)
+{
+  if (!args) {
+    if (!min && !max) {
+      return 1;
+    } else {
+      PyErr_Format(PyExc_TypeError, "%s expected %s%d arguments, got none", 
+		   name, (min == max ? "" : "at least "), (int)min);
+      return 0;
+    }
+  }  
+  if (!PyTuple_Check(args)) {
+    PyErr_SetString(PyExc_SystemError, "UnpackTuple() argument list is not a tuple");
+    return 0;
+  } else {
+    register Py_ssize_t l = PyTuple_GET_SIZE(args);
+    if (l < min) {
+      PyErr_Format(PyExc_TypeError, "%s expected %s%d arguments, got %d", 
+		   name, (min == max ? "" : "at least "), (int)min, (int)l);
+      return 0;
+    } else if (l > max) {
+      PyErr_Format(PyExc_TypeError, "%s expected %s%d arguments, got %d", 
+		   name, (min == max ? "" : "at most "), (int)max, (int)l);
+      return 0;
+    } else {
+      register int i;
+      for (i = 0; i < l; ++i) {
+	objs[i] = PyTuple_GET_ITEM(args, i);
+      }
+      for (; l < max; ++l) {
+	objs[l] = 0;
+      }
+      return i + 1;
+    }    
+  }
+}
+
+/* A functor is a function object with one single object argument */
+#if PY_VERSION_HEX >= 0x02020000
+#define SWIG_Python_CallFunctor(functor, obj)	        PyObject_CallFunctionObjArgs(functor, obj, NULL);
+#else
+#define SWIG_Python_CallFunctor(functor, obj)	        PyObject_CallFunction(functor, "O", obj);
+#endif
+
+/*
+  Helper for static pointer initialization for both C and C++ code, for example
+  static PyObject *SWIG_STATIC_POINTER(MyVar) = NewSomething(...);
+*/
+#ifdef __cplusplus
+#define SWIG_STATIC_POINTER(var)  var
+#else
+#define SWIG_STATIC_POINTER(var)  var = 0; if (!var) var
+#endif
+
+/* -----------------------------------------------------------------------------
+ * Pointer declarations
+ * ----------------------------------------------------------------------------- */
+
+/* Flags for new pointer objects */
+#define SWIG_POINTER_NOSHADOW       (SWIG_POINTER_OWN      << 1)
+#define SWIG_POINTER_NEW            (SWIG_POINTER_NOSHADOW | SWIG_POINTER_OWN)
+
+#define SWIG_POINTER_IMPLICIT_CONV  (SWIG_POINTER_DISOWN   << 1)
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* cc-mode */
+#endif
+#endif
+
+/*  How to access Py_None */
+#if defined(_WIN32) || defined(__WIN32__) || defined(__CYGWIN__)
+#  ifndef SWIG_PYTHON_NO_BUILD_NONE
+#    ifndef SWIG_PYTHON_BUILD_NONE
+#      define SWIG_PYTHON_BUILD_NONE
+#    endif
+#  endif
+#endif
+
+#ifdef SWIG_PYTHON_BUILD_NONE
+#  ifdef Py_None
+#   undef Py_None
+#   define Py_None SWIG_Py_None()
+#  endif
+SWIGRUNTIMEINLINE PyObject * 
+_SWIG_Py_None(void)
+{
+  PyObject *none = Py_BuildValue((char*)"");
+  Py_DECREF(none);
+  return none;
+}
+SWIGRUNTIME PyObject * 
+SWIG_Py_None(void)
+{
+  static PyObject *SWIG_STATIC_POINTER(none) = _SWIG_Py_None();
+  return none;
+}
+#endif
+
+/* The python void return value */
+
+SWIGRUNTIMEINLINE PyObject * 
+SWIG_Py_Void(void)
+{
+  PyObject *none = Py_None;
+  Py_INCREF(none);
+  return none;
+}
+
+/* PySwigClientData */
+
+typedef struct {
+  PyObject *klass;
+  PyObject *newraw;
+  PyObject *newargs;
+  PyObject *destroy;
+  int delargs;
+  int implicitconv;
+} PySwigClientData;
+
+SWIGRUNTIMEINLINE int 
+SWIG_Python_CheckImplicit(swig_type_info *ty)
+{
+  PySwigClientData *data = (PySwigClientData *)ty->clientdata;
+  return data ? data->implicitconv : 0;
+}
+
+SWIGRUNTIMEINLINE PyObject *
+SWIG_Python_ExceptionType(swig_type_info *desc) {
+  PySwigClientData *data = desc ? (PySwigClientData *) desc->clientdata : 0;
+  PyObject *klass = data ? data->klass : 0;
+  return (klass ? klass : PyExc_RuntimeError);
+}
+
+
+SWIGRUNTIME PySwigClientData * 
+PySwigClientData_New(PyObject* obj)
+{
+  if (!obj) {
+    return 0;
+  } else {
+    PySwigClientData *data = (PySwigClientData *)malloc(sizeof(PySwigClientData));
+    /* the klass element */
+    data->klass = obj;
+    Py_INCREF(data->klass);
+    /* the newraw method and newargs arguments used to create a new raw instance */
+    if (PyClass_Check(obj)) {
+      data->newraw = 0;
+      data->newargs = obj;
+      Py_INCREF(obj);
+    } else {
+#if (PY_VERSION_HEX < 0x02020000)
+      data->newraw = 0;
+#else
+      data->newraw = PyObject_GetAttrString(data->klass, (char *)"__new__");
+#endif
+      if (data->newraw) {
+	Py_INCREF(data->newraw);
+	data->newargs = PyTuple_New(1);
+	PyTuple_SetItem(data->newargs, 0, obj);
+      } else {
+	data->newargs = obj;
+      }
+      Py_INCREF(data->newargs);
+    }
+    /* the destroy method, aka as the C++ delete method */
+    data->destroy = PyObject_GetAttrString(data->klass, (char *)"__swig_destroy__");
+    if (PyErr_Occurred()) {
+      PyErr_Clear();
+      data->destroy = 0;
+    }
+    if (data->destroy) {
+      int flags;
+      Py_INCREF(data->destroy);
+      flags = PyCFunction_GET_FLAGS(data->destroy);
+#ifdef METH_O
+      data->delargs = !(flags & (METH_O));
+#else
+      data->delargs = 0;
+#endif
+    } else {
+      data->delargs = 0;
+    }
+    data->implicitconv = 0;
+    return data;
+  }
+}
+
+SWIGRUNTIME void 
+PySwigClientData_Del(PySwigClientData* data)
+{
+  Py_XDECREF(data->newraw);
+  Py_XDECREF(data->newargs);
+  Py_XDECREF(data->destroy);
+}
+
+/* =============== PySwigObject =====================*/
+
+typedef struct {
+  PyObject_HEAD
+  void *ptr;
+  swig_type_info *ty;
+  int own;
+  PyObject *next;
+} PySwigObject;
+
+SWIGRUNTIME PyObject *
+PySwigObject_long(PySwigObject *v)
+{
+  return PyLong_FromVoidPtr(v->ptr);
+}
+
+SWIGRUNTIME PyObject *
+PySwigObject_format(const char* fmt, PySwigObject *v)
+{
+  PyObject *res = NULL;
+  PyObject *args = PyTuple_New(1);
+  if (args) {
+    if (PyTuple_SetItem(args, 0, PySwigObject_long(v)) == 0) {
+      PyObject *ofmt = PyString_FromString(fmt);
+      if (ofmt) {
+	res = PyString_Format(ofmt,args);
+	Py_DECREF(ofmt);
+      }
+      Py_DECREF(args);
+    }
+  }
+  return res;
+}
+
+SWIGRUNTIME PyObject *
+PySwigObject_oct(PySwigObject *v)
+{
+  return PySwigObject_format("%o",v);
+}
+
+SWIGRUNTIME PyObject *
+PySwigObject_hex(PySwigObject *v)
+{
+  return PySwigObject_format("%x",v);
+}
+
+SWIGRUNTIME PyObject *
+#ifdef METH_NOARGS
+PySwigObject_repr(PySwigObject *v)
+#else
+PySwigObject_repr(PySwigObject *v, PyObject *args)
+#endif
+{
+  const char *name = SWIG_TypePrettyName(v->ty);
+  PyObject *hex = PySwigObject_hex(v);    
+  PyObject *repr = PyString_FromFormat("<Swig Object of type '%s' at 0x%s>", name, PyString_AsString(hex));
+  Py_DECREF(hex);
+  if (v->next) {
+#ifdef METH_NOARGS
+    PyObject *nrep = PySwigObject_repr((PySwigObject *)v->next);
+#else
+    PyObject *nrep = PySwigObject_repr((PySwigObject *)v->next, args);
+#endif
+    PyString_ConcatAndDel(&repr,nrep);
+  }
+  return repr;  
+}
+
+SWIGRUNTIME int
+PySwigObject_print(PySwigObject *v, FILE *fp, int SWIGUNUSEDPARM(flags))
+{
+#ifdef METH_NOARGS
+  PyObject *repr = PySwigObject_repr(v);
+#else
+  PyObject *repr = PySwigObject_repr(v, NULL);
+#endif
+  if (repr) {
+    fputs(PyString_AsString(repr), fp);
+    Py_DECREF(repr);
+    return 0; 
+  } else {
+    return 1; 
+  }
+}
+
+SWIGRUNTIME PyObject *
+PySwigObject_str(PySwigObject *v)
+{
+  char result[SWIG_BUFFER_SIZE];
+  return SWIG_PackVoidPtr(result, v->ptr, v->ty->name, sizeof(result)) ?
+    PyString_FromString(result) : 0;
+}
+
+SWIGRUNTIME int
+PySwigObject_compare(PySwigObject *v, PySwigObject *w)
+{
+  void *i = v->ptr;
+  void *j = w->ptr;
+  return (i < j) ? -1 : ((i > j) ? 1 : 0);
+}
+
+SWIGRUNTIME PyTypeObject* _PySwigObject_type(void);
+
+SWIGRUNTIME PyTypeObject*
+PySwigObject_type(void) {
+  static PyTypeObject *SWIG_STATIC_POINTER(type) = _PySwigObject_type();
+  return type;
+}
+
+SWIGRUNTIMEINLINE int
+PySwigObject_Check(PyObject *op) {
+  return ((op)->ob_type == PySwigObject_type())
+    || (strcmp((op)->ob_type->tp_name,"PySwigObject") == 0);
+}
+
+SWIGRUNTIME PyObject *
+PySwigObject_New(void *ptr, swig_type_info *ty, int own);
+
+SWIGRUNTIME void
+PySwigObject_dealloc(PyObject *v)
+{
+  PySwigObject *sobj = (PySwigObject *) v;
+  PyObject *next = sobj->next;
+  if (sobj->own) {
+    swig_type_info *ty = sobj->ty;
+    PySwigClientData *data = ty ? (PySwigClientData *) ty->clientdata : 0;
+    PyObject *destroy = data ? data->destroy : 0;
+    if (destroy) {
+      /* destroy is always a VARARGS method */
+      PyObject *res;
+      if (data->delargs) {
+	/* we need to create a temporal object to carry the destroy operation */
+	PyObject *tmp = PySwigObject_New(sobj->ptr, ty, 0);
+	res = SWIG_Python_CallFunctor(destroy, tmp);
+	Py_DECREF(tmp);
+      } else {
+	PyCFunction meth = PyCFunction_GET_FUNCTION(destroy);
+	PyObject *mself = PyCFunction_GET_SELF(destroy);
+	res = ((*meth)(mself, v));
+      }
+      Py_XDECREF(res);
+    } else {
+      const char *name = SWIG_TypePrettyName(ty);
+#if !defined(SWIG_PYTHON_SILENT_MEMLEAK)
+      printf("swig/python detected a memory leak of type '%s', no destructor found.\n", name);
+#endif
+    }
+  } 
+  Py_XDECREF(next);
+  PyObject_DEL(v);
+}
+
+SWIGRUNTIME PyObject* 
+PySwigObject_append(PyObject* v, PyObject* next)
+{
+  PySwigObject *sobj = (PySwigObject *) v;
+#ifndef METH_O
+  PyObject *tmp = 0;
+  if (!PyArg_ParseTuple(next,(char *)"O:append", &tmp)) return NULL;
+  next = tmp;
+#endif
+  if (!PySwigObject_Check(next)) {
+    return NULL;
+  }
+  sobj->next = next;
+  Py_INCREF(next);
+  return SWIG_Py_Void();
+}
+
+SWIGRUNTIME PyObject* 
+#ifdef METH_NOARGS
+PySwigObject_next(PyObject* v)
+#else
+PySwigObject_next(PyObject* v, PyObject *SWIGUNUSEDPARM(args))
+#endif
+{
+  PySwigObject *sobj = (PySwigObject *) v;
+  if (sobj->next) {    
+    Py_INCREF(sobj->next);
+    return sobj->next;
+  } else {
+    return SWIG_Py_Void();
+  }
+}
+
+SWIGINTERN PyObject*
+#ifdef METH_NOARGS
+PySwigObject_disown(PyObject *v)
+#else
+PySwigObject_disown(PyObject* v, PyObject *SWIGUNUSEDPARM(args))
+#endif
+{
+  PySwigObject *sobj = (PySwigObject *)v;
+  sobj->own = 0;
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject*
+#ifdef METH_NOARGS
+PySwigObject_acquire(PyObject *v)
+#else
+PySwigObject_acquire(PyObject* v, PyObject *SWIGUNUSEDPARM(args))
+#endif
+{
+  PySwigObject *sobj = (PySwigObject *)v;
+  sobj->own = SWIG_POINTER_OWN;
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject*
+PySwigObject_own(PyObject *v, PyObject *args)
+{
+  PyObject *val = 0;
+#if (PY_VERSION_HEX < 0x02020000)
+  if (!PyArg_ParseTuple(args,(char *)"|O:own",&val))
+#else
+  if (!PyArg_UnpackTuple(args, (char *)"own", 0, 1, &val)) 
+#endif
+    {
+      return NULL;
+    } 
+  else
+    {
+      PySwigObject *sobj = (PySwigObject *)v;
+      PyObject *obj = PyBool_FromLong(sobj->own);
+      if (val) {
+#ifdef METH_NOARGS
+	if (PyObject_IsTrue(val)) {
+	  PySwigObject_acquire(v);
+	} else {
+	  PySwigObject_disown(v);
+	}
+#else
+	if (PyObject_IsTrue(val)) {
+	  PySwigObject_acquire(v,args);
+	} else {
+	  PySwigObject_disown(v,args);
+	}
+#endif
+      } 
+      return obj;
+    }
+}
+
+#ifdef METH_O
+static PyMethodDef
+swigobject_methods[] = {
+  {(char *)"disown",  (PyCFunction)PySwigObject_disown,  METH_NOARGS,  (char *)"releases ownership of the pointer"},
+  {(char *)"acquire", (PyCFunction)PySwigObject_acquire, METH_NOARGS,  (char *)"aquires ownership of the pointer"},
+  {(char *)"own",     (PyCFunction)PySwigObject_own,     METH_VARARGS, (char *)"returns/sets ownership of the pointer"},
+  {(char *)"append",  (PyCFunction)PySwigObject_append,  METH_O,       (char *)"appends another 'this' object"},
+  {(char *)"next",    (PyCFunction)PySwigObject_next,    METH_NOARGS,  (char *)"returns the next 'this' object"},
+  {(char *)"__repr__",(PyCFunction)PySwigObject_repr,    METH_NOARGS,  (char *)"returns object representation"},
+  {0, 0, 0, 0}  
+};
+#else
+static PyMethodDef
+swigobject_methods[] = {
+  {(char *)"disown",  (PyCFunction)PySwigObject_disown,  METH_VARARGS,  (char *)"releases ownership of the pointer"},
+  {(char *)"acquire", (PyCFunction)PySwigObject_acquire, METH_VARARGS,  (char *)"aquires ownership of the pointer"},
+  {(char *)"own",     (PyCFunction)PySwigObject_own,     METH_VARARGS,  (char *)"returns/sets ownership of the pointer"},
+  {(char *)"append",  (PyCFunction)PySwigObject_append,  METH_VARARGS,  (char *)"appends another 'this' object"},
+  {(char *)"next",    (PyCFunction)PySwigObject_next,    METH_VARARGS,  (char *)"returns the next 'this' object"},
+  {(char *)"__repr__",(PyCFunction)PySwigObject_repr,   METH_VARARGS,  (char *)"returns object representation"},
+  {0, 0, 0, 0}  
+};
+#endif
+
+#if PY_VERSION_HEX < 0x02020000
+SWIGINTERN PyObject *
+PySwigObject_getattr(PySwigObject *sobj,char *name)
+{
+  return Py_FindMethod(swigobject_methods, (PyObject *)sobj, name);
+}
+#endif
+
+SWIGRUNTIME PyTypeObject*
+_PySwigObject_type(void) {
+  static char swigobject_doc[] = "Swig object carries a C/C++ instance pointer";
+  
+  static PyNumberMethods PySwigObject_as_number = {
+    (binaryfunc)0, /*nb_add*/
+    (binaryfunc)0, /*nb_subtract*/
+    (binaryfunc)0, /*nb_multiply*/
+    (binaryfunc)0, /*nb_divide*/
+    (binaryfunc)0, /*nb_remainder*/
+    (binaryfunc)0, /*nb_divmod*/
+    (ternaryfunc)0,/*nb_power*/
+    (unaryfunc)0,  /*nb_negative*/
+    (unaryfunc)0,  /*nb_positive*/
+    (unaryfunc)0,  /*nb_absolute*/
+    (inquiry)0,    /*nb_nonzero*/
+    0,		   /*nb_invert*/
+    0,		   /*nb_lshift*/
+    0,		   /*nb_rshift*/
+    0,		   /*nb_and*/
+    0,		   /*nb_xor*/
+    0,		   /*nb_or*/
+    (coercion)0,   /*nb_coerce*/
+    (unaryfunc)PySwigObject_long, /*nb_int*/
+    (unaryfunc)PySwigObject_long, /*nb_long*/
+    (unaryfunc)0,                 /*nb_float*/
+    (unaryfunc)PySwigObject_oct,  /*nb_oct*/
+    (unaryfunc)PySwigObject_hex,  /*nb_hex*/
+#if PY_VERSION_HEX >= 0x02050000 /* 2.5.0 */
+    0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 /* nb_inplace_add -> nb_index */
+#elif PY_VERSION_HEX >= 0x02020000 /* 2.2.0 */
+    0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 /* nb_inplace_add -> nb_inplace_true_divide */
+#elif PY_VERSION_HEX >= 0x02000000 /* 2.0.0 */
+    0,0,0,0,0,0,0,0,0,0,0 /* nb_inplace_add -> nb_inplace_or */
+#endif
+  };
+
+  static PyTypeObject pyswigobject_type;  
+  static int type_init = 0;
+  if (!type_init) {
+    const PyTypeObject tmp
+      = {
+	PyObject_HEAD_INIT(NULL)
+	0,				    /* ob_size */
+	(char *)"PySwigObject",		    /* tp_name */
+	sizeof(PySwigObject),		    /* tp_basicsize */
+	0,			            /* tp_itemsize */
+	(destructor)PySwigObject_dealloc,   /* tp_dealloc */
+	(printfunc)PySwigObject_print,	    /* tp_print */
+#if PY_VERSION_HEX < 0x02020000
+	(getattrfunc)PySwigObject_getattr,  /* tp_getattr */ 
+#else
+	(getattrfunc)0,			    /* tp_getattr */ 
+#endif
+	(setattrfunc)0,			    /* tp_setattr */ 
+	(cmpfunc)PySwigObject_compare,	    /* tp_compare */ 
+	(reprfunc)PySwigObject_repr,	    /* tp_repr */    
+	&PySwigObject_as_number,	    /* tp_as_number */
+	0,				    /* tp_as_sequence */
+	0,				    /* tp_as_mapping */
+	(hashfunc)0,			    /* tp_hash */
+	(ternaryfunc)0,			    /* tp_call */
+	(reprfunc)PySwigObject_str,	    /* tp_str */
+	PyObject_GenericGetAttr,            /* tp_getattro */
+	0,				    /* tp_setattro */
+	0,		                    /* tp_as_buffer */
+	Py_TPFLAGS_DEFAULT,	            /* tp_flags */
+	swigobject_doc, 	            /* tp_doc */        
+	0,                                  /* tp_traverse */
+	0,                                  /* tp_clear */
+	0,                                  /* tp_richcompare */
+	0,                                  /* tp_weaklistoffset */
+#if PY_VERSION_HEX >= 0x02020000
+	0,                                  /* tp_iter */
+	0,                                  /* tp_iternext */
+	swigobject_methods,		    /* tp_methods */ 
+	0,			            /* tp_members */
+	0,				    /* tp_getset */	    	
+	0,			            /* tp_base */	        
+	0,				    /* tp_dict */	    	
+	0,				    /* tp_descr_get */  	
+	0,				    /* tp_descr_set */  	
+	0,				    /* tp_dictoffset */ 	
+	0,				    /* tp_init */	    	
+	0,				    /* tp_alloc */	    	
+	0,			            /* tp_new */	    	
+	0,	                            /* tp_free */	   
+        0,                                  /* tp_is_gc */  
+	0,				    /* tp_bases */   
+	0,				    /* tp_mro */
+	0,				    /* tp_cache */   
+ 	0,				    /* tp_subclasses */
+	0,				    /* tp_weaklist */
+#endif
+#if PY_VERSION_HEX >= 0x02030000
+	0,                                  /* tp_del */
+#endif
+#ifdef COUNT_ALLOCS
+	0,0,0,0                             /* tp_alloc -> tp_next */
+#endif
+      };
+    pyswigobject_type = tmp;
+    pyswigobject_type.ob_type = &PyType_Type;
+    type_init = 1;
+  }
+  return &pyswigobject_type;
+}
+
+SWIGRUNTIME PyObject *
+PySwigObject_New(void *ptr, swig_type_info *ty, int own)
+{
+  PySwigObject *sobj = PyObject_NEW(PySwigObject, PySwigObject_type());
+  if (sobj) {
+    sobj->ptr  = ptr;
+    sobj->ty   = ty;
+    sobj->own  = own;
+    sobj->next = 0;
+  }
+  return (PyObject *)sobj;
+}
+
+/* -----------------------------------------------------------------------------
+ * Implements a simple Swig Packed type, and use it instead of string
+ * ----------------------------------------------------------------------------- */
+
+typedef struct {
+  PyObject_HEAD
+  void *pack;
+  swig_type_info *ty;
+  size_t size;
+} PySwigPacked;
+
+SWIGRUNTIME int
+PySwigPacked_print(PySwigPacked *v, FILE *fp, int SWIGUNUSEDPARM(flags))
+{
+  char result[SWIG_BUFFER_SIZE];
+  fputs("<Swig Packed ", fp); 
+  if (SWIG_PackDataName(result, v->pack, v->size, 0, sizeof(result))) {
+    fputs("at ", fp); 
+    fputs(result, fp); 
+  }
+  fputs(v->ty->name,fp); 
+  fputs(">", fp);
+  return 0; 
+}
+  
+SWIGRUNTIME PyObject *
+PySwigPacked_repr(PySwigPacked *v)
+{
+  char result[SWIG_BUFFER_SIZE];
+  if (SWIG_PackDataName(result, v->pack, v->size, 0, sizeof(result))) {
+    return PyString_FromFormat("<Swig Packed at %s%s>", result, v->ty->name);
+  } else {
+    return PyString_FromFormat("<Swig Packed %s>", v->ty->name);
+  }  
+}
+
+SWIGRUNTIME PyObject *
+PySwigPacked_str(PySwigPacked *v)
+{
+  char result[SWIG_BUFFER_SIZE];
+  if (SWIG_PackDataName(result, v->pack, v->size, 0, sizeof(result))){
+    return PyString_FromFormat("%s%s", result, v->ty->name);
+  } else {
+    return PyString_FromString(v->ty->name);
+  }  
+}
+
+SWIGRUNTIME int
+PySwigPacked_compare(PySwigPacked *v, PySwigPacked *w)
+{
+  size_t i = v->size;
+  size_t j = w->size;
+  int s = (i < j) ? -1 : ((i > j) ? 1 : 0);
+  return s ? s : strncmp((char *)v->pack, (char *)w->pack, 2*v->size);
+}
+
+SWIGRUNTIME PyTypeObject* _PySwigPacked_type(void);
+
+SWIGRUNTIME PyTypeObject*
+PySwigPacked_type(void) {
+  static PyTypeObject *SWIG_STATIC_POINTER(type) = _PySwigPacked_type();
+  return type;
+}
+
+SWIGRUNTIMEINLINE int
+PySwigPacked_Check(PyObject *op) {
+  return ((op)->ob_type == _PySwigPacked_type()) 
+    || (strcmp((op)->ob_type->tp_name,"PySwigPacked") == 0);
+}
+
+SWIGRUNTIME void
+PySwigPacked_dealloc(PyObject *v)
+{
+  if (PySwigPacked_Check(v)) {
+    PySwigPacked *sobj = (PySwigPacked *) v;
+    free(sobj->pack);
+  }
+  PyObject_DEL(v);
+}
+
+SWIGRUNTIME PyTypeObject*
+_PySwigPacked_type(void) {
+  static char swigpacked_doc[] = "Swig object carries a C/C++ instance pointer";
+  static PyTypeObject pyswigpacked_type;
+  static int type_init = 0;  
+  if (!type_init) {
+    const PyTypeObject tmp
+      = {
+	PyObject_HEAD_INIT(NULL)
+	0,				    /* ob_size */	
+	(char *)"PySwigPacked",		    /* tp_name */	
+	sizeof(PySwigPacked),		    /* tp_basicsize */	
+	0,				    /* tp_itemsize */	
+	(destructor)PySwigPacked_dealloc,   /* tp_dealloc */	
+	(printfunc)PySwigPacked_print,	    /* tp_print */   	
+	(getattrfunc)0,			    /* tp_getattr */ 	
+	(setattrfunc)0,			    /* tp_setattr */ 	
+	(cmpfunc)PySwigPacked_compare,	    /* tp_compare */ 	
+	(reprfunc)PySwigPacked_repr,	    /* tp_repr */    	
+	0,	                            /* tp_as_number */	
+	0,				    /* tp_as_sequence */
+	0,				    /* tp_as_mapping */	
+	(hashfunc)0,			    /* tp_hash */	
+	(ternaryfunc)0,			    /* tp_call */	
+	(reprfunc)PySwigPacked_str,	    /* tp_str */	
+	PyObject_GenericGetAttr,            /* tp_getattro */
+	0,				    /* tp_setattro */
+	0,		                    /* tp_as_buffer */
+	Py_TPFLAGS_DEFAULT,	            /* tp_flags */
+	swigpacked_doc, 	            /* tp_doc */
+	0,                                  /* tp_traverse */
+	0,                                  /* tp_clear */
+	0,                                  /* tp_richcompare */
+	0,                                  /* tp_weaklistoffset */
+#if PY_VERSION_HEX >= 0x02020000
+	0,                                  /* tp_iter */
+	0,                                  /* tp_iternext */
+	0,		                    /* tp_methods */ 
+	0,			            /* tp_members */
+	0,				    /* tp_getset */	    	
+	0,			            /* tp_base */	        
+	0,				    /* tp_dict */	    	
+	0,				    /* tp_descr_get */  	
+	0,				    /* tp_descr_set */  	
+	0,				    /* tp_dictoffset */ 	
+	0,				    /* tp_init */	    	
+	0,				    /* tp_alloc */	    	
+	0,			            /* tp_new */	    	
+	0, 	                            /* tp_free */	   
+        0,                                  /* tp_is_gc */  
+	0,				    /* tp_bases */   
+	0,				    /* tp_mro */
+	0,				    /* tp_cache */   
+ 	0,				    /* tp_subclasses */
+	0,				    /* tp_weaklist */
+#endif
+#if PY_VERSION_HEX >= 0x02030000
+	0,                                  /* tp_del */
+#endif
+#ifdef COUNT_ALLOCS
+	0,0,0,0                             /* tp_alloc -> tp_next */
+#endif
+      };
+    pyswigpacked_type = tmp;
+    pyswigpacked_type.ob_type = &PyType_Type;
+    type_init = 1;
+  }
+  return &pyswigpacked_type;
+}
+
+SWIGRUNTIME PyObject *
+PySwigPacked_New(void *ptr, size_t size, swig_type_info *ty)
+{
+  PySwigPacked *sobj = PyObject_NEW(PySwigPacked, PySwigPacked_type());
+  if (sobj) {
+    void *pack = malloc(size);
+    if (pack) {
+      memcpy(pack, ptr, size);
+      sobj->pack = pack;
+      sobj->ty   = ty;
+      sobj->size = size;
+    } else {
+      PyObject_DEL((PyObject *) sobj);
+      sobj = 0;
+    }
+  }
+  return (PyObject *) sobj;
+}
+
+SWIGRUNTIME swig_type_info *
+PySwigPacked_UnpackData(PyObject *obj, void *ptr, size_t size)
+{
+  if (PySwigPacked_Check(obj)) {
+    PySwigPacked *sobj = (PySwigPacked *)obj;
+    if (sobj->size != size) return 0;
+    memcpy(ptr, sobj->pack, size);
+    return sobj->ty;
+  } else {
+    return 0;
+  }
+}
+
+/* -----------------------------------------------------------------------------
+ * pointers/data manipulation
+ * ----------------------------------------------------------------------------- */
+
+SWIGRUNTIMEINLINE PyObject *
+_SWIG_This(void)
+{
+  return PyString_FromString("this");
+}
+
+SWIGRUNTIME PyObject *
+SWIG_This(void)
+{
+  static PyObject *SWIG_STATIC_POINTER(swig_this) = _SWIG_This();
+  return swig_this;
+}
+
+/* #define SWIG_PYTHON_SLOW_GETSET_THIS */
+
+SWIGRUNTIME PySwigObject *
+SWIG_Python_GetSwigThis(PyObject *pyobj) 
+{
+  if (PySwigObject_Check(pyobj)) {
+    return (PySwigObject *) pyobj;
+  } else {
+    PyObject *obj = 0;
+#if (!defined(SWIG_PYTHON_SLOW_GETSET_THIS) && (PY_VERSION_HEX >= 0x02030000))
+    if (PyInstance_Check(pyobj)) {
+      obj = _PyInstance_Lookup(pyobj, SWIG_This());      
+    } else {
+      PyObject **dictptr = _PyObject_GetDictPtr(pyobj);
+      if (dictptr != NULL) {
+	PyObject *dict = *dictptr;
+	obj = dict ? PyDict_GetItem(dict, SWIG_This()) : 0;
+      } else {
+#ifdef PyWeakref_CheckProxy
+	if (PyWeakref_CheckProxy(pyobj)) {
+	  PyObject *wobj = PyWeakref_GET_OBJECT(pyobj);
+	  return wobj ? SWIG_Python_GetSwigThis(wobj) : 0;
+	}
+#endif
+	obj = PyObject_GetAttr(pyobj,SWIG_This());
+	if (obj) {
+	  Py_DECREF(obj);
+	} else {
+	  if (PyErr_Occurred()) PyErr_Clear();
+	  return 0;
+	}
+      }
+    }
+#else
+    obj = PyObject_GetAttr(pyobj,SWIG_This());
+    if (obj) {
+      Py_DECREF(obj);
+    } else {
+      if (PyErr_Occurred()) PyErr_Clear();
+      return 0;
+    }
+#endif
+    if (obj && !PySwigObject_Check(obj)) {
+      /* a PyObject is called 'this', try to get the 'real this'
+	 PySwigObject from it */ 
+      return SWIG_Python_GetSwigThis(obj);
+    }
+    return (PySwigObject *)obj;
+  }
+}
+
+/* Acquire a pointer value */
+
+SWIGRUNTIME int
+SWIG_Python_AcquirePtr(PyObject *obj, int own) {
+  if (own) {
+    PySwigObject *sobj = SWIG_Python_GetSwigThis(obj);
+    if (sobj) {
+      int oldown = sobj->own;
+      sobj->own = own;
+      return oldown;
+    }
+  }
+  return 0;
+}
+
+/* Convert a pointer value */
+
+SWIGRUNTIME int
+SWIG_Python_ConvertPtrAndOwn(PyObject *obj, void **ptr, swig_type_info *ty, int flags, int *own) {
+  if (!obj) return SWIG_ERROR;
+  if (obj == Py_None) {
+    if (ptr) *ptr = 0;
+    return SWIG_OK;
+  } else {
+    PySwigObject *sobj = SWIG_Python_GetSwigThis(obj);
+    while (sobj) {
+      void *vptr = sobj->ptr;
+      if (ty) {
+	swig_type_info *to = sobj->ty;
+	if (to == ty) {
+	  /* no type cast needed */
+	  if (ptr) *ptr = vptr;
+	  break;
+	} else {
+	  swig_cast_info *tc = SWIG_TypeCheck(to->name,ty);
+	  if (!tc) {
+	    sobj = (PySwigObject *)sobj->next;
+	  } else {
+	    if (ptr) *ptr = SWIG_TypeCast(tc,vptr);
+	    break;
+	  }
+	}
+      } else {
+	if (ptr) *ptr = vptr;
+	break;
+      }
+    }
+    if (sobj) {
+      if (own) *own = sobj->own;
+      if (flags & SWIG_POINTER_DISOWN) {
+	sobj->own = 0;
+      }
+      return SWIG_OK;
+    } else {
+      int res = SWIG_ERROR;
+      if (flags & SWIG_POINTER_IMPLICIT_CONV) {
+	PySwigClientData *data = ty ? (PySwigClientData *) ty->clientdata : 0;
+	if (data && !data->implicitconv) {
+	  PyObject *klass = data->klass;
+	  if (klass) {
+	    PyObject *impconv;
+	    data->implicitconv = 1; /* avoid recursion and call 'explicit' constructors*/
+	    impconv = SWIG_Python_CallFunctor(klass, obj);
+	    data->implicitconv = 0;
+	    if (PyErr_Occurred()) {
+	      PyErr_Clear();
+	      impconv = 0;
+	    }
+	    if (impconv) {
+	      PySwigObject *iobj = SWIG_Python_GetSwigThis(impconv);
+	      if (iobj) {
+		void *vptr;
+		res = SWIG_Python_ConvertPtrAndOwn((PyObject*)iobj, &vptr, ty, 0, 0);
+		if (SWIG_IsOK(res)) {
+		  if (ptr) {
+		    *ptr = vptr;
+		    /* transfer the ownership to 'ptr' */
+		    iobj->own = 0;
+		    res = SWIG_AddCast(res);
+		    res = SWIG_AddNewMask(res);
+		  } else {
+		    res = SWIG_AddCast(res);		    
+		  }
+		}
+	      }
+	      Py_DECREF(impconv);
+	    }
+	  }
+	}
+      }
+      return res;
+    }
+  }
+}
+
+/* Convert a function ptr value */
+
+SWIGRUNTIME int
+SWIG_Python_ConvertFunctionPtr(PyObject *obj, void **ptr, swig_type_info *ty) {
+  if (!PyCFunction_Check(obj)) {
+    return SWIG_ConvertPtr(obj, ptr, ty, 0);
+  } else {
+    void *vptr = 0;
+    
+    /* here we get the method pointer for callbacks */
+    const char *doc = (((PyCFunctionObject *)obj) -> m_ml -> ml_doc);
+    const char *desc = doc ? strstr(doc, "swig_ptr: ") : 0;
+    if (desc) {
+      desc = ty ? SWIG_UnpackVoidPtr(desc + 10, &vptr, ty->name) : 0;
+      if (!desc) return SWIG_ERROR;
+    }
+    if (ty) {
+      swig_cast_info *tc = SWIG_TypeCheck(desc,ty);
+      if (!tc) return SWIG_ERROR;
+      *ptr = SWIG_TypeCast(tc,vptr);
+    } else {
+      *ptr = vptr;
+    }
+    return SWIG_OK;
+  }
+}
+
+/* Convert a packed value value */
+
+SWIGRUNTIME int
+SWIG_Python_ConvertPacked(PyObject *obj, void *ptr, size_t sz, swig_type_info *ty) {
+  swig_type_info *to = PySwigPacked_UnpackData(obj, ptr, sz);
+  if (!to) return SWIG_ERROR;
+  if (ty) {
+    if (to != ty) {
+      /* check type cast? */
+      swig_cast_info *tc = SWIG_TypeCheck(to->name,ty);
+      if (!tc) return SWIG_ERROR;
+    }
+  }
+  return SWIG_OK;
+}  
+
+/* -----------------------------------------------------------------------------
+ * Create a new pointer object
+ * ----------------------------------------------------------------------------- */
+
+/*
+  Create a new instance object, whitout calling __init__, and set the
+  'this' attribute.
+*/
+
+SWIGRUNTIME PyObject* 
+SWIG_Python_NewShadowInstance(PySwigClientData *data, PyObject *swig_this)
+{
+#if (PY_VERSION_HEX >= 0x02020000)
+  PyObject *inst = 0;
+  PyObject *newraw = data->newraw;
+  if (newraw) {
+    inst = PyObject_Call(newraw, data->newargs, NULL);
+    if (inst) {
+#if !defined(SWIG_PYTHON_SLOW_GETSET_THIS)
+      PyObject **dictptr = _PyObject_GetDictPtr(inst);
+      if (dictptr != NULL) {
+	PyObject *dict = *dictptr;
+	if (dict == NULL) {
+	  dict = PyDict_New();
+	  *dictptr = dict;
+	  PyDict_SetItem(dict, SWIG_This(), swig_this);
+	}
+      }
+#else
+      PyObject *key = SWIG_This();
+      PyObject_SetAttr(inst, key, swig_this);
+#endif
+    }
+  } else {
+    PyObject *dict = PyDict_New();
+    PyDict_SetItem(dict, SWIG_This(), swig_this);
+    inst = PyInstance_NewRaw(data->newargs, dict);
+    Py_DECREF(dict);
+  }
+  return inst;
+#else
+#if (PY_VERSION_HEX >= 0x02010000)
+  PyObject *inst;
+  PyObject *dict = PyDict_New();
+  PyDict_SetItem(dict, SWIG_This(), swig_this);
+  inst = PyInstance_NewRaw(data->newargs, dict);
+  Py_DECREF(dict);
+  return (PyObject *) inst;
+#else
+  PyInstanceObject *inst = PyObject_NEW(PyInstanceObject, &PyInstance_Type);
+  if (inst == NULL) {
+    return NULL;
+  }
+  inst->in_class = (PyClassObject *)data->newargs;
+  Py_INCREF(inst->in_class);
+  inst->in_dict = PyDict_New();
+  if (inst->in_dict == NULL) {
+    Py_DECREF(inst);
+    return NULL;
+  }
+#ifdef Py_TPFLAGS_HAVE_WEAKREFS
+  inst->in_weakreflist = NULL;
+#endif
+#ifdef Py_TPFLAGS_GC
+  PyObject_GC_Init(inst);
+#endif
+  PyDict_SetItem(inst->in_dict, SWIG_This(), swig_this);
+  return (PyObject *) inst;
+#endif
+#endif
+}
+
+SWIGRUNTIME void
+SWIG_Python_SetSwigThis(PyObject *inst, PyObject *swig_this)
+{
+ PyObject *dict;
+#if (PY_VERSION_HEX >= 0x02020000) && !defined(SWIG_PYTHON_SLOW_GETSET_THIS)
+ PyObject **dictptr = _PyObject_GetDictPtr(inst);
+ if (dictptr != NULL) {
+   dict = *dictptr;
+   if (dict == NULL) {
+     dict = PyDict_New();
+     *dictptr = dict;
+   }
+   PyDict_SetItem(dict, SWIG_This(), swig_this);
+   return;
+ }
+#endif
+ dict = PyObject_GetAttrString(inst, (char*)"__dict__");
+ PyDict_SetItem(dict, SWIG_This(), swig_this);
+ Py_DECREF(dict);
+} 
+
+
+SWIGINTERN PyObject *
+SWIG_Python_InitShadowInstance(PyObject *args) {
+  PyObject *obj[2];
+  if (!SWIG_Python_UnpackTuple(args,(char*)"swiginit", 2, 2, obj)) {
+    return NULL;
+  } else {
+    PySwigObject *sthis = SWIG_Python_GetSwigThis(obj[0]);
+    if (sthis) {
+      PySwigObject_append((PyObject*) sthis, obj[1]);
+    } else {
+      SWIG_Python_SetSwigThis(obj[0], obj[1]);
+    }
+    return SWIG_Py_Void();
+  }
+}
+
+/* Create a new pointer object */
+
+SWIGRUNTIME PyObject *
+SWIG_Python_NewPointerObj(void *ptr, swig_type_info *type, int flags) {
+  if (!ptr) {
+    return SWIG_Py_Void();
+  } else {
+    int own = (flags & SWIG_POINTER_OWN) ? SWIG_POINTER_OWN : 0;
+    PyObject *robj = PySwigObject_New(ptr, type, own);
+    PySwigClientData *clientdata = type ? (PySwigClientData *)(type->clientdata) : 0;
+    if (clientdata && !(flags & SWIG_POINTER_NOSHADOW)) {
+      PyObject *inst = SWIG_Python_NewShadowInstance(clientdata, robj);
+      if (inst) {
+	Py_DECREF(robj);
+	robj = inst;
+      }
+    }
+    return robj;
+  }
+}
+
+/* Create a new packed object */
+
+SWIGRUNTIMEINLINE PyObject *
+SWIG_Python_NewPackedObj(void *ptr, size_t sz, swig_type_info *type) {
+  return ptr ? PySwigPacked_New((void *) ptr, sz, type) : SWIG_Py_Void();
+}
+
+/* -----------------------------------------------------------------------------*
+ *  Get type list 
+ * -----------------------------------------------------------------------------*/
+
+#ifdef SWIG_LINK_RUNTIME
+void *SWIG_ReturnGlobalTypeList(void *);
+#endif
+
+SWIGRUNTIME swig_module_info *
+SWIG_Python_GetModule(void) {
+  static void *type_pointer = (void *)0;
+  /* first check if module already created */
+  if (!type_pointer) {
+#ifdef SWIG_LINK_RUNTIME
+    type_pointer = SWIG_ReturnGlobalTypeList((void *)0);
+#else
+    type_pointer = PyCObject_Import((char*)"swig_runtime_data" SWIG_RUNTIME_VERSION,
+				    (char*)"type_pointer" SWIG_TYPE_TABLE_NAME);
+    if (PyErr_Occurred()) {
+      PyErr_Clear();
+      type_pointer = (void *)0;
+    }
+#endif
+  }
+  return (swig_module_info *) type_pointer;
+}
+
+#if PY_MAJOR_VERSION < 2
+/* PyModule_AddObject function was introduced in Python 2.0.  The following function
+   is copied out of Python/modsupport.c in python version 2.3.4 */
+SWIGINTERN int
+PyModule_AddObject(PyObject *m, char *name, PyObject *o)
+{
+  PyObject *dict;
+  if (!PyModule_Check(m)) {
+    PyErr_SetString(PyExc_TypeError,
+		    "PyModule_AddObject() needs module as first arg");
+    return SWIG_ERROR;
+  }
+  if (!o) {
+    PyErr_SetString(PyExc_TypeError,
+		    "PyModule_AddObject() needs non-NULL value");
+    return SWIG_ERROR;
+  }
+  
+  dict = PyModule_GetDict(m);
+  if (dict == NULL) {
+    /* Internal error -- modules must have a dict! */
+    PyErr_Format(PyExc_SystemError, "module '%s' has no __dict__",
+		 PyModule_GetName(m));
+    return SWIG_ERROR;
+  }
+  if (PyDict_SetItemString(dict, name, o))
+    return SWIG_ERROR;
+  Py_DECREF(o);
+  return SWIG_OK;
+}
+#endif
+
+SWIGRUNTIME void
+SWIG_Python_DestroyModule(void *vptr)
+{
+  swig_module_info *swig_module = (swig_module_info *) vptr;
+  swig_type_info **types = swig_module->types;
+  size_t i;
+  for (i =0; i < swig_module->size; ++i) {
+    swig_type_info *ty = types[i];
+    if (ty->owndata) {
+      PySwigClientData *data = (PySwigClientData *) ty->clientdata;
+      if (data) PySwigClientData_Del(data);
+    }
+  }
+  Py_DECREF(SWIG_This());
+}
+
+SWIGRUNTIME void
+SWIG_Python_SetModule(swig_module_info *swig_module) {
+  static PyMethodDef swig_empty_runtime_method_table[] = { {NULL, NULL, 0, NULL} };/* Sentinel */
+
+  PyObject *module = Py_InitModule((char*)"swig_runtime_data" SWIG_RUNTIME_VERSION,
+				   swig_empty_runtime_method_table);
+  PyObject *pointer = PyCObject_FromVoidPtr((void *) swig_module, SWIG_Python_DestroyModule);
+  if (pointer && module) {
+    PyModule_AddObject(module, (char*)"type_pointer" SWIG_TYPE_TABLE_NAME, pointer);
+  } else {
+    Py_XDECREF(pointer);
+  }
+}
+
+/* The python cached type query */
+SWIGRUNTIME PyObject *
+SWIG_Python_TypeCache(void) {
+  static PyObject *SWIG_STATIC_POINTER(cache) = PyDict_New();
+  return cache;
+}
+
+SWIGRUNTIME swig_type_info *
+SWIG_Python_TypeQuery(const char *type)
+{
+  PyObject *cache = SWIG_Python_TypeCache();
+  PyObject *key = PyString_FromString(type); 
+  PyObject *obj = PyDict_GetItem(cache, key);
+  swig_type_info *descriptor;
+  if (obj) {
+    descriptor = (swig_type_info *) PyCObject_AsVoidPtr(obj);
+  } else {
+    swig_module_info *swig_module = SWIG_Python_GetModule();
+    descriptor = SWIG_TypeQueryModule(swig_module, swig_module, type);
+    if (descriptor) {
+      obj = PyCObject_FromVoidPtr(descriptor, NULL);
+      PyDict_SetItem(cache, key, obj);
+      Py_DECREF(obj);
+    }
+  }
+  Py_DECREF(key);
+  return descriptor;
+}
+
+/* 
+   For backward compatibility only
+*/
+#define SWIG_POINTER_EXCEPTION  0
+#define SWIG_arg_fail(arg)      SWIG_Python_ArgFail(arg)
+#define SWIG_MustGetPtr(p, type, argnum, flags)  SWIG_Python_MustGetPtr(p, type, argnum, flags)
+
+SWIGRUNTIME int
+SWIG_Python_AddErrMesg(const char* mesg, int infront)
+{
+  if (PyErr_Occurred()) {
+    PyObject *type = 0;
+    PyObject *value = 0;
+    PyObject *traceback = 0;
+    PyErr_Fetch(&type, &value, &traceback);
+    if (value) {
+      PyObject *old_str = PyObject_Str(value);
+      Py_XINCREF(type);
+      PyErr_Clear();
+      if (infront) {
+	PyErr_Format(type, "%s %s", mesg, PyString_AsString(old_str));
+      } else {
+	PyErr_Format(type, "%s %s", PyString_AsString(old_str), mesg);
+      }
+      Py_DECREF(old_str);
+    }
+    return 1;
+  } else {
+    return 0;
+  }
+}
+  
+SWIGRUNTIME int
+SWIG_Python_ArgFail(int argnum)
+{
+  if (PyErr_Occurred()) {
+    /* add information about failing argument */
+    char mesg[256];
+    PyOS_snprintf(mesg, sizeof(mesg), "argument number %d:", argnum);
+    return SWIG_Python_AddErrMesg(mesg, 1);
+  } else {
+    return 0;
+  }
+}
+
+SWIGRUNTIMEINLINE const char *
+PySwigObject_GetDesc(PyObject *self)
+{
+  PySwigObject *v = (PySwigObject *)self;
+  swig_type_info *ty = v ? v->ty : 0;
+  return ty ? ty->str : (char*)"";
+}
+
+SWIGRUNTIME void
+SWIG_Python_TypeError(const char *type, PyObject *obj)
+{
+  if (type) {
+#if defined(SWIG_COBJECT_TYPES)
+    if (obj && PySwigObject_Check(obj)) {
+      const char *otype = (const char *) PySwigObject_GetDesc(obj);
+      if (otype) {
+	PyErr_Format(PyExc_TypeError, "a '%s' is expected, 'PySwigObject(%s)' is received",
+		     type, otype);
+	return;
+      }
+    } else 
+#endif      
+    {
+      const char *otype = (obj ? obj->ob_type->tp_name : 0); 
+      if (otype) {
+	PyObject *str = PyObject_Str(obj);
+	const char *cstr = str ? PyString_AsString(str) : 0;
+	if (cstr) {
+	  PyErr_Format(PyExc_TypeError, "a '%s' is expected, '%s(%s)' is received",
+		       type, otype, cstr);
+	} else {
+	  PyErr_Format(PyExc_TypeError, "a '%s' is expected, '%s' is received",
+		       type, otype);
+	}
+	Py_XDECREF(str);
+	return;
+      }
+    }   
+    PyErr_Format(PyExc_TypeError, "a '%s' is expected", type);
+  } else {
+    PyErr_Format(PyExc_TypeError, "unexpected type is received");
+  }
+}
+
+
+/* Convert a pointer value, signal an exception on a type mismatch */
+SWIGRUNTIME void *
+SWIG_Python_MustGetPtr(PyObject *obj, swig_type_info *ty, int argnum, int flags) {
+  void *result;
+  if (SWIG_Python_ConvertPtr(obj, &result, ty, flags) == -1) {
+    PyErr_Clear();
+    if (flags & SWIG_POINTER_EXCEPTION) {
+      SWIG_Python_TypeError(SWIG_TypePrettyName(ty), obj);
+      SWIG_Python_ArgFail(argnum);
+    }
+  }
+  return result;
+}
+
+
+#ifdef __cplusplus
+#if 0
+{ /* cc-mode */
+#endif
+}
+#endif
+
+
+
+#define SWIG_exception_fail(code, msg) do { SWIG_Error(code, msg); SWIG_fail; } while(0) 
+
+#define SWIG_contract_assert(expr, msg) if (!(expr)) { SWIG_Error(SWIG_RuntimeError, msg); SWIG_fail; } else 
+
+
+
+/* -------- TYPES TABLE (BEGIN) -------- */
+
+#define SWIGTYPE_p_FILE swig_types[0]
+#define SWIGTYPE_p_MAC swig_types[1]
+#define SWIGTYPE_p_Mote swig_types[2]
+#define SWIGTYPE_p_Packet swig_types[3]
+#define SWIGTYPE_p_Radio swig_types[4]
+#define SWIGTYPE_p_Tossim swig_types[5]
+#define SWIGTYPE_p_Variable swig_types[6]
+#define SWIGTYPE_p_char swig_types[7]
+#define SWIGTYPE_p_int swig_types[8]
+#define SWIGTYPE_p_nesc_app swig_types[9]
+#define SWIGTYPE_p_p_char swig_types[10]
+#define SWIGTYPE_p_var_string swig_types[11]
+static swig_type_info *swig_types[13];
+static swig_module_info swig_module = {swig_types, 12, 0, 0, 0, 0};
+#define SWIG_TypeQuery(name) SWIG_TypeQueryModule(&swig_module, &swig_module, name)
+#define SWIG_MangledTypeQuery(name) SWIG_MangledTypeQueryModule(&swig_module, &swig_module, name)
+
+/* -------- TYPES TABLE (END) -------- */
+
+#if (PY_VERSION_HEX <= 0x02000000)
+# if !defined(SWIG_PYTHON_CLASSIC)
+#  error "This python version requires swig to be run with the '-classic' option"
+# endif
+#endif
+
+/*-----------------------------------------------
+              @(target):= _TOSSIM.so
+  ------------------------------------------------*/
+#define SWIG_init    init_TOSSIM
+
+#define SWIG_name    "_TOSSIM"
+
+#define SWIGVERSION 0x010333 
+#define SWIG_VERSION SWIGVERSION
+
+
+#define SWIG_as_voidptr(a) const_cast< void * >(static_cast< const void * >(a)) 
+#define SWIG_as_voidptrptr(a) ((void)SWIG_as_voidptr(*a),reinterpret_cast< void** >(a)) 
+
+
+#include <stdexcept>
+
+
+namespace swig {
+  class PyObject_ptr {
+  protected:
+    PyObject *_obj;
+
+  public:
+    PyObject_ptr() :_obj(0)
+    {
+    }
+
+    PyObject_ptr(const PyObject_ptr& item) : _obj(item._obj)
+    {
+      Py_XINCREF(_obj);      
+    }
+    
+    PyObject_ptr(PyObject *obj, bool initial_ref = true) :_obj(obj)
+    {
+      if (initial_ref) Py_XINCREF(_obj);
+    }
+    
+    PyObject_ptr & operator=(const PyObject_ptr& item) 
+    {
+      Py_XINCREF(item._obj);
+      Py_XDECREF(_obj);
+      _obj = item._obj;
+      return *this;      
+    }
+    
+    ~PyObject_ptr() 
+    {
+      Py_XDECREF(_obj);
+    }
+    
+    operator PyObject *() const
+    {
+      return _obj;
+    }
+
+    PyObject *operator->() const
+    {
+      return _obj;
+    }
+  };
+}
+
+
+namespace swig {
+  struct PyObject_var : PyObject_ptr {
+    PyObject_var(PyObject* obj = 0) : PyObject_ptr(obj, false) { }
+    
+    PyObject_var & operator = (PyObject* obj)
+    {
+      Py_XDECREF(_obj);
+      _obj = obj;
+      return *this;      
+    }
+  };
+}
+
+
+#include <memory.h>
+#include <tossim.h>
+
+enum {
+  PRIMITIVE_INTEGER      = 0,
+  PRIMITIVE_FLOAT   = 1,
+  PRIMITIVE_UNKNOWN = 2
+};
+
+int lengthOfType(char* type) {
+  if (strcmp(type, "uint8_t") == 0) {
+    return sizeof(uint8_t);
+  }
+  else if (strcmp(type, "uint16_t") == 0) {
+    return sizeof(uint16_t);
+  }
+  else if (strcmp(type, "uint32_t") == 0) {
+    return sizeof(uint32_t);
+  }
+  else if (strcmp(type, "int8_t") == 0) {
+    return sizeof(int8_t);
+  }
+  else if (strcmp(type, "int16_t") == 0) {
+    return sizeof(int16_t);
+  }
+  else if (strcmp(type, "int32_t") == 0) {
+    return sizeof(int32_t);
+  }
+  else if (strcmp(type, "char") == 0) {
+    return sizeof(char);
+  }
+  else if (strcmp(type, "short") == 0) {
+    return sizeof(short);
+  }
+  else if (strcmp(type, "int") == 0) {
+    return sizeof(int);
+  }
+  else if (strcmp(type, "long") == 0) {
+    return sizeof(long);
+  }
+  else if (strcmp(type, "unsigned char") == 0) {
+    return sizeof(unsigned char);
+  }
+  else if (strcmp(type, "unsigned short") == 0) {
+    return sizeof(unsigned short);
+  }
+  else if (strcmp(type, "unsigned int") == 0) {
+    return sizeof(unsigned int);
+  }
+  else if (strcmp(type, "unsigned long") == 0) {
+    return sizeof(unsigned long);
+  }
+  else if (strcmp(type, "float") == 0) {
+    return sizeof(float);
+  }
+  else if (strcmp(type, "double") == 0) {
+    return sizeof(double);
+  }
+  else {
+    return 1;
+  }
+}
+
+int memoryToPrimitive(char* type, char* ptr, long* lval, double* dval) {
+  if (strcmp(type, "uint8_t") == 0) {
+    uint8_t val;
+    memcpy(&val, ptr, sizeof(uint8_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "uint16_t") == 0) {
+    uint16_t val;
+    memcpy(&val, ptr, sizeof(uint16_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "uint32_t") == 0) {
+    uint32_t val;
+    memcpy(&val, ptr, sizeof(uint32_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int8_t") == 0) {
+    int8_t val;
+    memcpy(&val, ptr, sizeof(int8_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int16_t") == 0) {
+    int16_t val;
+    memcpy(&val, ptr, sizeof(int16_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int32_t") == 0) {
+    int32_t val;
+    memcpy(&val, ptr, sizeof(int32_t));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "char") == 0) {
+    long val;
+    memcpy(&val, ptr, sizeof(char));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "short") == 0) {
+    short val;
+    memcpy(&val, ptr, sizeof(short));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "int") == 0) {
+    int val;
+    memcpy(&val, ptr, sizeof(int));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "long") == 0) {
+    long val;
+    memcpy(&val, ptr, sizeof(long));
+    *lval = val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned char") == 0) {
+    unsigned char val;
+    memcpy(&val, ptr, sizeof(unsigned char));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned short") == 0) {
+    unsigned short val;
+    memcpy(&val, ptr, sizeof(unsigned short));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned int") == 0) {
+    unsigned int val;
+    memcpy(&val, ptr, sizeof(unsigned int));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "unsigned long") == 0) {
+    unsigned long val;
+    memcpy(&val, ptr, sizeof(unsigned long));
+    *lval = (long)val;
+    return PRIMITIVE_INTEGER;
+  }
+  else if (strcmp(type, "float") == 0) {
+    float val;
+    memcpy(&val, ptr, sizeof(float));
+    *dval = (double)val;
+    return PRIMITIVE_FLOAT;
+  }
+  else if (strcmp(type, "double") == 0) {
+    double val;
+    memcpy(&val, ptr, sizeof(double));
+    *dval = val;
+    return PRIMITIVE_FLOAT;
+  }
+  else {
+    return PRIMITIVE_UNKNOWN;
+  }
+}
+
+PyObject* valueFromScalar(char* type, char* ptr, int len) {
+  long lval;
+  double dval;
+  int rval = memoryToPrimitive(type, ptr, &lval, &dval);
+  switch(rval) {
+    case PRIMITIVE_INTEGER:
+      return PyInt_FromLong(lval);
+    case PRIMITIVE_FLOAT:
+      return PyFloat_FromDouble(dval);
+    case PRIMITIVE_UNKNOWN:
+    default:
+      return PyString_FromStringAndSize(ptr, len);
+  }
+}
+
+PyObject* listFromArray(char* type, char* ptr, int len) {
+  long lval;
+  double dval;
+  int elementLen = lengthOfType(type);
+  PyObject* list = PyList_New(0);
+  //printf("Generating list of %s\n", type);
+  for (char* tmpPtr = ptr; tmpPtr < ptr + len; tmpPtr += elementLen) {
+    PyList_Append(list, valueFromScalar(type, tmpPtr, elementLen));    
+  }
+  return list;
+}
+
+
+#include <mac.h>
+
+
+  #define SWIG_From_long   PyInt_FromLong 
+
+
+SWIGINTERNINLINE PyObject *
+SWIG_From_int  (int value)
+{    
+  return SWIG_From_long  (value);
+}
+
+
+#include <limits.h>
+#if !defined(SWIG_NO_LLONG_MAX)
+# if !defined(LLONG_MAX) && defined(__GNUC__) && defined (__LONG_LONG_MAX__)
+#   define LLONG_MAX __LONG_LONG_MAX__
+#   define LLONG_MIN (-LLONG_MAX - 1LL)
+#   define ULLONG_MAX (LLONG_MAX * 2ULL + 1ULL)
+# endif
+#endif
+
+
+SWIGINTERN int
+SWIG_AsVal_double (PyObject *obj, double *val)
+{
+  int res = SWIG_TypeError;
+  if (PyFloat_Check(obj)) {
+    if (val) *val = PyFloat_AsDouble(obj);
+    return SWIG_OK;
+  } else if (PyInt_Check(obj)) {
+    if (val) *val = PyInt_AsLong(obj);
+    return SWIG_OK;
+  } else if (PyLong_Check(obj)) {
+    double v = PyLong_AsDouble(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = v;
+      return SWIG_OK;
+    } else {
+      PyErr_Clear();
+    }
+  }
+#ifdef SWIG_PYTHON_CAST_MODE
+  {
+    int dispatch = 0;
+    double d = PyFloat_AsDouble(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = d;
+      return SWIG_AddCast(SWIG_OK);
+    } else {
+      PyErr_Clear();
+    }
+    if (!dispatch) {
+      long v = PyLong_AsLong(obj);
+      if (!PyErr_Occurred()) {
+	if (val) *val = v;
+	return SWIG_AddCast(SWIG_AddCast(SWIG_OK));
+      } else {
+	PyErr_Clear();
+      }
+    }
+  }
+#endif
+  return res;
+}
+
+
+#include <float.h>
+
+
+#include <math.h>
+
+
+SWIGINTERNINLINE int
+SWIG_CanCastAsInteger(double *d, double min, double max) {
+  double x = *d;
+  if ((min <= x && x <= max)) {
+   double fx = floor(x);
+   double cx = ceil(x);
+   double rd =  ((x - fx) < 0.5) ? fx : cx; /* simple rint */
+   if ((errno == EDOM) || (errno == ERANGE)) {
+     errno = 0;
+   } else {
+     double summ, reps, diff;
+     if (rd < x) {
+       diff = x - rd;
+     } else if (rd > x) {
+       diff = rd - x;
+     } else {
+       return 1;
+     }
+     summ = rd + x;
+     reps = diff/summ;
+     if (reps < 8*DBL_EPSILON) {
+       *d = rd;
+       return 1;
+     }
+   }
+  }
+  return 0;
+}
+
+
+SWIGINTERN int
+SWIG_AsVal_long (PyObject *obj, long* val)
+{
+  if (PyInt_Check(obj)) {
+    if (val) *val = PyInt_AsLong(obj);
+    return SWIG_OK;
+  } else if (PyLong_Check(obj)) {
+    long v = PyLong_AsLong(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = v;
+      return SWIG_OK;
+    } else {
+      PyErr_Clear();
+    }
+  }
+#ifdef SWIG_PYTHON_CAST_MODE
+  {
+    int dispatch = 0;
+    long v = PyInt_AsLong(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = v;
+      return SWIG_AddCast(SWIG_OK);
+    } else {
+      PyErr_Clear();
+    }
+    if (!dispatch) {
+      double d;
+      int res = SWIG_AddCast(SWIG_AsVal_double (obj,&d));
+      if (SWIG_IsOK(res) && SWIG_CanCastAsInteger(&d, LONG_MIN, LONG_MAX)) {
+	if (val) *val = (long)(d);
+	return res;
+      }
+    }
+  }
+#endif
+  return SWIG_TypeError;
+}
+
+
+SWIGINTERN int
+SWIG_AsVal_int (PyObject * obj, int *val)
+{
+  long v;
+  int res = SWIG_AsVal_long (obj, &v);
+  if (SWIG_IsOK(res)) {
+    if ((v < INT_MIN || v > INT_MAX)) {
+      return SWIG_OverflowError;
+    } else {
+      if (val) *val = static_cast< int >(v);
+    }
+  }  
+  return res;
+}
+
+
+#include <radio.h>
+
+
+  #define SWIG_From_double   PyFloat_FromDouble 
+
+
+SWIGINTERNINLINE PyObject*
+  SWIG_From_bool  (bool value)
+{
+  return PyBool_FromLong(value ? 1 : 0);
+}
+
+
+#include <packet.h>
+
+
+SWIGINTERN swig_type_info*
+SWIG_pchar_descriptor(void)
+{
+  static int init = 0;
+  static swig_type_info* info = 0;
+  if (!init) {
+    info = SWIG_TypeQuery("_p_char");
+    init = 1;
+  }
+  return info;
+}
+
+
+SWIGINTERNINLINE PyObject *
+SWIG_FromCharPtrAndSize(const char* carray, size_t size)
+{
+  if (carray) {
+    if (size > INT_MAX) {
+      swig_type_info* pchar_descriptor = SWIG_pchar_descriptor();
+      return pchar_descriptor ? 
+	SWIG_NewPointerObj(const_cast< char * >(carray), pchar_descriptor, 0) : SWIG_Py_Void();
+    } else {
+      return PyString_FromStringAndSize(carray, static_cast< int >(size));
+    }
+  } else {
+    return SWIG_Py_Void();
+  }
+}
+
+
+SWIGINTERNINLINE PyObject * 
+SWIG_FromCharPtr(const char *cptr)
+{ 
+  return SWIG_FromCharPtrAndSize(cptr, (cptr ? strlen(cptr) : 0));
+}
+
+
+SWIGINTERN int
+SWIG_AsCharPtrAndSize(PyObject *obj, char** cptr, size_t* psize, int *alloc)
+{
+  if (PyString_Check(obj)) {
+    char *cstr; Py_ssize_t len;
+    PyString_AsStringAndSize(obj, &cstr, &len);
+    if (cptr)  {
+      if (alloc) {
+	/* 
+	   In python the user should not be able to modify the inner
+	   string representation. To warranty that, if you define
+	   SWIG_PYTHON_SAFE_CSTRINGS, a new/copy of the python string
+	   buffer is always returned.
+
+	   The default behavior is just to return the pointer value,
+	   so, be careful.
+	*/ 
+#if defined(SWIG_PYTHON_SAFE_CSTRINGS)
+	if (*alloc != SWIG_OLDOBJ) 
+#else
+	if (*alloc == SWIG_NEWOBJ) 
+#endif
+	  {
+	    *cptr = reinterpret_cast< char* >(memcpy((new char[len + 1]), cstr, sizeof(char)*(len + 1)));
+	    *alloc = SWIG_NEWOBJ;
+	  }
+	else {
+	  *cptr = cstr;
+	  *alloc = SWIG_OLDOBJ;
+	}
+      } else {
+	*cptr = PyString_AsString(obj);
+      }
+    }
+    if (psize) *psize = len + 1;
+    return SWIG_OK;
+  } else {
+    swig_type_info* pchar_descriptor = SWIG_pchar_descriptor();
+    if (pchar_descriptor) {
+      void* vptr = 0;
+      if (SWIG_ConvertPtr(obj, &vptr, pchar_descriptor, 0) == SWIG_OK) {
+	if (cptr) *cptr = (char *) vptr;
+	if (psize) *psize = vptr ? (strlen((char *)vptr) + 1) : 0;
+	if (alloc) *alloc = SWIG_OLDOBJ;
+	return SWIG_OK;
+      }
+    }
+  }
+  return SWIG_TypeError;
+}
+
+
+
+
+
+SWIGINTERN int
+SWIG_AsVal_long_SS_long (PyObject *obj, long long *val)
+{
+  int res = SWIG_TypeError;
+  if (PyLong_Check(obj)) {
+    long long v = PyLong_AsLongLong(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = v;
+      return SWIG_OK;
+    } else {
+      PyErr_Clear();
+    }
+  } else {
+    long v;
+    res = SWIG_AsVal_long (obj,&v);
+    if (SWIG_IsOK(res)) {
+      if (val) *val = v;
+      return res;
+    }
+  }
+#ifdef SWIG_PYTHON_CAST_MODE
+  {
+    const double mant_max = 1LL << DBL_MANT_DIG;
+    const double mant_min = -mant_max;
+    double d;
+    res = SWIG_AsVal_double (obj,&d);
+    if (SWIG_IsOK(res) && SWIG_CanCastAsInteger(&d, mant_min, mant_max)) {
+      if (val) *val = (long long)(d);
+      return SWIG_AddCast(res);
+    }
+    res = SWIG_TypeError;
+  }
+#endif
+  return res;
+}
+
+
+SWIGINTERNINLINE PyObject* 
+SWIG_From_unsigned_SS_long  (unsigned long value)
+{
+  return (value > LONG_MAX) ?
+    PyLong_FromUnsignedLong(value) : PyInt_FromLong(static_cast< long >(value)); 
+}
+
+
+SWIGINTERNINLINE PyObject* 
+SWIG_From_long_SS_long  (long long value)
+{
+  return ((value < LONG_MIN) || (value > LONG_MAX)) ?
+    PyLong_FromLongLong(value) : PyInt_FromLong(static_cast< long >(value)); 
+}
+
+
+SWIGINTERN int
+SWIG_AsVal_unsigned_SS_long (PyObject *obj, unsigned long *val) 
+{
+  if (PyInt_Check(obj)) {
+    long v = PyInt_AsLong(obj);
+    if (v >= 0) {
+      if (val) *val = v;
+      return SWIG_OK;
+    } else {
+      return SWIG_OverflowError;
+    }
+  } else if (PyLong_Check(obj)) {
+    unsigned long v = PyLong_AsUnsignedLong(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = v;
+      return SWIG_OK;
+    } else {
+      PyErr_Clear();
+    }
+  }
+#ifdef SWIG_PYTHON_CAST_MODE
+  {
+    int dispatch = 0;
+    unsigned long v = PyLong_AsUnsignedLong(obj);
+    if (!PyErr_Occurred()) {
+      if (val) *val = v;
+      return SWIG_AddCast(SWIG_OK);
+    } else {
+      PyErr_Clear();
+    }
+    if (!dispatch) {
+      double d;
+      int res = SWIG_AddCast(SWIG_AsVal_double (obj,&d));
+      if (SWIG_IsOK(res) && SWIG_CanCastAsInteger(&d, 0, ULONG_MAX)) {
+	if (val) *val = (unsigned long)(d);
+	return res;
+      }
+    }
+  }
+#endif
+  return SWIG_TypeError;
+}
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+SWIGINTERN PyObject *_wrap_new_MAC(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *result = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)":new_MAC")) SWIG_fail;
+  result = (MAC *)new MAC();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_MAC, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_MAC(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_MAC",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_MAC" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_initHigh(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_initHigh",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_initHigh" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->initHigh();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_initLow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_initLow",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_initLow" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->initLow();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_high(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_high",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_high" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->high();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_low(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_low",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_low" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->low();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_symbolsPerSec(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_symbolsPerSec",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_symbolsPerSec" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->symbolsPerSec();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_bitsPerSymbol(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_bitsPerSymbol",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_bitsPerSymbol" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->bitsPerSymbol();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_preambleLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_preambleLength",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_preambleLength" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->preambleLength();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_exponentBase(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_exponentBase",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_exponentBase" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->exponentBase();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_maxIterations(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_maxIterations",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_maxIterations" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->maxIterations();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_minFreeSamples(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_minFreeSamples",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_minFreeSamples" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->minFreeSamples();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_rxtxDelay(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_rxtxDelay",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_rxtxDelay" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->rxtxDelay();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_ackTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:MAC_ackTime",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_ackTime" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  result = (int)(arg1)->ackTime();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setInitHigh(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setInitHigh",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setInitHigh" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setInitHigh" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setInitHigh(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setInitLow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setInitLow",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setInitLow" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setInitLow" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setInitLow(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setHigh(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setHigh",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setHigh" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setHigh" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setHigh(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setLow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setLow",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setLow" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setLow" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setLow(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setSymbolsPerSec(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setSymbolsPerSec",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setSymbolsPerSec" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setSymbolsPerSec" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setSymbolsPerSec(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setBitsBerSymbol(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setBitsBerSymbol",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setBitsBerSymbol" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setBitsBerSymbol" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setBitsBerSymbol(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setPreambleLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setPreambleLength",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setPreambleLength" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setPreambleLength" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setPreambleLength(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setExponentBase(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setExponentBase",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setExponentBase" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setExponentBase" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setExponentBase(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setMaxIterations(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setMaxIterations",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setMaxIterations" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setMaxIterations" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setMaxIterations(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setMinFreeSamples(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setMinFreeSamples",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setMinFreeSamples" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setMinFreeSamples" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setMinFreeSamples(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setRxtxDelay(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setRxtxDelay",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setRxtxDelay" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setRxtxDelay" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setRxtxDelay(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_MAC_setAckTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  MAC *arg1 = (MAC *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:MAC_setAckTime",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_MAC, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "MAC_setAckTime" "', argument " "1"" of type '" "MAC *""'"); 
+  }
+  arg1 = reinterpret_cast< MAC * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "MAC_setAckTime" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setAckTime(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *MAC_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_MAC, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_Radio(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *result = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)":new_Radio")) SWIG_fail;
+  result = (Radio *)new Radio();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Radio, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_Radio(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_Radio",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Radio" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Radio_add(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  int arg2 ;
+  int arg3 ;
+  double arg4 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  int val3 ;
+  int ecode3 = 0 ;
+  double val4 ;
+  int ecode4 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  PyObject * obj3 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOOO:Radio_add",&obj0,&obj1,&obj2,&obj3)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_add" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_add" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_int(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_add" "', argument " "3"" of type '" "int""'");
+  } 
+  arg3 = static_cast< int >(val3);
+  ecode4 = SWIG_AsVal_double(obj3, &val4);
+  if (!SWIG_IsOK(ecode4)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode4), "in method '" "Radio_add" "', argument " "4"" of type '" "double""'");
+  } 
+  arg4 = static_cast< double >(val4);
+  (arg1)->add(arg2,arg3,arg4);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Radio_gain(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  int arg2 ;
+  int arg3 ;
+  double result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  int val3 ;
+  int ecode3 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:Radio_gain",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_gain" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_gain" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_int(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_gain" "', argument " "3"" of type '" "int""'");
+  } 
+  arg3 = static_cast< int >(val3);
+  result = (double)(arg1)->gain(arg2,arg3);
+  resultobj = SWIG_From_double(static_cast< double >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Radio_connected(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  int arg2 ;
+  int arg3 ;
+  bool result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  int val3 ;
+  int ecode3 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:Radio_connected",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_connected" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_connected" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_int(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_connected" "', argument " "3"" of type '" "int""'");
+  } 
+  arg3 = static_cast< int >(val3);
+  result = (bool)(arg1)->connected(arg2,arg3);
+  resultobj = SWIG_From_bool(static_cast< bool >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Radio_remove(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  int arg2 ;
+  int arg3 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  int val3 ;
+  int ecode3 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:Radio_remove",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_remove" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_remove" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_int(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_remove" "', argument " "3"" of type '" "int""'");
+  } 
+  arg3 = static_cast< int >(val3);
+  (arg1)->remove(arg2,arg3);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Radio_setNoise(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  int arg2 ;
+  double arg3 ;
+  double arg4 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  double val3 ;
+  int ecode3 = 0 ;
+  double val4 ;
+  int ecode4 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  PyObject * obj3 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOOO:Radio_setNoise",&obj0,&obj1,&obj2,&obj3)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_setNoise" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_setNoise" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_double(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Radio_setNoise" "', argument " "3"" of type '" "double""'");
+  } 
+  arg3 = static_cast< double >(val3);
+  ecode4 = SWIG_AsVal_double(obj3, &val4);
+  if (!SWIG_IsOK(ecode4)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode4), "in method '" "Radio_setNoise" "', argument " "4"" of type '" "double""'");
+  } 
+  arg4 = static_cast< double >(val4);
+  (arg1)->setNoise(arg2,arg3,arg4);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Radio_setSensitivity(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Radio *arg1 = (Radio *) 0 ;
+  double arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  double val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Radio_setSensitivity",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Radio, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Radio_setSensitivity" "', argument " "1"" of type '" "Radio *""'"); 
+  }
+  arg1 = reinterpret_cast< Radio * >(argp1);
+  ecode2 = SWIG_AsVal_double(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Radio_setSensitivity" "', argument " "2"" of type '" "double""'");
+  } 
+  arg2 = static_cast< double >(val2);
+  (arg1)->setSensitivity(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *Radio_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_Radio, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_Packet(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *result = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)":new_Packet")) SWIG_fail;
+  result = (Packet *)new Packet();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Packet, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_Packet(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_Packet",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Packet" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_setSource(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setSource",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setSource" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setSource" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setSource(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_source(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Packet_source",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_source" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  result = (int)(arg1)->source();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_setDestination(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setDestination",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setDestination" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setDestination" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setDestination(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_destination(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Packet_destination",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_destination" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  result = (int)(arg1)->destination();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_setLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setLength",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setLength" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setLength" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setLength(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_length(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Packet_length",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_length" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  result = (int)(arg1)->length();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_setType(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setType",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setType" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setType" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setType(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_type(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Packet_type",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_type" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  result = (int)(arg1)->type();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_data(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  char *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Packet_data",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_data" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  result = (char *)(arg1)->data();
+  resultobj = SWIG_FromCharPtr((const char *)result);
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_setData(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  char *arg2 = (char *) 0 ;
+  int arg3 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  size_t size2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setData",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setData" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, &size2, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Packet_setData" "', argument " "2"" of type '" "char *""'");
+  }  
+  arg2 = reinterpret_cast< char * >(buf2);
+  arg3 = static_cast< int >(size2 - 1);
+  (arg1)->setData(arg2,arg3);
+  resultobj = SWIG_Py_Void();
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_maxLength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Packet_maxLength",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_maxLength" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  result = (int)(arg1)->maxLength();
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_setStrength(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_setStrength",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_setStrength" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_setStrength" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->setStrength(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_deliver(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  long long arg3 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  long long val3 ;
+  int ecode3 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:Packet_deliver",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_deliver" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_deliver" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  ecode3 = SWIG_AsVal_long_SS_long(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "Packet_deliver" "', argument " "3"" of type '" "long long""'");
+  } 
+  arg3 = static_cast< long long >(val3);
+  (arg1)->deliver(arg2,arg3);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Packet_deliverNow(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Packet *arg1 = (Packet *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Packet_deliverNow",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Packet, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Packet_deliverNow" "', argument " "1"" of type '" "Packet *""'"); 
+  }
+  arg1 = reinterpret_cast< Packet * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Packet_deliverNow" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->deliverNow(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *Packet_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_Packet, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_variable_string_t_type_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  char *arg2 = (char *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_type_set",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_type_set" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "variable_string_t_type_set" "', argument " "2"" of type '" "char *""'");
+  }
+  arg2 = reinterpret_cast< char * >(buf2);
+  if (arg1->type) delete[] arg1->type;
+  if (arg2) {
+    size_t size = strlen(reinterpret_cast< const char * >(arg2)) + 1;
+    arg1->type = (char *)reinterpret_cast< char* >(memcpy((new char[size]), reinterpret_cast< const char * >(arg2), sizeof(char)*(size)));
+  } else {
+    arg1->type = 0;
+  }
+  resultobj = SWIG_Py_Void();
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_type_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  char *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_type_get",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_type_get" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  result = (char *) ((arg1)->type);
+  resultobj = SWIG_FromCharPtr((const char *)result);
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_ptr_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  char *arg2 = (char *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_ptr_set",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_ptr_set" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "variable_string_t_ptr_set" "', argument " "2"" of type '" "char *""'");
+  }
+  arg2 = reinterpret_cast< char * >(buf2);
+  if (arg1->ptr) delete[] arg1->ptr;
+  if (arg2) {
+    size_t size = strlen(reinterpret_cast< const char * >(arg2)) + 1;
+    arg1->ptr = (char *)reinterpret_cast< char* >(memcpy((new char[size]), reinterpret_cast< const char * >(arg2), sizeof(char)*(size)));
+  } else {
+    arg1->ptr = 0;
+  }
+  resultobj = SWIG_Py_Void();
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_ptr_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  char *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_ptr_get",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_ptr_get" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  result = (char *) ((arg1)->ptr);
+  resultobj = SWIG_FromCharPtr((const char *)result);
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_len_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_len_set",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_len_set" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "variable_string_t_len_set" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  if (arg1) (arg1)->len = arg2;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_len_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_len_get",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_len_get" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  result = (int) ((arg1)->len);
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_isArray_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:variable_string_t_isArray_set",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_isArray_set" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "variable_string_t_isArray_set" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  if (arg1) (arg1)->isArray = arg2;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_variable_string_t_isArray_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:variable_string_t_isArray_get",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "variable_string_t_isArray_get" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  result = (int) ((arg1)->isArray);
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_new_variable_string_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *result = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)":new_variable_string_t")) SWIG_fail;
+  result = (variable_string_t *)new variable_string_t();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_var_string, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_variable_string_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  variable_string_t *arg1 = (variable_string_t *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_variable_string_t",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_var_string, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_variable_string_t" "', argument " "1"" of type '" "variable_string_t *""'"); 
+  }
+  arg1 = reinterpret_cast< variable_string_t * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *variable_string_t_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_var_string, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_numVariables_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  int arg2 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_numVariables_set",&obj0,&obj1)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = (char*)"<bad string>";
+          app->variableTypes[i] = (char*)"<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "nesc_app_t_numVariables_set" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  if (arg1) (arg1)->numVariables = arg2;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_numVariables_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  int result;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_numVariables_get",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = (char*)"<bad string>";
+          app->variableTypes[i] = (char*)"<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  result = (int) ((arg1)->numVariables);
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_variableNames_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  char **arg2 = (char **) 0 ;
+  void *argp2 = 0 ;
+  int res2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableNames_set",&obj0,&obj1)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = (char*)"<bad string>";
+          app->variableTypes[i] = (char*)"<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  res2 = SWIG_ConvertPtr(obj1, &argp2,SWIGTYPE_p_p_char, 0 |  0 );
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "nesc_app_t_variableNames_set" "', argument " "2"" of type '" "char **""'"); 
+  }
+  arg2 = reinterpret_cast< char ** >(argp2);
+  if (arg1) (arg1)->variableNames = arg2;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_variableNames_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  char **result = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableNames_get",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = (char*)"<bad string>";
+          app->variableTypes[i] = (char*)"<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  result = (char **) ((arg1)->variableNames);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_p_char, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_variableTypes_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  char **arg2 = (char **) 0 ;
+  void *argp2 = 0 ;
+  int res2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableTypes_set",&obj0,&obj1)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = (char*)"<bad string>";
+          app->variableTypes[i] = (char*)"<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  res2 = SWIG_ConvertPtr(obj1, &argp2,SWIGTYPE_p_p_char, 0 |  0 );
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "nesc_app_t_variableTypes_set" "', argument " "2"" of type '" "char **""'"); 
+  }
+  arg2 = reinterpret_cast< char ** >(argp2);
+  if (arg1) (arg1)->variableTypes = arg2;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_variableTypes_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  char **result = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableTypes_get",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = (char*)"<bad string>";
+          app->variableTypes[i] = (char*)"<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  result = (char **) ((arg1)->variableTypes);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_p_char, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_variableArray_set(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  int *arg2 = (int *) 0 ;
+  void *argp2 = 0 ;
+  int res2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:nesc_app_t_variableArray_set",&obj0,&obj1)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = (char*)"<bad string>";
+          app->variableTypes[i] = (char*)"<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  res2 = SWIG_ConvertPtr(obj1, &argp2,SWIGTYPE_p_int, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "nesc_app_t_variableArray_set" "', argument " "2"" of type '" "int *""'"); 
+  }
+  arg2 = reinterpret_cast< int * >(argp2);
+  if (arg1) (arg1)->variableArray = arg2;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_nesc_app_t_variableArray_get(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  int *result = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:nesc_app_t_variableArray_get",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = (char*)"<bad string>";
+          app->variableTypes[i] = (char*)"<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  result = (int *) ((arg1)->variableArray);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_int, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_new_nesc_app_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *result = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)":new_nesc_app_t")) SWIG_fail;
+  result = (nesc_app_t *)new nesc_app_t();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_nesc_app, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_nesc_app_t(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_nesc_app_t",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = (char*)"<bad string>";
+          app->variableTypes[i] = (char*)"<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *nesc_app_t_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_nesc_app, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_Variable(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  char *arg1 = (char *) 0 ;
+  char *arg2 = (char *) 0 ;
+  int arg3 ;
+  int arg4 ;
+  Variable *result = 0 ;
+  int res1 ;
+  char *buf1 = 0 ;
+  int alloc1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  int alloc2 = 0 ;
+  int val3 ;
+  int ecode3 = 0 ;
+  int val4 ;
+  int ecode4 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  PyObject * obj3 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOOO:new_Variable",&obj0,&obj1,&obj2,&obj3)) SWIG_fail;
+  res1 = SWIG_AsCharPtrAndSize(obj0, &buf1, NULL, &alloc1);
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "new_Variable" "', argument " "1"" of type '" "char *""'");
+  }
+  arg1 = reinterpret_cast< char * >(buf1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "new_Variable" "', argument " "2"" of type '" "char *""'");
+  }
+  arg2 = reinterpret_cast< char * >(buf2);
+  ecode3 = SWIG_AsVal_int(obj2, &val3);
+  if (!SWIG_IsOK(ecode3)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode3), "in method '" "new_Variable" "', argument " "3"" of type '" "int""'");
+  } 
+  arg3 = static_cast< int >(val3);
+  ecode4 = SWIG_AsVal_int(obj3, &val4);
+  if (!SWIG_IsOK(ecode4)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode4), "in method '" "new_Variable" "', argument " "4"" of type '" "int""'");
+  } 
+  arg4 = static_cast< int >(val4);
+  result = (Variable *)new Variable(arg1,arg2,arg3,arg4);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Variable, SWIG_POINTER_NEW |  0 );
+  if (alloc1 == SWIG_NEWOBJ) delete[] buf1;
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc1 == SWIG_NEWOBJ) delete[] buf1;
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_Variable(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Variable *arg1 = (Variable *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_Variable",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Variable, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Variable" "', argument " "1"" of type '" "Variable *""'"); 
+  }
+  arg1 = reinterpret_cast< Variable * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Variable_getData(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Variable *arg1 = (Variable *) 0 ;
+  variable_string_t result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Variable_getData",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Variable, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Variable_getData" "', argument " "1"" of type '" "Variable *""'"); 
+  }
+  arg1 = reinterpret_cast< Variable * >(argp1);
+  result = (arg1)->getData();
+  {
+    if ((&result)->isArray) {
+      //printf("Generating array %s\n", (&result)->type);
+      resultobj = listFromArray  ((&result)->type, (&result)->ptr, (&result)->len);
+    }
+    else {
+      //printf("Generating scalar %s\n", (&result)->type);
+      resultobj = valueFromScalar((&result)->type, (&result)->ptr, (&result)->len);
+    }
+    if (resultobj == NULL) {
+      PyErr_SetString(PyExc_RuntimeError, "Error generating Python type from TinyOS variable.");
+    }
+  }
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *Variable_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_Variable, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_Mote(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  Mote *result = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:new_Mote",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = (char*)"<bad string>";
+          app->variableTypes[i] = (char*)"<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  result = (Mote *)new Mote(arg1);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Mote, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_Mote(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_Mote",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Mote" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_id(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  unsigned long result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_id",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_id" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  result = (unsigned long)(arg1)->id();
+  resultobj = SWIG_From_unsigned_SS_long(static_cast< unsigned long >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_euid(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  long long result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_euid",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_euid" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  result = (long long)(arg1)->euid();
+  resultobj = SWIG_From_long_SS_long(static_cast< long long >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_setEuid(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  long long arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  long long val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Mote_setEuid",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_setEuid" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  ecode2 = SWIG_AsVal_long_SS_long(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_setEuid" "', argument " "2"" of type '" "long long""'");
+  } 
+  arg2 = static_cast< long long >(val2);
+  (arg1)->setEuid(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_bootTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  long long result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_bootTime",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_bootTime" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  result = (long long)(arg1)->bootTime();
+  resultobj = SWIG_From_long_SS_long(static_cast< long long >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_bootAtTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  long long arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  long long val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Mote_bootAtTime",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_bootAtTime" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  ecode2 = SWIG_AsVal_long_SS_long(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_bootAtTime" "', argument " "2"" of type '" "long long""'");
+  } 
+  arg2 = static_cast< long long >(val2);
+  (arg1)->bootAtTime(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_isOn(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  bool result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_isOn",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_isOn" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  result = (bool)(arg1)->isOn();
+  resultobj = SWIG_From_bool(static_cast< bool >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_turnOff(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_turnOff",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_turnOff" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  (arg1)->turnOff();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_turnOn(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_turnOn",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_turnOn" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  (arg1)->turnOn();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_getVariable(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  char *arg2 = (char *) 0 ;
+  Variable *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Mote_getVariable",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_getVariable" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Mote_getVariable" "', argument " "2"" of type '" "char *""'");
+  }
+  arg2 = reinterpret_cast< char * >(buf2);
+  result = (Variable *)(arg1)->getVariable(arg2);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Variable, 0 |  0 );
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_addNoiseTraceReading(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Mote_addNoiseTraceReading",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_addNoiseTraceReading" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_addNoiseTraceReading" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->addNoiseTraceReading(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_createNoiseModel(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Mote_createNoiseModel",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_createNoiseModel" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  (arg1)->createNoiseModel();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Mote_generateNoise(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Mote *arg1 = (Mote *) 0 ;
+  int arg2 ;
+  int result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Mote_generateNoise",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Mote, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Mote_generateNoise" "', argument " "1"" of type '" "Mote *""'"); 
+  }
+  arg1 = reinterpret_cast< Mote * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Mote_generateNoise" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  result = (int)(arg1)->generateNoise(arg2);
+  resultobj = SWIG_From_int(static_cast< int >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *Mote_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_Mote, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+SWIGINTERN PyObject *_wrap_new_Tossim(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  nesc_app_t *arg1 = (nesc_app_t *) 0 ;
+  Tossim *result = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:new_Tossim",&obj0)) SWIG_fail;
+  {
+    if (!PyList_Check(obj0)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a list as a parameter.");
+      return NULL;
+    }
+    else {
+      int size = PyList_Size(obj0);
+      int i = 0;
+      nesc_app_t* app;
+      
+      if (size % 3 != 0) {
+        PyErr_SetString(PyExc_RuntimeError, "List must have 2*N elements.");
+        return NULL;
+      }
+      
+      app = (nesc_app_t*)malloc(sizeof(nesc_app_t));
+      
+      app->numVariables = size / 3;
+      app->variableNames = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableTypes = (char**)malloc(sizeof(char*) * app->numVariables);
+      app->variableArray = (int*)malloc(sizeof(int) * app->numVariables);
+      
+      memset(app->variableNames, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableTypes, 0, sizeof(char*) * app->numVariables);
+      memset(app->variableArray, 0, sizeof(int) * app->numVariables);
+      
+      for (i = 0; i < app->numVariables; i++) {
+        PyObject* name = PyList_GetItem(obj0, 3 * i);
+        PyObject* array = PyList_GetItem(obj0, (3 * i) + 1);
+        PyObject* format = PyList_GetItem(obj0, (3 * i) + 2);
+        if (PyString_Check(name) && PyString_Check(format)) {
+          app->variableNames[i] = PyString_AsString(name);
+          app->variableTypes[i] = PyString_AsString(format);
+          if (strcmp(PyString_AsString(array), "array") == 0) {
+            app->variableArray[i] = 1;
+            //printf("%s is an array\n", PyString_AsString(name));
+          }
+          else {
+            app->variableArray[i] = 0;
+            //printf("%s is a scalar\n", PyString_AsString(name));
+          }
+        }
+        else {
+          app->variableNames[i] = (char*)"<bad string>";
+          app->variableTypes[i] = (char*)"<bad string>";
+        }
+      }
+      
+      arg1 = app;
+    }
+  }
+  result = (Tossim *)new Tossim(arg1);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Tossim, SWIG_POINTER_NEW |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_delete_Tossim(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:delete_Tossim",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, SWIG_POINTER_DISOWN |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "delete_Tossim" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  delete arg1;
+  
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_init(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_init",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_init" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  (arg1)->init();
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_time(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  long long result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_time",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_time" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (long long)(arg1)->time();
+  resultobj = SWIG_From_long_SS_long(static_cast< long long >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_ticksPerSecond(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  long long result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_ticksPerSecond",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_ticksPerSecond" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (long long)(arg1)->ticksPerSecond();
+  resultobj = SWIG_From_long_SS_long(static_cast< long long >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_setTime(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  long long arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  long long val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_setTime",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_setTime" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  ecode2 = SWIG_AsVal_long_SS_long(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_setTime" "', argument " "2"" of type '" "long long""'");
+  } 
+  arg2 = static_cast< long long >(val2);
+  (arg1)->setTime(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_timeStr(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  char *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_timeStr",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_timeStr" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (char *)(arg1)->timeStr();
+  resultobj = SWIG_FromCharPtr((const char *)result);
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_currentNode(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  Mote *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_currentNode",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_currentNode" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (Mote *)(arg1)->currentNode();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Mote, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_getNode(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  unsigned long arg2 ;
+  Mote *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  unsigned long val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_getNode",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_getNode" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  ecode2 = SWIG_AsVal_unsigned_SS_long(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_getNode" "', argument " "2"" of type '" "unsigned long""'");
+  } 
+  arg2 = static_cast< unsigned long >(val2);
+  result = (Mote *)(arg1)->getNode(arg2);
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Mote, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_setCurrentNode(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  unsigned long arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  unsigned long val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_setCurrentNode",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_setCurrentNode" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  ecode2 = SWIG_AsVal_unsigned_SS_long(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_setCurrentNode" "', argument " "2"" of type '" "unsigned long""'");
+  } 
+  arg2 = static_cast< unsigned long >(val2);
+  (arg1)->setCurrentNode(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_addChannel(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  char *arg2 = (char *) 0 ;
+  FILE *arg3 = (FILE *) 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:Tossim_addChannel",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_addChannel" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Tossim_addChannel" "', argument " "2"" of type '" "char *""'");
+  }
+  arg2 = reinterpret_cast< char * >(buf2);
+  {
+    if (!PyFile_Check(obj2)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter.");
+      return NULL;
+    }
+    arg3 = PyFile_AsFile(obj2);
+  }
+  (arg1)->addChannel(arg2,arg3);
+  resultobj = SWIG_Py_Void();
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_removeChannel(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  char *arg2 = (char *) 0 ;
+  FILE *arg3 = (FILE *) 0 ;
+  bool result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int res2 ;
+  char *buf2 = 0 ;
+  int alloc2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  PyObject * obj2 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OOO:Tossim_removeChannel",&obj0,&obj1,&obj2)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_removeChannel" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  res2 = SWIG_AsCharPtrAndSize(obj1, &buf2, NULL, &alloc2);
+  if (!SWIG_IsOK(res2)) {
+    SWIG_exception_fail(SWIG_ArgError(res2), "in method '" "Tossim_removeChannel" "', argument " "2"" of type '" "char *""'");
+  }
+  arg2 = reinterpret_cast< char * >(buf2);
+  {
+    if (!PyFile_Check(obj2)) {
+      PyErr_SetString(PyExc_TypeError, "Requires a file as a parameter.");
+      return NULL;
+    }
+    arg3 = PyFile_AsFile(obj2);
+  }
+  result = (bool)(arg1)->removeChannel(arg2,arg3);
+  resultobj = SWIG_From_bool(static_cast< bool >(result));
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return resultobj;
+fail:
+  if (alloc2 == SWIG_NEWOBJ) delete[] buf2;
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_randomSeed(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  int arg2 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  int val2 ;
+  int ecode2 = 0 ;
+  PyObject * obj0 = 0 ;
+  PyObject * obj1 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"OO:Tossim_randomSeed",&obj0,&obj1)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_randomSeed" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  ecode2 = SWIG_AsVal_int(obj1, &val2);
+  if (!SWIG_IsOK(ecode2)) {
+    SWIG_exception_fail(SWIG_ArgError(ecode2), "in method '" "Tossim_randomSeed" "', argument " "2"" of type '" "int""'");
+  } 
+  arg2 = static_cast< int >(val2);
+  (arg1)->randomSeed(arg2);
+  resultobj = SWIG_Py_Void();
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_runNextEvent(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  bool result;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_runNextEvent",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_runNextEvent" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (bool)(arg1)->runNextEvent();
+  resultobj = SWIG_From_bool(static_cast< bool >(result));
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_mac(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  MAC *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_mac",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_mac" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (MAC *)(arg1)->mac();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_MAC, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_radio(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  Radio *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_radio",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_radio" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (Radio *)(arg1)->radio();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Radio, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *_wrap_Tossim_newPacket(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *resultobj = 0;
+  Tossim *arg1 = (Tossim *) 0 ;
+  Packet *result = 0 ;
+  void *argp1 = 0 ;
+  int res1 = 0 ;
+  PyObject * obj0 = 0 ;
+  
+  if (!PyArg_ParseTuple(args,(char *)"O:Tossim_newPacket",&obj0)) SWIG_fail;
+  res1 = SWIG_ConvertPtr(obj0, &argp1,SWIGTYPE_p_Tossim, 0 |  0 );
+  if (!SWIG_IsOK(res1)) {
+    SWIG_exception_fail(SWIG_ArgError(res1), "in method '" "Tossim_newPacket" "', argument " "1"" of type '" "Tossim *""'"); 
+  }
+  arg1 = reinterpret_cast< Tossim * >(argp1);
+  result = (Packet *)(arg1)->newPacket();
+  resultobj = SWIG_NewPointerObj(SWIG_as_voidptr(result), SWIGTYPE_p_Packet, 0 |  0 );
+  return resultobj;
+fail:
+  return NULL;
+}
+
+
+SWIGINTERN PyObject *Tossim_swigregister(PyObject *SWIGUNUSEDPARM(self), PyObject *args) {
+  PyObject *obj;
+  if (!PyArg_ParseTuple(args,(char*)"O|swigregister", &obj)) return NULL;
+  SWIG_TypeNewClientData(SWIGTYPE_p_Tossim, SWIG_NewClientData(obj));
+  return SWIG_Py_Void();
+}
+
+static PyMethodDef SwigMethods[] = {
+	 { (char *)"new_MAC", _wrap_new_MAC, METH_VARARGS, NULL},
+	 { (char *)"delete_MAC", _wrap_delete_MAC, METH_VARARGS, NULL},
+	 { (char *)"MAC_initHigh", _wrap_MAC_initHigh, METH_VARARGS, NULL},
+	 { (char *)"MAC_initLow", _wrap_MAC_initLow, METH_VARARGS, NULL},
+	 { (char *)"MAC_high", _wrap_MAC_high, METH_VARARGS, NULL},
+	 { (char *)"MAC_low", _wrap_MAC_low, METH_VARARGS, NULL},
+	 { (char *)"MAC_symbolsPerSec", _wrap_MAC_symbolsPerSec, METH_VARARGS, NULL},
+	 { (char *)"MAC_bitsPerSymbol", _wrap_MAC_bitsPerSymbol, METH_VARARGS, NULL},
+	 { (char *)"MAC_preambleLength", _wrap_MAC_preambleLength, METH_VARARGS, NULL},
+	 { (char *)"MAC_exponentBase", _wrap_MAC_exponentBase, METH_VARARGS, NULL},
+	 { (char *)"MAC_maxIterations", _wrap_MAC_maxIterations, METH_VARARGS, NULL},
+	 { (char *)"MAC_minFreeSamples", _wrap_MAC_minFreeSamples, METH_VARARGS, NULL},
+	 { (char *)"MAC_rxtxDelay", _wrap_MAC_rxtxDelay, METH_VARARGS, NULL},
+	 { (char *)"MAC_ackTime", _wrap_MAC_ackTime, METH_VARARGS, NULL},
+	 { (char *)"MAC_setInitHigh", _wrap_MAC_setInitHigh, METH_VARARGS, NULL},
+	 { (char *)"MAC_setInitLow", _wrap_MAC_setInitLow, METH_VARARGS, NULL},
+	 { (char *)"MAC_setHigh", _wrap_MAC_setHigh, METH_VARARGS, NULL},
+	 { (char *)"MAC_setLow", _wrap_MAC_setLow, METH_VARARGS, NULL},
+	 { (char *)"MAC_setSymbolsPerSec", _wrap_MAC_setSymbolsPerSec, METH_VARARGS, NULL},
+	 { (char *)"MAC_setBitsBerSymbol", _wrap_MAC_setBitsBerSymbol, METH_VARARGS, NULL},
+	 { (char *)"MAC_setPreambleLength", _wrap_MAC_setPreambleLength, METH_VARARGS, NULL},
+	 { (char *)"MAC_setExponentBase", _wrap_MAC_setExponentBase, METH_VARARGS, NULL},
+	 { (char *)"MAC_setMaxIterations", _wrap_MAC_setMaxIterations, METH_VARARGS, NULL},
+	 { (char *)"MAC_setMinFreeSamples", _wrap_MAC_setMinFreeSamples, METH_VARARGS, NULL},
+	 { (char *)"MAC_setRxtxDelay", _wrap_MAC_setRxtxDelay, METH_VARARGS, NULL},
+	 { (char *)"MAC_setAckTime", _wrap_MAC_setAckTime, METH_VARARGS, NULL},
+	 { (char *)"MAC_swigregister", MAC_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_Radio", _wrap_new_Radio, METH_VARARGS, NULL},
+	 { (char *)"delete_Radio", _wrap_delete_Radio, METH_VARARGS, NULL},
+	 { (char *)"Radio_add", _wrap_Radio_add, METH_VARARGS, NULL},
+	 { (char *)"Radio_gain", _wrap_Radio_gain, METH_VARARGS, NULL},
+	 { (char *)"Radio_connected", _wrap_Radio_connected, METH_VARARGS, NULL},
+	 { (char *)"Radio_remove", _wrap_Radio_remove, METH_VARARGS, NULL},
+	 { (char *)"Radio_setNoise", _wrap_Radio_setNoise, METH_VARARGS, NULL},
+	 { (char *)"Radio_setSensitivity", _wrap_Radio_setSensitivity, METH_VARARGS, NULL},
+	 { (char *)"Radio_swigregister", Radio_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_Packet", _wrap_new_Packet, METH_VARARGS, NULL},
+	 { (char *)"delete_Packet", _wrap_delete_Packet, METH_VARARGS, NULL},
+	 { (char *)"Packet_setSource", _wrap_Packet_setSource, METH_VARARGS, NULL},
+	 { (char *)"Packet_source", _wrap_Packet_source, METH_VARARGS, NULL},
+	 { (char *)"Packet_setDestination", _wrap_Packet_setDestination, METH_VARARGS, NULL},
+	 { (char *)"Packet_destination", _wrap_Packet_destination, METH_VARARGS, NULL},
+	 { (char *)"Packet_setLength", _wrap_Packet_setLength, METH_VARARGS, NULL},
+	 { (char *)"Packet_length", _wrap_Packet_length, METH_VARARGS, NULL},
+	 { (char *)"Packet_setType", _wrap_Packet_setType, METH_VARARGS, NULL},
+	 { (char *)"Packet_type", _wrap_Packet_type, METH_VARARGS, NULL},
+	 { (char *)"Packet_data", _wrap_Packet_data, METH_VARARGS, NULL},
+	 { (char *)"Packet_setData", _wrap_Packet_setData, METH_VARARGS, NULL},
+	 { (char *)"Packet_maxLength", _wrap_Packet_maxLength, METH_VARARGS, NULL},
+	 { (char *)"Packet_setStrength", _wrap_Packet_setStrength, METH_VARARGS, NULL},
+	 { (char *)"Packet_deliver", _wrap_Packet_deliver, METH_VARARGS, NULL},
+	 { (char *)"Packet_deliverNow", _wrap_Packet_deliverNow, METH_VARARGS, NULL},
+	 { (char *)"Packet_swigregister", Packet_swigregister, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_type_set", _wrap_variable_string_t_type_set, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_type_get", _wrap_variable_string_t_type_get, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_ptr_set", _wrap_variable_string_t_ptr_set, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_ptr_get", _wrap_variable_string_t_ptr_get, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_len_set", _wrap_variable_string_t_len_set, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_len_get", _wrap_variable_string_t_len_get, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_isArray_set", _wrap_variable_string_t_isArray_set, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_isArray_get", _wrap_variable_string_t_isArray_get, METH_VARARGS, NULL},
+	 { (char *)"new_variable_string_t", _wrap_new_variable_string_t, METH_VARARGS, NULL},
+	 { (char *)"delete_variable_string_t", _wrap_delete_variable_string_t, METH_VARARGS, NULL},
+	 { (char *)"variable_string_t_swigregister", variable_string_t_swigregister, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_numVariables_set", _wrap_nesc_app_t_numVariables_set, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_numVariables_get", _wrap_nesc_app_t_numVariables_get, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_variableNames_set", _wrap_nesc_app_t_variableNames_set, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_variableNames_get", _wrap_nesc_app_t_variableNames_get, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_variableTypes_set", _wrap_nesc_app_t_variableTypes_set, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_variableTypes_get", _wrap_nesc_app_t_variableTypes_get, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_variableArray_set", _wrap_nesc_app_t_variableArray_set, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_variableArray_get", _wrap_nesc_app_t_variableArray_get, METH_VARARGS, NULL},
+	 { (char *)"new_nesc_app_t", _wrap_new_nesc_app_t, METH_VARARGS, NULL},
+	 { (char *)"delete_nesc_app_t", _wrap_delete_nesc_app_t, METH_VARARGS, NULL},
+	 { (char *)"nesc_app_t_swigregister", nesc_app_t_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_Variable", _wrap_new_Variable, METH_VARARGS, NULL},
+	 { (char *)"delete_Variable", _wrap_delete_Variable, METH_VARARGS, NULL},
+	 { (char *)"Variable_getData", _wrap_Variable_getData, METH_VARARGS, NULL},
+	 { (char *)"Variable_swigregister", Variable_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_Mote", _wrap_new_Mote, METH_VARARGS, NULL},
+	 { (char *)"delete_Mote", _wrap_delete_Mote, METH_VARARGS, NULL},
+	 { (char *)"Mote_id", _wrap_Mote_id, METH_VARARGS, NULL},
+	 { (char *)"Mote_euid", _wrap_Mote_euid, METH_VARARGS, NULL},
+	 { (char *)"Mote_setEuid", _wrap_Mote_setEuid, METH_VARARGS, NULL},
+	 { (char *)"Mote_bootTime", _wrap_Mote_bootTime, METH_VARARGS, NULL},
+	 { (char *)"Mote_bootAtTime", _wrap_Mote_bootAtTime, METH_VARARGS, NULL},
+	 { (char *)"Mote_isOn", _wrap_Mote_isOn, METH_VARARGS, NULL},
+	 { (char *)"Mote_turnOff", _wrap_Mote_turnOff, METH_VARARGS, NULL},
+	 { (char *)"Mote_turnOn", _wrap_Mote_turnOn, METH_VARARGS, NULL},
+	 { (char *)"Mote_getVariable", _wrap_Mote_getVariable, METH_VARARGS, NULL},
+	 { (char *)"Mote_addNoiseTraceReading", _wrap_Mote_addNoiseTraceReading, METH_VARARGS, NULL},
+	 { (char *)"Mote_createNoiseModel", _wrap_Mote_createNoiseModel, METH_VARARGS, NULL},
+	 { (char *)"Mote_generateNoise", _wrap_Mote_generateNoise, METH_VARARGS, NULL},
+	 { (char *)"Mote_swigregister", Mote_swigregister, METH_VARARGS, NULL},
+	 { (char *)"new_Tossim", _wrap_new_Tossim, METH_VARARGS, NULL},
+	 { (char *)"delete_Tossim", _wrap_delete_Tossim, METH_VARARGS, NULL},
+	 { (char *)"Tossim_init", _wrap_Tossim_init, METH_VARARGS, NULL},
+	 { (char *)"Tossim_time", _wrap_Tossim_time, METH_VARARGS, NULL},
+	 { (char *)"Tossim_ticksPerSecond", _wrap_Tossim_ticksPerSecond, METH_VARARGS, NULL},
+	 { (char *)"Tossim_setTime", _wrap_Tossim_setTime, METH_VARARGS, NULL},
+	 { (char *)"Tossim_timeStr", _wrap_Tossim_timeStr, METH_VARARGS, NULL},
+	 { (char *)"Tossim_currentNode", _wrap_Tossim_currentNode, METH_VARARGS, NULL},
+	 { (char *)"Tossim_getNode", _wrap_Tossim_getNode, METH_VARARGS, NULL},
+	 { (char *)"Tossim_setCurrentNode", _wrap_Tossim_setCurrentNode, METH_VARARGS, NULL},
+	 { (char *)"Tossim_addChannel", _wrap_Tossim_addChannel, METH_VARARGS, NULL},
+	 { (char *)"Tossim_removeChannel", _wrap_Tossim_removeChannel, METH_VARARGS, NULL},
+	 { (char *)"Tossim_randomSeed", _wrap_Tossim_randomSeed, METH_VARARGS, NULL},
+	 { (char *)"Tossim_runNextEvent", _wrap_Tossim_runNextEvent, METH_VARARGS, NULL},
+	 { (char *)"Tossim_mac", _wrap_Tossim_mac, METH_VARARGS, NULL},
+	 { (char *)"Tossim_radio", _wrap_Tossim_radio, METH_VARARGS, NULL},
+	 { (char *)"Tossim_newPacket", _wrap_Tossim_newPacket, METH_VARARGS, NULL},
+	 { (char *)"Tossim_swigregister", Tossim_swigregister, METH_VARARGS, NULL},
+	 { NULL, NULL, 0, NULL }
+};
+
+
+/* -------- TYPE CONVERSION AND EQUIVALENCE RULES (BEGIN) -------- */
+
+static swig_type_info _swigt__p_FILE = {"_p_FILE", "FILE *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_MAC = {"_p_MAC", "MAC *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_Mote = {"_p_Mote", "Mote *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_Packet = {"_p_Packet", "Packet *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_Radio = {"_p_Radio", "Radio *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_Tossim = {"_p_Tossim", "Tossim *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_Variable = {"_p_Variable", "Variable *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_char = {"_p_char", "char *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_int = {"_p_int", "int *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_nesc_app = {"_p_nesc_app", "nesc_app *|nesc_app_t *", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_p_char = {"_p_p_char", "char **", 0, 0, (void*)0, 0};
+static swig_type_info _swigt__p_var_string = {"_p_var_string", "var_string *|variable_string_t *", 0, 0, (void*)0, 0};
+
+static swig_type_info *swig_type_initial[] = {
+  &_swigt__p_FILE,
+  &_swigt__p_MAC,
+  &_swigt__p_Mote,
+  &_swigt__p_Packet,
+  &_swigt__p_Radio,
+  &_swigt__p_Tossim,
+  &_swigt__p_Variable,
+  &_swigt__p_char,
+  &_swigt__p_int,
+  &_swigt__p_nesc_app,
+  &_swigt__p_p_char,
+  &_swigt__p_var_string,
+};
+
+static swig_cast_info _swigc__p_FILE[] = {  {&_swigt__p_FILE, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_MAC[] = {  {&_swigt__p_MAC, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_Mote[] = {  {&_swigt__p_Mote, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_Packet[] = {  {&_swigt__p_Packet, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_Radio[] = {  {&_swigt__p_Radio, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_Tossim[] = {  {&_swigt__p_Tossim, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_Variable[] = {  {&_swigt__p_Variable, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_char[] = {  {&_swigt__p_char, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_int[] = {  {&_swigt__p_int, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_nesc_app[] = {  {&_swigt__p_nesc_app, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_p_char[] = {  {&_swigt__p_p_char, 0, 0, 0},{0, 0, 0, 0}};
+static swig_cast_info _swigc__p_var_string[] = {  {&_swigt__p_var_string, 0, 0, 0},{0, 0, 0, 0}};
+
+static swig_cast_info *swig_cast_initial[] = {
+  _swigc__p_FILE,
+  _swigc__p_MAC,
+  _swigc__p_Mote,
+  _swigc__p_Packet,
+  _swigc__p_Radio,
+  _swigc__p_Tossim,
+  _swigc__p_Variable,
+  _swigc__p_char,
+  _swigc__p_int,
+  _swigc__p_nesc_app,
+  _swigc__p_p_char,
+  _swigc__p_var_string,
+};
+
+
+/* -------- TYPE CONVERSION AND EQUIVALENCE RULES (END) -------- */
+
+static swig_const_info swig_const_table[] = {
+{0, 0, 0, 0.0, 0, 0}};
+
+#ifdef __cplusplus
+}
+#endif
+/* -----------------------------------------------------------------------------
+ * Type initialization:
+ * This problem is tough by the requirement that no dynamic 
+ * memory is used. Also, since swig_type_info structures store pointers to 
+ * swig_cast_info structures and swig_cast_info structures store pointers back
+ * to swig_type_info structures, we need some lookup code at initialization. 
+ * The idea is that swig generates all the structures that are needed. 
+ * The runtime then collects these partially filled structures. 
+ * The SWIG_InitializeModule function takes these initial arrays out of 
+ * swig_module, and does all the lookup, filling in the swig_module.types
+ * array with the correct data and linking the correct swig_cast_info
+ * structures together.
+ *
+ * The generated swig_type_info structures are assigned staticly to an initial 
+ * array. We just loop through that array, and handle each type individually.
+ * First we lookup if this type has been already loaded, and if so, use the
+ * loaded structure instead of the generated one. Then we have to fill in the
+ * cast linked list. The cast data is initially stored in something like a
+ * two-dimensional array. Each row corresponds to a type (there are the same
+ * number of rows as there are in the swig_type_initial array). Each entry in
+ * a column is one of the swig_cast_info structures for that type.
+ * The cast_initial array is actually an array of arrays, because each row has
+ * a variable number of columns. So to actually build the cast linked list,
+ * we find the array of casts associated with the type, and loop through it 
+ * adding the casts to the list. The one last trick we need to do is making
+ * sure the type pointer in the swig_cast_info struct is correct.
+ *
+ * First off, we lookup the cast->type name to see if it is already loaded. 
+ * There are three cases to handle:
+ *  1) If the cast->type has already been loaded AND the type we are adding
+ *     casting info to has not been loaded (it is in this module), THEN we
+ *     replace the cast->type pointer with the type pointer that has already
+ *     been loaded.
+ *  2) If BOTH types (the one we are adding casting info to, and the 
+ *     cast->type) are loaded, THEN the cast info has already been loaded by
+ *     the previous module so we just ignore it.
+ *  3) Finally, if cast->type has not already been loaded, then we add that
+ *     swig_cast_info to the linked list (because the cast->type) pointer will
+ *     be correct.
+ * ----------------------------------------------------------------------------- */
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* c-mode */
+#endif
+#endif
+
+#if 0
+#define SWIGRUNTIME_DEBUG
+#endif
+
+
+SWIGRUNTIME void
+SWIG_InitializeModule(void *clientdata) {
+  size_t i;
+  swig_module_info *module_head, *iter;
+  int found;
+  
+  clientdata = clientdata;
+  
+  /* check to see if the circular list has been setup, if not, set it up */
+  if (swig_module.next==0) {
+    /* Initialize the swig_module */
+    swig_module.type_initial = swig_type_initial;
+    swig_module.cast_initial = swig_cast_initial;
+    swig_module.next = &swig_module;
+  }
+  
+  /* Try and load any already created modules */
+  module_head = SWIG_GetModule(clientdata);
+  if (!module_head) {
+    /* This is the first module loaded for this interpreter */
+    /* so set the swig module into the interpreter */
+    SWIG_SetModule(clientdata, &swig_module);
+    module_head = &swig_module;
+  } else {
+    /* the interpreter has loaded a SWIG module, but has it loaded this one? */
+    found=0;
+    iter=module_head;
+    do {
+      if (iter==&swig_module) {
+        found=1;
+        break;
+      }
+      iter=iter->next;
+    } while (iter!= module_head);
+    
+    /* if the is found in the list, then all is done and we may leave */
+    if (found) return;
+    /* otherwise we must add out module into the list */
+    swig_module.next = module_head->next;
+    module_head->next = &swig_module;
+  }
+  
+  /* Now work on filling in swig_module.types */
+#ifdef SWIGRUNTIME_DEBUG
+  printf("SWIG_InitializeModule: size %d\n", swig_module.size);
+#endif
+  for (i = 0; i < swig_module.size; ++i) {
+    swig_type_info *type = 0;
+    swig_type_info *ret;
+    swig_cast_info *cast;
+    
+#ifdef SWIGRUNTIME_DEBUG
+    printf("SWIG_InitializeModule: type %d %s\n", i, swig_module.type_initial[i]->name);
+#endif
+    
+    /* if there is another module already loaded */
+    if (swig_module.next != &swig_module) {
+      type = SWIG_MangledTypeQueryModule(swig_module.next, &swig_module, swig_module.type_initial[i]->name);
+    }
+    if (type) {
+      /* Overwrite clientdata field */
+#ifdef SWIGRUNTIME_DEBUG
+      printf("SWIG_InitializeModule: found type %s\n", type->name);
+#endif
+      if (swig_module.type_initial[i]->clientdata) {
+        type->clientdata = swig_module.type_initial[i]->clientdata;
+#ifdef SWIGRUNTIME_DEBUG
+        printf("SWIG_InitializeModule: found and overwrite type %s \n", type->name);
+#endif
+      }
+    } else {
+      type = swig_module.type_initial[i];
+    }
+    
+    /* Insert casting types */
+    cast = swig_module.cast_initial[i];
+    while (cast->type) {
+      /* Don't need to add information already in the list */
+      ret = 0;
+#ifdef SWIGRUNTIME_DEBUG
+      printf("SWIG_InitializeModule: look cast %s\n", cast->type->name);
+#endif
+      if (swig_module.next != &swig_module) {
+        ret = SWIG_MangledTypeQueryModule(swig_module.next, &swig_module, cast->type->name);
+#ifdef SWIGRUNTIME_DEBUG
+        if (ret) printf("SWIG_InitializeModule: found cast %s\n", ret->name);
+#endif
+      }
+      if (ret) {
+        if (type == swig_module.type_initial[i]) {
+#ifdef SWIGRUNTIME_DEBUG
+          printf("SWIG_InitializeModule: skip old type %s\n", ret->name);
+#endif
+          cast->type = ret;
+          ret = 0;
+        } else {
+          /* Check for casting already in the list */
+          swig_cast_info *ocast = SWIG_TypeCheck(ret->name, type);
+#ifdef SWIGRUNTIME_DEBUG
+          if (ocast) printf("SWIG_InitializeModule: skip old cast %s\n", ret->name);
+#endif
+          if (!ocast) ret = 0;
+        }
+      }
+      
+      if (!ret) {
+#ifdef SWIGRUNTIME_DEBUG
+        printf("SWIG_InitializeModule: adding cast %s\n", cast->type->name);
+#endif
+        if (type->cast) {
+          type->cast->prev = cast;
+          cast->next = type->cast;
+        }
+        type->cast = cast;
+      }
+      cast++;
+    }
+    /* Set entry in modules->types array equal to the type */
+    swig_module.types[i] = type;
+  }
+  swig_module.types[i] = 0;
+  
+#ifdef SWIGRUNTIME_DEBUG
+  printf("**** SWIG_InitializeModule: Cast List ******\n");
+  for (i = 0; i < swig_module.size; ++i) {
+    int j = 0;
+    swig_cast_info *cast = swig_module.cast_initial[i];
+    printf("SWIG_InitializeModule: type %d %s\n", i, swig_module.type_initial[i]->name);
+    while (cast->type) {
+      printf("SWIG_InitializeModule: cast type %s\n", cast->type->name);
+      cast++;
+      ++j;
+    }
+    printf("---- Total casts: %d\n",j);
+  }
+  printf("**** SWIG_InitializeModule: Cast List ******\n");
+#endif
+}
+
+/* This function will propagate the clientdata field of type to
+* any new swig_type_info structures that have been added into the list
+* of equivalent types.  It is like calling
+* SWIG_TypeClientData(type, clientdata) a second time.
+*/
+SWIGRUNTIME void
+SWIG_PropagateClientData(void) {
+  size_t i;
+  swig_cast_info *equiv;
+  static int init_run = 0;
+  
+  if (init_run) return;
+  init_run = 1;
+  
+  for (i = 0; i < swig_module.size; i++) {
+    if (swig_module.types[i]->clientdata) {
+      equiv = swig_module.types[i]->cast;
+      while (equiv) {
+        if (!equiv->converter) {
+          if (equiv->type && !equiv->type->clientdata)
+          SWIG_TypeClientData(equiv->type, swig_module.types[i]->clientdata);
+        }
+        equiv = equiv->next;
+      }
+    }
+  }
+}
+
+#ifdef __cplusplus
+#if 0
+{
+  /* c-mode */
+#endif
+}
+#endif
+
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+  
+  /* Python-specific SWIG API */
+#define SWIG_newvarlink()                             SWIG_Python_newvarlink()
+#define SWIG_addvarlink(p, name, get_attr, set_attr)  SWIG_Python_addvarlink(p, name, get_attr, set_attr)
+#define SWIG_InstallConstants(d, constants)           SWIG_Python_InstallConstants(d, constants)
+  
+  /* -----------------------------------------------------------------------------
+   * global variable support code.
+   * ----------------------------------------------------------------------------- */
+  
+  typedef struct swig_globalvar {
+    char       *name;                  /* Name of global variable */
+    PyObject *(*get_attr)(void);       /* Return the current value */
+    int       (*set_attr)(PyObject *); /* Set the value */
+    struct swig_globalvar *next;
+  } swig_globalvar;
+  
+  typedef struct swig_varlinkobject {
+    PyObject_HEAD
+    swig_globalvar *vars;
+  } swig_varlinkobject;
+  
+  SWIGINTERN PyObject *
+  swig_varlink_repr(swig_varlinkobject *SWIGUNUSEDPARM(v)) {
+    return PyString_FromString("<Swig global variables>");
+  }
+  
+  SWIGINTERN PyObject *
+  swig_varlink_str(swig_varlinkobject *v) {
+    PyObject *str = PyString_FromString("(");
+    swig_globalvar  *var;
+    for (var = v->vars; var; var=var->next) {
+      PyString_ConcatAndDel(&str,PyString_FromString(var->name));
+      if (var->next) PyString_ConcatAndDel(&str,PyString_FromString(", "));
+    }
+    PyString_ConcatAndDel(&str,PyString_FromString(")"));
+    return str;
+  }
+  
+  SWIGINTERN int
+  swig_varlink_print(swig_varlinkobject *v, FILE *fp, int SWIGUNUSEDPARM(flags)) {
+    PyObject *str = swig_varlink_str(v);
+    fprintf(fp,"Swig global variables ");
+    fprintf(fp,"%s\n", PyString_AsString(str));
+    Py_DECREF(str);
+    return 0;
+  }
+  
+  SWIGINTERN void
+  swig_varlink_dealloc(swig_varlinkobject *v) {
+    swig_globalvar *var = v->vars;
+    while (var) {
+      swig_globalvar *n = var->next;
+      free(var->name);
+      free(var);
+      var = n;
+    }
+  }
+  
+  SWIGINTERN PyObject *
+  swig_varlink_getattr(swig_varlinkobject *v, char *n) {
+    PyObject *res = NULL;
+    swig_globalvar *var = v->vars;
+    while (var) {
+      if (strcmp(var->name,n) == 0) {
+        res = (*var->get_attr)();
+        break;
+      }
+      var = var->next;
+    }
+    if (res == NULL && !PyErr_Occurred()) {
+      PyErr_SetString(PyExc_NameError,"Unknown C global variable");
+    }
+    return res;
+  }
+  
+  SWIGINTERN int
+  swig_varlink_setattr(swig_varlinkobject *v, char *n, PyObject *p) {
+    int res = 1;
+    swig_globalvar *var = v->vars;
+    while (var) {
+      if (strcmp(var->name,n) == 0) {
+        res = (*var->set_attr)(p);
+        break;
+      }
+      var = var->next;
+    }
+    if (res == 1 && !PyErr_Occurred()) {
+      PyErr_SetString(PyExc_NameError,"Unknown C global variable");
+    }
+    return res;
+  }
+  
+  SWIGINTERN PyTypeObject*
+  swig_varlink_type(void) {
+    static char varlink__doc__[] = "Swig var link object";
+    static PyTypeObject varlink_type;
+    static int type_init = 0;  
+    if (!type_init) {
+      const PyTypeObject tmp
+      = {
+        PyObject_HEAD_INIT(NULL)
+        0,                                  /* Number of items in variable part (ob_size) */
+        (char *)"swigvarlink",              /* Type name (tp_name) */
+        sizeof(swig_varlinkobject),         /* Basic size (tp_basicsize) */
+        0,                                  /* Itemsize (tp_itemsize) */
+        (destructor) swig_varlink_dealloc,   /* Deallocator (tp_dealloc) */ 
+        (printfunc) swig_varlink_print,     /* Print (tp_print) */
+        (getattrfunc) swig_varlink_getattr, /* get attr (tp_getattr) */
+        (setattrfunc) swig_varlink_setattr, /* Set attr (tp_setattr) */
+        0,                                  /* tp_compare */
+        (reprfunc) swig_varlink_repr,       /* tp_repr */
+        0,                                  /* tp_as_number */
+        0,                                  /* tp_as_sequence */
+        0,                                  /* tp_as_mapping */
+        0,                                  /* tp_hash */
+        0,                                  /* tp_call */
+        (reprfunc)swig_varlink_str,        /* tp_str */
+        0,                                  /* tp_getattro */
+        0,                                  /* tp_setattro */
+        0,                                  /* tp_as_buffer */
+        0,                                  /* tp_flags */
+        varlink__doc__,                     /* tp_doc */
+        0,                                  /* tp_traverse */
+        0,                                  /* tp_clear */
+        0,                                  /* tp_richcompare */
+        0,                                  /* tp_weaklistoffset */
+#if PY_VERSION_HEX >= 0x02020000
+        0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* tp_iter -> tp_weaklist */
+#endif
+#if PY_VERSION_HEX >= 0x02030000
+        0,                                  /* tp_del */
+#endif
+#ifdef COUNT_ALLOCS
+        0,0,0,0                             /* tp_alloc -> tp_next */
+#endif
+      };
+      varlink_type = tmp;
+      varlink_type.ob_type = &PyType_Type;
+      type_init = 1;
+    }
+    return &varlink_type;
+  }
+  
+  /* Create a variable linking object for use later */
+  SWIGINTERN PyObject *
+  SWIG_Python_newvarlink(void) {
+    swig_varlinkobject *result = PyObject_NEW(swig_varlinkobject, swig_varlink_type());
+    if (result) {
+      result->vars = 0;
+    }
+    return ((PyObject*) result);
+  }
+  
+  SWIGINTERN void 
+  SWIG_Python_addvarlink(PyObject *p, char *name, PyObject *(*get_attr)(void), int (*set_attr)(PyObject *p)) {
+    swig_varlinkobject *v = (swig_varlinkobject *) p;
+    swig_globalvar *gv = (swig_globalvar *) malloc(sizeof(swig_globalvar));
+    if (gv) {
+      size_t size = strlen(name)+1;
+      gv->name = (char *)malloc(size);
+      if (gv->name) {
+        strncpy(gv->name,name,size);
+        gv->get_attr = get_attr;
+        gv->set_attr = set_attr;
+        gv->next = v->vars;
+      }
+    }
+    v->vars = gv;
+  }
+  
+  SWIGINTERN PyObject *
+  SWIG_globals(void) {
+    static PyObject *_SWIG_globals = 0; 
+    if (!_SWIG_globals) _SWIG_globals = SWIG_newvarlink();  
+    return _SWIG_globals;
+  }
+  
+  /* -----------------------------------------------------------------------------
+   * constants/methods manipulation
+   * ----------------------------------------------------------------------------- */
+  
+  /* Install Constants */
+  SWIGINTERN void
+  SWIG_Python_InstallConstants(PyObject *d, swig_const_info constants[]) {
+    PyObject *obj = 0;
+    size_t i;
+    for (i = 0; constants[i].type; ++i) {
+      switch(constants[i].type) {
+      case SWIG_PY_POINTER:
+        obj = SWIG_NewPointerObj(constants[i].pvalue, *(constants[i]).ptype,0);
+        break;
+      case SWIG_PY_BINARY:
+        obj = SWIG_NewPackedObj(constants[i].pvalue, constants[i].lvalue, *(constants[i].ptype));
+        break;
+      default:
+        obj = 0;
+        break;
+      }
+      if (obj) {
+        PyDict_SetItemString(d, constants[i].name, obj);
+        Py_DECREF(obj);
+      }
+    }
+  }
+  
+  /* -----------------------------------------------------------------------------*/
+  /* Fix SwigMethods to carry the callback ptrs when needed */
+  /* -----------------------------------------------------------------------------*/
+  
+  SWIGINTERN void
+  SWIG_Python_FixMethods(PyMethodDef *methods,
+    swig_const_info *const_table,
+    swig_type_info **types,
+    swig_type_info **types_initial) {
+    size_t i;
+    for (i = 0; methods[i].ml_name; ++i) {
+      const char *c = methods[i].ml_doc;
+      if (c && (c = strstr(c, "swig_ptr: "))) {
+        int j;
+        swig_const_info *ci = 0;
+        const char *name = c + 10;
+        for (j = 0; const_table[j].type; ++j) {
+          if (strncmp(const_table[j].name, name, 
+              strlen(const_table[j].name)) == 0) {
+            ci = &(const_table[j]);
+            break;
+          }
+        }
+        if (ci) {
+          size_t shift = (ci->ptype) - types;
+          swig_type_info *ty = types_initial[shift];
+          size_t ldoc = (c - methods[i].ml_doc);
+          size_t lptr = strlen(ty->name)+2*sizeof(void*)+2;
+          char *ndoc = (char*)malloc(ldoc + lptr + 10);
+          if (ndoc) {
+            char *buff = ndoc;
+            void *ptr = (ci->type == SWIG_PY_POINTER) ? ci->pvalue : 0;
+            if (ptr) {
+              strncpy(buff, methods[i].ml_doc, ldoc);
+              buff += ldoc;
+              strncpy(buff, "swig_ptr: ", 10);
+              buff += 10;
+              SWIG_PackVoidPtr(buff, ptr, ty->name, lptr);
+              methods[i].ml_doc = ndoc;
+            }
+          }
+        }
+      }
+    }
+  } 
+  
+#ifdef __cplusplus
+}
+#endif
+
+/* -----------------------------------------------------------------------------*
+ *  Partial Init method
+ * -----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+extern "C"
+#endif
+SWIGEXPORT void SWIG_init(void) {
+  PyObject *m, *d;
+  
+  /* Fix SwigMethods to carry the callback ptrs when needed */
+  SWIG_Python_FixMethods(SwigMethods, swig_const_table, swig_types, swig_type_initial);
+  
+  m = Py_InitModule((char *) SWIG_name, SwigMethods);
+  d = PyModule_GetDict(m);
+  
+  SWIG_InitializeModule(0);
+  SWIG_InstallConstants(d,swig_const_table);
+  
+  
+}
+
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128AdcC.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128AdcC.nc
new file mode 100644
index 00000000..697e5ae3
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128AdcC.nc
@@ -0,0 +1,55 @@
+/// $Id: HplAtm128AdcC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * HPL for the Atmega128 A/D conversion susbsystem.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */
+
+configuration HplAtm128AdcC {
+  provides interface HplAtm128Adc;
+}
+implementation {
+  components HplAtm128AdcP, McuSleepC;
+
+  HplAtm128Adc = HplAtm128AdcP;
+  HplAtm128AdcP.McuPowerState -> McuSleepC;
+  
+  components PlatformInterruptC;
+  HplAtm128AdcP.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128AdcP.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128AdcP.nc
new file mode 100644
index 00000000..45dc3ebc
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128AdcP.nc
@@ -0,0 +1,143 @@
+/// $Id: HplAtm128AdcP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Atm128Adc.h"
+
+/**
+ * HPL for the Atmega128 A/D conversion susbsystem.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */
+
+module HplAtm128AdcP {
+  provides interface HplAtm128Adc;
+  uses interface McuPowerState;
+  uses interface PlatformInterrupt;
+}
+implementation {
+  //=== Direct read of HW registers. =================================
+  async command Atm128Admux_t HplAtm128Adc.getAdmux() { 
+    return *(Atm128Admux_t*)&ADMUX; 
+  }
+  async command Atm128Adcsra_t HplAtm128Adc.getAdcsra() { 
+    return *(Atm128Adcsra_t*)&ADCSRA; 
+  }
+  async command uint16_t HplAtm128Adc.getValue() { 
+    return ADC; 
+  }
+
+  DEFINE_UNION_CAST(Admux2int, Atm128Admux_t, uint8_t);
+  DEFINE_UNION_CAST(Adcsra2int, Atm128Adcsra_t, uint8_t);
+
+  //=== Direct write of HW registers. ================================
+  async command void HplAtm128Adc.setAdmux( Atm128Admux_t x ) { 
+    ADMUX = Admux2int(x); 
+  }
+  async command void HplAtm128Adc.setAdcsra( Atm128Adcsra_t x ) { 
+    ADCSRA = Adcsra2int(x); 
+  }
+
+  async command void HplAtm128Adc.setPrescaler(uint8_t scale){
+    Atm128Adcsra_t  current_val = call HplAtm128Adc.getAdcsra(); 
+    current_val.adif = FALSE;
+    current_val.adps = scale;
+    call HplAtm128Adc.setAdcsra(current_val);
+  }
+
+  // Individual bit manipulation. These all clear any pending A/D interrupt.
+  async command void HplAtm128Adc.enableAdc() {
+    SET_BIT(ADCSRA, ADEN); 
+    call McuPowerState.update();
+  }
+  async command void HplAtm128Adc.disableAdc() {
+    CLR_BIT(ADCSRA, ADEN); 
+    call McuPowerState.update();
+  }
+  async command void HplAtm128Adc.enableInterruption() { SET_BIT(ADCSRA, ADIE); }
+  async command void HplAtm128Adc.disableInterruption() { CLR_BIT(ADCSRA, ADIE); }
+  async command void HplAtm128Adc.setContinuous() { SET_BIT(ADCSRA, ADFR); }
+  async command void HplAtm128Adc.setSingle() { CLR_BIT(ADCSRA, ADFR); }
+  async command void HplAtm128Adc.resetInterrupt() { SET_BIT(ADCSRA, ADIF); }
+  async command void HplAtm128Adc.startConversion() { SET_BIT(ADCSRA, ADSC); }
+
+
+  /* A/D status checks */
+  async command bool HplAtm128Adc.isEnabled()     {       
+    return (call HplAtm128Adc.getAdcsra()).aden; 
+  }
+
+  async command bool HplAtm128Adc.isStarted()     {
+    return (call HplAtm128Adc.getAdcsra()).adsc; 
+  }
+  
+  async command bool HplAtm128Adc.isComplete()    {
+    return (call HplAtm128Adc.getAdcsra()).adif; 
+  }
+
+  /* A/D interrupt handlers. Signals dataReady event with interrupts enabled */
+  AVR_ATOMIC_HANDLER(SIG_ADC) {
+    uint16_t data = call HplAtm128Adc.getValue();
+    
+    __nesc_enable_interrupt();
+    signal HplAtm128Adc.dataReady(data);
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void HplAtm128Adc.dataReady(uint16_t done) { }
+
+  async command bool HplAtm128Adc.cancel() { 
+    /* This is tricky */
+    atomic
+      {
+	Atm128Adcsra_t oldSr = call HplAtm128Adc.getAdcsra(), newSr;
+
+	/* To cancel a conversion, first turn off ADEN, then turn off
+	   ADSC. We also cancel any pending interrupt.
+	   Finally we reenable the ADC.
+	*/
+	newSr = oldSr;
+	newSr.aden = FALSE;
+	newSr.adif = TRUE; /* This clears a pending interrupt... */
+	newSr.adie = FALSE; /* We don't want to start sampling again at the
+			       next sleep */
+	call HplAtm128Adc.setAdcsra(newSr);
+	newSr.adsc = FALSE;
+	call HplAtm128Adc.setAdcsra(newSr);
+	newSr.aden = TRUE;
+	call HplAtm128Adc.setAdcsra(newSr);
+
+	return oldSr.adif || oldSr.adsc;
+      }
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128I2CBusC.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128I2CBusC.nc
new file mode 100644
index 00000000..d476096e
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128I2CBusC.nc
@@ -0,0 +1,59 @@
+/// $Id: HplAtm128I2CBusC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ *  Copyright (c) 2004-2006 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This driver implements direct I2C register access and a blocking master
+ * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its  
+ * two-wire-interface (TWI) hardware subsystem.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Philip Levis
+ *
+ * @version    $Id: HplAtm128I2CBusC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+ */
+
+configuration HplAtm128I2CBusC {
+  provides interface HplAtm128I2CBus as I2C;
+}
+implementation {
+
+  components HplAtm128GeneralIOC as IO, HplAtm128I2CBusP as Bus;
+  
+  I2C         = Bus.I2C;
+  Bus.I2CClk  -> IO.PortD0;
+  Bus.I2CData -> IO.PortD1;
+  
+  components PlatformInterruptC;
+  Bus.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128I2CBusP.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128I2CBusP.nc
new file mode 100644
index 00000000..250c84b8
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128I2CBusP.nc
@@ -0,0 +1,194 @@
+/// $Id: HplAtm128I2CBusP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#define F_CPU       7372800
+
+#include "Atm128I2C.h"
+
+/**
+ * This driver implements direct I2C register access and a blocking master
+ * controller for the ATmega128 via a Hardware Platform Layer (HPL) to its  
+ * two-wire-interface (TWI) hardware subsystem.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Philip Levis
+ *
+ * @version $Id: HplAtm128I2CBusP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+ */
+module HplAtm128I2CBusP {
+  provides interface HplAtm128I2CBus as I2C;
+
+  uses {
+    interface GeneralIO as I2CClk;
+    interface GeneralIO as I2CData;
+    interface PlatformInterrupt;
+  }
+}
+implementation {
+  uint8_t current;
+  
+  async command void I2C.init(bool hasExternalPulldown) {
+    // Set the internal pullup resisters
+    if (hasExternalPulldown) {
+      //call I2CClk.makeOutput();
+      //call I2CData.makeOutput();
+      call I2CClk.set();
+      call I2CData.set();
+    }
+    call I2CClk.makeInput();
+    call I2CData.makeInput();
+    TWSR = 0;                             // set prescaler == 0
+    TWBR = (F_CPU / 50000UL - 16) / 2;   // set I2C baud rate
+    //TWBR = 50;
+    TWAR = 0;
+    TWCR = 0;
+  }
+
+  async command void I2C.off() {
+    call I2CClk.clr();
+    call I2CData.clr();
+  }
+  
+  async command uint8_t I2C.status() {
+    return TWSR & 0xf8;
+  }
+
+  async command void I2C.sendCommand() {
+    atomic TWCR = current;
+  }
+
+  async command void I2C.readCurrent() {
+    atomic current = TWCR;
+  }
+  
+  /** Send START symbol and begin I2C bus transaction. */
+  async command void I2C.setStart(bool on) {
+    if (on) {
+      atomic SET_BIT(current, TWSTA);
+    }
+    else {
+      atomic CLR_BIT(current, TWSTA);
+    }
+  }
+  async command bool I2C.hasStart() {
+    return READ_BIT(current, TWSTA);
+  }
+
+  async command void I2C.setStop(bool on) {
+    if (on) {
+      atomic SET_BIT(current, TWSTO);
+    }
+    else {
+      atomic CLR_BIT(current, TWSTO);
+    }
+  }
+  async command bool I2C.hasStop() {
+    return READ_BIT(current, TWSTO);
+  }
+  
+  /** Write a byte to an I2C slave device. */
+  async command void I2C.write(uint8_t data) {
+    TWDR = data;
+  }
+
+  async command uint8_t I2C.read() {
+    return TWDR;
+  }
+
+  async command void I2C.enableAck(bool enable) {
+    if (enable) {
+      atomic SET_BIT(current, TWEA);
+    }
+    else {
+      atomic CLR_BIT(current, TWEA);
+    }
+  }
+  
+  async command bool I2C.hasAcks() {
+    return READ_BIT(current, TWEA);
+  }
+  
+  async command void I2C.enableInterrupt(bool enable) {
+    if (enable) {
+      atomic SET_BIT(current, TWIE);
+    }
+    else {
+      atomic CLR_BIT(current, TWIE);
+    }
+  }
+
+  async command bool I2C.isInterruptEnabled() {
+    return READ_BIT(current, TWIE);
+  }
+  
+  async command bool I2C.isRealInterruptPending() {
+    return READ_BIT(TWCR, TWINT);
+  }
+
+  async command bool I2C.isInterruptPending() {
+    return READ_BIT(current, TWINT);
+  }
+
+  async command void I2C.setInterruptPending(bool on) {
+    if (on) {
+      atomic SET_BIT(current, TWINT);
+    }
+    else {
+      atomic CLR_BIT(current, TWINT);
+    }
+  }
+  
+  async command void I2C.enable(bool enable) {
+    if (enable) {
+      atomic SET_BIT(current, TWEN);
+    }
+    else {
+      atomic CLR_BIT(current, TWEN);
+    }
+  }
+
+  async command bool I2C.isEnabled() {
+    return READ_BIT(current, TWEN);
+  }
+
+  async command bool I2C.hasWriteCollided() {
+    return READ_BIT(current, TWWC);
+  }
+
+  default async event void I2C.commandComplete() { }
+  AVR_ATOMIC_HANDLER(SIG_2WIRE_SERIAL) {
+    signal I2C.commandComplete();
+    call PlatformInterrupt.postAmble();
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128InterruptC.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128InterruptC.nc
new file mode 100644
index 00000000..8c927ae8
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128InterruptC.nc
@@ -0,0 +1,92 @@
+/// $Id: HplAtm128InterruptC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <atm128hardware.h>
+
+/**
+ * Component providing access to all external interrupt pins on ATmega128.
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+configuration HplAtm128InterruptC
+{
+  // provides all the ports as raw ports
+  provides {
+    interface HplAtm128Interrupt as Int0;
+    interface HplAtm128Interrupt as Int1;
+    interface HplAtm128Interrupt as Int2;
+    interface HplAtm128Interrupt as Int3;
+    interface HplAtm128Interrupt as Int4;
+    interface HplAtm128Interrupt as Int5;
+    interface HplAtm128Interrupt as Int6;
+    interface HplAtm128Interrupt as Int7;
+  }
+}
+implementation
+{
+#define IRQ_PORT_D_PIN(bit) (uint8_t)&EICRA, ISC##bit##0, ISC##bit##1, bit
+#define IRQ_PORT_E_PIN(bit) (uint8_t)&EICRB, ISC##bit##0, ISC##bit##1, bit
+
+  components 
+    HplAtm128InterruptSigP as IrqVector,
+    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(0)) as IntPin0,
+    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(1)) as IntPin1,
+    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(2)) as IntPin2,
+    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(3)) as IntPin3,
+    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(4)) as IntPin4,
+    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(5)) as IntPin5,
+    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(6)) as IntPin6,
+    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(7)) as IntPin7;
+  
+  Int0 = IntPin0;
+  Int1 = IntPin1;
+  Int2 = IntPin2;
+  Int3 = IntPin3;
+  Int4 = IntPin4;
+  Int5 = IntPin5;
+  Int6 = IntPin6;
+  Int7 = IntPin7;
+
+  IntPin0.IrqSignal -> IrqVector.IntSig0;
+  IntPin1.IrqSignal -> IrqVector.IntSig1;
+  IntPin2.IrqSignal -> IrqVector.IntSig2;
+  IntPin3.IrqSignal -> IrqVector.IntSig3;
+  IntPin4.IrqSignal -> IrqVector.IntSig4;
+  IntPin5.IrqSignal -> IrqVector.IntSig5;
+  IntPin6.IrqSignal -> IrqVector.IntSig6;
+  IntPin7.IrqSignal -> IrqVector.IntSig7;
+
+  components PlatformInterruptC;
+  IrqVector.PlatformInterrupt -> PlatformInterruptC;
+}
+
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128InterruptSigP.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128InterruptSigP.nc
new file mode 100644
index 00000000..9af98602
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128InterruptSigP.nc
@@ -0,0 +1,102 @@
+/// $Id: HplAtm128InterruptSigP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interrupt interface access for interrupt capable GPIO pins.
+ * Exposes just the interrupt vector routine for 
+ * easy linking to generic components.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+module HplAtm128InterruptSigP
+{
+  provides interface HplAtm128InterruptSig as IntSig0;
+  provides interface HplAtm128InterruptSig as IntSig1;
+  provides interface HplAtm128InterruptSig as IntSig2;
+  provides interface HplAtm128InterruptSig as IntSig3;
+  provides interface HplAtm128InterruptSig as IntSig4;
+  provides interface HplAtm128InterruptSig as IntSig5;
+  provides interface HplAtm128InterruptSig as IntSig6;
+  provides interface HplAtm128InterruptSig as IntSig7;
+  uses interface PlatformInterrupt;
+}
+implementation
+{
+  default async event void IntSig0.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT0 ) {
+    signal IntSig0.fired();
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void IntSig1.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT1 ) {
+    signal IntSig1.fired();
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void IntSig2.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT2 ) {
+    signal IntSig2.fired();
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void IntSig3.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT3 ) {
+    signal IntSig3.fired();
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void IntSig4.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT4 ) {
+    signal IntSig4.fired();
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void IntSig5.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT5 ) {
+    signal IntSig5.fired();
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void IntSig6.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT6 ) {
+    signal IntSig6.fired();
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void IntSig7.fired() { }
+  AVR_ATOMIC_HANDLER( SIG_INTERRUPT7 ) {
+    signal IntSig7.fired();
+    call PlatformInterrupt.postAmble();
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128SpiC.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128SpiC.nc
new file mode 100644
index 00000000..8bfbe7eb
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128SpiC.nc
@@ -0,0 +1,93 @@
+/// $Id: HplAtm128SpiC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Configuration encapsulating the basic SPI HPL for the atm128.
+ *
+ * <pre>
+ * $Id: HplAtm128SpiC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+ * </pre>
+ *
+ * @author Philip Levis
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+
+configuration HplAtm128SpiC {
+    provides interface Atm128Spi as SpiBus;
+}
+implementation
+{
+  components HplAtm128GeneralIOC as IO, HplAtm128SpiP as HplSpi;
+  components McuSleepC;
+  
+  SpiBus = HplSpi;
+
+  HplSpi.Mcu -> McuSleepC;
+  HplSpi.SS   -> IO.PortB0;  // Slave set line
+  HplSpi.SCK  -> IO.PortB1;  // SPI clock line
+  HplSpi.MOSI -> IO.PortB2;  // Master out, slave in
+  HplSpi.MISO -> IO.PortB3;  // Master in, slave out
+  
+  components PlatformInterruptC;
+  HplSpi.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128SpiP.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128SpiP.nc
new file mode 100644
index 00000000..69f9d180
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128SpiP.nc
@@ -0,0 +1,240 @@
+/// $Id: HplAtm128SpiP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the SPI bus abstraction for the atm128
+ * microcontroller.
+ *
+ * @author Philip Levis
+ * @author Martin Turon
+ */
+
+#include "Atm128Spi.h"
+
+module HplAtm128SpiP {
+  provides interface Atm128Spi as SPI;
+  provides interface AsyncStdControl;
+  
+  uses {
+    interface GeneralIO as SS;   // Slave set line
+    interface GeneralIO as SCK;  // SPI clock line
+    interface GeneralIO as MOSI; // Master out, slave in
+    interface GeneralIO as MISO; // Master in, slave out
+    interface McuPowerState as Mcu;
+    interface PlatformInterrupt;
+  }
+}
+implementation {
+
+  async command error_t AsyncStdControl.start() {
+    call SPI.enableSpi(TRUE);
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    call SPI.enableInterrupt(FALSE);
+    call SPI.enableSpi(FALSE);
+  }
+  
+  async command void SPI.initMaster() {
+    call MOSI.makeOutput();
+    call MISO.makeInput();
+    call SCK.makeOutput();
+    call SPI.setMasterBit(TRUE);
+  }
+
+  async command void SPI.initSlave() {
+    call MISO.makeOutput();
+    call MOSI.makeInput();
+    call SCK.makeInput();
+    call SS.makeInput();
+    call SPI.setMasterBit(FALSE);
+  }
+  
+  async command void SPI.sleep() {
+//    call SS.set();	// why was this needed?
+  }
+  
+  async command uint8_t SPI.read()        { return SPDR; }
+  async command void SPI.write(uint8_t d) { SPDR = d; }
+    
+  default async event void SPI.dataReady(uint8_t d) {}
+  AVR_ATOMIC_HANDLER(SIG_SPI) {
+    signal SPI.dataReady(call SPI.read());
+    call PlatformInterrupt.postAmble();
+  }
+
+  //=== SPI Bus utility routines. ====================================
+  async command bool SPI.isInterruptPending() {
+    return READ_BIT(SPSR, SPIF);
+  }
+
+  async command bool SPI.isInterruptEnabled () {                
+    return READ_BIT(SPCR, SPIE);
+  }
+
+  async command void SPI.enableInterrupt(bool enabled) {
+    if (enabled) {
+      SET_BIT(SPCR, SPIE);
+      call Mcu.update();
+    }
+    else {
+      CLR_BIT(SPCR, SPIE);
+      call Mcu.update();
+    }
+  }
+
+  async command bool SPI.isSpiEnabled() {
+    return READ_BIT(SPCR, SPE);
+  }
+  
+  async command void SPI.enableSpi(bool enabled) {
+    if (enabled) {
+      SET_BIT(SPCR, SPE);
+      call Mcu.update();
+    }
+    else {
+      CLR_BIT(SPCR, SPE);
+      call Mcu.update();
+    }
+  }
+
+  /* DORD bit */
+  async command void SPI.setDataOrder(bool lsbFirst) {
+    if (lsbFirst) {
+      SET_BIT(SPCR, DORD);
+    }
+    else {
+      CLR_BIT(SPCR, DORD);
+    }
+  }
+  
+  async command bool SPI.isOrderLsbFirst() {
+    return READ_BIT(SPCR, DORD);
+  }
+  
+  /* MSTR bit */
+  async command void SPI.setMasterBit(bool isMaster) {
+    if (isMaster) {
+      SET_BIT(SPCR, MSTR);
+    }
+    else {
+      CLR_BIT(SPCR, MSTR);
+    }
+  }
+  async command bool SPI.isMasterBitSet() {
+    return READ_BIT(SPCR, MSTR);
+  }
+  
+  /* CPOL bit */
+  async command void SPI.setClockPolarity(bool highWhenIdle) {
+    if (highWhenIdle) {
+      SET_BIT(SPCR, CPOL);
+    }
+    else {
+      CLR_BIT(SPCR, CPOL);
+    }
+  }
+  
+  async command bool SPI.getClockPolarity() {
+    return READ_BIT(SPCR, CPOL);
+  }
+  
+  /* CPHA bit */
+  async command void SPI.setClockPhase(bool sampleOnTrailing) {
+    if (sampleOnTrailing) {
+      SET_BIT(SPCR, CPHA);
+    }
+    else {
+      CLR_BIT(SPCR, CPHA);
+    }
+  }
+  async command bool SPI.getClockPhase() {
+    return READ_BIT(SPCR, CPHA);
+  }
+
+  
+  async command uint8_t SPI.getClock () {                
+    return READ_FLAG(SPCR, ((1 << SPR1) | (1 <<SPR0)));
+  }
+  
+  async command void SPI.setClock (uint8_t v) {
+    v &= (SPR1) | (SPR0);
+    SPCR = (SPCR & ~(SPR1 | SPR0)) | v;
+  }
+
+  async command bool SPI.hasWriteCollided() {
+    return READ_BIT(SPSR, WCOL);
+  }
+
+  async command bool SPI.isMasterDoubleSpeed() {
+    return READ_BIT(SPSR, SPI2X);
+  }
+
+  async command void SPI.setMasterDoubleSpeed(bool on) {
+   if (on) {
+      SET_BIT(SPSR, SPI2X);
+    }
+    else {
+      CLR_BIT(SPSR, SPI2X);
+    }
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128Timer0AsyncC.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer0AsyncC.nc
new file mode 100644
index 00000000..c314df3e
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer0AsyncC.nc
@@ -0,0 +1,67 @@
+/// $Id: HplAtm128Timer0AsyncC.nc,v 1.1 2008-06-12 14:02:14 klueska Exp $
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Simple wrapper around the actual timer implementation that automatically
+ * wires it to McuSleepC for low-power calculations..
+ *
+ * @author Philip Levis
+ * @author David Gay
+ */
+
+#include <Atm128Timer.h>
+
+configuration HplAtm128Timer0AsyncC
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface HplAtm128TimerAsync       as TimerAsync;
+  }
+}
+implementation
+{
+  components HplAtm128Timer0AsyncP;
+  components McuSleepC;
+
+  McuSleepC.McuPowerOverride -> HplAtm128Timer0AsyncP;
+
+  Timer = HplAtm128Timer0AsyncP;
+  TimerCtrl = HplAtm128Timer0AsyncP;
+  Compare = HplAtm128Timer0AsyncP;
+  TimerAsync = HplAtm128Timer0AsyncP;
+  
+  components PlatformInterruptC;
+  HplAtm128Timer0AsyncP.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128Timer0AsyncP.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer0AsyncP.nc
new file mode 100644
index 00000000..b0e0603e
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer0AsyncP.nc
@@ -0,0 +1,225 @@
+/// $Id: HplAtm128Timer0AsyncP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to Atmega128 timer 0 in ASYNC mode. This is a specialised
+ * HPL component that assumes that timer 0 is used in ASYNC mode and
+ * includes some workarounds for some of the weirdnesses (delayed overflow
+ * interrupt) of that mode.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm128Timer0AsyncP {
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface McuPowerOverride;
+    interface HplAtm128TimerAsync       as TimerAsync;
+  }
+  uses interface PlatformInterrupt;
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer.get() { return TCNT0; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint8_t t)  {
+    TCNT0 = t;
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR0 & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128TimerControl_t x = call TimerCtrl.getControl();
+    x.bits.cs = s;
+    call TimerCtrl.setControl(x);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t TimerCtrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR0; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setControl( Atm128TimerControl_t x ) { 
+    TCCR0 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t TimerCtrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t TimerCtrl.getInterruptFlag() { 
+    return *(Atm128_TIFR_t*)&TIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer.reset() { TIFR = 1 << TOV0; }
+  async command void Timer.start() { SET_BIT(TIMSK, TOIE0); }
+  async command void Timer.stop()  { CLR_BIT(TIMSK, TOIE0); }
+
+  bool overflowed() {
+    return (call TimerCtrl.getInterruptFlag()).bits.tov0; 
+  }
+
+  async command bool Timer.test()  { 
+    return overflowed();
+  }
+  async command bool Timer.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.toie0; 
+  }
+  async command void Compare.reset() { TIFR = 1 << OCF0; }
+  async command void Compare.start() { SET_BIT(TIMSK,OCIE0); }
+  async command void Compare.stop()  { CLR_BIT(TIMSK,OCIE0); }
+  async command bool Compare.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf0; 
+  }
+  async command bool Compare.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.ocie0; 
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint8_t Compare.get()   { return OCR0; }
+
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(uint8_t t)   { 
+    OCR0 = t; 
+  }
+
+  //=== Timer interrupts signals ========================================
+  inline void stabiliseTimer0() {
+    TCCR0 = TCCR0;
+    while (ASSR & 1 << TCR0UB)
+      ;
+  }
+
+  /**
+   * On the atm128, there is a small latency when waking up from
+   * POWER_SAVE mode. So if a timer is going to go off very soon, it's
+   * better to drop down until EXT_STANDBY, which has a 6 cycle wakeup
+   * latency. This function calculates whether staying in EXT_STANDBY
+   * is needed. If the timer is not running it returns POWER_DOWN.
+   * Please refer to TEP 112 and the atm128 datasheet for details.
+   */
+  
+  async command mcu_power_t McuPowerOverride.lowestState() {
+    uint8_t diff;
+    // We need to make sure that the sleep wakeup latency will not
+    // cause us to miss a timer. POWER_SAVE 
+    if (TIMSK & (1 << OCIE0 | 1 << TOIE0)) {
+      // need to wait for timer 0 updates propagate before sleeping
+      // (we don't need to worry about reentering sleep mode too early,
+      // as the wake ups from timer0 wait at least one TOSC1 cycle
+      // anyway - see the stabiliseTimer0 function)
+      while (ASSR & (1 << TCN0UB | 1 << OCR0UB | 1 << TCR0UB))
+	;
+      diff = OCR0 - TCNT0;
+      if (diff < EXT_STANDBY_T0_THRESHOLD ||
+	  TCNT0 > 256 - EXT_STANDBY_T0_THRESHOLD) 
+	return ATM128_POWER_EXT_STANDBY;
+      return ATM128_POWER_SAVE;
+    }
+    else {
+      return ATM128_POWER_DOWN;
+    }
+  }
+  
+  default async event void Compare.fired() { }
+  AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) {
+    stabiliseTimer0();
+    signal Compare.fired();
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void Timer.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) {
+    stabiliseTimer0();
+    signal Timer.overflow();
+    call PlatformInterrupt.postAmble();
+  }
+
+  // Asynchronous status register support
+  async command Atm128Assr_t TimerAsync.getAssr() {
+    return *(Atm128Assr_t *)&ASSR;
+  }
+
+  async command void TimerAsync.setAssr(Atm128Assr_t x) {
+    ASSR = x.flat;
+  }
+
+  async command void TimerAsync.setTimer0Asynchronous() {
+    ASSR |= 1 << AS0;
+  }
+
+  async command int TimerAsync.controlBusy() {
+    return (ASSR & (1 << TCR0UB)) != 0;
+  }
+
+  async command int TimerAsync.compareBusy() {
+    return (ASSR & (1 << OCR0UB)) != 0;
+  }
+
+  async command int TimerAsync.countBusy() {
+    return (ASSR & (1 << TCN0UB)) != 0;
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128Timer1C.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer1C.nc
new file mode 100644
index 00000000..dac5eb7c
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer1C.nc
@@ -0,0 +1,67 @@
+/// $Id: HplAtm128Timer1C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to Atmega128 timer 1.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+configuration HplAtm128Timer1C
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as Compare[uint8_t id];
+  }
+}
+implementation
+{
+  components HplAtm128Timer0AsyncC, HplAtm128Timer1P;
+
+  Timer = HplAtm128Timer1P;
+  TimerCtrl = HplAtm128Timer1P;
+  Capture = HplAtm128Timer1P;
+
+  Compare[0] = HplAtm128Timer1P.CompareA; 
+  Compare[1] = HplAtm128Timer1P.CompareB;
+  Compare[2] = HplAtm128Timer1P.CompareC;
+
+  HplAtm128Timer1P.Timer0Ctrl -> HplAtm128Timer0AsyncC;
+  
+  components PlatformInterruptC;
+  HplAtm128Timer1P.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128Timer1P.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer1P.nc
new file mode 100644
index 00000000..fcfc3f3d
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer1P.nc
@@ -0,0 +1,229 @@
+/// $Id: HplAtm128Timer1P.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Internal component of the HPL interface to Atmega128 timer 1.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm128Timer1P
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as CompareA;
+    interface HplAtm128Compare<uint16_t> as CompareB;
+    interface HplAtm128Compare<uint16_t> as CompareC;
+  }
+  uses interface HplAtm128TimerCtrl8     as Timer0Ctrl;
+  uses interface PlatformInterrupt;
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint16_t Timer.get() { return TCNT1; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint16_t t) { TCNT1 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR1B & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128TimerCtrlCapture_t x = call TimerCtrl.getCtrlCapture();
+    x.bits.cs = s;
+    call TimerCtrl.setCtrlCapture(x);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerCtrlCompare_t TimerCtrl.getCtrlCompare() { 
+    return *(Atm128TimerCtrlCompare_t*)&TCCR1A; 
+  }
+  async command Atm128TimerCtrlCapture_t TimerCtrl.getCtrlCapture() { 
+    return *(Atm128TimerCtrlCapture_t*)&TCCR1B; 
+  }
+  async command Atm128TimerCtrlClock_t TimerCtrl.getCtrlClock() { 
+    return *(Atm128TimerCtrlClock_t*)&TCCR1C; 
+  }
+
+
+  //=== Control registers utilities. ==================================
+  DEFINE_UNION_CAST(TimerCtrlCompare2int, Atm128TimerCtrlCompare_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t);
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setCtrlCompare( Atm128_TCCR1A_t x ) { 
+    TCCR1A = TimerCtrlCompare2int(x); 
+  }
+  async command void TimerCtrl.setCtrlCapture( Atm128_TCCR1B_t x ) { 
+    TCCR1B = TimerCtrlCapture2int(x); 
+  }
+  async command void TimerCtrl.setCtrlClock( Atm128_TCCR1C_t x ) { 
+    TCCR1C = TimerCtrlClock2int(x); 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_ETIMSK_t TimerCtrl.getInterruptMask() { 
+    return *(Atm128_ETIMSK_t*)&ETIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptMask( Atm128_ETIMSK_t x ) { 
+    ETIMSK = TimerMask16_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_ETIFR_t TimerCtrl.getInterruptFlag() { 
+    return *(Atm128_ETIFR_t*)&ETIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptFlag( Atm128_ETIFR_t x ) { 
+    ETIFR = TimerFlags16_2int(x); 
+  }
+
+  //=== Capture 16-bit implementation. ===================================
+  async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR1B,ICES1, up); }
+
+  //=== Timer 16-bit implementation. ===================================
+  async command void Timer.reset()    { TIFR = 1 << TOV1; }
+  async command void Capture.reset()  { TIFR = 1 << ICF1; }
+  async command void CompareA.reset() { TIFR = 1 << OCF1A; }
+  async command void CompareB.reset() { TIFR = 1 << OCF1B; }
+  async command void CompareC.reset() { ETIFR = 1 << OCF1C; }
+
+  async command void Timer.start()    { SET_BIT(TIMSK,TOIE1); }
+  async command void Capture.start()  { SET_BIT(TIMSK,TICIE1); }
+  async command void CompareA.start() { SET_BIT(TIMSK,OCIE1A); }
+  async command void CompareB.start() { SET_BIT(TIMSK,OCIE1B); }
+  async command void CompareC.start() { SET_BIT(ETIMSK,OCIE1C); }
+
+  async command void Timer.stop()    { CLR_BIT(TIMSK,TOIE1); }
+  async command void Capture.stop()  { CLR_BIT(TIMSK,TICIE1); }
+  async command void CompareA.stop() { CLR_BIT(TIMSK,OCIE1A); }
+  async command void CompareB.stop() { CLR_BIT(TIMSK,OCIE1B); }
+  async command void CompareC.stop() { CLR_BIT(ETIMSK,OCIE1C); }
+
+  // Note: Many Timer interrupt flags are on Timer0 register
+  async command bool Timer.test() { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.tov1; 
+  }
+  async command bool Capture.test()  { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.icf1; 
+  }
+  async command bool CompareA.test() { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.ocf1a; 
+  }
+  async command bool CompareB.test() { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.ocf1b; 
+  }
+  async command bool CompareC.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf1c; 
+  }
+
+  // Note: Many Timer interrupt mask bits are on Timer0 register
+  async command bool Timer.isOn() {
+    return (call Timer0Ctrl.getInterruptMask()).bits.toie1;
+  }
+  async command bool Capture.isOn()  {
+    return (call Timer0Ctrl.getInterruptMask()).bits.ticie1;
+  }
+  async command bool CompareA.isOn() {
+    return (call Timer0Ctrl.getInterruptMask()).bits.ocie1a;
+  }
+  async command bool CompareB.isOn() {
+    return (call Timer0Ctrl.getInterruptMask()).bits.ocie1b;
+  }
+  async command bool CompareC.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.ocie1c;
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint16_t CompareA.get() { return OCR1A; }
+  async command uint16_t CompareB.get() { return OCR1B; }
+  async command uint16_t CompareC.get() { return OCR1C; }
+
+  //=== Write the compare registers. ====================================
+  async command void CompareA.set(uint16_t t) { OCR1A = t; }
+  async command void CompareB.set(uint16_t t) { OCR1B = t; }
+  async command void CompareC.set(uint16_t t) { OCR1C = t; }
+
+  //=== Read the capture registers. =====================================
+  async command uint16_t Capture.get() { return ICR1; }
+
+  //=== Write the capture registers. ====================================
+  async command void Capture.set(uint16_t t)  { ICR1 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void CompareA.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1A) {
+    signal CompareA.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void CompareB.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1B) {
+    signal CompareB.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void CompareC.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1C) {
+    signal CompareC.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void Capture.captured(uint16_t time) { }
+  AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE1) {
+    signal Capture.captured(call Timer.get());
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW1) {
+    signal Timer.overflow();
+    call PlatformInterrupt.postAmble();
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128Timer2C.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer2C.nc
new file mode 100644
index 00000000..f53e7b4a
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer2C.nc
@@ -0,0 +1,148 @@
+/// $Id: HplAtm128Timer2C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to Atmega128 timer 2.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm128Timer2C
+{
+  provides {
+    interface HplAtm128Timer<uint8_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+  }
+  uses interface ThreadScheduler;
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer.get() { return TCNT2; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint8_t t)  { TCNT2 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR2 & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128TimerControl_t x = call TimerCtrl.getControl();
+    x.bits.cs = s;
+    call TimerCtrl.setControl(x);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t TimerCtrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR2; 
+  }
+
+  //=== Control registers utilities. ==================================
+  DEFINE_UNION_CAST(TimerCtrlCompareint, Atm128TimerCtrlCompare_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t);
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setControl( Atm128TimerControl_t x ) { 
+    TCCR2 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t TimerCtrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t TimerCtrl.getInterruptFlag() { 
+    return *(Atm128_TIFR_t*)&TIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer.reset() { TIFR = 1 << TOV2; }
+  async command void Timer.start() { SET_BIT(TIMSK,TOIE2); }
+  async command void Timer.stop()  { CLR_BIT(TIMSK,TOIE2); }
+  async command bool Timer.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.tov2; 
+  }
+  async command bool Timer.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.toie2; 
+  }
+  async command void Compare.reset() { TIFR = 1 << OCF2; }
+  async command void Compare.start() { SET_BIT(TIMSK,OCIE2); }
+  async command void Compare.stop()  { CLR_BIT(TIMSK,OCIE2); }
+  async command bool Compare.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf2; 
+  }
+  async command bool Compare.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.ocie2; 
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint8_t Compare.get()   { return OCR2; }
+
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(uint8_t t)   { OCR2 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void Compare.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE2) {
+    signal Compare.fired();
+    call ThreadScheduler.interruptPostAmble();
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW2) {
+    signal Timer.overflow();
+    call ThreadScheduler.interruptPostAmble();
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128Timer3C.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer3C.nc
new file mode 100644
index 00000000..7fe057b8
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer3C.nc
@@ -0,0 +1,65 @@
+/// $Id: HplAtm128Timer3C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL interface to Atmega128 timer 2.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <david.e.gay@intel.com>
+ */
+
+configuration HplAtm128Timer3C
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as Compare[uint8_t id];
+  }
+}
+implementation
+{
+  components HplAtm128Timer3P;
+
+  Timer = HplAtm128Timer3P;
+  TimerCtrl = HplAtm128Timer3P;
+  Capture = HplAtm128Timer3P;
+
+  Compare[0] = HplAtm128Timer3P.CompareA; 
+  Compare[1] = HplAtm128Timer3P.CompareB;
+  Compare[2] = HplAtm128Timer3P.CompareC;
+  
+  components PlatformInterruptC;
+  HplAtm128Timer3P.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128Timer3P.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer3P.nc
new file mode 100644
index 00000000..7b820b42
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128Timer3P.nc
@@ -0,0 +1,223 @@
+/// $Id: HplAtm128Timer3P.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Internal componentr of the HPL interface to Atmega128 timer 3.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm128Timer3P
+{
+  provides {
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as CompareA;
+    interface HplAtm128Compare<uint16_t> as CompareB;
+    interface HplAtm128Compare<uint16_t> as CompareC;
+  }
+  uses interface PlatformInterrupt;
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint16_t Timer.get() { return TCNT3; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint16_t t) { TCNT3 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR3B & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128TimerCtrlCapture_t x = call TimerCtrl.getCtrlCapture();
+    x.bits.cs = s;
+    call TimerCtrl.setCtrlCapture(x);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerCtrlCompare_t TimerCtrl.getCtrlCompare() { 
+    return *(Atm128TimerCtrlCompare_t*)&TCCR3A; 
+  }
+  async command Atm128TimerCtrlCapture_t TimerCtrl.getCtrlCapture() { 
+    return *(Atm128TimerCtrlCapture_t*)&TCCR3B; 
+  }
+  async command Atm128TimerCtrlClock_t TimerCtrl.getCtrlClock() { 
+    return *(Atm128TimerCtrlClock_t*)&TCCR3C; 
+  }
+
+
+  //=== Control registers utilities. ==================================
+  DEFINE_UNION_CAST(TimerCtrlCompare2int, Atm128TimerCtrlCompare_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlCapture2int, Atm128TimerCtrlCapture_t, uint16_t);
+  DEFINE_UNION_CAST(TimerCtrlClock2int, Atm128TimerCtrlClock_t, uint16_t);
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setCtrlCompare( Atm128_TCCR3A_t x ) { 
+    TCCR3A = TimerCtrlCompare2int(x); 
+  }
+  async command void TimerCtrl.setCtrlCapture( Atm128_TCCR3B_t x ) { 
+    TCCR3B = TimerCtrlCapture2int(x); 
+  }
+  async command void TimerCtrl.setCtrlClock( Atm128_TCCR3C_t x ) { 
+    TCCR3C = TimerCtrlClock2int(x); 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_ETIMSK_t TimerCtrl.getInterruptMask() { 
+    return *(Atm128_ETIMSK_t*)&ETIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptMask( Atm128_ETIMSK_t x ) { 
+    ETIMSK = TimerMask16_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_ETIFR_t TimerCtrl.getInterruptFlag() { 
+    return *(Atm128_ETIFR_t*)&ETIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void TimerCtrl.setInterruptFlag( Atm128_ETIFR_t x ) { 
+    ETIFR = TimerFlags16_2int(x); 
+  }
+
+  //=== Capture 16-bit implementation. ===================================
+  async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR3B,ICES3, up); }
+
+  //=== Timer 16-bit implementation. ===================================
+  async command void Timer.reset()    { ETIFR = 1 << TOV3; }
+  async command void Capture.reset()  { ETIFR = 1 << ICF3; }
+  async command void CompareA.reset() { ETIFR = 1 << OCF3A; }
+  async command void CompareB.reset() { ETIFR = 1 << OCF3B; }
+  async command void CompareC.reset() { ETIFR = 1 << OCF3C; }
+
+  async command void Timer.start()    { SET_BIT(ETIMSK,TOIE3); }
+  async command void Capture.start()  { SET_BIT(ETIMSK,TICIE3); }
+  async command void CompareA.start() { SET_BIT(ETIMSK,OCIE3A); }
+  async command void CompareB.start() { SET_BIT(ETIMSK,OCIE3B); }
+  async command void CompareC.start() { SET_BIT(ETIMSK,OCIE3C); }
+
+  async command void Timer.stop()    { CLR_BIT(ETIMSK,TOIE3); }
+  async command void Capture.stop()  { CLR_BIT(ETIMSK,TICIE3); }
+  async command void CompareA.stop() { CLR_BIT(ETIMSK,OCIE3A); }
+  async command void CompareB.stop() { CLR_BIT(ETIMSK,OCIE3B); }
+  async command void CompareC.stop() { CLR_BIT(ETIMSK,OCIE3C); }
+
+  async command bool Timer.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.tov3; 
+  }
+  async command bool Capture.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.icf3; 
+  }
+  async command bool CompareA.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf3a; 
+  }
+  async command bool CompareB.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf3b; 
+  }
+  async command bool CompareC.test() { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf3c; 
+  }
+
+  async command bool Timer.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.toie3;
+  }
+  async command bool Capture.isOn()  {
+    return (call TimerCtrl.getInterruptMask()).bits.ticie3;
+  }
+  async command bool CompareA.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.ocie3a;
+  }
+  async command bool CompareB.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.ocie3b;
+  }
+  async command bool CompareC.isOn() {
+    return (call TimerCtrl.getInterruptMask()).bits.ocie3c;
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint16_t CompareA.get() { return OCR3A; }
+  async command uint16_t CompareB.get() { return OCR3B; }
+  async command uint16_t CompareC.get() { return OCR3C; }
+
+  //=== Write the compare registers. ====================================
+  async command void CompareA.set(uint16_t t) { OCR3A = t; }
+  async command void CompareB.set(uint16_t t) { OCR3B = t; }
+  async command void CompareC.set(uint16_t t) { OCR3C = t; }
+
+  //=== Read the capture registers. =====================================
+  async command uint16_t Capture.get() { return ICR3; }
+
+  //=== Write the capture registers. ====================================
+  async command void Capture.set(uint16_t t)  { ICR3 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void CompareA.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3A) {
+    signal CompareA.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void CompareB.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3B) {
+    signal CompareB.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void CompareC.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3C) {
+    signal CompareC.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void Capture.captured(uint16_t time) { }
+  AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE3) {
+    signal Capture.captured(call Timer.get());
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW3) {
+    signal Timer.overflow();
+    call PlatformInterrupt.postAmble();
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128UartC.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128UartC.nc
new file mode 100644
index 00000000..31ece3c1
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128UartC.nc
@@ -0,0 +1,77 @@
+/// $Id: HplAtm128UartC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/// 
+
+#include <Atm128Uart.h>
+
+/**
+ * HPL for the Atmega 128 serial ports.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay
+ */
+configuration HplAtm128UartC
+{
+  provides {
+    interface StdControl as Uart0TxControl;
+    interface StdControl as Uart0RxControl;
+    interface HplAtm128Uart as HplUart0;
+    
+    interface StdControl as Uart1TxControl;
+    interface StdControl as Uart1RxControl;
+    interface HplAtm128Uart as HplUart1;
+  }
+}
+implementation
+{
+  components HplAtm128UartP, PlatformC, McuSleepC;
+  
+  Uart0TxControl = HplAtm128UartP.Uart0TxControl;
+  Uart0RxControl = HplAtm128UartP.Uart0RxControl;
+  HplUart0 = HplAtm128UartP.HplUart0;
+  
+  Uart1TxControl = HplAtm128UartP.Uart1TxControl;
+  Uart1RxControl = HplAtm128UartP.Uart1RxControl;
+  HplUart1 = HplAtm128UartP.HplUart1;
+  
+  HplAtm128UartP.Atm128Calibrate -> PlatformC;
+  HplAtm128UartP.McuPowerState -> McuSleepC;
+  
+  components MainC;
+  MainC.SoftwareInit -> HplAtm128UartP.Uart0Init;
+  MainC.SoftwareInit -> HplAtm128UartP.Uart1Init;
+  
+  components PlatformInterruptC;
+  HplAtm128UartP.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/atm128/HplAtm128UartP.nc b/tos/lib/tosthreads/chips/atm128/HplAtm128UartP.nc
new file mode 100644
index 00000000..6c17842c
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/HplAtm128UartP.nc
@@ -0,0 +1,293 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $
+ */
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** 
+ * Private component of the Atmega128 serial port HPL.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay
+ */
+
+#include <Atm128Uart.h>
+
+module HplAtm128UartP {
+  
+  provides interface Init as Uart0Init;
+  provides interface StdControl as Uart0TxControl;
+  provides interface StdControl as Uart0RxControl;
+  provides interface HplAtm128Uart as HplUart0;
+    
+  provides interface Init as Uart1Init;
+  provides interface StdControl as Uart1TxControl;
+  provides interface StdControl as Uart1RxControl;
+  provides interface HplAtm128Uart as HplUart1;
+  
+  uses interface Atm128Calibrate;
+  uses interface McuPowerState;
+  uses interface PlatformInterrupt;
+}
+implementation {
+  
+  //=== Uart Init Commands. ====================================
+  command error_t Uart0Init.init() {
+    Atm128UartMode_t    mode;
+    Atm128UartStatus_t  stts;
+    Atm128UartControl_t ctrl;
+    uint16_t ubrr0;
+
+    ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0};
+    stts.bits = (struct Atm128_UCSRA_t) {u2x:1};
+    mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS};
+
+    ubrr0 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE);
+    UBRR0L = ubrr0;
+    UBRR0H = ubrr0 >> 8;
+    UCSR0A = stts.flat;
+    UCSR0C = mode.flat;
+    UCSR0B = ctrl.flat;
+
+    return SUCCESS;
+  }
+
+  command error_t Uart0TxControl.start() {
+    SET_BIT(UCSR0B, TXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart0TxControl.stop() {
+    CLR_BIT(UCSR0B, TXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart0RxControl.start() {
+    SET_BIT(UCSR0B, RXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart0RxControl.stop() {
+    CLR_BIT(UCSR0B, RXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart0.enableTxIntr() {
+    SET_BIT(UCSR0A, TXC);
+    SET_BIT(UCSR0B, TXCIE);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart0.disableTxIntr(){
+    CLR_BIT(UCSR0B, TXCIE);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart0.enableRxIntr(){
+    SET_BIT(UCSR0B, RXCIE);
+    return SUCCESS;
+  }
+
+  async command error_t HplUart0.disableRxIntr(){
+    CLR_BIT(UCSR0B, RXCIE);
+    return SUCCESS;
+  }
+  
+  async command bool HplUart0.isTxEmpty(){
+    return READ_BIT(UCSR0A, TXC);
+  }
+
+  async command bool HplUart0.isRxEmpty(){
+    return !READ_BIT(UCSR0A, RXC);
+  }
+  
+  async command uint8_t HplUart0.rx(){
+    return UDR0;
+  }
+
+  async command void HplUart0.tx(uint8_t data) {
+    atomic{
+      UDR0 = data; 
+      SET_BIT(UCSR0A, TXC);
+    }
+  }
+  
+  AVR_ATOMIC_HANDLER(SIG_UART0_RECV) {
+    if (READ_BIT(UCSR0A, RXC)) {
+      signal HplUart0.rxDone(UDR0);
+    }
+    call PlatformInterrupt.postAmble();
+  }
+  
+  AVR_NONATOMIC_HANDLER(SIG_UART0_TRANS) {
+    signal HplUart0.txDone();
+    call PlatformInterrupt.postAmble();
+  }
+  
+  command error_t Uart1Init.init() {
+    Atm128UartMode_t    mode;
+    Atm128UartStatus_t  stts;
+    Atm128UartControl_t ctrl;
+    uint16_t ubrr1;
+    
+    ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0};
+    stts.bits = (struct Atm128_UCSRA_t) {u2x:1};
+    mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS};
+
+    ubrr1 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE);
+    UBRR1L = ubrr1;
+    UBRR1H = ubrr1 >> 8;
+    UCSR1A = stts.flat;
+    UCSR1C = mode.flat;
+    UCSR1B = ctrl.flat;
+
+    return SUCCESS;
+  }
+
+  command error_t Uart1TxControl.start() {
+    SET_BIT(UCSR1B, TXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart1TxControl.stop() {
+    CLR_BIT(UCSR1B, TXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart1RxControl.start() {
+    SET_BIT(UCSR1B, RXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart1RxControl.stop() {
+    CLR_BIT(UCSR1B, RXEN);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart1.enableTxIntr() {
+    SET_BIT(UCSR1A, TXC);
+    SET_BIT(UCSR1B, TXCIE);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart1.disableTxIntr(){
+    CLR_BIT(UCSR1B, TXCIE);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart1.enableRxIntr(){
+    SET_BIT(UCSR1B, RXCIE);
+    return SUCCESS;
+  }
+
+  async command error_t HplUart1.disableRxIntr(){
+    CLR_BIT(UCSR1B, RXCIE);
+    return SUCCESS;
+  }
+  
+  async command bool HplUart1.isTxEmpty() {
+    return READ_BIT(UCSR1A, TXC);
+  }
+
+  async command bool HplUart1.isRxEmpty() {
+    return !READ_BIT(UCSR1A, RXC);
+  }
+  
+  async command uint8_t HplUart1.rx(){
+    return UDR1;
+  }
+
+  async command void HplUart1.tx(uint8_t data) {
+    atomic{
+      UDR1 = data; 
+      SET_BIT(UCSR1A, TXC);
+    }
+  }
+  
+  AVR_ATOMIC_HANDLER(SIG_UART1_RECV) {
+    if (READ_BIT(UCSR1A, RXC))
+      signal HplUart1.rxDone(UDR1);
+    call PlatformInterrupt.postAmble();
+  }
+  
+  AVR_NONATOMIC_HANDLER(SIG_UART1_TRANS) {
+    signal HplUart1.txDone();
+    call PlatformInterrupt.postAmble();
+  }
+  
+  default async event void HplUart0.txDone() {} 
+  default async event void HplUart0.rxDone(uint8_t data) {}
+  default async event void HplUart1.txDone() {}
+  default async event void HplUart1.rxDone(uint8_t data) {}
+  
+}
diff --git a/tos/lib/tosthreads/chips/atm128/adc/BlockingAdcP.nc b/tos/lib/tosthreads/chips/atm128/adc/BlockingAdcP.nc
new file mode 100644
index 00000000..c67bd620
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/adc/BlockingAdcP.nc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "thread.h"
+
+configuration BlockingAdcP {
+  provides {
+    interface BlockingRead<uint16_t> as BlockingRead[uint8_t client];
+    interface BlockingReadStream<uint16_t> as BlockingReadStream[uint8_t streamClient];
+  }
+  uses {
+    //For BlockingRead
+    interface Atm128AdcConfig as Config[uint8_t client];
+    interface Resource as ResourceRead[uint8_t client];
+    
+    //For BlockingReadStream
+    interface Atm128AdcConfig as ConfigReadStream[uint8_t streamClient];
+    interface Resource as ResourceReadStream[uint8_t streamClient];
+  }
+}
+implementation {
+  components MainC;
+  components WireAdcP;
+  components WireAdcStreamP;
+  components new BlockingReadP();
+  components new BlockingReadStreamP();
+  
+  MainC.SoftwareInit -> BlockingReadP;
+  MainC.SoftwareInit -> BlockingReadStreamP;
+  
+  //For BlockingRead
+  BlockingRead = BlockingReadP;
+  BlockingReadP.Read -> WireAdcP;
+  Config = WireAdcP;
+  ResourceRead = WireAdcP;
+  
+  //For BlockingReadStream
+  BlockingReadStream = BlockingReadStreamP;
+  BlockingReadStreamP.ReadStream -> WireAdcStreamP;
+  ConfigReadStream = WireAdcStreamP;
+  ResourceReadStream = WireAdcStreamP;
+  
+  components SystemCallC;
+  components SystemCallQueueC;
+  BlockingReadP.SystemCallQueue -> SystemCallQueueC;
+  BlockingReadP.SystemCall -> SystemCallC;
+  BlockingReadStreamP.SystemCallQueue -> SystemCallQueueC;
+  BlockingReadStreamP.SystemCall -> SystemCallC;
+}
+
+
diff --git a/tos/lib/tosthreads/chips/atm128/adc/BlockingAdcReadClientC.nc b/tos/lib/tosthreads/chips/atm128/adc/BlockingAdcReadClientC.nc
new file mode 100644
index 00000000..b4c55c31
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/adc/BlockingAdcReadClientC.nc
@@ -0,0 +1,41 @@
+/* $Id: BlockingAdcReadClientC.nc,v 1.2 2008-06-14 19:27:25 klueska Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Provide, as per TEP101, arbitrated access via a Read interface to the
+ * Atmega128 ADC.  Users of this component must link it to an
+ * implementation of Atm128AdcConfig which provides the ADC parameters
+ * (channel, etc).
+ * 
+ * @author David Gay
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "Adc.h"
+
+generic configuration BlockingAdcReadClientC() {
+  provides interface BlockingRead<uint16_t>;
+  uses {
+    interface Atm128AdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components Atm128AdcC, BlockingAdcP;
+
+  enum {
+    ID = unique(UQ_ADC_READ),
+    HAL_ID = unique(UQ_ATM128ADC_RESOURCE)
+  };
+
+  BlockingRead = BlockingAdcP.BlockingRead[ID];
+  Atm128AdcConfig = BlockingAdcP.Config[ID];
+  BlockingAdcP.ResourceRead[ID] -> Atm128AdcC.Resource[HAL_ID];
+  ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID];
+}
diff --git a/tos/lib/tosthreads/chips/atm128/adc/BlockingAdcReadStreamClientC.nc b/tos/lib/tosthreads/chips/atm128/adc/BlockingAdcReadStreamClientC.nc
new file mode 100644
index 00000000..5a4fa08d
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/adc/BlockingAdcReadStreamClientC.nc
@@ -0,0 +1,41 @@
+/* $Id: BlockingAdcReadStreamClientC.nc,v 1.2 2008-06-14 19:27:25 klueska Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Provide, as per TEP101, arbitrated access via a ReadStream interface to
+ * the Atmega128 ADC.  Users of this component must link it to an
+ * implementation of Atm128AdcConfig which provides the ADC parameters
+ * (channel, etc).
+ * 
+ * @author David Gay
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "Adc.h"
+
+generic configuration BlockingAdcReadStreamClientC() {
+  provides interface BlockingReadStream<uint16_t>;
+  uses {
+    interface Atm128AdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components BlockingAdcP, Atm128AdcC;
+
+  enum {
+    ID = unique(UQ_ADC_READSTREAM),
+    HAL_ID = unique(UQ_ATM128ADC_RESOURCE)
+  };
+
+  BlockingReadStream = BlockingAdcP.BlockingReadStream[ID];
+  Atm128AdcConfig = BlockingAdcP.ConfigReadStream[ID];
+  BlockingAdcP.ResourceReadStream[ID] -> Atm128AdcC.Resource[HAL_ID];
+  ResourceConfigure = Atm128AdcC.ResourceConfigure[HAL_ID];
+}
diff --git a/tos/lib/tosthreads/chips/atm128/chip_thread.h b/tos/lib/tosthreads/chips/atm128/chip_thread.h
new file mode 100644
index 00000000..ed56172e
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/chip_thread.h
@@ -0,0 +1,204 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This file is derived from similar files in the TinyThread implementation
+ * by William P. McCartney from Cleveland State University (2006)
+ *
+ * This file contains MSP430 platform-specific routines for implementing
+ * threads in TinyOS
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+//Define on platform specific basis for inclusion in
+// the thread control block
+typedef struct thread_regs {
+  uint8_t status;
+  uint8_t r0;
+  uint8_t r1;
+  uint8_t r2;
+  uint8_t r3;
+  uint8_t r4;
+  uint8_t r5;
+  uint8_t r6;
+  uint8_t r7;
+  uint8_t r8;
+  uint8_t r9;
+  uint8_t r10;
+  uint8_t r11;
+  uint8_t r12;
+  uint8_t r13;
+  uint8_t r14;
+  uint8_t r15;
+  uint8_t r16;
+  uint8_t r17;
+  uint8_t r18;
+  uint8_t r19;
+  uint8_t r20;
+  uint8_t r21;
+  uint8_t r22;
+  uint8_t r23;
+  uint8_t r24;
+  uint8_t r25;
+  uint8_t r26;
+  uint8_t r27;
+  uint8_t r28;
+  uint8_t r29;
+  uint8_t r30;
+  uint8_t r31;
+} thread_regs_t;
+
+typedef uint16_t* stack_ptr_t;
+  
+#define STACK_TOP(stack, size)    \
+  (&(((uint8_t*)stack)[size - sizeof(stack_ptr_t)]))
+  
+//Save stack pointer
+#define SAVE_STACK_PTR(t)            		  		\
+  __asm__("in %A0, __SP_L__\n\t"					\
+          "in %B0, __SP_H__\n\t"					\
+          :"=r"((t)->stack_ptr) : );
+
+//Save status register
+#define SAVE_STATUS(t)                   	  		\
+  __asm__("in %0,__SREG__ \n\t" : "=r" ((t)->regs.status) : );
+  
+//Save General Purpose Registers
+#define SAVE_GPR(t)                        			    \
+  __asm__("mov %0,r0 \n\t" : "=r" ((t)->regs.r0) : );   \
+  __asm__("mov %0,r1 \n\t" : "=r" ((t)->regs.r1) : );   \
+  __asm__("mov %0,r2 \n\t" : "=r" ((t)->regs.r2) : );   \
+  __asm__("mov %0,r3 \n\t" : "=r" ((t)->regs.r3) : );   \
+  __asm__("mov %0,r4 \n\t" : "=r" ((t)->regs.r4) : );   \
+  __asm__("mov %0,r5 \n\t" : "=r" ((t)->regs.r5) : );   \
+  __asm__("mov %0,r6 \n\t" : "=r" ((t)->regs.r6) : );   \
+  __asm__("mov %0,r7 \n\t" : "=r" ((t)->regs.r7) : );   \
+  __asm__("mov %0,r8 \n\t" : "=r" ((t)->regs.r8) : );   \
+  __asm__("mov %0,r9 \n\t" : "=r" ((t)->regs.r9) : );   \
+  __asm__("mov %0,r10 \n\t" : "=r" ((t)->regs.r10) : );   \
+  __asm__("mov %0,r11 \n\t" : "=r" ((t)->regs.r11) : );   \
+  __asm__("mov %0,r12 \n\t" : "=r" ((t)->regs.r12) : );   \
+  __asm__("mov %0,r13 \n\t" : "=r" ((t)->regs.r13) : );   \
+  __asm__("mov %0,r14 \n\t" : "=r" ((t)->regs.r14) : );   \
+  __asm__("mov %0,r15 \n\t" : "=r" ((t)->regs.r15) : );   \
+  __asm__("mov %0,r16 \n\t" : "=r" ((t)->regs.r16) : );   \
+  __asm__("mov %0,r17 \n\t" : "=r" ((t)->regs.r17) : );   \
+  __asm__("mov %0,r18 \n\t" : "=r" ((t)->regs.r18) : );   \
+  __asm__("mov %0,r19 \n\t" : "=r" ((t)->regs.r19) : );   \
+  __asm__("mov %0,r20 \n\t" : "=r" ((t)->regs.r20) : );   \
+  __asm__("mov %0,r21 \n\t" : "=r" ((t)->regs.r21) : );   \
+  __asm__("mov %0,r22 \n\t" : "=r" ((t)->regs.r22) : );   \
+  __asm__("mov %0,r23 \n\t" : "=r" ((t)->regs.r23) : );   \
+  __asm__("mov %0,r24 \n\t" : "=r" ((t)->regs.r24) : );   \
+  __asm__("mov %0,r25 \n\t" : "=r" ((t)->regs.r25) : );   \
+  __asm__("mov %0,r26 \n\t" : "=r" ((t)->regs.r26) : );   \
+  __asm__("mov %0,r27 \n\t" : "=r" ((t)->regs.r27) : );   \
+  __asm__("mov %0,r28 \n\t" : "=r" ((t)->regs.r28) : );   \
+  __asm__("mov %0,r29 \n\t" : "=r" ((t)->regs.r29) : );   \
+  __asm__("mov %0,r30 \n\t" : "=r" ((t)->regs.r30) : );   \
+  __asm__("mov %0,r31 \n\t" : "=r" ((t)->regs.r31) : );
+  
+//Restore stack pointer
+#define RESTORE_STACK_PTR(t)           			 	 \
+  __asm__("out __SP_H__,%B0 \n\t"                    \
+          "out __SP_L__,%A0 \n\t"                    \
+          ::"r" ((t)->stack_ptr))
+
+//Restore status register
+#define RESTORE_STATUS(t)                 			\
+  __asm__("out __SREG__,%0 \n\t" :: "r" ((t)->regs.status) ); 
+
+//Restore the general purpose registers
+#define RESTORE_GPR(t)           	         		     \
+  __asm__("mov r0,%0 \n\t" :: "r" ((t)->regs.r0) );  \
+  __asm__("mov r1,%0 \n\t" :: "r" ((t)->regs.r1) );  \
+  __asm__("mov r2,%0 \n\t" :: "r" ((t)->regs.r2) );  \
+  __asm__("mov r3,%0 \n\t" :: "r" ((t)->regs.r3) );  \
+  __asm__("mov r4,%0 \n\t" :: "r" ((t)->regs.r4) );  \
+  __asm__("mov r5,%0 \n\t" :: "r" ((t)->regs.r5) );  \
+  __asm__("mov r6,%0 \n\t" :: "r" ((t)->regs.r6) );  \
+  __asm__("mov r7,%0 \n\t" :: "r" ((t)->regs.r7) );  \
+  __asm__("mov r8,%0 \n\t" :: "r" ((t)->regs.r8) );  \
+  __asm__("mov r9,%0 \n\t" :: "r" ((t)->regs.r9) );  \
+  __asm__("mov r10,%0 \n\t" :: "r" ((t)->regs.r10) );  \
+  __asm__("mov r11,%0 \n\t" :: "r" ((t)->regs.r11) );  \
+  __asm__("mov r12,%0 \n\t" :: "r" ((t)->regs.r12) );  \
+  __asm__("mov r13,%0 \n\t" :: "r" ((t)->regs.r13) );  \
+  __asm__("mov r14,%0 \n\t" :: "r" ((t)->regs.r14) );  \
+  __asm__("mov r15,%0 \n\t" :: "r" ((t)->regs.r15) );  \
+  __asm__("mov r16,%0 \n\t" :: "r" ((t)->regs.r16) );  \
+  __asm__("mov r17,%0 \n\t" :: "r" ((t)->regs.r17) );  \
+  __asm__("mov r18,%0 \n\t" :: "r" ((t)->regs.r18) );  \
+  __asm__("mov r19,%0 \n\t" :: "r" ((t)->regs.r19) );  \
+  __asm__("mov r20,%0 \n\t" :: "r" ((t)->regs.r20) );  \
+  __asm__("mov r21,%0 \n\t" :: "r" ((t)->regs.r21) );  \
+  __asm__("mov r22,%0 \n\t" :: "r" ((t)->regs.r22) );  \
+  __asm__("mov r23,%0 \n\t" :: "r" ((t)->regs.r23) );  \
+  __asm__("mov r24,%0 \n\t" :: "r" ((t)->regs.r24) );  \
+  __asm__("mov r25,%0 \n\t" :: "r" ((t)->regs.r25) );  \
+  __asm__("mov r26,%0 \n\t" :: "r" ((t)->regs.r26) );  \
+  __asm__("mov r27,%0 \n\t" :: "r" ((t)->regs.r27) );  \
+  __asm__("mov r28,%0 \n\t" :: "r" ((t)->regs.r28) );  \
+  __asm__("mov r29,%0 \n\t" :: "r" ((t)->regs.r29) );  \
+  __asm__("mov r30,%0 \n\t" :: "r" ((t)->regs.r30) );  \
+  __asm__("mov r31,%0 \n\t" :: "r" ((t)->regs.r31) );
+  
+#define SAVE_TCB(t) \
+  SAVE_GPR(t);	 	\
+  SAVE_STATUS(t);	\
+  SAVE_STACK_PTR(t) 
+  
+#define RESTORE_TCB(t)  \
+  RESTORE_STACK_PTR(t); \
+  RESTORE_STATUS(t);    \
+  RESTORE_GPR(t)
+  
+#define SWITCH_CONTEXTS(from, to) \
+  SAVE_TCB(from);				  \
+  RESTORE_TCB(to)
+
+#define SWAP_STACK_PTR(OLD, NEW) \
+  __asm__("in %A0, __SP_L__\n\t in %B0, __SP_H__":"=r"(OLD):);\
+  __asm__("out __SP_H__,%B0\n\t out __SP_L__,%A0"::"r"(NEW))
+ 
+#define PREPARE_THREAD(t, thread_ptr)		               \
+  {  uint16_t temp;							               \
+     SWAP_STACK_PTR(temp, (t)->stack_ptr);                 \
+     __asm__("push %A0\n push %B0"::"r"(&(thread_ptr)));   \
+     SWAP_STACK_PTR((t)->stack_ptr, temp);                 \
+     SAVE_STATUS(t)							               \
+  }
+  
+/*
+  *((uint8_t*)((t)->stack_ptr)) = (uint8_t)((uint16_t)(&(thread_ptr)) >> 8);	\
+  *((uint8_t*)((t)->stack_ptr)-1) = (uint8_t)((&(thread_ptr)));	\
+*/
diff --git a/tos/lib/tosthreads/chips/atm128/sim/HplAtm128CompareC.nc b/tos/lib/tosthreads/chips/atm128/sim/HplAtm128CompareC.nc
new file mode 100644
index 00000000..3ce7c0ed
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/sim/HplAtm128CompareC.nc
@@ -0,0 +1,288 @@
+/// $Id: HplAtm128CompareC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic compare abstraction that builds on top of a counter.
+ *
+ * @author Philip Levis
+ * @date   Nov 22 2005
+ */
+
+// $Id: HplAtm128CompareC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+#include <Atm128Timer.h>
+
+generic module HplAtm128CompareC(typedef width_t @integer(),
+				 uint8_t valueRegister,
+				 uint8_t interruptRegister,
+				 uint8_t interruptBit,
+				 uint8_t flagRegister,
+				 uint8_t flagBit) 
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Compare<width_t> as Compare;
+  }
+  uses {
+    interface HplAtm128Timer<width_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128TimerNotify as Notify;
+    interface ThreadScheduler;
+  }
+}
+implementation {
+  /* lastZero keeps track of the phase of the clock. It denotes the sim
+   * time at which the underlying clock started, which is needed to
+   * calculate when compares will occur. */
+  sim_time_t lastZero = 0;
+
+  /** This variable is needed to keep track of when the underlying
+   *  timer starts, in order to reset lastZero. When oldScale is
+   *  AVR_CLOCK_OFF and the scale is set to something else, the
+   *  clock starts ticking. */
+  uint8_t oldScale = AVR_CLOCK_OFF;
+  
+  void adjust_zero(width_t currentCounter);
+
+  void cancel_compare();
+  sim_event_t* allocate_compare();
+  void configure_compare(sim_event_t* e);
+  void schedule_new_compare();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+
+  sim_time_t last_zero() {
+    if (lastZero == 0) {
+      lastZero = sim_mote_start_time(sim_node());
+    }
+    return lastZero;
+  }
+
+
+  async event void Notify.changed() {
+    uint8_t newScale = call Timer.getScale();
+    if (newScale != AVR_CLOCK_OFF &&
+	oldScale == AVR_CLOCK_OFF) {
+      lastZero = sim_time();
+    }
+    oldScale = newScale;
+    
+    schedule_new_compare();
+  }
+  
+  async command void Compare.reset() { REG_ACCESS(flagRegister) &= ~(1 << flagBit); }
+  async command void Compare.start() { SET_BIT(interruptRegister,interruptBit); }
+  async command void Compare.stop()  { CLR_BIT(interruptRegister,interruptBit); }
+  async command bool Compare.test()  { 
+    return (call TimerCtrl.getInterruptFlag()).bits.ocf0; 
+  }
+  async command bool Compare.isOn()  { 
+    return (call TimerCtrl.getInterruptMask()).bits.ocie0; 
+  }
+
+  //=== Read the compare registers. =====================================
+  async command width_t Compare.get()   { return (width_t)REG_ACCESS(valueRegister); }
+
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(width_t t)   { 
+    atomic {
+	/* Re the comment above: it's a bad idea to wake up at time 0, as
+	   we'll just spin when setting the next deadline. Try and reduce
+	   the likelihood by delaying the interrupt...
+	*/
+      if (t == 0 || t >= 0xfe)
+	t = 1;
+      
+      if (t != REG_ACCESS(valueRegister)) {
+	REG_ACCESS(valueRegister) = t;
+	schedule_new_compare();
+      }
+    }
+  }
+
+  //=== Timer interrupts signals ========================================
+  default async event void Compare.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) {
+    signal Compare.fired();
+    call ThreadScheduler.interruptPostAmble();
+  }
+
+
+  /**
+   * If the clock was stopped and has restarted, then
+   * we need to move the time when the clock was last
+   * zero to a time that reflects the current settings.
+   * For example, if the clock was stopped when the counter
+   * was 52 and then later restarted, then <tt>lastZero</tt>
+   * needs to be moved forward in time so that the 52
+   * reflects the current time.
+   */ 
+  void adjust_zero(width_t currentCounter) {
+    sim_time_t now = sim_time();
+    sim_time_t adjust = currentCounter;
+    adjust = adjust << shiftFromScale();
+    adjust = clock_to_sim(adjust);
+    lastZero = now - adjust;
+  }
+  
+  sim_time_t clock_to_sim(sim_time_t t) {
+    t *= sim_ticks_per_sec();
+    t /= call Notify.clockTicksPerSec();
+    return t;
+  }
+
+  sim_time_t sim_to_clock(sim_time_t t) {
+    t *= call Notify.clockTicksPerSec();
+    t /= sim_ticks_per_sec();
+    return t;
+  }
+  
+  uint16_t shiftFromScale() {
+    uint8_t scale = call Timer.getScale();
+    switch (scale) {
+    case 0:
+      return 0;
+    case 1:
+      return 0;
+    case 2:
+      return 3;
+    case 3:
+      return 5;
+    case 4:
+      return 6;
+    case 5:
+      return 7;
+    case 6:
+      return 8;
+    case 7:
+      return 10;
+    default:
+      return 255;
+    }
+    
+  }
+
+  sim_event_t* compare;
+
+  void timer0_compare_handle(sim_event_t* evt) {
+    dbg("HplAtm128CompareC", "%s Beginning compare at 0x%p\n", __FUNCTION__, evt);
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      dbg("HplAtm128CompareC", "%s Handling compare at 0x%p @ %s\n",__FUNCTION__,  evt, sim_time_string());
+	    
+      if (READ_BIT(interruptRegister, interruptBit)) {
+	CLR_BIT(flagRegister, flagBit);
+	dbg("HplAtm128CompareC", "%s Compare interrupt @ %s\n", __FUNCTION__, sim_time_string());
+	SIG_OUTPUT_COMPARE0();
+      }
+      else {
+	SET_BIT(flagRegister, flagBit);
+      }
+      // If we haven't been cancelled
+      if (!evt->cancelled) {
+	configure_compare(evt);
+	sim_queue_insert(evt);
+      }
+    }
+  }
+
+  sim_event_t* allocate_compare() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+    dbg("HplAtm128CompareC", "Allocated compare at 0x%p\n", newEvent);
+    newEvent->handle = timer0_compare_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_compare(sim_event_t* evt) {
+    sim_time_t compareTime = 0;
+    sim_time_t phaseOffset = 0;
+    uint8_t timerVal = call Timer.get();
+    uint8_t compareVal = call Compare.get();
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    compareTime = ((compareVal - timerVal) & 0xff);
+    if (compareTime == 0) {
+      compareTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    compareTime = compareTime << shiftFromScale();
+    compareTime = clock_to_sim(compareTime);
+    compareTime += sim_time();
+
+    // How long into a timer tick was the clock actually reset?
+    // This covers the case when the compare is set midway between
+    // a tick, so it will go off a little early
+    phaseOffset = sim_time();
+    phaseOffset -= last_zero();
+    phaseOffset %= clock_to_sim(1 << shiftFromScale());
+    compareTime -= phaseOffset;
+      
+    dbg("HplAtm128CompareC", "Configuring new compare of %i for %i at time %llu  (@ %llu)\n", (int)compareVal, sim_node(), compareTime, sim_time());
+    
+    evt->time = compareTime;    
+  }
+  
+  void schedule_new_compare() {
+    if (compare != NULL) {
+      cancel_compare();
+    }
+    if (call Timer.getScale() != AVR_CLOCK_OFF) {
+      sim_event_t* newEvent = allocate_compare();
+      configure_compare(newEvent);
+
+      compare = newEvent;
+      sim_queue_insert(newEvent);
+    }
+  }
+
+  void cancel_compare() {
+    dbg("HplAtm128CompareC", "Cancelling compare at 0x%p\n", compare);
+    if (compare != NULL) {
+      compare->cancelled = 1;
+      compare->cleanup = sim_queue_cleanup_total;
+    }
+  }
+
+  async event void Timer.overflow() {}
+  
+}
diff --git a/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Counter0C.nc b/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Counter0C.nc
new file mode 100644
index 00000000..d1b2d388
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Counter0C.nc
@@ -0,0 +1,388 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer0 counter. It handles
+ * overflow, scaling, and phase considerations.
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis <pal@cs.stanford.edu>
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+// $Id: HplAtm128Counter0C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $/// $Id: HplAtm128Timer2C.nc,
+
+#include <Atm128Timer.h>
+#include <hardware.h>
+
+module HplAtm128Counter0C {
+  provides {
+    interface Init @atleastonce();
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer0;
+    interface HplAtm128TimerNotify      as Notify;
+    interface HplAtm128TimerCtrl8       as Timer0Ctrl;
+  }
+  uses interface ThreadScheduler;
+}
+implementation
+{
+  bool inOverflow = 0;
+  uint8_t savedCounter = 0;
+  sim_time_t lastZero = 0;
+
+  void adjust_zero(uint8_t currentCounter);
+
+  void cancel_overflow();
+  sim_event_t* allocate_overflow();
+  void configure_overflow(sim_event_t* e);
+  void schedule_new_overflow();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+  command error_t Init.init() {
+    /* Do nothing. On a standard mote this configures Timer0 to
+     * operating in asynchronous mode off an external crystal. Here in
+     * TOSSIM it's assumed that's the case. */
+    return SUCCESS;
+  }
+    
+  async command sim_time_t Notify.clockTicksPerSec() {
+    return ATM128_TIMER0_TICKSPPS;
+  }
+  
+  sim_time_t last_zero() {
+    if (lastZero == 0) {
+      lastZero = sim_mote_start_time(sim_node());
+    }
+    return lastZero;
+  }
+  
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer0.get() {
+    uint8_t rval;
+    sim_time_t elapsed = sim_time() - last_zero();
+    elapsed = sim_to_clock(elapsed);
+    elapsed = elapsed >> shiftFromScale();
+    rval = (uint8_t)(elapsed & 0xff);
+    dbg("HplAtm128Counter0C", "HplAtm128Counter0C: Getting timer: %hhu\n", rval);
+    return rval;
+  }
+
+  //=== Set/clear the current timer value. ==============================
+  /**
+   * Set/clear the current timer value.
+   *
+   * This code is pretty tricky.  */
+  async command void Timer0.set(uint8_t newVal)  {
+    uint8_t curVal = call Timer0.get();
+    if (newVal == curVal) {
+      return;
+    }
+    else {
+      sim_time_t adjustment = curVal - newVal;
+      adjustment = adjustment << shiftFromScale();
+      adjustment = clock_to_sim(adjustment);
+
+      if (newVal < curVal) {
+	lastZero += adjustment;
+      }
+      else { // newVal > curVal
+	lastZero -= adjustment;
+      }
+
+      schedule_new_overflow();
+      signal Notify.changed();
+    }
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer0.getScale() {
+    return TCCR0 & 0x7;
+  }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer0.off() {
+    call Timer0.setScale(AVR_CLOCK_OFF);
+    savedCounter = call Timer0.get();
+    cancel_overflow();
+    signal Notify.changed();
+  }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer0.setScale(uint8_t s)  {
+    Atm128TimerControl_t ctrl;
+    uint8_t currentScale = call Timer0.getScale();
+    uint8_t currentCounter;
+    dbg("HplAtm128Counter0C", "Timer0 scale set to %i\n", (int)s);
+    if (currentScale == 0) {
+      currentCounter = savedCounter;
+    }
+    else {
+      currentCounter = call Timer0.get();
+    }
+    
+    ctrl = call Timer0Ctrl.getControl();
+    ctrl.flat &= ~(0x7);
+    ctrl.flat |= (s & 0x7);
+    call Timer0Ctrl.setControl(ctrl);  
+
+    if (currentScale != s) {
+      adjust_zero(currentCounter);
+      schedule_new_overflow();
+    }
+    signal Notify.changed();
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t Timer0Ctrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR0; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void Timer0Ctrl.setControl( Atm128TimerControl_t x ) { 
+    TCCR0 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t Timer0Ctrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void Timer0Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t Timer0Ctrl.getInterruptFlag() { 
+    return *(Atm128_TIFR_t*)&TIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void Timer0Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer0.reset() {
+    // Clear TOV0. On real hardware, this is a write.
+    TIFR &= ~(1 << TOV0);
+  }
+  async command void Timer0.start() {
+    SET_BIT(ATM128_TIMSK, TOIE0);
+    dbg("HplAtm128Counter0C", "Enabling TOIE0 at %llu\n", sim_time());
+    schedule_new_overflow();
+  }
+  async command void Timer0.stop()  {
+    dbg("HplAtm128Counter0C", "Timer stopped @ %llu\n", sim_time());
+    CLR_BIT(ATM128_TIMSK, TOIE0);
+    cancel_overflow();
+  }
+
+  bool overflowed() {
+    return READ_BIT(ATM128_TIFR, TOV0); 
+  }
+
+  inline void stabiliseOverflow() {
+    /* From the atmel manual:
+
+    During asynchronous operation, the synchronization of the interrupt
+    flags for the asynchronous timer takes three processor cycles plus one
+    timer cycle.  The timer is therefore advanced by at least one before
+    the processor can read the timer value causing the setting of the
+    interrupt flag. The output compare pin is changed on the timer clock
+    and is not synchronized to the processor clock.
+
+    So: if the timer is = 0, wait till it's = 1, except if
+    - we're currently in the overflow interrupt handler
+    - or, the overflow flag is already set
+    */
+
+    //if (!inOverflow)
+    //  while (!TCNT0 && !overflowed())
+    //;
+  }
+
+  async command bool Timer0.test()  { 
+    stabiliseOverflow();
+    return overflowed();
+  }
+  async command bool Timer0.isOn()  { 
+    return (call Timer0Ctrl.getInterruptMask()).bits.toie0; 
+  }
+
+  default async event void Timer0.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) {
+    inOverflow = TRUE;
+    signal Timer0.overflow();
+    inOverflow = FALSE;
+    call ThreadScheduler.interruptPostAmble();
+  }
+
+  /**
+   * If the clock was stopped and has restarted, then
+   * we need to move the time when the clock was last
+   * zero to a time that reflects the current settings.
+   * For example, if the clock was stopped when the counter
+   * was 52 and then later restarted, then <tt>lastZero</tt>
+   * needs to be moved forward in time so that the 52
+   * reflects the current time.
+   */ 
+  void adjust_zero(uint8_t currentCounter) {
+    sim_time_t now = sim_time();
+    sim_time_t adjust = currentCounter;
+    adjust = adjust << shiftFromScale();
+    adjust = clock_to_sim(adjust);
+    lastZero = now - adjust;
+  }
+  
+  sim_time_t clock_to_sim(sim_time_t t) {
+    t *= sim_ticks_per_sec();
+    t /= call Notify.clockTicksPerSec();
+    return t;
+  }
+
+  sim_time_t sim_to_clock(sim_time_t t) {
+    t *= call Notify.clockTicksPerSec();
+    t /= sim_ticks_per_sec();
+    return t;
+  }
+  
+  uint16_t shiftFromScale() {
+    uint8_t scale = call Timer0.getScale();
+    switch (scale) {
+    case 0:
+      return 0;
+    case 1:
+      return 0;
+    case 2:
+      return 3;
+    case 3:
+      return 5;
+    case 4:
+      return 6;
+    case 5:
+      return 7;
+    case 6:
+      return 8;
+    case 7:
+      return 10;
+    default:
+      return 255;
+    }
+    
+  }
+
+  sim_event_t* overflow;
+
+  void timer0_overflow_handle(sim_event_t* evt) {
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      if (READ_BIT(ATM128_TIMSK, TOIE0)) {
+	CLR_BIT(ATM128_TIFR, TOV0);
+	dbg("HplAtm128Counter0C", "Overflow interrupt at %s\n", sim_time_string());
+	SIG_OVERFLOW0();
+      }
+      else {
+	dbg("HplAtm128Counter0C", "Setting overflow bit at %s\n", sim_time_string());
+	SET_BIT(ATM128_TIFR, TOV0);
+      }
+      configure_overflow(evt);
+      sim_queue_insert(evt);
+    }
+  }
+  
+  sim_event_t* allocate_overflow() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+
+    newEvent->handle = timer0_overflow_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_overflow(sim_event_t* evt) {
+    sim_time_t overflowTime = 0;
+    uint8_t timerVal = call Timer0.get();
+    uint8_t overflowVal = 0;
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    overflowTime = ((overflowVal - timerVal) & 0xff);
+    if (overflowTime == 0) {
+      overflowTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    overflowTime = overflowTime << shiftFromScale();
+    overflowTime = clock_to_sim(overflowTime);
+    overflowTime += sim_time();
+    overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale());
+
+    dbg("HplAtm128Counter0C", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime);
+    
+    evt->time = overflowTime;
+  }
+  
+  void schedule_new_overflow() {
+    sim_event_t* newEvent = allocate_overflow();
+    configure_overflow(newEvent);
+
+    if (overflow != NULL) {
+      cancel_overflow();
+    }
+    overflow = newEvent;
+    sim_queue_insert(newEvent);
+  }
+  
+  void cancel_overflow() {
+    if (overflow != NULL) {
+      overflow->cancelled = 1;
+      dbg("HplAtm128Counter0C", "Cancelling overflow %p.\n", overflow);
+      overflow->cleanup = sim_queue_cleanup_total;
+    }
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Counter2C.nc b/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Counter2C.nc
new file mode 100644
index 00000000..daa352f2
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Counter2C.nc
@@ -0,0 +1,386 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer2 counter. It handles
+ * overflow, scaling, and phase considerations.
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis <pal@cs.stanford.edu>
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+// $Id: HplAtm128Counter2C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $/// $Id: HplAtm128Timer2C.nc,
+
+#include <Atm128Timer.h>
+#include <hardware.h>
+
+enum {
+  ATM128_TIMER2_TICKSPPS = (1 << 13)
+};
+
+module HplAtm128Counter2C {
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer2;
+    interface HplAtm128TimerNotify      as Notify;
+    interface HplAtm128TimerCtrl8       as Timer2Ctrl;
+  }
+  uses interface ThreadScheduler;
+}
+implementation
+{
+  bool inOverflow = 0;
+  uint8_t savedCounter = 0;
+  sim_time_t lastZero = 0;
+
+  void adjust_zero(uint8_t currentCounter);
+
+  void cancel_overflow();
+  sim_event_t* allocate_overflow();
+  void configure_overflow(sim_event_t* e);
+  void schedule_new_overflow();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+
+  async command sim_time_t Notify.clockTicksPerSec() {
+    return ATM128_TIMER2_TICKSPPS;
+  }
+  
+  sim_time_t last_zero() {
+    if (lastZero == 0) {
+      lastZero = sim_mote_start_time(sim_node());
+    }
+    return lastZero;
+  }
+  
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer2.get() {
+    uint8_t rval;
+    sim_time_t elapsed = sim_time() - last_zero();
+    elapsed = sim_to_clock(elapsed);
+    elapsed = elapsed >> shiftFromScale();
+    rval = (uint8_t)(elapsed & 0xff);
+    dbg("HplAtm128Counter2C", "HplAtm128Counter2C: Getting timer: %hhu\n", rval);
+    return rval;
+  }
+
+  //=== Set/clear the current timer value. ==============================
+  /**
+   * Set/clear the current timer value.
+   *
+   * This code is pretty tricky.  */
+  async command void Timer2.set(uint8_t newVal)  {
+    uint8_t curVal = call Timer2.get();
+    if (newVal == curVal) {
+      return;
+    }
+    else {
+      sim_time_t adjustment = curVal - newVal;
+      adjustment = adjustment << shiftFromScale();
+      adjustment = clock_to_sim(adjustment);
+
+      if (newVal < curVal) {
+	lastZero += adjustment;
+      }
+      else { // newVal > curVal
+	lastZero -= adjustment;
+      }
+
+      schedule_new_overflow();
+      signal Notify.changed();
+    }
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer2.getScale() {
+    return TCCR2 & 0x7;
+  }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer2.off() {
+    call Timer2.setScale(AVR_CLOCK_OFF);
+    savedCounter = call Timer2.get();
+    cancel_overflow();
+    signal Notify.changed();
+  }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer2.setScale(uint8_t s)  {
+    Atm128TimerControl_t ctrl;
+    uint8_t currentScale = call Timer2.getScale();
+    uint8_t currentCounter;
+    dbg("HplAtm128Counter2C", "Timer2 scale set to %i\n", (int)s);
+    if (currentScale == 0) {
+      currentCounter = savedCounter;
+    }
+    else {
+      currentCounter = call Timer2.get();
+    }
+    
+    ctrl = call Timer2Ctrl.getControl();
+    ctrl.bits.cs = s;
+    call Timer2Ctrl.setControl(ctrl);  
+
+    if (currentScale != s) {
+      adjust_zero(currentCounter);
+      schedule_new_overflow();
+    }
+    signal Notify.changed();
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t Timer2Ctrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR2; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void Timer2Ctrl.setControl( Atm128TimerControl_t x ) { 
+    TCCR2 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t Timer2Ctrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void Timer2Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t Timer2Ctrl.getInterruptFlag() { 
+    return *(Atm128_TIFR_t*)&TIFR; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void Timer2Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer2.reset() {
+    // Clear TOV0. On real hardware, this is a write.
+    TIFR &= ~(1 << TOV2);
+  }
+  async command void Timer2.start() {
+    SET_BIT(ATM128_TIMSK, TOIE2);
+    dbg("HplAtm128Counter2C", "Enabling TOIE0 at %llu\n", sim_time());
+    schedule_new_overflow();
+  }
+  async command void Timer2.stop()  {
+    dbg("HplAtm128Counter2C", "Timer stopped @ %llu\n", sim_time());
+    CLR_BIT(ATM128_TIMSK, TOIE2);
+    cancel_overflow();
+  }
+
+  bool overflowed() {
+    return READ_BIT(ATM128_TIFR, TOV2); 
+  }
+
+  inline void stabiliseOverflow() {
+    /* From the atmel manual:
+
+    During asynchronous operation, the synchronization of the interrupt
+    flags for the asynchronous timer takes three processor cycles plus one
+    timer cycle.  The timer is therefore advanced by at least one before
+    the processor can read the timer value causing the setting of the
+    interrupt flag. The output compare pin is changed on the timer clock
+    and is not synchronized to the processor clock.
+
+    So: if the timer is = 0, wait till it's = 1, except if
+    - we're currently in the overflow interrupt handler
+    - or, the overflow flag is already set
+    */
+
+    //if (!inOverflow)
+    //  while (!TCNT0 && !overflowed())
+    //;
+  }
+
+  async command bool Timer2.test()  { 
+    stabiliseOverflow();
+    return overflowed();
+  }
+  async command bool Timer2.isOn()  { 
+    return (call Timer2Ctrl.getInterruptMask()).bits.toie2; 
+  }
+
+  default async event void Timer2.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW2) {
+    inOverflow = TRUE;
+    signal Timer2.overflow();
+    inOverflow = FALSE;
+    call ThreadScheduler.interruptPostAmble();
+  }
+
+  /**
+   * If the clock was stopped and has restarted, then
+   * we need to move the time when the clock was last
+   * zero to a time that reflects the current settings.
+   * For example, if the clock was stopped when the counter
+   * was 52 and then later restarted, then <tt>lastZero</tt>
+   * needs to be moved forward in time so that the 52
+   * reflects the current time.
+   */ 
+  void adjust_zero(uint8_t currentCounter) {
+    sim_time_t now = sim_time();
+    sim_time_t adjust = currentCounter;
+    adjust = adjust << shiftFromScale();
+    adjust = clock_to_sim(adjust);
+    lastZero = now - adjust;
+  }
+  
+  sim_time_t clock_to_sim(sim_time_t t) {
+    t *= sim_ticks_per_sec();
+    t /= call Notify.clockTicksPerSec();
+    return t;
+  }
+
+  sim_time_t sim_to_clock(sim_time_t t) {
+    t *= call Notify.clockTicksPerSec();
+    t /= sim_ticks_per_sec();
+    return t;
+  }
+  
+  uint16_t shiftFromScale() {
+    uint8_t scale = call Timer2.getScale();
+    switch (scale) {
+    case 0:
+      return 0;
+    case 1:
+      return 0;
+    case 2:
+      return 3;
+    case 3:
+      return 5;
+    case 4:
+      return 6;
+    case 5:
+      return 7;
+    case 6:
+      return 8;
+    case 7:
+      return 10;
+    default:
+      return 255;
+    }
+    
+  }
+
+  sim_event_t* overflow;
+
+  void timer2_overflow_handle(sim_event_t* evt) {
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      char time[128];
+      sim_print_now(time, 128);
+      if (READ_BIT(ATM128_TIMSK, TOIE2)) {
+	CLR_BIT(ATM128_TIFR, TOV2);
+	dbg("HplAtm128Counter2C", "Overflow interrupt at %s\n", time);
+	SIG_OVERFLOW2();
+      }
+      else {
+	dbg("HplAtm128Counter2C", "Setting overflow bit at %s\n", time);
+	SET_BIT(ATM128_TIFR, TOV2);
+      }
+      configure_overflow(evt);
+      sim_queue_insert(evt);
+    }
+  }
+  
+  sim_event_t* allocate_overflow() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+
+    newEvent->handle = timer2_overflow_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_overflow(sim_event_t* evt) {
+    sim_time_t overflowTime = 0;
+    uint8_t timerVal = call Timer2.get();
+    uint8_t overflowVal = 0;
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    overflowTime = ((overflowVal - timerVal) & 0xff);
+    if (overflowTime == 0) {
+      overflowTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    overflowTime = overflowTime << shiftFromScale();
+    overflowTime = clock_to_sim(overflowTime);
+    overflowTime += sim_time();
+    overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale());
+
+    dbg("HplAtm128Counter2C", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime);
+    
+    evt->time = overflowTime;
+  }
+  
+  void schedule_new_overflow() {
+    sim_event_t* newEvent = allocate_overflow();
+    configure_overflow(newEvent);
+
+    if (overflow != NULL) {
+      cancel_overflow();
+    }
+    overflow = newEvent;
+    sim_queue_insert(newEvent);
+  }
+  
+  void cancel_overflow() {
+    if (overflow != NULL) {
+      overflow->cancelled = 1;
+      dbg("HplAtm128Counter2C", "Cancelling overflow %p.\n", overflow);
+      overflow->cleanup = sim_queue_cleanup_total;
+    }
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Timer0AsyncC.nc b/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Timer0AsyncC.nc
new file mode 100644
index 00000000..bfcbc006
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Timer0AsyncC.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer0. It is built from a
+ * timer-specific counter component and a generic compare
+ * component. The counter component has an additional simulation-only
+ * interface to let the compare component know when its state has
+ * changed (e.g., TCNTX was set).
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis <pal@cs.stanford.edu>
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+// $Id: HplAtm128Timer0AsyncC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $/// $Id: HplAtm128Timer2C.nc,
+
+#include <Atm128Timer.h>
+
+configuration HplAtm128Timer0AsyncC
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface HplAtm128TimerAsync       as TimerAsync;
+  }
+}
+implementation {
+  components HplAtm128Timer0AsyncP;
+  Timer = HplAtm128Timer0AsyncP;
+  TimerCtrl = HplAtm128Timer0AsyncP;
+  Compare = HplAtm128Timer0AsyncP;
+  TimerAsync = HplAtm128Timer0AsyncP;
+  
+  components TinyThreadSchedulerC;
+  HplAtm128Timer0AsyncP.ThreadScheduler -> TinyThreadSchedulerC;
+}
diff --git a/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Timer0AsyncP.nc b/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Timer0AsyncP.nc
new file mode 100644
index 00000000..b00bde7b
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Timer0AsyncP.nc
@@ -0,0 +1,587 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer0 counter. It handles
+ * overflow, scaling, and phase considerations.
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis <pal@cs.stanford.edu>
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+// $Id: HplAtm128Timer0AsyncP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $/// $Id: HplAtm128Timer2C.nc,
+
+#include <Atm128Timer.h>
+#include <hardware.h>
+
+module HplAtm128Timer0AsyncP {
+  provides {
+    interface HplAtm128Timer<uint8_t>   as Timer0;
+    interface HplAtm128TimerCtrl8       as Timer0Ctrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface HplAtm128TimerAsync       as TimerAsync;
+  }
+  uses interface ThreadScheduler;
+}
+implementation {
+  bool inOverflow = 0;
+  uint8_t savedCounter = 0;
+
+  void adjust_zero(uint8_t currentCounter);
+
+  void cancel_overflow();
+  sim_event_t* allocate_overflow();
+  void configure_overflow(sim_event_t* e);
+  void schedule_new_overflow();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+  /* lastZero keeps track of the phase of the clock. It denotes the sim
+   * time at which the underlying clock started, which is needed to
+   * calculate when compares will occur. */
+  sim_time_t lastZero = 0;
+
+  /** This variable is needed to keep track of when the underlying
+   *  timer starts, in order to reset lastZero. When oldScale is
+   *  AVR_CLOCK_OFF and the scale is set to something else, the
+   *  clock starts ticking. */
+  uint8_t oldScale = AVR_CLOCK_OFF;
+  
+  void adjust_zero(uint8_t currentCounter);
+  
+  void cancel_compare();
+  sim_event_t* allocate_compare();
+  void configure_compare(sim_event_t* e);
+  void schedule_new_compare();
+
+  sim_time_t clock_to_sim(sim_time_t t);
+  sim_time_t sim_to_clock(sim_time_t t);
+  uint16_t shiftFromScale();
+
+  default async event void Compare.fired() { }
+  AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE0) {
+    //stabiliseTimer0();
+    signal Compare.fired();
+    call ThreadScheduler.interruptPostAmble();
+  }
+ 
+  default async event void Timer0.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW0) {
+    inOverflow = TRUE;
+    signal Timer0.overflow();
+    inOverflow = FALSE;
+    call ThreadScheduler.interruptPostAmble();
+  }
+
+
+  
+  sim_time_t last_zero() {
+    if (lastZero == 0) {
+      lastZero = sim_mote_start_time(sim_node());
+    }
+    return lastZero;
+  }
+
+
+  void notify_changed() {
+    uint8_t newScale = call Timer0.getScale();
+    if (newScale != AVR_CLOCK_OFF &&
+	oldScale == AVR_CLOCK_OFF) {
+      lastZero = sim_time();
+    }
+    oldScale = newScale;
+    
+    schedule_new_compare();
+  }
+
+  sim_time_t notify_clockTicksPerSec() {
+    return ATM128_TIMER0_TICKSPPS;
+  }
+  
+  /**
+   * If the clock was stopped and has restarted, then
+   * we need to move the time when the clock was last
+   * zero to a time that reflects the current settings.
+   * For example, if the clock was stopped when the counter
+   * was 52 and then later restarted, then <tt>lastZero</tt>
+   * needs to be moved forward in time so that the 52
+   * reflects the current time.
+   */ 
+  void adjust_zero(uint8_t currentCounter) {
+    sim_time_t now = sim_time();
+    sim_time_t adjust = currentCounter;
+    adjust = adjust << shiftFromScale();
+    adjust = clock_to_sim(adjust);
+    lastZero = now - adjust;
+  }
+  
+  sim_time_t clock_to_sim(sim_time_t t) {
+    t *= sim_ticks_per_sec();
+    t /= notify_clockTicksPerSec();
+    return t;
+  }
+
+  sim_time_t sim_to_clock(sim_time_t t) {
+    t *= notify_clockTicksPerSec();
+    t /= sim_ticks_per_sec();
+    return t;
+  }
+  
+  uint16_t shiftFromScale() {
+    uint8_t scale = call Timer0.getScale();
+    switch (scale) {
+    case 0:
+      return 0;
+    case 1:
+      return 0;
+    case 2:
+      return 3;
+    case 3:
+      return 5;
+    case 4:
+      return 6;
+    case 5:
+      return 7;
+    case 6:
+      return 8;
+    case 7:
+      return 10;
+    default:
+      return 255;
+    }
+    
+  }
+
+  sim_event_t* compare;
+
+  void timer0_compare_handle(sim_event_t* evt) {
+    dbg("HplAtm128Timer0AsyncP", "Beginning compare 0x%p at %s\n", evt, sim_time_string());
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      char timeStr[128];
+      sim_print_now(timeStr, 128);
+      dbg("HplAtm128Timer0AsyncP", "Handling compare at 0x%p @ %s\n", evt, sim_time_string());
+      
+      if (READ_BIT(ATM128_TCCR0, WGM01) && !READ_BIT(ATM128_TCCR0, WGM00)) {
+	dbg("HplAtm128Timer0AsyncP", "%s: CTC is set, clear timer.\n", __FUNCTION__);
+	call Timer0.set(0);
+      }
+      else {
+	dbg("HplAtm128Timer0AsyncP", "%s: TCCR is 0x%hhx, %i, %i\n", __FUNCTION__, TCCR0, (int)READ_BIT(ATM128_TCCR0, WGM01), (int)READ_BIT(ATM128_TCCR0, WGM00));
+      }
+      
+      if (READ_BIT(ATM128_TIMSK, OCIE0)) {
+	dbg("HplAtm128Timer0AsyncP", "TIFR is %hhx\n", TIFR);
+	CLR_BIT(ATM128_TIFR, OCF0);
+	dbg("HplAtm128Timer0AsyncP", "TIFR is %hhx\n", TIFR);
+	dbg("HplAtm128Timer0AsyncP", "Compare interrupt @ %s\n", timeStr);
+	SIG_OUTPUT_COMPARE0();
+      }
+      else {
+	SET_BIT(ATM128_TIFR, OCF0);
+      }
+      // If we haven't been cancelled
+      if (!evt->cancelled) {
+	configure_compare(evt);
+	sim_queue_insert(evt);
+      }
+    }
+  }
+
+  sim_event_t* allocate_compare() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+    dbg("HplAtm128Timer0AsyncP", "Allocated compare at 0x%p\n", newEvent);
+    newEvent->handle = timer0_compare_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_compare(sim_event_t* evt) {
+    sim_time_t compareTime = 0;
+    sim_time_t phaseOffset = 0;
+    uint8_t timerVal = call Timer0.get();
+    uint8_t compareVal = call Compare.get();
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    compareTime = ((compareVal - timerVal) & 0xff);
+    if (compareTime == 0) {
+      compareTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    // The +1 is from the timer behavior: if you set OCR0 to be X,
+    // it will actually fire when TCNT is X+1
+    compareTime = (compareTime + 1) << shiftFromScale();
+    compareTime = clock_to_sim(compareTime);
+    compareTime += sim_time();
+
+    // How long into a timer tick was the clock actually reset?
+    // This covers the case when the compare is set midway between
+    // a tick, so it will go off a little early
+    phaseOffset = sim_time();
+    phaseOffset -= last_zero();
+    phaseOffset %= clock_to_sim(1 << shiftFromScale());
+    compareTime -= phaseOffset;
+      
+    dbg("HplAtm128Timer0AsyncP", "Configuring new compare of %i for %i at time %llu  (@ %llu)\n", (int)compareVal, sim_node(), compareTime, sim_time());
+    
+    evt->time = compareTime;    
+  }
+  
+  void schedule_new_compare() {
+    if (compare != NULL) {
+      cancel_compare();
+    }
+    if (call Timer0.getScale() != AVR_CLOCK_OFF) {
+      sim_event_t* newEvent = allocate_compare();
+      configure_compare(newEvent);
+
+      compare = newEvent;
+      sim_queue_insert(newEvent);
+    }
+  }
+
+  
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer0.get() {
+    uint8_t rval;
+    sim_time_t elapsed = sim_time() - last_zero();
+    elapsed = sim_to_clock(elapsed);
+    elapsed = elapsed >> shiftFromScale();
+    rval = (uint8_t)(elapsed & 0xff);
+    dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Getting timer: %hhu\n", rval);
+    return rval;
+  }
+
+  //=== Set/clear the current timer value. ==============================
+  /**
+   * Set/clear the current timer value.
+   *
+   * This code is pretty tricky.  */
+  async command void Timer0.set(uint8_t newVal)  {
+    uint8_t curVal = call Timer0.get();
+    dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Setting timer: %hhu\n", newVal);
+    if (newVal == curVal) {
+      return;
+    }
+    else {
+      sim_time_t adjustment = curVal - newVal;
+      adjustment = adjustment << shiftFromScale();
+      adjustment = clock_to_sim(adjustment);
+
+      if (newVal < curVal) {
+	lastZero += adjustment;
+      }
+      else { // newVal > curVal
+	lastZero -= adjustment;
+      }
+
+      schedule_new_overflow();
+      notify_changed();
+    }
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer0.getScale() {
+    return TCCR0 & 0x7;
+  }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer0.off() {
+    call Timer0.setScale(AVR_CLOCK_OFF);
+    savedCounter = call Timer0.get();
+    cancel_overflow();
+    notify_changed();
+  }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer0.setScale(uint8_t s)  {
+    Atm128TimerControl_t ctrl;
+    uint8_t currentScale = call Timer0.getScale();
+    uint8_t currentCounter;
+    dbg("HplAtm128Timer0AsyncP", "Timer0 scale set to %i\n", (int)s);
+    if (currentScale == 0) {
+      currentCounter = savedCounter;
+    }
+    else {
+      currentCounter = call Timer0.get();
+    }
+    
+    ctrl = call Timer0Ctrl.getControl();
+    ctrl.flat &= ~(0x7);
+    ctrl.flat |= (s & 0x7);
+    call Timer0Ctrl.setControl(ctrl);  
+
+    if (currentScale != s) {
+      adjust_zero(currentCounter);
+      schedule_new_overflow();
+    }
+    notify_changed();
+  }
+
+  //=== Read the control registers. =====================================
+  async command Atm128TimerControl_t Timer0Ctrl.getControl() { 
+    return *(Atm128TimerControl_t*)&TCCR0; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void Timer0Ctrl.setControl( Atm128TimerControl_t x ) {
+    dbg("HplAtm128Timer0AsyncP", "Setting control to be 0x%hhx\n", x.flat);
+    TCCR0 = x.flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command Atm128_TIMSK_t Timer0Ctrl.getInterruptMask() { 
+    return *(Atm128_TIMSK_t*)&TIMSK; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  DEFINE_UNION_CAST(TimerMask8_2int, Atm128_TIMSK_t, uint8_t);
+  DEFINE_UNION_CAST(TimerMask16_2int, Atm128_ETIMSK_t, uint8_t);
+
+  async command void Timer0Ctrl.setInterruptMask( Atm128_TIMSK_t x ) { 
+    TIMSK = TimerMask8_2int(x); 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command Atm128_TIFR_t Timer0Ctrl.getInterruptFlag() {
+    Atm128_TIFR_t at;
+    at.flat = TIFR;
+    return at;
+  }
+
+  //=== Write the interrupt flags. ====================================
+  DEFINE_UNION_CAST(TimerFlags8_2int, Atm128_TIFR_t, uint8_t);
+  DEFINE_UNION_CAST(TimerFlags16_2int, Atm128_ETIFR_t, uint8_t);
+
+  async command void Timer0Ctrl.setInterruptFlag( Atm128_TIFR_t x ) { 
+    TIFR = TimerFlags8_2int(x); 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer0.reset() {
+    // Clear TOV0. On real hardware, this is a write.
+    TIFR &= ~(1 << TOV0);
+  }
+  async command void Timer0.start() {
+    SET_BIT(ATM128_TIMSK, TOIE0);
+    dbg("HplAtm128Timer0AsyncP", "Enabling TOIE0 at %llu\n", sim_time());
+    schedule_new_overflow();
+  }
+  async command void Timer0.stop()  {
+    dbg("HplAtm128Timer0AsyncP", "Timer stopped @ %llu\n", sim_time());
+    CLR_BIT(ATM128_TIMSK, TOIE0);
+    cancel_overflow();
+  }
+
+  bool overflowed() {
+    return READ_BIT(ATM128_TIFR, TOV0); 
+  }
+
+  inline void stabiliseOverflow() {
+    /* From the atmel manual:
+
+    During asynchronous operation, the synchronization of the interrupt
+    flags for the asynchronous timer takes three processor cycles plus one
+    timer cycle.  The timer is therefore advanced by at least one before
+    the processor can read the timer value causing the setting of the
+    interrupt flag. The output compare pin is changed on the timer clock
+    and is not synchronized to the processor clock.
+
+    So: if the timer is = 0, wait till it's = 1, except if
+    - we're currently in the overflow interrupt handler
+    - or, the overflow flag is already set
+    */
+
+    //if (!inOverflow)
+    //  while (!TCNT0 && !overflowed())
+    //;
+  }
+  
+  async command bool Timer0.test()  { 
+    stabiliseOverflow();
+    return overflowed();
+  }
+
+  async command bool Timer0.isOn()  { 
+    return (call Timer0Ctrl.getInterruptMask()).bits.toie0; 
+  }
+
+  async command void Compare.reset() { TIFR = 1 << OCF0; }
+  async command void Compare.start() { SET_BIT(ATM128_TIMSK,OCIE0); }
+  async command void Compare.stop()  { CLR_BIT(ATM128_TIMSK,OCIE0); }
+  async command bool Compare.test()  { 
+    return (call Timer0Ctrl.getInterruptFlag()).bits.ocf0; 
+  }
+  async command bool Compare.isOn()  { 
+    return (call Timer0Ctrl.getInterruptMask()).bits.ocie0; 
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint8_t Compare.get()   {
+    dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Getting compare: %hhu\n", OCR0);
+    return OCR0;
+  }
+  
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(uint8_t t)   {
+    dbg("HplAtm128Timer0AsyncP", "HplAtm128Timer0AsyncP: Setting compare: %hhu\n", t);
+    atomic {
+	/* Re the comment above: it's a bad idea to wake up at time 0, as
+	   we'll just spin when setting the next deadline. Try and reduce
+	   the likelihood by delaying the interrupt...
+	*/
+      if (t == 0 || t >= 0xfe)
+	t = 1;
+      
+      if (t != OCR0) {
+	OCR0 = t;
+	schedule_new_compare();
+      }
+    }
+  }
+
+  sim_event_t* overflow;  
+  void timer0_overflow_handle(sim_event_t* evt) {
+    if (evt->cancelled) {
+      return;
+    }
+    else {
+      if (READ_BIT(ATM128_TIMSK, TOIE0)) {
+	CLR_BIT(ATM128_TIFR, TOV0);
+	dbg("HplAtm128Timer0AsyncP", "Overflow interrupt at %s\n", sim_time_string());
+	SIG_OVERFLOW0();
+      }
+      else {
+	dbg("HplAtm128Timer0AsyncP", "Setting overflow bit at %s\n", sim_time_string());
+	SET_BIT(ATM128_TIFR, TOV0);
+      }
+      configure_overflow(evt);
+      sim_queue_insert(evt);
+    }
+  }
+  
+  sim_event_t* allocate_overflow() {
+    sim_event_t* newEvent = sim_queue_allocate_event();
+
+    newEvent->handle = timer0_overflow_handle;
+    newEvent->cleanup = sim_queue_cleanup_none;
+    return newEvent;
+  }
+  
+  void configure_overflow(sim_event_t* evt) {
+    sim_time_t overflowTime = 0;
+    uint8_t timerVal = call Timer0.get();
+    uint8_t overflowVal = 0;
+
+    // Calculate how many counter increments until timer
+    // hits compare, considering wraparound, and special
+    // case of complete wraparound.
+    overflowTime = ((overflowVal - timerVal) & 0xff);
+    if (overflowTime == 0) {
+      overflowTime = 256;
+    }
+
+    // Now convert the compare time from counter increments
+    // to simulation ticks, considering the fact that the
+    // increment actually has a phase offset.
+    overflowTime = overflowTime << shiftFromScale();
+    overflowTime = clock_to_sim(overflowTime);
+    overflowTime += sim_time();
+    overflowTime -= (sim_time() - last_zero()) % (1 << shiftFromScale());
+
+    dbg("HplAtm128Timer0AsyncP", "Scheduling new overflow for %i at time %llu\n", sim_node(), overflowTime);
+    
+    evt->time = overflowTime;
+  }
+  
+  void schedule_new_overflow() {
+    sim_event_t* newEvent = allocate_overflow();
+    configure_overflow(newEvent);
+
+    if (overflow != NULL) {
+      cancel_overflow();
+    }
+    overflow = newEvent;
+    sim_queue_insert(newEvent);
+  }
+  
+  void cancel_overflow() {
+    if (overflow != NULL) {
+      overflow->cancelled = 1;
+      dbg("HplAtm128Timer0AsyncP", "Cancelling overflow %p.\n", overflow);
+      overflow->cleanup = sim_queue_cleanup_total;
+    }
+  }
+
+  async command Atm128Assr_t TimerAsync.getAssr() {
+    return *(Atm128Assr_t *)&ASSR;
+  }
+
+  async command void TimerAsync.setAssr(Atm128Assr_t x) {
+    ASSR = x.flat;
+  }
+
+  async command void TimerAsync.setTimer0Asynchronous() {
+    ASSR |= 1 << AS0;
+  }
+
+  async command int TimerAsync.controlBusy() {
+    return (ASSR & (1 << TCR0UB)) != 0;
+  }
+
+  async command int TimerAsync.compareBusy() {
+    return (ASSR & (1 << OCR0UB)) != 0;
+  }
+
+  async command int TimerAsync.countBusy() {
+    return (ASSR & (1 << TCN0UB)) != 0;
+  }
+
+  void cancel_compare() {
+    dbg("HplAtm128CompareC", "Cancelling compare at 0x%p\n", compare);
+    if (compare != NULL) {
+      compare->cancelled = 1;
+      compare->cleanup = sim_queue_cleanup_total;
+    }
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Timer2C.nc b/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Timer2C.nc
new file mode 100644
index 00000000..c0b84743
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm128/sim/HplAtm128Timer2C.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TOSSIM implementation of the Atm128 Timer2. It is built from a
+ * timer-specific counter component and a generic compare
+ * component. The counter component has an additional simulation-only
+ * interface to let the compare component know when its state has
+ * changed (e.g., TCNTX was set).
+ *
+ * @date November 22 2005
+ *
+ * @author Philip Levis <pal@cs.stanford.edu>
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+// $Id: HplAtm128Timer2C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $/// $Id: HplAtm128Timer2C.nc,
+
+
+#include <Atm128Timer.h>
+
+configuration HplAtm128Timer2C
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer2;
+    interface HplAtm128TimerCtrl8       as Timer2Ctrl;
+    interface HplAtm128Compare<uint8_t> as Compare2;
+  }
+  uses interface ThreadScheduler;
+}
+implementation {
+  components HplAtm128Counter0C, new HplAtm128CompareC(uint8_t,
+						 ATM128_OCR2,
+						 ATM128_TIMSK,
+						 OCIE2,
+						 ATM128_TIFR,
+						 OCF2);
+
+  Timer2 = HplAtm128Counter2C;
+  Timer2Ctrl = HplAtm128Counter2C;
+  Compare2 = HplAtm128CompareC;
+
+  HplAtm128CompareC.Timer -> HplAtm128Counter2C;
+  HplAtm128CompareC.TimerCtrl -> HplAtm128Counter2C;
+  HplAtm128CompareC.Notify -> HplAtm128Counter2C;
+  
+  components TinyThreadSchedulerC;
+  HplAtm128Counter0C.ThreadScheduler -> TinyThreadSchedulerC;
+  HplAtm128CompareC.ThreadScheduler -> TinyThreadSchedulerC;
+}
diff --git a/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer1P.nc b/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer1P.nc
new file mode 100644
index 00000000..1a9a5040
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer1P.nc
@@ -0,0 +1,251 @@
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Internal component of the HPL interface to Atmega1281 timer 1.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm1281Timer1P
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as CompareA;
+    interface HplAtm128Compare<uint16_t> as CompareB;
+    interface HplAtm128Compare<uint16_t> as CompareC;
+  }
+  uses interface PlatformInterrupt;
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint16_t Timer.get() { return TCNT1; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint16_t t) { TCNT1 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR1B & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128_TCCRB_t x = (Atm128_TCCRB_t) call TimerCtrl.getControlB();
+    x.bits.cs = s;
+    call TimerCtrl.setControlB(x.flat);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command uint8_t TimerCtrl.getControlA() { 
+    return TCCR1A; 
+  }
+
+  async command uint8_t TimerCtrl.getControlB() { 
+    return TCCR1B; 
+  }
+
+  async command uint8_t TimerCtrl.getControlC() { 
+    return TCCR1C; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setControlA( uint8_t x ) { 
+    TCCR1A = x; 
+  }
+
+  async command void TimerCtrl.setControlB( uint8_t x ) { 
+    TCCR1B = x; 
+  }
+
+  async command void TimerCtrl.setControlC( uint8_t x ) { 
+    TCCR1C = x; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command uint8_t TimerCtrl.getInterruptMask() { 
+    return TIMSK1; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  async command void TimerCtrl.setInterruptMask( uint8_t x ) { 
+    TIMSK1 = x; 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command uint8_t TimerCtrl.getInterruptFlag() { 
+    return TIFR1; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  async command void TimerCtrl.setInterruptFlag( uint8_t x ) { 
+    TIFR1 = x; 
+  }
+
+  //=== Capture 16-bit implementation. ===================================
+  async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR1B,ICES1, up); }
+
+  //=== Timer 16-bit implementation. ===================================
+  async command void Timer.reset()    { TIFR1 = 1 << TOV1; }
+  async command void Capture.reset()  { TIFR1 = 1 << ICF1; }
+  async command void CompareA.reset() { TIFR1 = 1 << OCF1A; }
+  async command void CompareB.reset() { TIFR1 = 1 << OCF1B; }
+  async command void CompareC.reset() { TIFR1 = 1 << OCF1C; }
+
+  async command void Timer.start()    { SET_BIT(TIMSK1,TOIE1); }
+  async command void Capture.start()  { SET_BIT(TIMSK1,ICIE1); }
+  async command void CompareA.start() { SET_BIT(TIMSK1,OCIE1A); }
+  async command void CompareB.start() { SET_BIT(TIMSK1,OCIE1B); }
+  async command void CompareC.start() { SET_BIT(TIMSK1,OCIE1C); }
+
+  async command void Timer.stop()    { CLR_BIT(TIMSK1,TOIE1); }
+  async command void Capture.stop()  { CLR_BIT(TIMSK1,ICIE1); }
+  async command void CompareA.stop() { CLR_BIT(TIMSK1,OCIE1A); }
+  async command void CompareB.stop() { CLR_BIT(TIMSK1,OCIE1B); }
+  async command void CompareC.stop() { CLR_BIT(TIMSK1,OCIE1C); }
+
+  async command bool Timer.test() { 
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.tov; 
+  }
+  async command bool Capture.test()  { 
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.icf; 
+  }
+  async command bool CompareA.test() { 
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfa; 
+  }
+  async command bool CompareB.test() { 
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfb; 
+  }
+  async command bool CompareC.test() { 
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfc; 
+  }
+
+  async command bool Timer.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.toie;
+  }
+  async command bool Capture.isOn()  {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.icie;
+  }
+  async command bool CompareA.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociea;
+  }
+  async command bool CompareB.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ocieb;
+  }
+  async command bool CompareC.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociec;
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint16_t CompareA.get() { return OCR1A; }
+  async command uint16_t CompareB.get() { return OCR1B; }
+  async command uint16_t CompareC.get() { return OCR1C; }
+
+  //=== Write the compare registers. ====================================
+  async command void CompareA.set(uint16_t t) { OCR1A = t; }
+  async command void CompareB.set(uint16_t t) { OCR1B = t; }
+  async command void CompareC.set(uint16_t t) { OCR1C = t; }
+
+  //=== Read the capture registers. =====================================
+  async command uint16_t Capture.get() { return ICR1; }
+
+  //=== Write the capture registers. ====================================
+  async command void Capture.set(uint16_t t)  { ICR1 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void CompareA.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1A) {
+    signal CompareA.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void CompareB.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1B) {
+    signal CompareB.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void CompareC.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE1C) {
+    signal CompareC.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void Capture.captured(uint16_t time) { }
+  AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE1) {
+    signal Capture.captured(call Timer.get());
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW1) {
+    signal Timer.overflow();
+    call PlatformInterrupt.postAmble();
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer2AsyncC.nc b/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer2AsyncC.nc
new file mode 100644
index 00000000..05556891
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer2AsyncC.nc
@@ -0,0 +1,101 @@
+/// $Id: HplAtm1281Timer2AsyncC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Simple wrapper around the actual timer implementation that automatically
+ * wires it to McuSleepC for low-power calculations..
+ *
+ * @author Philip Levis
+ * @author David Gay
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <Atm128Timer.h>
+
+configuration HplAtm1281Timer2AsyncC
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface HplAtm128TimerAsync       as TimerAsync;
+  }
+}
+implementation
+{
+  components HplAtm1281Timer2AsyncP;
+  components McuSleepC;
+
+  McuSleepC.McuPowerOverride -> HplAtm1281Timer2AsyncP;
+
+  Timer = HplAtm1281Timer2AsyncP;
+  TimerCtrl = HplAtm1281Timer2AsyncP;
+  Compare = HplAtm1281Timer2AsyncP;
+  TimerAsync = HplAtm1281Timer2AsyncP;
+  
+  components PlatformInterruptC;
+  HplAtm1281Timer2AsyncP.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer2AsyncP.nc b/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer2AsyncP.nc
new file mode 100644
index 00000000..f4600047
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer2AsyncP.nc
@@ -0,0 +1,293 @@
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * HPL interface to Atmega1281 timer 2 in ASYNC mode. This is a specialised
+ * HPL component that assumes that timer 2 is used in ASYNC mode and
+ * includes some workarounds for some of the weirdnesses (delayed overflow
+ * interrupt) of that mode.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm1281Timer2AsyncP
+{
+  provides {
+    // 8-bit Timers
+    interface HplAtm128Timer<uint8_t>   as Timer;
+    interface HplAtm128TimerCtrl8       as TimerCtrl;
+    interface HplAtm128Compare<uint8_t> as Compare;
+    interface McuPowerOverride;
+    interface HplAtm128TimerAsync       as TimerAsync;
+  }
+  uses interface PlatformInterrupt;
+}
+implementation
+{
+//  bool inOverflow;
+
+//  command error_t Init.init() {
+//    SET_BIT(ASSR, AS2);  // set Timer/Counter2 to asynchronous mode
+//    return SUCCESS;
+//  }
+
+  //=== Read the current timer value. ===================================
+  async command uint8_t  Timer.get() { return TCNT2; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint8_t t)  {
+    while (ASSR & 1 << TCN2UB)
+      ;
+    TCNT2 = t;
+  }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR2B & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128_TCCR2B_t x = (Atm128_TCCR2B_t) call TimerCtrl.getControlB();
+    x.bits.cs = s;
+    call TimerCtrl.setControlB(x.flat);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command uint8_t TimerCtrl.getControlA() { 
+    return TCCR2A; 
+  }
+
+  async command uint8_t TimerCtrl.getControlB() { 
+    return TCCR2B; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setControlA( uint8_t x ) { 
+    while (ASSR & 1 << TCR2AUB)
+      ;
+    TCCR2A = ((Atm128_TCCR2A_t)x).flat; 
+  }
+
+  async command void TimerCtrl.setControlB( uint8_t x ) { 
+    while (ASSR & 1 << TCR2BUB)
+      ;
+    TCCR2B = ((Atm128_TCCR2B_t)x).flat; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command uint8_t TimerCtrl.getInterruptMask() { 
+    return TIMSK2; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  async command void TimerCtrl.setInterruptMask( uint8_t x ) { 
+    TIMSK2 = x; 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command uint8_t TimerCtrl.getInterruptFlag() { 
+    return TIFR2; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  async command void TimerCtrl.setInterruptFlag( uint8_t x ) { 
+    TIFR2 = x; 
+  }
+
+  //=== Timer 8-bit implementation. ====================================
+  async command void Timer.reset() { TIFR2 = 1 << TOV2; }
+  async command void Timer.start() { SET_BIT(TIMSK2, TOIE2); }
+  async command void Timer.stop()  { CLR_BIT(TIMSK2, TOIE2); }
+
+  bool overflowed() {
+    return ((Atm128_TIFR2_t)call TimerCtrl.getInterruptFlag()).bits.tov; 
+  }
+
+  async command bool Timer.test()  { 
+    return overflowed();
+  }
+  
+  async command bool Timer.isOn()  { 
+    return ((Atm128_TIMSK2_t)call TimerCtrl.getInterruptMask()).bits.toie; 
+  }
+  
+  async command void Compare.reset() { TIFR2 = 1 << OCF2A; }
+  async command void Compare.start() { SET_BIT(TIMSK2,OCIE2A); }
+  async command void Compare.stop()  { CLR_BIT(TIMSK2,OCIE2A); }
+  async command bool Compare.test()  { 
+    return ((Atm128_TIFR2_t)call TimerCtrl.getInterruptFlag()).bits.ocfa; 
+  }
+  async command bool Compare.isOn()  { 
+    return ((Atm128_TIMSK2_t)call TimerCtrl.getInterruptMask()).bits.ociea; 
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint8_t Compare.get(){ return OCR2A; }
+
+  //=== Write the compare registers. ====================================
+  async command void Compare.set(uint8_t t)   { 
+    atomic
+      {
+	while (ASSR & 1 << OCR2AUB)
+	  ;
+	OCR2A = t; 
+      }
+  }
+
+  //=== Timer interrupts signals ========================================
+  inline void stabiliseTimer2() {
+    TCCR2A = TCCR2A;
+    while (ASSR & 1 << TCR2AUB)
+      ;
+  }
+
+  /**
+   * On the atm128, there is a small latency when waking up from
+   * POWER_SAVE mode. So if a timer is going to go off very soon, it's
+   * better to drop down until EXT_STANDBY, which has a 6 cycle wakeup
+   * latency. This function calculates whether staying in EXT_STANDBY
+   * is needed. If the timer is not running it returns POWER_DOWN.
+   * Please refer to TEP 112 and the atm128 datasheet for details.
+   */
+  
+  async command mcu_power_t McuPowerOverride.lowestState() {
+    uint8_t diff;
+    // We need to make sure that the sleep wakeup latency will not
+    // cause us to miss a timer. POWER_SAVE 
+    if (TIMSK2 & (1 << OCIE2A | 1 << TOIE2)) {
+      // need to wait for timer 2 updates propagate before sleeping
+      // (we don't need to worry about reentering sleep mode too early,
+      // as the wake ups from timer2 wait at least one TOSC1 cycle
+      // anyway - see the stabiliseTimer2 function)
+      while (ASSR & (1 << TCN2UB | 1 << OCR2AUB | 1 << TCR2AUB))
+	;
+      diff = OCR2A - TCNT2;
+      if (diff < EXT_STANDBY_T0_THRESHOLD ||
+	  TCNT2 > 256 - EXT_STANDBY_T0_THRESHOLD) 
+	return ATM128_POWER_EXT_STANDBY;
+      return ATM128_POWER_SAVE;
+    }
+    else {
+      return ATM128_POWER_DOWN;
+    }
+  }
+
+  default async event void Compare.fired() { }
+  AVR_ATOMIC_HANDLER(SIG_OUTPUT_COMPARE2A) {
+    stabiliseTimer2();
+//    __nesc_enable_interrupt();
+   
+    signal Compare.fired();
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void Timer.overflow() { }
+  AVR_ATOMIC_HANDLER(SIG_OVERFLOW2) {
+    stabiliseTimer2();
+//    inOverflow = TRUE;
+    signal Timer.overflow();
+//    inOverflow = FALSE;
+    call PlatformInterrupt.postAmble();  
+  }
+
+  // Asynchronous status register support
+  async command Atm128_ASSR_t TimerAsync.getAssr() {
+    return *(Atm128_ASSR_t *)&ASSR;
+  }
+
+  async command void TimerAsync.setAssr(Atm128_ASSR_t x) {
+    ASSR = x.flat;
+  }
+
+  async command void TimerAsync.setTimer2Asynchronous() {
+    ASSR |= 1 << AS2;
+  }
+
+  async command int TimerAsync.controlABusy() {
+    return (ASSR & (1 << TCR2AUB)) != 0;
+  }
+
+  async command int TimerAsync.controlBBusy() {
+    return (ASSR & (1 << TCR2BUB)) != 0;
+  }
+
+  async command int TimerAsync.compareABusy() {
+    return (ASSR & (1 << OCR2AUB)) != 0;
+  }
+
+  async command int TimerAsync.compareBBusy() {
+    return (ASSR & (1 << OCR2BUB)) != 0;
+  }
+
+  async command int TimerAsync.countBusy() {
+    return (ASSR & (1 << TCN2UB)) != 0;
+  }
+
+}
diff --git a/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer3P.nc b/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer3P.nc
new file mode 100644
index 00000000..3411094a
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm1281/HplAtm1281Timer3P.nc
@@ -0,0 +1,251 @@
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Internal component of the HPL interface to Atmega1281 timer 3.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <Atm128Timer.h>
+
+module HplAtm1281Timer3P
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as CompareA;
+    interface HplAtm128Compare<uint16_t> as CompareB;
+    interface HplAtm128Compare<uint16_t> as CompareC;
+  }
+  uses interface PlatformInterrupt;
+}
+implementation
+{
+  //=== Read the current timer value. ===================================
+  async command uint16_t Timer.get() { return TCNT3; }
+
+  //=== Set/clear the current timer value. ==============================
+  async command void Timer.set(uint16_t t) { TCNT3 = t; }
+
+  //=== Read the current timer scale. ===================================
+  async command uint8_t Timer.getScale() { return TCCR3B & 0x7; }
+
+  //=== Turn off the timers. ============================================
+  async command void Timer.off() { call Timer.setScale(AVR_CLOCK_OFF); }
+
+  //=== Write a new timer scale. ========================================
+  async command void Timer.setScale(uint8_t s)  { 
+    Atm128_TCCRB_t x = (Atm128_TCCRB_t) call TimerCtrl.getControlB();
+    x.bits.cs = s;
+    call TimerCtrl.setControlB(x.flat);  
+  }
+
+  //=== Read the control registers. =====================================
+  async command uint8_t TimerCtrl.getControlA() { 
+    return TCCR3A; 
+  }
+
+  async command uint8_t TimerCtrl.getControlB() { 
+    return TCCR3B; 
+  }
+
+  async command uint8_t TimerCtrl.getControlC() { 
+    return TCCR3C; 
+  }
+
+  //=== Write the control registers. ====================================
+  async command void TimerCtrl.setControlA( uint8_t x ) { 
+    TCCR3A = x; 
+  }
+
+  async command void TimerCtrl.setControlB( uint8_t x ) { 
+    TCCR3B = x; 
+  }
+
+  async command void TimerCtrl.setControlC( uint8_t x ) { 
+    TCCR3C = x; 
+  }
+
+  //=== Read the interrupt mask. =====================================
+  async command uint8_t TimerCtrl.getInterruptMask() { 
+    return TIMSK3; 
+  }
+
+  //=== Write the interrupt mask. ====================================
+  async command void TimerCtrl.setInterruptMask( uint8_t x ) { 
+    TIMSK3 = x; 
+  }
+
+  //=== Read the interrupt flags. =====================================
+  async command uint8_t TimerCtrl.getInterruptFlag() { 
+    return TIFR3; 
+  }
+
+  //=== Write the interrupt flags. ====================================
+  async command void TimerCtrl.setInterruptFlag( uint8_t x ) { 
+    TIFR3 = x; 
+  }
+
+  //=== Capture 16-bit implementation. ===================================
+  async command void Capture.setEdge(bool up) { WRITE_BIT(TCCR3B, ICES3, up); }
+
+  //=== Timer 16-bit implementation. ===================================
+  async command void Timer.reset()    { TIFR3 = 1 << TOV3; }
+  async command void Capture.reset()  { TIFR3 = 1 << ICF3; }
+  async command void CompareA.reset() { TIFR3 = 1 << OCF3A; }
+  async command void CompareB.reset() { TIFR3 = 1 << OCF3B; }
+  async command void CompareC.reset() { TIFR3 = 1 << OCF3C; }
+
+  async command void Timer.start()    { SET_BIT(TIMSK3,TOIE3); }
+  async command void Capture.start()  { SET_BIT(TIMSK3,ICIE3); }
+  async command void CompareA.start() { SET_BIT(TIMSK3,OCIE3A); }
+  async command void CompareB.start() { SET_BIT(TIMSK3,OCIE3B); }
+  async command void CompareC.start() { SET_BIT(TIMSK3,OCIE3C); }
+
+  async command void Timer.stop()    { CLR_BIT(TIMSK3,TOIE3); }
+  async command void Capture.stop()  { CLR_BIT(TIMSK3,ICIE3); }
+  async command void CompareA.stop() { CLR_BIT(TIMSK3,OCIE3A); }
+  async command void CompareB.stop() { CLR_BIT(TIMSK3,OCIE3B); }
+  async command void CompareC.stop() { CLR_BIT(TIMSK3,OCIE3C); }
+
+  async command bool Timer.test() { 
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.tov; 
+  }
+  async command bool Capture.test()  { 
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.icf; 
+  }
+  async command bool CompareA.test() { 
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfa; 
+  }
+  async command bool CompareB.test() { 
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfb; 
+  }
+  async command bool CompareC.test() { 
+    return ((Atm128_TIFR_t)call TimerCtrl.getInterruptFlag()).bits.ocfc; 
+  }
+
+  async command bool Timer.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.toie;
+  }
+  async command bool Capture.isOn()  {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.icie;
+  }
+  async command bool CompareA.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociea;
+  }
+  async command bool CompareB.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ocieb;
+  }
+  async command bool CompareC.isOn() {
+    return ((Atm128_TIMSK_t)call TimerCtrl.getInterruptMask()).bits.ociec;
+  }
+
+  //=== Read the compare registers. =====================================
+  async command uint16_t CompareA.get() { return OCR3A; }
+  async command uint16_t CompareB.get() { return OCR3B; }
+  async command uint16_t CompareC.get() { return OCR3C; }
+
+  //=== Write the compare registers. ====================================
+  async command void CompareA.set(uint16_t t) { OCR3A = t; }
+  async command void CompareB.set(uint16_t t) { OCR3B = t; }
+  async command void CompareC.set(uint16_t t) { OCR3C = t; }
+
+  //=== Read the capture registers. =====================================
+  async command uint16_t Capture.get() { return ICR3; }
+
+  //=== Write the capture registers. ====================================
+  async command void Capture.set(uint16_t t)  { ICR3 = t; }
+
+  //=== Timer interrupts signals ========================================
+  default async event void CompareA.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3A) {
+    signal CompareA.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void CompareB.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3B) {
+    signal CompareB.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void CompareC.fired() { }
+  AVR_NONATOMIC_HANDLER(SIG_OUTPUT_COMPARE3C) {
+    signal CompareC.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void Capture.captured(uint16_t time) { }
+  AVR_NONATOMIC_HANDLER(SIG_INPUT_CAPTURE3) {
+    signal Capture.captured(call Timer.get());
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void Timer.overflow() { }
+  AVR_NONATOMIC_HANDLER(SIG_OVERFLOW3) {
+    signal Timer.overflow();
+    call PlatformInterrupt.postAmble();
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm1281/HplAtm128AdcP.nc b/tos/lib/tosthreads/chips/atm1281/HplAtm128AdcP.nc
new file mode 100644
index 00000000..f160f45e
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm1281/HplAtm128AdcP.nc
@@ -0,0 +1,182 @@
+/// $Id: HplAtm128AdcP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+#include "Atm128Adc.h"
+
+/**
+ * HPL for the Atmega1281 A/D conversion susbsystem.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+module HplAtm128AdcP {
+  provides interface HplAtm128Adc;
+  uses interface McuPowerState;
+  uses interface PlatformInterrupt;
+}
+implementation {
+  //=== Direct read of HW registers. =================================
+  async command Atm128Admux_t HplAtm128Adc.getAdmux() { 
+    return *(Atm128Admux_t*)&ADMUX; 
+  }
+  async command Atm128Adcsra_t HplAtm128Adc.getAdcsra() { 
+    return *(Atm128Adcsra_t*)&ADCSRA; 
+  }
+  async command uint16_t HplAtm128Adc.getValue() { 
+    return ADC; 
+  }
+
+  DEFINE_UNION_CAST(Admux2int, Atm128Admux_t, uint8_t);
+  DEFINE_UNION_CAST(Adcsra2int, Atm128Adcsra_t, uint8_t);
+
+  //=== Direct write of HW registers. ================================
+  async command void HplAtm128Adc.setAdmux( Atm128Admux_t x ) { 
+    ADMUX = Admux2int(x); 
+  }
+  async command void HplAtm128Adc.setAdcsra( Atm128Adcsra_t x ) { 
+    ADCSRA = Adcsra2int(x); 
+  }
+
+  async command void HplAtm128Adc.setPrescaler(uint8_t scale){
+    Atm128Adcsra_t  current_val = call HplAtm128Adc.getAdcsra(); 
+    current_val.adif = FALSE;
+    current_val.adps = scale;
+    call HplAtm128Adc.setAdcsra(current_val);
+  }
+
+  // Individual bit manipulation. These all clear any pending A/D interrupt.
+  // It's not clear these are that useful...
+  async command void HplAtm128Adc.enableAdc() {
+    SET_BIT(ADCSRA, ADEN); 
+    call McuPowerState.update();
+  }
+  async command void HplAtm128Adc.disableAdc() {
+    CLR_BIT(ADCSRA, ADEN); 
+    call McuPowerState.update();
+  }
+  async command void HplAtm128Adc.enableInterruption() { SET_BIT(ADCSRA, ADIE); }
+  async command void HplAtm128Adc.disableInterruption() { CLR_BIT(ADCSRA, ADIE); }
+  async command void HplAtm128Adc.setContinuous() { 
+    ((Atm128Adcsrb_t*)&ADCSRB)->adts = 0; 
+    SET_BIT(ADCSRA, ADATE);
+  }
+  async command void HplAtm128Adc.setSingle() { CLR_BIT(ADCSRA, ADATE); }
+  async command void HplAtm128Adc.resetInterrupt() { SET_BIT(ADCSRA, ADIF); }
+  async command void HplAtm128Adc.startConversion() { SET_BIT(ADCSRA, ADSC); }
+
+
+  /* A/D status checks */
+  async command bool HplAtm128Adc.isEnabled()     {       
+    return (call HplAtm128Adc.getAdcsra()).aden; 
+  }
+
+  async command bool HplAtm128Adc.isStarted()     {
+    return (call HplAtm128Adc.getAdcsra()).adsc; 
+  }
+  
+  async command bool HplAtm128Adc.isComplete()    {
+    return (call HplAtm128Adc.getAdcsra()).adif; 
+  }
+
+  /* A/D interrupt handlers. Signals dataReady event with interrupts enabled */
+  AVR_ATOMIC_HANDLER(SIG_ADC) {
+    uint16_t data = call HplAtm128Adc.getValue();
+    
+    __nesc_enable_interrupt();
+    signal HplAtm128Adc.dataReady(data);
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void HplAtm128Adc.dataReady(uint16_t done) { }
+
+  async command bool HplAtm128Adc.cancel() { 
+    /* This is tricky */
+    atomic
+      {
+	Atm128Adcsra_t oldSr = call HplAtm128Adc.getAdcsra(), newSr;
+
+	/* To cancel a conversion, first turn off ADEN, then turn off
+	   ADSC. We also cancel any pending interrupt.
+	   Finally we reenable the ADC.
+	*/
+	newSr = oldSr;
+	newSr.aden = FALSE;
+	newSr.adif = TRUE; /* This clears a pending interrupt... */
+	newSr.adie = FALSE; /* We don't want to start sampling again at the
+			       next sleep */
+	call HplAtm128Adc.setAdcsra(newSr);
+	newSr.adsc = FALSE;
+	call HplAtm128Adc.setAdcsra(newSr);
+	newSr.aden = TRUE;
+	call HplAtm128Adc.setAdcsra(newSr);
+
+	return oldSr.adif || oldSr.adsc;
+      }
+  }
+}
diff --git a/tos/lib/tosthreads/chips/atm1281/HplAtm128Timer1C.nc b/tos/lib/tosthreads/chips/atm1281/HplAtm128Timer1C.nc
new file mode 100644
index 00000000..e5a05ae4
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm1281/HplAtm128Timer1C.nc
@@ -0,0 +1,99 @@
+/// $Id: HplAtm128Timer1C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * HPL interface to Atmega1281 timer 1.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+configuration HplAtm128Timer1C
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as Compare[uint8_t id];
+  }
+}
+implementation
+{
+  components HplAtm1281Timer1P;
+
+  Timer = HplAtm1281Timer1P;
+  TimerCtrl = HplAtm1281Timer1P;
+  Capture = HplAtm1281Timer1P;
+
+  Compare[0] = HplAtm1281Timer1P.CompareA; 
+  Compare[1] = HplAtm1281Timer1P.CompareB;
+  Compare[2] = HplAtm1281Timer1P.CompareC;
+  
+  components PlatformInterruptC;
+  HplAtm1281Timer1P.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/atm1281/HplAtm128Timer3C.nc b/tos/lib/tosthreads/chips/atm1281/HplAtm128Timer3C.nc
new file mode 100644
index 00000000..bc9d58ab
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm1281/HplAtm128Timer3C.nc
@@ -0,0 +1,99 @@
+/// $Id: HplAtm128Timer3C.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * HPL interface to Atmega1281 timer 3.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay <dgay@intel-research.net>
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+configuration HplAtm128Timer3C
+{
+  provides {
+    // 16-bit Timers
+    interface HplAtm128Timer<uint16_t>   as Timer;
+    interface HplAtm128TimerCtrl16       as TimerCtrl;
+    interface HplAtm128Capture<uint16_t> as Capture;
+    interface HplAtm128Compare<uint16_t> as Compare[uint8_t id];
+  }
+}
+implementation
+{
+  components HplAtm1281Timer3P;
+
+  Timer = HplAtm1281Timer3P;
+  TimerCtrl = HplAtm1281Timer3P;
+  Capture = HplAtm1281Timer3P;
+
+  Compare[0] = HplAtm1281Timer3P.CompareA; 
+  Compare[1] = HplAtm1281Timer3P.CompareB;
+  Compare[2] = HplAtm1281Timer3P.CompareC;
+  
+  components PlatformInterruptC;
+  HplAtm1281Timer3P.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/atm1281/HplAtm128UartP.nc b/tos/lib/tosthreads/chips/atm1281/HplAtm128UartP.nc
new file mode 100644
index 00000000..c5f6eb7d
--- /dev/null
+++ b/tos/lib/tosthreads/chips/atm1281/HplAtm128UartP.nc
@@ -0,0 +1,328 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $
+ */
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** 
+ * Private component of the Atmega1281 serial port HPL.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ * @author David Gay
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include <Atm128Uart.h>
+
+module HplAtm128UartP {
+  
+  provides interface Init as Uart0Init;
+  provides interface StdControl as Uart0TxControl;
+  provides interface StdControl as Uart0RxControl;
+  provides interface HplAtm128Uart as HplUart0;
+    
+  provides interface Init as Uart1Init;
+  provides interface StdControl as Uart1TxControl;
+  provides interface StdControl as Uart1RxControl;
+  provides interface HplAtm128Uart as HplUart1;
+  
+  uses interface Atm128Calibrate;
+  uses interface McuPowerState;
+  
+  uses interface PlatformInterrupt;
+}
+implementation {
+  
+  //=== Uart Init Commands. ====================================
+  command error_t Uart0Init.init() {
+    Atm128UartMode_t    mode;
+    Atm128UartStatus_t  stts;
+    Atm128UartControl_t ctrl;
+    uint16_t ubrr0;
+
+    ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0};
+    stts.bits = (struct Atm128_UCSRA_t) {u2x:1};
+    mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS};
+
+    ubrr0 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE);
+    UBRR0L = ubrr0;
+    UBRR0H = ubrr0 >> 8;
+    UCSR0A = stts.flat;
+    UCSR0C = mode.flat;
+    UCSR0B = ctrl.flat;
+
+    return SUCCESS;
+  }
+
+  command error_t Uart0TxControl.start() {
+    SET_BIT(UCSR0B, TXEN0);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart0TxControl.stop() {
+    CLR_BIT(UCSR0B, TXEN0);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart0RxControl.start() {
+    SET_BIT(UCSR0B, RXEN0);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart0RxControl.stop() {
+    CLR_BIT(UCSR0B, RXEN0);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart0.enableTxIntr() {
+    SET_BIT(UCSR0A, TXC0);
+    SET_BIT(UCSR0B, TXCIE0);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart0.disableTxIntr(){
+    CLR_BIT(UCSR0B, TXCIE0);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart0.enableRxIntr(){
+    SET_BIT(UCSR0B, RXCIE0);
+    return SUCCESS;
+  }
+
+  async command error_t HplUart0.disableRxIntr(){
+    CLR_BIT(UCSR0B, RXCIE0);
+    return SUCCESS;
+  }
+  
+  async command bool HplUart0.isTxEmpty(){
+    return READ_BIT(UCSR0A, TXC0);
+  }
+
+  async command bool HplUart0.isRxEmpty(){
+    return !READ_BIT(UCSR0A, RXC0);
+  }
+  
+  async command uint8_t HplUart0.rx(){
+    return UDR0;
+  }
+
+  async command void HplUart0.tx(uint8_t data) {
+    atomic{
+      UDR0 = data; 
+      SET_BIT(UCSR0A, TXC0);
+    }
+  }
+  
+  AVR_ATOMIC_HANDLER(SIG_USART0_RECV) {
+    if (READ_BIT(UCSR0A, RXC0)) {
+      signal HplUart0.rxDone(UDR0);
+    }
+    call PlatformInterrupt.postAmble();
+  }
+  
+  AVR_NONATOMIC_HANDLER(SIG_USART0_TRANS) {
+    signal HplUart0.txDone();
+    call PlatformInterrupt.postAmble();
+  }
+  
+  command error_t Uart1Init.init() {
+    Atm128UartMode_t    mode;
+    Atm128UartStatus_t  stts;
+    Atm128UartControl_t ctrl;
+    uint16_t ubrr1;
+    
+    ctrl.bits = (struct Atm128_UCSRB_t) {rxcie:0, txcie:0, rxen:0, txen:0};
+    stts.bits = (struct Atm128_UCSRA_t) {u2x:1};
+    mode.bits = (struct Atm128_UCSRC_t) {ucsz:ATM128_UART_DATA_SIZE_8_BITS};
+
+    ubrr1 = call Atm128Calibrate.baudrateRegister(PLATFORM_BAUDRATE);
+    UBRR1L = ubrr1;
+    UBRR1H = ubrr1 >> 8;
+    UCSR1A = stts.flat;
+    UCSR1C = mode.flat;
+    UCSR1B = ctrl.flat;
+
+    return SUCCESS;
+  }
+
+  command error_t Uart1TxControl.start() {
+    SET_BIT(UCSR1B, TXEN1);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart1TxControl.stop() {
+    CLR_BIT(UCSR1B, TXEN1);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart1RxControl.start() {
+    SET_BIT(UCSR1B, RXEN1);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+
+  command error_t Uart1RxControl.stop() {
+    CLR_BIT(UCSR1B, RXEN1);
+    call McuPowerState.update();
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart1.enableTxIntr() {
+    SET_BIT(UCSR1A, TXC1);
+    SET_BIT(UCSR1B, TXCIE1);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart1.disableTxIntr(){
+    CLR_BIT(UCSR1B, TXCIE1);
+    return SUCCESS;
+  }
+  
+  async command error_t HplUart1.enableRxIntr(){
+    SET_BIT(UCSR1B, RXCIE1);
+    return SUCCESS;
+  }
+
+  async command error_t HplUart1.disableRxIntr(){
+    CLR_BIT(UCSR1B, RXCIE1);
+    return SUCCESS;
+  }
+  
+  async command bool HplUart1.isTxEmpty() {
+    return READ_BIT(UCSR1A, TXC1);
+  }
+
+  async command bool HplUart1.isRxEmpty() {
+    return !READ_BIT(UCSR1A, RXC1);
+  }
+  
+  async command uint8_t HplUart1.rx(){
+    return UDR1;
+  }
+
+  async command void HplUart1.tx(uint8_t data) {
+    atomic{
+      UDR1 = data; 
+      SET_BIT(UCSR1A, TXC1);
+    }
+  }
+  
+  AVR_ATOMIC_HANDLER(SIG_USART1_RECV) {
+    if (READ_BIT(UCSR1A, RXC1))
+      signal HplUart1.rxDone(UDR1);
+    call PlatformInterrupt.postAmble();
+  }
+  
+  AVR_NONATOMIC_HANDLER(SIG_USART1_TRANS) {
+    signal HplUart1.txDone();
+    call PlatformInterrupt.postAmble();
+  }
+  
+  default async event void HplUart0.txDone() {} 
+  default async event void HplUart0.rxDone(uint8_t data) {}
+  default async event void HplUart1.txDone() {}
+  default async event void HplUart1.rxDone(uint8_t data) {}
+  
+}
diff --git a/tos/lib/tosthreads/chips/cc1000/CC1000ActiveMessageC.nc b/tos/lib/tosthreads/chips/cc1000/CC1000ActiveMessageC.nc
new file mode 100644
index 00000000..34d58d88
--- /dev/null
+++ b/tos/lib/tosthreads/chips/cc1000/CC1000ActiveMessageC.nc
@@ -0,0 +1,91 @@
+// $Id: CC1000ActiveMessageC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *
+ * The Active Message layer for the CC1000 radio. This configuration
+ * just layers the AM dispatch (CC1000ActiveMessageM) on top of the
+ * underlying CC1000 radio packet (CC1000CsmaRadioC), which is
+ * inherently an AM packet (acknowledgements based on AM destination
+ * addr and group).
+ * 
+ * @author Philip Levis
+ * @date June 19 2005
+ */
+
+configuration CC1000ActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+  }
+}
+implementation {
+
+  components CC1000ActiveMessageP as AM, CC1000CsmaRadioC as Radio;
+  components ActiveMessageAddressC as Address;
+  
+  SplitControl = Radio;
+  Packet       = Radio;
+  PacketAcknowledgements = Radio;
+  LinkPacketMetadata = Radio;
+  
+  AMSend   = AM;
+  Receive = AM.Receive;
+  ReceiveDefault = AM.ReceiveDefault;
+  Snoop = AM.Snoop;
+  SnoopDefault = AM.SnoopDefault;
+  AMPacket = AM;
+
+  AM.SubSend    -> Radio.Send;
+  AM.SubReceive -> Radio.Receive;
+  AM.amAddress -> Address;
+  AM.Packet     -> Radio;
+  
+}
diff --git a/tos/lib/tosthreads/chips/cc1000/CC1000ActiveMessageP.nc b/tos/lib/tosthreads/chips/cc1000/CC1000ActiveMessageP.nc
new file mode 100644
index 00000000..24685af8
--- /dev/null
+++ b/tos/lib/tosthreads/chips/cc1000/CC1000ActiveMessageP.nc
@@ -0,0 +1,192 @@
+// $Id: CC1000ActiveMessageP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Implementation component for CC1000ActiveMessageC.
+ *
+ * @author Philip Levis
+ * @date June 19 2006
+ */
+
+module CC1000ActiveMessageP @safe() {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+    interface AMPacket;
+  }
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    interface Packet as Packet;
+    command am_addr_t amAddress();
+  }
+}
+implementation {
+
+  cc1000_header_t* ONE getHeader(message_t* ONE amsg) {
+    return TCAST(cc1000_header_t* ONE, (uint8_t*)amsg + offsetof(message_t, data) - sizeof(cc1000_header_t));
+  }
+
+  cc1000_footer_t *getFooter(message_t *amsg) {
+    return (cc1000_footer_t *)(amsg->footer);
+  }
+  
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+					  message_t* amsg,
+					  uint8_t len) {
+    cc1000_header_t* header = getHeader(amsg);
+    header->type = id;
+    header->dest = addr;
+    header->source = call AMPacket.address();
+    header->group = TOS_AM_GROUP;
+    return call SubSend.send(amsg, len);
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  /* Receiving a packet */
+
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    cc1000_footer_t* msg_footer = getFooter(msg);
+    if(msg_footer->crc == 1) {
+      if (call AMPacket.isForMe(msg)) {
+        return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len);
+      }
+      else {
+        return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len);
+      }
+    }
+    return msg;
+  }
+  
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    cc1000_header_t* header = getHeader(amsg);
+    return header->dest;
+  }
+
+  command am_addr_t AMPacket.source(message_t* amsg) {
+    cc1000_header_t* header = getHeader(amsg);
+    return header->source;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    cc1000_header_t* header = getHeader(amsg);
+    header->dest = addr;
+  }
+
+  command void AMPacket.setSource(message_t* amsg, am_addr_t addr) {
+    cc1000_header_t* header = getHeader(amsg);
+    header->source = addr;
+  }
+  
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+	    call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    cc1000_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t type) {
+    cc1000_header_t* header = getHeader(amsg);
+    header->type = type;
+  }
+  
+  command void AMPacket.setGroup(message_t* msg, am_group_t group) {
+    cc1000_header_t* header = getHeader(msg);
+    header->group = group;
+  }
+
+  command am_group_t AMPacket.group(message_t* msg) {
+    cc1000_header_t* header = getHeader(msg);
+    return header->group;
+  }
+
+  command am_group_t AMPacket.localGroup() {
+    return TOS_AM_GROUP;
+  }
+  
+  default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return signal ReceiveDefault.receive[id](msg, payload, len);
+  }
+
+  default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return signal SnoopDefault.receive[id](msg, payload, len);
+  }
+
+  default event message_t* SnoopDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+  default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+    return;
+  }
+
+  
+
+}
diff --git a/tos/lib/tosthreads/chips/cc2420/CC2420ActiveMessageC.nc b/tos/lib/tosthreads/chips/cc2420/CC2420ActiveMessageC.nc
new file mode 100644
index 00000000..49944cad
--- /dev/null
+++ b/tos/lib/tosthreads/chips/cc2420/CC2420ActiveMessageC.nc
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The Active Message layer for the CC2420 radio. This configuration
+ * just layers the AM dispatch (CC2420ActiveMessageM) on top of the
+ * underlying CC2420 radio packet (CC2420CsmaCsmaCC), which is
+ * inherently an AM packet (acknowledgements based on AM destination
+ * addr and group). Note that snooping may not work, due to CC2420
+ * early packet rejection if acknowledgements are enabled.
+ *
+ * @author Philip Levis
+ * @author David Moss
+ * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:51 $
+ */
+
+#include "CC2420.h"
+#include "AM.h"
+#include "Ieee154.h"
+
+#ifdef IEEE154FRAMES_ENABLED
+#error "CC2420 AM layer cannot work when IEEE 802.15.4 frames only are used"
+#endif
+
+configuration CC2420ActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface CC2420Packet;
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+    interface RadioBackoff[am_id_t amId];
+    interface LowPowerListening;
+    interface PacketLink;
+    interface SendNotifier[am_id_t amId];
+  }
+}
+implementation {
+  enum {
+    CC2420_AM_SEND_ID     = unique(IEEE154_SEND_CLIENT),
+  };
+
+  components CC2420RadioC as Radio;
+  components CC2420ActiveMessageP as AM;
+  components ActiveMessageAddressC;
+  components CC2420CsmaC as CsmaC;
+  components CC2420ControlC;
+  components CC2420PacketC;
+  
+  SplitControl = Radio;
+  RadioBackoff = AM;
+  Packet = AM;
+  AMSend = AM;
+  SendNotifier = AM;
+  Receive = AM.Receive;
+  ReceiveDefault = AM.ReceiveDefault;
+  Snoop = AM.Snoop;
+  SnoopDefault = AM.SnoopDefault;
+  AMPacket = AM;
+  PacketLink = Radio;
+  LowPowerListening = Radio;
+  CC2420Packet = Radio;
+  PacketAcknowledgements = Radio;
+  LinkPacketMetadata = Radio;
+  
+  // Radio resource for the AM layer
+  AM.RadioResource -> Radio.Resource[CC2420_AM_SEND_ID];
+  AM.SubSend -> Radio.ActiveSend;
+  AM.SubReceive -> Radio.ActiveReceive;
+
+  AM.ActiveMessageAddress -> ActiveMessageAddressC;
+  AM.CC2420Packet -> CC2420PacketC;
+  AM.CC2420PacketBody -> CC2420PacketC;
+  AM.CC2420Config -> CC2420ControlC;
+  
+  AM.SubBackoff -> CsmaC;
+
+  components LedsC;
+  AM.Leds -> LedsC;
+}
+
+
diff --git a/tos/lib/tosthreads/chips/cc2420/CC2420ActiveMessageP.nc b/tos/lib/tosthreads/chips/cc2420/CC2420ActiveMessageP.nc
new file mode 100644
index 00000000..94c86a44
--- /dev/null
+++ b/tos/lib/tosthreads/chips/cc2420/CC2420ActiveMessageP.nc
@@ -0,0 +1,314 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ * Active message implementation on top of the CC2420 radio. This
+ * implementation uses the 16-bit addressing mode of 802.15.4: the
+ * only additional byte it adds is the AM id byte, as the first byte
+ * of the data payload.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:51 $
+ */
+ 
+#include "CC2420.h"
+
+module CC2420ActiveMessageP @safe() {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface SendNotifier[am_id_t id];
+    interface RadioBackoff[am_id_t id];
+  }
+  
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    interface CC2420Packet;
+    interface CC2420PacketBody;
+    interface CC2420Config;
+    interface ActiveMessageAddress;
+    interface RadioBackoff as SubBackoff;
+
+    interface Resource as RadioResource;
+    interface Leds;
+  }
+}
+implementation {
+  uint16_t pending_length;
+  message_t *pending_message = NULL;
+  /***************** Resource event  ****************/
+  event void RadioResource.granted() {
+    uint8_t rc;
+    cc2420_header_t* header = call CC2420PacketBody.getHeader( pending_message );
+
+    signal SendNotifier.aboutToSend[header->type](header->dest, pending_message);
+    rc = call SubSend.send( pending_message, pending_length );
+    if (rc != SUCCESS) {
+      call RadioResource.release();
+      signal AMSend.sendDone[header->type]( pending_message, rc );
+    }
+  }
+
+  /***************** AMSend Commands ****************/
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+					  message_t* msg,
+					  uint8_t len) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader( msg );
+    
+    if (len > call Packet.maxPayloadLength()) {
+      return ESIZE;
+    }
+    
+    header->type = id;
+    header->dest = addr;
+    header->destpan = call CC2420Config.getPanAddr();
+    header->src = call AMPacket.address();
+    header->fcf = ( 1 << IEEE154_FCF_INTRAPAN ) |
+      ( IEEE154_ADDR_SHORT << IEEE154_FCF_DEST_ADDR_MODE ) |
+      ( IEEE154_ADDR_SHORT << IEEE154_FCF_SRC_ADDR_MODE ) ;
+    header->length = len + CC2420_SIZE;
+    
+    if (call RadioResource.immediateRequest() == SUCCESS) {
+      error_t rc;
+      signal SendNotifier.aboutToSend[id](addr, msg);
+      
+      rc = call SubSend.send( msg, len );
+      if (rc != SUCCESS) {
+        call RadioResource.release();
+      }
+
+      return rc;
+    } else {
+      pending_length  = len;
+      pending_message = msg;
+      return call RadioResource.request();
+    }
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  /***************** AMPacket Commands ****************/
+  command am_addr_t AMPacket.address() {
+    return call ActiveMessageAddress.amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg);
+    return header->dest;
+  }
+ 
+  command am_addr_t AMPacket.source(message_t* amsg) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg);
+    return header->src;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg);
+    header->dest = addr;
+  }
+
+  command void AMPacket.setSource(message_t* amsg, am_addr_t addr) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg);
+    header->src = addr;
+  }
+
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+	    call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t type) {
+    cc2420_header_t* header = call CC2420PacketBody.getHeader(amsg);
+    header->type = type;
+  }
+  
+  command am_group_t AMPacket.group(message_t* amsg) {
+    return (call CC2420PacketBody.getHeader(amsg))->destpan;
+  }
+
+  command void AMPacket.setGroup(message_t* amsg, am_group_t grp) {
+    // Overridden intentionally when we send()
+    (call CC2420PacketBody.getHeader(amsg))->destpan = grp;
+  }
+
+  command am_group_t AMPacket.localGroup() {
+    return call CC2420Config.getPanAddr();
+  }
+  
+
+  /***************** Packet Commands ****************/
+  command void Packet.clear(message_t* msg) {
+    memset(call CC2420PacketBody.getHeader(msg), 0x0, sizeof(cc2420_header_t));
+    memset(call CC2420PacketBody.getMetadata(msg), 0x0, sizeof(cc2420_metadata_t));
+  }
+  
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return (call CC2420PacketBody.getHeader(msg))->length - CC2420_SIZE;
+  }
+  
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    (call CC2420PacketBody.getHeader(msg))->length  = len + CC2420_SIZE;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return call SubSend.maxPayloadLength();
+  }
+  
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    return call SubSend.getPayload(msg, len);
+  }
+
+  
+  /***************** SubSend Events ****************/
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    call RadioResource.release();
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+  
+  /***************** SubReceive Events ****************/
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    
+    if (call AMPacket.isForMe(msg)) {
+      return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+    else {
+      return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+  }
+  
+
+  /***************** ActiveMessageAddress Events ****************/
+  async event void ActiveMessageAddress.changed() {
+  }
+  
+  /***************** CC2420Config Events ****************/
+  event void CC2420Config.syncDone( error_t error ) {
+  }
+  
+  
+  /***************** RadioBackoff ***********************/
+
+  async event void SubBackoff.requestInitialBackoff(message_t *msg) {
+    signal RadioBackoff.requestInitialBackoff[(TCAST(cc2420_header_t* ONE,
+        (uint8_t*)msg + offsetof(message_t, data) - sizeof(cc2420_header_t)))->type](msg);
+  }
+
+  async event void SubBackoff.requestCongestionBackoff(message_t *msg) {
+    signal RadioBackoff.requestCongestionBackoff[(TCAST(cc2420_header_t* ONE,
+        (uint8_t*)msg + offsetof(message_t, data) - sizeof(cc2420_header_t)))->type](msg);
+  }
+  async event void SubBackoff.requestCca(message_t *msg) {
+    // Lower layers than this do not configure the CCA settings
+    signal RadioBackoff.requestCca[(TCAST(cc2420_header_t* ONE,
+        (uint8_t*)msg + offsetof(message_t, data) - sizeof(cc2420_header_t)))->type](msg);
+  }
+
+  async command void RadioBackoff.setInitialBackoff[am_id_t amId](uint16_t backoffTime) {
+    call SubBackoff.setInitialBackoff(backoffTime);
+  }
+  
+  /**
+   * Must be called within a requestCongestionBackoff event
+   * @param backoffTime the amount of time in some unspecified units to backoff
+   */
+  async command void RadioBackoff.setCongestionBackoff[am_id_t amId](uint16_t backoffTime) {
+    call SubBackoff.setCongestionBackoff(backoffTime);
+  }
+
+      
+  /**
+   * Enable CCA for the outbound packet.  Must be called within a requestCca
+   * event
+   * @param ccaOn TRUE to enable CCA, which is the default.
+   */
+  async command void RadioBackoff.setCca[am_id_t amId](bool useCca) {
+    call SubBackoff.setCca(useCca);
+  }
+  
+  /***************** Defaults ****************/
+  default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return signal ReceiveDefault.receive[id](msg, payload, len);
+  }
+
+  default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return signal SnoopDefault.receive[id](msg, payload, len);
+  }
+
+  default event message_t* SnoopDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+  default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+    call RadioResource.release();
+  }
+
+  default event void SendNotifier.aboutToSend[am_id_t amId](am_addr_t addr, message_t *msg) {
+  }
+  default async event void RadioBackoff.requestInitialBackoff[am_id_t id](
+      message_t *msg) {
+  }
+
+  default async event void RadioBackoff.requestCongestionBackoff[am_id_t id](
+      message_t *msg) {
+  }
+  
+  default async event void RadioBackoff.requestCca[am_id_t id](
+      message_t *msg) {
+  }
+  
+}
diff --git a/tos/lib/tosthreads/chips/m16c62p/chip_thread.h b/tos/lib/tosthreads/chips/m16c62p/chip_thread.h
new file mode 100644
index 00000000..44424321
--- /dev/null
+++ b/tos/lib/tosthreads/chips/m16c62p/chip_thread.h
@@ -0,0 +1,176 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This file contains M16c/62p mcu-specific routines for implementing
+ * threads in TinyOS
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+typedef struct thread_regs {
+  uint16_t r0;
+  uint16_t r1;
+  uint16_t r2;
+  uint16_t r3;
+  uint16_t a0;
+  uint16_t a1;
+  uint16_t fb;
+  uint16_t flg;
+  uint16_t mem0;
+  uint16_t mem2;
+  uint16_t mem4;
+  uint16_t mem6;
+  uint16_t mem8;
+  uint16_t mem10;
+  uint16_t mem12;
+  uint16_t mem14;
+} thread_regs_t;
+
+/**
+ * Memory is addressed by 16 bits on M16c/62p but because
+ * is can be addressed in 8 bit units we typedef the
+ * stack pointer as a uint8_t.
+ */
+typedef uint8_t* stack_ptr_t;
+  
+#define STACK_TOP(stack, size)    \
+  (&(((uint8_t*)stack)[size - 1]))
+  
+//Save stack pointer
+#define SAVE_STACK_PTR(t)            		  		\
+  asm volatile ("stc sp, %0": "=r"(t->stack_ptr));
+
+//Save status register
+#define SAVE_STATUS(t)                   	  		\
+   asm volatile ("stc flg, %0": "=r"(t->regs.flg));
+  
+//Save General Purpose Registers
+#define SAVE_GPR(t)                        			    \
+ asm volatile ("mov.w r0, %0 \n\t" : "=r" ((t)->regs.r0) : );   \
+ asm volatile ("mov.w r1, %0 \n\t" : "=r" ((t)->regs.r1) : );   \
+ asm volatile ("mov.w r2, %0 \n\t" : "=r" ((t)->regs.r2) : );   \
+ asm volatile ("mov.w r3, %0 \n\t" : "=r" ((t)->regs.r3) : );   \
+ asm volatile ("mov.w a0, %0 \n\t" : "=r" ((t)->regs.a0) : );   \
+ asm volatile ("mov.w a1, %0 \n\t" : "=r" ((t)->regs.a1) : );   \
+ asm volatile ("stc fb, %0 \n\t" : "=r" ((t)->regs.fb) : ); \
+ asm volatile ("mov.w mem0, %0 \n\t" : "=r" ((t)->regs.mem0) : );  \
+ asm volatile ("mov.w mem2, %0 \n\t" : "=r" ((t)->regs.mem2) : );  \
+ asm volatile ("mov.w mem4, %0 \n\t" : "=r" ((t)->regs.mem4) : );  \
+ asm volatile ("mov.w mem6, %0 \n\t" : "=r" ((t)->regs.mem6) : );  \
+ asm volatile ("mov.w mem8, %0 \n\t" : "=r" ((t)->regs.mem8) : );  \
+ asm volatile ("mov.w mem10, %0 \n\t" : "=r" ((t)->regs.mem10) : );  \
+ asm volatile ("mov.w mem12, %0 \n\t" : "=r" ((t)->regs.mem12) : );  \
+ asm volatile ("mov.w mem14, %0 \n\t" : "=r" ((t)->regs.mem14) : );  
+  
+//Restore stack pointer
+#define RESTORE_STACK_PTR(t)           			 	 \
+  asm volatile ("ldc %0, sp \n\t" :: "r" ((t)->stack_ptr))
+
+//Restore status register
+#define RESTORE_STATUS(t)                 			\
+  asm volatile ("ldc %0, flg \n\t" :: "r" (t->regs.flg) ); 
+
+//Restore the general purpose registers
+#define RESTORE_GPR(t)           	         		     \
+ asm volatile ("mov.w %0, r0 \n\t" :: "r" ((t)->regs.r0)  );   \
+ asm volatile ("mov.w %0, r1 \n\t" :: "r" ((t)->regs.r1)  );   \
+ asm volatile ("mov.w %0, r2 \n\t" :: "r" ((t)->regs.r2)  );   \
+ asm volatile ("mov.w %0, r3 \n\t" :: "r" ((t)->regs.r3)  );   \
+ asm volatile ("mov.w %0, a0 \n\t" :: "r" ((t)->regs.a0)  );   \
+ asm volatile ("mov.w %0, a1 \n\t" :: "r" ((t)->regs.a1)  );   \
+ asm volatile ("ldc %0, fb \n\t" :: "r" ((t)->regs.fb)  ); \
+ asm volatile ("mov.w %0, mem0 \n\t" :: "r" ((t)->regs.mem0)  );   \
+ asm volatile ("mov.w %0, mem2 \n\t" :: "r" ((t)->regs.mem2)  );   \
+ asm volatile ("mov.w %0, mem4 \n\t" :: "r" ((t)->regs.mem4)  );   \
+ asm volatile ("mov.w %0, mem6 \n\t" :: "r" ((t)->regs.mem6)  );   \
+ asm volatile ("mov.w %0, mem8 \n\t" :: "r" ((t)->regs.mem8)  );   \
+ asm volatile ("mov.w %0, mem10 \n\t" :: "r" ((t)->regs.mem10)  );   \
+ asm volatile ("mov.w %0, mem12 \n\t" :: "r" ((t)->regs.mem12)  );   \
+ asm volatile ("mov.w %0, mem14 \n\t" :: "r" ((t)->regs.mem14)  );   
+  
+#define SAVE_TCB(t) \
+  SAVE_GPR(t);	 	\
+  SAVE_STATUS(t);	\
+  SAVE_STACK_PTR(t) 
+  
+#define RESTORE_TCB(t)  \
+  RESTORE_STACK_PTR(t); \
+  RESTORE_STATUS(t);    \
+  RESTORE_GPR(t)
+  
+#define SWITCH_CONTEXTS(from, to) \
+  SAVE_TCB(from);				  \
+  RESTORE_TCB(to)
+
+#define PREPARE_THREAD(t, start_function)		               \
+  t->stack_ptr[0] = 0; \
+  t->stack_ptr[-1] = (uint8_t)((uint16_t)&start_function >> 8) & 0xFF; \
+  t->stack_ptr[-2] = (uint8_t)((uint16_t)&start_function) & 0xFF; \
+  t->stack_ptr -= 2; \
+  SAVE_STATUS(t) 
diff --git a/tos/lib/tosthreads/chips/msp430/HplAdc12P.nc b/tos/lib/tosthreads/chips/msp430/HplAdc12P.nc
new file mode 100644
index 00000000..33e07478
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/HplAdc12P.nc
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-06-12 14:02:24 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * The HplAdc12 interface exports low-level access to the ADC12 registers
+ * of the MSP430 MCU.
+ *
+ * @author Jan Hauer
+ * @see  Please refer to TEP 101 for more information about this component and its
+ *          intended use.
+ */
+
+module HplAdc12P {
+  provides interface HplAdc12;
+  uses interface PlatformInterrupt;
+}
+implementation
+{
+ 
+  MSP430REG_NORACE(ADC12CTL0);
+  MSP430REG_NORACE(ADC12CTL1);
+  MSP430REG_NORACE(ADC12IFG);
+  MSP430REG_NORACE(ADC12IE);
+  MSP430REG_NORACE(ADC12IV);
+
+  // SFRs are accessed directly or cast to a pointer, both works fine
+  // (we don't access all SFRs directly, because that would result in
+  // much higher memory footprint)
+  
+  async command void HplAdc12.setCtl0(adc12ctl0_t control0){
+    ADC12CTL0 = *((uint16_t*) &control0); 
+  }
+  
+  async command void HplAdc12.setCtl1(adc12ctl1_t control1){
+    ADC12CTL1 = *((uint16_t*) &control1); 
+  }
+  
+  async command adc12ctl0_t HplAdc12.getCtl0(){ 
+    return *((adc12ctl0_t*) &ADC12CTL0); 
+  }
+  
+  async command adc12ctl1_t HplAdc12.getCtl1(){
+    return *((adc12ctl1_t*) &ADC12CTL1); 
+  }
+  
+  async command void HplAdc12.setMCtl(uint8_t i, adc12memctl_t memControl){
+    uint8_t *memCtlPtr = (uint8_t*) ADC12MCTL;
+    memCtlPtr += i;
+    *memCtlPtr = *(uint8_t*)&memControl; 
+  }
+   
+  async command adc12memctl_t HplAdc12.getMCtl(uint8_t i){
+    adc12memctl_t x = {inch: 0, sref: 0, eos: 0 };    
+    uint8_t *memCtlPtr = (uint8_t*) ADC12MCTL;
+    memCtlPtr += i;
+    x = *(adc12memctl_t*) memCtlPtr;
+    return x;
+  }  
+  
+  async command uint16_t HplAdc12.getMem(uint8_t i){
+    return *((uint16_t*) ADC12MEM + i);
+  }
+
+  async command void HplAdc12.setIEFlags(uint16_t mask){ ADC12IE = mask; } 
+  async command uint16_t HplAdc12.getIEFlags(){ return (uint16_t) ADC12IE; } 
+  
+  async command void HplAdc12.resetIFGs(){ 
+    ADC12IV = 0; 
+    ADC12IFG = 0;
+  } 
+  
+  async command void HplAdc12.startConversion(){ 
+    ADC12CTL0 |= ADC12ON; 
+    ADC12CTL0 |= (ADC12SC + ENC); 
+  }
+  
+  async command void HplAdc12.stopConversion(){
+    // stop conversion mode immediately, conversion data is unreliable
+    ADC12CTL1 &= ~(CONSEQ0 | CONSEQ1);
+    ADC12CTL0 &= ~(ADC12SC + ENC); 
+    ADC12CTL0 &= ~(ADC12ON); 
+  }
+  
+  async command void HplAdc12.enableConversion(){ 
+    ADC12CTL0 |= ENC; 
+  }
+    
+  async command bool HplAdc12.isBusy(){ return ADC12CTL1 & ADC12BUSY; }
+
+  TOSH_SIGNAL(ADC_VECTOR) {
+    signal HplAdc12.conversionDone(ADC12IV);
+    call PlatformInterrupt.postAmble();
+  }
+}
+
diff --git a/tos/lib/tosthreads/chips/msp430/HplMsp430DmaC.nc b/tos/lib/tosthreads/chips/msp430/HplMsp430DmaC.nc
new file mode 100644
index 00000000..8f7e0167
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/HplMsp430DmaC.nc
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $
+ */
+
+configuration HplMsp430DmaC {
+
+  provides interface HplMsp430DmaControl as Control;
+  provides interface HplMsp430DmaChannel as Channel0;
+  provides interface HplMsp430DmaChannel as Channel1;
+  provides interface HplMsp430DmaChannel as Channel2;
+
+}
+
+implementation {
+
+  components HplMsp430DmaP;
+  components new HplMsp430DmaXP( DMA0CTL_, DMA0SA_, DMA0DA_,
+				 DMA0SZ_, DMA0TSEL_MASK, 
+				 DMA0TSEL_SHIFT ) as Dma0;
+  components new HplMsp430DmaXP( DMA1CTL_, DMA1SA_, DMA1DA_,
+				 DMA1SZ_, DMA1TSEL_MASK, 
+				 DMA1TSEL_SHIFT ) as Dma1;
+  components new HplMsp430DmaXP( DMA2CTL_, DMA2SA_, DMA2DA_,
+				 DMA2SZ_, DMA2TSEL_MASK, 
+				 DMA2TSEL_SHIFT ) as Dma2;
+
+  Control = HplMsp430DmaP;
+  Channel0 = Dma0;
+  Channel1 = Dma1;
+  Channel2 = Dma2;
+  Dma0.Interrupt -> HplMsp430DmaP;
+  Dma1.Interrupt -> HplMsp430DmaP;
+  Dma2.Interrupt -> HplMsp430DmaP;
+
+  components PlatformInterruptC;
+  HplMsp430DmaP.PlatformInterrupt -> PlatformInterruptC;
+}
+
diff --git a/tos/lib/tosthreads/chips/msp430/HplMsp430DmaP.nc b/tos/lib/tosthreads/chips/msp430/HplMsp430DmaP.nc
new file mode 100644
index 00000000..3b8631ee
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/HplMsp430DmaP.nc
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Ben Greenstein <ben@cs.ucla.edu>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Joe Polastre <info@moteiv.com>
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $
+ */
+
+module HplMsp430DmaP {
+
+  provides interface HplMsp430DmaControl as DmaControl;
+  provides interface HplMsp430DmaInterrupt as Interrupt;
+  uses interface PlatformInterrupt;
+}
+
+implementation {
+
+  MSP430REG_NORACE( DMACTL0 );
+  MSP430REG_NORACE( DMACTL1 );
+
+  TOSH_SIGNAL( DACDMA_VECTOR ) {
+    signal Interrupt.fired();
+    call PlatformInterrupt.postAmble();
+  }
+
+  async command void DmaControl.setOnFetch(){
+    DMACTL1 |= DMAONFETCH;
+  }
+
+  async command void DmaControl.clearOnFetch(){
+    DMACTL1 &= ~DMAONFETCH;
+  }
+
+  async command void DmaControl.setRoundRobin(){
+    DMACTL1 |= ROUNDROBIN;
+  }
+  async command void DmaControl.clearRoundRobin(){
+    DMACTL1 &= ~ROUNDROBIN;
+  }
+
+  async command void DmaControl.setENNMI(){
+    DMACTL1 |= ENNMI;
+  }
+
+  async command void DmaControl.clearENNMI(){
+    DMACTL1 &= ~ENNMI;
+  }
+
+  async command void DmaControl.setState(dma_state_t s){
+    DMACTL1 = *(int*)&s;
+  }
+
+  async command dma_state_t DmaControl.getState(){
+    dma_state_t s;
+    s = *(dma_state_t*)&DMACTL1;
+    return s;
+  }
+
+  async command void DmaControl.reset(){
+    DMACTL0 = 0;
+    DMACTL1 = 0;
+  }
+
+}
+
diff --git a/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptC.nc b/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptC.nc
new file mode 100644
index 00000000..2147d17f
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptC.nc
@@ -0,0 +1,88 @@
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL for the TI MSP430 family of microprocessors. This provides an
+ * abstraction for GPIO interrupts.
+ *
+ * @author Joe Polastre
+ */
+configuration HplMsp430InterruptC
+{
+#ifdef __msp430_have_port1
+  provides interface HplMsp430Interrupt as Port10;
+  provides interface HplMsp430Interrupt as Port11;
+  provides interface HplMsp430Interrupt as Port12;
+  provides interface HplMsp430Interrupt as Port13;
+  provides interface HplMsp430Interrupt as Port14;
+  provides interface HplMsp430Interrupt as Port15;
+  provides interface HplMsp430Interrupt as Port16;
+  provides interface HplMsp430Interrupt as Port17;
+#endif
+#ifdef __msp430_have_port2
+  provides interface HplMsp430Interrupt as Port20;
+  provides interface HplMsp430Interrupt as Port21;
+  provides interface HplMsp430Interrupt as Port22;
+  provides interface HplMsp430Interrupt as Port23;
+  provides interface HplMsp430Interrupt as Port24;
+  provides interface HplMsp430Interrupt as Port25;
+  provides interface HplMsp430Interrupt as Port26;
+  provides interface HplMsp430Interrupt as Port27;
+#endif
+}
+implementation
+{
+  components HplMsp430InterruptP as HplInterruptP;
+#ifdef __msp430_have_port1
+  Port10 = HplInterruptP.Port10;
+  Port11 = HplInterruptP.Port11;
+  Port12 = HplInterruptP.Port12;
+  Port13 = HplInterruptP.Port13;
+  Port14 = HplInterruptP.Port14;
+  Port15 = HplInterruptP.Port15;
+  Port16 = HplInterruptP.Port16;
+  Port17 = HplInterruptP.Port17;
+#endif
+#ifdef __msp430_have_port2
+  Port20 = HplInterruptP.Port20;
+  Port21 = HplInterruptP.Port21;
+  Port22 = HplInterruptP.Port22;
+  Port23 = HplInterruptP.Port23;
+  Port24 = HplInterruptP.Port24;
+  Port25 = HplInterruptP.Port25;
+  Port26 = HplInterruptP.Port26;
+  Port27 = HplInterruptP.Port27;
+#endif
+
+  components PlatformInterruptC;
+  HplInterruptP.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptNMIC.nc b/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptNMIC.nc
new file mode 100644
index 00000000..63294c21
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptNMIC.nc
@@ -0,0 +1,55 @@
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HPL for the TI MSP430 family of microprocessors. This provides an
+ * abstraction for non-maskable interrupts.
+ *
+ * @author Joe Polastre
+ */
+configuration HplMsp430InterruptNMIC
+{
+  provides interface HplMsp430Interrupt as NMI;
+  provides interface HplMsp430Interrupt as OF;
+  provides interface HplMsp430Interrupt as ACCV;
+}
+implementation
+{
+  components HplMsp430InterruptNMIP as HplInterruptP;
+
+  NMI = HplInterruptP.NMI;
+  OF = HplInterruptP.OF;
+  ACCV = HplInterruptP.ACCV;
+  
+  components PlatformInterruptC;
+  HplInterruptP.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptNMIP.nc b/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptNMIP.nc
new file mode 100644
index 00000000..8d782ace
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptNMIP.nc
@@ -0,0 +1,106 @@
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ */
+module HplMsp430InterruptNMIP
+{
+  provides interface HplMsp430Interrupt as NMI;
+  provides interface HplMsp430Interrupt as OF;
+  provides interface HplMsp430Interrupt as ACCV;
+  uses interface PlatformInterrupt;
+}
+implementation
+{
+  TOSH_SIGNAL(NMI_VECTOR)
+  {
+    volatile int n = IFG1;
+    if (n & NMIIFG) { signal NMI.fired(); }
+    else if (n & OFIFG)  { signal OF.fired(); }
+    else if (FCTL3 & ACCVIFG) { signal ACCV.fired(); }
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void NMI.fired() { call NMI.clear(); }
+  default async event void OF.fired() { call OF.clear(); }
+  default async event void ACCV.fired() { call ACCV.clear(); }
+
+  async command void NMI.enable() {
+    volatile uint16_t _watchdog;
+    atomic {
+      _watchdog = WDTCTL;
+      _watchdog = WDTPW | (_watchdog & 0x0FF);
+      _watchdog |= WDTNMI;
+      WDTCTL = _watchdog;
+      IE1 |= NMIIE;
+    }
+  }
+  async command void OF.enable() { atomic IE1 |= OFIE; }
+  async command void ACCV.enable() { atomic IE1 |= ACCVIE; }
+
+  async command void NMI.disable() {
+    volatile uint16_t _watchdog;
+    atomic {
+      _watchdog = WDTCTL;
+      _watchdog = WDTPW | (_watchdog & 0x0FF);
+      _watchdog &= ~WDTNMI;
+      WDTCTL = _watchdog;
+      IE1 &= ~NMIIE;
+    }
+  }
+  async command void OF.disable() { atomic IE1 &= ~OFIE; }
+  async command void ACCV.disable() { atomic IE1 &= ~ACCVIE; }
+
+  async command void NMI.clear() { atomic IFG1 &= ~NMIIFG; }
+  async command void OF.clear() { atomic IFG1 &= ~OFIFG; }
+  async command void ACCV.clear() { atomic FCTL3 &= ~ACCVIFG; }
+
+  async command bool NMI.getValue() { bool b; atomic b=(IFG1 & NMIIFG) & 0x01; return b; }
+  async command bool OF.getValue() { bool b; atomic b=(IFG1 & OFIFG) & 0x01; return b; }
+  async command bool ACCV.getValue() { bool b; atomic b=(FCTL3 & ACCVIFG) & 0x01; return b; }
+
+  async command void NMI.edge(bool l2h) { 
+    volatile uint16_t _watchdog;
+    atomic {
+      _watchdog = WDTCTL;
+      _watchdog = WDTPW | (_watchdog & 0x0FF);
+      if (l2h)  _watchdog &= ~(WDTNMIES); 
+      else      _watchdog |=  (WDTNMIES);
+      WDTCTL = _watchdog;
+    }
+  }
+  // edge does not apply to oscillator faults
+  async command void OF.edge(bool l2h) { }
+  // edge does not apply to flash access violations
+  async command void ACCV.edge(bool l2h) { }
+}
diff --git a/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptP.nc b/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptP.nc
new file mode 100644
index 00000000..226ecc83
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/HplMsp430InterruptP.nc
@@ -0,0 +1,275 @@
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ */
+module HplMsp430InterruptP
+{
+#ifdef __msp430_have_port1
+  provides interface HplMsp430Interrupt as Port10;
+  provides interface HplMsp430Interrupt as Port11;
+  provides interface HplMsp430Interrupt as Port12;
+  provides interface HplMsp430Interrupt as Port13;
+  provides interface HplMsp430Interrupt as Port14;
+  provides interface HplMsp430Interrupt as Port15;
+  provides interface HplMsp430Interrupt as Port16;
+  provides interface HplMsp430Interrupt as Port17;
+#endif
+#ifdef __msp430_have_port2
+  provides interface HplMsp430Interrupt as Port20;
+  provides interface HplMsp430Interrupt as Port21;
+  provides interface HplMsp430Interrupt as Port22;
+  provides interface HplMsp430Interrupt as Port23;
+  provides interface HplMsp430Interrupt as Port24;
+  provides interface HplMsp430Interrupt as Port25;
+  provides interface HplMsp430Interrupt as Port26;
+  provides interface HplMsp430Interrupt as Port27;
+#endif
+  uses interface PlatformInterrupt;
+}
+implementation
+{
+
+#ifdef __msp430_have_port1
+  TOSH_SIGNAL(PORT1_VECTOR)
+  {
+    volatile int n = P1IFG & P1IE;
+
+    if (n & (1 << 0)) { signal Port10.fired(); }
+    else if (n & (1 << 1)) { signal Port11.fired(); }
+    else if (n & (1 << 2)) { signal Port12.fired(); }
+    else if (n & (1 << 3)) { signal Port13.fired(); }
+    else if (n & (1 << 4)) { signal Port14.fired(); }
+    else if (n & (1 << 5)) { signal Port15.fired(); }
+    else if (n & (1 << 6)) { signal Port16.fired(); }
+    else if (n & (1 << 7)) { signal Port17.fired(); }
+    call PlatformInterrupt.postAmble();
+  }
+
+  default async event void Port10.fired() { call Port10.clear(); }
+  default async event void Port11.fired() { call Port11.clear(); }
+  default async event void Port12.fired() { call Port12.clear(); }
+  default async event void Port13.fired() { call Port13.clear(); }
+  default async event void Port14.fired() { call Port14.clear(); }
+  default async event void Port15.fired() { call Port15.clear(); }
+  default async event void Port16.fired() { call Port16.clear(); }
+  default async event void Port17.fired() { call Port17.clear(); }
+  async command void Port10.enable() { P1IE |= (1 << 0); }
+  async command void Port11.enable() { P1IE |= (1 << 1); }
+  async command void Port12.enable() { P1IE |= (1 << 2); }
+  async command void Port13.enable() { P1IE |= (1 << 3); }
+  async command void Port14.enable() { P1IE |= (1 << 4); }
+  async command void Port15.enable() { P1IE |= (1 << 5); }
+  async command void Port16.enable() { P1IE |= (1 << 6); }
+  async command void Port17.enable() { P1IE |= (1 << 7); }
+  async command void Port10.disable() { P1IE &= ~(1 << 0); }
+  async command void Port11.disable() { P1IE &= ~(1 << 1); }
+  async command void Port12.disable() { P1IE &= ~(1 << 2); }
+  async command void Port13.disable() { P1IE &= ~(1 << 3); }
+  async command void Port14.disable() { P1IE &= ~(1 << 4); }
+  async command void Port15.disable() { P1IE &= ~(1 << 5); }
+  async command void Port16.disable() { P1IE &= ~(1 << 6); }
+  async command void Port17.disable() { P1IE &= ~(1 << 7); }
+  async command void Port10.clear() { P1IFG &= ~(1 << 0); }
+  async command void Port11.clear() { P1IFG &= ~(1 << 1); }
+  async command void Port12.clear() { P1IFG &= ~(1 << 2); }
+  async command void Port13.clear() { P1IFG &= ~(1 << 3); }
+  async command void Port14.clear() { P1IFG &= ~(1 << 4); }
+  async command void Port15.clear() { P1IFG &= ~(1 << 5); }
+  async command void Port16.clear() { P1IFG &= ~(1 << 6); }
+  async command void Port17.clear() { P1IFG &= ~(1 << 7); }
+  async command bool Port10.getValue() { bool b; atomic b=(P1IN >> 0) & 1; return b; }
+  async command bool Port11.getValue() { bool b; atomic b=(P1IN >> 1) & 1; return b; }
+  async command bool Port12.getValue() { bool b; atomic b=(P1IN >> 2) & 1; return b; }
+  async command bool Port13.getValue() { bool b; atomic b=(P1IN >> 3) & 1; return b; }
+  async command bool Port14.getValue() { bool b; atomic b=(P1IN >> 4) & 1; return b; }
+  async command bool Port15.getValue() { bool b; atomic b=(P1IN >> 5) & 1; return b; }
+  async command bool Port16.getValue() { bool b; atomic b=(P1IN >> 6) & 1; return b; }
+  async command bool Port17.getValue() { bool b; atomic b=(P1IN >> 7) & 1; return b; }
+  async command void Port10.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 0); 
+      else      P1IES |=  (1 << 0);
+    }
+  }
+  async command void Port11.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 1); 
+      else      P1IES |=  (1 << 1);
+    }
+  }
+  async command void Port12.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 2); 
+      else      P1IES |=  (1 << 2);
+    }
+  }
+  async command void Port13.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 3); 
+      else      P1IES |=  (1 << 3);
+    }
+  }
+  async command void Port14.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 4); 
+      else      P1IES |=  (1 << 4);
+    }
+  }
+  async command void Port15.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 5); 
+      else      P1IES |=  (1 << 5);
+    }
+  }
+  async command void Port16.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 6); 
+      else      P1IES |=  (1 << 6);
+    }
+  }
+  async command void Port17.edge(bool l2h) { 
+    atomic {
+      if (l2h)  P1IES &= ~(1 << 7); 
+      else      P1IES |=  (1 << 7);
+    }
+  }
+#endif
+
+#ifdef __msp430_have_port2
+  TOSH_SIGNAL(PORT2_VECTOR)
+  {
+    volatile int n = P2IFG & P2IE;
+
+    if (n & (1 << 0)) { signal Port20.fired(); }
+    else if (n & (1 << 1)) { signal Port21.fired(); }
+    else if (n & (1 << 2)) { signal Port22.fired(); }
+    else if (n & (1 << 3)) { signal Port23.fired(); }
+    else if (n & (1 << 4)) { signal Port24.fired(); }
+    else if (n & (1 << 5)) { signal Port25.fired(); }
+    else if (n & (1 << 6)) { signal Port26.fired(); }
+    else if (n & (1 << 7)) { signal Port27.fired(); }
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void Port20.fired() { call Port20.clear(); }
+  default async event void Port21.fired() { call Port21.clear(); }
+  default async event void Port22.fired() { call Port22.clear(); }
+  default async event void Port23.fired() { call Port23.clear(); }
+  default async event void Port24.fired() { call Port24.clear(); }
+  default async event void Port25.fired() { call Port25.clear(); }
+  default async event void Port26.fired() { call Port26.clear(); }
+  default async event void Port27.fired() { call Port27.clear(); }
+  async command void Port20.enable() { P2IE |= (1 << 0); }
+  async command void Port21.enable() { P2IE |= (1 << 1); }
+  async command void Port22.enable() { P2IE |= (1 << 2); }
+  async command void Port23.enable() { P2IE |= (1 << 3); }
+  async command void Port24.enable() { P2IE |= (1 << 4); }
+  async command void Port25.enable() { P2IE |= (1 << 5); }
+  async command void Port26.enable() { P2IE |= (1 << 6); }
+  async command void Port27.enable() { P2IE |= (1 << 7); }
+  async command void Port20.disable() { P2IE &= ~(1 << 0); }
+  async command void Port21.disable() { P2IE &= ~(1 << 1); }
+  async command void Port22.disable() { P2IE &= ~(1 << 2); }
+  async command void Port23.disable() { P2IE &= ~(1 << 3); }
+  async command void Port24.disable() { P2IE &= ~(1 << 4); }
+  async command void Port25.disable() { P2IE &= ~(1 << 5); }
+  async command void Port26.disable() { P2IE &= ~(1 << 6); }
+  async command void Port27.disable() { P2IE &= ~(1 << 7); }
+  async command void Port20.clear() { P2IFG &= ~(1 << 0); }
+  async command void Port21.clear() { P2IFG &= ~(1 << 1); }
+  async command void Port22.clear() { P2IFG &= ~(1 << 2); }
+  async command void Port23.clear() { P2IFG &= ~(1 << 3); }
+  async command void Port24.clear() { P2IFG &= ~(1 << 4); }
+  async command void Port25.clear() { P2IFG &= ~(1 << 5); }
+  async command void Port26.clear() { P2IFG &= ~(1 << 6); }
+  async command void Port27.clear() { P2IFG &= ~(1 << 7); }
+  async command bool Port20.getValue() { bool b; atomic b=(P2IN >> 0) & 1; return b; }
+  async command bool Port21.getValue() { bool b; atomic b=(P2IN >> 1) & 1; return b; }
+  async command bool Port22.getValue() { bool b; atomic b=(P2IN >> 2) & 1; return b; }
+  async command bool Port23.getValue() { bool b; atomic b=(P2IN >> 3) & 1; return b; }
+  async command bool Port24.getValue() { bool b; atomic b=(P2IN >> 4) & 1; return b; }
+  async command bool Port25.getValue() { bool b; atomic b=(P2IN >> 5) & 1; return b; }
+  async command bool Port26.getValue() { bool b; atomic b=(P2IN >> 6) & 1; return b; }
+  async command bool Port27.getValue() { bool b; atomic b=(P2IN >> 7) & 1; return b; }
+  async command void Port20.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 0);
+      else      P2IES |=  (1 << 0);
+    }
+  }
+  async command void Port21.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 1);
+      else      P2IES |=  (1 << 1);
+    }
+  }  
+  async command void Port22.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 2);
+      else      P2IES |=  (1 << 2);
+    }
+  }  
+  async command void Port23.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 3);
+      else      P2IES |=  (1 << 3);
+    }
+  }  
+  async command void Port24.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 4);
+      else      P2IES |=  (1 << 4);
+    }
+  }
+  async command void Port25.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 5);
+      else      P2IES |=  (1 << 5);
+    }
+  }
+  async command void Port26.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 6);
+      else      P2IES |=  (1 << 6);
+    }
+  }
+  async command void Port27.edge(bool l2h) {
+    atomic {
+      if (l2h)  P2IES &= ~(1 << 7);
+      else      P2IES |=  (1 << 7);
+    }
+  }
+#endif
+
+
+}
diff --git a/tos/lib/tosthreads/chips/msp430/HplMsp430Usart0C.nc b/tos/lib/tosthreads/chips/msp430/HplMsp430Usart0C.nc
new file mode 100644
index 00000000..333c774f
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/HplMsp430Usart0C.nc
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * An HPL abstraction of USART0 on the MSP430.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author Joe Polastre
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $
+ */
+
+#include "msp430usart.h"
+
+configuration HplMsp430Usart0C {
+  
+  provides interface HplMsp430Usart;
+  provides interface HplMsp430UsartInterrupts;
+  provides interface HplMsp430I2CInterrupts;
+  
+}
+
+implementation {
+  
+  components HplMsp430Usart0P as HplUsartP;
+  HplMsp430Usart = HplUsartP;
+  HplMsp430UsartInterrupts = HplUsartP;
+  HplMsp430I2CInterrupts = HplUsartP;
+  
+  components HplMsp430GeneralIOC as GIO;
+  HplUsartP.SIMO -> GIO.SIMO0;
+  HplUsartP.SOMI -> GIO.SOMI0;
+  HplUsartP.UCLK -> GIO.UCLK0;
+  HplUsartP.URXD -> GIO.URXD0;
+  HplUsartP.UTXD -> GIO.UTXD0;
+
+  components PlatformInterruptC;
+  HplUsartP.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/msp430/HplMsp430Usart0P.nc b/tos/lib/tosthreads/chips/msp430/HplMsp430Usart0P.nc
new file mode 100644
index 00000000..36722224
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/HplMsp430Usart0P.nc
@@ -0,0 +1,399 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Copyright (c) 2004-2005, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "msp430usart.h"
+/**
+ * Implementation of USART0 lowlevel functionality - stateless.
+ * Setting a mode will by default disable USART-Interrupts.
+ *
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * @author: Jonathan Hui <jhui@archedrock.com>
+ * @author: Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author: Joe Polastre
+ * @author: Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ * @version $Revision: 1.1 $ $Date: 2008-06-12 14:02:25 $
+ */
+
+module HplMsp430Usart0P {
+  provides interface HplMsp430Usart as Usart;
+  provides interface HplMsp430UsartInterrupts as Interrupts;
+  provides interface HplMsp430I2CInterrupts as I2CInterrupts;
+  
+  uses interface HplMsp430I2C as HplI2C;
+  uses interface HplMsp430GeneralIO as SIMO;
+  uses interface HplMsp430GeneralIO as SOMI;
+  uses interface HplMsp430GeneralIO as UCLK;
+  uses interface HplMsp430GeneralIO as URXD;
+  uses interface HplMsp430GeneralIO as UTXD;
+  uses interface PlatformInterrupt;
+}
+
+implementation
+{
+  MSP430REG_NORACE(IE1);
+  MSP430REG_NORACE(ME1);
+  MSP430REG_NORACE(IFG1);
+  MSP430REG_NORACE(U0TCTL);
+  MSP430REG_NORACE(U0RCTL);
+  MSP430REG_NORACE(U0TXBUF);
+  
+  TOSH_SIGNAL(UART0RX_VECTOR) {
+    uint8_t temp = U0RXBUF;
+    signal Interrupts.rxDone(temp);
+    call PlatformInterrupt.postAmble();
+  }
+  
+  TOSH_SIGNAL(UART0TX_VECTOR) {
+    if ( call HplI2C.isI2C() )
+      signal I2CInterrupts.fired();
+    else
+      signal Interrupts.txDone();
+    call PlatformInterrupt.postAmble();
+  }
+  
+  async command void Usart.setUctl(msp430_uctl_t control) {
+    U0CTL=uctl2int(control);
+  }
+
+  async command msp430_uctl_t Usart.getUctl() {
+    return int2uctl(U0CTL);
+  }
+
+  async command void Usart.setUtctl(msp430_utctl_t control) {
+    U0TCTL=utctl2int(control);
+  }
+
+  async command msp430_utctl_t Usart.getUtctl() {
+    return int2utctl(U0TCTL);
+  }
+
+  async command void Usart.setUrctl(msp430_urctl_t control) {
+    U0RCTL=urctl2int(control);
+  }
+
+  async command msp430_urctl_t Usart.getUrctl() {
+    return int2urctl(U0RCTL);
+  }
+
+  async command void Usart.setUbr(uint16_t control) {
+    atomic {
+      U0BR0 = control & 0x00FF;
+      U0BR1 = (control >> 8) & 0x00FF;
+    }
+  }
+
+  async command uint16_t Usart.getUbr() {
+    return (U0BR1 << 8) + U0BR0;
+  }
+
+  async command void Usart.setUmctl(uint8_t control) {
+    U0MCTL=control;
+  }
+
+  async command uint8_t Usart.getUmctl() {
+    return U0MCTL;
+  }
+
+  async command void Usart.resetUsart(bool reset) {
+    if (reset) {
+      U0CTL = SWRST;
+    }
+    else {
+      CLR_FLAG(U0CTL, SWRST);
+    }
+  }
+
+  async command bool Usart.isSpi() {
+    atomic {
+      return (U0CTL & SYNC) && (ME1 & USPIE0);
+    }
+  }
+
+  async command bool Usart.isUart() {
+    atomic {
+      return !(U0CTL & SYNC) && ((ME1 & UTXE0) && (ME1 & URXE0));
+    }
+  }
+
+  async command bool Usart.isUartTx() {
+    atomic {
+      return !(U0CTL & SYNC) && (ME1 & UTXE0);
+    }
+  }
+
+  async command bool Usart.isUartRx() {
+    atomic {
+      return !(U0CTL & SYNC) && (ME1 & URXE0);
+    }
+  }
+
+  async command msp430_usartmode_t Usart.getMode() {
+    if (call Usart.isUart())
+      return USART_UART;
+    else if (call Usart.isUartRx())
+      return USART_UART_RX;
+    else if (call Usart.isUartTx())
+      return USART_UART_TX;
+    else if (call Usart.isSpi())
+      return USART_SPI;
+    else if (call HplI2C.isI2C())
+      return USART_I2C;
+    else
+      return USART_NONE;
+  }
+
+  async command void Usart.enableUart() {
+    atomic{
+      call UTXD.selectModuleFunc();
+      call URXD.selectModuleFunc();
+    }
+    ME1 |= (UTXE0 | URXE0);   // USART0 UART module enable
+  }
+
+  async command void Usart.disableUart() {
+    atomic {
+      ME1 &= ~(UTXE0 | URXE0);   // USART0 UART module enable
+      call UTXD.selectIOFunc();
+      call URXD.selectIOFunc();
+    }
+
+  }
+
+  async command void Usart.enableUartTx() {
+    call UTXD.selectModuleFunc();
+    ME1 |= UTXE0;   // USART0 UART Tx module enable
+  }
+
+  async command void Usart.disableUartTx() {
+    ME1 &= ~UTXE0;   // USART0 UART Tx module enable
+    call UTXD.selectIOFunc();
+
+  }
+
+  async command void Usart.enableUartRx() {
+    call URXD.selectModuleFunc();
+    ME1 |= URXE0;   // USART0 UART Rx module enable
+  }
+
+  async command void Usart.disableUartRx() {
+    ME1 &= ~URXE0;  // USART0 UART Rx module disable
+    call URXD.selectIOFunc();
+
+  }
+
+  async command void Usart.enableSpi() {
+    atomic {
+      call SIMO.selectModuleFunc();
+      call SOMI.selectModuleFunc();
+      call UCLK.selectModuleFunc();
+    }
+    ME1 |= USPIE0;   // USART0 SPI module enable
+  }
+
+  async command void Usart.disableSpi() {
+    atomic {
+      ME1 &= ~USPIE0;   // USART0 SPI module disable
+      call SIMO.selectIOFunc();
+      call SOMI.selectIOFunc();
+      call UCLK.selectIOFunc();
+    }
+  }
+  
+  void configSpi(msp430_spi_union_config_t* config) {
+    // U0CTL = (config->spiRegisters.uctl & ~I2C) | SYNC | SWRST;
+    U0CTL = (config->spiRegisters.uctl) | SYNC | SWRST;  
+    U0TCTL = config->spiRegisters.utctl;
+
+    call Usart.setUbr(config->spiRegisters.ubr);
+    call Usart.setUmctl(0x00);
+  }
+
+  async command void Usart.setModeSpi(msp430_spi_union_config_t* config) {
+    
+    atomic {
+    	call Usart.resetUsart(TRUE);
+    	call HplI2C.clearModeI2C();
+    	call Usart.disableUart();
+      configSpi(config);
+      call Usart.enableSpi();
+      call Usart.resetUsart(FALSE);
+      call Usart.clrIntr();
+      call Usart.disableIntr();
+    }    
+    return;
+  }
+
+  void configUart(msp430_uart_union_config_t* config) {
+
+    U0CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST;
+    U0TCTL = config->uartRegisters.utctl;
+    U0RCTL = config->uartRegisters.urctl;        
+    
+    call Usart.setUbr(config->uartRegisters.ubr);
+    call Usart.setUmctl(config->uartRegisters.umctl);
+  }
+
+  async command void Usart.setModeUart(msp430_uart_union_config_t* config) {
+
+    atomic { 
+      call Usart.resetUsart(TRUE);
+     	call HplI2C.clearModeI2C();
+    	call Usart.disableSpi();
+      configUart(config);
+      if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 1)) {
+      	call Usart.enableUart();
+      } else if ((config->uartConfig.utxe == 0) && (config->uartConfig.urxe == 1)) {
+        call Usart.disableUartTx();
+        call Usart.enableUartRx();
+      } else if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 0)){
+        call Usart.disableUartRx();
+        call Usart.enableUartTx();
+      } else {
+        call Usart.disableUart();
+      }
+      call Usart.resetUsart(FALSE);
+      call Usart.clrIntr();
+      call Usart.disableIntr();
+    }
+    
+    return;
+  }
+
+  async command bool Usart.isTxIntrPending(){
+    if (IFG1 & UTXIFG0){
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isTxEmpty(){
+    if (U0TCTL & TXEPT) {
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isRxIntrPending(){
+    if (IFG1 & URXIFG0){
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command void Usart.clrTxIntr(){
+    IFG1 &= ~UTXIFG0;
+  }
+
+  async command void Usart.clrRxIntr() {
+    IFG1 &= ~URXIFG0;
+  }
+
+  async command void Usart.clrIntr() {
+    IFG1 &= ~(UTXIFG0 | URXIFG0);
+  }
+
+  async command void Usart.disableRxIntr() {
+    IE1 &= ~URXIE0;
+  }
+
+  async command void Usart.disableTxIntr() {
+    IE1 &= ~UTXIE0;
+  }
+
+  async command void Usart.disableIntr() {
+      IE1 &= ~(UTXIE0 | URXIE0);
+  }
+
+  async command void Usart.enableRxIntr() {
+    atomic {
+      IFG1 &= ~URXIFG0;
+      IE1 |= URXIE0;
+    }
+  }
+
+  async command void Usart.enableTxIntr() {
+    atomic {
+      IFG1 &= ~UTXIFG0;
+      IE1 |= UTXIE0;
+    }
+  }
+
+  async command void Usart.enableIntr() {
+    atomic {
+      IFG1 &= ~(UTXIFG0 | URXIFG0);
+      IE1 |= (UTXIE0 | URXIE0);
+    }
+  }
+
+  async command void Usart.tx(uint8_t data) {
+    atomic U0TXBUF = data;
+  }
+
+  async command uint8_t Usart.rx() {
+    uint8_t value;
+    atomic value = U0RXBUF;
+    return value;
+  }
+
+  default async event void I2CInterrupts.fired() {}
+  default async command bool HplI2C.isI2C() { return FALSE; }
+  default async command void HplI2C.clearModeI2C() {};
+  
+}
diff --git a/tos/lib/tosthreads/chips/msp430/HplMsp430Usart1C.nc b/tos/lib/tosthreads/chips/msp430/HplMsp430Usart1C.nc
new file mode 100644
index 00000000..f4b2b7ee
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/HplMsp430Usart1C.nc
@@ -0,0 +1,99 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Copyright (c) 2000-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * An HPL abstraction of USART1 on the MSP430.
+ *
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Joe Polastre
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $
+ */
+
+#include "msp430usart.h"
+
+configuration HplMsp430Usart1C {
+
+  provides interface AsyncStdControl;
+  provides interface HplMsp430Usart;
+  provides interface HplMsp430UsartInterrupts;
+
+}
+
+implementation {
+
+  components HplMsp430Usart1P as HplUsartP;
+  components HplMsp430GeneralIOC as GIO;
+
+  AsyncStdControl = HplUsartP;
+  HplMsp430Usart = HplUsartP;
+  HplMsp430UsartInterrupts = HplUsartP;
+
+  HplUsartP.SIMO -> GIO.SIMO1;
+  HplUsartP.SOMI -> GIO.SOMI1;
+  HplUsartP.UCLK -> GIO.UCLK1;
+  HplUsartP.URXD -> GIO.URXD1;
+  HplUsartP.UTXD -> GIO.UTXD1;
+
+  components PlatformInterruptC;
+  HplUsartP.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/chips/msp430/HplMsp430Usart1P.nc b/tos/lib/tosthreads/chips/msp430/HplMsp430Usart1P.nc
new file mode 100644
index 00000000..ffa4a54d
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/HplMsp430Usart1P.nc
@@ -0,0 +1,397 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Copyright (c) 2004-2005, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "msp430usart.h"
+/**
+ * Implementation of USART1 lowlevel functionality - stateless.
+ * Setting a mode will by default disable USART-Interrupts.
+ *
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * @author: Jonathan Hui <jhui@archedrock.com>
+ * @author: Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author: Joe Polastre
+ * @version $Revision: 1.1 $ $Date: 2008-06-12 14:02:26 $
+ */
+
+module HplMsp430Usart1P {
+  provides interface AsyncStdControl;
+  provides interface HplMsp430Usart as Usart;
+  provides interface HplMsp430UsartInterrupts as Interrupts;
+
+  uses interface HplMsp430GeneralIO as SIMO;
+  uses interface HplMsp430GeneralIO as SOMI;
+  uses interface HplMsp430GeneralIO as UCLK;
+  uses interface HplMsp430GeneralIO as URXD;
+  uses interface HplMsp430GeneralIO as UTXD;
+  uses interface PlatformInterrupt;
+}
+
+implementation
+{
+  MSP430REG_NORACE(IE2);
+  MSP430REG_NORACE(ME2);
+  MSP430REG_NORACE(IFG2);
+  MSP430REG_NORACE(U1TCTL);
+  MSP430REG_NORACE(U1RCTL);
+  MSP430REG_NORACE(U1TXBUF);
+
+
+
+  TOSH_SIGNAL(UART1RX_VECTOR) {
+    uint8_t temp = U1RXBUF;
+    signal Interrupts.rxDone(temp);
+    call PlatformInterrupt.postAmble();
+  }
+
+  TOSH_SIGNAL(UART1TX_VECTOR) {
+    signal Interrupts.txDone();
+    call PlatformInterrupt.postAmble();
+  }
+
+  async command error_t AsyncStdControl.start() {
+    return SUCCESS;
+  }
+
+  async command error_t AsyncStdControl.stop() {
+    call Usart.disableSpi();
+    call Usart.disableUart();
+    return SUCCESS;
+  }
+
+
+  async command void Usart.setUctl(msp430_uctl_t control) {
+    U1CTL=uctl2int(control);
+  }
+
+  async command msp430_uctl_t Usart.getUctl() {
+    return int2uctl(U0CTL);
+  }
+
+  async command void Usart.setUtctl(msp430_utctl_t control) {
+    U1TCTL=utctl2int(control);
+  }
+
+  async command msp430_utctl_t Usart.getUtctl() {
+    return int2utctl(U1TCTL);
+  }
+
+  async command void Usart.setUrctl(msp430_urctl_t control) {
+    U1RCTL=urctl2int(control);
+  }
+
+  async command msp430_urctl_t Usart.getUrctl() {
+    return int2urctl(U1RCTL);
+  }
+
+  async command void Usart.setUbr(uint16_t control) {
+    atomic {
+      U1BR0 = control & 0x00FF;
+      U1BR1 = (control >> 8) & 0x00FF;
+    }
+  }
+
+  async command uint16_t Usart.getUbr() {
+    return (U1BR1 << 8) + U1BR0;
+  }
+
+  async command void Usart.setUmctl(uint8_t control) {
+    U1MCTL=control;
+  }
+
+  async command uint8_t Usart.getUmctl() {
+    return U1MCTL;
+  }
+
+  async command void Usart.resetUsart(bool reset) {
+    if (reset)
+      U1CTL = SWRST;
+    else
+      CLR_FLAG(U1CTL, SWRST);
+  }
+
+  async command bool Usart.isSpi() {
+    atomic {
+      return (U1CTL & SYNC) && (ME2 & USPIE1);
+    }
+  }
+
+  async command bool Usart.isUart() {
+    atomic {
+      return !(U1CTL & SYNC) && ((ME2 & UTXE1) && (ME2 & URXE1));
+    }
+  }
+
+  async command bool Usart.isUartTx() {
+    atomic {
+      return !(U1CTL & SYNC) && (ME2 & UTXE1);
+    }
+  }
+
+  async command bool Usart.isUartRx() {
+    atomic {
+      return !(U1CTL & SYNC) && (ME2 & URXE1);
+    }
+  }
+
+  async command msp430_usartmode_t Usart.getMode() {
+    if (call Usart.isUart())
+      return USART_UART;
+    else if (call Usart.isUartRx())
+      return USART_UART_RX;
+    else if (call Usart.isUartTx())
+      return USART_UART_TX;
+    else if (call Usart.isSpi())
+      return USART_SPI;
+    else
+      return USART_NONE;
+  }
+
+  async command void Usart.enableUart() {
+    atomic{
+      call UTXD.selectModuleFunc();
+      call URXD.selectModuleFunc();
+    }
+    ME2 |= (UTXE1 | URXE1);   // USART1 UART module enable
+  }
+
+  async command void Usart.disableUart() {
+    atomic {
+      ME2 &= ~(UTXE1 | URXE1);   // USART1 UART module enable
+      call UTXD.selectIOFunc();
+      call URXD.selectIOFunc();
+    }
+
+  }
+
+  async command void Usart.enableUartTx() {
+    call UTXD.selectModuleFunc();
+    ME2 |= UTXE1;   // USART1 UART Tx module enable
+  }
+
+  async command void Usart.disableUartTx() {
+    ME2 &= ~UTXE1;   // USART1 UART Tx module enable
+    call UTXD.selectIOFunc();
+
+  }
+
+  async command void Usart.enableUartRx() {
+    call URXD.selectModuleFunc();
+    ME2 |= URXE1;   // USART1 UART Rx module enable
+  }
+
+  async command void Usart.disableUartRx() {
+    ME2 &= ~URXE1;  // USART1 UART Rx module disable
+    call URXD.selectIOFunc();
+
+  }
+
+  async command void Usart.enableSpi() {
+    atomic {
+      call SIMO.selectModuleFunc();
+      call SOMI.selectModuleFunc();
+      call UCLK.selectModuleFunc();
+    }
+    ME2 |= USPIE1;   // USART1 SPI module enable
+  }
+
+  async command void Usart.disableSpi() {
+    atomic {
+      ME2 &= ~USPIE1;   // USART1 SPI module disable
+      call SIMO.selectIOFunc();
+      call SOMI.selectIOFunc();
+      call UCLK.selectIOFunc();
+    }
+  }
+
+  void configSpi(msp430_spi_union_config_t* config) {
+    U1CTL = (config->spiRegisters.uctl) | SYNC | SWRST;  
+    U1TCTL = config->spiRegisters.utctl;
+
+    call Usart.setUbr(config->spiRegisters.ubr);
+    call Usart.setUmctl(0x00);
+  }
+
+
+  async command void Usart.setModeSpi(msp430_spi_union_config_t* config) {    
+    atomic {
+      call Usart.resetUsart(TRUE);
+      call Usart.disableUart();
+      configSpi(config);
+      call Usart.enableSpi();
+      call Usart.resetUsart(FALSE);
+      call Usart.clrIntr();
+      call Usart.disableIntr();
+    }    
+    return;
+  }
+
+
+  void configUart(msp430_uart_union_config_t* config) {
+
+    U1CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST;
+    U1TCTL = config->uartRegisters.utctl;
+    U1RCTL = config->uartRegisters.urctl;        
+    
+    call Usart.setUbr(config->uartRegisters.ubr);
+    call Usart.setUmctl(config->uartRegisters.umctl);
+  }
+
+  async command void Usart.setModeUart(msp430_uart_union_config_t* config) {
+
+    atomic { 
+      call Usart.resetUsart(TRUE);
+      call Usart.disableSpi();
+      configUart(config);
+      if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 1)) {
+      	call Usart.enableUart();
+      } else if ((config->uartConfig.utxe == 0) && (config->uartConfig.urxe == 1)) {
+        call Usart.disableUartTx();
+        call Usart.enableUartRx();
+      } else if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 0)){
+        call Usart.disableUartRx();
+        call Usart.enableUartTx();
+      } else {
+        call Usart.disableUart();
+      }
+      call Usart.resetUsart(FALSE);
+      call Usart.clrIntr();
+      call Usart.disableIntr();
+    }
+    
+    return;
+  }
+
+  async command bool Usart.isTxIntrPending(){
+    if (IFG2 & UTXIFG1){
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isTxEmpty(){
+    if (U1TCTL & TXEPT) {
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isRxIntrPending(){
+    if (IFG2 & URXIFG1){
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command void Usart.clrTxIntr(){
+    IFG2 &= ~UTXIFG1;
+  }
+
+  async command void Usart.clrRxIntr() {
+    IFG2 &= ~URXIFG1;
+  }
+
+  async command void Usart.clrIntr() {
+    IFG2 &= ~(UTXIFG1 | URXIFG1);
+  }
+
+  async command void Usart.disableRxIntr() {
+    IE2 &= ~URXIE1;
+  }
+
+  async command void Usart.disableTxIntr() {
+    IE2 &= ~UTXIE1;
+  }
+
+  async command void Usart.disableIntr() {
+      IE2 &= ~(UTXIE1 | URXIE1);
+  }
+
+  async command void Usart.enableRxIntr() {
+    atomic {
+      IFG2 &= ~URXIFG1;
+      IE2 |= URXIE1;
+    }
+  }
+
+  async command void Usart.enableTxIntr() {
+    atomic {
+      IFG2 &= ~UTXIFG1;
+      IE2 |= UTXIE1;
+    }
+  }
+
+  async command void Usart.enableIntr() {
+    atomic {
+      IFG2 &= ~(UTXIFG1 | URXIFG1);
+      IE2 |= (UTXIE1 | URXIE1);
+    }
+  }
+
+  async command void Usart.tx(uint8_t data) {
+    atomic U1TXBUF = data;
+  }
+
+  async command uint8_t Usart.rx() {
+    uint8_t value;
+    atomic value = U1RXBUF;
+    return value;
+  }
+
+}
diff --git a/tos/lib/tosthreads/chips/msp430/Msp430Adc12P.nc b/tos/lib/tosthreads/chips/msp430/Msp430Adc12P.nc
new file mode 100644
index 00000000..bbb7e490
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/Msp430Adc12P.nc
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-06-12 14:02:26 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include <Msp430Adc12.h> 
+configuration Msp430Adc12P 
+{ 
+  provides {
+    interface Resource[uint8_t id]; 
+    interface Msp430Adc12SingleChannel as SingleChannel[uint8_t id]; 
+    interface Msp430Adc12MultiChannel as MultiChannel[uint8_t id]; 
+    interface Msp430Adc12Overflow as Overflow[uint8_t id]; 
+    interface AsyncStdControl as DMAExtension[uint8_t id];
+  }
+} implementation { 
+  components Msp430Adc12ImplP, HplAdc12P, MainC, 
+             new SimpleRoundRobinArbiterC(MSP430ADC12_RESOURCE) as Arbiter;
+
+  Resource = Arbiter;
+  SingleChannel = Msp430Adc12ImplP.SingleChannel;
+  MultiChannel= Msp430Adc12ImplP.MultiChannel;
+  Overflow = Msp430Adc12ImplP.Overflow;
+  DMAExtension = Msp430Adc12ImplP.DMAExtension;
+  
+  Msp430Adc12ImplP.Init <- MainC;
+  Msp430Adc12ImplP.ADCArbiterInfo -> Arbiter;
+  Msp430Adc12ImplP.HplAdc12 -> HplAdc12P;
+
+#ifdef ADC12_P6PIN_AUTO_CONFIGURE
+  components HplMsp430GeneralIOC;
+  Msp430Adc12ImplP.Port60 -> HplMsp430GeneralIOC.Port60;
+  Msp430Adc12ImplP.Port61 -> HplMsp430GeneralIOC.Port61;
+  Msp430Adc12ImplP.Port62 -> HplMsp430GeneralIOC.Port62;
+  Msp430Adc12ImplP.Port63 -> HplMsp430GeneralIOC.Port63;
+  Msp430Adc12ImplP.Port64 -> HplMsp430GeneralIOC.Port64;
+  Msp430Adc12ImplP.Port65 -> HplMsp430GeneralIOC.Port65;
+  Msp430Adc12ImplP.Port66 -> HplMsp430GeneralIOC.Port66;
+  Msp430Adc12ImplP.Port67 -> HplMsp430GeneralIOC.Port67;
+#endif
+
+#ifdef ADC12_TIMERA_ENABLED
+  components Msp430TimerC;
+  Msp430Adc12ImplP.TimerA -> Msp430TimerC.TimerA;
+  Msp430Adc12ImplP.ControlA0 -> Msp430TimerC.ControlA0;
+  Msp430Adc12ImplP.ControlA1 -> Msp430TimerC.ControlA1;
+  Msp430Adc12ImplP.CompareA0 -> Msp430TimerC.CompareA0;
+  Msp430Adc12ImplP.CompareA1 -> Msp430TimerC.CompareA1;
+#endif
+
+  components PlatformInterruptC;
+  HplAdc12P.PlatformInterrupt -> PlatformInterruptC;
+}
+
diff --git a/tos/lib/tosthreads/chips/msp430/Msp430TimerC.nc b/tos/lib/tosthreads/chips/msp430/Msp430TimerC.nc
new file mode 100644
index 00000000..1bc3bb3d
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/Msp430TimerC.nc
@@ -0,0 +1,177 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+configuration Msp430TimerC
+{
+  provides interface Msp430Timer as TimerA;
+  provides interface Msp430TimerControl as ControlA0;
+  provides interface Msp430TimerControl as ControlA1;
+  provides interface Msp430TimerControl as ControlA2;
+  provides interface Msp430Compare as CompareA0;
+  provides interface Msp430Compare as CompareA1;
+  provides interface Msp430Compare as CompareA2;
+  provides interface Msp430Capture as CaptureA0;
+  provides interface Msp430Capture as CaptureA1;
+  provides interface Msp430Capture as CaptureA2;
+
+  provides interface Msp430Timer as TimerB;
+  provides interface Msp430TimerControl as ControlB0;
+  provides interface Msp430TimerControl as ControlB1;
+  provides interface Msp430TimerControl as ControlB2;
+  provides interface Msp430TimerControl as ControlB3;
+  provides interface Msp430TimerControl as ControlB4;
+  provides interface Msp430TimerControl as ControlB5;
+  provides interface Msp430TimerControl as ControlB6;
+  provides interface Msp430Compare as CompareB0;
+  provides interface Msp430Compare as CompareB1;
+  provides interface Msp430Compare as CompareB2;
+  provides interface Msp430Compare as CompareB3;
+  provides interface Msp430Compare as CompareB4;
+  provides interface Msp430Compare as CompareB5;
+  provides interface Msp430Compare as CompareB6;
+  provides interface Msp430Capture as CaptureB0;
+  provides interface Msp430Capture as CaptureB1;
+  provides interface Msp430Capture as CaptureB2;
+  provides interface Msp430Capture as CaptureB3;
+  provides interface Msp430Capture as CaptureB4;
+  provides interface Msp430Capture as CaptureB5;
+  provides interface Msp430Capture as CaptureB6;
+}
+implementation
+{
+  components new Msp430TimerP( TAIV_, TAR_, TACTL_, TAIFG, TACLR, TAIE,
+               TASSEL0, TASSEL1, FALSE ) as Msp430TimerA
+           , new Msp430TimerP( TBIV_, TBR_, TBCTL_, TBIFG, TBCLR, TBIE,
+               TBSSEL0, TBSSEL1, TRUE ) as Msp430TimerB
+           , new Msp430TimerCapComP( TACCTL0_, TACCR0_ ) as Msp430TimerA0
+           , new Msp430TimerCapComP( TACCTL1_, TACCR1_ ) as Msp430TimerA1
+           , new Msp430TimerCapComP( TACCTL2_, TACCR2_ ) as Msp430TimerA2
+           , new Msp430TimerCapComP( TBCCTL0_, TBCCR0_ ) as Msp430TimerB0
+           , new Msp430TimerCapComP( TBCCTL1_, TBCCR1_ ) as Msp430TimerB1
+           , new Msp430TimerCapComP( TBCCTL2_, TBCCR2_ ) as Msp430TimerB2
+           , new Msp430TimerCapComP( TBCCTL3_, TBCCR3_ ) as Msp430TimerB3
+           , new Msp430TimerCapComP( TBCCTL4_, TBCCR4_ ) as Msp430TimerB4
+           , new Msp430TimerCapComP( TBCCTL5_, TBCCR5_ ) as Msp430TimerB5
+           , new Msp430TimerCapComP( TBCCTL6_, TBCCR6_ ) as Msp430TimerB6
+           , Msp430TimerCommonP as Common
+           ;
+
+  // Timer A
+  TimerA = Msp430TimerA.Timer;
+  Msp430TimerA.Overflow -> Msp430TimerA.Event[5];
+  Msp430TimerA.VectorTimerX0 -> Common.VectorTimerA0;
+  Msp430TimerA.VectorTimerX1 -> Common.VectorTimerA1;
+
+  // Timer A0
+  ControlA0 = Msp430TimerA0.Control;
+  CompareA0 = Msp430TimerA0.Compare;
+  CaptureA0 = Msp430TimerA0.Capture;
+  Msp430TimerA0.Timer -> Msp430TimerA.Timer;
+  Msp430TimerA0.Event -> Msp430TimerA.Event[0];
+
+  // Timer A1
+  ControlA1 = Msp430TimerA1.Control;
+  CompareA1 = Msp430TimerA1.Compare;
+  CaptureA1 = Msp430TimerA1.Capture;
+  Msp430TimerA1.Timer -> Msp430TimerA.Timer;
+  Msp430TimerA1.Event -> Msp430TimerA.Event[1];
+
+  // Timer A2
+  ControlA2 = Msp430TimerA2.Control;
+  CompareA2 = Msp430TimerA2.Compare;
+  CaptureA2 = Msp430TimerA2.Capture;
+  Msp430TimerA2.Timer -> Msp430TimerA.Timer;
+  Msp430TimerA2.Event -> Msp430TimerA.Event[2];
+
+  // Timer B
+  TimerB = Msp430TimerB.Timer;
+  Msp430TimerB.Overflow -> Msp430TimerB.Event[7];
+  Msp430TimerB.VectorTimerX0 -> Common.VectorTimerB0;
+  Msp430TimerB.VectorTimerX1 -> Common.VectorTimerB1;
+
+  // Timer B0
+  ControlB0 = Msp430TimerB0.Control;
+  CompareB0 = Msp430TimerB0.Compare;
+  CaptureB0 = Msp430TimerB0.Capture;
+  Msp430TimerB0.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB0.Event -> Msp430TimerB.Event[0];
+
+  // Timer B1
+  ControlB1 = Msp430TimerB1.Control;
+  CompareB1 = Msp430TimerB1.Compare;
+  CaptureB1 = Msp430TimerB1.Capture;
+  Msp430TimerB1.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB1.Event -> Msp430TimerB.Event[1];
+
+  // Timer B2
+  ControlB2 = Msp430TimerB2.Control;
+  CompareB2 = Msp430TimerB2.Compare;
+  CaptureB2 = Msp430TimerB2.Capture;
+  Msp430TimerB2.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB2.Event -> Msp430TimerB.Event[2];
+
+  // Timer B3
+  ControlB3 = Msp430TimerB3.Control;
+  CompareB3 = Msp430TimerB3.Compare;
+  CaptureB3 = Msp430TimerB3.Capture;
+  Msp430TimerB3.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB3.Event -> Msp430TimerB.Event[3];
+
+  // Timer B4
+  ControlB4 = Msp430TimerB4.Control;
+  CompareB4 = Msp430TimerB4.Compare;
+  CaptureB4 = Msp430TimerB4.Capture;
+  Msp430TimerB4.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB4.Event -> Msp430TimerB.Event[4];
+
+  // Timer B5
+  ControlB5 = Msp430TimerB5.Control;
+  CompareB5 = Msp430TimerB5.Compare;
+  CaptureB5 = Msp430TimerB5.Capture;
+  Msp430TimerB5.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB5.Event -> Msp430TimerB.Event[5];
+
+  // Timer B6
+  ControlB6 = Msp430TimerB6.Control;
+  CompareB6 = Msp430TimerB6.Compare;
+  CaptureB6 = Msp430TimerB6.Capture;
+  Msp430TimerB6.Timer -> Msp430TimerB.Timer;
+  Msp430TimerB6.Event -> Msp430TimerB.Event[6];
+  
+  components PlatformInterruptC;
+  Common.PlatformInterrupt -> PlatformInterruptC;
+}
+
diff --git a/tos/lib/tosthreads/chips/msp430/Msp430TimerCommonP.nc b/tos/lib/tosthreads/chips/msp430/Msp430TimerCommonP.nc
new file mode 100644
index 00000000..241861d5
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/Msp430TimerCommonP.nc
@@ -0,0 +1,29 @@
+
+module Msp430TimerCommonP
+{
+  provides interface Msp430TimerEvent as VectorTimerA0;
+  provides interface Msp430TimerEvent as VectorTimerA1;
+  provides interface Msp430TimerEvent as VectorTimerB0;
+  provides interface Msp430TimerEvent as VectorTimerB1;
+  uses interface PlatformInterrupt;
+}
+implementation
+{
+  TOSH_SIGNAL(TIMERA0_VECTOR) { 
+    signal VectorTimerA0.fired(); 
+    call PlatformInterrupt.postAmble();
+  }
+  TOSH_SIGNAL(TIMERA1_VECTOR) { 
+    signal VectorTimerA1.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  TOSH_SIGNAL(TIMERB0_VECTOR) { 
+    signal VectorTimerB0.fired();
+    call PlatformInterrupt.postAmble();
+  }
+  TOSH_SIGNAL(TIMERB1_VECTOR) { 
+    signal VectorTimerB1.fired();
+    call PlatformInterrupt.postAmble();
+  }
+}
+
diff --git a/tos/lib/tosthreads/chips/msp430/adc12/BlockingAdcP.nc b/tos/lib/tosthreads/chips/msp430/adc12/BlockingAdcP.nc
new file mode 100644
index 00000000..ce22d965
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/adc12/BlockingAdcP.nc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "thread.h"
+
+configuration BlockingAdcP {
+  provides {
+    interface BlockingRead<uint16_t> as BlockingRead[uint8_t client];
+    interface BlockingReadStream<uint16_t> as BlockingReadStream[uint8_t streamClient];
+  }
+  uses {
+    //For BlockingRead
+    interface AdcConfigure<const msp430adc12_channel_config_t*> as Config[uint8_t client];
+    interface Msp430Adc12SingleChannel as SingleChannel[uint8_t client];
+    interface Resource as ResourceRead[uint8_t client];
+    
+    //For BlockingReadStream
+    interface AdcConfigure<const msp430adc12_channel_config_t*> as ConfigReadStream[uint8_t streamClient];
+    interface Msp430Adc12SingleChannel as SingleChannelReadStream[uint8_t streamClient];
+    interface Resource as ResourceReadStream[uint8_t streamClient];
+  }
+}
+implementation {
+  components MainC;
+  components AdcP;
+  components WireAdcStreamP;
+  components new BlockingReadP();
+  components new BlockingReadStreamP();
+  
+  MainC.SoftwareInit -> BlockingReadP;
+  MainC.SoftwareInit -> BlockingReadStreamP;
+  
+  //For BlockingRead
+  BlockingRead = BlockingReadP;
+  Config = AdcP.Config;
+  SingleChannel = AdcP.SingleChannel;
+  ResourceRead = AdcP.ResourceRead;
+  BlockingReadP.Read -> AdcP.Read;
+  
+  //For BlockingReadStream
+  BlockingReadStream = BlockingReadStreamP;
+  ConfigReadStream = WireAdcStreamP;
+  SingleChannelReadStream = WireAdcStreamP;
+  ResourceReadStream = WireAdcStreamP;
+  BlockingReadStreamP.ReadStream -> WireAdcStreamP;
+  
+  components SystemCallC;
+  components SystemCallQueueC;
+  BlockingReadP.SystemCallQueue -> SystemCallQueueC;
+  BlockingReadP.SystemCall -> SystemCallC;
+  BlockingReadStreamP.SystemCallQueue -> SystemCallQueueC;
+  BlockingReadStreamP.SystemCall -> SystemCallC;
+}
+
+
diff --git a/tos/lib/tosthreads/chips/msp430/adc12/BlockingAdcReadClientC.nc b/tos/lib/tosthreads/chips/msp430/adc12/BlockingAdcReadClientC.nc
new file mode 100644
index 00000000..19cc7e09
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/adc12/BlockingAdcReadClientC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include <Msp430Adc12.h>
+generic configuration BlockingAdcReadClientC() {
+  provides interface BlockingRead<uint16_t>;
+  uses interface AdcConfigure<const msp430adc12_channel_config_t*>;
+} 
+implementation {
+  components BlockingAdcP,
+#ifdef REF_VOLT_AUTO_CONFIGURE     
+             // if the client configuration requires a stable 
+             // reference voltage, the reference voltage generator 
+             // is automatically enabled
+             new Msp430Adc12ClientAutoRVGC() as Msp430AdcClient;
+#else
+             new Msp430Adc12ClientC() as Msp430AdcClient;
+#endif
+
+  enum {
+    CLIENT = unique(ADCC_SERVICE),
+  };
+
+  BlockingRead = BlockingAdcP.BlockingRead[CLIENT];
+  AdcConfigure = BlockingAdcP.Config[CLIENT];
+  BlockingAdcP.SingleChannel[CLIENT] -> Msp430AdcClient.Msp430Adc12SingleChannel;
+  BlockingAdcP.ResourceRead[CLIENT] -> Msp430AdcClient.Resource;
+#ifdef REF_VOLT_AUTO_CONFIGURE
+  AdcConfigure = Msp430AdcClient.AdcConfigure;
+#endif 
+}
+  
diff --git a/tos/lib/tosthreads/chips/msp430/adc12/BlockingAdcReadStreamClientC.nc b/tos/lib/tosthreads/chips/msp430/adc12/BlockingAdcReadStreamClientC.nc
new file mode 100644
index 00000000..1db007bc
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/adc12/BlockingAdcReadStreamClientC.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include <Msp430Adc12.h>
+generic configuration BlockingAdcReadStreamClientC() {
+  provides interface BlockingReadStream<uint16_t>;
+  uses interface AdcConfigure<const msp430adc12_channel_config_t*>;
+} implementation {
+  components BlockingAdcP,
+#ifdef REF_VOLT_AUTO_CONFIGURE     
+             // if the client configuration requires a stable 
+             // reference voltage, the reference voltage generator 
+             // is automatically enabled
+             new Msp430Adc12ClientAutoRVGC() as Msp430AdcPlient;
+#else
+             new Msp430Adc12ClientC() as Msp430AdcPlient;
+#endif
+
+  enum {
+    RSCLIENT = unique(ADCC_READ_STREAM_SERVICE),
+  };
+
+  BlockingReadStream = BlockingAdcP.BlockingReadStream[RSCLIENT];
+  AdcConfigure = BlockingAdcP.ConfigReadStream[RSCLIENT];
+  BlockingAdcP.SingleChannelReadStream[RSCLIENT] -> Msp430AdcPlient.Msp430Adc12SingleChannel;
+  BlockingAdcP.ResourceReadStream[RSCLIENT] -> Msp430AdcPlient.Resource;
+#ifdef REF_VOLT_AUTO_CONFIGURE
+  AdcConfigure = Msp430AdcPlient.AdcConfigure;
+#endif
+}
+  
diff --git a/tos/lib/tosthreads/chips/msp430/chip_thread.h b/tos/lib/tosthreads/chips/msp430/chip_thread.h
new file mode 100644
index 00000000..38d69a42
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/chip_thread.h
@@ -0,0 +1,131 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This file is derived from similar files in the TinyThread implementation
+ * by William P. McCartney from Cleveland State University (2006)
+ *
+ * This file contains MSP430 platform-specific routines for implementing
+ * threads in TinyOS
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+//Define on platform specific basis for inclusion in
+// the thread control block
+typedef struct thread_regs {
+  uint16_t status;
+  uint16_t r4;
+  uint16_t r5;
+  uint16_t r6;
+  uint16_t r7;
+  uint16_t r8;
+  uint16_t r9;
+  uint16_t r10;
+  uint16_t r11;
+  uint16_t r12;
+  uint16_t r13;
+  uint16_t r14;
+  uint16_t r15;
+} thread_regs_t;
+
+typedef uint16_t* stack_ptr_t;
+  
+#define STACK_TOP(stack, size)    \
+  (&(((uint8_t*)stack)[size - sizeof(stack_ptr_t)]))
+  
+//Save stack pointer
+#define SAVE_STACK_PTR(t)            		  		\
+  __asm__("mov.w r1,%0" : "=m" ((t)->stack_ptr))
+
+//Save status register
+#define SAVE_STATUS(t)                   	  		\
+  __asm__("mov.w r2,%0" : "=r" ((t)->regs.status))
+
+//Save General Purpose Registers
+#define SAVE_GPR(t)                        			\
+  __asm__("mov.w r4,%0" : "=m" ((t)->regs.r4));    	\
+  __asm__("mov.w r5,%0" : "=m" ((t)->regs.r5));    	\
+  __asm__("mov.w r6,%0" : "=m" ((t)->regs.r6));    	\
+  __asm__("mov.w r7,%0" : "=m" ((t)->regs.r7));    	\
+  __asm__("mov.w r8,%0" : "=m" ((t)->regs.r8));    	\
+  __asm__("mov.w r9,%0" : "=m" ((t)->regs.r9));    	\
+  __asm__("mov.w r10,%0" : "=m" ((t)->regs.r10));  	\
+  __asm__("mov.w r11,%0" : "=m" ((t)->regs.r11));  	\
+  __asm__("mov.w r12,%0" : "=m" ((t)->regs.r12));  	\
+  __asm__("mov.w r13,%0" : "=m" ((t)->regs.r13));  	\
+  __asm__("mov.w r14,%0" : "=m" ((t)->regs.r14));  	\
+  __asm__("mov.w r15,%0" : "=m" ((t)->regs.r15))
+  
+//Restore stack pointer
+#define RESTORE_STACK_PTR(t)           			 	\
+  __asm__("mov.w %0,r1" : : "m" ((t)->stack_ptr))
+
+//Restore status register
+#define RESTORE_STATUS(t)                 			\
+  __asm__("mov.w %0,r2" : : "r" ((t)->regs.status))
+
+//Restore the general purpose registers
+#define RESTORE_GPR(t)           	         		\
+  __asm__("mov.w %0,r4" : : "m" ((t)->regs.r4));   	\
+  __asm__("mov.w %0,r5" : : "m" ((t)->regs.r5));   	\
+  __asm__("mov.w %0,r6" : : "m" ((t)->regs.r6));   	\
+  __asm__("mov.w %0,r7" : : "m" ((t)->regs.r7));   	\
+  __asm__("mov.w %0,r8" : : "m" ((t)->regs.r8));   	\
+  __asm__("mov.w %0,r9" : : "m" ((t)->regs.r9));   	\
+  __asm__("mov.w %0,r10" : : "m" ((t)->regs.r10)); 	\
+  __asm__("mov.w %0,r11" : : "m" ((t)->regs.r11)); 	\
+  __asm__("mov.w %0,r12" : : "m" ((t)->regs.r12)); 	\
+  __asm__("mov.w %0,r13" : : "m" ((t)->regs.r13)); 	\
+  __asm__("mov.w %0,r14" : : "m" ((t)->regs.r14)); 	\
+  __asm__("mov.w %0,r15" : : "m" ((t)->regs.r15))
+  
+#define SAVE_TCB(t) \
+  SAVE_GPR(t);	 	\
+  SAVE_STATUS(t);	\
+  SAVE_STACK_PTR(t) 
+  
+#define RESTORE_TCB(t)  \
+  RESTORE_STACK_PTR(t); \
+  RESTORE_STATUS(t);    \
+  RESTORE_GPR(t)
+  
+#define SWITCH_CONTEXTS(from, to) \
+  SAVE_TCB(from);				  \
+  RESTORE_TCB(to)
+
+#define SWAP_STACK_PTR(OLD, NEW)   			\
+  __asm__("mov.w r1,%0" : "=m" (OLD));		\
+  __asm__("mov.w %0,r1" : : "m" (NEW))
+  
+#define PREPARE_THREAD(t, thread_ptr)		\
+  *((t)->stack_ptr) = (uint16_t)(&(thread_ptr));	\
+  SAVE_STATUS(t)
diff --git a/tos/lib/tosthreads/chips/msp430/sensors/BlockingMsp430InternalTemperatureC.nc b/tos/lib/tosthreads/chips/msp430/sensors/BlockingMsp430InternalTemperatureC.nc
new file mode 100644
index 00000000..6792017b
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/sensors/BlockingMsp430InternalTemperatureC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Msp430InternalTemperatureC is the temperature sensor available on
+ * the msp430-based platforms.
+ *
+ * To convert from ADC counts to temperature, convert to voltage by
+ * dividing by 4096 and multiplying by Vref (1.5V). Then subtract
+ * 0.986 from voltage and divide by 0.00355 to get degrees C.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-09-11 19:59:50 $
+ */
+ 
+/**
+ * Port to Tosthreads
+ *
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+generic configuration BlockingMsp430InternalTemperatureC() {
+  provides {
+    interface BlockingRead<uint16_t>;
+    interface BlockingReadStream<uint16_t>;
+  }
+}
+
+implementation {
+  components new BlockingAdcReadClientC();
+  BlockingRead = BlockingAdcReadClientC;
+
+  components new BlockingAdcReadStreamClientC();
+  BlockingReadStream = BlockingAdcReadStreamClientC;
+
+  components Msp430InternalTemperatureP;
+  BlockingAdcReadClientC.AdcConfigure -> Msp430InternalTemperatureP;
+  BlockingAdcReadStreamClientC.AdcConfigure -> Msp430InternalTemperatureP;
+}
diff --git a/tos/lib/tosthreads/chips/msp430/sensors/BlockingMsp430InternalVoltageC.nc b/tos/lib/tosthreads/chips/msp430/sensors/BlockingMsp430InternalVoltageC.nc
new file mode 100644
index 00000000..628f0918
--- /dev/null
+++ b/tos/lib/tosthreads/chips/msp430/sensors/BlockingMsp430InternalVoltageC.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Msp430InternalVoltageC is the voltage sensor available on the
+ * msp430-based platforms.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-09-11 19:59:50 $
+ */
+
+/**
+ * Port to Tosthreads
+ *
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+generic configuration BlockingMsp430InternalVoltageC() {
+  provides {
+    interface BlockingRead<uint16_t>;
+    interface BlockingReadStream<uint16_t>;
+  }
+}
+
+implementation {
+  components new BlockingAdcReadClientC();
+  BlockingRead = BlockingAdcReadClientC;
+
+  components new BlockingAdcReadStreamClientC();
+  BlockingReadStream = BlockingAdcReadStreamClientC;
+
+  components Msp430InternalVoltageP;
+  BlockingAdcReadClientC.AdcConfigure -> Msp430InternalVoltageP;
+  BlockingAdcReadStreamClientC.AdcConfigure -> Msp430InternalVoltageP;
+}
diff --git a/tos/lib/tosthreads/chips/pxa27x/HplPXA27xInterruptImplM.nc b/tos/lib/tosthreads/chips/pxa27x/HplPXA27xInterruptImplM.nc
new file mode 100644
index 00000000..f2ba748b
--- /dev/null
+++ b/tos/lib/tosthreads/chips/pxa27x/HplPXA27xInterruptImplM.nc
@@ -0,0 +1,237 @@
+// $Id: HplPXA27xInterruptImplM.nc,v 1.1 2008-06-12 14:02:31 klueska Exp $ 
+
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors:		Phil Buonadonna
+ *
+ * Edits:	Josh Herbach
+ * Revised: 09/02/2005
+ * 
+ * Edits:   Kevin Klues
+ * Revised: 05/27/2008
+ */
+
+module HplPXA27xInterruptM
+{
+  provides {
+    interface HplPXA27xInterrupt as PXA27xIrq[uint8_t id];
+    interface HplPXA27xInterruptCntl;
+  }
+  uses interface PlatformInterrupt;
+}
+
+implementation 
+{
+
+  uint32_t getICHP() {
+    uint32_t val;
+
+    asm volatile ("mrc p6,0,%0,c5,c0,0\n\t":"=r" (val));
+    return val;
+  }
+
+  /* Core PXA27X interrupt dispatch vectors */
+  /* DO NOT change the name of these functions */
+  void hplarmv_irq() __attribute__ ((interrupt ("IRQ"))) @C() @atomic_hwevent() {
+
+    uint32_t IRQPending;
+
+    IRQPending = getICHP();  // Determine which interrupt to service
+    IRQPending >>= 16;  // Right justify to the IRQ portion
+
+    while (IRQPending & (1 << 15)) {
+      uint8_t PeripheralID = (IRQPending & 0x3f); // Get rid of the Valid bit
+      signal PXA27xIrq.fired[PeripheralID]();     // Handler is responsible for clearing interrupt
+      call PlatformInterrupt.postAmble();
+      IRQPending = getICHP();  // Determine which interrupt to service
+      IRQPending >>= 16;  // Right justify to the IRQ portion
+    }
+
+    return;
+  }
+
+  void hplarmv_fiq() __attribute__ ((interrupt ("FIQ"))) @C() @atomic_hwevent() {
+      call PlatformInterrupt.postAmble();
+  } 
+
+  static uint8_t usedPriorities = 0;
+
+  /* Helper functions */
+  /* NOTE: Read-back of all register writes is necessary to ensure the data latches */
+
+  error_t allocate(uint8_t id, bool level, uint8_t priority)
+  {
+    uint32_t tmp;
+    error_t error = FAIL;
+
+    atomic{
+      uint8_t i;
+      if(usedPriorities == 0){//assumed that the table will have some entries
+	uint8_t PriorityTable[40], DuplicateTable[40];
+	for(i = 0; i < 40; i++){
+	  DuplicateTable[i] = PriorityTable[i] = 0xFF;
+	}
+	
+	for(i = 0; i < 40; i++)
+	  if(TOSH_IRP_TABLE[i] != 0xff){
+	    if(PriorityTable[TOSH_IRP_TABLE[i]] != 0xFF)/*duplicate priorities
+							  in the table, mark 
+							  for later fixing*/
+	      DuplicateTable[i] = PriorityTable[TOSH_IRP_TABLE[i]];
+	    else
+	      PriorityTable[TOSH_IRP_TABLE[i]] = i;
+	  }
+	
+	//compress table
+	for(i = 0; i < 40; i++){
+	  if(PriorityTable[i] != 0xff){
+	    PriorityTable[usedPriorities] = PriorityTable[i];
+	    if(i != usedPriorities)
+	      PriorityTable[i] = 0xFF;
+	    usedPriorities++;
+	  }
+	}
+
+	for(i = 0; i < 40; i++)
+	  if(DuplicateTable[i] != 0xFF){
+	    uint8_t j, ExtraTable[40];
+	    for(j = 0; DuplicateTable[i] != PriorityTable[j]; j++);
+	    memcpy(ExtraTable + j + 1, PriorityTable + j, usedPriorities - j);
+	    memcpy(PriorityTable + j + 1, ExtraTable + j + 1, 
+		   usedPriorities - j);
+	    PriorityTable[j] = i;
+	    usedPriorities++;
+	  }
+
+	for(i = 0; i < usedPriorities; i++){
+	  IPR(i) = (IPR_VALID | PriorityTable[i]);
+	  tmp = IPR(i);
+	}
+      }
+
+      if (id < 34){
+	if(priority == 0xff){
+	  priority = usedPriorities;
+	  usedPriorities++;
+	  IPR(priority) = (IPR_VALID | (id));
+	  tmp = IPR(priority);
+	}
+	if (level) {
+	  _ICLR(id) |= _PPID_Bit(id);
+	  tmp = _ICLR(id);
+	} 
+	
+	error = SUCCESS;
+      }
+    }
+    return error;
+  }
+  
+  void enable(uint8_t id)
+  {
+    uint32_t tmp;
+    atomic {
+      if (id < 34) {
+	_ICMR(id) |= _PPID_Bit(id);
+	tmp = _ICMR(id);
+      }
+    }
+    return;
+  }
+
+  void disable(uint8_t id)
+  {
+    uint32_t tmp;
+    atomic {
+      if (id < 34) {
+	_ICMR(id) &= ~(_PPID_Bit(id));
+	tmp = _ICMR(id);
+      }
+    }
+    return;
+  }
+
+  /* Interface implementation */
+
+  async command error_t PXA27xIrq.allocate[uint8_t id]()
+  {
+    return allocate(id, FALSE, TOSH_IRP_TABLE[id]);
+  }
+
+  async command void PXA27xIrq.enable[uint8_t id]()
+  {
+    enable(id);
+    return;
+  }
+
+  async command void PXA27xIrq.disable[uint8_t id]()
+  {
+    disable(id);
+    return;
+  }
+
+  async command void HplPXA27xInterruptCntl.setICCR_DIM(bool flag) {
+
+    if (flag) {
+      ICCR |= ICCR_DIM;
+    }
+    else {
+      ICCR = 0;
+    }
+    return;
+
+  }
+
+  async command bool HplPXA27xInterruptCntl.getICCR_DIM() {
+    bool result = FALSE;
+
+    if (ICCR & ICCR_DIM) {
+      result = TRUE;
+    }
+
+    return result;
+  }
+
+  default async event void PXA27xIrq.fired[uint8_t id]() 
+  {
+    return;
+  }
+
+}
diff --git a/tos/lib/tosthreads/chips/pxa27x/HplPXA27xInterruptM.nc b/tos/lib/tosthreads/chips/pxa27x/HplPXA27xInterruptM.nc
new file mode 100644
index 00000000..d1f56ac0
--- /dev/null
+++ b/tos/lib/tosthreads/chips/pxa27x/HplPXA27xInterruptM.nc
@@ -0,0 +1,66 @@
+// $Id: HplPXA27xInterruptM.nc,v 1.1 2008-06-12 14:02:31 klueska Exp $ 
+
+/*									tab:4
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors:		Phil Buonadonna
+ *
+ * Edits:	Josh Herbach
+ * Revised: 09/02/2005
+ *
+ * Edits:   Kevin Klues
+ * Revised: 05/27/2008
+ */
+
+configuration HplPXA27xInterruptM
+{
+  provides {
+    interface HplPXA27xInterrupt as PXA27xIrq[uint8_t id];
+    interface HplPXA27xInterruptCntl;
+  }
+}
+implementation {
+  components HplPXA27xInterruptImplM;
+  
+  PXA27xIrq = HplPXA27xInterruptImplM;
+  HplPXA27xInterruptCntl = HplPXA27xInterruptImplM;
+
+  components PlatformInterruptC;
+  HplInterruptP.PlatformInterrupt -> PlatformInterruptC;
+}
\ No newline at end of file
diff --git a/tos/lib/tosthreads/chips/pxa27x/chip_thread.h b/tos/lib/tosthreads/chips/pxa27x/chip_thread.h
new file mode 100644
index 00000000..d97b9ef0
--- /dev/null
+++ b/tos/lib/tosthreads/chips/pxa27x/chip_thread.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This file is derived from similar files in the TinyThread implementation
+ * by William P. McCartney from Cleveland State University (2006)
+ *
+ * This file contains MSP430 platform-specific routines for implementing
+ * threads in TinyOS
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+//Define on platform specific basis for inclusion in
+// the thread control block
+typedef struct thread_regs {
+} thread_regs_t;
+
+typedef uint16_t* stack_ptr_t;
+
+#define STACK_TOP(stack, size)    \
+  (&(((uint8_t*)stack)[size - sizeof(stack_ptr_t)]))
+
+//Save stack pointer
+#define SAVE_STACK_PTR(t)
+
+//Save status register
+#define SAVE_STATUS(t)
+
+//Save General Purpose Registers
+#define SAVE_GPR(t)
+
+//Restore stack pointer
+#define RESTORE_STACK_PTR(t)
+
+//Restore status register
+#define RESTORE_STATUS(t)
+
+//Restore the general purpose registers
+#define RESTORE_GPR(t)
+
+#define SAVE_TCB(t)
+
+#define RESTORE_TCB(t)
+
+#define SWITCH_CONTEXTS(from, to)
+
+#define SWAP_STACK_PTR(OLD, NEW)
+
+#define PREPARE_THREAD(t, thread_ptr)
diff --git a/tos/lib/tosthreads/chips/tda5250/Tda5250ActiveMessageC.nc b/tos/lib/tosthreads/chips/tda5250/Tda5250ActiveMessageC.nc
new file mode 100644
index 00000000..b7e3aba2
--- /dev/null
+++ b/tos/lib/tosthreads/chips/tda5250/Tda5250ActiveMessageC.nc
@@ -0,0 +1,99 @@
+// $Id: Tda5250ActiveMessageC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/*                                                                      
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:             Philip Levis
+ * Date last modified:  $Id: Tda5250ActiveMessageC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer for the TDA5250 radio. This configuration
+ * just layers the AM dispatch (Tda5250ActiveMessageP) on top of the
+ * underlying TDA5250 radio packet.
+ *
+ * @author Philip Levis
+ * @author Vlado Handziski (TDA5250 modifications)
+ * @date July 20 2005
+ */
+
+
+#include "Timer.h"
+
+configuration Tda5250ActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface PacketAcknowledgements;
+    interface Tda5250Packet;	
+  }
+}
+implementation {
+
+  components Tda5250ActiveMessageP as AM, RadioDataLinkC as Radio;
+  components ActiveMessageAddressC as Address;
+
+  SplitControl = Radio;
+
+  Packet       = Radio;
+  PacketAcknowledgements = Radio;
+  Tda5250Packet = AM;		
+
+  AMSend         = AM;
+  Receive        = AM.Receive;
+  ReceiveDefault = AM.ReceiveDefault;
+  Snoop          = AM.Snoop;
+  SnoopDefault   = AM.SnoopDefault;
+  AMPacket       = AM;
+
+  AM.SubSend    -> Radio.Send;
+  AM.SubReceive -> Radio.Receive;
+  AM.SubPacket -> Radio.Packet;
+  AM.amAddress -> Address;
+}
diff --git a/tos/lib/tosthreads/chips/tda5250/Tda5250ActiveMessageP.nc b/tos/lib/tosthreads/chips/tda5250/Tda5250ActiveMessageP.nc
new file mode 100644
index 00000000..f050a872
--- /dev/null
+++ b/tos/lib/tosthreads/chips/tda5250/Tda5250ActiveMessageP.nc
@@ -0,0 +1,192 @@
+// -*- mode:c++; indent-tabs-mode: nil -*- $Id: Tda5250ActiveMessageP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+/* 
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:             Philip Levis
+ * Date last modified:  $Id: Tda5250ActiveMessageP.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+ *
+ */
+
+/**
+ * @author Philip Levis
+ * @author Vlado Handziski (TDA5250 modifications)
+ * @date July 20 2005
+ */
+
+module Tda5250ActiveMessageP {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+    interface AMPacket;
+    interface Tda5250Packet;
+  }
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+    interface Packet as SubPacket;
+    command am_addr_t amAddress();
+  }
+}
+implementation {
+
+    tda5250_header_t* getHeader( message_t* msg ) {
+        return (tda5250_header_t*)( msg->data - sizeof(tda5250_header_t) );
+    }
+
+    tda5250_metadata_t* getMetadata(message_t* amsg) {
+        return (tda5250_metadata_t*)((uint8_t*)amsg->footer + sizeof(message_radio_footer_t));
+    }
+    
+  command error_t AMSend.send[am_id_t id](am_addr_t addr,
+                                          message_t* msg,
+                                          uint8_t len) {
+    tda5250_header_t* header = getHeader(msg);
+    header->type = id;
+    header->dest = addr;
+    header->src = call amAddress();
+    return call SubSend.send(msg, len);
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call SubPacket.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+    return call SubPacket.getPayload(m, len);
+  }
+
+  /* Receiving a packet */
+
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    if (call AMPacket.isForMe(msg)) {
+      return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+    else {
+      return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+  }
+
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    tda5250_header_t* header = getHeader(amsg);
+    return header->dest;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    tda5250_header_t* header = getHeader(amsg);
+    header->dest = addr;
+  }
+
+  command am_addr_t AMPacket.source(message_t* amsg) {
+    tda5250_header_t* header = getHeader(amsg);
+    return header->src;
+  }
+  
+  command void AMPacket.setSource(message_t* amsg, am_addr_t addr) {
+    tda5250_header_t* header = getHeader(amsg);
+    header->src = addr;
+  }
+  
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return (call AMPacket.destination(amsg) == call AMPacket.address() ||
+            call AMPacket.destination(amsg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    tda5250_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t type) {
+    tda5250_header_t* header = getHeader(amsg);
+    header->type = type;
+  }
+
+  command void AMPacket.setGroup(message_t* msg, am_group_t group) {
+     return;
+  }
+
+  command am_group_t AMPacket.group(message_t* msg) {
+    return TOS_AM_GROUP;
+  }
+
+  command am_group_t AMPacket.localGroup() {
+    return TOS_AM_GROUP;
+  }
+
+  async command uint8_t Tda5250Packet.getSnr(message_t* msg) {
+    return getMetadata(msg)->strength;
+  }
+
+  default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+    return;
+  }
+
+  default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return signal ReceiveDefault.receive[id](msg, payload, len);
+  }
+
+  default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return signal SnoopDefault.receive[id](msg, payload, len);
+  }
+
+  default event message_t* SnoopDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+}
diff --git a/tos/lib/tosthreads/chips/xe1205/XE1205ActiveMessageC.nc b/tos/lib/tosthreads/chips/xe1205/XE1205ActiveMessageC.nc
new file mode 100644
index 00000000..e0173159
--- /dev/null
+++ b/tos/lib/tosthreads/chips/xe1205/XE1205ActiveMessageC.nc
@@ -0,0 +1,87 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+configuration XE1205ActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface PacketAcknowledgements;
+    #ifdef LOW_POWER_LISTENING
+    interface LowPowerListening;
+    #endif
+  }
+}
+implementation {
+  components XE1205SendReceiveC;
+  Packet                 = XE1205SendReceiveC;
+  PacketAcknowledgements = XE1205SendReceiveC;
+ components XE1205ActiveMessageP;
+
+#ifdef LOW_POWER_LISTENING
+  components  XE1205LowPowerListeningC as Lpl;
+  LowPowerListening = Lpl;
+  XE1205ActiveMessageP.SubSend -> Lpl.Send;
+  XE1205ActiveMessageP.SubReceive -> Lpl.Receive;
+  SplitControl = Lpl;
+#else
+ 
+  XE1205ActiveMessageP.Packet     -> XE1205SendReceiveC;
+  XE1205ActiveMessageP.SubSend    -> XE1205SendReceiveC.Send;
+  XE1205ActiveMessageP.SubReceive -> XE1205SendReceiveC.Receive;
+  SplitControl = XE1205SendReceiveC;
+#endif
+  AMPacket = XE1205ActiveMessageP;
+  AMSend   = XE1205ActiveMessageP;
+  Receive = XE1205ActiveMessageP.Receive;
+  ReceiveDefault = XE1205ActiveMessageP.ReceiveDefault;
+  Snoop = XE1205ActiveMessageP.Snoop;
+  SnoopDefault = XE1205ActiveMessageP.SnoopDefault;
+
+
+  components ActiveMessageAddressC;  
+  XE1205ActiveMessageP.amAddress -> ActiveMessageAddressC;  
+
+
+  components XE1205IrqConfC, XE1205PatternConfC, XE1205PhyRssiConfC;
+
+}
diff --git a/tos/lib/tosthreads/chips/xe1205/XE1205ActiveMessageP.nc b/tos/lib/tosthreads/chips/xe1205/XE1205ActiveMessageP.nc
new file mode 100644
index 00000000..31cd6dce
--- /dev/null
+++ b/tos/lib/tosthreads/chips/xe1205/XE1205ActiveMessageP.nc
@@ -0,0 +1,169 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * @author Henri Dubois-Ferriere
+ *
+ */
+module XE1205ActiveMessageP {
+    uses interface Packet;
+    uses interface Send as SubSend;
+    uses interface Receive as SubReceive;
+    uses command am_addr_t amAddress();
+
+    provides interface AMSend[am_id_t id];
+    provides interface AMPacket;
+    provides interface Receive[am_id_t id];
+    provides interface Receive as ReceiveDefault[am_id_t id];
+    provides interface Receive as Snoop[am_id_t id];
+    provides interface Receive as SnoopDefault[am_id_t id];
+}
+implementation {
+  // xxx - this is replicated in ActiveMessageP.
+  // put in XE1205.h?
+  xe1205_header_t* getHeader( message_t* msg ) {
+    return (xe1205_header_t*)( msg->data - sizeof(xe1205_header_t) );
+  }
+
+  command am_addr_t AMPacket.address() {
+    return call amAddress();
+  }
+ 
+  command am_addr_t AMPacket.destination(message_t* msg) {
+    xe1205_header_t* header = getHeader(msg);
+    return header->dest;
+  }
+
+  command void AMPacket.setDestination(message_t* msg, am_addr_t addr) {
+    xe1205_header_t* header = getHeader(msg);
+    header->dest = addr;
+  }
+  
+  command am_addr_t AMPacket.source(message_t* msg) {
+    xe1205_header_t* header = getHeader(msg);
+    return header->source;
+  }
+
+  command void AMPacket.setSource(message_t* msg, am_addr_t addr) {
+    xe1205_header_t* header = getHeader(msg);
+    header->source = addr;
+  }
+  
+  command bool AMPacket.isForMe(message_t* msg) {
+    return (call AMPacket.destination(msg) == call AMPacket.address() ||
+	    call AMPacket.destination(msg) == AM_BROADCAST_ADDR);
+  }
+
+  command am_id_t AMPacket.type(message_t* msg) {
+    xe1205_header_t* header = getHeader(msg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* msg, am_id_t type) {
+    xe1205_header_t* header = getHeader(msg);
+    header->type = type;
+  }
+
+  command void AMPacket.setGroup(message_t* msg, am_group_t group) {
+    xe1205_header_t* header = getHeader(msg);
+    header->group = group;
+  }
+
+  command am_group_t AMPacket.group(message_t* msg) {
+    xe1205_header_t* header = getHeader(msg);
+    return header->group;
+  }
+
+  command am_group_t AMPacket.localGroup() {
+    return TOS_AM_GROUP;
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+
+  command error_t AMSend.send[am_id_t id](am_addr_t addr, 
+					  message_t* msg, 
+					  uint8_t len) {
+    xe1205_header_t* header = getHeader(msg);
+    header->type = id;
+    header->dest = addr;
+    header->source = call AMPacket.address();
+    header->group = TOS_AM_GROUP;
+    return call SubSend.send(msg, len);
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+ default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t err) {
+   return;
+ }
+
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) __attribute__ ((noinline)) {
+    if (call AMPacket.isForMe(msg)) {
+      return signal Receive.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+    else {
+      return signal Snoop.receive[call AMPacket.type(msg)](msg, payload, len);
+    }
+  }
+  
+  default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return signal ReceiveDefault.receive[id](msg, payload, len);
+  }
+
+  default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return signal SnoopDefault.receive[id](msg, payload, len);
+  }
+
+  default event message_t* SnoopDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+
+  
+}
+
diff --git a/tos/lib/tosthreads/csystem/CAMRadioC.nc b/tos/lib/tosthreads/csystem/CAMRadioC.nc
new file mode 100644
index 00000000..57c40b57
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CAMRadioC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "tosthread_amradio.h"
+
+configuration CAMRadioC {}
+
+implementation {
+  components CAMRadioP as CAMP;
+  components BlockingActiveMessageC as AM;
+  
+  CAMP.BlockingStdControl -> AM;
+  CAMP.BlockingReceive -> AM.BlockingReceive;
+  CAMP.BlockingSnoop -> AM.BlockingSnoop;
+  CAMP.BlockingReceiveAny -> AM.BlockingReceiveAny;
+  CAMP.BlockingSnoopAny -> AM.BlockingSnoopAny;
+  CAMP.Send -> AM;
+  CAMP.Packet -> AM;
+  CAMP.AMPacket -> AM;
+  CAMP.PacketAcknowledgements -> AM;
+}
diff --git a/tos/lib/tosthreads/csystem/CAMRadioP.nc b/tos/lib/tosthreads/csystem/CAMRadioP.nc
new file mode 100644
index 00000000..f9d875d4
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CAMRadioP.nc
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module CAMRadioP {
+  uses {
+    interface BlockingStdControl;
+    interface BlockingReceive[am_id_t amId];
+    interface BlockingReceive as BlockingReceiveAny;
+    interface BlockingReceive as BlockingSnoop[am_id_t amId];
+    interface BlockingReceive as BlockingSnoopAny;
+    interface BlockingAMSend as Send[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  error_t amRadioStart() @C() AT_SPONTANEOUS { 
+    return call BlockingStdControl.start();
+  }
+  error_t amRadioStop() @C() AT_SPONTANEOUS { 
+    return call BlockingStdControl.stop();
+  }
+  error_t amRadioReceive(message_t* m, uint32_t timeout, am_id_t amId) @C() AT_SPONTANEOUS {
+    if(amId == AM_RECEIVE_FROM_ANY)
+      return call BlockingReceiveAny.receive(m, timeout);
+    else 
+      return call BlockingReceive.receive[amId](m, timeout);
+  }
+  error_t amRadioSnoop(message_t* m, uint32_t timeout, am_id_t amId) @C() AT_SPONTANEOUS {
+    if(amId == AM_RECEIVE_FROM_ANY)
+      return call BlockingSnoopAny.receive(m, timeout);
+    else 
+      return call BlockingSnoop.receive[amId](m, timeout);
+  }
+  error_t amRadioSend(am_addr_t addr, message_t* msg, uint8_t len, am_id_t amId) @C() AT_SPONTANEOUS {
+    return call Send.send[amId](addr, msg, len);
+  }
+  am_addr_t amRadioGetLocalAddress() @C() AT_SPONTANEOUS {
+    return call AMPacket.address();
+  }
+  am_group_t amRadioGetLocalGroup() @C() AT_SPONTANEOUS {
+    return call AMPacket.localGroup();
+  }
+  am_addr_t amRadioGetDestination(message_t* amsg) @C() AT_SPONTANEOUS {
+    return call AMPacket.destination(amsg);
+  }
+  am_addr_t amRadioGetSource(message_t* amsg) @C() AT_SPONTANEOUS {
+    return call AMPacket.source(amsg);
+  }
+  void amRadioSetDestination(message_t* amsg, am_addr_t addr) @C() AT_SPONTANEOUS {
+    call AMPacket.setDestination(amsg, addr);
+  }
+  void amRadioSetSource(message_t* amsg, am_addr_t addr) @C() AT_SPONTANEOUS {
+    call AMPacket.setSource(amsg, addr);
+  }
+  bool amRadioIsForMe(message_t* amsg) @C() AT_SPONTANEOUS {
+    return call AMPacket.isForMe(amsg);
+  }
+  am_id_t amRadioGetType(message_t* amsg) @C() AT_SPONTANEOUS {
+    return call AMPacket.type(amsg);
+  }
+  void amRadioSetType(message_t* amsg, am_id_t t) @C() AT_SPONTANEOUS {
+    call AMPacket.setType(amsg, t);
+  }
+  am_group_t amRadioGetGroup(message_t* amsg) @C() AT_SPONTANEOUS {
+    return call AMPacket.group(amsg);
+  }
+  void amRadioSetGroup(message_t* amsg, am_group_t grp) @C() AT_SPONTANEOUS {
+    call AMPacket.setGroup(amsg, grp);
+  }
+  void radioClear(message_t* msg) @C() AT_SPONTANEOUS {
+    call Packet.clear(msg);
+  }
+  uint8_t radioGetPayloadLength(message_t* msg) @C() AT_SPONTANEOUS {
+    return call Packet.payloadLength(msg);
+  }
+  void  radioSetPayloadLength(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS {
+    call Packet.setPayloadLength(msg, len);
+  }
+  uint8_t radioMaxPayloadLength() @C() AT_SPONTANEOUS {
+    return call Packet.maxPayloadLength();
+  }
+  void* radioGetPayload(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS {
+    return call Packet.getPayload(msg, len);
+  }
+  error_t radioRequestAck( message_t* msg ) @C() AT_SPONTANEOUS {
+    return call PacketAcknowledgements.requestAck(msg);
+  }
+  error_t radioNoAck( message_t* msg ) @C() AT_SPONTANEOUS {
+    return call PacketAcknowledgements.noAck(msg);
+  }
+  bool radioWasAcked(message_t* msg) @C() AT_SPONTANEOUS {
+    return call PacketAcknowledgements.wasAcked(msg);
+  }
+}
diff --git a/tos/lib/tosthreads/csystem/CAMSerialC.nc b/tos/lib/tosthreads/csystem/CAMSerialC.nc
new file mode 100644
index 00000000..3dd2653e
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CAMSerialC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "tosthread_amserial.h"
+
+configuration CAMSerialC {}
+
+implementation {
+  components CAMSerialP as CAMP;
+  components BlockingSerialActiveMessageC as AM;
+  
+  CAMP.BlockingStdControl -> AM;
+  CAMP.BlockingReceive -> AM.BlockingReceive;
+  CAMP.BlockingReceiveAny -> AM.BlockingReceiveAny;
+  CAMP.Send -> AM;
+  CAMP.Packet -> AM;
+  CAMP.AMPacket -> AM;
+  CAMP.PacketAcknowledgements -> AM;
+}
diff --git a/tos/lib/tosthreads/csystem/CAMSerialP.nc b/tos/lib/tosthreads/csystem/CAMSerialP.nc
new file mode 100644
index 00000000..ca2cda5d
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CAMSerialP.nc
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module CAMSerialP {
+  uses {
+    interface BlockingStdControl;
+    interface BlockingReceive[am_id_t amId];
+    interface BlockingReceive as BlockingReceiveAny;
+    interface BlockingAMSend as Send[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  error_t amSerialStart() @C() AT_SPONTANEOUS { 
+    return call BlockingStdControl.start();
+  }
+  error_t amSerialStop() @C() AT_SPONTANEOUS { 
+    return call BlockingStdControl.stop();
+  }
+  error_t amSerialReceive(message_t* m, uint32_t timeout, am_id_t amId) @C() AT_SPONTANEOUS {
+    if(amId == AM_RECEIVE_FROM_ANY)
+      return call BlockingReceiveAny.receive(m, timeout);
+    else 
+      return call BlockingReceive.receive[amId](m, timeout);
+  }
+  error_t amSerialSend(am_addr_t addr, message_t* msg, uint8_t len, am_id_t amId) @C() AT_SPONTANEOUS {
+    return call Send.send[amId](addr, msg, len);
+  }
+  am_addr_t amSerialLocalAddress() @C() AT_SPONTANEOUS {
+    return call AMPacket.address();
+  }
+  am_group_t amSerialGetLocalGroup() @C() AT_SPONTANEOUS {
+    return call AMPacket.localGroup();
+  }
+  am_addr_t amSerialGetDestination(message_t* amsg) @C() AT_SPONTANEOUS {
+    return call AMPacket.destination(amsg);
+  }
+  am_addr_t amSerialGetSource(message_t* amsg) @C() AT_SPONTANEOUS {
+    return call AMPacket.source(amsg);
+  }
+  void amSerialSetDestination(message_t* amsg, am_addr_t addr) @C() AT_SPONTANEOUS {
+    call AMPacket.setDestination(amsg, addr);
+  }
+  void amSerialSetSource(message_t* amsg, am_addr_t addr) @C() AT_SPONTANEOUS {
+    call AMPacket.setSource(amsg, addr);
+  }
+  bool amSerialIsForMe(message_t* amsg) @C() AT_SPONTANEOUS {
+    return call AMPacket.isForMe(amsg);
+  }
+  am_id_t amSerialGetType(message_t* amsg) @C() AT_SPONTANEOUS {
+    return call AMPacket.type(amsg);
+  }
+  void amSerialSetType(message_t* amsg, am_id_t t) @C() AT_SPONTANEOUS {
+    call AMPacket.setType(amsg, t);
+  }
+  am_group_t amSerialGetGroup(message_t* amsg) @C() AT_SPONTANEOUS {
+    return call AMPacket.group(amsg);
+  }
+  void amSerialSetGroup(message_t* amsg, am_group_t grp) @C() AT_SPONTANEOUS {
+    call AMPacket.setGroup(amsg, grp);
+  }
+  void serialClear(message_t* msg) @C() AT_SPONTANEOUS {
+    call Packet.clear(msg);
+  }
+  uint8_t serialGetPayloadLength(message_t* msg) @C() AT_SPONTANEOUS {
+    return call Packet.payloadLength(msg);
+  }
+  void  serialSetPayloadLength(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS {
+    call Packet.setPayloadLength(msg, len);
+  }
+  uint8_t serialMaxPayloadLength() @C() AT_SPONTANEOUS {
+    return call Packet.maxPayloadLength();
+  }
+  void* serialGetPayload(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS {
+    return call Packet.getPayload(msg, len);
+  }
+  error_t serialRequestAck( message_t* msg ) @C() AT_SPONTANEOUS {
+    return call PacketAcknowledgements.requestAck(msg);
+  }
+  error_t serialNoAck( message_t* msg ) @C() AT_SPONTANEOUS {
+    return call PacketAcknowledgements.noAck(msg);
+  }
+  bool serialWasAcked(message_t* msg) @C() AT_SPONTANEOUS {
+    return call PacketAcknowledgements.wasAcked(msg);
+  }
+}
diff --git a/tos/lib/tosthreads/csystem/CBlockStorageC.nc b/tos/lib/tosthreads/csystem/CBlockStorageC.nc
new file mode 100644
index 00000000..c34b68f5
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CBlockStorageC.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration CBlockStorageC {}
+
+implementation {
+  components CBlockStorageP,
+             BlockingBlockStorageP,
+             VolumeMapC;
+             
+  CBlockStorageP.BlockingBlock -> BlockingBlockStorageP;
+  
+  BlockingBlockStorageP.BlockRead -> VolumeMapC;
+  BlockingBlockStorageP.BlockWrite -> VolumeMapC;
+}
diff --git a/tos/lib/tosthreads/csystem/CBlockStorageP.nc b/tos/lib/tosthreads/csystem/CBlockStorageP.nc
new file mode 100644
index 00000000..0982e36d
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CBlockStorageP.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module CBlockStorageP {
+  uses {
+    interface BlockingBlock[uint8_t volume_id];
+  }
+}
+
+implementation {
+  error_t volumeBlockRead(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len) @C() AT_SPONTANEOUS
+  {
+    return call BlockingBlock.read[volumeId](addr, buf, len);
+  }
+  
+  error_t volumeBlockWrite(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len)  @C() AT_SPONTANEOUS
+  {
+    return call BlockingBlock.write[volumeId](addr, buf, len);
+  }
+  
+  error_t volumeBlockCrc(uint8_t volumeId, storage_addr_t addr, storage_len_t* len, uint16_t crc, uint16_t *finalCrc) @C() AT_SPONTANEOUS
+  {
+    return call BlockingBlock.computeCrc[volumeId](addr, len, crc, finalCrc);
+  }
+  
+  error_t volumeBlockErase(uint8_t volumeId) @C() AT_SPONTANEOUS
+  {
+    return call BlockingBlock.erase[volumeId]();
+  }
+  
+  error_t volumeBlockSync(uint8_t volumeId) @C() AT_SPONTANEOUS
+  {
+    return call BlockingBlock.sync[volumeId]();
+  }
+}
diff --git a/tos/lib/tosthreads/csystem/CConfigStorageC.nc b/tos/lib/tosthreads/csystem/CConfigStorageC.nc
new file mode 100644
index 00000000..b65d0b7a
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CConfigStorageC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2009 RWTH Aachen University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author J— çgila Bitsch Link <jo.bitsch@cs.rwth-aachen.de>
+ */
+
+configuration CConfigStorageC {}
+
+implementation {
+  components CConfigStorageP,
+             BlockingConfigStorageP,
+             VolumeMapC;
+
+  CConfigStorageP.BlockingConfig -> BlockingConfigStorageP;
+  CConfigStorageP.BlockingMount -> BlockingConfigStorageP;
+
+  BlockingConfigStorageP.ConfigMount -> VolumeMapC.Mount;
+  BlockingConfigStorageP.ConfigStorage -> VolumeMapC.ConfigStorage;
+}
diff --git a/tos/lib/tosthreads/csystem/CConfigStorageP.nc b/tos/lib/tosthreads/csystem/CConfigStorageP.nc
new file mode 100644
index 00000000..6666310a
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CConfigStorageP.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2009 RWTH Aachen University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author J— çgila Bitsch Link <jo.bitsch@cs.rwth-aachen.de>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module CConfigStorageP {
+  uses {
+    interface BlockingConfig[uint8_t volume_id];
+    interface BlockingMount[uint8_t volume_id];
+  }
+}
+
+implementation {
+  error_t volumeConfigMount(uint8_t volumeId) @C() AT_SPONTANEOUS {
+    return call BlockingMount.mount[volumeId]();
+  }
+  
+  error_t volumeConfigRead(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len) @C() AT_SPONTANEOUS {
+    return call BlockingConfig.read[volumeId](addr, buf, len);
+  }
+  
+  error_t volumeConfigWrite(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len) @C() AT_SPONTANEOUS {
+    return call BlockingConfig.write[volumeId](addr, buf, len);
+  }
+  
+  error_t volumeConfigCommit(uint8_t volumeId) @C() AT_SPONTANEOUS {
+    return call BlockingConfig.commit[volumeId]();
+  }
+  
+  storage_len_t volumeConfigGetSize(uint8_t volumeId) @C() AT_SPONTANEOUS {
+    return call BlockingConfig.getSize[volumeId]();
+  }
+  
+  bool volumeConfigValid(uint8_t volumeId) @C() AT_SPONTANEOUS {
+    return call BlockingConfig.valid[volumeId]();
+  }
+}
diff --git a/tos/lib/tosthreads/csystem/CLedsC.nc b/tos/lib/tosthreads/csystem/CLedsC.nc
new file mode 100644
index 00000000..3ec7bacd
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CLedsC.nc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+configuration CLedsC {}
+implementation {
+  components LedsC;
+  components CLedsP;
+  
+  CLedsP.Leds -> LedsC;
+}
+
diff --git a/tos/lib/tosthreads/csystem/CLedsP.nc b/tos/lib/tosthreads/csystem/CLedsP.nc
new file mode 100644
index 00000000..63fa4773
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CLedsP.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+ 
+module CLedsP {
+  uses {
+    interface Leds;
+  }
+}
+implementation {
+  void led0On() @C() AT_SPONTANEOUS {
+    call Leds.led0On();
+  }
+  void led0Off() @C() AT_SPONTANEOUS {
+    call Leds.led0Off();
+  }
+  void led0Toggle() @C() AT_SPONTANEOUS{
+    call Leds.led0Toggle();
+  }
+
+  void led1On() @C() AT_SPONTANEOUS{
+    call Leds.led1On();
+  }
+  void led1Off() @C() AT_SPONTANEOUS{
+    call Leds.led1Off();
+  }
+  void led1Toggle() @C() AT_SPONTANEOUS{
+    call Leds.led1Toggle();
+  }
+  
+  void led2On() @C() AT_SPONTANEOUS{
+    call Leds.led2On();
+  }
+  void led2Off() @C() AT_SPONTANEOUS{
+    call Leds.led2Off();
+  }
+  void led2Toggle() @C() AT_SPONTANEOUS{
+    call Leds.led2Toggle();
+  }
+
+  uint8_t getLeds() @C() AT_SPONTANEOUS{
+    return call Leds.get();
+  }
+  void setLeds(uint8_t val) @C() AT_SPONTANEOUS{
+    call Leds.set(val);
+  }
+}
diff --git a/tos/lib/tosthreads/csystem/CLinkedListC.nc b/tos/lib/tosthreads/csystem/CLinkedListC.nc
new file mode 100644
index 00000000..994e89ba
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CLinkedListC.nc
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+ 
+#include "tosthread_linked_list.h"
+
+configuration CLinkedListC {}
+implementation {
+  components LinkedListC;
+  components CLinkedListP;
+  
+  CLinkedListP.LinkedList -> LinkedListC;
+}
+
diff --git a/tos/lib/tosthreads/csystem/CLinkedListP.nc b/tos/lib/tosthreads/csystem/CLinkedListP.nc
new file mode 100644
index 00000000..ec15e4e7
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CLinkedListP.nc
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+
+module CLinkedListP { 
+  uses interface LinkedList;
+}
+implementation { 
+  void linked_list_init(linked_list_t* l) @C() AT_SPONTANEOUS {  
+    call LinkedList.init(l);
+  }
+  void linked_list_clear(linked_list_t* l) @C() AT_SPONTANEOUS { 
+    call LinkedList.clear(l);
+  }
+  uint8_t linked_list_size(linked_list_t* l) @C() AT_SPONTANEOUS { 
+    return call LinkedList.size(l);
+  }
+  error_t linked_list_addFirst(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { 
+    return call LinkedList.addFirst(l, e);
+  }
+  list_element_t* linked_list_getFirst(linked_list_t* l) @C() AT_SPONTANEOUS { 
+    return call LinkedList.getFirst(l);
+  }
+  list_element_t* linked_list_removeFirst(linked_list_t* l) @C() AT_SPONTANEOUS { 
+    return call LinkedList.removeFirst(l);
+  }
+  error_t linked_list_addLast(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { 
+    return call LinkedList.addLast(l, e);
+  }
+  list_element_t* linked_list_getLast(linked_list_t* l) @C() AT_SPONTANEOUS { 
+    return call LinkedList.getLast(l);
+  }
+  list_element_t* linked_list_removeLast(linked_list_t* l) @C() AT_SPONTANEOUS { 
+    return call LinkedList.removeLast(l);
+  }
+  error_t linked_list_addAt(linked_list_t* l, list_element_t* e, uint8_t i) @C() AT_SPONTANEOUS { 
+    return call LinkedList.addAt(l, e, i);
+  }
+  list_element_t* linked_list_getAt(linked_list_t* l, uint8_t i) @C() AT_SPONTANEOUS { 
+    return call LinkedList.getAt(l, i);
+  }
+  list_element_t* linked_list_removeAt(linked_list_t* l, uint8_t i) @C() AT_SPONTANEOUS { 
+    return call LinkedList.removeAt(l, i);
+  }  
+  error_t linked_list_addAfter(linked_list_t* l, list_element_t* first, list_element_t* second) @C() AT_SPONTANEOUS { 
+    return call LinkedList.addAfter(l, first, second);
+  }
+  error_t linked_list_addBefore(linked_list_t* l, list_element_t* first, list_element_t* e) @C() AT_SPONTANEOUS { 
+    return call LinkedList.addBefore(l, first, e);
+  }
+  list_element_t* linked_list_getAfter(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { 
+    return call LinkedList.getAfter(l, e);
+  }  
+  list_element_t* linked_list_getBefore(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { 
+    return call LinkedList.getBefore(l, e);
+  }
+  list_element_t* linked_list_remove(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { 
+    return call LinkedList.remove(l, e);
+  }  
+  list_element_t* linked_list_removeBefore(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { 
+    return call LinkedList.removeBefore(l, e);
+  }  
+  list_element_t* linked_list_removeAfter(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { 
+    return call LinkedList.removeAfter(l, e);
+  }  
+  uint8_t linked_list_indexOf(linked_list_t* l, list_element_t* e) @C() AT_SPONTANEOUS { 
+    return call LinkedList.indexOf(l, e);
+  }
+}
diff --git a/tos/lib/tosthreads/csystem/CLogStorageC.nc b/tos/lib/tosthreads/csystem/CLogStorageC.nc
new file mode 100644
index 00000000..ea23a54a
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CLogStorageC.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration CLogStorageC {}
+
+implementation {
+  components CLogStorageP,
+             BlockingLogStorageP,
+             VolumeMapC;
+             
+  CLogStorageP.BlockingLog -> BlockingLogStorageP;
+  
+  BlockingLogStorageP.LogRead -> VolumeMapC;
+  BlockingLogStorageP.LogWrite -> VolumeMapC;
+}
diff --git a/tos/lib/tosthreads/csystem/CLogStorageP.nc b/tos/lib/tosthreads/csystem/CLogStorageP.nc
new file mode 100644
index 00000000..92638a7d
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CLogStorageP.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module CLogStorageP {
+  uses {
+    interface BlockingLog[uint8_t volume_id];
+  }
+}
+implementation {
+  error_t volumeLogRead(uint8_t volumeId, void *buf, storage_len_t *len) @C() AT_SPONTANEOUS {
+    return call BlockingLog.read[volumeId](buf, len);
+  }
+  storage_cookie_t volumeLogCurrentReadOffset(uint8_t volumeId) @C() AT_SPONTANEOUS {
+    return call BlockingLog.currentReadOffset[volumeId]();
+  }
+  error_t volumeLogSeek(uint8_t volumeId, storage_cookie_t offset) @C() AT_SPONTANEOUS {
+    return call BlockingLog.seek[volumeId](offset);
+  }
+  storage_len_t volumeLogGetSize(uint8_t volumeId) @C() AT_SPONTANEOUS {
+    return call BlockingLog.getSize[volumeId]();
+  }  
+  error_t volumeLogAppend(uint8_t volumeId, void* buf, storage_len_t *len, bool *recordsLost) @C() AT_SPONTANEOUS {
+    return call BlockingLog.append[volumeId](buf, len, recordsLost);
+  }
+  storage_cookie_t volumeLogCurrentWriteOffset(uint8_t volumeId) @C() AT_SPONTANEOUS {
+    return call BlockingLog.currentWriteOffset[volumeId]();
+  }
+  error_t volumeLogErase(uint8_t volumeId) @C() AT_SPONTANEOUS {
+    return call BlockingLog.erase[volumeId]();
+  }
+  error_t volumeLogSync(uint8_t volumeId) @C() AT_SPONTANEOUS {
+    return call BlockingLog.sync[volumeId]();
+  }
+}
diff --git a/tos/lib/tosthreads/csystem/CQueueC.nc b/tos/lib/tosthreads/csystem/CQueueC.nc
new file mode 100644
index 00000000..6d958cbd
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CQueueC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "tosthread_linked_list.h"
+#include "tosthread_queue.h"
+
+module CQueueC {}
+implementation { 
+  void queue_init(queue_t* q) @C() AT_SPONTANEOUS {  
+    linked_list_init( &(q->l) );
+  }
+  void queue_clear(queue_t* q) @C() AT_SPONTANEOUS { 
+    linked_list_clear( &(q->l) );
+  }
+  error_t queue_enqueue(queue_t* q, queue_element_t* e) @C() AT_SPONTANEOUS { 
+    return linked_list_addLast(&(q->l), (list_element_t*)e);
+  }
+  queue_element_t* queue_dequeue(queue_t* q) @C() AT_SPONTANEOUS { 
+    return (queue_element_t*)linked_list_removeFirst( &(q->l) );
+  }
+  queue_element_t* queue_remove(queue_t* q, queue_element_t* e) @C() AT_SPONTANEOUS { 
+    return (queue_element_t*)linked_list_remove(&(q->l), (list_element_t*)e);
+  }
+  uint8_t queue_size(queue_t* q) @C() AT_SPONTANEOUS { 
+    return linked_list_size( &(q->l) );
+  }
+  bool queue_is_empty(queue_t* q) @C() AT_SPONTANEOUS { 
+    return (linked_list_size( &(q->l) ) == 0);
+  }
+}
diff --git a/tos/lib/tosthreads/csystem/CRandomC.nc b/tos/lib/tosthreads/csystem/CRandomC.nc
new file mode 100644
index 00000000..f29d2df4
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CRandomC.nc
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2009 RWTH Aachen University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author J— çgila Bitsch Link <jo.bitsch@cs.rwth-aachen.de>
+ */
+ 
+configuration CRandomC {}
+
+implementation {
+  components CRandomP,
+             RandomC;
+
+  CRandomP.Random -> RandomC;
+  CRandomP.SeedInit -> RandomC;
+}
diff --git a/tos/lib/tosthreads/csystem/CRandomP.nc b/tos/lib/tosthreads/csystem/CRandomP.nc
new file mode 100644
index 00000000..acdee52f
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CRandomP.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2009 RWTH Aachen University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author J— çgila Bitsch Link <jo.bitsch@cs.rwth-aachen.de>
+ */
+
+module CRandomP {
+  uses {
+    interface ParameterInit<uint16_t> as SeedInit;
+    interface Random;
+  }
+}
+
+implementation {
+  error_t randSeed(uint16_t seed) @C() AT_SPONTANEOUS {
+    return call SeedInit.init(seed);
+  }
+  
+  uint16_t rand16() @C() AT_SPONTANEOUS {
+    return call Random.rand16();
+  }
+  
+  uint32_t rand32() @C() AT_SPONTANEOUS {
+    return call Random.rand32();
+  }
+}
diff --git a/tos/lib/tosthreads/csystem/CThreadC.nc b/tos/lib/tosthreads/csystem/CThreadC.nc
new file mode 100644
index 00000000..7858fcc7
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CThreadC.nc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+configuration CThreadC {}
+implementation {
+  components DynamicThreadC;
+  components CThreadP;
+    
+  CThreadP.DynamicThread -> DynamicThreadC;
+}
+
diff --git a/tos/lib/tosthreads/csystem/CThreadP.nc b/tos/lib/tosthreads/csystem/CThreadP.nc
new file mode 100644
index 00000000..18026f17
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CThreadP.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+ 
+#include "thread.h"
+
+module CThreadP {
+  uses {
+    interface DynamicThread;
+  }
+}
+implementation {
+
+  error_t tosthread_create(tosthread_t* t, void (*start_routine)(void*), void* arg, uint16_t stack_size) @C() AT_SPONTANEOUS {
+    return call DynamicThread.create(t, start_routine, arg, stack_size);
+  }
+  error_t tosthread_destroy(tosthread_t* t) @C() AT_SPONTANEOUS {
+    return call DynamicThread.destroy(t);
+  }
+  error_t tosthread_pause(tosthread_t* t) @C() AT_SPONTANEOUS {
+    return call DynamicThread.pause(t);
+  }
+  error_t tosthread_resume(tosthread_t* t) @C() AT_SPONTANEOUS {
+    return call DynamicThread.resume(t);
+  }
+  error_t tosthread_sleep(uint32_t milli) @C() AT_SPONTANEOUS {
+    return call DynamicThread.sleep(milli);
+  }
+  error_t tosthread_join(tosthread_t* t) @C() AT_SPONTANEOUS {
+    return call DynamicThread.join(t);
+  }
+}
diff --git a/tos/lib/tosthreads/csystem/CThreadSynchronizationC.nc b/tos/lib/tosthreads/csystem/CThreadSynchronizationC.nc
new file mode 100644
index 00000000..78e6e09f
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CThreadSynchronizationC.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "tosthread_threadsync.h"
+
+configuration CThreadSynchronizationC {}
+implementation {
+  components ThreadSynchronizationC;
+  components CThreadSynchronizationP;
+  
+  CThreadSynchronizationP.Mutex -> ThreadSynchronizationC;
+  CThreadSynchronizationP.Semaphore -> ThreadSynchronizationC;
+  CThreadSynchronizationP.Barrier -> ThreadSynchronizationC;
+  CThreadSynchronizationP.ConditionVariable -> ThreadSynchronizationC;
+  CThreadSynchronizationP.ReferenceCounter -> ThreadSynchronizationC;
+}
diff --git a/tos/lib/tosthreads/csystem/CThreadSynchronizationP.nc b/tos/lib/tosthreads/csystem/CThreadSynchronizationP.nc
new file mode 100644
index 00000000..a82b9e0e
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/CThreadSynchronizationP.nc
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module CThreadSynchronizationP {
+  uses {
+    interface Mutex;
+    interface Semaphore;
+    interface Barrier;
+    interface ConditionVariable;
+    interface ReferenceCounter;
+  }
+}
+implementation {
+  /******************** Mutex ***************************/
+  void mutex_init(mutex_t* m) @C() AT_SPONTANEOUS {
+    call Mutex.init(m);
+  }
+  error_t mutex_lock(mutex_t* m) @C() AT_SPONTANEOUS {
+    return call Mutex.lock(m);
+  }
+  error_t mutex_unlock(mutex_t* m) @C() AT_SPONTANEOUS {
+    return call Mutex.unlock(m);
+  }
+  
+  /******************** Semaphore ***************************/
+  void semaphore_reset(semaphore_t* s, uint8_t v) @C() AT_SPONTANEOUS {
+    call Semaphore.reset(s, v);
+  }
+  error_t semaphore_acquire(semaphore_t* s) @C() AT_SPONTANEOUS {
+    return call Semaphore.acquire(s);
+  }
+  error_t semaphore_release(semaphore_t* s) @C() AT_SPONTANEOUS {
+    return call Semaphore.release(s);
+  }
+  
+  /******************** Barrier ***************************/
+  void barrier_reset(barrier_t* b, uint8_t count) @C() AT_SPONTANEOUS {
+    call Barrier.reset(b, count);
+  }
+  void barrier_block(barrier_t* b) @C() AT_SPONTANEOUS {
+    call Barrier.block(b);
+  }
+  bool barrier_isBlocking(barrier_t* b) @C() AT_SPONTANEOUS {
+    return call Barrier.isBlocking(b);
+  }
+  void condvar_init(condvar_t* c) @C() AT_SPONTANEOUS {
+    call ConditionVariable.init(c);
+  }
+  
+  /******************** Condition Variable ***************************/
+  void condvar_wait(condvar_t* c, mutex_t* m) @C() AT_SPONTANEOUS {
+    call ConditionVariable.wait(c, m);
+  }
+  void condvar_signalNext(condvar_t* c) @C() AT_SPONTANEOUS {
+    call ConditionVariable.signalNext(c);
+  }
+  void condvar_signalAll(condvar_t* c) @C() AT_SPONTANEOUS {
+    call ConditionVariable.signalAll(c);
+  }
+  bool condvar_isBlocking(condvar_t* c) @C() AT_SPONTANEOUS {
+    return call ConditionVariable.isBlocking(c);
+  }
+  
+  /******************** Reference Counter ***************************/
+  void refcounter_init(refcounter_t* r) @C() AT_SPONTANEOUS {
+    call ReferenceCounter.init(r);
+  }
+  void refcounter_increment(refcounter_t* r) @C() AT_SPONTANEOUS {
+    call ReferenceCounter.increment(r);
+  }
+  void refcounter_decrement(refcounter_t* r) @C() AT_SPONTANEOUS {
+    call ReferenceCounter.decrement(r);
+  }
+  void refcounter_waitOnValue(refcounter_t* r, uint8_t count) @C() AT_SPONTANEOUS {
+    call ReferenceCounter.waitOnValue(r, count);
+  }
+  uint8_t refcounter_count(refcounter_t* r) @C() AT_SPONTANEOUS {
+    return call ReferenceCounter.count(r);
+  }
+}
diff --git a/tos/lib/tosthreads/csystem/TinyOSEntryPointC.nc b/tos/lib/tosthreads/csystem/TinyOSEntryPointC.nc
new file mode 100644
index 00000000..d55f5a61
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/TinyOSEntryPointC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "tosthread.h"
+
+configuration TinyOSEntryPointC {
+}
+implementation {
+  components MainC;
+
+  components TinyOSEntryPointP;
+  MainC.Boot <- TinyOSEntryPointP;
+  
+#ifdef TOSTHREAD_TENET
+  components TosThreadTenetApiC;
+#else
+  components TosThreadApiC;
+#endif
+}
diff --git a/tos/lib/tosthreads/csystem/TinyOSEntryPointP.nc b/tos/lib/tosthreads/csystem/TinyOSEntryPointP.nc
new file mode 100644
index 00000000..0ec46cae
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/TinyOSEntryPointP.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+/**
+ *  The Makefile for your top level application must contain a line of the form:
+ *  TOSTHREAD_MAIN=Blink.c
+ *  in order to compile correctly.  
+ *  
+ *  This simply issues an error at compile time if TOSTHREAD_MAIN has not been defined
+ *  appropriately.
+ */
+#ifndef MAIN_APP
+#error "You must define the TOSTHREAD_MAIN constant in your Makefile to correctly point to your top level c file in order to compile..... Spelling Error?"
+#else 
+#include MAIN_APP
+#endif
+
+module TinyOSEntryPointP {
+  uses {
+    interface Boot;
+  }
+}
+implementation {
+  tosthread_t thread;
+
+  event void Boot.booted() {
+    tosthread_create(&thread, tosthread_main, NULL, TOSTHREAD_MAIN_STACK_SIZE);
+  }
+}
diff --git a/tos/lib/tosthreads/csystem/TosThreadApiC.nc b/tos/lib/tosthreads/csystem/TosThreadApiC.nc
new file mode 100644
index 00000000..da04a860
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/TosThreadApiC.nc
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+ 
+#include "tosthread.h"
+
+configuration TosThreadApiC {
+}
+implementation {
+  //Here are all the components that implement the Tosthread API calls
+  components CThreadC;
+  #if defined(PRINTF_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components PrintfC;
+  #endif
+  #if defined(TOSTHREAD_QUEUE_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CQueueC;
+  #endif
+  #if defined(TOSTHREAD_LINKED_LIST_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CLinkedListC;
+  #endif
+  #if defined(TOSTHREAD_THREADSYNC_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CThreadSynchronizationC;
+  #endif
+  #if defined(TOSTHREAD_LEDS_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CLedsC;
+  #endif
+  #if defined(TOSTHREAD_AMRADIO_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CAMRadioC;
+  #endif
+  #if defined(TOSTHREAD_AMSERIAL_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CAMSerialC;
+  #endif
+  #if defined(TOSTHREAD_BLOCKSTORAGE_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CBlockStorageC;
+  #endif 
+  #if defined(TOSTHREAD_LOGSTORAGE_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CLogStorageC;
+  #endif 
+  #if defined(TOSTHREAD_CONFIGSTORAGE_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CConfigStorageC;
+  #endif
+  #if defined(TOSTHREAD_COLLECTION_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CCollectionC;
+  #endif 
+  
+  //Telosb sensorboard specific.
+  #if defined(TOSTHREAD_HAMAMATSUS1087_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CHamamatsuS1087ParC;
+  #endif
+  #if defined(TOSTHREAD_HAMAMATSUS10871_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CHamamatsuS10871TsrC;
+  #endif
+  #if defined(TOSTHREAD_SENSIRIONSHT11_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CSensirionSht11C;
+  #endif
+  
+  //Universal sensorboard specific
+  #if defined(TOSTHREAD_SINESENSOR_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CSineSensorC;
+  #endif
+  
+  //Basicsb sensorboard specific
+  #if defined(TOSTHREAD_PHOTO_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CPhotoC;
+  #endif
+  #if defined(TOSTHREAD_TEMP_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CTempC;
+  #endif
+}
diff --git a/tos/lib/tosthreads/csystem/VolumeMapC.nc b/tos/lib/tosthreads/csystem/VolumeMapC.nc
new file mode 100644
index 00000000..982c8917
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/VolumeMapC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author J— çgila Bitsch Link <jo.bitsch@cs.rwth-aachen.de>
+ */
+
+configuration VolumeMapC { 
+  provides { 
+    interface BlockRead[uint8_t volume_id]; 
+    interface BlockWrite[uint8_t volume_id];
+    interface LogRead[uint8_t volume_id];
+    interface LogWrite[uint8_t volume_id];
+    interface ConfigStorage[uint8_t volume_id];
+    interface Mount[uint8_t volume_id];
+  }
+} 
+
+implementation { 
+  components VolumeMapP;
+  
+  BlockRead = VolumeMapP; 
+  BlockWrite = VolumeMapP;
+  LogRead = VolumeMapP;
+  LogWrite = VolumeMapP;
+  
+  ConfigStorage = VolumeMapP;
+  Mount = VolumeMapP;
+} 
diff --git a/tos/lib/tosthreads/csystem/VolumeMapP.nc b/tos/lib/tosthreads/csystem/VolumeMapP.nc
new file mode 100644
index 00000000..8c417eed
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/VolumeMapP.nc
@@ -0,0 +1,291 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author J— çgila Bitsch Link <jo.bitsch@cs.rwth-aachen.de>
+ */
+
+module VolumeMapP {
+  provides { 
+    interface BlockRead[uint8_t volume_id]; 
+    interface BlockWrite[uint8_t volume_id];
+    interface LogRead[uint8_t volume_id];
+    interface LogWrite[uint8_t volume_id];
+    interface ConfigStorage[uint8_t volume_id];
+    interface Mount[uint8_t volume_id];
+  }
+  
+  uses { 
+    interface BlockRead as SubBlockRead[uint8_t volume_id]; 
+    interface BlockWrite as SubBlockWrite[uint8_t volume_id]; 
+    interface LogRead as SubLogRead[uint8_t volume_id];
+    interface LogWrite as SubLogWrite[uint8_t volume_id];
+    interface ConfigStorage as SubConfigStorage[uint8_t volume_id];
+    interface Mount as SubMount[uint8_t volume_id];
+  }
+}
+
+implementation {
+  command error_t BlockRead.read[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) {
+    return call SubBlockRead.read[volume_id](addr, buf, len);
+  }
+
+  event void SubBlockRead.readDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {
+    signal BlockRead.readDone[volume_id](addr, buf, len, error);
+  }
+
+  command error_t BlockRead.computeCrc[uint8_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc) {
+    return call SubBlockRead.computeCrc[volume_id](addr, len, crc);
+  }
+
+  event void SubBlockRead.computeCrcDone[uint8_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {
+    signal BlockRead.computeCrcDone[volume_id](addr, len, crc, error);
+  }
+
+  command storage_len_t BlockRead.getSize[uint8_t volume_id]() {
+    return call SubBlockRead.getSize[volume_id]();
+  }
+  
+  command error_t BlockWrite.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) {
+    return call SubBlockWrite.write[volume_id](addr, buf, len);
+  }
+
+  event void SubBlockWrite.writeDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {
+    signal BlockWrite.writeDone[volume_id](addr, buf, len, error);
+  }
+
+  command error_t BlockWrite.erase[uint8_t volume_id]() {
+    return call SubBlockWrite.erase[volume_id]();
+  }
+
+  event void SubBlockWrite.eraseDone[uint8_t volume_id](error_t error) {
+    signal BlockWrite.eraseDone[volume_id](error);
+  }
+
+  command error_t BlockWrite.sync[uint8_t volume_id]() {
+    return call SubBlockWrite.sync[volume_id]();
+  }
+
+  event void SubBlockWrite.syncDone[uint8_t volume_id](error_t error) {
+    signal BlockWrite.syncDone[volume_id](error);
+  }
+  
+  default command error_t SubBlockRead.read[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) {
+    return FAIL;
+  }
+
+  default command error_t SubBlockRead.computeCrc[uint8_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc) {
+    return FAIL;
+  }
+
+  default command storage_len_t SubBlockRead.getSize[uint8_t volume_id]() {
+    return FAIL;
+  }
+  
+  default command error_t SubBlockWrite.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) {
+    return FAIL;
+  }
+
+  default command error_t SubBlockWrite.erase[uint8_t volume_id]() {
+    return FAIL;
+  }
+
+  default command error_t SubBlockWrite.sync[uint8_t volume_id]() {
+    return FAIL;
+  }
+  
+  default event void BlockRead.readDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void BlockRead.computeCrcDone[uint8_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {}
+  default event void BlockWrite.writeDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void BlockWrite.eraseDone[uint8_t volume_id](error_t error) {}
+  default event void BlockWrite.syncDone[uint8_t volume_id](error_t error) {}
+  
+  command error_t LogRead.read[uint8_t volume_id](void* buf, storage_len_t len) {
+    return call SubLogRead.read[volume_id](buf, len);
+  }
+
+  event void SubLogRead.readDone[uint8_t volume_id](void* buf, storage_len_t len, error_t error) {
+    signal LogRead.readDone[volume_id](buf, len, error);
+  }
+
+  command storage_cookie_t LogRead.currentOffset[uint8_t volume_id]() {
+    return call SubLogRead.currentOffset[volume_id]();
+  }
+
+  command error_t LogRead.seek[uint8_t volume_id](storage_cookie_t offset) {
+    return call SubLogRead.seek[volume_id](offset);
+  }
+
+  event void SubLogRead.seekDone[uint8_t volume_id](error_t error) {
+    signal LogRead.seekDone[volume_id](error);
+  }
+
+  command storage_len_t LogRead.getSize[uint8_t volume_id]() {
+    return call SubLogRead.getSize[volume_id]();
+  }
+  
+  command error_t LogWrite.append[uint8_t volume_id](void* buf, storage_len_t len) {
+    return call SubLogWrite.append[volume_id](buf, len);
+  }
+
+  event void SubLogWrite.appendDone[uint8_t volume_id](void* buf, storage_len_t len, bool recordsLost, error_t error) {
+    signal LogWrite.appendDone[volume_id](buf, len, recordsLost, error);
+  }
+
+  command storage_cookie_t LogWrite.currentOffset[uint8_t volume_id]() {
+    return call SubLogWrite.currentOffset[volume_id]();
+  }
+
+  command error_t LogWrite.erase[uint8_t volume_id]() {
+    return call SubLogWrite.erase[volume_id]();
+  }
+
+  event void SubLogWrite.eraseDone[uint8_t volume_id](error_t error) {
+    signal LogWrite.eraseDone[volume_id](error);
+  }
+
+  command error_t LogWrite.sync[uint8_t volume_id]() {
+    return call SubLogWrite.sync[volume_id]();
+  }
+
+  event void SubLogWrite.syncDone[uint8_t volume_id](error_t error) {
+    signal LogWrite.syncDone[volume_id](error);
+  }
+  
+  default command error_t SubLogRead.read[uint8_t volume_id](void* buf, storage_len_t len) {
+    return FAIL;
+  }
+
+  default command storage_cookie_t SubLogRead.currentOffset[uint8_t volume_id]() {
+    return 0;
+  }
+
+  default command error_t SubLogRead.seek[uint8_t volume_id](storage_cookie_t offset) {
+    return FAIL;
+  }
+
+  default command storage_len_t SubLogRead.getSize[uint8_t volume_id]() {
+    return 0;
+  }
+  
+  default command error_t SubLogWrite.append[uint8_t volume_id](void* buf, storage_len_t len) {
+    return FAIL;
+  }
+
+  default command storage_cookie_t SubLogWrite.currentOffset[uint8_t volume_id]() {
+    return 0;
+  }
+
+  default command error_t SubLogWrite.erase[uint8_t volume_id]() {
+    return FAIL;
+  }
+
+  default command error_t SubLogWrite.sync[uint8_t volume_id]() {
+    return FAIL;
+  }
+  
+  default event void LogRead.readDone[uint8_t volume_id](void* buf, storage_len_t len, error_t error) {}
+  default event void LogRead.seekDone[uint8_t volume_id](error_t error) {}
+  default event void LogWrite.appendDone[uint8_t volume_id](void* buf, storage_len_t len, bool recordsLost, error_t error) {}
+  default event void LogWrite.eraseDone[uint8_t volume_id](error_t error) {}
+  default event void LogWrite.syncDone[uint8_t volume_id](error_t error) {}
+  
+  command error_t ConfigStorage.read[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) {
+    return call SubConfigStorage.read[volume_id](addr, buf, len);
+  }
+  
+  event void SubConfigStorage.readDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {
+    signal ConfigStorage.readDone[volume_id](addr, buf, len, error);
+  }
+  
+  command error_t ConfigStorage.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) {
+    return call SubConfigStorage.write[volume_id](addr, buf, len);
+  }
+  
+  event void SubConfigStorage.writeDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {
+    signal ConfigStorage.writeDone[volume_id](addr, buf, len, error);
+  }
+  
+  command error_t ConfigStorage.commit[uint8_t volume_id]() {
+    return call SubConfigStorage.commit[volume_id]();
+  }
+  
+  event void SubConfigStorage.commitDone[uint8_t volume_id](error_t error) {
+    signal ConfigStorage.commitDone[volume_id](error);
+  }
+
+  command storage_len_t ConfigStorage.getSize[uint8_t volume_id]() {
+    return call SubConfigStorage.getSize[volume_id]();
+  }
+  
+  command bool ConfigStorage.valid[uint8_t volume_id]() {
+    return call SubConfigStorage.valid[volume_id]();
+  }
+  
+  command error_t Mount.mount[uint8_t volume_id]() {
+    return call SubMount.mount[volume_id]();
+  }
+  
+  event void SubMount.mountDone[uint8_t volume_id](error_t error) {
+    signal Mount.mountDone[volume_id](error);
+  }
+  
+  default command error_t SubConfigStorage.read[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) {
+    return FAIL;
+  }
+
+  default command error_t SubConfigStorage.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) {
+    return FAIL;
+  }
+  
+  default command error_t SubConfigStorage.commit[uint8_t volume_id]() {
+    return FAIL;
+  }
+
+  default command storage_len_t SubConfigStorage.getSize[uint8_t volume_id]() {
+    return FAIL;
+  }
+  
+  default command bool SubConfigStorage.valid[uint8_t volume_id]() {
+    return FAIL;
+  }
+  
+  default command error_t SubMount.mount[uint8_t volume_id]() {
+    return FAIL;
+  }
+
+  default event void ConfigStorage.commitDone[uint8_t volume_id](error_t error) {}
+  default event void ConfigStorage.writeDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}  
+  default event void ConfigStorage.readDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void Mount.mountDone[uint8_t volume_id](error_t error) {}
+}
diff --git a/tos/lib/tosthreads/csystem/tosthread.h b/tos/lib/tosthreads/csystem/tosthread.h
new file mode 100644
index 00000000..3c1551c9
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread.h
@@ -0,0 +1,136 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This is the file to include in your top level application when using 
+ * the tosthread library.  It defines all the tosthread_* commands and 
+ * #includes all of the needed header files for the basic tosthread 
+ * library calls
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_H_INCLUDED
+#define TOSTHREAD_H_INCLUDED
+
+#include "thread.h"
+
+/**
+ *  tosthread_main()
+ *
+ *  This in the main entry point thread from which all tosthread applications begin.  
+ *  @param	NULL
+ */
+extern void tosthread_main(void* arg);
+
+/**
+ *  tosthread_create()
+ * 
+ *  This function creates a new tosthread.  
+ *  
+ *  @param 	t 				A pointer to a thread identifier
+ *  @param 	start_routine	The function called when the created thread starts running
+ *  @param 	arg				The parameter passed to the start_routine for the created thread
+ *  @param 	stack_size		The maximum stack size for this thread
+ *  @return					An error code indicating whether the thread could be created or not
+ *								SUCCESS		-	The thread has been created
+ *							  	FAIL		- 	The thread could not be created
+ *								EALREADY	-	The thread identifier is already associated with a
+ *												currently active thread
+ */
+extern error_t tosthread_create(tosthread_t* t, void (*start_routine)(void*), void* arg, uint16_t stack_size);
+
+/**
+ *  tosthread_destroy()
+ *
+ *  This function destroys a tosthread.  
+ *  
+ *  @param t 				A pointer to a thread identifier
+ *  @return					An error code indicating whether the thread could be destroyed or not
+ *								SUCCESS		-	The thread has been destroyed
+ *							  	FAIL		- 	The thread could not be destroyed
+ *								EBUSY		-	The thread holds mutexes so cannot be destroyed
+ *												at the moment
+ */
+extern error_t tosthread_destroy(tosthread_t* t);
+
+/**
+ *  tosthread_pause() 
+ *
+ *  This function pauses a tosthread.  
+ *  
+ *  @param t 				A pointer to a thread identifier
+ *  @return					An error code indicating whether the thread could be paused or not
+ *								SUCCESS		-	The thread has been paused
+ *							  	FAIL		- 	The thread could not be paused
+ *								EBUSY		-	The thread holds mutexes so cannot be paused
+ *												at the moment
+ */
+extern error_t tosthread_pause(tosthread_t* t);
+
+/**
+ *  tosthread_resume()
+ *
+ *  This function resumes a previously paused tosthread.  
+ *  
+ *  @param t 				A pointer to a thread identifier
+ *  @return					An error code indicating whether the thread could be resumed or not
+ *								SUCCESS		-	The thread has been resumed
+ *							  	FAIL		- 	The thread could not be resumed
+ */
+extern error_t tosthread_resume(tosthread_t* t);
+
+/**
+ *  tosthread_sleep()
+ *
+ *  This function puts the currently running thread to sleep.  
+ *  
+ *  @param milli 			The number of milliseconds to sleep for
+ *  @return					An error code indicating whether the thread could be put to sleep or not
+ *								SUCCESS		-	The thread has been put to sleep
+ *							  	FAIL		- 	The thread could not be put to sleep
+ */
+extern error_t tosthread_sleep(uint32_t milli);
+
+/**
+ *  tosthread_join(tosthread_t* t)
+ *
+ *  This function bocks until the thread passed as a parameter has completed
+ *  
+ *  @param id 			The handle to the thread to block on
+ *  @return				An error code indicating whether the thread could be waited on or not
+ *							SUCCESS		-	The thread has been waited on and is now completed
+ *							EALREADY	-	The thread we are trying to wait on has already completed
+ *						  	FAIL		- 	The thread could not waited on
+ */
+extern error_t tosthread_join(tosthread_t* id);
+
+#endif //TOSTHREAD_H_INCLUDED
diff --git a/tos/lib/tosthreads/csystem/tosthread_amradio.h b/tos/lib/tosthreads/csystem/tosthread_amradio.h
new file mode 100644
index 00000000..f03a1f9a
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_amradio.h
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_AMRADIO_H
+#define TOSTHREAD_AMRADIO_H
+
+#include "message.h"
+#include "AM.h"
+#include "TinyError.h"
+
+#ifndef AM_RECEIVE_FROM_ANY
+#define AM_RECEIVE_FROM_ANY   0XFF
+#endif
+
+extern error_t amRadioStart();
+extern error_t amRadioStop();
+
+extern error_t amRadioReceive(message_t* m, uint32_t timeout, am_id_t amId);
+extern error_t amRadioSnoop(message_t* m, uint32_t timeout, am_id_t amId);
+extern error_t amRadioSend(am_addr_t addr, message_t* msg, uint8_t len, am_id_t amId);
+
+extern am_addr_t  amRadioGetLocalAddress(); 
+extern am_group_t amRadioGetLocalGroup();
+extern am_addr_t  amRadioGetDestination(message_t* amsg);
+extern am_addr_t  amRadioGetSource(message_t* amsg);
+extern void       amRadioSetDestination(message_t* amsg, am_addr_t addr);
+extern void       amRadioSetSource(message_t* amsg, am_addr_t addr);
+extern bool       amRadioIsForMe(message_t* amsg);
+extern am_id_t    amRadioGetType(message_t* amsg);
+extern void       amRadioSetType(message_t* amsg, am_id_t t);
+extern am_group_t amRadioGetGroup(message_t* amsg);
+extern void       amRadioSetGroup(message_t* amsg, am_group_t grp);
+ 
+extern void    radioClear(message_t* msg);
+extern uint8_t radioGetPayloadLength(message_t* msg);
+extern void    radioSetPayloadLength(message_t* msg, uint8_t len);
+extern uint8_t radioMaxPayloadLength();
+extern void*   radioGetPayload(message_t* msg, uint8_t len);
+
+extern error_t radioRequestAck( message_t* msg );
+extern error_t radioNoAck( message_t* msg );
+extern bool    radioWasAcked(message_t* msg);
+
+#endif //TOSTHREAD_AMRADIO_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_amserial.h b/tos/lib/tosthreads/csystem/tosthread_amserial.h
new file mode 100644
index 00000000..c4b4b5fe
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_amserial.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#ifndef TOSTHREAD_AMSERIAL_H
+#define TOSTHREAD_AMSERIAL_H
+
+#include "message.h"
+#include "TinyError.h"
+
+#ifndef AM_RECEIVE_FROM_ANY
+#define AM_RECEIVE_FROM_ANY   0XFF
+#endif
+
+extern error_t amSerialStart();
+extern error_t amSerialStop();
+
+extern error_t amSerialReceive(message_t* m, uint32_t timeout, am_id_t amId);
+extern error_t amSerialSend(am_addr_t addr, message_t* msg, uint8_t len, am_id_t amId);
+
+extern am_addr_t  amSerialLocalAddress(); 
+extern am_group_t amSerialGetLocalGroup();
+extern am_addr_t  amSerialGetDestination(message_t* amsg);
+extern am_addr_t  amSerialGetSource(message_t* amsg);
+extern void       amSerialSetDestination(message_t* amsg, am_addr_t addr);
+extern void       amSerialSetSource(message_t* amsg, am_addr_t addr);
+extern bool       amSerialIsForMe(message_t* amsg);
+extern am_id_t    amSerialGetType(message_t* amsg);
+extern void       amSerialSetType(message_t* amsg, am_id_t t);
+extern am_group_t amSerialGetGroup(message_t* amsg);
+extern void       amSerialSetGroup(message_t* amsg, am_group_t grp);
+
+extern void    serialClear(message_t* msg);
+extern uint8_t serialGetPayloadLength(message_t* msg);
+extern void    serialSetPayloadLength(message_t* msg, uint8_t len);
+extern uint8_t serialMaxPayloadLength();
+extern void*   serialGetPayload(message_t* msg, uint8_t len);
+
+extern error_t serialRequestAck( message_t* msg );
+extern error_t serialNoAck( message_t* msg );
+extern bool    serialWasAcked(message_t* msg);
+#endif //TOSTHREAD_AMSERIAL_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_barrier.h b/tos/lib/tosthreads/csystem/tosthread_barrier.h
new file mode 100644
index 00000000..391bb6da
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_barrier.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_BARRIER_H
+#define TOSTHREAD_BARRIER_H
+
+#include "barrier.h"
+
+extern void barrier_reset(barrier_t* b, uint8_t count);
+extern void barrier_block(barrier_t* b);
+extern bool barrier_isBlocking(barrier_t* b);
+
+#endif //TOSTHREAD_BARRIER_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_blockstorage.h b/tos/lib/tosthreads/csystem/tosthread_blockstorage.h
new file mode 100644
index 00000000..9c2d0d68
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_blockstorage.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * Author: Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#ifndef TOSTHREAD_BLOCKSTORAGE_H
+#define TOSTHREAD_BLOCKSTORAGE_H
+
+#include "Storage.h"
+
+extern error_t volumeBlockRead(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len);
+extern error_t volumeBlockWrite(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len);
+extern error_t volumeBlockCrc(uint8_t volumeId, storage_addr_t addr, storage_len_t* len, uint16_t crc, uint16_t *finalCrc);
+extern error_t volumeBlockErase(uint8_t volumeId);
+extern error_t volumeBlockSync(uint8_t volumeId);
+
+#endif //TOSTHREAD_BLOCKSTORAGE_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_condvar.h b/tos/lib/tosthreads/csystem/tosthread_condvar.h
new file mode 100644
index 00000000..a05dc904
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_condvar.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_CONDVAR_H
+#define TOSTHREAD_CONDVAR_H
+
+#include "condvar.h"
+
+extern void condvar_init(condvar_t* c);
+extern void condvar_wait(condvar_t* c, mutex_t* m);
+extern void condvar_signalNext(condvar_t* c);
+extern void condvar_signalAll(condvar_t* c);
+extern bool condvar_isBlocking(condvar_t* c);
+
+#endif //TOSTHREAD_CONDVAR_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_configstorage.h b/tos/lib/tosthreads/csystem/tosthread_configstorage.h
new file mode 100644
index 00000000..2eb6831a
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_configstorage.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2009 RWTH Aachen University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author J— çgila Bitsch Link <jo.bitsch@cs.rwth-aachen.de>
+ */
+
+#ifndef TOSTHREAD_CONFIGSTORAGE_H
+#define TOSTHREAD_CONFIGSTORAGE_H
+
+#include "Storage.h"
+
+extern error_t volumeConfigMount(uint8_t volumeId);
+extern error_t volumeConfigRead(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len);
+extern error_t volumeConfigWrite(uint8_t volumeId, storage_addr_t addr, void* buf, storage_len_t* len);
+extern error_t volumeConfigCommit(uint8_t volumeId);
+extern storage_len_t volumeConfigGetSize(uint8_t volumeId);
+extern bool volumeConfigValid(uint8_t volumeId);
+
+#endif   // TOSTHREAD_CONFIGSTORAGE_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_leds.h b/tos/lib/tosthreads/csystem/tosthread_leds.h
new file mode 100644
index 00000000..fa3f8a36
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_leds.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+ 
+#ifndef TOSTHREAD_LEDS_H
+#define TOSTHREAD_LEDS_H
+
+extern void led0On();
+extern void led0Off();
+extern void led0Toggle();
+
+extern void led1On();
+extern void led1Off();
+extern void led1Toggle();
+
+extern void led2On();
+extern void led2Off();
+extern void led2Toggle();
+
+extern uint8_t getLeds();
+extern void setLeds(uint8_t val);
+
+#endif //TOSTHREAD_LEDS_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_linked_list.h b/tos/lib/tosthreads/csystem/tosthread_linked_list.h
new file mode 100644
index 00000000..b22c1018
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_linked_list.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *extern  notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *extern  notice, this list of conditions and the following disclaimer in the
+ *extern  documentation and/or other materials provided with the
+ *extern  distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *extern  its contributors may be used to endorse or promote products derived
+ *extern  from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.extern IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+ 
+#ifndef TOSTHREAD_LINKED_LIST_H
+#define TOSTHREAD_LINKED_LIST_H
+
+#include "linked_list.h"
+
+extern void linked_list_init(linked_list_t* l); 
+extern void linked_list_clear(linked_list_t* l); 
+extern uint8_t linked_list_size(linked_list_t* l); 
+extern error_t linked_list_addFirst(linked_list_t* l, list_element_t* e);
+extern list_element_t* linked_list_getFirst(linked_list_t* l); 
+extern list_element_t* linked_list_removeFirst(linked_list_t* l);
+extern error_t linked_list_addLast(linked_list_t* l, list_element_t* e); 
+extern list_element_t* linked_list_getLast(linked_list_t* l); 
+extern list_element_t* linked_list_removeLast(linked_list_t* l); 
+extern error_t linked_list_addAt(linked_list_t* l, list_element_t* e, uint8_t i); 
+extern list_element_t* linked_list_getAt(linked_list_t* l, uint8_t i); 
+extern list_element_t* linked_list_removeAt(linked_list_t* l, uint8_t i);
+extern error_t linked_list_addAfter(linked_list_t* l, list_element_t* first, list_element_t* second); 
+extern error_t linked_list_addBefore(linked_list_t* l, list_element_t* first, list_element_t* e); 
+extern list_element_t* linked_list_getAfter(linked_list_t* l, list_element_t* e); 
+extern list_element_t* linked_list_getBefore(linked_list_t* l, list_element_t* e); 
+extern list_element_t* linked_list_remove(linked_list_t* l, list_element_t* e); 
+extern list_element_t* linked_list_removeBefore(linked_list_t* l, list_element_t* e); 
+extern list_element_t* linked_list_removeAfter(linked_list_t* l, list_element_t* e);  
+extern uint8_t linked_list_indexOf(linked_list_t* l, list_element_t* e); 
+
+#endif //TOSTHREAD_LINKED_LIST_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_logstorage.h b/tos/lib/tosthreads/csystem/tosthread_logstorage.h
new file mode 100644
index 00000000..edb82df1
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_logstorage.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#ifndef TOSTHREAD_LOGSTORAGE_H
+#define TOSTHREAD_LOGSTORAGE_H
+
+#include "Storage.h"
+
+extern error_t volumeLogRead(uint8_t volumeId, void *buf, storage_len_t *len);
+extern storage_cookie_t volumeLogCurrentReadOffset(uint8_t volumeId);
+extern error_t volumeLogSeek(uint8_t volumeId, storage_cookie_t offset);
+extern storage_len_t volumeLogGetSize(uint8_t volumeId);
+  
+extern error_t volumeLogAppend(uint8_t volumeId, void* buf, storage_len_t *len, bool *recordsLost);
+extern storage_cookie_t volumeLogCurrentWriteOffset(uint8_t volumeId);
+extern error_t volumeLogErase(uint8_t volumeId);
+extern error_t volumeLogSync(uint8_t volumeId);
+
+#endif //TOSTHREAD_LOGSTORAGE_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_mutex.h b/tos/lib/tosthreads/csystem/tosthread_mutex.h
new file mode 100644
index 00000000..d54f9882
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_mutex.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_MUTEX_H
+#define TOSTHREAD_MUTEX_H
+
+#include "mutex.h"
+#include "TinyError.h"
+
+extern void mutex_init(mutex_t* m);
+extern error_t mutex_lock(mutex_t* m);
+extern error_t mutex_unlock(mutex_t* m);
+
+#endif //TOSTHREAD_MUTEX_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_queue.h b/tos/lib/tosthreads/csystem/tosthread_queue.h
new file mode 100644
index 00000000..20d114ba
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_queue.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *extern  notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *extern  notice, this list of conditions and the following disclaimer in the
+ *extern  documentation and/or other materials provided with the
+ *extern  distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *extern  its contributors may be used to endorse or promote products derived
+ *extern  from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.extern IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+ 
+#ifndef TOSTHREAD_QUEUE_H
+#define TOSTHREAD_QUEUE_H
+
+#include "queue.h"
+
+extern void queue_init(queue_t* q); 
+extern void queue_clear(queue_t* q); 
+extern error_t queue_enqueue(queue_t* q, queue_element_t* e);
+extern queue_element_t* queue_dequeue(queue_t* q);
+extern queue_element_t* queue_remove(queue_t* q, queue_element_t* e);
+extern uint8_t queue_size(queue_t* q); 
+extern bool queue_is_empty(queue_t* q); 
+
+#endif //TOSTHREAD_QUEUE_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_random.h b/tos/lib/tosthreads/csystem/tosthread_random.h
new file mode 100644
index 00000000..34705dde
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_random.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2009 RWTH Aachen University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author J— çgila Bitsch Link <jo.bitsch@cs.rwth-aachen.de>
+ */
+
+#ifndef TOSTHREAD_RANDOM_H
+#define TOSTHREAD_RANDOM_H
+
+#include "TinyError.h"
+
+extern error_t randSeed(uint16_t seed);
+extern uint16_t rand16();
+extern uint32_t rand32();
+
+#endif //TOSTHREAD_RANDOM_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_refcounter.h b/tos/lib/tosthreads/csystem/tosthread_refcounter.h
new file mode 100644
index 00000000..34f4b15d
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_refcounter.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_REFCOUNTER_H
+#define TOSTHREAD_REFCOUNTER_H
+
+#include "refcounter.h"
+
+extern void refcounter_init(refcounter_t* r);
+extern void refcounter_increment(refcounter_t* r);
+extern void refcounter_decrement(refcounter_t* r);
+extern void refcounter_waitOnValue(refcounter_t* r, uint8_t count);
+extern uint8_t refcounter_count(refcounter_t* r);
+
+#endif //TOSTHREAD_REFCOUNTER_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_semaphore.h b/tos/lib/tosthreads/csystem/tosthread_semaphore.h
new file mode 100644
index 00000000..a0df5ccc
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_semaphore.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_SEMAPHORE_H
+#define TOSTHREAD_SEMAPHORE_H
+
+#include "semaphore.h"
+#include "TinyError.h"
+
+extern void semaphore_reset(semaphore_t* s, uint8_t v);
+extern error_t semaphore_acquire(semaphore_t* s);
+extern error_t semaphore_release(semaphore_t* s);
+
+#endif //TOSTHREAD_MUTEX_H
diff --git a/tos/lib/tosthreads/csystem/tosthread_threadsync.h b/tos/lib/tosthreads/csystem/tosthread_threadsync.h
new file mode 100644
index 00000000..8e410cb4
--- /dev/null
+++ b/tos/lib/tosthreads/csystem/tosthread_threadsync.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_THREADSYNC_H
+#define TOSTHREAD_THREADSYNC_H
+
+#include "tosthread_mutex.h"
+#include "tosthread_semaphore.h"
+#include "tosthread_barrier.h"
+#include "tosthread_condvar.h"
+#include "tosthread_refcounter.h"
+
+#endif //TOSTHREAD_THREADSYNC_H
diff --git a/tos/lib/tosthreads/interfaces/Barrier.nc b/tos/lib/tosthreads/interfaces/Barrier.nc
new file mode 100644
index 00000000..83a99b4c
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/Barrier.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Interface for using Barrier synchronization with tosthreads.
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "barrier.h"
+
+interface Barrier {
+  /**
+   * Reset a barrier for use.
+   * @param b     The barrier you would like to reset.
+   * @param count The number of threads that must call
+   *              block before the flood gates open and
+   *              the barrier is unblocked.
+   */
+  command void reset(barrier_t* b, uint8_t count);
+  /**
+   * Block on a barrier until all threads have called 
+   * block() as indicated in the count parameter to reset()
+   * @param b The barrier you would like to block on.
+   */
+  command void block(barrier_t* b);
+  /**
+   * Query whether a barrier is currently blocked or not
+   * @param b The barrier you would like to query.
+   * @return  TRUE or FALSE
+   */
+  command bool isBlocking(barrier_t* b);
+}  
diff --git a/tos/lib/tosthreads/interfaces/BitArrayUtils.nc b/tos/lib/tosthreads/interfaces/BitArrayUtils.nc
new file mode 100644
index 00000000..7395fcc8
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/BitArrayUtils.nc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+interface BitArrayUtils {
+  async command void clrArray(uint8_t* array, uint8_t numBytes);
+  async command bool getBit(uint8_t* array, uint8_t idx);
+  async command void setBit(uint8_t* array, uint8_t idx);
+  async command void clrBit(uint8_t* array, uint8_t idx);
+}
diff --git a/tos/lib/tosthreads/interfaces/BlockingAMSend.nc b/tos/lib/tosthreads/interfaces/BlockingAMSend.nc
new file mode 100644
index 00000000..8e249dce
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/BlockingAMSend.nc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include <TinyError.h>
+#include <message.h>
+#include <AM.h>
+
+interface BlockingAMSend {
+  command error_t send(am_addr_t addr, message_t* msg, uint8_t len);
+  command uint8_t maxPayloadLength();
+  command void* getPayload(message_t* msg, uint8_t len);
+}
diff --git a/tos/lib/tosthreads/interfaces/BlockingBlock.nc b/tos/lib/tosthreads/interfaces/BlockingBlock.nc
new file mode 100644
index 00000000..8c8793c2
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/BlockingBlock.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+ 
+ #include "Storage.h"
+ 
+interface BlockingBlock {
+  command error_t read(storage_addr_t addr, void *buf, storage_len_t* len);
+  command error_t computeCrc(storage_addr_t addr, storage_len_t* len, uint16_t crc, uint16_t *finalCrc);
+  command storage_len_t getSize();
+  
+  command error_t write(storage_addr_t addr, void *buf, storage_len_t* len);
+  command error_t erase();
+  command error_t sync();
+}
diff --git a/tos/lib/tosthreads/interfaces/BlockingConfig.nc b/tos/lib/tosthreads/interfaces/BlockingConfig.nc
new file mode 100644
index 00000000..40ce48dd
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/BlockingConfig.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "Storage.h"
+
+interface BlockingConfig
+{
+  command error_t read(storage_addr_t addr, void* buf, storage_len_t* len);
+  command error_t write(storage_addr_t addr, void* buf, storage_len_t* len);
+  command error_t commit();
+  command storage_len_t getSize();
+  command bool valid();
+}
diff --git a/tos/lib/tosthreads/interfaces/BlockingLog.nc b/tos/lib/tosthreads/interfaces/BlockingLog.nc
new file mode 100644
index 00000000..efbcedfb
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/BlockingLog.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+ 
+ #include "Storage.h"
+ 
+interface BlockingLog {
+  command error_t read(void *buf, storage_len_t *len);
+  command storage_cookie_t currentReadOffset();
+  command error_t seek(storage_cookie_t offset);
+  command storage_len_t getSize();
+  
+  command error_t append(void* buf, storage_len_t *len, bool *recordsLost);
+  command storage_cookie_t currentWriteOffset();
+  command error_t erase();
+  command error_t sync();
+}
diff --git a/tos/lib/tosthreads/interfaces/BlockingMount.nc b/tos/lib/tosthreads/interfaces/BlockingMount.nc
new file mode 100644
index 00000000..ae5c9ff0
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/BlockingMount.nc
@@ -0,0 +1,62 @@
+/* Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Mount a volume.
+ *
+ * @author David Gay
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:51 $
+ */
+
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+interface BlockingMount {
+  /**
+   * Mount a particular volume. This must be done before the volume's
+   * first use. <code>mountDone</code> will be signaled if SUCCESS is
+   * returned.
+   * @return SUCCESS if mount request is accepted, FAIL if mount has
+   *   already been attempted.
+   */
+  command error_t mount();
+}
diff --git a/tos/lib/tosthreads/interfaces/BlockingRead.nc b/tos/lib/tosthreads/interfaces/BlockingRead.nc
new file mode 100644
index 00000000..adad884a
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/BlockingRead.nc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+interface BlockingRead<val_t> {
+  /**
+   * Read a value
+   * 
+   * @param val pointer for where to store the value that has been read
+   * @return SUCCESS if a readDone() event will eventually come back.
+   */
+  command error_t read(val_t* val);
+}
diff --git a/tos/lib/tosthreads/interfaces/BlockingReadStream.nc b/tos/lib/tosthreads/interfaces/BlockingReadStream.nc
new file mode 100644
index 00000000..b325df95
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/BlockingReadStream.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+interface BlockingReadStream<val_t> {
+  /**
+   * Directs the device to fill a buffer by sampling with the
+   * specified period. 
+   * 
+   * @param usPeriod the between-sample period in microseconds
+   * @param buf a pointer to the buffer
+   * @param count the number of values the buffer should hold
+   * @param usActualPeriod Actual sampling period used - may be 
+   *   different from period requested. Undefined if 
+   *   result != SUCCESS.
+   * 
+   * @return SUCCESS if the reading was carried out successfully
+   */
+  command error_t read(uint32_t* usPeriod, val_t* buf, uint16_t count);
+}    
diff --git a/tos/lib/tosthreads/interfaces/BlockingReceive.nc b/tos/lib/tosthreads/interfaces/BlockingReceive.nc
new file mode 100644
index 00000000..4ececa52
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/BlockingReceive.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include <TinyError.h>
+#include <message.h>
+
+interface BlockingReceive {
+  command error_t receive(message_t* m, uint32_t timeout); 
+  command void* getPayload(message_t* msg, uint8_t len);
+}
diff --git a/tos/lib/tosthreads/interfaces/BlockingResource.nc b/tos/lib/tosthreads/interfaces/BlockingResource.nc
new file mode 100644
index 00000000..7f82664c
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/BlockingResource.nc
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+  
+interface BlockingResource {
+  command error_t request();
+  command error_t release();
+  command error_t timedRelease(uint32_t milli);
+  command bool isOwner();
+}
diff --git a/tos/lib/tosthreads/interfaces/BlockingSend.nc b/tos/lib/tosthreads/interfaces/BlockingSend.nc
new file mode 100644
index 00000000..2a076b71
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/BlockingSend.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+ 
+interface BlockingSend {
+  command error_t send(message_t* msg, uint8_t len); 
+  command error_t cancel(message_t* msg);
+  command uint8_t maxPayloadLength();
+  command void* getPayload(message_t* msg, uint8_t len);
+}
diff --git a/tos/lib/tosthreads/interfaces/BlockingStdControl.nc b/tos/lib/tosthreads/interfaces/BlockingStdControl.nc
new file mode 100644
index 00000000..54edb84d
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/BlockingStdControl.nc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include <TinyError.h>
+#include <message.h>
+#include <AM.h>
+
+interface BlockingStdControl {
+  command error_t start();
+  command error_t stop();
+}
diff --git a/tos/lib/tosthreads/interfaces/ConditionVariable.nc b/tos/lib/tosthreads/interfaces/ConditionVariable.nc
new file mode 100644
index 00000000..4c3454b2
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/ConditionVariable.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Interface for using Conddition Variables for synchronization 
+ * with tosthreads.
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "condvar.h"
+
+interface ConditionVariable {
+  /**
+   * Reset a condition variable for use.
+   * @param c The condition variable you would like to reset.
+   */
+  command void init(condvar_t* c);
+  /**
+   * Wait on a condition variable until one of the signal
+   * calls unbocks me.  In the process, unlock the mutex 
+   * passed in to me.
+   * @param c The condition variable you would like to wait on.
+   * @param m The mutex you would like to unlock
+   */
+  command void wait(condvar_t* c, mutex_t* m);
+  /**
+   * Signal the next thread waiting on this condition variable 
+   * to continue execution.  To unblock all threads waiting on 
+   * this condition vairable use signalAll().
+   * @param c The condition variable associated with the thread 
+   *          you would like to signal.
+   */
+  command void signalNext(condvar_t* c);
+  /**
+   * Signal all threads waiting on this condition variable 
+   * to continue execution.  To unblock just the next thread
+   * waiting on this condition vairable use signalNext().
+   * @param c The condition variable associated with the thread 
+   *          you would like to signal.
+   */
+  command void signalAll(condvar_t* c);
+  /**
+   * Query whether a condition variable is currently blocking 
+   * any threads from executing.
+   * @param c The cndition variable you would like to query.
+   * @return  TRUE or FALSE
+   */
+  command bool isBlocking(condvar_t* c);
+}  
diff --git a/tos/lib/tosthreads/interfaces/DynamicThread.nc b/tos/lib/tosthreads/interfaces/DynamicThread.nc
new file mode 100644
index 00000000..d3d26264
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/DynamicThread.nc
@@ -0,0 +1,118 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+interface DynamicThread {
+  /**
+   *  create()
+   * 
+   *  This function creates a new tosthread.  
+   *  
+   *  @param 	t 				A pointer to a unique handler associated with the thread being created
+   *  @param 	start_routine	The function called when the created thread starts running
+   *  @param 	arg				The parameter passed to the start_routine for the created thread
+   *  @param 	stack_size		The maximum stack size for this thread
+   *  @return					An error code indicating whether the thread could be created or not
+   *								SUCCESS		-	The thread has been created
+   *							  	FAIL		- 	The thread could not be created
+   *								EALREADY	-	The thread identifier is already associated with a
+   *												currently active thread
+   */
+  command error_t create(tosthread_t* t, void (*start_routine)(void*), void* arg, uint16_t stack_size);
+
+  /**
+   *  destroy()
+   *
+   *  This function destroys a tosthread.  
+   *  
+   *  @param t 				A pointer to a thread identifier
+   *  @return				An error code indicating whether the thread could be destroyed or not
+   *							SUCCESS		-	The thread has been destroyed
+   *					  		FAIL		- 	The thread could not be destroyed
+   *							EBUSY		-	The thread holds mutexes so cannot be destroyed
+   *											at the moment
+   */
+  command error_t destroy(tosthread_t* t);
+
+  /**
+   *  tosthread_pause() 
+   *
+   *  This function pauses a tosthread.  
+   *  
+   *  @param t 				A pointer to a thread identifier
+   *  @return				An error code indicating whether the thread could be paused or not
+   *							SUCCESS		-	The thread has been paused
+   *						  	FAIL		- 	The thread could not be paused
+   *							EBUSY		-	The thread holds mutexes so cannot be paused
+   *											at the moment
+   */
+  command error_t pause(tosthread_t* t);
+
+  /**
+   *  resume()
+   *
+   *  This function resumes a previously paused tosthread.  
+   *  
+   *  @param t 				A pointer to a thread identifier
+   *  @return				An error code indicating whether the thread could be resumed or not
+   *							SUCCESS		-	The thread has been resumed
+   *						  	FAIL		- 	The thread could not be resumed
+   */
+  command error_t resume(tosthread_t* t);
+
+  /**
+   *  sleep()
+   *
+   *  This function puts the currently running thread to sleep.  
+   *  
+   *  @param milli 			The number of milliseconds to sleep for
+   *  @return				An error code indicating whether the thread could be put to sleep or not
+   *							SUCCESS		-	The thread has been put to sleep
+   *						  	FAIL		- 	The thread could not be put to sleep
+   */
+  command error_t sleep(uint32_t milli);
+  
+  /**
+   *  join(tosthread_t* t)
+   *
+   *  This function bocks until the thread passed as a parameter has completed
+   *  
+   *  @param id 			The handle to the thread to block on
+   *  @return				An error code indicating whether the thread could be waited on or not
+   *							SUCCESS		-	The thread has been waited on and is now completed
+   *							EALREADY	-	The thread we are trying to wait on has already completed
+   *						  	FAIL		- 	The thread could not waited on
+   */
+  command error_t join(tosthread_t* id);
+}  
diff --git a/tos/lib/tosthreads/interfaces/LinkedList.nc b/tos/lib/tosthreads/interfaces/LinkedList.nc
new file mode 100644
index 00000000..845989b8
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/LinkedList.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "linked_list.h"
+
+interface LinkedList {
+  async command void init(linked_list_t* l);
+  async command void clear(linked_list_t* l);
+  async command uint8_t size(linked_list_t* l);
+  async command error_t addAt(linked_list_t* l, list_element_t* e, uint8_t i);
+  async command error_t addFirst(linked_list_t* l, list_element_t* e);
+  async command error_t addLast(linked_list_t* l, list_element_t* e);
+  async command error_t addAfter(linked_list_t* l, list_element_t* first, list_element_t* second);
+  async command error_t addBefore(linked_list_t* l, list_element_t* first, list_element_t* second);
+  async command list_element_t* getAt(linked_list_t* l, uint8_t i);
+  async command list_element_t* getFirst(linked_list_t* l);
+  async command list_element_t* getLast(linked_list_t* l);
+  async command list_element_t* getAfter(linked_list_t* l, list_element_t* e);
+  async command list_element_t* getBefore(linked_list_t* l, list_element_t* e);
+  async command uint8_t indexOf(linked_list_t* l, list_element_t* e);
+  async command list_element_t* remove(linked_list_t* l, list_element_t* e);
+  async command list_element_t* removeAt(linked_list_t* l, uint8_t i);
+  async command list_element_t* removeFirst(linked_list_t* l);
+  async command list_element_t* removeLast(linked_list_t* l);
+  async command list_element_t* removeBefore(linked_list_t* l, list_element_t* e);
+  async command list_element_t* removeAfter(linked_list_t* l, list_element_t* e);
+}
diff --git a/tos/lib/tosthreads/interfaces/Malloc.nc b/tos/lib/tosthreads/interfaces/Malloc.nc
new file mode 100644
index 00000000..2997a249
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/Malloc.nc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+interface Malloc {
+  async command void* malloc(size_t size);
+  async command void free (void *p);
+}
diff --git a/tos/lib/tosthreads/interfaces/Mutex.nc b/tos/lib/tosthreads/interfaces/Mutex.nc
new file mode 100644
index 00000000..3d66ad53
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/Mutex.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "mutex.h"
+
+interface Mutex {
+  command void init(mutex_t* m);
+  command error_t lock(mutex_t* m);
+  command error_t unlock(mutex_t* m);
+}  
diff --git a/tos/lib/tosthreads/interfaces/PlatformInterrupt.nc b/tos/lib/tosthreads/interfaces/PlatformInterrupt.nc
new file mode 100644
index 00000000..ebd66cfa
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/PlatformInterrupt.nc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+interface PlatformInterrupt {
+  async command void postAmble();
+}  
diff --git a/tos/lib/tosthreads/interfaces/PoolThread.nc b/tos/lib/tosthreads/interfaces/PoolThread.nc
new file mode 100644
index 00000000..565352f6
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/PoolThread.nc
@@ -0,0 +1,18 @@
+ 
+/**
+ * @author Jeongyeup Paek (jpaek@enl.usc.edu)
+ **/
+
+interface PoolThread {
+
+  command error_t allocate(uint8_t* t, void (*start_routine)(void*), void* arg);
+
+  command error_t release(uint8_t t);
+
+  command error_t pause(uint8_t t);
+
+  command error_t resume(uint8_t t);
+
+  command error_t sleep(uint32_t milli);
+}
+
diff --git a/tos/lib/tosthreads/interfaces/ReferenceCounter.nc b/tos/lib/tosthreads/interfaces/ReferenceCounter.nc
new file mode 100644
index 00000000..d5b3ee4d
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/ReferenceCounter.nc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "refcounter.h"
+
+interface ReferenceCounter {
+  async command void init(refcounter_t* r);
+  async command void increment(refcounter_t* r);
+  async command void decrement(refcounter_t* r);
+  async command void waitOnValue(refcounter_t* r, uint8_t count);
+  async command uint8_t count(refcounter_t* r);
+}  
diff --git a/tos/lib/tosthreads/interfaces/Semaphore.nc b/tos/lib/tosthreads/interfaces/Semaphore.nc
new file mode 100644
index 00000000..1bf9b28f
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/Semaphore.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "semaphore.h"
+
+/*
+ * Counting semaphore
+ */
+interface Semaphore {
+  command void reset(semaphore_t* s, uint8_t v);
+  command error_t acquire(semaphore_t* s);
+  command error_t release(semaphore_t* s);
+}
diff --git a/tos/lib/tosthreads/interfaces/SystemCall.nc b/tos/lib/tosthreads/interfaces/SystemCall.nc
new file mode 100644
index 00000000..4191b709
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/SystemCall.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "TinyError.h"
+
+interface SystemCall {
+  command error_t start(void* syscall_ptr, syscall_t* s, syscall_id_t id, void* params);
+  command error_t finish(syscall_t* s);
+}
+
diff --git a/tos/lib/tosthreads/interfaces/SystemCallQueue.nc b/tos/lib/tosthreads/interfaces/SystemCallQueue.nc
new file mode 100644
index 00000000..72c78504
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/SystemCallQueue.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "thread.h"
+#include "syscall_queue.h"
+
+interface SystemCallQueue {
+  async command void init(syscall_queue_t* q);
+  async command void enqueue(syscall_queue_t* q, syscall_t* t);
+  async command syscall_t* dequeue(syscall_queue_t* q);
+  async command syscall_t* remove(syscall_queue_t* q, syscall_t* t);
+  
+  async command syscall_t* find(syscall_queue_t* q, syscall_id_t id);
+  
+  async command bool isEmpty(syscall_queue_t* q);
+}
diff --git a/tos/lib/tosthreads/interfaces/TaskScheduler.nc b/tos/lib/tosthreads/interfaces/TaskScheduler.nc
new file mode 100644
index 00000000..f386ee16
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/TaskScheduler.nc
@@ -0,0 +1,82 @@
+// $Id: TaskScheduler.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+/*									tab:4
+ * Copyright (c) 2004-5 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-5 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/** 
+  * The interface to a TinyOS task scheduler.
+  *
+  * @author Philip Levis
+  * @author Kevin Klues <klueska@cs.stanford.edu>
+  * @date   January 19 2005
+  * @see TEP 106: Tasks and Schedulers
+  * @see TEP 107: Boot Sequence
+  */ 
+
+
+interface TaskScheduler {
+
+  /** 
+   * Initialize the scheduler.
+   */
+  command void init();
+
+  /** 
+    * Run the next task if one is waiting, otherwise return immediately. 
+    *
+    * @return        whether a task was run -- TRUE indicates a task
+    *                ran, FALSE indicates there was no task to run.
+    */
+  command bool runNextTask();
+  
+  /** 
+    * Check to see if there are any pending tasks in the task queue. 
+    *
+    * @return        whether there are any tasks waiting to run
+    */
+  async command bool hasTasks();
+
+  /**
+   * Enter an infinite task-running loop. Put the MCU into a low power
+   * state when the processor is idle (task queue empty, waiting for
+   * interrupts). This call never returns.
+   */
+  command void taskLoop();
+}
+
diff --git a/tos/lib/tosthreads/interfaces/Thread.nc b/tos/lib/tosthreads/interfaces/Thread.nc
new file mode 100644
index 00000000..0fc2f460
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/Thread.nc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+interface Thread {
+  command error_t start(void* arg);
+  command error_t stop();
+  command error_t pause();
+  command error_t resume();
+  command error_t sleep(uint32_t milli);
+  event void run(void* arg);
+  command error_t join();
+}  
diff --git a/tos/lib/tosthreads/interfaces/ThreadCleanup.nc b/tos/lib/tosthreads/interfaces/ThreadCleanup.nc
new file mode 100644
index 00000000..1810737d
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/ThreadCleanup.nc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+interface ThreadCleanup {
+  async event void cleanup();
+}  
diff --git a/tos/lib/tosthreads/interfaces/ThreadFunction.nc b/tos/lib/tosthreads/interfaces/ThreadFunction.nc
new file mode 100644
index 00000000..d8a0e876
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/ThreadFunction.nc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+interface ThreadFunction {
+  event void signalThreadRun(void* arg);
+}  
diff --git a/tos/lib/tosthreads/interfaces/ThreadInfo.nc b/tos/lib/tosthreads/interfaces/ThreadInfo.nc
new file mode 100644
index 00000000..df244c1c
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/ThreadInfo.nc
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "thread.h"
+
+interface ThreadInfo {
+  async command error_t reset();
+  async command thread_t* get();
+}  
diff --git a/tos/lib/tosthreads/interfaces/ThreadNotification.nc b/tos/lib/tosthreads/interfaces/ThreadNotification.nc
new file mode 100644
index 00000000..42973353
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/ThreadNotification.nc
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+interface ThreadNotification {
+  async event void justCreated();
+  async event void aboutToDestroy();
+}  
diff --git a/tos/lib/tosthreads/interfaces/ThreadQueue.nc b/tos/lib/tosthreads/interfaces/ThreadQueue.nc
new file mode 100644
index 00000000..c7b2090f
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/ThreadQueue.nc
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "thread_queue.h"
+
+interface ThreadQueue {
+  async command void init(thread_queue_t* q);
+  async command void enqueue(thread_queue_t* q, thread_t* t);
+  async command thread_t* dequeue(thread_queue_t* q);
+  async command thread_t* remove(thread_queue_t* q, thread_t* t);
+  async command bool isEmpty(thread_queue_t* q);
+}
diff --git a/tos/lib/tosthreads/interfaces/ThreadScheduler.nc b/tos/lib/tosthreads/interfaces/ThreadScheduler.nc
new file mode 100644
index 00000000..c682d28a
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/ThreadScheduler.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "thread.h"
+
+interface ThreadScheduler {
+  async command uint8_t currentThreadId();
+  async command thread_t* currentThreadInfo();
+  async command thread_t* threadInfo(thread_id_t id);
+  
+  command error_t initThread(thread_id_t id);
+  command error_t startThread(thread_id_t id);
+  command error_t stopThread(thread_id_t id);
+  
+  async command error_t suspendCurrentThread();
+  async command error_t interruptCurrentThread();
+
+  async command error_t wakeupThread(thread_id_t id);
+  async command error_t joinThread(thread_id_t id);
+}
diff --git a/tos/lib/tosthreads/interfaces/ThreadSleep.nc b/tos/lib/tosthreads/interfaces/ThreadSleep.nc
new file mode 100644
index 00000000..b13d991e
--- /dev/null
+++ b/tos/lib/tosthreads/interfaces/ThreadSleep.nc
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+interface ThreadSleep {
+  command error_t sleep(uint32_t milli);
+}  
diff --git a/tos/lib/tosthreads/lib/net/BlockingCollectionControlC.nc b/tos/lib/tosthreads/lib/net/BlockingCollectionControlC.nc
new file mode 100644
index 00000000..8b8d646f
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/BlockingCollectionControlC.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+ 
+configuration BlockingCollectionControlC {
+  provides {
+    interface BlockingStdControl as RoutingControl;
+    interface RootControl;
+  }
+}
+
+implementation {
+  components CollectionC as Collector,
+             SystemCallC,
+             MutexC,
+             BlockingCollectionControlP;
+  
+  RoutingControl = BlockingCollectionControlP.BlockingStdControl;
+  RootControl = Collector;
+  
+  BlockingCollectionControlP.RoutingControl -> Collector.StdControl;
+  BlockingCollectionControlP.SystemCall -> SystemCallC;
+  BlockingCollectionControlP.Mutex -> MutexC;
+}
diff --git a/tos/lib/tosthreads/lib/net/BlockingCollectionControlP.nc b/tos/lib/tosthreads/lib/net/BlockingCollectionControlP.nc
new file mode 100644
index 00000000..7ebf2c28
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/BlockingCollectionControlP.nc
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module BlockingCollectionControlP {
+  provides {
+    interface BlockingStdControl;
+    interface Init;
+  }
+  
+  uses {
+    interface StdControl as RoutingControl;
+    interface SystemCall;
+    interface Mutex;
+  }
+}
+
+implementation {
+  typedef struct params {
+    error_t error;
+  } params_t;
+
+  syscall_t* start_call = NULL;
+  mutex_t my_mutex;
+  
+  command error_t Init.init()
+  {
+    call Mutex.init(&my_mutex);
+    return SUCCESS;
+  }
+  
+  void startTask(syscall_t* s)
+  {
+    params_t* p = s->params;
+    p->error = call RoutingControl.start();
+    call SystemCall.finish(s);
+  }
+
+  command error_t BlockingStdControl.start()
+  {
+    syscall_t s;
+    params_t p;
+    
+    call Mutex.lock(&my_mutex);
+      if (start_call == NULL) {
+        start_call = &s;
+        call SystemCall.start(&startTask, &s, INVALID_ID, &p);
+        start_call = NULL;
+      } else {
+        p.error = EBUSY;
+      }
+        
+    atomic {
+      call Mutex.unlock(&my_mutex);
+      return p.error;
+    }
+  }
+  
+  command error_t BlockingStdControl.stop() {
+    return call RoutingControl.stop();
+  }
+}
diff --git a/tos/lib/tosthreads/lib/net/BlockingCollectionReceiverC.nc b/tos/lib/tosthreads/lib/net/BlockingCollectionReceiverC.nc
new file mode 100644
index 00000000..f9dc0e26
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/BlockingCollectionReceiverC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+generic configuration BlockingCollectionReceiverC (collection_id_t id) {
+  provides {
+    interface BlockingReceive;
+    interface Packet;
+  }
+}
+
+implementation {
+  components BlockingCollectionReceiverP,
+             CollectionC as Collector;
+  
+  BlockingReceive = BlockingCollectionReceiverP.BlockingReceive[id];
+  Packet = Collector;
+}
diff --git a/tos/lib/tosthreads/lib/net/BlockingCollectionReceiverP.nc b/tos/lib/tosthreads/lib/net/BlockingCollectionReceiverP.nc
new file mode 100644
index 00000000..5f9905cf
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/BlockingCollectionReceiverP.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration BlockingCollectionReceiverP {
+  provides {
+    interface BlockingReceive[collection_id_t id];
+    interface BlockingReceive as BlockingReceiveAny;
+  }
+}
+
+implementation {
+  components new BlockingAMReceiverImplP() as BlockingCollectionReceiverImplP,
+             CollectionC as Collector,
+             ThreadTimersC,
+             MainC,
+             SystemCallC,
+             SystemCallQueueC,
+             TinyThreadSchedulerC;
+  
+  MainC.SoftwareInit -> BlockingCollectionReceiverImplP;
+  BlockingReceive = BlockingCollectionReceiverImplP;
+  BlockingReceiveAny = BlockingCollectionReceiverImplP;
+  
+  BlockingCollectionReceiverImplP.Receive -> Collector.Receive;
+  BlockingCollectionReceiverImplP.Timer -> ThreadTimersC;
+  BlockingCollectionReceiverImplP.SystemCallQueue -> SystemCallQueueC;
+  BlockingCollectionReceiverImplP.SystemCall -> SystemCallC;
+  BlockingCollectionReceiverImplP.ThreadScheduler -> TinyThreadSchedulerC;
+  BlockingCollectionReceiverImplP.Packet -> Collector;
+}
diff --git a/tos/lib/tosthreads/lib/net/BlockingCollectionSnooperC.nc b/tos/lib/tosthreads/lib/net/BlockingCollectionSnooperC.nc
new file mode 100644
index 00000000..fcfad04f
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/BlockingCollectionSnooperC.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+generic configuration BlockingCollectionSnooperC (collection_id_t id) {
+  provides {
+    interface BlockingReceive as BlockingSnoop;
+  }
+}
+
+implementation {
+  components BlockingCollectionSnooperP;
+  
+  BlockingSnoop = BlockingCollectionSnooperP.BlockingSnoop[id];
+}
diff --git a/tos/lib/tosthreads/lib/net/BlockingCollectionSnooperP.nc b/tos/lib/tosthreads/lib/net/BlockingCollectionSnooperP.nc
new file mode 100644
index 00000000..7891ab7c
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/BlockingCollectionSnooperP.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration BlockingCollectionSnooperP {
+  provides {
+    interface BlockingReceive as BlockingSnoop[collection_id_t id];
+    interface BlockingReceive as BlockingSnoopAny;
+  }
+}
+
+implementation {
+  components new BlockingAMReceiverImplP() as BlockingCollectionReceiverImplP,
+             CollectionC as Collector,
+             ThreadTimersC,
+             MainC,
+             SystemCallC,
+             SystemCallQueueC,
+             TinyThreadSchedulerC;
+  
+  MainC.SoftwareInit -> BlockingCollectionReceiverImplP;
+  BlockingSnoop = BlockingCollectionReceiverImplP;
+  BlockingSnoopAny = BlockingCollectionReceiverImplP;
+  
+  BlockingCollectionReceiverImplP.Receive -> Collector.Snoop;
+  BlockingCollectionReceiverImplP.Timer -> ThreadTimersC;
+  BlockingCollectionReceiverImplP.SystemCallQueue -> SystemCallQueueC;
+  BlockingCollectionReceiverImplP.SystemCall -> SystemCallC;
+  BlockingCollectionReceiverImplP.ThreadScheduler -> TinyThreadSchedulerC;
+  BlockingCollectionReceiverImplP.Packet -> Collector;
+}
diff --git a/tos/lib/tosthreads/lib/net/CCollectionId.nc b/tos/lib/tosthreads/lib/net/CCollectionId.nc
new file mode 100644
index 00000000..3ebbb69a
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/CCollectionId.nc
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+interface CCollectionId {
+  command collection_id_t fetch(uint8_t clientid);
+  command error_t set(uint8_t clientid, collection_id_t collectionid);
+}
diff --git a/tos/lib/tosthreads/lib/net/ctp/BlockingCollectionSenderC.nc b/tos/lib/tosthreads/lib/net/ctp/BlockingCollectionSenderC.nc
new file mode 100644
index 00000000..4532806a
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/ctp/BlockingCollectionSenderC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include <Ctp.h>
+
+generic configuration BlockingCollectionSenderC (collection_id_t collectid) {
+  provides {
+    interface BlockingSend;
+    interface Packet;
+  }
+}
+
+implementation {
+  components BlockingCollectionSenderP,
+             new CollectionIdP(collectid),
+             CollectionC as Collector;
+             
+  enum {
+    CLIENT_ID = unique(UQ_CTP_CLIENT),
+  };
+
+  BlockingSend = BlockingCollectionSenderP.BlockingSend[CLIENT_ID];
+  Packet = Collector;
+  
+  Collector.CollectionId[CLIENT_ID] -> CollectionIdP;
+}
diff --git a/tos/lib/tosthreads/lib/net/ctp/BlockingCollectionSenderImplP.nc b/tos/lib/tosthreads/lib/net/ctp/BlockingCollectionSenderImplP.nc
new file mode 100644
index 00000000..2f98c8af
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/ctp/BlockingCollectionSenderImplP.nc
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+ 
+module BlockingCollectionSenderImplP {
+  provides {
+    interface BlockingSend[uint8_t client];
+    interface Init;
+  }
+  
+  uses {
+    interface Send[uint8_t client];
+    interface SystemCall;
+    interface Mutex;
+    interface Packet;
+    interface Leds;
+  }
+}
+
+implementation {
+  typedef struct params {
+    message_t *msg;
+    uint8_t len;
+    error_t error;
+  } params_t;
+  
+  syscall_t* send_call;
+  mutex_t my_mutex;
+  
+  command error_t Init.init()
+  {
+    call Mutex.init(&my_mutex);
+    return SUCCESS;
+  }
+
+  void sendTask(syscall_t *s)
+  {
+    params_t* p = s->params;
+    
+    p->error = call Send.send[s->id](p->msg, p->len);
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }
+  }
+
+  command error_t BlockingSend.send[uint8_t client](message_t *msg, uint8_t len)
+  {
+    syscall_t s;
+    params_t p;
+    call Mutex.lock(&my_mutex);
+    send_call = &s;
+    
+    p.msg = msg;
+    p.len = len;
+    
+    call SystemCall.start(&sendTask, &s, client, &p);
+    
+    atomic {
+      call Mutex.unlock(&my_mutex);
+      return p.error;
+    }
+  }
+  
+  event void Send.sendDone[uint8_t client](message_t* m, error_t error)
+  {
+    if (client == send_call->id) {
+      params_t* p;
+      
+      p = send_call->params;
+      p->error = error;
+      call SystemCall.finish(send_call);
+    }
+  }
+  
+  command error_t BlockingSend.cancel[uint8_t client](message_t* msg)
+  {
+    return call Send.cancel[client](msg);
+  }
+  
+  command uint8_t BlockingSend.maxPayloadLength[uint8_t client]()
+  {
+    return call Send.maxPayloadLength[client]();
+  }
+  
+  command void* BlockingSend.getPayload[uint8_t client](message_t* msg, uint8_t len)
+  {
+    return call Send.getPayload[client](msg, len);
+  }
+}
diff --git a/tos/lib/tosthreads/lib/net/ctp/BlockingCollectionSenderP.nc b/tos/lib/tosthreads/lib/net/ctp/BlockingCollectionSenderP.nc
new file mode 100644
index 00000000..17c1c417
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/ctp/BlockingCollectionSenderP.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration BlockingCollectionSenderP {
+  provides {
+    interface BlockingSend[uint8_t id];
+  }
+}
+
+implementation {
+  components BlockingCollectionSenderImplP,
+             CollectionC as Collector,
+             MutexC,
+             SystemCallC,
+             MainC,
+             LedsC;
+  
+  MainC.SoftwareInit -> BlockingCollectionSenderImplP;
+  BlockingSend = BlockingCollectionSenderImplP.BlockingSend;
+  
+  BlockingCollectionSenderImplP.Mutex -> MutexC;
+  BlockingCollectionSenderImplP.SystemCall -> SystemCallC;
+  BlockingCollectionSenderImplP.Send -> Collector;
+  BlockingCollectionSenderImplP.Packet -> Collector;
+  BlockingCollectionSenderImplP.Leds -> LedsC;
+}
+
diff --git a/tos/lib/tosthreads/lib/net/ctp/CCollectionC.nc b/tos/lib/tosthreads/lib/net/ctp/CCollectionC.nc
new file mode 100644
index 00000000..5bee546c
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/ctp/CCollectionC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "tosthread_collection.h"
+#include "Ctp.h"
+
+configuration CCollectionC {}
+
+implementation {
+  components CCollectionP as CCP;
+  components BlockingCollectionReceiverP;
+  components BlockingCollectionSnooperP;
+  components BlockingCollectionSenderP;
+  components BlockingCollectionControlC;
+  components CCollectionIdP;
+  
+  CCP.BlockingReceive -> BlockingCollectionReceiverP;
+  CCP.BlockingSnoop -> BlockingCollectionSnooperP;
+  CCP.BlockingSend -> BlockingCollectionSenderP;
+  CCP.RoutingControl -> BlockingCollectionControlC;
+  CCP.CCollectionId -> CCollectionIdP;
+  
+  components CollectionC;
+  CCP.Packet -> CollectionC;
+  CCP.CollectionPacket -> CollectionC;
+  CCP.RootControl -> CollectionC;
+  CollectionC.CollectionId -> CCP;
+}
diff --git a/tos/lib/tosthreads/lib/net/ctp/CCollectionIdP.nc b/tos/lib/tosthreads/lib/net/ctp/CCollectionIdP.nc
new file mode 100644
index 00000000..fe369ace
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/ctp/CCollectionIdP.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module CCollectionIdP
+{
+  provides {
+    interface CCollectionId;
+  }
+}
+
+implementation {
+  collection_id_t clientCollectionIds[uniqueCount(UQ_CTP_CLIENT)];
+  
+  command collection_id_t CCollectionId.fetch(uint8_t clientid)
+  {
+    return clientCollectionIds[clientid];
+  }
+  
+  command error_t CCollectionId.set(uint8_t clientid, collection_id_t collectionid)
+  {
+    if (clientid < uniqueCount(UQ_CTP_CLIENT)) {
+      clientCollectionIds[clientid] = collectionid;
+      
+      return SUCCESS;
+    }
+    
+    return FAIL;
+  }
+}
diff --git a/tos/lib/tosthreads/lib/net/ctp/CCollectionP.nc b/tos/lib/tosthreads/lib/net/ctp/CCollectionP.nc
new file mode 100644
index 00000000..5b7ee8a7
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/ctp/CCollectionP.nc
@@ -0,0 +1,123 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module CCollectionP {
+  uses {
+    interface BlockingStdControl as RoutingControl;
+    interface BlockingReceive[collection_id_t id];
+    interface BlockingReceive as BlockingSnoop[collection_id_t id];
+    interface BlockingSend[uint8_t id];
+    interface Packet;
+    interface CollectionPacket;
+    interface RootControl;
+    interface CCollectionId;
+  }
+  provides {
+    interface CollectionId[uint8_t client];
+  }
+}
+implementation {
+  command collection_id_t CollectionId.fetch[uint8_t id]() {
+    return call CCollectionId.fetch(id);
+  }
+
+  error_t collectionSetCollectionId(uint8_t clientid, collection_id_t collectionid) @C() AT_SPONTANEOUS {
+    return call CCollectionId.set(clientid, collectionid);
+  }
+  
+  error_t collectionRoutingStart() @C() AT_SPONTANEOUS {
+    return call RoutingControl.start();
+  }
+  error_t collectionRoutingStop() @C() AT_SPONTANEOUS {
+    return call RoutingControl.stop();
+  }
+
+  error_t collectionReceive(message_t* m, uint32_t timeout, collection_id_t id) @C() AT_SPONTANEOUS {
+    return call BlockingReceive.receive[id](m, timeout);
+  }
+  error_t collectionSnoop(message_t* m, uint32_t timeout, collection_id_t id) @C() AT_SPONTANEOUS {
+    return call BlockingSnoop.receive[id](m, timeout);
+  }
+  error_t collectionSend(message_t* msg, uint8_t len, uint8_t id) @C() AT_SPONTANEOUS {
+    return call BlockingSend.send[id](msg, len);
+  }
+ 
+  void collectionClear(message_t* msg) @C() AT_SPONTANEOUS {
+    call Packet.clear(msg);
+  }
+  uint8_t collectionGetPayloadLength(message_t* msg) @C() AT_SPONTANEOUS {
+    return call Packet.payloadLength(msg);
+  }
+  void collectionSetPayloadLength(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS {
+    call Packet.setPayloadLength(msg, len);
+  }
+  uint8_t collectionMaxPayloadLength() @C() AT_SPONTANEOUS {
+    return call Packet.maxPayloadLength();
+  }
+  void* collectionGetPayload(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS {
+    return call Packet.getPayload(msg, len);
+  }
+
+  am_addr_t collectionGetOrigin(message_t* msg) @C() AT_SPONTANEOUS {
+    return call CollectionPacket.getOrigin(msg);
+  }
+  void collectionSetOrigin(message_t* msg, am_addr_t addr) @C() AT_SPONTANEOUS {
+    call CollectionPacket.setOrigin(msg, addr);
+  }
+  collection_id_t collectionGetType(message_t* msg) @C() AT_SPONTANEOUS {
+    return call CollectionPacket.getType(msg);
+  }
+  void collectionSetType(message_t* msg, collection_id_t id) @C() AT_SPONTANEOUS {
+    call CollectionPacket.setType(msg, id);
+  }
+  uint8_t collectionGetSequenceNumber(message_t* msg) @C() AT_SPONTANEOUS {
+    return call CollectionPacket.getSequenceNumber(msg);
+  }
+  void collectionSetSequenceNumber(message_t* msg, uint8_t seqno) @C() AT_SPONTANEOUS {
+    call CollectionPacket.setSequenceNumber(msg, seqno);
+  }
+
+  error_t collectionSetRoot() @C() AT_SPONTANEOUS {
+    return call RootControl.setRoot();
+  }
+  error_t collectionUnsetRoot() @C() AT_SPONTANEOUS {
+    return call RootControl.unsetRoot();
+  }
+  bool collectionIsRoot() @C() AT_SPONTANEOUS {
+    return call RootControl.isRoot();
+  }
+}
+
diff --git a/tos/lib/tosthreads/lib/net/ctp/ccollection.h b/tos/lib/tosthreads/lib/net/ctp/ccollection.h
new file mode 100644
index 00000000..6ef74d00
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/ctp/ccollection.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef CCOLLECTION_H
+#define CCOLLECTION_H
+
+#include "message.h"
+#include "TinyError.h"
+#include "Collection.h"
+#include "Ctp.h"
+
+#define  NEW_COLLECTION_CLIENT_ID() ((uint8_t)unique(UQ_CTP_CLIENT))
+
+#endif //CCOLLECTION_H
diff --git a/tos/lib/tosthreads/lib/net/lqi/BlockingCollectionSenderC.nc b/tos/lib/tosthreads/lib/net/lqi/BlockingCollectionSenderC.nc
new file mode 100644
index 00000000..ae2ec49e
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/lqi/BlockingCollectionSenderC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include <MultiHopLqi.h>
+
+generic configuration BlockingCollectionSenderC (collection_id_t collectid) {
+  provides {
+    interface BlockingSend;
+    interface Packet;
+  }
+}
+
+implementation {
+  components BlockingCollectionSenderP,
+             new CollectionIdP(collectid),
+             CollectionC as Collector;
+             
+  enum {
+    CLIENT_ID = unique(UQ_LQI_CLIENT),
+  };
+
+  BlockingSend = BlockingCollectionSenderP.BlockingSend[CLIENT_ID];
+  Packet = Collector;
+  
+  BlockingCollectionSenderP.CollectionId[CLIENT_ID] -> CollectionIdP;
+}
diff --git a/tos/lib/tosthreads/lib/net/lqi/BlockingCollectionSenderImplP.nc b/tos/lib/tosthreads/lib/net/lqi/BlockingCollectionSenderImplP.nc
new file mode 100644
index 00000000..3edfbfe5
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/lqi/BlockingCollectionSenderImplP.nc
@@ -0,0 +1,126 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+ 
+module BlockingCollectionSenderImplP {
+  provides {
+    interface BlockingSend[uint8_t client];
+    interface Init;
+  }
+  
+  uses {
+    interface Send[uint8_t client];
+    interface SystemCall;
+    interface Mutex;
+    interface Packet;
+    interface Leds;
+    interface CollectionPacket;
+    interface CollectionId[uint8_t client];
+  }
+}
+
+implementation {
+  typedef struct params {
+    message_t *msg;
+    uint8_t len;
+    error_t error;
+  } params_t;
+  
+  syscall_t* send_call;
+  mutex_t my_mutex;
+  
+  command error_t Init.init()
+  {
+    call Mutex.init(&my_mutex);
+    return SUCCESS;
+  }
+
+  void sendTask(syscall_t *s)
+  {
+    params_t* p = s->params;
+    
+    call CollectionPacket.setType(p->msg, call CollectionId.fetch[s->id]());
+    p->error = call Send.send[s->id](p->msg, p->len);
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }
+  }
+
+  command error_t BlockingSend.send[uint8_t client](message_t *msg, uint8_t len)
+  {
+    syscall_t s;
+    params_t p;
+    call Mutex.lock(&my_mutex);
+    send_call = &s;
+    
+    p.msg = msg;
+    p.len = len;
+    
+    call SystemCall.start(&sendTask, &s, client, &p);
+    
+    atomic {
+      call Mutex.unlock(&my_mutex);
+      return p.error;
+    }
+  }
+  
+  event void Send.sendDone[uint8_t client](message_t* m, error_t error)
+  {
+    if (client == send_call->id) {
+      params_t* p;
+      
+      p = send_call->params;
+      p->error = error;
+      call SystemCall.finish(send_call);
+    }
+  }
+  
+  command error_t BlockingSend.cancel[uint8_t client](message_t* msg)
+  {
+    return call Send.cancel[client](msg);
+  }
+  
+  command uint8_t BlockingSend.maxPayloadLength[uint8_t client]()
+  {
+    return call Send.maxPayloadLength[client]();
+  }
+  
+  command void* BlockingSend.getPayload[uint8_t client](message_t* msg, uint8_t len)
+  {
+    return call Send.getPayload[client](msg, len);
+  }
+  
+  default command collection_id_t CollectionId.fetch[uint8_t id]() { return 0; }
+}
diff --git a/tos/lib/tosthreads/lib/net/lqi/BlockingCollectionSenderP.nc b/tos/lib/tosthreads/lib/net/lqi/BlockingCollectionSenderP.nc
new file mode 100644
index 00000000..549cea82
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/lqi/BlockingCollectionSenderP.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration BlockingCollectionSenderP {
+  provides {
+    interface BlockingSend[uint8_t id];
+  }
+  
+  uses {
+    interface CollectionId[uint8_t id];
+  }
+}
+
+implementation {
+  components BlockingCollectionSenderImplP,
+             CollectionC as Collector,
+             MutexC,
+             SystemCallC,
+             MainC,
+             LedsC;
+  
+  MainC.SoftwareInit -> BlockingCollectionSenderImplP;
+  BlockingSend = BlockingCollectionSenderImplP.BlockingSend;
+  CollectionId = BlockingCollectionSenderImplP;
+  
+  BlockingCollectionSenderImplP.Mutex -> MutexC;
+  BlockingCollectionSenderImplP.SystemCall -> SystemCallC;
+  BlockingCollectionSenderImplP.Send -> Collector;
+  BlockingCollectionSenderImplP.Packet -> Collector;
+  BlockingCollectionSenderImplP.Leds -> LedsC;
+  BlockingCollectionSenderImplP.CollectionPacket -> Collector;
+}
+
diff --git a/tos/lib/tosthreads/lib/net/lqi/CCollectionC.nc b/tos/lib/tosthreads/lib/net/lqi/CCollectionC.nc
new file mode 100644
index 00000000..527d7a62
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/lqi/CCollectionC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "tosthread_collection.h"
+#include "MultiHopLqi.h"
+
+configuration CCollectionC {}
+
+implementation {
+  components CCollectionP as CCP;
+  components BlockingCollectionReceiverP;
+  components BlockingCollectionSnooperP;
+  components BlockingCollectionSenderP;
+  components BlockingCollectionControlC;
+  components CCollectionIdP;
+  
+  CCP.BlockingReceive -> BlockingCollectionReceiverP;
+  CCP.BlockingSnoop -> BlockingCollectionSnooperP;
+  CCP.BlockingSend -> BlockingCollectionSenderP;
+  CCP.RoutingControl -> BlockingCollectionControlC;
+  CCP.CCollectionId -> CCollectionIdP;
+  
+  components CollectionC;
+  CCP.Packet -> CollectionC;
+  CCP.CollectionPacket -> CollectionC;
+  CCP.RootControl -> CollectionC;
+}
diff --git a/tos/lib/tosthreads/lib/net/lqi/CCollectionIdP.nc b/tos/lib/tosthreads/lib/net/lqi/CCollectionIdP.nc
new file mode 100644
index 00000000..a01ef306
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/lqi/CCollectionIdP.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module CCollectionIdP
+{
+  provides {
+    interface CCollectionId;
+  }
+}
+
+implementation {
+  collection_id_t clientCollectionIds[uniqueCount(UQ_LQI_CLIENT)];
+  
+  command collection_id_t CCollectionId.fetch(uint8_t clientid)
+  {
+    return clientCollectionIds[clientid];
+  }
+  
+  command error_t CCollectionId.set(uint8_t clientid, collection_id_t collectionid)
+  {
+    if (clientid < uniqueCount(UQ_LQI_CLIENT)) {
+      clientCollectionIds[clientid] = collectionid;
+      
+      return SUCCESS;
+    }
+    
+    return FAIL;
+  }
+}
diff --git a/tos/lib/tosthreads/lib/net/lqi/CCollectionP.nc b/tos/lib/tosthreads/lib/net/lqi/CCollectionP.nc
new file mode 100644
index 00000000..8d2b3d58
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/lqi/CCollectionP.nc
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module CCollectionP {
+  uses {
+    interface BlockingStdControl as RoutingControl;
+    interface BlockingReceive[collection_id_t id];
+    interface BlockingReceive as BlockingSnoop[collection_id_t id];
+    interface BlockingSend[uint8_t id];
+    interface Packet;
+    interface CollectionPacket;
+    interface RootControl;
+    interface CCollectionId;
+  }
+  provides {
+    interface CollectionId[uint8_t client];
+  }
+}
+implementation {
+  command collection_id_t CollectionId.fetch[uint8_t id]() {
+    return call CCollectionId.fetch(id);
+  }
+
+  error_t collectionSetCollectionId(uint8_t clientid, collection_id_t collectionid) @C() AT_SPONTANEOUS {
+    return call CCollectionId.set(clientid, collectionid);
+  }
+  
+  error_t collectionRoutingStart() @C() AT_SPONTANEOUS {
+    return call RoutingControl.start();
+  }
+  error_t collectionRoutingStop() @C() AT_SPONTANEOUS {
+    return call RoutingControl.stop();
+  }
+
+  error_t collectionReceive(message_t* m, uint32_t timeout, collection_id_t id) @C() AT_SPONTANEOUS {
+    return call BlockingReceive.receive[id](m, timeout);
+  }
+  error_t collectionSnoop(message_t* m, uint32_t timeout, collection_id_t id) @C() AT_SPONTANEOUS {
+    return call BlockingSnoop.receive[id](m, timeout);
+  }
+  error_t collectionSend(message_t* msg, uint8_t len, uint8_t id) @C() AT_SPONTANEOUS {
+    call CollectionPacket.setType(msg, call CCollectionId.fetch(id));
+    return call BlockingSend.send[id](msg, len);
+  }
+ 
+  void collectionClear(message_t* msg) @C() AT_SPONTANEOUS {
+    call Packet.clear(msg);
+  }
+  uint8_t collectionGetPayloadLength(message_t* msg) @C() AT_SPONTANEOUS {
+    return call Packet.payloadLength(msg);
+  }
+  void collectionSetPayloadLength(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS {
+    call Packet.setPayloadLength(msg, len);
+  }
+  uint8_t collectionMaxPayloadLength() @C() AT_SPONTANEOUS {
+    return call Packet.maxPayloadLength();
+  }
+  void* collectionGetPayload(message_t* msg, uint8_t len) @C() AT_SPONTANEOUS {
+    return call Packet.getPayload(msg, len);
+  }
+
+  am_addr_t collectionGetOrigin(message_t* msg) @C() AT_SPONTANEOUS {
+    return call CollectionPacket.getOrigin(msg);
+  }
+  void collectionSetOrigin(message_t* msg, am_addr_t addr) @C() AT_SPONTANEOUS {
+    call CollectionPacket.setOrigin(msg, addr);
+  }
+  collection_id_t collectionGetType(message_t* msg) @C() AT_SPONTANEOUS {
+    return call CollectionPacket.getType(msg);
+  }
+  void collectionSetType(message_t* msg, collection_id_t id) @C() AT_SPONTANEOUS {
+    call CollectionPacket.setType(msg, id);
+  }
+  uint8_t collectionGetSequenceNumber(message_t* msg) @C() AT_SPONTANEOUS {
+    return call CollectionPacket.getSequenceNumber(msg);
+  }
+  void collectionSetSequenceNumber(message_t* msg, uint8_t seqno) @C() AT_SPONTANEOUS {
+    call CollectionPacket.setSequenceNumber(msg, seqno);
+  }
+
+  error_t collectionSetRoot() @C() AT_SPONTANEOUS {
+    return call RootControl.setRoot();
+  }
+  error_t collectionUnsetRoot() @C() AT_SPONTANEOUS {
+    return call RootControl.unsetRoot();
+  }
+  bool collectionIsRoot() @C() AT_SPONTANEOUS {
+    return call RootControl.isRoot();
+  }
+}
+
diff --git a/tos/lib/tosthreads/lib/net/lqi/ccollection.h b/tos/lib/tosthreads/lib/net/lqi/ccollection.h
new file mode 100644
index 00000000..e0937ec5
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/lqi/ccollection.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef CCOLLECTION_H
+#define CCOLLECTION_H
+
+#include "message.h"
+#include "TinyError.h"
+#include "Collection.h"
+#include "MultiHopLqi.h"
+
+#define  NEW_COLLECTION_CLIENT_ID() ((uint8_t)unique(UQ_LQI_CLIENT))
+
+#endif //CCOLLECTION_H
diff --git a/tos/lib/tosthreads/lib/net/tosthread_collection.h b/tos/lib/tosthreads/lib/net/tosthread_collection.h
new file mode 100644
index 00000000..b3967c4e
--- /dev/null
+++ b/tos/lib/tosthreads/lib/net/tosthread_collection.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+ 
+#ifndef TOSTHREAD_COLLECTION_H
+#define TOSTHREAD_COLLECTION_H
+
+#include "ccollection.h"
+
+extern error_t collectionRoutingStart();
+extern error_t collectionRoutingStop();
+
+extern error_t collectionSetCollectionId(uint8_t clientid, collection_id_t collectionid);
+
+extern error_t collectionReceive(message_t* m, uint32_t timeout, collection_id_t id);
+extern error_t collectionSnoop(message_t* m, uint32_t timeout, collection_id_t id);
+extern error_t collectionSend(message_t* msg, uint8_t len, collection_id_t id);
+ 
+extern void    collectionClear(message_t* msg);
+extern uint8_t collectionGetPayloadLength(message_t* msg);
+extern void    collectionSetPayloadLength(message_t* msg, uint8_t len);
+extern uint8_t collectionMaxPayloadLength();
+extern void*   collectionGetPayload(message_t* msg, uint8_t len);
+
+extern am_addr_t       collectionGetOrigin(message_t* msg);
+extern void            collectionSetOrigin(message_t* msg, am_addr_t addr);
+extern collection_id_t collectionGetType(message_t* msg);
+extern void            collectionSetType(message_t* msg, collection_id_t id);
+extern uint8_t         collectionGetSequenceNumber(message_t* msg);
+extern void            collectionSetSequenceNumber(message_t* msg, uint8_t seqno);
+
+extern error_t collectionSetRoot();
+extern error_t collectionUnsetRoot();
+extern bool    collectionIsRoot();
+
+#endif //TOSTHREAD_COLLECTION_H
diff --git a/tos/lib/tosthreads/lib/printf/PrintfC.nc b/tos/lib/tosthreads/lib/printf/PrintfC.nc
new file mode 100644
index 00000000..85642a2b
--- /dev/null
+++ b/tos/lib/tosthreads/lib/printf/PrintfC.nc
@@ -0,0 +1,65 @@
+ /*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "printf.h"
+
+configuration PrintfC {}
+implementation {
+  components MainC;
+  components PrintfP;
+  PrintfP.Boot -> MainC;
+
+  components new ThreadC(200);
+  PrintfP.PrintfThread -> ThreadC;
+  
+  components BlockingSerialActiveMessageC;
+  PrintfP.SerialControl -> BlockingSerialActiveMessageC;
+  PrintfP.Packet -> BlockingSerialActiveMessageC;
+  
+  components new PrintfQueueC(uint8_t, PRINTF_BUFFER_SIZE) as QueueC;
+  PrintfP.Queue -> QueueC;
+  
+  components BarrierC;
+  PrintfP.Barrier -> BarrierC;
+  
+  components MutexC;
+  PrintfP.Mutex -> MutexC;
+
+  components new BlockingSerialAMSenderC(AM_PRINTF_MSG);
+  PrintfP.BlockingAMSend -> BlockingSerialAMSenderC;
+
+  components LedsC;
+  PrintfP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/lib/printf/PrintfP.nc b/tos/lib/tosthreads/lib/printf/PrintfP.nc
new file mode 100644
index 00000000..04d8ab04
--- /dev/null
+++ b/tos/lib/tosthreads/lib/printf/PrintfP.nc
@@ -0,0 +1,141 @@
+ /*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "printf.h"
+
+#ifdef _H_atmega128hardware_H
+static int uart_putchar(char c, FILE *stream);
+static FILE atm128_stdout =
+	FDEV_SETUP_STREAM(TCAST(int (*)(char c, FILE *stream), uart_putchar), 
+	NULL, _FDEV_SETUP_WRITE);
+#endif
+
+module PrintfP {
+  uses {
+    interface Boot;
+    interface Thread as PrintfThread;
+    interface BlockingStdControl as SerialControl;
+    interface PrintfQueue<uint8_t> as Queue;
+    interface Barrier;
+    interface Mutex;
+
+    interface BlockingAMSend;
+    interface Packet;
+    interface Leds;
+  }
+}
+implementation {
+  message_t printfMsg;
+  printf_msg_t* printf_payload;
+  mutex_t printf_mutex;
+  barrier_t flushstart_barrier;
+  barrier_t flushdone_barrier;
+
+  void flush_buffer();
+
+  event void Boot.booted() {
+    #ifdef _H_atmega128hardware_H
+      stdout = &atm128_stdout;
+    #endif
+
+    printf_payload = (printf_msg_t*)call Packet.getPayload(&printfMsg, sizeof(printf_msg_t));
+    call Mutex.init(&printf_mutex);
+    call Barrier.reset(&flushstart_barrier, 2);
+    call Barrier.reset(&flushdone_barrier, 2);
+    call PrintfThread.start(NULL);
+  }
+
+  event void PrintfThread.run(void* arg) {
+    call SerialControl.start();
+    for(;;) {
+      call Barrier.block(&flushstart_barrier);
+        flush_buffer();
+      call Barrier.block(&flushdone_barrier);
+    }
+  }
+
+  void flush_buffer() {
+    int i;
+    uint16_t q_size;
+    uint16_t length_to_send;
+
+    call Mutex.lock(&printf_mutex);
+      q_size = call Queue.size();
+    call Mutex.unlock(&printf_mutex);
+
+    while(q_size > 0) {
+      memset(printf_payload->buffer, 0, sizeof(printf_msg_t));
+      length_to_send = (q_size < sizeof(printf_msg_t)) ? q_size : sizeof(printf_msg_t);
+
+      call Mutex.lock(&printf_mutex);
+        for(i=0; i<length_to_send; i++)
+          printf_payload->buffer[i] = call Queue.dequeue();
+        q_size = call Queue.size();
+      call Mutex.unlock(&printf_mutex);
+      call BlockingAMSend.send(AM_BROADCAST_ADDR, &printfMsg, sizeof(printf_msg_t));
+    }
+  }
+
+  int printfflush() @C() @spontaneous() {
+    call Barrier.block(&flushstart_barrier);
+    call Barrier.reset(&flushstart_barrier, 2);
+    call Barrier.block(&flushdone_barrier);
+    call Barrier.reset(&flushdone_barrier, 2);
+    return SUCCESS;
+  }
+
+  #ifdef _H_msp430hardware_h
+  int putchar(int c) __attribute__((noinline)) @C() @spontaneous() {
+  #endif
+  #ifdef _H_atmega128hardware_H
+  int uart_putchar(char c, FILE *stream) __attribute__((noinline)) @C() @spontaneous() {
+  #endif
+#ifdef __M16C62PHARDWARE_H__
+  int lowlevel_putc(int c) __attribute__((noinline)) @C() @spontaneous() {
+#endif
+    uint16_t q_size;
+    error_t q_error;
+
+    call Mutex.lock(&printf_mutex);
+      q_error = call Queue.enqueue(c);
+      q_size = call Queue.size();
+    call Mutex.unlock(&printf_mutex);
+
+    if((q_size == PRINTF_BUFFER_SIZE/2))
+      printfflush();
+    if(q_error == SUCCESS) return 0;
+    else return -1;
+  }
+}
diff --git a/tos/lib/tosthreads/lib/printf/avr_stdio.h b/tos/lib/tosthreads/lib/printf/avr_stdio.h
new file mode 100644
index 00000000..e195eaeb
--- /dev/null
+++ b/tos/lib/tosthreads/lib/printf/avr_stdio.h
@@ -0,0 +1,1094 @@
+/* Copyright (c) 2002, 2005, Joerg Wunsch
+   All rights reserved.
+
+   Portions of documentation Copyright (c) 1990, 1991, 1993
+   The Regents of the University of California.
+
+   All rights reserved.
+
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+
+   * Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+
+   * Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in
+     the documentation and/or other materials provided with the
+     distribution.
+
+   * Neither the name of the copyright holders nor the names of
+     contributors may be used to endorse or promote products derived
+     from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  POSSIBILITY OF SUCH DAMAGE.
+
+  $Id: avr_stdio.h,v 1.2 2008-07-21 23:14:04 sallai Exp $
+*/
+
+#ifndef _STDIO_H_
+#define	_STDIO_H_ 1
+
+#ifndef __ASSEMBLER__
+
+#include <inttypes.h>
+#include <stdarg.h>
+
+#define __need_NULL
+#define __need_size_t
+#include <stddef.h>
+
+/** \defgroup avr_stdio <stdio.h>: Standard IO facilities
+    \code #include <stdio.h> \endcode
+
+    <h3>Introduction to the Standard IO facilities</h3>
+
+    This file declares the standard IO facilities that are implemented
+    in \c avr-libc.  Due to the nature of the underlying hardware,
+    only a limited subset of standard IO is implemented.  There is no
+    actual file implementation available, so only device IO can be
+    performed.  Since there's no operating system, the application
+    needs to provide enough details about their devices in order to
+    make them usable by the standard IO facilities.
+
+    Due to space constraints, some functionality has not been
+    implemented at all (like some of the \c printf conversions that
+    have been left out).  Nevertheless, potential users of this
+    implementation should be warned: the \c printf and \c scanf families of functions, although
+    usually associated with presumably simple things like the
+    famous "Hello, world!" program, are actually fairly complex
+    which causes their inclusion to eat up a fair amount of code space.
+    Also, they are not fast due to the nature of interpreting the
+    format string at run-time.  Whenever possible, resorting to the
+    (sometimes non-standard) predetermined conversion facilities that are
+    offered by avr-libc will usually cost much less in terms of speed
+    and code size.
+
+    <h3>Tunable options for code size vs. feature set</h3>
+
+    In order to allow programmers a code size vs. functionality tradeoff,
+    the function vfprintf() which is the heart of the printf family can be
+    selected in different flavours using linker options.  See the
+    documentation of vfprintf() for a detailed description.  The same
+    applies to vfscanf() and the \c scanf family of functions.
+
+    <h3>Outline of the chosen API</h3>
+
+    The standard streams \c stdin, \c stdout, and \c stderr are
+    provided, but contrary to the C standard, since avr-libc has no
+    knowledge about applicable devices, these streams are not already
+    pre-initialized at application startup.  Also, since there is no
+    notion of "file" whatsoever to avr-libc, there is no function
+    \c fopen() that could be used to associate a stream to some device.
+    (See \ref stdio_note1 "note 1".)  Instead, the function \c fdevopen()
+    is provided to associate a stream to a device, where the device
+    needs to provide a function to send a character, to receive a
+    character, or both.  There is no differentiation between "text" and
+    "binary" streams inside avr-libc.  Character \c \\n is sent
+    literally down to the device's \c put() function.  If the device
+    requires a carriage return (\c \\r) character to be sent before
+    the linefeed, its \c put() routine must implement this (see
+    \ref stdio_note2 "note 2").
+
+    As an alternative method to fdevopen(), the macro
+    fdev_setup_stream() might be used to setup a user-supplied FILE
+    structure.
+
+    It should be noted that the automatic conversion of a newline
+    character into a carriage return - newline sequence breaks binary
+    transfers.  If binary transfers are desired, no automatic
+    conversion should be performed, but instead any string that aims
+    to issue a CR-LF sequence must use <tt>"\r\n"</tt> explicitly.
+
+    For convenience, the first call to \c fdevopen() that opens a
+    stream for reading will cause the resulting stream to be aliased
+    to \c stdin.  Likewise, the first call to \c fdevopen() that opens
+    a stream for writing will cause the resulting stream to be aliased
+    to both, \c stdout, and \c stderr.  Thus, if the open was done
+    with both, read and write intent, all three standard streams will
+    be identical.  Note that these aliases are indistinguishable from
+    each other, thus calling \c fclose() on such a stream will also
+    effectively close all of its aliases (\ref stdio_note3 "note 3").
+
+    It is possible to tie additional user data to a stream, using
+    fdev_set_udata().  The backend put and get functions can then
+    extract this user data using fdev_get_udata(), and act
+    appropriately.  For example, a single put function could be used
+    to talk to two different UARTs that way, or the put and get
+    functions could keep internal state between calls there.
+
+    <h3>Format strings in flash ROM</h3>
+
+    All the \c printf and \c scanf family functions come in two flavours: the
+    standard name, where the format string is expected to be in
+    SRAM, as well as a version with the suffix "_P" where the format
+    string is expected to reside in the flash ROM.  The macro
+    \c PSTR (explained in \ref avr_pgmspace) becomes very handy
+    for declaring these format strings.
+
+    \anchor stdio_without_malloc
+    <h3>Running stdio without malloc()</h3>
+
+    By default, fdevopen() as well as the floating-point versions of
+    the printf and scanf family require malloc().  As this is often
+    not desired in the limited environment of a microcontroller, an
+    alternative option is provided to run completely without malloc().
+
+    The macro fdev_setup_stream() is provided to prepare a
+    user-supplied FILE buffer for operation with stdio.  If
+    floating-point operation is desired, a user-supplied buffer can as
+    well be passed for the internal buffering for the floating-point
+    numbers (and processing of \%[ scanf data).
+
+    <h4>Example</h4>
+
+    \code
+    #include <stdio.h>
+
+    static int uart_putchar(char c, FILE *stream);
+
+    static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
+                                             _FDEV_SETUP_WRITE);
+
+    static int
+    uart_putchar(char c, FILE *stream)
+    {
+
+      if (c == '\n')
+        uart_putchar('\r', stream);
+      loop_until_bit_is_set(UCSRA, UDRE);
+      UDR = c;
+      return 0;
+    }
+
+    int
+    main(void)
+    {
+      init_uart();
+      stdout = &mystdout;
+      printf("Hello, world!\n");
+
+      return 0;
+    }
+    \endcode
+
+    This example uses the initializer form FDEV_SETUP_STREAM() rather
+    than the function-like fdev_setup_stream(), so all data
+    initialization happens during C start-up.
+
+    If streams initialized that way are no longer needed, they can be
+    destroyed by first calling the macro fdev_close(), and then
+    destroying the object itself.  No call to fclose() should be
+    issued for these streams.  While calling fclose() itself is
+    harmless, it will cause an undefined reference to free() and thus
+    cause the linker to link the malloc module into the application.
+
+    <h3>Notes</h3>
+
+    \anchor stdio_note1 \par Note 1:
+    It might have been possible to implement a device abstraction that
+    is compatible with \c fopen() but since this would have required
+    to parse a string, and to take all the information needed either
+    out of this string, or out of an additional table that would need to be
+    provided by the application, this approach was not taken.
+
+    \anchor stdio_note2 \par Note 2:
+    This basically follows the Unix approach: if a device such as a
+    terminal needs special handling, it is in the domain of the
+    terminal device driver to provide this functionality.  Thus, a
+    simple function suitable as \c put() for \c fdevopen() that talks
+    to a UART interface might look like this:
+
+    \code
+    int
+    uart_putchar(char c, FILE *stream)
+    {
+
+      if (c == '\n')
+        uart_putchar('\r');
+      loop_until_bit_is_set(UCSRA, UDRE);
+      UDR = c;
+      return 0;
+    }
+    \endcode
+
+    \anchor stdio_note3 \par Note 3:
+    This implementation has been chosen because the cost of maintaining
+    an alias is considerably smaller than the cost of maintaining full
+    copies of each stream.  Yet, providing an implementation that offers
+    the complete set of standard streams was deemed to be useful.  Not
+    only that writing \c printf() instead of <tt>fprintf(mystream, ...)</tt>
+    saves typing work, but since avr-gcc needs to resort to pass all
+    arguments of variadic functions on the stack (as opposed to passing
+    them in registers for functions that take a fixed number of
+    parameters), the ability to pass one parameter less by implying
+    \c stdin will also save some execution time.
+*/
+
+#if !defined(__DOXYGEN__)
+
+/*
+ * This is an internal structure of the library that is subject to be
+ * changed without warnings at any time.  Please do *never* reference
+ * elements of it beyond by using the official interfaces provided.
+ */
+struct __file {
+	char	*buf;		/* buffer pointer */
+	unsigned char unget;	/* ungetc() buffer */
+	uint8_t	flags;		/* flags, see below */
+#define __SRD	0x0001		/* OK to read */
+#define __SWR	0x0002		/* OK to write */
+#define __SSTR	0x0004		/* this is an sprintf/snprintf string */
+#define __SPGM	0x0008		/* fmt string is in progmem */
+#define __SERR	0x0010		/* found error */
+#define __SEOF	0x0020		/* found EOF */
+#define __SUNGET 0x040		/* ungetc() happened */
+#define __SMALLOC 0x80		/* handle is malloc()ed */
+#if 0
+/* possible future extensions, will require uint16_t flags */
+#define __SRW	0x0100		/* open for reading & writing */
+#define __SLBF	0x0200		/* line buffered */
+#define __SNBF	0x0400		/* unbuffered */
+#define __SMBF	0x0800		/* buf is from malloc */
+#endif
+	int	size;		/* size of buffer */
+	int	len;		/* characters read or written so far */
+	int	(*put)(char, struct __file *);	/* function to write one char to device */
+	int	(*get)(struct __file *);	/* function to read one char from device */
+	void	*udata;		/* User defined and accessible data. */
+};
+
+#endif /* not __DOXYGEN__ */
+
+/*@{*/
+/**
+   \c FILE is the opaque structure that is passed around between the
+   various standard IO functions.
+*/
+#define FILE	struct __file
+
+/**
+   Stream that will be used as an input stream by the simplified
+   functions that don't take a \c stream argument.
+
+   The first stream opened with read intent using \c fdevopen()
+   will be assigned to \c stdin.
+*/
+#define stdin (__iob[0])
+
+/**
+   Stream that will be used as an output stream by the simplified
+   functions that don't take a \c stream argument.
+
+   The first stream opened with write intent using \c fdevopen()
+   will be assigned to both, \c stdin, and \c stderr.
+*/
+#define stdout (__iob[1])
+
+/**
+   Stream destined for error output.  Unless specifically assigned,
+   identical to \c stdout.
+
+   If \c stderr should point to another stream, the result of
+   another \c fdevopen() must be explicitly assigned to it without
+   closing the previous \c stderr (since this would also close
+   \c stdout).
+*/
+#define stderr (__iob[2])
+
+/**
+   \c EOF declares the value that is returned by various standard IO
+   functions in case of an error.  Since the AVR platform (currently)
+   doesn't contain an abstraction for actual files, its origin as
+   "end of file" is somewhat meaningless here.
+*/
+#define EOF	(-1)
+
+/** This macro inserts a pointer to user defined data into a FILE
+    stream object.
+
+    The user data can be useful for tracking state in the put and get
+    functions supplied to the fdevopen() function. */
+#define fdev_set_udata(stream, u) do { (stream)->udata = u; } while(0)
+
+/** This macro retrieves a pointer to user defined data from a FILE
+    stream object. */
+#define fdev_get_udata(stream) ((stream)->udata)
+
+#if defined(__DOXYGEN__)
+/**
+   \brief Setup a user-supplied buffer as an stdio stream
+
+   This macro takes a user-supplied buffer \c stream, and sets it up
+   as a stream that is valid for stdio operations, similar to one that
+   has been obtained dynamically from fdevopen(). The buffer to setup
+   must be of type FILE.
+
+   The arguments \c put and \c get are identical to those that need to
+   be passed to fdevopen().
+
+   The \c rwflag argument can take one of the values _FDEV_SETUP_READ,
+   _FDEV_SETUP_WRITE, or _FDEV_SETUP_RW, for read, write, or read/write
+   intent, respectively.
+
+   \note No assignments to the standard streams will be performed by
+   fdev_setup_stream().  If standard streams are to be used, these
+   need to be assigned by the user.  See also under
+   \ref stdio_without_malloc "Running stdio without malloc()".
+ */
+#define fdev_setup_stream(stream, put, get, rwflag)
+#else  /* !DOXYGEN */
+#define fdev_setup_stream(stream, p, g, f) \
+	do { \
+		(stream)->put = p; \
+		(stream)->get = g; \
+		(stream)->flags = f; \
+		(stream)->udata = 0; \
+	} while(0)
+#endif /* DOXYGEN */
+
+#define _FDEV_SETUP_READ  __SRD	/**< fdev_setup_stream() with read intent */
+#define _FDEV_SETUP_WRITE __SWR	/**< fdev_setup_stream() with write intent */
+#define _FDEV_SETUP_RW    (__SRD|__SWR)	/**< fdev_setup_stream() with read/write intent */
+
+/**
+ * Return code for an error condition during device read.
+ *
+ * To be used in the get function of fdevopen().
+ */
+#define _FDEV_ERR (-1)
+
+/**
+ * Return code for an end-of-file condition during device read.
+ *
+ * To be used in the get function of fdevopen().
+ */
+#define _FDEV_EOF (-2)
+
+#if defined(__DOXYGEN__)
+/**
+   \brief Initializer for a user-supplied stdio stream
+
+   This macro acts similar to fdev_setup_stream(), but it is to be
+   used as the initializer of a variable of type FILE.
+
+   The remaining arguments are to be used as explained in
+   fdev_setup_stream().
+ */
+#define FDEV_SETUP_STREAM(put, get, rwflag)
+#else  /* !DOXYGEN */
+#define FDEV_SETUP_STREAM(p, g, f) \
+	{ \
+		.put = p, \
+		.get = g, \
+		.flags = f, \
+		.udata = 0, \
+	}
+#endif /* DOXYGEN */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if !defined(__DOXYGEN__)
+/*
+ * Doxygen documentation can be found in fdevopen.c.
+ */
+
+extern struct __file * (COUNT(3) __iob)[];
+
+#if defined(__STDIO_FDEVOPEN_COMPAT_12)
+/*
+ * Declare prototype for the discontinued version of fdevopen() that
+ * has been in use up to avr-libc 1.2.x.  The new implementation has
+ * some backwards compatibility with the old version.
+ */
+extern FILE *fdevopen(int (*__put)(char), int (*__get)(void),
+                      int __opts __attribute__((unused)));
+#else  /* !defined(__STDIO_FDEVOPEN_COMPAT_12) */
+/* New prototype for avr-libc 1.4 and above. */
+extern FILE *fdevopen(int (*__put)(char, FILE*), int (*__get)(FILE*));
+#endif /* defined(__STDIO_FDEVOPEN_COMPAT_12) */
+
+#endif /* not __DOXYGEN__ */
+
+/**
+   This function closes \c stream, and disallows and further
+   IO to and from it.
+
+   When using fdevopen() to setup the stream, a call to fclose() is
+   needed in order to free the internal resources allocated.
+
+   If the stream has been set up using fdev_setup_stream() or
+   FDEV_SETUP_STREAM(), use fdev_close() instead.
+
+   It currently always returns 0 (for success).
+*/
+extern int	fclose(FILE *__stream);
+
+/**
+   This macro frees up any library resources that might be associated
+   with \c stream.  It should be called if \c stream is no longer
+   needed, right before the application is going to destroy the
+   \c stream object itself.
+
+   (Currently, this macro evaluates to nothing, but this might change
+   in future versions of the library.)
+*/
+#if defined(__DOXYGEN__)
+# define fdev_close()
+#else
+# define fdev_close() ((void)0)
+#endif
+
+/**
+   \c vfprintf is the central facility of the \c printf family of
+   functions.  It outputs values to \c stream under control of a
+   format string passed in \c fmt.  The actual values to print are
+   passed as a variable argument list \c ap.
+
+   \c vfprintf returns the number of characters written to \c stream,
+   or \c EOF in case of an error.  Currently, this will only happen
+   if \c stream has not been opened with write intent.
+
+   The format string is composed of zero or more directives: ordinary
+   characters (not \c %), which are copied unchanged to the output
+   stream; and conversion specifications, each of which results in
+   fetching zero or more subsequent arguments.  Each conversion
+   specification is introduced by the \c % character.  The arguments must
+   properly correspond (after type promotion) with the conversion
+   specifier.  After the \c %, the following appear in sequence:
+
+   - Zero or more of the following flags:
+      <ul>
+      <li> \c # The value should be converted to an "alternate form".  For
+            c, d, i, s, and u conversions, this option has no effect.
+            For o conversions, the precision of the number is
+            increased to force the first character of the output
+            string to a zero (except if a zero value is printed with
+            an explicit precision of zero).  For x and X conversions,
+            a non-zero result has the string `0x' (or `0X' for X
+            conversions) prepended to it.</li>
+      <li> \c 0 (zero) Zero padding.  For all conversions, the converted
+            value is padded on the left with zeros rather than blanks.
+            If a precision is given with a numeric conversion (d, i,
+            o, u, i, x, and X), the 0 flag is ignored.</li>
+      <li> \c - A negative field width flag; the converted value is to be
+            left adjusted on the field boundary.  The converted value
+            is padded on the right with blanks, rather than on the
+            left with blanks or zeros.  A - overrides a 0 if both are
+            given.</li>
+      <li> ' ' (space) A blank should be left before a positive number
+            produced by a signed conversion (d, or i).</li>
+      <li> \c + A sign must always be placed before a number produced by a
+            signed conversion.  A + overrides a space if both are
+            used.</li>
+      </ul>
+
+   -   An optional decimal digit string specifying a minimum field width.
+       If the converted value has fewer characters than the field width, it
+       will be padded with spaces on the left (or right, if the left-adjust­
+       ment flag has been given) to fill out the field width.
+   -   An optional precision, in the form of a period . followed by an
+       optional digit string.  If the digit string is omitted, the
+       precision is taken as zero.  This gives the minimum number of
+       digits to appear for d, i, o, u, x, and X conversions, or the
+       maximum number of characters to be printed from a string for \c s
+       conversions.
+   -   An optional \c l length modifier, that specifies that the
+       argument for the d, i, o, u, x, or X conversion is a \c "long int"
+       rather than \c int.
+   -   A character that specifies the type of conversion to be applied.
+
+   The conversion specifiers and their meanings are:
+
+   - \c diouxX The int (or appropriate variant) argument is converted
+           to signed decimal (d and i), unsigned octal (o), unsigned
+           decimal (u), or unsigned hexadecimal (x and X) notation.
+           The letters "abcdef" are used for x conversions; the
+           letters "ABCDEF" are used for X conversions.  The
+           precision, if any, gives the minimum number of digits that
+           must appear; if the converted value requires fewer digits,
+           it is padded on the left with zeros.
+   - \c p  The <tt>void *</tt> argument is taken as an unsigned integer,
+           and converted similarly as a <tt>%\#x</tt> command would do.
+   - \c c  The \c int argument is converted to an \c "unsigned char", and the
+           resulting character is written.
+   - \c s  The \c "char *" argument is expected to be a pointer to an array
+           of character type (pointer to a string).  Characters from
+           the array are written up to (but not including) a
+           terminating NUL character; if a precision is specified, no
+           more than the number specified are written.  If a precision
+           is given, no null character need be present; if the
+           precision is not specified, or is greater than the size of
+           the array, the array must contain a terminating NUL
+           character.
+   - \c %  A \c % is written.  No argument is converted.  The complete
+           conversion specification is "%%".
+   - \c eE The double argument is rounded and converted in the format
+           \c "[-]d.ddde±dd" where there is one digit before the
+           decimal-point character and the number of digits after it
+           is equal to the precision; if the precision is missing, it
+           is taken as 6; if the precision is zero, no decimal-point
+           character appears.  An \e E conversion uses the letter \c 'E'
+           (rather than \c 'e') to introduce the exponent.  The exponent
+           always contains two digits; if the value is zero,
+           the exponent is 00.
+   - \c fF The double argument is rounded and converted to decimal notation
+           in the format \c "[-]ddd.ddd", where the number of digits after the
+           decimal-point character is equal to the precision specification.
+           If the precision is missing, it is taken as 6; if the precision
+           is explicitly zero, no decimal-point character appears.  If a
+           decimal point appears, at least one digit appears before it.
+   - \c gG The double argument is converted in style \c f or \c e (or
+           \c F or \c E for \c G conversions).  The precision
+           specifies the number of significant digits.  If the
+           precision is missing, 6 digits are given; if the precision
+           is zero, it is treated as 1.  Style \c e is used if the
+           exponent from its conversion is less than -4 or greater
+           than or equal to the precision.  Trailing zeros are removed
+           from the fractional part of the result; a decimal point
+           appears only if it is followed by at least one digit.
+   - \c S  Similar to the \c s format, except the pointer is expected to
+           point to a program-memory (ROM) string instead of a RAM string.
+
+   In no case does a non-existent or small field width cause truncation of a
+   numeric field; if the result of a conversion is wider than the field
+   width, the field is expanded to contain the conversion result.
+
+   Since the full implementation of all the mentioned features becomes
+   fairly large, three different flavours of vfprintf() can be
+   selected using linker options.  The default vfprintf() implements
+   all the mentioned functionality except floating point conversions.
+   A minimized version of vfprintf() is available that only implements
+   the very basic integer and string conversion facilities, but none
+   of the additional options that can be specified using conversion
+   flags (these flags are parsed correctly from the format
+   specification, but then simply ignored).  This version can be
+   requested using the following \ref gcc_minusW "compiler options":
+
+   \code
+   -Wl,-u,vfprintf -lprintf_min
+   \endcode
+
+   If the full functionality including the floating point conversions
+   is required, the following options should be used:
+
+   \code
+   -Wl,-u,vfprintf -lprintf_flt -lm
+   \endcode
+
+   \par Limitations:
+   - The specified width and precision can be at most 127.
+   - For floating-point conversions, trailing digits will be lost if
+     a number close to DBL_MAX is converted with a precision > 0.
+
+ */
+
+extern int	vfprintf(FILE * ONE __stream, const char * NTS __fmt, va_list __ap);
+
+/**
+   Variant of \c vfprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	vfprintf_P(FILE * ONE __stream, const char * NTS __fmt, va_list __ap);
+
+/**
+   The function \c fputc sends the character \c c (though given as type
+   \c int) to \c stream.  It returns the character, or \c EOF in case
+   an error occurred.
+*/
+extern int	fputc(int __c, FILE * ONE __stream);
+
+#if !defined(__DOXYGEN__)
+
+/* putc() function implementation, required by standard */
+extern int	putc(int __c, FILE * ONE __stream);
+
+/* putchar() function implementation, required by standard */
+extern int	putchar(int __c);
+
+#endif /* not __DOXYGEN__ */
+
+/**
+   The macro \c putc used to be a "fast" macro implementation with a
+   functionality identical to fputc().  For space constraints, in
+   \c avr-libc, it is just an alias for \c fputc.
+*/
+#define putc(__c, __stream) fputc(__c, __stream)
+
+/**
+   The macro \c putchar sends character \c c to \c stdout.
+*/
+#define putchar(__c) fputc(__c, stdout)
+
+/**
+   The function \c printf performs formatted output to stream
+   \c stderr.  See \c vfprintf() for details.
+*/
+extern int	printf(const char * NTS __fmt, ...);
+
+/**
+   Variant of \c printf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	printf_P(const char * NTS __fmt, ...);
+
+/**
+   The function \c vprintf performs formatted output to stream
+   \c stdout, taking a variable argument list as in vfprintf().
+
+   See vfprintf() for details.
+*/
+extern int	vprintf(const char * NTS __fmt, va_list __ap);
+
+/**
+   Variant of \c printf() that sends the formatted characters
+   to string \c s.
+*/
+extern int	sprintf(char * NTS __s, const char * NTS __fmt, ...);
+
+/**
+   Variant of \c sprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	sprintf_P(char * NTS __s, const char * NTS __fmt, ...);
+
+/**
+   Like \c sprintf(), but instead of assuming \c s to be of infinite
+   size, no more than \c n characters (including the trailing NUL
+   character) will be converted to \c s.
+
+   Returns the number of characters that would have been written to
+   \c s if there were enough space.
+*/
+extern int	snprintf(char * NTS __s, size_t __n, const char * NTS __fmt, ...);
+
+/**
+   Variant of \c snprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	snprintf_P(char * NTS __s, size_t __n, const char * NTS __fmt, ...);
+
+/**
+   Like \c sprintf() but takes a variable argument list for the
+   arguments.
+*/
+extern int	vsprintf(char * NTS __s, const char * NTS __fmt, va_list ap);
+
+/**
+   Variant of \c vsprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	vsprintf_P(char * NTS __s, const char * NTS __fmt, va_list ap);
+
+/**
+   Like \c vsprintf(), but instead of assuming \c s to be of infinite
+   size, no more than \c n characters (including the trailing NUL
+   character) will be converted to \c s.
+
+   Returns the number of characters that would have been written to
+   \c s if there were enough space.
+*/
+extern int	vsnprintf(char * NTS __s, size_t __n, const char * NTS __fmt, va_list ap);
+
+/**
+   Variant of \c vsnprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	vsnprintf_P(char * NTS __s, size_t __n, const char * NTS __fmt, va_list ap);
+/**
+   The function \c fprintf performs formatted output to \c stream.
+   See \c vfprintf() for details.
+*/
+extern int	fprintf(FILE * ONE __stream, const char * NTS __fmt, ...);
+
+/**
+   Variant of \c fprintf() that uses a \c fmt string that resides
+   in program memory.
+*/
+extern int	fprintf_P(FILE * ONE __stream, const char * NTS __fmt, ...);
+
+/**
+   Write the string pointed to by \c str to stream \c stream.
+
+   Returns 0 on success and EOF on error.
+*/
+extern int	fputs(const char * NTS __str, FILE * ONE __stream);
+
+/**
+   Variant of fputs() where \c str resides in program memory.
+*/
+extern int	fputs_P(const char * NTS __str, FILE * ONE __stream);
+
+/**
+   Write the string pointed to by \c str, and a trailing newline
+   character, to \c stdout.
+*/
+extern int	puts(const char * NTS __str);
+
+/**
+   Variant of puts() where \c str resides in program memory.
+*/
+extern int	puts_P(const char * NTS __str);
+
+/**
+   Write \c nmemb objects, \c size bytes each, to \c stream.
+   The first byte of the first object is referenced by \c ptr.
+
+   Returns the number of objects successfully written, i. e.
+   \c nmemb unless an output error occured.
+ */
+extern size_t	fwrite(const void *__ptr, size_t __size, size_t __nmemb,
+		       FILE * ONE __stream);
+
+/**
+   The function \c fgetc reads a character from \c stream.  It returns
+   the character, or \c EOF in case end-of-file was encountered or an
+   error occurred.  The routines feof() or ferror() must be used to
+   distinguish between both situations.
+*/
+extern int	fgetc(FILE * ONE __stream);
+
+#if !defined(__DOXYGEN__)
+
+/* getc() function implementation, required by standard */
+extern int	getc(FILE * ONE __stream);
+
+/* getchar() function implementation, required by standard */
+extern int	getchar(void);
+
+#endif /* not __DOXYGEN__ */
+
+/**
+   The macro \c getc used to be a "fast" macro implementation with a
+   functionality identical to fgetc().  For space constraints, in
+   \c avr-libc, it is just an alias for \c fgetc.
+*/
+#define getc(__stream) fgetc(__stream)
+
+/**
+   The macro \c getchar reads a character from \c stdin.  Return
+   values and error handling is identical to fgetc().
+*/
+#define getchar() fgetc(stdin)
+
+/**
+   The ungetc() function pushes the character \c c (converted to an
+   unsigned char) back onto the input stream pointed to by \c stream.
+   The pushed-back character will be returned by a subsequent read on
+   the stream.
+
+   Currently, only a single character can be pushed back onto the
+   stream.
+
+   The ungetc() function returns the character pushed back after the
+   conversion, or \c EOF if the operation fails.  If the value of the
+   argument \c c character equals \c EOF, the operation will fail and
+   the stream will remain unchanged.
+*/
+extern int	ungetc(int __c, FILE * ONE __stream);
+
+/**
+   Read at most <tt>size - 1</tt> bytes from \c stream, until a
+   newline character was encountered, and store the characters in the
+   buffer pointed to by \c str.  Unless an error was encountered while
+   reading, the string will then be terminated with a \c NUL
+   character.
+
+   If an error was encountered, the function returns NULL and sets the
+   error flag of \c stream, which can be tested using ferror().
+   Otherwise, a pointer to the string will be returned.  */
+extern char	*fgets(char * NTS __str, int __size, FILE * ONE __stream);
+
+/**
+   Similar to fgets() except that it will operate on stream \c stdin,
+   and the trailing newline (if any) will not be stored in the string.
+   It is the caller's responsibility to provide enough storage to hold
+   the characters read.  */
+extern char	*gets(char * NTS __str);
+
+/**
+   Read \c nmemb objects, \c size bytes each, from \c stream,
+   to the buffer pointed to by \c ptr.
+
+   Returns the number of objects successfully read, i. e.
+   \c nmemb unless an input error occured or end-of-file was
+   encountered.  feof() and ferror() must be used to distinguish
+   between these two conditions.
+ */
+extern size_t	fread(void *__ptr, size_t __size, size_t __nmemb,
+		      FILE * ONE __stream);
+
+/**
+   Clear the error and end-of-file flags of \c stream.
+ */
+extern void	clearerr(FILE * ONE __stream);
+
+#if !defined(__DOXYGEN__)
+/* fast inlined version of clearerr() */
+#define clearerror(s) do { (s)->flags &= ~(__SERR | __SEOF); } while(0)
+#endif /* !defined(__DOXYGEN__) */
+
+/**
+   Test the end-of-file flag of \c stream.  This flag can only be cleared
+   by a call to clearerr().
+ */
+extern int	feof(FILE * ONE __stream);
+
+#if !defined(__DOXYGEN__)
+/* fast inlined version of feof() */
+#define feof(s) ((s)->flags & __SEOF)
+#endif /* !defined(__DOXYGEN__) */
+
+/**
+   Test the error flag of \c stream.  This flag can only be cleared
+   by a call to clearerr().
+ */
+extern int	ferror(FILE * ONE __stream);
+
+#if !defined(__DOXYGEN__)
+/* fast inlined version of ferror() */
+#define ferror(s) ((s)->flags & __SERR)
+#endif /* !defined(__DOXYGEN__) */
+
+/**
+   Formatted input.  This function is the heart of the \c scanf
+   family of functions.
+
+   Characters are read from \c stream and processed in a way
+   described by \c fmt.  Conversion results will be assigned to the
+   parameters passed via \c ap.
+
+   The format string \c fmt is scanned for conversion specifications.
+   Anything that doesn't comprise a conversion specification is taken
+   as text that is matched literally against the input.  White space
+   in the format string will match any white space in the data
+   (including none), all other characters match only itself.
+   Processing is aborted as soon as the data and format string no
+   longer match, or there is an error or end-of-file condition on
+   \c stream.
+
+   Most conversions skip leading white space before starting the
+   actual conversion.
+
+   Conversions are introduced with the character \b %.  Possible
+   options can follow the \b %:
+
+   - a \c * indicating that the conversion should be performed but
+     the conversion result is to be discarded; no parameters will
+     be processed from \c ap,
+   - the character \c h indicating that the argument is a pointer
+     to <tt>short int</tt> (rather than <tt>int</tt>),
+   - the character \c l indicating that the argument is a pointer
+     to <tt>long int</tt> (rather than <tt>int</tt>, for integer
+     type conversions), or a pointer to \c double (for floating
+     point conversions).
+
+   In addition, a maximal field width may be specified as a nonzero
+   positive decimal integer, which will restrict the conversion to at
+   most this many characters from the input stream.  This field width
+   is limited to at most 127 characters which is also the default
+   value (except for the <tt>%c</tt> conversion that defaults to 1).
+
+   The following conversion flags are supported:
+
+   - \c % Matches a literal \c % character.  This is not a conversion.
+   - \c d Matches an optionally signed decimal integer; the next
+     pointer must be a pointer to \c int.
+   - \c i Matches an optionally signed integer; the next pointer must
+     be a pointer to \c int.  The integer is read in base 16 if it
+     begins with \b 0x or \b 0X, in base 8 if it begins with \b 0, and
+     in base 10 otherwise.  Only characters that correspond to the
+     base are used.
+   - \c o Matches an octal integer; the next pointer must be a pointer to
+     <tt>unsigned int</tt>.
+   - \c u Matches an optionally signed decimal integer; the next
+     pointer must be a pointer to <tt>unsigned int</tt>.
+   - \c x Matches an optionally signed hexadecimal integer; the next
+     pointer must be a pointer to <tt>unsigned int</tt>.
+   - \c f Matches an optionally signed floating-point number; the next
+     pointer must be a pointer to \c float.
+   - <tt>e, g, E, G</tt> Equivalent to \c f.
+   - \c s
+     Matches a sequence of non-white-space characters; the next pointer
+     must be a pointer to \c char, and the array must be large enough to
+     accept all the sequence and the terminating \c NUL character.  The
+     input string stops at white space or at the maximum field width,
+     whichever occurs first.
+   - \c c
+     Matches a sequence of width count characters (default 1); the next
+     pointer must be a pointer to \c char, and there must be enough room
+     for all the characters (no terminating \c NUL is added).  The usual
+     skip of leading white space is suppressed.  To skip white space
+     first, use an explicit space in the format.
+   - \c [
+     Matches a nonempty sequence of characters from the specified set
+     of accepted characters; the next pointer must be a pointer to \c
+     char, and there must be enough room for all the characters in the
+     string, plus a terminating \c NUL character.  The usual skip of
+     leading white space is suppressed.  The string is to be made up
+     of characters in (or not in) a particular set; the set is defined
+     by the characters between the open bracket \c [ character and a
+     close bracket \c ] character.  The set excludes those characters
+     if the first character after the open bracket is a circumflex
+     \c ^.  To include a close bracket in the set, make it the first
+     character after the open bracket or the circumflex; any other
+     position will end the set.  The hyphen character \c - is also
+     special; when placed between two other characters, it adds all
+     intervening characters to the set.  To include a hyphen, make it
+     the last character before the final close bracket.  For instance,
+     <tt>[^]0-9-]</tt> means the set of <em>everything except close
+     bracket, zero through nine, and hyphen</em>.  The string ends
+     with the appearance of a character not in the (or, with a
+     circumflex, in) set or when the field width runs out.
+   - \c p
+     Matches a pointer value (as printed by <tt>%p</tt> in printf()); the
+     next pointer must be a pointer to \c void.
+   - \c n
+     Nothing is expected; instead, the number of characters consumed
+     thus far from the input is stored through the next pointer, which
+     must be a pointer to \c int.  This is not a conversion, although it
+     can be suppressed with the \c * flag.
+
+     These functions return the number of input items assigned, which
+     can be fewer than provided for, or even zero, in the event of a
+     matching failure.  Zero indicates that, while there was input
+     available, no conversions were assigned; typically this is due
+     to an invalid input character, such as an alphabetic character
+     for a <tt>%d</tt> conversion.  The value \c EOF is returned if an input
+     failure occurs before any conversion such as an end-of-file
+     occurs.  If an error or end-of-file occurs after conversion has
+     begun, the number of conversions which were successfully
+     completed is returned.
+
+     By default, all the conversions described above are available
+     except the floating-point conversions, and the <tt>\%[</tt> conversion.
+     These conversions will be available in the extended version
+     provided by the library \c libscanf_flt.a.  Note that either of
+     these conversions requires the availability of a buffer that
+     needs to be obtained at run-time using malloc().  If this buffer
+     cannot be obtained, the operation is aborted, returning the
+     value \c EOF.  To link a program against the extended version,
+     use the following compiler flags in the link stage:
+
+     \code
+     -Wl,-u,vfscanf -lscanf_flt -lm
+     \endcode
+
+     A third version is available for environments that are tight
+     on space.  This version is provided in the library
+     \c libscanf_min.a, and can be requested using the following
+     options in the link stage:
+
+     \code
+     -Wl,-u,vfscanf -lscanf_min -lm
+     \endcode
+
+     In addition to the restrictions of the standard version, this
+     version implements no field width specification, no conversion
+     assignment suppression flag (\c *), no <tt>%n</tt> specification, and
+     no general format character matching at all.  All characters in
+     \c fmt that do not comprise a conversion specification will
+     simply be ignored, including white space (that is normally used
+     to consume \e any amount of white space in the input stream).
+     However, the usual skip of initial white space in the formats
+     that support it is implemented.
+*/
+extern int	vfscanf(FILE * ONE __stream, const char * NTS __fmt, va_list __ap);
+
+/**
+   Variant of vfscanf() using a \c fmt string in program memory.
+ */
+extern int	vfscanf_P(FILE * ONE __stream, const char * NTS __fmt, va_list __ap);
+
+/**
+   The function \c fscanf performs formatted input, reading the
+   input data from \c stream.
+
+   See vfscanf() for details.
+ */
+extern int	fscanf(FILE * ONE __stream, const char * NTS __fmt, ...);
+
+/**
+   Variant of fscanf() using a \c fmt string in program memory.
+ */
+extern int	fscanf_P(FILE * ONE __stream, const char * NTS __fmt, ...);
+
+/**
+   The function \c scanf performs formatted input from stream \c stdin.
+
+   See vfscanf() for details.
+ */
+extern int	scanf(const char * NTS __fmt, ...);
+
+/**
+   Variant of scanf() where \c fmt resides in program memory.
+ */
+extern int	scanf_P(const char * NTS __fmt, ...);
+
+/**
+   The function \c vscanf performs formatted input from stream
+   \c stdin, taking a variable argument list as in vfscanf().
+
+   See vfscanf() for details.
+*/
+extern int	vscanf(const char * NTS __fmt, va_list __ap);
+
+/**
+   The function \c sscanf performs formatted input, reading the
+   input data from the buffer pointed to by \c buf.
+
+   See vfscanf() for details.
+ */
+extern int	sscanf(const char * NTS __buf, const char * NTS __fmt, ...);
+
+/**
+   Variant of sscanf() using a \c fmt string in program memory.
+ */
+extern int	sscanf_P(const char * NTS __buf, const char * NTS __fmt, ...);
+
+#if defined(__DOXYGEN__)
+/**
+   Flush \c stream.
+
+   This is a null operation provided for source-code compatibility
+   only, as the standard IO implementation currently does not perform
+   any buffering.
+ */
+extern int	fflush(FILE * ONE stream);
+#else
+static __inline__ int fflush(FILE * ONE stream __attribute__((unused)))
+{
+	return 0;
+}
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+/*@}*/
+
+/*
+ * The following constants are currently not used by avr-libc's
+ * stdio subsystem.  They are defined here since the gcc build
+ * environment expects them to be here.
+ */
+#define SEEK_SET 0
+#define SEEK_CUR 1
+#define SEEK_END 2
+
+#endif /* __ASSEMBLER */
+
+#endif /* _STDLIB_H_ */
diff --git a/tos/lib/tosthreads/lib/printf/printf.h b/tos/lib/tosthreads/lib/printf/printf.h
new file mode 100644
index 00000000..9ef1453f
--- /dev/null
+++ b/tos/lib/tosthreads/lib/printf/printf.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2006 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.2 $
+ * @date $Date: 2010-06-29 22:07:51 $
+ */
+
+#ifndef PRINTF_H
+#define PRINTF_H
+
+#ifndef PRINTF_BUFFER_SIZE
+#define PRINTF_BUFFER_SIZE 255 
+#endif
+
+#if PRINTF_BUFFER_SIZE > 255
+  #define PrintfQueueC	BigQueueC
+  #define PrintfQueue	BigQueue
+#else
+  #define PrintfQueueC	QueueC
+  #define PrintfQueue	Queue
+#endif
+
+#ifdef _H_msp430hardware_h
+  #include <stdio.h>
+#endif
+#ifdef _H_atmega128hardware_H
+  #include "avr_stdio.h"
+#endif
+#include "message.h"
+
+typedef nx_struct printf_msg {
+  nx_uint8_t buffer[TOSH_DATA_LENGTH];
+} printf_msg_t;
+
+enum {
+  AM_PRINTF_MSG = 100,
+};
+
+int printfflush();
+
+#endif //PRINTF_H
+
diff --git a/tos/lib/tosthreads/lib/serial/SerialActiveMessageC.nc b/tos/lib/tosthreads/lib/serial/SerialActiveMessageC.nc
new file mode 100644
index 00000000..71ecd6c1
--- /dev/null
+++ b/tos/lib/tosthreads/lib/serial/SerialActiveMessageC.nc
@@ -0,0 +1,75 @@
+//$Id: SerialActiveMessageC.nc,v 1.2 2010-06-29 22:07:51 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Sending active messages over the serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include "Serial.h"
+configuration SerialActiveMessageC {
+  provides {
+    interface SplitControl;
+    interface AMSend[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+  uses interface Leds;
+}
+implementation {
+  components new SerialActiveMessageP() as AM, SerialDispatcherC;
+  components SerialPacketInfoActiveMessageP as Info, MainC;
+
+  MainC.SoftwareInit -> SerialDispatcherC;
+  Leds = SerialDispatcherC;
+  SplitControl = SerialDispatcherC;
+  
+  AMSend = AM;
+  Receive = AM.Receive;
+  ReceiveDefault = AM.ReceiveDefault;
+  Packet = AM;
+  AMPacket = AM;
+  PacketAcknowledgements = AM;
+  
+  AM.SubSend -> SerialDispatcherC.Send[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+  AM.SubReceive -> SerialDispatcherC.Receive[TOS_SERIAL_ACTIVE_MESSAGE_ID];
+  
+  SerialDispatcherC.SerialPacketInfo[TOS_SERIAL_ACTIVE_MESSAGE_ID] -> Info;
+}
diff --git a/tos/lib/tosthreads/lib/serial/SerialActiveMessageP.nc b/tos/lib/tosthreads/lib/serial/SerialActiveMessageP.nc
new file mode 100644
index 00000000..9a133f1c
--- /dev/null
+++ b/tos/lib/tosthreads/lib/serial/SerialActiveMessageP.nc
@@ -0,0 +1,208 @@
+//$Id: SerialActiveMessageP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Sending active messages over the serial port.
+ *
+ * @author Philip Levis
+ * @author Ben Greenstein
+ * @date August 7 2005
+ *
+ */
+
+#include <Serial.h>
+
+generic module SerialActiveMessageP () {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface AMPacket;
+    interface Packet;
+    interface PacketAcknowledgements;
+  }
+  uses {
+    interface Send as SubSend;
+    interface Receive as SubReceive;
+  }
+}
+implementation {
+
+  serial_header_t* ONE getHeader(message_t* ONE msg) {
+    return TCAST(serial_header_t* ONE, (uint8_t*)msg + offsetof(message_t, data) - sizeof(serial_header_t));
+  }
+
+  serial_metadata_t* getMetadata(message_t* msg) {
+    return (serial_metadata_t*)(msg->metadata);
+  }
+  
+  command error_t AMSend.send[am_id_t id](am_addr_t dest,
+					  message_t* msg,
+					  uint8_t len) {
+    serial_header_t* header = getHeader(msg);
+    header->dest = dest;
+    // Do not set the source address or group, as doing so
+    // prevents transparent bridging. Need a better long-term
+    // solution for this.
+    //header->src = call AMPacket.address();
+    //header->group = TOS_AM_GROUP;
+    header->type = id;
+    header->length = len;
+
+    return call SubSend.send(msg, len);
+  }
+
+  command error_t AMSend.cancel[am_id_t id](message_t* msg) {
+    return call SubSend.cancel(msg);
+  }
+
+  command uint8_t AMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload[am_id_t id](message_t* m, uint8_t len) {
+    return call Packet.getPayload(m, len);
+  }
+  
+  event void SubSend.sendDone(message_t* msg, error_t result) {
+    signal AMSend.sendDone[call AMPacket.type(msg)](msg, result);
+  }
+
+  default event void AMSend.sendDone[uint8_t id](message_t* msg, error_t result) {
+    return;
+  }
+  
+  default event message_t* Receive.receive[uint8_t id](message_t* msg, void* payload, uint8_t len) {
+    return signal ReceiveDefault.receive[id](msg, payload, len);
+  }
+ 
+  default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+ 
+  event message_t* SubReceive.receive(message_t* msg, void* payload, uint8_t len) {
+    return signal Receive.receive[call AMPacket.type(msg)](msg, msg->data, len);
+  }
+
+  command void Packet.clear(message_t* msg) {
+    memset(getHeader(msg), 0, sizeof(serial_header_t));
+    return;
+  }
+
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    serial_header_t* header = getHeader(msg);    
+    return header->length;
+  }
+
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+    getHeader(msg)->length  = len;
+  }
+  
+  command uint8_t Packet.maxPayloadLength() {
+    return TOSH_DATA_LENGTH;
+  }
+  
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    if (len > call Packet.maxPayloadLength()) {
+      return NULL;
+    }
+    else {
+      return (void * COUNT_NOK(len))msg->data;
+    }
+  }
+
+  command am_addr_t AMPacket.address() {
+    return 0;
+  }
+
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->dest;
+  }
+
+  command am_addr_t AMPacket.source(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->src;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+    serial_header_t* header = getHeader(amsg);
+    header->dest = addr;
+  }
+
+  command void AMPacket.setSource(message_t* amsg, am_addr_t addr) {
+    serial_header_t* header = getHeader(amsg);
+    header->src = addr;
+  }
+  
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return TRUE;
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    serial_header_t* header = getHeader(amsg);
+    return header->type;
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t type) {
+    serial_header_t* header = getHeader(amsg);
+    header->type = type;
+  }
+
+  async command error_t PacketAcknowledgements.requestAck( message_t* msg ) {
+    return FAIL;
+  }
+  async command error_t PacketAcknowledgements.noAck( message_t* msg ) {
+    return SUCCESS;
+  }
+  
+  command void AMPacket.setGroup(message_t* msg, am_group_t group) {
+    serial_header_t* header = getHeader(msg);
+    header->group = group;
+  }
+
+  command am_group_t AMPacket.group(message_t* msg) {
+    serial_header_t* header = getHeader(msg);
+    return header->group;
+  }
+
+  command am_group_t AMPacket.localGroup() {
+    return TOS_AM_GROUP;
+  }
+
+ 
+  async command bool PacketAcknowledgements.wasAcked(message_t* msg) {
+    return FALSE;
+  }
+
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/BigCrc.nc b/tos/lib/tosthreads/lib/tinyld/BigCrc.nc
new file mode 100644
index 00000000..248ef1a2
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/BigCrc.nc
@@ -0,0 +1,4 @@
+interface BigCrc {
+  command error_t computeCrc(void* buf, uint16_t len);
+  event void computeCrcDone(void* buf, uint16_t len, uint16_t crc, error_t error);
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/BigCrcC.nc b/tos/lib/tosthreads/lib/tinyld/BigCrcC.nc
new file mode 100644
index 00000000..ed90bfab
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/BigCrcC.nc
@@ -0,0 +1,12 @@
+configuration BigCrcC {
+  provides interface BigCrc;
+}
+
+implementation {
+  components CrcC,
+             BigCrcP;
+  
+  BigCrc = BigCrcP;
+  
+  BigCrcP.Crc -> CrcC;
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/BigCrcP.nc b/tos/lib/tosthreads/lib/tinyld/BigCrcP.nc
new file mode 100644
index 00000000..6565bd42
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/BigCrcP.nc
@@ -0,0 +1,44 @@
+module BigCrcP {
+  provides interface BigCrc;
+  uses interface Crc;
+}
+
+implementation {
+  bool isBusy = FALSE;
+  void* inbuf;
+  uint16_t inlen;
+  uint16_t pos;
+  uint16_t computedCrc;
+
+  task void computeCrc()
+  {
+    uint8_t len = 0xFF;
+    if (inlen < 0xFF) {
+      len = inlen;
+    }
+    computedCrc = call Crc.seededCrc16(computedCrc, inbuf + pos, len);
+    inlen -= len;
+    pos += len;
+    
+    if (inlen > 0) {
+      post computeCrc();
+    } else {
+      isBusy = FALSE;
+      signal BigCrc.computeCrcDone(inbuf, pos + 1, computedCrc, SUCCESS);
+    }
+  }
+
+  command error_t BigCrc.computeCrc(void* buf, uint16_t len)
+  {
+    if (isBusy == TRUE) {
+      return EBUSY;
+    }
+    
+    inbuf = buf;
+    inlen = len;
+    computedCrc = pos = 0;
+    post computeCrc();
+    
+    return SUCCESS;
+  }
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/DynamicLoader.h b/tos/lib/tosthreads/lib/tinyld/DynamicLoader.h
new file mode 100755
index 00000000..8d63a740
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/DynamicLoader.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#ifndef DYNAMICLOADER_H
+#define DYNAMICLOADER_H
+
+//#defines for setting up which set of apis the dynamic loader 
+//should recognize.  This should eventually move into a file that 
+//gets #included in here, but for now we set the defaults here.
+
+#ifdef TOSTHREAD_TENET
+#define ApiForDynamicLoaderC TosThreadTenetApiC
+#define SLCS_TYPES_FILE      "tosthread_tenet_slcs_types.h"
+#else
+#define ApiForDynamicLoaderC TosThreadApiC
+#define SLCS_TYPES_FILE      "tosthread_slcs_types.h"
+#endif
+
+#define TOSTHREAD_DYNAMIC_LOADER
+
+#ifndef DISABLE_LOADER_FLASH
+#include "StorageVolumes.h"
+#endif
+
+enum {
+  READSOURCE_MEMORY = 0xFF,
+};
+
+#endif
diff --git a/tos/lib/tosthreads/lib/tinyld/DynamicLoader.nc b/tos/lib/tosthreads/lib/tinyld/DynamicLoader.nc
new file mode 100755
index 00000000..6a3705e8
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/DynamicLoader.nc
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "thread.h"
+
+interface DynamicLoader
+{
+  command error_t loadFromFlash(uint8_t volumeId);
+  event void loadFromFlashDone(uint8_t volumeId, tosthread_t id, error_t error);
+  command error_t loadFromMemory(void *addr);
+  event void loadFromMemoryDone(void *addr, tosthread_t id, error_t error);
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/DynamicLoaderC.nc b/tos/lib/tosthreads/lib/tinyld/DynamicLoaderC.nc
new file mode 100755
index 00000000..1f1d0edd
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/DynamicLoaderC.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+ 
+#include "DynamicLoader.h"
+
+configuration DynamicLoaderC
+{
+  provides interface DynamicLoader;
+}
+
+implementation
+{
+  components MainC, 
+             DynamicLoaderP,
+             LedsC, NoLedsC,
+             LoadSourceMapC,
+             DynamicThreadC,
+             ReferenceCounterC,
+             TinyThreadSchedulerC;
+
+  DynamicLoader = DynamicLoaderP;
+
+  DynamicLoaderP <- MainC.SoftwareInit;
+  DynamicLoaderP.Leds -> LedsC;
+  DynamicLoaderP.ImageRead -> LoadSourceMapC;
+  DynamicLoaderP.DynamicThread -> DynamicThreadC;
+  DynamicLoaderP.ReferenceCounter -> ReferenceCounterC;
+  DynamicLoaderP.ThreadNotification -> DynamicThreadC;
+  DynamicLoaderP.ThreadScheduler -> TinyThreadSchedulerC;
+  
+  components ApiForDynamicLoaderC;
+  components PMManagerC;
+  DynamicLoaderP.PMManager -> PMManagerC;
+
+#ifndef DISABLE_LOADER_USERBUTTON
+  components UserButtonC;
+  DynamicLoaderP.UserButton -> UserButtonC;
+#endif
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/DynamicLoaderP.nc b/tos/lib/tosthreads/lib/tinyld/DynamicLoaderP.nc
new file mode 100755
index 00000000..2241ddb0
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/DynamicLoaderP.nc
@@ -0,0 +1,481 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Razvan Musaloiu-E. <razvanm@cs.jhu.edu>
+ */
+ 
+#include SLCS_TYPES_FILE
+#include "thread.h"
+
+module DynamicLoaderP
+{
+  provides {
+    interface Init;
+    interface DynamicLoader;
+  }
+  
+  uses {
+    interface Leds;
+    interface BlockRead as ImageRead[uint8_t id];
+    interface DynamicThread;
+    interface ThreadNotification[uint8_t id];
+    interface ThreadScheduler;
+    interface ReferenceCounter;
+    interface PMManager;
+#ifndef DISABLE_LOADER_USERBUTTON
+    interface UserButton;
+#endif
+  }
+}
+
+implementation
+{ 
+  uint8_t *code;   // Points to first byte of the program code in the internal flash
+  uint8_t *tablesMemory;
+  void *gVarMemory;
+  struct prog_desc prog_desc;
+  init_block_t *proc;
+  
+  uint16_t codePtr;   // Records what code has been copied to the internal flash
+  uint16_t nextAddr;
+  uint8_t *nextTask_chain;   // Used to update the next patching address in a chain
+  
+  uint8_t readSource;   // Loads from flash or memory
+  uint16_t readSourceOffset;   // If loading from memory, then this is effectively the passed-in memory address  
+  error_t retError = FAIL;
+  tosthread_t handler;
+  uint16_t threadCodeSizes[TOSTHREAD_MAX_NUM_THREADS];
+  uint16_t codeFirstAddrs[TOSTHREAD_MAX_NUM_THREADS];
+  
+  async event void ThreadNotification.justCreated[uint8_t id]()
+  {
+    thread_t *t = call ThreadScheduler.threadInfo(id);
+    if(t->init_block != NULL) {
+      call ReferenceCounter.increment(&(t->init_block->thread_counter));
+    }
+  }
+  
+  async event void ThreadNotification.aboutToDestroy[uint8_t id]()
+  {
+    thread_t *t = call ThreadScheduler.threadInfo(id);
+    if(t->init_block != NULL) {
+      call ReferenceCounter.decrement(&(t->init_block->thread_counter));
+    }
+  }
+
+  task void loadDoneTask()
+  {
+    if (retError != SUCCESS)
+      handler = TOSTHREAD_INVALID_THREAD_ID;
+
+    if (readSource == READSOURCE_MEMORY) {
+      signal DynamicLoader.loadFromMemoryDone(((void *)readSourceOffset), handler, retError);
+    } else {
+      signal DynamicLoader.loadFromFlashDone(readSource, handler, retError);
+    }
+  }
+    
+  void initProgDesc()
+  {
+    prog_desc.main_addr = 0;
+    prog_desc.alloc_count = 0;
+    prog_desc.g_reloc_count = 0;
+    prog_desc.l_reloc_count = 0;
+    prog_desc.code_count = 0;
+    prog_desc.patch_table_count = 0;
+
+    prog_desc.loading_stage = 0;
+    codePtr = 0;
+  }
+
+  void errorHandler()
+  {
+    call Leds.set(7);
+    
+    if (tablesMemory != NULL) { free(tablesMemory); tablesMemory = NULL; }
+    if (gVarMemory != NULL) { free(gVarMemory); gVarMemory = NULL; }
+    if (proc != NULL) { free(proc); proc = NULL; }
+    initProgDesc();
+    
+    retError = FAIL;
+    post loadDoneTask();
+  }
+
+  void run_proc(void *arg)
+  {
+    init_block_t* curProc = arg;
+    thread_t* t = call ThreadScheduler.currentThreadInfo();
+    t->init_block = curProc;
+    
+    (*(curProc->init_ptr))(curProc->init_arg);
+    call ReferenceCounter.waitOnValue(&(curProc->thread_counter), 0);
+    
+    call PMManager.release(codeFirstAddrs[t->id], threadCodeSizes[t->id]);
+    codeFirstAddrs[t->id] = 0;
+    threadCodeSizes[t->id] = 0;
+    if (curProc->globals != NULL) {
+      free(curProc->globals);
+    }
+    free(curProc);
+  }
+
+  task void start_prog()
+  {
+    free(tablesMemory);
+    proc = malloc(sizeof(init_block_t));
+    proc->globals = gVarMemory;
+    proc->init_ptr = (void *)((uint16_t)code + prog_desc.main_addr);
+    proc->init_arg = NULL;
+    call ReferenceCounter.init( &(proc->thread_counter) );
+    
+    if (call DynamicThread.create(&handler, run_proc, proc, 200) == SUCCESS) {  
+      codeFirstAddrs[handler] = (uint16_t)code;
+      threadCodeSizes[handler] = prog_desc.code_count;
+      retError = SUCCESS;
+      post loadDoneTask();
+    } else {
+      retError = FAIL;
+      post loadDoneTask();
+      if (proc->globals != NULL) {
+        free(proc->globals);
+      }
+      free(proc);
+    }
+    
+    initProgDesc();
+  }
+
+  // Gets write access to the internal flash
+  void eeprom_w()
+  {
+    FCTL2 = FWKEY + FSSEL1 + FN2;   // selects SMCLK and divides it by 4
+    FCTL3 = FWKEY;   // enables the writing/erasing by clearing the LOCK bit
+    FCTL1 = FWKEY + WRT;   // enables the writing
+  }
+
+  // Gets read-only access to the internal flash
+  void eeprom_r()
+  {
+    FCTL1 = FWKEY;   // Clear WRT bit
+    FCTL3 = FWKEY + LOCK;   // disabling the writing/erasing
+  }
+
+  // Calculates where should the code be placed in the internal flash
+  /*
+  uint16_t eeprom_code_addr()
+  {
+    uint16_t addr;
+    
+    addr = (((prog_desc.code_count - 1) / 512) + 1) * 512;   // Spaces needed for the code
+    addr = 0xFFFF - 512 - addr + 1;   // The 1 is to align the code
+    
+    return addr; 
+  }
+  */
+
+  // Loads program image meta data
+  void loader_metaData()
+  {
+    prog_desc.patch_table_count = prog_desc.alloc_count +
+                                  prog_desc.g_reloc_count +
+                                  prog_desc.l_reloc_count;
+    prog_desc.code_offset = sizeof(prog_desc.main_addr) +
+                            sizeof(prog_desc.alloc_count) +
+                            sizeof(prog_desc.alloc_size) +
+                            sizeof(prog_desc.g_reloc_count) +
+                            sizeof(prog_desc.l_reloc_count) +
+                            sizeof(prog_desc.datasec_count) +
+                            sizeof(prog_desc.code_count) +
+                            (prog_desc.patch_table_count * 4) +
+                            (prog_desc.datasec_count * 6);
+    
+    if (prog_desc.patch_table_count > 0 || prog_desc.datasec_count > 0) {
+      if ((prog_desc.patch_table_count * 4) > (prog_desc.datasec_count * 6)) {
+        tablesMemory = malloc(prog_desc.patch_table_count * 4);
+      } else {
+        tablesMemory = malloc(prog_desc.datasec_count * 6);
+      }
+    } else {
+      tablesMemory = NULL;
+    }
+  }
+
+  // Prepares the patch table before patching addresses in the binary code
+  void loader_patch_table()
+  {
+    uint16_t i, tempUInt16 = 0;
+    
+    // Find out the total space global variables need, and malloc
+    /*
+    for (i = 0; i < (prog_desc.alloc_count * 4); i+=4) {
+      tempUInt16 += *((uint16_t *)&tablesMemory[i]);
+      *((uint16_t *)&tablesMemory[i]) = tempUInt16 - *((uint16_t *)&tablesMemory[i]);
+    }
+    */
+    if (prog_desc.alloc_size > 0) {
+      gVarMemory = malloc(prog_desc.alloc_size);
+      memset(gVarMemory, 0, prog_desc.alloc_size);
+    } else {
+      gVarMemory = NULL;
+    }
+    
+    // Some "real" addresses need offsets added. For example, local relocation table entries need
+    // the starting code address
+    for (i = 0; i < (prog_desc.patch_table_count * 4); i+=4) {
+      if (i < (prog_desc.alloc_count * 4)) {
+        tempUInt16 = (uint16_t)gVarMemory;   // Allocation table needs memory's offset
+      } else if (i < ((prog_desc.alloc_count + prog_desc.g_reloc_count) * 4)) {
+        tempUInt16 = 0;   // Global relocation table doesn't need anything
+      } else {
+        tempUInt16 = (uint16_t)code;   // Local relocation table needs code's offset
+      }
+      *((uint16_t *)&(tablesMemory[i])) = *((uint16_t *)&(tablesMemory[i])) + tempUInt16;   // Writes the real address
+    }
+    
+    // Converts function IDs in global relocation table to real addresses
+    for (i = (prog_desc.alloc_count * 4); i < ((prog_desc.alloc_count + prog_desc.g_reloc_count) * 4); i+=4) {
+      tempUInt16 = *((uint16_t *)&tablesMemory[i]);   // Gets function ID
+      tempUInt16 = (uint16_t)fun[tempUInt16].addr;   // Gets the real address of the function ID
+      *((uint16_t *)&tablesMemory[i]) = tempUInt16;   // Writes the real address
+    }
+  }
+  
+  void loader_addr_1()
+  {
+    uint16_t i, laddr = 0, raddr = 0;
+    
+    // Resets before start
+    nextTask_chain = 0x0;
+    nextAddr = 0;
+    
+    // Gets the next task by searching for the lowest next patching address
+    raddr = 0xFFFF;   // Temp variable to store the minimum patching address so far
+    laddr = 0;   // Temp variable to store the current patching address
+    for (i = 0; i < (prog_desc.patch_table_count * 4); i+=4) {
+      laddr = *((uint16_t *)&tablesMemory[i + 2]);
+      
+      if (((uint16_t)nextTask_chain == 0x0 && laddr != 0xFFFF) || 
+           raddr > laddr) {
+        nextTask_chain = &(tablesMemory[i]);
+        raddr = laddr;
+      }
+    }
+    
+    if (nextTask_chain != 0x0) {
+      // Gets the next patching address in the chain from the flash
+      raddr = *((uint16_t *)&nextTask_chain[2]);
+      call ImageRead.read[readSource](readSourceOffset + prog_desc.code_offset + raddr, 
+                                      &nextAddr, 
+                                      2);
+    } else {
+      // Copies the rest of the binary code
+      call ImageRead.read[readSource](readSourceOffset + prog_desc.code_offset + codePtr, 
+                                      &(code[codePtr]), 
+                                      prog_desc.code_count - codePtr);
+      prog_desc.loading_stage++;
+    }
+  }
+  
+  // Patches the part of binary code that needs "real" addresses
+  void loader_addr_2()
+  {
+    uint16_t laddr;
+    
+    laddr = *((uint16_t *)&nextTask_chain[2]);   // Gets the current patching address
+    
+    // Updates the chain with the next patching address
+    if (nextAddr == 0x0000) {
+      nextAddr = 0xFFFF;   // End of chain, marks it with a big number
+    }
+    *((uint16_t *)&nextTask_chain[2]) = nextAddr;
+    
+    // Patches address in the binary code
+    *((uint16_t *)&code[laddr]) = *((uint16_t *)&nextTask_chain[0]);
+    
+    // Copies the binary code between the last patching address and the current patching address
+    call ImageRead.read[readSource](readSourceOffset + prog_desc.code_offset + codePtr, 
+                                    &(code[codePtr]), 
+                                    laddr - codePtr);
+    codePtr = laddr + 2;   // Notes up to what location in the binary code we have copied
+  }
+  
+  void loader_datasec()
+  {
+    uint16_t i, j;
+    
+    for (i = 0; i < (prog_desc.datasec_count * 6); i+=6) {
+      uint16_t destAddr = *((uint16_t *)&(tablesMemory[i])) + (uint16_t)gVarMemory;   // Writes the real address
+      uint16_t srcAddr = *((uint16_t *)&(tablesMemory[i + 2])) + (uint16_t)code;   // Writes the real address
+      uint16_t size = *((uint16_t *)&(tablesMemory[i + 4]));
+      
+      for (j = 0; j < size; j++) {
+        ((uint8_t *)((void *)(destAddr + j)))[0] = ((uint8_t *)((void *)(srcAddr + j)))[0];
+        //*((uint8_t *)&code[destAddr + j]) = *((uint8_t *)&code[srcAddr + j]);
+      }
+    }
+  }
+  
+  void loadProgram()
+  {
+    error_t error = SUCCESS;
+    switch (prog_desc.loading_stage) {
+      case 0:
+        // Loads meta data to memory array
+        error = call ImageRead.read[readSource](readSourceOffset + 0, 
+                                                &prog_desc, 
+                                                7 * 2);
+        if (error == SUCCESS) {
+          prog_desc.loading_stage++;   // Moves to next loading phase
+        } else {
+          errorHandler();
+        }
+        break;
+      
+      case 1:
+        loader_metaData();   // Gets meta data
+        code = (void *) call PMManager.request(prog_desc.code_count);   // Gets the location of where the code will be copied to
+        
+        if ((uint16_t)code != 0xFFFF) {
+          // Loads patch table to memory array
+          error = call ImageRead.read[readSource](readSourceOffset + 7 * 2, 
+                                                  tablesMemory, 
+                                                  prog_desc.patch_table_count * 4);
+          if (error == SUCCESS) {
+            prog_desc.loading_stage++;   // Moves to next loading phase
+          } else {
+            errorHandler();
+          }
+        } else {
+          errorHandler();
+        }
+        
+        break;
+      
+      case 2:
+        loader_patch_table();
+        
+        eeprom_w();   // Gets write-access to internal flash
+        prog_desc.loading_stage++;   // Moves to next loading phase
+      
+      case 3:
+        loader_addr_1();
+        break;
+      
+      case 4:
+        eeprom_r();   // Locks the internal flash back
+        
+        error = call ImageRead.read[readSource](readSourceOffset + 7 * 2 + prog_desc.patch_table_count * 4, 
+                                                tablesMemory, 
+                                                prog_desc.datasec_count * 6);
+        if (error == SUCCESS) {
+          prog_desc.loading_stage++;   // Moves to next loading phase
+        } else {
+          errorHandler();
+        }
+        
+        break;
+      case 5:
+        loader_datasec();
+        prog_desc.loading_stage++;
+        
+      case 6:
+        post start_prog();
+        break;
+    }
+  }
+  
+  command error_t Init.init()
+  {
+    int i;
+    for (i = 0; i < TOSTHREAD_MAX_NUM_THREADS; i++) {
+      threadCodeSizes[i] = 0;
+      codeFirstAddrs[i] = 0;
+    }
+    initProgDesc();
+    return SUCCESS;
+  }
+  
+  task void taskLoadProgram()
+  {
+    loadProgram();
+  }
+  
+  error_t start_load(uint8_t in_readSource, uint16_t in_readSourceOffset)
+  {
+    if (prog_desc.loading_stage == 0) {
+      uint16_t i;
+      call Leds.set(7);
+      for (i = 0; i < 2000; i++) { }
+      call Leds.set(0);
+      
+      readSource = in_readSource;
+      readSourceOffset = in_readSourceOffset;
+      post taskLoadProgram();   // Start Loading
+      
+      return SUCCESS;
+    }
+    
+    return EBUSY;
+  }
+  
+  command error_t DynamicLoader.loadFromFlash(uint8_t volumeId) { return start_load(volumeId, 0); }
+  
+  command error_t DynamicLoader.loadFromMemory(void *addr) { return start_load(READSOURCE_MEMORY, (uint16_t)addr); }
+  
+  event void ImageRead.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error)
+  {
+    if (error == SUCCESS) {
+      if (buf == &nextAddr) {
+        loader_addr_2();
+      } else {
+        post taskLoadProgram();
+      }
+    } else {
+      errorHandler();
+    }
+  }
+
+#ifndef DISABLE_LOADER_USERBUTTON
+  event void UserButton.fired()
+  {
+     call DynamicLoader.loadFromFlash(VOLUME_MICROEXEIMAGE);
+  }
+#endif
+  
+  event void ImageRead.computeCrcDone[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {}
+  
+  default command error_t ImageRead.read[uint8_t id](storage_addr_t addr, void *buf, storage_len_t len) { return FAIL; }
+  default event void DynamicLoader.loadFromFlashDone(uint8_t volumeId, tosthread_t id, error_t error) {}
+  default event void DynamicLoader.loadFromMemoryDone(void *addr, tosthread_t id, error_t error) {}
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/LoadSourceMapC.nc b/tos/lib/tosthreads/lib/tinyld/LoadSourceMapC.nc
new file mode 100755
index 00000000..c2262176
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/LoadSourceMapC.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration LoadSourceMapC
+{
+  provides interface BlockRead[uint8_t id];
+}
+
+implementation
+{
+  components LoadSourceMapP,
+        #ifdef DISABLE_LOADER_FLASH
+             NullVolumeMapC as VolumeMapC,
+        #else
+             VolumeMapC,
+        #endif
+             MemoryStorageC;
+  
+  BlockRead = LoadSourceMapP;
+  
+  LoadSourceMapP.SubBlockRead -> VolumeMapC;
+  LoadSourceMapP.SubMemoryRead -> MemoryStorageC;
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/LoadSourceMapP.nc b/tos/lib/tosthreads/lib/tinyld/LoadSourceMapP.nc
new file mode 100755
index 00000000..0e730c38
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/LoadSourceMapP.nc
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "DynamicLoader.h"
+
+module LoadSourceMapP
+{
+  provides interface BlockRead[uint8_t id];
+  
+  uses {
+    interface BlockRead as SubBlockRead[uint8_t id];
+    interface BlockRead as SubMemoryRead;
+  }
+}
+
+implementation
+{
+  event void SubMemoryRead.readDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error)
+  {
+    signal BlockRead.readDone[READSOURCE_MEMORY](addr, buf, len, error);
+  }
+  
+  event void SubBlockRead.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error)
+  {
+    signal BlockRead.readDone[id](addr, buf, len, error);
+  }
+                          
+  command error_t BlockRead.read[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len)
+  {
+    error_t error = FAIL;
+    
+    if (id == READSOURCE_MEMORY) {
+      error = call SubMemoryRead.read(addr, buf, len);
+    } else {
+      error = call SubBlockRead.read[id](addr, buf, len);
+    }
+    
+    return error;
+  }
+
+  event void SubMemoryRead.computeCrcDone(storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error)
+  {
+    signal BlockRead.computeCrcDone[READSOURCE_MEMORY](addr, len, crc, error);
+  }
+
+  event void SubBlockRead.computeCrcDone[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error)
+  {
+    signal BlockRead.computeCrcDone[id](addr, len, crc, error);
+  }
+  
+  command error_t BlockRead.computeCrc[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t crc)
+  {
+    error_t error = FAIL;
+    
+    if (id == READSOURCE_MEMORY) {
+      error = call SubMemoryRead.computeCrc(addr, len, crc);
+    } else {
+      error = call SubBlockRead.computeCrc[id](addr, len, crc);
+    }
+    
+    return error;
+  }
+  
+  command storage_len_t BlockRead.getSize[uint8_t id]()
+  {
+    storage_len_t len;
+    
+    if (id == READSOURCE_MEMORY) {
+      len = call SubMemoryRead.getSize();
+    } else {
+      len = call SubBlockRead.getSize[id]();
+    }
+    
+    return len;
+  }
+  
+  default command error_t SubBlockRead.read[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t SubBlockRead.computeCrc[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; }
+  default command storage_len_t SubBlockRead.getSize[uint8_t id]() { return 0; }
+  default event void BlockRead.readDone[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void BlockRead.computeCrcDone[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {}
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/MemoryStorageC.nc b/tos/lib/tosthreads/lib/tinyld/MemoryStorageC.nc
new file mode 100755
index 00000000..aeeabd3f
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/MemoryStorageC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+ 
+configuration MemoryStorageC
+{
+  provides interface BlockRead;
+}
+
+implementation
+{
+  components MemoryStorageP,
+             CrcC;
+  
+  BlockRead = MemoryStorageP;
+  
+  MemoryStorageP.Crc -> CrcC;
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/MemoryStorageP.nc b/tos/lib/tosthreads/lib/tinyld/MemoryStorageP.nc
new file mode 100755
index 00000000..2782cc75
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/MemoryStorageP.nc
@@ -0,0 +1,56 @@
+module MemoryStorageP
+{
+  provides interface BlockRead;
+  uses interface Crc;
+}
+
+implementation
+{
+  storage_addr_t retAddr;
+  void *retBuf;
+  storage_len_t retLen;
+  uint16_t retCrc;
+
+  task void taskReadDone()
+  {
+    signal BlockRead.readDone(retAddr, retBuf, retLen, SUCCESS);
+  }
+
+  command error_t BlockRead.read(storage_addr_t addr, void* buf, storage_len_t len)
+  {
+    storage_len_t i;
+    uint8_t *from = (uint8_t *)((void *)((uint16_t)addr));
+    
+    for (i = 0; i < len; i++) {
+      ((uint8_t *)buf)[i] = from[i];
+    }
+    
+    retAddr = addr;
+    retBuf = buf;
+    retLen = len;
+    post taskReadDone();
+    return SUCCESS;
+  }
+  
+  task void taskCrcDone()
+  {
+    signal BlockRead.computeCrcDone(retAddr, retLen, retCrc, SUCCESS);
+  }
+  
+  command error_t BlockRead.computeCrc(storage_addr_t addr, storage_len_t len, uint16_t crc)
+  {
+    retCrc = call Crc.seededCrc16(crc, (void *)addr, len);
+    retAddr = addr;
+    retLen = len;
+    post taskCrcDone();
+    return SUCCESS;
+  }
+  
+  command storage_len_t BlockRead.getSize()
+  {
+    return 0;   // Not sure what to do
+  }
+  
+  default event void BlockRead.readDone(storage_addr_t addr, void* buf, storage_len_t len, error_t error) {}
+  default event void BlockRead.computeCrcDone(storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {}
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/NullVolumeMapC.nc b/tos/lib/tosthreads/lib/tinyld/NullVolumeMapC.nc
new file mode 100755
index 00000000..0c0084f2
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/NullVolumeMapC.nc
@@ -0,0 +1,18 @@
+
+/**
+ * @author Jeongyeup Paek <jpaek@enl.usc.edu>
+ */
+
+#include "DynamicLoader.h"
+
+module NullVolumeMapC
+{
+  provides interface BlockRead[uint8_t id];
+}
+
+implementation
+{
+  command error_t BlockRead.read[uint8_t id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  command error_t BlockRead.computeCrc[uint8_t id](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; }
+  command storage_len_t BlockRead.getSize[uint8_t id]() { return 0; }
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/PMManager.nc b/tos/lib/tosthreads/lib/tinyld/PMManager.nc
new file mode 100644
index 00000000..ce0ce06f
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/PMManager.nc
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+interface PMManager
+{
+  command uint16_t request(uint16_t size);
+  command void release(uint16_t startingAddr, uint16_t size);
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/PMManagerC.nc b/tos/lib/tosthreads/lib/tinyld/PMManagerC.nc
new file mode 100644
index 00000000..b016dccd
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/PMManagerC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration PMManagerC
+{
+  provides interface PMManager;
+}
+
+implementation
+{
+  components MainC,
+             PMManagerP,
+             LedsC,
+             BitArrayUtilsC;
+  
+  PMManager = PMManagerP;
+  
+  MainC.SoftwareInit -> PMManagerP;
+  PMManagerP.BitArrayUtils -> BitArrayUtilsC;
+  PMManagerP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/PMManagerP.nc b/tos/lib/tosthreads/lib/tinyld/PMManagerP.nc
new file mode 100644
index 00000000..3a36fc74
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/PMManagerP.nc
@@ -0,0 +1,149 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module PMManagerP {
+  provides {
+    interface Init;
+    interface PMManager;
+  }
+  
+  uses {
+    interface BitArrayUtils;
+    interface Leds;
+  }
+}
+
+implementation {
+  uint16_t HOST_ROM_SIZE = 0;   // Set by tos-set-symbol
+  uint16_t SEGMENT_SIZE = 512;   // For telosb, the internal flash segment size is 512 bytes
+  uint16_t FLASH_ROM_START_ADDR = 0x4000;   // For telosb, the program memory starts at 0x4000
+  uint16_t FLASH_ROM_END_ADDR = 0xFDFF;   // Last free byte (the last segment is used for interrupt vector)
+  
+  uint16_t numFreeSegments = 0;
+  uint8_t *segmentBitArray;
+  
+  command error_t Init.init()
+  {
+    uint16_t numBytes;
+    
+    // Adjust FLASH_ROM_START_ADDR to account for the code loaded with PMManager
+    if (HOST_ROM_SIZE == 0) {
+      // Should not be here at all
+      // return FAIL;
+    } else {
+      FLASH_ROM_START_ADDR += (((HOST_ROM_SIZE - 1) / SEGMENT_SIZE) + 1) * SEGMENT_SIZE;
+    }
+    
+    // Calculates the number of available segments
+    numFreeSegments = FLASH_ROM_END_ADDR - FLASH_ROM_START_ADDR + 1;
+    numFreeSegments = ((numFreeSegments - 1) / SEGMENT_SIZE) + 1;
+    
+    // Initializes an bit array to track the status of available segments
+    numBytes = ((numFreeSegments - 1) / 8) + 1;
+    segmentBitArray = malloc(numBytes);
+    call BitArrayUtils.clrArray(segmentBitArray, numBytes);
+    
+    return SUCCESS;
+  }
+  
+  uint16_t bitIndexToAddress(uint16_t bitIndex)
+  {
+    return FLASH_ROM_START_ADDR + (bitIndex * SEGMENT_SIZE);
+  }
+
+  void eraseSegment(void* addr)
+  {
+    FCTL2 = FWKEY + FSSEL1 + FN2;
+    FCTL3 = FWKEY;
+    FCTL1 = FWKEY + ERASE;
+    *((uint16_t *)addr) = 0;
+    FCTL1 = FWKEY;
+    FCTL3 = FWKEY + LOCK;
+  }
+
+  command uint16_t PMManager.request(uint16_t size)
+  {    
+    if (size > 0) {
+      uint8_t numSegments = ((size - 1) / SEGMENT_SIZE) + 1;   // Number of segments needed to cover size
+      int i;
+      
+      for (i = (numFreeSegments - 1); i >= 0; i--) {
+        if (call BitArrayUtils.getBit(segmentBitArray, i) == FALSE) {
+          int j, tempNumSegments = numSegments - 1;
+          
+          for (j = (i - 1); j >= 0 && tempNumSegments > 0; ) {
+            // Checks if there are enough consecutive free segments
+            if (call BitArrayUtils.getBit(segmentBitArray, j) == TRUE) {
+              break;
+            } else {
+              j--;
+              tempNumSegments--;
+            }
+          }
+          j++;
+          if ((i - j + 1) >= numSegments) {
+            // There are enough consecutive free segments (starting segment index (j + 1))
+            int k;
+            for (k = j; k <= i; k++) {
+              eraseSegment((void *)bitIndexToAddress(k));   // Erase segment content
+              call BitArrayUtils.setBit(segmentBitArray, k);   // Mark segment as occupied
+            }
+            
+            return bitIndexToAddress(j);
+          } else {
+            i = j;
+          }
+        }
+      }
+    }
+    
+    return 0xFFFF;
+  }
+  
+  command void PMManager.release(uint16_t startingAddr, uint16_t size)
+  {
+    if ((startingAddr >= FLASH_ROM_START_ADDR && startingAddr <= FLASH_ROM_END_ADDR) &&
+        size > 0) {
+      uint8_t numSegments = ((size - 1) / SEGMENT_SIZE) + 1;   // Number of segments needed to cover size
+      uint8_t startingSegment = (startingAddr - FLASH_ROM_START_ADDR) / SEGMENT_SIZE;
+      int i;
+      
+      for (i = 0; i < numSegments && (i + startingSegment) < numFreeSegments; i++) {
+        call BitArrayUtils.clrBit(segmentBitArray, i + startingSegment);   // Mark the segment as free
+      }
+    }
+  }
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/TosThreadApiC.nc b/tos/lib/tosthreads/lib/tinyld/TosThreadApiC.nc
new file mode 100644
index 00000000..41128dae
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/TosThreadApiC.nc
@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "tosthread.h"
+
+configuration TosThreadApiC {
+}
+implementation {
+  //Here are all the components that implement the Tosthread API calls
+  components CThreadC;
+  #if defined(PRINTF_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components PrintfC;
+  #endif
+  #if defined(TOSTHREAD_QUEUE_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CQueueC;
+  #endif
+  #if defined(TOSTHREAD_LINKED_LIST_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CLinkedListC;
+  #endif
+  #if defined(TOSTHREAD_THREADSYNC_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CThreadSynchronizationC;
+  #endif
+  #if defined(TOSTHREAD_LEDS_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CLedsC;
+  #endif
+  #if defined(TOSTHREAD_AMRADIO_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CAMRadioC;
+  #endif
+  #if defined(TOSTHREAD_AMSERIAL_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CAMSerialC;
+  #endif
+  #if defined(TOSTHREAD_BLOCKSTORAGE_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CBlockStorageC;
+  #endif 
+  #if defined(TOSTHREAD_BLOCKSTORAGE_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CConfigStorageC;
+  #endif 
+  #if defined(TOSTHREAD_LOGSTORAGE_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CLogStorageC;
+  #endif 
+  #if defined(TOSTHREAD_COLLECTION_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+  //  components CCollectionC;
+  #endif 
+  
+  //Telosb sensorboard specific.
+  #if defined(TOSTHREAD_HAMAMATSUS1087_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CHamamatsuS1087ParC;
+  #endif
+  #if defined(TOSTHREAD_HAMAMATSUS10871_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CHamamatsuS10871TsrC;
+  #endif
+  #if defined(TOSTHREAD_SENSIRIONSHT11_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+    components CSensirionSht11C;
+  #endif
+  
+  //Universal sensorboard specific
+  #if defined(TOSTHREAD_SINESENSOR_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+  //  components CSineSensorC;
+  #endif
+  
+  //Basicsb sensorboard specific
+  #if defined(TOSTHREAD_PHOTO_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+  //  components CPhotoC;
+  #endif
+  #if defined(TOSTHREAD_TEMP_H) || defined(TOSTHREAD_DYNAMIC_LOADER)
+  //  components CTempC;
+  #endif
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/UserButton.nc b/tos/lib/tosthreads/lib/tinyld/UserButton.nc
new file mode 100755
index 00000000..8b10c145
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/UserButton.nc
@@ -0,0 +1,4 @@
+interface UserButton
+{
+  event void fired();
+}
diff --git a/tos/lib/tosthreads/lib/tinyld/UserButtonC.nc b/tos/lib/tosthreads/lib/tinyld/UserButtonC.nc
new file mode 100755
index 00000000..cfaddd69
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/UserButtonC.nc
@@ -0,0 +1,59 @@
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Init/start/stop the user button with StdControl and get interrupt events
+ * when the button is released with MSP430Event.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @author Andrew Redfern <aredfern@kingkong.me.berkeley.edu>
+ */
+
+configuration UserButtonC
+{
+  provides interface UserButton;
+}
+
+implementation
+{
+  components MainC, new TimerMilliC(),
+    HplMsp430GeneralIOC, HplMsp430InterruptC,
+    UserButtonP;
+
+  UserButton = UserButtonP;
+
+  MainC.SoftwareInit -> UserButtonP;
+
+  UserButtonP -> HplMsp430GeneralIOC.Port27;
+  UserButtonP -> HplMsp430InterruptC.Port27;
+  UserButtonP.Timer -> TimerMilliC;
+}
+
diff --git a/tos/lib/tosthreads/lib/tinyld/UserButtonP.nc b/tos/lib/tosthreads/lib/tinyld/UserButtonP.nc
new file mode 100755
index 00000000..03f7d936
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/UserButtonP.nc
@@ -0,0 +1,88 @@
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Andew's timer debouce logic used from the CountInput application.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @author Andrew Redfern <aredfern@kingkong.me.berkeley.edu>
+ */
+
+module UserButtonP
+{
+  provides {
+    interface Init;
+    interface UserButton;
+  }
+  uses {
+    interface HplMsp430GeneralIO;
+    interface HplMsp430Interrupt;
+    interface Timer<TMilli>;
+  }
+}
+implementation
+{
+  command error_t Init.init()
+  {
+    atomic {
+      call HplMsp430Interrupt.disable();
+      call HplMsp430GeneralIO.makeInput();
+      call HplMsp430GeneralIO.selectIOFunc();
+      call HplMsp430Interrupt.edge(TRUE);
+      call HplMsp430Interrupt.clear();
+      call HplMsp430Interrupt.enable();
+    }
+    return SUCCESS;
+  }
+
+  event void Timer.fired()
+  {
+    atomic {
+      call HplMsp430Interrupt.clear();
+      call HplMsp430Interrupt.enable();
+    }
+  }
+
+  task void debounce()
+  {
+    call Timer.startOneShot(100);
+    signal UserButton.fired();
+  }
+
+  async event void HplMsp430Interrupt.fired()
+  {
+    atomic {
+      call HplMsp430Interrupt.disable();
+      post debounce();
+    }
+  }
+}
+
diff --git a/tos/lib/tosthreads/lib/tinyld/slcs_types.h b/tos/lib/tosthreads/lib/tinyld/slcs_types.h
new file mode 100755
index 00000000..b451ab2a
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/slcs_types.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#ifndef _SLCS_TYPES_H
+#define _SLCS_TYPES_H
+
+#include "tosthread.h"
+#include "tosthread_leds.h"
+#include "tosthread_amradio.h"
+#include "tosthread_blockstorage.h"
+#include "tosthread_logstorage.h"
+#include "tosthread_configstorage.h"
+#include "tosthread_threadsync.h"
+#include "tosthread_amserial.h"
+#include "tosthread_queue.h"
+
+#include "tosthread_sensirionSht11.h"
+#include "tosthread_hamamatsuS10871.h"
+#include "tosthread_hamamatsuS1087.h"
+
+struct value_addr_pair {
+  uint16_t value;
+  void *addr;
+};
+
+struct addr {
+  void *addr;
+};
+
+struct prog_desc {
+  uint16_t main_addr;   // Loadable program's main function (or tosthread_main() in our case)
+  uint16_t alloc_count;
+  uint16_t alloc_size;
+  uint16_t g_reloc_count;
+  uint16_t l_reloc_count;
+  uint16_t datasec_count;
+  uint16_t code_count;
+  
+  uint16_t patch_table_count;   // alloc_count + g_reloc_count + l_reloc_count;
+  uint16_t code_offset;   // sizeof(main_addr) +
+                          // sizeof(alloc_count) +
+                          // sizeof(alloc_size) +
+                          // sizeof(g_reloc_count) +
+                          // sizeof(l_reloc_count) +
+                          // sizeof(datasec_count) +
+                          // sizeof(code_count) +
+                          // (g_sym_count + patch_table_count) * 4
+  
+  uint16_t loading_stage;
+};
+
+#endif
diff --git a/tos/lib/tosthreads/lib/tinyld/tosthread_slcs_types.h b/tos/lib/tosthreads/lib/tinyld/tosthread_slcs_types.h
new file mode 100755
index 00000000..f17328c3
--- /dev/null
+++ b/tos/lib/tosthreads/lib/tinyld/tosthread_slcs_types.h
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#ifndef _TOSTHREAD_SLCS_TYPES_H
+#define _TOSTHREAD_SLCS_TYPES_H
+
+#include "slcs_types.h"
+
+struct addr fun[] = {
+  
+  {tosthread_sleep}, {tosthread_create},
+    
+  {led0On}, {led1On}, {led2On},
+  {led0Off}, {led1Off}, {led2Off},
+  {led0Toggle}, {led1Toggle}, {led2Toggle},
+  
+  {amSerialStart}, {amSerialStop}, {amSerialReceive},
+  {amSerialSend}, {amSerialLocalAddress}, {amSerialGetLocalGroup},
+  {amSerialGetDestination}, {amSerialGetSource}, {amSerialSetDestination},
+  {amSerialSetSource}, {amSerialIsForMe}, {amSerialGetType},
+  {amSerialSetType}, {amSerialGetGroup}, {amSerialSetGroup},
+  {serialClear}, {serialGetPayloadLength}, {serialSetPayloadLength},
+  {serialMaxPayloadLength}, {serialGetPayload}, {serialRequestAck},
+  {serialNoAck}, {serialWasAcked},
+  
+  {amRadioStart}, {amRadioStop}, {amRadioReceive},
+  {amRadioSend}, {amRadioGetLocalAddress}, {amRadioGetLocalGroup},
+  {amRadioGetDestination}, {amRadioGetSource}, {amRadioSetDestination},
+  {amRadioSetSource}, {amRadioIsForMe}, {amRadioGetType},
+  {amRadioSetType}, {amRadioGetGroup}, {amRadioSetGroup},
+  {radioClear}, {radioGetPayloadLength}, {radioSetPayloadLength},
+  {radioMaxPayloadLength}, {radioGetPayload}, {radioRequestAck},
+  {radioNoAck}, {radioWasAcked},
+    
+  {semaphore_reset}, {semaphore_acquire}, {semaphore_release},
+
+  {barrier_reset}, {barrier_block}, {barrier_isBlocking},
+
+  {condvar_init}, {condvar_wait}, {condvar_signalNext},
+  {condvar_signalAll}, {condvar_isBlocking},
+
+  {mutex_init}, {mutex_lock}, {mutex_unlock},
+
+  {volumeBlockRead}, {volumeBlockWrite}, {volumeBlockCrc},
+  {volumeBlockErase}, {volumeBlockSync},
+
+  {refcounter_init}, {refcounter_increment}, {refcounter_decrement},
+  {refcounter_waitOnValue}, {refcounter_count},
+  
+  {amRadioSnoop},
+
+  {queue_init}, {queue_clear}, {queue_enqueue},
+  {queue_dequeue}, {queue_remove}, {queue_size},
+  {queue_is_empty},
+
+  {sensirionSht11_humidity_read}, {sensirionSht11_humidity_getNumBits}, {sensirionSht11_temperature_read},
+  {sensirionSht11_temperature_getNumBits},
+  
+  {hamamatsuS10871_tsr_read}, {hamamatsuS10871_tsr_readStream}, {hamamatsuS10871_tsr_getNumBits},
+  
+  {hamamatsuS1087_par_read}, {hamamatsuS1087_par_readStream}, {hamamatsuS1087_par_getNumBits},
+  
+  {volumeLogRead}, {volumeLogCurrentReadOffset}, {volumeLogSeek},
+  {volumeLogGetSize},
+  
+  {volumeLogAppend}, {volumeLogCurrentWriteOffset}, {volumeLogErase},
+  {volumeLogSync},
+  
+  {getLeds}, {setLeds},
+
+  {div},
+  
+  {tosthread_join},
+  
+  {volumeConfigMount}, {volumeConfigRead}, {volumeConfigWrite},
+  {volumeConfigCommit}, {volumeConfigGetSize}, {volumeConfigValid}
+};
+
+#endif
diff --git a/tos/lib/tosthreads/platforms/epic/ActiveMessageC.nc b/tos/lib/tosthreads/platforms/epic/ActiveMessageC.nc
new file mode 100644
index 00000000..6317d96f
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/epic/ActiveMessageC.nc
@@ -0,0 +1,93 @@
+// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the Telos platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:52 $
+ */
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  ReceiveDefault = AM.ReceiveDefault;
+  Snoop        = AM.Snoop;
+  SnoopDefault = AM.SnoopDefault;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
diff --git a/tos/lib/tosthreads/platforms/epic/TelosSerialP.nc b/tos/lib/tosthreads/platforms/epic/TelosSerialP.nc
new file mode 100644
index 00000000..fcfc91d3
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/epic/TelosSerialP.nc
@@ -0,0 +1,23 @@
+module TelosSerialP {
+  provides interface StdControl;
+  provides interface Msp430UartConfigure;
+  uses interface Resource;
+}
+implementation {
+  
+  msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_57600, umctl: UMCTL_1MHZ_57600, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} };
+
+  command error_t StdControl.start(){
+    return call Resource.immediateRequest();
+  }
+  command error_t StdControl.stop(){
+    call Resource.release();
+    return SUCCESS;
+  }
+  event void Resource.granted(){}
+
+  async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() {
+    return &msp430_uart_telos_config;
+  }
+  
+}
diff --git a/tos/lib/tosthreads/platforms/eyesIFX/ActiveMessageC.nc b/tos/lib/tosthreads/platforms/eyesIFX/ActiveMessageC.nc
new file mode 100644
index 00000000..b0cf15a2
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/eyesIFX/ActiveMessageC.nc
@@ -0,0 +1,104 @@
+// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/*                                                                      
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:             Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the eyesIFX platforms. This is a naming wrapper
+ * around the TDA5250 Active Message layer.
+ *
+ * @author Philip Levis
+ * @author Vlado Handziski (TDA5250 modifications)
+ * @date July 20 2005
+ */
+
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+
+    interface PacketAcknowledgements;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+  }
+}
+implementation {
+  components ActiveMessageFilterC as Filter;
+  components Tda5250ActiveMessageC as AM;
+  components PacketStampC as PacketStamp;
+
+  AMSend         = Filter;
+  Receive        = Filter.Receive;
+  ReceiveDefault = Filter.ReceiveDefault;
+  Snoop          = Filter.Snoop;
+  SnoopDefault   = Filter.SnoopDefault;
+
+  Filter.SubAMSend  -> AM;
+  Filter.SubReceive -> AM.Receive;
+  Filter.SubSnoop   -> AM.Snoop;
+  //Filter.AMPacket  -> AM;
+
+  SplitControl = AM;
+  Packet       = AM;
+  AMPacket     = AM;
+
+  PacketAcknowledgements = AM;
+
+  PacketTimeStamp32khz = PacketStamp;
+  PacketTimeStampMilli = PacketStamp;
+}
diff --git a/tos/lib/tosthreads/platforms/eyesIFX/ActiveMessageFilterC.nc b/tos/lib/tosthreads/platforms/eyesIFX/ActiveMessageFilterC.nc
new file mode 100644
index 00000000..33b7a638
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/eyesIFX/ActiveMessageFilterC.nc
@@ -0,0 +1,84 @@
+/* 
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-07-24 20:07:21 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /* This component is the default AM filter component: it does not do anything,
+  * it uses no RAM and nesC will compile all code away. Its purpose is to allow
+  * other components to shadow (overwrite) it to implement their own
+  * filter/statistic component.
+  */
+
+#include "AM.h"
+module ActiveMessageFilterC {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+  }
+  uses {
+    interface AMSend as SubAMSend[am_id_t id];
+    interface Receive as SubReceive[am_id_t id];
+    interface Receive as SubSnoop[am_id_t id];
+  }
+} implementation {
+
+  command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len){ return call SubAMSend.send[id](addr, msg, len);}
+  command error_t AMSend.cancel[am_id_t id](message_t* msg){ return call SubAMSend.cancel[id](msg);}
+  command uint8_t AMSend.maxPayloadLength[am_id_t id](){ return call SubAMSend.maxPayloadLength[id]();}
+  command void* AMSend.getPayload[am_id_t id](message_t* msg, uint8_t len){ return call SubAMSend.getPayload[id](msg, len);}
+  event void SubAMSend.sendDone[am_id_t id](message_t* msg, error_t error) { signal AMSend.sendDone[id](msg, error); }
+  default event void AMSend.sendDone[am_id_t id](message_t* msg, error_t error) { return; }
+
+  event message_t* SubReceive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal Receive.receive[id](msg, payload, len); }  
+  
+  event message_t* SubSnoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal Snoop.receive[id](msg, payload, len); }
+
+  default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return signal ReceiveDefault.receive[id](msg, payload, len);
+  }
+
+  default event message_t* ReceiveDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+  
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return signal SnoopDefault.receive[id](msg, payload, len);
+  }
+
+  default event message_t* SnoopDefault.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) {
+    return msg;
+  }
+}
diff --git a/tos/lib/tosthreads/platforms/iris/ActiveMessageC.nc b/tos/lib/tosthreads/platforms/iris/ActiveMessageC.nc
new file mode 100644
index 00000000..4677a5da
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/iris/ActiveMessageC.nc
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+/*
+ * Make active message TOSThreads-compatible by exposing default interfaces
+ *
+ * Author: Chieh-Jan Mike Liang
+ */
+
+#include <RadioConfig.h>
+
+configuration ActiveMessageC
+{
+	provides
+	{
+		interface SplitControl;
+
+		interface AMSend[uint8_t id];
+		interface Receive[uint8_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+		interface Receive as Snoop[uint8_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+		interface SendNotifier[am_id_t id];
+
+		interface Packet;
+		interface AMPacket;
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+#ifdef PACKET_LINK
+		interface PacketLink;
+#endif
+
+		interface PacketTimeStamp<TMicro, uint32_t> as PacketTimeStampMicro;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	components RF230ActiveMessageC as MessageC;
+
+	SplitControl = MessageC;
+
+	AMSend = MessageC;
+	Receive = MessageC.Receive;
+  ReceiveDefault = MessageC.ReceiveDefault;
+  Snoop        = MessageC.Snoop;
+  SnoopDefault = MessageC.SnoopDefault;
+	SendNotifier = MessageC;
+
+	Packet = MessageC;
+	AMPacket = MessageC;
+
+	PacketAcknowledgements = MessageC;
+	LowPowerListening = MessageC;
+#ifdef PACKET_LINK
+	PacketLink = MessageC;
+#endif
+
+	PacketTimeStampMilli = MessageC;
+	PacketTimeStampMicro = MessageC;
+}
diff --git a/tos/lib/tosthreads/platforms/mica2/ActiveMessageC.nc b/tos/lib/tosthreads/platforms/mica2/ActiveMessageC.nc
new file mode 100644
index 00000000..7e83003d
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/mica2/ActiveMessageC.nc
@@ -0,0 +1,85 @@
+// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+ *
+ */
+
+/**
+ * The Active Message layer on the mica2 platform. This is a naming wrapper
+ * around the CC1000 Active Message layer.
+ *
+ * @author Philip Levis
+ * @date June 19 2005
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components CC1000ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  ReceiveDefault = AM.ReceiveDefault;
+  Snoop        = AM.Snoop;
+  SnoopDefault = AM.SnoopDefault;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+}
diff --git a/tos/lib/tosthreads/platforms/mica2/chips/cc1000/HplCC1000InitP.nc b/tos/lib/tosthreads/platforms/mica2/chips/cc1000/HplCC1000InitP.nc
new file mode 100644
index 00000000..d864236f
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/mica2/chips/cc1000/HplCC1000InitP.nc
@@ -0,0 +1,68 @@
+// $Id: HplCC1000InitP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+/*									tab:4
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Hardware initialisation for the CC1000 radio. This component is always
+ * included even if the radio is not used.
+ *
+ * @author David Gay
+ */
+configuration HplCC1000InitP {
+  provides interface Init as PlatformInit;
+}
+implementation {
+  components HplCC1000P, HplCC1000SpiP, HplAtm128GeneralIOC as IO;
+
+  PlatformInit = HplCC1000P;
+  PlatformInit = HplCC1000SpiP;
+
+  HplCC1000P.CHP_OUT -> IO.PortA6;
+  HplCC1000P.PALE -> IO.PortD4;
+  HplCC1000P.PCLK -> IO.PortD6;
+  HplCC1000P.PDATA -> IO.PortD7;
+
+  HplCC1000SpiP.SpiSck -> IO.PortB1;
+  HplCC1000SpiP.SpiMiso -> IO.PortB3;
+  HplCC1000SpiP.SpiMosi -> IO.PortB2;
+  HplCC1000SpiP.OC1C -> IO.PortB7;
+  
+  components PlatformInterruptC;
+  HplCC1000SpiP.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/platforms/mica2/chips/cc1000/HplCC1000SpiP.nc b/tos/lib/tosthreads/platforms/mica2/chips/cc1000/HplCC1000SpiP.nc
new file mode 100644
index 00000000..3d730266
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/mica2/chips/cc1000/HplCC1000SpiP.nc
@@ -0,0 +1,127 @@
+// $Id: HplCC1000SpiP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low-level functions to access the CC1000 bus. Built using the mica2
+ * hardware SPI.
+ *
+ * @author Jaein Jeong
+ * @author Philip buonadonna
+ */
+
+
+module HplCC1000SpiP {
+  provides interface Init as PlatformInit;
+  provides interface HplCC1000Spi;
+  //uses interface PowerManagement;
+  uses {
+    interface GeneralIO as SpiSck;
+    interface GeneralIO as SpiMiso;
+    interface GeneralIO as SpiMosi;
+    interface GeneralIO as OC1C;
+    interface PlatformInterrupt;
+  }
+}
+implementation
+{
+  uint8_t outgoingByte;
+
+  command error_t PlatformInit.init() {
+    call SpiSck.makeInput();
+    call OC1C.makeInput();
+    call HplCC1000Spi.rxMode();
+    return SUCCESS;
+  }
+
+  AVR_ATOMIC_HANDLER(SIG_SPI) {
+    register uint8_t temp = SPDR;
+    SPDR = outgoingByte;
+    signal HplCC1000Spi.dataReady(temp);
+    call PlatformInterrupt.postAmble();
+  }
+  default async event void HplCC1000Spi.dataReady(uint8_t data) { }
+  
+
+  async command void HplCC1000Spi.writeByte(uint8_t data) {
+    atomic outgoingByte = data;
+  }
+
+  async command bool HplCC1000Spi.isBufBusy() {
+    return bit_is_clear(SPSR, SPIF);
+  }
+
+  async command uint8_t HplCC1000Spi.readByte() {
+    return SPDR;
+  }
+
+  async command void HplCC1000Spi.enableIntr() {
+    //sbi(SPCR,SPIE);
+    SPCR = 0xc0;
+    CLR_BIT(DDRB, 0);
+    //call PowerManagement.adjustPower();
+  }
+
+  async command void HplCC1000Spi.disableIntr() {
+    CLR_BIT(SPCR, SPIE);
+    SET_BIT(DDRB, 0);
+    CLR_BIT(PORTB, 0);
+    //call PowerManagement.adjustPower();
+  }
+
+  async command void HplCC1000Spi.initSlave() {
+    atomic {
+      CLR_BIT(SPCR, CPOL);		// Set proper polarity...
+      CLR_BIT(SPCR, CPHA);		// ...and phase
+      SET_BIT(SPCR, SPIE);	// enable spi port
+      SET_BIT(SPCR, SPE);
+    } 
+  }
+	
+  async command void HplCC1000Spi.txMode() {
+    call SpiMiso.makeOutput();
+    call SpiMosi.makeOutput();
+  }
+
+  async command void HplCC1000Spi.rxMode() {
+    call SpiMiso.makeInput();
+    call SpiMosi.makeInput();
+  }
+}
diff --git a/tos/lib/tosthreads/platforms/mica2dot/chips/cc1000/HplCC1000InitP.nc b/tos/lib/tosthreads/platforms/mica2dot/chips/cc1000/HplCC1000InitP.nc
new file mode 100644
index 00000000..472263e5
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/mica2dot/chips/cc1000/HplCC1000InitP.nc
@@ -0,0 +1,68 @@
+// $Id: HplCC1000InitP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Hardware initialisation for the CC1000 radio. This component is always
+ * included even if the radio is not used.
+ *
+ * @author David Gay
+ */
+configuration HplCC1000InitP {
+  provides interface Init as PlatformInit;
+}
+implementation {
+  components HplCC1000P, HplCC1000SpiP, HplAtm128GeneralIOC as IO;
+
+  PlatformInit = HplCC1000P;
+  PlatformInit = HplCC1000SpiP;
+
+  HplCC1000P.CHP_OUT -> IO.PortE7;
+  HplCC1000P.PALE -> IO.PortD5;
+  HplCC1000P.PCLK -> IO.PortD6;
+  HplCC1000P.PDATA -> IO.PortD7;
+
+  HplCC1000SpiP.SpiSck -> IO.PortB1;
+  HplCC1000SpiP.SpiMiso -> IO.PortB3;
+  HplCC1000SpiP.SpiMosi -> IO.PortB2;
+  HplCC1000SpiP.OC1C -> IO.PortB7;
+
+  components PlatformInterruptC;
+  HplCC1000SpiP.PlatformInterrupt -> PlatformInterruptC;
+}
diff --git a/tos/lib/tosthreads/platforms/micaz/ActiveMessageC.nc b/tos/lib/tosthreads/platforms/micaz/ActiveMessageC.nc
new file mode 100644
index 00000000..a4002419
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/micaz/ActiveMessageC.nc
@@ -0,0 +1,93 @@
+// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the micaZ platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Philip Levis
+ * @date June 19 2005
+ */
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+  
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  ReceiveDefault = AM.ReceiveDefault;
+  Snoop        = AM.Snoop;
+  SnoopDefault = AM.SnoopDefault;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
diff --git a/tos/lib/tosthreads/platforms/mulle/ActiveMessageC.nc b/tos/lib/tosthreads/platforms/mulle/ActiveMessageC.nc
new file mode 100644
index 00000000..9f3569e8
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/mulle/ActiveMessageC.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+/*
+ * Make active message TOSThreads-compatible by exposing default interfaces
+ *
+ * Author: Chieh-Jan Mike Liang
+ */
+
+#include <RadioConfig.h>
+
+configuration ActiveMessageC
+{
+	provides
+	{
+		interface SplitControl;
+
+		interface AMSend[uint8_t id];
+		interface Receive[uint8_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+		interface Receive as Snoop[uint8_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+		interface SendNotifier[am_id_t id];
+
+		interface Packet;
+		interface AMPacket;
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+#ifdef PACKET_LINK
+		interface PacketLink;
+#endif
+
+		interface PacketTimeStamp<TMicro, uint32_t> as PacketTimeStampMicro;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	components RF230ActiveMessageC as MessageC,
+		RF230SplitControlP,
+		new SystemClockControlC();
+
+	RF230SplitControlP.SplitControlOrig -> MessageC;
+	RF230SplitControlP.SystemClockControl -> SystemClockControlC;
+
+	SplitControl = RF230SplitControlP.SplitControl;
+
+	AMSend = MessageC;
+	Receive = MessageC.Receive;
+  ReceiveDefault = MessageC.ReceiveDefault;
+  Snoop        = MessageC.Snoop;
+  SnoopDefault = MessageC.SnoopDefault;
+	SendNotifier = MessageC;
+
+	Packet = MessageC;
+	AMPacket = MessageC;
+
+	PacketAcknowledgements = MessageC;
+	LowPowerListening = MessageC;
+#ifdef PACKET_LINK
+	PacketLink = MessageC;
+#endif
+
+	PacketTimeStampMilli = MessageC;
+	PacketTimeStampMicro = MessageC;
+}
diff --git a/tos/lib/tosthreads/platforms/shimmer/ActiveMessageC.nc b/tos/lib/tosthreads/platforms/shimmer/ActiveMessageC.nc
new file mode 100644
index 00000000..6317d96f
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/shimmer/ActiveMessageC.nc
@@ -0,0 +1,93 @@
+// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the Telos platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:52 $
+ */
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  ReceiveDefault = AM.ReceiveDefault;
+  Snoop        = AM.Snoop;
+  SnoopDefault = AM.SnoopDefault;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
diff --git a/tos/lib/tosthreads/platforms/telosa/ActiveMessageC.nc b/tos/lib/tosthreads/platforms/telosa/ActiveMessageC.nc
new file mode 100644
index 00000000..6317d96f
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/telosa/ActiveMessageC.nc
@@ -0,0 +1,93 @@
+// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the Telos platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:52 $
+ */
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  ReceiveDefault = AM.ReceiveDefault;
+  Snoop        = AM.Snoop;
+  SnoopDefault = AM.SnoopDefault;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
diff --git a/tos/lib/tosthreads/platforms/telosa/TelosSerialP.nc b/tos/lib/tosthreads/platforms/telosa/TelosSerialP.nc
new file mode 100644
index 00000000..fcfc91d3
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/telosa/TelosSerialP.nc
@@ -0,0 +1,23 @@
+module TelosSerialP {
+  provides interface StdControl;
+  provides interface Msp430UartConfigure;
+  uses interface Resource;
+}
+implementation {
+  
+  msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_57600, umctl: UMCTL_1MHZ_57600, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} };
+
+  command error_t StdControl.start(){
+    return call Resource.immediateRequest();
+  }
+  command error_t StdControl.stop(){
+    call Resource.release();
+    return SUCCESS;
+  }
+  event void Resource.granted(){}
+
+  async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() {
+    return &msp430_uart_telos_config;
+  }
+  
+}
diff --git a/tos/lib/tosthreads/platforms/tinynode/ActiveMessageC.nc b/tos/lib/tosthreads/platforms/tinynode/ActiveMessageC.nc
new file mode 100644
index 00000000..4d11bc34
--- /dev/null
+++ b/tos/lib/tosthreads/platforms/tinynode/ActiveMessageC.nc
@@ -0,0 +1,85 @@
+// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the TinyNode platform. This is a naming wrapper
+ * around the XE1205 Active Message layer.
+ *
+ * @author Philip Levis, Henri Dubois-Ferriere
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl @atleastonce();
+
+    interface AMSend[uint8_t id];
+    interface Receive[am_id_t id];
+    interface Receive as ReceiveDefault[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Receive as SnoopDefault[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components XE1205ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  ReceiveDefault = AM.ReceiveDefault;
+  Snoop        = AM.Snoop;
+  SnoopDefault = AM.SnoopDefault;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+}
diff --git a/tos/lib/tosthreads/sensorboards/basicsb/BlockingPhotoC.nc b/tos/lib/tosthreads/sensorboards/basicsb/BlockingPhotoC.nc
new file mode 100644
index 00000000..822fda88
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/basicsb/BlockingPhotoC.nc
@@ -0,0 +1,26 @@
+/* $Id: BlockingPhotoC.nc,v 1.1 2008-06-14 19:27:25 klueska Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Photodiode of the basicsb sensor board.
+ * 
+ * @author David Gay
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+generic configuration BlockingPhotoC() {
+  provides interface BlockingRead<uint16_t>;
+}
+implementation {
+  components new BlockingAdcReadClientC(), PhotoDeviceP;
+
+  BlockingRead = BlockingAdcReadClientC;
+  BlockingAdcReadClientC.Atm128AdcConfig -> PhotoDeviceP;
+  BlockingAdcReadClientC.ResourceConfigure -> PhotoDeviceP;
+}
diff --git a/tos/lib/tosthreads/sensorboards/basicsb/BlockingPhotoStreamC.nc b/tos/lib/tosthreads/sensorboards/basicsb/BlockingPhotoStreamC.nc
new file mode 100644
index 00000000..b9fa71b8
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/basicsb/BlockingPhotoStreamC.nc
@@ -0,0 +1,26 @@
+/* $Id: BlockingPhotoStreamC.nc,v 1.1 2008-06-14 19:27:25 klueska Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Photodiode of the basicsb sensor board.
+ * 
+ * @author David Gay
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+generic configuration BlockingPhotoStreamC() {
+  provides interface BlockingReadStream<uint16_t>;
+}
+implementation {
+  components PhotoDeviceP, new BlockingAdcReadStreamClientC();
+
+  BlockingReadStream = BlockingAdcReadStreamClientC;
+  BlockingAdcReadStreamClientC.Atm128AdcConfig -> PhotoDeviceP;
+  BlockingAdcReadStreamClientC.ResourceConfigure -> PhotoDeviceP;
+}
diff --git a/tos/lib/tosthreads/sensorboards/basicsb/BlockingTempC.nc b/tos/lib/tosthreads/sensorboards/basicsb/BlockingTempC.nc
new file mode 100644
index 00000000..2569b6e7
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/basicsb/BlockingTempC.nc
@@ -0,0 +1,25 @@
+/* $Id: BlockingTempC.nc,v 1.1 2008-06-14 19:27:25 klueska Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Thermistor of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+generic configuration BlockingTempC() {
+  provides interface BlockingRead<uint16_t>;
+}
+implementation {
+  components new BlockingAdcReadClientC(), TempDeviceP;
+
+  BlockingRead = BlockingAdcReadClientC;
+  BlockingAdcReadClientC.Atm128AdcConfig -> TempDeviceP;
+  BlockingAdcReadClientC.ResourceConfigure -> TempDeviceP;
+}
diff --git a/tos/lib/tosthreads/sensorboards/basicsb/BlockingTempStreamC.nc b/tos/lib/tosthreads/sensorboards/basicsb/BlockingTempStreamC.nc
new file mode 100644
index 00000000..7f609f91
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/basicsb/BlockingTempStreamC.nc
@@ -0,0 +1,26 @@
+/* $Id: BlockingTempStreamC.nc,v 1.1 2008-06-14 19:27:25 klueska Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Thermistor of the basicsb sensor board.
+ * 
+ * @author David Gay
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+generic configuration TempStreamC() {
+  provides interface BlockingReadStream<uint16_t>;
+}
+implementation {
+  components TempDeviceP, new BlockingAdcReadStreamClientC();
+
+  BlockingReadStream = BlockingAdcReadStreamClientC;
+  BlockingAdcReadStreamClientC.Atm128AdcConfig -> TempDeviceP;
+  BlockingAdcReadStreamClientC.ResourceConfigure -> TempDeviceP;
+}
diff --git a/tos/lib/tosthreads/sensorboards/basicsb/CPhotoC.nc b/tos/lib/tosthreads/sensorboards/basicsb/CPhotoC.nc
new file mode 100644
index 00000000..66316636
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/basicsb/CPhotoC.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration CPhotoC {}
+implementation {
+  components CPhotoP;
+  components new BlockingPhotoC();       
+  CPhotoP.BlockingRead -> BlockingPhotoC;
+  CPhotoP.BlockingReadStream -> BlockingPhotoC;
+}
diff --git a/tos/lib/tosthreads/sensorboards/basicsb/CPhotoP.nc b/tos/lib/tosthreads/sensorboards/basicsb/CPhotoP.nc
new file mode 100644
index 00000000..f1baf8e7
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/basicsb/CPhotoP.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module CPhotoP {
+  uses {
+    interface BlockingRead<uint16_t>;
+    interface BlockingReadStream<uint16_t>;
+  }
+}
+implementation {
+  error_t photo_read(uint16_t* val) @C() AT_SPONTANEOUS {
+    return call BlockingRead.read(val);
+  }
+  error_t photo_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count) @C() AT_SPONTANEOUS {
+    return call BlockingReadStream.read(usPeriod, buf, count);
+  }
+}
diff --git a/tos/lib/tosthreads/sensorboards/basicsb/CTempC.nc b/tos/lib/tosthreads/sensorboards/basicsb/CTempC.nc
new file mode 100644
index 00000000..8079e7de
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/basicsb/CTempC.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration CTempC {}
+implementation {
+  components CTempP;
+  components new BlockingTempC();       
+  CTempP.BlockingRead -> BlockingTempC;
+  CTempP.BlockingReadStream -> BlockingTempC;
+}
diff --git a/tos/lib/tosthreads/sensorboards/basicsb/CTempP.nc b/tos/lib/tosthreads/sensorboards/basicsb/CTempP.nc
new file mode 100644
index 00000000..a9efc9c2
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/basicsb/CTempP.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module CTempP {
+  uses {
+    interface BlockingRead<uint16_t>;
+    interface BlockingReadStream<uint16_t>;
+  }
+}
+implementation {
+  error_t temp_read(uint16_t* val) @C() AT_SPONTANEOUS {
+    return call BlockingRead.read(val);
+  }
+  error_t temp_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count) @C() AT_SPONTANEOUS {
+    return call BlockingReadStream.read(usPeriod, buf, count);
+  }
+}
diff --git a/tos/lib/tosthreads/sensorboards/basicsb/basicsb_sensors.h b/tos/lib/tosthreads/sensorboards/basicsb/basicsb_sensors.h
new file mode 100644
index 00000000..ec3b13a7
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/basicsb/basicsb_sensors.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+  
+#ifndef BASICSB_SENSORS_H
+#define BASICSB_SENSORS_H
+
+#include "tosthread_photo.h"
+#include "tosthread_temp.h"
+
+#endif //BASICSB_SENSORS_H
diff --git a/tos/lib/tosthreads/sensorboards/basicsb/tosthread_photo.h b/tos/lib/tosthreads/sensorboards/basicsb/tosthread_photo.h
new file mode 100644
index 00000000..f3508b51
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/basicsb/tosthread_photo.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_PHOTO_H
+#define TOSTHREAD_PHOTO_H
+
+#include "TinyError.h"
+
+extern error_t photo_read(uint16_t* val);
+extern error_t photo_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count);
+
+#endif //TOSTHREAD_PHOTO_H
diff --git a/tos/lib/tosthreads/sensorboards/basicsb/tosthread_temp.h b/tos/lib/tosthreads/sensorboards/basicsb/tosthread_temp.h
new file mode 100644
index 00000000..adba25a8
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/basicsb/tosthread_temp.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_TEMP_H
+#define TOSTHREAD_TEMP_H
+
+#include "TinyError.h"
+
+extern error_t temp_read(uint16_t* val);
+extern error_t temp_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count);
+
+#endif //TOSTHREAD_TEMP_H
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingHamamatsuS10871TsrC.nc b/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingHamamatsuS10871TsrC.nc
new file mode 100644
index 00000000..123fdeb3
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingHamamatsuS10871TsrC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+generic configuration BlockingHamamatsuS10871TsrC() {
+  provides interface DeviceMetadata;
+  provides interface BlockingRead<uint16_t> as Read;
+  provides interface BlockingReadStream<uint16_t> as ReadStream;
+}
+implementation {
+  components new BlockingAdcReadClientC() as AdcReadClientC;
+  Read = AdcReadClientC;
+
+  components new BlockingAdcReadStreamClientC() as AdcReadStreamClientC;
+  ReadStream = AdcReadStreamClientC;
+
+  components HamamatsuS10871TsrP;
+  DeviceMetadata = HamamatsuS10871TsrP;
+  AdcReadClientC.AdcConfigure -> HamamatsuS10871TsrP;
+  AdcReadStreamClientC.AdcConfigure -> HamamatsuS10871TsrP;
+}
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingHamamatsuS1087ParC.nc b/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingHamamatsuS1087ParC.nc
new file mode 100644
index 00000000..40b647c3
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingHamamatsuS1087ParC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+generic configuration BlockingHamamatsuS1087ParC() {
+  provides interface DeviceMetadata;
+  provides interface BlockingRead<uint16_t> as Read;
+  provides interface BlockingReadStream<uint16_t> as ReadStream;
+}
+implementation {
+  components new BlockingAdcReadClientC() as AdcReadClientC;
+  Read = AdcReadClientC;
+
+  components new BlockingAdcReadStreamClientC() as AdcReadStreamClientC;
+  ReadStream = AdcReadStreamClientC;
+
+  components HamamatsuS1087ParP;
+  DeviceMetadata = HamamatsuS1087ParP;
+  AdcReadClientC.AdcConfigure -> HamamatsuS1087ParP;
+  AdcReadStreamClientC.AdcConfigure -> HamamatsuS1087ParP;
+}
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingSensirionSht11C.nc b/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingSensirionSht11C.nc
new file mode 100644
index 00000000..fc49810c
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingSensirionSht11C.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+generic configuration BlockingSensirionSht11C() {
+  provides interface BlockingRead<uint16_t> as Temperature;
+  provides interface DeviceMetadata as TemperatureMetadata;
+  provides interface BlockingRead<uint16_t> as Humidity;
+  provides interface DeviceMetadata as HumidityMetadata;
+}
+implementation {
+  components new BlockingSensirionSht11ReaderP() as SensirionSht11ReaderP;
+
+  Temperature = SensirionSht11ReaderP.Temperature;
+  TemperatureMetadata = SensirionSht11ReaderP.TemperatureMetadata;
+  Humidity = SensirionSht11ReaderP.Humidity;
+  HumidityMetadata = SensirionSht11ReaderP.HumidityMetadata;
+
+  components HalSensirionSht11C;
+
+  enum { TEMP_KEY = unique("Sht11.Resource") };
+  enum { HUM_KEY = unique("Sht11.Resource") };
+
+  SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ];
+  SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
+  SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ];
+  SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ];
+}
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingSensirionSht11ReaderImplP.nc b/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingSensirionSht11ReaderImplP.nc
new file mode 100644
index 00000000..05be0013
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingSensirionSht11ReaderImplP.nc
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include <SensirionSht11.h>
+
+generic module BlockingSensirionSht11ReaderImplP() {
+  provides {
+    interface BlockingRead<uint16_t> as BlockingTemperature;
+    interface BlockingRead<uint16_t> as BlockingHumidity;
+  }
+  uses {
+    interface Read<uint16_t> as Temperature;
+    interface Read<uint16_t> as Humidity;
+    
+    interface SystemCall;
+  }
+}
+implementation {
+  typedef struct params {
+    uint16_t* val;
+    error_t   error;
+  } params_t;
+
+  syscall_t* temp_call = NULL;
+  syscall_t* hum_call = NULL;
+  
+  void tempTask(syscall_t* s) {
+    params_t* p = s->params;
+    p->error = call Temperature.read();
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }  
+  }
+  
+  void humTask(syscall_t* s) {
+    params_t* p = s->params;
+    p->error = call Humidity.read();
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }  
+  }
+  
+  error_t blockingRead(syscall_t** s_call, uint16_t* val, void* task_ptr) {
+    syscall_t s;
+    params_t p;
+    atomic {
+      if(*s_call != NULL)
+        return EBUSY;
+      *s_call = &s;
+    }
+    
+    p.val = val;
+    call SystemCall.start(task_ptr, &s, INVALID_ID, &p);
+    
+    atomic {
+      *s_call = NULL;
+      return p.error;
+    }    
+  }
+
+  command error_t BlockingTemperature.read(uint16_t* val) {
+    return blockingRead(&temp_call, val, tempTask);
+  }
+  
+  command error_t BlockingHumidity.read(uint16_t* val) {
+    return blockingRead(&hum_call, val, humTask);
+  }
+
+  event void Temperature.readDone( error_t result, uint16_t val ) {
+    params_t* p = temp_call->params;
+    p->error = result;
+    *(p->val) = val;
+    call SystemCall.finish(temp_call);
+  }  
+  
+  event void Humidity.readDone( error_t result, uint16_t val ) {
+    params_t* p = hum_call->params;
+    p->error = result;
+    *(p->val) = val;
+    call SystemCall.finish(hum_call);
+  }
+}
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingSensirionSht11ReaderP.nc b/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingSensirionSht11ReaderP.nc
new file mode 100644
index 00000000..5ff27824
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/BlockingSensirionSht11ReaderP.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "thread.h"
+
+generic configuration BlockingSensirionSht11ReaderP() {
+  provides interface DeviceMetadata as TemperatureMetadata;
+  provides interface BlockingRead<uint16_t> as Temperature;
+  provides interface DeviceMetadata as HumidityMetadata;
+  provides interface BlockingRead<uint16_t> as Humidity;
+  
+  uses interface Resource as TempResource;
+  uses interface Resource as HumResource;
+  uses interface SensirionSht11 as Sht11Temp;
+  uses interface SensirionSht11 as Sht11Hum;
+}
+implementation {
+  components new SensirionSht11ReaderP();
+  components new BlockingSensirionSht11ReaderImplP();
+  
+  TemperatureMetadata = SensirionSht11ReaderP.TemperatureMetadata;
+  Temperature = BlockingSensirionSht11ReaderImplP.BlockingTemperature;
+  HumidityMetadata = SensirionSht11ReaderP.HumidityMetadata;
+  Humidity = BlockingSensirionSht11ReaderImplP.BlockingHumidity;
+  
+  TempResource = SensirionSht11ReaderP.TempResource;
+  HumResource = SensirionSht11ReaderP.HumResource;
+  Sht11Temp = SensirionSht11ReaderP.Sht11Temp;
+  Sht11Hum = SensirionSht11ReaderP.Sht11Hum;
+  
+  BlockingSensirionSht11ReaderImplP.Temperature -> SensirionSht11ReaderP.Temperature;
+  BlockingSensirionSht11ReaderImplP.Humidity -> SensirionSht11ReaderP.Humidity;
+  
+  components SystemCallC;
+  BlockingSensirionSht11ReaderImplP.SystemCall -> SystemCallC;
+}
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS10871TsrC.nc b/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS10871TsrC.nc
new file mode 100644
index 00000000..1c75d720
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS10871TsrC.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration CHamamatsuS10871TsrC {}
+implementation {
+  components CHamamatsuS10871TsrP;
+#ifdef PLATFORM_TELOSB
+  components new BlockingHamamatsuS10871TsrC();
+             
+  CHamamatsuS10871TsrP.DeviceMetadata -> BlockingHamamatsuS10871TsrC.DeviceMetadata;
+  CHamamatsuS10871TsrP.Read -> BlockingHamamatsuS10871TsrC.Read;
+  CHamamatsuS10871TsrP.ReadStream -> BlockingHamamatsuS10871TsrC.ReadStream;
+#endif
+}
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS10871TsrP.nc b/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS10871TsrP.nc
new file mode 100644
index 00000000..da4bfa9f
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS10871TsrP.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module CHamamatsuS10871TsrP {
+  uses {
+    interface DeviceMetadata;
+    interface BlockingRead<uint16_t> as Read;
+    interface BlockingReadStream<uint16_t> as ReadStream;
+  }
+}
+implementation {
+  error_t hamamatsuS10871_tsr_read(uint16_t* val) @C() AT_SPONTANEOUS {
+    return call Read.read(val);
+  }
+  error_t hamamatsuS10871_tsr_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count) @C() AT_SPONTANEOUS {
+    return call ReadStream.read(usPeriod, buf, count);                                           
+  }                                            
+  uint8_t hamamatsuS10871_tsr_getNumBits() @C() AT_SPONTANEOUS {
+    return call DeviceMetadata.getSignificantBits();
+  }
+  
+  default command error_t Read.read(uint16_t* val) {
+    return FAIL;
+  }
+  
+  default command error_t ReadStream.read(uint32_t* usPeriod, uint16_t* buf, uint16_t count) {
+    return FAIL;
+  }
+  
+  default command uint8_t DeviceMetadata.getSignificantBits() {
+    return 0;
+  }
+}
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS1087ParC.nc b/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS1087ParC.nc
new file mode 100644
index 00000000..a4a020d1
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS1087ParC.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration CHamamatsuS1087ParC {}
+implementation {
+  components CHamamatsuS1087ParP;
+#ifdef PLATFORM_TELOSB
+  components new BlockingHamamatsuS1087ParC();
+             
+  CHamamatsuS1087ParP.DeviceMetadata -> BlockingHamamatsuS1087ParC.DeviceMetadata;
+  CHamamatsuS1087ParP.Read -> BlockingHamamatsuS1087ParC.Read;
+  CHamamatsuS1087ParP.ReadStream -> BlockingHamamatsuS1087ParC.ReadStream;
+#endif
+}
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS1087ParP.nc b/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS1087ParP.nc
new file mode 100644
index 00000000..bd45a932
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/CHamamatsuS1087ParP.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module CHamamatsuS1087ParP {
+  uses {
+    interface DeviceMetadata;
+    interface BlockingRead<uint16_t> as Read;
+    interface BlockingReadStream<uint16_t> as ReadStream;
+   }
+}
+implementation {
+
+  error_t hamamatsuS1087_par_read(uint16_t* val) @C() AT_SPONTANEOUS {
+    return call Read.read(val);
+  }
+  error_t hamamatsuS1087_par_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count) @C() AT_SPONTANEOUS {
+    return call ReadStream.read(usPeriod, buf, count);                                           
+  }                                           
+  uint8_t hamamatsuS1087_par_getNumBits() @C() AT_SPONTANEOUS {
+    return call DeviceMetadata.getSignificantBits();
+  }
+  
+  default command error_t Read.read(uint16_t* val) {
+    return FAIL;
+  }
+  
+  default command error_t ReadStream.read(uint32_t* usPeriod, uint16_t* buf, uint16_t count) {
+    return FAIL;
+  }
+  
+  default command uint8_t DeviceMetadata.getSignificantBits() {
+    return 0;
+  }
+}
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/CSensirionSht11C.nc b/tos/lib/tosthreads/sensorboards/tmote_onboard/CSensirionSht11C.nc
new file mode 100644
index 00000000..52d9623b
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/CSensirionSht11C.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration CSensirionSht11C {}
+implementation {
+  components CSensirionSht11P;
+#ifdef PLATFORM_TELOSB
+  components new BlockingSensirionSht11C();
+             
+  CSensirionSht11P.Temperature -> BlockingSensirionSht11C.Temperature;
+  CSensirionSht11P.TemperatureMetadata -> BlockingSensirionSht11C.TemperatureMetadata;
+  CSensirionSht11P.Humidity -> BlockingSensirionSht11C.Humidity;
+  CSensirionSht11P.HumidityMetadata -> BlockingSensirionSht11C.HumidityMetadata;
+#endif
+}
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/CSensirionSht11P.nc b/tos/lib/tosthreads/sensorboards/tmote_onboard/CSensirionSht11P.nc
new file mode 100644
index 00000000..448d6681
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/CSensirionSht11P.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module CSensirionSht11P {
+  uses {
+    interface BlockingRead<uint16_t> as Temperature;
+    interface DeviceMetadata as TemperatureMetadata;
+    interface BlockingRead<uint16_t> as Humidity;
+    interface DeviceMetadata as HumidityMetadata;  
+  }
+}
+implementation {
+  error_t sensirionSht11_humidity_read(uint16_t* val) @C() AT_SPONTANEOUS {
+    return call Humidity.read(val);
+  }
+  uint8_t sensirionSht11_humidity_getNumBits() @C() AT_SPONTANEOUS {
+    return call HumidityMetadata.getSignificantBits();
+  }
+  error_t sensirionSht11_temperature_read(uint16_t* val) @C() AT_SPONTANEOUS {
+    return call Temperature.read(val);
+  }
+  uint8_t sensirionSht11_temperature_getNumBits() @C() AT_SPONTANEOUS {
+    return call TemperatureMetadata.getSignificantBits();
+  }
+  
+  default command error_t Humidity.read(uint16_t* val) {
+    return FAIL;
+  }
+
+  default command uint8_t HumidityMetadata.getSignificantBits() {
+    return 0;
+  }
+  
+  default command error_t Temperature.read(uint16_t* val) {
+    return FAIL;
+  }
+
+  default command uint8_t TemperatureMetadata.getSignificantBits() {
+    return 0;
+  }
+}
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/tmote_onboard_sensors.h b/tos/lib/tosthreads/sensorboards/tmote_onboard/tmote_onboard_sensors.h
new file mode 100644
index 00000000..bf37969c
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/tmote_onboard_sensors.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+  
+#ifndef TMOTE_ONBOARD_SENSORS_H
+#define TMOTE_ONBOARD_SENSORS_H
+
+#include "tosthread_sensirionSht11.h"
+#include "tosthread_hamamatsuS1087.h"
+#include "tosthread_hamamatsuS10871.h"
+
+#endif //TMOTE_ONBOARD_SENSORS_H
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/tosthread_hamamatsuS1087.h b/tos/lib/tosthreads/sensorboards/tmote_onboard/tosthread_hamamatsuS1087.h
new file mode 100644
index 00000000..c033b0bf
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/tosthread_hamamatsuS1087.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_HAMAMATSUS1087_H
+#define TOSTHREAD_HAMAMATSUS1087_H
+
+#include "TinyError.h"
+#define tmote_par hamamatsuS1087_par
+
+extern error_t hamamatsuS1087_par_read(uint16_t* val);
+extern error_t hamamatsuS1087_par_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count);
+extern uint8_t hamamatsuS1087_par_getNumBits();
+
+#endif //TOSTHREAD_HAMAMATSUS1087_H
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/tosthread_hamamatsuS10871.h b/tos/lib/tosthreads/sensorboards/tmote_onboard/tosthread_hamamatsuS10871.h
new file mode 100644
index 00000000..2ef4f4e9
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/tosthread_hamamatsuS10871.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_HAMAMATSUS10871_H
+#define TOSTHREAD_HAMAMATSUS10871_H
+
+#include "TinyError.h"
+#define tmote_tsr hamamatsuS10871_tsr
+
+extern error_t hamamatsuS10871_tsr_read(uint16_t* val);
+extern error_t hamamatsuS10871_tsr_readStream(uint32_t* usPeriod, uint16_t* buf, uint16_t count);
+extern uint8_t hamamatsuS10871_tsr_getNumBits();
+
+#endif //TOSTHREAD_HAMAMATSUS1087_H
diff --git a/tos/lib/tosthreads/sensorboards/tmote_onboard/tosthread_sensirionSht11.h b/tos/lib/tosthreads/sensorboards/tmote_onboard/tosthread_sensirionSht11.h
new file mode 100644
index 00000000..64ed65c9
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/tmote_onboard/tosthread_sensirionSht11.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+  
+#ifndef TOSTHREAD_SENSIRIONSHT11_H
+#define TOSTHREAD_SENSIRIONSHT11_H
+
+#include "TinyError.h"
+#define tmote_humidity sensirionSht11_humidity
+#define tmote_temperature sensirionSht11_temperature
+
+extern error_t sensirionSht11_humidity_read(uint16_t* val);
+extern uint8_t sensirionSht11_humidity_getNumBits();
+
+extern error_t sensirionSht11_temperature_read(uint16_t* val);
+extern uint8_t sensirionSht11_temperature_getNumBits();
+
+#endif //TOSTHREAD_SENSIRIONSHT11_H
diff --git a/tos/lib/tosthreads/sensorboards/universal/BlockingSineSensorC.nc b/tos/lib/tosthreads/sensorboards/universal/BlockingSineSensorC.nc
new file mode 100644
index 00000000..5d9dbfa1
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/universal/BlockingSineSensorC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+generic configuration BlockingSineSensorC() {
+  provides interface Init;
+  provides interface BlockingRead<uint16_t>;
+}
+implementation {
+  components BlockingSineSensorP;
+  components new SineSensorC();
+  
+  enum { ID = unique("Sine.Sensor") };
+  
+  Init = SineSensorC;
+  BlockingRead = BlockingSineSensorP.BlockingRead[ID];
+  BlockingSineSensorP.Read[ID] -> SineSensorC;
+}
diff --git a/tos/lib/tosthreads/sensorboards/universal/BlockingSineSensorP.nc b/tos/lib/tosthreads/sensorboards/universal/BlockingSineSensorP.nc
new file mode 100644
index 00000000..0c3118b2
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/universal/BlockingSineSensorP.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration BlockingSineSensorP {
+  provides interface BlockingRead<uint16_t>[uint8_t id];
+  uses interface Read<uint16_t>[uint8_t id];
+}
+implementation {
+  components new BlockingReadP();
+  
+  BlockingRead = BlockingReadP;
+  Read = BlockingReadP;
+  
+  components SystemCallC;
+  components SystemCallQueueC;
+  BlockingReadP.SystemCallQueue -> SystemCallQueueC;
+  BlockingReadP.SystemCall -> SystemCallC;
+}
diff --git a/tos/lib/tosthreads/sensorboards/universal/CSineSensorC.nc b/tos/lib/tosthreads/sensorboards/universal/CSineSensorC.nc
new file mode 100644
index 00000000..6409b473
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/universal/CSineSensorC.nc
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration CSineSensorC {}
+implementation {
+  components CSineSensorP;
+  components new BlockingSineSensorC();       
+  CSineSensorP.BlockingRead -> BlockingSineSensorC;
+}
diff --git a/tos/lib/tosthreads/sensorboards/universal/CSineSensorP.nc b/tos/lib/tosthreads/sensorboards/universal/CSineSensorP.nc
new file mode 100644
index 00000000..770362a9
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/universal/CSineSensorP.nc
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module CSineSensorP {
+  uses {
+    interface BlockingRead<uint16_t>;
+  }
+}
+implementation {
+  error_t sinesensor_read(uint16_t* val) @C() AT_SPONTANEOUS {
+    return call BlockingRead.read(val);
+  }
+}
diff --git a/tos/lib/tosthreads/sensorboards/universal/tosthread_sinesensor.h b/tos/lib/tosthreads/sensorboards/universal/tosthread_sinesensor.h
new file mode 100644
index 00000000..46e0c12c
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/universal/tosthread_sinesensor.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef TOSTHREAD_SINESENSOR_H
+#define TOSTHREAD_SINESENSOR_H
+
+#include "TinyError.h"
+
+extern error_t sinesensor_read(uint16_t* val);
+
+#endif //TOSTHREAD_SINESENSOR_H
diff --git a/tos/lib/tosthreads/sensorboards/universal/universal_sensors.h b/tos/lib/tosthreads/sensorboards/universal/universal_sensors.h
new file mode 100644
index 00000000..3745ded9
--- /dev/null
+++ b/tos/lib/tosthreads/sensorboards/universal/universal_sensors.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+  
+#ifndef UNIVERSAL_SENSORS_H
+#define UNIVERSAL_SENSORS_H
+
+#include "tosthread_sinesensor.h"
+
+#endif //UNIVERSAL_SENSORS_H
diff --git a/tos/lib/tosthreads/system/BarrierC.nc b/tos/lib/tosthreads/system/BarrierC.nc
new file mode 100644
index 00000000..4627b51b
--- /dev/null
+++ b/tos/lib/tosthreads/system/BarrierC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This is the barrier implementation.  Every barrier has a pointer to 
+ * a linked list of threads.  When a thread calls block() on a barrier 
+ * it is pushed onto the thread queue associated with that barrier and
+ * it is blocked.  Once some thread calls unblock() on a particular 
+ * barrier, all threads on that barrier's thread queue are popped off 
+ * and woken up. 
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "thread.h"
+#include "barrier.h"
+
+configuration BarrierC {
+  provides {
+    interface Barrier;
+  }
+}
+implementation {
+  components TinyThreadSchedulerC;
+  components ThreadQueueC;
+  components BarrierP;
+  
+  Barrier = BarrierP;
+  BarrierP.ThreadScheduler -> TinyThreadSchedulerC;
+  BarrierP.ThreadQueue -> ThreadQueueC;
+  
+  components LedsC;
+  BarrierP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/BarrierP.nc b/tos/lib/tosthreads/system/BarrierP.nc
new file mode 100644
index 00000000..ee1b259c
--- /dev/null
+++ b/tos/lib/tosthreads/system/BarrierP.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This is the barrier implementation.  Every barrier has a pointer to 
+ * a linked list of threads.  When a thread calls block() on a barrier 
+ * it is pushed onto the thread queue associated with that barrier and
+ * it is blocked.  Once some thread calls unblock() on a particular 
+ * barrier, all threads on that barrier's thread queue are popped off 
+ * and woken up. 
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module BarrierP {
+  provides {
+    interface Barrier;
+  }
+  uses {
+    interface ThreadScheduler;
+    interface ThreadQueue;
+    interface Leds;
+  }
+}
+
+implementation {
+  command void Barrier.reset(barrier_t* b, uint8_t count) {
+    atomic {
+      b->count = count;
+      //Initialize the thread queue associated with this barrier.
+      call ThreadQueue.init(&(b->thread_queue));  
+    }
+  }
+  command void Barrier.block(barrier_t* b) {
+    atomic {
+      if(b->count > 1) {
+        //Push the thread that just called block() onto the thread queue associated with this barrier
+        call ThreadQueue.enqueue(&(b->thread_queue), call ThreadScheduler.currentThreadInfo());
+        b->count--;
+        call ThreadScheduler.suspendCurrentThread();
+      }
+      else {
+        thread_t* t;
+        while((t = call ThreadQueue.dequeue(&(b->thread_queue))) != NULL)
+          call ThreadScheduler.wakeupThread(t->id);
+      }
+    }
+  }
+  command bool Barrier.isBlocking(barrier_t* b) {
+    atomic return !(call ThreadQueue.isEmpty(&(b->thread_queue)));
+  }
+}
diff --git a/tos/lib/tosthreads/system/BitArrayUtilsC.nc b/tos/lib/tosthreads/system/BitArrayUtilsC.nc
new file mode 100644
index 00000000..7ddc0b41
--- /dev/null
+++ b/tos/lib/tosthreads/system/BitArrayUtilsC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module BitArrayUtilsC {
+  provides interface BitArrayUtils;
+}
+
+implementation {
+  uint16_t getByteIndex(uint8_t bitIndex) {
+    return bitIndex / 8;
+  }
+  uint8_t getMask(uint8_t bitIndex) {
+    return 1 << (bitIndex % 8);
+  }
+  async command void BitArrayUtils.clrArray(uint8_t* array, uint8_t size) {
+    memset(array, 0, size);
+  }
+  async command bool BitArrayUtils.getBit(uint8_t* array, uint8_t bitIndex) {
+    return (array[getByteIndex(bitIndex)] & getMask(bitIndex)) ? TRUE : FALSE;
+  }
+  async command void BitArrayUtils.setBit(uint8_t* array, uint8_t bitIndex) {
+    array[getByteIndex(bitIndex)] |= getMask(bitIndex);
+  }
+  async command void BitArrayUtils.clrBit(uint8_t* array, uint8_t bitIndex) {
+    array[getByteIndex(bitIndex)] &= ~getMask(bitIndex);
+  }
+}
diff --git a/tos/lib/tosthreads/system/BlockingAMReceiverC.nc b/tos/lib/tosthreads/system/BlockingAMReceiverC.nc
new file mode 100644
index 00000000..f3676010
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingAMReceiverC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ * @author Chieh-Jan Mike Liang (cliang4@cs.jhu.edu)
+ */
+
+#include "AM.h"
+
+generic configuration BlockingAMReceiverC(am_id_t amId) {
+  provides {
+    interface BlockingReceive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+implementation {
+  components BlockingActiveMessageC as AM;
+  BlockingReceive = AM.BlockingReceive[amId];
+  
+  Packet = AM;
+  AMPacket = AM;
+}
diff --git a/tos/lib/tosthreads/system/BlockingAMReceiverImplP.nc b/tos/lib/tosthreads/system/BlockingAMReceiverImplP.nc
new file mode 100644
index 00000000..e9b6b4ed
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingAMReceiverImplP.nc
@@ -0,0 +1,161 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+generic module BlockingAMReceiverImplP() {
+  provides {
+    interface Init;
+    interface BlockingReceive[uint8_t id];
+    interface BlockingReceive as BlockingReceiveAny;
+  }
+  uses {
+    interface Packet;
+    interface Timer<TMilli>[uint8_t id];
+    interface Receive[uint8_t id];
+    interface SystemCall;
+    interface SystemCallQueue;
+    interface ThreadScheduler;
+    interface Leds;
+  }
+}
+implementation {
+  
+  typedef struct params {
+    uint32_t*  timeout;
+    message_t* msg;
+    error_t    error;
+  } params_t;
+
+  //For parameterized BlockingReceive interface
+  syscall_queue_t am_queue;
+  
+  //For single BlockingReceiveAny interface 
+  bool blockForAny = FALSE;
+  
+  void timerTask(syscall_t* s) {
+    params_t* p = s->params;
+    call Timer.startOneShot[s->thread->id](*(p->timeout));  
+  }
+  
+  command error_t Init.init() {
+    call SystemCallQueue.init(&am_queue);
+    blockForAny = FALSE;
+    return SUCCESS;
+  }
+  
+  void blockingReceive(syscall_t* s, am_id_t am_id, params_t* p, message_t* m, uint32_t* timeout) { 
+    p->msg = m;
+    p->timeout = timeout;
+    atomic {
+      p->error = EBUSY;
+      if(*timeout != 0)
+        call SystemCall.start(&timerTask, s, am_id, p);
+      else
+        call SystemCall.start(SYSCALL_WAIT_ON_EVENT, s, am_id, p);
+    }
+  }
+  
+  command error_t BlockingReceiveAny.receive(message_t* m, uint32_t timeout) {
+    syscall_t s;
+    params_t p;
+    atomic {
+      if((blockForAny == TRUE) || (call SystemCallQueue.isEmpty(&am_queue) == FALSE))
+        return EBUSY;
+      call SystemCallQueue.enqueue(&am_queue, &s);
+      blockForAny = TRUE;
+    }
+    
+    blockingReceive(&s, INVALID_ID, &p, m, &timeout);
+    
+    atomic {
+      blockForAny = FALSE;
+      call SystemCallQueue.remove(&am_queue, &s);
+      return p.error;
+    }
+  }
+  
+  command error_t BlockingReceive.receive[uint8_t am_id](message_t* m, uint32_t timeout) {
+    syscall_t s;
+    params_t p;
+    atomic {
+      if((blockForAny == TRUE) || (call SystemCallQueue.find(&am_queue, am_id) != NULL))
+        return EBUSY;
+      call SystemCallQueue.enqueue(&am_queue, &s);
+    }
+	 
+	blockingReceive(&s, am_id, &p, m, &timeout);
+	
+    atomic {
+      call SystemCallQueue.remove(&am_queue, &s);
+      return p.error;
+    }	
+  }
+
+  command void* BlockingReceive.getPayload[uint8_t am_id](message_t* msg, uint8_t len) {
+    return call Packet.getPayload(msg,len);
+  }
+  
+  command void* BlockingReceiveAny.getPayload(message_t* msg, uint8_t len) {
+    return call Packet.getPayload(msg,len);
+  }
+  
+  event message_t* Receive.receive[uint8_t am_id](message_t* m, void* payload, uint8_t len) {
+    syscall_t* s;
+    params_t* p;
+    
+    if(blockForAny == TRUE)
+      s = call SystemCallQueue.find(&am_queue, INVALID_ID);
+    else
+      s = call SystemCallQueue.find(&am_queue, am_id);
+    if(s == NULL) return m;
+        
+    p = s->params;
+    if( (p->error == EBUSY) ) {
+      call Timer.stop[s->thread->id]();
+      *(p->msg) = *m;
+      p->error = SUCCESS;
+      call SystemCall.finish(s);
+    }
+    return m;
+  }
+  
+  event void Timer.fired[uint8_t id]() {
+    thread_t* t = call ThreadScheduler.threadInfo(id);
+    params_t* p = t->syscall->params;
+    if( (p->error == EBUSY) ) {
+      p->error = FAIL;
+      call SystemCall.finish(t->syscall);
+    }
+  }
+}
diff --git a/tos/lib/tosthreads/system/BlockingAMReceiverP.nc b/tos/lib/tosthreads/system/BlockingAMReceiverP.nc
new file mode 100644
index 00000000..71d73f75
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingAMReceiverP.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "AM.h"
+#include "thread.h"
+
+configuration BlockingAMReceiverP {
+  provides {
+    interface BlockingReceive[uint8_t id];
+    interface BlockingReceive as BlockingReceiveAny;
+  }
+  uses {
+    interface Receive[uint8_t id];
+  }
+}
+implementation {
+  components MainC;
+  components ActiveMessageC as AM;
+  components new BlockingAMReceiverImplP();
+  
+  MainC.SoftwareInit -> BlockingAMReceiverImplP;
+
+  BlockingReceive = BlockingAMReceiverImplP;
+  BlockingReceiveAny = BlockingAMReceiverImplP;
+  Receive = BlockingAMReceiverImplP;
+  BlockingAMReceiverImplP.Packet -> AM;
+  
+  components SystemCallC;
+  components SystemCallQueueC;
+  components TinyThreadSchedulerC;
+  BlockingAMReceiverImplP.SystemCallQueue -> SystemCallQueueC;
+  BlockingAMReceiverImplP.SystemCall -> SystemCallC;
+  BlockingAMReceiverImplP.ThreadScheduler -> TinyThreadSchedulerC;
+
+  components ThreadTimersC;
+  BlockingAMReceiverImplP.Timer -> ThreadTimersC;
+  
+  components LedsC;
+  BlockingAMReceiverImplP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingAMSenderC.nc b/tos/lib/tosthreads/system/BlockingAMSenderC.nc
new file mode 100644
index 00000000..4d70b1e0
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingAMSenderC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "AM.h"
+
+generic configuration BlockingAMSenderC(am_id_t AMId) {
+  provides {
+    interface BlockingAMSend;
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+
+implementation {
+  components BlockingActiveMessageC as AM;
+  BlockingAMSend = AM.BlockingAMSend[AMId];
+  
+  Packet = AM;
+  AMPacket = AM;
+  Acks = AM;
+}
diff --git a/tos/lib/tosthreads/system/BlockingAMSenderImplP.nc b/tos/lib/tosthreads/system/BlockingAMSenderImplP.nc
new file mode 100644
index 00000000..c519e64c
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingAMSenderImplP.nc
@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+generic module BlockingAMSenderImplP() {
+  provides {
+    interface Init;
+    interface BlockingAMSend[am_id_t id];
+  }
+  uses {
+    interface SystemCall;
+    interface Mutex;
+    interface AMSend[am_id_t id];
+    interface Packet;
+    interface Leds;
+  }
+}
+implementation {
+
+  typedef struct params {
+    am_addr_t  addr;
+    message_t* msg;
+    uint8_t    len;
+    error_t    error;
+  } params_t;
+  
+  syscall_t* send_call = NULL;
+  mutex_t my_mutex;
+  
+  void sendTask(syscall_t* s) {
+    params_t* p = s->params;
+    p->error = call AMSend.send[s->id](p->addr, p->msg, p->len);
+    if(p->error != SUCCESS)
+      call SystemCall.finish(s);
+  }
+  
+  command error_t Init.init() {
+    call Mutex.init(&my_mutex);
+    return SUCCESS;
+  }
+  
+  command error_t BlockingAMSend.send[am_id_t am_id](am_addr_t addr, message_t* msg, uint8_t len) {
+    syscall_t s;
+    params_t p;
+    call Mutex.lock(&my_mutex);
+      if (send_call == NULL) {
+        send_call = &s;
+      
+        p.addr = addr;
+        p.msg = msg;
+        p.len = len;
+      
+        call SystemCall.start(&sendTask, &s, am_id, &p);
+        send_call = NULL;
+      } else {
+        p.error = EBUSY;
+      }
+    
+    atomic {
+      call Mutex.unlock(&my_mutex);
+      return p.error;
+    }
+  }
+
+  command uint8_t BlockingAMSend.maxPayloadLength[am_id_t id]() {
+    return call Packet.maxPayloadLength();
+  }
+  command void* BlockingAMSend.getPayload[am_id_t id](message_t* msg, uint8_t len) {
+    return call Packet.getPayload(msg, len);
+  }
+  
+  event void AMSend.sendDone[am_id_t am_id](message_t* m, error_t error) {
+    if (send_call != NULL) {
+      if (send_call->id == am_id) {
+        params_t* p;
+        p = send_call->params;
+        p->error = error;
+        call SystemCall.finish(send_call);
+      }
+    }
+  }
+  default command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len) {
+    return FAIL;
+  }
+}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/tos/lib/tosthreads/system/BlockingAMSenderP.nc b/tos/lib/tosthreads/system/BlockingAMSenderP.nc
new file mode 100644
index 00000000..1678f383
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingAMSenderP.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "AM.h"
+#include "thread.h"
+#include "mutex.h"
+
+configuration BlockingAMSenderP {
+  provides {
+    interface BlockingAMSend[am_id_t amId];
+  }
+  uses {
+    interface AMSend[am_id_t amId];
+  }
+}
+
+implementation {
+  components MainC;
+  components ActiveMessageC as AM;
+  components new BlockingAMSenderImplP();
+  components MutexC;
+  components SystemCallC;
+  components LedsC;
+  
+  MainC.SoftwareInit -> BlockingAMSenderImplP;
+  
+  BlockingAMSend = BlockingAMSenderImplP;
+  AMSend = BlockingAMSenderImplP;
+  BlockingAMSenderImplP.Mutex -> MutexC;
+  BlockingAMSenderImplP.SystemCall -> SystemCallC;
+  BlockingAMSenderImplP.Packet -> AM;
+  BlockingAMSenderImplP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingAMSnooperC.nc b/tos/lib/tosthreads/system/BlockingAMSnooperC.nc
new file mode 100644
index 00000000..3f90b911
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingAMSnooperC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ * @author Chieh-Jan Mike Liang (cliang4@cs.jhu.edu)
+ */
+
+#include "AM.h"
+
+generic configuration BlockingAMSnooperC(am_id_t amId) {
+  provides {
+    interface BlockingReceive as BlockingSnoop;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+implementation {
+  components BlockingActiveMessageC as AM;
+  BlockingReceive = AM.BlockingSnoop[amId];
+  
+  Packet = AM;
+  AMPacket = AM;
+}
diff --git a/tos/lib/tosthreads/system/BlockingAMSnooperP.nc b/tos/lib/tosthreads/system/BlockingAMSnooperP.nc
new file mode 100644
index 00000000..5f2091e5
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingAMSnooperP.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "AM.h"
+#include "thread.h"
+
+configuration BlockingAMSnooperP {
+  provides {
+    interface BlockingReceive as BlockingSnoop[uint8_t id];
+    interface BlockingReceive as BlockingSnoopAny;
+  }
+  uses {
+    interface Receive as Snoop[uint8_t id];
+  }
+}
+implementation {
+  components MainC;
+  components ActiveMessageC as AM;
+  components new BlockingAMReceiverImplP();
+  
+  MainC.SoftwareInit -> BlockingAMReceiverImplP;
+
+  BlockingSnoop = BlockingAMReceiverImplP;
+  BlockingSnoopAny = BlockingAMReceiverImplP;
+  Snoop = BlockingAMReceiverImplP;
+  BlockingAMReceiverImplP.Packet -> AM;
+  
+  components SystemCallC;
+  components SystemCallQueueC;
+  components TinyThreadSchedulerC;
+  BlockingAMReceiverImplP.SystemCallQueue -> SystemCallQueueC;
+  BlockingAMReceiverImplP.SystemCall -> SystemCallC;
+  BlockingAMReceiverImplP.ThreadScheduler -> TinyThreadSchedulerC;
+
+  components ThreadTimersC;
+  BlockingAMReceiverImplP.Timer -> ThreadTimersC;
+  
+  components LedsC;
+  BlockingAMReceiverImplP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingActiveMessageC.nc b/tos/lib/tosthreads/system/BlockingActiveMessageC.nc
new file mode 100644
index 00000000..26b29ffc
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingActiveMessageC.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+configuration BlockingActiveMessageC {
+  provides {
+    interface BlockingStdControl;
+    interface BlockingReceive[uint8_t id];
+    interface BlockingReceive as BlockingReceiveAny;
+    interface BlockingReceive as BlockingSnoop[uint8_t id];
+    interface BlockingReceive as BlockingSnoopAny;
+    interface BlockingAMSend[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components ActiveMessageC as AM;
+  components new BlockingStdControlC();
+  components BlockingAMReceiverP as AMReceiverP;
+  components BlockingAMSnooperP as AMSnooperP;
+  components BlockingAMSenderP as AMSenderP;
+  BlockingStdControl = BlockingStdControlC;
+  BlockingReceive = AMReceiverP;
+  BlockingReceiveAny = AMReceiverP;
+  BlockingSnoop = AMSnooperP;
+  BlockingSnoopAny = AMSnooperP;
+  BlockingAMSend = AMSenderP;
+  
+  BlockingStdControlC.SplitControl -> AM;
+  AMReceiverP.Receive -> AM.ReceiveDefault;
+  AMSnooperP.Snoop -> AM.SnoopDefault;
+  AMSenderP.AMSend -> AM.AMSend;
+    
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+}
diff --git a/tos/lib/tosthreads/system/BlockingBlockStorageC.nc b/tos/lib/tosthreads/system/BlockingBlockStorageC.nc
new file mode 100644
index 00000000..f466658b
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingBlockStorageC.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#define UQ_BLOCKING_BLOCK_STORAGE_VOLUME "Blocking.Block.Storage.Volume"
+
+generic configuration BlockingBlockStorageC(volume_id_t volume_id) {
+  provides {
+    interface BlockingBlock;
+  }
+}
+
+implementation {
+  enum {
+    VOLUME_ID = unique(UQ_BLOCKING_BLOCK_STORAGE_VOLUME),
+  };
+
+  components new BlockStorageC(volume_id),
+             BlockingBlockStorageP;
+  
+  BlockingBlock = BlockingBlockStorageP.BlockingBlock[VOLUME_ID];
+  BlockingBlockStorageP.BlockRead[VOLUME_ID] -> BlockStorageC;
+  BlockingBlockStorageP.BlockWrite[VOLUME_ID] -> BlockStorageC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingBlockStorageImplP.nc b/tos/lib/tosthreads/system/BlockingBlockStorageImplP.nc
new file mode 100644
index 00000000..196166c5
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingBlockStorageImplP.nc
@@ -0,0 +1,294 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+ 
+module BlockingBlockStorageImplP {
+  provides {
+    interface Init;
+    interface BlockingBlock[uint8_t volume_id];
+  }
+  uses {
+    interface BlockRead[uint8_t volume_id];
+    interface BlockWrite[uint8_t volume_id];
+    interface SystemCall;
+    interface SystemCallQueue;
+  }
+}
+implementation {
+  
+  typedef struct read_write_params {
+    storage_addr_t addr;
+    void*          buf;
+    storage_len_t* len;
+    error_t        error;
+  } read_write_params_t;
+  
+  typedef struct crc_params {
+    storage_addr_t addr;
+    storage_len_t* len;
+    uint16_t       crc;
+    uint16_t       *finalCrc;    
+    error_t        error;
+  } crc_params_t;
+  
+  typedef struct erase_sync_params {
+    error_t error;
+  } erase_sync_params_t;
+
+  syscall_queue_t vol_queue;
+
+  command error_t Init.init() {
+    call SystemCallQueue.init(&vol_queue);
+    return SUCCESS;
+  }
+
+  command storage_len_t BlockingBlock.getSize[uint8_t volume_id]() {
+    return call BlockRead.getSize[volume_id]();
+  }
+  
+  /**************************** Reading ********************************/
+  void readTask(syscall_t* s) {
+    read_write_params_t* p = s->params;
+    p->error = call BlockRead.read[s->id](p->addr, p->buf, *(p->len));
+    if(p->error != SUCCESS)
+      call SystemCall.finish(s);
+  }
+  
+  command error_t BlockingBlock.read[uint8_t volume_id](storage_addr_t addr, void *buf, storage_len_t* len) {
+    syscall_t s;
+    read_write_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    p.addr = addr;
+    p.buf = buf;
+    p.len = len;
+    call SystemCall.start(&readTask, &s, volume_id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+
+  event void BlockRead.readDone[uint8_t volume_id](storage_addr_t addr, void *buf, storage_len_t len, error_t error) {
+    syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id);
+    read_write_params_t* p = s->params;
+    p->error = error;
+    *(p->len) = len;
+    call SystemCall.finish(s);
+  }
+
+  
+  /**************************** Writing ********************************/
+  void writeTask(syscall_t* s) {
+    read_write_params_t* p = s->params;
+    p->error = call BlockWrite.write[s->id](p->addr, p->buf, *(p->len));
+    if(p->error != SUCCESS)
+      call SystemCall.finish(s);
+  }
+  
+  command error_t BlockingBlock.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t* len) {
+    syscall_t s;
+    read_write_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    p.addr = addr;
+    p.buf = buf;
+    p.len = len;
+    call SystemCall.start(&writeTask, &s, volume_id, &p);
+
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+  
+  event void BlockWrite.writeDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error) {
+    syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id);
+    read_write_params_t* p = s->params;
+    *(p->len) = len;
+    p->error = error;
+    call SystemCall.finish(s);
+  }
+
+  /**************************** Computing CRC ********************************/
+  void crcTask(syscall_t* s) {
+    crc_params_t* p = s->params;
+    p->error = call BlockRead.computeCrc[s->id](p->addr, *(p->len), p->crc);
+    if(p->error != SUCCESS)
+      call SystemCall.finish(s);
+  }
+  
+  command error_t BlockingBlock.computeCrc[uint8_t volume_id](storage_addr_t addr, storage_len_t* len, uint16_t crc, uint16_t *finalCrc) {
+    syscall_t s;
+    crc_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    p.addr = addr;
+    p.len = len;
+    p.crc = crc;
+    p.finalCrc = finalCrc;
+    call SystemCall.start(&crcTask, &s, volume_id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+  
+  event void BlockRead.computeCrcDone[uint8_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc, error_t error) {
+    syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id);
+    crc_params_t* p = s->params;
+    *(p->finalCrc) = crc;
+    *(p->len) = len;
+    p->error = error;
+    call SystemCall.finish(s);
+  }
+
+  /**************************** Erasing ********************************/
+  void eraseTask(syscall_t* s) {
+    erase_sync_params_t* p = s->params;
+    p->error = call BlockWrite.erase[s->id]();
+    if(p->error != SUCCESS)
+      call SystemCall.finish(s);
+  }
+  
+  command error_t BlockingBlock.erase[uint8_t volume_id]() {
+    syscall_t s;
+    erase_sync_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    call SystemCall.start(&eraseTask, &s, volume_id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+
+  event void BlockWrite.eraseDone[uint8_t volume_id](error_t error) {
+    syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id);
+    erase_sync_params_t* p = s->params;
+    p->error = error;
+    call SystemCall.finish(s);
+  }
+
+  /**************************** Syncing ********************************/
+  void syncTask(syscall_t* s) {
+    erase_sync_params_t* p = s->params;
+    p->error = call BlockWrite.sync[s->id]();
+    if(p->error != SUCCESS)
+      call SystemCall.finish(s);
+  }
+  
+  command error_t BlockingBlock.sync[uint8_t volume_id]() {
+    syscall_t s;
+    erase_sync_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    call SystemCall.start(&syncTask, &s, volume_id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+  
+  event void BlockWrite.syncDone[uint8_t volume_id](error_t error) {
+    syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id);
+    erase_sync_params_t* p = s->params;
+    p->error = error;
+    call SystemCall.finish(s);
+  }
+  
+  default command error_t BlockRead.read[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t BlockRead.computeCrc[uint8_t volume_id](storage_addr_t addr, storage_len_t len, uint16_t crc) { return FAIL; }
+  default command storage_len_t BlockRead.getSize[uint8_t volume_id]() { return 0; }
+  default command error_t BlockWrite.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t BlockWrite.erase[uint8_t volume_id]() { return FAIL; }
+  default command error_t BlockWrite.sync[uint8_t volume_id]() { return FAIL; }
+}
diff --git a/tos/lib/tosthreads/system/BlockingBlockStorageP.nc b/tos/lib/tosthreads/system/BlockingBlockStorageP.nc
new file mode 100644
index 00000000..ad619c2b
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingBlockStorageP.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration BlockingBlockStorageP {
+  provides {
+    interface BlockingBlock[uint8_t id];
+  }
+  uses {
+    interface BlockRead[uint8_t id];
+    interface BlockWrite[uint8_t id];
+  }
+}
+
+implementation {
+  components MainC,
+             BlockingBlockStorageImplP;
+             
+  MainC.SoftwareInit -> BlockingBlockStorageImplP;
+  
+  BlockingBlock = BlockingBlockStorageImplP;
+  BlockRead = BlockingBlockStorageImplP;
+  BlockWrite = BlockingBlockStorageImplP;
+  
+  components SystemCallC;
+  components SystemCallQueueC;
+  BlockingBlockStorageImplP.SystemCall -> SystemCallC;
+  BlockingBlockStorageImplP.SystemCallQueue -> SystemCallQueueC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingBootC.nc b/tos/lib/tosthreads/system/BlockingBootC.nc
new file mode 100644
index 00000000..056dfddf
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingBootC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+ 
+generic configuration BlockingBootC() {
+  provides {
+    interface Boot as BlockingBoot;
+  }
+  uses {
+    interface Boot;
+  }
+}
+
+implementation {
+
+  components SystemCallC;
+  components new BlockingBootP();
+  BlockingBoot = BlockingBootP;
+  Boot = BlockingBootP;
+  BlockingBootP.SystemCall -> SystemCallC;
+  
+  components LedsC;
+  BlockingBootP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingBootP.nc b/tos/lib/tosthreads/system/BlockingBootP.nc
new file mode 100644
index 00000000..c4fbbffa
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingBootP.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+generic module BlockingBootP() {
+  provides {
+    interface Boot as BlockingBoot;
+  }
+  uses {
+    interface Boot;
+    interface SystemCall;
+    interface Leds;
+  }
+}
+implementation {
+  void bootTask(syscall_t* s) {
+    signal BlockingBoot.booted();
+    call SystemCall.finish(s);
+  }  
+  
+  event void Boot.booted() {
+    syscall_t s;    
+    call SystemCall.start(&bootTask, &s, INVALID_ID, NULL);
+  }
+}
diff --git a/tos/lib/tosthreads/system/BlockingConfigStorageC.nc b/tos/lib/tosthreads/system/BlockingConfigStorageC.nc
new file mode 100644
index 00000000..299c28df
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingConfigStorageC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#define UQ_BLOCKING_CONFIG_STORAGE_VOLUME "Blocking.Config.Storage.Volume"
+
+generic configuration BlockingConfigStorageC(volume_id_t volume_id) {
+  provides {
+    interface BlockingConfig;
+    interface BlockingMount;
+  }
+}
+
+implementation {
+  enum {
+    VOLUME_ID = unique(UQ_BLOCKING_CONFIG_STORAGE_VOLUME),
+  };
+
+  components new ConfigStorageC(volume_id),
+             BlockingConfigStorageP;
+  
+  BlockingConfig = BlockingConfigStorageP.BlockingConfig[VOLUME_ID];
+  BlockingMount = BlockingConfigStorageP.BlockingMount[VOLUME_ID];
+  
+  BlockingConfigStorageP.ConfigStorage[VOLUME_ID] -> ConfigStorageC;
+  BlockingConfigStorageP.ConfigMount[VOLUME_ID] -> ConfigStorageC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingConfigStorageImplP.nc b/tos/lib/tosthreads/system/BlockingConfigStorageImplP.nc
new file mode 100644
index 00000000..1eaef246
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingConfigStorageImplP.nc
@@ -0,0 +1,243 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+ 
+module BlockingConfigStorageImplP {
+  provides {
+    interface Init;
+    interface BlockingConfig[uint8_t volume_id];
+    interface BlockingMount[uint8_t volume_id];
+  }
+  
+  uses {
+    interface ConfigStorage[uint8_t volume_id];
+    interface Mount as ConfigMount[uint8_t volume_id];
+    interface SystemCall;
+    interface SystemCallQueue;
+  }
+}
+
+implementation {
+  typedef struct read_write_params {
+    storage_addr_t addr;
+    void*          buf;
+    storage_len_t* len;
+    error_t        error;
+  } read_write_params_t;
+    
+  typedef struct commit_mount_params {
+    error_t error;
+  } commit_mount_params_t;
+
+  syscall_queue_t vol_queue;
+
+  command error_t Init.init()
+  {
+    call SystemCallQueue.init(&vol_queue);
+    return SUCCESS;
+  }
+
+  command storage_len_t BlockingConfig.getSize[uint8_t volume_id]() {
+    return call ConfigStorage.getSize[volume_id]();
+  }
+  
+  command bool BlockingConfig.valid[uint8_t volume_id]() {
+    return call ConfigStorage.valid[volume_id]();
+  }
+  
+  /**************************** Reading ********************************/
+  void readTask(syscall_t* s)
+  {
+    read_write_params_t* p = s->params;
+    p->error = call ConfigStorage.read[s->id](p->addr, p->buf, *(p->len));
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }
+  }
+  
+  command error_t BlockingConfig.read[uint8_t volume_id](storage_addr_t addr, void *buf, storage_len_t* len)
+  {
+    syscall_t s;
+    read_write_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) {
+        return EBUSY;
+      }
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    p.addr = addr;
+    p.buf = buf;
+    p.len = len;
+    call SystemCall.start(&readTask, &s, volume_id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+
+  event void ConfigStorage.readDone[uint8_t volume_id](storage_addr_t addr, void *buf, storage_len_t len, error_t error)
+  {
+    syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id);
+    read_write_params_t* p = s->params;
+    p->error = error;
+    *(p->len) = len;
+    call SystemCall.finish(s);
+  }
+
+  
+  /**************************** Writing ********************************/
+  void writeTask(syscall_t* s)
+  {
+    read_write_params_t* p = s->params;
+    p->error = call ConfigStorage.write[s->id](p->addr, p->buf, *(p->len));
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }
+  }
+  
+  command error_t BlockingConfig.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t* len)
+  {
+    syscall_t s;
+    read_write_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) {
+        return EBUSY;
+      }
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    p.addr = addr;
+    p.buf = buf;
+    p.len = len;
+    call SystemCall.start(&writeTask, &s, volume_id, &p);
+
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+  
+  event void ConfigStorage.writeDone[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len, error_t error)
+  {
+    syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id);
+    read_write_params_t* p = s->params;
+    *(p->len) = len;
+    p->error = error;
+    call SystemCall.finish(s);
+  }
+
+  /**************************** Committing ********************************/
+  void commitTask(syscall_t* s)
+  {
+    commit_mount_params_t* p = s->params;
+    p->error = call ConfigStorage.commit[s->id]();
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }
+  }
+  
+  command error_t BlockingConfig.commit[uint8_t volume_id]()
+  {
+    syscall_t s;
+    commit_mount_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) {
+        return EBUSY;
+      }
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    call SystemCall.start(&commitTask, &s, volume_id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+
+  event void ConfigStorage.commitDone[uint8_t volume_id](error_t error)
+  {
+    syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id);
+    commit_mount_params_t* p = s->params;
+    p->error = error;
+    call SystemCall.finish(s);
+  }
+  
+  /**************************** Mounting ********************************/
+  void mountTask(syscall_t* s)
+  {
+    commit_mount_params_t* p = s->params;
+    p->error = call ConfigMount.mount[s->id]();
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }
+  }
+  
+  command error_t BlockingMount.mount[uint8_t volume_id]()
+  {
+    syscall_t s;
+    commit_mount_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL) {
+        return EBUSY;
+      }
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    call SystemCall.start(&mountTask, &s, volume_id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+
+  event void ConfigMount.mountDone[uint8_t volume_id](error_t error)
+  {
+    syscall_t* s = call SystemCallQueue.find(&vol_queue, volume_id);
+    commit_mount_params_t* p = s->params;
+    p->error = error;
+    call SystemCall.finish(s);
+  }  
+  
+  default command error_t ConfigStorage.read[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t ConfigStorage.write[uint8_t volume_id](storage_addr_t addr, void* buf, storage_len_t len) { return FAIL; }
+  default command error_t ConfigStorage.commit[uint8_t volume_id]() { return FAIL; }
+  default command storage_len_t ConfigStorage.getSize[uint8_t volume_id]() { return 0; }
+  default command bool ConfigStorage.valid[uint8_t volume_id]() { return FALSE; }
+  default command error_t ConfigMount.mount[uint8_t volume_id]() { return FAIL; }
+}
diff --git a/tos/lib/tosthreads/system/BlockingConfigStorageP.nc b/tos/lib/tosthreads/system/BlockingConfigStorageP.nc
new file mode 100644
index 00000000..267ed9ff
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingConfigStorageP.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration BlockingConfigStorageP {
+  provides {
+    interface BlockingConfig[uint8_t id];
+    interface BlockingMount[uint8_t id];
+  }
+  
+  uses {
+    interface ConfigStorage[uint8_t id];
+    interface Mount as ConfigMount[uint8_t id];
+  }
+}
+
+implementation {
+  components MainC,
+             SystemCallC,
+             SystemCallQueueC,
+             BlockingConfigStorageImplP;
+             
+  MainC.SoftwareInit -> BlockingConfigStorageImplP;
+  
+  BlockingConfig = BlockingConfigStorageImplP;
+  BlockingMount = BlockingConfigStorageImplP;
+  ConfigStorage = BlockingConfigStorageImplP;
+  ConfigMount = BlockingConfigStorageImplP;
+  
+  BlockingConfigStorageImplP.SystemCall -> SystemCallC;
+  BlockingConfigStorageImplP.SystemCallQueue -> SystemCallQueueC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingLogStorageC.nc b/tos/lib/tosthreads/system/BlockingLogStorageC.nc
new file mode 100644
index 00000000..182850d3
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingLogStorageC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "Storage.h"
+#define UQ_BLOCKING_LOG_STORAGE_VOLUME "Blocking.Log.Storage.Volume"
+
+generic configuration BlockingLogStorageC(volume_id_t volume_id, bool circular) {
+  provides {
+    interface BlockingLog;
+  }
+}
+
+implementation {
+  enum {
+    VOLUME_ID = unique(UQ_BLOCKING_LOG_STORAGE_VOLUME),
+  };
+
+  components new LogStorageC(volume_id, circular),
+             BlockingLogStorageP;
+  
+  BlockingLog = BlockingLogStorageP.BlockingLog[VOLUME_ID];
+  BlockingLogStorageP.LogRead[VOLUME_ID] -> LogStorageC;
+  BlockingLogStorageP.LogWrite[VOLUME_ID] -> LogStorageC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingLogStorageImplP.nc b/tos/lib/tosthreads/system/BlockingLogStorageImplP.nc
new file mode 100644
index 00000000..4a8996e6
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingLogStorageImplP.nc
@@ -0,0 +1,289 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module BlockingLogStorageImplP {
+  provides {
+    interface Init;
+    interface BlockingLog[uint8_t volume_id];
+  }
+  
+  uses {
+    interface LogRead[uint8_t volume_id];
+    interface LogWrite[uint8_t volume_id];
+    interface SystemCall;
+    interface SystemCallQueue;
+  }
+}
+
+implementation {
+  typedef struct read_params {
+    void *buf;
+    storage_len_t* len;
+    error_t error;
+  } read_params_t;
+  
+  typedef struct append_params {
+    void *buf;
+    storage_len_t* len;
+    bool* recordsLost;
+    error_t error;
+  } append_params_t;
+  
+  typedef struct seek_params {
+    storage_cookie_t offset;
+    error_t error;
+  } seek_params_t;
+  
+  typedef struct erase_sync_params {
+    error_t error;
+  } erase_sync_params_t;
+
+  syscall_queue_t vol_queue;
+
+  command error_t Init.init()
+  {
+    call SystemCallQueue.init(&vol_queue);
+    return SUCCESS;
+  }
+
+   // ===== READ ===== //
+  void readTask(syscall_t *s)
+  {
+    read_params_t *p = s->params;
+    p->error = call LogRead.read[s->id](p->buf, *(p->len));
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }
+  }
+  
+  command error_t BlockingLog.read[uint8_t volume_id](void *buf, storage_len_t *len)
+  {
+    syscall_t s;
+    read_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    p.buf = buf;
+    p.len = len;
+    call SystemCall.start(&readTask, &s, volume_id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+
+  event void LogRead.readDone[uint8_t volume_id](void *buf, storage_len_t len, error_t error)
+  {
+    syscall_t *s = call SystemCallQueue.find(&vol_queue, volume_id);
+    read_params_t *p = s->params;
+    if (p->buf == buf) {
+      p->error = error;
+      *(p->len) = len;
+      call SystemCall.finish(s);
+    }
+  }
+  
+  // ===== SEEK ===== //
+  void seekTask(syscall_t *s)
+  {
+    seek_params_t *p = s->params;
+    p->error = call LogRead.seek[s->id](p->offset);
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }
+  }
+  
+  command error_t BlockingLog.seek[uint8_t volume_id](storage_cookie_t offset)
+  {
+    syscall_t s;
+    seek_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    p.offset = offset;
+    call SystemCall.start(&seekTask, &s, volume_id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+  
+  event void LogRead.seekDone[uint8_t volume_id](error_t error)
+  {
+    syscall_t *s = call SystemCallQueue.find(&vol_queue, volume_id);
+    seek_params_t *p = s->params;
+    p->error = error;
+    call SystemCall.finish(s);
+  }
+  
+  // ===== APPEND ===== //
+  void appendTask(syscall_t *s)
+  {
+    append_params_t *p = s->params;
+    p->error = call LogWrite.append[s->id](p->buf, *(p->len));
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }
+  }
+  
+  command error_t BlockingLog.append[uint8_t volume_id](void* buf, storage_len_t *len, bool *recordsLost)
+  {
+    syscall_t s;
+    append_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    p.buf = buf;
+    p.len = len;
+    p.recordsLost = recordsLost;
+    call SystemCall.start(&appendTask, &s, volume_id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+
+  event void LogWrite.appendDone[uint8_t volume_id](void* buf, storage_len_t len, bool recordsLost, error_t error)
+  {
+    syscall_t *s = call SystemCallQueue.find(&vol_queue, volume_id);
+    append_params_t *p = s->params;
+    if (p->buf == buf) {
+      p->error = error;
+      *(p->len) = len;
+      *(p->recordsLost) = recordsLost;
+      call SystemCall.finish(s);
+    }
+  }
+  
+  // ===== ERASE ===== //
+  void eraseTask(syscall_t *s)
+  {
+    erase_sync_params_t *p = s->params;
+    p->error = call LogWrite.erase[s->id]();
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }
+  }
+  
+  command error_t BlockingLog.erase[uint8_t volume_id]()
+  {
+    syscall_t s;
+    erase_sync_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    call SystemCall.start(&eraseTask, &s, volume_id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+  
+  event void LogWrite.eraseDone[uint8_t volume_id](error_t error)
+  {
+    syscall_t *s = call SystemCallQueue.find(&vol_queue, volume_id);
+    erase_sync_params_t *p = s->params;
+    p->error = error;
+    call SystemCall.finish(s);
+  }
+  
+  // ===== SYNC ===== //
+  void syncTask(syscall_t *s)
+  {
+    erase_sync_params_t *p = s->params;
+    p->error = call LogWrite.sync[s->id]();
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    }
+  }
+  
+  command error_t BlockingLog.sync[uint8_t volume_id]()
+  {
+    syscall_t s;
+    erase_sync_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&vol_queue, volume_id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&vol_queue, &s);
+    }
+    
+    call SystemCall.start(&syncTask, &s, volume_id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&vol_queue, &s);
+      return p.error;
+    }
+  }
+  
+  event void LogWrite.syncDone[uint8_t volume_id](error_t error)
+  {
+    syscall_t *s = call SystemCallQueue.find(&vol_queue, volume_id);
+    erase_sync_params_t *p = s->params;
+    p->error = error;
+    call SystemCall.finish(s);
+  }
+  
+  // ===== MISC ===== //
+  command storage_cookie_t BlockingLog.currentWriteOffset[uint8_t volume_id]() { return call LogWrite.currentOffset[volume_id](); }
+  command storage_cookie_t BlockingLog.currentReadOffset[uint8_t volume_id]() { return call LogRead.currentOffset[volume_id](); }
+  command storage_len_t BlockingLog.getSize[uint8_t volume_id]() { return call LogRead.getSize[volume_id](); }
+  
+  default command error_t LogRead.read[uint8_t volume_id](void* buf, storage_len_t len) { return FAIL; }
+  default command storage_cookie_t LogRead.currentOffset[uint8_t volume_id]() { return SEEK_BEGINNING; }
+  default command error_t LogRead.seek[uint8_t volume_id](storage_cookie_t offset) { return FAIL; }
+  default command storage_len_t LogRead.getSize[uint8_t volume_id]() { return 0; }
+  
+  default command error_t LogWrite.append[uint8_t volume_id](void* buf, storage_len_t len) { return FAIL; }
+  default command storage_cookie_t LogWrite.currentOffset[uint8_t volume_id]() { return SEEK_BEGINNING; }
+  default command error_t LogWrite.erase[uint8_t volume_id]() { return FAIL; }
+  default command error_t LogWrite.sync[uint8_t volume_id]() { return FAIL; }
+}
diff --git a/tos/lib/tosthreads/system/BlockingLogStorageP.nc b/tos/lib/tosthreads/system/BlockingLogStorageP.nc
new file mode 100644
index 00000000..dc04e206
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingLogStorageP.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration BlockingLogStorageP {
+  provides {
+    interface BlockingLog[uint8_t id];
+  }
+  uses {
+    interface LogRead[uint8_t id];
+    interface LogWrite[uint8_t id];
+  }
+}
+
+implementation {
+  components MainC,
+             BlockingLogStorageImplP;
+             
+  MainC.SoftwareInit -> BlockingLogStorageImplP;
+  
+  BlockingLog = BlockingLogStorageImplP;
+  LogRead = BlockingLogStorageImplP;
+  LogWrite = BlockingLogStorageImplP;
+  
+  components SystemCallC,
+             SystemCallQueueC;
+  BlockingLogStorageImplP.SystemCall -> SystemCallC;
+  BlockingLogStorageImplP.SystemCallQueue -> SystemCallQueueC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingReadP.nc b/tos/lib/tosthreads/system/BlockingReadP.nc
new file mode 100644
index 00000000..f933503a
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingReadP.nc
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+generic module BlockingReadP() {
+  provides {
+    interface Init;
+    interface BlockingRead<uint16_t> as BlockingRead[uint8_t client];
+  }
+  uses {
+    interface Read<uint16_t> as Read[uint8_t client];
+    
+    interface SystemCall;
+    interface SystemCallQueue;
+  }
+}
+implementation {
+
+  typedef struct read_params {
+    uint16_t* val;
+    error_t   error;
+  } read_params_t;
+
+  syscall_queue_t read_queue;
+  
+  command error_t Init.init() {
+    call SystemCallQueue.init(&read_queue);
+    return SUCCESS;
+  }
+  
+  /**************************** Read ********************************/
+  void readTask(syscall_t* s) {
+    read_params_t* p = s->params;
+    p->error = call Read.read[s->id]();
+    if(p->error != SUCCESS) {
+      call SystemCall.finish(s);
+    } 
+  }  
+  
+  command error_t BlockingRead.read[uint8_t id](uint16_t* val) {
+    syscall_t s;
+    read_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&read_queue, id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&read_queue, &s);
+    }
+    
+    p.val = val;
+    call SystemCall.start(&readTask, &s, id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&read_queue, &s);
+      return p.error;
+    }
+  }
+  
+  event void Read.readDone[uint8_t id]( error_t result, uint16_t val ) {
+    syscall_t* s = call SystemCallQueue.find(&read_queue, id);
+    read_params_t* p = s->params;
+    *(p->val) = val;
+    p->error = result;
+    call SystemCall.finish(s);  
+  }
+  default command error_t Read.read[uint8_t id]() { return FAIL; }
+
+}
diff --git a/tos/lib/tosthreads/system/BlockingReadStreamP.nc b/tos/lib/tosthreads/system/BlockingReadStreamP.nc
new file mode 100644
index 00000000..adc3fb06
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingReadStreamP.nc
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+generic module BlockingReadStreamP() {
+  provides {
+    interface Init;
+    interface BlockingReadStream<uint16_t> as BlockingReadStream[uint8_t streamClient];
+  }
+  uses {
+    interface ReadStream<uint16_t> as ReadStream[uint8_t streamClient];
+    
+    interface SystemCall;
+    interface SystemCallQueue;
+  }
+}
+implementation {
+
+  typedef struct readstream_params {
+    uint32_t* usPeriod;
+    uint16_t* buf;
+    uint16_t* count;
+    error_t   error;
+  } readstream_params_t;
+
+  syscall_queue_t readstream_queue;
+  
+  command error_t Init.init() {
+    call SystemCallQueue.init(&readstream_queue);
+    return SUCCESS;
+  }
+  
+  /**************************** ReadStream ********************************/
+  void readStreamTask(syscall_t* s) {
+    readstream_params_t* p = s->params;
+    p->error = call ReadStream.postBuffer[s->id](p->buf, *(p->count));
+    if(p->error == SUCCESS)
+      p->error = call ReadStream.read[s->id](*(p->usPeriod));
+    if(p->error != SUCCESS)
+      call SystemCall.finish(s);
+  }
+  
+  command error_t BlockingReadStream.read[uint8_t id](uint32_t* usPeriod, uint16_t* buf, uint16_t count) {
+    syscall_t s;
+    readstream_params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&readstream_queue, id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&readstream_queue, &s);
+    }
+    
+    p.usPeriod = usPeriod;
+    p.buf = buf;
+    p.count = &count;
+    call SystemCall.start(&readStreamTask, &s, id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&readstream_queue, &s);
+      return p.error;
+    }
+  }
+  
+  event void ReadStream.bufferDone[uint8_t id](error_t result, 
+			 uint16_t* buf, uint16_t count) {
+    //Should never get here!!!!!!
+  }
+			 
+  event void ReadStream.readDone[uint8_t id](error_t result, uint32_t usPeriod) {
+    syscall_t* s = call SystemCallQueue.find(&readstream_queue, id);
+    readstream_params_t* p = s->params;
+    *(p->usPeriod) = usPeriod;
+    p->error = result;
+    call SystemCall.finish(s);  
+  }
+  default command error_t ReadStream.read[uint8_t id](uint32_t usPeriod) { return FAIL; }
+}
diff --git a/tos/lib/tosthreads/system/BlockingResourceC.nc b/tos/lib/tosthreads/system/BlockingResourceC.nc
new file mode 100644
index 00000000..e7a4532e
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingResourceC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+ 
+generic configuration BlockingResourceC() {
+  provides {
+    interface BlockingResource;
+  }
+  uses {
+    interface Resource;
+  }
+}
+
+implementation {
+  components new BlockingResourceP();
+  BlockingResource = BlockingResourceP;
+  Resource = BlockingResourceP;
+  
+  components ThreadSleepC;
+  BlockingResourceP.ThreadSleep -> ThreadSleepC;
+  
+  components SystemCallC;
+  components TinyThreadSchedulerC;
+  BlockingResourceP.SystemCall -> SystemCallC;
+  BlockingResourceP.ThreadScheduler -> TinyThreadSchedulerC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingResourceP.nc b/tos/lib/tosthreads/system/BlockingResourceP.nc
new file mode 100644
index 00000000..2821185e
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingResourceP.nc
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+generic module BlockingResourceP() {
+  provides {
+    interface BlockingResource;
+  }
+  uses {
+    interface SystemCall;
+    interface ThreadScheduler;
+    interface Resource;
+    interface ThreadSleep;
+  }
+}
+implementation {
+  typedef struct params {
+    error_t   error;
+  } params_t;
+  
+  syscall_t* resource_call = NULL;
+  
+  /**************************** Request ********************************/
+  void requestTask(syscall_t* s) {
+    params_t* p = s->params;
+    p->error = call Resource.request();
+    if(p->error != SUCCESS)
+      call SystemCall.finish(s);
+  }  
+  
+  command error_t BlockingResource.request() {
+    syscall_t s;
+    params_t p;
+    atomic {
+      if(resource_call != NULL)
+        return EBUSY;
+      resource_call = &s;
+    }
+    
+    call SystemCall.start(requestTask, &s, INVALID_ID, &p);
+    
+    atomic {
+      resource_call = NULL;
+      return p.error;
+    }  
+  }
+  
+  event void Resource.granted() {
+    params_t* p = resource_call->params;
+    p->error = SUCCESS;
+    call SystemCall.finish(resource_call);
+  }
+  
+  /**************************** Release ********************************/
+  void releaseTask(syscall_t* s) {
+    params_t* p = s->params;
+    p->error = call Resource.release();
+    call SystemCall.finish(s);
+  }  
+  
+  command error_t BlockingResource.release() {
+    syscall_t s;
+    params_t p;
+    atomic {
+      if(resource_call != NULL)
+        return EBUSY;
+      resource_call = &s;
+    }
+    
+    call SystemCall.start(releaseTask, &s, INVALID_ID, &p);
+    
+    atomic {
+      resource_call = NULL;
+      return p.error;
+    }  
+  }
+  
+  /************************* Timed Release *****************************/
+  command error_t BlockingResource.timedRelease(uint32_t milli) {
+    syscall_t s;
+    params_t p;
+    atomic {
+      if(resource_call != NULL)
+        return EBUSY;
+      resource_call = &s;
+    }
+    
+    if(milli != 0)
+      call ThreadSleep.sleep(milli);
+
+    call SystemCall.start(releaseTask, &s, INVALID_ID, &p); 
+    if(p.error == SUCCESS)
+      call SystemCall.start(requestTask, &s, INVALID_ID, &p); 
+    
+    atomic {
+      resource_call = NULL;
+      return p.error;
+    }  
+  }
+  
+  /************************* isOwner pass through *****************************/
+  command error_t BlockingResource.isOwner() {
+    return call Resource.isOwner();
+  }
+}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/tos/lib/tosthreads/system/BlockingSendC.nc b/tos/lib/tosthreads/system/BlockingSendC.nc
new file mode 100644
index 00000000..b1a644ad
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingSendC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#define UQ_BLOCKING_SEND "Blocking.Send"
+
+generic configuration BlockingSendC() {
+  provides {
+    interface BlockingSend;
+  }
+  uses {
+    interface Send;
+  }
+}
+
+implementation {
+  enum {
+    CLIENT_ID = unique(UQ_BLOCKING_SEND),
+  };
+
+  components BlockingSendP;
+  
+  BlockingSend = BlockingSendP.BlockingSend[CLIENT_ID];
+  Send = BlockingSendP.Send[CLIENT_ID];
+}
diff --git a/tos/lib/tosthreads/system/BlockingSendImplP.nc b/tos/lib/tosthreads/system/BlockingSendImplP.nc
new file mode 100644
index 00000000..1f99932b
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingSendImplP.nc
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#include "message.h"
+
+module BlockingSendImplP {
+  provides {
+    interface Init;
+    interface BlockingSend[uint8_t id];
+  }
+  uses {
+    interface Send[uint8_t id];
+    interface SystemCall;
+    interface SystemCallQueue;
+  }
+}
+
+implementation {
+
+  typedef struct params {
+    message_t* msg;
+    uint8_t len;
+    error_t error;
+  } params_t;
+
+  syscall_queue_t send_queue;
+ 
+  command error_t Init.init() {
+    call SystemCallQueue.init(&send_queue);
+    return SUCCESS;
+  }
+  
+  void sendTask(syscall_t* s) {
+    params_t* p = s->params;
+    p->error = call Send.send[s->id](p->msg, p->len);
+    if(p->error != SUCCESS)
+      call SystemCall.finish(s);
+  }  
+  
+  command error_t BlockingSend.send[uint8_t id](message_t* msg, uint8_t len) {
+    syscall_t s;
+    params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&send_queue, id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&send_queue, &s);
+    }
+    
+    p.msg = msg;
+    p.len = len;
+    call SystemCall.start(&sendTask, &s, id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&send_queue, &s);
+      return p.error;
+    }
+  }
+  
+  event void Send.sendDone[uint8_t id](message_t* msg, error_t error) {
+    syscall_t* s = call SystemCallQueue.find(&send_queue, id);
+    params_t* p = s->params;    
+    p->error = error;
+    call SystemCall.finish(s);
+  }
+  
+  command uint8_t BlockingSend.maxPayloadLength[uint8_t id]() {
+    return call Send.maxPayloadLength[id]();
+  }
+  
+  command void* BlockingSend.getPayload[uint8_t id](message_t* msg, uint8_t len) {
+    return call Send.getPayload[id](msg, len);
+  }
+  
+  default command error_t Send.send[uint8_t id](message_t* msg, uint8_t len) { return FAIL; }
+  default command uint8_t Send.maxPayloadLength[uint8_t id]() { return 0; }
+  default command void* Send.getPayload[uint8_t id](message_t* msg, uint8_t len) { return NULL; }
+}
diff --git a/tos/lib/tosthreads/system/BlockingSendP.nc b/tos/lib/tosthreads/system/BlockingSendP.nc
new file mode 100644
index 00000000..7a98965b
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingSendP.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+configuration BlockingSendP {
+  provides {
+    interface BlockingSend[uint8_t id];
+  }
+  uses {
+    interface Send[uint8_t id];
+  }
+}
+
+implementation {
+  components MainC,
+             SystemCallC,
+             SystemCallQueueC,
+             BlockingSendImplP;
+  
+  MainC.SoftwareInit -> BlockingSendImplP;
+
+  BlockingSend = BlockingSendImplP;
+  Send = BlockingSendImplP;
+  
+  BlockingSendImplP.SystemCallQueue -> SystemCallQueueC;
+  BlockingSendImplP.SystemCall -> SystemCallC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingSerialAMReceiverC.nc b/tos/lib/tosthreads/system/BlockingSerialAMReceiverC.nc
new file mode 100644
index 00000000..7ec4d389
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingSerialAMReceiverC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "AM.h"
+
+generic configuration BlockingSerialAMReceiverC(am_id_t amId) {
+  provides {
+    interface BlockingReceive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+implementation {
+  components BlockingSerialActiveMessageC as AM;
+  BlockingReceive = AM.BlockingReceive[amId];
+  
+  Packet = AM;
+  AMPacket = AM;
+}
diff --git a/tos/lib/tosthreads/system/BlockingSerialAMReceiverP.nc b/tos/lib/tosthreads/system/BlockingSerialAMReceiverP.nc
new file mode 100644
index 00000000..30dd5470
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingSerialAMReceiverP.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "AM.h"
+#include "thread.h"
+
+configuration BlockingSerialAMReceiverP {
+  provides {
+    interface BlockingReceive[uint8_t id];
+    interface BlockingReceive as BlockingReceiveAny;
+  }
+  uses {
+    interface Receive[uint8_t id];
+  }
+}
+implementation {
+  components MainC;
+  components SerialActiveMessageC as AM;
+  components new BlockingAMReceiverImplP();
+  
+  MainC.SoftwareInit -> BlockingAMReceiverImplP;
+
+  BlockingReceive = BlockingAMReceiverImplP;
+  BlockingReceiveAny = BlockingAMReceiverImplP;
+  Receive = BlockingAMReceiverImplP;
+  BlockingAMReceiverImplP.Packet -> AM;
+  
+  components SystemCallC;
+  components SystemCallQueueC;
+  components TinyThreadSchedulerC;
+  BlockingAMReceiverImplP.SystemCallQueue -> SystemCallQueueC;
+  BlockingAMReceiverImplP.SystemCall -> SystemCallC;
+  BlockingAMReceiverImplP.ThreadScheduler -> TinyThreadSchedulerC;
+
+  components ThreadTimersC;
+  BlockingAMReceiverImplP.Timer -> ThreadTimersC;
+  
+  components LedsC;
+  BlockingAMReceiverImplP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingSerialAMSenderC.nc b/tos/lib/tosthreads/system/BlockingSerialAMSenderC.nc
new file mode 100644
index 00000000..b866dea1
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingSerialAMSenderC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "AM.h"
+
+generic configuration BlockingSerialAMSenderC(am_id_t AMId) {
+  provides {
+    interface BlockingAMSend;
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+
+implementation {
+  components BlockingSerialActiveMessageC as AM;
+  BlockingAMSend = AM.BlockingAMSend[AMId];
+  
+  Packet = AM;
+  AMPacket = AM;
+  Acks = AM;
+}
diff --git a/tos/lib/tosthreads/system/BlockingSerialAMSenderP.nc b/tos/lib/tosthreads/system/BlockingSerialAMSenderP.nc
new file mode 100644
index 00000000..e0e36c8e
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingSerialAMSenderP.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#include "AM.h"
+#include "thread.h"
+#include "mutex.h"
+
+configuration BlockingSerialAMSenderP {
+  provides {
+    interface BlockingAMSend[am_id_t amId];
+  }
+  uses {
+    interface AMSend[am_id_t amId];
+  }
+}
+
+implementation {
+  components MainC;
+  components SerialActiveMessageC as AM;
+  components new BlockingAMSenderImplP();
+  components MutexC;
+  components SystemCallC;
+  components LedsC;
+  
+  MainC.SoftwareInit -> BlockingAMSenderImplP;
+  
+  BlockingAMSend = BlockingAMSenderImplP;
+  AMSend = BlockingAMSenderImplP;
+  BlockingAMSenderImplP.Mutex -> MutexC;
+  BlockingAMSenderImplP.SystemCall -> SystemCallC;
+  BlockingAMSenderImplP.Packet -> AM;
+  BlockingAMSenderImplP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/BlockingSerialActiveMessageC.nc b/tos/lib/tosthreads/system/BlockingSerialActiveMessageC.nc
new file mode 100644
index 00000000..69c12ec7
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingSerialActiveMessageC.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+configuration BlockingSerialActiveMessageC {
+  provides {
+    interface BlockingStdControl;
+    interface BlockingReceive[uint8_t id];
+    interface BlockingReceive as BlockingReceiveAny;
+    interface BlockingAMSend[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components SerialActiveMessageC as AM;
+  components new BlockingStdControlC();
+  components BlockingSerialAMReceiverP as AMReceiverP;
+  components BlockingSerialAMSenderP as AMSenderP;
+  
+  BlockingStdControl = BlockingStdControlC;
+  BlockingReceive = AMReceiverP;
+  BlockingReceiveAny = AMReceiverP;
+  BlockingAMSend = AMSenderP;
+  
+  BlockingStdControlC.SplitControl -> AM;
+  AMReceiverP.Receive -> AM.ReceiveDefault;
+  AMSenderP.AMSend -> AM.AMSend;
+    
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+}
diff --git a/tos/lib/tosthreads/system/BlockingStdControlC.nc b/tos/lib/tosthreads/system/BlockingStdControlC.nc
new file mode 100644
index 00000000..093017c4
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingStdControlC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+ 
+#define UQ_BLOCKING_STD_CONTROL "Blocking.StdControl"
+generic configuration BlockingStdControlC() {
+  provides {
+    interface BlockingStdControl;
+  }
+  uses {
+    interface SplitControl;
+  }
+}
+
+implementation {
+  
+  enum {
+    CLIENT_ID = unique(UQ_BLOCKING_STD_CONTROL),
+  };
+
+  components BlockingStdControlP;
+  BlockingStdControl = BlockingStdControlP.BlockingStdControl[CLIENT_ID];
+  SplitControl = BlockingStdControlP.SplitControl[CLIENT_ID];
+}
diff --git a/tos/lib/tosthreads/system/BlockingStdControlImplP.nc b/tos/lib/tosthreads/system/BlockingStdControlImplP.nc
new file mode 100644
index 00000000..e19fb9e7
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingStdControlImplP.nc
@@ -0,0 +1,142 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+module BlockingStdControlImplP {
+  provides {
+    interface Init;
+    interface BlockingStdControl[uint8_t id];
+  }
+  uses {
+    interface SplitControl[uint8_t id];
+    interface SystemCall;
+    interface SystemCallQueue;
+    interface Leds;
+  }
+}
+
+implementation {
+
+  typedef struct params {
+    error_t error;
+  } params_t;
+
+  syscall_queue_t std_cntrl_queue;
+ 
+  command error_t Init.init() {
+    call SystemCallQueue.init(&std_cntrl_queue);
+    return SUCCESS;
+  }
+  
+  /**************************** Start ********************************/
+  void startTask(syscall_t* s) {
+    params_t* p = s->params;
+    p->error = call SplitControl.start[s->id]();
+    if(p->error != SUCCESS)
+      call SystemCall.finish(s);
+  }  
+  
+  command error_t BlockingStdControl.start[uint8_t id]() {
+    syscall_t s;
+    params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&std_cntrl_queue, id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&std_cntrl_queue, &s);
+    }
+    
+    call SystemCall.start(&startTask, &s, id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&std_cntrl_queue, &s);
+      return p.error;
+    }
+  }
+  
+  event void SplitControl.startDone[uint8_t id](error_t error) {
+    syscall_t* s = call SystemCallQueue.find(&std_cntrl_queue, id);
+    params_t* p = s->params;    
+    p->error = error;
+    call SystemCall.finish(s);
+  }
+  
+  /**************************** Stop ********************************/
+  void stopTask(syscall_t* s) {
+    params_t* p = s->params;
+    p->error = call SplitControl.stop[s->id]();
+    if(p->error != SUCCESS)
+      call SystemCall.finish(s);
+  }
+  
+  command error_t BlockingStdControl.stop[uint8_t id]() {
+    syscall_t s;
+    params_t p;
+    atomic {
+      if(call SystemCallQueue.find(&std_cntrl_queue, id) != NULL)
+        return EBUSY;
+      call SystemCallQueue.enqueue(&std_cntrl_queue, &s);
+    }
+    
+    call SystemCall.start(&stopTask, &s, id, &p);
+    
+    atomic {
+      call SystemCallQueue.remove(&std_cntrl_queue, &s);
+      return p.error;
+    }
+  }
+  
+  event void SplitControl.stopDone[uint8_t id](error_t error) {
+    syscall_t* s = call SystemCallQueue.find(&std_cntrl_queue, id);
+    params_t* p = s->params;
+    p->error = error;
+    call SystemCall.finish(s);
+  }
+  default command error_t SplitControl.start[uint8_t id]() { return FAIL; }
+  default command error_t SplitControl.stop[uint8_t id]() { return FAIL; }
+}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/tos/lib/tosthreads/system/BlockingStdControlP.nc b/tos/lib/tosthreads/system/BlockingStdControlP.nc
new file mode 100644
index 00000000..8b1e86e7
--- /dev/null
+++ b/tos/lib/tosthreads/system/BlockingStdControlP.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+configuration BlockingStdControlP {
+  provides {
+    interface BlockingStdControl[uint8_t id];
+  }
+  uses {
+    interface SplitControl[uint8_t id];
+  }
+}
+
+implementation {
+  components MainC;
+  components BlockingStdControlImplP;
+  components LedsC;
+  
+  MainC.SoftwareInit -> BlockingStdControlImplP;
+
+  BlockingStdControl = BlockingStdControlImplP;
+  SplitControl = BlockingStdControlImplP;
+  
+  BlockingStdControlImplP.Leds -> LedsC;
+  
+  components SystemCallC;
+  components SystemCallQueueC;
+  BlockingStdControlImplP.SystemCallQueue -> SystemCallQueueC;
+  BlockingStdControlImplP.SystemCall -> SystemCallC;
+
+}
diff --git a/tos/lib/tosthreads/system/ConditionVariableC.nc b/tos/lib/tosthreads/system/ConditionVariableC.nc
new file mode 100644
index 00000000..17da9691
--- /dev/null
+++ b/tos/lib/tosthreads/system/ConditionVariableC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This is the barrier implementation.  Every barrier has a pointer to 
+ * a linked list of threads.  When a thread calls block() on a barrier 
+ * it is pushed onto the thread queue associated with that barrier and
+ * it is blocked.  Once some thread calls unblock() on a particular 
+ * barrier, all threads on that barrier's thread queue are popped off 
+ * and woken up. 
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "thread.h"
+#include "condvar.h"
+
+configuration ConditionVariableC {
+  provides {
+    interface ConditionVariable;
+  }
+}
+implementation {
+  components TinyThreadSchedulerC;
+  components ThreadQueueC;
+  components MutexC;
+  components ConditionVariableP;
+  
+  ConditionVariable = ConditionVariableP;
+  ConditionVariableP.ThreadScheduler -> TinyThreadSchedulerC;
+  ConditionVariableP.ThreadQueue -> ThreadQueueC;
+  ConditionVariableP.Mutex -> MutexC;
+  
+  components LedsC;
+  ConditionVariableP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/ConditionVariableP.nc b/tos/lib/tosthreads/system/ConditionVariableP.nc
new file mode 100644
index 00000000..7220eb52
--- /dev/null
+++ b/tos/lib/tosthreads/system/ConditionVariableP.nc
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * This is the barrier implementation.  Every barrier has a pointer to 
+ * a linked list of threads.  When a thread calls block() on a barrier 
+ * it is pushed onto the thread queue associated with that barrier and
+ * it is blocked.  Once some thread calls unblock() on a particular 
+ * barrier, all threads on that barrier's thread queue are popped off 
+ * and woken up. 
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module ConditionVariableP {
+  provides {
+    interface ConditionVariable;
+  }
+  uses {
+    interface ThreadScheduler;
+    interface ThreadQueue;
+    interface Mutex;
+    interface Leds;
+  }
+}
+
+implementation {
+  command void ConditionVariable.init(condvar_t* c) {
+    //Initialize the thread queue associated with this condition variable.
+    call ThreadQueue.init(&(c->thread_queue));  
+  }
+  command void ConditionVariable.wait(condvar_t* c, mutex_t* m) {
+    atomic {
+      //Push the thread that just called wait() onto the thread queue associated with 
+      //  this condition variable
+      call ThreadQueue.enqueue(&(c->thread_queue), call ThreadScheduler.currentThreadInfo());
+      call Mutex.unlock(m);
+      call ThreadScheduler.suspendCurrentThread();
+      call Mutex.lock(m);
+    }
+  }
+  command void ConditionVariable.signalNext(condvar_t* c) {
+    atomic {
+      thread_t* t;
+      //Pop all threads currently blocking on this barrier from its thread queue
+      if((t = call ThreadQueue.dequeue(&(c->thread_queue))) != NULL) {
+        call ThreadScheduler.wakeupThread(t->id);
+      }
+    }
+  }
+  command void ConditionVariable.signalAll(condvar_t* c) {
+    atomic {
+      thread_t* t;
+      //Pop all threads currently blocking on this barrier from its thread queue
+      while((t = call ThreadQueue.dequeue(&(c->thread_queue))) != NULL) {
+        call ThreadScheduler.wakeupThread(t->id);
+      }
+    }
+  }
+  command bool ConditionVariable.isBlocking(condvar_t* c) {
+    atomic return !(call ThreadQueue.isEmpty(&(c->thread_queue)));
+;
+  }
+}
diff --git a/tos/lib/tosthreads/system/DynamicThreadC.nc b/tos/lib/tosthreads/system/DynamicThreadC.nc
new file mode 100644
index 00000000..462084ba
--- /dev/null
+++ b/tos/lib/tosthreads/system/DynamicThreadC.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "thread.h"
+
+configuration DynamicThreadC {
+  provides {
+    interface DynamicThread;
+    interface ThreadNotification[uint8_t id];
+  }
+}
+implementation {
+  components DynamicThreadP;
+  components TinyThreadSchedulerC;
+  components BitArrayUtilsC;
+  components ThreadSleepC;
+  components TosMallocC;
+  
+  DynamicThread = DynamicThreadP;
+  ThreadNotification = DynamicThreadP.ThreadNotification;
+  
+  DynamicThreadP.ThreadSleep -> ThreadSleepC;
+  DynamicThreadP.ThreadScheduler -> TinyThreadSchedulerC;
+  DynamicThreadP.BitArrayUtils -> BitArrayUtilsC;
+  DynamicThreadP.Malloc -> TosMallocC;
+  
+  components ThreadMapC;
+  ThreadMapC.DynamicThreadInfo -> DynamicThreadP;
+  DynamicThreadP.ThreadCleanup -> ThreadMapC.DynamicThreadCleanup;
+  
+  components LedsC;
+  DynamicThreadP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/DynamicThreadP.nc b/tos/lib/tosthreads/system/DynamicThreadP.nc
new file mode 100644
index 00000000..de03f20d
--- /dev/null
+++ b/tos/lib/tosthreads/system/DynamicThreadP.nc
@@ -0,0 +1,162 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+ 
+#include "thread.h"
+
+module DynamicThreadP {
+  provides {
+    interface DynamicThread;
+    interface ThreadInfo[uint8_t];
+    interface ThreadNotification[uint8_t];
+  }
+  uses {
+    interface ThreadCleanup[uint8_t];
+    interface ThreadScheduler;
+    interface ThreadSleep;
+    interface BitArrayUtils;
+    interface Malloc;
+    interface Leds;
+  }
+}
+implementation {
+  thread_t* thread_info[TOSTHREAD_MAX_DYNAMIC_THREADS];
+  uint8_t* stack_heads[TOSTHREAD_MAX_DYNAMIC_THREADS];
+  uint8_t thread_map[((TOSTHREAD_MAX_DYNAMIC_THREADS - 1) / 8 + 1)];
+  thread_id_t last_id_given = -1;
+  
+  enum {
+    THREAD_OVERFLOW = TOSTHREAD_MAX_DYNAMIC_THREADS,
+  };
+  
+  thread_id_t getNextId() {
+    thread_id_t i;
+    for(i=last_id_given+1; i<TOSTHREAD_MAX_DYNAMIC_THREADS; i++) {
+      if(call BitArrayUtils.getBit(thread_map, i) == 0)
+        goto happy;
+    }
+    for(i=0; i<last_id_given; i++) {
+      if(call BitArrayUtils.getBit(thread_map, i) == 0)
+        goto happy; 
+    }
+    return THREAD_OVERFLOW;
+happy: 
+    last_id_given = i;
+    return i;
+  }
+  
+  error_t init(tosthread_t* t, void (*start_routine)(void*), void* arg, uint16_t stack_size) {
+    void* temp;
+    *t = getNextId();
+    if(*t != THREAD_OVERFLOW) {
+      if((temp = call Malloc.malloc(sizeof(thread_t) + stack_size)) != NULL) {
+        thread_info[*t] = temp;
+        stack_heads[*t] = &(((uint8_t*)temp)[sizeof(thread_t)]);
+      }
+      else return FAIL;
+      call BitArrayUtils.setBit(thread_map, *t);
+      thread_info[*t]->next_thread = NULL; 
+      thread_info[*t]->id = *t + TOSTHREAD_NUM_STATIC_THREADS;
+      thread_info[*t]->init_block = NULL;
+      thread_info[*t]->stack_ptr = (stack_ptr_t)(STACK_TOP(stack_heads[*t], stack_size));
+      thread_info[*t]->state = TOSTHREAD_STATE_INACTIVE;
+      thread_info[*t]->mutex_count = 0;
+      thread_info[*t]->start_ptr = start_routine;
+      thread_info[*t]->start_arg_ptr = arg;
+      thread_info[*t]->syscall = NULL;
+      memset(&(thread_info[*t]->regs), 0, sizeof(thread_regs_t));
+      *t += TOSTHREAD_NUM_STATIC_THREADS;
+      return call ThreadScheduler.initThread(*t);
+    }
+    return FAIL;
+  }
+
+  command error_t DynamicThread.create(tosthread_t* t, void (*start_routine)(void*), void* arg, uint16_t stack_size) {
+   atomic {
+     if(init(t, start_routine, arg, stack_size) == SUCCESS ) {
+        error_t e = call ThreadScheduler.startThread(*t);
+        if(e == SUCCESS)
+         signal ThreadNotification.justCreated[*t]();
+        return e;
+      }
+    }
+    return FAIL;
+  }
+  command error_t DynamicThread.destroy(tosthread_t* t) {
+    atomic {
+      if(call ThreadScheduler.stopThread(*t) == SUCCESS) {
+         signal ThreadCleanup.cleanup[*t]();
+         return SUCCESS;
+      }
+    }
+    return FAIL;
+  }
+  command error_t DynamicThread.pause(tosthread_t* t) {
+    if(call BitArrayUtils.getBit(thread_map, *t-TOSTHREAD_NUM_STATIC_THREADS) == TRUE) {
+      return call ThreadScheduler.stopThread(*t);
+    }
+    return FAIL;
+  }
+  command error_t DynamicThread.resume(tosthread_t* t) {
+    if(call BitArrayUtils.getBit(thread_map, *t-TOSTHREAD_NUM_STATIC_THREADS) == TRUE) {
+      return call ThreadScheduler.startThread(*t);
+    }
+    return FAIL;  
+  }
+  command error_t DynamicThread.sleep(uint32_t milli) {
+    return call ThreadSleep.sleep(milli);
+  }
+  command error_t DynamicThread.join(tosthread_t* t) {
+    return call ThreadScheduler.joinThread(*t);
+  }
+  
+  async command thread_t* ThreadInfo.get[uint8_t id]() {
+    atomic return thread_info[id - TOSTHREAD_NUM_STATIC_THREADS];
+  }
+  
+  async command error_t ThreadInfo.reset[uint8_t id]() {
+    return FAIL;
+  }
+  
+  async event void ThreadCleanup.cleanup[uint8_t id]() {
+    signal ThreadNotification.aboutToDestroy[id]();
+    atomic {
+      uint8_t adjusted_id = id-TOSTHREAD_NUM_STATIC_THREADS;
+      call Malloc.free(thread_info[adjusted_id]);
+      call BitArrayUtils.clrBit(thread_map, adjusted_id);
+    }
+  }
+  default async event void ThreadNotification.justCreated[uint8_t id]() {}
+  default async event void ThreadNotification.aboutToDestroy[uint8_t id]() {}
+}
diff --git a/tos/lib/tosthreads/system/LinkedListC.nc b/tos/lib/tosthreads/system/LinkedListC.nc
new file mode 100644
index 00000000..dd6e3c34
--- /dev/null
+++ b/tos/lib/tosthreads/system/LinkedListC.nc
@@ -0,0 +1,216 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "linked_list.h"
+
+module LinkedListC {
+  provides interface LinkedList;
+}
+implementation {
+  list_element_t* get_elementAt(linked_list_t* l, uint8_t i) {
+    if(i >= (l->size)) return NULL;
+    else if((l->head) == NULL) return NULL;
+    else {
+      list_element_t* temp = (l->head); 
+      while(i-- > 0) {
+        temp = temp->next;
+      }
+      return temp;
+    }
+  }
+  
+  list_element_t* get_element(linked_list_t* l, list_element_t* e) {
+    list_element_t* temp = (l->head);
+    while(temp != NULL) {
+      if(temp == e) return temp;
+      temp = temp->next;
+    }
+    return NULL;
+  }
+  
+  list_element_t* get_element_before(linked_list_t* l, list_element_t* e) {
+    list_element_t* temp = (l->head);
+    if(temp == NULL) return NULL;
+    while(temp->next != NULL) {
+      if(temp->next == e) return temp;;
+      temp = temp->next;
+    }
+    return NULL;
+  }
+  
+  list_element_t* get_element_2before(linked_list_t* l, list_element_t* e) {
+    list_element_t* temp = (l->head);
+    if(temp == NULL) return NULL;
+    if(temp->next == NULL) return NULL;
+    while(temp->next->next != NULL) {
+      if(temp->next->next == e) return temp;
+      temp = temp->next->next;
+    }
+    return NULL;
+  }
+  
+  error_t insert_element(linked_list_t* l, list_element_t** previous_next, list_element_t* e) {
+    if(e == NULL) return FAIL;
+    e->next = *previous_next;
+    *previous_next = e;
+    (l->size)++;
+    return SUCCESS;
+  }
+  
+  list_element_t* remove_element(linked_list_t* l, list_element_t** previous_next) {
+    list_element_t* e = (*previous_next);
+    *previous_next = (*previous_next)->next;
+    e->next = NULL;
+    (l->size)--;
+    return e;
+  }
+
+  async command void LinkedList.init(linked_list_t* l) {
+    l->head = NULL; 
+    l->size = 0;
+  }
+  async command void LinkedList.clear(linked_list_t* l) {
+    list_element_t* temp = (l->head);
+    while(temp != NULL)
+      remove_element(l, &temp);
+    l->head = NULL;
+    l->size = 0;
+  }
+  async command uint8_t LinkedList.size(linked_list_t* l) {
+    return (l->size);
+  }
+  async command error_t LinkedList.addFirst(linked_list_t* l, list_element_t* e) {
+    return insert_element(l, &(l->head), e);
+  }
+  async command list_element_t* LinkedList.getFirst(linked_list_t* l) {
+    if((l->head) == NULL) return NULL;
+    return (l->head);
+  }
+  async command list_element_t* LinkedList.removeFirst(linked_list_t* l) {
+    if((l->head) == NULL) return NULL;
+    else return remove_element(l, &(l->head));
+  }
+  async command error_t LinkedList.addLast(linked_list_t* l, list_element_t* e) {
+    return call LinkedList.addAt(l, e, (l->size));
+  }
+  async command list_element_t* LinkedList.getLast(linked_list_t* l) {
+    return get_elementAt(l, (l->size)-1);
+  }
+  async command list_element_t* LinkedList.removeLast(linked_list_t* l) {
+    return call LinkedList.removeAt(l, (l->size)-1);
+  }
+  async command error_t LinkedList.addAt(linked_list_t* l, list_element_t* e, uint8_t i) {
+    if(i > (l->size)) return FAIL;
+    else if(i == 0)
+      return insert_element(l, &(l->head), e);
+    else {
+      list_element_t* temp = get_elementAt(l, i-1);
+      return insert_element(l, &(temp->next), e);
+    }
+  }
+  async command list_element_t* LinkedList.getAt(linked_list_t* l, uint8_t i) {
+    list_element_t* temp = get_elementAt(l, i);
+    if(temp == NULL) return NULL;
+    return temp;
+  }
+  async command list_element_t* LinkedList.removeAt(linked_list_t* l, uint8_t i) {
+    if(i == 0)
+      return call LinkedList.removeFirst(l);
+    else {
+      list_element_t* temp = get_elementAt(l, i-1);
+      if(temp == NULL) return NULL;
+      else return remove_element(l, &(temp->next));
+    }
+  }
+  async command error_t LinkedList.addAfter(linked_list_t* l, list_element_t* first, list_element_t* second) {
+    list_element_t* temp = get_element(l, first);
+    if(temp == NULL) return FAIL;
+    else return insert_element(l, &(temp->next), second);
+  }
+  async command error_t LinkedList.addBefore(linked_list_t* l, list_element_t* first, list_element_t* e) {
+    list_element_t* temp;
+    if((l->head) == NULL) return FAIL;
+    if((l->head) == first) return insert_element(l, &(l->head), e);
+  
+    temp = get_element_before(l, first);
+    if(temp == NULL) return FAIL;
+    else return insert_element(l, &(temp->next), e);
+  }
+  async command list_element_t* LinkedList.getAfter(linked_list_t* l, list_element_t* e) {
+    list_element_t* temp = get_element(l, e);
+    if(temp == NULL) return NULL;
+    if(temp->next == NULL) return NULL;
+    return temp->next;
+  }
+  async command list_element_t* LinkedList.getBefore(linked_list_t* l, list_element_t* e) {
+    list_element_t* temp = get_element_before(l, e);
+    if(temp == NULL) return NULL;
+    return temp;
+  }
+  async command list_element_t* LinkedList.remove(linked_list_t* l, list_element_t* e) {
+    list_element_t* temp;
+    if((l->head) == NULL) return NULL;
+    if((l->head) == e) return remove_element(l, &(l->head));
+    
+    temp = get_element_before(l, e);
+    if(temp == NULL) return NULL;
+    else return remove_element(l, &(temp->next));
+  }
+  async command list_element_t* LinkedList.removeBefore(linked_list_t* l, list_element_t* e) {
+    list_element_t* temp;
+    if((l->head) == NULL) return NULL;
+    if((l->head)->next == NULL) return NULL;
+    if((l->head)->next == e) return remove_element(l, &(l->head));
+    
+    temp = get_element_2before(l, e);
+    if(temp == NULL) return NULL;
+    else return remove_element(l, &(temp->next));
+  }
+  async command list_element_t* LinkedList.removeAfter(linked_list_t* l, list_element_t* e) {
+    list_element_t* temp = get_element(l, e);
+    if(temp == NULL) return NULL;
+    else return remove_element(l, &(temp->next));
+  }
+  async command uint8_t LinkedList.indexOf(linked_list_t* l, list_element_t* e) {
+    int i = -1;
+    list_element_t* temp = (l->head);
+    while(temp != NULL) {
+      i++;
+      if(temp == e) break;
+      temp = temp->next;
+    }
+    return i;
+  }
+}
diff --git a/tos/lib/tosthreads/system/MainC.nc b/tos/lib/tosthreads/system/MainC.nc
new file mode 100644
index 00000000..c2388bfb
--- /dev/null
+++ b/tos/lib/tosthreads/system/MainC.nc
@@ -0,0 +1,90 @@
+/*                                     
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Date last modified:  $Id: MainC.nc,v 1.4 2010-06-29 22:07:52 scipio Exp $
+ */
+
+/**
+ * MainC is the system interface the TinyOS boot sequence. It wires the
+ * boot sequence implementation to the scheduler and hardware resources.
+ *
+ * @author Philip Levis
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "hardware.h"
+
+configuration MainC {
+  provides interface Boot;
+  uses {
+    interface Init as SoftwareInit;
+  }
+}
+implementation {
+  components PlatformC;
+  components TinyOSMainP;
+  components RealMainP;
+  
+  components TinyTaskSchedulerC;
+  components TinyThreadSchedulerC;
+  components StaticThreadC;
+    
+#ifdef SAFE_TINYOS
+  components SafeFailureHandlerC;
+#endif
+
+  // Export the SoftwareInit and Boot for applications
+  SoftwareInit = TinyOSMainP.SoftwareInit;
+  Boot = TinyOSMainP;
+  
+  //Wire up the platform specific code
+  TinyOSMainP.PlatformInit -> PlatformC;
+  TinyOSMainP.TaskScheduler -> TinyTaskSchedulerC;
+  
+  //Wire up the interdependent task and thread schedulers
+  TinyTaskSchedulerC.ThreadScheduler -> TinyThreadSchedulerC;
+  
+  //Wire up the TinyOS code to its thread
+  StaticThreadC.ThreadInfo[TOSTHREAD_TOS_THREAD_ID] -> TinyOSMainP;
+  TinyOSMainP.TinyOSBoot -> TinyThreadSchedulerC;
+  
+  //Wire up the thread scheduler to start running
+  TinyThreadSchedulerC.ThreadSchedulerBoot -> RealMainP;  
+}
+
diff --git a/tos/lib/tosthreads/system/MutexC.nc b/tos/lib/tosthreads/system/MutexC.nc
new file mode 100644
index 00000000..93a13149
--- /dev/null
+++ b/tos/lib/tosthreads/system/MutexC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "thread.h"
+#include "mutex.h"
+
+configuration MutexC {
+  provides {
+    interface Mutex;
+  }
+}
+implementation {
+  components ThreadQueueC;
+  components TinyThreadSchedulerC;
+  components MutexP;
+  
+  Mutex = MutexP;
+  MutexP.ThreadQueue -> ThreadQueueC;
+  MutexP.ThreadScheduler -> TinyThreadSchedulerC;
+}
diff --git a/tos/lib/tosthreads/system/MutexP.nc b/tos/lib/tosthreads/system/MutexP.nc
new file mode 100644
index 00000000..f09701b6
--- /dev/null
+++ b/tos/lib/tosthreads/system/MutexP.nc
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module MutexP {
+  provides {
+    interface Mutex;
+  }
+  uses {
+    interface ThreadQueue;
+    interface ThreadScheduler;
+  }
+}
+
+implementation {
+  command void Mutex.init(mutex_t* m) {
+    m->lock = FALSE;
+    call ThreadQueue.init(&(m->thread_queue));  
+  }
+  
+  command error_t Mutex.lock(mutex_t* m) {
+    atomic {
+      thread_t* t = call ThreadScheduler.currentThreadInfo();
+      if(m->lock == FALSE) {
+        m->lock = TRUE;
+        t->mutex_count++;
+      }
+      else {
+        call ThreadQueue.enqueue(&(m->thread_queue), t);
+        call ThreadScheduler.suspendCurrentThread();
+      }
+      return SUCCESS;
+    }
+  }
+  
+  command error_t Mutex.unlock(mutex_t* m) {
+    atomic {
+      if(m->lock == TRUE) {
+        thread_t* t = call ThreadScheduler.currentThreadInfo();
+        t->mutex_count--;
+        if((t = call ThreadQueue.dequeue(&(m->thread_queue))) != NULL)
+          call ThreadScheduler.wakeupThread(t->id);
+        else m->lock = FALSE;
+      }
+      return SUCCESS;
+    }    
+  }
+}
diff --git a/tos/lib/tosthreads/system/PlatformInterruptC.nc b/tos/lib/tosthreads/system/PlatformInterruptC.nc
new file mode 100644
index 00000000..9131d553
--- /dev/null
+++ b/tos/lib/tosthreads/system/PlatformInterruptC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+
+configuration PlatformInterruptC {
+  provides {
+    interface PlatformInterrupt;
+  }
+}
+implementation {
+  components TinyThreadSchedulerC;
+  components TinyTaskSchedulerC;
+  components TOSThreadsInterruptP;
+
+  PlatformInterrupt = TOSThreadsInterruptP;
+  TOSThreadsInterruptP.ThreadScheduler -> TinyThreadSchedulerC;
+  TOSThreadsInterruptP.TaskScheduler -> TinyTaskSchedulerC;
+}
diff --git a/tos/lib/tosthreads/system/PoolThreadC.nc b/tos/lib/tosthreads/system/PoolThreadC.nc
new file mode 100644
index 00000000..88f5512d
--- /dev/null
+++ b/tos/lib/tosthreads/system/PoolThreadC.nc
@@ -0,0 +1,79 @@
+ 
+/**
+ * @author Jeongyeup Paek (jpaek@enl.usc.edu)
+ */
+
+#include "thread.h"
+#include "poolthread.h"
+
+configuration PoolThreadC {
+  provides {
+    interface PoolThread;
+    interface ThreadNotification[uint8_t id];
+  }
+}
+implementation {
+  components MainC, PoolThreadP, ThreadP;
+  PoolThread         = PoolThreadP;
+  ThreadNotification = ThreadP.StaticThreadNotification;
+
+  components BitArrayUtilsC;
+  PoolThreadP.BitArrayUtils -> BitArrayUtilsC;
+  components ThreadSleepC;
+  PoolThreadP.ThreadSleep -> ThreadSleepC;
+  components TinyThreadSchedulerC;
+  PoolThreadP.ThreadScheduler -> TinyThreadSchedulerC;
+
+#if (NUM_POOL_THREADS > 0)
+  components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread0;
+  PoolThreadP.TinyThread0 -> TinyThread0;
+  PoolThreadP.ThreadInfo0 -> TinyThread0;
+#endif
+#if (NUM_POOL_THREADS > 1)
+  components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread1;
+  PoolThreadP.TinyThread1 -> TinyThread1;
+  PoolThreadP.ThreadInfo1 -> TinyThread1;
+#endif
+#if (NUM_POOL_THREADS > 2)
+  components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread2;
+  PoolThreadP.TinyThread2 -> TinyThread2;
+  PoolThreadP.ThreadInfo2 -> TinyThread2;
+#endif
+#if (NUM_POOL_THREADS > 3)
+  components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread3;
+  PoolThreadP.TinyThread3 -> TinyThread3;
+  PoolThreadP.ThreadInfo3 -> TinyThread3;
+#endif
+#if (NUM_POOL_THREADS > 4)
+  components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread4;
+  PoolThreadP.TinyThread4 -> TinyThread4;
+  PoolThreadP.ThreadInfo4 -> TinyThread4;
+#endif
+#if (NUM_POOL_THREADS > 5)
+  components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread5;
+  PoolThreadP.TinyThread5 -> TinyThread5;
+  PoolThreadP.ThreadInfo5 -> TinyThread5;
+#endif
+#if (NUM_POOL_THREADS > 6)
+  components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread6;
+  PoolThreadP.TinyThread6 -> TinyThread6;
+  PoolThreadP.ThreadInfo6 -> TinyThread6;
+#endif
+#if (NUM_POOL_THREADS > 7)
+  components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread7;
+  PoolThreadP.TinyThread7 -> TinyThread7;
+  PoolThreadP.ThreadInfo7 -> TinyThread7;
+#endif
+#if (NUM_POOL_THREADS > 8)
+  components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread8;
+  PoolThreadP.TinyThread8 -> TinyThread8;
+  PoolThreadP.ThreadInfo8 -> TinyThread8;
+#endif
+#if (NUM_POOL_THREADS > 9)
+  components new ThreadC(POOL_THREAD_STACK_SIZE) as TinyThread9;
+  PoolThreadP.TinyThread9 -> TinyThread9;
+  PoolThreadP.ThreadInfo9 -> TinyThread9;
+#endif
+}
+
+
diff --git a/tos/lib/tosthreads/system/PoolThreadP.nc b/tos/lib/tosthreads/system/PoolThreadP.nc
new file mode 100644
index 00000000..e4018f6d
--- /dev/null
+++ b/tos/lib/tosthreads/system/PoolThreadP.nc
@@ -0,0 +1,352 @@
+ 
+/**
+ * @author Jeongyeup Paek (jpaek@enl.usc.edu)
+ */
+ 
+#include "thread.h"
+#include "poolthread.h"
+
+module PoolThreadP {
+  provides {
+    interface PoolThread;
+  }
+  uses {
+#if (NUM_POOL_THREADS > 0)
+    interface Thread as TinyThread0;
+    interface ThreadInfo as ThreadInfo0;
+#endif
+#if (NUM_POOL_THREADS > 1)
+    interface Thread as TinyThread1;
+    interface ThreadInfo as ThreadInfo1;
+#endif
+#if (NUM_POOL_THREADS > 2)
+    interface Thread as TinyThread2;
+    interface ThreadInfo as ThreadInfo2;
+#endif
+#if (NUM_POOL_THREADS > 3)
+    interface Thread as TinyThread3;
+    interface ThreadInfo as ThreadInfo3;
+#endif
+#if (NUM_POOL_THREADS > 4)
+    interface Thread as TinyThread4;
+    interface ThreadInfo as ThreadInfo4;
+#endif
+#if (NUM_POOL_THREADS > 5)
+    interface Thread as TinyThread5;
+    interface ThreadInfo as ThreadInfo5;
+#endif
+#if (NUM_POOL_THREADS > 6)
+    interface Thread as TinyThread6;
+    interface ThreadInfo as ThreadInfo6;
+#endif
+#if (NUM_POOL_THREADS > 7)
+    interface Thread as TinyThread7;
+    interface ThreadInfo as ThreadInfo7;
+#endif
+#if (NUM_POOL_THREADS > 8)
+    interface Thread as TinyThread8;
+    interface ThreadInfo as ThreadInfo8;
+#endif
+#if (NUM_POOL_THREADS > 9)
+    interface Thread as TinyThread9;
+    interface ThreadInfo as ThreadInfo9;
+#endif
+    interface ThreadSleep;
+    interface BitArrayUtils;
+    interface ThreadScheduler;
+  }
+}
+implementation {
+
+    typedef struct pool_item {
+        thread_t* info;
+    } pool_item_t;
+
+    pool_item_t m_list[NUM_POOL_THREADS];
+    uint8_t thread_map[((NUM_POOL_THREADS - 1) / 8 + 1)];
+
+    enum {
+        THREAD_OVERFLOW = NUM_POOL_THREADS,
+    };
+
+    error_t start_thread(uint8_t id, void* arg) {
+        if (id >= NUM_POOL_THREADS)
+            return FAIL;
+    #if (NUM_POOL_THREADS > 0)
+        if (id == 0) return call TinyThread0.start(arg);
+    #endif
+    #if (NUM_POOL_THREADS > 1)
+        if (id == 1) return call TinyThread1.start(arg);
+    #endif
+    #if (NUM_POOL_THREADS > 2)
+        if (id == 2) return call TinyThread2.start(arg);
+    #endif
+    #if (NUM_POOL_THREADS > 3)
+        if (id == 3) return call TinyThread3.start(arg);
+    #endif
+    #if (NUM_POOL_THREADS > 4)
+        if (id == 4) return call TinyThread4.start(arg);
+    #endif
+    #if (NUM_POOL_THREADS > 5)
+        if (id == 5) return call TinyThread5.start(arg);
+    #endif
+    #if (NUM_POOL_THREADS > 6)
+        if (id == 6) return call TinyThread6.start(arg);
+    #endif
+    #if (NUM_POOL_THREADS > 7)
+        if (id == 7) return call TinyThread7.start(arg);
+    #endif
+    #if (NUM_POOL_THREADS > 8)
+        if (id == 8) return call TinyThread8.start(arg);
+    #endif
+    #if (NUM_POOL_THREADS > 9)
+        if (id == 9) return call TinyThread9.start(arg);
+    #endif
+        return FAIL;
+    }
+
+    error_t stop_thread(uint8_t id) {
+        if (id >= NUM_POOL_THREADS)
+            return FAIL;
+    #if (NUM_POOL_THREADS > 0)
+        if (id == 0) return call TinyThread0.stop();
+    #endif
+    #if (NUM_POOL_THREADS > 1)
+        if (id == 1) return call TinyThread1.stop();
+    #endif
+    #if (NUM_POOL_THREADS > 2)
+        if (id == 2) return call TinyThread2.stop();
+    #endif
+    #if (NUM_POOL_THREADS > 3)
+        if (id == 3) return call TinyThread3.stop();
+    #endif
+    #if (NUM_POOL_THREADS > 4)
+        if (id == 4) return call TinyThread4.stop();
+    #endif
+    #if (NUM_POOL_THREADS > 5)
+        if (id == 5) return call TinyThread5.stop();
+    #endif
+    #if (NUM_POOL_THREADS > 6)
+        if (id == 6) return call TinyThread6.stop();
+    #endif
+    #if (NUM_POOL_THREADS > 7)
+        if (id == 7) return call TinyThread7.stop();
+    #endif
+    #if (NUM_POOL_THREADS > 8)
+        if (id == 8) return call TinyThread8.stop();
+    #endif
+    #if (NUM_POOL_THREADS > 9)
+        if (id == 9) return call TinyThread9.stop();
+    #endif
+        return FAIL;
+    }
+
+    error_t pause_thread(uint8_t id) {
+        if (id >= NUM_POOL_THREADS)
+            return FAIL;
+    #if (NUM_POOL_THREADS > 0)
+        if (id == 0) return call TinyThread0.pause();
+    #endif
+    #if (NUM_POOL_THREADS > 1)
+        if (id == 1) return call TinyThread1.pause();
+    #endif
+    #if (NUM_POOL_THREADS > 2)
+        if (id == 2) return call TinyThread2.pause();
+    #endif
+    #if (NUM_POOL_THREADS > 3)
+        if (id == 3) return call TinyThread3.pause();
+    #endif
+    #if (NUM_POOL_THREADS > 4)
+        if (id == 4) return call TinyThread4.pause();
+    #endif
+    #if (NUM_POOL_THREADS > 5)
+        if (id == 5) return call TinyThread5.pause();
+    #endif
+    #if (NUM_POOL_THREADS > 6)
+        if (id == 6) return call TinyThread6.pause();
+    #endif
+    #if (NUM_POOL_THREADS > 7)
+        if (id == 7) return call TinyThread7.pause();
+    #endif
+    #if (NUM_POOL_THREADS > 8)
+        if (id == 8) return call TinyThread8.pause();
+    #endif
+    #if (NUM_POOL_THREADS > 9)
+        if (id == 9) return call TinyThread9.pause();
+    #endif
+        return FAIL;
+    }
+
+    error_t resume_thread(uint8_t id) {
+        if (id >= NUM_POOL_THREADS)
+            return FAIL;
+    #if (NUM_POOL_THREADS > 0)
+        if (id == 0) return call TinyThread0.resume();
+    #endif
+    #if (NUM_POOL_THREADS > 1)
+        if (id == 1) return call TinyThread1.resume();
+    #endif
+    #if (NUM_POOL_THREADS > 2)
+        if (id == 2) return call TinyThread2.resume();
+    #endif
+    #if (NUM_POOL_THREADS > 3)
+        if (id == 3) return call TinyThread3.resume();
+    #endif
+    #if (NUM_POOL_THREADS > 4)
+        if (id == 4) return call TinyThread4.resume();
+    #endif
+    #if (NUM_POOL_THREADS > 5)
+        if (id == 5) return call TinyThread5.resume();
+    #endif
+    #if (NUM_POOL_THREADS > 6)
+        if (id == 6) return call TinyThread6.resume();
+    #endif
+    #if (NUM_POOL_THREADS > 7)
+        if (id == 7) return call TinyThread7.resume();
+    #endif
+    #if (NUM_POOL_THREADS > 8)
+        if (id == 8) return call TinyThread8.resume();
+    #endif
+    #if (NUM_POOL_THREADS > 9)
+        if (id == 9) return call TinyThread9.resume();
+    #endif
+        return FAIL;
+    }
+
+    thread_t *thread_info(uint8_t id) {
+        if (id >= NUM_POOL_THREADS)
+            return NULL;
+    #if (NUM_POOL_THREADS > 0)
+        if (id == 0) return call ThreadInfo0.get();
+    #endif
+    #if (NUM_POOL_THREADS > 1)
+        if (id == 1) return call ThreadInfo1.get();
+    #endif
+    #if (NUM_POOL_THREADS > 2)
+        if (id == 2) return call ThreadInfo2.get();
+    #endif
+    #if (NUM_POOL_THREADS > 3)
+        if (id == 3) return call ThreadInfo3.get();
+    #endif
+    #if (NUM_POOL_THREADS > 4)
+        if (id == 4) return call ThreadInfo4.get();
+    #endif
+    #if (NUM_POOL_THREADS > 5)
+        if (id == 5) return call ThreadInfo5.get();
+    #endif
+    #if (NUM_POOL_THREADS > 6)
+        if (id == 6) return call ThreadInfo6.get();
+    #endif
+    #if (NUM_POOL_THREADS > 7)
+        if (id == 7) return call ThreadInfo7.get();
+    #endif
+    #if (NUM_POOL_THREADS > 8)
+        if (id == 8) return call ThreadInfo8.get();
+    #endif
+    #if (NUM_POOL_THREADS > 9)
+        if (id == 9) return call ThreadInfo9.get();
+    #endif
+        return NULL;
+    }
+
+    uint8_t getNextPoolId() {
+        uint8_t i;
+        for (i = 0; i < NUM_POOL_THREADS; i++) {
+            if(call BitArrayUtils.getBit(thread_map, i) == 0)
+                break;
+        }
+        if (i >= NUM_POOL_THREADS)
+            return THREAD_OVERFLOW;
+        return i;
+    }
+
+    command error_t PoolThread.allocate(uint8_t* id, void (*start_routine)(void*), void* arg) {
+        thread_t *t;
+        atomic {
+            *id = getNextPoolId();
+            if (*id != THREAD_OVERFLOW) {
+                call BitArrayUtils.setBit(thread_map, *id);
+                t = thread_info(*id);
+                m_list[*id].info = t;
+                m_list[*id].info->start_ptr = start_routine;
+                if (start_thread(*id, arg) == SUCCESS) {
+                    return SUCCESS;
+                } else {
+                    call BitArrayUtils.clrBit(thread_map, *id);
+                    m_list[*id].info = NULL;
+                }
+            }
+        }
+        return FAIL;
+    }
+
+    command error_t PoolThread.release(uint8_t id) {
+        atomic {
+            call BitArrayUtils.clrBit(thread_map, id);
+            m_list[id].info = NULL;
+            if (stop_thread(id) == SUCCESS)
+                return SUCCESS;
+        }
+        return FAIL;
+    }
+
+    command error_t PoolThread.pause(uint8_t id) {
+        if (call BitArrayUtils.getBit(thread_map, id) == 1) {
+            return pause_thread(id);
+        }
+        return FAIL;
+    }
+
+    command error_t PoolThread.resume(uint8_t id) {
+        if (call BitArrayUtils.getBit(thread_map, id) == 1) {
+            return resume_thread(id);
+        }
+        return FAIL;  
+    }
+
+    uint8_t findPoolIdFromThreadId(uint8_t id) {
+        int i;
+        for (i = 0; i < NUM_POOL_THREADS; i++) {
+            if (call BitArrayUtils.getBit(thread_map, i) == 1)
+                if (m_list[i].info->id == id)
+                    return i;
+        }
+        return THREAD_OVERFLOW;
+    }
+
+    command error_t PoolThread.sleep(uint32_t milli) {
+        call ThreadSleep.sleep(milli);
+    }
+
+#if (NUM_POOL_THREADS > 0)
+    event void TinyThread0.run(void *arg) {}
+#endif
+#if (NUM_POOL_THREADS > 1)
+    event void TinyThread1.run(void *arg) {}
+#endif
+#if (NUM_POOL_THREADS > 2)
+    event void TinyThread2.run(void *arg) {}
+#endif
+#if (NUM_POOL_THREADS > 3)
+    event void TinyThread3.run(void *arg) {}
+#endif
+#if (NUM_POOL_THREADS > 4)
+    event void TinyThread4.run(void *arg) {}
+#endif
+#if (NUM_POOL_THREADS > 5)
+    event void TinyThread5.run(void *arg) {}
+#endif
+#if (NUM_POOL_THREADS > 6)
+    event void TinyThread6.run(void *arg) {}
+#endif
+#if (NUM_POOL_THREADS > 7)
+    event void TinyThread7.run(void *arg) {}
+#endif
+#if (NUM_POOL_THREADS > 8)
+    event void TinyThread8.run(void *arg) {}
+#endif
+#if (NUM_POOL_THREADS > 9)
+    event void TinyThread9.run(void *arg) {}
+#endif
+}
+
diff --git a/tos/lib/tosthreads/system/RealMainImplP.nc b/tos/lib/tosthreads/system/RealMainImplP.nc
new file mode 100644
index 00000000..5f30fd1e
--- /dev/null
+++ b/tos/lib/tosthreads/system/RealMainImplP.nc
@@ -0,0 +1,72 @@
+// $Id: RealMainImplP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: RealMainImplP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+ *
+ */
+
+/**
+ * RealMain implements the TinyOS boot sequence, as documented in TEP 107.
+ *
+ * @author Philip Levis
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module RealMainImplP {
+  provides interface Boot as ThreadSchedulerBoot;
+}
+implementation {
+  int main() @C() @spontaneous() {
+    atomic {
+      // Start running the TinyOS thread scheduler
+      signal ThreadSchedulerBoot.booted();
+    }
+
+    /* We should never reach this point, but some versions of
+     * gcc don't realize that and issue a warning if we return
+     * void from a non-void function. So include this. */
+    return -1;
+  }
+}
+
diff --git a/tos/lib/tosthreads/system/RealMainP.nc b/tos/lib/tosthreads/system/RealMainP.nc
new file mode 100644
index 00000000..070798c7
--- /dev/null
+++ b/tos/lib/tosthreads/system/RealMainP.nc
@@ -0,0 +1,69 @@
+// $Id: RealMainP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: RealMainP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+ *
+ */
+
+/**
+ * RealMain implements the TinyOS boot sequence, as documented in TEP 107.
+ *
+ * @author Philip Levis
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration RealMainP {
+  provides interface Boot;
+  uses interface Init as PlatformInit;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  components TinyOSMainP;
+  components RealMainImplP;
+    
+  Boot = RealMainImplP;
+  SoftwareInit = TinyOSMainP.SoftwareInit;
+  PlatformInit = TinyOSMainP.PlatformInit;
+}
+
diff --git a/tos/lib/tosthreads/system/ReferenceCounterC.nc b/tos/lib/tosthreads/system/ReferenceCounterC.nc
new file mode 100644
index 00000000..7e1e146f
--- /dev/null
+++ b/tos/lib/tosthreads/system/ReferenceCounterC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "thread.h"
+#include "refcounter.h"
+
+configuration ReferenceCounterC {
+  provides {
+    interface ReferenceCounter;
+  }
+}
+implementation {
+  components TinyThreadSchedulerC;
+  components ThreadQueueC;
+  components ReferenceCounterP;
+  
+  ReferenceCounter = ReferenceCounterP;
+  ReferenceCounterP.ThreadScheduler -> TinyThreadSchedulerC;
+  ReferenceCounterP.ThreadQueue -> ThreadQueueC;
+  
+  components LedsC;
+  ReferenceCounterP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/ReferenceCounterP.nc b/tos/lib/tosthreads/system/ReferenceCounterP.nc
new file mode 100644
index 00000000..1420a206
--- /dev/null
+++ b/tos/lib/tosthreads/system/ReferenceCounterP.nc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module ReferenceCounterP {
+  provides {
+    interface ReferenceCounter;
+  }
+  uses {
+    interface ThreadScheduler;
+    interface ThreadQueue;
+    interface Leds;
+  }
+}
+
+implementation {
+  void signalWaiters(refcounter_t* r) {
+    thread_t* t;
+    while((t = call ThreadQueue.dequeue(&(r->thread_queue))) != NULL)
+      call ThreadScheduler.wakeupThread(t->id); 
+  }
+
+  async command void ReferenceCounter.init(refcounter_t* r) {
+    atomic {
+      r->count = 0;
+      call ThreadQueue.init(&(r->thread_queue));  
+    }
+  }
+  async command void ReferenceCounter.increment(refcounter_t* r) {
+    atomic {
+      if( r->count != 255 ) {
+        r->count++;
+        signalWaiters(r);
+      }
+    }
+  }
+  async command void ReferenceCounter.decrement(refcounter_t* r) {
+    atomic {
+      if( r->count > 0 ) {
+        r->count--;
+        signalWaiters(r);
+      }
+    }
+  }
+  async command void ReferenceCounter.waitOnValue(refcounter_t* r, uint8_t val) {
+    atomic {
+      while(r->count != val) {
+        call ThreadQueue.enqueue(&(r->thread_queue), call ThreadScheduler.currentThreadInfo());
+        call ThreadScheduler.suspendCurrentThread(); 
+      }
+    }
+  }
+  async command uint8_t ReferenceCounter.count(refcounter_t* r) {
+    atomic return r->count;
+  }
+}
diff --git a/tos/lib/tosthreads/system/SchedulerBasicP.nc b/tos/lib/tosthreads/system/SchedulerBasicP.nc
new file mode 100644
index 00000000..93746763
--- /dev/null
+++ b/tos/lib/tosthreads/system/SchedulerBasicP.nc
@@ -0,0 +1,162 @@
+// $Id: SchedulerBasicP.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * SchedulerBasicP implements the default TinyOS scheduler sequence, as
+ * documented in TEP 106.
+ *
+ * @author Philip Levis
+ * @author Cory Sharp
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date   January 19 2005
+ */
+
+#include "hardware.h"
+#include "thread.h"
+
+module SchedulerBasicP {
+  provides interface TaskScheduler;
+  provides interface TaskBasic[uint8_t id];
+  uses interface ThreadScheduler;
+  uses interface Leds;
+}
+implementation {
+  enum {
+    NUM_TASKS = uniqueCount("TinyTaskSchedulerC.TaskBasic"),
+    NO_TASK = 255,
+  };
+
+  volatile uint8_t m_head;
+  volatile uint8_t m_tail;
+  volatile uint8_t m_next[NUM_TASKS];
+
+  // Helper functions (internal functions) intentionally do not have atomic
+  // sections.  It is left as the duty of the exported interface functions to
+  // manage atomicity to minimize chances for binary code bloat.
+
+  // move the head forward
+  // if the head is at the end, mark the tail at the end, too
+  // mark the task as not in the queue
+  inline uint8_t popTask() {
+    if( m_head != NO_TASK ) {
+      uint8_t id = m_head;
+      m_head = m_next[m_head];
+      if( m_head == NO_TASK ) {
+	    m_tail = NO_TASK;
+      }
+      m_next[id] = NO_TASK;
+      return id;
+    }
+    else {
+      return NO_TASK;
+    }
+  }
+  
+  bool isWaiting( uint8_t id ) {
+    return (m_next[id] != NO_TASK) || (m_tail == id);
+  }
+  
+  async command bool TaskScheduler.hasTasks() {
+    atomic return (m_head != NO_TASK);
+  }
+
+  bool pushTask( uint8_t id ) {
+    if( !isWaiting(id) ) {
+      if( m_head == NO_TASK ) {
+	    m_head = id;
+	    m_tail = id;
+      }
+      else {
+	    m_next[m_tail] = id;
+	    m_tail = id;
+      }
+      return TRUE;
+    }
+    else {
+      return FALSE;
+    }
+  }
+  
+  command void TaskScheduler.init() {
+    atomic {
+      memset( (void *)m_next, NO_TASK, sizeof(m_next) );
+      m_head = NO_TASK;
+      m_tail = NO_TASK;
+    }
+  }
+  
+  command bool TaskScheduler.runNextTask() {
+    uint8_t nextTask;
+    atomic {
+      nextTask = popTask();
+      if( nextTask == NO_TASK ) {
+	    return FALSE;
+      }
+    }
+    signal TaskBasic.runTask[nextTask]();
+    return TRUE;
+  }
+
+  command void TaskScheduler.taskLoop() {
+    for (;;) {
+      uint8_t nextTask;
+
+      atomic {
+	    while((nextTask = popTask()) == NO_TASK) {
+	      call ThreadScheduler.suspendCurrentThread();
+	    }
+      }
+      signal TaskBasic.runTask[nextTask]();
+    }
+  }
+
+  /**
+   * Return SUCCESS if the post succeeded, EBUSY if it was already posted.
+   */
+  
+  async command error_t TaskBasic.postTask[uint8_t id]() {
+    atomic { return pushTask(id) ? SUCCESS : EBUSY; }
+  }
+
+  default event void TaskBasic.runTask[uint8_t id]() {}
+}
+
diff --git a/tos/lib/tosthreads/system/SemaphoreC.nc b/tos/lib/tosthreads/system/SemaphoreC.nc
new file mode 100644
index 00000000..1b299daf
--- /dev/null
+++ b/tos/lib/tosthreads/system/SemaphoreC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+ 
+#include "thread.h"
+#include "semaphore.h"
+
+configuration SemaphoreC {
+  provides {
+    interface Semaphore;
+  }
+}
+implementation {
+  components TinyThreadSchedulerC;
+  components MutexC;
+  components ConditionVariableC;
+  components SemaphoreP;
+  
+  Semaphore = SemaphoreP;
+  SemaphoreP.ThreadScheduler -> TinyThreadSchedulerC;
+  SemaphoreP.Mutex -> MutexC;
+  SemaphoreP.ConditionVariable -> ConditionVariableC;
+  
+  components LedsC;
+  SemaphoreP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/SemaphoreP.nc b/tos/lib/tosthreads/system/SemaphoreP.nc
new file mode 100644
index 00000000..3c1b751a
--- /dev/null
+++ b/tos/lib/tosthreads/system/SemaphoreP.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+module SemaphoreP {
+  provides {
+    interface Semaphore;
+  }
+  uses {
+    interface ThreadScheduler;
+    interface Mutex;
+    interface ConditionVariable;
+    interface Leds;
+  }
+}
+
+implementation {
+  command void Semaphore.reset(semaphore_t* s, uint8_t v) {
+    s->s = 0;
+    s->v = v;
+    call Mutex.init(&(s->lock));  
+    call ConditionVariable.init(&(s->condvar));
+  }
+  command error_t Semaphore.acquire(semaphore_t* s) {
+    atomic {
+    call Mutex.lock(&(s->lock));
+      s->s++;
+      while (s->v == 0) {
+        call ConditionVariable.wait(&(s->condvar), &(s->lock));
+        s->v++;
+      }
+      s->s--;
+      s->v--;  
+    call Mutex.unlock(&(s->lock));
+    }
+    return SUCCESS;
+  }
+  command error_t Semaphore.release(semaphore_t* s) {
+    atomic {
+    call Mutex.lock(&(s->lock));
+      if(s->s > 0)
+        call ConditionVariable.signalNext(&(s->condvar));
+      else s->v++;
+    call Mutex.unlock(&(s->lock));
+    }
+    return SUCCESS;
+  }
+}
diff --git a/tos/lib/tosthreads/system/StaticThreadC.nc b/tos/lib/tosthreads/system/StaticThreadC.nc
new file mode 100644
index 00000000..bf2f388b
--- /dev/null
+++ b/tos/lib/tosthreads/system/StaticThreadC.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+configuration StaticThreadC {
+  provides {
+    interface Thread[uint8_t id];
+    interface ThreadNotification[uint8_t id];
+  }
+  uses {
+    interface ThreadInfo[uint8_t id];
+    interface ThreadFunction[uint8_t id];
+    interface ThreadCleanup[uint8_t id];
+  }
+}
+implementation {
+  components StaticThreadP;
+  components ThreadMapC;
+  
+  Thread = StaticThreadP;
+  ThreadNotification = StaticThreadP;
+  ThreadCleanup = StaticThreadP;
+
+  StaticThreadP.ThreadInfo = ThreadInfo;
+  ThreadMapC.StaticThreadInfo = ThreadInfo;
+  StaticThreadP.ThreadFunction = ThreadFunction;
+  
+  components ThreadSleepC;
+  components TinyThreadSchedulerC;
+  StaticThreadP.ThreadSleep -> ThreadSleepC;
+  StaticThreadP.ThreadScheduler -> TinyThreadSchedulerC;
+}
+
diff --git a/tos/lib/tosthreads/system/StaticThreadP.nc b/tos/lib/tosthreads/system/StaticThreadP.nc
new file mode 100644
index 00000000..f4e1e92c
--- /dev/null
+++ b/tos/lib/tosthreads/system/StaticThreadP.nc
@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module StaticThreadP {
+  provides {
+    interface Thread[uint8_t id];
+    interface ThreadNotification[uint8_t id];
+  }
+  uses {
+    interface ThreadScheduler;
+    interface ThreadSleep;
+    interface ThreadInfo[uint8_t id];
+    interface ThreadFunction[uint8_t id];
+    interface ThreadCleanup[uint8_t id];
+    interface Leds;
+  }
+}
+implementation {
+
+  error_t init(uint8_t id, void* arg) {
+    error_t r1, r2;
+    thread_t* thread_info = call ThreadInfo.get[id]();
+    thread_info->start_arg_ptr = arg; 
+    thread_info->mutex_count = 0;
+    thread_info->next_thread = NULL;
+    r1 = call ThreadInfo.reset[id]();
+    r2 = call ThreadScheduler.initThread(id);
+    return ecombine(r1, r2);
+  }
+  
+  command error_t Thread.start[uint8_t id](void* arg) {
+    atomic {
+      if( init(id, arg) == SUCCESS ) {
+        error_t e = call ThreadScheduler.startThread(id);
+        if(e == SUCCESS) 
+          signal ThreadNotification.justCreated[id]();
+        return e;
+      }
+    }
+    return FAIL;
+  }
+  
+  command error_t Thread.pause[uint8_t id]() {
+    return call ThreadScheduler.stopThread(id);
+  }
+  
+  command error_t Thread.resume[uint8_t id]() {
+    return call ThreadScheduler.startThread(id);
+  }
+  
+  command error_t Thread.stop[uint8_t id]() {
+    if(call ThreadScheduler.stopThread(id) == SUCCESS)
+      return init(id, NULL);
+    return FAIL;
+  }
+  
+  command error_t Thread.sleep[uint8_t id](uint32_t milli) {
+    return call ThreadSleep.sleep(milli);
+  }
+  
+  command error_t Thread.join[uint8_t id]() {
+    return call ThreadScheduler.joinThread(id);
+  }
+  
+  event void ThreadFunction.signalThreadRun[uint8_t id](void *arg) {
+    signal Thread.run[id](arg);
+  }
+  
+  async event void ThreadCleanup.cleanup[uint8_t id]() {
+    signal ThreadNotification.aboutToDestroy[id]();
+  }
+  
+  default event void Thread.run[uint8_t id](void* arg) {}
+  default async command thread_t* ThreadInfo.get[uint8_t id]() {return NULL;}
+  default async command error_t ThreadInfo.reset[uint8_t id]() {return FAIL;}
+  default async event void ThreadNotification.justCreated[uint8_t id]() {}
+  default async event void ThreadNotification.aboutToDestroy[uint8_t id]() {}
+
+}
diff --git a/tos/lib/tosthreads/system/SystemCallC.nc b/tos/lib/tosthreads/system/SystemCallC.nc
new file mode 100644
index 00000000..5f6adfdf
--- /dev/null
+++ b/tos/lib/tosthreads/system/SystemCallC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "thread.h"
+
+configuration SystemCallC {
+  provides {
+    interface SystemCall;
+  }
+}
+implementation {
+  components SystemCallP;
+  components TinyThreadSchedulerC;
+  
+  SystemCall = SystemCallP;
+  SystemCallP.ThreadScheduler -> TinyThreadSchedulerC;
+}
diff --git a/tos/lib/tosthreads/system/SystemCallP.nc b/tos/lib/tosthreads/system/SystemCallP.nc
new file mode 100644
index 00000000..fa433ec2
--- /dev/null
+++ b/tos/lib/tosthreads/system/SystemCallP.nc
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+module SystemCallP {
+  provides {
+    interface SystemCall;
+  }
+  uses {
+    interface ThreadScheduler;
+  }
+}
+implementation {
+
+  syscall_t* current_call = NULL;
+  
+  task void threadTask() {
+    (*(current_call->syscall_ptr))(current_call);
+  }
+  
+  //Had originally planned on using a thread queue here to
+  //  hold and keep track of multiple system call requests 
+  //Observation though is that only one outstanding system 
+  //  call can exist in the system at any given time
+  //Some thread calls this function, and the task gets posted,
+  //  the TOS kernel thread gets woken up, and the task is run
+  //  immediately before any other threads get the chance to
+  //  make any system calls. 
+  //If semantics change in the future, a thread queue could
+  //  be used here with a single TinyOS task servicing all them
+  //  by popping threads off the queue and reposting itself
+  command error_t SystemCall.start(void* syscall_ptr, syscall_t* s, syscall_id_t id, void* p) {
+    atomic {
+
+      current_call = s; 
+      current_call->id = id;
+      current_call->thread = call ThreadScheduler.currentThreadInfo();
+      current_call->thread->syscall = s;
+      current_call->params = p;
+      
+      if(syscall_ptr != SYSCALL_WAIT_ON_EVENT) {
+        current_call->syscall_ptr = syscall_ptr;
+        post threadTask();
+        call ThreadScheduler.wakeupThread(TOSTHREAD_TOS_THREAD_ID);
+      }
+      
+      return call ThreadScheduler.suspendCurrentThread();
+    }
+  }
+ 
+  command error_t SystemCall.finish( syscall_t* s ) {
+    return call ThreadScheduler.wakeupThread(s->thread->id);
+  }
+}
diff --git a/tos/lib/tosthreads/system/SystemCallQueueC.nc b/tos/lib/tosthreads/system/SystemCallQueueC.nc
new file mode 100644
index 00000000..339917fb
--- /dev/null
+++ b/tos/lib/tosthreads/system/SystemCallQueueC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "thread.h"
+#include "linked_list.h"
+#include "syscall_queue.h"
+
+configuration SystemCallQueueC {
+  provides {
+    interface SystemCallQueue;
+  }
+}
+implementation {
+  components LinkedListC;
+  components SystemCallQueueP;
+  
+  SystemCallQueue = SystemCallQueueP;
+  SystemCallQueueP.LinkedList -> LinkedListC;
+  
+  components LedsC;
+  SystemCallQueueP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/SystemCallQueueP.nc b/tos/lib/tosthreads/system/SystemCallQueueP.nc
new file mode 100644
index 00000000..7293944a
--- /dev/null
+++ b/tos/lib/tosthreads/system/SystemCallQueueP.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module SystemCallQueueP {
+  provides {
+    interface SystemCallQueue;
+  }
+  uses {
+    interface LinkedList;
+    interface Leds;
+  }
+}
+implementation {
+  async command void SystemCallQueue.init(syscall_queue_t* q) {
+    call LinkedList.init(&(q->l));
+  }
+  async command void SystemCallQueue.enqueue(syscall_queue_t* q, syscall_t* s) {
+    s->next_call = NULL;
+    call LinkedList.addLast(&(q->l), (list_element_t*)s);
+  }
+  async command syscall_t* SystemCallQueue.dequeue(syscall_queue_t* q) {
+    return (syscall_t*)call LinkedList.removeFirst(&(q->l));
+  }
+  async command syscall_t* SystemCallQueue.remove(syscall_queue_t* q, syscall_t* s) {
+    return (syscall_t*)call LinkedList.remove(&(q->l), (list_element_t*)s);
+  }
+  async command syscall_t* SystemCallQueue.find(syscall_queue_t* q, uint8_t id) {
+    syscall_t* s;
+    for(s = (syscall_t*)(call LinkedList.getFirst(&(q->l)));
+        s != NULL;
+        s = (syscall_t*)(call LinkedList.getAfter(&(q->l), (list_element_t*)s)) ) {
+      if(s->id == id) return s;
+    }
+    return NULL;
+  }
+  async command bool SystemCallQueue.isEmpty(syscall_queue_t* q) {
+    return (call LinkedList.size(&(q->l)) == 0);
+  }
+}
diff --git a/tos/lib/tosthreads/system/TOSThreadsInterruptP.nc b/tos/lib/tosthreads/system/TOSThreadsInterruptP.nc
new file mode 100644
index 00000000..535a5bbb
--- /dev/null
+++ b/tos/lib/tosthreads/system/TOSThreadsInterruptP.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module TOSThreadsInterruptP {
+  provides {
+    interface PlatformInterrupt;
+  }
+  uses {
+    interface TaskScheduler;
+    interface ThreadScheduler;
+  }
+}
+implementation {
+  void interruptThread() __attribute__((noinline)) {
+    if(call ThreadScheduler.wakeupThread(TOSTHREAD_TOS_THREAD_ID) == SUCCESS) 
+      if(call ThreadScheduler.currentThreadId() != TOSTHREAD_TOS_THREAD_ID)
+        call ThreadScheduler.interruptCurrentThread();
+  }
+
+  inline async command void PlatformInterrupt.postAmble() {
+    atomic {
+      if(call TaskScheduler.hasTasks() == TRUE )
+        interruptThread();
+      }
+  }
+}
diff --git a/tos/lib/tosthreads/system/ThreadC.nc b/tos/lib/tosthreads/system/ThreadC.nc
new file mode 100644
index 00000000..7464f252
--- /dev/null
+++ b/tos/lib/tosthreads/system/ThreadC.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "thread.h"
+
+generic configuration ThreadC(uint16_t stack_size) {
+  provides {
+    interface Thread;
+    interface ThreadNotification;
+    interface ThreadInfo;
+  }
+}
+implementation {
+  enum {
+    THREAD_ID = unique(UQ_TOS_THREAD),
+  };
+  
+  components MainC;
+  components new ThreadInfoP(stack_size, THREAD_ID);
+  components StaticThreadC;
+  components ThreadMapC;
+  
+  MainC.SoftwareInit -> ThreadInfoP;
+  Thread = StaticThreadC.Thread[THREAD_ID];
+  ThreadNotification = StaticThreadC.ThreadNotification[THREAD_ID];
+  ThreadInfo = ThreadInfoP;
+  
+  StaticThreadC.ThreadFunction[THREAD_ID] -> ThreadInfoP;
+  StaticThreadC.ThreadCleanup[THREAD_ID]  -> ThreadMapC.StaticThreadCleanup[THREAD_ID];
+  StaticThreadC.ThreadInfo[THREAD_ID] -> ThreadInfoP;
+  
+  components LedsC;
+  ThreadInfoP.Leds -> LedsC;
+}
diff --git a/tos/lib/tosthreads/system/ThreadInfoMapP.nc b/tos/lib/tosthreads/system/ThreadInfoMapP.nc
new file mode 100644
index 00000000..eb1cad09
--- /dev/null
+++ b/tos/lib/tosthreads/system/ThreadInfoMapP.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module ThreadInfoMapP {
+  provides {
+    interface ThreadInfo[uint8_t id];
+    interface ThreadCleanup as StaticThreadCleanup[uint8_t id];
+    interface ThreadCleanup as DynamicThreadCleanup[uint8_t id];
+  }
+  uses {
+    interface ThreadInfo as StaticThreadInfo[uint8_t id];
+    interface ThreadInfo as DynamicThreadInfo[uint8_t id];
+    interface ThreadCleanup[uint8_t id];
+    interface Leds;
+  }
+}
+implementation {
+  async command thread_t* ThreadInfo.get[uint8_t id]() {
+    return call StaticThreadInfo.get[id]();
+  }
+  default async command thread_t* StaticThreadInfo.get[uint8_t id]() {
+    return call DynamicThreadInfo.get[id]();
+  }
+  async event void ThreadCleanup.cleanup[uint8_t id]() {
+    signal StaticThreadCleanup.cleanup[id]();
+  }
+  default async event void StaticThreadCleanup.cleanup[uint8_t id]() {
+    signal DynamicThreadCleanup.cleanup[id]();
+  }
+}
+
+
+
+
diff --git a/tos/lib/tosthreads/system/ThreadInfoP.nc b/tos/lib/tosthreads/system/ThreadInfoP.nc
new file mode 100644
index 00000000..c9cd980e
--- /dev/null
+++ b/tos/lib/tosthreads/system/ThreadInfoP.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+generic module ThreadInfoP(uint16_t stack_size, uint8_t thread_id) {
+  provides {
+    interface Init;
+    interface ThreadInfo;
+    interface ThreadFunction;
+  }
+  uses {
+    interface Leds;
+  }
+}
+implementation {
+  uint8_t stack[stack_size];
+  thread_t thread_info;
+  
+  void run_thread(void* arg) __attribute__((noinline)) {
+    signal ThreadFunction.signalThreadRun(arg);
+  }
+  
+  error_t init() {
+    thread_info.next_thread = NULL;
+    thread_info.id = thread_id;
+    thread_info.init_block = NULL;
+    thread_info.stack_ptr = (stack_ptr_t)(STACK_TOP(stack, sizeof(stack)));
+    thread_info.state = TOSTHREAD_STATE_INACTIVE;
+    thread_info.mutex_count = 0;
+    thread_info.start_ptr = run_thread;
+    thread_info.start_arg_ptr = NULL;
+    thread_info.syscall = NULL;
+    return SUCCESS;
+  }
+  
+  command error_t Init.init() {
+    return init();
+  }
+  
+  async command error_t ThreadInfo.reset() {
+    return init();
+  }
+  
+  async command thread_t* ThreadInfo.get() {
+    return &thread_info;
+  }
+}
diff --git a/tos/lib/tosthreads/system/ThreadMapC.nc b/tos/lib/tosthreads/system/ThreadMapC.nc
new file mode 100644
index 00000000..ec56cd37
--- /dev/null
+++ b/tos/lib/tosthreads/system/ThreadMapC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+configuration ThreadMapC {
+  provides {
+    interface ThreadCleanup as StaticThreadCleanup[uint8_t id];
+    interface ThreadCleanup as DynamicThreadCleanup[uint8_t id];
+  }
+  uses {
+    interface ThreadInfo as StaticThreadInfo[uint8_t id];
+    interface ThreadInfo as DynamicThreadInfo[uint8_t id];
+  }
+}
+implementation {
+  components TinyThreadSchedulerC;
+  components ThreadMapP;
+  
+  TinyThreadSchedulerC.ThreadInfo -> ThreadMapP;
+  ThreadMapP.StaticThreadInfo = StaticThreadInfo;
+  ThreadMapP.DynamicThreadInfo = DynamicThreadInfo;
+
+  ThreadMapP.ThreadCleanup -> TinyThreadSchedulerC;
+  DynamicThreadCleanup =  ThreadMapP.DynamicThreadCleanup;
+  StaticThreadCleanup = ThreadMapP.StaticThreadCleanup;
+}
+
diff --git a/tos/lib/tosthreads/system/ThreadMapP.nc b/tos/lib/tosthreads/system/ThreadMapP.nc
new file mode 100644
index 00000000..80526051
--- /dev/null
+++ b/tos/lib/tosthreads/system/ThreadMapP.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module ThreadMapP {
+  provides {
+    interface ThreadInfo[uint8_t id];
+    interface ThreadCleanup as StaticThreadCleanup[uint8_t id];
+    interface ThreadCleanup as DynamicThreadCleanup[uint8_t id];
+  }
+  uses {
+    interface ThreadInfo as StaticThreadInfo[uint8_t id];
+    interface ThreadInfo as DynamicThreadInfo[uint8_t id];
+    interface ThreadCleanup[uint8_t id];
+    interface Leds;
+  }
+}
+implementation {
+  async command thread_t* ThreadInfo.get[uint8_t id]() {
+    return call StaticThreadInfo.get[id]();
+  }
+  async command error_t ThreadInfo.reset[uint8_t id]() {
+    return call StaticThreadInfo.reset[id]();
+  }
+  default async command thread_t* StaticThreadInfo.get[uint8_t id]() {
+    return call DynamicThreadInfo.get[id]();
+  }
+  default async command error_t StaticThreadInfo.reset[uint8_t id]() {
+    return call DynamicThreadInfo.reset[id]();
+  }
+  default async command thread_t* DynamicThreadInfo.get[uint8_t id]() {
+    return call StaticThreadInfo.get[id]();
+  }
+  default async command error_t DynamicThreadInfo.reset[uint8_t id]() {
+    return call StaticThreadInfo.reset[id]();
+  }
+  async event void ThreadCleanup.cleanup[uint8_t id]() {
+    signal StaticThreadCleanup.cleanup[id]();
+  }
+  default async event void StaticThreadCleanup.cleanup[uint8_t id]() {
+    signal DynamicThreadCleanup.cleanup[id]();
+  }
+  default async event void DynamicThreadCleanup.cleanup[uint8_t id]() {
+    signal StaticThreadCleanup.cleanup[id]();
+  }
+}
+
+
+
+
diff --git a/tos/lib/tosthreads/system/ThreadQueueC.nc b/tos/lib/tosthreads/system/ThreadQueueC.nc
new file mode 100644
index 00000000..1b240d4b
--- /dev/null
+++ b/tos/lib/tosthreads/system/ThreadQueueC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "thread.h"
+#include "linked_list.h"
+#include "thread_queue.h"
+
+configuration ThreadQueueC {
+  provides {
+    interface ThreadQueue;
+  }
+}
+implementation {
+  components LinkedListC;
+  components ThreadQueueP;
+  
+  ThreadQueue = ThreadQueueP;
+  ThreadQueueP.LinkedList -> LinkedListC;
+}
diff --git a/tos/lib/tosthreads/system/ThreadQueueP.nc b/tos/lib/tosthreads/system/ThreadQueueP.nc
new file mode 100644
index 00000000..4e7579d4
--- /dev/null
+++ b/tos/lib/tosthreads/system/ThreadQueueP.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module ThreadQueueP {
+  provides {
+    interface ThreadQueue;
+  }
+  uses {
+    interface LinkedList;
+  }
+}
+implementation {
+  async command void ThreadQueue.init(thread_queue_t* q) {
+    call LinkedList.init(&(q->l));
+  }
+  async command void ThreadQueue.enqueue(thread_queue_t* q, thread_t* t) {
+    call LinkedList.addFirst(&(q->l), (list_element_t*)t);
+  }
+  async command thread_t* ThreadQueue.dequeue(thread_queue_t* q) {
+    return (thread_t*)call LinkedList.removeLast(&(q->l));
+  }
+  async command thread_t* ThreadQueue.remove(thread_queue_t* q, thread_t* t) {
+    return (thread_t*)call LinkedList.remove(&(q->l), (list_element_t*)t);
+  }
+  async command bool ThreadQueue.isEmpty(thread_queue_t* q) {
+    return (call LinkedList.size(&(q->l)) == 0);
+  }
+}
diff --git a/tos/lib/tosthreads/system/ThreadSleepC.nc b/tos/lib/tosthreads/system/ThreadSleepC.nc
new file mode 100644
index 00000000..e58a2ac2
--- /dev/null
+++ b/tos/lib/tosthreads/system/ThreadSleepC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+configuration ThreadSleepC {
+  provides {
+    interface ThreadSleep;
+  }
+}
+implementation {
+  components ThreadTimersC;
+  components ThreadSleepP;
+  components SystemCallC;
+  components TinyThreadSchedulerC;
+  
+  ThreadSleep = ThreadSleepP;
+  ThreadSleepP.TimerMilli -> ThreadTimersC;
+  ThreadSleepP.SystemCall -> SystemCallC;
+  ThreadSleepP.ThreadScheduler -> TinyThreadSchedulerC;
+  
+  components LedsC;
+  ThreadSleepP.Leds -> LedsC;
+}
+
diff --git a/tos/lib/tosthreads/system/ThreadSleepP.nc b/tos/lib/tosthreads/system/ThreadSleepP.nc
new file mode 100644
index 00000000..d78212d9
--- /dev/null
+++ b/tos/lib/tosthreads/system/ThreadSleepP.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+module ThreadSleepP {
+  provides {
+    interface ThreadSleep;
+  }
+  uses {
+    interface SystemCall;
+    interface ThreadScheduler;
+    interface Timer<TMilli> as TimerMilli[uint8_t id];
+    interface Leds;
+  }
+}
+implementation {
+  typedef struct sleep_params {
+    uint32_t* milli;
+  } sleep_params_t;
+  
+  void sleepTask(syscall_t* s) {
+    sleep_params_t* p = s->params;
+    call TimerMilli.startOneShot[s->thread->id]( *(p->milli) );
+  }
+  
+  command error_t ThreadSleep.sleep(uint32_t milli) {
+    syscall_t s;
+    sleep_params_t p;    
+    p.milli = &milli;
+    call SystemCall.start(&sleepTask, &s, INVALID_ID, &p);
+    return SUCCESS;
+  }
+  
+  //Need to add a cancel command so that components like
+  //BlockingAMReceiverImplP can use the ThreadSleep interface
+  //directly instead of reusing the underlying ThreadTimerC 
+  //component.  The current implementation does things this way
+  //and causes us to be defensive in here since the same 
+  //TimerMilli.fired() event is sent to that component as well.
+  //Basically its just broken....  cancel() would get rid of this.
+  
+  //Also need some sort of a sleepWithSyscall command
+  //Need to think about this one a little more
+  
+  event void TimerMilli.fired[uint8_t id]() {
+    thread_t* t = call ThreadScheduler.threadInfo(id);
+    if(t->syscall->syscall_ptr == sleepTask)
+	    call SystemCall.finish(t->syscall);
+  }
+}
diff --git a/tos/lib/tosthreads/system/ThreadSynchronizationC.nc b/tos/lib/tosthreads/system/ThreadSynchronizationC.nc
new file mode 100644
index 00000000..7c56c8b1
--- /dev/null
+++ b/tos/lib/tosthreads/system/ThreadSynchronizationC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+configuration ThreadSynchronizationC {
+  provides {
+    interface Barrier;
+    interface Mutex;
+    interface Semaphore;
+    interface ConditionVariable;
+    interface ReferenceCounter;
+  }
+}
+implementation {
+  components BarrierC;
+  components MutexC;
+  components SemaphoreC;
+  components ConditionVariableC;
+  components ReferenceCounterC;
+  
+  Barrier = BarrierC;
+  Mutex = MutexC;
+  Semaphore = SemaphoreC;
+  ConditionVariable = ConditionVariableC;
+  ReferenceCounter = ReferenceCounterC;
+}
diff --git a/tos/lib/tosthreads/system/ThreadTimersC.nc b/tos/lib/tosthreads/system/ThreadTimersC.nc
new file mode 100644
index 00000000..3d29464e
--- /dev/null
+++ b/tos/lib/tosthreads/system/ThreadTimersC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#include "thread.h"
+
+configuration ThreadTimersC {
+  provides {
+    interface Timer<TMilli> as TimerMilli[uint8_t id];
+  }
+}
+implementation {
+  components new TimerMilliC();
+  components new VirtualizeTimerC(TMilli, TOSTHREAD_MAX_NUM_THREADS);
+  
+  VirtualizeTimerC.TimerFrom -> TimerMilliC;
+  TimerMilli = VirtualizeTimerC.Timer;
+}
diff --git a/tos/lib/tosthreads/system/TinyOSMainP.nc b/tos/lib/tosthreads/system/TinyOSMainP.nc
new file mode 100644
index 00000000..d35d8297
--- /dev/null
+++ b/tos/lib/tosthreads/system/TinyOSMainP.nc
@@ -0,0 +1,126 @@
+// $Id: TinyOSMainP.nc,v 1.4 2010-06-29 22:07:52 scipio Exp $
+
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: TinyOSMainP.nc,v 1.4 2010-06-29 22:07:52 scipio Exp $
+ *
+ */
+
+/**
+ * RealMain implements the TinyOS boot sequence, as documented in TEP 107.
+ *
+ * @author Philip Levis
+ * @author Kevin Klues <klueska@cs.stanford.edu> 
+ */
+
+#ifdef DYNTHREADS 
+  #define AT_SPONTANEOUS	@spontaneous()
+#else
+  #define AT_SPONTANEOUS
+#endif
+
+module TinyOSMainP {
+  provides {
+    interface Boot;
+    interface ThreadInfo;
+  }
+  uses {
+    interface Boot as TinyOSBoot;
+    interface TaskScheduler;
+    interface Init as PlatformInit;
+    interface Init as SoftwareInit;
+    interface Leds;
+  }
+}
+implementation {
+  thread_t thread_info;
+
+  event void TinyOSBoot.booted() {
+    atomic {
+      /*  Initialize all of the very hardware specific stuff, such
+	  as CPU settings, counters, etc. After the hardware is ready,
+	  initialize the requisite software components and start
+	  execution. */
+	  platform_bootstrap();
+    
+	  // First, initialize the Scheduler so components can post tasks.
+	  call TaskScheduler.init(); 
+    
+	  /* Initialize the platform. Then spin on the Scheduler, passing
+	   * FALSE so it will not put the system to sleep if there are no
+	   * more tasks; if no tasks remain, continue on to software
+	   * initialization */
+	  call PlatformInit.init();
+	  while (call TaskScheduler.runNextTask());
+	  
+	  /* Initialize software components.Then spin on the Scheduler,
+	   * passing FALSE so it will not put the system to sleep if there
+	   * are no more tasks; if no tasks remain, the system has booted
+	   * successfully.*/
+	  call SoftwareInit.init(); 
+	  while (call TaskScheduler.runNextTask());
+    }
+
+    /* Enable interrupts now that system is ready. */
+    __nesc_enable_interrupt();
+
+    signal Boot.booted();
+
+    /* Spin in the TaskScheduler */
+    call TaskScheduler.taskLoop();
+    
+  }
+  
+  async command error_t ThreadInfo.reset() {
+    return FAIL;
+  }
+
+  async command thread_t* ThreadInfo.get() {
+    return &thread_info;
+  }
+
+  default command error_t PlatformInit.init() { return SUCCESS; }
+  default command error_t SoftwareInit.init() { return SUCCESS; }
+  default event void Boot.booted() { }
+}
+
diff --git a/tos/lib/tosthreads/system/TinyTaskSchedulerC.nc b/tos/lib/tosthreads/system/TinyTaskSchedulerC.nc
new file mode 100644
index 00000000..f54073a7
--- /dev/null
+++ b/tos/lib/tosthreads/system/TinyTaskSchedulerC.nc
@@ -0,0 +1,62 @@
+// $Id: TinyTaskSchedulerC.nc,v 1.2 2010-06-29 22:07:52 scipio Exp $
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TinyOS scheduler. It provides two interfaces: Scheduler,
+ * for TinyOS to initialize and run tasks, and TaskBasic, the simplext
+ * class of TinyOS tasks (reserved always at-most-once posting,
+ * FIFO, parameter-free). For details and information on how to
+ * replace the scheduler, refer to TEP 106.
+ *
+ * @author  Phil Levis
+ * @author  Kevin Klues <klueska@cs.stanford.edu>
+ * @date    August 7 2005
+ * @see     TEP 106: Tasks and Schedulers
+ */
+
+configuration TinyTaskSchedulerC {
+  provides interface TaskScheduler;
+  provides interface TaskBasic[uint8_t id];
+  uses interface ThreadScheduler;
+}
+implementation {
+  components SchedulerBasicP as Sched;
+  components McuSleepC as Sleep;
+  TaskScheduler = Sched;
+  TaskBasic = Sched;
+  Sched.ThreadScheduler = ThreadScheduler;
+  
+  components LedsC;
+  Sched.Leds -> LedsC;
+}
+
diff --git a/tos/lib/tosthreads/system/TinyThreadSchedulerC.nc b/tos/lib/tosthreads/system/TinyThreadSchedulerC.nc
new file mode 100644
index 00000000..0d4d6036
--- /dev/null
+++ b/tos/lib/tosthreads/system/TinyThreadSchedulerC.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#include "thread.h"
+
+configuration TinyThreadSchedulerC {
+  provides {
+    interface ThreadScheduler;
+    interface ThreadCleanup[uint8_t id];
+    interface Boot as TinyOSBoot;
+  }
+  uses {
+    interface Boot as ThreadSchedulerBoot;
+    interface ThreadInfo[uint8_t id];
+  }
+}
+implementation {
+  components TinyThreadSchedulerP as Sched;
+  components McuSleepC as Sleep;
+  
+  TinyOSBoot = Sched;
+  ThreadSchedulerBoot = Sched.ThreadSchedulerBoot;
+  ThreadInfo = Sched;
+  ThreadCleanup = Sched;
+  ThreadScheduler = Sched;
+  Sched.McuSleep -> Sleep;
+  
+  components BitArrayUtilsC;
+  Sched.BitArrayUtils -> BitArrayUtilsC;
+  
+  components ThreadQueueC;
+  Sched.ThreadQueue -> ThreadQueueC;
+  
+  components new TimerMilliC() as Alarm;
+  Sched.PreemptionAlarm -> Alarm;
+  
+  components LedsC;
+  Sched.Leds -> LedsC;
+}
+
+
diff --git a/tos/lib/tosthreads/system/TinyThreadSchedulerP.nc b/tos/lib/tosthreads/system/TinyThreadSchedulerP.nc
new file mode 100644
index 00000000..8466a982
--- /dev/null
+++ b/tos/lib/tosthreads/system/TinyThreadSchedulerP.nc
@@ -0,0 +1,331 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+  
+module TinyThreadSchedulerP {
+  provides {
+    interface ThreadScheduler;
+    interface Boot as TinyOSBoot;
+    interface ThreadCleanup[uint8_t id];
+  }
+  uses {
+    interface Boot as ThreadSchedulerBoot;
+    interface ThreadInfo[uint8_t id];
+    interface ThreadQueue;
+    interface BitArrayUtils;
+    interface McuSleep;
+    interface Leds;
+    interface Timer<TMilli> as PreemptionAlarm;
+  }
+}
+implementation {
+  //Pointer to currently running thread
+  thread_t* current_thread;
+  //Pointer to the tos thread
+  thread_t* tos_thread;
+  //Pointer to yielding thread
+  thread_t* yielding_thread;
+  //Number of threads started, and currently capable of running if given the chance
+  uint8_t num_runnable_threads;
+  //Thread queue for keeping track of threads waiting to run
+  thread_queue_t ready_queue;
+  
+  void task alarmTask() {
+    uint8_t temp;
+    atomic temp = num_runnable_threads;
+    if(temp <= 1)
+      call PreemptionAlarm.stop();
+    else if(temp > 1)
+      call PreemptionAlarm.startOneShot(TOSTHREAD_PREEMPTION_PERIOD);
+  }
+  
+  /* switch_threads()
+   * This routine swaps the stack and allows a thread to run.
+   * Needs to be in a separate function like this so that the 
+   * PC counter gets saved on the stack correctly.
+   *
+   * This funciton should have NOTHING other than the call
+   * to the SWITCH_CONTEXTS macro in it.  Otherwise we run
+   * the risk of variables being pushed and popped by the 
+   * compiler, causing obvious problems with the stack switching
+   * thats going on....
+   */
+  void switchThreads() __attribute__((noinline)) {
+    SWITCH_CONTEXTS(yielding_thread, current_thread);
+  }
+  void restoreThread() __attribute__((noinline)) {
+    RESTORE_TCB(current_thread);
+  }
+  
+  /* sleepWhileIdle() 
+   * This routine is responsible for putting the mcu to sleep as 
+   * long as there are no threads waiting to be run.  Once a
+   * thread has been added to the ready queue the mcu will be
+   * woken up and the thread will start running
+   */
+  void sleepWhileIdle() {
+    while(TRUE) {
+      bool mt;
+      atomic mt = (call ThreadQueue.isEmpty(&ready_queue) == TRUE);
+      if(!mt || tos_thread->state == TOSTHREAD_STATE_READY) break;
+      call McuSleep.sleep();
+    }
+  }
+  
+  /* schedule_next_thread()
+   * This routine does the job of deciding which thread should run next.
+   * Should be complete as is.  Add functionality to getNextThreadId() 
+   * if you need to change the actual scheduling policy.
+   */
+  void scheduleNextThread() {
+    if(tos_thread->state == TOSTHREAD_STATE_READY)
+      current_thread = tos_thread;
+    else
+      current_thread = call ThreadQueue.dequeue(&ready_queue);
+
+    current_thread->state = TOSTHREAD_STATE_ACTIVE;
+  }
+  
+  /* interrupt()
+   * This routine figures out what thread should run next
+   * and then switches to it.
+   */
+  void interrupt(thread_t* thread) {
+    yielding_thread = thread;
+    scheduleNextThread();
+    if(current_thread != yielding_thread) {
+      switchThreads();
+    }
+  }
+  
+  /* suspend()
+   * this routine is responsbile for suspending a thread.  It first 
+   * checks to see if the mcu should be put to sleep based on the fact 
+   * that the thread is being suspended.  If not, it proceeds to switch
+   * contexts to the next thread on the ready queue.
+   */
+  void suspend(thread_t* thread) {
+    //if there are no active threads, put the MCU to sleep
+    //Then wakeup the TinyOS thread whenever the MCU wakes up again
+    #ifdef TOSTHREADS_TIMER_OPTIMIZATION
+      num_runnable_threads--;
+	  post alarmTask();    
+	#endif
+    sleepWhileIdle();
+    interrupt(thread);
+  }
+  
+  void wakeupJoined(thread_t* t) {
+    int i,j,k;
+    k = 0;
+    for(i=0; i<sizeof(t->joinedOnMe); i++) {
+      if(t->joinedOnMe[i] == 0) {
+        k+=8;
+        continue;
+      }
+      for(j=0; j<8; j++) {
+        if(t->joinedOnMe[i] & 0x1)
+          call ThreadScheduler.wakeupThread(k);
+        t->joinedOnMe[i] >>= 1;
+        k++;
+      }
+    }
+  }
+  
+  /* stop
+   * This routine stops a thread by putting it into the inactive state
+   * and decrementing any necessary variables used to keep track of
+   * threads by the thread scheduler.
+   */
+  void stop(thread_t* t) {
+    t->state = TOSTHREAD_STATE_INACTIVE;
+    num_runnable_threads--;
+    wakeupJoined(t);
+    #ifdef TOSTHREADS_TIMER_OPTIMIZATION
+	  post alarmTask();    
+	#else
+      if(num_runnable_threads == 1)
+        call PreemptionAlarm.stop();
+    #endif
+    signal ThreadCleanup.cleanup[t->id]();
+  }
+  
+  /* This executes and cleans up a thread
+   */
+  void threadWrapper() __attribute__((naked, noinline)) {
+    thread_t* t;
+    atomic t = current_thread;
+    
+    __nesc_enable_interrupt();
+    (*(t->start_ptr))(t->start_arg_ptr);
+    
+    atomic {
+      stop(t);
+      sleepWhileIdle();
+      scheduleNextThread();
+      restoreThread();
+    }
+  } 
+  
+  event void ThreadSchedulerBoot.booted() {
+    num_runnable_threads = 0;
+    tos_thread = call ThreadInfo.get[TOSTHREAD_TOS_THREAD_ID]();
+    tos_thread->id = TOSTHREAD_TOS_THREAD_ID;
+    call ThreadQueue.init(&ready_queue);
+    
+    current_thread = tos_thread;
+    current_thread->state = TOSTHREAD_STATE_ACTIVE;
+    current_thread->init_block = NULL;
+    signal TinyOSBoot.booted();
+  }
+  
+  command error_t ThreadScheduler.initThread(uint8_t id) { 
+    thread_t* t = (call ThreadInfo.get[id]());
+    t->state = TOSTHREAD_STATE_INACTIVE;
+    t->init_block = current_thread->init_block;
+    call BitArrayUtils.clrArray(t->joinedOnMe, sizeof(t->joinedOnMe));
+    PREPARE_THREAD(t, threadWrapper);
+    return SUCCESS;
+  }
+  
+  command error_t ThreadScheduler.startThread(uint8_t id) {
+    atomic {
+      thread_t* t = (call ThreadInfo.get[id]());
+      if(t->state == TOSTHREAD_STATE_INACTIVE) {
+        num_runnable_threads++;
+        #ifdef TOSTHREADS_TIMER_OPTIMIZATION
+          post alarmTask();
+        #else 
+          if(num_runnable_threads == 2)
+            call PreemptionAlarm.startOneShot(TOSTHREAD_PREEMPTION_PERIOD);
+        #endif
+        t->state = TOSTHREAD_STATE_READY;
+        call ThreadQueue.enqueue(&ready_queue, t);
+        return SUCCESS;
+      }
+    }
+    return FAIL;  
+  }
+  
+  command error_t ThreadScheduler.stopThread(uint8_t id) { 
+    atomic {
+      thread_t* t = call ThreadInfo.get[id]();
+      if((t->state == TOSTHREAD_STATE_READY) && (t->mutex_count == 0)) {
+        call ThreadQueue.remove(&ready_queue, t);
+        stop(t);
+        return SUCCESS;
+      }
+      return FAIL;
+    }
+  }
+  
+  async command error_t ThreadScheduler.suspendCurrentThread() {
+    atomic {
+      if(current_thread->state == TOSTHREAD_STATE_ACTIVE) {
+        current_thread->state = TOSTHREAD_STATE_SUSPENDED;
+        suspend(current_thread);
+        return SUCCESS;
+      }
+      return FAIL;
+    }
+  }
+  
+  async command error_t ThreadScheduler.interruptCurrentThread() { 
+    atomic {
+      if(current_thread->state == TOSTHREAD_STATE_ACTIVE) {
+        current_thread->state = TOSTHREAD_STATE_READY;
+        if(current_thread != tos_thread)
+          call ThreadQueue.enqueue(&ready_queue, current_thread);
+        interrupt(current_thread);
+        return SUCCESS;
+      }
+      return FAIL;
+    }
+  }
+  
+  async command error_t ThreadScheduler.joinThread(thread_id_t id) { 
+    thread_t* t = call ThreadInfo.get[id]();
+    atomic {
+      if(current_thread == tos_thread)
+        return FAIL;
+      if (t->state != TOSTHREAD_STATE_INACTIVE) {
+        call BitArrayUtils.setBit(t->joinedOnMe, current_thread->id);
+        call ThreadScheduler.suspendCurrentThread();
+        return SUCCESS;
+      }
+    }
+    return EALREADY;
+  }
+  
+  async command error_t ThreadScheduler.wakeupThread(uint8_t id) {
+    thread_t* t = call ThreadInfo.get[id]();
+    if((t->state) == TOSTHREAD_STATE_SUSPENDED) {
+      t->state = TOSTHREAD_STATE_READY;
+      if(t != tos_thread) {
+        call ThreadQueue.enqueue(&ready_queue, call ThreadInfo.get[id]());
+        #ifdef TOSTHREADS_TIMER_OPTIMIZATION
+          atomic num_runnable_threads++;
+          post alarmTask();
+        #endif
+      }
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+  
+  async command uint8_t ThreadScheduler.currentThreadId() {
+    atomic return current_thread->id;
+  }    
+  
+  async command thread_t* ThreadScheduler.threadInfo(uint8_t id) {
+    atomic return call ThreadInfo.get[id]();
+  }   
+  
+  async command thread_t* ThreadScheduler.currentThreadInfo() {
+    atomic return current_thread;
+  }
+  
+  event void PreemptionAlarm.fired() {
+    call PreemptionAlarm.startOneShot(TOSTHREAD_PREEMPTION_PERIOD);
+    atomic {
+      if((call ThreadQueue.isEmpty(&ready_queue) == FALSE)) {
+        call ThreadScheduler.interruptCurrentThread();
+      }
+    }
+  }
+  
+  default async command thread_t* ThreadInfo.get[uint8_t id]() {
+    return NULL;
+  }
+}
diff --git a/tos/lib/tosthreads/system/TosMallocC.nc b/tos/lib/tosthreads/system/TosMallocC.nc
new file mode 100644
index 00000000..8de2ba39
--- /dev/null
+++ b/tos/lib/tosthreads/system/TosMallocC.nc
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ * Implementation borrowed from the msp430-libc implementation
+ */
+ 
+/*
+ * MALLOC_HEAP_SIZE MUST be defined as a power of 2
+ */
+#ifndef MALLOC_HEAP_SIZE
+#define MALLOC_HEAP_SIZE 1024
+#endif
+ 
+module TosMallocC {
+  provides interface Malloc;
+}
+implementation {
+  #define XSIZE(x) ((*x)>>1)
+  #define FREE_P(x) (!((*x)&1))
+  #define MARK_BUSY(x) ((*x)|=1)
+  #define MARK_FREE(x) ((*x)&=0xfffe)
+
+  size_t malloc_heap[MALLOC_HEAP_SIZE];
+
+  void *tos_malloc (size_t size) @C() AT_SPONTANEOUS
+  {
+    static char once = 0;
+    size_t * heap_bottom = &(malloc_heap[MALLOC_HEAP_SIZE]);
+    size_t * heap_top = malloc_heap;
+    char f = 0;
+
+    atomic if (!once)
+    {
+        once = 1;
+        *heap_top = 0xFFFE;
+    }
+    size = (size+1) >> 1;	/* round to 2 */
+    do
+    {
+        size_t xsize = XSIZE (heap_top);
+        size_t * heap_next = &heap_top[xsize + 1];
+        if ((xsize<<1)+2 == 0)
+        {
+            f = 1;
+        }
+        if (FREE_P (heap_top))
+        {
+            if (f)
+            {
+                xsize = heap_bottom - heap_top - 1;
+            }
+            else if (FREE_P(heap_next))
+            {
+                *heap_top = ( (XSIZE(heap_next)<<1) + 2 == 0
+                              ? 0xfffe
+                              : (xsize + XSIZE(heap_next) + 1)<<1);
+                continue;
+            }
+            if (xsize >= size)
+            {
+                if (f)
+                    heap_top[size + 1] = 0xfffe;
+                else if (xsize != size)
+                    heap_top[size + 1] = (xsize - size - 1) << 1;
+                *heap_top = size << 1;
+                MARK_BUSY (heap_top);
+                return heap_top+1;
+            }
+        }
+        heap_top += xsize + 1;
+    }
+    while (!f);
+    return NULL;
+  }
+
+  void tos_free (void *p) @C() AT_SPONTANEOUS
+  {
+    size_t *t = (size_t*)p - 1;
+    MARK_FREE (t);
+  }
+  
+  async command void* Malloc.malloc(size_t size) {
+    return tos_malloc(size);
+  }
+  
+  async command void Malloc.free(void* p) {
+    tos_free(p);
+  }
+}
diff --git a/tos/lib/tosthreads/types/barrier.h b/tos/lib/tosthreads/types/barrier.h
new file mode 100644
index 00000000..449f121b
--- /dev/null
+++ b/tos/lib/tosthreads/types/barrier.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Header file declaring struct for barrier synchronization as used
+ * with tosthreads.
+ *
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#ifndef BARRIER_H
+#define BARRIER_H
+
+#include "thread.h"
+#include "thread_queue.h"
+
+typedef struct barrier {
+  uint8_t count;
+  thread_queue_t thread_queue;
+} barrier_t;
+
+#endif //BARRIER_H
diff --git a/tos/lib/tosthreads/types/condvar.h b/tos/lib/tosthreads/types/condvar.h
new file mode 100644
index 00000000..ad44925d
--- /dev/null
+++ b/tos/lib/tosthreads/types/condvar.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues (klueska@cs.stanford.edu)
+ */
+
+#ifndef CONDVAR_H
+#define CONDVAR_H
+
+#include "thread.h"
+#include "thread_queue.h"
+#include "mutex.h"
+
+typedef struct condvar {
+  thread_queue_t thread_queue;
+} condvar_t;
+
+#endif //COND_VAR_H
diff --git a/tos/lib/tosthreads/types/linked_list.h b/tos/lib/tosthreads/types/linked_list.h
new file mode 100644
index 00000000..03929c4b
--- /dev/null
+++ b/tos/lib/tosthreads/types/linked_list.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef LINKED_LIST_H_INCLUDED
+#define LINKED_LIST_H_INCLUDED
+
+typedef struct list_element {
+  struct list_element* next;
+  uint8_t* element_data;
+} list_element_t;
+
+typedef struct linked_list {
+  list_element_t* head; 
+  volatile uint8_t size;
+} linked_list_t;
+
+#endif //LINKED_LIST_H_INCLUDED
diff --git a/tos/lib/tosthreads/types/mutex.h b/tos/lib/tosthreads/types/mutex.h
new file mode 100644
index 00000000..bff0cdf3
--- /dev/null
+++ b/tos/lib/tosthreads/types/mutex.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#ifndef MUTEX_H
+#define MUTEX_H
+
+#include "thread_queue.h"
+
+typedef struct mutex {
+  bool lock;
+  thread_queue_t thread_queue;
+} mutex_t;
+
+#endif //MUTEX_H
diff --git a/tos/lib/tosthreads/types/poolthread.h b/tos/lib/tosthreads/types/poolthread.h
new file mode 100644
index 00000000..049fe842
--- /dev/null
+++ b/tos/lib/tosthreads/types/poolthread.h
@@ -0,0 +1,14 @@
+
+#ifndef _POOL_THREAD_H_
+#define _POOL_THREAD_H_
+
+#ifndef NUM_POOL_THREADS
+#define NUM_POOL_THREADS 5
+#endif
+
+#ifndef POOL_THREAD_STACK_SIZE
+#define POOL_THREAD_STACK_SIZE 200
+#endif
+
+#endif
+
diff --git a/tos/lib/tosthreads/types/queue.h b/tos/lib/tosthreads/types/queue.h
new file mode 100644
index 00000000..52901653
--- /dev/null
+++ b/tos/lib/tosthreads/types/queue.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef QUEUE_H_INCLUDED
+#define QUEUE_H_INCLUDED
+
+#include "linked_list.h"
+#include "tosthread_linked_list.h"
+
+typedef struct queue {
+  linked_list_t l;
+} queue_t;
+
+typedef linked_list_t queue_element_t;
+
+#endif //QUEUE_H_INCLUDED
diff --git a/tos/lib/tosthreads/types/refcounter.h b/tos/lib/tosthreads/types/refcounter.h
new file mode 100644
index 00000000..395a1bc0
--- /dev/null
+++ b/tos/lib/tosthreads/types/refcounter.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#ifndef REFCOUNTER_H
+#define REFCOUNTER_H
+
+#include "thread.h"
+#include "thread_queue.h"
+
+typedef struct refcounter {
+  uint8_t count;
+  thread_queue_t thread_queue;
+} refcounter_t;
+
+#endif //REFCOUNTER_H
diff --git a/tos/lib/tosthreads/types/semaphore.h b/tos/lib/tosthreads/types/semaphore.h
new file mode 100644
index 00000000..26edd181
--- /dev/null
+++ b/tos/lib/tosthreads/types/semaphore.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2008 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * @author Chieh-Jan Mike Liang <cliang4@cs.jhu.edu>
+ */
+
+#ifndef SEMAPHORE_H
+#define SEMAPHORE_H
+
+#include "thread.h"
+#include "mutex.h"
+#include "condvar.h"
+  
+typedef struct semaphore {
+  uint8_t v;
+  uint8_t s;
+  mutex_t lock;
+  condvar_t condvar;
+} semaphore_t;
+
+#endif //SEMAPHORE_H
diff --git a/tos/lib/tosthreads/types/syscall_queue.h b/tos/lib/tosthreads/types/syscall_queue.h
new file mode 100644
index 00000000..5588bd75
--- /dev/null
+++ b/tos/lib/tosthreads/types/syscall_queue.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef SYSCALL_QUEUE_H
+#define SYSCALL_QUEUE_H
+
+#include "linked_list.h"
+
+typedef struct syscall_queue {
+  linked_list_t l;				//The syscall_queue implementation uses a linked list
+} syscall_queue_t;
+
+#endif //SYSCALL_QUEUE_H
diff --git a/tos/lib/tosthreads/types/thread.h b/tos/lib/tosthreads/types/thread.h
new file mode 100644
index 00000000..87df6121
--- /dev/null
+++ b/tos/lib/tosthreads/types/thread.h
@@ -0,0 +1,119 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+
+#ifndef THREAD_H
+#define THREAD_H
+
+#include "chip_thread.h"
+#include "refcounter.h"
+
+typedef uint8_t thread_id_t;                           //Typedef for thread_id_t
+typedef uint8_t syscall_id_t;                          //Typedef for syscall_id_t
+typedef thread_id_t tosthread_t;                       //Typedef for tosthread_t used to initialize a c-based thread
+
+#ifndef TOSTHREAD_MAIN_STACK_SIZE
+#define TOSTHREAD_MAIN_STACK_SIZE   500  //Default stack size for the main thread that spawns all other threads in the c based api
+#endif
+
+//Since thread initialization is encapsulated 
+//inside a generic component, we can statically 
+//know the number of threads created at compile 
+//time
+#define UQ_TOS_THREAD "Unique.TOS.Thread"
+enum {
+#ifdef MAX_NUM_THREADS
+  TOSTHREAD_MAX_NUM_THREADS = MAX_NUM_THREADS,
+#else
+  TOSTHREAD_MAX_NUM_THREADS = 33,   //Maximum number of threads allowed to run (must be less than sizeof(thread_id_t))
+#endif
+  TOSTHREAD_NUM_STATIC_THREADS = uniqueCount(UQ_TOS_THREAD),  //The number of statically allocated threads
+  TOSTHREAD_MAX_DYNAMIC_THREADS = TOSTHREAD_MAX_NUM_THREADS - TOSTHREAD_NUM_STATIC_THREADS,
+  TOSTHREAD_TOS_THREAD_ID = TOSTHREAD_MAX_NUM_THREADS,        //The ID of the TinyOS thread (One more than max allowable threads)
+  TOSTHREAD_INVALID_THREAD_ID = TOSTHREAD_MAX_NUM_THREADS,    //An invalid thread id
+  TOSTHREAD_PREEMPTION_PERIOD = 5,                            //The preemption period for switching between threads
+};
+
+enum {
+  INVALID_ID = 0xFF,            //ID reserved to indicate an invalid client connected
+  SYSCALL_WAIT_ON_EVENT = 0,    //Indicates there is no actual system call to make, but rather should jsut wait on an event
+};
+
+typedef struct syscall syscall_t;
+typedef struct thread thread_t;
+typedef struct init_block init_block_t;
+
+//This is the data structure associated with an initialization block from which 
+//threads are spawned when dynamically loading them
+struct init_block {
+  void* globals;
+  void (*init_ptr)(void*);
+  void* init_arg;
+  refcounter_t thread_counter;
+};
+
+//This is a system call data structure
+struct syscall {
+  //***** next_call must be at first position in struct for casting purposes *******
+  struct syscall* next_call;        //Pointer to next system call for use in syscall queues when blocking on them
+  syscall_id_t id;                  //client id of this system call for the particular syscall_queue within which it is being held
+  thread_t* thread;                 //Pointer back to the thread with which this system call is associated
+  void (*syscall_ptr)(struct syscall*);   //Pointer to the the function that actually performs the system call
+  void* params;                     //Pointer to a set of parameters passed to the system call once it is running in task context
+};
+
+//This is a thread data structure
+struct thread {
+  //***** next_thread must be at first position in struct for casting purposes *******
+  volatile struct thread* next_thread;  //Pointer to next thread for use in queues when blocked
+  thread_id_t id;                       //id of this thread for use by the thread scheduler
+  init_block_t* init_block;             //Pointer to an initialization block from which this thread was spawned
+  stack_ptr_t stack_ptr;                //Pointer to this threads stack
+  volatile uint8_t state;               //Current state the thread is in
+  volatile uint8_t mutex_count;         //A reference count of the number of mutexes held by this thread
+  uint8_t joinedOnMe[(TOSTHREAD_MAX_NUM_THREADS - 1) / 8 + 1]; //Bitmask of threads waiting for me to finish
+  void (*start_ptr)(void*);             //Pointer to the start function of this thread
+  void* start_arg_ptr;                  //Pointer to the argument passed as a parameter to the start function of this thread
+  syscall_t* syscall;                   //Pointer to an instance of a system call
+  thread_regs_t regs;                   //Contents of the GPRs stored when doing a context switch
+};
+
+enum {
+  TOSTHREAD_STATE_INACTIVE    = 0,  //This thread is inactive and cannot be run until started
+  TOSTHREAD_STATE_ACTIVE      = 1,  //This thread is currently running and using the cpu
+  TOSTHREAD_STATE_READY       = 2,  //This thread is not currently running, but is not blocked and has work to do 
+  TOSTHREAD_STATE_SUSPENDED   = 3,  //This thread has been suspended by a system call (i.e. blocked)
+};
+
+#endif //THREAD_H
diff --git a/tos/lib/tosthreads/types/thread_queue.h b/tos/lib/tosthreads/types/thread_queue.h
new file mode 100644
index 00000000..209fd36a
--- /dev/null
+++ b/tos/lib/tosthreads/types/thread_queue.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2008 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ */
+ 
+#ifndef THREAD_QUEUE_H
+#define THREAD_QUEUE_H
+
+#include "linked_list.h"
+
+typedef struct thread_queue {
+  linked_list_t l;				//The thread_queue implementation uses a linked list
+} thread_queue_t;
+
+#endif //THREAD_QUEUE_H
diff --git a/tos/platforms/README b/tos/platforms/README
new file mode 100644
index 00000000..7fa7ea76
--- /dev/null
+++ b/tos/platforms/README
@@ -0,0 +1,24 @@
+This directory contains hardware platforms that TinyOS runs on. A hardware
+platform is a collection of "chips," such as microcontrollers, radios,
+and non-volatile storage, whose implementations can be found in tos/chips.
+
+A platform includes code for the hardware resources that chip functionality 
+depend on. For example, the CC1000 chip has a software networking stack (in
+chips/cc1000), which depends on being able to send bytes to the CC1000
+chip over an SPI bus. How the SPI bus works is platform dependent (e.g.,
+it could be shared between several chips and require software arbitration).
+Therefore, the mica2 platform, which has a CC1000 radio, connects the
+CC1000 code to an SPI bus that its microcontroller, an ATmega128, provides.
+
+Every platform directory has a ".platform" file, which specifies 
+flags and options to the nesC compiler. For example, the native compiler
+ncc uses to compile a binary depends on what microcontroller a platform
+has, so a .platform file generally specifies the compiler with the 
+"-gcc" option. Also, as platforms depend on a collection of chips, the
+.platform file specifies those chips with "-I" options.
+
+The standard TinyOS boot sequence depends on a platform providing
+a few components; details can be found in TEP 107.
+
+Phil Levis, last updated: 7/7/2005
+
diff --git a/tos/platforms/btnode3/.platform b/tos/platforms/btnode3/.platform
new file mode 100644
index 00000000..95b0cb2f
--- /dev/null
+++ b/tos/platforms/btnode3/.platform
@@ -0,0 +1,47 @@
+#
+# FILE: btnode3/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  And because of that, the current platform's include directory
+# must be specified, otherwise its search order is last instead of first.
+#
+# $Id: .platform,v 1.7 2008-01-17 23:18:59 klueska Exp $
+#
+
+push( @includes, qw(
+
+  %T/platforms/btnode3
+  %T/platforms/btnode3/chips/cc1000
+  %T/platforms/mica
+  %T/platforms/mica2
+  %T/platforms/mica2/chips/cc1000
+  %T/chips/cc1000
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/i2c
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/timer
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/power
+
+#  %T/platforms/mica2/chips/at45db not existent on btnode3
+#  %T/platforms/mica/chips/at45db  not existent on btnode3
+#  %T/chips/at45db
+
+) );
+
+@opts = qw(
+
+  -gcc=avr-gcc
+  -mmcu=atmega128
+  -fnesc-target=avr
+  -fnesc-no-debug
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
diff --git a/tos/platforms/btnode3/Leds.nc b/tos/platforms/btnode3/Leds.nc
new file mode 100644
index 00000000..7ddc8bf9
--- /dev/null
+++ b/tos/platforms/btnode3/Leds.nc
@@ -0,0 +1,151 @@
+// $Id: Leds.nc,v 1.6 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2006 ETH Zurich. 
+ * Copyright (c) 2005-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Commands for controlling three LEDs. A platform can provide this
+ * interface if it has more than or fewer than three LEDs. In the
+ * former case, these commands refer to the first three LEDs. In the
+ * latter case, some of the commands are null operations, and the set
+ * of non-null operations must be contiguous and start at Led1. That
+ * is, on platforms with 2 LEDs, LED 3's commands are null operations,
+ * while on platforms with 1 LED, LED 2 and LED 3's commands are null
+ * opertations.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ * @author Jan Beutel
+ */
+
+#include "Leds.h"
+
+interface Leds {
+
+  /**
+   * Turn on LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0On();
+
+  /**
+   * Turn off LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0Off();
+
+  /**
+   * Toggle LED 0; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led0Toggle();
+
+  /**
+   * Turn on LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1On();
+
+  /**
+   * Turn off LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1Off();
+
+   /**
+   * Toggle LED 1; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led1Toggle();
+
+ 
+  /**
+   * Turn on LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2On();
+
+  /**
+   * Turn off LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2Off();
+
+   /**
+   * Toggle LED 2; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led2Toggle();
+
+
+  /**
+   * Turn on LED 3. The color of this LED depends on the platform.
+   */
+  async command void led3On();
+
+  /**
+   * Turn off LED 3. The color of this LED depends on the platform.
+   */
+  async command void led3Off();
+
+   /**
+   * Toggle LED 3; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led3Toggle();
+
+
+  /**
+   * Get the current LED settings as a bitmask. Each bit corresponds to
+   * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can
+   * also use the enums LED_LED0, LED_LED1. For example, this expression
+   * will determine whether LED 2 is on:
+   *
+   * <pre> (call Leds.get() & LEDS_LED2) </pre>
+   *
+   * This command supports up to 8 LEDs; if a platform has fewer, then
+   * those LEDs should always be off (their bit is zero). Also see
+   * <tt>set()</tt>.
+   */ 
+  async command uint8_t get();
+
+  
+  /**
+   * Set the current LED configuration using a bitmask.  Each bit
+   * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED
+   * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example,
+   * this statement will configure the LEDs so LED 0 and LED 2 are on:
+   *
+   * <pre> call Leds.set(LEDS_LED0 | LEDS_LED2); </pre>
+   *
+   * This statement will turn LED 1 on if it was not already:
+   *
+   * <pre>call Leds.set(call Leds.get() | LEDS_LED1);</pre>
+   */
+   async command void set(uint8_t val);
+  
+}
diff --git a/tos/platforms/btnode3/LedsC.nc b/tos/platforms/btnode3/LedsC.nc
new file mode 100644
index 00000000..350a7080
--- /dev/null
+++ b/tos/platforms/btnode3/LedsC.nc
@@ -0,0 +1,55 @@
+// $Id: LedsC.nc,v 1.6 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2006 ETH Zurich.  
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * @author Joe Polastre
+ * @author Jan Beutel
+ */
+
+
+configuration LedsC {
+  provides interface Leds;
+}
+implementation {
+  components LedsP, PlatformLedsC;
+
+  Leds = LedsP;
+
+  LedsP.Init <- PlatformLedsC.Init;
+  LedsP.Led0 -> PlatformLedsC.Led0;
+  LedsP.Led1 -> PlatformLedsC.Led1;
+  LedsP.Led2 -> PlatformLedsC.Led2;
+  LedsP.Led3 -> PlatformLedsC.Led3;
+}
+
diff --git a/tos/platforms/btnode3/LedsP.nc b/tos/platforms/btnode3/LedsP.nc
new file mode 100644
index 00000000..4c328eb1
--- /dev/null
+++ b/tos/platforms/btnode3/LedsP.nc
@@ -0,0 +1,196 @@
+// $Id: LedsP.nc,v 1.6 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2006 ETH Zurich.  
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The implementation of the standard 3 LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ * @author Jan Beutel
+ *
+ * @date   March 21, 2005
+ */
+
+module LedsP {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+    interface GeneralIO as Led3;
+  }
+}
+implementation {
+  command error_t Init.init() {
+    atomic {
+      dbg("Init", "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led3.makeOutput();
+      call Led0.set();
+      call Led1.set();
+      call Led2.set();
+      call Led3.set();
+    }
+    return SUCCESS;
+  }
+
+  async command void Leds.led0On() {
+    dbg("LedsC", "LEDS: Led 1 on.\n");
+    call Led0.clr();
+  }
+
+  async command void Leds.led0Off() {
+    dbg("LedsC", "LEDS: Led 1 off.\n");
+    call Led0.set();
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    // this should be removed by dead code elimination when compiled for
+    // the physical motes
+    if (call Led0.get())
+      dbg("LedsC", "LEDS: Led 1 off.\n");
+    else
+      dbg("LedsC", "LEDS: Led 1 on.\n");
+  }
+
+  async command void Leds.led1On() {
+    dbg("LedsC", "LEDS: Led 2 on.\n");
+    call Led1.clr();
+  }
+
+  async command void Leds.led1Off() {
+    dbg("LedsC", "LEDS: Led 2 off.\n");
+    call Led1.set();
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    if (call Led1.get())
+      dbg("LedsC", "LEDS: Led 2 off.\n");
+    else
+      dbg("LedsC", "LEDS: Led 2 on.\n");
+  }
+
+  async command void Leds.led2On() {
+    dbg("LedsC", "LEDS: Led 3 on.\n");
+    call Led2.clr();
+  }
+
+  async command void Leds.led2Off() {
+    dbg("LedsC", "LEDS: Led 3 off.\n");
+    call Led2.set();
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    if (call Led2.get())
+      dbg("LedsC", "LEDS: Led 3 off.\n");
+    else
+      dbg("LedsC", "LEDS: Led 3 on.\n");
+  }
+
+  async command void Leds.led3On() {
+    dbg("LedsC", "LEDS: Led 4 on.\n");
+    call Led3.clr();
+  }
+
+  async command void Leds.led3Off() {
+    dbg("LedsC", "LEDS: Led 4 off.\n");
+    call Led3.set();
+  }
+
+  async command void Leds.led3Toggle() {
+    call Led3.toggle();
+    if (call Led3.get())
+      dbg("LedsC", "LEDS: Led 4 off.\n");
+    else
+      dbg("LedsC", "LEDS: Led 4 on.\n");
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (call Led0.get()) {
+	rval |= LEDS_LED0;
+      }
+      if (call Led1.get()) {
+	rval |= LEDS_LED1;
+      }
+      if (call Led2.get()) {
+	rval |= LEDS_LED2;
+      }
+      if (call Led3.get()) {
+	rval |= LEDS_LED3;
+      }
+    }
+    return rval;
+  }
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led3Off();
+      }
+      if (val & LEDS_LED3) {
+	call Leds.led3On();
+      }
+      else {
+	call Leds.led3Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/btnode3/MotePlatformC.nc b/tos/platforms/btnode3/MotePlatformC.nc
new file mode 100644
index 00000000..f7172abd
--- /dev/null
+++ b/tos/platforms/btnode3/MotePlatformC.nc
@@ -0,0 +1,31 @@
+/* $Id: MotePlatformC.nc,v 1.4 2006-12-12 18:23:40 vlahan Exp $
+ * Copyright (c) 2006 ETH Zurich.
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The porttion of a mica-family initialisation that is btnode3-specific.
+ * 
+ * @author David Gay
+ * @author Jan Beutel
+ */
+configuration MotePlatformC
+{
+  provides interface Init as PlatformInit;
+  uses interface Init as SubInit;
+}
+implementation {
+  components MotePlatformP, HplCC1000InitP, HplAtm128GeneralIOC as IO;
+
+  PlatformInit = MotePlatformP;
+  PlatformInit = HplCC1000InitP;
+  
+  MotePlatformP.SerialIdPin -> IO.PortA4; //TODO: btnode3 does not support this
+  SubInit = MotePlatformP.SubInit;
+  
+}
diff --git a/tos/platforms/btnode3/MotePlatformP.nc b/tos/platforms/btnode3/MotePlatformP.nc
new file mode 100644
index 00000000..940ebd8d
--- /dev/null
+++ b/tos/platforms/btnode3/MotePlatformP.nc
@@ -0,0 +1,50 @@
+/* $Id: MotePlatformP.nc,v 1.5 2007-07-04 22:02:45 beutel Exp $
+ * Copyright (c) 2006 ETH Zurich.
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The porttion of a mica-family initialisation that is btnode3-specific.
+ * 
+ * @author David Gay
+ * @author Jan Beutel
+ */
+module MotePlatformP
+{
+  provides interface Init as PlatformInit;
+  uses interface GeneralIO as SerialIdPin;
+  uses interface Init as SubInit;
+}
+implementation {
+
+  command error_t PlatformInit.init() {
+    // Pull C I/O port pins low to initialize LED's to off
+    // Turn in cc1000 and IO power 
+    // Turn off bluetooth power
+    // Set port C as output only
+    PORTC = 0xb0;
+    DDRC = 0xff;
+    
+    // TODO: release Bluetooth reset pin
+    
+    //btnode3: set latch_select PB5 for now
+    PORTB = 0x20;
+    DDRB = 0x20;
+    
+
+    // Prevent sourcing current
+//    call SerialIdPin.makeI0xffnput(); 
+//    call SerialIdPin.clr();
+
+    return call SubInit.init();
+  }
+
+  default command error_t SubInit.init() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/btnode3/PlatformLedsC.nc b/tos/platforms/btnode3/PlatformLedsC.nc
new file mode 100644
index 00000000..14f77c46
--- /dev/null
+++ b/tos/platforms/btnode3/PlatformLedsC.nc
@@ -0,0 +1,62 @@
+// $Id: PlatformLedsC.nc,v 1.6 2010-06-29 22:07:52 scipio Exp $
+
+/**
+ * Copyright (c) 2006-2007 ETH Zurich.  
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Martin Turon <mturon@xbow.com>
+ * @author Jan Beutel
+ */
+
+#include "hardware.h"
+
+configuration PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  provides interface GeneralIO as Led3;
+  uses interface Init;
+}
+implementation
+{
+  components HplAtm128GeneralIOC as IO;
+  components PlatformP;
+
+  Init = PlatformP.MoteInit;
+    
+  Led0 = IO.PortC0;  // Pin C0 = Blue LED
+  Led1 = IO.PortC1;  // Pin C1 = Red LED
+  Led2 = IO.PortC2;  // Pin C2 = Yellow LED
+  Led3 = IO.PortC3;  // Pin C3 = Green LED
+}
+
diff --git a/tos/platforms/btnode3/chips/cc1000/HplCC1000InitP.nc b/tos/platforms/btnode3/chips/cc1000/HplCC1000InitP.nc
new file mode 100644
index 00000000..f29c42ec
--- /dev/null
+++ b/tos/platforms/btnode3/chips/cc1000/HplCC1000InitP.nc
@@ -0,0 +1,65 @@
+// $Id: HplCC1000InitP.nc,v 1.6 2010-06-29 22:07:52 scipio Exp $
+/*
+ * Copyright (c) 2006 ETH Zurich.  
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * @author David Gay
+ * @author Jan Beutel
+ */
+configuration HplCC1000InitP {
+  provides interface Init as PlatformInit;
+}
+implementation {
+  components HplCC1000P, HplCC1000SpiP, HplAtm128GeneralIOC as IO;
+
+  PlatformInit = HplCC1000P;
+  PlatformInit = HplCC1000SpiP;
+
+  HplCC1000P.CHP_OUT -> IO.PortE7; //btnode3 definitions
+  HplCC1000P.PALE -> IO.PortD5;
+  HplCC1000P.PCLK -> IO.PortD6;
+  HplCC1000P.PDATA -> IO.PortD7;
+
+  HplCC1000SpiP.SpiSck -> IO.PortB1;
+  HplCC1000SpiP.SpiMiso -> IO.PortB3;
+  HplCC1000SpiP.SpiMosi -> IO.PortB2;
+//  HplCC1000SpiP.OC1C -> IO.PortB7; //not available on BTnode3
+}
diff --git a/tos/platforms/btnode3/chips/cc1000/HplCC1000SpiP.nc b/tos/platforms/btnode3/chips/cc1000/HplCC1000SpiP.nc
new file mode 100644
index 00000000..1c7f019b
--- /dev/null
+++ b/tos/platforms/btnode3/chips/cc1000/HplCC1000SpiP.nc
@@ -0,0 +1,127 @@
+// $Id: HplCC1000SpiP.nc,v 1.6 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2006 ETH Zurich.  
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low-level functions to access the CC1000 bus. Built using the mica2
+ * hardware SPI.
+ *
+ * @author Jaein Jeong
+ * @author Philip buonadonna
+ * @author Jan Beutel
+ */
+
+
+module HplCC1000SpiP {
+  provides interface Init as PlatformInit;
+  provides interface HplCC1000Spi;
+  //uses interface PowerManagement;
+  uses {
+    interface GeneralIO as SpiSck;
+    interface GeneralIO as SpiMiso;
+    interface GeneralIO as SpiMosi;
+    //interface GeneralIO as OC1C;
+  }
+}
+implementation
+{
+  uint8_t outgoingByte;
+
+  command error_t PlatformInit.init() {
+    call SpiSck.makeInput();
+    //call OC1C.makeInput();
+    call HplCC1000Spi.rxMode();
+    return SUCCESS;
+  }
+
+  AVR_ATOMIC_HANDLER(SIG_SPI) {
+    register uint8_t temp = SPDR;
+    SPDR = outgoingByte;
+    signal HplCC1000Spi.dataReady(temp);
+  }
+  default async event void HplCC1000Spi.dataReady(uint8_t data) { }
+  
+
+  async command void HplCC1000Spi.writeByte(uint8_t data) {
+    atomic outgoingByte = data;
+  }
+
+  async command bool HplCC1000Spi.isBufBusy() {
+    return bit_is_clear(SPSR, SPIF);
+  }
+
+  async command uint8_t HplCC1000Spi.readByte() {
+    return SPDR;
+  }
+
+  async command void HplCC1000Spi.enableIntr() {
+    //sbi(SPCR,SPIE);
+    SPCR = 0xc0;
+    CLR_BIT(DDRB, 0);
+    //call PowerManagement.adjustPower();
+  }
+
+  async command void HplCC1000Spi.disableIntr() {
+    CLR_BIT(SPCR, SPIE);
+    SET_BIT(DDRB, 0);
+    CLR_BIT(PORTB, 0);
+    //call PowerManagement.adjustPower();
+  }
+
+  async command void HplCC1000Spi.initSlave() {
+    atomic {
+      CLR_BIT(SPCR, CPOL);		// Set proper polarity...
+      CLR_BIT(SPCR, CPHA);		// ...and phase
+      SET_BIT(SPCR, SPIE);	// enable spi port
+      SET_BIT(SPCR, SPE);
+    } 
+  }
+	
+  async command void HplCC1000Spi.txMode() {
+    call SpiMiso.makeOutput();
+    call SpiMosi.makeOutput();
+  }
+
+  async command void HplCC1000Spi.rxMode() {
+    call SpiMiso.makeInput();
+    call SpiMosi.makeInput();
+  }
+}
diff --git a/tos/platforms/btnode3/hardware.h b/tos/platforms/btnode3/hardware.h
new file mode 100644
index 00000000..4ceac330
--- /dev/null
+++ b/tos/platforms/btnode3/hardware.h
@@ -0,0 +1,79 @@
+/**                                                                     
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2006-2007 ETH Zurich.
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Alan Broad <abroad@xbow.com>
+ *  @author Matt Miller <mmiller@xbow.com>
+ *  @author Martin Turon <mturon@xbow.com>
+ *  @author Jan Beutel <j.beutel@ieee.org>
+ * 
+ *  $Id: hardware.h,v 1.9 2010-06-29 22:07:52 scipio Exp $
+ */
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#ifndef MHZ
+/* Clock rate is ~8MHz except if specified by user 
+   (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */
+#define MHZ 8
+#endif
+
+#include <atm128hardware.h>
+#include <Atm128Adc.h>
+#include <MicaTimer.h>
+
+// enum so components can override power saving,
+// as per TEP 112.
+enum {
+  TOS_SLEEP_NONE = ATM128_POWER_IDLE,
+};
+
+// A/D constants (channels, etc)
+enum {
+  CHANNEL_RSSI       = ATM128_ADC_SNGL_ADC2,
+  CHANNEL_THERMISTOR = ATM128_ADC_SNGL_ADC1,    // not available on BTnode3
+  CHANNEL_BATTERY    = ATM128_ADC_SNGL_ADC3,
+};
+
+enum {
+  PLATFORM_BAUDRATE = 57600L
+};
+
+#endif //HARDWARE_H
diff --git a/tos/platforms/btnode3/platform.h b/tos/platforms/btnode3/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/epic/.platform b/tos/platforms/epic/.platform
new file mode 100644
index 00000000..49ae2055
--- /dev/null
+++ b/tos/platforms/epic/.platform
@@ -0,0 +1,80 @@
+
+# Perl snippets that are interpreted by ncc.
+
+# Directories to add to the include path for all Epic applications.
+# Includes that should take precedence must come first.  Platforms
+# come before chips because they may override files.  These must be
+# specified as @includes instead of -I's to @opts, otherwise the %T
+# won't be processed by ncc.
+
+push( @includes, qw(
+
+  %T/platforms/epic
+  %T/platforms/epic/chips/at45db
+  %T/platforms/epic/chips/ds2411
+  %T/platforms/telosa
+  %T/platforms/telosa/chips/cc2420
+  %T/chips/cc2420
+  %T/chips/cc2420/alarm
+  %T/chips/cc2420/control
+  %T/chips/cc2420/csma
+  %T/chips/cc2420/interfaces
+  %T/chips/cc2420/link
+  %T/chips/cc2420/lowpan
+  %T/chips/cc2420/lpl
+  %T/chips/cc2420/packet
+  %T/chips/cc2420/receive
+  %T/chips/cc2420/spi
+  %T/chips/cc2420/transmit
+  %T/chips/cc2420/unique
+  %T/chips/cc2420/security
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/dma
+  %T/chips/msp430/pins
+  %T/chips/msp430/timer
+  %T/chips/msp430/usart
+  %T/chips/msp430/sensors
+  %T/chips/at45db
+  %T/chips/ds2401
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+  %T/lib/power
+) );
+
+# The @opts list contains parameters that are passed to ncc.
+@opts = qw(
+  -gcc=msp430-gcc
+  -mmcu=msp430x1611
+  -fnesc-target=msp430
+  -fnesc-no-debug
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=2 " .
+    "version=msp430-3.2.3 " .
+    "short=2,2 " .
+    "int=2,2 " .
+    "long=4,2 " .
+    "long_long=8,2 " .
+    "pointer=2,2 " .
+    "enum=2,2 " .
+    "float=4,2 " .
+    "double=4,2 " .
+    "long_double=4,2 " .
+    "void=1,1 " .
+    "fun=1,2 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
diff --git a/tos/platforms/epic/DemoSensorC.nc b/tos/platforms/epic/DemoSensorC.nc
new file mode 100644
index 00000000..52cedf16
--- /dev/null
+++ b/tos/platforms/epic/DemoSensorC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorC on the telosb platform provides a
+ * voltage reading, using VoltageC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-08-07 06:37:05 $
+ * 
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation
+{
+  components new VoltageC() as DemoSensor;
+  Read = DemoSensor;
+}
diff --git a/tos/platforms/epic/DemoSensorNowC.nc b/tos/platforms/epic/DemoSensorNowC.nc
new file mode 100644
index 00000000..d729682d
--- /dev/null
+++ b/tos/platforms/epic/DemoSensorNowC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorNowC is a generic sensor device that provides a 16-bit
+ * value that can be read from async context. The platform author
+ * chooses which sensor actually sits behind DemoSensorNowC, and
+ * though it's probably Voltage, Light, or Temperature, there are no
+ * guarantees.
+ *
+ * This particular DemoSensorNowC on the telosb platform provides a
+ * voltage reading, using VoltageC.
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-08-07 06:37:05 $
+ * 
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation
+{
+  components new Msp430InternalVoltageC() as DemoSensorNow;
+
+  Resource = DemoSensorNow;
+  ReadNow = DemoSensorNow;
+}
diff --git a/tos/platforms/epic/DemoSensorStreamC.nc b/tos/platforms/epic/DemoSensorStreamC.nc
new file mode 100644
index 00000000..c7ec91ef
--- /dev/null
+++ b/tos/platforms/epic/DemoSensorStreamC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorStreamC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorStreamC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorStreamC on the telosb platform provides a
+ * voltage reading, using VoltageStreamC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-08-07 06:37:05 $
+ * 
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream<uint16_t>;
+}
+implementation
+{
+  components new VoltageStreamC() as DemoSensor;
+  ReadStream = DemoSensor;
+}
diff --git a/tos/platforms/epic/HplUserButtonC.nc b/tos/platforms/epic/HplUserButtonC.nc
new file mode 100644
index 00000000..c16fd730
--- /dev/null
+++ b/tos/platforms/epic/HplUserButtonC.nc
@@ -0,0 +1,54 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telos platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+configuration HplUserButtonC {
+  provides interface GeneralIO;
+  provides interface GpioInterrupt;
+}
+implementation {
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components HplMsp430InterruptC as InterruptC;
+
+  components new Msp430GpioC() as UserButtonC;
+  UserButtonC -> GeneralIOC.Port27;
+  GeneralIO = UserButtonC;
+
+  components new Msp430InterruptC() as InterruptUserButtonC;
+  InterruptUserButtonC.HplInterrupt -> InterruptC.Port27;
+  GpioInterrupt = InterruptUserButtonC.Interrupt;
+}
diff --git a/tos/platforms/epic/Ieee154MessageC.nc b/tos/platforms/epic/Ieee154MessageC.nc
new file mode 100644
index 00000000..2acb1e4e
--- /dev/null
+++ b/tos/platforms/epic/Ieee154MessageC.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+/**
+ *
+ * @author Stephen Dawson-Haggerty
+ */
+ 
+configuration Ieee154MessageC  {
+  provides {
+    interface SplitControl;
+
+    interface Resource as SendResource[uint8_t clientId];
+    interface Ieee154Send;
+    interface Receive as Ieee154Receive;
+
+    interface Ieee154Packet;
+    interface Packet;
+
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+    interface LowPowerListening;
+    interface PacketLink;
+  }
+
+} implementation {
+  components CC2420Ieee154MessageC as Msg;
+
+  SplitControl = Msg;
+  SendResource = Msg;
+  Ieee154Send  = Msg;
+  Ieee154Receive = Msg;
+  Ieee154Packet = Msg;
+  Packet = Msg;
+  
+  PacketAcknowledgements = Msg;
+  LinkPacketMetadata = Msg;
+  LowPowerListening = Msg;
+  PacketLink = Msg;
+}
diff --git a/tos/platforms/epic/MoteClockC.nc b/tos/platforms/epic/MoteClockC.nc
new file mode 100644
index 00000000..bada303e
--- /dev/null
+++ b/tos/platforms/epic/MoteClockC.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id: MoteClockC.nc,v 1.1 2008-08-07 06:37:05 prabal Exp $
+ *
+ */
+ 
+ /**
+ * @author Vlado Handziski <handzisk@tkn.tu-berlind.de>
+ */
+ 
+configuration MoteClockC
+{
+  provides interface Init as MoteClockInit;
+}
+implementation
+
+{
+  components Msp430ClockC, MoteClockP;
+  
+  MoteClockInit = Msp430ClockC.Init;
+  //MoteClockP.Msp430ClockInit -> Msp430ClockC;
+}
diff --git a/tos/platforms/epic/MoteClockP.nc b/tos/platforms/epic/MoteClockP.nc
new file mode 100644
index 00000000..b63c0504
--- /dev/null
+++ b/tos/platforms/epic/MoteClockP.nc
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id: MoteClockP.nc,v 1.1 2008-08-07 06:37:05 prabal Exp $
+ *
+ */
+ 
+  /**
+ * @author Vlado Handziski <handzisk@tkn.tu-berlind.de>
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+ 
+module MoteClockP {
+  uses interface Msp430ClockInit;
+}
+
+implementation {
+
+  event void Msp430ClockInit.setupDcoCalibrate()
+  {
+  
+    // --- setup ---
+
+    TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0
+    TBCTL = TBSSEL0 | MC1;
+    BCSCTL1 = XT2OFF | RSEL2;
+    BCSCTL2 = DCOR; // enable DCOR
+    TBCCTL0 = CM0;
+   }
+    
+  event void Msp430ClockInit.initClocks()
+  {
+    // BCSCTL1
+    // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK
+    // .XTS = 0; set low frequency mode for LXFT1
+    // .DIVA = 0; set the divisor on ACLK to 1
+    // .RSEL, do not modify
+    BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0));
+
+    // BCSCTL2
+    // .SELM = 0; select DCOCLK as source for MCLK
+    // .DIVM = 0; set the divisor of MCLK to 1
+    // .SELS = 0; select DCOCLK as source for SCLK
+    // .DIVS = 2; set the divisor of SCLK to 4
+    // .DCOR = 1; select internal resistor for DCO
+    BCSCTL2 = DIVS1 | DCOR;
+
+    // IE1.OFIE = 0; no interrupt for oscillator fault
+    CLR_FLAG( IE1, OFIE );
+  }
+
+  event void Msp430ClockInit.initTimerA()
+  {
+    TAR = 0;
+
+    // TACTL
+    // .TACLGRP = 0; each TACL group latched independently
+    // .CNTL = 0; 16-bit counter
+    // .TASSEL = 2; source SMCLK = DCO/4
+    // .ID = 0; input divisor of 1
+    // .MC = 0; initially disabled
+    // .TACLR = 0; reset timer A
+    // .TAIE = 1; enable timer A interrupts
+    TACTL = TASSEL1 | TAIE;
+  }
+
+  event void Msp430ClockInit.initTimerB()
+  {
+    TBR = 0;
+
+    // TBCTL
+    // .TBCLGRP = 0; each TBCL group latched independently
+    // .CNTL = 0; 16-bit counter
+    // .TBSSEL = 1; source ACLK
+    // .ID = 0; input divisor of 1
+    // .MC = 0; initially disabled
+    // .TBCLR = 0; reset timer B
+    // .TBIE = 1; enable timer B interrupts
+    TBCTL = TBSSEL0 | TBIE;
+  }
+ 
+}
diff --git a/tos/platforms/epic/MotePlatformC.nc b/tos/platforms/epic/MotePlatformC.nc
new file mode 100644
index 00000000..43ea3fbe
--- /dev/null
+++ b/tos/platforms/epic/MotePlatformC.nc
@@ -0,0 +1,48 @@
+module MotePlatformC @safe() {
+  provides interface Init;
+  uses interface Init as SubInit;
+}
+implementation {
+
+  command error_t Init.init() {
+    // reset all of the ports to be input and using i/o functionality
+    atomic
+      {
+	P1SEL = 0;
+	P2SEL = 0;
+	P3SEL = 0;
+	P4SEL = 0;
+	P5SEL = 0;
+	P6SEL = 0;
+
+	P1OUT = 0x00;
+	P1DIR = 0xe0;
+ 
+	P2OUT = 0x30;
+	P2DIR = 0x7b;
+
+	P3OUT = 0x00;
+	P3DIR = 0xf1;
+
+	P4OUT = 0xdd;
+	P4DIR = 0xfd;
+
+	P5OUT = 0xff;
+	P5DIR = 0xff;
+
+	P6OUT = 0x00;
+	P6DIR = 0xff;
+
+	P1IE = 0;
+	P2IE = 0;
+
+	// the commands above take care of the pin directions
+	// there is no longer a need for explicit set pin
+	// directions using the TOSH_SET/CLR macros
+
+      }//atomic
+    return call SubInit.init();
+  }
+
+ default command error_t SubInit.init() { return SUCCESS; }
+}
diff --git a/tos/platforms/epic/PlatformC.nc b/tos/platforms/epic/PlatformC.nc
new file mode 100644
index 00000000..2ff091bc
--- /dev/null
+++ b/tos/platforms/epic/PlatformC.nc
@@ -0,0 +1,56 @@
+// $Id: PlatformC.nc,v 1.3 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2008 The Regents of the University of
+ * California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Initialization code responsible for booting Epic to a usable state.
+ *
+ * @author Prabal Dutta <prabal@cs.berkeley.edu>
+ */
+#include "hardware.h"
+
+configuration PlatformC {
+  provides {
+    interface Init;
+  }
+}
+implementation {
+  components PlatformP;
+  components MoteClockC;
+  components MotePlatformC;
+
+  Init = PlatformP;
+  PlatformP.MoteClockInit -> MoteClockC;
+  PlatformP.MoteInit -> MotePlatformC;
+}
diff --git a/tos/platforms/epic/PlatformLedsC.nc b/tos/platforms/epic/PlatformLedsC.nc
new file mode 100644
index 00000000..47340eaa
--- /dev/null
+++ b/tos/platforms/epic/PlatformLedsC.nc
@@ -0,0 +1,30 @@
+#include "hardware.h"
+
+configuration PlatformLedsC {
+  provides {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+  uses {
+    interface Init;
+  }
+}
+implementation {
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components new Msp430GpioC() as Led0Impl;
+  components new Msp430GpioC() as Led1Impl;
+  components new Msp430GpioC() as Led2Impl;
+  components PlatformP;
+
+  Init = PlatformP.LedsInit;
+
+  Led0 = Led0Impl;
+  Led0Impl -> GeneralIOC.Port40;
+
+  Led1 = Led1Impl;
+  Led1Impl -> GeneralIOC.Port43;
+
+  Led2 = Led2Impl;
+  Led2Impl -> GeneralIOC.Port47;
+}
diff --git a/tos/platforms/epic/PlatformP.nc b/tos/platforms/epic/PlatformP.nc
new file mode 100644
index 00000000..bdda08df
--- /dev/null
+++ b/tos/platforms/epic/PlatformP.nc
@@ -0,0 +1,64 @@
+// $Id: PlatformP.nc,v 1.3 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2008 The Regents of the University of
+ * California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Initialization code responsible for booting Epic to a usable state.
+ *
+ * @author Prabal Dutta <prabal@cs.berkeley.edu>
+ */
+#include "hardware.h"
+
+module PlatformP {
+  provides {
+    interface Init;
+  }
+  uses {
+    interface Init as MoteClockInit;
+    interface Init as MoteInit;
+    interface Init as LedsInit;
+  }
+}
+implementation {
+  command error_t Init.init() {
+    call MoteClockInit.init();
+    call MoteInit.init();
+    call LedsInit.init();
+    return SUCCESS;
+  }
+
+  default command error_t LedsInit.init() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/epic/UserButton.h b/tos/platforms/epic/UserButton.h
new file mode 100644
index 00000000..726d14d7
--- /dev/null
+++ b/tos/platforms/epic/UserButton.h
@@ -0,0 +1,44 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telosb platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+#ifndef USERBUTTON_H
+#define USERBUTTON_H
+
+typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t;
+
+#endif
diff --git a/tos/platforms/epic/UserButtonC.nc b/tos/platforms/epic/UserButtonC.nc
new file mode 100644
index 00000000..f3b21c96
--- /dev/null
+++ b/tos/platforms/epic/UserButtonC.nc
@@ -0,0 +1,63 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telosb platform. Get
+ * returns the current state of the button by reading the pin,
+ * regardless of whether enable() or disable() has been called on the
+ * Interface. Notify.enable() and Notify.disable() modify the
+ * underlying interrupt state of the pin, and have the effect of
+ * enabling or disabling notifications that the button has changed
+ * state.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+#include <UserButton.h>
+
+configuration UserButtonC {
+  provides interface Get<button_state_t>;
+  provides interface Notify<button_state_t>;
+}
+implementation {
+  components HplUserButtonC;
+  components new SwitchToggleC();
+  SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt;
+  SwitchToggleC.GeneralIO -> HplUserButtonC.GeneralIO;
+
+  components UserButtonP;
+  Get = UserButtonP;
+  Notify = UserButtonP;
+
+  UserButtonP.GetLower -> SwitchToggleC.Get;
+  UserButtonP.NotifyLower -> SwitchToggleC.Notify;
+}
diff --git a/tos/platforms/epic/UserButtonP.nc b/tos/platforms/epic/UserButtonP.nc
new file mode 100644
index 00000000..b3ed897f
--- /dev/null
+++ b/tos/platforms/epic/UserButtonP.nc
@@ -0,0 +1,75 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telosb platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+#include <UserButton.h>
+
+module UserButtonP {
+  provides interface Get<button_state_t>;
+  provides interface Notify<button_state_t>;
+
+  uses interface Get<bool> as GetLower;
+  uses interface Notify<bool> as NotifyLower;
+}
+implementation {
+  
+  command button_state_t Get.get() { 
+    // telosb user button pin is high when released - invert state
+    if ( call GetLower.get() ) {
+      return BUTTON_RELEASED;
+    } else {
+      return BUTTON_PRESSED;
+    }
+  }
+
+  command error_t Notify.enable() {
+    return call NotifyLower.enable();
+  }
+
+  command error_t Notify.disable() {
+    return call NotifyLower.disable();
+  }
+
+  event void NotifyLower.notify( bool val ) {
+    // telosb user button pin is high when released - invert state
+    if ( val ) {
+      signal Notify.notify( BUTTON_RELEASED );
+    } else {
+      signal Notify.notify( BUTTON_PRESSED );
+    }
+  }
+}
diff --git a/tos/platforms/epic/VoltageC.nc b/tos/platforms/epic/VoltageC.nc
new file mode 100644
index 00000000..ea59a9e4
--- /dev/null
+++ b/tos/platforms/epic/VoltageC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-08-07 06:37:05 $
+ */
+
+generic configuration VoltageC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  Read = Msp430InternalVoltageC.Read;
+}
+
diff --git a/tos/platforms/epic/VoltageStreamC.nc b/tos/platforms/epic/VoltageStreamC.nc
new file mode 100644
index 00000000..ff6e476e
--- /dev/null
+++ b/tos/platforms/epic/VoltageStreamC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-08-07 06:37:05 $
+ */
+
+generic configuration VoltageStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  ReadStream = Msp430InternalVoltageC.ReadStream;
+}
+
diff --git a/tos/platforms/epic/chips/at45db/HplAt45dbC.nc b/tos/platforms/epic/chips/at45db/HplAt45dbC.nc
new file mode 100644
index 00000000..ef992a8a
--- /dev/null
+++ b/tos/platforms/epic/chips/at45db/HplAt45dbC.nc
@@ -0,0 +1,50 @@
+/*
+* Copyright (c) 2006, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+configuration HplAt45dbC {
+  provides interface HplAt45db;
+}
+implementation {
+
+  components new HplAt45dbByteC(10),
+	new Msp430Spi0C() as Spi,
+	HplAt45dbP,
+	HplMsp430GeneralIOC as MspGeneralIO,
+	new Msp430GpioC() as Select;
+
+  HplAt45db = HplAt45dbByteC;
+
+  HplAt45dbByteC.Resource -> Spi;
+  HplAt45dbByteC.FlashSpi -> Spi;
+  HplAt45dbByteC.HplAt45dbByte -> HplAt45dbP;
+
+  Select -> MspGeneralIO.Port44;
+  HplAt45dbP.Select -> Select;
+  HplAt45dbP.FlashSpi -> Spi;
+}
diff --git a/tos/platforms/epic/chips/at45db/HplAt45dbP.nc b/tos/platforms/epic/chips/at45db/HplAt45dbP.nc
new file mode 100644
index 00000000..b3be5b95
--- /dev/null
+++ b/tos/platforms/epic/chips/at45db/HplAt45dbP.nc
@@ -0,0 +1,71 @@
+/*
+* Copyright (c) 2006, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+module HplAt45dbP {
+  provides {
+    interface HplAt45dbByte;
+  }
+  uses {
+    interface SpiByte as FlashSpi;
+    interface GeneralIO as Select;
+  }
+}
+implementation
+{
+  command void HplAt45dbByte.select() {
+    call Select.clr();
+  }
+
+  command void HplAt45dbByte.deselect() {
+    call Select.set();
+  }
+
+  task void idleTask() {
+    uint8_t status;
+    status = call FlashSpi.write(0);
+    if (!(status & 0x80)) {
+      post idleTask();
+    } else {
+      //printf("idle: %d\n", status);
+      signal HplAt45dbByte.idle();
+    }
+  }
+
+  command void HplAt45dbByte.waitIdle() {
+    post idleTask();
+  }
+
+  command bool HplAt45dbByte.getCompareStatus() {
+    uint8_t status;
+    status = call FlashSpi.write(0);
+    //printf("s: %d\n", status);
+    return (!(status & 0x40));
+  }
+}
diff --git a/tos/platforms/epic/chips/at45db/HplAt45db_chip.h b/tos/platforms/epic/chips/at45db/HplAt45db_chip.h
new file mode 100644
index 00000000..067ce558
--- /dev/null
+++ b/tos/platforms/epic/chips/at45db/HplAt45db_chip.h
@@ -0,0 +1,56 @@
+// $Id: HplAt45db_chip.h,v 1.2 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef HPLAT45DB_CHIP_H
+#define HPLAT45DB_CHIP_H
+
+// flash characteristics
+enum {
+  AT45_MAX_PAGES = 4096,
+  AT45_PAGE_SIZE = 528,
+  AT45_PAGE_SIZE_LOG2 = 9 // For those who want to ignore the last 8 bytes
+};
+
+typedef uint16_t at45page_t;
+typedef uint16_t at45pageoffset_t; /* must fit 0 to AT45_PAGE_SIZE - 1 */
+
+#endif
diff --git a/tos/platforms/epic/chips/ds2411/CachedIeeeEui64C.nc b/tos/platforms/epic/chips/ds2411/CachedIeeeEui64C.nc
new file mode 100644
index 00000000..0a5bcde4
--- /dev/null
+++ b/tos/platforms/epic/chips/ds2411/CachedIeeeEui64C.nc
@@ -0,0 +1,40 @@
+// $Id: CachedIeeeEui64C.nc,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai
+ */
+
+/**
+ * Cache an EUI 64 at initialization time and return the cached value for
+ * subsequent queries.
+ */
+configuration CachedIeeeEui64C {
+  uses interface LocalIeeeEui64 as SubIeeeEui64;
+  provides interface LocalIeeeEui64;
+} implementation {
+  components CachedIeeeEui64P, MotePlatformC;
+
+  MotePlatformC.SubInit -> CachedIeeeEui64P.Init;
+
+  SubIeeeEui64 = CachedIeeeEui64P;
+  LocalIeeeEui64 = CachedIeeeEui64P;
+
+}
diff --git a/tos/platforms/epic/chips/ds2411/DallasId48.h b/tos/platforms/epic/chips/ds2411/DallasId48.h
new file mode 100644
index 00000000..9958dbd5
--- /dev/null
+++ b/tos/platforms/epic/chips/ds2411/DallasId48.h
@@ -0,0 +1,64 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*- */
+/**
+ * data structures for dallas/maxim serial ID chips
+ */
+/*
+ * @author Andreas Koepke
+ */
+
+#ifndef DALLASID48_H
+#define DALLASID48_H
+
+enum {
+    DALLASID48_SERIAL_LENGTH = 6,
+    DALLASID48_DATA_LENGTH = 8
+};
+
+typedef union dallasid48_serial_t {
+    uint8_t data[DALLASID48_DATA_LENGTH];
+    struct {
+        uint8_t family_code;
+        uint8_t serial[DALLASID48_SERIAL_LENGTH];
+        uint8_t crc;
+    };
+} dallasid48_serial_t;
+
+// The CRC polynomial is X^8 + X^5 + X^4 + 1,
+// code is taken from http://linux.die.net/man/3/_crc_ccitt_update
+
+bool dallasid48checkCrc(const dallasid48_serial_t *id) {
+    uint8_t crc = 0;
+    uint8_t idx;
+    for(idx = 0; idx < DALLASID48_DATA_LENGTH; idx++) {
+        uint8_t i;
+        crc = crc ^ (*id).data[idx];
+        for(i = 0; i < 8; i++) {
+            if(crc & 0x01) {
+                crc = (crc >> 1) ^ 0x8C;
+            }
+            else {
+                crc >>= 1;
+            }
+        }
+    }
+    return crc == 0;
+}
+
+/* test application 
+
+   #include <stdio.h>
+   #include <stdlib.h>
+   #include <stdint.h>
+   #ifndef bool
+   #define bool uint8_t 
+   #endif
+   #include "DallasId48.h"
+   
+   int main(void) {
+        dallasid48_serial_t id = { 0x02, 0x1C, 0xB8, 0x01, 0x00, 0x00, 0x00, 0xA2};
+        printf("fam: %x, crc: %x, crc ok: %i\n", id.family_code, id.crc, dallasid48checkCrc(&id));
+   }
+
+*/
+
+#endif // DALLASID48_H
diff --git a/tos/platforms/epic/chips/ds2411/DallasId48ToIeeeEui64C.nc b/tos/platforms/epic/chips/ds2411/DallasId48ToIeeeEui64C.nc
new file mode 100644
index 00000000..f0cdc7e4
--- /dev/null
+++ b/tos/platforms/epic/chips/ds2411/DallasId48ToIeeeEui64C.nc
@@ -0,0 +1,33 @@
+
+#include "PlatformIeeeEui64.h"
+
+module DallasId48ToIeeeEui64C {
+  provides interface LocalIeeeEui64;
+  uses interface ReadId48;
+} implementation {
+  command ieee_eui64_t LocalIeeeEui64.getId() {
+    uint8_t id[6];
+    ieee_eui64_t eui;
+    if (call ReadId48.read(id) != SUCCESS) {
+      memset(eui.data, 0, 8);
+      goto done;
+    }
+
+    eui.data[0] = IEEE_EUI64_COMPANY_ID_0;
+    eui.data[1] = IEEE_EUI64_COMPANY_ID_1;
+    eui.data[2] = IEEE_EUI64_COMPANY_ID_2;
+
+    // 16 bits of the ID is generated by software
+    // could be used for hardware model id and revision, for example
+    eui.data[3] = IEEE_EUI64_SERIAL_ID_0;
+    eui.data[4] = IEEE_EUI64_SERIAL_ID_1;
+
+    // 24 least significant bits of the serial ID read from the DS2401
+    eui.data[5] = id[2];
+    eui.data[6] = id[1];
+    eui.data[7] = id[0];
+
+  done:
+    return eui;
+  }
+}
diff --git a/tos/platforms/epic/chips/ds2411/Ds2411C.nc b/tos/platforms/epic/chips/ds2411/Ds2411C.nc
new file mode 100644
index 00000000..7a8e39be
--- /dev/null
+++ b/tos/platforms/epic/chips/ds2411/Ds2411C.nc
@@ -0,0 +1,29 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*- */
+/**
+ * DS2411 tmote sky serial id
+ */
+/**
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+
+#include "Timer.h"
+
+configuration Ds2411C {
+    provides interface ReadId48;
+}
+implementation {
+    components
+        Ds2411P,
+        PlatformOneWireLowLevelC,
+        OneWireMasterC,
+        BusyWaitMicroC;
+
+    components HplMsp430GeneralIOC as Hpl,
+      new Msp430GpioC() as Gpio;
+    Gpio.HplGeneralIO -> Hpl.Port24;
+    
+    ReadId48 = Ds2411P;
+    Ds2411P.OneWire -> OneWireMasterC;
+    OneWireMasterC.Pin -> Gpio;
+    OneWireMasterC.BusyWait -> BusyWaitMicroC;
+}
diff --git a/tos/platforms/epic/chips/ds2411/Ds2411P.nc b/tos/platforms/epic/chips/ds2411/Ds2411P.nc
new file mode 100644
index 00000000..ba875251
--- /dev/null
+++ b/tos/platforms/epic/chips/ds2411/Ds2411P.nc
@@ -0,0 +1,49 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*- */
+/**
+ * DS2411 telosb tmote sky serial id
+ */
+/**
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+
+#include "DallasId48.h"
+
+module Ds2411P {
+    provides {
+        interface ReadId48;
+    }
+    uses {
+        interface OneWireStream as OneWire;
+    }
+}
+implementation {
+    bool haveId = FALSE;
+    dallasid48_serial_t ds2411id;
+
+    error_t readId() {
+        error_t e = call OneWire.read(0x33, ds2411id.data, DALLASID48_DATA_LENGTH);
+        if(e == SUCCESS) {
+            if(dallasid48checkCrc(&ds2411id)) {
+                haveId = TRUE;
+            }
+            else {
+                e = EINVAL;
+            }
+        }
+        return e;
+    }
+    
+    command error_t ReadId48.read(uint8_t *id) {
+        error_t e = SUCCESS;
+        if(!haveId) {
+            e = readId();
+        }
+        if(haveId) {
+            uint8_t i;
+            for(i = 0; i < DALLASID48_SERIAL_LENGTH; i++) {
+                id[i] = ds2411id.serial[i];
+            }
+        }
+        return e;
+    }
+}
diff --git a/tos/platforms/epic/chips/ds2411/LocalIeeeEui64C.nc b/tos/platforms/epic/chips/ds2411/LocalIeeeEui64C.nc
new file mode 100644
index 00000000..43b5c827
--- /dev/null
+++ b/tos/platforms/epic/chips/ds2411/LocalIeeeEui64C.nc
@@ -0,0 +1,35 @@
+// $Id: LocalIeeeEui64C.nc,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai
+ * Epic port by Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ */
+
+configuration LocalIeeeEui64C {
+  provides interface LocalIeeeEui64;
+} implementation {
+  components
+    Ds2411C,
+    DallasId48ToIeeeEui64C;
+
+  LocalIeeeEui64 = DallasId48ToIeeeEui64C;
+  DallasId48ToIeeeEui64C.ReadId48 -> Ds2411C;
+}
diff --git a/tos/platforms/epic/chips/ds2411/OneWireMasterC.nc b/tos/platforms/epic/chips/ds2411/OneWireMasterC.nc
new file mode 100644
index 00000000..f7b824cb
--- /dev/null
+++ b/tos/platforms/epic/chips/ds2411/OneWireMasterC.nc
@@ -0,0 +1,123 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*- */
+/**
+ * Dallas/Maxim 1wire bus master
+ *
+ */
+
+module OneWireMasterC {
+    provides {
+        interface OneWireStream as OneWire;
+    }
+    uses {
+        interface GeneralIO as Pin;
+        interface BusyWait<TMicro, uint16_t>;
+    }
+}
+implementation {
+    
+    typedef enum {
+        DELAY_5US = 5,                              
+        RESET_LOW_TIME = 560,                       // min: 480us, max: 640 us
+        DELAY_60US = 60,                            // min: 15us, max: 60us
+        PRESENCE_DETECT_LOW_TIME = 240,             // min: 60us, max: 240us
+        PRESENCE_RESET_HIGH_TIME = 480,             // maximum recommended value
+        SLOT_TIME   =  65,
+    } onewiretimes_t;
+
+    bool reset() {
+        uint16_t i;
+        call Pin.makeInput();
+        call Pin.clr();
+        call Pin.makeOutput();
+        call BusyWait.wait(RESET_LOW_TIME);
+        call Pin.makeInput();
+        call BusyWait.wait(DELAY_60US);
+        // wait until either the pin goes low or the timer expires
+        for(i = 0; i < PRESENCE_DETECT_LOW_TIME; i += DELAY_5US, call BusyWait.wait(DELAY_5US))
+          if (!call Pin.get()) break;
+        call BusyWait.wait(PRESENCE_RESET_HIGH_TIME - DELAY_60US);
+        return i < PRESENCE_DETECT_LOW_TIME;
+    }
+
+    void writeOne() {
+        call Pin.makeOutput();
+        call BusyWait.wait(DELAY_5US);
+        call Pin.makeInput();
+        call BusyWait.wait(SLOT_TIME);
+    }
+    
+    void writeZero() {
+        call Pin.makeOutput();
+        call BusyWait.wait(DELAY_60US);
+        call Pin.makeInput();
+        call BusyWait.wait(DELAY_5US);
+    }
+    
+    bool readBit() {
+        bool bit;
+        call Pin.makeOutput();
+        call BusyWait.wait(DELAY_5US);
+        call Pin.makeInput();
+        call BusyWait.wait(DELAY_5US);
+        bit = call Pin.get();
+        call BusyWait.wait(SLOT_TIME);
+        return bit;
+    }
+    
+    void writeByte(uint8_t c) {
+        uint8_t j;
+        for(j = 0; j < 8; j++) {
+            if(c & 0x01) {
+                writeOne();
+            }
+            else {
+                writeZero();
+            }
+            c >>= 1;
+        }
+    }
+
+    uint8_t readByte() {
+        uint8_t i,c = 0;
+        for(i = 0; i < 8; i++) {
+            c >>= 1;
+            if(readBit()) {
+                c |= 0x80;
+            }
+        }
+        return c;
+    }
+    
+    command error_t OneWire.read(uint8_t cmd, uint8_t* buf, uint8_t len) {
+        error_t e = SUCCESS;
+        atomic {
+            if(reset()) {
+                uint8_t i;
+                writeByte(cmd);
+                for(i = 0; i < len; i++) {
+                    buf[i] = readByte();
+                }
+            }
+            else {
+                e = EOFF;
+            }
+        }
+        return e;
+    }
+    
+    command error_t OneWire.write(const uint8_t* buf, uint8_t len) {
+        error_t e = SUCCESS;
+        atomic {
+            if(reset()) {
+                uint8_t i;
+                for(i = 0; i < len; i++) {
+                    writeByte(buf[i]);
+                }
+            }
+            else {
+                e = EOFF;
+            }
+        }
+        return e;
+    }
+}
diff --git a/tos/platforms/epic/chips/ds2411/OneWireStream.nc b/tos/platforms/epic/chips/ds2411/OneWireStream.nc
new file mode 100644
index 00000000..9c872c8b
--- /dev/null
+++ b/tos/platforms/epic/chips/ds2411/OneWireStream.nc
@@ -0,0 +1,13 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*- */
+/**
+ * Interface to Dallas/Maxim 1wire
+ */
+/**
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+
+interface OneWireStream {
+    command error_t read(uint8_t cmd, uint8_t* buf, uint8_t len);
+    command error_t write(const uint8_t* buf, uint8_t len);
+}
+
diff --git a/tos/platforms/epic/chips/ds2411/PlatformIeeeEui64.h b/tos/platforms/epic/chips/ds2411/PlatformIeeeEui64.h
new file mode 100644
index 00000000..5e9e1d49
--- /dev/null
+++ b/tos/platforms/epic/chips/ds2411/PlatformIeeeEui64.h
@@ -0,0 +1,37 @@
+// $Id: PlatformIeeeEui64.h,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai
+ * <stevedh@eecs.berkeley.edu> changes for Epic
+ */
+
+#ifndef PLATFORMIEEEEUI64_H
+#define PLATFORMIEEEEUI64_H
+ 
+enum {
+  IEEE_EUI64_COMPANY_ID_0 = 0x00,
+  IEEE_EUI64_COMPANY_ID_1 = 0x12,
+  IEEE_EUI64_COMPANY_ID_2 = 0x6d,
+  IEEE_EUI64_SERIAL_ID_0 = 'E',
+  IEEE_EUI64_SERIAL_ID_1 = 'P',
+};
+
+#endif // PLATFORMIEEEEUI64_H
diff --git a/tos/platforms/epic/chips/ds2411/PlatformOneWireLowLevelC.nc b/tos/platforms/epic/chips/ds2411/PlatformOneWireLowLevelC.nc
new file mode 100644
index 00000000..2116e278
--- /dev/null
+++ b/tos/platforms/epic/chips/ds2411/PlatformOneWireLowLevelC.nc
@@ -0,0 +1,22 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*- */
+/**
+ * read interface maxim/dallas 48 bit ID chips
+ */
+/**
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+
+configuration PlatformOneWireLowLevelC {
+    provides interface GeneralIO as OneWirePin;
+}
+implementation{
+  components HplMsp430GeneralIOC;
+  components new Msp430GpioC();
+  Msp430GpioC.HplGeneralIO -> HplMsp430GeneralIOC.Port24;
+
+  OneWirePin = Msp430GpioC;
+
+  // SDH : this seemed to break with mspgcc4...
+  // components PlatformOneWireLowLevelP as Pins;
+
+}
diff --git a/tos/platforms/epic/chips/ds2411/ReadId48.nc b/tos/platforms/epic/chips/ds2411/ReadId48.nc
new file mode 100644
index 00000000..103dce76
--- /dev/null
+++ b/tos/platforms/epic/chips/ds2411/ReadId48.nc
@@ -0,0 +1,13 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*- */
+/**
+ * read interface maxim/dallas 48 bit ID chips
+ */
+/**
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+
+interface ReadId48  {
+    // the ID is written into the buffer pointed to by id,
+    // the buffer must be at least 6 bytes (or 48 bit) long
+    command error_t read(uint8_t *id);
+}
diff --git a/tos/platforms/epic/hardware.h b/tos/platforms/epic/hardware.h
new file mode 100644
index 00000000..d8c4bb7e
--- /dev/null
+++ b/tos/platforms/epic/hardware.h
@@ -0,0 +1,103 @@
+// $Id: hardware.h,v 1.3 2010-06-29 22:07:52 scipio Exp $
+
+/*
+ * Copyright (c) 2007-2008 The Regents of the University of
+ * California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached
+ * INTEL-LICENSE file. If you do not find these files, copies can be
+ * found by writing to Intel Research Berkeley, 2150 Shattuck Avenue,
+ * Suite 1300, Berkeley, CA, 94704.  Attention: Intel License Inquiry.
+ */
+
+/**
+ * Hardware definition for the Epic platform.
+ *
+ * @author Prabal Dutta
+ */
+#ifndef _H_hardware_h
+#define _H_hardware_h
+
+#include "msp430hardware.h"
+
+// enum so components can override power saving,
+// as per TEP 112.
+enum {
+  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
+};
+
+// LEDS
+TOSH_ASSIGN_PIN(RED_LED, 4, 0);
+TOSH_ASSIGN_PIN(GREEN_LED, 4, 3);
+TOSH_ASSIGN_PIN(YELLOW_LED, 4, 7);
+
+// CC2420 RADIO
+TOSH_ASSIGN_PIN(RADIO_CSN, 4, 2);
+TOSH_ASSIGN_PIN(RADIO_VREF, 4, 5);
+TOSH_ASSIGN_PIN(RADIO_RESET, 4, 6);
+TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 0);
+TOSH_ASSIGN_PIN(RADIO_SFD, 4, 1);
+TOSH_ASSIGN_PIN(RADIO_GIO0, 1, 3);
+TOSH_ASSIGN_PIN(RADIO_FIFO, 1, 3);
+TOSH_ASSIGN_PIN(RADIO_GIO1, 1, 4);
+TOSH_ASSIGN_PIN(RADIO_CCA, 1, 4);
+
+TOSH_ASSIGN_PIN(CC_FIFOP, 1, 0);
+TOSH_ASSIGN_PIN(CC_FIFO, 1, 3);
+TOSH_ASSIGN_PIN(CC_SFD, 4, 1);
+TOSH_ASSIGN_PIN(CC_VREN, 4, 5);
+TOSH_ASSIGN_PIN(CC_RSTN, 4, 6);
+
+// USART0
+TOSH_ASSIGN_PIN(SIMO0, 3, 1);
+TOSH_ASSIGN_PIN(SOMI0, 3, 2);
+TOSH_ASSIGN_PIN(UCLK0, 3, 3);
+
+// USART1
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+
+// UART1
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);
+TOSH_ASSIGN_PIN(URXD1, 3, 7);
+
+// 1-Wire
+TOSH_ASSIGN_PIN(ONEWIRE, 2, 4);
+
+// need to undef atomic inside header files or nesC ignores the directive
+#undef atomic
+
+#endif // _H_hardware_h
diff --git a/tos/platforms/epic/platform.h b/tos/platforms/epic/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/epic/platform_message.h b/tos/platforms/epic/platform_message.h
new file mode 100644
index 00000000..e923b58b
--- /dev/null
+++ b/tos/platforms/epic/platform_message.h
@@ -0,0 +1,69 @@
+/* $Id: platform_message.h,v 1.2 2010-06-29 22:07:52 scipio Exp $
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific CC1000 packet structures.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:52 $
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include <CC2420.h>
+#include <Serial.h>
+
+typedef union message_header {
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union TOSRadioFooter {
+  cc2420_footer_t cc2420;
+} message_footer_t;
+
+typedef union TOSRadioMetadata {
+  cc2420_metadata_t cc2420;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/eyesIFX/.family b/tos/platforms/eyesIFX/.family
new file mode 100644
index 00000000..fa237c92
--- /dev/null
+++ b/tos/platforms/eyesIFX/.family
@@ -0,0 +1,67 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  And because of that, the current platform's include directory
+# must be specified, otherwise its search order is last instead of first.
+
+push( @includes, qw(
+# normal platform includes
+  %T/platforms/eyesIFX
+  %T/platforms/eyesIFX/chips/tda5250
+  %T/platforms/eyesIFX/chips/ad5200
+  %T/platforms/eyesIFX/chips/msp430
+  %T/platforms/eyesIFX/sensors
+  %T/platforms/eyesIFX/byte_radio
+  %T/chips/tda5250
+  %T/chips/tda5250/mac
+  %T/chips/ad5200
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/dma
+  %T/chips/msp430/pins
+  %T/chips/msp430/sensors
+  %T/chips/msp430/usart
+  %T/chips/msp430/timer
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+  %T/lib/byte_radio
+  %T/lib/power
+) );
+
+push (@opts, qw(
+
+  -gcc=msp430-gcc
+  -fnesc-target=msp430
+  -fnesc-no-debug
+) );
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=2 " .
+    "version=msp430-3.2.3 " .
+    "short=2,2 " .
+    "int=2,2 " .
+    "long=4,2 " .
+    "long_long=8,2 " .
+    "pointer=2,2 " .
+    "enum=2,2 " .
+    "float=4,2 " .
+    "double=4,2 " .
+    "long_double=4,2 " .
+    "void=1,1 " .
+    "fun=1,2 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
+    
+    
diff --git a/tos/platforms/eyesIFX/ActiveMessageC.nc b/tos/platforms/eyesIFX/ActiveMessageC.nc
new file mode 100644
index 00000000..79ba4759
--- /dev/null
+++ b/tos/platforms/eyesIFX/ActiveMessageC.nc
@@ -0,0 +1,100 @@
+// $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:53 scipio Exp $
+
+/*                                                                      
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:             Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:53 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the eyesIFX platforms. This is a naming wrapper
+ * around the TDA5250 Active Message layer.
+ *
+ * @author Philip Levis
+ * @author Vlado Handziski (TDA5250 modifications)
+ * @date July 20 2005
+ */
+
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+
+    interface PacketAcknowledgements;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+  }
+}
+implementation {
+  components ActiveMessageFilterC as Filter;
+  components Tda5250ActiveMessageC as AM;
+  components PacketStampC as PacketStamp;
+
+  AMSend       = Filter;
+  Receive      = Filter.Receive;
+  Snoop        = Filter.Snoop;
+
+  Filter.SubAMSend -> AM;
+  Filter.SubReceive -> AM.Receive;
+  Filter.SubSnoop  -> AM.Snoop;
+  //Filter.AMPacket  -> AM;
+
+  SplitControl = AM;
+  Packet       = AM;
+  AMPacket     = AM;
+
+  PacketAcknowledgements = AM;
+
+  PacketTimeStamp32khz = PacketStamp;
+  PacketTimeStampMilli = PacketStamp;
+}
diff --git a/tos/platforms/eyesIFX/ActiveMessageFilterC.nc b/tos/platforms/eyesIFX/ActiveMessageFilterC.nc
new file mode 100644
index 00000000..f110ba65
--- /dev/null
+++ b/tos/platforms/eyesIFX/ActiveMessageFilterC.nc
@@ -0,0 +1,69 @@
+/* 
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2007-09-13 23:10:19 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+ /* This component is the default AM filter component: it does not do anything,
+  * it uses no RAM and nesC will compile all code away. Its purpose is to allow
+  * other components to shadow (overwrite) it to implement their own
+  * filter/statistic component.
+  */
+
+#include "AM.h"
+module ActiveMessageFilterC {
+  provides {
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+  }
+  uses {
+    interface AMSend as SubAMSend[am_id_t id];
+    interface Receive as SubReceive[am_id_t id];
+    interface Receive as SubSnoop[am_id_t id];
+  }
+} implementation {
+
+  command error_t AMSend.send[am_id_t id](am_addr_t addr, message_t* msg, uint8_t len){ return call SubAMSend.send[id](addr, msg, len);}
+  command error_t AMSend.cancel[am_id_t id](message_t* msg){ return call SubAMSend.cancel[id](msg);}
+  command uint8_t AMSend.maxPayloadLength[am_id_t id](){ return call SubAMSend.maxPayloadLength[id]();}
+  command void* AMSend.getPayload[am_id_t id](message_t* msg, uint8_t len){ return call SubAMSend.getPayload[id](msg, len);}
+  event void SubAMSend.sendDone[am_id_t id](message_t* msg, error_t error) { signal AMSend.sendDone[id](msg, error); }
+  default event void AMSend.sendDone[am_id_t id](message_t* msg, error_t error) { return; }
+
+  event message_t* SubReceive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal Receive.receive[id](msg, payload, len); }
+  default event message_t* Receive.receive[am_id_t id](message_t* msg, void* payload, uint8_t len){ return msg;}
+  
+  event message_t* SubSnoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len) { return signal Snoop.receive[id](msg, payload, len);
+  }
+  default event message_t* Snoop.receive[am_id_t id](message_t* msg, void* payload, uint8_t len){return msg;}
+}
diff --git a/tos/platforms/eyesIFX/DummySleepP.nc b/tos/platforms/eyesIFX/DummySleepP.nc
new file mode 100644
index 00000000..27d9d7e8
--- /dev/null
+++ b/tos/platforms/eyesIFX/DummySleepP.nc
@@ -0,0 +1,48 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+module DummySleepP {
+    provides {  
+        interface Sleeptime;
+    }
+}
+implementation  {
+#warning "Dummy component for LowPowerListening/Sleeptime, please define MAC_REDMAC or MAC_SPECKMACD"
+    async command void Sleeptime.setLocalSleeptime(uint16_t sT) {
+    }
+    async command uint16_t Sleeptime.getLocalSleeptime() {
+        return 0;
+    }
+    async command void Sleeptime.setNetworkSleeptime(uint16_t sT) {
+    }
+    async command uint16_t Sleeptime.getNetworkSleeptime() {
+        return 0;
+    }
+}
+
diff --git a/tos/platforms/eyesIFX/LedsP.nc b/tos/platforms/eyesIFX/LedsP.nc
new file mode 100644
index 00000000..0bfdf5ce
--- /dev/null
+++ b/tos/platforms/eyesIFX/LedsP.nc
@@ -0,0 +1,168 @@
+// $Id: LedsP.nc,v 1.6 2010-06-29 22:07:53 scipio Exp $
+
+/*                                                                      
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The implementation of the standard LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ * @date   March 21, 2005
+ */
+
+module LedsP {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+}
+implementation {
+  
+#ifndef dbg
+#define dbg(n,msg)
+#endif  
+
+  command error_t Init.init() {
+    atomic {
+      dbg(DBG_BOOT, "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led0.clr();
+      call Led1.clr();
+      call Led2.clr();
+    }
+    return SUCCESS;
+  }
+
+  async command void Leds.led0On() {
+    dbg(DBG_LED, "LEDS: Led 0 on.\n");
+    call Led0.set();
+  }
+
+  async command void Leds.led0Off() {
+    dbg(DBG_LED, "LEDS: Led 0 off.\n");
+    call Led0.clr();
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    // this should be removed by dead code elimination when compiled for
+    // the physical motes
+    if (call Led0.get())
+      dbg(DBG_LED, "LEDS: Led 0 off.\n");
+    else
+      dbg(DBG_LED, "LEDS: Led 0 on.\n");
+  }
+
+  async command void Leds.led1On() {
+    dbg(DBG_LED, "LEDS: Led 1 on.\n");
+    call Led1.set();
+  }
+
+  async command void Leds.led1Off() {
+    dbg(DBG_LED, "LEDS: Led 1 off.\n");
+    call Led1.clr();
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    if (call Led1.get())
+      dbg(DBG_LED, "LEDS: Led 1 off.\n");
+    else
+      dbg(DBG_LED, "LEDS: Led 1 on.\n");
+  }
+
+  async command void Leds.led2On() {
+    dbg(DBG_LED, "LEDS: Led 2 on.\n");
+    call Led2.set();
+  }
+
+  async command void Leds.led2Off() {
+    dbg(DBG_LED, "LEDS: Led 2 off.\n");
+    call Led2.clr();
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    if (call Led2.get())
+      dbg(DBG_LED, "LEDS: Led 2 off.\n");
+    else
+      dbg(DBG_LED, "LEDS: Led 2 on.\n");
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (call Led0.get()) {
+        rval |= LEDS_LED0;
+      }
+      if (call Led1.get()) {
+        rval |= LEDS_LED1;
+      }
+      if (call Led2.get()) {
+        rval |= LEDS_LED2;
+      }
+    return rval;
+  }
+}
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+        call Leds.led0On();
+      }
+      else {
+        call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+        call Leds.led1On();
+      }
+      else {
+        call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+        call Leds.led2On();
+      }
+      else {
+        call Leds.led2Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/eyesIFX/LocalTimeC.nc b/tos/platforms/eyesIFX/LocalTimeC.nc
new file mode 100644
index 00000000..3812f416
--- /dev/null
+++ b/tos/platforms/eyesIFX/LocalTimeC.nc
@@ -0,0 +1,42 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration LocalTimeC {
+    provides {  
+        interface LocalTime<T32khz> as LocalTimeT32khz;
+        interface WideLocalTime<T32khz> as WideLocalTime;
+    }
+}
+implementation  {
+    components LocalTimeP, Counter32khz16C as Counter;
+    LocalTimeT32khz = LocalTimeP;
+    WideLocalTime = LocalTimeP;
+    LocalTimeP.Counter32khz16 -> Counter;
+}
+
diff --git a/tos/platforms/eyesIFX/LocalTimeP.nc b/tos/platforms/eyesIFX/LocalTimeP.nc
new file mode 100644
index 00000000..afebf830
--- /dev/null
+++ b/tos/platforms/eyesIFX/LocalTimeP.nc
@@ -0,0 +1,95 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+module LocalTimeP {
+    provides {  
+        interface LocalTime<T32khz> as LocalTime32kHz;
+        interface WideLocalTime<T32khz> as WideLocalTime;
+    }
+    uses {
+        interface Counter<T32khz,uint16_t> as Counter32khz16;
+    }
+}
+implementation  {
+    typedef union 
+    {
+        int64_t op;
+        struct {
+            uint32_t lo;
+            int32_t hi;
+        };
+    } i64parts_t;
+    
+    uint16_t counter2sec = 126;
+    int32_t dayCounter = 0;
+    bool increaseDay = FALSE;
+    async command uint32_t LocalTime32kHz.get() {
+        uint32_t time;
+        unsigned t;
+        bool dirty1;
+        bool dirty2;
+        atomic {
+            increaseDay = FALSE;
+            do {
+                dirty1 = call Counter32khz16.isOverflowPending();
+                t = call Counter32khz16.get();
+                dirty2 = call Counter32khz16.isOverflowPending();
+            } while (dirty1 != dirty2);
+            time = counter2sec;
+            if(dirty1) {
+                ++time;
+                if(time == 0) {
+                    increaseDay = TRUE;
+                }
+            }
+            time = (time << 16) + t;
+        }
+        return time;
+    }
+
+    async command int64_t WideLocalTime.get() {
+        i64parts_t time;
+        uint32_t t;
+        atomic {
+            t = call LocalTime32kHz.get();
+            time.hi = dayCounter;
+            if(increaseDay) time.hi++;
+            if(time.hi < 0) time.hi = 0;
+            time.lo = t;
+        }
+        return time.op;
+    }
+    
+    async event void Counter32khz16.overflow() {
+        ++counter2sec;
+        if(counter2sec == 0) ++dayCounter;
+        if(dayCounter < 0) dayCounter = 0;
+    }    
+}
+
diff --git a/tos/platforms/eyesIFX/LplC.nc b/tos/platforms/eyesIFX/LplC.nc
new file mode 100644
index 00000000..cfc3ba4f
--- /dev/null
+++ b/tos/platforms/eyesIFX/LplC.nc
@@ -0,0 +1,53 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration LplC {
+    provides {  
+        interface LowPowerListening;
+    }
+}
+implementation  {
+#ifdef MAC_REDMAC
+    components RedMacC as Mac;   
+#elif  defined(MAC_SPECKMACD)   
+    components SpeckMacDC as Mac;
+#else
+    components DummySleepP as Mac;
+#endif
+    components
+        LplP as Lpl,
+        new Alarm32khz16C() as Timer,
+        RandomLfsrC;
+    
+    LowPowerListening = Lpl;
+    Lpl.Sleeptime -> Mac;
+    Lpl.Random -> RandomLfsrC;
+    Lpl.Timer -> Timer;
+}
+
diff --git a/tos/platforms/eyesIFX/LplP.nc b/tos/platforms/eyesIFX/LplP.nc
new file mode 100644
index 00000000..4d06f4c0
--- /dev/null
+++ b/tos/platforms/eyesIFX/LplP.nc
@@ -0,0 +1,103 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+module LplP {
+    provides {  
+        interface LowPowerListening;
+    }
+    uses {
+        interface Sleeptime;
+        interface Alarm<T32khz, uint16_t> as Timer;
+        interface Random;
+    }
+}
+implementation  {
+#ifdef MAC_REDMAC
+    #define ON_TIME 15
+#elif  defined(MAC_SPECKMACD)   
+    #define ON_TIME 5
+#else
+    #define ON_TIME 1
+#endif
+    
+    #define MIN_SLEEP 2048
+    norace uint16_t localsleep;
+
+    async event void Timer.fired() {
+        call Sleeptime.setLocalSleeptime(localsleep);
+    }
+    
+    command void LowPowerListening.setLocalSleepInterval(uint16_t sleepIntervalMs) {
+        if(sleepIntervalMs < 0x7FF) {
+            localsleep = (sleepIntervalMs * 32);
+        }
+        else {
+            localsleep = 0xffff;
+        }
+        if(localsleep < MIN_SLEEP) localsleep = MIN_SLEEP;
+        call Timer.start(call Random.rand16());
+    };
+    
+    command uint16_t LowPowerListening.getLocalSleepInterval() {
+        return call Sleeptime.getLocalSleeptime() / 32;
+    };
+    command void LowPowerListening.setLocalDutyCycle(uint16_t dutyCycle) {
+        call LowPowerListening.setLocalSleepInterval(dutyCycle * ON_TIME);
+    };
+    command uint16_t LowPowerListening.getLocalDutyCycle() {
+        return call LowPowerListening.getLocalSleepInterval() / ON_TIME;
+    };
+    command void LowPowerListening.setRxSleepInterval(message_t *msg, uint16_t sleepIntervalMs) {
+        uint16_t rsleep;
+        if(sleepIntervalMs < 0x7FF) {
+            rsleep = (sleepIntervalMs * 32);
+        }
+        else {
+            rsleep = 0xffffU;
+        }
+        if(rsleep < MIN_SLEEP) rsleep = MIN_SLEEP;        
+        call Sleeptime.setNetworkSleeptime(rsleep);
+    };
+    command uint16_t LowPowerListening.getRxSleepInterval(message_t *msg) {
+        return call Sleeptime.getNetworkSleeptime() / 32;
+    }
+    command void LowPowerListening.setRxDutyCycle(message_t *msg, uint16_t dutyCycle) {
+        call LowPowerListening.setRxSleepInterval(msg, dutyCycle * ON_TIME);        
+    }
+    command uint16_t LowPowerListening.getRxDutyCycle(message_t *msg) {
+        return call LowPowerListening.getRxSleepInterval(msg) / ON_TIME;
+    }
+    command uint16_t LowPowerListening.dutyCycleToSleepInterval(uint16_t dutyCycle) {
+        return dutyCycle * ON_TIME;
+    }
+    command uint16_t LowPowerListening.sleepIntervalToDutyCycle(uint16_t sleepInterval) {
+        return sleepInterval / ON_TIME;
+    }
+}
+
diff --git a/tos/platforms/eyesIFX/PacketStampC.nc b/tos/platforms/eyesIFX/PacketStampC.nc
new file mode 100644
index 00000000..276914fd
--- /dev/null
+++ b/tos/platforms/eyesIFX/PacketStampC.nc
@@ -0,0 +1,53 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration PacketStampC {
+    provides {
+        interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+        interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+        
+        interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+        interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+    }
+}
+implementation  {
+    components PacketStampP as PS;
+    components LocalTimeC as LT;
+    components HilTimerMilliC as HilMilli;    
+
+    PacketTimeStamp32khz = PS;
+    TimeSyncPacket32khz = PS;
+    
+    PacketTimeStampMilli = PS;
+    TimeSyncPacketMilli = PS;
+    
+    PS.LocalTime32khz -> LT;
+    PS.LocalTimeMilli -> HilMilli;
+}
+
diff --git a/tos/platforms/eyesIFX/PacketStampP.nc b/tos/platforms/eyesIFX/PacketStampP.nc
new file mode 100644
index 00000000..29214129
--- /dev/null
+++ b/tos/platforms/eyesIFX/PacketStampP.nc
@@ -0,0 +1,97 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "radiopacketfunctions.h"
+
+module PacketStampP {
+    provides {  
+        interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+        interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+        
+        interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+        interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+    }
+    uses {
+        interface LocalTime<TMilli> as LocalTimeMilli;
+        interface LocalTime<T32khz> as LocalTime32khz;
+    }
+}
+implementation  {
+    // 32 kHz interface
+    // get the time when SFD event was generated
+    async command uint32_t PacketTimeStamp32khz.timestamp(message_t* msg) {
+        return getMetadata(msg)->sfdtime;
+    }
+    // set the time when SFD event was generated?
+    async command void PacketTimeStamp32khz.set(message_t* msg, uint32_t value) {
+        getMetadata(msg)->sfdtime = value;
+    }
+    // return time when event was generated at the source
+    command uint32_t TimeSyncPacket32khz.eventTime(message_t* msg) {
+        return getMetadata(msg)->time;
+    };
+    
+    // Milli interface
+    // get the time when SFD was send/received
+    async command uint32_t PacketTimeStampMilli.timestamp(message_t* msg) {
+        return call LocalTimeMilli.get() -
+            (call LocalTime32khz.get() - getMetadata(msg)->sfdtime)/32;
+    }
+    // set the time when SFD was send/received?
+    async command void PacketTimeStampMilli.set(message_t* msg, uint32_t value) {
+        getMetadata(msg)->sfdtime =
+            call LocalTime32khz.get() - (call LocalTimeMilli.get() - value)*32;
+    }
+    // return time when event was generated
+    command uint32_t TimeSyncPacketMilli.eventTime(message_t* msg) {
+        return call LocalTimeMilli.get() -
+            (call LocalTime32khz.get() - getMetadata(msg)->time)/32;        
+    };
+
+    // not really supported functions, valid section
+    command bool TimeSyncPacket32khz.isValid(message_t* msg) {
+        return TRUE;
+    }
+    command bool TimeSyncPacketMilli.isValid(message_t* msg) {
+        return TRUE;
+    }
+    async command bool PacketTimeStamp32khz.isValid(message_t* msg) {
+        return TRUE;
+    }
+    async command bool PacketTimeStampMilli.isValid(message_t* msg) {
+        return TRUE;
+    }
+    
+    // not really supported functions, clear section
+    async command void PacketTimeStamp32khz.clear(message_t* msg) {
+    }
+    async command void PacketTimeStampMilli.clear(message_t* msg) {
+    }
+}
+
diff --git a/tos/platforms/eyesIFX/PlatformC.nc b/tos/platforms/eyesIFX/PlatformC.nc
new file mode 100644
index 00000000..6a8fe682
--- /dev/null
+++ b/tos/platforms/eyesIFX/PlatformC.nc
@@ -0,0 +1,52 @@
+// $Id: PlatformC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre and Cory Sharp
+ */
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+}
+implementation
+{
+  components PlatformP
+    , Msp430ClockC
+    ;
+
+  Init = PlatformP;
+  PlatformP.Msp430ClockInit -> Msp430ClockC.Init;
+}
+
diff --git a/tos/platforms/eyesIFX/PlatformLedsC.nc b/tos/platforms/eyesIFX/PlatformLedsC.nc
new file mode 100644
index 00000000..a4567dd2
--- /dev/null
+++ b/tos/platforms/eyesIFX/PlatformLedsC.nc
@@ -0,0 +1,74 @@
+// $Id: PlatformLedsC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ * @author Vlado Handziski (modifications for eyesIFX)
+ */
+#include "hardware.h"
+
+configuration PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  provides interface GeneralIO as Led3;
+  uses interface Init;
+}
+implementation
+{
+  components
+    HplMsp430GeneralIOC
+    , new Msp430GpioC() as Led0Impl
+    , new Msp430GpioC() as Led1Impl
+    , new Msp430GpioC() as Led2Impl
+    , new Msp430GpioC() as Led3Impl
+    ;
+  components PlatformP;
+
+  Init = PlatformP.LedsInit;
+
+  Led0 = Led0Impl;
+  Led0Impl -> HplMsp430GeneralIOC.Port50;
+
+  Led1 = Led1Impl;
+  Led1Impl -> HplMsp430GeneralIOC.Port51;
+
+  Led2 = Led2Impl;
+  Led2Impl -> HplMsp430GeneralIOC.Port52;
+
+  Led3 = Led3Impl;
+  Led3Impl -> HplMsp430GeneralIOC.Port53;
+
+}
+
diff --git a/tos/platforms/eyesIFX/PlatformP.nc b/tos/platforms/eyesIFX/PlatformP.nc
new file mode 100644
index 00000000..aa262041
--- /dev/null
+++ b/tos/platforms/eyesIFX/PlatformP.nc
@@ -0,0 +1,17 @@
+#include "hardware.h"
+
+module PlatformP{
+  provides interface Init;
+  uses interface Init as Msp430ClockInit;
+  uses interface Init as LedsInit;
+}
+implementation {
+  command error_t Init.init() {
+    call Msp430ClockInit.init();
+    TOSH_SET_PIN_DIRECTIONS();
+    call LedsInit.init();
+    return SUCCESS;
+  }
+  default command error_t LedsInit.init() { return SUCCESS; }
+}
+
diff --git a/tos/platforms/eyesIFX/PlatformSerialC.nc b/tos/platforms/eyesIFX/PlatformSerialC.nc
new file mode 100644
index 00000000..22947c77
--- /dev/null
+++ b/tos/platforms/eyesIFX/PlatformSerialC.nc
@@ -0,0 +1,12 @@
+configuration PlatformSerialC {
+  provides interface StdControl;
+  provides interface UartStream;
+}
+implementation {
+  components new Msp430Uart1C() as UartC, eyesIFXSerialP;
+
+  UartStream = UartC;
+  StdControl = eyesIFXSerialP;
+  eyesIFXSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
+  eyesIFXSerialP.Resource -> UartC.Resource;
+}
diff --git a/tos/platforms/eyesIFX/RadioDataLinkC.nc b/tos/platforms/eyesIFX/RadioDataLinkC.nc
new file mode 100644
index 00000000..7b6f4a84
--- /dev/null
+++ b/tos/platforms/eyesIFX/RadioDataLinkC.nc
@@ -0,0 +1,105 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * provides preamble sampling csma with timestamping
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.9 $
+ * $Date: 2010-01-24 23:02:37 $
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+configuration RadioDataLinkC {
+    provides {
+      interface SplitControl; 
+      interface Send;
+      interface Receive;
+      interface Packet;
+      interface PacketAcknowledgements;
+    }
+}
+implementation
+{
+    components 
+        //Change components below as desired
+        Tda5250RadioC as Radio,                  //The actual Tda5250 radio over which data is receives/transmitted
+#ifdef PHY_MANCHESTER
+        UartManchPhyC as UartPhy,
+#else
+        Uart4b6bPhyC as UartPhy,                 //The UartPhy turns Bits into Bytes
+#endif
+        PacketSerializerP  as PacketSerializer,  //The PacketSerializer turns Bytes into Packets
+#ifdef MAC_REDMAC
+        RedMacC as Mac,                         //The MAC protocol to use
+#elif  defined(MAC_SPECKMACD)   
+        SpeckMacDC as Mac,                         //The MAC protocol to use
+#else
+        CsmaMacC as Mac,                         //The MAC protocol to use
+#endif
+        LinkLayerC as Llc;                       //The Link Layer Control module to use
+    
+    //Don't change wirings below this point, just change which components
+    //They are compposed of in the list above
+    
+    SplitControl = Llc;
+    Llc.MacSplitControl -> Mac.SplitControl;
+    Llc.RadioSplitControl -> Radio.SplitControl;
+  
+    Send = Llc.Send;
+    Receive = Llc.Receive;
+    PacketAcknowledgements = Llc;
+    Packet = Mac;
+  
+    Llc.SendDown->Mac.MacSend;
+    Llc.ReceiveLower->Mac.MacReceive;
+    Llc.Packet->Mac.Packet;
+    Mac.SubPacket->PacketSerializer.Packet;
+    
+    Mac.PacketSend->PacketSerializer.PhySend;
+    Mac.PacketReceive->PacketSerializer.PhyReceive;  
+    Mac.Tda5250Control->Radio;
+    Mac.UartPhyControl -> UartPhy;
+
+    Mac.RadioTimeStamping -> PacketSerializer.RadioTimeStamping;
+    PacketSerializer.RadioByteComm -> UartPhy.SerializerRadioByteComm;
+    PacketSerializer.PhyPacketTx -> UartPhy.PhyPacketTx;
+    PacketSerializer.PhyPacketRx -> UartPhy.PhyPacketRx;
+    
+    UartPhy.RadioByteComm -> Radio.RadioByteComm;
+
+#ifndef RADIO_UART_VCO
+    components SmclkManagerC;
+#endif
+
+#ifdef PACKETSERIALIZER_DEBUG
+    components new SerialDebugC() as SD;
+    PacketSerializer.SerialDebug -> SD;
+#endif
+
+}
diff --git a/tos/platforms/eyesIFX/SmclkManagerC.nc b/tos/platforms/eyesIFX/SmclkManagerC.nc
new file mode 100644
index 00000000..50f135d2
--- /dev/null
+++ b/tos/platforms/eyesIFX/SmclkManagerC.nc
@@ -0,0 +1,51 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Revision: 1.2 $
+ * $Date: 2007-03-10 22:03:48 $
+ */
+
+/**
+ * 
+ * @author: Andreas Koepke <koepke@tkn.tu-berlin.de>
+ */
+
+configuration SmclkManagerC {
+    
+}
+implementation {
+    components SmclkManagerP;
+
+    components MainC;
+    SmclkManagerP.Boot -> MainC;
+    
+    components Tda5250RadioC;
+    SmclkManagerP.ClkDiv -> Tda5250RadioC;
+}
+
+
diff --git a/tos/platforms/eyesIFX/SmclkManagerP.nc b/tos/platforms/eyesIFX/SmclkManagerP.nc
new file mode 100644
index 00000000..68955ac9
--- /dev/null
+++ b/tos/platforms/eyesIFX/SmclkManagerP.nc
@@ -0,0 +1,68 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Revision: 1.2 $
+ * $Date: 2007-03-10 22:03:48 $
+ */
+
+/**
+ * 
+ * @author: Andreas Koepke <koepke@tkn.tu-berlin.de>
+ */
+
+module SmclkManagerP {
+    uses {
+        interface Boot;
+        interface ClkDiv;
+    }
+}
+implementation {
+    event void Boot.booted() {
+        ;
+    }
+
+    async event void ClkDiv.startDone() {
+        atomic {
+            BCSCTL1 &= ~XT2OFF;
+            BCSCTL2 = SELS;
+        }
+    }
+
+    async event void ClkDiv.stopping() {
+        uint16_t sr;
+        atomic {
+            BCSCTL1 |= XT2OFF;
+            BCSCTL2 = DIVS1;
+            sr = READ_SR;
+            sr &= ~SR_SCG1;
+            __asm__ __volatile__( "bis  %0, r2" : : "m" (sr) );
+        }
+    }
+}
+
+
diff --git a/tos/platforms/eyesIFX/TimeSyncMessageC.nc b/tos/platforms/eyesIFX/TimeSyncMessageC.nc
new file mode 100644
index 00000000..cfc4f726
--- /dev/null
+++ b/tos/platforms/eyesIFX/TimeSyncMessageC.nc
@@ -0,0 +1,70 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Expose the time sync capabilities of the eyesIFX platform 
+ */
+configuration TimeSyncMessageC {
+  provides {
+    interface SplitControl;
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+
+    interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[am_id_t id];
+    interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+
+    interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+    interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+  }
+}
+implementation {
+    components TimeSyncMessageP as TS;
+    components ActiveMessageC as AM;
+    components PacketStampC as PS;
+    
+    SplitControl = AM;
+
+    Receive      = AM.Receive;
+    Snoop        = AM.Snoop;
+    Packet       = AM;
+    AMPacket     = AM;
+    
+    TS.SubSend -> AM.AMSend;
+    TS.AMPacket -> AM.AMPacket;
+
+    TS.PacketTimeStamp32khz -> PS;
+    TS.PacketTimeStampMilli -> PS;
+    
+    TimeSyncAMSend32khz       = TS;
+    TimeSyncAMSendMilli       = TS;
+    TimeSyncPacket32khz       = TS;
+    TimeSyncPacketMilli       = TS;
+}
diff --git a/tos/platforms/eyesIFX/TimeSyncMessageP.nc b/tos/platforms/eyesIFX/TimeSyncMessageP.nc
new file mode 100644
index 00000000..32b96f26
--- /dev/null
+++ b/tos/platforms/eyesIFX/TimeSyncMessageP.nc
@@ -0,0 +1,135 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Expose the time sync capabilities of the eyesIFX platform 
+ */
+
+module TimeSyncMessageP {
+    provides {
+        interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[am_id_t id];
+        interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+
+        interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+        interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+    }
+    uses {
+        interface AMSend as SubSend[am_id_t id];
+        interface AMPacket;
+        interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+        interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+    }
+}
+implementation {
+    typedef enum 
+    {
+        NONE,
+        RES_32_K,
+        RES_1_K
+    } resolution_t;
+
+    resolution_t resolution = NONE;
+    
+    command error_t TimeSyncAMSend32khz.send[am_id_t id](am_addr_t addr,
+                                                         message_t* msg,
+                                                         uint8_t len,
+                                                         uint32_t event_time) {
+        call PacketTimeStamp32khz.set(msg, event_time);
+        resolution = RES_32_K;
+        return call SubSend.send[id](addr, msg, len);
+    }
+    
+    command error_t TimeSyncAMSend32khz.cancel[am_id_t id](message_t* msg) {
+        return call SubSend.cancel[id](msg);
+    }
+    
+    command uint8_t TimeSyncAMSend32khz.maxPayloadLength[am_id_t id]() {
+        return call SubSend.maxPayloadLength[id]();
+    }
+    
+    command void* TimeSyncAMSend32khz.getPayload[am_id_t id](message_t* m, uint8_t len) {
+        return call SubSend.getPayload[id](m, len);
+    }
+
+
+    command bool TimeSyncPacket32khz.isValid(message_t* msg) {
+        return call PacketTimeStamp32khz.isValid(msg);
+    }
+    
+    command uint32_t TimeSyncPacket32khz.eventTime(message_t* msg) {
+        return call PacketTimeStamp32khz.timestamp(msg);
+    };
+    
+    command error_t TimeSyncAMSendMilli.send[am_id_t id](am_addr_t addr,
+                                                         message_t* msg,
+                                                         uint8_t len,
+                                                         uint32_t event_time) {
+
+        call PacketTimeStampMilli.set(msg, event_time);
+        resolution = RES_1_K;
+        return call SubSend.send[id](addr, msg, len);
+    }
+    
+    command error_t TimeSyncAMSendMilli.cancel[am_id_t id](message_t* msg) {
+        return call SubSend.cancel[id](msg);
+    }
+    
+    command uint8_t TimeSyncAMSendMilli.maxPayloadLength[am_id_t id]() {
+        return call SubSend.maxPayloadLength[id]();
+    }
+    
+    command void* TimeSyncAMSendMilli.getPayload[am_id_t id](message_t* m, uint8_t len) {
+        return call SubSend.getPayload[id](m, len);
+    }
+
+    command bool TimeSyncPacketMilli.isValid(message_t* msg) {
+        return call PacketTimeStamp32khz.isValid(msg);
+    }
+    
+    command uint32_t TimeSyncPacketMilli.eventTime(message_t* msg) {
+        return call PacketTimeStampMilli.timestamp(msg);        
+    };
+
+    event void SubSend.sendDone[uint8_t id](message_t* msg, error_t result) {
+        if(resolution == RES_32_K) {
+            signal TimeSyncAMSend32khz.sendDone[id](msg, result);
+        }
+        else {
+            signal TimeSyncAMSendMilli.sendDone[id](msg, result);
+        }
+    }
+
+    default event void TimeSyncAMSend32khz.sendDone[uint8_t id](message_t* msg, error_t err) {
+        return;
+    }
+    default event void TimeSyncAMSendMilli.sendDone[uint8_t id](message_t* msg, error_t err) {
+        return;
+    }
+}
+
diff --git a/tos/platforms/eyesIFX/WhiteBitAccessorC.nc b/tos/platforms/eyesIFX/WhiteBitAccessorC.nc
new file mode 100644
index 00000000..fdd9872a
--- /dev/null
+++ b/tos/platforms/eyesIFX/WhiteBitAccessorC.nc
@@ -0,0 +1,49 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Accessor module for link quality
+ *  
+ * @author Andreas Koepke <koepke@tkn.tu-berlin.de>
+ */
+
+#include "radiopacketfunctions.h"
+
+module WhiteBitAccessorC {
+    provides {		 
+        interface LinkPacketMetadata;
+    }
+}
+implementation {
+    async command bool LinkPacketMetadata.highChannelQuality(message_t* msg) {
+        bool res = FALSE;
+        if(getMetadata(msg)->strength > 13) res = TRUE;
+        return res;
+    }
+}
diff --git a/tos/platforms/eyesIFX/WideLocalTime.nc b/tos/platforms/eyesIFX/WideLocalTime.nc
new file mode 100644
index 00000000..4fc86d89
--- /dev/null
+++ b/tos/platforms/eyesIFX/WideLocalTime.nc
@@ -0,0 +1,44 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * A wide version of the localtime interface, 32 bit are too narrow
+ */
+#include "Timer.h"
+
+interface WideLocalTime<precision_tag>
+{
+  /** 
+   * Return current time. Time starts counting at boot - some time sources
+   * may stop counting while the processor is in low-power mode.
+   *
+   * @return Current time.
+   */
+  async command int64_t get();
+}
+
diff --git a/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMC.nc b/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMC.nc
new file mode 100644
index 00000000..a2f70ad9
--- /dev/null
+++ b/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMC.nc
@@ -0,0 +1,74 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+ 
+ /**
+ * Configuration for the fixed Rssi Threshold module.
+ *
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+// #define RSSI_FIXED_DEBUG
+configuration RssiFixedThresholdCMC
+{
+    provides {
+        interface StdControl;
+        interface ChannelMonitor;
+        interface ChannelMonitorControl;
+        interface ChannelMonitorData;
+        interface BatteryLevel;
+        interface Resource as RssiAdcResource;
+    }    
+}
+implementation
+{
+    components RssiFixedThresholdCMP,
+        new RssiSensorVccC() as Rssi,
+        new BatteryLevelSensorC() as Voltage,
+        new TimerMilliC() as Timer,
+        MainC;
+
+    MainC.SoftwareInit -> RssiFixedThresholdCMP;
+    StdControl = RssiFixedThresholdCMP;
+    RssiAdcResource = Rssi;
+    
+    RssiFixedThresholdCMP.Rssi -> Rssi;
+    RssiFixedThresholdCMP.Voltage -> Voltage;
+
+    ChannelMonitor = RssiFixedThresholdCMP;
+    ChannelMonitorControl = RssiFixedThresholdCMP;
+    ChannelMonitorData = RssiFixedThresholdCMP;
+    BatteryLevel = RssiFixedThresholdCMP;
+
+    RssiFixedThresholdCMP.Timer -> Timer;    
+#ifdef RSSI_FIXED_DEBUG
+    components new SerialDebugC() as SD;
+    RssiFixedThresholdCMP.SerialDebug -> SD;
+#endif
+}
diff --git a/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMP.nc b/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMP.nc
new file mode 100644
index 00000000..66cd9b63
--- /dev/null
+++ b/tos/platforms/eyesIFX/byte_radio/RssiFixedThresholdCMP.nc
@@ -0,0 +1,416 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2008-08-14 13:14:09 $
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author: Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+includes shellsort;
+module RssiFixedThresholdCMP {
+    provides {
+      interface Init;
+      interface StdControl;
+      interface ChannelMonitor;
+      interface ChannelMonitorControl;
+      interface ChannelMonitorData;
+      interface BatteryLevel;
+    }
+    uses {
+        interface ReadNow<uint16_t> as Rssi;
+        interface Read<uint16_t> as Voltage;
+        interface Timer<TMilli> as Timer;
+#ifdef RSSI_FIXED_DEBUG
+        interface SerialDebug;
+#endif
+    }
+}
+implementation
+{
+#ifdef RSSI_FIXED_DEBUG
+    void sdDebug(uint16_t p) {
+        call SerialDebug.putPlace(p);
+    }
+#else
+    void sdDebug(uint16_t p) {};
+#endif
+
+    /* Measure internal voltage every 20s */
+#define VOLTAGE_SAMPLE_INTERVALL 20000
+
+    /* 
+     * Number of samples for noisefloor estimation
+     * Actually the size of the array for the median
+     */
+#define NSAMPLES 5
+        
+    /*
+     * If the channel is seen more then DEADLOCK times 
+     * in a row busy, update noisefloor nonetheless.
+     */
+#define DEADLOCK 10
+        
+    /* 
+     * Initital noisefloor from data sheet ca. 350mV 
+     * Seems to depend on many things, usually values around
+     * 250 mV are observed for the eyesIFXv2 node, but 450 has also 
+     * been measured as noise floor. It is also not stable, depending
+     * on the placement of the node (USB cable shielding!) 
+     */
+#define NOISE_FLOOR 480 // raw value compared to 3V
+
+    // mu + 3*sigma -> rare event, outlier? 
+#define THREE_SIGMA          145
+
+    // 75 mV measured against 3V Vcc 
+#define INITIAL_BUSY_DELTA   100
+    
+    // 3000/2 mV measured against 2.5V Ref
+#define INITIAL_BATTERY_LEVEL 2457 
+
+    /*** calibration stuff *************************/
+#define UPDATE_NF_RUNS   10
+#define MINIMUM_POSITION 0
+#define RSSI_SAMPLE_INTERVALL   20 // it makes no sense to check the channel too often
+
+    /*** variable type definitions ******************/
+    typedef enum {
+        VOID,
+        CALIBRATE, // update noisefloor
+        IDLE,      // noisefloor up to date, nothing is currently attempted
+        CCA,       // in clear channel assessment
+        SNR        // measureing SNR
+    } state_t;
+    
+    /****************  Variables  *******************/
+    state_t state;       // what we try to do
+    int16_t gradient;    // how to convert mV to dB in mV/dB
+
+    uint16_t noisefloor;       // [raw value against Vcc]
+    uint16_t batteryLevel;     // [raw value against 2.5V ref]
+    
+    /* if the rssi value exceeds noisefloor + busyDelta
+     * the channel is busy
+     */
+    uint16_t busyDelta;    // [raw value against Vcc]
+    
+    // noise floor estimation
+    uint16_t rssisamples[NSAMPLES];
+    uint8_t rssiindex;
+
+    // deadlock protection counter
+    uint8_t deadlockCounter;
+
+    // last rssi reading
+    uint16_t rssi;           // rssi in [mV]
+    
+    /****************  Tasks  *******************/
+    task void UpdateNoiseFloorTask();
+    // task void GetChannelStateTask();
+    task void SnrReadyTask();
+    task void CalibrateNoiseFloorTask();
+    // task void GetSnrTask();
+    task void CalibrateTask();
+    task void GetVoltageTask();
+
+    /***************** Helper function *************/
+
+    int16_t computeSNR(uint16_t r) {
+        uint32_t delta;
+        uint16_t snr;
+        if(r > noisefloor) {
+             delta = r - noisefloor;
+             // speedily cacluate
+             // (2*batteryLevel*2500mV*delta)/(4095*4095*gradient)
+             snr = ((((uint32_t)batteryLevel*39)>>5)*delta>>12)/gradient;
+        } else {
+            snr = 0;
+        }
+        return snr;
+    }
+    /**************** Init *******************/
+    command error_t Init.init() {
+        atomic {
+            noisefloor = NOISE_FLOOR;
+            rssiindex = 0;
+            batteryLevel = INITIAL_BATTERY_LEVEL;
+            busyDelta = INITIAL_BUSY_DELTA;
+            state = VOID;
+            gradient = 14; // gradient of TDA5250
+            /* call Led3.makeOutput(); 
+               call Led3.clr(); */
+        }
+#ifdef RSSI_FIXED_DEBUG
+        call SerialDebug.putShortDesc("Rssi");
+#endif
+        return SUCCESS;
+    }
+    
+    /**************** StdControl *******************/   
+    command error_t StdControl.start() { 
+        return post GetVoltageTask();
+    }
+   
+    command error_t StdControl.stop() {
+        call Timer.stop();
+        return SUCCESS;
+    }
+     
+    /**************** RSSI *******************/
+
+    inline void addSample(uint16_t data)  {
+        if(rssiindex < NSAMPLES) rssisamples[rssiindex++] = data;
+        deadlockCounter = 0;
+        if(rssiindex >= NSAMPLES) post UpdateNoiseFloorTask();
+    }
+
+    error_t rssiRead() {
+        return call Rssi.read();
+    }
+    
+    async event void Rssi.readDone(error_t result, uint16_t data) {
+        switch(state) {
+            case CCA:
+                state = IDLE;
+                if(data < noisefloor + busyDelta) {
+                    signal ChannelMonitor.channelIdle();
+                    addSample(data);
+                }
+                else {
+                    signal ChannelMonitor.channelBusy();
+                    if(++deadlockCounter >= DEADLOCK) addSample(data);
+                }
+                break;
+            case SNR:
+                rssi = data;
+                post SnrReadyTask();    
+                break;
+            case CALIBRATE:
+                rssi = data;
+                post CalibrateNoiseFloorTask();    
+                break;
+            default:
+                break;
+        }
+    }
+    
+
+    /**************** Voltage *******************/
+    void readVoltage() {
+        if(call Voltage.read() != SUCCESS) post GetVoltageTask();
+    }
+    
+    task void GetVoltageTask() {
+        readVoltage();
+    }
+    
+    event void Voltage.readDone(error_t result, uint16_t data) {
+        uint16_t nbl;
+        int16_t d;
+        uint16_t nbD;
+        uint16_t bD;
+        if(result == SUCCESS) {
+            nbl = (data + batteryLevel)>>1;
+            atomic bD = busyDelta;
+            d = batteryLevel - nbl;
+            sdDebug(10000 + batteryLevel);
+            sdDebug(20000 + data);
+            sdDebug(30000 + nbl);
+            sdDebug(40000U + busyDelta);
+            if(d > 75 || d < -75) {
+                // recalculate busyDelta,
+                // noisefloor already adapted by floating
+                nbD = ((uint32_t)batteryLevel*(uint32_t)busyDelta)/(uint32_t)nbl;
+                atomic busyDelta = nbD;
+                batteryLevel = nbl;
+            }
+            sdDebug(50000U + busyDelta);
+        }
+        else {
+            post GetVoltageTask();
+        }
+    }
+    
+    /**************** ChannelMonitor *******************/  
+    async command error_t ChannelMonitor.start() {
+        error_t res = FAIL;
+        atomic {
+            if(state == IDLE) {
+                res = rssiRead();
+                if(res == SUCCESS) state = CCA;
+            }
+            else if(state == CCA) {
+                res = SUCCESS;
+            }
+        }
+        return res;
+    }
+
+    async command void ChannelMonitor.rxSuccess() {
+        atomic {
+            if((deadlockCounter > 0) && (deadlockCounter < DEADLOCK)) {
+                --deadlockCounter;
+            }
+        }
+    }
+    
+    task void UpdateNoiseFloorTask() {
+        shellsort(rssisamples,NSAMPLES);
+        atomic { 
+            noisefloor = (5*noisefloor + rssisamples[NSAMPLES/2] + 3)/6;
+            rssiindex = 0; 
+        }
+        sdDebug(60000U + noisefloor);
+    }
+
+    /**************** ChannelMonitorControl ************/ 
+
+    command async error_t ChannelMonitorControl.updateNoiseFloor() {
+        return post CalibrateTask();
+    }
+
+    task void CalibrateTask() {
+        atomic {
+            if((state != IDLE) && (state != VOID)) {
+                post CalibrateTask();
+            } else {
+                state = CALIBRATE;
+                deadlockCounter = 0;
+                call Timer.stop();
+                call Timer.startPeriodic(RSSI_SAMPLE_INTERVALL);
+            }
+        }
+    }
+
+    task void CalibrateNoiseFloorTask() {
+        atomic {
+            if(rssiindex < NSAMPLES) {
+                rssisamples[rssiindex++] = rssi;
+            } else { 
+                shellsort(rssisamples,NSAMPLES);
+                if(rssisamples[MINIMUM_POSITION] < noisefloor + THREE_SIGMA)  {
+                    noisefloor = (7*noisefloor + rssisamples[NSAMPLES/2] + 4)/8;
+                    ++deadlockCounter;
+                }
+                else {
+                    noisefloor += THREE_SIGMA/8;
+                }
+                rssiindex = 0; 
+            }
+            if(deadlockCounter > UPDATE_NF_RUNS) {
+                state = IDLE;
+                deadlockCounter = 0;
+                call Timer.stop();
+                call Timer.startPeriodic(VOLTAGE_SAMPLE_INTERVALL);
+                signal ChannelMonitorControl.updateNoiseFloorDone();
+            }
+        }
+    }
+
+    event void Timer.fired() {
+        state_t s;
+        atomic s = state;
+        if(s != CALIBRATE) {
+            readVoltage();
+        } else {
+            rssiRead();
+        }
+    }
+    
+    /**************** ChannelMonitorData ************/  
+    async command void ChannelMonitorData.setGradient(int16_t grad) {
+        // needed to convert RSSI into dB
+        atomic gradient = grad;
+    }
+    
+    async command int16_t ChannelMonitorData.getGradient() {
+        int16_t v;
+        atomic v = gradient;
+        return v;
+    }
+    
+    async command uint16_t ChannelMonitorData.getNoiseFloor() {
+        uint16_t v;
+        atomic v = noisefloor;
+        return v;
+    }
+
+    async command error_t ChannelMonitorData.getSnr() {
+        error_t res = FAIL;
+        atomic {
+            if(state == IDLE) {
+                res = rssiRead();
+                if(res == SUCCESS) state = SNR;
+            }
+            else if(state == SNR) {
+                res = SUCCESS;
+            }
+        }
+        return res;
+    }
+
+    task void SnrReadyTask() {
+        int16_t snr;
+        state_t s;
+        uint16_t r;
+        atomic {
+            r = rssi;
+            s = state;
+            if(state == SNR) state = IDLE;
+        }
+        if(s == SNR) {
+            snr = computeSNR(r);
+            signal ChannelMonitorData.getSnrDone(snr);
+        }
+    }
+
+    async command uint16_t ChannelMonitorData.readSnr() {
+        uint16_t rval;
+        if(rssi > noisefloor) {
+            rval = (rssi-noisefloor)>>4;
+        } else {
+            rval = 3;
+        }
+        return rval;
+    }
+    
+    default async event void ChannelMonitorData.getSnrDone(int16_t snr) {
+    }
+
+    /***** BatteryLevel ***************/
+    // get the batterylevel in mV
+    async command uint16_t BatteryLevel.getLevel() {
+        uint16_t l;
+        atomic l = batteryLevel;
+        return (uint32_t)(l+3)*6/5;
+    }
+}
diff --git a/tos/platforms/eyesIFX/byte_radio/Uart4b6bPhyC.nc b/tos/platforms/eyesIFX/byte_radio/Uart4b6bPhyC.nc
new file mode 100644
index 00000000..4e794f3e
--- /dev/null
+++ b/tos/platforms/eyesIFX/byte_radio/Uart4b6bPhyC.nc
@@ -0,0 +1,73 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+* Copyright (c) 2006, Technische Universitaet Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitaet Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * Configuration for the byte radio physical layer. Together with the
+ * PacketSerializerP the UartPhyP module turns byte streams into packets.
+ * This one 4b6b encodes/decodes a byte stream
+ *
+ * @see PacketSerializerP
+ *
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+ 
+configuration Uart4b6bPhyC
+{
+  provides{
+    interface PhyPacketTx;
+    interface RadioByteComm as SerializerRadioByteComm;
+    interface PhyPacketRx;
+    interface UartPhyControl;
+  }
+  uses {
+    interface RadioByteComm;
+  }
+}
+implementation
+{
+    components 
+        new Alarm32khz16C() as RxByteTimer,
+        Uart4b6bPhyP,
+        MainC;
+    
+    MainC.SoftwareInit -> Uart4b6bPhyP;
+    PhyPacketRx = Uart4b6bPhyP;
+    SerializerRadioByteComm = Uart4b6bPhyP;
+    RadioByteComm = Uart4b6bPhyP;
+    PhyPacketTx = Uart4b6bPhyP;
+    UartPhyControl = Uart4b6bPhyP;
+    
+    Uart4b6bPhyP.RxByteTimer -> RxByteTimer;
+    
+#ifdef UART_DEBUG
+    components new SerialDebugC() as SD;
+    Uart4b6bPhyP.SerialDebug -> SD;
+#endif
+
+}
diff --git a/tos/platforms/eyesIFX/byte_radio/Uart4b6bPhyP.nc b/tos/platforms/eyesIFX/byte_radio/Uart4b6bPhyP.nc
new file mode 100644
index 00000000..8976f47d
--- /dev/null
+++ b/tos/platforms/eyesIFX/byte_radio/Uart4b6bPhyP.nc
@@ -0,0 +1,399 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "code4b6b.h"
+
+/**
+ * Implementation of the physical layer for the eyesIFX byte radio.
+ * Together with the PacketSerializerP this module turns byte streams 
+ * into packets.
+ *
+ * @author Andreas Koepke <koepke@tkn.tu-berlin.de>
+ */
+module Uart4b6bPhyP {
+    provides {
+        interface Init;
+        interface PhyPacketTx;
+        interface RadioByteComm as SerializerRadioByteComm;
+        interface PhyPacketRx;
+        interface UartPhyControl;
+    }
+    uses {
+        interface RadioByteComm;
+        interface Alarm<T32khz, uint16_t> as RxByteTimer;
+#ifdef UART_DEBUG
+        interface SerialDebug;
+#endif
+    }
+}
+implementation
+{
+#ifdef UART_DEBUG
+    void sdDebug(uint16_t p) {
+        call SerialDebug.putPlace(p);
+    }
+#else
+    void sdDebug(uint16_t p) {};
+#endif
+
+    /* Module Definitions  */
+    typedef enum {
+        STATE_PREAMBLE,
+        STATE_PREAMBLE_CODE,
+        STATE_SYNC,
+        STATE_SFD1,
+        STATE_SFD2,
+        STATE_SFD3,
+        STATE_HEADER_DONE,
+        STATE_DATA_HIGH_OR_SFD,
+        STATE_DATA_HIGH,
+        STATE_DATA_MIDDLE,
+        STATE_DATA_LOW,
+        STATE_DATA_LOW_FOOTER,
+        STATE_FOOTER_START,
+        STATE_FOOTER_DONE
+    } phyState_t;
+
+    /* constants */
+    enum {
+        PREAMBLE_LENGTH=2,
+        BYTE_TIME=TDA5250_32KHZ_BYTE_TIME+3,
+        PREAMBLE_BYTE=0x55,
+        SYNC_BYTE=0xFF,
+        SFD_BYTE=0x83,
+        SFD_BYTE2=0x7c
+    };
+    
+    /** Module Global Variables  */
+    phyState_t phyState;    // Current Phy state State
+    uint16_t preambleCount;
+    uint16_t numPreambles;  // Number of preambles to send before the packet
+    uint8_t byteTime;       // max. time between two bytes
+    uint8_t bufByte;
+    /* Local Function Declarations */
+    void TransmitNextByte();
+    void ReceiveNextByte(uint8_t data);
+
+    /* Radio Init */
+    command error_t Init.init(){
+        atomic {
+            phyState = STATE_PREAMBLE;
+            numPreambles = PREAMBLE_LENGTH;
+            byteTime = BYTE_TIME;
+        }
+#ifdef UART_DEBUG
+        call SerialDebug.putShortDesc("U4b6bP");
+#endif
+        return SUCCESS;
+    }
+    
+    async command error_t UartPhyControl.setNumPreambles(uint16_t numPreambleBytes) {
+        atomic {
+            numPreambles = numPreambleBytes;
+        }
+        return SUCCESS;
+    }
+    
+    command error_t UartPhyControl.setByteTimeout(uint8_t byteTimeout) {
+        if (call RxByteTimer.isRunning() == TRUE) {
+            return FAIL;
+        } else {
+            byteTime = byteTimeout * 33;
+            return SUCCESS;
+        }
+    }
+    
+    async command bool UartPhyControl.isBusy() {
+        return phyState != STATE_PREAMBLE;
+    }
+    
+    void resetState() {
+        call RxByteTimer.stop();
+        if(phyState >= STATE_DATA_HIGH) {
+            signal PhyPacketRx.recvFooterDone(FAIL);
+            sdDebug(10);
+        }
+        phyState = STATE_PREAMBLE;
+    }
+
+    async event void RxByteTimer.fired() {
+        // no bytes have arrived, so...
+        resetState();
+    }
+
+    async command void PhyPacketTx.sendHeader() {
+        phyState = STATE_PREAMBLE;
+        preambleCount = numPreambles;
+        TransmitNextByte();
+    }
+
+    async command void SerializerRadioByteComm.txByte(uint8_t data) {
+        uint8_t high = nibbleToSixBit[(data & 0xf0) >> 4];
+        uint8_t low = nibbleToSixBit[data & 0x0f];
+        if(phyState == STATE_DATA_HIGH) {
+            high <<= 2;
+            if(low & 0x20) high |= 2;
+            if(low & 0x10) high |= 1;
+            bufByte = low << 4;
+            call RadioByteComm.txByte(high);
+            phyState = STATE_DATA_MIDDLE;
+        }
+        else {
+            call RadioByteComm.txByte(bufByte | (high >> 2));
+            if(high & 0x02) low |= 0x80;
+            if(high & 0x01) low |= 0x40;
+            bufByte = low;
+            phyState = STATE_DATA_LOW;
+        }
+    }
+
+    async command bool SerializerRadioByteComm.isTxDone() {
+        return call RadioByteComm.isTxDone();
+    }
+
+    async command void PhyPacketTx.sendFooter() {
+        if(phyState == STATE_DATA_MIDDLE) {
+            bufByte |= (nibbleToSixBit[0] >> 2);
+            phyState = STATE_DATA_LOW_FOOTER;
+            call RadioByteComm.txByte(bufByte);
+        } else {
+            phyState = STATE_FOOTER_START;
+            TransmitNextByte();
+        }
+    }
+    
+
+
+    /* Radio Recv */
+    async command void PhyPacketRx.recvFooter() {
+        // currently there is no footer
+        // atomic phyState = STATE_FOOTER_START;
+        phyState = STATE_PREAMBLE;
+        call RxByteTimer.stop();
+        signal PhyPacketRx.recvFooterDone(SUCCESS);
+        sdDebug(20);
+    }
+
+    
+    /* Tx Done */
+    async event void RadioByteComm.txByteReady(error_t error) {
+        if(error == SUCCESS) {
+            TransmitNextByte();
+        } else {
+            signal SerializerRadioByteComm.txByteReady(error);
+            phyState = STATE_PREAMBLE;
+        }
+    }
+
+    void TransmitNextByte() {
+        switch(phyState) {
+            case STATE_PREAMBLE:
+                if(preambleCount > 1) {
+                    preambleCount--;
+                } else {
+                    phyState = STATE_SYNC;
+                }
+                call RadioByteComm.txByte(PREAMBLE_BYTE);
+                break;
+            case STATE_SYNC:
+                phyState = STATE_SFD1;
+                call RadioByteComm.txByte(SYNC_BYTE);
+                break;
+            case STATE_SFD1:
+                phyState = STATE_SFD2;
+                call RadioByteComm.txByte(SFD_BYTE);
+                break;
+            case STATE_SFD2:
+                phyState = STATE_SFD3;
+                call RadioByteComm.txByte(SFD_BYTE);
+                break;
+            case STATE_SFD3:
+                phyState = STATE_HEADER_DONE;
+                call RadioByteComm.txByte(SFD_BYTE);
+                break;
+            case STATE_HEADER_DONE:
+                phyState = STATE_DATA_HIGH;
+                signal PhyPacketTx.sendHeaderDone();
+                break;
+            case STATE_DATA_HIGH:
+                signal SerializerRadioByteComm.txByteReady(SUCCESS);
+                break;
+            case STATE_DATA_MIDDLE:
+                signal SerializerRadioByteComm.txByteReady(SUCCESS);
+                break;
+            case STATE_DATA_LOW:
+                call RadioByteComm.txByte(bufByte);
+                phyState = STATE_DATA_HIGH;
+                break;
+            case STATE_DATA_LOW_FOOTER:
+                phyState = STATE_FOOTER_START;
+                call RadioByteComm.txByte(bufByte);
+                break;
+            case STATE_FOOTER_START:
+                /* Pseudo-Footer: the MSP430 has two buffers: one for
+                 * transmit, one to store the next byte to be transmitted,
+                 * this footer fills the next-to-transmit buffer, to make
+                 * sure that the last real byte is actually
+                 * transmitted. The byte stored by this call may not be
+                 * transmitted fully or not at all. 
+                 */
+                phyState = STATE_FOOTER_DONE;
+                call RadioByteComm.txByte(bufByte);
+                break;
+            case STATE_FOOTER_DONE:
+                phyState = STATE_PREAMBLE;
+                signal PhyPacketTx.sendFooterDone();
+                break;
+            default:
+                break;
+        }
+    }
+
+    /* Rx Done */
+    async event void RadioByteComm.rxByteReady(uint8_t data) {
+        uint8_t decodedByte;
+        uint8_t low;
+        uint8_t high;
+        if((data == SFD_BYTE) && (phyState != STATE_SFD2) && (phyState != STATE_DATA_HIGH_OR_SFD)) {
+            resetState();
+            phyState = STATE_SFD2;
+            call RxByteTimer.start(byteTime<<1);
+        }
+        else {
+            switch(phyState) {
+                case STATE_SFD2:
+                    if(data == SFD_BYTE) {
+                        phyState = STATE_DATA_HIGH_OR_SFD;
+                        call RxByteTimer.start(byteTime << 1);
+                    }
+                    else {
+                        resetState();
+                    }
+                    break;
+                case STATE_DATA_HIGH_OR_SFD:    
+                    if(data != SFD_BYTE) {
+                        decodedByte = sixBitToNibble[data >> 2];
+                        if(decodedByte != ILLEGAL_CODE) {
+                            bufByte = decodedByte << 2;
+                            bufByte |= data & 0x03;
+                            bufByte <<= 2;
+                            phyState = STATE_DATA_MIDDLE;
+                            call RxByteTimer.stop();
+                            signal PhyPacketRx.recvHeaderDone(SUCCESS);
+                            call RxByteTimer.start(byteTime);
+                        }
+                        else {
+                            resetState();
+                        }
+                    }
+                    else {
+                        phyState = STATE_DATA_HIGH;
+                        call RxByteTimer.stop();
+                        signal PhyPacketRx.recvHeaderDone(SUCCESS);
+                        call RxByteTimer.start(byteTime);
+                    }
+                    break;
+                case STATE_DATA_HIGH:
+                    decodedByte = sixBitToNibble[data >> 2];
+                    if(decodedByte != ILLEGAL_CODE) {
+                        bufByte = decodedByte << 2;
+                        bufByte |= data & 0x03;
+                        bufByte <<= 2;
+                        phyState = STATE_DATA_MIDDLE;
+                        call RxByteTimer.start(byteTime);
+                    }
+                    else {
+                        resetState();
+                    }
+                    break;
+                case STATE_DATA_MIDDLE:
+                    decodedByte = sixBitToNibble[((bufByte & 0x0f)<<2) | (data >> 4)];
+                    if(decodedByte != ILLEGAL_CODE) {
+                        phyState = STATE_DATA_LOW;
+                        call RxByteTimer.stop();
+                        signal SerializerRadioByteComm.rxByteReady((bufByte & 0xf0) | decodedByte);
+                        bufByte = (data & 0x0f) << 2;
+                        call RxByteTimer.start(byteTime);
+                    }
+                    else {
+                        resetState();
+                    }
+                    break;
+                case STATE_DATA_LOW:
+                    decodedByte = sixBitToNibble[bufByte | (data >> 6)];
+                    if(decodedByte != ILLEGAL_CODE) {
+                        bufByte = (decodedByte << 4);
+                        decodedByte = sixBitToNibble[data & 0x3f];
+                        if(decodedByte != ILLEGAL_CODE) {
+                            phyState = STATE_DATA_HIGH;
+                            call RxByteTimer.stop();
+                            signal SerializerRadioByteComm.rxByteReady(bufByte | decodedByte);
+                            call RxByteTimer.start(byteTime);
+                        }
+                        else {
+                            resetState();
+                        }
+                    }
+                    else {
+                        resetState();
+                    }
+                    break;
+                case STATE_PREAMBLE:
+                    low = data & 0xf;
+                    high = data >> 4;
+                    if((low > 0) && (low < 0xf) && (high > 0) && (high < 0xf)) {
+                        phyState = STATE_PREAMBLE_CODE;
+                        call RxByteTimer.start(byteTime);
+                    }
+                    break;
+                case STATE_PREAMBLE_CODE:
+                    low = data & 0xf;
+                    high = data >> 4;
+                    if((low == 0) || (low == 0xf) || (high == 0) || (high == 0xf)) {
+                        phyState = STATE_PREAMBLE;
+                    }
+                    else {
+                        call RxByteTimer.start(byteTime);
+                    }
+                    break;
+                    // maybe there will be a time.... we will need this. but for now there is no footer
+                    //case STATE_FOOTER_START:
+                    //phyState = STATE_FOOTER_DONE;
+                    //break;
+                    //case STATE_FOOTER_DONE:
+                    //phyState = STATE_NULL;
+                    //signal PhyPacketRx.recvFooterDone(TRUE);
+                    //break;
+                default:
+                    break;
+            }
+        }
+        
+    }
+}
diff --git a/tos/platforms/eyesIFX/byte_radio/UartManchPhyC.nc b/tos/platforms/eyesIFX/byte_radio/UartManchPhyC.nc
new file mode 100644
index 00000000..6941a581
--- /dev/null
+++ b/tos/platforms/eyesIFX/byte_radio/UartManchPhyC.nc
@@ -0,0 +1,77 @@
+/*
+* Copyright (c) 2006, Technische Universitaet Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitaet Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* - Description ---------------------------------------------------------
+*
+* - Revision -------------------------------------------------------------
+* $Revision: 1.4 $
+* $Date: 2006-12-12 18:23:41 $
+* @author: Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+* ========================================================================
+*/
+
+/**
+ * Configuration for the byte radio physical layer. Together with the
+ * PacketSerializerP the UartPhyP module turns byte streams into packets.
+ *
+ * @see PacketSerializerP
+ *
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+ 
+configuration UartManchPhyC
+{
+  provides{
+    interface PhyPacketTx;
+    interface RadioByteComm as SerializerRadioByteComm;
+    interface PhyPacketRx;
+    interface UartPhyControl;
+  }
+  uses {
+    interface RadioByteComm;
+  }
+}
+implementation
+{
+    components 
+        new Alarm32khz16C() as RxByteTimer,
+        UartManchPhyP,
+//         PlatformLedsC,
+        MainC;
+    
+    MainC.SoftwareInit -> UartManchPhyP;
+    PhyPacketRx = UartManchPhyP;
+    SerializerRadioByteComm = UartManchPhyP;
+    RadioByteComm = UartManchPhyP;
+    PhyPacketTx = UartManchPhyP;
+    UartPhyControl = UartManchPhyP;
+    
+    UartManchPhyP.RxByteTimer -> RxByteTimer;
+//     PlatformLedsC.Led0 <- UartManchPhyP.Led0;
+//     PlatformLedsC.Led1 <- UartManchPhyP.Led1;
+}
diff --git a/tos/platforms/eyesIFX/byte_radio/UartManchPhyP.nc b/tos/platforms/eyesIFX/byte_radio/UartManchPhyP.nc
new file mode 100644
index 00000000..4bd6c47c
--- /dev/null
+++ b/tos/platforms/eyesIFX/byte_radio/UartManchPhyP.nc
@@ -0,0 +1,328 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.8 $
+ * $Date: 2008-03-05 11:20:43 $
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author: Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include "manchester.h"
+
+/**
+ * Implementation of the physical layer for the eyesIFX byte radio.
+ * Together with the PacketSerializerP this module turns byte streams 
+ * into packets.
+ *
+ * @author Kevin Klues <klues@tkn.tu-berlin.de>
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+module UartManchPhyP {
+    provides {
+        interface Init;
+        interface PhyPacketTx;
+        interface RadioByteComm as SerializerRadioByteComm;
+        interface PhyPacketRx;
+        interface UartPhyControl;
+    }
+    uses {
+        interface RadioByteComm;
+        interface Alarm<T32khz, uint16_t> as RxByteTimer;
+    }
+}
+implementation
+{
+    /* Module Definitions  */
+    typedef enum {
+        STATE_PREAMBLE,
+        STATE_PREAMBLE_MANCHESTER,
+        STATE_SYNC,
+        STATE_SFD,
+        STATE_HEADER_DONE,
+        STATE_DATA_HIGH,
+        STATE_DATA_LOW,
+        STATE_FOOTER_START,
+        STATE_FOOTER_DONE
+    } phyState_t;
+
+#define PREAMBLE_LENGTH   2
+#define BYTE_TIME         TDA5250_32KHZ_BYTE_TIME+3
+#define PREAMBLE_BYTE     0x55
+#define SYNC_BYTE         0xFF
+#define SFD_BYTE          0x50
+
+    /** Module Global Variables  */
+    phyState_t phyState;    // Current Phy state State
+    uint16_t preambleCount;
+    uint16_t numPreambles;  // Number of preambles to send before the packet
+    uint8_t byteTime;       // max. time between two bytes
+    uint8_t bufByte;
+    
+    /* Local Function Declarations */
+    void TransmitNextByte();
+    void ReceiveNextByte(uint8_t data);
+
+    /* Radio Init */
+    command error_t Init.init(){
+        atomic {
+            phyState = STATE_PREAMBLE;
+            numPreambles = PREAMBLE_LENGTH;
+            byteTime = BYTE_TIME;
+        }
+        return SUCCESS;
+    }
+    
+    async command error_t UartPhyControl.setNumPreambles(uint16_t numPreambleBytes) {
+        atomic {
+            numPreambles = numPreambleBytes;
+        }
+        return SUCCESS;
+    }
+    
+    command error_t UartPhyControl.setByteTimeout(uint8_t byteTimeout) {
+        if (call RxByteTimer.isRunning() == TRUE) {
+            return FAIL;
+        } else {
+            atomic byteTime = byteTimeout * 33;
+            return SUCCESS;
+        }
+    }
+    
+    async command bool UartPhyControl.isBusy() {
+        return phyState != STATE_PREAMBLE;
+    }
+    
+    void resetState() {
+        atomic {
+            call RxByteTimer.stop();
+            switch(phyState) {
+                case STATE_SYNC:
+                case STATE_SFD:
+                    signal PhyPacketRx.recvHeaderDone(FAIL);
+                    break;
+                case STATE_DATA_HIGH:
+                case STATE_DATA_LOW:
+                case STATE_FOOTER_START:
+                    signal PhyPacketRx.recvFooterDone(FAIL);
+                    break;
+                default:
+                    break;
+            }
+            phyState = STATE_PREAMBLE; 
+        }
+    }
+    
+    async event void RxByteTimer.fired() {
+        // no bytes have arrived, so...
+        resetState();
+    }
+
+    async command void PhyPacketTx.sendHeader() {
+        atomic {
+            phyState = STATE_PREAMBLE;
+            preambleCount = numPreambles;
+        }
+        TransmitNextByte();
+    }
+
+    async command void SerializerRadioByteComm.txByte(uint8_t data) {
+        bufByte = data;
+        call RadioByteComm.txByte(manchesterEncodeNibble((bufByte & 0xf0) >> 4));
+        phyState = STATE_DATA_LOW;
+    }
+
+    async command bool SerializerRadioByteComm.isTxDone() {
+        return call RadioByteComm.isTxDone();
+    }
+
+    async command void PhyPacketTx.sendFooter() {
+        atomic phyState = STATE_FOOTER_START;
+        TransmitNextByte();
+    }
+
+
+    /* Radio Recv */
+    async command void PhyPacketRx.recvFooter() {
+        // currently there is no footer
+        // atomic phyState = STATE_FOOTER_START;
+        atomic {
+            phyState = STATE_PREAMBLE;
+        }
+        call RxByteTimer.stop();
+        signal PhyPacketRx.recvFooterDone(SUCCESS);
+    }
+
+    
+    /* Tx Done */
+    async event void RadioByteComm.txByteReady(error_t error) {
+        if(error == SUCCESS) {
+            TransmitNextByte();
+        } else {
+            atomic {
+                signal SerializerRadioByteComm.txByteReady(error);
+                phyState = STATE_PREAMBLE;
+            }
+        }
+    }
+
+    void TransmitNextByte() {
+        atomic {
+            switch(phyState) {
+                case STATE_PREAMBLE:
+                    if(preambleCount > 1) {
+                        preambleCount--;
+                    } else {
+                        phyState = STATE_SYNC;
+                    }
+                    call RadioByteComm.txByte(PREAMBLE_BYTE);
+                    break;
+                case STATE_SYNC:
+                    phyState = STATE_SFD;
+                    call RadioByteComm.txByte(SYNC_BYTE);
+                    break;
+                case STATE_SFD:
+                    phyState = STATE_HEADER_DONE;
+                    call RadioByteComm.txByte(SFD_BYTE);
+                    break;
+                case STATE_HEADER_DONE:
+                    phyState = STATE_DATA_HIGH;
+                    signal PhyPacketTx.sendHeaderDone();
+                    break;
+                case STATE_DATA_HIGH:
+                    signal SerializerRadioByteComm.txByteReady(SUCCESS);
+                    break;
+                case STATE_DATA_LOW:
+                    call RadioByteComm.txByte(manchesterEncodeNibble(bufByte & 0x0f));
+                    phyState = STATE_DATA_HIGH;                    
+                    break;
+                case STATE_FOOTER_START:
+                    /* Pseudo-Footer: the MSP430 has two buffers: one for
+                     * transmit, one to store the next byte to be transmitted,
+                     * this footer fills the next-to-transmit buffer, to make
+                     * sure that the last real byte is actually
+                     * transmitted. The byte stored by this call may not be
+                     * transmitted fully or not at all. 
+                     */
+                    phyState = STATE_FOOTER_DONE;
+                    call RadioByteComm.txByte(manchesterEncodeNibble(bufByte & 0x0f));
+                    break;
+                case STATE_FOOTER_DONE:
+                    phyState = STATE_PREAMBLE;
+                    signal PhyPacketTx.sendFooterDone();
+                    break;
+                default:
+                    break;
+            }
+        }
+    }
+
+    /* Rx Done */
+    async event void RadioByteComm.rxByteReady(uint8_t data) {
+        call RxByteTimer.start(byteTime);
+        ReceiveNextByte(data);
+    }
+
+    /* Receive the next Byte from the USART */
+    void ReceiveNextByte(uint8_t data) {
+        uint8_t decodedByte;
+        atomic {
+            switch(phyState) {
+                case STATE_SYNC:
+                    if(data != PREAMBLE_BYTE) {
+                        if (data == SFD_BYTE) {
+                            signal PhyPacketRx.recvHeaderDone(SUCCESS);
+                            phyState = STATE_DATA_HIGH;
+                        } else {
+                            phyState = STATE_SFD;
+                        } 
+                    }
+                    break;
+                case STATE_SFD:
+                    if (data == SFD_BYTE) {
+                        signal PhyPacketRx.recvHeaderDone(SUCCESS);
+                        phyState = STATE_DATA_HIGH;
+                    } else {
+                        phyState = STATE_PREAMBLE; 
+                    }
+                    break;
+                case STATE_PREAMBLE:
+                    if(data == PREAMBLE_BYTE) {
+                        phyState = STATE_SYNC;
+                    }
+                    else if(manchesterDecodeByte(data) != 0xff) {
+                        phyState = STATE_PREAMBLE_MANCHESTER;
+                    }
+                    break;
+                case STATE_PREAMBLE_MANCHESTER:
+                    if(data == PREAMBLE_BYTE) {
+                        phyState = STATE_SYNC;
+                    }
+                    else if(manchesterDecodeByte(data) == 0xff) {
+                        phyState = STATE_PREAMBLE; 
+                    }
+                    break;
+                case STATE_DATA_HIGH:
+                    decodedByte = manchesterDecodeByte(data);
+                    if(decodedByte != 0xff) {
+                        bufByte = decodedByte << 4;
+                        phyState = STATE_DATA_LOW;
+                    }
+                    else {
+                        resetState();
+                    }
+                    break;
+                case STATE_DATA_LOW:
+                    decodedByte = manchesterDecodeByte(data);
+                    if(decodedByte != 0xff) {
+                        bufByte |= decodedByte;
+                        phyState = STATE_DATA_HIGH;
+                        signal SerializerRadioByteComm.rxByteReady(bufByte);
+                    }
+                    else {
+                        resetState();
+                    }
+                    break;
+                    // maybe there will be a time.... we will need this. but for now there is no footer
+                    //case STATE_FOOTER_START:
+                    //phyState = STATE_FOOTER_DONE;
+                    //break;
+                    //case STATE_FOOTER_DONE:
+                    //phyState = STATE_NULL;
+                    //signal PhyPacketRx.recvFooterDone(TRUE);
+                    //break;
+                default:
+                    break;
+            }
+        }
+    }
+
+}
diff --git a/tos/platforms/eyesIFX/byte_radio/code4b6b.h b/tos/platforms/eyesIFX/byte_radio/code4b6b.h
new file mode 100644
index 00000000..d504f829
--- /dev/null
+++ b/tos/platforms/eyesIFX/byte_radio/code4b6b.h
@@ -0,0 +1,131 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * provide functions to encode/decode a 4b 6b stream
+ * @author Andreas Koepke <koepke@tkn.tu-berlin.de>
+ * Book:     RF Monolithics, Inc: ASH Transceiver Designer's Guide, Okt 2002.
+ * http://www.rfm.com/products/tr_des24.pdf
+ */
+
+#ifndef CODE_4B_6B_H
+#define CODE_4B_6B_H
+
+enum {
+    ILLEGAL_CODE = 0xff,
+    ENCODED_32KHZ_BYTE_TIME = 3*TDA5250_32KHZ_BYTE_TIME/2
+};
+
+const uint8_t nibbleToSixBit[] = {
+    13, // 001101
+    14, // 001110
+    19, // 010011
+    21, // 010101
+    22, // 010110
+    25, // 011001
+    26, // 011010
+    28, // 011100
+    35, // 100011
+    37, // 100101
+    38, // 100110
+    41, // 101001
+    42, // 101010
+    44, // 101100
+    50, // 110010
+    52  // 110100
+};
+
+const uint8_t sixBitToNibble[] = {
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    0x00,
+    0x01,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    0x02,
+    ILLEGAL_CODE,
+    0x03,
+    0x04,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    0x05,
+    0x06,
+    ILLEGAL_CODE,
+    0x07,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    0x08,
+    ILLEGAL_CODE,
+    0x09,
+    0x0a,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    0x0b,
+    0x0c,
+    ILLEGAL_CODE,
+    0x0d,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    0x0e,
+    ILLEGAL_CODE,
+    0x0f,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE,
+    ILLEGAL_CODE
+};
+
+#endif
diff --git a/tos/platforms/eyesIFX/byte_radio/manchester.h b/tos/platforms/eyesIFX/byte_radio/manchester.h
new file mode 100644
index 00000000..918511c8
--- /dev/null
+++ b/tos/platforms/eyesIFX/byte_radio/manchester.h
@@ -0,0 +1,170 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * provide functions to encode/decode a manchester stream
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2008-03-05 11:14:00 $
+ * @author Andreas Koepke <koepke@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+enum {
+    ILLEGAL_CODE = 0xff,
+    ENCODED_32KHZ_BYTE_TIME = 2*TDA5250_32KHZ_BYTE_TIME
+};
+
+const uint8_t nibbleToManchesterByte[] = {
+    0x55,
+    0x56,
+    0x59,
+    0x5a,
+    0x65,
+    0x66,
+    0x69,
+    0x6a,
+    0x95,
+    0x96,
+    0x99,
+    0x9a,
+    0xa5,
+    0xa6,
+    0xa9,
+    0xaa
+};
+
+const uint8_t manchesterByteToNibble[] = {
+    0x0,
+    0x1,
+    0xff,
+    0xff,
+    0x2,
+    0x3,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0x4,
+    0x5,
+    0xff,
+    0xff,
+    0x6,
+    0x7,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0x8,
+    0x9,
+    0xff,
+    0xff,
+    0xa,
+    0xb,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xff,
+    0xc,
+    0xd,
+    0xff,
+    0xff,
+    0xe,
+    0xf
+};
+
+uint8_t manchesterEncodeNibble(uint8_t nib) 
+{
+    return nibbleToManchesterByte[nib];
+}
+
+uint8_t manchesterDecodeByte(uint8_t b) 
+{
+    uint8_t dec;
+    
+    if(b < 0x55) {
+        dec = 0xff;
+    }
+    else if(b > 0xaa) {
+        dec = 0xff;
+    }
+    else {
+        dec = manchesterByteToNibble[b - 0x55];
+    }
+    return dec;
+}
diff --git a/tos/platforms/eyesIFX/chips/ad5200/AD5200PotIOC.nc b/tos/platforms/eyesIFX/chips/ad5200/AD5200PotIOC.nc
new file mode 100644
index 00000000..2feb10b5
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/ad5200/AD5200PotIOC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:41 $
+ * ========================================================================
+ */
+
+ /**
+ * Configuration file for using the IO pins to the AD5200 Pot on
+ * the eyesIFX platforms.
+ *
+ * @author Kevin Klues <klues@tkn.tu-berlin.de>
+ */
+configuration AD5200PotIOC
+{
+  provides interface GeneralIO as AD5200PotENPOT;
+  provides interface GeneralIO as AD5200PotSDPOT;
+}
+implementation {
+  components
+      HplMsp430GeneralIOC as MspGeneralIO
+    , new Msp430GpioC() as rENPOT
+    , new Msp430GpioC() as rSDPOT
+    ;
+
+  AD5200PotENPOT = rENPOT;
+  AD5200PotSDPOT = rSDPOT;
+
+  rENPOT -> MspGeneralIO.Port24;
+  rSDPOT -> MspGeneralIO.Port23;
+}
+
diff --git a/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h b/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h
new file mode 100644
index 00000000..54f17cc0
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/msp430/Msp430DcoSpec.h
@@ -0,0 +1,45 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Override default dco clock spec.
+ * 
+ * SMCLK runs on 1MHz for this platform, its * source may be the radio -- a
+ * more reliable source.
+ *
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+
+
+#ifndef MS430DCOSPEC_H
+#define MS430DCOSPEC_H
+
+#define TARGET_DCO_KHZ 3926 // the target MCLK clock rate in binary kHz (4 020 000 Hz)
+#define ACLK_KHZ 32 // the ACLK rate in binary kHz
+#endif
diff --git a/tos/platforms/eyesIFX/chips/msp430/Msp430Timer32khzMapC.nc b/tos/platforms/eyesIFX/chips/msp430/Msp430Timer32khzMapC.nc
new file mode 100644
index 00000000..01d44714
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/msp430/Msp430Timer32khzMapC.nc
@@ -0,0 +1,84 @@
+//$Id: Msp430Timer32khzMapC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+/*
+  Msp430Timer32khzMapC presents as paramaterized interfaces all of the 32khz
+  hardware timers on the MSP430 that are available for compile time allocation
+  by "new Alarm32khz16C()", "new AlarmMilli32C()", and so on.
+
+  Platforms based on the Msp430 are encouraged to copy in and override this
+  file, presenting only the hardware timers that are available for allocation
+  on that platform.
+*/
+
+configuration Msp430Timer32khzMapC
+{
+  provides interface Msp430Timer[ uint8_t id ];
+  provides interface Msp430TimerControl[ uint8_t id ];
+  provides interface Msp430Compare[ uint8_t id ];
+}
+implementation
+{
+  components Msp430TimerC;
+
+  Msp430Timer[0] = Msp430TimerC.TimerB;
+  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
+  Msp430Compare[0] = Msp430TimerC.CompareB0;
+
+  Msp430Timer[1] = Msp430TimerC.TimerB;
+  Msp430TimerControl[1] = Msp430TimerC.ControlB1;
+  Msp430Compare[1] = Msp430TimerC.CompareB1;
+
+  Msp430Timer[2] = Msp430TimerC.TimerB;
+  Msp430TimerControl[2] = Msp430TimerC.ControlB2;
+  Msp430Compare[2] = Msp430TimerC.CompareB2;
+
+  Msp430Timer[3] = Msp430TimerC.TimerB;
+  Msp430TimerControl[3] = Msp430TimerC.ControlB3;
+  Msp430Compare[3] = Msp430TimerC.CompareB3;
+
+  Msp430Timer[4] = Msp430TimerC.TimerB;
+  Msp430TimerControl[4] = Msp430TimerC.ControlB4;
+  Msp430Compare[4] = Msp430TimerC.CompareB4;
+
+  Msp430Timer[5] = Msp430TimerC.TimerB;
+  Msp430TimerControl[5] = Msp430TimerC.ControlB5;
+  Msp430Compare[5] = Msp430TimerC.CompareB5;
+
+  Msp430Timer[6] = Msp430TimerC.TimerB;
+  Msp430TimerControl[6] = Msp430TimerC.ControlB6;
+  Msp430Compare[6] = Msp430TimerC.CompareB6;
+}
+
diff --git a/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataIOC.nc b/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataIOC.nc
new file mode 100644
index 00000000..faba13c3
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataIOC.nc
@@ -0,0 +1,58 @@
+/*
+* Copyright (c) 2004, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+* - Revision -------------------------------------------------------------
+* $Revision: 1.5 $
+* $Date: 2008-05-22 14:56:33 $
+* ========================================================================
+*/
+
+
+/**
+ * Wiring the TDA5250 with the Msp430 Uart abstraction.
+ * 
+ * @author Philipp Hupertz (huppertz@tkn.tu-berlin.de)
+ */
+configuration HplTda5250DataIOC {
+  provides {
+    interface Resource;
+    interface ResourceRequested;
+    interface UartStream;
+    interface HplTda5250DataControl as UartDataControl;
+  }
+}
+implementation {
+
+  components new Msp430Uart0C(), HplTda5250DataIOP;
+  
+  Resource = Msp430Uart0C.Resource;
+  ResourceRequested = Msp430Uart0C.ResourceRequested;
+  UartStream = Msp430Uart0C.UartStream;
+  UartDataControl = HplTda5250DataIOP.UartDataControl;
+  HplTda5250DataIOP.UartResourceConfigure <- Msp430Uart0C.Msp430UartConfigure;
+  
+}
diff --git a/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataIOP.nc b/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataIOP.nc
new file mode 100644
index 00000000..c54dfacb
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/HplTda5250DataIOP.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2008-05-22 14:56:33 $
+ * ========================================================================
+ */
+
+#include "msp430usart.h"
+#include "tda5250BusResourceSettings.h"
+
+ /**
+ * Wrapper module for the Msp430 Uart abstraction.
+ *
+ * @author Philipp Hupertz (huppertz@tkn.tu-berlin.de)
+  */
+module HplTda5250DataIOP {
+  provides {
+    interface HplTda5250DataControl as UartDataControl;
+    interface Msp430UartConfigure as UartResourceConfigure;
+  }
+}
+
+implementation {
+  
+  async command error_t UartDataControl.setToTx() {
+        atomic {
+      tda5250_uart_config.uartConfig.utxe = 1;
+      tda5250_uart_config.uartConfig.urxe = 0;
+    }
+    return SUCCESS;
+  }
+
+  async command error_t UartDataControl.setToRx() {
+    atomic {
+      tda5250_uart_config.uartConfig.utxe = 0;
+      tda5250_uart_config.uartConfig.urxe = 1;
+    }
+    return SUCCESS;
+  }
+	
+  async command msp430_uart_union_config_t* UartResourceConfigure.getConfig() {
+    return &tda5250_uart_config;
+  }
+
+}
diff --git a/tos/platforms/eyesIFX/chips/tda5250/Tda5250ASKNFSKFakePinP.nc b/tos/platforms/eyesIFX/chips/tda5250/Tda5250ASKNFSKFakePinP.nc
new file mode 100644
index 00000000..08a3995c
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/Tda5250ASKNFSKFakePinP.nc
@@ -0,0 +1,18 @@
+/*
+* The ASKNFSK Pin is not connected on the eyes platforms...
+*/
+
+module Tda5250ASKNFSKFakePinP {
+  provides interface	GeneralIO;
+}
+
+implementation {
+  async command void GeneralIO.set(){}
+  async command void GeneralIO.clr(){}
+  async command void GeneralIO.toggle(){}
+  async command bool GeneralIO.get(){ return FALSE; }
+  async command void GeneralIO.makeInput(){}
+  async command bool GeneralIO.isOutput() { return FALSE; }
+  async command void GeneralIO.makeOutput(){}
+  async command bool GeneralIO.isInput() { return FALSE; }
+}
diff --git a/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioIOC.nc b/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioIOC.nc
new file mode 100644
index 00000000..9b83ab9f
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioIOC.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:41 $
+ * ========================================================================
+ */
+
+ /**
+ * Configuration file for using the IO pins to the TDA5250 Radio on
+ * the eyesIFX platforms.
+ *
+ * @author Kevin Klues <klues@tkn.tu-berlin.de>
+ */
+configuration Tda5250RadioIOC
+{
+  provides interface GeneralIO as Tda5250RadioPASKNFSK;
+  provides interface GeneralIO as Tda5250RadioBUSM;
+  provides interface GeneralIO as Tda5250RadioENTDA;
+  provides interface GeneralIO as Tda5250RadioTXRX;
+  provides interface GeneralIO as Tda5250RadioDATA;
+  provides interface GeneralIO as Tda5250RadioPWDDD;
+}
+implementation {
+  components
+      HplMsp430GeneralIOC as MspGeneralIO
+    , Tda5250ASKNFSKFakePinP      
+    , new Msp430GpioC() as rBUSM
+    , new Msp430GpioC() as rENTDA
+    , new Msp430GpioC() as rTXRX
+    , new Msp430GpioC() as rDATA
+    , new Msp430GpioC() as rPWDD
+    ;
+
+  Tda5250RadioBUSM = rBUSM;
+  Tda5250RadioENTDA = rENTDA;
+  Tda5250RadioTXRX = rTXRX;
+  Tda5250RadioDATA = rDATA;
+  Tda5250RadioPWDDD = rPWDD;
+
+  Tda5250RadioPASKNFSK = Tda5250ASKNFSKFakePinP;
+  rBUSM -> MspGeneralIO.Port15;
+  rENTDA -> MspGeneralIO.Port16;
+  rTXRX -> MspGeneralIO.Port14;
+  rDATA -> MspGeneralIO.Port11;
+  rPWDD -> MspGeneralIO.Port10;
+}
+
diff --git a/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioInterruptC.nc b/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioInterruptC.nc
new file mode 100644
index 00000000..35358fab
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/Tda5250RadioInterruptC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:41 $
+ * ========================================================================
+ */
+
+ /**
+ * Configuration file for using the PWDDD interrupt for the TDA5250 Radio
+ * on the eyesIFX platforms.
+ *
+ * @author Kevin Klues <klues@tkn.tu-berlin.de>
+ */
+configuration Tda5250RadioInterruptC
+{
+  provides interface GpioInterrupt;
+}
+implementation
+{
+  components
+      HplMsp430InterruptC
+    , new Msp430InterruptC()
+    ;
+
+    GpioInterrupt = Msp430InterruptC.Interrupt;
+    Msp430InterruptC.HplInterrupt -> HplMsp430InterruptC.Port10;
+}
+
diff --git a/tos/platforms/eyesIFX/chips/tda5250/Tda5250RegCommC.nc b/tos/platforms/eyesIFX/chips/tda5250/Tda5250RegCommC.nc
new file mode 100644
index 00000000..4559cc8b
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/Tda5250RegCommC.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * Controlling the TDA5250 at the HPL layer for use with the MSP430 on the
+ * eyesIFX platforms, Configuration.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:41 $
+ * @author: Kevin Klues (klues@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+#include "tda5250BusResourceSettings.h"
+
+/**
+ * Configuration file for the registers of TDA5250 Radio on
+ * the eyesIFX platforms.
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+configuration Tda5250RegCommC {
+  provides {
+    interface Init;
+    interface Tda5250RegComm;
+    interface Pot;
+    interface Resource;
+  }
+}
+implementation {
+  components new Msp430Spi0C() as Spi
+           , Tda5250RegCommP
+           , Tda5250RadioIOC
+           , AD5200P
+           , AD5200PotIOC
+           ;
+
+  Init = Tda5250RegCommP;
+  Init = AD5200P;
+  Pot = AD5200P.Pot;
+  Resource = Tda5250RegCommP.Resource;
+
+  Tda5250RegComm = Tda5250RegCommP;
+
+  Tda5250RegCommP.BusM -> Tda5250RadioIOC.Tda5250RadioBUSM;
+
+  Tda5250RegCommP.SpiByte -> Spi;
+  Tda5250RegCommP.SpiResource -> Spi;
+
+  AD5200P.ENPOT -> AD5200PotIOC.AD5200PotENPOT;
+  AD5200P.SDPOT -> AD5200PotIOC.AD5200PotSDPOT;
+  AD5200P.SpiByte -> Spi;
+
+
+
+}
diff --git a/tos/platforms/eyesIFX/chips/tda5250/eyesIFXBaudrates.h b/tos/platforms/eyesIFX/chips/tda5250/eyesIFXBaudrates.h
new file mode 100644
index 00000000..2863240e
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/eyesIFXBaudrates.h
@@ -0,0 +1,68 @@
+/* auto generated from tda5250BusResourceSettings.h using the following perl script: 
+
+#!/usr/bin/perl -w
+use strict;
+my $state = "START";
+my $br;
+while(<>) {
+    if(/UBR_1MHZ_/) {
+	($br) = /UBR_1MHZ_(\d+)/;
+	if($state eq "START") {
+	    print '#if ';
+	    $state = "MIDDLE";
+	}
+	else {
+	    print '#elif ';
+	}
+	print 'TDA5250_UART_BAUDRATE == ', $br,"\n";
+	print '#define TDA5250_UART_UBR UBR_1MHZ_', $br, "\n";
+	print '#define TDA5250_UART_UMCTL UMCTL_1MHZ_', $br, "\n";
+    }
+}
+print '#endif',"\n"
+
+*/
+
+#if TDA5250_UART_BAUDRATE == 35108
+#define TDA5250_UART_UBR UBR_1MHZ_35108
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_35108
+#elif TDA5250_UART_BAUDRATE == 10240
+#define TDA5250_UART_UBR UBR_1MHZ_10240
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_10240
+#elif TDA5250_UART_BAUDRATE == 10922
+#define TDA5250_UART_UBR UBR_1MHZ_10922
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_10922
+#elif TDA5250_UART_BAUDRATE == 11702
+#define TDA5250_UART_UBR UBR_1MHZ_11702
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_11702
+#elif TDA5250_UART_BAUDRATE == 12603
+#define TDA5250_UART_UBR UBR_1MHZ_12603
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_12603
+#elif TDA5250_UART_BAUDRATE == 13653
+#define TDA5250_UART_UBR UBR_1MHZ_13653
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_13653
+#elif TDA5250_UART_BAUDRATE == 14894
+#define TDA5250_UART_UBR UBR_1MHZ_14894
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_14894
+#elif TDA5250_UART_BAUDRATE == 16384
+#define TDA5250_UART_UBR UBR_1MHZ_16384
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_16384
+#elif TDA5250_UART_BAUDRATE == 18204
+#define TDA5250_UART_UBR UBR_1MHZ_18204
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_18204
+#elif TDA5250_UART_BAUDRATE == 20480
+#define TDA5250_UART_UBR UBR_1MHZ_20480
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_20480
+#elif TDA5250_UART_BAUDRATE == 23405
+#define TDA5250_UART_UBR UBR_1MHZ_23405
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_23405
+#elif TDA5250_UART_BAUDRATE == 27306
+#define TDA5250_UART_UBR UBR_1MHZ_27306
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_27306
+#elif TDA5250_UART_BAUDRATE == 32768
+#define TDA5250_UART_UBR UBR_1MHZ_32768
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_32768
+#elif TDA5250_UART_BAUDRATE == 40960
+#define TDA5250_UART_UBR UBR_1MHZ_40960
+#define TDA5250_UART_UMCTL UMCTL_1MHZ_40960
+#endif
diff --git a/tos/platforms/eyesIFX/chips/tda5250/tda5250BusResourceSettings.h b/tos/platforms/eyesIFX/chips/tda5250/tda5250BusResourceSettings.h
new file mode 100644
index 00000000..147b1d40
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/tda5250BusResourceSettings.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2006, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.12 $
+ * $Date: 2008-06-24 14:46:18 $
+ * ========================================================================
+ */
+
+#include "msp430usart.h"
+
+#ifndef TDA5250BUSRESOURCEID_H
+#define TDA5250BUSRESOURCEID_H
+
+enum {
+    TDA5250_UART_BUS_ID = unique(MSP430_UARTO_BUS)
+};
+
+/* frequency of crystal: 18089580 Hz,
+   divide by 18 -> 1004976 Hz */
+
+#ifndef TDA5250_UART_BAUDRATE
+#define TDA5250_UART_BAUDRATE 32768U
+#endif
+
+enum {
+    /** use real frequency, use only settings that result in an even byte time */
+    UBR_1MHZ_10240=0x0062,  UMCTL_1MHZ_10240=0x08, // 10240 bit/s
+    UBR_1MHZ_10922=0x005C,  UMCTL_1MHZ_10922=0x00, // 10922 bit/s
+    UBR_1MHZ_11702=0x0055,  UMCTL_1MHZ_11702=0xEF, // 11702 bit/s
+    UBR_1MHZ_12603=0x004F,  UMCTL_1MHZ_12603=0xDD, // 12603 bit/s
+    UBR_1MHZ_13653=0x0049,  UMCTL_1MHZ_13653=0xB5, // 13653 bit/s
+    UBR_1MHZ_14894=0x0043,  UMCTL_1MHZ_14894=0xAA, // 14894 bit/s
+    UBR_1MHZ_16384=0x003D,  UMCTL_1MHZ_16384=0x92, // 16384 bit/s
+    UBR_1MHZ_18204=0x0037,  UMCTL_1MHZ_18204=0x84, // 18204 bit/s
+    UBR_1MHZ_20480=0x0031,  UMCTL_1MHZ_20480=0x80, // 20480 bit/s
+    UBR_1MHZ_23405=0x002A,  UMCTL_1MHZ_23405=0x7F, // 23405 bit/s
+    UBR_1MHZ_27306=0x0024,  UMCTL_1MHZ_27306=0x7B, // 27306 bit/s
+    UBR_1MHZ_32768=0x001E,  UMCTL_1MHZ_32768=0x5B, // 32768 bit/s
+    UBR_1MHZ_40960=0x0018,  UMCTL_1MHZ_40960=0x55, // 40960 bit/s
+};
+
+#include "eyesIFXBaudrates.h"
+
+msp430_uart_union_config_t tda5250_uart_config = { {ubr: TDA5250_UART_UBR, umctl: TDA5250_UART_UMCTL, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie:0, urxwie: 0, urxe: 1, utxe: 0} };
+
+enum {
+    TDA5250_32KHZ_BYTE_TIME = (32768UL*10)/TDA5250_UART_BAUDRATE
+};
+
+#endif
diff --git a/tos/platforms/eyesIFX/chips/tda5250/tda5250RegDefaultSettings.h b/tos/platforms/eyesIFX/chips/tda5250/tda5250RegDefaultSettings.h
new file mode 100644
index 00000000..44dd9ee4
--- /dev/null
+++ b/tos/platforms/eyesIFX/chips/tda5250/tda5250RegDefaultSettings.h
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.13 $
+ * $Date: 2008-06-24 14:46:18 $
+ * ========================================================================
+ */
+
+ /**
+ * tda5250RegDefaultSettings Header File
+ * Defines the default values of the registers for the TDA5250 Radio
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+
+#ifndef TDA5250REGDEFAULTSETTINGS_H
+#define TDA5250REGDEFAULTSETTINGS_H
+
+// Default values of data registers
+
+/** regulate distance by switching the amplifiers */
+// longest distance
+#define FULL_RANGE                                   0x04F9
+// shorter distance; low gain, high tx energy consumption (30m)
+#define MED_RANGE_HP                                 0x04E9
+// shorter distance; high gain, low tx energy consumption (25m)
+#define MED_RANGE_LP                                 0x04F8
+// shortest: low gain; low tx energy consumption (1m to 3m range)
+#define TABLE_TOP                                    0x04E8
+
+/** regulate distance using variable resistor, values for high tx power */
+#define RF_HITX_DAMPING_0dB  255
+#define RF_HITX_DAMPING_5dB  248
+#define RF_HITX_DAMPING_10dB 245
+#define RF_HITX_DAMPING_15dB 241
+#define RF_HITX_DAMPING_20dB 239
+
+/** regulate distance using variable resistor, values for low tx power */
+#define RF_LOTX_DAMPING_0dB  255
+#define RF_LOTX_DAMPING_5dB  90
+#define RF_LOTX_DAMPING_10dB 67
+#define RF_LOTX_DAMPING_15dB 50
+#define RF_LOTX_DAMPING_16dB 40
+#define RF_LOTX_DAMPING_17dB 30
+
+// choose one
+#define INITIAL_RF_POWER RF_HITX_DAMPING_0dB
+#ifndef TDA5250_REG_DEFAULT_SETTING_CONFIG
+#define TDA5250_REG_DEFAULT_SETTING_CONFIG           FULL_RANGE
+#endif
+#ifndef TDA5250_REG_DEFAULT_SETTING_LPF
+#define TDA5250_REG_DEFAULT_SETTING_LPF              0x8C
+#endif
+
+#define TDA5250_REG_DEFAULT_SETTING_FSK              0x0A0C
+#define TDA5250_REG_DEFAULT_SETTING_XTAL_TUNING      0x0012
+
+#define TDA5250_REG_DEFAULT_SETTING_ON_TIME          0xFEC0
+#define TDA5250_REG_DEFAULT_SETTING_OFF_TIME         0xF380
+#define TDA5250_REG_DEFAULT_SETTING_COUNT_TH1        0x0000
+#define TDA5250_REG_DEFAULT_SETTING_COUNT_TH2        0x0001
+#define TDA5250_REG_DEFAULT_SETTING_RSSI_TH3         0xFF
+#define TDA5250_REG_DEFAULT_SETTING_CLK_DIV          0x08
+#define TDA5250_REG_DEFAULT_SETTING_XTAL_CONFIG      0x01
+#define TDA5250_REG_DEFAULT_SETTING_BLOCK_PD         0xFFFF
+
+#endif //TDA5250REGDEFAULTSETTINGS_H
+
diff --git a/tos/platforms/eyesIFX/crc.h b/tos/platforms/eyesIFX/crc.h
new file mode 100644
index 00000000..ef4c43be
--- /dev/null
+++ b/tos/platforms/eyesIFX/crc.h
@@ -0,0 +1,53 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*- */
+/* Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * This CRC-16 function produces a 16-bit running CRC that adheres to the
+ * ITU-T CRC standard.
+ *
+ * The ITU-T polynomial is: G_16(x) = x^16 + x^12 + x^5 + 1
+ * @param crc Running CRC value
+ * @param b Byte to "add" to the CRC
+ * @return New CRC value
+ *
+ * @author Andreas Koepke <koepke@tkn.tu-berlin.de> 
+ * @author Paul Curtis (pointed out this implementation, which is believed to be public domain)
+ */
+#ifndef CRC_H
+#define CRC_H
+
+uint16_t crcByte(uint16_t crc, uint8_t b) {
+  crc = (uint8_t)(crc >> 8) | (crc << 8);
+  crc ^= b;
+  crc ^= (uint8_t)(crc & 0xff) >> 4;
+  crc ^= crc << 12;
+  crc ^= (crc & 0xff) << 5;
+  return crc;
+}
+
+#endif
diff --git a/tos/platforms/eyesIFX/eyesIFXSerialP.nc b/tos/platforms/eyesIFX/eyesIFXSerialP.nc
new file mode 100644
index 00000000..4d946689
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXSerialP.nc
@@ -0,0 +1,25 @@
+module eyesIFXSerialP {
+ provides interface StdControl;
+ provides interface Msp430UartConfigure;
+ uses interface Resource;
+}
+implementation {
+  enum {
+     UBR_1MHZ_57601=0x0011,  UMCTL_1MHZ_57601=0xAA // 57600 bit/s
+  };			     
+
+  msp430_uart_union_config_t msp430_uart_eyes_config = { {ubr: UBR_1MHZ_57601, umctl: UMCTL_1MHZ_57601, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, urxe: 1, utxe: 1} };
+
+  command error_t StdControl.start(){
+    return call Resource.immediateRequest();
+  }
+  command error_t StdControl.stop(){
+    call Resource.release();
+    return SUCCESS;
+  }
+  event void Resource.granted(){}
+
+  async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() {
+    return &msp430_uart_eyes_config;
+  }
+}
diff --git a/tos/platforms/eyesIFX/eyesIFXv1/.platform b/tos/platforms/eyesIFX/eyesIFXv1/.platform
new file mode 100644
index 00000000..5e37b74f
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXv1/.platform
@@ -0,0 +1,17 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  
+
+push( @includes, qw(
+
+  %T/platforms/eyesIFX/eyesIFXv1
+  %T/platforms/eyesIFX/eyesIFXv1/chips/stm25p
+  %T/chips/stm25p
+) );
+
+push ( @opts, qw(
+
+  -mmcu=msp430x149
+) );
+
diff --git a/tos/platforms/eyesIFX/eyesIFXv1/hardware.h b/tos/platforms/eyesIFX/eyesIFXv1/hardware.h
new file mode 100644
index 00000000..28edea97
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXv1/hardware.h
@@ -0,0 +1,235 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id: hardware.h,v 1.5 2009-07-01 19:26:59 scipio Exp $
+ *
+ */
+
+#ifndef TOSH_HARDWARE_EYESIFX
+#define TOSH_HARDWARE_EYESIFX
+
+#include "msp430hardware.h"
+
+// enum so components can override power saving,
+// as per TEP 112.
+enum {
+  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
+};
+
+// LED assignments
+TOSH_ASSIGN_PIN(RED_LED, 5, 0); // Compatibility with the mica2
+TOSH_ASSIGN_PIN(GREEN_LED, 5, 1);
+TOSH_ASSIGN_PIN(YELLOW_LED, 5, 2);
+
+// Debug Pin assignments
+TOSH_ASSIGN_PIN(DEBUG_PIN1, 1, 2);
+TOSH_ASSIGN_PIN(DEBUG_PIN2, 1, 3);
+
+TOSH_ASSIGN_PIN(LED0, 5, 0);
+TOSH_ASSIGN_PIN(LED1, 5, 1);
+TOSH_ASSIGN_PIN(LED2, 5, 2);
+TOSH_ASSIGN_PIN(LED3, 5, 3);
+
+// TDA5250 assignments
+TOSH_ASSIGN_PIN(TDA_PWDDD, 1, 0); // TDA PWDDD
+TOSH_ASSIGN_PIN(TDA_DATA, 1, 1);  // TDA DATA (timerA, CCI0A)
+TOSH_ASSIGN_PIN(TDA_TXRX, 1, 4);  // TDA TX/RX
+TOSH_ASSIGN_PIN(TDA_BUSM, 1, 5);  // TDA BUSM
+TOSH_ASSIGN_PIN(TDA_ENTDA, 1, 6); // TDA EN_TDA
+
+// USART0 assignments
+TOSH_ASSIGN_PIN(SIMO0, 3, 1); // SIMO (MSP) -> BUSDATA (TDA5250)
+TOSH_ASSIGN_PIN(SOMI0, 3, 2); // SOMI (MSP) -> BUSDATA (TDA5250)
+TOSH_ASSIGN_PIN(UCLK0, 3, 3); // UCLK (MSP) -> BUSCLK (TDA5250)
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);   // USART0 -> data1 (TDA5250)
+TOSH_ASSIGN_PIN(URXD0, 3, 5);   // USART0 -> data1 (TDA5250)
+
+// USART1 assignments
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);   // USART1 -> ST3232
+TOSH_ASSIGN_PIN(URXD1, 3, 7);   // USART1 -> ST3232
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+
+// Sensor assignments
+TOSH_ASSIGN_PIN(RSSI, 6, 3);
+TOSH_ASSIGN_PIN(TEMP, 6, 0);
+TOSH_ASSIGN_PIN(LIGHT, 6, 2);
+TOSH_ASSIGN_PIN(ADC_A1, 6, 1);
+
+// Potentiometer
+TOSH_ASSIGN_PIN(POT_EN, 2, 4);
+TOSH_ASSIGN_PIN(POT_SD, 2, 3);
+
+// TimerA output
+TOSH_ASSIGN_PIN(TIMERA0, 1, 1); //2,7
+TOSH_ASSIGN_PIN(TIMERA1, 1, 2);
+TOSH_ASSIGN_PIN(TIMERA2, 1, 3);
+
+// TimerB output
+TOSH_ASSIGN_PIN(TIMERB0, 4, 0);
+TOSH_ASSIGN_PIN(TIMERB1, 4, 1);
+TOSH_ASSIGN_PIN(TIMERB2, 4, 2);
+
+// SMCLK output
+TOSH_ASSIGN_PIN(SMCLK, 5, 5); //2,7
+
+// ACLK output
+TOSH_ASSIGN_PIN(ACLK, 2, 0); 
+
+// Flash 
+TOSH_ASSIGN_PIN(FLASH_CS, 1, 7);
+
+// send a bit via bit-banging to the flash
+void TOSH_FLASH_M25P_DP_bit(bool set) {
+  if (set)
+    TOSH_SET_SIMO0_PIN();
+  else
+    TOSH_CLR_SIMO0_PIN();
+  TOSH_SET_UCLK0_PIN();
+  TOSH_CLR_UCLK0_PIN();
+}
+
+inline void TOSH_wait(void)
+{
+  nop(); nop();
+}
+
+inline void uwait(uint16_t u) 
+{ 
+  /*
+  uint16_t i;
+  if (u < 500)
+    for (i=2; i < u; i++) { 
+      asm volatile("nop\n\t"
+                   "nop\n\t"
+                   "nop\n\t"
+                   "nop\n\t"
+                   ::);
+    }
+  else
+    for (i=0; i < u; i++) { 
+      asm volatile("nop\n\t"
+                   "nop\n\t"
+                   "nop\n\t"
+                   "nop\n\t"
+                   ::);
+    }
+  */
+  uint16_t t0 = TAR;
+  while((TAR - t0) <= u);
+} 
+
+void TOSH_FLASH_M25P_DP() {
+  //  SIMO0, UCLK0
+  TOSH_MAKE_SIMO0_OUTPUT();
+  TOSH_MAKE_UCLK0_OUTPUT();
+  TOSH_MAKE_FLASH_CS_OUTPUT();
+  TOSH_SET_FLASH_CS_PIN();
+
+  TOSH_wait();
+
+  // initiate sequence;
+  TOSH_CLR_FLASH_CS_PIN();
+  TOSH_CLR_UCLK0_PIN();
+  
+  TOSH_FLASH_M25P_DP_bit(TRUE);   // 0
+  TOSH_FLASH_M25P_DP_bit(FALSE);  // 1
+  TOSH_FLASH_M25P_DP_bit(TRUE);   // 2
+  TOSH_FLASH_M25P_DP_bit(TRUE);   // 3
+  TOSH_FLASH_M25P_DP_bit(TRUE);   // 4
+  TOSH_FLASH_M25P_DP_bit(FALSE);  // 5
+  TOSH_FLASH_M25P_DP_bit(FALSE);  // 6
+  TOSH_FLASH_M25P_DP_bit(TRUE);   // 7
+
+  TOSH_SET_FLASH_CS_PIN();
+
+  TOSH_SET_SIMO0_PIN();
+  TOSH_MAKE_SIMO0_INPUT();
+  TOSH_MAKE_UCLK0_INPUT();
+}
+
+
+#undef atomic
+void TOSH_SET_PIN_DIRECTIONS(void)
+{
+atomic {
+ P1OUT = 0x00;
+  P2OUT = 0x00;
+  P3OUT = 0x00;
+  P4OUT = 0x00;
+  P5OUT = 0x00;
+  P6OUT = 0x00;
+
+  P1SEL = 0x00;
+  P2SEL = 0x00;
+  P3SEL = 0x00;
+  P4SEL = 0x00;
+  P5SEL = 0x00;
+  P6SEL = 0x00;
+ 
+    P1DIR = 0x07;
+//  P2DIR = 0xff;
+//  P3DIR = 0xff;
+    P4DIR = 0xff;
+    P5DIR = 0x0f;
+    P6DIR = 0xf0;
+
+
+  TOSH_CLR_TDA_PWDDD_PIN(); // radio has to be on on power-up
+  TOSH_MAKE_TDA_PWDDD_OUTPUT();
+
+  TOSH_SET_TDA_ENTDA_PIN(); // deselect the radio
+  TOSH_MAKE_TDA_ENTDA_OUTPUT();
+  
+  TOSH_SET_FLASH_CS_PIN(); // put flash in standby mode
+  TOSH_MAKE_FLASH_CS_OUTPUT();
+ 
+  TOSH_SET_POT_SD_PIN(); // put potentiometer in shutdown mode
+  TOSH_MAKE_POT_SD_OUTPUT();
+
+  TOSH_SET_POT_EN_PIN(); // deselect potentiometer
+  TOSH_MAKE_POT_EN_OUTPUT();
+
+  TOSH_SEL_TEMP_MODFUNC(); //prepare pin for analog excitation from the temperature sensor
+  TOSH_MAKE_TEMP_INPUT();
+  TOSH_SEL_LIGHT_MODFUNC(); //prepare pin for analog excitation from the light sensor
+  TOSH_MAKE_LIGHT_INPUT();
+
+  P1IE = 0;
+  P2IE = 0;
+
+  // wait 12ms for the radio and flash to start
+  uwait(1024*12);
+   //
+  // Put the flash in deep sleep state
+  TOSH_FLASH_M25P_DP();
+  TOSH_SET_TDA_PWDDD_PIN(); // put the radio in sleep
+}
+}
+#endif //TOSH_HARDWARE_H
diff --git a/tos/platforms/eyesIFX/eyesIFXv2/.platform b/tos/platforms/eyesIFX/eyesIFXv2/.platform
new file mode 100644
index 00000000..473901ef
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXv2/.platform
@@ -0,0 +1,16 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  
+
+push( @includes, qw(
+
+  %T/platforms/eyesIFX/eyesIFXv2
+  %T/platforms/eyesIFX/eyesIFXv2/chips/at45db
+  %T/chips/at45db
+) );
+
+push ( @opts, qw(
+
+  -mmcu=msp430x1611
+) );
diff --git a/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/HplAt45dbC.nc b/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/HplAt45dbC.nc
new file mode 100644
index 00000000..860e5efc
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/HplAt45dbC.nc
@@ -0,0 +1,50 @@
+/*
+* Copyright (c) 2006, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+configuration HplAt45dbC {
+  provides interface HplAt45db;
+}
+implementation {
+  
+  components  new HplAt45dbByteC(9), 
+							new Msp430Spi0C() as Spi, 
+							HplAt45dbP,
+							HplMsp430GeneralIOC as MspGeneralIO,
+							new Msp430GpioC() as Select;  
+  
+	HplAt45db = HplAt45dbByteC;
+
+  HplAt45dbByteC.Resource -> Spi;
+  HplAt45dbByteC.FlashSpi -> Spi;
+  HplAt45dbByteC.HplAt45dbByte -> HplAt45dbP;
+	
+	Select -> MspGeneralIO.Port17;
+	HplAt45dbP.Select -> Select; 
+	HplAt45dbP.FlashSpi -> Spi;
+}
diff --git a/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/HplAt45dbP.nc b/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/HplAt45dbP.nc
new file mode 100644
index 00000000..d752b6bc
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/HplAt45dbP.nc
@@ -0,0 +1,69 @@
+/*
+* Copyright (c) 2006, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+module HplAt45dbP {
+  provides {
+    interface HplAt45dbByte;
+  }
+  uses {
+		interface SpiByte as FlashSpi;
+    interface GeneralIO as Select;
+  }
+}
+implementation
+{
+  command void HplAt45dbByte.select() {
+    call Select.clr();
+  }
+
+  command void HplAt45dbByte.deselect() {
+    call Select.set();
+  }
+  
+	task void idleTask() {
+		uint8_t status;
+		status = call FlashSpi.write(0);
+		if (!(status & 0x80)) {
+			post idleTask();
+		} else {
+			signal HplAt45dbByte.idle();
+		}
+	}
+
+  command void HplAt45dbByte.waitIdle() {
+		post idleTask();
+  }
+  
+  command bool HplAt45dbByte.getCompareStatus() {
+		uint8_t status;
+		status = call FlashSpi.write(0);
+    return (!(status & 0x40));
+  }
+}
diff --git a/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/HplAt45db_chip.h b/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/HplAt45db_chip.h
new file mode 100644
index 00000000..59c1586e
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXv2/chips/at45db/HplAt45db_chip.h
@@ -0,0 +1,56 @@
+// $Id: HplAt45db_chip.h,v 1.6 2010-06-29 22:07:53 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef HPLAT45DB_CHIP_H
+#define HPLAT45DB_CHIP_H
+
+// flash characteristics
+enum {
+  AT45_MAX_PAGES = 2048,
+  AT45_PAGE_SIZE = 264,
+  AT45_PAGE_SIZE_LOG2 = 8 // For those who want to ignore the last 8 bytes
+};
+
+typedef uint16_t at45page_t;
+typedef uint16_t at45pageoffset_t; /* must fit 0 to AT45_PAGE_SIZE - 1 */
+
+#endif
diff --git a/tos/platforms/eyesIFX/eyesIFXv2/hardware.h b/tos/platforms/eyesIFX/eyesIFXv2/hardware.h
new file mode 100644
index 00000000..59ca46f4
--- /dev/null
+++ b/tos/platforms/eyesIFX/eyesIFXv2/hardware.h
@@ -0,0 +1,194 @@
+/*
+ * Copyright (c) 2004, Technische Universität Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id: hardware.h,v 1.5 2009-07-01 19:27:00 scipio Exp $
+ *
+ */
+
+#ifndef TOSH_HARDWARE_EYESIFXV2
+#define TOSH_HARDWARE_EYESIFXV2
+
+#include "msp430hardware.h"
+
+// enum so components can override power saving,
+// as per TEP 112.
+enum {
+  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
+};
+
+// LED assignments
+TOSH_ASSIGN_PIN(RED_LED, 5, 0); // Compatibility with the mica2
+TOSH_ASSIGN_PIN(GREEN_LED, 5, 1);
+TOSH_ASSIGN_PIN(YELLOW_LED, 5, 2);
+
+TOSH_ASSIGN_PIN(LED0, 5, 0);
+TOSH_ASSIGN_PIN(LED1, 5, 1);
+TOSH_ASSIGN_PIN(LED2, 5, 2);
+TOSH_ASSIGN_PIN(LED3, 5, 3);
+
+// TDA5250 assignments
+TOSH_ASSIGN_PIN(TDA_BUSM, 1, 5);  // TDA BUSM
+TOSH_ASSIGN_PIN(TDA_ENTDA, 1, 6); // TDA EN_TDA
+TOSH_ASSIGN_PIN(TDA_TXRX, 1, 4);  // TDA TX/RX
+TOSH_ASSIGN_PIN(TDA_DATA, 1, 1);  // TDA DATA (timerA, CCI0A)
+TOSH_ASSIGN_PIN(TDA_PWDDD, 1, 0); // TDA PWDDD
+
+// USART0 assignments
+TOSH_ASSIGN_PIN(SIMO0, 3, 1); // SIMO (MSP) -> BUSDATA (TDA5250)
+TOSH_ASSIGN_PIN(SOMI0, 3, 2); // SOMI (MSP) -> BUSDATA (TDA5250)
+TOSH_ASSIGN_PIN(UCLK0, 3, 3); // UCLK (MSP) -> BUSCLK (TDA5250)
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);   // USART0 -> data1 (TDA5250)
+TOSH_ASSIGN_PIN(URXD0, 3, 5);   // USART0 -> data1 (TDA5250)
+
+// USART1 assignments
+
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);   // USART1 -> USB
+TOSH_ASSIGN_PIN(URXD1, 3, 7);   // USART1 -> USB
+/*
+void TOSH_SEL_SIMO1_IOFUNC() { }
+void TOSH_SEL_SOMI1_IOFUNC() { }
+void TOSH_SEL_UCLK1_IOFUNC() { }
+void TOSH_SEL_SIMO1_MODFUNC() { }
+void TOSH_SEL_SOMI1_MODFUNC() { }
+void TOSH_SEL_UCLK1_MODFUNC() { }
+*/
+// Sensor assignments
+TOSH_ASSIGN_PIN(RSSI, 6, 3);
+TOSH_ASSIGN_PIN(TEMP, 6, 0);
+TOSH_ASSIGN_PIN(LIGHT, 6, 2);
+TOSH_ASSIGN_PIN(VREF, 6, 7);
+TOSH_ASSIGN_PIN(B0, 6, 4);
+TOSH_ASSIGN_PIN(B1, 6, 5);
+TOSH_ASSIGN_PIN(B2, 6, 7);
+TOSH_ASSIGN_PIN(B3, 6, 6);
+TOSH_ASSIGN_PIN(B4, 6, 1);
+
+
+// Potentiometer
+TOSH_ASSIGN_PIN(POT_EN, 2, 4);
+TOSH_ASSIGN_PIN(POT_SD, 2, 3);
+
+// TimerA output
+TOSH_ASSIGN_PIN(TIMERA0, 1, 1); //2,7
+TOSH_ASSIGN_PIN(TIMERA1, 1, 2);
+TOSH_ASSIGN_PIN(TIMERA2, 1, 3);
+
+// TimerB output
+TOSH_ASSIGN_PIN(TIMERB0, 4, 0);
+TOSH_ASSIGN_PIN(TIMERB1, 4, 1);
+TOSH_ASSIGN_PIN(TIMERB2, 4, 2);
+
+// SMCLK output
+TOSH_ASSIGN_PIN(SMCLK, 5, 5); //2,7
+
+// ACLK output
+TOSH_ASSIGN_PIN(ACLK, 2, 0);
+
+// Flash
+TOSH_ASSIGN_PIN(FLASH_CS, 1, 7);
+
+TOSH_ASSIGN_PIN(DEBUG_1, 1, 1);
+TOSH_ASSIGN_PIN(DEBUG_2, 1, 2);
+
+// Temperature sensor enable
+TOSH_ASSIGN_PIN(TEMP_EN, 5, 4);
+ 
+// USB power monitoring
+TOSH_ASSIGN_PIN(USB_POWER, 1, 3);
+
+inline void uwait(uint16_t u) 
+{ 
+  uint16_t t0 = TAR;
+  while((TAR - t0) <= u);
+} 
+
+
+#undef atomic
+void TOSH_SET_PIN_DIRECTIONS(void)
+{
+
+  // Default seting is I/O and output zero.
+
+atomic {
+
+  P1OUT = 0x00;
+  P2OUT = 0x00;
+  P3OUT = 0x00;
+  P4OUT = 0x00;
+  P5OUT = 0x00;
+  P6OUT = 0x00;
+
+  P1SEL = 0x00;
+  P2SEL = 0x00;
+  P3SEL = 0x00;
+  P4SEL = 0x00;
+  P5SEL = 0x00;
+  P6SEL = 0x00;
+ 
+    P1DIR = 0x07;
+//  P2DIR = 0xff;
+//  P3DIR = 0xff;
+    P4DIR = 0xff;
+    P5DIR = 0x0f;
+    P6DIR = 0xf0;
+
+  TOSH_MAKE_TDA_PWDDD_OUTPUT();
+  TOSH_MAKE_TDA_ENTDA_OUTPUT();
+  TOSH_MAKE_FLASH_CS_OUTPUT();
+  TOSH_MAKE_POT_SD_OUTPUT();
+  TOSH_MAKE_POT_EN_OUTPUT();
+
+
+  //disable temperature sensor
+  TOSH_CLR_TEMP_EN_PIN();
+  TOSH_MAKE_TEMP_EN_OUTPUT();
+
+  // detect USB power
+  TOSH_SEL_USB_POWER_MODFUNC();
+  TOSH_MAKE_USB_POWER_INPUT();
+  
+  
+ // wait 12ms for the radio to start
+  uwait(1024*12);
+
+  TOSH_SET_TDA_ENTDA_PIN(); // deselect the radio
+  TOSH_SET_FLASH_CS_PIN(); // put flash in standby mode
+  TOSH_SET_POT_SD_PIN(); // put potentiometer in shutdown mode
+  TOSH_SET_POT_EN_PIN(); // deselect potentiometer
+  TOSH_SEL_TEMP_MODFUNC(); //prepare pin for analog excitation from the temperature sensor
+  TOSH_MAKE_TEMP_INPUT();
+  TOSH_SEL_LIGHT_MODFUNC(); //prepare pin for analog excitation from the light sensor
+  TOSH_MAKE_LIGHT_INPUT();
+
+  P1IE = 0;
+  P2IE = 0;
+
+  TOSH_SET_TDA_PWDDD_PIN(); // put radio in sleep
+}
+}
+#endif //TOSH_HARDWARE_EYESIFXV2
diff --git a/tos/platforms/eyesIFX/lf-crc.h b/tos/platforms/eyesIFX/lf-crc.h
new file mode 100644
index 00000000..ef4c43be
--- /dev/null
+++ b/tos/platforms/eyesIFX/lf-crc.h
@@ -0,0 +1,53 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*- */
+/* Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * This CRC-16 function produces a 16-bit running CRC that adheres to the
+ * ITU-T CRC standard.
+ *
+ * The ITU-T polynomial is: G_16(x) = x^16 + x^12 + x^5 + 1
+ * @param crc Running CRC value
+ * @param b Byte to "add" to the CRC
+ * @return New CRC value
+ *
+ * @author Andreas Koepke <koepke@tkn.tu-berlin.de> 
+ * @author Paul Curtis (pointed out this implementation, which is believed to be public domain)
+ */
+#ifndef CRC_H
+#define CRC_H
+
+uint16_t crcByte(uint16_t crc, uint8_t b) {
+  crc = (uint8_t)(crc >> 8) | (crc << 8);
+  crc ^= b;
+  crc ^= (uint8_t)(crc & 0xff) >> 4;
+  crc ^= crc << 12;
+  crc ^= (crc & 0xff) << 5;
+  return crc;
+}
+
+#endif
diff --git a/tos/platforms/eyesIFX/net/lqi/CC2420ActiveMessageC.nc b/tos/platforms/eyesIFX/net/lqi/CC2420ActiveMessageC.nc
new file mode 100644
index 00000000..50121a59
--- /dev/null
+++ b/tos/platforms/eyesIFX/net/lqi/CC2420ActiveMessageC.nc
@@ -0,0 +1,62 @@
+/* -*- mode:c++; indent-tabs-mode:nil -*- 
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Pseudo module to enable MultihopLqi on eyesIFX. The mapping of
+ * strength to LQI is based on the packet delivery ratio.  For CC2420
+ * the ratios were taken from: Kannan Srinivasan and Philip Levis:
+ * "RSSI is Under Appreciated" Third Workshop on Embedded Networked
+ * Sensors, EmNets 2006.
+ * 
+ * @author Andreas Köpke <koepke@tkn.tu-berlin.de>
+ */
+
+#include "radiopacketfunctions.h"
+
+module CC2420ActiveMessageC {
+    provides {
+        interface CC2420Packet;
+    }
+}
+implementation {
+    async command uint8_t CC2420Packet.getPower(message_t* p_msg ) {
+        return 31;
+    }
+    async command void CC2420Packet.setPower(message_t* p_msg, uint8_t power) {
+    }
+    async command int8_t CC2420Packet.getRssi(message_t* p_msg ) {
+        return (getMetadata(p_msg))->strength;
+    }
+    async command uint8_t CC2420Packet.getLqi( message_t* p_msg ) {
+        uint32_t s = (getMetadata(p_msg))->strength;
+        if(s > 60) s = 10;
+        if(s > 22) s = 22;
+        return (s*13/5 + 48);
+    }
+}
diff --git a/tos/platforms/eyesIFX/net/lqi/CC2420Packet.nc b/tos/platforms/eyesIFX/net/lqi/CC2420Packet.nc
new file mode 100644
index 00000000..b18df717
--- /dev/null
+++ b/tos/platforms/eyesIFX/net/lqi/CC2420Packet.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @author David Moss
+ * @author Chad Metcalf
+ */
+
+#include "message.h"
+
+interface CC2420Packet {
+  
+  /**
+   * Get transmission power setting for current packet.
+   *
+   * @param the message
+   */
+  async command uint8_t getPower( message_t* p_msg );
+
+  /**
+   * Set transmission power for a given packet. Valid ranges are
+   * between 0 and 31.
+   *
+   * @param p_msg the message.
+   * @param power transmission power.
+   */
+  async command void setPower( message_t* p_msg, uint8_t power );
+  
+  /**
+   * Get rssi value for a given packet. For received packets, it is
+   * the received signal strength when receiving that packet. For sent
+   * packets, it is the received signal strength of the ack if an ack
+   * was received.
+   */
+  async command int8_t getRssi( message_t* p_msg );
+
+  /**
+   * Get lqi value for a given packet. For received packets, it is the
+   * link quality indicator value when receiving that packet. For sent
+   * packets, it is the link quality indicator value of the ack if an
+   * ack was received.
+   */
+  async command uint8_t getLqi( message_t* p_msg );
+  
+}
diff --git a/tos/platforms/eyesIFX/platform.h b/tos/platforms/eyesIFX/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/eyesIFX/platform_message.h b/tos/platforms/eyesIFX/platform_message.h
new file mode 100644
index 00000000..0a2100e1
--- /dev/null
+++ b/tos/platforms/eyesIFX/platform_message.h
@@ -0,0 +1,83 @@
+/* $Id: platform_message.h,v 1.6 2010-06-29 22:07:53 scipio Exp $
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific TDA5250 packet structures.
+ *
+ * @author Philip Levis
+ * @author Vlado Handziski (TDA5250 Modifications)
+ * @date   May 16 2005
+ * Revision:  $Revision: 1.6 $
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "Serial.h"
+#include "tda5250_message.h"
+
+#ifndef TOSH_DATA_LENGTH
+#define TOSH_DATA_LENGTH 48
+#endif
+
+typedef union message_header_t {
+  tda5250_header_t radio;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer_t {
+  tda5250_footer_t radio;
+} message_footer_t;
+
+typedef union message_metadata_t {
+  tda5250_metadata_t radio;
+} message_metadata_t;
+
+typedef tda5250_header_t message_radio_header_t;
+typedef tda5250_footer_t message_radio_footer_t;
+typedef tda5250_metadata_t message_radio_metadata_t;
+
+#if TOSH_DATA_LENGTH < 33
+#error "TOSH_DATA_LENGH must be larger than 33 bytes for this platform."
+#endif
+
+#endif
diff --git a/tos/platforms/eyesIFX/sensors/BatteryLevel.nc b/tos/platforms/eyesIFX/sensors/BatteryLevel.nc
new file mode 100644
index 00000000..e2acfae6
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/BatteryLevel.nc
@@ -0,0 +1,39 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Description ---------------------------------------------------------
+ * Measure Battery Level in mV using the internal voltage
+ * - Author --------------------------------------------------------------
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+
+interface BatteryLevel {
+    // get the batterylevel in mV
+    async command uint16_t getLevel();
+}
diff --git a/tos/platforms/eyesIFX/sensors/BatteryLevelSensorC.nc b/tos/platforms/eyesIFX/sensors/BatteryLevelSensorC.nc
new file mode 100644
index 00000000..7aa37025
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/BatteryLevelSensorC.nc
@@ -0,0 +1,57 @@
+/* -*- mode:c++ -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.5 $
+ * $Date: 2007-03-10 21:58:37 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#include <sensors.h>
+generic configuration BatteryLevelSensorC()
+{
+    provides {
+        interface Read<uint16_t> as Read;
+        interface ReadNow<uint16_t> as ReadNow;
+        interface Resource as ReadNowResource;
+    }
+}
+implementation
+{
+    components SensorSettingsC as Settings;
+             
+    components new AdcReadClientC() as AdcReadClient;
+    Read = AdcReadClient;
+    AdcReadClient.AdcConfigure -> Settings.AdcConfigure[INTERNAL_VOLTAGE_REF_2_5V_LOW_FREQ];
+  
+    components new AdcReadNowClientC() as AdcReadNowClient;
+    ReadNow = AdcReadNowClient;
+    ReadNowResource = AdcReadNowClient;
+    AdcReadNowClient.AdcConfigure -> Settings.AdcConfigure[INTERNAL_VOLTAGE_REF_2_5V_LOW_FREQ];
+}
diff --git a/tos/platforms/eyesIFX/sensors/CoulombCounter.nc b/tos/platforms/eyesIFX/sensors/CoulombCounter.nc
new file mode 100644
index 00000000..0ce2c943
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/CoulombCounter.nc
@@ -0,0 +1,59 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface to control the coulomb counter circuit 
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de
+ */
+
+interface CoulombCounter {
+
+    /** are we currently measureing the power consumption? */
+    async command bool isMeasureing();
+    
+    /**
+     *  Start a measurement after delay seconds for duration seconds delay
+     *  seconds should be larger than 600 -- this allows to recover from a
+     *  buggy image. The delay must be smaller than 24 days, whereas duration
+     *  is full range 32bit in seconds. If the circuit is already measureing,
+     *  this command will only set the duration timer. Some platforms will
+     *  re-boot every time we fiddle with the power supply -- this trick
+     *  allows us to "continue" measureing.
+     */
+    command error_t start(uint32_t delay, uint32_t duration);
+
+    /** Stop a measurement, returns FAIL if there is no ongoing measurement */
+    command error_t stop();
+
+    /** notification: a fixed portion of energy has been consumed */
+    async event void portionConsumed();
+
+    /** notification that the measurement will be soon over */
+    event void soonOver();
+}
diff --git a/tos/platforms/eyesIFX/sensors/CoulombCounterC.nc b/tos/platforms/eyesIFX/sensors/CoulombCounterC.nc
new file mode 100644
index 00000000..364e966c
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/CoulombCounterC.nc
@@ -0,0 +1,75 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Configuration for the Coulomb Counter board interface. This one is for
+ * eyesIFXv2.1
+ *
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de
+ */
+
+configuration CoulombCounterC {
+    provides interface CoulombCounter;
+}
+implementation {
+    components MainC, CoulombCounterP;
+    components new TimerMilliC() as Timer;
+
+    MainC.SoftwareInit -> CoulombCounterP;
+    CoulombCounterP.Timer -> Timer;
+
+    CoulombCounter = CoulombCounterP;
+    
+    components HplMsp430InterruptC, HplMsp430GeneralIOC;
+    
+    /** configure coulomb counter notification pin */
+    components new Msp430InterruptC() as EnergyInterruptC,
+        new Msp430GpioC() as EnergyPinC;
+
+    EnergyInterruptC.HplInterrupt -> HplMsp430InterruptC.Port12;
+    CoulombCounterP.EnergyInterrupt -> EnergyInterruptC.Interrupt;
+    
+    EnergyPinC -> HplMsp430GeneralIOC.Port12;
+    CoulombCounterP.EnergyPin -> EnergyPinC;
+
+    /** board control interface */
+    components new Msp430GpioC() as UsbBatSwitch;
+    components new Msp430GpioC() as ResetBoard;
+
+    UsbBatSwitch -> HplMsp430GeneralIOC.Port64;
+    ResetBoard -> HplMsp430GeneralIOC.Port65;
+
+    CoulombCounterP.UsbBatSwitch -> UsbBatSwitch;
+    CoulombCounterP.ResetBoard -> ResetBoard;
+
+    /** Are we powered via USB? */
+    components new Msp430GpioC() as UsbMonitor;
+    UsbMonitor -> HplMsp430GeneralIOC.Port13;
+    CoulombCounterP.UsbMonitor -> UsbMonitor;
+}
diff --git a/tos/platforms/eyesIFX/sensors/CoulombCounterP.nc b/tos/platforms/eyesIFX/sensors/CoulombCounterP.nc
new file mode 100644
index 00000000..32c74413
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/CoulombCounterP.nc
@@ -0,0 +1,173 @@
+/* -*- mode:c++; indent-tabs-mode: nil -*-
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES {} LOSS OF USE, DATA,
+ * OR PROFITS {} OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of coulomb counter board interface for eyesIFXv2.1
+ * @author: Andreas Koepke (koepke@tkn.tu-berlin.de)
+ */
+
+#include "Timer.h"
+
+module CoulombCounterP {
+    provides {
+        interface CoulombCounter;
+        interface Init;
+    }
+    uses {
+        interface Timer<TMilli> as Timer;
+        interface GpioInterrupt as EnergyInterrupt;
+        interface GeneralIO as EnergyPin;
+        interface GeneralIO as UsbBatSwitch;
+        interface GeneralIO as ResetBoard;
+        interface GeneralIO as UsbMonitor;
+    }
+}
+implementation {
+#define MIN_DELAY 60
+    
+    uint16_t timerHighBits = 0;
+    uint32_t dur = 0;
+    bool warned = FALSE;
+    
+    void resetBoard() {
+        call ResetBoard.set();
+        __asm__("NOP");
+        call ResetBoard.clr();        
+    }
+
+    void startMeasure() {
+        unsigned i;
+        for(i = 0; i < 7; i++) {
+            call UsbBatSwitch.set();
+            call UsbBatSwitch.clr();
+        }
+    }
+
+    void stopMeasure() {
+        call UsbBatSwitch.set();
+        call UsbBatSwitch.clr();
+        // if your board allows it: delay until supply via USB stable
+        resetBoard();
+    }
+    
+    command error_t Init.init() {
+        call EnergyPin.makeInput();
+        call EnergyInterrupt.disable();
+        
+        call UsbBatSwitch.makeOutput();
+        call UsbBatSwitch.clr();
+        
+        call ResetBoard.makeOutput();
+        call ResetBoard.clr();
+        
+        call UsbMonitor.makeInput();
+        if(!call CoulombCounter.isMeasureing()) {
+            resetBoard();
+        }
+        return SUCCESS;
+    }
+
+    async command bool CoulombCounter.isMeasureing() {
+        return call UsbMonitor.get(); // high --> disconnected --> measuremode
+    }
+
+    void startLongTimer() {
+        if(timerHighBits) {
+            timerHighBits--;
+            call Timer.startOneShot(-1);
+        }
+        else {
+            call Timer.startOneShot(dur);
+        }
+    }
+    
+    command error_t CoulombCounter.start(uint32_t delay, uint32_t duration) {
+        error_t result = SUCCESS;
+        
+        timerHighBits = duration >> 22;
+        dur = duration * (uint32_t)1024;
+        warned = FALSE;
+        if(call CoulombCounter.isMeasureing()) {
+            startLongTimer();
+            call EnergyInterrupt.enableFallingEdge();
+        }
+        else {
+            if((delay < MIN_DELAY) || (delay > ((uint32_t)1<<21))) {
+                result = FAIL;
+            }
+            else {
+                call Timer.startOneShot(delay * (uint32_t)1024);
+            }
+        }
+        return result;
+    }
+
+    /** Stop a measurement, returns FAIL if there is no ongoing measurement */
+    command error_t CoulombCounter.stop() {
+        error_t result = FAIL;
+        call Timer.stop();
+        timerHighBits = 0;
+        dur = 0;
+        call EnergyInterrupt.disable();
+        if(call CoulombCounter.isMeasureing()) {
+            stopMeasure();
+            result = SUCCESS;
+        }
+        return result;
+    }
+
+    async event void EnergyInterrupt.fired() {
+        signal CoulombCounter.portionConsumed();
+    }
+    
+    event void Timer.fired() {
+        if(call CoulombCounter.isMeasureing()) {
+            if(timerHighBits) {
+                startLongTimer();
+            }
+            else {
+                if(warned == TRUE) {
+                    call CoulombCounter.stop();
+                }
+                else {
+                    signal CoulombCounter.soonOver();
+                    call Timer.startOneShot((uint32_t)MIN_DELAY*1024);
+                    warned = TRUE;
+                }
+            }
+        }
+        else {
+            // finished waiting for delay
+            resetBoard();
+            startLongTimer();
+            call EnergyInterrupt.enableFallingEdge();
+            startMeasure();
+        }
+    }
+}
diff --git a/tos/platforms/eyesIFX/sensors/DemoSensorC.nc b/tos/platforms/eyesIFX/sensors/DemoSensorC.nc
new file mode 100644
index 00000000..5c63d315
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/DemoSensorC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:41 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component is an example component that provides
+ * platform-independent access to a sensor via the <code>Read</code> and
+ * <code>ReadStream</code> interface. Which actual sensor this is, is variable
+ * defined in the implementation part below.
+ *
+ * @author Jan Hauer
+ */
+
+
+#include <sensors.h>
+generic configuration DemoSensorC()
+{
+  provides {
+    interface Read<uint16_t>;
+  }
+}
+implementation
+{
+  components SensorSettingsC as Settings;
+  components new AdcReadClientC() as AdcReadClient;
+
+  Read =  AdcReadClient;
+  AdcReadClient.AdcConfigure -> Settings.AdcConfigure[PHOTO_SENSOR_DEFAULT];
+}
diff --git a/tos/platforms/eyesIFX/sensors/DemoSensorNowC.nc b/tos/platforms/eyesIFX/sensors/DemoSensorNowC.nc
new file mode 100644
index 00000000..d709ab08
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/DemoSensorNowC.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:41 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component is an example component that provides
+ * platform-independent access to a sensor via the <code>ReadNow</code> and
+ * interface. Which actual sensor this is, is variable and defined in the
+ * implementation part below.
+ *
+ * @author Jan Hauer
+ */
+
+
+
+#include <sensors.h>
+generic configuration DemoSensorNowC()
+{
+  provides {
+    interface Resource;
+    interface ReadNow<uint16_t>;
+  }
+}
+implementation
+{
+  components SensorSettingsC as Settings;
+  components new AdcReadNowClientC() as AdcReadNowClient;
+  
+  Resource = AdcReadNowClient;
+  ReadNow = AdcReadNowClient;
+  AdcReadNowClient.AdcConfigure -> Settings.AdcConfigure[PHOTO_SENSOR_DEFAULT];  
+}
diff --git a/tos/platforms/eyesIFX/sensors/DemoSensorStreamC.nc b/tos/platforms/eyesIFX/sensors/DemoSensorStreamC.nc
new file mode 100644
index 00000000..fd6d67d5
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/DemoSensorStreamC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:41 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component is an example component that provides
+ * platform-independent access to a sensor via the <code>Read</code> and
+ * <code>ReadStream</code> interface. Which actual sensor this is, is variable
+ * defined in the implementation part below.
+ *
+ * @author Jan Hauer
+ */
+
+
+#include <sensors.h>
+generic configuration DemoSensorStreamC()
+{
+  provides {
+    interface ReadStream<uint16_t>;
+  }
+}
+implementation
+{
+  components SensorSettingsC as Settings;
+  components new AdcReadStreamClientC() as AdcReadStreamClient;
+    
+  ReadStream = AdcReadStreamClient;
+  AdcReadStreamClient.AdcConfigure -> Settings.AdcConfigure[PHOTO_SENSOR_DEFAULT];
+}
diff --git a/tos/platforms/eyesIFX/sensors/PhotoSensorC.nc b/tos/platforms/eyesIFX/sensors/PhotoSensorC.nc
new file mode 100644
index 00000000..7cc1339d
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/PhotoSensorC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:41 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component provides platform-independent access to the
+ * onboard photo sensor on the eyesIFXv{1,2} platform.
+ *
+ * @author Jan Hauer
+ */
+
+
+#include <sensors.h>
+generic configuration PhotoSensorC()
+{
+  provides {
+    interface Read<uint16_t> as Read;
+    interface ReadNow<uint16_t> as ReadNow;
+    interface Resource as ReadNowResource;
+  }
+}
+implementation
+{
+  components SensorSettingsC as Settings;
+             
+  components new AdcReadClientC() as AdcReadClient;
+  Read = AdcReadClient;
+  AdcReadClient.AdcConfigure -> Settings.AdcConfigure[PHOTO_SENSOR_DEFAULT];
+  
+  components new AdcReadNowClientC() as AdcReadNowClient;
+  ReadNow = AdcReadNowClient;
+  ReadNowResource = AdcReadNowClient;
+  AdcReadNowClient.AdcConfigure -> Settings.AdcConfigure[PHOTO_SENSOR_DEFAULT];
+}
+
diff --git a/tos/platforms/eyesIFX/sensors/ReadNowShiftC.nc b/tos/platforms/eyesIFX/sensors/ReadNowShiftC.nc
new file mode 100644
index 00000000..4b10459a
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/ReadNowShiftC.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2006-12-12 18:23:41 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+generic module ReadNowShiftC(uint8_t bits)
+{
+  provides interface ReadNow<uint16_t> as ReadNowShifted;
+  uses interface ReadNow<uint16_t> as ReadNowRaw;
+}
+implementation
+{
+  async command error_t ReadNowShifted.read() { return call ReadNowRaw.read(); }
+  async event void ReadNowRaw.readDone(error_t result, uint16_t val) 
+  { 
+    signal ReadNowShifted.readDone(result, (val << bits)); 
+  }
+}
diff --git a/tos/platforms/eyesIFX/sensors/ReadShiftC.nc b/tos/platforms/eyesIFX/sensors/ReadShiftC.nc
new file mode 100644
index 00000000..554f28f7
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/ReadShiftC.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2006-12-12 18:23:41 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+generic module ReadShiftC(uint8_t bits)
+{
+  provides interface Read<uint16_t> as ReadShifted;
+  uses interface Read<uint16_t> as ReadRaw;
+}
+implementation
+{
+  command error_t ReadShifted.read() { return call ReadRaw.read(); }
+  event void ReadRaw.readDone(error_t result, uint16_t val) 
+  { 
+    signal ReadShifted.readDone(result, (val << bits)); 
+  }
+}
diff --git a/tos/platforms/eyesIFX/sensors/ReadStreamShiftC.nc b/tos/platforms/eyesIFX/sensors/ReadStreamShiftC.nc
new file mode 100644
index 00000000..1a68f8fa
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/ReadStreamShiftC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2006-12-12 18:23:41 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+generic module ReadStreamShiftC(uint8_t bits)
+{
+  provides interface ReadStream<uint16_t> as ReadStreamShifted;
+  uses interface ReadStream<uint16_t> as ReadStreamRaw;
+}
+implementation
+{
+  command error_t ReadStreamShifted.postBuffer(uint16_t* buf, uint16_t count) 
+  {
+    return call ReadStreamRaw.postBuffer(buf, count);
+  }
+  
+  command error_t ReadStreamShifted.read(uint32_t usPeriod) 
+  { 
+    return call ReadStreamRaw.read(usPeriod); 
+  }
+
+  event void ReadStreamRaw.bufferDone(error_t result, 
+			 uint16_t* buf, uint16_t count)
+  {
+    uint16_t i;
+    if (result == SUCCESS)
+      for (i=0; i<count; i++)
+        buf[i] <<= bits; 
+    signal ReadStreamShifted.bufferDone(result, buf, count);
+  }
+  
+  event void ReadStreamRaw.readDone(error_t result, uint32_t usActualPeriod) 
+  { 
+    signal ReadStreamShifted.readDone(result, usActualPeriod); 
+  }
+}
diff --git a/tos/platforms/eyesIFX/sensors/RssiSensorC.nc b/tos/platforms/eyesIFX/sensors/RssiSensorC.nc
new file mode 100644
index 00000000..8ea4428e
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/RssiSensorC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:41 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component provides platform-independent access to the
+ * RSSI sensor exported by the TDA5250 radio on the eyesIFXv{1,2} platform.
+ * Note: The radio must be configured to output the RSSI on the pin!
+ *
+ * @author Jan Hauer
+ */
+
+#include <sensors.h>
+generic configuration RssiSensorC()
+{
+  provides {
+    interface Read<uint16_t> as Read;
+    interface ReadNow<uint16_t> as ReadNow;
+    interface Resource as ReadNowResource;
+  }
+}
+implementation
+{
+  components SensorSettingsC as Settings;
+             
+  components new AdcReadClientC() as AdcReadClient;
+  Read = AdcReadClient;
+  AdcReadClient.AdcConfigure -> Settings.AdcConfigure[RSSI_SENSOR_REF_1_5V];
+  
+  components new AdcReadNowClientC() as AdcReadNowClient;
+  ReadNow = AdcReadNowClient;
+  ReadNowResource = AdcReadNowClient;
+  AdcReadNowClient.AdcConfigure -> Settings.AdcConfigure[RSSI_SENSOR_REF_1_5V];
+}
diff --git a/tos/platforms/eyesIFX/sensors/RssiSensorVccC.nc b/tos/platforms/eyesIFX/sensors/RssiSensorVccC.nc
new file mode 100644
index 00000000..332a32e1
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/RssiSensorVccC.nc
@@ -0,0 +1,62 @@
+/* -*- mode:c++ -*-
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:41 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component provides platform-independent access to the
+ * RSSI sensor exported by the TDA5250 radio on the eyesIFXv{1,2} platform.
+ * Note: The radio must be configured to output the RSSI on the pin!
+ *
+ * @author Jan Hauer
+ */
+
+#include <sensors.h>
+generic configuration RssiSensorVccC()
+{
+    provides {
+        interface ReadNow<uint16_t> as ReadNow;
+        interface Resource as ReadNowResource;
+    }
+}
+implementation
+{
+    components SensorSettingsC as Settings;
+    components new AdcReadNowClientC() as AdcReadNowClient;
+    
+    ReadNow = AdcReadNowClient;
+    ReadNowResource = AdcReadNowClient;
+    AdcReadNowClient.AdcConfigure -> Settings.AdcConfigure[RSSI_SENSOR_VCC];
+}
diff --git a/tos/platforms/eyesIFX/sensors/SensorSettingsC.nc b/tos/platforms/eyesIFX/sensors/SensorSettingsC.nc
new file mode 100644
index 00000000..30e3af88
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/SensorSettingsC.nc
@@ -0,0 +1,57 @@
+/* -*- mode:c++ -*-
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2006-12-12 18:23:41 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/**
+ * Default ADC channel configuration for eyesIFXv1 and eyesIFXv2. Future
+ * eyesIFX platforms may shadow this configuration (and sensors.h) in their
+ * respective subdirectory.
+ *
+ * @author Jan Hauer
+ */
+
+#include <sensors.h>
+module SensorSettingsC {
+  provides interface AdcConfigure<const msp430adc12_channel_config_t*> as AdcConfigure[uint8_t type];  
+}
+implementation
+{
+  async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration[uint8_t type]() {
+    if (type < SENSOR_SENTINEL)
+      return &sensorconfigurations[type];
+    else
+      return &sensorconfigurations[SENSOR_SENTINEL];
+  }
+}
+
diff --git a/tos/platforms/eyesIFX/sensors/TempExtSensorC.nc b/tos/platforms/eyesIFX/sensors/TempExtSensorC.nc
new file mode 100644
index 00000000..4c02f0a5
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/TempExtSensorC.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2004, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2007-11-28 13:19:49 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ *
+ * Please refer to TEP 109 for more information about this component and its
+ * intended use. This component provides platform-independent access to the
+ * onboard temperature sensor on the eyesIFXv{1,2} platform.
+ *
+ * @author Jan Hauer
+ */
+
+#include <sensors.h>
+generic configuration TempExtSensorC()
+{
+  provides {
+    interface Read<uint16_t> as Read;
+    interface ReadNow<uint16_t> as ReadNow;
+    interface Resource as ReadNowResource;
+  }
+}
+implementation
+{
+  components SensorSettingsC as Settings;  
+  
+  components new AdcReadClientC() as AdcReadClient;
+  //Read = AdcReadClient;
+  AdcReadClient.AdcConfigure -> Settings.AdcConfigure[TEMP_SENSOR_DEFAULT];
+  
+  
+  components new AdcReadNowClientC() as AdcReadNowClient;
+  ReadNow = AdcReadNowClient;
+  //ReadNowResource = AdcReadNowClient;
+  AdcReadNowClient.AdcConfigure -> Settings.AdcConfigure[TEMP_SENSOR_DEFAULT];
+  
+  components HplMsp430GeneralIOC as MspGeneralIO;
+  components new Msp430GpioC() as TEMP;
+  TEMP -> MspGeneralIO.Port54;
+  
+  components TempExtSensorP;
+  Read = TempExtSensorP.Read;
+  TempExtSensorP.AdcRead -> AdcReadClient;
+  ReadNowResource = TempExtSensorP.ReadNowResource;
+  TempExtSensorP.AdcResource -> AdcReadNowClient;
+  TempExtSensorP.TEMP -> TEMP;
+}
diff --git a/tos/platforms/eyesIFX/sensors/TempExtSensorP.nc b/tos/platforms/eyesIFX/sensors/TempExtSensorP.nc
new file mode 100644
index 00000000..8e0eba85
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/TempExtSensorP.nc
@@ -0,0 +1,130 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * @author: Philipp Huppertz (huppertz@tkn.tu-berlin.de)
+ * ========================================================================
+ */
+    
+/**
+ * The temperature sensor implementation on eyesIFX.
+ * It just starts the sensor if there is an request and 
+ * stops when there are no open requests left
+ * (this is done via a monitor).
+ *  
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ *
+ */
+module TempExtSensorP {
+  provides interface Read<uint16_t>;
+  provides interface Resource as ReadNowResource;
+
+  uses interface GeneralIO as TEMP;
+  uses interface Resource as AdcResource;
+  uses interface Read<uint16_t> as AdcRead;
+}
+
+implementation {
+
+  uint8_t tempMonitor = 0;
+  
+  
+  command error_t Read.read() {
+    error_t error = call AdcRead.read();
+    if (error == SUCCESS) {
+      atomic {
+      	if (tempMonitor == 0) {
+       	  call TEMP.set();
+        }
+        ++tempMonitor;
+      }
+    }
+    return error;
+  }
+   
+  event void AdcRead.readDone(error_t result, uint16_t val) {
+    atomic {
+      --tempMonitor;
+    	if (tempMonitor == 0) {
+     	  call TEMP.clr();
+    	}
+    }
+    signal Read.readDone(result, val);
+  }
+  
+  async command error_t ReadNowResource.request() {
+    error_t error = call AdcResource.request();
+    if (error == SUCCESS) {
+      atomic {
+      	if (tempMonitor == 0) {
+          call TEMP.set();
+        }
+        ++tempMonitor;
+      }
+    }   
+    return error;
+  }
+
+  async command error_t ReadNowResource.immediateRequest() {
+    error_t error = call AdcResource.immediateRequest();
+    if (error == SUCCESS) {
+      atomic {
+      	if (tempMonitor == 0) {
+          call TEMP.set();
+        }
+        ++tempMonitor;
+      }
+    }   
+    return error;
+  }
+
+  event void AdcResource.granted() {
+    signal ReadNowResource.granted();
+  }
+   
+  async command error_t ReadNowResource.release() {
+    error_t error = call AdcResource.release();
+    if (error == SUCCESS) {
+      atomic {
+        --tempMonitor;
+        if (tempMonitor == 0) {
+          call TEMP.clr();
+        }
+      }
+  	}
+    return error;
+  }
+
+  async command bool ReadNowResource.isOwner() {
+    return call AdcResource.isOwner();
+  }
+  
+  
+  default event void ReadNowResource.granted() {};
+}
+ 
diff --git a/tos/platforms/eyesIFX/sensors/sensors.h b/tos/platforms/eyesIFX/sensors/sensors.h
new file mode 100644
index 00000000..2e3af205
--- /dev/null
+++ b/tos/platforms/eyesIFX/sensors/sensors.h
@@ -0,0 +1,159 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2007-07-10 13:19:04 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef SENSORS_H
+#define SENSORS_H
+
+#include <Msp430Adc12.h>
+
+enum {
+  PHOTO_SENSOR_LOW_FREQ,
+  PHOTO_SENSOR_HIGH_FREQ,
+  PHOTO_SENSOR_DEFAULT,
+  PHOTO_SENSOR_VCC,
+  
+  TEMP_SENSOR_LOW_FREQ,
+  TEMP_SENSOR_HIGH_FREQ,
+  TEMP_SENSOR_DEFAULT,
+  
+  RSSI_SENSOR_VCC,
+  RSSI_SENSOR_REF_1_5V,
+  RSSI_SENSOR_DEFAULT,
+
+  INTERNAL_VOLTAGE_REF_2_5V,
+  INTERNAL_VOLTAGE_REF_2_5V_LOW_FREQ,
+  
+  INTERNAL_TEMP_HIGH_FREQ,
+  INTERNAL_TEMP_LOW_FREQ,
+  // add more entries here
+
+  // last entry
+  SENSOR_SENTINEL
+};
+
+const msp430adc12_channel_config_t sensorconfigurations[] = {
+    /* PHOTO_SENSOR_LOW_FREQ */
+    { INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+      SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+      SAMPCON_SOURCE_ACLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* PHOTO_SENSOR_HIGH_FREQ  */
+    {
+        INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 
+    },
+    /* PHOTO_SENSOR_DEFAULT */
+    {
+        INPUT_CHANNEL_A2, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 
+    },
+    /* PHOTO_SENSOR_VCC */
+    {
+        INPUT_CHANNEL_A2, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_NONE,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_64_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* TEMP_SENSOR_LOW_FREQ */
+    {
+        INPUT_CHANNEL_A0, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+        SAMPCON_SOURCE_ACLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* TEMP_SENSOR_HIGH_FREQ */
+    {
+        INPUT_CHANNEL_A0, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_16_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* TEMP_SENSOR_DEFAULT */
+    {
+        INPUT_CHANNEL_A0, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+        SAMPCON_SOURCE_ACLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* RSSI_SENSOR_VCC */
+    {
+        INPUT_CHANNEL_A3, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_NONE,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* RSSI_SENSOR_REF_1_5V */
+    {
+        INPUT_CHANNEL_A3, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* RSSI_SENSOR_DEFAULT */
+    {
+        INPUT_CHANNEL_A3, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_NONE,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* INTERNAL_VOLTAGE_REF_2_5V */
+    {
+        SUPPLY_VOLTAGE_HALF_CHANNEL, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_2_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_32_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* INTERNAL_VOLTAGE_REF_2_5V_LOW_FREQ */
+    {
+        SUPPLY_VOLTAGE_HALF_CHANNEL, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_2_5,
+        SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+        SAMPCON_SOURCE_ACLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* INTERNAL_TEMP_HIGH_FREQ */
+    {
+        TEMPERATURE_DIODE_CHANNEL, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_32_CYCLES,
+        SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* INTERNAL_TEMP_LOW_FREQ */
+    {
+        TEMPERATURE_DIODE_CHANNEL, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5,
+        SHT_SOURCE_ACLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+        SAMPCON_SOURCE_ACLK, SAMPCON_CLOCK_DIV_1
+    },
+    /* your stuff here */
+    /* SENSOR_SENTINEL */
+    {
+        INPUT_CHANNEL_NONE,0,0,0,0,0,0,0
+    }
+};
+
+
+#endif
+
diff --git a/tos/platforms/eyesIFX/table-crc.h b/tos/platforms/eyesIFX/table-crc.h
new file mode 100644
index 00000000..61639d26
--- /dev/null
+++ b/tos/platforms/eyesIFX/table-crc.h
@@ -0,0 +1,60 @@
+/* 
+ * CRC LOOKUP TABLE                                              
+ * ================                                              
+ * The following CRC lookup table was generated automagically    
+ * by the Rocksoft^tm Model CRC Algorithm Table Generation       
+ * Program V1.0 
+ * For more information on the Rocksoft^tm Model CRC Algorithm,  
+ * see the document titled "A Painless Guide to CRC Error        
+ * Detection Algorithms" by Ross Williams                        
+ * (ross@guest.adelaide.edu.au.). This document is likely to be  
+ * in the FTP archive "ftp.adelaide.edu.au/pub/rocksoft".
+ *
+ * (Nowadays look at: http://www.ross.net/crc/crcpaper.html)
+ *                                                               
+ */
+ 
+#ifndef CRC_H
+#define CRC_H
+uint16_t const ccitt_crc16_table[256] = {
+  0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+  0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+  0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+  0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+  0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+  0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+  0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+  0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+  0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+  0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+  0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+  0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+  0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+  0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+  0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+  0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+  0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+  0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+  0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+  0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+  0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+  0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+  0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+  0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+  0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+  0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+  0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+  0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+  0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+  0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+  0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+  0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
+};
+
+uint16_t crcByte(uint16_t fcs, uint8_t c)
+{
+  fcs = ccitt_crc16_table[(fcs >> 8 ^ c) & 0xffU] ^ (fcs << 8);
+  return fcs;
+}
+
+#endif
diff --git a/tos/platforms/intelmote2/.platform b/tos/platforms/intelmote2/.platform
new file mode 100644
index 00000000..b977af47
--- /dev/null
+++ b/tos/platforms/intelmote2/.platform
@@ -0,0 +1,62 @@
+#
+# FILE: intelmote2/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  
+#
+# $Id: .platform,v 1.9 2009-12-18 23:31:09 jgko Exp $
+#
+
+push ( @includes, qw(
+
+  %T/platforms/intelmote2
+  %T/platforms/intelmote2/chips/cc2420
+  %T/platforms/intelmote2/chips/da9030
+  %T/platforms/intelmote2/chips/ds2745
+  %T/chips/cc2420
+  %T/chips/cc2420/alarm
+  %T/chips/cc2420/control
+  %T/chips/cc2420/csma
+  %T/chips/cc2420/interfaces
+  %T/chips/cc2420/link
+  %T/chips/cc2420/lowpan
+  %T/chips/cc2420/lpl
+  %T/chips/cc2420/packet
+  %T/chips/cc2420/receive
+  %T/chips/cc2420/spi
+  %T/chips/cc2420/transmit
+  %T/chips/cc2420/unique
+  %T/chips/cc2420/security
+  %T/chips/pxa27x
+  %T/chips/pxa27x/lib
+  %T/chips/pxa27x/timer
+  %T/chips/pxa27x/gpio
+  %T/chips/pxa27x/dma
+  %T/chips/pxa27x/ssp
+  %T/chips/pxa27x/i2c
+  %T/chips/pxa27x/uart
+  %T/chips/pxa27x/p30
+  %T/chips/pxa27x/ds2745
+  %T/chips/pxa27x/cif
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/gpio
+) );
+
+@opts = qw(
+
+  -gcc=xscale-elf-gcc
+  -nostartfiles
+  -fnesc-target=env
+  -fnesc-no-debug
+
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{NESC_MACHINE} = "structure_size_boundary=32, pointer=4,4 float=4,4 double=8,4 long_double=8,4 short=2,2 int=4,4 long=4,4 long_long=8,4 int1248_align=1,2,4,4 wchar_size_size=4,4 char_wchar_signed=false,true";
+
+
diff --git a/tos/platforms/intelmote2/ActiveMessageC.nc b/tos/platforms/intelmote2/ActiveMessageC.nc
new file mode 100644
index 00000000..486775f1
--- /dev/null
+++ b/tos/platforms/intelmote2/ActiveMessageC.nc
@@ -0,0 +1,88 @@
+// $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:53 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:53 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the intelmote2 platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Philip Levis
+ * @date June 19 2005
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+  
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
diff --git a/tos/platforms/intelmote2/BlockStorageC.nc b/tos/platforms/intelmote2/BlockStorageC.nc
new file mode 100644
index 00000000..21e2944b
--- /dev/null
+++ b/tos/platforms/intelmote2/BlockStorageC.nc
@@ -0,0 +1,57 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the block storage abstraction for the pxa271
+ * embedded flash.
+ *
+ * @author Philip Buonadonna
+ * @author Kaisen Lin
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:42 $
+ */
+
+generic configuration BlockStorageC( volume_id_t volume_id ) {
+
+  provides interface BlockRead;
+  provides interface BlockWrite;
+}
+
+implementation {
+
+  enum {
+    BLOCK_ID = unique( "pxa271p30.Block" ),
+  };
+
+  components P30BlockC as BlockC;
+  BlockRead = BlockC.Read[ volume_id ];
+  BlockWrite = BlockC.Write[ volume_id ];
+
+}
diff --git a/tos/platforms/intelmote2/ConfigStorageC.nc b/tos/platforms/intelmote2/ConfigStorageC.nc
new file mode 100644
index 00000000..5d0b93f6
--- /dev/null
+++ b/tos/platforms/intelmote2/ConfigStorageC.nc
@@ -0,0 +1,54 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Configuration component for storage management on the PXA271
+ * 
+ * @author KaisenLin
+ * @author Phil Buonadonna
+ */
+
+generic configuration ConfigStorageC(volume_id_t vol_id) {
+
+  provides interface Mount;
+  provides interface ConfigStorage;
+
+}
+
+implementation {
+  enum {
+    CONFIG_ID = unique( "pxa271p30.Config" ),
+  };
+
+  components P30ConfigC as ConfigC;
+  ConfigStorage = ConfigC.ConfigStorage[ vol_id ];
+  Mount = ConfigC.Mount[ vol_id ];
+}
diff --git a/tos/platforms/intelmote2/DemoSensorC.nc b/tos/platforms/intelmote2/DemoSensorC.nc
new file mode 100644
index 00000000..61cb3806
--- /dev/null
+++ b/tos/platforms/intelmote2/DemoSensorC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorC on the Intel Mote v2 provides a
+ * voltage reading from the da9030 PMIC. 
+ *
+ * Conversion from ADC reading to voltage:
+ *  VBAT = (2.65/256)*(ADC) + 2.65
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:42 $
+ * 
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation
+{
+  components DemoSensorP;
+  components PMICC;
+
+  Read = DemoSensorP;
+  DemoSensorP.PMIC -> PMICC.PMIC;
+}
diff --git a/tos/platforms/intelmote2/DemoSensorP.nc b/tos/platforms/intelmote2/DemoSensorP.nc
new file mode 100644
index 00000000..28724b4e
--- /dev/null
+++ b/tos/platforms/intelmote2/DemoSensorP.nc
@@ -0,0 +1,60 @@
+/* $Id: DemoSensorP.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*
+ * @author Phil Buonadonna
+ */
+
+module DemoSensorP {
+  provides interface Read<uint16_t> as Read;
+  uses interface PMIC;
+}
+implementation {
+
+  task void doRead();
+
+  command error_t Read.read() {
+    post doRead();
+    return SUCCESS;
+  }
+  
+  task void doRead() {
+    error_t error;
+    uint8_t value;
+    
+    atomic { 
+      error = call PMIC.getBatteryVoltage(&value);
+    }
+
+    if (error != SUCCESS) value = 0;
+
+    signal Read.readDone(SUCCESS, (uint16_t)value);
+  }
+}
diff --git a/tos/platforms/intelmote2/HilTimerMilliC.nc b/tos/platforms/intelmote2/HilTimerMilliC.nc
new file mode 100644
index 00000000..01a98489
--- /dev/null
+++ b/tos/platforms/intelmote2/HilTimerMilliC.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/** 
+ * @author Phil Buonadonna
+ *
+ */
+
+#include "Timer.h"
+
+configuration HilTimerMilliC
+{
+  provides interface Init;
+  provides interface Timer<TMilli> as TimerMilli[ uint8_t num ];
+  provides interface LocalTime<TMilli>;
+}
+
+implementation
+{
+  components new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI)) as VirtTimersMilli32;
+  components new AlarmToTimerC(TMilli) as AlarmToTimerMilli32;
+  components new HalPXA27xAlarmM(TMilli,2) as PhysAlarmMilli32;
+  components HalPXA27xOSTimerMapC;
+  components CounterMilliC;
+  enum {OST_CLIENT_ID = unique("PXA27xOSTimer.Resource")};
+
+  Init = PhysAlarmMilli32;
+  TimerMilli = VirtTimersMilli32.Timer;
+  LocalTime = CounterMilliC;
+  
+  VirtTimersMilli32.TimerFrom -> AlarmToTimerMilli32.Timer;
+  AlarmToTimerMilli32.Alarm -> PhysAlarmMilli32.Alarm;
+  
+  PhysAlarmMilli32.OSTInit -> HalPXA27xOSTimerMapC.Init;
+  PhysAlarmMilli32.OSTChnl -> HalPXA27xOSTimerMapC.OSTChnl[OST_CLIENT_ID];
+
+}
diff --git a/tos/platforms/intelmote2/IM2InitSerialP.nc b/tos/platforms/intelmote2/IM2InitSerialP.nc
new file mode 100644
index 00000000..6e160ee7
--- /dev/null
+++ b/tos/platforms/intelmote2/IM2InitSerialP.nc
@@ -0,0 +1,58 @@
+/* $Id: IM2InitSerialP.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ *
+ */
+module IM2InitSerialP 
+{
+  provides interface Init;
+  uses {
+    interface HplPXA27xGPIOPin as TXD;
+    interface HplPXA27xGPIOPin as RXD;
+  }
+}
+
+implementation 
+{
+  command error_t Init.init() {
+    call TXD.setGAFRpin(STUART_TXD_ALTFN);
+    call TXD.setGPDRbit(TRUE);
+    call RXD.setGAFRpin(STUART_RXD_ALTFN);
+    call RXD.setGPDRbit(FALSE);
+
+    return SUCCESS;
+  }
+
+  async event void TXD.interruptGPIOPin() { return;} 
+  async event void RXD.interruptGPIOPin() { return;} 
+}
diff --git a/tos/platforms/intelmote2/LogStorageC.nc b/tos/platforms/intelmote2/LogStorageC.nc
new file mode 100644
index 00000000..ad0b7858
--- /dev/null
+++ b/tos/platforms/intelmote2/LogStorageC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ *
+ */
+generic configuration LogStorageC( volume_id_t volume_id, bool circular ) {
+
+  provides interface LogRead;
+  provides interface LogWrite;
+}
+
+implementation {
+
+  enum {
+    LOG_ID = unique( "pxa271p30.Log" ),
+  };
+
+  components P30LogC as LogC;
+  LogRead = LogC.Read[ volume_id ];
+  LogWrite = LogC.Write[ volume_id ];
+
+  components new P30LogCircularP(circular);
+  LogC.Circular[ volume_id ] -> P30LogCircularP.Circular;
+}
diff --git a/tos/platforms/intelmote2/PlatformC.nc b/tos/platforms/intelmote2/PlatformC.nc
new file mode 100644
index 00000000..d99c739e
--- /dev/null
+++ b/tos/platforms/intelmote2/PlatformC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Philip Buonadonna
+ */
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+  provides interface PlatformReset;
+
+}
+
+implementation
+{
+  components PlatformP,PMICC;
+  components HplPXA27xOSTimerC;
+
+  Init = PlatformP;
+  PlatformReset = PlatformP;
+
+  PlatformP.PMICInit -> PMICC.Init;
+  PlatformP.OST0M3 -> HplPXA27xOSTimerC.OST0M3;
+  PlatformP.PXA27xWD -> HplPXA27xOSTimerC.OSTWDCntl;
+
+}
diff --git a/tos/platforms/intelmote2/PlatformLedsC.nc b/tos/platforms/intelmote2/PlatformLedsC.nc
new file mode 100644
index 00000000..f81dac7c
--- /dev/null
+++ b/tos/platforms/intelmote2/PlatformLedsC.nc
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Philip Buonadonna
+ */
+#include "hardware.h"
+
+configuration PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+
+implementation
+{
+  components GeneralIOC;
+  components PlatformP;
+
+  Init = PlatformP.InitL3;
+
+  Led0 = GeneralIOC.GeneralIO[RED_LED_PIN];
+  Led1 = GeneralIOC.GeneralIO[GREEN_LED_PIN];
+  Led2 = GeneralIOC.GeneralIO[BLUE_LED_PIN];
+}
diff --git a/tos/platforms/intelmote2/PlatformP.nc b/tos/platforms/intelmote2/PlatformP.nc
new file mode 100644
index 00000000..a81d1224
--- /dev/null
+++ b/tos/platforms/intelmote2/PlatformP.nc
@@ -0,0 +1,137 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Philip Buonadonna
+ */
+
+#include "hardware.h"
+
+module PlatformP {
+  provides interface Init;
+  provides interface PlatformReset;
+  uses {
+    interface Init as InitL0;
+    interface Init as InitL1;
+    interface Init as InitL2;
+    interface Init as InitL3;
+    interface Init as PMICInit;
+  }
+  uses interface HplPXA27xOSTimer as OST0M3;
+  uses interface HplPXA27xOSTimerWatchdog as PXA27xWD;
+}
+implementation {
+
+  //void enableICache() @C();
+  command error_t Init.init() {
+
+    // Enable clocks to critical components 
+    CKEN = (CKEN22_MEMC | CKEN20_IMEM | CKEN15_PMI2C | CKEN9_OST);
+    // Set the arbiter to something meaningful for this platform
+    ARB_CNTL = (ARB_CNTL_CORE_PARK | 
+		ARB_CNTL_LCD_WT(0) | ARB_CNTL_DMA_WT(1) | ARB_CNTL_CORE_WT(4));
+
+
+    OSCC = (OSCC_OON);
+    while ((OSCC & OSCC_OOK) == 0);
+    
+    TOSH_SET_PIN_DIRECTIONS();
+
+    // Enable access to CP6 (Interrupt Controller processor)
+    // Enable access to Intel WMMX enhancements
+    asm volatile ("mcr p15,0,%0,c15,c1,0\n\t": : "r" (0x43));
+
+#ifdef PXA27X_13M
+     // Place PXA27X into 13M w/ PPLL enabled...
+    // other bits are ignored...but might be useful later
+    CCCR = (CCCR_CPDIS | CCCR_L(8) | CCCR_2N(2) | CCCR_A);
+    asm volatile (
+		  "mcr p14,0,%0,c6,c0,0\n\t"
+		  :
+		  : "r" (CLKCFG_F)
+		  );
+
+#else
+    // Place PXA27x into 104/104 MHz mode
+    CCCR = CCCR_L(8) | CCCR_2N(2) | CCCR_A; 
+    asm volatile (
+		  "mcr p14,0,%0,c6,c0,0\n\t"
+		  :
+		  : "r" (CLKCFG_B | CLKCFG_F | CLKCFG_T)
+		  );
+#endif
+
+    // Initialize Memory/Flash subsystems
+    SA1110 = SA1110_SXSTACK(1);
+    MSC0 = MSC0 | MSC_RBW024 | MSC_RBUFF024 | MSC_RT024(2) ;
+    MSC1 = MSC1 | MSC_RBW024;
+    MSC2 = MSC2 | MSC_RBW024;
+    MECR = 0;
+    // PXA271 Required initialization settings
+    MDCNFG = (MDCNFG_SETALWAYS | MDCNFG_DTC2(0x3) | 
+	      MDCNFG_STACK0 | MDCNFG_DTC0(0x3) | MDCNFG_DNB0 | 
+	      MDCNFG_DRAC0(0x2) | MDCNFG_DCAC0(0x1) | MDCNFG_DWID0 /* |
+								      MDCNFG_DE0 */);
+    MDREFR = (MDREFR & ~(MDREFR_K0DB4 | MDREFR_K0DB2)) | MDREFR_K0DB2;
+
+    enableICache();
+    initSyncFlash();
+
+    // Place all global platform initialization before this command.
+    // return call SubInit.init();
+    call InitL0.init();
+    call InitL1.init();
+    call InitL2.init();
+    call InitL3.init();
+
+    //call PMICInit.init();
+    return SUCCESS;
+  }
+
+  async command void PlatformReset.reset() {
+    call OST0M3.setOSMR(call OST0M3.getOSCR() + 1000);
+    call PXA27xWD.enableWatchdog();
+    while (1);
+    return; // Should never get here.
+  }
+
+  async event void OST0M3.fired() 
+  {
+    call OST0M3.setOIERbit(FALSE);
+    call OST0M3.clearOSSRbit();
+    return;
+  }
+
+  default command error_t InitL0.init() { return SUCCESS; }
+  default command error_t InitL1.init() { return SUCCESS; }
+  default command error_t InitL2.init() { return SUCCESS; }
+  default command error_t InitL3.init() { return SUCCESS; }
+
+}
+
diff --git a/tos/platforms/intelmote2/PlatformReset.nc b/tos/platforms/intelmote2/PlatformReset.nc
new file mode 100644
index 00000000..15b6b53b
--- /dev/null
+++ b/tos/platforms/intelmote2/PlatformReset.nc
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+interface PlatformReset {
+  async command void reset();
+}
diff --git a/tos/platforms/intelmote2/PlatformResetC.nc b/tos/platforms/intelmote2/PlatformResetC.nc
new file mode 100644
index 00000000..debe0b9d
--- /dev/null
+++ b/tos/platforms/intelmote2/PlatformResetC.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * @author Philip Buonadonna
+ */
+configuration PlatformResetC {
+  provides interface PlatformReset;
+}
+
+implementation {
+  components PlatformC;
+
+  PlatformReset = PlatformC;
+
+}
diff --git a/tos/platforms/intelmote2/PlatformSerialC.nc b/tos/platforms/intelmote2/PlatformSerialC.nc
new file mode 100644
index 00000000..d6bd7afd
--- /dev/null
+++ b/tos/platforms/intelmote2/PlatformSerialC.nc
@@ -0,0 +1,71 @@
+/* $Id: PlatformSerialC.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ *
+ */
+
+configuration PlatformSerialC {
+  provides interface StdControl;
+  provides interface UartByte;
+  provides interface UartStream;
+}
+implementation {
+
+  components new HalPXA27xSerialP(115200); 
+  components HplPXA27xSTUARTC;
+  components HplPXA27xGPIOC;
+  components IM2InitSerialP;
+  
+  StdControl = HalPXA27xSerialP;
+  UartByte = HalPXA27xSerialP;
+  UartStream = HalPXA27xSerialP;
+
+  HalPXA27xSerialP.UARTInit -> HplPXA27xSTUARTC.Init;
+  HalPXA27xSerialP.UART -> HplPXA27xSTUARTC.STUART;
+
+  IM2InitSerialP.TXD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[STUART_TXD];
+  IM2InitSerialP.RXD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[STUART_RXD];
+
+  components PlatformP;
+  IM2InitSerialP.Init <- PlatformP.InitL2;
+  HalPXA27xSerialP.Init <- PlatformP.InitL3;
+
+  components new HplPXA27xDMAInfoC(19, (uint32_t) &STRBR) as DMAInfoRx;
+  components new HplPXA27xDMAInfoC(20, (uint32_t) &STTHR) as DMAInfoTx;
+  components HplPXA27xDMAC;
+  // how are these channels picked?
+  HalPXA27xSerialP.TxDMA -> HplPXA27xDMAC.HplPXA27xDMAChnl[2];
+  HalPXA27xSerialP.RxDMA -> HplPXA27xDMAC.HplPXA27xDMAChnl[3];
+  DMAInfoRx.HplPXA27xDMAInfo <- HalPXA27xSerialP.UARTRxDMAInfo;
+  DMAInfoTx.HplPXA27xDMAInfo <- HalPXA27xSerialP.UARTTxDMAInfo;
+}
diff --git a/tos/platforms/intelmote2/TimeSyncMessageC.nc b/tos/platforms/intelmote2/TimeSyncMessageC.nc
new file mode 100644
index 00000000..50c8448f
--- /dev/null
+++ b/tos/platforms/intelmote2/TimeSyncMessageC.nc
@@ -0,0 +1,89 @@
+// $Id: TimeSyncMessageC.nc,v 1.2 2010-06-29 22:07:53 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *
+ * The Active Message layer on the intelmote2 platform. This is a naming wrapper
+ * around the CC2420 Active Message layer that implemets timesync interface (TEP 133).
+ *
+ * @author Philip Levis
+ * @author Brano Kusy
+ * @date June 19 2005
+ */
+
+configuration TimeSyncMessageC {
+  provides
+  {
+    interface SplitControl;
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+
+    interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[am_id_t id];
+    interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+
+    interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+    interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+  }
+}
+implementation {
+  components CC2420TimeSyncMessageC as AM;
+
+  SplitControl = AM;
+
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  TimeSyncAMSend32khz       = AM;
+  TimeSyncAMSendMilli       = AM;
+  TimeSyncPacket32khz       = AM;
+  TimeSyncPacketMilli       = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
\ No newline at end of file
diff --git a/tos/platforms/intelmote2/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/intelmote2/chips/cc2420/HplCC2420AlarmC.nc
new file mode 100644
index 00000000..081044e0
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/cc2420/HplCC2420AlarmC.nc
@@ -0,0 +1,55 @@
+/* $Id: HplCC2420AlarmC.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+
+generic configuration HplCC2420AlarmC() 
+{
+
+  provides interface Init;
+  //provides interface Alarm<T32khz,uint16_t> as Alarm32khz16;
+  provides interface Alarm<T32khz,uint32_t> as Alarm32khz32;
+
+}
+
+implementation 
+{
+
+  components new Alarm32khzC();
+
+  Init = Alarm32khzC;
+  //Alarm32khz16 = Alarm32khzC.Alarm32khz16;
+  Alarm32khz32 = Alarm32khzC.Alarm32khz32;
+  
+}
diff --git a/tos/platforms/intelmote2/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/intelmote2/chips/cc2420/HplCC2420InterruptsC.nc
new file mode 100644
index 00000000..e31d0599
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/cc2420/HplCC2420InterruptsC.nc
@@ -0,0 +1,50 @@
+/* $Id: HplCC2420InterruptsC.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+configuration HplCC2420InterruptsC 
+{
+
+  provides interface GpioCapture as CaptureSFD;
+  provides interface GpioInterrupt as InterruptCCA;
+  provides interface GpioInterrupt as InterruptFIFOP;
+
+}
+
+implementation 
+{
+  components GeneralIOC;
+  components new SoftCaptureC();
+
+  CaptureSFD = SoftCaptureC.GpioCapture;
+  InterruptCCA = GeneralIOC.GpioInterrupt[CC2420_CCA_PIN];
+  InterruptFIFOP = GeneralIOC.GpioInterrupt[CC2420_FIFOP_PIN];
+
+  SoftCaptureC.GpioInterrupt -> GeneralIOC.GpioInterrupt[CC2420_SFD_PIN];  
+}
diff --git a/tos/platforms/intelmote2/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/intelmote2/chips/cc2420/HplCC2420PinsC.nc
new file mode 100644
index 00000000..1c146daa
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/cc2420/HplCC2420PinsC.nc
@@ -0,0 +1,59 @@
+/* $Id: HplCC2420PinsC.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna
+ */
+configuration HplCC2420PinsC 
+{
+
+  provides interface GeneralIO as CCA;
+  provides interface GeneralIO as CSN;
+  provides interface GeneralIO as FIFO;
+  provides interface GeneralIO as FIFOP;
+  provides interface GeneralIO as RSTN;
+  provides interface GeneralIO as SFD;
+  provides interface GeneralIO as VREN;
+
+}
+
+implementation 
+{
+  components GeneralIOC;
+  
+  CCA = GeneralIOC.GeneralIO[CC2420_CCA_PIN];
+  CSN = GeneralIOC.GeneralIO[CC2420_CSN_PIN];
+  FIFO = GeneralIOC.GeneralIO[CC2420_FIFO_PIN];
+  FIFOP = GeneralIOC.GeneralIO[CC2420_FIFOP_PIN];
+  RSTN = GeneralIOC.GeneralIO[CC2420_RSTN_PIN];
+  SFD = GeneralIOC.GeneralIO[CC2420_SFD_PIN];
+  VREN = GeneralIOC.GeneralIO[CC2420_VREN_PIN];
+}
diff --git a/tos/platforms/intelmote2/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/intelmote2/chips/cc2420/HplCC2420SpiC.nc
new file mode 100644
index 00000000..020a8bc2
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/cc2420/HplCC2420SpiC.nc
@@ -0,0 +1,60 @@
+/* $Id: HplCC2420SpiC.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadonna
+ */
+generic configuration HplCC2420SpiC() 
+{
+
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+  
+}
+
+implementation 
+{
+
+  enum {
+    SPI_CLIENT_ID = unique("CC2420SpiClient")
+  };
+
+  components IM2CC2420SpiP;
+ 
+  Resource = IM2CC2420SpiP.Resource[SPI_CLIENT_ID];
+  SpiByte = IM2CC2420SpiP.SpiByte;
+  SpiPacket = IM2CC2420SpiP.SpiPacket[SPI_CLIENT_ID];
+
+  components PlatformP;
+  IM2CC2420SpiP.Init <- PlatformP.InitL3;
+
+}
diff --git a/tos/platforms/intelmote2/chips/cc2420/IM2CC2420InitSpiP.nc b/tos/platforms/intelmote2/chips/cc2420/IM2CC2420InitSpiP.nc
new file mode 100644
index 00000000..7fc0467a
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/cc2420/IM2CC2420InitSpiP.nc
@@ -0,0 +1,62 @@
+/* $Id: IM2CC2420InitSpiP.nc,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadonna
+ */
+module IM2CC2420InitSpiP 
+{
+  
+  provides interface Init;
+  uses {
+    interface HplPXA27xGPIOPin as SCLK;
+    interface HplPXA27xGPIOPin as TXD;
+    interface HplPXA27xGPIOPin as RXD;
+  }
+}
+
+implementation 
+{
+  command error_t Init.init() {
+    call SCLK.setGAFRpin(SSP3_SCLK_ALTFN);
+    call SCLK.setGPDRbit(TRUE);
+    call TXD.setGAFRpin(SSP3_TXD_ALTFN);
+    call TXD.setGPDRbit(TRUE);
+    call RXD.setGAFRpin(SSP3_RXD_ALTFN);
+    call RXD.setGPDRbit(FALSE);
+
+    return SUCCESS;
+  }
+  async event void SCLK.interruptGPIOPin() { return;} 
+  async event void TXD.interruptGPIOPin() { return;} 
+  async event void RXD.interruptGPIOPin() { return;} 
+
+}
diff --git a/tos/platforms/intelmote2/chips/cc2420/IM2CC2420SpiP.nc b/tos/platforms/intelmote2/chips/cc2420/IM2CC2420SpiP.nc
new file mode 100644
index 00000000..b44f2fb3
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/cc2420/IM2CC2420SpiP.nc
@@ -0,0 +1,75 @@
+/* $Id: IM2CC2420SpiP.nc,v 1.6 2008-06-11 00:42:14 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Phil Buonadonna
+ */
+configuration IM2CC2420SpiP 
+{
+  
+  provides interface Init;
+  provides interface Resource[uint8_t id];
+  provides interface SpiByte;
+  provides interface SpiPacket[uint8_t instance];
+
+}
+
+implementation 
+{
+
+  components new SimpleFcfsArbiterC("CC2420SpiClient") as FcfsArbiterC;
+  //components new HalPXA27xSpiDMAC(1,0x7,FALSE) as HalPXA27xSpiM; // 6.5 Mbps, 8bit width
+  components new HalPXA27xSpiPioC(1,0x7,FALSE) as HalPXA27xSpiM; // 6.5 Mbps, 8bit width
+  components IM2CC2420InitSpiP;
+  components HplPXA27xSSP3C;
+  components HplPXA27xDMAC;
+  components HplPXA27xGPIOC;
+  components PlatformP;
+
+  Init = IM2CC2420InitSpiP;
+  Init = HalPXA27xSpiM.Init;
+
+  SpiByte = HalPXA27xSpiM;
+  SpiPacket = HalPXA27xSpiM;
+  Resource = FcfsArbiterC;
+
+  IM2CC2420InitSpiP.SCLK -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP3_SCLK];
+  IM2CC2420InitSpiP.TXD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP3_TXD];
+  IM2CC2420InitSpiP.RXD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP3_RXD];
+
+  //HalPXA27xSpiM.RxDMA -> HplPXA27xDMAC.HplPXA27xDMAChnl[0];
+  //HalPXA27xSpiM.TxDMA -> HplPXA27xDMAC.HplPXA27xDMAChnl[1];
+  //HalPXA27xSpiM.SSPRxDMAInfo -> HplPXA27xSSP3C.SSPRxDMAInfo;
+  //HalPXA27xSpiM.SSPTxDMAInfo -> HplPXA27xSSP3C.SSPTxDMAInfo;
+
+  HalPXA27xSpiM.SSP -> HplPXA27xSSP3C.HplPXA27xSSP;
+  
+}
diff --git a/tos/platforms/intelmote2/chips/da9030/PMIC.nc b/tos/platforms/intelmote2/chips/da9030/PMIC.nc
new file mode 100644
index 00000000..870aebf8
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/da9030/PMIC.nc
@@ -0,0 +1,58 @@
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ */
+
+/*
+ *
+ * Authors:	Lama Nachman, Robert Adler
+ */
+
+interface PMIC {
+  /*
+   * Set the voltage of the regulator controling the core
+   *
+   * @param core voltage specified in one of the supported trim values
+   *
+   * @return none
+   */
+  command error_t setCoreVoltage(uint8_t trimValue);
+  command error_t shutDownLDOs();
+  
+  command error_t getBatteryVoltage(uint8_t *val);
+  command error_t enableAutoCharging(bool enable);
+  command error_t enableManualCharging(bool enable);  
+  command error_t chargingStatus(uint8_t *vBat, uint8_t *vChg, uint8_t *iChg);  
+}
diff --git a/tos/platforms/intelmote2/chips/da9030/PMICC.nc b/tos/platforms/intelmote2/chips/da9030/PMICC.nc
new file mode 100644
index 00000000..18e55bec
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/da9030/PMICC.nc
@@ -0,0 +1,95 @@
+/* $Id: PMICC.nc,v 1.6 2008-06-11 00:46:26 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors: Lama Nachman, Robert Adler
+ */
+configuration PMICC{
+  provides{
+    interface Init;
+    interface PMIC;
+  }
+}
+
+implementation{
+  components PMICM;
+  components new TimerMilliC();
+  components HplPXA27xPI2CC, HplPXA27xGPIOC;
+  components PlatformP;
+
+  Init = PMICM;
+  PMIC = PMICM;
+
+  PMICM.Init <- PlatformP.InitL2;
+
+  PMICM.chargeMonitorTimer -> TimerMilliC;
+  PMICM.PMICGPIO -> HplPXA27xGPIOC.HplPXA27xGPIOPin[1];
+  PMICM.PI2C -> HplPXA27xPI2CC.I2C;
+  PMICM.PlatformReset -> PlatformP.PlatformReset;
+
+}
diff --git a/tos/platforms/intelmote2/chips/da9030/PMICM.nc b/tos/platforms/intelmote2/chips/da9030/PMICM.nc
new file mode 100644
index 00000000..bb6f60a6
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/da9030/PMICM.nc
@@ -0,0 +1,419 @@
+/* $Id: PMICM.nc,v 1.7 2008-06-11 00:46:26 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+
+/*
+ *
+ * Authors:  Lama Nachman, Robert Adler
+ */
+
+#define START_RADIO_LDO 1
+#define START_SENSOR_BOARD_LDO 1
+/*
+ * VCC_MEM is connected to BUCK2 by default, make sure you have a board
+ * that has the right resistor settings before disabling BUCK2
+ */
+#define DISABLE_BUCK2 0	
+
+//#include "trace.h"
+#include "Timer.h"
+#include "pmic.h"
+
+module PMICM {
+  provides{
+    interface Init;
+    interface PMIC;
+  }
+
+  uses interface Timer<TMilli> as chargeMonitorTimer;
+  uses interface HplPXA27xGPIOPin as PMICGPIO;
+  uses interface HplPXA27xI2C as PI2C;
+  uses interface PlatformReset;
+}
+
+implementation {
+#include "pmic.h"
+  
+  bool gotReset;
+  
+  
+  error_t readPMIC(uint8_t address, uint8_t *value, uint8_t numBytes){
+    //send the PMIC the address that we want to read
+    if(numBytes > 0){
+      call PI2C.setIDBR(PMIC_SLAVE_ADDR<<1); 
+      call PI2C.setICR(call PI2C.getICR() | ICR_START);
+      call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+      while(call PI2C.getICR() & ICR_TB);
+      
+      //actually send the address terminated with a STOP
+      call PI2C.setIDBR(address);
+      call PI2C.setICR(call PI2C.getICR() & ~ICR_START);
+      call PI2C.setICR(call PI2C.getICR() | ICR_STOP);
+      call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+      while(call PI2C.getICR() & ICR_TB);
+      call PI2C.setICR(call PI2C.getICR() & ~ICR_STOP);
+      
+      //actually request the read of the data
+      call PI2C.setIDBR(PMIC_SLAVE_ADDR<<1 | 1);
+      call PI2C.setICR(call PI2C.getICR() | ICR_START); 
+      call PI2C.setICR(call PI2C.getICR() | ICR_TB);
+      while(call PI2C.getICR() & ICR_TB);
+      call PI2C.setICR(call PI2C.getICR() & ~ICR_START);
+      
+      //using Page Read Mode
+      while (numBytes > 1){
+	call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+	while(call PI2C.getICR() & ICR_TB);
+	*value = call PI2C.getIDBR(); 
+	value++;
+	numBytes--;
+      }
+      
+      call PI2C.setICR(call PI2C.getICR() | ICR_STOP);
+      call PI2C.setICR(call PI2C.getICR() | ICR_ACKNAK);
+      call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+      while(call PI2C.getICR() & ICR_TB);
+      *value = call PI2C.getIDBR(); 
+      call PI2C.setICR(call PI2C.getICR() & ~ICR_STOP); 
+      call PI2C.setICR(call PI2C.getICR() & ~ICR_ACKNAK);
+      
+      return SUCCESS;
+    }
+    else{
+      return FAIL;
+    }
+  }
+
+  error_t writePMIC(uint8_t address, uint8_t value){
+    call PI2C.setIDBR(PMIC_SLAVE_ADDR<<1); 
+    call PI2C.setICR(call PI2C.getICR() | ICR_START); 
+    call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+    while(call PI2C.getICR() & ICR_TB);
+    
+    PIDBR = address;
+    call PI2C.setICR(call PI2C.getICR() & ~ICR_START); 
+    call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+    while(call PI2C.getICR() & ICR_TB);
+
+    PIDBR = value;
+    call PI2C.setICR(call PI2C.getICR() | ICR_STOP); 
+    call PI2C.setICR(call PI2C.getICR() | ICR_TB); 
+    while(call PI2C.getICR() & ICR_TB);
+    call PI2C.setICR(call PI2C.getICR() & ~ICR_STOP); PICR &= ~ICR_STOP;
+
+    return SUCCESS;
+  }
+  
+  void startLDOs() {
+    //uint8_t temp;
+    uint8_t oldVal, newVal;
+
+#if START_SENSOR_BOARD_LDO 
+    // TODO : Need to move out of here to sensor board functions
+    readPMIC(PMIC_A_REG_CONTROL_1, &oldVal, 1);
+    newVal = oldVal | ARC1_LDO10_EN | ARC1_LDO11_EN;	// sensor board
+    writePMIC(PMIC_A_REG_CONTROL_1, newVal);
+
+    readPMIC(PMIC_B_REG_CONTROL_2, &oldVal, 1);
+    newVal = oldVal | BRC2_LDO10_EN | BRC2_LDO11_EN;
+    writePMIC(PMIC_B_REG_CONTROL_2, newVal);
+#endif
+
+#if START_RADIO_LDO
+    // TODO : Move to radio start
+    readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1);
+    newVal = oldVal | BRC1_LDO5_EN; 
+    writePMIC(PMIC_B_REG_CONTROL_1, newVal);
+#endif
+
+#if DISABLE_BUCK2  // Disable BUCK2 if VCC_MEM is not configured to use BUCK2
+    readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1);
+    newVal = oldVal & ~BRC1_BUCK_EN;
+    writePMIC(PMIC_B_REG_CONTROL_1, newVal);
+#endif
+
+#if 0
+    // Configure above LDOs, Radio and sensor board LDOs to turn off in sleep
+    // TODO : Sleep setting doesn't work
+    temp = BSC1_LDO1(1) | BSC1_LDO2(1) | BSC1_LDO3(1) | BSC1_LDO4(1);
+    writePMIC(PMIC_B_SLEEP_CONTROL_1, temp);
+    temp = BSC2_LDO5(1) | BSC2_LDO7(1) | BSC2_LDO8(1) | BSC2_LDO9(1);
+    writePMIC(PMIC_B_SLEEP_CONTROL_2, temp);
+    temp = BSC3_LDO12(1); 
+    writePMIC(PMIC_B_SLEEP_CONTROL_3, temp);
+#endif
+  }
+
+  error_t startPMICstuff() {
+    //command result_t StdControl.start(){ XXX-pb
+    //init unit
+    uint8_t val[3];
+    //call PI2CInterrupt.enable(); XXX-pb
+
+  }
+
+  command error_t Init.init(){
+    uint8_t val[3];
+    PCFR |= PCFR_PI2C_EN; // Overrides GPIO settings on pins
+    call PI2C.setICR(call PI2C.getICR() | (ICR_IUE | ICR_SCLE));
+    atomic{
+      gotReset=FALSE;
+    }    
+
+    call PMICGPIO.setGAFRpin(0);
+    call PMICGPIO.setGPDRbit(FALSE);
+    call PMICGPIO.setGFERbit(TRUE);
+    /*
+     * Reset the watchdog, switch it to an interrupt, so we can disable it
+     * Ignore SLEEP_N pin, enable H/W reset via button 
+     */
+    writePMIC(PMIC_SYS_CONTROL_A, 
+              SCA_RESET_WDOG | SCA_WDOG_ACTION | SCA_HWRES_EN);
+
+    // Disable all interrupts from PMIC except for ONKEY button
+    writePMIC(PMIC_IRQ_MASK_A, ~IMA_ONKEY_N);
+    writePMIC(PMIC_IRQ_MASK_B, 0xFF);
+    writePMIC(PMIC_IRQ_MASK_C, 0xFF);
+    
+    //read out the EVENT registers so that we can receive interrupts
+    readPMIC(PMIC_EVENTS, val, 3);
+
+    // Set default core voltage to 0.85 V
+#ifdef PXA27X_13M
+    //P85 is not reliable, using P95
+    call PMIC.setCoreVoltage(B2R1_TRIM_P95_V);
+#else
+    call PMIC.setCoreVoltage(B2R1_TRIM_1_25_V);
+#endif
+    startLDOs();
+    return SUCCESS;
+  }
+
+  async event void PI2C.interruptI2C() { //PI2CInterrupt.fired(){
+    uint32_t status, update=0;
+    status = call PI2C.getISR(); //PISR;
+    if(status & ISR_ITE){
+      update |= ISR_ITE;
+      //trace(DBG_USR1,"sent data");
+    }
+
+    if(status & ISR_BED){
+      update |= ISR_BED;
+      //trace(DBG_USR1,"bus error");
+    }
+    call PI2C.setISAR(update); //PISR = update;
+  }
+  
+  async event void PMICGPIO.interruptGPIOPin(){
+    uint8_t events[3];
+    bool localGotReset;
+   
+    //call PMICGPIO.call PMICInterrupt.clear(); XXX autocleard by GPIO module
+   
+    readPMIC(PMIC_EVENTS, events, 3);
+   
+    if(events[EVENTS_A_OFFSET] & EA_ONKEY_N){
+      atomic{
+        localGotReset = gotReset;
+      }
+      if(localGotReset==TRUE){
+	call PlatformReset.reset();
+      }
+      else{
+        atomic{
+	  gotReset=TRUE;
+        }
+      }
+    }
+    else{
+      //trace(DBG_USR1,"PMIC EVENTs =%#x %#x %#x\r\n",events[0], events[1], events[2]);
+    }
+  }
+
+  /*
+   * The Buck2 controls the core voltage, set to appropriate trim value
+   */
+  command error_t PMIC.setCoreVoltage(uint8_t trimValue) {
+    writePMIC(PMIC_BUCK2_REG1, (trimValue & B2R1_TRIM_MASK) | B2R1_GO);
+    return SUCCESS;
+  }
+  
+  command error_t PMIC.shutDownLDOs() {
+    uint8_t temp;
+    uint8_t oldVal, newVal;
+    /* 
+     * Shut down all LDOs that are not controlled by the sleep mode
+     * Note, we assume here the LDO10 & LDO11 (sensor board) will be off
+     * Should be moved to sensor board control
+     */
+
+    // LDO1, LDO4, LDO6, LDO7, LDO8, LDO9, LDO10, LDO 11, LDO13, LDO14
+
+    readPMIC(PMIC_A_REG_CONTROL_1, &oldVal, 1);
+    newVal = oldVal & ~ARC1_LDO13_EN & ~ARC1_LDO14_EN;
+    newVal = newVal & ~ARC1_LDO10_EN & ~ARC1_LDO11_EN;	// sensor board
+    writePMIC(PMIC_A_REG_CONTROL_1, newVal);
+
+    readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1);
+    newVal = oldVal & ~BRC1_LDO1_EN & ~BRC1_LDO4_EN & ~BRC1_LDO5_EN &
+             ~BRC1_LDO6_EN & ~BRC1_LDO7_EN;
+    writePMIC(PMIC_B_REG_CONTROL_1, newVal);
+
+    readPMIC(PMIC_B_REG_CONTROL_2, &oldVal, 1);
+    newVal = oldVal & ~BRC2_LDO8_EN & ~BRC2_LDO9_EN & ~BRC2_LDO10_EN &
+             ~BRC2_LDO11_EN & ~BRC2_LDO14_EN & ~BRC2_SIMCP_EN;
+    writePMIC(PMIC_B_REG_CONTROL_2, newVal);
+    
+    return SUCCESS;
+  }
+
+  error_t getPMICADCVal(uint8_t channel, uint8_t *val){
+    uint8_t oldval;
+    error_t rval;
+    
+    //read out the old value so that we can reset at the end
+    rval = readPMIC(PMIC_ADC_MAN_CONTROL, &oldval,1);
+    if (rval == SUCCESS) {
+      rval = writePMIC(PMIC_ADC_MAN_CONTROL, PMIC_AMC_ADCMUX(channel) | 
+		       PMIC_AMC_MAN_CONV | PMIC_AMC_LDO_INT_Enable);
+    }
+    if (rval == SUCCESS) {
+      rval = readPMIC(PMIC_MAN_RES,val,1);
+    }
+    if (rval == SUCCESS) {
+    //reset to old state
+    rval = writePMIC(PMIC_ADC_MAN_CONTROL, oldval);
+    }
+
+    return rval;
+  }
+
+  command error_t PMIC.getBatteryVoltage(uint8_t *val){
+    //for now, let's use the manual conversion mode
+    return getPMICADCVal(0, val);
+  }
+  
+  command error_t PMIC.chargingStatus(uint8_t *vBat, uint8_t *vChg, 
+                                       uint8_t *iChg){
+    getPMICADCVal(0, vBat);
+    getPMICADCVal(2, vChg);
+    getPMICADCVal(1, iChg);
+    return SUCCESS;
+  }  
+  
+  command error_t PMIC.enableAutoCharging(bool enable){
+    return SUCCESS;
+  }
+  
+  command error_t PMIC.enableManualCharging(bool enable){
+    //just turn on or off the LED for now!!
+    uint8_t val;
+    
+    if(enable){
+      //want to turn on the charger
+      getPMICADCVal(2, &val);
+      //if charger is present due some stuff...75 should be 4.65V or so 
+      if(val > 75 ) {
+	//trace(DBG_USR1,"Charger Voltage is %.3fV...enabling charger...\r\n", ((val*6) * .01035));
+	//write the total timeout to be 8 hours
+	writePMIC(PMIC_TCTR_CONTROL,8);
+	//enable the charger at 100mA and 4.35V
+	writePMIC(PMIC_CHARGE_CONTROL,PMIC_CC_CHARGE_ENABLE | PMIC_CC_ISET(1) | PMIC_CC_VSET(7));
+	//turn on the LED
+	writePMIC(PMIC_LED1_CONTROL,0x80);
+	//start a timer to monitor our progress every 5 minutes!
+	call chargeMonitorTimer.startPeriodic(300000);
+      }
+      else{
+	//trace(DBG_USR1,"Charger Voltage is %.3fV...charger not enabled\r\n", ((val*6) * .01035));
+      }
+    }
+    else{
+      //turn off the charger and the LED
+      call PMIC.getBatteryVoltage(&val);
+      //trace(DBG_USR1,"Disabling Charger...Battery Voltage is %.3fV\r\n", (val * .01035) + 2.65);
+      //disable everything that we enabled
+      writePMIC(PMIC_TCTR_CONTROL,0);
+      writePMIC(PMIC_CHARGE_CONTROL,0);
+      writePMIC(PMIC_LED1_CONTROL,0x00);
+    }
+    return SUCCESS; 
+  }  
+  
+  event void chargeMonitorTimer.fired(){
+    uint8_t val;
+    call PMIC.getBatteryVoltage(&val);
+    //stop when vBat>4V
+    if(val>130){
+      call PMIC.enableManualCharging(FALSE);
+      call chargeMonitorTimer.stop();
+    }
+    return;
+  }
+
+
+}
diff --git a/tos/platforms/intelmote2/chips/da9030/pmic.h b/tos/platforms/intelmote2/chips/da9030/pmic.h
new file mode 100644
index 00000000..5614be17
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/da9030/pmic.h
@@ -0,0 +1,236 @@
+/*
+ *
+ *
+ * Copyright (c) 2000-2002 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors:  Lama Nachman, Robbie Adler
+ *
+ * This file includes the PMIC command defintions.  We are using the Dialog
+ * DA9030 part. 
+ *
+ */
+
+#ifndef PMIC_H
+#define PMIC_H
+
+// I2C slave addr
+#define PMIC_SLAVE_ADDR 0x49
+
+// Register BUCK2 with DVC1
+#define PMIC_BUCK2_REG1 0x15
+
+// Register BUCK2 with DVC2
+#define PMIC_BUCK2_REG2 0x16
+
+// LDO on/off control in App Reg space
+#define PMIC_A_REG_CONTROL_1 0x17
+#define PMIC_A_REG_CONTROL_2 0x18
+
+#define PMIC_EVENTS                 (0x01)	// 3 byte array
+#define PMIC_EVENTA                 (0x01)
+#define PMIC_EVENTB                 (0x02)
+#define PMIC_EVENTC                 (0x03)
+#define PMIC_STATUS                 (0x04)
+#define PMIC_IRQ_MASK_A             (0x05)
+#define PMIC_IRQ_MASK_B             (0x06)
+#define PMIC_IRQ_MASK_C             (0x07)
+#define PMIC_SYS_CONTROL_A          (0x08)
+#define PMIC_SYS_CONTROL_C          (0x80)
+
+#define PMIC_CHARGE_CONTROL         (0x28)
+#define PMIC_CC_CHARGE_ENABLE       (1<<7)
+#define PMIC_CC_ISET(_x)            (((_x) & 0xF) << 3)
+#define PMIC_CC_VSET(_x)            (((_x) & 0x7))
+
+#define PMIC_TCTR_CONTROL           (0x2A)
+
+#define PMIC_ADC_MAN_CONTROL        (0x30)
+#define PMIC_AMC_ADCMUX(_x)         ((_x & 0x7))
+#define PMIC_AMC_MAN_CONV           (1<<3)
+#define PMIC_AMC_LDO_INT_Enable     (1<<4)
+
+#define PMIC_MAN_RES                (0x40)
+#define PMIC_LED1_CONTROL           (0x20)
+
+// LDO on/off control in Baseband Reg space
+#define PMIC_B_REG_CONTROL_1 0x97
+#define PMIC_B_REG_CONTROL_2 0x98
+#define PMIC_B_SLEEP_CONTROL_1 0x99
+#define PMIC_B_SLEEP_CONTROL_2 0x9A
+#define PMIC_B_SLEEP_CONTROL_3 0x9B
+
+// IRQ_MASK_A
+#define IMA_ONKEY_N 0x1
+#define IMA_PWREN1 0x2
+#define IMA_EXTON 0x4
+#define IMA_CHDET 0x8
+#define IMA_TBAT 0x10
+#define IMA_VBATMON_1 0x20
+#define IMA_VBATMON_2 0x40
+#define IMA_CHIOVER 0x80
+ 
+//IRQ_MASK_B
+#define IMB_TCTO 0x1
+#define IMB_CCTO 0x2
+#define IMB_ADC_READY 0x4
+#define IMB_VBUS_VALID_4_4 0x8
+#define IMB_VBUS_VALID_4_0 0x10
+#define IMB_SESSION_VALID 0x20
+#define IMB_SRP_DETECT 0x40
+#define IMB_WDOG 0x80
+
+// SYS_CONTROL_A
+#define SCA_SLEEP_N_EN 0x1
+#define SCA_SHUTDOWN 0x2
+#define SCA_HWRES_EN 0x4
+#define SCA_WDOG_ACTION 0x8
+#define SCA_TWDSCALE(_x) (((_x) & 7) << 4)
+#define SCA_RESET_WDOG 0x80
+
+// Events registers A, B, C
+#define EVENTS_A_OFFSET 0
+#define EA_ONKEY_N 0x1
+#define EA_PWREN1 0x2
+#define EA_EXTON 0x4
+#define EA_CHDET 0x8
+#define EA_TBAT 0x10
+#define EA_VBATMON 0x20
+#define EA_VBATMON_TXON 0x40
+#define EA_CHIOVER 0x80
+
+#define EVENTS_B_OFFSET 1
+#define EVENTS_C_OFFSET 2
+
+// BUCK2 Reg 1
+#define B2R1_TRIM_MASK 0x1f
+#define B2R1_TRIM_P85_V 0x0
+#define B2R1_TRIM_P875_V 0x1
+#define B2R1_TRIM_P9_V 0x2
+#define B2R1_TRIM_P925_V 0x3
+#define B2R1_TRIM_P95_V 0x4
+#define B2R1_TRIM_P975_V 0x5
+#define B2R1_TRIM_1_V 0x6
+#define B2R1_TRIM_1_125_V 0xB
+#define B2R1_TRIM_1_25_V 0x10
+#define B2R1_SLEEP 0x40
+#define B2R1_GO 0x80
+
+// Reg Control 1 for App processor reg space: Enable/Disable LDOs
+#define ARC1_BUCK2_EN 0x1	// on
+#define ARC1_LDO10_EN 0x2	// off
+#define ARC1_LDO11_EN 0x4	// off
+#define ARC1_LDO13_EN 0x8	// off
+#define ARC1_LDO14_EN 0x10	// off
+#define ARC1_LDO15_EN 0x20	// on
+#define ARC1_LDO16_EN 0x40	// on
+#define ARC1_LDO17_EN 0x80	// off
+
+// Reg Control 2 for App processor reg space : Enable/Disable LDOs
+#define ARC2_LDO18_EN 0x1	// on
+#define ARC2_LDO19_EN 0x2	// on
+#define ARC2_SIMCP_EN 0x40	// off
+
+// Reg Control 1 for Baseband reg space
+#define BRC1_BUCK_EN 0x1	// off
+#define BRC1_LDO1_EN 0x2	// off
+#define BRC1_LDO2_EN 0x4	// off
+#define BRC1_LDO3_EN 0x8	// BB
+#define BRC1_LDO4_EN 0x10	// off
+#define BRC1_LDO5_EN 0x20	// radio
+#define BRC1_LDO6_EN 0x40	// off
+#define BRC1_LDO7_EN 0x80	// off
+
+// Reg Control 2 for Baseband reg space
+#define BRC2_LDO8_EN 0x1	// off
+#define BRC2_LDO9_EN 0x2	// off
+#define BRC2_LDO10_EN 0x4	// sensor board
+#define BRC2_LDO11_EN 0x8	// sensor board
+#define BRC2_LDO12_EN 0x10	// BB_IO
+#define BRC2_LDO14_EN 0x20	// off
+#define BRC2_SIMCP_EN 0x40	// off
+#define BRC2_SLEEP 0x80	 	// off
+
+// Sleep control 1 for Baseband reg space
+#define BSC1_LDO1(_x)            (((_x) & 0x3) << 0)
+#define BSC1_LDO2(_x)            (((_x) & 0x3) << 2)
+#define BSC1_LDO3(_x)            (((_x) & 0x3) << 4)
+#define BSC1_LDO4(_x)            (((_x) & 0x3) << 6)
+
+// Sleep control 2 for Baseband reg space
+#define BSC2_LDO5(_x)            (((_x) & 0x3) << 0)
+#define BSC2_LDO7(_x)            (((_x) & 0x3) << 2)
+#define BSC2_LDO8(_x)            (((_x) & 0x3) << 4)
+#define BSC2_LDO9(_x)            (((_x) & 0x3) << 6)
+
+// Sleep control 3 for Baseband reg space
+#define BSC3_LDO12(_x)            (((_x) & 0x3) << 0)
+
+#endif //PMIC_H
diff --git a/tos/platforms/intelmote2/chips/ds2745/DS2745InternalC.nc b/tos/platforms/intelmote2/chips/ds2745/DS2745InternalC.nc
new file mode 100644
index 00000000..acbfd2d9
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/ds2745/DS2745InternalC.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * 
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:42 $
+ */
+
+configuration DS2745InternalC {
+  provides interface SplitControl;
+  provides interface Resource[uint8_t id];
+  provides interface HplDS2745[uint8_t id];
+}
+
+implementation {
+  components new SimpleFcfsArbiterC( "Ds2745.Resource" ) as Arbiter;
+  components MainC;
+  Resource = Arbiter;
+  
+  components new HplDS2745LogicP(DS2745_SLAVE_ADDR) as Logic;
+  MainC.SoftwareInit -> Logic;
+
+  components new HalPXA27xI2CMasterC(TRUE) as I2CC;
+  Logic.I2CPacket -> I2CC;
+
+  components HplPXA27xGPIOC;
+  I2CC.I2CSCL -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SCL];
+  I2CC.I2CSDA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SDA];
+
+  components DS2745InternalP as Internal;
+  HplDS2745 = Internal.HplDS2745;
+  Internal.ToHPLC -> Logic.HplDS2745;
+
+  SplitControl = Logic;
+
+}
diff --git a/tos/platforms/intelmote2/chips/ds2745/DS2745InternalP.nc b/tos/platforms/intelmote2/chips/ds2745/DS2745InternalP.nc
new file mode 100644
index 00000000..4e8cb477
--- /dev/null
+++ b/tos/platforms/intelmote2/chips/ds2745/DS2745InternalP.nc
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * 
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:42 $
+ */
+
+module DS2745InternalP {
+  provides interface HplDS2745[uint8_t id];
+  uses interface HplDS2745 as ToHPLC;
+}
+
+implementation {
+  uint8_t currentId;
+  
+  command error_t HplDS2745.setConfig[uint8_t id](uint8_t val) {
+    currentId = id;
+    return call ToHPLC.setConfig(val);
+  }
+  command error_t HplDS2745.measureTemperature[uint8_t id]() {
+    currentId = id;
+    return call ToHPLC.measureTemperature();
+  }
+  command error_t HplDS2745.measureVoltage[uint8_t id]() {
+    currentId = id;
+    return call ToHPLC.measureVoltage();
+  }
+  command error_t HplDS2745.measureCurrent[uint8_t id]() {
+    currentId = id;
+    return call ToHPLC.measureCurrent();
+  }
+  command error_t HplDS2745.measureAccCurrent[uint8_t id]() {
+    currentId = id;
+    return call ToHPLC.measureAccCurrent();
+  }
+  command error_t HplDS2745.setOffsetBias[uint8_t id](int8_t val) {
+    currentId = id;
+    return call ToHPLC.setOffsetBias(val);
+  }
+  command error_t HplDS2745.setAccOffsetBias[uint8_t id](int8_t val) {
+    currentId = id;
+    return call ToHPLC.setAccOffsetBias(val);
+  }
+  
+  async event void ToHPLC.setConfigDone(error_t error) {
+    signal HplDS2745.setConfigDone[currentId](error);
+  }
+  async event void ToHPLC.measureTemperatureDone(error_t result, uint16_t val) {
+    signal HplDS2745.measureTemperatureDone[currentId](result, val);
+  }
+  async event void ToHPLC.measureVoltageDone(error_t result, uint16_t val) {
+    signal HplDS2745.measureVoltageDone[currentId](result, val);
+  }
+  async event void ToHPLC.measureCurrentDone(error_t result, uint16_t val) {
+    signal HplDS2745.measureCurrentDone[currentId](result, val);
+  }
+  async event void ToHPLC.measureAccCurrentDone(error_t result, uint16_t val) {
+    signal HplDS2745.measureAccCurrentDone[currentId](result, val);
+  }
+  async event void ToHPLC.setOffsetBiasDone(error_t error) {
+    signal HplDS2745.setOffsetBiasDone[currentId](error);
+  }
+  async event void ToHPLC.setAccOffsetBiasDone(error_t error) {
+    signal HplDS2745.setAccOffsetBiasDone[currentId](error);
+  }
+
+  default async event void HplDS2745.setConfigDone[uint8_t id]( error_t error ){ return; }
+  default async event void HplDS2745.measureTemperatureDone[uint8_t id]( error_t error, uint16_t val ){ return; }
+  default async event void HplDS2745.measureVoltageDone[uint8_t id]( error_t error, uint16_t val ){ return; }
+  default async event void HplDS2745.measureCurrentDone[uint8_t id]( error_t error, uint16_t val ){ return; }
+  default async event void HplDS2745.measureAccCurrentDone[uint8_t id]( error_t error, uint16_t val ){ return; }
+  default async event void HplDS2745.setOffsetBiasDone[uint8_t id]( error_t error ){ return; }
+  default async event void HplDS2745.setAccOffsetBiasDone[uint8_t id](error_t error){ return; }
+
+}
+
+
diff --git a/tos/platforms/intelmote2/hardware.h b/tos/platforms/intelmote2/hardware.h
new file mode 100644
index 00000000..80d7e09a
--- /dev/null
+++ b/tos/platforms/intelmote2/hardware.h
@@ -0,0 +1,282 @@
+/*
+ * Copyright (c) 2005 Arched Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arched Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/*
+ *
+ *
+ * Copyright (c) 2000-2002 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * @Author Philip Buonadonna
+ * @Author Robbie Adler
+ *
+ */
+
+#ifndef __TOSH_HARDWARE_H__
+#define __TOSH_HARDWARE_H__
+
+#include "pxa27xhardware.h"
+//#include "AM.h"
+
+// enum so components can override power saving,
+// as per TEP 112.
+// Note that currently the pxa27x does not support
+// McuPowerOverride, so SLEEP_NONE is defined to
+// be 0.
+enum {
+  TOS_SLEEP_NONE = 0,
+};
+
+#define MIN(a,b) ((a) < (b) ? (a) : (b))
+
+/* Watchdog Prescaler
+ */
+enum {
+  TOSH_period16 = 0x00, // 47ms
+  TOSH_period32 = 0x01, // 94ms
+  TOSH_period64 = 0x02, // 0.19s
+  TOSH_period128 = 0x03, // 0.38s
+  TOSH_period256 = 0x04, // 0.75s
+  TOSH_period512 = 0x05, // 1.5s
+  TOSH_period1024 = 0x06, // 3.0s
+  TOSH_period2048 = 0x07 // 6.0s
+};
+
+/* Global interrupt priority table. 
+ *    Table is indexed by the Peripheral ID (PPID). Priorities are 0 - 39
+ *    where 0 is the highest.  Priorities MUST be unique. 0XFF = invalid/unassigned
+ */
+const uint8_t TOSH_IRP_TABLE[] = { 0x05, // PPID  0 SSP_3 Service Req
+				   0xFF, // PPID  1 MSL
+				   0xFF, // PPID  2 USBH2
+				   0xFF, // PPID  3 USBH1
+				   0xFF, // PPID  4 Keypad
+				   0xFF, // PPID  5 Memory Stick
+				   0xFF, // PPID  6 Power I2C
+				   0x04, // PPID  7 OST match Register 4-11
+				   0x01, // PPID  8 GPIO_0
+				   0x03, // PPID  9 GPIO_1
+				   0x02, // PPID 10 GPIO_x
+				   0x08, // PPID 11 USBC
+				   0xFF, // PPID 12 PMU
+				   0xFF, // PPID 13 I2S
+				   0xFF, // PPID 14 AC '97
+				   0xFF, // PPID 15 SIM status/error
+				   0xFF, // PPID 16 SSP_2 Service Req
+				   0xFF, // PPID 17 LCD Controller Service Req
+				   0xFF, // PPID 18 I2C Service Req
+				   0xFF, // PPID 19 TX/RX ERROR IRDA
+				   0x07, // PPID 20 TX/RX ERROR STUART
+				   0xFF, // PPID 21 TX/RX ERROR BTUART
+				   0x06, // PPID 22 TX/RX ERROR FFUART
+				   0xFF, // PPID 23 Flash Card status/Error Detect
+				   0x0A, // PPID 24 SSP_1 Service Req
+				   0x00, // PPID 25 DMA Channel Service Req
+				   0xFF, // PPID 26 OST equals Match Register 0
+				   0xFF, // PPID 27 OST equals Match Register 1
+				   0xFF, // PPID 28 OST equals Match Register 2
+				   0xFF, // PPID 29 OST equals Match Register 3
+				   0xFF, // PPID 30 RTC One HZ TIC
+				   0xFF, // PPID 31 RTC equals Alarm
+				   0xFF, // PPID 32
+				   0x09, // PPID 33 Quick Capture Interface
+				   0xFF, // PPID 34
+				   0xFF, // PPID 35
+				   0xFF, // PPID 36
+				   0xFF, // PPID 37
+				   0xFF, // PPID 38
+				   0xFF  // PPID 39
+};
+
+#ifdef IMOTE2_DEVBOARD 
+
+// LED assignments
+#define RED_LED_PIN (95)
+#define GREEN_LED_PIN (102)
+#define BLUE_LED_PIN (27)
+
+// CC2420 RADIO #defines
+#define CC2420_VREN_PIN (40)
+#define CC2420_RSTN_PIN (22)
+#define CC2420_FIFO_PIN (114)
+#define CC2420_CCA_PIN (116)
+#define CC2420_FIFOP_PIN (115)
+#define CC2420_SFD_PIN (16)
+#define CC2420_CSN_PIN (39)
+
+#else
+
+// LED assignments
+#define RED_LED_PIN (103)
+#define GREEN_LED_PIN (104)
+#define BLUE_LED_PIN (105)
+
+// CC2420 RADIO #defines
+#define CC2420_VREN_PIN (115)
+#define CC2420_RSTN_PIN (22)
+#define CC2420_FIFO_PIN (114)
+#define CC2420_CCA_PIN (116)
+#define CC2420_FIFOP_PIN (0)
+#define CC2420_SFD_PIN (16)
+#define CC2420_CSN_PIN (39)
+
+#endif /* IMOTE2_DEVBOARD */
+
+#define SSP3_RXD (41)
+#define SSP3_RXD_ALTFN (3)
+#define SSP3_TXD (35)
+#define SSP3_TXD_ALTFN (3)
+#define SSP3_SFRM (39)
+#define SSP3_SFRM_ALTFN (3)
+#define SSP3_SCLK (34)
+#define SSP3_SCLK_ALTFN (3)
+
+#define SSP1_RXD (26)
+#define SSP1_RXD_ALTFN (1 )
+#define SSP1_TXD (25)
+#define SSP1_TXD_ALTFN (2 )
+#define SSP1_SCLK (23)
+#define SSP1_SCLK_ALTFN (2 )
+#define SSP1_SFRM (24)
+#define SSP1_SFRM_ALTFN (2 )
+
+#define FFUART_RXD (96)
+#define FFUART_RXD_ALTFN (3)
+#define FFUART_TXD (99) 
+#define FFUART_TXD_ALTFN (3)
+
+#define STUART_RXD (46)
+#define STUART_RXD_ALTFN (2)
+#define STUART_TXD (47) 
+#define STUART_TXD_ALTFN (1)
+
+#define I2C_SCL (117)
+#define I2C_SCL_ALTFN (1)
+#define I2C_SDA (118)
+#define I2C_SDA_ALTFN (1)
+
+#define DS2745_SLAVE_ADDR (0x48)
+
+#if 0
+TOSH_ASSIGN_PIN(CC_VREN,A,CC_VREN_PIN); 
+TOSH_ASSIGN_PIN(CC_RSTN,A,CC_RSTN_PIN);
+TOSH_ASSIGN_PIN(CC_FIFO,A,CC_FIFO_PIN);
+TOSH_ASSIGN_PIN(RADIO_CCA,A,RADIO_CCA_PIN);
+TOSH_ASSIGN_PIN(CC_FIFOP,A,CC_FIFOP_PIN);
+TOSH_ASSIGN_PIN(CC_SFD,A,CC_SFD_PIN);
+TOSH_ASSIGN_PIN(CC_CSN,A,CC_CSN_PIN);
+#endif
+
+void TOSH_SET_PIN_DIRECTIONS(void)
+{
+
+  PSSR = (PSSR_RDH | PSSR_PH);   // Reenable the GPIO buffers (needed out of reset)
+#if 0
+  TOSH_CLR_CC_RSTN_PIN();
+  TOSH_MAKE_CC_RSTN_OUTPUT();
+  TOSH_CLR_CC_VREN_PIN();
+  TOSH_MAKE_CC_VREN_OUTPUT();
+  TOSH_SET_CC_CSN_PIN();
+  TOSH_MAKE_CC_CSN_OUTPUT();
+  TOSH_MAKE_CC_FIFOP_INPUT();
+  TOSH_MAKE_CC_FIFO_INPUT();
+  TOSH_MAKE_CC_SFD_INPUT();
+  TOSH_MAKE_RADIO_CCA_INPUT();
+#endif
+}
+
+
+#endif //TOSH_HARDWARE_H
diff --git a/tos/platforms/intelmote2/platform.h b/tos/platforms/intelmote2/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/intelmote2/platform_message.h b/tos/platforms/intelmote2/platform_message.h
new file mode 100644
index 00000000..2b947aee
--- /dev/null
+++ b/tos/platforms/intelmote2/platform_message.h
@@ -0,0 +1,71 @@
+/* $Id: platform_message.h,v 1.6 2010-06-29 22:07:53 scipio Exp $
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific CC1000 packet structures.
+ *
+ * @author Philip Levis
+ * @date   May 16 2005
+ * Revision:  $Revision: 1.6 $
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "CC2420.h"
+#include "Serial.h"
+
+typedef union message_header {
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  cc2420_footer_t cc2420;
+} message_footer_t;
+
+typedef union message_metadata {
+  cc2420_metadata_t cc2420;
+  serial_metadata_t serial;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/intelmote2/tos.x b/tos/platforms/intelmote2/tos.x
new file mode 100644
index 00000000..c784959f
--- /dev/null
+++ b/tos/platforms/intelmote2/tos.x
@@ -0,0 +1,85 @@
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
+	      "elf32-littlearm")
+OUTPUT_ARCH(arm)
+MEMORY
+{
+  text   (rx)   : ORIGIN = 0, LENGTH = 64M
+  data   (rw!x) : ORIGIN = 0x5c000000, LENGTH = 256K
+}
+SECTIONS
+{
+  .text           :
+  {
+    *(.vectors)
+    *(.text .stub .text.* .gnu.linkonce.t.*)
+    *(.rodata.*)
+    *(.rodata)    
+    /* .gnu.warning sections are handled specially by elf32.em.  */
+    *(.gnu.warning)
+    *(.glue_7t) *(.glue_7)
+    KEEP (*(.fini))
+  } >text
+  PROVIDE (__etext = .);
+  PROVIDE (_etext = .);
+  PROVIDE (etext = .);
+  .data           : AT (ADDR(.text) + SIZEOF(.text))
+  {
+    __data_start = . ;
+    *(.data .data.* .gnu.linkonce.d.*)
+    *(.gnu.linkonce.d*)
+    _edata = .;
+    PROVIDE (edata = .);
+  } > data
+  .bss SIZEOF(.data) + ADDR(.data) :
+  {
+    __bss_start = .;
+    __bss_start__ = .;
+   *(.dynbss)
+   *(.bss .bss.* .gnu.linkonce.b.*)
+   *(COMMON)
+    _end = .;
+    _bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
+    PROVIDE (end = .);
+  } >data
+   __data_load_start = LOADADDR(.data);
+   __data_load_end = __data_load_start + SIZEOF(.data);
+  /* Stabs debugging sections.  */
+  .stab          0 : { *(.stab) }
+  .stabstr       0 : { *(.stabstr) }
+  .stab.excl     0 : { *(.stab.excl) }
+  .stab.exclstr  0 : { *(.stab.exclstr) }
+  .stab.index    0 : { *(.stab.index) }
+  .stab.indexstr 0 : { *(.stab.indexstr) }
+  .comment       0 : { *(.comment) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+    .stack         0x80000 :
+  {
+    _stack = .;
+    *(.stack)
+  }
+  /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/tos/platforms/intelmote2/toscrt0.s b/tos/platforms/intelmote2/toscrt0.s
new file mode 100644
index 00000000..4767dba3
--- /dev/null
+++ b/tos/platforms/intelmote2/toscrt0.s
@@ -0,0 +1,264 @@
+/*
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Intel Open Source License 
+ *
+ *  Copyright (c) 2002 Intel Corporation 
+ *  All rights reserved. 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions are
+ *  met:
+ * 
+ *	Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ *      Neither the name of the Intel Corporation nor the names of its
+ *  contributors may be used to endorse or promote products derived from
+ *  this software without specific prior written permission.
+ *  
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
+ *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * 
+ */
+/*
+ *
+ * Authors: Phil Buonadonna,David Gay
+ * Date last modified:  $Revision: 1.6 $
+ *
+ */
+			
+	.equ	ARM_CPSR_MODE_MASK,(0x0000001F)
+	.equ	ARM_CPSR_INT_MASK,(0x000000C0)
+	.equ	ARM_CPSR_COND_MASK,(0xF8000000)
+	
+	.equ	ARM_CPSR_MODE_USR,(0x10)
+	.equ	ARM_CPSR_MODE_FIQ,(0x11)
+	.equ	ARM_CPSR_MODE_IRQ,(0x12)
+	.equ	ARM_CPSR_MODE_SVC,(0x13)
+	.equ	ARM_CPSR_MODE_ABT,(0x17)
+	.equ	ARM_CPSR_MODE_UND,(0x1B)
+	.equ	ARM_CPSR_MODE_SYS,(0x1F)
+
+	.equ	ARM_CPSR_BIT_N,(0x80000000)
+	.equ	ARM_CPSR_BIT_Z,(0x40000000)
+	.equ	ARM_CPSR_BIT_C,(0x20000000)
+	.equ	ARM_CPSR_BIT_V,(0x10000000)
+	.equ	ARM_CPSR_BIT_Q,(0x08000000)
+	
+	.equ	ARM_CPSR_BIT_I,(0x00000080)
+	.equ	ARM_CPSR_BIT_F,(0x00000040)
+	.equ	ARM_CPRS_BIT_T,(0x00000020)
+
+	.equ   _TOS_STACK_SIZE,(0x400)		@ TinyOS Exception stack sizes
+	.equ   _TOS_ISRAM_PHYSBASE,(0x5C000000)	@ Internal SRAM on PXA27X
+	.text
+	
+.globl start
+start:
+	mrs	r0, CPSR
+	bic	r0, r0, #ARM_CPSR_MODE_MASK
+	orr	r0, r0, #(ARM_CPSR_MODE_SVC | ARM_CPSR_INT_MASK)
+	msr	cpsr_cf, r0
+	
+	/* Initialize the stack pointers for all modes */
+	mov	r0,#_TOS_ISRAM_PHYSBASE
+	ldr	r2, =(256*1024 - 4)		@ and go to the last slot (256K - 4)
+	add	r2,r2,r0
+	
+	mov	r0, #ARM_CPSR_MODE_ABT			
+	msr	CPSR_c, R0
+	mov	sp, r2
+	sub	r2, r2, #_TOS_STACK_SIZE
+
+	mov	r0, #ARM_CPSR_MODE_UND	
+	msr	CPSR_c, R0
+	mov	sp, r2
+	sub	r2, r2, #_TOS_STACK_SIZE
+	
+	mov	r0, #ARM_CPSR_MODE_FIQ			
+	msr	CPSR_c, R0
+	mov	sp, r2
+	sub	r2, r2, #_TOS_STACK_SIZE
+
+	mov	r0, #ARM_CPSR_MODE_IRQ			
+	msr	CPSR_c, R0
+	mov	sp, r2
+	sub	r2, r2, #(_TOS_STACK_SIZE * 2)
+	
+	mov	r0, #ARM_CPSR_MODE_SVC			
+	msr	CPSR_c, R0
+	mov	sp, r2
+	
+		
+	/* copy data */
+	ldr	r0, =__data_load_start
+	ldr	r1, =__data_load_end
+	ldr	r2, =__data_start
+.Lcopy:	
+	cmp	r0, r1
+	beq	.Lcopydone
+	ldrb	r3, [r0], #1
+	strb	r3, [r2], #1
+	b	.Lcopy
+.Lcopydone:
+	/* clear bss */
+	ldr	r0, =__bss_start__
+	ldr	r1, =__bss_end__
+	mov	r2, #0
+.Lclear:	
+	cmp	r0, r1
+	beq	.Lcleardone
+	strb	r2, [r0], #1
+	b	.Lclear
+.Lcleardone:	
+	mov	r0, #0 /* argc? */
+	mov	r1, #0 /* argv? */
+	bl	main
+
+.L1:	
+	nop
+	b	.L1
+
+@if we receive and interrupt that we don't handle, behavior will depend on whether we're in release or not
+.ifdef RELEASE 
+@reboot...assumes that we started out in supervisor mode..and that we'll be returning  
+hplarmv_undef:
+	movs PC, #0
+hplarmv_swi:
+	movs PC, #0
+hplarmv_pabort:
+	movs PC, #0
+hplarmv_dabort:
+	movs PC, #0
+hplarmv_reserved:
+	movs PC, #0
+hplarmv_irq:
+	movs PC, #0
+hplarmv_fiq:	
+	movs PC, #0
+.else
+@infinite loop so that we can detect what happened with a debugger
+@in future, we'll want to blink specific LED patter or something for the USER...or perhaps blue light of death
+hplarmv_undef:
+	b hplarmv_undef	
+hplarmv_swi:
+	b hplarmv_swi
+hplarmv_pabort:
+	b hplarmv_pabort
+hplarmv_dabort:
+	b hplarmv_dabort
+hplarmv_reserved:
+	b hplarmv_reserved	
+hplarmv_irq:
+	b hplarmv_irq	
+hplarmv_fiq:	
+	b hplarmv_fiq
+.endif
+
+reset_handler_start:
+@ reset handler should first check whether this is a debug exception
+@ or a real RESET event.
+@ NOTE: r13 is only safe register to use.
+@ - For RESET, donÆt really care about which register is used
+@ - For debug exception, r13=DBG_r13, prevents application registers
+@ - from being corrupted, before debug handler can save.
+	mrs r13, cpsr
+	and r13, r13, #0x1f
+	cmp r13, #0x15			@ are we in DBG mode?
+	beq dbg_handler_stub		@ if so, go to the dbg handler stub
+	mov r13, #0x8000001c		@ otherwise, enable debug, set MOE bits
+	mcr p14, 0, r13, c10, c0, 0	@ and continue with the reset handler
+@ normal reset handler initialization follows code here,
+@ or branch to the reset handler.	
+	b	start
+
+.align 5 @ align code to a cache line boundary.
+dbg_handler_stub:
+@ First save the state of the IC enable/disable bit in DBG_LR[0].
+	mrc p15, 0, r13, c1, c0, 0
+	and r13, r13, #0x1000
+	orr r14, r14, r13, lsr #12
+@ Next, enable the IC.
+	mrc p15, 0, r13, c1, c0, 0
+	orr r13, r13, #0x1000
+	mcr p15, 0, r13, c1, c0, 0
+@ do a sync operation to ensure all outstanding instr fetches have
+@ completed before continuing. The invalidate cache line function
+@ serves as a synchronization operation, thatÆs why it is used
+@ here. The target line is some scratch address in memory.
+	adr r13, line2
+	mcr p15, 0, r13, c7, c5, 1
+@ invalidate BTB. make sure downloaded vector table does not hit one of
+@ the applicationÆs branches cached in the BTB, branch to the wrong place
+	mcr p15, 0, r13, c7, c5, 6
+@ Now, send æready for downloadÆ message to debugger, indicating debugger
+@ can begin the download. æready for downloadÆ = 0x00B00000.
+TXloop:
+	mrc p14, 0, r15, c14, c0, 0	@ first make sure TX reg. is available
+	bvs TXloop
+	mov r13, #0x00B00000
+	mcr p14, 0, r13, c8, c0, 0	@ now write to TX
+@ Wait for debugger to indicate that the download is complete.
+	RXloop:
+	mrc p14, 0, r15, c14, c0, 0	@ spin in loop waiting for data from the
+	bpl RXloop			@ debugger in RX.
+@ before reading the RX register to get the address to branch to, restore
+@ the state of the IC (saved in DBG_r14[0]) to the value it have at the
+@ start of the debug handler stub. Also, note it must be restored before	
+@ reading the RX register because of limited scratch registers (r13)
+	mrc p15, 0, r13, c1, c0, 0
+@ First, check DBG_LR[0] to see if the IC was enabled or disabled
+	tst r14, #0x1
+@ Then, if it was previously disabled, then disable it now, otherwise,
+@ thereÆs no need to change the state, because its already enabled.
+	biceq r13, r13, #0x1000
+	mcr p15, 0, r13, c1, c0, 0
+@ Restore the link register value
+	bic r14, r14, #0x1
+@ Now r13 can be used to read RX and get the target address to branch to.
+	mrc p14, 0, r13, c9, c0, 0	@ Read RX and
+	mov pc, r13			@ branch to downloaded address.
+@ scratch memory space used by the invalidate IC line function above.
+.align 5 @ make sure it starts at a cache line
+@ boundary, so nothing else is affected
+line2:
+.word 0
+.word 0
+.word 0
+.word 0
+.word 0
+.word 0
+.word 0
+.word 0	
+	
+	.weak hplarmv_undef, hplarmv_swi, hplarmv_pabort, hplarmv_dabort, hplarmv_reserved, hplarmv_irq, hplarmv_fiq
+
+	.section	.vectors
+	b	reset_handler_start
+	b	hplarmv_undef
+	b	hplarmv_swi
+	b	hplarmv_pabort
+	b	hplarmv_dabort
+	b	hplarmv_reserved
+	b	hplarmv_irq
+	b	hplarmv_fiq
+
+.end
+	
+
+	
\ No newline at end of file
diff --git a/tos/platforms/iris/.platform b/tos/platforms/iris/.platform
new file mode 100644
index 00000000..e73cfd85
--- /dev/null
+++ b/tos/platforms/iris/.platform
@@ -0,0 +1,78 @@
+#
+# FILE: micaz/.platform
+#
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+#
+# $Id: .platform,v 1.8 2009-03-10 20:39:18 mmaroti Exp $
+#
+push( @includes, qw(
+
+  %T/platforms/micaz
+  %T/platforms/mica
+  %T/platforms/iris/chips/rf230
+  %T/chips/rf230
+  %T/lib/rfxlink/layers
+  %T/lib/rfxlink/util
+  %T/platforms/iris/chips/at45db
+  %T/platforms/mica2/chips/at45db
+  %T/platforms/mica/chips/at45db
+  %T/chips/at45db
+  %T/platforms/iris/chips/ds2401
+  %T/platforms/mica2/chips/ds2401
+  %T/chips/ds2401
+  %T/chips/atm1281
+  %T/chips/atm1281/adc
+  %T/chips/atm1281/timer
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/i2c
+  %T/chips/atm128/timer
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/power
+  %T/lib/diagmsg
+
+) );
+
+@opts = qw(
+
+  -gcc=avr-gcc
+  -mmcu=atmega1281
+  -fnesc-target=avr
+  -fnesc-no-debug
+
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=4 " .
+    "version=avr-3.4.3 " .
+    "short=2,1, " .
+    "int=2,1 " .
+    "long=4,1 " .
+    "long_long=8,1 " .
+    "pointer=2,1 " .
+    "enum=2,1 " .
+    "float=4,1 " .
+    "double=4,1 " .
+    "long_double=4,1 " .
+    "void=1,1 " .
+    "fun=1,1 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
+    
\ No newline at end of file
diff --git a/tos/platforms/iris/ActiveMessageC.nc b/tos/platforms/iris/ActiveMessageC.nc
new file mode 100644
index 00000000..e0d4955a
--- /dev/null
+++ b/tos/platforms/iris/ActiveMessageC.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+configuration ActiveMessageC
+{
+	provides
+	{
+		interface SplitControl;
+
+		interface AMSend[uint8_t id];
+		interface Receive[uint8_t id];
+		interface Receive as Snoop[uint8_t id];
+		interface SendNotifier[am_id_t id];
+
+		interface Packet;
+		interface AMPacket;
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+#ifdef PACKET_LINK
+		interface PacketLink;
+#endif
+		interface RadioChannel;
+
+		interface PacketTimeStamp<TMicro, uint32_t> as PacketTimeStampMicro;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	components RF230ActiveMessageC as MessageC;
+
+	SplitControl = MessageC;
+
+	AMSend = MessageC;
+	Receive = MessageC.Receive;
+	Snoop = MessageC.Snoop;
+	SendNotifier = MessageC;
+
+	Packet = MessageC;
+	AMPacket = MessageC;
+
+	PacketAcknowledgements = MessageC;
+	LowPowerListening = MessageC;
+#ifdef PACKET_LINK
+	PacketLink = MessageC;
+#endif
+	RadioChannel = MessageC;
+
+	PacketTimeStampMilli = MessageC;
+	PacketTimeStampMicro = MessageC;
+}
diff --git a/tos/platforms/iris/Ieee154MessageC.nc b/tos/platforms/iris/Ieee154MessageC.nc
new file mode 100644
index 00000000..56cc27ac
--- /dev/null
+++ b/tos/platforms/iris/Ieee154MessageC.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2009, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+configuration Ieee154MessageC
+{
+	provides
+	{
+		interface SplitControl;
+
+		interface Ieee154Send;
+		interface Receive as Ieee154Receive;
+		interface SendNotifier;
+
+		interface Packet;
+		interface Ieee154Packet;
+		interface Resource as SendResource[uint8_t clint];
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+		interface PacketLink;
+		interface RadioChannel;
+
+		interface PacketTimeStamp<TMicro, uint32_t> as PacketTimeStampMicro;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	components RF230Ieee154MessageC as MessageC;
+
+	SplitControl = MessageC;
+
+	Ieee154Send = MessageC;
+	Ieee154Receive = MessageC;
+	SendNotifier = MessageC;
+
+	Packet = MessageC;
+	Ieee154Packet = MessageC;
+	SendResource = MessageC;
+
+	PacketAcknowledgements = MessageC;
+	LowPowerListening = MessageC;
+	PacketLink = MessageC;
+	RadioChannel = MessageC;
+
+	PacketTimeStampMilli = MessageC;
+	PacketTimeStampMicro = MessageC;
+}
diff --git a/tos/platforms/iris/LocalTimeMicroC.nc b/tos/platforms/iris/LocalTimeMicroC.nc
new file mode 100644
index 00000000..4f8863f9
--- /dev/null
+++ b/tos/platforms/iris/LocalTimeMicroC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2008, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include "Timer.h"
+
+configuration LocalTimeMicroC
+{
+	provides interface LocalTime<TMicro>;
+}
+
+implementation
+{
+	components CounterOne16C;
+	components new TransformCounterC(TMicro, uint32_t, TMicro, uint16_t, 0, uint32_t);
+	components new CounterToLocalTimeC(TMicro);
+
+	LocalTime = CounterToLocalTimeC;
+	CounterToLocalTimeC.Counter -> TransformCounterC;
+	TransformCounterC.CounterFrom -> CounterOne16C;
+}
diff --git a/tos/platforms/iris/MeasureClockC.nc b/tos/platforms/iris/MeasureClockC.nc
new file mode 100644
index 00000000..17576130
--- /dev/null
+++ b/tos/platforms/iris/MeasureClockC.nc
@@ -0,0 +1,158 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <MicaTimer.h>
+#include <scale.h>
+
+/**
+ * Measure cpu clock frequency at boot time. Provides an Atm128Calibrate
+ * interface so that other components can adjust their calibration as
+ * needed.
+ *
+ * @author David Gay
+ * @author Janos Sallai
+ */
+
+module MeasureClockC {
+  provides {
+    /**
+     * This code MUST be called from PlatformP only, hence the exactlyonce.
+     */
+    interface Init @exactlyonce();
+    interface Atm128Calibrate;
+  }
+}
+implementation 
+{
+  enum {
+    /* This is expected number of cycles per jiffy at the platform's
+       specified MHz. Assumes PLATFORM_MHZ == 1, 2, 4, 8 or 16. */
+    MAGIC = 488 / (16 / PLATFORM_MHZ)
+  };
+
+  uint16_t cycles;
+
+  command error_t Init.init() {
+    /* Measure clock cycles per Jiffy (1/32768s) */
+    /* This code doesn't use the HPL to avoid timing issues when compiling
+       with debugging on */
+    atomic
+      {
+	uint8_t now, wraps;
+	uint16_t start;
+
+	/* Setup timer2 to count 32 jiffies, and timer1 cpu cycles */
+	TCCR1B = 1 << CS10;
+	ASSR = 1 << AS2;
+	TCCR2B = 1 << CS21 | 1 << CS20;
+
+	/* Wait for 1s for counter to stablilize after power-up (yes, it
+	   really does take that long). That's 122 wrap arounds of timer 1
+	   at 8MHz. */
+	start = TCNT1;
+	for (wraps = MAGIC / 2; wraps; )
+	  {
+	    uint16_t next = TCNT1;
+
+	    if (next < start)
+	      wraps--;
+	    start = next;
+	  }
+
+	/* Wait for a TCNT0 change */
+	now = TCNT2;
+	while (TCNT2 == now) ;
+
+	/* Read cpu cycles and wait for next TCNT2 change */
+	start = TCNT1;
+	now = TCNT2;
+	while (TCNT2 == now) ;
+	cycles = TCNT1;
+
+	cycles = (cycles - start + 16) >> 5;
+
+	/* Reset to boot state */
+	ASSR = TCCR1B = TCCR2B = 0;
+	TCNT2 = 0;
+	TCNT1 = 0;
+	TIFR1 = TIFR2 = 0xff;
+	while (ASSR & (1 << TCN2UB | 1 << OCR2BUB | 1 << TCR2BUB))
+	  ;
+      }
+    return SUCCESS;
+  }
+
+  async command uint16_t Atm128Calibrate.cyclesPerJiffy() {
+    return cycles;
+  }
+
+  async command uint32_t Atm128Calibrate.calibrateMicro(uint32_t n) {
+    return scale32(n + MAGIC / 2, cycles, MAGIC);
+  }
+
+  async command uint32_t Atm128Calibrate.actualMicro(uint32_t n) {
+    return scale32(n + (cycles >> 1), MAGIC, cycles);
+  }
+
+  async command uint8_t Atm128Calibrate.adcPrescaler() {
+    /* This is also log2(cycles/3.05). But that's a pain to compute */
+    if (cycles >= 390)
+      return ATM128_ADC_PRESCALE_128;
+    if (cycles >= 195)
+      return ATM128_ADC_PRESCALE_64;
+    if (cycles >= 97)
+      return ATM128_ADC_PRESCALE_32;
+    if (cycles >= 48)
+      return ATM128_ADC_PRESCALE_16;
+    if (cycles >= 24)
+      return ATM128_ADC_PRESCALE_8;
+    if (cycles >= 12)
+      return ATM128_ADC_PRESCALE_4;
+    return ATM128_ADC_PRESCALE_2;
+  }
+
+  async command uint16_t Atm128Calibrate.baudrateRegister(uint32_t baudrate) {
+    // value is (cycles*32768) / (8*baudrate) - 1
+    return ((uint32_t)cycles << 12) / baudrate - 1;
+  }
+}
diff --git a/tos/platforms/iris/MicaTimer.h b/tos/platforms/iris/MicaTimer.h
new file mode 100644
index 00000000..849218b8
--- /dev/null
+++ b/tos/platforms/iris/MicaTimer.h
@@ -0,0 +1,178 @@
+// $Id: MicaTimer.h,v 1.3 2010-06-29 22:07:53 scipio Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef MICATIMER_H
+#define MICATIMER_H
+
+/* This file defines the rates at which the mica family's atmega1281 timer 1
+   and 3 timers run at. The goal is to present the user with microsend and
+   32khz timers, but it may not be possible to run the timers at these rates
+   (because of the limited prescaler selection).
+
+   So TinyOS picks a prescaler (based on the selected processor MHz) for
+   each of these timers, and builds corresponding 16-bit alarms&counters
+   (AlarmOne16C, AlarmThree16C, CounterOne16C, CounterThree16C) over
+   hardware timers 1 and 3. TinyOS then divides these hardware timers by
+   the appropriate power of 2 to get approximate 32-bit 32kHz and 1MHz
+   alarms and counters (Alarm32khz32C, AlarmMicro32C, Counter32khz32C,
+   CounterMicro32C).
+
+   The constants and typedefs for all this configuration are defined here,
+   based on the value of the MHZ preprocessor symbol, which shoud approximate
+   the platform's MHZ rate.
+
+   Note that the timers thus obtained will not be exactly at 32768Hz or
+   1MHz, because the clock doesn't divide by a power of two to those
+   frequencies, and/or the clock frequency is not accurate. If you need
+   more accurate timing, you should use the calibration functions
+   offered by the Atm128Calibrate interface provided by PlatformC.
+
+   This file also defines EXT_STANDBY_T0_THRESHOLD, a threshold on
+   remaining time till the next timer 0 interrupt under which the mote
+   should sleep in ext standby rather than power save. This is only
+   important when not using the internal oscillator.  Wake up from power
+   save takes 65536 cycles (6 cycles for ext standby), which is, e.g.,
+   ~9.4ms at 7Mhz.
+*/
+
+#include <Timer.h>
+#include <Atm128Timer.h>
+
+/* Some types for the non-standard rates that mica timers might be running
+   at.
+ */
+typedef struct { } T64khz;
+typedef struct { } T128khz;
+typedef struct { } T2mhz;
+typedef struct { } T4mhz;
+
+/* TX is the typedef for the rate of timer X, 
+   MICA_PRESCALER_X is the prescaler for timer X,
+   MICA_DIVIDER_X_FOR_Y_LOG2 is the number of bits to shift timer X by
+     to get rate Y,
+   counter_X_overflow_t is uint16_t if MICA_DIVIDER_X_FOR_Y_LOG2 is 0,
+     uint32_t otherwise.
+*/
+
+#if MHZ == 1
+typedef T128khz TOne;
+typedef TMicro TThree;
+typedef uint32_t counter_one_overflow_t;
+typedef uint16_t counter_three_overflow_t;
+
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_8,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 2,
+  MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0,
+  EXT_STANDBY_T0_THRESHOLD = 80,
+};
+
+#elif MHZ == 2
+typedef T32khz TOne;
+typedef T2mhz TThree;
+typedef uint16_t counter_one_overflow_t;
+typedef uint32_t counter_three_overflow_t;
+
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_64,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 0,
+  MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 1,
+  EXT_STANDBY_T0_THRESHOLD = 40
+};
+
+#elif MHZ == 4
+typedef T64khz TOne;
+typedef T4mhz TThree;
+typedef uint32_t counter_one_overflow_t;
+typedef uint32_t counter_three_overflow_t;
+
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_64,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 1,
+  MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 2,
+  EXT_STANDBY_T0_THRESHOLD = 24
+};
+
+#elif MHZ == 8
+/*
+typedef T32khz TOne;
+typedef TMicro TThree;
+typedef uint16_t counter_one_overflow_t;
+typedef uint16_t counter_three_overflow_t;
+
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_256,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 0,
+  MICA_PRESCALER_THREE = ATM128_CLK16_DIVIDE_8,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0,
+  EXT_STANDBY_T0_THRESHOLD = 12
+};
+*/
+
+// get a 1MHz (1 microsecond resolution) timer for debugging purposes
+
+typedef TMicro TOne;
+typedef TMicro TThree;
+typedef uint32_t counter_one_overflow_t;
+typedef uint16_t counter_three_overflow_t;
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_8,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 5,
+  MICA_PRESCALER_THREE = ATM128_CLK16_DIVIDE_8,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0,
+  EXT_STANDBY_T0_THRESHOLD = 12,
+};
+
+#else
+#error "Unknown clock rate. MHZ must be defined to one of 1, 2, 4, or 8."
+#endif
+
+enum {
+  PLATFORM_MHZ = MHZ
+};
+
+#endif
diff --git a/tos/platforms/iris/TimeSyncMessageC.nc b/tos/platforms/iris/TimeSyncMessageC.nc
new file mode 100644
index 00000000..da4c383c
--- /dev/null
+++ b/tos/platforms/iris/TimeSyncMessageC.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+configuration TimeSyncMessageC
+{
+	provides
+	{
+		interface SplitControl;
+
+		interface Receive[uint8_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface Packet;
+		interface AMPacket;
+
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface TimeSyncAMSend<TRadio, uint32_t> as TimeSyncAMSendRadio[am_id_t id];
+		interface TimeSyncPacket<TRadio, uint32_t> as TimeSyncPacketRadio;
+
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+		interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+		interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+	}
+}
+
+implementation
+{
+	components RF230TimeSyncMessageC as MessageC;
+  
+	SplitControl	= MessageC;
+  	Receive		= MessageC.Receive;
+	Snoop		= MessageC.Snoop;
+	Packet		= MessageC;
+	AMPacket	= MessageC;
+
+	PacketTimeStampRadio	= MessageC;
+	TimeSyncAMSendRadio	= MessageC;
+	TimeSyncPacketRadio	= MessageC;
+
+	PacketTimeStampMilli	= MessageC;
+	TimeSyncAMSendMilli	= MessageC;
+	TimeSyncPacketMilli	= MessageC;
+}
diff --git a/tos/platforms/iris/chips/at45db/HplAt45dbIOC.nc b/tos/platforms/iris/chips/at45db/HplAt45dbIOC.nc
new file mode 100644
index 00000000..5c49283f
--- /dev/null
+++ b/tos/platforms/iris/chips/at45db/HplAt45dbIOC.nc
@@ -0,0 +1,75 @@
+// $Id: HplAt45dbIOC.nc,v 1.2 2010-06-29 22:07:53 scipio Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+/**
+ * Low-level access functions for the AT45DB flash on the mica2 and micaz.
+ *
+ * @author David Gay
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+configuration HplAt45dbIOC {
+  provides {
+    interface Resource;
+    interface SpiByte as FlashSpi;
+    interface HplAt45dbByte;
+  }
+}
+implementation {
+  // Wire up byte I/O to At45db
+  components HplAt45dbIOP, HplAtm128GeneralIOC as Pins, PlatformC;
+  components BusyWaitMicroC;
+  components new NoArbiterC();
+
+  Resource = NoArbiterC;
+  FlashSpi = HplAt45dbIOP;
+  HplAt45dbByte = HplAt45dbIOP;
+
+  PlatformC.SubInit -> HplAt45dbIOP;
+  HplAt45dbIOP.Select -> Pins.PortA3;
+  HplAt45dbIOP.Clk -> Pins.PortD5;
+  HplAt45dbIOP.In -> Pins.PortD2;
+  HplAt45dbIOP.Out -> Pins.PortD3;
+  HplAt45dbIOP.BusyWait -> BusyWaitMicroC;
+}
diff --git a/tos/platforms/iris/chips/at45db/HplAt45dbIOP.nc b/tos/platforms/iris/chips/at45db/HplAt45dbIOP.nc
new file mode 100644
index 00000000..6c168cf8
--- /dev/null
+++ b/tos/platforms/iris/chips/at45db/HplAt45dbIOP.nc
@@ -0,0 +1,191 @@
+// $Id: HplAt45dbIOP.nc,v 1.3 2010-06-29 22:07:53 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Low level hardware access to the onboard AT45DB flash chip.
+ * <p>
+ * Note: This component includes optimised bit-banging SPI code with the
+ * pins hardwired.  Don't copy it to some other platform without
+ * understanding it (see txByte).
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ * @author Janos Sallai <janos.sallai@vanderbilt.edu>
+ */
+
+#include "Timer.h"
+
+module HplAt45dbIOP {
+  provides {
+    interface Init;
+    interface SpiByte as FlashSpi;
+    interface HplAt45dbByte;
+  }
+  uses {
+    interface GeneralIO as Select;
+    interface GeneralIO as Clk;
+    interface GeneralIO as Out;
+    interface GeneralIO as In;
+    interface BusyWait<TMicro, uint16_t>;
+  }
+}
+implementation
+{
+  // We use SPI mode 0 (clock low at select time)
+
+  command error_t Init.init() {
+    call Select.makeOutput();
+    call Select.set();
+    call Clk.clr();
+    call Clk.makeOutput();
+    call Out.set();
+    call Out.makeOutput();
+    call In.clr();
+    call In.makeInput();
+    return SUCCESS;
+  }
+
+  command void HplAt45dbByte.select() {
+    call Clk.clr(); // ensure SPI mode 0
+    call Select.clr();
+  }
+
+  command void HplAt45dbByte.deselect() {
+    call Select.set();
+  }
+
+#define BITINIT \
+  uint8_t clrClkAndData = PORTD & ~0x28
+
+#define BIT(n) \
+	PORTD = clrClkAndData; \
+	asm __volatile__ \
+        (  "sbrc %2," #n "\n" \
+	 "\tsbi 11,3\n" \
+	 "\tsbi 11,5\n" \
+	 "\tsbic 9,2\n" \
+	 "\tori %0,1<<" #n "\n" \
+	 : "=d" (spiIn) : "0" (spiIn), "r" (spiOut))
+
+  async command uint8_t FlashSpi.write(uint8_t spiOut) {
+    uint8_t spiIn = 0;
+
+    // This atomic ensures integrity at the hardware level...
+    atomic
+      {
+	BITINIT;
+
+	BIT(7);
+	BIT(6);
+	BIT(5);
+	BIT(4);
+	BIT(3);
+	BIT(2);
+	BIT(1);
+	BIT(0);
+      }
+
+    return spiIn;
+  }
+
+  task void avail() {
+    signal HplAt45dbByte.idle();
+  }
+
+  command void HplAt45dbByte.waitIdle() {
+    // at45db041 rev d fix by handsomezhu hongsong at ios.cn
+    // http://mail.millennium.berkeley.edu/pipermail/tinyos-help/2008-January/030255.html
+    int i;
+    call Clk.clr();
+    call BusyWait.wait(2);
+    while( ! call In.get() ) {
+      for( i=0; i < 8; i ++ ) {
+        call Clk.set();
+        call Clk.clr();
+        call BusyWait.wait(2);
+      }
+    }
+    post avail();
+  }
+
+  command bool HplAt45dbByte.getCompareStatus() {
+    call Clk.set();
+    call Clk.clr();
+    // Wait for compare value to propagate
+    asm volatile("nop");
+    asm volatile("nop");
+    return !call In.get();
+  }
+}
diff --git a/tos/platforms/iris/chips/ds2401/PlatformIeeeEui64.h b/tos/platforms/iris/chips/ds2401/PlatformIeeeEui64.h
new file mode 100644
index 00000000..fb82212e
--- /dev/null
+++ b/tos/platforms/iris/chips/ds2401/PlatformIeeeEui64.h
@@ -0,0 +1,52 @@
+// $Id: PlatformIeeeEui64.h,v 1.2 2010-06-29 22:07:53 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */
+
+#ifndef PLATFORMIEEEEUI64_H
+#define PLATFORMIEEEEUI64_H
+
+/* For now, let us set the company ID to 'X' 'B' 'W', and the first two bytes
+ * of the serial ID to 'I' 'R'. The last three bytes of the serial ID are read
+ * from the DS2401 chip.
+ */
+ 
+enum {
+  IEEE_EUI64_COMPANY_ID_0 = 'X',
+  IEEE_EUI64_COMPANY_ID_1 = 'B',
+  IEEE_EUI64_COMPANY_ID_2 = 'W',
+  IEEE_EUI64_SERIAL_ID_0 = 'I',
+  IEEE_EUI64_SERIAL_ID_1 = 'R',
+};
+
+#endif // PLATFORMIEEEEUI64_H
diff --git a/tos/platforms/iris/chips/rf230/HplRF230C.nc b/tos/platforms/iris/chips/rf230/HplRF230C.nc
new file mode 100644
index 00000000..5f75f7f7
--- /dev/null
+++ b/tos/platforms/iris/chips/rf230/HplRF230C.nc
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+configuration HplRF230C
+{
+	provides
+	{
+		interface GeneralIO as SELN;
+		interface Resource as SpiResource;
+		interface FastSpiByte;
+
+		interface GeneralIO as SLP_TR;
+		interface GeneralIO as RSTN;
+
+		interface GpioCapture as IRQ;
+		interface Alarm<TRadio, uint16_t> as Alarm;
+		interface LocalTime<TRadio> as LocalTimeRadio;
+	}
+}
+
+implementation
+{
+	components HplRF230P;
+	IRQ = HplRF230P.IRQ;
+
+	HplRF230P.PortCLKM -> IO.PortD6;
+	HplRF230P.PortIRQ -> IO.PortD4;
+	
+	components Atm128SpiC as SpiC;
+	SpiResource = SpiC.Resource[unique("Atm128SpiC.Resource")];
+	FastSpiByte = SpiC;
+
+	components HplAtm128GeneralIOC as IO;
+	SLP_TR = IO.PortB7;
+	RSTN = IO.PortA6;
+	SELN = IO.PortB0;
+
+	components HplAtm128Timer1C as TimerC;
+	HplRF230P.Capture -> TimerC.Capture;
+
+	components new AlarmOne16C() as AlarmC;
+	Alarm = AlarmC;
+
+	components RealMainP;
+	RealMainP.PlatformInit -> HplRF230P.PlatformInit;
+
+	components LocalTimeMicroC;
+	LocalTimeRadio = LocalTimeMicroC;
+}
diff --git a/tos/platforms/iris/chips/rf230/HplRF230P.nc b/tos/platforms/iris/chips/rf230/HplRF230P.nc
new file mode 100644
index 00000000..08e32037
--- /dev/null
+++ b/tos/platforms/iris/chips/rf230/HplRF230P.nc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+module HplRF230P
+{
+	provides
+	{
+		interface GpioCapture as IRQ;
+		interface Init as PlatformInit;
+	}
+
+	uses
+	{
+		interface HplAtm128Capture<uint16_t> as Capture;
+		interface GeneralIO as PortCLKM;
+		interface GeneralIO as PortIRQ;
+	}
+}
+
+implementation
+{
+	command error_t PlatformInit.init()
+	{
+		call PortCLKM.makeInput();
+		call PortCLKM.clr();
+		call PortIRQ.makeInput();
+		call PortIRQ.clr();
+		call Capture.stop();
+
+		return SUCCESS;
+	}
+
+	async event void Capture.captured(uint16_t time)
+	{
+		time = call Capture.get();	// TODO: ask Cory why time is not the captured time
+		signal IRQ.captured(time);
+	}
+
+	default async event void IRQ.captured(uint16_t time)
+	{
+	}
+
+	async command error_t IRQ.captureRisingEdge()
+	{
+		call Capture.setEdge(TRUE);
+		call Capture.reset();
+		call Capture.start();
+	
+		return SUCCESS;
+	}
+
+	async command error_t IRQ.captureFallingEdge()
+	{
+		// falling edge comes when the IRQ_STATUS register of the RF230 is read
+		return FAIL;	
+	}
+
+	async command void IRQ.disable()
+	{
+		call Capture.stop();
+	}
+}
diff --git a/tos/platforms/iris/chips/rf230/RadioConfig.h b/tos/platforms/iris/chips/rf230/RadioConfig.h
new file mode 100644
index 00000000..5ae9ccc7
--- /dev/null
+++ b/tos/platforms/iris/chips/rf230/RadioConfig.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#ifndef __RADIOCONFIG_H__
+#define __RADIOCONFIG_H__
+
+#include <MicaTimer.h>
+#include <RF230DriverLayer.h>
+#include <util/crc16.h>
+
+enum
+{
+	/**
+	 * This is the value of the TRX_CTRL_0 register
+	 * which configures the output pin currents and the CLKM clock
+	 */
+	RF230_TRX_CTRL_0_VALUE = 0,
+
+	/**
+	 * This is the default value of the CCA_MODE field in the PHY_CC_CCA register
+	 * which is used to configure the default mode of the clear channel assesment
+	 */
+	RF230_CCA_MODE_VALUE = RF230_CCA_MODE_3,
+
+	/**
+	 * This is the value of the CCA_THRES register that controls the
+	 * energy levels used for clear channel assesment
+	 */
+	RF230_CCA_THRES_VALUE = 0xC7,
+};
+
+/* This is the default value of the TX_PWR field of the PHY_TX_PWR register. */
+#ifndef RF230_DEF_RFPOWER
+#define RF230_DEF_RFPOWER	0
+#endif
+
+/* This is the default value of the CHANNEL field of the PHY_CC_CCA register. */
+#ifndef RF230_DEF_CHANNEL
+#define RF230_DEF_CHANNEL	11
+#endif
+
+/* The number of microseconds a sending IRIS mote will wait for an acknowledgement */
+#ifndef SOFTWAREACK_TIMEOUT
+#define SOFTWAREACK_TIMEOUT	1000
+#endif
+
+/*
+ * This is the command used to calculate the CRC for the RF230 chip. 
+ * TODO: Check why the default crcByte implementation is in a different endianness
+ */
+inline uint16_t RF230_CRCBYTE_COMMAND(uint16_t crc, uint8_t data)
+{
+	return _crc_ccitt_update(crc, data);
+}
+
+/**
+ * This is the timer type of the radio alarm interface
+ */
+typedef TOne TRadio;
+typedef uint16_t tradio_size;
+
+/**
+ * The number of radio alarm ticks per one microsecond (0.9216). 
+ * We use integers and no parentheses just to make deputy happy.
+ * Ok, further hacks were required for deputy, I removed 00 from the
+ * beginning and end to ba able to handle longer wait periods.
+ */
+#define RADIO_ALARM_MICROSEC	(73728UL / MHZ / 32) * (1 << MICA_DIVIDE_ONE_FOR_32KHZ_LOG2) / 10000UL
+
+/**
+ * The base two logarithm of the number of radio alarm ticks per one millisecond
+ */
+#define RADIO_ALARM_MILLI_EXP	(5 + MICA_DIVIDE_ONE_FOR_32KHZ_LOG2)
+
+#endif//__RADIOCONFIG_H__
diff --git a/tos/platforms/iris/platform.h b/tos/platforms/iris/platform.h
new file mode 100644
index 00000000..e4aeef29
--- /dev/null
+++ b/tos/platforms/iris/platform.h
@@ -0,0 +1,2 @@
+#include <avr/wdt.h>
+#define platform_bootstrap() { MCUSR=0; wdt_disable(); }
diff --git a/tos/platforms/iris/platform_message.h b/tos/platforms/iris/platform_message.h
new file mode 100644
index 00000000..4f56f97b
--- /dev/null
+++ b/tos/platforms/iris/platform_message.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include <RF230Radio.h>
+#include <Serial.h>
+
+typedef union message_header {
+	rf230packet_header_t rf230;
+	serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+	rf230packet_footer_t rf230;
+} message_footer_t;
+
+typedef union message_metadata {
+	rf230packet_metadata_t rf230;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/iris/sim/.platform b/tos/platforms/iris/sim/.platform
new file mode 100644
index 00000000..22dbab9b
--- /dev/null
+++ b/tos/platforms/iris/sim/.platform
@@ -0,0 +1,38 @@
+#
+# FILE: iris/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  And because of that, the current platform's include directory
+# must be specified, otherwise its search order is last instead of first.
+#
+#
+push( @includes, qw(
+
+  %T/platforms/iris
+  %T/platforms/micaz
+  %T/platforms/mica
+  %T/platforms/micaz/chips/cc2420
+  %T/chips/cc2420
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/timer
+  %T/lib/power
+  %T/lib/timer
+  %T/lib/serial
+
+) );
+
+@opts = qw(
+
+  -gcc=gcc
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+);
+
+push @opts, "-mingw-gcc" if $cygwin;
+
diff --git a/tos/platforms/mica/Alarm32khz32C.nc b/tos/platforms/mica/Alarm32khz32C.nc
new file mode 100644
index 00000000..f27b32dd
--- /dev/null
+++ b/tos/platforms/mica/Alarm32khz32C.nc
@@ -0,0 +1,39 @@
+// $Id: Alarm32khz32C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 32-bit 32kHz Alarm component as per TEP102 HAL guidelines. The mica
+ * family 32kHz Alarm is built on hardware timer 1, and actually runs at
+ * CPU frequency / 256. You can use the MeasureClockC.cyclesPerJiffy()
+ * command to figure out the exact frequency.
+ * <p>
+ * Upto three of these alarms can be created (one per hardware compare
+ * register). Note that creating one of these Alarms consumes a 16-bit
+ * 32kHz Alarm (see Alarm32khz16C).
+ *
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+#include <MicaTimer.h>
+
+generic configuration Alarm32khz32C()
+{
+  provides interface Alarm<T32khz, uint32_t>;
+}
+implementation
+{
+  components new AlarmOne16C() as Alarm16, Counter32khz32C as Counter32,
+    new TransformAlarmC(T32khz, uint32_t, TOne, uint16_t,
+			MICA_DIVIDE_ONE_FOR_32KHZ_LOG2) as Transform32;
+
+  Alarm = Transform32;
+  Transform32.AlarmFrom -> Alarm16;
+  Transform32.Counter -> Counter32;
+}
diff --git a/tos/platforms/mica/AlarmCounterMilliP.nc b/tos/platforms/mica/AlarmCounterMilliP.nc
new file mode 100644
index 00000000..599a0f6d
--- /dev/null
+++ b/tos/platforms/mica/AlarmCounterMilliP.nc
@@ -0,0 +1,38 @@
+// $Id: AlarmCounterMilliP.nc,v 1.7 2007-07-06 17:33:22 scipio Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Configure hardware timer 0 for use as the mica family's millisecond
+ * timer.  This component does not follow the TEP102 HAL guidelines as
+ * there is only one compare register for timer 0, which is used to
+ * implement HilTimerMilliC. Hence it isn't useful to expose an
+ * AlarmMilliC or CounterMillIC component.
+ * 
+ * @author David Gay <dgay@intel-research.net>
+ * @author Martin Turon <mturon@xbow.com>
+ */
+#include <Atm128Timer.h>
+
+#include <Atm128Timer.h>
+
+configuration AlarmCounterMilliP
+{
+  provides interface Init;
+  provides interface Alarm<TMilli, uint32_t> as AlarmMilli32;
+  provides interface Counter<TMilli, uint32_t> as CounterMilli32;
+}
+implementation
+{
+  components new Atm128AlarmAsyncC(TMilli, ATM128_CLK8_DIVIDE_32);
+
+  Init = Atm128AlarmAsyncC;
+  AlarmMilli32 = Atm128AlarmAsyncC;
+  CounterMilli32 = Atm128AlarmAsyncC;
+}
diff --git a/tos/platforms/mica/AlarmMicro32C.nc b/tos/platforms/mica/AlarmMicro32C.nc
new file mode 100644
index 00000000..4b89f4e4
--- /dev/null
+++ b/tos/platforms/mica/AlarmMicro32C.nc
@@ -0,0 +1,41 @@
+// $Id: AlarmMicro32C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 32-bit microsecond Alarm component as per TEP102 HAL guidelines. The
+ * mica family microsecond Alarm is built on hardware timer 3, and actually
+ * runs at CPU frequency / 8. You can use the MeasureClockC.cyclesPerJiffy() 
+ * command to figure out the exact frequency, or the 
+ * MeasureClockC.calibrateMicro() command to convert a number of microseconds
+ * to the near-microsecond units used by this component.
+ * <p>
+ * Upto three of these alarms can be created (one per hardware compare
+ * register). Note that creating one of these Alarms consumes a 16-bit
+ * microsecond Alarm (see AlarmMicro16C).
+ *
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+#include <MicaTimer.h>
+
+generic configuration AlarmMicro32C()
+{
+  provides interface Alarm<TMicro, uint32_t>;
+}
+implementation
+{
+  components new AlarmThree16C() as Alarm16, CounterMicro32C as Counter32,
+    new TransformAlarmC(TMicro, uint32_t, TThree, uint16_t,
+			MICA_DIVIDE_THREE_FOR_MICRO_LOG2) as Transform32;
+
+  Alarm = Transform32;
+  Transform32.AlarmFrom -> Alarm16;
+  Transform32.Counter -> Counter32;
+}
diff --git a/tos/platforms/mica/AlarmOne16C.nc b/tos/platforms/mica/AlarmOne16C.nc
new file mode 100644
index 00000000..2fd0f2a9
--- /dev/null
+++ b/tos/platforms/mica/AlarmOne16C.nc
@@ -0,0 +1,45 @@
+// $Id: AlarmOne16C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 16-bit 32kHz Alarm component as per TEP102 HAL guidelines. The mica
+ * family 32kHz Alarm is built on hardware timer 1, and actually runs at
+ * CPU frequency / 256. You can use the MeasureClockC.cyclesPerJiffy()
+ * command to figure out the exact frequency.
+ * <p>
+ * Assumes an ~8MHz CPU clock, replace this component if you are running at
+ * a radically different frequency.
+ * <p>
+ * Upto three of these alarms can be created (one per hardware compare
+ * register).
+ *
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+#include <MicaTimer.h>
+
+generic configuration AlarmOne16C()
+{
+  provides interface Alarm<TOne, uint16_t>;
+}
+implementation
+{
+  components HplAtm128Timer1C as HWTimer, InitOneP,
+    new Atm128AlarmC(TOne, uint16_t, 3) as NAlarm;
+  
+  enum {
+    COMPARE_ID = unique(UQ_TIMER1_COMPARE)
+  };
+
+  Alarm = NAlarm;
+
+  NAlarm.HplAtm128Timer -> HWTimer.Timer;
+  NAlarm.HplAtm128Compare -> HWTimer.Compare[COMPARE_ID];
+}
diff --git a/tos/platforms/mica/AlarmThree16C.nc b/tos/platforms/mica/AlarmThree16C.nc
new file mode 100644
index 00000000..d5fc44c9
--- /dev/null
+++ b/tos/platforms/mica/AlarmThree16C.nc
@@ -0,0 +1,47 @@
+// $Id: AlarmThree16C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 16-bit microsecond Alarm component as per TEP102 HAL guidelines. The
+ * mica family microsecond Alarm is built on hardware timer 3, and actually
+ * runs at CPU frequency / 8. You can use the MeasureClockC.cyclesPerJiffy() 
+ * command to figure out the exact frequency, or the 
+ * MeasureClockC.calibrateMicro() command to convert a number of microseconds
+ * to the near-microsecond units used by this component.
+ * <p>
+ * Assumes an ~8MHz CPU clock, replace this component if you are running at
+ * a radically different frequency.
+ * <p>
+ * Upto three of these alarms can be created (one per hardware compare
+ * register). 
+ *
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+#include <MicaTimer.h>
+
+generic configuration AlarmThree16C()
+{
+  provides interface Alarm<TThree, uint16_t>;
+}
+implementation
+{
+  components HplAtm128Timer3C as HWTimer, InitThreeP,
+    new Atm128AlarmC(TThree, uint16_t, 100) as NAlarm;
+  
+  enum {
+    COMPARE_ID = unique(UQ_TIMER3_COMPARE)
+  };
+
+  Alarm = NAlarm;
+
+  NAlarm.HplAtm128Timer -> HWTimer.Timer;
+  NAlarm.HplAtm128Compare -> HWTimer.Compare[COMPARE_ID];
+}
diff --git a/tos/platforms/mica/BusyWaitMicroC.nc b/tos/platforms/mica/BusyWaitMicroC.nc
new file mode 100644
index 00000000..e9db1e7a
--- /dev/null
+++ b/tos/platforms/mica/BusyWaitMicroC.nc
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Busy wait component as per TEP102. Supports waiting for at least some
+ * number of microseconds. This functionality should be used sparingly,
+ * when the overhead of posting a Timer or Alarm is greater than simply
+ * busy waiting.
+ *
+ * @author David Gay
+ */
+
+module BusyWaitMicroC @safe()
+{
+  provides interface BusyWait<TMicro,uint16_t>;
+}
+implementation
+{
+  inline async command void BusyWait.wait(uint16_t dt) {
+  /* In most cases (constant arg), the test is elided at compile-time */
+  if (dt)
+#if MHZ == 1
+    {
+      dt = (dt + 3) >> 2;
+    /* loop takes 4 cycles. */
+      asm volatile (
+"1:	sbiw	%0,1\n"
+"	brne	1b" : "+w" (dt));
+    }
+#elif MHZ == 2
+    {
+      dt = (dt + 1) >> 1;
+    /* loop takes 4 cycles. */
+      asm volatile (
+"1:	sbiw	%0,1\n"
+"	brne	1b" : "+w" (dt));
+    }
+#elif MHZ == 4
+    /* loop takes 4 cycles. */
+    asm volatile (
+"1:	sbiw	%0,1\n"
+"	brne	1b" : "+w" (dt));
+#elif MHZ == 8
+    /* loop takes 8 cycles. this is 1uS if running on an internal 8MHz
+       clock, and 1.09uS if running on the external crystal. */
+    asm volatile (
+"1:	sbiw	%0,1\n"
+"	adiw	%0,1\n"
+"	sbiw	%0,1\n"
+"	brne	1b" : "+w" (dt));
+#else
+#error "Unknown clock rate. MHZ must be defined to one of 1, 2, 4, or 8."
+#endif
+  }
+}
diff --git a/tos/platforms/mica/Counter32khz32C.nc b/tos/platforms/mica/Counter32khz32C.nc
new file mode 100644
index 00000000..4c9011e1
--- /dev/null
+++ b/tos/platforms/mica/Counter32khz32C.nc
@@ -0,0 +1,35 @@
+// $Id: Counter32khz32C.nc,v 1.5 2008-09-01 17:44:02 devdj Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 32-bit 32kHz Counter component as per TEP102 HAL guidelines. The mica
+ * family 32kHz clock is built on hardware timer 1, and actually runs at
+ * CPU frequency / 256. You can use the MeasureClockC.cyclesPerJiffy()
+ * command to figure out the exact frequency.
+ *
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+#include <MicaTimer.h>
+
+configuration Counter32khz32C
+{
+  provides interface Counter<T32khz, uint32_t>;
+}
+implementation
+{
+  components CounterOne16C as Counter16, 
+    new TransformCounterC(T32khz, uint32_t, TOne, uint16_t,
+			  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2,
+			  counter_one_overflow_t) as Transform32;
+
+  Counter = Transform32;
+  Transform32.CounterFrom -> Counter16;
+}
diff --git a/tos/platforms/mica/CounterMicro32C.nc b/tos/platforms/mica/CounterMicro32C.nc
new file mode 100644
index 00000000..1f7fa958
--- /dev/null
+++ b/tos/platforms/mica/CounterMicro32C.nc
@@ -0,0 +1,35 @@
+// $Id: CounterMicro32C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 32-bit microsecond Counter component as per TEP102 HAL guidelines. The
+ * mica family microsecond clock is built on hardware timer 3, and actually
+ * runs at CPU frequency / 8. You can use the MeasureClockC.cyclesPerJiffy() 
+ * command to figure out the exact frequency.
+ *
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+#include <MicaTimer.h>
+
+configuration CounterMicro32C
+{
+  provides interface Counter<TMicro, uint32_t>;
+}
+implementation
+{
+  components CounterThree16C as Counter16, 
+    new TransformCounterC(TMicro, uint32_t, TThree, uint16_t,
+			  MICA_DIVIDE_THREE_FOR_MICRO_LOG2,
+			  counter_three_overflow_t) as Transform32;
+
+  Counter = Transform32;
+  Transform32.CounterFrom -> Counter16;
+}
diff --git a/tos/platforms/mica/CounterOne16C.nc b/tos/platforms/mica/CounterOne16C.nc
new file mode 100644
index 00000000..2ed33922
--- /dev/null
+++ b/tos/platforms/mica/CounterOne16C.nc
@@ -0,0 +1,33 @@
+// $Id: CounterOne16C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 16-bit 32kHz Counter component as per TEP102 HAL guidelines. The mica
+ * family 32kHz clock is built on hardware timer 1, and actually runs at
+ * CPU frequency / 256. You can use the MeasureClockC.cyclesPerJiffy()
+ * command to figure out the exact frequency.
+ *
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+#include <MicaTimer.h>
+
+configuration CounterOne16C
+{
+  provides interface Counter<TOne, uint16_t>;
+}
+implementation
+{
+  components HplAtm128Timer1C as HWTimer, InitOneP,
+    new Atm128CounterC(TOne, uint16_t) as NCounter;
+  
+  Counter = NCounter;
+  NCounter.Timer -> HWTimer;
+}
diff --git a/tos/platforms/mica/CounterThree16C.nc b/tos/platforms/mica/CounterThree16C.nc
new file mode 100644
index 00000000..3e63b038
--- /dev/null
+++ b/tos/platforms/mica/CounterThree16C.nc
@@ -0,0 +1,33 @@
+// $Id: CounterThree16C.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 16-bit microsecond Counter component as per TEP102 HAL guidelines. The
+ * mica family microsecond clock is built on hardware timer 3, and actually
+ * runs at CPU frequency / 8. You can use the MeasureClockC.cyclesPerJiffy() 
+ * command to figure out the exact frequency.
+ *
+ * @author David Gay <dgay@intel-research.net>
+ */
+
+#include <MicaTimer.h>
+
+configuration CounterThree16C
+{
+  provides interface Counter<TThree, uint16_t>;
+}
+implementation
+{
+  components HplAtm128Timer3C as HWTimer, InitThreeP,
+    new Atm128CounterC(TThree, uint16_t) as NCounter;
+  
+  Counter = NCounter;
+  NCounter.Timer -> HWTimer;
+}
diff --git a/tos/platforms/mica/HilTimerMilliC.nc b/tos/platforms/mica/HilTimerMilliC.nc
new file mode 100644
index 00000000..487e54b8
--- /dev/null
+++ b/tos/platforms/mica/HilTimerMilliC.nc
@@ -0,0 +1,69 @@
+//$Id: HilTimerMilliC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Millisecond timer for the mica family (see TEP102). The "millisecond"
+ * timer system is built on hardware timer 0, running at 1024Hz.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include "Timer.h"
+
+configuration HilTimerMilliC {
+  provides interface Init;
+  provides interface Timer<TMilli> as TimerMilli[uint8_t num];
+  provides interface LocalTime<TMilli>;
+}
+implementation {
+
+  enum {
+    TIMER_COUNT = uniqueCount(UQ_TIMER_MILLI)
+  };
+
+  components AlarmCounterMilliP, new AlarmToTimerC(TMilli),
+    new VirtualizeTimerC(TMilli, TIMER_COUNT),
+    new CounterToLocalTimeC(TMilli);
+
+  Init = AlarmCounterMilliP;
+
+  TimerMilli = VirtualizeTimerC;
+  VirtualizeTimerC.TimerFrom -> AlarmToTimerC;
+  AlarmToTimerC.Alarm -> AlarmCounterMilliP;
+
+  LocalTime = CounterToLocalTimeC;
+  CounterToLocalTimeC.Counter -> AlarmCounterMilliP;
+}
+
+
diff --git a/tos/platforms/mica/InitOneP.nc b/tos/platforms/mica/InitOneP.nc
new file mode 100644
index 00000000..3605f324
--- /dev/null
+++ b/tos/platforms/mica/InitOneP.nc
@@ -0,0 +1,28 @@
+// $Id: InitOneP.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal mica-family timer component. Sets up hardware timer 1 to run
+ * at cpu clock / 256, at boot time. Assumes an ~8MHz CPU clock, replace
+ * this component if you are running at a radically different frequency.
+ *
+ * @author David Gay
+ */
+
+#include <MicaTimer.h>
+
+configuration InitOneP { }
+implementation {
+  components PlatformC, HplAtm128Timer1C as HWTimer,
+    new Atm128TimerInitC(uint16_t, MICA_PRESCALER_ONE) as InitOne;
+
+  PlatformC.SubInit -> InitOne;
+  InitOne.Timer -> HWTimer;
+}
diff --git a/tos/platforms/mica/InitThreeP.nc b/tos/platforms/mica/InitThreeP.nc
new file mode 100644
index 00000000..50230a57
--- /dev/null
+++ b/tos/platforms/mica/InitThreeP.nc
@@ -0,0 +1,28 @@
+// $Id: InitThreeP.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal mica-family timer component. Sets up hardware timer 3 to run
+ * at cpu clock / 8, at boot time. Assumes an ~8MHz CPU clock, replace
+ * this component if you are running at a radically different frequency.
+ *
+ * @author David Gay
+ */
+
+#include <MicaTimer.h>
+
+configuration InitThreeP { }
+implementation {
+  components PlatformC, HplAtm128Timer3C as HWTimer,
+    new Atm128TimerInitC(uint16_t, MICA_PRESCALER_THREE) as InitThree;
+
+  PlatformC.SubInit -> InitThree;
+  InitThree.Timer -> HWTimer;
+}
diff --git a/tos/platforms/mica/LocalTimeMicroC.nc b/tos/platforms/mica/LocalTimeMicroC.nc
new file mode 100644
index 00000000..a317e1ab
--- /dev/null
+++ b/tos/platforms/mica/LocalTimeMicroC.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2008, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include "Timer.h"
+
+configuration LocalTimeMicroC
+{
+	provides interface LocalTime<TMicro>;
+}
+
+implementation
+{
+	components CounterMicro32C;
+	components new CounterToLocalTimeC(TMicro);
+
+	LocalTime = CounterToLocalTimeC;
+	CounterToLocalTimeC.Counter -> CounterMicro32C;
+}
diff --git a/tos/platforms/mica/MeasureClockC.nc b/tos/platforms/mica/MeasureClockC.nc
new file mode 100644
index 00000000..46fce82d
--- /dev/null
+++ b/tos/platforms/mica/MeasureClockC.nc
@@ -0,0 +1,124 @@
+// $Id: MeasureClockC.nc,v 1.6 2010-03-27 21:29:20 mmaroti Exp $
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#include <MicaTimer.h>
+#include <scale.h>
+
+/**
+ * Measure cpu clock frequency at boot time. Provides an Atm128Calibrate
+ * interface so that other components can adjust their calibration as
+ * needed.
+ *
+ * @author David Gay
+ */
+
+module MeasureClockC @safe() {
+  provides {
+    /**
+     * This code MUST be called from PlatformP only, hence the exactlyonce.
+     */
+    interface Init @exactlyonce();
+    interface Atm128Calibrate;
+  }
+}
+implementation 
+{
+  enum {
+    /* This is expected number of cycles per jiffy at the platform's
+       specified MHz. Assumes PLATFORM_MHZ == 1, 2, 4, 8 or 16. */
+    MAGIC = 488 / (16 / PLATFORM_MHZ)
+  };
+
+  uint16_t cycles;
+
+  command error_t Init.init() {
+    /* Measure clock cycles per Jiffy (1/32768s) */
+    /* This code doesn't use the HPL to avoid timing issues when compiling
+       with debugging on */
+    atomic
+      {
+	uint8_t now, wraps;
+	uint16_t start;
+
+	/* Setup timer0 to count 32 jiffies, and timer1 cpu cycles */
+	TCCR1B = 1 << CS10;
+	ASSR = 1 << AS0;
+	TCCR0 = 1 << CS01 | 1 << CS00;
+
+	/* Wait for 1s for counter to stablilize after power-up (yes, it
+	   really does take that long). That's 122 wrap arounds of timer 1
+	   at 8MHz. */
+	start = TCNT1;
+	for (wraps = MAGIC / 2; wraps; )
+	  {
+	    uint16_t next = TCNT1;
+
+	    if (next < start)
+	      wraps--;
+	    start = next;
+	  }
+
+	/* Wait for a TCNT0 change */
+	now = TCNT0;
+	while (TCNT0 == now) ;
+
+	/* Read cpu cycles and wait for next TCNT0 change */
+	start = TCNT1;
+	now = TCNT0;
+	while (TCNT0 == now) ;
+	cycles = TCNT1;
+
+	cycles = (cycles - start + 16) >> 5;
+
+	/* Reset to boot state */
+	ASSR = TCCR1B = TCCR0 = 0;
+	TCNT0 = 0;
+	TCNT1 = 0;
+	ETIFR = TIFR = 0xff;
+	while (ASSR & (1 << TCN0UB | 1 << OCR0UB | 1 << TCR0UB))
+	  ;
+      }
+    return SUCCESS;
+  }
+
+  async command uint16_t Atm128Calibrate.cyclesPerJiffy() {
+    return cycles;
+  }
+
+  async command uint32_t Atm128Calibrate.calibrateMicro(uint32_t n) {
+    return scale32(n, cycles, MAGIC);
+  }
+
+  async command uint32_t Atm128Calibrate.actualMicro(uint32_t n) {
+    return scale32(n, MAGIC, cycles);
+  }
+
+  async command uint8_t Atm128Calibrate.adcPrescaler() {
+    /* This is also log2(cycles/3.05). But that's a pain to compute */
+    if (cycles >= 390)
+      return ATM128_ADC_PRESCALE_128;
+    if (cycles >= 195)
+      return ATM128_ADC_PRESCALE_64;
+    if (cycles >= 97)
+      return ATM128_ADC_PRESCALE_32;
+    if (cycles >= 48)
+      return ATM128_ADC_PRESCALE_16;
+    if (cycles >= 24)
+      return ATM128_ADC_PRESCALE_8;
+    if (cycles >= 12)
+      return ATM128_ADC_PRESCALE_4;
+    return ATM128_ADC_PRESCALE_2;
+  }
+
+  async command uint16_t Atm128Calibrate.baudrateRegister(uint32_t baudrate) {
+    // value is (cycles*32768) / (8*baudrate) - 1
+    return ((uint32_t)cycles << 12) / baudrate - 1;
+  }
+}
diff --git a/tos/platforms/mica/MicaBusAdc.nc b/tos/platforms/mica/MicaBusAdc.nc
new file mode 100644
index 00000000..46a9587d
--- /dev/null
+++ b/tos/platforms/mica/MicaBusAdc.nc
@@ -0,0 +1,21 @@
+// $Id: MicaBusAdc.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * A simplistic beginning to providing a standard interface to the mica-family
+ * 51-pin bus. Just provides the PW0-PW7 digital I/O pins.
+ */
+
+interface MicaBusAdc {
+  /**
+   * Return the A/D channel number to use for one of the ADCn pins.
+   */
+  async command uint8_t getChannel();
+}
diff --git a/tos/platforms/mica/MicaBusC.nc b/tos/platforms/mica/MicaBusC.nc
new file mode 100644
index 00000000..813b0b2c
--- /dev/null
+++ b/tos/platforms/mica/MicaBusC.nc
@@ -0,0 +1,100 @@
+// $Id: MicaBusC.nc,v 1.7 2010-06-15 21:24:16 mmaroti Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * A simplistic beginning to providing a standard interface to the
+ * mica-family 51-pin bus. Just provides the PW0-PW7 and Int0-3 digital
+ * I/O pins and returns the ADC channel number for the ADC pins.
+ * @author David Gay
+ */
+
+configuration MicaBusC {
+  provides {
+    interface GeneralIO as PW0;
+    interface GeneralIO as PW1;
+    interface GeneralIO as PW2;
+    interface GeneralIO as PW3;
+    interface GeneralIO as PW4;
+    interface GeneralIO as PW5;
+    interface GeneralIO as PW6;
+    interface GeneralIO as PW7;
+
+    interface GeneralIO as Int0;
+    interface GeneralIO as Int1;
+    interface GeneralIO as Int2;
+    interface GeneralIO as Int3;
+
+    /* INT lines used as interrupt source */
+    interface GpioInterrupt as Int0_Interrupt;
+    interface GpioInterrupt as Int1_Interrupt;
+    interface GpioInterrupt as Int2_Interrupt;
+    interface GpioInterrupt as Int3_Interrupt;
+    
+    interface GeneralIO as USART1_CLK;
+    interface GeneralIO as USART1_RXD;
+    interface GeneralIO as USART1_TXD;
+
+    /* Separate interfaces to allow inlining to occur */
+    interface MicaBusAdc as Adc0;
+    interface MicaBusAdc as Adc1;
+    interface MicaBusAdc as Adc2;
+    interface MicaBusAdc as Adc3;
+    interface MicaBusAdc as Adc4;
+    interface MicaBusAdc as Adc5;
+    interface MicaBusAdc as Adc6;
+    interface MicaBusAdc as Adc7;
+  }
+}
+implementation {
+  components HplAtm128GeneralIOC as Pins, MicaBusP;
+  components HplAtm128InterruptC;
+
+  PW0 = Pins.PortC0;
+  PW1 = Pins.PortC1;
+  PW2 = Pins.PortC2;
+  PW3 = Pins.PortC3;
+  PW4 = Pins.PortC4;
+  PW5 = Pins.PortC5;
+  PW6 = Pins.PortC6;
+  PW7 = Pins.PortC7;
+  Int0 = Pins.PortE4;
+  Int1 = Pins.PortE5;
+  Int2 = Pins.PortE6;
+  Int3 = Pins.PortE7;
+  
+  USART1_CLK = Pins.PortD5;
+  USART1_RXD = Pins.PortD2;
+  USART1_TXD = Pins.PortD3;
+
+  components new Atm128GpioInterruptC() as Atm128GpioInterrupt0C;
+  Atm128GpioInterrupt0C.Atm128Interrupt->HplAtm128InterruptC.Int4;
+  Int0_Interrupt=Atm128GpioInterrupt0C.Interrupt;
+
+  components new Atm128GpioInterruptC() as Atm128GpioInterrupt1C;
+  Atm128GpioInterrupt1C.Atm128Interrupt->HplAtm128InterruptC.Int5;
+  Int1_Interrupt=Atm128GpioInterrupt1C.Interrupt;
+
+  components new Atm128GpioInterruptC() as Atm128GpioInterrupt2C;
+  Atm128GpioInterrupt2C.Atm128Interrupt->HplAtm128InterruptC.Int6;
+  Int2_Interrupt=Atm128GpioInterrupt2C.Interrupt;
+
+  components new Atm128GpioInterruptC() as Atm128GpioInterrupt3C;
+  Atm128GpioInterrupt3C.Atm128Interrupt->HplAtm128InterruptC.Int7;
+  Int3_Interrupt=Atm128GpioInterrupt3C.Interrupt;
+
+  Adc0 = MicaBusP.Adc0;
+  Adc1 = MicaBusP.Adc1;
+  Adc2 = MicaBusP.Adc2;
+  Adc3 = MicaBusP.Adc3;
+  Adc4 = MicaBusP.Adc4;
+  Adc5 = MicaBusP.Adc5;
+  Adc6 = MicaBusP.Adc6;
+  Adc7 = MicaBusP.Adc7;
+}
diff --git a/tos/platforms/mica/MicaBusP.nc b/tos/platforms/mica/MicaBusP.nc
new file mode 100644
index 00000000..9a20825f
--- /dev/null
+++ b/tos/platforms/mica/MicaBusP.nc
@@ -0,0 +1,37 @@
+// $Id: MicaBusP.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal component of the simplistic mica bus interface.
+ * @author David Gay
+ */
+
+module MicaBusP {
+  provides {
+    interface MicaBusAdc as Adc0;
+    interface MicaBusAdc as Adc1;
+    interface MicaBusAdc as Adc2;
+    interface MicaBusAdc as Adc3;
+    interface MicaBusAdc as Adc4;
+    interface MicaBusAdc as Adc5;
+    interface MicaBusAdc as Adc6;
+    interface MicaBusAdc as Adc7;
+  }
+}
+implementation {
+  async command uint8_t Adc0.getChannel() { return 0; }
+  async command uint8_t Adc1.getChannel() { return 1; }
+  async command uint8_t Adc2.getChannel() { return 2; }
+  async command uint8_t Adc3.getChannel() { return 3; }
+  async command uint8_t Adc4.getChannel() { return 4; }
+  async command uint8_t Adc5.getChannel() { return 5; }
+  async command uint8_t Adc6.getChannel() { return 6; }
+  async command uint8_t Adc7.getChannel() { return 7; }
+}
diff --git a/tos/platforms/mica/MicaTimer.h b/tos/platforms/mica/MicaTimer.h
new file mode 100644
index 00000000..87b0f47e
--- /dev/null
+++ b/tos/platforms/mica/MicaTimer.h
@@ -0,0 +1,128 @@
+// $Id: MicaTimer.h,v 1.5 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#ifndef MICATIMER_H
+#define MICATIMER_H
+
+/* This file defines the rates at which the mica family's atmega128 timer 1
+   and 3 timers run at. The goal is to present the user with microsend and
+   32khz timers, but it may not be possible to run the timers at these rates
+   (because of the limited prescaler selection).
+
+   So TinyOS picks a prescaler (based on the selected processor MHz) for
+   each of these timers, and builds corresponding 16-bit alarms&counters
+   (AlarmOne16C, AlarmThree16C, CounterOne16C, CounterThree16C) over
+   hardware timers 1 and 3. TinyOS then divides these hardware timers by
+   the appropriate power of 2 to get approximate 32-bit 32kHz and 1MHz
+   alarms and counters (Alarm32khz32C, AlarmMicro32C, Counter32khz32C,
+   CounterMicro32C).
+
+   The constants and typedefs for all this configuration are defined here,
+   based on the value of the MHZ preprocessor symbol, which shoud approximate
+   the platform's MHZ rate.
+
+   Note that the timers thus obtained will not be exactly at 32768Hz or
+   1MHz, because the clock doesn't divide by a power of two to those
+   frequencies, and/or the clock frequency is not accurate. If you need
+   more accurate timing, you should use the calibration functions
+   offered by the Atm128Calibrate interface provided by PlatformC.
+
+   This file also defines EXT_STANDBY_T0_THRESHOLD, a threshold on
+   remaining time till the next timer 0 interrupt under which the mote
+   should sleep in ext standby rather than power save. This is only
+   important when not using the internal oscillator.  Wake up from power
+   save takes 65536 cycles (6 cycles for ext standby), which is, e.g.,
+   ~9.4ms at 7Mhz.
+*/
+
+#include <Timer.h>
+#include <Atm128Timer.h>
+
+/* Some types for the non-standard rates that mica timers might be running
+   at.
+ */
+typedef struct { } T64khz;
+typedef struct { } T128khz;
+typedef struct { } T2mhz;
+typedef struct { } T4mhz;
+
+/* TX is the typedef for the rate of timer X, 
+   MICA_PRESCALER_X is the prescaler for timer X,
+   MICA_DIVIDER_X_FOR_Y_LOG2 is the number of bits to shift timer X by
+     to get rate Y,
+   counter_X_overflow_t is uint16_t if MICA_DIVIDER_X_FOR_Y_LOG2 is 0,
+     uint32_t otherwise.
+*/
+
+#if MHZ == 1
+typedef T128khz TOne;
+typedef TMicro TThree;
+typedef uint32_t counter_one_overflow_t;
+typedef uint16_t counter_three_overflow_t;
+
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_8,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 2,
+  MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0,
+  EXT_STANDBY_T0_THRESHOLD = 80,
+};
+
+#elif MHZ == 2
+typedef T32khz TOne;
+typedef T2mhz TThree;
+typedef uint16_t counter_one_overflow_t;
+typedef uint32_t counter_three_overflow_t;
+
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_64,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 0,
+  MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 1,
+  EXT_STANDBY_T0_THRESHOLD = 40
+};
+
+#elif MHZ == 4
+typedef T64khz TOne;
+typedef T4mhz TThree;
+typedef uint32_t counter_one_overflow_t;
+typedef uint32_t counter_three_overflow_t;
+
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_64,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 1,
+  MICA_PRESCALER_THREE = ATM128_CLK16_NORMAL,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 2,
+  EXT_STANDBY_T0_THRESHOLD = 24
+};
+
+#elif MHZ == 8
+typedef T32khz TOne;
+typedef TMicro TThree;
+typedef uint16_t counter_one_overflow_t;
+typedef uint16_t counter_three_overflow_t;
+
+enum {
+  MICA_PRESCALER_ONE = ATM128_CLK16_DIVIDE_256,
+  MICA_DIVIDE_ONE_FOR_32KHZ_LOG2 = 0,
+  MICA_PRESCALER_THREE = ATM128_CLK16_DIVIDE_8,
+  MICA_DIVIDE_THREE_FOR_MICRO_LOG2 = 0,
+  EXT_STANDBY_T0_THRESHOLD = 12
+};
+
+#else
+#error "Unknown clock rate. MHZ must be defined to one of 1, 2, 4, or 8."
+#endif
+
+enum {
+  PLATFORM_MHZ = MHZ
+};
+
+#endif
diff --git a/tos/platforms/mica/PlatformC.nc b/tos/platforms/mica/PlatformC.nc
new file mode 100644
index 00000000..cd0a163c
--- /dev/null
+++ b/tos/platforms/mica/PlatformC.nc
@@ -0,0 +1,64 @@
+/// $Id: PlatformC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Initialisation component for mica-family platforms. See TEP107. Each 
+ * mica-family member must also provide a MotePlatformC with initialisation
+ * specific to that member.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include "hardware.h"
+
+configuration PlatformC {
+  provides {
+    interface Init;
+    /**
+     * Provides calibration information for other components.
+     */
+    interface Atm128Calibrate;
+  }
+  uses interface Init as SubInit;
+}
+implementation
+{
+  components PlatformP, MotePlatformC, MeasureClockC;
+  
+  Init = PlatformP;
+  Atm128Calibrate = MeasureClockC;
+
+  PlatformP.MeasureClock -> MeasureClockC;
+  PlatformP.MoteInit -> MotePlatformC;
+  MotePlatformC.SubInit = SubInit;
+}
diff --git a/tos/platforms/mica/PlatformLedsC.nc b/tos/platforms/mica/PlatformLedsC.nc
new file mode 100644
index 00000000..364f3cd9
--- /dev/null
+++ b/tos/platforms/mica/PlatformLedsC.nc
@@ -0,0 +1,59 @@
+// $Id: PlatformLedsC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Platform-specific LED interface.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include "hardware.h"
+
+configuration PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation
+{
+  components HplAtm128GeneralIOC as IO;
+  components PlatformP;
+
+  Init = PlatformP.MoteInit;
+
+  Led0 = IO.PortA2;  // Pin A2 = Red LED
+  Led1 = IO.PortA1;  // Pin A1 = Green LED
+  Led2 = IO.PortA0;  // Pin A0 = Yellow LED
+}
diff --git a/tos/platforms/mica/PlatformP.nc b/tos/platforms/mica/PlatformP.nc
new file mode 100644
index 00000000..3d8c5943
--- /dev/null
+++ b/tos/platforms/mica/PlatformP.nc
@@ -0,0 +1,74 @@
+/// $Id: PlatformP.nc,v 1.6 2010-06-29 22:07:53 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Internal platform boot code.
+ *
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include "hardware.h"
+
+module PlatformP @safe()
+{
+  provides interface Init;
+  uses interface Init as MoteInit;
+  uses interface Init as MeasureClock;
+
+}
+implementation
+{
+  void power_init() {
+      atomic {
+	MCUCR = _BV(SE);      // Internal RAM, IDLE, rupt vector at 0x0002,
+			      // enable sleep instruction!
+      }
+  }
+
+  command error_t Init.init()
+  {
+    error_t ok;
+
+    /* First thing is to measure the clock frequency */
+    ok = call MeasureClock.init();
+    ok = ecombine(ok, call MoteInit.init());
+
+    if (ok != SUCCESS)
+      return ok;
+
+    power_init();
+
+    return SUCCESS;
+  }
+}
+
diff --git a/tos/platforms/mica/PlatformSerialC.nc b/tos/platforms/mica/PlatformSerialC.nc
new file mode 100644
index 00000000..9e814511
--- /dev/null
+++ b/tos/platforms/mica/PlatformSerialC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Alec Woo <awoo@archrock.com>
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:42 $
+ */
+
+configuration PlatformSerialC {
+  
+  provides interface StdControl;
+  provides interface UartStream;
+  provides interface UartByte;
+  
+}
+implementation {
+
+  components Atm128Uart0C as Uart0;
+  StdControl = Uart0;
+  UartStream = Uart0;
+  UartByte = Uart0;
+  
+  components CounterMicro32C;
+  Uart0.Counter -> CounterMicro32C;
+  
+}
diff --git a/tos/platforms/mica/VoltageC.nc b/tos/platforms/mica/VoltageC.nc
new file mode 100644
index 00000000..c393778d
--- /dev/null
+++ b/tos/platforms/mica/VoltageC.nc
@@ -0,0 +1,51 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Battery Voltage. The returned value represents the difference
+ * between the battery voltage and V_BG (1.23V). The formula to convert
+ * it to mV is: 1223 * 1024 / value.
+ *
+ * @author Razvan Musaloiu-E.
+ */
+
+generic configuration VoltageC()
+{
+  provides interface Read<uint16_t>;
+}
+
+implementation
+{
+  components new AdcReadClientC(), VoltageP;
+
+  Read = AdcReadClientC;
+
+  AdcReadClientC.Atm128AdcConfig -> VoltageP;
+}
diff --git a/tos/platforms/mica/VoltageNowC.nc b/tos/platforms/mica/VoltageNowC.nc
new file mode 100644
index 00000000..196c6242
--- /dev/null
+++ b/tos/platforms/mica/VoltageNowC.nc
@@ -0,0 +1,51 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Battery Voltage. The returned value represents the difference
+ * between the battery voltage and V_BG (1.23V). The formula to convert
+ * it to mV is: 1223 * 1024 / value.
+ *
+ * @author Razvan Musaloiu-E.
+ */
+
+#include "hardware.h"
+
+generic configuration VoltageNowC() {
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation {
+  components new AdcReadNowClientC(), VoltageP;
+
+  ReadNow = AdcReadNowClientC;
+  Resource = AdcReadNowClientC;
+  AdcReadNowClientC.Atm128AdcConfig -> VoltageP;
+}
diff --git a/tos/platforms/mica/VoltageP.nc b/tos/platforms/mica/VoltageP.nc
new file mode 100644
index 00000000..450ce886
--- /dev/null
+++ b/tos/platforms/mica/VoltageP.nc
@@ -0,0 +1,59 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Battery Voltage. The returned value represents the difference
+ * between the battery voltage and V_BG (1.23V). The formula to convert
+ * it to mV is: 1223 * 1024 / value.
+ *
+ * @author Razvan Musaloiu-E.
+ */
+module VoltageP
+{
+  provides interface Atm128AdcConfig;
+}
+implementation
+{
+  async command uint8_t Atm128AdcConfig.getChannel()
+  {
+    // select the 1.23V (V_BG). Reference: Table 97, page 244 from the Atmega128
+    return ATM128_ADC_SNGL_1_23;
+  }
+
+  async command uint8_t Atm128AdcConfig.getRefVoltage()
+  {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t Atm128AdcConfig.getPrescaler()
+  {
+    return ATM128_ADC_PRESCALE;
+  }
+}
diff --git a/tos/platforms/mica/VoltageStreamC.nc b/tos/platforms/mica/VoltageStreamC.nc
new file mode 100644
index 00000000..ce2473bb
--- /dev/null
+++ b/tos/platforms/mica/VoltageStreamC.nc
@@ -0,0 +1,49 @@
+/* Copyright (c) 2007 Johns Hopkins University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Battery Voltage. The returned value represents the difference
+ * between the battery voltage and V_BG (1.23V). The formula to convert
+ * it to mV is: 1223 * 1024 / value.
+ *
+ * @author Razvan Musaloiu-E.
+ */
+
+#include "hardware.h"
+
+generic configuration VoltageStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components VoltageP, new AdcReadStreamClientC();
+
+  ReadStream = AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> VoltageP;
+}
diff --git a/tos/platforms/mica/chips/at45db/HplAt45dbC.nc b/tos/platforms/mica/chips/at45db/HplAt45dbC.nc
new file mode 100644
index 00000000..105f2d20
--- /dev/null
+++ b/tos/platforms/mica/chips/at45db/HplAt45dbC.nc
@@ -0,0 +1,31 @@
+// $Id: HplAt45dbC.nc,v 1.4 2006-12-12 18:23:42 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * AT45DB flash chip HPL for mica family. Each family member must provide
+ * and HplAt45dbIOC component implementing the SPIByte and HplAt45dbByte
+ * interfaces required by HplAt45dbByteC.
+ *
+ * @author David Gay
+ */
+
+configuration HplAt45dbC {
+  provides interface HplAt45db @atmostonce();
+}
+implementation {
+  // 9 because the AT45DB041B has 264 byte pages (log2 page size rounded up)
+  components new HplAt45dbByteC(9), HplAt45dbIOC;
+
+  HplAt45db = HplAt45dbByteC;
+
+  HplAt45dbByteC.Resource -> HplAt45dbIOC;
+  HplAt45dbByteC.FlashSpi -> HplAt45dbIOC;
+  HplAt45dbByteC.HplAt45dbByte -> HplAt45dbIOC;
+}
diff --git a/tos/platforms/mica/platform.h b/tos/platforms/mica/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/mica/sim/HilTimerMilliC.nc b/tos/platforms/mica/sim/HilTimerMilliC.nc
new file mode 100644
index 00000000..8c70336b
--- /dev/null
+++ b/tos/platforms/mica/sim/HilTimerMilliC.nc
@@ -0,0 +1,66 @@
+//$Id: HilTimerMilliC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Millisecond timer for the mica family (see TEP102). The "millisecond"
+ * timer system is built on hardware timer 0, running at 1024Hz.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include "Timer.h"
+
+configuration HilTimerMilliC
+{
+  provides interface Init;
+  provides interface Timer<TMilli> as TimerMilli[uint8_t num];
+  provides interface LocalTime<TMilli>;
+}
+implementation
+{
+  components AlarmCounterMilliP, new AlarmToTimerC(TMilli),
+    new VirtualizeTimerC(TMilli, uniqueCount(UQ_TIMER_MILLI)),
+    new CounterToLocalTimeC(TMilli);
+
+  Init = AlarmCounterMilliP;
+
+  TimerMilli = VirtualizeTimerC;
+  VirtualizeTimerC.TimerFrom -> AlarmToTimerC;
+  AlarmToTimerC.Alarm -> AlarmCounterMilliP;
+
+  LocalTime = CounterToLocalTimeC;
+  CounterToLocalTimeC.Counter -> AlarmCounterMilliP;
+}
+
+
diff --git a/tos/platforms/mica/sim/MeasureClockC.nc b/tos/platforms/mica/sim/MeasureClockC.nc
new file mode 100644
index 00000000..7a1ba0c9
--- /dev/null
+++ b/tos/platforms/mica/sim/MeasureClockC.nc
@@ -0,0 +1,32 @@
+#include "scale.h"
+
+/**
+ * Simulation version of MeasureClockC for the mica platform. See 
+ * tos/platforms/mica/MeasureClockC.nc for more details.
+ *
+ * @author Phil Levis
+ */
+
+module MeasureClockC {
+  /* This code MUST be called from PlatformP only, hence the exactlyonce */
+  provides interface Init @exactlyonce();
+
+  provides {
+    command uint16_t cyclesPerJiffy();
+    command uint32_t calibrateMicro(uint32_t n);
+  }
+}
+implementation 
+{
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+
+  command uint16_t cyclesPerJiffy() {
+    return (1 << 8);
+  }
+
+  command uint32_t calibrateMicro(uint32_t n) {
+    return scale32(n + 122, 244, (1 << 32));
+  }
+}
diff --git a/tos/platforms/mica/sim/PlatformC.nc b/tos/platforms/mica/sim/PlatformC.nc
new file mode 100644
index 00000000..6d5ceaf4
--- /dev/null
+++ b/tos/platforms/mica/sim/PlatformC.nc
@@ -0,0 +1,57 @@
+/// $Id: PlatformC.nc,v 1.5 2010-06-29 22:07:53 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Martin Turon <mturon@xbow.com>
+ */
+
+#include "hardware.h"
+
+configuration PlatformC {
+  provides {
+    interface Init;
+    command uint32_t calibrateMicro(uint32_t n);
+  }
+  uses interface Init as SubInit;
+}
+implementation
+{
+  components PlatformP, MotePlatformC, MeasureClockC;
+  
+  Init = PlatformP;
+  PlatformP.MoteInit -> MotePlatformC;
+  MotePlatformC.SubInit = SubInit;
+  PlatformP.MeasureClock -> MeasureClockC;
+
+}
+
diff --git a/tos/platforms/mica2/.platform b/tos/platforms/mica2/.platform
new file mode 100644
index 00000000..a497ccf8
--- /dev/null
+++ b/tos/platforms/mica2/.platform
@@ -0,0 +1,67 @@
+#
+# FILE: mica2/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc. 
+#
+# $Id: .platform,v 1.9 2008-05-31 20:18:32 regehr Exp $
+#
+push( @includes, qw(
+
+  %T/platforms/mica
+  %T/platforms/mica2/chips/cc1000
+  %T/chips/cc1000
+  %T/platforms/mica2/chips/at45db
+  %T/platforms/mica/chips/at45db
+  %T/chips/at45db
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/i2c
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/timer
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/power
+
+) );
+
+@opts = qw(
+
+  -gcc=avr-gcc
+  -mmcu=atmega128
+  -fnesc-target=avr
+  -fnesc-no-debug
+
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=4 " .
+    "version=avr-3.4.3 " .
+    "short=2,1, " .
+    "int=2,1 " .
+    "long=4,1 " .
+    "long_long=8,1 " .
+    "pointer=2,1 " .
+    "enum=2,1 " .
+    "float=4,1 " .
+    "double=4,1 " .
+    "long_double=4,1 " .
+    "void=1,1 " .
+    "fun=1,1 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
+
diff --git a/tos/platforms/mica2/ActiveMessageC.nc b/tos/platforms/mica2/ActiveMessageC.nc
new file mode 100644
index 00000000..db6eb416
--- /dev/null
+++ b/tos/platforms/mica2/ActiveMessageC.nc
@@ -0,0 +1,87 @@
+// $Id: ActiveMessageC.nc,v 1.8 2010-06-29 22:07:53 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.8 2010-06-29 22:07:53 scipio Exp $
+ *
+ */
+
+/**
+ * The Active Message layer on the mica2 platform. This is a naming wrapper
+ * around the CC1000 Active Message layer.
+ *
+ * @author Philip Levis
+ * @date June 19 2005
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli; 
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz; 
+    interface LowPowerListening;
+  }
+}
+implementation {
+  components CC1000ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+  PacketTimeStampMilli   = AM;
+  PacketTimeStamp32khz   = AM;
+  LowPowerListening	 = AM;
+}
diff --git a/tos/platforms/mica2/DemoSensorC.nc b/tos/platforms/mica2/DemoSensorC.nc
new file mode 100644
index 00000000..38c35f1a
--- /dev/null
+++ b/tos/platforms/mica2/DemoSensorC.nc
@@ -0,0 +1,24 @@
+/* $Id: DemoSensorC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the mica2 platform.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new VoltageC() as Sensor;
+
+  Read = Sensor;
+}
diff --git a/tos/platforms/mica2/DemoSensorNowC.nc b/tos/platforms/mica2/DemoSensorNowC.nc
new file mode 100644
index 00000000..5ed32851
--- /dev/null
+++ b/tos/platforms/mica2/DemoSensorNowC.nc
@@ -0,0 +1,26 @@
+/* $Id: DemoSensorNowC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the mica2 platform.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation {
+  components new VoltageNowC() as Sensor;
+
+  Resource = Sensor;
+  ReadNow = Sensor;
+}
diff --git a/tos/platforms/mica2/DemoSensorStreamC.nc b/tos/platforms/mica2/DemoSensorStreamC.nc
new file mode 100644
index 00000000..e76d37f2
--- /dev/null
+++ b/tos/platforms/mica2/DemoSensorStreamC.nc
@@ -0,0 +1,24 @@
+/* $Id: DemoSensorStreamC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the mica2 platform.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new VoltageStreamC() as SensorStream;
+
+  ReadStream = SensorStream;
+}
diff --git a/tos/platforms/mica2/MotePlatformC.nc b/tos/platforms/mica2/MotePlatformC.nc
new file mode 100644
index 00000000..92c224c1
--- /dev/null
+++ b/tos/platforms/mica2/MotePlatformC.nc
@@ -0,0 +1,29 @@
+/* $Id: MotePlatformC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The portion of a mica-family initialisation that is mote-specific.
+ * 
+ * @author David Gay
+ */
+configuration MotePlatformC
+{
+  provides interface Init as PlatformInit;
+  uses interface Init as SubInit;
+}
+implementation {
+  components MotePlatformP, HplCC1000InitP, HplAtm128GeneralIOC as IO;
+
+  PlatformInit = MotePlatformP;
+  PlatformInit = HplCC1000InitP;
+  
+  MotePlatformP.SerialIdPin -> IO.PortA4;
+  SubInit = MotePlatformP.SubInit;
+  
+}
diff --git a/tos/platforms/mica2/MotePlatformP.nc b/tos/platforms/mica2/MotePlatformP.nc
new file mode 100644
index 00000000..1babbef5
--- /dev/null
+++ b/tos/platforms/mica2/MotePlatformP.nc
@@ -0,0 +1,38 @@
+/* $Id: MotePlatformP.nc,v 1.5 2008-06-26 04:39:08 regehr Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The portion of a mica-family initialisation that is mote-specific.
+ * 
+ * @author David Gay
+ */
+module MotePlatformP @safe()
+{
+  provides interface Init as PlatformInit;
+  uses interface GeneralIO as SerialIdPin;
+  uses interface Init as SubInit;
+}
+implementation {
+
+  command error_t PlatformInit.init() {
+    // Pull C I/O port pins low
+    PORTC = 0;
+    DDRC = 0xff;
+
+    // Prevent sourcing current
+    call SerialIdPin.makeInput(); 
+    call SerialIdPin.clr();
+
+    return call SubInit.init();
+  }
+
+  default command error_t SubInit.init() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/mica2/NestedResourceC.nc b/tos/platforms/mica2/NestedResourceC.nc
new file mode 100644
index 00000000..a1d93013
--- /dev/null
+++ b/tos/platforms/mica2/NestedResourceC.nc
@@ -0,0 +1,63 @@
+/* $Id: NestedResourceC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Package up two resources as one. Requests and releases are passed on to
+ * both resources. granted is only signaled when both Resources are granted.
+ *
+ * @author David Gay
+ */
+
+generic module NestedResourceC() {
+  provides interface Resource;
+  uses {
+    /**
+     * First Resource to merge. This Resource MUST NOT be wired elsewhere.
+     */
+    interface Resource as Resource1;
+
+    /**
+     * Second Resource to merge. This Resource MUST NOT be wired elsewhere.
+     */
+    interface Resource as Resource2;
+  }
+}
+implementation
+{
+  async command error_t Resource.request() {
+    return call Resource1.request();
+  }
+
+  event void Resource1.granted() {
+    call Resource2.request();
+  }
+
+  event void Resource2.granted() {
+    signal Resource.granted();
+  }
+  async command error_t Resource.immediateRequest() {
+    if (call Resource1.immediateRequest() == SUCCESS)
+      {
+	if (call Resource2.immediateRequest() == SUCCESS)
+	  return SUCCESS;
+	call Resource1.release();
+      }
+    return EBUSY;
+  }
+
+  async command error_t Resource.release() {
+    if(call Resource1.release() == SUCCESS)
+    	return call Resource2.release();
+    return FAIL;
+  }
+
+  async command uint8_t Resource.isOwner() {
+    return call Resource1.isOwner();
+  }
+}
diff --git a/tos/platforms/mica2/TimeSyncMessageC.nc b/tos/platforms/mica2/TimeSyncMessageC.nc
new file mode 100644
index 00000000..476b988c
--- /dev/null
+++ b/tos/platforms/mica2/TimeSyncMessageC.nc
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *
+ * The Active Message layer on the mica2 platform. This is a naming wrapper
+ * around the CC1000 Active Message layer that implemets timesync interface (TEP 133).
+ *
+ * @author Philip Levis
+ * @author Brano Kusy
+ * @author Marco Langerwisch (Mica2 port)
+ */
+
+configuration TimeSyncMessageC {
+  provides
+  {
+    interface SplitControl;
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+
+    interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[am_id_t id];
+    interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+
+    interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+    interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+  }
+}
+implementation {
+  components CC1000TimeSyncMessageC as AM;
+
+  SplitControl = AM;
+
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  TimeSyncAMSend32khz       = AM;
+  TimeSyncAMSendMilli       = AM;
+  TimeSyncPacket32khz       = AM;
+  TimeSyncPacketMilli       = AM;
+  PacketTimeStamp32khz      = AM;
+  PacketTimeStampMilli      = AM;
+}
diff --git a/tos/platforms/mica2/chips/at45db/HplAt45dbIOC.nc b/tos/platforms/mica2/chips/at45db/HplAt45dbIOC.nc
new file mode 100644
index 00000000..981d7a94
--- /dev/null
+++ b/tos/platforms/mica2/chips/at45db/HplAt45dbIOC.nc
@@ -0,0 +1,41 @@
+// $Id: HplAt45dbIOC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low-level access functions for the AT45DB flash on the mica2 and micaz.
+ *
+ * @author David Gay
+ */
+
+configuration HplAt45dbIOC {
+  provides {
+    interface Resource;
+    interface SpiByte as FlashSpi;
+    interface HplAt45dbByte;
+  }
+}
+implementation {
+  // Wire up byte I/O to At45db
+  components HplAt45dbIOP, HplAtm128GeneralIOC as Pins, HplAtm128InterruptC, PlatformC;
+  components BusyWaitMicroC;
+  components new NoArbiterC();
+
+  Resource = NoArbiterC;
+  FlashSpi = HplAt45dbIOP;
+  HplAt45dbByte = HplAt45dbIOP;
+
+  PlatformC.SubInit -> HplAt45dbIOP;
+  HplAt45dbIOP.Select -> Pins.PortA3;
+  HplAt45dbIOP.Clk -> Pins.PortD5;
+  HplAt45dbIOP.In -> Pins.PortD2;
+  HplAt45dbIOP.Out -> Pins.PortD3;
+  HplAt45dbIOP.InInterrupt -> HplAtm128InterruptC.Int2;
+  HplAt45dbIOP.BusyWait -> BusyWaitMicroC;
+}
diff --git a/tos/platforms/mica2/chips/at45db/HplAt45dbIOP.nc b/tos/platforms/mica2/chips/at45db/HplAt45dbIOP.nc
new file mode 100644
index 00000000..cf044512
--- /dev/null
+++ b/tos/platforms/mica2/chips/at45db/HplAt45dbIOP.nc
@@ -0,0 +1,169 @@
+// $Id: HplAt45dbIOP.nc,v 1.6 2010-06-29 22:07:53 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low level hardware access to the onboard AT45DB flash chip.
+ * <p>
+ * Note: This component includes optimised bit-banging SPI code with the
+ * pins hardwired.  Don't copy it to some other platform without
+ * understanding it (see txByte).
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ */
+
+#include "Timer.h"
+
+module HplAt45dbIOP {
+  provides {
+    interface Init;
+    interface SpiByte as FlashSpi;
+    interface HplAt45dbByte;
+  }
+  uses {
+    interface GeneralIO as Select;
+    interface GeneralIO as Clk;
+    interface GeneralIO as Out;
+    interface GeneralIO as In;
+    interface HplAtm128Interrupt as InInterrupt;
+    interface BusyWait<TMicro, uint16_t>;
+  }
+}
+implementation
+{
+  // We use SPI mode 0 (clock low at select time)
+
+  command error_t Init.init() {
+    call Select.makeOutput();
+    call Select.set();
+    call Clk.clr();
+    call Clk.makeOutput();
+    call Out.set();
+    call Out.makeOutput();
+    call In.clr();
+    call In.makeInput();
+
+    call InInterrupt.disable();
+    call InInterrupt.edge(TRUE);
+
+    return SUCCESS;
+  }
+
+  command void HplAt45dbByte.select() {
+    call Clk.clr(); // ensure SPI mode 0
+    call Select.clr();
+  }
+
+  command void HplAt45dbByte.deselect() {
+    call Select.set();
+  }
+  
+#define BITINIT \
+  uint8_t clrClkAndData = PORTD & ~0x28
+
+#define BIT(n) \
+	PORTD = clrClkAndData; \
+	asm __volatile__ \
+        (  "sbrc %2," #n "\n" \
+	 "\tsbi 18,3\n" \
+	 "\tsbi 18,5\n" \
+	 "\tsbic 16,2\n" \
+	 "\tori %0,1<<" #n "\n" \
+	 : "=d" (spiIn) : "0" (spiIn), "r" (spiOut))
+
+  async command uint8_t FlashSpi.write(uint8_t spiOut) {
+    uint8_t spiIn = 0;
+
+    // This atomic ensures integrity at the hardware level...
+    atomic
+      {
+	BITINIT;
+
+	BIT(7);
+	BIT(6);
+	BIT(5);
+	BIT(4);
+	BIT(3);
+	BIT(2);
+	BIT(1);
+	BIT(0);
+      }
+
+    return spiIn;
+  }
+
+  task void avail() {
+    signal HplAt45dbByte.idle();
+  }
+
+  command void HplAt45dbByte.waitIdle() {
+    // Setup interrupt on rising edge of flash in
+    atomic
+      {
+	call InInterrupt.clear();
+	call InInterrupt.enable();
+	call Clk.clr();
+	// We need to wait at least 2 cycles here (because of the signal
+	// acquisition delay). It's also good to wait a few microseconds
+	// to get the fast ("FAIL") exit from wait (reads are twice as fast
+	// with a 2us delay...)
+	call BusyWait.wait(2);
+
+	if (call In.get())
+	  signal InInterrupt.fired(); // already high
+      }
+  }
+
+  async event void InInterrupt.fired() {
+    call InInterrupt.disable();
+    post avail();
+  }
+
+  command bool HplAt45dbByte.getCompareStatus() {
+    call Clk.set();
+    call Clk.clr();
+    // Wait for compare value to propagate
+    asm volatile("nop");
+    asm volatile("nop");
+    return !call In.get();
+  }
+}
diff --git a/tos/platforms/mica2/chips/at45db/HplAt45db_chip.h b/tos/platforms/mica2/chips/at45db/HplAt45db_chip.h
new file mode 100644
index 00000000..59c1586e
--- /dev/null
+++ b/tos/platforms/mica2/chips/at45db/HplAt45db_chip.h
@@ -0,0 +1,56 @@
+// $Id: HplAt45db_chip.h,v 1.6 2010-06-29 22:07:53 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef HPLAT45DB_CHIP_H
+#define HPLAT45DB_CHIP_H
+
+// flash characteristics
+enum {
+  AT45_MAX_PAGES = 2048,
+  AT45_PAGE_SIZE = 264,
+  AT45_PAGE_SIZE_LOG2 = 8 // For those who want to ignore the last 8 bytes
+};
+
+typedef uint16_t at45page_t;
+typedef uint16_t at45pageoffset_t; /* must fit 0 to AT45_PAGE_SIZE - 1 */
+
+#endif
diff --git a/tos/platforms/mica2/chips/cc1000/HplCC1000C.nc b/tos/platforms/mica2/chips/cc1000/HplCC1000C.nc
new file mode 100644
index 00000000..ac42b890
--- /dev/null
+++ b/tos/platforms/mica2/chips/cc1000/HplCC1000C.nc
@@ -0,0 +1,67 @@
+// $Id: HplCC1000C.nc,v 1.7 2010-06-29 22:07:53 scipio Exp $
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * HPL for the CC1000 radio, for the mica2 platform.
+ *
+ * @author David Gay
+ */
+configuration HplCC1000C {
+  provides {
+    interface ReadNow<uint16_t> as RssiAdc;
+    interface Resource as RssiResource;
+    interface HplCC1000Spi;
+    interface HplCC1000;
+  }
+}
+implementation {
+  components HplCC1000P, HplCC1000SpiP;
+  components new AdcReadNowClientC() as RssiChannel;
+
+  HplCC1000 = HplCC1000P;
+  HplCC1000Spi = HplCC1000SpiP;
+  RssiAdc = RssiChannel;
+  RssiResource = RssiChannel;
+
+  RssiChannel.Atm128AdcConfig -> HplCC1000P;
+
+  // HplCC1000M, HplCC1000SpiM are wired in HplCC1000InitC which is always
+  // included (see MotePlatformC.nc).
+}
diff --git a/tos/platforms/mica2/chips/cc1000/HplCC1000InitP.nc b/tos/platforms/mica2/chips/cc1000/HplCC1000InitP.nc
new file mode 100644
index 00000000..56f5fdda
--- /dev/null
+++ b/tos/platforms/mica2/chips/cc1000/HplCC1000InitP.nc
@@ -0,0 +1,65 @@
+// $Id: HplCC1000InitP.nc,v 1.6 2010-06-29 22:07:53 scipio Exp $
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Hardware initialisation for the CC1000 radio. This component is always
+ * included even if the radio is not used.
+ *
+ * @author David Gay
+ */
+configuration HplCC1000InitP {
+  provides interface Init as PlatformInit;
+}
+implementation {
+  components HplCC1000P, HplCC1000SpiP, HplAtm128GeneralIOC as IO;
+
+  PlatformInit = HplCC1000P;
+  PlatformInit = HplCC1000SpiP;
+
+  HplCC1000P.CHP_OUT -> IO.PortA6;
+  HplCC1000P.PALE -> IO.PortD4;
+  HplCC1000P.PCLK -> IO.PortD6;
+  HplCC1000P.PDATA -> IO.PortD7;
+
+  HplCC1000SpiP.SpiSck -> IO.PortB1;
+  HplCC1000SpiP.SpiMiso -> IO.PortB3;
+  HplCC1000SpiP.SpiMosi -> IO.PortB2;
+  HplCC1000SpiP.OC1C -> IO.PortB7;
+}
diff --git a/tos/platforms/mica2/chips/cc1000/HplCC1000P.nc b/tos/platforms/mica2/chips/cc1000/HplCC1000P.nc
new file mode 100644
index 00000000..8493b056
--- /dev/null
+++ b/tos/platforms/mica2/chips/cc1000/HplCC1000P.nc
@@ -0,0 +1,218 @@
+// $Id: HplCC1000P.nc,v 1.7 2010-06-29 22:07:53 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low level hardware access to the CC1000.
+ *
+ * @author Jaein Jeong
+ * @author Philip Buonadonna
+ */
+
+#include "Atm128Adc.h"
+#include "CC1000Const.h"
+
+module HplCC1000P @safe() {
+  provides {
+    interface Init as PlatformInit;
+    interface HplCC1000;
+    interface Atm128AdcConfig as RssiConfig;
+  }
+  uses {
+    /* These are the CC1000 pin names */
+    interface GeneralIO as CHP_OUT;
+    interface GeneralIO as PALE;
+    interface GeneralIO as PCLK;
+    interface GeneralIO as PDATA;
+  }
+}
+implementation
+{
+  command error_t PlatformInit.init() {
+    call CHP_OUT.makeInput();
+    call PALE.makeOutput();
+    call PCLK.makeOutput();
+    call PDATA.makeOutput();
+    call PALE.set();
+    call PDATA.set();
+    call PCLK.set();
+
+    // MAIN register to power down mode. Shut everything off
+    call HplCC1000.write(CC1K_MAIN,
+			 1 << CC1K_RX_PD |
+			 1 << CC1K_TX_PD | 
+			 1 << CC1K_FS_PD |
+			 1 << CC1K_CORE_PD |
+			 1 << CC1K_BIAS_PD |
+			 1 << CC1K_RESET_N);
+    call HplCC1000.write(CC1K_PA_POW, 0);  // turn off rf amp
+    return SUCCESS;
+  }
+  
+  command void HplCC1000.init() {
+  }
+
+  //********************************************************/
+  // function: write                                       */
+  // description: accepts a 7 bit address and 8 bit data,  */
+  //    creates an array of ones and zeros for each, and   */
+  //    uses a loop counting thru the arrays to get        */
+  //    consistent timing for the chipcon radio control    */
+  //    interface.  PALE active low, followed by 7 bits    */
+  //    msb first of address, then lsb high for write      */
+  //    cycle, followed by 8 bits of data msb first.  data */
+  //    is clocked out on the falling edge of PCLK.        */
+  // Input:  7 bit address, 8 bit data                     */
+  //********************************************************/
+
+  async command void HplCC1000.write(uint8_t addr, uint8_t data) {
+    char cnt = 0;
+
+    // address cycle starts here
+    addr <<= 1;
+    call PALE.clr();  // enable PALE
+    for (cnt=0;cnt<7;cnt++)  // send addr PDATA msb first
+    {
+      if (addr&0x80)
+        call PDATA.set();
+      else
+        call PDATA.clr();
+      call PCLK.clr();   // toggle the PCLK
+      call PCLK.set();
+      addr <<= 1;
+    }
+    call PDATA.set();
+    call PCLK.clr();   // toggle the PCLK
+    call PCLK.set();
+
+    call PALE.set();  // disable PALE
+
+    // data cycle starts here
+    for (cnt=0;cnt<8;cnt++)  // send data PDATA msb first
+    {
+      if (data&0x80)
+        call PDATA.set();
+      else
+        call PDATA.clr();
+      call PCLK.clr();   // toggle the PCLK
+      call PCLK.set();
+      data <<= 1;
+    }
+    call PALE.set();
+    call PDATA.set();
+    call PCLK.set();
+  }
+
+  //********************************************************/
+  // function: read                                        */
+  // description: accepts a 7 bit address,                 */
+  //    creates an array of ones and zeros for each, and   */
+  //    uses a loop counting thru the arrays to get        */
+  //    consistent timing for the chipcon radio control    */
+  //    interface.  PALE active low, followed by 7 bits    */
+  //    msb first of address, then lsb low for read        */
+  //    cycle, followed by 8 bits of data msb first.  data */
+  //    is clocked in on the falling edge of PCLK.         */
+  // Input:  7 bit address                                 */
+  // Output:  8 bit data                                   */
+  //********************************************************/
+
+  async command uint8_t HplCC1000.read(uint8_t addr) {
+    int cnt;
+    uint8_t din;
+    uint8_t data = 0;
+
+    // address cycle starts here
+    addr <<= 1;
+    call PALE.clr();  // enable PALE
+    for (cnt=0;cnt<7;cnt++)  // send addr PDATA msb first
+    {
+      if (addr&0x80)
+        call PDATA.set();
+      else
+        call PDATA.clr();
+      call PCLK.clr();   // toggle the PCLK
+      call PCLK.set();
+      addr <<= 1;
+    }
+    call PDATA.clr();
+    call PCLK.clr();   // toggle the PCLK
+    call PCLK.set();
+
+    call PDATA.makeInput();  // read data from chipcon
+    call PALE.set();  // disable PALE
+
+    // data cycle starts here
+    for (cnt=7;cnt>=0;cnt--)  // send data PDATA msb first
+    {
+      call PCLK.clr();  // toggle the PCLK
+      din = call PDATA.get();
+      if(din)
+        data = (data<<1)|0x01;
+      else
+        data = (data<<1)&0xfe;
+      call PCLK.set();
+    }
+
+    call PALE.set();
+    call PDATA.makeOutput();
+    call PDATA.set();
+
+    return data;
+  }
+
+
+  async command bool HplCC1000.getLOCK() {
+    return call CHP_OUT.get();
+  }
+
+  async command uint8_t RssiConfig.getChannel() {
+    return CHANNEL_RSSI;
+  }
+
+  async command uint8_t RssiConfig.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t RssiConfig.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+}
+  
diff --git a/tos/platforms/mica2/chips/cc1000/HplCC1000SpiP.nc b/tos/platforms/mica2/chips/cc1000/HplCC1000SpiP.nc
new file mode 100644
index 00000000..0061f2de
--- /dev/null
+++ b/tos/platforms/mica2/chips/cc1000/HplCC1000SpiP.nc
@@ -0,0 +1,125 @@
+// $Id: HplCC1000SpiP.nc,v 1.7 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low-level functions to access the CC1000 bus. Built using the mica2
+ * hardware SPI.
+ *
+ * @author Jaein Jeong
+ * @author Philip buonadonna
+ */
+
+
+module HplCC1000SpiP @safe() {
+  provides interface Init as PlatformInit;
+  provides interface HplCC1000Spi;
+  //uses interface PowerManagement;
+  uses {
+    interface GeneralIO as SpiSck;
+    interface GeneralIO as SpiMiso;
+    interface GeneralIO as SpiMosi;
+    interface GeneralIO as OC1C;
+  }
+}
+implementation
+{
+  uint8_t outgoingByte;
+
+  command error_t PlatformInit.init() {
+    call SpiSck.makeInput();
+    call OC1C.makeInput();
+    call HplCC1000Spi.rxMode();
+    return SUCCESS;
+  }
+
+  AVR_ATOMIC_HANDLER(SIG_SPI) {
+    register uint8_t temp = SPDR;
+    SPDR = outgoingByte;
+    signal HplCC1000Spi.dataReady(temp);
+  }
+  default async event void HplCC1000Spi.dataReady(uint8_t data) { }
+  
+
+  async command void HplCC1000Spi.writeByte(uint8_t data) {
+    atomic outgoingByte = data;
+  }
+
+  async command bool HplCC1000Spi.isBufBusy() {
+    return bit_is_clear(SPSR, SPIF);
+  }
+
+  async command uint8_t HplCC1000Spi.readByte() {
+    return SPDR;
+  }
+
+  async command void HplCC1000Spi.enableIntr() {
+    //sbi(SPCR,SPIE);
+    SPCR = 0xc0;
+    CLR_BIT(DDRB, 0);
+    //call PowerManagement.adjustPower();
+  }
+
+  async command void HplCC1000Spi.disableIntr() {
+    CLR_BIT(SPCR, SPIE);
+    SET_BIT(DDRB, 0);
+    CLR_BIT(PORTB, 0);
+    //call PowerManagement.adjustPower();
+  }
+
+  async command void HplCC1000Spi.initSlave() {
+    atomic {
+      CLR_BIT(SPCR, CPOL);		// Set proper polarity...
+      CLR_BIT(SPCR, CPHA);		// ...and phase
+      SET_BIT(SPCR, SPIE);	// enable spi port
+      SET_BIT(SPCR, SPE);
+    } 
+  }
+	
+  async command void HplCC1000Spi.txMode() {
+    call SpiMiso.makeOutput();
+    call SpiMosi.makeOutput();
+  }
+
+  async command void HplCC1000Spi.rxMode() {
+    call SpiMiso.makeInput();
+    call SpiMosi.makeInput();
+  }
+}
diff --git a/tos/platforms/mica2/chips/ds2401/CachedIeeeEui64C.nc b/tos/platforms/mica2/chips/ds2401/CachedIeeeEui64C.nc
new file mode 100644
index 00000000..1ecbc2c3
--- /dev/null
+++ b/tos/platforms/mica2/chips/ds2401/CachedIeeeEui64C.nc
@@ -0,0 +1,51 @@
+// $Id: CachedIeeeEui64C.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */
+
+/**
+ * Cache an EUI 64 at initialization time and return the cached value for
+ * subsequent queries.
+ */
+configuration CachedIeeeEui64C {
+  uses interface LocalIeeeEui64 as SubIeeeEui64;
+  provides interface LocalIeeeEui64;
+} implementation {
+  components CachedIeeeEui64P, MotePlatformC;
+
+  MotePlatformC.SubInit -> CachedIeeeEui64P.Init;
+
+  SubIeeeEui64 = CachedIeeeEui64P;
+  LocalIeeeEui64 = CachedIeeeEui64P;
+
+}
diff --git a/tos/platforms/mica2/chips/ds2401/LocalIeeeEui64C.nc b/tos/platforms/mica2/chips/ds2401/LocalIeeeEui64C.nc
new file mode 100644
index 00000000..51d234cc
--- /dev/null
+++ b/tos/platforms/mica2/chips/ds2401/LocalIeeeEui64C.nc
@@ -0,0 +1,59 @@
+// $Id: LocalIeeeEui64C.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ */
+
+/**
+ * Mica2-specific wiring to access the DS2401 hardware ID chip through the
+ * LocalIeeeEui64 interface. The CachedIeeeEui64C component reads the ID
+ * during hardware initialization, caches it, and returns the cached value at
+ * subsequent calls to LocalIeeeEui64.getId().
+ */
+configuration LocalIeeeEui64C {
+  provides interface LocalIeeeEui64;
+} implementation {
+  components
+    OneWireMasterC as OneWireC,
+    HplDs2401C,
+    BusyWaitMicroC,
+    HplAtm128GeneralIOC,
+    Ds2401ToIeeeEui64C,
+    CachedIeeeEui64C;
+
+  OneWireC.Pin -> HplAtm128GeneralIOC.PortA4;
+  OneWireC.BusyWaitMicro -> BusyWaitMicroC.BusyWait;
+  HplDs2401C.OneWire -> OneWireC;
+  Ds2401ToIeeeEui64C.Hpl -> HplDs2401C;
+  CachedIeeeEui64C.SubIeeeEui64 -> Ds2401ToIeeeEui64C;
+  LocalIeeeEui64 = CachedIeeeEui64C;
+}
diff --git a/tos/platforms/mica2/deluge.xml b/tos/platforms/mica2/deluge.xml
new file mode 100644
index 00000000..d52e8b48
--- /dev/null
+++ b/tos/platforms/mica2/deluge.xml
@@ -0,0 +1,3 @@
+<volume_table>
+  <volume name="DELUGE" base="0" size="131072"/>
+</volume_table>
diff --git a/tos/platforms/mica2/hardware.h b/tos/platforms/mica2/hardware.h
new file mode 100644
index 00000000..ca7412d7
--- /dev/null
+++ b/tos/platforms/mica2/hardware.h
@@ -0,0 +1,79 @@
+/*                                                                     
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Alan Broad <abroad@xbow.com>
+ *  @author Matt Miller <mmiller@xbow.com>
+ *  @author Martin Turon <mturon@xbow.com>
+ *
+ *  $Id: hardware.h,v 1.8 2010-06-29 22:07:53 scipio Exp $
+ */
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#ifndef MHZ
+/* Clock rate is ~8MHz except if specified by user 
+   (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */
+#define MHZ 8
+#endif
+
+#include <atm128hardware.h>
+#include <Atm128Adc.h>
+#include <MicaTimer.h>
+
+// enum so components can override power saving,
+// as per TEP 112.
+enum {
+  TOS_SLEEP_NONE = ATM128_POWER_IDLE,
+};
+
+// A/D channels
+enum {
+  CHANNEL_RSSI       = ATM128_ADC_SNGL_ADC0,
+  CHANNEL_THERMISTOR = ATM128_ADC_SNGL_ADC1,    // normally unpopulated
+  CHANNEL_BATTERY    = ATM128_ADC_SNGL_ADC7,
+};
+
+#ifndef PLATFORM_BAUDRATE
+enum {
+  PLATFORM_BAUDRATE = 57600L
+};
+#endif
+
+#endif //HARDWARE_H
diff --git a/tos/platforms/mica2/platform.h b/tos/platforms/mica2/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/mica2/platform_message.h b/tos/platforms/mica2/platform_message.h
new file mode 100644
index 00000000..bb422eb9
--- /dev/null
+++ b/tos/platforms/mica2/platform_message.h
@@ -0,0 +1,71 @@
+/* $Id: platform_message.h,v 1.6 2010-06-29 22:07:53 scipio Exp $
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific CC1000 packet structures.
+ *
+ * @author Philip Levis
+ * @date   May 16 2005
+ * Revision:  $Revision: 1.6 $
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "CC1000Msg.h"
+#include "Serial.h"
+
+typedef union message_header {
+  cc1000_header_t cc1k;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  cc1000_footer_t cc1k;
+} message_footer_t;
+
+typedef union message_metadata {
+  cc1000_metadata_t cc1k;
+  serial_metadata_t serial;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/mica2dot/.platform b/tos/platforms/mica2dot/.platform
new file mode 100644
index 00000000..e28975b7
--- /dev/null
+++ b/tos/platforms/mica2dot/.platform
@@ -0,0 +1,69 @@
+#
+# FILE: micaz/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc. 
+#
+# $Id: .platform,v 1.8 2008-06-24 19:03:34 beutel Exp $
+#
+push( @includes, qw(
+
+  %T/platforms/mica2dot
+  %T/platforms/mica2
+  %T/platforms/mica
+  %T/platforms/mica2dot/chips/cc1000
+  %T/platforms/mica2/chips/cc1000
+  %T/chips/cc1000
+  %T/platforms/mica2dot/chips/at45db
+  %T/platforms/mica2/chips/at45db
+  %T/platforms/mica/chips/at45db
+  %T/chips/at45db
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/timer
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/power
+
+) );
+
+@opts = qw(
+
+  -gcc=avr-gcc
+  -mmcu=atmega128
+  -fnesc-target=avr
+  -fnesc-no-debug
+
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=4 " .
+    "version=avr-3.4.3 " .
+    "short=2,1, " .
+    "int=2,1 " .
+    "long=4,1 " .
+    "long_long=8,1 " .
+    "pointer=2,1 " .
+    "enum=2,1 " .
+    "float=4,1 " .
+    "double=4,1 " .
+    "long_double=4,1 " .
+    "void=1,1 " .
+    "fun=1,1 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
diff --git a/tos/platforms/mica2dot/DemoSensorC.nc b/tos/platforms/mica2dot/DemoSensorC.nc
new file mode 100644
index 00000000..fd493305
--- /dev/null
+++ b/tos/platforms/mica2dot/DemoSensorC.nc
@@ -0,0 +1,24 @@
+/* $Id: DemoSensorC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the mica2 platform.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new TempC() as Sensor;
+
+  Read = Sensor;
+}
diff --git a/tos/platforms/mica2dot/DemoSensorNowC.nc b/tos/platforms/mica2dot/DemoSensorNowC.nc
new file mode 100644
index 00000000..dbcfe27e
--- /dev/null
+++ b/tos/platforms/mica2dot/DemoSensorNowC.nc
@@ -0,0 +1,26 @@
+/* $Id: DemoSensorNowC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the mica2 platform.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation {
+  components new TempNowC() as Sensor;
+
+  Resource = Sensor;
+  ReadNow = Sensor;
+}
diff --git a/tos/platforms/mica2dot/DemoSensorStreamC.nc b/tos/platforms/mica2dot/DemoSensorStreamC.nc
new file mode 100644
index 00000000..b65af9ab
--- /dev/null
+++ b/tos/platforms/mica2dot/DemoSensorStreamC.nc
@@ -0,0 +1,24 @@
+/* $Id: DemoSensorStreamC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the mica2 platform.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new TempStreamC() as SensorStream;
+
+  ReadStream = SensorStream;
+}
diff --git a/tos/platforms/mica2dot/MotePlatformC.nc b/tos/platforms/mica2dot/MotePlatformC.nc
new file mode 100644
index 00000000..c249fcdd
--- /dev/null
+++ b/tos/platforms/mica2dot/MotePlatformC.nc
@@ -0,0 +1,27 @@
+/* $Id: MotePlatformC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The portion of a mica-family initialisation that is mote-specific.
+ * For the mica2dot, we leave everything as inputs except as explicitly
+ * configured otherwise by other components.
+ * 
+ * @author David Gay
+ */
+configuration MotePlatformC
+{
+  provides interface Init as PlatformInit;
+  uses interface Init as SubInit;
+}
+implementation {
+  components HplCC1000InitP;
+
+  PlatformInit = HplCC1000InitP;
+  SubInit = PlatformInit;
+}
diff --git a/tos/platforms/mica2dot/PlatformLedsC.nc b/tos/platforms/mica2dot/PlatformLedsC.nc
new file mode 100644
index 00000000..7bb322b3
--- /dev/null
+++ b/tos/platforms/mica2dot/PlatformLedsC.nc
@@ -0,0 +1,60 @@
+// $Id: PlatformLedsC.nc,v 1.5 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Platform-specific LED interface.
+ *
+ * @author Martin Turon <mturon@xbow.com>, David Gay
+ */
+
+#include "hardware.h"
+
+configuration PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation
+{
+  components HplAtm128GeneralIOC as IO;
+  components new NoPinC();
+  components PlatformP;
+
+  Init = PlatformP.MoteInit;
+
+  Led0 = IO.PortA2;  // Pin A2 = Red LED
+  Led1 = NoPinC;
+  Led2 = NoPinC;
+}
diff --git a/tos/platforms/mica2dot/TempC.nc b/tos/platforms/mica2dot/TempC.nc
new file mode 100644
index 00000000..28b51bec
--- /dev/null
+++ b/tos/platforms/mica2dot/TempC.nc
@@ -0,0 +1,27 @@
+/* $Id: TempC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Temp sensor.
+ * 
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+generic configuration TempC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new AdcReadClientC(), TempDeviceP;
+
+  Read = AdcReadClientC;
+  AdcReadClientC.Atm128AdcConfig -> TempDeviceP;
+  AdcReadClientC.ResourceConfigure -> TempDeviceP;
+}
diff --git a/tos/platforms/mica2dot/TempDeviceP.nc b/tos/platforms/mica2dot/TempDeviceP.nc
new file mode 100644
index 00000000..20e16bd1
--- /dev/null
+++ b/tos/platforms/mica2dot/TempDeviceP.nc
@@ -0,0 +1,33 @@
+/* $Id: TempDeviceP.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal component for temp sensor. Arbitrates access to the temp
+ * sensor and automatically turns it on or off based on user requests.
+ *
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+configuration TempDeviceP {
+  provides {
+    interface Atm128AdcConfig;
+    interface ResourceConfigure;
+  }
+}
+implementation {
+  components TempP, HplAtm128GeneralIOC as Pins;
+
+  Atm128AdcConfig = TempP;
+  ResourceConfigure = TempP;
+
+  TempP.BatMon -> Pins.PortC6;
+  TempP.BatMonRef -> Pins.PortC7;
+}
diff --git a/tos/platforms/mica2dot/TempNowC.nc b/tos/platforms/mica2dot/TempNowC.nc
new file mode 100644
index 00000000..783d7235
--- /dev/null
+++ b/tos/platforms/mica2dot/TempNowC.nc
@@ -0,0 +1,29 @@
+/* $Id: TempNowC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Temp sensor.
+ * 
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+generic configuration TempNowC() {
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation {
+  components new AdcReadNowClientC(), TempDeviceP;
+
+  ReadNow = AdcReadNowClientC;
+  Resource = AdcReadNowClientC;
+  AdcReadNowClientC.Atm128AdcConfig -> TempDeviceP;
+  AdcReadNowClientC.ResourceConfigure -> TempDeviceP;
+}
diff --git a/tos/platforms/mica2dot/TempP.nc b/tos/platforms/mica2dot/TempP.nc
new file mode 100644
index 00000000..4da4887c
--- /dev/null
+++ b/tos/platforms/mica2dot/TempP.nc
@@ -0,0 +1,74 @@
+/// $Id: TempP.nc,v 1.5 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * Internal component for temp sensor reading.
+ *
+ * @author Hu Siquan <husq@xbow.com>
+ * @author David Gay
+ */
+
+module TempP {
+  provides {
+    interface ResourceConfigure;
+    interface Atm128AdcConfig as TempConfig;
+  }
+  uses {
+    interface GeneralIO as BatMon;
+    interface GeneralIO as BatMonRef;
+  }
+}
+implementation {
+  async command uint8_t TempConfig.getChannel() {
+    return CHANNEL_BATTERY_THERMISTOR;
+  }
+
+  async command uint8_t TempConfig.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t TempConfig.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+
+  async command void ResourceConfigure.configure() {
+    call BatMonRef.makeOutput();
+    call BatMonRef.set();
+    call BatMon.makeOutput();
+    call BatMon.clr();
+  }
+
+  async command void ResourceConfigure.unconfigure() {
+    call BatMon.makeInput();
+    call BatMonRef.makeInput();
+  }
+}
diff --git a/tos/platforms/mica2dot/TempStreamC.nc b/tos/platforms/mica2dot/TempStreamC.nc
new file mode 100644
index 00000000..d473c92f
--- /dev/null
+++ b/tos/platforms/mica2dot/TempStreamC.nc
@@ -0,0 +1,27 @@
+/* $Id: TempStreamC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Temp sensor.
+ * 
+ * @author David Gay
+ */
+
+#include "hardware.h"
+
+generic configuration TempStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components TempDeviceP, new AdcReadStreamClientC();
+
+  ReadStream = AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> TempDeviceP;
+  AdcReadStreamClientC.ResourceConfigure -> TempDeviceP;
+}
diff --git a/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOC.nc b/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOC.nc
new file mode 100644
index 00000000..503b8b6f
--- /dev/null
+++ b/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOC.nc
@@ -0,0 +1,38 @@
+// $Id: HplAt45dbIOC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low-level access functions for the AT45DB flash on the mica2 and micaz.
+ *
+ * @author David Gay
+ */
+
+configuration HplAt45dbIOC {
+  provides {
+    interface Resource;
+    interface SpiByte as FlashSpi;
+    interface HplAt45dbByte;
+  }
+}
+implementation {
+  // Wire up byte I/O to At45db
+  components HplAt45dbIOP, HplAtm128GeneralIOC as Pins, PlatformC;
+  components new NoArbiterC();
+
+  Resource = NoArbiterC;
+  FlashSpi = HplAt45dbIOP;
+  HplAt45dbByte = HplAt45dbIOP;
+
+  PlatformC.SubInit -> HplAt45dbIOP;
+  HplAt45dbIOP.Select -> Pins.PortE5;
+  HplAt45dbIOP.Clk -> Pins.PortA3;
+  HplAt45dbIOP.In -> Pins.PortA6;
+  HplAt45dbIOP.Out -> Pins.PortA7;
+}
diff --git a/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOP.nc b/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOP.nc
new file mode 100644
index 00000000..bd61f126
--- /dev/null
+++ b/tos/platforms/mica2dot/chips/at45db/HplAt45dbIOP.nc
@@ -0,0 +1,149 @@
+// $Id: HplAt45dbIOP.nc,v 1.6 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Low level hardware access to the onboard AT45DB flash chip.
+ * <p>
+ * Note: This component includes optimised bit-banging SPI code with the
+ * pins hardwired.  Don't copy it to some other platform without
+ * understanding it (see txByte).
+ *
+ * @author Jason Hill
+ * @author David Gay
+ * @author Philip Levis
+ */
+
+#include "Timer.h"
+
+module HplAt45dbIOP {
+  provides {
+    interface Init;
+    interface SpiByte as FlashSpi;
+    interface HplAt45dbByte;
+  }
+  uses {
+    interface GeneralIO as Select;
+    interface GeneralIO as Clk;
+    interface GeneralIO as Out;
+    interface GeneralIO as In;
+  }
+}
+implementation
+{
+  // We use SPI mode 0 (clock low at select time)
+
+  command error_t Init.init() {
+    call Select.makeOutput();
+    call Select.set();
+    call Clk.clr();
+    call Clk.makeOutput();
+    call Out.set();
+    call Out.makeOutput();
+    call In.clr();
+    call In.makeInput();
+
+    return SUCCESS;
+  }
+
+  command void HplAt45dbByte.select() {
+    call Clk.clr(); // ensure SPI mode 0
+    call Select.clr();
+  }
+
+  command void HplAt45dbByte.deselect() {
+    call Select.set();
+  }
+  
+#define BITINIT \
+  uint8_t clrClkAndData = PORTA & ~0x88
+
+#define BIT(n) \
+	PORTA = clrClkAndData; \
+	asm __volatile__ \
+        (  "sbrc %2," #n "\n" \
+	 "\tsbi 27,7\n" \
+	 "\tsbi 27,3\n" \
+	 "\tsbic 25,6\n" \
+	 "\tori %0,1<<" #n "\n" \
+	 : "=d" (spiIn) : "0" (spiIn), "r" (spiOut))
+
+  async command uint8_t FlashSpi.write(uint8_t spiOut) {
+    uint8_t spiIn = 0;
+
+    // This atomic ensures integrity at the hardware level...
+    atomic
+      {
+	BITINIT;
+
+	BIT(7);
+	BIT(6);
+	BIT(5);
+	BIT(4);
+	BIT(3);
+	BIT(2);
+	BIT(1);
+	BIT(0);
+      }
+
+    return spiIn;
+  }
+
+  task void idleWait() {
+    if (call In.get())
+      signal HplAt45dbByte.idle();
+    else
+      post idleWait();
+  }
+
+  command void HplAt45dbByte.waitIdle() {
+    call Clk.clr();
+    post idleWait();
+  }
+
+  command bool HplAt45dbByte.getCompareStatus() {
+    call Clk.set();
+    call Clk.clr();
+    // Wait for compare value to propagate
+    asm volatile("nop");
+    asm volatile("nop");
+    return !call In.get();
+  }
+}
diff --git a/tos/platforms/mica2dot/chips/cc1000/HplCC1000InitP.nc b/tos/platforms/mica2dot/chips/cc1000/HplCC1000InitP.nc
new file mode 100644
index 00000000..bcaa6341
--- /dev/null
+++ b/tos/platforms/mica2dot/chips/cc1000/HplCC1000InitP.nc
@@ -0,0 +1,65 @@
+// $Id: HplCC1000InitP.nc,v 1.6 2010-06-29 22:07:54 scipio Exp $
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Hardware initialisation for the CC1000 radio. This component is always
+ * included even if the radio is not used.
+ *
+ * @author David Gay
+ */
+configuration HplCC1000InitP {
+  provides interface Init as PlatformInit;
+}
+implementation {
+  components HplCC1000P, HplCC1000SpiP, HplAtm128GeneralIOC as IO;
+
+  PlatformInit = HplCC1000P;
+  PlatformInit = HplCC1000SpiP;
+
+  HplCC1000P.CHP_OUT -> IO.PortE7;
+  HplCC1000P.PALE -> IO.PortD5;
+  HplCC1000P.PCLK -> IO.PortD6;
+  HplCC1000P.PDATA -> IO.PortD7;
+
+  HplCC1000SpiP.SpiSck -> IO.PortB1;
+  HplCC1000SpiP.SpiMiso -> IO.PortB3;
+  HplCC1000SpiP.SpiMosi -> IO.PortB2;
+  HplCC1000SpiP.OC1C -> IO.PortB7;
+}
diff --git a/tos/platforms/mica2dot/hardware.h b/tos/platforms/mica2dot/hardware.h
new file mode 100644
index 00000000..1f4cfddb
--- /dev/null
+++ b/tos/platforms/mica2dot/hardware.h
@@ -0,0 +1,76 @@
+/*                                                                     
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Alan Broad <abroad@xbow.com>
+ *  @author Matt Miller <mmiller@xbow.com>
+ *  @author Martin Turon <mturon@xbow.com>
+ *
+ *  $Id: hardware.h,v 1.8 2010-06-29 22:07:54 scipio Exp $
+ */
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#ifndef MHZ
+/* Clock rate is 4MHz except if specified by user 
+   (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */
+#define MHZ 4
+#endif
+
+#include <atm128hardware.h>
+#include <Atm128Adc.h>
+#include <MicaTimer.h>
+
+// enum so components can override power saving,
+// as per TEP 112.
+enum {
+  TOS_SLEEP_NONE = ATM128_POWER_IDLE,
+};
+
+// A/D channels
+enum {
+  CHANNEL_RSSI       = ATM128_ADC_SNGL_ADC0,
+  CHANNEL_BATTERY_THERMISTOR = ATM128_ADC_SNGL_ADC1
+};
+
+enum {
+  PLATFORM_BAUDRATE = 19200L
+};
+
+#endif //HARDWARE_H
diff --git a/tos/platforms/mica2dot/platform.h b/tos/platforms/mica2dot/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/micaz/.platform b/tos/platforms/micaz/.platform
new file mode 100644
index 00000000..906e69b6
--- /dev/null
+++ b/tos/platforms/micaz/.platform
@@ -0,0 +1,84 @@
+#
+# FILE: micaz/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  
+#
+# $Id: .platform,v 1.8 2009-08-14 20:33:43 jgko Exp $
+#
+push( @includes, qw(
+
+  %T/platforms/mica
+  %T/platforms/micaz/chips/cc2420
+  %T/platforms/micaz/chips/cc2420x
+  %T/chips/cc2420
+  %T/chips/cc2420/alarm
+  %T/chips/cc2420/control
+  %T/chips/cc2420/csma
+  %T/chips/cc2420/interfaces
+  %T/chips/cc2420/link
+  %T/chips/cc2420/lowpan
+  %T/chips/cc2420/lpl
+  %T/chips/cc2420/packet
+  %T/chips/cc2420/receive
+  %T/chips/cc2420/spi
+  %T/chips/cc2420/transmit
+  %T/chips/cc2420/unique
+  %T/chips/cc2420/security
+  %T/chips/cc2420x
+  %T/lib/rfxlink/layers
+  %T/lib/rfxlink/util  
+  %T/platforms/mica2/chips/at45db
+  %T/platforms/mica/chips/at45db
+  %T/chips/at45db
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/i2c
+  %T/chips/atm128/timer
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/power
+
+) );
+
+@opts = qw(
+
+  -gcc=avr-gcc
+  -mmcu=atmega128
+  -fnesc-target=avr
+  -fnesc-no-debug
+
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=4 " .
+    "version=avr-3.4.3 " .
+    "short=2,1, " .
+    "int=2,1 " .
+    "long=4,1 " .
+    "long_long=8,1 " .
+    "pointer=2,1 " .
+    "enum=2,1 " .
+    "float=4,1 " .
+    "double=4,1 " .
+    "long_double=4,1 " .
+    "void=1,1 " .
+    "fun=1,1 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
+
diff --git a/tos/platforms/micaz/ActiveMessageC.nc b/tos/platforms/micaz/ActiveMessageC.nc
new file mode 100644
index 00000000..e66119fb
--- /dev/null
+++ b/tos/platforms/micaz/ActiveMessageC.nc
@@ -0,0 +1,100 @@
+// $Id: ActiveMessageC.nc,v 1.9 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.9 2010-06-29 22:07:54 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the Telos platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.9 $ $Date: 2010-06-29 22:07:54 $
+ */
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+    interface LowPowerListening;
+  }
+}
+implementation {
+#ifdef RFXLINK
+  components CC2420XActiveMessageC as AM;
+#else
+  components CC2420ActiveMessageC as AM;
+#endif
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+  LowPowerListening = AM;
+
+#ifdef RFXLINK
+  PacketTimeStamp32khz = AM;
+  PacketTimeStampMilli = AM;
+#else
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+#endif
+}
diff --git a/tos/platforms/micaz/BusyWaitMicroC.nc b/tos/platforms/micaz/BusyWaitMicroC.nc
new file mode 100644
index 00000000..1722e3e8
--- /dev/null
+++ b/tos/platforms/micaz/BusyWaitMicroC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+module BusyWaitMicroC
+{
+  provides interface BusyWait<TMicro,uint16_t>;
+}
+implementation
+{
+  inline async command void BusyWait.wait(uint16_t dt) {
+  /* In most cases (constant arg), the test is elided at compile-time */
+  if (dt)
+    /* loop takes 8 cycles. this is 1uS if running on an internal 8MHz
+       clock, and 1.09uS if running on the external crystal. */
+    asm volatile (
+"1:	sbiw	%0,1\n"
+"	adiw	%0,1\n"
+"	sbiw	%0,1\n"
+"	brne	1b" : "+w" (dt));
+  }
+}
diff --git a/tos/platforms/micaz/DemoSensorC.nc b/tos/platforms/micaz/DemoSensorC.nc
new file mode 100644
index 00000000..a4ab9250
--- /dev/null
+++ b/tos/platforms/micaz/DemoSensorC.nc
@@ -0,0 +1,28 @@
+/* $Id: DemoSensorC.nc,v 1.5 2007-05-22 20:59:01 idgay Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The micaZ doesn't have any built-in sensors - the DemoSensor returns
+ * a constant value of 0xbeef, or just reads the ground value for the
+ * stream sensor.
+ *
+ * @author Philip Levis
+ * @authod David Gay
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation
+{
+  components new VoltageC() as DemoChannel;
+
+  Read = DemoChannel;
+}
diff --git a/tos/platforms/micaz/DemoSensorNowC.nc b/tos/platforms/micaz/DemoSensorNowC.nc
new file mode 100644
index 00000000..50ed12ea
--- /dev/null
+++ b/tos/platforms/micaz/DemoSensorNowC.nc
@@ -0,0 +1,27 @@
+/* $Id: DemoSensorNowC.nc,v 1.5 2007-05-22 20:59:01 idgay Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The micaZ doesn't have any built-in sensors - this DemoSensor just reads
+ * the ground value.
+ *
+ * @author David Gay
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation {
+  components new VoltageNowC() as Sensor;
+
+  Resource = Sensor;
+  ReadNow = Sensor;
+}
diff --git a/tos/platforms/micaz/DemoSensorStreamC.nc b/tos/platforms/micaz/DemoSensorStreamC.nc
new file mode 100644
index 00000000..40594e8e
--- /dev/null
+++ b/tos/platforms/micaz/DemoSensorStreamC.nc
@@ -0,0 +1,28 @@
+/* $Id: DemoSensorStreamC.nc,v 1.5 2007-05-22 20:59:01 idgay Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The micaZ doesn't have any built-in sensors - the DemoSensor returns
+ * a constant value of 0xbeef, or just reads the ground value for the
+ * stream sensor.
+ *
+ * @author Philip Levis
+ * @authod David Gay
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream<uint16_t>;
+}
+implementation
+{
+  components new VoltageStreamC() as Sensor;
+
+  ReadStream = Sensor;
+}
diff --git a/tos/platforms/micaz/Ieee154MessageC.nc b/tos/platforms/micaz/Ieee154MessageC.nc
new file mode 100644
index 00000000..2acb1e4e
--- /dev/null
+++ b/tos/platforms/micaz/Ieee154MessageC.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+/**
+ *
+ * @author Stephen Dawson-Haggerty
+ */
+ 
+configuration Ieee154MessageC  {
+  provides {
+    interface SplitControl;
+
+    interface Resource as SendResource[uint8_t clientId];
+    interface Ieee154Send;
+    interface Receive as Ieee154Receive;
+
+    interface Ieee154Packet;
+    interface Packet;
+
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+    interface LowPowerListening;
+    interface PacketLink;
+  }
+
+} implementation {
+  components CC2420Ieee154MessageC as Msg;
+
+  SplitControl = Msg;
+  SendResource = Msg;
+  Ieee154Send  = Msg;
+  Ieee154Receive = Msg;
+  Ieee154Packet = Msg;
+  Packet = Msg;
+  
+  PacketAcknowledgements = Msg;
+  LinkPacketMetadata = Msg;
+  LowPowerListening = Msg;
+  PacketLink = Msg;
+}
diff --git a/tos/platforms/micaz/LocalIeeeEui64C.nc b/tos/platforms/micaz/LocalIeeeEui64C.nc
new file mode 100644
index 00000000..266a9364
--- /dev/null
+++ b/tos/platforms/micaz/LocalIeeeEui64C.nc
@@ -0,0 +1,49 @@
+// $Id: LocalIeeeEui64C.nc,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ *  Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ *  Dummy Extended Address for micaz
+ */
+
+#include "IeeeEui64.h"
+
+module LocalIeeeEui64C {
+  provides interface LocalIeeeEui64;
+} implementation {
+  command ieee_eui64_t LocalIeeeEui64.getId() {
+    ieee_eui64_t id;
+    /* this is UCB's OUI */
+    id.data[0] = 0x00;
+    id.data[1] = 0x12;
+    id.data[2] = 0x6d;
+
+    /* UCB will let anyone use this OUI so long as these two octets
+       are 'LO' -- "local".  All other octets are reserved.  */
+    /* SDH -- 9/10/2010 */
+    id.data[3] = 'L';
+    id.data[4] = 'O';
+
+    id.data[5] = 0;
+    id.data[6] = TOS_NODE_ID >> 8;
+    id.data[7] = TOS_NODE_ID & 0xff;
+    return id;
+  }
+}
diff --git a/tos/platforms/micaz/MotePlatformC.nc b/tos/platforms/micaz/MotePlatformC.nc
new file mode 100644
index 00000000..12f2df02
--- /dev/null
+++ b/tos/platforms/micaz/MotePlatformC.nc
@@ -0,0 +1,27 @@
+/* $Id: MotePlatformC.nc,v 1.4 2006-12-12 18:23:43 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The porttion of a mica-family initialisation that is mote-specific.
+ * 
+ * @author David Gay
+ */
+configuration MotePlatformC
+{
+  provides interface Init as PlatformInit;
+  uses interface Init as SubInit;
+}
+implementation {
+  components MotePlatformP, HplAtm128GeneralIOC;
+
+  PlatformInit = MotePlatformP;
+  
+  MotePlatformP.SerialIdPin -> HplAtm128GeneralIOC.PortA4;
+  SubInit = MotePlatformP.SubInit;
+}
diff --git a/tos/platforms/micaz/MotePlatformP.nc b/tos/platforms/micaz/MotePlatformP.nc
new file mode 100644
index 00000000..3a29ac8a
--- /dev/null
+++ b/tos/platforms/micaz/MotePlatformP.nc
@@ -0,0 +1,41 @@
+/* $Id: MotePlatformP.nc,v 1.5 2008-06-26 03:38:27 regehr Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * The micaZ portion of a mica-family initialisation that is
+ * mote-specific.
+ * 
+ * @author David Gay
+ */
+module MotePlatformP @safe()
+{
+  provides interface Init as PlatformInit;
+  uses interface GeneralIO as SerialIdPin;
+  uses interface Init as SubInit;
+}
+implementation {
+
+  command error_t PlatformInit.init() {
+    // Pull C I/O port pins low
+    PORTC = 0;
+    DDRC = 0xff;
+
+    // Prevent sourcing current
+    call SerialIdPin.makeInput(); 
+    call SerialIdPin.clr();
+
+    return call SubInit.init();
+  }
+
+  default command error_t SubInit.init() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/micaz/TimeSyncMessageC.nc b/tos/platforms/micaz/TimeSyncMessageC.nc
new file mode 100644
index 00000000..e9796445
--- /dev/null
+++ b/tos/platforms/micaz/TimeSyncMessageC.nc
@@ -0,0 +1,93 @@
+// $Id: TimeSyncMessageC.nc,v 1.3 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *
+ * The Active Message layer on the micaz platform. This is a naming wrapper
+ * around the CC2420 Active Message layer that implemets timesync interface (TEP 133).
+ *
+ * @author Philip Levis
+ * @author Brano Kusy
+ * @date June 19 2005
+ */
+
+configuration TimeSyncMessageC {
+  provides
+  {
+    interface SplitControl;
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface LowPowerListening;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+
+    interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[am_id_t id];
+    interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+
+    interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+    interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+  }
+}
+implementation {
+  components CC2420TimeSyncMessageC as AM;
+
+  SplitControl = AM;
+
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+  LowPowerListening = AM;
+  TimeSyncAMSend32khz       = AM;
+  TimeSyncAMSendMilli       = AM;
+  TimeSyncPacket32khz       = AM;
+  TimeSyncPacketMilli       = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
\ No newline at end of file
diff --git a/tos/platforms/micaz/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/micaz/chips/cc2420/HplCC2420AlarmC.nc
new file mode 100644
index 00000000..3db4e148
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/HplCC2420AlarmC.nc
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * A platform independent abstraction of an asynchronous 32KHz, 16-bit
+ * timer for the CC2420. As these timers (the Alarm interface) are
+ * usually part of an HAL, they are platform specific. But as the
+ * CC2420 needs to be cross-platform, this component bridges between
+ * the two, providing a platform-independent abstraction of
+ * CC2420-specific Alarm. This is a Atmega128 implementation that
+ * uses the Compare1A register.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:54 $
+ */
+
+#include "Atm128Timer.h"
+
+generic configuration HplCC2420AlarmC() {
+  provides interface Alarm<T32khz, uint32_t>;
+  provides interface Init;
+}
+
+implementation {
+  components new Alarm32khz32C(), NoInitC;
+
+  Init = NoInitC;
+  Alarm = Alarm32khz32C;
+}
diff --git a/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsC.nc
new file mode 100644
index 00000000..7f8a7ce5
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2007-04-30 17:31:08 $
+ */
+
+configuration HplCC2420InterruptsC {
+
+  provides interface GpioCapture as CaptureSFD;
+  provides interface GpioInterrupt as InterruptCCA;
+  provides interface GpioInterrupt as InterruptFIFOP;
+
+}
+
+implementation {
+
+  components new Atm128GpioCaptureC() as CaptureSFDC;
+  components HplAtm128Timer1C as Timer1C;
+  CaptureSFD = CaptureSFDC;
+  CaptureSFDC.Atm128Capture -> Timer1C.Capture;
+
+  components new Atm128GpioInterruptC() as InterruptFIFOPC;
+  components HplAtm128InterruptC as Interrupts;
+  InterruptFIFOP = InterruptFIFOPC;
+  InterruptFIFOPC.Atm128Interrupt -> Interrupts.Int6;
+
+  components HplCC2420InterruptsP;
+  components HplCC2420PinsC;
+  InterruptCCA   = HplCC2420InterruptsP.CCA;
+  HplCC2420InterruptsP.CC_CCA -> HplCC2420PinsC.CCA;
+  
+}
diff --git a/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsP.nc b/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsP.nc
new file mode 100644
index 00000000..574cb280
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/HplCC2420InterruptsP.nc
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * MicaZ implementation of the CC2420 interrupts. FIFOP is a real
+ * interrupt, while CCA and FIFO are emulated through timer polling.
+ * <pre>
+ *  $Id: HplCC2420InterruptsP.nc,v 1.6 2008-06-26 04:39:12 regehr Exp $
+ * <pre>
+ *
+ * @author Philip Levis
+ * @author Matt Miller
+ * @author David Moss
+ * @version @version $Revision: 1.6 $ $Date: 2008-06-26 04:39:12 $
+ */
+
+module HplCC2420InterruptsP @safe() {
+  provides {
+    interface GpioInterrupt as CCA;
+  }
+  
+  uses {
+    interface GeneralIO as CC_CCA;
+  }
+}
+implementation {
+
+  norace uint8_t ccaWaitForState;
+  
+  norace uint8_t ccaLastState;
+  
+  bool ccaCheckDisabled = FALSE;
+
+  // ************* CCA Interrupt handlers and dispatch *************
+  
+  /**
+   * enable an edge interrupt on the CCA pin
+   * NOT an interrupt in MICAz. Implement as a task polled pin monitor
+   */
+
+  task void CCATask() {
+    uint8_t CCAState;
+    atomic {
+      if (ccaCheckDisabled) {
+        return;
+      }
+    }
+    
+    //check CCA state
+    CCAState = call CC_CCA.get(); //get current state here if waiting for edge
+    if ((ccaLastState != ccaWaitForState) && (CCAState == ccaWaitForState)) {
+      signal CCA.fired();
+    }
+    
+    //if CCA Pin is correct and edge found
+    //repost task and try again
+    ccaLastState = CCAState;
+    post CCATask();
+  }
+  
+  async command error_t CCA.enableRisingEdge() { 
+    atomic ccaWaitForState = TRUE; //save the state we are waiting for
+    atomic ccaCheckDisabled = FALSE;
+    ccaLastState = call CC_CCA.get(); //get current state
+    post CCATask();
+    return SUCCESS;
+  }
+
+  async command error_t CCA.enableFallingEdge() { 
+    atomic ccaWaitForState = FALSE; //save the state we are waiting for
+    atomic ccaCheckDisabled = FALSE;
+    ccaLastState = call CC_CCA.get(); //get current state
+    post CCATask();
+    return SUCCESS;
+  }
+  
+  async command error_t CCA.disable() {
+    atomic ccaCheckDisabled = TRUE;
+    return SUCCESS;
+  }
+
+
+  /***************** Defaults ****************/
+  default async event void CCA.fired() {
+  }
+
+}
+
diff --git a/tos/platforms/micaz/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/micaz/chips/cc2420/HplCC2420PinsC.nc
new file mode 100644
index 00000000..e44d10ce
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/HplCC2420PinsC.nc
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Mapping the CC2420 pins to Atmega128 pins for the micaZ platform.
+ * Information on the function of these pins can be found on pages
+ * 14-15 of the CC2420 datasheet (rev 1.2).
+ *
+ * <pre>
+ * $Id: HplCC2420PinsC.nc,v 1.6 2010-06-29 22:07:54 scipio Exp $
+ * </pre>
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:54 $
+ */
+
+configuration HplCC2420PinsC {
+  provides {
+    interface GeneralIO as CCA;
+    interface GeneralIO as CSN;
+    interface GeneralIO as FIFO;
+    interface GeneralIO as FIFOP;
+    interface GeneralIO as RSTN;
+    interface GeneralIO as SFD;
+    interface GeneralIO as VREN;
+  }
+}
+
+implementation {
+
+  components HplAtm128GeneralIOC as IO;
+  
+  CCA    = IO.PortD6;
+  CSN    = IO.PortB0;
+  FIFO   = IO.PortB7;
+  FIFOP  = IO.PortE6;
+  RSTN   = IO.PortA6;
+  SFD    = IO.PortD4;
+  VREN   = IO.PortA5;
+
+}
diff --git a/tos/platforms/micaz/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/micaz/chips/cc2420/HplCC2420SpiC.nc
new file mode 100644
index 00000000..9ee1efdc
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/HplCC2420SpiC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2008-04-24 22:31:25 $
+ */
+
+generic configuration HplCC2420SpiC() {
+
+  provides interface Init;
+  provides interface Resource;
+
+  provides interface SpiByte;
+  provides interface SpiPacket;
+
+}
+
+implementation {
+
+  components Atm128SpiC, HplCC2420SpiP, HplAtm128GeneralIOC as IO;
+
+  Init = Atm128SpiC;
+  Resource = HplCC2420SpiP;
+  HplCC2420SpiP.SubResource -> Atm128SpiC.Resource[ unique("Atm128SpiC.Resource") ];
+  HplCC2420SpiP.SS -> IO.PortB0;  // Slave set line
+  SpiByte = Atm128SpiC;
+  SpiPacket = Atm128SpiC;
+
+}
diff --git a/tos/platforms/micaz/chips/cc2420/HplCC2420SpiP.nc b/tos/platforms/micaz/chips/cc2420/HplCC2420SpiP.nc
new file mode 100644
index 00000000..a9104fd5
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/HplCC2420SpiP.nc
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2005 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Automatic slave select update for the SpiResource
+ *
+ * @author Miklos Maroti
+ */
+
+module HplCC2420SpiP @safe()
+{
+	provides interface Resource;
+  
+	uses
+	{
+		interface Resource as SubResource;	// raw SPI resource
+		interface GeneralIO as SS;			// Slave set line
+	}
+}
+
+implementation
+{
+	async command error_t Resource.request()
+	{
+		return call SubResource.request();
+	}
+
+	async command error_t Resource.immediateRequest()
+	{
+		error_t error = call SubResource.immediateRequest();
+		if( error == SUCCESS )
+		{
+			call SS.makeOutput();
+			call SS.clr();
+		}
+		return error;
+	}
+
+	event void SubResource.granted()
+	{
+		call SS.makeOutput();
+		call SS.clr();
+
+		signal Resource.granted();
+	}
+	
+	async command error_t Resource.release()
+	{
+		if( call SubResource.isOwner() )
+			call SS.set();
+
+		return call SubResource.release();
+	}
+
+	async command bool Resource.isOwner()
+	{
+		return call SubResource.isOwner();
+	}
+}
diff --git a/tos/platforms/micaz/chips/cc2420/sim/SimAtm128SpiDeviceC.nc b/tos/platforms/micaz/chips/cc2420/sim/SimAtm128SpiDeviceC.nc
new file mode 100644
index 00000000..19fc830c
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/sim/SimAtm128SpiDeviceC.nc
@@ -0,0 +1,73 @@
+/*                                                                      
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Configuration representing the SPI device of the CC2420 for the micaZ
+ * platform. The basic mapping is this:
+ *  <ul>
+ *   <li>the platform independent chips/CC2420 maps to HplCC2420SpiC;</li>
+ *   <li>HplCC2420SpiC on the micaZ maps to Atm128SpiC;</li>
+ *   <li>under TOSSIM Atm128SpiC maps to SimAtm128SpiDeviceC;</li>
+ *   <li>SimAtm128SpiDeviceC maps to the actual simulation implementation in micaz/chips/cc2420/sim</li>
+ *  </ul>
+ *
+ * @author Philip Levis
+ * @date   November 22 2005
+ */
+
+configuration SimAtm128SpiDeviceC {
+
+  provides interface Init;
+  provides interface Resource[uint8_t];
+  provides interface SPIByte;
+  provides interface SPIPacket;
+
+  uses interface Resource as SubResource[uint8_t];
+  uses interface ArbiterInfo;
+  uses interface McuPowerState;
+  
+}
+
+implementation {
+
+  components SimCC2420C;
+
+  Init = SimCC2420C;
+  Resource = SimCC2420C.SpiResource;
+  SPIByte = SimCC2420C;
+  SPIPacket = SimCC2420C;
+
+  SubResource = SimCC2420C.SubSpiResource;
+  ArbiterInfo = SimCC2420C;
+  McuPowerState = SimCC2420C;
+  
+}
diff --git a/tos/platforms/micaz/chips/cc2420/sim/SimCC2420C.nc b/tos/platforms/micaz/chips/cc2420/sim/SimCC2420C.nc
new file mode 100644
index 00000000..2e74a51f
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420/sim/SimCC2420C.nc
@@ -0,0 +1,74 @@
+/*                                                                      
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Simulated implementation of the CC2420 radio chip. It is an
+ * SPI end point, and also signals some interrupts/GPIO pins.\
+ * This is a pretty complicated component, so be aware that it
+ * may be very helpful to have the CC2420 data sheet nearby.
+ *
+ * @author Philip Levis
+ * @date   November 22 2005
+ */
+
+module SimCC2420C {
+
+  provides {
+    interface Init;
+    interface Resource[uint8_t] as SpiResource;
+    interface SPIByte;
+    interface SPIPacket;
+    interface GeneralIO as CCA;
+    interface GeneralIO as CSN;
+    interface GeneralIO as FIFO;
+    interface GeneralIO as FIFOP;
+    interface GeneralIO as RSTN;
+    interface GeneralIO as SFD;
+    interface GeneralIO as VREN;
+    interface GpioCapture as CaptureSFD;
+    interface GpioInterrupt as InterruptFIFOP;
+  }
+  
+  uses {
+    interface Resource[uint8_t] as SubSpiResource;
+    interface ArbiterInfo as SpiUser;
+    interface McuPowerState;
+  }
+
+  
+}
+
+implementation {
+
+  
+  
+}
diff --git a/tos/platforms/micaz/chips/cc2420x/HplCc2420XC.nc b/tos/platforms/micaz/chips/cc2420x/HplCc2420XC.nc
new file mode 100644
index 00000000..78d44337
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420x/HplCc2420XC.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai
+ */
+
+configuration HplCC2420XC {
+	provides {
+		interface Resource as SpiResource;
+		interface FastSpiByte;
+		interface GeneralIO as CCA;
+		interface GeneralIO as CSN;
+		interface GeneralIO as FIFO;
+		interface GeneralIO as FIFOP;
+		interface GeneralIO as RSTN;
+		interface GeneralIO as SFD;
+		interface GeneralIO as VREN;
+		interface GpioCapture as SfdCapture;
+		interface GpioInterrupt as FifopInterrupt;
+		interface LocalTime<TRadio> as LocalTimeRadio;
+		interface Init;
+		interface Alarm<TRadio,uint16_t>;
+	}
+}
+implementation {
+
+	components Atm128SpiC, MotePlatformC, HplCC2420XSpiP, HplAtm128GeneralIOC as IO;
+
+	Init = Atm128SpiC;
+
+	SpiResource = HplCC2420XSpiP.Resource;
+	HplCC2420XSpiP.SubResource -> Atm128SpiC.Resource[ unique("Atm128SpiC.Resource") ];
+	HplCC2420XSpiP.SS -> IO.PortB0;
+	FastSpiByte = Atm128SpiC;
+
+	CCA    = IO.PortD6;
+	CSN    = IO.PortB0;
+	FIFO   = IO.PortB7;
+	FIFOP  = IO.PortE6;
+	RSTN   = IO.PortA6;
+	SFD    = IO.PortD4;
+	VREN   = IO.PortA5;
+
+	components new Atm128GpioCaptureC() as SfdCaptureC;
+	components HplAtm128Timer1C as Timer1C;
+	SfdCapture = SfdCaptureC;
+	SfdCaptureC.Atm128Capture -> Timer1C.Capture;
+
+	components new Atm128GpioInterruptC() as FifopInterruptC;
+  	components HplAtm128InterruptC as Interrupts;
+  	FifopInterrupt= FifopInterruptC;
+  	FifopInterruptC.Atm128Interrupt -> Interrupts.Int6;
+
+	components LocalTimeMicroC;
+	LocalTimeRadio = LocalTimeMicroC.LocalTime; 			
+
+	components new AlarmOne16C() as AlarmC;
+	Alarm = AlarmC;
+
+}
diff --git a/tos/platforms/micaz/chips/cc2420x/HplCc2420XSpiP.nc b/tos/platforms/micaz/chips/cc2420x/HplCc2420XSpiP.nc
new file mode 100644
index 00000000..09298829
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420x/HplCc2420XSpiP.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai
+ */ 
+
+module HplCC2420XSpiP @safe()
+{
+	provides interface Resource;
+  
+	uses
+	{
+		interface Resource as SubResource;
+		interface GeneralIO as SS;
+	}
+}
+
+implementation
+{
+	async command error_t Resource.request()
+	{
+		return call SubResource.request();
+	}
+
+	async command error_t Resource.immediateRequest()
+	{
+		error_t error = call SubResource.immediateRequest();
+		if( error == SUCCESS )
+		{
+			call SS.makeOutput();
+			call SS.clr();
+		}
+		return error;
+	}
+
+	event void SubResource.granted()
+	{
+		call SS.makeOutput();
+		call SS.clr();
+
+		signal Resource.granted();
+	}
+	
+	async command error_t Resource.release()
+	{
+		if( call SubResource.isOwner() )
+			call SS.set();
+
+		return call SubResource.release();
+	}
+
+	async command bool Resource.isOwner()
+	{
+		return call SubResource.isOwner();
+	}
+}
diff --git a/tos/platforms/micaz/chips/cc2420x/RadioConfig.h b/tos/platforms/micaz/chips/cc2420x/RadioConfig.h
new file mode 100644
index 00000000..7591f479
--- /dev/null
+++ b/tos/platforms/micaz/chips/cc2420x/RadioConfig.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2010, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai, Miklos Maroti
+ */ 
+
+#ifndef __RADIOCONFIG_H__
+#define __RADIOCONFIG_H__
+
+#include <Timer.h>
+#include <MicaTimer.h>
+#include <CC2420XDriverLayer.h>
+
+/* This is the default value of the PA_POWER field of the TXCTL register. */
+#ifndef CC2420X_DEF_RFPOWER
+#define CC2420X_DEF_RFPOWER	0
+#endif
+
+/* This is the default value of the CHANNEL field of the FSCTRL register. */
+#ifndef CC2420X_DEF_CHANNEL
+#define CC2420X_DEF_CHANNEL	11
+#endif
+
+/* The number of microseconds a sending micaz mote will wait for an acknowledgement */
+#ifndef SOFTWAREACK_TIMEOUT
+#define SOFTWAREACK_TIMEOUT	800
+#endif
+
+/**
+ * This is the timer type of the radio alarm interface
+ */
+typedef TThree TRadio;
+typedef uint16_t tradio_size;
+
+/**
+ * The number of radio alarm ticks per one microsecond (0.9216).
+ * We use integers and no parentheses just to make deputy happy.
+ * Ok, further hacks were required for deputy, I removed 00 from the
+ * beginning and end to be able to handle longer wait periods.
+ */
+#define RADIO_ALARM_MICROSEC	(73728UL / MHZ) * (1 << MICA_DIVIDE_THREE_FOR_MICRO_LOG2) / 10000UL
+
+/**
+ * The base two logarithm of the number of radio alarm ticks per one millisecond
+ */
+#define RADIO_ALARM_MILLI_EXP	(5 + MICA_DIVIDE_THREE_FOR_MICRO_LOG2)
+
+#endif//__RADIOCONFIG_H__
diff --git a/tos/platforms/micaz/hardware.h b/tos/platforms/micaz/hardware.h
new file mode 100644
index 00000000..f1b03cae
--- /dev/null
+++ b/tos/platforms/micaz/hardware.h
@@ -0,0 +1,77 @@
+/**                                                                     
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Alan Broad <abroad@xbow.com>
+ *  @author Matt Miller <mmiller@xbow.com>
+ *  @author Martin Turon <mturon@xbow.com>
+ *
+ *  $Id: hardware.h,v 1.8 2010-06-29 22:07:54 scipio Exp $
+ */
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#ifndef MHZ
+/* Clock rate is ~8MHz except if specified by user 
+   (this value must be a power of 2, see MicaTimer.h and MeasureClockC.nc) */
+#define MHZ 8
+#endif
+
+#include <atm128hardware.h>
+#include <Atm128Adc.h>
+#include <MicaTimer.h>
+
+// enum so components can override power saving,
+// as per TEP 112.
+enum {
+  TOS_SLEEP_NONE = ATM128_POWER_IDLE,
+};
+
+// A/D channels
+enum {
+  CHANNEL_THERMISTOR = ATM128_ADC_SNGL_ADC1    // normally unpopulated
+};
+
+#ifndef PLATFORM_BAUDRATE
+enum {
+  PLATFORM_BAUDRATE = 57600L
+};
+#endif
+
+#endif //HARDWARE_H
diff --git a/tos/platforms/micaz/mac/tkn154/Makefile.include b/tos/platforms/micaz/mac/tkn154/Makefile.include
new file mode 100644
index 00000000..45a02db9
--- /dev/null
+++ b/tos/platforms/micaz/mac/tkn154/Makefile.include
@@ -0,0 +1,4 @@
+CFLAGS += -I$(TOSDIR)/platforms/micaz/mac/tkn154 \
+	-I$(TOSDIR)/platforms/telosb/mac/tkn154 \
+	-I$(TOSDIR)/platforms/telosb/mac/tkn154/timer \
+	-I$(TOSDIR)/chips/cc2420_tkn154
diff --git a/tos/platforms/micaz/mac/tkn154/README.txt b/tos/platforms/micaz/mac/tkn154/README.txt
new file mode 100644
index 00000000..8b51e01a
--- /dev/null
+++ b/tos/platforms/micaz/mac/tkn154/README.txt
@@ -0,0 +1,12 @@
+This directory contains the TKN15.4 "platform glue" code for the micaz
+platform. Like the telos platform, micaz uses the CC2420 radio and in order not
+to maintain identical configuration files, the micaz platform pulls in (uses) some
+files from the platform/telosb/mac/tkn154 directory. This includes the central
+MAC configurations "Ieee802154BeaconEnabledC" and "Ieee802154NonBeaconEnabledC",
+to which the next higher layer will wire to.
+The ./Makefile.include file defines in which order the directories are parsed and
+should be included by any micaz application. 
+
+More information on TKN15.4 can be found here:
+tinyos-2.x/tos/lib/mac/tkn154/README.txt
+ 
diff --git a/tos/platforms/micaz/mac/tkn154/TKN154TimingP.nc b/tos/platforms/micaz/mac/tkn154/TKN154TimingP.nc
new file mode 100644
index 00000000..74197577
--- /dev/null
+++ b/tos/platforms/micaz/mac/tkn154/TKN154TimingP.nc
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * extraification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:29:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * In slotted CSMA-CA frames must be sent on backoff boundaries (slot width:
+ * 320 us). The MicaZ platform lacks a clock with sufficient precision and
+ * accuracy, i.e. for slotted CSMA-CA the timing is *not* standard compliant
+ * (this code is experimental)
+ */
+
+#include "TKN154_platform.h"
+module TKN154TimingP
+{
+  provides interface ReliableWait;
+  uses interface TimeCalc;
+  uses interface GetNow<bool> as CCA;
+  uses interface Alarm<T62500hz,uint32_t> as SymbolAlarm;
+  uses interface Leds;
+}
+implementation
+{
+  enum {
+    S_WAIT_OFF,
+    S_WAIT_RX,
+    S_WAIT_TX,
+    S_WAIT_BACKOFF,
+  };
+  uint8_t m_state = S_WAIT_OFF;
+
+  async command bool ReliableWait.ccaOnBackoffBoundary(uint32_t slot0)
+  {
+    // There is no point in trying
+    return (call CCA.getNow() ? 20: 0);
+  }
+
+  async command void ReliableWait.waitRx(uint32_t t0, uint32_t dt)
+  {
+    if (m_state != S_WAIT_OFF){
+      ASSERT(0);
+      return;
+    }
+    m_state = S_WAIT_RX;
+    call SymbolAlarm.startAt(t0 - 16, dt); // subtract 12 symbols required for Rx calibration
+  }
+
+  async command void ReliableWait.waitTx(uint32_t t0, uint32_t dt)
+  {
+    if (m_state != S_WAIT_OFF){
+      ASSERT(0);
+      return;
+    }
+    m_state = S_WAIT_TX;
+    call SymbolAlarm.startAt(t0 - 16, dt); // subtract 12 symbols required for Tx calibration
+  }
+    
+  async command void ReliableWait.waitBackoff(uint32_t dt)
+  {
+    if (m_state != S_WAIT_OFF){
+      ASSERT(0);
+      return;
+    }
+    m_state = S_WAIT_BACKOFF;
+    call SymbolAlarm.start(dt);
+  }
+
+  async event void SymbolAlarm.fired() 
+  {
+    switch (m_state)
+    {
+      case S_WAIT_RX: m_state = S_WAIT_OFF; signal ReliableWait.waitRxDone(); break;
+      case S_WAIT_TX: m_state = S_WAIT_OFF; signal ReliableWait.waitTxDone(); break;
+      case S_WAIT_BACKOFF: m_state = S_WAIT_OFF; signal ReliableWait.waitBackoffDone(); break;
+      default: ASSERT(0); break;
+    }
+  }
+}
diff --git a/tos/platforms/micaz/mac/tkn154/TKN154_platform.h b/tos/platforms/micaz/mac/tkn154/TKN154_platform.h
new file mode 100644
index 00000000..06f2e203
--- /dev/null
+++ b/tos/platforms/micaz/mac/tkn154/TKN154_platform.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.1 $
+ * $Date: 2009-05-18 16:29:56 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __TKN154_platform_H
+#define __TKN154_platform_H
+
+/**************************************************** 
+ * The following constants define guard times on MicaZ. 
+ * All values are in symbol time (1 symbol = 16 us)
+ */
+
+enum {
+  // the expected maximum time between calling a transmit() operation and
+  // the radio putting the first byte on the channel assuming no CSMA-CA
+  IEEE154_RADIO_TX_DELAY = 400,
+
+  // the expected maximum time between calling a receive() operation and the 
+  // the radio actually being put in receive mode
+  IEEE154_RADIO_RX_DELAY = 400,
+
+  // defines at what time the MAC payload for a beacon frame is assembled before
+  // the next scheduled beacon transmission time; the value must be smaller than 
+  // the beacon interval plus the time for preparing the Tx operation
+  BEACON_PAYLOAD_UPDATE_INTERVAL = 2500, 
+};
+
+#endif
+
diff --git a/tos/platforms/micaz/mac/tkn154/platform_message.h b/tos/platforms/micaz/mac/tkn154/platform_message.h
new file mode 100644
index 00000000..8aef7516
--- /dev/null
+++ b/tos/platforms/micaz/mac/tkn154/platform_message.h
@@ -0,0 +1,25 @@
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include <Serial.h>
+
+/* The following include pulls in the ieee154_header_t/ieee154_metadata_t definitions */
+#include <TKN154_MAC.h>
+
+/* TOSH_DATA_LENGTH should be the maximum length of the MAC payload */
+#define TOSH_DATA_LENGTH IEEE154_aMaxMACPayloadSize
+
+typedef union message_header {
+  ieee154_header_t ieee154;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union TOSRadioFooter {
+} message_footer_t;
+
+typedef union TOSRadioMetadata {
+  ieee154_metadata_t ieee154;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/micaz/platform.h b/tos/platforms/micaz/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/micaz/platform_message.h b/tos/platforms/micaz/platform_message.h
new file mode 100644
index 00000000..205d54ad
--- /dev/null
+++ b/tos/platforms/micaz/platform_message.h
@@ -0,0 +1,71 @@
+/* $Id: platform_message.h,v 1.6 2010-06-29 22:07:54 scipio Exp $
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific CC1000 packet structures.
+ *
+ * @author Philip Levis
+ * @date   May 16 2005
+ * Revision:  $Revision: 1.6 $
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "CC2420.h"
+#include "Serial.h"
+
+typedef union message_header {
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  cc2420_footer_t cc2420;
+} message_footer_t;
+
+typedef union message_metadata {
+  cc2420_metadata_t cc2420;
+  serial_metadata_t serial;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/micaz/sim/.platform b/tos/platforms/micaz/sim/.platform
new file mode 100644
index 00000000..15b025a9
--- /dev/null
+++ b/tos/platforms/micaz/sim/.platform
@@ -0,0 +1,42 @@
+#
+# FILE: micaz/.platform
+# 
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  And because of that, the current platform's include directory
+# must be specified, otherwise its search order is last instead of first.
+#
+# $Id: .platform,v 1.6 2009-11-14 02:12:39 razvanm Exp $
+#
+push( @includes, qw(
+
+  %T/platforms/micaz
+  %T/platforms/mica
+  %T/platforms/micaz/chips/cc2420
+  %T/chips/cc2420
+  %T/chips/atm128
+  %T/chips/atm128/adc
+  %T/chips/atm128/pins
+  %T/chips/atm128/spi
+  %T/chips/atm128/timer
+  %T/lib/power
+  %T/lib/timer
+  %T/lib/serial
+
+) );
+
+@opts = qw(
+
+  -fnesc-no-debug
+  -fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask
+
+);
+
+if (defined($ENV{"GCC"})) {
+  push @opts, "-gcc=$ENV{'GCC'}";
+} else {
+  push @opts, "-gcc=gcc";
+}
+push @opts, "-mingw-gcc" if $cygwin;
+
diff --git a/tos/platforms/micaz/sim/platform_hardware.h b/tos/platforms/micaz/sim/platform_hardware.h
new file mode 100644
index 00000000..af682e42
--- /dev/null
+++ b/tos/platforms/micaz/sim/platform_hardware.h
@@ -0,0 +1,65 @@
+/**                                                                     
+ *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
+ *  downloading, copying, installing or using the software you agree to
+ *  this license.  If you do not agree to this license, do not download,
+ *  install, copy or use the software.
+ *
+ *  Copyright (c) 2004-2005 Crossbow Technology, Inc.
+ *  Copyright (c) 2002-2003 Intel Corporation.
+ *  Copyright (c) 2000-2003 The Regents of the University  of California.    
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Jason Hill, Philip Levis, Nelson Lee, David Gay
+ *  @author Alan Broad <abroad@xbow.com>
+ *  @author Matt Miller <mmiller@xbow.com>
+ *  @author Martin Turon <mturon@xbow.com>
+ *
+ *  $Id: platform_hardware.h,v 1.6 2010-06-29 22:07:54 scipio Exp $
+ */
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#include <atm128hardware.h>
+#include <Atm128Adc.h>
+
+// A/D constants (channels, etc)
+enum {
+  CHANNEL_RSSI       = ATM128_ADC_SNGL_ADC0,
+  CHANNEL_THERMISTOR = ATM128_ADC_SNGL_ADC1,    // normally unpopulated
+  CHANNEL_BATTERY    = ATM128_ADC_SNGL_ADC7,
+  CHANNEL_BANDGAP    = 30,
+  CHANNEL_GND        = 31,
+//  ATM128_ADC_PRESCALE = ATM128_ADC_PRESCALE_64,  // normal mica2 prescaler value
+  ATM128_TIMER0_TICKSPPS = 32768,
+};
+
+
+#endif //HARDWARE_H
diff --git a/tos/platforms/mulle/.platform b/tos/platforms/mulle/.platform
new file mode 100755
index 00000000..2ceccd82
--- /dev/null
+++ b/tos/platforms/mulle/.platform
@@ -0,0 +1,66 @@
+push( @includes, qw(
+  %T/platforms/mulle/fix
+  %T/platforms/mulle
+  %T/platforms/mulle/chips/rf230
+  %T/chips/rf230
+  %T/lib/rfxlink/layers
+  %T/lib/rfxlink/util
+  %T/chips/at45db
+  %T/platforms/mulle/button
+  %T/platforms/mulle/lib
+  %T/platforms/mulle/softwarei2c
+  %T/platforms/mulle/softwarespi
+  %T/platforms/mulle/chips/rv8564
+  %T/platforms/mulle/chips/at45db
+  %T/platforms/mulle/chips/m16c62p
+  %T/platforms/mulle/chips/mma7261qt
+  %T/platforms/mulle/chips/ds2782
+  %T/platforms/mulle/system
+  %T/platforms/mulle/timers
+  %T/platforms/mulle/timers/stop
+  %T/platforms/mulle/timers/wait
+  %T/platforms/mulle/timers/rf230
+  %T/chips/m16c62p
+  %T/chips/m16c62p/control
+  %T/chips/m16c62p/adc
+  %T/chips/m16c62p/dac
+  %T/chips/m16c62p/pins
+  %T/chips/m16c62p/timer
+  %T/chips/m16c62p/uart
+  %T/chips/m16c62p/printf
+  %T/chips/mma7261qt
+  %T/chips/ds2782
+  %T/lib/power
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/diagmsg
+  %T/lib/net/Deluge
+) );
+
+@opts = qw(
+  -gcc=m32c-elf-gcc
+  -mcpu=m16c
+  -fnesc-target=env
+);
+
+
+# gcc-4.5.0/gcc/config/m32c/m32c.h
+# in the order of nesc/src/machine/env_machine.c
+$ENV{NESC_MACHINE}="".
+"big_endian=false " . # m16c is little endian only 
+"pcc_bitfield_type_matters=false " . # m32c.h (all)
+"empty_field_boundary=8 " .
+"structure_size_boundary=8 " . 
+"word_size=1 " .
+"pointer=2,1 " . # m32c.h (TARGET_A16 == m8 or m16c)
+"float=4,1 " . # m32c.h (all)
+"double=8,1 " . # m32c.h (all)
+"long_double=8,1 " . # m32c.h (all)
+"short=2,1 " . # m32c.h (all)
+"int=2,1 " . # m32c.h (all)
+"long=4,1 " . # m32c.h (all)
+"long_long=8,1 " . # m32c.h (all)
+"int1248_align=1,1,1,1 " .
+"wchar_size_size=2,2 " .
+"char_wchar_signed=true,true " . # m32c.h char defined
+"" # several undefined fields... 
diff --git a/tos/platforms/mulle/ActiveMessageC.nc b/tos/platforms/mulle/ActiveMessageC.nc
new file mode 100755
index 00000000..8d971825
--- /dev/null
+++ b/tos/platforms/mulle/ActiveMessageC.nc
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+configuration ActiveMessageC
+{
+	provides
+	{
+		interface SplitControl;
+
+		interface AMSend[uint8_t id];
+		interface Receive[uint8_t id];
+		interface Receive as Snoop[uint8_t id];
+		interface SendNotifier[am_id_t id];
+
+		interface Packet;
+		interface AMPacket;
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+#ifdef PACKET_LINK
+		interface PacketLink;
+#endif
+
+		interface PacketTimeStamp<TMicro, uint32_t> as PacketTimeStampMicro;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	components RF230ActiveMessageC as MessageC,
+		RF230SplitControlP,
+		new SystemClockControlC();
+
+	RF230SplitControlP.SplitControlOrig -> MessageC;
+	RF230SplitControlP.SystemClockControl -> SystemClockControlC;
+
+	SplitControl = RF230SplitControlP.SplitControl;
+
+	AMSend = MessageC;
+	Receive = MessageC.Receive;
+	Snoop = MessageC.Snoop;
+	SendNotifier = MessageC;
+
+	Packet = MessageC;
+	AMPacket = MessageC;
+
+	PacketAcknowledgements = MessageC;
+	LowPowerListening = MessageC;
+#ifdef PACKET_LINK
+	PacketLink = MessageC;
+#endif
+
+	PacketTimeStampMilli = MessageC;
+	PacketTimeStampMicro = MessageC;
+}
diff --git a/tos/platforms/mulle/DemoSensorC.nc b/tos/platforms/mulle/DemoSensorC.nc
new file mode 100755
index 00000000..eae5ccaf
--- /dev/null
+++ b/tos/platforms/mulle/DemoSensorC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Demo sensor that connects to the AN0 channel on the MCU. This can
+ * easily be used together with the potentiometer on the Mulle
+ * expansionboard.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+generic configuration DemoSensorC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation
+{
+  components new AdcReadC(M16c62p_ADC_CHL_AN0,
+                          M16c62p_ADC_PRECISION_10BIT,
+                          M16c62p_ADC_PRESCALE_4);
+  components HplM16c62pGeneralIOC as IOs;
+
+  AdcReadC.Pin -> IOs.PortP100;
+  Read = AdcReadC;
+}
diff --git a/tos/platforms/mulle/DemoSensorNowC.nc b/tos/platforms/mulle/DemoSensorNowC.nc
new file mode 100644
index 00000000..0e6c7dbf
--- /dev/null
+++ b/tos/platforms/mulle/DemoSensorNowC.nc
@@ -0,0 +1,27 @@
+/**
+ * Demo sensor for the Mulle platform.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation {
+  components new AdcReadNowClientC(),
+             DemoSensorP,
+             HplM16c62pGeneralIOC as IOs,
+             RealMainP;
+
+  DemoSensorP.Pin -> IOs.PortP100;
+  DemoSensorP.AVcc -> IOs.PortP76;
+
+  ReadNow = AdcReadNowClientC;
+  Resource = AdcReadNowClientC;
+
+  AdcReadNowClientC.M16c62pAdcConfig -> DemoSensorP;
+
+  RealMainP.PlatformInit -> DemoSensorP;
+}
diff --git a/tos/platforms/mulle/DemoSensorP.nc b/tos/platforms/mulle/DemoSensorP.nc
new file mode 100644
index 00000000..d3242d7d
--- /dev/null
+++ b/tos/platforms/mulle/DemoSensorP.nc
@@ -0,0 +1,36 @@
+module DemoSensorP
+{
+  provides interface M16c62pAdcConfig;
+  provides interface Init;
+
+  uses interface GeneralIO as Pin;
+  uses interface GeneralIO as AVcc;
+}
+implementation
+{
+  command error_t Init.init()
+  {
+    call Pin.makeInput();
+    // TODO(henrik) This Vref should be turned on in connection to the A/D
+    // converter code and not here.
+    // Turn on the Vref
+    call AVcc.makeOutput();
+    call AVcc.set();
+  }
+
+  async command uint8_t M16c62pAdcConfig.getChannel()
+  {
+    // select the AN0 = P10_0 to potentiometer on the expansion board.
+    return M16c62p_ADC_CHL_AN0;
+  }
+
+  async command uint8_t M16c62pAdcConfig.getPrecision()
+  {
+    return M16c62p_ADC_PRECISION_10BIT;
+  }
+
+  async command uint8_t M16c62pAdcConfig.getPrescaler()
+  {
+    return M16c62p_ADC_PRESCALE_4;
+  }
+}
diff --git a/tos/platforms/mulle/DemoSensorStreamC.nc b/tos/platforms/mulle/DemoSensorStreamC.nc
new file mode 100644
index 00000000..49eb63b9
--- /dev/null
+++ b/tos/platforms/mulle/DemoSensorStreamC.nc
@@ -0,0 +1,35 @@
+/* $Id: DemoSensorStreamC.nc,v 1.4 2006/12/12 18:23:43 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for the Mulle platform.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @author David Gay
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new AdcReadStreamClientC(),
+             DemoSensorP,
+             HplM16c62pGeneralIOC as IOs,
+             RealMainP;
+
+  DemoSensorP.Pin -> IOs.PortP100;
+  DemoSensorP.AVcc -> IOs.PortP76;
+
+  ReadStream = AdcReadStreamClientC;
+
+  AdcReadStreamClientC.M16c62pAdcConfig -> DemoSensorP;
+
+  RealMainP.PlatformInit -> DemoSensorP;
+}
diff --git a/tos/platforms/mulle/Ieee154MessageC.nc b/tos/platforms/mulle/Ieee154MessageC.nc
new file mode 100644
index 00000000..56cc27ac
--- /dev/null
+++ b/tos/platforms/mulle/Ieee154MessageC.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2009, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+configuration Ieee154MessageC
+{
+	provides
+	{
+		interface SplitControl;
+
+		interface Ieee154Send;
+		interface Receive as Ieee154Receive;
+		interface SendNotifier;
+
+		interface Packet;
+		interface Ieee154Packet;
+		interface Resource as SendResource[uint8_t clint];
+
+		interface PacketAcknowledgements;
+		interface LowPowerListening;
+		interface PacketLink;
+		interface RadioChannel;
+
+		interface PacketTimeStamp<TMicro, uint32_t> as PacketTimeStampMicro;
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+	}
+}
+
+implementation
+{
+	components RF230Ieee154MessageC as MessageC;
+
+	SplitControl = MessageC;
+
+	Ieee154Send = MessageC;
+	Ieee154Receive = MessageC;
+	SendNotifier = MessageC;
+
+	Packet = MessageC;
+	Ieee154Packet = MessageC;
+	SendResource = MessageC;
+
+	PacketAcknowledgements = MessageC;
+	LowPowerListening = MessageC;
+	PacketLink = MessageC;
+	RadioChannel = MessageC;
+
+	PacketTimeStampMilli = MessageC;
+	PacketTimeStampMicro = MessageC;
+}
diff --git a/tos/platforms/mulle/PlatformC.nc b/tos/platforms/mulle/PlatformC.nc
new file mode 100755
index 00000000..82ef77ce
--- /dev/null
+++ b/tos/platforms/mulle/PlatformC.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * All the wiring of the Mulle platform components.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+
+  uses interface Init as SubInit;
+
+}
+implementation
+{
+  components
+    PlatformP,
+    LedsC,
+    M16c62pControlC,
+    new StopModeControlC();
+
+  Init = PlatformP.Init;
+  SubInit = PlatformP.SubInit;
+  PlatformP.M16c62pControl -> M16c62pControlC;
+
+  PlatformP.StopModeControl -> StopModeControlC;
+
+#ifdef ENABLE_STOP_MODE
+  components HplRV8564C, DS2782InternalC, RealMainP;
+  RealMainP.SoftwareInit -> PlatformP.StopModeInit;
+  PlatformP.RTC -> HplRV8564C;
+  PlatformP.HplDS2782 -> DS2782InternalC;
+  PlatformP.DS2782Control -> DS2782InternalC;
+#endif
+}
+
diff --git a/tos/platforms/mulle/PlatformLedsC.nc b/tos/platforms/mulle/PlatformLedsC.nc
new file mode 100755
index 00000000..0dbf006e
--- /dev/null
+++ b/tos/platforms/mulle/PlatformLedsC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Mulle platform-specific LED interface.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+configuration PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation
+{
+  components HplM16c62pGeneralIOC as IO;
+  components PlatformP;
+
+  Init = PlatformP.SubInit;
+
+  Led0 = IO.PortP36;  // Pin P3_6 = Red LED
+  Led1 = IO.PortP37;  // Pin P3_7 = Green LED
+  Led2 = IO.PortP34;  // External LED, supplied by user.
+}
diff --git a/tos/platforms/mulle/PlatformP.nc b/tos/platforms/mulle/PlatformP.nc
new file mode 100755
index 00000000..1a467ddd
--- /dev/null
+++ b/tos/platforms/mulle/PlatformP.nc
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Mulle platform initialization code.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "hardware.h"
+#include "rv8564.h"
+
+module PlatformP
+{
+  provides interface Init;
+  uses interface Init as SubInit;
+  uses interface M16c62pControl;
+  uses interface StopModeControl;
+#ifdef ENABLE_STOP_MODE
+  provides interface Init as StopModeInit;
+
+  uses interface HplRV8564 as RTC;
+  uses interface HplDS2782;
+  uses interface StdControl as DS2782Control;
+#endif
+}
+
+implementation
+{
+  command error_t Init.init()
+  {
+    error_t ok = SUCCESS;
+
+    ok = call M16c62pControl.init();
+
+    call StopModeControl.allowStopMode(false);
+
+    // Init the M16c/62p to run at 10MHz.
+    ok = ecombine (ok, call M16c62pControl.defaultSystemClock(MCU_SPEED_10MHz));
+
+    // Sub components initialization.
+    ok = ecombine(ok, call SubInit.init());
+
+    return SUCCESS;
+  }
+
+
+#ifdef ENABLE_STOP_MODE
+  task void enableStopMode();
+
+  command error_t StopModeInit.init()
+  {
+    // The task is needed so we can be sure that all underlying components 
+    // have been initialized, for example the I2C resource.
+    post enableStopMode();
+  }
+
+  task void enableStopMode()
+  {
+    call StopModeControl.allowStopMode(true);
+    // Allow the DS2782 to enter sleep
+    call DS2782Control.start();
+    call HplDS2782.allowSleep(true);
+    // Activate the RTC and set it to output 1024 tics on the CLKOUT pin
+    call RTC.enableCLKOUT();
+    call RTC.writeRegister(RV8564_CLKF, 0x81);  
+  }
+
+  task void stopDS2782()
+  {
+    call DS2782Control.stop();
+  }
+
+  async event void RTC.fired() {}
+  async event void RTC.readRegisterDone(error_t error, uint8_t val, uint8_t reg) {}
+  async event void RTC.writeRegisterDone(error_t error, uint8_t reg) {}
+
+  async event void HplDS2782.setConfigDone(error_t error) {return; }
+  async event void HplDS2782.allowSleepDone( error_t error ) { post stopDS2782(); }
+  async event void HplDS2782.measureTemperatureDone( error_t error, uint16_t val ){ return; }
+  async event void HplDS2782.measureVoltageDone( error_t error, uint16_t val ){ return; }
+  async event void HplDS2782.measureCurrentDone( error_t error, uint16_t val ){ return; }
+  async event void HplDS2782.measureAccCurrentDone( error_t error, uint16_t val ){ return; }
+  async event void HplDS2782.setOffsetBiasDone( error_t error ){ return; }
+  async event void HplDS2782.setAccOffsetBiasDone(error_t error){ return; }
+#endif
+}
diff --git a/tos/platforms/mulle/PlatformSerialC.nc b/tos/platforms/mulle/PlatformSerialC.nc
new file mode 100755
index 00000000..24caf351
--- /dev/null
+++ b/tos/platforms/mulle/PlatformSerialC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The wiring of the Serial interface used to communicate with the Mulle
+ * platform.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+configuration PlatformSerialC {
+  
+  provides interface StdControl;
+  provides interface UartStream;
+  provides interface UartByte;
+  
+}
+implementation {
+
+  components M16c62pUartC as Uart,
+      PlatformSerialP;
+      
+  StdControl = PlatformSerialP;
+  PlatformSerialP -> Uart.Uart1Control;
+  PlatformSerialP -> Uart.Uart1Stream;
+  UartStream = Uart.Uart1Stream;
+  UartByte = Uart.Uart1Byte;
+}
diff --git a/tos/platforms/mulle/PlatformSerialP.nc b/tos/platforms/mulle/PlatformSerialP.nc
new file mode 100644
index 00000000..c49ed173
--- /dev/null
+++ b/tos/platforms/mulle/PlatformSerialP.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Initialization of the PlatformSerial uart and a StdControl implementation
+ * for it.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+module PlatformSerialP
+{
+  provides interface StdControl;
+  
+  uses interface UartControl;
+  uses interface UartStream;
+}
+implementation
+{
+  command error_t StdControl.start()
+  {
+    call UartControl.setParity(TOS_UART_PARITY_NONE);
+    call UartControl.setNoStop();
+    call UartControl.setSpeed(TOS_UART_57600);
+    call UartControl.setDuplexMode(TOS_UART_DUPLEX);
+    call UartStream.enableReceiveInterrupt();
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop()
+  {
+    call UartControl.setDuplexMode(TOS_UART_OFF);
+    return SUCCESS;
+  }
+
+  async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ){}
+  async event void UartStream.receivedByte( uint8_t byte ){}
+  async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ){}
+}
diff --git a/tos/platforms/mulle/TimeSyncMessageC.nc b/tos/platforms/mulle/TimeSyncMessageC.nc
new file mode 100755
index 00000000..070a72f6
--- /dev/null
+++ b/tos/platforms/mulle/TimeSyncMessageC.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RadioConfig.h>
+
+configuration TimeSyncMessageC
+{
+	provides
+	{
+		interface SplitControl;
+
+		interface Receive[uint8_t id];
+		interface Receive as Snoop[am_id_t id];
+		interface Packet;
+		interface AMPacket;
+
+		interface PacketTimeStamp<TRadio, uint32_t> as PacketTimeStampRadio;
+		interface TimeSyncAMSend<TRadio, uint32_t> as TimeSyncAMSendRadio[am_id_t id];
+		interface TimeSyncPacket<TRadio, uint32_t> as TimeSyncPacketRadio;
+
+		interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+		interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+		interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+	}
+}
+
+implementation
+{
+	components RF230TimeSyncMessageC as MessageC,
+		RF230SplitControlP,
+		new SystemClockControlC();
+  
+	RF230SplitControlP.SplitControlOrig -> MessageC;
+	RF230SplitControlP.SystemClockControl -> SystemClockControlC;
+  
+	SplitControl = RF230SplitControlP.SplitControl;
+
+  	Receive		= MessageC.Receive;
+	Snoop		= MessageC.Snoop;
+	Packet		= MessageC;
+	AMPacket	= MessageC;
+
+	PacketTimeStampRadio	= MessageC;
+	TimeSyncAMSendRadio	= MessageC;
+	TimeSyncPacketRadio	= MessageC;
+
+	PacketTimeStampMilli	= MessageC;
+	TimeSyncAMSendMilli	= MessageC;
+	TimeSyncPacketMilli	= MessageC;
+}
diff --git a/tos/platforms/mulle/button/HplUserButtonC.nc b/tos/platforms/mulle/button/HplUserButtonC.nc
new file mode 100644
index 00000000..568cd636
--- /dev/null
+++ b/tos/platforms/mulle/button/HplUserButtonC.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the Mulle platform extension board.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+configuration HplUserButtonC {
+  provides interface GeneralIO;
+  provides interface GpioInterrupt;
+}
+implementation {
+  components  HplM16c62pInterruptC as Irqs,
+              HplM16c62pGeneralIOC as IOs,
+           new M16c62pInterruptC() as Irq;
+  
+  Irq -> Irqs.Int4;
+  GpioInterrupt = Irq;
+  GeneralIO = IOs.PortP16;
+}
diff --git a/tos/platforms/mulle/button/UserButton.h b/tos/platforms/mulle/button/UserButton.h
new file mode 100644
index 00000000..aef5eccb
--- /dev/null
+++ b/tos/platforms/mulle/button/UserButton.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ */
+
+/**
+ * Implementation of the user button for the Mulle platform
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#ifndef __USERBUTTON_H__
+#define __USERBUTTON_H__
+
+typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t;
+
+#endif
diff --git a/tos/platforms/mulle/button/UserButtonC.nc b/tos/platforms/mulle/button/UserButtonC.nc
new file mode 100644
index 00000000..8a06909a
--- /dev/null
+++ b/tos/platforms/mulle/button/UserButtonC.nc
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ */
+
+/**
+ * Implementation of the user button for the Mulle platform. Get
+ * returns the current state of the button by reading the pin,
+ * regardless of whether enable() or disable() has been called on the
+ * Interface. Notify.enable() and Notify.disable() modify the
+ * underlying interrupt state of the pin, and have the effect of
+ * enabling or disabling notifications that the button has changed
+ * state.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include <UserButton.h>
+
+configuration UserButtonC {
+  provides interface Get<button_state_t>;
+  provides interface Notify<button_state_t>;
+}
+implementation {
+  components HplUserButtonC;
+
+  components UserButtonP;
+  Get = UserButtonP;
+  Notify = UserButtonP;
+
+  UserButtonP.GeneralIO -> HplUserButtonC.GeneralIO;
+  UserButtonP.GpioInterrupt -> HplUserButtonC.GpioInterrupt;
+}
diff --git a/tos/platforms/mulle/button/UserButtonP.nc b/tos/platforms/mulle/button/UserButtonP.nc
new file mode 100644
index 00000000..042f3bec
--- /dev/null
+++ b/tos/platforms/mulle/button/UserButtonP.nc
@@ -0,0 +1,123 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ */
+
+/**
+ * Implementation of the user button for the Mulle platform extension board.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include <UserButton.h>
+
+module UserButtonP {
+  provides interface Get<button_state_t>;
+  provides interface Notify<button_state_t>;
+  
+  uses interface GeneralIO;
+  uses interface GpioInterrupt;
+}
+implementation {
+
+  task void notify()
+  {
+    signal Notify.notify(BUTTON_PRESSED);
+  }
+  	
+  command button_state_t Get.get()
+  { 
+    if ( call GeneralIO.get() )
+    {
+      return BUTTON_PRESSED;
+    } 
+    else 
+    {
+      return BUTTON_RELEASED;
+    }
+  }
+
+  command error_t Notify.enable()
+  {
+    call GeneralIO.clr();
+    call GeneralIO.makeInput();
+    return call GpioInterrupt.enableRisingEdge();
+  }
+
+  command error_t Notify.disable()
+  {
+    call GpioInterrupt.disable();
+    call GeneralIO.makeOutput();
+    call GeneralIO.clr();
+    return SUCCESS;
+  }
+
+  async event void GpioInterrupt.fired()
+  {
+    post notify();
+  }
+}
diff --git a/tos/platforms/mulle/chips/at45db/At45dbSpi.h b/tos/platforms/mulle/chips/at45db/At45dbSpi.h
new file mode 100644
index 00000000..78b29ce9
--- /dev/null
+++ b/tos/platforms/mulle/chips/at45db/At45dbSpi.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Unique identifier for the SPI used to communicate with the AT45DB chip.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+#ifndef __AT45DBSOFTSPI_H__
+#define __AT45DBSOFTSPI_H__
+
+#define UQ_MULLE_SOFTSPIAT45DB "SoftSPIAt45dbC.SoftSPIPacket"
+
+#endif // __AT45DBSOFTSPI_H__
diff --git a/tos/platforms/mulle/chips/at45db/HplAt45dbC.nc b/tos/platforms/mulle/chips/at45db/HplAt45dbC.nc
new file mode 100644
index 00000000..e49d1dc5
--- /dev/null
+++ b/tos/platforms/mulle/chips/at45db/HplAt45dbC.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Mulle specific wiring for the AT45DB161D Flash storage.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+configuration HplAt45dbC
+{
+  provides interface HplAt45db;
+}
+implementation
+{
+  components  new HplAt45dbByteC(10),
+              new SoftSpiAt45dbC() as Spi,
+              HplAt45dbP,
+              HplM16c62pGeneralIOC as IOs,
+              RealMainP,
+              BusyWaitMicroC;
+
+  HplAt45db = HplAt45dbByteC;
+
+  HplAt45dbByteC.Resource -> Spi;
+  HplAt45dbByteC.FlashSpi -> Spi;
+  HplAt45dbByteC.HplAt45dbByte -> HplAt45dbP;
+
+  HplAt45dbP.VCC -> IOs.PortP32;
+  HplAt45dbP.WP -> IOs.PortP44;
+  HplAt45dbP.Select -> IOs.PortP45;
+  HplAt45dbP.RESET -> IOs.PortP46;
+
+  HplAt45dbP.FlashSpi -> Spi;
+  HplAt45dbP.BusyWait -> BusyWaitMicroC;
+  RealMainP.SoftwareInit -> HplAt45dbP.Init;
+}
diff --git a/tos/platforms/mulle/chips/at45db/HplAt45dbP.nc b/tos/platforms/mulle/chips/at45db/HplAt45dbP.nc
new file mode 100644
index 00000000..dfa681b1
--- /dev/null
+++ b/tos/platforms/mulle/chips/at45db/HplAt45dbP.nc
@@ -0,0 +1,137 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2006, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Mulle specific HplAt45dbByte interface implementation
+ * for the AT45DB161D Flash storage.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+ 
+#include "m16c62p_printf.h"
+module HplAt45dbP
+{
+  provides
+  {
+    interface HplAt45dbByte;
+    interface Init;
+  }
+  uses
+  {
+    interface SpiByte as FlashSpi;
+    interface GeneralIO as VCC;
+    interface GeneralIO as Select;
+    interface GeneralIO as RESET;
+    interface GeneralIO as WP;
+    interface BusyWait<TMicro, uint16_t>;
+  }
+}
+implementation
+{
+  // TODO(Henrik) Move init code to a SplitControl interface and
+  //              change the busy wait into a TimerMilli.startOneShot.
+  command error_t Init.init() {
+  	call WP.makeOutput();
+  	call WP.set();
+  	call RESET.makeOutput();
+  	call RESET.set();
+    call Select.makeOutput();
+    call Select.set();
+    call VCC.makeOutput();
+    call VCC.clr();
+  	// The device needs 20ms before is accepts a write.
+  	call BusyWait.wait(20000);
+    return SUCCESS;
+  }
+
+  command void HplAt45dbByte.select() { call Select.clr(); }
+  command void HplAt45dbByte.deselect() { call Select.set(); }
+
+  task void idleTask()
+  {
+    uint8_t status;
+    status = call FlashSpi.write(0);
+    if (!(status & 0x80))
+    {
+      post idleTask();
+    }
+    else
+    {
+      signal HplAt45dbByte.idle();
+    }
+  }
+
+  command void HplAt45dbByte.waitIdle()
+  {
+    post idleTask();
+  }
+
+  command bool HplAt45dbByte.getCompareStatus()
+  {
+    uint8_t status;
+    status = call FlashSpi.write(0);
+    return (!(status & 0x40));
+  }
+}
diff --git a/tos/platforms/mulle/chips/at45db/HplAt45db_chip.h b/tos/platforms/mulle/chips/at45db/HplAt45db_chip.h
new file mode 100644
index 00000000..1cb17dd6
--- /dev/null
+++ b/tos/platforms/mulle/chips/at45db/HplAt45db_chip.h
@@ -0,0 +1,56 @@
+// $Id: HplAt45db_chip.h,v 1.1 2008/08/25 16:48:47 razvanm Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef __HPLAT45DB_CHIP_H__
+#define __HPLAT45DB_CHIP_H__
+
+// flash characteristics
+enum {
+  AT45_MAX_PAGES = 4096,
+  AT45_PAGE_SIZE = 528,
+  AT45_PAGE_SIZE_LOG2 = 9 // Ignores the last 16 bytes
+};
+
+typedef uint16_t at45page_t;
+typedef uint16_t at45pageoffset_t; // must fit 0 to AT45_PAGE_SIZE - 1
+
+#endif  // __HPLAT45DB_CHIP_H__
diff --git a/tos/platforms/mulle/chips/at45db/SoftSpiAt45dbC.nc b/tos/platforms/mulle/chips/at45db/SoftSpiAt45dbC.nc
new file mode 100755
index 00000000..96a627c8
--- /dev/null
+++ b/tos/platforms/mulle/chips/at45db/SoftSpiAt45dbC.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * A component that is going to use the Flash Spi bus should
+ * create a new component of this to get access to the bus.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "At45dbSpi.h"
+
+generic configuration SoftSpiAt45dbC()
+{
+  provides interface Resource;
+  provides interface SpiPacket;
+  provides interface SpiByte;
+}
+implementation
+{
+  enum
+  {
+    CLIENT_ID = unique(UQ_MULLE_SOFTSPIAT45DB),
+  };
+  
+  components SoftSpiAt45dbP as Spi;
+  Resource = Spi.Resource[CLIENT_ID];
+  SpiPacket = Spi.SpiPacket[CLIENT_ID]; 
+  SpiByte = Spi.SpiByte[CLIENT_ID]; 
+}
diff --git a/tos/platforms/mulle/chips/at45db/SoftSpiAt45dbP.nc b/tos/platforms/mulle/chips/at45db/SoftSpiAt45dbP.nc
new file mode 100755
index 00000000..9efbb3f0
--- /dev/null
+++ b/tos/platforms/mulle/chips/at45db/SoftSpiAt45dbP.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Wiring for the software Spi bus used by the Mulle Flash storage.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+configuration SoftSpiAt45dbP
+{
+  provides interface Resource[uint8_t client];
+  provides interface SpiPacket[uint8_t client];
+  provides interface SpiByte[uint8_t client];
+}
+implementation
+{
+  components new SoftSpiMasterP(UQ_MULLE_SOFTSPIAT45DB) as Spi,
+      new SoftSpiBusP(),
+      HplM16c62pGeneralIOC as IOs;
+  
+  // Init the software SPI bus
+  SoftSpiBusP.MISO -> IOs.PortP40;
+  SoftSpiBusP.MOSI -> IOs.PortP41;
+  SoftSpiBusP.SCLK -> IOs.PortP42;
+
+  Spi.SoftSpiBus -> SoftSpiBusP;
+
+  Resource  = Spi.Resource;
+  SpiPacket = Spi.SpiPacket;
+  SpiByte = Spi.SpiByte;
+
+}
diff --git a/tos/platforms/mulle/chips/ds2782/DS2782InternalC.nc b/tos/platforms/mulle/chips/ds2782/DS2782InternalC.nc
new file mode 100644
index 00000000..9bad3a29
--- /dev/null
+++ b/tos/platforms/mulle/chips/ds2782/DS2782InternalC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The DS2782 wiring on the Mulle.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+configuration DS2782InternalC
+{
+  provides interface StdControl;
+  provides interface HplDS2782;
+}
+
+implementation
+{
+  components new SoftwareI2C2C() as I2C,
+             new HplDS2782LogicP(0x34) as Logic,
+             DS2782InternalP,
+             HplM16c62pGeneralIOC as IOs;
+
+  Logic.I2CPacket -> I2C;
+  Logic.I2CResource -> I2C;
+  HplDS2782 = Logic;
+  StdControl = Logic;
+
+  DS2782InternalP.Pullup -> IOs.PortP75;
+  DS2782InternalP.ResourceDefaultOwner -> I2C;
+}
diff --git a/tos/platforms/mulle/chips/ds2782/DS2782InternalP.nc b/tos/platforms/mulle/chips/ds2782/DS2782InternalP.nc
new file mode 100644
index 00000000..6db69919
--- /dev/null
+++ b/tos/platforms/mulle/chips/ds2782/DS2782InternalP.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The DS2782 only goes to sleep if SDA and SCL are pulled low.
+ * So everytime the default owner of the resource becomes the
+ * owner of the I2C bus the pins are pulled low.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+module DS2782InternalP
+{
+  uses interface ResourceDefaultOwner;
+  uses interface GeneralIO as Pullup;
+}
+implementation
+{
+  async event void ResourceDefaultOwner.granted()
+  {
+    call Pullup.clr();
+  }
+
+  async event void ResourceDefaultOwner.requested()
+  {
+    call Pullup.set(); 
+    call ResourceDefaultOwner.release();
+  }
+
+  async event void ResourceDefaultOwner.immediateRequested()
+  {
+    call Pullup.set();
+    call ResourceDefaultOwner.release();
+  }
+}
diff --git a/tos/platforms/mulle/chips/m16c62p/M16c62pAdcPlatformC.nc b/tos/platforms/mulle/chips/m16c62p/M16c62pAdcPlatformC.nc
new file mode 100644
index 00000000..5765fbe2
--- /dev/null
+++ b/tos/platforms/mulle/chips/m16c62p/M16c62pAdcPlatformC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Mulle specific implementation of the M16c62pAdcPlatform interface.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+configuration M16c62pAdcPlatformC
+{
+  provides interface M16c62pAdcPlatform;
+}
+implementation
+{
+  components M16c62pAdcPlatformP, HplM16c62pGeneralIOC as IOs;
+
+  M16c62pAdcPlatform = M16c62pAdcPlatformP;
+  M16c62pAdcPlatformP -> IOs.PortP76;
+}
diff --git a/tos/platforms/mulle/chips/m16c62p/M16c62pAdcPlatformP.nc b/tos/platforms/mulle/chips/m16c62p/M16c62pAdcPlatformP.nc
new file mode 100644
index 00000000..02e7b620
--- /dev/null
+++ b/tos/platforms/mulle/chips/m16c62p/M16c62pAdcPlatformP.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Mulle specific implementation of the M16c62pAdcPlatform interface.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+module M16c62pAdcPlatformP
+{
+  provides interface M16c62pAdcPlatform;
+  uses interface GeneralIO VRef;
+}
+implementation
+{
+  async command void M16c62pAdcPlatform.adcOn()
+  {
+    call VRef.makeOutput();
+    call VRef.set();
+  }
+  
+  async command void M16c62pAdcPlatform.adcOff()
+  {
+    call VRef.clr();
+  }
+}
diff --git a/tos/platforms/mulle/chips/m16c62p/M16c62pControlPlatformC.nc b/tos/platforms/mulle/chips/m16c62p/M16c62pControlPlatformC.nc
new file mode 100644
index 00000000..e71a862a
--- /dev/null
+++ b/tos/platforms/mulle/chips/m16c62p/M16c62pControlPlatformC.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Mulle specific implementation of the M16c62pControlPlatform interface.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+module M16c62pControlPlatformC
+{
+  provides interface M16c62pControlPlatform;
+}
+implementation
+{
+  async command void M16c62pControlPlatform.PLLOn()
+  {
+    // Set all timers that uses the main clock
+    // as source to use F2 instead of F1 because
+    // the main clock will be twice as fast when PLL
+    // is on.
+    // Set the UARTS clock source to F2 instead of F1.
+
+    // NOTE: No need to turn on/off protections for registers,
+    // this is handeled by the caller of this code.
+    CLR_BIT(PCLKR.BYTE, 0); // Timers
+    CLR_BIT(PCLKR.BYTE, 1); // Uarts
+  }
+
+  async command void M16c62pControlPlatform.PLLOff()
+  {
+    // Restore settings done in PLLOn()
+    // NOTE: No need to turn on/off protections for registers,
+    // this is handeled by the caller of this code.
+    SET_BIT(PCLKR.BYTE, 0);
+    SET_BIT(PCLKR.BYTE, 1);
+  }
+}
diff --git a/tos/platforms/mulle/chips/m16c62p/M16c62pUartCounterPlatformC.nc b/tos/platforms/mulle/chips/m16c62p/M16c62pUartCounterPlatformC.nc
new file mode 100644
index 00000000..c611efd8
--- /dev/null
+++ b/tos/platforms/mulle/chips/m16c62p/M16c62pUartCounterPlatformC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Micro counter provided by Mulle for the M16c62p uart implementation.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+configuration M16c62pUartCounterPlatformC
+{
+  provides interface Counter<TMicro, uint16_t>;
+}
+implementation
+{
+  components CounterMicro16C;
+
+  Counter = CounterMicro16C;
+}
diff --git a/tos/platforms/mulle/chips/mma7261qt/HplMMA7261QTC.nc b/tos/platforms/mulle/chips/mma7261qt/HplMMA7261QTC.nc
new file mode 100644
index 00000000..61c3ea41
--- /dev/null
+++ b/tos/platforms/mulle/chips/mma7261qt/HplMMA7261QTC.nc
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * MMA7261QT configuration.
+ *
+ * @author Henrik Makitaavola
+ */
+
+configuration HplMMA7261QTC
+{
+  provides interface Read<uint16_t> as AccelX;
+  provides interface Read<uint16_t> as AccelY;
+  provides interface Read<uint16_t> as AccelZ;
+  
+  provides interface GeneralIO as Sleep;
+  provides interface GeneralIO as GSelect1;
+  provides interface GeneralIO as GSelect2;
+}
+implementation
+{
+  components new AdcReadClientC() as _AccelX, 
+             new AdcReadClientC() as _AccelY,
+             new AdcReadClientC() as _AccelZ,
+             HplM16c62pGeneralIOC as IOs,
+             HplMMA7261QTP;
+             
+  HplMMA7261QTP.VCC -> IOs.PortP76;
+  HplMMA7261QTP.Sleep -> IOs.PortP12;
+  HplMMA7261QTP.GSelect1 -> IOs.PortP30;
+  HplMMA7261QTP.GSelect2 -> IOs.PortP31;
+  HplMMA7261QTP.AccelXPort -> IOs.PortP105;
+  HplMMA7261QTP.AccelYPort -> IOs.PortP104;
+  HplMMA7261QTP.AccelZPort -> IOs.PortP103;
+  
+  Sleep = IOs.PortP12;
+  GSelect1 = IOs.PortP30;
+  GSelect2 = IOs.PortP31;
+  
+  _AccelX.M16c62pAdcConfig -> HplMMA7261QTP.AccelXConf;
+  _AccelY.M16c62pAdcConfig -> HplMMA7261QTP.AccelYConf;
+  _AccelZ.M16c62pAdcConfig -> HplMMA7261QTP.AccelZConf;
+  
+  AccelX = _AccelX;
+  AccelY = _AccelY;
+  AccelZ = _AccelZ;
+  
+  components RealMainP;
+  RealMainP.PlatformInit -> HplMMA7261QTP.Init;
+  
+}
diff --git a/tos/platforms/mulle/chips/mma7261qt/HplMMA7261QTP.nc b/tos/platforms/mulle/chips/mma7261qt/HplMMA7261QTP.nc
new file mode 100644
index 00000000..45eb0123
--- /dev/null
+++ b/tos/platforms/mulle/chips/mma7261qt/HplMMA7261QTP.nc
@@ -0,0 +1,131 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * MMA7261QT implementation.
+ *
+ * @author Henrik Makitaavola
+ */
+
+module HplMMA7261QTP
+{
+  provides
+  {
+    interface Init;
+    interface M16c62pAdcConfig as AccelXConf;
+    interface M16c62pAdcConfig as AccelYConf;
+    interface M16c62pAdcConfig as AccelZConf;
+  }
+  
+  uses
+  {
+    interface GeneralIO as VCC;
+    interface GeneralIO as Sleep;
+    interface GeneralIO as GSelect1;
+    interface GeneralIO as GSelect2;
+    interface GeneralIO as AccelXPort;
+    interface GeneralIO as AccelYPort;
+    interface GeneralIO as AccelZPort;
+  }
+}
+implementation
+{
+  command error_t Init.init()
+  {
+    call VCC.makeOutput();
+    call VCC.set();
+    call Sleep.makeOutput();
+    call Sleep.clr();
+    call GSelect1.makeOutput();
+    call GSelect1.clr();
+    call GSelect2.makeOutput();
+    call GSelect2.clr();
+    call AccelXPort.makeInput();
+    call AccelXPort.clr();
+    call AccelYPort.makeInput();
+    call AccelYPort.clr();
+    call AccelZPort.makeInput();
+    call AccelZPort.clr();
+  }
+  
+  inline uint8_t prescaler() { return M16c62p_ADC_PRESCALE_4; }
+  inline uint8_t precision() { return M16c62p_ADC_PRECISION_8BIT; }
+  
+  async command uint8_t AccelXConf.getChannel()
+  {
+    return M16c62p_ADC_CHL_AN5;
+  }
+
+  async command uint8_t AccelXConf.getPrecision()
+  {
+    return precision();
+  }
+
+  async command uint8_t AccelXConf.getPrescaler()
+  {
+    return prescaler();
+  }
+  
+    async command uint8_t AccelYConf.getChannel()
+  {
+    return M16c62p_ADC_CHL_AN4;
+  }
+
+  async command uint8_t AccelYConf.getPrecision()
+  {
+    return precision();
+  }
+
+  async command uint8_t AccelYConf.getPrescaler()
+  {
+    return prescaler();
+  }
+  
+  async command uint8_t AccelZConf.getChannel()
+  {
+    return M16c62p_ADC_CHL_AN3;
+  }
+
+  async command uint8_t AccelZConf.getPrecision()
+  {
+    return precision();
+  }
+
+  async command uint8_t AccelZConf.getPrescaler()
+  {
+    return prescaler();
+  }
+}
diff --git a/tos/platforms/mulle/chips/rf230/HplRF230C.nc b/tos/platforms/mulle/chips/rf230/HplRF230C.nc
new file mode 100755
index 00000000..c413b06b
--- /dev/null
+++ b/tos/platforms/mulle/chips/rf230/HplRF230C.nc
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Mulle specific wiring of the HplRF230C configuration.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+ 
+#include <RadioConfig.h>
+
+configuration HplRF230C
+{
+  provides
+  {
+    interface GeneralIO as SELN;
+    interface Resource as SpiResource;
+    interface SpiByte;
+    interface FastSpiByte;
+
+    interface GeneralIO as SLP_TR;
+    interface GeneralIO as RSTN;
+
+    interface GpioCapture as IRQ;
+    interface Alarm<TRadio, uint16_t> as Alarm;
+    interface LocalTime<TRadio> as LocalTimeRadio;
+  }
+}
+implementation
+{
+  components HplRF230P;
+  IRQ = HplRF230P.IRQ;
+
+  components new SoftSpiRF230C() as Spi;
+  HplRF230P.Spi -> Spi;
+  SpiResource = Spi;
+  SpiByte = Spi;
+  FastSpiByte = HplRF230P.FastSpiByte;
+
+  components HplM16c62pGeneralIOC as IOs;
+  HplRF230P.PortVCC -> IOs.PortP77;
+  HplRF230P.PortIRQ -> IOs.PortP83;
+  SLP_TR = IOs.PortP07;
+  RSTN = IOs.PortP43;
+  SELN = IOs.PortP35;
+
+  components  HplM16c62pInterruptC as Irqs,
+      new M16c62pInterruptC() as Irq;
+  HplRF230P.GIRQ -> Irq;
+  Irq -> Irqs.Int1;
+
+  components AlarmRF23016C as AlarmRF230;
+  HplRF230P.Alarm -> AlarmRF230;
+  Alarm = AlarmRF230;
+
+  components PlatformP;
+  PlatformP.SubInit -> HplRF230P.PlatformInit;
+    
+  components LocalTimeMicroC;
+  LocalTimeRadio = LocalTimeMicroC;
+}
diff --git a/tos/platforms/mulle/chips/rf230/HplRF230P.nc b/tos/platforms/mulle/chips/rf230/HplRF230P.nc
new file mode 100755
index 00000000..4891c5e9
--- /dev/null
+++ b/tos/platforms/mulle/chips/rf230/HplRF230P.nc
@@ -0,0 +1,255 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the time capture on RF230 interrupt and the
+ * FastSpiBus interface.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+module HplRF230P
+{
+  provides
+  {
+    interface GpioCapture as IRQ;
+    interface Init as PlatformInit;
+    interface FastSpiByte;
+  }
+
+  uses
+  {
+    interface GeneralIO as PortIRQ;
+    interface GeneralIO as PortVCC;
+    interface GpioInterrupt as GIRQ;
+    interface SoftSpiBus as Spi;
+    interface Alarm<TRadio, uint16_t> as Alarm;
+  }
+}
+implementation
+{
+  command error_t PlatformInit.init()
+  {
+    call PortIRQ.makeInput(); 
+    call PortIRQ.clr();
+    call GIRQ.disable();
+    call PortVCC.makeOutput(); 
+    call PortVCC.set(); 
+
+    return SUCCESS;
+  }
+
+  async event void GIRQ.fired()
+  {
+    signal IRQ.captured(call Alarm.getNow());
+  }
+  async event void Alarm.fired() {}
+
+  default async event void IRQ.captured(uint16_t time) {}
+
+  async command error_t IRQ.captureRisingEdge()
+  {
+    call GIRQ.enableRisingEdge();
+    return SUCCESS;
+  }
+
+  async command error_t IRQ.captureFallingEdge()
+  {
+    // falling edge comes when the IRQ_STATUS register of the RF230 is read
+    return FAIL;	
+  }
+
+  async command void IRQ.disable()
+  {
+    call GIRQ.disable();
+  }
+
+  /**
+   * Faster software implementation of the SPI bus for communication
+   * with the RF230 chip.
+   */
+  uint8_t fastWrite(uint8_t byte)
+  {
+#define fwMOSIset() P1.BIT.P1_1 = 1
+#define fwMOSIclr() P1.BIT.P1_1 = 0
+#define fwSCLKset() P3.BIT.P3_3 = 1
+#define fwSCLKclr() P3.BIT.P3_3 = 0
+#define fwMISOget() P1.BIT.P1_0
+    uint8_t data = 0;
+    uint8_t mask = 0x80;
+    atomic {
+      if (byte & mask)
+      {
+        fwMOSIset();
+      }
+      else
+      {
+        fwMOSIclr();
+      }
+      fwSCLKclr();
+      if( fwMISOget() )
+        data |= mask;
+      fwSCLKset();
+      mask >>= 1;
+
+      if (byte & mask)
+      {
+        fwMOSIset();
+      }
+      else
+      {
+        fwMOSIclr();
+      }
+      fwSCLKclr();
+      if( fwMISOget() )
+        data |= mask;
+      fwSCLKset();
+      mask >>= 1;
+
+      if (byte & mask)
+      {
+        fwMOSIset();
+      }
+      else
+      {
+        fwMOSIclr();
+      }
+      fwSCLKclr();
+      if( fwMISOget() )
+        data |= mask;
+      fwSCLKset();
+      mask >>= 1;
+
+      if (byte & mask)
+      {
+        fwMOSIset();
+      }
+      else
+      {
+        fwMOSIclr();
+      }
+      fwSCLKclr();
+      if( fwMISOget() )
+        data |= mask;
+      fwSCLKset();
+      mask >>= 1;
+
+      if (byte & mask)
+      {
+        fwMOSIset();
+      }
+      else
+      {
+        fwMOSIclr();
+      }
+      fwSCLKclr();
+      if( fwMISOget() )
+        data |= mask;
+      fwSCLKset();
+      mask >>= 1;
+
+      if (byte & mask)
+      {
+        fwMOSIset();
+      }
+      else
+      {
+        fwMOSIclr();
+      }
+      fwSCLKclr();
+      if( fwMISOget() )
+        data |= mask;
+      fwSCLKset();
+      mask >>= 1;
+
+      if (byte & mask)
+      {
+        fwMOSIset();
+      }
+      else
+      {
+        fwMOSIclr();
+      }
+      fwSCLKclr();
+      if( fwMISOget() )
+        data |= mask;
+      fwSCLKset();
+      mask >>= 1;
+
+      if (byte & mask)
+      {
+        fwMOSIset();
+      }
+      else
+      {
+        fwMOSIclr();
+      }
+      fwSCLKclr();
+      if( fwMISOget() )
+        data |= mask;
+      fwSCLKset();
+      mask >>= 1;
+    }
+    return data;
+  }
+
+  uint8_t tmp_data;
+  inline async command void FastSpiByte.splitWrite(uint8_t data)
+  {
+    atomic tmp_data = fastWrite(data);
+  }
+
+  inline async command uint8_t FastSpiByte.splitRead()
+  {
+    atomic return tmp_data;
+  }
+
+  inline async command uint8_t FastSpiByte.splitReadWrite(uint8_t data)
+  {
+    uint8_t b;
+    atomic
+    {
+      b = tmp_data;
+      tmp_data = fastWrite(data);
+    }
+    return b;
+  }
+
+  inline async command uint8_t FastSpiByte.write(uint8_t data)
+  {
+    return fastWrite(data);
+  }
+}
diff --git a/tos/platforms/mulle/chips/rf230/Mulle_RF230Spi.h b/tos/platforms/mulle/chips/rf230/Mulle_RF230Spi.h
new file mode 100755
index 00000000..3ea8b3b4
--- /dev/null
+++ b/tos/platforms/mulle/chips/rf230/Mulle_RF230Spi.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Unique identifier for the RF230 SPI bus.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+#ifndef __MULLE_RF230SPI_H__
+#define __MULLE_RF230SPI_H__
+
+#define UQ_MULLE_SOFTSPIRF230 "SoftSPIRF230C.SoftSPIPacket"
+
+#endif // __MULLE_RF230SPI_H__
diff --git a/tos/platforms/mulle/chips/rf230/RF230SplitControlP.nc b/tos/platforms/mulle/chips/rf230/RF230SplitControlP.nc
new file mode 100644
index 00000000..0719c0c6
--- /dev/null
+++ b/tos/platforms/mulle/chips/rf230/RF230SplitControlP.nc
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This module overrides the default SplitControl for the RF230 chip so that
+ * the PLL is turned on every time the RF230 chip is turned on.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+module RF230SplitControlP
+{
+  provides interface SplitControl;
+  uses interface SplitControl as SplitControlOrig;
+  uses interface SystemClockControl;
+}
+implementation
+{
+  command error_t SplitControl.start()
+  {
+#ifndef RF230_SLOW_SPI_MULLE
+#ifndef RF230_SLOW_SPI
+    call SystemClockControl.minSpeed(M16C62P_PLL_CLOCK);
+#endif
+#endif
+    return call SplitControlOrig.start();
+  }
+
+  event void SplitControlOrig.startDone(error_t error)
+  {
+#ifndef RF230_SLOW_SPI_MULLE
+#ifndef RF230_SLOW_SPI
+    if (error != SUCCESS)
+    {
+      call SystemClockControl.minSpeed(M16C62P_DONT_CARE);
+    }
+#endif
+#endif
+    signal SplitControl.startDone(error);
+  }
+
+  command error_t SplitControl.stop()
+  {
+    return call SplitControlOrig.stop();
+  }
+
+  event void SplitControlOrig.stopDone(error_t error)
+  {
+#ifndef RF230_SLOW_SPI
+    if (error == SUCCESS)
+    {
+      call SystemClockControl.minSpeed(M16C62P_DONT_CARE);
+    }
+#endif
+    signal SplitControl.stopDone(error);
+  }
+}
diff --git a/tos/platforms/mulle/chips/rf230/RadioConfig.h b/tos/platforms/mulle/chips/rf230/RadioConfig.h
new file mode 100644
index 00000000..cb7ef83c
--- /dev/null
+++ b/tos/platforms/mulle/chips/rf230/RadioConfig.h
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+/**
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+#ifndef __RADIOCONFIG_H__
+#define __RADIOCONFIG_H__
+
+#include <RF230DriverLayer.h>
+#include "Timer.h"
+
+enum
+{
+	/**
+	 * This is the value of the TRX_CTRL_0 register
+	 * which configures the output pin currents and the CLKM clock
+	 */
+	RF230_TRX_CTRL_0_VALUE = 0,
+
+	/**
+	 * This is the default value of the CCA_MODE field in the PHY_CC_CCA register
+	 * which is used to configure the default mode of the clear channel assessment
+	 */
+	RF230_CCA_MODE_VALUE = RF230_CCA_MODE_3,
+
+	/**
+	 * This is the value of the CCA_THRES register that controls the
+	 * energy levels used for clear channel assessment
+	 */
+	RF230_CCA_THRES_VALUE = 0xC7,
+};
+
+/* This is the default value of the TX_PWR field of the PHY_TX_PWR register. 0-15*/
+#ifndef RF230_DEF_RFPOWER
+#define RF230_DEF_RFPOWER	0
+#endif
+
+/* This is the default value of the CHANNEL field of the PHY_CC_CCA register. 11-26*/
+#ifndef RF230_DEF_CHANNEL
+#define RF230_DEF_CHANNEL	11
+#endif
+
+/*
+ * This is the command used to calculate the CRC for the RF230 chip. 
+ * TODO: Check why the default crcByte implementation is in a different endianness
+ */
+inline uint16_t RF230_CRCBYTE_COMMAND(uint16_t crc, uint8_t data)
+{
+    uint8_t lo8 = crc & 0x00FF;
+    uint8_t hi8 = (crc >> 8) & 0x00FF;
+    data ^= lo8; //lo8 (crc);
+    data ^= data << 4;
+
+    return ((((uint16_t)data << 8) | hi8 /*hi8 (crc)*/) ^ (uint8_t)(data >> 4) 
+        ^ ((uint16_t)data << 3));
+}
+
+/**
+ * This is the timer type of the radio alarm interface
+ */
+typedef TMicro TRadio;
+typedef uint16_t tradio_size;
+
+/**
+ * The number of alarm ticks per one second
+ */
+#define RADIO_ALARM_SEC 2500000 // 20MHz / 8
+
+#define RADIO_ALARM_MICROSEC	2.5// RADIO_ALARM_SEC/1000000
+
+/**
+ * The base two logarithm of the number of radio alarm ticks per one millisecond
+ */
+#define RADIO_ALARM_MILLI_EXP	11
+
+/**
+ * Make PACKET_LINK automaticaly enabled for Ieee154MessageC
+ */
+#if !defined(TFRAMES_ENABLED) && !defined(PACKET_LINK)
+#define PACKET_LINK
+#endif
+
+#endif  //__RADIOCONFIG_H__
diff --git a/tos/platforms/mulle/chips/rf230/SoftSpiRF230C.nc b/tos/platforms/mulle/chips/rf230/SoftSpiRF230C.nc
new file mode 100755
index 00000000..3f4e1545
--- /dev/null
+++ b/tos/platforms/mulle/chips/rf230/SoftSpiRF230C.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * A component that is going to use the RF230 Spi bus should
+ * create a new component of this to get access to the bus.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "Mulle_RF230Spi.h"
+
+generic configuration SoftSpiRF230C()
+{
+  provides interface Resource;
+  provides interface SpiPacket;
+  provides interface SpiByte;
+  provides interface SoftSpiBus;
+}
+implementation
+{
+  enum
+  {
+    CLIENT_ID = unique(UQ_MULLE_SOFTSPIRF230),
+  };
+  
+  components SoftSpiRF230P as Spi;
+  SoftSpiBus = Spi.SoftSpiBus;
+  Resource = Spi.Resource[CLIENT_ID];
+  SpiPacket = Spi.SpiPacket[CLIENT_ID]; 
+  SpiByte = Spi.SpiByte[CLIENT_ID]; 
+}
diff --git a/tos/platforms/mulle/chips/rf230/SoftSpiRF230P.nc b/tos/platforms/mulle/chips/rf230/SoftSpiRF230P.nc
new file mode 100755
index 00000000..94233595
--- /dev/null
+++ b/tos/platforms/mulle/chips/rf230/SoftSpiRF230P.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Creates a new Software Spi bus that will be used by the RF230
+ * chip.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+configuration SoftSpiRF230P
+{
+  provides interface Resource[uint8_t client];
+  provides interface SpiPacket[uint8_t client];
+  provides interface SpiByte[uint8_t client];
+  provides interface SoftSpiBus;
+
+}
+implementation
+{
+  components new SoftSpiMasterP(UQ_MULLE_SOFTSPIRF230) as Spi,
+      new SoftSpiBusP(),
+      HplM16c62pGeneralIOC as IOs;
+  
+  // Init the software SPI bus
+  SoftSpiBusP.SCLK -> IOs.PortP33;
+  SoftSpiBusP.MISO -> IOs.PortP10;
+  SoftSpiBusP.MOSI -> IOs.PortP11;
+
+  Spi.SoftSpiBus -> SoftSpiBusP;
+  SoftSpiBus = SoftSpiBusP;
+
+  Resource  = Spi.Resource;
+  SpiPacket = Spi.SpiPacket;
+  SpiByte = Spi.SpiByte;
+}
diff --git a/tos/platforms/mulle/chips/rv8564/HplRV8564.nc b/tos/platforms/mulle/chips/rv8564/HplRV8564.nc
new file mode 100755
index 00000000..fd14983c
--- /dev/null
+++ b/tos/platforms/mulle/chips/rv8564/HplRV8564.nc
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface for the RV-8564-C2 real time clock.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+interface HplRV8564
+{
+  /**
+   * Enables/disables the interrupts generated by the RV8564 chip.
+   */
+  command void enableInterrupt();
+  command void disableInterrupt();
+
+  /**
+   * Enables/disable CLKOUT from the RTC.
+   */
+  command void enableCLKOUT();
+  command void disableCLKOUT();
+
+  /**
+   * Reads from a register.
+   *
+   * @param reg The register to be read.
+   * @return The value of the register.
+   */
+  command error_t readRegister(uint8_t reg);
+
+  /**
+   * Writes to a register.
+   *
+   * @param reg The register that is written to.
+   * @param value The value that is written to the register.
+   */
+  command error_t writeRegister(uint8_t reg, uint8_t value);
+
+  /**
+   * Signals when a register read finished.
+   *
+   * @param val The value read from the register.
+   * @param reg The register the value was read from.
+   */
+  async event void readRegisterDone(error_t error, uint8_t reg, uint8_t val);
+
+  /**
+   * Signals when a register write finished.
+   *
+   * @param reg The register the value was written to.
+   */
+  async event void writeRegisterDone(error_t error, uint8_t reg);
+
+  /**
+   * Signal when an interrupt occurs.
+   */
+  async event void fired();
+}
diff --git a/tos/platforms/mulle/chips/rv8564/HplRV8564C.nc b/tos/platforms/mulle/chips/rv8564/HplRV8564C.nc
new file mode 100755
index 00000000..0ebcdb98
--- /dev/null
+++ b/tos/platforms/mulle/chips/rv8564/HplRV8564C.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Configuration of the RV-8564 Real-time Clock on the Mulle platform.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+configuration HplRV8564C
+{
+  provides interface HplRV8564;
+}
+implementation
+{
+  components HplRV8564P as RTCP,
+             new SoftwareI2C2C() as I2C,
+             HplM16c62pGeneralIOC as IOs,
+             HplM16c62pInterruptC as Irqs,
+             new M16c62pInterruptC() as Irq,
+             BusyWaitMicroC;
+
+  Irq.HplM16c62pInterrupt -> Irqs.Int0;
+
+  HplRV8564 = RTCP;
+  RTCP.CLKOE -> IOs.PortP47;
+  RTCP.CLKOUT -> IOs.PortP92;
+  RTCP.GpioInterrupt -> Irq;
+  RTCP.I2C -> I2C;
+  RTCP.I2CResource -> I2C;
+  RTCP.BusyWait -> BusyWaitMicroC;
+
+  components PlatformC, RealMainP;
+  PlatformC.SubInit -> RTCP.Init;
+  RealMainP.SoftwareInit -> RTCP.Startup;
+}
diff --git a/tos/platforms/mulle/chips/rv8564/HplRV8564P.nc b/tos/platforms/mulle/chips/rv8564/HplRV8564P.nc
new file mode 100755
index 00000000..2a549f26
--- /dev/null
+++ b/tos/platforms/mulle/chips/rv8564/HplRV8564P.nc
@@ -0,0 +1,206 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the RV-8564-C2 real time clock.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "rv8564.h"
+#include "I2C.h"
+module HplRV8564P
+{
+  provides interface HplRV8564 as RTC;
+  provides interface Init;
+  provides interface Init as Startup;
+
+  uses interface GeneralIO as CLKOE;
+  uses interface GeneralIO as CLKOUT;
+  uses interface GeneralIO;
+  uses interface GpioInterrupt;
+  uses interface I2CPacket<TI2CBasicAddr> as I2C;
+  uses interface Resource as I2CResource;
+  uses interface BusyWait<TMicro, uint16_t>;
+}
+implementation
+{
+
+  enum
+  {
+    S_IDLE,
+    S_READING,
+    S_WRITING
+  };
+  norace uint8_t m_state = S_IDLE;
+  norace uint8_t m_buf[2];
+
+  command error_t Init.init()
+  {
+    call CLKOUT.makeInput();
+    call CLKOE.clr();
+    call CLKOE.makeOutput();
+    return SUCCESS;
+  }
+
+  command error_t Startup.init()
+  {
+    int i;
+    // The RTC needs a maximum of 500ms to startup
+    for (i = 0; i < 10; ++i)
+    {
+      call BusyWait.wait(50000UL);
+    }
+    return SUCCESS;
+  }
+
+  command void RTC.enableCLKOUT()
+  {
+    call CLKOE.set();
+  }
+
+  command void RTC.disableCLKOUT()
+  {
+    call CLKOE.clr();
+  }
+
+  command void RTC.enableInterrupt()
+  {
+    call GpioInterrupt.enableFallingEdge();
+  }
+
+  command void RTC.disableInterrupt()
+  {
+    call GpioInterrupt.disable();
+  }
+
+  command error_t RTC.readRegister(uint8_t reg)
+  {
+    if (m_state != S_IDLE)
+    {	
+      return EBUSY;
+    }
+    m_state = S_READING;
+    m_buf[0] = reg;
+    if (call I2CResource.request() == SUCCESS)
+    {
+      return SUCCESS;
+    }
+    else
+    {
+      m_state = S_IDLE;
+      return FAIL;
+    }
+    return SUCCESS;
+  }
+
+  command error_t RTC.writeRegister(uint8_t reg, uint8_t value)
+  { 
+    if (m_state != S_IDLE)
+    {
+      return FAIL;
+    }
+    m_state = S_WRITING;
+    atomic m_buf[0] = reg;
+    atomic m_buf[1] = value;
+    if (call I2CResource.request() == SUCCESS)
+    {
+      return SUCCESS;
+    }
+    else
+    {
+      m_state = S_IDLE;
+      return FAIL;
+    }
+  }
+
+  event void I2CResource.granted()
+  {
+    atomic
+    {
+      if (m_state == S_READING)
+      {
+        call I2C.write(I2C_START | I2C_STOP, RV8564_ADDR, 1, m_buf);
+      }
+      else if (m_state == S_WRITING)
+      {
+        call I2C.write(I2C_START | I2C_STOP, RV8564_ADDR, 2, m_buf);    
+      }
+    }
+  }
+
+  async event void GpioInterrupt.fired()
+  {
+    signal RTC.fired();
+  }
+
+  async event void I2C.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
+  {
+    atomic
+    {
+      if (m_state == S_READING)
+      {
+        call I2CResource.release();
+        m_state = S_IDLE;
+        signal RTC.readRegisterDone(error, m_buf[0], m_buf[1]);
+      }
+    }
+  }
+
+  async event void I2C.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
+  {
+    if (m_state == S_READING)
+    {
+      if (error != SUCCESS)
+      {
+        call I2CResource.release();
+        m_state = S_IDLE;
+        signal RTC.readRegisterDone(error, m_buf[0], 0);
+        return;
+      }
+      else
+      {
+        call I2C.read(I2C_START | I2C_STOP, RV8564_ADDR, 1, m_buf + 1);
+      }
+    }
+    else if (m_state == S_WRITING)
+    {
+      call I2CResource.release();
+      m_state = S_IDLE;
+      signal RTC.writeRegisterDone(error, m_buf[0]);
+    }
+  }
+}
diff --git a/tos/platforms/mulle/chips/rv8564/rv8564.h b/tos/platforms/mulle/chips/rv8564/rv8564.h
new file mode 100755
index 00000000..8ad08e15
--- /dev/null
+++ b/tos/platforms/mulle/chips/rv8564/rv8564.h
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * This file is for the Microcrystal RV-8564 Real-time Clock on the Mulle
+ * platform.
+ * 
+ * @author: Gong Liang
+ */
+
+#ifndef __RV8564_H__
+#define __RV8564_H__
+
+/* constants */
+#define RV8564_ADDR	0x51  //slave address   
+
+
+#define RV8564_CS1    0x00
+#define RV8564_CS2    0x01
+
+
+/* Control/Status registers */
+#define RV8564_CTR1 0x00         //00 Control status 1, 
+                                 //Test1 0 Stop 0, Test 0 0 0
+								 
+#define RV8564_CTR2 0x01         //01 Control status 2,
+                                 // 0 x  0 TI/TP, AF TF AIE TIE  
+								 // TI/TP=1,INT pulses 
+//Note that writing 1 to the alarm flags causes no change...0-1 is not applied.								 
+								 
+#define RV8564_SEC    0x02          //	
+#define RV8564_MIN    0x03          //
+#define RV8564_HOUR   0x04          //
+#define RV8564_DAY    0x05          //
+#define RV8564_WEEK   0x06          //
+#define RV8564_MON    0x07          //
+#define RV8564_YEAR   0x08          //
+
+#define RV8564_MIN_ALARM    0x09    //
+#define RV8564_HR_ALARM     0x0A    //
+#define RV8564_DAY_ALARM    0x0B    //
+#define RV8564_WK_ALARM     0x0C    //
+
+
+#define RV8564_CLKF   0x0D       //FE x x x,  x x FD1 FD0
+                                 //                0   0    32768 Hz          
+                                 //                0   1    61024  Hz                 
+                                 //                1   0     32 Hz                           
+                                 //                1   1     1  Hz 
+
+
+
+
+#define RV8564_TC     0x0E       //TE x x x,  x x TD1 TD0
+                                 //                0   0    4096 Hz          
+                                 //                0   1    64   Hz                 
+                                 //                1   0     1 Sec                           
+                                 //                1   1     1 Min   
+								 								                         
+#define RV8564_TIMER  0x0F       //128 64  32 16, 8 4 2 1
+
+/*********** Initial setting of the RV_8564ram, Set it before using (debug only) ***********/
+uint8_t RV_8564ram[16] = { 0x00, 0x13, 0x01, 0x01,
+                           0x01, 0x01, 0x01, 0x01,
+                           0x07, 0x80, 0x80, 0x80,
+                           0x80, 0x83, 0x83, 1 };
+
+
+#endif /* __RV8564_H__ */
+
diff --git a/tos/platforms/mulle/debug/m_printf.h b/tos/platforms/mulle/debug/m_printf.h
new file mode 100644
index 00000000..ae9dfec3
--- /dev/null
+++ b/tos/platforms/mulle/debug/m_printf.h
@@ -0,0 +1,276 @@
+/*
+	Copyright 2001, 2002 Georges Menie (www.menie.org)
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU Lesser General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU Lesser General Public License for more details.
+
+    You should have received a copy of the GNU Lesser General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+
+
+
+/**
+ * The file is a debug tool for the Mulle-TinyOS platform. To use this tool,
+ * just need 2 steps.
+ * First, add #inclued "m_printf.h" to your component.
+ * Sencond, use _printf() function in the m_printf.h to print what you want
+ * to see.
+ * attention: don't forget to start your serialport, and just initialization.
+ * The serialport baudrate is at 57600, and you can choose a terminal to watch
+ * the output, for example, cutecom in linux.
+ * For more information see www.eistec.se.
+ *
+ * Modification to adopt printf for Mulle-TinyOS is made by
+ * @author Fan Zhang
+ * @author Cheng Zhong
+ */
+#ifndef __M_PRINTF_H__
+#define __M_PRINTF_H__
+
+#include <stdarg.h>
+#include <string.h>
+/*
+ * void m16c62p_putc(int c) is for the m16c62p. send a char through
+ * serial port 1. 
+ */
+void m16c62p_putc(int c)
+{
+    while(U1C1.BIT.TI == 0);  // wait for transmit buffer empty flag
+    U1TB.BYTE.U1TBL = c;
+}
+#define putchar(c) m16c62p_putc(c)
+
+static void printchar(char **str, int c)
+{
+       //extern int putchar(int c);
+
+       if (str) {
+               **str = c;
+               ++(*str);
+       }
+       else (void)putchar(c);
+}
+
+#define PAD_RIGHT 1
+#define PAD_ZERO 2
+
+static int prints(char **out, const char *string, int width, int pad)
+{
+       register int pc = 0, padchar = ' ';
+
+       if (width > 0) 
+       {
+               register int len = 0;
+               register const char *ptr;
+               for (ptr = string; *ptr; ++ptr) ++len;
+               if (len >= width) width = 0;
+               else width -= len;
+               if (pad & PAD_ZERO) padchar = '0';
+       }
+       if (!(pad & PAD_RIGHT)) {
+               for ( ; width > 0; --width) {
+                       printchar (out, padchar);
+                       ++pc;
+               }
+       }
+       for ( ; *string ; ++string) {
+               printchar (out, *string);
+               ++pc;
+       }
+       for ( ; width > 0; --width) {
+               printchar (out, padchar);
+               ++pc;
+       }
+
+       return pc;
+}
+
+/* 
+ * the following should be enough for 32 bit int 
+*/
+#define PRINT_BUF_LEN 12
+
+static int printi(char **out, long int i, int b, int sg, int width, int pad, int letbase)
+{
+       char print_buf[PRINT_BUF_LEN];
+       register char *s;
+       register int t, neg = 0, pc = 0;
+       register unsigned long int u = i;
+
+       if (i == 0) {
+               print_buf[0] = '0';
+               print_buf[1] = '\0';
+               return prints (out, print_buf, width, pad);
+       }
+
+       if (sg && b == 10 && i < 0) {
+               neg = 1;
+               u = -i;
+       }
+
+       s = print_buf + PRINT_BUF_LEN-1;
+       *s = '\0';
+
+       while (u) {
+               t = u % b;
+               if( t >= 10 )
+                       t += letbase - '0' - 10;
+               *--s = t + '0';
+               u /= b;
+       }
+
+       if (neg) {
+               if( width && (pad & PAD_ZERO) ) {
+                       printchar (out, '-');
+                       ++pc;
+                       --width;
+               }
+               else {
+                       *--s = '-';
+               }
+       }
+
+       return pc + prints (out, s, width, pad);
+}
+
+static int print(char **out, const char *format, va_list args )
+{
+       register int width, pad;
+       register int pc = 0;
+       char scr[2];
+
+       for (; *format != 0; ++format) 
+       {
+               if (*format == '%') 
+               {
+                       ++format;
+                       width = pad = 0;
+                       if (*format == '\0') break;
+                       if (*format == '%') goto out;
+                       if (*format == '-') 
+                       {
+                               ++format;
+                               pad = PAD_RIGHT;
+                       }
+                       while (*format == '0') 
+                       {
+                               ++format;
+                               pad |= PAD_ZERO;
+                       }
+                       for ( ; *format >= '0' && *format <= '9'; ++format) 
+                       {
+                               width *= 10;
+                               width += *format - '0';
+                       }
+                       if( *format == 's' ) 
+                       {
+                               register char *s = (char *)va_arg( args, int);
+                               pc += prints (out, s?s:"(null)", width, pad);
+                               continue;
+                       }
+                       if( *format == 'd' ) 
+                       {
+                               pc += printi (out, va_arg( args, int ), 10, 1, width, pad, 'a');
+                               continue;
+                       }
+                       if( *format == 'x' ) 
+                       {
+                               pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'a');
+                               continue;
+                       }
+                       if( *format == 'X' ) 
+                       {
+                               pc += printi (out, va_arg( args, int ), 16, 0, width, pad, 'A');
+                               continue;
+                       }
+                       if( *format == 'u' ) 
+                       {
+                               pc += printi (out, va_arg( args, int ), 10, 0, width, pad, 'a');
+                               continue;
+                       }
+                       if( *format == 'l' ) 
+                       {
+                       	       ++format;
+                               if( *format == 'u' ) 
+		                       {
+		                               pc += printi (out, va_arg( args, uint32_t ), 10, 0, width, pad, 'a');
+		                               continue;
+		                       }
+                       }
+                       if( *format == 'c' ) 
+                       {
+                               /* char are converted to int then pushed on the stack */
+                               scr[0] = (char)va_arg( args, int );
+                               scr[1] = '\0';
+                               pc += prints (out, scr, width, pad);
+                               continue;
+                       }
+               }
+               else 
+               {
+                    out:
+                       printchar (out, *format);
+                       ++pc;
+               }
+       }
+       if (out) **out = '\0';
+       va_end( args );
+       return pc;
+}
+/*
+ * A simple printf function. Support the following format:
+ * Code Format
+ * %c character
+ * %d signed decimal integers
+ * %i signed decimal integers, the same as %d
+ * %s a string of characters
+ * %o octal
+ * %x unsigned hexadecimal
+ * %X unsigned hexadecimal with uppercase
+ * %u unsigned decimal integers
+ * %lu 32 bits decimal unsigned long int=uint32_t
+ */
+int _printf(const char *format, ...)
+{
+       va_list args;
+
+       va_start( args, format );
+       return print( 0, format, args );
+}
+
+int sprintf(char *out, const char *format, ...)
+{
+       va_list args;
+
+       va_start( args, format );
+       return print( &out, format, args );
+}
+
+void _puts(const char *str)
+{
+ while( *str != '\0' )
+   putchar(*str++);
+
+ putchar('\n');
+}
+void printmsg(void *msg, uint8_t printLen)
+{
+	uint8_t i;
+	for(i=0; i < printLen; i++)
+	{
+		_printf("%x ", *( (uint8_t *)msg + i));
+		
+	}
+	_printf("\n");
+}
+#endif  // __M_PRINTF_H__
+
diff --git a/tos/platforms/mulle/fix/At45dbP.nc b/tos/platforms/mulle/fix/At45dbP.nc
new file mode 100644
index 00000000..9162ad52
--- /dev/null
+++ b/tos/platforms/mulle/fix/At45dbP.nc
@@ -0,0 +1,480 @@
+// $Id: At45dbP.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include "crc.h"
+#include "At45db.h"
+#include "Timer.h"
+
+/**
+ * Private componenent for the Atmel's AT45DB HAL.
+ *
+ * @author David Gay
+ */
+
+module At45dbP @safe() {
+  provides {
+    interface Init;
+    interface At45db;
+  }
+  uses {
+    interface HplAt45db;
+    interface BusyWait<TMicro, uint16_t>;
+  }
+}
+implementation
+{
+#define CHECKARGS
+
+#if 0
+  uint8_t work[20];
+  uint8_t woffset;
+
+  void wdbg(uint8_t x) {
+    work[woffset++] = x;
+    if (woffset == sizeof work)
+      woffset = 0;
+  }
+#else
+#define wdbg(n)
+#endif
+
+  enum { // requests
+    IDLE,
+    R_READ,
+    R_READCRC,
+    R_WRITE,
+    R_ERASE,
+    R_COPY,
+    R_SYNC,
+    R_SYNCALL,
+    R_FLUSH,
+    R_FLUSHALL,
+    BROKEN // Write failed. Fail all subsequent requests.
+  };
+  uint8_t request;
+  at45pageoffset_t reqOffset, reqBytes;
+  uint8_t * COUNT_NOK(reqBytes) reqBuf;
+  at45page_t reqPage;
+
+  enum {
+    P_READ,
+    P_READCRC,
+    P_WRITE,
+    P_FLUSH,
+    P_FILL,
+    P_ERASE,
+    P_COMPARE,
+    P_COMPARE_CHECK
+  };
+  
+  struct {
+    at45page_t page;
+    bool busy : 1;
+    bool clean : 1;
+    bool erased : 1;
+    uint8_t unchecked : 2;
+  } buffer[2];
+  uint8_t selected; // buffer used by the current op
+  uint8_t checking;
+  bool flashBusy;
+
+  // Select a command for the current buffer
+#define OPN(n, name) ((n) ? name ## 1 : name ## 2)
+#define OP(name) OPN(selected, name)
+
+  command error_t Init.init() {
+    request = IDLE;
+    flashBusy = TRUE;
+      
+    // pretend we're on an invalid non-existent page
+    buffer[0].page = buffer[1].page = AT45_MAX_PAGES;
+    buffer[0].busy = buffer[1].busy = FALSE;
+    buffer[0].clean = buffer[1].clean = TRUE;
+    buffer[0].unchecked = buffer[1].unchecked = 0;
+    buffer[0].erased = buffer[1].erased = FALSE;
+
+    return SUCCESS;
+  }
+  
+  void flashIdle() {
+    flashBusy = buffer[0].busy = buffer[1].busy = FALSE;
+  }
+
+  void requestDone(error_t result, uint16_t computedCrc, uint8_t newState);
+  void handleRWRequest();
+
+  task void taskSuccess() {
+    requestDone(SUCCESS, 0, IDLE);
+  }
+  task void taskFail() {
+    requestDone(FAIL, 0, IDLE);
+  }
+
+  void checkBuffer(uint8_t buf) {
+    if (flashBusy)
+      {
+	call HplAt45db.waitIdle();
+	return;
+      }
+    call HplAt45db.compare(OPN(buf, AT45_C_COMPARE_BUFFER), buffer[buf].page);
+    checking = buf;
+  }
+
+  void flushBuffer() {
+    if (flashBusy)
+      {
+	call HplAt45db.waitIdle();
+	return;
+      }
+    call HplAt45db.flush(buffer[selected].erased ?
+			 OP(AT45_C_QFLUSH_BUFFER) :
+			 OP(AT45_C_FLUSH_BUFFER), 
+			 buffer[selected].page);
+  }
+
+  event void HplAt45db.waitIdleDone() {
+    flashIdle();
+    // Eager compare - this steals the current command
+#if 0
+    if ((buffer[0].unchecked || buffer[1].unchecked) &&
+	cmdPhase != P_COMPARE)
+      checkBuffer(buffer[0].unchecked ? 0 : 1);
+    else
+#endif
+      handleRWRequest();
+  }
+
+  event void HplAt45db.waitCompareDone(bool ok) {
+    flashIdle();
+
+    if (ok)
+      buffer[checking].unchecked = 0;
+    else if (buffer[checking].unchecked < 2)
+      buffer[checking].clean = FALSE;
+    else
+      {
+	requestDone(FAIL, 0, BROKEN);
+	return;
+      }
+    handleRWRequest();
+  }
+
+  event void HplAt45db.readDone() {
+    requestDone(SUCCESS, 0, IDLE);
+  }
+
+  event void HplAt45db.writeDone() {
+    buffer[selected].clean = FALSE;
+    buffer[selected].unchecked = 0;
+    requestDone(SUCCESS, 0, IDLE);
+  }
+
+  event void HplAt45db.crcDone(uint16_t crc) {
+    requestDone(SUCCESS, crc, IDLE);
+  }
+
+  event void HplAt45db.flushDone() {
+    flashBusy = TRUE;
+    buffer[selected].clean = buffer[selected].busy = TRUE;
+    buffer[selected].unchecked++;
+    buffer[selected].erased = FALSE;
+    handleRWRequest();
+  }
+
+  event void HplAt45db.compareDone() {
+    flashBusy = TRUE;
+    buffer[checking].busy = TRUE;
+    // The 10us wait makes old mica motes (Atmega 103) happy, for
+    // some mysterious reason (w/o this wait, the first compare
+    // always fails, even though the compare after the rewrite
+    // succeeds...)
+    call BusyWait.wait(10);
+    call HplAt45db.waitCompare();
+  }
+
+  event void HplAt45db.fillDone() {
+    flashBusy = TRUE;
+    buffer[selected].page = reqPage;
+    buffer[selected].clean = buffer[selected].busy = TRUE;
+    buffer[selected].erased = FALSE;
+    handleRWRequest();
+  }
+
+  event void HplAt45db.eraseDone() {
+    flashBusy = TRUE;
+    // The buffer contains garbage, but we don't care about the state
+    // of bits on this page anyway (if we do, we'll perform a 
+    // subsequent write)
+    buffer[selected].page = AT45_MAX_PAGES;
+    buffer[selected].clean = TRUE;
+    buffer[selected].erased = TRUE;
+    requestDone(SUCCESS, 0, IDLE);
+  }
+
+  void syncOrFlushAll(uint8_t newReq);
+
+  void handleRWRequest() {
+    if (reqPage == buffer[selected].page)
+      switch (request)
+	{
+	case R_ERASE:
+	  switch (reqOffset)
+	    {
+	    case AT45_ERASE:
+	      if (flashBusy)
+		call HplAt45db.waitIdle();
+	      else
+		call HplAt45db.erase(AT45_C_ERASE_PAGE, reqPage);
+	      break;
+	    case AT45_PREVIOUSLY_ERASED:
+	      // We believe the user...
+	      buffer[selected].erased = TRUE;
+	      /* Fallthrough */
+	    case AT45_DONT_ERASE:
+	      // The buffer contains garbage, but we don't care about the state
+	      // of bits on this page anyway (if we do, we'll perform a 
+	      // subsequent write)
+	      buffer[selected].clean = TRUE;
+	      requestDone(SUCCESS, 0, IDLE);
+	      break;
+	    }
+	  break;
+
+	case R_COPY:
+	  if (!buffer[selected].clean) // flush any modifications
+	    flushBuffer();
+	  else
+	    {
+	      // Just redesignate as destination page, and mark it dirty.
+	      // It will eventually be flushed, completing the copy.
+	      buffer[selected].page = reqOffset;
+	      buffer[selected].clean = FALSE;
+	      post taskSuccess();
+	    }
+	  break;
+
+	case R_SYNC: case R_SYNCALL:
+	  if (buffer[selected].clean && buffer[selected].unchecked)
+	    {
+	      checkBuffer(selected);
+	      return;
+	    }
+	  /* fall through */
+	case R_FLUSH: case R_FLUSHALL:
+	  if (!buffer[selected].clean)
+	    flushBuffer();
+	  else if (request == R_FLUSH || request == R_SYNC)
+	    post taskSuccess();
+	  else
+	    {
+	      // Check for more dirty pages
+	      uint8_t oreq = request;
+
+	      request = IDLE;
+	      syncOrFlushAll(oreq);
+	    }
+	  break;
+
+	case R_READ:
+	  if (buffer[selected].busy)
+	    call HplAt45db.waitIdle();
+	  else
+	    call HplAt45db.readBuffer(OP(AT45_C_READ_BUFFER), reqOffset,
+				      reqBuf, reqBytes);
+	  break;
+
+	case R_READCRC:
+	  if (buffer[selected].busy)
+	    call HplAt45db.waitIdle();
+	  else
+	    /* Hack: baseCrc was stored in reqBuf */
+	    call HplAt45db.crc(OP(AT45_C_READ_BUFFER), 0, reqOffset, reqBytes,
+			       (uint16_t)reqBuf);
+	  break;
+
+	case R_WRITE:
+	  if (buffer[selected].busy)
+	    call HplAt45db.waitIdle();
+	  else
+	    call HplAt45db.write(OP(AT45_C_WRITE_BUFFER), 0, reqOffset,
+				 reqBuf, reqBytes);
+	  break;
+	}
+    else if (!buffer[selected].clean)
+      flushBuffer();
+    else if (buffer[selected].unchecked)
+      checkBuffer(selected);
+    else
+      {
+	// just get the new page (except for erase)
+	if (request == R_ERASE)
+	  {
+	    buffer[selected].page = reqPage;
+	    handleRWRequest();
+	  }
+	else if (flashBusy)
+	  call HplAt45db.waitIdle();
+	else
+	  call HplAt45db.fill(OP(AT45_C_FILL_BUFFER), reqPage);
+      }
+  }
+
+  void requestDone(error_t result, uint16_t computedCrc, uint8_t newState) {
+    uint8_t orequest = request;
+
+    request = newState;
+    switch (orequest)
+      {
+      case R_READ: signal At45db.readDone(result); break;
+      case R_READCRC: signal At45db.computeCrcDone(result, computedCrc); break;
+      case R_WRITE: signal At45db.writeDone(result); break;
+      case R_SYNC: case R_SYNCALL: signal At45db.syncDone(result); break;
+      case R_FLUSH: case R_FLUSHALL: signal At45db.flushDone(result); break;
+      case R_ERASE: signal At45db.eraseDone(result); break;
+      case R_COPY: signal At45db.copyPageDone(result); break;
+      }
+  }
+
+  void newRequest(uint8_t req, at45page_t page, at45pageoffset_t offset,
+		  void * COUNT_NOK(n) reqdata, at45pageoffset_t n) {
+    request = req;
+
+    reqBuf = NULL;
+    reqBytes = n;
+    reqBuf = reqdata;
+    reqPage = page;
+    reqOffset = offset;
+
+    if (page == buffer[0].page)
+      selected = 0;
+    else if (page == buffer[1].page)
+      selected = 1;
+    else
+      selected = !selected; // LRU with 2 buffers...
+
+#ifdef CHECKARGS
+    if (page >= AT45_MAX_PAGES || offset >= AT45_PAGE_SIZE ||
+	n > AT45_PAGE_SIZE || offset + n > AT45_PAGE_SIZE)
+      post taskFail();
+    else
+#endif
+      handleRWRequest();
+  }
+
+  command void At45db.read(at45page_t page, at45pageoffset_t offset,
+				   void *reqdata, at45pageoffset_t n) {
+    newRequest(R_READ, page, offset, reqdata, n);
+  }
+
+  command void At45db.computeCrc(at45page_t page,
+					at45pageoffset_t offset,
+					at45pageoffset_t n,
+					uint16_t baseCrc) {
+    /* This is a hack (store crc in reqBuf), but it saves 2 bytes of RAM */
+    newRequest(R_READCRC, page, offset, TCAST(uint8_t * COUNT(n), baseCrc), n);
+  }
+
+  command void At45db.write(at45page_t page, at45pageoffset_t offset,
+				    void *reqdata, at45pageoffset_t n) {
+    newRequest(R_WRITE, page, offset, reqdata, n);
+  }
+
+
+  command void At45db.erase(at45page_t page, uint8_t eraseKind) {
+    newRequest(R_ERASE, page, eraseKind, NULL, 0);
+  }
+
+  command void At45db.copyPage(at45page_t from, at45page_t to) {
+    /* Assumes at45pageoffset_t can hold an at45page_t. A little icky */
+    newRequest(R_COPY, from, to, NULL, 0);
+  }
+
+  void syncOrFlush(at45page_t page, uint8_t newReq) {
+    request = newReq;
+
+    if (buffer[0].page == page)
+      selected = 0;
+    else if (buffer[1].page == page)
+      selected = 1;
+    else
+      {
+	post taskSuccess();
+	return;
+      }
+
+    buffer[selected].unchecked = 0;
+    handleRWRequest();
+  }
+
+  command void At45db.sync(at45page_t page) {
+    syncOrFlush(page, R_SYNC);
+  }
+
+  command void At45db.flush(at45page_t page) {
+    syncOrFlush(page, R_FLUSH);
+  }
+
+  void syncOrFlushAll(uint8_t newReq) {
+    request = newReq;
+
+    if (!buffer[0].clean)
+      selected = 0;
+    else if (!buffer[1].clean)
+      selected = 1;
+    else
+      {
+	post taskSuccess();
+	return;
+      }
+
+    buffer[selected].unchecked = 0;
+    handleRWRequest();
+  }
+
+  command void At45db.syncAll() {
+    syncOrFlushAll(R_SYNCALL);
+  }
+
+  command void At45db.flushAll() {
+    syncOrFlushAll(R_FLUSHALL);
+  }
+}
diff --git a/tos/platforms/mulle/fix/LogStorageP.nc b/tos/platforms/mulle/fix/LogStorageP.nc
new file mode 100644
index 00000000..348519c2
--- /dev/null
+++ b/tos/platforms/mulle/fix/LogStorageP.nc
@@ -0,0 +1,1004 @@
+/*
+ * Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#include <Storage.h>
+#include <crc.h>
+
+/**
+ * Private component of the AT45DB implementation of the log storage
+ * abstraction.
+ *
+ * @author: David Gay <dgay@acm.org>
+ * @author: Jonathan Hui <jwhui@cs.berkeley.edu>
+ */
+
+module LogStorageP @safe() {
+  provides {
+    interface LogRead[uint8_t logId];
+    interface LogWrite[uint8_t logId];
+  }
+  uses {
+    interface At45db;
+    interface At45dbVolume[uint8_t logId];
+    interface Resource[uint8_t logId];
+  }
+}
+implementation
+{
+  /* Some design notes.
+
+  - The logId's in the LogRead and LogWrites are shifted left by 1 bit.
+    The low-order bit is 1 for circular logs, 0 for linear ones
+    (see newRequest and endRequest, and the LogStorageC configuration)
+
+  - Data is written sequentially to the pages of a log volume. Each page
+    ends with a footer (nx_struct pageinfo) recording metadata on the
+    current page:
+    o a cookie
+    o the "position" of the current page in the log (see below)
+    o the offset of the last record on this page (i.e., the offset
+      at which the last append ended) - only valid if flags & F_LASTVALID
+    o flags: 
+      x F_SYNC page was synchronised - data after lastRecordOffset
+        is not log data; implies F_LASTVALID
+      x F_CIRCLED this page is not from the first run through the log's
+        pages (never set in linear logs)
+      x F_LASTVALID not set if no record ended on this page
+    o a CRC
+
+  - "Positions" are stored in the metadata, used as cookies by
+    currentOffset and seek, and stored in the wpos and rpos fields of the
+    volume state structure.  They represent the number of bytes that
+    writing has advanced in the log since the log was erased, with
+    PAGE_SIZE added. Note that this is basically the number of bytes
+    written, except that when a page is synchronised unused bytes in the
+    page count towards increasing the position.
+
+    As a result, on page p, the following equation holds:
+      (metadata(p).pos - PAGE_SIZE) % volume-size == p * PAGE_SIZE
+    (this also means that the "position" metadata field could be replaced
+    by a count of the number of times writing has cycled through the log,
+    reducing the metadata size)
+
+    The PAGE_SIZE offset on positions is caused by Invariant 2 below: to
+    ensure that Invariant 2 is respected, at flash erase time, we write a
+    valid page with position 0 to the last block of the flash. As a result,
+    the first writes to the flash, in page 0, are at "position" PAGE_SIZE.
+
+  - This code is designed to deal with "one-at-a-time" failures (i.e.,
+    the system will not modify any blocks after a previous failed
+    write). This should allow recovery from:
+    o arbitrary reboots
+    o write failure (the underlying PageEEPROM shuts down after any
+      write fails; all pages are flushed before moving on to the next
+      page)
+    It will not recover from arbitrary data corruption
+
+  - When sync is called, the current write page is written to flash with an
+    F_SYNC flag and writing continues on the next page (wasting on average
+    half a flasg page)
+
+  - We maintain the following invariants on log volumes, even in the face
+    of the "one-at-a-time" failures described above:
+    1) at least one of the first and last blocks are valid
+    2) the last block, if valid, has the F_SYNC flag
+
+  - Locating the log boundary page (the page with the greatest position):
+
+    Invariant 1, the one-at-a-time failure model and the metadata position
+    definition guarantees that the physical flash pages have the following
+    properties:
+      an initial set of V1 valid pages,
+      followed by a set of I invalid pages,
+      followed by a set of V2 valid pages
+    with V1+i+V2=total-number-of-pages, and V1, V2, I >= 0
+    Additionally, the position of all pages in V1 is greater than in V2,
+    and consecutive pages in V1 (respectively V2) have greater positions
+    than their predecessors.
+
+    From this, it's possible to locate the log boundary page (the page with
+    the greatest position) using the following algorithm:
+    o let basepos=metadata(lastpage).pos, or 0 if the last page is invalid
+    o locate (using a binary search) the page p with the largest position
+      greater than basepos
+      invalid pages can be assumed to have positions less than basepos
+      if there is no such page p, let p = lastpage
+
+    Once the log boundary page is known, we resume writing at the last
+    page before p with a record boundary (Invariant 2, combined with
+    limiting individual records to volumesize - PAGE_SIZE ensures there
+    will be such a page).
+
+  - The read pointer has a special "invalid" state which represents the
+    current beginning of the log. In that state, LogRead.currentOffset()
+    returns SEEK_BEGINNING rather than a regular position.
+
+    The read pointer is invalidated:
+    o at boot time
+    o after the volume is erased
+    o after the write position "catches up" with the read position
+    o after a failed seek
+
+    Reads from an invalid pointer:
+    o start reading from the beginning of the flash if we are on the
+      first run through the log volume
+    o start reading at the first valid page after the write page with
+      an F_LASTVALID flag; the read offset is set to the lastRecordOffset
+      value
+      if this page has the SYNC flag, we start at the beginning of the
+      next page
+  */
+             
+
+  enum {
+    F_SYNC = 1,
+    F_CIRCLED = 2,
+    F_LASTVALID = 4
+  };
+
+  nx_struct pageinfo {
+    nx_uint16_t magic;
+    nx_uint32_t pos;
+    nx_uint16_t lastRecordOffset;
+    nx_uint8_t flags;
+    nx_uint16_t crc;
+  };
+
+  enum {
+    N = uniqueCount(UQ_LOG_STORAGE),
+    NO_CLIENT = 0xff,
+    PAGE_SIZE = AT45_PAGE_SIZE - sizeof(nx_struct pageinfo),
+    PERSISTENT_MAGIC = 0x4256,
+  };
+
+  enum {
+    R_IDLE,
+    R_ERASE,
+    R_APPEND,
+    R_SYNC,
+    R_READ,
+    R_SEEK
+  };
+
+  enum {
+    META_IDLE,
+    META_LOCATEFIRST,
+    META_LOCATE,
+    META_LOCATELAST,
+    META_SEEK,
+    META_READ,
+    META_WRITE
+  };
+
+  uint8_t client = NO_CLIENT;
+  uint8_t metaState;
+  bool recordsLost;
+  at45page_t firstPage, lastPage;
+  storage_len_t pos;
+  nx_struct pageinfo metadata;
+
+  struct {
+    /* The latest request made for this client, and it's arguments */
+    uint8_t request; 
+    uint8_t *COUNT_NOK(len) buf;
+    storage_len_t len;
+
+    /* Log r/w positions */
+    bool positionKnown : 1;
+    bool circular : 1;
+    bool circled : 1;
+    bool rvalid : 1;
+    uint32_t wpos;		/* Bytes since start of logging */
+    at45page_t wpage;		/* Current write page */
+    at45pageoffset_t woffset;	/* Offset on current write page */
+    uint32_t rpos;		/* Bytes since start of logging */
+    at45page_t rpage;		/* Current read page */
+    at45pageoffset_t roffset;	/* Offset on current read page */
+    at45pageoffset_t rend;	/* Last valid offset on current read page */
+  } s[N];
+
+  at45page_t firstVolumePage() {
+    return call At45dbVolume.remap[client](0);
+  }
+
+  at45page_t npages() {
+    return call At45dbVolume.volumeSize[client]();
+  }
+
+  at45page_t lastVolumePage() {
+    return call At45dbVolume.remap[client](npages());
+  }
+
+  void setWritePage(at45page_t page) {
+    if (s[client].circular && page == lastVolumePage())
+      {
+	s[client].circled = TRUE;
+	page = firstVolumePage();
+      }
+    s[client].wpage = page;
+    s[client].woffset = 0;
+  }
+
+  void invalidateReadPointer() {
+    s[client].rvalid = FALSE;
+  }
+
+  void crcPage(at45page_t page) {
+    call At45db.computeCrc(page, 0,
+			   PAGE_SIZE + offsetof(nx_struct pageinfo, crc), 0);
+  }
+
+  void readMetadata(at45page_t page) {
+    call At45db.read(page, PAGE_SIZE, &metadata, sizeof metadata);
+  }
+
+  void writeMetadata(at45page_t page) {
+    call At45db.write(page, PAGE_SIZE, &metadata, sizeof metadata);
+  }
+
+  void wmetadataStart();
+
+  void sync() {
+    metadata.flags = F_SYNC | F_LASTVALID;
+    metadata.lastRecordOffset = s[client].woffset;
+    /* rend is now no longer the end of the page */
+    if (s[client].rpage == s[client].wpage)
+      s[client].rend = s[client].woffset;
+    wmetadataStart();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Queue and initiate user requests					*/
+  /* ------------------------------------------------------------------ */
+
+  void eraseStart();
+  void appendStart();
+  void syncStart();
+  void readStart();
+  void locateStart();
+  void rmetadataStart();
+  void seekStart();
+
+  void startRequest() {
+    if (!s[client].positionKnown && s[client].request != R_ERASE)
+      {
+	locateStart();
+	return;
+      }
+
+    metaState = META_IDLE;
+    switch (s[client].request)
+      {
+      case R_ERASE: eraseStart(); break;
+      case R_APPEND: appendStart(); break;
+      case R_SYNC: syncStart(); break;
+      case R_READ: readStart(); break;
+      case R_SEEK: seekStart(); break;
+      }
+  }
+
+  void endRequest(error_t ok) {
+    uint8_t c = client;
+    uint8_t request = s[c].request;
+    storage_len_t actualLen = pos;
+    void *ptr = s[c].buf;
+    
+    client = NO_CLIENT;
+    s[c].request = R_IDLE;
+    call Resource.release[c]();
+
+    c = c << 1 | s[c].circular;
+    switch (request)
+      {
+      case R_ERASE: signal LogWrite.eraseDone[c](ok); break;
+      case R_APPEND: signal LogWrite.appendDone[c](ptr, actualLen, recordsLost, ok); break;
+      case R_SYNC: signal LogWrite.syncDone[c](ok); break;
+      case R_READ: signal LogRead.readDone[c](ptr, actualLen, ok); break;
+      case R_SEEK: signal LogRead.seekDone[c](ok); break;
+      }
+  }
+
+  /* Enqueue request and request the underlying flash */
+  error_t newRequest(uint8_t newRequest, uint8_t id,
+		     uint8_t *COUNT_NOK(length) buf, storage_len_t length) {
+    s[id >> 1].circular = id & 1;
+    id >>= 1;
+
+    if (s[id].request != R_IDLE)
+      return EBUSY;
+
+    s[id].request = newRequest;
+    s[id].buf = NULL;
+    s[id].len = length;
+    s[id].buf = buf;
+    call Resource.request[id]();
+
+    return SUCCESS;
+  }
+
+  event void Resource.granted[uint8_t id]() {
+    client = id;
+    pos = 0;
+    startRequest();
+  }
+
+  command error_t LogWrite.append[uint8_t id](void* buf, storage_len_t length) {
+    if (length > call LogRead.getSize[id]() - PAGE_SIZE)
+      /* Writes greater than the volume size are invalid.
+	 Writes equal to the volume size could break the log volume
+	 invariant (see next comment).
+	 Writes that span the whole volume could lead to problems
+	 at boot time (no valid block with a record boundary).
+	 Refuse them all. */
+      return EINVAL;
+    else
+      return newRequest(R_APPEND, id, buf, length);
+  }
+
+  command storage_cookie_t LogWrite.currentOffset[uint8_t id]() {
+    return s[id >> 1].wpos;
+  }
+
+  command error_t LogWrite.erase[uint8_t id]() {
+    return newRequest(R_ERASE, id, NULL, 0);
+  }
+
+  command error_t LogWrite.sync[uint8_t id]() {
+    return newRequest(R_SYNC, id, NULL, 0);
+  }
+
+  command error_t LogRead.read[uint8_t id](void* buf, storage_len_t length) {
+    return newRequest(R_READ, id, buf, length);
+  }
+
+  command storage_cookie_t LogRead.currentOffset[uint8_t id]() {
+    id >>= 1;
+    return s[id].rvalid ? s[id].rpos : SEEK_BEGINNING;
+  }
+
+  command error_t LogRead.seek[uint8_t id](storage_cookie_t offset) {
+    return newRequest(R_SEEK, id, TCAST(void *COUNT(offset), ((uint16_t)(offset >> 16))), offset);
+  }
+
+  command storage_len_t LogRead.getSize[uint8_t id]() {
+    return call At45dbVolume.volumeSize[id >> 1]() * (storage_len_t)PAGE_SIZE;
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Erase								*/
+  /* ------------------------------------------------------------------ */
+
+  void eraseMetadataDone() {
+    /* Set write pointer to the beginning of the flash */
+    s[client].wpos = PAGE_SIZE; // last page has offset 0 and is before us
+    s[client].circled = FALSE;
+    setWritePage(firstVolumePage()); 
+
+    invalidateReadPointer();
+
+    s[client].positionKnown = TRUE;
+    endRequest(SUCCESS);
+  }
+
+  void eraseEraseDone() {
+    if (firstPage == lastPage - 1)
+      {
+	/* We create a valid, synced last page (see invariants) */
+	metadata.flags = F_SYNC | F_LASTVALID;
+	metadata.lastRecordOffset = 0;
+	setWritePage(firstPage);
+	s[client].circled = FALSE;
+	s[client].wpos = 0;
+	wmetadataStart();
+      }
+    else
+      call At45db.erase(firstPage++, AT45_ERASE);
+  }
+
+  void eraseStart() {
+    s[client].positionKnown = FALSE; // in case erase fails
+    firstPage = firstVolumePage();
+    lastPage = lastVolumePage();
+    eraseEraseDone();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Locate log boundaries						*/
+  /* ------------------------------------------------------------------ */
+
+  void locateLastRecord();
+
+  void locateLastCrcDone(uint16_t crc) {
+    if (crc != metadata.crc)
+      {
+	locateLastRecord();
+	return;
+      }
+
+    /* We've found the last valid page with a record-end. Set up
+       the read and write positions. */
+    invalidateReadPointer();
+
+    if (metadata.flags & F_SYNC) /* must start on next page */
+      {
+	/* We need to special case the empty log, as we don't want
+	   to wrap around in the case of a full, non-circular log
+	   with a sync on its last page. */
+	if (firstPage == lastPage && !metadata.pos)
+	  setWritePage(firstVolumePage());
+	else
+	  setWritePage(firstPage + 1);
+	s[client].wpos = metadata.pos + PAGE_SIZE;
+      }
+    else
+      {
+	s[client].wpage = firstPage;
+	s[client].woffset = metadata.lastRecordOffset;
+	s[client].wpos = metadata.pos + metadata.lastRecordOffset;
+      }
+
+    s[client].circled = (metadata.flags & F_CIRCLED) != 0;
+    if (s[client].circled && !s[client].circular) // oops
+      {
+	endRequest(FAIL);
+	return;
+      }
+
+    /* And we can now proceed to the real request */
+    s[client].positionKnown = TRUE;
+    startRequest();
+  }
+
+  void locateLastReadDone() {
+    if (metadata.magic == PERSISTENT_MAGIC && metadata.flags & F_LASTVALID)
+      crcPage(firstPage);
+    else
+      locateLastRecord();
+  }
+
+  void locateLastRecord() {
+    if (firstPage == lastPage)
+      {
+	/* We walked all the way back to the last page, and it's not 
+	   valid. The log-volume invariant is not holding. Fail out. */
+	endRequest(FAIL);
+	return;
+      }
+
+    if (firstPage == firstVolumePage())
+      firstPage = lastPage;
+    else
+      firstPage--;
+
+    readMetadata(firstPage);
+  }
+
+  void located() {
+    metaState = META_LOCATELAST;
+    /* firstPage is one after last valid page, but the last page with
+       a record end may be some pages earlier. Search for it. */
+    lastPage = lastVolumePage() - 1;
+    locateLastRecord();
+  }
+
+  at45page_t locateCurrentPage() {
+    return firstPage + ((lastPage - firstPage) >> 1);
+  }
+
+  void locateBinarySearch() {
+    if (lastPage <= firstPage)
+      located();
+    else
+      readMetadata(locateCurrentPage());
+  }
+
+  void locateGreaterThan() {
+    firstPage = locateCurrentPage() + 1;
+    locateBinarySearch();
+  }
+
+  void locateLessThan() {
+    lastPage = locateCurrentPage();
+    locateBinarySearch();
+  }
+
+  void locateCrcDone(uint16_t crc) {
+    if (crc == metadata.crc)
+      {
+	s[client].wpos = metadata.pos;
+	locateGreaterThan();
+      }
+    else
+      locateLessThan();
+  }
+
+  void locateReadDone() {
+    if (metadata.magic == PERSISTENT_MAGIC && s[client].wpos < metadata.pos)
+      crcPage(locateCurrentPage());
+    else
+      locateLessThan();
+  }
+
+  void locateFirstCrcDone(uint16_t crc) {
+    if (metadata.magic == PERSISTENT_MAGIC && crc == metadata.crc)
+      s[client].wpos = metadata.pos;
+    else
+      s[client].wpos = 0;
+
+    metaState = META_LOCATE;
+    locateBinarySearch();
+  }
+
+  void locateFirstReadDone() {
+    crcPage(lastPage);
+  }
+
+  /* Locate log beginning and ending. See description at top of file. */
+  void locateStart() {
+    metaState = META_LOCATEFIRST;
+    firstPage = firstVolumePage();
+    lastPage = lastVolumePage() - 1;
+    readMetadata(lastPage);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Append								*/
+  /* ------------------------------------------------------------------ */
+
+  void appendContinue() {
+    uint8_t *buf = s[client].buf + pos;
+    at45pageoffset_t offset = s[client].woffset, count;
+    storage_len_t len = s[client].len - pos;
+    
+    if (len == 0)
+      {
+	endRequest(SUCCESS);
+	return;
+      }
+
+    if (s[client].wpage == lastVolumePage())
+      {
+	/* We reached the end of a linear log */
+	endRequest(ESIZE);
+	return;
+      }
+
+    if (offset + len <= PAGE_SIZE)
+      count = len;
+    else
+      count = PAGE_SIZE - offset;
+
+    s[client].wpos += count;
+    s[client].woffset += count;
+    pos += count;
+
+    /* We normally lose data at the point we make the first write to a
+       page in a log that has circled. */
+    if (offset == 0 && s[client].circled)
+      recordsLost = TRUE;
+
+    call At45db.write(s[client].wpage, offset, buf, count);
+  }
+  
+  void appendWriteDone() {
+    if (s[client].woffset == PAGE_SIZE) /* Time to write metadata */
+      wmetadataStart();
+    else
+      endRequest(SUCCESS);
+  }
+
+  void appendMetadataDone() { // metadata of previous page flushed
+    /* Setup metadata in case we overflow this page too */
+    metadata.flags = 0;
+    appendContinue();
+  }
+
+  void appendSyncDone() {
+    s[client].wpos = metadata.pos + PAGE_SIZE;
+    appendStart();
+  }
+
+  void appendStart() {
+    storage_len_t len = s[client].len - pos;
+    storage_len_t vlen = (storage_len_t)npages() * PAGE_SIZE;
+
+    recordsLost = FALSE;
+
+    /* If request would span the end of the flash, sync, to maintain the
+       invariant that the last flash page is synced and that either
+       the first or last pages are valid.
+
+       Note that >= in the if below means we won't write a record that
+       would end on the last byte of the last page, as this would mean that
+       we would not sync the last page, breaking the log volume
+       invariant */
+    if ((s[client].wpos - PAGE_SIZE) % vlen >= vlen - len)
+      sync();
+    else
+      {
+	/* Set lastRecordOffset in case we need to write metadata (see
+	   wmetadataStart) */
+	metadata.lastRecordOffset = s[client].woffset;
+	metadata.flags = F_LASTVALID;
+	appendContinue();
+      }
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Sync								*/
+  /* ------------------------------------------------------------------ */
+
+  void syncStart() {
+    if (s[client].woffset == 0) /* we can't lose any writes */
+      endRequest(SUCCESS);
+    else
+      sync();
+  }
+
+  void syncMetadataDone() {
+    /* Write position reflect the absolute position in the flash, not
+       user-bytes written. So update wpos to reflect sync effects. */
+    s[client].wpos = metadata.pos + PAGE_SIZE;
+    endRequest(SUCCESS);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Write block metadata						*/
+  /* ------------------------------------------------------------------ */
+
+  void wmetadataStart() {
+    /* The caller ensures that metadata.flags (except F_CIRCLED) and
+       metadata.lastRecordOffset are set correctly. */
+    metaState = META_WRITE;
+    firstPage = s[client].wpage; // remember page to commit
+    metadata.pos = s[client].wpos - s[client].woffset;
+    metadata.magic = PERSISTENT_MAGIC;
+    if (s[client].circled)
+      metadata.flags |= F_CIRCLED;
+
+    call At45db.computeCrc(firstPage, 0, PAGE_SIZE, 0);
+
+    /* We move to the next page now. If writing the metadata fails, we'll
+       simply leave the invalid page in place. Trying to recover seems
+       complicated, and of little benefit (note that in practice, At45dbC
+       shuts down after a failed write, so nothing is really going to
+       happen after that anyway). */
+    setWritePage(s[client].wpage + 1);
+
+    /* Invalidate read pointer if we reach it's page */
+    if (s[client].wpage == s[client].rpage)
+      invalidateReadPointer();
+  }
+
+  void wmetadataCrcDone(uint16_t crc) {
+    uint8_t i, *md;
+
+    // Include metadata in crc
+    md = (uint8_t *)&metadata;
+    for (i = 0; i < offsetof(nx_struct pageinfo, crc); i++)
+      crc = crcByte(crc, md[i]);
+    metadata.crc = crc;
+
+    // And save it
+    writeMetadata(firstPage);
+  }
+
+  void wmetadataWriteDone() {
+    metaState = META_IDLE;
+    if (metadata.flags & F_SYNC)
+      call At45db.sync(firstPage);
+    else
+      call At45db.flush(firstPage);
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Read 								*/
+  /* ------------------------------------------------------------------ */
+
+  void readContinue() {
+    uint8_t *buf = s[client].buf + pos;
+    at45pageoffset_t offset = s[client].roffset, count;
+    at45pageoffset_t end = s[client].rend;
+    storage_len_t len = s[client].len - pos;
+    
+    if (len == 0)
+      {
+	endRequest(SUCCESS);
+	return;
+      }
+
+    if (!s[client].rvalid)
+      {
+	if (s[client].circled)
+	  /* Find a valid page after wpage, skipping invalid pages */
+	  s[client].rpage = s[client].wpage;
+	else
+	  {
+	    /* resume reading at the beginning of the first page */
+	    s[client].rvalid = TRUE;
+	    s[client].rpage = lastVolumePage() - 1;
+	  }
+
+	rmetadataStart();
+	return;
+      }
+
+    if (s[client].rpage == s[client].wpage)
+      end = s[client].woffset;
+
+    if (offset == end)
+      {
+	if ((s[client].rpage + 1 == lastVolumePage() && !s[client].circular) ||
+	    s[client].rpage == s[client].wpage)
+	  endRequest(SUCCESS); // end of log
+	else
+	  rmetadataStart();
+	return;
+      }
+
+    if (offset + len <= end)
+      count = len;
+    else
+      count = end - offset;
+
+    pos += count;
+    s[client].rpos += count;
+    s[client].roffset = offset + count;
+
+    call At45db.read(s[client].rpage, offset, buf, count);
+  }
+
+  void readStart() {
+    readContinue();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Read block metadata						*/
+  /* ------------------------------------------------------------------ */
+
+  void continueReadAt(at45pageoffset_t roffset) {
+    /* Resume reading at firstPage whose metadata is currently available
+       in the metadata variable */
+    metaState = META_IDLE;
+    s[client].rpos = metadata.pos + roffset;
+    s[client].rpage = firstPage;
+    s[client].roffset = roffset;
+    s[client].rend =
+      metadata.flags & F_SYNC ? metadata.lastRecordOffset : PAGE_SIZE;
+    s[client].rvalid = TRUE;
+    readContinue();
+  }
+
+  void rmetadataContinue() {
+    if (++firstPage == lastVolumePage())
+      firstPage = firstVolumePage();
+    if (firstPage == s[client].wpage)
+      if (!s[client].rvalid)
+	/* We cannot find a record boundary to start at (we've just
+	   walked through the whole log...). Give up. */
+	endRequest(SUCCESS);
+      else
+	{
+	  /* The current write page has no metadata yet, so we fake it */
+	  metadata.flags = 0;
+	  metadata.pos = s[client].wpos - s[client].woffset;
+	  continueReadAt(0);
+	}
+    else
+      readMetadata(firstPage);
+  }
+
+  void rmetadataReadDone() {
+    if (metadata.magic == PERSISTENT_MAGIC)
+      crcPage(firstPage);
+    else
+      endRequest(SUCCESS);
+  }
+
+  void rmetadataCrcDone(uint16_t crc) {
+    if (!s[client].rvalid)
+      if (crc == metadata.crc && metadata.flags & F_LASTVALID)
+	continueReadAt(metadata.lastRecordOffset);
+      else
+	rmetadataContinue();
+    else 
+      if (crc == metadata.crc)
+	continueReadAt(0);
+      else
+	endRequest(SUCCESS);
+  }
+
+  void rmetadataStart() {
+    metaState = META_READ;
+    firstPage = s[client].rpage;
+    rmetadataContinue();
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Seek.								*/
+  /* ------------------------------------------------------------------ */
+
+  void seekCrcDone(uint16_t crc) {
+    if (metadata.magic == PERSISTENT_MAGIC && crc == metadata.crc &&
+	metadata.pos == s[client].rpos - s[client].roffset)
+      {
+	s[client].rvalid = TRUE;
+	if (metadata.flags & F_SYNC)
+	  s[client].rend = metadata.lastRecordOffset;
+      }
+    endRequest(SUCCESS);
+  }
+
+  void seekReadDone() {
+    crcPage(s[client].rpage);
+  }
+
+  /* Move to position specified by cookie. */
+  void seekStart() {
+    uint32_t offset = (uint32_t)(uint16_t)s[client].buf << 16 | s[client].len;
+
+    invalidateReadPointer(); // default to beginning of log
+
+    /* The write positions are offset by PAGE_SIZE (see emptyLog) */
+
+    if (offset == SEEK_BEGINNING)
+      offset = PAGE_SIZE;
+
+    if (offset > s[client].wpos || offset < PAGE_SIZE)
+      {
+	endRequest(EINVAL);
+	return;
+      }
+
+    /* Cookies are just flash positions which continue incrementing as
+       you circle around and around. So we can just check the requested
+       page's metadata.pos field matches the cookie's value */
+    s[client].rpos = offset;
+    s[client].roffset = (offset - PAGE_SIZE) % PAGE_SIZE;
+    s[client].rpage = firstVolumePage() + ((offset - PAGE_SIZE) / PAGE_SIZE) % npages();
+    s[client].rend = PAGE_SIZE; // default to no sync flag
+
+    // The last page's metadata isn't written to flash yet. Special case it.
+    if (s[client].rpage == s[client].wpage)
+      {
+	/* If we're seeking within the current write page, just go there.
+	   Otherwise, we're asking for an old version of the current page
+	   so just keep the invalidated read pointer, i.e., read from
+	   the beginning. */
+	if (offset >= s[client].wpos - s[client].woffset)
+	  s[client].rvalid = TRUE;
+	endRequest(SUCCESS);
+      }
+    else
+      {
+	metaState = META_SEEK;
+	readMetadata(s[client].rpage);
+      }
+  }
+
+  /* ------------------------------------------------------------------ */
+  /* Dispatch HAL operations to current user op				*/
+  /* ------------------------------------------------------------------ */
+
+  event void At45db.eraseDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	eraseEraseDone();
+  }
+
+  event void At45db.writeDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	switch (metaState)
+	  {
+	  case META_WRITE: wmetadataWriteDone(); break;
+	  case META_IDLE: appendWriteDone(); break;
+	  }
+  }
+
+  event void At45db.syncDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else switch (s[client].request)
+	{
+	case R_ERASE: eraseMetadataDone(); break;
+	case R_APPEND: appendSyncDone(); break;
+	case R_SYNC: syncMetadataDone(); break;
+	}
+  }
+
+  event void At45db.flushDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	appendMetadataDone();
+  }
+
+  event void At45db.readDone(error_t error) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	switch (metaState)
+	  {
+	  case META_LOCATEFIRST: locateFirstReadDone(); break;
+	  case META_LOCATE: locateReadDone(); break;
+	  case META_LOCATELAST: locateLastReadDone(); break;
+	  case META_SEEK: seekReadDone(); break;
+	  case META_READ: rmetadataReadDone(); break;
+	  case META_IDLE: readContinue(); break;
+	  }					    
+  }
+
+  event void At45db.computeCrcDone(error_t error, uint16_t crc) {
+    if (client != NO_CLIENT)
+      if (error != SUCCESS)
+	endRequest(FAIL);
+      else
+	switch (metaState)
+	  {
+	  case META_LOCATEFIRST: locateFirstCrcDone(crc); break;
+	  case META_LOCATE: locateCrcDone(crc); break;
+	  case META_LOCATELAST: locateLastCrcDone(crc); break;
+	  case META_SEEK: seekCrcDone(crc); break;
+	  case META_WRITE: wmetadataCrcDone(crc); break;
+	  case META_READ: rmetadataCrcDone(crc); break;
+	  }
+  }
+
+  event void At45db.copyPageDone(error_t error) { }
+
+  default event void LogWrite.appendDone[uint8_t logId](void* buf, storage_len_t l, bool rLost, error_t error) { }
+  default event void LogWrite.eraseDone[uint8_t logId](error_t error) { }
+  default event void LogWrite.syncDone[uint8_t logId](error_t error) { }
+  default event void LogRead.readDone[uint8_t logId](void* buf, storage_len_t l, error_t error) { }
+  default event void LogRead.seekDone[uint8_t logId](error_t error) {}
+
+  default command at45page_t At45dbVolume.remap[uint8_t logId](at45page_t volumePage) {return 0;}
+  default command at45page_t At45dbVolume.volumeSize[uint8_t logId]() {return 0;}
+  default async command error_t Resource.request[uint8_t logId]() {return SUCCESS;}
+  default async command error_t Resource.release[uint8_t logId]() { return FAIL; }
+}
diff --git a/tos/platforms/mulle/fix/README b/tos/platforms/mulle/fix/README
new file mode 100644
index 00000000..edb96c01
--- /dev/null
+++ b/tos/platforms/mulle/fix/README
@@ -0,0 +1,15 @@
+This folder contains fixes in system files and chips that are currently not committed to the source tree, are Mulle specific or doesn't have any good or general solution. Any file put in this folder should be commented in this file; the reason the file is here should be stated and a plan how to fix (be able to remove it from here) the problem should be outlined.
+
+The files here need to be overlooked regularly to include changes made in the original file.
+
+The intention is to never have any files in this folder and if a file is put in this folder there should be a very good reason for it!
+
+
+------FILES------:
+
+tos/chips/at45db/At45dbP.nc: After a erase is done the buffer should be invalidated in some way. In the fix the buffer page member is set to AT45_MAX_PAGES, because the indexes of the pages are 0-(AT45_MAX_PAGES-1) thus AT45_MAX_PAGES indicates an invalid page number. Have spoken to David Gay about this. No fix seems to be committed, commit it our selfs?
+
+tos/chips/at45db/LogStorageP.nc: in struct pageinfo there is a member lastRecordOffset which is a uint8_t in the original file. Mulle and platforms using At45DB chips with 10 bit offset addresses need a larger storage unit than uint8_t and is thus changed to uint16_t. This should maybe be typedefed in every platform specific implementation of the at45db. We cant just change it to uint16_t because that would break backwards compatibility for old platforms. Have spoken with David Gay about this to, but nothing has happened.
+
+tos/chips/rf230/RF230DriverHwAckP.nc/RF230DriverLayerP.nc: Because of the use of a software spi bus on Mulle the communication between the RF230 chip and Mulle is to slow to be able to start sending a packet before the whole packet has been uploaded. We are instead uploading the packet first to the RF230 and then triggering the actual send. This may screw up protocols that need very good timing. But not using this may result in packet shifting, meaning that only half the packet is sent first and the second half is sent with the next packet.
+The next Mulle version will have a hardware spi connection between the radio and Mulle. Hopefully this will solve the problem.
diff --git a/tos/platforms/mulle/fix/RF230DriverHwAckP.nc b/tos/platforms/mulle/fix/RF230DriverHwAckP.nc
new file mode 100644
index 00000000..5505d084
--- /dev/null
+++ b/tos/platforms/mulle/fix/RF230DriverHwAckP.nc
@@ -0,0 +1,1035 @@
+/*
+* Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Miklos Maroti
+*/
+
+#include <RF230DriverLayer.h>
+#include <Tasklet.h>
+#include <RadioAssert.h>
+#include <TimeSyncMessageLayer.h>
+#include <RadioConfig.h>
+
+module RF230DriverHwAckP
+{
+	provides
+	{
+		interface Init as PlatformInit @exactlyonce();
+		interface Init as SoftwareInit @exactlyonce();
+
+		interface RadioState;
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioCCA;
+		interface RadioPacket;
+
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+		interface PacketField<uint8_t> as PacketTimeSyncOffset;
+		interface PacketField<uint8_t> as PacketLinkQuality;
+
+		interface PacketAcknowledgements;
+	}
+
+	uses
+	{
+		interface GeneralIO as SELN;
+		interface Resource as SpiResource;
+
+		interface FastSpiByte;
+
+		interface GeneralIO as SLP_TR;
+		interface GeneralIO as RSTN;
+
+		interface GpioCapture as IRQ;
+
+		interface BusyWait<TMicro, uint16_t>;
+		interface LocalTime<TRadio>;
+
+		interface RF230DriverConfig as Config;
+
+		interface PacketFlag as TransmitPowerFlag;
+		interface PacketFlag as RSSIFlag;
+		interface PacketFlag as TimeSyncFlag;
+
+		interface PacketTimeStamp<TRadio, uint32_t>;
+
+		interface Tasklet;
+		interface RadioAlarm;
+
+		interface PacketFlag as AckReceivedFlag;
+		interface Ieee154PacketLayer;
+		interface ActiveMessageAddress;
+
+#ifdef RADIO_DEBUG
+		interface DiagMsg;
+#endif
+	}
+}
+
+implementation
+{
+	rf230_header_t* getHeader(message_t* msg)
+	{
+		return ((void*)msg) + call Config.headerLength(msg);
+	}
+
+	void* getPayload(message_t* msg)
+	{
+		return ((void*)msg) + call RadioPacket.headerLength(msg);
+	}
+
+	rf230_metadata_t* getMeta(message_t* msg)
+	{
+		return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg);
+	}
+
+/*----------------- STATE -----------------*/
+
+	tasklet_norace uint8_t state;
+	enum
+	{
+		STATE_P_ON = 0,
+		STATE_SLEEP = 1,
+		STATE_SLEEP_2_TRX_OFF = 2,
+		STATE_TRX_OFF = 3,
+		STATE_TRX_OFF_2_RX_ON = 4,
+		STATE_RX_ON = 5,
+		STATE_BUSY_TX_2_RX_ON = 6,
+	};
+
+	tasklet_norace uint8_t cmd;
+	enum
+	{
+		CMD_NONE = 0,			// the state machine has stopped
+		CMD_TURNOFF = 1,		// goto SLEEP state
+		CMD_STANDBY = 2,		// goto TRX_OFF state
+		CMD_TURNON = 3,			// goto RX_ON state
+		CMD_TRANSMIT = 4,		// currently transmitting a message
+		CMD_CCA = 6,			// performing clear chanel assesment
+		CMD_CHANNEL = 7,		// changing the channel
+		CMD_SIGNAL_DONE = 8,		// signal the end of the state transition
+		CMD_DOWNLOAD = 9,		// download the received message
+	};
+
+	norace bool radioIrq;
+
+	tasklet_norace uint8_t txPower;
+	tasklet_norace uint8_t channel;
+
+	tasklet_norace message_t* rxMsg;
+	message_t rxMsgBuffer;
+
+	uint16_t capturedTime;	// the current time when the last interrupt has occured
+
+/*----------------- REGISTER -----------------*/
+
+	inline void writeRegister(uint8_t reg, uint8_t value)
+	{
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF230_CMD_REGISTER_WRITE | reg);
+		call FastSpiByte.splitReadWrite(value);
+		call FastSpiByte.splitRead();
+		call SELN.set();
+	}
+
+	inline uint8_t readRegister(uint8_t reg)
+	{
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF230_CMD_REGISTER_READ | reg);
+		call FastSpiByte.splitReadWrite(0);
+		reg = call FastSpiByte.splitRead();
+		call SELN.set();
+
+		return reg;
+	}
+
+/*----------------- ALARM -----------------*/
+
+	enum
+	{
+		SLEEP_WAKEUP_TIME = (uint16_t)(880 * RADIO_ALARM_MICROSEC),
+		PLL_CALIBRATION_TIME = (uint16_t)(180 * RADIO_ALARM_MICROSEC),
+		CCA_REQUEST_TIME = (uint16_t)(140 * RADIO_ALARM_MICROSEC),
+
+		// 8 undocumented delay, 128 for CSMA, 16 for delay, 5*32 for preamble and SFD
+		TX_SFD_DELAY = (uint16_t)((8 + 128 + 16 + 5*32) * RADIO_ALARM_MICROSEC),
+		
+		// 32 for frame length, 16 for delay
+		RX_SFD_DELAY = (uint16_t)((32 + 16) * RADIO_ALARM_MICROSEC),
+	};
+
+	tasklet_async event void RadioAlarm.fired()
+	{
+		if( state == STATE_SLEEP_2_TRX_OFF )
+			state = STATE_TRX_OFF;
+		else if( state == STATE_TRX_OFF_2_RX_ON )
+		{
+			RADIO_ASSERT( cmd == CMD_TURNON || cmd == CMD_CHANNEL );
+
+			state = STATE_RX_ON;
+			cmd = CMD_SIGNAL_DONE;
+		}
+		else if( cmd == CMD_CCA )
+		{
+			uint8_t cca;
+
+			RADIO_ASSERT( state == STATE_RX_ON );
+
+			cmd = CMD_NONE;
+			cca = readRegister(RF230_TRX_STATUS);
+
+			RADIO_ASSERT( (cca & RF230_TRX_STATUS_MASK) == RF230_RX_AACK_ON );
+
+			signal RadioCCA.done( (cca & RF230_CCA_DONE) ? ((cca & RF230_CCA_STATUS) ? SUCCESS : EBUSY) : FAIL );
+		}
+		else
+			RADIO_ASSERT(FALSE);
+
+		// make sure the rest of the command processing is called
+		call Tasklet.schedule();
+	}
+
+/*----------------- INIT -----------------*/
+
+	command error_t PlatformInit.init()
+	{
+		call SELN.makeOutput();
+		call SELN.set();
+		call SLP_TR.makeOutput();
+		call SLP_TR.clr();
+		call RSTN.makeOutput();
+		call RSTN.set();
+
+		rxMsg = &rxMsgBuffer;
+
+		return SUCCESS;
+	}
+
+	command error_t SoftwareInit.init()
+	{
+		// for powering up the radio
+		return call SpiResource.request();
+	}
+
+	void initRadio()
+	{
+		uint16_t temp;
+
+		call BusyWait.wait(510);
+
+		call RSTN.clr();
+		call SLP_TR.clr();
+		call BusyWait.wait(6);
+		call RSTN.set();
+
+		writeRegister(RF230_TRX_CTRL_0, RF230_TRX_CTRL_0_VALUE);
+		writeRegister(RF230_TRX_STATE, RF230_TRX_OFF);
+
+		call BusyWait.wait(510);
+
+		writeRegister(RF230_IRQ_MASK, RF230_IRQ_TRX_UR | RF230_IRQ_TRX_END );
+		writeRegister(RF230_CCA_THRES, RF230_CCA_THRES_VALUE);
+		writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | (RF230_DEF_RFPOWER & RF230_TX_PWR_MASK));
+
+		txPower = RF230_DEF_RFPOWER & RF230_TX_PWR_MASK;
+		channel = RF230_DEF_CHANNEL & RF230_CHANNEL_MASK;
+		writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);
+
+		writeRegister(RF230_XAH_CTRL, 0);
+		writeRegister(RF230_CSMA_SEED_1, 0);
+
+		temp = call ActiveMessageAddress.amGroup();
+		writeRegister(RF230_PAN_ID_0, temp);
+		writeRegister(RF230_PAN_ID_1, temp >> 8);
+
+		call SLP_TR.set();
+		state = STATE_SLEEP;
+	}
+
+/*----------------- SPI -----------------*/
+
+	event void SpiResource.granted()
+	{
+		call SELN.makeOutput();
+		call SELN.set();
+
+		if( state == STATE_P_ON )
+		{
+			initRadio();
+			call SpiResource.release();
+		}
+		else
+			call Tasklet.schedule();
+	}
+
+	bool isSpiAcquired()
+	{
+		if( call SpiResource.isOwner() )
+			return TRUE;
+
+		if( call SpiResource.immediateRequest() == SUCCESS )
+		{
+			call SELN.makeOutput();
+			call SELN.set();
+
+			return TRUE;
+		}
+
+		call SpiResource.request();
+		return FALSE;
+	}
+
+/*----------------- CHANNEL -----------------*/
+
+tasklet_async command uint8_t RadioState.getChannel()
+	{
+		return channel;
+	}
+
+	tasklet_async command error_t RadioState.setChannel(uint8_t c)
+	{
+		c &= RF230_CHANNEL_MASK;
+
+		if( cmd != CMD_NONE )
+			return EBUSY;
+		else if( channel == c )
+			return EALREADY;
+
+		channel = c;
+		cmd = CMD_CHANNEL;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	inline void changeChannel()
+	{
+		RADIO_ASSERT( cmd == CMD_CHANNEL );
+		RADIO_ASSERT( state == STATE_SLEEP || state == STATE_TRX_OFF || state == STATE_RX_ON );
+
+		if( isSpiAcquired() && call RadioAlarm.isFree() )
+		{
+			writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);
+
+			if( state == STATE_RX_ON )
+			{
+				call RadioAlarm.wait(PLL_CALIBRATION_TIME);
+				state = STATE_TRX_OFF_2_RX_ON;
+			}
+			else
+				cmd = CMD_SIGNAL_DONE;
+		}
+	}
+
+/*----------------- TURN ON/OFF -----------------*/
+
+	inline void changeState()
+	{
+		if( (cmd == CMD_STANDBY || cmd == CMD_TURNON)
+			&& state == STATE_SLEEP && call RadioAlarm.isFree() )
+		{
+			call SLP_TR.clr();
+
+			call RadioAlarm.wait(SLEEP_WAKEUP_TIME);
+			state = STATE_SLEEP_2_TRX_OFF;
+		}
+		else if( cmd == CMD_TURNON && state == STATE_TRX_OFF 
+			&& isSpiAcquired() && call RadioAlarm.isFree() )
+		{
+			uint16_t temp;
+	
+			RADIO_ASSERT( ! radioIrq );
+
+			readRegister(RF230_IRQ_STATUS); // clear the interrupt register
+			call IRQ.captureRisingEdge();
+
+			// setChannel was ignored in SLEEP because the SPI was not working, so do it here
+			writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);
+
+			temp = call ActiveMessageAddress.amAddress();
+			writeRegister(RF230_SHORT_ADDR_0, temp);
+			writeRegister(RF230_SHORT_ADDR_1, temp >> 8);
+
+			call RadioAlarm.wait(PLL_CALIBRATION_TIME);
+			writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON);
+			state = STATE_TRX_OFF_2_RX_ON;
+		}
+		else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) 
+			&& state == STATE_RX_ON && isSpiAcquired() )
+		{
+			writeRegister(RF230_TRX_STATE, RF230_FORCE_TRX_OFF);
+
+			call IRQ.disable();
+			radioIrq = FALSE;
+
+			state = STATE_TRX_OFF;
+		}
+
+		if( cmd == CMD_TURNOFF && state == STATE_TRX_OFF )
+		{
+			call SLP_TR.set();
+			state = STATE_SLEEP;
+			cmd = CMD_SIGNAL_DONE;
+		}
+		else if( cmd == CMD_STANDBY && state == STATE_TRX_OFF )
+			cmd = CMD_SIGNAL_DONE;
+	}
+
+	tasklet_async command error_t RadioState.turnOff()
+	{
+		if( cmd != CMD_NONE )
+			return EBUSY;
+		else if( state == STATE_SLEEP )
+			return EALREADY;
+
+		cmd = CMD_TURNOFF;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+	
+	tasklet_async command error_t RadioState.standby()
+	{
+		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
+			return EBUSY;
+		else if( state == STATE_TRX_OFF )
+			return EALREADY;
+
+		cmd = CMD_STANDBY;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	tasklet_async command error_t RadioState.turnOn()
+	{
+		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
+			return EBUSY;
+		else if( state == STATE_RX_ON )
+			return EALREADY;
+
+		cmd = CMD_TURNON;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioState.done() { }
+
+	task void changeAddress()
+	{
+		call Tasklet.suspend();
+
+		if( isSpiAcquired() )
+		{
+			uint16_t temp = call ActiveMessageAddress.amAddress();
+			writeRegister(RF230_SHORT_ADDR_0, temp);
+			writeRegister(RF230_SHORT_ADDR_1, temp >> 8);
+		}
+		else
+			post changeAddress();
+
+		call Tasklet.resume();
+	}
+
+	async event void ActiveMessageAddress.changed()
+	{
+		post changeAddress();
+	}
+
+/*----------------- TRANSMIT -----------------*/
+
+	tasklet_norace message_t* txMsg;
+
+	tasklet_async command error_t RadioSend.send(message_t* msg)
+	{
+		uint16_t time;
+		uint8_t length;
+		uint8_t* data;
+		uint8_t header;
+		uint32_t time32;
+		void* timesync;
+
+		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || radioIrq )
+			return EBUSY;
+
+		length = (call PacketTransmitPower.isSet(msg) ?
+			call PacketTransmitPower.get(msg) : RF230_DEF_RFPOWER) & RF230_TX_PWR_MASK;
+
+		if( length != txPower )
+		{
+			txPower = length;
+			writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | txPower);
+		}
+
+		writeRegister(RF230_TRX_STATE, RF230_TX_ARET_ON);
+
+		// do something useful, just to wait a little
+		time32 = call LocalTime.get();
+		timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0;
+
+		// we have missed an incoming message in this short amount of time
+		if( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) != RF230_TX_ARET_ON )
+		{
+			RADIO_ASSERT( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) == RF230_BUSY_RX_AACK );
+
+			writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON);
+			return EBUSY;
+		}
+#ifndef RF230_SLOW_SPI_MULLE
+#ifndef RF230_SLOW_SPI
+		atomic
+		{
+			call SLP_TR.set();
+			time = call RadioAlarm.getNow();
+		}
+		call SLP_TR.clr();
+#endif
+#endif
+
+		RADIO_ASSERT( ! radioIrq );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF230_CMD_FRAME_WRITE);
+
+		data = getPayload(msg);
+		length = getHeader(msg)->length;
+
+		// length | data[0] ... data[length-3] | automatically generated FCS
+		call FastSpiByte.splitReadWrite(length);
+
+		// the FCS is atomatically generated (2 bytes)
+		length -= 2;
+
+		header = call Config.headerPreloadLength();
+		if( header > length )
+			header = length;
+
+		length -= header;
+
+		// first upload the header to gain some time
+		do {
+			call FastSpiByte.splitReadWrite(*(data++));
+		}
+		while( --header != 0 );
+#ifndef RF230_SLOW_SPI_MULLE
+#ifdef RF230_SLOW_SPI
+		atomic
+		{
+			call SLP_TR.set();
+			time = call RadioAlarm.getNow();
+		}
+		call SLP_TR.clr();
+#endif
+#else
+		atomic
+		{
+			time = call RadioAlarm.getNow();
+		}
+#endif
+
+		time32 += (int16_t)(time + TX_SFD_DELAY) - (int16_t)(time32);
+
+		if( timesync != 0 )
+			*(timesync_relative_t*)timesync = (*(timesync_absolute_t*)timesync) - time32;
+
+		while( length-- != 0 )
+			call FastSpiByte.splitReadWrite(*(data++));
+
+		// wait for the SPI transfer to finish
+		call FastSpiByte.splitRead();
+		
+#ifdef RF230_SLOW_SPI_MULLE
+		atomic
+		{
+			call SLP_TR.set();
+		}
+		call SLP_TR.clr();
+#endif
+		
+		call SELN.set();
+
+		/*
+		 * There is a very small window (~1 microsecond) when the RF230 went 
+		 * into PLL_ON state but was somehow not properly initialized because 
+		 * of an incoming message and could not go into BUSY_TX. I think the
+		 * radio can even receive a message, and generate a TRX_UR interrupt
+		 * because of concurrent access, but that message probably cannot be
+		 * recovered.
+		 *
+		 * TODO: this needs to be verified, and make sure that the chip is 
+		 * not locked up in this case.
+		 */
+
+		// go back to RX_ON state when finished
+		writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON);
+
+		if( timesync != 0 )
+			*(timesync_absolute_t*)timesync = (*(timesync_relative_t*)timesync) + time32;
+
+		call PacketTimeStamp.set(msg, time32);
+
+#ifdef RADIO_DEBUG_MESSAGES
+		if( call DiagMsg.record() )
+		{
+			length = getHeader(msg)->length;
+
+			call DiagMsg.chr('t');
+			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.int8(length);
+			call DiagMsg.hex8s(getPayload(msg), length - 2);
+			call DiagMsg.send();
+		}
+#endif
+
+		// wait for the TRX_END interrupt
+		txMsg = msg;
+		state = STATE_BUSY_TX_2_RX_ON;
+		cmd = CMD_TRANSMIT;
+
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioSend.sendDone(error_t error) { }
+	default tasklet_async event void RadioSend.ready() { }
+
+/*----------------- CCA -----------------*/
+
+	tasklet_async command error_t RadioCCA.request()
+	{
+		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || ! call RadioAlarm.isFree() )
+			return EBUSY;
+
+		// see Errata B7 of the datasheet
+		// writeRegister(RF230_TRX_STATE, RF230_PLL_ON);
+		// writeRegister(RF230_TRX_STATE, RF230_RX_AACK_ON);
+
+		writeRegister(RF230_PHY_CC_CCA, RF230_CCA_REQUEST | RF230_CCA_MODE_VALUE | channel);
+		call RadioAlarm.wait(CCA_REQUEST_TIME);
+		cmd = CMD_CCA;
+		
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioCCA.done(error_t error) { }
+
+/*----------------- RECEIVE -----------------*/
+
+	inline void downloadMessage()
+	{
+		uint8_t length;
+		bool crcValid = FALSE;
+
+		call SELN.clr();
+		call FastSpiByte.write(RF230_CMD_FRAME_READ);
+
+		// read the length byte
+		length = call FastSpiByte.write(0);
+
+		// if correct length
+		if( length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2 )
+		{
+			uint8_t read;
+			uint8_t* data;
+
+			// initiate the reading
+			call FastSpiByte.splitWrite(0);
+
+			data = getPayload(rxMsg);
+			getHeader(rxMsg)->length = length;
+
+			// we do not store the CRC field
+			length -= 2;
+
+			read = call Config.headerPreloadLength();
+			if( length < read )
+				read = length;
+
+			length -= read;
+
+			do {
+				*(data++) = call FastSpiByte.splitReadWrite(0);
+			}
+			while( --read != 0  );
+
+			if( signal RadioReceive.header(rxMsg) )
+			{
+				while( length-- != 0 )
+					*(data++) = call FastSpiByte.splitReadWrite(0);
+
+				call FastSpiByte.splitReadWrite(0);	// two CRC bytes
+				call FastSpiByte.splitReadWrite(0);
+
+				call PacketLinkQuality.set(rxMsg, call FastSpiByte.splitRead());
+
+				// we should have no other incoming message or buffer underflow
+				crcValid = ! radioIrq;
+			}
+		}
+
+		call SELN.set();
+
+		if( crcValid && call PacketTimeStamp.isValid(rxMsg) )
+		{
+			uint32_t time32 = call PacketTimeStamp.timestamp(rxMsg);
+			length = getHeader(rxMsg)->length;
+
+/*
+ * If you hate floating point arithmetics and do not care of up to 400 microsecond time stamping errors,
+ * then define RF230_HWACK_SLOPPY_TIMESTAMP, which will be significantly faster.
+ */
+#ifdef RF230_HWACK_SLOPPY_TIMESTAMP
+			time32 -= (uint16_t)(RX_SFD_DELAY) + ((uint16_t)(length) << (RADIO_ALARM_MILLI_EXP - 5));
+#else
+			time32 -= (uint16_t)(RX_SFD_DELAY) + (uint16_t)(32.0 * RADIO_ALARM_MICROSEC * (uint16_t)length);
+#endif
+
+			call PacketTimeStamp.set(rxMsg, time32);
+		}
+
+#ifdef RADIO_DEBUG_MESSAGES
+		if( call DiagMsg.record() )
+		{
+			length = getHeader(rxMsg)->length;
+
+			call DiagMsg.chr('r');
+			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.int8(crcValid ? length : -length);
+			call DiagMsg.hex8s(getPayload(rxMsg), length - 2);
+			call DiagMsg.int8(call PacketRSSI.isSet(rxMsg) ? call PacketRSSI.get(rxMsg) : -1);
+			call DiagMsg.uint8(call PacketLinkQuality.isSet(rxMsg) ? call PacketLinkQuality.get(rxMsg) : 0);
+			call DiagMsg.send();
+		}
+#endif
+
+		state = STATE_RX_ON;
+		cmd = CMD_NONE;
+
+		// signal only if it has passed the CRC check
+		if( crcValid )
+			rxMsg = signal RadioReceive.receive(rxMsg);
+	}
+
+/*----------------- IRQ -----------------*/
+
+	async event void IRQ.captured(uint16_t time)
+	{
+		RADIO_ASSERT( ! radioIrq );
+
+		atomic
+		{
+			capturedTime = time;
+			radioIrq = TRUE;
+		}
+
+		call Tasklet.schedule();
+	}
+
+	void serviceRadio()
+	{
+		if( isSpiAcquired() )
+		{
+			uint16_t time;
+			uint32_t time32;
+			uint8_t irq;
+			uint8_t temp;
+			
+			atomic time = capturedTime;
+			radioIrq = FALSE;
+			irq = readRegister(RF230_IRQ_STATUS);
+
+#ifdef RADIO_DEBUG
+			// TODO: handle this interrupt
+			if( irq & RF230_IRQ_TRX_UR )
+			{
+				if( call DiagMsg.record() )
+				{
+					call DiagMsg.str("assert ur");
+					call DiagMsg.uint16(call RadioAlarm.getNow());
+					call DiagMsg.hex8(readRegister(RF230_TRX_STATUS));
+					call DiagMsg.hex8(readRegister(RF230_TRX_STATE));
+					call DiagMsg.hex8(irq);
+					call DiagMsg.uint8(state);
+					call DiagMsg.uint8(cmd);
+					call DiagMsg.send();
+				}
+			}
+#endif
+
+			if( irq & RF230_IRQ_TRX_END )
+			{
+				if( cmd == CMD_TRANSMIT )
+				{
+					RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON );
+
+					temp = readRegister(RF230_TRX_STATE) & RF230_TRAC_STATUS_MASK;
+
+					if( call Ieee154PacketLayer.getAckRequired(txMsg) )
+						call AckReceivedFlag.setValue(txMsg, temp != RF230_TRAC_NO_ACK);
+
+					state = STATE_RX_ON;
+					cmd = CMD_NONE;
+
+					signal RadioSend.sendDone(temp != RF230_TRAC_CHANNEL_ACCESS_FAILURE ? SUCCESS : EBUSY);
+
+					// TODO: we could have missed a received message
+					RADIO_ASSERT( ! (irq & RF230_IRQ_RX_START) );
+				}
+				else if( cmd == CMD_NONE )
+				{
+					RADIO_ASSERT( state == STATE_RX_ON );
+
+					if( irq == RF230_IRQ_TRX_END )
+					{
+						call PacketRSSI.set(rxMsg, readRegister(RF230_PHY_ED_LEVEL));
+
+						// TODO: compensate for packet transmission time when downloading
+						time32 = call LocalTime.get();
+						time32 += (int16_t)(time) - (int16_t)(time32);
+						call PacketTimeStamp.set(rxMsg, time32);
+					}
+					else
+					{
+						call PacketRSSI.clear(rxMsg);
+						call PacketTimeStamp.clear(rxMsg);
+					}
+
+					cmd = CMD_DOWNLOAD;
+				}
+				else
+					RADIO_ASSERT(FALSE);
+			}
+		}
+	}
+
+	default tasklet_async event bool RadioReceive.header(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	default tasklet_async event message_t* RadioReceive.receive(message_t* msg)
+	{
+		return msg;
+	}
+
+/*----------------- TASKLET -----------------*/
+
+	tasklet_async event void Tasklet.run()
+	{
+		if( radioIrq )
+			serviceRadio();
+
+		if( cmd != CMD_NONE )
+		{
+			if( cmd == CMD_DOWNLOAD )
+				downloadMessage();
+			else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON )
+				changeState();
+			else if( cmd == CMD_CHANNEL )
+				changeChannel();
+			
+			if( cmd == CMD_SIGNAL_DONE )
+			{
+				cmd = CMD_NONE;
+				signal RadioState.done();
+			}
+		}
+
+		if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq )
+			signal RadioSend.ready();
+
+		if( cmd == CMD_NONE )
+			call SpiResource.release();
+	}
+
+/*----------------- RadioPacket -----------------*/
+	
+	async command uint8_t RadioPacket.headerLength(message_t* msg)
+	{
+		return call Config.headerLength(msg) + sizeof(rf230_header_t);
+	}
+
+	async command uint8_t RadioPacket.payloadLength(message_t* msg)
+	{
+		return getHeader(msg)->length - 2;
+	}
+
+	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		RADIO_ASSERT( 1 <= length && length <= 125 );
+		RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) );
+
+		// we add the length of the CRC, which is automatically generated
+		getHeader(msg)->length = length + 2;
+	}
+
+	async command uint8_t RadioPacket.maxPayloadLength()
+	{
+		RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(rf230_header_t) <= 125 );
+
+		return call Config.maxPayloadLength() - sizeof(rf230_header_t);
+	}
+
+	async command uint8_t RadioPacket.metadataLength(message_t* msg)
+	{
+		return call Config.metadataLength(msg) + sizeof(rf230_metadata_t);
+	}
+
+	async command void RadioPacket.clear(message_t* msg)
+	{
+		// all flags are automatically cleared
+	}
+
+/*----------------- PacketTransmitPower -----------------*/
+
+	async command bool PacketTransmitPower.isSet(message_t* msg)
+	{
+		return call TransmitPowerFlag.get(msg);
+	}
+
+	async command uint8_t PacketTransmitPower.get(message_t* msg)
+	{
+		return getMeta(msg)->power;
+	}
+
+	async command void PacketTransmitPower.clear(message_t* msg)
+	{
+		call TransmitPowerFlag.clear(msg);
+	}
+
+	async command void PacketTransmitPower.set(message_t* msg, uint8_t value)
+	{
+		call TransmitPowerFlag.set(msg);
+		getMeta(msg)->power = value;
+	}
+
+/*----------------- PacketRSSI -----------------*/
+
+	async command bool PacketRSSI.isSet(message_t* msg)
+	{
+		return call RSSIFlag.get(msg);
+	}
+
+	async command uint8_t PacketRSSI.get(message_t* msg)
+	{
+		return getMeta(msg)->rssi;
+	}
+
+	async command void PacketRSSI.clear(message_t* msg)
+	{
+		call RSSIFlag.clear(msg);
+	}
+
+	async command void PacketRSSI.set(message_t* msg, uint8_t value)
+	{
+		// just to be safe if the user fails to clear the packet
+		call TransmitPowerFlag.clear(msg);
+
+		call RSSIFlag.set(msg);
+		getMeta(msg)->rssi = value;
+	}
+
+/*----------------- PacketTimeSyncOffset -----------------*/
+
+	async command bool PacketTimeSyncOffset.isSet(message_t* msg)
+	{
+		return call TimeSyncFlag.get(msg);
+	}
+
+	async command uint8_t PacketTimeSyncOffset.get(message_t* msg)
+	{
+		return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t);
+	}
+
+	async command void PacketTimeSyncOffset.clear(message_t* msg)
+	{
+		call TimeSyncFlag.clear(msg);
+	}
+
+	async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value)
+	{
+		// we do not store the value, the time sync field is always the last 4 bytes
+		RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value );
+
+		call TimeSyncFlag.set(msg);
+	}
+
+/*----------------- PacketLinkQuality -----------------*/
+
+	async command bool PacketLinkQuality.isSet(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	async command uint8_t PacketLinkQuality.get(message_t* msg)
+	{
+		return getMeta(msg)->lqi;
+	}
+
+	async command void PacketLinkQuality.clear(message_t* msg)
+	{
+	}
+
+	async command void PacketLinkQuality.set(message_t* msg, uint8_t value)
+	{
+		getMeta(msg)->lqi = value;
+	}
+
+/*----------------- PacketAcknowledgements -----------------*/
+
+	async command error_t PacketAcknowledgements.requestAck(message_t* msg)
+	{
+		call Ieee154PacketLayer.setAckRequired(msg, TRUE);
+
+		return SUCCESS;
+	}
+
+	async command error_t PacketAcknowledgements.noAck(message_t* msg)
+	{
+		call Ieee154PacketLayer.setAckRequired(msg, FALSE);
+
+		return SUCCESS;
+	}
+
+	async command bool PacketAcknowledgements.wasAcked(message_t* msg)
+	{
+		return call AckReceivedFlag.get(msg);
+	}
+}
diff --git a/tos/platforms/mulle/fix/RF230DriverLayerP.nc b/tos/platforms/mulle/fix/RF230DriverLayerP.nc
new file mode 100644
index 00000000..01a27e63
--- /dev/null
+++ b/tos/platforms/mulle/fix/RF230DriverLayerP.nc
@@ -0,0 +1,1019 @@
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+#include <RF230DriverLayer.h>
+#include <Tasklet.h>
+#include <RadioAssert.h>
+#include <TimeSyncMessageLayer.h>
+#include <RadioConfig.h>
+
+module RF230DriverLayerP
+{
+	provides
+	{
+		interface Init as PlatformInit @exactlyonce();
+		interface Init as SoftwareInit @exactlyonce();
+
+		interface RadioState;
+		interface RadioSend;
+		interface RadioReceive;
+		interface RadioCCA;
+		interface RadioPacket;
+
+		interface PacketField<uint8_t> as PacketTransmitPower;
+		interface PacketField<uint8_t> as PacketRSSI;
+		interface PacketField<uint8_t> as PacketTimeSyncOffset;
+		interface PacketField<uint8_t> as PacketLinkQuality;
+	}
+
+	uses
+	{
+		interface GeneralIO as SELN;
+		interface Resource as SpiResource;
+
+		interface FastSpiByte;
+
+		interface GeneralIO as SLP_TR;
+		interface GeneralIO as RSTN;
+
+		interface GpioCapture as IRQ;
+
+		interface BusyWait<TMicro, uint16_t>;
+		interface LocalTime<TRadio>;
+
+		interface RF230DriverConfig as Config;
+
+		interface PacketFlag as TransmitPowerFlag;
+		interface PacketFlag as RSSIFlag;
+		interface PacketFlag as TimeSyncFlag;
+
+		interface PacketTimeStamp<TRadio, uint32_t>;
+
+		interface Tasklet;
+		interface RadioAlarm;
+
+#ifdef RADIO_DEBUG
+		interface DiagMsg;
+#endif
+	}
+}
+
+implementation
+{
+	rf230_header_t* getHeader(message_t* msg)
+	{
+		return ((void*)msg) + call Config.headerLength(msg);
+	}
+
+	void* getPayload(message_t* msg)
+	{
+		return ((void*)msg) + call RadioPacket.headerLength(msg);
+	}
+
+	rf230_metadata_t* getMeta(message_t* msg)
+	{
+		return ((void*)msg) + sizeof(message_t) - call RadioPacket.metadataLength(msg);
+	}
+
+/*----------------- STATE -----------------*/
+
+	tasklet_norace uint8_t state;
+	enum
+	{
+		STATE_P_ON = 0,
+		STATE_SLEEP = 1,
+		STATE_SLEEP_2_TRX_OFF = 2,
+		STATE_TRX_OFF = 3,
+		STATE_TRX_OFF_2_RX_ON = 4,
+		STATE_RX_ON = 5,
+		STATE_BUSY_TX_2_RX_ON = 6,
+		STATE_PLL_ON_2_RX_ON = 7,
+	};
+
+	tasklet_norace uint8_t cmd;
+	enum
+	{
+		CMD_NONE = 0,			// the state machine has stopped
+		CMD_TURNOFF = 1,		// goto SLEEP state
+		CMD_STANDBY = 2,		// goto TRX_OFF state
+		CMD_TURNON = 3,			// goto RX_ON state
+		CMD_TRANSMIT = 4,		// currently transmitting a message
+		CMD_RECEIVE = 5,		// currently receiving a message
+		CMD_CCA = 6,			// performing clear chanel assesment
+		CMD_CHANNEL = 7,		// changing the channel
+		CMD_SIGNAL_DONE = 8,		// signal the end of the state transition
+		CMD_DOWNLOAD = 9,		// download the received message
+	};
+
+	norace bool radioIrq;
+
+	tasklet_norace uint8_t txPower;
+	tasklet_norace uint8_t channel;
+
+	tasklet_norace message_t* rxMsg;
+	message_t rxMsgBuffer;
+
+	uint16_t capturedTime;	// the current time when the last interrupt has occured
+
+	tasklet_norace uint8_t rssiClear;
+	tasklet_norace uint8_t rssiBusy;
+
+/*----------------- REGISTER -----------------*/
+
+	inline void writeRegister(uint8_t reg, uint8_t value)
+	{
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF230_CMD_REGISTER_WRITE | reg);
+		call FastSpiByte.splitReadWrite(value);
+		call FastSpiByte.splitRead();
+		call SELN.set();
+	}
+
+	inline uint8_t readRegister(uint8_t reg)
+	{
+		RADIO_ASSERT( call SpiResource.isOwner() );
+		RADIO_ASSERT( reg == (reg & RF230_CMD_REGISTER_MASK) );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF230_CMD_REGISTER_READ | reg);
+		call FastSpiByte.splitReadWrite(0);
+		reg = call FastSpiByte.splitRead();
+		call SELN.set();
+
+		return reg;
+	}
+
+/*----------------- ALARM -----------------*/
+
+	enum
+	{
+		SLEEP_WAKEUP_TIME = (uint16_t)(880 * RADIO_ALARM_MICROSEC),
+		CCA_REQUEST_TIME = (uint16_t)(140 * RADIO_ALARM_MICROSEC),
+
+		TX_SFD_DELAY = (uint16_t)(176 * RADIO_ALARM_MICROSEC),
+		RX_SFD_DELAY = (uint16_t)(8 * RADIO_ALARM_MICROSEC),
+	};
+
+	tasklet_async event void RadioAlarm.fired()
+	{
+		if( state == STATE_SLEEP_2_TRX_OFF )
+			state = STATE_TRX_OFF;
+		else if( cmd == CMD_CCA )
+		{
+			uint8_t cca;
+
+			RADIO_ASSERT( state == STATE_RX_ON );
+
+			cmd = CMD_NONE;
+			cca = readRegister(RF230_TRX_STATUS);
+
+			RADIO_ASSERT( (cca & RF230_TRX_STATUS_MASK) == RF230_RX_ON );
+
+			signal RadioCCA.done( (cca & RF230_CCA_DONE) ? ((cca & RF230_CCA_STATUS) ? SUCCESS : EBUSY) : FAIL );
+		}
+		else
+			RADIO_ASSERT(FALSE);
+
+		// make sure the rest of the command processing is called
+		call Tasklet.schedule();
+	}
+
+/*----------------- INIT -----------------*/
+
+	command error_t PlatformInit.init()
+	{
+		call SELN.makeOutput();
+		call SELN.set();
+		call SLP_TR.makeOutput();
+		call SLP_TR.clr();
+		call RSTN.makeOutput();
+		call RSTN.set();
+
+		rxMsg = &rxMsgBuffer;
+
+		// these are just good approximates
+		rssiClear = 0;
+		rssiBusy = 90;
+
+		return SUCCESS;
+	}
+
+	command error_t SoftwareInit.init()
+	{
+		// for powering up the radio
+		return call SpiResource.request();
+	}
+
+	void initRadio()
+	{
+		call BusyWait.wait(510);
+
+		call RSTN.clr();
+		call SLP_TR.clr();
+		call BusyWait.wait(6);
+		call RSTN.set();
+
+		writeRegister(RF230_TRX_CTRL_0, RF230_TRX_CTRL_0_VALUE);
+		writeRegister(RF230_TRX_STATE, RF230_TRX_OFF);
+
+		call BusyWait.wait(510);
+
+		writeRegister(RF230_IRQ_MASK, RF230_IRQ_TRX_UR | RF230_IRQ_PLL_LOCK | RF230_IRQ_TRX_END | RF230_IRQ_RX_START);
+		writeRegister(RF230_CCA_THRES, RF230_CCA_THRES_VALUE);
+		writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | (RF230_DEF_RFPOWER & RF230_TX_PWR_MASK));
+
+		txPower = RF230_DEF_RFPOWER & RF230_TX_PWR_MASK;
+		channel = RF230_DEF_CHANNEL & RF230_CHANNEL_MASK;
+		writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);
+
+		call SLP_TR.set();
+		state = STATE_SLEEP;
+	}
+
+/*----------------- SPI -----------------*/
+
+	event void SpiResource.granted()
+	{
+		call SELN.makeOutput();
+		call SELN.set();
+
+		if( state == STATE_P_ON )
+		{
+			initRadio();
+			call SpiResource.release();
+		}
+		else
+			call Tasklet.schedule();
+	}
+
+	bool isSpiAcquired()
+	{
+		if( call SpiResource.isOwner() )
+			return TRUE;
+
+		if( call SpiResource.immediateRequest() == SUCCESS )
+		{
+			call SELN.makeOutput();
+			call SELN.set();
+
+			return TRUE;
+		}
+
+		call SpiResource.request();
+		return FALSE;
+	}
+
+/*----------------- CHANNEL -----------------*/
+
+	tasklet_async command uint8_t RadioState.getChannel()
+	{
+		return channel;
+	}
+
+	tasklet_async command error_t RadioState.setChannel(uint8_t c)
+	{
+		c &= RF230_CHANNEL_MASK;
+
+		if( cmd != CMD_NONE )
+			return EBUSY;
+		else if( channel == c )
+			return EALREADY;
+
+		channel = c;
+		cmd = CMD_CHANNEL;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	inline void changeChannel()
+	{
+		RADIO_ASSERT( cmd == CMD_CHANNEL );
+		RADIO_ASSERT( state == STATE_SLEEP || state == STATE_TRX_OFF || state == STATE_RX_ON );
+
+		if( isSpiAcquired() )
+		{
+			writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);
+
+			if( state == STATE_RX_ON )
+				state = STATE_TRX_OFF_2_RX_ON;
+			else
+				cmd = CMD_SIGNAL_DONE;
+		}
+	}
+
+/*----------------- TURN ON/OFF -----------------*/
+
+	inline void changeState()
+	{
+		if( (cmd == CMD_STANDBY || cmd == CMD_TURNON)
+			&& state == STATE_SLEEP && call RadioAlarm.isFree() )
+		{
+			call SLP_TR.clr();
+
+			call RadioAlarm.wait(SLEEP_WAKEUP_TIME);
+			state = STATE_SLEEP_2_TRX_OFF;
+		}
+		else if( cmd == CMD_TURNON && state == STATE_TRX_OFF && isSpiAcquired() )
+		{
+			RADIO_ASSERT( ! radioIrq );
+
+			readRegister(RF230_IRQ_STATUS); // clear the interrupt register
+			call IRQ.captureRisingEdge();
+
+			// setChannel was ignored in SLEEP because the SPI was not working, so do it here
+			writeRegister(RF230_PHY_CC_CCA, RF230_CCA_MODE_VALUE | channel);
+
+			writeRegister(RF230_TRX_STATE, RF230_RX_ON);
+			state = STATE_TRX_OFF_2_RX_ON;
+		}
+		else if( (cmd == CMD_TURNOFF || cmd == CMD_STANDBY) 
+			&& state == STATE_RX_ON && isSpiAcquired() )
+		{
+			writeRegister(RF230_TRX_STATE, RF230_FORCE_TRX_OFF);
+
+			call IRQ.disable();
+			radioIrq = FALSE;
+
+			state = STATE_TRX_OFF;
+		}
+
+		if( cmd == CMD_TURNOFF && state == STATE_TRX_OFF )
+		{
+			call SLP_TR.set();
+			state = STATE_SLEEP;
+			cmd = CMD_SIGNAL_DONE;
+		}
+		else if( cmd == CMD_STANDBY && state == STATE_TRX_OFF )
+			cmd = CMD_SIGNAL_DONE;
+	}
+
+	tasklet_async command error_t RadioState.turnOff()
+	{
+		if( cmd != CMD_NONE )
+			return EBUSY;
+		else if( state == STATE_SLEEP )
+			return EALREADY;
+
+		cmd = CMD_TURNOFF;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+	
+	tasklet_async command error_t RadioState.standby()
+	{
+		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
+			return EBUSY;
+		else if( state == STATE_TRX_OFF )
+			return EALREADY;
+
+		cmd = CMD_STANDBY;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	tasklet_async command error_t RadioState.turnOn()
+	{
+		if( cmd != CMD_NONE || (state == STATE_SLEEP && ! call RadioAlarm.isFree()) )
+			return EBUSY;
+		else if( state == STATE_RX_ON )
+			return EALREADY;
+
+		cmd = CMD_TURNON;
+		call Tasklet.schedule();
+
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioState.done() { }
+
+/*----------------- TRANSMIT -----------------*/
+
+	tasklet_async command error_t RadioSend.send(message_t* msg)
+	{
+		uint16_t time;
+		uint8_t length;
+		uint8_t* data;
+		uint8_t header;
+		uint32_t time32;
+		void* timesync;
+
+		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || radioIrq )
+			return EBUSY;
+
+		length = (call PacketTransmitPower.isSet(msg) ?
+			call PacketTransmitPower.get(msg) : RF230_DEF_RFPOWER) & RF230_TX_PWR_MASK;
+
+		if( length != txPower )
+		{
+			txPower = length;
+			writeRegister(RF230_PHY_TX_PWR, RF230_TX_AUTO_CRC_ON | txPower);
+		}
+
+		if( call Config.requiresRssiCca(msg) 
+				&& (readRegister(RF230_PHY_RSSI) & RF230_RSSI_MASK) > ((rssiClear + rssiBusy) >> 3) )
+			return EBUSY;
+
+		writeRegister(RF230_TRX_STATE, RF230_PLL_ON);
+
+		// do something useful, just to wait a little
+		time32 = call LocalTime.get();
+		timesync = call PacketTimeSyncOffset.isSet(msg) ? ((void*)msg) + call PacketTimeSyncOffset.get(msg) : 0;
+
+		// we have missed an incoming message in this short amount of time
+		if( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) != RF230_PLL_ON )
+		{
+			RADIO_ASSERT( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) == RF230_BUSY_RX );
+
+			state = STATE_PLL_ON_2_RX_ON;
+			return EBUSY;
+		}
+
+#ifndef RF230_SLOW_SPI_MULLE
+#ifndef RF230_SLOW_SPI
+		atomic
+		{
+			call SLP_TR.set();
+			time = call RadioAlarm.getNow();
+		}
+		call SLP_TR.clr();
+#endif
+#endif
+
+		RADIO_ASSERT( ! radioIrq );
+
+		call SELN.clr();
+		call FastSpiByte.splitWrite(RF230_CMD_FRAME_WRITE);
+
+		data = getPayload(msg);
+		length = getHeader(msg)->length;
+
+		// length | data[0] ... data[length-3] | automatically generated FCS
+		call FastSpiByte.splitReadWrite(length);
+
+		// the FCS is atomatically generated (2 bytes)
+		length -= 2;
+
+		header = call Config.headerPreloadLength();
+		if( header > length )
+			header = length;
+
+		length -= header;
+
+		// first upload the header to gain some time
+		do {
+			call FastSpiByte.splitReadWrite(*(data++));
+		}
+		while( --header != 0 );
+
+#ifndef RF230_SLOW_SPI_MULLE
+#ifdef RF230_SLOW_SPI
+		atomic
+		{
+			call SLP_TR.set();
+			time = call RadioAlarm.getNow();
+		}
+		call SLP_TR.clr();
+#endif
+#else
+		atomic
+		{
+			time = call RadioAlarm.getNow();
+		}
+#endif
+
+		time32 += (int16_t)(time + TX_SFD_DELAY) - (int16_t)(time32);
+
+		if( timesync != 0 )
+			*(timesync_relative_t*)timesync = (*(timesync_absolute_t*)timesync) - time32;
+
+		while( length-- != 0 )
+			call FastSpiByte.splitReadWrite(*(data++));
+
+		// wait for the SPI transfer to finish
+		call FastSpiByte.splitRead();
+#ifdef RF230_SLOW_SPI_MULLE
+		atomic
+		{
+			call SLP_TR.set();
+		}
+		call SLP_TR.clr();
+#endif
+		call SELN.set();
+
+		/*
+		 * There is a very small window (~1 microsecond) when the RF230 went 
+		 * into PLL_ON state but was somehow not properly initialized because 
+		 * of an incoming message and could not go into BUSY_TX. I think the
+		 * radio can even receive a message, and generate a TRX_UR interrupt
+		 * because of concurrent access, but that message probably cannot be
+		 * recovered.
+		 *
+		 * TODO: this needs to be verified, and make sure that the chip is 
+		 * not locked up in this case.
+		 */
+
+		// go back to RX_ON state when finished
+		writeRegister(RF230_TRX_STATE, RF230_RX_ON);
+
+		if( timesync != 0 )
+			*(timesync_absolute_t*)timesync = (*(timesync_relative_t*)timesync) + time32;
+
+		call PacketTimeStamp.set(msg, time32);
+
+#ifdef RADIO_DEBUG_MESSAGES
+		if( call DiagMsg.record() )
+		{
+			length = getHeader(msg)->length;
+
+			call DiagMsg.chr('t');
+			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.int8(length);
+			call DiagMsg.hex8s(getPayload(msg), length - 2);
+			call DiagMsg.send();
+		}
+#endif
+
+		// wait for the TRX_END interrupt
+		state = STATE_BUSY_TX_2_RX_ON;
+		cmd = CMD_TRANSMIT;
+
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioSend.sendDone(error_t error) { }
+	default tasklet_async event void RadioSend.ready() { }
+
+/*----------------- CCA -----------------*/
+
+	tasklet_async command error_t RadioCCA.request()
+	{
+		if( cmd != CMD_NONE || state != STATE_RX_ON || ! isSpiAcquired() || ! call RadioAlarm.isFree() )
+			return EBUSY;
+
+		// see Errata B7 of the datasheet
+		// writeRegister(RF230_TRX_STATE, RF230_PLL_ON);
+		// writeRegister(RF230_TRX_STATE, RF230_RX_ON);
+
+		writeRegister(RF230_PHY_CC_CCA, RF230_CCA_REQUEST | RF230_CCA_MODE_VALUE | channel);
+		call RadioAlarm.wait(CCA_REQUEST_TIME);
+		cmd = CMD_CCA;
+		
+		return SUCCESS;
+	}
+
+	default tasklet_async event void RadioCCA.done(error_t error) { }
+
+/*----------------- RECEIVE -----------------*/
+
+	inline void downloadMessage()
+	{
+		uint8_t length;
+		uint16_t crc;
+
+		call SELN.clr();
+		call FastSpiByte.write(RF230_CMD_FRAME_READ);
+
+		// read the length byte
+		length = call FastSpiByte.write(0);
+
+		// if correct length
+		if( length >= 3 && length <= call RadioPacket.maxPayloadLength() + 2 )
+		{
+			uint8_t read;
+			uint8_t* data;
+
+			// initiate the reading
+			call FastSpiByte.splitWrite(0);
+
+			data = getPayload(rxMsg);
+			getHeader(rxMsg)->length = length;
+			crc = 0;
+
+			// we do not store the CRC field
+			length -= 2;
+
+			read = call Config.headerPreloadLength();
+			if( length < read )
+				read = length;
+
+			length -= read;
+
+			do {
+				crc = RF230_CRCBYTE_COMMAND(crc, *(data++) = call FastSpiByte.splitReadWrite(0));
+			}
+			while( --read != 0  );
+
+			if( signal RadioReceive.header(rxMsg) )
+			{
+				while( length-- != 0 )
+					crc = RF230_CRCBYTE_COMMAND(crc, *(data++) = call FastSpiByte.splitReadWrite(0));
+
+				crc = RF230_CRCBYTE_COMMAND(crc, call FastSpiByte.splitReadWrite(0));
+				crc = RF230_CRCBYTE_COMMAND(crc, call FastSpiByte.splitReadWrite(0));
+
+				call PacketLinkQuality.set(rxMsg, call FastSpiByte.splitRead());
+			}
+			else
+				crc = 1;
+		}
+		else
+			crc = 1;
+
+		call SELN.set();
+		state = STATE_RX_ON;
+
+#ifdef RADIO_DEBUG_MESSAGES
+		if( call DiagMsg.record() )
+		{
+			length = getHeader(rxMsg)->length;
+
+			call DiagMsg.chr('r');
+			call DiagMsg.uint32(call PacketTimeStamp.isValid(rxMsg) ? call PacketTimeStamp.timestamp(rxMsg) : 0);
+			call DiagMsg.uint16(call RadioAlarm.getNow());
+			call DiagMsg.int8(crc == 0 ? length : -length);
+			call DiagMsg.hex8s(getPayload(rxMsg), length - 2);
+			call DiagMsg.int8(call PacketRSSI.isSet(rxMsg) ? call PacketRSSI.get(rxMsg) : -1);
+			call DiagMsg.uint8(call PacketLinkQuality.isSet(rxMsg) ? call PacketLinkQuality.get(rxMsg) : 0);
+			call DiagMsg.send();
+		}
+#endif
+		
+		cmd = CMD_NONE;
+
+		// signal only if it has passed the CRC check
+		if( crc == 0 )
+			rxMsg = signal RadioReceive.receive(rxMsg);
+	}
+
+/*----------------- IRQ -----------------*/
+
+	async event void IRQ.captured(uint16_t time)
+	{
+		RADIO_ASSERT( ! radioIrq );
+
+		atomic
+		{
+			capturedTime = time;
+			radioIrq = TRUE;
+		}
+
+		call Tasklet.schedule();
+	}
+
+	void serviceRadio()
+	{
+		if( isSpiAcquired() )
+		{
+			uint16_t time;
+			uint32_t time32;
+			uint8_t irq;
+			uint8_t temp;
+			
+			atomic time = capturedTime;
+			radioIrq = FALSE;
+			irq = readRegister(RF230_IRQ_STATUS);
+
+#ifdef RADIO_DEBUG
+			// TODO: handle this interrupt
+			if( irq & RF230_IRQ_TRX_UR )
+			{
+				if( call DiagMsg.record() )
+				{
+					call DiagMsg.str("assert ur");
+					call DiagMsg.uint16(call RadioAlarm.getNow());
+					call DiagMsg.hex8(readRegister(RF230_TRX_STATUS));
+					call DiagMsg.hex8(readRegister(RF230_TRX_STATE));
+					call DiagMsg.hex8(irq);
+					call DiagMsg.uint8(state);
+					call DiagMsg.uint8(cmd);
+					call DiagMsg.send();
+				}
+			}
+#endif
+
+#ifdef RF230_RSSI_ENERGY
+			if( irq & RF230_IRQ_TRX_END )
+			{
+				if( irq == RF230_IRQ_TRX_END || 
+					(irq == (RF230_IRQ_RX_START | RF230_IRQ_TRX_END) && cmd == CMD_NONE) )
+					call PacketRSSI.set(rxMsg, readRegister(RF230_PHY_ED_LEVEL));
+				else
+					call PacketRSSI.clear(rxMsg);
+			}
+#endif
+
+			if( irq & RF230_IRQ_PLL_LOCK )
+			{
+				if( cmd == CMD_TURNON || cmd == CMD_CHANNEL )
+				{
+					RADIO_ASSERT( state == STATE_TRX_OFF_2_RX_ON );
+
+					state = STATE_RX_ON;
+					cmd = CMD_SIGNAL_DONE;
+				}
+				else if( cmd == CMD_TRANSMIT )
+				{
+					RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON );
+				}
+				else
+					RADIO_ASSERT(FALSE);
+			}
+
+			if( irq & RF230_IRQ_RX_START )
+			{
+				if( cmd == CMD_CCA )
+				{
+					signal RadioCCA.done(FAIL);
+					cmd = CMD_NONE;
+				}
+
+				if( cmd == CMD_NONE )
+				{
+					RADIO_ASSERT( state == STATE_RX_ON || state == STATE_PLL_ON_2_RX_ON );
+
+					// the most likely place for busy channel, with no TRX_END interrupt
+					if( irq == RF230_IRQ_RX_START )
+					{
+						temp = readRegister(RF230_PHY_RSSI) & RF230_RSSI_MASK;
+						rssiBusy += temp - (rssiBusy >> 2);
+#ifndef RF230_RSSI_ENERGY
+						call PacketRSSI.set(rxMsg, temp);
+					}
+					else
+					{
+						call PacketRSSI.clear(rxMsg);
+#endif
+					}
+
+					/*
+					 * The timestamp corresponds to the first event which could not
+					 * have been a PLL_LOCK because then cmd != CMD_NONE, so we must
+					 * have received a message (and could also have received the 
+					 * TRX_END interrupt in the mean time, but that is fine. Also,
+					 * we could not be after a transmission, because then cmd = 
+					 * CMD_TRANSMIT.
+					 */
+					if( irq == RF230_IRQ_RX_START ) // just to be cautious
+					{
+						time32 = call LocalTime.get();
+						time32 += (int16_t)(time - RX_SFD_DELAY) - (int16_t)(time32);
+						call PacketTimeStamp.set(rxMsg, time32);
+					}
+					else
+						call PacketTimeStamp.clear(rxMsg);
+
+					cmd = CMD_RECEIVE;
+				}
+				else
+					RADIO_ASSERT( cmd == CMD_TURNOFF );
+			}
+
+			if( irq & RF230_IRQ_TRX_END )
+			{
+				if( cmd == CMD_TRANSMIT )
+				{
+					RADIO_ASSERT( state == STATE_BUSY_TX_2_RX_ON );
+
+					state = STATE_RX_ON;
+					cmd = CMD_NONE;
+					signal RadioSend.sendDone(SUCCESS);
+
+					// TODO: we could have missed a received message
+					RADIO_ASSERT( ! (irq & RF230_IRQ_RX_START) );
+				}
+				else if( cmd == CMD_RECEIVE )
+				{
+					RADIO_ASSERT( state == STATE_RX_ON || state == STATE_PLL_ON_2_RX_ON );
+
+					if( state == STATE_PLL_ON_2_RX_ON )
+					{
+						RADIO_ASSERT( (readRegister(RF230_TRX_STATUS) & RF230_TRX_STATUS_MASK) == RF230_PLL_ON );
+
+						writeRegister(RF230_TRX_STATE, RF230_RX_ON);
+						state = STATE_RX_ON;
+					}
+					else
+					{
+						// the most likely place for clear channel (hope to avoid acks)
+						rssiClear += (readRegister(RF230_PHY_RSSI) & RF230_RSSI_MASK) - (rssiClear >> 2);
+					}
+
+					cmd = CMD_DOWNLOAD;
+				}
+				else
+					RADIO_ASSERT(FALSE);
+			}
+		}
+	}
+
+	default tasklet_async event bool RadioReceive.header(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	default tasklet_async event message_t* RadioReceive.receive(message_t* msg)
+	{
+		return msg;
+	}
+
+/*----------------- TASKLET -----------------*/
+
+	tasklet_async event void Tasklet.run()
+	{
+		if( radioIrq )
+			serviceRadio();
+
+		if( cmd != CMD_NONE )
+		{
+			if( cmd == CMD_DOWNLOAD )
+				downloadMessage();
+			else if( CMD_TURNOFF <= cmd && cmd <= CMD_TURNON )
+				changeState();
+			else if( cmd == CMD_CHANNEL )
+				changeChannel();
+			
+			if( cmd == CMD_SIGNAL_DONE )
+			{
+				cmd = CMD_NONE;
+				signal RadioState.done();
+			}
+		}
+
+		if( cmd == CMD_NONE && state == STATE_RX_ON && ! radioIrq )
+			signal RadioSend.ready();
+
+		if( cmd == CMD_NONE )
+			call SpiResource.release();
+	}
+
+/*----------------- RadioPacket -----------------*/
+	
+	async command uint8_t RadioPacket.headerLength(message_t* msg)
+	{
+		return call Config.headerLength(msg) + sizeof(rf230_header_t);
+	}
+
+	async command uint8_t RadioPacket.payloadLength(message_t* msg)
+	{
+		return getHeader(msg)->length - 2;
+	}
+
+	async command void RadioPacket.setPayloadLength(message_t* msg, uint8_t length)
+	{
+		RADIO_ASSERT( 1 <= length && length <= 125 );
+		RADIO_ASSERT( call RadioPacket.headerLength(msg) + length + call RadioPacket.metadataLength(msg) <= sizeof(message_t) );
+
+		// we add the length of the CRC, which is automatically generated
+		getHeader(msg)->length = length + 2;
+	}
+
+	async command uint8_t RadioPacket.maxPayloadLength()
+	{
+		RADIO_ASSERT( call Config.maxPayloadLength() - sizeof(rf230_header_t) <= 125 );
+
+		return call Config.maxPayloadLength() - sizeof(rf230_header_t);
+	}
+
+	async command uint8_t RadioPacket.metadataLength(message_t* msg)
+	{
+		return call Config.metadataLength(msg) + sizeof(rf230_metadata_t);
+	}
+
+	async command void RadioPacket.clear(message_t* msg)
+	{
+		// all flags are automatically cleared
+	}
+
+/*----------------- PacketTransmitPower -----------------*/
+
+	async command bool PacketTransmitPower.isSet(message_t* msg)
+	{
+		return call TransmitPowerFlag.get(msg);
+	}
+
+	async command uint8_t PacketTransmitPower.get(message_t* msg)
+	{
+		return getMeta(msg)->power;
+	}
+
+	async command void PacketTransmitPower.clear(message_t* msg)
+	{
+		call TransmitPowerFlag.clear(msg);
+	}
+
+	async command void PacketTransmitPower.set(message_t* msg, uint8_t value)
+	{
+		call TransmitPowerFlag.set(msg);
+		getMeta(msg)->power = value;
+	}
+
+/*----------------- PacketRSSI -----------------*/
+
+	async command bool PacketRSSI.isSet(message_t* msg)
+	{
+		return call RSSIFlag.get(msg);
+	}
+
+	async command uint8_t PacketRSSI.get(message_t* msg)
+	{
+		return getMeta(msg)->rssi;
+	}
+
+	async command void PacketRSSI.clear(message_t* msg)
+	{
+		call RSSIFlag.clear(msg);
+	}
+
+	async command void PacketRSSI.set(message_t* msg, uint8_t value)
+	{
+		// just to be safe if the user fails to clear the packet
+		call TransmitPowerFlag.clear(msg);
+
+		call RSSIFlag.set(msg);
+		getMeta(msg)->rssi = value;
+	}
+
+/*----------------- PacketTimeSyncOffset -----------------*/
+
+	async command bool PacketTimeSyncOffset.isSet(message_t* msg)
+	{
+		return call TimeSyncFlag.get(msg);
+	}
+
+	async command uint8_t PacketTimeSyncOffset.get(message_t* msg)
+	{
+		return call RadioPacket.headerLength(msg) + call RadioPacket.payloadLength(msg) - sizeof(timesync_absolute_t);
+	}
+
+	async command void PacketTimeSyncOffset.clear(message_t* msg)
+	{
+		call TimeSyncFlag.clear(msg);
+	}
+
+	async command void PacketTimeSyncOffset.set(message_t* msg, uint8_t value)
+	{
+		// we do not store the value, the time sync field is always the last 4 bytes
+		RADIO_ASSERT( call PacketTimeSyncOffset.get(msg) == value );
+
+		call TimeSyncFlag.set(msg);
+	}
+
+/*----------------- PacketLinkQuality -----------------*/
+
+	async command bool PacketLinkQuality.isSet(message_t* msg)
+	{
+		return TRUE;
+	}
+
+	async command uint8_t PacketLinkQuality.get(message_t* msg)
+	{
+		return getMeta(msg)->lqi;
+	}
+
+	async command void PacketLinkQuality.clear(message_t* msg)
+	{
+	}
+
+	async command void PacketLinkQuality.set(message_t* msg, uint8_t value)
+	{
+		getMeta(msg)->lqi = value;
+	}
+}
diff --git a/tos/platforms/mulle/hardware.h b/tos/platforms/mulle/hardware.h
new file mode 100755
index 00000000..c106ac5e
--- /dev/null
+++ b/tos/platforms/mulle/hardware.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#ifndef __HARDWARE_H__
+#define __HARDWARE_H__
+
+#define MAIN_CRYSTAL_SPEED 10 /*MHz*/
+#define PLL_MULTIPLIER M16C62P_PLL_2
+
+#define RF230_SLOW_SPI_MULLE
+
+#ifdef RF230_SLOW_SPI_MULLE
+#warning You are using the RF230 driver with a Mulle specific software fix. If you are using some very timecritical network protocols these may not work as intended! \
+You should not remove this fix unless you are totaly sure of what you are doing!
+#endif
+
+#ifdef ENABLE_STOP_MODE
+#warning Stop mode enabled!
+#include "pin_configuration.h"
+#endif
+
+#include "m16c62phardware.h" // Header file for the MCU
+
+#endif  // __HARDWARE_H__
+
+
diff --git a/tos/platforms/mulle/lib/AVccClientC.nc b/tos/platforms/mulle/lib/AVccClientC.nc
new file mode 100644
index 00000000..1fa4944e
--- /dev/null
+++ b/tos/platforms/mulle/lib/AVccClientC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Every component that intends to use AVcc on Mulle should create
+ * an instance of this configuration and activate and deactivate
+ * AVcc by the StdControl provided here.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "MulleAVcc.h"
+
+generic configuration AVccClientC()
+{
+  provides interface StdControl;
+}
+implementation
+{
+  components AVccClientP;
+
+  enum {
+    CLIENT_ID = unique(AVCC_CLIENTS),
+  };
+
+  StdControl = AVccClientP.StdControl[CLIENT_ID];
+}
diff --git a/tos/platforms/mulle/lib/AVccClientP.nc b/tos/platforms/mulle/lib/AVccClientP.nc
new file mode 100644
index 00000000..d43057c9
--- /dev/null
+++ b/tos/platforms/mulle/lib/AVccClientP.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Wiring for the shared AVcc StdControl.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "MulleAVcc.h"
+
+configuration AVccClientP
+{
+  provides interface StdControl[uint8_t client];
+}
+implementation
+{
+  components new MultiUserStdControlC(AVCC_CLIENTS), AVccStdControlC,
+             HplM16c62pGeneralIOC as IOs;
+
+  AVccStdControlC.AVccPin -> IOs.PortP76;
+  MultiUserStdControlC -> AVccStdControlC.StdControl;
+  StdControl = MultiUserStdControlC;
+}
diff --git a/tos/platforms/mulle/lib/AVccStdControlC.nc b/tos/platforms/mulle/lib/AVccStdControlC.nc
new file mode 100644
index 00000000..fdb084cf
--- /dev/null
+++ b/tos/platforms/mulle/lib/AVccStdControlC.nc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of a StdControl for the AVcc on Mulle.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+module AVccStdControlC
+{
+  provides interface StdControl;
+  uses interface GeneralIO as AVccPin;
+}
+implementation
+{
+  enum
+  {
+    S_OFF,
+    S_ON,
+  };
+
+  uint8_t m_state = S_OFF;
+
+  command error_t StdControl.start()
+  {
+    if (m_state != S_OFF)
+    {
+      return EALREADY;
+    }
+    call AVccPin.makeOutput();
+    call AVccPin.set();
+
+    m_state = S_ON;
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop()
+  {
+    if (m_state == S_OFF)
+    {
+      return EALREADY;
+    }
+    call AVccPin.makeOutput();
+    call AVccPin.clr();
+    
+    m_state = S_OFF;
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/mulle/lib/AdcReadC.nc b/tos/platforms/mulle/lib/AdcReadC.nc
new file mode 100644
index 00000000..3d84f76d
--- /dev/null
+++ b/tos/platforms/mulle/lib/AdcReadC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Generic configuration for creating a Read interface for a AD converter
+ * on the Mulle platform. The Read interface provided will handle the 
+ * turning on and off of the VRef pin provided by AVcc.
+ *
+ * For a example of use see tos/platform/mulle/DemoSensorC.nc.
+ *
+ * NOTE: The VRef pin can still be handled manually if needed by using
+ *       the StdControl provided by AVccClientC.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+generic configuration AdcReadC(uint8_t channel, uint8_t precision, uint8_t prescaler)
+{
+  provides interface Read<uint16_t>;
+
+  uses interface GeneralIO as Pin;
+}
+implementation
+{
+  components new AdcReadP(channel, precision, prescaler),
+      RealMainP, new AdcReadClientC(), new AVccClientC();
+
+  AdcReadP.Pin = Pin;
+  AdcReadP.ReadAdc -> AdcReadClientC;
+  AdcReadP.AVccControl -> AVccClientC;
+
+  AdcReadClientC.M16c62pAdcConfig -> AdcReadP;
+
+  Read = AdcReadP;
+}
diff --git a/tos/platforms/mulle/lib/AdcReadP.nc b/tos/platforms/mulle/lib/AdcReadP.nc
new file mode 100644
index 00000000..5c2ac407
--- /dev/null
+++ b/tos/platforms/mulle/lib/AdcReadP.nc
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of a Read interface that can be used to read a AD port
+ * on Mulle. It will switch VRef on and off automatically and also set
+ * the AD port as input.
+ *
+ * NOTE: The state of the AD port will not be changed from input on a
+ *       readDone event.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+generic module AdcReadP(uint8_t channel, uint8_t precision, uint8_t prescaler)
+{
+  provides interface M16c62pAdcConfig;
+  provides interface Read<uint16_t>;
+
+  uses interface GeneralIO as Pin;
+  uses interface Read<uint16_t> as ReadAdc;
+  uses interface StdControl as AVccControl;
+}
+implementation
+{
+  async command uint8_t M16c62pAdcConfig.getChannel()
+  {
+    return channel;
+  }
+
+  async command uint8_t M16c62pAdcConfig.getPrecision()
+  {
+    return precision;
+  }
+
+  async command uint8_t M16c62pAdcConfig.getPrescaler()
+  {
+    return prescaler;
+  }
+
+  enum
+  {
+    S_IDLE,
+    S_READING,
+  };
+
+  uint8_t m_state = S_IDLE;
+
+  command error_t Read.read()
+  {
+    if (m_state != S_IDLE)
+    {
+      return EBUSY;
+    }
+    call AVccControl.start();
+    call Pin.makeInput();
+
+    if (call ReadAdc.read() != SUCCESS)
+    {
+      call AVccControl.stop();
+    }
+    m_state = S_READING;
+    return SUCCESS;
+  }
+
+  event void ReadAdc.readDone(error_t e, uint16_t val)
+  {
+    m_state = S_IDLE;
+    // The control of the off state for the pin should be
+    // handled from somewhere else.
+    call AVccControl.stop();
+    signal Read.readDone(e, val);
+  }
+
+  default async command void Pin.makeInput() {}
+}
diff --git a/tos/platforms/mulle/lib/MulleAVcc.h b/tos/platforms/mulle/lib/MulleAVcc.h
new file mode 100644
index 00000000..2f3d91fb
--- /dev/null
+++ b/tos/platforms/mulle/lib/MulleAVcc.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Unique count variable for the AVcc MultipleStdControl.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+#ifndef __MULLE_AVCC_H__
+#define __MULLE_AVCC_H__
+
+#define AVCC_CLIENTS "mulle.avcc.clients"
+
+#endif // __MULLE_AVCC_H__
diff --git a/tos/platforms/mulle/lib/MultiUserStdControlC.nc b/tos/platforms/mulle/lib/MultiUserStdControlC.nc
new file mode 100644
index 00000000..b1e36b8c
--- /dev/null
+++ b/tos/platforms/mulle/lib/MultiUserStdControlC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Wiring for the MultiUserStdControl module.
+ * A StdControl used by many different components, eg a StdControl for AVcc,
+ * can be turned into a shared resource.
+ *
+ * @param name The name of the unique count variable used to indicate the
+ *             number of users for this shared StdControl.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+generic configuration MultiUserStdControlC(char name[])
+{
+  provides interface StdControl[uint8_t client];
+  uses interface StdControl as SharedStdControl;
+}
+implementation
+{
+  components new MultiUserStdControlP(),
+             new BitVectorC(uniqueCount(name));
+
+  MultiUserStdControlP.BitVector -> BitVectorC;
+  MultiUserStdControlP.SharedStdControl = SharedStdControl;
+  StdControl = MultiUserStdControlP;
+}
diff --git a/tos/platforms/mulle/lib/MultiUserStdControlP.nc b/tos/platforms/mulle/lib/MultiUserStdControlP.nc
new file mode 100644
index 00000000..4786ee13
--- /dev/null
+++ b/tos/platforms/mulle/lib/MultiUserStdControlP.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * A module creating multiple StdControls from one shared StdControl.
+ * The shared StdControl will only be turned off once all of the
+ * StdControls provided by this module are turned off.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+generic module MultiUserStdControlP()
+{
+  provides interface StdControl[uint8_t client];
+
+  uses interface StdControl as SharedStdControl;
+  uses interface BitVector;
+}
+implementation
+{
+
+  command error_t StdControl.start[uint8_t client]()
+  {
+    call BitVector.set(client);
+    return call SharedStdControl.start();
+  }
+
+  command error_t StdControl.stop[uint8_t client]()
+  {
+    uint16_t i;
+    call BitVector.clear(client);
+    for (i = 0; i < call BitVector.size(); ++i)
+    {
+      if (call BitVector.get(i))
+      {
+        // There is some other resource that still is
+        // using the module controlled by this StdControl.
+        // We cant turn off now, so return SUCCESS.
+        return SUCCESS;
+      }
+    }
+    return call SharedStdControl.stop();
+  }
+}
diff --git a/tos/platforms/mulle/pin_configuration.h b/tos/platforms/mulle/pin_configuration.h
new file mode 100644
index 00000000..8bae1b68
--- /dev/null
+++ b/tos/platforms/mulle/pin_configuration.h
@@ -0,0 +1,218 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Inactive pin states on Mulle.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#ifndef __PIN_CONFIGURATION_H__
+#define __PIN_CONFIGURATION_H__
+
+//P00/D0/AN10
+//P01/D1/AN11
+//P02/D2/AN12
+//P03/D3/AN13
+//P04/D4/AN14
+//P05/D5/AN15
+//P06/D6/AN16
+//P07/D7/AN17 - Radio.SLP_TR
+#define PORT_P0_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)
+
+//P10/D8	RADIO.MISO (INPUT)
+//P11/D9	RADIO.MOSI
+//P12/D10	Accel.SLEEP_MODE
+//P13/D11
+//P14/D12
+//P15/D13/INT3
+//P16/D14/INT4
+//P17/D15/INT5
+#define PORT_P1_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)
+
+#define PORT_P2_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)
+
+//P30       Accel.GS1
+//P31       Accel.GS2  
+//P32/A10	Flash.EN
+//P33/A11	Radio.SCLK
+//P34/A12	Ext. LED
+//P35/A13	Radio.SEL (HIGH)
+//P36/A14	Red LED
+//P37/A14	Green LED                                                   
+#define PORT_P3_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_HIGH,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)
+     
+//P40/A16	Flash.SO
+//P41/A17	Flash.SI
+//P42/A18	Flash.SCK
+//P43/A19	Radio.RST (HIGH)
+//P44/CS0	Flash.WP
+//P45/CS1	Flash.CS
+//P46/CS2	Flash.RESET
+//P47/CS3	RTC.CLKOE
+#define PORT_P4_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)
+
+#define PORT_P5_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_INPUT,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_INPUT,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)
+
+
+//P62/RXD0	UART0.TXD
+//P63/TXD0	UART0.RXD
+//P66/RXD1	UART1.TXD
+//P67/TXD1	UART1.RXD
+#define PORT_P6_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)
+
+//P70/TXD2/SDA2	UART2.TXD
+//P71/RDX2/SCK2	UART2.TXD
+//P72/TA1OUT
+//P74/TA2OUT
+//P75	Vcc for I2C (must be pulled high before the I2C bus can be used)
+//P76	Accel VCC
+//P77	Radio VCC (HIGH)
+#define PORT_P7_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW)
+
+
+//P80/TA4OUT	H1.47 ; IC1.P97/ADTRG
+//P81/TA4IN
+//P82/INT0	RTC.CLKOUT
+//P83/INT1	RADIO.IRQ (INPUT)
+//P84/INT2	RTC.INT
+//P85/NMI	pulled high through resistor
+//P87/XCIN	RTC.CLKOUT
+#define PORT_P8_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_INPUT,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_INPUT,\
+                                                        M16C_PIN_INACTIVE_INPUT,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_INPUT)
+
+//P90/TB0IN	RTC.CLKOUT
+//P91
+//P92/TB2IN	RTC.CLKOUT
+//P93/DA0/TB3IN
+//P94/DA1/TB4IN
+//P95/ANEX0
+//P96/ANEX1
+//P97/ADTRG
+#define PORT_P9_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_INPUT,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_INPUT,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                        M16C_PIN_INACTIVE_INPUT)
+
+//P100/AN00
+//P101/AN01
+//P102/AN02
+//P103/AN03 - Accel.Z
+//P104/AN04 - Accel.Y
+//P105/AN05 - Accel.X
+//P106/AN06
+//P107/AN07
+#define PORT_P_10_INACTIVE_STATE M16C_PORT_INACTIVE_STATE(M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                          M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                          M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                          M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                          M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                          M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                          M16C_PIN_INACTIVE_OUTPUT_LOW,\
+                                                          M16C_PIN_INACTIVE_OUTPUT_LOW)
+
+
+
+
+
+
+#endif //__PIN_CONFIGURATION_H__
diff --git a/tos/platforms/mulle/platform.h b/tos/platforms/mulle/platform.h
new file mode 100755
index 00000000..bfe6a31f
--- /dev/null
+++ b/tos/platforms/mulle/platform.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * Defines for the different speeds supported on the Mulle platform.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#ifndef __PLATFORM_H__
+#define __PLATFORM_H__
+
+
+#define MCU_SPEED_20MHz     M16C62P_PLL_CLOCK
+#define MCU_SPEED_10MHz     M16C62P_MAIN_CLOCK_DIV_0 
+#define MCU_SPEED_5MHz      M16C62P_MAIN_CLOCK_DIV_2 
+#define MCU_SPEED_2_5MHz    M16C62P_MAIN_CLOCK_DIV_4 
+#define MCU_SPEED_1_25MHz   M16C62P_MAIN_CLOCK_DIV_8 
+#define MCU_SPEED_0_625MHz  M16C62P_MAIN_CLOCK_DIV_16
+#define MCU_SPEED_32KHz     M16C62P_SUB_CLOCK
+
+#endif  // __PLATFORM_H__
diff --git a/tos/platforms/mulle/platform_message.h b/tos/platforms/mulle/platform_message.h
new file mode 100755
index 00000000..bbdfd755
--- /dev/null
+++ b/tos/platforms/mulle/platform_message.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+#ifndef __PLATFORM_MESSAGE_H__
+#define __PLATFORM_MESSAGE_H__
+
+#include "Serial.h"
+#include <RF230Radio.h>
+
+
+typedef union message_header {
+	rf230packet_header_t rf230;
+	serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+	rf230packet_footer_t rf230;
+} message_footer_t;
+
+typedef union message_metadata {
+	rf230packet_metadata_t rf230;
+} message_metadata_t;
+
+
+#endif  // __PLATFORM_MESSAGE_H__
diff --git a/tos/platforms/mulle/softwarei2c/MulleI2C.h b/tos/platforms/mulle/softwarei2c/MulleI2C.h
new file mode 100755
index 00000000..5cbdc839
--- /dev/null
+++ b/tos/platforms/mulle/softwarei2c/MulleI2C.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+#ifndef __MULLEI2C_H__
+#define __MULLEI2C_H__
+
+#define UQ_MULLE_SOFTWAREI2C_2 "UQ_MULLE_SOFTWAREI2C_2"
+
+#endif // __MULLEI2C_H__
diff --git a/tos/platforms/mulle/softwarei2c/SharedI2CPacketC.nc b/tos/platforms/mulle/softwarei2c/SharedI2CPacketC.nc
new file mode 100755
index 00000000..fd7e271c
--- /dev/null
+++ b/tos/platforms/mulle/softwarei2c/SharedI2CPacketC.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Philip Levis
+ */
+ 
+/**
+ * The configuration that takes a I2C bus with 7-bit addressing
+ * and turns it into a shared abstraction.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "MulleI2C.h"
+#include "I2C.h"
+generic configuration SharedI2CPacketC(char resourceName[])
+{
+  provides interface Resource[uint8_t client];
+  provides interface I2CPacket<TI2CBasicAddr>[uint8_t client];
+  provides interface ResourceDefaultOwner;
+  
+  uses interface I2CPacket<TI2CBasicAddr> as SubPacket;
+}
+implementation
+{
+  components new FcfsArbiterC(resourceName) as Arbiter;
+  components new SharedI2CPacketP() as I2C;
+    
+  Resource  = I2C.Resource;
+  I2CPacket = I2C.I2CPacket;
+  ResourceDefaultOwner = Arbiter;
+  
+  I2C.SubResource -> Arbiter;
+  I2C.SubPacket   = SubPacket;
+}
+
diff --git a/tos/platforms/mulle/softwarei2c/SharedI2CPacketP.nc b/tos/platforms/mulle/softwarei2c/SharedI2CPacketP.nc
new file mode 100755
index 00000000..78a36d24
--- /dev/null
+++ b/tos/platforms/mulle/softwarei2c/SharedI2CPacketP.nc
@@ -0,0 +1,174 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Philip Levis
+ */
+ 
+/**
+ * The module implements the logic when creating a I2C bus with 7-bit addressing
+ * into a shared abstraction.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+#include "I2C.h"
+generic module SharedI2CPacketP()
+{
+  provides interface Resource[uint8_t client];
+  provides interface I2CPacket<TI2CBasicAddr>[uint8_t client];
+  uses interface Resource as SubResource[uint8_t];
+  uses interface I2CPacket<TI2CBasicAddr> as SubPacket;
+}
+implementation
+{
+  enum
+  {
+    NO_CLIENT = 0xff
+  };
+  
+  uint8_t currentClient = NO_CLIENT;
+
+  async command error_t Resource.request[uint8_t id]()
+  {
+    return call SubResource.request[id]();
+  }
+
+  async command error_t Resource.immediateRequest[uint8_t id]()
+  {
+    error_t rval = call SubResource.immediateRequest[id]();
+    if (rval == SUCCESS)
+    {
+      atomic currentClient = id;
+    }
+    return rval;
+  }
+
+  event void SubResource.granted[uint8_t id]()
+  {
+    atomic currentClient = id;
+    signal Resource.granted[id]();
+  }
+
+  async command error_t Resource.release[uint8_t id]()
+  {
+    return call SubResource.release[id]();
+  }
+
+  async command bool Resource.isOwner[uint8_t id]()
+  {
+    return call SubResource.isOwner[id]();
+  }
+  
+  async command error_t I2CPacket.write[uint8_t id](i2c_flags_t flags,
+                                                        uint16_t addr,
+                                                        uint8_t len,
+                                                        uint8_t* data)
+  {
+    atomic
+    {
+      if (currentClient != id)
+      {
+	return FAIL;
+      }
+    }
+    return call SubPacket.write(flags, addr, len, data);
+  }
+  
+  async command error_t I2CPacket.read[uint8_t id](i2c_flags_t flags,
+                                                       uint16_t addr,
+                                                       uint8_t len,
+                                                       uint8_t* data)
+  {
+    atomic
+    {
+      if (currentClient != id)
+      {
+	return FAIL;
+      }
+    }
+    return call SubPacket.read(flags, addr, len, data);
+  }
+
+  default event void Resource.granted[uint8_t id]() {}
+
+  async event void  SubPacket.readDone(
+      error_t error, uint16_t addr, uint8_t length, uint8_t* data)
+  {
+    signal  I2CPacket.readDone[currentClient](error, addr, length, data);
+  }
+
+  async event void SubPacket.writeDone(
+      error_t error, uint16_t addr, uint8_t length, uint8_t* data)
+  {
+    signal I2CPacket.writeDone[currentClient]( error, addr, length,  data);
+  }
+
+  default async event void  I2CPacket.readDone[uint8_t id](
+      error_t error, uint16_t addr, uint8_t length, uint8_t* data) {  }
+
+  default async event void I2CPacket.writeDone[uint8_t id](
+      error_t error, uint16_t addr, uint8_t length, uint8_t* data) {  }
+
+}
diff --git a/tos/platforms/mulle/softwarei2c/SoftwareI2C2C.nc b/tos/platforms/mulle/softwarei2c/SoftwareI2C2C.nc
new file mode 100755
index 00000000..5470e389
--- /dev/null
+++ b/tos/platforms/mulle/softwarei2c/SoftwareI2C2C.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The basic client abstraction of the I2C nr 2 on Mulle used
+ * by the RTC and battery monitor and the possibilty to be connected
+ * from the external connections.
+ * The device drivers should instantiate this configuration to ensure
+ * exclusive access to the I2C bus.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "MulleI2C.h"
+#include "I2C.h"
+generic configuration SoftwareI2C2C()
+{
+  provides interface Resource;
+  provides interface I2CPacket<TI2CBasicAddr>;
+  provides interface ResourceDefaultOwner;
+}
+implementation
+{
+  enum
+  {
+    CLIENT_ID = unique(UQ_MULLE_SOFTWAREI2C_2),
+  };
+  
+  components SoftwareI2C2P as I2C; 
+  Resource = I2C.Resource[CLIENT_ID];
+  I2CPacket = I2C.I2CPacket[CLIENT_ID];
+  ResourceDefaultOwner = I2C;
+}
diff --git a/tos/platforms/mulle/softwarei2c/SoftwareI2C2InitP.nc b/tos/platforms/mulle/softwarei2c/SoftwareI2C2InitP.nc
new file mode 100644
index 00000000..3bcf36f9
--- /dev/null
+++ b/tos/platforms/mulle/softwarei2c/SoftwareI2C2InitP.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Initilizes the pullups on the I2C bus marked as nr 2 on Mulle.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+ module SoftwareI2C2InitP
+ {
+ 	provides interface Init;
+ 	uses interface GeneralIO as Pullup;
+ }
+ implementation
+ {
+ 	command error_t Init.init()
+ 	{
+ 		call Pullup.makeOutput();
+ 		call Pullup.set();
+ 	}
+ }
\ No newline at end of file
diff --git a/tos/platforms/mulle/softwarei2c/SoftwareI2C2P.nc b/tos/platforms/mulle/softwarei2c/SoftwareI2C2P.nc
new file mode 100644
index 00000000..233196e1
--- /dev/null
+++ b/tos/platforms/mulle/softwarei2c/SoftwareI2C2P.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The wiring of the I2C bus nr 2 on Mulle and creation of it into a
+ * shared abstraction.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "MulleI2C.h"
+#include "I2C.h"
+configuration SoftwareI2C2P
+{
+  provides interface Resource[uint8_t client];
+  provides interface I2CPacket<TI2CBasicAddr>[uint8_t client];
+  provides interface ResourceDefaultOwner;
+}
+implementation
+{
+  components new SoftwareI2CPacketC(10),
+             HplM16c62pGeneralIOC as IOs,
+             BusyWaitMicroC,
+             new SharedI2CPacketC(UQ_MULLE_SOFTWAREI2C_2),
+             SoftwareI2C2InitP,
+             PlatformP;
+
+  // Wire the software I2C bus
+  SoftwareI2CPacketC.SCL -> IOs.PortP71;
+  SoftwareI2CPacketC.SDA -> IOs.PortP70;
+  SoftwareI2CPacketC.BusyWait -> BusyWaitMicroC;
+
+  Resource  = SharedI2CPacketC;
+  I2CPacket = SharedI2CPacketC.I2CPacket;
+  ResourceDefaultOwner = SharedI2CPacketC;
+  SharedI2CPacketC -> SoftwareI2CPacketC.I2CPacket;
+
+  // Init the bus
+  SoftwareI2C2InitP.Pullup -> IOs.PortP75;
+  PlatformP.SubInit -> SoftwareI2C2InitP;
+}
+
diff --git a/tos/platforms/mulle/softwarei2c/SoftwareI2CPacketC.nc b/tos/platforms/mulle/softwarei2c/SoftwareI2CPacketC.nc
new file mode 100644
index 00000000..4a5d267c
--- /dev/null
+++ b/tos/platforms/mulle/softwarei2c/SoftwareI2CPacketC.nc
@@ -0,0 +1,339 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "I2C.h"
+
+/**
+ * This module implements a software I2CPacket with 7-bit addressing.
+ * The SDA and SCL pins must have pull-up resistors.
+ *
+ * This code was written with help from the I2C Wikipedia page:
+ * http://en.wikipedia.org/wiki/I%C2%B2C
+ * 
+ * @param speed The number of micro seconds 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+generic module SoftwareI2CPacketC(int speed)
+{
+  provides interface I2CPacket<TI2CBasicAddr>;
+
+  uses interface GeneralIO as SDA;
+  uses interface GeneralIO as SCL;
+  uses interface BusyWait<TMicro, uint16_t>;
+}
+implementation
+{
+  enum
+  {
+    S_IDLE,
+    S_BUSY,      
+  };
+
+  uint8_t m_state = S_IDLE;
+  uint16_t m_addr;
+  uint8_t m_length;
+  uint8_t* m_data;
+  error_t m_error;
+  bool m_read;
+
+  uint8_t READSDA()
+  {
+    call SDA.makeInput();
+    return call SDA.get();
+  }
+
+  uint8_t READSCL()
+  {
+    call SCL.makeInput();
+    return call SCL.get();
+  }
+
+  void CLRSCL()
+  {
+    call SCL.clr();
+    call SCL.makeOutput();
+  }
+
+  void CLRSDA()
+  {
+    call SDA.clr();
+    call SDA.makeOutput();
+  }
+
+  void i2cDelay(uint16_t u) {
+    call BusyWait.wait(u);
+  }
+
+  uint8_t i2cReadBit(void)
+  {
+    uint8_t bit;
+
+    /* lets the slave drive data */
+    READSDA();
+    i2cDelay(speed/2);
+    /* Clock stretching */
+    while (READSCL() == 0);
+    /* SCL is high, now data is valid */
+    bit = READSDA();
+    i2cDelay(speed/2);
+    CLRSCL();
+    return bit;
+  }
+
+  error_t i2cWriteBit(bool bit)
+  {
+    if (bit) 
+      READSDA();
+    else 
+      CLRSDA();
+    i2cDelay(speed/2);
+    /* Clock stretching */
+    while (READSCL() == 0);
+    /* SCL is high, now data is valid */
+    /* check that nobody is driving SDA */
+    if (bit && READSDA() == 0)
+      return FAIL;
+    i2cDelay(speed/2);
+    CLRSCL();
+    return SUCCESS;
+  }
+
+  error_t i2cStartCond(void)
+  {
+    READSCL();
+    READSDA();
+    i2cDelay(speed/2);
+    if (READSDA() == 0)
+      return FAIL;
+
+    /* SCL is high, set SDA from 1 to 0 */
+    CLRSDA();
+    i2cDelay(speed/2);
+    CLRSCL();
+    return SUCCESS;
+  }
+
+  error_t i2cStopCond(void)
+  {
+    /* set SDA to 0 */
+    CLRSDA();
+    i2cDelay(speed/2);
+
+    /* Clock stretching */
+    while (READSCL() == 0); /* Release SCL, wait for done */
+
+    /* SCL is high, set SDA from 0 to 1 */
+    i2cDelay(speed/2);
+    READSDA(); /* Release SDA */
+
+    /* Verify, give some time to settle first */
+    i2cDelay(speed/2);
+    if (READSDA() == 0)
+      return FAIL;
+    return SUCCESS;
+  }
+
+  error_t i2cTx(uint8_t byte)
+  {
+    uint8_t bit;
+    uint8_t ack;
+    error_t error = SUCCESS;
+
+    for (bit = 0; bit < 8; bit++) {
+      error = ecombine(error, i2cWriteBit(byte & 0x80));
+      byte <<= 1;
+    }
+
+    // The ack bit is 0 for success
+    if (!i2cReadBit())
+    {
+      return ecombine(error, SUCCESS);
+    }
+    else 
+    {
+      return FAIL;
+    }
+  }
+
+  uint8_t i2cRx (bool nack)
+  {
+    uint8_t byte = 0;
+    uint8_t bit;
+
+    for (bit = 0; bit < 8; bit++) {
+      byte <<= 1;
+      byte |= i2cReadBit();
+    }
+    i2cWriteBit(nack);
+    return byte;
+  }
+
+  task void signalTask()
+  {
+    uint16_t addr;
+    uint8_t length;
+    uint8_t* data;
+    error_t error;
+    bool read;
+    atomic
+    {
+      addr = m_addr;
+      length = m_length;
+      data = m_data;
+      error = m_error;
+      m_state = S_IDLE;
+      read = m_read;
+    }
+    if (read)
+    {
+      signal I2CPacket.readDone(error, addr, length,  data);
+    }
+    else
+    {
+      signal I2CPacket.writeDone(error, addr, length,  data);
+    }
+  }
+
+  async command error_t I2CPacket.read(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data)
+  {
+    uint8_t i;
+    error_t error = SUCCESS;
+
+    // Both I2C_STOP and I2C_ACK_END flags are not allowed at the same time.
+    if ((flags & I2C_STOP) && (flags & I2C_ACK_END))
+    {
+      return EINVAL;
+    }
+
+    atomic
+    {
+      if (m_state == S_IDLE)
+      {
+        m_state = S_BUSY;
+      }
+      else
+      {
+        return EBUSY;
+      }
+    }
+    atomic
+    {
+      if (flags & I2C_START)
+      {
+        error = ecombine(error, i2cStartCond());
+        error = ecombine(error, i2cTx((addr<<1)|1)); 
+      }
+
+      // Only read data from the device if length is >0.
+      // TODO(henrik): Should a data length of 0 be a invalid input?
+      if (length > 0)
+      {
+        // Read the data from the device.
+        for (i = 0; i < length-1; ++i)
+        {
+          data[i] = i2cRx(false);
+        }
+        if (flags & I2C_ACK_END)
+        {
+          data[length-1] = i2cRx(false);
+        }
+        else
+        {
+          data[length-1] = i2cRx(true);
+        }
+      }
+      if (flags & I2C_STOP)
+      {
+        error = ecombine(error, i2cStopCond());
+      }
+
+      m_error = error;
+      m_addr = addr;
+      m_length = length;
+      m_data = data;
+      m_read = true;
+    }
+    post signalTask();
+
+    return SUCCESS;
+  }
+
+  async command error_t I2CPacket.write(i2c_flags_t flags, uint16_t addr, uint8_t length, uint8_t* data)
+  {
+    uint8_t i;
+    error_t error = SUCCESS;
+
+    atomic
+    {
+      if (m_state == S_IDLE)
+      {
+        m_state = S_BUSY;
+      }
+      else
+      {
+        return EBUSY;
+      }
+    }
+    atomic
+    {
+      if (flags & I2C_START)
+      {
+        error = ecombine(error, i2cStartCond());
+      }
+
+      error = ecombine(error, i2cTx(addr<<1));
+
+      // Send the data to the device (stop on error).
+      for (i = 0; error == SUCCESS && i < length; ++i)
+      {
+        error = ecombine(error, i2cTx(data[i]));
+      }
+
+      if (flags & I2C_STOP)
+      {
+        error = ecombine(error, i2cStopCond());
+      }
+
+      m_error = error;
+      m_addr = addr;
+      m_length = length;
+      m_data = data;
+      m_read = false;
+    }
+    post signalTask();
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/mulle/softwarespi/SoftSpiBus.nc b/tos/platforms/mulle/softwarespi/SoftSpiBus.nc
new file mode 100755
index 00000000..78ffde72
--- /dev/null
+++ b/tos/platforms/mulle/softwarespi/SoftSpiBus.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Interface for a software Spi bus.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+interface SoftSpiBus
+{
+  /**
+   * Initializes bus default state.
+   */
+  async command void init();
+  
+  /**
+   * Turn the bus off.
+   */
+  async command void off();
+
+  /**
+   * Reads a byte from the Spi bus.
+   *
+   * @return A byte from the bus.
+   */
+  async command uint8_t readByte();
+
+  /**
+   * Writes a byte on th Spi bus.
+   *
+   * @param byte the byte to write.
+   */
+  async command void writeByte(uint8_t byte);
+  
+  /**
+   * Read and write a byte to the bus at the same time.
+   *
+   * @param byte The byte to write.
+   * @return Byte read from the bus.
+   */
+  async command uint8_t write(uint8_t byte);
+}
diff --git a/tos/platforms/mulle/softwarespi/SoftSpiBusP.nc b/tos/platforms/mulle/softwarespi/SoftSpiBusP.nc
new file mode 100755
index 00000000..016fb978
--- /dev/null
+++ b/tos/platforms/mulle/softwarespi/SoftSpiBusP.nc
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Mulle specific implementation of a software Spi bus.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+generic module SoftSpiBusP()
+{
+    provides interface SoftSpiBus as Spi;
+
+    uses interface GeneralIO as SCLK;
+    uses interface GeneralIO as MISO;
+    uses interface GeneralIO as MOSI;
+}
+implementation
+{
+    async command void Spi.init()
+    {
+        call SCLK.makeOutput();
+        call MOSI.makeOutput();
+        call MISO.makeInput();
+        call SCLK.clr();
+    }
+
+    async command void Spi.off()
+    {
+        call SCLK.makeOutput();
+        call MISO.makeOutput();
+        call MOSI.makeOutput();
+        call SCLK.clr();
+        call MISO.clr();
+        call MOSI.clr();
+    }
+
+    async command uint8_t Spi.readByte()
+    {
+        uint8_t i;
+        uint8_t data = 0xde;
+
+        atomic
+        {
+            for(i=0 ; i < 8; ++i)
+            {
+                call SCLK.clr();
+                data = (data << 1) | (uint8_t) call MISO.get();
+                call SCLK.set();
+            }
+        }
+        return data;
+    }
+
+    async command void Spi.writeByte(uint8_t byte)
+    {
+        uint8_t  i = 8;
+        atomic
+        {
+            for (i = 0; i < 8 ; ++i)
+            {
+                if (byte & 0x80)
+                {
+                    call MOSI.set();
+                }
+                else
+                {
+                    call MOSI.clr();
+                }
+                call SCLK.clr();
+                call SCLK.set();
+                byte <<= 1;
+            }
+        }
+    }
+
+    async command uint8_t Spi.write(uint8_t byte)
+    {
+        uint8_t data = 0;
+        uint8_t mask = 0x80;
+
+        atomic do
+        {
+            if( (byte & mask) != 0 )
+                call MOSI.set();
+            else
+                call MOSI.clr();
+
+            call SCLK.clr();
+            if( call MISO.get() )
+                data |= mask;
+            call SCLK.set();
+        } while( (mask >>= 1) != 0 );
+
+        return data;
+    }
+}
diff --git a/tos/platforms/mulle/softwarespi/SoftSpiMasterImplP.nc b/tos/platforms/mulle/softwarespi/SoftSpiMasterImplP.nc
new file mode 100755
index 00000000..116e02dd
--- /dev/null
+++ b/tos/platforms/mulle/softwarespi/SoftSpiMasterImplP.nc
@@ -0,0 +1,170 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Philip Levis
+ */
+
+/**
+ * The configuration that takes an underlying software SPI on Mulle 
+ * and turns it into a shared abstraction.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+generic module SoftSpiMasterImplP()
+{
+  provides interface Resource[uint8_t client];
+  provides interface SpiPacket[uint8_t client];
+  provides interface SpiByte[uint8_t client];
+  uses interface Resource as SubResource[uint8_t];
+  uses interface SpiPacket as SubPacket;
+  uses interface SpiByte as SubByte;
+}
+implementation
+{
+
+  enum
+  {
+    NO_CLIENT = 0xff
+  };
+  
+  uint8_t currentClient = NO_CLIENT;
+
+  async command error_t Resource.request[uint8_t id]()
+  {
+    return call SubResource.request[id]();
+  }
+
+  async command error_t Resource.immediateRequest[uint8_t id]()
+  {
+    error_t rval = call SubResource.immediateRequest[id]();
+    if (rval == SUCCESS)
+    {
+      atomic currentClient = id;
+    }
+    return rval;
+  }
+
+  event void SubResource.granted[uint8_t id]()
+  {
+    atomic currentClient = id;
+    signal Resource.granted[id]();
+  }
+
+  async command error_t Resource.release[uint8_t id]()
+  {
+    return call SubResource.release[id]();
+  }
+
+  async command bool Resource.isOwner[uint8_t id]()
+  {
+    return call SubResource.isOwner[id]();
+  }
+  
+  async command uint8_t SpiByte.write[uint8_t id](uint8_t tx)
+  {
+    atomic
+    {
+      if (currentClient != id)
+      {
+	return FAIL;
+      }
+    }
+    return call SubByte.write(tx);
+  }
+
+  async command error_t SpiPacket.send[uint8_t id](uint8_t* txBuf,
+                                                   uint8_t* rxBuf,
+                                                   uint16_t len )
+  {
+    atomic
+    {
+      if (currentClient != id)
+      {
+	return FAIL;
+      }
+    }
+    return call SubPacket.send(txBuf, rxBuf, len);
+  }
+
+  async event void SubPacket.sendDone(uint8_t* txBuf,
+                                     uint8_t* rxBuf,
+                                     uint16_t len,
+                                     error_t error )
+  {
+    signal SpiPacket.sendDone[currentClient](txBuf, rxBuf, len, error);
+  }
+
+  default async event void SpiPacket.sendDone[uint8_t id](uint8_t* txBuf,
+                                           uint8_t* rxBuf,
+                                           uint16_t len,
+                                           error_t error) {}
+
+  default event void Resource.granted[uint8_t id]() {}
+
+
+}
+
diff --git a/tos/platforms/mulle/softwarespi/SoftSpiMasterP.nc b/tos/platforms/mulle/softwarespi/SoftSpiMasterP.nc
new file mode 100755
index 00000000..e8803cc6
--- /dev/null
+++ b/tos/platforms/mulle/softwarespi/SoftSpiMasterP.nc
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Philip Levis
+ */
+
+/**
+ * The configuration that takes a underlying software Spi driver 
+ * on Mulle and turns it into a shared abstraction.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+generic configuration SoftSpiMasterP(char resourceName[])
+{
+  provides interface Resource[uint8_t client];
+  provides interface SpiPacket[uint8_t client];
+  provides interface SpiByte[uint8_t client];
+  uses interface SoftSpiBus;
+}
+implementation
+{
+  components new FcfsArbiterC(resourceName) as Arbiter;
+  components new AsyncPowerManagerP() as Power;
+  components new SoftSpiMasterImplP() as Spi;
+  components new SoftSpiMasterPacketP() as Master;
+    
+  Resource  = Spi;
+  SpiPacket = Spi.SpiPacket;
+  SpiByte = Spi.SpiByte;
+  
+  Spi.SubResource -> Arbiter;
+  Spi.SubPacket   -> Master.SpiPacket;
+  Spi.SubByte     -> Master.SpiByte;
+  
+  Power.AsyncStdControl -> Master;
+  Power.ResourceDefaultOwner -> Arbiter;
+
+  Master.Spi = SoftSpiBus;
+}
+
diff --git a/tos/platforms/mulle/softwarespi/SoftSpiMasterPacketP.nc b/tos/platforms/mulle/softwarespi/SoftSpiMasterPacketP.nc
new file mode 100755
index 00000000..87cbab81
--- /dev/null
+++ b/tos/platforms/mulle/softwarespi/SoftSpiMasterPacketP.nc
@@ -0,0 +1,189 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Philip Levis
+ */
+
+/**
+ * This driver implements an software Spi Master controller.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+generic module SoftSpiMasterPacketP()
+{
+  provides interface AsyncStdControl;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+  
+  uses interface SoftSpiBus as Spi;
+}
+implementation
+{
+  enum
+  {
+    SPI_OFF          = 0,
+    SPI_IDLE         = 1,
+    SPI_BUSY         = 2,      
+  } soft_spi_state_t;
+
+  uint8_t state = SPI_OFF;
+
+  async command error_t AsyncStdControl.start()
+  {
+    atomic
+    {
+      if (state == SPI_OFF)
+      {
+	    call Spi.init();
+	    state = SPI_IDLE;
+	    return SUCCESS;
+      }
+      else
+      {
+	    return FAIL;
+      }
+    }
+  }
+
+  async command error_t AsyncStdControl.stop()
+  {
+    atomic
+    {
+      if (state == SPI_IDLE)
+      {
+	    call Spi.off();
+	    state = SPI_OFF;
+	    return SUCCESS;
+      }
+      else
+      {
+	    return FAIL;
+      }
+    }
+  }
+
+  async command uint8_t SpiByte.write( uint8_t tx )
+  {
+    uint8_t rx;
+    atomic
+    {
+      if (state == SPI_IDLE)
+      {
+	    state = SPI_BUSY;
+      }
+      else if (state == SPI_OFF)
+      {
+	    return EOFF;
+      }
+      else
+      {
+	    return EBUSY;
+      }
+    }
+    atomic
+    {
+      rx = call Spi.write(tx);
+      state = SPI_IDLE;
+    }
+    return rx;
+  }
+  
+  async command error_t SpiPacket.send( uint8_t* txBuf, uint8_t* rxBuf, uint16_t len )
+  {
+    uint8_t i;
+    atomic
+    {
+      if (state == SPI_IDLE)
+      {
+	    state = SPI_BUSY;
+      }
+      else if (state == SPI_OFF)
+      {
+	    return EOFF;
+      }
+      else
+      {
+	    return EBUSY;
+      }
+    }
+    atomic
+    {
+      for(i = 0; i < len; ++i)
+      {
+        rxBuf[i] = call Spi.write(txBuf[i]);
+      }
+      state = SPI_IDLE;
+    }
+    signal SpiPacket.sendDone(txBuf, rxBuf, len, SUCCESS);
+    return SUCCESS;
+  }
+
+  default async event void SpiPacket.sendDone( uint8_t* txBuf,
+                                               uint8_t* rxBuf,
+                                               uint16_t len,
+                                               error_t error ) {}
+}
diff --git a/tos/platforms/mulle/system/LedsP.nc b/tos/platforms/mulle/system/LedsP.nc
new file mode 100755
index 00000000..3788064e
--- /dev/null
+++ b/tos/platforms/mulle/system/LedsP.nc
@@ -0,0 +1,163 @@
+// $Id: LedsP.nc,v 1.6 2008/06/24 05:32:32 regehr Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The implementation of the standard 3 LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ *
+ * @date   March 21, 2005
+ */
+
+/**
+ * Mulle needs a slightly different LedsP.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+module LedsP @safe() {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+}
+implementation {
+  command error_t Init.init() {
+    atomic {
+      dbg("Init", "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led0.clr();
+      call Led1.clr();
+      call Led2.clr();
+    }
+    return SUCCESS;
+  }
+
+  /* Note: the call is inside the dbg, as it's typically a read of a volatile
+     location, so can't be deadcode eliminated */
+#define DBGLED(n) \
+  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");
+
+  async command void Leds.led0On() {
+    call Led0.set();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Off() {
+    call Led0.clr();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    DBGLED(0);
+  }
+
+  async command void Leds.led1On() {
+    call Led1.set();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Off() {
+    call Led1.clr();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    DBGLED(1);
+  }
+
+  async command void Leds.led2On() {
+    call Led2.set();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Off() {
+    call Led2.clr();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    DBGLED(2);
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (call Led0.get()) {
+	rval |= LEDS_LED0;
+      }
+      if (call Led1.get()) {
+	rval |= LEDS_LED1;
+      }
+      if (call Led2.get()) {
+	rval |= LEDS_LED2;
+      }
+    }
+    return rval;
+  }
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led2Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/mulle/timers/AlarmMicro16C.nc b/tos/platforms/mulle/timers/AlarmMicro16C.nc
new file mode 100755
index 00000000..bf62fad2
--- /dev/null
+++ b/tos/platforms/mulle/timers/AlarmMicro16C.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * AlarmMicro16C provides a 16-bit TMicro alarm.
+ * It uses 1 hw timer that is used as a alarm.
+ * 
+ * NOTE: It uses the same source clock as the CounterMicro16C.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "TimerConfig.h"
+
+configuration AlarmMicro16C
+{
+  provides interface Alarm<TMicro,uint16_t>;
+}
+implementation
+{
+  components new M16c62pAlarm16C(TMicro) as AlarmFrom;
+  components new M16c62pTimerAInitC(TMR_COUNTER_MODE, M16C_TMRA_TES_TA_PREV, 0, false, false, false) as AlarmInit;
+
+  components HplM16c62pTimerC as Timers,
+      CounterMicro16C,
+      RealMainP;
+
+  AlarmFrom -> Timers.ALARM_MICRO16;
+  AlarmFrom.Counter -> CounterMicro16C;
+
+  AlarmInit -> Timers.ALARM_MICRO16;
+  AlarmInit -> Timers.ALARM_MICRO16_CTRL;
+  RealMainP.PlatformInit -> AlarmInit.Init;
+  Alarm = AlarmFrom;
+}
+  
+
diff --git a/tos/platforms/mulle/timers/AlarmMicro32C.nc b/tos/platforms/mulle/timers/AlarmMicro32C.nc
new file mode 100755
index 00000000..c5c1e308
--- /dev/null
+++ b/tos/platforms/mulle/timers/AlarmMicro32C.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * 32-bit microsecond Alarm component as per TEP102 HAL guidelines.
+ *
+ * @author Fan Zhang <fanzha@ltu.se>
+ */
+
+generic configuration AlarmMicro32C()
+{
+  provides interface Alarm<TMicro, uint32_t>;
+}
+implementation
+{
+  components AlarmMicro16C as Alarm16, CounterMicro32C as Counter32;
+  components new TransformAlarmC(TMicro, uint32_t, TMicro, uint16_t, 0) as Transform32;
+
+  Alarm = Transform32;
+  Transform32.AlarmFrom -> Alarm16;
+  Transform32.Counter -> Counter32;
+}
diff --git a/tos/platforms/mulle/timers/BusyWaitMicroC.nc b/tos/platforms/mulle/timers/BusyWaitMicroC.nc
new file mode 100755
index 00000000..fc24efb4
--- /dev/null
+++ b/tos/platforms/mulle/timers/BusyWaitMicroC.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Implementation of the HIL required micro busy wait.
+ * For more information see TEP 102.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+module BusyWaitMicroC
+{
+  provides interface BusyWait<TMicro, uint16_t>;
+}
+implementation
+{
+  // TODO(henrik) This will now only work on 10Mhz speed, easy to
+  //              add a signal from the control module of the mcu
+  //              to signal the change of speed and the wait function
+  //              can adjust to it.
+  // The wait function can not be inlined because then the code alignment may
+  // go lost thus making the busy wait around 30% slower.
+  async command void BusyWait.wait(uint16_t dt ) __attribute__((noinline)) {
+    atomic {
+      asm("nop"); // Nop needed to align function
+      asm volatile (
+          "sub.w #1,%[t]\n\t"
+          "jeq 2f\n\t"
+          "sub.w #1,%[t]\n\t"
+          "jeq 2f\n\t"
+          "1:\n\t"
+          "nop\n\t"
+          "add.w #1,%[t]\n\t"
+          "sub.w #1,%[t]\n\t"
+          "sub.w #1,%[t]\n\t"
+          "jgtu 1b\n\t"
+          "2:"
+          :   
+          : [t] "r" (dt)
+          );  
+    } 
+  } 
+}
diff --git a/tos/platforms/mulle/timers/CounterMicro16C.nc b/tos/platforms/mulle/timers/CounterMicro16C.nc
new file mode 100755
index 00000000..2a691a4a
--- /dev/null
+++ b/tos/platforms/mulle/timers/CounterMicro16C.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * CounterMicro16C provides a 16-bit TMicro counter.
+ * It uses 2 hw timers, one generates a micro tick and the other
+ * counts the micro ticks.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @see  Please refer to TEP 102 for more information about this component.
+ */
+
+#include "TimerConfig.h"
+
+configuration CounterMicro16C
+{
+  provides interface Counter<TMicro,uint16_t>;
+}
+implementation
+{
+  // Counter
+  components new M16c62pCounter16C(TMicro) as CounterFrom;
+  components new M16c62pTimerAInitC(TMR_COUNTER_MODE, M16C_TMRA_TES_TA_NEXT, 0xFFFF, true, true, true) as CounterInit;
+  
+  // Source
+  components new M16c62pTimerAInitC(TMR_TIMER_MODE, M16C_TMR_CS_F1_2, (MAIN_CRYSTAL_SPEED - 1), false, true, true) as TimerSourceInit;
+  
+  components HplM16c62pTimerC as Timers,
+      RealMainP, McuSleepC;
+
+  // Counter
+  CounterFrom.Timer -> Timers.COUNTER_MICRO16;
+  CounterInit -> Timers.COUNTER_MICRO16;
+  CounterInit -> Timers.COUNTER_MICRO16_CTRL;
+  RealMainP.PlatformInit -> CounterInit;
+  Counter = CounterFrom;
+
+  // Timer source
+  TimerSourceInit -> Timers.MICRO16_SOURCE;
+  TimerSourceInit -> Timers.MICRO16_SOURCE_CTRL;
+  RealMainP.PlatformInit -> TimerSourceInit;
+  
+}
diff --git a/tos/platforms/mulle/timers/CounterMicro32C.nc b/tos/platforms/mulle/timers/CounterMicro32C.nc
new file mode 100755
index 00000000..3cd55fab
--- /dev/null
+++ b/tos/platforms/mulle/timers/CounterMicro32C.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/**
+ * 32-bit microsecond Counter component as per TEP102 HAL guidelines.
+ *
+ * @author Fan Zhang <fanzha@ltu.se>
+ */
+
+
+configuration CounterMicro32C
+{
+  provides interface Counter<TMicro, uint32_t>;
+}
+implementation
+{
+  components CounterMicro16C as Counter16, 
+    new TransformCounterC(TMicro, uint32_t, TMicro, uint16_t,
+			  0, uint16_t) as Transform32;
+
+  Counter = Transform32;
+  Transform32.CounterFrom -> Counter16;
+}
diff --git a/tos/platforms/mulle/timers/HilTimerMilliC.nc b/tos/platforms/mulle/timers/HilTimerMilliC.nc
new file mode 100755
index 00000000..598fdfcd
--- /dev/null
+++ b/tos/platforms/mulle/timers/HilTimerMilliC.nc
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+/**
+ * HilTimerMilliC provides a parameterized interface to a virtualized
+ * millisecond timer and local time in milli precision.  TimerMilliC in
+ * tos/system/ uses this component to allocate new timers.
+ * See TEP 102 for more information.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "TimerConfig.h"
+configuration HilTimerMilliC
+{
+  provides interface Init;
+
+  provides interface Timer<TMilli> as TimerMilli[ uint8_t num ];
+  provides interface LocalTime<TMilli>;
+}
+implementation
+{
+  components new AlarmToTimerC(TMilli);
+  components new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI));
+  components new CounterToLocalTimeC(TMilli);
+  components HIL_TIMERS as AlarmCounterMilli32C;
+
+  TimerMilli = VirtualizeTimerC;
+  LocalTime = CounterToLocalTimeC;
+
+  VirtualizeTimerC.TimerFrom -> AlarmToTimerC;
+  AlarmToTimerC.Alarm -> AlarmCounterMilli32C.Alarm;
+  CounterToLocalTimeC.Counter -> AlarmCounterMilli32C.Counter;
+  Init = AlarmCounterMilli32C;
+}
diff --git a/tos/platforms/mulle/timers/LocalTimeMicroC.nc b/tos/platforms/mulle/timers/LocalTimeMicroC.nc
new file mode 100755
index 00000000..4e734eb0
--- /dev/null
+++ b/tos/platforms/mulle/timers/LocalTimeMicroC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2008, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+/**
+ * This configuration provides a local time represented in Micro seconds.
+ * 
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "Timer.h"
+
+configuration LocalTimeMicroC
+{
+	provides interface LocalTime<TMicro>;
+}
+
+implementation
+{
+	components CounterMicro16C;
+	components new TransformCounterC(TMicro, uint32_t, TMicro, uint16_t, 0, uint32_t);
+	components new CounterToLocalTimeC(TMicro);
+
+	LocalTime = CounterToLocalTimeC;
+	CounterToLocalTimeC.Counter -> TransformCounterC;
+	TransformCounterC.CounterFrom -> CounterMicro16C;
+}
diff --git a/tos/platforms/mulle/timers/TimerConfig.h b/tos/platforms/mulle/timers/TimerConfig.h
new file mode 100755
index 00000000..0171de9f
--- /dev/null
+++ b/tos/platforms/mulle/timers/TimerConfig.h
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The M16c/62p hardware timer configuration used by Mulle.
+ * 
+ * STOP MODE ENABLED:
+ *   TB2 generates TMilli tics from the RV8564 chip.
+ *   TA0 and TA1 are used to create a 32 bit counter. TA0 counts
+ *   tics from TB2 and TA1 counts TA0 underflows.
+ *   TB0 and TB1 are used to create a 32 bit Alarm. TB0 counts
+ *   tics from TB2 and TB1 counts TB0 underflows.
+ *
+ * STOP MODE DISABLED:
+ *   TA0 generates TMilli tics.
+ *   TB0 generates TMilli tics.
+ *   TA1 is a 16 bit counter that counts tics from TA0.
+ *   TB1 is a 16 bit alarm that counts tics from TB0.
+ *
+ * ALWAYS USED:
+ *  NOTE: Counter timers are turned off when the mcu goes into stop mode.
+ *   TA3 generates TMicro tics.
+ *   TA2 is a 16 bit TMicro counter that counts tics from TA3.
+ *   TA4 is a 16 bit TMicro alarm that counts tics from TA3.
+ * 	 TB3 is a 16 bit Radio counter.
+ *   TB4 is a 16 bit Radio alarm.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#ifndef __TIMERCONFIG_H__
+#define __TIMERCONFIG_H__
+
+#ifdef ENABLE_STOP_MODE
+  #define HIL_TIMERS RV8564AlarmCounterMilli32C
+#else
+  #define HIL_TIMERS AlarmCounterMilli32C
+#endif
+
+// Use hw timers alone.
+#define COUNTER_MILLI32_SOURCE TimerB0
+#define COUNTER_MILLI32_SOURCE_CTRL TimerB0Ctrl
+#define COUNTER_MILLI32 TimerB1
+#define COUNTER_MILLI32_CTRL TimerB1Ctrl
+
+#define ALARM_MILLI32_SOURCE TimerA0
+#define ALARM_MILLI32_SOURCE_CTRL TimerA0Ctrl
+#define ALARM_MILLI32 TimerA1
+#define ALARM_MILLI32_CTRL TimerA1Ctrl
+// End
+
+// Use the RV8564 chip to generate tics (stop mode enabled).
+#define MILLI32_SOURCE_RV8564 TimerB2
+#define MILLI32_SOURCE_RV8564_CTRL TimerB2Ctrl
+
+#define COUNTER_MILLI32_LOW TimerA0
+#define COUNTER_MILLI32_LOW_CTRL TimerA0Ctrl
+#define COUNTER_MILLI32_HIGH TimerA1
+#define COUNTER_MILLI32_HIGH_CTRL TimerA1Ctrl
+
+#define ALARM_MILLI32_LOW TimerB0
+#define ALARM_MILLI32_LOW_CTRL TimerB0Ctrl
+#define ALARM_MILLI32_HIGH TimerB1
+#define ALARM_MILLI32_HIGH_CTRL TimerB1Ctrl
+// end
+
+// Common settings.
+#define COUNTER_MICRO16 TimerA2
+#define COUNTER_MICRO16_CTRL TimerA2Ctrl
+#define MICRO16_SOURCE TimerA3
+#define MICRO16_SOURCE_CTRL TimerA3Ctrl
+#define ALARM_MICRO16 TimerA4
+#define ALARM_MICRO16_CTRL TimerA4Ctrl
+
+#define COUNTER_RF23016 TimerB3
+#define COUNTER_RF23016_CTRL TimerB3Ctrl
+#define ALARM_RF23016 TimerB4
+#define ALARM_RF23016_CTRL TimerB4Ctrl
+// end.
+
+#endif  // __TIMERCONFIG_H__
diff --git a/tos/platforms/mulle/timers/rf230/AlarmRF23016C.nc b/tos/platforms/mulle/timers/rf230/AlarmRF23016C.nc
new file mode 100644
index 00000000..aa5d13ec
--- /dev/null
+++ b/tos/platforms/mulle/timers/rf230/AlarmRF23016C.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * AlarmRF23016C provides a 16-bit TRF230 alarm.
+ * It uses 1 hw timer that is used as a alarm and runs with
+ * speed PLL_CLOCK_SPEED / 8.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "TimerConfig.h"
+#include <RadioConfig.h>
+
+configuration AlarmRF23016C
+{
+  provides interface Alarm<TRadio,uint16_t>;
+}
+implementation
+{
+  components new M16c62pAlarm16C(TRadio) as AlarmFrom;
+  components new M16c62pTimerBInitC(TMR_TIMER_MODE, M16C_TMR_CS_F8, 0, false, false, false) as AlarmInit;
+
+  components HplM16c62pTimerC as Timers,
+      CounterRF23016C,
+      RealMainP;
+
+  AlarmFrom -> Timers.ALARM_RF23016;
+  AlarmFrom.Counter -> CounterRF23016C;
+
+  AlarmInit -> Timers.ALARM_RF23016;
+  AlarmInit -> Timers.ALARM_RF23016_CTRL;
+  RealMainP.PlatformInit -> AlarmInit;
+  Alarm = AlarmFrom;
+}
+  
+
diff --git a/tos/platforms/mulle/timers/rf230/CounterRF23016C.nc b/tos/platforms/mulle/timers/rf230/CounterRF23016C.nc
new file mode 100644
index 00000000..fe34c846
--- /dev/null
+++ b/tos/platforms/mulle/timers/rf230/CounterRF23016C.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * CounterRF23016C provides a 16-bit TRF230 counter.
+ * It uses 1 hw timer that counts in PLL_CLOCK_SPEED / 8.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+
+#include "TimerConfig.h"
+#include <RadioConfig.h>
+
+configuration CounterRF23016C
+{
+  provides interface Counter<TRadio,uint16_t>;
+}
+implementation
+{
+  components new M16c62pCounter16C(TRadio) as CounterFrom;
+  components new M16c62pTimerBInitC(TMR_TIMER_MODE, M16C_TMR_CS_F8, 0xFFFF, false, true, true) as CounterInit;
+
+  components HplM16c62pTimerC as Timers,
+      RealMainP;
+  
+  CounterFrom.Timer -> Timers.COUNTER_RF23016;
+  CounterInit -> Timers.COUNTER_RF23016;
+  CounterInit -> Timers.COUNTER_RF23016_CTRL;
+  RealMainP.PlatformInit -> CounterInit;
+  Counter = CounterFrom;
+}
diff --git a/tos/platforms/mulle/timers/stop/RV8564AlarmCounterMilli32C.nc b/tos/platforms/mulle/timers/stop/RV8564AlarmCounterMilli32C.nc
new file mode 100755
index 00000000..7d30e5cd
--- /dev/null
+++ b/tos/platforms/mulle/timers/stop/RV8564AlarmCounterMilli32C.nc
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * RV8564AlarmCounterMilli32C provides a 32-bit TMilli alarm and counter.
+ * The counter and alarm is driven by the RV8564 chip on Mulle. This
+ * allows the M16c/62p mcu to be put into stop mode even when the timers
+ * are running.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @see  Please refer to TEP 102 for more information about this component.
+ */
+
+#include "TimerConfig.h"
+
+configuration RV8564AlarmCounterMilli32C
+{
+  provides interface Counter<TMilli,uint32_t>;
+  provides interface Alarm<TMilli,uint32_t>;
+  provides interface Init;
+}
+implementation
+{
+  components new M16c62pCounter32C(TMilli) as CounterFrom;
+  components new M16c62pTimerAInitC(TMR_COUNTER_MODE, M16C_TMRA_TES_TB2, 0xFFFF, false, true, true) as CounterInit1;
+  components new M16c62pTimerAInitC(TMR_COUNTER_MODE, M16C_TMRA_TES_TA_PREV, 0xFFFF, true, true, true) as CounterInit2;
+  
+  components new M16c62pAlarm32C(TMilli) as AlarmFrom;
+  components new M16c62pTimerBInitC(TMR_COUNTER_MODE, M16C_TMRB_CTR_ES_TBj, 0, false, false, true) as AlarmInit1;
+  components new M16c62pTimerBInitC(TMR_COUNTER_MODE, M16C_TMRB_CTR_ES_TBj, 0, false, false, true) as AlarmInit2;
+  
+  components new M16c62pTimerBInitC(TMR_COUNTER_MODE, M16C_TMRB_CTR_ES_TBiIN, 0, false, true, true) as TimerSourceInit;
+
+  components HplM16c62pTimerC as Timers,
+      RV8564AlarmCounterMilli32P,
+      HplM16c62pInterruptC as Irqs,
+      HplM16c62pGeneralIOC as IOs;
+
+  // Setup the IO pin that RV8564 generates the clock to.
+  RV8564AlarmCounterMilli32P -> IOs.PortP92;
+  Init = RV8564AlarmCounterMilli32P;
+  
+  // Counter
+  CounterFrom.TimerLow -> Timers.COUNTER_MILLI32_LOW;
+  CounterFrom.TimerHigh -> Timers.COUNTER_MILLI32_HIGH;
+  CounterInit1 -> Timers.COUNTER_MILLI32_LOW;
+  CounterInit1 -> Timers.COUNTER_MILLI32_LOW_CTRL;
+  CounterInit2 -> Timers.COUNTER_MILLI32_HIGH;
+  CounterInit2 -> Timers.COUNTER_MILLI32_HIGH_CTRL;
+  Init = CounterInit1;
+  Init = CounterInit2;
+  Counter = CounterFrom;
+
+  // Alarm
+  AlarmFrom.ATimerLow -> Timers.ALARM_MILLI32_LOW;
+  AlarmFrom.ATimerHigh -> Timers.ALARM_MILLI32_HIGH;
+  AlarmFrom.Counter -> CounterFrom;
+  AlarmInit1 -> Timers.ALARM_MILLI32_LOW;
+  AlarmInit1 -> Timers.ALARM_MILLI32_LOW_CTRL;
+  AlarmInit2 -> Timers.ALARM_MILLI32_HIGH;
+  AlarmInit2 -> Timers.ALARM_MILLI32_HIGH_CTRL;
+  Init = AlarmInit1;
+  Init = AlarmInit2;
+  Alarm = AlarmFrom;
+
+  // Timer source
+  TimerSourceInit -> Timers.MILLI32_SOURCE_RV8564;
+  TimerSourceInit -> Timers.MILLI32_SOURCE_RV8564_CTRL;
+  Init = TimerSourceInit;
+}
+
diff --git a/tos/platforms/mulle/timers/stop/RV8564AlarmCounterMilli32P.nc b/tos/platforms/mulle/timers/stop/RV8564AlarmCounterMilli32P.nc
new file mode 100755
index 00000000..0dae1c3b
--- /dev/null
+++ b/tos/platforms/mulle/timers/stop/RV8564AlarmCounterMilli32P.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Init the port that the RV8564 chip is generating its tics to (TB0 in).
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ */
+module RV8564AlarmCounterMilli32P
+{
+  provides interface Init;
+  uses interface GeneralIO as IO;
+}
+implementation
+{
+  command error_t Init.init()
+  {
+    call IO.makeInput();
+    call IO.clr();
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/mulle/timers/wait/AlarmCounterMilli32C.nc b/tos/platforms/mulle/timers/wait/AlarmCounterMilli32C.nc
new file mode 100755
index 00000000..f48d7d45
--- /dev/null
+++ b/tos/platforms/mulle/timers/wait/AlarmCounterMilli32C.nc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2009 Communication Group and Eislab at
+ * Lulea University of Technology
+ *
+ * Contact: Laurynas Riliskis, LTU
+ * Mail: laurynas.riliskis@ltu.se
+ * All rights reserved.
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Communication Group at Lulea University of Technology
+ *   nor the names of its contributors may be used to endorse or promote
+ *    products derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * AlarmCounterMilli32C provides a 32-bit TMilli alarm and counter.
+ *
+ * @author Henrik Makitaavola <henrik.makitaavola@gmail.com>
+ * @see  Please refer to TEP 102 for more information about this component.
+ */
+
+#include "TimerConfig.h"
+
+configuration AlarmCounterMilli32C
+{
+  provides interface Counter<TMilli,uint32_t>;
+  provides interface Alarm<TMilli,uint32_t>;
+  provides interface Init;
+}
+implementation
+{
+  components new M16c62pCounter16C(TMilli) as CounterFrom;
+  components new M16c62pTimerBInitC(TMR_COUNTER_MODE, M16C_TMRB_CTR_ES_TBj, 0xFFFF, true, true, false) as CounterInit;
+  components new M16c62pTimerBInitC(TMR_TIMER_MODE, M16C_TMR_CS_F1_2, (1000 * MAIN_CRYSTAL_SPEED) - 1, false, true, true) as CounterSourceInit;
+  components new TransformCounterC(TMilli,uint32_t, TMilli,uint16_t, 0,uint16_t) as TCounter;
+  
+  components new M16c62pAlarm16C(TMilli) as AlarmFrom;
+  components new M16c62pTimerAInitC(TMR_COUNTER_MODE, M16C_TMRA_TES_TA_PREV, 0, false, false, false) as AlarmInit;
+  components new M16c62pTimerAInitC(TMR_TIMER_MODE, M16C_TMR_CS_F1_2, (1000 * MAIN_CRYSTAL_SPEED) - 1, false, true, true) as AlarmSourceInit;
+  components new TransformAlarmC(TMilli,uint32_t,TMilli,uint16_t,0) as TAlarm;
+  
+
+  components HplM16c62pTimerC as Timers;
+
+  // Counter
+  CounterFrom.Timer -> Timers.COUNTER_MILLI32;
+  CounterInit -> Timers.COUNTER_MILLI32;
+  CounterInit -> Timers.COUNTER_MILLI32_CTRL;
+  Init = CounterInit;
+  CounterSourceInit -> Timers.COUNTER_MILLI32_SOURCE;
+  CounterSourceInit -> Timers.COUNTER_MILLI32_SOURCE_CTRL;
+  Init = CounterSourceInit;
+
+  // Alarm
+  AlarmFrom -> Timers.ALARM_MILLI32;
+  AlarmFrom.Counter -> CounterFrom;
+  AlarmInit -> Timers.ALARM_MILLI32;
+  AlarmInit -> Timers.ALARM_MILLI32_CTRL;
+  Init = AlarmInit.Init;
+  AlarmSourceInit -> Timers.ALARM_MILLI32_SOURCE;
+  AlarmSourceInit -> Timers.ALARM_MILLI32_SOURCE_CTRL;
+  Init = AlarmSourceInit;
+
+  // Transformations
+  TCounter.CounterFrom -> CounterFrom;
+  Counter = TCounter;
+  TAlarm.AlarmFrom -> AlarmFrom;
+  TAlarm.Counter -> TCounter;
+  Alarm = TAlarm;
+}
+
diff --git a/tos/platforms/null/.platform b/tos/platforms/null/.platform
new file mode 100644
index 00000000..57fbf522
--- /dev/null
+++ b/tos/platforms/null/.platform
@@ -0,0 +1,27 @@
+#
+# FILE: null/.platform
+# 
+# A do-nothing platform. A good target for mig when using external types.
+#
+# $Id: .platform,v 1.6 2009-11-14 06:51:21 razvanm Exp $
+#
+push( @includes, qw(
+
+  %T/lib/timer
+  %T/lib/serial
+
+) );
+
+@opts = qw(
+
+  -fnesc-target=pc
+  -fnesc-no-debug
+
+);
+
+if (defined($ENV{"GCC"})) {
+  push @opts, "-gcc=$ENV{'GCC'}";
+} else {
+  push @opts, "-gcc=gcc";
+}
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
diff --git a/tos/platforms/null/ActiveMessageC.nc b/tos/platforms/null/ActiveMessageC.nc
new file mode 100644
index 00000000..f8f017c3
--- /dev/null
+++ b/tos/platforms/null/ActiveMessageC.nc
@@ -0,0 +1,122 @@
+// $Id: ActiveMessageC.nc,v 1.6 2008-04-24 06:52:12 klueska Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+module ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+implementation {
+
+
+  command error_t SplitControl.start() {
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.stop() {
+    return SUCCESS;
+  }
+
+  command error_t AMSend.send[uint8_t id](am_addr_t addr, message_t* msg, uint8_t len) {
+    return SUCCESS;
+  }
+
+  command error_t AMSend.cancel[uint8_t id](message_t* msg) {
+    return SUCCESS;
+  }
+
+  command uint8_t AMSend.maxPayloadLength[uint8_t id]() {
+    return 0;
+  }
+
+  command void* AMSend.getPayload[uint8_t id](message_t* msg, uint8_t len) {
+    return NULL;
+  }
+
+  command void Packet.clear(message_t* msg) {
+  }
+
+  command uint8_t Packet.payloadLength(message_t* msg) {
+    return 0;
+  }
+
+  command uint8_t Packet.maxPayloadLength() {
+    return 0;
+  }
+
+  command void* Packet.getPayload(message_t* msg, uint8_t len) {
+    return msg;
+  }
+
+  command void Packet.setPayloadLength(message_t* msg, uint8_t len) {
+  }
+
+  command am_addr_t AMPacket.address() {
+    return 0;
+  }
+
+  command am_addr_t AMPacket.destination(message_t* amsg) {
+    return 0;
+  }
+
+  command bool AMPacket.isForMe(message_t* amsg) {
+    return FALSE;
+  }
+
+  command am_id_t AMPacket.type(message_t* amsg) {
+    return 0;
+  }
+
+  command void AMPacket.setDestination(message_t* amsg, am_addr_t addr) {
+  }
+
+  command void AMPacket.setType(message_t* amsg, am_id_t t) {
+  }
+
+  command am_addr_t AMPacket.source(message_t* amsg) {
+    return 0;
+  }
+
+  command void AMPacket.setSource(message_t* amsg, am_addr_t addr) { }
+  
+  command am_group_t AMPacket.group(message_t* amsg) {
+    return 0;
+  }
+
+  command void AMPacket.setGroup(message_t* amsg, am_group_t grp) { }
+
+  command am_group_t AMPacket.localGroup() {
+    return 0;
+  }
+
+  async command error_t Acks.requestAck( message_t* msg ) {
+    return SUCCESS;
+  }
+
+  async command error_t Acks.noAck( message_t* msg ) {
+    return SUCCESS;
+  }
+
+  async command bool Acks.wasAcked(message_t* msg) {
+    return FALSE;
+  }
+}
diff --git a/tos/platforms/null/BlockStorageC.nc b/tos/platforms/null/BlockStorageC.nc
new file mode 100644
index 00000000..4c0121f0
--- /dev/null
+++ b/tos/platforms/null/BlockStorageC.nc
@@ -0,0 +1,47 @@
+// $Id: BlockStorageC.nc,v 1.4 2006-12-12 18:23:44 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+#include "Storage.h"
+
+generic module BlockStorageC(volume_id_t volid) {
+  provides {
+    interface BlockWrite;
+    interface BlockRead;
+  }
+}
+implementation {
+  command error_t BlockWrite.write( storage_addr_t addr, void* buf, uint16_t len ) {
+    return SUCCESS;
+  }
+
+  command error_t BlockWrite.erase() {
+    return SUCCESS;
+  }
+
+  command error_t BlockWrite.commit() {
+    return SUCCESS;
+  }
+
+  command error_t BlockRead.read( storage_addr_t addr, void* buf, uint16_t len ) {
+    return SUCCESS;
+  }
+
+  command error_t BlockRead.verify() {
+    return SUCCESS;
+  }
+
+  command error_t BlockRead.computeCrc( storage_addr_t addr, storage_len_t len ) {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/null/DemoSensorC.nc b/tos/platforms/null/DemoSensorC.nc
new file mode 100644
index 00000000..bc63a447
--- /dev/null
+++ b/tos/platforms/null/DemoSensorC.nc
@@ -0,0 +1,34 @@
+/* $Id: DemoSensorC.nc,v 1.4 2006-12-12 18:23:44 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Null platform demo sensor code.
+ *
+ * @author David Gay
+ */
+generic module DemoSensorC()
+{
+  provides interface Read<uint16_t>;
+  provides interface ReadStream<uint16_t>;
+}
+implementation
+{
+  command error_t Read.read() {
+    return SUCCESS;
+  }
+
+  command error_t ReadStream.postBuffer(uint16_t *buf, uint16_t count) {
+    return SUCCESS;
+  }
+
+   command error_t ReadStream.read(uint32_t usPeriod) {
+     return SUCCESS;
+  }
+}
+
diff --git a/tos/platforms/null/DemoSensorNowC.nc b/tos/platforms/null/DemoSensorNowC.nc
new file mode 100644
index 00000000..6d01d2c9
--- /dev/null
+++ b/tos/platforms/null/DemoSensorNowC.nc
@@ -0,0 +1,42 @@
+/* $Id: DemoSensorNowC.nc,v 1.4 2006-12-12 18:23:44 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Null platform demo sensor code.
+ *
+ * @author David Gay
+ */
+generic module DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation
+{
+  async command error_t Resource.request() {
+    return SUCCESS;
+  }
+
+  async command error_t Resource.immediateRequest() {
+    return SUCCESS;
+  }
+
+  async command error_t Resource.release() {
+    return SUCCESS;
+  }
+
+  async command uint8_t Resource.isOwner() {
+    return true;
+  }
+
+  async command error_t ReadNow.read() {
+    return SUCCESS;
+  }
+}
+
diff --git a/tos/platforms/null/HilTimerMilliC.nc b/tos/platforms/null/HilTimerMilliC.nc
new file mode 100644
index 00000000..30c3dc34
--- /dev/null
+++ b/tos/platforms/null/HilTimerMilliC.nc
@@ -0,0 +1,66 @@
+// $Id: HilTimerMilliC.nc,v 1.4 2006-12-12 18:23:44 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+module HilTimerMilliC
+{
+  provides interface Init;
+  provides interface Timer<TMilli> as TimerMilli[ uint8_t num ];
+  provides interface LocalTime<TMilli>;
+}
+implementation
+{
+
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+
+  command void TimerMilli.startPeriodic[ uint8_t num ]( uint32_t dt ) {
+  }
+
+  command void TimerMilli.startOneShot[ uint8_t num ]( uint32_t dt ) {
+  }
+
+  command void TimerMilli.stop[ uint8_t num ]() {
+  }
+
+  command bool TimerMilli.isRunning[ uint8_t num ]() {
+    return FALSE;
+  }
+
+  command bool TimerMilli.isOneShot[ uint8_t num ]() {
+    return FALSE;
+  }
+
+  command void TimerMilli.startPeriodicAt[ uint8_t num ]( uint32_t t0, uint32_t dt ) {
+  }
+
+  command void TimerMilli.startOneShotAt[ uint8_t num ]( uint32_t t0, uint32_t dt ) {
+  }
+
+  command uint32_t TimerMilli.getNow[ uint8_t num ]() {
+    return 0;
+  }
+
+  command uint32_t TimerMilli.gett0[ uint8_t num ]() {
+    return 0;
+  }
+
+  command uint32_t TimerMilli.getdt[ uint8_t num ]() {
+    return 0;
+  }
+
+  async command uint32_t LocalTime.get() {
+    return 0;
+  }
+}
diff --git a/tos/platforms/null/McuSleepC.nc b/tos/platforms/null/McuSleepC.nc
new file mode 100644
index 00000000..84d38984
--- /dev/null
+++ b/tos/platforms/null/McuSleepC.nc
@@ -0,0 +1,27 @@
+// $Id: McuSleepC.nc,v 1.4 2006-12-12 18:23:44 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+module McuSleepC {
+  provides {
+    interface McuSleep;
+    interface McuPowerState;
+  }
+}
+implementation {
+  async command void McuSleep.sleep() {
+  }
+
+  async command void McuPowerState.update() {
+  }
+}
diff --git a/tos/platforms/null/PlatformC.nc b/tos/platforms/null/PlatformC.nc
new file mode 100644
index 00000000..62e5c9d2
--- /dev/null
+++ b/tos/platforms/null/PlatformC.nc
@@ -0,0 +1,22 @@
+// $Id: PlatformC.nc,v 1.4 2006-12-12 18:23:44 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+module PlatformC { 
+  provides interface Init;
+}
+implementation {
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/null/PlatformLedsC.nc b/tos/platforms/null/PlatformLedsC.nc
new file mode 100644
index 00000000..021dbe8f
--- /dev/null
+++ b/tos/platforms/null/PlatformLedsC.nc
@@ -0,0 +1,109 @@
+// $Id: PlatformLedsC.nc,v 1.5 2007-05-23 22:17:49 idgay Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+module PlatformLedsC
+{
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation
+{
+
+  async command void Led0.set() {
+  }
+
+  async command void Led0.clr() {
+  }
+
+  async command void Led0.toggle() {
+  }
+
+  async command bool Led0.get() {
+    return FALSE;
+  }
+
+  async command void Led0.makeInput() {
+  }
+
+  async command void Led0.makeOutput() {
+    call Init.init();
+  }
+
+  async command void Led1.set() {
+  }
+
+  async command void Led1.clr() {
+  }
+
+  async command void Led1.toggle() {
+  }
+
+  async command bool Led1.get() {
+    return FALSE;
+  }
+
+  async command void Led1.makeInput() {
+  }
+
+  async command void Led1.makeOutput() {
+    call Init.init();
+  }
+
+  async command void Led2.set() {
+  }
+
+  async command void Led2.clr() {
+  }
+
+  async command void Led2.toggle() {
+  }
+
+  async command bool Led2.get() {
+    return FALSE;
+  }
+
+  async command void Led2.makeInput() {
+  }
+
+  async command void Led2.makeOutput() {
+    call Init.init();
+  }
+
+  async command bool Led0.isInput() { 
+    return FALSE;
+  }
+
+  async command bool Led0.isOutput() { 
+    return FALSE;
+  }
+
+  async command bool Led1.isInput() { 
+    return FALSE;
+  }
+
+  async command bool Led1.isOutput() { 
+    return FALSE;
+  }
+
+  async command bool Led2.isInput() { 
+    return FALSE;
+  }
+
+  async command bool Led2.isOutput() { 
+    return FALSE;
+  }
+
+}
diff --git a/tos/platforms/null/PlatformSerialC.nc b/tos/platforms/null/PlatformSerialC.nc
new file mode 100644
index 00000000..05a79614
--- /dev/null
+++ b/tos/platforms/null/PlatformSerialC.nc
@@ -0,0 +1,52 @@
+// $Id: PlatformSerialC.nc,v 1.5 2007-05-23 22:17:49 idgay Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+module PlatformSerialC {
+  provides interface StdControl;
+  provides interface UartByte;
+  provides interface UartStream;
+}
+implementation {
+  command error_t StdControl.start() {
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop() {
+    return SUCCESS;
+  }
+
+  async command error_t UartByte.send( uint8_t byte ) {
+    return SUCCESS;
+  }
+
+  async command error_t UartByte.receive( uint8_t* byte, uint8_t timeout ) {
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.send( uint8_t* buf, uint16_t len ) {
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.enableReceiveInterrupt() {
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.disableReceiveInterrupt() {
+    return SUCCESS;
+  }
+
+  async command error_t UartStream.receive( uint8_t* buf, uint16_t len ) {
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/null/Storage_chip.h b/tos/platforms/null/Storage_chip.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/null/hardware.h b/tos/platforms/null/hardware.h
new file mode 100644
index 00000000..59da9bc7
--- /dev/null
+++ b/tos/platforms/null/hardware.h
@@ -0,0 +1,39 @@
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+inline void __nesc_enable_interrupt() { }
+inline void __nesc_disable_interrupt() { }
+
+typedef uint8_t __nesc_atomic_t;
+typedef uint8_t mcu_power_t;
+
+inline __nesc_atomic_t __nesc_atomic_start(void) @spontaneous() {
+  return 0;
+}
+
+inline void __nesc_atomic_end(__nesc_atomic_t x) @spontaneous() { }
+inline void __nesc_atomic_sleep() { }
+
+/* Floating-point network-type support */
+typedef float nx_float __attribute__((nx_base_be(afloat)));
+
+inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() {
+  float f;
+  memcpy(&f, source, sizeof(float));
+  return f;
+}
+
+inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() {
+  memcpy(target, &value, sizeof(float));
+  return value;
+}
+
+// enum so components can override power saving,
+// as per TEP 112.
+// As this is not a real platform, just set it to 0.
+enum {
+  TOS_SLEEP_NONE = 0,
+};
+
+
+#endif
diff --git a/tos/platforms/null/platform.h b/tos/platforms/null/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/null/platform_message.h b/tos/platforms/null/platform_message.h
new file mode 100644
index 00000000..2f99cc5c
--- /dev/null
+++ b/tos/platforms/null/platform_message.h
@@ -0,0 +1,32 @@
+// $Id: platform_message.h,v 1.4 2006-12-12 18:23:44 vlahan Exp $
+/*
+ * Copyright (c) 2005-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy implementation to support the null platform.
+ */
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "Serial.h"
+
+typedef union message_header {
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  nx_uint8_t dummy;
+} message_footer_t;
+
+typedef union message_metadata {
+  nx_uint8_t dummy;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/sam3s_ek/.platform b/tos/platforms/sam3s_ek/.platform
new file mode 100644
index 00000000..9f67b2ef
--- /dev/null
+++ b/tos/platforms/sam3s_ek/.platform
@@ -0,0 +1,53 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+
+push ( @includes,
+  "%T/chips/cortex/m3",
+  "%T/chips/cortex/m3/sam3",
+  "%T/chips/cortex/m3/sam3/s",
+  "%T/chips/cortex/m3/sam3/nvic",
+  "%T/chips/cortex/m3/sam3/s/nvic",
+  "%T/chips/cortex/m3/sam3/pmc",
+  "%T/chips/cortex/m3/sam3/s/pmc",
+  "%T/chips/cortex/m3/sam3/supc",
+  "%T/chips/cortex/m3/sam3/s/supc",
+  "%T/chips/cortex/m3/sam3/timer",
+  "%T/chips/cortex/m3/sam3/s/timer",
+  "%T/chips/cortex/m3/sam3/eefc",
+  "%T/chips/cortex/m3/sam3/s/eefc",
+  "%T/chips/cortex/m3/sam3/wdtc",
+  "%T/chips/cortex/m3/sam3/s/wdtc",
+  "%T/chips/cortex/m3/sam3/matrix",
+  "%T/chips/cortex/m3/sam3/s/matrix",
+  "%T/chips/cortex/m3/sam3/pins",
+  "%T/chips/cortex/m3/sam3/s/pins",
+  "%T/chips/cortex/m3/sam3/smc",
+  "%T/chips/cortex/m3/sam3/s/smc",
+  "%T/chips/cortex/m3/sam3/uart",
+  "%T/chips/cortex/m3/sam3/s/uart",
+  "%T/chips/cortex/m3/sam3/pdc",
+  "%T/chips/cortex/m3/sam3/s/pdc",
+  "%T/chips/cortex/m3/sam3/s/adc",
+  "%T/chips/cortex/m3/sam3/s/dacc",
+  "%T/platforms/sam3s_ek/lcd",
+  "%T/lib/timer",
+  "%T/lib/serial",
+  "%T/lib/power",
+);
+
+@opts = qw(
+
+  -gcc=arm-none-eabi-gcc
+  -mcpu=cortex-m3
+  -nostartfiles
+  -fnesc-target=env
+  -fnesc-no-debug
+
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{NESC_MACHINE} = "structure_size_boundary=32, pointer=4,4 float=4,4 double=8,4 long_double=8,4 short=2,2 int=4,4 long=4,4 long_long=8,4 int1248_align=1,2,4,4 wchar_size_size=4,4 char_wchar_signed=false,true";
diff --git a/tos/platforms/sam3s_ek/ActiveMessageC.nc b/tos/platforms/sam3s_ek/ActiveMessageC.nc
new file mode 100644
index 00000000..318f354a
--- /dev/null
+++ b/tos/platforms/sam3s_ek/ActiveMessageC.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the SAM3U-EK platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Philip Levis
+ * @author Thomas Schmid (adapted to SAM3U EK)
+ */
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
diff --git a/tos/platforms/sam3s_ek/Ieee154MessageC.nc b/tos/platforms/sam3s_ek/Ieee154MessageC.nc
new file mode 100644
index 00000000..472726ca
--- /dev/null
+++ b/tos/platforms/sam3s_ek/Ieee154MessageC.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ *
+ * @author Stephen Dawson-Haggerty
+ */
+ 
+configuration Ieee154MessageC  {
+  provides {
+    interface SplitControl;
+
+    interface Resource as SendResource[uint8_t clientId];
+    interface Ieee154Send;
+    interface Receive as Ieee154Receive;
+
+    interface Ieee154Packet;
+    interface Packet;
+
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+    interface LowPowerListening;
+    interface PacketLink;
+  }
+
+} implementation {
+  components CC2420Ieee154MessageC as Msg;
+
+  SplitControl = Msg;
+  SendResource = Msg;
+  Ieee154Send  = Msg;
+  Ieee154Receive = Msg;
+  Ieee154Packet = Msg;
+  Packet = Msg;
+  
+  PacketAcknowledgements = Msg;
+  LinkPacketMetadata = Msg;
+  LowPowerListening = Msg;
+  PacketLink = Msg;
+}
diff --git a/tos/platforms/sam3s_ek/LedsP.nc b/tos/platforms/sam3s_ek/LedsP.nc
new file mode 100644
index 00000000..4d7f03d3
--- /dev/null
+++ b/tos/platforms/sam3s_ek/LedsP.nc
@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The implementation of the standard 3 LED mote abstraction.
+ * Adapted because LED 2 (red) is active high on SAM3U_EK.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ *
+ * @date   March 21, 2005
+ */
+
+module LedsP @safe() {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+}
+implementation {
+  command error_t Init.init() {
+    atomic {
+      dbg("Init", "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led0.clr();
+      call Led1.set();
+      call Led2.set();
+    }
+    return SUCCESS;
+  }
+
+  /* Note: the call is inside the dbg, as it's typically a read of a volatile
+     location, so can't be deadcode eliminated */
+#define DBGLED(n) \
+  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");
+
+  async command void Leds.led0On() {
+    call Led0.set();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Off() {
+    call Led0.clr();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    DBGLED(0);
+  }
+
+  async command void Leds.led1On() {
+    call Led1.clr();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Off() {
+    call Led1.set();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    DBGLED(1);
+  }
+
+  async command void Leds.led2On() {
+    call Led2.clr();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Off() {
+    call Led2.set();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    DBGLED(2);
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (!call Led0.get()) {
+	rval |= LEDS_LED0;
+      }
+      if (!call Led1.get()) {
+	rval |= LEDS_LED1;
+      }
+      if (call Led2.get()) {
+	rval |= LEDS_LED2;
+      }
+    }
+    return rval;
+  }
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led2Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/sam3s_ek/MoteClockC.nc b/tos/platforms/sam3s_ek/MoteClockC.nc
new file mode 100644
index 00000000..255720d0
--- /dev/null
+++ b/tos/platforms/sam3s_ek/MoteClockC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration MoteClockC
+{
+
+    provides {
+        interface Init;
+    }
+}
+
+implementation
+{
+
+    components MoteClockP, HplSam3sClockC;
+
+    Init = MoteClockP;
+    MoteClockP.HplSam3Clock -> HplSam3sClockC;
+
+  components LedsC;
+  MoteClockP.Leds -> LedsC;
+}
diff --git a/tos/platforms/sam3s_ek/MoteClockP.nc b/tos/platforms/sam3s_ek/MoteClockP.nc
new file mode 100644
index 00000000..1ab29b52
--- /dev/null
+++ b/tos/platforms/sam3s_ek/MoteClockP.nc
@@ -0,0 +1,132 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic Clock Initialization.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "sam3spmchardware.h"
+#include "sam3ssupchardware.h"
+#include "sam3eefchardware.h"
+#include "sam3wdtchardware.h"
+#include "sam3matrixhardware.h"
+
+extern void SetDefaultMaster(unsigned char enable);
+
+
+module MoteClockP
+{
+    provides 
+    {
+        interface Init;
+    }
+    uses
+    {
+        interface HplSam3Clock;
+	interface Leds;
+    }
+}
+
+implementation
+{
+
+    command error_t Init.init(){
+        wdtc_mr_t mr = WDTC->mr;
+        eefc_fmr_t fmr = EEFC0->fmr;
+
+        // Set 2 WS for Embedded Flash Access
+        fmr.bits.fws = 3;
+        EEFC0->fmr = fmr;
+
+        // Disable Watchdog
+        mr.bits.wddis = 1;
+        WDTC->mr = mr;
+
+        // Select external slow clock
+        call HplSam3Clock.slckExternalOsc();
+        //call HplSam3Clock.slckRCOsc();
+
+        // Initialize main oscillator
+        call HplSam3Clock.mckInit48();
+        //call HplSam3Clock.mckInit12RC();
+
+        // Enable clock for UART
+        // FIXME: this should go into the UART start/stop!
+        //PMC->pcdr.bits.dbgu = 1;
+
+        /* Optimize CPU setting for speed */
+        SetDefaultMaster(1);
+
+        return SUCCESS;
+
+    }
+
+    //------------------------------------------------------------------------------
+    /// Enable or disable default master access
+    /// \param enable 1 enable defaultMaster settings, 0 disable it.
+    //------------------------------------------------------------------------------
+    void SetDefaultMaster(unsigned char enable) @C() 
+    {
+        // Set default master
+        if (enable == 1) {
+            // Set default master: SRAM0 -> Cortex-M3 System
+            MATRIX->scfg0.bits.fixed_defmstr = 1;
+            MATRIX->scfg0.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT;
+
+            // Set default master: SRAM1 -> Cortex-M3 System
+            MATRIX->scfg1.bits.fixed_defmstr = 1;
+            MATRIX->scfg1.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT;
+
+            // Set default master: Internal flash0 -> Cortex-M3 Instruction/Data
+            MATRIX->scfg3.bits.fixed_defmstr = 0;
+            MATRIX->scfg3.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT;
+        } else {
+
+            // Clear default master: SRAM0 -> Cortex-M3 System
+            MATRIX->scfg0.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT;
+
+            // Clear default master: SRAM1 -> Cortex-M3 System
+            MATRIX->scfg1.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT;
+
+            // Clear default master: Internal flash0 -> Cortex-M3 Instruction/Data
+            MATRIX->scfg3.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT;
+        }
+    }
+
+    /**
+     * informs us when the main clock changes
+     */
+    async event void HplSam3Clock.mainClockChanged() {}
+
+}
+
diff --git a/tos/platforms/sam3s_ek/PlatformC.nc b/tos/platforms/sam3s_ek/PlatformC.nc
new file mode 100644
index 00000000..1f1add30
--- /dev/null
+++ b/tos/platforms/sam3s_ek/PlatformC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#include "hardware.h"
+
+configuration PlatformC
+{
+	provides
+	{
+		/* Called after platform_bootstrap() and Scheduler.init() (see TEP 107)
+		 * I/O pin configuration, clock calibration, and LED configuration */
+		interface Init;
+	}
+}
+
+implementation
+{
+	components PlatformP, MoteClockC, HplSam3TCC as MoteTimerC;
+    components McuSleepC;
+
+	Init = PlatformP;
+
+    PlatformP.MoteClockInit -> MoteClockC;
+    PlatformP.IRQInit -> MoteClockC;
+    PlatformP.MoteTimerInit -> MoteTimerC;
+
+    // Used so we can initialize the platform in a state where it would draw
+    // the lowest current possible if put to sleep.
+    PlatformP.Sam3LowPower -> McuSleepC;
+}
diff --git a/tos/platforms/sam3s_ek/PlatformLedsC.nc b/tos/platforms/sam3s_ek/PlatformLedsC.nc
new file mode 100644
index 00000000..f17ee5c2
--- /dev/null
+++ b/tos/platforms/sam3s_ek/PlatformLedsC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Connection of LEDs to the GPIO pins on the SAM3S-EK board.
+ *
+ * @author Thomas Schmid <thomas.schmid@utah.edu>
+ */
+
+configuration PlatformLedsC
+{
+	provides
+	{
+		interface GeneralIO as Led0;
+		interface GeneralIO as Led1;
+		interface GeneralIO as Led2;
+	}
+	uses
+	{
+		interface Init;
+	}
+}
+implementation
+{
+	components HplSam3sGeneralIOC as IO;
+	components PlatformP;
+
+	Init = PlatformP.LedsInit;
+
+	Led0 = IO.PioC20; // Pin C20 = RED, active high
+	Led1 = IO.PioA19; // Pin A19 = BLUE, active low
+	Led2 = IO.PioA20; // Pin A20 = GREEN, active low
+}
diff --git a/tos/platforms/sam3s_ek/PlatformP.nc b/tos/platforms/sam3s_ek/PlatformP.nc
new file mode 100644
index 00000000..f521bafe
--- /dev/null
+++ b/tos/platforms/sam3s_ek/PlatformP.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#include "hardware.h"
+
+module PlatformP
+{
+    provides
+	{
+        interface Init;
+    }
+	uses
+	{
+		interface Init as LedsInit;
+        interface Init as MoteClockInit;
+        interface Init as IRQInit;
+        interface Init as MoteTimerInit;
+        interface Sam3LowPower;
+	}
+}
+
+implementation
+{
+	command error_t Init.init()
+	{
+		/* I/O pin configuration, clock calibration, and LED configuration
+		 * (see TEP 107)
+		 */
+		call IRQInit.init();
+        call MoteClockInit.init();
+        call MoteTimerInit.init();
+		call LedsInit.init();
+
+		return SUCCESS;
+	}
+
+    async event void Sam3LowPower.customizePio() {
+        // currently not optimized for sam3s-ek
+    }
+
+	default command error_t LedsInit.init()
+	{
+		return SUCCESS;
+	}
+}
diff --git a/tos/platforms/sam3s_ek/PlatformSerialC.nc b/tos/platforms/sam3s_ek/PlatformSerialC.nc
new file mode 100644
index 00000000..41ee74d8
--- /dev/null
+++ b/tos/platforms/sam3s_ek/PlatformSerialC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+configuration PlatformSerialC
+{
+	provides
+	{
+		interface StdControl;
+		interface UartStream;
+		interface UartByte;
+	}
+}
+implementation
+{
+	components HilSam3UartC;
+
+	StdControl = HilSam3UartC;
+	UartStream = HilSam3UartC;
+	UartByte = HilSam3UartC;
+}
diff --git a/tos/platforms/sam3s_ek/hardware.h b/tos/platforms/sam3s_ek/hardware.h
new file mode 100644
index 00000000..3697ee3e
--- /dev/null
+++ b/tos/platforms/sam3s_ek/hardware.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2010 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Definitions of stuff specific to the SAM3S-EK board.
+ * Includes definitions for the SAM3S MCU.
+ *
+ * @author Thomas Schmid
+ */
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#include "sam3shardware.h"
+
+// #define this so we don't doubly define time_t with conflicting types
+// in SD card implementation Time.h file
+#define __time_t_defined
+#include <sys/types.h>
+
+#ifndef PLATFORM_BAUDRATE
+#define PLATFORM_BAUDRATE (9600)
+#endif
+
+#define IRQ_PRIO_UDPHS    (0x81)
+#define IRQ_PRIO_TWI1     (0x82)
+#define IRQ_PRIO_TWI0     (0x83)
+#define IRQ_PRIO_DMAC     (0x84)
+#define IRQ_PRIO_ADC      (0x85)
+#define IRQ_PRIO_DAC      (0x85)
+#define IRQ_PRIO_PIO      (0x86)
+#define IRQ_PRIO_SPI      (0x87)
+#define IRQ_PRIO_UART     (0x88)
+#define IRQ_PRIO_USART0   (0x89)
+#define IRQ_PRIO_USART1   (0x90)
+#define IRQ_PRIO_USART2   (0x91)
+#define IRQ_PRIO_HSMCI    (0x92)
+
+#endif // HARDWARE_H
diff --git a/tos/platforms/sam3s_ek/lcd/Draw.nc b/tos/platforms/sam3s_ek/lcd/Draw.nc
new file mode 100644
index 00000000..d1e7f71e
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/Draw.nc
@@ -0,0 +1,98 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+
+interface Draw
+{
+    async command void fill(uint32_t color);
+
+    async command void drawPixel(
+            uint32_t x,
+            uint32_t y,
+            uint32_t c);
+
+    async command void drawRectangle(
+            uint32_t x,
+            uint32_t y,
+            uint32_t width,
+            uint32_t height,
+            uint32_t color);
+
+    async command void drawString(
+            uint32_t x,
+            uint32_t y,
+            const char *pString,
+            uint32_t color);
+
+    async command void drawStringWithBGColor(
+            uint32_t x,
+            uint32_t y,
+            const char *pString,
+            uint32_t fontColor,
+            uint32_t bgColor);
+
+    async command void drawInt(
+            uint32_t x,
+            uint32_t y,
+            uint32_t n,
+            int8_t sign,
+            uint32_t fontColor);
+
+    async command void drawIntWithBGColor(
+            uint32_t x,
+            uint32_t y,
+            uint32_t n,
+            int8_t sign,
+            uint32_t fontColor,
+            uint32_t bgColor);
+
+    async command void getStringSize(
+            const char *pString,
+            uint32_t *pWidth,
+            uint32_t *pHeight);
+
+    async command void drawChar(
+            uint32_t x,
+            uint32_t y,
+            char c,
+            uint32_t color);
+
+    async command void drawCharWithBGColor(
+            uint32_t x,
+            uint32_t y,
+            char c,
+            uint32_t fontColor,
+            uint32_t bgColor);
+}
diff --git a/tos/platforms/sam3s_ek/lcd/Hx8347.nc b/tos/platforms/sam3s_ek/lcd/Hx8347.nc
new file mode 100644
index 00000000..c2ee23ee
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/Hx8347.nc
@@ -0,0 +1,51 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+
+interface Hx8347
+{
+    async command void writeReg(void *pLcdBase, uint8_t reg, uint16_t data);
+    async command uint16_t readReg(void *pLcdBase, uint8_t reg);
+    async command uint16_t readStatus(void *pLcdBase);
+    async command void writeRAM_Prepare(void *pLcdBase);
+    async command void writeRAM(void *pLcdBase, uint16_t color);
+    async command uint16_t readRAM(void *pLcdBase);
+    command void initialize(void *pLcdBase);
+    event void initializeDone(error_t err);
+    async command void setCursor(void *pLcdBase, uint16_t x, uint16_t y);
+    command void on(void *pLcdBase);
+    event void onDone();
+    async command void off(void *pLcdBase);
+}
diff --git a/tos/platforms/sam3s_ek/lcd/Hx8347C.nc b/tos/platforms/sam3s_ek/lcd/Hx8347C.nc
new file mode 100644
index 00000000..3a0adcb2
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/Hx8347C.nc
@@ -0,0 +1,404 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+
+module Hx8347C
+{
+    uses
+    {
+        interface Timer<TMilli> as InitTimer;
+        interface Timer<TMilli> as OnTimer;
+    }
+
+    provides interface Hx8347;
+}
+implementation
+{
+
+    typedef volatile uint16_t REG16;
+
+    enum {
+        INIT0,
+        INIT1,
+        INIT2,
+    };
+    uint8_t initState = INIT0;
+
+
+    enum {
+        ON0,
+        ON1,
+        ON2,
+    };
+    uint8_t onState = ON0;
+
+    void* spLcdBase;
+
+#define BOARD_LCD_RS     (1 << 1)
+    // LCD index register address
+#define LCD_IR(baseAddr) (*((REG16 *)(baseAddr)))
+    // LCD status register address
+#define LCD_SR(baseAddr) (*((REG16 *)(baseAddr)))
+    // LCD data address
+#define LCD_D(baseAddr)  (*((REG16 *)((uint32_t)(baseAddr) + BOARD_LCD_RS)))
+
+    // HX8347 ID code
+#define HX8347_HIMAXID_CODE    0x47
+
+    // HX8347 LCD Registers
+#define HX8347_R00H        0x00
+#define HX8347_R01H        0x01
+#define HX8347_R02H        0x02
+#define HX8347_R03H        0x03
+#define HX8347_R04H        0x04
+#define HX8347_R05H        0x05
+#define HX8347_R06H        0x06
+#define HX8347_R07H        0x07
+#define HX8347_R08H        0x08
+#define HX8347_R09H        0x09
+#define HX8347_R0AH        0x0A
+#define HX8347_R0CH        0x0C
+#define HX8347_R0DH        0x0D
+#define HX8347_R0EH        0x0E
+#define HX8347_R0FH        0x0F
+#define HX8347_R10H        0x10
+#define HX8347_R11H        0x11
+#define HX8347_R12H        0x12
+#define HX8347_R13H        0x13
+#define HX8347_R14H        0x14
+#define HX8347_R15H        0x15
+#define HX8347_R16H        0x16
+#define HX8347_R18H        0x18
+#define HX8347_R19H        0x19
+#define HX8347_R1AH        0x1A
+#define HX8347_R1BH        0x1B
+#define HX8347_R1CH        0x1C
+#define HX8347_R1DH        0x1D
+#define HX8347_R1EH        0x1E
+#define HX8347_R1FH        0x1F
+#define HX8347_R20H        0x20
+#define HX8347_R21H        0x21
+#define HX8347_R22H        0x22
+#define HX8347_R23H        0x23
+#define HX8347_R24H        0x24
+#define HX8347_R25H        0x25
+#define HX8347_R26H        0x26
+#define HX8347_R27H        0x27
+#define HX8347_R28H        0x28
+#define HX8347_R29H        0x29
+#define HX8347_R2AH        0x2A
+#define HX8347_R2BH        0x2B
+#define HX8347_R2CH        0x2C
+#define HX8347_R2DH        0x2D
+#define HX8347_R35H        0x35
+#define HX8347_R36H        0x36
+#define HX8347_R37H        0x37
+#define HX8347_R38H        0x38
+#define HX8347_R39H        0x39
+#define HX8347_R3AH        0x3A
+#define HX8347_R3BH        0x3B
+#define HX8347_R3CH        0x3C
+#define HX8347_R3DH        0x3D
+#define HX8347_R3EH        0x3E
+#define HX8347_R40H        0x40
+#define HX8347_R41H        0x41
+#define HX8347_R42H        0x42
+#define HX8347_R43H        0x43
+#define HX8347_R44H        0x44
+#define HX8347_R45H        0x45
+#define HX8347_R46H        0x46
+#define HX8347_R47H        0x47
+#define HX8347_R48H        0x48
+#define HX8347_R49H        0x49
+#define HX8347_R4AH        0x4A
+#define HX8347_R4BH        0x4B
+#define HX8347_R4CH        0x4C
+#define HX8347_R4DH        0x4D
+#define HX8347_R4EH        0x4E
+#define HX8347_R4FH        0x4F
+#define HX8347_R50H        0x50
+#define HX8347_R51H        0x51
+#define HX8347_R64H        0x64
+#define HX8347_R65H        0x65
+#define HX8347_R66H        0x66
+#define HX8347_R67H        0x67
+#define HX8347_R70H        0x70
+#define HX8347_R72H        0x72
+#define HX8347_R90H        0x90
+#define HX8347_R91H        0x91
+#define HX8347_R93H        0x93
+#define HX8347_R94H        0x94
+#define HX8347_R95H        0x95
+
+    /**
+     * Write data to LCD Register.
+     * \param pLcdBase   LCD base address.
+     * \param reg        Register address.
+     * \param data       Data to be written.
+     */
+    async command void Hx8347.writeReg(void *pLcdBase, uint8_t reg, uint16_t data)
+    {
+        LCD_IR(pLcdBase) = reg;
+        LCD_D(pLcdBase)  = data;
+    }
+
+    /**
+     * Read data from LCD Register.
+     * \param pLcdBase   LCD base address.
+     * \param reg        Register address.
+     * \return data      Data to be read.
+     */
+    async command uint16_t Hx8347.readReg(void *pLcdBase, uint8_t reg)
+    {
+        LCD_IR(pLcdBase) = reg;
+        return LCD_D(pLcdBase);
+    }
+
+    /**
+     * Read LCD status Register.
+     * \param pLcdBase   LCD base address.
+     * \param reg        Register address.
+     * \return data      Status Data.
+     */
+    async command uint16_t Hx8347.readStatus(void *pLcdBase)
+    {
+        return LCD_SR(pLcdBase);
+    }
+
+    /**
+     * Prepare to write GRAM data.
+     * \param pLcdBase   LCD base address.
+     */
+    async command void Hx8347.writeRAM_Prepare(void *pLcdBase)
+    {
+        LCD_IR(pLcdBase) = HX8347_R22H;
+    }
+
+    /**
+     * Write data to LCD GRAM.
+     * \param pLcdBase   LCD base address.
+     * \param color      16-bits RGB color.
+     */
+    async command void Hx8347.writeRAM(void *pLcdBase, uint16_t color)
+    {
+        // Write 16-bit GRAM Reg
+        LCD_D(pLcdBase) = color;
+    }
+
+    /**
+     * Read GRAM data.
+     * \param pLcdBase   LCD base address.
+     * \return           16-bits RGB color.
+     */
+    async command uint16_t Hx8347.readRAM(void *pLcdBase)
+    {
+        // Read 16-bit GRAM Reg
+        return LCD_D(pLcdBase);
+    }
+
+    event void InitTimer.fired()
+    {
+        // advance in the initialization 
+        call Hx8347.initialize(spLcdBase);
+    }
+
+    /**
+     * Initialize the LCD controller.
+     * \param pLcdBase   LCD base address.
+     */
+    command void Hx8347.initialize(void *pLcdBase)
+    {
+        uint16_t chipid;
+
+        switch(initState)
+        {
+            case INIT0:
+                spLcdBase = pLcdBase;
+
+                // Check HX8347 chipid
+                chipid = call Hx8347.readReg(pLcdBase, HX8347_R67H);
+                if(chipid != HX8347_HIMAXID_CODE) {
+
+                    // Read HX8347 chip ID error, skip initialization.
+                    signal Hx8347.initializeDone(FAIL);
+                    return ;
+                }
+
+                // Start internal OSC
+                call Hx8347.writeReg(pLcdBase, HX8347_R19H, 0x49); // OSCADJ=10 0000, OSD_EN=1 //60Hz
+                call Hx8347.writeReg(pLcdBase, HX8347_R93H, 0x0C); // RADJ=1100
+
+                // Power on flow
+                call Hx8347.writeReg(pLcdBase, HX8347_R44H, 0x4D); // VCM=100 1101
+                call Hx8347.writeReg(pLcdBase, HX8347_R45H, 0x11); // VDV=1 0001
+                call Hx8347.writeReg(pLcdBase, HX8347_R20H, 0x40); // BT=0100
+                call Hx8347.writeReg(pLcdBase, HX8347_R1DH, 0x07); // VC1=111
+                call Hx8347.writeReg(pLcdBase, HX8347_R1EH, 0x00); // VC3=000
+                call Hx8347.writeReg(pLcdBase, HX8347_R1FH, 0x04); // VRH=0100
+
+                call Hx8347.writeReg(pLcdBase, HX8347_R1CH, 0x04); // AP=100
+                call Hx8347.writeReg(pLcdBase, HX8347_R1BH, 0x10); // GASENB=0, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0
+                initState = INIT1;
+                call InitTimer.startOneShot(50);
+                break;
+
+            case INIT1:
+
+                call Hx8347.writeReg(pLcdBase, HX8347_R43H, 0x80); // Set VCOMG=1
+                initState = INIT2;
+                call InitTimer.startOneShot(50);
+                break;
+
+            case INIT2:
+
+                // Gamma for CMO 2.8
+                call Hx8347.writeReg(pLcdBase, HX8347_R46H, 0x95);
+                call Hx8347.writeReg(pLcdBase, HX8347_R47H, 0x51);
+                call Hx8347.writeReg(pLcdBase, HX8347_R48H, 0x00);
+                call Hx8347.writeReg(pLcdBase, HX8347_R49H, 0x36);
+                call Hx8347.writeReg(pLcdBase, HX8347_R4AH, 0x11);
+                call Hx8347.writeReg(pLcdBase, HX8347_R4BH, 0x66);
+                call Hx8347.writeReg(pLcdBase, HX8347_R4CH, 0x14);
+                call Hx8347.writeReg(pLcdBase, HX8347_R4DH, 0x77);
+                call Hx8347.writeReg(pLcdBase, HX8347_R4EH, 0x13);
+                call Hx8347.writeReg(pLcdBase, HX8347_R4FH, 0x4C);
+                call Hx8347.writeReg(pLcdBase, HX8347_R50H, 0x46);
+                call Hx8347.writeReg(pLcdBase, HX8347_R51H, 0x46);
+
+                //240x320 window setting
+                call Hx8347.writeReg(pLcdBase, HX8347_R02H, 0x00); // Column address start2
+                call Hx8347.writeReg(pLcdBase, HX8347_R03H, 0x00); // Column address start1
+                call Hx8347.writeReg(pLcdBase, HX8347_R04H, 0x00); // Column address end2
+                call Hx8347.writeReg(pLcdBase, HX8347_R05H, 0xEF); // Column address end1
+                call Hx8347.writeReg(pLcdBase, HX8347_R06H, 0x00); // Row address start2
+                call Hx8347.writeReg(pLcdBase, HX8347_R07H, 0x00); // Row address start1
+                call Hx8347.writeReg(pLcdBase, HX8347_R08H, 0x01); // Row address end2
+                call Hx8347.writeReg(pLcdBase, HX8347_R09H, 0x3F); // Row address end1
+
+                // Display Setting
+                call Hx8347.writeReg(pLcdBase, HX8347_R01H, 0x06); // IDMON=0, INVON=1, NORON=1, PTLON=0
+                call Hx8347.writeReg(pLcdBase, HX8347_R16H, 0xC8); // MY=1, MX=1, MV=0, BGR=1
+                call Hx8347.writeReg(pLcdBase, HX8347_R23H, 0x95); // N_DC=1001 0101
+                call Hx8347.writeReg(pLcdBase, HX8347_R24H, 0x95); // P_DC=1001 0101
+                call Hx8347.writeReg(pLcdBase, HX8347_R25H, 0xFF); // I_DC=1111 1111
+                call Hx8347.writeReg(pLcdBase, HX8347_R27H, 0x06); // N_BP=0000 0110
+                call Hx8347.writeReg(pLcdBase, HX8347_R28H, 0x06); // N_FP=0000 0110
+                call Hx8347.writeReg(pLcdBase, HX8347_R29H, 0x06); // P_BP=0000 0110
+                call Hx8347.writeReg(pLcdBase, HX8347_R2AH, 0x06); // P_FP=0000 0110
+                call Hx8347.writeReg(pLcdBase, HX8347_R2CH, 0x06); // I_BP=0000 0110
+                call Hx8347.writeReg(pLcdBase, HX8347_R2DH, 0x06); // I_FP=0000 0110
+                call Hx8347.writeReg(pLcdBase, HX8347_R3AH, 0x01); // N_RTN=0000, N_NW=001
+                call Hx8347.writeReg(pLcdBase, HX8347_R3BH, 0x01); // P_RTN=0000, P_NW=001
+                call Hx8347.writeReg(pLcdBase, HX8347_R3CH, 0xF0); // I_RTN=1111, I_NW=000
+                call Hx8347.writeReg(pLcdBase, HX8347_R3DH, 0x00); // DIV=00
+                call Hx8347.writeReg(pLcdBase, HX8347_R3EH, 0x38); // SON=38h
+                call Hx8347.writeReg(pLcdBase, HX8347_R40H, 0x0F); // GDON=0Fh
+                call Hx8347.writeReg(pLcdBase, HX8347_R41H, 0xF0); // GDOF=F0h
+                initState = INIT0;
+                signal Hx8347.initializeDone(SUCCESS);
+                break;
+        }
+    }
+
+
+    event void OnTimer.fired()
+    {
+        call Hx8347.on(spLcdBase);
+    }
+    /**
+     * Turn on the LCD.
+     * \param pLcdBase   LCD base address.
+     */
+    command void Hx8347.on(void *pLcdBase)
+    {
+        switch(onState)
+        {
+            case ON0:
+                // Display ON Setting
+                spLcdBase = pLcdBase;
+                call Hx8347.writeReg(pLcdBase, HX8347_R90H, 0x7F); // SAP=0111 1111
+                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x04); // GON=0, DTE=0, D=01
+                call OnTimer.startOneShot(100);
+                onState = ON1;
+                break;
+
+            case ON1:
+                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x24); // GON=1, DTE=0, D=01
+                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x2C); // GON=1, DTE=0, D=11
+                call OnTimer.startOneShot(100);
+                onState = ON2;
+                break;
+
+            case ON2:
+                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x3C); // GON=1, DTE=1, D=11
+                onState = ON0;
+                signal Hx8347.onDone();
+                break;
+        }
+    }
+
+    /**
+     * Turn off the LCD.
+     * \param pLcdBase   LCD base address.
+     */
+    async command void Hx8347.off(void *pLcdBase)
+    {
+        call Hx8347.writeReg(pLcdBase, HX8347_R90H, 0x00); // SAP=0000 0000
+        call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x00); // GON=0, DTE=0, D=00
+    }
+
+    /**
+     * Set cursor of LCD srceen.
+     * \param pLcdBase   LCD base address.
+     * \param x          X-coordinate of upper-left corner on LCD.
+     * \param y          Y-coordinate of upper-left corner on LCD.
+     */
+    async command void Hx8347.setCursor(void *pLcdBase, uint16_t x, uint16_t y)
+    {
+        uint8_t x1, x2, y1l, y2;
+
+        x1 = x & 0xff;
+        x2 = (x & 0xff00) >>8;
+        y1l = y & 0xff;
+        y2 = (y & 0xff00) >>8;
+        call Hx8347.writeReg(pLcdBase, HX8347_R02H, x2); // column high
+        call Hx8347.writeReg(pLcdBase, HX8347_R03H, x1); // column low
+        call Hx8347.writeReg(pLcdBase, HX8347_R06H, y2); // row high
+        call Hx8347.writeReg(pLcdBase, HX8347_R07H, y1l); // row low
+    }
+
+    default event void Hx8347.initializeDone(error_t err) {};
+    default event void Hx8347.onDone() {};
+}
diff --git a/tos/platforms/sam3s_ek/lcd/Ili9325.nc b/tos/platforms/sam3s_ek/lcd/Ili9325.nc
new file mode 100644
index 00000000..dc78cc94
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/Ili9325.nc
@@ -0,0 +1,53 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+
+interface Ili9325 
+{
+    async command void writeReg(void *pLcdBase, uint8_t reg, uint16_t data);
+    async command uint16_t readReg(void *pLcdBase, uint8_t reg);
+    async command void writeRAM_Prepare(void *pLcdBase);
+    async command void writeRAM(void *pLcdBase, uint32_t color);
+    async command void readRAM_Prepare(void *pLcdBase);
+    async command uint16_t readRAM(void *pLcdBase);
+    command void initialize(void *pLcdBase);
+    event void initializeDone(error_t err);
+    async command void setCursor(void *pLcdBase, uint16_t x, uint16_t y);
+    command void on(void *pLcdBase);
+    async command void off(void *pLcdBase);
+    async command void powerDown(void *pLcdBase);
+    async command void setDisplayPortrait(void *pLcdBase, uint32_t dwRGB);
+    async command void setWindow( void *pLcdBase, uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight );
+}
diff --git a/tos/platforms/sam3s_ek/lcd/Ili9325C.nc b/tos/platforms/sam3s_ek/lcd/Ili9325C.nc
new file mode 100755
index 00000000..f5e25275
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/Ili9325C.nc
@@ -0,0 +1,362 @@
+/*
+ * Copyright (c) 2011 University of Utah.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * COPYRIGHT HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "ili9325.h"
+
+module Ili9325C
+{
+    uses
+    {
+        interface Timer<TMilli> as InitTimer;
+    }
+
+    provides interface Ili9325;
+}
+implementation
+{
+
+    enum {
+        INIT0,
+        INIT1,
+        INIT2,
+        INIT3,
+        INIT4,
+    };
+
+    void* spLcdBase;
+
+    uint8_t initState = INIT0;
+    /**
+     * \brief Write data to LCD Register.
+     *
+     * \param reg   Register address.
+     * \param data  Data to be written.
+     */
+    async command void Ili9325.writeReg( void *pLcdBase, uint8_t reg, uint16_t data )
+    {
+        LCD_IR(pLcdBase) = 0;
+        LCD_IR(pLcdBase) = reg;
+        LCD_D(pLcdBase)  = (data >> 8) & 0xFF;
+        LCD_D(pLcdBase)  = data & 0xFF;
+    }
+
+    /**
+     * \brief Read data from LCD Register.
+     *
+     * \param reg   Register address.
+     *
+     * \return      Readed data.
+     */
+    async command uint16_t Ili9325.readReg(void *pLcdBase,  uint8_t reg )
+    {
+        uint16_t value;
+
+        LCD_IR(pLcdBase) = 0;
+        LCD_IR(pLcdBase) = reg;
+
+        value = LCD_D(pLcdBase);
+        value = (value << 8) | LCD_D(pLcdBase);
+
+        return value;
+    }
+
+
+    /**
+     * \brief Prepare to write GRAM data.
+     */
+    async command void Ili9325.writeRAM_Prepare( void *pLcdBase)
+    {
+        LCD_IR(pLcdBase) = 0 ;
+        LCD_IR(pLcdBase) = ILI9325_R22H ; /* Write Data to GRAM (R22h)  */
+    }
+
+    /**
+     * \brief Write data to LCD GRAM.
+     *
+     * \param color  24-bits RGB color.
+     */
+    async command void Ili9325.writeRAM(void *pLcdBase, uint32_t dwColor )
+    {
+        LCD_D(pLcdBase) = ((dwColor >> 16) & 0xFF);
+        LCD_D(pLcdBase) = ((dwColor >> 8) & 0xFF);
+        LCD_D(pLcdBase) = (dwColor & 0xFF);
+    }
+
+    /**
+     * \brief Prepare to read GRAM data.
+     */
+    async command void Ili9325.readRAM_Prepare( void *pLcdBase)
+    {
+        LCD_IR(pLcdBase) = 0 ;
+        LCD_IR(pLcdBase) = ILI9325_R22H ; /* Write Data to GRAM (R22h)  */
+    }
+
+    /**
+     * \brief Read data to LCD GRAM.
+     *
+     * \return color  24-bits RGB color.
+     */
+    async command uint16_t Ili9325.readRAM( void *pLcdBase)
+    {
+        uint8_t value[2];
+        uint16_t color;
+
+        value[0] = LCD_D(pLcdBase);       /* dummy read */
+        value[1] = LCD_D(pLcdBase);       /* dummy read */
+        value[0] = LCD_D(pLcdBase);       /* data upper byte */
+        value[1] = LCD_D(pLcdBase);       /* data lower byte */
+
+        color = ((value[0] << 8) | (value[1] & 0xff)); 
+        return color;
+    }
+
+    /**
+     * \brief Initialize the LCD controller.
+     */
+    command void Ili9325.initialize( void *pLcdBase)
+    {
+        uint16_t chipid ;
+
+        switch(initState)
+        {
+            case INIT0:
+
+                spLcdBase = pLcdBase;
+
+                /* Check ILI9325 chipid */
+                chipid = call Ili9325.readReg(pLcdBase, ILI9325_R00H ) ; /* Driver Code Read (R00h) */
+                if ( chipid != ILI9325_DEVICE_CODE )
+                {
+                    signal Ili9325.initializeDone(FAIL);
+                    return;
+                }
+
+                /* Turn off LCD */
+                call Ili9325.powerDown(pLcdBase) ;
+
+                /* Start initial sequence */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R10H, 0x0000); /* DSTB = LP = STB = 0 */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R00H, 0x0001); /* start internal OSC */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R01H, ILI9325_R01H_SS ) ; /* set SS and SM bit */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R02H, 0x0700); /* set 1 line inversion */
+                //LCD_writeReg(ILI9325_R03H, 0xD030); /* set GRAM write direction and BGR=1. */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R04H, 0x0000); /* Resize register */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R08H, 0x0207); /* set the back porch and front porch */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R09H, 0x0000); /* set non-display area refresh cycle ISC[3:0] */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R0AH, 0x0000); /* FMARK function */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R0CH, 0x0000); /* RGB interface setting */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R0DH, 0x0000); /* Frame marker Position */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R0FH, 0x0000); /* RGB interface polarity */
+
+                /* Power on sequence */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R10H, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R11H, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R12H, 0x0000); /* VREG1OUT voltage */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R13H, 0x0000); /* VDV[4:0] for VCOM amplitude */
+
+                initState = INIT1;
+                call InitTimer.startOneShot(200);
+                break;
+                
+            case INIT1:
+
+                call Ili9325.writeReg(pLcdBase, ILI9325_R10H, 0x1290); /* SAP, BT[3:0], AP, DSTB, SLP, STB */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R11H, 0x0227); /* DC1[2:0], DC0[2:0], VC[2:0] */
+
+                initState = INIT2;
+                call InitTimer.startOneShot(50);
+                break;
+
+            case INIT2:
+                call Ili9325.writeReg(pLcdBase, ILI9325_R12H, 0x001B); /* Internal reference voltage= Vci; */
+                initState = INIT3;
+                call InitTimer.startOneShot(50);
+                break;
+
+            case INIT3:
+
+                call Ili9325.writeReg(pLcdBase, ILI9325_R13H, 0x1100); /* Set VDV[4:0] for VCOM amplitude */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R29H, 0x0019); /* Set VCM[5:0] for VCOMH */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R2BH, 0x000D); /* Set Frame Rate */
+                initState = INIT4;
+                call InitTimer.startOneShot(50);
+                break;
+
+            case INIT4:
+
+                /* Adjust the Gamma Curve */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R30H, 0x0000);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R31H, 0x0204);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R32H, 0x0200);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R35H, 0x0007);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R36H, 0x1404);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R37H, 0x0705);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R38H, 0x0305);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R39H, 0x0707);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R3CH, 0x0701);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R3DH, 0x000e);
+
+                call Ili9325.setDisplayPortrait(pLcdBase, 0);
+
+                /* Vertical Scrolling */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R61H, 0x0001 ) ;
+                call Ili9325.writeReg(pLcdBase, ILI9325_R6AH, 0x0000 ) ;
+
+                /* Partial Display Control */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R80H, 0x0000);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R81H, 0x0000);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R82H, 0x0000);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R83H, 0x0000);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R84H, 0x0000);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R85H, 0x0000);
+
+                /* Panel Control */
+                call Ili9325.writeReg(pLcdBase, ILI9325_R90H, 0x0010);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R92H, 0x0600);
+                call Ili9325.writeReg(pLcdBase, ILI9325_R95H, 0x0110);
+
+                call Ili9325.setWindow( pLcdBase, 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ;
+                call Ili9325.setCursor( pLcdBase, 0, 0 ) ;
+                initState = INIT0;
+                signal Ili9325.initializeDone(SUCCESS);
+                break;
+        }
+    }
+
+    event void InitTimer.fired()
+    {
+        call Ili9325.initialize(spLcdBase);
+    }
+
+    /**
+     * \brief Turn on the LCD.
+     */
+    command void Ili9325.on( void *pLcdBase )
+    {
+        /* Display Control 1 (R07h) */
+        /* When BASEE = “1”, the base image is displayed. */
+        /* GON and DTE Set the output level of gate driver G1 ~ G320 : Normal Display */
+        /* D1=1 D0=1 BASEE=1: Base image display Operate */
+        call Ili9325.writeReg(pLcdBase, ILI9325_R07H,   ILI9325_R07H_BASEE
+                | ILI9325_R07H_GON | ILI9325_R07H_DTE
+                | ILI9325_R07H_D1  | ILI9325_R07H_D0 ) ;
+    }
+
+
+    /**
+     * \brief Turn off the LCD.
+     */
+    async command void Ili9325.off( void *pLcdBase)
+    {
+        /* Display Control 1 (R07h) */
+        /* When BASEE = “0”, no base image is displayed. */
+        /* When the display is turned off by setting D[1:0] = “00”, the ILI9325 internal display
+           operation is halted completely. */
+        /* PTDE1/0 = 0: turns off partial image. */
+        call Ili9325.writeReg(pLcdBase, ILI9325_R07H, 0x00 ) ;
+    }
+
+    /**
+     * \brief Power down the LCD.
+     */
+    async command void Ili9325.powerDown( void *pLcdBase)
+    {
+        /* Display Control 1 (R07h) */
+        /* When BASEE = “0”, no base image is displayed. */
+        /* GON and DTE Set the output level of gate driver G1 ~ G320 : Normal Display */
+        /* D1=1 D0=1 BASEE=1: Base image display Operate */
+        call Ili9325.writeReg(pLcdBase, ILI9325_R07H,   ILI9325_R07H_GON | ILI9325_R07H_DTE
+                | ILI9325_R07H_D1  | ILI9325_R07H_D0 ) ;
+    }
+
+    /**
+     * \brief Set cursor of LCD srceen.
+     *
+     * \param x  X-coordinate of upper-left corner on LCD.
+     * \param y  Y-coordinate of upper-left corner on LCD.
+     */
+    async command void Ili9325.setCursor( void *pLcdBase, uint16_t x, uint16_t y )
+    {
+        /* GRAM Horizontal/Vertical Address Set (R20h, R21h) */
+        call Ili9325.writeReg(pLcdBase, ILI9325_R20H, x ) ; /* column */
+        call Ili9325.writeReg(pLcdBase, ILI9325_R21H, y ) ; /* row */
+    }
+
+    async command void Ili9325.setDisplayPortrait(void *pLcdBase, uint32_t dwRGB)
+    {
+        uint16_t dwValue = 0 ;
+
+        /* When AM = “1”, the address is updated in vertical writing direction. */
+        /* DFM Set the mode of transferring data to the internal RAM when TRI = “1”. */
+        /* When TRI = “1”, data are transferred to the internal RAM in 8-bit x 3 transfers mode via the 8-bit interface. */
+        /* Use the high speed write mode (HWM=1) */
+        /* ORG = “1”: The original address “00000h” moves according to the I/D[1:0] setting.  */
+        /* I/D[1:0] = 00 Horizontal : decrement Vertical :  decrement, AM=0:Horizontal */
+        dwValue = ILI9325_R03H_AM | ILI9325_R03H_DFM | ILI9325_R03H_TRI | ILI9325_R03H_HWM; //| ILI9325_R03H_ORG ;
+
+        if ( dwRGB == 0 )
+        {
+            /* BGR=”1”: Swap the RGB data to BGR in writing into GRAM. */
+            dwValue |= ILI9325_R03H_BGR ;
+        }
+        call Ili9325.writeReg(pLcdBase,  ILI9325_R03H, dwValue ) ;
+
+        //    LCD_WriteReg( ILI9325_R60H, (0x1d<<8)|0x00 ) ; /*Gate Scan Control */
+
+        call Ili9325.setWindow( pLcdBase, 0, 0, BOARD_LCD_HEIGHT, BOARD_LCD_WIDTH ) ;
+
+    }
+
+    async command void Ili9325.setWindow( void *pLcdBase, uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight )
+    {
+        /* Horizontal and Vertical RAM Address Position (R50h, R51h, R52h, R53h) */
+
+        /* Set Horizontal Address Start Position */
+        call Ili9325.writeReg( pLcdBase, ILI9325_R50H, (uint16_t)dwX ) ;
+
+        /* Set Horizontal Address End Position */
+        call Ili9325.writeReg( pLcdBase, ILI9325_R51H, (uint16_t)dwX+dwWidth-1 ) ;
+
+        /* Set Vertical Address Start Position */
+        call Ili9325.writeReg( pLcdBase, ILI9325_R52H, (uint16_t)dwY ) ;
+
+        /* Set Vertical Address End Position */
+        call Ili9325.writeReg( pLcdBase, ILI9325_R53H, (uint16_t)dwY+dwHeight-1 ) ;
+    }
+
+    default event void Ili9325.initializeDone(error_t err) {};
+}
diff --git a/tos/platforms/sam3s_ek/lcd/Lcd.nc b/tos/platforms/sam3s_ek/lcd/Lcd.nc
new file mode 100644
index 00000000..2440c756
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/Lcd.nc
@@ -0,0 +1,53 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+
+interface Lcd
+{
+    command void initialize();
+
+    event void initializeDone(error_t err);
+
+    command void * displayBuffer(void *pBuffer);
+    
+    command void start();
+
+    event void startDone();
+    
+    command void stop();
+
+    command void setBacklight (uint8_t step);
+}
+
diff --git a/tos/platforms/sam3s_ek/lcd/LcdC.nc b/tos/platforms/sam3s_ek/lcd/LcdC.nc
new file mode 100644
index 00000000..4765583f
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/LcdC.nc
@@ -0,0 +1,77 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+
+configuration LcdC
+{
+    provides
+    {
+        interface Lcd;
+        interface Draw;
+    }
+}
+implementation
+{
+    
+    components LcdP, Ili9325C;
+
+    Lcd = LcdP.Lcd;
+    Draw = LcdP.Draw;
+
+    LcdP.Ili9325 -> Ili9325C;
+
+    components new TimerMilliC() as T0;
+    Ili9325C.InitTimer -> T0;
+
+    components HplSam3sGeneralIOC;
+    LcdP.DB0 -> HplSam3sGeneralIOC.HplPioC0;
+    LcdP.DB1 -> HplSam3sGeneralIOC.HplPioC1;
+    LcdP.DB2 -> HplSam3sGeneralIOC.HplPioC2;
+    LcdP.DB3 -> HplSam3sGeneralIOC.HplPioC3;
+    LcdP.DB4 -> HplSam3sGeneralIOC.HplPioC4;
+    LcdP.DB5 -> HplSam3sGeneralIOC.HplPioC5;
+    LcdP.DB6 -> HplSam3sGeneralIOC.HplPioC6;
+    LcdP.DB7 -> HplSam3sGeneralIOC.HplPioC7;
+
+    LcdP.LCD_RS -> HplSam3sGeneralIOC.HplPioC19;
+    LcdP.NRD    -> HplSam3sGeneralIOC.HplPioC11;
+    LcdP.NWE    -> HplSam3sGeneralIOC.HplPioC8;
+    LcdP.NCS   -> HplSam3sGeneralIOC.HplPioC15;
+
+    LcdP.Backlight -> HplSam3sGeneralIOC.PioC13;
+
+    components HplSam3sClockC;
+    LcdP.ClockControl -> HplSam3sClockC.SMCCntl;
+}
diff --git a/tos/platforms/sam3s_ek/lcd/LcdP.nc b/tos/platforms/sam3s_ek/lcd/LcdP.nc
new file mode 100644
index 00000000..7f55dd7e
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/LcdP.nc
@@ -0,0 +1,533 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+#include <sam3smchardware.h>
+#include "lcd.h"
+#include "color.h"
+#include "font.h"
+#include "font10x14.h"
+
+module LcdP
+{
+    uses {
+        interface Ili9325;
+
+        interface HplSam3GeneralIOPin as DB0;
+        interface HplSam3GeneralIOPin as DB1;
+        interface HplSam3GeneralIOPin as DB2;
+        interface HplSam3GeneralIOPin as DB3;
+        interface HplSam3GeneralIOPin as DB4;
+        interface HplSam3GeneralIOPin as DB5;
+        interface HplSam3GeneralIOPin as DB6;
+        interface HplSam3GeneralIOPin as DB7;
+        interface HplSam3GeneralIOPin as LCD_RS;
+        interface HplSam3GeneralIOPin as NRD;
+        interface HplSam3GeneralIOPin as NWE;
+        interface HplSam3GeneralIOPin as NCS;
+
+        interface GeneralIO as Backlight;
+
+        interface HplSam3PeripheralClockCntl as ClockControl;
+    }
+    provides 
+    {
+        interface Lcd;
+        interface Draw;
+    }
+}
+implementation
+{
+
+#define RGB24ToRGB16(color) (((color >> 8) & 0xF800) | \
+        ((color >> 5) & 0x7E0) | \
+        ((color >> 3) & 0x1F))
+#define BOARD_LCD_BASE   0x61000000
+
+    const Font gFont = {10, 14};
+
+    /**
+     * Initializes the LCD controller.
+     * \param pLcdBase   LCD base address.
+     */
+    command void Lcd.initialize(void)
+    {
+        smc_setup_t setup;
+        smc_pulse_t pulse;
+        smc_cycle_t cycle;
+        smc_mode_t  mode;
+
+        // Enable pins
+        call DB0.disablePioControl();
+        call DB0.selectPeripheralA();
+        call DB0.enablePullUpResistor();
+        call DB1.disablePioControl();
+        call DB1.selectPeripheralA();
+        call DB1.enablePullUpResistor();
+        call DB2.disablePioControl();
+        call DB2.selectPeripheralA();
+        call DB2.enablePullUpResistor();
+        call DB3.disablePioControl();
+        call DB3.selectPeripheralA();
+        call DB3.enablePullUpResistor();
+        call DB4.disablePioControl();
+        call DB4.selectPeripheralA();
+        call DB4.enablePullUpResistor();
+        call DB5.disablePioControl();
+        call DB5.selectPeripheralA();
+        call DB5.enablePullUpResistor();
+        call DB6.disablePioControl();
+        call DB6.selectPeripheralA();
+        call DB6.enablePullUpResistor();
+        call DB7.disablePioControl();
+        call DB7.selectPeripheralA();
+        call DB7.enablePullUpResistor();
+
+        call LCD_RS.disablePioControl();
+        call LCD_RS.selectPeripheralA();
+        call LCD_RS.enablePullUpResistor();
+
+        call NRD.disablePioControl();
+        call NRD.selectPeripheralA();
+        call NRD.enablePullUpResistor();
+        call NWE.disablePioControl();
+        call NWE.selectPeripheralA();
+        call NWE.enablePullUpResistor();
+        call NCS.disablePioControl();
+        call NCS.selectPeripheralA();
+        call NCS.enablePullUpResistor();
+
+        // Enable peripheral clock
+        call ClockControl.enable();
+
+        // Enable pins
+        call Backlight.makeOutput();
+
+        // EBI SMC Configuration
+        setup.flat              = 0;
+        setup.bits.nwe_setup    = 2;
+        setup.bits.ncs_wr_setup = 2;
+        setup.bits.nrd_setup    = 2;
+        setup.bits.ncs_rd_setup = 2;
+        SMC_CS1->setup = setup;
+
+        pulse.flat              = 0;
+        pulse.bits.nwe_pulse    = 4;
+        pulse.bits.ncs_wr_pulse = 4;
+        pulse.bits.nrd_pulse    = 10;
+        pulse.bits.ncs_rd_pulse = 10;
+        SMC_CS1->pulse = pulse;
+
+        cycle.flat           = 0;
+        cycle.bits.nwe_cycle = 10;
+        cycle.bits.nrd_cycle = 22;
+        SMC_CS1->cycle = cycle;
+
+        mode.bits.read_mode = 1;
+        mode.bits.write_mode = 1;
+        mode.bits.dbw = 0; // 8-bit operations
+        mode.bits.pmen = 0;
+        SMC_CS1->mode = mode;
+
+        // Initialize LCD controller (HX8347)
+        call Ili9325.initialize((void *)BOARD_LCD_BASE);
+
+    }
+
+    event void Ili9325.initializeDone(error_t err)
+    {
+        if(err == SUCCESS)
+            call Lcd.setBacklight(25);
+        signal Lcd.initializeDone(err);
+    }
+
+    /**
+     * Turn on the LCD
+     */
+    command void Lcd.start(void)
+    {
+        call Ili9325.on((void *)BOARD_LCD_BASE);
+        signal Lcd.startDone();
+    }
+
+    /**
+     * Turn off the LCD
+     */
+    command void Lcd.stop(void)
+    {
+        call Ili9325.off((void *)BOARD_LCD_BASE);
+    }
+
+    /**
+     * Set the backlight of the LCD.
+     * \param level   Backlight brightness level [1..32], 32 is maximum level.
+     */
+    command void Lcd.setBacklight (uint8_t level)
+    {
+        uint32_t i;
+
+        // Switch off backlight
+        call Backlight.clr();
+        i = 800 * (48000000 / 1000000);    // wait for at least 500us
+        while(i--);
+
+        // Set new backlight level
+        for (i = 0; i < level; i++) {
+
+
+            call Backlight.clr();
+            call Backlight.clr();
+            call Backlight.clr();
+
+            call Backlight.set();
+            call Backlight.set();
+            call Backlight.set();
+        }
+    }
+
+    command void* Lcd.displayBuffer(void* pBuffer)
+    {
+        return (void *) BOARD_LCD_BASE;
+    }
+
+    /**
+     * Fills the given LCD buffer with a particular color.
+     * Only works in 24-bits packed mode for now.
+     * \param color  Fill color.
+     */
+    async command void Draw.fill(uint32_t color)
+    {
+        uint32_t i;
+
+        call Ili9325.setCursor((void *)BOARD_LCD_BASE, 0, 0);
+        call Ili9325.writeRAM_Prepare((void *)BOARD_LCD_BASE);
+        for (i = 0; i < (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT); i++) {
+
+            call Ili9325.writeRAM((void *)BOARD_LCD_BASE, color);
+        }
+    }
+
+    /**
+     * Sets the specified pixel to the given color.
+     * !!! Only works in 24-bits packed mode for now. !!!
+     * \param x  X-coordinate of pixel.
+     * \param y  Y-coordinate of pixel.
+     * \param color  Pixel color.
+     */
+    async command void Draw.drawPixel(
+            uint32_t x,
+            uint32_t y,
+            uint32_t color)
+    {
+        void* pBuffer = (void*)BOARD_LCD_BASE;
+
+        call Ili9325.setCursor(pBuffer, BOARD_LCD_WIDTH - x, y);
+        call Ili9325.writeRAM_Prepare(pBuffer);
+        call Ili9325.writeRAM(pBuffer, color);
+    }
+
+    /**
+     * Draws a rectangle inside a LCD buffer, at the given coordinates.
+     * \param x  X-coordinate of upper-left rectangle corner.
+     * \param y  Y-coordinate of upper-left rectangle corner.
+     * \param width  Rectangle width in pixels.
+     * \param height  Rectangle height in pixels.
+     * \param color  Rectangle color.
+     */
+    async command void Draw.drawRectangle(
+            uint32_t x,
+            uint32_t y,
+            uint32_t width,
+            uint32_t height,
+            uint32_t color)
+    {
+        uint32_t rx, ry;
+
+        for (ry=0; ry < height; ry++) {
+
+            for (rx=0; rx < width; rx++) {
+
+                call Draw.drawPixel(x+rx, y+ry, color);
+            }
+        }
+    }
+    /**
+     * Draws a string inside a LCD buffer, at the given coordinates. Line breaks
+     * will be honored.
+     * \param x  X-coordinate of string top-left corner.
+     * \param y  Y-coordinate of string top-left corner.
+     * \param pString  String to display.
+     * \param color  String color.
+     */
+    async command void Draw.drawString(
+            uint32_t x,
+            uint32_t y,
+            const char *pString,
+            uint32_t color)
+    {
+        uint32_t xorg = x;
+
+        while (*pString != 0) {
+            if (*pString == '\n') {
+
+                y += gFont.height + 2;
+                x = xorg;
+            }
+            else {
+
+                call Draw.drawChar(x, y, *pString, color);
+                x += gFont.width + 2;
+            }
+            pString++;
+        }
+    }
+
+    /**
+     * Draws a string inside a LCD buffer, at the given coordinates. Line breaks
+     * will be honored.
+     * \param x  X-coordinate of string top-left corner.
+     * \param y  Y-coordinate of string top-left corner.
+     * \param pString  String to display.
+     * \param color  String color.
+     */
+    async command void Draw.drawStringWithBGColor(
+            uint32_t x,
+            uint32_t y,
+            const char *pString,
+            uint32_t fontColor,
+            uint32_t bgColor)
+    {
+        uint32_t xorg = x;
+
+        while (*pString != 0) {
+            if (*pString == '\n') {
+
+                y += gFont.height + 2;
+                x = xorg;
+            }
+            else {
+
+                call Draw.drawCharWithBGColor(x, y, *pString, fontColor, bgColor);
+                x += gFont.width + 2;
+            }
+            pString++;
+        }
+    }
+
+    /**
+     * Draws an integer inside the LCD buffer
+     * \param x X-Coordinate of the integers top-right corner.
+     * \param y Y-Coordinate of the integers top-right corner.
+     * \param n Number to be printed on the screen
+     * \param sign <0 if negative number, >=0 if positive
+     * \param fontColor Integer color.
+     */
+    async command void Draw.drawInt(
+            uint32_t x,
+            uint32_t y,
+            uint32_t n,
+            int8_t sign,
+            uint32_t fontColor)
+    {
+        uint8_t i;
+        i = 0;
+        do {       /* generate digits in reverse order */
+            char c = n % 10 + '0';   /* get next digit */
+            if (i%3 == 0 && i>0)
+            {
+                call Draw.drawChar(x, y, '\'', fontColor);
+                x -= (gFont.width + 2);
+            }
+            call Draw.drawChar(x, y, c, fontColor);
+            x -= (gFont.width + 2);
+            i++;
+        } while ((n /= 10) > 0);     /* delete it */
+        if (sign < 0)
+            call Draw.drawChar(x, y, '-', fontColor);
+    }
+
+    /**
+     * Draws an integer inside the LCD buffer
+     * \param x X-Coordinate of the integers top-right corner.
+     * \param y Y-Coordinate of the integers top-right corner.
+     * \param n Number to be printed on the screen
+     * \param sign <0 if negative number, >=0 if positive
+     * \param color Integer color.
+     * \param bgColor Color of the background.
+     */
+    async command void Draw.drawIntWithBGColor(
+            uint32_t x,
+            uint32_t y,
+            uint32_t n,
+            int8_t sign,
+            uint32_t fontColor,
+            uint32_t bgColor)
+    {
+        uint8_t i;
+        i = 0;
+        do {       /* generate digits in reverse order */
+            char c = n % 10 + '0';   /* get next digit */
+            if (i%3 == 0 && i>0)
+            {
+                call Draw.drawChar(x, y, '\'', fontColor);
+                x -= (gFont.width + 2);
+            }
+            call Draw.drawCharWithBGColor(x, y, c, fontColor, bgColor);
+            x -= (gFont.width + 2);
+            i++;
+        } while ((n /= 10) > 0);     /* delete it */
+        if (sign < 0)
+            call Draw.drawCharWithBGColor(x, y, '-', fontColor, bgColor);
+    }
+
+    /**
+     * Returns the width & height in pixels that a string will occupy on the screen
+     * if drawn using Draw.drawString.
+     * \param pString  String.
+     * \param pWidth  Pointer for storing the string width (optional).
+     * \param pHeight  Pointer for storing the string height (optional).
+     * \return String width in pixels.
+     */
+    async command void Draw.getStringSize(
+            const char *pString,
+            uint32_t *pWidth,
+            uint32_t *pHeight)
+    {
+        uint32_t width = 0;
+        uint32_t height = gFont.height;
+
+        while (*pString != 0) {
+
+            if (*pString == '\n') {
+
+                height += gFont.height + 2;
+            }
+            else {
+
+                width += gFont.width + 2;
+            }
+            pString++;
+        }
+
+        if (width > 0) width -= 2;
+
+        if (pWidth) *pWidth = width;
+        if (pHeight) *pHeight = height;
+    }
+
+    /**
+     * Draws an ASCII character on the given LCD buffer.
+     * \param x  X-coordinate of character upper-left corner.
+     * \param y  Y-coordinate of character upper-left corner.
+     * \param c  Character to output.
+     * \param color  Character color.
+     */
+    async command void Draw.drawChar(
+            uint32_t x,
+            uint32_t y,
+            char c,
+            uint32_t color)
+    {
+        uint32_t row, col;
+
+        if(!((c >= 0x20) && (c <= 0x7F)))
+        {
+            return;
+        }
+
+        for (col = 0; col < 10; col++) {
+
+            for (row = 0; row < 8; row++) {
+
+                if ((pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1) {
+
+                    call Draw.drawPixel(x+col, y+row, color);
+                }
+            }
+            for (row = 0; row < 6; row++) {
+
+                if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1) {
+
+                    call Draw.drawPixel(x+col, y+row+8, color);
+                }
+            }
+        }
+    }
+
+    /**
+     * Draws an ASCII character on the given LCD buffer.
+     * \param x  X-coordinate of character upper-left corner.
+     * \param y  Y-coordinate of character upper-left corner.
+     * \param c  Character to output.
+     * \param fontColor  Character foreground color.
+     * \param bgColor Background color of character
+     */
+    async command void Draw.drawCharWithBGColor(
+            uint32_t x,
+            uint32_t y,
+            char c,
+            uint32_t fontColor,
+            uint32_t bgColor)
+    {
+        uint32_t row, col;
+
+        if(!((c >= 0x20) && (c <= 0x7F)))
+        {
+            return;
+        }
+
+        for (col = 0; col < 10; col++) {
+
+            for (row = 0; row < 8; row++) {
+
+                if ((pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1) {
+
+                    call Draw.drawPixel(x+col, y+row, fontColor);
+                } else {
+                    call Draw.drawPixel(x+col, y+row, bgColor);
+                }
+            }
+            for (row = 0; row < 6; row++) {
+
+                if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1) {
+
+                    call Draw.drawPixel(x+col, y+row+8, fontColor);
+                } else {
+                    call Draw.drawPixel(x+col, y+row+8, bgColor);
+                }
+            }
+        }
+    }
+
+}
diff --git a/tos/platforms/sam3s_ek/lcd/color.h b/tos/platforms/sam3s_ek/lcd/color.h
new file mode 100644
index 00000000..f8054482
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/color.h
@@ -0,0 +1,134 @@
+/*
+ * Copyright (c) Atmel
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef COLOR_H
+#define COLOR_H
+
+//------------------------------------------------------------------------------
+/// RGB 24 Bpp
+/// RGB 888
+/// R7R6R5R4 R3R2R1R0 G7G6G5G4 G3G2G1G0 B7B6B5B4 B3B2B1B0
+//------------------------------------------------------------------------------
+#define COLOR_BLACK          0x000000
+#define COLOR_WHITE          0xFFFFFF
+
+#define COLOR_BLUE           0x0000FF
+#define COLOR_GREEN          0x00FF00
+#define COLOR_RED            0xFF0000
+
+#define COLOR_NAVY           0x000080
+#define COLOR_DARKBLUE       0x00008B
+#define COLOR_DARKGREEN      0x006400
+#define COLOR_DARKCYAN       0x008B8B
+#define COLOR_CYAN           0x00FFFF
+#define COLOR_TURQUOISE      0x40E0D0
+#define COLOR_INDIGO         0x4B0082
+#define COLOR_DARKRED        0x800000
+#define COLOR_OLIVE          0x808000
+#define COLOR_GRAY           0x808080
+#define COLOR_SKYBLUE        0x87CEEB
+#define COLOR_BLUEVIOLET     0x8A2BE2
+#define COLOR_LIGHTGREEN     0x90EE90
+#define COLOR_DARKVIOLET     0x9400D3
+#define COLOR_YELLOWGREEN    0x9ACD32
+#define COLOR_BROWN          0xA52A2A
+#define COLOR_DARKGRAY       0xA9A9A9
+#define COLOR_SIENNA         0xA0522D
+#define COLOR_LIGHTBLUE      0xADD8E6
+#define COLOR_GREENYELLOW    0xADFF2F
+#define COLOR_SILVER         0xC0C0C0
+#define COLOR_LIGHTGREY      0xD3D3D3
+#define COLOR_LIGHTCYAN      0xE0FFFF
+#define COLOR_VIOLET         0xEE82EE
+#define COLOR_AZUR           0xF0FFFF
+#define COLOR_BEIGE          0xF5F5DC
+#define COLOR_MAGENTA        0xFF00FF
+#define COLOR_TOMATO         0xFF6347
+#define COLOR_GOLD           0xFFD700
+#define COLOR_ORANGE         0xFFA500
+#define COLOR_SNOW           0xFFFAFA
+#define COLOR_YELLOW         0xFFFF00
+
+#endif // #define COLOR_H
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/tos/platforms/sam3s_ek/lcd/font.h b/tos/platforms/sam3s_ek/lcd/font.h
new file mode 100644
index 00000000..db551a63
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/font.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) Atmel
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef FONT_H
+#define FONT_H
+
+//------------------------------------------------------------------------------
+/// Describes the font (width, height, supported characters, etc.) used by
+/// the LCD driver draw API.
+//------------------------------------------------------------------------------
+typedef struct _Font {
+
+	/// Font width in pixels.
+	unsigned char width;
+	/// Font height in pixels.
+	unsigned char height;
+
+} Font;
+
+
+#endif //#ifndef FONT_H
diff --git a/tos/platforms/sam3s_ek/lcd/font10x14.h b/tos/platforms/sam3s_ek/lcd/font10x14.h
new file mode 100644
index 00000000..7109cd8a
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/font10x14.h
@@ -0,0 +1,235 @@
+/*
+ * Copyright (c) Atmel
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LCD_FONT_10x14_H
+#define LCD_FONT_10x14_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+const unsigned char pCharset10x14[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xCC,
+	0xFF, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x0C, 0xC0, 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0,
+	0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0,
+	0x0C, 0x60, 0x1E, 0x70, 0x3F, 0x30, 0x33, 0x30, 0xFF, 0xFC,
+	0xFF, 0xFC, 0x33, 0x30, 0x33, 0xF0, 0x39, 0xE0, 0x18, 0xC0,
+	0x60, 0x00, 0xF0, 0x0C, 0xF0, 0x3C, 0x60, 0xF0, 0x03, 0xC0,
+	0x0F, 0x00, 0x3C, 0x18, 0xF0, 0x3C, 0xC0, 0x3C, 0x00, 0x18,
+	0x3C, 0xF0, 0x7F, 0xF8, 0xC3, 0x1C, 0xC7, 0x8C, 0xCF, 0xCC,
+	0xDC, 0xEC, 0x78, 0x78, 0x30, 0x30, 0x00, 0xFC, 0x00, 0xCC,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xEC, 0x00,
+	0xF8, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x0F, 0xC0, 0x3F, 0xF0, 0x78, 0x78,
+	0x60, 0x18, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0x60, 0x18,
+	0x78, 0x78, 0x3F, 0xF0, 0x0F, 0xC0, 0x00, 0x00, 0x00, 0x00,
+	0x0C, 0x60, 0x0E, 0xE0, 0x07, 0xC0, 0x03, 0x80, 0x3F, 0xF8,
+	0x3F, 0xF8, 0x03, 0x80, 0x07, 0xC0, 0x0E, 0xE0, 0x0C, 0x60,
+	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3F, 0xF0,
+	0x3F, 0xF0, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
+	0x00, 0x44, 0x00, 0xEC, 0x00, 0xF8, 0x00, 0x70, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
+	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
+	0x00, 0x18, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x18, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x0C, 0x00, 0x3C, 0x00, 0xF0, 0x03, 0xC0,
+	0x0F, 0x00, 0x3C, 0x00, 0xF0, 0x00, 0xC0, 0x00, 0x00, 0x00,
+	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0xFC, 0xC1, 0xCC, 0xC3, 0x8C,
+	0xC7, 0x0C, 0xCE, 0x0C, 0xFC, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
+	0x00, 0x00, 0x00, 0x00, 0x30, 0x0C, 0x70, 0x0C, 0xFF, 0xFC,
+	0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
+	0x30, 0x0C, 0x70, 0x1C, 0xE0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC,
+	0xC1, 0xCC, 0xC3, 0x8C, 0xE7, 0x0C, 0x7E, 0x0C, 0x3C, 0x0C,
+	0x30, 0x30, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x7F, 0xF8, 0x3C, 0xF0,
+	0x03, 0xC0, 0x07, 0xC0, 0x0E, 0xC0, 0x1C, 0xC0, 0x38, 0xC0,
+	0x70, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xC0, 0x00, 0xC0,
+	0xFC, 0x30, 0xFC, 0x38, 0xCC, 0x1C, 0xCC, 0x0C, 0xCC, 0x0C,
+	0xCC, 0x0C, 0xCC, 0x0C, 0xCE, 0x1C, 0xC7, 0xF8, 0xC3, 0xF0,
+	0x3F, 0xF0, 0x7F, 0xF8, 0xE3, 0x1C, 0xC3, 0x0C, 0xC3, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x9C, 0x71, 0xF8, 0x30, 0xF0,
+	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC3, 0xFC,
+	0xC7, 0xFC, 0xCE, 0x00, 0xDC, 0x00, 0xF8, 0x00, 0xF0, 0x00,
+	0x3C, 0xF0, 0x7F, 0xF8, 0xE7, 0x9C, 0xC3, 0x0C, 0xC3, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
+	0x3C, 0x00, 0x7E, 0x00, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x1C,
+	0xC3, 0x38, 0xC3, 0x70, 0xE7, 0xE0, 0x7F, 0xC0, 0x3F, 0x80,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x60, 0x3C, 0xF0,
+	0x3C, 0xF0, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x44, 0x3C, 0xEC,
+	0x3C, 0xF8, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0,
+	0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0x00, 0x00,
+	0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
+	0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
+	0x00, 0x00, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x38, 0x70,
+	0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
+	0x30, 0x00, 0x70, 0x00, 0xE0, 0x00, 0xC0, 0x00, 0xC1, 0xEC,
+	0xC3, 0xEC, 0xC3, 0x00, 0xE6, 0x00, 0x7E, 0x00, 0x3C, 0x00,
+	0x30, 0xF0, 0x71, 0xF8, 0xE3, 0x9C, 0xC3, 0x0C, 0xC3, 0xFC,
+	0xC3, 0xFC, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
+	0x3F, 0xFC, 0x7F, 0xFC, 0xE0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0,
+	0xC0, 0xC0, 0xC0, 0xC0, 0xE0, 0xC0, 0x7F, 0xFC, 0x3F, 0xFC,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
+	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x30, 0x30,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
+	0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, 0xC0, 0x00, 0xC0, 0x00,
+	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x73, 0xF8, 0x33, 0xF0,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
+	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
+	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
+	0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x30, 0x00, 0x38, 0xC0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xC0, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0, 0xC0, 0x00, 0xC0, 0x00,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x07, 0x80, 0x07, 0x80, 0x0F, 0xC0,
+	0x1C, 0xE0, 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
+	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x70, 0x00, 0x38, 0x00, 0x1F, 0x00,
+	0x1F, 0x00, 0x38, 0x00, 0x70, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x1C, 0x00, 0x0E, 0x00, 0x07, 0x00,
+	0x03, 0x80, 0x01, 0xC0, 0x00, 0xE0, 0xFF, 0xFC, 0xFF, 0xFC,
+	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
+	0xC3, 0x00, 0xC3, 0x00, 0xE7, 0x00, 0x7E, 0x00, 0x3C, 0x00,
+	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0xCC,
+	0xC0, 0xEC, 0xC0, 0x7C, 0xE0, 0x38, 0x7F, 0xFC, 0x3F, 0xEC,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x80, 0xC3, 0x80,
+	0xC3, 0xC0, 0xC3, 0xC0, 0xE7, 0x70, 0x7E, 0x3C, 0x3C, 0x1C,
+	0x3C, 0x18, 0x7E, 0x1C, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x9C, 0xE1, 0xF8, 0x60, 0xF0,
+	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xFF, 0xFC,
+	0xFF, 0xFC, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
+	0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
+	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
+	0xFF, 0xC0, 0xFF, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
+	0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0xFF, 0xE0, 0xFF, 0xC0,
+	0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x3C, 0x00, 0xF8,
+	0x00, 0xF8, 0x00, 0x3C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
+	0xF0, 0x3C, 0xF8, 0x7C, 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80,
+	0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, 0xF8, 0x7C, 0xF0, 0x3C,
+	0xFC, 0x00, 0xFE, 0x00, 0x07, 0x00, 0x03, 0x80, 0x01, 0xFC,
+	0x01, 0xFC, 0x03, 0x80, 0x07, 0x00, 0xFE, 0x00, 0xFC, 0x00,
+	0xC0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, 0xC1, 0xCC, 0xC3, 0x8C,
+	0xC7, 0x0C, 0xCE, 0x0C, 0xDC, 0x0C, 0xF8, 0x0C, 0xF0, 0x0C,
+	0x00, 0x00, 0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C,
+	0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x30, 0x00, 0x30, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x03, 0x00,
+	0x03, 0x00, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0x30, 0x00, 0x30,
+	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x0C, 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x00, 0xE0, 0x00,
+	0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C, 0x00,
+	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
+	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
+	0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0xE0, 0x00, 0x70, 0x00,
+	0x38, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x30, 0x06, 0x78, 0x0E, 0xFC, 0x0C, 0xCC, 0x0C, 0xCC,
+	0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xCC, 0x07, 0xFC, 0x03, 0xF8,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C,
+	0x03, 0x0C, 0x03, 0x0C, 0x03, 0x9C, 0x01, 0xF8, 0x00, 0xF0,
+	0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
+	0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0x30,
+	0x00, 0xF0, 0x01, 0xF8, 0x03, 0x9C, 0x03, 0x0C, 0x03, 0x0C,
+	0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C, 0xFF, 0xFC, 0xFF, 0xFC,
+	0x03, 0xF0, 0x07, 0xF8, 0x0E, 0xDC, 0x0C, 0xCC, 0x0C, 0xCC,
+	0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xDC, 0x07, 0xD8, 0x03, 0x90,
+	0x00, 0x00, 0x03, 0x00, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x00,
+	0xE3, 0x00, 0x70, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
+	0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xDC, 0x0F, 0xF8, 0x07, 0xF0,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
+	0x03, 0x00, 0x03, 0x80, 0x01, 0xFC, 0x00, 0xFC, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1B, 0xFC,
+	0x1B, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x30, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C,
+	0x00, 0x0C, 0x00, 0x1C, 0xCF, 0xF8, 0xCF, 0xF0, 0x00, 0x00,
+	0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xE0, 0x01, 0xE0,
+	0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
+	0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
+	0x0F, 0xFC, 0x0F, 0xFC, 0x0E, 0x00, 0x07, 0x00, 0x03, 0xC0,
+	0x03, 0xC0, 0x07, 0x00, 0x0E, 0x00, 0x0F, 0xFC, 0x0F, 0xFC,
+	0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x00, 0x07, 0x00, 0x0E, 0x00,
+	0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0xFC, 0x03, 0xFC,
+	0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
+	0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0xF8, 0x03, 0xF0,
+	0x0F, 0xFC, 0x0F, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
+	0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00,
+	0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
+	0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xFC, 0x0F, 0xFC,
+	0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00,
+	0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0x00, 0x03, 0x00,
+	0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
+	0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xFC, 0x0E, 0x78, 0x06, 0x30,
+	0x00, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0xFF, 0xF0, 0xFF, 0xF8,
+	0x0C, 0x1C, 0x0C, 0x1C, 0x0C, 0x38, 0x0C, 0x30, 0x00, 0x00,
+	0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
+	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
+	0x0F, 0xC0, 0x0F, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
+	0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x0F, 0xE0, 0x0F, 0xC0,
+	0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0xF8,
+	0x00, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
+	0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0xF0, 0x01, 0xE0,
+	0x01, 0xE0, 0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C,
+	0x0C, 0x00, 0x0E, 0x00, 0x07, 0x0C, 0x03, 0x9C, 0x01, 0xF8,
+	0x01, 0xF0, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00, 0x0C, 0x00,
+	0x0C, 0x0C, 0x0C, 0x1C, 0x0C, 0x3C, 0x0C, 0x7C, 0x0C, 0xEC,
+	0x0D, 0xCC, 0x0F, 0x8C, 0x0F, 0x0C, 0x0E, 0x0C, 0x0C, 0x0C,
+	0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x3F, 0xF0, 0x7C, 0xF8,
+	0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00,
+	0x03, 0x0C, 0x03, 0x0C, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x0C,
+	0xC3, 0x0C, 0xC0, 0x0C, 0xE0, 0x0C, 0x70, 0x0C, 0x30, 0x0C,
+	0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C,
+	0x7C, 0xF8, 0x3F, 0xF0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
+	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
+	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC
+};
+
+
+#endif // #ifdef _LCD_FONT_10x14_h
diff --git a/tos/platforms/sam3s_ek/lcd/ili9325.h b/tos/platforms/sam3s_ek/lcd/ili9325.h
new file mode 100755
index 00000000..6f144bd6
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/ili9325.h
@@ -0,0 +1,158 @@
+/* ----------------------------------------------------------------------------
+ *         ATMEL Microcontroller Software Support
+ * ----------------------------------------------------------------------------
+ * Copyright (c) 2009, Atmel Corporation
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ * ----------------------------------------------------------------------------
+ */
+
+/**
+ * \file
+ *
+ * Interface of ILI9325 driver.
+ *
+ */
+
+#ifndef _ILI9325_
+#define _ILI9325_
+
+/*----------------------------------------------------------------------------
+ *        Headers
+ *----------------------------------------------------------------------------*/
+
+typedef uint32_t LcdColor_t ;
+
+/*----------------------------------------------------------------------------
+ *        Definitions
+ *----------------------------------------------------------------------------*/
+
+/* ILI9325 ID code */
+#define ILI9325_DEVICE_CODE    0x9325
+
+/* ILI9325 LCD Registers */
+#define ILI9325_R00H    0x00    /* Driver Code Read                 */
+#define ILI9325_R01H    0x01    /* Driver Output Control 1          */
+#define ILI9325_R01H_SS                ((uint16_t)0x0100)
+#define ILI9325_R01H_SM                ((uint16_t)0x0400)
+#define ILI9325_R02H    0x02    /* LCD Driving Control              */
+#define ILI9325_R03H    0x03    /* Entry Mode                       */
+#define ILI9325_R03H_AM                ((uint16_t)0x0008) /* AM Control the GRAM update direction */
+#define ILI9325_R03H_ID0               ((uint16_t)0x0010) /* I/D[1:0] Control the address counter  */
+#define ILI9325_R03H_ID1               ((uint16_t)0x0020)
+#define ILI9325_R03H_ORG               ((uint16_t)0x0080)
+#define ILI9325_R03H_HWM               ((uint16_t)0x0200)
+#define ILI9325_R03H_BGR               ((uint16_t)0x1000)
+#define ILI9325_R03H_DFM               ((uint16_t)0x4000)
+#define ILI9325_R03H_TRI               ((uint16_t)0x8000)
+#define ILI9325_R04H    0x04    /* Resize Control                   */
+#define ILI9325_R07H    0x07    /* Display Control 1                */
+#define ILI9325_R07H_D0                ((uint16_t)0x0001)
+#define ILI9325_R07H_D1                ((uint16_t)0x0002)
+#define ILI9325_R07H_CL                ((uint16_t)0x0008)
+#define ILI9325_R07H_DTE               ((uint16_t)0x0010)
+#define ILI9325_R07H_GON               ((uint16_t)0x0020)
+#define ILI9325_R07H_BASEE             ((uint16_t)0x0100)
+#define ILI9325_R07H_PTDE0             ((uint16_t)0x1000)
+#define ILI9325_R07H_PTDE1             ((uint16_t)0x2000)
+
+#define ILI9325_R08H    0x08    /* Display Control 2                */
+#define ILI9325_R09H    0x09    /* Display Control 3                */
+#define ILI9325_R0AH    0x0A    /* Display Control 4                */
+#define ILI9325_R0CH    0x0C    /* RGB Display Interface Control 1  */
+#define ILI9325_R0DH    0x0D    /* Frame Maker Position             */
+#define ILI9325_R0FH    0x0F    /* RGB Display Interface Control 2  */
+
+#define ILI9325_R10H    0x10    /* Power Control 1 */
+#define ILI9325_R11H    0x11    /* Power Control 2 */
+#define ILI9325_R12H    0x12    /* Power Control 3 */
+#define ILI9325_R13H    0x13    /* Power Control 4 */
+
+#define ILI9325_R20H    0x20    /* Horizontal GRAM Address Set  */
+#define ILI9325_R21H    0x21    /* Vertical  GRAM Address Set   */
+#define ILI9325_R22H    0x22    /* Write Data to GRAM           */
+#define ILI9325_R29H    0x29    /* Power Control 7              */
+#define ILI9325_R2BH    0x2B    /* Frame Rate and Color Control */
+
+#define ILI9325_R30H    0x30    /* Gamma Control 1  */
+#define ILI9325_R31H    0x31    /* Gamma Control 2  */
+#define ILI9325_R32H    0x32    /* Gamma Control 3  */
+#define ILI9325_R35H    0x35    /* Gamma Control 4  */
+#define ILI9325_R36H    0x36    /* Gamma Control 5  */
+#define ILI9325_R37H    0x37    /* Gamma Control 6  */
+#define ILI9325_R38H    0x38    /* Gamma Control 7  */
+#define ILI9325_R39H    0x39    /* Gamma Control 8  */
+#define ILI9325_R3CH    0x3C    /* Gamma Control 9  */
+#define ILI9325_R3DH    0x3D    /* Gamma Control 10 */
+
+#define ILI9325_R50H    0x50    /* Horizontal Address Start Position */
+#define ILI9325_R51H    0x51    /* Horizontal Address End Position   */
+#define ILI9325_R52H    0x52    /* Vertical Address Start Position   */
+#define ILI9325_R53H    0x53    /* Vertical Address End Position     */
+
+#define ILI9325_R60H    0x60    /* Driver Output Control 2    */
+#define ILI9325_R60H_GS                ((uint16_t)0x8000)
+#define ILI9325_R61H    0x61    /* Base Image Display Control */
+#define ILI9325_R6AH    0x6A    /* Vertical Scroll Control    */
+
+#define ILI9325_R80H    0x80    /* Partial Image 1 Display Position  */
+#define ILI9325_R81H    0x81    /* Partial Image 1 Area (Start Line) */
+#define ILI9325_R82H    0x82    /* Partial Image 1 Area (End Line)   */
+#define ILI9325_R83H    0x83    /* Partial Image 2 Display Position  */
+#define ILI9325_R84H    0x84    /* Partial Image 2 Area (Start Line) */
+#define ILI9325_R85H    0x85    /* Partial Image 2 Area (End Line)   */
+
+#define ILI9325_R90H    0x90    /* Panel Interface Control 1 */
+#define ILI9325_R92H    0x92    /* Panel Interface Control 2 */
+#define ILI9325_R95H    0x95    /* Panel Interface Control 4 */
+
+#define ILI9325_RA1H    0xA1    /* OTP VCM Programming Control */
+#define ILI9325_RA2H    0xA2    /* OTP VCM Status and Enable   */
+#define ILI9325_RA5H    0xA5    /* OTP Programming ID Key      */
+
+/*----------------------------------------------------------------------------
+ *        Types
+ *----------------------------------------------------------------------------*/
+
+typedef volatile uint8_t REG8;
+
+/*----------------------------------------------------------------------------
+ *        Marcos
+ *----------------------------------------------------------------------------*/
+
+#define BOARD_LCD_RS     (1 << 1)
+    // LCD index register address
+#define LCD_IR(baseAddr) (*((REG8 *)(baseAddr)))
+    // LCD status register address
+#define LCD_SR(baseAddr) (*((REG8 *)(baseAddr)))
+    // LCD data address
+#define LCD_D(baseAddr)  (*((REG8 *)((uint32_t)(baseAddr) + BOARD_LCD_RS)))
+
+
+#endif /* #ifndef ILI9325 */
diff --git a/tos/platforms/sam3s_ek/lcd/lcd.h b/tos/platforms/sam3s_ek/lcd/lcd.h
new file mode 100644
index 00000000..bf61d761
--- /dev/null
+++ b/tos/platforms/sam3s_ek/lcd/lcd.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LCD_H
+#define _LCD_H
+
+
+#define BOARD_LCD_HEIGHT 320
+#define BOARD_LCD_WIDTH  240
+
+
+#endif //_LCD_H
+
diff --git a/tos/platforms/sam3s_ek/platform.h b/tos/platforms/sam3s_ek/platform.h
new file mode 100644
index 00000000..2a551fed
--- /dev/null
+++ b/tos/platforms/sam3s_ek/platform.h
@@ -0,0 +1,5 @@
+/* No platform_bootstrap() needed,
+ * since memory system doesn't need configuration and
+ * the processor mode neither.
+ * (see TEP 107)
+ */
diff --git a/tos/platforms/sam3s_ek/platform_message.h b/tos/platforms/sam3s_ek/platform_message.h
new file mode 100644
index 00000000..81ada336
--- /dev/null
+++ b/tos/platforms/sam3s_ek/platform_message.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "Serial.h"
+
+typedef union message_header
+{
+	serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer
+{
+} message_footer_t;
+
+typedef union message_metadata
+{
+	serial_metadata_t serial;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/sam3s_ek/sam3s-ek-flash.x b/tos/platforms/sam3s_ek/sam3s-ek-flash.x
new file mode 100644
index 00000000..680fd2eb
--- /dev/null
+++ b/tos/platforms/sam3s_ek/sam3s-ek-flash.x
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Linker script to run code in Flash 0.
+ * Start-up code copies data into SRAM 0 and zeroes BSS segment.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ * @author Thomas Schmid
+ */
+
+/* Output format is always little endian, irrespective of -EL or -EB flags */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+/* Output architecture is ARM */
+OUTPUT_ARCH(arm)
+/* The first program instruction is the __init() start-up code */
+ENTRY(__init)
+
+/* The IRQ vector table is put at the beginning of SRAM 0 */
+/* We reserve 0x100 bytes by setting the SRAM 0 base address below accordingly */
+
+/* Stack at the end of SRAM */
+_estack = 0x2000bffc;
+
+/* Don't relocate the vector table */
+/*PROVIDE (__relocate_vector = 0);*/
+
+/* We have the SAM3S4C with 256K Flash and 48K SRAM. */
+MEMORY
+{
+	sram  (WRX) : org = 0x20000000, len = 0x0C000 /* SRAM, 48K */
+	flash (RX) : org = 0x00400000, len = 0x40000 /* Flash, 256K */
+}
+
+SECTIONS
+{
+	/* Text is linked into Flash 0 */
+	.text :
+	{
+		. = ALIGN(4);
+		_stext = .;
+        /* KEEP(*(.boot*)) */
+        KEEP(*(.vectors))
+        *(.init*)
+		*(.text*)
+        *(.fini*)
+		*(.rodata*)
+		*(.glue_7) /* ARM/Thumb interworking code */
+		*(.glue_7t) /* ARM/Thumb interworking code */
+		. = ALIGN(4);
+		_etext = .;
+	} > flash
+
+	/* Data will be loaded into RAM by start-up code */
+	.data : AT (_etext)
+	{
+		. = ALIGN(4);
+		_sdata = .;
+        _svect = .;
+        KEEP(*(.vectors)) /* Interrupt vector table in first 204 bytes */
+        _evect = .;
+		*(.ramfunc) /* functions linked into RAM */
+		*(.data.*)
+		*(.data)
+		. = ALIGN(4);
+		_edata = .;
+	} > sram
+
+	/* BSS will be zeroed by start-up code */
+	.bss (NOLOAD) : {
+		. = ALIGN(4);
+		_sbss = .;
+		*(.bss.*)
+		*(.bss)
+		. = ALIGN(4);
+	} > sram
+	/* _ebss should be inside .bss, but for some reason, it then is not defined
+	 * at the end of the BSS section. This leads to non-zeroed BSS data, since the
+	 * start-up code uses that symbol. For now, this workaround is OK and does no
+	 * harm.
+	 */
+	_ebss = .;
+}
+end = .;
diff --git a/tos/platforms/sam3s_ek/vectors.c b/tos/platforms/sam3s_ek/vectors.c
new file mode 100644
index 00000000..e386bf78
--- /dev/null
+++ b/tos/platforms/sam3s_ek/vectors.c
@@ -0,0 +1,281 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Startup code and interrupt and trap handlers for the SAM3U-EK board.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+/* Section symbols defined in linker script
+ * sam3u-ek-flash.x
+ */
+extern unsigned int _stext;
+extern unsigned int _etext;
+extern unsigned int _sdata;
+extern unsigned int _edata;
+extern unsigned int _svect;
+extern unsigned int _evect;
+extern unsigned int _sbss;
+extern unsigned int _ebss;
+extern unsigned int _estack;
+extern unsigned int __relocate_vector;
+
+/* main() symbol defined in RealMainP
+ */
+int main();
+
+/* Start-up code called upon reset.
+ * Definition see below.
+ */
+void __init();
+
+/* Default handler for any IRQ or fault
+ */
+void DefaultHandler()
+{
+	// do nothing, just return
+}
+
+/* Default Hardfault Handler
+ */
+void DefaultHardFaultHandler()
+{
+    while(1) {}
+}
+
+/* Default Mpu Fault Handler
+ */
+void DefaultMpuFaultHandler()
+{
+    while(1) {}
+}
+
+/* Default Bus Fault Handler
+ */
+void DefaultBusFaultHandler()
+{
+    while(1) {}
+}
+
+/* Default Usage Fault Handler
+ */
+void DefaultUsageFaultHandler()
+{
+    while(1) {}
+}
+
+/* By default, every exception and IRQ is handled by the default handler.
+ *
+ * If OWN_FUNCTIONS_FOR_HANDLERS is defined, then the internal IRQ and fault
+ * handlers will get a function of their own for debug purposes. Those
+ * functions are provided by weak aliases; thus, a regular handler
+ * definition will override this.
+ */
+#define OWN_FUNCTION_FOR_HANDLERS
+
+#ifdef OWN_FUNCTION_FOR_HANDLERS
+void NmiHandler() __attribute__((weak));
+void MpuFaultHandler() __attribute__((weak));
+void BusFaultHandler() __attribute__((weak));
+void UsageFaultHandler() __attribute__((weak));
+void SVCallHandler() __attribute__((weak));
+void DebugHandler() __attribute__((weak));
+void PendSVHandler() __attribute__((weak));
+void SysTickHandler() __attribute__((weak));
+void NmiHandler() { while(1) {} }
+void MpuFaultHandler() { while(1) {} }
+void BusFaultHandler() { while(1) {} }
+void UsageFaultHandler() { while(1) {} }
+void SVCallHandler() { while(1) {} }
+void DebugHandler() { while(1) {} }
+void PendSVHandler() { while(1) {} }
+void SysTickHandler() { while(1) {} }
+#else
+void NmiHandler() __attribute__((weak, alias("DefaultHandler")));
+void MpuFaultHandler() __attribute__((weak, alias("DefaultHandler")));
+void BusFaultHandler() __attribute__((weak, alias("DefaultHandler")));
+void UsageFaultHandler() __attribute__((weak, alias("DefaultHandler")));
+void SVCallHandler() __attribute__((weak, alias("DefaultHandler")));
+void DebugHandler() __attribute__((weak, alias("DefaultHandler")));
+void PendSVHandler() __attribute__((weak, alias("DefaultHandler")));
+void SysTickHandler() __attribute__((weak, alias("DefaultHandler")));
+#endif
+
+void HardFaultHandler() __attribute__((weak, alias("DefaultHardFaultHandler")));
+
+void SupcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void RstcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void RtcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void RttIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void WdtIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void PmcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void EefcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Uart0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Uart1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void SmcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void PioAIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void PioBIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void PioCIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Usart0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Usart1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void HsmciIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Twi0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Twi1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void SpiIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void SscIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void TC0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void TC1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void TC2IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void TC3IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void TC4IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void TC5IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void AdcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void DaccIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void PwmIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void CrccuIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void AccIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void UdpIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+
+/* Stick at the top of the .text section in final binary so we can always
+ *    jump back to the init routine at the top of the stack if we want */
+__attribute__((section(".boot"))) unsigned int *__boot[] = {
+    &_estack,
+    (unsigned int *) __init,
+};
+
+
+__attribute__((section(".vectors"))) unsigned int *__vectors[] = {
+	// Defined by Cortex-M3
+	// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 78
+	// See also The Definitive Guide to the ARM Cortex-M3, p. 331
+	&_estack,
+	(unsigned int *) __init,
+    (unsigned int *) NmiHandler,
+    (unsigned int *) HardFaultHandler,
+    (unsigned int *) MpuFaultHandler,
+    (unsigned int *) BusFaultHandler,
+	(unsigned int *) UsageFaultHandler,
+	(unsigned int *) 0, // Reserved
+	(unsigned int *) 0, // Reserved
+	(unsigned int *) 0, // Reserved
+	(unsigned int *) 0, // Reserved
+	(unsigned int *) SVCallHandler,
+	(unsigned int *) DebugHandler,
+	(unsigned int *) 0, // Reserved
+	(unsigned int *) PendSVHandler,
+	(unsigned int *) SysTickHandler,
+	// Defined by SAM3U MCU
+	// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 41
+	(unsigned int *) SupcIrqHandler,     // 0
+	(unsigned int *) RstcIrqHandler,     // 1
+	(unsigned int *) RtcIrqHandler,      // 2
+	(unsigned int *) RttIrqHandler,      // 3
+	(unsigned int *) WdtIrqHandler,      // 4
+	(unsigned int *) PmcIrqHandler,      // 5
+	(unsigned int *) EefcIrqHandler,     // 6
+	(unsigned int *) 0,                  // 7 Reserved
+	(unsigned int *) Uart0IrqHandler,    // 8
+	(unsigned int *) Uart1IrqHandler,    // 9
+	(unsigned int *) SmcIrqHandler,      // 10
+	(unsigned int *) PioAIrqHandler,     // 11
+	(unsigned int *) PioBIrqHandler,     // 12
+	(unsigned int *) PioCIrqHandler,     // 13
+	(unsigned int *) Usart0IrqHandler,   // 14
+	(unsigned int *) Usart1IrqHandler,   // 15
+	(unsigned int *) 0,                  // 16
+	(unsigned int *) 0,                  // 17
+	(unsigned int *) HsmciIrqHandler,    // 18
+	(unsigned int *) Twi0IrqHandler,     // 19
+	(unsigned int *) Twi1IrqHandler,     // 20
+	(unsigned int *) SpiIrqHandler,      // 21
+	(unsigned int *) SscIrqHandler,      // 22
+	(unsigned int *) TC0IrqHandler,      // 23
+	(unsigned int *) TC1IrqHandler,      // 24
+	(unsigned int *) TC2IrqHandler,      // 25
+	(unsigned int *) TC3IrqHandler,      // 26
+	(unsigned int *) TC4IrqHandler,      // 27
+	(unsigned int *) TC5IrqHandler,      // 28
+	(unsigned int *) AdcIrqHandler,      // 29
+	(unsigned int *) DaccIrqHandler,     // 30
+	(unsigned int *) PwmIrqHandler,      // 31
+	(unsigned int *) CrccuIrqHandler,    // 32
+	(unsigned int *) AccIrqHandler,      // 33
+	(unsigned int *) UdpIrqHandler       // 34
+};
+
+/* Start-up code to copy data into RAM
+ * and zero BSS segment
+ * and call main()
+ * and "exit"
+ */
+void __init()
+{
+	unsigned int *from;
+	unsigned int *to;
+	unsigned int *i;
+	volatile unsigned int *NVIC_VTOFFR = (volatile unsigned int *) 0xe000ed08;
+
+    if(0 && __relocate_vector)
+    {
+        // Configure location of IRQ vector table
+        // Vector table is in the beginning of text segment / Flash 0
+        i = (unsigned int *) &_svect;
+        *NVIC_VTOFFR = (unsigned int) i;
+        // Set TBLBASE bit since vector table located in SRAM
+        *NVIC_VTOFFR |= (1 << 29);
+    }
+
+	// Copy pre-initialized data into RAM.
+	// Data lies in Flash after the text segment (_etext),
+	// but is linked to be at _sdata.
+	// Thus, we have to copy it to that place in RAM.
+	from = &_etext;
+	to = &_sdata;
+	while (to < &_edata) {
+		*to = *from;
+		to++;
+		from++;
+	}
+
+	// Fill BSS data with 0
+	i = &_sbss;
+	while (i < &_ebss) {
+		*i = 0;
+		i++;
+	}
+
+	// Call main()
+	main();
+
+	// "Exit"
+	while (1);
+}
diff --git a/tos/platforms/sam3u_ek/.platform b/tos/platforms/sam3u_ek/.platform
new file mode 100644
index 00000000..7ef6c2cf
--- /dev/null
+++ b/tos/platforms/sam3u_ek/.platform
@@ -0,0 +1,108 @@
+# Copyright (c) 2011 University of Utah
+# All rights reserved.
+# 
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of the copyright holders nor the names of its
+#   contributors may be used to endorse or promote products derived
+#   from this software without specific prior written permission.
+# 
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+# HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+# WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+
+push ( @includes,
+  "%P/spi",
+  "%P/lcd",
+  "%P/chips/cc2420",
+  "%P/chips/sd",
+  "%P/chips/nandflash",
+  "%T/platforms/shimmer/chips/sd/fatfs",
+  "%T/chips/cortex/m3",
+  "%T/chips/cortex/m3/sam3",
+  "%T/chips/cortex/m3/sam3/u",
+  "%T/chips/cortex/m3/sam3/pins",
+  "%T/chips/cortex/m3/sam3/u/pins",
+  "%T/chips/cortex/m3/sam3/timer",
+  "%T/chips/cortex/m3/sam3/u/timer",
+  "%T/chips/cortex/m3/sam3/nvic",
+  "%T/chips/cortex/m3/sam3/u/nvic",
+  "%T/chips/cortex/m3/sam3/uart",
+  "%T/chips/cortex/m3/sam3/u/uart",
+  "%T/chips/cortex/m3/sam3/u/usart",
+  "%T/chips/cortex/m3/sam3/supc",
+  "%T/chips/cortex/m3/sam3/u/supc",
+  "%T/chips/cortex/m3/sam3/pmc",
+  "%T/chips/cortex/m3/sam3/u/pmc",
+  "%T/chips/cortex/m3/sam3/eefc",
+  "%T/chips/cortex/m3/sam3/u/eefc",
+  "%T/chips/cortex/m3/sam3/wdtc",
+  "%T/chips/cortex/m3/sam3/u/wdtc",
+  "%T/chips/cortex/m3/sam3/matrix",
+  "%T/chips/cortex/m3/sam3/u/matrix",
+  "%T/chips/cortex/m3/sam3/u/mpu",
+  "%T/chips/cortex/m3/sam3/u/spi",
+  "%T/chips/cortex/m3/sam3/smc",
+  "%T/chips/cortex/m3/sam3/u/smc",
+  "%T/chips/cortex/m3/sam3/u/adc12b",
+  "%T/chips/cortex/m3/sam3/u/dma",
+  "%T/chips/cortex/m3/sam3/pdc",
+  "%T/chips/cortex/m3/sam3/u/pdc",
+  "%T/chips/cortex/m3/sam3/u/twi",
+  "%T/chips/cortex/m3/sam3/u/hsmci",
+  "%T/chips/cortex/m3/sam3/u/usb",
+  "%T/chips/cortex/m3/sam3/u/usb/peripherals",
+  "%T/chips/cortex/m3/sam3/u/usb/board",
+  "%T/chips/cc2420",
+  "%T/chips/cc2420/alarm",
+  "%T/chips/cc2420/control",
+  "%T/chips/cc2420/csma",
+  "%T/chips/cc2420/interfaces",
+  "%T/chips/cc2420/link",
+  "%T/chips/cc2420/lowpan",
+  "%T/chips/cc2420/lpl",
+  "%T/chips/cc2420/packet",
+  "%T/chips/cc2420/receive",
+  "%T/chips/cc2420/spi",
+  "%T/chips/cc2420/transmit",
+  "%T/chips/cc2420/unique",
+  "%T/lib/timer",
+  "%T/lib/serial",
+  "%T/lib/power",
+);
+
+@opts = qw(
+
+  -gcc=arm-none-eabi-gcc
+  -mcpu=cortex-m3
+  -nostartfiles
+  -fnesc-target=env
+  -fnesc-no-debug
+
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{NESC_MACHINE} = "structure_size_boundary=32, pointer=4,4 float=4,4 double=8,4 long_double=8,4 short=2,2 int=4,4 long=4,4 long_long=8,4 int1248_align=1,2,4,4 wchar_size_size=4,4 char_wchar_signed=false,true";
diff --git a/tos/platforms/sam3u_ek/ActiveMessageC.nc b/tos/platforms/sam3u_ek/ActiveMessageC.nc
new file mode 100644
index 00000000..318f354a
--- /dev/null
+++ b/tos/platforms/sam3u_ek/ActiveMessageC.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the SAM3U-EK platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Philip Levis
+ * @author Thomas Schmid (adapted to SAM3U EK)
+ */
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
diff --git a/tos/platforms/sam3u_ek/Ieee154MessageC.nc b/tos/platforms/sam3u_ek/Ieee154MessageC.nc
new file mode 100644
index 00000000..039b6410
--- /dev/null
+++ b/tos/platforms/sam3u_ek/Ieee154MessageC.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * @author Stephen Dawson-Haggerty
+ */
+ 
+configuration Ieee154MessageC  {
+  provides {
+    interface SplitControl;
+
+    interface Resource as SendResource[uint8_t clientId];
+    interface Ieee154Send;
+    interface Receive as Ieee154Receive;
+
+    interface Ieee154Packet;
+    interface Packet;
+
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+    interface LowPowerListening;
+    interface PacketLink;
+  }
+
+} implementation {
+  components CC2420Ieee154MessageC as Msg;
+
+  SplitControl = Msg;
+  SendResource = Msg;
+  Ieee154Send  = Msg;
+  Ieee154Receive = Msg;
+  Ieee154Packet = Msg;
+  Packet = Msg;
+  
+  PacketAcknowledgements = Msg;
+  LinkPacketMetadata = Msg;
+  LowPowerListening = Msg;
+  PacketLink = Msg;
+}
diff --git a/tos/platforms/sam3u_ek/LedsP.nc b/tos/platforms/sam3u_ek/LedsP.nc
new file mode 100644
index 00000000..06f74cf5
--- /dev/null
+++ b/tos/platforms/sam3u_ek/LedsP.nc
@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The implementation of the standard 3 LED mote abstraction.
+ * Adapted because LED 2 (red) is active high on SAM3U_EK.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ *
+ * @date   March 21, 2005
+ */
+
+module LedsP @safe() {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+}
+implementation {
+  command error_t Init.init() {
+    atomic {
+      dbg("Init", "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led0.set();
+      call Led1.set();
+      call Led2.clr();
+    }
+    return SUCCESS;
+  }
+
+  /* Note: the call is inside the dbg, as it's typically a read of a volatile
+     location, so can't be deadcode eliminated */
+#define DBGLED(n) \
+  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");
+
+  async command void Leds.led0On() {
+    call Led0.clr();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Off() {
+    call Led0.set();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    DBGLED(0);
+  }
+
+  async command void Leds.led1On() {
+    call Led1.clr();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Off() {
+    call Led1.set();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    DBGLED(1);
+  }
+
+  async command void Leds.led2On() {
+    call Led2.set();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Off() {
+    call Led2.clr();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    DBGLED(2);
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (!call Led0.get()) {
+	rval |= LEDS_LED0;
+      }
+      if (!call Led1.get()) {
+	rval |= LEDS_LED1;
+      }
+      if (call Led2.get()) {
+	rval |= LEDS_LED2;
+      }
+    }
+    return rval;
+  }
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led2Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/sam3u_ek/MoteClockC.nc b/tos/platforms/sam3u_ek/MoteClockC.nc
new file mode 100644
index 00000000..10bc081f
--- /dev/null
+++ b/tos/platforms/sam3u_ek/MoteClockC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration MoteClockC
+{
+
+    provides {
+        interface Init;
+    }
+}
+
+implementation
+{
+
+    components MoteClockP, HplSam3uClockC;
+
+    Init = MoteClockP;
+    MoteClockP.HplSam3Clock -> HplSam3uClockC;
+
+  components LedsC;
+  MoteClockP.Leds -> LedsC;
+}
diff --git a/tos/platforms/sam3u_ek/MoteClockP.nc b/tos/platforms/sam3u_ek/MoteClockP.nc
new file mode 100644
index 00000000..8755a220
--- /dev/null
+++ b/tos/platforms/sam3u_ek/MoteClockP.nc
@@ -0,0 +1,128 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Basic Clock Initialization.
+ *
+ * @author Thomas Schmid
+ */
+
+#include "sam3upmchardware.h"
+#include "sam3usupchardware.h"
+#include "sam3eefchardware.h"
+#include "sam3wdtchardware.h"
+#include "sam3matrixhardware.h"
+
+extern void SetDefaultMaster(unsigned char enable);
+
+
+module MoteClockP
+{
+    provides 
+    {
+        interface Init;
+    }
+    uses
+    {
+        interface HplSam3Clock;
+        interface Leds;
+    }
+}
+
+implementation
+{
+
+    command error_t Init.init(){
+        // Set 2 WS for Embedded Flash Access
+        EEFC0->fmr.bits.fws = 2;
+        EEFC1->fmr.bits.fws = 2;
+
+        // Disable Watchdog
+        WDTC->mr.bits.wddis = 1;
+
+        // Select external slow clock
+        call HplSam3Clock.slckExternalOsc();
+        //call HplSam3Clock.slckRCOsc();
+
+        // Initialize main oscillator
+        call HplSam3Clock.mckInit48();
+        //call HplSam3Clock.mckInit12RC();
+
+        // Enable clock for UART
+        // FIXME: this should go into the UART start/stop!
+        PMC->pc.pcdr.bits.dbgu = 1;
+
+        /* Optimize CPU setting for speed */
+        SetDefaultMaster(1);
+
+        return SUCCESS;
+
+    }
+
+    //------------------------------------------------------------------------------
+    /// Enable or disable default master access
+    /// \param enable 1 enable defaultMaster settings, 0 disable it.
+    //------------------------------------------------------------------------------
+    void SetDefaultMaster(unsigned char enable) @C() 
+    {
+        // Set default master
+        if (enable == 1) {
+            // Set default master: SRAM0 -> Cortex-M3 System
+            MATRIX->scfg0.bits.fixed_defmstr = 1;
+            MATRIX->scfg0.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT;
+
+            // Set default master: SRAM1 -> Cortex-M3 System
+            MATRIX->scfg1.bits.fixed_defmstr = 1;
+            MATRIX->scfg1.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT;
+
+            // Set default master: Internal flash0 -> Cortex-M3 Instruction/Data
+            MATRIX->scfg3.bits.fixed_defmstr = 0;
+            MATRIX->scfg3.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_FIXED_DEFAULT;
+        } else {
+
+            // Clear default master: SRAM0 -> Cortex-M3 System
+            MATRIX->scfg0.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT;
+
+            // Clear default master: SRAM1 -> Cortex-M3 System
+            MATRIX->scfg1.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT;
+
+            // Clear default master: Internal flash0 -> Cortex-M3 Instruction/Data
+            MATRIX->scfg3.bits.defmstr_type = MATRIX_SCFG_MASTER_TYPE_NO_DEFAULT;
+        }
+    }
+
+    /**
+     * informs us when the main clock changes
+     */
+    async event void HplSam3Clock.mainClockChanged() {}
+
+}
+
diff --git a/tos/platforms/sam3u_ek/PlatformC.nc b/tos/platforms/sam3u_ek/PlatformC.nc
new file mode 100644
index 00000000..1f1add30
--- /dev/null
+++ b/tos/platforms/sam3u_ek/PlatformC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#include "hardware.h"
+
+configuration PlatformC
+{
+	provides
+	{
+		/* Called after platform_bootstrap() and Scheduler.init() (see TEP 107)
+		 * I/O pin configuration, clock calibration, and LED configuration */
+		interface Init;
+	}
+}
+
+implementation
+{
+	components PlatformP, MoteClockC, HplSam3TCC as MoteTimerC;
+    components McuSleepC;
+
+	Init = PlatformP;
+
+    PlatformP.MoteClockInit -> MoteClockC;
+    PlatformP.IRQInit -> MoteClockC;
+    PlatformP.MoteTimerInit -> MoteTimerC;
+
+    // Used so we can initialize the platform in a state where it would draw
+    // the lowest current possible if put to sleep.
+    PlatformP.Sam3LowPower -> McuSleepC;
+}
diff --git a/tos/platforms/sam3u_ek/PlatformLedsC.nc b/tos/platforms/sam3u_ek/PlatformLedsC.nc
new file mode 100644
index 00000000..dfce5de4
--- /dev/null
+++ b/tos/platforms/sam3u_ek/PlatformLedsC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Connection of LEDs to the GPIO pins on the SAM3U-EK board.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+configuration PlatformLedsC
+{
+	provides
+	{
+		interface GeneralIO as Led0;
+		interface GeneralIO as Led1;
+		interface GeneralIO as Led2;
+	}
+	uses
+	{
+		interface Init;
+	}
+}
+implementation
+{
+	components HplSam3uGeneralIOC as IO;
+	components PlatformP;
+
+	Init = PlatformP.LedsInit;
+
+	Led0 = IO.PioB0; // Pin B0 = Green LED 1, active low
+	Led1 = IO.PioB1; // Pin B1 = Green LED 2, active low
+	Led2 = IO.PioB2; // Pin B2 = Red LED, active high
+}
diff --git a/tos/platforms/sam3u_ek/PlatformP.nc b/tos/platforms/sam3u_ek/PlatformP.nc
new file mode 100644
index 00000000..83f57380
--- /dev/null
+++ b/tos/platforms/sam3u_ek/PlatformP.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#include "hardware.h"
+
+module PlatformP
+{
+    provides
+	{
+        interface Init;
+    }
+	uses
+	{
+		interface Init as LedsInit;
+        interface Init as MoteClockInit;
+        interface Init as IRQInit;
+        interface Init as MoteTimerInit;
+        interface Sam3LowPower;
+	}
+}
+
+implementation
+{
+	command error_t Init.init()
+	{
+		/* I/O pin configuration, clock calibration, and LED configuration
+		 * (see TEP 107)
+		 */
+		call IRQInit.init();
+        call MoteClockInit.init();
+        call MoteTimerInit.init();
+		call LedsInit.init();
+
+		return SUCCESS;
+	}
+
+    async event void Sam3LowPower.customizePio() {
+        // currently not optimized for sam3u-ek
+    }
+
+	default command error_t LedsInit.init()
+	{
+		return SUCCESS;
+	}
+}
diff --git a/tos/platforms/sam3u_ek/PlatformSerialC.nc b/tos/platforms/sam3u_ek/PlatformSerialC.nc
new file mode 100644
index 00000000..41ee74d8
--- /dev/null
+++ b/tos/platforms/sam3u_ek/PlatformSerialC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+configuration PlatformSerialC
+{
+	provides
+	{
+		interface StdControl;
+		interface UartStream;
+		interface UartByte;
+	}
+}
+implementation
+{
+	components HilSam3UartC;
+
+	StdControl = HilSam3UartC;
+	UartStream = HilSam3UartC;
+	UartByte = HilSam3UartC;
+}
diff --git a/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlash.h b/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlash.h
new file mode 100644
index 00000000..6a866341
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlash.h
@@ -0,0 +1,183 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef HPLNANDFLASH_H
+#define HPLNANDFLASH_H
+
+/// \page "NandFlashModel options"
+/// This page lists the possible options for a NandFlash chip.
+/// 
+/// !Options
+/// - NandFlashModel_DATABUS8
+/// - NandFlashModel_DATABUS16
+/// - NandFlashModel_COPYBACK
+
+/// Indicates the Nand uses an 8-bit databus.
+#define NandFlashModel_DATABUS8     (0 << 0)
+
+/// Indicates the Nand uses a 16-bit databus.
+#define NandFlashModel_DATABUS16    (1 << 0)
+
+/// The Nand supports the copy-back function (internal page-to-page copy).
+#define NandFlashModel_COPYBACK     (1 << 1)
+
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+/// Maximum number of blocks in a device
+#define NandCommon_MAXNUMBLOCKS             1024//2048
+
+/// Maximum number of pages in one block
+#define NandCommon_MAXNUMPAGESPERBLOCK      64
+
+/// Maximum size of the data area of one page, in bytes.
+#define NandCommon_MAXPAGEDATASIZE          2048
+
+/// Maximum size of the spare area of one page, in bytes.
+#define NandCommon_MAXPAGESPARESIZE         64
+
+/// Maximum number of ecc bytes stored in the spare for one single page.
+#define NandCommon_MAXSPAREECCBYTES         24
+
+/// Maximum number of extra free bytes inside the spare area of a page.
+#define NandCommon_MAXSPAREEXTRABYTES       38
+
+
+struct NandSpareScheme {
+
+    uint8_t badBlockMarkerPosition;
+    uint8_t numEccBytes;
+    uint8_t eccBytesPositions[NandCommon_MAXSPAREECCBYTES];
+    uint8_t numExtraBytes;
+    uint8_t extraBytesPositions[NandCommon_MAXSPAREEXTRABYTES];
+};
+
+//------------------------------------------------------------------------------
+/// Describes a particular model of NandFlash device.
+//------------------------------------------------------------------------------
+struct NandFlashModel {
+
+    /// Identifier for the device.
+    uint8_t deviceId;
+    /// Special options for the NandFlash.
+    uint8_t options;
+    /// Size of the data area of a page, in bytes.
+    uint16_t pageSizeInBytes;
+    /// Size of the device in MB.
+    uint16_t deviceSizeInMegaBytes;
+    /// Size of one block in kilobytes.
+    uint16_t blockSizeInKBytes;
+    /// Spare area placement scheme
+    const struct NandSpareScheme *scheme;
+};
+
+
+struct RawNandFlash {
+
+    /// Model describing this NandFlash characteristics.
+    struct NandFlashModel model;
+    /// Address for sending commands to the NandFlash.
+    uint32_t commandAddress;
+    /// Address for sending addresses to the NandFlash
+    uint32_t addressAddress;
+    /// Address for sending data to the NandFlash.
+    uint32_t dataAddress;
+    /// Pin used to enable the NandFlash chip.
+  //Pin pinChipEnable;
+    /// Pin used to monitor the ready/busy signal from the NandFlash.
+    //Pin pinReadyBusy;
+};
+
+
+/// No more blocks can be allocated for a write operation.
+#define NandCommon_ERROR_NOMOREBLOCKS       1
+
+/// The desired logical block has no current physical mapping.
+#define NandCommon_ERROR_BLOCKNOTMAPPED     2
+
+/// Access if out-of-bounds.
+#define NandCommon_ERROR_OUTOFBOUNDS        3
+
+/// There are no block having the desired property.
+#define NandCommon_ERROR_NOBLOCKFOUND       4
+
+/// The nandflash device has no logical mapping information on it.
+#define NandCommon_ERROR_MAPPINGNOTFOUND    5
+
+/// A read operation cannot be carried out.
+#define NandCommon_ERROR_CANNOTREAD         6
+
+/// A write operation cannot be carried out.
+#define NandCommon_ERROR_CANNOTWRITE        7
+
+/// NandFlash chip model cannot be recognized.
+#define NandCommon_ERROR_UNKNOWNMODEL       8
+
+/// Page data is corrupted according to ECC
+#define NandCommon_ERROR_CORRUPTEDDATA      9
+
+/// Block is not in the required status.
+#define NandCommon_ERROR_WRONGSTATUS        10
+
+/// Device has no logical mapping stored in it
+#define NandCommon_ERROR_NOMAPPING          11
+
+/// The block being accessed is bad and must be replaced
+#define NandCommon_ERROR_BADBLOCK           12
+
+/// Failed to perform an erase operation
+#define NandCommon_ERROR_CANNOTERASE        13
+
+/// A hardware copyback operation failed.
+#define NandCommon_ERROR_CANNOTCOPY         14
+
+/// HW Ecc Not compatible with the Nand Model
+#define NandCommon_ERROR_ECC_NOT_COMPATIBLE 15
+
+// -------- HSMC4_CFG : (HSMC4 Offset: 0x0) Configuration Register -------- 
+#define AT91C_HSMC4_PAGESIZE  (0x3 <<  0) // (HSMC4) PAGESIZE field description
+#define         AT91C_HSMC4_PAGESIZE_528_Bytes            (0x0) // (HSMC4) 512 bytes plus 16 bytes page size
+#define         AT91C_HSMC4_PAGESIZE_1056_Bytes           (0x1) // (HSMC4) 1024 bytes plus 32 bytes page size
+#define         AT91C_HSMC4_PAGESIZE_2112_Bytes           (0x2) // (HSMC4) 2048 bytes plus 64 bytes page size
+#define         AT91C_HSMC4_PAGESIZE_4224_Bytes           (0x3) // (HSMC4) 4096 bytes plus 128 bytes page size
+
+/// Address for transferring command bytes to the nandflash.
+#define BOARD_NF_COMMAND_ADDR   0x61400000
+/// Address for transferring address bytes to the nandflash.
+#define BOARD_NF_ADDRESS_ADDR   0x61200000
+/// Address for transferring data bytes to the nandflash.
+#define BOARD_NF_DATA_ADDR      0x61000000
+
+
+#endif // HPLNANDFLASH_H
diff --git a/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlash.nc b/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlash.nc
new file mode 100644
index 00000000..ee0a2137
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlash.nc
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <HplNandFlash.h>
+
+interface HplNandFlash{
+  //command void writeColumnAddress();
+  //command void writeRowAddress();
+  //command void isOperationComplete();
+  //command void writeData();
+  //command void readData();
+
+  //command void eraseBlock_i(); // internal functions 
+  //command void writePage_i(); // internal functions
+  //command void copyPage_i(); // internal functions
+
+  command void init(struct RawNandFlash *HplNand, const struct NandFlashModel *model, uint32_t commandAddr, uint32_t addressAddr, uint32_t dataAddr);
+  command uint8_t findNandModel(const struct NandFlashModel *modelList, uint8_t size, struct NandFlashModel *model, uint32_t chipId);
+  command void reset();
+  command uint32_t readId();
+  command uint8_t eraseBlock(const struct RawNandFlash *raw, uint16_t block);
+  command uint8_t readPage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare);
+  command uint8_t writePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare);
+  command uint8_t copyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage);
+  command uint8_t copyBlock(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t destBlock);
+
+
+
+  command uint16_t getPageDataSize(const struct NandFlashModel *model);
+  command uint32_t getDeviceSizeInPages(const struct NandFlashModel *model);
+  command uint16_t getBlockSizeInPages(const struct NandFlashModel *model);
+  command uint8_t getPageSpareSize(const struct NandFlashModel *model);
+  command uint8_t hasSmallBlocks(const struct NandFlashModel *model);
+  command uint16_t getDeviceSizeInBlocks(const struct NandFlashModel * model);
+  command void readBadBlockMarker(const struct NandSpareScheme *scheme, const uint8_t *spare, uint8_t *marker);
+  command void writeBadBlockMarker(const struct NandSpareScheme *scheme, uint8_t *spare, uint8_t marker);
+  command uint32_t getDeviceSizeInBytes(const struct NandFlashModel *model);
+  command uint32_t getBlockSizeInBytes(const struct NandFlashModel *model);
+  command uint8_t readBlock(const struct RawNandFlash *raw, uint16_t block, void *data);
+  command uint8_t writeBlock(const struct RawNandFlash *raw, uint16_t block, void *data);
+}
diff --git a/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlashC.nc b/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlashC.nc
new file mode 100644
index 00000000..47a311ff
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlashC.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration HplNandFlashC{
+  provides interface HplNandFlash;
+
+}
+implementation{
+  components HplNandFlashP;
+  HplNandFlash = HplNandFlashP;
+
+  components HplSam3uClockC;
+  HplNandFlashP.HSMC4ClockControl -> HplSam3uClockC.HSMC4PPCntl;
+
+  components HplSam3uGeneralIOC as IO;
+  HplNandFlashP.NandFlash_CE -> IO.PioC12;
+  HplNandFlashP.NandFlash_RB -> IO.PioB24;
+
+  HplNandFlashP.NandFlash_OE -> IO.HplPioB17;
+  HplNandFlashP.NandFlash_WE -> IO.HplPioB18;
+  HplNandFlashP.NandFlash_CLE -> IO.HplPioB22;
+  HplNandFlashP.NandFlash_ALE -> IO.HplPioB21;
+  
+  HplNandFlashP.NandFlash_Data00 -> IO.HplPioB9;
+  HplNandFlashP.NandFlash_Data01 -> IO.HplPioB10;
+  HplNandFlashP.NandFlash_Data02 -> IO.HplPioB11;
+  HplNandFlashP.NandFlash_Data03 -> IO.HplPioB12;
+  HplNandFlashP.NandFlash_Data04 -> IO.HplPioB13;
+  HplNandFlashP.NandFlash_Data05 -> IO.HplPioB14;
+  HplNandFlashP.NandFlash_Data06 -> IO.HplPioB15;
+  HplNandFlashP.NandFlash_Data07 -> IO.HplPioB16;
+
+  HplNandFlashP.NandFlash_Data08 -> IO.HplPioB25;
+  HplNandFlashP.NandFlash_Data09 -> IO.HplPioB26;
+  HplNandFlashP.NandFlash_Data10 -> IO.HplPioB27;
+  HplNandFlashP.NandFlash_Data11 -> IO.HplPioB28;
+  HplNandFlashP.NandFlash_Data12 -> IO.HplPioB29;
+  HplNandFlashP.NandFlash_Data13 -> IO.HplPioB30;
+  HplNandFlashP.NandFlash_Data14 -> IO.HplPioB31;
+  HplNandFlashP.NandFlash_Data15 -> IO.HplPioB6;
+
+  components LedsC, LcdC;
+  HplNandFlashP.Leds -> LedsC;
+  HplNandFlashP.Draw -> LcdC;
+
+  components new TimerMilliC() as TimerC;
+  HplNandFlashP.ReadBlockTimer -> TimerC;
+}
diff --git a/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlashP.nc b/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlashP.nc
new file mode 100644
index 00000000..f79834a0
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/nandflash-working/HplNandFlashP.nc
@@ -0,0 +1,1025 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "HplNandFlash.h"
+
+module HplNandFlashP{
+  provides interface HplNandFlash as Hpl;
+
+  uses interface HplSam3uPeripheralClockCntl as HSMC4ClockControl;
+
+  uses interface GeneralIO as NandFlash_CE;
+  uses interface GeneralIO as NandFlash_RB;
+
+  uses interface HplSam3uGeneralIOPin as NandFlash_OE;
+  uses interface HplSam3uGeneralIOPin as NandFlash_WE;
+  uses interface HplSam3uGeneralIOPin as NandFlash_CLE;
+  uses interface HplSam3uGeneralIOPin as NandFlash_ALE;
+
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data00;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data01;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data02;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data03;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data04;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data05;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data06;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data07;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data08;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data09;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data10;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data11;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data12;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data13;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data14;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data15;
+
+  uses interface Leds;
+  uses interface Draw;
+
+  uses interface Timer<TMilli> as ReadBlockTimer;
+
+}
+implementation {
+
+/// Nand flash commands
+#define COMMAND_READ_1                  0x00
+#define COMMAND_READ_2                  0x30
+#define COMMAND_COPYBACK_READ_1         0x00
+#define COMMAND_COPYBACK_READ_2         0x35
+#define COMMAND_COPYBACK_PROGRAM_1      0x85
+#define COMMAND_COPYBACK_PROGRAM_2      0x10
+#define COMMAND_RANDOM_OUT              0x05
+#define COMMAND_RANDOM_OUT_2            0xE0
+#define COMMAND_RANDOM_IN               0x85
+#define COMMAND_READID                  0x90
+#define COMMAND_WRITE_1                 0x80
+#define COMMAND_WRITE_2                 0x10
+#define COMMAND_ERASE_1                 0x60
+#define COMMAND_ERASE_2                 0xD0
+#define COMMAND_STATUS                  0x70
+#define COMMAND_RESET                   0xFF
+
+#define COMMAND_READ_A                  0x00
+#define COMMAND_READ_C                  0x50
+
+#define STATUS_READY                    (1 << 6)
+#define STATUS_ERROR                    (1 << 0)
+
+
+#define WRITE_COMMAND(commandAddress, u_command) \
+    {*((volatile uint8_t *) commandAddress) = (uint8_t) u_command;}
+#define WRITE_COMMAND16(commandAddress, u_command) \
+    {*((volatile uint16_t *) commandAddress) = (uint16_t) u_command;}
+#define WRITE_ADDRESS(addressAddress, address) \
+    {*((volatile uint8_t *) addressAddress) = (uint8_t) address;}
+#define WRITE_ADDRESS16(addressAddress, address) \
+    {*((volatile uint16_t *) addressAddress) = (uint16_t) address;}
+#define WRITE_DATA8(dataAddress, data) \
+    {*((volatile uint8_t *) dataAddress) = (uint8_t) data;}
+#define READ_DATA8(dataAddress) \
+    (*((volatile uint8_t *) dataAddress))
+#define WRITE_DATA16(dataAddress, data) \
+    {*((volatile uint16_t *) dataAddress) = (uint16_t) data;}
+#define READ_DATA16(dataAddress) \
+    (*((volatile uint16_t *) dataAddress))
+
+/// Number of tries for erasing a block
+#define NUMERASETRIES           2
+/// Number of tries for writing a block
+#define NUMWRITETRIES           2
+/// Number of tries for copying a block
+#define NUMCOPYTRIES            2
+
+/// Number of NandFlash models inside the list.
+#define NandFlashModelList_SIZE         58
+
+#define MODEL(raw)  ((struct NandFlashModel *) raw)
+
+  //------------------------------------------------------------------------------
+  //         Exported variables
+  //------------------------------------------------------------------------------
+  
+  //extern const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE];
+
+  /// Spare area placement scheme for 256 byte pages.
+  const struct NandSpareScheme nandSpareScheme256 = {
+
+    // Bad block marker is at position #5
+    5,
+    // 3 ecc bytes
+    3,
+    // Ecc bytes positions
+    {0, 1, 2},
+    // 4 extra bytes
+    4,
+    // Extra bytes positions
+    {3, 4, 6, 7}
+  };
+
+  /// Spare area placement scheme for 512 byte pages.
+  const struct NandSpareScheme nandSpareScheme512 = {
+
+    // Bad block marker is at position #5
+    5,
+    // 6 ecc bytes
+    6,
+    // Ecc bytes positions
+    {0, 1, 2, 3, 6, 7},
+    // 8 extra bytes
+    8,
+    // Extra bytes positions
+    {8, 9, 10, 11, 12, 13, 14, 15}
+  };
+
+  /// Spare area placement scheme for 2048 byte pages.
+  const struct NandSpareScheme nandSpareScheme2048 = {
+
+    // Bad block marker is at position #0
+    0,
+    // 24 ecc bytes
+    24, 
+    // Ecc bytes positions
+    {40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
+     59, 60, 61, 62, 63},
+    // 38 extra bytes
+    38,
+    // Extra bytes positions
+    {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
+     22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39}
+  };
+
+  /// List of NandFlash models which can be recognized by the software.
+  const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE] = {
+
+    // |  ID    | Options                 | Page    | Mo  | Block   |BlkPg   |DevBlk
+    {0x6e,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
+    {0x64,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
+    {0x6b,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xe8,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
+    {0xec,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
+    {0xea,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
+    {0xd5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xe3,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xe5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xd6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
+
+    {0x39,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
+    {0xe6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
+    {0x49,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},
+    {0x59,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},
+
+    {0x33,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
+    {0x73,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
+    {0x43,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
+    {0x53,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
+                                                             
+    {0x35,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
+    {0x75,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
+    {0x45,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
+    {0x55,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
+                                                             
+    {0x36,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
+    {0x76,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
+    {0x46,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
+    {0x56,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
+                                                             
+    {0x78,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
+    {0x39,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
+    {0x79,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
+    {0x72,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+    {0x49,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+    {0x74,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+    {0x59,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+                                                             
+    {0x71,   NandFlashModel_DATABUS8,    512,    256,   16,    &nandSpareScheme512},
+	
+    // Large blocks devices. Parameters must be fetched from the extended I
+#define OPTIONS     NandFlashModel_COPYBACK                   
+                                                                                          
+    {0xA2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    {0xF2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    {0xB2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    {0xC2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    
+    {0xA1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
+    {0xF1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
+    {0xB1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
+    {0xC1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
+                                                                  
+    {0xAA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
+    {0xDA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,   &nandSpareScheme2048},                                              
+    {0xBA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
+    {0xCA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
+	                                                                
+    {0xAC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
+    {0xDC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
+    {0xBC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
+    {0xCC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
+                                                                  
+    {0xA3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
+    {0xD3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
+    {0xB3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
+    {0xC3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
+                                                                  
+    {0xA5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
+    {0xD5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
+    {0xB5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
+    {0xC5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
+  };
+
+  uint16_t numBlocks;
+  uint32_t memSize;
+  uint32_t blockSize;
+  uint16_t numPagesPerBlock;
+  uint16_t pageDataSize;
+
+  void WaitReady(){
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);
+    while ((READ_DATA8(BOARD_NF_DATA_ADDR) & STATUS_READY) != STATUS_READY);
+  }
+
+  uint8_t GetDataBusWidth(const struct NandFlashModel *model){
+    return (model->options&NandFlashModel_DATABUS16)? 16: 8;
+  }
+
+  void WriteColumnAddress(const struct RawNandFlash *raw, uint16_t columnAddress){
+    
+    uint16_t pageSize = call Hpl.getPageDataSize(MODEL(raw));
+
+    call Draw.drawInt(200, 250, pageSize, 1, COLOR_BLACK);
+
+    /* Check the data bus width of the NandFlash */
+    if (GetDataBusWidth(MODEL(raw)) == 16) {
+      /* Div 2 is because we address in word and not in byte */
+      columnAddress >>= 1;
+    }
+    while (pageSize > 0) {
+      if (GetDataBusWidth(MODEL(raw)) == 16) {
+	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
+      } else {
+	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
+      }
+      pageSize >>= 8;
+      columnAddress >>= 8;
+    }
+  }
+
+  //------------------------------------------------------------------------------
+  /// Sends the row address to the NandFlash chip.
+  /// \param raw  Pointer to a RawNandFlash instance.
+  /// \param rowAddress  Row address to send.
+  //------------------------------------------------------------------------------
+  void WriteRowAddress(const struct RawNandFlash *raw, uint32_t rowAddress){
+
+    uint32_t numPages = call Hpl.getDeviceSizeInPages(MODEL(raw));
+
+    while (numPages > 0) {
+      if (GetDataBusWidth(MODEL(raw)) == 16) {
+	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
+      } else {
+	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
+      }
+      numPages >>= 8;
+      rowAddress >>= 8;
+    }
+  }
+
+  void WriteData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
+    uint32_t i;
+    // Check the data bus width of the NandFlash
+    if (GetDataBusWidth(MODEL(raw)) == 16) {
+      uint16_t *buffer16 = (uint16_t *) buffer;
+      size >>= 1;
+      for(i=0; i < size; i++) {
+	//call Draw.drawInt(15,50, buffer16[i], 1, COLOR_RED);
+	WRITE_DATA16(BOARD_NF_DATA_ADDR, /*buffer16[i]*/ 23);
+      }
+    } else {
+      for(i=0; i < size; i++) {
+	WRITE_DATA8(BOARD_NF_DATA_ADDR, buffer[i]);
+      }
+    }
+  }
+
+  uint8_t count = 0;
+
+  void ReadData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
+    uint32_t i;
+    // Check the chip data bus width
+
+    count ++;
+
+    if (GetDataBusWidth(MODEL(raw)) == 16) {
+      uint16_t *buffer16 = (uint16_t *) buffer;
+
+      size >>= 1;
+
+      call Draw.drawInt(200,130, size, 1, COLOR_YELLOW);
+
+      for (i=0 ; i < size ; i++) {
+	//buffer16[i] = READ_DATA16(BOARD_NF_DATA_ADDR);
+	call Draw.drawInt(150,50, READ_DATA16(BOARD_NF_DATA_ADDR), 1, COLOR_BLACK);
+      }
+
+      call Draw.drawInt(100,150, buffer16[0], 1, COLOR_BLACK);
+      call Draw.drawInt(200,150, buffer16[30], 1, COLOR_BLACK);
+
+    } else {
+
+      for (i=0; i < size; i++) {
+	buffer[i] = READ_DATA8(BOARD_NF_DATA_ADDR);
+      }
+    }
+
+    call Draw.drawInt(count*15,130, count, 1, COLOR_BLUE);
+  }
+
+  uint8_t IsOperationComplete(const struct RawNandFlash *raw){
+    uint8_t status;
+
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);
+
+    status = READ_DATA8(BOARD_NF_DATA_ADDR);
+
+    if (((status & STATUS_READY) != STATUS_READY) || ((status & STATUS_ERROR) != 0)) {
+        return 0;
+    }
+    return 1;
+  }
+
+  uint8_t EraseBlock( const struct RawNandFlash *raw, unsigned short block){
+    uint8_t error = 0;
+    uint32_t rowAddress;
+
+    // Calculate address used for erase
+    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw));
+
+    // Start erase
+    //ENABLE_CE(raw);
+    // Enable CE
+    call NandFlash_CE.clr();
+
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_1);
+    WriteRowAddress(raw, rowAddress);
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_2);
+
+    WaitReady();
+
+    if (!IsOperationComplete(raw)) {
+      error = NandCommon_ERROR_CANNOTERASE;
+    }
+
+    //DISABLE_CE(raw);
+    // Disable CE
+    call NandFlash_CE.set();
+
+    return error;
+    
+  }
+
+  uint8_t WritePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
+    
+    uint32_t pageSize = call Hpl.getPageDataSize(MODEL(raw));
+    uint32_t spareDataSize = call Hpl.getPageSpareSize(MODEL(raw));
+    uint16_t dummyByte;
+    uint32_t rowAddress;
+    uint8_t error = 0;
+
+    // Calculate physical address of the page
+    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw)) + page;
+
+    // Start write operation
+    //ENABLE_CE(raw);
+    // Enable CE;
+    call NandFlash_CE.clr();
+
+    // Write data area if needed
+    if (data) {
+
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
+      WriteColumnAddress(raw, 0);
+      WriteRowAddress(raw, rowAddress);
+      WriteData(raw, (uint8_t *) data, pageSize);
+
+      //call Draw.drawInt(50, 50, (uint8_t)data[0], 1, COLOR_RED);
+
+      // Spare is written here as well since it is more efficient
+      if (spare) {
+	WriteData(raw, (uint8_t *) spare, spareDataSize);
+      }
+      else {
+	// Note: special case when ECC parity generation. 
+	// ECC results are available as soon as the counter reaches the end of the main area.
+	// But when reach PageSize for an example, it could not generate last ECC_PR, The 
+	// workaround is to receive PageSize+1 word.
+	ReadData(raw, (uint8_t *) (&dummyByte), 2);
+      }
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);
+
+      WaitReady();
+
+      if (!IsOperationComplete(raw)) {
+	error = NandCommon_ERROR_CANNOTWRITE;
+      }
+    }
+
+    // Write spare area alone if needed
+    if (spare && !data) {
+
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
+      WriteColumnAddress(raw, pageSize);
+      WriteRowAddress(raw, rowAddress);
+      WriteData(raw, (uint8_t *) spare, spareDataSize);
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);
+
+      WaitReady();
+      if (!IsOperationComplete(raw)) {
+	error = NandCommon_ERROR_CANNOTWRITE;
+      }
+    }
+
+    // Disable chip
+    //DISABLE_CE(raw);
+    // Disable CE
+    call NandFlash_CE.set();
+
+    return error;
+
+  }
+
+  uint8_t CopyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){
+
+    uint32_t sourceRow, destRow;
+    uint8_t error = 0;
+    uint8_t data[NandCommon_MAXPAGEDATASIZE];
+    uint8_t spare[NandCommon_MAXPAGESPARESIZE];
+    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
+    sourceRow = sourceBlock * numPages + sourcePage;
+    destRow = destBlock * numPages + destPage;
+
+    if (call Hpl.readPage(raw, sourceBlock, sourcePage, data, spare)) {
+      error = NandCommon_ERROR_CANNOTREAD;
+    } else if (call Hpl.writePage(raw, destBlock, destPage, data, spare)) {
+      error = NandCommon_ERROR_CANNOTWRITE;
+    }
+
+    return error;    
+  }
+
+  void configureNandFlash(uint8_t busWidth){
+    // Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
+    // set clock
+    // set smc registers
+    volatile smc_setup_t *SETUP = (volatile smc_setup_t *) (0x400E0084 + 0x0);
+    smc_setup_t setup = *SETUP;
+    volatile smc_pulse_t *PULSE = (volatile smc_pulse_t *) (0x400E0084 + 0x4);
+    smc_pulse_t pulse = *PULSE;
+    volatile smc_cycle_t *CYCLE = (volatile smc_cycle_t *) (0x400E0084 + 0x8);
+    smc_cycle_t cycle = *CYCLE;
+    volatile smc_timings_t *TIMINGS = (volatile smc_timings_t *) (0x400E0084 + 0xC);
+    smc_timings_t timings = *TIMINGS;
+    volatile smc_mode_t *MODE = (volatile smc_mode_t *) (0x400E0084 + 0x10);
+    smc_mode_t mode = *MODE;
+
+    // start clock for register access
+    call HSMC4ClockControl.disable();
+    call HSMC4ClockControl.enable();
+
+    setup.bits.nwe_setup = 0;
+    setup.bits.ncs_wr_setup = 1;
+    setup.bits.nrd_setup = 0;
+    setup.bits.ncs_rd_setup = 1;
+
+    *SETUP = setup;
+
+    pulse.bits.nwe_pulse = 2;
+    pulse.bits.ncs_wr_pulse = 3;
+    pulse.bits.nrd_pulse = 3;
+    pulse.bits.ncs_rd_pulse = 4;
+
+    *PULSE = pulse;
+
+    cycle.bits.nwe_cycle = 4;
+    cycle.bits.nrd_cycle = 7;
+
+    *CYCLE = cycle;
+
+    timings.bits.tclr = 1;
+    timings.bits.tadl = 2;
+    timings.bits.tar = 1;
+    timings.bits.trr = 1;
+    timings.bits.twb = 2;
+    timings.bits.rbnsel = 7;
+    timings.bits.nfsel = 1;
+
+    *TIMINGS = timings;
+
+    if(busWidth == 8){
+      mode.bits.dbw = 0;
+      mode.bits.read_mode = 1;
+      mode.bits.write_mode = 1;
+
+      *MODE = mode;
+
+    }else if(busWidth == 16){
+      mode.bits.dbw = 1;
+      mode.bits.read_mode = 1;
+      mode.bits.write_mode = 1;
+
+      *MODE = mode;
+      
+    }
+  }
+
+  void configurePsRam(){
+    // TODO: Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
+    // TODO: Does Atmel code work with this disabled?
+  }
+
+  void configureNandPins(){
+
+    // Pin setting
+
+    call NandFlash_CE.makeOutput();
+    call NandFlash_RB.makeInput();
+
+    call NandFlash_OE.disablePioControl();
+    call NandFlash_WE.disablePioControl();
+    call NandFlash_CLE.disablePioControl();
+    call NandFlash_ALE.disablePioControl();
+
+    call NandFlash_OE.selectPeripheralA();
+    call NandFlash_WE.selectPeripheralA();
+    call NandFlash_CLE.selectPeripheralA();
+    call NandFlash_ALE.selectPeripheralA();
+
+    call NandFlash_Data00.disablePioControl();
+    call NandFlash_Data01.disablePioControl();
+    call NandFlash_Data02.disablePioControl();
+    call NandFlash_Data03.disablePioControl();
+    call NandFlash_Data04.disablePioControl();
+    call NandFlash_Data05.disablePioControl();
+    call NandFlash_Data06.disablePioControl();
+    call NandFlash_Data07.disablePioControl();
+    call NandFlash_Data08.disablePioControl();
+    call NandFlash_Data09.disablePioControl();
+    call NandFlash_Data10.disablePioControl();
+    call NandFlash_Data11.disablePioControl();
+    call NandFlash_Data12.disablePioControl();
+    call NandFlash_Data13.disablePioControl();
+    call NandFlash_Data14.disablePioControl();
+    call NandFlash_Data15.disablePioControl();
+
+    call NandFlash_Data00.selectPeripheralA();
+    call NandFlash_Data01.selectPeripheralA();
+    call NandFlash_Data02.selectPeripheralA();
+    call NandFlash_Data03.selectPeripheralA();
+    call NandFlash_Data04.selectPeripheralA();
+    call NandFlash_Data05.selectPeripheralA();
+    call NandFlash_Data06.selectPeripheralA();
+    call NandFlash_Data07.selectPeripheralA();
+    call NandFlash_Data08.selectPeripheralA();
+    call NandFlash_Data09.selectPeripheralA();
+    call NandFlash_Data10.selectPeripheralA();
+    call NandFlash_Data11.selectPeripheralA();
+    call NandFlash_Data12.selectPeripheralA();
+    call NandFlash_Data13.selectPeripheralA();
+    call NandFlash_Data14.selectPeripheralA();
+    call NandFlash_Data15.selectPeripheralB(); // PB6
+  }
+
+  command uint8_t Hpl.hasSmallBlocks(const struct NandFlashModel *model){
+    return (model->pageSizeInBytes <= 512 )? 1: 0;
+  }
+
+  //------------------------------------------------------------------------------
+  /// Returns the size of the data area of a page in bytes.
+  /// \param model  Pointer to a NandFlashModel instance.
+  //------------------------------------------------------------------------------
+  command uint16_t Hpl.getPageDataSize(const struct NandFlashModel *model){
+    return model->pageSizeInBytes;
+  }
+
+  //------------------------------------------------------------------------------
+  /// Returns the size of the spare area of a page in bytes.
+  /// \param model  Pointer to a NandFlashModel instance.
+  //------------------------------------------------------------------------------
+  command uint8_t Hpl.getPageSpareSize(const struct NandFlashModel *model){
+    return (model->pageSizeInBytes>>5); /// Spare size is 16/512 of data size
+  }
+
+  command void Hpl.init(struct RawNandFlash *HplNand, const struct NandFlashModel *model, uint32_t commandAddr, uint32_t addressAddr, uint32_t dataAddr){
+    uint32_t chipId;
+    uint8_t error;
+    uint8_t busWidth = 16;
+
+    //configurePsRam();
+    configureNandFlash(busWidth);
+    configureNandPins();
+
+    HplNand -> commandAddress = commandAddr;
+    HplNand -> addressAddress = addressAddr;
+    HplNand -> dataAddress = dataAddr;
+
+    call Hpl.reset();
+
+    if(!model){
+      chipId = call Hpl.readId();
+      error = call Hpl.findNandModel(nandFlashModelList, NandFlashModelList_SIZE, &(HplNand->model), chipId);
+    }else{
+      HplNand -> model = *model;
+    }
+
+    if(!error){
+    } else {
+    }
+
+    busWidth = 0;
+    busWidth = GetDataBusWidth(MODEL(HplNand));
+    configureNandFlash(busWidth);
+    
+    memSize = call Hpl.getDeviceSizeInBytes(MODEL(HplNand));
+    blockSize = call Hpl.getBlockSizeInBytes(MODEL(HplNand));
+    numBlocks = call Hpl.getDeviceSizeInBlocks(MODEL(HplNand));
+    pageDataSize = call Hpl.getPageDataSize(MODEL(HplNand));
+    numPagesPerBlock = call Hpl.getBlockSizeInPages(MODEL(HplNand));    
+
+    call Draw.drawInt(150, 20, busWidth, 1, COLOR_BLACK);
+    call Draw.drawInt(150, 40, pageDataSize, 1, COLOR_BLACK);
+    call Draw.drawInt(150, 60, memSize, 1, COLOR_BLACK);
+    call Draw.drawInt(150, 80, numPagesPerBlock, 1, COLOR_BLACK);
+
+  }
+
+  command uint8_t Hpl.findNandModel(const struct NandFlashModel *modelList, uint8_t size, struct NandFlashModel *model, uint32_t chipId){
+
+    uint8_t i, found = 0;
+
+    //volatile smc_cfg_t *CFG = (volatile smc_cfg_t *) (0x400E0000);
+    //smc_cfg_t cfg = *CFG;
+
+    uint8_t id2 = (uint8_t)(chipId>>8);
+    uint8_t id4 = (uint8_t)(chipId>>24);
+
+    //call Draw.drawInt(100, 60, chipId, 1, COLOR_YELLOW);
+    //call Draw.drawInt(100, 80, id2, 1, COLOR_YELLOW);
+    
+    for(i=0; i<size; i++) {
+      if(modelList[i].deviceId == id2) {
+	found = 1;
+
+	if(model) {
+
+	  memcpy(model, &modelList[i], sizeof(struct NandFlashModel));
+
+	  if(model->blockSizeInKBytes == 0 || model->pageSizeInBytes == 0) {
+	    //TRACE_DEBUG("Fetch from ID4(0x%.2x):\r\n", id4);
+	    /// Fetch from the extended ID4
+	    /// ID4 D5  D4 BlockSize || D1  D0  PageSize
+	    ///     0   0   64K      || 0   0   1K
+	    ///     0   1   128K     || 0   1   2K
+	    ///     1   0   256K     || 1   0   4K
+	    ///     1   1   512K     || 1   1   8k
+	    switch(id4 & 0x03) {
+	    case 0x00: model->pageSizeInBytes = 1024; break;
+	    case 0x01: model->pageSizeInBytes = 2048; break;
+	    case 0x02: model->pageSizeInBytes = 4096; break;
+	    case 0x03: model->pageSizeInBytes = 8192; break;
+	    }
+	    switch(id4 & 0x30) {
+	    case 0x00: model->blockSizeInKBytes = 64;  break;
+	    case 0x10: model->blockSizeInKBytes = 128; break;
+	    case 0x20: model->blockSizeInKBytes = 256; break;
+	    case 0x30: model->blockSizeInKBytes = 512; break;
+	    }
+	  }
+
+	  /*
+	  switch(model->pageSizeInBytes) {
+	  case 1024: pageSize = AT91C_HSMC4_PAGESIZE_1056_Bytes; break;
+	  case 2048: pageSize = AT91C_HSMC4_PAGESIZE_2112_Bytes; break;
+	  case 4096: pageSize = AT91C_HSMC4_PAGESIZE_4224_Bytes; break;
+	  default: ;//TRACE_ERROR("Unsupportted page size for NAND Flash Controller\n\r");
+	  }
+	  // This part sets the SMC registers? this is it?
+
+	  cfg.bits.pagesize = pageSize;
+	  cfg.bits.dtomul = 7;
+	  cfg.bits.edgectrl = 1;
+	  cfg.bits.dtocyc = 0xF;
+	  cfg.bits.rspare = 1;
+
+	  *CFG = cfg;
+	  //HSMC4_SetMode(pageSize | AT91C_HSMC4_DTOMUL_1048576 | AT91C_HSMC4_EDGECTRL | AT91C_HSMC4_DTOCYC | AT91C_HSMC4_RSPARE); // ?????????????
+	  */
+	}
+	break;
+      }
+    }
+
+    // Check if chip has been detected
+    if (found) {
+      return 0;
+    }
+    else {
+      return NandCommon_ERROR_UNKNOWNMODEL;
+    }
+  }
+
+  command void Hpl.reset(){
+    /*
+      1. Enable CE
+      2. Write reset command
+      3. wait for ready
+      4. Disable CE
+     */
+
+    // Enable CE
+    call NandFlash_CE.clr();
+
+    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
+    //WRTIE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
+    WaitReady();
+    // Disable CE
+
+    call NandFlash_CE.set();
+  }
+
+  command uint32_t Hpl.readId(){
+    uint32_t chipId;
+
+    // enable CE 
+    call NandFlash_CE.clr();
+
+    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
+    //WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
+    WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, 0);
+
+    chipId  = READ_DATA8(BOARD_NF_DATA_ADDR);
+    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 8;
+    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 16;
+    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 24;
+
+    // Disable CE 
+    call NandFlash_CE.set();
+
+    return chipId;
+  }
+
+  command uint16_t Hpl.getDeviceSizeInBlocks(const struct NandFlashModel * model){
+    return ((1024) / model->blockSizeInKBytes) * model->deviceSizeInMegaBytes;
+  }
+
+  command uint32_t Hpl.getDeviceSizeInPages(const struct NandFlashModel *model){
+    return (uint32_t) call Hpl.getDeviceSizeInBlocks(model) * call Hpl.getBlockSizeInPages(model);
+  }
+
+  command uint8_t Hpl.eraseBlock(const struct RawNandFlash *raw, uint16_t block){
+
+    uint8_t numTries = NUMERASETRIES;
+
+    while (numTries > 0) {
+
+        if (!EraseBlock(raw, block)) {
+
+            return 0;
+        }
+        numTries--;
+    }
+
+    return NandCommon_ERROR_BADBLOCK;
+
+  }
+
+  command uint16_t Hpl.getBlockSizeInPages(const struct NandFlashModel *model){
+    return model->blockSizeInKBytes * 1024 / model->pageSizeInBytes;
+  }
+
+  command uint8_t Hpl.readPage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
+
+    uint32_t colAddress;
+    uint32_t rowAddress;
+    uint8_t hasSmallBlocks;
+    uint32_t pageSpareSize;
+
+    hasSmallBlocks = call Hpl.hasSmallBlocks(MODEL(raw));
+    pageSpareSize = call Hpl.getPageSpareSize(MODEL(raw));
+
+    // Calculate actual address of the page
+    rowAddress = (uint32_t) block * numPagesPerBlock /*call Hpl.getBlockSizeInPages(MODEL(raw))*/ + page;
+
+    // Start operation
+    //ENABLE_CE(raw);
+    // Enable CE
+    call NandFlash_CE.clr();
+
+    if (data) {
+      colAddress = 0;
+    } else {
+      // to read spare area in sequential access
+      colAddress = pageDataSize;
+    }
+
+    // Use either small blocks or large blocks data area read
+    if (hasSmallBlocks) {
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_A);
+      WriteColumnAddress(raw, colAddress);
+      WriteRowAddress(raw, rowAddress);
+    } else {
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
+      WriteColumnAddress(raw, colAddress);
+      WriteRowAddress(raw, rowAddress);
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_2);
+    }
+
+    // Wait for the nand to be ready
+    WaitReady();
+
+    //pageDataSize = call Hpl.getPageDataSize(MODEL(raw));
+    call Draw.drawInt(200, 220, colAddress, 1, COLOR_BLUE);
+    call Draw.drawInt(100, 220, pageDataSize, 1, COLOR_BLUE);
+    call Draw.drawInt(rowAddress*15, 200, rowAddress, 1, COLOR_BLUE);
+
+    // Read data area if needed
+    if (data) {
+
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
+
+      if(pageDataSize != 2048){
+	call Draw.drawInt(200, 240, page, 1, COLOR_GREEN);
+      }
+
+      ReadData(raw, (uint8_t *) data, pageDataSize);
+
+      if (spare) {
+	//call Leds.led2Toggle();
+	ReadData(raw, (uint8_t *) spare, pageSpareSize);
+      }
+    }
+    else {
+      // Read spare area only
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
+      ReadData(raw, (uint8_t *) spare, pageSpareSize);
+    }
+
+
+    // Disable CE
+    //DISABLE_CE(raw);
+    // Disable CE
+    call NandFlash_CE.set();
+
+    return 0;
+  }
+
+  //------------------------------------------------------------------------------
+  /// Reads the bad block marker inside a spare area buffer using the provided
+  /// scheme.
+  /// \param scheme  Pointer to a NandSpareScheme instance.
+  /// \param spare  Spare area buffer.
+  /// \param marker  Pointer to the variable to store the bad block marker.
+  //------------------------------------------------------------------------------
+  command void Hpl.readBadBlockMarker(const struct NandSpareScheme *scheme, const uint8_t *spare, uint8_t *marker){
+    *marker = spare[scheme->badBlockMarkerPosition];
+  }
+
+  //------------------------------------------------------------------------------
+  /// Modifies the bad block marker inside a spare area, using the given scheme.
+  /// \param scheme  Pointer to a NandSpareScheme instance.
+  /// \param spare  Spare area buffer.
+  /// \param marker  Bad block marker to write.
+  //------------------------------------------------------------------------------
+  command void Hpl.writeBadBlockMarker(const struct NandSpareScheme *scheme, uint8_t *spare, uint8_t marker){
+    spare[scheme->badBlockMarkerPosition] = marker;
+  }
+
+  command uint32_t Hpl.getDeviceSizeInBytes(const struct NandFlashModel *model){
+    return ((uint32_t) model->deviceSizeInMegaBytes) << 20;
+  }
+
+  command uint32_t Hpl.getBlockSizeInBytes(const struct NandFlashModel *model){
+    return (model->blockSizeInKBytes *1024);
+  }
+
+  command uint8_t Hpl.writePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
+    uint8_t numTries = NUMWRITETRIES;
+    while (numTries > 0) {
+      if (!WritePage(raw, block, page, data, spare)) {
+	return 0;
+      }
+      numTries--;
+    }
+    return NandCommon_ERROR_BADBLOCK;
+  }
+
+  command uint8_t Hpl.copyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){
+    uint8_t numTries = NUMCOPYTRIES;
+    while (numTries) {
+      if (!CopyPage(raw, sourceBlock, sourcePage, destBlock, destPage)) {
+	return 0;
+      }
+      numTries--;
+    }
+    return NandCommon_ERROR_BADBLOCK;
+  }
+
+  command uint8_t Hpl.copyBlock(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t destBlock){
+    uint32_t i;
+    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
+    // Copy all pages
+    for (i=0; i < numPages; i++) {
+      if (call Hpl.copyPage(raw, sourceBlock, i, destBlock, i)) {
+	return NandCommon_ERROR_BADBLOCK;
+      }
+    }
+    return 0;
+  }
+
+  uint16_t totalReadFromBlock = 0;
+  uint16_t readBlock = 0;
+  void* readData;
+  const struct RawNandFlash saveRaw;
+
+  void readBlockTask(){
+
+    uint8_t error;
+
+    call Draw.fill(COLOR_WHITE);
+
+    error = call Hpl.readPage(&saveRaw, readBlock, totalReadFromBlock, readData, 0);//ECC(skipBlock), block, i, data, 0);
+    totalReadFromBlock ++;
+
+    if (error) {
+      //call Leds.led0Toggle();
+      return;
+    }else if(totalReadFromBlock < numPagesPerBlock){
+      //call Draw.drawInt(totalReadFromBlock*15, 170, totalReadFromBlock, 1, COLOR_BLUE);
+      //call Draw.drawInt(200, 185, numPagesPerBlock, 1, COLOR_BLUE);
+      readData = (void *) ((uint8_t *) readData + pageDataSize);
+      readBlockTask();
+      //call ReadBlockTimer.startOneShot(5);
+    }else{
+      call Leds.led2Toggle();
+    }
+    
+  }
+
+  command uint8_t Hpl.readBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
+    //uint16_t i, error;
+
+    totalReadFromBlock = 0;
+
+    memcpy((void*)&saveRaw, (void*)raw, sizeof(struct RawNandFlash));
+
+    readBlock = block;
+    readData = data;
+
+    readBlockTask();
+
+    return 0;
+  }
+
+  command uint8_t Hpl.writeBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
+    uint8_t error, i;
+
+    for(i=0; i<numPagesPerBlock; i++){
+      call Draw.fill(COLOR_YELLOW);
+      error = call Hpl.writePage(raw, block, i, data, 0);
+      data = (void *) ((uint8_t *) data + pageDataSize);
+    }
+
+    return 0;
+  }
+
+
+  event void ReadBlockTimer.fired(){
+    readBlockTask();
+  }
+}
diff --git a/tos/platforms/sam3u_ek/chips/nandflash-working/working.Pnc b/tos/platforms/sam3u_ek/chips/nandflash-working/working.Pnc
new file mode 100644
index 00000000..839028d9
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/nandflash-working/working.Pnc
@@ -0,0 +1,1025 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins university
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "HplNandFlash.h"
+
+module HplNandFlashP{
+  provides interface HplNandFlash as Hpl;
+
+  uses interface HplSam3uPeripheralClockCntl as HSMC4ClockControl;
+
+  uses interface GeneralIO as NandFlash_CE;
+  uses interface GeneralIO as NandFlash_RB;
+
+  uses interface HplSam3uGeneralIOPin as NandFlash_OE;
+  uses interface HplSam3uGeneralIOPin as NandFlash_WE;
+  uses interface HplSam3uGeneralIOPin as NandFlash_CLE;
+  uses interface HplSam3uGeneralIOPin as NandFlash_ALE;
+
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data00;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data01;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data02;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data03;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data04;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data05;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data06;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data07;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data08;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data09;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data10;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data11;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data12;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data13;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data14;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data15;
+
+  uses interface Leds;
+  uses interface Draw;
+
+  uses interface Timer<TMilli> as ReadBlockTimer;
+
+}
+implementation {
+
+/// Nand flash commands
+#define COMMAND_READ_1                  0x00
+#define COMMAND_READ_2                  0x30
+#define COMMAND_COPYBACK_READ_1         0x00
+#define COMMAND_COPYBACK_READ_2         0x35
+#define COMMAND_COPYBACK_PROGRAM_1      0x85
+#define COMMAND_COPYBACK_PROGRAM_2      0x10
+#define COMMAND_RANDOM_OUT              0x05
+#define COMMAND_RANDOM_OUT_2            0xE0
+#define COMMAND_RANDOM_IN               0x85
+#define COMMAND_READID                  0x90
+#define COMMAND_WRITE_1                 0x80
+#define COMMAND_WRITE_2                 0x10
+#define COMMAND_ERASE_1                 0x60
+#define COMMAND_ERASE_2                 0xD0
+#define COMMAND_STATUS                  0x70
+#define COMMAND_RESET                   0xFF
+
+#define COMMAND_READ_A                  0x00
+#define COMMAND_READ_C                  0x50
+
+#define STATUS_READY                    (1 << 6)
+#define STATUS_ERROR                    (1 << 0)
+
+
+#define WRITE_COMMAND(commandAddress, u_command) \
+    {*((volatile uint8_t *) commandAddress) = (uint8_t) u_command;}
+#define WRITE_COMMAND16(commandAddress, u_command) \
+    {*((volatile uint16_t *) commandAddress) = (uint16_t) u_command;}
+#define WRITE_ADDRESS(addressAddress, address) \
+    {*((volatile uint8_t *) addressAddress) = (uint8_t) address;}
+#define WRITE_ADDRESS16(addressAddress, address) \
+    {*((volatile uint16_t *) addressAddress) = (uint16_t) address;}
+#define WRITE_DATA8(dataAddress, data) \
+    {*((volatile uint8_t *) dataAddress) = (uint8_t) data;}
+#define READ_DATA8(dataAddress) \
+    (*((volatile uint8_t *) dataAddress))
+#define WRITE_DATA16(dataAddress, data) \
+    {*((volatile uint16_t *) dataAddress) = (uint16_t) data;}
+#define READ_DATA16(dataAddress) \
+    (*((volatile uint16_t *) dataAddress))
+
+/// Number of tries for erasing a block
+#define NUMERASETRIES           2
+/// Number of tries for writing a block
+#define NUMWRITETRIES           2
+/// Number of tries for copying a block
+#define NUMCOPYTRIES            2
+
+/// Number of NandFlash models inside the list.
+#define NandFlashModelList_SIZE         58
+
+#define MODEL(raw)  ((struct NandFlashModel *) raw)
+
+  //------------------------------------------------------------------------------
+  //         Exported variables
+  //------------------------------------------------------------------------------
+  
+  //extern const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE];
+
+  /// Spare area placement scheme for 256 byte pages.
+  const struct NandSpareScheme nandSpareScheme256 = {
+
+    // Bad block marker is at position #5
+    5,
+    // 3 ecc bytes
+    3,
+    // Ecc bytes positions
+    {0, 1, 2},
+    // 4 extra bytes
+    4,
+    // Extra bytes positions
+    {3, 4, 6, 7}
+  };
+
+  /// Spare area placement scheme for 512 byte pages.
+  const struct NandSpareScheme nandSpareScheme512 = {
+
+    // Bad block marker is at position #5
+    5,
+    // 6 ecc bytes
+    6,
+    // Ecc bytes positions
+    {0, 1, 2, 3, 6, 7},
+    // 8 extra bytes
+    8,
+    // Extra bytes positions
+    {8, 9, 10, 11, 12, 13, 14, 15}
+  };
+
+  /// Spare area placement scheme for 2048 byte pages.
+  const struct NandSpareScheme nandSpareScheme2048 = {
+
+    // Bad block marker is at position #0
+    0,
+    // 24 ecc bytes
+    24, 
+    // Ecc bytes positions
+    {40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
+     59, 60, 61, 62, 63},
+    // 38 extra bytes
+    38,
+    // Extra bytes positions
+    {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
+     22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39}
+  };
+
+  /// List of NandFlash models which can be recognized by the software.
+  const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE] = {
+
+    // |  ID    | Options                 | Page    | Mo  | Block   |BlkPg   |DevBlk
+    {0x6e,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
+    {0x64,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
+    {0x6b,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xe8,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
+    {0xec,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
+    {0xea,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
+    {0xd5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xe3,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xe5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xd6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
+
+    {0x39,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
+    {0xe6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
+    {0x49,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},
+    {0x59,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},
+
+    {0x33,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
+    {0x73,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
+    {0x43,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
+    {0x53,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
+                                                             
+    {0x35,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
+    {0x75,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
+    {0x45,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
+    {0x55,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
+                                                             
+    {0x36,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
+    {0x76,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
+    {0x46,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
+    {0x56,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
+                                                             
+    {0x78,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
+    {0x39,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
+    {0x79,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
+    {0x72,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+    {0x49,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+    {0x74,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+    {0x59,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+                                                             
+    {0x71,   NandFlashModel_DATABUS8,    512,    256,   16,    &nandSpareScheme512},
+	
+    // Large blocks devices. Parameters must be fetched from the extended I
+#define OPTIONS     NandFlashModel_COPYBACK                   
+                                                                                          
+    {0xA2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    {0xF2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    {0xB2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    {0xC2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    
+    {0xA1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
+    {0xF1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
+    {0xB1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
+    {0xC1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
+                                                                  
+    {0xAA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
+    {0xDA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,   &nandSpareScheme2048},                                              
+    {0xBA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
+    {0xCA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
+	                                                                
+    {0xAC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
+    {0xDC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
+    {0xBC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
+    {0xCC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
+                                                                  
+    {0xA3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
+    {0xD3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
+    {0xB3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
+    {0xC3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
+                                                                  
+    {0xA5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
+    {0xD5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
+    {0xB5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
+    {0xC5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
+  };
+
+  uint16_t numBlocks;
+  uint32_t memSize;
+  uint32_t blockSize;
+  uint16_t numPagesPerBlock;
+  uint16_t pageDataSize;
+
+  void WaitReady(){
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);
+    while ((READ_DATA8(BOARD_NF_DATA_ADDR) & STATUS_READY) != STATUS_READY);
+  }
+
+  uint8_t GetDataBusWidth(const struct NandFlashModel *model){
+    return (model->options&NandFlashModel_DATABUS16)? 16: 8;
+  }
+
+  void WriteColumnAddress(const struct RawNandFlash *raw, uint16_t columnAddress){
+    
+    uint16_t pageSize = call Hpl.getPageDataSize(MODEL(raw));
+
+    call Draw.drawInt(200, 250, pageSize, 1, COLOR_BLACK);
+
+    /* Check the data bus width of the NandFlash */
+    if (GetDataBusWidth(MODEL(raw)) == 16) {
+      /* Div 2 is because we address in word and not in byte */
+      columnAddress >>= 1;
+    }
+    while (pageSize > 0) {
+      if (GetDataBusWidth(MODEL(raw)) == 16) {
+	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
+      } else {
+	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
+      }
+      pageSize >>= 8;
+      columnAddress >>= 8;
+    }
+  }
+
+  //------------------------------------------------------------------------------
+  /// Sends the row address to the NandFlash chip.
+  /// \param raw  Pointer to a RawNandFlash instance.
+  /// \param rowAddress  Row address to send.
+  //------------------------------------------------------------------------------
+  void WriteRowAddress(const struct RawNandFlash *raw, uint32_t rowAddress){
+
+    uint32_t numPages = call Hpl.getDeviceSizeInPages(MODEL(raw));
+
+    while (numPages > 0) {
+      if (GetDataBusWidth(MODEL(raw)) == 16) {
+	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
+      } else {
+	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
+      }
+      numPages >>= 8;
+      rowAddress >>= 8;
+    }
+  }
+
+  void WriteData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
+    uint32_t i;
+    // Check the data bus width of the NandFlash
+    if (GetDataBusWidth(MODEL(raw)) == 16) {
+      uint16_t *buffer16 = (uint16_t *) buffer;
+      size >>= 1;
+      for(i=0; i < size; i++) {
+	call Draw.drawInt(i*15,50, i, 1, COLOR_RED);
+	WRITE_DATA16(BOARD_NF_DATA_ADDR, buffer16[i]);
+      }
+    } else {
+      for(i=0; i < size; i++) {
+	WRITE_DATA8(BOARD_NF_DATA_ADDR, buffer[i]);
+      }
+    }
+  }
+
+  uint8_t count = 0;
+
+  void ReadData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
+    uint16_t i;
+    // Check the chip data bus width
+
+    count ++;
+
+    if (GetDataBusWidth(MODEL(raw)) == 16) {
+      uint16_t *buffer16 = (uint16_t *) buffer;
+
+      size >>= 1;
+
+      //call Draw.drawInt(200,130, size, 1, COLOR_YELLOW);
+
+      for (i=0; i < size; i++) {
+	call Draw.drawInt(i*15,50, i, 1, COLOR_BLACK);
+	buffer16[i] = READ_DATA16(BOARD_NF_DATA_ADDR);
+      }
+
+      call Draw.drawInt(100,150, buffer16[0], 1, COLOR_BLACK);
+      call Draw.drawInt(200,150, buffer16[1], 1, COLOR_BLACK);
+
+    } else {
+
+      for (i=0; i < size; i++) {
+	buffer[i] = READ_DATA8(BOARD_NF_DATA_ADDR);
+      }
+    }
+
+    call Draw.drawInt(count*15,130, count, 1, COLOR_BLUE);
+  }
+
+  uint8_t IsOperationComplete(const struct RawNandFlash *raw){
+    uint8_t status;
+
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);
+
+    status = READ_DATA8(BOARD_NF_DATA_ADDR);
+
+    if (((status & STATUS_READY) != STATUS_READY) || ((status & STATUS_ERROR) != 0)) {
+        return 0;
+    }
+    return 1;
+  }
+
+  uint8_t EraseBlock( const struct RawNandFlash *raw, unsigned short block){
+    uint8_t error = 0;
+    uint32_t rowAddress;
+
+    // Calculate address used for erase
+    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw));
+
+    // Start erase
+    //ENABLE_CE(raw);
+    // Enable CE
+    call NandFlash_CE.clr();
+
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_1);
+    WriteRowAddress(raw, rowAddress);
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_2);
+
+    WaitReady();
+
+    if (!IsOperationComplete(raw)) {
+      error = NandCommon_ERROR_CANNOTERASE;
+    }
+
+    //DISABLE_CE(raw);
+    // Disable CE
+    call NandFlash_CE.set();
+
+    return error;
+    
+  }
+
+  uint8_t WritePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
+    
+    uint32_t pageSize = call Hpl.getPageDataSize(MODEL(raw));
+    uint32_t spareDataSize = call Hpl.getPageSpareSize(MODEL(raw));
+    uint16_t dummyByte;
+    uint32_t rowAddress;
+    uint8_t error = 0;
+
+    // Calculate physical address of the page
+    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw)) + page;
+
+    // Start write operation
+    //ENABLE_CE(raw);
+    // Enable CE;
+    call NandFlash_CE.clr();
+
+    // Write data area if needed
+    if (data) {
+
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
+      WriteColumnAddress(raw, 0);
+      WriteRowAddress(raw, rowAddress);
+      WriteData(raw, (uint8_t *) data, pageSize);
+
+      //call Draw.drawInt(50, 50, (uint8_t)data[0], 1, COLOR_RED);
+
+      // Spare is written here as well since it is more efficient
+      if (spare) {
+	WriteData(raw, (uint8_t *) spare, spareDataSize);
+      }
+      else {
+	// Note: special case when ECC parity generation. 
+	// ECC results are available as soon as the counter reaches the end of the main area.
+	// But when reach PageSize for an example, it could not generate last ECC_PR, The 
+	// workaround is to receive PageSize+1 word.
+	ReadData(raw, (uint8_t *) (&dummyByte), 2);
+      }
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);
+
+      WaitReady();
+
+      if (!IsOperationComplete(raw)) {
+	error = NandCommon_ERROR_CANNOTWRITE;
+      }
+    }
+
+    // Write spare area alone if needed
+    if (spare && !data) {
+
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
+      WriteColumnAddress(raw, pageSize);
+      WriteRowAddress(raw, rowAddress);
+      WriteData(raw, (uint8_t *) spare, spareDataSize);
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);
+
+      WaitReady();
+      if (!IsOperationComplete(raw)) {
+	error = NandCommon_ERROR_CANNOTWRITE;
+      }
+    }
+
+    // Disable chip
+    //DISABLE_CE(raw);
+    // Disable CE
+    call NandFlash_CE.set();
+
+    return error;
+
+  }
+
+  uint8_t CopyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){
+
+    uint32_t sourceRow, destRow;
+    uint8_t error = 0;
+    uint8_t data[NandCommon_MAXPAGEDATASIZE];
+    uint8_t spare[NandCommon_MAXPAGESPARESIZE];
+    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
+    sourceRow = sourceBlock * numPages + sourcePage;
+    destRow = destBlock * numPages + destPage;
+
+    if (call Hpl.readPage(raw, sourceBlock, sourcePage, data, spare)) {
+      error = NandCommon_ERROR_CANNOTREAD;
+    } else if (call Hpl.writePage(raw, destBlock, destPage, data, spare)) {
+      error = NandCommon_ERROR_CANNOTWRITE;
+    }
+
+    return error;    
+  }
+
+  void configureNandFlash(uint8_t busWidth){
+    // Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
+    // set clock
+    // set smc registers
+    volatile smc_setup_t *SETUP = (volatile smc_setup_t *) (0x400E0084 + 0x0);
+    smc_setup_t setup = *SETUP;
+    volatile smc_pulse_t *PULSE = (volatile smc_pulse_t *) (0x400E0084 + 0x4);
+    smc_pulse_t pulse = *PULSE;
+    volatile smc_cycle_t *CYCLE = (volatile smc_cycle_t *) (0x400E0084 + 0x8);
+    smc_cycle_t cycle = *CYCLE;
+    volatile smc_timings_t *TIMINGS = (volatile smc_timings_t *) (0x400E0084 + 0xC);
+    smc_timings_t timings = *TIMINGS;
+    volatile smc_mode_t *MODE = (volatile smc_mode_t *) (0x400E0084 + 0x10);
+    smc_mode_t mode = *MODE;
+
+    // start clock for register access
+    call HSMC4ClockControl.disable();
+    call HSMC4ClockControl.enable();
+
+    setup.bits.nwe_setup = 0;
+    setup.bits.ncs_wr_setup = 1;
+    setup.bits.nrd_setup = 0;
+    setup.bits.ncs_rd_setup = 1;
+
+    *SETUP = setup;
+
+    pulse.bits.nwe_pulse = 2;
+    pulse.bits.ncs_wr_pulse = 3;
+    pulse.bits.nrd_pulse = 3;
+    pulse.bits.ncs_rd_pulse = 4;
+
+    *PULSE = pulse;
+
+    cycle.bits.nwe_cycle = 4;
+    cycle.bits.nrd_cycle = 7;
+
+    *CYCLE = cycle;
+
+    timings.bits.tclr = 1;
+    timings.bits.tadl = 2;
+    timings.bits.tar = 1;
+    timings.bits.trr = 1;
+    timings.bits.twb = 2;
+    timings.bits.rbnsel = 7;
+    timings.bits.nfsel = 1;
+
+    *TIMINGS = timings;
+
+    if(busWidth == 8){
+      mode.bits.dbw = 0;
+      mode.bits.read_mode = 1;
+      mode.bits.write_mode = 1;
+
+      *MODE = mode;
+
+    }else if(busWidth == 16){
+      mode.bits.dbw = 1;
+      mode.bits.read_mode = 1;
+      mode.bits.write_mode = 1;
+
+      *MODE = mode;
+      
+    }
+  }
+
+  void configurePsRam(){
+    // TODO: Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
+    // TODO: Does Atmel code work with this disabled?
+  }
+
+  void configureNandPins(){
+
+    // Pin setting
+
+    call NandFlash_CE.makeOutput();
+    call NandFlash_RB.makeInput();
+
+    call NandFlash_OE.disablePioControl();
+    call NandFlash_WE.disablePioControl();
+    call NandFlash_CLE.disablePioControl();
+    call NandFlash_ALE.disablePioControl();
+
+    call NandFlash_OE.selectPeripheralA();
+    call NandFlash_WE.selectPeripheralA();
+    call NandFlash_CLE.selectPeripheralA();
+    call NandFlash_ALE.selectPeripheralA();
+
+    call NandFlash_Data00.disablePioControl();
+    call NandFlash_Data01.disablePioControl();
+    call NandFlash_Data02.disablePioControl();
+    call NandFlash_Data03.disablePioControl();
+    call NandFlash_Data04.disablePioControl();
+    call NandFlash_Data05.disablePioControl();
+    call NandFlash_Data06.disablePioControl();
+    call NandFlash_Data07.disablePioControl();
+    call NandFlash_Data08.disablePioControl();
+    call NandFlash_Data09.disablePioControl();
+    call NandFlash_Data10.disablePioControl();
+    call NandFlash_Data11.disablePioControl();
+    call NandFlash_Data12.disablePioControl();
+    call NandFlash_Data13.disablePioControl();
+    call NandFlash_Data14.disablePioControl();
+    call NandFlash_Data15.disablePioControl();
+
+    call NandFlash_Data00.selectPeripheralA();
+    call NandFlash_Data01.selectPeripheralA();
+    call NandFlash_Data02.selectPeripheralA();
+    call NandFlash_Data03.selectPeripheralA();
+    call NandFlash_Data04.selectPeripheralA();
+    call NandFlash_Data05.selectPeripheralA();
+    call NandFlash_Data06.selectPeripheralA();
+    call NandFlash_Data07.selectPeripheralA();
+    call NandFlash_Data08.selectPeripheralA();
+    call NandFlash_Data09.selectPeripheralA();
+    call NandFlash_Data10.selectPeripheralA();
+    call NandFlash_Data11.selectPeripheralA();
+    call NandFlash_Data12.selectPeripheralA();
+    call NandFlash_Data13.selectPeripheralA();
+    call NandFlash_Data14.selectPeripheralA();
+    call NandFlash_Data15.selectPeripheralB(); // PB6
+  }
+
+  command uint8_t Hpl.hasSmallBlocks(const struct NandFlashModel *model){
+    return (model->pageSizeInBytes <= 512 )? 1: 0;
+  }
+
+  //------------------------------------------------------------------------------
+  /// Returns the size of the data area of a page in bytes.
+  /// \param model  Pointer to a NandFlashModel instance.
+  //------------------------------------------------------------------------------
+  command uint16_t Hpl.getPageDataSize(const struct NandFlashModel *model){
+    return model->pageSizeInBytes;
+  }
+
+  //------------------------------------------------------------------------------
+  /// Returns the size of the spare area of a page in bytes.
+  /// \param model  Pointer to a NandFlashModel instance.
+  //------------------------------------------------------------------------------
+  command uint8_t Hpl.getPageSpareSize(const struct NandFlashModel *model){
+    return (model->pageSizeInBytes>>5); /// Spare size is 16/512 of data size
+  }
+
+  command void Hpl.init(struct RawNandFlash *HplNand, const struct NandFlashModel *model, uint32_t commandAddr, uint32_t addressAddr, uint32_t dataAddr){
+    uint32_t chipId;
+    uint8_t error;
+    uint8_t busWidth = 16;
+
+    //configurePsRam();
+    configureNandFlash(busWidth);
+    configureNandPins();
+
+    HplNand -> commandAddress = commandAddr;
+    HplNand -> addressAddress = addressAddr;
+    HplNand -> dataAddress = dataAddr;
+
+    call Hpl.reset();
+
+    if(!model){
+      chipId = call Hpl.readId();
+      error = call Hpl.findNandModel(nandFlashModelList, NandFlashModelList_SIZE, &(HplNand->model), chipId);
+    }else{
+      HplNand -> model = *model;
+    }
+
+    if(!error){
+    } else {
+    }
+
+    busWidth = 0;
+    busWidth = GetDataBusWidth(MODEL(HplNand));
+    configureNandFlash(busWidth);
+    
+    memSize = call Hpl.getDeviceSizeInBytes(MODEL(HplNand));
+    blockSize = call Hpl.getBlockSizeInBytes(MODEL(HplNand));
+    numBlocks = call Hpl.getDeviceSizeInBlocks(MODEL(HplNand));
+    pageDataSize = call Hpl.getPageDataSize(MODEL(HplNand));
+    numPagesPerBlock = call Hpl.getBlockSizeInPages(MODEL(HplNand));    
+
+    call Draw.drawInt(150, 20, busWidth, 1, COLOR_BLACK);
+    call Draw.drawInt(150, 40, pageDataSize, 1, COLOR_BLACK);
+    call Draw.drawInt(150, 60, memSize, 1, COLOR_BLACK);
+    call Draw.drawInt(150, 80, numPagesPerBlock, 1, COLOR_BLACK);
+
+  }
+
+  command uint8_t Hpl.findNandModel(const struct NandFlashModel *modelList, uint8_t size, struct NandFlashModel *model, uint32_t chipId){
+
+    uint8_t i, found = 0;
+
+    //volatile smc_cfg_t *CFG = (volatile smc_cfg_t *) (0x400E0000);
+    //smc_cfg_t cfg = *CFG;
+
+    uint8_t id2 = (uint8_t)(chipId>>8);
+    uint8_t id4 = (uint8_t)(chipId>>24);
+
+    //call Draw.drawInt(100, 60, chipId, 1, COLOR_YELLOW);
+    //call Draw.drawInt(100, 80, id2, 1, COLOR_YELLOW);
+    
+    for(i=0; i<size; i++) {
+      if(modelList[i].deviceId == id2) {
+	found = 1;
+
+	if(model) {
+
+	  memcpy(model, &modelList[i], sizeof(struct NandFlashModel));
+
+	  if(model->blockSizeInKBytes == 0 || model->pageSizeInBytes == 0) {
+	    //TRACE_DEBUG("Fetch from ID4(0x%.2x):\r\n", id4);
+	    /// Fetch from the extended ID4
+	    /// ID4 D5  D4 BlockSize || D1  D0  PageSize
+	    ///     0   0   64K      || 0   0   1K
+	    ///     0   1   128K     || 0   1   2K
+	    ///     1   0   256K     || 1   0   4K
+	    ///     1   1   512K     || 1   1   8k
+	    switch(id4 & 0x03) {
+	    case 0x00: model->pageSizeInBytes = 1024; break;
+	    case 0x01: model->pageSizeInBytes = 2048; break;
+	    case 0x02: model->pageSizeInBytes = 4096; break;
+	    case 0x03: model->pageSizeInBytes = 8192; break;
+	    }
+	    switch(id4 & 0x30) {
+	    case 0x00: model->blockSizeInKBytes = 64;  break;
+	    case 0x10: model->blockSizeInKBytes = 128; break;
+	    case 0x20: model->blockSizeInKBytes = 256; break;
+	    case 0x30: model->blockSizeInKBytes = 512; break;
+	    }
+	  }
+
+	  /*
+	  switch(model->pageSizeInBytes) {
+	  case 1024: pageSize = AT91C_HSMC4_PAGESIZE_1056_Bytes; break;
+	  case 2048: pageSize = AT91C_HSMC4_PAGESIZE_2112_Bytes; break;
+	  case 4096: pageSize = AT91C_HSMC4_PAGESIZE_4224_Bytes; break;
+	  default: ;//TRACE_ERROR("Unsupportted page size for NAND Flash Controller\n\r");
+	  }
+	  // This part sets the SMC registers? this is it?
+
+	  cfg.bits.pagesize = pageSize;
+	  cfg.bits.dtomul = 7;
+	  cfg.bits.edgectrl = 1;
+	  cfg.bits.dtocyc = 0xF;
+	  cfg.bits.rspare = 1;
+
+	  *CFG = cfg;
+	  //HSMC4_SetMode(pageSize | AT91C_HSMC4_DTOMUL_1048576 | AT91C_HSMC4_EDGECTRL | AT91C_HSMC4_DTOCYC | AT91C_HSMC4_RSPARE); // ?????????????
+	  */
+	}
+	break;
+      }
+    }
+
+    // Check if chip has been detected
+    if (found) {
+      return 0;
+    }
+    else {
+      return NandCommon_ERROR_UNKNOWNMODEL;
+    }
+  }
+
+  command void Hpl.reset(){
+    /*
+      1. Enable CE
+      2. Write reset command
+      3. wait for ready
+      4. Disable CE
+     */
+
+    // Enable CE
+    call NandFlash_CE.clr();
+
+    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
+    //WRTIE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
+    WaitReady();
+    // Disable CE
+
+    call NandFlash_CE.set();
+  }
+
+  command uint32_t Hpl.readId(){
+    uint32_t chipId;
+
+    // enable CE 
+    call NandFlash_CE.clr();
+
+    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
+    //WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
+    WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, 0);
+
+    chipId  = READ_DATA8(BOARD_NF_DATA_ADDR);
+    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 8;
+    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 16;
+    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 24;
+
+    // Disable CE 
+    call NandFlash_CE.set();
+
+    return chipId;
+  }
+
+  command uint16_t Hpl.getDeviceSizeInBlocks(const struct NandFlashModel * model){
+    return ((1024) / model->blockSizeInKBytes) * model->deviceSizeInMegaBytes;
+  }
+
+  command uint32_t Hpl.getDeviceSizeInPages(const struct NandFlashModel *model){
+    return (uint32_t) call Hpl.getDeviceSizeInBlocks(model) * call Hpl.getBlockSizeInPages(model);
+  }
+
+  command uint8_t Hpl.eraseBlock(const struct RawNandFlash *raw, uint16_t block){
+
+    uint8_t numTries = NUMERASETRIES;
+
+    while (numTries > 0) {
+
+        if (!EraseBlock(raw, block)) {
+
+            return 0;
+        }
+        numTries--;
+    }
+
+    return NandCommon_ERROR_BADBLOCK;
+
+  }
+
+  command uint16_t Hpl.getBlockSizeInPages(const struct NandFlashModel *model){
+    return model->blockSizeInKBytes * 1024 / model->pageSizeInBytes;
+  }
+
+  command uint8_t Hpl.readPage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
+
+    uint32_t colAddress;
+    uint32_t rowAddress;
+    uint8_t hasSmallBlocks;
+    uint32_t pageSpareSize;
+
+    hasSmallBlocks = call Hpl.hasSmallBlocks(MODEL(raw));
+    pageSpareSize = call Hpl.getPageSpareSize(MODEL(raw));
+
+    // Calculate actual address of the page
+    rowAddress = (uint32_t) block * numPagesPerBlock /*call Hpl.getBlockSizeInPages(MODEL(raw))*/ + page;
+
+    // Start operation
+    //ENABLE_CE(raw);
+    // Enable CE
+    call NandFlash_CE.clr();
+
+    if (data) {
+      colAddress = 0;
+    } else {
+      // to read spare area in sequential access
+      colAddress = pageDataSize;
+    }
+
+    // Use either small blocks or large blocks data area read
+    if (hasSmallBlocks) {
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_A);
+      WriteColumnAddress(raw, colAddress);
+      WriteRowAddress(raw, rowAddress);
+    } else {
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
+      WriteColumnAddress(raw, colAddress);
+      WriteRowAddress(raw, rowAddress);
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_2);
+    }
+
+    // Wait for the nand to be ready
+    WaitReady();
+
+    //pageDataSize = call Hpl.getPageDataSize(MODEL(raw));
+    call Draw.drawInt(200, 220, colAddress, 1, COLOR_BLUE);
+    call Draw.drawInt(100, 220, pageDataSize, 1, COLOR_BLUE);
+    call Draw.drawInt(rowAddress*15, 200, rowAddress, 1, COLOR_BLUE);
+
+    // Read data area if needed
+    if (data) {
+
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
+
+      if(pageDataSize != 2048){
+	call Draw.drawInt(200, 240, page, 1, COLOR_GREEN);
+      }
+
+      ReadData(raw, (uint8_t *) data, pageDataSize);
+
+      if (spare) {
+	//call Leds.led2Toggle();
+	ReadData(raw, (uint8_t *) spare, pageSpareSize);
+      }
+    }
+    else {
+      // Read spare area only
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
+      ReadData(raw, (uint8_t *) spare, pageSpareSize);
+    }
+
+
+    // Disable CE
+    //DISABLE_CE(raw);
+    // Disable CE
+    call NandFlash_CE.set();
+
+    return 0;
+  }
+
+  //------------------------------------------------------------------------------
+  /// Reads the bad block marker inside a spare area buffer using the provided
+  /// scheme.
+  /// \param scheme  Pointer to a NandSpareScheme instance.
+  /// \param spare  Spare area buffer.
+  /// \param marker  Pointer to the variable to store the bad block marker.
+  //------------------------------------------------------------------------------
+  command void Hpl.readBadBlockMarker(const struct NandSpareScheme *scheme, const uint8_t *spare, uint8_t *marker){
+    *marker = spare[scheme->badBlockMarkerPosition];
+  }
+
+  //------------------------------------------------------------------------------
+  /// Modifies the bad block marker inside a spare area, using the given scheme.
+  /// \param scheme  Pointer to a NandSpareScheme instance.
+  /// \param spare  Spare area buffer.
+  /// \param marker  Bad block marker to write.
+  //------------------------------------------------------------------------------
+  command void Hpl.writeBadBlockMarker(const struct NandSpareScheme *scheme, uint8_t *spare, uint8_t marker){
+    spare[scheme->badBlockMarkerPosition] = marker;
+  }
+
+  command uint32_t Hpl.getDeviceSizeInBytes(const struct NandFlashModel *model){
+    return ((uint32_t) model->deviceSizeInMegaBytes) << 20;
+  }
+
+  command uint32_t Hpl.getBlockSizeInBytes(const struct NandFlashModel *model){
+    return (model->blockSizeInKBytes *1024);
+  }
+
+  command uint8_t Hpl.writePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
+    uint8_t numTries = NUMWRITETRIES;
+    while (numTries > 0) {
+      if (!WritePage(raw, block, page, data, spare)) {
+	return 0;
+      }
+      numTries--;
+    }
+    return NandCommon_ERROR_BADBLOCK;
+  }
+
+  command uint8_t Hpl.copyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){
+    uint8_t numTries = NUMCOPYTRIES;
+    while (numTries) {
+      if (!CopyPage(raw, sourceBlock, sourcePage, destBlock, destPage)) {
+	return 0;
+      }
+      numTries--;
+    }
+    return NandCommon_ERROR_BADBLOCK;
+  }
+
+  command uint8_t Hpl.copyBlock(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t destBlock){
+    uint32_t i;
+    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
+    // Copy all pages
+    for (i=0; i < numPages; i++) {
+      if (call Hpl.copyPage(raw, sourceBlock, i, destBlock, i)) {
+	return NandCommon_ERROR_BADBLOCK;
+      }
+    }
+    return 0;
+  }
+
+  uint16_t totalReadFromBlock = 0;
+  uint16_t readBlock = 0;
+  void* readData;
+  const struct RawNandFlash saveRaw;
+
+  void readBlockTask(){
+
+    uint8_t error;
+
+    call Draw.fill(COLOR_WHITE);
+
+    error = call Hpl.readPage(&saveRaw, readBlock, totalReadFromBlock, readData, 0);//ECC(skipBlock), block, i, data, 0);
+    totalReadFromBlock ++;
+
+    if (error) {
+      //call Leds.led0Toggle();
+      return;
+    }else if(totalReadFromBlock < numPagesPerBlock){
+      //call Draw.drawInt(totalReadFromBlock*15, 170, totalReadFromBlock, 1, COLOR_BLUE);
+      //call Draw.drawInt(200, 185, numPagesPerBlock, 1, COLOR_BLUE);
+      readData = (void *) ((uint8_t *) readData + pageDataSize);
+      readBlockTask();
+      //call ReadBlockTimer.startOneShot(5);
+    }else{
+      call Leds.led2Toggle();
+    }
+    
+  }
+
+  command uint8_t Hpl.readBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
+    //uint16_t i, error;
+
+    totalReadFromBlock = 0;
+
+    memcpy((void*)&saveRaw, (void*)raw, sizeof(struct RawNandFlash));
+
+    readBlock = block;
+    readData = data;
+
+    readBlockTask();
+
+    return 0;
+  }
+
+  command uint8_t Hpl.writeBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
+    uint8_t error, i;
+
+    for(i=0; i<numPagesPerBlock; i++){
+      call Draw.fill(COLOR_WHITE);
+      error = call Hpl.writePage(raw, block, i, data, 0);
+      data = (void *) ((uint8_t *) data + pageDataSize);
+    }
+
+    return 0;
+  }
+
+
+  event void ReadBlockTimer.fired(){
+    readBlockTask();
+  }
+}
diff --git a/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlash.h b/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlash.h
new file mode 100644
index 00000000..6a866341
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlash.h
@@ -0,0 +1,183 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef HPLNANDFLASH_H
+#define HPLNANDFLASH_H
+
+/// \page "NandFlashModel options"
+/// This page lists the possible options for a NandFlash chip.
+/// 
+/// !Options
+/// - NandFlashModel_DATABUS8
+/// - NandFlashModel_DATABUS16
+/// - NandFlashModel_COPYBACK
+
+/// Indicates the Nand uses an 8-bit databus.
+#define NandFlashModel_DATABUS8     (0 << 0)
+
+/// Indicates the Nand uses a 16-bit databus.
+#define NandFlashModel_DATABUS16    (1 << 0)
+
+/// The Nand supports the copy-back function (internal page-to-page copy).
+#define NandFlashModel_COPYBACK     (1 << 1)
+
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+//         Types
+//------------------------------------------------------------------------------
+
+/// Maximum number of blocks in a device
+#define NandCommon_MAXNUMBLOCKS             1024//2048
+
+/// Maximum number of pages in one block
+#define NandCommon_MAXNUMPAGESPERBLOCK      64
+
+/// Maximum size of the data area of one page, in bytes.
+#define NandCommon_MAXPAGEDATASIZE          2048
+
+/// Maximum size of the spare area of one page, in bytes.
+#define NandCommon_MAXPAGESPARESIZE         64
+
+/// Maximum number of ecc bytes stored in the spare for one single page.
+#define NandCommon_MAXSPAREECCBYTES         24
+
+/// Maximum number of extra free bytes inside the spare area of a page.
+#define NandCommon_MAXSPAREEXTRABYTES       38
+
+
+struct NandSpareScheme {
+
+    uint8_t badBlockMarkerPosition;
+    uint8_t numEccBytes;
+    uint8_t eccBytesPositions[NandCommon_MAXSPAREECCBYTES];
+    uint8_t numExtraBytes;
+    uint8_t extraBytesPositions[NandCommon_MAXSPAREEXTRABYTES];
+};
+
+//------------------------------------------------------------------------------
+/// Describes a particular model of NandFlash device.
+//------------------------------------------------------------------------------
+struct NandFlashModel {
+
+    /// Identifier for the device.
+    uint8_t deviceId;
+    /// Special options for the NandFlash.
+    uint8_t options;
+    /// Size of the data area of a page, in bytes.
+    uint16_t pageSizeInBytes;
+    /// Size of the device in MB.
+    uint16_t deviceSizeInMegaBytes;
+    /// Size of one block in kilobytes.
+    uint16_t blockSizeInKBytes;
+    /// Spare area placement scheme
+    const struct NandSpareScheme *scheme;
+};
+
+
+struct RawNandFlash {
+
+    /// Model describing this NandFlash characteristics.
+    struct NandFlashModel model;
+    /// Address for sending commands to the NandFlash.
+    uint32_t commandAddress;
+    /// Address for sending addresses to the NandFlash
+    uint32_t addressAddress;
+    /// Address for sending data to the NandFlash.
+    uint32_t dataAddress;
+    /// Pin used to enable the NandFlash chip.
+  //Pin pinChipEnable;
+    /// Pin used to monitor the ready/busy signal from the NandFlash.
+    //Pin pinReadyBusy;
+};
+
+
+/// No more blocks can be allocated for a write operation.
+#define NandCommon_ERROR_NOMOREBLOCKS       1
+
+/// The desired logical block has no current physical mapping.
+#define NandCommon_ERROR_BLOCKNOTMAPPED     2
+
+/// Access if out-of-bounds.
+#define NandCommon_ERROR_OUTOFBOUNDS        3
+
+/// There are no block having the desired property.
+#define NandCommon_ERROR_NOBLOCKFOUND       4
+
+/// The nandflash device has no logical mapping information on it.
+#define NandCommon_ERROR_MAPPINGNOTFOUND    5
+
+/// A read operation cannot be carried out.
+#define NandCommon_ERROR_CANNOTREAD         6
+
+/// A write operation cannot be carried out.
+#define NandCommon_ERROR_CANNOTWRITE        7
+
+/// NandFlash chip model cannot be recognized.
+#define NandCommon_ERROR_UNKNOWNMODEL       8
+
+/// Page data is corrupted according to ECC
+#define NandCommon_ERROR_CORRUPTEDDATA      9
+
+/// Block is not in the required status.
+#define NandCommon_ERROR_WRONGSTATUS        10
+
+/// Device has no logical mapping stored in it
+#define NandCommon_ERROR_NOMAPPING          11
+
+/// The block being accessed is bad and must be replaced
+#define NandCommon_ERROR_BADBLOCK           12
+
+/// Failed to perform an erase operation
+#define NandCommon_ERROR_CANNOTERASE        13
+
+/// A hardware copyback operation failed.
+#define NandCommon_ERROR_CANNOTCOPY         14
+
+/// HW Ecc Not compatible with the Nand Model
+#define NandCommon_ERROR_ECC_NOT_COMPATIBLE 15
+
+// -------- HSMC4_CFG : (HSMC4 Offset: 0x0) Configuration Register -------- 
+#define AT91C_HSMC4_PAGESIZE  (0x3 <<  0) // (HSMC4) PAGESIZE field description
+#define         AT91C_HSMC4_PAGESIZE_528_Bytes            (0x0) // (HSMC4) 512 bytes plus 16 bytes page size
+#define         AT91C_HSMC4_PAGESIZE_1056_Bytes           (0x1) // (HSMC4) 1024 bytes plus 32 bytes page size
+#define         AT91C_HSMC4_PAGESIZE_2112_Bytes           (0x2) // (HSMC4) 2048 bytes plus 64 bytes page size
+#define         AT91C_HSMC4_PAGESIZE_4224_Bytes           (0x3) // (HSMC4) 4096 bytes plus 128 bytes page size
+
+/// Address for transferring command bytes to the nandflash.
+#define BOARD_NF_COMMAND_ADDR   0x61400000
+/// Address for transferring address bytes to the nandflash.
+#define BOARD_NF_ADDRESS_ADDR   0x61200000
+/// Address for transferring data bytes to the nandflash.
+#define BOARD_NF_DATA_ADDR      0x61000000
+
+
+#endif // HPLNANDFLASH_H
diff --git a/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlash.nc b/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlash.nc
new file mode 100644
index 00000000..1ff667c7
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlash.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <HplNandFlash.h>
+
+interface HplNandFlash{
+  //command void writeColumnAddress();
+  //command void writeRowAddress();
+  //command void isOperationComplete();
+  //command void writeData();
+  //command void readData();
+
+  //command void eraseBlock_i(); // internal functions 
+  //command void writePage_i(); // internal functions
+  //command void copyPage_i(); // internal functions
+
+  command void init(struct RawNandFlash *HplNand, const struct NandFlashModel *model, uint32_t commandAddr, uint32_t addressAddr, uint32_t dataAddr);
+  command uint8_t findNandModel(const struct NandFlashModel *modelList, uint8_t size, struct NandFlashModel *model, uint32_t chipId);
+  command void reset();
+  command uint32_t readId();
+  command uint8_t eraseBlock(const struct RawNandFlash *raw, uint16_t block);
+  command uint8_t readPage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare);
+  command uint8_t writePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare);
+  command uint8_t copyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage);
+  command uint8_t copyBlock(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t destBlock);
+
+
+
+  command uint16_t getPageDataSize(const struct NandFlashModel *model);
+  command uint32_t getDeviceSizeInPages(const struct NandFlashModel *model);
+  command uint16_t getBlockSizeInPages(const struct NandFlashModel *model);
+  command uint8_t getPageSpareSize(const struct NandFlashModel *model);
+  command uint8_t hasSmallBlocks(const struct NandFlashModel *model);
+  command uint16_t getDeviceSizeInBlocks(const struct NandFlashModel * model);
+  command void readBadBlockMarker(const struct NandSpareScheme *scheme, const uint8_t *spare, uint8_t *marker);
+  command void writeBadBlockMarker(const struct NandSpareScheme *scheme, uint8_t *spare, uint8_t marker);
+  command uint32_t getDeviceSizeInBytes(const struct NandFlashModel *model);
+  command uint32_t getBlockSizeInBytes(const struct NandFlashModel *model);
+  command uint8_t readBlock(const struct RawNandFlash *raw, uint16_t block, void *data);
+  command uint8_t writeBlock(const struct RawNandFlash *raw, uint16_t block, void *data);
+}
diff --git a/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlashC.nc b/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlashC.nc
new file mode 100644
index 00000000..fd9d39a7
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlashC.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+configuration HplNandFlashC{
+  provides interface HplNandFlash;
+
+}
+implementation{
+  components HplNandFlashP;
+  HplNandFlash = HplNandFlashP;
+
+  components HplSam3uClockC;
+  HplNandFlashP.HSMC4ClockControl -> HplSam3uClockC.HSMC4PPCntl;
+
+  components HplSam3uGeneralIOC as IO;
+  HplNandFlashP.NandFlash_CE -> IO.PioA16;
+  HplNandFlashP.TempPin -> IO.PioC12;
+  HplNandFlashP.NandFlash_RB -> IO.PioB24;
+
+  HplNandFlashP.NandFlash_OE -> IO.HplPioB17;
+  HplNandFlashP.NandFlash_WE -> IO.HplPioB18;
+  HplNandFlashP.NandFlash_CLE -> IO.HplPioB22;
+  HplNandFlashP.NandFlash_ALE -> IO.HplPioB21;
+  
+  HplNandFlashP.NandFlash_Data00 -> IO.HplPioB9;
+  HplNandFlashP.NandFlash_Data01 -> IO.HplPioB10;
+  HplNandFlashP.NandFlash_Data02 -> IO.HplPioB11;
+  HplNandFlashP.NandFlash_Data03 -> IO.HplPioB12;
+  HplNandFlashP.NandFlash_Data04 -> IO.HplPioB13;
+  HplNandFlashP.NandFlash_Data05 -> IO.HplPioB14;
+  HplNandFlashP.NandFlash_Data06 -> IO.HplPioB15;
+  HplNandFlashP.NandFlash_Data07 -> IO.HplPioB16;
+
+  HplNandFlashP.NandFlash_Data08 -> IO.HplPioB25;
+  HplNandFlashP.NandFlash_Data09 -> IO.HplPioB26;
+  HplNandFlashP.NandFlash_Data10 -> IO.HplPioB27;
+  HplNandFlashP.NandFlash_Data11 -> IO.HplPioB28;
+  HplNandFlashP.NandFlash_Data12 -> IO.HplPioB29;
+  HplNandFlashP.NandFlash_Data13 -> IO.HplPioB30;
+  HplNandFlashP.NandFlash_Data14 -> IO.HplPioB31;
+  HplNandFlashP.NandFlash_Data15 -> IO.HplPioB6;
+
+  components LedsC, LcdC;
+  HplNandFlashP.Leds -> LedsC;
+  HplNandFlashP.Draw -> LcdC;
+
+  components new TimerMilliC() as TimerC;
+  HplNandFlashP.ReadBlockTimer -> TimerC;
+}
diff --git a/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlashP.nc b/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlashP.nc
new file mode 100644
index 00000000..b28c8d32
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/nandflash/HplNandFlashP.nc
@@ -0,0 +1,1037 @@
+/*
+ * Copyright (c) 2009 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "HplNandFlash.h"
+
+module HplNandFlashP{
+  provides interface HplNandFlash as Hpl;
+
+  uses interface HplSam3uPeripheralClockCntl as HSMC4ClockControl;
+
+  uses interface GeneralIO as NandFlash_CE;
+  uses interface GeneralIO as TempPin;
+  uses interface GeneralIO as NandFlash_RB;
+
+  uses interface HplSam3uGeneralIOPin as NandFlash_OE;
+  uses interface HplSam3uGeneralIOPin as NandFlash_WE;
+  uses interface HplSam3uGeneralIOPin as NandFlash_CLE;
+  uses interface HplSam3uGeneralIOPin as NandFlash_ALE;
+
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data00;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data01;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data02;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data03;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data04;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data05;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data06;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data07;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data08;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data09;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data10;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data11;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data12;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data13;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data14;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data15;
+
+  uses interface Leds;
+  uses interface Draw;
+
+  uses interface Timer<TMilli> as ReadBlockTimer;
+
+}
+implementation {
+
+/// Nand flash commands
+#define COMMAND_READ_1                  0x00
+#define COMMAND_READ_2                  0x30
+#define COMMAND_COPYBACK_READ_1         0x00
+#define COMMAND_COPYBACK_READ_2         0x35
+#define COMMAND_COPYBACK_PROGRAM_1      0x85
+#define COMMAND_COPYBACK_PROGRAM_2      0x10
+#define COMMAND_RANDOM_OUT              0x05
+#define COMMAND_RANDOM_OUT_2            0xE0
+#define COMMAND_RANDOM_IN               0x85
+#define COMMAND_READID                  0x90
+#define COMMAND_WRITE_1                 0x80
+#define COMMAND_WRITE_2                 0x10
+#define COMMAND_ERASE_1                 0x60
+#define COMMAND_ERASE_2                 0xD0
+#define COMMAND_STATUS                  0x70
+#define COMMAND_RESET                   0xFF
+
+#define COMMAND_READ_A                  0x00
+#define COMMAND_READ_C                  0x50
+
+#define STATUS_READY                    (1 << 6)
+#define STATUS_ERROR                    (1 << 0)
+
+
+#define WRITE_COMMAND(commandAddress, u_command) \
+    {*((volatile uint8_t *) commandAddress) = (uint8_t) u_command;}
+#define WRITE_COMMAND16(commandAddress, u_command) \
+    {*((volatile uint16_t *) commandAddress) = (uint16_t) u_command;}
+#define WRITE_ADDRESS(addressAddress, address) \
+    {*((volatile uint8_t *) addressAddress) = (uint8_t) address;}
+#define WRITE_ADDRESS16(addressAddress, address) \
+    {*((volatile uint16_t *) addressAddress) = (uint16_t) address;}
+#define WRITE_DATA8(dataAddress, data) \
+    {*((volatile uint8_t *) dataAddress) = (uint8_t) data;}
+#define READ_DATA8(dataAddress) \
+    (*((volatile uint8_t *) dataAddress))
+#define WRITE_DATA16(dataAddress, data) \
+    {*((volatile uint16_t *) dataAddress) = (uint16_t) data;}
+#define READ_DATA16(dataAddress) \
+    (*((volatile uint16_t *) dataAddress))
+
+/// Number of tries for erasing a block
+#define NUMERASETRIES           2
+/// Number of tries for writing a block
+#define NUMWRITETRIES           2
+/// Number of tries for copying a block
+#define NUMCOPYTRIES            2
+
+/// Number of NandFlash models inside the list.
+#define NandFlashModelList_SIZE         58
+
+#define MODEL(raw)  ((struct NandFlashModel *) raw)
+
+  //------------------------------------------------------------------------------
+  //         Exported variables
+  //------------------------------------------------------------------------------
+  
+  //extern const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE];
+
+  /// Spare area placement scheme for 256 byte pages.
+  const struct NandSpareScheme nandSpareScheme256 = {
+
+    // Bad block marker is at position #5
+    5,
+    // 3 ecc bytes
+    3,
+    // Ecc bytes positions
+    {0, 1, 2},
+    // 4 extra bytes
+    4,
+    // Extra bytes positions
+    {3, 4, 6, 7}
+  };
+
+  /// Spare area placement scheme for 512 byte pages.
+  const struct NandSpareScheme nandSpareScheme512 = {
+
+    // Bad block marker is at position #5
+    5,
+    // 6 ecc bytes
+    6,
+    // Ecc bytes positions
+    {0, 1, 2, 3, 6, 7},
+    // 8 extra bytes
+    8,
+    // Extra bytes positions
+    {8, 9, 10, 11, 12, 13, 14, 15}
+  };
+
+  /// Spare area placement scheme for 2048 byte pages.
+  const struct NandSpareScheme nandSpareScheme2048 = {
+
+    // Bad block marker is at position #0
+    0,
+    // 24 ecc bytes
+    24, 
+    // Ecc bytes positions
+    {40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
+     59, 60, 61, 62, 63},
+    // 38 extra bytes
+    38,
+    // Extra bytes positions
+    {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
+     22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39}
+  };
+
+  /// List of NandFlash models which can be recognized by the software.
+  const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE] = {
+
+    // |  ID    | Options                 | Page    | Mo  | Block   |BlkPg   |DevBlk
+    {0x6e,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
+    {0x64,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
+    {0x6b,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xe8,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
+    {0xec,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
+    {0xea,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
+    {0xd5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xe3,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xe5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xd6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
+
+    {0x39,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
+    {0xe6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
+    {0x49,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},
+    {0x59,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},
+
+    {0x33,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
+    {0x73,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
+    {0x43,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
+    {0x53,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
+                                                             
+    {0x35,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
+    {0x75,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
+    {0x45,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
+    {0x55,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
+                                                             
+    {0x36,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
+    {0x76,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
+    {0x46,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
+    {0x56,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
+                                                             
+    {0x78,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
+    {0x39,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
+    {0x79,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
+    {0x72,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+    {0x49,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+    {0x74,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+    {0x59,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+                                                             
+    {0x71,   NandFlashModel_DATABUS8,    512,    256,   16,    &nandSpareScheme512},
+	
+    // Large blocks devices. Parameters must be fetched from the extended I
+#define OPTIONS     NandFlashModel_COPYBACK                   
+                                                                                          
+    {0xA2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    {0xF2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    {0xB2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    {0xC2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    
+    {0xA1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
+    {0xF1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
+    {0xB1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
+    {0xC1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
+                                                                  
+    {0xAA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
+    {0xDA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,   &nandSpareScheme2048},                                              
+    {0xBA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
+    {0xCA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
+	                                                                
+    {0xAC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
+    {0xDC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
+    {0xBC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
+    {0xCC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
+                                                                  
+    {0xA3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
+    {0xD3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
+    {0xB3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
+    {0xC3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
+                                                                  
+    {0xA5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
+    {0xD5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
+    {0xB5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
+    {0xC5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
+  };
+
+  uint16_t numBlocks;
+  uint32_t memSize;
+  uint32_t blockSize;
+  uint16_t numPagesPerBlock;
+  uint16_t pageDataSize;
+
+  void WaitReady(){
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);
+    while ((READ_DATA8(BOARD_NF_DATA_ADDR) & STATUS_READY) != STATUS_READY);
+  }
+
+  uint8_t GetDataBusWidth(const struct NandFlashModel *model){
+    return (model->options&NandFlashModel_DATABUS16)? 16: 8;
+  }
+
+  void WriteColumnAddress(const struct RawNandFlash *raw, uint16_t columnAddress){
+    
+    uint16_t pageSize = call Hpl.getPageDataSize(MODEL(raw));
+
+    call Draw.drawInt(200, 250, pageSize, 1, COLOR_BLACK);
+
+    /* Check the data bus width of the NandFlash */
+    if (GetDataBusWidth(MODEL(raw)) == 16) {
+      /* Div 2 is because we address in word and not in byte */
+      columnAddress >>= 1;
+    }
+    while (pageSize > 0) {
+      if (GetDataBusWidth(MODEL(raw)) == 16) {
+	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
+      } else {
+	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
+      }
+      pageSize >>= 8;
+      columnAddress >>= 8;
+    }
+  }
+
+  //------------------------------------------------------------------------------
+  /// Sends the row address to the NandFlash chip.
+  /// \param raw  Pointer to a RawNandFlash instance.
+  /// \param rowAddress  Row address to send.
+  //------------------------------------------------------------------------------
+  void WriteRowAddress(const struct RawNandFlash *raw, uint32_t rowAddress){
+
+    uint32_t numPages = call Hpl.getDeviceSizeInPages(MODEL(raw));
+
+    while (numPages > 0) {
+      if (GetDataBusWidth(MODEL(raw)) == 16) {
+	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
+      } else {
+	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
+      }
+      numPages >>= 8;
+      rowAddress >>= 8;
+    }
+  }
+
+  void WriteData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
+    uint32_t i;
+    // Check the data bus width of the NandFlash
+    if (GetDataBusWidth(MODEL(raw)) == 16) {
+      uint16_t *buffer16 = (uint16_t *) buffer;
+      size >>= 1;
+      for(i=0; i < size; i++) {
+	call Draw.drawInt(15,50, buffer16[i], 1, COLOR_RED);
+	WRITE_DATA16(BOARD_NF_DATA_ADDR, buffer16[i]);
+      }
+    } else {
+      for(i=0; i < size; i++) {
+	WRITE_DATA8(BOARD_NF_DATA_ADDR, buffer[i]);
+      }
+    }
+  }
+
+  uint8_t count = 0;
+
+  void ReadData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
+    uint32_t i;
+    // Check the chip data bus width
+
+    count ++;
+
+    if (GetDataBusWidth(MODEL(raw)) == 16) {
+      uint16_t *buffer16 = (uint16_t *) buffer;
+
+      size >>= 1;
+
+      call Draw.drawInt(200,130, size, 1, COLOR_YELLOW);
+
+      for (i=0 ; i < size ; i++) {
+	buffer16[i] = READ_DATA16(BOARD_NF_DATA_ADDR);
+	call Draw.drawInt(150,50, buffer16[i] /*READ_DATA16(BOARD_NF_DATA_ADDR)*/, 1, COLOR_BLACK);
+      }
+
+      //call Draw.drawInt(100,150, buffer16[0], 1, COLOR_BLACK);
+      call Draw.drawInt(200,150, buffer16[3], 1, COLOR_BLACK);
+      //call Draw.drawInt(200,150, (uint32_t)buffer16, 1, COLOR_BLACK);
+
+    } else {
+      for (i=0; i < size; i++) {
+	buffer[i] = READ_DATA8(BOARD_NF_DATA_ADDR);
+      }
+    }
+
+    call Draw.drawInt(count*15,130, count, 1, COLOR_GREEN);
+
+  }
+
+  uint8_t IsOperationComplete(const struct RawNandFlash *raw){
+    uint8_t status;
+
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);
+
+    status = READ_DATA8(BOARD_NF_DATA_ADDR);
+
+    if (((status & STATUS_READY) != STATUS_READY) || ((status & STATUS_ERROR) != 0)) {
+        return 0;
+    }
+    return 1;
+  }
+
+  uint8_t EraseBlock( const struct RawNandFlash *raw, unsigned short block){
+    uint8_t error = 0;
+    uint32_t rowAddress;
+
+    // Calculate address used for erase
+    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw));
+
+    // Start erase
+    //ENABLE_CE(raw);
+    // Enable CE
+    call NandFlash_CE.clr();
+
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_1);
+    WriteRowAddress(raw, rowAddress);
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_2);
+
+    WaitReady();
+
+    if (!IsOperationComplete(raw)) {
+      error = NandCommon_ERROR_CANNOTERASE;
+    }
+
+    //DISABLE_CE(raw);
+    // Disable CE
+    call NandFlash_CE.set();
+
+    return error;
+    
+  }
+
+  uint8_t WritePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
+    
+    uint32_t pageSize = call Hpl.getPageDataSize(MODEL(raw));
+    uint32_t spareDataSize = call Hpl.getPageSpareSize(MODEL(raw));
+    uint16_t dummyByte;
+    uint32_t rowAddress;
+    uint8_t error = 0;
+
+    //uint8_t* temp = (uint8_t*)data;
+
+    // Calculate physical address of the page
+    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw)) + page;
+
+    // Start write operation
+    //ENABLE_CE(raw);
+    // Enable CE;
+    call NandFlash_CE.clr();
+
+    // Write data area if needed
+    if (data) {
+
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
+      WriteColumnAddress(raw, 0);
+      WriteRowAddress(raw, rowAddress);
+      WriteData(raw, (uint8_t *) data, pageSize);
+
+      //call Draw.drawInt(50, 50, (uint8_t)temp[0], 1, COLOR_RED);
+
+      // Spare is written here as well since it is more efficient
+      if (spare) {
+	WriteData(raw, (uint8_t *) spare, spareDataSize);
+      }
+      else {
+	// Note: special case when ECC parity generation. 
+	// ECC results are available as soon as the counter reaches the end of the main area.
+	// But when reach PageSize for an example, it could not generate last ECC_PR, The 
+	// workaround is to receive PageSize+1 word.
+	ReadData(raw, (uint8_t *) (&dummyByte), 2);
+      }
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);
+
+      WaitReady();
+
+      if (!IsOperationComplete(raw)) {
+	error = NandCommon_ERROR_CANNOTWRITE;
+      }
+    }
+
+    // Write spare area alone if needed
+    if (spare && !data) {
+
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
+      WriteColumnAddress(raw, pageSize);
+      WriteRowAddress(raw, rowAddress);
+      WriteData(raw, (uint8_t *) spare, spareDataSize);
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);
+
+      WaitReady();
+      if (!IsOperationComplete(raw)) {
+	error = NandCommon_ERROR_CANNOTWRITE;
+      }
+    }
+
+    // Disable chip
+    //DISABLE_CE(raw);
+    // Disable CE
+    call NandFlash_CE.set();
+
+    return error;
+
+  }
+
+  uint8_t CopyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){
+
+    uint32_t sourceRow, destRow;
+    uint8_t error = 0;
+    uint8_t data[NandCommon_MAXPAGEDATASIZE];
+    uint8_t spare[NandCommon_MAXPAGESPARESIZE];
+    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
+    sourceRow = sourceBlock * numPages + sourcePage;
+    destRow = destBlock * numPages + destPage;
+
+    if (call Hpl.readPage(raw, sourceBlock, sourcePage, data, spare)) {
+      error = NandCommon_ERROR_CANNOTREAD;
+    } else if (call Hpl.writePage(raw, destBlock, destPage, data, spare)) {
+      error = NandCommon_ERROR_CANNOTWRITE;
+    }
+
+    return error;    
+  }
+
+  void configureNandFlash(uint8_t busWidth){
+    // Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
+    // set clock
+    // set smc registers
+    volatile smc_setup_t *SETUP = (volatile smc_setup_t *) (0x400E0084 + 0x0);
+    smc_setup_t setup = *SETUP;
+    volatile smc_pulse_t *PULSE = (volatile smc_pulse_t *) (0x400E0084 + 0x4);
+    smc_pulse_t pulse = *PULSE;
+    volatile smc_cycle_t *CYCLE = (volatile smc_cycle_t *) (0x400E0084 + 0x8);
+    smc_cycle_t cycle = *CYCLE;
+    volatile smc_timings_t *TIMINGS = (volatile smc_timings_t *) (0x400E0084 + 0xC);
+    smc_timings_t timings = *TIMINGS;
+    volatile smc_mode_t *MODE = (volatile smc_mode_t *) (0x400E0084 + 0x10);
+    smc_mode_t mode = *MODE;
+
+    // start clock for register access
+    call HSMC4ClockControl.disable();
+    call HSMC4ClockControl.enable();
+
+    setup.bits.nwe_setup = 0;
+    setup.bits.ncs_wr_setup = 1;
+    setup.bits.nrd_setup = 0;
+    setup.bits.ncs_rd_setup = 1;
+
+    *SETUP = setup;
+
+    pulse.bits.nwe_pulse = 2;
+    pulse.bits.ncs_wr_pulse = 3;
+    pulse.bits.nrd_pulse = 3;
+    pulse.bits.ncs_rd_pulse = 4;
+
+    *PULSE = pulse;
+
+    cycle.bits.nwe_cycle = 4;
+    cycle.bits.nrd_cycle = 7;
+
+    *CYCLE = cycle;
+
+    timings.bits.tclr = 1;
+    timings.bits.tadl = 2;
+    timings.bits.tar = 1;
+    timings.bits.trr = 1;
+    timings.bits.twb = 2;
+    timings.bits.rbnsel = 7;
+    timings.bits.nfsel = 1;
+
+    *TIMINGS = timings;
+
+    if(busWidth == 8){
+      mode.bits.dbw = 0;
+      mode.bits.read_mode = 1;
+      mode.bits.write_mode = 1;
+
+      *MODE = mode;
+
+    }else if(busWidth == 16){
+      mode.bits.dbw = 1;
+      mode.bits.read_mode = 1;
+      mode.bits.write_mode = 1;
+
+      *MODE = mode;
+      
+    }
+  }
+
+  void configurePsRam(){
+    // TODO: Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
+    // TODO: Does Atmel code work with this disabled?
+  }
+
+  void configureNandPins(){
+
+    // Pin setting
+
+    call NandFlash_CE.makeOutput();
+    call TempPin.makeInput();
+    call NandFlash_RB.makeInput();
+
+    call NandFlash_OE.disablePioControl();
+    call NandFlash_WE.disablePioControl();
+    call NandFlash_CLE.disablePioControl();
+    call NandFlash_ALE.disablePioControl();
+
+    call NandFlash_OE.selectPeripheralA();
+    call NandFlash_WE.selectPeripheralA();
+    call NandFlash_CLE.selectPeripheralA();
+    call NandFlash_ALE.selectPeripheralA();
+
+    call NandFlash_Data00.disablePioControl();
+    call NandFlash_Data01.disablePioControl();
+    call NandFlash_Data02.disablePioControl();
+    call NandFlash_Data03.disablePioControl();
+    call NandFlash_Data04.disablePioControl();
+    call NandFlash_Data05.disablePioControl();
+    call NandFlash_Data06.disablePioControl();
+    call NandFlash_Data07.disablePioControl();
+    call NandFlash_Data08.disablePioControl();
+    call NandFlash_Data09.disablePioControl();
+    call NandFlash_Data10.disablePioControl();
+    call NandFlash_Data11.disablePioControl();
+    call NandFlash_Data12.disablePioControl();
+    call NandFlash_Data13.disablePioControl();
+    call NandFlash_Data14.disablePioControl();
+    call NandFlash_Data15.disablePioControl();
+
+    call NandFlash_Data00.selectPeripheralA();
+    call NandFlash_Data01.selectPeripheralA();
+    call NandFlash_Data02.selectPeripheralA();
+    call NandFlash_Data03.selectPeripheralA();
+    call NandFlash_Data04.selectPeripheralA();
+    call NandFlash_Data05.selectPeripheralA();
+    call NandFlash_Data06.selectPeripheralA();
+    call NandFlash_Data07.selectPeripheralA();
+    call NandFlash_Data08.selectPeripheralA();
+    call NandFlash_Data09.selectPeripheralA();
+    call NandFlash_Data10.selectPeripheralA();
+    call NandFlash_Data11.selectPeripheralA();
+    call NandFlash_Data12.selectPeripheralA();
+    call NandFlash_Data13.selectPeripheralA();
+    call NandFlash_Data14.selectPeripheralA();
+    call NandFlash_Data15.selectPeripheralB(); // PB6
+  }
+
+  command uint8_t Hpl.hasSmallBlocks(const struct NandFlashModel *model){
+    return (model->pageSizeInBytes <= 512 )? 1: 0;
+  }
+
+  //------------------------------------------------------------------------------
+  /// Returns the size of the data area of a page in bytes.
+  /// \param model  Pointer to a NandFlashModel instance.
+  //------------------------------------------------------------------------------
+  command uint16_t Hpl.getPageDataSize(const struct NandFlashModel *model){
+    return model->pageSizeInBytes;
+  }
+
+  //------------------------------------------------------------------------------
+  /// Returns the size of the spare area of a page in bytes.
+  /// \param model  Pointer to a NandFlashModel instance.
+  //------------------------------------------------------------------------------
+  command uint8_t Hpl.getPageSpareSize(const struct NandFlashModel *model){
+    return (model->pageSizeInBytes>>5); /// Spare size is 16/512 of data size
+  }
+
+  command void Hpl.init(struct RawNandFlash *HplNand, const struct NandFlashModel *model, uint32_t commandAddr, uint32_t addressAddr, uint32_t dataAddr){
+    uint32_t chipId;
+    uint8_t error;
+    uint8_t busWidth = 16;
+
+    configureNandFlash(busWidth);
+    configureNandPins();
+
+    HplNand -> commandAddress = commandAddr;
+    HplNand -> addressAddress = addressAddr;
+    HplNand -> dataAddress = dataAddr;
+
+    call Hpl.reset();
+
+    if(!model){
+      chipId = call Hpl.readId();
+      error = call Hpl.findNandModel(nandFlashModelList, NandFlashModelList_SIZE, &(HplNand->model), chipId);
+    }else{
+      HplNand -> model = *model;
+    }
+
+    if(!error){
+    } else {
+    }
+
+    busWidth = 0;
+    busWidth = GetDataBusWidth(MODEL(HplNand));
+    configureNandFlash(busWidth);
+
+    memSize = call Hpl.getDeviceSizeInBytes(MODEL(HplNand));
+    blockSize = call Hpl.getBlockSizeInBytes(MODEL(HplNand));
+    numBlocks = call Hpl.getDeviceSizeInBlocks(MODEL(HplNand));
+    pageDataSize = call Hpl.getPageDataSize(MODEL(HplNand));
+    numPagesPerBlock = call Hpl.getBlockSizeInPages(MODEL(HplNand));    
+
+    call Draw.drawInt(150, 20, busWidth, 1, COLOR_BLACK);
+    call Draw.drawInt(150, 40, pageDataSize, 1, COLOR_BLACK);
+    call Draw.drawInt(150, 60, memSize, 1, COLOR_BLACK);
+    call Draw.drawInt(150, 80, numPagesPerBlock, 1, COLOR_BLACK);
+
+  }
+
+  command uint8_t Hpl.findNandModel(const struct NandFlashModel *modelList, uint8_t size, struct NandFlashModel *model, uint32_t chipId){
+
+    uint8_t i, found = 0;
+
+    //volatile smc_cfg_t *CFG = (volatile smc_cfg_t *) (0x400E0000);
+    //smc_cfg_t cfg = *CFG;
+
+    uint8_t id2 = (uint8_t)(chipId>>8);
+    uint8_t id4 = (uint8_t)(chipId>>24);
+
+    //call Draw.drawInt(100, 60, chipId, 1, COLOR_YELLOW);
+    //call Draw.drawInt(100, 80, id2, 1, COLOR_YELLOW);
+    
+    for(i=0; i<size; i++) {
+      if(modelList[i].deviceId == id2) {
+	found = 1;
+
+	if(model) {
+
+	  memcpy(model, &modelList[i], sizeof(struct NandFlashModel));
+
+	  if(model->blockSizeInKBytes == 0 || model->pageSizeInBytes == 0) {
+	    //TRACE_DEBUG("Fetch from ID4(0x%.2x):\r\n", id4);
+	    /// Fetch from the extended ID4
+	    /// ID4 D5  D4 BlockSize || D1  D0  PageSize
+	    ///     0   0   64K      || 0   0   1K
+	    ///     0   1   128K     || 0   1   2K
+	    ///     1   0   256K     || 1   0   4K
+	    ///     1   1   512K     || 1   1   8k
+	    switch(id4 & 0x03) {
+	    case 0x00: model->pageSizeInBytes = 1024; break;
+	    case 0x01: model->pageSizeInBytes = 2048; break;
+	    case 0x02: model->pageSizeInBytes = 4096; break;
+	    case 0x03: model->pageSizeInBytes = 8192; break;
+	    }
+	    switch(id4 & 0x30) {
+	    case 0x00: model->blockSizeInKBytes = 64;  break;
+	    case 0x10: model->blockSizeInKBytes = 128; break;
+	    case 0x20: model->blockSizeInKBytes = 256; break;
+	    case 0x30: model->blockSizeInKBytes = 512; break;
+	    }
+	  }
+
+	  /*
+	  switch(model->pageSizeInBytes) {
+	  case 1024: pageSize = AT91C_HSMC4_PAGESIZE_1056_Bytes; break;
+	  case 2048: pageSize = AT91C_HSMC4_PAGESIZE_2112_Bytes; break;
+	  case 4096: pageSize = AT91C_HSMC4_PAGESIZE_4224_Bytes; break;
+	  default: ;//TRACE_ERROR("Unsupportted page size for NAND Flash Controller\n\r");
+	  }
+	  // This part sets the SMC registers? this is it?
+
+	  cfg.bits.pagesize = pageSize;
+	  cfg.bits.dtomul = 7;
+	  cfg.bits.edgectrl = 1;
+	  cfg.bits.dtocyc = 0xF;
+	  cfg.bits.rspare = 1;
+
+	  *CFG = cfg;
+	  //HSMC4_SetMode(pageSize | AT91C_HSMC4_DTOMUL_1048576 | AT91C_HSMC4_EDGECTRL | AT91C_HSMC4_DTOCYC | AT91C_HSMC4_RSPARE); // ?????????????
+	  */
+	}
+	break;
+      }
+    }
+
+    // Check if chip has been detected
+    if (found) {
+      return 0;
+    }
+    else {
+      return NandCommon_ERROR_UNKNOWNMODEL;
+    }
+  }
+
+  command void Hpl.reset(){
+    /*
+      1. Enable CE
+      2. Write reset command
+      3. wait for ready
+      4. Disable CE
+     */
+
+    // Enable CE
+    call NandFlash_CE.clr();
+
+    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
+    //WRTIE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
+    WaitReady();
+    // Disable CE
+
+    call NandFlash_CE.set();
+  }
+
+  command uint32_t Hpl.readId(){
+    uint32_t chipId;
+
+    // enable CE 
+    call NandFlash_CE.clr();
+
+    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
+    //WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
+    WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, 0);
+
+    chipId  = READ_DATA8(BOARD_NF_DATA_ADDR);
+    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 8;
+    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 16;
+    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 24;
+
+    // Disable CE 
+    call NandFlash_CE.set();
+
+    return chipId;
+  }
+
+  command uint16_t Hpl.getDeviceSizeInBlocks(const struct NandFlashModel * model){
+    return ((1024) / model->blockSizeInKBytes) * model->deviceSizeInMegaBytes;
+  }
+
+  command uint32_t Hpl.getDeviceSizeInPages(const struct NandFlashModel *model){
+    return (uint32_t) call Hpl.getDeviceSizeInBlocks(model) * call Hpl.getBlockSizeInPages(model);
+  }
+
+  command uint8_t Hpl.eraseBlock(const struct RawNandFlash *raw, uint16_t block){
+
+    uint8_t numTries = NUMERASETRIES;
+
+    while (numTries > 0) {
+
+        if (!EraseBlock(raw, block)) {
+
+            return 0;
+        }
+        numTries--;
+    }
+
+    return NandCommon_ERROR_BADBLOCK;
+
+  }
+
+  command uint16_t Hpl.getBlockSizeInPages(const struct NandFlashModel *model){
+    return model->blockSizeInKBytes * 1024 / model->pageSizeInBytes;
+  }
+
+  command uint8_t Hpl.readPage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
+
+    uint32_t colAddress;
+    uint32_t rowAddress;
+    uint8_t hasSmallBlocks;
+    uint32_t pageSpareSize;
+
+    hasSmallBlocks = call Hpl.hasSmallBlocks(MODEL(raw));
+    pageSpareSize = call Hpl.getPageSpareSize(MODEL(raw));
+
+    // Calculate actual address of the page
+    rowAddress = (uint32_t) block * numPagesPerBlock /*call Hpl.getBlockSizeInPages(MODEL(raw))*/ + page;
+
+    // Start operation
+    //ENABLE_CE(raw);
+    // Enable CE
+    call NandFlash_CE.clr();
+
+    if (data) {
+      colAddress = 0;
+    } else {
+      // to read spare area in sequential access
+      colAddress = pageDataSize;
+    }
+
+    // Use either small blocks or large blocks data area read
+    if (hasSmallBlocks) {
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_A);
+      WriteColumnAddress(raw, colAddress);
+      WriteRowAddress(raw, rowAddress);
+    } else {
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
+      WriteColumnAddress(raw, colAddress);
+      WriteRowAddress(raw, rowAddress);
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_2);
+    }
+
+    // Wait for the nand to be ready
+    WaitReady();
+
+    //pageDataSize = call Hpl.getPageDataSize(MODEL(raw));
+    call Draw.drawInt(200, 220, colAddress, 1, COLOR_BLUE);
+    call Draw.drawInt(100, 220, pageDataSize, 1, COLOR_BLUE);
+    call Draw.drawInt(rowAddress*15, 200, rowAddress, 1, COLOR_BLUE);
+
+    // Read data area if needed
+    if (data) {
+
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
+
+      if(pageDataSize != 2048){
+	call Draw.drawInt(200, 240, page, 1, COLOR_GREEN);
+      }
+
+      ReadData(raw, (uint8_t *) data, pageDataSize);
+
+      if (spare) {
+	//call Leds.led2Toggle();
+	ReadData(raw, (uint8_t *) spare, pageSpareSize);
+      }
+    }
+    else {
+      // Read spare area only
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
+      ReadData(raw, (uint8_t *) spare, pageSpareSize);
+    }
+
+
+    // Disable CE
+    //DISABLE_CE(raw);
+    // Disable CE
+    call NandFlash_CE.set();
+
+    return 0;
+  }
+
+  //------------------------------------------------------------------------------
+  /// Reads the bad block marker inside a spare area buffer using the provided
+  /// scheme.
+  /// \param scheme  Pointer to a NandSpareScheme instance.
+  /// \param spare  Spare area buffer.
+  /// \param marker  Pointer to the variable to store the bad block marker.
+  //------------------------------------------------------------------------------
+  command void Hpl.readBadBlockMarker(const struct NandSpareScheme *scheme, const uint8_t *spare, uint8_t *marker){
+    *marker = spare[scheme->badBlockMarkerPosition];
+  }
+
+  //------------------------------------------------------------------------------
+  /// Modifies the bad block marker inside a spare area, using the given scheme.
+  /// \param scheme  Pointer to a NandSpareScheme instance.
+  /// \param spare  Spare area buffer.
+  /// \param marker  Bad block marker to write.
+  //------------------------------------------------------------------------------
+  command void Hpl.writeBadBlockMarker(const struct NandSpareScheme *scheme, uint8_t *spare, uint8_t marker){
+    spare[scheme->badBlockMarkerPosition] = marker;
+  }
+
+  command uint32_t Hpl.getDeviceSizeInBytes(const struct NandFlashModel *model){
+    return ((uint32_t) model->deviceSizeInMegaBytes) << 20;
+  }
+
+  command uint32_t Hpl.getBlockSizeInBytes(const struct NandFlashModel *model){
+    return (model->blockSizeInKBytes *1024);
+  }
+
+  command uint8_t Hpl.writePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
+    uint8_t numTries = NUMWRITETRIES;
+    while (numTries > 0) {
+      if (!WritePage(raw, block, page, data, spare)) {
+	return 0;
+      }
+      numTries--;
+    }
+    return NandCommon_ERROR_BADBLOCK;
+  }
+
+  command uint8_t Hpl.copyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){
+    uint8_t numTries = NUMCOPYTRIES;
+    while (numTries) {
+      if (!CopyPage(raw, sourceBlock, sourcePage, destBlock, destPage)) {
+	return 0;
+      }
+      numTries--;
+    }
+    return NandCommon_ERROR_BADBLOCK;
+  }
+
+  command uint8_t Hpl.copyBlock(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t destBlock){
+    uint32_t i;
+    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
+    // Copy all pages
+    for (i=0; i < numPages; i++) {
+      if (call Hpl.copyPage(raw, sourceBlock, i, destBlock, i)) {
+	return NandCommon_ERROR_BADBLOCK;
+      }
+    }
+    return 0;
+  }
+
+  uint16_t totalReadFromBlock = 0;
+  uint16_t readBlock = 0;
+  void* readData;
+  const struct RawNandFlash saveRaw;
+
+  void readBlockTask(){
+
+    uint8_t error;
+
+    call Draw.fill(COLOR_WHITE);
+
+    error = call Hpl.readPage(&saveRaw, readBlock, totalReadFromBlock, readData, 0);//ECC(skipBlock), block, i, data, 0);
+    totalReadFromBlock ++;
+
+    if (error) {
+      //call Leds.led0Toggle();
+      return;
+    }else if(totalReadFromBlock < numPagesPerBlock){
+      //call Draw.drawInt(totalReadFromBlock*15, 170, totalReadFromBlock, 1, COLOR_BLUE);
+      //call Draw.drawInt(200, 185, numPagesPerBlock, 1, COLOR_BLUE);
+      //readData = (void *) ((uint8_t *) readData + pageDataSize);
+      readBlockTask();
+      //call ReadBlockTimer.startOneShot(5);
+    }else{
+      call Leds.led2Toggle();
+    }
+    
+  }
+
+  command uint8_t Hpl.readBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
+    //uint16_t i, error;
+    //volatile twi_cr_t* CR = (volatile twi_cr_t *) (TWI1_BASE_ADDR + 0x0);
+
+    uint8_t* data_local = (uint8_t*) data;
+
+    totalReadFromBlock = 0;
+
+    memcpy((void*)&saveRaw, (void*)raw, sizeof(struct RawNandFlash));
+
+    readBlock = block;
+    readData = data;
+
+    call Draw.drawInt(50,150, data_local[0], 1, COLOR_BLACK);
+    call Draw.drawInt(100,150, data_local[1], 1, COLOR_BLACK);
+    call Draw.drawInt(150,150, data_local[2], 1, COLOR_BLACK);
+    call Draw.drawInt(200,150, data_local[3], 1, COLOR_BLACK);
+
+    readBlockTask();
+
+    return 0;
+  }
+
+  command uint8_t Hpl.writeBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
+    uint8_t error, i;
+
+    for(i=0; i<numPagesPerBlock; i++){
+      call Draw.fill(COLOR_YELLOW);
+      error = call Hpl.writePage(raw, block, i, data, 0);
+      data = (void *) ((uint8_t *) data + pageDataSize);
+    }
+
+    return 0;
+  }
+
+
+  event void ReadBlockTimer.fired(){
+    readBlockTask();
+  }
+}
diff --git a/tos/platforms/sam3u_ek/chips/nandflash/working.Pnc b/tos/platforms/sam3u_ek/chips/nandflash/working.Pnc
new file mode 100644
index 00000000..be6887f9
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/nandflash/working.Pnc
@@ -0,0 +1,1025 @@
+/*
+ * Copyright (c) 2009 Johns Hopkins University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "HplNandFlash.h"
+
+module HplNandFlashP{
+  provides interface HplNandFlash as Hpl;
+
+  uses interface HplSam3uPeripheralClockCntl as HSMC4ClockControl;
+
+  uses interface GeneralIO as NandFlash_CE;
+  uses interface GeneralIO as NandFlash_RB;
+
+  uses interface HplSam3uGeneralIOPin as NandFlash_OE;
+  uses interface HplSam3uGeneralIOPin as NandFlash_WE;
+  uses interface HplSam3uGeneralIOPin as NandFlash_CLE;
+  uses interface HplSam3uGeneralIOPin as NandFlash_ALE;
+
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data00;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data01;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data02;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data03;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data04;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data05;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data06;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data07;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data08;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data09;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data10;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data11;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data12;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data13;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data14;
+  uses interface HplSam3uGeneralIOPin as NandFlash_Data15;
+
+  uses interface Leds;
+  uses interface Draw;
+
+  uses interface Timer<TMilli> as ReadBlockTimer;
+
+}
+implementation {
+
+/// Nand flash commands
+#define COMMAND_READ_1                  0x00
+#define COMMAND_READ_2                  0x30
+#define COMMAND_COPYBACK_READ_1         0x00
+#define COMMAND_COPYBACK_READ_2         0x35
+#define COMMAND_COPYBACK_PROGRAM_1      0x85
+#define COMMAND_COPYBACK_PROGRAM_2      0x10
+#define COMMAND_RANDOM_OUT              0x05
+#define COMMAND_RANDOM_OUT_2            0xE0
+#define COMMAND_RANDOM_IN               0x85
+#define COMMAND_READID                  0x90
+#define COMMAND_WRITE_1                 0x80
+#define COMMAND_WRITE_2                 0x10
+#define COMMAND_ERASE_1                 0x60
+#define COMMAND_ERASE_2                 0xD0
+#define COMMAND_STATUS                  0x70
+#define COMMAND_RESET                   0xFF
+
+#define COMMAND_READ_A                  0x00
+#define COMMAND_READ_C                  0x50
+
+#define STATUS_READY                    (1 << 6)
+#define STATUS_ERROR                    (1 << 0)
+
+
+#define WRITE_COMMAND(commandAddress, u_command) \
+    {*((volatile uint8_t *) commandAddress) = (uint8_t) u_command;}
+#define WRITE_COMMAND16(commandAddress, u_command) \
+    {*((volatile uint16_t *) commandAddress) = (uint16_t) u_command;}
+#define WRITE_ADDRESS(addressAddress, address) \
+    {*((volatile uint8_t *) addressAddress) = (uint8_t) address;}
+#define WRITE_ADDRESS16(addressAddress, address) \
+    {*((volatile uint16_t *) addressAddress) = (uint16_t) address;}
+#define WRITE_DATA8(dataAddress, data) \
+    {*((volatile uint8_t *) dataAddress) = (uint8_t) data;}
+#define READ_DATA8(dataAddress) \
+    (*((volatile uint8_t *) dataAddress))
+#define WRITE_DATA16(dataAddress, data) \
+    {*((volatile uint16_t *) dataAddress) = (uint16_t) data;}
+#define READ_DATA16(dataAddress) \
+    (*((volatile uint16_t *) dataAddress))
+
+/// Number of tries for erasing a block
+#define NUMERASETRIES           2
+/// Number of tries for writing a block
+#define NUMWRITETRIES           2
+/// Number of tries for copying a block
+#define NUMCOPYTRIES            2
+
+/// Number of NandFlash models inside the list.
+#define NandFlashModelList_SIZE         58
+
+#define MODEL(raw)  ((struct NandFlashModel *) raw)
+
+  //------------------------------------------------------------------------------
+  //         Exported variables
+  //------------------------------------------------------------------------------
+  
+  //extern const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE];
+
+  /// Spare area placement scheme for 256 byte pages.
+  const struct NandSpareScheme nandSpareScheme256 = {
+
+    // Bad block marker is at position #5
+    5,
+    // 3 ecc bytes
+    3,
+    // Ecc bytes positions
+    {0, 1, 2},
+    // 4 extra bytes
+    4,
+    // Extra bytes positions
+    {3, 4, 6, 7}
+  };
+
+  /// Spare area placement scheme for 512 byte pages.
+  const struct NandSpareScheme nandSpareScheme512 = {
+
+    // Bad block marker is at position #5
+    5,
+    // 6 ecc bytes
+    6,
+    // Ecc bytes positions
+    {0, 1, 2, 3, 6, 7},
+    // 8 extra bytes
+    8,
+    // Extra bytes positions
+    {8, 9, 10, 11, 12, 13, 14, 15}
+  };
+
+  /// Spare area placement scheme for 2048 byte pages.
+  const struct NandSpareScheme nandSpareScheme2048 = {
+
+    // Bad block marker is at position #0
+    0,
+    // 24 ecc bytes
+    24, 
+    // Ecc bytes positions
+    {40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
+     59, 60, 61, 62, 63},
+    // 38 extra bytes
+    38,
+    // Extra bytes positions
+    {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
+     22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39}
+  };
+
+  /// List of NandFlash models which can be recognized by the software.
+  const struct NandFlashModel nandFlashModelList[NandFlashModelList_SIZE] = {
+
+    // |  ID    | Options                 | Page    | Mo  | Block   |BlkPg   |DevBlk
+    {0x6e,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
+    {0x64,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
+    {0x6b,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xe8,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
+    {0xec,   NandFlashModel_DATABUS8,    256,      1,    4,    &nandSpareScheme256},
+    {0xea,   NandFlashModel_DATABUS8,    256,      2,    4,    &nandSpareScheme256},
+    {0xd5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xe3,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xe5,   NandFlashModel_DATABUS8,    512,      4,    8,    &nandSpareScheme512},
+    {0xd6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
+
+    {0x39,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
+    {0xe6,   NandFlashModel_DATABUS8,    512,      8,    8,    &nandSpareScheme512},
+    {0x49,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},
+    {0x59,   NandFlashModel_DATABUS16,   512,      8,    8,    &nandSpareScheme512},
+
+    {0x33,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
+    {0x73,   NandFlashModel_DATABUS8,    512,     16,   16,    &nandSpareScheme512},
+    {0x43,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
+    {0x53,   NandFlashModel_DATABUS16,   512,     16,   16,    &nandSpareScheme512},
+                                                             
+    {0x35,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
+    {0x75,   NandFlashModel_DATABUS8,    512,     32,   16,    &nandSpareScheme512},
+    {0x45,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
+    {0x55,   NandFlashModel_DATABUS16,   512,     32,   16,    &nandSpareScheme512},
+                                                             
+    {0x36,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
+    {0x76,   NandFlashModel_DATABUS8,    512,     64,   16,    &nandSpareScheme512},
+    {0x46,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
+    {0x56,   NandFlashModel_DATABUS16,   512,     64,   16,    &nandSpareScheme512},
+                                                             
+    {0x78,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
+    {0x39,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
+    {0x79,   NandFlashModel_DATABUS8,    512,    128,   16,    &nandSpareScheme512},
+    {0x72,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+    {0x49,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+    {0x74,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+    {0x59,   NandFlashModel_DATABUS16,   512,    128,   16,    &nandSpareScheme512},
+                                                             
+    {0x71,   NandFlashModel_DATABUS8,    512,    256,   16,    &nandSpareScheme512},
+	
+    // Large blocks devices. Parameters must be fetched from the extended I
+#define OPTIONS     NandFlashModel_COPYBACK                   
+                                                                                          
+    {0xA2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    {0xF2,   NandFlashModel_DATABUS8  | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    {0xB2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    {0xC2,   NandFlashModel_DATABUS16 | OPTIONS,   0,     64, 0,  &nandSpareScheme2048},
+    
+    {0xA1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
+    {0xF1,   NandFlashModel_DATABUS8  | OPTIONS,   0,    128, 0,  &nandSpareScheme2048}, 
+    {0xB1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
+    {0xC1,   NandFlashModel_DATABUS16 | OPTIONS,   0,    128, 0,  &nandSpareScheme2048},
+                                                                  
+    {0xAA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
+    {0xDA,   NandFlashModel_DATABUS8  | OPTIONS,   0,    256, 0,   &nandSpareScheme2048},                                              
+    {0xBA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
+    {0xCA,   NandFlashModel_DATABUS16 | OPTIONS,   0,    256, 0,  &nandSpareScheme2048},
+	                                                                
+    {0xAC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
+    {0xDC,   NandFlashModel_DATABUS8  | OPTIONS,   0,    512, 0,  &nandSpareScheme2048}, 
+    {0xBC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
+    {0xCC,   NandFlashModel_DATABUS16 | OPTIONS,   0,    512, 0,  &nandSpareScheme2048},
+                                                                  
+    {0xA3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
+    {0xD3,   NandFlashModel_DATABUS8  | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048}, 
+    {0xB3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
+    {0xC3,   NandFlashModel_DATABUS16 | OPTIONS,   0,   1024, 0,  &nandSpareScheme2048},
+                                                                  
+    {0xA5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
+    {0xD5,   NandFlashModel_DATABUS8  | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048}, 
+    {0xB5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
+    {0xC5,   NandFlashModel_DATABUS16 | OPTIONS,   0,   2048, 0,  &nandSpareScheme2048},
+  };
+
+  uint16_t numBlocks;
+  uint32_t memSize;
+  uint32_t blockSize;
+  uint16_t numPagesPerBlock;
+  uint16_t pageDataSize;
+
+  void WaitReady(){
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);
+    while ((READ_DATA8(BOARD_NF_DATA_ADDR) & STATUS_READY) != STATUS_READY);
+  }
+
+  uint8_t GetDataBusWidth(const struct NandFlashModel *model){
+    return (model->options&NandFlashModel_DATABUS16)? 16: 8;
+  }
+
+  void WriteColumnAddress(const struct RawNandFlash *raw, uint16_t columnAddress){
+    
+    uint16_t pageSize = call Hpl.getPageDataSize(MODEL(raw));
+
+    call Draw.drawInt(200, 250, pageSize, 1, COLOR_BLACK);
+
+    /* Check the data bus width of the NandFlash */
+    if (GetDataBusWidth(MODEL(raw)) == 16) {
+      /* Div 2 is because we address in word and not in byte */
+      columnAddress >>= 1;
+    }
+    while (pageSize > 0) {
+      if (GetDataBusWidth(MODEL(raw)) == 16) {
+	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
+      } else {
+	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, columnAddress & 0xFF);
+      }
+      pageSize >>= 8;
+      columnAddress >>= 8;
+    }
+  }
+
+  //------------------------------------------------------------------------------
+  /// Sends the row address to the NandFlash chip.
+  /// \param raw  Pointer to a RawNandFlash instance.
+  /// \param rowAddress  Row address to send.
+  //------------------------------------------------------------------------------
+  void WriteRowAddress(const struct RawNandFlash *raw, uint32_t rowAddress){
+
+    uint32_t numPages = call Hpl.getDeviceSizeInPages(MODEL(raw));
+
+    while (numPages > 0) {
+      if (GetDataBusWidth(MODEL(raw)) == 16) {
+	WRITE_ADDRESS16(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
+      } else {
+	WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, rowAddress & 0xFF);
+      }
+      numPages >>= 8;
+      rowAddress >>= 8;
+    }
+  }
+
+  void WriteData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
+    uint32_t i;
+    // Check the data bus width of the NandFlash
+    if (GetDataBusWidth(MODEL(raw)) == 16) {
+      uint16_t *buffer16 = (uint16_t *) buffer;
+      size >>= 1;
+      for(i=0; i < size; i++) {
+	call Draw.drawInt(i*15,50, i, 1, COLOR_RED);
+	WRITE_DATA16(BOARD_NF_DATA_ADDR, buffer16[i]);
+      }
+    } else {
+      for(i=0; i < size; i++) {
+	WRITE_DATA8(BOARD_NF_DATA_ADDR, buffer[i]);
+      }
+    }
+  }
+
+  uint8_t count = 0;
+
+  void ReadData(const struct RawNandFlash *raw, uint8_t *buffer, uint32_t size){
+    uint16_t i;
+    // Check the chip data bus width
+
+    count ++;
+
+    if (GetDataBusWidth(MODEL(raw)) == 16) {
+      uint16_t *buffer16 = (uint16_t *) buffer;
+
+      size >>= 1;
+
+      //call Draw.drawInt(200,130, size, 1, COLOR_YELLOW);
+
+      for (i=0; i < size; i++) {
+	call Draw.drawInt(i*15,50, i, 1, COLOR_BLACK);
+	buffer16[i] = READ_DATA16(BOARD_NF_DATA_ADDR);
+      }
+
+      call Draw.drawInt(100,150, buffer16[0], 1, COLOR_BLACK);
+      call Draw.drawInt(200,150, buffer16[1], 1, COLOR_BLACK);
+
+    } else {
+
+      for (i=0; i < size; i++) {
+	buffer[i] = READ_DATA8(BOARD_NF_DATA_ADDR);
+      }
+    }
+
+    call Draw.drawInt(count*15,130, count, 1, COLOR_BLUE);
+  }
+
+  uint8_t IsOperationComplete(const struct RawNandFlash *raw){
+    uint8_t status;
+
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_STATUS);
+
+    status = READ_DATA8(BOARD_NF_DATA_ADDR);
+
+    if (((status & STATUS_READY) != STATUS_READY) || ((status & STATUS_ERROR) != 0)) {
+        return 0;
+    }
+    return 1;
+  }
+
+  uint8_t EraseBlock( const struct RawNandFlash *raw, unsigned short block){
+    uint8_t error = 0;
+    uint32_t rowAddress;
+
+    // Calculate address used for erase
+    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw));
+
+    // Start erase
+    //ENABLE_CE(raw);
+    // Enable CE
+    call NandFlash_CE.clr();
+
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_1);
+    WriteRowAddress(raw, rowAddress);
+    WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_ERASE_2);
+
+    WaitReady();
+
+    if (!IsOperationComplete(raw)) {
+      error = NandCommon_ERROR_CANNOTERASE;
+    }
+
+    //DISABLE_CE(raw);
+    // Disable CE
+    call NandFlash_CE.set();
+
+    return error;
+    
+  }
+
+  uint8_t WritePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
+    
+    uint32_t pageSize = call Hpl.getPageDataSize(MODEL(raw));
+    uint32_t spareDataSize = call Hpl.getPageSpareSize(MODEL(raw));
+    uint16_t dummyByte;
+    uint32_t rowAddress;
+    uint8_t error = 0;
+
+    // Calculate physical address of the page
+    rowAddress = block * call Hpl.getBlockSizeInPages(MODEL(raw)) + page;
+
+    // Start write operation
+    //ENABLE_CE(raw);
+    // Enable CE;
+    call NandFlash_CE.clr();
+
+    // Write data area if needed
+    if (data) {
+
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
+      WriteColumnAddress(raw, 0);
+      WriteRowAddress(raw, rowAddress);
+      WriteData(raw, (uint8_t *) data, pageSize);
+
+      //call Draw.drawInt(50, 50, (uint8_t)data[0], 1, COLOR_RED);
+
+      // Spare is written here as well since it is more efficient
+      if (spare) {
+	WriteData(raw, (uint8_t *) spare, spareDataSize);
+      }
+      else {
+	// Note: special case when ECC parity generation. 
+	// ECC results are available as soon as the counter reaches the end of the main area.
+	// But when reach PageSize for an example, it could not generate last ECC_PR, The 
+	// workaround is to receive PageSize+1 word.
+	ReadData(raw, (uint8_t *) (&dummyByte), 2);
+      }
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);
+
+      WaitReady();
+
+      if (!IsOperationComplete(raw)) {
+	error = NandCommon_ERROR_CANNOTWRITE;
+      }
+    }
+
+    // Write spare area alone if needed
+    if (spare && !data) {
+
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_1);
+      WriteColumnAddress(raw, pageSize);
+      WriteRowAddress(raw, rowAddress);
+      WriteData(raw, (uint8_t *) spare, spareDataSize);
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_WRITE_2);
+
+      WaitReady();
+      if (!IsOperationComplete(raw)) {
+	error = NandCommon_ERROR_CANNOTWRITE;
+      }
+    }
+
+    // Disable chip
+    //DISABLE_CE(raw);
+    // Disable CE
+    call NandFlash_CE.set();
+
+    return error;
+
+  }
+
+  uint8_t CopyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){
+
+    uint32_t sourceRow, destRow;
+    uint8_t error = 0;
+    uint8_t data[NandCommon_MAXPAGEDATASIZE];
+    uint8_t spare[NandCommon_MAXPAGESPARESIZE];
+    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
+    sourceRow = sourceBlock * numPages + sourcePage;
+    destRow = destBlock * numPages + destPage;
+
+    if (call Hpl.readPage(raw, sourceBlock, sourcePage, data, spare)) {
+      error = NandCommon_ERROR_CANNOTREAD;
+    } else if (call Hpl.writePage(raw, destBlock, destPage, data, spare)) {
+      error = NandCommon_ERROR_CANNOTWRITE;
+    }
+
+    return error;    
+  }
+
+  void configureNandFlash(uint8_t busWidth){
+    // Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
+    // set clock
+    // set smc registers
+    volatile smc_setup_t *SETUP = (volatile smc_setup_t *) (0x400E0084 + 0x0);
+    smc_setup_t setup = *SETUP;
+    volatile smc_pulse_t *PULSE = (volatile smc_pulse_t *) (0x400E0084 + 0x4);
+    smc_pulse_t pulse = *PULSE;
+    volatile smc_cycle_t *CYCLE = (volatile smc_cycle_t *) (0x400E0084 + 0x8);
+    smc_cycle_t cycle = *CYCLE;
+    volatile smc_timings_t *TIMINGS = (volatile smc_timings_t *) (0x400E0084 + 0xC);
+    smc_timings_t timings = *TIMINGS;
+    volatile smc_mode_t *MODE = (volatile smc_mode_t *) (0x400E0084 + 0x10);
+    smc_mode_t mode = *MODE;
+
+    // start clock for register access
+    call HSMC4ClockControl.disable();
+    call HSMC4ClockControl.enable();
+
+    setup.bits.nwe_setup = 0;
+    setup.bits.ncs_wr_setup = 1;
+    setup.bits.nrd_setup = 0;
+    setup.bits.ncs_rd_setup = 1;
+
+    *SETUP = setup;
+
+    pulse.bits.nwe_pulse = 2;
+    pulse.bits.ncs_wr_pulse = 3;
+    pulse.bits.nrd_pulse = 3;
+    pulse.bits.ncs_rd_pulse = 4;
+
+    *PULSE = pulse;
+
+    cycle.bits.nwe_cycle = 4;
+    cycle.bits.nrd_cycle = 7;
+
+    *CYCLE = cycle;
+
+    timings.bits.tclr = 1;
+    timings.bits.tadl = 2;
+    timings.bits.tar = 1;
+    timings.bits.trr = 1;
+    timings.bits.twb = 2;
+    timings.bits.rbnsel = 7;
+    timings.bits.nfsel = 1;
+
+    *TIMINGS = timings;
+
+    if(busWidth == 8){
+      mode.bits.dbw = 0;
+      mode.bits.read_mode = 1;
+      mode.bits.write_mode = 1;
+
+      *MODE = mode;
+
+    }else if(busWidth == 16){
+      mode.bits.dbw = 1;
+      mode.bits.read_mode = 1;
+      mode.bits.write_mode = 1;
+
+      *MODE = mode;
+      
+    }
+  }
+
+  void configurePsRam(){
+    // TODO: Take a look at board_memories.h -- NOT CHIP_NAND_CTRL!
+    // TODO: Does Atmel code work with this disabled?
+  }
+
+  void configureNandPins(){
+
+    // Pin setting
+
+    call NandFlash_CE.makeOutput();
+    call NandFlash_RB.makeInput();
+
+    call NandFlash_OE.disablePioControl();
+    call NandFlash_WE.disablePioControl();
+    call NandFlash_CLE.disablePioControl();
+    call NandFlash_ALE.disablePioControl();
+
+    call NandFlash_OE.selectPeripheralA();
+    call NandFlash_WE.selectPeripheralA();
+    call NandFlash_CLE.selectPeripheralA();
+    call NandFlash_ALE.selectPeripheralA();
+
+    call NandFlash_Data00.disablePioControl();
+    call NandFlash_Data01.disablePioControl();
+    call NandFlash_Data02.disablePioControl();
+    call NandFlash_Data03.disablePioControl();
+    call NandFlash_Data04.disablePioControl();
+    call NandFlash_Data05.disablePioControl();
+    call NandFlash_Data06.disablePioControl();
+    call NandFlash_Data07.disablePioControl();
+    call NandFlash_Data08.disablePioControl();
+    call NandFlash_Data09.disablePioControl();
+    call NandFlash_Data10.disablePioControl();
+    call NandFlash_Data11.disablePioControl();
+    call NandFlash_Data12.disablePioControl();
+    call NandFlash_Data13.disablePioControl();
+    call NandFlash_Data14.disablePioControl();
+    call NandFlash_Data15.disablePioControl();
+
+    call NandFlash_Data00.selectPeripheralA();
+    call NandFlash_Data01.selectPeripheralA();
+    call NandFlash_Data02.selectPeripheralA();
+    call NandFlash_Data03.selectPeripheralA();
+    call NandFlash_Data04.selectPeripheralA();
+    call NandFlash_Data05.selectPeripheralA();
+    call NandFlash_Data06.selectPeripheralA();
+    call NandFlash_Data07.selectPeripheralA();
+    call NandFlash_Data08.selectPeripheralA();
+    call NandFlash_Data09.selectPeripheralA();
+    call NandFlash_Data10.selectPeripheralA();
+    call NandFlash_Data11.selectPeripheralA();
+    call NandFlash_Data12.selectPeripheralA();
+    call NandFlash_Data13.selectPeripheralA();
+    call NandFlash_Data14.selectPeripheralA();
+    call NandFlash_Data15.selectPeripheralB(); // PB6
+  }
+
+  command uint8_t Hpl.hasSmallBlocks(const struct NandFlashModel *model){
+    return (model->pageSizeInBytes <= 512 )? 1: 0;
+  }
+
+  //------------------------------------------------------------------------------
+  /// Returns the size of the data area of a page in bytes.
+  /// \param model  Pointer to a NandFlashModel instance.
+  //------------------------------------------------------------------------------
+  command uint16_t Hpl.getPageDataSize(const struct NandFlashModel *model){
+    return model->pageSizeInBytes;
+  }
+
+  //------------------------------------------------------------------------------
+  /// Returns the size of the spare area of a page in bytes.
+  /// \param model  Pointer to a NandFlashModel instance.
+  //------------------------------------------------------------------------------
+  command uint8_t Hpl.getPageSpareSize(const struct NandFlashModel *model){
+    return (model->pageSizeInBytes>>5); /// Spare size is 16/512 of data size
+  }
+
+  command void Hpl.init(struct RawNandFlash *HplNand, const struct NandFlashModel *model, uint32_t commandAddr, uint32_t addressAddr, uint32_t dataAddr){
+    uint32_t chipId;
+    uint8_t error;
+    uint8_t busWidth = 16;
+
+    //configurePsRam();
+    configureNandFlash(busWidth);
+    configureNandPins();
+
+    HplNand -> commandAddress = commandAddr;
+    HplNand -> addressAddress = addressAddr;
+    HplNand -> dataAddress = dataAddr;
+
+    call Hpl.reset();
+
+    if(!model){
+      chipId = call Hpl.readId();
+      error = call Hpl.findNandModel(nandFlashModelList, NandFlashModelList_SIZE, &(HplNand->model), chipId);
+    }else{
+      HplNand -> model = *model;
+    }
+
+    if(!error){
+    } else {
+    }
+
+    busWidth = 0;
+    busWidth = GetDataBusWidth(MODEL(HplNand));
+    configureNandFlash(busWidth);
+    
+    memSize = call Hpl.getDeviceSizeInBytes(MODEL(HplNand));
+    blockSize = call Hpl.getBlockSizeInBytes(MODEL(HplNand));
+    numBlocks = call Hpl.getDeviceSizeInBlocks(MODEL(HplNand));
+    pageDataSize = call Hpl.getPageDataSize(MODEL(HplNand));
+    numPagesPerBlock = call Hpl.getBlockSizeInPages(MODEL(HplNand));    
+
+    call Draw.drawInt(150, 20, busWidth, 1, COLOR_BLACK);
+    call Draw.drawInt(150, 40, pageDataSize, 1, COLOR_BLACK);
+    call Draw.drawInt(150, 60, memSize, 1, COLOR_BLACK);
+    call Draw.drawInt(150, 80, numPagesPerBlock, 1, COLOR_BLACK);
+
+  }
+
+  command uint8_t Hpl.findNandModel(const struct NandFlashModel *modelList, uint8_t size, struct NandFlashModel *model, uint32_t chipId){
+
+    uint8_t i, found = 0;
+
+    //volatile smc_cfg_t *CFG = (volatile smc_cfg_t *) (0x400E0000);
+    //smc_cfg_t cfg = *CFG;
+
+    uint8_t id2 = (uint8_t)(chipId>>8);
+    uint8_t id4 = (uint8_t)(chipId>>24);
+
+    //call Draw.drawInt(100, 60, chipId, 1, COLOR_YELLOW);
+    //call Draw.drawInt(100, 80, id2, 1, COLOR_YELLOW);
+    
+    for(i=0; i<size; i++) {
+      if(modelList[i].deviceId == id2) {
+	found = 1;
+
+	if(model) {
+
+	  memcpy(model, &modelList[i], sizeof(struct NandFlashModel));
+
+	  if(model->blockSizeInKBytes == 0 || model->pageSizeInBytes == 0) {
+	    //TRACE_DEBUG("Fetch from ID4(0x%.2x):\r\n", id4);
+	    /// Fetch from the extended ID4
+	    /// ID4 D5  D4 BlockSize || D1  D0  PageSize
+	    ///     0   0   64K      || 0   0   1K
+	    ///     0   1   128K     || 0   1   2K
+	    ///     1   0   256K     || 1   0   4K
+	    ///     1   1   512K     || 1   1   8k
+	    switch(id4 & 0x03) {
+	    case 0x00: model->pageSizeInBytes = 1024; break;
+	    case 0x01: model->pageSizeInBytes = 2048; break;
+	    case 0x02: model->pageSizeInBytes = 4096; break;
+	    case 0x03: model->pageSizeInBytes = 8192; break;
+	    }
+	    switch(id4 & 0x30) {
+	    case 0x00: model->blockSizeInKBytes = 64;  break;
+	    case 0x10: model->blockSizeInKBytes = 128; break;
+	    case 0x20: model->blockSizeInKBytes = 256; break;
+	    case 0x30: model->blockSizeInKBytes = 512; break;
+	    }
+	  }
+
+	  /*
+	  switch(model->pageSizeInBytes) {
+	  case 1024: pageSize = AT91C_HSMC4_PAGESIZE_1056_Bytes; break;
+	  case 2048: pageSize = AT91C_HSMC4_PAGESIZE_2112_Bytes; break;
+	  case 4096: pageSize = AT91C_HSMC4_PAGESIZE_4224_Bytes; break;
+	  default: ;//TRACE_ERROR("Unsupportted page size for NAND Flash Controller\n\r");
+	  }
+	  // This part sets the SMC registers? this is it?
+
+	  cfg.bits.pagesize = pageSize;
+	  cfg.bits.dtomul = 7;
+	  cfg.bits.edgectrl = 1;
+	  cfg.bits.dtocyc = 0xF;
+	  cfg.bits.rspare = 1;
+
+	  *CFG = cfg;
+	  //HSMC4_SetMode(pageSize | AT91C_HSMC4_DTOMUL_1048576 | AT91C_HSMC4_EDGECTRL | AT91C_HSMC4_DTOCYC | AT91C_HSMC4_RSPARE); // ?????????????
+	  */
+	}
+	break;
+      }
+    }
+
+    // Check if chip has been detected
+    if (found) {
+      return 0;
+    }
+    else {
+      return NandCommon_ERROR_UNKNOWNMODEL;
+    }
+  }
+
+  command void Hpl.reset(){
+    /*
+      1. Enable CE
+      2. Write reset command
+      3. wait for ready
+      4. Disable CE
+     */
+
+    // Enable CE
+    call NandFlash_CE.clr();
+
+    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
+    //WRTIE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_RESET);
+    WaitReady();
+    // Disable CE
+
+    call NandFlash_CE.set();
+  }
+
+  command uint32_t Hpl.readId(){
+    uint32_t chipId;
+
+    // enable CE 
+    call NandFlash_CE.clr();
+
+    WRITE_COMMAND16(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
+    //WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READID);
+    WRITE_ADDRESS(BOARD_NF_ADDRESS_ADDR, 0);
+
+    chipId  = READ_DATA8(BOARD_NF_DATA_ADDR);
+    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 8;
+    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 16;
+    chipId |= READ_DATA8(BOARD_NF_DATA_ADDR) << 24;
+
+    // Disable CE 
+    call NandFlash_CE.set();
+
+    return chipId;
+  }
+
+  command uint16_t Hpl.getDeviceSizeInBlocks(const struct NandFlashModel * model){
+    return ((1024) / model->blockSizeInKBytes) * model->deviceSizeInMegaBytes;
+  }
+
+  command uint32_t Hpl.getDeviceSizeInPages(const struct NandFlashModel *model){
+    return (uint32_t) call Hpl.getDeviceSizeInBlocks(model) * call Hpl.getBlockSizeInPages(model);
+  }
+
+  command uint8_t Hpl.eraseBlock(const struct RawNandFlash *raw, uint16_t block){
+
+    uint8_t numTries = NUMERASETRIES;
+
+    while (numTries > 0) {
+
+        if (!EraseBlock(raw, block)) {
+
+            return 0;
+        }
+        numTries--;
+    }
+
+    return NandCommon_ERROR_BADBLOCK;
+
+  }
+
+  command uint16_t Hpl.getBlockSizeInPages(const struct NandFlashModel *model){
+    return model->blockSizeInKBytes * 1024 / model->pageSizeInBytes;
+  }
+
+  command uint8_t Hpl.readPage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
+
+    uint32_t colAddress;
+    uint32_t rowAddress;
+    uint8_t hasSmallBlocks;
+    uint32_t pageSpareSize;
+
+    hasSmallBlocks = call Hpl.hasSmallBlocks(MODEL(raw));
+    pageSpareSize = call Hpl.getPageSpareSize(MODEL(raw));
+
+    // Calculate actual address of the page
+    rowAddress = (uint32_t) block * numPagesPerBlock /*call Hpl.getBlockSizeInPages(MODEL(raw))*/ + page;
+
+    // Start operation
+    //ENABLE_CE(raw);
+    // Enable CE
+    call NandFlash_CE.clr();
+
+    if (data) {
+      colAddress = 0;
+    } else {
+      // to read spare area in sequential access
+      colAddress = pageDataSize;
+    }
+
+    // Use either small blocks or large blocks data area read
+    if (hasSmallBlocks) {
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_A);
+      WriteColumnAddress(raw, colAddress);
+      WriteRowAddress(raw, rowAddress);
+    } else {
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
+      WriteColumnAddress(raw, colAddress);
+      WriteRowAddress(raw, rowAddress);
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_2);
+    }
+
+    // Wait for the nand to be ready
+    WaitReady();
+
+    //pageDataSize = call Hpl.getPageDataSize(MODEL(raw));
+    call Draw.drawInt(200, 220, colAddress, 1, COLOR_BLUE);
+    call Draw.drawInt(100, 220, pageDataSize, 1, COLOR_BLUE);
+    call Draw.drawInt(rowAddress*15, 200, rowAddress, 1, COLOR_BLUE);
+
+    // Read data area if needed
+    if (data) {
+
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
+
+      if(pageDataSize != 2048){
+	call Draw.drawInt(200, 240, page, 1, COLOR_GREEN);
+      }
+
+      ReadData(raw, (uint8_t *) data, pageDataSize);
+
+      if (spare) {
+	//call Leds.led2Toggle();
+	ReadData(raw, (uint8_t *) spare, pageSpareSize);
+      }
+    }
+    else {
+      // Read spare area only
+      WRITE_COMMAND(BOARD_NF_COMMAND_ADDR, COMMAND_READ_1);
+      ReadData(raw, (uint8_t *) spare, pageSpareSize);
+    }
+
+
+    // Disable CE
+    //DISABLE_CE(raw);
+    // Disable CE
+    call NandFlash_CE.set();
+
+    return 0;
+  }
+
+  //------------------------------------------------------------------------------
+  /// Reads the bad block marker inside a spare area buffer using the provided
+  /// scheme.
+  /// \param scheme  Pointer to a NandSpareScheme instance.
+  /// \param spare  Spare area buffer.
+  /// \param marker  Pointer to the variable to store the bad block marker.
+  //------------------------------------------------------------------------------
+  command void Hpl.readBadBlockMarker(const struct NandSpareScheme *scheme, const uint8_t *spare, uint8_t *marker){
+    *marker = spare[scheme->badBlockMarkerPosition];
+  }
+
+  //------------------------------------------------------------------------------
+  /// Modifies the bad block marker inside a spare area, using the given scheme.
+  /// \param scheme  Pointer to a NandSpareScheme instance.
+  /// \param spare  Spare area buffer.
+  /// \param marker  Bad block marker to write.
+  //------------------------------------------------------------------------------
+  command void Hpl.writeBadBlockMarker(const struct NandSpareScheme *scheme, uint8_t *spare, uint8_t marker){
+    spare[scheme->badBlockMarkerPosition] = marker;
+  }
+
+  command uint32_t Hpl.getDeviceSizeInBytes(const struct NandFlashModel *model){
+    return ((uint32_t) model->deviceSizeInMegaBytes) << 20;
+  }
+
+  command uint32_t Hpl.getBlockSizeInBytes(const struct NandFlashModel *model){
+    return (model->blockSizeInKBytes *1024);
+  }
+
+  command uint8_t Hpl.writePage(const struct RawNandFlash *raw, uint16_t block, uint16_t page, void *data, void *spare){
+    uint8_t numTries = NUMWRITETRIES;
+    while (numTries > 0) {
+      if (!WritePage(raw, block, page, data, spare)) {
+	return 0;
+      }
+      numTries--;
+    }
+    return NandCommon_ERROR_BADBLOCK;
+  }
+
+  command uint8_t Hpl.copyPage(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t sourcePage, uint16_t destBlock, uint16_t destPage){
+    uint8_t numTries = NUMCOPYTRIES;
+    while (numTries) {
+      if (!CopyPage(raw, sourceBlock, sourcePage, destBlock, destPage)) {
+	return 0;
+      }
+      numTries--;
+    }
+    return NandCommon_ERROR_BADBLOCK;
+  }
+
+  command uint8_t Hpl.copyBlock(const struct RawNandFlash *raw, uint16_t sourceBlock, uint16_t destBlock){
+    uint32_t i;
+    uint16_t numPages = call Hpl.getBlockSizeInPages(MODEL(raw));
+    // Copy all pages
+    for (i=0; i < numPages; i++) {
+      if (call Hpl.copyPage(raw, sourceBlock, i, destBlock, i)) {
+	return NandCommon_ERROR_BADBLOCK;
+      }
+    }
+    return 0;
+  }
+
+  uint16_t totalReadFromBlock = 0;
+  uint16_t readBlock = 0;
+  void* readData;
+  const struct RawNandFlash saveRaw;
+
+  void readBlockTask(){
+
+    uint8_t error;
+
+    call Draw.fill(COLOR_WHITE);
+
+    error = call Hpl.readPage(&saveRaw, readBlock, totalReadFromBlock, readData, 0);//ECC(skipBlock), block, i, data, 0);
+    totalReadFromBlock ++;
+
+    if (error) {
+      //call Leds.led0Toggle();
+      return;
+    }else if(totalReadFromBlock < numPagesPerBlock){
+      //call Draw.drawInt(totalReadFromBlock*15, 170, totalReadFromBlock, 1, COLOR_BLUE);
+      //call Draw.drawInt(200, 185, numPagesPerBlock, 1, COLOR_BLUE);
+      readData = (void *) ((uint8_t *) readData + pageDataSize);
+      readBlockTask();
+      //call ReadBlockTimer.startOneShot(5);
+    }else{
+      call Leds.led2Toggle();
+    }
+    
+  }
+
+  command uint8_t Hpl.readBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
+    //uint16_t i, error;
+
+    totalReadFromBlock = 0;
+
+    memcpy((void*)&saveRaw, (void*)raw, sizeof(struct RawNandFlash));
+
+    readBlock = block;
+    readData = data;
+
+    readBlockTask();
+
+    return 0;
+  }
+
+  command uint8_t Hpl.writeBlock(const struct RawNandFlash *raw, uint16_t block, void *data){
+    uint8_t error, i;
+
+    for(i=0; i<numPagesPerBlock; i++){
+      call Draw.fill(COLOR_WHITE);
+      error = call Hpl.writePage(raw, block, i, data, 0);
+      data = (void *) ((uint8_t *) data + pageDataSize);
+    }
+
+    return 0;
+  }
+
+
+  event void ReadBlockTimer.fired(){
+    readBlockTask();
+  }
+}
diff --git a/tos/platforms/sam3u_ek/chips/sd/FatFsC.nc b/tos/platforms/sam3u_ek/chips/sd/FatFsC.nc
new file mode 100644
index 00000000..ceb91b2d
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/sd/FatFsC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * Platform specific configuration for FatFs on an SD card
+ *
+ * @author Kevin Klues
+ */
+
+configuration FatFsC {
+  provides {
+    interface FatFs;
+  }
+}
+implementation {
+  components FatFsP;
+  FatFs = FatFsP;
+
+  components SDC;
+  components TimeC;
+  FatFsP.diskIO -> SDC;
+  FatFsP.diskIOStdControl -> SDC;
+  FatFsP.Time->TimeC;
+
+  components LedsC;
+  FatFsP.Leds->LedsC;
+}
+
diff --git a/tos/platforms/sam3u_ek/chips/sd/PlatformHsmciConfigC.nc b/tos/platforms/sam3u_ek/chips/sd/PlatformHsmciConfigC.nc
new file mode 100644
index 00000000..5645be28
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/sd/PlatformHsmciConfigC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2010 Johns Hopkins University.
+ * Copyright (c) 2010 CSIRO Australia
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ * 
+ * - Redistributions of source code must retain the above copyright 
+ *   notice, this list of conditions and the following disclaimer. 
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the 
+ *   distribution. 
+ * - Neither the name of the copyright holders nor the names of 
+ *   its contributors may be used to endorse or promote products derived 
+ *   from this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL 
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 
+ * OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+/**
+ * Platform specific SD card initialization for the Sam3u Cortex HSMCI bus
+ *
+ * @author Kevin Klues
+ */
+
+#include <sam3uhsmcihardware.h>
+
+module PlatformHsmciConfigC {
+  provides interface Init;
+}
+implementation {
+    
+  command error_t Init.init() {
+    // Write protection on the registers must first be disabled
+    if(HSMCI->wpmr.bits.wp_en)
+      return FAIL;
+    
+    HSMCI->sdcr.bits.sdcsel = 0;   // Choose card slot A 
+    HSMCI->sdcr.bits.sdcbus = 2;   // 4 bit data bus
+    HSMCI->cmdr.bits.trtyp = 0;    // SDCard single block transfer mode
+    HSMCI->blkr.bits.blklen = 512; // The block size
+    HSMCI->blkr.bits.bcnt = 1;     // SDCard single block transfer
+    return SUCCESS;
+  }
+}
+
diff --git a/tos/platforms/sam3u_ek/chips/sd/Time.h b/tos/platforms/sam3u_ek/chips/sd/Time.h
new file mode 100644
index 00000000..391a2340
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/sd/Time.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+typedef uint32_t time_t;
+
+#define HAVE_WDAY
+#undef HAVE_DST
+
+struct tm
+{
+  int tm_sec;			/* Seconds.	[0-60] (1 leap second) */
+  int tm_min;			/* Minutes.	[0-59] */
+  int tm_hour;			/* Hours.	[0-23] */
+  int tm_mday;			/* Day.		[1-31] */
+  int tm_mon;			/* Month.	[0-11] */
+  int tm_year;			/* Year	- 1900.  */
+#ifdef HAVE_WDAY
+  int tm_wday;			/* Day of week.	[0-6] */
+#endif
+  int tm_yday;			/* Days in year.[0-365]	*/
+  int tm_isdst;			/* DST.		[-1/0/1]*/
+
+#ifdef __UCLIBC_HAS_TM_EXTENSIONS__
+#ifdef	__USE_BSD
+  long int tm_gmtoff;		/* Seconds east of UTC.  */
+  __const char *tm_zone;	/* Timezone abbreviation. */
+#else
+  long int __tm_gmtoff;		/* Seconds east of UTC.  */
+  __const char *__tm_zone;	/* Timezone abbreviation. */
+#endif
+#endif /* __UCLIBC_HAS_TM_EXTENSIONS__ */
+};
diff --git a/tos/platforms/sam3u_ek/chips/sd/Time.nc b/tos/platforms/sam3u_ek/chips/sd/Time.nc
new file mode 100644
index 00000000..ee2e71a7
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/sd/Time.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2005 Hewlett-Packard Company
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Time.h"
+
+interface Time {
+  command error_t gmtime(const time_t *timer, struct tm *tm);
+  command error_t localtime(const time_t *timer, struct tm *tm);
+  command error_t asctime(const struct tm *tm, char *buf, int buflen);
+  command error_t time(time_t *timer);
+  command void setCurrentTime(time_t current_time);
+  command void setZoneInfo(uint16_t g_year, 
+			   time_t g_year_time, 
+			   uint8_t g_zero_day, 
+			   uint16_t g_dst_fday, 
+			   uint16_t g_dst_lday);
+  event void tick();
+}
diff --git a/tos/platforms/sam3u_ek/chips/sd/TimeC.nc b/tos/platforms/sam3u_ek/chips/sd/TimeC.nc
new file mode 100644
index 00000000..f5f869fb
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/sd/TimeC.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date March, 2010
+ * 
+ * pulling together time modules
+ */
+
+configuration TimeC {
+  provides{
+    interface Time;
+    interface Init;
+  }
+}
+
+implementation { 
+  components TimeP;
+  Init = TimeP;
+  Time = TimeP;
+
+  components new TimerMilliC() as LocalTimer;
+  TimeP.Timer -> LocalTimer;
+
+  components Counter32khz64C as Counter;
+  components new CounterToLocalTime64C(T32khz);
+  CounterToLocalTime64C.Counter -> Counter;
+  TimeP.LocalTime64 -> CounterToLocalTime64C;
+  
+  /* 
+   * and, at some point...
+   *  TimeP.NTPClient            -> NTPClientM;   not yet, awaiting tos-2.x ip port
+   */
+
+}
+
diff --git a/tos/platforms/sam3u_ek/chips/sd/TimeP.nc b/tos/platforms/sam3u_ek/chips/sd/TimeP.nc
new file mode 100644
index 00000000..c32941b8
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/sd/TimeP.nc
@@ -0,0 +1,367 @@
+/*
+ * Copyright (C) 2002     Manuel Novoa III
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * port to tos-2.x
+ * @author Steve Ayer
+ * @date   January, 2010
+ */
+
+// includes InfoMem;  let's avoid this...
+
+module TimeP {
+  provides {
+    interface Init;
+    interface Time;
+    //    interface ParamView;    save for ip stack port to tos-2.x
+  }
+  uses {
+    interface Timer<TMilli>;
+    //    interface NTPClient;  save for ip stack port to tos-2.x
+    interface LocalTime64<T32khz>;
+  }
+}
+
+implementation {
+
+#define HAVE_DST
+extern int snprintf(char *str, size_t len, const char *format, ...) __attribute__ ((C));
+
+  struct y_info{
+    time_t year_seconds; /* time_t value for beginning of year */
+    int8_t wday_offset;   /* tm_day of first day of the year */
+    int8_t isleap;
+    int16_t dst_first_yday;
+    int16_t dst_last_yday;
+  };
+  time_t g_seconds;
+  time_t g_year_seconds;
+  time_t g_seconds_from_year;
+  uint16_t g_days;
+  time_t g_seconds_from_day;
+
+  //#define TZNAME_MAX 7
+  //#define LONG_MAX 0x7fffffffL
+  time_t g_tick_local_time;
+#ifdef CURRENT_TIME  
+  time_t g_current_time = CURRENT_TIME;
+#else
+  time_t g_current_time;
+#endif
+
+#ifndef HOST_TIME
+#define NUM_YEARS 4
+  int16_t g_first_year = 2009;
+  struct y_info year_info[NUM_YEARS] = {
+    /* unix time start jan 1 1970 */
+    // from 2007, dst begins 2nd sunday in march, ends first sunday in november
+    { 0x495c4dd0, 3, 0, 67, 305},
+    { 0x4B3D8150, 4, 0, 73, 311},
+    { 0x4D1EB4D0, 5, 0, 72, 310},
+    { 0x4EFFE850, 6, 1, 71, 309}
+  };
+
+#else
+#define NUM_YEARS 1
+  // these will be set by setZoneInfo()
+  int16_t g_first_year = 0;
+  struct y_info year_info[NUM_YEARS];
+#endif
+
+  //  time_t g_local_time; /* from LocalTime.read() */
+  uint64_t g_local_time; /* from LocalTime.read(), now 64 bits to handle */
+
+  typedef struct {
+    long gmt_offset;
+    //    long dst_offset;
+    //    short day;					/* for J or normal */
+    //    short week;
+    //    short month;
+    //    short rule_type;			/* J, M, \0 */
+    //    char tzname[TZNAME_MAX+1];
+  } rule_struct;
+
+  rule_struct _time_tzinfo[1];
+
+  // gmt_offset can stay zero, because any CURRENT_TIME we get is from a local source
+  command error_t Init.init() {
+    _time_tzinfo[0].gmt_offset = 60L * 0L;
+
+    g_tick_local_time = call LocalTime64.get();
+    call Timer.startPeriodic(10*1024L);
+    signal Time.tick();
+    return SUCCESS;
+  }
+
+  command void Time.setCurrentTime(time_t current_time){
+    atomic g_current_time = current_time;
+    g_local_time = call LocalTime64.get();
+  }
+
+  command void Time.setZoneInfo(uint16_t g_year, 
+				time_t g_year_time, 
+				uint8_t g_zero_day, 
+				uint16_t g_dst_fday, 
+				uint16_t g_dst_lday){
+    g_first_year = g_year;
+    
+    year_info[0].year_seconds = g_year_time;
+    year_info[0].wday_offset = g_zero_day;
+
+    if(!(g_year % 4))
+      year_info[0].isleap = 1;
+    else
+      year_info[0].isleap = 0;
+
+    year_info[0].dst_first_yday = g_dst_fday;
+    year_info[0].dst_last_yday = g_dst_lday;
+  }
+
+  void dotick(int force) {
+    time_t tick = call LocalTime64.get();
+    if (force || tick >= (g_tick_local_time + 32768L*10)) {
+      signal Time.tick();
+      g_tick_local_time = tick;
+    }
+  }
+  event void Timer.fired() {
+    dotick(0);
+  }
+
+  /*  
+   * save this pending tos-2.x port of ip stack
+   *
+   event void NTPClient.timestampReceived( uint32_t *seconds, uint32_t *fraction ) {
+   g_current_time = *seconds;
+   g_local_time = call LocalTime64.get();
+   dotick(1);
+   }
+  */
+
+  struct tm __time_tm;
+
+  /* Notes:
+   * If time_t is 32 bits, then no overflow is possible.
+   * It time_t is > 32 bits, this needs to be adjusted to deal with overflow.
+   */
+
+  static const int8_t days_per_month[] = {
+    31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31, /* non-leap */
+    29,
+  };
+
+#ifdef __UCLIBC_HAS_TM_EXTENSIONS__
+  static const char utc_string[] = "UTC";
+#endif
+
+  /*
+    import time
+    for y in range(2004,2008):
+       t = time.mktime((y, 1, 1, 0, 0, 0, 0, 0, 0))-5*3600
+       print time.gmtime(t)
+    
+    (2004, 1, 1, 0, 0, 0, 3, 1, 0)
+    (2005, 1, 1, 0, 0, 0, 5, 1, 0)
+    (2006, 1, 1, 0, 0, 0, 6, 1, 0)
+    (2007, 1, 1, 0, 0, 0, 0, 1, 0)
+    from below in year_info struct for 2004-7
+    { 0x3ff36300, 3, 1 },
+    { 0x41d5e800, 5, 0 },
+    { 0x43b71b80, 6, 0 },
+    { 0x45984f00, 0, 0 }
+    
+    NTP Timestamp starts Jan 1, 1900 and is 2208988800 jan 1 1970
+    '%x' % (int(time.mktime((2004, 1, 1, 0, 0, 0, 3, 1, 0))) -18000 + 2208988800l)
+    
+    and now, 
+    
+    (2009, 1, 1, 0, 0, 0, 3, 1, 0)
+    (2010, 1, 1, 0, 0, 0, 4, 1, 0)
+    (2011, 1, 1, 0, 0, 0, 5, 1, 0)
+    (2012, 1, 1, 0, 0, 0, 6, 1, 0)
+    
+  */
+
+  struct tm *_time_t2tm(const time_t *timer, int localtime, struct tm *result)
+  {
+    uint16_t seconds16;
+    int i;
+    time_t seconds = *timer;
+    uint16_t days;
+    uint16_t hour, min;
+    int isleap = 0;
+
+    //if year_info has dst_first_yday and dst_last_yday defined, then HAVE_DST should be defined up top.
+#ifdef HAVE_DST
+    int isdst = 0;
+#endif
+
+    if (localtime) {
+      seconds -= _time_tzinfo[0].gmt_offset;
+    }
+
+    g_seconds = seconds;
+    if (seconds < year_info[0].year_seconds) {
+      memset(result, 0, sizeof(struct tm));
+      return NULL;
+    }
+    
+    if(NUM_YEARS > 1){
+      for (i = 0; i < NUM_YEARS-1; i++) {
+	if (seconds < year_info[i+1].year_seconds) {
+	  seconds -= year_info[i].year_seconds;
+	  result->tm_year = g_first_year + i;
+	  isleap = year_info[i].isleap;
+	  break;
+	}
+      }
+    }
+    else{
+      i = 0;
+      seconds -= year_info[i].year_seconds;
+      result->tm_year = g_first_year + i;
+      isleap = year_info[i].isleap;
+    }
+    g_year_seconds = year_info[i].year_seconds;
+    g_seconds_from_year = seconds;
+    days = seconds / 86400L;
+    g_days = days;
+    seconds -= days * 86400L;
+    g_seconds_from_day = seconds;
+#ifdef HAVE_DST
+    if (days >= year_info[i].dst_first_yday && 
+	days <= year_info[i].dst_last_yday) {
+      isdst = 1;
+      seconds += 3600;
+      if (seconds < 0) {
+	days--;
+	seconds += 86400L;
+      }
+      if (days < 0) {
+	result->tm_year--;
+	days += 365;
+      }
+    }
+#endif /* HAVE_DST */
+
+    result->tm_yday = days; 
+#ifdef HAVE_WDAY
+    result->tm_wday = (result->tm_yday + year_info[i+1].wday_offset) % 7;
+#endif
+
+    for (i = 0; i < 12; i++) {
+      int8_t dpm = days_per_month[i];
+      if (i == 1 && isleap) dpm++;
+      if (days < dpm)
+	break;
+      days -= dpm;
+    }
+    result->tm_mon = i;
+    result->tm_mday = 1 + days ;
+
+    hour = seconds / 3600;
+    seconds16 = seconds - hour * 3600;
+    result->tm_hour = hour;
+    min = seconds16 / 60;
+    result->tm_sec = seconds16 - min * 60;
+    result->tm_min = min;
+    return result;
+  }
+
+  command error_t Time.gmtime(const time_t *timer, struct tm *ptm)
+  {
+
+    _time_t2tm(timer, 0, ptm); /* Can return NULL... */
+
+    return SUCCESS;
+  }
+
+  /* Note: timezone locking is done by localtime_r. */
+
+  static int tm_isdst(register const struct tm *__restrict ptm) {
+    // no DST in arizona
+    return 0;
+  }
+    
+  command error_t Time.localtime(const time_t *timer, struct tm *result)
+  {
+    _time_t2tm(timer, 1, result);
+
+    return SUCCESS;
+  }
+  static char *wday_name[] = { "Sun", "Mon", "Tues", "Wed", "Thur", "Fri", "Sat" };
+  static char *mon_name[] = { "Jan", "Feb", "Mar", "Apr", "May", "Jun", "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" };
+  command error_t Time.asctime(const struct tm *tm, char *buf, int buflen)
+  {
+    char *out = buf;
+    char *outmax = buf + buflen;
+    out += snprintf(out, outmax - out, "%02d:%02d:%02d",
+		    tm->tm_hour, tm->tm_min, tm->tm_sec);
+#ifdef HAVE_WDAY
+    out += snprintf(out, outmax - out, " %s", wday_name[tm->tm_wday]);
+#endif
+    out += snprintf(out, outmax - out, " %s %d %d",
+		    mon_name[tm->tm_mon], tm->tm_mday, tm->tm_year);
+    return SUCCESS;
+  }
+
+  command error_t Time.time(time_t *timer)
+  {
+    // 1/32768 seconds since last NTP response
+    uint64_t o = call LocalTime64.get() - g_local_time;
+
+    *timer = g_current_time + (time_t)(o >> 15);
+    
+    return SUCCESS;
+  }
+
+  default event void Time.tick() { }
+
+  /*****************************************
+   *  ParamView interface
+   * save for ip stack port to tos-2.x   
+
+  const struct Param s_Time[] = {
+    { "ntp time", PARAM_TYPE_UINT32, &g_current_time },
+    { "local time", PARAM_TYPE_UINT32, &g_local_time },
+    { NULL, 0, NULL }
+  };
+
+  struct ParamList g_TimeList = { "time", &s_Time[0] };
+
+  command error_t ParamView.init()
+  {
+    signal ParamView.add( &g_TimeList );
+    return SUCCESS;
+  }
+  *****************************************/
+
+}
diff --git a/tos/platforms/sam3u_ek/chips/sd/integer.h b/tos/platforms/sam3u_ek/chips/sd/integer.h
new file mode 100644
index 00000000..818b949d
--- /dev/null
+++ b/tos/platforms/sam3u_ek/chips/sd/integer.h
@@ -0,0 +1,81 @@
+/*-----------------------------------------------------------------------------/
+/ FatFs module is an open source software to implement FAT file system to
+/ small embedded systems. This is a free software and is opened for education,
+/ research and commecial developments under license policy of following trems.
+/
+/  Copyright (C) 2009, ChaN, all right reserved.
+/
+/ * The FatFs module is a free software and there is NO WARRANTY.
+/ * No restriction on use. You can use, modify and redistribute it for
+/   personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY.
+/ * Redistributions of source code must retain the above copyright notice.
+/
+/-----------------------------------------------------------------------------*/
+/*
+ * Portions of this code:
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * tinyos port from ChaN's FatFs (thank you!):
+ *
+ * @author Steve Ayer
+ * @date   April, 2009
+ * ported to tos-2.x (easy)
+ * @date January, 2010
+ */
+
+#ifndef _INTEGER
+
+// original typedefs converted to nesc stdint.h types for tos consistency
+/* These types must be 16-bit, 32-bit or larger integer */
+typedef int		INT;
+typedef unsigned int    UINT;
+
+/* These types must be 8-bit integer */
+// had to change signed char typedef CHAR to SCHAR to avoid conflict with msp430 usart.h (#define CHAR  0x10)
+typedef int8_t	SCHAR;
+typedef uint8_t	UCHAR;
+typedef uint8_t	BYTE;
+
+/* These types must be 16-bit integer */
+typedef int16_t		SHORT;
+typedef uint16_t	USHORT;
+typedef uint16_t	WORD;
+typedef uint16_t	WCHAR;
+
+/* These types must be 32-bit integer */
+typedef long		LONG;
+typedef unsigned long	ULONG;
+typedef uint32_t	DWORD;
+
+/* Boolean type */
+//typedef enum { FALSE = 0, TRUE } BOOL;
+typedef char BOOL;
+
+#define _INTEGER
+#endif
diff --git a/tos/platforms/sam3u_ek/hardware.h b/tos/platforms/sam3u_ek/hardware.h
new file mode 100644
index 00000000..a8c57594
--- /dev/null
+++ b/tos/platforms/sam3u_ek/hardware.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Definitions of stuff specific to the SAM3U-EK board.
+ * Includes definitions for the SAM3U MCU.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#ifndef HARDWARE_H
+#define HARDWARE_H
+
+#include "sam3uhardware.h"
+
+// #define this so we don't doubly define time_t with conflicting types
+// in SD card implementation Time.h file
+#define __time_t_defined
+#include <sys/types.h>
+
+#ifndef PLATFORM_BAUDRATE
+#define PLATFORM_BAUDRATE (9600)
+#endif
+
+#define IRQ_PRIO_UDPHS    (0x81)
+#define IRQ_PRIO_TWI1     (0x82)
+#define IRQ_PRIO_TWI0     (0x83)
+#define IRQ_PRIO_DMAC     (0x84)
+#define IRQ_PRIO_ADC12B   (0x85)
+#define IRQ_PRIO_PIO      (0x86)
+#define IRQ_PRIO_SPI      (0x87)
+#define IRQ_PRIO_UART     (0x88)
+#define IRQ_PRIO_USART0   (0x89)
+#define IRQ_PRIO_USART1   (0x90)
+#define IRQ_PRIO_USART2   (0x91)
+#define IRQ_PRIO_HSMCI    (0x92)
+
+#endif // HARDWARE_H
diff --git a/tos/platforms/sam3u_ek/lcd/Draw.nc b/tos/platforms/sam3u_ek/lcd/Draw.nc
new file mode 100644
index 00000000..d1e7f71e
--- /dev/null
+++ b/tos/platforms/sam3u_ek/lcd/Draw.nc
@@ -0,0 +1,98 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+
+interface Draw
+{
+    async command void fill(uint32_t color);
+
+    async command void drawPixel(
+            uint32_t x,
+            uint32_t y,
+            uint32_t c);
+
+    async command void drawRectangle(
+            uint32_t x,
+            uint32_t y,
+            uint32_t width,
+            uint32_t height,
+            uint32_t color);
+
+    async command void drawString(
+            uint32_t x,
+            uint32_t y,
+            const char *pString,
+            uint32_t color);
+
+    async command void drawStringWithBGColor(
+            uint32_t x,
+            uint32_t y,
+            const char *pString,
+            uint32_t fontColor,
+            uint32_t bgColor);
+
+    async command void drawInt(
+            uint32_t x,
+            uint32_t y,
+            uint32_t n,
+            int8_t sign,
+            uint32_t fontColor);
+
+    async command void drawIntWithBGColor(
+            uint32_t x,
+            uint32_t y,
+            uint32_t n,
+            int8_t sign,
+            uint32_t fontColor,
+            uint32_t bgColor);
+
+    async command void getStringSize(
+            const char *pString,
+            uint32_t *pWidth,
+            uint32_t *pHeight);
+
+    async command void drawChar(
+            uint32_t x,
+            uint32_t y,
+            char c,
+            uint32_t color);
+
+    async command void drawCharWithBGColor(
+            uint32_t x,
+            uint32_t y,
+            char c,
+            uint32_t fontColor,
+            uint32_t bgColor);
+}
diff --git a/tos/platforms/sam3u_ek/lcd/Hx8347.nc b/tos/platforms/sam3u_ek/lcd/Hx8347.nc
new file mode 100644
index 00000000..c2ee23ee
--- /dev/null
+++ b/tos/platforms/sam3u_ek/lcd/Hx8347.nc
@@ -0,0 +1,51 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+
+interface Hx8347
+{
+    async command void writeReg(void *pLcdBase, uint8_t reg, uint16_t data);
+    async command uint16_t readReg(void *pLcdBase, uint8_t reg);
+    async command uint16_t readStatus(void *pLcdBase);
+    async command void writeRAM_Prepare(void *pLcdBase);
+    async command void writeRAM(void *pLcdBase, uint16_t color);
+    async command uint16_t readRAM(void *pLcdBase);
+    command void initialize(void *pLcdBase);
+    event void initializeDone(error_t err);
+    async command void setCursor(void *pLcdBase, uint16_t x, uint16_t y);
+    command void on(void *pLcdBase);
+    event void onDone();
+    async command void off(void *pLcdBase);
+}
diff --git a/tos/platforms/sam3u_ek/lcd/Hx8347C.nc b/tos/platforms/sam3u_ek/lcd/Hx8347C.nc
new file mode 100644
index 00000000..3a0adcb2
--- /dev/null
+++ b/tos/platforms/sam3u_ek/lcd/Hx8347C.nc
@@ -0,0 +1,404 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+
+module Hx8347C
+{
+    uses
+    {
+        interface Timer<TMilli> as InitTimer;
+        interface Timer<TMilli> as OnTimer;
+    }
+
+    provides interface Hx8347;
+}
+implementation
+{
+
+    typedef volatile uint16_t REG16;
+
+    enum {
+        INIT0,
+        INIT1,
+        INIT2,
+    };
+    uint8_t initState = INIT0;
+
+
+    enum {
+        ON0,
+        ON1,
+        ON2,
+    };
+    uint8_t onState = ON0;
+
+    void* spLcdBase;
+
+#define BOARD_LCD_RS     (1 << 1)
+    // LCD index register address
+#define LCD_IR(baseAddr) (*((REG16 *)(baseAddr)))
+    // LCD status register address
+#define LCD_SR(baseAddr) (*((REG16 *)(baseAddr)))
+    // LCD data address
+#define LCD_D(baseAddr)  (*((REG16 *)((uint32_t)(baseAddr) + BOARD_LCD_RS)))
+
+    // HX8347 ID code
+#define HX8347_HIMAXID_CODE    0x47
+
+    // HX8347 LCD Registers
+#define HX8347_R00H        0x00
+#define HX8347_R01H        0x01
+#define HX8347_R02H        0x02
+#define HX8347_R03H        0x03
+#define HX8347_R04H        0x04
+#define HX8347_R05H        0x05
+#define HX8347_R06H        0x06
+#define HX8347_R07H        0x07
+#define HX8347_R08H        0x08
+#define HX8347_R09H        0x09
+#define HX8347_R0AH        0x0A
+#define HX8347_R0CH        0x0C
+#define HX8347_R0DH        0x0D
+#define HX8347_R0EH        0x0E
+#define HX8347_R0FH        0x0F
+#define HX8347_R10H        0x10
+#define HX8347_R11H        0x11
+#define HX8347_R12H        0x12
+#define HX8347_R13H        0x13
+#define HX8347_R14H        0x14
+#define HX8347_R15H        0x15
+#define HX8347_R16H        0x16
+#define HX8347_R18H        0x18
+#define HX8347_R19H        0x19
+#define HX8347_R1AH        0x1A
+#define HX8347_R1BH        0x1B
+#define HX8347_R1CH        0x1C
+#define HX8347_R1DH        0x1D
+#define HX8347_R1EH        0x1E
+#define HX8347_R1FH        0x1F
+#define HX8347_R20H        0x20
+#define HX8347_R21H        0x21
+#define HX8347_R22H        0x22
+#define HX8347_R23H        0x23
+#define HX8347_R24H        0x24
+#define HX8347_R25H        0x25
+#define HX8347_R26H        0x26
+#define HX8347_R27H        0x27
+#define HX8347_R28H        0x28
+#define HX8347_R29H        0x29
+#define HX8347_R2AH        0x2A
+#define HX8347_R2BH        0x2B
+#define HX8347_R2CH        0x2C
+#define HX8347_R2DH        0x2D
+#define HX8347_R35H        0x35
+#define HX8347_R36H        0x36
+#define HX8347_R37H        0x37
+#define HX8347_R38H        0x38
+#define HX8347_R39H        0x39
+#define HX8347_R3AH        0x3A
+#define HX8347_R3BH        0x3B
+#define HX8347_R3CH        0x3C
+#define HX8347_R3DH        0x3D
+#define HX8347_R3EH        0x3E
+#define HX8347_R40H        0x40
+#define HX8347_R41H        0x41
+#define HX8347_R42H        0x42
+#define HX8347_R43H        0x43
+#define HX8347_R44H        0x44
+#define HX8347_R45H        0x45
+#define HX8347_R46H        0x46
+#define HX8347_R47H        0x47
+#define HX8347_R48H        0x48
+#define HX8347_R49H        0x49
+#define HX8347_R4AH        0x4A
+#define HX8347_R4BH        0x4B
+#define HX8347_R4CH        0x4C
+#define HX8347_R4DH        0x4D
+#define HX8347_R4EH        0x4E
+#define HX8347_R4FH        0x4F
+#define HX8347_R50H        0x50
+#define HX8347_R51H        0x51
+#define HX8347_R64H        0x64
+#define HX8347_R65H        0x65
+#define HX8347_R66H        0x66
+#define HX8347_R67H        0x67
+#define HX8347_R70H        0x70
+#define HX8347_R72H        0x72
+#define HX8347_R90H        0x90
+#define HX8347_R91H        0x91
+#define HX8347_R93H        0x93
+#define HX8347_R94H        0x94
+#define HX8347_R95H        0x95
+
+    /**
+     * Write data to LCD Register.
+     * \param pLcdBase   LCD base address.
+     * \param reg        Register address.
+     * \param data       Data to be written.
+     */
+    async command void Hx8347.writeReg(void *pLcdBase, uint8_t reg, uint16_t data)
+    {
+        LCD_IR(pLcdBase) = reg;
+        LCD_D(pLcdBase)  = data;
+    }
+
+    /**
+     * Read data from LCD Register.
+     * \param pLcdBase   LCD base address.
+     * \param reg        Register address.
+     * \return data      Data to be read.
+     */
+    async command uint16_t Hx8347.readReg(void *pLcdBase, uint8_t reg)
+    {
+        LCD_IR(pLcdBase) = reg;
+        return LCD_D(pLcdBase);
+    }
+
+    /**
+     * Read LCD status Register.
+     * \param pLcdBase   LCD base address.
+     * \param reg        Register address.
+     * \return data      Status Data.
+     */
+    async command uint16_t Hx8347.readStatus(void *pLcdBase)
+    {
+        return LCD_SR(pLcdBase);
+    }
+
+    /**
+     * Prepare to write GRAM data.
+     * \param pLcdBase   LCD base address.
+     */
+    async command void Hx8347.writeRAM_Prepare(void *pLcdBase)
+    {
+        LCD_IR(pLcdBase) = HX8347_R22H;
+    }
+
+    /**
+     * Write data to LCD GRAM.
+     * \param pLcdBase   LCD base address.
+     * \param color      16-bits RGB color.
+     */
+    async command void Hx8347.writeRAM(void *pLcdBase, uint16_t color)
+    {
+        // Write 16-bit GRAM Reg
+        LCD_D(pLcdBase) = color;
+    }
+
+    /**
+     * Read GRAM data.
+     * \param pLcdBase   LCD base address.
+     * \return           16-bits RGB color.
+     */
+    async command uint16_t Hx8347.readRAM(void *pLcdBase)
+    {
+        // Read 16-bit GRAM Reg
+        return LCD_D(pLcdBase);
+    }
+
+    event void InitTimer.fired()
+    {
+        // advance in the initialization 
+        call Hx8347.initialize(spLcdBase);
+    }
+
+    /**
+     * Initialize the LCD controller.
+     * \param pLcdBase   LCD base address.
+     */
+    command void Hx8347.initialize(void *pLcdBase)
+    {
+        uint16_t chipid;
+
+        switch(initState)
+        {
+            case INIT0:
+                spLcdBase = pLcdBase;
+
+                // Check HX8347 chipid
+                chipid = call Hx8347.readReg(pLcdBase, HX8347_R67H);
+                if(chipid != HX8347_HIMAXID_CODE) {
+
+                    // Read HX8347 chip ID error, skip initialization.
+                    signal Hx8347.initializeDone(FAIL);
+                    return ;
+                }
+
+                // Start internal OSC
+                call Hx8347.writeReg(pLcdBase, HX8347_R19H, 0x49); // OSCADJ=10 0000, OSD_EN=1 //60Hz
+                call Hx8347.writeReg(pLcdBase, HX8347_R93H, 0x0C); // RADJ=1100
+
+                // Power on flow
+                call Hx8347.writeReg(pLcdBase, HX8347_R44H, 0x4D); // VCM=100 1101
+                call Hx8347.writeReg(pLcdBase, HX8347_R45H, 0x11); // VDV=1 0001
+                call Hx8347.writeReg(pLcdBase, HX8347_R20H, 0x40); // BT=0100
+                call Hx8347.writeReg(pLcdBase, HX8347_R1DH, 0x07); // VC1=111
+                call Hx8347.writeReg(pLcdBase, HX8347_R1EH, 0x00); // VC3=000
+                call Hx8347.writeReg(pLcdBase, HX8347_R1FH, 0x04); // VRH=0100
+
+                call Hx8347.writeReg(pLcdBase, HX8347_R1CH, 0x04); // AP=100
+                call Hx8347.writeReg(pLcdBase, HX8347_R1BH, 0x10); // GASENB=0, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0
+                initState = INIT1;
+                call InitTimer.startOneShot(50);
+                break;
+
+            case INIT1:
+
+                call Hx8347.writeReg(pLcdBase, HX8347_R43H, 0x80); // Set VCOMG=1
+                initState = INIT2;
+                call InitTimer.startOneShot(50);
+                break;
+
+            case INIT2:
+
+                // Gamma for CMO 2.8
+                call Hx8347.writeReg(pLcdBase, HX8347_R46H, 0x95);
+                call Hx8347.writeReg(pLcdBase, HX8347_R47H, 0x51);
+                call Hx8347.writeReg(pLcdBase, HX8347_R48H, 0x00);
+                call Hx8347.writeReg(pLcdBase, HX8347_R49H, 0x36);
+                call Hx8347.writeReg(pLcdBase, HX8347_R4AH, 0x11);
+                call Hx8347.writeReg(pLcdBase, HX8347_R4BH, 0x66);
+                call Hx8347.writeReg(pLcdBase, HX8347_R4CH, 0x14);
+                call Hx8347.writeReg(pLcdBase, HX8347_R4DH, 0x77);
+                call Hx8347.writeReg(pLcdBase, HX8347_R4EH, 0x13);
+                call Hx8347.writeReg(pLcdBase, HX8347_R4FH, 0x4C);
+                call Hx8347.writeReg(pLcdBase, HX8347_R50H, 0x46);
+                call Hx8347.writeReg(pLcdBase, HX8347_R51H, 0x46);
+
+                //240x320 window setting
+                call Hx8347.writeReg(pLcdBase, HX8347_R02H, 0x00); // Column address start2
+                call Hx8347.writeReg(pLcdBase, HX8347_R03H, 0x00); // Column address start1
+                call Hx8347.writeReg(pLcdBase, HX8347_R04H, 0x00); // Column address end2
+                call Hx8347.writeReg(pLcdBase, HX8347_R05H, 0xEF); // Column address end1
+                call Hx8347.writeReg(pLcdBase, HX8347_R06H, 0x00); // Row address start2
+                call Hx8347.writeReg(pLcdBase, HX8347_R07H, 0x00); // Row address start1
+                call Hx8347.writeReg(pLcdBase, HX8347_R08H, 0x01); // Row address end2
+                call Hx8347.writeReg(pLcdBase, HX8347_R09H, 0x3F); // Row address end1
+
+                // Display Setting
+                call Hx8347.writeReg(pLcdBase, HX8347_R01H, 0x06); // IDMON=0, INVON=1, NORON=1, PTLON=0
+                call Hx8347.writeReg(pLcdBase, HX8347_R16H, 0xC8); // MY=1, MX=1, MV=0, BGR=1
+                call Hx8347.writeReg(pLcdBase, HX8347_R23H, 0x95); // N_DC=1001 0101
+                call Hx8347.writeReg(pLcdBase, HX8347_R24H, 0x95); // P_DC=1001 0101
+                call Hx8347.writeReg(pLcdBase, HX8347_R25H, 0xFF); // I_DC=1111 1111
+                call Hx8347.writeReg(pLcdBase, HX8347_R27H, 0x06); // N_BP=0000 0110
+                call Hx8347.writeReg(pLcdBase, HX8347_R28H, 0x06); // N_FP=0000 0110
+                call Hx8347.writeReg(pLcdBase, HX8347_R29H, 0x06); // P_BP=0000 0110
+                call Hx8347.writeReg(pLcdBase, HX8347_R2AH, 0x06); // P_FP=0000 0110
+                call Hx8347.writeReg(pLcdBase, HX8347_R2CH, 0x06); // I_BP=0000 0110
+                call Hx8347.writeReg(pLcdBase, HX8347_R2DH, 0x06); // I_FP=0000 0110
+                call Hx8347.writeReg(pLcdBase, HX8347_R3AH, 0x01); // N_RTN=0000, N_NW=001
+                call Hx8347.writeReg(pLcdBase, HX8347_R3BH, 0x01); // P_RTN=0000, P_NW=001
+                call Hx8347.writeReg(pLcdBase, HX8347_R3CH, 0xF0); // I_RTN=1111, I_NW=000
+                call Hx8347.writeReg(pLcdBase, HX8347_R3DH, 0x00); // DIV=00
+                call Hx8347.writeReg(pLcdBase, HX8347_R3EH, 0x38); // SON=38h
+                call Hx8347.writeReg(pLcdBase, HX8347_R40H, 0x0F); // GDON=0Fh
+                call Hx8347.writeReg(pLcdBase, HX8347_R41H, 0xF0); // GDOF=F0h
+                initState = INIT0;
+                signal Hx8347.initializeDone(SUCCESS);
+                break;
+        }
+    }
+
+
+    event void OnTimer.fired()
+    {
+        call Hx8347.on(spLcdBase);
+    }
+    /**
+     * Turn on the LCD.
+     * \param pLcdBase   LCD base address.
+     */
+    command void Hx8347.on(void *pLcdBase)
+    {
+        switch(onState)
+        {
+            case ON0:
+                // Display ON Setting
+                spLcdBase = pLcdBase;
+                call Hx8347.writeReg(pLcdBase, HX8347_R90H, 0x7F); // SAP=0111 1111
+                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x04); // GON=0, DTE=0, D=01
+                call OnTimer.startOneShot(100);
+                onState = ON1;
+                break;
+
+            case ON1:
+                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x24); // GON=1, DTE=0, D=01
+                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x2C); // GON=1, DTE=0, D=11
+                call OnTimer.startOneShot(100);
+                onState = ON2;
+                break;
+
+            case ON2:
+                call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x3C); // GON=1, DTE=1, D=11
+                onState = ON0;
+                signal Hx8347.onDone();
+                break;
+        }
+    }
+
+    /**
+     * Turn off the LCD.
+     * \param pLcdBase   LCD base address.
+     */
+    async command void Hx8347.off(void *pLcdBase)
+    {
+        call Hx8347.writeReg(pLcdBase, HX8347_R90H, 0x00); // SAP=0000 0000
+        call Hx8347.writeReg(pLcdBase, HX8347_R26H, 0x00); // GON=0, DTE=0, D=00
+    }
+
+    /**
+     * Set cursor of LCD srceen.
+     * \param pLcdBase   LCD base address.
+     * \param x          X-coordinate of upper-left corner on LCD.
+     * \param y          Y-coordinate of upper-left corner on LCD.
+     */
+    async command void Hx8347.setCursor(void *pLcdBase, uint16_t x, uint16_t y)
+    {
+        uint8_t x1, x2, y1l, y2;
+
+        x1 = x & 0xff;
+        x2 = (x & 0xff00) >>8;
+        y1l = y & 0xff;
+        y2 = (y & 0xff00) >>8;
+        call Hx8347.writeReg(pLcdBase, HX8347_R02H, x2); // column high
+        call Hx8347.writeReg(pLcdBase, HX8347_R03H, x1); // column low
+        call Hx8347.writeReg(pLcdBase, HX8347_R06H, y2); // row high
+        call Hx8347.writeReg(pLcdBase, HX8347_R07H, y1l); // row low
+    }
+
+    default event void Hx8347.initializeDone(error_t err) {};
+    default event void Hx8347.onDone() {};
+}
diff --git a/tos/platforms/sam3u_ek/lcd/Lcd.nc b/tos/platforms/sam3u_ek/lcd/Lcd.nc
new file mode 100644
index 00000000..2440c756
--- /dev/null
+++ b/tos/platforms/sam3u_ek/lcd/Lcd.nc
@@ -0,0 +1,53 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+
+interface Lcd
+{
+    command void initialize();
+
+    event void initializeDone(error_t err);
+
+    command void * displayBuffer(void *pBuffer);
+    
+    command void start();
+
+    event void startDone();
+    
+    command void stop();
+
+    command void setBacklight (uint8_t step);
+}
+
diff --git a/tos/platforms/sam3u_ek/lcd/LcdC.nc b/tos/platforms/sam3u_ek/lcd/LcdC.nc
new file mode 100644
index 00000000..d10c740f
--- /dev/null
+++ b/tos/platforms/sam3u_ek/lcd/LcdC.nc
@@ -0,0 +1,87 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+
+configuration LcdC
+{
+    provides
+    {
+        interface Lcd;
+        interface Draw;
+    }
+}
+implementation
+{
+    
+    components LcdP, Hx8347C;
+
+    Lcd = LcdP.Lcd;
+    Draw = LcdP.Draw;
+
+    LcdP.Hx8347 -> Hx8347C;
+
+    components new TimerMilliC() as T0;
+    components new TimerMilliC() as T1;
+    Hx8347C.InitTimer -> T0;
+    Hx8347C.OnTimer -> T1;
+
+    components HplSam3uGeneralIOC;
+    LcdP.DB0 -> HplSam3uGeneralIOC.HplPioB9;
+    LcdP.DB1 -> HplSam3uGeneralIOC.HplPioB10;
+    LcdP.DB2 -> HplSam3uGeneralIOC.HplPioB11;
+    LcdP.DB3 -> HplSam3uGeneralIOC.HplPioB12;
+    LcdP.DB4 -> HplSam3uGeneralIOC.HplPioB13;
+    LcdP.DB5 -> HplSam3uGeneralIOC.HplPioB14;
+    LcdP.DB6 -> HplSam3uGeneralIOC.HplPioB15;
+    LcdP.DB7 -> HplSam3uGeneralIOC.HplPioB16;
+    LcdP.DB8 -> HplSam3uGeneralIOC.HplPioB25;
+    LcdP.DB9 -> HplSam3uGeneralIOC.HplPioB26;
+    LcdP.DB10 -> HplSam3uGeneralIOC.HplPioB27;
+    LcdP.DB11 -> HplSam3uGeneralIOC.HplPioB28;
+    LcdP.DB12 -> HplSam3uGeneralIOC.HplPioB29;
+    LcdP.DB13 -> HplSam3uGeneralIOC.HplPioB30;
+    LcdP.DB14 -> HplSam3uGeneralIOC.HplPioB31;
+    LcdP.DB15 -> HplSam3uGeneralIOC.HplPioB6;
+
+    LcdP.LCD_RS -> HplSam3uGeneralIOC.HplPioB8;
+    LcdP.NRD    -> HplSam3uGeneralIOC.HplPioB19;
+    LcdP.NWE    -> HplSam3uGeneralIOC.HplPioB23;
+    LcdP.NCS2   -> HplSam3uGeneralIOC.HplPioC16;
+
+    LcdP.Backlight -> HplSam3uGeneralIOC.PioC19;
+
+    components HplSam3uClockC;
+    LcdP.HSMC4ClockControl -> HplSam3uClockC.HSMC4PPCntl;
+}
diff --git a/tos/platforms/sam3u_ek/lcd/LcdP.nc b/tos/platforms/sam3u_ek/lcd/LcdP.nc
new file mode 100644
index 00000000..b80b2780
--- /dev/null
+++ b/tos/platforms/sam3u_ek/lcd/LcdP.nc
@@ -0,0 +1,561 @@
+/**
+ * Copyright (c) 2009 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Heavily inspired by the at91 library.
+ * @author Thomas Schmid
+ **/
+#include <sam3smchardware.h>
+#include "lcd.h"
+#include "color.h"
+#include "font.h"
+#include "font10x14.h"
+
+module LcdP
+{
+    uses {
+        interface Hx8347;
+
+        interface HplSam3GeneralIOPin as DB0;
+        interface HplSam3GeneralIOPin as DB1;
+        interface HplSam3GeneralIOPin as DB2;
+        interface HplSam3GeneralIOPin as DB3;
+        interface HplSam3GeneralIOPin as DB4;
+        interface HplSam3GeneralIOPin as DB5;
+        interface HplSam3GeneralIOPin as DB6;
+        interface HplSam3GeneralIOPin as DB7;
+        interface HplSam3GeneralIOPin as DB8;
+        interface HplSam3GeneralIOPin as DB9;
+        interface HplSam3GeneralIOPin as DB10;
+        interface HplSam3GeneralIOPin as DB11;
+        interface HplSam3GeneralIOPin as DB12;
+        interface HplSam3GeneralIOPin as DB13;
+        interface HplSam3GeneralIOPin as DB14;
+        interface HplSam3GeneralIOPin as DB15;
+        interface HplSam3GeneralIOPin as LCD_RS;
+        interface HplSam3GeneralIOPin as NRD;
+        interface HplSam3GeneralIOPin as NWE;
+        interface HplSam3GeneralIOPin as NCS2;
+
+        interface GeneralIO as Backlight;
+
+        interface HplSam3PeripheralClockCntl as HSMC4ClockControl;
+    }
+    provides 
+    {
+        interface Lcd;
+        interface Draw;
+    }
+}
+implementation
+{
+
+#define RGB24ToRGB16(color) (((color >> 8) & 0xF800) | \
+        ((color >> 5) & 0x7E0) | \
+        ((color >> 3) & 0x1F))
+#define BOARD_LCD_BASE   0x62000000
+
+    const Font gFont = {10, 14};
+
+    /**
+     * Initializes the LCD controller.
+     * \param pLcdBase   LCD base address.
+     */
+    command void Lcd.initialize(void)
+    {
+        // Enable pins
+        call DB0.disablePioControl();
+        call DB0.selectPeripheralA();
+        call DB0.enablePullUpResistor();
+        call DB1.disablePioControl();
+        call DB1.selectPeripheralA();
+        call DB1.enablePullUpResistor();
+        call DB2.disablePioControl();
+        call DB2.selectPeripheralA();
+        call DB2.enablePullUpResistor();
+        call DB3.disablePioControl();
+        call DB3.selectPeripheralA();
+        call DB3.enablePullUpResistor();
+        call DB4.disablePioControl();
+        call DB4.selectPeripheralA();
+        call DB4.enablePullUpResistor();
+        call DB5.disablePioControl();
+        call DB5.selectPeripheralA();
+        call DB5.enablePullUpResistor();
+        call DB6.disablePioControl();
+        call DB6.selectPeripheralA();
+        call DB6.enablePullUpResistor();
+        call DB7.disablePioControl();
+        call DB7.selectPeripheralA();
+        call DB7.enablePullUpResistor();
+        call DB8.disablePioControl();
+        call DB8.selectPeripheralA();
+        call DB8.enablePullUpResistor();
+        call DB9.disablePioControl();
+        call DB9.selectPeripheralA();
+        call DB9.enablePullUpResistor();
+        call DB10.disablePioControl();
+        call DB10.selectPeripheralA();
+        call DB10.enablePullUpResistor();
+        call DB11.disablePioControl();
+        call DB11.selectPeripheralA();
+        call DB11.enablePullUpResistor();
+        call DB12.disablePioControl();
+        call DB12.selectPeripheralA();
+        call DB12.enablePullUpResistor();
+        call DB13.disablePioControl();
+        call DB13.selectPeripheralA();
+        call DB13.enablePullUpResistor();
+        call DB14.disablePioControl();
+        call DB14.selectPeripheralA();
+        call DB14.enablePullUpResistor();
+        call DB15.disablePioControl();
+        call DB15.selectPeripheralB();
+        call DB15.enablePullUpResistor();
+        call LCD_RS.disablePioControl();
+        call LCD_RS.selectPeripheralB();
+        call LCD_RS.enablePullUpResistor();
+        call NRD.disablePioControl();
+        call NRD.selectPeripheralA();
+        call NRD.enablePullUpResistor();
+        call NWE.disablePioControl();
+        call NWE.selectPeripheralA();
+        call NWE.enablePullUpResistor();
+        call NCS2.disablePioControl();
+        call NCS2.selectPeripheralA();
+        call NCS2.enablePullUpResistor();
+
+        // Enable peripheral clock
+        call HSMC4ClockControl.enable();
+
+        // Enable pins
+        call Backlight.makeOutput();
+
+        // EBI SMC Configuration
+        SMC_CS2->setup.flat              = 0;
+        SMC_CS2->setup.bits.nwe_setup    = 4;
+        SMC_CS2->setup.bits.ncs_wr_setup = 2;
+        SMC_CS2->setup.bits.nrd_setup    = 4;
+        SMC_CS2->setup.bits.ncs_rd_setup = 2;
+
+        SMC_CS2->pulse.flat              = 0;
+        SMC_CS2->pulse.bits.nwe_pulse    = 5;
+        SMC_CS2->pulse.bits.ncs_wr_pulse = 18;
+        SMC_CS2->pulse.bits.nrd_pulse    = 5;
+        SMC_CS2->pulse.bits.ncs_rd_pulse = 18;
+
+        SMC_CS2->cycle.flat           = 0;
+        SMC_CS2->cycle.bits.nwe_cycle = 22;
+        SMC_CS2->cycle.bits.nrd_cycle = 22;
+
+        SMC_CS2->mode.bits.read_mode = 1;
+        SMC_CS2->mode.bits.write_mode = 1;
+        SMC_CS2->mode.bits.dbw = 1;
+        SMC_CS2->mode.bits.pmen = 0;
+
+        // Initialize LCD controller (HX8347)
+        call Hx8347.initialize((void *)BOARD_LCD_BASE);
+
+    }
+
+    event void Hx8347.initializeDone(error_t err)
+    {
+        if(err == SUCCESS)
+            call Lcd.setBacklight(25);
+        signal Lcd.initializeDone(err);
+    }
+
+    /**
+     * Turn on the LCD
+     */
+    command void Lcd.start(void)
+    {
+        call Hx8347.on((void *)BOARD_LCD_BASE);
+    }
+
+    event void Hx8347.onDone()
+    {
+        signal Lcd.startDone();
+    }
+
+    /**
+     * Turn off the LCD
+     */
+    command void Lcd.stop(void)
+    {
+        call Hx8347.off((void *)BOARD_LCD_BASE);
+    }
+
+    /**
+     * Set the backlight of the LCD.
+     * \param level   Backlight brightness level [1..32], 32 is maximum level.
+     */
+    command void Lcd.setBacklight (uint8_t level)
+    {
+        uint32_t i;
+
+        // Switch off backlight
+        call Backlight.clr();
+        i = 800 * (48000000 / 1000000);    // wait for at least 500us
+        while(i--);
+
+        // Set new backlight level
+        for (i = 0; i < level; i++) {
+
+
+            call Backlight.clr();
+            call Backlight.clr();
+            call Backlight.clr();
+
+            call Backlight.set();
+            call Backlight.set();
+            call Backlight.set();
+        }
+    }
+
+    command void* Lcd.displayBuffer(void* pBuffer)
+    {
+        return (void *) BOARD_LCD_BASE;
+    }
+
+    /**
+     * Fills the given LCD buffer with a particular color.
+     * Only works in 24-bits packed mode for now.
+     * \param color  Fill color.
+     */
+    async command void Draw.fill(uint32_t color)
+    {
+        uint32_t i;
+        unsigned short color16 = RGB24ToRGB16(color);
+
+
+        call Hx8347.setCursor((void *)BOARD_LCD_BASE, 0, 0);
+        call Hx8347.writeRAM_Prepare((void *)BOARD_LCD_BASE);
+        for (i = 0; i < (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT); i++) {
+
+            call Hx8347.writeRAM((void *)BOARD_LCD_BASE, color16);
+        }
+    }
+
+    /**
+     * Sets the specified pixel to the given color.
+     * !!! Only works in 24-bits packed mode for now. !!!
+     * \param x  X-coordinate of pixel.
+     * \param y  Y-coordinate of pixel.
+     * \param color  Pixel color.
+     */
+    async command void Draw.drawPixel(
+            uint32_t x,
+            uint32_t y,
+            uint32_t color)
+    {
+        unsigned short color16 = RGB24ToRGB16(color);
+        void* pBuffer = (void*)BOARD_LCD_BASE;
+
+        call Hx8347.setCursor(pBuffer, x, y);
+        call Hx8347.writeRAM_Prepare(pBuffer);
+        call Hx8347.writeRAM(pBuffer, color16);
+    }
+
+    /**
+     * Draws a rectangle inside a LCD buffer, at the given coordinates.
+     * \param x  X-coordinate of upper-left rectangle corner.
+     * \param y  Y-coordinate of upper-left rectangle corner.
+     * \param width  Rectangle width in pixels.
+     * \param height  Rectangle height in pixels.
+     * \param color  Rectangle color.
+     */
+    async command void Draw.drawRectangle(
+            uint32_t x,
+            uint32_t y,
+            uint32_t width,
+            uint32_t height,
+            uint32_t color)
+    {
+        uint32_t rx, ry;
+
+        for (ry=0; ry < height; ry++) {
+
+            for (rx=0; rx < width; rx++) {
+
+                call Draw.drawPixel(x+rx, y+ry, color);
+            }
+        }
+    }
+    /**
+     * Draws a string inside a LCD buffer, at the given coordinates. Line breaks
+     * will be honored.
+     * \param x  X-coordinate of string top-left corner.
+     * \param y  Y-coordinate of string top-left corner.
+     * \param pString  String to display.
+     * \param color  String color.
+     */
+    async command void Draw.drawString(
+            uint32_t x,
+            uint32_t y,
+            const char *pString,
+            uint32_t color)
+    {
+        uint32_t xorg = x;
+
+        while (*pString != 0) {
+            if (*pString == '\n') {
+
+                y += gFont.height + 2;
+                x = xorg;
+            }
+            else {
+
+                call Draw.drawChar(x, y, *pString, color);
+                x += gFont.width + 2;
+            }
+            pString++;
+        }
+    }
+
+    /**
+     * Draws a string inside a LCD buffer, at the given coordinates. Line breaks
+     * will be honored.
+     * \param x  X-coordinate of string top-left corner.
+     * \param y  Y-coordinate of string top-left corner.
+     * \param pString  String to display.
+     * \param color  String color.
+     */
+    async command void Draw.drawStringWithBGColor(
+            uint32_t x,
+            uint32_t y,
+            const char *pString,
+            uint32_t fontColor,
+            uint32_t bgColor)
+    {
+        uint32_t xorg = x;
+
+        while (*pString != 0) {
+            if (*pString == '\n') {
+
+                y += gFont.height + 2;
+                x = xorg;
+            }
+            else {
+
+                call Draw.drawCharWithBGColor(x, y, *pString, fontColor, bgColor);
+                x += gFont.width + 2;
+            }
+            pString++;
+        }
+    }
+
+    /**
+     * Draws an integer inside the LCD buffer
+     * \param x X-Coordinate of the integers top-right corner.
+     * \param y Y-Coordinate of the integers top-right corner.
+     * \param n Number to be printed on the screen
+     * \param sign <0 if negative number, >=0 if positive
+     * \param fontColor Integer color.
+     */
+    async command void Draw.drawInt(
+            uint32_t x,
+            uint32_t y,
+            uint32_t n,
+            int8_t sign,
+            uint32_t fontColor)
+    {
+        uint8_t i;
+        i = 0;
+        do {       /* generate digits in reverse order */
+            char c = n % 10 + '0';   /* get next digit */
+            if (i%3 == 0 && i>0)
+            {
+                call Draw.drawChar(x, y, '\'', fontColor);
+                x -= (gFont.width + 2);
+            }
+            call Draw.drawChar(x, y, c, fontColor);
+            x -= (gFont.width + 2);
+            i++;
+        } while ((n /= 10) > 0);     /* delete it */
+        if (sign < 0)
+            call Draw.drawChar(x, y, '-', fontColor);
+    }
+
+    /**
+     * Draws an integer inside the LCD buffer
+     * \param x X-Coordinate of the integers top-right corner.
+     * \param y Y-Coordinate of the integers top-right corner.
+     * \param n Number to be printed on the screen
+     * \param sign <0 if negative number, >=0 if positive
+     * \param color Integer color.
+     * \param bgColor Color of the background.
+     */
+    async command void Draw.drawIntWithBGColor(
+            uint32_t x,
+            uint32_t y,
+            uint32_t n,
+            int8_t sign,
+            uint32_t fontColor,
+            uint32_t bgColor)
+    {
+        uint8_t i;
+        i = 0;
+        do {       /* generate digits in reverse order */
+            char c = n % 10 + '0';   /* get next digit */
+            if (i%3 == 0 && i>0)
+            {
+                call Draw.drawChar(x, y, '\'', fontColor);
+                x -= (gFont.width + 2);
+            }
+            call Draw.drawCharWithBGColor(x, y, c, fontColor, bgColor);
+            x -= (gFont.width + 2);
+            i++;
+        } while ((n /= 10) > 0);     /* delete it */
+        if (sign < 0)
+            call Draw.drawCharWithBGColor(x, y, '-', fontColor, bgColor);
+    }
+
+    /**
+     * Returns the width & height in pixels that a string will occupy on the screen
+     * if drawn using Draw.drawString.
+     * \param pString  String.
+     * \param pWidth  Pointer for storing the string width (optional).
+     * \param pHeight  Pointer for storing the string height (optional).
+     * \return String width in pixels.
+     */
+    async command void Draw.getStringSize(
+            const char *pString,
+            uint32_t *pWidth,
+            uint32_t *pHeight)
+    {
+        uint32_t width = 0;
+        uint32_t height = gFont.height;
+
+        while (*pString != 0) {
+
+            if (*pString == '\n') {
+
+                height += gFont.height + 2;
+            }
+            else {
+
+                width += gFont.width + 2;
+            }
+            pString++;
+        }
+
+        if (width > 0) width -= 2;
+
+        if (pWidth) *pWidth = width;
+        if (pHeight) *pHeight = height;
+    }
+
+    /**
+     * Draws an ASCII character on the given LCD buffer.
+     * \param x  X-coordinate of character upper-left corner.
+     * \param y  Y-coordinate of character upper-left corner.
+     * \param c  Character to output.
+     * \param color  Character color.
+     */
+    async command void Draw.drawChar(
+            uint32_t x,
+            uint32_t y,
+            char c,
+            uint32_t color)
+    {
+        uint32_t row, col;
+
+        if(!((c >= 0x20) && (c <= 0x7F)))
+        {
+            return;
+        }
+
+        for (col = 0; col < 10; col++) {
+
+            for (row = 0; row < 8; row++) {
+
+                if ((pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1) {
+
+                    call Draw.drawPixel(x+col, y+row, color);
+                }
+            }
+            for (row = 0; row < 6; row++) {
+
+                if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1) {
+
+                    call Draw.drawPixel(x+col, y+row+8, color);
+                }
+            }
+        }
+    }
+
+    /**
+     * Draws an ASCII character on the given LCD buffer.
+     * \param x  X-coordinate of character upper-left corner.
+     * \param y  Y-coordinate of character upper-left corner.
+     * \param c  Character to output.
+     * \param fontColor  Character foreground color.
+     * \param bgColor Background color of character
+     */
+    async command void Draw.drawCharWithBGColor(
+            uint32_t x,
+            uint32_t y,
+            char c,
+            uint32_t fontColor,
+            uint32_t bgColor)
+    {
+        uint32_t row, col;
+
+        if(!((c >= 0x20) && (c <= 0x7F)))
+        {
+            return;
+        }
+
+        for (col = 0; col < 10; col++) {
+
+            for (row = 0; row < 8; row++) {
+
+                if ((pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1) {
+
+                    call Draw.drawPixel(x+col, y+row, fontColor);
+                } else {
+                    call Draw.drawPixel(x+col, y+row, bgColor);
+                }
+            }
+            for (row = 0; row < 6; row++) {
+
+                if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1) {
+
+                    call Draw.drawPixel(x+col, y+row+8, fontColor);
+                } else {
+                    call Draw.drawPixel(x+col, y+row+8, bgColor);
+                }
+            }
+        }
+    }
+
+}
diff --git a/tos/platforms/sam3u_ek/lcd/color.h b/tos/platforms/sam3u_ek/lcd/color.h
new file mode 100644
index 00000000..f8054482
--- /dev/null
+++ b/tos/platforms/sam3u_ek/lcd/color.h
@@ -0,0 +1,134 @@
+/*
+ * Copyright (c) Atmel
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef COLOR_H
+#define COLOR_H
+
+//------------------------------------------------------------------------------
+/// RGB 24 Bpp
+/// RGB 888
+/// R7R6R5R4 R3R2R1R0 G7G6G5G4 G3G2G1G0 B7B6B5B4 B3B2B1B0
+//------------------------------------------------------------------------------
+#define COLOR_BLACK          0x000000
+#define COLOR_WHITE          0xFFFFFF
+
+#define COLOR_BLUE           0x0000FF
+#define COLOR_GREEN          0x00FF00
+#define COLOR_RED            0xFF0000
+
+#define COLOR_NAVY           0x000080
+#define COLOR_DARKBLUE       0x00008B
+#define COLOR_DARKGREEN      0x006400
+#define COLOR_DARKCYAN       0x008B8B
+#define COLOR_CYAN           0x00FFFF
+#define COLOR_TURQUOISE      0x40E0D0
+#define COLOR_INDIGO         0x4B0082
+#define COLOR_DARKRED        0x800000
+#define COLOR_OLIVE          0x808000
+#define COLOR_GRAY           0x808080
+#define COLOR_SKYBLUE        0x87CEEB
+#define COLOR_BLUEVIOLET     0x8A2BE2
+#define COLOR_LIGHTGREEN     0x90EE90
+#define COLOR_DARKVIOLET     0x9400D3
+#define COLOR_YELLOWGREEN    0x9ACD32
+#define COLOR_BROWN          0xA52A2A
+#define COLOR_DARKGRAY       0xA9A9A9
+#define COLOR_SIENNA         0xA0522D
+#define COLOR_LIGHTBLUE      0xADD8E6
+#define COLOR_GREENYELLOW    0xADFF2F
+#define COLOR_SILVER         0xC0C0C0
+#define COLOR_LIGHTGREY      0xD3D3D3
+#define COLOR_LIGHTCYAN      0xE0FFFF
+#define COLOR_VIOLET         0xEE82EE
+#define COLOR_AZUR           0xF0FFFF
+#define COLOR_BEIGE          0xF5F5DC
+#define COLOR_MAGENTA        0xFF00FF
+#define COLOR_TOMATO         0xFF6347
+#define COLOR_GOLD           0xFFD700
+#define COLOR_ORANGE         0xFFA500
+#define COLOR_SNOW           0xFFFAFA
+#define COLOR_YELLOW         0xFFFF00
+
+#endif // #define COLOR_H
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/tos/platforms/sam3u_ek/lcd/font.h b/tos/platforms/sam3u_ek/lcd/font.h
new file mode 100644
index 00000000..db551a63
--- /dev/null
+++ b/tos/platforms/sam3u_ek/lcd/font.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) Atmel
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef FONT_H
+#define FONT_H
+
+//------------------------------------------------------------------------------
+/// Describes the font (width, height, supported characters, etc.) used by
+/// the LCD driver draw API.
+//------------------------------------------------------------------------------
+typedef struct _Font {
+
+	/// Font width in pixels.
+	unsigned char width;
+	/// Font height in pixels.
+	unsigned char height;
+
+} Font;
+
+
+#endif //#ifndef FONT_H
diff --git a/tos/platforms/sam3u_ek/lcd/font10x14.h b/tos/platforms/sam3u_ek/lcd/font10x14.h
new file mode 100644
index 00000000..7109cd8a
--- /dev/null
+++ b/tos/platforms/sam3u_ek/lcd/font10x14.h
@@ -0,0 +1,235 @@
+/*
+ * Copyright (c) Atmel
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LCD_FONT_10x14_H
+#define LCD_FONT_10x14_H
+
+//------------------------------------------------------------------------------
+//         Definitions
+//------------------------------------------------------------------------------
+
+const unsigned char pCharset10x14[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xCC,
+	0xFF, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x0C, 0xC0, 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0,
+	0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0,
+	0x0C, 0x60, 0x1E, 0x70, 0x3F, 0x30, 0x33, 0x30, 0xFF, 0xFC,
+	0xFF, 0xFC, 0x33, 0x30, 0x33, 0xF0, 0x39, 0xE0, 0x18, 0xC0,
+	0x60, 0x00, 0xF0, 0x0C, 0xF0, 0x3C, 0x60, 0xF0, 0x03, 0xC0,
+	0x0F, 0x00, 0x3C, 0x18, 0xF0, 0x3C, 0xC0, 0x3C, 0x00, 0x18,
+	0x3C, 0xF0, 0x7F, 0xF8, 0xC3, 0x1C, 0xC7, 0x8C, 0xCF, 0xCC,
+	0xDC, 0xEC, 0x78, 0x78, 0x30, 0x30, 0x00, 0xFC, 0x00, 0xCC,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xEC, 0x00,
+	0xF8, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x0F, 0xC0, 0x3F, 0xF0, 0x78, 0x78,
+	0x60, 0x18, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0x60, 0x18,
+	0x78, 0x78, 0x3F, 0xF0, 0x0F, 0xC0, 0x00, 0x00, 0x00, 0x00,
+	0x0C, 0x60, 0x0E, 0xE0, 0x07, 0xC0, 0x03, 0x80, 0x3F, 0xF8,
+	0x3F, 0xF8, 0x03, 0x80, 0x07, 0xC0, 0x0E, 0xE0, 0x0C, 0x60,
+	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3F, 0xF0,
+	0x3F, 0xF0, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
+	0x00, 0x44, 0x00, 0xEC, 0x00, 0xF8, 0x00, 0x70, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
+	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
+	0x00, 0x18, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x18, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x0C, 0x00, 0x3C, 0x00, 0xF0, 0x03, 0xC0,
+	0x0F, 0x00, 0x3C, 0x00, 0xF0, 0x00, 0xC0, 0x00, 0x00, 0x00,
+	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0xFC, 0xC1, 0xCC, 0xC3, 0x8C,
+	0xC7, 0x0C, 0xCE, 0x0C, 0xFC, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
+	0x00, 0x00, 0x00, 0x00, 0x30, 0x0C, 0x70, 0x0C, 0xFF, 0xFC,
+	0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
+	0x30, 0x0C, 0x70, 0x1C, 0xE0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC,
+	0xC1, 0xCC, 0xC3, 0x8C, 0xE7, 0x0C, 0x7E, 0x0C, 0x3C, 0x0C,
+	0x30, 0x30, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x7F, 0xF8, 0x3C, 0xF0,
+	0x03, 0xC0, 0x07, 0xC0, 0x0E, 0xC0, 0x1C, 0xC0, 0x38, 0xC0,
+	0x70, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xC0, 0x00, 0xC0,
+	0xFC, 0x30, 0xFC, 0x38, 0xCC, 0x1C, 0xCC, 0x0C, 0xCC, 0x0C,
+	0xCC, 0x0C, 0xCC, 0x0C, 0xCE, 0x1C, 0xC7, 0xF8, 0xC3, 0xF0,
+	0x3F, 0xF0, 0x7F, 0xF8, 0xE3, 0x1C, 0xC3, 0x0C, 0xC3, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x9C, 0x71, 0xF8, 0x30, 0xF0,
+	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC3, 0xFC,
+	0xC7, 0xFC, 0xCE, 0x00, 0xDC, 0x00, 0xF8, 0x00, 0xF0, 0x00,
+	0x3C, 0xF0, 0x7F, 0xF8, 0xE7, 0x9C, 0xC3, 0x0C, 0xC3, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
+	0x3C, 0x00, 0x7E, 0x00, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x1C,
+	0xC3, 0x38, 0xC3, 0x70, 0xE7, 0xE0, 0x7F, 0xC0, 0x3F, 0x80,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x60, 0x3C, 0xF0,
+	0x3C, 0xF0, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x44, 0x3C, 0xEC,
+	0x3C, 0xF8, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0,
+	0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0x00, 0x00,
+	0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
+	0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
+	0x00, 0x00, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x38, 0x70,
+	0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
+	0x30, 0x00, 0x70, 0x00, 0xE0, 0x00, 0xC0, 0x00, 0xC1, 0xEC,
+	0xC3, 0xEC, 0xC3, 0x00, 0xE6, 0x00, 0x7E, 0x00, 0x3C, 0x00,
+	0x30, 0xF0, 0x71, 0xF8, 0xE3, 0x9C, 0xC3, 0x0C, 0xC3, 0xFC,
+	0xC3, 0xFC, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
+	0x3F, 0xFC, 0x7F, 0xFC, 0xE0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0,
+	0xC0, 0xC0, 0xC0, 0xC0, 0xE0, 0xC0, 0x7F, 0xFC, 0x3F, 0xFC,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0,
+	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x30, 0x30,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
+	0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00, 0xC0, 0x00, 0xC0, 0x00,
+	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x73, 0xF8, 0x33, 0xF0,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
+	0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
+	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
+	0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x30, 0x00, 0x38, 0xC0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xC0, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0, 0xC0, 0x00, 0xC0, 0x00,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x07, 0x80, 0x07, 0x80, 0x0F, 0xC0,
+	0x1C, 0xE0, 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
+	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x70, 0x00, 0x38, 0x00, 0x1F, 0x00,
+	0x1F, 0x00, 0x38, 0x00, 0x70, 0x00, 0xFF, 0xFC, 0xFF, 0xFC,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x1C, 0x00, 0x0E, 0x00, 0x07, 0x00,
+	0x03, 0x80, 0x01, 0xC0, 0x00, 0xE0, 0xFF, 0xFC, 0xFF, 0xFC,
+	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x00, 0xC3, 0x00,
+	0xC3, 0x00, 0xC3, 0x00, 0xE7, 0x00, 0x7E, 0x00, 0x3C, 0x00,
+	0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0xCC,
+	0xC0, 0xEC, 0xC0, 0x7C, 0xE0, 0x38, 0x7F, 0xFC, 0x3F, 0xEC,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x00, 0xC3, 0x80, 0xC3, 0x80,
+	0xC3, 0xC0, 0xC3, 0xC0, 0xE7, 0x70, 0x7E, 0x3C, 0x3C, 0x1C,
+	0x3C, 0x18, 0x7E, 0x1C, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C,
+	0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x9C, 0xE1, 0xF8, 0x60, 0xF0,
+	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xFF, 0xFC,
+	0xFF, 0xFC, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
+	0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
+	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
+	0xFF, 0xC0, 0xFF, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
+	0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0xFF, 0xE0, 0xFF, 0xC0,
+	0xFF, 0xF0, 0xFF, 0xF8, 0x00, 0x1C, 0x00, 0x3C, 0x00, 0xF8,
+	0x00, 0xF8, 0x00, 0x3C, 0x00, 0x1C, 0xFF, 0xF8, 0xFF, 0xF0,
+	0xF0, 0x3C, 0xF8, 0x7C, 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80,
+	0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, 0xF8, 0x7C, 0xF0, 0x3C,
+	0xFC, 0x00, 0xFE, 0x00, 0x07, 0x00, 0x03, 0x80, 0x01, 0xFC,
+	0x01, 0xFC, 0x03, 0x80, 0x07, 0x00, 0xFE, 0x00, 0xFC, 0x00,
+	0xC0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, 0xC1, 0xCC, 0xC3, 0x8C,
+	0xC7, 0x0C, 0xCE, 0x0C, 0xDC, 0x0C, 0xF8, 0x0C, 0xF0, 0x0C,
+	0x00, 0x00, 0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C,
+	0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x30, 0x00, 0x30, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x03, 0x00,
+	0x03, 0x00, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0x30, 0x00, 0x30,
+	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x0C, 0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x00, 0xE0, 0x00,
+	0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C, 0x00,
+	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
+	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x0C,
+	0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0xE0, 0x00, 0x70, 0x00,
+	0x38, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x30, 0x06, 0x78, 0x0E, 0xFC, 0x0C, 0xCC, 0x0C, 0xCC,
+	0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xCC, 0x07, 0xFC, 0x03, 0xF8,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C,
+	0x03, 0x0C, 0x03, 0x0C, 0x03, 0x9C, 0x01, 0xF8, 0x00, 0xF0,
+	0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
+	0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0x30,
+	0x00, 0xF0, 0x01, 0xF8, 0x03, 0x9C, 0x03, 0x0C, 0x03, 0x0C,
+	0x03, 0x0C, 0x03, 0x0C, 0x03, 0x0C, 0xFF, 0xFC, 0xFF, 0xFC,
+	0x03, 0xF0, 0x07, 0xF8, 0x0E, 0xDC, 0x0C, 0xCC, 0x0C, 0xCC,
+	0x0C, 0xCC, 0x0C, 0xCC, 0x0E, 0xDC, 0x07, 0xD8, 0x03, 0x90,
+	0x00, 0x00, 0x03, 0x00, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x00,
+	0xE3, 0x00, 0x70, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
+	0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xDC, 0x0F, 0xF8, 0x07, 0xF0,
+	0xFF, 0xFC, 0xFF, 0xFC, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00,
+	0x03, 0x00, 0x03, 0x80, 0x01, 0xFC, 0x00, 0xFC, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1B, 0xFC,
+	0x1B, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x30, 0x00, 0x38, 0x00, 0x1C, 0x00, 0x0C,
+	0x00, 0x0C, 0x00, 0x1C, 0xCF, 0xF8, 0xCF, 0xF0, 0x00, 0x00,
+	0x00, 0x00, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xE0, 0x01, 0xE0,
+	0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xFF, 0xFC,
+	0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00,
+	0x0F, 0xFC, 0x0F, 0xFC, 0x0E, 0x00, 0x07, 0x00, 0x03, 0xC0,
+	0x03, 0xC0, 0x07, 0x00, 0x0E, 0x00, 0x0F, 0xFC, 0x0F, 0xFC,
+	0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x00, 0x07, 0x00, 0x0E, 0x00,
+	0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0xFC, 0x03, 0xFC,
+	0x03, 0xF0, 0x07, 0xF8, 0x0E, 0x1C, 0x0C, 0x0C, 0x0C, 0x0C,
+	0x0C, 0x0C, 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0xF8, 0x03, 0xF0,
+	0x0F, 0xFC, 0x0F, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
+	0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00,
+	0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0,
+	0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0F, 0xFC, 0x0F, 0xFC,
+	0x0F, 0xFC, 0x0F, 0xFC, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00,
+	0x0C, 0x00, 0x0C, 0x00, 0x0E, 0x00, 0x07, 0x00, 0x03, 0x00,
+	0x03, 0x18, 0x07, 0x9C, 0x0F, 0xCC, 0x0C, 0xCC, 0x0C, 0xCC,
+	0x0C, 0xCC, 0x0C, 0xCC, 0x0C, 0xFC, 0x0E, 0x78, 0x06, 0x30,
+	0x00, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0xFF, 0xF0, 0xFF, 0xF8,
+	0x0C, 0x1C, 0x0C, 0x1C, 0x0C, 0x38, 0x0C, 0x30, 0x00, 0x00,
+	0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x0C, 0x00, 0x0C,
+	0x00, 0x0C, 0x00, 0x0C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
+	0x0F, 0xC0, 0x0F, 0xE0, 0x00, 0x70, 0x00, 0x38, 0x00, 0x1C,
+	0x00, 0x1C, 0x00, 0x38, 0x00, 0x70, 0x0F, 0xE0, 0x0F, 0xC0,
+	0x0F, 0xF0, 0x0F, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0xF8,
+	0x00, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0,
+	0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0xF0, 0x01, 0xE0,
+	0x01, 0xE0, 0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C,
+	0x0C, 0x00, 0x0E, 0x00, 0x07, 0x0C, 0x03, 0x9C, 0x01, 0xF8,
+	0x01, 0xF0, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00, 0x0C, 0x00,
+	0x0C, 0x0C, 0x0C, 0x1C, 0x0C, 0x3C, 0x0C, 0x7C, 0x0C, 0xEC,
+	0x0D, 0xCC, 0x0F, 0x8C, 0x0F, 0x0C, 0x0E, 0x0C, 0x0C, 0x0C,
+	0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x3F, 0xF0, 0x7C, 0xF8,
+	0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00,
+	0x03, 0x0C, 0x03, 0x0C, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x0C,
+	0xC3, 0x0C, 0xC0, 0x0C, 0xE0, 0x0C, 0x70, 0x0C, 0x30, 0x0C,
+	0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C,
+	0x7C, 0xF8, 0x3F, 0xF0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00,
+	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
+	0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC,
+	0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC
+};
+
+
+#endif // #ifdef _LCD_FONT_10x14_h
diff --git a/tos/platforms/sam3u_ek/lcd/lcd.h b/tos/platforms/sam3u_ek/lcd/lcd.h
new file mode 100644
index 00000000..bf61d761
--- /dev/null
+++ b/tos/platforms/sam3u_ek/lcd/lcd.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2011 University of Utah
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ * WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LCD_H
+#define _LCD_H
+
+
+#define BOARD_LCD_HEIGHT 320
+#define BOARD_LCD_WIDTH  240
+
+
+#endif //_LCD_H
+
diff --git a/tos/platforms/sam3u_ek/platform.h b/tos/platforms/sam3u_ek/platform.h
new file mode 100644
index 00000000..2a551fed
--- /dev/null
+++ b/tos/platforms/sam3u_ek/platform.h
@@ -0,0 +1,5 @@
+/* No platform_bootstrap() needed,
+ * since memory system doesn't need configuration and
+ * the processor mode neither.
+ * (see TEP 107)
+ */
diff --git a/tos/platforms/sam3u_ek/platform_message.h b/tos/platforms/sam3u_ek/platform_message.h
new file mode 100644
index 00000000..81ada336
--- /dev/null
+++ b/tos/platforms/sam3u_ek/platform_message.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "Serial.h"
+
+typedef union message_header
+{
+	serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer
+{
+} message_footer_t;
+
+typedef union message_metadata
+{
+	serial_metadata_t serial;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/sam3u_ek/sam3u-ek-flash-mp.x b/tos/platforms/sam3u_ek/sam3u-ek-flash-mp.x
new file mode 100644
index 00000000..35e5e963
--- /dev/null
+++ b/tos/platforms/sam3u_ek/sam3u-ek-flash-mp.x
@@ -0,0 +1,213 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Linker script to run code in Flash 0.
+ * Variant that aligns and collects symbols for memory protection.
+ * Start-up code copies data into SRAM 0 and zeroes BSS segment.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+/* Output format is always little endian, irrespective of -EL or -EB flags */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+/* Output architecture is ARM */
+OUTPUT_ARCH(arm)
+/* The first program instruction is the __init() start-up code */
+ENTRY(__init)
+
+/* The IRQ vector table is put at the beginning of SRAM 0 */
+/* We reserve 0x100 bytes by setting the SRAM 0 base address below accordingly */
+_vect_start = 0x20000000;
+
+/* Stack at the end of SRAM 0 */
+_estack = 0x20007ffc;
+
+/* We have the SAM3U4E with 2 x 128K Flash and 48K SRAM.
+ * SRAM is 32K SRAM 0 and 16K SRAM 1.
+ * Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 2, p. 28, p. 29 */
+MEMORY
+{
+	sram0  (W!RX) : org = 0x20000100, len = 0x07f00 /* SRAM 0, 32K (- 0x100 vector table) */
+	sram1  (W!RX) : org = 0x20080000, len = 0x04000 /* SRAM 1, 16K */
+	flash0 (W!RX) : org = 0x00080000, len = 0x20000 /* Flash 0, 128K */
+	flash1 (W!RX) : org = 0x00100000, len = 0x20000 /* Flash 1, 128K */
+}
+
+SECTIONS
+{
+	/* Text is linked into Flash 0 */
+	.text :
+	{
+		. = ALIGN(4);
+		_stext = .;
+		KEEP(*(.vectors))
+
+		. = ALIGN(0x400);
+		_stextcommon = .;
+		*(.textcommon*)
+		. = ALIGN(0x400);
+		_etextcommon = .;
+
+		. = ALIGN(0x200);
+		_stextthread0 = .;
+		*(.text.ThreadInfoP$0$run_thread)
+		/* this will collect the definition of the thread's run() event in the app component */
+		*(.text.*$Thread0$run)
+		*(.text.TestJoinC$NullThread$run)
+		*(.text.BlinkC$NullThread$run)
+		. = ALIGN(0x200);
+		_etextthread0 = .;
+
+		. = ALIGN(0x200);
+		_stextthread1 = .;
+		*(.text.ThreadInfoP$1$run_thread)
+		/* this will collect the definition of the thread's run() event in the app component */
+		*(.text.*$Thread1$run)
+		*(.text.TestJoinC$TinyThread0$run)
+		*(.text.BlinkC$TinyThread0$run)
+		. = ALIGN(0x200);
+		_etextthread1 = .;
+
+		. = ALIGN(0x200);
+		_stextthread2 = .;
+		*(.text.ThreadInfoP$2$run_thread)
+		/* this will collect the definition of the thread's run() event in the app component */
+		*(.text.*$Thread2$run)
+		*(.text.TestJoinC$TinyThread1$run)
+		*(.text.BlinkC$TinyThread1$run)
+		. = ALIGN(0x200);
+		_etextthread2 = .;
+
+		. = ALIGN(0x200);
+		_stextthread3 = .;
+		*(.text.ThreadInfoP$3$run_thread)
+		/* this will collect the definition of the thread's run() event in the app component */
+		*(.text.*$Thread3$run)
+		*(.text.TestJoinC$TinyThread2$run)
+		*(.text.BlinkC$TinyThread2$run)
+		. = ALIGN(0x200);
+		_etextthread3 = .;
+
+		*(.text*)
+		*(.rodata*)
+		*(.glue_7) /* ARM/Thumb interworking code */
+		*(.glue_7t) /* ARM/Thumb interworking code */
+		. = ALIGN(4);
+		_etext = .;
+	} > flash0
+
+	/* Data will be loaded into RAM by start-up code */
+	.data : AT (_etext)
+	{
+		. = ALIGN(4);
+		_sdata = .;
+
+		. = ALIGN(0x200);
+		_sdatathread0 = .;
+		*(.datathread0*)
+		. = ALIGN(0x200);
+		_edatathread0 = .;
+
+		. = ALIGN(0x200);
+		_sdatathread1 = .;
+		*(.datathread1*)
+		. = ALIGN(0x200);
+		_edatathread1 = .;
+
+		. = ALIGN(0x200);
+		_sdatathread2 = .;
+		*(.datathread2*)
+		. = ALIGN(0x200);
+		_edatathread2 = .;
+
+		. = ALIGN(0x200);
+		_sdatathread3 = .;
+		*(.datathread3*)
+		. = ALIGN(0x200);
+		_edatathread3 = .;
+
+		*(.ramfunc) /* functions linked into RAM */
+		*(.data.*)
+		*(.data)
+		. = ALIGN(4);
+		_edata = .;
+	} > sram0
+
+	/* BSS will be zeroed by start-up code */
+	.bss (NOLOAD) :
+	{
+		. = ALIGN(4);
+		_sbss = .;
+
+		. = ALIGN(0x1000);
+		_sbssthread0 = .;
+		*(.bss.ThreadInfoP$0$stack)
+		*(.bss.ThreadInfoP$0$thread_info)
+		*(.bssthread0*)
+		. = ALIGN(0x1000);
+		_ebssthread0 = .;
+
+		. = ALIGN(0x1000);
+		_sbssthread1 = .;
+		*(.bss.ThreadInfoP$1$stack)
+		*(.bss.ThreadInfoP$1$thread_info)
+		*(.bssthread1*)
+		. = ALIGN(0x1000);
+		_ebssthread1 = .;
+
+		. = ALIGN(0x1000);
+		_sbssthread2 = .;
+		*(.bss.ThreadInfoP$2$stack)
+		*(.bss.ThreadInfoP$2$thread_info)
+		*(.bssthread2*)
+		. = ALIGN(0x1000);
+		_ebssthread2 = .;
+
+		. = ALIGN(0x1000);
+		_sbssthread3 = .;
+		*(.bss.ThreadInfoP$3$stack)
+		*(.bss.ThreadInfoP$3$thread_info)
+		*(.bssthread3*)
+		. = ALIGN(0x1000);
+		_ebssthread3 = .;
+
+		*(.bss.*)
+		*(.bss)
+		. = ALIGN(4);
+	} > sram0
+	/* _ebss should be inside .bss, but for some reason, it then is not defined
+	 * at the end of the BSS section. This leads to non-zeroed BSS data, since the
+	 * start-up code uses that symbol. For now, this workaround is OK and does no
+	 * harm.
+	 */
+	_ebss = .;
+}
diff --git a/tos/platforms/sam3u_ek/sam3u-ek-flash.x b/tos/platforms/sam3u_ek/sam3u-ek-flash.x
new file mode 100644
index 00000000..f3d4c227
--- /dev/null
+++ b/tos/platforms/sam3u_ek/sam3u-ek-flash.x
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Linker script to run code in Flash 0.
+ * Start-up code copies data into SRAM 0 and zeroes BSS segment.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ * @author Thomas Schmid
+ */
+
+/* Output format is always little endian, irrespective of -EL or -EB flags */
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+/* Output architecture is ARM */
+OUTPUT_ARCH(arm)
+/* The first program instruction is the __init() start-up code */
+ENTRY(__init)
+
+/* The IRQ vector table is put at the beginning of SRAM 0 */
+/* We reserve 0x100 bytes by setting the SRAM 0 base address below accordingly */
+_vect_start = 0x20000000;
+
+/* Stack at the end of SRAM 0 */
+_estack = 0x20007ffc;
+
+/* Don't relocate the vector table */
+/*PROVIDE (__relocate_vector = 0);*/
+
+/* We have the SAM3U4E with 2 x 128K Flash and 48K SRAM.
+ * SRAM is 32K SRAM 0 and 16K SRAM 1.
+ * Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 2, p. 28, p. 29 */
+MEMORY
+{
+	sram0  (W!RX) : org = 0x20000000, len = 0x08000 /* SRAM 0, 32K (- 0x100 vector table) */
+	sram1  (W!RX) : org = 0x20080000, len = 0x04000 /* SRAM 1, 16K */
+	flash0 (W!RX) : org = 0x00080000, len = 0x20000 /* Flash 0, 128K */
+	flash1 (W!RX) : org = 0x00100000, len = 0x20000 /* Flash 1, 128K */
+}
+
+SECTIONS
+{
+	/* Text is linked into Flash 0 */
+	.text :
+	{
+		. = ALIGN(4);
+		_stext = .;
+        /* KEEP(*(.boot*)) */
+        KEEP(*(.vectors))
+        *(.init*)
+		*(.text*)
+        *(.fini*)
+		*(.rodata*)
+		*(.glue_7) /* ARM/Thumb interworking code */
+		*(.glue_7t) /* ARM/Thumb interworking code */
+		. = ALIGN(4);
+		_etext = .;
+	} > flash0
+
+	/* Data will be loaded into RAM by start-up code */
+	.data : AT (_etext)
+	{
+		. = ALIGN(4);
+		_sdata = .;
+        _svect = .;
+        KEEP(*(.vectors)) /* Interrupt vector table in first 204 bytes */
+        _evect = .;
+		*(.ramfunc) /* functions linked into RAM */
+		*(.data.*)
+		*(.data)
+		. = ALIGN(4);
+		_edata = .;
+	} > sram0
+
+	/* BSS will be zeroed by start-up code */
+	.bss (NOLOAD) : {
+		. = ALIGN(4);
+		_sbss = .;
+		*(.bss.*)
+		*(.bss)
+		. = ALIGN(4);
+	} > sram0
+	/* _ebss should be inside .bss, but for some reason, it then is not defined
+	 * at the end of the BSS section. This leads to non-zeroed BSS data, since the
+	 * start-up code uses that symbol. For now, this workaround is OK and does no
+	 * harm.
+	 */
+	_ebss = .;
+}
+end = .;
diff --git a/tos/platforms/sam3u_ek/vectors.c b/tos/platforms/sam3u_ek/vectors.c
new file mode 100644
index 00000000..b5bd7882
--- /dev/null
+++ b/tos/platforms/sam3u_ek/vectors.c
@@ -0,0 +1,283 @@
+/*
+ * Copyright (c) 2009 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Startup code and interrupt and trap handlers for the SAM3U-EK board.
+ *
+ * @author Wanja Hofer <wanja@cs.fau.de>
+ */
+
+/* Section symbols defined in linker script
+ * sam3u-ek-flash.x
+ */
+extern unsigned int _stext;
+extern unsigned int _etext;
+extern unsigned int _sdata;
+extern unsigned int _edata;
+extern unsigned int _svect;
+extern unsigned int _evect;
+extern unsigned int _sbss;
+extern unsigned int _ebss;
+extern unsigned int _estack;
+extern unsigned int __relocate_vector;
+
+/* main() symbol defined in RealMainP
+ */
+int main();
+
+/* Start-up code called upon reset.
+ * Definition see below.
+ */
+void __init();
+
+/* Default handler for any IRQ or fault
+ */
+void DefaultHandler()
+{
+	// do nothing, just return
+}
+
+/* Default Hardfault Handler
+ */
+void DefaultHardFaultHandler()
+{
+    while(1) {}
+}
+
+/* Default Mpu Fault Handler
+ */
+void DefaultMpuFaultHandler()
+{
+    while(1) {}
+}
+
+/* Default Bus Fault Handler
+ */
+void DefaultBusFaultHandler()
+{
+    while(1) {}
+}
+
+/* Default Usage Fault Handler
+ */
+void DefaultUsageFaultHandler()
+{
+    while(1) {}
+}
+
+/* By default, every exception and IRQ is handled by the default handler.
+ *
+ * If OWN_FUNCTIONS_FOR_HANDLERS is defined, then the internal IRQ and fault
+ * handlers will get a function of their own for debug purposes. Those
+ * functions are provided by weak aliases; thus, a regular handler
+ * definition will override this.
+ */
+#define OWN_FUNCTION_FOR_HANDLERS
+
+#ifdef OWN_FUNCTION_FOR_HANDLERS
+void NmiHandler() __attribute__((weak));
+void MpuFaultHandler() __attribute__((weak));
+void BusFaultHandler() __attribute__((weak));
+void UsageFaultHandler() __attribute__((weak));
+void SVCallHandler() __attribute__((weak));
+void DebugHandler() __attribute__((weak));
+void PendSVHandler() __attribute__((weak));
+void SysTickHandler() __attribute__((weak));
+void NmiHandler() { while(1) {} }
+void MpuFaultHandler() { while(1) {} }
+void BusFaultHandler() { while(1) {} }
+void UsageFaultHandler() { while(1) {} }
+void SVCallHandler() { while(1) {} }
+void DebugHandler() { while(1) {} }
+void PendSVHandler() { while(1) {} }
+void SysTickHandler() { while(1) {} }
+#else
+void NmiHandler() __attribute__((weak, alias("DefaultHandler")));
+void MpuFaultHandler() __attribute__((weak, alias("DefaultHandler")));
+void BusFaultHandler() __attribute__((weak, alias("DefaultHandler")));
+void UsageFaultHandler() __attribute__((weak, alias("DefaultHandler")));
+void SVCallHandler() __attribute__((weak, alias("DefaultHandler")));
+void DebugHandler() __attribute__((weak, alias("DefaultHandler")));
+void PendSVHandler() __attribute__((weak, alias("DefaultHandler")));
+void SysTickHandler() __attribute__((weak, alias("DefaultHandler")));
+#endif
+
+void HardFaultHandler() __attribute__((weak, alias("DefaultHardFaultHandler")));
+
+void SupcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void RstcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void RtcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void RttIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void WdtIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void PmcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Eefc0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Eefc1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void UartIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void SmcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void PioAIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void PioBIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void PioCIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Usart0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Usart1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Usart2IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Usart3IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void HsmciIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Twi0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Twi1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void SpiIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void SscIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void TC0IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void TC1IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void TC2IrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void PwmIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void Adc12BIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void AdcIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void DmacIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+void UdphsIrqHandler() __attribute__((weak, alias("DefaultHandler")));
+
+
+/* Stick at the top of the .text section in final binary so we can always
+ *    jump back to the init routine at the top of the stack if we want */
+__attribute__((section(".boot"))) unsigned int *__boot[] = {
+    &_estack,
+    (unsigned int *) __init,
+};
+
+
+__attribute__((section(".vectors"))) unsigned int *__vectors[] = {
+	// Defined by Cortex-M3
+	// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 78
+	// See also The Definitive Guide to the ARM Cortex-M3, p. 331
+	&_estack,
+	(unsigned int *) __init,
+    (unsigned int *) NmiHandler,
+    (unsigned int *) HardFaultHandler,
+    (unsigned int *) MpuFaultHandler,
+    (unsigned int *) BusFaultHandler,
+	(unsigned int *) UsageFaultHandler,
+	(unsigned int *) 0, // Reserved
+	(unsigned int *) 0, // Reserved
+	(unsigned int *) 0, // Reserved
+	(unsigned int *) 0, // Reserved
+	(unsigned int *) SVCallHandler,
+	(unsigned int *) DebugHandler,
+	(unsigned int *) 0, // Reserved
+	(unsigned int *) PendSVHandler,
+	(unsigned int *) SysTickHandler,
+	// Defined by SAM3U MCU
+	// Defined in AT91 ARM Cortex-M3 based Microcontrollers, SAM3U Series, Preliminary, p. 41
+	(unsigned int *) SupcIrqHandler,
+	(unsigned int *) RstcIrqHandler,
+	(unsigned int *) RtcIrqHandler,
+	(unsigned int *) RttIrqHandler,
+	(unsigned int *) WdtIrqHandler,
+	(unsigned int *) PmcIrqHandler,
+	(unsigned int *) Eefc0IrqHandler,
+	(unsigned int *) Eefc1IrqHandler,
+	(unsigned int *) UartIrqHandler,
+	(unsigned int *) SmcIrqHandler,
+	(unsigned int *) PioAIrqHandler,
+	(unsigned int *) PioBIrqHandler,
+	(unsigned int *) PioCIrqHandler,
+	(unsigned int *) Usart0IrqHandler,
+	(unsigned int *) Usart1IrqHandler,
+	(unsigned int *) Usart2IrqHandler,
+	(unsigned int *) Usart3IrqHandler,
+	(unsigned int *) HsmciIrqHandler,
+	(unsigned int *) Twi0IrqHandler,
+	(unsigned int *) Twi1IrqHandler,
+	(unsigned int *) SpiIrqHandler,
+	(unsigned int *) SscIrqHandler,
+	(unsigned int *) TC0IrqHandler,
+	(unsigned int *) TC1IrqHandler,
+	(unsigned int *) TC2IrqHandler,
+	(unsigned int *) PwmIrqHandler,
+	(unsigned int *) Adc12BIrqHandler,
+	(unsigned int *) AdcIrqHandler,
+	(unsigned int *) DmacIrqHandler,
+	(unsigned int *) UdphsIrqHandler
+};
+
+/* Start-up code to copy data into RAM
+ * and zero BSS segment
+ * and call main()
+ * and "exit"
+ */
+void __init()
+{
+	unsigned int *from;
+	unsigned int *to;
+	unsigned int *i;
+	volatile unsigned int *NVIC_VTOFFR = (volatile unsigned int *) 0xe000ed08;
+
+    if(0 && __relocate_vector)
+    {
+        // Configure location of IRQ vector table
+        // Vector table is in the beginning of text segment / Flash 0
+        i = (unsigned int *) &_svect;
+        *NVIC_VTOFFR = (unsigned int) i;
+        // Set TBLBASE bit since vector table located in SRAM
+        *NVIC_VTOFFR |= (1 << 29);
+    }
+
+	// Copy pre-initialized data into RAM.
+	// Data lies in Flash after the text segment (_etext),
+	// but is linked to be at _sdata.
+	// Thus, we have to copy it to that place in RAM.
+	from = &_etext;
+	to = &_sdata;
+	while (to < &_edata) {
+		*to = *from;
+		to++;
+		from++;
+	}
+
+	// Fill BSS data with 0
+	i = &_sbss;
+	while (i < &_ebss) {
+		*i = 0;
+		i++;
+	}
+
+    /*
+	// Configure location of IRQ vector table
+	// Vector table is in the beginning of text segment / Flash 0
+	i = (unsigned int *) &_stext;
+	// TBLBASE bit is automatically 0 -> table in code space
+	*NVIC_VTOFFR = (unsigned int) i;
+    */
+
+	// Call main()
+	main();
+
+	// "Exit"
+	while (1);
+}
diff --git a/tos/platforms/shimmer/.platform b/tos/platforms/shimmer/.platform
new file mode 100644
index 00000000..554ed31b
--- /dev/null
+++ b/tos/platforms/shimmer/.platform
@@ -0,0 +1,82 @@
+# SHIMMER - platform includes
+# Konrad Lorincz 5/14/08
+#
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+
+push( @includes, qw(
+
+      .
+  %T/platforms/shimmer
+  %T/platforms/shimmer/chips/cc2420
+  %T/platforms/shimmer/chips/mma7260
+  %T/platforms/shimmer/chips/sd
+  %T/platforms/shimmer/chips/sd/fatfs
+  %T/platforms/shimmer/chips/bluetooth
+  %T/platforms/shimmer/chips/msp430
+  %T/platforms/shimmer/chips/ds2411
+  %T/platforms/shimmer2/chips/gyro
+  %T/chips/cc2420
+  %T/chips/cc2420/alarm
+  %T/chips/cc2420/control
+  %T/chips/cc2420/csma
+  %T/chips/cc2420/interfaces
+  %T/chips/cc2420/link
+  %T/chips/cc2420/lowpan
+  %T/chips/cc2420/lpl
+  %T/chips/cc2420/packet
+  %T/chips/cc2420/receive
+  %T/chips/cc2420/spi
+  %T/chips/cc2420/transmit
+  %T/chips/cc2420/unique
+  %T/chips/cc2420/security
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/dma
+  %T/chips/msp430/pins
+  %T/chips/msp430/timer
+  %T/chips/msp430/usart
+  %T/chips/msp430/sensors
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+  %T/lib/power
+  ) );
+
+@opts = qw(
+
+  -gcc=msp430-gcc
+  -mmcu=msp430x1611
+  -fnesc-target=msp430
+  -fnesc-no-debug
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=2 " .
+    "version=msp430-3.2.3 " .
+    "short=2,2 " .
+    "int=2,2 " .
+    "long=4,2 " .
+    "long_long=8,2 " .
+    "pointer=2,2 " .
+    "enum=2,2 " .
+    "float=4,2 " .
+    "double=4,2 " .
+    "long_double=4,2 " .
+    "void=1,1 " .
+    "fun=1,2 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
diff --git a/tos/platforms/shimmer/ActiveMessageC.nc b/tos/platforms/shimmer/ActiveMessageC.nc
new file mode 100644
index 00000000..d64824cd
--- /dev/null
+++ b/tos/platforms/shimmer/ActiveMessageC.nc
@@ -0,0 +1,88 @@
+// $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.7 2010-06-29 22:07:54 scipio Exp $
+ *
+ */
+/**
+ * The Active Message layer on the SHIMMER platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Konrad Lorincz
+ */
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+    interface LowPowerListening;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+  LowPowerListening = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
diff --git a/tos/platforms/shimmer/Counter32khz64C.nc b/tos/platforms/shimmer/Counter32khz64C.nc
new file mode 100644
index 00000000..1ebeee69
--- /dev/null
+++ b/tos/platforms/shimmer/Counter32khz64C.nc
@@ -0,0 +1,63 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Counter32khz32C provides at 32-bit counter at 32768 ticks per second.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+/*
+ * arguments table for convenience:
+  typedef to_precision_tag,
+  typedef to_size_type @integer(),
+  typedef from_precision_tag,
+  typedef from_size_type @integer(),
+  uint8_t bit_shift_right,
+  typedef upper_count_type @integer()) @safe()
+*/
+configuration Counter32khz64C
+{
+  provides interface Counter<T32khz,uint64_t>;
+}
+implementation
+{
+  components Msp430Counter32khzC as CounterFrom;
+  components new TransformCounterC(T32khz,uint64_t,T32khz,uint16_t,0,uint64_t) as Transform;
+
+  Counter = Transform;
+
+  Transform.CounterFrom -> CounterFrom;
+}
+
diff --git a/tos/platforms/shimmer/CounterMilli64C.nc b/tos/platforms/shimmer/CounterMilli64C.nc
new file mode 100644
index 00000000..3571a046
--- /dev/null
+++ b/tos/platforms/shimmer/CounterMilli64C.nc
@@ -0,0 +1,54 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * CounterMilli32C provides at 32-bit counter at 1024 ticks per second.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+    
+configuration CounterMilli64C
+{
+  provides interface Counter<TMilli,uint64_t>;
+}
+implementation
+{
+  components Msp430Counter32khzC as CounterFrom;
+  components new TransformCounterC(TMilli,uint64_t,T32khz,uint16_t,5,uint32_t) as Transform;
+
+  Counter = Transform.Counter;
+
+  Transform.CounterFrom -> CounterFrom;
+}
+
diff --git a/tos/platforms/shimmer/CounterToLocalTime64C.nc b/tos/platforms/shimmer/CounterToLocalTime64C.nc
new file mode 100644
index 00000000..f0effd5d
--- /dev/null
+++ b/tos/platforms/shimmer/CounterToLocalTime64C.nc
@@ -0,0 +1,62 @@
+//$Id: CounterToLocalTime64C.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Timer.h"
+
+/**
+ * CounterToLocalTimeC converts a 32-bit LocalTime to a Counter.  
+ *
+ * <p>See TEP102 for more details.
+ * @param precision_tag A type indicating the precision of the LocalTime and
+ * Counter being converted.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+generic module CounterToLocalTime64C(typedef precision_tag) @safe()
+{
+  provides interface LocalTime64<precision_tag>;
+  uses interface Counter<precision_tag,uint64_t>;
+}
+implementation
+{
+  async command uint64_t LocalTime64.get()
+  {
+    return call Counter.get();
+  }
+
+  async event void Counter.overflow()
+  {
+  }
+}
+
diff --git a/tos/platforms/shimmer/DemoSensorC.nc b/tos/platforms/shimmer/DemoSensorC.nc
new file mode 100644
index 00000000..3712b201
--- /dev/null
+++ b/tos/platforms/shimmer/DemoSensorC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorC on the telosb platform provides a
+ * voltage reading, using VoltageC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-05-21 22:07:24 $
+ * 
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation
+{
+  components new VoltageC() as DemoSensor;
+  Read = DemoSensor;
+}
diff --git a/tos/platforms/shimmer/DemoSensorNowC.nc b/tos/platforms/shimmer/DemoSensorNowC.nc
new file mode 100644
index 00000000..42ca51de
--- /dev/null
+++ b/tos/platforms/shimmer/DemoSensorNowC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorNowC is a generic sensor device that provides a 16-bit
+ * value that can be read from async context. The platform author
+ * chooses which sensor actually sits behind DemoSensorNowC, and
+ * though it's probably Voltage, Light, or Temperature, there are no
+ * guarantees.
+ *
+ * This particular DemoSensorNowC on the telosb platform provides a
+ * voltage reading, using VoltageC.
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-06-24 22:25:57 $
+ * 
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation
+{
+  components new Msp430InternalVoltageC() as DemoSensorNow;
+
+  Resource = DemoSensorNow;
+  ReadNow = DemoSensorNow;
+}
diff --git a/tos/platforms/shimmer/DemoSensorStreamC.nc b/tos/platforms/shimmer/DemoSensorStreamC.nc
new file mode 100644
index 00000000..1389312e
--- /dev/null
+++ b/tos/platforms/shimmer/DemoSensorStreamC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorStreamC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorStreamC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorStreamC on the telosb platform provides a
+ * voltage reading, using VoltageStreamC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-06-24 22:25:57 $
+ * 
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream<uint16_t>;
+}
+implementation
+{
+  components new VoltageStreamC() as DemoSensor;
+  ReadStream = DemoSensor;
+}
diff --git a/tos/platforms/shimmer/HostTime.nc b/tos/platforms/shimmer/HostTime.nc
new file mode 100644
index 00000000..487e73df
--- /dev/null
+++ b/tos/platforms/shimmer/HostTime.nc
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   June 2010
+ */
+
+interface HostTime {
+  /*
+   * this should be used to begin execution of applications 
+   * that require a host-based timestamp sent via serial line
+   */
+  event void timeAndZoneSet(char * g_timestring);
+
+}
diff --git a/tos/platforms/shimmer/HostTimeC.nc b/tos/platforms/shimmer/HostTimeC.nc
new file mode 100644
index 00000000..c9cd86a8
--- /dev/null
+++ b/tos/platforms/shimmer/HostTimeC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   September, 2010
+ */
+
+configuration HostTimeC {
+  provides{
+    interface HostTime;
+    interface Init;
+  }
+}
+
+implementation { 
+  components HostTimeP;
+  Init = HostTimeP;
+  HostTime = HostTimeP;
+
+  components TimeC, HplMsp430Usart0C;
+  HostTimeP.UARTControl     -> HplMsp430Usart0C.HplMsp430Usart;
+  HostTimeP.UARTData        -> HplMsp430Usart0C.HplMsp430UsartInterrupts;
+  HostTimeP.Time            -> TimeC;
+}
diff --git a/tos/platforms/shimmer/HostTimeP.nc b/tos/platforms/shimmer/HostTimeP.nc
new file mode 100644
index 00000000..cd804d0f
--- /dev/null
+++ b/tos/platforms/shimmer/HostTimeP.nc
@@ -0,0 +1,212 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   June 2010
+ */
+
+#include "msp430usart.h"
+
+module HostTimeP {
+  provides { 
+    interface Init;
+    interface HostTime;
+  }
+  uses {
+    interface Time;
+    interface HplMsp430Usart as UARTControl;
+    interface HplMsp430UsartInterrupts as UARTData;
+  }
+}
+
+implementation {
+  enum {
+    NONE,
+    TIMEBYTE_32,
+    TIMEBYTE_24,
+    TIMEBYTE_16,
+    TIMEBYTE_8,
+    YEARBYTE_32,
+    YEARBYTE_24,
+    YEARBYTE_16,
+    YEARBYTE_8,
+    ZERODAY,
+    DST_FDAY1,
+    DST_FDAY0,
+    DST_LDAY1,
+    DST_LDAY0,
+    YEAR1,
+    YEAR0,
+    DONE
+  };
+
+  struct tm g_tm;
+  time_t g_host_time = 0, g_year_time;
+  uint8_t byte3, byte2, byte1, byte0, byte7, byte6, byte5, byte4, byte9, byte8, byte10, byte11, byte12, byte14, byte13;
+  uint8_t sync_state, g_zero_day, toSend, charsSent;
+  uint16_t g_dst_fday, g_dst_lday, g_year;
+  char g_timestring[128];
+  bool transmissionComplete;
+
+  void setupUART() {
+    /*
+     * NOTE:  this sets the baudrate based upon a 4mhz SMCLK given by the 8mhz xt clock config
+     * to run at the default msp430 clock settings, use _1MHZ_ for these two flags
+     */
+    msp430_uart_union_config_t RN_uart_config = { {ubr: UBR_4MHZ_115200, umctl: UMCTL_4MHZ_115200, 
+						   ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1,listen: 0, 
+						   mm: 0, ckpl: 0, urxse: 0, urxeie: 0, 
+						   urxwie: 0, utxe : 1, urxe :1} };
+
+    call UARTControl.setModeUart(&RN_uart_config); // set to UART mode
+
+    call UARTControl.enableTxIntr();
+    call UARTControl.enableRxIntr();
+  }
+
+  command error_t Init.init(){
+    sync_state = NONE;
+
+    setupUART();
+
+    return SUCCESS;
+  }
+
+  task void assemble_timestamp() {
+    time_t time_now;
+
+    g_host_time = byte3;
+    g_host_time = g_host_time << 24;
+    g_host_time = (g_host_time >> 16 | byte2) << 16;
+    g_host_time = (g_host_time >> 8 | byte1) << 8;
+    g_host_time = g_host_time | byte0;
+
+    g_year_time = byte7;
+    g_year_time = g_year_time << 24;
+    g_year_time = (g_year_time >> 16 | byte6) << 16;
+    g_year_time = (g_year_time >> 8 | byte5) << 8;
+    g_year_time = g_year_time | byte4;
+
+    g_zero_day = byte8;
+    
+    g_dst_fday = byte10;
+    g_dst_fday = (g_dst_fday << 8) | byte9;
+
+    g_dst_lday = byte12;
+    g_dst_lday = (g_dst_lday << 8) | byte11;
+
+    g_year = byte14;
+    g_year = (g_year << 8) | byte13;
+
+    call Time.setCurrentTime(g_host_time);
+    call Time.setZoneInfo(g_year, g_year_time, g_zero_day, g_dst_fday, g_dst_lday);
+
+
+    call Time.time(&time_now);
+    call Time.localtime(&time_now, &g_tm);
+    call Time.asctime(&g_tm, g_timestring, 128);
+
+    signal HostTime.timeAndZoneSet(g_timestring);
+  }
+
+  async event void UARTData.rxDone(uint8_t data) { 
+    switch (sync_state) {
+    case NONE:
+    case TIMEBYTE_32:
+      byte3 = data;
+      sync_state = TIMEBYTE_24;
+      break;
+    case TIMEBYTE_24:
+      byte2 = data;
+      sync_state = TIMEBYTE_16;
+      break;
+    case TIMEBYTE_16:
+      byte1 = data;
+      sync_state = TIMEBYTE_8;
+      break;
+    case TIMEBYTE_8:
+      byte0 = data;
+      sync_state = YEARBYTE_32;
+      break;
+    case YEARBYTE_32:
+      byte7 = data;
+      sync_state = YEARBYTE_24;
+      break;
+    case YEARBYTE_24:
+      byte6 = data;
+      sync_state = YEARBYTE_16;
+      break;
+    case YEARBYTE_16:
+      byte5 = data;
+      sync_state = YEARBYTE_8;
+      break;
+    case YEARBYTE_8:
+      byte4 = data;
+      sync_state = ZERODAY;
+      break;
+    case ZERODAY:
+      byte8 = data;
+      sync_state = DST_FDAY1;
+      break;
+    case DST_FDAY1:
+      byte10 = data;
+      sync_state = DST_FDAY0;
+      break;
+    case DST_FDAY0:
+      byte9 = data;
+      sync_state = DST_LDAY1;
+      break;
+    case DST_LDAY1:
+      byte12 = data;
+      sync_state = DST_LDAY0;
+      break;
+    case DST_LDAY0:
+      byte11 = data;
+      sync_state = YEAR1;
+      break;
+    case YEAR1:
+      byte14 = data;
+      sync_state = YEAR0;
+      break;
+    case YEAR0:
+      byte13 = data;
+      post assemble_timestamp();
+      sync_state = DONE;
+      break;
+    default:
+      break;
+    }
+  }
+
+  async event void UARTData.txDone() {}
+
+  event void Time.tick() { }
+  
+}  
diff --git a/tos/platforms/shimmer/HplUserButtonC.nc b/tos/platforms/shimmer/HplUserButtonC.nc
new file mode 100644
index 00000000..ab097e5d
--- /dev/null
+++ b/tos/platforms/shimmer/HplUserButtonC.nc
@@ -0,0 +1,57 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telos platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ * (not much to) port to shimmer
+ * @author Steve Ayer
+ * @date February, 2010
+ */
+
+configuration HplUserButtonC {
+  provides interface GeneralIO;
+  provides interface GpioInterrupt;
+}
+implementation {
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components HplMsp430InterruptC as InterruptC;
+
+  components new Msp430GpioC() as UserButtonC;
+  UserButtonC -> GeneralIOC.Port20;
+  GeneralIO = UserButtonC;
+
+  components new Msp430InterruptC() as InterruptUserButtonC;
+  InterruptUserButtonC.HplInterrupt -> InterruptC.Port20;
+  GpioInterrupt = InterruptUserButtonC.Interrupt;
+}
diff --git a/tos/platforms/shimmer/Ieee154MessageC.nc b/tos/platforms/shimmer/Ieee154MessageC.nc
new file mode 100644
index 00000000..2acb1e4e
--- /dev/null
+++ b/tos/platforms/shimmer/Ieee154MessageC.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+/**
+ *
+ * @author Stephen Dawson-Haggerty
+ */
+ 
+configuration Ieee154MessageC  {
+  provides {
+    interface SplitControl;
+
+    interface Resource as SendResource[uint8_t clientId];
+    interface Ieee154Send;
+    interface Receive as Ieee154Receive;
+
+    interface Ieee154Packet;
+    interface Packet;
+
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+    interface LowPowerListening;
+    interface PacketLink;
+  }
+
+} implementation {
+  components CC2420Ieee154MessageC as Msg;
+
+  SplitControl = Msg;
+  SendResource = Msg;
+  Ieee154Send  = Msg;
+  Ieee154Receive = Msg;
+  Ieee154Packet = Msg;
+  Packet = Msg;
+  
+  PacketAcknowledgements = Msg;
+  LinkPacketMetadata = Msg;
+  LowPowerListening = Msg;
+  PacketLink = Msg;
+}
diff --git a/tos/platforms/shimmer/Leds.nc b/tos/platforms/shimmer/Leds.nc
new file mode 100644
index 00000000..06671d27
--- /dev/null
+++ b/tos/platforms/shimmer/Leds.nc
@@ -0,0 +1,155 @@
+// $Id: Leds.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2005-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Commands for controlling three LEDs. A platform can provide this
+ * interface if it has more than or fewer than three LEDs. In the
+ * former case, these commands refer to the first three LEDs. In the
+ * latter case, some of the commands are null operations, and the set
+ * of non-null operations must be contiguous and start at Led1. That
+ * is, on platforms with 2 LEDs, LED 3's commands are null operations,
+ * while on platforms with 1 LED, LED 2 and LED 3's commands are null
+ * opertations.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ *
+ * @author Mike Healy
+ * @date April 20, 2009 - added support for 4th (green) LED on SHIMMER
+ */
+
+#include "Leds.h"
+
+interface Leds {
+
+  /**
+   * Turn on LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0On();
+
+  /**
+   * Turn off LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0Off();
+
+  /**
+   * Toggle LED 0; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led0Toggle();
+
+  /**
+   * Turn on LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1On();
+
+  /**
+   * Turn off LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1Off();
+
+   /**
+   * Toggle LED 1; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led1Toggle();
+
+ 
+  /**
+   * Turn on LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2On();
+
+  /**
+   * Turn off LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2Off();
+
+   /**
+   * Toggle LED 2; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led2Toggle();
+  
+  /**
+   * Turn on LED 3. The color of this LED depends on the platform.
+   */
+  async command void led3On();
+
+  /**
+   * Turn off LED 3. The color of this LED depends on the platform.
+   */
+  async command void led3Off();
+
+   /**
+   * Toggle LED 3; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led3Toggle();
+
+
+  /**
+   * Get the current LED settings as a bitmask. Each bit corresponds to
+   * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can
+   * also use the enums LEDS_LED0, LEDS_LED1. For example, this expression
+   * will determine whether LED 2 is on:
+   *
+   * <pre> (call Leds.get() & LEDS_LED2) </pre>
+   *
+   * This command supports up to 8 LEDs; if a platform has fewer, then
+   * those LEDs should always be off (their bit is zero). Also see
+   * <tt>set()</tt>.
+   *
+   * @return a bitmask describing which LEDs are on and which are off
+   */ 
+  async command uint8_t get();
+
+  
+  /**
+   * Set the current LED configuration using a bitmask.  Each bit
+   * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED
+   * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example,
+   * this statement will configure the LEDs so LED 0 and LED 2 are on:
+   *
+   * <pre> call Leds.set(LEDS_LED0 | LEDS_LED2); </pre>
+   *
+   * This statement will turn LED 1 on if it was not already:
+   *
+   * <pre>call Leds.set(call Leds.get() | LEDS_LED1);</pre>
+   *
+   * @param  val   a bitmask describing the on/off settings of the LEDs
+   */
+   async command void set(uint8_t val);
+  
+}
diff --git a/tos/platforms/shimmer/LedsC.nc b/tos/platforms/shimmer/LedsC.nc
new file mode 100644
index 00000000..3e0744b2
--- /dev/null
+++ b/tos/platforms/shimmer/LedsC.nc
@@ -0,0 +1,62 @@
+// $Id: LedsC.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ *
+ * The basic TinyOS LEDs abstraction.
+ *
+ * @author Phil Buonadonna
+ * @author David Gay
+ * @author Philip Levis
+ * @author Joe Polastre
+ *
+ * @author Mike Healy
+ * @date April 20, 2009 - added support for 4th (green) LED on SHIMMER
+ */
+
+
+configuration LedsC {
+  provides interface Leds;
+}
+implementation {
+  components LedsP, PlatformLedsC;
+
+  Leds = LedsP;
+
+  LedsP.Init <- PlatformLedsC.Init;
+  LedsP.Led0 -> PlatformLedsC.Led0;
+  LedsP.Led1 -> PlatformLedsC.Led1;
+  LedsP.Led2 -> PlatformLedsC.Led2;
+  LedsP.Led3 -> PlatformLedsC.Led3;
+}
+
diff --git a/tos/platforms/shimmer/LedsP.nc b/tos/platforms/shimmer/LedsP.nc
new file mode 100644
index 00000000..dc9137ac
--- /dev/null
+++ b/tos/platforms/shimmer/LedsP.nc
@@ -0,0 +1,188 @@
+// $Id: LedsP.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The implementation of the standard 3 LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ *
+ * @date   March 21, 2005
+ *
+ * @author Mike Healy
+ * @date April 20, 2009 - added support for 4th (green) LED on SHIMMER
+ */
+
+module LedsP @safe() {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+    interface GeneralIO as Led3;
+  }
+}
+implementation {
+  command error_t Init.init() {
+    atomic {
+      dbg("Init", "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led3.makeOutput();
+      call Led0.set();
+      call Led1.set();
+      call Led2.set();
+      call Led3.set();
+    }
+    return SUCCESS;
+  }
+
+  /* Note: the call is inside the dbg, as it's typically a read of a volatile
+     location, so can't be deadcode eliminated */
+#define DBGLED(n) \
+  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");
+
+  async command void Leds.led0On() {
+    call Led0.clr();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Off() {
+    call Led0.set();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    DBGLED(0);
+  }
+
+  async command void Leds.led1On() {
+    call Led1.clr();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Off() {
+    call Led1.set();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    DBGLED(1);
+  }
+
+  async command void Leds.led2On() {
+    call Led2.clr();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Off() {
+    call Led2.set();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    DBGLED(2);
+  }
+
+  async command void Leds.led3On() {
+    call Led3.clr();
+    DBGLED(3);
+  }
+
+  async command void Leds.led3Off() {
+    call Led3.set();
+    DBGLED(3);
+  }
+
+  async command void Leds.led3Toggle() {
+    call Led3.toggle();
+    DBGLED(3);
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (!call Led0.get()) {
+	      rval |= LEDS_LED0;
+      }
+      if (!call Led1.get()) {
+	      rval |= LEDS_LED1;
+      }
+      if (!call Led2.get()) {
+	      rval |= LEDS_LED2;
+      }
+      if (!call Led3.get()) {
+	      rval |= LEDS_LED3;
+      }
+    }
+    return rval;
+  }
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+	      call Leds.led0On();
+      }
+      else {
+	      call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+	      call Leds.led1On();
+      }
+      else {
+	      call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+	      call Leds.led2On();
+      }
+      else {
+	      call Leds.led2Off();
+      }
+      if (val & LEDS_LED3) {
+	      call Leds.led3On();
+      }
+      else {
+	      call Leds.led3Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/shimmer/LocalTime64.nc b/tos/platforms/shimmer/LocalTime64.nc
new file mode 100644
index 00000000..19577313
--- /dev/null
+++ b/tos/platforms/shimmer/LocalTime64.nc
@@ -0,0 +1,63 @@
+//$Id: LocalTime64.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "Timer.h"
+
+/**
+ * A LocalTime interface counts time in some units. If you need to detect
+ * time overflow, you should use a component offering the Counter
+ * interface.
+ *
+ * <p>The LocalTime interface is parameterised by its "precision"
+ * (milliseconds, microseconds, etc), identified by a type. This prevents,
+ * e.g., unintentionally mixing components expecting milliseconds with
+ * those expecting microseconds as those interfaces have a different type.
+ *
+ * <p>See TEP102 for more details.
+ *
+ * @param precision_tag A type indicating the precision of this Counter.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+interface LocalTime64<precision_tag>
+{
+  /** 
+   * Return current time. Time starts counting at boot - some time sources
+   * may stop counting while the processor is in low-power mode.
+   *
+   * @return Current time.
+   */
+  async command uint64_t get();
+}
+
diff --git a/tos/platforms/shimmer/MoteClockC.nc b/tos/platforms/shimmer/MoteClockC.nc
new file mode 100644
index 00000000..29dae2dc
--- /dev/null
+++ b/tos/platforms/shimmer/MoteClockC.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id: MoteClockC.nc,v 1.1 2008-05-21 22:07:24 konradlorincz Exp $
+ *
+ */
+
+ /**
+ * @author Vlado Handziski <handzisk@tkn.tu-berlind.de>
+ */
+ 
+configuration MoteClockC
+{
+  provides interface Init as MoteClockInit;
+}
+implementation
+
+{
+  components Msp430ClockC;
+  
+  MoteClockInit = Msp430ClockC.Init;
+}
diff --git a/tos/platforms/shimmer/MotePlatformC.nc b/tos/platforms/shimmer/MotePlatformC.nc
new file mode 100644
index 00000000..4037abde
--- /dev/null
+++ b/tos/platforms/shimmer/MotePlatformC.nc
@@ -0,0 +1,217 @@
+/*
+ * Copyright (c) 2006, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steven Ayer
+ * @date June 2006
+ */
+
+module MotePlatformC {
+  provides interface Init;
+}
+implementation {
+  command error_t Init.init() {
+    
+    //LEDS
+    TOSH_MAKE_RED_LED_OUTPUT();
+    TOSH_MAKE_YELLOW_LED_OUTPUT();
+    TOSH_MAKE_ORANGE_LED_OUTPUT();
+    TOSH_MAKE_GREEN_LED_OUTPUT();
+    TOSH_SEL_RED_LED_IOFUNC();
+    TOSH_SEL_YELLOW_LED_IOFUNC();
+    TOSH_SEL_ORANGE_LED_IOFUNC();
+    TOSH_SEL_GREEN_LED_IOFUNC();
+
+    TOSH_SET_RED_LED_PIN();
+    TOSH_SET_YELLOW_LED_PIN();
+    TOSH_SET_ORANGE_LED_PIN();
+    TOSH_SET_GREEN_LED_PIN();
+
+    //RADIO PINS
+    //CC2420 pins
+    TOSH_MAKE_RADIO_CSN_OUTPUT();
+    TOSH_SEL_RADIO_CSN_IOFUNC();
+    TOSH_SET_RADIO_CSN_PIN();
+
+    TOSH_MAKE_CSN_OUTPUT();
+    TOSH_SEL_CSN_IOFUNC();
+    TOSH_SET_CSN_PIN();
+
+    // should be reset_n
+    TOSH_MAKE_RADIO_RESET_OUTPUT();
+    TOSH_SEL_RADIO_RESET_IOFUNC();
+    TOSH_CLR_RADIO_RESET_PIN();
+
+    TOSH_MAKE_RADIO_1V8_EN_OUTPUT();
+    TOSH_SEL_RADIO_1V8_EN_IOFUNC();
+    TOSH_CLR_RADIO_1V8_EN_PIN();
+
+    TOSH_MAKE_RADIO_CCA_INPUT();
+    TOSH_MAKE_RADIO_FIFO_INPUT();
+    TOSH_MAKE_RADIO_FIFOP_INPUT();
+    TOSH_MAKE_RADIO_SFD_INPUT();
+    TOSH_MAKE_RADIO_TIMED_SFD_INPUT();
+    TOSH_SEL_RADIO_CCA_IOFUNC();
+    TOSH_SEL_RADIO_FIFO_IOFUNC();
+    TOSH_SEL_RADIO_FIFOP_IOFUNC();
+    TOSH_SEL_RADIO_SFD_IOFUNC();
+    TOSH_SEL_RADIO_TIMED_SFD_IOFUNC();
+
+    TOSH_MAKE_ONEWIRE_PWR_OUTPUT();
+    TOSH_SET_ONEWIRE_PWR_PIN();
+
+    TOSH_SEL_SD_CS_N_IOFUNC();
+    TOSH_MAKE_SD_CS_N_OUTPUT();
+    TOSH_SET_SD_CS_N_PIN();
+
+    // BT PINS
+    TOSH_MAKE_BT_RESET_OUTPUT();  
+    TOSH_SEL_BT_RESET_IOFUNC();    
+    TOSH_CLR_BT_RESET_PIN();   // mitsumi module disabled by clr
+
+    TOSH_MAKE_BT_RTS_INPUT();      
+    TOSH_SEL_BT_RTS_IOFUNC();
+
+    TOSH_MAKE_BT_PIO_INPUT();
+    TOSH_SEL_BT_PIO_IOFUNC();
+
+    TOSH_MAKE_BT_CTS_OUTPUT();
+    TOSH_SEL_BT_CTS_IOFUNC();
+
+    TOSH_MAKE_BT_TXD_OUTPUT();
+    TOSH_SEL_BT_TXD_MODFUNC();
+
+    TOSH_MAKE_BT_RXD_INPUT();
+    TOSH_SEL_BT_RXD_MODFUNC();
+
+    // BSL Prog Pins tristate em
+
+    TOSH_MAKE_PROG_IN_OUTPUT();
+    TOSH_MAKE_PROG_OUT_OUTPUT();
+    TOSH_SET_PROG_OUT_PIN();    // some expansion boards have enable low
+    TOSH_SEL_PROG_IN_IOFUNC();
+    TOSH_SEL_PROG_OUT_IOFUNC();
+
+    // USART lines, attached to a pullup
+    TOSH_SEL_UCLK0_IOFUNC();
+    TOSH_MAKE_UCLK0_OUTPUT();
+    TOSH_SET_UCLK0_PIN();
+    TOSH_SEL_UCLK1_IOFUNC();
+    TOSH_MAKE_UCLK1_OUTPUT();
+    TOSH_SET_UCLK1_PIN();
+
+    TOSH_SEL_SIMO0_IOFUNC();
+    TOSH_MAKE_SIMO0_OUTPUT();
+    TOSH_SET_SIMO0_PIN();
+    TOSH_SEL_SOMI0_IOFUNC();
+    TOSH_MAKE_SOMI0_INPUT();
+
+    TOSH_SEL_SIMO1_IOFUNC();
+    TOSH_MAKE_SIMO1_OUTPUT();
+    TOSH_SET_SIMO1_PIN();
+    TOSH_SEL_SOMI1_IOFUNC();
+    TOSH_MAKE_SOMI1_INPUT();
+
+    // ADC lines
+    TOSH_MAKE_ADC_0_OUTPUT();
+    TOSH_MAKE_ADC_1_OUTPUT();
+    TOSH_MAKE_ADC_2_OUTPUT();
+    TOSH_MAKE_ADC_6_OUTPUT();
+    TOSH_MAKE_ADC_7_OUTPUT();
+
+    TOSH_SEL_ADC_0_IOFUNC();
+    TOSH_SEL_ADC_1_IOFUNC();
+    TOSH_SEL_ADC_2_IOFUNC();
+    TOSH_SEL_ADC_6_IOFUNC();
+    TOSH_SEL_ADC_7_IOFUNC();
+  
+    TOSH_MAKE_ADC_ACCELZ_INPUT();
+    TOSH_MAKE_ADC_ACCELY_INPUT();
+    TOSH_MAKE_ADC_ACCELX_INPUT();
+    TOSH_SEL_ADC_ACCELZ_MODFUNC();
+    TOSH_SEL_ADC_ACCELY_MODFUNC();
+    TOSH_SEL_ADC_ACCELX_MODFUNC();
+  
+    TOSH_SEL_ROSC_IOFUNC();
+    TOSH_MAKE_ROSC_INPUT();
+
+    // DAC lines
+    // Default is not to use DAC mode.  Please define pin usage if you want to use them
+    
+    // UART pins
+    // These declarations are to allow the UART module to work since it's using the names.
+    // The UART module will set them to the right direction when initialized
+
+    // ftdi/gio pins.  Unused for now so we do not set directionality or function
+
+
+    // 1-wire function
+    TOSH_MAKE_ONEWIRE_PWR_OUTPUT();
+    TOSH_SEL_ONEWIRE_PWR_IOFUNC();
+    TOSH_MAKE_ONEWIRE_INPUT();
+    TOSH_SEL_ONEWIRE_IOFUNC();
+
+    // Accelerometer pin definitions
+    TOSH_SEL_ACCEL_SEL0_IOFUNC();
+    TOSH_SEL_ACCEL_SEL1_IOFUNC();
+    TOSH_SEL_ACCEL_SLEEP_N_IOFUNC();
+  
+    TOSH_MAKE_ACCEL_SEL0_OUTPUT();
+    TOSH_MAKE_ACCEL_SEL1_OUTPUT();
+    TOSH_MAKE_ACCEL_SLEEP_N_OUTPUT();
+
+    /*
+     * unless the accel_sel0 pin is cleared, 
+     * a severe quiescent power hit occurs on the msp430
+     * we go from 3.7 ua to 65.1 ua when asleep!
+     */
+    TOSH_CLR_ACCEL_SEL0_PIN();
+    TOSH_CLR_ACCEL_SEL1_PIN();
+    TOSH_CLR_ACCEL_SLEEP_N_PIN();
+
+
+    // idle expansion header pins
+    TOSH_MAKE_SER0_CTS_OUTPUT();
+    TOSH_SEL_SER0_CTS_IOFUNC();
+    TOSH_MAKE_SER0_RTS_OUTPUT();
+    TOSH_SEL_SER0_RTS_IOFUNC();
+    TOSH_MAKE_GIO0_INPUT();
+    TOSH_SEL_GIO0_IOFUNC();
+    TOSH_MAKE_GIO1_OUTPUT();
+    TOSH_SEL_GIO1_IOFUNC();
+    TOSH_MAKE_UTXD0_OUTPUT();
+    TOSH_SEL_UTXD0_IOFUNC();
+    TOSH_MAKE_URXD0_OUTPUT();
+    TOSH_SEL_URXD0_IOFUNC();
+    TOSH_MAKE_RADIO_VREF_OUTPUT();
+    TOSH_SEL_RADIO_VREF_IOFUNC();
+
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/shimmer/Msp430Timer32khzMapC.nc b/tos/platforms/shimmer/Msp430Timer32khzMapC.nc
new file mode 100644
index 00000000..9d8a8508
--- /dev/null
+++ b/tos/platforms/shimmer/Msp430Timer32khzMapC.nc
@@ -0,0 +1,86 @@
+//$Id: Msp430Timer32khzMapC.nc,v 1.4 2010-06-29 22:07:54 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * MSP430Timer32khzMapC presents as paramaterized interfaces all of
+ * the 32khz hardware timers on the MSP430 that are available for
+ * compile time allocation by "new Alarm32khz16C()", "new
+ * AlarmMilli32C()", and so on.  
+ *
+ * Platforms based on the MSP430 are * encouraged to copy in and
+ * override this file, presenting only the * hardware timers that are
+ * available for allocation on that platform.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @version $Revision: 1.4 $ $Date: 2010-06-29 22:07:54 $
+ */
+
+configuration Msp430Timer32khzMapC
+{
+  provides interface Msp430Timer[ uint8_t id ];
+  provides interface Msp430TimerControl[ uint8_t id ];
+  provides interface Msp430Compare[ uint8_t id ];
+}
+implementation
+{
+  components Msp430TimerC;
+
+  Msp430Timer[0] = Msp430TimerC.TimerB;
+  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
+  Msp430Compare[0] = Msp430TimerC.CompareB0;
+
+  Msp430Timer[1] = Msp430TimerC.TimerB;
+  Msp430TimerControl[1] = Msp430TimerC.ControlB1;
+  Msp430Compare[1] = Msp430TimerC.CompareB1;
+
+  Msp430Timer[2] = Msp430TimerC.TimerB;
+  Msp430TimerControl[2] = Msp430TimerC.ControlB2;
+  Msp430Compare[2] = Msp430TimerC.CompareB2;
+
+  Msp430Timer[3] = Msp430TimerC.TimerB;
+  Msp430TimerControl[3] = Msp430TimerC.ControlB3;
+  Msp430Compare[3] = Msp430TimerC.CompareB3;
+
+  Msp430Timer[4] = Msp430TimerC.TimerB;
+  Msp430TimerControl[4] = Msp430TimerC.ControlB4;
+  Msp430Compare[4] = Msp430TimerC.CompareB4;
+
+  Msp430Timer[5] = Msp430TimerC.TimerB;
+  Msp430TimerControl[5] = Msp430TimerC.ControlB5;
+  Msp430Compare[5] = Msp430TimerC.CompareB5;
+
+  Msp430Timer[6] = Msp430TimerC.TimerB;
+  Msp430TimerControl[6] = Msp430TimerC.ControlB6;
+  Msp430Compare[6] = Msp430TimerC.CompareB6;
+}
+
diff --git a/tos/platforms/shimmer/NoLedsC.nc b/tos/platforms/shimmer/NoLedsC.nc
new file mode 100644
index 00000000..166351ea
--- /dev/null
+++ b/tos/platforms/shimmer/NoLedsC.nc
@@ -0,0 +1,63 @@
+// $Id: NoLedsC.nc,v 1.1 2009/06/17 15:16:54 ayer Exp $
+
+/*
+ * "Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ */
+
+/**
+ * A null operation replacement for the LedsC component. As many
+ * components might concurrently signal information through LEDs,
+ * using LedsC and NoLedsC allows an application builder to select
+ * which components control the LEDs.
+ *
+ * @author Philip Levis
+ * @date   March 19, 2005
+ *
+ * @author Mike Healy
+ * @date April 20, 2009 - added support for 4th (green) LED on SHIMMER
+ */
+
+module NoLedsC {
+  provides interface Init;
+  provides interface Leds;
+}
+implementation {
+
+  command error_t Init.init() {return SUCCESS;}
+
+  async command void Leds.led0On() {}
+  async command void Leds.led0Off() {}
+  async command void Leds.led0Toggle() {}
+
+  async command void Leds.led1On() {}
+  async command void Leds.led1Off() {}
+  async command void Leds.led1Toggle() {}
+
+  async command void Leds.led2On() {}
+  async command void Leds.led2Off() {}
+  async command void Leds.led2Toggle() {}
+
+  async command void Leds.led3On() {}
+  async command void Leds.led3Off() {}
+  async command void Leds.led3Toggle() {}
+
+  async command uint8_t Leds.get() {return 0;}
+  async command void Leds.set(uint8_t val) {}
+}
diff --git a/tos/platforms/shimmer/PlatformC.nc b/tos/platforms/shimmer/PlatformC.nc
new file mode 100644
index 00000000..8c78be51
--- /dev/null
+++ b/tos/platforms/shimmer/PlatformC.nc
@@ -0,0 +1,49 @@
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre and Cory Sharp
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:54 $
+ */
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+}
+implementation
+{
+  components PlatformP, MotePlatformC, MoteClockC;
+
+  Init = PlatformP;
+  PlatformP.MoteClockInit -> MoteClockC;
+  PlatformP.MoteInit -> MotePlatformC;
+}
diff --git a/tos/platforms/shimmer/PlatformLedsC.nc b/tos/platforms/shimmer/PlatformLedsC.nc
new file mode 100644
index 00000000..fce7983b
--- /dev/null
+++ b/tos/platforms/shimmer/PlatformLedsC.nc
@@ -0,0 +1,77 @@
+// $Id: PlatformLedsC.nc,v 1.3 2010-06-29 22:07:54 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:54 $
+ *
+ * @author Mike Healy
+ * @date April 20, 2009 - added support for 4th (green) LED on SHIMMER
+ */
+
+#include "hardware.h"
+
+configuration PlatformLedsC {
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  provides interface GeneralIO as Led3;
+  uses interface Init;
+}
+implementation
+{
+  components 
+      HplMsp430GeneralIOC as GeneralIOC
+    , new Msp430GpioC() as Led0Impl
+    , new Msp430GpioC() as Led1Impl
+    , new Msp430GpioC() as Led2Impl
+    , new Msp430GpioC() as Led3Impl
+    ;
+  components PlatformP;
+
+  Init = PlatformP.LedsInit;
+
+  Led0 = Led0Impl;
+  Led0Impl -> GeneralIOC.Port40;
+
+  Led1 = Led1Impl;
+  Led1Impl -> GeneralIOC.Port41;
+
+  Led2 = Led2Impl;
+  Led2Impl -> GeneralIOC.Port42;
+
+  Led3 = Led3Impl;
+  Led3Impl -> GeneralIOC.Port43;
+
+}
+
diff --git a/tos/platforms/shimmer/PlatformP.nc b/tos/platforms/shimmer/PlatformP.nc
new file mode 100644
index 00000000..b8dc9438
--- /dev/null
+++ b/tos/platforms/shimmer/PlatformP.nc
@@ -0,0 +1,19 @@
+#include "hardware.h"
+
+module PlatformP{
+  provides interface Init;
+  uses interface Init as MoteClockInit;
+  uses interface Init as MoteInit;
+  uses interface Init as LedsInit;
+}
+implementation {
+  command error_t Init.init() {
+    call MoteClockInit.init();
+    call MoteInit.init();
+    call LedsInit.init();
+    return SUCCESS;
+  }
+
+  default command error_t LedsInit.init() { return SUCCESS; }
+
+}
diff --git a/tos/platforms/shimmer/PlatformSerialC.nc b/tos/platforms/shimmer/PlatformSerialC.nc
new file mode 100644
index 00000000..d8184464
--- /dev/null
+++ b/tos/platforms/shimmer/PlatformSerialC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2008
+ *	The President and Fellows of Harvard College.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/**
+ * Ported to the SHIMMER platform: uses Uart0 instead of Uart1 (telos).
+ *
+ * @author Konrad Lorincz
+ * @date May 14, 2008
+ */
+
+configuration PlatformSerialC 
+{
+    provides interface StdControl;
+    provides interface UartStream;
+    provides interface UartByte;
+}
+implementation 
+{
+    components new Msp430Uart0C() as UartC;
+    UartStream = UartC;  
+    UartByte = UartC;
+  
+    components ShimmerSerialP;
+    StdControl = ShimmerSerialP;
+    ShimmerSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
+    ShimmerSerialP.Resource -> UartC.Resource;
+}
diff --git a/tos/platforms/shimmer/README.txt b/tos/platforms/shimmer/README.txt
new file mode 100644
index 00000000..08ff4d7d
--- /dev/null
+++ b/tos/platforms/shimmer/README.txt
@@ -0,0 +1,67 @@
+*** SHIMMER - TinyOS 2.x platform support ***
+=============================================
+Konrad Lorincz
+May 6, 2008
+
+This directory contains tinyos 2.x platform support for the Intel
+SHIMMER mote.  Please use the mailing list given below to post
+questions and comments.
+
+
+Usage
+-----
+You can compile and install applications for the SHIMMER platform just
+like with any standard platform, "make shimmer install ..." (Note:
+you must have a shimmer programming board).
+
+For example, to complie and install Blink, do the following:
+
+  $ cd $TOSROOT/apps/Blink
+  $ make shimmer install bsl,X
+
+where X is your serial port.
+
+You may also want to test the radio.  Do this by compiling and
+installing "$TOSROOT/apps/RadioCountToLeds" on TWO shimmers (for
+sending and receiving radio messages).
+
+
+Support
+-------
+  - Official documentation
+    http://docs.tinyos.net/index.php/SHIMMER
+  - Mailing list (requires subscription to post)
+    https://www.eecs.harvard.edu/mailman/listinfo/shimmer-users
+
+
+Copyright
+---------
+/*
+ * Copyright (c) 2008
+ *	The President and Fellows of Harvard College.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
diff --git a/tos/platforms/shimmer/ShimmerSerialP.nc b/tos/platforms/shimmer/ShimmerSerialP.nc
new file mode 100644
index 00000000..b62f0948
--- /dev/null
+++ b/tos/platforms/shimmer/ShimmerSerialP.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2008
+ *	The President and Fellows of Harvard College.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/**
+ * Ported to the SHIMMER platform: uses Uart0 instead of Uart1 (telos).
+ *
+ * @author Konrad Lorincz
+ * @date May 14, 2008
+ */
+module ShimmerSerialP 
+{
+    provides interface StdControl;
+    provides interface Msp430UartConfigure;
+    uses interface Resource;
+}
+implementation 
+{
+    msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} };
+
+    command error_t StdControl.start()
+    {
+        return call Resource.immediateRequest();
+    }
+
+    command error_t StdControl.stop()
+    {
+        call Resource.release();
+        return SUCCESS;
+    }
+
+    event void Resource.granted(){}
+
+    async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() 
+    {
+        return &msp430_uart_telos_config;
+    }
+}
diff --git a/tos/platforms/shimmer/SwitchToggleC.nc b/tos/platforms/shimmer/SwitchToggleC.nc
new file mode 100644
index 00000000..76f82706
--- /dev/null
+++ b/tos/platforms/shimmer/SwitchToggleC.nc
@@ -0,0 +1,73 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Generic layer to translate a GIO into a toggle switch
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ * port to shimmer-style
+ * @author Steve Ayer
+ * @date   February, 2010
+ */
+
+#include <UserButton.h>
+
+generic module SwitchToggleC() {
+  provides interface Notify<bool>;
+
+  uses interface GeneralIO;
+  uses interface GpioInterrupt;
+}
+implementation {
+  task void sendEvent();
+
+  command error_t Notify.enable() {
+    call GeneralIO.makeInput();
+
+    return call GpioInterrupt.enableRisingEdge();
+  }
+
+  command error_t Notify.disable() {
+    call GeneralIO.makeOutput();
+    return call GpioInterrupt.disable();
+  }
+
+  async event void GpioInterrupt.fired() {
+    call GpioInterrupt.disable();
+
+    post sendEvent();
+  }
+
+  task void sendEvent() {
+    signal Notify.notify( BUTTON_PRESSED );
+  }
+}
diff --git a/tos/platforms/shimmer/Time.h b/tos/platforms/shimmer/Time.h
new file mode 100644
index 00000000..9f2b17dc
--- /dev/null
+++ b/tos/platforms/shimmer/Time.h
@@ -0,0 +1,29 @@
+typedef uint32_t time_t;
+
+#define HAVE_WDAY
+#undef HAVE_DST
+
+struct tm
+{
+  int tm_sec;			/* Seconds.	[0-60] (1 leap second) */
+  int tm_min;			/* Minutes.	[0-59] */
+  int tm_hour;			/* Hours.	[0-23] */
+  int tm_mday;			/* Day.		[1-31] */
+  int tm_mon;			/* Month.	[0-11] */
+  int tm_year;			/* Year	- 1900.  */
+#ifdef HAVE_WDAY
+  int tm_wday;			/* Day of week.	[0-6] */
+#endif
+  int tm_yday;			/* Days in year.[0-365]	*/
+  int tm_isdst;			/* DST.		[-1/0/1]*/
+
+#ifdef __UCLIBC_HAS_TM_EXTENSIONS__
+#ifdef	__USE_BSD
+  long int tm_gmtoff;		/* Seconds east of UTC.  */
+  __const char *tm_zone;	/* Timezone abbreviation. */
+#else
+  long int __tm_gmtoff;		/* Seconds east of UTC.  */
+  __const char *__tm_zone;	/* Timezone abbreviation. */
+#endif
+#endif /* __UCLIBC_HAS_TM_EXTENSIONS__ */
+};
diff --git a/tos/platforms/shimmer/Time.nc b/tos/platforms/shimmer/Time.nc
new file mode 100644
index 00000000..fa96c17b
--- /dev/null
+++ b/tos/platforms/shimmer/Time.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2005 Hewlett-Packard Company
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of the Hewlett-Packard Company nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include "Time.h"
+
+interface Time {
+  command error_t gmtime(const time_t *timer, struct tm *tm);
+  command error_t localtime(const time_t *timer, struct tm *tm);
+  command error_t asctime(const struct tm *tm, char *buf, int buflen);
+  command error_t time(time_t *timer);
+  command void setCurrentTime(time_t current_time);
+  command void setZoneInfo(uint16_t g_year, 
+			   time_t g_year_time, 
+			   uint8_t g_zero_day, 
+			   uint16_t g_dst_fday, 
+			   uint16_t g_dst_lday);
+  event void tick();
+}
diff --git a/tos/platforms/shimmer/TimeC.nc b/tos/platforms/shimmer/TimeC.nc
new file mode 100644
index 00000000..617752b1
--- /dev/null
+++ b/tos/platforms/shimmer/TimeC.nc
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date March, 2010
+ * 
+ * pulling together time modules
+ */
+
+configuration TimeC {
+  provides{
+    interface Time;
+    interface Init;
+  }
+}
+
+implementation { 
+  components TimeP;
+  Init = TimeP;
+  Time = TimeP;
+
+  components new TimerMilliC() as LocalTimer;
+  TimeP.Timer -> LocalTimer;
+
+  components Counter32khz64C as Counter;
+  components new CounterToLocalTime64C(T32khz);
+  CounterToLocalTime64C.Counter -> Counter;
+  TimeP.LocalTime64 -> CounterToLocalTime64C;
+  
+  /* 
+   * and, at some point...
+   *  TimeP.NTPClient            -> NTPClientM;   not yet, awaiting tos-2.x ip port
+   */
+
+}
+
diff --git a/tos/platforms/shimmer/TimeP.nc b/tos/platforms/shimmer/TimeP.nc
new file mode 100644
index 00000000..51f18d2d
--- /dev/null
+++ b/tos/platforms/shimmer/TimeP.nc
@@ -0,0 +1,357 @@
+
+
+/*  Copyright (C) 2002     Manuel Novoa III
+ *
+ *  This library is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU Library General Public
+ *  License as published by the Free Software Foundation; either
+ *  version 2 of the License, or (at your option) any later version.
+ *
+ *  This library is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  Library General Public License for more details.
+ *
+ *  You should have received a copy of the GNU Library General Public
+ *  License along with this library; if not, write to the Free
+ *  Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+/**
+ * port to tos-2.x
+ * @author Steve Ayer
+ * @date   January, 2010
+ */
+
+// includes InfoMem;  let's avoid this...
+
+module TimeP {
+  provides {
+    interface Init;
+    interface Time;
+    //    interface ParamView;    save for ip stack port to tos-2.x
+  }
+  uses {
+    interface Timer<TMilli>;
+    //    interface NTPClient;  save for ip stack port to tos-2.x
+    interface LocalTime64<T32khz>;
+  }
+}
+
+implementation {
+
+#define HAVE_DST
+extern int snprintf(char *str, size_t len, const char *format, ...) __attribute__ ((C));
+
+  struct y_info{
+    time_t year_seconds; /* time_t value for beginning of year */
+    int8_t wday_offset;   /* tm_day of first day of the year */
+    int8_t isleap;
+    int16_t dst_first_yday;
+    int16_t dst_last_yday;
+  };
+  time_t g_seconds;
+  time_t g_year_seconds;
+  time_t g_seconds_from_year;
+  uint16_t g_days;
+  time_t g_seconds_from_day;
+
+  //#define TZNAME_MAX 7
+  //#define LONG_MAX 0x7fffffffL
+  time_t g_tick_local_time;
+#ifdef CURRENT_TIME  
+  time_t g_current_time = CURRENT_TIME;
+#else
+  time_t g_current_time;
+#endif
+
+#ifndef HOST_TIME
+#define NUM_YEARS 4
+  const int16_t g_first_year = 2009;
+  struct y_info year_info[NUM_YEARS] = {
+    /* unix time start jan 1 1970 */
+    // from 2007, dst begins 2nd sunday in march, ends first sunday in november
+    { 0x495c4dd0, 3, 0, 67, 305},
+    { 0x4B3D8150, 4, 0, 73, 311},
+    { 0x4D1EB4D0, 5, 0, 72, 310},
+    { 0x4EFFE850, 6, 1, 71, 309}
+  };
+
+#else
+#define NUM_YEARS 1
+  // these will be set by setZoneInfo()
+  int16_t g_first_year = 0;
+  struct y_info year_info[NUM_YEARS];
+#endif
+
+  //  time_t g_local_time; /* from LocalTime.read() */
+  uint64_t g_local_time; /* from LocalTime.read(), now 64 bits to handle */
+
+  typedef struct {
+    long gmt_offset;
+    //    long dst_offset;
+    //    short day;					/* for J or normal */
+    //    short week;
+    //    short month;
+    //    short rule_type;			/* J, M, \0 */
+    //    char tzname[TZNAME_MAX+1];
+  } rule_struct;
+
+  rule_struct _time_tzinfo[1];
+
+  // gmt_offset can stay zero, because any CURRENT_TIME we get is from a local source
+  command error_t Init.init() {
+    _time_tzinfo[0].gmt_offset = 60L * 0L;
+
+    g_tick_local_time = call LocalTime64.get();
+    call Timer.startPeriodic(10*1024L);
+    signal Time.tick();
+    return SUCCESS;
+  }
+
+  command void Time.setCurrentTime(time_t current_time){
+    atomic g_current_time = current_time;
+    g_local_time = call LocalTime64.get();
+  }
+
+  command void Time.setZoneInfo(uint16_t g_year, 
+				time_t g_year_time, 
+				uint8_t g_zero_day, 
+				uint16_t g_dst_fday, 
+				uint16_t g_dst_lday){
+    g_first_year = g_year;
+    
+    year_info[0].year_seconds = g_year_time;
+    year_info[0].wday_offset = g_zero_day;
+
+    if(!(g_year % 4))
+      year_info[0].isleap = 1;
+    else
+      year_info[0].isleap = 0;
+
+    year_info[0].dst_first_yday = g_dst_fday;
+    year_info[0].dst_last_yday = g_dst_lday;
+  }
+
+  void dotick(int force) {
+    time_t tick = call LocalTime64.get();
+    if (force || tick >= (g_tick_local_time + 32768L*10)) {
+      signal Time.tick();
+      g_tick_local_time = tick;
+    }
+  }
+  event void Timer.fired() {
+    dotick(0);
+  }
+
+  /*  
+   * save this pending tos-2.x port of ip stack
+   *
+   event void NTPClient.timestampReceived( uint32_t *seconds, uint32_t *fraction ) {
+   g_current_time = *seconds;
+   g_local_time = call LocalTime64.get();
+   dotick(1);
+   }
+  */
+
+  struct tm __time_tm;
+
+  /* Notes:
+   * If time_t is 32 bits, then no overflow is possible.
+   * It time_t is > 32 bits, this needs to be adjusted to deal with overflow.
+   */
+
+  static const int8_t days_per_month[] = {
+    31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31, /* non-leap */
+    29,
+  };
+
+#ifdef __UCLIBC_HAS_TM_EXTENSIONS__
+  static const char utc_string[] = "UTC";
+#endif
+
+  /*
+    import time
+    for y in range(2004,2008):
+       t = time.mktime((y, 1, 1, 0, 0, 0, 0, 0, 0))-5*3600
+       print time.gmtime(t)
+    
+    (2004, 1, 1, 0, 0, 0, 3, 1, 0)
+    (2005, 1, 1, 0, 0, 0, 5, 1, 0)
+    (2006, 1, 1, 0, 0, 0, 6, 1, 0)
+    (2007, 1, 1, 0, 0, 0, 0, 1, 0)
+    from below in year_info struct for 2004-7
+    { 0x3ff36300, 3, 1 },
+    { 0x41d5e800, 5, 0 },
+    { 0x43b71b80, 6, 0 },
+    { 0x45984f00, 0, 0 }
+    
+    NTP Timestamp starts Jan 1, 1900 and is 2208988800 jan 1 1970
+    '%x' % (int(time.mktime((2004, 1, 1, 0, 0, 0, 3, 1, 0))) -18000 + 2208988800l)
+    
+    and now, 
+    
+    (2009, 1, 1, 0, 0, 0, 3, 1, 0)
+    (2010, 1, 1, 0, 0, 0, 4, 1, 0)
+    (2011, 1, 1, 0, 0, 0, 5, 1, 0)
+    (2012, 1, 1, 0, 0, 0, 6, 1, 0)
+    
+  */
+
+  struct tm *_time_t2tm(const time_t *timer, int localtime, struct tm *result)
+  {
+    uint16_t seconds16;
+    int i;
+    time_t seconds = *timer;
+    uint16_t days;
+    uint16_t hour, min;
+    int isleap = 0;
+
+    //if year_info has dst_first_yday and dst_last_yday defined, then HAVE_DST should be defined up top.
+#ifdef HAVE_DST
+    int isdst = 0;
+#endif
+
+    if (localtime) {
+      seconds -= _time_tzinfo[0].gmt_offset;
+    }
+
+    g_seconds = seconds;
+    if (seconds < year_info[0].year_seconds) {
+      memset(result, 0, sizeof(struct tm));
+      return NULL;
+    }
+    
+    if(NUM_YEARS > 1){
+      for (i = 0; i < NUM_YEARS-1; i++) {
+	if (seconds < year_info[i+1].year_seconds) {
+	  seconds -= year_info[i].year_seconds;
+	  result->tm_year = g_first_year + i;
+	  isleap = year_info[i].isleap;
+	  break;
+	}
+      }
+    }
+    else{
+      i = 0;
+      seconds -= year_info[i].year_seconds;
+      result->tm_year = g_first_year + i;
+      isleap = year_info[i].isleap;
+    }
+    g_year_seconds = year_info[i].year_seconds;
+    g_seconds_from_year = seconds;
+    days = seconds / 86400L;
+    g_days = days;
+    seconds -= days * 86400L;
+    g_seconds_from_day = seconds;
+#ifdef HAVE_DST
+    if (days >= year_info[i].dst_first_yday && 
+	days <= year_info[i].dst_last_yday) {
+      isdst = 1;
+      seconds += 3600;
+      if (seconds < 0) {
+	days--;
+	seconds += 86400L;
+      }
+      if (days < 0) {
+	result->tm_year--;
+	days += 365;
+      }
+    }
+#endif /* HAVE_DST */
+
+    result->tm_yday = days; 
+#ifdef HAVE_WDAY
+    if(NUM_YEARS > 1)
+      result->tm_wday = (result->tm_yday + year_info[i+1].wday_offset) % 7;
+    else
+      result->tm_wday = (result->tm_yday + year_info[0].wday_offset) % 7;
+#endif
+
+    for (i = 0; i < 12; i++) {
+      int8_t dpm = days_per_month[i];
+      if (i == 1 && isleap) dpm++;
+      if (days < dpm)
+	break;
+      days -= dpm;
+    }
+    result->tm_mon = i;
+    result->tm_mday = 1 + days ;
+
+    hour = seconds / 3600;
+    seconds16 = seconds - hour * 3600;
+    result->tm_hour = hour;
+    min = seconds16 / 60;
+    result->tm_sec = seconds16 - min * 60;
+    result->tm_min = min;
+    return result;
+  }
+
+  command error_t Time.gmtime(const time_t *timer, struct tm *ptm)
+  {
+
+    _time_t2tm(timer, 0, ptm); /* Can return NULL... */
+
+    return SUCCESS;
+  }
+
+  /* Note: timezone locking is done by localtime_r. */
+
+  static int tm_isdst(register const struct tm *__restrict ptm) {
+    // no DST in arizona
+    return 0;
+  }
+    
+  command error_t Time.localtime(const time_t *timer, struct tm *result)
+  {
+    _time_t2tm(timer, 1, result);
+
+    return SUCCESS;
+  }
+  static char *wday_name[] = { "Sun", "Mon", "Tues", "Wed", "Thur", "Fri", "Sat" };
+  static char *mon_name[] = { "Jan", "Feb", "Mar", "Apr", "May", "Jun", "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" };
+  command error_t Time.asctime(const struct tm *tm, char *buf, int buflen)
+  {
+    char *out = buf;
+    char *outmax = buf + buflen;
+    out += snprintf(out, outmax - out, "%02d:%02d:%02d",
+		    tm->tm_hour, tm->tm_min, tm->tm_sec);
+#ifdef HAVE_WDAY
+    out += snprintf(out, outmax - out, " %s", wday_name[tm->tm_wday]);
+#endif
+    out += snprintf(out, outmax - out, " %s %d %d",
+		    mon_name[tm->tm_mon], tm->tm_mday, tm->tm_year);
+    return SUCCESS;
+  }
+
+  command error_t Time.time(time_t *timer)
+  {
+    // 1/32768 seconds since last NTP response
+    uint64_t o = call LocalTime64.get() - g_local_time;
+
+    *timer = g_current_time + (time_t)(o >> 15);
+    
+    return SUCCESS;
+  }
+
+  default event void Time.tick() { }
+
+  /*****************************************
+   *  ParamView interface
+   * save for ip stack port to tos-2.x   
+
+  const struct Param s_Time[] = {
+    { "ntp time", PARAM_TYPE_UINT32, &g_current_time },
+    { "local time", PARAM_TYPE_UINT32, &g_local_time },
+    { NULL, 0, NULL }
+  };
+
+  struct ParamList g_TimeList = { "time", &s_Time[0] };
+
+  command error_t ParamView.init()
+  {
+    signal ParamView.add( &g_TimeList );
+    return SUCCESS;
+  }
+  *****************************************/
+
+}
diff --git a/tos/platforms/shimmer/TimeSyncMessageC.nc b/tos/platforms/shimmer/TimeSyncMessageC.nc
new file mode 100644
index 00000000..e9cb8fc8
--- /dev/null
+++ b/tos/platforms/shimmer/TimeSyncMessageC.nc
@@ -0,0 +1,95 @@
+// $Id: TimeSyncMessageC.nc,v 1.6 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *
+ * The Active Message layer on the shimmer platform. This is a naming wrapper
+ * around the CC2420 Active Message layer that implemets timesync interface (TEP 133).
+ *
+ * @author Konrad Lorincz
+ * @author Brano Kusy
+ * @date June 19 2005
+ */
+
+configuration TimeSyncMessageC {
+  provides
+  {
+    interface SplitControl;
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface LowPowerListening;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+
+    interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[am_id_t id];
+    interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+
+    interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+    interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+  }
+}
+implementation {
+  components CC2420TimeSyncMessageC as AM;
+
+  SplitControl = AM;
+
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+  LowPowerListening = AM;
+
+  TimeSyncAMSend32khz       = AM;
+  TimeSyncAMSendMilli       = AM;
+  TimeSyncPacket32khz       = AM;
+  TimeSyncPacketMilli       = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
+
diff --git a/tos/platforms/shimmer/UserButton.h b/tos/platforms/shimmer/UserButton.h
new file mode 100644
index 00000000..726d14d7
--- /dev/null
+++ b/tos/platforms/shimmer/UserButton.h
@@ -0,0 +1,44 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telosb platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+#ifndef USERBUTTON_H
+#define USERBUTTON_H
+
+typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t;
+
+#endif
diff --git a/tos/platforms/shimmer/UserButtonC.nc b/tos/platforms/shimmer/UserButtonC.nc
new file mode 100644
index 00000000..4ce334ce
--- /dev/null
+++ b/tos/platforms/shimmer/UserButtonC.nc
@@ -0,0 +1,65 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telosb platform. Get
+ * returns the current state of the button by reading the pin,
+ * regardless of whether enable() or disable() has been called on the
+ * Interface. Notify.enable() and Notify.disable() modify the
+ * underlying interrupt state of the pin, and have the effect of
+ * enabling or disabling notifications that the button has changed
+ * state.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ * port to shimmer-style
+ * @author Steve Ayer
+ * @date   February, 2010
+ */
+
+#include <UserButton.h>
+
+configuration UserButtonC {
+  provides interface Notify<button_state_t>;
+}
+implementation {
+  components HplUserButtonC;
+  components new SwitchToggleC();
+  SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt;
+  SwitchToggleC.GeneralIO -> HplUserButtonC.GeneralIO;
+
+  components UserButtonP;
+  Notify = UserButtonP;
+
+  components new TimerMilliC() as debounceTimer;
+  UserButtonP.NotifyLower -> SwitchToggleC.Notify;
+  UserButtonP.debounceTimer -> debounceTimer;
+}
diff --git a/tos/platforms/shimmer/UserButtonP.nc b/tos/platforms/shimmer/UserButtonP.nc
new file mode 100644
index 00000000..5c9ac9fd
--- /dev/null
+++ b/tos/platforms/shimmer/UserButtonP.nc
@@ -0,0 +1,74 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telosb platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $
+ * port to shimmer-style
+ * @author Steve Ayer
+ * @date   February, 2010
+ */
+
+#include <UserButton.h>
+
+module UserButtonP {
+  provides interface Notify<button_state_t>;
+
+  uses interface Notify<bool> as NotifyLower;
+  uses interface Timer<TMilli> as debounceTimer;
+}
+implementation {
+  command error_t Notify.enable() {
+    return call NotifyLower.enable();
+  }
+
+  command error_t Notify.disable() {
+    return call NotifyLower.disable();
+  }
+
+  event void debounceTimer.fired() {
+    call Notify.enable();    // re-enable interrupt
+    signal Notify.notify( BUTTON_PRESSED );
+  }
+
+  task void debounce() {
+    call debounceTimer.startOneShot(250);
+  }
+
+  event void NotifyLower.notify( bool val ) {
+    // we've only enabled interrupt from rising edge
+    post debounce();
+  }
+  
+  default event void Notify.notify( button_state_t val ) { }
+}
diff --git a/tos/platforms/shimmer/VoltageC.nc b/tos/platforms/shimmer/VoltageC.nc
new file mode 100644
index 00000000..1dc5c4af
--- /dev/null
+++ b/tos/platforms/shimmer/VoltageC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-05-21 22:07:24 $
+ */
+
+generic configuration VoltageC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  Read = Msp430InternalVoltageC.Read;
+}
+
diff --git a/tos/platforms/shimmer/VoltageStreamC.nc b/tos/platforms/shimmer/VoltageStreamC.nc
new file mode 100644
index 00000000..65282bbb
--- /dev/null
+++ b/tos/platforms/shimmer/VoltageStreamC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-06-24 22:25:57 $
+ */
+
+generic configuration VoltageStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  ReadStream = Msp430InternalVoltageC.ReadStream;
+}
+
diff --git a/tos/platforms/shimmer/chips/bluetooth/Bluetooth.nc b/tos/platforms/shimmer/chips/bluetooth/Bluetooth.nc
new file mode 100644
index 00000000..3612e0b4
--- /dev/null
+++ b/tos/platforms/shimmer/chips/bluetooth/Bluetooth.nc
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2007, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  Authors:  Steve Ayer, Adrian Burns
+ *            February, 2007
+ */
+/**
+ * @author Steve Ayer
+ * @author Adrian Burns
+ * @date February, 2007
+ *
+ * @author Mike Healy
+ * @date April 20, 2009 - ported to TinyOS 2.x 
+ */
+
+
+
+#include "RovingNetworks.h"
+
+interface Bluetooth {
+
+   /* write SPP (Serial Port Profile) data to the connected BT device */
+  // note: max message length is 128 bytes, beyond that msg_append_buf wraps
+   command error_t write(const uint8_t *buf, uint8_t len);
+
+   /* after this command is called there will be no link to the connected device */
+   command error_t disconnect();
+
+   /* commands useful for Master(client) applications only */
+   /* do an BT Inquiry to discover all listening devices within range */
+   command void discoverDevices();
+
+   /* connect to a specific device that was previously discovered */
+   command error_t connect(uint8_t * addr);
+
+   // enum SLAVE_MODE, MASTER_MODE, TRIGGER_MASTER_MODE, AUTO_MASTER_MODE
+   command void setRadioMode(uint8_t mode);           
+
+   command void setDiscoverable(bool disc);
+   command void setEncryption(bool enc);
+   command void setAuthentication(bool auth);
+   command void setName(char * name);                  // max 16 chars
+   command void setPIN(char * name);                   // max 16 chars
+   command void setServiceClass(char * class);         // max 4 chars (hex word)
+   command void setServiceName(char * name);         // max 16 chars 
+   command void setDeviceClass(char * class);         // max 4 chars (hex word)
+   command void disableRemoteConfig(bool disableConfig);
+   /*
+    * rate_factor is baudrate * 0.004096, e.g. to set 115200, pass in "472"
+    */
+   command void setRawBaudrate(char * rate_factor);      // max 4 chars, must be integer
+
+   /* 
+    * provide one of the following as a string argument:  
+    * { 1200, 2400, 4800, 9600, 19.2, 38.4, 57.6, 115K, 230K, 460K, 921K } 
+    */
+   command void setBaudrate(char * new_baud); 
+
+   /* save power by minimising time Inquiry/Page scanning, call these commands from */
+   /* your StdControl.init() - module reset necessary for changes to take effect */
+   command void setPagingTime(char * hexval_time); // max 4 chars (hex word)
+   command void setInquiryTime(char * hexval_time); // max 4 chars (hex word)
+   command void resetDefaults();
+
+   /* whether or not it succeeded */
+   async event void connectionMade(uint8_t status);
+   async event void connectionClosed(uint8_t reason);
+   async event void commandModeEnded();
+   /*
+    * buffered data depends upon line demarcation or eot for this...
+    *     event void dataAvailable(uint8_t * data, uint16_t len);
+    * and this...
+    *    event void discoveryStatus(uint8_t * devices);
+    *
+    */
+   async event void dataAvailable(uint8_t data);
+   event void writeDone();
+}
+
+
diff --git a/tos/platforms/shimmer/chips/bluetooth/RovingNetworks.h b/tos/platforms/shimmer/chips/bluetooth/RovingNetworks.h
new file mode 100644
index 00000000..5a7d82dd
--- /dev/null
+++ b/tos/platforms/shimmer/chips/bluetooth/RovingNetworks.h
@@ -0,0 +1,32 @@
+/* radioMode in enableBluetooth() can be set to one of the following modes,
+ see the RovingNetworks AT command set for further details on module configuration */
+
+#ifndef ROVINGNETWORKS_H
+#define ROVINGNETWORKS_H
+enum {
+  SLAVE_MODE,
+  MASTER_MODE,
+  TRIGGER_MASTER_MODE,
+  AUTO_MASTER_MODE    
+};
+
+enum { 
+  NADA,
+  INITIAL,
+  FINAL
+};
+/*
+const char * SETMODE =  "SM,";
+const char * SETMASTERMODE =  "SM,1";
+const char * SETSLAVEMODE =   "SM,0";
+const char * DISCOVERRADIOS = "I,";
+const char * DISCOVERRADIOS2 = ",0";
+
+const char * SETFASTBAUD    = "SU,115";
+const char * ENTERCOMMANDMODE = "$$$";
+const char * SETSLEEPMODE   = "SW,0300";
+const char * DIALRADIO      = "C,";
+const char * HANGUPRADIO    = "R,1";
+const char * WAKERADIO      = "";
+*/
+#endif
diff --git a/tos/platforms/shimmer/chips/bluetooth/RovingNetworksC.nc b/tos/platforms/shimmer/chips/bluetooth/RovingNetworksC.nc
new file mode 100644
index 00000000..046b12ae
--- /dev/null
+++ b/tos/platforms/shimmer/chips/bluetooth/RovingNetworksC.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2007, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  Author:  Steve Ayer
+ *           February, 2007
+ */
+/**
+ * @author Steve Ayer
+ * @author Adrian Burns
+ * @date February, 2007
+ *
+ * @author Mike Healy
+ * @date April 20, 2009 - ported to TinyOS 2.x 
+ */
+
+
+
+configuration RovingNetworksC {
+   provides {
+      interface StdControl;
+      interface Bluetooth;
+      interface Init;
+   }
+}
+implementation {
+   components 
+     RovingNetworksP,
+     MainC,
+     HplMsp430InterruptC,  
+     HplMsp430Usart1C,     
+     LedsC;
+
+   StdControl = RovingNetworksP;
+   Bluetooth = RovingNetworksP;
+   Init = RovingNetworksP;
+
+   RovingNetworksP.UARTControl            -> HplMsp430Usart1C.HplMsp430Usart;
+   RovingNetworksP.UARTData               -> HplMsp430Usart1C.HplMsp430UsartInterrupts;
+   RovingNetworksP.RTSInterrupt           -> HplMsp430InterruptC.Port16;
+   RovingNetworksP.ConnectionInterrupt    -> HplMsp430InterruptC.Port15;
+   RovingNetworksP.Leds                   -> LedsC;
+
+}
diff --git a/tos/platforms/shimmer/chips/bluetooth/RovingNetworksP.nc b/tos/platforms/shimmer/chips/bluetooth/RovingNetworksP.nc
new file mode 100644
index 00000000..f1db6991
--- /dev/null
+++ b/tos/platforms/shimmer/chips/bluetooth/RovingNetworksP.nc
@@ -0,0 +1,643 @@
+/*
+ * Copyright (c) 2007, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  Author:  Steve Ayer
+ *           February, 2007
+ */
+/**
+ * @author Steve Ayer
+ * @author Adrian Burns
+ * @date February, 2007
+ *
+ * @author Mike Healy
+ * @date April 20, 2009 - ported to TinyOS 2.x 
+ */
+
+
+#include "RovingNetworks.h"
+#include "shimmerMessage.h"
+
+module RovingNetworksP {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface Bluetooth;
+  }
+  uses {
+    interface HplMsp430Usart as UARTControl;
+    interface HplMsp430UsartInterrupts as UARTData;
+    interface HplMsp430Interrupt as RTSInterrupt;
+    interface HplMsp430Interrupt as ConnectionInterrupt;
+
+    interface Leds;
+  }
+}
+
+implementation {
+  extern int sprintf(char *str, const char *format, ...) __attribute__ ((C));
+  extern int snprintf(char *str, size_t len, const char *format, ...) __attribute__ ((C));
+
+  uint8_t radioMode, charsSent, setupStep;
+  bool discoverable, authenticate, encrypt, setNameRequest, setPINRequest, runDiscoveryRequest, resetDefaultsRequest,
+    setSvcClassRequest, setDevClassRequest, setSvcNameRequest, setRawBaudrate, setBaudrate, disableRemoteConfig, newMode,
+    setCustomInquiryTime, setCustomPagingTime;
+
+  /* master mode stuff */
+  int masterStep;
+  bool deviceConn, btConnected, runningMasterCommands;
+  char targetBt[16];
+
+  norace bool transmissionOverflow, messageInProgress;
+  char expectedCommandResponse[8], newName[17], newPIN[17], newSvcClass[5], newDevClass[5], newSvcName[17], newRawBaudrate[5],
+    newBaudrate[5], newInquiryTime[5], newPagingTime[5];
+  
+  norace struct Message outgoingMsg;
+  norace struct Message incomingMsg;
+
+  task void sendNextChar() {
+    if(charsSent < outgoingMsg.length) {
+      call UARTControl.tx(msg_get_uint8(&outgoingMsg, charsSent));
+      atomic charsSent++;
+    } 
+    else{
+      messageInProgress = FALSE;
+      atomic if(!*expectedCommandResponse)
+	signal Bluetooth.writeDone();
+    }	    
+  }
+  
+  // note max message length is 128 bytes, beyond that msg_append_buf wraps
+  command error_t Bluetooth.write(const uint8_t * buf, uint8_t len) { 
+    if(messageInProgress)
+      return FAIL;
+
+    messageInProgress = TRUE;
+    atomic charsSent = 0;
+    msg_clear(&outgoingMsg);
+    msg_append_buf(&outgoingMsg, buf, len);
+
+    if(!transmissionOverflow){
+      post sendNextChar();
+    }
+	
+    return SUCCESS;
+  }
+    
+  void initRN() {
+    register uint16_t i;
+    /*
+     * powerup state is reset == low (true); mike conrad of roving networks sez: 
+     * wait about 1/2 s after reset toggle
+     */
+    TOSH_SET_BT_RESET_PIN();    
+    for(i = 0; i< 400; i++)
+      TOSH_uwait(5000);
+
+    TOSH_MAKE_BT_PIO_INPUT();   // this is the connection interrupt pin, was default output
+    
+    call RTSInterrupt.edge(TRUE);  // initially, we look for a connection
+    call RTSInterrupt.enable();  // request to send raises when bt has trans overflow
+    call RTSInterrupt.clear();
+    
+    call ConnectionInterrupt.edge(TRUE);  // initially, we look for a connection
+    call ConnectionInterrupt.clear();
+    call ConnectionInterrupt.enable();  // interrupt upon connection state change (raises when connected, falls when dropped)
+
+    TOSH_CLR_BT_CTS_PIN();     // toggling cts wakes it up
+    TOSH_SET_BT_CTS_PIN();     
+    TOSH_uwait(5000);
+    TOSH_CLR_BT_CTS_PIN();     // tell bt module msp430 is ready
+  }
+
+  void setupUART() {
+    msp430_uart_union_config_t RN_uart_config = { {ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, 
+						   ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1,listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 0, 
+						   urxwie: 0, utxe : 1, urxe :1} };
+
+    call UARTControl.setModeUart(&RN_uart_config); // set to UART mode
+
+#ifdef USE_8MHZ_CRYSTAL           // we need exact divisors, else the thing acts unpredictably
+    call UARTControl.setUbr(0x08);
+    call UARTControl.setUmctl(0xee);
+
+#endif
+
+    /*
+     * to run the bt module at 230k, first the application must configure it
+     * using its default uart speed of 115200, then reset the uart to 230k here
+     * see accompanying bluetoothBaudrateConfiguration.pdf doc for details
+     * yes, doc is written for tos-1.x, but setClockRate() is just broken into
+     * two calls here in tos-2.x
+     *
+     call UARTControl.setUbr(0x04);
+     call UARTControl.setUmctl(0x82);
+    */
+    
+    call UARTControl.enableTxIntr();
+    call UARTControl.enableRxIntr();
+  }
+
+  void disableRN() {
+    TOSH_CLR_BT_RESET_PIN();
+    call UARTControl.disableUart();
+    call RTSInterrupt.disable();  
+    call ConnectionInterrupt.disable();  
+  }
+
+  error_t writeCommand(char * cmd, char * response) {
+    atomic strcpy(expectedCommandResponse, response);
+    if(call Bluetooth.write(cmd, strlen(cmd)) == FAIL)
+      return FAIL;
+
+    return SUCCESS;
+  }
+
+  /* 
+   * Connect and Disconnect commands are exceptional commands in that 
+   * they automatically return to data mode once they are issued 
+   */
+  error_t writeCommandNoRsp(char * cmd) {
+    if(call Bluetooth.write(cmd, strlen(cmd)) == FAIL)
+      return FAIL;
+
+    return SUCCESS;
+  }
+
+  command void Bluetooth.setRadioMode(uint8_t mode){
+    newMode = TRUE;
+    radioMode = mode;
+  }    
+
+  command void Bluetooth.setDiscoverable(bool disc){
+    discoverable = disc;  
+  }    
+
+  command void Bluetooth.setEncryption(bool enc){
+    encrypt = enc; 
+  }    
+
+  command void Bluetooth.setAuthentication(bool auth){
+    authenticate = auth;
+  }    
+
+  command void Bluetooth.disableRemoteConfig(bool disableConfig){
+    disableRemoteConfig = disableConfig;
+  }    
+
+  command void Bluetooth.resetDefaults(){
+    resetDefaultsRequest = TRUE;
+  }    
+
+  command void Bluetooth.setName(char * name){
+    setNameRequest = TRUE;
+    snprintf(newName, 17, "%s", name);
+  }    
+
+  command void Bluetooth.setDeviceClass(char * class){
+    setDevClassRequest = TRUE;
+    snprintf(newDevClass, 5, "%s", class);
+  }    
+
+  command void Bluetooth.setServiceClass(char * class){
+    setSvcClassRequest = TRUE;
+    snprintf(newSvcClass, 5, "%s", class);
+  }    
+
+  command void Bluetooth.setServiceName(char * name){
+    setSvcNameRequest = TRUE;
+    snprintf(newSvcName, 5, "%s", name);
+  }    
+
+  /* 
+   * this one makes sense only to roving networks
+   * the supplied "rate_factor" is the baudrate * 0.004096
+   * this factor must be an integer value...
+   */
+  command void Bluetooth.setRawBaudrate(char * rate_factor){
+    setRawBaudrate = TRUE;
+    snprintf(newRawBaudrate, 5, "%s", rate_factor);
+  }    
+
+  /* 
+   * to set the baudrate of the BT to MSP serial interface 
+   * as per RovingNetworks command spec EG "SU,96" or "SU,230"
+   * SU,<rate> - Baudrate, {1200, 2400, 4800, 9600, 19.2, 
+   * 38.4, 57.6, 115K, 230K, 460K, 921K },
+   * BUT, the MSP USARTS will not run at > 230K in UART mode, 
+   * see MSP user guide
+   */
+  command void Bluetooth.setBaudrate(char * new_baud){
+    setBaudrate = TRUE;
+    snprintf(newBaudrate, 5, "%s", new_baud);
+  }    
+
+  command void Bluetooth.setPIN(char * PIN){
+    setPINRequest = TRUE;
+    snprintf(newPIN, 17, "%s", PIN);
+  }    
+
+  /* 
+   * Sets the Inquiry Scan Window - amount of time device 
+   * spends enabling inquiry scan (discoverability).
+   * Minimum = (hex word) "0012", corresponding to about 1% duty cycle.
+   * Maximum = (hex word) "1000"
+   */
+  command void Bluetooth.setInquiryTime(char * hexval_time){
+    setCustomInquiryTime = TRUE;
+    snprintf(newInquiryTime, 5, "%s", hexval_time);
+  }    
+
+  /* 
+   * Sets the Paging Scan Window - amount of time device 
+   * spends enabling page scan (connectability).
+   * Minimum = (hex word) "0012", corresponding to about 1% duty cycle.
+   * Maximum = (hex word) "1000"
+   */
+  command void Bluetooth.setPagingTime(char * hexval_time){
+    setCustomPagingTime = TRUE;
+    snprintf(newPagingTime, 5, "%s", hexval_time);
+  }    
+
+  /* 
+   * IMPORTANT: Connect and Disconnect commands are exceptional commands 
+   * in that they automatically return to data mode once they are issued
+   * so no response and no "---" needed to return to data mode 
+   */
+  task void runMasterCommands()
+  {
+    char commandbuf[32];
+    switch(masterStep){
+    case 0:
+      masterStep++;
+      writeCommand("$$$", "CMD");
+      break;
+    case 1:
+      masterStep++;
+      // Connect
+      if(deviceConn && (!btConnected)){
+	masterStep = -1;
+	sprintf(commandbuf, "C,%s\r", targetBt);
+	writeCommandNoRsp(commandbuf);
+	runningMasterCommands = FALSE;
+	break;
+      }
+    case 2:
+      masterStep++;
+      // Disconnect
+      if((!deviceConn) && (btConnected)) {
+	masterStep = -1;
+	writeCommandNoRsp("K,\r");
+	runningMasterCommands = FALSE;          
+	break;
+      }
+    case 3:
+      /* not needed for connect and disconnect commands */
+      masterStep++;
+      // exit command mode
+      writeCommand("---\r", "END");
+      break;
+    default:
+      deviceConn = FALSE;
+      runningMasterCommands = FALSE;
+      break;
+    }
+  }
+
+  command error_t Bluetooth.connect(uint8_t *addr)
+  {
+    masterStep = 0;
+    deviceConn = runningMasterCommands = TRUE;
+    strcpy(targetBt, addr);
+    post runMasterCommands();
+    return SUCCESS;
+  }
+
+  command error_t Bluetooth.disconnect()
+  {
+    register uint16_t i;
+    /*
+     * Delay: If any bytes are seen before or after $$$ in a 1 
+     * second window, command mode will not be entered and these 
+     * bytes will be passed on to other side 
+     */
+    for(i = 0; i < 1600 ; i++)
+      TOSH_uwait(5000);
+
+    masterStep = 0;
+    deviceConn = FALSE;
+    runningMasterCommands = TRUE;
+    post runMasterCommands();
+    
+    return SUCCESS;
+  }
+
+  /*
+   * this one is weird.  we need to do one at a time; the only way
+   * to get back is if the previous command responds properly and calls
+   * back to runSetCommands().  so if we get into command mode, each time here 
+   * we have to send another command.  we keep falling down the switch 
+   * until we find it, eventually hitting end.
+   */
+  task void runSetCommands() {
+    char commandbuf[32];
+
+    switch(setupStep) {
+    case 0:
+      setupStep++;
+      writeCommand("$$$", "CMD");
+      break;
+    case 1:
+      setupStep++;
+      // reset factory defaults
+      if(resetDefaultsRequest){
+	writeCommand("SF,1\r", "AOK");
+	break;
+      }
+    case 2:
+      setupStep++;
+      // default is slave (== 0), otherwise set mode
+      if(newMode){
+	sprintf(commandbuf, "SM,%d\r", radioMode);
+	writeCommand(commandbuf, "AOK");
+	break;
+      }
+    case 3:
+      setupStep++;
+      /*
+       * device is discoverable with a non-zero inquiry scan window
+       * default "time" is 0x0200 (units unspecified)
+       */
+      if(!discoverable){
+	writeCommand("SI,0000\r", "AOK");
+	break;
+      }
+    case 4:
+      setupStep++;
+      // device default is off
+      if(authenticate){
+	writeCommand("SA,1\r", "AOK");
+	break;
+      }
+    case 5:
+      setupStep++;
+      // device default is off
+      if(encrypt){
+	writeCommand("SE,1\r", "AOK");
+	break;
+      }
+    case 6:
+      setupStep++;
+      // default is none
+      if(setNameRequest){
+	sprintf(commandbuf, "SN,%s\r", newName);
+	writeCommand(commandbuf, "AOK");
+	break;
+      }
+    case 7:
+      setupStep++;
+      // default is none
+      if(setPINRequest){
+	sprintf(commandbuf, "SP,%s\r", newPIN);
+	writeCommand(commandbuf, "AOK");
+	break;
+      }
+    case 8:
+      setupStep++;
+      if(setSvcClassRequest){
+	sprintf(commandbuf, "SC,%s\r", newSvcClass);
+	writeCommand(commandbuf, "AOK");
+	break;
+      }
+    case 9:
+      setupStep++;
+      if(setDevClassRequest){
+	sprintf(commandbuf, "SD,%s\r", newDevClass);
+	writeCommand(commandbuf, "AOK");
+	break;
+      }
+    case 10:
+      setupStep++;
+      if(setSvcNameRequest){
+	sprintf(commandbuf, "SS,%s\r", newSvcName);
+	writeCommand(commandbuf, "AOK");
+	break;
+      }
+    case 11:
+      setupStep++;
+      if(setRawBaudrate){
+	// set the baudrate to suit the MSP430 running at 8Mhz
+	sprintf(commandbuf, "SZ,%s\r", newRawBaudrate);
+	writeCommand(commandbuf, "AOK");
+	break;
+      }
+    case 12:
+      setupStep++;
+      if(disableRemoteConfig){
+	// disable remote configuration to enhance throughput
+	writeCommand("ST,0\r", "AOK");
+      }
+      else{
+	// disable remote configuration to enhance throughput
+	writeCommand("ST,60\r", "AOK");
+      }
+      break;
+    case 13:
+      setupStep++;
+      if(setCustomInquiryTime){
+	sprintf(commandbuf, "SI,%s\r", newInquiryTime);
+	writeCommand(commandbuf, "AOK");
+      }
+      else{
+	// to save power only leave inquiry on for approx 40msec (every 1.28 secs)
+	writeCommand("SI,0040\r", "AOK");
+      }
+      break;
+    case 14:
+      setupStep++;
+      if(setCustomPagingTime){
+	sprintf(commandbuf, "SJ,%s\r", newPagingTime);
+	writeCommand(commandbuf, "AOK");
+      }
+      else{
+	// to save power only leave paging on for approx 80msec (every 1.28 secs)
+	writeCommand("SJ,0080\r", "AOK");
+      }
+      break;
+    case 15:
+      setupStep++;
+      if(setBaudrate){
+        // set the baudrate to suit the MSP430 running at 8Mhz
+        sprintf(commandbuf, "SU,%s\r", newBaudrate);
+        writeCommand(commandbuf, "AOK");
+        break;
+      }
+
+    case 16:
+      setupStep++;
+      // exit command mode
+      writeCommand("---\r", "END");
+      break;
+    default:
+      break;
+    }
+  }  
+
+  command error_t Init.init(){
+    TOSH_MAKE_BT_RTS_INPUT();      
+    
+    TOSH_MAKE_BT_RXD_INPUT();
+    TOSH_SEL_BT_RXD_MODFUNC();
+    
+    // this powers it up on models so equipped, otherwise harmless 
+#ifdef BT_PWR_LOGIC_TRUE
+    TOSH_SET_SW_BT_PWR_N_PIN();
+#else	
+    TOSH_CLR_SW_BT_PWR_N_PIN();   
+#endif
+    
+    newMode = FALSE;
+    radioMode = SLAVE_MODE;   
+    discoverable = TRUE;
+    authenticate = FALSE;
+    encrypt = FALSE;
+    resetDefaultsRequest = FALSE;
+    setNameRequest = FALSE;
+    setPINRequest = FALSE;
+    setSvcClassRequest = FALSE;
+    setSvcNameRequest = FALSE;
+    setDevClassRequest = FALSE;
+    setRawBaudrate = FALSE;
+    disableRemoteConfig = FALSE;
+    setCustomInquiryTime = FALSE;
+    setCustomPagingTime = FALSE;
+    setBaudrate = FALSE;
+
+    /* connect/disconnect commands */
+    deviceConn = btConnected = runningMasterCommands = FALSE;
+    masterStep = setupStep = 0;
+
+    atomic *expectedCommandResponse = 0;   // NULL pointer
+    transmissionOverflow = FALSE, messageInProgress = FALSE;
+
+    initRN();
+    
+    setupUART();
+
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start(){
+    TOSH_uwait(15000);
+    post runSetCommands();
+
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop(){
+    disableRN();
+    
+#ifdef BT_PWR_LOGIC_TRUE
+    TOSH_CLR_SW_BT_PWR_N_PIN();
+#else	
+    TOSH_SET_SW_BT_PWR_N_PIN();   
+#endif
+    
+    return SUCCESS;
+  }
+
+  /* commands useful for Master(client) applications only */
+  /* do an BT Inquiry to discover all listening devices within range */
+  command void Bluetooth.discoverDevices() {
+    if(!radioMode)     // we're a slave, shouldn't do this
+      return;
+
+    runDiscoveryRequest = TRUE;
+  }    
+
+  async event void UARTData.rxDone(uint8_t data) {        
+    if(!*expectedCommandResponse){
+      signal Bluetooth.dataAvailable(data);
+    }
+    else{
+      if(isalpha(data)){
+	msg_append_uint8(&incomingMsg, data);
+	if(msg_cmp_buf(&incomingMsg,            // which is affirmative
+		       0, 
+		       expectedCommandResponse,
+		       strlen(expectedCommandResponse))){
+	  msg_clear(&incomingMsg);	
+	  if(!strcmp(expectedCommandResponse, "END"))
+	    signal Bluetooth.commandModeEnded();  //call Leds.greenOn();
+	  else if(runningMasterCommands)  
+	    post runMasterCommands();
+	  else
+	    post runSetCommands();
+	  atomic *expectedCommandResponse = '\0';
+	}
+      }
+      else
+	msg_clear(&incomingMsg);
+    }
+  }
+
+  async event void UARTData.txDone() {
+    if (!transmissionOverflow) {
+      post sendNextChar();
+    }
+  }
+    
+  // Interrupt associated with radio flow control.  Ensures that there are no buffer overflows.
+  async event void RTSInterrupt.fired() {
+    if (call RTSInterrupt.getValue() == TRUE) {
+      transmissionOverflow = 1;
+      call RTSInterrupt.edge(FALSE);
+    } 
+    else{
+      atomic transmissionOverflow = 0;
+      post sendNextChar();
+      call RTSInterrupt.edge(TRUE);
+    }
+    atomic call RTSInterrupt.clear();
+  }
+  
+  async event void ConnectionInterrupt.fired() {
+    if(call ConnectionInterrupt.getValue() == TRUE){
+      btConnected = TRUE;
+      call ConnectionInterrupt.edge(FALSE);
+      signal Bluetooth.connectionMade(SUCCESS);
+    }
+    else{
+      btConnected = FALSE;
+      call ConnectionInterrupt.edge(TRUE);
+      signal Bluetooth.connectionClosed(0);
+    }
+    atomic call ConnectionInterrupt.clear();
+  }
+}
diff --git a/tos/platforms/shimmer/chips/bluetooth/bluetoothBaudrateConversion.pdf b/tos/platforms/shimmer/chips/bluetooth/bluetoothBaudrateConversion.pdf
new file mode 100644
index 00000000..f029e149
Binary files /dev/null and b/tos/platforms/shimmer/chips/bluetooth/bluetoothBaudrateConversion.pdf differ
diff --git a/tos/platforms/shimmer/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/shimmer/chips/cc2420/HplCC2420AlarmC.nc
new file mode 100644
index 00000000..92027af0
--- /dev/null
+++ b/tos/platforms/shimmer/chips/cc2420/HplCC2420AlarmC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of 32khz alarms for the ChipCon CC2420 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-05-21 22:07:24 $
+ */
+
+generic configuration HplCC2420AlarmC() {
+
+  provides interface Init;
+  provides interface Alarm<T32khz,uint32_t> as Alarm32khz32;
+
+}
+
+implementation {
+
+  components new Alarm32khz32C();
+
+  Init = Alarm32khz32C;
+  Alarm32khz32 = Alarm32khz32C;
+  
+}
diff --git a/tos/platforms/shimmer/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/shimmer/chips/cc2420/HplCC2420InterruptsC.nc
new file mode 100644
index 00000000..8c52443a
--- /dev/null
+++ b/tos/platforms/shimmer/chips/cc2420/HplCC2420InterruptsC.nc
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of interrupts and captures for the ChipCon
+ * CC2420 radio connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-05-21 22:07:25 $
+ */
+/**
+ * Ported to the SHIMMER platform. 
+ *
+ * @author Konrad Lorincz
+ * @date May 14, 2008
+ */
+
+configuration HplCC2420InterruptsC {
+
+  provides interface GpioCapture as CaptureSFD;
+  provides interface GpioInterrupt as InterruptCCA;
+  provides interface GpioInterrupt as InterruptFIFOP;
+
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components Msp430TimerC;
+  components new GpioCaptureC() as CaptureSFDC;
+  CaptureSFDC.Msp430TimerControl -> Msp430TimerC.ControlA1;
+  CaptureSFDC.Msp430Capture -> Msp430TimerC.CaptureA1;
+  CaptureSFDC.GeneralIO -> GeneralIOC.Port12;
+
+  components HplMsp430InterruptC;
+  components new Msp430InterruptC() as InterruptCCAC;
+  components new Msp430InterruptC() as InterruptFIFOPC;
+  InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port27;
+  InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port26;
+
+  CaptureSFD = CaptureSFDC.Capture;
+  InterruptCCA = InterruptCCAC.Interrupt;
+  InterruptFIFOP = InterruptFIFOPC.Interrupt;
+}
diff --git a/tos/platforms/shimmer/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/shimmer/chips/cc2420/HplCC2420PinsC.nc
new file mode 100644
index 00000000..597c015b
--- /dev/null
+++ b/tos/platforms/shimmer/chips/cc2420/HplCC2420PinsC.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of general-purpose I/O for the ChipCon CC2420
+ * radio connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-05-21 22:07:25 $
+ */
+/**
+ * Ported to the SHIMMER platform. 
+ *
+ * @author Konrad Lorincz
+ * @date May 14, 2008
+ */
+
+configuration HplCC2420PinsC {
+
+  provides interface GeneralIO as CCA;
+  provides interface GeneralIO as CSN;
+  provides interface GeneralIO as FIFO;
+  provides interface GeneralIO as FIFOP;
+  provides interface GeneralIO as RSTN;
+  provides interface GeneralIO as SFD;
+  provides interface GeneralIO as VREN;
+
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components new Msp430GpioC() as CCAM;
+  components new Msp430GpioC() as CSNM;
+  components new Msp430GpioC() as FIFOM;
+  components new Msp430GpioC() as FIFOPM;
+  components new Msp430GpioC() as RSTNM;
+  components new Msp430GpioC() as SFDM;
+  components new Msp430GpioC() as VRENM;
+
+  CCAM -> GeneralIOC.Port27;
+  CSNM -> GeneralIOC.Port54;
+  FIFOM -> GeneralIOC.Port10;
+  FIFOPM -> GeneralIOC.Port26;
+  RSTNM -> GeneralIOC.Port57;
+  SFDM -> GeneralIOC.Port12;
+  VRENM -> GeneralIOC.Port56;
+
+  CCA = CCAM;
+  CSN = CSNM;
+  FIFO = FIFOM;
+  FIFOP = FIFOPM;
+  RSTN = RSTNM;
+  SFD = SFDM;
+  VREN = VRENM;
+  
+}
+
diff --git a/tos/platforms/shimmer/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/shimmer/chips/cc2420/HplCC2420SpiC.nc
new file mode 100644
index 00000000..d98c31f0
--- /dev/null
+++ b/tos/platforms/shimmer/chips/cc2420/HplCC2420SpiC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of the SPI bus for the ChipCon CC2420 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-05-21 22:07:25 $
+ */
+/**
+ * Ported to the SHIMMER platform. 
+ *
+ * @author Konrad Lorincz
+ */
+
+generic configuration HplCC2420SpiC() {
+  
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+  
+}
+
+implementation {
+
+  components new Msp430Spi1C() as SpiC;
+  
+  Resource = SpiC;
+  SpiByte = SpiC;
+  SpiPacket = SpiC;
+  
+}
+
diff --git a/tos/platforms/shimmer/chips/ds2411/DallasId48ToIeeeEui64C.nc b/tos/platforms/shimmer/chips/ds2411/DallasId48ToIeeeEui64C.nc
new file mode 100644
index 00000000..159957c4
--- /dev/null
+++ b/tos/platforms/shimmer/chips/ds2411/DallasId48ToIeeeEui64C.nc
@@ -0,0 +1,29 @@
+
+#include "PlatformIeeeEui64.h"
+
+module DallasId48ToIeeeEui64C {
+  provides interface LocalIeeeEui64;
+  uses interface IDChip;
+} implementation {
+  command ieee_eui64_t LocalIeeeEui64.getId() {
+    uint8_t id[6];
+    ieee_eui64_t eui;
+    call IDChip.read(id);
+
+    eui.data[0] = IEEE_EUI64_COMPANY_ID_0;
+    eui.data[1] = IEEE_EUI64_COMPANY_ID_1;
+    eui.data[2] = IEEE_EUI64_COMPANY_ID_2;
+
+    // 16 bits of the ID is generated by software
+    // could be used for hardware model id and revision, for example
+    eui.data[3] = IEEE_EUI64_SERIAL_ID_0;
+    eui.data[4] = IEEE_EUI64_SERIAL_ID_1;
+
+    // 24 least significant bits of the serial ID read from the DS2401
+    eui.data[5] = id[3];
+    eui.data[6] = id[4];
+    eui.data[7] = id[5];
+
+    return eui;
+  }
+}
diff --git a/tos/platforms/shimmer/chips/ds2411/HplDs2411C.nc b/tos/platforms/shimmer/chips/ds2411/HplDs2411C.nc
new file mode 100644
index 00000000..34bc0a81
--- /dev/null
+++ b/tos/platforms/shimmer/chips/ds2411/HplDs2411C.nc
@@ -0,0 +1,217 @@
+//$Id: HplDs2411C.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+
+/*
+  
+The 1-wire timings suggested by the DS2411 data sheet are incorrect,
+incomplete, or unclear.  The timings provided the app note 522 work:
+
+http://www.maxim-ic.com/appnotes.cfm/appnote_number/522
+    
+*/
+
+/*
+  This is a stripped version of the DS2411 driver modified for our network stack.
+  Instead of a nice abstraction layer, we rely on TOSH_ASSIGN_PIN(ONEWIRE) in the
+  hardware.h file to set up the appropriate pin for communications.
+
+  Andrew Christian <andrew.christian@hp.com>
+  June 2005
+  
+  * "ported" to tinyos-2.x
+  * @author Steve Ayer
+  * @date   March, 2010
+  */
+
+module HplDs2411C
+{
+  provides interface IDChip;
+}
+implementation
+{
+  enum
+  {
+    STD_A = 6,
+    STD_B = 64,
+    STD_C = 60,
+    STD_D = 10,
+    STD_E = 9,
+    STD_F = 55,
+    STD_G = 0,
+    STD_H = 480,
+    STD_I = 90,
+    STD_J = 220,
+  };
+
+  void init_pins()
+  {
+#ifdef ID_CHIP_POWER
+    TOSH_SET_ONEWIRE_POWER_PIN();    
+    TOSH_MAKE_ONEWIRE_POWER_OUTPUT();
+#endif
+
+    TOSH_SEL_ONEWIRE_IOFUNC();
+    TOSH_MAKE_ONEWIRE_INPUT();
+    TOSH_CLR_ONEWIRE_PIN();
+  }
+
+  void clear_pins()
+  {
+#ifdef TOSH_SET_ONEWIRE_POWER_PIN
+    TOSH_CLR_ONEWIRE_POWER_OUTPUT();
+#endif
+    // Don't need to fix ONEWIRE...it finishes as an INPUT
+  }
+
+  bool reset() // >= 960us
+  {
+    int present;
+    TOSH_MAKE_ONEWIRE_OUTPUT();
+    TOSH_uwait(STD_H); //t_RSTL
+    TOSH_MAKE_ONEWIRE_INPUT();
+    TOSH_uwait(STD_I);  //t_MSP
+    present = TOSH_READ_ONEWIRE_PIN();
+    TOSH_uwait(STD_J);  //t_REC
+    return (present == 0);
+  }
+
+  void write_bit_one() // >= 70us
+  {
+    TOSH_MAKE_ONEWIRE_OUTPUT();
+    TOSH_uwait(STD_A);  //t_W1L
+    TOSH_MAKE_ONEWIRE_INPUT();
+    TOSH_uwait(STD_B);  //t_SLOT - t_W1L
+  }
+
+  void write_bit_zero() // >= 70us
+  {
+    TOSH_MAKE_ONEWIRE_OUTPUT();
+    TOSH_uwait(STD_C);  //t_W0L
+    TOSH_MAKE_ONEWIRE_INPUT();
+    TOSH_uwait(STD_D);  //t_SLOT - t_W0L
+  }
+
+  void write_bit( int is_one ) // >= 70us
+  {
+    if(is_one)
+      write_bit_one();
+    else
+      write_bit_zero();
+  }
+
+  bool read_bit() // >= 70us
+  {
+    int bit;
+    TOSH_MAKE_ONEWIRE_OUTPUT();
+    TOSH_uwait(STD_A);  //t_RL
+    TOSH_MAKE_ONEWIRE_INPUT();
+    TOSH_uwait(STD_E); //near-max t_MSR
+    bit = TOSH_READ_ONEWIRE_PIN();
+    TOSH_uwait(STD_F);  //t_REC
+    return bit;
+  }
+
+  void write_byte( uint8_t byte ) // >= 560us
+  {
+    uint8_t bit;
+    for( bit=0x01; bit!=0; bit<<=1 )
+      write_bit( byte & bit );
+  }
+
+  uint8_t read_byte() // >= 560us
+  {
+    uint8_t byte = 0;
+    uint8_t bit;
+    for( bit=0x01; bit!=0; bit<<=1 )
+    {
+      if( read_bit() )
+	byte |= bit;
+    }
+    return byte;
+  }
+
+  uint8_t crc8_byte( uint8_t crc, uint8_t byte )
+  {
+    int i;
+    crc ^= byte;
+    for( i=0; i<8; i++ )
+    {
+      if( crc & 1 )
+        crc = (crc >> 1) ^ 0x8c;
+      else
+        crc >>= 1;
+    }
+    return crc;
+  }
+
+  /*
+   * Reset the DS2411 chip and read the 8 bytes of data out.  
+   * We verify the CRC to ensure good data, dump the family byte (it should be '1')
+   * and fill a buffer with the 6 good uniqut address bytes.
+   *
+   * It is possible for the initialization to fail.
+   */
+
+  command error_t IDChip.read( uint8_t *id_buf ) // >= 6000us
+  {
+    int retry = 5;
+    uint8_t id[8];
+
+    init_pins();
+    TOSH_uwait( 1200 );    // Delay a bit at start up (as per DS2411 data sheet)
+
+    while( retry-- > 0 ) {
+      int crc = 0;
+      if( reset() ) {
+	uint8_t* byte;
+
+	write_byte(0x33); //read rom
+	for( byte=id+7; byte!=id-1; byte-- )
+	  crc = crc8_byte( crc, *byte=read_byte() );
+
+	if( crc == 0 ) {
+	  memcpy( id_buf, id + 1, 6 );
+	  clear_pins();
+	  return SUCCESS;
+	}
+      }
+    }
+
+    clear_pins();
+    return FAIL;
+  }
+}
+
diff --git a/tos/platforms/shimmer/chips/ds2411/IDChip.nc b/tos/platforms/shimmer/chips/ds2411/IDChip.nc
new file mode 100644
index 00000000..8f6d6cab
--- /dev/null
+++ b/tos/platforms/shimmer/chips/ds2411/IDChip.nc
@@ -0,0 +1,46 @@
+//$Id: IDChip.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+//@author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+/*
+ * This is a stripped version of the DS2411 driver that provides very 
+ * limited functionality.  Generally you should call this at start up and
+ * use the result to fill in the CC2420 Radio's long address.
+ */
+
+interface IDChip
+{
+  command error_t read( uint8_t *id_buf ); // Fills in 6 bytes if successful.
+}
+
diff --git a/tos/platforms/shimmer/chips/ds2411/LocalIeeeEui64C.nc b/tos/platforms/shimmer/chips/ds2411/LocalIeeeEui64C.nc
new file mode 100644
index 00000000..73eb7b58
--- /dev/null
+++ b/tos/platforms/shimmer/chips/ds2411/LocalIeeeEui64C.nc
@@ -0,0 +1,37 @@
+// $Id: LocalIeeeEui64C.nc,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai
+ * Shimmer port by 
+ * @author Michael Healy
+ * @date   September, 2010
+ */
+
+configuration LocalIeeeEui64C {
+  provides interface LocalIeeeEui64;
+} implementation {
+  components
+    HplDs2411C,
+    DallasId48ToIeeeEui64C;
+
+  LocalIeeeEui64 = DallasId48ToIeeeEui64C;
+  DallasId48ToIeeeEui64C.IDChip -> HplDs2411C;
+}
diff --git a/tos/platforms/shimmer/chips/ds2411/PlatformIeeeEui64.h b/tos/platforms/shimmer/chips/ds2411/PlatformIeeeEui64.h
new file mode 100644
index 00000000..614a2872
--- /dev/null
+++ b/tos/platforms/shimmer/chips/ds2411/PlatformIeeeEui64.h
@@ -0,0 +1,38 @@
+// $Id: PlatformIeeeEui64.h,v 1.1 2010/02/23 06:45:38 sdhsdh Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
+ * UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+ *
+ * Author: Janos Sallai
+ */
+
+#ifndef PLATFORMIEEEEUI64_H
+#define PLATFORMIEEEEUI64_H
+ 
+enum {
+  // University of California Berkeley's OUI
+  IEEE_EUI64_COMPANY_ID_0 = 0x00,
+  IEEE_EUI64_COMPANY_ID_1 = 0x12,
+  IEEE_EUI64_COMPANY_ID_2 = 0x6d,
+  // Following two octets must be 'LO' -- "local" in order to use UCB's OUI
+  IEEE_EUI64_SERIAL_ID_0 = 'L',
+  IEEE_EUI64_SERIAL_ID_1 = 'O',
+};
+
+#endif // PLATFORMIEEEEUI64_H
diff --git a/tos/platforms/shimmer/chips/mma7260/AccelC.nc b/tos/platforms/shimmer/chips/mma7260/AccelC.nc
new file mode 100644
index 00000000..5cab906d
--- /dev/null
+++ b/tos/platforms/shimmer/chips/mma7260/AccelC.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   May, 2010
+ * 
+ */
+
+configuration AccelC {
+   provides {
+      interface Mma_Accel as Accel;
+      interface Init;
+   }
+}
+implementation {
+  components Mma7260P;
+  Init = Mma7260P;
+  Accel = Mma7260P;
+}
diff --git a/tos/platforms/shimmer/chips/mma7260/Mma7260.h b/tos/platforms/shimmer/chips/mma7260/Mma7260.h
new file mode 100644
index 00000000..00d7b3e9
--- /dev/null
+++ b/tos/platforms/shimmer/chips/mma7260/Mma7260.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2006, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Steve Ayer
+ *  @date   August, 2006
+ */
+#ifndef MMA7260_H
+#define MMA7260_H
+
+enum MMA7260_RANGE {
+  RANGE_1_5G  = 0,
+  RANGE_2_0G  = 1,
+  RANGE_4_0G  = 2,
+  RANGE_6_0G  = 3
+};
+
+#endif
diff --git a/tos/platforms/shimmer/chips/mma7260/Mma7260.nc b/tos/platforms/shimmer/chips/mma7260/Mma7260.nc
new file mode 100644
index 00000000..a5cf3d91
--- /dev/null
+++ b/tos/platforms/shimmer/chips/mma7260/Mma7260.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2006, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date August 2006
+ * @author Konrad Lorincz
+ * ported to TOS 2
+ */
+
+#include "Mma7260.h"
+
+interface Mma7260 
+{
+    /**
+     * Turns the accelerometer on or off.
+     *
+     * @param wakeup if <code>TRUE</code> turns it on; if <code>FALSE</code> turns it off
+     */
+    command void wake(bool wakeup);
+
+    /**
+     * Sets the sensitivity (gain) of the sensors.
+     *
+     * @param sensitivity the sensitivity (gain)
+     */
+    command void setSensitivity(enum MMA7260_RANGE sensitivity);
+}
+
+
+
+
diff --git a/tos/platforms/shimmer/chips/mma7260/Mma7260P.nc b/tos/platforms/shimmer/chips/mma7260/Mma7260P.nc
new file mode 100644
index 00000000..1e501e14
--- /dev/null
+++ b/tos/platforms/shimmer/chips/mma7260/Mma7260P.nc
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2006, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date August 2006
+ * @author Konrad Lorincz
+ * ported to TOS 2
+ */
+
+#include "Mma_Accel.h"
+
+module Mma7260P 
+{
+    provides interface Init;
+    provides interface Mma_Accel as Accel;
+}
+implementation 
+{
+    command error_t Init.init()
+    {
+        // configure pins
+        TOSH_MAKE_ACCEL_SLEEP_N_OUTPUT();         // sleep for accel
+        TOSH_SEL_ACCEL_SLEEP_N_IOFUNC();
+        
+        TOSH_MAKE_ADC_ACCELZ_INPUT();         
+        TOSH_SEL_ADC_ACCELZ_MODFUNC();
+
+        TOSH_MAKE_ADC_ACCELY_INPUT();         
+        TOSH_SEL_ADC_ACCELY_MODFUNC();
+
+        TOSH_MAKE_ADC_ACCELX_INPUT();         
+        TOSH_SEL_ADC_ACCELX_MODFUNC();
+
+        // by default wake up accelerometer
+        call Accel.wake(TRUE);
+
+        return SUCCESS;
+    }
+
+    
+    command void Accel.wake(bool wakeup) 
+    {
+        if(wakeup)
+            TOSH_SET_ACCEL_SLEEP_N_PIN();    // wakes up accel board
+        else
+            TOSH_CLR_ACCEL_SLEEP_N_PIN();    // puts accel board to sleep
+    }
+
+    command void Accel.setSensitivity(uint8_t sensitivity) 
+    {
+        switch(sensitivity) {
+        case RANGE_1_5G:
+            TOSH_CLR_ACCEL_SEL0_PIN();
+            TOSH_CLR_ACCEL_SEL1_PIN();
+            break;
+        case RANGE_2_0G:
+            TOSH_SET_ACCEL_SEL0_PIN();
+            TOSH_CLR_ACCEL_SEL1_PIN();
+            break;
+        case RANGE_4_0G:
+            TOSH_CLR_ACCEL_SEL0_PIN();
+            TOSH_SET_ACCEL_SEL1_PIN();
+            break;
+        case RANGE_6_0G:
+            TOSH_SET_ACCEL_SEL0_PIN();
+            TOSH_SET_ACCEL_SEL1_PIN();
+            break;
+        }
+    }
+}
+
+
+
+
diff --git a/tos/platforms/shimmer/chips/mma7260/Mma_Accel.h b/tos/platforms/shimmer/chips/mma7260/Mma_Accel.h
new file mode 100644
index 00000000..feb29e73
--- /dev/null
+++ b/tos/platforms/shimmer/chips/mma7260/Mma_Accel.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2006, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Steve Ayer
+ *  @date   August, 2006
+ */
+#ifndef MMA7260_H
+#define MMA7260_H
+
+enum MMA7260_RANGE {
+  RANGE_1_5G  = 0,
+  RANGE_2_0G  = 1,  // 7260 only
+  RANGE_4_0G  = 2,  // 7260 only
+  RANGE_6_0G  = 3
+};
+
+#endif
diff --git a/tos/platforms/shimmer/chips/mma7260/Mma_Accel.nc b/tos/platforms/shimmer/chips/mma7260/Mma_Accel.nc
new file mode 100644
index 00000000..3c20990e
--- /dev/null
+++ b/tos/platforms/shimmer/chips/mma7260/Mma_Accel.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2006, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date August 2006
+ * @author Konrad Lorincz
+ * ported to TOS 2
+ * @author Steve Ayer
+ * @date   May, 2010
+ * name abstraction to cover other accel chipsets
+ */
+
+interface Mma_Accel
+{
+    /**
+     * Turns the accelerometer on or off.
+     *
+     * @param wakeup if <code>TRUE</code> turns it on; if <code>FALSE</code> turns it off
+     */
+    command void wake(bool wakeup);
+
+    /**
+     * Sets the sensitivity (gain) of the sensors.
+     *
+     * @param sensitivity the sensitivity (gain)
+     */
+    command void setSensitivity(uint8_t sensitivity);
+}
+
+
+
+
diff --git a/tos/platforms/shimmer/chips/msp430/FastClock.nc b/tos/platforms/shimmer/chips/msp430/FastClock.nc
new file mode 100644
index 00000000..4f69ece9
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/FastClock.nc
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   August, 2010
+ *
+ * some people will want to turn the clock off again...
+ */
+
+interface FastClock { 
+  // turn xt2 off, restore default dco selection to mclk
+  command void disable();
+
+  command void setSMCLK(uint8_t mhz);
+}
+
diff --git a/tos/platforms/shimmer/chips/msp430/FastClockC.nc b/tos/platforms/shimmer/chips/msp430/FastClockC.nc
new file mode 100644
index 00000000..6f3a53f2
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/FastClockC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   August, 2010
+ */
+
+configuration FastClockC
+{
+  provides{
+    interface Init;
+    interface FastClock;
+  }
+}
+
+implementation
+{
+  components FastClockP;
+
+  Init = FastClockP;
+  FastClock = FastClockP;
+
+  components LedsC;
+  FastClockP.Leds -> LedsC; 
+}
diff --git a/tos/platforms/shimmer/chips/msp430/FastClockP.nc b/tos/platforms/shimmer/chips/msp430/FastClockP.nc
new file mode 100644
index 00000000..4e123f44
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/FastClockP.nc
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   August, 2010
+ *
+ * finally sick of duplicating the same ti msp430 routine to initialize the
+ * xt2 crystal on this family of platforms, a module to do it for us.
+ *
+ * **********************  APP WARNING NOTE: **************************************
+ *
+ * by default this uses an smclk divisor of 2, so the smclk will 
+ * run at 4mhz, breaking some bus timings.  to fix this, simply add the line
+ * PFLAGS += -DSMCLK_4MHZ
+ * to your app's Makefile and see SDP.nc for how this is handled in a driver.  
+ * Alternatively, you can set the smclk back to 1mhz by changing DIVS_1 to DIVS_7
+ *
+ * ********************************************************************************                   
+ */
+
+#include "msp430hardware.h"
+
+module FastClockP{
+  provides{
+    interface Init;
+    interface FastClock;
+  }
+  uses interface Leds;
+}
+
+implementation {
+  command error_t Init.init() {
+    register uint8_t i;
+    /* 
+     * set up 8mhz clock to max out 
+     * msp430 throughput 
+     */
+
+    atomic CLR_FLAG(BCSCTL1, XT2OFF); // basic clock system control reg, turn off XT2 osc
+
+    call Leds.led0On();
+    do{
+      CLR_FLAG(IFG1, OFIFG);
+      for(i = 0; i < 0xff; i++);
+    }
+    while(READ_FLAG(IFG1, OFIFG));
+
+    call Leds.led0Off();
+
+    call Leds.led1On();
+    TOSH_uwait(50000UL);
+
+    atomic{ 
+      BCSCTL2 = 0; 
+      SET_FLAG(BCSCTL2, SELM_2); /* select master clock source, XT2CLK when XT2 oscillator present */
+    }                            /*on-chip. LFXT1CLK when XT2 oscillator not present on-chip. */
+
+   call Leds.led1Off();
+
+    atomic{
+      SET_FLAG(BCSCTL2, SELS);  // smclk from xt2
+      SET_FLAG(BCSCTL2, DIVS_1);  // divide it by 2
+    }
+
+    return SUCCESS;
+  }
+  
+  command void FastClock.disable() {
+    atomic {
+      SET_FLAG(BCSCTL2, SELM_0);
+      SET_FLAG(BCSCTL1, XT2OFF);
+    }
+  }
+  
+  command void FastClock.setSMCLK(uint8_t mhz){
+    switch(mhz) {
+    case 1:
+      SET_FLAG(BCSCTL2, DIVS_3);  // divide 8mhz xt2 by 8
+      break;
+    case 2:
+      SET_FLAG(BCSCTL2, DIVS_2);  // divide by 4
+      CLR_FLAG(BCSCTL2, DIVS_1);
+      break;
+    case 4:
+      SET_FLAG(BCSCTL2, DIVS_1);  // divide by 2
+      CLR_FLAG(BCSCTL2, DIVS_2);
+      break;
+    default:
+      SET_FLAG(BCSCTL2, DIVS_3);  // divide by 8
+      break;
+    }
+  }
+}
+
diff --git a/tos/platforms/shimmer/chips/msp430/HilTimerMilli64C.nc b/tos/platforms/shimmer/chips/msp430/HilTimerMilli64C.nc
new file mode 100644
index 00000000..0e2634ea
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/HilTimerMilli64C.nc
@@ -0,0 +1,64 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * HilTimerMilliC provides a parameterized interface to a virtualized
+ * millisecond timer.  TimerMilliC in tos/system/ uses this component to
+ * allocate new timers.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+configuration HilTimerMilli64C
+{
+  provides interface Init;
+  provides interface Timer<TMilli> as TimerMilli[ uint8_t num ];
+  provides interface LocalTime<TMilli>;
+}
+implementation
+{
+  components new AlarmMilli32C();
+  components new AlarmToTimerC(TMilli);
+  components new VirtualizeTimerC(TMilli,uniqueCount(UQ_TIMER_MILLI));
+  components new CounterToLocalTimeC(TMilli);
+  components CounterMilli64C;
+
+  Init = AlarmMilli32C;
+  TimerMilli = VirtualizeTimerC;
+  LocalTime = CounterToLocalTimeC;
+
+  VirtualizeTimerC.TimerFrom -> AlarmToTimerC;
+  AlarmToTimerC.Alarm -> AlarmMilli32C;
+  CounterToLocalTime64C.Counter -> CounterMilli64C;
+}
diff --git a/tos/platforms/shimmer/chips/msp430/HplMsp430I2C0P.nc b/tos/platforms/shimmer/chips/msp430/HplMsp430I2C0P.nc
new file mode 100644
index 00000000..6e30bbef
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/HplMsp430I2C0P.nc
@@ -0,0 +1,284 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2010/07/29 13:18:27 $
+ */
+
+module HplMsp430I2C0P @safe() {
+  
+  provides interface HplMsp430I2C as HplI2C;
+  
+  uses interface HplMsp430Usart as HplUsart;
+  uses interface HplMsp430GeneralIO as SIMO;
+  uses interface HplMsp430GeneralIO as UCLK;
+
+}
+
+implementation {
+  
+  MSP430REG_NORACE(U0CTL);
+  MSP430REG_NORACE(I2CTCTL);
+  MSP430REG_NORACE(I2CDR);
+  MSP430REG_NORACE(I2CSA);
+  MSP430REG_NORACE(I2CIE);
+
+  async command bool HplI2C.isI2C() {
+    atomic return ((U0CTL & I2C) && (U0CTL & SYNC) && (U0CTL & I2CEN));
+  }
+  
+  async command void HplI2C.clearModeI2C() {
+    atomic {
+      U0CTL &= ~(I2C | SYNC | I2CEN);
+      call HplUsart.resetUsart(TRUE);
+    }
+  }
+  
+  async command void HplI2C.setModeI2C( msp430_i2c_union_config_t* config ) {
+    
+    call HplUsart.resetUsart(TRUE);
+    call HplUsart.disableUart();
+    call HplUsart.disableSpi();
+    call SIMO.makeInput();
+    call SIMO.selectModuleFunc();
+    call UCLK.makeInput();
+    call UCLK.selectModuleFunc();
+    
+    atomic {
+
+      IE1 &= ~(UTXIE0 | URXIE0);  // interrupt disable    
+      
+      U0CTL &= ~(I2C | I2CEN | SYNC);
+      U0CTL = SWRST;
+      U0CTL |= SYNC | I2C;
+      U0CTL &= ~I2CEN;
+
+      U0CTL |= MST;
+
+      I2CTCTL = I2CSSEL_2;        // use 1MHz SMCLK as the I2C reference
+
+      I2CPSC = 0x00;              // I2C CLK runs at 1MHz/10 = 100kHz
+      I2CSCLH = 0x03;
+      I2CSCLL = 0x03;
+      
+      I2CIE = 0;                 // clear all I2C interrupt enables
+      I2CIFG = 0;                // clear all I2C interrupt flags
+
+      /*      
+      U0CTL = (config->i2cRegisters.uctl | (I2C | SYNC)) & ~I2CEN;
+      I2CTCTL = config->i2cRegisters.i2ctctl;
+      
+      I2CPSC = config->i2cRegisters.i2cpsc;
+      I2CSCLH = config->i2cRegisters.i2csclh;
+      I2CSCLL = config->i2cRegisters.i2cscll;
+      I2COA = config->i2cRegisters.i2coa;
+      */
+      //      U0CTL |= I2CEN;
+      
+    }
+    
+  }
+  
+  // U0CTL
+  async command void HplI2C.setMasterMode() { U0CTL |= MST; }
+  async command void HplI2C.setSlaveMode() { U0CTL &= ~MST; }
+  
+  async command void HplI2C.enableI2C() { U0CTL |= I2CEN; }
+  async command void HplI2C.disableI2C() { U0CTL &= ~I2CEN; }
+  
+  // I2CTCTL
+  async command bool HplI2C.getWordMode() {
+    return ( I2CTCTL & I2CWORD ) != 0;
+  }
+  
+  async command void HplI2C.setWordMode( bool mode ) {
+    I2CTCTL |= ( mode & 0x1 ) << 7;
+  }
+  
+  async command bool HplI2C.getRepeatMode() {
+    return ( I2CTCTL & I2CRM ) != 0;
+  }
+  
+  async command void HplI2C.setRepeatMode( bool mode ) { 
+    I2CTCTL |= ( mode & 0x1 ) << 6;;
+  }
+  
+  async command uint8_t HplI2C.getClockSource() {
+    return ( I2CTCTL >> 4 ) & 0x3;;
+  }
+  
+  async command void HplI2C.setClockSource( uint8_t src ) {
+    atomic I2CTCTL = ( ( src & 0x3 ) << 4 ) | I2CTCTL;
+  }
+  
+  async command bool HplI2C.getTransmitReceiveMode() { 
+    return ( I2CTCTL & I2CTRX ) != 0; 
+  }
+  
+  async command void HplI2C.setTransmitMode() { I2CTCTL |= I2CTRX; }
+  async command void HplI2C.setReceiveMode() { I2CTCTL &= ~I2CTRX; }
+  
+  async command bool HplI2C.getStartByte() { return (I2CTCTL & I2CSTB) != 0; }
+  async command void HplI2C.setStartByte() { I2CTCTL |= I2CSTB; }
+  
+  async command bool HplI2C.getStopBit() { return (I2CTCTL & I2CSTP) != 0; }
+  async command void HplI2C.setStopBit() { I2CTCTL |= I2CSTP; }
+  
+  async command bool HplI2C.getStartBit() { return (I2CTCTL & I2CSTT) != 0; }
+  async command void HplI2C.setStartBit() { I2CTCTL |= I2CSTT; }
+  
+  // I2CDR
+  async command uint8_t HplI2C.getData() { return I2CDR; }
+  async command void HplI2C.setData( uint8_t v ) { I2CDR = v; }
+  
+  // I2CNDAT
+  async command uint8_t HplI2C.getTransferByteCount() { return I2CNDAT; }
+  async command void HplI2C.setTransferByteCount( uint8_t v ) { I2CNDAT = v; }
+  
+  // I2CPSC
+  async command uint8_t HplI2C.getClockPrescaler() { return I2CPSC; }
+  async command void HplI2C.setClockPrescaler( uint8_t v ) { I2CPSC = v; }
+  
+  // I2CSCLH and I2CSCLL
+  async command uint16_t HplI2C.getShiftClock() {
+    uint16_t shift;
+    atomic {
+      shift = I2CSCLH;
+      shift <<= 8;
+      shift |= I2CSCLL;
+    }
+    return shift;
+  }
+  
+  async command void HplI2C.setShiftClock( uint16_t shift ) {
+    atomic {
+      I2CSCLH = shift >> 8;
+      I2CSCLL = shift;
+    }
+  }
+  
+  // I2COA
+  async command uint16_t HplI2C.getOwnAddress() { return I2COA; }
+  async command void HplI2C.setOwnAddress( uint16_t addr ) { I2COA = addr; }
+  
+  // I2CSA
+  async command uint16_t HplI2C.getSlaveAddress() { return I2CSA; }
+  async command void HplI2C.setSlaveAddress( uint16_t addr ) { I2CSA = addr; }
+  
+  // I2CIE
+  async command void HplI2C.disableStartDetect() { I2CIE &= ~STTIE; }
+  async command void HplI2C.enableStartDetect() { I2CIE |= STTIE; }
+  
+  async command void HplI2C.disableGeneralCall() { I2CIE &= ~GCIE; }
+  async command void HplI2C.enableGeneralCall() { I2CIE |= GCIE; }
+  
+  async command void HplI2C.disableTransmitReady() { I2CIE &= ~TXRDYIE; }
+  async command void HplI2C.enableTransmitReady() { I2CIE |= TXRDYIE; }
+  
+  async command void HplI2C.disableReceiveReady() { I2CIE &= ~RXRDYIE; }
+  async command void HplI2C.enableReceiveReady() { I2CIE |= RXRDYIE; }
+  
+  async command void HplI2C.disableAccessReady() { I2CIE &= ~ARDYIE; }
+  async command void HplI2C.enableAccessReady() { I2CIE |= ARDYIE; }
+  
+  async command void HplI2C.disableOwnAddress() { I2CIE &= ~OAIE; }
+  async command void HplI2C.enableOwnAddress() { I2CIE |= OAIE; }
+
+  async command void HplI2C.disableNoAck() { I2CIE &= ~NACKIE; }
+  async command void HplI2C.enableNoAck() { I2CIE |= NACKIE; }
+  
+  async command void HplI2C.disableArbitrationLost() { I2CIE &= ~ALIE; }
+  async command void HplI2C.enableArbitrationLost() { I2CIE |= ALIE; }
+  
+  // I2CIFG
+  async command bool HplI2C.isStartDetectPending() {
+    if (I2CIFG & STTIFG){
+      I2CIFG &= ~STTIFG;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+  
+  async command bool HplI2C.isGeneralCallPending() {
+    if (I2CIFG & GCIFG){
+      I2CIFG &= ~GCIFG;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+  
+  async command bool HplI2C.isTransmitReadyPending() {
+    return ( I2CIFG & TXRDYIFG ) != 0;
+  }
+  
+  async command bool HplI2C.isReceiveReadyPending() {
+    return ( I2CIFG & RXRDYIFG ) != 0;
+  }
+  
+  async command bool HplI2C.isAccessReadyPending() {
+    if (I2CIFG & ARDYIFG){
+      I2CIFG &= ~ARDYIFG;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+  
+  async command bool HplI2C.isOwnAddressPending() {
+    if (I2CIFG & OAIFG){
+      I2CIFG &= ~OAIFG;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+  
+  async command bool HplI2C.isNoAckPending() {
+    if (I2CIFG & NACKIFG){
+      I2CIFG &= ~NACKIFG;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+  
+  async command bool HplI2C.isArbitrationLostPending() {
+    if (I2CIFG & ALIFG){
+      I2CIFG &= ~ALIFG;
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+  
+  // I2CIV
+  async command uint8_t HplI2C.getIV() {
+    return I2CIV;
+  }
+  
+}
diff --git a/tos/platforms/shimmer/chips/msp430/HplMsp430Usart0P.nc b/tos/platforms/shimmer/chips/msp430/HplMsp430Usart0P.nc
new file mode 100644
index 00000000..387d47a1
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/HplMsp430Usart0P.nc
@@ -0,0 +1,405 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Copyright (c) 2004-2005, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "msp430usart.h"
+/**
+ * Implementation of USART0 lowlevel functionality - stateless.
+ * Setting a mode will by default disable USART-Interrupts.
+ *
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * @author: Jonathan Hui <jhui@archedrock.com>
+ * @author: Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author: Joe Polastre
+ * @author: Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ * @version $Revision: 1.2 $ $Date: 2010/07/29 13:19:06 $
+ */
+
+module HplMsp430Usart0P @safe() {
+  provides interface HplMsp430Usart as Usart;
+  provides interface HplMsp430UsartInterrupts as Interrupts;
+  provides interface HplMsp430I2CInterrupts as I2CInterrupts;
+  
+  uses interface HplMsp430I2C as HplI2C;
+  uses interface HplMsp430GeneralIO as SIMO;
+  uses interface HplMsp430GeneralIO as SOMI;
+  uses interface HplMsp430GeneralIO as UCLK;
+  uses interface HplMsp430GeneralIO as URXD;
+  uses interface HplMsp430GeneralIO as UTXD;
+
+  uses interface Leds;
+}
+
+implementation
+{
+  MSP430REG_NORACE(IE1);
+  MSP430REG_NORACE(ME1);
+  MSP430REG_NORACE(IFG1);
+  MSP430REG_NORACE(U0TCTL);
+  MSP430REG_NORACE(U0RCTL);
+  MSP430REG_NORACE(U0TXBUF);
+  
+  TOSH_SIGNAL(UART0RX_VECTOR) {
+    uint8_t temp = U0RXBUF;
+    //    call Leds.led0Toggle();
+    signal Interrupts.rxDone(temp);
+  }
+  
+  TOSH_SIGNAL(UART0TX_VECTOR) {
+    if ( call HplI2C.isI2C() ){
+      //      call Leds.led1Toggle();
+      signal I2CInterrupts.fired();
+    }
+    else{
+      //      call Leds.led2Toggle();
+      signal Interrupts.txDone();
+    }
+  }
+  
+  async command void Usart.setUctl(msp430_uctl_t control) {
+    U0CTL=uctl2int(control);
+  }
+
+  async command msp430_uctl_t Usart.getUctl() {
+    return int2uctl(U0CTL);
+  }
+
+  async command void Usart.setUtctl(msp430_utctl_t control) {
+    U0TCTL=utctl2int(control);
+  }
+
+  async command msp430_utctl_t Usart.getUtctl() {
+    return int2utctl(U0TCTL);
+  }
+
+  async command void Usart.setUrctl(msp430_urctl_t control) {
+    U0RCTL=urctl2int(control);
+  }
+
+  async command msp430_urctl_t Usart.getUrctl() {
+    return int2urctl(U0RCTL);
+  }
+
+  async command void Usart.setUbr(uint16_t control) {
+    atomic {
+      U0BR0 = control & 0x00FF;
+      U0BR1 = (control >> 8) & 0x00FF;
+    }
+  }
+
+  async command uint16_t Usart.getUbr() {
+    return (U0BR1 << 8) + U0BR0;
+  }
+
+  async command void Usart.setUmctl(uint8_t control) {
+    U0MCTL=control;
+  }
+
+  async command uint8_t Usart.getUmctl() {
+    return U0MCTL;
+  }
+
+  async command void Usart.resetUsart(bool reset) {
+    if (reset) {
+      U0CTL = SWRST;
+    }
+    else {
+      CLR_FLAG(U0CTL, SWRST);
+    }
+  }
+
+  async command bool Usart.isSpi() {
+    atomic {
+      return (U0CTL & SYNC) && (ME1 & USPIE0);
+    }
+  }
+
+  async command bool Usart.isUart() {
+    atomic {
+      return !(U0CTL & SYNC) && ((ME1 & UTXE0) && (ME1 & URXE0));
+    }
+  }
+
+  async command bool Usart.isUartTx() {
+    atomic {
+      return !(U0CTL & SYNC) && (ME1 & UTXE0);
+    }
+  }
+
+  async command bool Usart.isUartRx() {
+    atomic {
+      return !(U0CTL & SYNC) && (ME1 & URXE0);
+    }
+  }
+
+  async command msp430_usartmode_t Usart.getMode() {
+    if (call Usart.isUart())
+      return USART_UART;
+    else if (call Usart.isUartRx())
+      return USART_UART_RX;
+    else if (call Usart.isUartTx())
+      return USART_UART_TX;
+    else if (call Usart.isSpi())
+      return USART_SPI;
+    else if (call HplI2C.isI2C())
+      return USART_I2C;
+    else
+      return USART_NONE;
+  }
+
+  async command void Usart.enableUart() {
+    atomic{
+      call UTXD.selectModuleFunc();
+      call URXD.selectModuleFunc();
+    }
+    ME1 |= (UTXE0 | URXE0);   // USART0 UART module enable
+  }
+
+  async command void Usart.disableUart() {
+    atomic {
+      ME1 &= ~(UTXE0 | URXE0);   // USART0 UART module enable
+      call UTXD.selectIOFunc();
+      call URXD.selectIOFunc();
+    }
+
+  }
+
+  async command void Usart.enableUartTx() {
+    call UTXD.selectModuleFunc();
+    ME1 |= UTXE0;   // USART0 UART Tx module enable
+  }
+
+  async command void Usart.disableUartTx() {
+    ME1 &= ~UTXE0;   // USART0 UART Tx module enable
+    call UTXD.selectIOFunc();
+
+  }
+
+  async command void Usart.enableUartRx() {
+    call URXD.selectModuleFunc();
+    ME1 |= URXE0;   // USART0 UART Rx module enable
+  }
+
+  async command void Usart.disableUartRx() {
+    ME1 &= ~URXE0;  // USART0 UART Rx module disable
+    call URXD.selectIOFunc();
+
+  }
+
+  async command void Usart.enableSpi() {
+    atomic {
+      call SIMO.selectModuleFunc();
+      call SOMI.selectModuleFunc();
+      call UCLK.selectModuleFunc();
+    }
+    ME1 |= USPIE0;   // USART0 SPI module enable
+  }
+
+  async command void Usart.disableSpi() {
+    atomic {
+      ME1 &= ~USPIE0;   // USART0 SPI module disable
+      call SIMO.selectIOFunc();
+      call SOMI.selectIOFunc();
+      call UCLK.selectIOFunc();
+    }
+  }
+  
+  void configSpi(msp430_spi_union_config_t* config) {
+    // U0CTL = (config->spiRegisters.uctl & ~I2C) | SYNC | SWRST;
+    U0CTL = (config->spiRegisters.uctl) | SYNC | SWRST;  
+    U0TCTL = config->spiRegisters.utctl;
+
+    call Usart.setUbr(config->spiRegisters.ubr);
+    call Usart.setUmctl(0x00);
+  }
+
+  async command void Usart.setModeSpi(msp430_spi_union_config_t* config) {
+    
+    atomic {
+    	call Usart.resetUsart(TRUE);
+    	call HplI2C.clearModeI2C();
+    	call Usart.disableUart();
+      configSpi(config);
+      call Usart.enableSpi();
+      call Usart.resetUsart(FALSE);
+      call Usart.clrIntr();
+      call Usart.disableIntr();
+    }    
+    return;
+  }
+
+  void configUart(msp430_uart_union_config_t* config) {
+
+    U0CTL = (config->uartRegisters.uctl & ~SYNC) | SWRST;
+    U0TCTL = config->uartRegisters.utctl;
+    U0RCTL = config->uartRegisters.urctl;        
+    
+    call Usart.setUbr(config->uartRegisters.ubr);
+    call Usart.setUmctl(config->uartRegisters.umctl);
+  }
+
+  async command void Usart.setModeUart(msp430_uart_union_config_t* config) {
+
+    atomic { 
+      call Usart.resetUsart(TRUE);
+     	call HplI2C.clearModeI2C();
+    	call Usart.disableSpi();
+      configUart(config);
+      if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 1)) {
+      	call Usart.enableUart();
+      } else if ((config->uartConfig.utxe == 0) && (config->uartConfig.urxe == 1)) {
+        call Usart.disableUartTx();
+        call Usart.enableUartRx();
+      } else if ((config->uartConfig.utxe == 1) && (config->uartConfig.urxe == 0)){
+        call Usart.disableUartRx();
+        call Usart.enableUartTx();
+      } else {
+        call Usart.disableUart();
+      }
+      call Usart.resetUsart(FALSE);
+      call Usart.clrIntr();
+      call Usart.disableIntr();
+    }
+    
+    return;
+  }
+
+  async command bool Usart.isTxIntrPending(){
+    if (IFG1 & UTXIFG0){
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isTxEmpty(){
+    if (U0TCTL & TXEPT) {
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command bool Usart.isRxIntrPending(){
+    if (IFG1 & URXIFG0){
+      return TRUE;
+    }
+    return FALSE;
+  }
+
+  async command void Usart.clrTxIntr(){
+    IFG1 &= ~UTXIFG0;
+  }
+
+  async command void Usart.clrRxIntr() {
+    IFG1 &= ~URXIFG0;
+  }
+
+  async command void Usart.clrIntr() {
+    IFG1 &= ~(UTXIFG0 | URXIFG0);
+  }
+
+  async command void Usart.disableRxIntr() {
+    IE1 &= ~URXIE0;
+  }
+
+  async command void Usart.disableTxIntr() {
+    IE1 &= ~UTXIE0;
+  }
+
+  async command void Usart.disableIntr() {
+      IE1 &= ~(UTXIE0 | URXIE0);
+  }
+
+  async command void Usart.enableRxIntr() {
+    atomic {
+      IFG1 &= ~URXIFG0;
+      IE1 |= URXIE0;
+    }
+  }
+
+  async command void Usart.enableTxIntr() {
+    atomic {
+      IFG1 &= ~UTXIFG0;
+      IE1 |= UTXIE0;
+    }
+  }
+
+  async command void Usart.enableIntr() {
+    atomic {
+      IFG1 &= ~(UTXIFG0 | URXIFG0);
+      IE1 |= (UTXIE0 | URXIE0);
+    }
+  }
+
+  async command void Usart.tx(uint8_t data) {
+    atomic U0TXBUF = data;
+  }
+
+  async command uint8_t Usart.rx() {
+    uint8_t value;
+    atomic value = U0RXBUF;
+    return value;
+  }
+  
+ default async event void I2CInterrupts.fired() { }
+ default async command bool HplI2C.isI2C() {  return FALSE; }
+ default async command void HplI2C.clearModeI2C() { } 
+ 
+ default async event void Interrupts.rxDone( uint8_t data ) {}
+ default async event void Interrupts.txDone() { }
+}
diff --git a/tos/platforms/shimmer/chips/msp430/InternalFlashC.nc b/tos/platforms/shimmer/chips/msp430/InternalFlashC.nc
new file mode 100644
index 00000000..775bd8eb
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/InternalFlashC.nc
@@ -0,0 +1,127 @@
+// $Id: InternalFlashC.nc,v 1.1 2010/12/17 14:24:28 mgh Exp $
+
+/*									tab:4
+ *
+ *
+ * "Copyright (c) 2000-2004 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ * 
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+
+/**
+ * InternalFlashC.nc - Internal flash implementation for telos msp
+ * platform. On the msp, the flash must first be erased before a value
+ * can be written. However, the msp can only erase the flash at a
+ * segment granularity (128 bytes for the information section). This
+ * module allows transparent read/write of individual bytes to the
+ * information section by dynamically switching between the two
+ * provided segments in the information section.
+ *
+ * Valid address range is 0x1000 - 0x107E (0x107F is used to store the
+ * version number of the information segment).
+ *
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ *
+ */
+
+module InternalFlashC {
+  provides interface InternalFlash;
+}
+
+implementation {
+
+  enum {
+    IFLASH_BOUND_HIGH = 0x7e,
+    IFLASH_OFFSET     = 0x1000,
+    IFLASH_SIZE       = 128,
+    IFLASH_SEG0_VNUM_ADDR = 0x107f,
+    IFLASH_SEG1_VNUM_ADDR = 0x10ff,
+    IFLASH_INVALID_VNUM = -1,
+  };
+
+  uint8_t chooseSegment() {
+    int8_t vnum0 = *(int8_t*)IFLASH_SEG0_VNUM_ADDR;
+    int8_t vnum1 = *(int8_t*)IFLASH_SEG1_VNUM_ADDR;
+    if (vnum0 == IFLASH_INVALID_VNUM)
+      return 1;
+    else if (vnum1 == IFLASH_INVALID_VNUM)
+      return 0;
+    return ( (int8_t)(vnum0 - vnum1) < 0 );
+  }
+
+  command error_t InternalFlash.write(void* addr, void* buf, uint16_t size) {
+
+    volatile int8_t *newPtr;
+    int8_t *oldPtr;
+    int8_t *bufPtr = (int8_t*)buf;
+    int8_t version;
+    uint16_t i;
+
+    if (IFLASH_BOUND_HIGH + 2 < (uint16_t)addr + size)
+      return FAIL;
+
+    addr += IFLASH_OFFSET;
+    newPtr = oldPtr = (int8_t*)IFLASH_OFFSET;
+    if (chooseSegment()) {
+      oldPtr += IFLASH_SIZE;
+    }
+    else {
+      addr += IFLASH_SIZE;
+      newPtr += IFLASH_SIZE;
+    }
+
+    atomic {
+      FCTL2 = FWKEY + FSSEL1 + FN2;
+      FCTL3 = FWKEY;
+      FCTL1 = FWKEY + ERASE;
+      *newPtr = 0;
+      FCTL1 = FWKEY + WRT;
+
+      for ( i = 0; i < IFLASH_SIZE-1; i++, newPtr++, oldPtr++ ) {
+	if ((uint16_t)newPtr < (uint16_t)addr || (uint16_t)addr+size <= (uint16_t)newPtr)
+	  *newPtr = *oldPtr;
+	else
+	  *newPtr = *bufPtr++;
+      }
+      version = *oldPtr + 1;
+      if (version == IFLASH_INVALID_VNUM)
+	version++;
+      *newPtr = version;
+
+      FCTL1 = FWKEY;
+      FCTL3 = FWKEY + LOCK;
+    }
+
+    return SUCCESS;
+
+  }
+
+  command error_t InternalFlash.read(void* addr, void* buf, uint16_t size) {
+
+    addr += IFLASH_OFFSET;
+    if (chooseSegment())
+      addr += IFLASH_SIZE;
+
+    memcpy(buf, addr, size);
+
+    return SUCCESS;
+
+  }
+
+}
diff --git a/tos/platforms/shimmer/chips/msp430/Msp430I2CP.nc b/tos/platforms/shimmer/chips/msp430/Msp430I2CP.nc
new file mode 100644
index 00000000..02b06531
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/Msp430I2CP.nc
@@ -0,0 +1,322 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2010/07/28 17:20:27 $
+ */
+
+#include <I2C.h>
+
+module Msp430I2CP {
+  
+  provides interface I2CPacket<TI2CBasicAddr> as I2CBasicAddr;
+  
+  uses interface HplMsp430I2C as HplI2C;
+  uses interface HplMsp430I2CInterrupts as I2CInterrupts;
+  uses interface Leds;
+  
+}
+
+implementation {
+  
+  MSP430REG_NORACE(I2CIE);
+  
+  enum {
+    OFF = 1,
+    IDLE,
+    PACKET_WRITE,
+    PACKET_READ
+  };
+
+  /*
+    norace uint8_t* m_buf;
+    norace uint8_t m_len;
+    norace uint8_t m_pos;
+    norace i2c_flags_t m_flags;
+  */
+  norace uint8_t stateI2C = IDLE;
+  uint8_t length;
+  uint8_t ptr;
+  norace error_t result;
+  uint8_t* data;
+  
+  task void readDone() {
+    // variables protected from change by the stateI2C state machine
+    error_t _result;
+    uint8_t _length;
+    uint8_t* _data;
+    uint16_t _addr;
+
+    _result = result;
+    _length = length;
+    _data = data;
+    _addr = I2CSA;
+
+    atomic stateI2C = IDLE;
+    signal I2CBasicAddr.readDone(_result, _addr, _length, _data);
+  }
+
+  task void writeDone() {
+    // variables protected from change by the stateI2C state machine
+    error_t _result;
+    uint8_t _length;
+    uint8_t* _data;
+    uint16_t _addr;
+
+    _result = result;
+    _length = length;
+    _data = data;
+    _addr = I2CSA;
+
+    // wait for the module to finish its transmission
+    // spin only lasts ~4bit times == 4us.
+    while (I2CDCTL & I2CBUSY) ;
+
+    atomic stateI2C = IDLE;
+    signal I2CBasicAddr.writeDone(_result, _addr, _length, _data);
+  }
+
+  async command error_t I2CBasicAddr.read( i2c_flags_t flags,
+					   uint16_t _addr, uint8_t _length, 
+					   uint8_t* _data ) {
+    uint8_t _state;
+
+    atomic {
+      _state = stateI2C;
+      if (_state == IDLE) {
+	stateI2C = PACKET_READ;
+      }
+    }
+
+    if (_state == IDLE) {
+      // perform register modifications with interrupts disabled
+      // to maintain consistent state
+      atomic {
+	result = FAIL;
+
+	// disable I2C to set the registers
+	U0CTL &= ~I2CEN;
+
+	I2CSA = _addr;
+
+	length = _length;
+	data = _data;
+	ptr = 0;
+
+	U0CTL |= MST;
+
+	I2CNDAT = _length;
+
+	// enable I2C module
+	U0CTL |= I2CEN;
+	
+	// set receive mode
+	I2CTCTL &= ~I2CTRX;
+
+	// get an event if the receiver does not ACK
+	I2CIE = RXRDYIE | NACKIE;
+	I2CIFG = 0;
+
+	// start condition and stop condition need to be sent
+	I2CTCTL |= (I2CSTP | I2CSTT);
+      }
+
+      return SUCCESS;
+    }
+
+    return FAIL;
+  }
+  
+  // handle the interrupt within this component
+  void localRxData() {
+    uint16_t* _data16 = (uint16_t*)data;
+
+    if (stateI2C != PACKET_READ)
+      return;
+
+    // figure out where we are in the transmission
+    // should only occur when I2CNDAT > 0
+    if (I2CTCTL & I2CWORD) {
+      _data16[(int)ptr >> 1] = I2CDR;
+      ptr = ptr + 2;
+    }
+    else {
+      data[(int)ptr] = I2CDR & 0xFF;
+      ptr++;
+    }
+
+    //    I2CIFG = 0;
+    
+    if (ptr == length) {
+      I2CIE &= ~RXRDYIE;
+      result = SUCCESS;
+      if (!post readDone())
+	stateI2C = IDLE;
+    }
+  }
+
+  async command error_t I2CBasicAddr.write( i2c_flags_t flags,
+					    uint16_t _addr, uint8_t _length,
+					    uint8_t* _data ) {
+    
+    uint8_t _state;
+
+    atomic {
+      _state = stateI2C;
+      if (_state == IDLE) {
+	stateI2C = PACKET_WRITE;
+      }
+    }
+
+    if (_state == IDLE) {
+      // perform register modifications with interrupts disabled
+      atomic {
+	// disable I2C to set the registers
+	result = FAIL;
+
+	U0CTL &= ~I2CEN;
+
+	I2CSA = _addr;
+	
+	length = _length;
+	data = _data;
+	ptr = 0;
+
+	U0CTL |= MST;
+	
+	I2CNDAT = _length;
+
+	// enable I2C module
+	U0CTL |= I2CEN;
+	
+	// set transmit mode
+	I2CTCTL |= I2CTRX;
+
+	// get an event if the receiver does not ACK
+	I2CIE = TXRDYIE | NACKIE;
+	I2CIFG = 0;
+
+	// start condition and stop condition need to be sent
+	I2CTCTL |= (I2CSTP | I2CSTT);
+      }
+
+      return SUCCESS;
+    }
+
+    return FAIL;
+  }
+  
+  // handle the interrupt within this component
+  void localTxData() {
+    uint16_t* _data16 = (uint16_t*)data;
+
+    if (stateI2C != PACKET_WRITE)
+      return;
+
+    // figure out where we are in the transmission
+    // should only occur when I2CNDAT > 0
+    if (I2CTCTL & I2CWORD) {
+      I2CDR = _data16[(int)ptr >> 1];
+      ptr = ptr + 2;
+    }
+    else {
+      I2CDR = data[(int)ptr];
+      ptr++;
+    }
+
+    //    I2CIFG = 0;
+    
+    if (ptr == length) {
+      I2CIE &= ~TXRDYIE;
+      result = SUCCESS;
+      if (!post writeDone())
+	stateI2C = IDLE;
+    }
+  }
+
+  void localNoAck() {
+    if ((stateI2C != PACKET_WRITE) && (stateI2C != PACKET_READ))
+      return;
+
+    I2CNDAT = 0;
+    I2CIE = 0;
+
+    // issue a stop command to clear the bus if it has not been stopped
+    if (I2CDCTL & I2CBB)
+      I2CTCTL |= I2CSTP;
+
+    if (stateI2C == PACKET_WRITE) {
+      if (!post writeDone())
+	stateI2C = IDLE;
+    }
+    else if (stateI2C == PACKET_READ) {
+      if (!post readDone())
+	stateI2C = IDLE;
+    }
+  }
+
+  async event void I2CInterrupts.fired() {
+    volatile uint16_t value = I2CIV;
+
+    //    call Leds.led0Toggle();
+    switch (value) {
+    case 0x0000:
+      break;
+    case 0x0002:
+      localNoAck();
+      call HplI2C.isArbitrationLostPending();
+      break;
+    case 0x0004:
+      localNoAck();
+      call HplI2C.isNoAckPending();
+      break;
+    case 0x0006:
+      call HplI2C.isOwnAddressPending();
+      break;
+    case 0x0008:
+      call HplI2C.isAccessReadyPending();
+      break;
+    case 0x000A:
+      localRxData();
+      break;
+    case 0x000C:
+      localTxData();
+      break;
+    case 0x000E:
+      call HplI2C.isGeneralCallPending();
+      break;
+    case 0x0010:
+      call HplI2C.isStartDetectPending();
+      break;
+    }
+  }
+}
diff --git a/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitor.h b/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitor.h
new file mode 100644
index 00000000..8b063f56
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitor.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2007, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author  Steve Ayer
+ * @date    March, 2007
+ *
+ * enum to set svs thresholds, presumably more meaningful than "vld_n"?
+ */
+
+// as in 1.9v, 2.1v, etc.
+enum {
+  OFF,
+  ONE_9V =  VLD_1,    
+  TWO_1V =  VLD_2,
+  TWO_2V =  VLD_3,
+  TWO_3V =  VLD_4,
+  TWO_4V =  VLD_5,
+  TWO_5V =  VLD_6,
+  TWO_65V = VLD_7,
+  TWO_8V =  VLD_8,
+  TWO_9V =  VLD_9,
+  THREE_05V = VLD_10,
+  THREE_2V =  VLD_11,
+  THREE_35V = VLD_12,
+  THREE_5V =  VLD_13,
+  THREE_7V =  VLD_14,
+  EXTERNAL =  VLD_EXT
+};
diff --git a/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitor.nc b/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitor.nc
new file mode 100644
index 00000000..f1ecf884
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitor.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2007, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author  Steve Ayer
+ * @date    March, 2007
+ *
+ * simple interface to msp430 supply voltage supervisor register
+ */
+
+interface PowerSupplyMonitor{
+
+  command void resetOnLowVoltage(bool reset);
+
+  /* enum in PowerSupplyVoltage.h */
+  command void setVoltageThreshold(uint8_t threshold);
+
+  /* polling for low voltage condtion */
+  command void setMonitorInterval(uint32_t interval_ms);
+
+  command void stopVoltageMonitor();
+
+  command error_t isSupplyMonitorEnabled();
+
+  /* manual query */
+  command error_t queryLowVoltageCondition();
+
+  /* flag is immediately reset unless power problem is remedied */
+  command void clearLowVoltageCondition();
+
+  command void disable();
+
+  /* triggered by polling mechanism */
+  event void voltageThresholdReached(uint8_t t);
+}
diff --git a/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitorC.nc b/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitorC.nc
new file mode 100644
index 00000000..4c75d8eb
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitorC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2007, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  Author:  Steve Ayer
+ *           March, 2007
+ */
+
+
+configuration PowerSupplyMonitorC {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface PowerSupplyMonitor;
+  }
+}
+implementation {
+  components PowerSupplyMonitorP, new TimerMilliC() as Timer, LedsC;
+
+  Init = PowerSupplyMonitorP;
+  StdControl = PowerSupplyMonitorP;
+  PowerSupplyMonitor = PowerSupplyMonitorP;
+
+  PowerSupplyMonitorP.Timer -> Timer;
+  PowerSupplyMonitorP.Leds  -> LedsC;
+}
diff --git a/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitorP.nc b/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitorP.nc
new file mode 100644
index 00000000..7e2ce116
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/PowerSupplyMonitorP.nc
@@ -0,0 +1,178 @@
+/*
+ * Copyright (c) 2007, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author  Steve Ayer
+ * @date    March, 2007
+ *
+ * support for interface to msp430 SVSCTL functionality
+ */
+
+//#include "PowerSupplyMonitor.h"
+
+module PowerSupplyMonitorP {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface PowerSupplyMonitor;
+  }
+  uses{
+    interface Timer<TMilli> as Timer;
+    interface Leds;
+  }
+}
+
+implementation {
+  uint8_t threshold;
+  uint32_t monitor_interval;
+  bool started, spurious_check;
+
+  /* 
+   * sets svs to first voltage level beneath regulator (2.9v), 
+   * no reset, 15 minute polling 
+   */
+  void init() {
+    threshold = THREE_2V;
+    monitor_interval = 900000;  
+
+    SVSCTL = 0;
+    //    CLR_FLAG(SVSCTL, 0xff);
+  }
+  
+  /* turns on svs to highest voltage level (3.7v), no reset */
+  command error_t Init.init(){
+    started = FALSE;
+    spurious_check = FALSE;
+
+    init();
+    
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start(){
+    CLR_FLAG(SVSCTL, VLD_EXT);
+    SET_FLAG(SVSCTL, threshold);
+
+    started = TRUE;
+    call Timer.startPeriodic(monitor_interval);
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop(){
+    call PowerSupplyMonitor.disable();
+
+    started = FALSE;
+    return SUCCESS;
+  }
+
+
+  task void spurious_test(){
+    call Timer.stop();
+    started = FALSE;
+
+    atomic{
+      CLR_FLAG(SVSCTL, VLD_EXT);  // set vld to zero to stop detection
+      CLR_FLAG(SVSCTL, SVSFG);
+    }
+
+    spurious_check = TRUE;
+    call Timer.startOneShot(5000);
+  }
+
+  task void recheck(){
+    spurious_check = FALSE;
+
+    SET_FLAG(SVSCTL, threshold);  // set vld back to threshold, restart detection
+
+    TOSH_uwait(1000);  // wait for svs to settle back down (max time ~ 50us, but hey)
+
+    atomic if(READ_FLAG(SVSCTL, SVSFG)){
+      CLR_FLAG(SVSCTL, threshold);  // set vld back to threshold, restart detection
+      signal PowerSupplyMonitor.voltageThresholdReached(threshold);
+    }
+  }
+      
+  event void Timer.fired(){
+    if(spurious_check)
+      post recheck();
+    else{
+      atomic if(READ_FLAG(SVSCTL, SVSFG))
+	post spurious_test();
+    }
+  }
+
+  command void PowerSupplyMonitor.resetOnLowVoltage(bool reset){
+    if(reset)
+      SET_FLAG(SVSCTL, PORON);
+    else
+      CLR_FLAG(SVSCTL, PORON);
+  }
+
+  /* enum in PowerSupplyVoltage.h for this */
+  command void PowerSupplyMonitor.setVoltageThreshold(uint8_t t){
+    threshold = t;
+    if(started){
+      CLR_FLAG(SVSCTL, VLD_EXT);  
+      SET_FLAG(SVSCTL, t);
+    }
+  }
+
+  command error_t PowerSupplyMonitor.isSupplyMonitorEnabled(){
+    return READ_FLAG(SVSCTL, SVSON);
+  }
+
+  command error_t PowerSupplyMonitor.queryLowVoltageCondition(){
+    return READ_FLAG(SVSCTL, SVSFG);
+  }
+
+
+  command void PowerSupplyMonitor.setMonitorInterval(uint32_t interval_ms){
+    monitor_interval = interval_ms;
+    if(started){
+      call Timer.stop();
+      call Timer.startPeriodic(monitor_interval);
+    }
+  }
+
+  command void PowerSupplyMonitor.clearLowVoltageCondition(){
+    CLR_FLAG(SVSCTL, SVSFG);
+  }
+
+  command void PowerSupplyMonitor.stopVoltageMonitor() {
+    call Timer.stop();
+  }
+
+  command void PowerSupplyMonitor.disable(){
+    CLR_FLAG(SVSCTL, 0xf0);
+
+    started = FALSE;
+
+    call Timer.stop();
+  }
+}
diff --git a/tos/platforms/shimmer/chips/msp430/msp430hardware.h b/tos/platforms/shimmer/chips/msp430/msp430hardware.h
new file mode 100644
index 00000000..93123a99
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/msp430hardware.h
@@ -0,0 +1,299 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+// @author Joe Polastre <polastre@cs.berkeley.edu>
+// @author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+#ifndef _H_msp430hardware_h
+#define _H_msp430hardware_h
+
+#include <io.h>
+#include <signal.h>
+#include "msp430regtypes.h"
+#include "Msp430DcoSpec.h"
+
+// CPU memory-mapped register access will cause nesc to issue race condition
+// warnings.  Race conditions are a significant conern when accessing CPU
+// memory-mapped registers, because they can change even while interrupts
+// are disabled.  This means that the standard nesc tools for resolving race
+// conditions, atomic statements that disable interrupt handling, do not
+// resolve CPU register race conditions.  So, CPU registers access must be
+// treated seriously and carefully.
+
+// The macro MSP430REG_NORACE allows individual modules to internally
+// redeclare CPU registers as norace, eliminating nesc's race condition
+// warnings for their access.  This macro should only be used after the
+// specific CPU register use has been verified safe and correct.  Example
+// use:
+//
+//    module MyLowLevelModule
+//    {
+//      // ...
+//    }
+//    implementation
+//    {
+//      MSP430REG_NORACE(TACCTL0);
+//      // ...
+//    }
+
+#undef norace
+
+#define MSP430REG_NORACE_EXPAND(type,name,addr) \
+norace static volatile type name asm(#addr)
+
+#define MSP430REG_NORACE3(type,name,addr) \
+MSP430REG_NORACE_EXPAND(type,name,addr)
+
+// MSP430REG_NORACE and MSP430REG_NORACE2 presume naming conventions among
+// type, name, and addr, which are defined in the local header
+// msp430regtypes.h and mspgcc's header io.h and its children.
+
+#define MSP430REG_NORACE2(rename,name) \
+MSP430REG_NORACE3(TYPE_##name,rename,name##_)
+
+#define MSP430REG_NORACE(name) \
+MSP430REG_NORACE3(TYPE_##name,name,name##_)
+
+// Avoid the type-punned pointer warnings from gcc 3.3, which are warning about
+// creating potentially broken object code.  Union casts are the appropriate work
+// around.  Unfortunately, they require a function definiton.
+#define DEFINE_UNION_CAST(func_name,to_type,from_type) \
+to_type func_name(from_type x) @safe() { union {from_type f; to_type t;} c = {f:x}; return c.t; }
+
+// redefine ugly defines from msp-gcc
+#ifndef DONT_REDEFINE_SR_FLAGS
+#undef C
+#undef Z
+#undef N
+#undef V
+#undef GIE
+#undef CPUOFF
+#undef OSCOFF
+#undef SCG0
+#undef SCG1
+#undef LPM0_bits
+#undef LPM1_bits
+#undef LPM2_bits
+#undef LPM3_bits
+#undef LPM4_bits
+#define SR_C       0x0001
+#define SR_Z       0x0002
+#define SR_N       0x0004
+#define SR_V       0x0100
+#define SR_GIE     0x0008
+#define SR_CPUOFF  0x0010
+#define SR_OSCOFF  0x0020
+#define SR_SCG0    0x0040
+#define SR_SCG1    0x0080
+#define LPM0_bits           SR_CPUOFF
+#define LPM1_bits           SR_SCG0+SR_CPUOFF
+#define LPM2_bits           SR_SCG1+SR_CPUOFF
+#define LPM3_bits           SR_SCG1+SR_SCG0+SR_CPUOFF
+#define LPM4_bits           SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF
+#endif//DONT_REDEFINE_SR_FLAGS
+
+#ifdef interrupt
+#undef interrupt
+#endif
+
+#ifdef wakeup
+#undef wakeup
+#endif
+
+#ifdef signal
+#undef signal
+#endif
+
+
+// Re-definitions for safe tinyOS
+// These rely on io.h being included at the top of this file
+// thus pulling the affected header files before the re-definitions
+#ifdef SAFE_TINYOS
+#undef ADC12MEM
+#define ADC12MEM            TCAST(int* ONE, ADC12MEM_) /* ADC12 Conversion Memory (for C) */
+#undef ADC12MCTL
+#define ADC12MCTL           TCAST(char * ONE, ADC12MCTL_)
+#endif
+
+// define platform constants that can be changed for different compilers
+// these are all msp430-gcc specific (add as necessary)
+
+#ifdef __msp430_headers_adc10_h
+#define __msp430_have_adc10
+#endif
+
+#ifdef __msp430_headers_adc12_h
+#define __msp430_have_adc12
+#endif
+
+// backwards compatibility to older versions of the header files
+#ifdef __MSP430_HAS_I2C__
+#define __msp430_have_usart0_with_i2c
+#endif
+
+// I2CBusy flag is not defined by current MSP430-GCC
+#ifdef __msp430_have_usart0_with_i2c
+#ifndef I2CBUSY
+#define I2CBUSY   (0x01 << 5)
+#endif
+MSP430REG_NORACE2(U0CTLnr,U0CTL);
+MSP430REG_NORACE2(I2CTCTLnr,I2CTCTL);
+MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL);
+#endif
+
+// The signal attribute has opposite meaning in msp430-gcc than in avr-gcc
+#define TOSH_SIGNAL(signame) \
+  void sig_##signame() __attribute__((interrupt (signame), wakeup)) @C()
+
+// TOSH_INTERRUPT allows nested interrupts
+#define TOSH_INTERRUPT(signame) \
+  void isr_##signame() __attribute__((interrupt (signame), signal, wakeup)) @C()
+
+inline void TOSH_wait(void)
+{
+  nop(); nop();
+}
+
+// #define TOSH_CYCLE_TIME_NS 250
+// Our worst case is 250 ns = 1 cycle.
+
+inline void TOSH_wait_250ns(void)
+{
+  nop();
+}
+
+/* 
+   Following the suggestion of the mspgcc.sourceforge.net site
+   for an intelligent pause routine
+*/
+void brief_pause(register unsigned int n)
+{
+  asm volatile(	"1: \n\t"
+		"dec	%0 \n\t"
+		"jne	1b\n\t"
+		:  "+r" (n));
+}
+
+#define TOSH_uwait(n)   brief_pause((((unsigned long long)n) * TARGET_DCO_KHZ * 1024 / 1000000 - 2) / 3)
+
+#define SET_FLAG(port, flag) ((port) |= (flag))
+#define CLR_FLAG(port, flag) ((port) &= ~(flag))
+#define READ_FLAG(port, flag) ((port) & (flag))
+
+// TOSH_ASSIGN_PIN creates functions that are effectively marked as
+// "norace".  This means race conditions that result from their use will not
+// be detectde by nesc.
+
+#define TOSH_ASSIGN_PIN_HEX(name, port, hex) \
+void TOSH_SET_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r |= hex; } \
+void TOSH_CLR_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r &= ~hex; } \
+void TOSH_TOGGLE_##name##_PIN() @safe(){ MSP430REG_NORACE2(r,P##port##OUT); r ^= hex; } \
+uint8_t TOSH_READ_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##IN); return (r & hex); } \
+void TOSH_MAKE_##name##_OUTPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r |= hex; } \
+void TOSH_MAKE_##name##_INPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r &= ~hex; } \
+void TOSH_SEL_##name##_MODFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r |= hex; } \
+void TOSH_SEL_##name##_IOFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r &= ~hex; }
+
+#define TOSH_ASSIGN_PIN(name, port, bit) \
+TOSH_ASSIGN_PIN_HEX(name,port,(1<<(bit)))
+
+typedef uint8_t mcu_power_t @combine("mcombine");
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() {
+  return (m1 < m2) ? m1: m2;
+}
+enum {
+  MSP430_POWER_ACTIVE = 0,
+  MSP430_POWER_LPM0   = 1,
+  MSP430_POWER_LPM1   = 2,
+  MSP430_POWER_LPM2   = 3,
+  MSP430_POWER_LPM3   = 4,
+  MSP430_POWER_LPM4   = 5
+};
+
+void __nesc_disable_interrupt(void) @safe()
+{
+  dint();
+  nop();
+}
+
+void __nesc_enable_interrupt(void) @safe()
+{
+  eint();
+}
+
+typedef bool __nesc_atomic_t;
+__nesc_atomic_t __nesc_atomic_start(void);
+void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts);
+
+#ifndef NESC_BUILD_BINARY
+/* @spontaneous() functions should not be included when NESC_BUILD_BINARY
+   is #defined, to avoid duplicate functions definitions when binary
+   components are used. Such functions do need a prototype in all cases,
+   though. */
+__nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe()
+{
+  __nesc_atomic_t result = ((READ_SR & SR_GIE) != 0);
+  __nesc_disable_interrupt();
+  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
+  return result;
+}
+
+void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous() @safe()
+{
+  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
+  if( reenable_interrupts )
+    __nesc_enable_interrupt();
+}
+#endif
+
+/* Floating-point network-type support.
+   These functions must convert to/from a 32-bit big-endian integer that follows
+   the layout of Java's java.lang.float.floatToRawIntBits method.
+   Conveniently, for the MSP430 family, this is a straight byte copy...
+*/
+
+typedef float nx_float __attribute__((nx_base_be(afloat)));
+
+inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() {
+  float f;
+  memcpy(&f, source, sizeof(float));
+  return f;
+}
+
+inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() {
+  memcpy(target, &value, sizeof(float));
+  return value;
+}
+
+#endif//_H_msp430hardware_h
+
diff --git a/tos/platforms/shimmer/chips/msp430/msp430usart.h b/tos/platforms/shimmer/chips/msp430/msp430usart.h
new file mode 100644
index 00000000..a8513782
--- /dev/null
+++ b/tos/platforms/shimmer/chips/msp430/msp430usart.h
@@ -0,0 +1,342 @@
+/*
+ * Copyright (c) 2004-2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ * @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+ * @author Philipp Huppertz <huppertz@tkn.tu-berlin.de>
+ */
+
+#ifndef _H_Msp430Usart_h
+#define _H_Msp430Usart_h
+
+#define MSP430_HPLUSART0_RESOURCE "Msp430Usart0.Resource"
+#define MSP430_SPIO_BUS "Msp430Spi0.Resource"
+#define MSP430_UARTO_BUS "Msp430Uart0.Resource"
+#define MSP430_I2CO_BUS "Msp430I2C0.Resource"
+
+#define MSP430_HPLUSART1_RESOURCE "Msp430Usart1.Resource"
+#define MSP430_SPI1_BUS "Msp430Spi1.Resource"
+#define MSP430_UART1_BUS "Msp430Uart1.Resource"
+
+typedef enum
+{
+  USART_NONE = 0,
+  USART_UART = 1,
+  USART_UART_TX = 2,
+  USART_UART_RX = 3,
+  USART_SPI = 4,
+  USART_I2C = 5
+} msp430_usartmode_t;
+
+typedef struct {
+  unsigned int swrst: 1;    //Software reset (0=operational; 1=reset)
+  unsigned int mm: 1;       //Multiprocessor mode (0=idle-line protocol; 1=address-bit protocol)
+  unsigned int sync: 1;     //Synchronous mode (0=UART; 1=SPI/I2C)
+  unsigned int listen: 1;   //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
+  unsigned int clen: 1;     //Character length (0=7-bit data; 1=8-bit data)
+  unsigned int spb: 1;      //Stop bits (0=one stop bit; 1=two stop bits)
+  unsigned int pev: 1;      //Parity select (0=odd; 1=even)
+  unsigned int pena: 1;     //Parity enable (0=disabled; 1=enabled)
+} __attribute__ ((packed)) msp430_uctl_t ;
+
+typedef struct {
+  unsigned int txept:1;      //Transmitter empty (0=busy; 1=TX buffer empty or SWRST=1)
+  unsigned int stc:1;       //Slave transmit (0=4-pin SPI && STE enabled; 1=3-pin SPI && STE disabled)
+  unsigned int txwake: 1;   //Transmiter wake (0=next char is data; 1=next char is address)
+  unsigned int urxse: 1;    //Receive start-edge detection (0=disabled; 1=enabled)
+  unsigned int ssel: 2;     //Clock source (00=UCLKI; 01=ACLK; 10=SMCLK; 11=SMCLK)
+  unsigned int ckpl: 1;     //Clock polarity (0=normal; 1=inverted)
+  unsigned int ckph:1;      //Clock phase (0=normal; 1=half-cycle delayed)
+} __attribute__ ((packed)) msp430_utctl_t;
+
+typedef struct {
+  unsigned int rxerr: 1;    //Receive error (0=no errors; 1=error detected)
+  unsigned int rxwake: 1;   //Receive wake-up (0=received data; 1=received an address)
+  unsigned int urxwie: 1;   //Wake-up interrupt-enable (0=all characters set URXIFGx; 1=only address sets URXIFGx)
+  unsigned int urxeie: 1;   //Erroneous-character receive (0=rejected; 1=recieved and URXIFGx set)
+  unsigned int brk:1;       //Break detect (0=no break; 1=break occured)
+  unsigned int oe:1;        //Overrun error (0=no error; 1=overrun error)
+  unsigned int pe:1;        //Parity error (0=no error; 1=parity error)
+  unsigned int fe:1;        //Framing error (0=no error; 1=low stop bit)
+} __attribute__ ((packed)) msp430_urctl_t;
+
+DEFINE_UNION_CAST(uctl2int,uint8_t,msp430_uctl_t)
+DEFINE_UNION_CAST(int2uctl,msp430_uctl_t,uint8_t)
+
+DEFINE_UNION_CAST(utctl2int,uint8_t,msp430_utctl_t)
+DEFINE_UNION_CAST(int2utctl,msp430_utctl_t,uint8_t)
+
+DEFINE_UNION_CAST(urctl2int,uint8_t,msp430_urctl_t)
+DEFINE_UNION_CAST(int2urctl,msp430_urctl_t,uint8_t)
+
+typedef struct {
+  unsigned int ubr: 16;     //Clock division factor (>=0x0002)
+  
+  unsigned int :1;
+  unsigned int mm: 1;       //Master mode (0=slave; 1=master)
+  unsigned int :1;
+  unsigned int listen: 1;   //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
+  unsigned int clen: 1;     //Character length (0=7-bit data; 1=8-bit data)
+  unsigned int: 3;
+  
+  unsigned int:1;
+  unsigned int stc: 1;      //Slave transmit (0=4-pin SPI && STE enabled; 1=3-pin SPI && STE disabled)
+  unsigned int:2;
+  unsigned int ssel: 2;     //Clock source (00=external UCLK [slave]; 01=ACLK [master]; 10=SMCLK [master] 11=SMCLK [master]); 
+  unsigned int ckpl: 1;     //Clock polarity (0=inactive is low && data at rising edge; 1=inverted)
+  unsigned int ckph: 1;     //Clock phase (0=normal; 1=half-cycle delayed)
+  unsigned int :0;
+} msp430_spi_config_t;
+
+typedef struct {
+  uint16_t ubr;
+  uint8_t uctl;
+  uint8_t utctl;
+} msp430_spi_registers_t;
+
+typedef union {
+  msp430_spi_config_t spiConfig;
+  msp430_spi_registers_t spiRegisters;
+} msp430_spi_union_config_t;
+
+msp430_spi_union_config_t msp430_spi_default_config = { 
+  {
+    ubr : 0x0002, 
+    ssel : 0x02, 
+    clen : 1, 
+    listen : 0, 
+    mm : 1, 
+    ckph : 1, 
+    ckpl : 0, 
+    stc : 1
+  } 
+};
+    
+    
+    
+/**
+  The calculations were performed using the msp-uart.pl script:
+  msp-uart.pl -- calculates the uart registers for MSP430
+
+  Copyright (C) 2002 - Pedro Zorzenon Neto - pzn dot debian dot org
+ **/
+typedef enum {
+  //32KHZ = 32,768 Hz, 1MHZ = 1,048,576 Hz
+  UBR_32KHZ_1200=0x001B,    UMCTL_32KHZ_1200=0x94,
+  UBR_32KHZ_1800=0x0012,    UMCTL_32KHZ_1800=0x84,
+  UBR_32KHZ_2400=0x000D,    UMCTL_32KHZ_2400=0x6D,
+  UBR_32KHZ_4800=0x0006,    UMCTL_32KHZ_4800=0x77,
+  UBR_32KHZ_9600=0x0003,    UMCTL_32KHZ_9600=0x29,  // (Warning: triggers MSP430 errata US14)
+
+  UBR_1MHZ_1200=0x0369,   UMCTL_1MHZ_1200=0x7B,
+  UBR_1MHZ_1800=0x0246,   UMCTL_1MHZ_1800=0x55,
+  UBR_1MHZ_2400=0x01B4,   UMCTL_1MHZ_2400=0xDF,
+  UBR_1MHZ_4800=0x00DA,   UMCTL_1MHZ_4800=0xAA,
+  UBR_1MHZ_9600=0x006D,   UMCTL_1MHZ_9600=0x44,
+  UBR_1MHZ_19200=0x0036,  UMCTL_1MHZ_19200=0xB5,
+  UBR_1MHZ_38400=0x001B,  UMCTL_1MHZ_38400=0x94,
+  UBR_1MHZ_57600=0x0012,  UMCTL_1MHZ_57600=0x84,
+  UBR_1MHZ_76800=0x000D,  UMCTL_1MHZ_76800=0x6D,
+  UBR_1MHZ_115200=0x0009, UMCTL_1MHZ_115200=0x10,
+  UBR_1MHZ_230400=0x0004, UMCTL_1MHZ_230400=0x55,
+
+  UBR_4MHZ_115200=0x0024, UMCTL_4MHZ_115200=0x29,
+} msp430_uart_rate_t;
+
+typedef struct {
+  unsigned int ubr:16;      //Baud rate (use enum msp430_uart_rate_t for predefined rates)
+  
+  unsigned int umctl: 8;    //Modulation (use enum msp430_uart_rate_t for predefined rates)
+  
+  unsigned int :1;
+  unsigned int mm: 1;       //Multiprocessor mode (0=idle-line protocol; 1=address-bit protocol)
+  unsigned int :1;
+  unsigned int listen: 1;   //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
+  unsigned int clen: 1;     //Character length (0=7-bit data; 1=8-bit data)
+  unsigned int spb: 1;      //Stop bits (0=one stop bit; 1=two stop bits)
+  unsigned int pev: 1;      //Parity select (0=odd; 1=even)
+  unsigned int pena: 1;     //Parity enable (0=disabled; 1=enabled)
+  unsigned int :0;
+  
+  unsigned int :3;
+  unsigned int urxse: 1;    //Receive start-edge detection (0=disabled; 1=enabled)
+  unsigned int ssel: 2;     //Clock source (00=UCLKI; 01=ACLK; 10=SMCLK; 11=SMCLK)
+  unsigned int ckpl: 1;     //Clock polarity (0=normal; 1=inverted)
+  unsigned int :1;
+  
+  unsigned int :2;
+  unsigned int urxwie: 1;   //Wake-up interrupt-enable (0=all characters set URXIFGx; 1=only address sets URXIFGx)
+  unsigned int urxeie: 1;   //Erroneous-character receive (0=rejected; 1=recieved and URXIFGx set)
+  unsigned int :4;
+  unsigned int :0;
+  
+  unsigned int utxe:1;			// 1:enable tx module
+  unsigned int urxe:1;			// 1:enable rx module
+} msp430_uart_config_t;
+
+typedef struct {
+  uint16_t ubr;
+  uint8_t umctl;
+  uint8_t uctl;
+  uint8_t utctl;
+  uint8_t urctl;
+  uint8_t ume;
+} msp430_uart_registers_t;
+
+typedef union {
+  msp430_uart_config_t uartConfig;
+  msp430_uart_registers_t uartRegisters;
+} msp430_uart_union_config_t;
+    
+msp430_uart_union_config_t msp430_uart_default_config = { 
+  {
+    utxe : 1, 
+    urxe : 1, 
+    ubr : UBR_1MHZ_57600, 
+    umctl : UMCTL_1MHZ_57600, 
+    ssel : 0x02, 
+    pena : 0, 
+    pev : 0, 
+    spb : 0, 
+    clen : 1, 
+    listen : 0, 
+    mm : 0, 
+    ckpl : 0, 
+    urxse : 0, 
+    urxeie : 1, 
+    urxwie : 0,
+    utxe : 1,
+    urxe : 1
+  } 
+};
+
+
+
+typedef struct {
+  unsigned int i2cstt: 1; // I2CSTT Bit 0 START bit. (0=No action; 1=Send START condition)
+  unsigned int i2cstp: 1; // I2CSTP Bit 1 STOP bit. (0=No action; 1=Send STOP condition)
+  unsigned int i2cstb: 1; // I2CSTB Bit 2 Start byte. (0=No action; 1=Send START condition and start byte (01h))
+  unsigned int i2cctrx: 1; //I2CTRX Bit 3 I2C transmit. (0=Receive mode; 1=Transmit mode) pin.
+  unsigned int i2cssel: 2; // I2C clock source select. (00=No clock; 01=ACLK; 10=SMCLK; 11=SMCLK)
+  unsigned int i2ccrm: 1;  // I2C repeat mode 
+  unsigned int i2cword: 1; // I2C word mode. Selects byte(=0) or word(=1) mode for the I2C data register.
+} __attribute__ ((packed)) msp430_i2ctctl_t;
+
+DEFINE_UNION_CAST(i2ctctl2int,uint8_t,msp430_i2ctctl_t)
+DEFINE_UNION_CAST(int2i2ctctl,msp430_i2ctctl_t,uint8_t)
+
+typedef struct {
+  unsigned int :1;
+  unsigned int mst: 1;      //Master mode (0=slave; 1=master)
+  unsigned int :1;
+  unsigned int listen: 1;   //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
+  unsigned int xa: 1;       //Extended addressing (0=7-bit addressing; 1=8-bit addressing)
+  unsigned int :1;
+  unsigned int txdmaen: 1;  //DMA to TX (0=disabled; 1=enabled)
+  unsigned int rxdmaen: 1;  //RX to DMA (0=disabled; 1=enabled)
+    
+  unsigned int :4;
+  unsigned int i2cssel: 2;  //Clock source (00=disabled; 01=ACLK; 10=SMCLK; 11=SMCLK)
+  unsigned int i2crm: 1;    //Repeat mode (0=use I2CNDAT; 1=count in software)
+  unsigned int i2cword: 1;  //Word mode (0=byte mode; 1=word mode)
+  
+  unsigned int i2cpsc: 8;   //Clock prescaler (values >0x04 not recomended)
+  
+  unsigned int i2csclh: 8;  //High period (high period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc)
+  
+  unsigned int i2cscll: 8;  //Low period (low period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc)
+  
+  unsigned int i2coa : 10;  // Own address register.
+  unsigned int :6;
+} msp430_i2c_config_t;
+    
+typedef struct {
+  uint8_t uctl;
+  uint8_t i2ctctl;
+  uint8_t i2cpsc;
+  uint8_t i2csclh;
+  uint8_t i2cscll;
+  uint16_t i2coa;
+} msp430_i2c_registers_t;
+
+typedef union {
+  msp430_i2c_config_t i2cConfig;
+  msp430_i2c_registers_t i2cRegisters;
+} msp430_i2c_union_config_t;
+
+msp430_i2c_union_config_t msp430_i2c_default_config = { 
+  {
+    rxdmaen : 0, 
+    txdmaen : 0, 
+    xa : 0, 
+    listen : 0, 
+    mst : 1,
+    i2cword : 0, 
+    i2crm : 1, 
+    i2cssel : 0x2, 
+    i2cpsc : 0, 
+    i2csclh : 0x3, 
+    i2cscll : 0x3,
+    i2coa : 0,
+  } 
+};
+
+typedef uint8_t uart_speed_t;
+typedef uint8_t uart_parity_t;
+typedef uint8_t uart_duplex_t;
+
+enum {
+  TOS_UART_1200   = 0,
+  TOS_UART_1800   = 1,
+  TOS_UART_2400   = 2,
+  TOS_UART_4800   = 3,
+  TOS_UART_9600   = 4,
+  TOS_UART_19200  = 5,
+  TOS_UART_38400  = 6,
+  TOS_UART_57600  = 7,
+  TOS_UART_76800  = 8,
+  TOS_UART_115200 = 9,
+  TOS_UART_230400 = 10
+};
+
+enum {
+  TOS_UART_OFF,
+  TOS_UART_RONLY,
+  TOS_UART_TONLY,
+  TOS_UART_DUPLEX
+};
+
+enum {
+  TOS_UART_PARITY_NONE,
+  TOS_UART_PARITY_EVEN,
+  TOS_UART_PARITY_ODD
+};
+
+#endif//_H_Msp430Usart_h
diff --git a/tos/platforms/shimmer/chips/sd/SD.h b/tos/platforms/shimmer/chips/sd/SD.h
new file mode 100644
index 00000000..80a6aaa2
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/SD.h
@@ -0,0 +1,134 @@
+/* ***********************************************************
+* THIS PROGRAM IS PROVIDED "AS IS". TI MAKES NO WARRANTIES OR
+* REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY, 
+* INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS 
+* FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR 
+* COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE. 
+* TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET 
+* POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY 
+* INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR 
+* YOUR USE OF THE PROGRAM.
+*
+* IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL, 
+* CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY 
+* THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED 
+* OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT 
+* OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM. 
+* EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF 
+* REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS 
+* OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF 
+* USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S 
+* AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF 
+* YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS 
+* (U.S.$500).
+*
+* Unless otherwise stated, the Program written and copyrighted 
+* by Texas Instruments is distributed as "freeware".  You may, 
+* only under TI's copyright in the Program, use and modify the 
+* Program without any charge or restriction.  You may 
+* distribute to third parties, provided that you transfer a 
+* copy of this license to the third party and the third party 
+* agrees to these terms by its first use of the Program. You 
+* must reproduce the copyright notice and any other legend of 
+* ownership on each copy or partial copy, of the Program.
+*
+* You acknowledge and agree that the Program contains 
+* copyrighted material, trade secrets and other TI proprietary 
+* information and is protected by copyright laws, 
+* international copyright treaties, and trade secret laws, as 
+* well as other intellectual property laws.  To protect TI's 
+* rights in the Program, you agree not to decompile, reverse 
+* engineer, disassemble or otherwise translate any object code 
+* versions of the Program to a human-readable form.  You agree 
+* that in no event will you alter, remove or destroy any 
+* copyright notice included in the Program.  TI reserves all 
+* rights not specifically granted under this license. Except 
+* as specifically provided herein, nothing in this agreement 
+* shall be construed as conferring by implication, estoppel, 
+* or otherwise, upon you, any license or other right under any 
+* TI patents, copyrights or trade secrets.
+*
+* You may not use the Program in non-TI devices.
+* ********************************************************* */
+
+/*
+ * Copyright (c) 2006, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * copied and edited from Texas Instruments sample code
+ *
+ * @author Steve Ayer
+ * @date May 2006
+ */
+#ifndef SD_H
+#define SD_H
+
+#define MMC_START_DATA_BLOCK_TOKEN          0xfe   // Data token start byte, Start Single Block Read
+
+#define MMC_R1_RESPONSE       0x00
+
+typedef uint8_t mmcerror_t;
+#define MMC_SUCCESS           0x00
+#define MMC_BLOCK_SET_ERROR   0x01
+#define MMC_RESPONSE_ERROR    0x02
+#define MMC_DATA_TOKEN_ERROR  0x03
+#define MMC_INIT_ERROR        0x04
+#define MMC_CRC_ERROR         0x10
+#define MMC_WRITE_ERROR       0x11
+#define MMC_OTHER_ERROR       0x12
+#define MMC_TIMEOUT_ERROR     0xFF
+
+#define MMC_GO_IDLE_STATE          0x40     //CMD0
+#define MMC_SEND_OP_COND           0x41     //CMD1
+#define MMC_READ_CSD               0x49     //CMD9
+#define MMC_SEND_CID               0x4a     //CMD10
+#define MMC_STOP_TRANSMISSION      0x4c     //CMD12
+#define MMC_SEND_STATUS            0x4d     //CMD13
+#define MMC_SET_BLOCKLEN           0x50     //CMD16 Set block length for next read/write
+#define MMC_READ_SINGLE_BLOCK      0x51     //CMD17 Read block from memory
+#define MMC_READ_MULTIPLE_BLOCK    0x52     //CMD18
+#define MMC_CMD_WRITEBLOCK         0x54     //CMD20 Write block to memory
+#define MMC_WRITE_BLOCK            0x58     //CMD24
+#define MMC_WRITE_MULTIPLE_BLOCK   0x59     //CMD25
+#define MMC_WRITE_CSD              0x5b     //CMD27 PROGRAM_CSD
+#define MMC_SET_WRITE_PROT         0x5c     //CMD28
+#define MMC_CLR_WRITE_PROT         0x5d     //CMD29
+#define MMC_SEND_WRITE_PROT        0x5e     //CMD30
+#define MMC_TAG_SECTOR_START       0x60     //CMD32
+#define MMC_TAG_SECTOR_END         0x61     //CMD33
+#define MMC_UNTAG_SECTOR           0x62     //CMD34
+#define MMC_TAG_EREASE_GROUP_START 0x63     //CMD35
+#define MMC_TAG_EREASE_GROUP_END   0x64     //CMD36
+#define MMC_UNTAG_EREASE_GROUP     0x65     //CMD37
+#define MMC_EREASE                 0x66     //CMD38
+#define MMC_READ_OCR               0x67     //CMD39
+#define MMC_CRC_ON_OFF             0x68     //CMD40
+
+
+#endif
diff --git a/tos/platforms/shimmer/chips/sd/SD.nc b/tos/platforms/shimmer/chips/sd/SD.nc
new file mode 100644
index 00000000..243d53e9
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/SD.nc
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2006, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Interface for communciating with an SD card via a standard sd card slot.
+ *
+ * @author Steve Ayer
+ * @author Konrad Lorincz
+ * @date May 2006
+ */                      
+#include "SD.h"
+
+interface SD {
+  /**
+   * Returns the card size in bytes.
+   *
+   * @return the card size in bytes.
+   */
+  command uint32_t readCardSize();
+
+  /**
+   * Reads 512 bytes from the SD at sector and copies it to bufferPtr
+   *
+   * @param sector the sector on the SD card (in multiples of 512 bytes).
+   * @param bufferPtr pointer to where the SD will copy the data to.  Must be 512 bytes.
+   * @return <code>SUCCESS<code> if it was read successfully; <code>FAIL<code> otherwise
+   */
+  command error_t readBlock(const uint32_t sector, uint8_t * buffer);
+
+  /**
+   * Writes 512 bytes from the bufferPtr to the SD card
+   *
+   * @param sector the sector on the SD card (in multiples of 512 bytes
+   *                       where to write the data to).
+   * @param bufferPtr pointer to data to be added.  Must be 512 bytes.
+   * @return <code>SUCCESS<code> if it was written successfully; <code>FAIL<code> otherwise
+   */
+  command error_t writeBlock(const uint32_t sector, uint8_t * buffer);
+
+  /**
+   * the device has control over the sd card
+   */
+  async event void available();     
+
+  /**
+   * the device has lost control of the sd and should cease 
+   * attempts to talk to the card
+   */
+  async event void unavailable();
+}
diff --git a/tos/platforms/shimmer/chips/sd/SDC.nc b/tos/platforms/shimmer/chips/sd/SDC.nc
new file mode 100644
index 00000000..13626920
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/SDC.nc
@@ -0,0 +1,56 @@
+/**
+ * Copyright (c) 2005 Hewlett-Packard Company
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of the Hewlett-Packard Company nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * communicate with a micro-sd slot wired to a telosb header
+ */
+/**                                   
+ * @author Steve Ayer
+ * @date   July 2006
+ * @date   July 2009 (reworked, updated to maintained version)
+ * @author Konrad Lorincz
+ * @date March 25, 2008 - ported to TOS 2.x
+ */
+
+configuration SDC {
+  provides {
+    interface SD;
+    interface StdControl;
+  }
+}
+implementation {
+  components SDP, new Msp430Usart0C(), HplMsp430InterruptP, LedsC;
+  
+  SD = SDP;
+  StdControl = SDP;
+
+  SDP.Usart -> Msp430Usart0C;
+  SDP.DockInterrupt  -> HplMsp430InterruptP.Port25;
+  SDP.Leds       -> LedsC;
+}
diff --git a/tos/platforms/shimmer/chips/sd/SDP.nc b/tos/platforms/shimmer/chips/sd/SDP.nc
new file mode 100644
index 00000000..4a5bea2f
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/SDP.nc
@@ -0,0 +1,621 @@
+/* ***********************************************************
+* THIS PROGRAM IS PROVIDED "AS IS". TI MAKES NO WARRANTIES OR
+* REPRESENTATIONS, EITHER EXPRESS, IMPLIED OR STATUTORY, 
+* INCLUDING ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS 
+* FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR 
+* COMPLETENESS OF RESPONSES, RESULTS AND LACK OF NEGLIGENCE. 
+* TI DISCLAIMS ANY WARRANTY OF TITLE, QUIET ENJOYMENT, QUIET 
+* POSSESSION, AND NON-INFRINGEMENT OF ANY THIRD PARTY 
+* INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO THE PROGRAM OR 
+* YOUR USE OF THE PROGRAM.
+*
+* IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, INCIDENTAL, 
+* CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY 
+* THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED 
+* OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT 
+* OF THIS AGREEMENT, THE PROGRAM, OR YOUR USE OF THE PROGRAM. 
+* EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF 
+* REMOVAL OR REINSTALLATION, COMPUTER TIME, LABOR COSTS, LOSS 
+* OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, OR LOSS OF 
+* USE OR INTERRUPTION OF BUSINESS. IN NO EVENT WILL TI'S 
+* AGGREGATE LIABILITY UNDER THIS AGREEMENT OR ARISING OUT OF 
+* YOUR USE OF THE PROGRAM EXCEED FIVE HUNDRED DOLLARS 
+* (U.S.$500).
+*
+* Unless otherwise stated, the Program written and copyrighted 
+* by Texas Instruments is distributed as "freeware".  You may, 
+* only under TI's copyright in the Program, use and modify the 
+* Program without any charge or restriction.  You may 
+* distribute to third parties, provided that you transfer a 
+* copy of this license to the third party and the third party 
+* agrees to these terms by its first use of the Program. You 
+* must reproduce the copyright notice and any other legend of 
+* ownership on each copy or partial copy, of the Program.
+*
+* You acknowledge and agree that the Program contains 
+* copyrighted material, trade secrets and other TI proprietary 
+* information and is protected by copyright laws, 
+* international copyright treaties, and trade secret laws, as 
+* well as other intellectual property laws.  To protect TI's 
+* rights in the Program, you agree not to decompile, reverse 
+* engineer, disassemble or otherwise translate any object code 
+* versions of the Program to a human-readable form.  You agree 
+* that in no event will you alter, remove or destroy any 
+* copyright notice included in the Program.  TI reserves all 
+* rights not specifically granted under this license. Except 
+* as specifically provided herein, nothing in this agreement 
+* shall be construed as conferring by implication, estoppel, 
+* or otherwise, upon you, any license or other right under any 
+* TI patents, copyrights or trade secrets.
+*
+* You may not use the Program in non-TI devices.
+* ********************************************************* */
+
+/*
+ * Copyright (c) 2006, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Operations for communciating with an SD card via a standard sd card slot.
+ *
+ * functional pieces based upon or copied from Texas Instruments sample code
+ *
+ * @author  Steve Ayer
+ * @date    May 2006
+ * @date    July 2009  (extensive rework, tep conformance)
+ * @author  Konrad Lorincz  (initial port to tos-2)
+ * @date    March 25, 2008
+ */
+
+#include "SD.h"
+#include "msp430usart.h"
+
+module SDP {
+  provides {
+    interface StdControl;
+    interface SD;
+  }
+  uses {
+    interface HplMsp430Usart as Usart;
+    interface HplMsp430Interrupt as DockInterrupt;
+    interface Leds;
+  }
+}
+
+implementation {
+  error_t cardInit();
+  
+#define SPI_TX_DONE        while(call Usart.isTxEmpty() == FALSE);
+
+#define CS_LOW()    TOSH_CLR_SD_CS_N_PIN();              // Card Select
+#define CS_HIGH()   SPI_TX_DONE; TOSH_SET_SD_CS_N_PIN();
+
+  /* 
+   * this routine is supposed to prevent windows from locking up when 
+   * the device is docked.
+   */
+  void powerCycle() {
+    // wait until the tx buf is clear before killing the card
+    CS_HIGH();
+
+    // this connects the path from mcu to card
+    TOSH_MAKE_DOCK_N_OUTPUT();
+    TOSH_SET_DOCK_N_PIN();
+
+    TOSH_SET_SW_SD_PWR_N_PIN();    
+    TOSH_CLR_SD_CS_N_PIN();             
+
+    /* 
+     * here we have to clear all input pins to the card, as
+     * the card in spi mode will leech power from any pin
+     */
+    call Usart.disableSpi();
+    TOSH_CLR_SD_DI_PIN();
+    TOSH_CLR_SD_DO_PIN();
+    TOSH_CLR_SD_CLK_PIN();
+
+    TOSH_uwait(60000);  
+
+    TOSH_SET_SD_CS_N_PIN();             
+    TOSH_CLR_SW_SD_PWR_N_PIN();    
+
+    // undo the override above
+    TOSH_MAKE_DOCK_N_INPUT();
+  }
+    
+  command error_t StdControl.start(){
+    TOSH_CLR_SW_SD_PWR_N_PIN();    // powers up module on models so equipped
+
+    /* 
+     * this pin, when low, tells us that the sd card is unavailable to the processor
+     * it should be attached to a pullup unless platform has a docking pin doing an sd override;
+     * generally, we need to avoid talking to the sd with the mcu when the pin is low;
+     * if it's low now, we'll fire an interrupt when the sd is available to software.
+     */
+    if(!TOSH_READ_DOCK_N_PIN()){
+      call DockInterrupt.edge(TRUE);    // watch for it to go high, off the dock
+      powerCycle();
+      signal SD.unavailable();
+    }
+    else{
+      call DockInterrupt.edge(FALSE);    // tell us when we're docked
+
+      cardInit();
+
+      signal SD.available();
+    }
+
+    call DockInterrupt.enable();
+    call DockInterrupt.clear();
+    
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop(){
+    TOSH_SET_SW_SD_PWR_N_PIN();    // powers down module
+    TOSH_CLR_SD_CS_N_PIN();
+
+    call DockInterrupt.disable();
+    call DockInterrupt.clear();
+
+    return SUCCESS;
+  }
+
+  async event void DockInterrupt.fired() {
+    if (call DockInterrupt.getValue() == TRUE){      // off the dock
+      powerCycle();
+
+      cardInit();
+
+      call DockInterrupt.edge(FALSE);
+      signal SD.available();                         // tell the app that it can talk to the sd card
+    }
+    else{
+      call DockInterrupt.edge(TRUE);      
+      signal SD.unavailable();                         // tell the app to stop talking to the card
+      powerCycle();
+    }
+    call DockInterrupt.clear();
+  }
+
+  void initSPI() {
+    msp430_spi_union_config_t * config;
+
+    TOSH_MAKE_SD_CS_N_OUTPUT();
+    TOSH_SEL_SD_CS_N_IOFUNC();
+
+    config = &msp430_spi_default_config;
+    
+    call Usart.setModeSpi(config);
+
+    /*
+     * set the clock to 115200 for sd init, default is smclk / 2
+     * cardInit raises speed back to smclk / 2 at end of init routine
+     */
+
+#ifndef SMCLK_4MHZ
+    call Usart.setUbr(UBR_1MHZ_115200);
+    call Usart.setUmctl(UMCTL_1MHZ_115200);
+#else
+    call Usart.setUbr(0x0024);
+    call Usart.setUmctl(0x0029);
+#endif
+
+    call Usart.enableRxIntr();
+
+    TOSH_SET_SD_CS_N_PIN();
+
+    while(call Usart.isTxEmpty() == FALSE);
+  }
+
+  uint8_t spiSendByte (const uint8_t data){
+    atomic{
+      while(call Usart.isTxEmpty() == FALSE);   
+      
+      call Usart.tx(data);
+      
+      while(call Usart.isRxIntrPending() == FALSE);    // rx buffer has a character
+    }
+    
+    return call Usart.rx();
+  }
+  
+  void sendCmd(const uint8_t cmd, uint32_t data, const uint8_t crc){
+    uint8_t frame[6];
+    register int8_t i;
+
+    frame[0] = cmd | 0x40;
+    for(i = 3; i >= 0; i--)
+      frame[4 - i] = (uint8_t)(data >> 8 * i);
+
+    frame[5] = crc;
+    for(i = 0; i < 6; i++)
+      spiSendByte(frame[i]);
+  }
+
+  /* Response comes 1-8bytes after command
+   * the first bit will be a 0
+   * followed by an error code
+   * data will be 0xff until response
+   */
+  uint8_t getResponse()
+  {
+    register int i=0;
+    uint8_t response;
+
+    for(i = 0; i < 65; i++){
+      if(((response = spiSendByte(0xff)) == 0x00) | 
+	 (response == 0x01))
+	break;
+    }
+    return response;
+  }
+
+  uint8_t getXXResponse(const uint8_t resp){
+    register uint16_t i;
+    uint8_t response;
+    
+    for(i = 0; i < 1001; i++)
+      if((response = spiSendByte(0xff)) == resp)
+	break;
+    
+    return response;
+  }
+
+  uint8_t checkBusy(){
+    register uint8_t i, j;
+    uint8_t response, rvalue;
+    
+    for(i = 0; i < 65; i++){
+      response = spiSendByte(0xff);
+      response &= 0x1f;
+      
+      switch(response){
+      case 0x05: 
+	rvalue = MMC_SUCCESS;
+	break;
+      case 0x0b: 
+	return MMC_CRC_ERROR;
+      case 0x0d: 
+	return MMC_WRITE_ERROR;
+      default:
+	rvalue = MMC_OTHER_ERROR;
+	break;
+      }
+	
+      if(rvalue == MMC_SUCCESS)
+	break;
+    }
+    
+    //    while((response = spiSendByte(0xff)) == 0);   // sma sez DANGER!  use some kinda timeout!
+    for(j = 0; j < 512; j++){
+      if(spiSendByte(0xff)){
+	break;
+      }
+    }
+    
+    return response;
+  }
+
+  error_t setIdle(){
+    char response;
+    CS_LOW();
+
+    // put card in SPI mode
+    sendCmd(MMC_GO_IDLE_STATE, 0, 0x95);
+
+    // confirm that card is READY 
+    if((response = getResponse()) != 0x01)
+      return MMC_INIT_ERROR;
+
+    do{
+      CS_HIGH();
+      spiSendByte(0xff);
+      CS_LOW();
+      sendCmd(MMC_SEND_OP_COND, 0x00, 0xff);
+    }while((response = getResponse()) == 0x01);
+
+    CS_HIGH();
+    spiSendByte(0xff);
+
+    return MMC_SUCCESS;
+  }
+
+  error_t cardInit(){
+    register uint8_t i;
+    uint8_t r;
+
+    initSPI();
+
+    CS_HIGH();
+
+    for(i = 0; i < 10; i++)
+      spiSendByte(0xff);
+    
+    r = setIdle();
+
+    // here's where we set the clock speed up to smclk / 2 (512k)
+    
+    call Usart.setUbr(0x0002);
+    call Usart.setUmctl(0x00);
+
+    return r;
+  }
+
+  // change block length to 2^len bytes; default is 512
+  error_t setBlockLength (const uint16_t len) {
+    CS_LOW ();
+
+    sendCmd(MMC_SET_BLOCKLEN, len, 0xff);
+
+    // get response from card, should be 0; so, shouldn't this be 'while'?
+    if(getResponse() != 0x00){
+      cardInit();
+      sendCmd(MMC_SET_BLOCKLEN, len, 0xff);
+      getResponse();
+    }
+
+    CS_HIGH ();
+
+    // Send 8 Clock pulses of delay.
+    spiSendByte(0xff);
+
+    return MMC_SUCCESS;
+  }
+    
+  /* 
+   * renamed to clear the way for renaming what was readSector -- which called this -- 
+   * to be renamed readBlock.  --sma
+   */
+  
+  error_t read_block(const uint32_t address, const uint16_t count, uint8_t * buffer){
+    register uint16_t i = 0;
+    uint8_t rvalue = MMC_RESPONSE_ERROR;
+    
+    // Set the block length to read
+    if(setBlockLength(count) == MMC_SUCCESS){   // block length can be set
+      CS_LOW ();
+      
+      sendCmd(MMC_READ_SINGLE_BLOCK, address, 0xff);
+      // Send 8 Clock pulses of delay, check if the MMC acknowledged the read block command
+      // it will do this by sending an affirmative response
+      // in the R1 format (0x00 is no errors)
+      if(getResponse() == 0x00){
+	// now look for the data token to signify the start of the data
+	if(getXXResponse(MMC_START_DATA_BLOCK_TOKEN) == MMC_START_DATA_BLOCK_TOKEN){
+	  
+	  // clock the actual data transfer and receive the bytes; spi_read automatically finds the Data Block
+	  for (i = 0; i < count; i++)
+	    buffer[i] = spiSendByte(0xff);   // is executed with card inserted
+	  
+	  // get CRC bytes (not really needed by us, but required by MMC)
+	  spiSendByte(0xff);
+	  spiSendByte(0xff);
+	  rvalue = MMC_SUCCESS;
+	}
+	else{
+	  // the data token was never received
+	  rvalue = MMC_DATA_TOKEN_ERROR;      // 3
+	}
+      }
+      else{
+	// the MMC never acknowledge the read command
+	rvalue = MMC_RESPONSE_ERROR;          // 2
+      }
+    }
+    else{
+      rvalue = MMC_BLOCK_SET_ERROR;           // 1
+    }
+    
+    CS_HIGH ();
+    spiSendByte(0xff);
+    
+    return rvalue;
+  }
+
+  /*
+   * need to test dock pin for some platforms
+   * on others this will be attached to a pullup
+   */
+  command error_t SD.readBlock(const uint32_t sector, uint8_t * buffer) {
+    if(!TOSH_READ_DOCK_N_PIN())
+      return MMC_INIT_ERROR;
+
+    return read_block(sector * 512, 512, buffer);
+  }
+
+  error_t write_block(const uint32_t address, const uint16_t count, uint8_t * buffer){
+    register uint16_t i;
+    uint8_t rvalue = MMC_RESPONSE_ERROR;         // MMC_SUCCESS;
+
+    // Set the block length to write
+    if(setBlockLength (count) == MMC_SUCCESS){   // block length could be set
+      CS_LOW ();
+      sendCmd(MMC_WRITE_BLOCK, address, 0xff);
+
+      // check if the MMC acknowledged the write block command
+      // it will do this by sending an affirmative response
+      // in the R1 format (0x00 is no errors)
+      if(getXXResponse(MMC_R1_RESPONSE) == MMC_R1_RESPONSE){
+	spiSendByte(0xff);
+	// send the data token to signify the start of the data
+	spiSendByte(0xfe);
+	// clock the actual data transfer and transmitt the bytes
+
+	for(i = 0; i < count; i++)
+	  spiSendByte(buffer[i]);            
+
+	// put CRC bytes (not really needed by us, but required by MMC)
+	spiSendByte(0xff);
+	spiSendByte(0xff);
+	// read the data response xxx0<status>1 : status 010: Data accected, status 101: Data
+	//   rejected due to a crc error, status 110: Data rejected due to a Write error.
+	checkBusy();
+	rvalue = MMC_SUCCESS;
+      }
+      else{
+	// the MMC never acknowledge the write command
+	rvalue = MMC_RESPONSE_ERROR;   // 2
+      }
+    }
+    else{
+      rvalue = MMC_BLOCK_SET_ERROR;   // 1
+    }
+
+    CS_HIGH ();
+    // Send 8 Clock pulses of delay.
+    spiSendByte(0xff);
+
+    return rvalue;
+  }
+
+  command error_t SD.writeBlock(const uint32_t sector, uint8_t * buffer){
+    /*
+     * need to test dock pin for some platforms
+     * on others this will be attached to a pullup
+     */
+    if(!TOSH_READ_DOCK_N_PIN())
+      return MMC_INIT_ERROR;
+
+    return write_block(sector * 512, 512, buffer);
+  }
+
+  /*
+   * feel our way out over the cliff of the card to estimate the size
+   * turns out cmd9 is not supported on sdio, as there's no csd register
+   */
+  uint32_t hackGetCardSize() {
+    uint32_t howbig = 0;
+    uint8_t b[512];
+    error_t failed;
+    
+    /* we'll estimate based upon popular sizes of cards, e.g. 128mb, 256 mb, 512mb, 1gb, 2gb
+     * experimentally, we find that 512mb == ~990900 sectors, 1gb == ~1983000 sectors
+     * extrapolating down, we'll say that 247700 should be readable on a 128mb
+     * reading beyond that returns an error
+     */
+
+    failed = call SD.readBlock(0, b);
+    failed = call SD.readBlock(200000, b);
+    // if we can't get this far, we're toast anyway
+    if(!failed){
+      howbig = 247000;
+      while(!call SD.readBlock(howbig, b)){
+	howbig = howbig * 2;
+      }
+      howbig = howbig / 2;
+    }
+    return howbig;
+  }
+
+  // Read the Card Size from the CSD Register
+  // this command is unsupported on sdio-only, like sandisk micro sd cards
+  command uint32_t SD.readCardSize(){
+    // Read contents of Card Specific Data (CSD)
+
+    uint32_t MMC_CardSize = 0;
+    uint16_t i, j, b, response, mmc_C_SIZE;
+    uint8_t mmc_READ_BL_LEN, mmc_C_SIZE_MULT;
+
+    //    return hackGetCardSize();
+    
+    CS_LOW ();
+
+    spiSendByte(MMC_READ_CSD);   // CMD 9
+    for(i = 0; i < 4; i++)      // Send four dummy bytes
+      spiSendByte(0);
+
+    spiSendByte(0xff);   // Send CRC byte
+
+    response = getResponse();
+
+    // data transmission always starts with 0xFE
+    b = spiSendByte(0xff);
+
+    if(!response){
+
+      while(b != 0xfe) 
+	b = spiSendByte(0xff);
+      // bits 127:87
+      for(j = 0; j < 5; j++)          // Host must keep the clock running for at
+	b = spiSendByte(0xff);
+
+
+      // 4 bits of READ_BL_LEN
+      // bits 84:80
+      b = spiSendByte(0xff);  // lower 4 bits of CCC and
+      mmc_READ_BL_LEN = b & 0x0f;
+
+      b = spiSendByte(0xff);
+
+      // bits 73:62  C_Size
+      // xxCC CCCC CCCC CC
+      mmc_C_SIZE = (b & 0x03) << 10;
+      b = spiSendByte(0xff);
+      mmc_C_SIZE += b << 2;
+      b = spiSendByte(0xff);
+      mmc_C_SIZE += b >> 6;
+
+      // bits 55:53
+      b = spiSendByte(0xff);
+
+      // bits 49:47
+      mmc_C_SIZE_MULT = (b & 0x03) << 1;
+      b = spiSendByte(0xff);
+      mmc_C_SIZE_MULT += b >> 7;
+
+      // bits 41:37
+      b = spiSendByte(0xff);
+
+      b = spiSendByte(0xff);
+
+      b = spiSendByte(0xff);
+
+      b = spiSendByte(0xff);
+
+      b = spiSendByte(0xff);
+
+      for(j = 0; j < 4; j++)          // Host must keep the clock running for at
+	b = spiSendByte(0xff);  // least Ncr (max = 4 bytes) cycles after
+      // the card response is received
+      b = spiSendByte(0xff);
+      CS_LOW ();
+
+      MMC_CardSize = (mmc_C_SIZE + 1);
+      for(i = 2, j = mmc_C_SIZE_MULT + 2; j > 1; j--)
+	i <<= 1;
+      MMC_CardSize *= i;
+      for(i = 2,j = mmc_READ_BL_LEN; j > 1; j--)
+	i <<= 1;
+      MMC_CardSize *= i;
+ 
+    }
+    return MMC_CardSize;
+  }
+
+}
diff --git a/tos/platforms/shimmer/chips/sd/Storage_chip.h b/tos/platforms/shimmer/chips/sd/Storage_chip.h
new file mode 100644
index 00000000..179a6c38
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/Storage_chip.h
@@ -0,0 +1,38 @@
+/**
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2008-06-30 00:39:34 $
+ */
+
+#ifndef STORAGE_CHIP_H
+#define STORAGE_CHIP_H
+
+#endif
diff --git a/tos/platforms/shimmer/chips/sd/fatfs/FatFs.h b/tos/platforms/shimmer/chips/sd/fatfs/FatFs.h
new file mode 100644
index 00000000..5f5e021e
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/fatfs/FatFs.h
@@ -0,0 +1,774 @@
+/*----------------------------------------------------------------------------/
+  FatFs module is an open source project to implement FAT file system to small
+  embedded systems. It is opened for education, research and development under
+  license policy of following trems.
+
+  Copyright (C) 2009, ChaN, all right reserved.
+
+  * The FatFs module is a free software and there is no warranty.
+  * You can use, modify and/or redistribute it for personal, non-profit or
+  commercial use without any restriction under your responsibility.
+  * Redistributions of source code must retain the above copyright notice.
+
+  ----------------------------------------------------------------------------*/
+/*
+ * Portions of this code:
+ *
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * tinyos port of ChaN's FatFs module (thank you!):
+ *
+ * @author Steve Ayer
+ * @date   April, 2009
+ * ported to tos-2.x
+ * @date January, 2010
+ */
+
+#include <integer.h>
+
+/*---------------------------------------------------------------------------/
+/  FatFs - FAT file system module configuration file  R0.07e  (C)ChaN, 2009
+           ffconf.h
+
+   NOTE: these are not broken out to ffconf.h in tinyos for maintenance reasons
+         that make sense right now...
+/----------------------------------------------------------------------------*/
+#ifndef _FATFS
+#define _FATFS 0x007E
+
+#define REALTIME	1
+
+#if REALTIME
+#warning "Using enhanced/optimized version of FatFs............."
+#endif
+
+/*---------------------------------------------------------------------------/
+/ Function and Buffer Configurations
+/----------------------------------------------------------------------------*/
+#define	_FS_TINY	0
+/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
+   /  object instead of the sector buffer in the individual file object for file
+   /  data transfer. This reduces memory consumption 512 bytes each file object. */
+
+#define _FS_READONLY	0
+/* Setting _FS_READONLY to 1 defines read only configuration. This removes
+   /  writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
+   /  f_truncate and useless f_getfree. */
+
+
+#define _FS_MINIMIZE	0
+/* The _FS_MINIMIZE option defines minimization level to remove some functions.
+   /
+   /   0: Full function.
+   /   1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename
+   /      are removed.
+   /   2: f_opendir and f_readdir are removed in addition to level 1.
+   /   3: f_lseek is removed in addition to level 2. */
+
+
+
+#define	_USE_STRFUNC	1
+/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
+
+
+#define	_USE_MKFS	1
+/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */
+
+
+#define	_USE_FORWARD	0
+/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */
+
+
+/*---------------------------------------------------------------------------/
+/ Locale and Namespace Configurations
+/----------------------------------------------------------------------------*/
+#define _CODE_PAGE	437
+/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
+   /
+   /   932  - Japanese Shift-JIS (DBCS, OEM, Windows)
+   /   936  - Simplified Chinese GBK (DBCS, OEM, Windows)
+   /   949  - Korean (DBCS, OEM, Windows)
+   /   950  - Traditional Chinese Big5 (DBCS, OEM, Windows)
+   /   1250 - Central Europe (Windows)
+   /   1251 - Cyrillic (Windows)
+   /   1252 - Latin 1 (Windows)
+   /   1253 - Greek (Windows)
+   /   1254 - Turkish (Windows)
+   /   1255 - Hebrew (Windows)
+   /   1256 - Arabic (Windows)
+   /   1257 - Baltic (Windows)
+   /   1258 - Vietnam (OEM, Windows)
+   /   437  - U.S. (OEM)
+   /   720  - Arabic (OEM)
+   /   737  - Greek (OEM)
+   /   775  - Baltic (OEM)
+   /   850  - Multilingual Latin 1 (OEM)
+   /   858  - Multilingual Latin 1 + Euro (OEM)
+   /   852  - Latin 2 (OEM)
+   /   855  - Cyrillic (OEM)
+   /   866  - Russian (OEM)
+   /   857  - Turkish (OEM)
+   /   862  - Hebrew (OEM)
+   /   874  - Thai (OEM, Windows)
+   /	1 - ASCII (Valid for only non LFN cfg.)
+*/
+
+#define	_USE_LFN	1
+#define	_MAX_LFN	255		/* Maximum LFN length to handle (max:255) */
+/* The _USE_LFN option switches the LFN support.
+   /
+   /   0: Disable LFN.
+   /   1: Enable LFN with static working buffer on the bss. Not re-entrant.
+   /   2: Enable LFN with dynamic working buffer on the caller's 'stack'.
+   /
+   /  The working buffer occupies (_MAX_LFN + 1) * 2 bytes. When enable LFN,
+   /  a Unicode - OEM code conversion function ff_convert() must be linked. */
+
+
+#define	_LFN_UNICODE	0	/* 0 or 1 */
+/* To switch the character code set on FatFs API to Unicode,
+/  enable LFN feature and set _LFN_UNICODE to 1.
+*/
+
+#define _FS_RPATH	1
+/* When _FS_RPATH is set to 1, relative path feature is enabled and f_chdir,
+   /  f_chdrive function are available.
+   /  Note that output of the f_readdir fnction is affected by this option. */
+
+
+/*---------------------------------------------------------------------------/
+/ Physical Drive Configurations
+/----------------------------------------------------------------------------*/
+#define _DRIVES		1
+/* Number of volumes (logical drives) to be used. */
+
+
+#define	_MAX_SS	512
+/* Maximum sector size to be handled. (512/1024/2048/4096) */
+/* 512 for memroy card and hard disk, 1024 for floppy disk, 2048 for MO disk */
+
+#define	_MULTI_PARTITION	0
+/* When _MULTI_PARTITION is set to 0, each volume is bound to same physical
+   / drive number and can mount only 1st primaly partition. When it is set to 1,
+   / each volume is tied to the partition listed in Drives[]. */
+
+
+/*---------------------------------------------------------------------------/
+/ System Configurations
+/----------------------------------------------------------------------------*/
+#define _WORD_ACCESS	0
+/* The _WORD_ACCESS option defines which access method is used to the word
+   /  data in the FAT structure.
+   /
+   /   0: Byte-by-byte access. Always compatible with all platforms.
+   /   1: Word access. Do not choose this unless following condition is met.
+   /
+   /  When the byte order on the memory is big-endian or address miss-aligned
+   /  word access results incorrect behavior, the _WORD_ACCESS must be set to 0.
+   /  If it is not the case, the value can also be set to 1 to improve the
+   /  performance and code efficiency. */
+
+#define _FS_REENTRANT	0
+#define _TIMEOUT		1000
+#define	_SYNC_t			HANDLE	/* Type of sync object used on the OS. e.g. HANDLE, OS_EVENT*, ID and etc.. */
+/* To make the FatFs module re-entrant, set _FS_REENTRANT to 1 and add user
+   /  provided synchronization handlers, ff_req_grant, ff_rel_grant, ff_del_syncobj
+   /  and ff_cre_syncobj function to the project. */
+
+
+/* End of configuration options. Do not change followings without care.     */
+/*--------------------------------------------------------------------------*/
+
+
+#if _MAX_SS == 512
+#define	SS(fs)	512
+#else
+#if _MAX_SS == 1024 || _MAX_SS == 2048 || _MAX_SS == 4096
+#define	SS(fs)	((fs)->s_size)
+#else
+#error Sector size must be 512, 1024, 2048 or 4096.
+#endif
+#endif
+
+/* Type of file name on FatFs API */
+
+#if _LFN_UNICODE && _USE_LFN
+typedef WCHAR XCHAR;	/* Unicode */
+#else
+typedef char XCHAR;		/* SBCS, DBCS */
+#endif
+
+
+/* File system object structure */
+
+typedef struct _FATFS_ {
+  BYTE	  fs_type;	/* FAT sub type */
+  BYTE	  drive;	/* Physical drive number */
+  BYTE	  csize;	/* Number of sectors per cluster */
+  BYTE	  n_fats;	/* Number of FAT copies */
+  BYTE	  wflag;	/* win[] dirty flag (1:must be written back) */
+  BYTE	  fsi_flag;	/* fsinfo dirty flag (1:must be written back) */
+  WORD	  id;		/* File system mount ID */
+  WORD	  n_rootdir;	/* Number of root directory entries (0 on FAT32) */
+#if _FS_REENTRANT
+  _SYNC_t sobj;		/* Identifier of sync object */
+#endif
+#if _MAX_SS != 512
+  WORD	  s_size;	/* Sector size */
+#endif
+#if !_FS_READONLY
+  DWORD	  last_clust;	/* Last allocated cluster */
+  DWORD	  free_clust;	/* Number of free clusters */
+  DWORD	  fsi_sector;	/* fsinfo sector */
+#endif
+#if _FS_RPATH
+  DWORD	  cdir;		/* Current directory (0:root)*/
+#endif
+  DWORD	  sects_fat;	/* Sectors per fat */
+  DWORD	  max_clust;	/* Maximum cluster# + 1. Number of clusters is max_clust - 2 */
+  DWORD	  fatbase;	/* FAT start sector */
+  DWORD	  dirbase;	/* Root directory start sector (Cluster# on FAT32) */
+  DWORD	  database;	/* Data start sector */
+  DWORD	  winsect;	/* Current sector appearing in the win[] */
+#if REALTIME
+  BYTE	  *win;
+  BYTE	  win_dflt[_MAX_SS];
+  BYTE	  win_alt[_MAX_SS];
+  BYTE	  current_buffer;
+  BYTE	  buffer_used;
+  DWORD	  win_alt_sector;
+#else
+  BYTE	  win[_MAX_SS];  /* Disk access window for Directory/FAT */
+#endif
+} FATFS;
+
+
+
+/* Directory object structure */
+
+typedef struct _DIR_ {
+  FATFS* fs;		/* Pointer to the owner file system object */
+  WORD	 id;		/* Owner file system mount ID */
+  WORD	 index;		/* Current read/write index number */
+  DWORD	 sclust;	/* Table start cluster (0:Static table) */
+  DWORD	 clust;		/* Current cluster */
+  DWORD	 sect;		/* Current sector */
+  BYTE*	 dir;		/* Pointer to the current SFN entry in the win[] */
+  BYTE*	 fn;		/* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */
+#if _USE_LFN
+  WCHAR* lfn;		/* Pointer to the LFN working buffer */
+  WORD	 lfn_idx;	/* Last matched LFN index number (0xFFFF:No LFN) */
+#endif
+} DIR;
+
+
+
+/* File object structure */
+
+typedef struct _FIL_ {
+  FATFS* fs;		/* Pointer to the owner file system object */
+  WORD	 id;		/* Owner file system mount ID */
+  BYTE	 flag;		/* File status flags */
+  BYTE	 csect;		/* Sector address in the cluster */
+  DWORD	 fptr;		/* File R/W pointer */
+  DWORD	 fsize;		/* File size */
+  DWORD	 org_clust;	/* File start cluster */
+  DWORD	 curr_clust;	/* Current cluster */
+  DWORD	 dsect;		/* Current data sector */
+#if !_FS_READONLY
+  DWORD	 dir_sect;	/* Sector containing the directory entry */
+  BYTE*	 dir_ptr;	/* Ponter to the directory entry in the window */
+#endif
+#if !_FS_TINY
+  BYTE	 buf[_MAX_SS];  /* File R/W buffer */
+#endif
+} FIL;
+
+
+
+/* File status structure */
+
+typedef struct _FILINFO_ {
+  DWORD	 fsize;		/* File size */
+  WORD	 fdate;		/* Last modified date */
+  WORD	 ftime;		/* Last modified time */
+  BYTE	 fattrib;	/* Attribute */
+  char	 fname[13];	/* Short file name (8.3 format) */
+#if _USE_LFN
+  XCHAR* lfname;	/* Pointer to the LFN buffer */
+  int 	 lfsize;	/* Size of LFN buffer [chrs] */
+#endif
+} FILINFO;
+
+
+
+
+/* DBCS code ranges and SBCS extend char conversion table */
+
+#if _CODE_PAGE == 932	/* Japanese Shift-JIS */
+#define _DF1S	0x81	/* DBC 1st byte range 1 start */
+#define _DF1E	0x9F	/* DBC 1st byte range 1 end */
+#define _DF2S	0xE0	/* DBC 1st byte range 2 start */
+#define _DF2E	0xFC	/* DBC 1st byte range 2 end */
+#define _DS1S	0x40	/* DBC 2nd byte range 1 start */
+#define _DS1E	0x7E	/* DBC 2nd byte range 1 end */
+#define _DS2S	0x80	/* DBC 2nd byte range 2 start */
+#define _DS2E	0xFC	/* DBC 2nd byte range 2 end */
+
+#elif _CODE_PAGE == 936	/* Simplified Chinese GBK */
+#define _DF1S	0x81
+#define _DF1E	0xFE
+#define _DS1S	0x40
+#define _DS1E	0x7E
+#define _DS2S	0x80
+#define _DS2E	0xFE
+
+#elif _CODE_PAGE == 949	/* Korean */
+#define _DF1S	0x81
+#define _DF1E	0xFE
+#define _DS1S	0x41
+#define _DS1E	0x5A
+#define _DS2S	0x61
+#define _DS2E	0x7A
+#define _DS3S	0x81
+#define _DS3E	0xFE
+
+#elif _CODE_PAGE == 950	/* Traditional Chinese Big5 */
+#define _DF1S	0x81
+#define _DF1E	0xFE
+#define _DS1S	0x40
+#define _DS1E	0x7E
+#define _DS2S	0xA1
+#define _DS2E	0xFE
+
+#elif _CODE_PAGE == 437	/* U.S. (OEM) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F,0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+      0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 720	/* Arabic (OEM) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x45,0x41,0x84,0x41,0x86,0x43,0x45,0x45,0x45,0x49,0x49,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x49,0x49,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+      0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 737	/* Greek (OEM) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x96,0x97,0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87, \
+      0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0xAA,0x92,0x93,0x94,0x95,0x96,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0x97,0xEA,0xEB,0xEC,0xE4,0xED,0xEE,0xE7,0xE8,0xF1,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 775	/* Baltic (OEM) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x9A,0x91,0xA0,0x8E,0x95,0x8F,0x80,0xAD,0xED,0x8A,0x8A,0xA1,0x8D,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0x95,0x96,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
+      0xA0,0xA1,0xE0,0xA3,0xA3,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xA5,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE3,0xE8,0xE8,0xEA,0xEA,0xEE,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 850	/* Multilingual Latin 1 (OEM) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
+      0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 852	/* Latin 2 (OEM) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xDE,0x8F,0x80,0x9D,0xD3,0x8A,0x8A,0xD7,0x8D,0x8E,0x8F,0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0x9F, \
+      0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD2,0xD5,0xD6,0xD7,0xB7,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xE0,0xE1,0xE2,0xE3,0xE3,0xD5,0xE6,0xE6,0xE8,0xE9,0xE8,0xEB,0xED,0xED,0xDD,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xEB,0xFC,0xFC,0xFE,0xFF}
+
+#elif _CODE_PAGE == 855	/* Cyrillic (OEM) */
+#define _DF1S	0
+#define _EXCVT {0x81,0x81,0x83,0x83,0x85,0x85,0x87,0x87,0x89,0x89,0x8B,0x8B,0x8D,0x8D,0x8F,0x8F,0x91,0x91,0x93,0x93,0x95,0x95,0x97,0x97,0x99,0x99,0x9B,0x9B,0x9D,0x9D,0x9F,0x9F, \
+      0xA1,0xA1,0xA3,0xA3,0xA5,0xA5,0xA7,0xA7,0xA9,0xA9,0xAB,0xAB,0xAD,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB6,0xB6,0xB8,0xB8,0xB9,0xBA,0xBB,0xBC,0xBE,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD3,0xD3,0xD5,0xD5,0xD7,0xD7,0xDD,0xD9,0xDA,0xDB,0xDC,0xDD,0xE0,0xDF, \
+      0xE0,0xE2,0xE2,0xE4,0xE4,0xE6,0xE6,0xE8,0xE8,0xEA,0xEA,0xEC,0xEC,0xEE,0xEE,0xEF,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 857	/* Turkish (OEM) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0x98,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x98,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9E, \
+      0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA6,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xDE,0x59,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 858	/* Multilingual Latin 1 + Euro (OEM) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
+      0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 862	/* Hebrew (OEM) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+      0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 866	/* Russian (OEM) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+      0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0x90,0x91,0x92,0x93,0x9d,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F,0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 874	/* Thai (OEM, Windows) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+      0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 1250 /* Central Europe (Windows) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \
+      0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xA3,0xB4,0xB5,0xB6,0xB7,0xB8,0xA5,0xAA,0xBB,0xBC,0xBD,0xBC,0xAF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF}
+
+#elif _CODE_PAGE == 1251 /* Cyrillic (Windows) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x82,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x80,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \
+      0xA0,0xA2,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB2,0xA5,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xA3,0xBD,0xBD,0xAF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF}
+
+#elif _CODE_PAGE == 1252 /* Latin 1 (Windows) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0xAd,0x9B,0x8C,0x9D,0xAE,0x9F, \
+      0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F}
+
+#elif _CODE_PAGE == 1253 /* Greek (Windows) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+      0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xA2,0xB8,0xB9,0xBA, \
+      0xE0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xFB,0xBC,0xFD,0xBF,0xFF}
+
+#elif _CODE_PAGE == 1254 /* Turkish (Windows) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x9D,0x9E,0x9F, \
+      0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F}
+
+#elif _CODE_PAGE == 1255 /* Hebrew (Windows) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+      0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 1256 /* Arabic (Windows) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x8C,0x9D,0x9E,0x9F, \
+      0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0x41,0xE1,0x41,0xE3,0xE4,0xE5,0xE6,0x43,0x45,0x45,0x45,0x45,0xEC,0xED,0x49,0x49,0xF0,0xF1,0xF2,0xF3,0x4F,0xF5,0xF6,0xF7,0xF8,0x55,0xFA,0x55,0x55,0xFD,0xFE,0xFF}
+
+#elif _CODE_PAGE == 1257 /* Baltic (Windows) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
+      0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xBC,0xBD,0xBE,0xAF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF}
+
+#elif _CODE_PAGE == 1258 /* Vietnam (OEM, Windows) */
+#define _DF1S	0
+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0xAC,0x9D,0x9E,0x9F, \
+      0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
+      0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xEC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xFE,0x9F}
+
+#elif _CODE_PAGE == 1	/* ASCII (for only non-LFN cfg) */
+#define _DF1S	0
+
+#else
+#error Unknown code page
+
+#endif
+
+
+
+/* Character code support macros */
+
+#define IsUpper(c)	(((c)>='A')&&((c)<='Z'))
+#define IsLower(c)	(((c)>='a')&&((c)<='z'))
+
+#if _DF1S	/* DBCS configuration */
+
+#if _DF2S	/* Two 1st byte areas */
+#define IsDBCS1(c)	(((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E) || ((BYTE)(c) >= _DF2S && (BYTE)(c) <= _DF2E))
+#else		/* One 1st byte area */
+#define IsDBCS1(c)	((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E)
+#endif
+
+#if _DS3S	/* Three 2nd byte areas */
+#define IsDBCS2(c)	(((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E) || ((BYTE)(c) >= _DS3S && (BYTE)(c) <= _DS3E))
+#else		/* Two 2nd byte areas */
+#define IsDBCS2(c)	(((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E))
+#endif
+
+#else		/* SBCS configuration */
+
+#define IsDBCS1(c)	0
+#define IsDBCS2(c)	0
+
+#endif /* _DF1S */
+
+
+
+/* Definitions corresponds to multi partition */
+
+#if _MULTI_PARTITION		/* Multiple partition configuration */
+
+typedef struct _PARTITION {
+  BYTE pd;	/* Physical drive# */
+  BYTE pt;	/* Partition # (0-3) */
+} PARTITION;
+
+extern
+const PARTITION Drives[];			/* Logical drive# to physical location conversion table */
+#define LD2PD(drv) (Drives[drv].pd)	/* Get physical drive# */
+#define LD2PT(drv) (Drives[drv].pt)	/* Get partition# */
+
+#else						/* Single partition configuration */
+
+#define LD2PD(drv) (drv)	/* Physical drive# is equal to the logical drive# */
+#define LD2PT(drv) 0		/* Always mounts the 1st partition */
+
+#endif
+
+
+
+/* File function return code (FRESULT) */
+
+typedef enum {
+  FR_OK = 0,			/* 0 */
+  FR_DISK_ERR,		/* 1 */
+  FR_INT_ERR,			/* 2 */
+  FR_NOT_READY,		/* 3 */
+  FR_NO_FILE,			/* 4 */
+  FR_NO_PATH,			/* 5 */
+  FR_INVALID_NAME,	/* 6 */
+  FR_DENIED,			/* 7 */
+  FR_EXIST,			/* 8 */
+  FR_INVALID_OBJECT,	/* 9 */
+  FR_WRITE_PROTECTED,	/* 10 */
+  FR_INVALID_DRIVE,	/* 11 */
+  FR_NOT_ENABLED,		/* 12 */
+  FR_NO_FILESYSTEM,	/* 13 */
+  FR_MKFS_ABORTED,	/* 14 */
+  FR_TIMEOUT			/* 15 */
+} FRESULT;
+
+
+
+/*--------------------------------------------------------------*/
+/* FatFs module application interface                           */
+
+FRESULT f_mount (BYTE, FATFS*);						/* Mount/Unmount a logical drive */
+FRESULT f_open (FIL*, const XCHAR*, BYTE);			/* Open or create a file */
+FRESULT f_read (FIL*, void*, UINT, UINT*);			/* Read data from a file */
+FRESULT f_write (FIL*, const void*, UINT, UINT*);	/* Write data to a file */
+//FRESULT f_lseek (FIL*, DWORD);						/* Move file pointer of a file object */
+FRESULT f_lseek (FIL*, LONG);						/* Move file pointer of a file object */
+FRESULT f_close (FIL*);								/* Close an open file object */
+FRESULT f_opendir (DIR*, const XCHAR*);				/* Open an existing directory */
+FRESULT f_readdir (DIR*, FILINFO*);					/* Read a directory item */
+FRESULT f_stat (const XCHAR*, FILINFO*);				/* Get file status */
+FRESULT f_getfree (const XCHAR*, DWORD*, FATFS**);	/* Get number of free clusters on the drive */
+FRESULT f_truncate (FIL*);							/* Truncate file */
+FRESULT f_sync (FIL*);								/* Flush cached data of a writing file */
+FRESULT f_unlink (const XCHAR*);						/* Delete an existing file or directory */
+FRESULT	f_mkdir (const XCHAR*);						/* Create a new directory */
+FRESULT f_chmod (const XCHAR*, BYTE, BYTE);			/* Change attriburte of the file/dir */
+FRESULT f_utime (const XCHAR*, const FILINFO*);		/* Change timestamp of the file/dir */
+FRESULT f_rename (const XCHAR*, const XCHAR*);		/* Rename/Move a file or directory */
+FRESULT f_forward (FIL*, UINT(*)(const BYTE*,UINT), UINT, UINT*);	/* Forward data to the stream */
+FRESULT f_mkfs (BYTE, BYTE, WORD);					/* Create a file system on the drive */
+FRESULT f_chdir (const XCHAR*);						/* Change current directory */
+FRESULT f_chdrive (BYTE);							/* Change current drive */
+
+#if _USE_STRFUNC
+int f_putc (int, FIL*);								/* Put a character to the file */
+int f_puts (const char*, FIL*);						/* Put a string to the file */
+int f_printf (FIL*, const char*, ...);				/* Put a formatted string to the file */
+char* f_gets (char*, int, FIL*);					/* Get a string from the file */
+#define f_eof(fp) (((fp)->fptr == (fp)->fsize) ? 1 : 0)
+#define f_error(fp) (((fp)->flag & FA__ERROR) ? 1 : 0)
+#ifndef EOF
+#define EOF -1
+#endif
+#endif
+
+
+/*--------------------------------------------------------------*/
+/* User defined functions                                       */
+
+
+/* Real time clock */
+DWORD get_fattime (void);	/* 31-25: Year(0-127 org.1980), 24-21: Month(1-12), 20-16: Day(1-31) */
+/* 15-11: Hour(0-23), 10-5: Minute(0-59), 4-0: Second(0-29 *2) */
+
+/* Unicode - OEM code conversion */
+#if _USE_LFN
+WCHAR ff_convert (WCHAR, UINT);
+#endif
+
+
+
+
+/*--------------------------------------------------------------*/
+/* Flags and offset address                                     */
+
+
+/* File access control and file status flags (FIL.flag) */
+
+#define	FA_READ				0x01
+#define	FA_OPEN_EXISTING	0x00
+#if _FS_READONLY == 0
+#define	FA_WRITE			0x02
+#define	FA_CREATE_NEW		0x04
+#define	FA_CREATE_ALWAYS	0x08
+#define	FA_OPEN_ALWAYS		0x10
+#define FA__WRITTEN			0x20
+#define FA__DIRTY			0x40
+#endif
+#define FA__ERROR			0x80
+
+
+/* FAT sub type (FATFS.fs_type) */
+
+#define FS_FAT12	1
+#define FS_FAT16	2
+#define FS_FAT32	3
+
+
+/* File attribute bits for directory entry */
+
+#define	AM_RDO	0x01	/* Read only */
+#define	AM_HID	0x02	/* Hidden */
+#define	AM_SYS	0x04	/* System */
+#define	AM_VOL	0x08	/* Volume label */
+#define AM_LFN	0x0F	/* LFN entry */
+#define AM_DIR	0x10	/* Directory */
+#define AM_ARC	0x20	/* Archive */
+#define AM_MASK	0x3F	/* Mask of defined bits */
+
+
+/* FatFs refers the members in the FAT structures with byte offset instead
+   / of structure member because there are incompatibility of the packing option
+   / between various compilers. */
+
+#define BS_jmpBoot			0
+#define BS_OEMName			3
+#define BPB_BytsPerSec		11
+#define BPB_SecPerClus		13
+#define BPB_RsvdSecCnt		14
+#define BPB_NumFATs			16
+#define BPB_RootEntCnt		17
+#define BPB_TotSec16		19
+#define BPB_Media			21
+#define BPB_FATSz16			22
+#define BPB_SecPerTrk		24
+#define BPB_NumHeads		26
+#define BPB_HiddSec			28
+#define BPB_TotSec32		32
+#define BS_55AA				510
+
+#define BS_DrvNum			36
+#define BS_BootSig			38
+#define BS_VolID			39
+#define BS_VolLab			43
+#define BS_FilSysType		54
+
+#define BPB_FATSz32			36
+#define BPB_ExtFlags		40
+#define BPB_FSVer			42
+#define BPB_RootClus		44
+#define BPB_FSInfo			48
+#define BPB_BkBootSec		50
+#define BS_DrvNum32			64
+#define BS_BootSig32		66
+#define BS_VolID32			67
+#define BS_VolLab32			71
+#define BS_FilSysType32		82
+
+#define	FSI_LeadSig			0
+#define	FSI_StrucSig		484
+#define	FSI_Free_Count		488
+#define	FSI_Nxt_Free		492
+
+#define MBR_Table			446
+
+#define	DIR_Name			0
+#define	DIR_Attr			11
+#define	DIR_NTres			12
+#define	DIR_CrtTime			14
+#define	DIR_CrtDate			16
+#define	DIR_FstClusHI		20
+#define	DIR_WrtTime			22
+#define	DIR_WrtDate			24
+#define	DIR_FstClusLO		26
+#define	DIR_FileSize		28
+#define	LDIR_Ord			0
+#define	LDIR_Attr			11
+#define	LDIR_Type			12
+#define	LDIR_Chksum			13
+#define	LDIR_FstClusLO		26
+
+
+
+/*--------------------------------*/
+/* Multi-byte word access macros  */
+
+#if _WORD_ACCESS == 1	/* Enable word access to the FAT structure */
+#define	LD_WORD(ptr)		(WORD)(*(WORD*)(BYTE*)(ptr))
+#define	LD_DWORD(ptr)		(DWORD)(*(DWORD*)(BYTE*)(ptr))
+#define	ST_WORD(ptr,val)	*(WORD*)(BYTE*)(ptr)=(WORD)(val)
+#define	ST_DWORD(ptr,val)	*(DWORD*)(BYTE*)(ptr)=(DWORD)(val)
+#else					/* Use byte-by-byte access to the FAT structure */
+#define	LD_WORD(ptr)		(WORD)(((WORD)*(volatile BYTE*)((ptr)+1)<<8)|(WORD)*(volatile BYTE*)(ptr))
+#define	LD_DWORD(ptr)		(DWORD)(((DWORD)*(volatile BYTE*)((ptr)+3)<<24)|((DWORD)*(volatile BYTE*)((ptr)+2)<<16)|((WORD)*(volatile BYTE*)((ptr)+1)<<8)|*(volatile BYTE*)(ptr))
+#define	ST_WORD(ptr,val)	*(volatile BYTE*)(ptr)=(BYTE)(val); *(volatile BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8)
+#define	ST_DWORD(ptr,val)	*(volatile BYTE*)(ptr)=(BYTE)(val); *(volatile BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8); *(volatile BYTE*)((ptr)+2)=(BYTE)((DWORD)(val)>>16); *(volatile BYTE*)((ptr)+3)=(BYTE)((DWORD)(val)>>24)
+#endif
+
+
+#endif /* _FATFS */
diff --git a/tos/platforms/shimmer/chips/sd/fatfs/FatFs.nc b/tos/platforms/shimmer/chips/sd/fatfs/FatFs.nc
new file mode 100644
index 00000000..5f42b1a3
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/fatfs/FatFs.nc
@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author  Steve Ayer
+ * @date    April, 2009
+ * ported to tos-2.x
+ * @date January, 2010
+ */
+
+#include "FatFs.h"
+
+interface FatFs { 
+  /* non-zero return codes indicate an error; the codes for these are in an enum in FatFs.h */
+
+  command void asc_fattime(char * timestring);
+  /*
+   * do this before performing file ops!
+   * pointer to FATFS struct provides required bookkeeping space for the fs
+   */
+  command error_t mount(FATFS * fs);
+
+  command error_t unmount();
+
+  /*
+   * take the card down, "unmount" the fs
+   */
+  command void disable();
+
+  /*
+   * mode flags:
+   * FA_READ	Specifies read access to the object. Data can be read from the file.
+   *            Combine with FA_WRITE for read-write access.
+   * FA_WRITE	Specifies write access to the object. Data can be written to the file.
+                Combine with FA_READ for read-write access.
+   * FA_OPEN_EXISTING	Opens the file. The function fails if the file is not existing. (Default)
+   * FA_OPEN_ALWAYS	Opens the file, if it is existing. If not, the function creates the new file.
+   * FA_CREATE_NEW	Creates a new file. The function fails if the file is already existing.
+   * FA_CREATE_ALWAYS	Creates a new file. If the file is existing, it is truncated and overwritten.
+   *
+   */
+  command error_t fopen(FIL * fp, const char * filename, BYTE mode);
+  
+  command error_t fclose(FIL * fp);
+  
+  command error_t fread(FIL * fp, 
+			 void * buffer,
+			 uint bytesToRead,
+			 uint * bytesRead);
+
+  command error_t fwrite(FIL * fp,
+			  const void * buffer,
+			  uint bytesToWrite,
+			  uint * bytesWritten);
+
+  // no ftell, but fp has fptr once file is open
+  command error_t fseek(FIL * fp, int32_t offset);
+  
+  // truncate this file at the current location of the pointer
+  command error_t ftruncate(FIL * fp);
+  
+  /* 
+   * flush the file cache to physical media;  good for avoiding data loss due
+   * to potential platform disruption (battery, app failure, media removal),
+   * but should be used sparingly to avoid excess flash r/w cycles; fp struct has 
+   * a 512-byte buffer.  
+   */
+  command error_t fsync(FIL * fp);
+
+  command error_t mkdir(const char * dirname);
+
+  command error_t chdir(const char * dirname);
+
+  // feed it an empty DIR struct, used before doing readdir calls
+  command error_t opendir(DIR * dp, const char * dirname);
+  
+  /*
+   * reads dir entries in sequence until fi->fname is "" (fname[0] == NULL)
+   *
+   * since long filenames are used here, a buffer of sufficient size 
+   * (_MAX_LFN + 1, unless using some asian code pages.  see FatFs.h)
+   * must be attached to fi->lfname, with its size in fi->lfsize
+   * 
+   */
+  command error_t readdir(DIR * dp, FILINFO * fi);
+  
+  /*
+   * path is to root; fatfs struct is statically declared in driver
+   */
+  command error_t getfree(const char * path, uint32_t * clusters, FATFS ** fs);
+
+  command error_t stat(const char * filename, FILINFO * fi);
+
+  command error_t unlink(const char * filename);
+
+  /*
+   * this one's a bit weird
+   * these are the flags for "value":
+   * AM_RDO	Read only 	  (0x01)
+   * AM_ARC     Archive           (0x20)
+   * AM_SYS     System            (0x04)
+   * AM_HID     Hidden            (0x02)
+   * 
+   * mask is for exposing attributes to effect of value flag; i.e., 
+   * if the value bit is zero for a particular attribute and the mask 
+   * has a 1 in that position (e.g. value is AM_HID|AM_RDO and mask is 
+   * AM_HID|AM_SYS|AM_RDO, then AM_SYS will be turned off) that attribute 
+   * will be disabled.
+   */
+  command error_t chmod(const char * filename, BYTE value, BYTE mask);
+
+  /*
+   * a good time to introduce this:
+   * in timedate, the fields break out thus:
+   * for fdate, 
+   *    bit15:9
+   *     Year origin from 1980 (0..127)
+   *    bit8:5
+   *     Month (1..12)
+   *    bit4:0
+   *     Day (1..31)
+   *
+   * for ftime,
+   *    bit15:11
+   *     Hour (0..23)
+   *    bit10:5
+   *     Minute (0..59)
+   *    bit4:0
+   *     Second / 2 (0..29)
+   */
+  command error_t f_utime(const char * filename, FILINFO * timedate);
+
+  command error_t rename(const char * oldname, const char * newname);
+  
+  /*
+   * size in sectors; 512 bytes/sector is fixed
+   * a zero allocates the whole drive/card
+   */
+  command error_t mkfs(WORD allocSize);
+
+  command const char * ff_strerror(error_t errnum);
+
+  /*
+   * these bubble the sd-driver-level events that the app has, 
+   * or has lost, access to the card
+   */
+  async event void mediaUnavailable();
+  async event void mediaAvailable();
+}
diff --git a/tos/platforms/shimmer/chips/sd/fatfs/FatFsP.nc b/tos/platforms/shimmer/chips/sd/fatfs/FatFsP.nc
new file mode 100644
index 00000000..f90e7de9
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/fatfs/FatFsP.nc
@@ -0,0 +1,3509 @@
+/*---------------------------------------------------------------------------/
+  / FatFs module is an open source project to implement FAT file system to small
+  / embedded systems. It is opened for education, research and development under
+  / license policy of following trems.
+  /
+  /  Copyright (C) 2009, ChaN, all right reserved.
+  /
+  / * The FatFs module is a free software and there is no warranty.
+  / * You can use, modify and/or redistribute it for personal, non-profit or
+  /   commercial use without any restriction under your responsibility.
+  / * Redistributions of source code must retain the above copyright notice.
+  /
+  /----------------------------------------------------------------------------*/
+/*
+ * Portions of this code are:
+ *
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * This is a tinyos-1.x implementation of ChaN's FatFs embedded FAT filesystem.
+ * Many thanks to ChaN for his excellent work, which has been modified as little
+ * as possible to fit into the tinyos framework.
+ *
+ * @author Steve Ayer
+ * @date April, 2009
+ * port to tos-2.x
+ * @date January, 2010
+ *
+ * Cluster window optimizations:
+ * @author Victor Cionca
+ * @date July, 2009
+ *
+ */
+
+#include "FatFs.h"
+
+module FatFsP {
+  provides {
+    interface FatFs;
+  }
+  uses{ 
+    interface StdControl as diskIOStdControl;
+    interface SD as diskIO;
+    interface Leds;
+    interface Time;
+  }
+}
+
+implementation {
+#include "diskio.c"  
+#include "ccsbcs.c"
+
+  FRESULT f_mount (BYTE, FATFS*);				/* Mount/Unmount a logical drive */
+  FRESULT f_open (FIL*, const char*, BYTE);			/* Open or create a file */
+  FRESULT f_read (FIL*, void*, UINT, UINT*);			/* Read data from a file */
+  FRESULT f_write (FIL*, const void*, UINT, UINT*);	        /* Write data to a file */
+  FRESULT f_lseek (FIL*, LONG);					/* Move file pointer of a file object */
+  FRESULT f_close (FIL*);					/* Close an open file object */
+  FRESULT f_opendir (DIR*, const char*);			/* Open an existing directory */
+  FRESULT f_readdir (DIR*, FILINFO*);				/* Read a directory item */
+  FRESULT f_stat (const char*, FILINFO*);			/* Get file status */
+  FRESULT f_getfree (const char*, DWORD*, FATFS**);	        /* Get number of free clusters on the drive */
+  FRESULT f_truncate (FIL*);					/* Truncate file */
+  FRESULT f_sync (FIL*);					/* Flush cached data of a writing file */
+  FRESULT f_unlink (const char*);				/* Delete an existing file or directory */
+  FRESULT f_mkdir (const char*);				/* Create a new directory */
+  FRESULT f_chmod (const char*, BYTE, BYTE);			/* Change attriburte of the file/dir */
+  FRESULT f_utime (const char*, const FILINFO*);		/* Change timestamp of the file/dir */
+  FRESULT f_rename (const char*, const char*);		        /* Rename/Move a file or directory */
+  FRESULT f_forward (FIL*, UINT(*)(const BYTE*,UINT), UINT, UINT*);	/* Forward data to the stream */
+  FRESULT f_mkfs (BYTE, BYTE, WORD);					/* Create a file system on the drive */
+  FRESULT f_chdir (const XCHAR*);				/* Change current directory */
+  FRESULT f_chdrive (BYTE);					/* Change current drive */
+  DWORD   get_fattime ();
+
+
+#if REALTIME
+  /**
+   * Dirty hack function to get the address of the file directory entry
+   * in the window, if we are using buffers for the window
+   *
+   * The problem is that the original code represents the directory entry 
+   * as a fixed address in the fs window (dirty hack, but makes sense).
+   * As we use two windows (dflt and buffer), we need to update the address
+   * of the dir entry: find in what window the address was, get the offset 
+   * in the window and add it to the main window address
+   */
+  BYTE *get_dir_ptr(FATFS *fs, BYTE *ptr){
+    //    UINT window_address;
+    //    UINT dir_obj_address;
+
+    INT diff_win;
+
+    diff_win = ptr - fs->win_dflt;
+
+    if (diff_win < 0 || diff_win >= _MAX_SS){	// the dir_ptr is not in the first window buffer
+      diff_win = ptr - fs->win_alt; // try the second buffer
+      if (diff_win < 0 || diff_win >= _MAX_SS){ 
+	// error, can't find the dir_ptr in any of the buffers
+	return 0;
+      }
+    }
+
+    return fs->win + diff_win;
+  }
+
+  BYTE cluster_in_alt_window(FATFS *fs, DWORD cluster){
+    switch (fs->fs_type){
+    case FS_FAT16:
+      if (cluster/(SS(fs)/2)+fs->fatbase == fs->win_alt_sector) return 1;
+      else return 0;
+    case FS_FAT32:
+      if (cluster/(SS(fs)/4)+fs->fatbase == fs->win_alt_sector) return 1;
+      else return 0;
+    }
+
+    return 0;
+  }
+
+  void invert_buffers(FATFS *fs){
+    DWORD wsect = 0;
+    atomic{
+      switch (fs->current_buffer){
+      case 0:
+	fs->win = fs->win_alt;
+	fs->current_buffer = 1;
+	break;
+      case 1:
+	fs->win = fs->win_dflt;
+	fs->current_buffer = 0;
+	break;
+      }
+
+      wsect = fs->winsect;
+      fs->winsect = fs->win_alt_sector; // update the active sector, since we are moving the window
+      fs->win_alt_sector = wsect;	// update the buffer sector
+    }
+  }
+
+  DWORD sync_both_win_buffers(FATFS *fs){
+
+    // write both buffers to disk
+    switch (fs->current_buffer){
+    case 0:	// we are currently using buffer 0 (dflt), so write buffer 1 (alt)
+      if (disk_write(fs->drive, fs->win_alt, fs->win_alt_sector, 1) != RES_OK)
+	return FR_DISK_ERR;
+      if (disk_write(fs->drive, fs->win_dflt, fs->winsect, 1) != RES_OK)
+	return FR_DISK_ERR;
+      break;
+    case 1:
+      if (disk_write(fs->drive, fs->win_dflt, fs->win_alt_sector, 1) != RES_OK)
+	return FR_DISK_ERR;
+      if (disk_write(fs->drive, fs->win_alt, fs->winsect, 1) != RES_OK)
+	return FR_DISK_ERR;
+      break;
+    }
+
+    fs->win_alt_sector = 0;	// the alternative sector is 0 (not used)
+    fs->buffer_used = 0;	// buffer is not used 
+
+    return RES_OK;
+  }
+
+  DWORD sync_win_buffers(FATFS *fs){
+    switch (fs->current_buffer){
+    case 0:	// we are currently using buffer 0 (dflt), so write buffer 1 (alt)
+      if (disk_write(fs->drive, fs->win_alt, fs->win_alt_sector, 1) != RES_OK)
+	return FR_DISK_ERR;
+      break;
+    case 1:
+      if (disk_write(fs->drive, fs->win_dflt, fs->win_alt_sector, 1) != RES_OK)
+	return FR_DISK_ERR;
+      break;
+    }
+
+    fs->win_alt_sector = 0;	// the alternative sector is 0 (not used)
+    fs->buffer_used = 0;	// buffer is not used 
+
+    return RES_OK;
+  }
+
+  void init_fatfs(FATFS *fs){
+    atomic{
+      fs->win = fs->win_dflt;
+      fs->current_buffer = 0;
+      fs->win_alt_sector = 0;
+      fs->buffer_used = 0;
+    }
+  }
+#endif
+
+  /*
+   * do this before performing file ops!
+   * pointer to FATFS struct provides required bookkeeping space for the fs
+   */
+  command error_t FatFs.mount(FATFS * fs){
+    return f_mount(0, fs);
+  }
+
+  command error_t FatFs.unmount(){
+    dock_disk();   // this calls diskiostdcontrol.start()
+    return SUCCESS;
+  }
+
+  /*
+   * disable_disk is a wrapper for diskIOStdControl.stop,
+   * which disables the card completely
+   */
+  command void FatFs.disable(){
+    f_mount(0, NULL);  // this is supposed to unmount
+    
+    disable_disk();  
+  }
+  
+  /*
+   * mode flags:
+   * FA_READ	Specifies read access to the object. Data can be read from the file.
+   *            Combine with FA_WRITE for read-write access.
+   * FA_WRITE	Specifies write access to the object. Data can be written to the file.
+   Combine with FA_READ for read-write access.
+   * FA_OPEN_EXISTING	Opens the file. The function fails if the file is not existing. (Default)
+   * FA_OPEN_ALWAYS	Opens the file, if it is existing. If not, the function creates the new file.
+   * FA_CREATE_NEW	Creates a new file. The function fails if the file is already existing.
+   * FA_CREATE_ALWAYS	Creates a new file. If the file is existing, it is truncated and overwritten.
+   *
+   */
+  command error_t FatFs.fopen(FIL * fp, const char * filename, BYTE mode){
+    return f_open(fp, filename, mode);
+  }
+
+  command void FatFs.asc_fattime(char * timestring) {
+    time_t time_now;
+    struct tm ltime;
+    DWORD now;
+
+    now = get_fattime();
+#ifdef SPRINTF
+    sprintf(timestring, "raw fattime is %08lx", now);
+#endif
+ 
+    /*
+      call Time.time(&time_now);
+      call Time.localtime(&time_now, &ltime);
+      call Time.asctime(&ltime, timestring, 128);
+    */
+  }
+
+  command error_t FatFs.fclose(FIL * fp){
+    return f_close(fp);
+  }
+
+  command error_t FatFs.fread(FIL * fp, 
+			       void * buffer,
+			       uint bytesToRead,
+			       uint * bytesRead){
+
+    if (!fp || !fp->fs) 
+      return FR_INVALID_OBJECT;
+
+#if REALTIME
+    if (cluster_in_alt_window(fp->fs, fp->curr_clust)){	
+      // the current cluster FAT entry is in the buffered window,
+      // so invert the buffers
+      invert_buffers(fp->fs);
+    }
+
+    if (fp->fs->buffer_used) 
+      if (sync_win_buffers(fp->fs) != RES_OK) 
+	return FR_DISK_ERR;
+#endif
+
+    return f_read(fp, buffer, bytesToRead, bytesRead);
+  }
+
+  command error_t FatFs.fwrite(FIL * fp,
+				const void * buffer,
+				uint bytesToWrite,
+				uint * bytesWritten){
+
+    if (!fp || !fp->fs) 
+      return FR_INVALID_OBJECT;
+
+#if REALTIME
+    if (cluster_in_alt_window(fp->fs, fp->curr_clust)){	
+      // the current cluster FAT entry is in the buffered window,
+      // so invert the buffers
+      invert_buffers(fp->fs);
+    }
+
+    if (fp->fs->buffer_used) 
+      if (sync_win_buffers(fp->fs) != RES_OK) 
+	return FR_DISK_ERR;
+#endif
+
+    return f_write(fp, buffer, bytesToWrite, bytesWritten);
+  }
+
+  // no ftell, but fp has fptr once file is open
+  command error_t FatFs.fseek(FIL * fp, int32_t offset){
+
+    if (!fp || !fp->fs) 
+      return FR_INVALID_OBJECT;
+
+#if REALTIME
+    if (cluster_in_alt_window(fp->fs, fp->curr_clust)){	
+      // the current cluster FAT entry is in the buffered window,
+      // so invert the buffers
+      invert_buffers(fp->fs);
+    }
+
+    if (fp->fs->buffer_used) 
+      if (sync_win_buffers(fp->fs) != RES_OK) 
+	return FR_DISK_ERR;
+#endif
+    return f_lseek(fp, offset);
+  }
+
+  // truncate this file at the current location of the pointer
+  command error_t FatFs.ftruncate(FIL * fp){
+
+    if (!fp || !fp->fs) 
+      return FR_INVALID_OBJECT;
+
+#if REALTIME
+    if (cluster_in_alt_window(fp->fs, fp->curr_clust)){	
+      // the current cluster FAT entry is in the buffered window,
+      // so invert the buffers
+      invert_buffers(fp->fs);
+    }
+
+    if (fp->fs->buffer_used) 
+      if (sync_win_buffers(fp->fs) != RES_OK) 
+	return FR_DISK_ERR;
+#endif
+
+    return f_truncate(fp);
+  }
+
+  /* 
+   * flush the file cache to physical media;  good for avoiding data loss due
+   * to potential platform disruption (battery, app failure, media removal),
+   * but should be used sparingly to avoid excess flash r/w cycles; fp struct has 
+   * a 512-byte buffer.  
+   */
+  command error_t FatFs.fsync(FIL * fp){
+    return f_sync(fp);
+  }
+
+  command error_t FatFs.mkdir(const char * dirname){
+    return f_mkdir(dirname);
+  }
+
+  //  feed it an empty DIR struct, used before doing readdir calls
+  command error_t FatFs.opendir(DIR * dp, const char * dirname){
+    return f_opendir(dp, dirname);
+  }
+
+  // set current working directory
+  command error_t FatFs.chdir(const char * dirname){
+    return f_chdir(dirname);
+  }
+
+  /*
+   * reads dir entries in sequence until fi->fname is "" (fname[0] == NULL)
+   *
+   * since long filenames are used here, a buffer of sufficient size 
+   * (_MAX_LFN + 1, unless using some asian code pages.  see FatFs.h)
+   * must be attached to fi->lfname, with its size in fi->lfsize
+   * 
+   */
+  command error_t FatFs.readdir(DIR * dp, FILINFO * fi){
+    return f_readdir(dp, fi);
+  }
+
+  /*
+   * path is to root; fatfs struct is statically declared in driver
+   */
+  command error_t FatFs.getfree(const char * path, uint32_t * clusters, FATFS ** fs){
+    return f_getfree(path, clusters, fs);
+  }
+
+  command error_t FatFs.stat(const char * filename, FILINFO * fi){
+    return f_stat(filename, fi);
+  }
+
+  command error_t FatFs.unlink(const char * filename){
+    return f_unlink(filename);
+  }
+
+  command const char * FatFs.ff_strerror(error_t errnum){
+    switch(errnum){
+    case FR_OK:			/* 0 */
+      return "No Error";
+    case FR_DISK_ERR:		/* 1 */
+      return "Disk Error";
+    case FR_INT_ERR:			/* 2 */
+      return "Internal Error (bad or out of range cluster?)";
+    case FR_NOT_READY:		/* 3 */
+      return "Drive Not Ready (uninitialized?)";
+    case FR_NO_FILE:			/* 4 */
+      return "File Not Found";
+    case FR_NO_PATH:			/* 5 */
+      return "Path Not Found";
+    case FR_INVALID_NAME:	/* 6 */
+      return "Invalid Name (root dir?)";
+    case FR_DENIED:			/* 7 */
+      return "Operation Denied";
+    case FR_EXIST:			/* 8 */
+      return "File Object Already Exists";
+    case FR_INVALID_OBJECT:	/* 9 */
+      return "Invalid Object";
+    case FR_WRITE_PROTECTED:	/* 10 */
+      return "Write Protected";
+    case FR_INVALID_DRIVE:	/* 11 */
+      return "Invalid Drive";
+    case FR_NOT_ENABLED:		/* 12 */
+      return "Filesystem Not Enabled (improper drive?)";
+    case FR_NO_FILESYSTEM:	/* 13 */
+      return "No Valid FAT Partition Found";
+    case FR_MKFS_ABORTED:	/* 14 */
+      return "Unable to Build Filesystem; Aborting";
+    case FR_TIMEOUT:			/* 15 */
+      return "Re-entrant Operation Timed Out (invalid error in tos!)";
+    case 22:
+      return "My ERROR!";
+    default:
+      return "Unknown Error";
+    }
+  }
+
+  /*
+   * this one's a bit weird
+   * these are the flags for "value":
+   * AM_RDO	Read only 	  (0x01)
+   * AM_ARC     Archive           (0x20)
+   * AM_SYS     System            (0x04)
+   * AM_HID     Hidden            (0x02)
+   * 
+   * mask is for exposing attributes to effect of value flag; i.e., 
+   * if the value bit is zero for a particular attribute and the mask 
+   * has a 1 in that position (e.g. value is AM_HID|AM_RDO and mask is 
+   * AM_HID|AM_SYS|AM_RDO, then AM_SYS will be turned off) that attribute 
+   * will be disabled.
+   */
+  command error_t FatFs.chmod(const char * filename, BYTE value, BYTE mask){
+    return f_chmod(filename, value, mask);
+  }
+
+  /*
+   * a good time to introduce this:
+   * in timedate, the fields break out thus:
+   * for fdate, 
+   *    bit15:9
+   *     Year origin from 1980 (0..127)
+   *    bit8:5
+   *     Month (1..12)
+   *    bit4:0
+   *     Day (1..31)
+   *
+   * for ftime,
+   *    bit15:11
+   *     Hour (0..23)
+   *    bit10:5
+   *     Minute (0..59)
+   *    bit4:0
+   *     Second / 2 (0..29)
+   */
+  command error_t FatFs.f_utime(const char * filename, FILINFO * timedate){
+    return f_utime(filename, timedate);
+  }
+
+  command error_t FatFs.rename(const char * oldname, const char * newname){
+    return f_rename(oldname, newname);
+  }
+
+  /*
+   * size in sectors; 512 bytes/sector is fixed
+   * a zero allocates the whole drive/card
+   */
+  command error_t FatFs.mkfs(WORD allocSize){
+    return f_mkfs(0, 0, allocSize);
+  }
+
+#define	ENTER_FF(fs)
+#define LEAVE_FF(fs, res)	return res
+
+#define	ABORT(fs, res)		{ fp->flag |= FA__ERROR; LEAVE_FF(fs, res); }
+
+  /* Name status flags */
+#define NS			11		/* Offset of name status byte */
+#define NS_LOSS		0x01	/* Out of 8.3 format */
+#define NS_LFN		0x02	/* Force to create LFN entry */
+#define NS_LAST		0x04	/* Last segment */
+#define NS_BODY		0x08	/* Lower case flag (body) */
+#define NS_EXT		0x10	/* Lower case flag (ext) */
+#define NS_DOT		0x20	/* Dot entry */
+
+#if _DRIVES < 1 || _DRIVES > 9
+#error Number of drives must be 1-9.
+#endif
+  
+  static FATFS * FatFs[_DRIVES];	/* Pointer to the file system objects (logical drives) */
+  static WORD Fsid;				/* File system mount ID */
+
+#if _FS_RPATH
+  static
+    BYTE Drive;				/* Current drive */
+#endif
+
+
+#if _USE_LFN == 1	/* LFN with static LFN working buffer */
+  static WCHAR LfnBuf[_MAX_LFN + 1];
+#define	NAMEBUF(sp,lp)	BYTE sp[12]; WCHAR *lp = LfnBuf
+#define INITBUF(dj,sp,lp)	dj.fn = sp; dj.lfn = lp
+
+#elif _USE_LFN > 1	/* LFN with dynamic LFN working buffer */
+#define	NAMEBUF(sp,lp)	BYTE sp[12]; WCHAR lbuf[_MAX_LFN + 1], *lp = lbuf
+#define INITBUF(dj,sp,lp)	dj.fn = sp; dj.lfn = lp
+
+#else				/* No LFN */
+#define	NAMEBUF(sp,lp)	BYTE sp[12]
+#define INITBUF(dj,sp,lp)	dj.fn = sp
+
+#endif
+
+  event void Time.tick() {}
+  /* return type bitmask:
+   * 31-25: Year(0-127 org.1980) 
+   * 24-21: Month(1-12)
+   * 20-16: Day(1-31)  
+   * 15-11: Hour(0-23) 
+   * 10-5: Minute(0-59) 
+   * 4-0: Second(0-29 *2) 
+   */
+  DWORD get_fattime (){
+    DWORD now;
+    uint32_t year_from_80, month, day, hour, minute, second;
+    struct tm ltime;   
+    time_t time_now;
+ 
+    call Time.time(&time_now);
+    call Time.localtime(&time_now, &ltime);
+ 
+    year_from_80 = ltime.tm_year - 1980;
+    month        = ltime.tm_mon + 1;
+    day          = ltime.tm_mday;
+    hour         = ltime.tm_hour;
+    minute       = ltime.tm_min;
+    second       = ltime.tm_sec / 2;
+
+    now = (year_from_80 << 25) | (month << 21) | (day << 16) | (hour << 11) | (minute << 5) | ((second * 2));
+
+    return now;
+  }
+
+  /*-----------------------------------------------------------------------*/
+  /* Change window offset                                                  */
+  /*-----------------------------------------------------------------------*/
+
+  /* Move to zero only writes back dirty window */
+  static FRESULT move_window ( FATFS *fs,	DWORD sector) 	/* File system object, Sector number to make apperance in the fs->win[] */
+    {
+      DWORD wsect;
+
+
+      wsect = fs->winsect;
+      if (wsect != sector) {	/* Changed current window */
+#if !_FS_READONLY
+#if REALTIME
+	// since we are buffering windows, we can check if the 
+	// request matches the buffer, and avoid the move
+	if (fs->buffer_used && fs->win_alt_sector == sector){
+	  // we have to switch the buffers, without writing
+	  // as the next window to be accessed might be the other one
+	  invert_buffers(fs);
+
+	  return FR_OK;
+	}
+#endif
+
+	if (fs->wflag) {	/* Write back dirty window if needed */
+#if REALTIME
+	  // moving the window to 0 shouldn't do any buffering
+	  // plus, leave the buffer alone, it will be handled
+	  // in the future
+	  if (sector == 0){
+	    fs->wflag = 0;
+	    return disk_write(fs->drive, fs->win, wsect, 1);
+	  }
+
+	  // buffer the current window and write it on the next I/O op,
+	  // thus creating an even I/O load per write request
+	  // (currently, we have 3 additional I/O when this event happens; 
+	  // with this change we have only two split accross two consecutive requests)
+	  if (fs->buffer_used) {
+	    if (sync_win_buffers(fs) != RES_OK) return FR_DISK_ERR;
+	  }
+
+	  atomic{
+	    switch (fs->current_buffer){
+	    case 0:
+	      fs->win = fs->win_alt;
+	      fs->current_buffer = 1;
+	      break;
+	    case 1:
+	      fs->win = fs->win_dflt;
+	      fs->current_buffer = 0;
+	      break;
+	    }
+	    fs->win_alt_sector = fs->winsect;
+	    fs->buffer_used = 1;
+	  }
+#else
+	  if (disk_write(fs->drive, fs->win, wsect, 1) != RES_OK)
+	    return FR_DISK_ERR;
+#endif
+
+	  fs->wflag = 0;
+#if !REALTIME
+	  // in realtime we care about timing, not redundancy
+	  if (wsect < (fs->fatbase + fs->sects_fat)) {	/* In FAT area */
+	    BYTE nf;
+	    for (nf = fs->n_fats; nf > 1; nf--) {	/* Refrect the change to FAT copy */
+	      wsect += fs->sects_fat;
+	      disk_write(fs->drive, fs->win, wsect, 1);
+	    }
+	  }
+#endif
+	}
+#endif
+	if (sector) {
+	  if (disk_read(fs->drive, fs->win, sector, 1) != RES_OK)
+	    return FR_DISK_ERR;
+	  fs->winsect = sector;
+	}
+      }
+
+      return FR_OK;
+    }
+
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Clean-up cached data                                                  */
+  /*-----------------------------------------------------------------------*/
+#if !_FS_READONLY
+  /* FR_OK: successful, FR_DISK_ERR: failed */
+  static FRESULT sync (FATFS *fs)
+    {
+      FRESULT res = 0;
+
+#if !REALTIME
+      res = move_window(fs, 0);
+      if (res == FR_OK) {
+#endif
+	/* Update FSInfo sector if needed */
+	if (fs->fs_type == FS_FAT32 && fs->fsi_flag) {
+#if !REALTIME
+	  fs->winsect = 0;
+#else
+	  res = move_window(fs, fs->fsi_sector);
+#endif
+	  memset(fs->win, 0, 512);
+	  ST_WORD(fs->win+BS_55AA, 0xAA55);
+	  ST_DWORD(fs->win+FSI_LeadSig, 0x41615252);
+	  ST_DWORD(fs->win+FSI_StrucSig, 0x61417272);
+	  ST_DWORD(fs->win+FSI_Free_Count, fs->free_clust);
+	  ST_DWORD(fs->win+FSI_Nxt_Free, fs->last_clust);
+#if !REALTIME
+	  disk_write(fs->drive, fs->win, fs->fsi_sector, 1);
+#endif
+	  fs->fsi_flag = 0;
+	  fs->wflag = 1;
+	}
+	/* Make sure that no pending write process in the physical drive */
+	if (disk_ioctl(fs->drive, CTRL_SYNC, (void*)NULL) != RES_OK)
+	  res = FR_DISK_ERR;
+#if !REALTIME
+      }
+#endif
+
+#if REALTIME
+      if (fs->buffer_used) if (sync_win_buffers(fs) != RES_OK) return FR_DISK_ERR;
+      move_window(fs, 0);
+#endif
+
+      return res;
+    }
+#endif
+
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /* FAT access - Read value of a FAT entry                                */
+  /*-----------------------------------------------------------------------*/
+
+  /* 0xFFFFFFFF:Disk error, 1:Interal error, Else:Cluster status */ 
+  DWORD get_fat (FATFS *fs, DWORD clst)	/* Cluster# to get the link information */
+  {
+    UINT wc, bc;
+    DWORD fsect;
+
+    if (clst < 2 || clst >= fs->max_clust)	/* Range check */
+      return 1;
+
+    fsect = fs->fatbase;
+    switch (fs->fs_type) {
+    case FS_FAT12:
+      bc = clst; bc += bc / 2;
+      if (move_window(fs, fsect + (bc / SS(fs)))) break;
+      wc = fs->win[bc & (SS(fs) - 1)]; bc++;
+      if (move_window(fs, fsect + (bc / SS(fs)))) break;
+      wc |= (WORD)fs->win[bc & (SS(fs) - 1)] << 8;
+      return (clst & 1) ? (wc >> 4) : (wc & 0xFFF);
+
+    case FS_FAT16 :
+      if (move_window(fs, fsect + (clst / (SS(fs) / 2)))) break;
+      return LD_WORD(&fs->win[((WORD)clst * 2) & (SS(fs) - 1)]);
+
+    case FS_FAT32 :
+      if (move_window(fs, fsect + (clst / (SS(fs) / 4)))) 
+	break;
+      return LD_DWORD(&fs->win[((WORD)clst * 4) & (SS(fs) - 1)]) & 0x0FFFFFFF;
+    }
+
+    return 0xFFFFFFFF;	/* An error occured at the disk I/O layer */
+  }
+
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /*  FAT access - Change value of a FAT entry                             */
+  /*-----------------------------------------------------------------------*/
+#if !_FS_READONLY
+  FRESULT put_fat (FATFS *fs,	/* File system object */
+		   DWORD clst,	/* Cluster# to be changed in range of 2 to fs->max_clust - 1 */
+		   DWORD val)	/* New value to mark the cluster */
+  {
+    UINT bc;
+    BYTE *p;
+    DWORD fsect;
+    FRESULT res;
+
+    if (clst < 2 || clst >= fs->max_clust) {	/* Range check */
+      res = FR_INT_ERR;
+    } 
+    else {
+      fsect = fs->fatbase;
+      switch (fs->fs_type) {
+      case FS_FAT12 :
+	bc = clst; bc += bc / 2;
+	res = move_window(fs, fsect + (bc / SS(fs)));
+	if (res != FR_OK) break;
+	p = &fs->win[bc & (SS(fs) - 1)];
+	*p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val;
+	bc++;
+	fs->wflag = 1;
+	res = move_window(fs, fsect + (bc / SS(fs)));
+	if (res != FR_OK) break;
+	p = &fs->win[bc & (SS(fs) - 1)];
+	*p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));
+	break;
+
+      case FS_FAT16 :
+	res = move_window(fs, fsect + (clst / (SS(fs) / 2)));
+	if (res != FR_OK) break;
+	ST_WORD(&fs->win[((WORD)clst * 2) & (SS(fs) - 1)], (WORD)val);
+	break;
+
+      case FS_FAT32 :
+	res = move_window(fs, fsect + (clst / (SS(fs) / 4)));
+	if (res != FR_OK) break;
+	ST_DWORD(&fs->win[((WORD)clst * 4) & (SS(fs) - 1)], val);
+	break;
+
+      default :
+	res = FR_INT_ERR;
+      }
+      fs->wflag = 1;
+    }
+
+    return res;
+  }
+#endif /* !_FS_READONLY */
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Remove a cluster chain                                                */
+  /*-----------------------------------------------------------------------*/
+#if !_FS_READONLY
+  static FRESULT remove_chain (FATFS *fs,	DWORD clst)			/* Cluster# to a remove chain from */
+    {
+      FRESULT res;
+      DWORD nxt;
+
+      if (clst < 2 || clst >= fs->max_clust) {	/* Check the range of cluster# */
+	res = FR_INT_ERR;
+      } 
+      else {
+	res = FR_OK;
+	while (clst < fs->max_clust) {			/* Not a last link? */
+	  nxt = get_fat(fs, clst);		/* Get cluster status */
+	  if (nxt == 0) break;				/* Empty cluster? */
+	  if (nxt == 1) { res = FR_INT_ERR; break; }	/* Internal error? */
+	  if (nxt == 0xFFFFFFFF) { res = FR_DISK_ERR; break; }	/* Disk error? */
+	  res = put_fat(fs, clst, 0);		/* Mark the cluster "empty" */
+	  if (res != FR_OK) break;
+	  if (fs->free_clust != 0xFFFFFFFF) {	/* Update FSInfo */
+	    fs->free_clust++;
+	    fs->fsi_flag = 1;
+	  }
+	  clst = nxt;	/* Next cluster */
+	}
+      }
+
+      return res;
+    }
+#endif
+
+  /*-----------------------------------------------------------------------*/
+  /* FAT handling - Stretch or Create a cluster chain                      */
+  /*-----------------------------------------------------------------------*/
+#if !_FS_READONLY
+  /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */
+  static DWORD create_chain (FATFS *fs, DWORD clst)			/* Cluster# to stretch. 0 means create a new chain. */
+    {
+      DWORD cs, ncl, scl, mcl;
+
+      mcl = fs->max_clust;
+      if (clst == 0) {		/* Create new chain */
+	scl = fs->last_clust;			/* Get suggested start point */
+	if (scl == 0 || scl >= mcl) scl = 1;
+      }
+      else {					/* Stretch existing chain */
+	cs = get_fat(fs, clst);		/* Check the cluster status */
+	if (cs < 2) return 1;			/* It is an invalid cluster */
+	if (cs < mcl) return cs;		/* It is already followed by next cluster */
+	scl = clst;
+      }
+
+      ncl = scl;				/* Start cluster */
+      for (;;) {
+	ncl++;							/* Next cluster */
+	if (ncl >= mcl) {				/* Wrap around */
+	  ncl = 2;
+	  if (ncl > scl) return 0;	/* No free custer */
+	}
+	cs = get_fat(fs, ncl);		/* Get the cluster status */
+	if (cs == 0) break;				/* Found a free cluster */
+	if (cs == 0xFFFFFFFF || cs == 1)/* An error occured */
+	  return cs;
+	if (ncl == scl) return 0;		/* No free custer */
+      }
+
+      if (put_fat(fs, ncl, 0x0FFFFFFF))	/* Mark the new cluster "in use" */
+	return 0xFFFFFFFF;
+      if (clst != 0) {					/* Link it to the previous one if needed */
+	if (put_fat(fs, clst, ncl))
+	  return 0xFFFFFFFF;
+      }
+
+      fs->last_clust = ncl;				/* Update FSINFO */
+      if (fs->free_clust != 0xFFFFFFFF) {
+	fs->free_clust--;
+	fs->fsi_flag = 1;
+      }
+
+      return ncl;		/* Return new cluster number */
+    }
+#endif /* !_FS_READONLY */
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Get sector# from cluster#                                             */
+  /*-----------------------------------------------------------------------*/
+
+  /* !=0: sector number, 0: failed - invalid cluster# */
+  static DWORD clust2sect (FATFS *fs, DWORD clst)		/* Cluster# to be converted */
+    {
+      clst -= 2;
+      if (clst >= (fs->max_clust - 2)) return 0;		/* Invalid cluster# */
+      return clst * fs->csize + fs->database;
+    }
+
+  /*-----------------------------------------------------------------------*/
+  /* Directory handling - Seek directory index                             */
+  /*-----------------------------------------------------------------------*/
+
+  static FRESULT dir_seek (DIR *dj, WORD idx)	/* Pointer to directory object, Directory index number */
+    {
+      DWORD clst;
+      WORD ic;
+
+      dj->index = idx;
+      clst = dj->sclust;
+      if (clst == 1 || clst >= dj->fs->max_clust)	/* Check start cluster range */
+	return FR_INT_ERR;
+      if (!clst && dj->fs->fs_type == FS_FAT32)	/* Replace cluster# 0 with root cluster# if in FAT32 */
+	clst = dj->fs->dirbase;
+
+      if (clst == 0) {	/* Static table */
+	dj->clust = clst;
+	if (idx >= dj->fs->n_rootdir)		/* Index is out of range */
+	  return FR_INT_ERR;
+	dj->sect = dj->fs->dirbase + idx / (SS(dj->fs) / 32);	/* Sector# */
+      }
+      else {				/* Dynamic table */
+	ic = SS(dj->fs) / 32 * dj->fs->csize;	/* Entries per cluster */
+	while (idx >= ic) {	                   /* Follow cluster chain */
+	  clst = get_fat(dj->fs, clst);			/* Get next cluster */
+	  if (clst == 0xFFFFFFFF) return FR_DISK_ERR;	/* Disk error */
+	  if (clst < 2 || clst >= dj->fs->max_clust)	/* Reached to end of table or int error */
+	    return FR_INT_ERR;
+	  idx -= ic;
+	}
+	dj->clust = clst;
+	dj->sect = clust2sect(dj->fs, clst) + idx / (SS(dj->fs) / 32);  /* Sector# */
+      }
+      dj->dir = dj->fs->win + (idx % (SS(dj->fs) / 32)) * 32;
+
+      return FR_OK;	/* Seek succeeded */
+    }
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Directory handling - Move directory index next                        */
+  /*-----------------------------------------------------------------------*/
+
+  /* FR_OK:Succeeded, FR_NO_FILE:End of table, FR_DENIED:EOT and could not streach */
+  static FRESULT dir_next (DIR *dj, BOOL streach)    /* FALSE: Do not streach table, TRUE: Streach table if needed */
+    {
+      DWORD clst;
+      WORD i;
+
+      i = dj->index + 1;
+      if (!i || !dj->sect)	/* Report EOT when index has reached 65535 */
+	return FR_NO_FILE;
+
+      if (!(i % (SS(dj->fs) / 32))) {	/* Sector changed? */
+	dj->sect++;					/* Next sector */
+
+	if (dj->clust == 0) {	/* Static table */
+	  if (i >= dj->fs->n_rootdir)	/* Report EOT when end of table */
+	    return FR_NO_FILE;
+	}
+	else {					/* Dynamic table */
+	  if (((i / (SS(dj->fs) / 32)) & (dj->fs->csize - 1)) == 0) {	/* Cluster changed? */
+	    clst = get_fat(dj->fs, dj->clust);			/* Get next cluster */
+	    if (clst <= 1) return FR_INT_ERR;
+	    if (clst == 0xFFFFFFFF) return FR_DISK_ERR;
+	    if (clst >= dj->fs->max_clust) {				/* When it reached end of dynamic table */
+#if !_FS_READONLY
+	      BYTE c;
+	      if (!streach) return FR_NO_FILE;			/* When do not streach, report EOT */
+	      clst = create_chain(dj->fs, dj->clust);		/* Streach cluster chain */
+	      if (clst == 0) return FR_DENIED;			/* No free cluster */
+	      if (clst == 1) return FR_INT_ERR;
+	      if (clst == 0xFFFFFFFF) return FR_DISK_ERR;
+	      /* Clean-up streached table */
+	      if (move_window(dj->fs, 0)) return FR_DISK_ERR;	/* Flush active window */
+	      memset(dj->fs->win, 0, SS(dj->fs));			/* Clear window buffer */
+	      dj->fs->winsect = clust2sect(dj->fs, clst);	/* Cluster start sector */
+	      for (c = 0; c < dj->fs->csize; c++) {		/* Fill the new cluster with 0 */
+		dj->fs->wflag = 1;
+		if (move_window(dj->fs, 0)) return FR_DISK_ERR;
+		dj->fs->winsect++;
+	      }
+	      dj->fs->winsect -= c;						/* Rewind window address */
+#else
+	      return FR_NO_FILE;			/* Report EOT */
+#endif
+	    }
+	    dj->clust = clst;				/* Initialize data for new cluster */
+	    dj->sect = clust2sect(dj->fs, clst);
+	  }
+	}
+      }
+
+      dj->index = i;
+      dj->dir = dj->fs->win + (i % (SS(dj->fs) / 32)) * 32;
+
+      return FR_OK;
+    }
+
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /* LFN handling - Test/Pick/Fit an LFN segment from/to directory entry   */
+  /*-----------------------------------------------------------------------*/
+#if _USE_LFN
+  static const BYTE LfnOfs[] = {1,3,5,7,9,14,16,18,20,22,24,28,30};	/* Offset of LFN chars in the directory entry */
+
+  /* TRUE:Matched, FALSE:Not matched */
+  static BOOL cmp_lfn (WCHAR *lfnbuf, BYTE *dir) /* Pointer to the LFN to be compared, Pointer to the directory entry containing a part of LFN */
+    {
+      int i, s;
+      WCHAR wc, uc;
+      
+      i = ((dir[LDIR_Ord] & 0xBF) - 1) * 13;	/* Get offset in the LFN buffer */
+      s = 0; wc = 1;
+      do {
+	uc = LD_WORD(dir+LfnOfs[s]);	/* Pick an LFN character from the entry */
+	if (wc) {	/* Last char has not been processed */
+	  wc = ff_wtoupper(uc);		/* Convert it to upper case */
+	  if (i >= _MAX_LFN || wc != ff_wtoupper(lfnbuf[i++]))	/* Compare it */
+	    return FALSE;			/* Not matched */
+	} 
+	else if (uc != 0xFFFF) 
+	  return FALSE;	/* Check filler */
+      } while (++s < 13);				/* Repeat until all chars in the entry are checked */
+      
+      if ((dir[LDIR_Ord] & 0x40) && wc && lfnbuf[i])	/* Last segment matched but different length */
+	return FALSE;
+      
+      return TRUE;					/* The part of LFN matched */
+    }
+  
+  /* TRUE:Succeeded, FALSE:Buffer overflow */
+  static BOOL pick_lfn (WCHAR *lfnbuf, BYTE *dir) /* Pointer to the Unicode-LFN buffer, Pointer to the directory entry */
+    {
+      int i, s;
+      WCHAR wc, uc;
+
+
+      i = ((dir[LDIR_Ord] & 0x3F) - 1) * 13;	/* Offset in the LFN buffer */
+
+      s = 0; wc = 1;
+      do {
+	uc = LD_WORD(dir+LfnOfs[s]);			/* Pick an LFN character from the entry */
+	if (wc) {	/* Last char has not been processed */
+	  if (i >= _MAX_LFN) 
+	    return FALSE;	/* Buffer overflow? */
+	  lfnbuf[i++] = wc = uc;				/* Store it */
+	} 
+	else if (uc != 0xFFFF) 
+	  return FALSE;		/* Check filler */
+      } while (++s < 13);						/* Read all character in the entry */
+
+      if (dir[LDIR_Ord] & 0x40) {				/* Put terminator if it is the last LFN part */
+	if (i >= _MAX_LFN) return FALSE;	/* Buffer overflow? */
+	lfnbuf[i] = 0;
+      }
+
+      return TRUE;
+    }
+
+
+#if !_FS_READONLY
+  static void fit_lfn (const WCHAR *lfnbuf,	/* Pointer to the LFN buffer */
+		       BYTE *dir,			/* Pointer to the directory entry */
+		       BYTE ord,			/* LFN order (1-20) */
+		       BYTE sum)			/* SFN sum */
+    {
+      int i, s;
+      WCHAR wc;
+
+
+      dir[LDIR_Chksum] = sum;			/* Set check sum */
+      dir[LDIR_Attr] = AM_LFN;		/* Set attribute. LFN entry */
+      dir[LDIR_Type] = 0;
+      ST_WORD(dir+LDIR_FstClusLO, 0);
+
+      i = (ord - 1) * 13;				/* Get offset in the LFN buffer */
+      s = wc = 0;
+      do {
+	if (wc != 0xFFFF) wc = lfnbuf[i++];	/* Get an effective char */
+	ST_WORD(dir+LfnOfs[s], wc);	/* Put it */
+	if (!wc) wc = 0xFFFF;		/* Padding chars following last char */
+      } while (++s < 13);
+      if (wc == 0xFFFF || !lfnbuf[i]) ord |= 0x40;	/* Bottom LFN part is the start of LFN sequence */
+      dir[LDIR_Ord] = ord;			/* Set the LFN order */
+    }
+
+#endif
+#endif
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Create numbered name                                                  */
+  /*-----------------------------------------------------------------------*/
+#if _USE_LFN
+  void gen_numname (BYTE *dst,			/* Pointer to genartated SFN */
+		    const BYTE *src,	/* Pointer to source SFN to be modified */
+		    const WCHAR *lfn,	/* Pointer to LFN */
+		    WORD num)			/* Sequense number */
+  {
+    char ns[8];
+    int i, j;
+
+
+    memcpy(dst, src, 11);
+
+    if (num > 5) {	/* On many collisions, generate a hash number instead of sequencial number */
+      do num = (num >> 1) + (num << 15) + (WORD)*lfn++; while (*lfn);
+    }
+
+    /* itoa */
+    i = 7;
+    do {
+      ns[i--] = (num % 10) + '0';
+      num /= 10;
+    } while (num);
+    ns[i] = '~';
+
+    /* Append the number */
+    for (j = 0; j < i && dst[j] != ' '; j++) {
+      if (IsDBCS1(dst[j])) {
+	if (j == i - 1) break;
+	j++;
+      }
+    }
+    do {
+      dst[j++] = (i < 8) ? ns[i++] : ' ';
+    } while (j < 8);
+  }
+#endif
+
+  /*-----------------------------------------------------------------------*/
+  /* Calculate sum of an SFN                                               */
+  /*-----------------------------------------------------------------------*/
+#if _USE_LFN
+  static BYTE sum_sfn (const BYTE *dir)		/* Ptr to directory entry */
+    {
+      BYTE sum = 0;
+      int n = 11;
+
+      do sum = (sum >> 1) + (sum << 7) + *dir++; while (--n);
+      return sum;
+    }
+#endif
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Directory handling - Find an object in the directory                  */
+  /*-----------------------------------------------------------------------*/
+
+  static FRESULT dir_find (DIR *dj)		/* Pointer to the directory object linked to the file name */
+    {
+      FRESULT res;
+      BYTE c, *dir;
+#if _USE_LFN
+      BYTE a, ord, sum;
+#endif
+
+      res = dir_seek(dj, 0);			/* Rewind directory object */
+      if (res != FR_OK) return res;
+
+#if _USE_LFN
+      ord = sum = 0xFF; 
+#endif
+      do {
+	res = move_window(dj->fs, dj->sect);
+	if (res != FR_OK) break;
+#if REALTIME
+	dir = get_dir_ptr(dj->fs, dj->dir);
+#else
+	dir = dj->dir;					/* Ptr to the directory entry of current index */
+#endif
+	c = dir[DIR_Name];
+	if (c == 0) { res = FR_NO_FILE; break; }	/* Reached to end of table */
+#if _USE_LFN	/* LFN configuration */
+	a = dir[DIR_Attr] & AM_MASK;
+	if (c == 0xE5 || ((a & AM_VOL) && a != AM_LFN)) {	/* An entry without valid data */
+	  ord = 0xFF;
+	} 
+	else {
+	  if (a == AM_LFN) {			/* An LFN entry is found */
+	    if (dj->lfn) {
+	      if (c & 0x40) {		/* Is it start of LFN sequence? */
+		sum = dir[LDIR_Chksum];
+		c &= 0xBF; ord = c;		/* LFN start order */
+		dj->lfn_idx = dj->index;
+	      }
+	      /* Check validity of the LFN entry and compare it with given name */
+	      ord = (c == ord && sum == dir[LDIR_Chksum] && cmp_lfn(dj->lfn, dir)) ? ord - 1 : 0xFF;
+	    }
+	  } 
+	  else {					/* An SFN entry is found */
+	    if (!ord && sum == sum_sfn(dir)) break;	/* LFN matched? */
+	    ord = 0xFF; dj->lfn_idx = 0xFFFF;	/* Reset LFN sequence */
+	    if (!(dj->fn[NS] & NS_LOSS) && !memcmp(dir, dj->fn, 11)) break;	/* SFN matched? */
+	  }
+	}
+#else		/* Non LFN configuration */
+	if (!(dir[DIR_Attr] & AM_VOL) && !mem_cmp(dir, dj->fn, 11)) /* Is it a valid entry? */
+	  break;
+#endif
+	res = dir_next(dj, FALSE);				/* Next entry */
+      } while (res == FR_OK);
+      
+      return res;
+    }
+  
+
+  
+  
+  /*-----------------------------------------------------------------------*/
+  /* Read an object from the directory                                     */
+  /*-----------------------------------------------------------------------*/
+#if _FS_MINIMIZE <= 1
+  static FRESULT dir_read (DIR *dj)		/* Pointer to the directory object to store read object name */
+    {
+      FRESULT res;
+      BYTE c, *dir;
+#if _USE_LFN
+      BYTE a, ord = 0xFF, sum = 0xFF;
+#endif
+
+      res = FR_NO_FILE;
+      while (dj->sect) {
+	res = move_window(dj->fs, dj->sect);
+	if (res != FR_OK) break;
+#if REALTIME
+	dir = get_dir_ptr(dj->fs, dj->dir);
+#else
+	dir = dj->dir;					/* Ptr to the directory entry of current index */
+#endif
+	c = dir[DIR_Name];
+	if (c == 0) { res = FR_NO_FILE; break; }	/* Reached to end of table */
+#if _USE_LFN	/* LFN configuration */
+	a = dir[DIR_Attr] & AM_MASK;
+	if (c == 0xE5 || (!_FS_RPATH && c == '.') || ((a & AM_VOL) && a != AM_LFN)) {	/* An entry without valid data */
+	  ord = 0xFF;
+	} else {
+	  if (a == AM_LFN) {			/* An LFN entry is found */
+	    if (c & 0x40) {			/* Is it start of LFN sequence? */
+	      sum = dir[LDIR_Chksum];
+	      c &= 0xBF; ord = c;
+	      dj->lfn_idx = dj->index;
+	    }
+	    /* Check LFN validity and capture it */
+	    ord = (c == ord && sum == dir[LDIR_Chksum] && pick_lfn(dj->lfn, dir)) ? ord - 1 : 0xFF;
+	  } else {				/* An SFN entry is found */
+	    if (ord || sum != sum_sfn(dir))	/* Is there a valid LFN? */
+	      dj->lfn_idx = 0xFFFF;		/* It has no LFN. */
+	    break;
+	  }
+	}
+#else		/* Non LFN configuration */
+	if (c != 0xE5 && (_FS_RPATH || c != '.') && !(dir[DIR_Attr] & AM_VOL))	/* Is it a valid entry? */
+	  break;
+#endif
+	res = dir_next(dj, FALSE);				/* Next entry */
+	if (res != FR_OK) break;
+      }
+
+      if (res != FR_OK) dj->sect = 0;
+
+      return res;
+    }
+#endif
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Register an object to the directory                                   */
+  /*-----------------------------------------------------------------------*/
+#if !_FS_READONLY
+  /* FR_OK:Successful, FR_DENIED:No free entry or too many SFN collision, FR_DISK_ERR:Disk error */
+  static FRESULT dir_register (DIR *dj)				/* Target directory with object name to be created */
+    {
+      FRESULT res;
+      BYTE c, *dir;
+
+#if _USE_LFN	/* LFN configuration */
+      WORD n, ne, is;
+      BYTE sn[12], *fn, sum;
+      WCHAR *lfn;
+
+
+      fn = dj->fn; lfn = dj->lfn;
+      memcpy(sn, fn, 12);
+
+      if (_FS_RPATH && (sn[NS] & NS_DOT)) return FR_INVALID_NAME;	/* Cannot create dot entry */
+
+      if (sn[NS] & NS_LOSS) {			/* When LFN is out of 8.3 format, generate a numbered name */
+	fn[NS] = 0; dj->lfn = NULL;			/* Find only SFN */
+	for (n = 1; n < 100; n++) {
+	  gen_numname(fn, sn, lfn, n);	/* Generate a numbered name */
+	  res = dir_find(dj);				/* Check if the name collides with existing SFN */
+	  if (res != FR_OK) break;
+	}
+	if (n == 100) return FR_DENIED;		/* Abort if too many collisions */
+	if (res != FR_NO_FILE) return res;	/* Abort if the result is other than 'not collided' */
+	fn[NS] = sn[NS]; dj->lfn = lfn;
+      }
+
+      if (sn[NS] & NS_LFN) {			/* When LFN is to be created, reserve reserve an SFN + LFN entries. */
+	for (ne = 0; lfn[ne]; ne++) ;
+	ne = (ne + 25) / 13;
+      } else {						/* Otherwise reserve only an SFN entry. */
+	ne = 1;
+      }
+
+      /* Reserve contiguous entries */
+      res = dir_seek(dj, 0);
+      if (res != FR_OK) return res;
+      n = is = 0;
+      do {
+	res = move_window(dj->fs, dj->sect);
+	if (res != FR_OK) break;
+#if REALTIME
+	c = *(get_dir_ptr(dj->fs, dj->dir));
+#else
+	c = *dj->dir;				/* Check the entry status */
+#endif
+	if (c == 0xE5 || c == 0) {	/* Is it a blank entry? */
+	  if (n == 0) is = dj->index;	/* First index of the contigulus entry */
+	  if (++n == ne) break;	/* A contiguous entry that requiered count is found */
+	} else {
+	  n = 0;					/* Not a blank entry. Restart to search */
+	}
+	res = dir_next(dj, TRUE);	/* Next entry with table streach */
+      } while (res == FR_OK);
+
+      if (res == FR_OK && ne > 1) {	/* Initialize LFN entry if needed */
+	res = dir_seek(dj, is);
+	if (res == FR_OK) {
+	  sum = sum_sfn(dj->fn);	/* Sum of the SFN tied to the LFN */
+	  ne--;
+	  do {					/* Store LFN entries in bottom first */
+	    res = move_window(dj->fs, dj->sect);
+	    if (res != FR_OK) break;
+#if REALTIME
+	    dj->dir = get_dir_ptr(dj->fs, dj->dir);
+#endif
+	    fit_lfn(dj->lfn, dj->dir, (BYTE)ne, sum);
+	    dj->fs->wflag = 1;
+	    res = dir_next(dj, FALSE);	/* Next entry */
+	  } while (res == FR_OK && --ne);
+	}
+      }
+
+#else	/* Non LFN configuration */
+      res = dir_seek(dj, 0);
+      if (res == FR_OK) {
+	do {	/* Find a blank entry for the SFN */
+	  res = move_window(dj->fs, dj->sect);
+	  if (res != FR_OK) break;
+#if REALTIME
+	  c = *(get_dir_ptr(dj->dir));
+#else
+	  c = *dj->dir;
+#endif
+	  if (c == 0xE5 || c == 0) break;	/* Is it a blank entry? */
+	  res = dir_next(dj, TRUE);		/* Next entry with table streach */
+	} while (res == FR_OK);
+      }
+#endif
+
+      if (res == FR_OK) {		/* Initialize the SFN entry */
+	res = move_window(dj->fs, dj->sect);
+	if (res == FR_OK) {
+#if REALTIME
+	  dir = get_dir_ptr(dj->fs, dj->dir);
+#else
+	  dir = dj->dir;
+#endif
+	  memset(dir, 0, 32);		/* Clean the entry */
+	  memcpy(dir, dj->fn, 11);	/* Put SFN */
+	  dir[DIR_NTres] = *(dj->fn+NS) & (NS_BODY | NS_EXT);	/* Put NT flag */
+	  dj->fs->wflag = 1;
+	}
+      }
+
+      return res;
+    }
+#endif /* !_FS_READONLY */
+
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Remove an object from the directory                                   */
+  /*-----------------------------------------------------------------------*/
+#if !_FS_READONLY && !_FS_MINIMIZE
+  /* FR_OK: Successful, FR_DISK_ERR: A disk error */
+  static FRESULT dir_remove (DIR *dj)				/* Directory object pointing the entry to be removed */
+    {
+      FRESULT res;
+
+#if _USE_LFN	/* LFN configuration */
+      WORD i;
+
+      i = dj->index;	/* SFN index */
+      res = dir_seek(dj, (WORD)((dj->lfn_idx == 0xFFFF) ? i : dj->lfn_idx));	/* Goto the SFN or top of the LFN entries */
+      if (res == FR_OK) {
+	do {
+	  res = move_window(dj->fs, dj->sect);
+	  if (res != FR_OK) break;
+#if REALTIME
+	  dj->dir = get_dir_ptr(dj->fs, dj->dir);
+#endif
+	  *dj->dir = 0xE5;			/* Mark the entry "deleted" */
+	  dj->fs->wflag = 1;
+	  if (dj->index >= i) break;	/* When SFN is deleted, all entries of the object is deleted. */
+	  res = dir_next(dj, FALSE);	/* Next entry */
+	} while (res == FR_OK);
+	if (res == FR_NO_FILE) res = FR_INT_ERR;
+      }
+
+#else			/* Non LFN configuration */
+      res = dir_seek(dj, dj->index);
+      if (res == FR_OK) {
+	res = move_window(dj->fs, dj->sect);
+	if (res == FR_OK) {
+#if REALTIME
+	  dj->dir = get_dir_ptr(dj->fs, dj->dir);
+#endif
+	  *dj->dir = 0xE5;			/* Mark the entry "deleted" */
+	  dj->fs->wflag = 1;
+	}
+      }
+#endif
+
+      return res;
+    }
+#endif /* !_FS_READONLY */
+
+  /*-----------------------------------------------------------------------*/
+  /* Pick a segment and create the object name in directory form           */
+  /*-----------------------------------------------------------------------*/
+
+  static
+    FRESULT create_name (DIR *dj, const XCHAR **path) 	/* Pointer to pointer to the segment in the path string */
+    {
+#ifdef _EXCVT
+      static const BYTE cvt[] = _EXCVT;
+#endif
+#if _USE_LFN	/* LFN configuration */
+      BYTE b, cf;
+      WCHAR w, *lfn;
+      int i, ni, si, di;
+      const XCHAR *p;
+
+      /* Create LFN in Unicode */
+      si = di = 0;
+      p = *path;
+      lfn = dj->lfn;
+      for (;;) {
+	w = p[si++];					/* Get a character */
+	if (w < ' ' || w == '/' || w == '\\') break;	/* Break on end of segment */
+	if (di >= _MAX_LFN)				/* Reject too long name */
+	  return FR_INVALID_NAME;
+#if !_LFN_UNICODE
+	w &= 0xFF;
+	if (IsDBCS1(w)) {				/* If it is a DBC 1st byte */
+	  b = p[si++];			/* Get 2nd byte */
+	  if (!IsDBCS2(b))			/* Reject invalid code for DBC */
+	    return FR_INVALID_NAME;
+	  w = (w << 8) + b;
+	}
+	w = ff_convert(w, 1);			/* Convert OEM to Unicode */
+	if (!w) return FR_INVALID_NAME;	/* Reject invalid code */
+#endif
+	if (w < 0x80 && strchr("\"*:<>\?|\x7F", w)) /* Reject illegal chars for LFN */
+	  return FR_INVALID_NAME;
+	lfn[di++] = w;					/* Store the Unicode char */
+      }
+      *path = &p[si];						/* Rerurn pointer to the next segment */
+      cf = (w < ' ') ? NS_LAST : 0;		/* Set last segment flag if end of path */
+#if _FS_RPATH
+      if ((di == 1 && lfn[di - 1] == '.') || /* Is this a dot entry? */
+	  (di == 2 && lfn[di - 1] == '.' && lfn[di - 2] == L'.')) {
+	lfn[di] = 0;
+	for (i = 0; i < 11; i++)
+	  dj->fn[i] = (i < di) ? '.' : ' ';
+	dj->fn[i] = cf | NS_DOT;		/* This is a dot entry */
+	return FR_OK;
+      }
+#endif
+      while (di) {						/* Strip trailing spaces and dots */
+	w = lfn[di - 1];
+	if (w != ' ' && w != '.') break;
+	di--;
+      }
+      if (!di) return FR_INVALID_NAME;	/* Reject null string */
+
+      lfn[di] = 0;						/* LFN is created */
+
+      /* Create SFN in directory form */
+      memset(dj->fn, ' ', 11);
+      for (si = 0; lfn[si] == ' ' || lfn[si] == '.'; si++) ;	/* Strip leading spaces and dots */
+      if (si) cf |= NS_LOSS | NS_LFN;
+      while (di && lfn[di - 1] != '.') di--;	/* Find extension (di<=si: no extension) */
+
+      b = i = 0; ni = 8;
+      for (;;) {
+	w = lfn[si++];					/* Get an LFN char */
+	if (!w) break;					/* Break on enf of the LFN */
+	if (w == ' ' || (w == '.' && si != di)) {	/* Remove spaces and dots */
+	  cf |= NS_LOSS | NS_LFN; continue;
+	}
+
+	if (i >= ni || si == di) {		/* Extension or end of SFN */
+	  if (ni == 11) {				/* Long extension */
+	    cf |= NS_LOSS | NS_LFN; break;
+	  }
+	  if (si != di) 
+	    cf |= NS_LOSS | NS_LFN;	/* Out of 8.3 format */
+	  if (si > di) break;		/* No extension */
+	  si = di; i = 8; ni = 11;	/* Enter extension section */
+	  b <<= 2; continue;
+	}
+
+	if (w >= 0x80) {				/* Non ASCII char */
+#ifdef _EXCVT
+	  w = ff_convert(w, 0);		/* Unicode -> OEM code */
+	  if (w) 
+	    w = cvt[w - 0x80];	        /* Convert extend char to upper (SBCS) */
+#else
+	  w = ff_convert(ff_wtoupper(w), 0);	/* Upper converted Unicode -> OEM code */
+#endif
+	  cf |= NS_LFN;				/* Force create LFN entry */
+	}
+
+	if (_DF1S && w >= 0x100) {		/* Double byte char */
+	  if (i >= ni - 1) {
+	    cf |= NS_LOSS | NS_LFN; i = ni; continue;
+	  }
+	  dj->fn[i++] = (BYTE)(w >> 8);
+	} else {						/* Single byte char */
+	  if (!w || strchr("+,;[=]", w)) {	/* Replace illegal chars for SFN */
+	    w = '_'; cf |= NS_LOSS | NS_LFN;	/* Lossy conversion */
+	  } else {
+	    if (IsUpper(w)) {		/* ASCII Large capital */
+	      b |= 2;
+	    } else {
+	      if (IsLower(w)) {	        /* ASCII Small capital */
+		b |= 1; w -= 0x20;
+	      }
+	    }
+	  }
+	}
+	dj->fn[i++] = (BYTE)w;
+      }
+
+      if (dj->fn[0] == 0xE5) dj->fn[0] = 0x05;	/* If the first char collides with deleted mark, replace it with 0x05 */
+
+      if (ni == 8) b <<= 2;
+      if ((b & 0x0C) == 0x0C || (b & 0x03) == 0x03)	/* Create LFN entry when there are composite capitals */
+	cf |= NS_LFN;
+      if (!(cf & NS_LFN)) {						/* When LFN is in 8.3 format without extended char, NT flags are created */
+	if ((b & 0x03) == 0x01) cf |= NS_EXT;	/* NT flag (Extension has only small capital) */
+	if ((b & 0x0C) == 0x04) cf |= NS_BODY;	/* NT flag (Filename has only small capital) */
+      }
+
+      dj->fn[NS] = cf;	/* SFN is created */
+
+      return FR_OK;
+
+#else	/* Non-LFN configuration */
+      BYTE b, c, d, *sfn;
+      int ni, si, i;
+      const char *p;
+
+      /* Create file name in directory form */
+      sfn = dj->fn;
+      memset(sfn, ' ', 11);
+      si = i = b = 0; ni = 8;
+      p = *path;
+#if _FS_RPATH
+      if (p[si] == '.') { /* Is this a dot entry? */
+	for (;;) {
+	  c = p[si++];
+	  if (c != '.' || si >= 3) break;
+	  sfn[i++] = c;
+	}
+	if (c != '/' && c != '\\' && c > ' ') return FR_INVALID_NAME;
+	*path = &p[si];									/* Rerurn pointer to the next segment */
+	sfn[NS] = (c < ' ') ? NS_LAST|NS_DOT : NS_DOT;	/* Set last segment flag if end of path */
+	return FR_OK;
+      }
+#endif
+      for (;;) {
+	c = p[si++];
+	if (c <= ' ' || c == '/' || c == '\\') break;	/* Break on end of segment */
+	if (c == '.' || i >= ni) {
+	  if (ni != 8 || c != '.') return FR_INVALID_NAME;
+	  i = 8; ni = 11;
+	  b <<= 2; continue;
+	}
+	if (c >= 0x80) {				/* Extended char */
+#ifdef _EXCVT
+	  c = cvt[c - 0x80];			/* Convert extend char (SBCS) */
+#else
+	  b |= 3;						/* Eliminate NT flag if ext char is exist */
+#if !_DF1S	/* ASCII only cfg */
+	  return FR_INVALID_NAME;
+#endif
+#endif
+	}
+	if (IsDBCS1(c)) {			/* DBC 1st byte? */
+	  d = p[si++];				/* Get 2nd byte */
+	  if (!IsDBCS2(d) || i >= ni - 1)	/* Reject invalid DBC */
+	    return FR_INVALID_NAME;
+	  sfn[i++] = c;
+	  sfn[i++] = d;
+	} else {
+	  if (strchr(" \"*+,[=]|\x7F", c))	/* Reject illegal chrs for SFN */
+	    return FR_INVALID_NAME;
+	  if (IsUpper(c)) {                     /* ASCII large capital? */
+	    b |= 2;
+	  } else {
+	    if (IsLower(c)) {                   /* ASCII small capital? */
+	      b |= 1; c -= 0x20;
+	    }
+	  }
+	  sfn[i++] = c;
+	}
+      }
+      *path = &p[si];						/* Rerurn pointer to the next segment */
+      c = (c <= ' ') ? NS_LAST : 0;		/* Set last segment flag if end of path */
+
+      if (!i) return FR_INVALID_NAME;		/* Reject null string */
+      if (sfn[0] == 0xE5) sfn[0] = 0x05;	/* When first char collides with 0xE5, replace it with 0x05 */
+
+      if (ni == 8) b <<= 2;
+      if ((b & 0x03) == 0x01) c |= NS_EXT;	/* NT flag (Extension has only small capital) */
+      if ((b & 0x0C) == 0x04) c |= NS_BODY;	/* NT flag (Filename has only small capital) */
+
+      sfn[NS] = c;		/* Store NT flag, File name is created */
+
+      return FR_OK;
+#endif
+    }
+
+  /*-----------------------------------------------------------------------*/
+  /* Get file information from directory entry                             */
+  /*-----------------------------------------------------------------------*/
+#if _FS_MINIMIZE <= 1
+  static void get_fileinfo (DIR *dj, FILINFO *fno)	 	/* Pointer to the file information to be filled */
+    {
+      int i;
+      BYTE c, nt, *dir;
+      char *p;
+
+
+      p = fno->fname;
+      if (dj->sect) {
+#if REALTIME
+	dir = get_dir_ptr(dj->fs, dj->dir);
+#else
+	dir = dj->dir;
+#endif
+	nt = dir[DIR_NTres];		/* NT flag */
+	for (i = 0; i < 8; i++) {	/* Copy name body */
+	  c = dir[i];
+	  if (c == ' ') break;
+	  if (c == 0x05) c = 0xE5;
+	  if (_USE_LFN && (nt & NS_BODY) && IsUpper(c)) c += 0x20;
+	  *p++ = c;
+	}
+	if (dir[8] != ' ') {		/* Copy name extension */
+	  *p++ = '.';
+	  for (i = 8; i < 11; i++) {
+	    c = dir[i];
+	    if (c == ' ') break;
+	    if (_USE_LFN && (nt & NS_EXT) && IsUpper(c)) c += 0x20;
+	    *p++ = c;
+	  }
+	}
+	fno->fattrib = dir[DIR_Attr];				/* Attribute */
+	fno->fsize = LD_DWORD(dir+DIR_FileSize);	/* Size */
+	fno->fdate = LD_WORD(dir+DIR_WrtDate);		/* Date */
+	fno->ftime = LD_WORD(dir+DIR_WrtTime);		/* Time */
+      }
+      *p = 0;
+
+#if _USE_LFN
+	if (fno->lfname) {
+		XCHAR *tp = fno->lfname;
+		WCHAR w, *lfn;
+
+	i = 0;
+	if (dj->sect && dj->lfn_idx != 0xFFFF) {/* Get LFN if available */
+	  lfn = dj->lfn;
+	  while ((w = *lfn++) != 0) {			/* Get an LFN char */
+#if !_LFN_UNICODE
+	    w = ff_convert(w, 0);			/* Unicode -> OEM conversion */
+	    if (!w) { i = 0; break; }		/* Could not convert, no LFN */
+	    if (_DF1S && w >= 0x100)		/* Put 1st byte if it is a DBC */
+	      tp[i++] = (XCHAR)(w >> 8);
+#endif
+	    if (i >= fno->lfsize - 1) { i = 0; break; }	/* Buffer overrun, no LFN */
+	    tp[i++] = (XCHAR)w;
+	  }
+	}
+	tp[i] = 0;	/* Terminator */
+      }
+#endif
+    }
+#endif /* _FS_MINIMIZE <= 1 */
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Follow a file path                                                    */
+  /*-----------------------------------------------------------------------*/
+
+  /* FR_OK(0): successful, !=0: error code */
+  static FRESULT follow_path (DIR *dj, const char *path) 	
+    /* Directory object to return last directory and found object, Full-path string to find a file or directory */
+    {
+      FRESULT res;
+      BYTE *dir, last;
+
+      while (!_USE_LFN && *path == ' ') path++;	/* Skip leading spaces */
+#if _FS_RPATH
+      if (*path == '/' || *path == '\\') { /* There is a heading separator */
+	path++;	dj->sclust = 0;		/* Strip it and start from the root dir */
+      } else {							/* No heading saparator */
+	dj->sclust = dj->fs->cdir;	/* Start from the current dir */
+      }
+#else
+      if (*path == '/' || *path == '\\')	/* Strip heading separator if exist */
+	path++;
+      dj->sclust = 0;						/* Start from the root dir */
+#endif
+
+      if ((UINT)*path < ' ') {			/* Null path means the start directory itself */
+	res = dir_seek(dj, 0);
+	dj->dir = NULL;
+
+      } 
+      else {							/* Follow path */
+	for (;;) {
+	  res = create_name(dj, &path);	/* Get a segment */
+	  if (res != FR_OK) break;
+	  res = dir_find(dj);				/* Find it */
+	  last = *(dj->fn+NS) & NS_LAST;
+	  if (res != FR_OK) {				/* Could not find the object */
+	    if (res == FR_NO_FILE && !last)
+	      res = FR_NO_PATH;
+	    break;
+	  }
+	  if (last) break;				/* Last segment match. Function completed. */
+#if REALTIME
+	  dir = get_dir_ptr(dj->fs, dj->dir);
+#else
+	  dir = dj->dir;					/* There is next segment. Follow the sub directory */
+#endif
+	  if (!(dir[DIR_Attr] & AM_DIR)) { /* Cannot follow because it is a file */
+	    res = FR_NO_PATH; break;
+	  }
+	  dj->sclust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
+	}
+      }
+
+      return res;
+    }
+
+  /*-----------------------------------------------------------------------*/
+  /* Load boot record and check if it is an FAT boot record                */
+  /*-----------------------------------------------------------------------*/
+
+  /* 0:The FAT boot record, 1:Valid boot record but not an FAT, 2:Not a boot record, 3:Error */
+  static BYTE check_fs (FATFS *fs, DWORD sect) /* File system object, Sector# (lba) to check if it is an FAT boot record or not */
+    {
+      if (disk_read(fs->drive, fs->win, sect, 1) != RES_OK)	/* Load boot record */
+	return 3;
+      if (LD_WORD(&fs->win[BS_55AA]) != 0xAA55)		/* Check record signature (always placed at offset 510 even if the sector size is >512) */
+	return 2;
+
+      if ((LD_DWORD(&fs->win[BS_FilSysType]) & 0xFFFFFF) == 0x544146)	/* Check "FAT" string */
+	return 0;
+      if ((LD_DWORD(&fs->win[BS_FilSysType32]) & 0xFFFFFF) == 0x544146)
+	return 0;
+
+      return 1;
+    }
+
+  /*-----------------------------------------------------------------------*/
+  /* Make sure that the file system is valid                               */
+  /*-----------------------------------------------------------------------*/
+
+  /* FR_OK(0): successful, !=0: any error occured */
+  static FRESULT chk_mounted (const XCHAR **path,	/* Pointer to pointer to the path name (drive number) */
+			     FATFS **rfs,		/* Pointer to pointer to the found file system object */
+			     BYTE chk_wp)		/* !=0: Check media write protection for write access */
+    {
+      BYTE fmt, *tbl;
+      UINT vol;
+      DSTATUS stat;
+      DWORD bsect, fsize, tsect, mclst;
+      const XCHAR *p = *path;
+      FATFS *fs;
+
+
+      /* Get logical drive number from the path name */
+      vol = p[0] - '0';				/* Is there a drive number? */
+      if (vol <= 9 && p[1] == ':') {	/* Found a drive number, get and strip it */
+	p += 2; *path = p;			/* Return pointer to the path name */
+      } else {						/* No drive number is given */
+#if _FS_RPATH
+	vol = Drive;				/* Use current drive */
+#else
+	vol = 0;					/* Use drive 0 */
+#endif
+      }
+
+      /* Check if the logical drive is valid or not */
+      if (vol >= _DRIVES) 			/* Is the drive number valid? */
+	return FR_INVALID_DRIVE;
+      *rfs = fs = FatFs[vol];			/* Returen pointer to the corresponding file system object */
+      if (!fs) return FR_NOT_ENABLED;	/* Is the file system object available? */
+
+      ENTER_FF(fs);					/* Lock file system */
+
+      if (fs->fs_type) {				/* If the logical drive has been mounted */
+	stat = disk_status(fs->drive);
+	if (!(stat & STA_NOINIT)) {	/* and the physical drive is kept initialized (has not been changed), */
+#if !_FS_READONLY
+	  if (chk_wp && (stat & STA_PROTECT))	/* Check write protection if needed */
+	    return FR_WRITE_PROTECTED;
+#endif
+	  return FR_OK;			/* The file system object is valid */
+	}
+      }
+
+      /* The logical drive must be mounted. Following code attempts to mount the volume */
+
+      fs->fs_type = 0;					/* Clear the file system object */
+      fs->drive = (BYTE)LD2PD(vol);		/* Bind the logical drive and a physical drive */
+      stat = disk_initialize(fs->drive);	/* Initialize low level disk I/O layer */
+      if (stat & STA_NOINIT)				/* Check if the drive is ready */
+	return FR_NOT_READY;
+#if _MAX_SS != 512						/* Get disk sector size if needed */
+      if (disk_ioctl(fs->drive, GET_SECTOR_SIZE, &SS(fs)) != RES_OK || SS(fs) > _MAX_SS)
+	return FR_NO_FILESYSTEM;
+#endif
+#if !_FS_READONLY
+      if (chk_wp && (stat & STA_PROTECT))	/* Check disk write protection if needed */
+	return FR_WRITE_PROTECTED;
+#endif
+      /* Search FAT partition on the drive */
+      fmt = check_fs(fs, bsect = 0);		/* Check sector 0 as an SFD format */
+      if (fmt == 1) {						/* Not an FAT boot record, it may be patitioned */
+	/* Check a partition listed in top of the partition table */
+	tbl = &fs->win[MBR_Table + LD2PT(vol) * 16];	/* Partition table */
+	if (tbl[4]) {									/* Is the partition existing? */
+	  bsect = LD_DWORD(&tbl[8]);					/* Partition offset in LBA */
+	  fmt = check_fs(fs, bsect);					/* Check the partition */
+	}
+      }
+      if (fmt == 3) return FR_DISK_ERR;
+      if (fmt || LD_WORD(fs->win+BPB_BytsPerSec) != SS(fs))	/* No valid FAT patition is found */
+	return FR_NO_FILESYSTEM;
+
+      /* Initialize the file system object */
+      fsize = LD_WORD(fs->win+BPB_FATSz16);				/* Number of sectors per FAT */
+      if (!fsize) fsize = LD_DWORD(fs->win+BPB_FATSz32);
+      fs->sects_fat = fsize;
+      fs->n_fats = fs->win[BPB_NumFATs];					/* Number of FAT copies */
+      fsize *= fs->n_fats;								/* (Number of sectors in FAT area) */
+      fs->fatbase = bsect + LD_WORD(fs->win+BPB_RsvdSecCnt); /* FAT start sector (lba) */
+      fs->csize = fs->win[BPB_SecPerClus];				/* Number of sectors per cluster */
+      fs->n_rootdir = LD_WORD(fs->win+BPB_RootEntCnt);	     /* Nmuber of root directory entries */
+      tsect = LD_WORD(fs->win+BPB_TotSec16);		     /* Number of sectors on the volume */
+      if (!tsect) tsect = LD_DWORD(fs->win+BPB_TotSec32);
+      fs->max_clust = mclst = (tsect				             /* Last cluster# + 1  (Number of clusters + 2) */
+			       - LD_WORD(fs->win+BPB_RsvdSecCnt) - fsize - fs->n_rootdir / (SS(fs)/32)
+			       ) / fs->csize + 2;
+
+      fmt = FS_FAT12;										/* Determine the FAT sub type */
+      if (mclst >= 0xFF7) fmt = FS_FAT16;					/* Number of clusters >= 0xFF5 */
+      if (mclst >= 0xFFF7) fmt = FS_FAT32;				/* Number of clusters >= 0xFFF5 */
+
+      if (fmt == FS_FAT32)
+	fs->dirbase = LD_DWORD(fs->win+BPB_RootClus);	/* Root directory start cluster */
+      else
+	fs->dirbase = fs->fatbase + fsize;				/* Root directory start sector (lba) */
+      fs->database = fs->fatbase + fsize + fs->n_rootdir / (SS(fs)/32);	/* Data start sector (lba) */
+
+#if !_FS_READONLY
+      /* Initialize allocation information */
+      fs->free_clust = 0xFFFFFFFF;
+      fs->wflag = 0;
+      /* Get fsinfo if needed */
+      if (fmt == FS_FAT32) {
+	fs->fsi_flag = 0;
+	fs->fsi_sector = bsect + LD_WORD(fs->win+BPB_FSInfo);
+	if (disk_read(fs->drive, fs->win, fs->fsi_sector, 1) == RES_OK &&
+	    LD_WORD(fs->win+BS_55AA) == 0xAA55 &&
+	    LD_DWORD(fs->win+FSI_LeadSig) == 0x41615252 &&
+	    LD_DWORD(fs->win+FSI_StrucSig) == 0x61417272) {
+	  fs->last_clust = LD_DWORD(fs->win+FSI_Nxt_Free);
+	  fs->free_clust = LD_DWORD(fs->win+FSI_Free_Count);
+	}
+      }
+#endif
+      fs->fs_type = fmt;		/* FAT sub-type */
+      fs->winsect = 0;		/* Invalidate sector cache */
+#if _FS_RPATH
+      fs->cdir = 0;			/* Current directory (root dir) */
+#endif
+      fs->id = ++Fsid;		/* File system mount ID */
+
+      return FR_OK;
+    }
+
+  /*-----------------------------------------------------------------------*/
+  /* Check if the file/dir object is valid or not                          */
+  /*-----------------------------------------------------------------------*/
+
+  /* FR_OK(0): The object is valid, !=0: Invalid */
+  static FRESULT validate (FATFS *fs, WORD id)	/* Member id of the target object to be checked */
+    {
+      if (!fs || !fs->fs_type || fs->id != id)
+	return FR_INVALID_OBJECT;
+
+      ENTER_FF(fs);		/* Lock file system */
+
+      if (disk_status(fs->drive) & STA_NOINIT)
+	return FR_NOT_READY;
+
+      return FR_OK;
+    }
+
+  /*--------------------------------------------------------------------------
+
+  Public Functions
+
+  --------------------------------------------------------------------------*/
+  /*-----------------------------------------------------------------------*/
+  /* Mount/Unmount a Locical Drive                                         */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_mount (BYTE vol,   /* Logical drive number to be mounted/unmounted */
+		   FATFS *fs)   /* Pointer to new file system object (NULL for unmount)*/
+  {
+    FATFS *rfs;
+    DSTATUS stat;
+
+    if (vol >= _DRIVES)				/* Check if the drive number is valid */
+      return FR_INVALID_DRIVE;
+    rfs = FatFs[vol];				/* Get current fs object */
+
+    if (rfs) {
+#if _FS_REENTRANT					/* Discard sync object of the current volume */
+      if (!ff_del_syncobj(rfs->sobj)) return FR_INT_ERR;
+#endif
+      rfs->fs_type = 0;			/* Clear old fs object */
+    }
+
+    FatFs[vol] = fs;				/* Register new fs object */
+    if (fs) {
+      fs->fs_type = 0;			/* Clear new fs object */
+#if _FS_REENTRANT					/* Create sync object for the new volume */
+      if (!ff_cre_syncobj(vol, &fs->sobj)) return FR_INT_ERR;
+#endif
+      
+#if REALTIME
+      init_fatfs(fs);
+#endif
+      
+      fs->drive = (BYTE)LD2PD(vol);		/* Bind the logical drive and a physical drive */
+      stat = disk_initialize(fs->drive);	/* Initialize low level disk I/O layer */
+      if (stat & STA_NOINIT)				/* Check if the drive is ready */
+	return FR_NOT_READY;
+    }
+
+    return FR_OK;
+  }
+
+  /*-----------------------------------------------------------------------*/
+  /* Open or Create a File                                                 */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_open (FIL *fp,			/* Pointer to the blank file object */
+		  const XCHAR *path,	/* Pointer to the file name */
+		  BYTE mode)			/* Access mode and file open mode flags */
+  {
+    FRESULT res;
+    DIR dj;
+    NAMEBUF(sfn, lfn);
+    BYTE *dir;
+
+    fp->fs = NULL;		/* Clear file object */
+#if !_FS_READONLY
+    mode &= (FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW);
+    res = chk_mounted(&path, &dj.fs, (BYTE)(mode & (FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)));
+#else
+    mode &= FA_READ;
+    res = chk_mounted(&path, &dj.fs, 0);
+#endif
+    if (res != FR_OK) 
+      LEAVE_FF(dj.fs, res);
+    INITBUF(dj, sfn, lfn);
+    res = follow_path(&dj, path);	/* Follow the file path */
+#if !_FS_READONLY
+    /* Create or Open a file */
+    if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) {
+      DWORD ps, cl;
+
+      if (res != FR_OK) {		                /* No file, create new */
+	if (res == FR_NO_FILE)                    /* There is no file to open, create a new entry */
+	  res = dir_register(&dj);
+	if (res != FR_OK) LEAVE_FF(dj.fs, res);
+	mode |= FA_CREATE_ALWAYS;
+#if REALTIME
+	dir = get_dir_ptr(dj.fs, dj.dir);
+#else
+	dir = dj.dir;                             /* Created entry (SFN entry) */
+#endif
+      }
+      else {					/* Any object is already existing */
+	if (mode & FA_CREATE_NEW)			/* Cannot create new */
+	  LEAVE_FF(dj.fs, FR_EXIST);
+#if REALTIME
+	dir = get_dir_ptr(dj.fs, dj.dir);
+#else
+	dir = dj.dir;
+#endif
+	if (!dir || (dir[DIR_Attr] & (AM_RDO | AM_DIR)))	/* Cannot overwrite it (R/O or DIR) */
+	  LEAVE_FF(dj.fs, FR_DENIED);
+	if (mode & FA_CREATE_ALWAYS) {		/* Resize it to zero on overwrite mode */
+	  cl = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);	/* Get start cluster */
+	  ST_WORD(dir+DIR_FstClusHI, 0);	/* cluster = 0 */
+	  ST_WORD(dir+DIR_FstClusLO, 0);
+	  ST_DWORD(dir+DIR_FileSize, 0);	/* size = 0 */
+	  dj.fs->wflag = 1;
+	  ps = dj.fs->winsect;			/* Remove the cluster chain */
+	  if (cl) {
+	    res = remove_chain(dj.fs, cl);
+	    if (res) LEAVE_FF(dj.fs, res);
+	    dj.fs->last_clust = cl - 1;	/* Reuse the cluster hole */
+	  }
+	  res = move_window(dj.fs, ps);
+	  if (res != FR_OK) LEAVE_FF(dj.fs, res);
+	}
+      }
+      if (mode & FA_CREATE_ALWAYS) {
+#if REALTIME
+	dir = get_dir_ptr(dj.fs, dir);
+#endif
+	dir[DIR_Attr] = 0;					/* Reset attribute */
+	ps = get_fattime();
+	ST_DWORD(dir+DIR_CrtTime, ps);		/* Created time */
+	dj.fs->wflag = 1;
+	mode |= FA__WRITTEN;				/* Set file changed flag */
+      }
+    }
+    /* Open an existing file */
+    else {
+#endif /* !_FS_READONLY */
+      if (res != FR_OK) LEAVE_FF(dj.fs, res);	/* Follow failed */
+#if REALTIME
+      dir = get_dir_ptr(dj.fs, dj.dir);
+#else
+      dir = dj.dir;
+#endif
+      if (!dir || (dir[DIR_Attr] & AM_DIR))	/* It is a directory */
+	LEAVE_FF(dj.fs, FR_NO_FILE);
+#if !_FS_READONLY
+      if ((mode & FA_WRITE) && (dir[DIR_Attr] & AM_RDO)) /* R/O violation */
+	LEAVE_FF(dj.fs, FR_DENIED);
+    }
+    fp->dir_sect = dj.fs->winsect;		/* Pointer to the directory entry */
+    fp->dir_ptr = dj.dir;
+#endif
+    fp->flag = mode;					/* File access mode */
+    fp->org_clust =						/* File start cluster */
+      ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
+    fp->fsize = LD_DWORD(dir+DIR_FileSize);	/* File size */
+    fp->fptr = 0; fp->csect = 255;		/* File pointer */
+    fp->dsect = 0;
+    fp->fs = dj.fs; fp->id = dj.fs->id;	/* Owner file system object of the file */
+
+#if REALTIME
+    if (fp && fp->fs && fp->fs->buffer_used) if (sync_win_buffers(fp->fs) != RES_OK) return FR_DISK_ERR;
+    if (fp && fp->fs) move_window(fp->fs, 0);
+#endif
+
+    LEAVE_FF(dj.fs, FR_OK);
+  }
+
+  /*-----------------------------------------------------------------------*/
+  /* Read File                                                             */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_read (FIL *fp, 		/* Pointer to the file object */
+		  void *buff,		/* Pointer to data buffer */
+		  UINT btr,		/* Number of bytes to read */
+		  UINT *br)		/* Pointer to number of bytes read */
+  {
+    FRESULT res;
+    DWORD clst, sect, remain;
+    UINT rcnt, cc;
+    BYTE *rbuff = buff;
+
+    *br = 0;	/* Initialize bytes read */
+
+    res = validate(fp->fs, fp->id);					/* Check validity of the object */
+    if (res != FR_OK) LEAVE_FF(fp->fs, res);
+    if (fp->flag & FA__ERROR)						/* Check abort flag */
+      LEAVE_FF(fp->fs, FR_INT_ERR);
+    if (!(fp->flag & FA_READ)) 						/* Check access mode */
+      LEAVE_FF(fp->fs, FR_DENIED);
+    remain = fp->fsize - fp->fptr;
+    if (btr > remain) btr = (UINT)remain;			/* Truncate btr by remaining bytes */
+
+    for ( ;  btr;									/* Repeat until all data transferred */
+	  rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) {
+      if ((fp->fptr % SS(fp->fs)) == 0) {			/* On the sector boundary? */
+	if (fp->csect >= fp->fs->csize) {		/* On the cluster boundary? */
+	  clst = (fp->fptr == 0) ?			/* On the top of the file? */
+	    fp->org_clust : get_fat(fp->fs, fp->curr_clust);
+	  if (clst <= 1) ABORT(fp->fs, FR_INT_ERR);
+	  if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
+	  fp->curr_clust = clst;				/* Update current cluster */
+	  fp->csect = 0;						/* Reset sector offset in the cluster */
+	}
+	sect = clust2sect(fp->fs, fp->curr_clust);	/* Get current sector */
+	if (!sect) ABORT(fp->fs, FR_INT_ERR);
+	sect += fp->csect;
+	cc = btr / SS(fp->fs);					/* When remaining bytes >= sector size, */
+	if (cc) {								/* Read maximum contiguous sectors directly */
+	  if (fp->csect + cc > fp->fs->csize)	/* Clip at cluster boundary */
+	    cc = fp->fs->csize - fp->csect;
+	  if (disk_read(fp->fs->drive, rbuff, sect, (BYTE)cc) != RES_OK)
+	    ABORT(fp->fs, FR_DISK_ERR);
+#if !_FS_READONLY && _FS_MINIMIZE <= 2
+#if _FS_TINY
+	  if (fp->fs->wflag && fp->fs->winsect - sect < cc)		/* Replace one of the read sectors with cached data if it contains a dirty sector */
+	    memcpy(rbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), fp->fs->win, SS(fp->fs));
+#else
+	  if ((fp->flag & FA__DIRTY) && fp->dsect - sect < cc)	/* Replace one of the read sectors with cached data if it contains a dirty sector */
+	    memcpy(rbuff + ((fp->dsect - sect) * SS(fp->fs)), fp->buf, SS(fp->fs));
+#endif
+#endif
+	  fp->csect += (BYTE)cc;				/* Next sector address in the cluster */
+	  rcnt = SS(fp->fs) * cc;				/* Number of bytes transferred */
+	  continue;
+	}
+#if !_FS_TINY
+#if !_FS_READONLY
+	if (fp->flag & FA__DIRTY) {			/* Write sector I/O buffer if needed */
+	  if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK)
+	    ABORT(fp->fs, FR_DISK_ERR);
+	  fp->flag &= ~FA__DIRTY;
+	}
+#endif
+	if (fp->dsect != sect) {			/* Fill sector buffer with file data */
+	  if (disk_read(fp->fs->drive, fp->buf, sect, 1) != RES_OK)
+	    ABORT(fp->fs, FR_DISK_ERR);
+	}
+#endif
+	fp->dsect = sect;
+	fp->csect++;							/* Next sector address in the cluster */
+      }
+      rcnt = SS(fp->fs) - (fp->fptr % SS(fp->fs));	/* Get partial sector data from sector buffer */
+      if (rcnt > btr) rcnt = btr;
+#if _FS_TINY
+      if (move_window(fp->fs, fp->dsect))			/* Move sector window */
+	ABORT(fp->fs, FR_DISK_ERR);
+      memcpy(rbuff, &fp->fs->win[fp->fptr % SS(fp->fs)], rcnt);	/* Pick partial sector */
+#else
+      memcpy(rbuff, &fp->buf[fp->fptr % SS(fp->fs)], rcnt);	/* Pick partial sector */
+#endif
+    }
+
+    LEAVE_FF(fp->fs, FR_OK);
+  }
+
+#if !_FS_READONLY
+  /*-----------------------------------------------------------------------*/
+  /* Write File                                                            */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_write (FIL *fp,			/* Pointer to the file object */
+		   const void *buff,	/* Pointer to the data to be written */
+		   UINT btw,			/* Number of bytes to write */
+		   UINT *bw)			/* Pointer to number of bytes written */
+  {
+    FRESULT res;
+    DWORD clst, sect;
+    UINT wcnt, cc;
+    const BYTE *wbuff = buff;
+
+
+    *bw = 0;	/* Initialize bytes written */
+
+    res = validate(fp->fs, fp->id);					/* Check validity of the object */
+    if (res != FR_OK) LEAVE_FF(fp->fs, res);
+    if (fp->flag & FA__ERROR)						/* Check abort flag */
+      LEAVE_FF(fp->fs, FR_INT_ERR);
+    if (!(fp->flag & FA_WRITE))						/* Check access mode */
+      LEAVE_FF(fp->fs, FR_DENIED);
+    if (fp->fsize + btw < fp->fsize) btw = 0;		/* File size cannot reach 4GB */
+
+    for ( ;  btw;									/* Repeat until all data transferred */
+	  wbuff += wcnt, fp->fptr += wcnt, *bw += wcnt, btw -= wcnt) {
+      if ((fp->fptr % SS(fp->fs)) == 0) {			/* On the sector boundary? */
+	if (fp->csect >= fp->fs->csize) {		/* On the cluster boundary? */
+	  if (fp->fptr == 0) {				/* On the top of the file? */
+	    clst = fp->org_clust;			/* Follow from the origin */
+	    if (clst == 0)					/* When there is no cluster chain, */
+	      fp->org_clust = clst = create_chain(fp->fs, 0);	/* Create a new cluster chain */
+	  } else {							/* Middle or end of the file */
+	    clst = create_chain(fp->fs, fp->curr_clust);			/* Follow or streach cluster chain */
+	  }
+	  if (clst == 0) break;				/* Could not allocate a new cluster (disk full) */
+	  if (clst == 1) ABORT(fp->fs, FR_INT_ERR);
+	  if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
+	  fp->curr_clust = clst;				/* Update current cluster */
+	  fp->csect = 0;						/* Reset sector address in the cluster */
+	}
+#if _FS_TINY
+	if (fp->fs->winsect == fp->dsect && move_window(fp->fs, 0))	/* Write back data buffer prior to following direct transfer */
+	  ABORT(fp->fs, FR_DISK_ERR);
+#else
+	if (fp->flag & FA__DIRTY) {		/* Write back data buffer prior to following direct transfer */
+	  if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK)
+	    ABORT(fp->fs, FR_DISK_ERR);
+	  fp->flag &= ~FA__DIRTY;
+	}
+#endif
+	sect = clust2sect(fp->fs, fp->curr_clust);	/* Get current sector */
+	if (!sect) ABORT(fp->fs, FR_INT_ERR);
+	sect += fp->csect;
+	cc = btw / SS(fp->fs);					/* When remaining bytes >= sector size, */
+	if (cc) {								/* Write maximum contiguous sectors directly */
+	  if (fp->csect + cc > fp->fs->csize)	/* Clip at cluster boundary */
+	    cc = fp->fs->csize - fp->csect;
+	  if (disk_write(fp->fs->drive, wbuff, sect, (BYTE)cc) != RES_OK)
+	    ABORT(fp->fs, FR_DISK_ERR);
+#if _FS_TINY
+	  if (fp->fs->winsect - sect < cc) {  /* Refill sector cache if it gets dirty by the direct write */
+	    memcpy(fp->fs->win, wbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), SS(fp->fs));
+	    fp->fs->wflag = 0;
+	  }
+#else
+	  if (fp->dsect - sect < cc) {  /* Refill sector cache if it gets dirty by the direct write */
+	    memcpy(fp->buf, wbuff + ((fp->dsect - sect) * SS(fp->fs)), SS(fp->fs));
+	    fp->flag &= ~FA__DIRTY;
+	  }
+#endif
+	  fp->csect += (BYTE)cc;				/* Next sector address in the cluster */
+	  wcnt = SS(fp->fs) * cc;				/* Number of bytes transferred */
+	  continue;
+	}
+#if _FS_TINY
+	if (fp->fptr >= fp->fsize) {			/* Avoid silly buffer filling at growing edge */
+	  if (move_window(fp->fs, 0)) ABORT(fp->fs, FR_DISK_ERR);
+	  fp->fs->winsect = sect;
+	}
+#else
+	if (fp->dsect != sect) {				/* Fill sector buffer with file data */
+	  if (fp->fptr < fp->fsize){
+	    if (disk_read(fp->fs->drive, fp->buf, sect, 1) != RES_OK)
+	      ABORT(fp->fs, FR_DISK_ERR);
+	  }
+	}
+#endif
+	fp->dsect = sect;
+	fp->csect++;							/* Next sector address in the cluster */
+      }
+      wcnt = SS(fp->fs) - (fp->fptr % SS(fp->fs));	/* Put partial sector into file I/O buffer */
+      if (wcnt > btw) wcnt = btw;
+#if _FS_TINY
+      if (move_window(fp->fs, fp->dsect))			/* Move sector window */
+	ABORT(fp->fs, FR_DISK_ERR);
+      memcpy(&fp->fs->win[fp->fptr % SS(fp->fs)], wbuff, wcnt);	/* Fit partial sector */
+      fp->fs->wflag = 1;
+#else
+      memcpy(&fp->buf[fp->fptr % SS(fp->fs)], wbuff, wcnt);	/* Fit partial sector */
+      fp->flag |= FA__DIRTY;
+#endif
+    }
+
+    if (fp->fptr > fp->fsize) fp->fsize = fp->fptr;	/* Update file size if needed */
+    fp->flag |= FA__WRITTEN;						/* Set file changed flag */
+
+    LEAVE_FF(fp->fs, FR_OK);
+  }
+
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Synchronize the File Object                                           */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_sync (FIL *fp)	/* Pointer to the file object */
+  {
+    FRESULT res;
+    DWORD tim;
+    BYTE *dir;
+
+
+    res = validate(fp->fs, fp->id);		/* Check validity of the object */
+    if (res == FR_OK) {
+      if (fp->flag & FA__WRITTEN) {	/* Has the file been written? */
+#if !_FS_TINY	/* Write-back dirty buffer */
+	if (fp->flag & FA__DIRTY) {
+	  if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK)
+	    LEAVE_FF(fp->fs, FR_DISK_ERR);
+	  fp->flag &= ~FA__DIRTY;
+	}
+#endif
+
+	/* Update the directory entry */
+	res = move_window(fp->fs, fp->dir_sect);
+	if (res == FR_OK) {
+#if REALTIME
+	  dir = get_dir_ptr(fp->fs, fp->dir_ptr);
+#else
+	  dir = fp->dir_ptr;
+#endif
+	  dir[DIR_Attr] |= AM_ARC;					/* Set archive bit */
+	  ST_DWORD(dir+DIR_FileSize, fp->fsize);		/* Update file size */
+	  ST_WORD(dir+DIR_FstClusLO, fp->org_clust);	/* Update start cluster */
+	  ST_WORD(dir+DIR_FstClusHI, fp->org_clust >> 16);
+	  tim = get_fattime();				/* Updated time */
+	  ST_DWORD(dir+DIR_WrtTime, tim);
+	  fp->flag &= ~FA__WRITTEN;
+	  fp->fs->wflag = 1;
+	  res = sync(fp->fs);
+	}
+      }
+    }
+
+#if REALTIME
+    if (fp && fp->fs && fp->fs->buffer_used) if (sync_win_buffers(fp->fs) != RES_OK) return FR_DISK_ERR;
+    if (fp && fp->fs) move_window(fp->fs, 0);
+#endif
+
+    LEAVE_FF(fp->fs, res);
+  }
+
+#endif /* !_FS_READONLY */
+
+  /*-----------------------------------------------------------------------*/
+  /* Close File                                                            */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_close (FIL *fp)		/* Pointer to the file object to be closed */
+  {
+    FRESULT res;
+
+#if _FS_READONLY
+    FATFS *fs = fp->fs;
+    res = validate(fp->fs, fp->id);
+    if (res == FR_OK) fp->fs = NULL;
+    LEAVE_FF(fs, res);
+#else
+    res = f_sync(fp);
+
+#if REALTIME
+    if (fp && fp->fs && fp->fs->buffer_used) if (sync_win_buffers(fp->fs) != RES_OK) return FR_DISK_ERR;
+    if (fp && fp->fs) move_window(fp->fs, 0);
+#endif
+
+    if (res == FR_OK) fp->fs = NULL;
+    return res;
+#endif
+  }
+
+  /*-----------------------------------------------------------------------*/
+  /* Change Current Drive/Directory                                        */
+  /*-----------------------------------------------------------------------*/
+
+#if _FS_RPATH
+  FRESULT f_chdrive (BYTE drv)		/* Drive number */
+  {
+    if (drv >= _DRIVES) return FR_INVALID_DRIVE;
+  
+    Drive = drv;
+  
+    return FR_OK;
+  }
+
+  FRESULT f_chdir (
+		   const XCHAR *path	/* Pointer to the directory path */
+		   )
+  {
+    FRESULT res;
+    DIR dj;
+    NAMEBUF(sfn, lfn);
+    BYTE *dir;
+
+
+    res = chk_mounted(&path, &dj.fs, 0);
+    if (res == FR_OK) {
+      INITBUF(dj, sfn, lfn);
+      res = follow_path(&dj, path);		/* Follow the file path */
+      if (res == FR_OK) {					/* Follow completed */
+#if REALTIME
+	dir = get_dir_ptr(dj.fs, dj.dir);
+#else
+	dir = dj.dir;					/* Pointer to the entry */
+#endif
+	if (!dir) {
+	  dj.fs->cdir = 0;			/* No entry (root dir) */
+	} else {
+	  if (dir[DIR_Attr] & AM_DIR)	/* Reached to the dir */
+	    dj.fs->cdir = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
+	  else
+	    res = FR_NO_PATH;		/* Could not reach the dir (it is a file) */
+	}
+      }
+      if (res == FR_NO_FILE) res = FR_NO_PATH;
+    }
+
+    LEAVE_FF(dj.fs, res);
+  }
+
+#endif
+
+
+#if _FS_MINIMIZE <= 2
+  /*-----------------------------------------------------------------------*/
+  /* Seek File R/W Pointer                                                 */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_lseek (FIL *fp, LONG ofs)		/* File pointer from top of file */
+  {
+    FRESULT res;
+    DWORD clst, bcs, nsect, ifptr;
+
+
+    res = validate(fp->fs, fp->id);		/* Check validity of the object */
+    if (res != FR_OK) LEAVE_FF(fp->fs, res);
+    if (fp->flag & FA__ERROR)			/* Check abort flag */
+      LEAVE_FF(fp->fs, FR_INT_ERR);
+    if (ofs > fp->fsize					/* In read-only mode, clip offset with the file size */
+#if !_FS_READONLY
+	&& !(fp->flag & FA_WRITE)
+#endif
+	) 
+      ofs = fp->fsize;
+
+    ifptr = fp->fptr;
+    fp->fptr = nsect = 0; fp->csect = 255;
+    if (ofs > 0) {
+      bcs = (DWORD)fp->fs->csize * SS(fp->fs);	/* Cluster size (byte) */
+      if (ifptr > 0 &&
+	  (ofs - 1) / bcs >= (ifptr - 1) / bcs) {	/* When seek to same or following cluster, */
+	fp->fptr = (ifptr - 1) & ~(bcs - 1);	/* start from the current cluster */
+	ofs -= fp->fptr;
+	clst = fp->curr_clust;
+      } 
+      else {									/* When seek to back cluster, */
+	clst = fp->org_clust;					/* start from the first cluster */
+#if !_FS_READONLY
+	if (clst == 0) {						/* If no cluster chain, create a new chain */
+	  clst = create_chain(fp->fs, 0);
+	  if (clst == 1) ABORT(fp->fs, FR_INT_ERR);
+	  if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
+	  fp->org_clust = clst;
+	}
+#endif
+	fp->curr_clust = clst;
+      }
+      if (clst != 0) {
+	while (ofs > bcs) {						/* Cluster following loop */
+#if !_FS_READONLY
+	  if (fp->flag & FA_WRITE) {			/* Check if in write mode or not */
+	    clst = create_chain(fp->fs, clst);	/* Force streached if in write mode */
+	    if (clst == 0) {				/* When disk gets full, clip file size */
+	      ofs = bcs; break;
+	    }
+	  } else
+#endif
+	    clst = get_fat(fp->fs, clst);	/* Follow cluster chain if not in write mode */
+	  if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
+	  if (clst <= 1 || clst >= fp->fs->max_clust) ABORT(fp->fs, FR_INT_ERR);
+	  fp->curr_clust = clst;
+	  fp->fptr += bcs;
+	  ofs -= bcs;
+	}
+	fp->fptr += ofs;
+	fp->csect = (BYTE)(ofs / SS(fp->fs));	/* Sector offset in the cluster */
+	if (ofs % SS(fp->fs)) {
+	  nsect = clust2sect(fp->fs, clst);	/* Current sector */
+	  if (!nsect) ABORT(fp->fs, FR_INT_ERR);
+	  nsect += fp->csect;
+	  fp->csect++;
+	}
+      }
+    }
+    if (fp->fptr % SS(fp->fs) && nsect != fp->dsect) {
+#if !_FS_TINY
+#if !_FS_READONLY
+      if (fp->flag & FA__DIRTY) {			/* Write-back dirty buffer if needed */
+	if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK)
+	  ABORT(fp->fs, FR_DISK_ERR);
+	fp->flag &= ~FA__DIRTY;
+      }
+#endif
+      if (disk_read(fp->fs->drive, fp->buf, nsect, 1) != RES_OK)
+	ABORT(fp->fs, FR_DISK_ERR);
+#endif
+      fp->dsect = nsect;
+    }
+#if !_FS_READONLY
+    if (fp->fptr > fp->fsize) {			/* Set changed flag if the file size is extended */
+      fp->fsize = fp->fptr;
+      fp->flag |= FA__WRITTEN;
+    }
+#endif
+
+    LEAVE_FF(fp->fs, res);
+  }
+
+
+#if _FS_MINIMIZE <= 1
+  /*-----------------------------------------------------------------------*/
+  /* Create a Directroy Object                                             */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_opendir (DIR *dj,	/* Pointer to directory object to create */
+		     const XCHAR *path)	/* Pointer to the directory path */
+  {
+    FRESULT res;
+    NAMEBUF(sfn, lfn);
+    BYTE *dir;
+
+    res = chk_mounted(&path, &dj->fs, 0);
+    if (res == FR_OK) {
+      INITBUF((*dj), sfn, lfn);
+      res = follow_path(dj, path);			/* Follow the path to the directory */
+      if (res == FR_OK) {						/* Follow completed */
+#if REALTIME
+	dir = get_dir_ptr(dj->fs, dj->dir);
+#else
+	dir = dj->dir;
+#endif
+	if (dir) {							/* It is not the root dir */
+	  if (dir[DIR_Attr] & AM_DIR) {	/* The object is a directory */
+	    dj->sclust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
+	  } else {						/* The object is not a directory */
+	    res = FR_NO_PATH;
+	  }
+	}
+	if (res == FR_OK) {
+	  dj->id = dj->fs->id;
+	  res = dir_seek(dj, 0);			/* Rewind dir */
+	}
+      }
+      if (res == FR_NO_FILE) res = FR_NO_PATH;
+    }
+
+    LEAVE_FF(dj->fs, res);
+  }
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Read Directory Entry in Sequense                                      */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_readdir (DIR *dj,			/* Pointer to the open directory object */
+		     FILINFO *fno)		/* Pointer to file information to return */
+  {
+    FRESULT res;
+    NAMEBUF(sfn, lfn);
+
+
+    res = validate(dj->fs, dj->id);			/* Check validity of the object */
+    if (res == FR_OK) {
+      INITBUF((*dj), sfn, lfn);
+      if (!fno) {
+	res = dir_seek(dj, 0);
+      } else {
+	res = dir_read(dj);
+	if (res == FR_NO_FILE) {
+	  dj->sect = 0;
+	  res = FR_OK;
+	}
+	if (res == FR_OK) {				/* A valid entry is found */
+	  get_fileinfo(dj, fno);		/* Get the object information */
+	  res = dir_next(dj, FALSE);	/* Increment index for next */
+	  if (res == FR_NO_FILE) {
+	    dj->sect = 0;
+	    res = FR_OK;
+	  }
+	}
+      }
+    }
+
+    LEAVE_FF(dj->fs, res);
+  }
+
+
+
+#if _FS_MINIMIZE == 0
+  /*-----------------------------------------------------------------------*/
+  /* Get File Status                                                       */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_stat (const XCHAR *path,	/* Pointer to the file path */
+		  FILINFO *fno)		/* Pointer to file information to return */
+  {
+    FRESULT res;
+    DIR dj;
+    NAMEBUF(sfn, lfn);
+
+
+    res = chk_mounted(&path, &dj.fs, 0);
+    if (res == FR_OK) {
+      INITBUF(dj, sfn, lfn);
+      res = follow_path(&dj, path);	/* Follow the file path */
+      if (res == FR_OK) {				/* Follwo completed */
+#if REALTIME
+	if (get_dir_ptr(dj.fs, dj.dir))
+#else
+	  if (dj.dir)	/* Found an object */
+#endif
+	    get_fileinfo(&dj, fno);
+	  else		/* It is root dir */
+	    res = FR_INVALID_NAME;
+      }
+    }
+
+    LEAVE_FF(dj.fs, res);
+  }
+
+#if !_FS_READONLY
+  /*-----------------------------------------------------------------------*/
+  /* Get Number of Free Clusters                                           */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_getfree (
+		     const XCHAR *path,	/* Pointer to the logical drive number (root dir) */
+		     DWORD *nclst,		/* Pointer to the variable to return number of free clusters */
+		     FATFS **fatfs		/* Pointer to pointer to corresponding file system object to return */
+		     )
+  {
+    FRESULT res;
+    DWORD n, clst, sect, stat;
+    UINT i;
+    BYTE fat, *p;
+
+
+    /* Get drive number */
+    res = chk_mounted(&path, fatfs, 0);
+    if (res != FR_OK) LEAVE_FF(*fatfs, res);
+
+    /* If number of free cluster is valid, return it without cluster scan. */
+    if ((*fatfs)->free_clust <= (*fatfs)->max_clust - 2) {
+      *nclst = (*fatfs)->free_clust;
+      LEAVE_FF(*fatfs, FR_OK);
+    }
+
+    /* Get number of free clusters */
+    fat = (*fatfs)->fs_type;
+    n = 0;
+    if (fat == FS_FAT12) {
+      clst = 2;
+      do {
+	stat = get_fat(*fatfs, clst);
+	if (stat == 0xFFFFFFFF) LEAVE_FF(*fatfs, FR_DISK_ERR);
+	if (stat == 1) LEAVE_FF(*fatfs, FR_INT_ERR);
+	if (stat == 0) n++;
+      } while (++clst < (*fatfs)->max_clust);
+    } 
+    else {
+      clst = (*fatfs)->max_clust;
+      sect = (*fatfs)->fatbase;
+      i = 0; p = 0;
+      do {
+	if (!i) {
+	  res = move_window(*fatfs, sect++);
+	  if (res != FR_OK)
+	    LEAVE_FF(*fatfs, res);
+	  p = (*fatfs)->win;
+	  i = SS(*fatfs);
+	}
+	if (fat == FS_FAT16) {
+	  if (LD_WORD(p) == 0) n++;
+	  p += 2; i -= 2;
+	} 
+	else {
+	  if ((LD_DWORD(p) & 0x0FFFFFFF) == 0) n++;
+	  p += 4; i -= 4;
+	}
+      } while (--clst);
+    }
+    (*fatfs)->free_clust = n;
+    if (fat == FS_FAT32) (*fatfs)->fsi_flag = 1;
+    *nclst = n;
+
+    LEAVE_FF(*fatfs, FR_OK);
+  }
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Truncate File                                                         */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_truncate (
+		      FIL *fp		/* Pointer to the file object */
+		      )
+  {
+    FRESULT res;
+    DWORD ncl;
+
+
+    res = validate(fp->fs, fp->id);		/* Check validity of the object */
+    if (res != FR_OK) LEAVE_FF(fp->fs, res);
+    if (fp->flag & FA__ERROR)			/* Check abort flag */
+      LEAVE_FF(fp->fs, FR_INT_ERR);
+    if (!(fp->flag & FA_WRITE))			/* Check access mode */
+      LEAVE_FF(fp->fs, FR_DENIED);
+
+    if (fp->fsize > fp->fptr) {
+      fp->fsize = fp->fptr;	/* Set file size to current R/W point */
+      fp->flag |= FA__WRITTEN;
+      if (fp->fptr == 0) {	/* When set file size to zero, remove entire cluster chain */
+	res = remove_chain(fp->fs, fp->org_clust);
+	fp->org_clust = 0;
+      } else {				/* When truncate a part of the file, remove remaining clusters */
+	ncl = get_fat(fp->fs, fp->curr_clust);
+	res = FR_OK;
+	if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR;
+	if (ncl == 1) res = FR_INT_ERR;
+	if (res == FR_OK && ncl < fp->fs->max_clust) {
+	  res = put_fat(fp->fs, fp->curr_clust, 0x0FFFFFFF);
+	  if (res == FR_OK) res = remove_chain(fp->fs, ncl);
+	}
+      }
+    }
+    if (res != FR_OK) fp->flag |= FA__ERROR;
+
+    LEAVE_FF(fp->fs, res);
+  }
+
+  /*-----------------------------------------------------------------------*/
+  /* Delete a File or Directory                                            */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_unlink (const XCHAR *path)		/* Pointer to the file or directory path */
+  {
+    FRESULT res;
+    DIR dj, sdj;
+    NAMEBUF(sfn, lfn);
+    BYTE *dir;
+    DWORD dclst;
+
+
+    res = chk_mounted(&path, &dj.fs, 1);
+    if (res != FR_OK) LEAVE_FF(dj.fs, res);
+
+    INITBUF(dj, sfn, lfn);
+    res = follow_path(&dj, path);			/* Follow the file path */
+    if (_FS_RPATH && res == FR_OK && (dj.fn[NS] & NS_DOT))
+      res = FR_INVALID_NAME;
+    if (res != FR_OK) LEAVE_FF(dj.fs, res); /* Follow failed */
+
+#if REALTIME
+    dir = get_dir_ptr(dj.fs, dj.dir);
+#else
+    dir = dj.dir;
+#endif
+    if (!dir)								/* Is it the root directory? */
+      LEAVE_FF(dj.fs, FR_INVALID_NAME);
+    if (dir[DIR_Attr] & AM_RDO)				/* Is it a R/O object? */
+      LEAVE_FF(dj.fs, FR_DENIED);
+    dclst = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO);
+
+    if (dir[DIR_Attr] & AM_DIR) {			/* It is a sub-directory */
+      if (dclst < 2) LEAVE_FF(dj.fs, FR_INT_ERR);
+      memcpy(&sdj, &dj, sizeof(DIR));		/* Check if the sub-dir is empty or not */
+      sdj.sclust = dclst;
+      res = dir_seek(&sdj, 2);
+      if (res != FR_OK) LEAVE_FF(dj.fs, res);
+      res = dir_read(&sdj);
+      if (res == FR_OK) res = FR_DENIED;	/* Not empty sub-dir */
+      if (res != FR_NO_FILE) LEAVE_FF(dj.fs, res);
+    }
+
+    res = dir_remove(&dj);					/* Remove directory entry */
+    if (res == FR_OK) {
+      if (dclst)
+	res = remove_chain(dj.fs, dclst);	/* Remove the cluster chain */
+      if (res == FR_OK) res = sync(dj.fs);
+    }
+
+#if REALTIME
+    if (dj.fs && dj.fs->buffer_used) if (sync_win_buffers(dj.fs) != RES_OK) return FR_DISK_ERR;
+    if (dj.fs) move_window(dj.fs, 0);
+#endif
+
+    LEAVE_FF(dj.fs, res);
+  }
+
+  /*-----------------------------------------------------------------------*/
+  /* Create a Directory                                                    */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_mkdir (const XCHAR *path)	/* Pointer to the directory path */
+  {
+    FRESULT res;
+    DIR dj;
+    NAMEBUF(sfn, lfn);
+    BYTE *dir, n;
+    DWORD dsect, dclst, pclst, tim;
+
+    res = chk_mounted(&path, &dj.fs, 1);
+    if (res != FR_OK) LEAVE_FF(dj.fs, res);
+
+    INITBUF(dj, sfn, lfn);
+    res = follow_path(&dj, path);			/* Follow the file path */
+    if (res == FR_OK) res = FR_EXIST;		/* Any file or directory is already existing */
+    if (_FS_RPATH && res == FR_NO_FILE && (dj.fn[NS] & NS_DOT))
+      res = FR_INVALID_NAME;
+    if (res != FR_NO_FILE)					/* Any error occured */
+      LEAVE_FF(dj.fs, res);
+
+    dclst = create_chain(dj.fs, 0);			/* Allocate a new cluster for new directory table */
+    res = FR_OK;
+    if (dclst == 0) res = FR_DENIED;
+    if (dclst == 1) res = FR_INT_ERR;
+    if (dclst == 0xFFFFFFFF) res = FR_DISK_ERR;
+    if (res == FR_OK)
+      res = move_window(dj.fs, 0);
+    if (res != FR_OK) LEAVE_FF(dj.fs, res);
+    dsect = clust2sect(dj.fs, dclst);
+
+    dir = dj.fs->win;						/* Initialize the new directory table */
+    memset(dir, 0, SS(dj.fs));
+    memset(dir+DIR_Name, ' ', 8+3);		/* Create "." entry */
+    dir[DIR_Name] = '.';
+    dir[DIR_Attr] = AM_DIR;
+    tim = get_fattime();
+    ST_DWORD(dir+DIR_WrtTime, tim);
+    ST_WORD(dir+DIR_FstClusLO, dclst);
+    ST_WORD(dir+DIR_FstClusHI, dclst >> 16);
+    memcpy(dir+32, dir, 32); 			/* Create ".." entry */
+    dir[33] = '.';
+    pclst = dj.sclust;
+    if (dj.fs->fs_type == FS_FAT32 && pclst == dj.fs->dirbase)
+      pclst = 0;
+    ST_WORD(dir+32+DIR_FstClusLO, pclst);
+    ST_WORD(dir+32+DIR_FstClusHI, pclst >> 16);
+    for (n = 0; n < dj.fs->csize; n++) {	/* Write dot entries and clear left sectors */
+      dj.fs->winsect = dsect++;
+      dj.fs->wflag = 1;
+      res = move_window(dj.fs, 0);
+      if (res) LEAVE_FF(dj.fs, res);
+#if REALTIME
+      dir = dj.fs->win;
+#endif
+      memset(dir, 0, SS(dj.fs));
+    }
+
+    res = dir_register(&dj);
+    if (res != FR_OK) {
+      remove_chain(dj.fs, dclst);
+    } else {
+#if REALTIME
+      dir = get_dir_ptr(dj.fs, dj.dir);
+#else
+      dir = dj.dir;
+#endif
+      dir[DIR_Attr] = AM_DIR;					/* Attribute */
+      ST_DWORD(dir+DIR_WrtTime, tim);			/* Crated time */
+      ST_WORD(dir+DIR_FstClusLO, dclst);		/* Table start cluster */
+      ST_WORD(dir+DIR_FstClusHI, dclst >> 16);
+      dj.fs->wflag = 1;
+      res = sync(dj.fs);
+    }
+
+#if REALTIME
+    if (dj.fs && dj.fs->buffer_used) if (sync_win_buffers(dj.fs) != RES_OK) return FR_DISK_ERR;
+    if (dj.fs) move_window(dj.fs, 0);
+#endif
+
+    LEAVE_FF(dj.fs, res);
+  }
+
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Change File Attribute                                                 */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_chmod (const XCHAR *path,	/* Pointer to the file path */
+		   BYTE value,			/* Attribute bits */
+		   BYTE mask)			/* Attribute mask to change */
+  {
+    FRESULT res;
+    DIR dj;
+    NAMEBUF(sfn, lfn);
+    BYTE *dir;
+
+    res = chk_mounted(&path, &dj.fs, 1);
+    if (res == FR_OK) {
+      INITBUF(dj, sfn, lfn);
+      res = follow_path(&dj, path);		/* Follow the file path */
+      if (_FS_RPATH && res == FR_OK && (dj.fn[NS] & NS_DOT))
+	res = FR_INVALID_NAME;
+      if (res == FR_OK) {
+#if REALTIME
+	dir = get_dir_ptr(dj.fs, dj.dir);
+#else
+	dir = dj.dir;
+#endif
+
+	if (!dir) {						/* Is it a root directory? */
+	  res = FR_INVALID_NAME;
+	} 
+	else {						/* File or sub directory */
+	  mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC;	/* Valid attribute mask */
+	  dir[DIR_Attr] = (value & mask) | (dir[DIR_Attr] & (BYTE)~mask);	/* Apply attribute change */
+	  dj.fs->wflag = 1;
+	  res = sync(dj.fs);
+	}
+      }
+    }
+
+#if REALTIME
+    if (dj.fs && dj.fs->buffer_used) if (sync_win_buffers(dj.fs) != RES_OK) return FR_DISK_ERR;
+    if (dj.fs) move_window(dj.fs, 0);
+#endif
+
+    LEAVE_FF(dj.fs, res);
+  }
+
+  /*-----------------------------------------------------------------------*/
+  /* Change Timestamp                                                      */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_utime (const XCHAR *path,	/* Pointer to the file/directory name */
+		   const FILINFO *fno)	/* Pointer to the timestamp to be set */
+  {
+    FRESULT res;
+    DIR dj;
+    NAMEBUF(sfn, lfn);
+    BYTE *dir;
+
+
+    res = chk_mounted(&path, &dj.fs, 1);
+    if (res == FR_OK) {
+      INITBUF(dj, sfn, lfn);
+      res = follow_path(&dj, path);	/* Follow the file path */
+      if (_FS_RPATH && res == FR_OK && (dj.fn[11] & NS_DOT))
+	res = FR_INVALID_NAME;
+      if (res == FR_OK) {
+#if REALTIME
+	dir = get_dir_ptr(dj.fs, dj.dir);
+#else
+	dir = dj.dir;
+#endif
+	if (!dir) {				/* Root directory */
+	  res = FR_INVALID_NAME;
+	} else {				/* File or sub-directory */
+	  ST_WORD(dir+DIR_WrtTime, fno->ftime);
+	  ST_WORD(dir+DIR_WrtDate, fno->fdate);
+	  dj.fs->wflag = 1;
+	  res = sync(dj.fs);
+	}
+      }
+    }
+
+#if REALTIME
+    if (dj.fs && dj.fs->buffer_used) if (sync_win_buffers(dj.fs) != RES_OK) return FR_DISK_ERR;
+    if (dj.fs) move_window(dj.fs, 0);
+#endif
+
+    LEAVE_FF(dj.fs, res);
+  }
+
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Rename File/Directory                                                 */
+  /*-----------------------------------------------------------------------*/
+
+  FRESULT f_rename (const XCHAR *path_old,	/* Pointer to the old name */
+		    const XCHAR *path_new)	/* Pointer to the new name */
+  {
+    FRESULT res = 0;
+    DIR dj_old, dj_new;
+    NAMEBUF(sfn, lfn);
+    BYTE buf[21], *dir;
+    DWORD dw;
+
+
+    INITBUF(dj_old, sfn, lfn);
+    res = chk_mounted(&path_old, &dj_old.fs, 1);
+    if (res == FR_OK) {
+      dj_new.fs = dj_old.fs;
+      res = follow_path(&dj_old, path_old);	/* Check old object */
+      if (_FS_RPATH && res == FR_OK && (dj_old.fn[NS] & NS_DOT))
+	res = FR_INVALID_NAME;
+    }
+    if (res != FR_OK) LEAVE_FF(dj_old.fs, res);	/* The old object is not found */
+
+    if (!dj_old.dir) LEAVE_FF(dj_old.fs, FR_NO_FILE);	/* Is root dir? */
+    memcpy(buf, dj_old.dir+DIR_Attr, 21);		/* Save the object information */
+
+    memcpy(&dj_new, &dj_old, sizeof(DIR));
+    res = follow_path(&dj_new, path_new);		/* Check new object */
+    if (res == FR_OK) res = FR_EXIST;			/* The new object name is already existing */
+    if (res == FR_NO_FILE) { 					/* Is it a valid path and no name collision? */
+      res = dir_register(&dj_new);			/* Register the new object */
+      if (res == FR_OK) {
+#if REALTIME
+	dir = get_dir_ptr(dj_new.fs, dj_new.dir);
+#else
+	dir = dj_new.dir;					/* Copy object information into new entry */
+#endif
+	memcpy(dir+13, buf+2, 19);
+	dir[DIR_Attr] = buf[0] | AM_ARC;
+	dj_old.fs->wflag = 1;
+	if (dir[DIR_Attr] & AM_DIR) {		/* Update .. entry in the directory if needed */
+	  dw = clust2sect(dj_new.fs, (DWORD)LD_WORD(dir+DIR_FstClusHI) | LD_WORD(dir+DIR_FstClusLO));
+	  if (!dw) {
+	    res = FR_INT_ERR;
+	  } else {
+	    res = move_window(dj_new.fs, dw);
+	    dir = dj_new.fs->win+32;
+	    if (res == FR_OK && dir[1] == '.') {
+	      dw = (dj_new.fs->fs_type == FS_FAT32 && dj_new.sclust == dj_new.fs->dirbase) ? 0 : dj_new.sclust;
+	      ST_WORD(dir+DIR_FstClusLO, dw);
+	      ST_WORD(dir+DIR_FstClusHI, dw >> 16);
+	      dj_new.fs->wflag = 1;
+	    }
+	  }
+	}
+	if (res == FR_OK) {
+	  res = dir_remove(&dj_old);			/* Remove old entry */
+	  if (res == FR_OK)
+	    res = sync(dj_old.fs);
+	}
+      }
+    }
+
+#if REALTIME
+    if (dj_old.fs && dj_old.fs->buffer_used) if (sync_win_buffers(dj_old.fs) != RES_OK) return FR_DISK_ERR;
+    if (dj_old.fs) move_window(dj_old.fs, 0);
+#endif
+    LEAVE_FF(dj_old.fs, res);
+  }
+
+#endif /* !_FS_READONLY */
+#endif /* _FS_MINIMIZE == 0 */
+#endif /* _FS_MINIMIZE <= 1 */
+#endif /* _FS_MINIMIZE <= 2 */
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Forward data to the stream directly (Available on only _FS_TINY cfg)  */
+  /*-----------------------------------------------------------------------*/
+#if _USE_FORWARD && _FS_TINY
+
+  FRESULT f_forward (FIL *fp, 						/* Pointer to the file object */
+		     UINT (*func)(const BYTE*,UINT),	/* Pointer to the streaming function */
+		     UINT btr,						/* Number of bytes to forward */
+		     UINT *bf)					/* Pointer to number of bytes forwarded */
+  {
+    FRESULT res;
+    DWORD remain, clst, sect;
+    UINT rcnt;
+
+
+    *bf = 0;
+
+    res = validate(fp->fs, fp->id);					/* Check validity of the object */
+    if (res != FR_OK) LEAVE_FF(fp->fs, res);
+    if (fp->flag & FA__ERROR)						/* Check error flag */
+      LEAVE_FF(fp->fs, FR_INT_ERR);
+    if (!(fp->flag & FA_READ))						/* Check access mode */
+      LEAVE_FF(fp->fs, FR_DENIED);
+
+    remain = fp->fsize - fp->fptr;
+    if (btr > remain) btr = (UINT)remain;			/* Truncate btr by remaining bytes */
+
+    for ( ;  btr && (*func)(NULL, 0);				/* Repeat until all data transferred or stream becomes busy */
+	  fp->fptr += rcnt, *bf += rcnt, btr -= rcnt) {
+      if ((fp->fptr % SS(fp->fs)) == 0) {			/* On the sector boundary? */
+	if (fp->csect >= fp->fs->csize) {		/* On the cluster boundary? */
+	  clst = (fp->fptr == 0) ?			/* On the top of the file? */
+	    fp->org_clust : get_fat(fp->fs, fp->curr_clust);
+	  if (clst <= 1) ABORT(fp->fs, FR_INT_ERR);
+	  if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);
+	  fp->curr_clust = clst;				/* Update current cluster */
+	  fp->csect = 0;						/* Reset sector address in the cluster */
+	}
+	fp->csect++;							/* Next sector address in the cluster */
+      }
+      sect = clust2sect(fp->fs, fp->curr_clust);	/* Get current data sector */
+      if (!sect) ABORT(fp->fs, FR_INT_ERR);
+      sect += fp->csect - 1;
+      if (move_window(fp->fs, sect))				/* Move sector window */
+	ABORT(fp->fs, FR_DISK_ERR);
+      fp->dsect = sect;
+      rcnt = SS(fp->fs) - (WORD)(fp->fptr % SS(fp->fs));	/* Forward data from sector window */
+      if (rcnt > btr) rcnt = btr;
+      rcnt = (*func)(&fp->fs->win[(WORD)fp->fptr % SS(fp->fs)], rcnt);
+      if (!rcnt) ABORT(fp->fs, FR_INT_ERR);
+    }
+
+    LEAVE_FF(fp->fs, FR_OK);
+  }
+#endif /* _USE_FORWARD */
+
+
+#if _USE_MKFS && !_FS_READONLY
+  /*-----------------------------------------------------------------------*/
+  /* Create File System on the Drive                                       */
+  /*-----------------------------------------------------------------------*/
+#define N_ROOTDIR	512			/* Multiple of 32 and <= 2048 */
+#define N_FATS		1			/* 1 or 2 */
+#define MAX_SECTOR	131072000UL	/* Maximum partition size */
+#define MIN_SECTOR	2000UL		/* Minimum partition size */
+
+
+  FRESULT f_mkfs (BYTE drv,			/* Logical drive number */
+		  BYTE partition,		/* Partitioning rule 0:FDISK, 1:SFD */
+		  WORD allocsize)		/* Allocation unit size [bytes] */
+  {
+    uint32_t sstbl[] = { 2048000UL, 1024000UL, 512000UL, 256000UL, 128000UL, 64000UL, 32000, 16000, 8000, 4000,   0 };
+    uint16_t cstbl[] =  {   32768,   16384,   8192,   4096,   2048, 16384,  8192,  4096, 2048, 1024, 512 };
+    BYTE fmt, m, *tbl;
+    DWORD b_part, b_fat, b_dir, b_data;		/* Area offset (LBA) */
+    DWORD n_part, n_rsv, n_fat, n_dir;		/* Area size */
+    DWORD n_clst, d, n;
+    WORD ass;   // fatfs uses 'as' but that's a keyword
+    FATFS *fs;
+    DSTATUS stat;
+
+
+    /* Check validity of the parameters */
+    if (drv >= _DRIVES) return FR_INVALID_DRIVE;
+    if (partition >= 2) return FR_MKFS_ABORTED;
+
+    /* Check mounted drive and clear work area */
+    fs = FatFs[drv];
+    if (!fs) return FR_NOT_ENABLED;
+    fs->fs_type = 0;
+    drv = LD2PD(drv);
+
+    /* Get disk statics */
+    stat = disk_initialize(drv);
+    if (stat & STA_NOINIT) return FR_NOT_READY;
+    if (stat & STA_PROTECT) return FR_WRITE_PROTECTED;
+#if _MAX_SS != 512						/* Get disk sector size */
+    if (disk_ioctl(drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK
+	|| SS(fs) > _MAX_SS)
+      return FR_MKFS_ABORTED;
+#endif
+    if (disk_ioctl(drv, GET_SECTOR_COUNT, &n_part) != RES_OK || n_part < MIN_SECTOR)
+      return FR_MKFS_ABORTED;
+    if (n_part > MAX_SECTOR) n_part = MAX_SECTOR;
+    b_part = (!partition) ? 63 : 0;		/* Boot sector */
+    n_part -= b_part;
+    for (d = 512; d <= 32768U && d != allocsize; d <<= 1) ;	/* Check validity of the allocation unit size */
+    if (d != allocsize) allocsize = 0;
+    if (!allocsize) {					/* Auto selection of cluster size */
+      d = n_part;
+      for (ass = SS(fs); ass > 512U; ass >>= 1) d >>= 1;
+      for (n = 0; d < sstbl[n]; n++) ;
+      allocsize = cstbl[n];
+    }
+    if (allocsize < SS(fs)) allocsize = SS(fs);
+
+    allocsize /= SS(fs);		/* Number of sectors per cluster */
+
+    /* Pre-compute number of clusters and FAT type */
+    n_clst = n_part / allocsize;
+    fmt = FS_FAT12;
+    if (n_clst >= 0xFF5) fmt = FS_FAT16;
+    if (n_clst >= 0xFFF5) fmt = FS_FAT32;
+
+    /* Determine offset and size of FAT structure */
+    switch (fmt) {
+    case FS_FAT12:
+      n_fat = ((n_clst * 3 + 1) / 2 + 3 + SS(fs) - 1) / SS(fs);
+      n_rsv = 1 + partition;
+      n_dir = N_ROOTDIR * 32 / SS(fs);
+      break;
+    case FS_FAT16:
+      n_fat = ((n_clst * 2) + 4 + SS(fs) - 1) / SS(fs);
+      n_rsv = 1 + partition;
+      n_dir = N_ROOTDIR * 32 / SS(fs);
+      break;
+    default:
+      n_fat = ((n_clst * 4) + 8 + SS(fs) - 1) / SS(fs);
+      n_rsv = 33 - partition;
+      n_dir = 0;
+    }
+    b_fat = b_part + n_rsv;			/* FATs start sector */
+    b_dir = b_fat + n_fat * N_FATS;	/* Directory start sector */
+    b_data = b_dir + n_dir;			/* Data start sector */
+
+    /* Align data start sector to erase block boundary (for flash memory media) */
+    if (disk_ioctl(drv, GET_BLOCK_SIZE, &n) != RES_OK) return FR_MKFS_ABORTED;
+    n = (b_data + n - 1) & ~(n - 1);
+    n_fat += (n - b_data) / N_FATS;
+    /* b_dir and b_data are no longer used below */
+
+    /* Determine number of cluster and final check of validity of the FAT type */
+    n_clst = (n_part - n_rsv - n_fat * N_FATS - n_dir) / allocsize;
+    if (   (fmt == FS_FAT16 && n_clst < 0xFF5)
+	   || (fmt == FS_FAT32 && n_clst < 0xFFF5))
+      return FR_MKFS_ABORTED;
+
+    /* Create partition table if needed */
+    if (!partition) {
+      DWORD n_disk = b_part + n_part;
+
+      memset(fs->win, 0, SS(fs));
+      tbl = fs->win+MBR_Table;
+      ST_DWORD(tbl, 0x00010180);		/* Partition start in CHS */
+      if (n_disk < 63UL * 255 * 1024) {	/* Partition end in CHS */
+	n_disk = n_disk / 63 / 255;
+	tbl[7] = (BYTE)n_disk;
+	tbl[6] = (BYTE)((n_disk >> 2) | 63);
+      } else {
+	ST_WORD(&tbl[6], 0xFFFF);
+      }
+      tbl[5] = 254;
+      if (fmt != FS_FAT32)			/* System ID */
+	tbl[4] = (n_part < 0x10000) ? 0x04 : 0x06;
+      else
+	tbl[4] = 0x0c;
+      ST_DWORD(tbl+8, 63);			/* Partition start in LBA */
+      ST_DWORD(tbl+12, n_part);		/* Partition size in LBA */
+      ST_WORD(tbl+64, 0xAA55);		/* Signature */
+      if (disk_write(drv, fs->win, 0, 1) != RES_OK)
+	return FR_DISK_ERR;
+      partition = 0xF8;
+    } else {
+      partition = 0xF0;
+    }
+
+    /* Create boot record */
+    tbl = fs->win;								/* Clear buffer */
+    memset(tbl, 0, SS(fs));
+    ST_DWORD(tbl+BS_jmpBoot, 0x90FEEB);			/* Boot code (jmp $, nop) */
+    ST_WORD(tbl+BPB_BytsPerSec, SS(fs));		/* Sector size */
+    tbl[BPB_SecPerClus] = (BYTE)allocsize;		/* Sectors per cluster */
+    ST_WORD(tbl+BPB_RsvdSecCnt, n_rsv);			/* Reserved sectors */
+    tbl[BPB_NumFATs] = N_FATS;					/* Number of FATs */
+    ST_WORD(tbl+BPB_RootEntCnt, SS(fs) / 32 * n_dir); /* Number of rootdir entries */
+    if (n_part < 0x10000) {						/* Number of total sectors */
+      ST_WORD(tbl+BPB_TotSec16, n_part);
+    } else {
+      ST_DWORD(tbl+BPB_TotSec32, n_part);
+    }
+    tbl[BPB_Media] = partition;					/* Media descripter */
+    ST_WORD(tbl+BPB_SecPerTrk, 63);				/* Number of sectors per track */
+    ST_WORD(tbl+BPB_NumHeads, 255);				/* Number of heads */
+    ST_DWORD(tbl+BPB_HiddSec, b_part);			/* Hidden sectors */
+    n = get_fattime();							/* Use current time as a VSN */
+    if (fmt != FS_FAT32) {
+      ST_DWORD(tbl+BS_VolID, n);				/* Volume serial number */
+      ST_WORD(tbl+BPB_FATSz16, n_fat);		/* Number of secters per FAT */
+      tbl[BS_DrvNum] = 0x80;					/* Drive number */
+      tbl[BS_BootSig] = 0x29;					/* Extended boot signature */
+      memcpy(tbl+BS_VolLab, "NO NAME    FAT     ", 19);	/* Volume lavel, FAT signature */
+    } else {
+      ST_DWORD(tbl+BS_VolID32, n);			/* Volume serial number */
+      ST_DWORD(tbl+BPB_FATSz32, n_fat);		/* Number of secters per FAT */
+      ST_DWORD(tbl+BPB_RootClus, 2);			/* Root directory cluster (2) */
+      ST_WORD(tbl+BPB_FSInfo, 1);				/* FSInfo record offset (bs+1) */
+      ST_WORD(tbl+BPB_BkBootSec, 6);			/* Backup boot record offset (bs+6) */
+      tbl[BS_DrvNum32] = 0x80;				/* Drive number */
+      tbl[BS_BootSig32] = 0x29;				/* Extended boot signature */
+      memcpy(tbl+BS_VolLab32, "NO NAME    FAT32   ", 19);	/* Volume lavel, FAT signature */
+    }
+    ST_WORD(tbl+BS_55AA, 0xAA55);				/* Signature */
+    if (SS(fs) > 512U) {
+      ST_WORD(tbl+SS(fs)-2, 0xAA55);
+    }
+    if (disk_write(drv, tbl, b_part+0, 1) != RES_OK)
+      return FR_DISK_ERR;
+    if (fmt == FS_FAT32)
+      disk_write(drv, tbl, b_part+6, 1);
+
+    /* Initialize FAT area */
+    for (m = 0; m < N_FATS; m++) {
+      memset(tbl, 0, SS(fs));		/* 1st sector of the FAT  */
+      if (fmt != FS_FAT32) {
+	n = (fmt == FS_FAT12) ? 0x00FFFF00 : 0xFFFFFF00;
+	n |= partition;
+	ST_DWORD(tbl, n);				/* Reserve cluster #0-1 (FAT12/16) */
+      } else {
+	ST_DWORD(tbl+0, 0xFFFFFFF8);	/* Reserve cluster #0-1 (FAT32) */
+	ST_DWORD(tbl+4, 0xFFFFFFFF);
+	ST_DWORD(tbl+8, 0x0FFFFFFF);	/* Reserve cluster #2 for root dir */
+      }
+      if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
+	return FR_DISK_ERR;
+      memset(tbl, 0, SS(fs));		/* Following FAT entries are filled by zero */
+      for (n = 1; n < n_fat; n++) {
+	if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
+	  return FR_DISK_ERR;
+      }
+    }
+
+    /* Initialize Root directory */
+    m = (BYTE)((fmt == FS_FAT32) ? allocsize : n_dir);
+    do {
+      if (disk_write(drv, tbl, b_fat++, 1) != RES_OK)
+	return FR_DISK_ERR;
+    } while (--m);
+
+    /* Create FSInfo record if needed */
+    if (fmt == FS_FAT32) {
+      ST_WORD(tbl+BS_55AA, 0xAA55);
+      ST_DWORD(tbl+FSI_LeadSig, 0x41615252);
+      ST_DWORD(tbl+FSI_StrucSig, 0x61417272);
+      ST_DWORD(tbl+FSI_Free_Count, n_clst - 1);
+      ST_DWORD(tbl+FSI_Nxt_Free, 0xFFFFFFFF);
+      disk_write(drv, tbl, b_part+1, 1);
+      disk_write(drv, tbl, b_part+7, 1);
+    }
+
+    return (disk_ioctl(drv, CTRL_SYNC, (void*)NULL) == RES_OK) ? FR_OK : FR_DISK_ERR;
+  }
+
+#endif /* _USE_MKFS && !_FS_READONLY */
+
+
+
+
+#if _USE_STRFUNC
+  /*-----------------------------------------------------------------------*/
+  /* Get a string from the file                                            */
+  /*-----------------------------------------------------------------------*/
+  char* f_gets (char* buff,	/* Pointer to the string buffer to read */
+		int len,	/* Size of string buffer */
+		FIL* fil)	/* Pointer to the file object */
+    {
+      int i = 0;
+      char *p = buff;
+      UINT rc;
+
+
+      while (i < len - 1) {			/* Read bytes until buffer gets filled */
+	f_read(fil, p, 1, &rc);
+	if (rc != 1) break;			/* Break when no data to read */
+#if _USE_STRFUNC >= 2
+	if (*p == '\r') continue;	/* Strip '\r' */
+#endif
+	i++;
+	if (*p++ == '\n') break;	/* Break when reached end of line */
+      }
+      *p = 0;
+      return i ? buff : NULL;			/* When no data read (eof or error), return with error. */
+    }
+
+
+#if !_FS_READONLY
+#include <stdarg.h>
+  /*-----------------------------------------------------------------------*/
+  /* Put a character to the file                                           */
+  /*-----------------------------------------------------------------------*/
+  int f_putc (int chr,	/* A character to be output */
+	      FIL* fil)	/* Ponter to the file object */
+  {
+    UINT bw;
+    char c;
+
+
+#if _USE_STRFUNC >= 2
+    if (chr == '\n') f_putc ('\r', fil);	/* LF -> CRLF conversion */
+#endif
+    if (!fil) {	/* Special value may be used to switch the destination to any other device */
+      /*	put_console(chr);	*/
+      return chr;
+    }
+    c = (char)chr;
+    f_write(fil, &c, 1, &bw);	/* Write a byte to the file */
+    return bw ? chr : EOF;		/* Return the result */
+  }
+
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Put a string to the file                                              */
+  /*-----------------------------------------------------------------------*/
+  int f_puts (const char* str,	/* Pointer to the string to be output */
+	      FIL* fil)			/* Pointer to the file object */
+  {
+    int n;
+
+
+    for (n = 0; *str; str++, n++) {
+      if (f_putc(*str, fil) == EOF) return EOF;
+    }
+    return n;
+  }
+
+
+
+
+  /*-----------------------------------------------------------------------*/
+  /* Put a formatted string to the file                                    */
+  /*-----------------------------------------------------------------------*/
+  int f_printf (FIL* fil,			/* Pointer to the file object */
+		const char* str,	/* Pointer to the format string */
+		...)					/* Optional arguments... */
+  {
+    va_list arp;
+    UCHAR c, f, r;
+    ULONG val;
+    char s[16];
+    int i, w, res, cc;
+
+
+    va_start(arp, str);
+
+    for (cc = res = 0; cc != EOF; res += cc) {
+      c = *str++;
+      if (c == 0) break;			/* End of string */
+      if (c != '%') {				/* Non escape cahracter */
+	cc = f_putc(c, fil);
+	if (cc != EOF) cc = 1;
+	continue;
+      }
+      w = f = 0;
+      c = *str++;
+      if (c == '0') {				/* Flag: '0' padding */
+	f = 1; c = *str++;
+      }
+      while (c >= '0' && c <= '9') {	/* Precision */
+	w = w * 10 + (c - '0');
+	c = *str++;
+      }
+      if (c == 'l') {				/* Prefix: Size is long int */
+	f |= 2; c = *str++;
+      }
+      if (c == 's') {				/* Type is string */
+	cc = f_puts(va_arg(arp, char*), fil);
+	continue;
+      }
+      if (c == 'c') {				/* Type is character */
+	cc = f_putc(va_arg(arp, int), fil);
+	if (cc != EOF) cc = 1;
+	continue;
+      }
+      r = 0;
+      if (c == 'd') r = 10;		/* Type is signed decimal */
+      if (c == 'u') r = 10;		/* Type is unsigned decimal */
+      if (c == 'X') r = 16;		/* Type is unsigned hexdecimal */
+      if (r == 0) break;			/* Unknown type */
+      if (f & 2) {				/* Get the value */
+	val = (ULONG)va_arg(arp, long);
+      } else {
+	val = (c == 'd') ? (ULONG)(long)va_arg(arp, int) : (ULONG)va_arg(arp, unsigned int);
+      }
+      /* Put numeral string */
+      if (c == 'd') {
+	if (val & 0x80000000) {
+	  val = 0 - val;
+	  f |= 4;
+	}
+      }
+      i = sizeof(s) - 1; s[i] = 0;
+      do {
+	c = (UCHAR)(val % r + '0');
+	if (c > '9') c += 7;
+	s[--i] = c;
+	val /= r;
+      } while (i && val);
+      if (i && (f & 4)) s[--i] = '-';
+      w = sizeof(s) - 1 - w;
+      while (i && i > w) s[--i] = (f & 1) ? '0' : ' ';
+      cc = f_puts(&s[i], fil);
+    }
+
+    va_end(arp);
+    return (cc == EOF) ? cc : res;
+  }
+
+#endif /* !_FS_READONLY */
+#endif /* _USE_STRFUNC */
+  
+}
diff --git a/tos/platforms/shimmer/chips/sd/fatfs/README b/tos/platforms/shimmer/chips/sd/fatfs/README
new file mode 100644
index 00000000..242ad524
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/fatfs/README
@@ -0,0 +1,57 @@
+The FatFs implementation is a direct port of the ChaN FatFs project
+(http://elm-chan.org/fsw/ff/00index_e.html) to TinyOS.  
+
+During testing of the initial port, Victor Cionca at University of
+Limerick discovered a great deal of overhead in the filesystem's
+cluster window operations, and devised an improved method to handle
+these without compromising the integrity of the fs.  These are
+incorporated here.
+
+First note:  Your app must call mount before proceeding with any other file
+operations.  Boot.booted is a good place to do this.
+
+Application developers should note that FatFs development used the IP
+stack and NTP updates in order to provide accurate timestamps.
+tinyos-1.x/contrib/handhelds/swtest/TestFATLogging shows how to do this.
+
+Without these mechanisms, an application will need another method to
+seed the app's time value with something realistic (not
+1/1/1980-relative) at compile time, or devise a way to provide a
+runtime update from a host.
+
+One way:
+-------
+copy the simple python script timeSec.py in tinyos-2.x-contrib/shimmer/apps/JustFATLogging to your
+app directory.
+
+add these lines to your app's Makefile, which will provide a hook for
+the the compile time variable CURRENT_TIME.  TimeP uses this to set the
+runtime g_current_time that sets the baseline for reporting localtime
+on the device:
+
+ifdef CURRENT_TIME
+PFLAGS += -DCURRENT_TIME=$(CURRENT_TIME)
+endif
+
+then, at compile-time, add CURRENT_TIME=`python ./timeSec.py` to the
+build line.
+
+unfortunately, this seed will be restored if you reset the board.
+
+Another way:
+-----------
+add a mechanism to provide the current time from a host machine via
+serial line.  one example of how to do this is in
+tinyos-1.x/contrib/handhelds/apps/ThreeAxisRecorder.
+
+Yet Another way:
+---------------
+use the bluetooth radio to do similar (don't know why this would be
+easier than using the built-in access point-ip stack
+infrastructure...).
+
+
+
+
+
+
diff --git a/tos/platforms/shimmer/chips/sd/fatfs/ccsbcs.c b/tos/platforms/shimmer/chips/sd/fatfs/ccsbcs.c
new file mode 100644
index 00000000..57439b2e
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/fatfs/ccsbcs.c
@@ -0,0 +1,540 @@
+/*------------------------------------------------------------------------*/
+/* Unicode - Local code bidirectional converter  (C)ChaN, 2009            */
+/* (SBCS code pages)                                                      */
+/*------------------------------------------------------------------------*/
+/*  437   U.S. (OEM)
+/   720   Arabic (OEM)
+/   1256  Arabic (Windows)
+/   737   Greek (OEM)
+/   1253  Greek (Windows)
+/   1250  Central Europe (Windows)
+/   775   Baltic (OEM)
+/   1257  Baltic (Windows)
+/   850   Multilingual Latin 1 (OEM)
+/   852   Latin 2 (OEM)
+/   1252  Latin 1 (Windows)
+/   855   Cyrillic (OEM)
+/   1251  Cyrillic (Windows)
+/   866   Russian (OEM)
+/   857   Turkish (OEM)
+/   1254  Turkish (Windows)
+/   858   Multilingual Latin 1 + Euro (OEM)
+/   862   Hebrew (OEM)
+/   1255  Hebrew (Windows)
+/   874   Thai (OEM, Windows)
+/   1258  Vietnam (OEM, Windows)
+*/
+
+//#include "../ff.h"
+
+
+#if _CODE_PAGE == 437
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP437(0x80-0xFF) to Unicode conversion table */
+	0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
+	0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
+	0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
+	0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
+	0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
+	0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
+	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
+	0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
+	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
+	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
+	0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
+	0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
+	0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
+	0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
+	0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
+	0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
+};
+
+#elif _CODE_PAGE == 720
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP720(0x80-0xFF) to Unicode conversion table */
+	0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
+	0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
+	0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
+	0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627,
+	0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
+	0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB,
+	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
+	0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
+	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
+	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
+	0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
+	0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
+	0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642,
+	0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A,
+	0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248,
+	0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
+};
+
+#elif _CODE_PAGE == 737
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP737(0x80-0xFF) to Unicode conversion table */
+	0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
+	0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
+	0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
+	0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8,
+	0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0,
+	0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8,
+	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
+	0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
+	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
+	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
+	0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
+	0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
+	0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD,
+	0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E,
+	0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248,
+	0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
+};
+
+#elif _CODE_PAGE == 775
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP775(0x80-0xFF) to Unicode conversion table */
+	0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
+	0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
+	0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
+	0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4,
+	0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6,
+	0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB,
+	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118,
+	0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510,
+	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A,
+	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D,
+	0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B,
+	0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
+	0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144,
+	0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019,
+	0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E,
+	0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
+};
+
+#elif _CODE_PAGE == 850
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP850(0x80-0xFF) to Unicode conversion table */
+	0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
+	0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
+	0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
+	0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
+	0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
+	0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
+	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
+	0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
+	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
+	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
+	0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE,
+	0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
+	0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
+	0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
+	0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
+	0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
+};
+
+#elif _CODE_PAGE == 852
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP852(0x80-0xFF) to Unicode conversion table */
+	0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
+	0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
+	0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
+	0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D,
+	0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E,
+	0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB,
+	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A,
+	0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510,
+	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103,
+	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
+	0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE,
+	0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580,
+	0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161,
+	0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4,
+	0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8,
+	0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0
+};
+
+#elif _CODE_PAGE == 855
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP855(0x80-0xFF) to Unicode conversion table */
+	0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
+	0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
+	0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
+	0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A,
+	0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414,
+	0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB,
+	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438,
+	0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510,
+	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A,
+	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
+	0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E,
+	0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580,
+	0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443,
+	0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116,
+	0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D,
+	0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0
+};
+
+#elif _CODE_PAGE == 857
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP857(0x80-0xFF) to Unicode conversion table */
+	0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
+	0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
+	0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
+	0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F,
+	0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F,
+	0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
+	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
+	0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
+	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
+	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
+	0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE,
+	0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
+	0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000,
+	0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4,
+	0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
+	0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
+};
+
+#elif _CODE_PAGE == 858
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP858(0x80-0xFF) to Unicode conversion table */
+	0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
+	0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
+	0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
+	0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
+	0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
+	0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
+	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0,
+	0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510,
+	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3,
+	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
+	0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE,
+	0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580,
+	0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE,
+	0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
+	0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8,
+	0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
+};
+
+#elif _CODE_PAGE == 862
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP862(0x80-0xFF) to Unicode conversion table */
+	0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
+	0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
+	0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
+	0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
+	0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA,
+	0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
+	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
+	0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
+	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
+	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
+	0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
+	0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
+	0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4,
+	0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
+	0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248,
+	0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
+};
+
+#elif _CODE_PAGE == 866
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP866(0x80-0xFF) to Unicode conversion table */
+	0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
+	0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
+	0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
+	0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
+	0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
+	0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
+	0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556,
+	0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
+	0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F,
+	0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
+	0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B,
+	0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
+	0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
+	0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
+	0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E,
+	0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0
+};
+
+#elif _CODE_PAGE == 874
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP874(0x80-0xFF) to Unicode conversion table */
+	0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
+	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
+	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+	0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07,
+	0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F,
+	0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17,
+	0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F,
+	0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27,
+	0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F,
+	0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37,
+	0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F,
+	0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47,
+	0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F,
+	0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57,
+	0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000
+};
+
+#elif _CODE_PAGE == 1250
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP1250(0x80-0xFF) to Unicode conversion table */
+	0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
+	0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
+	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
+	0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A,
+	0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7,
+	0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B,
+	0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
+	0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C,
+	0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7,
+	0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E,
+	0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7,
+	0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF,
+	0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7,
+	0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F,
+	0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7,
+	0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9
+};
+
+#elif _CODE_PAGE == 1251
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP1251(0x80-0xFF) to Unicode conversion table */
+	0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
+	0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
+	0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
+	0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F,
+	0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7,
+	0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407,
+	0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7,
+	0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457,
+	0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
+	0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
+	0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
+	0x0428, 0x0429, 0x042A, 0x042D, 0x042C, 0x042D, 0x042E, 0x042F,
+	0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437,
+	0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
+	0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447,
+	0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F
+};
+
+#elif _CODE_PAGE == 1252
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP1252(0x80-0xFF) to Unicode conversion table */
+	0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
+	0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
+	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
+	0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178,
+	0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
+	0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
+	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
+	0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
+	0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
+	0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
+	0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
+	0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x00DD, 0x00DE, 0x00DF,
+	0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
+	0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
+	0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
+	0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF
+};
+
+#elif _CODE_PAGE == 1253
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP1253(0x80-0xFF) to Unicode conversion table */
+	0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
+	0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
+	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
+	0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
+	0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
+	0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015,
+	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7,
+	0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F,
+	0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397,
+	0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F,
+	0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7,
+	0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF,
+	0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7,
+	0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF,
+	0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7,
+	0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000
+};
+
+#elif _CODE_PAGE == 1254
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP1254(0x80-0xFF) to Unicode conversion table */
+	0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
+	0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
+	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
+	0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
+	0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
+	0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
+	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
+	0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
+	0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
+	0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF,
+	0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7,
+	0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF,
+	0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
+	0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF,
+	0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7,
+	0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF
+};
+
+#elif _CODE_PAGE == 1255
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP1255(0x80-0xFF) to Unicode conversion table */
+	0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
+	0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
+	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
+	0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000,
+	0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
+	0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
+	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
+	0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
+	0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7,
+	0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF,
+	0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3,
+	0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+	0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
+	0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
+	0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
+	0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000
+};
+
+#elif _CODE_PAGE == 1256
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP1256(0x80-0xFF) to Unicode conversion table */
+	0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
+	0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
+	0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
+	0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA,
+	0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
+	0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
+	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
+	0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F,
+	0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627,
+	0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F,
+	0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7,
+	0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643,
+	0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7,
+	0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF,
+	0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7,
+	0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2
+}
+
+#elif _CODE_PAGE == 1257
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP1257(0x80-0xFF) to Unicode conversion table */
+	0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
+	0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
+	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
+	0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000,
+	0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7,
+	0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
+	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
+	0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6,
+	0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112,
+	0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B,
+	0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7,
+	0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF,
+	0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113,
+	0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C,
+	0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7,
+	0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9
+};
+
+#elif _CODE_PAGE == 1258
+#define _TBLDEF 1
+static
+const WCHAR Tbl[] = {	/*  CP1258(0x80-0xFF) to Unicode conversion table */
+	0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
+	0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
+	0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
+	0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178,
+	0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7,
+	0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF,
+	0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7,
+	0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF,
+	0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7,
+	0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF,
+	0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7,
+	0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF,
+	0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7,
+	0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF,
+	0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7,
+	0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF
+};
+
+#endif
+
+
+#if !_TBLDEF || !_USE_LFN
+#error This file is not needed in current configuration
+#endif
+
+
+WCHAR ff_convert (	/* Converted character, Returns zero on error */
+	WCHAR	src,	/* Character code to be converted */
+	UINT	dir		/* 0: Unicode to OEMCP, 1: OEMCP to Unicode */
+)
+{
+	WCHAR c;
+
+
+	if (src < 0x80) {	/* ASCII */
+		c = src;
+
+	} else {
+		if (dir) {		/* OEMCP to Unicode */
+			c = (src >= 0x100) ? 0 : Tbl[src - 0x80];
+
+		} else {		/* Unicode to OEMCP */
+			for (c = 0; c < 0x80; c++) {
+				if (src == Tbl[c]) break;
+			}
+			c = (c + 0x80) & 0xFF;
+		}
+	}
+
+	return c;
+}
+
+
+WCHAR ff_wtoupper (	/* Upper converted character */
+	WCHAR chr		/* Input character */
+)
+{
+	static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 };
+	static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 };
+	int i;
+
+
+	for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ;
+
+	return tbl_lower[i] ? tbl_upper[i] : chr;
+}
diff --git a/tos/platforms/shimmer/chips/sd/fatfs/diskIOC.nc b/tos/platforms/shimmer/chips/sd/fatfs/diskIOC.nc
new file mode 100644
index 00000000..9b20a4ae
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/fatfs/diskIOC.nc
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   April, 2009
+ * port to tos-2.x
+ * @date January, 2010
+ *
+ * wire the FatFs interface to the current implementation
+ * wire the diskIO abstraction in the FatFs module to physical medium
+ */
+
+configuration diskIOC {
+  provides {
+    interface FatFs;
+    interface StdControl as diskIOStdControl;
+    interface SD as diskIO;
+  }
+}
+implementation {
+  components 
+    FatFsP, 
+    SDP, 
+    new Msp430Usart0C(), 
+    new TimerMilliC(), 
+    HplMsp430InterruptP, 
+    LedsC, 
+    TimeP;  
+  //, NTPClientM;
+
+  FatFs = FatFsP;
+  diskIOStdControl = SDP;
+  //  diskIOStdControl = TimeP;
+  diskIO = SDP;
+
+  FatFsP.Leds        -> LedsC;
+
+  components TimeC;
+  FatFsP.Time        -> TimeC;
+  //  FatFsP.Time        -> TimeP;
+
+  SDP.Usart          -> Msp430Usart0C;
+  SDP.DockInterrupt  -> HplMsp430InterruptP.Port23;
+  SDP.Leds           -> LedsC;
+
+
+  /*
+  components Counter32khz64C as Counter;
+  components new CounterToLocalTime64C(T32khz);
+  CounterToLocalTime64C.Counter -> Counter;
+  TimeP.LocalTime64 -> CounterToLocalTime64C;
+   
+  TimeP.Timer                -> TimerMilliC;
+  */
+}
diff --git a/tos/platforms/shimmer/chips/sd/fatfs/diskio.c b/tos/platforms/shimmer/chips/sd/fatfs/diskio.c
new file mode 100644
index 00000000..07c80e8d
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/fatfs/diskio.c
@@ -0,0 +1,192 @@
+/*----------------------------------------------------------------------------/
+  / FatFs module is an open source project to implement FAT file system to small
+  / embedded systems. It is opened for education, research and development under
+  / license policy of following trems.
+  /
+  /  Copyright (C) 2009, ChaN, all right reserved.
+  /
+  / * The FatFs module is a free software and there is no warranty.
+  / * You can use, modify and/or redistribute it for personal, non-profit or
+  /   commercial use without any restriction under your responsibility.
+  / * Redistributions of source code must retain the above copyright notice.
+  /
+  /----------------------------------------------------------------------------*/
+/*
+ * Most of this code:
+ *
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * tinyos instantiation of ChaN's diskio stubs (thank you!):
+ * function declarations are kept from ChaN's code to make updating easier;
+ * contents of these point to abstract calls -- as "diskio" -- 
+ * to real physical io; for now, the control will point to SD.
+ *
+ * @author Steve Ayer
+ * @date   April, 2009
+ * ported from tos-1.x 
+ * @date   January, 2010
+ */
+
+#include "diskio.h"
+
+static BOOL disk_available, disk_initialized;
+
+DSTATUS disk_initialize (BYTE drv)	// we only have one
+{
+  if(!disk_initialized){
+    atomic disk_available = TRUE;
+
+    call diskIOStdControl.start();
+    
+    atomic disk_initialized = TRUE;
+  }
+  return 0;
+}
+
+void disable_disk()
+{
+  atomic disk_available = FALSE;
+  
+  disk_initialized = FALSE;
+  
+  call diskIOStdControl.stop();
+}
+
+void dock_disk()
+{
+  atomic disk_available = FALSE;
+  
+  call diskIOStdControl.start();
+}
+
+DSTATUS disk_status (BYTE drv)        // just one
+{
+  atomic {
+    if(!disk_available)
+      return STA_NOINIT;
+  }
+  
+  return FR_OK;
+
+}
+
+DRESULT disk_read (BYTE drv,		
+		   BYTE * buff,		/* Data buffer to store read data */
+		   DWORD sector,	/* Sector address (LBA) */
+		   BYTE count)		/* Number of sectors to read (1..255) */
+{
+  int result = FR_OK;
+  register int i;
+
+  if(disk_available){
+    for(i = 0; i < count; i++)
+      if((result = call diskIO.readBlock(sector++, (uint8_t *)(buff + i * 512))))   // success is (still) 0
+	break;
+  }
+  else
+    result = FR_NOT_READY;
+
+  return result;
+}
+
+#if _READONLY == 0
+DRESULT disk_write (BYTE drv,		
+		    const BYTE *buff,	/* Data to be written */
+		    DWORD sector,		/* Sector address (LBA) */
+		    BYTE count)			/* Number of sectors to write (1..255) */
+{
+  int result = FR_OK;
+  register int i;
+
+  if(disk_available){
+    for(i = 0; i < count; i++)
+      if((result = call diskIO.writeBlock(sector++, (uint8_t *)(buff + i * 512))))   // success is (still) 0
+	break;
+  }
+  else
+    return FR_NOT_READY;
+
+  return result;
+}
+#endif /* _READONLY */
+
+DRESULT disk_ioctl (BYTE drv,
+		    BYTE ctrl,		/* Control code */
+		    void * answer)		/* Buffer to send/receive control data */
+{
+  int result;
+  uint32_t capacity;   // bytes
+  /* 
+   * calls we have to deal with (ctrl param) as of ff v0.07a:
+   *
+   * CTRL_SYNC make sure no accesses are pending
+   * GET_SECTOR_SIZE we're only supporting sd so far
+   * GET_BLOCK_SIZE  right, as above
+   * GET_SECTOR_COUNT sd driver has a read-success hack for this, should work
+   */
+  switch(ctrl){
+  case CTRL_SYNC:   // make sure we have availability
+    atomic{
+      if(disk_available)
+	result = FR_OK;
+      else
+	result = FR_NOT_READY;
+    }
+    break;
+  case GET_SECTOR_SIZE:
+  case GET_BLOCK_SIZE:
+    *(WORD *)answer = 512;
+    result = RES_OK;
+    break;
+  case GET_SECTOR_COUNT:
+    capacity = call diskIO.readCardSize();
+    *(DWORD *)answer = capacity / 512;
+    result = FR_OK;
+    break;
+  default:
+    *(WORD *)answer = 0;
+    result = FR_INVALID_NAME;
+    break;
+  }
+  return result;
+}
+
+async event void diskIO.available(){
+  signal FatFs.mediaAvailable();
+  
+  atomic disk_available = TRUE;
+}
+
+async event void diskIO.unavailable(){
+  signal FatFs.mediaUnavailable();
+  
+  atomic disk_available = FALSE;
+}
+
diff --git a/tos/platforms/shimmer/chips/sd/fatfs/diskio.h b/tos/platforms/shimmer/chips/sd/fatfs/diskio.h
new file mode 100644
index 00000000..3e7f841b
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/fatfs/diskio.h
@@ -0,0 +1,115 @@
+/*-----------------------------------------------------------------------------/
+/ FatFs module is an open source software to implement FAT file system to
+/ small embedded systems. This is a free software and is opened for education,
+/ research and commecial developments under license policy of following trems.
+/
+/  Copyright (C) 2009, ChaN, all right reserved.
+/
+/ * The FatFs module is a free software and there is NO WARRANTY.
+/ * No restriction on use. You can use, modify and redistribute it for
+/   personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY.
+/ * Redistributions of source code must retain the above copyright notice.
+/
+/-----------------------------------------------------------------------------*/
+/*
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   April, 2009
+ * ported to tos-2.x
+ * @date January, 2010
+ */
+
+
+#ifndef _DISKIO
+
+#define _READONLY	0	/* 1: Read-only mode */
+#define _USE_IOCTL	1
+
+#include <integer.h>
+
+/* Status of Disk Functions */
+typedef BYTE	DSTATUS;
+
+/* Results of Disk Functions */
+typedef enum {
+  RES_OK = 0,		/* 0: Successful */
+  RES_ERROR,		/* 1: R/W Error */
+  RES_WRPRT,		/* 2: Write Protected */
+  RES_NOTRDY,		/* 3: Not Ready */
+  RES_PARERR		/* 4: Invalid Parameter */
+} DRESULT;
+
+
+/*---------------------------------------*/
+/* Prototypes for disk control functions */
+
+BOOL assign_drives (int argc, char *argv[]);
+DSTATUS disk_initialize (BYTE);
+void disable_disk(void);
+DSTATUS disk_status (BYTE);
+DRESULT disk_read (BYTE, BYTE*, DWORD, BYTE);
+#if	_READONLY == 0
+DRESULT disk_write (BYTE, const BYTE*, DWORD, BYTE);
+#endif
+DRESULT disk_ioctl (BYTE, BYTE, void*);
+
+
+/* Disk Status Bits (DSTATUS) */
+
+#define STA_NOINIT		0x01	/* Drive not initialized */
+#define STA_NODISK		0x02	/* No medium in the drive */
+#define STA_PROTECT		0x04	/* Write protected */
+
+
+/* Command code for disk_ioctrl() */
+
+/* Generic command */
+#define CTRL_SYNC			0	/* Mandatory for write functions */
+#define GET_SECTOR_COUNT	1	/* Mandatory for only f_mkfs() */
+#define GET_SECTOR_SIZE		2
+#define GET_BLOCK_SIZE		3	/* Mandatory for only f_mkfs() */
+#define CTRL_POWER			4
+#define CTRL_LOCK			5
+#define CTRL_EJECT			6
+/* MMC/SDC command */
+#define MMC_GET_TYPE		10
+#define MMC_GET_CSD			11
+#define MMC_GET_CID			12
+#define MMC_GET_OCR			13
+#define MMC_GET_SDSTAT		14
+/* ATA/CF command */
+#define ATA_GET_REV			20
+#define ATA_GET_MODEL		21
+#define ATA_GET_SN			22
+
+
+#define _DISKIO
+#endif
diff --git a/tos/platforms/shimmer/chips/sd/fatfs/integer.h b/tos/platforms/shimmer/chips/sd/fatfs/integer.h
new file mode 100644
index 00000000..556046ca
--- /dev/null
+++ b/tos/platforms/shimmer/chips/sd/fatfs/integer.h
@@ -0,0 +1,83 @@
+/*-----------------------------------------------------------------------------/
+/ FatFs module is an open source software to implement FAT file system to
+/ small embedded systems. This is a free software and is opened for education,
+/ research and commecial developments under license policy of following trems.
+/
+/  Copyright (C) 2009, ChaN, all right reserved.
+/
+/ * The FatFs module is a free software and there is NO WARRANTY.
+/ * No restriction on use. You can use, modify and redistribute it for
+/   personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY.
+/ * Redistributions of source code must retain the above copyright notice.
+/
+/-----------------------------------------------------------------------------*/
+/*
+ * Portions of this code:
+ *
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * tinyos port from ChaN's FatFs (thank you!):
+ *
+ * @author Steve Ayer
+ * @date   April, 2009
+ * ported to tos-2.x (easy)
+ * @date January, 2010
+ */
+
+#ifndef _INTEGER
+
+// original typedefs converted to nesc stdint.h types for tos consistency
+/* These types must be 16-bit, 32-bit or larger integer */
+typedef int16_t		INT;
+typedef uint16_t        UINT;
+
+/* These types must be 8-bit integer */
+// had to change signed char typedef CHAR to SCHAR to avoid conflict with msp430 usart.h (#define CHAR  0x10)
+typedef int8_t	SCHAR;
+typedef uint8_t	UCHAR;
+typedef uint8_t	BYTE;
+
+/* These types must be 16-bit integer */
+typedef int16_t		SHORT;
+typedef uint16_t	USHORT;
+typedef uint16_t	WORD;
+typedef uint16_t	WCHAR;
+
+/* These types must be 32-bit integer */
+typedef int32_t		LONG;
+typedef uint32_t	ULONG;
+typedef uint32_t	DWORD;
+
+/* Boolean type */
+//typedef enum { FALSE = 0, TRUE } BOOL;
+typedef char BOOL;
+
+#define _INTEGER
+#endif
diff --git a/tos/platforms/shimmer/hardware.h b/tos/platforms/shimmer/hardware.h
new file mode 100644
index 00000000..3bfab18b
--- /dev/null
+++ b/tos/platforms/shimmer/hardware.h
@@ -0,0 +1,161 @@
+/*
+ * Copyright (c) 2006, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steven Ayer
+ * @date June 2006
+ */
+
+
+#ifndef _H_hardware_h
+#define _H_hardware_h
+
+#include "msp430hardware.h"
+
+// enum so components can override power saving,
+// as per TEP 112.
+enum {
+  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
+};
+
+// LEDs
+TOSH_ASSIGN_PIN(RED_LED,    4, 0);
+TOSH_ASSIGN_PIN(ORANGE_LED, 4, 1);
+TOSH_ASSIGN_PIN(YELLOW_LED, 4, 2);
+TOSH_ASSIGN_PIN(GREEN_LED,  4, 3);
+
+// CC2420 RADIO #defines
+TOSH_ASSIGN_PIN(RADIO_FIFO,      1, 0);
+TOSH_ASSIGN_PIN(RADIO_TIMED_SFD, 1, 2);
+TOSH_ASSIGN_PIN(RADIO_FIFOP,     2, 6);
+TOSH_ASSIGN_PIN(RADIO_CCA,       2, 7);
+
+TOSH_ASSIGN_PIN(RADIO_1V8_EN,    4, 7);
+TOSH_ASSIGN_PIN(RADIO_VREF,      5, 6);    // unused in shimmer
+TOSH_ASSIGN_PIN(SW_BT_PWR_N,     5, 6);    //   "    "    "
+TOSH_ASSIGN_PIN(SW_SD_PWR_N,     5, 6);    //   "    "    "
+TOSH_ASSIGN_PIN(DOCK_N,          2, 5);    // not used, but has to be a pull-up for sd card to work
+
+TOSH_ASSIGN_PIN(RADIO_SFD,       5, 0);
+TOSH_ASSIGN_PIN(RADIO_SIMO1,     5, 1);
+TOSH_ASSIGN_PIN(RADIO_SOMI1,     5, 2);
+TOSH_ASSIGN_PIN(RADIO_CSN,       5, 4);
+TOSH_ASSIGN_PIN(CSN,             5, 4);
+TOSH_ASSIGN_PIN(RADIO_RESET,     5, 7);
+
+// redefinitions for the sd card driver
+TOSH_ASSIGN_PIN(SD_CLK, 3, 3);
+TOSH_ASSIGN_PIN(SD_DO, 3, 2);
+TOSH_ASSIGN_PIN(SD_DI, 3, 1);
+
+// this happens in hplcc2420pinsc
+TOSH_ASSIGN_PIN(CC_FIFOP, 2, 6);
+TOSH_ASSIGN_PIN(CC_FIFO, 1, 0);
+TOSH_ASSIGN_PIN(CC_SFD, 1, 2);
+TOSH_ASSIGN_PIN(CC_VREN, 5, 6);
+TOSH_ASSIGN_PIN(CC_RSTN, 5, 7);
+
+// BT pins
+TOSH_ASSIGN_PIN(BT_PIO,          1, 5);
+TOSH_ASSIGN_PIN(BT_RTS,          1, 6);
+TOSH_ASSIGN_PIN(BT_CTS,          1, 7);
+TOSH_ASSIGN_PIN(BT_TXD,          3, 6);
+TOSH_ASSIGN_PIN(BT_RXD,          3, 7);
+TOSH_ASSIGN_PIN(BT_RESET,        5, 5);
+
+//BSL Pins
+TOSH_ASSIGN_PIN(PROG_OUT,  1, 1);
+TOSH_ASSIGN_PIN(PROG_IN,   2, 2);
+
+// SD uart chip-select
+TOSH_ASSIGN_PIN(SD_CS_N, 3, 0);
+
+// ADC
+TOSH_ASSIGN_PIN(ADC0, 6, 5);
+TOSH_ASSIGN_PIN(ADC1, 6, 4);
+TOSH_ASSIGN_PIN(ADC2, 6, 3);
+
+// ADC lines on the testpoints
+TOSH_ASSIGN_PIN(ADC_0, 6, 0);
+TOSH_ASSIGN_PIN(ADC_1, 6, 1);
+TOSH_ASSIGN_PIN(ADC_2, 6, 2);
+TOSH_ASSIGN_PIN(ADC_3, 6, 3);
+TOSH_ASSIGN_PIN(ADC_4, 6, 4);
+TOSH_ASSIGN_PIN(ADC_5, 6, 5);
+TOSH_ASSIGN_PIN(ADC_6, 6, 6);
+TOSH_ASSIGN_PIN(ADC_7, 6, 7);
+
+TOSH_ASSIGN_PIN(ADC_ACCELZ, 6, 3);
+TOSH_ASSIGN_PIN(ADC_ACCELY,  6, 4);
+TOSH_ASSIGN_PIN(ADC_ACCELX, 6, 5);
+
+TOSH_ASSIGN_PIN(DAC0_AN, 6, 6);
+TOSH_ASSIGN_PIN(DAC1_AN, 6, 7);
+
+
+// UART pins
+// SPI1 attached to bt, cc2420
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+
+// used as GPIOs
+TOSH_ASSIGN_PIN(UCLK0, 3, 3);
+TOSH_ASSIGN_PIN(SOMI0, 3, 2);
+TOSH_ASSIGN_PIN(SIMO0, 3, 1);
+
+// connected to UART (0 and 1)
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);
+TOSH_ASSIGN_PIN(URXD1, 3, 7);
+
+// GIO pins
+TOSH_ASSIGN_PIN(SER0_RTS, 1, 3);
+TOSH_ASSIGN_PIN(SER0_CTS, 1, 4);
+
+TOSH_ASSIGN_PIN(ROSC, 2, 5);
+
+TOSH_ASSIGN_PIN(GIO0, 2, 0);
+TOSH_ASSIGN_PIN(GIO1, 2, 1);
+
+
+// 1-Wire
+TOSH_ASSIGN_PIN(ONEWIRE_PWR,  2, 3);
+TOSH_ASSIGN_PIN(ONEWIRE, 2, 4);
+
+// ACCEL
+TOSH_ASSIGN_PIN(ACCEL_SEL0,  4, 4);
+TOSH_ASSIGN_PIN(ACCEL_SEL1,  4, 5);
+TOSH_ASSIGN_PIN(ACCEL_SLEEP_N, 4, 6);
+
+
+
+#endif // _H_hardware_h
+
diff --git a/tos/platforms/shimmer/platform.h b/tos/platforms/shimmer/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/shimmer/platform_message.h b/tos/platforms/shimmer/platform_message.h
new file mode 100644
index 00000000..2726f339
--- /dev/null
+++ b/tos/platforms/shimmer/platform_message.h
@@ -0,0 +1,70 @@
+/* $Id: platform_message.h,v 1.2 2010-06-29 22:07:54 scipio Exp $
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific CC1000 packet structures.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:54 $
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include <CC2420.h>
+#include <Serial.h>
+
+typedef union message_header {
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union TOSRadioFooter {
+  cc2420_footer_t cc2420;
+} message_footer_t;
+
+typedef union TOSRadioMetadata {
+  cc2420_metadata_t cc2420;
+  serial_metadata_t serial;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/shimmer/shimmerAnalogSetup.nc b/tos/platforms/shimmer/shimmerAnalogSetup.nc
new file mode 100644
index 00000000..31022ffc
--- /dev/null
+++ b/tos/platforms/shimmer/shimmerAnalogSetup.nc
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date March, 2010
+ *
+ * this interface is really just for cleaning up apps.
+ * wire the app's softwareinit.init to the component's 
+ * then call *in sequence* the add<Device>Inputs you want to sample: 
+ * that will be the order of the samples.
+ *
+ * REMEMBER:  only eight channels, only one internal daughter card at a time, but 
+ * notice that the anex is provided.
+ */
+
+interface shimmerAnalogSetup {
+
+  // three channels
+  command void addAccelInputs();   
+
+  // three channels
+  command void addGyroInputs();
+
+  // two channels
+  command void addECGInputs();
+
+  // three channels
+  command void addUVInputs();
+
+  // one channels
+  command void addGSRInput();
+  
+  // one channels
+  command void addEMGInput();
+  
+  // either of two channels
+  command void addAnExInput(uint8_t channel);
+
+  // sets number of channels back to zero
+  command void reset();
+
+  /*
+   * call this after adding devices.
+   * pass in a buffer to hold the sampling results
+   * switching buffers can be done in the transferDone event
+   */
+  command void finishADCSetup(uint16_t * buffer);
+  
+  command void triggerConversion();
+  
+  command void stopConversion();
+
+  command uint8_t getNumberOfChannels();
+}
+
diff --git a/tos/platforms/shimmer/shimmerAnalogSetupC.nc b/tos/platforms/shimmer/shimmerAnalogSetupC.nc
new file mode 100644
index 00000000..d2194e14
--- /dev/null
+++ b/tos/platforms/shimmer/shimmerAnalogSetupC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date March, 2010
+ */
+
+configuration shimmerAnalogSetupC {
+  provides {
+    interface Init;
+    interface shimmerAnalogSetup;
+  }
+}
+
+implementation {
+  components shimmerAnalogSetupP;
+  shimmerAnalogSetup = shimmerAnalogSetupP;
+  Init = shimmerAnalogSetupP;
+  
+  components HplAdc12P;
+  shimmerAnalogSetupP.HplAdc12 -> HplAdc12P;
+  
+  components Msp430DmaC;
+  shimmerAnalogSetupP.Msp430DmaControl -> Msp430DmaC;
+  shimmerAnalogSetupP.Msp430DmaChannel -> Msp430DmaC.Channel0;
+  
+  components LedsC;
+  shimmerAnalogSetupP.Leds -> LedsC;
+}
+  
+  
diff --git a/tos/platforms/shimmer/shimmerAnalogSetupP.nc b/tos/platforms/shimmer/shimmerAnalogSetupP.nc
new file mode 100644
index 00000000..07687852
--- /dev/null
+++ b/tos/platforms/shimmer/shimmerAnalogSetupP.nc
@@ -0,0 +1,289 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date March, 2010
+
+ * this is going to get duplicated in a million apps, so we gather simple setup 
+ * routines with reasonable defaults here.  specific 
+ */
+
+
+module shimmerAnalogSetupP {
+  provides{
+    interface shimmerAnalogSetup;
+    interface Init;
+  }
+  uses {
+    interface Msp430DmaControl;
+    interface Msp430DmaChannel;
+    interface HplAdc12;
+    interface Leds;
+  }
+}
+
+implementation { 
+  void initADC12CTL0();
+  void initADC12CTL1();
+  void initADC12MEMCTLx();
+  void setupDMA(uint16_t * destAddr);
+  void addNewChannels(uint8_t * chans, uint8_t howmany_new);
+
+  uint8_t NUM_ADC_CHANS = 0;
+  uint8_t ADC_CHANS[8];  // msp430 only has eight!
+
+  command void shimmerAnalogSetup.addAccelInputs() {
+    uint8_t new_chans[] = { 5, 4, 3 };
+    addNewChannels(new_chans, 3);
+    
+    initADC12MEMCTLx();
+
+    TOSH_MAKE_ADC_5_INPUT();         
+    TOSH_SEL_ADC_5_MODFUNC();
+
+    TOSH_MAKE_ADC_4_INPUT();         
+    TOSH_SEL_ADC_4_MODFUNC();
+
+    TOSH_MAKE_ADC_3_INPUT();         
+    TOSH_SEL_ADC_3_MODFUNC();
+  }
+
+  command void shimmerAnalogSetup.addGyroInputs() {
+    uint8_t new_chans[] = { 1, 6, 2 };    // x, y, z
+    addNewChannels(new_chans, 3);
+    
+    initADC12MEMCTLx();
+
+    TOSH_MAKE_ADC_1_INPUT();         
+    TOSH_SEL_ADC_1_MODFUNC();
+
+    TOSH_MAKE_ADC_6_INPUT();         
+    TOSH_SEL_ADC_6_MODFUNC();
+
+    TOSH_MAKE_ADC_2_INPUT();         
+    TOSH_SEL_ADC_2_MODFUNC();
+  }
+
+  command void shimmerAnalogSetup.addECGInputs() {
+    uint8_t new_chans[] = { 1, 2 };  // ecg_lall, ecg_rall
+    addNewChannels(new_chans, 2);
+    
+    initADC12MEMCTLx();
+
+    TOSH_MAKE_ADC_1_INPUT();         
+    TOSH_SEL_ADC_1_MODFUNC();
+
+    TOSH_MAKE_ADC_2_INPUT();         
+    TOSH_SEL_ADC_2_MODFUNC();
+  }
+
+  command void shimmerAnalogSetup.addUVInputs() {
+    uint8_t new_chans[] = { 1, 2, 6 };    // ambient, uvb, uva
+    addNewChannels(new_chans, 3);
+    
+    initADC12MEMCTLx();
+
+    TOSH_MAKE_ADC_1_INPUT();         
+    TOSH_SEL_ADC_1_MODFUNC();
+
+    TOSH_MAKE_ADC_2_INPUT();         
+    TOSH_SEL_ADC_2_MODFUNC();
+
+    TOSH_MAKE_ADC_6_INPUT();         
+    TOSH_SEL_ADC_6_MODFUNC();
+  }
+
+  command void shimmerAnalogSetup.addGSRInput() { 
+    uint8_t new_chans[] = { 1 };
+    addNewChannels(new_chans, 1);
+    
+    initADC12MEMCTLx();
+
+    TOSH_MAKE_ADC_1_INPUT();         
+    TOSH_SEL_ADC_1_MODFUNC();
+  }
+
+  command void shimmerAnalogSetup.addEMGInput() { 
+    uint8_t new_chans[] = { 1 };  // ecg_lall, ecg_rall
+    addNewChannels(new_chans, 1);
+    
+    initADC12MEMCTLx();
+
+    TOSH_MAKE_ADC_1_INPUT();         
+    TOSH_SEL_ADC_1_MODFUNC();
+
+    // this channel is identical to adc1, so we we don't read it, but make it an input to avoid pushing against the signal
+    TOSH_MAKE_ADC_2_INPUT();         
+  }
+
+  command void shimmerAnalogSetup.addAnExInput(uint8_t channel) { 
+    uint8_t new_chans[1];
+
+    if(channel == 0){
+      new_chans[0] = 0;
+      addNewChannels(new_chans, 1);
+
+      initADC12MEMCTLx();
+
+      TOSH_MAKE_ADC_0_INPUT();         
+      TOSH_SEL_ADC_0_MODFUNC();
+    }
+    else if(channel == 7) {
+      new_chans[0] = 7;
+      addNewChannels(new_chans, 1);
+
+      initADC12MEMCTLx();
+
+      TOSH_MAKE_ADC_7_INPUT();         
+      TOSH_SEL_ADC_7_MODFUNC();
+    }
+  }
+
+  command void shimmerAnalogSetup.finishADCSetup(uint16_t * buffer){
+    setupDMA(buffer);
+  }
+  
+  command void shimmerAnalogSetup.triggerConversion() {
+    call Msp430DmaChannel.startTransfer();
+    call HplAdc12.startConversion();
+  }
+
+  command void shimmerAnalogSetup.stopConversion() {
+    call HplAdc12.stopConversion();
+    call HplAdc12.setIEFlags(0);
+    call HplAdc12.resetIFGs();
+  }                                            
+    
+  command uint8_t shimmerAnalogSetup.getNumberOfChannels() {
+    return NUM_ADC_CHANS;
+  }
+
+  command void shimmerAnalogSetup.reset() {
+    NUM_ADC_CHANS = 0;
+  }
+
+  command error_t Init.init() {
+    initADC12CTL0();
+    initADC12CTL1();
+    //    initADC12MEMCTLx();
+
+    TOSH_uwait(50000);
+    return SUCCESS;
+  }
+
+  void addNewChannels(uint8_t * chans, uint8_t howmany_new) {
+    register uint8_t i, j;
+    
+    for(j = 0, i = NUM_ADC_CHANS; (j < howmany_new) && (i < 8) ; i++, j++)
+      ADC_CHANS[i] = chans[j];
+
+    NUM_ADC_CHANS += howmany_new;
+  }
+
+  void initADC12CTL0()
+  {
+    adc12ctl0_t ctl0 = {
+      adc12sc: 0,                      // start conversion: 0 = no sample-and-conversion-start
+      enc: 0,                          // enable conversion: 0 = ADC12 disabled
+      adc12tovie: 0,                   // conversion-time-overflow-interrupt: 0 = interrupt dissabled
+      adc12ovie: 0,                    // ADC12MEMx overflow-interrupt: 0 = dissabled
+      adc12on: 1,                      // ADC12 on: 1 = on
+      refon: 0,                        // reference generator: 0 = off
+      r2_5v: 1,                        // reference generator voltage: 1 = 2.5V
+      msc: 1,                          // multiple sample and conversion: 1 = conversions performed ASAP
+      sht0: SAMPLE_HOLD_4_CYCLES,      // sample-and-hold-time for  ADC12MEM0 to ADC12MEM7  
+      sht1: SAMPLE_HOLD_4_CYCLES       // sample-and-hold-time for  ADC12MEM8 to ADC12MEM15  
+    };
+
+    call HplAdc12.setCtl0(ctl0);
+  }
+
+  void initADC12CTL1()
+  {
+    adc12ctl1_t ctl1 = {
+      adc12busy: 0,                    // no operation is active
+      conseq: 1,                       // conversion mode: sequence of chans
+      adc12ssel: SHT_SOURCE_SMCLK,     // SHT_SOURCE_SMCLK=3; ADC12 clocl source
+      adc12div: SHT_CLOCK_DIV_1,       // SHT_CLOCK_DIV_1=0; ADC12 clock div 1
+      issh: 0,                         // sample-input signal not inverted
+      shp: 1,                          // Sample-and-hold pulse-mode select: SAMPCON signal is sourced from the sampling timer
+      shs: 0,                          // Sample-and-hold source select= ADC12SC bit
+      cstartadd: 0                     // conversion start addres ADC12MEM0
+    }; 
+
+    call HplAdc12.setCtl1(ctl1);
+  }
+
+  void initADC12MEMCTLx()
+  {
+    uint8_t i;
+    adc12memctl_t memctl = {
+      inch: 0,
+      sref: REFERENCE_AVcc_AVss,      // reference voltage: 
+      eos: 1                          // end of sequence flag: 1 indicates last conversion
+    };
+
+    for (i = 0; i < NUM_ADC_CHANS; ++i) {
+      memctl.inch = ADC_CHANS[i];
+
+      if (i < NUM_ADC_CHANS - 1)
+	memctl.eos = 0;
+      else 
+	memctl.eos = 1;                   // eos=1 indicates last conversion in sequence
+
+      call HplAdc12.setMCtl(i, memctl);
+    }
+  }
+
+  void setupDMA(uint16_t * destAddr) {
+    call Msp430DmaControl.init();                                     // blanks registers
+
+    call Msp430DmaControl.setFlags(FALSE, FALSE, FALSE);              // enable_nmi, round_robin, on_fetch
+
+    call Msp430DmaChannel.setupTransfer(DMA_BLOCK_TRANSFER,           //dma_transfer_mode_t transfer_mode, 
+					DMA_TRIGGER_ADC12IFGx,        //dma_trigger_t trigger, 
+					DMA_EDGE_SENSITIVE,           //dma_level_t level,
+					(void *)ADC12MEM0_,            //void *src_addr, 
+					(void *)destAddr,              //void *dst_addr, 
+					NUM_ADC_CHANS,                //uint16_t size,
+					DMA_WORD,                     //dma_byte_t src_byte, 
+					DMA_WORD,                     //dma_byte_t dst_byte,
+					DMA_ADDRESS_INCREMENTED,      //dma_incr_t src_incr, 
+					DMA_ADDRESS_INCREMENTED);     //dma_incr_t dst_incr
+
+    call Msp430DmaChannel.startTransfer();
+  }
+  async event void Msp430DmaChannel.transferDone(error_t success) {
+  }
+  async event void HplAdc12.conversionDone(uint16_t iv) {
+  }
+}
+  
+  
diff --git a/tos/platforms/shimmer/shimmerMessage.h b/tos/platforms/shimmer/shimmerMessage.h
new file mode 100644
index 00000000..d1851cbf
--- /dev/null
+++ b/tos/platforms/shimmer/shimmerMessage.h
@@ -0,0 +1,382 @@
+/**
+ * Copyright (c) 2004,2005 Hewlett-Packard Company
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of the Hewlett-Packard Company nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Simple message format for exchanging network data.
+ * We use the 'start' index to allow messages to have data
+ * prepended.
+ *
+ * Each message contains a 'next' field, which allows us
+ * to maintain queues.
+ *
+ * Note that we encode 16 and 32 bit values in network byte
+ * order, which is MSB (most significant byte) first.
+ *
+ * However, 802.15.4 multibyte fields are always encoded LSB,
+ * or least significant byte first.  The Chipcon radio also
+ * stores values LSB, as does the TI MSP processor.
+ * This really only shows up when we are setting the PanID and
+ * short address of our messages.
+ * 
+ * @author Andrew Christian
+ */
+
+#ifndef _MESSAGE_H
+#define _MESSAGE_H
+
+
+#define MESSAGE_MAX_LENGTH 128
+
+struct Message {
+  uint8_t data[ MESSAGE_MAX_LENGTH ];
+  uint8_t start;
+  uint8_t length;
+  struct Message *next;
+};
+
+/*
+ * this is useful for tracking down allocs w/out frees.  add a uint8_t who to the Message structure and then see who holds
+ * all the messages using param...
+#ifdef DEBUG_MESSAGE
+enum {
+  MSG_WHO_FREE=0,
+  MSG_WHO_CLIENT_HAWR,
+  MSG_WHO_CLIENT_HSNOOZET,
+  MSG_WHO_CLIENT_AR,
+  MSG_WHO_CLIENT_HSCANT,
+  MSG_WHO_CC2420H_DELAYEDRXFIFO,
+  MSG_WHO_UIP_SENDMESSAGE,
+  MSG_WHO_UIP_SENDUDPMESSAGE  
+};
+#endif
+*/
+
+
+/**
+ * Message manipulation functions.
+ *
+ * All integers are sent in network byte order - MSB first
+ */
+
+inline void msg_set_uint8( struct Message *msg, uint8_t offset, uint8_t data )
+{
+  uint8_t i = msg->start + offset;
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[ i] = data;
+}
+
+inline void msg_set_uint16( struct Message *msg, uint8_t offset, uint16_t data )
+{
+  uint8_t i = msg->start + offset;
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0xff00) >> 8;
+  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0xff);
+}
+
+inline void msg_set_saddr( struct Message *msg, uint8_t offset, uint16_t data )
+{
+  uint8_t i = msg->start + offset;
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0xff);
+  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0xff00) >> 8;
+}
+
+inline void msg_set_uint32( struct Message *msg, uint8_t offset, uint32_t data )
+{
+  uint8_t i = msg->start + offset;
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0xff000000) >> 24;
+  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0x00ff0000) >> 16;
+  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0x0000ff00) >> 8;
+  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0xff);
+}
+
+inline void msg_set_buf( struct Message *msg, uint8_t offset, const uint8_t *buf, uint8_t len )
+{
+  uint8_t i = msg->start + offset;
+  for ( ; len ; len--, i++ ) {
+    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+    msg->data[i] = *buf++;
+  }
+}
+
+inline uint8_t msg_get_uint8( const struct Message *msg, uint8_t offset )
+{
+  uint8_t i = msg->start + offset;
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  return msg->data[ i ];
+}
+
+inline int8_t msg_get_int8( const struct Message *msg, uint8_t offset )
+{
+  uint8_t i = msg->start + offset;
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  return ((int8_t *)(msg->data))[ i ];
+}
+
+inline uint16_t msg_get_uint16( const struct Message *msg, uint8_t offset )
+{
+  uint8_t i = msg->start + offset;
+  uint16_t result;
+
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  result = (msg->data[i] << 8);
+  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  result |= msg->data[i];
+  return result;
+}
+
+inline uint16_t msg_get_saddr( const struct Message *msg, uint8_t offset )
+{
+  uint8_t i = msg->start + offset;
+  uint16_t result;
+
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  result = msg->data[i];
+  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  result |= (msg->data[i] << 8);
+  return result;
+}
+
+inline void msg_get_buf( const struct Message *msg, uint8_t offset, uint8_t *buf, uint8_t len )
+{
+  uint8_t i = msg->start + offset;
+  for ( ; len ; len--, i++ ) {
+    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+    *buf++ = msg->data[i];
+  }
+}
+
+inline void msg_get_str( const struct Message *msg, uint8_t offset, uint8_t *str, uint8_t len )
+{
+  uint8_t i = msg->start + offset;
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+
+  while (--len && msg->data[i] ) {
+    *str++ = msg->data[i++];
+    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  }
+
+  *str = 0;
+}
+
+inline bool msg_cmp_buf( const struct Message *msg, uint8_t offset, const uint8_t *buf, uint8_t len )
+{
+  uint8_t i = msg->start + offset;
+  for ( ; len ; len--, i++ ) {
+    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+    if ( *buf++ != msg->data[i])
+      return FALSE;
+  }
+  return TRUE;
+}
+
+inline bool msg_cmp_str( const struct Message *msg, uint8_t offset, const uint8_t *buf )
+{
+  uint8_t i = msg->start + offset;
+  while (1) {
+    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+    if ( *buf++ != msg->data[i])
+      return FALSE;
+    if ( msg->data[i] == 0 )
+      return TRUE;
+    i++;
+  }
+  return TRUE;
+}
+
+inline void msg_append_uint8( struct Message *msg, uint8_t data )
+{
+  uint8_t i = msg->start + msg->length;
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  
+  msg->data[ i ] = data;
+  msg->length++;
+}
+
+inline void msg_append_uint16( struct Message *msg, uint16_t data )
+{
+  uint8_t i = msg->start + msg->length;
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0xff00) >> 8;
+  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0xff);
+  msg->length += 2;
+}
+
+inline void msg_append_saddr( struct Message *msg, uint16_t data )
+{
+  uint8_t i = msg->start + msg->length;
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0xff);
+  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0xff00) >> 8;
+  msg->length += 2;
+}
+
+inline void msg_append_uint32( struct Message *msg, uint32_t data )
+{
+  uint8_t i = msg->start + msg->length;
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0xff000000) >> 24;
+  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0x00ff0000) >> 16;
+  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0x0000ff00) >> 8;
+  if ( ++i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = (data & 0xff);
+  msg->length += 4;
+}
+
+inline void msg_append_buf( struct Message *msg, const uint8_t *buf, uint8_t len )
+{
+  uint8_t i = msg->start + msg->length;
+  msg->length += len;
+  for ( ; len ; len--, i++ ) {
+    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+    msg->data[i] = *buf++;
+  }
+}
+
+inline void msg_append_str( struct Message *msg, const uint8_t *str )
+{
+  uint8_t i = msg->start + msg->length;
+  for ( ; *str ; i++ ) {
+    if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+    msg->data[i] = *str++;
+    msg->length++;
+  }
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  msg->data[i] = 0;
+  msg->length++;
+}
+
+inline void msg_prepend_uint8( struct Message *msg, uint8_t data )
+{
+  msg->length++;
+  if ( msg->start == 0 )
+    msg->start = MESSAGE_MAX_LENGTH - 1;
+  else
+    msg->start--;
+
+  msg->data[ msg->start ] = data;
+}
+
+inline void msg_add_to_front( struct Message *msg, uint8_t count )
+{
+  if ( msg->start < count )
+    msg->start = MESSAGE_MAX_LENGTH - count + msg->start;
+  else
+    msg->start -= count;
+  msg->length += count;
+}
+
+inline void msg_drop_from_front( struct Message *msg, uint8_t count )
+{
+  msg->start  += count;
+  if ( msg->start >= MESSAGE_MAX_LENGTH ) msg->start -= MESSAGE_MAX_LENGTH;
+  msg->length -= count;
+}
+
+inline void msg_add_to_end( struct Message *msg, uint8_t count )
+{
+  msg->length += count;
+}
+
+inline void msg_drop_from_end( struct Message *msg, uint8_t count )
+{
+  msg->length -= count;
+}
+
+inline uint8_t * msg_get_pointer( struct Message *msg, uint8_t offset )
+{
+  uint8_t i = msg->start + offset;
+  if ( i >= MESSAGE_MAX_LENGTH ) i -= MESSAGE_MAX_LENGTH;
+  return msg->data + i;
+}
+
+inline void msg_clear( struct Message *msg )
+{
+  msg->length = 0;
+  msg->start  = 0;
+}
+
+inline void    msg_set_length( struct Message *msg, uint8_t len )  { msg->length = len; }
+inline uint8_t msg_get_length( const struct Message *msg )         { return msg->length; }
+inline uint8_t msg_get_max_length( void )         { return MESSAGE_MAX_LENGTH; }
+
+/**
+ * Message queue functions.  Message queues are simple
+ * linked lists.
+ */
+
+inline struct Message * pop_queue( struct Message **head )
+{
+  struct Message *result = *head;
+  if ( result != NULL )
+    *head = (*head)->next;
+  return result;
+}
+
+inline void push_queue( struct Message **head, struct Message *item )
+{
+  item->next = *head;
+  *head = item;
+}
+
+inline void append_queue( struct Message **head, struct Message *item )
+{
+  if (*head == NULL) {
+    *head = item;
+  }
+  else {
+    struct Message *bm = *head;
+    while ( bm->next != NULL )
+      bm = bm->next;
+    bm->next = item;
+  }
+  item->next = NULL;
+}
+
+inline uint8_t count_queue( struct Message *head )
+{
+  uint8_t count = 0;
+  while ( head ) {
+    count++;
+    head = head->next;
+  }
+  return count;
+}
+
+#endif // _BASIC_MESSAGE_H
diff --git a/tos/platforms/shimmer2/.platform b/tos/platforms/shimmer2/.platform
new file mode 100644
index 00000000..1f093045
--- /dev/null
+++ b/tos/platforms/shimmer2/.platform
@@ -0,0 +1,91 @@
+# SHIMMER2 - platform includes
+# Steve Ayer, June 2009; derived from Konrad Lorincz's SHIMMER platform
+#
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+
+push( @includes, qw(
+
+      .
+  %T/platforms/shimmer2
+  %T/platforms/shimmer2/chips/msp430
+  %T/platforms/shimmer2/chips/cc2420
+  %T/platforms/shimmer2/chips/mma7260
+  %T/platforms/shimmer2/chips/sd
+  %T/platforms/shimmer2/chips/bluetooth
+  %T/platforms/shimmer2/chips/tilt
+  %T/platforms/shimmer2/chips/gyro
+  %T/platforms/shimmer2/chips/gyromag
+  %T/platforms/shimmer2/chips/fgpmmopa6b
+  %T/platforms/shimmer2/chips/bmp085
+  %T/platforms/shimmer
+  %T/platforms/shimmer/chips/msp430
+  %T/platforms/shimmer/chips/mma7260
+  %T/platforms/shimmer/chips/sd
+  %T/platforms/shimmer/chips/sd/fatfs
+  %T/platforms/shimmer/chips/bluetooth
+  %T/platforms/shimmer/chips/ds2411
+  %T/chips/cc2420
+  %T/chips/cc2420/alarm
+  %T/chips/cc2420/control
+  %T/chips/cc2420/csma
+  %T/chips/cc2420/interfaces
+  %T/chips/cc2420/link
+  %T/chips/cc2420/lowpan
+  %T/chips/cc2420/lpl
+  %T/chips/cc2420/packet
+  %T/chips/cc2420/receive
+  %T/chips/cc2420/spi
+  %T/chips/cc2420/transmit
+  %T/chips/cc2420/unique
+  %T/chips/cc2420/security
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/dma
+  %T/chips/msp430/pins
+  %T/chips/msp430/timer
+  %T/chips/msp430/usart
+  %T/chips/msp430/sensors
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+  %T/lib/power
+  ) );
+
+@opts = qw(
+
+  -gcc=msp430-gcc
+  -mmcu=msp430x1611
+  -fnesc-target=msp430
+  -fnesc-no-debug
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=2 " .
+    "version=msp430-3.2.3 " .
+    "short=2,2 " .
+    "int=2,2 " .
+    "long=4,2 " .
+    "long_long=8,2 " .
+    "pointer=2,2 " .
+    "enum=2,2 " .
+    "float=4,2 " .
+    "double=4,2 " .
+    "long_double=4,2 " .
+    "void=1,1 " .
+    "fun=1,2 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
diff --git a/tos/platforms/shimmer2/ActiveMessageC.nc b/tos/platforms/shimmer2/ActiveMessageC.nc
new file mode 100644
index 00000000..8be6e12f
--- /dev/null
+++ b/tos/platforms/shimmer2/ActiveMessageC.nc
@@ -0,0 +1,88 @@
+// $Id: ActiveMessageC.nc,v 1.3 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.3 2010-06-29 22:07:54 scipio Exp $
+ *
+ */
+/**
+ * The Active Message layer on the SHIMMER platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Konrad Lorincz
+ */
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+    interface LowPowerListening;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+  LowPowerListening = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
diff --git a/tos/platforms/shimmer2/HplUserButtonC.nc b/tos/platforms/shimmer2/HplUserButtonC.nc
new file mode 100644
index 00000000..9bf9033a
--- /dev/null
+++ b/tos/platforms/shimmer2/HplUserButtonC.nc
@@ -0,0 +1,57 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telos platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ *
+ * @author Mike Healy
+ * @date May 9, 2009 - modified for use with SHIMMER2
+ */
+
+configuration HplUserButtonC {
+  provides interface GeneralIO;
+  provides interface GpioInterrupt;
+}
+implementation {
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components HplMsp430InterruptC as InterruptC;
+
+  components new Msp430GpioC() as UserButtonC;
+  UserButtonC -> GeneralIOC.Port20;
+  GeneralIO = UserButtonC;
+
+  components new Msp430InterruptC() as InterruptUserButtonC;
+  InterruptUserButtonC.HplInterrupt -> InterruptC.Port20;
+  GpioInterrupt = InterruptUserButtonC.Interrupt;
+}
diff --git a/tos/platforms/shimmer2/Leds.nc b/tos/platforms/shimmer2/Leds.nc
new file mode 100644
index 00000000..6325d893
--- /dev/null
+++ b/tos/platforms/shimmer2/Leds.nc
@@ -0,0 +1,136 @@
+// $Id: Leds.nc,v 1.4 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2005-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Commands for controlling three LEDs. A platform can provide this
+ * interface if it has more than or fewer than three LEDs. In the
+ * former case, these commands refer to the first three LEDs. In the
+ * latter case, some of the commands are null operations, and the set
+ * of non-null operations must be contiguous and start at Led1. That
+ * is, on platforms with 2 LEDs, LED 3's commands are null operations,
+ * while on platforms with 1 LED, LED 2 and LED 3's commands are null
+ * opertations.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ *
+ */
+
+#include "Leds.h"
+
+interface Leds {
+
+  /**
+   * Turn on LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0On();
+
+  /**
+   * Turn off LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0Off();
+
+  /**
+   * Toggle LED 0; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led0Toggle();
+
+  /**
+   * Turn on LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1On();
+
+  /**
+   * Turn off LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1Off();
+
+   /**
+   * Toggle LED 1; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led1Toggle();
+
+ 
+  /**
+   * Turn on LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2On();
+
+  /**
+   * Turn off LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2Off();
+
+   /**
+   * Toggle LED 2; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led2Toggle();
+  
+  /**
+   * Get the current LED settings as a bitmask. Each bit corresponds to
+   * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can
+   * also use the enums LEDS_LED0, LEDS_LED1. For example, this expression
+   * will determine whether LED 2 is on:
+   *
+   * <pre> (call Leds.get() & LEDS_LED2) </pre>
+   *
+   * This command supports up to 8 LEDs; if a platform has fewer, then
+   * those LEDs should always be off (their bit is zero). Also see
+   * <tt>set()</tt>.
+   *
+   * @return a bitmask describing which LEDs are on and which are off
+   */ 
+  async command uint8_t get();
+
+  
+  /**
+   * Set the current LED configuration using a bitmask.  Each bit
+   * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED
+   * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example,
+   * this statement will configure the LEDs so LED 0 and LED 2 are on:
+   *
+   * <pre> call Leds.set(LEDS_LED0 | LEDS_LED2); </pre>
+   *
+   * This statement will turn LED 1 on if it was not already:
+   *
+   * <pre>call Leds.set(call Leds.get() | LEDS_LED1);</pre>
+   *
+   * @param  val   a bitmask describing the on/off settings of the LEDs
+   */
+   async command void set(uint8_t val);
+  
+}
diff --git a/tos/platforms/shimmer2/LedsC.nc b/tos/platforms/shimmer2/LedsC.nc
new file mode 100644
index 00000000..2fc5e8aa
--- /dev/null
+++ b/tos/platforms/shimmer2/LedsC.nc
@@ -0,0 +1,59 @@
+// $Id: LedsC.nc,v 1.4 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ *
+ * The basic TinyOS LEDs abstraction.
+ *
+ * @author Phil Buonadonna
+ * @author David Gay
+ * @author Philip Levis
+ * @author Joe Polastre
+ *
+ */
+
+
+configuration LedsC {
+  provides interface Leds;
+}
+implementation {
+  components LedsP, PlatformLedsC;
+
+  Leds = LedsP;
+
+  LedsP.Init <- PlatformLedsC.Init;
+  LedsP.Led0 -> PlatformLedsC.Led0;
+  LedsP.Led1 -> PlatformLedsC.Led1;
+  LedsP.Led2 -> PlatformLedsC.Led2;
+}
+
diff --git a/tos/platforms/shimmer2/LedsP.nc b/tos/platforms/shimmer2/LedsP.nc
new file mode 100644
index 00000000..9ac6ef38
--- /dev/null
+++ b/tos/platforms/shimmer2/LedsP.nc
@@ -0,0 +1,159 @@
+// $Id: LedsP.nc,v 1.4 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The implementation of the standard 3 LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ *
+ * @date   March 21, 2005
+ *
+ */
+
+module LedsP @safe() {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+}
+implementation {
+  command error_t Init.init() {
+    atomic {
+      dbg("Init", "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led0.set();
+      call Led1.set();
+      call Led2.set();
+    }
+    return SUCCESS;
+  }
+
+  /* Note: the call is inside the dbg, as it's typically a read of a volatile
+     location, so can't be deadcode eliminated */
+#define DBGLED(n) \
+  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");
+
+  async command void Leds.led0On() {
+    call Led0.clr();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Off() {
+    call Led0.set();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    DBGLED(0);
+  }
+
+  async command void Leds.led1On() {
+    call Led1.clr();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Off() {
+    call Led1.set();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    DBGLED(1);
+  }
+
+  async command void Leds.led2On() {
+    call Led2.clr();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Off() {
+    call Led2.set();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    DBGLED(2);
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (!call Led0.get()) {
+	      rval |= LEDS_LED0;
+      }
+      if (!call Led1.get()) {
+	      rval |= LEDS_LED1;
+      }
+      if (!call Led2.get()) {
+	      rval |= LEDS_LED2;
+      }
+    }
+    return rval;
+  }
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+	      call Leds.led0On();
+      }
+      else {
+	      call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+	      call Leds.led1On();
+      }
+      else {
+	      call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+	      call Leds.led2On();
+      }
+      else {
+	      call Leds.led2Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/shimmer2/MoteClockC.nc b/tos/platforms/shimmer2/MoteClockC.nc
new file mode 100644
index 00000000..5b74f8fc
--- /dev/null
+++ b/tos/platforms/shimmer2/MoteClockC.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id: MoteClockC.nc,v 1.1 2009-09-04 18:27:46 ayer1 Exp $
+ *
+ */
+
+ /**
+ * @author Vlado Handziski <handzisk@tkn.tu-berlind.de>
+ */
+ 
+configuration MoteClockC
+{
+  provides interface Init as MoteClockInit;
+}
+implementation
+
+{
+  components Msp430ClockC;
+  
+  MoteClockInit = Msp430ClockC.Init;
+}
diff --git a/tos/platforms/shimmer2/MotePlatformC.nc b/tos/platforms/shimmer2/MotePlatformC.nc
new file mode 100644
index 00000000..93207f05
--- /dev/null
+++ b/tos/platforms/shimmer2/MotePlatformC.nc
@@ -0,0 +1,231 @@
+/*
+ * Copyright (c) 2007, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steven Ayer
+ * @date   July 2007
+ * 
+ * tos-2.x port June 2009
+ *
+ */
+
+module MotePlatformC {
+  provides interface Init;
+}
+
+implementation {
+
+  command error_t Init.init() {
+    
+    // have to tell mux to connect path from msp430 to sd
+    TOSH_SEL_DOCK_N_IOFUNC();
+    TOSH_MAKE_DOCK_N_OUTPUT();
+    TOSH_SET_DOCK_N_PIN();
+
+    // bus arbitration pins 
+    TOSH_SEL_SW_SD_PWR_N_IOFUNC();
+    TOSH_MAKE_SW_SD_PWR_N_OUTPUT();
+
+    TOSH_SEL_SD_CS_N_IOFUNC();
+    TOSH_MAKE_SD_CS_N_OUTPUT();
+
+    TOSH_SEL_SD_CLK_IOFUNC();
+    TOSH_MAKE_SD_CLK_OUTPUT();
+    TOSH_SEL_SD_DO_IOFUNC();
+    TOSH_MAKE_SD_DO_INPUT();
+    TOSH_SEL_SD_DI_IOFUNC();
+    TOSH_MAKE_SD_DI_OUTPUT();
+  
+    // power down sd module; overridden by dock pin on programming board
+    /*
+     * other pins are zeroed to reset card
+     * at end of this routine, we raise them again (they have pullups, too)
+     */
+    TOSH_SET_SW_SD_PWR_N_PIN();     
+    TOSH_CLR_SD_CS_N_PIN();
+    TOSH_CLR_SD_DI_PIN();
+    TOSH_CLR_SD_CLK_PIN();
+  
+    TOSH_SEL_SW_BT_PWR_N_IOFUNC();
+    TOSH_MAKE_SW_BT_PWR_N_OUTPUT();
+    TOSH_SET_SW_BT_PWR_N_PIN();     // power down bt module; overridden by dock pin on programming board
+
+    //LEDS
+    TOSH_SEL_RED_LED_IOFUNC();
+    TOSH_MAKE_RED_LED_OUTPUT();
+    TOSH_SEL_YELLOW_LED_IOFUNC();
+    TOSH_MAKE_YELLOW_LED_OUTPUT();
+    TOSH_SEL_GREEN_LED_IOFUNC();
+    TOSH_MAKE_GREEN_LED_OUTPUT();
+
+    TOSH_SET_RED_LED_PIN();
+    TOSH_SET_YELLOW_LED_PIN();
+    TOSH_SET_GREEN_LED_PIN();
+
+    //RADIO PINS
+    //CC2420 pins
+    TOSH_MAKE_RADIO_VREF_OUTPUT();
+    TOSH_SEL_RADIO_VREF_IOFUNC();
+    TOSH_CLR_RADIO_VREF_PIN();    // power down 
+
+    TOSH_MAKE_RADIO_CSN_OUTPUT();
+    TOSH_SEL_RADIO_CSN_IOFUNC();
+    TOSH_SET_RADIO_CSN_PIN();
+
+    // should be reset_n
+    TOSH_MAKE_RADIO_RESET_OUTPUT();
+    TOSH_SEL_RADIO_RESET_IOFUNC();
+    TOSH_CLR_RADIO_RESET_PIN();
+
+    TOSH_SEL_RADIO_CCA_IOFUNC();
+    TOSH_MAKE_RADIO_CCA_INPUT();
+    TOSH_SEL_RADIO_FIFO_IOFUNC();
+    TOSH_MAKE_RADIO_FIFO_INPUT();
+    TOSH_SEL_RADIO_FIFOP_IOFUNC();
+    TOSH_MAKE_RADIO_FIFOP_INPUT();
+    TOSH_SEL_RADIO_SFD_IOFUNC();
+    TOSH_MAKE_RADIO_SFD_INPUT();
+
+    TOSH_SEL_TILT_IOFUNC();
+    TOSH_MAKE_TILT_INPUT();
+
+    // BT PINS
+    TOSH_MAKE_BT_RESET_OUTPUT();  
+    TOSH_SEL_BT_RESET_IOFUNC();    
+    TOSH_CLR_BT_RESET_PIN();   // mitsumi module disabled by clr
+
+    TOSH_MAKE_BT_RTS_INPUT();      
+    TOSH_SEL_BT_RTS_IOFUNC();
+
+    TOSH_MAKE_BT_PIO_INPUT();
+    TOSH_SEL_BT_PIO_IOFUNC();
+
+    TOSH_MAKE_BT_CTS_OUTPUT();
+    TOSH_SEL_BT_CTS_IOFUNC();
+
+    TOSH_MAKE_BT_TXD_OUTPUT();
+    TOSH_SEL_BT_TXD_IOFUNC();
+
+    TOSH_MAKE_BT_RXD_INPUT();
+    TOSH_SEL_BT_RXD_IOFUNC();
+
+    // BSL Prog Pins tristate em
+    TOSH_MAKE_PROG_IN_OUTPUT();
+    TOSH_MAKE_PROG_OUT_OUTPUT();
+    TOSH_SET_PROG_OUT_PIN();    // some expansion boards have enable low
+    TOSH_SEL_PROG_IN_IOFUNC();
+    TOSH_SEL_PROG_OUT_IOFUNC();
+
+    // ADC lines
+    TOSH_SEL_ADC_0_IOFUNC();
+    TOSH_MAKE_ADC_0_OUTPUT();
+    TOSH_SEL_ADC_1_IOFUNC();
+    TOSH_MAKE_ADC_1_OUTPUT();
+    TOSH_SEL_ADC_2_IOFUNC();
+    TOSH_MAKE_ADC_2_OUTPUT();
+    TOSH_SEL_ADC_6_IOFUNC();
+    TOSH_MAKE_ADC_6_OUTPUT();
+    TOSH_SEL_ADC_7_IOFUNC();
+    TOSH_MAKE_ADC_7_OUTPUT();
+
+    TOSH_SEL_ADC_ACCELZ_IOFUNC();
+    TOSH_MAKE_ADC_ACCELZ_INPUT();
+    TOSH_SEL_ADC_ACCELY_IOFUNC();
+    TOSH_MAKE_ADC_ACCELY_INPUT();
+    TOSH_SEL_ADC_ACCELX_IOFUNC();
+    TOSH_MAKE_ADC_ACCELX_INPUT();
+  
+    TOSH_SEL_ROSC_IOFUNC();
+    TOSH_MAKE_ROSC_INPUT();
+
+    // 1-wire function
+    TOSH_SEL_ONEWIRE_IOFUNC();
+    TOSH_MAKE_ONEWIRE_OUTPUT();
+    TOSH_SET_ONEWIRE_PIN();
+
+    /*
+     *  Accelerometer pin definitions
+     * unless the accel_sel0 pin is cleared, 
+     * a severe quiescent power hit occurs on the msp430
+     * we go from 3.7 ua to 65.1 ua when asleep!
+     */
+    TOSH_SEL_ACCEL_SEL0_IOFUNC();
+    TOSH_MAKE_ACCEL_SEL0_OUTPUT();
+    TOSH_CLR_ACCEL_SEL0_PIN();
+    TOSH_SEL_ACCEL_SEL1_IOFUNC();
+    TOSH_MAKE_ACCEL_SEL1_OUTPUT();
+    TOSH_CLR_ACCEL_SEL1_PIN();
+    TOSH_SEL_ACCEL_SLEEP_N_IOFUNC();
+    TOSH_MAKE_ACCEL_SLEEP_N_OUTPUT();
+    TOSH_CLR_ACCEL_SLEEP_N_PIN();
+
+    // idle expansion header pins
+    TOSH_SEL_SER0_CTS_IOFUNC();
+    TOSH_MAKE_SER0_CTS_OUTPUT();
+    TOSH_SEL_SER0_RTS_IOFUNC();
+    TOSH_MAKE_SER0_RTS_OUTPUT();
+
+    // this pin is now tied to the user button on the prog board
+    TOSH_SEL_GIO0_IOFUNC();
+    TOSH_MAKE_GIO0_INPUT();
+
+    TOSH_SEL_GIO1_IOFUNC();
+    TOSH_MAKE_GIO1_OUTPUT();
+
+    TOSH_SEL_UTXD0_IOFUNC();
+    TOSH_MAKE_UTXD0_OUTPUT();
+    TOSH_SEL_URXD0_IOFUNC();
+    TOSH_MAKE_URXD0_OUTPUT();
+    TOSH_SET_URXD0_PIN();
+
+    TOSH_SEL_UTXD1_IOFUNC();
+    TOSH_MAKE_UTXD1_OUTPUT();
+    TOSH_SEL_URXD1_IOFUNC();
+    TOSH_MAKE_URXD1_OUTPUT();
+    TOSH_SEL_UCLK1_IOFUNC();
+    TOSH_MAKE_UCLK1_OUTPUT();
+    TOSH_SEL_SIMO1_IOFUNC();
+    TOSH_MAKE_SIMO1_OUTPUT();
+    TOSH_SEL_SOMI1_IOFUNC();
+    TOSH_MAKE_SOMI1_INPUT();
+
+    TOSH_SET_SD_CS_N_PIN();
+    TOSH_SET_SD_DI_PIN();
+    TOSH_SET_SD_CLK_PIN();
+
+    // these are attached to the same pullup as above
+    TOSH_SET_SIMO1_PIN();
+    TOSH_SET_UCLK1_PIN();
+
+    // set it back to default state
+    TOSH_MAKE_DOCK_N_INPUT();
+
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/shimmer2/Msp430Timer32khzMapC.nc b/tos/platforms/shimmer2/Msp430Timer32khzMapC.nc
new file mode 100644
index 00000000..0209619b
--- /dev/null
+++ b/tos/platforms/shimmer2/Msp430Timer32khzMapC.nc
@@ -0,0 +1,86 @@
+//$Id: Msp430Timer32khzMapC.nc,v 1.3 2010-06-29 22:07:54 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * MSP430Timer32khzMapC presents as paramaterized interfaces all of
+ * the 32khz hardware timers on the MSP430 that are available for
+ * compile time allocation by "new Alarm32khz16C()", "new
+ * AlarmMilli32C()", and so on.  
+ *
+ * Platforms based on the MSP430 are * encouraged to copy in and
+ * override this file, presenting only the * hardware timers that are
+ * available for allocation on that platform.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:54 $
+ */
+
+configuration Msp430Timer32khzMapC
+{
+  provides interface Msp430Timer[ uint8_t id ];
+  provides interface Msp430TimerControl[ uint8_t id ];
+  provides interface Msp430Compare[ uint8_t id ];
+}
+implementation
+{
+  components Msp430TimerC;
+
+  Msp430Timer[0] = Msp430TimerC.TimerB;
+  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
+  Msp430Compare[0] = Msp430TimerC.CompareB0;
+
+  Msp430Timer[1] = Msp430TimerC.TimerB;
+  Msp430TimerControl[1] = Msp430TimerC.ControlB1;
+  Msp430Compare[1] = Msp430TimerC.CompareB1;
+
+  Msp430Timer[2] = Msp430TimerC.TimerB;
+  Msp430TimerControl[2] = Msp430TimerC.ControlB2;
+  Msp430Compare[2] = Msp430TimerC.CompareB2;
+
+  Msp430Timer[3] = Msp430TimerC.TimerB;
+  Msp430TimerControl[3] = Msp430TimerC.ControlB3;
+  Msp430Compare[3] = Msp430TimerC.CompareB3;
+
+  Msp430Timer[4] = Msp430TimerC.TimerB;
+  Msp430TimerControl[4] = Msp430TimerC.ControlB4;
+  Msp430Compare[4] = Msp430TimerC.CompareB4;
+
+  Msp430Timer[5] = Msp430TimerC.TimerB;
+  Msp430TimerControl[5] = Msp430TimerC.ControlB5;
+  Msp430Compare[5] = Msp430TimerC.CompareB5;
+
+  Msp430Timer[6] = Msp430TimerC.TimerB;
+  Msp430TimerControl[6] = Msp430TimerC.ControlB6;
+  Msp430Compare[6] = Msp430TimerC.CompareB6;
+}
+
diff --git a/tos/platforms/shimmer2/NoLedsC.nc b/tos/platforms/shimmer2/NoLedsC.nc
new file mode 100644
index 00000000..6ae64963
--- /dev/null
+++ b/tos/platforms/shimmer2/NoLedsC.nc
@@ -0,0 +1,68 @@
+// $Id: NoLedsC.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * A null operation replacement for the LedsC component. As many
+ * components might concurrently signal information through LEDs,
+ * using LedsC and NoLedsC allows an application builder to select
+ * which components control the LEDs.
+ *
+ * @author Philip Levis
+ * @date   March 19, 2005
+ *
+ */
+
+module NoLedsC {
+  provides interface Init;
+  provides interface Leds;
+}
+implementation {
+
+  command error_t Init.init() {return SUCCESS;}
+
+  async command void Leds.led0On() {}
+  async command void Leds.led0Off() {}
+  async command void Leds.led0Toggle() {}
+
+  async command void Leds.led1On() {}
+  async command void Leds.led1Off() {}
+  async command void Leds.led1Toggle() {}
+
+  async command void Leds.led2On() {}
+  async command void Leds.led2Off() {}
+  async command void Leds.led2Toggle() {}
+
+  async command uint8_t Leds.get() {return 0;}
+  async command void Leds.set(uint8_t val) {}
+}
diff --git a/tos/platforms/shimmer2/PlatformC.nc b/tos/platforms/shimmer2/PlatformC.nc
new file mode 100644
index 00000000..8c78be51
--- /dev/null
+++ b/tos/platforms/shimmer2/PlatformC.nc
@@ -0,0 +1,49 @@
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre and Cory Sharp
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:54 $
+ */
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+}
+implementation
+{
+  components PlatformP, MotePlatformC, MoteClockC;
+
+  Init = PlatformP;
+  PlatformP.MoteClockInit -> MoteClockC;
+  PlatformP.MoteInit -> MotePlatformC;
+}
diff --git a/tos/platforms/shimmer2/PlatformLedsC.nc b/tos/platforms/shimmer2/PlatformLedsC.nc
new file mode 100644
index 00000000..b99b3747
--- /dev/null
+++ b/tos/platforms/shimmer2/PlatformLedsC.nc
@@ -0,0 +1,69 @@
+// $Id: PlatformLedsC.nc,v 1.2 2010-06-29 22:07:54 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:54 $
+ */
+
+#include "hardware.h"
+
+configuration PlatformLedsC {
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation
+{
+  components 
+      HplMsp430GeneralIOC as GeneralIOC
+    , new Msp430GpioC() as Led0Impl
+    , new Msp430GpioC() as Led1Impl
+    , new Msp430GpioC() as Led2Impl
+    ;
+  components PlatformP;
+
+  Init = PlatformP.LedsInit;
+
+  Led0 = Led0Impl;
+  Led0Impl -> GeneralIOC.Port40;
+
+  Led1 = Led1Impl;
+  Led1Impl -> GeneralIOC.Port42;
+
+  Led2 = Led2Impl;
+  Led2Impl -> GeneralIOC.Port43;
+
+}
+
diff --git a/tos/platforms/shimmer2/PlatformP.nc b/tos/platforms/shimmer2/PlatformP.nc
new file mode 100644
index 00000000..b8dc9438
--- /dev/null
+++ b/tos/platforms/shimmer2/PlatformP.nc
@@ -0,0 +1,19 @@
+#include "hardware.h"
+
+module PlatformP{
+  provides interface Init;
+  uses interface Init as MoteClockInit;
+  uses interface Init as MoteInit;
+  uses interface Init as LedsInit;
+}
+implementation {
+  command error_t Init.init() {
+    call MoteClockInit.init();
+    call MoteInit.init();
+    call LedsInit.init();
+    return SUCCESS;
+  }
+
+  default command error_t LedsInit.init() { return SUCCESS; }
+
+}
diff --git a/tos/platforms/shimmer2/PlatformSerialC.nc b/tos/platforms/shimmer2/PlatformSerialC.nc
new file mode 100644
index 00000000..967e9dae
--- /dev/null
+++ b/tos/platforms/shimmer2/PlatformSerialC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * mostly copied from shimmer
+ *
+ * @author Steve Ayer
+ * @date   June 2009
+ */
+
+configuration PlatformSerialC {
+  provides interface StdControl;
+  provides interface UartStream;
+  provides interface UartByte;
+}
+
+implementation {
+  components new Msp430Uart0C() as UartC;
+  UartStream = UartC;  
+  UartByte = UartC;
+  
+  components ShimmerSerialP;
+  StdControl = ShimmerSerialP;
+  ShimmerSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
+  ShimmerSerialP.Resource -> UartC.Resource;
+}
diff --git a/tos/platforms/shimmer2/ShimmerSerialP.nc b/tos/platforms/shimmer2/ShimmerSerialP.nc
new file mode 100644
index 00000000..a1f61ea3
--- /dev/null
+++ b/tos/platforms/shimmer2/ShimmerSerialP.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date June 2009
+ */
+
+module ShimmerSerialP {
+  provides interface StdControl;
+  provides interface Msp430UartConfigure;
+  uses interface Resource;
+}
+
+implementation {
+  msp430_uart_union_config_t msp430_uart_shimmer2_config = { 
+    { ubr: UBR_1MHZ_115200, 
+      umctl: UMCTL_1MHZ_115200, 
+      ssel: 0x02, 
+      pena: 0, 
+      pev: 0, 
+      spb: 0, 
+      clen: 1, 
+      listen: 0, 
+      mm: 0, 
+      ckpl: 0, 
+      urxse: 0, 
+      urxeie: 1, 
+      urxwie: 0, 
+      utxe : 1, 
+      urxe : 1 
+    } 
+  };
+
+  command error_t StdControl.start(){
+    return call Resource.immediateRequest();
+  }
+  
+  command error_t StdControl.stop(){
+    call Resource.release();
+    return SUCCESS;
+  }
+
+  event void Resource.granted(){}
+
+  async command msp430_uart_union_config_t * Msp430UartConfigure.getConfig(){
+    return &msp430_uart_shimmer2_config;
+  }
+}
diff --git a/tos/platforms/shimmer2/TimeSyncMessageC.nc b/tos/platforms/shimmer2/TimeSyncMessageC.nc
new file mode 100644
index 00000000..a9d38357
--- /dev/null
+++ b/tos/platforms/shimmer2/TimeSyncMessageC.nc
@@ -0,0 +1,84 @@
+// $Id: TimeSyncMessageC.nc,v 1.2 2010/05/17 13:12:21 ayer Exp $
+
+/*
+ * "Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *
+ * The Active Message layer on the shimmer platform. This is a naming wrapper
+ * around the CC2420 Active Message layer that implemets timesync interface (TEP 133).
+ *
+ * @author Konrad Lorincz
+ * @author Brano Kusy
+ * @date June 19 2005
+ */
+
+configuration TimeSyncMessageC {
+  provides
+  {
+    interface SplitControl;
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface LowPowerListening;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+
+    interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[am_id_t id];
+    interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+
+    interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+    interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+  }
+}
+implementation {
+  components CC2420TimeSyncMessageC as AM;
+
+  SplitControl = AM;
+
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+  LowPowerListening = AM;
+
+  TimeSyncAMSend32khz       = AM;
+  TimeSyncAMSendMilli       = AM;
+  TimeSyncPacket32khz       = AM;
+  TimeSyncPacketMilli       = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
+
diff --git a/tos/platforms/shimmer2/chips/bluetooth/RovingNetworksC.nc b/tos/platforms/shimmer2/chips/bluetooth/RovingNetworksC.nc
new file mode 100755
index 00000000..37c2e0a1
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/bluetooth/RovingNetworksC.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2007, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  Author:  Steve Ayer
+ *           February, 2007
+ */
+/**
+ * @author Steve Ayer
+ * @author Adrian Burns
+ * @date February, 2007
+ *
+ * @author Mike Healy
+ * @date April 20, 2009 - ported to TinyOS 2.x 
+ */
+
+
+
+configuration RovingNetworksC {
+   provides {
+      interface StdControl;
+      interface Bluetooth;
+      interface Init;
+   }
+}
+implementation {
+   components 
+     RovingNetworksP,
+     MainC,
+     HplMsp430InterruptC,  
+     HplMsp430Usart1C,     
+     LedsC;
+
+   StdControl = RovingNetworksP;
+   Bluetooth = RovingNetworksP;
+   Init = RovingNetworksP;
+
+   RovingNetworksP.UARTControl            -> HplMsp430Usart1C.HplMsp430Usart;
+   RovingNetworksP.UARTData               -> HplMsp430Usart1C.HplMsp430UsartInterrupts;
+   RovingNetworksP.RTSInterrupt           -> HplMsp430InterruptC.Port16;
+   RovingNetworksP.ConnectionInterrupt    -> HplMsp430InterruptC.Port26;
+   RovingNetworksP.Leds                   -> LedsC;
+
+}
diff --git a/tos/platforms/shimmer2/chips/bmp085/Bmp085P.nc b/tos/platforms/shimmer2/chips/bmp085/Bmp085P.nc
new file mode 100644
index 00000000..46399488
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/bmp085/Bmp085P.nc
@@ -0,0 +1,366 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * @author Steve Ayer
+ * @date November, 2010
+ *
+ * driver for bosch bmp085 pressure sensor module (port from tos-1.x)
+ */
+
+module Bmp085P {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface PressureSensor;
+  }
+  uses {
+    interface I2CPacket<TI2CBasicAddr> as I2CPacket;
+
+    interface HplMsp430I2C as HplI2C;
+    //    interface HplMsp430Usart as Usart;
+    interface HplMsp430UsartInterrupts as UsartInterrupts;
+    interface HplMsp430I2CInterrupts as I2CInterrupts;
+
+    interface HplMsp430Interrupt as EOCInterrupt;
+    interface HplMsp430GeneralIO as Msp430GeneralIO;
+  }
+}
+
+implementation {
+  extern int sprintf(char *str, const char *format, ...) __attribute__ ((C));
+  extern int snprintf(char *str, size_t len, const char *format, ...) __attribute__ ((C));
+
+  void readReg(uint8_t reg_addr, uint8_t size);
+
+  uint8_t readbuff[128], bytesToRead, regToRead, bytesRead, temp_run, cal_run;
+  uint16_t sbuf0[64];
+
+  // sensing mode
+  uint8_t oss;  // default is ultra high res
+
+  // calibration vars
+  int16_t AC1, AC2, AC3, B1, B2, MB, MC, MD;
+  uint16_t AC4, AC5, AC6;
+  
+  // calculation vars
+  int32_t x1, x2, x3, b3, b5, b6, press;
+  uint32_t b4, b7, up, ut;
+  int16_t temp;
+
+  bool operatingState;
+
+  msp430_i2c_union_config_t msp430_i2c_my_config = { 
+    {
+      rxdmaen : 0, 
+      txdmaen : 0, 
+      xa : 0, 
+      listen : 0, 
+      mst : 1,
+      i2cword : 0, 
+      i2crm : 1, 
+      i2cssel : 0x2, 
+      i2cpsc : 0, 
+      i2csclh : 0x3, 
+      i2cscll : 0x3,
+      i2coa : 0,
+    } 
+  };
+
+  enum {
+    WAITING_ON_REG,
+    NORMAL
+  };
+
+  command error_t Init.init() {
+    TOSH_SET_ADC_1_PIN();   // this is a pull-up to enable the i2c bus
+
+    TOSH_SET_ADC_2_PIN();   // module clear pin, logical false (basically reset)
+
+    call HplI2C.setModeI2C(&msp430_i2c_my_config);
+
+    TOSH_MAKE_SER0_RTS_INPUT();  // this is the EOC (end o calculation) pin
+
+    temp_run = 0;
+    oss = 3;
+
+    operatingState = NORMAL;
+
+    return SUCCESS;
+  }
+
+  task void cal(){
+    readReg(0xaa, 22);
+  }
+
+  command error_t StdControl.start(){
+    // this is the EOC (end o calculation) pin
+
+    atomic {
+      call Msp430GeneralIO.makeInput();
+      call Msp430GeneralIO.selectIOFunc();
+      call EOCInterrupt.disable();
+      call EOCInterrupt.edge(TRUE);
+      call EOCInterrupt.clear();
+      call EOCInterrupt.enable();
+    }
+
+    call PressureSensor.powerUp();
+
+    TOSH_uwait(15000);  // power-on startup time
+
+    post cal();
+
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop(){
+    call EOCInterrupt.disable();
+
+    call PressureSensor.powerDown();
+
+    call EOCInterrupt.clear();
+
+    TOSH_CLR_ADC_1_PIN();   // disable the i2c bus
+    
+    return SUCCESS;
+  }
+
+  command void PressureSensor.disableBus(){
+    call HplI2C.disableI2C();
+    call EOCInterrupt.disable();
+
+    call EOCInterrupt.clear();
+
+    //    TOSH_CLR_ADC_1_PIN();   // disable the i2c bus
+  }
+
+  command void PressureSensor.enableBus(){
+    TOSH_SET_ADC_1_PIN();   // this is a pull-up to enable the i2c bus
+
+    call HplI2C.setModeI2C(&msp430_i2c_my_config);
+
+    call EOCInterrupt.clear();
+    call EOCInterrupt.enable();
+  }
+
+  command void PressureSensor.powerUp(){
+    TOSH_SET_ADC_2_PIN();   // out of reset
+  }
+
+  command void PressureSensor.powerDown(){
+    TOSH_CLR_ADC_2_PIN();   // reset
+  }
+
+  void readReg(uint8_t reg_addr, uint8_t size){
+    // first we have to write the unary register address
+    uint8_t ra = reg_addr;
+
+    operatingState = WAITING_ON_REG;
+    bytesToRead = size;
+
+    call I2CPacket.write(I2C_START | I2C_STOP, 0x77, 1, &ra);
+  }
+  
+  error_t writeReg(uint8_t reg_addr, uint8_t val) {
+    uint8_t packet[2];
+
+    // pack the packet with address of reg target, then register value
+    packet[0] = reg_addr;
+    packet[1] = val;
+
+    // write addr is 0xee, so 7-bit addr should be 77
+    return call I2CPacket.write(I2C_START | I2C_STOP, 0x77, 2, packet);
+  }
+
+  task void cleanup() {
+    readReg(regToRead, bytesToRead);
+  }
+
+  async event void EOCInterrupt.fired() {
+    call EOCInterrupt.clear();
+    
+    post cleanup();
+  }
+
+  command void PressureSensor.readTemperature() {
+    operatingState = NORMAL;
+
+    regToRead = 0xf6;
+    bytesToRead = 2;
+
+    writeReg(0xf4, 0x2e);
+  }
+    
+  command void PressureSensor.readPressure(){
+    uint8_t pressureMode;
+
+    pressureMode = 0x34 + (oss << 6);
+    operatingState = NORMAL;
+    
+    regToRead = 0xf6;
+    bytesToRead = 3;
+
+    writeReg(0xf4, pressureMode);
+  }
+
+  task void calc_temp() {
+    x1 = (ut - AC6) * AC5 >> 15;
+    x2 = ((int32_t)MC  << 11) / (x1 + (int32_t)MD);
+    b5 = x1 + x2;
+    temp = (b5 + 8) >> 4;
+
+    signal PressureSensor.tempAvailable(&temp);
+  }    
+
+  task void calc_press() {
+    b6 = b5 - 4000;
+    x1 = (int32_t)B2 * (b6 * b6 >> 12) >> 11;
+    x2 = (int32_t)AC2 * b6 >> 11;
+    x3 = x1 + x2;
+    b3 = (((((int32_t)AC1 << 2) + x3) << oss) + 2) >> 2;
+    x1 = (int32_t)AC3 * b6 >> 13;
+    x2 = (int32_t)B1 * (b6 * b6 >> 12) >> 16;
+    x3 = (x1 + x2 + 2) >> 2;
+    b4 = (uint32_t)AC4 * (uint32_t)(x3 + 32768) >> 15;
+    b7 = (uint32_t)(up - b3) * (50000 >> oss);
+
+    if(b7  < 0x80000000UL)
+      press = (b7 << 1) / b4;
+    else
+      press = b7 / b4 << 1;
+    x1 = (press >> 8) * (press >> 8);
+    x1 = x1 * 3038 >> 16;
+    x2 = -7357 * press >> 16;
+
+    press = press + ((x1 + x2 + 3791) >> 4);
+
+    signal PressureSensor.pressAvailable(&press);
+  }
+
+  task void store_cal(){
+    uint16_t * src;
+    
+    src = sbuf0;
+    AC1 = *(int16_t *)src++;
+    AC2 = *(int16_t *)src++;
+    AC3 = *(int16_t *)src++;
+    AC4 = *src++;
+    AC5 = *src++;
+    AC6 = *src++;
+    B1 = *(int16_t *)src++;
+    B2 = *(int16_t *)src++;
+    MB = *(int16_t *)src++;
+    MC = *(int16_t *)src++;
+    MD = *(int16_t *)src++;
+  }
+
+  task void collect_data() {
+    register uint8_t i;
+    uint16_t * src, * dest;
+    uint8_t swapbuff[128];
+    uint8_t pressureData[3];
+
+    // temp
+    if(bytesRead == 2){
+      src = swapbuff;
+      *(swapbuff + 1) = *readbuff;
+      *swapbuff = *(readbuff + 1);
+      ut = *src;
+
+      post calc_temp();
+    }
+    // pressure
+    else if(bytesRead == 3){
+      *pressureData = *readbuff;
+      *(pressureData + 1) = *(readbuff + 1);
+      *(pressureData + 2) = *(readbuff + 2);
+      up = ((uint32_t)*pressureData << 16 | (uint32_t)*(pressureData + 1) << 8 | *(pressureData + 2)) >> (8 - oss);
+
+      post calc_press();
+    }
+    // calibration
+    else if(!(bytesRead % 2)){
+      src = swapbuff;
+      dest = sbuf0;
+      for(i = 0; i < bytesRead; i+=2){
+	*(swapbuff + i + 1) = *(readbuff + i);
+	*(swapbuff + i) = *(readbuff + i + 1);
+	*dest++ = *src++;
+      }
+      post store_cal();
+    }
+  }
+
+  /*
+   * 0 = ultra low power; power ~3uA, conversion time 4.5ms
+   * 1 = standard       ; power ~5uA, conversion time 7.5ms
+   * 2 = high res       ; power ~7uA, conversion time 13.5ms
+   * 3 = ultra high res ; power ~12uA, conversion time 25.5ms
+   */
+  command void PressureSensor.setSensingMode(uint8_t mode){
+    oss = mode;
+  }
+
+  async event void I2CPacket.readDone(error_t _success, uint16_t _addr, uint8_t _length, uint8_t* _data) { 
+    bytesRead = _length;
+    memcpy(readbuff, _data, _length);
+    post collect_data();
+  }
+
+  async event void I2CPacket.writeDone(error_t _success, uint16_t _addr, uint8_t _length, uint8_t* _data) { 
+    if(operatingState == WAITING_ON_REG){
+      call I2CPacket.read(I2C_START | I2C_STOP, 0x77, bytesToRead, readbuff);
+      operatingState = NORMAL;
+    }
+  }
+
+  async event void UsartInterrupts.rxDone( uint8_t data ) {}
+  async event void UsartInterrupts.txDone() {}
+  async event void I2CInterrupts.fired() {}
+
+  /*
+  // these will trigger from the i2civ, but separate interrupts are available in i2cifg (separate enable, too).
+  async event void I2CEvents.arbitrationLost() { }
+  async event void I2CEvents.noAck() { }
+  async event void I2CEvents.ownAddr() { }
+  async event void I2CEvents.readyRegAccess() { }
+  async event void I2CEvents.readyRxData() { }
+  async event void I2CEvents.readyTxData() { }
+  async event void I2CEvents.generalCall() { }
+  async event void I2CEvents.startRecv() { }
+  */
+}
+  
+
+
+
+
+
diff --git a/tos/platforms/shimmer2/chips/bmp085/PressureSensor.nc b/tos/platforms/shimmer2/chips/bmp085/PressureSensor.nc
new file mode 100644
index 00000000..a558dfce
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/bmp085/PressureSensor.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   September, 2010
+ *
+ */
+
+interface PressureSensor { 
+  command void powerUp();
+
+  command void powerDown();
+
+  /*
+   * range 0 to 3, lowest power to highest resolution
+   * see driver for details
+   */
+  command void setSensingMode(uint8_t mode);
+
+  command void readTemperature();
+  command void readPressure();
+
+  command void disableBus();
+  command void enableBus();
+
+  event void tempAvailable(int16_t * data);
+  event void pressAvailable(int32_t * data);
+}
diff --git a/tos/platforms/shimmer2/chips/bmp085/PressureSensorC.nc b/tos/platforms/shimmer2/chips/bmp085/PressureSensorC.nc
new file mode 100644
index 00000000..abc528ed
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/bmp085/PressureSensorC.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   November, 2010
+ */
+
+
+configuration PressureSensorC {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface PressureSensor;
+  }
+}
+
+implementation {
+  components Bmp085P;
+  Init           = Bmp085P;
+  StdControl     = Bmp085P;
+  PressureSensor = Bmp085P;
+
+  /*
+  components LedsC;
+  Bmp085P.Leds -> LedsC;
+  */
+  enum {
+    CLIENT_ID = unique( MSP430_I2CO_BUS ),
+  };
+
+  components Msp430I2CP;        // this is mine, ported from tos-1.x; find it in shimmer/chips/msp430
+  Bmp085P.I2CPacket -> Msp430I2CP.I2CBasicAddr;
+
+  components HplMsp430I2C0C;
+  Bmp085P.HplI2C -> HplMsp430I2C0C;
+  Msp430I2CP.HplI2C -> HplMsp430I2C0C;
+
+  components HplMsp430Usart0C;
+  Msp430I2CP.I2CInterrupts -> HplMsp430Usart0C;
+
+  components HplMsp430InterruptP;
+  Bmp085P.EOCInterrupt -> HplMsp430InterruptP.Port13;
+
+  components HplMsp430GeneralIOC as GpioC; 
+  Bmp085P.Msp430GeneralIO -> GpioC.Port13;
+}
+
diff --git a/tos/platforms/shimmer2/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/shimmer2/chips/cc2420/HplCC2420AlarmC.nc
new file mode 100644
index 00000000..b3d3f547
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/cc2420/HplCC2420AlarmC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of 32khz alarms for the ChipCon CC2420 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2009-10-21 18:13:22 $
+ */
+
+generic configuration HplCC2420AlarmC() {
+
+  provides interface Init;
+  provides interface Alarm<T32khz,uint32_t> as Alarm32khz32;
+
+}
+
+implementation {
+
+  components new Alarm32khz32C();
+
+  Init = Alarm32khz32C;
+  Alarm32khz32 = Alarm32khz32C;
+  
+}
diff --git a/tos/platforms/shimmer2/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/shimmer2/chips/cc2420/HplCC2420InterruptsC.nc
new file mode 100644
index 00000000..1f3d256f
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/cc2420/HplCC2420InterruptsC.nc
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of interrupts and captures for the ChipCon
+ * CC2420 radio connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.3 $ $Date: 2010-01-20 18:17:32 $
+ */
+/**
+ * Ported to the SHIMMER platform. 
+ *
+ * @author Konrad Lorincz
+ * @date May 14, 2008
+ * re-written to use interrupt-driven sfd capture; 
+ * shimmer2 does not have sfd wired to a timer pin
+ * @author Steve Ayer
+ * @date January, 2010
+ */
+
+configuration HplCC2420InterruptsC {
+
+  provides interface GpioCapture as CaptureSFD;
+  provides interface GpioInterrupt as InterruptSFD;
+
+  provides interface GpioInterrupt as InterruptCCA;
+  provides interface GpioInterrupt as InterruptFIFOP;
+
+}
+
+implementation {
+
+  components HplMsp430InterruptC;
+  components new Msp430InterruptC() as InterruptCCAC;
+  components new Msp430InterruptC() as InterruptFIFOPC;
+  components new Msp430InterruptC() as InterruptSFDC;
+
+  InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port27;
+  InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port12;
+  InterruptSFDC.HplInterrupt -> HplMsp430InterruptC.Port10;
+
+  components HplCC2420InterruptsP;
+  components Counter32khz16C;
+  components new GpioCaptureC() as CaptureSFDC;
+  components HplCC2420PinsC;
+
+  CaptureSFD = HplCC2420InterruptsP.CaptureSFD;
+
+  HplCC2420InterruptsP.InterruptSFD ->  InterruptSFDC.Interrupt;
+  HplCC2420InterruptsP.Counter      -> Counter32khz16C;
+
+  InterruptCCA = InterruptCCAC.Interrupt;
+  InterruptFIFOP = InterruptFIFOPC.Interrupt;
+  InterruptSFD = InterruptSFDC.Interrupt;
+}
diff --git a/tos/platforms/shimmer2/chips/cc2420/HplCC2420InterruptsP.nc b/tos/platforms/shimmer2/chips/cc2420/HplCC2420InterruptsP.nc
new file mode 100644
index 00000000..6f1dd995
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/cc2420/HplCC2420InterruptsP.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   January, 2010
+ *
+ * this implements an interrupt-driven capture interface for the cc2420
+ * tx-mode use of sfd.  shimmer2 does not have sfd routed to a timer pin
+ * on the msp430, so cc2420's capture mechanism fails.  
+ * this module will trigger a capture.captured event after receiving the
+ * appropriate interrupt from the shimmer2 sfd pin (1.0)
+ */
+
+module HplCC2420InterruptsP @safe() {
+  provides{
+    interface GpioCapture as CaptureSFD;
+  }
+
+  uses{
+    interface GpioInterrupt as InterruptSFD;
+    interface Counter<T32khz,uint16_t>;
+  }
+}
+
+implementation {
+  async command error_t CaptureSFD.captureRisingEdge() { 
+    call InterruptSFD.enableRisingEdge();
+    return SUCCESS;
+  }
+
+  async command error_t CaptureSFD.captureFallingEdge() { 
+    call InterruptSFD.enableFallingEdge();
+    return SUCCESS;
+  }
+  
+  async command void CaptureSFD.disable() {
+    call InterruptSFD.disable();
+  }
+
+  async event void InterruptSFD.fired() {
+    uint16_t t = call Counter.get();
+
+    signal CaptureSFD.captured(t);
+  }
+
+  async event void Counter.overflow() { }
+}
+
diff --git a/tos/platforms/shimmer2/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/shimmer2/chips/cc2420/HplCC2420PinsC.nc
new file mode 100644
index 00000000..7cb502a9
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/cc2420/HplCC2420PinsC.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of general-purpose I/O for the ChipCon CC2420
+ * radio connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2009-10-21 18:13:22 $
+ */
+/**
+ * Ported to the SHIMMER platform. 
+ *
+ * @author Konrad Lorincz
+ * @date May 14, 2008
+ */
+
+configuration HplCC2420PinsC {
+
+  provides interface GeneralIO as CCA;
+  provides interface GeneralIO as CSN;
+  provides interface GeneralIO as FIFO;
+  provides interface GeneralIO as FIFOP;
+  provides interface GeneralIO as RSTN;
+  provides interface GeneralIO as SFD;
+  provides interface GeneralIO as VREN;
+
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components new Msp430GpioC() as CCAM;
+  components new Msp430GpioC() as CSNM;
+  components new Msp430GpioC() as FIFOM;
+  components new Msp430GpioC() as FIFOPM;
+  components new Msp430GpioC() as RSTNM;
+  components new Msp430GpioC() as SFDM;
+  components new Msp430GpioC() as VRENM;
+
+  CCAM -> GeneralIOC.Port27;
+  CSNM -> GeneralIOC.Port54;
+  FIFOM -> GeneralIOC.Port15;
+  FIFOPM -> GeneralIOC.Port12;
+  RSTNM -> GeneralIOC.Port57;
+  SFDM -> GeneralIOC.Port10;
+  VRENM -> GeneralIOC.Port56;
+
+  CCA = CCAM;
+  CSN = CSNM;
+  FIFO = FIFOM;
+  FIFOP = FIFOPM;
+  RSTN = RSTNM;
+  SFD = SFDM;
+  VREN = VRENM;
+  
+}
+
diff --git a/tos/platforms/shimmer2/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/shimmer2/chips/cc2420/HplCC2420SpiC.nc
new file mode 100644
index 00000000..f1eee6cb
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/cc2420/HplCC2420SpiC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of the SPI bus for the ChipCon CC2420 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2009-10-21 18:13:22 $
+ */
+/**
+ * Ported to the SHIMMER platform. 
+ *
+ * @author Konrad Lorincz
+ */
+
+generic configuration HplCC2420SpiC() {
+  
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+  
+}
+
+implementation {
+
+  components new Msp430Spi1C() as SpiC;
+  
+  Resource = SpiC;
+  SpiByte = SpiC;
+  SpiPacket = SpiC;
+  
+}
+
diff --git a/tos/platforms/shimmer2/chips/fgpmmopa6b/Fgpmmopa6bP.nc b/tos/platforms/shimmer2/chips/fgpmmopa6b/Fgpmmopa6bP.nc
new file mode 100644
index 00000000..acf609da
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/fgpmmopa6b/Fgpmmopa6bP.nc
@@ -0,0 +1,174 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   September, 2010
+ */
+
+module Fgpmmopa6bP {
+  provides {
+    interface Init;
+    interface Gps;
+  }
+  uses { 
+    interface HplMsp430Usart as UARTControl;
+    interface HplMsp430UsartInterrupts as UARTData;
+  }
+}
+
+implementation {
+  extern int sprintf(char *str, const char *format, ...) __attribute__ ((C));
+
+  char databuf0[256], databuf1[256], * scout, cmdstring[128];
+  uint8_t current_buffer, toSend, charsSent; 
+  bool transmissionComplete;
+
+  task void send_command();
+
+  task void setupUART() {
+    msp430_uart_union_config_t RN_uart_config = { 
+      { ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, 
+	ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, 
+	listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 0, 
+	urxwie: 0,  utxe : 1, urxe :1 } 
+    };
+
+    call UARTControl.setModeUart(&RN_uart_config); // set to UART mode
+
+    call UARTControl.enableTxIntr();
+    call UARTControl.enableRxIntr();
+  }
+
+  command error_t Init.init() {
+    TOSH_CLR_PROG_OUT_PIN();
+
+    TOSH_MAKE_ADC_6_INPUT();
+
+    transmissionComplete = FALSE;
+
+    post setupUART();
+
+    call Gps.enable();
+
+    return SUCCESS;
+  }
+
+  command void Gps.enable() {
+    scout = databuf0;
+    current_buffer = 0;
+
+    TOSH_SET_PROG_OUT_PIN();
+  }
+
+  command void Gps.disable() {
+    TOSH_CLR_PROG_OUT_PIN();
+  }
+
+  command void Gps.disableBus(){
+    call UARTControl.disableUart();
+  }
+
+  command void Gps.enableBus(){
+    post setupUART();
+  }
+
+  uint8_t byteCRC(char * str) 
+  {
+    register uint8_t i;
+    uint8_t sum = 0, len;
+    
+    len = strlen(str);
+
+    for(i = 0; i < len; i++)
+      sum = sum ^ *(str + i);
+    
+    return sum;
+  }
+
+  // datarate in milliseconds, min 100
+  command void Gps.setDatarate(uint16_t datarate) { 
+    uint8_t crc;
+    char cmd[128];
+
+    sprintf(cmd, "$PMTK300,%d,0,0,0,0", datarate);
+    crc = byteCRC(cmd + 1);
+    sprintf(cmdstring, "%s*%02X\r\n", cmd, crc);
+
+    post send_command();
+  }
+
+  task void tell_app() {
+    if(current_buffer == 0)
+      signal Gps.NMEADataAvailable(databuf1);
+    else
+      signal Gps.NMEADataAvailable(databuf0);
+  }
+
+  async event void UARTData.rxDone(uint8_t data) {        
+    *scout = data;
+    scout++;
+
+    if(*(scout - 1) == '\n'){
+      *(scout - 2) = '\0';
+
+      if(current_buffer == 0){
+	scout = databuf1;
+	current_buffer = 1;
+      }
+      else{
+	scout = databuf0;
+	current_buffer = 0;
+      }
+
+      post tell_app();
+    }
+  }
+
+  task void sendOneChar() {
+    if(charsSent < toSend)
+      call UARTControl.tx(cmdstring[charsSent++]);
+    else{
+      transmissionComplete = TRUE;
+    }
+  }
+
+  task void send_command() {
+    toSend = strlen(cmdstring) + 1;
+    charsSent = 0;
+    transmissionComplete = FALSE;
+    post sendOneChar();
+  }
+ 
+  async event void UARTData.txDone() {
+    if(!transmissionComplete) {
+      post sendOneChar();
+    }
+  }
+}
diff --git a/tos/platforms/shimmer2/chips/fgpmmopa6b/Gps.nc b/tos/platforms/shimmer2/chips/fgpmmopa6b/Gps.nc
new file mode 100644
index 00000000..4752ae5d
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/fgpmmopa6b/Gps.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   September, 2010
+ */
+
+interface Gps {
+  
+  command void enable();
+  
+  command void disable();
+  
+  command void setDatarate(uint16_t datarate);  
+
+  command void disableBus();
+  command void enableBus();
+
+  async event void NMEADataAvailable(char * data);
+}
diff --git a/tos/platforms/shimmer2/chips/fgpmmopa6b/GpsC.nc b/tos/platforms/shimmer2/chips/fgpmmopa6b/GpsC.nc
new file mode 100644
index 00000000..2e12e186
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/fgpmmopa6b/GpsC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   September, 2010
+ */
+
+configuration GpsC {
+  provides {
+    interface Init;
+    interface Gps;
+  }
+}
+
+implementation {
+  components Fgpmmopa6bP;
+
+  Init       = Fgpmmopa6bP;
+  Gps        = Fgpmmopa6bP;
+
+  components HplMsp430Usart0C;
+  Fgpmmopa6bP.UARTControl -> HplMsp430Usart0C;
+  Fgpmmopa6bP.UARTData    -> HplMsp430Usart0C;
+}
diff --git a/tos/platforms/shimmer2/chips/gyro/GyroBoard.nc b/tos/platforms/shimmer2/chips/gyro/GyroBoard.nc
new file mode 100644
index 00000000..665ef89f
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/gyro/GyroBoard.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author  Steve Ayer
+ * @date    August 2009
+ *
+ * tinyos-2.x port
+ * @date    March, 2010
+ * 
+ */
+
+interface GyroBoard {
+  // no explicit enable/disable, use stdcontrol.
+
+  // it has its own
+  command void ledOn();
+  command void ledOff();
+  command void ledToggle();
+
+  command void autoZero();
+
+  // it has its own, just a reflection of UserButton.fired(), which is debounced
+  async event void buttonPressed();
+}
+
+
+
+
diff --git a/tos/platforms/shimmer2/chips/gyro/GyroBoardC.nc b/tos/platforms/shimmer2/chips/gyro/GyroBoardC.nc
new file mode 100644
index 00000000..902508ae
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/gyro/GyroBoardC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author  Steve Ayer
+ * @date    August 2009
+ *
+ * tinyos-2.x port
+ * @date    March, 2010
+ */
+
+configuration GyroBoardC {
+  provides{
+    interface Init;
+    interface StdControl;
+    interface GyroBoard;
+  }
+}
+
+implementation {
+  components GyroBoardP;
+  Init       = GyroBoardP;
+  StdControl = GyroBoardP;
+  GyroBoard  = GyroBoardP;
+
+  components GyroButtonC;
+  GyroBoardP.buttonNotify -> GyroButtonC;
+}
+
diff --git a/tos/platforms/shimmer2/chips/gyro/GyroBoardP.nc b/tos/platforms/shimmer2/chips/gyro/GyroBoardP.nc
new file mode 100644
index 00000000..a60ed603
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/gyro/GyroBoardP.nc
@@ -0,0 +1,161 @@
+/*
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author  Steve Ayer
+ * @date    August, 2009
+ *
+ * tinyos-2.x port
+ * @date    March, 2010
+ * 
+ */
+
+#include <UserButton.h>
+
+module GyroBoardP {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface GyroBoard;
+  }
+  uses{
+    interface Notify<button_state_t> as buttonNotify;
+  }
+}
+
+implementation {
+  command error_t Init.init(){
+    register uint16_t i;
+
+    // power, active low
+    TOSH_MAKE_PROG_OUT_OUTPUT();   
+    TOSH_SEL_PROG_OUT_IOFUNC();
+    TOSH_SET_PROG_OUT_PIN();    // off
+
+    // analog signal enable, active low
+    TOSH_MAKE_SER0_CTS_OUTPUT();
+    TOSH_SEL_SER0_CTS_IOFUNC();
+    TOSH_SET_SER0_CTS_PIN();    // signal disabled
+
+    // signal goes to gyro-zero pins
+    TOSH_MAKE_UTXD0_OUTPUT();
+    TOSH_SEL_UTXD0_IOFUNC();
+    TOSH_CLR_UTXD0_PIN();
+
+    // this one tied to the led
+    TOSH_MAKE_URXD0_OUTPUT();
+    TOSH_SEL_URXD0_IOFUNC();
+    call GyroBoard.ledOff();
+
+    // x
+    TOSH_MAKE_ADC_1_INPUT();         
+    TOSH_SEL_ADC_1_MODFUNC();
+
+    // y
+    TOSH_MAKE_ADC_6_INPUT();         
+    TOSH_SEL_ADC_6_MODFUNC();
+
+    // z
+    TOSH_MAKE_ADC_2_INPUT();         
+    TOSH_SEL_ADC_2_MODFUNC();
+
+    /*
+     * gyro power-down after start-up transients, which are particularly rough during programming
+     * we're waiting for caps to discharge...
+     */
+    for(i = 0; i < 6000; i++)
+      TOSH_uwait(1000);
+
+    // now power it up, max ready-time 200ms
+    TOSH_CLR_PROG_OUT_PIN();
+
+    for(i = 0; i < 200; i++)
+      TOSH_uwait(1000);
+
+    call buttonNotify.enable();
+ 
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start(){
+    call buttonNotify.enable();
+    /*
+     * adding a redundant power-up for apps that power cycle the gyro mid-course to save current
+     * since we're past the initial on-dock programming, gyro should power back up gracefully
+     */
+    TOSH_CLR_PROG_OUT_PIN();     
+
+    // enable analog signal path
+    TOSH_CLR_SER0_CTS_PIN();     
+
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop(){
+    // disable analog signals, then power down
+    TOSH_SET_SER0_CTS_PIN();   
+    TOSH_SET_PROG_OUT_PIN();
+
+    // kill the led
+    call GyroBoard.ledOff();
+    call buttonNotify.disable();
+
+    return SUCCESS;
+  }
+
+  command void GyroBoard.autoZero() {
+    TOSH_SET_UTXD0_PIN();
+    
+    TOSH_uwait(100);  // pulse between 2 (!) and 1500 usec
+    
+    TOSH_CLR_UTXD0_PIN();
+
+    TOSH_uwait(6900);  // takes 7ms to settle
+  }
+
+  command void GyroBoard.ledOn() {
+    TOSH_CLR_URXD0_PIN();
+  }
+
+  command void GyroBoard.ledOff() {
+    TOSH_SET_URXD0_PIN();
+  }
+
+  command void GyroBoard.ledToggle() {
+    TOSH_TOGGLE_URXD0_PIN();
+  }
+
+  event void buttonNotify.notify( button_state_t val){
+    signal GyroBoard.buttonPressed();
+  }
+}
+
+
+
+
diff --git a/tos/platforms/shimmer2/chips/gyro/GyroButtonC.nc b/tos/platforms/shimmer2/chips/gyro/GyroButtonC.nc
new file mode 100644
index 00000000..2b8cb3f1
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/gyro/GyroButtonC.nc
@@ -0,0 +1,65 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telosb platform. Get
+ * returns the current state of the button by reading the pin,
+ * regardless of whether enable() or disable() has been called on the
+ * Interface. Notify.enable() and Notify.disable() modify the
+ * underlying interrupt state of the pin, and have the effect of
+ * enabling or disabling notifications that the button has changed
+ * state.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ * port to shimmer-style
+ * @author Steve Ayer
+ * @date   February, 2010
+ */
+
+#include <UserButton.h>
+
+configuration GyroButtonC {
+  provides interface Notify<button_state_t>;
+}
+implementation {
+  components HplGyroButtonC;
+  components new SwitchToggleC();
+  SwitchToggleC.GpioInterrupt -> HplGyroButtonC.GpioInterrupt;
+  SwitchToggleC.GeneralIO -> HplGyroButtonC.GeneralIO;
+
+  components UserButtonP;
+  Notify = UserButtonP;
+
+  components new TimerMilliC() as debounceTimer;
+  UserButtonP.NotifyLower -> SwitchToggleC.Notify;
+  UserButtonP.debounceTimer -> debounceTimer;
+}
diff --git a/tos/platforms/shimmer2/chips/gyro/HplGyroButtonC.nc b/tos/platforms/shimmer2/chips/gyro/HplGyroButtonC.nc
new file mode 100644
index 00000000..2460a3de
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/gyro/HplGyroButtonC.nc
@@ -0,0 +1,57 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telos platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $
+ * (not much to) port to shimmer2 gyro
+ * @author Steve Ayer
+ * @date March, 2010
+ */
+
+configuration HplGyroButtonC {
+  provides interface GeneralIO;
+  provides interface GpioInterrupt;
+}
+implementation {
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components HplMsp430InterruptC as InterruptC;
+
+  components new Msp430GpioC() as UserButtonC;
+  UserButtonC -> GeneralIOC.Port13;
+  GeneralIO = UserButtonC;
+
+  components new Msp430InterruptC() as InterruptUserButtonC;
+  InterruptUserButtonC.HplInterrupt -> InterruptC.Port13;
+  GpioInterrupt = InterruptUserButtonC.Interrupt;
+}
diff --git a/tos/platforms/shimmer2/chips/gyromag/GyroMagBoard.nc b/tos/platforms/shimmer2/chips/gyromag/GyroMagBoard.nc
new file mode 100644
index 00000000..7be0e98f
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/gyromag/GyroMagBoard.nc
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author  Steve Ayer
+ * @date    March, 2010
+ */
+
+interface GyroMagBoard {
+  // gyroboard stuff first
+  command void ledOn();
+  command void ledOff();
+  command void ledToggle();
+
+  // for gyro, use use GyroStdControl, see platform's GyroMagBoardC
+  command void gyroAutoZero();
+
+  // magnetometer uses its own stdcontrol, see platform's GyroMagBoardC
+
+  // 0.5, 1, 2, 5, 10 (default), 20, 50hz.  20 and 50 up power burn dramatically
+  command error_t setMagOutputRate(uint8_t rate);
+
+  // +-0.7, 1.0 (default), 1.5, 2.0, 3.2, 3.8, 4.5Ga
+  command error_t setMagGain(uint8_t gain);
+
+  command error_t setMagIdle();
+  command error_t magGoToSleep();
+
+  command error_t magRunSingleConversion();
+
+  command error_t magRunContinuousConversion();
+
+  // call to clock out data; collect it from the "done" event
+  command error_t readMagData();
+
+  // convert raw data to heading
+  command uint16_t readMagHeading(uint8_t * readBuf);
+
+  // read result after readdone event
+  command void magSelfTest();
+
+  // call this to see three-axis magnetometer values
+  command void convertMagRegistersToData(uint8_t * readBuf, int16_t * data);
+
+  // this is where the app will find its mag readings
+  event void magReadDone(uint8_t * data, error_t success);
+  
+  event void magWriteDone(error_t success);
+
+  // it has its own, just a reflection of UserButton.fired(), which is debounced
+  async event void buttonPressed();
+
+  //  event void magReady();
+
+  command void writeReg(uint8_t reg_addr, uint8_t val);
+  
+  //  command error_t readValues(uint8_t reg_addr, uint8_t size, uint8_t * data);
+  //  command error_t readValues(uint8_t size, uint8_t * data);
+
+  //  command error_t poke(uint8_t val);
+  //  command error_t peek(uint8_t * val);
+
+}
+
+
+
+
diff --git a/tos/platforms/shimmer2/chips/gyromag/GyroMagBoardC.nc b/tos/platforms/shimmer2/chips/gyromag/GyroMagBoardC.nc
new file mode 100644
index 00000000..a88e648a
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/gyromag/GyroMagBoardC.nc
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   March, 2010
+ *
+ * @author Steve Ayer
+ * @date   July, 2010
+ * tos-2.x port
+ *
+ * wiring to msp430 i2c implmentation to flesh out gyro/mag board on shimmer2
+ * using direct module because we don't need arbitration for this platform.
+ * note gyro implementation is used for everything except mag
+ */
+
+configuration GyroMagBoardC {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface GyroMagBoard;
+  }
+}
+
+implementation {
+  components GyroMagBoardP;
+  Init = GyroMagBoardP;
+  StdControl = GyroMagBoardP;
+  GyroMagBoard = GyroMagBoardP;
+
+  components LedsC;
+  GyroMagBoardP.Leds          -> LedsC;
+
+  components new TimerMilliC() as testTimer;
+  GyroMagBoardP.testTimer     -> testTimer;
+
+  enum {
+    CLIENT_ID = unique( MSP430_I2CO_BUS ),
+  };
+
+  components Msp430I2CP;  // this is mine, ported from tos-1.x; find it in shimmer/chips/msp430
+  GyroMagBoardP.I2CPacket -> Msp430I2CP.I2CBasicAddr;
+  HplMsp430Usart0P.HplI2C -> HplMsp430I2C0P.HplI2C;
+
+  components HplMsp430I2C0P;
+  GyroMagBoardP.HplI2C -> HplMsp430I2C0P.HplI2C;
+  Msp430I2CP.HplI2C -> HplMsp430I2C0P.HplI2C;
+
+  components HplMsp430Usart0P;
+  HplMsp430I2C0P.HplUsart  -> HplMsp430Usart0P.Usart;
+  Msp430I2CP.I2CInterrupts -> HplMsp430Usart0P.I2CInterrupts;
+
+  components HplMsp430GeneralIOC as GIO;
+  HplMsp430Usart0P.SIMO -> GIO.SIMO0;
+  HplMsp430Usart0P.SOMI -> GIO.SOMI0;
+  HplMsp430Usart0P.UCLK -> GIO.UCLK0;
+  HplMsp430Usart0P.UTXD -> GIO.UTXD0;
+  HplMsp430Usart0P.URXD -> GIO.URXD0;
+
+  HplMsp430I2C0P.SIMO -> GIO.SIMO0;
+  HplMsp430I2C0P.UCLK -> GIO.UCLK0;
+
+  components GyroBoardC;  
+  GyroMagBoardP.GyroBoard -> GyroBoardC.GyroBoard;
+  GyroMagBoardP.GyroInit  -> GyroBoardC.Init;
+  GyroMagBoardP.GyroStdControl -> GyroBoardC.StdControl;
+}
+
diff --git a/tos/platforms/shimmer2/chips/gyromag/GyroMagBoardP.nc b/tos/platforms/shimmer2/chips/gyromag/GyroMagBoardP.nc
new file mode 100644
index 00000000..47b3efde
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/gyromag/GyroMagBoardP.nc
@@ -0,0 +1,404 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * @author Steve Ayer
+ * @date March, 2010
+ *
+ * this module adds functionality of honeywell hmc5843 magnetometer
+ * to similar gyro board (idg-500 3-axis plus user button and led)
+ *
+ * since gyro board is stand-alone, this module uses existing gyro module
+ * and interface for everything but magnetometer.
+ */
+
+#include "Magnetometer.h"
+
+module GyroMagBoardP {
+  provides {
+    interface Init;
+    interface StdControl;
+    interface GyroMagBoard;
+  }
+  uses {
+    interface GyroBoard;
+
+    interface I2CPacket<TI2CBasicAddr> as I2CPacket;
+
+    interface HplMsp430I2C as HplI2C;
+    interface HplMsp430Usart as Usart;
+    interface HplMsp430UsartInterrupts as UsartInterrupts;
+    interface HplMsp430I2CInterrupts as I2CInterrupts;
+
+    interface Init as GyroInit;
+    interface StdControl as GyroStdControl;
+    interface Leds;
+    interface Timer<TMilli> as testTimer;
+  }
+}
+
+implementation {
+  extern int sprintf(char *str, const char *format, ...) __attribute__ ((C));
+  extern int snprintf(char *str, size_t len, const char *format, ...) __attribute__ ((C));
+
+  uint8_t readbuff[7], testPhase;
+  uint8_t packet[2], readSize, * readDataBuffer;
+
+  enum {
+    INIT,
+    WRITE,
+    READ,
+    IDLE,
+  };
+
+  command error_t Init.init() {
+    msp430_i2c_union_config_t msp430_i2c_my_config = { 
+      {
+	rxdmaen : 0, 
+	txdmaen : 0, 
+	xa : 0, 
+	listen : 0, 
+	mst : 1,
+	i2cword : 0, 
+	i2crm : 1, 
+	i2cssel : 0x2, 
+	i2cpsc : 0, 
+	i2csclh : 0x3, 
+	i2cscll : 0x3,
+	i2coa : 0,
+      } 
+    };
+
+    
+    /*
+     * same power pin as gyro regulator, this will bring up second power pin (first tied to
+     * shimmer regulator).  it turns on in idle mode
+     */
+    call GyroInit.init();
+
+    call HplI2C.setModeI2C(&msp430_i2c_my_config);
+
+    testPhase = 0;
+
+    return SUCCESS;
+  }
+
+  command error_t StdControl.start(){
+    call GyroStdControl.start();
+
+    // mag ready time nominally 5ms, though we have lots of lag in gyro power-up called in init
+    //    TOSH_uwait(5000UL);
+
+    return SUCCESS;
+  }
+
+  command error_t StdControl.stop(){
+    call GyroStdControl.stop();
+
+    return SUCCESS;
+  }
+
+  // GyroBoard wrappers
+  command void GyroMagBoard.ledOn() {
+    call GyroBoard.ledOn();
+  }
+  command void GyroMagBoard.ledOff() {
+    call GyroBoard.ledOff();
+  }
+  command void GyroMagBoard.ledToggle() {
+    call GyroBoard.ledToggle();
+  }
+
+  async event void GyroBoard.buttonPressed() {
+    signal GyroMagBoard.buttonPressed();
+  }
+
+  // for gyro, use use GyroStdControl, see platform's GyroMagBoardC
+  command void GyroMagBoard.gyroAutoZero() {
+    call GyroBoard.autoZero();
+  }
+  
+  error_t writeRegValue(uint8_t reg_addr, uint8_t val) {
+    //    uint8_t packet[2];
+
+    // pack the packet with address of reg target, then register value
+    packet[0] = reg_addr;
+    packet[1] = val;
+
+    call I2CPacket.write(I2C_START | I2C_STOP, 0x1e, 2, packet);
+    return SUCCESS;
+  }
+  command void GyroMagBoard.writeReg(uint8_t reg_addr, uint8_t val) {
+    writeRegValue(reg_addr, val);
+  }
+  error_t readValues(uint8_t size, uint8_t * data){
+    readSize = size;
+    readDataBuffer = data;
+
+    call I2CPacket.read(I2C_START | I2C_STOP, 0x1e, size, data);
+    return SUCCESS;
+  }
+
+  async event void UsartInterrupts.rxDone( uint8_t data ) {}
+  async event void UsartInterrupts.txDone() {}
+  async event void I2CInterrupts.fired() {}
+
+  /*
+   * 0.5, 1, 2, 5, 10 (default), 20, 50hz.  20 and 50 up power burn dramatically
+   * bits 2-4 control this, values 0 - 6 map to values above, respectively
+   * since the remainder of the register defaults to 0, we write the mask directly
+   */
+  command error_t GyroMagBoard.setMagOutputRate(uint8_t rate){
+    uint8_t ret = SUCCESS, bitmask = 0x10;  // default 10hz
+
+    switch(rate){
+    case 0:
+      bitmask = 0;
+      break;
+    case 1:
+      bitmask = 0x04;
+      break;
+    case 2:
+      bitmask = 0x08;
+      break;
+    case 3:
+      bitmask = 0x0c;
+      break;
+    case 4:
+      bitmask = 0x10;
+      break;
+    case 5:
+      bitmask = 0x14;
+      break;
+    case 6:
+      bitmask = 0x18;
+      break;
+    default:
+      ret = FAIL;  // input value unknown, using default
+      break;
+    }
+    writeRegValue(0, bitmask);
+    
+    return ret;
+  }
+
+  /*
+   * weird way to do this, but we need to leave the mag time
+   * to run tests without disabling the i2c bus with TOSH_uwait
+   *
+   * read results from readDone event
+   */
+  command void GyroMagBoard.magSelfTest(){
+    switch(testPhase++){
+    case 0:
+      call testTimer.startPeriodic(5);
+      call Leds.led1On();
+      call GyroMagBoard.writeReg(0, 0x11);
+      break;
+    case 1:
+      call Leds.led1Off();
+      call GyroMagBoard.writeReg(2, 0x01);
+      break;
+    case 2:
+      call Leds.led1On();
+      call GyroMagBoard.readMagData();
+      break;
+    case 3:
+      call Leds.led1Off();
+      call GyroMagBoard.writeReg(0, 0x10);
+      break;
+    default:
+      call testTimer.stop();
+      testPhase = 0;
+      break;
+    }
+  }
+
+  event void testTimer.fired() {
+    call GyroMagBoard.magSelfTest();
+  }
+
+  // +-0.7, 1.0 (default), 1.5, 2.0, 3.2, 3.8, 4.5Ga
+  command error_t GyroMagBoard.setMagGain(uint8_t gain){ 
+    uint8_t ret = SUCCESS, bitmask = 0x20;  // default 1.0Ga
+
+    switch(gain){
+    case 0:
+      bitmask = 0x00;
+      break;
+    case 1:
+      bitmask = 0x20;
+      break;
+    case 2:
+      bitmask = 0x40;
+      break;
+    case 5:
+      bitmask = 0x50;
+      break;
+    case 10:
+      bitmask = 0x80;
+      break;
+    case 20:
+      bitmask = 0x90;
+      break;
+    case 50:
+      bitmask = 0xc0;
+      break;
+    default:
+      ret = FAIL;  // input value unknown, using default
+      break;
+    }
+    writeRegValue(1, bitmask);
+    
+    return ret;
+  }
+
+  command error_t GyroMagBoard.setMagIdle(){
+    writeRegValue(2, 0x02);
+    return SUCCESS;
+  }
+
+  command error_t GyroMagBoard.magGoToSleep(){
+    writeRegValue(2, 0x03);
+    return SUCCESS;
+  }
+
+
+  command error_t GyroMagBoard.magRunSingleConversion(){
+    writeRegValue(2, 0x01);
+    return SUCCESS;
+  }
+    
+
+  command error_t GyroMagBoard.magRunContinuousConversion(){
+    writeRegValue(2, 0x00);
+    return SUCCESS;
+  }
+
+  /*
+   * returning the real value doesn't help; 
+   * success is measured in the magreaddone event
+   */
+  command error_t GyroMagBoard.readMagData(){
+    readValues(7, readbuff);
+    return SUCCESS;
+  }
+  
+  uint16_t mag_to_heading(uint16_t x, uint16_t y, uint16_t z)
+  {
+    uint16_t heading;
+
+    if(x == 0){
+      if(y < 0)
+	heading = 270;
+      else
+	heading = 90;
+    }
+    else if(z < 0)
+      heading = (uint16_t)(180.0 - atanf((float)y/(float)-x));
+
+    else
+      heading = (uint16_t)(180.0 - atanf((float)y/(float)x));
+    
+    return heading;
+  }
+
+  int16_t twos_comp_pack(uint8_t up, uint8_t low) 
+  {
+    int16_t out;
+    uint16_t uout;
+    
+    uout = up;
+    uout = uout << 8;
+    uout |= low;
+
+    out = (int16_t)uout;
+
+    return out;
+  }
+
+  // call this to see three-axis magnetometer values
+  command void GyroMagBoard.convertMagRegistersToData(uint8_t * readBuf, int16_t * data){
+    uint8_t * src;
+    register uint8_t i;
+
+    src = readBuf;
+
+    // this loop is just for the three 16-bit x,y,z values
+    for(i = 0; i < 3; i++){
+      data[i] = twos_comp_pack(*src, *(src + 1));
+      src += 2;
+    }
+  }    
+
+  // call after readDone event
+  command uint16_t GyroMagBoard.readMagHeading(uint8_t * readBuf){
+    int16_t realVals[3];
+    uint16_t heading;
+
+    call GyroMagBoard.convertMagRegistersToData(readBuf, realVals);
+
+    heading = mag_to_heading(realVals[0], realVals[1], realVals[2]);
+
+    return heading;
+  }
+  /*
+  error_t poke(uint8_t val) {
+    return call I2CPacket.writePacket(0x1e, 1, &val);
+  }
+  error_t peek(uint8_t * val) {
+    return call I2CPacket.readPacket(0x1e, 1, val);
+  }
+  */
+  async event void I2CPacket.readDone(error_t success, uint16_t addr, uint8_t length, uint8_t* data) {
+    signal GyroMagBoard.magReadDone(data, success);
+  }
+
+  async event void I2CPacket.writeDone(error_t success, uint16_t addr, uint8_t length, uint8_t* data) {
+    signal GyroMagBoard.magWriteDone(success);
+  }
+  /*
+  // these will trigger from the i2civ, but separate interrupts are available in i2cifg (separate enable, too).
+  async event void I2CEvents.arbitrationLost() { }
+  async event void I2CEvents.noAck() { }
+  async event void I2CEvents.ownAddr() { }
+  async event void I2CEvents.readyRegAccess() { }
+  async event void I2CEvents.readyRxData() { }
+  async event void I2CEvents.readyTxData() { }
+  async event void I2CEvents.generalCall() { }
+  async event void I2CEvents.startRecv() { }
+  */
+}
+  
+
+
+
+
+
diff --git a/tos/platforms/shimmer2/chips/gyromag/Magnetometer.h b/tos/platforms/shimmer2/chips/gyromag/Magnetometer.h
new file mode 100644
index 00000000..793649af
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/gyromag/Magnetometer.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * @author Steve Ayer
+ * @date   April, 2010
+ * 
+ * attempt to provide mneonics for honeywell HMC5843 config settings
+ */
+
+enum {
+  ZERO_7_GAUSS,
+  ONE_GAUSS,
+  ONE_5_GAUSS,
+  TWO_GAUSS,
+  THREE_2_GAUSS,
+  THREE_8_GAUSS,
+  FOUR_5_GAUSS
+};
+
+enum {
+  ZERO_5_HZ,
+  ONE_HZ,
+  TWO_HZ,
+  FIVE_HZ,
+  TEN_HZ,
+  TWENTY_HZ,
+  FIFTY_HZ
+};
+
+  
diff --git a/tos/platforms/shimmer2/chips/sd/SDC.nc b/tos/platforms/shimmer2/chips/sd/SDC.nc
new file mode 100644
index 00000000..1ab28783
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/sd/SDC.nc
@@ -0,0 +1,61 @@
+/**
+ * Copyright (c) 2005 Hewlett-Packard Company
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of the Hewlett-Packard Company nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * communicate with a micro-sd slot wired to a telosb header
+ */
+/**                                   
+ * @author Steve Ayer
+ * @date   July 2006
+ * @date   July 2009 (reworked, updated to maintained version)
+ * @date   March 2010 (reworked for shimmer2)
+ * @author Konrad Lorincz
+ * @date March 25, 2008 - ported to TOS 2.x
+ */
+
+configuration SDC {
+  provides {
+    interface SD;
+    interface StdControl;
+  }
+}
+implementation {
+  components SDP;
+  SD = SDP;
+  StdControl = SDP;
+
+  components new Msp430Usart0C();
+  SDP.Usart -> Msp430Usart0C;
+
+  components HplMsp430InterruptP;
+  SDP.DockInterrupt -> HplMsp430InterruptP.Port23;
+
+  components LedsC;
+  SDP.Leds       -> LedsC;
+}
diff --git a/tos/platforms/shimmer2/chips/tilt/HplTiltDetectorC.nc b/tos/platforms/shimmer2/chips/tilt/HplTiltDetectorC.nc
new file mode 100644
index 00000000..d3200374
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/tilt/HplTiltDetectorC.nc
@@ -0,0 +1,57 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telos platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ * (not much to) port to shimmer
+ * @author Steve Ayer
+ * @date February, 2010
+ */
+
+configuration HplTiltDetectorC {
+  provides interface GeneralIO;
+  provides interface GpioInterrupt;
+}
+implementation {
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components HplMsp430InterruptC as InterruptC;
+
+  components new Msp430GpioC() as TiltDetectorC;
+  TiltDetectorC -> GeneralIOC.Port24;
+  GeneralIO = TiltDetectorC;
+
+  components new Msp430InterruptC() as InterruptTiltDetectorC;
+  InterruptTiltDetectorC.HplInterrupt -> InterruptC.Port24;
+  GpioInterrupt = InterruptTiltDetectorC.Interrupt;
+}
diff --git a/tos/platforms/shimmer2/chips/tilt/TiltDetectorC.nc b/tos/platforms/shimmer2/chips/tilt/TiltDetectorC.nc
new file mode 100644
index 00000000..dbf5f7fb
--- /dev/null
+++ b/tos/platforms/shimmer2/chips/tilt/TiltDetectorC.nc
@@ -0,0 +1,63 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telosb platform. Get
+ * returns the current state of the button by reading the pin,
+ * regardless of whether enable() or disable() has been called on the
+ * Interface. Notify.enable() and Notify.disable() modify the
+ * underlying interrupt state of the pin, and have the effect of
+ * enabling or disabling notifications that the button has changed
+ * state.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ * port to shimmer2 tilt switch
+ * @author Steve Ayer
+ * @date   February, 2010
+ */
+
+configuration TiltDetectorC {
+  provides interface Notify<button_state_t>;
+}
+implementation {
+  components HplTiltDetectorC;
+  components new SwitchToggleC();
+  SwitchToggleC.GpioInterrupt -> HplTiltDetectorC.GpioInterrupt;
+  SwitchToggleC.GeneralIO -> HplTiltDetectorC.GeneralIO;
+
+  components UserButtonP;
+  Notify = UserButtonP;
+
+  components new TimerMilliC() as debounceTimer;
+  UserButtonP.NotifyLower -> SwitchToggleC.Notify;
+  UserButtonP.debounceTimer -> debounceTimer;
+}
diff --git a/tos/platforms/shimmer2/hardware.h b/tos/platforms/shimmer2/hardware.h
new file mode 100644
index 00000000..35a85ba4
--- /dev/null
+++ b/tos/platforms/shimmer2/hardware.h
@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2007, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steven Ayer
+ * @date   July 2007
+ */
+
+
+#ifndef _H_hardware_h
+#define _H_hardware_h
+
+#include "msp430hardware.h"
+/*
+ * these left from tos-1.x...
+ *
+ *#include "MSP430ADC12.h"
+ *
+ *#include "CC2420Const.h"
+ */
+
+
+// LEDs
+TOSH_ASSIGN_PIN(RED_LED,    4, 0);
+TOSH_ASSIGN_PIN(YELLOW_LED, 4, 2);
+TOSH_ASSIGN_PIN(GREEN_LED,  4, 3);
+
+// CC2420 RADIO
+TOSH_ASSIGN_PIN(RADIO_FIFO,  1, 5);
+TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 2);
+TOSH_ASSIGN_PIN(RADIO_CCA,   2, 7);
+
+// vref is legacy from telos and cc2420 lib; schematic and cc2420 pin say vreg_en
+TOSH_ASSIGN_PIN(RADIO_VREF,  5, 6);   
+
+TOSH_ASSIGN_PIN(RADIO_SFD,   1, 0);
+TOSH_ASSIGN_PIN(RADIO_SIMO1, 5, 1);
+TOSH_ASSIGN_PIN(RADIO_SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(RADIO_CSN,   5, 4);
+TOSH_ASSIGN_PIN(RADIO_RESET, 5, 7);
+
+// this happens in hplcc2420pinsc
+TOSH_ASSIGN_PIN(CC_FIFOP, 1, 2);
+TOSH_ASSIGN_PIN(CC_FIFO, 1, 5);
+TOSH_ASSIGN_PIN(CC_SFD, 1, 0);
+TOSH_ASSIGN_PIN(CC_VREN, 5, 6);
+TOSH_ASSIGN_PIN(CC_RSTN, 5, 7);
+
+// BT pins
+TOSH_ASSIGN_PIN(BT_PIO,      2, 6);
+TOSH_ASSIGN_PIN(BT_RTS,      1, 6);
+TOSH_ASSIGN_PIN(BT_CTS,      1, 7);
+TOSH_ASSIGN_PIN(BT_TXD,      3, 6);
+TOSH_ASSIGN_PIN(BT_RXD,      3, 7);
+TOSH_ASSIGN_PIN(BT_RESET,    5, 5);
+
+//BSL Pins
+TOSH_ASSIGN_PIN(PROG_OUT,  1, 1);
+TOSH_ASSIGN_PIN(PROG_IN,   2, 2);
+
+// SD uart chip-select
+TOSH_ASSIGN_PIN(SD_CS_N, 3, 0);
+
+TOSH_ASSIGN_PIN(TILT,  2, 4);
+
+// ADC lines on the testpoints
+TOSH_ASSIGN_PIN(ADC_0, 6, 0);
+TOSH_ASSIGN_PIN(ADC_1, 6, 1);
+TOSH_ASSIGN_PIN(ADC_2, 6, 2);
+TOSH_ASSIGN_PIN(ADC_3, 6, 3);
+TOSH_ASSIGN_PIN(ADC_4, 6, 4);
+TOSH_ASSIGN_PIN(ADC_5, 6, 5);
+TOSH_ASSIGN_PIN(ADC_6, 6, 6);
+TOSH_ASSIGN_PIN(ADC_7, 6, 7);
+
+TOSH_ASSIGN_PIN(ADC_ACCELZ, 6, 3);
+TOSH_ASSIGN_PIN(ADC_ACCELY,  6, 4);
+TOSH_ASSIGN_PIN(ADC_ACCELX, 6, 5);
+
+TOSH_ASSIGN_PIN(DAC0_AN, 6, 6);
+TOSH_ASSIGN_PIN(DAC1_AN, 6, 7);
+
+TOSH_ASSIGN_PIN(VSENSE_ADC6, 6, 6);
+TOSH_ASSIGN_PIN(VSENSE_ADC7,  6, 7);
+
+// bus arbitration pins
+TOSH_ASSIGN_PIN(SW_SD_PWR_N, 4, 5);
+TOSH_ASSIGN_PIN(SW_BT_PWR_N, 4, 6);
+
+// if used as expansion GPIOs
+TOSH_ASSIGN_PIN(SER0_RTS, 1, 3);
+TOSH_ASSIGN_PIN(SER0_CTS, 1, 4);
+
+TOSH_ASSIGN_PIN(SIMO0, 3, 1);
+TOSH_ASSIGN_PIN(SOMI0, 3, 2);
+TOSH_ASSIGN_PIN(UCLK0, 3, 3);
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+
+// redefinitions for the sd card driver
+TOSH_ASSIGN_PIN(SD_DI, 3, 1);
+TOSH_ASSIGN_PIN(SD_DO, 3, 2);
+TOSH_ASSIGN_PIN(SD_CLK, 3, 3);
+
+
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);
+TOSH_ASSIGN_PIN(URXD1, 3, 7);
+
+TOSH_ASSIGN_PIN(GIO0, 2, 0);
+TOSH_ASSIGN_PIN(GIO1, 2, 1);
+TOSH_ASSIGN_PIN(GIO2, 2, 5);  // second internal expansion gpio
+
+// 1-Wire
+TOSH_ASSIGN_PIN(ONEWIRE, 4, 7);
+
+// ROSC
+TOSH_ASSIGN_PIN(ROSC, 2, 5);
+
+// docked signal from programming board
+TOSH_ASSIGN_PIN(DOCK_N, 2, 3);
+
+// ACCEL
+TOSH_ASSIGN_PIN(ACCEL_SEL0,  4, 1);
+TOSH_ASSIGN_PIN(ACCEL_SEL1,  4, 4);
+TOSH_ASSIGN_PIN(ACCEL_SLEEP_N, 5, 0);
+
+#endif // _H_hardware_h
+
diff --git a/tos/platforms/shimmer2/platform.h b/tos/platforms/shimmer2/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/shimmer2/platform_message.h b/tos/platforms/shimmer2/platform_message.h
new file mode 100644
index 00000000..2726f339
--- /dev/null
+++ b/tos/platforms/shimmer2/platform_message.h
@@ -0,0 +1,70 @@
+/* $Id: platform_message.h,v 1.2 2010-06-29 22:07:54 scipio Exp $
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific CC1000 packet structures.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:54 $
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include <CC2420.h>
+#include <Serial.h>
+
+typedef union message_header {
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union TOSRadioFooter {
+  cc2420_footer_t cc2420;
+} message_footer_t;
+
+typedef union TOSRadioMetadata {
+  cc2420_metadata_t cc2420;
+  serial_metadata_t serial;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/shimmer2r/.platform b/tos/platforms/shimmer2r/.platform
new file mode 100644
index 00000000..141d0a4d
--- /dev/null
+++ b/tos/platforms/shimmer2r/.platform
@@ -0,0 +1,91 @@
+# SHIMMER2 - platform includes
+# Steve Ayer, June 2009; derived from Konrad Lorincz's SHIMMER platform
+#
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+
+push( @includes, qw(
+
+      .
+  %T/platforms/shimmer2r
+  %T/platforms/shimmer2r/chips/cc2420
+  %T/platforms/shimmer2r/chips/mma7361
+  %T/platforms/shimmer2
+  %T/platforms/shimmer2/chips/sd
+  %T/platforms/shimmer2/chips/bluetooth
+  %T/platforms/shimmer2/chips/tilt
+  %T/platforms/shimmer2/chips/gyro
+  %T/platforms/shimmer2/chips/gyromag
+  %T/platforms/shimmer2/chips/fgpmmopa6b
+  %T/platforms/shimmer2/chips/bmp085
+  %T/platforms/shimmer
+  %T/platforms/shimmer/chips/msp430
+  %T/platforms/shimmer/chips/mma7260
+  %T/platforms/shimmer/chips/sd
+  %T/platforms/shimmer/chips/sd/fatfs
+  %T/platforms/shimmer/chips/bluetooth
+  %T/platforms/shimmer/chips/ds2411
+  %T/chips/cc2420
+  %T/chips/cc2420/alarm
+  %T/chips/cc2420/control
+  %T/chips/cc2420/csma
+  %T/chips/cc2420/interfaces
+  %T/chips/cc2420/link
+  %T/chips/cc2420/lowpan
+  %T/chips/cc2420/lpl
+  %T/chips/cc2420/packet
+  %T/chips/cc2420/receive
+  %T/chips/cc2420/spi
+  %T/chips/cc2420/transmit
+  %T/chips/cc2420/unique
+  %T/chips/cc2420/security
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/dma
+  %T/chips/msp430/pins
+  %T/chips/msp430/timer
+  %T/chips/msp430/usart
+  %T/chips/msp430/sensors
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+  %T/lib/power
+  ) );
+
+@opts = qw(
+
+  -gcc=msp430-gcc
+  -mmcu=msp430x1611
+  -fnesc-target=msp430
+  -fnesc-no-debug
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=2 " .
+    "version=msp430-3.2.3 " .
+    "short=2,2 " .
+    "int=2,2 " .
+    "long=4,2 " .
+    "long_long=8,2 " .
+    "pointer=2,2 " .
+    "enum=2,2 " .
+    "float=4,2 " .
+    "double=4,2 " .
+    "long_double=4,2 " .
+    "void=1,1 " .
+    "fun=1,2 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
diff --git a/tos/platforms/shimmer2r/ActiveMessageC.nc b/tos/platforms/shimmer2r/ActiveMessageC.nc
new file mode 100644
index 00000000..e4ed51bc
--- /dev/null
+++ b/tos/platforms/shimmer2r/ActiveMessageC.nc
@@ -0,0 +1,88 @@
+// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
+ *
+ */
+/**
+ * The Active Message layer on the SHIMMER platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Konrad Lorincz
+ */
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+    interface LowPowerListening;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+  LowPowerListening = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
diff --git a/tos/platforms/shimmer2r/HplUserButtonC.nc b/tos/platforms/shimmer2r/HplUserButtonC.nc
new file mode 100644
index 00000000..9bf9033a
--- /dev/null
+++ b/tos/platforms/shimmer2r/HplUserButtonC.nc
@@ -0,0 +1,57 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telos platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ *
+ * @author Mike Healy
+ * @date May 9, 2009 - modified for use with SHIMMER2
+ */
+
+configuration HplUserButtonC {
+  provides interface GeneralIO;
+  provides interface GpioInterrupt;
+}
+implementation {
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components HplMsp430InterruptC as InterruptC;
+
+  components new Msp430GpioC() as UserButtonC;
+  UserButtonC -> GeneralIOC.Port20;
+  GeneralIO = UserButtonC;
+
+  components new Msp430InterruptC() as InterruptUserButtonC;
+  InterruptUserButtonC.HplInterrupt -> InterruptC.Port20;
+  GpioInterrupt = InterruptUserButtonC.Interrupt;
+}
diff --git a/tos/platforms/shimmer2r/Leds.nc b/tos/platforms/shimmer2r/Leds.nc
new file mode 100644
index 00000000..3b3cae2e
--- /dev/null
+++ b/tos/platforms/shimmer2r/Leds.nc
@@ -0,0 +1,136 @@
+// $Id: Leds.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
+
+/*
+ * Copyright (c) 2005-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Commands for controlling three LEDs. A platform can provide this
+ * interface if it has more than or fewer than three LEDs. In the
+ * former case, these commands refer to the first three LEDs. In the
+ * latter case, some of the commands are null operations, and the set
+ * of non-null operations must be contiguous and start at Led1. That
+ * is, on platforms with 2 LEDs, LED 3's commands are null operations,
+ * while on platforms with 1 LED, LED 2 and LED 3's commands are null
+ * opertations.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ *
+ */
+
+#include "Leds.h"
+
+interface Leds {
+
+  /**
+   * Turn on LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0On();
+
+  /**
+   * Turn off LED 0. The color of this LED depends on the platform.
+   */
+  async command void led0Off();
+
+  /**
+   * Toggle LED 0; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led0Toggle();
+
+  /**
+   * Turn on LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1On();
+
+  /**
+   * Turn off LED 1. The color of this LED depends on the platform.
+   */
+  async command void led1Off();
+
+   /**
+   * Toggle LED 1; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led1Toggle();
+
+ 
+  /**
+   * Turn on LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2On();
+
+  /**
+   * Turn off LED 2. The color of this LED depends on the platform.
+   */
+  async command void led2Off();
+
+   /**
+   * Toggle LED 2; if it was off, turn it on, if was on, turn it off.
+   * The color of this LED depends on the platform.
+   */
+  async command void led2Toggle();
+  
+  /**
+   * Get the current LED settings as a bitmask. Each bit corresponds to
+   * whether an LED is on; bit 0 is LED 0, bit 1 is LED 1, etc. You can
+   * also use the enums LEDS_LED0, LEDS_LED1. For example, this expression
+   * will determine whether LED 2 is on:
+   *
+   * <pre> (call Leds.get() & LEDS_LED2) </pre>
+   *
+   * This command supports up to 8 LEDs; if a platform has fewer, then
+   * those LEDs should always be off (their bit is zero). Also see
+   * <tt>set()</tt>.
+   *
+   * @return a bitmask describing which LEDs are on and which are off
+   */ 
+  async command uint8_t get();
+
+  
+  /**
+   * Set the current LED configuration using a bitmask.  Each bit
+   * corresponds to whether an LED is on; bit 0 is LED 0, bit 1 is LED
+   * 1, etc. You can also use the enums LEDS_LED0, LEDS_LED1. For example,
+   * this statement will configure the LEDs so LED 0 and LED 2 are on:
+   *
+   * <pre> call Leds.set(LEDS_LED0 | LEDS_LED2); </pre>
+   *
+   * This statement will turn LED 1 on if it was not already:
+   *
+   * <pre>call Leds.set(call Leds.get() | LEDS_LED1);</pre>
+   *
+   * @param  val   a bitmask describing the on/off settings of the LEDs
+   */
+   async command void set(uint8_t val);
+  
+}
diff --git a/tos/platforms/shimmer2r/LedsC.nc b/tos/platforms/shimmer2r/LedsC.nc
new file mode 100644
index 00000000..c8b6422f
--- /dev/null
+++ b/tos/platforms/shimmer2r/LedsC.nc
@@ -0,0 +1,59 @@
+// $Id: LedsC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ *
+ * The basic TinyOS LEDs abstraction.
+ *
+ * @author Phil Buonadonna
+ * @author David Gay
+ * @author Philip Levis
+ * @author Joe Polastre
+ *
+ */
+
+
+configuration LedsC {
+  provides interface Leds;
+}
+implementation {
+  components LedsP, PlatformLedsC;
+
+  Leds = LedsP;
+
+  LedsP.Init <- PlatformLedsC.Init;
+  LedsP.Led0 -> PlatformLedsC.Led0;
+  LedsP.Led1 -> PlatformLedsC.Led1;
+  LedsP.Led2 -> PlatformLedsC.Led2;
+}
+
diff --git a/tos/platforms/shimmer2r/LedsP.nc b/tos/platforms/shimmer2r/LedsP.nc
new file mode 100644
index 00000000..c04adc81
--- /dev/null
+++ b/tos/platforms/shimmer2r/LedsP.nc
@@ -0,0 +1,159 @@
+// $Id: LedsP.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The implementation of the standard 3 LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ *
+ * @date   March 21, 2005
+ *
+ */
+
+module LedsP @safe() {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+}
+implementation {
+  command error_t Init.init() {
+    atomic {
+      dbg("Init", "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led0.set();
+      call Led1.set();
+      call Led2.set();
+    }
+    return SUCCESS;
+  }
+
+  /* Note: the call is inside the dbg, as it's typically a read of a volatile
+     location, so can't be deadcode eliminated */
+#define DBGLED(n) \
+  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");
+
+  async command void Leds.led0On() {
+    call Led0.clr();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Off() {
+    call Led0.set();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    DBGLED(0);
+  }
+
+  async command void Leds.led1On() {
+    call Led1.clr();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Off() {
+    call Led1.set();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    DBGLED(1);
+  }
+
+  async command void Leds.led2On() {
+    call Led2.clr();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Off() {
+    call Led2.set();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    DBGLED(2);
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (!call Led0.get()) {
+	      rval |= LEDS_LED0;
+      }
+      if (!call Led1.get()) {
+	      rval |= LEDS_LED1;
+      }
+      if (!call Led2.get()) {
+	      rval |= LEDS_LED2;
+      }
+    }
+    return rval;
+  }
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+	      call Leds.led0On();
+      }
+      else {
+	      call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+	      call Leds.led1On();
+      }
+      else {
+	      call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+	      call Leds.led2On();
+      }
+      else {
+	      call Leds.led2Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/shimmer2r/MoteClockC.nc b/tos/platforms/shimmer2r/MoteClockC.nc
new file mode 100644
index 00000000..f42a36b8
--- /dev/null
+++ b/tos/platforms/shimmer2r/MoteClockC.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id: MoteClockC.nc,v 1.1 2010-06-10 18:22:02 ayer1 Exp $
+ *
+ */
+
+ /**
+ * @author Vlado Handziski <handzisk@tkn.tu-berlind.de>
+ */
+ 
+configuration MoteClockC
+{
+  provides interface Init as MoteClockInit;
+}
+implementation
+
+{
+  components Msp430ClockC;
+  
+  MoteClockInit = Msp430ClockC.Init;
+}
diff --git a/tos/platforms/shimmer2r/MotePlatformC.nc b/tos/platforms/shimmer2r/MotePlatformC.nc
new file mode 100644
index 00000000..49d525b0
--- /dev/null
+++ b/tos/platforms/shimmer2r/MotePlatformC.nc
@@ -0,0 +1,236 @@
+/*
+ * Copyright (c) 2007, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steven Ayer
+ * @date   July 2007
+ * 
+ * tos-2.x port June 2009
+ *
+ */
+
+module MotePlatformC {
+  provides interface Init;
+}
+
+implementation {
+
+  command error_t Init.init() {
+    
+    // have to tell mux to connect path from msp430 to sd
+    TOSH_SEL_DOCK_N_IOFUNC();
+    TOSH_MAKE_DOCK_N_OUTPUT();
+    TOSH_SET_DOCK_N_PIN();
+
+    // bus arbitration pins 
+    TOSH_SEL_SW_SD_PWR_N_IOFUNC();
+    TOSH_MAKE_SW_SD_PWR_N_OUTPUT();
+
+    TOSH_SEL_SD_CS_N_IOFUNC();
+    TOSH_MAKE_SD_CS_N_OUTPUT();
+
+    TOSH_SEL_SD_CLK_IOFUNC();
+    TOSH_MAKE_SD_CLK_OUTPUT();
+    TOSH_SEL_SD_DO_IOFUNC();
+    TOSH_MAKE_SD_DO_INPUT();
+    TOSH_SEL_SD_DI_IOFUNC();
+    TOSH_MAKE_SD_DI_OUTPUT();
+  
+    // power down sd module; overridden by dock pin on programming board
+    /*
+     * other pins are zeroed to reset card
+     * at end of this routine, we raise them again (they have pullups, too)
+     */
+    TOSH_SET_SW_SD_PWR_N_PIN();     
+    TOSH_CLR_SD_CS_N_PIN();
+    TOSH_CLR_SD_DI_PIN();
+    TOSH_CLR_SD_CLK_PIN();
+  
+    TOSH_SEL_SW_BT_PWR_N_IOFUNC();
+    TOSH_MAKE_SW_BT_PWR_N_OUTPUT();
+    TOSH_SET_SW_BT_PWR_N_PIN();     // power down bt module; overridden by dock pin on programming board
+
+    //LEDS
+    TOSH_SEL_RED_LED_IOFUNC();
+    TOSH_MAKE_RED_LED_OUTPUT();
+    TOSH_SEL_YELLOW_LED_IOFUNC();
+    TOSH_MAKE_YELLOW_LED_OUTPUT();
+    TOSH_SEL_GREEN_LED_IOFUNC();
+    TOSH_MAKE_GREEN_LED_OUTPUT();
+
+    TOSH_SET_RED_LED_PIN();
+    TOSH_SET_YELLOW_LED_PIN();
+    TOSH_SET_GREEN_LED_PIN();
+
+    //RADIO PINS
+    //CC2420 pins
+    TOSH_MAKE_RADIO_VREF_OUTPUT();
+    TOSH_SEL_RADIO_VREF_IOFUNC();
+    TOSH_CLR_RADIO_VREF_PIN();    // power down 
+
+    TOSH_MAKE_RADIO_CSN_OUTPUT();
+    TOSH_SEL_RADIO_CSN_IOFUNC();
+    TOSH_SET_RADIO_CSN_PIN();
+
+    // should be reset_n
+    TOSH_MAKE_RADIO_RESET_OUTPUT();
+    TOSH_SEL_RADIO_RESET_IOFUNC();
+    TOSH_CLR_RADIO_RESET_PIN();
+
+    TOSH_SEL_RADIO_CCA_IOFUNC();
+    TOSH_MAKE_RADIO_CCA_INPUT();
+    TOSH_SEL_RADIO_FIFO_IOFUNC();
+    TOSH_MAKE_RADIO_FIFO_INPUT();
+    TOSH_SEL_RADIO_FIFOP_IOFUNC();
+    TOSH_MAKE_RADIO_FIFOP_INPUT();
+    TOSH_SEL_RADIO_SFD_IOFUNC();
+    TOSH_MAKE_RADIO_SFD_INPUT();
+
+    TOSH_SEL_TILT_IOFUNC();
+    TOSH_MAKE_TILT_INPUT();
+
+    // BT PINS
+    TOSH_MAKE_BT_RESET_OUTPUT();  
+    TOSH_SEL_BT_RESET_IOFUNC();    
+    TOSH_CLR_BT_RESET_PIN();   // mitsumi module disabled by clr
+
+    TOSH_MAKE_BT_RTS_INPUT();      
+    TOSH_SEL_BT_RTS_IOFUNC();
+
+    TOSH_MAKE_BT_PIO_INPUT();
+    TOSH_SEL_BT_PIO_IOFUNC();
+
+    TOSH_MAKE_BT_CTS_OUTPUT();
+    TOSH_SEL_BT_CTS_IOFUNC();
+
+    TOSH_MAKE_BT_TXD_OUTPUT();
+    TOSH_SEL_BT_TXD_IOFUNC();
+
+    TOSH_MAKE_BT_RXD_INPUT();
+    TOSH_SEL_BT_RXD_IOFUNC();
+
+    // BSL Prog Pins tristate em
+    TOSH_MAKE_PROG_IN_OUTPUT();
+    TOSH_MAKE_PROG_OUT_OUTPUT();
+    TOSH_SET_PROG_OUT_PIN();    // some expansion boards have enable low
+    TOSH_SEL_PROG_IN_IOFUNC();
+    TOSH_SEL_PROG_OUT_IOFUNC();
+
+    // ADC lines
+    TOSH_SEL_ADC_0_IOFUNC();
+    TOSH_MAKE_ADC_0_OUTPUT();
+    TOSH_SEL_ADC_1_IOFUNC();
+    TOSH_MAKE_ADC_1_OUTPUT();
+    TOSH_SEL_ADC_2_IOFUNC();
+    TOSH_MAKE_ADC_2_OUTPUT();
+    TOSH_SEL_ADC_6_IOFUNC();
+    TOSH_MAKE_ADC_6_OUTPUT();
+    TOSH_SEL_ADC_7_IOFUNC();
+    TOSH_MAKE_ADC_7_OUTPUT();
+
+    TOSH_SEL_ADC_ACCELZ_IOFUNC();
+    TOSH_MAKE_ADC_ACCELZ_INPUT();
+    TOSH_SEL_ADC_ACCELY_IOFUNC();
+    TOSH_MAKE_ADC_ACCELY_INPUT();
+    TOSH_SEL_ADC_ACCELX_IOFUNC();
+    TOSH_MAKE_ADC_ACCELX_INPUT();
+  
+    TOSH_SEL_ROSC_IOFUNC();
+    TOSH_MAKE_ROSC_INPUT();
+
+    // 1-wire function
+    TOSH_SEL_ONEWIRE_IOFUNC();
+    TOSH_MAKE_ONEWIRE_OUTPUT();
+    TOSH_SET_ONEWIRE_PIN();
+
+    /*
+     *  Accelerometer pin definitions
+     * unless the accel_sel0 pin is cleared, 
+     * a severe quiescent power hit occurs on the msp430
+     * we go from 3.7 ua to 65.1 ua when asleep!
+     */
+    TOSH_SEL_ACCEL_SEL0_IOFUNC();
+    TOSH_MAKE_ACCEL_SEL0_OUTPUT();
+    TOSH_CLR_ACCEL_SEL0_PIN();
+    TOSH_SEL_ACCEL_SLEEP_N_IOFUNC();
+    TOSH_MAKE_ACCEL_SLEEP_N_OUTPUT();
+    TOSH_CLR_ACCEL_SLEEP_N_PIN();
+    
+    /*
+     * switches between adc0 & adc7 pass-through when low
+     * and battery/regulator signals for power monitoring 
+     */
+    TOSH_SEL_PWRMUX_SEL_IOFUNC();
+    TOSH_MAKE_PWRMUX_SEL_OUTPUT();
+    TOSH_CLR_PWRMUX_SEL_PIN();
+    
+    // idle expansion header pins
+    TOSH_SEL_SER0_CTS_IOFUNC();
+    TOSH_MAKE_SER0_CTS_OUTPUT();
+    TOSH_SEL_SER0_RTS_IOFUNC();
+    TOSH_MAKE_SER0_RTS_OUTPUT();
+
+    // this pin is now tied to the user button on the prog board
+    TOSH_SEL_GIO0_IOFUNC();
+    TOSH_MAKE_GIO0_INPUT();
+
+    TOSH_SEL_GIO1_IOFUNC();
+    TOSH_MAKE_GIO1_OUTPUT();
+
+    TOSH_SEL_UTXD0_IOFUNC();
+    TOSH_MAKE_UTXD0_OUTPUT();
+    TOSH_SEL_URXD0_IOFUNC();
+    TOSH_MAKE_URXD0_OUTPUT();
+    TOSH_SET_URXD0_PIN();
+
+    TOSH_SEL_UTXD1_IOFUNC();
+    TOSH_MAKE_UTXD1_OUTPUT();
+    TOSH_SEL_URXD1_IOFUNC();
+    TOSH_MAKE_URXD1_OUTPUT();
+    TOSH_SEL_UCLK1_IOFUNC();
+    TOSH_MAKE_UCLK1_OUTPUT();
+    TOSH_SEL_SIMO1_IOFUNC();
+    TOSH_MAKE_SIMO1_OUTPUT();
+    TOSH_SEL_SOMI1_IOFUNC();
+    TOSH_MAKE_SOMI1_INPUT();
+
+    TOSH_SET_SD_CS_N_PIN();
+    TOSH_SET_SD_DI_PIN();
+    TOSH_SET_SD_CLK_PIN();
+
+    // these are attached to the same pullup as above
+    TOSH_SET_SIMO1_PIN();
+    TOSH_SET_UCLK1_PIN();
+
+    // set it back to default state
+    TOSH_MAKE_DOCK_N_INPUT();
+
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/shimmer2r/Msp430Timer32khzMapC.nc b/tos/platforms/shimmer2r/Msp430Timer32khzMapC.nc
new file mode 100644
index 00000000..1905ac67
--- /dev/null
+++ b/tos/platforms/shimmer2r/Msp430Timer32khzMapC.nc
@@ -0,0 +1,86 @@
+//$Id: Msp430Timer32khzMapC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * MSP430Timer32khzMapC presents as paramaterized interfaces all of
+ * the 32khz hardware timers on the MSP430 that are available for
+ * compile time allocation by "new Alarm32khz16C()", "new
+ * AlarmMilli32C()", and so on.  
+ *
+ * Platforms based on the MSP430 are * encouraged to copy in and
+ * override this file, presenting only the * hardware timers that are
+ * available for allocation on that platform.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
+ */
+
+configuration Msp430Timer32khzMapC
+{
+  provides interface Msp430Timer[ uint8_t id ];
+  provides interface Msp430TimerControl[ uint8_t id ];
+  provides interface Msp430Compare[ uint8_t id ];
+}
+implementation
+{
+  components Msp430TimerC;
+
+  Msp430Timer[0] = Msp430TimerC.TimerB;
+  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
+  Msp430Compare[0] = Msp430TimerC.CompareB0;
+
+  Msp430Timer[1] = Msp430TimerC.TimerB;
+  Msp430TimerControl[1] = Msp430TimerC.ControlB1;
+  Msp430Compare[1] = Msp430TimerC.CompareB1;
+
+  Msp430Timer[2] = Msp430TimerC.TimerB;
+  Msp430TimerControl[2] = Msp430TimerC.ControlB2;
+  Msp430Compare[2] = Msp430TimerC.CompareB2;
+
+  Msp430Timer[3] = Msp430TimerC.TimerB;
+  Msp430TimerControl[3] = Msp430TimerC.ControlB3;
+  Msp430Compare[3] = Msp430TimerC.CompareB3;
+
+  Msp430Timer[4] = Msp430TimerC.TimerB;
+  Msp430TimerControl[4] = Msp430TimerC.ControlB4;
+  Msp430Compare[4] = Msp430TimerC.CompareB4;
+
+  Msp430Timer[5] = Msp430TimerC.TimerB;
+  Msp430TimerControl[5] = Msp430TimerC.ControlB5;
+  Msp430Compare[5] = Msp430TimerC.CompareB5;
+
+  Msp430Timer[6] = Msp430TimerC.TimerB;
+  Msp430TimerControl[6] = Msp430TimerC.ControlB6;
+  Msp430Compare[6] = Msp430TimerC.CompareB6;
+}
+
diff --git a/tos/platforms/shimmer2r/NoLedsC.nc b/tos/platforms/shimmer2r/NoLedsC.nc
new file mode 100644
index 00000000..0646b20d
--- /dev/null
+++ b/tos/platforms/shimmer2r/NoLedsC.nc
@@ -0,0 +1,68 @@
+// $Id: NoLedsC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * A null operation replacement for the LedsC component. As many
+ * components might concurrently signal information through LEDs,
+ * using LedsC and NoLedsC allows an application builder to select
+ * which components control the LEDs.
+ *
+ * @author Philip Levis
+ * @date   March 19, 2005
+ *
+ */
+
+module NoLedsC {
+  provides interface Init;
+  provides interface Leds;
+}
+implementation {
+
+  command error_t Init.init() {return SUCCESS;}
+
+  async command void Leds.led0On() {}
+  async command void Leds.led0Off() {}
+  async command void Leds.led0Toggle() {}
+
+  async command void Leds.led1On() {}
+  async command void Leds.led1Off() {}
+  async command void Leds.led1Toggle() {}
+
+  async command void Leds.led2On() {}
+  async command void Leds.led2Off() {}
+  async command void Leds.led2Toggle() {}
+
+  async command uint8_t Leds.get() {return 0;}
+  async command void Leds.set(uint8_t val) {}
+}
diff --git a/tos/platforms/shimmer2r/PlatformC.nc b/tos/platforms/shimmer2r/PlatformC.nc
new file mode 100644
index 00000000..fdd07814
--- /dev/null
+++ b/tos/platforms/shimmer2r/PlatformC.nc
@@ -0,0 +1,49 @@
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre and Cory Sharp
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
+ */
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+}
+implementation
+{
+  components PlatformP, MotePlatformC, MoteClockC;
+
+  Init = PlatformP;
+  PlatformP.MoteClockInit -> MoteClockC;
+  PlatformP.MoteInit -> MotePlatformC;
+}
diff --git a/tos/platforms/shimmer2r/PlatformLedsC.nc b/tos/platforms/shimmer2r/PlatformLedsC.nc
new file mode 100644
index 00000000..37c1cff8
--- /dev/null
+++ b/tos/platforms/shimmer2r/PlatformLedsC.nc
@@ -0,0 +1,69 @@
+// $Id: PlatformLedsC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
+ */
+
+#include "hardware.h"
+
+configuration PlatformLedsC {
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation
+{
+  components 
+      HplMsp430GeneralIOC as GeneralIOC
+    , new Msp430GpioC() as Led0Impl
+    , new Msp430GpioC() as Led1Impl
+    , new Msp430GpioC() as Led2Impl
+    ;
+  components PlatformP;
+
+  Init = PlatformP.LedsInit;
+
+  Led0 = Led0Impl;
+  Led0Impl -> GeneralIOC.Port40;
+
+  Led1 = Led1Impl;
+  Led1Impl -> GeneralIOC.Port42;
+
+  Led2 = Led2Impl;
+  Led2Impl -> GeneralIOC.Port43;
+
+}
+
diff --git a/tos/platforms/shimmer2r/PlatformP.nc b/tos/platforms/shimmer2r/PlatformP.nc
new file mode 100644
index 00000000..b8dc9438
--- /dev/null
+++ b/tos/platforms/shimmer2r/PlatformP.nc
@@ -0,0 +1,19 @@
+#include "hardware.h"
+
+module PlatformP{
+  provides interface Init;
+  uses interface Init as MoteClockInit;
+  uses interface Init as MoteInit;
+  uses interface Init as LedsInit;
+}
+implementation {
+  command error_t Init.init() {
+    call MoteClockInit.init();
+    call MoteInit.init();
+    call LedsInit.init();
+    return SUCCESS;
+  }
+
+  default command error_t LedsInit.init() { return SUCCESS; }
+
+}
diff --git a/tos/platforms/shimmer2r/PlatformSerialC.nc b/tos/platforms/shimmer2r/PlatformSerialC.nc
new file mode 100644
index 00000000..967e9dae
--- /dev/null
+++ b/tos/platforms/shimmer2r/PlatformSerialC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * mostly copied from shimmer
+ *
+ * @author Steve Ayer
+ * @date   June 2009
+ */
+
+configuration PlatformSerialC {
+  provides interface StdControl;
+  provides interface UartStream;
+  provides interface UartByte;
+}
+
+implementation {
+  components new Msp430Uart0C() as UartC;
+  UartStream = UartC;  
+  UartByte = UartC;
+  
+  components ShimmerSerialP;
+  StdControl = ShimmerSerialP;
+  ShimmerSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
+  ShimmerSerialP.Resource -> UartC.Resource;
+}
diff --git a/tos/platforms/shimmer2r/ShimmerSerialP.nc b/tos/platforms/shimmer2r/ShimmerSerialP.nc
new file mode 100644
index 00000000..a1f61ea3
--- /dev/null
+++ b/tos/platforms/shimmer2r/ShimmerSerialP.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date June 2009
+ */
+
+module ShimmerSerialP {
+  provides interface StdControl;
+  provides interface Msp430UartConfigure;
+  uses interface Resource;
+}
+
+implementation {
+  msp430_uart_union_config_t msp430_uart_shimmer2_config = { 
+    { ubr: UBR_1MHZ_115200, 
+      umctl: UMCTL_1MHZ_115200, 
+      ssel: 0x02, 
+      pena: 0, 
+      pev: 0, 
+      spb: 0, 
+      clen: 1, 
+      listen: 0, 
+      mm: 0, 
+      ckpl: 0, 
+      urxse: 0, 
+      urxeie: 1, 
+      urxwie: 0, 
+      utxe : 1, 
+      urxe : 1 
+    } 
+  };
+
+  command error_t StdControl.start(){
+    return call Resource.immediateRequest();
+  }
+  
+  command error_t StdControl.stop(){
+    call Resource.release();
+    return SUCCESS;
+  }
+
+  event void Resource.granted(){}
+
+  async command msp430_uart_union_config_t * Msp430UartConfigure.getConfig(){
+    return &msp430_uart_shimmer2_config;
+  }
+}
diff --git a/tos/platforms/shimmer2r/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/shimmer2r/chips/cc2420/HplCC2420AlarmC.nc
new file mode 100644
index 00000000..4f1dcb42
--- /dev/null
+++ b/tos/platforms/shimmer2r/chips/cc2420/HplCC2420AlarmC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of 32khz alarms for the ChipCon CC2420 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2010-06-10 18:22:02 $
+ */
+
+generic configuration HplCC2420AlarmC() {
+
+  provides interface Init;
+  provides interface Alarm<T32khz,uint32_t> as Alarm32khz32;
+
+}
+
+implementation {
+
+  components new Alarm32khz32C();
+
+  Init = Alarm32khz32C;
+  Alarm32khz32 = Alarm32khz32C;
+  
+}
diff --git a/tos/platforms/shimmer2r/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/shimmer2r/chips/cc2420/HplCC2420InterruptsC.nc
new file mode 100644
index 00000000..825d6e70
--- /dev/null
+++ b/tos/platforms/shimmer2r/chips/cc2420/HplCC2420InterruptsC.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of interrupts and captures for the ChipCon
+ * CC2420 radio connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2010-06-10 18:22:02 $
+ */
+/**
+ * Ported to the SHIMMER platform. 
+ *
+ * @author Konrad Lorincz
+ * @date May 14, 2008
+ *
+ * @author Steve Ayer
+ * @date April, 2010
+ */
+
+configuration HplCC2420InterruptsC {
+
+  provides interface GpioCapture as CaptureSFD;
+  provides interface GpioInterrupt as InterruptCCA;
+  provides interface GpioInterrupt as InterruptFIFOP;
+
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components Msp430TimerC;
+  components new GpioCaptureC() as CaptureSFDC;
+  CaptureSFDC.Msp430TimerControl -> Msp430TimerC.ControlA1;
+  CaptureSFDC.Msp430Capture -> Msp430TimerC.CaptureA1;
+  CaptureSFDC.GeneralIO -> GeneralIOC.Port12;
+
+  components HplMsp430InterruptC;
+  components new Msp430InterruptC() as InterruptCCAC;
+  components new Msp430InterruptC() as InterruptFIFOPC;
+  InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port27;
+  InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port10;
+
+  InterruptCCA = InterruptCCAC.Interrupt;
+  InterruptFIFOP = InterruptFIFOPC.Interrupt;
+  CaptureSFD = CaptureSFDC.Capture;
+}
diff --git a/tos/platforms/shimmer2r/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/shimmer2r/chips/cc2420/HplCC2420PinsC.nc
new file mode 100644
index 00000000..b8926df7
--- /dev/null
+++ b/tos/platforms/shimmer2r/chips/cc2420/HplCC2420PinsC.nc
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of general-purpose I/O for the ChipCon CC2420
+ * radio connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2010-06-10 18:22:02 $
+ */
+/**
+ * Ported to the SHIMMER platform. 
+ *
+ * @author Konrad Lorincz
+ * @date May 14, 2008
+ */
+
+configuration HplCC2420PinsC {
+
+  provides interface GeneralIO as CCA;
+  provides interface GeneralIO as CSN;
+  provides interface GeneralIO as FIFO;
+  provides interface GeneralIO as FIFOP;
+  provides interface GeneralIO as RSTN;
+  provides interface GeneralIO as SFD;
+  provides interface GeneralIO as VREN;
+
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components new Msp430GpioC() as CCAM;
+  components new Msp430GpioC() as CSNM;
+  components new Msp430GpioC() as FIFOM;
+  components new Msp430GpioC() as FIFOPM;
+  components new Msp430GpioC() as RSTNM;
+  components new Msp430GpioC() as SFDM;
+  components new Msp430GpioC() as VRENM;
+
+  CCAM -> GeneralIOC.Port27;
+  CSNM -> GeneralIOC.Port54;
+  FIFOM -> GeneralIOC.Port15;
+  FIFOPM -> GeneralIOC.Port10;
+  RSTNM -> GeneralIOC.Port57;
+  SFDM -> GeneralIOC.Port12;
+  VRENM -> GeneralIOC.Port56;
+
+  CCA = CCAM;
+  CSN = CSNM;
+  FIFO = FIFOM;
+  FIFOP = FIFOPM;
+  RSTN = RSTNM;
+  SFD = SFDM;
+  VREN = VRENM;
+  
+}
+
diff --git a/tos/platforms/shimmer2r/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/shimmer2r/chips/cc2420/HplCC2420SpiC.nc
new file mode 100644
index 00000000..6c8261d6
--- /dev/null
+++ b/tos/platforms/shimmer2r/chips/cc2420/HplCC2420SpiC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of the SPI bus for the ChipCon CC2420 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2010-06-10 18:22:02 $
+ */
+/**
+ * Ported to the SHIMMER platform. 
+ *
+ * @author Konrad Lorincz
+ */
+
+generic configuration HplCC2420SpiC() {
+  
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+  
+}
+
+implementation {
+
+  components new Msp430Spi1C() as SpiC;
+  
+  Resource = SpiC;
+  SpiByte = SpiC;
+  SpiPacket = SpiC;
+  
+}
+
diff --git a/tos/platforms/shimmer2r/chips/mma7361/AccelC.nc b/tos/platforms/shimmer2r/chips/mma7361/AccelC.nc
new file mode 100644
index 00000000..dfec8f0f
--- /dev/null
+++ b/tos/platforms/shimmer2r/chips/mma7361/AccelC.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   May, 2010
+ * 
+ */
+
+configuration AccelC {
+   provides {
+      interface Mma_Accel as Accel;
+      interface Init;
+   }
+}
+implementation {
+  components Mma7361P;
+  Init = Mma7361P;
+  Accel = Mma7361P;
+}
diff --git a/tos/platforms/shimmer2r/chips/mma7361/Mma7361P.nc b/tos/platforms/shimmer2r/chips/mma7361/Mma7361P.nc
new file mode 100644
index 00000000..9b0ef98a
--- /dev/null
+++ b/tos/platforms/shimmer2r/chips/mma7361/Mma7361P.nc
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author  Steve Ayer
+ * @date    April, 2010
+ */
+
+#include "Mma_Accel.h"
+
+module Mma7361P {
+  provides {
+    interface Init;
+    interface Mma_Accel as Accel;
+  }
+}
+
+implementation {
+#warning "This accelerometer chipset supports only 1.5 and 6.0g; other settings will default to 1.5g"
+
+  command error_t Init.init(){
+    // control pins are already iofunc/input
+
+    TOSH_SEL_ADC_ACCELZ_MODFUNC();
+    TOSH_SEL_ADC_ACCELY_MODFUNC();
+    TOSH_SEL_ADC_ACCELX_MODFUNC();
+
+    call Accel.wake(1);
+
+    return SUCCESS;
+  }
+
+  command void Accel.wake (bool wakeup) {
+    if(wakeup)
+      TOSH_SET_ACCEL_SLEEP_N_PIN();    // wakes up accel board
+    else
+      TOSH_CLR_ACCEL_SLEEP_N_PIN();    // puts accel board to sleep
+  }
+
+  command void Accel.setSensitivity (uint8_t sensitivity) {
+    switch(sensitivity) {
+    case RANGE_1_5G:
+      TOSH_CLR_ACCEL_SEL0_PIN();
+      break;
+    case RANGE_6_0G:
+      TOSH_SET_ACCEL_SEL0_PIN();
+      break;
+    default:                     // in case someone feeds it a non-7361 range
+      TOSH_CLR_ACCEL_SEL0_PIN();
+      break;
+    }
+  }
+}
+
+
+
+
+
diff --git a/tos/platforms/shimmer2r/hardware.h b/tos/platforms/shimmer2r/hardware.h
new file mode 100644
index 00000000..2d2b8288
--- /dev/null
+++ b/tos/platforms/shimmer2r/hardware.h
@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2007, Intel Corporation
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 
+ * Redistributions of source code must retain the above copyright notice, 
+ * this list of conditions and the following disclaimer. 
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution. 
+ *
+ * Neither the name of the Intel Corporation nor the names of its contributors
+ * may be used to endorse or promote products derived from this software 
+ * without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steven Ayer
+ * @date   July 2007
+ */
+
+
+#ifndef _H_hardware_h
+#define _H_hardware_h
+
+#include "msp430hardware.h"
+/*
+ * these left from tos-1.x...
+ *
+ *#include "MSP430ADC12.h"
+ *
+ *#include "CC2420Const.h"
+ */
+
+
+// LEDs
+TOSH_ASSIGN_PIN(RED_LED,    4, 0);
+TOSH_ASSIGN_PIN(YELLOW_LED, 4, 2);
+TOSH_ASSIGN_PIN(GREEN_LED,  4, 3);
+
+// CC2420 RADIO
+TOSH_ASSIGN_PIN(RADIO_FIFO,  1, 5);
+TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 0);
+TOSH_ASSIGN_PIN(RADIO_CCA,   2, 7);
+
+// vref is legacy from telos and cc2420 lib; schematic and cc2420 pin say vreg_en
+TOSH_ASSIGN_PIN(RADIO_VREF,  5, 6);   
+
+TOSH_ASSIGN_PIN(RADIO_SFD,   1, 2);
+TOSH_ASSIGN_PIN(RADIO_SIMO1, 5, 1);
+TOSH_ASSIGN_PIN(RADIO_SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(RADIO_CSN,   5, 4);
+TOSH_ASSIGN_PIN(RADIO_RESET, 5, 7);
+
+// this happens in hplcc2420pinsc
+TOSH_ASSIGN_PIN(CC_FIFOP, 1, 0);
+TOSH_ASSIGN_PIN(CC_FIFO, 1, 5);
+TOSH_ASSIGN_PIN(CC_SFD, 1, 2);
+TOSH_ASSIGN_PIN(CC_VREN, 5, 6);
+TOSH_ASSIGN_PIN(CC_RSTN, 5, 7);
+
+// BT pins
+TOSH_ASSIGN_PIN(BT_PIO,      2, 6);
+TOSH_ASSIGN_PIN(BT_RTS,      1, 6);
+TOSH_ASSIGN_PIN(BT_CTS,      1, 7);
+TOSH_ASSIGN_PIN(BT_TXD,      3, 6);
+TOSH_ASSIGN_PIN(BT_RXD,      3, 7);
+TOSH_ASSIGN_PIN(BT_RESET,    5, 5);
+
+//BSL Pins
+TOSH_ASSIGN_PIN(PROG_OUT,  1, 1);
+TOSH_ASSIGN_PIN(PROG_IN,   2, 2);
+
+// SD uart chip-select
+TOSH_ASSIGN_PIN(SD_CS_N, 3, 0);
+
+TOSH_ASSIGN_PIN(TILT,  2, 4);
+
+// ADC lines on the testpoints
+TOSH_ASSIGN_PIN(ADC_0, 6, 0);
+TOSH_ASSIGN_PIN(ADC_1, 6, 1);
+TOSH_ASSIGN_PIN(ADC_2, 6, 2);
+TOSH_ASSIGN_PIN(ADC_3, 6, 3);
+TOSH_ASSIGN_PIN(ADC_4, 6, 4);
+TOSH_ASSIGN_PIN(ADC_5, 6, 5);
+TOSH_ASSIGN_PIN(ADC_6, 6, 6);
+TOSH_ASSIGN_PIN(ADC_7, 6, 7);
+
+TOSH_ASSIGN_PIN(ADC_ACCELZ, 6, 3);
+TOSH_ASSIGN_PIN(ADC_ACCELY,  6, 4);
+TOSH_ASSIGN_PIN(ADC_ACCELX, 6, 5);
+
+TOSH_ASSIGN_PIN(DAC0_AN, 6, 6);
+TOSH_ASSIGN_PIN(DAC1_AN, 6, 7);
+
+TOSH_ASSIGN_PIN(VSENSE_ADC6, 6, 6);
+TOSH_ASSIGN_PIN(VSENSE_ADC7,  6, 7);
+
+// bus arbitration pins
+TOSH_ASSIGN_PIN(SW_SD_PWR_N, 4, 5);
+TOSH_ASSIGN_PIN(SW_BT_PWR_N, 4, 6);
+
+// if used as expansion GPIOs
+TOSH_ASSIGN_PIN(SER0_RTS, 1, 3);
+TOSH_ASSIGN_PIN(SER0_CTS, 1, 4);
+
+TOSH_ASSIGN_PIN(SIMO0, 3, 1);
+TOSH_ASSIGN_PIN(SOMI0, 3, 2);
+TOSH_ASSIGN_PIN(UCLK0, 3, 3);
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+
+// redefinitions for the sd card driver
+TOSH_ASSIGN_PIN(SD_DI, 3, 1);
+TOSH_ASSIGN_PIN(SD_DO, 3, 2);
+TOSH_ASSIGN_PIN(SD_CLK, 3, 3);
+
+
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);
+TOSH_ASSIGN_PIN(URXD1, 3, 7);
+
+TOSH_ASSIGN_PIN(GIO0, 2, 0);
+TOSH_ASSIGN_PIN(GIO1, 2, 1);
+TOSH_ASSIGN_PIN(GIO2, 2, 5);  // second internal expansion gpio
+
+// 1-Wire
+TOSH_ASSIGN_PIN(ONEWIRE, 4, 7);
+
+// ROSC
+TOSH_ASSIGN_PIN(ROSC, 2, 5);
+
+// docked signal from programming board
+TOSH_ASSIGN_PIN(DOCK_N, 2, 3);
+
+// ACCEL
+TOSH_ASSIGN_PIN(PWRMUX_SEL,  4, 1);
+TOSH_ASSIGN_PIN(ACCEL_SEL0,  4, 4);
+TOSH_ASSIGN_PIN(ACCEL_SLEEP_N, 5, 0);
+
+#endif // _H_hardware_h
+
diff --git a/tos/platforms/shimmer2r/platform.h b/tos/platforms/shimmer2r/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/shimmer2r/platform_message.h b/tos/platforms/shimmer2r/platform_message.h
new file mode 100644
index 00000000..3ef102d6
--- /dev/null
+++ b/tos/platforms/shimmer2r/platform_message.h
@@ -0,0 +1,70 @@
+/* $Id: platform_message.h,v 1.2 2010-06-29 22:07:55 scipio Exp $
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific CC1000 packet structures.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include <CC2420.h>
+#include <Serial.h>
+
+typedef union message_header {
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union TOSRadioFooter {
+  cc2420_footer_t cc2420;
+} message_footer_t;
+
+typedef union TOSRadioMetadata {
+  cc2420_metadata_t cc2420;
+  serial_metadata_t serial;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/span/.platform b/tos/platforms/span/.platform
new file mode 100644
index 00000000..39f77248
--- /dev/null
+++ b/tos/platforms/span/.platform
@@ -0,0 +1,77 @@
+# span - platform includes
+# Steve Ayer, December 2009
+#
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+
+push( @includes, qw(
+
+      .
+  %T/platforms/span
+  %T/platforms/span/chips/cc2420
+  %T/platforms/span/chips/msp430
+  %T/platforms/shimmer/chips/ds2411
+  %T/chips/cc2420
+  %T/chips/cc2420/alarm
+  %T/chips/cc2420/control
+  %T/chips/cc2420/csma
+  %T/chips/cc2420/interfaces
+  %T/chips/cc2420/link
+  %T/chips/cc2420/lowpan
+  %T/chips/cc2420/lpl
+  %T/chips/cc2420/packet
+  %T/chips/cc2420/receive
+  %T/chips/cc2420/spi
+  %T/chips/cc2420/transmit
+  %T/chips/cc2420/unique
+  %T/chips/cc2420/security
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/dma
+  %T/chips/msp430/pins
+  %T/chips/msp430/timer
+  %T/chips/msp430/usart
+  %T/chips/msp430/sensors
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+  %T/lib/power
+  ) );
+
+@opts = qw(
+
+  -gcc=msp430-gcc
+  -mmcu=msp430x1611
+  -fnesc-target=msp430
+  -fnesc-no-debug
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=2 " .
+    "version=msp430-3.2.3 " .
+    "short=2,2 " .
+    "int=2,2 " .
+    "long=4,2 " .
+    "long_long=8,2 " .
+    "pointer=2,2 " .
+    "enum=2,2 " .
+    "float=4,2 " .
+    "double=4,2 " .
+    "long_double=4,2 " .
+    "void=1,1 " .
+    "fun=1,2 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
diff --git a/tos/platforms/span/ActiveMessageC.nc b/tos/platforms/span/ActiveMessageC.nc
new file mode 100644
index 00000000..05abd9b9
--- /dev/null
+++ b/tos/platforms/span/ActiveMessageC.nc
@@ -0,0 +1,86 @@
+// $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
+ *
+ */
+/**
+ * The Active Message layer on the SHIMMER platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Konrad Lorincz
+ */
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
diff --git a/tos/platforms/span/Ieee154MessageC.nc b/tos/platforms/span/Ieee154MessageC.nc
new file mode 100644
index 00000000..2acb1e4e
--- /dev/null
+++ b/tos/platforms/span/Ieee154MessageC.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+/**
+ *
+ * @author Stephen Dawson-Haggerty
+ */
+ 
+configuration Ieee154MessageC  {
+  provides {
+    interface SplitControl;
+
+    interface Resource as SendResource[uint8_t clientId];
+    interface Ieee154Send;
+    interface Receive as Ieee154Receive;
+
+    interface Ieee154Packet;
+    interface Packet;
+
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+    interface LowPowerListening;
+    interface PacketLink;
+  }
+
+} implementation {
+  components CC2420Ieee154MessageC as Msg;
+
+  SplitControl = Msg;
+  SendResource = Msg;
+  Ieee154Send  = Msg;
+  Ieee154Receive = Msg;
+  Ieee154Packet = Msg;
+  Packet = Msg;
+  
+  PacketAcknowledgements = Msg;
+  LinkPacketMetadata = Msg;
+  LowPowerListening = Msg;
+  PacketLink = Msg;
+}
diff --git a/tos/platforms/span/LedsP.nc b/tos/platforms/span/LedsP.nc
new file mode 100644
index 00000000..3f44d4fc
--- /dev/null
+++ b/tos/platforms/span/LedsP.nc
@@ -0,0 +1,127 @@
+// $Id: LedsP.nc,v 1.3 2010-06-29 22:07:55 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The implementation of the standard 3 LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ *
+ * @date   March 21, 2005
+ */
+/*
+ * one-led hacks for span, sma 6/2010
+ */
+
+module LedsP @safe() {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+}
+implementation {
+  command error_t Init.init() {
+    atomic {
+      dbg("Init", "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led0.set();
+    }
+    return SUCCESS;
+  }
+
+  /* Note: the call is inside the dbg, as it's typically a read of a volatile
+     location, so can't be deadcode eliminated */
+#define DBGLED(n) \
+  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");
+
+  async command void Leds.led0On() {
+    call Led0.clr();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Off() {
+    call Led0.set();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    DBGLED(0);
+  }
+
+  async command void Leds.led1On() {
+  }
+
+  async command void Leds.led1Off() {
+  }
+
+  async command void Leds.led1Toggle() {
+  }
+
+  async command void Leds.led2On() {
+  }
+
+  async command void Leds.led2Off() {
+  }
+
+  async command void Leds.led2Toggle() {
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (!call Led0.get()) {
+	rval |= LEDS_LED0;
+      }
+    }
+    return rval;
+  }
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/span/MoteClockC.nc b/tos/platforms/span/MoteClockC.nc
new file mode 100644
index 00000000..fe3a2855
--- /dev/null
+++ b/tos/platforms/span/MoteClockC.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id: MoteClockC.nc,v 1.1 2010-03-24 17:42:14 ayer1 Exp $
+ *
+ */
+
+ /**
+ * @author Vlado Handziski <handzisk@tkn.tu-berlind.de>
+ */
+ 
+configuration MoteClockC
+{
+  provides interface Init as MoteClockInit;
+}
+implementation
+
+{
+  components Msp430ClockC;
+  
+  MoteClockInit = Msp430ClockC.Init;
+}
diff --git a/tos/platforms/span/MotePlatformC.nc b/tos/platforms/span/MotePlatformC.nc
new file mode 100644
index 00000000..dcaaa838
--- /dev/null
+++ b/tos/platforms/span/MotePlatformC.nc
@@ -0,0 +1,172 @@
+/*
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author  Steve Ayer
+ *  @date    May, 2009
+ */
+
+module MotePlatformC {
+  provides interface Init;
+}
+implementation {
+  command error_t Init.init() {
+    
+    //LEDS
+    TOSH_MAKE_GREEN_LED_OUTPUT();
+    TOSH_SEL_GREEN_LED_IOFUNC();
+
+    //RADIO PINS
+    //CC2420 pins
+    TOSH_MAKE_RADIO_CSN_OUTPUT();
+    TOSH_SEL_RADIO_CSN_IOFUNC();
+    TOSH_SET_RADIO_CSN_PIN();
+
+    // should be reset_n
+    TOSH_MAKE_RADIO_RESET_OUTPUT();
+    TOSH_SEL_RADIO_RESET_IOFUNC();
+    TOSH_CLR_RADIO_RESET_PIN();
+
+    TOSH_MAKE_RADIO_CCA_INPUT();
+    TOSH_MAKE_RADIO_FIFO_INPUT();
+    TOSH_MAKE_RADIO_FIFOP_INPUT();
+    TOSH_MAKE_RADIO_SFD_INPUT();
+    TOSH_SEL_RADIO_CCA_IOFUNC();
+    TOSH_SEL_RADIO_FIFO_IOFUNC();
+    TOSH_SEL_RADIO_FIFOP_IOFUNC();
+    TOSH_SEL_RADIO_SFD_IOFUNC();
+
+    TOSH_MAKE_RADIO_VREF_OUTPUT();
+    TOSH_SEL_RADIO_VREF_IOFUNC();
+
+    // BSL Prog Pins tristate em
+    TOSH_MAKE_PROG_IN_OUTPUT();
+    TOSH_MAKE_PROG_OUT_OUTPUT();
+    TOSH_SEL_PROG_IN_IOFUNC();
+    TOSH_SEL_PROG_OUT_IOFUNC();
+
+    // USART lines, attached to a pullup and cc2420
+    TOSH_SEL_UCLK1_IOFUNC();
+    TOSH_MAKE_UCLK1_OUTPUT();
+    TOSH_SET_UCLK1_PIN();
+
+    TOSH_SEL_SIMO1_IOFUNC();
+    TOSH_MAKE_SIMO1_OUTPUT();
+    TOSH_SET_SIMO1_PIN();
+    TOSH_SEL_SOMI1_IOFUNC();
+    TOSH_MAKE_SOMI1_INPUT();
+
+    TOSH_SEL_ROSC_IOFUNC();
+    TOSH_MAKE_ROSC_INPUT();
+
+    // 1-wire function
+    TOSH_MAKE_ONEWIRE_INPUT();
+    TOSH_SEL_ONEWIRE_IOFUNC();
+
+    TOSH_MAKE_ADC_7_OUTPUT();
+    TOSH_SEL_ADC_7_IOFUNC();
+
+    TOSH_SEL_GIO0_IOFUNC();
+    TOSH_MAKE_GIO0_OUTPUT();
+    TOSH_SEL_GIO1_IOFUNC();
+    TOSH_MAKE_GIO1_OUTPUT();
+    TOSH_SEL_GIO2_IOFUNC();
+    TOSH_MAKE_GIO2_OUTPUT();
+
+    TOSH_SEL_FTDI_ADBUS_7_IOFUNC();
+    TOSH_MAKE_FTDI_ADBUS_7_INPUT();
+    TOSH_SEL_FTDI_ADBUS_3_IOFUNC();
+    TOSH_MAKE_FTDI_ADBUS_7_INPUT();
+
+    // idle expansion header pins
+    TOSH_MAKE_SER0_CTS_OUTPUT();
+    TOSH_SEL_SER0_CTS_IOFUNC();
+    TOSH_MAKE_SER0_RTS_OUTPUT();
+    TOSH_SEL_SER0_RTS_IOFUNC();
+
+    TOSH_MAKE_UTXD0_OUTPUT();
+    TOSH_SEL_UTXD0_IOFUNC();
+    TOSH_MAKE_URXD0_OUTPUT();
+    TOSH_SEL_URXD0_IOFUNC();
+
+    /*
+     * assignments for nc pins
+     */
+    TOSH_MAKE_NC_GIO0_OUTPUT();
+    TOSH_SEL_NC_GIO0_IOFUNC();
+    TOSH_MAKE_NC_GIO1_OUTPUT();
+    TOSH_SEL_NC_GIO1_IOFUNC();
+    TOSH_MAKE_NC_CS_OUTPUT();
+    TOSH_SEL_NC_CS_IOFUNC();
+    TOSH_MAKE_SIMO0_INPUT();
+    TOSH_SEL_SIMO0_IOFUNC();
+    TOSH_MAKE_SOMI0_INPUT();
+    TOSH_SEL_SOMI0_IOFUNC();
+    TOSH_MAKE_UTXD1_OUTPUT();
+    TOSH_SEL_UTXD1_IOFUNC();
+    TOSH_MAKE_URXD1_OUTPUT();
+    TOSH_SEL_URXD1_IOFUNC();
+    TOSH_MAKE_NC_LED0_INPUT();
+    TOSH_SEL_NC_LED0_IOFUNC();
+    TOSH_MAKE_NC_LED1_OUTPUT();
+    TOSH_SEL_NC_LED1_IOFUNC();
+    TOSH_MAKE_NC_LED2_OUTPUT();
+    TOSH_SEL_NC_LED2_IOFUNC();
+    TOSH_MAKE_NC_ACCEL0_OUTPUT();
+    TOSH_SEL_NC_ACCEL0_IOFUNC();
+    TOSH_MAKE_NC_ACCEL1_OUTPUT();
+    TOSH_SEL_NC_ACCEL1_IOFUNC();
+    TOSH_MAKE_NC_ACCELS_OUTPUT();
+    TOSH_SEL_NC_ACCELS_IOFUNC();
+    TOSH_MAKE_NC_TB0_OUTPUT();
+    TOSH_SEL_NC_TB0_IOFUNC();
+    TOSH_MAKE_NC_GIO2_OUTPUT();
+    TOSH_SEL_NC_GIO2_IOFUNC();
+    TOSH_MAKE_NC_SVS_OUTPUT();
+    TOSH_SEL_NC_SVS_IOFUNC();
+    TOSH_MAKE_NC_ADC_0_OUTPUT();
+    TOSH_SEL_NC_ADC_0_IOFUNC();
+    TOSH_MAKE_NC_ADC_1_OUTPUT();
+    TOSH_SEL_NC_ADC_1_IOFUNC();
+    TOSH_MAKE_NC_ADC_2_OUTPUT();
+    TOSH_SEL_NC_ADC_2_IOFUNC();
+    TOSH_MAKE_NC_ADC_3_OUTPUT();
+    TOSH_SEL_NC_ADC_3_IOFUNC();
+    TOSH_MAKE_NC_ADC_4_OUTPUT();
+    TOSH_SEL_NC_ADC_4_IOFUNC();
+    TOSH_MAKE_NC_ADC_5_OUTPUT();
+    TOSH_SEL_NC_ADC_5_IOFUNC();
+    TOSH_MAKE_NC_ADC_6_OUTPUT();
+    TOSH_SEL_NC_ADC_6_IOFUNC();
+
+    return SUCCESS;
+
+  }
+
+}
diff --git a/tos/platforms/span/Msp430Timer32khzMapC.nc b/tos/platforms/span/Msp430Timer32khzMapC.nc
new file mode 100644
index 00000000..fb6645e8
--- /dev/null
+++ b/tos/platforms/span/Msp430Timer32khzMapC.nc
@@ -0,0 +1,89 @@
+//$Id: Msp430Timer32khzMapC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * MSP430Timer32khzMapC presents as paramaterized interfaces all of
+ * the 32khz hardware timers on the MSP430 that are available for
+ * compile time allocation by "new Alarm32khz16C()", "new
+ * AlarmMilli32C()", and so on.  
+ *
+ * Platforms based on the MSP430 are * encouraged to copy in and
+ * override this file, presenting only the * hardware timers that are
+ * available for allocation on that platform.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
+ * port to span
+ * @author Steve Ayer
+ * @date   January, 2010
+ */
+
+configuration Msp430Timer32khzMapC
+{
+  provides interface Msp430Timer[ uint8_t id ];
+  provides interface Msp430TimerControl[ uint8_t id ];
+  provides interface Msp430Compare[ uint8_t id ];
+}
+implementation
+{
+  components Msp430TimerC;
+
+  // Timer pin B0 is used by the CC2420 radio's SFD pin
+  // this is the only difference between the default 32khz map
+  // and the map on span
+
+  Msp430Timer[0] = Msp430TimerC.TimerB;
+  Msp430TimerControl[0] = Msp430TimerC.ControlB1;
+  Msp430Compare[0] = Msp430TimerC.CompareB1;
+
+  Msp430Timer[1] = Msp430TimerC.TimerB;
+  Msp430TimerControl[1] = Msp430TimerC.ControlB2;
+  Msp430Compare[1] = Msp430TimerC.CompareB2;
+
+  Msp430Timer[2] = Msp430TimerC.TimerB;
+  Msp430TimerControl[2] = Msp430TimerC.ControlB3;
+  Msp430Compare[2] = Msp430TimerC.CompareB3;
+
+  Msp430Timer[3] = Msp430TimerC.TimerB;
+  Msp430TimerControl[3] = Msp430TimerC.ControlB4;
+  Msp430Compare[3] = Msp430TimerC.CompareB4;
+
+  Msp430Timer[4] = Msp430TimerC.TimerB;
+  Msp430TimerControl[4] = Msp430TimerC.ControlB5;
+  Msp430Compare[4] = Msp430TimerC.CompareB5;
+
+  Msp430Timer[5] = Msp430TimerC.TimerB;
+  Msp430TimerControl[5] = Msp430TimerC.ControlB6;
+  Msp430Compare[5] = Msp430TimerC.CompareB6;
+}
+
diff --git a/tos/platforms/span/PlatformC.nc b/tos/platforms/span/PlatformC.nc
new file mode 100644
index 00000000..fdd07814
--- /dev/null
+++ b/tos/platforms/span/PlatformC.nc
@@ -0,0 +1,49 @@
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre and Cory Sharp
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
+ */
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+}
+implementation
+{
+  components PlatformP, MotePlatformC, MoteClockC;
+
+  Init = PlatformP;
+  PlatformP.MoteClockInit -> MoteClockC;
+  PlatformP.MoteInit -> MotePlatformC;
+}
diff --git a/tos/platforms/span/PlatformLedsC.nc b/tos/platforms/span/PlatformLedsC.nc
new file mode 100644
index 00000000..0015985f
--- /dev/null
+++ b/tos/platforms/span/PlatformLedsC.nc
@@ -0,0 +1,69 @@
+// $Id: PlatformLedsC.nc,v 1.3 2010-06-29 22:07:55 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ * @version $Revision: 1.3 $ $Date: 2010-06-29 22:07:55 $
+ */
+/*
+ * one-led hacks for span, sma 6/2010
+ */
+#include "hardware.h"
+
+configuration PlatformLedsC {
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation
+{
+  components 
+      HplMsp430GeneralIOC as GeneralIOC
+    , new Msp430GpioC() as Led0Impl
+    , new Msp430GpioC() as Led1Impl
+    , new Msp430GpioC() as Led2Impl
+    ;
+  components PlatformP;
+
+  Init = PlatformP.LedsInit;
+
+  Led0 = Led0Impl;
+  Led0Impl -> GeneralIOC.Port43;
+
+  Led1 = Led1Impl;
+
+  Led2 = Led2Impl;
+
+}
+
diff --git a/tos/platforms/span/PlatformP.nc b/tos/platforms/span/PlatformP.nc
new file mode 100644
index 00000000..b8dc9438
--- /dev/null
+++ b/tos/platforms/span/PlatformP.nc
@@ -0,0 +1,19 @@
+#include "hardware.h"
+
+module PlatformP{
+  provides interface Init;
+  uses interface Init as MoteClockInit;
+  uses interface Init as MoteInit;
+  uses interface Init as LedsInit;
+}
+implementation {
+  command error_t Init.init() {
+    call MoteClockInit.init();
+    call MoteInit.init();
+    call LedsInit.init();
+    return SUCCESS;
+  }
+
+  default command error_t LedsInit.init() { return SUCCESS; }
+
+}
diff --git a/tos/platforms/span/PlatformSerialC.nc b/tos/platforms/span/PlatformSerialC.nc
new file mode 100644
index 00000000..0240658f
--- /dev/null
+++ b/tos/platforms/span/PlatformSerialC.nc
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2008
+ *	The President and Fellows of Harvard College.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/**
+ * From Konrad's SHIMMER conversbion
+ *
+ * @author Konrad Lorincz
+ * @date May 14, 2008
+ */
+
+configuration PlatformSerialC 
+{
+    provides interface StdControl;
+    provides interface UartStream;
+    provides interface UartByte;
+}
+implementation 
+{
+    components new Msp430Uart0C() as UartC;
+    UartStream = UartC;  
+    UartByte = UartC;
+  
+    components SpanSerialP;
+    StdControl = SpanSerialP;
+    SpanSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
+    SpanSerialP.Resource -> UartC.Resource;
+}
diff --git a/tos/platforms/span/SpanSerialP.nc b/tos/platforms/span/SpanSerialP.nc
new file mode 100644
index 00000000..0879974e
--- /dev/null
+++ b/tos/platforms/span/SpanSerialP.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2008
+ *	The President and Fellows of Harvard College.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/**
+ * Conversion of Konrad's conversion
+ *
+ * @author Konrad Lorincz
+ * @date May 14, 2008
+ * @author Steve Ayer
+ * @date December 2009
+ */
+module SpanSerialP 
+{
+    provides interface StdControl;
+    provides interface Msp430UartConfigure;
+    uses interface Resource;
+}
+implementation 
+{
+    msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} };
+
+    command error_t StdControl.start()
+    {
+        return call Resource.immediateRequest();
+    }
+
+    command error_t StdControl.stop()
+    {
+        call Resource.release();
+        return SUCCESS;
+    }
+
+    event void Resource.granted(){}
+
+    async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() 
+    {
+        return &msp430_uart_telos_config;
+    }
+}
diff --git a/tos/platforms/span/TimeSyncMessageC.nc b/tos/platforms/span/TimeSyncMessageC.nc
new file mode 100644
index 00000000..9580f01b
--- /dev/null
+++ b/tos/platforms/span/TimeSyncMessageC.nc
@@ -0,0 +1,95 @@
+// $Id: TimeSyncMessageC.nc,v 1.2 2010-06-29 22:07:55 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *
+ * The Active Message layer on the shimmer platform. This is a naming wrapper
+ * around the CC2420 Active Message layer that implemets timesync interface (TEP 133).
+ *
+ * @author Konrad Lorincz
+ * @author Brano Kusy
+ * @date June 19 2005
+ */
+
+configuration TimeSyncMessageC {
+  provides
+  {
+    interface SplitControl;
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface LowPowerListening;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+
+    interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[am_id_t id];
+    interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+
+    interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+    interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+  }
+}
+implementation {
+  components CC2420TimeSyncMessageC as AM;
+
+  SplitControl = AM;
+
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+  LowPowerListening = AM;
+
+  TimeSyncAMSend32khz       = AM;
+  TimeSyncAMSendMilli       = AM;
+  TimeSyncPacket32khz       = AM;
+  TimeSyncPacketMilli       = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
+
diff --git a/tos/platforms/span/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/span/chips/cc2420/HplCC2420AlarmC.nc
new file mode 100644
index 00000000..1c1a0838
--- /dev/null
+++ b/tos/platforms/span/chips/cc2420/HplCC2420AlarmC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of 32khz alarms for the ChipCon CC2420 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2010-03-24 17:42:14 $
+ */
+
+generic configuration HplCC2420AlarmC() {
+
+  provides interface Init;
+  provides interface Alarm<T32khz,uint32_t> as Alarm32khz32;
+
+}
+
+implementation {
+
+  components new Alarm32khz32C();
+
+  Init = Alarm32khz32C;
+  Alarm32khz32 = Alarm32khz32C;
+  
+}
diff --git a/tos/platforms/span/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/span/chips/cc2420/HplCC2420InterruptsC.nc
new file mode 100644
index 00000000..dc852709
--- /dev/null
+++ b/tos/platforms/span/chips/cc2420/HplCC2420InterruptsC.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of interrupts and captures for the ChipCon
+ * CC2420 radio connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2010-03-24 17:42:14 $
+ */
+/**
+ * Ported to the span platform. 
+ *
+ * @author Steve Ayer
+ * @date January, 2010
+ */
+
+configuration HplCC2420InterruptsC {
+
+  provides interface GpioCapture as CaptureSFD;
+  provides interface GpioInterrupt as InterruptCCA;
+  provides interface GpioInterrupt as InterruptFIFOP;
+
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components Msp430TimerC;
+  components new GpioCaptureC() as CaptureSFDC;
+  CaptureSFDC.Msp430TimerControl -> Msp430TimerC.ControlB0;
+  CaptureSFDC.Msp430Capture -> Msp430TimerC.CaptureB0;
+  CaptureSFDC.GeneralIO -> GeneralIOC.Port40;
+
+  components HplMsp430InterruptC;
+  components new Msp430InterruptC() as InterruptCCAC;
+  components new Msp430InterruptC() as InterruptFIFOPC;
+
+  InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port26;
+  InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port23;
+
+  CaptureSFD = CaptureSFDC.Capture;
+  InterruptCCA = InterruptCCAC.Interrupt;
+  InterruptFIFOP = InterruptFIFOPC.Interrupt;
+}
diff --git a/tos/platforms/span/chips/cc2420/HplCC2420InterruptsP.nc b/tos/platforms/span/chips/cc2420/HplCC2420InterruptsP.nc
new file mode 100644
index 00000000..3da44d56
--- /dev/null
+++ b/tos/platforms/span/chips/cc2420/HplCC2420InterruptsP.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2010, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @author Steve Ayer
+ * @date   January, 2010
+ *
+ * this implements an interrupt-driven capture interface for the cc2420
+ * tx-mode use of sfd.  span does not have sfd routed to a timer capture pin
+ * on the msp430, so cc2420's capture mechanism fails.  
+ * this module will trigger a capture.captured event after receiving the
+ * appropriate interrupt from the span sfd pin (2.7)
+ */
+
+module HplCC2420InterruptsP @safe() {
+  provides{
+    interface GpioCapture as CaptureSFD;
+  }
+
+  uses{
+    interface GpioInterrupt as InterruptSFD;
+    interface LocalTime<TMilli>;
+  }
+}
+
+implementation {
+  async command error_t CaptureSFD.captureRisingEdge() { 
+    call InterruptSFD.enableRisingEdge();
+    return SUCCESS;
+  }
+
+  async command error_t CaptureSFD.captureFallingEdge() { 
+    call InterruptSFD.enableFallingEdge();
+    return SUCCESS;
+  }
+  
+  async command void CaptureSFD.disable() {
+    call InterruptSFD.disable();
+  }
+
+  async event void InterruptSFD.fired() {
+    uint32_t t = call LocalTime.get();
+
+    signal CaptureSFD.captured((uint16_t)(t & 0x0000ffff));
+  }
+}
+
diff --git a/tos/platforms/span/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/span/chips/cc2420/HplCC2420PinsC.nc
new file mode 100644
index 00000000..fb16a061
--- /dev/null
+++ b/tos/platforms/span/chips/cc2420/HplCC2420PinsC.nc
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of general-purpose I/O for the ChipCon CC2420
+ * radio connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2010-03-24 17:42:14 $
+ */
+/**
+ * Ported to the span
+ *
+ * @author Konrad Lorincz
+ * @date May 14, 2008
+ * @author Steve Ayer
+ * @date December, 2009
+ */
+
+configuration HplCC2420PinsC {
+
+  provides interface GeneralIO as CCA;
+  provides interface GeneralIO as CSN;
+  provides interface GeneralIO as FIFO;
+  provides interface GeneralIO as FIFOP;
+  provides interface GeneralIO as RSTN;
+  provides interface GeneralIO as SFD;
+  provides interface GeneralIO as VREN;
+
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components new Msp430GpioC() as CCAM;
+  components new Msp430GpioC() as CSNM;
+  components new Msp430GpioC() as FIFOM;
+  components new Msp430GpioC() as FIFOPM;
+  components new Msp430GpioC() as RSTNM;
+  components new Msp430GpioC() as SFDM;
+  components new Msp430GpioC() as VRENM;
+
+  CCAM -> GeneralIOC.Port26;
+  CSNM -> GeneralIOC.Port54;
+  FIFOM -> GeneralIOC.Port24;
+  FIFOPM -> GeneralIOC.Port23;
+  RSTNM -> GeneralIOC.Port33;
+  //SFDM -> GeneralIOC.Port27;
+  SFDM -> GeneralIOC.Port40;
+  VRENM -> GeneralIOC.Port55;
+
+  CCA = CCAM;
+  CSN = CSNM;
+  FIFO = FIFOM;
+  FIFOP = FIFOPM;
+  RSTN = RSTNM;
+  SFD = SFDM;
+  VREN = VRENM;
+  
+}
+
diff --git a/tos/platforms/span/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/span/chips/cc2420/HplCC2420SpiC.nc
new file mode 100644
index 00000000..385e6b87
--- /dev/null
+++ b/tos/platforms/span/chips/cc2420/HplCC2420SpiC.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of the SPI bus for the ChipCon CC2420 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.1 $ $Date: 2010-03-24 17:42:14 $
+ */
+/**
+ * Ported to the SHIMMER platform. 
+ *
+ * @author Konrad Lorincz
+ */
+
+generic configuration HplCC2420SpiC() {
+  
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+  
+}
+
+implementation {
+
+  components new Msp430Spi1C() as SpiC;
+  
+  Resource = SpiC;
+  SpiByte = SpiC;
+  SpiPacket = SpiC;
+  
+}
+
diff --git a/tos/platforms/span/chips/msp430/msp430hardware.h b/tos/platforms/span/chips/msp430/msp430hardware.h
new file mode 100644
index 00000000..93123a99
--- /dev/null
+++ b/tos/platforms/span/chips/msp430/msp430hardware.h
@@ -0,0 +1,299 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// @author Vlado Handziski <handzisk@tkn.tu-berlin.de>
+// @author Joe Polastre <polastre@cs.berkeley.edu>
+// @author Cory Sharp <cssharp@eecs.berkeley.edu>
+
+#ifndef _H_msp430hardware_h
+#define _H_msp430hardware_h
+
+#include <io.h>
+#include <signal.h>
+#include "msp430regtypes.h"
+#include "Msp430DcoSpec.h"
+
+// CPU memory-mapped register access will cause nesc to issue race condition
+// warnings.  Race conditions are a significant conern when accessing CPU
+// memory-mapped registers, because they can change even while interrupts
+// are disabled.  This means that the standard nesc tools for resolving race
+// conditions, atomic statements that disable interrupt handling, do not
+// resolve CPU register race conditions.  So, CPU registers access must be
+// treated seriously and carefully.
+
+// The macro MSP430REG_NORACE allows individual modules to internally
+// redeclare CPU registers as norace, eliminating nesc's race condition
+// warnings for their access.  This macro should only be used after the
+// specific CPU register use has been verified safe and correct.  Example
+// use:
+//
+//    module MyLowLevelModule
+//    {
+//      // ...
+//    }
+//    implementation
+//    {
+//      MSP430REG_NORACE(TACCTL0);
+//      // ...
+//    }
+
+#undef norace
+
+#define MSP430REG_NORACE_EXPAND(type,name,addr) \
+norace static volatile type name asm(#addr)
+
+#define MSP430REG_NORACE3(type,name,addr) \
+MSP430REG_NORACE_EXPAND(type,name,addr)
+
+// MSP430REG_NORACE and MSP430REG_NORACE2 presume naming conventions among
+// type, name, and addr, which are defined in the local header
+// msp430regtypes.h and mspgcc's header io.h and its children.
+
+#define MSP430REG_NORACE2(rename,name) \
+MSP430REG_NORACE3(TYPE_##name,rename,name##_)
+
+#define MSP430REG_NORACE(name) \
+MSP430REG_NORACE3(TYPE_##name,name,name##_)
+
+// Avoid the type-punned pointer warnings from gcc 3.3, which are warning about
+// creating potentially broken object code.  Union casts are the appropriate work
+// around.  Unfortunately, they require a function definiton.
+#define DEFINE_UNION_CAST(func_name,to_type,from_type) \
+to_type func_name(from_type x) @safe() { union {from_type f; to_type t;} c = {f:x}; return c.t; }
+
+// redefine ugly defines from msp-gcc
+#ifndef DONT_REDEFINE_SR_FLAGS
+#undef C
+#undef Z
+#undef N
+#undef V
+#undef GIE
+#undef CPUOFF
+#undef OSCOFF
+#undef SCG0
+#undef SCG1
+#undef LPM0_bits
+#undef LPM1_bits
+#undef LPM2_bits
+#undef LPM3_bits
+#undef LPM4_bits
+#define SR_C       0x0001
+#define SR_Z       0x0002
+#define SR_N       0x0004
+#define SR_V       0x0100
+#define SR_GIE     0x0008
+#define SR_CPUOFF  0x0010
+#define SR_OSCOFF  0x0020
+#define SR_SCG0    0x0040
+#define SR_SCG1    0x0080
+#define LPM0_bits           SR_CPUOFF
+#define LPM1_bits           SR_SCG0+SR_CPUOFF
+#define LPM2_bits           SR_SCG1+SR_CPUOFF
+#define LPM3_bits           SR_SCG1+SR_SCG0+SR_CPUOFF
+#define LPM4_bits           SR_SCG1+SR_SCG0+SR_OSCOFF+SR_CPUOFF
+#endif//DONT_REDEFINE_SR_FLAGS
+
+#ifdef interrupt
+#undef interrupt
+#endif
+
+#ifdef wakeup
+#undef wakeup
+#endif
+
+#ifdef signal
+#undef signal
+#endif
+
+
+// Re-definitions for safe tinyOS
+// These rely on io.h being included at the top of this file
+// thus pulling the affected header files before the re-definitions
+#ifdef SAFE_TINYOS
+#undef ADC12MEM
+#define ADC12MEM            TCAST(int* ONE, ADC12MEM_) /* ADC12 Conversion Memory (for C) */
+#undef ADC12MCTL
+#define ADC12MCTL           TCAST(char * ONE, ADC12MCTL_)
+#endif
+
+// define platform constants that can be changed for different compilers
+// these are all msp430-gcc specific (add as necessary)
+
+#ifdef __msp430_headers_adc10_h
+#define __msp430_have_adc10
+#endif
+
+#ifdef __msp430_headers_adc12_h
+#define __msp430_have_adc12
+#endif
+
+// backwards compatibility to older versions of the header files
+#ifdef __MSP430_HAS_I2C__
+#define __msp430_have_usart0_with_i2c
+#endif
+
+// I2CBusy flag is not defined by current MSP430-GCC
+#ifdef __msp430_have_usart0_with_i2c
+#ifndef I2CBUSY
+#define I2CBUSY   (0x01 << 5)
+#endif
+MSP430REG_NORACE2(U0CTLnr,U0CTL);
+MSP430REG_NORACE2(I2CTCTLnr,I2CTCTL);
+MSP430REG_NORACE2(I2CDCTLnr,I2CDCTL);
+#endif
+
+// The signal attribute has opposite meaning in msp430-gcc than in avr-gcc
+#define TOSH_SIGNAL(signame) \
+  void sig_##signame() __attribute__((interrupt (signame), wakeup)) @C()
+
+// TOSH_INTERRUPT allows nested interrupts
+#define TOSH_INTERRUPT(signame) \
+  void isr_##signame() __attribute__((interrupt (signame), signal, wakeup)) @C()
+
+inline void TOSH_wait(void)
+{
+  nop(); nop();
+}
+
+// #define TOSH_CYCLE_TIME_NS 250
+// Our worst case is 250 ns = 1 cycle.
+
+inline void TOSH_wait_250ns(void)
+{
+  nop();
+}
+
+/* 
+   Following the suggestion of the mspgcc.sourceforge.net site
+   for an intelligent pause routine
+*/
+void brief_pause(register unsigned int n)
+{
+  asm volatile(	"1: \n\t"
+		"dec	%0 \n\t"
+		"jne	1b\n\t"
+		:  "+r" (n));
+}
+
+#define TOSH_uwait(n)   brief_pause((((unsigned long long)n) * TARGET_DCO_KHZ * 1024 / 1000000 - 2) / 3)
+
+#define SET_FLAG(port, flag) ((port) |= (flag))
+#define CLR_FLAG(port, flag) ((port) &= ~(flag))
+#define READ_FLAG(port, flag) ((port) & (flag))
+
+// TOSH_ASSIGN_PIN creates functions that are effectively marked as
+// "norace".  This means race conditions that result from their use will not
+// be detectde by nesc.
+
+#define TOSH_ASSIGN_PIN_HEX(name, port, hex) \
+void TOSH_SET_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r |= hex; } \
+void TOSH_CLR_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##OUT); r &= ~hex; } \
+void TOSH_TOGGLE_##name##_PIN() @safe(){ MSP430REG_NORACE2(r,P##port##OUT); r ^= hex; } \
+uint8_t TOSH_READ_##name##_PIN() @safe() { MSP430REG_NORACE2(r,P##port##IN); return (r & hex); } \
+void TOSH_MAKE_##name##_OUTPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r |= hex; } \
+void TOSH_MAKE_##name##_INPUT() @safe() { MSP430REG_NORACE2(r,P##port##DIR); r &= ~hex; } \
+void TOSH_SEL_##name##_MODFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r |= hex; } \
+void TOSH_SEL_##name##_IOFUNC() @safe() { MSP430REG_NORACE2(r,P##port##SEL); r &= ~hex; }
+
+#define TOSH_ASSIGN_PIN(name, port, bit) \
+TOSH_ASSIGN_PIN_HEX(name,port,(1<<(bit)))
+
+typedef uint8_t mcu_power_t @combine("mcombine");
+mcu_power_t mcombine(mcu_power_t m1, mcu_power_t m2) @safe() {
+  return (m1 < m2) ? m1: m2;
+}
+enum {
+  MSP430_POWER_ACTIVE = 0,
+  MSP430_POWER_LPM0   = 1,
+  MSP430_POWER_LPM1   = 2,
+  MSP430_POWER_LPM2   = 3,
+  MSP430_POWER_LPM3   = 4,
+  MSP430_POWER_LPM4   = 5
+};
+
+void __nesc_disable_interrupt(void) @safe()
+{
+  dint();
+  nop();
+}
+
+void __nesc_enable_interrupt(void) @safe()
+{
+  eint();
+}
+
+typedef bool __nesc_atomic_t;
+__nesc_atomic_t __nesc_atomic_start(void);
+void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts);
+
+#ifndef NESC_BUILD_BINARY
+/* @spontaneous() functions should not be included when NESC_BUILD_BINARY
+   is #defined, to avoid duplicate functions definitions when binary
+   components are used. Such functions do need a prototype in all cases,
+   though. */
+__nesc_atomic_t __nesc_atomic_start(void) @spontaneous() @safe()
+{
+  __nesc_atomic_t result = ((READ_SR & SR_GIE) != 0);
+  __nesc_disable_interrupt();
+  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
+  return result;
+}
+
+void __nesc_atomic_end(__nesc_atomic_t reenable_interrupts) @spontaneous() @safe()
+{
+  asm volatile("" : : : "memory"); /* ensure atomic section effect visibility */
+  if( reenable_interrupts )
+    __nesc_enable_interrupt();
+}
+#endif
+
+/* Floating-point network-type support.
+   These functions must convert to/from a 32-bit big-endian integer that follows
+   the layout of Java's java.lang.float.floatToRawIntBits method.
+   Conveniently, for the MSP430 family, this is a straight byte copy...
+*/
+
+typedef float nx_float __attribute__((nx_base_be(afloat)));
+
+inline float __nesc_ntoh_afloat(const void *COUNT(sizeof(float)) source) @safe() {
+  float f;
+  memcpy(&f, source, sizeof(float));
+  return f;
+}
+
+inline float __nesc_hton_afloat(void *COUNT(sizeof(float)) target, float value) @safe() {
+  memcpy(target, &value, sizeof(float));
+  return value;
+}
+
+#endif//_H_msp430hardware_h
+
diff --git a/tos/platforms/span/hardware.h b/tos/platforms/span/hardware.h
new file mode 100644
index 00000000..14c3749f
--- /dev/null
+++ b/tos/platforms/span/hardware.h
@@ -0,0 +1,134 @@
+/*
+ * Copyright (c) 2009, Shimmer Research, Ltd.
+ * All rights reserved
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above
+ *       copyright notice, this list of conditions and the following
+ *       disclaimer in the documentation and/or other materials provided
+ *       with the distribution.
+ *     * Neither the name of Shimmer Research, Ltd. nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author  Steve Ayer
+ *  @date    May, 2009
+ */
+
+#ifndef _H_hardware_h
+#define _H_hardware_h
+
+#include "msp430hardware.h"
+
+//#include "CC2420Const.h"
+
+// enum so components can override power saving,
+// as per TEP 112.
+enum {
+  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
+};
+
+TOSH_ASSIGN_PIN(GREEN_LED,  4, 3);
+
+// CC2420 RADIO #defines
+TOSH_ASSIGN_PIN(RADIO_FIFOP,     2, 3);
+TOSH_ASSIGN_PIN(RADIO_FIFO,      2, 4);
+TOSH_ASSIGN_PIN(RADIO_CCA,       2, 6);
+TOSH_ASSIGN_PIN(RADIO_SFD,       2, 7);
+
+TOSH_ASSIGN_PIN(RADIO_VREF,      5, 5);   
+
+TOSH_ASSIGN_PIN(RADIO_SIMO1,     5, 1);
+TOSH_ASSIGN_PIN(RADIO_SOMI1,     5, 2);
+TOSH_ASSIGN_PIN(RADIO_CSN,       5, 4);
+TOSH_ASSIGN_PIN(RADIO_RESET,     3, 3);
+
+// for mainstream tos...
+TOSH_ASSIGN_PIN(CC_FIFOP, 2, 3);
+TOSH_ASSIGN_PIN(CC_FIFO,  2, 4);
+TOSH_ASSIGN_PIN(CC_SFD,   2, 7);
+TOSH_ASSIGN_PIN(CC_VREN,  5, 5);
+TOSH_ASSIGN_PIN(CC_RSTN,  3, 3);
+
+
+// UART pins
+// SPI1 attached to cc2420
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+
+// 1-Wire
+TOSH_ASSIGN_PIN(ONEWIRE, 5, 6);
+
+//BSL Pins
+TOSH_ASSIGN_PIN(PROG_OUT,  1, 1);
+TOSH_ASSIGN_PIN(PROG_IN,   2, 2);
+
+// ADC lines on the testpoints
+TOSH_ASSIGN_PIN(ADC_7,   6, 7);
+TOSH_ASSIGN_PIN(DAC1_AN, 6, 7);
+
+// connected to external UART 
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);
+TOSH_ASSIGN_PIN(URXD1, 3, 7);
+
+// GIO pins
+TOSH_ASSIGN_PIN(SER0_RTS, 1, 3);
+TOSH_ASSIGN_PIN(SER0_CTS, 1, 4);
+
+TOSH_ASSIGN_PIN(ROSC, 2, 5);
+
+TOSH_ASSIGN_PIN(GIO0, 1, 0);
+TOSH_ASSIGN_PIN(GIO1, 1, 5);
+TOSH_ASSIGN_PIN(GIO2, 1, 6);
+
+TOSH_ASSIGN_PIN(FTDI_ADBUS_7, 1, 2);
+TOSH_ASSIGN_PIN(FTDI_ADBUS_3, 2, 0);
+
+/*
+ * NC Pins below
+ */
+TOSH_ASSIGN_PIN(NC_GIO0,     1, 7);
+TOSH_ASSIGN_PIN(NC_GIO1,     2, 1);
+TOSH_ASSIGN_PIN(NC_CS,       3, 0);
+TOSH_ASSIGN_PIN(SIMO0,       3, 1);
+TOSH_ASSIGN_PIN(SOMI0,       3, 2);
+TOSH_ASSIGN_PIN(UCLK0,       3, 3);
+TOSH_ASSIGN_PIN(NC_LED0,     4, 0);
+TOSH_ASSIGN_PIN(NC_LED1,     4, 1);
+TOSH_ASSIGN_PIN(NC_LED2,     4, 2);
+TOSH_ASSIGN_PIN(NC_ACCEL0,   4, 4);
+TOSH_ASSIGN_PIN(NC_ACCEL1,   4, 5);
+TOSH_ASSIGN_PIN(NC_ACCELS,   4, 6);
+TOSH_ASSIGN_PIN(NC_TB0,      4, 7);
+TOSH_ASSIGN_PIN(NC_GIO2,     5, 0);
+TOSH_ASSIGN_PIN(NC_SVS,      5, 7);
+TOSH_ASSIGN_PIN(NC_ADC_0,    6, 0);
+TOSH_ASSIGN_PIN(NC_ADC_1,    6, 1);
+TOSH_ASSIGN_PIN(NC_ADC_2,    6, 2);
+TOSH_ASSIGN_PIN(NC_ADC_3,    6, 3);
+TOSH_ASSIGN_PIN(NC_ADC_4,    6, 4);
+TOSH_ASSIGN_PIN(NC_ADC_5,    6, 5);
+TOSH_ASSIGN_PIN(NC_ADC_6,     6, 6);
+
+#endif // _H_hardware_h
+
diff --git a/tos/platforms/span/platform.h b/tos/platforms/span/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/span/platform_message.h b/tos/platforms/span/platform_message.h
new file mode 100644
index 00000000..3ef102d6
--- /dev/null
+++ b/tos/platforms/span/platform_message.h
@@ -0,0 +1,70 @@
+/* $Id: platform_message.h,v 1.2 2010-06-29 22:07:55 scipio Exp $
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific CC1000 packet structures.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.2 $ $Date: 2010-06-29 22:07:55 $
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include <CC2420.h>
+#include <Serial.h>
+
+typedef union message_header {
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union TOSRadioFooter {
+  cc2420_footer_t cc2420;
+} message_footer_t;
+
+typedef union TOSRadioMetadata {
+  cc2420_metadata_t cc2420;
+  serial_metadata_t serial;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/telosa/.platform b/tos/platforms/telosa/.platform
new file mode 100644
index 00000000..dc6d34bd
--- /dev/null
+++ b/tos/platforms/telosa/.platform
@@ -0,0 +1,78 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+
+push( @includes, qw(
+
+  %T/platforms/telosa
+  %T/platforms/telosa/chips/cc2420
+  %T/platforms/telosa/chips/s1087
+  %T/platforms/telosa/chips/s10871
+  %T/platforms/telosa/chips/sht11
+  %T/platforms/telosa/chips/at45db
+  %T/chips/cc2420
+  %T/chips/cc2420/alarm
+  %T/chips/cc2420/control
+  %T/chips/cc2420/csma
+  %T/chips/cc2420/interfaces
+  %T/chips/cc2420/link
+  %T/chips/cc2420/lowpan
+  %T/chips/cc2420/lpl
+  %T/chips/cc2420/packet
+  %T/chips/cc2420/receive
+  %T/chips/cc2420/spi
+  %T/chips/cc2420/transmit
+  %T/chips/cc2420/unique
+  %T/chips/at45db
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/pins
+  %T/chips/msp430/timer
+  %T/chips/msp430/usart
+  %T/chips/msp430/sensors
+  %T/chips/sht11  
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+  %T/lib/power
+
+) );
+
+@opts = qw(
+
+  -gcc=msp430-gcc
+  -mmcu=msp430x149
+  -fnesc-target=msp430
+  -fnesc-no-debug
+
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=2 " .
+    "version=msp430-3.2.3 " .
+    "short=2,2 " .
+    "int=2,2 " .
+    "long=4,2 " .
+    "long_long=8,2 " .
+    "pointer=2,2 " .
+    "enum=2,2 " .
+    "float=4,2 " .
+    "double=4,2 " .
+    "long_double=4,2 " .
+    "void=1,1 " .
+    "fun=1,2 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
+    
\ No newline at end of file
diff --git a/tos/platforms/telosa/ActiveMessageC.nc b/tos/platforms/telosa/ActiveMessageC.nc
new file mode 100644
index 00000000..0d8bf71a
--- /dev/null
+++ b/tos/platforms/telosa/ActiveMessageC.nc
@@ -0,0 +1,91 @@
+// $Id: ActiveMessageC.nc,v 1.9 2010-06-29 22:07:55 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.9 2010-06-29 22:07:55 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the Telos platform. This is a naming wrapper
+ * around the CC2420 Active Message layer.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.9 $ $Date: 2010-06-29 22:07:55 $
+ */
+#include "Timer.h"
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl;
+
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+    interface LowPowerListening;
+  }
+}
+implementation {
+  components CC2420ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+  LowPowerListening = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
diff --git a/tos/platforms/telosa/DemoSensorC.nc b/tos/platforms/telosa/DemoSensorC.nc
new file mode 100644
index 00000000..86e29d21
--- /dev/null
+++ b/tos/platforms/telosa/DemoSensorC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorC on the telosb platform provides a
+ * voltage reading, using VoltageC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2006-12-13 01:22:36 $
+ * 
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation
+{
+  components new VoltageC() as DemoSensor;
+  Read = DemoSensor;
+}
diff --git a/tos/platforms/telosa/DemoSensorNowC.nc b/tos/platforms/telosa/DemoSensorNowC.nc
new file mode 100644
index 00000000..263f3170
--- /dev/null
+++ b/tos/platforms/telosa/DemoSensorNowC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorNowC is a generic sensor device that provides a 16-bit
+ * value that can be read from async context. The platform author
+ * chooses which sensor actually sits behind DemoSensorNowC, and
+ * though it's probably Voltage, Light, or Temperature, there are no
+ * guarantees.
+ *
+ * This particular DemoSensorNowC on the telosb platform provides a
+ * voltage reading, using VoltageC.
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2006-12-13 01:22:36 $
+ * 
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation
+{
+  components new Msp430InternalVoltageC() as DemoSensorNow;
+
+  Resource = DemoSensorNow;
+  ReadNow = DemoSensorNow;
+}
diff --git a/tos/platforms/telosa/DemoSensorStreamC.nc b/tos/platforms/telosa/DemoSensorStreamC.nc
new file mode 100644
index 00000000..5f8cb796
--- /dev/null
+++ b/tos/platforms/telosa/DemoSensorStreamC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorStreamC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorStreamC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorStreamC on the telosb platform provides a
+ * voltage reading, using VoltageStreamC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2006-12-13 01:22:36 $
+ * 
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream<uint16_t>;
+}
+implementation
+{
+  components new VoltageStreamC() as DemoSensor;
+  ReadStream = DemoSensor;
+}
diff --git a/tos/platforms/telosa/Ieee154MessageC.nc b/tos/platforms/telosa/Ieee154MessageC.nc
new file mode 100644
index 00000000..2acb1e4e
--- /dev/null
+++ b/tos/platforms/telosa/Ieee154MessageC.nc
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2008 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+/**
+ *
+ * @author Stephen Dawson-Haggerty
+ */
+ 
+configuration Ieee154MessageC  {
+  provides {
+    interface SplitControl;
+
+    interface Resource as SendResource[uint8_t clientId];
+    interface Ieee154Send;
+    interface Receive as Ieee154Receive;
+
+    interface Ieee154Packet;
+    interface Packet;
+
+    interface PacketAcknowledgements;
+    interface LinkPacketMetadata;
+    interface LowPowerListening;
+    interface PacketLink;
+  }
+
+} implementation {
+  components CC2420Ieee154MessageC as Msg;
+
+  SplitControl = Msg;
+  SendResource = Msg;
+  Ieee154Send  = Msg;
+  Ieee154Receive = Msg;
+  Ieee154Packet = Msg;
+  Packet = Msg;
+  
+  PacketAcknowledgements = Msg;
+  LinkPacketMetadata = Msg;
+  LowPowerListening = Msg;
+  PacketLink = Msg;
+}
diff --git a/tos/platforms/telosa/MSP430ADC12ChannelConfigM.nc b/tos/platforms/telosa/MSP430ADC12ChannelConfigM.nc
new file mode 100644
index 00000000..070c76f9
--- /dev/null
+++ b/tos/platforms/telosa/MSP430ADC12ChannelConfigM.nc
@@ -0,0 +1,15 @@
+module MSP430ADC12ChannelConfigM {
+  uses interface MSP430ADC12ChannelConfig;  
+}
+implementation
+{
+  async event msp430adc12_channel_config_t MSP430ADC12ChannelConfig.getConfigurationData(uint8_t channel) {
+    msp430adc12_channel_config_t config = {
+      channel, REFERENCE_AVcc_AVss, REFVOLT_LEVEL_1_5,
+      SHT_SOURCE_SMCLK, SHT_CLOCK_DIV_1, SAMPLE_HOLD_4_CYCLES,
+      SAMPCON_SOURCE_SMCLK, SAMPCON_CLOCK_DIV_1 };
+
+    return config;
+  }
+}
+
diff --git a/tos/platforms/telosa/MoteClockC.nc b/tos/platforms/telosa/MoteClockC.nc
new file mode 100644
index 00000000..18290c7e
--- /dev/null
+++ b/tos/platforms/telosa/MoteClockC.nc
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id: MoteClockC.nc,v 1.1 2007-07-10 00:24:31 vlahan Exp $
+ *
+ */
+
+ /**
+ * @author Vlado Handziski <handzisk@tkn.tu-berlind.de>
+ */
+ 
+configuration MoteClockC
+{
+  provides interface Init as MoteClockInit;
+}
+implementation
+
+{
+  components Msp430ClockC;
+  
+  MoteClockInit = Msp430ClockC.Init;
+}
diff --git a/tos/platforms/telosa/MotePlatformC.nc b/tos/platforms/telosa/MotePlatformC.nc
new file mode 100644
index 00000000..08760bba
--- /dev/null
+++ b/tos/platforms/telosa/MotePlatformC.nc
@@ -0,0 +1,59 @@
+module MotePlatformC {
+  provides interface Init;
+}
+implementation {
+  command error_t Init.init() {
+    //LEDS
+    TOSH_SET_RED_LED_PIN();
+    TOSH_SET_GREEN_LED_PIN();
+    TOSH_SET_YELLOW_LED_PIN();
+    TOSH_MAKE_RED_LED_OUTPUT();
+    TOSH_MAKE_GREEN_LED_OUTPUT();
+    TOSH_MAKE_YELLOW_LED_OUTPUT();
+
+    //RADIO PINS
+    //CC2420 pins
+    TOSH_MAKE_SOMI0_INPUT();
+    TOSH_MAKE_SIMO0_INPUT();
+    TOSH_MAKE_UCLK0_INPUT();
+    TOSH_MAKE_SOMI1_INPUT();
+    TOSH_MAKE_SIMO1_INPUT();
+    TOSH_MAKE_UCLK1_INPUT();
+    TOSH_SET_RADIO_RESET_PIN();
+    TOSH_MAKE_RADIO_RESET_OUTPUT();
+    TOSH_CLR_RADIO_VREF_PIN();
+    TOSH_MAKE_RADIO_VREF_OUTPUT();
+    TOSH_SET_RADIO_CSN_PIN();
+    TOSH_MAKE_RADIO_CSN_OUTPUT();
+    TOSH_MAKE_RADIO_FIFOP_INPUT();
+    TOSH_MAKE_RADIO_GIO0_INPUT();
+    TOSH_MAKE_RADIO_SFD_INPUT();
+    TOSH_MAKE_RADIO_GIO1_INPUT();
+
+    //UART PINS
+    TOSH_MAKE_UTXD0_INPUT();
+    TOSH_MAKE_URXD0_INPUT();
+    TOSH_MAKE_UTXD1_INPUT();
+    TOSH_MAKE_URXD1_INPUT();
+  
+    //PROG PINS
+    TOSH_MAKE_PROG_RX_INPUT();
+    TOSH_MAKE_PROG_TX_INPUT();
+
+    //FLASH PINS
+    TOSH_MAKE_FLASH_PWR_OUTPUT();
+    TOSH_SET_FLASH_PWR_PIN();
+    TOSH_MAKE_FLASH_CS_OUTPUT();
+    TOSH_SET_FLASH_CS_PIN();
+
+    //HUMIDITY PINS
+    TOSH_MAKE_HUM_SCL_OUTPUT();
+    TOSH_MAKE_HUM_SDA_OUTPUT();
+    TOSH_MAKE_HUM_PWR_OUTPUT();
+    TOSH_CLR_HUM_SCL_PIN();
+    TOSH_CLR_HUM_SDA_PIN();
+    TOSH_CLR_HUM_PWR_PIN();
+
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/telosa/Msp430Timer32khzMapC.nc b/tos/platforms/telosa/Msp430Timer32khzMapC.nc
new file mode 100644
index 00000000..62eceb16
--- /dev/null
+++ b/tos/platforms/telosa/Msp430Timer32khzMapC.nc
@@ -0,0 +1,86 @@
+//$Id: Msp430Timer32khzMapC.nc,v 1.5 2010-06-29 22:07:55 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * MSP430Timer32khzMapC presents as paramaterized interfaces all of
+ * the 32khz hardware timers on the MSP430 that are available for
+ * compile time allocation by "new Alarm32khz16C()", "new
+ * AlarmMilli32C()", and so on.  
+ *
+ * Platforms based on the MSP430 are * encouraged to copy in and
+ * override this file, presenting only the * hardware timers that are
+ * available for allocation on that platform.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:55 $
+ */
+
+configuration Msp430Timer32khzMapC
+{
+  provides interface Msp430Timer[ uint8_t id ];
+  provides interface Msp430TimerControl[ uint8_t id ];
+  provides interface Msp430Compare[ uint8_t id ];
+}
+implementation
+{
+  components Msp430TimerC;
+
+  Msp430Timer[0] = Msp430TimerC.TimerB;
+  Msp430TimerControl[0] = Msp430TimerC.ControlB0;
+  Msp430Compare[0] = Msp430TimerC.CompareB0;
+
+  // Timer pin B1 is used by the CC2420 radio's SFD pin
+  // this is the only difference between the default 32khz map
+  // and the map on telos
+
+  Msp430Timer[1] = Msp430TimerC.TimerB;
+  Msp430TimerControl[1] = Msp430TimerC.ControlB2;
+  Msp430Compare[1] = Msp430TimerC.CompareB2;
+
+  Msp430Timer[2] = Msp430TimerC.TimerB;
+  Msp430TimerControl[2] = Msp430TimerC.ControlB3;
+  Msp430Compare[2] = Msp430TimerC.CompareB3;
+
+  Msp430Timer[3] = Msp430TimerC.TimerB;
+  Msp430TimerControl[3] = Msp430TimerC.ControlB4;
+  Msp430Compare[3] = Msp430TimerC.CompareB4;
+
+  Msp430Timer[4] = Msp430TimerC.TimerB;
+  Msp430TimerControl[4] = Msp430TimerC.ControlB5;
+  Msp430Compare[4] = Msp430TimerC.CompareB5;
+
+  Msp430Timer[5] = Msp430TimerC.TimerB;
+  Msp430TimerControl[5] = Msp430TimerC.ControlB6;
+  Msp430Compare[5] = Msp430TimerC.CompareB6;
+}
+
diff --git a/tos/platforms/telosa/PlatformC.nc b/tos/platforms/telosa/PlatformC.nc
new file mode 100644
index 00000000..6c6adbb7
--- /dev/null
+++ b/tos/platforms/telosa/PlatformC.nc
@@ -0,0 +1,52 @@
+// $Id: PlatformC.nc,v 1.6 2010-06-29 22:07:55 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre and Cory Sharp
+ * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:55 $
+ */
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+}
+implementation
+{
+  components PlatformP, MotePlatformC, MoteClockC;
+
+  Init = PlatformP;
+  PlatformP.MoteClockInit -> MoteClockC;
+  PlatformP.MoteInit -> MotePlatformC;
+}
+
diff --git a/tos/platforms/telosa/PlatformLedsC.nc b/tos/platforms/telosa/PlatformLedsC.nc
new file mode 100644
index 00000000..caec528c
--- /dev/null
+++ b/tos/platforms/telosa/PlatformLedsC.nc
@@ -0,0 +1,68 @@
+// $Id: PlatformLedsC.nc,v 1.5 2010-06-29 22:07:55 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ * @version $Revision: 1.5 $ $Date: 2010-06-29 22:07:55 $
+ */
+#include "hardware.h"
+
+configuration PlatformLedsC {
+  provides interface GeneralIO as Led0;
+  provides interface GeneralIO as Led1;
+  provides interface GeneralIO as Led2;
+  uses interface Init;
+}
+implementation
+{
+  components 
+      HplMsp430GeneralIOC as GeneralIOC
+    , new Msp430GpioC() as Led0Impl
+    , new Msp430GpioC() as Led1Impl
+    , new Msp430GpioC() as Led2Impl
+    ;
+  components PlatformP;
+
+  Init = PlatformP.LedsInit;
+
+  Led0 = Led0Impl;
+  Led0Impl -> GeneralIOC.Port54;
+
+  Led1 = Led1Impl;
+  Led1Impl -> GeneralIOC.Port55;
+
+  Led2 = Led2Impl;
+  Led2Impl -> GeneralIOC.Port56;
+
+}
+
diff --git a/tos/platforms/telosa/PlatformP.nc b/tos/platforms/telosa/PlatformP.nc
new file mode 100644
index 00000000..34490d65
--- /dev/null
+++ b/tos/platforms/telosa/PlatformP.nc
@@ -0,0 +1,18 @@
+#include "hardware.h"
+
+module PlatformP @safe() {
+  provides interface Init;
+  uses interface Init as MoteClockInit;
+  uses interface Init as MoteInit;
+  uses interface Init as LedsInit;
+}
+implementation {
+  command error_t Init.init() {
+    call MoteClockInit.init();
+    call MoteInit.init();
+    call LedsInit.init();
+    return SUCCESS;
+  }
+
+  default command error_t LedsInit.init() { return SUCCESS; }
+}
diff --git a/tos/platforms/telosa/PlatformSerialC.nc b/tos/platforms/telosa/PlatformSerialC.nc
new file mode 100644
index 00000000..c869bab7
--- /dev/null
+++ b/tos/platforms/telosa/PlatformSerialC.nc
@@ -0,0 +1,21 @@
+
+configuration PlatformSerialC {
+  
+  provides interface StdControl;
+  provides interface UartStream;
+  provides interface UartByte;
+  
+}
+
+implementation {
+  
+  components new Msp430Uart1C() as UartC;
+  UartStream = UartC;  
+  UartByte = UartC;
+  
+  components TelosSerialP;
+  StdControl = TelosSerialP;
+  TelosSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
+  TelosSerialP.Resource -> UartC.Resource;
+  
+}
diff --git a/tos/platforms/telosa/TelosSerialP.nc b/tos/platforms/telosa/TelosSerialP.nc
new file mode 100644
index 00000000..cf5eee2d
--- /dev/null
+++ b/tos/platforms/telosa/TelosSerialP.nc
@@ -0,0 +1,23 @@
+module TelosSerialP {
+  provides interface StdControl;
+  provides interface Msp430UartConfigure;
+  uses interface Resource;
+}
+implementation {
+  
+  msp430_uart_union_config_t msp430_uart_telos_config = { {ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1} };
+
+  command error_t StdControl.start(){
+    return call Resource.immediateRequest();
+  }
+  command error_t StdControl.stop(){
+    call Resource.release();
+    return SUCCESS;
+  }
+  event void Resource.granted(){}
+
+  async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() {
+    return &msp430_uart_telos_config;
+  }
+  
+}
diff --git a/tos/platforms/telosa/TimeSyncMessageC.nc b/tos/platforms/telosa/TimeSyncMessageC.nc
new file mode 100644
index 00000000..d8b3a5c7
--- /dev/null
+++ b/tos/platforms/telosa/TimeSyncMessageC.nc
@@ -0,0 +1,93 @@
+// $Id: TimeSyncMessageC.nc,v 1.3 2010-06-29 22:07:55 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ *
+ * The Active Message layer on the telosa platform. This is a naming wrapper
+ * around the CC2420 Active Message layer that implemets timesync interface (TEP 133).
+ *
+ * @author Philip Levis
+ * @author Brano Kusy
+ * @date June 19 2005
+ */
+
+configuration TimeSyncMessageC {
+  provides
+  {
+    interface SplitControl;
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+    interface LowPowerListening;
+
+    interface PacketTimeStamp<T32khz, uint32_t> as PacketTimeStamp32khz;
+    interface PacketTimeStamp<TMilli, uint32_t> as PacketTimeStampMilli;
+
+    interface TimeSyncAMSend<T32khz, uint32_t> as TimeSyncAMSend32khz[am_id_t id];
+    interface TimeSyncPacket<T32khz, uint32_t> as TimeSyncPacket32khz;
+
+    interface TimeSyncAMSend<TMilli, uint32_t> as TimeSyncAMSendMilli[am_id_t id];
+    interface TimeSyncPacket<TMilli, uint32_t> as TimeSyncPacketMilli;
+  }
+}
+implementation {
+  components CC2420TimeSyncMessageC as AM;
+
+  SplitControl = AM;
+
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+  LowPowerListening = AM;
+  TimeSyncAMSend32khz       = AM;
+  TimeSyncAMSendMilli       = AM;
+  TimeSyncPacket32khz       = AM;
+  TimeSyncPacketMilli       = AM;
+
+  components CC2420PacketC;
+  PacketTimeStamp32khz = CC2420PacketC;
+  PacketTimeStampMilli = CC2420PacketC;
+}
\ No newline at end of file
diff --git a/tos/platforms/telosa/VoltageC.nc b/tos/platforms/telosa/VoltageC.nc
new file mode 100644
index 00000000..f398bc09
--- /dev/null
+++ b/tos/platforms/telosa/VoltageC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2006-12-13 01:22:36 $
+ */
+
+generic configuration VoltageC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  Read = Msp430InternalVoltageC.Read;
+}
+
diff --git a/tos/platforms/telosa/VoltageStreamC.nc b/tos/platforms/telosa/VoltageStreamC.nc
new file mode 100644
index 00000000..8ab30987
--- /dev/null
+++ b/tos/platforms/telosa/VoltageStreamC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2006-12-13 01:22:36 $
+ */
+
+generic configuration VoltageStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  ReadStream = Msp430InternalVoltageC.ReadStream;
+}
+
diff --git a/tos/platforms/telosa/chips/at45db/HplAt45dbC.nc b/tos/platforms/telosa/chips/at45db/HplAt45dbC.nc
new file mode 100644
index 00000000..61ed0f01
--- /dev/null
+++ b/tos/platforms/telosa/chips/at45db/HplAt45dbC.nc
@@ -0,0 +1,50 @@
+/*
+* Copyright (c) 2006, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+configuration HplAt45dbC {
+  provides interface HplAt45db;
+}
+implementation {
+
+  components new HplAt45dbByteC(9),
+	new Msp430Spi0C() as Spi,
+	HplAt45dbP,
+	HplMsp430GeneralIOC as MspGeneralIO,
+	new Msp430GpioC() as Select;
+
+  HplAt45db = HplAt45dbByteC;
+
+  HplAt45dbByteC.Resource -> Spi;
+  HplAt45dbByteC.FlashSpi -> Spi;
+  HplAt45dbByteC.HplAt45dbByte -> HplAt45dbP;
+
+  Select -> MspGeneralIO.Port44;
+  HplAt45dbP.Select -> Select;
+  HplAt45dbP.FlashSpi -> Spi;
+}
diff --git a/tos/platforms/telosa/chips/at45db/HplAt45dbP.nc b/tos/platforms/telosa/chips/at45db/HplAt45dbP.nc
new file mode 100644
index 00000000..79fc4c00
--- /dev/null
+++ b/tos/platforms/telosa/chips/at45db/HplAt45dbP.nc
@@ -0,0 +1,69 @@
+/*
+* Copyright (c) 2006, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+module HplAt45dbP {
+  provides {
+    interface HplAt45dbByte;
+  }
+  uses {
+    interface SpiByte as FlashSpi;
+    interface GeneralIO as Select;
+  }
+}
+implementation
+{
+  command void HplAt45dbByte.select() {
+    call Select.clr();
+  }
+
+  command void HplAt45dbByte.deselect() {
+    call Select.set();
+  }
+
+  task void idleTask() {
+    uint8_t status;
+    status = call FlashSpi.write(0);
+    if (!(status & 0x80)) {
+      post idleTask();
+    } else {
+      signal HplAt45dbByte.idle();
+    }
+  }
+
+  command void HplAt45dbByte.waitIdle() {
+    post idleTask();
+  }
+
+  command bool HplAt45dbByte.getCompareStatus() {
+    uint8_t status;
+    status = call FlashSpi.write(0);
+    return (!(status & 0x40));
+  }
+}
diff --git a/tos/platforms/telosa/chips/at45db/HplAt45db_chip.h b/tos/platforms/telosa/chips/at45db/HplAt45db_chip.h
new file mode 100644
index 00000000..eace4a51
--- /dev/null
+++ b/tos/platforms/telosa/chips/at45db/HplAt45db_chip.h
@@ -0,0 +1,56 @@
+// $Id: HplAt45db_chip.h,v 1.4 2010-06-29 22:07:55 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef HPLAT45DB_CHIP_H
+#define HPLAT45DB_CHIP_H
+
+// flash characteristics
+enum {
+  AT45_MAX_PAGES = 2048,
+  AT45_PAGE_SIZE = 264,
+  AT45_PAGE_SIZE_LOG2 = 8 // For those who want to ignore the last 8 bytes
+};
+
+typedef uint16_t at45page_t;
+typedef uint16_t at45pageoffset_t; /* must fit 0 to AT45_PAGE_SIZE - 1 */
+
+#endif
diff --git a/tos/platforms/telosa/chips/cc2420/HplCC2420AlarmC.nc b/tos/platforms/telosa/chips/cc2420/HplCC2420AlarmC.nc
new file mode 100644
index 00000000..5b4837a6
--- /dev/null
+++ b/tos/platforms/telosa/chips/cc2420/HplCC2420AlarmC.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of 32khz alarms for the ChipCon CC2420 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:44 $
+ */
+
+generic configuration HplCC2420AlarmC() {
+
+  provides interface Init;
+  provides interface Alarm<T32khz,uint32_t> as Alarm32khz32;
+
+}
+
+implementation {
+
+  components new Alarm32khz32C();
+
+  Init = Alarm32khz32C;
+  Alarm32khz32 = Alarm32khz32C;
+  
+}
diff --git a/tos/platforms/telosa/chips/cc2420/HplCC2420InterruptsC.nc b/tos/platforms/telosa/chips/cc2420/HplCC2420InterruptsC.nc
new file mode 100644
index 00000000..c47440ed
--- /dev/null
+++ b/tos/platforms/telosa/chips/cc2420/HplCC2420InterruptsC.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of interrupts and captures for the ChipCon
+ * CC2420 radio connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:44 $
+ */
+
+configuration HplCC2420InterruptsC {
+
+  provides interface GpioCapture as CaptureSFD;
+  provides interface GpioInterrupt as InterruptCCA;
+  provides interface GpioInterrupt as InterruptFIFOP;
+
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components Msp430TimerC;
+  components new GpioCaptureC() as CaptureSFDC;
+  CaptureSFDC.Msp430TimerControl -> Msp430TimerC.ControlB1;
+  CaptureSFDC.Msp430Capture -> Msp430TimerC.CaptureB1;
+  CaptureSFDC.GeneralIO -> GeneralIOC.Port41;
+
+  components HplMsp430InterruptC;
+  components new Msp430InterruptC() as InterruptCCAC;
+  components new Msp430InterruptC() as InterruptFIFOPC;
+  InterruptCCAC.HplInterrupt -> HplMsp430InterruptC.Port14;
+  InterruptFIFOPC.HplInterrupt -> HplMsp430InterruptC.Port10;
+
+  CaptureSFD = CaptureSFDC.Capture;
+  InterruptCCA = InterruptCCAC.Interrupt;
+  InterruptFIFOP = InterruptFIFOPC.Interrupt;
+
+}
diff --git a/tos/platforms/telosa/chips/cc2420/HplCC2420PinsC.nc b/tos/platforms/telosa/chips/cc2420/HplCC2420PinsC.nc
new file mode 100644
index 00000000..06bc174a
--- /dev/null
+++ b/tos/platforms/telosa/chips/cc2420/HplCC2420PinsC.nc
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of general-purpose I/O for the ChipCon CC2420
+ * radio connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:44 $
+ */
+
+configuration HplCC2420PinsC {
+
+  provides interface GeneralIO as CCA;
+  provides interface GeneralIO as CSN;
+  provides interface GeneralIO as FIFO;
+  provides interface GeneralIO as FIFOP;
+  provides interface GeneralIO as RSTN;
+  provides interface GeneralIO as SFD;
+  provides interface GeneralIO as VREN;
+
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components new Msp430GpioC() as CCAM;
+  components new Msp430GpioC() as CSNM;
+  components new Msp430GpioC() as FIFOM;
+  components new Msp430GpioC() as FIFOPM;
+  components new Msp430GpioC() as RSTNM;
+  components new Msp430GpioC() as SFDM;
+  components new Msp430GpioC() as VRENM;
+
+  CCAM -> GeneralIOC.Port14;
+  CSNM -> GeneralIOC.Port42;
+  FIFOM -> GeneralIOC.Port13;
+  FIFOPM -> GeneralIOC.Port10;
+  RSTNM -> GeneralIOC.Port46;
+  SFDM -> GeneralIOC.Port41;
+  VRENM -> GeneralIOC.Port45;
+
+  CCA = CCAM;
+  CSN = CSNM;
+  FIFO = FIFOM;
+  FIFOP = FIFOPM;
+  RSTN = RSTNM;
+  SFD = SFDM;
+  VREN = VRENM;
+  
+}
+
diff --git a/tos/platforms/telosa/chips/cc2420/HplCC2420SpiC.nc b/tos/platforms/telosa/chips/cc2420/HplCC2420SpiC.nc
new file mode 100644
index 00000000..f356f8ea
--- /dev/null
+++ b/tos/platforms/telosa/chips/cc2420/HplCC2420SpiC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of the SPI bus for the ChipCon CC2420 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:44 $
+ */
+
+generic configuration HplCC2420SpiC() {
+  
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+  
+}
+
+implementation {
+
+  components new Msp430Spi0C() as SpiC;
+  
+  Resource = SpiC;
+  SpiByte = SpiC;
+  SpiPacket = SpiC;
+  
+}
+
diff --git a/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParC.nc b/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParC.nc
new file mode 100644
index 00000000..2a8c087f
--- /dev/null
+++ b/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParC.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HamamatsuS1087ParC is a driver for a photosynthetically-active
+ * radiation sensor available on the telosb platform. 
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $
+ */
+
+generic configuration HamamatsuS1087ParC() {
+  provides interface DeviceMetadata;
+  provides interface Read<uint16_t>;
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new AdcReadClientC();
+  Read = AdcReadClientC;
+
+  components new AdcReadStreamClientC();
+  ReadStream = AdcReadStreamClientC;
+
+  components HamamatsuS1087ParP;
+  DeviceMetadata = HamamatsuS1087ParP;
+  AdcReadClientC.AdcConfigure -> HamamatsuS1087ParP;
+  AdcReadStreamClientC.AdcConfigure -> HamamatsuS1087ParP;
+}
diff --git a/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParP.nc b/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParP.nc
new file mode 100644
index 00000000..24f42197
--- /dev/null
+++ b/tos/platforms/telosa/chips/s1087/HamamatsuS1087ParP.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Msp430Adc12.h"
+
+/**
+ * HamamatsuS1087ParP is a driver for a photosynthetically-active
+ * radiation sensor available on the telosb platform. 
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $
+ */
+
+module HamamatsuS1087ParP {
+  provides interface DeviceMetadata;
+  provides interface AdcConfigure<const msp430adc12_channel_config_t*>;
+}
+implementation {
+
+  msp430adc12_channel_config_t config = {
+    inch: INPUT_CHANNEL_A4,
+    sref: REFERENCE_VREFplus_AVss,
+    ref2_5v: REFVOLT_LEVEL_1_5,
+    adc12ssel: SHT_SOURCE_ACLK,
+    adc12div: SHT_CLOCK_DIV_1,
+    sht: SAMPLE_HOLD_4_CYCLES,
+    sampcon_ssel: SAMPCON_SOURCE_SMCLK,
+    sampcon_id: SAMPCON_CLOCK_DIV_1
+  };
+
+  command uint8_t DeviceMetadata.getSignificantBits() { return 12; }
+
+  async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() {
+    return &config;
+  }
+}
diff --git a/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrC.nc b/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrC.nc
new file mode 100644
index 00000000..b88f6839
--- /dev/null
+++ b/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrC.nc
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HamamatsuS10871TsrC is a driver for a total solar radiation sensor
+ * available on the telosb platform.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $
+ */
+
+generic configuration HamamatsuS10871TsrC() {
+  provides interface DeviceMetadata;
+  provides interface Read<uint16_t>;
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new AdcReadClientC();
+  Read = AdcReadClientC;
+
+  components new AdcReadStreamClientC();
+  ReadStream = AdcReadStreamClientC;
+
+  components HamamatsuS10871TsrP;
+  DeviceMetadata = HamamatsuS10871TsrP;
+  AdcReadClientC.AdcConfigure -> HamamatsuS10871TsrP;
+  AdcReadStreamClientC.AdcConfigure -> HamamatsuS10871TsrP;
+}
diff --git a/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrP.nc b/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrP.nc
new file mode 100644
index 00000000..fa108f10
--- /dev/null
+++ b/tos/platforms/telosa/chips/s10871/HamamatsuS10871TsrP.nc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Msp430Adc12.h"
+
+/**
+ * HamamatsuS10871TsrP is a driver for a photosynthetically-active
+ * radiation sensor available on the telosb platform. 
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $
+ */
+
+module HamamatsuS10871TsrP {
+  provides interface DeviceMetadata;
+  provides interface AdcConfigure<const msp430adc12_channel_config_t*>;
+}
+implementation {
+
+  msp430adc12_channel_config_t config = {
+    inch: INPUT_CHANNEL_A5,
+    sref: REFERENCE_VREFplus_AVss,
+    ref2_5v: REFVOLT_LEVEL_1_5,
+    adc12ssel: SHT_SOURCE_ACLK,
+    adc12div: SHT_CLOCK_DIV_1,
+    sht: SAMPLE_HOLD_4_CYCLES,
+    sampcon_ssel: SAMPCON_SOURCE_SMCLK,
+    sampcon_id: SAMPCON_CLOCK_DIV_1
+  };
+
+  command uint8_t DeviceMetadata.getSignificantBits() { return 12; }
+  
+  async command const msp430adc12_channel_config_t* AdcConfigure.getConfiguration() {
+    return &config;
+  }
+}
diff --git a/tos/platforms/telosa/chips/sht11/HalSensirionSht11C.nc b/tos/platforms/telosa/chips/sht11/HalSensirionSht11C.nc
new file mode 100644
index 00000000..f42636a5
--- /dev/null
+++ b/tos/platforms/telosa/chips/sht11/HalSensirionSht11C.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HalSensirionSht11C is an advanced access component for the
+ * Sensirion SHT11 model humidity and temperature sensor, available on
+ * the telosb platform. This component provides the SensirionSht11
+ * interface, which offers full control over the device. Please
+ * acquire the Resource before using it.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ */
+
+configuration HalSensirionSht11C {
+  provides interface Resource[ uint8_t client ];
+  provides interface SensirionSht11[ uint8_t client ];
+}
+implementation {
+  components new SensirionSht11LogicP();
+  SensirionSht11 = SensirionSht11LogicP;
+
+  components HplSensirionSht11C;
+  Resource = HplSensirionSht11C.Resource;
+  SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA;
+  SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
+  SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;
+  
+  components new TimerMilliC();
+  SensirionSht11LogicP.Timer -> TimerMilliC;
+
+  components LedsC;
+  SensirionSht11LogicP.Leds -> LedsC;
+}
diff --git a/tos/platforms/telosa/chips/sht11/HplSensirionSht11C.nc b/tos/platforms/telosa/chips/sht11/HplSensirionSht11C.nc
new file mode 100644
index 00000000..5e8043cf
--- /dev/null
+++ b/tos/platforms/telosa/chips/sht11/HplSensirionSht11C.nc
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplSensirionSht11C is a low-level component, intended to provide
+ * the physical resources used by the Sensirion SHT11 sensor on the
+ * telosb platform so that the chip driver can make use of them. You
+ * really shouldn't be wiring to this, unless you're writing a new
+ * Sensirion SHT11 driver.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.6 $ $Date: 2007-02-04 19:56:29 $
+ */
+
+configuration HplSensirionSht11C {
+  provides interface Resource[ uint8_t id ];
+  provides interface GeneralIO as DATA;
+  provides interface GeneralIO as SCK;
+  provides interface GpioInterrupt as InterruptDATA;
+}
+implementation {
+  components HplMsp430GeneralIOC;
+  
+  components new Msp430GpioC() as DATAM;
+  components new Msp430GpioC() as SCKM;
+  components new Msp430GpioC() as PWRM;
+
+  DATAM -> HplMsp430GeneralIOC.Port15;
+  SCKM -> HplMsp430GeneralIOC.Port16;
+  PWRM -> HplMsp430GeneralIOC.Port17;
+
+  DATA = DATAM;
+  SCK = SCKM;
+
+  components HplSensirionSht11P;
+  HplSensirionSht11P.PWR -> PWRM;
+  HplSensirionSht11P.DATA -> DATAM;
+  HplSensirionSht11P.SCK -> SCKM;
+
+  components new TimerMilliC();
+  HplSensirionSht11P.Timer -> TimerMilliC;
+
+  components HplMsp430InterruptC;
+  components new Msp430InterruptC() as InterruptDATAC;
+  InterruptDATAC.HplInterrupt -> HplMsp430InterruptC.Port15;
+  InterruptDATA = InterruptDATAC.Interrupt;
+
+  components new FcfsArbiterC( "Sht11.Resource" ) as Arbiter;
+  Resource = Arbiter;
+  
+  components new SplitControlPowerManagerC();
+  SplitControlPowerManagerC.SplitControl -> HplSensirionSht11P;
+  SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
+  SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
+}
diff --git a/tos/platforms/telosa/chips/sht11/HplSensirionSht11P.nc b/tos/platforms/telosa/chips/sht11/HplSensirionSht11P.nc
new file mode 100644
index 00000000..4fb773f4
--- /dev/null
+++ b/tos/platforms/telosa/chips/sht11/HplSensirionSht11P.nc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Timer.h"
+
+/**
+ * HplSensirionSht11P is a low-level component that controls power for
+ * the Sensirion SHT11 sensor on the telosb platform.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ */
+
+module HplSensirionSht11P {
+  provides interface SplitControl;
+  uses interface Timer<TMilli>;
+  uses interface GeneralIO as PWR;
+  uses interface GeneralIO as DATA;
+  uses interface GeneralIO as SCK;
+}
+implementation {
+  task void stopTask();
+
+  command error_t SplitControl.start() {
+    call PWR.makeOutput();
+    call PWR.set();
+    call Timer.startOneShot( 11 );
+    return SUCCESS;
+  }
+  
+  event void Timer.fired() {
+    signal SplitControl.startDone( SUCCESS );
+  }
+
+  command error_t SplitControl.stop() {
+    call SCK.makeInput();
+    call SCK.clr();
+    call DATA.makeInput();
+    call DATA.clr();
+    call PWR.clr();
+    post stopTask();
+    return SUCCESS;
+  }
+
+  task void stopTask() {
+    signal SplitControl.stopDone( SUCCESS );
+  }
+}
+
diff --git a/tos/platforms/telosa/chips/sht11/SensirionSht11C.nc b/tos/platforms/telosa/chips/sht11/SensirionSht11C.nc
new file mode 100644
index 00000000..201e9f14
--- /dev/null
+++ b/tos/platforms/telosa/chips/sht11/SensirionSht11C.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * SensirionSht11C is a top-level access component for the Sensirion
+ * SHT11 model humidity and temperature sensor, available on the
+ * telosb platform. Because this component represents one physical
+ * device, simultaneous calls to read temperature and humidity will be
+ * arbitrated and executed in sequential order. Feel free to read both
+ * at the same time, just be aware that they'll come back
+ * sequentially.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.5 $ $Date: 2007-04-13 21:46:18 $
+ */
+
+generic configuration SensirionSht11C() {
+  provides interface Read<uint16_t> as Temperature;
+  provides interface DeviceMetadata as TemperatureMetadata;
+  provides interface Read<uint16_t> as Humidity;
+  provides interface DeviceMetadata as HumidityMetadata;
+}
+implementation {
+  components new SensirionSht11ReaderP();
+
+  Temperature = SensirionSht11ReaderP.Temperature;
+  TemperatureMetadata = SensirionSht11ReaderP.TemperatureMetadata;
+  Humidity = SensirionSht11ReaderP.Humidity;
+  HumidityMetadata = SensirionSht11ReaderP.HumidityMetadata;
+
+  components HalSensirionSht11C;
+
+  enum { TEMP_KEY = unique("Sht11.Resource") };
+  enum { HUM_KEY = unique("Sht11.Resource") };
+
+  SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ];
+  SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
+  SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ];
+  SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ];
+}
diff --git a/tos/platforms/telosa/hardware.h b/tos/platforms/telosa/hardware.h
new file mode 100644
index 00000000..b1b19395
--- /dev/null
+++ b/tos/platforms/telosa/hardware.h
@@ -0,0 +1,92 @@
+#ifndef _H_hardware_h
+#define _H_hardware_h
+
+
+#include "msp430hardware.h"
+
+// enum so components can override power saving,
+// as per TEP 112.
+enum {
+  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
+};
+
+// LEDs
+TOSH_ASSIGN_PIN(RED_LED, 5, 4);
+TOSH_ASSIGN_PIN(GREEN_LED, 5, 5);
+TOSH_ASSIGN_PIN(YELLOW_LED, 5, 6);
+
+// CC2420 RADIO #defines
+TOSH_ASSIGN_PIN(RADIO_CSN, 4, 2);
+TOSH_ASSIGN_PIN(RADIO_VREF, 4, 5);
+TOSH_ASSIGN_PIN(RADIO_RESET, 4, 6);
+TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 0);
+TOSH_ASSIGN_PIN(RADIO_SFD, 4, 1);
+TOSH_ASSIGN_PIN(RADIO_GIO0, 1, 3);
+TOSH_ASSIGN_PIN(RADIO_FIFO, 1, 3);
+TOSH_ASSIGN_PIN(RADIO_GIO1, 1, 4);
+TOSH_ASSIGN_PIN(RADIO_CCA, 1, 4);
+
+TOSH_ASSIGN_PIN(CC_FIFOP, 1, 0);
+TOSH_ASSIGN_PIN(CC_FIFO, 1, 3);
+TOSH_ASSIGN_PIN(CC_SFD, 4, 1);
+TOSH_ASSIGN_PIN(CC_VREN, 4, 5);
+TOSH_ASSIGN_PIN(CC_RSTN, 4, 6);
+
+// UART pins
+TOSH_ASSIGN_PIN(SOMI0, 3, 2);
+TOSH_ASSIGN_PIN(SIMO0, 3, 1);
+TOSH_ASSIGN_PIN(UCLK0, 3, 3);
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);
+TOSH_ASSIGN_PIN(URXD1, 3, 7);
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+
+// ADC
+TOSH_ASSIGN_PIN(ADC0, 6, 0);
+TOSH_ASSIGN_PIN(ADC1, 6, 1);
+TOSH_ASSIGN_PIN(ADC2, 6, 2);
+TOSH_ASSIGN_PIN(ADC3, 6, 3);
+
+// HUMIDITY
+TOSH_ASSIGN_PIN(HUM_SDA, 1, 5);
+TOSH_ASSIGN_PIN(HUM_SCL, 1, 6);
+TOSH_ASSIGN_PIN(HUM_PWR, 1, 7);
+
+// GIO pins
+TOSH_ASSIGN_PIN(GIO0, 2, 0);
+TOSH_ASSIGN_PIN(GIO1, 2, 1);
+
+void HUMIDITY_MAKE_CLOCK_OUTPUT() { TOSH_MAKE_HUM_SCL_OUTPUT(); }
+void HUMIDITY_MAKE_CLOCK_INPUT() { TOSH_MAKE_HUM_SCL_INPUT(); }
+void HUMIDITY_CLEAR_CLOCK() { TOSH_CLR_HUM_SCL_PIN(); }
+void HUMIDITY_SET_CLOCK() { TOSH_SET_HUM_SCL_PIN(); }
+void HUMIDITY_MAKE_DATA_OUTPUT() { TOSH_MAKE_HUM_SDA_OUTPUT(); }
+void HUMIDITY_MAKE_DATA_INPUT() { TOSH_MAKE_HUM_SDA_INPUT(); }
+void HUMIDITY_CLEAR_DATA() { TOSH_CLR_HUM_SDA_PIN(); }
+void HUMIDITY_SET_DATA() { TOSH_SET_HUM_SDA_PIN(); }
+char HUMIDITY_GET_DATA() { return TOSH_READ_HUM_SDA_PIN(); }
+
+#define HUMIDITY_TIMEOUT_MS          30
+#define HUMIDITY_TIMEOUT_TRIES       20
+
+enum {
+  // Sensirion Humidity addresses and commands
+  TOSH_HUMIDITY_ADDR = 5,
+  TOSH_HUMIDTEMP_ADDR = 3,
+  TOSH_HUMIDITY_RESET = 0x1E
+};
+
+// FLASH
+TOSH_ASSIGN_PIN(FLASH_PWR, 4, 3);
+TOSH_ASSIGN_PIN(FLASH_CS, 4, 4);
+
+// PROGRAMMING PINS (tri-state)
+//TOSH_ASSIGN_PIN(TCK, );
+TOSH_ASSIGN_PIN(PROG_RX, 1, 1);
+TOSH_ASSIGN_PIN(PROG_TX, 2, 2);
+
+#endif // _H_hardware_h
+
diff --git a/tos/platforms/telosa/platform.h b/tos/platforms/telosa/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/telosa/platform_message.h b/tos/platforms/telosa/platform_message.h
new file mode 100644
index 00000000..9f32f29c
--- /dev/null
+++ b/tos/platforms/telosa/platform_message.h
@@ -0,0 +1,70 @@
+/* $Id: platform_message.h,v 1.6 2010-06-29 22:07:55 scipio Exp $
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * Defining the platform-independently named packet structures to be the
+ * chip-specific CC1000 packet structures.
+ *
+ * @author Philip Levis
+ * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:55 $
+ */
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include <CC2420.h>
+#include <Serial.h>
+
+typedef union message_header {
+  cc2420_header_t cc2420;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union TOSRadioFooter {
+  cc2420_footer_t cc2420;
+} message_footer_t;
+
+typedef union TOSRadioMetadata {
+  cc2420_metadata_t cc2420;
+  serial_metadata_t serial;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/telosb/.platform b/tos/platforms/telosb/.platform
new file mode 100644
index 00000000..ad3f0e52
--- /dev/null
+++ b/tos/platforms/telosb/.platform
@@ -0,0 +1,81 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.
+
+push( @includes, qw(
+
+  %T/platforms/telosb
+  %T/platforms/telosb/chips/stm25p
+  %T/platforms/telosa
+  %T/platforms/telosa/chips/cc2420
+  %T/platforms/telosa/chips/s1087
+  %T/platforms/telosa/chips/s10871
+  %T/platforms/telosa/chips/sht11
+  %T/platforms/epic/chips/ds2411
+  %T/chips/cc2420
+  %T/chips/cc2420/alarm
+  %T/chips/cc2420/control
+  %T/chips/cc2420/csma
+  %T/chips/cc2420/interfaces
+  %T/chips/cc2420/link
+  %T/chips/cc2420/lowpan
+  %T/chips/cc2420/lpl
+  %T/chips/cc2420/packet
+  %T/chips/cc2420/receive
+  %T/chips/cc2420/spi
+  %T/chips/cc2420/transmit
+  %T/chips/cc2420/unique
+  %T/chips/cc2420/security
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/dma
+  %T/chips/msp430/pins
+  %T/chips/msp430/timer
+  %T/chips/msp430/usart
+  %T/chips/msp430/sensors
+  %T/chips/stm25p
+  %T/chips/sht11
+  %T/chips/ds2401
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+  %T/lib/power
+) );
+
+@opts = qw(
+
+  -gcc=msp430-gcc
+  -mmcu=msp430x1611
+  -fnesc-target=msp430
+  -fnesc-no-debug
+);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=2 " .
+    "version=msp430-3.2.3 " .
+    "short=2,2 " .
+    "int=2,2 " .
+    "long=4,2 " .
+    "long_long=8,2 " .
+    "pointer=2,2 " .
+    "enum=2,2 " .
+    "float=4,2 " .
+    "double=4,2 " .
+    "long_double=4,2 " .
+    "void=1,1 " .
+    "fun=1,2 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
+
diff --git a/tos/platforms/telosb/DemoSensorC.nc b/tos/platforms/telosb/DemoSensorC.nc
new file mode 100644
index 00000000..58894c4c
--- /dev/null
+++ b/tos/platforms/telosb/DemoSensorC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorC on the telosb platform provides a
+ * voltage reading, using VoltageC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ * 
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation
+{
+  components new VoltageC() as DemoSensor;
+  Read = DemoSensor;
+}
diff --git a/tos/platforms/telosb/DemoSensorNowC.nc b/tos/platforms/telosb/DemoSensorNowC.nc
new file mode 100644
index 00000000..63ce8af1
--- /dev/null
+++ b/tos/platforms/telosb/DemoSensorNowC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorNowC is a generic sensor device that provides a 16-bit
+ * value that can be read from async context. The platform author
+ * chooses which sensor actually sits behind DemoSensorNowC, and
+ * though it's probably Voltage, Light, or Temperature, there are no
+ * guarantees.
+ *
+ * This particular DemoSensorNowC on the telosb platform provides a
+ * voltage reading, using VoltageC.
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ * 
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation
+{
+  components new Msp430InternalVoltageC() as DemoSensorNow;
+
+  Resource = DemoSensorNow;
+  ReadNow = DemoSensorNow;
+}
diff --git a/tos/platforms/telosb/DemoSensorStreamC.nc b/tos/platforms/telosb/DemoSensorStreamC.nc
new file mode 100644
index 00000000..38027da1
--- /dev/null
+++ b/tos/platforms/telosb/DemoSensorStreamC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorStreamC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorStreamC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorStreamC on the telosb platform provides a
+ * voltage reading, using VoltageStreamC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ * 
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream<uint16_t>;
+}
+implementation
+{
+  components new VoltageStreamC() as DemoSensor;
+  ReadStream = DemoSensor;
+}
diff --git a/tos/platforms/telosb/HplUserButtonC.nc b/tos/platforms/telosb/HplUserButtonC.nc
new file mode 100644
index 00000000..c16fd730
--- /dev/null
+++ b/tos/platforms/telosb/HplUserButtonC.nc
@@ -0,0 +1,54 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telos platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+configuration HplUserButtonC {
+  provides interface GeneralIO;
+  provides interface GpioInterrupt;
+}
+implementation {
+  components HplMsp430GeneralIOC as GeneralIOC;
+  components HplMsp430InterruptC as InterruptC;
+
+  components new Msp430GpioC() as UserButtonC;
+  UserButtonC -> GeneralIOC.Port27;
+  GeneralIO = UserButtonC;
+
+  components new Msp430InterruptC() as InterruptUserButtonC;
+  InterruptUserButtonC.HplInterrupt -> InterruptC.Port27;
+  GpioInterrupt = InterruptUserButtonC.Interrupt;
+}
diff --git a/tos/platforms/telosb/MoteClockC.nc b/tos/platforms/telosb/MoteClockC.nc
new file mode 100644
index 00000000..d788d170
--- /dev/null
+++ b/tos/platforms/telosb/MoteClockC.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id: MoteClockC.nc,v 1.1 2007-07-10 00:24:31 vlahan Exp $
+ *
+ */
+ 
+ /**
+ * @author Vlado Handziski <handzisk@tkn.tu-berlind.de>
+ */
+ 
+configuration MoteClockC
+{
+  provides interface Init as MoteClockInit;
+}
+implementation
+
+{
+  components Msp430ClockC, MoteClockP;
+  
+  MoteClockInit = Msp430ClockC.Init;
+  //MoteClockP.Msp430ClockInit -> Msp430ClockC;
+}
diff --git a/tos/platforms/telosb/MoteClockP.nc b/tos/platforms/telosb/MoteClockP.nc
new file mode 100644
index 00000000..c510fc30
--- /dev/null
+++ b/tos/platforms/telosb/MoteClockP.nc
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2007, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universität Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $Id: MoteClockP.nc,v 1.1 2007-07-10 00:24:31 vlahan Exp $
+ *
+ */
+ 
+  /**
+ * @author Vlado Handziski <handzisk@tkn.tu-berlind.de>
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+ 
+module MoteClockP {
+  uses interface Msp430ClockInit;
+}
+
+implementation {
+
+  event void Msp430ClockInit.setupDcoCalibrate()
+  {
+  
+    // --- setup ---
+
+    TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0
+    TBCTL = TBSSEL0 | MC1;
+    BCSCTL1 = XT2OFF | RSEL2;
+    BCSCTL2 = DCOR; // enable DCOR
+    TBCCTL0 = CM0;
+   }
+    
+  event void Msp430ClockInit.initClocks()
+  {
+    // BCSCTL1
+    // .XT2OFF = 1; disable the external oscillator for SCLK and MCLK
+    // .XTS = 0; set low frequency mode for LXFT1
+    // .DIVA = 0; set the divisor on ACLK to 1
+    // .RSEL, do not modify
+    BCSCTL1 = XT2OFF | (BCSCTL1 & (RSEL2|RSEL1|RSEL0));
+
+    // BCSCTL2
+    // .SELM = 0; select DCOCLK as source for MCLK
+    // .DIVM = 0; set the divisor of MCLK to 1
+    // .SELS = 0; select DCOCLK as source for SCLK
+    // .DIVS = 2; set the divisor of SCLK to 4
+    // .DCOR = 1; select internal resistor for DCO
+    BCSCTL2 = DIVS1 | DCOR;
+
+    // IE1.OFIE = 0; no interrupt for oscillator fault
+    CLR_FLAG( IE1, OFIE );
+  }
+
+  event void Msp430ClockInit.initTimerA()
+  {
+    TAR = 0;
+
+    // TACTL
+    // .TACLGRP = 0; each TACL group latched independently
+    // .CNTL = 0; 16-bit counter
+    // .TASSEL = 2; source SMCLK = DCO/4
+    // .ID = 0; input divisor of 1
+    // .MC = 0; initially disabled
+    // .TACLR = 0; reset timer A
+    // .TAIE = 1; enable timer A interrupts
+    TACTL = TASSEL1 | TAIE;
+  }
+
+  event void Msp430ClockInit.initTimerB()
+  {
+    TBR = 0;
+
+    // TBCTL
+    // .TBCLGRP = 0; each TBCL group latched independently
+    // .CNTL = 0; 16-bit counter
+    // .TBSSEL = 1; source ACLK
+    // .ID = 0; input divisor of 1
+    // .MC = 0; initially disabled
+    // .TBCLR = 0; reset timer B
+    // .TBIE = 1; enable timer B interrupts
+    TBCTL = TBSSEL0 | TBIE;
+  }
+ 
+}
diff --git a/tos/platforms/telosb/MotePlatformC.nc b/tos/platforms/telosb/MotePlatformC.nc
new file mode 100644
index 00000000..1ba21eac
--- /dev/null
+++ b/tos/platforms/telosb/MotePlatformC.nc
@@ -0,0 +1,100 @@
+module MotePlatformC @safe() {
+  provides interface Init;
+}
+implementation {
+
+  inline void uwait(uint16_t u) { 
+    uint16_t t0 = TAR;
+    while((TAR - t0) <= u);
+  } 
+
+  inline void TOSH_wait() {
+    nop(); nop();
+  }
+
+  // send a bit via bit-banging to the flash
+  void TOSH_FLASH_M25P_DP_bit(bool set) {
+    if (set)
+      TOSH_SET_SIMO0_PIN();
+    else
+      TOSH_CLR_SIMO0_PIN();
+    TOSH_SET_UCLK0_PIN();
+    TOSH_CLR_UCLK0_PIN();
+  }
+
+  // put the flash into deep sleep mode
+  // important to do this by default
+  void TOSH_FLASH_M25P_DP() {
+    //  SIMO0, UCLK0
+    TOSH_MAKE_SIMO0_OUTPUT();
+    TOSH_MAKE_UCLK0_OUTPUT();
+    TOSH_MAKE_FLASH_HOLD_OUTPUT();
+    TOSH_MAKE_FLASH_CS_OUTPUT();
+    TOSH_SET_FLASH_HOLD_PIN();
+    TOSH_SET_FLASH_CS_PIN();
+
+    TOSH_wait();
+
+    // initiate sequence;
+    TOSH_CLR_FLASH_CS_PIN();
+    TOSH_CLR_UCLK0_PIN();
+  
+    TOSH_FLASH_M25P_DP_bit(TRUE);   // 0
+    TOSH_FLASH_M25P_DP_bit(FALSE);  // 1
+    TOSH_FLASH_M25P_DP_bit(TRUE);   // 2
+    TOSH_FLASH_M25P_DP_bit(TRUE);   // 3
+    TOSH_FLASH_M25P_DP_bit(TRUE);   // 4
+    TOSH_FLASH_M25P_DP_bit(FALSE);  // 5
+    TOSH_FLASH_M25P_DP_bit(FALSE);  // 6
+    TOSH_FLASH_M25P_DP_bit(TRUE);   // 7
+
+    TOSH_SET_FLASH_CS_PIN();
+    TOSH_SET_UCLK0_PIN();
+    TOSH_SET_SIMO0_PIN();
+  }
+
+  command error_t Init.init() {
+    // reset all of the ports to be input and using i/o functionality
+    atomic
+      {
+	P1SEL = 0;
+	P2SEL = 0;
+	P3SEL = 0;
+	P4SEL = 0;
+	P5SEL = 0;
+	P6SEL = 0;
+
+	P1OUT = 0x00;
+	P1DIR = 0xe0;
+ 
+	P2OUT = 0x30;
+	P2DIR = 0x7b;
+
+	P3OUT = 0x00;
+	P3DIR = 0xf1;
+
+	P4OUT = 0xdd;
+	P4DIR = 0xfd;
+
+	P5OUT = 0xff;
+	P5DIR = 0xff;
+
+	P6OUT = 0x00;
+	P6DIR = 0xff;
+
+	P1IE = 0;
+	P2IE = 0;
+
+	// the commands above take care of the pin directions
+	// there is no longer a need for explicit set pin
+	// directions using the TOSH_SET/CLR macros
+
+	// wait 10ms for the flash to startup
+	uwait(1024*10);
+	// Put the flash in deep sleep state
+	TOSH_FLASH_M25P_DP();
+
+      }//atomic
+    return SUCCESS;
+  }
+}
diff --git a/tos/platforms/telosb/SwitchToggleC.nc b/tos/platforms/telosb/SwitchToggleC.nc
new file mode 100644
index 00000000..02762e64
--- /dev/null
+++ b/tos/platforms/telosb/SwitchToggleC.nc
@@ -0,0 +1,91 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Generic layer to translate a GIO into a toggle switch
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+#include <UserButton.h>
+
+generic module SwitchToggleC() {
+  provides interface Get<bool>;
+  provides interface Notify<bool>;
+
+  uses interface GeneralIO;
+  uses interface GpioInterrupt;
+}
+implementation {
+  norace bool m_pinHigh;
+
+  task void sendEvent();
+
+  command bool Get.get() { return call GeneralIO.get(); }
+
+  command error_t Notify.enable() {
+    call GeneralIO.makeInput();
+
+    if ( call GeneralIO.get() ) {
+      m_pinHigh = TRUE;
+      return call GpioInterrupt.enableFallingEdge();
+    } else {
+      m_pinHigh = FALSE;
+      return call GpioInterrupt.enableRisingEdge();
+    }
+  }
+
+  command error_t Notify.disable() {
+    return call GpioInterrupt.disable();
+  }
+
+  async event void GpioInterrupt.fired() {
+    call GpioInterrupt.disable();
+
+    m_pinHigh = !m_pinHigh;
+
+    post sendEvent();
+  }
+
+  task void sendEvent() {
+    bool pinHigh;
+    pinHigh = m_pinHigh;
+    
+    signal Notify.notify( pinHigh );
+    
+    if ( pinHigh ) {
+      call GpioInterrupt.enableFallingEdge();
+    } else {
+      call GpioInterrupt.enableRisingEdge();
+    }
+  }
+}
diff --git a/tos/platforms/telosb/UserButton.h b/tos/platforms/telosb/UserButton.h
new file mode 100644
index 00000000..726d14d7
--- /dev/null
+++ b/tos/platforms/telosb/UserButton.h
@@ -0,0 +1,44 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telosb platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+#ifndef USERBUTTON_H
+#define USERBUTTON_H
+
+typedef enum { BUTTON_RELEASED = 0, BUTTON_PRESSED = 1 } button_state_t;
+
+#endif
diff --git a/tos/platforms/telosb/UserButtonC.nc b/tos/platforms/telosb/UserButtonC.nc
new file mode 100644
index 00000000..f3b21c96
--- /dev/null
+++ b/tos/platforms/telosb/UserButtonC.nc
@@ -0,0 +1,63 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telosb platform. Get
+ * returns the current state of the button by reading the pin,
+ * regardless of whether enable() or disable() has been called on the
+ * Interface. Notify.enable() and Notify.disable() modify the
+ * underlying interrupt state of the pin, and have the effect of
+ * enabling or disabling notifications that the button has changed
+ * state.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.1 $
+ */
+
+#include <UserButton.h>
+
+configuration UserButtonC {
+  provides interface Get<button_state_t>;
+  provides interface Notify<button_state_t>;
+}
+implementation {
+  components HplUserButtonC;
+  components new SwitchToggleC();
+  SwitchToggleC.GpioInterrupt -> HplUserButtonC.GpioInterrupt;
+  SwitchToggleC.GeneralIO -> HplUserButtonC.GeneralIO;
+
+  components UserButtonP;
+  Get = UserButtonP;
+  Notify = UserButtonP;
+
+  UserButtonP.GetLower -> SwitchToggleC.Get;
+  UserButtonP.NotifyLower -> SwitchToggleC.Notify;
+}
diff --git a/tos/platforms/telosb/UserButtonP.nc b/tos/platforms/telosb/UserButtonP.nc
new file mode 100644
index 00000000..b6523dd1
--- /dev/null
+++ b/tos/platforms/telosb/UserButtonP.nc
@@ -0,0 +1,77 @@
+/**
+ * Copyright (c) 2007 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Implementation of the user button for the telosb platform
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $
+ */
+
+#include <UserButton.h>
+
+module UserButtonP {
+  provides interface Get<button_state_t>;
+  provides interface Notify<button_state_t>;
+
+  uses interface Get<bool> as GetLower;
+  uses interface Notify<bool> as NotifyLower;
+}
+implementation {
+  
+  command button_state_t Get.get() { 
+    // telosb user button pin is high when released - invert state
+    if ( call GetLower.get() ) {
+      return BUTTON_RELEASED;
+    } else {
+      return BUTTON_PRESSED;
+    }
+  }
+
+  command error_t Notify.enable() {
+    return call NotifyLower.enable();
+  }
+
+  command error_t Notify.disable() {
+    return call NotifyLower.disable();
+  }
+
+  event void NotifyLower.notify( bool val ) {
+    // telosb user button pin is high when released - invert state
+    if ( val ) {
+      signal Notify.notify( BUTTON_RELEASED );
+    } else {
+      signal Notify.notify( BUTTON_PRESSED );
+    }
+  }
+  
+  default event void Notify.notify( button_state_t val ) { }
+}
diff --git a/tos/platforms/telosb/VoltageC.nc b/tos/platforms/telosb/VoltageC.nc
new file mode 100644
index 00000000..fe0500b9
--- /dev/null
+++ b/tos/platforms/telosb/VoltageC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ */
+
+generic configuration VoltageC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  Read = Msp430InternalVoltageC.Read;
+}
+
diff --git a/tos/platforms/telosb/VoltageStreamC.nc b/tos/platforms/telosb/VoltageStreamC.nc
new file mode 100644
index 00000000..16288971
--- /dev/null
+++ b/tos/platforms/telosb/VoltageStreamC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ */
+
+generic configuration VoltageStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  ReadStream = Msp430InternalVoltageC.ReadStream;
+}
+
diff --git a/tos/platforms/telosb/chips/stm25p/HplStm25pPinsC.nc b/tos/platforms/telosb/chips/stm25p/HplStm25pPinsC.nc
new file mode 100644
index 00000000..f236e843
--- /dev/null
+++ b/tos/platforms/telosb/chips/stm25p/HplStm25pPinsC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of general-purpose I/O for a ST M25P chip
+ * connected to a TI MSP430.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ */
+
+configuration HplStm25pPinsC {
+
+  provides interface GeneralIO as CSN;
+  provides interface GeneralIO as Hold;
+
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC as HplGeneralIOC;
+  components new Msp430GpioC() as CSNM;
+  components new Msp430GpioC() as HoldM;
+
+  CSNM -> HplGeneralIOC.Port44;
+  HoldM -> HplGeneralIOC.Port47;
+
+  CSN = CSNM;
+  Hold = HoldM;
+
+}
diff --git a/tos/platforms/telosb/chips/stm25p/HplStm25pSpiC.nc b/tos/platforms/telosb/chips/stm25p/HplStm25pSpiC.nc
new file mode 100644
index 00000000..e9c08b9a
--- /dev/null
+++ b/tos/platforms/telosb/chips/stm25p/HplStm25pSpiC.nc
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HPL implementation of the Spi bus for a ST M25P chip connected to a
+ * TI MSP430.
+ *
+ * @author Jonathan Hui <jhui@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ */
+
+configuration HplStm25pSpiC {
+
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+
+}
+
+implementation {
+
+  components new Msp430Spi0C() as SpiC;
+  Resource = SpiC;
+  SpiByte = SpiC;
+  SpiPacket = SpiC;
+
+}
diff --git a/tos/platforms/telosb/hardware.h b/tos/platforms/telosb/hardware.h
new file mode 100644
index 00000000..50bac246
--- /dev/null
+++ b/tos/platforms/telosb/hardware.h
@@ -0,0 +1,99 @@
+#ifndef _H_hardware_h
+#define _H_hardware_h
+
+#include "msp430hardware.h"
+
+// enum so components can override power saving,
+// as per TEP 112.
+enum {
+  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
+};
+
+// LEDs
+TOSH_ASSIGN_PIN(RED_LED, 5, 4);
+TOSH_ASSIGN_PIN(GREEN_LED, 5, 5);
+TOSH_ASSIGN_PIN(YELLOW_LED, 5, 6);
+
+// CC2420 RADIO #defines
+TOSH_ASSIGN_PIN(RADIO_CSN, 4, 2);
+TOSH_ASSIGN_PIN(RADIO_VREF, 4, 5);
+TOSH_ASSIGN_PIN(RADIO_RESET, 4, 6);
+TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 0);
+TOSH_ASSIGN_PIN(RADIO_SFD, 4, 1);
+TOSH_ASSIGN_PIN(RADIO_GIO0, 1, 3);
+TOSH_ASSIGN_PIN(RADIO_FIFO, 1, 3);
+TOSH_ASSIGN_PIN(RADIO_GIO1, 1, 4);
+TOSH_ASSIGN_PIN(RADIO_CCA, 1, 4);
+
+TOSH_ASSIGN_PIN(CC_FIFOP, 1, 0);
+TOSH_ASSIGN_PIN(CC_FIFO, 1, 3);
+TOSH_ASSIGN_PIN(CC_SFD, 4, 1);
+TOSH_ASSIGN_PIN(CC_VREN, 4, 5);
+TOSH_ASSIGN_PIN(CC_RSTN, 4, 6);
+
+// UART pins
+TOSH_ASSIGN_PIN(SOMI0, 3, 2);
+TOSH_ASSIGN_PIN(SIMO0, 3, 1);
+TOSH_ASSIGN_PIN(UCLK0, 3, 3);
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);
+TOSH_ASSIGN_PIN(URXD1, 3, 7);
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+
+// ADC
+TOSH_ASSIGN_PIN(ADC0, 6, 0);
+TOSH_ASSIGN_PIN(ADC1, 6, 1);
+TOSH_ASSIGN_PIN(ADC2, 6, 2);
+TOSH_ASSIGN_PIN(ADC3, 6, 3);
+
+// HUMIDITY
+TOSH_ASSIGN_PIN(HUM_SDA, 1, 5);
+TOSH_ASSIGN_PIN(HUM_SCL, 1, 6);
+TOSH_ASSIGN_PIN(HUM_PWR, 1, 7);
+
+// GIO pins
+TOSH_ASSIGN_PIN(GIO0, 2, 0);
+TOSH_ASSIGN_PIN(GIO1, 2, 1);
+TOSH_ASSIGN_PIN(GIO2, 2, 3);
+TOSH_ASSIGN_PIN(GIO3, 2, 6);
+
+// 1-Wire
+TOSH_ASSIGN_PIN(ONEWIRE, 2, 4);
+
+void HUMIDITY_MAKE_CLOCK_OUTPUT() @safe() { TOSH_MAKE_HUM_SCL_OUTPUT(); }
+void HUMIDITY_MAKE_CLOCK_INPUT() @safe() { TOSH_MAKE_HUM_SCL_INPUT(); }
+void HUMIDITY_CLEAR_CLOCK() @safe() { TOSH_CLR_HUM_SCL_PIN(); }
+void HUMIDITY_SET_CLOCK() @safe() { TOSH_SET_HUM_SCL_PIN(); }
+void HUMIDITY_MAKE_DATA_OUTPUT() @safe() { TOSH_MAKE_HUM_SDA_OUTPUT(); }
+void HUMIDITY_MAKE_DATA_INPUT() @safe() { TOSH_MAKE_HUM_SDA_INPUT(); }
+void HUMIDITY_CLEAR_DATA() @safe() { TOSH_CLR_HUM_SDA_PIN(); }
+void HUMIDITY_SET_DATA() @safe() { TOSH_SET_HUM_SDA_PIN(); }
+char HUMIDITY_GET_DATA() @safe() { return TOSH_READ_HUM_SDA_PIN(); }
+
+#define HUMIDITY_TIMEOUT_MS          30
+#define HUMIDITY_TIMEOUT_TRIES       20
+
+enum {
+  // Sensirion Humidity addresses and commands
+  TOSH_HUMIDITY_ADDR = 5,
+  TOSH_HUMIDTEMP_ADDR = 3,
+  TOSH_HUMIDITY_RESET = 0x1E
+};
+
+// FLASH
+TOSH_ASSIGN_PIN(FLASH_PWR, 4, 3);
+TOSH_ASSIGN_PIN(FLASH_CS, 4, 4);
+TOSH_ASSIGN_PIN(FLASH_HOLD, 4, 7);
+
+// PROGRAMMING PINS (tri-state)
+//TOSH_ASSIGN_PIN(TCK, );
+TOSH_ASSIGN_PIN(PROG_RX, 1, 1);
+TOSH_ASSIGN_PIN(PROG_TX, 2, 2);
+
+// need to undef atomic inside header files or nesC ignores the directive
+#undef atomic
+
+#endif // _H_hardware_h
diff --git a/tos/platforms/telosb/mac/tkn154/Ieee802154BeaconEnabledC.nc b/tos/platforms/telosb/mac/tkn154/Ieee802154BeaconEnabledC.nc
new file mode 100644
index 00000000..2db8399a
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/Ieee802154BeaconEnabledC.nc
@@ -0,0 +1,180 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.2 $
+ * $Date: 2009-03-04 18:39:38 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154.h"
+configuration Ieee802154BeaconEnabledC
+{
+  provides
+  {
+    // MCPS-SAP
+    interface MCPS_DATA;
+    interface MCPS_PURGE;
+
+    // MLME-SAP
+    interface MLME_ASSOCIATE;
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_COMM_STATUS;
+    interface MLME_DISASSOCIATE;
+    interface MLME_GET;
+/*    interface MLME_GTS;*/
+    interface MLME_ORPHAN;
+    interface MLME_POLL;
+    interface MLME_RESET;
+    interface MLME_RX_ENABLE;
+    interface MLME_SCAN;
+    interface MLME_SET;
+    interface MLME_START;
+    interface MLME_SYNC;
+    interface MLME_SYNC_LOSS;
+    interface IEEE154Frame;
+    interface IEEE154BeaconFrame;
+    interface IEEE154TxBeaconPayload;
+    interface SplitControl as PromiscuousMode;
+    interface Get<uint64_t> as LocalExtendedAddress;
+    interface Timestamp;
+    interface Packet;
+  }
+}
+implementation
+{
+  components TKN154BeaconEnabledP as MAC;
+
+  MLME_START = MAC;
+  MLME_GET = MAC;
+  MLME_SET = MAC;
+  MLME_RESET = MAC;
+  MLME_SYNC = MAC;
+  MLME_SYNC_LOSS = MAC;
+  MLME_BEACON_NOTIFY = MAC;
+  MLME_SCAN = MAC;
+  MCPS_DATA = MAC;
+  MCPS_PURGE = MAC;
+  MLME_ASSOCIATE = MAC;
+  MLME_DISASSOCIATE = MAC;
+  MLME_COMM_STATUS = MAC;
+  MLME_RX_ENABLE = MAC;
+  MLME_POLL = MAC;
+  MLME_ORPHAN = MAC;
+  IEEE154Frame = MAC;
+  IEEE154BeaconFrame = MAC;
+  LocalExtendedAddress = MAC;
+  IEEE154TxBeaconPayload = MAC;
+  PromiscuousMode = MAC;
+  Packet = MAC;
+
+  components CC2420TKN154C as PHY,
+             new Alarm62500hz32C() as PHYAlarm1,
+             new Alarm62500hz32VirtualizedC() as PHYAlarm2,
+             new Alarm62500hz32C() as TKN154TimingPAlarm,
+             LocalTime62500hzC, TKN154TimingP;
+
+  // wire PHY to the PIB
+  PHY.PIBUpdate[IEEE154_macShortAddress] -> MAC.PIBUpdate[IEEE154_macShortAddress];
+  PHY.PIBUpdate[IEEE154_macPANId] -> MAC.PIBUpdate[IEEE154_macPANId];
+  PHY.PIBUpdate[IEEE154_phyCurrentChannel] -> MAC.PIBUpdate[IEEE154_phyCurrentChannel];
+  PHY.PIBUpdate[IEEE154_phyTransmitPower] -> MAC.PIBUpdate[IEEE154_phyTransmitPower];
+  PHY.PIBUpdate[IEEE154_phyCCAMode] -> MAC.PIBUpdate[IEEE154_phyCCAMode];
+  PHY.PIBUpdate[IEEE154_macPanCoordinator] -> MAC.PIBUpdate[IEEE154_macPanCoordinator];
+
+  Timestamp = PHY;
+  PHY.Alarm1 -> PHYAlarm1;
+  PHY.Alarm2 -> PHYAlarm2;
+  PHY.LocalTime -> LocalTime62500hzC;
+  PHY.ReliableWait -> TKN154TimingP;
+  PHY.TimeCalc -> MAC;
+  TKN154TimingP.TimeCalc -> MAC;
+  TKN154TimingP.Leds -> LedsC;
+  TKN154TimingP.CCA -> PHY;
+  TKN154TimingP.SymbolAlarm -> TKN154TimingPAlarm;
+
+  components new Alarm62500hz32VirtualizedC() as  MACAlarm1,
+             new Alarm62500hz32VirtualizedC() as  MACAlarm2,
+             new Alarm62500hz32VirtualizedC() as  MACAlarm3,
+             new Alarm62500hz32VirtualizedC() as  MACAlarm4,
+             new Alarm62500hz32VirtualizedC() as  MACAlarm5,
+             new Alarm62500hz32VirtualizedC() as  MACAlarm6,
+             new Alarm62500hz32VirtualizedC() as  MACAlarm7,
+             new Alarm62500hz32VirtualizedC() as  MACAlarm8,
+             new Alarm62500hz32VirtualizedC() as  MACAlarm9,
+             new Alarm62500hz32VirtualizedC() as  MACAlarm10,
+             new Alarm62500hz32VirtualizedC() as  MACAlarm11,
+             new Alarm62500hz32VirtualizedC() as  MACAlarm12,
+             new Alarm62500hz32VirtualizedC() as  MACAlarm13,
+
+             new Timer62500C() as  MACTimer1,
+             new Timer62500C() as  MACTimer2,
+             new Timer62500C() as  MACTimer3,
+             new Timer62500C() as  MACTimer4,
+             new Timer62500C() as  MACTimer5;
+
+  MAC.Alarm1 ->  MACAlarm1;
+  MAC.Alarm2 ->  MACAlarm2;
+  MAC.Alarm3 ->  MACAlarm3;
+  MAC.Alarm4 ->  MACAlarm4;
+  MAC.Alarm5 ->  MACAlarm5;
+  MAC.Alarm6 ->  MACAlarm6;
+  MAC.Alarm7 ->  MACAlarm7;
+  MAC.Alarm8 ->  MACAlarm8;
+  MAC.Alarm9 ->  MACAlarm9;
+  MAC.Alarm10 ->  MACAlarm10;
+  MAC.Alarm11 ->  MACAlarm11;
+  MAC.Alarm12 ->  MACAlarm12;
+  MAC.Alarm13 ->  MACAlarm13;
+
+  MAC.Timer1 -> MACTimer1;
+  MAC.Timer2 -> MACTimer2;
+  MAC.Timer3 -> MACTimer3;
+  MAC.Timer4 -> MACTimer4;
+  MAC.Timer5 -> MACTimer5;
+  MAC.LocalTime -> LocalTime62500hzC;
+
+  // wire MAC <-> PHY
+  MAC.RadioTx -> PHY;
+  MAC.SlottedCsmaCa -> PHY;
+  MAC.RadioRx -> PHY;
+  MAC.RadioOff -> PHY;
+  MAC.EnergyDetection -> PHY;
+  MAC.PhySplitControl -> PHY;
+  MAC.RadioPromiscuousMode -> PHY.RadioPromiscuousMode;
+  PHY.FrameUtility -> MAC;
+
+  components RandomC, LedsC, NoLedsC;
+  MAC.Random -> RandomC;
+  MAC.Leds -> LedsC;
+  PHY.Random -> RandomC;
+
+#ifdef TKN154_DEBUG
+  components DebugC;
+#endif
+}
diff --git a/tos/platforms/telosb/mac/tkn154/Ieee802154NonBeaconEnabledC.nc b/tos/platforms/telosb/mac/tkn154/Ieee802154NonBeaconEnabledC.nc
new file mode 100644
index 00000000..67699847
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/Ieee802154NonBeaconEnabledC.nc
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-05-18 12:54:11 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+#include "TKN154.h"
+configuration Ieee802154NonBeaconEnabledC
+{
+  provides
+  {
+    // MCPS-SAP
+    interface MCPS_DATA;
+    interface MCPS_PURGE;
+
+    // MLME-SAP
+    interface MLME_ASSOCIATE;
+    interface MLME_BEACON_NOTIFY;
+    interface MLME_COMM_STATUS;
+    interface MLME_DISASSOCIATE;
+    interface MLME_GET;
+    interface MLME_ORPHAN;
+    interface MLME_POLL;
+    interface MLME_RESET;
+    interface MLME_RX_ENABLE;
+    interface MLME_SCAN;
+    interface MLME_SET;
+    interface MLME_START;
+    interface IEEE154Frame;
+    interface IEEE154BeaconFrame;
+    interface IEEE154TxBeaconPayload;
+    interface SplitControl as PromiscuousMode;
+    interface Get<uint64_t> as LocalExtendedAddress;
+    interface Timestamp;
+    interface Packet;
+  }
+}
+implementation
+{
+  components TKN154NonBeaconEnabledP as MAC;
+
+  MLME_START = MAC;
+  MLME_GET = MAC;
+  MLME_SET = MAC;
+  MLME_RESET = MAC;
+  MLME_BEACON_NOTIFY = MAC;
+  MLME_SCAN = MAC;
+  MCPS_DATA = MAC;
+  MCPS_PURGE = MAC;
+  MLME_ASSOCIATE = MAC;
+  MLME_DISASSOCIATE = MAC;
+  MLME_COMM_STATUS = MAC;
+  MLME_RX_ENABLE = MAC;
+  MLME_POLL = MAC;
+  MLME_ORPHAN = MAC;
+  IEEE154Frame = MAC;
+  IEEE154BeaconFrame = MAC;
+  IEEE154TxBeaconPayload = MAC;
+  LocalExtendedAddress = MAC;
+  PromiscuousMode = MAC;
+  Packet = MAC;
+
+  components CC2420TKN154C as PHY,
+             new Alarm62500hz32C() as PHYAlarm1,
+             new Alarm62500hz32VirtualizedC() as PHYAlarm2,
+             new Alarm62500hz32C() as TKN154TimingPAlarm,
+             LocalTime62500hzC, TKN154TimingP;
+
+  // wire PHY to the PIB
+  PHY.PIBUpdate[IEEE154_macShortAddress] -> MAC.PIBUpdate[IEEE154_macShortAddress];
+  PHY.PIBUpdate[IEEE154_macPANId] -> MAC.PIBUpdate[IEEE154_macPANId];
+  PHY.PIBUpdate[IEEE154_phyCurrentChannel] -> MAC.PIBUpdate[IEEE154_phyCurrentChannel];
+  PHY.PIBUpdate[IEEE154_phyTransmitPower] -> MAC.PIBUpdate[IEEE154_phyTransmitPower];
+  PHY.PIBUpdate[IEEE154_phyCCAMode] -> MAC.PIBUpdate[IEEE154_phyCCAMode];
+  PHY.PIBUpdate[IEEE154_macPanCoordinator] -> MAC.PIBUpdate[IEEE154_macPanCoordinator];
+
+  Timestamp = PHY;
+  PHY.Alarm1 -> PHYAlarm1;
+  PHY.Alarm2 -> PHYAlarm2;
+  PHY.LocalTime -> LocalTime62500hzC;
+  PHY.ReliableWait -> TKN154TimingP;
+  PHY.TimeCalc -> MAC;
+  TKN154TimingP.TimeCalc -> MAC;
+  TKN154TimingP.Leds -> LedsC;
+  TKN154TimingP.CCA -> PHY;
+  TKN154TimingP.SymbolAlarm -> TKN154TimingPAlarm;
+
+  components new Timer62500C() as  MACTimer1,
+             new Timer62500C() as  MACTimer2,
+             new Timer62500C() as  MACTimer3,
+             new Timer62500C() as  MACTimer4,
+             new Timer62500C() as  MACTimer5;
+
+  MAC.Timer1 -> MACTimer1;
+  MAC.Timer2 -> MACTimer2;
+  MAC.Timer3 -> MACTimer3;
+  MAC.Timer4 -> MACTimer4;
+  MAC.Timer5 -> MACTimer5;
+  MAC.LocalTime -> LocalTime62500hzC;
+
+  // wire MAC <-> PHY
+  MAC.RadioTx -> PHY;
+  MAC.UnslottedCsmaCa -> PHY;
+  MAC.RadioRx -> PHY;
+  MAC.RadioOff -> PHY;
+  MAC.EnergyDetection -> PHY;
+  MAC.PhySplitControl -> PHY;
+  MAC.RadioPromiscuousMode -> PHY.RadioPromiscuousMode;
+  PHY.FrameUtility -> MAC;
+
+  components RandomC, LedsC, NoLedsC;
+  MAC.Random -> RandomC;
+  MAC.Leds -> LedsC;
+  PHY.Random -> RandomC;
+
+#ifdef TKN154_DEBUG
+  components DebugC;
+#endif
+}
diff --git a/tos/platforms/telosb/mac/tkn154/Makefile.include b/tos/platforms/telosb/mac/tkn154/Makefile.include
new file mode 100644
index 00000000..b109e1d7
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/Makefile.include
@@ -0,0 +1,8 @@
+ifdef TKN154_PIERCEBOARD
+CFLAGS += -I$(TOSDIR)/platforms/telosb/mac/tkn154/timer/pierceboard
+endif
+
+CFLAGS += -I$(TOSDIR)/platforms/telosb/mac/tkn154 \
+	-I$(TOSDIR)/platforms/telosb/mac/tkn154/timer \
+	-I$(TOSDIR)/chips/cc2420_tkn154
+
diff --git a/tos/platforms/telosb/mac/tkn154/TKN154TimingP.nc b/tos/platforms/telosb/mac/tkn154/TKN154TimingP.nc
new file mode 100644
index 00000000..1672987f
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/TKN154TimingP.nc
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * extraification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.3 $
+ * $Date: 2009-03-04 18:31:56 $
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+/** 
+ * In slotted CSMA-CA frames must be sent on backoff boundaries (slot width:
+ * 320 us). The TelosB platform lacks a clock with sufficient precision and
+ * accuracy, i.e. for slotted CSMA-CA the timing is *not* standard compliant
+ * (this code is experimental)
+ */
+
+#include "TKN154_platform.h"
+module TKN154TimingP
+{
+  provides interface ReliableWait;
+  uses interface TimeCalc;
+  uses interface GetNow<bool> as CCA;
+  uses interface Alarm<T62500hz,uint32_t> as SymbolAlarm;
+  uses interface Leds;
+}
+implementation
+{
+  enum {
+    S_WAIT_OFF,
+    S_WAIT_RX,
+    S_WAIT_TX,
+    S_WAIT_BACKOFF,
+  };
+  uint8_t m_state = S_WAIT_OFF;
+
+  async command bool ReliableWait.ccaOnBackoffBoundary(uint32_t slot0)
+  {
+    // There is no point in trying
+    return (call CCA.getNow() ? 20: 0);
+  }
+
+  async command void ReliableWait.waitRx(uint32_t t0, uint32_t dt)
+  {
+    if (m_state != S_WAIT_OFF){
+      ASSERT(0);
+      return;
+    }
+    m_state = S_WAIT_RX;
+    call SymbolAlarm.startAt(t0 - 16, dt); // subtract 12 symbols required for Rx calibration
+  }
+
+  async command void ReliableWait.waitTx(uint32_t t0, uint32_t dt)
+  {
+    if (m_state != S_WAIT_OFF){
+      ASSERT(0);
+      return;
+    }
+    m_state = S_WAIT_TX;
+    call SymbolAlarm.startAt(t0 - 16, dt); // subtract 12 symbols required for Tx calibration
+  }
+    
+  async command void ReliableWait.waitBackoff(uint32_t dt)
+  {
+    if (m_state != S_WAIT_OFF){
+      ASSERT(0);
+      return;
+    }
+    m_state = S_WAIT_BACKOFF;
+    call SymbolAlarm.start(dt);
+  }
+
+  async event void SymbolAlarm.fired() 
+  {
+    switch (m_state)
+    {
+      case S_WAIT_RX: m_state = S_WAIT_OFF; signal ReliableWait.waitRxDone(); break;
+      case S_WAIT_TX: m_state = S_WAIT_OFF; signal ReliableWait.waitTxDone(); break;
+      case S_WAIT_BACKOFF: m_state = S_WAIT_OFF; signal ReliableWait.waitBackoffDone(); break;
+      default: ASSERT(0); break;
+    }
+  }
+
+}
diff --git a/tos/platforms/telosb/mac/tkn154/TKN154_platform.h b/tos/platforms/telosb/mac/tkn154/TKN154_platform.h
new file mode 100644
index 00000000..403b68fc
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/TKN154_platform.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.4 $
+ * $Date: 2009-03-26 17:50:44 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+#ifndef __TKN154_platform_H
+#define __TKN154_platform_H
+
+/**************************************************** 
+ * The following constants define guard times on Tmote Sky / TelosB. 
+ * All values are in symbol time (1 symbol = 16 us) and assume the 
+ * default system configuration (MCLK running at 4 MHz)
+ */
+
+enum {
+  // the expected maximum time between calling a transmit() operation and
+  // the radio putting the first byte on the channel assuming no CSMA-CA
+  IEEE154_RADIO_TX_DELAY = 400,
+
+  // the expected maximum time between calling a receive() operation and the 
+  // the radio actually being put in receive mode
+  IEEE154_RADIO_RX_DELAY = 400,
+
+  // defines at what time the MAC payload for a beacon frame is assembled before
+  // the next scheduled beacon transmission time; the value must be smaller than
+  // the beacon interval plus the time for preparing the Tx operation
+  BEACON_PAYLOAD_UPDATE_INTERVAL = 2500, 
+};
+
+// Defines the time to power the CC2420 radio from "Power Down" mode to "Idle"
+// mode. The actual start up time of the oscillator is 860 us (with default
+// capacitor, see CC2420 datasheet), but our constant must also include
+// software latency (task posting, etc.) + shutting the radio down
+// -> we keep it conservative, otherwise we may lose beacons
+// NOTE: if this constant is not defined, the radio will never be powered down
+// during inactive period, but always stay in idle (which consumes more energy).
+#define IEEE154_RADIO_POWERUP_TIME 200
+
+#endif
+
diff --git a/tos/platforms/telosb/mac/tkn154/platform_message.h b/tos/platforms/telosb/mac/tkn154/platform_message.h
new file mode 100644
index 00000000..f13513df
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/platform_message.h
@@ -0,0 +1,27 @@
+
+
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include <Serial.h>
+
+/* The following include pulls in the ieee154_header_t/ieee154_metadata_t definitions */
+#include <TKN154_MAC.h>
+
+/* TOSH_DATA_LENGTH should be the maximum length of the MAC payload */
+#define TOSH_DATA_LENGTH IEEE154_aMaxMACPayloadSize
+
+typedef union message_header {
+  ieee154_header_t ieee154;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union TOSRadioFooter {
+} message_footer_t;
+
+typedef union TOSRadioMetadata {
+  ieee154_metadata_t ieee154;
+} message_metadata_t;
+
+#endif
diff --git a/tos/platforms/telosb/mac/tkn154/timer/Alarm32khz32VirtualizedP.nc b/tos/platforms/telosb/mac/tkn154/timer/Alarm32khz32VirtualizedP.nc
new file mode 100644
index 00000000..290543cd
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/timer/Alarm32khz32VirtualizedP.nc
@@ -0,0 +1,14 @@
+#include "Timer62500hz.h"
+configuration Alarm32khz32VirtualizedP
+{
+  provides interface Alarm<T32khz,uint32_t> as Alarm[ uint8_t num ];
+}
+implementation
+{
+  components new Alarm32khz32C(), MainC;
+  components new VirtualizeAlarmC(T32khz, uint32_t, uniqueCount(UQ_ALARM_32KHZ32));
+
+  Alarm = VirtualizeAlarmC;
+  MainC -> VirtualizeAlarmC.Init;
+  VirtualizeAlarmC.AlarmFrom -> Alarm32khz32C;
+}
diff --git a/tos/platforms/telosb/mac/tkn154/timer/Alarm32khzTo62500hzTransformC.nc b/tos/platforms/telosb/mac/tkn154/timer/Alarm32khzTo62500hzTransformC.nc
new file mode 100644
index 00000000..c7f1bdfa
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/timer/Alarm32khzTo62500hzTransformC.nc
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Date: 2009-03-04 18:31:56 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+module Alarm32khzTo62500hzTransformC
+
+{
+  provides interface Alarm<T62500hz,uint32_t> as Alarm[ uint8_t num ];
+  uses interface Alarm<T32khz,uint32_t> as AlarmFrom[ uint8_t num ];
+}
+implementation
+{
+
+  /**
+   * TelosB lacks a clock that satisfies the precision and accuracy 
+   * requirements of the IEEE 802.15.4 standard (62500 Hz, +-40 ppm).
+   * As a workaround, we cast one tick of the 32768 Hz clock to two
+   * IEEE 802.15.4 symbols, which introduces a small (5%) error.
+   * As a consequence the timing of the beacon interval and slotted 
+   * CSMA-CA algorithm is not standard-compliant anymore.
+   */
+
+#warning "Warning: MAC timing is not standard compliant!"
+
+  async command void Alarm.start[ uint8_t num ](uint32_t dt){ call AlarmFrom.start[num](dt >> 1);}
+  async command void Alarm.stop[ uint8_t num ](){ call AlarmFrom.stop[num]();}
+  async event void AlarmFrom.fired[ uint8_t num ](){ signal Alarm.fired[num]();}
+  async command bool Alarm.isRunning[ uint8_t num ](){ return call AlarmFrom.isRunning[num]();}
+  async command uint32_t Alarm.getAlarm[ uint8_t num ](){ return call AlarmFrom.getAlarm[num]() << 1;}
+
+  async command uint32_t Alarm.getNow[ uint8_t num ](){ 
+    // this might shift out the most significant bit
+    // that's why Alarm.startAt() is converted to a Alarm.start()
+    return call AlarmFrom.getNow[num]() << 1; 
+  }
+
+  async command void Alarm.startAt[ uint8_t num ](uint32_t t0, uint32_t dt){
+    // t0 occured before "now"
+    atomic {
+      uint32_t now = call Alarm.getNow[num](), elapsed;
+      if (t0 < now)
+        elapsed = now - t0;
+      else
+        elapsed = ~(t0 - now) + 1;
+      if (elapsed > dt)
+        dt = elapsed;
+      dt -= elapsed;
+      call Alarm.start[num](dt);
+    }
+  }
+
+  /******************** Defaults ****************************/
+
+  default async command void AlarmFrom.start[ uint8_t num ](uint32_t dt){ }
+  default async command void AlarmFrom.stop[ uint8_t num ](){ }
+  default async command bool AlarmFrom.isRunning[ uint8_t num ](){ return FALSE;}
+  default async event void Alarm.fired[ uint8_t num ](){}
+  default async command void AlarmFrom.startAt[ uint8_t num ](uint32_t t0, uint32_t dt){ }
+  default async command uint32_t AlarmFrom.getNow[ uint8_t num ](){ return 0;}
+  default async command uint32_t AlarmFrom.getAlarm[ uint8_t num ](){ return 0;}
+}
diff --git a/tos/platforms/telosb/mac/tkn154/timer/Alarm62500hz32C.nc b/tos/platforms/telosb/mac/tkn154/timer/Alarm62500hz32C.nc
new file mode 100644
index 00000000..b73e6376
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/timer/Alarm62500hz32C.nc
@@ -0,0 +1,17 @@
+#include "Timer62500hz.h"
+generic configuration Alarm62500hz32C()
+{
+  provides interface Alarm<T62500hz,uint32_t> as Alarm;
+}
+implementation
+{
+  components new Alarm32khz32C(), MainC;
+  components new Alarm62500hz32P();
+
+  Alarm = Alarm62500hz32P;
+
+#if defined(PLATFORM_TELOSB)
+  MainC -> Alarm32khz32C.Init;
+#endif
+  Alarm62500hz32P.AlarmFrom -> Alarm32khz32C;
+}
diff --git a/tos/platforms/telosb/mac/tkn154/timer/Alarm62500hz32P.nc b/tos/platforms/telosb/mac/tkn154/timer/Alarm62500hz32P.nc
new file mode 100644
index 00000000..276515f5
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/timer/Alarm62500hz32P.nc
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2008, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright 
+ *   notice, this list of conditions and the following disclaimer in the 
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitaet Berlin nor the names 
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * - Revision -------------------------------------------------------------
+ * $Date: 2008-11-25 09:35:09 $
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * ========================================================================
+ */
+
+generic module Alarm62500hz32P()
+
+{
+  provides interface Alarm<T62500hz,uint32_t> as Alarm;
+  uses interface Alarm<T32khz,uint32_t> as AlarmFrom;
+}
+implementation
+{
+/**
+ * TelosB lacks a clock with the precision and accuracy 
+ * required by the 802.15.4 standard (62500 Hz, 40 ppm).
+ * As a workaround, we cast one tick of the 32768 Hz clock to 
+ * two 802.15.4 symbols, which introduces a small (5%) error.
+ * Thus the channel access in particular in beacon-enabled PANs 
+ * (slotted CSMA-CA) is not be standard-compliant!
+ */
+
+  async command void Alarm.start(uint32_t dt){ call AlarmFrom.start(dt >> 1);}
+  async command void Alarm.stop(){ call AlarmFrom.stop();}
+  async event void AlarmFrom.fired(){ signal Alarm.fired();}
+  async command bool Alarm.isRunning(){ return call AlarmFrom.isRunning();}
+  async command uint32_t Alarm.getAlarm(){ return call AlarmFrom.getAlarm() << 1;}
+
+  async command uint32_t Alarm.getNow(){ 
+    // this might shift out the most significant bit
+    // that's why Alarm.startAt() is converted to a Alarm.start()
+    return call AlarmFrom.getNow() << 1; 
+  }
+
+  async command void Alarm.startAt(uint32_t t0, uint32_t dt){
+    // t0 occured before "now"
+    atomic {
+      uint32_t now = call Alarm.getNow(), elapsed;
+      if (t0 < now)
+        elapsed = now - t0;
+      else
+        elapsed = ~(t0 - now) + 1;
+      if (elapsed > dt)
+        dt = elapsed;
+      dt -= elapsed;
+      call Alarm.start(dt);
+    }
+  }
+
+  /******************** Defaults ****************************/
+
+  default async command void AlarmFrom.start(uint32_t dt){ }
+  default async command void AlarmFrom.stop(){ }
+  default async command bool AlarmFrom.isRunning(){ return FALSE;}
+  default async event void Alarm.fired(){}
+  default async command void AlarmFrom.startAt(uint32_t t0, uint32_t dt){ }
+  default async command uint32_t AlarmFrom.getNow(){ return 0;}
+  default async command uint32_t AlarmFrom.getAlarm(){ return 0;}
+}
diff --git a/tos/platforms/telosb/mac/tkn154/timer/Alarm62500hz32VirtualizedC.nc b/tos/platforms/telosb/mac/tkn154/timer/Alarm62500hz32VirtualizedC.nc
new file mode 100644
index 00000000..c3aac4c5
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/timer/Alarm62500hz32VirtualizedC.nc
@@ -0,0 +1,58 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Alarm62500hzC is the alarm for async 62500hz alarms (virtualized)
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @author Jan Hauer <hauer@tkn.tu-berlin.de>
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+//#include "Timer.h"
+#include "Timer62500hz.h"
+generic configuration Alarm62500hz32VirtualizedC()
+{
+  provides interface Alarm<T62500hz,uint32_t>;
+}
+implementation
+{
+  components Alarm32khzTo62500hzTransformC, Alarm32khz32VirtualizedP;
+  enum {
+    CLIENT_ID = unique(UQ_ALARM_32KHZ32),
+  };
+  
+  Alarm = Alarm32khzTo62500hzTransformC.Alarm[CLIENT_ID];
+  Alarm32khzTo62500hzTransformC.AlarmFrom[CLIENT_ID] -> Alarm32khz32VirtualizedP.Alarm[CLIENT_ID];
+}
+
diff --git a/tos/platforms/telosb/mac/tkn154/timer/HilTimer62500hzC.nc b/tos/platforms/telosb/mac/tkn154/timer/HilTimer62500hzC.nc
new file mode 100644
index 00000000..fdf84642
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/timer/HilTimer62500hzC.nc
@@ -0,0 +1,57 @@
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de> (62500hz)
+ * @see  Please refer to TEP 102 for more information about this component and its
+ *          intended use.
+ */
+
+#include "Timer.h"
+#include "Timer62500hz.h"
+configuration HilTimer62500hzC
+{
+  provides interface Timer<T62500hz> as Timer62500hz[ uint8_t num ];
+}
+implementation
+{
+  components new Alarm62500hz32VirtualizedC() as Alarm;
+  components new AlarmToTimerC(T62500hz);
+  components new VirtualizeTimerC(T62500hz,uniqueCount(UQ_TIMER_62500HZ));
+
+  Timer62500hz = VirtualizeTimerC;
+
+  VirtualizeTimerC.TimerFrom -> AlarmToTimerC;
+  AlarmToTimerC.Alarm -> Alarm;
+}
diff --git a/tos/platforms/telosb/mac/tkn154/timer/LocalTime62500hzC.nc b/tos/platforms/telosb/mac/tkn154/timer/LocalTime62500hzC.nc
new file mode 100644
index 00000000..07240b1b
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/timer/LocalTime62500hzC.nc
@@ -0,0 +1,13 @@
+#include "Timer62500hz.h"
+configuration LocalTime62500hzC
+{
+  provides interface LocalTime<T62500hz>;
+}
+implementation
+{
+  // should be done properly one day (not wasting an alarm slot)
+  components new Alarm62500hz32VirtualizedC(), LocalTime62500hzP;
+  LocalTime = LocalTime62500hzP;
+  LocalTime62500hzP.Alarm -> Alarm62500hz32VirtualizedC.Alarm;
+}
+
diff --git a/tos/platforms/telosb/mac/tkn154/timer/LocalTime62500hzP.nc b/tos/platforms/telosb/mac/tkn154/timer/LocalTime62500hzP.nc
new file mode 100644
index 00000000..30911ac6
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/timer/LocalTime62500hzP.nc
@@ -0,0 +1,15 @@
+#include "Timer62500hz.h"
+module LocalTime62500hzP
+{
+  provides interface LocalTime<T62500hz>;
+  uses interface Alarm<T62500hz,uint32_t>;
+}
+implementation
+{
+  async command uint32_t LocalTime.get()
+  {
+    return call Alarm.getNow();
+  }
+  async event void Alarm.fired(){}
+}
+
diff --git a/tos/platforms/telosb/mac/tkn154/timer/Timer62500C.nc b/tos/platforms/telosb/mac/tkn154/timer/Timer62500C.nc
new file mode 100644
index 00000000..c5d7172a
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/timer/Timer62500C.nc
@@ -0,0 +1,52 @@
+// $Id: Timer62500C.nc,v 1.2 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The virtualized 62500 Hz timer abstraction. Instantiating this 
+ * component gives an 62500 Hz granularity timer.
+ *
+ * @author Philip Levis
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de> (62500hz)
+ * @date   January 16 2006
+ * @see    TEP 102: Timers
+ */ 
+
+#include "Timer62500hz.h"
+
+generic configuration Timer62500C() {
+  provides interface Timer<T62500hz>;
+}
+implementation {
+  components Timer62500P;
+  Timer = Timer62500P.Timer62500[unique(UQ_TIMER_62500HZ)];
+}
+
diff --git a/tos/platforms/telosb/mac/tkn154/timer/Timer62500P.nc b/tos/platforms/telosb/mac/tkn154/timer/Timer62500P.nc
new file mode 100644
index 00000000..81cb3624
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/timer/Timer62500P.nc
@@ -0,0 +1,51 @@
+// $Id: Timer62500P.nc,v 1.2 2010-06-29 22:07:56 scipio Exp $
+/*									tab:4
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/*
+ *
+ * @author Philip Levis
+ * @author Cory Sharp
+ * @author: Jan Hauer <hauer@tkn.tu-berlin.de> (62500hz)
+ * @date   May 16 2005
+ */ 
+
+#include "Timer.h"
+
+configuration Timer62500P {
+  provides interface Timer<T62500hz> as Timer62500[uint8_t id];
+}
+implementation {
+  components HilTimer62500hzC;
+  Timer62500 = HilTimer62500hzC;
+}
+
diff --git a/tos/platforms/telosb/mac/tkn154/timer/Timer62500hz.h b/tos/platforms/telosb/mac/tkn154/timer/Timer62500hz.h
new file mode 100644
index 00000000..bd781d68
--- /dev/null
+++ b/tos/platforms/telosb/mac/tkn154/timer/Timer62500hz.h
@@ -0,0 +1,10 @@
+#ifndef _H_Timer_62500hz_h
+#define _H_Timer_62500hz_h
+
+typedef struct { } T62500hz;
+
+#define UQ_ALARM_32KHZ32 "Virtual.32khz32Alarm"
+#define UQ_ALARM_62500HZ32 "Virtual.62500hzAlarm"
+#define UQ_TIMER_62500HZ "HilTimer62500hzC.Timer"
+#endif
+
diff --git a/tos/platforms/telosb/platform.h b/tos/platforms/telosb/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/tinynode/.platform b/tos/platforms/tinynode/.platform
new file mode 100644
index 00000000..818c7a83
--- /dev/null
+++ b/tos/platforms/tinynode/.platform
@@ -0,0 +1,72 @@
+# Includes that should take precedence come first.  Platforms come before
+# chips because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  And because of that, the current platform's include directory
+# must be specified, otherwise its search order is last instead of first.
+
+push( @includes, qw(
+
+  %T/platforms/tinynode/chips/xe1205
+  %T/platforms/tinynode/chips/mm74hc595
+  %T/platforms/tinynode/chips/at45db
+
+  %T/chips/xe1205/conf
+  %T/chips/xe1205/phy
+  %T/chips/xe1205/mac
+  %T/chips/xe1205
+
+  %T/chips/mm74hc595
+
+  %T/chips/msp430
+  %T/chips/msp430/adc12
+  %T/chips/msp430/dma
+  %T/chips/msp430/pins
+  %T/chips/msp430/timer
+  %T/chips/msp430/usart
+  %T/chips/msp430/sensors
+  %T/chips/at45db
+  %T/lib/timer
+  %T/lib/serial
+  %T/lib/adc
+  %T/lib/power
+
+) );
+
+
+@opts = qw(
+	-gcc=msp430-gcc
+	-mmcu=msp430x1611
+        -fnesc-target=msp430
+        -fnesc-no-debug);
+
+push @opts, "-fnesc-scheduler=TinySchedulerC,TinySchedulerC.TaskBasic,TaskBasic,TaskBasic,runTask,postTask" if !$with_scheduler_flag;
+push @opts, "-mingw-gcc" if $cygwin;
+
+#@commonplatforms = ("msp430");
+
+$ENV{'CIL_MACHINE'} =
+    "version_major=3 " .
+    "version_minor=2 " .
+    "version=msp430-3.2.3 " .
+    "short=2,2 " .
+    "int=2,2 " .
+    "long=4,2 " .
+    "long_long=8,2 " .
+    "pointer=2,2 " .
+    "enum=2,2 " .
+    "float=4,2 " .
+    "double=4,2 " .
+    "long_double=4,2 " .
+    "void=1,1 " .
+    "fun=1,2 " .
+    "wchar_size_size=2,2 " .
+    "alignof_string=1 " .
+    "max_alignment=1 " .
+    "char_wchar_signed=true,true " .
+    "const_string_literals=true " .
+    "big_endian=false " .
+    "underscore_name=false " .
+    "__builtin_va_list=true " .
+    "__thread_is_keyword=true";
+    
+    
diff --git a/tos/platforms/tinynode/ActiveMessageC.nc b/tos/platforms/tinynode/ActiveMessageC.nc
new file mode 100644
index 00000000..06c8fe2c
--- /dev/null
+++ b/tos/platforms/tinynode/ActiveMessageC.nc
@@ -0,0 +1,81 @@
+// $Id: ActiveMessageC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: ActiveMessageC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
+ *
+ */
+
+/**
+ *
+ * The Active Message layer on the TinyNode platform. This is a naming wrapper
+ * around the XE1205 Active Message layer.
+ *
+ * @author Philip Levis, Henri Dubois-Ferriere
+ */
+
+configuration ActiveMessageC {
+  provides {
+    interface SplitControl @atleastonce();
+
+    interface AMSend[uint8_t id];
+    interface Receive[uint8_t id];
+    interface Receive as Snoop[uint8_t id];
+
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+implementation {
+  components XE1205ActiveMessageC as AM;
+
+  SplitControl = AM;
+  
+  AMSend       = AM;
+  Receive      = AM.Receive;
+  Snoop        = AM.Snoop;
+  Packet       = AM;
+  AMPacket     = AM;
+  PacketAcknowledgements = AM;
+}
diff --git a/tos/platforms/tinynode/DemoSensorC.nc b/tos/platforms/tinynode/DemoSensorC.nc
new file mode 100644
index 00000000..58894c4c
--- /dev/null
+++ b/tos/platforms/tinynode/DemoSensorC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorC on the telosb platform provides a
+ * voltage reading, using VoltageC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ * 
+ */
+
+generic configuration DemoSensorC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation
+{
+  components new VoltageC() as DemoSensor;
+  Read = DemoSensor;
+}
diff --git a/tos/platforms/tinynode/DemoSensorNowC.nc b/tos/platforms/tinynode/DemoSensorNowC.nc
new file mode 100644
index 00000000..bee7081b
--- /dev/null
+++ b/tos/platforms/tinynode/DemoSensorNowC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorC on the telosb platform provides a
+ * voltage reading, using VoltageC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ * 
+ */
+
+generic configuration DemoSensorNowC()
+{
+  provides interface Resource;
+  provides interface ReadNow<uint16_t>;
+}
+implementation
+{
+  components new Msp430InternalVoltageC() as DemoSensorNow;
+
+  Resource = DemoSensorNow;
+  ReadNow = DemoSensorNow;
+}
diff --git a/tos/platforms/tinynode/DemoSensorStreamC.nc b/tos/platforms/tinynode/DemoSensorStreamC.nc
new file mode 100644
index 00000000..38027da1
--- /dev/null
+++ b/tos/platforms/tinynode/DemoSensorStreamC.nc
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/** 
+ * DemoSensorStreamC is a generic sensor device that provides a 16-bit
+ * value. The platform author chooses which sensor actually sits
+ * behind DemoSensorStreamC, and though it's probably Voltage, Light, or
+ * Temperature, there are no guarantees.
+ *
+ * This particular DemoSensorStreamC on the telosb platform provides a
+ * voltage reading, using VoltageStreamC. 
+ *
+ * To convert from ADC counts to actual voltage, divide this reading
+ * by 4096 and multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ * 
+ */
+
+generic configuration DemoSensorStreamC()
+{
+  provides interface ReadStream<uint16_t>;
+}
+implementation
+{
+  components new VoltageStreamC() as DemoSensor;
+  ReadStream = DemoSensor;
+}
diff --git a/tos/platforms/tinynode/LedsP.nc b/tos/platforms/tinynode/LedsP.nc
new file mode 100644
index 00000000..32d00a57
--- /dev/null
+++ b/tos/platforms/tinynode/LedsP.nc
@@ -0,0 +1,168 @@
+// $Id: LedsP.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
+
+/*                                                                      
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The implementation of the standard LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ * @date   March 21, 2005
+ */
+
+module LedsP {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+}
+implementation {
+  
+#ifndef dbg
+#define dbg(n,msg)
+#endif  
+
+  command error_t Init.init() {
+    atomic {
+      dbg(DBG_BOOT, "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led0.clr();
+      call Led1.clr();
+      call Led2.clr();
+    }
+    return SUCCESS;
+  }
+
+  async command void Leds.led0On() {
+    dbg(DBG_LED, "LEDS: Led 0 on.\n");
+    call Led0.set();
+  }
+
+  async command void Leds.led0Off() {
+    dbg(DBG_LED, "LEDS: Led 0 off.\n");
+    call Led0.clr();
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    // this should be removed by dead code elimination when compiled for
+    // the physical motes
+    if (call Led0.get())
+      dbg(DBG_LED, "LEDS: Led 0 off.\n");
+    else
+      dbg(DBG_LED, "LEDS: Led 0 on.\n");
+  }
+
+  async command void Leds.led1On() {
+    dbg(DBG_LED, "LEDS: Led 1 on.\n");
+    call Led1.set();
+  }
+
+  async command void Leds.led1Off() {
+    dbg(DBG_LED, "LEDS: Led 1 off.\n");
+    call Led1.clr();
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    if (call Led1.get())
+      dbg(DBG_LED, "LEDS: Led 1 off.\n");
+    else
+      dbg(DBG_LED, "LEDS: Led 1 on.\n");
+  }
+
+  async command void Leds.led2On() {
+    dbg(DBG_LED, "LEDS: Led 2 on.\n");
+    call Led2.set();
+  }
+
+  async command void Leds.led2Off() {
+    dbg(DBG_LED, "LEDS: Led 2 off.\n");
+    call Led2.clr();
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    if (call Led2.get())
+      dbg(DBG_LED, "LEDS: Led 2 off.\n");
+    else
+      dbg(DBG_LED, "LEDS: Led 2 on.\n");
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (call Led0.get()) {
+        rval |= LEDS_LED0;
+      }
+      if (call Led1.get()) {
+        rval |= LEDS_LED1;
+      }
+      if (call Led2.get()) {
+        rval |= LEDS_LED2;
+      }
+    return rval;
+  }
+}
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+        call Leds.led0On();
+      }
+      else {
+        call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+        call Leds.led1On();
+      }
+      else {
+        call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+        call Leds.led2On();
+      }
+      else {
+        call Leds.led2Off();
+      }
+    }
+  }
+}
diff --git a/tos/platforms/tinynode/PlatformC.nc b/tos/platforms/tinynode/PlatformC.nc
new file mode 100644
index 00000000..a63f99c7
--- /dev/null
+++ b/tos/platforms/tinynode/PlatformC.nc
@@ -0,0 +1,52 @@
+// $Id: PlatformC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre and Cory Sharp
+ */
+#include "hardware.h"
+
+configuration PlatformC
+{
+  provides interface Init;
+}
+implementation
+{
+  components PlatformP
+    , Msp430ClockC
+    ;
+
+  Init = PlatformP;
+  PlatformP.Msp430ClockInit -> Msp430ClockC.Init;
+}
+
diff --git a/tos/platforms/tinynode/PlatformLedsC.nc b/tos/platforms/tinynode/PlatformLedsC.nc
new file mode 100644
index 00000000..c5e5ea3d
--- /dev/null
+++ b/tos/platforms/tinynode/PlatformLedsC.nc
@@ -0,0 +1,65 @@
+// $Id: PlatformLedsC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
+
+/* Copyright (c) 2000-2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Joe Polastre
+ */
+#include "hardware.h"
+
+configuration PlatformLedsC {
+  provides interface GeneralIO as Led0; // red
+  provides interface GeneralIO as Led1; // green
+  provides interface GeneralIO as Led2; // yellow
+  uses interface Init;
+}
+implementation
+{
+  components 
+  HplMsp430GeneralIOC as GeneralIOC, 
+    new Msp430GpioC() as Led0Impl,
+    new Msp430GpioC() as Led1Impl,
+    new Msp430GpioC() as Led2Impl;
+
+  Led0 = Led0Impl;
+  Led0Impl -> GeneralIOC.Port15;
+
+  Led1 = Led1Impl;
+  Led1Impl -> GeneralIOC.Port23;
+
+  Led2 = Led2Impl;
+  Led2Impl -> GeneralIOC.Port24;
+
+  components PlatformP;
+  Init = PlatformP.LedsInit;
+}
+
diff --git a/tos/platforms/tinynode/PlatformP.nc b/tos/platforms/tinynode/PlatformP.nc
new file mode 100644
index 00000000..81e9dbfb
--- /dev/null
+++ b/tos/platforms/tinynode/PlatformP.nc
@@ -0,0 +1,19 @@
+#include "hardware.h"
+
+module PlatformP{
+  provides interface Init;
+  uses interface Init as Msp430ClockInit;
+  uses interface Init as LedsInit;
+}
+implementation {
+  command error_t Init.init() {
+    call Msp430ClockInit.init();
+    TOSH_SET_PIN_DIRECTIONS();
+    call LedsInit.init();
+    return SUCCESS;
+  }
+
+  default command error_t LedsInit.init() { return SUCCESS; }
+
+}
+
diff --git a/tos/platforms/tinynode/PlatformSerialC.nc b/tos/platforms/tinynode/PlatformSerialC.nc
new file mode 100644
index 00000000..d8eef3a4
--- /dev/null
+++ b/tos/platforms/tinynode/PlatformSerialC.nc
@@ -0,0 +1,15 @@
+configuration PlatformSerialC {
+  provides interface StdControl;
+  provides interface UartStream;
+}
+
+implementation {
+  components new Msp430Uart1C() as UartC;
+  UartStream = UartC;
+
+  components TinyNodeSerialP;
+  StdControl = TinyNodeSerialP;
+  TinyNodeSerialP.Msp430UartConfigure <- UartC.Msp430UartConfigure;
+  TinyNodeSerialP.Resource -> UartC.Resource;
+}
+
diff --git a/tos/platforms/tinynode/TinyNodeSerialP.nc b/tos/platforms/tinynode/TinyNodeSerialP.nc
new file mode 100644
index 00000000..0222530c
--- /dev/null
+++ b/tos/platforms/tinynode/TinyNodeSerialP.nc
@@ -0,0 +1,27 @@
+module TinyNodeSerialP {
+  provides interface StdControl;
+  provides interface Msp430UartConfigure;
+  uses interface Resource;
+}
+implementation {
+
+  msp430_uart_union_config_t msp430_uart_tinynode_config = {{ubr: UBR_1MHZ_115200, umctl: UMCTL_1MHZ_115200, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0, utxe : 1, urxe : 1}};
+  
+  
+  command error_t StdControl.start(){
+    return call Resource.immediateRequest();
+  }
+
+  command error_t StdControl.stop(){
+    call Resource.release();
+    return SUCCESS;
+  }
+
+  event void Resource.granted(){}
+  
+  async command msp430_uart_union_config_t* Msp430UartConfigure.getConfig() {
+    return &msp430_uart_tinynode_config;
+  }
+
+}
+
diff --git a/tos/platforms/tinynode/VoltageC.nc b/tos/platforms/tinynode/VoltageC.nc
new file mode 100644
index 00000000..fe0500b9
--- /dev/null
+++ b/tos/platforms/tinynode/VoltageC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ */
+
+generic configuration VoltageC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  Read = Msp430InternalVoltageC.Read;
+}
+
diff --git a/tos/platforms/tinynode/VoltageStreamC.nc b/tos/platforms/tinynode/VoltageStreamC.nc
new file mode 100644
index 00000000..16288971
--- /dev/null
+++ b/tos/platforms/tinynode/VoltageStreamC.nc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * VoltageC is a common name for the Msp430InternalVoltageC voltage
+ * sensor available on the telosb platform.
+ *
+ * To convert from ADC counts to actual voltage, divide by 4096 and
+ * multiply by 3.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ */
+
+generic configuration VoltageStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new Msp430InternalVoltageC();
+  ReadStream = Msp430InternalVoltageC.ReadStream;
+}
+
diff --git a/tos/platforms/tinynode/chips/at45db/HplAt45dbC.nc b/tos/platforms/tinynode/chips/at45db/HplAt45dbC.nc
new file mode 100644
index 00000000..f855342d
--- /dev/null
+++ b/tos/platforms/tinynode/chips/at45db/HplAt45dbC.nc
@@ -0,0 +1,50 @@
+/*
+* Copyright (c) 2006, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+configuration HplAt45dbC {
+  provides interface HplAt45db;
+}
+implementation {
+  
+  components  new HplAt45dbByteC(9), 
+    new Msp430Spi0C() as Spi, 
+    HplAt45dbP,
+    HplMsp430GeneralIOC as MspGeneralIO,
+    new Msp430GpioC() as Select;  
+  
+  HplAt45db = HplAt45dbByteC;
+  
+  HplAt45dbByteC.Resource -> Spi;
+  HplAt45dbByteC.FlashSpi -> Spi;
+  HplAt45dbByteC.HplAt45dbByte -> HplAt45dbP;
+  
+  Select -> MspGeneralIO.Port47;
+  HplAt45dbP.Select -> Select; 
+  HplAt45dbP.FlashSpi -> Spi;
+}
diff --git a/tos/platforms/tinynode/chips/at45db/HplAt45dbP.nc b/tos/platforms/tinynode/chips/at45db/HplAt45dbP.nc
new file mode 100644
index 00000000..683e4a88
--- /dev/null
+++ b/tos/platforms/tinynode/chips/at45db/HplAt45dbP.nc
@@ -0,0 +1,69 @@
+/*
+* Copyright (c) 2006, Technische Universitat Berlin
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+* - Redistributions of source code must retain the above copyright notice,
+*   this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above copyright
+*   notice, this list of conditions and the following disclaimer in the
+*   documentation and/or other materials provided with the distribution.
+* - Neither the name of the Technische Universitat Berlin nor the names
+*   of its contributors may be used to endorse or promote products derived
+*   from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+module HplAt45dbP {
+  provides {
+    interface HplAt45dbByte;
+  }
+  uses {
+    interface SpiByte as FlashSpi;
+    interface GeneralIO as Select;
+  }
+}
+implementation
+{
+  command void HplAt45dbByte.select() {
+    call Select.clr();
+  }
+  
+  command void HplAt45dbByte.deselect() {
+    call Select.set();
+  }
+  
+  task void idleTask() {
+    uint8_t status;
+    status = call FlashSpi.write(0);
+    if (!(status & 0x80)) {
+      post idleTask();
+    } else {
+      signal HplAt45dbByte.idle();
+    }
+  }
+  
+  command void HplAt45dbByte.waitIdle() {
+    post idleTask();
+  }
+  
+  command bool HplAt45dbByte.getCompareStatus() {
+    uint8_t status;
+    status = call FlashSpi.write(0);
+    return (!(status & 0x40));
+  }
+}
diff --git a/tos/platforms/tinynode/chips/at45db/HplAt45db_chip.h b/tos/platforms/tinynode/chips/at45db/HplAt45db_chip.h
new file mode 100644
index 00000000..1d57119d
--- /dev/null
+++ b/tos/platforms/tinynode/chips/at45db/HplAt45db_chip.h
@@ -0,0 +1,56 @@
+// $Id: HplAt45db_chip.h,v 1.6 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef HPLAT45DB_CHIP_H
+#define HPLAT45DB_CHIP_H
+
+// flash characteristics
+enum {
+  AT45_MAX_PAGES = 2048,
+  AT45_PAGE_SIZE = 264,
+  AT45_PAGE_SIZE_LOG2 = 8 // For those who want to ignore the last 8 bytes
+};
+
+typedef uint16_t at45page_t;
+typedef uint16_t at45pageoffset_t; /* must fit 0 to AT45_PAGE_SIZE - 1 */
+
+#endif
diff --git a/tos/platforms/tinynode/chips/xe1205/HplXE1205InterruptsC.nc b/tos/platforms/tinynode/chips/xe1205/HplXE1205InterruptsC.nc
new file mode 100644
index 00000000..317ddb84
--- /dev/null
+++ b/tos/platforms/tinynode/chips/xe1205/HplXE1205InterruptsC.nc
@@ -0,0 +1,59 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * HPL implementation of interrupts for the Semtech
+ * XE1205 radio connected to a TI MSP430 processor on the 
+ * tinynode platform.
+ *
+ * @author Henri Dubois-Ferriere
+ *
+ */
+
+configuration HplXE1205InterruptsC {
+
+  provides interface GpioInterrupt as Interrupt0;
+  provides interface GpioInterrupt as Interrupt1;
+}
+
+implementation{
+
+  components HplMsp430InterruptC;
+  components new Msp430InterruptC() as Interrupt0C;
+  components new Msp430InterruptC() as Interrupt1C;
+  Interrupt0C.HplInterrupt -> HplMsp430InterruptC.Port20;
+  Interrupt1C.HplInterrupt -> HplMsp430InterruptC.Port21;
+
+  Interrupt0 = Interrupt0C.Interrupt;
+  Interrupt1 = Interrupt1C.Interrupt;
+}
diff --git a/tos/platforms/tinynode/chips/xe1205/HplXE1205PinsC.nc b/tos/platforms/tinynode/chips/xe1205/HplXE1205PinsC.nc
new file mode 100644
index 00000000..4a180fc9
--- /dev/null
+++ b/tos/platforms/tinynode/chips/xe1205/HplXE1205PinsC.nc
@@ -0,0 +1,88 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/*
+ * HPL implementation of general-purpose I/O for the Semtech XE1205
+ * radio connected to a TI MSP430 processor on a tinynode platform.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+
+configuration HplXE1205PinsC {
+
+  provides interface GeneralIO as Irq0Pin      @atmostonce();
+  provides interface GeneralIO as Irq1Pin      @atmostonce();
+  provides interface GeneralIO as AntSelTXPin  @atmostonce();
+  provides interface GeneralIO as AntSelRXPin  @atmostonce();
+  provides interface GeneralIO as DataPin      @atmostonce();
+  provides interface GeneralIO as ModeSel0Pin  @atmostonce();
+  provides interface GeneralIO as ModeSel1Pin  @atmostonce();
+  provides interface GeneralIO as NssDataPin   @atmostonce();
+  provides interface GeneralIO as NssConfigPin @atmostonce();
+}
+
+implementation {
+
+  components HplMsp430GeneralIOC;
+  components new Msp430GpioC() as Irq0PinM;
+  components new Msp430GpioC() as Irq1PinM;
+  components new Msp430GpioC() as AntSelTXM;
+  components new Msp430GpioC() as AntSelRXM;
+  components new Msp430GpioC() as DataM;
+  components new Msp430GpioC() as ModeSel0M;
+  components new Msp430GpioC() as ModeSel1M;
+  components new Msp430GpioC() as NssConfigM;
+  components new Msp430GpioC() as NssDataM;
+
+  Irq0PinM -> HplMsp430GeneralIOC.Port20;
+  Irq1PinM -> HplMsp430GeneralIOC.Port21;
+  AntSelTXM -> HplMsp430GeneralIOC.Port27;
+  AntSelRXM -> HplMsp430GeneralIOC.Port26;
+  DataM -> HplMsp430GeneralIOC.Port57;
+  ModeSel0M -> HplMsp430GeneralIOC.Port34;
+  ModeSel1M -> HplMsp430GeneralIOC.Port35;
+  NssConfigM -> HplMsp430GeneralIOC.Port14;
+  NssDataM -> HplMsp430GeneralIOC.Port10;
+
+
+  Irq0Pin = Irq0PinM;
+  Irq1Pin = Irq1PinM;
+  AntSelTXPin = AntSelTXM;
+  AntSelRXPin = AntSelRXM;
+  DataPin = DataM;
+  ModeSel0Pin = ModeSel0M;
+  ModeSel1Pin = ModeSel1M;
+  NssConfigPin = NssConfigM;
+  NssDataPin = NssDataM;
+}
diff --git a/tos/platforms/tinynode/chips/xe1205/HplXE1205SpiC.nc b/tos/platforms/tinynode/chips/xe1205/HplXE1205SpiC.nc
new file mode 100644
index 00000000..cc2248b2
--- /dev/null
+++ b/tos/platforms/tinynode/chips/xe1205/HplXE1205SpiC.nc
@@ -0,0 +1,58 @@
+/* 
+ * Copyright (c) 2006, Ecole Polytechnique Federale de Lausanne (EPFL),
+ * Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+/**
+ * HPL implementation of the SPI bus for the Xemics XE1205 radio
+ * connected to a TI MSP430 processor.
+ *
+ * @author Henri Dubois-Ferriere
+ */
+
+generic configuration HplXE1205SpiC() {
+
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+
+}
+
+implementation {
+
+    components new Xe1205Spi0C() as SpiC;
+    
+    Resource = SpiC;
+    SpiByte = SpiC;
+    SpiPacket = SpiC;
+    
+}
+
diff --git a/tos/platforms/tinynode/chips/xe1205/Xe1205Spi0C.nc b/tos/platforms/tinynode/chips/xe1205/Xe1205Spi0C.nc
new file mode 100644
index 00000000..ef6472bb
--- /dev/null
+++ b/tos/platforms/tinynode/chips/xe1205/Xe1205Spi0C.nc
@@ -0,0 +1,70 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * An implementation of the SPI on USART0 for the MSP430. The current
+ * implementation defaults not using the DMA and performing the SPI
+ * transfers in software. To utilize the DMA, use Msp430SpiDma0P in
+ * place of Msp430SpiNoDma0P.
+ *
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @version $Revision: 1.1 $ $Date: 2007-07-13 15:54:09 $
+ */
+
+#include "msp430usart.h"
+
+generic configuration Xe1205Spi0C() {
+
+  provides interface Resource;
+  provides interface SpiByte;
+  provides interface SpiPacket;
+
+  uses interface Msp430SpiConfigure;
+}
+
+implementation {
+
+  enum {
+    CLIENT_ID = unique( MSP430_SPIO_BUS ),
+  };
+
+  components Xe1205SpiNoDma0P as SpiP;
+  Resource = SpiP.Resource[ CLIENT_ID ];
+  SpiByte = SpiP.SpiByte;
+  SpiPacket = SpiP.SpiPacket[ CLIENT_ID ];
+  Msp430SpiConfigure = SpiP.Msp430SpiConfigure[ CLIENT_ID ];
+
+  components new Msp430Usart0C() as UsartC;
+  SpiP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure;
+  SpiP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
+  SpiP.UsartInterrupts -> UsartC.HplMsp430UsartInterrupts;
+
+}
diff --git a/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDma0P.nc b/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDma0P.nc
new file mode 100644
index 00000000..e0a03a8b
--- /dev/null
+++ b/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDma0P.nc
@@ -0,0 +1,67 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @version $Revision: 1.1 $ $Date: 2007-07-13 15:54:09 $
+ */
+
+configuration Xe1205SpiNoDma0P {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[uint8_t id ];
+  provides interface SpiByte;
+  provides interface SpiPacket[ uint8_t id ];
+
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430SpiConfigure[ uint8_t id ];
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
+
+}
+
+implementation {
+
+  components new Xe1205SpiNoDmaP() as SpiP;
+  Resource = SpiP.Resource;
+  ResourceConfigure = SpiP.ResourceConfigure;
+  Msp430SpiConfigure = SpiP.Msp430SpiConfigure;
+  SpiByte = SpiP.SpiByte;
+  SpiPacket = SpiP.SpiPacket;
+  UsartResource = SpiP.UsartResource;
+  UsartInterrupts = SpiP.UsartInterrupts;
+
+  components HplMsp430Usart0C as UsartC;
+  SpiP.Usart -> UsartC;
+
+  components LedsC as Leds;
+  SpiP.Leds -> Leds;
+
+}
diff --git a/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc b/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc
new file mode 100644
index 00000000..cb3328c9
--- /dev/null
+++ b/tos/platforms/tinynode/chips/xe1205/Xe1205SpiNoDmaP.nc
@@ -0,0 +1,245 @@
+/**
+ * Copyright (c) 2005-2006 Arched Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Jonathan Hui <jhui@archedrock.com>
+ * @author Maxime Muller
+ * @version $Revision: 1.1 $ $Date: 2007-07-13 15:54:09 $
+ *
+ * nss_data toggling for each rx byte
+ */
+
+
+generic module Xe1205SpiNoDmaP() {
+
+  provides interface Resource[ uint8_t id ];
+  provides interface ResourceConfigure[ uint8_t id ];
+  provides interface SpiByte;
+  provides interface SpiPacket[ uint8_t id ];
+
+  uses interface Resource as UsartResource[ uint8_t id ];
+  uses interface Msp430SpiConfigure[ uint8_t id ];
+  uses interface HplMsp430Usart as Usart;
+  uses interface HplMsp430UsartInterrupts as UsartInterrupts;
+  uses interface Leds;
+
+}
+
+implementation {
+
+  enum {
+    SPI_ATOMIC_SIZE = 2,
+  };
+
+  norace uint8_t* m_tx_buf;
+  norace uint8_t* m_rx_buf;
+  norace uint16_t m_len;
+  norace uint16_t m_pos;
+  norace uint8_t m_client;
+
+  void signalDone();
+  task void signalDone_task();
+
+  async command error_t Resource.immediateRequest[ uint8_t id ]() {
+    return call UsartResource.immediateRequest[ id ]();
+  }
+
+  async command error_t Resource.request[ uint8_t id ]() {
+    return call UsartResource.request[ id ]();
+  }
+
+  async command uint8_t Resource.isOwner[ uint8_t id ]() {
+    return call UsartResource.isOwner[ id ]();
+  }
+
+  async command error_t Resource.release[ uint8_t id ]() {
+    return call UsartResource.release[ id ]();
+  }
+
+  async command void ResourceConfigure.configure[ uint8_t id ]() {
+    call Usart.setModeSpi(call Msp430SpiConfigure.getConfig[id]());
+  }
+
+  async command void ResourceConfigure.unconfigure[ uint8_t id ]() {
+    call Usart.resetUsart(TRUE);
+    call Usart.disableSpi();
+    call Usart.resetUsart(FALSE);
+  }
+
+  event void UsartResource.granted[ uint8_t id ]() {
+    signal Resource.granted[ id ]();
+  }
+
+  async command uint8_t SpiByte.write( uint8_t tx ) {
+    uint8_t byte;
+    // we are in spi mode which is configured to have turned off interrupts
+    // call Usart.disableRxIntr();
+    call Usart.tx( tx );
+    while( !call Usart.isRxIntrPending() );
+    call Usart.clrRxIntr();
+    byte = call Usart.rx();
+    //    call Usart.enableRxIntr();
+    return byte;
+  }
+
+  default async command error_t UsartResource.isOwner[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; }
+  default async command error_t UsartResource.release[ uint8_t id ]() { return FAIL; }
+ default async command msp430_spi_union_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() {
+    return &msp430_spi_default_config;
+  }
+
+  default event void Resource.granted[ uint8_t id ]() {}
+
+  void continueOp() {
+      uint8_t end;
+      uint8_t tmp;
+      
+      atomic {
+	  
+	  TOSH_CLR_NSS_DATA_PIN();
+	  call Usart.tx( 0 );
+	  while( !call Usart.isRxIntrPending() );
+	  TOSH_SET_NSS_DATA_PIN();
+	  
+	  end = m_pos + SPI_ATOMIC_SIZE;
+	  if ( end > m_len )
+	      end = m_len;
+	  
+	  while ( ++m_pos < end ) {
+	      TOSH_CLR_NSS_DATA_PIN();
+	      call Usart.tx( 0 );
+	      while( !call Usart.isRxIntrPending() );	    
+	      tmp = call Usart.rx();
+	      m_rx_buf[ m_pos - 1 ] = tmp;
+	  }
+      }
+  }
+  
+
+
+  inline  void sendBuffer(uint8_t const* buffer_, int size_) {
+
+      TOSH_CLR_NSS_DATA_PIN();
+
+      call Usart.isTxIntrPending();
+      call Usart.rx();
+      while(size_ > 0) {
+	  call Usart.tx(*buffer_);
+	  ++buffer_;
+	  --size_;	      
+	  while( !call Usart.isRxIntrPending() );
+	  call Usart.rx();
+      }
+      call Usart.disableRxIntr();
+      TOSH_SET_NSS_DATA_PIN();
+  }
+
+
+
+     inline void readData() {
+      uint8_t end;
+      uint8_t tmp;
+      
+      atomic {
+	TOSH_TOGGLE_YELLOW_LED_PIN();
+	  call Usart.tx( 0 );
+	  call Usart.isTxIntrPending();
+	  call Usart.rx();
+	  end = m_pos + SPI_ATOMIC_SIZE;
+	  if ( end > m_len )
+	      end = m_len;
+	
+	  while ( ++m_pos < end ) {
+	      TOSH_CLR_NSS_DATA_PIN();
+	      call Usart.tx( 0 );
+	      while( !call Usart.isRxIntrPending() );
+	      tmp = call Usart.rx();
+	      TOSH_SET_NSS_DATA_PIN();
+	      m_rx_buf[ m_pos - 1 ] = tmp;
+	  }
+      }
+      
+  }
+
+  async command error_t SpiPacket.send[ uint8_t id ]( uint8_t* tx_buf,
+                                                      uint8_t* rx_buf,
+                                                      uint16_t len ) {
+
+      m_client = id;
+      m_tx_buf = tx_buf;
+      m_rx_buf = rx_buf;
+      m_len = len;
+      m_pos = 0;
+
+      if (m_tx_buf)
+	  sendBuffer(m_tx_buf,m_len);
+      else {
+	  call Usart.enableRxIntr();
+
+	  continueOp();
+      }
+
+      return SUCCESS;
+
+  }
+
+  task void signalDone_task() {
+      atomic signalDone();
+  }
+
+  async event void UsartInterrupts.rxDone( uint8_t data ) {
+   
+      if ( m_rx_buf ) {
+	  m_rx_buf[ m_pos-1 ] = data;
+      } else 
+	  return;
+     TOSH_SET_NSS_DATA_PIN();
+    if ( m_pos < m_len ) {
+	continueOp();
+
+    } else {
+	call Usart.disableRxIntr();
+	signalDone();
+    }
+  }
+
+  void signalDone() {
+    signal SpiPacket.sendDone[ m_client ]( m_tx_buf, m_rx_buf, m_len,
+					   SUCCESS );
+  }
+
+  async event void UsartInterrupts.txDone() {}
+
+  default async event void SpiPacket.sendDone[ uint8_t id ]( uint8_t* tx_buf, uint8_t* rx_buf, uint16_t len, error_t error ) {}
+
+}
diff --git a/tos/platforms/tinynode/hardware.h b/tos/platforms/tinynode/hardware.h
new file mode 100644
index 00000000..b5a939cd
--- /dev/null
+++ b/tos/platforms/tinynode/hardware.h
@@ -0,0 +1,218 @@
+/* 
+ * Copyright (c) 2005-2006, Ecole Polytechnique Federale de Lausanne (EPFL)
+ * and Shockfish SA, Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   and Shockfish SA, nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+/*
+ * Platform definitions for tinynode platform
+ *
+ * @author Remy Blank
+ * @author Henri Dubois-Ferriere
+ * @author Roger Meier
+ *
+ */
+
+#ifndef _H_hardware_h
+#define _H_hardware_h
+
+#include "msp430hardware.h"
+
+// enum so components can override power saving,
+// as per TEP 112.
+enum {
+  TOS_SLEEP_NONE = MSP430_POWER_ACTIVE,
+};
+
+// XE1205 radio
+TOSH_ASSIGN_PIN(NSS_DATA, 1, 0);
+TOSH_ASSIGN_PIN(DATA, 5, 7);
+TOSH_ASSIGN_PIN(NSS_CONFIG, 1, 4);
+TOSH_ASSIGN_PIN(IRQ0, 2, 0);
+TOSH_ASSIGN_PIN(IRQ1, 2, 1);
+TOSH_ASSIGN_PIN(SW_RX, 2, 6);
+TOSH_ASSIGN_PIN(SW_TX, 2, 7);
+TOSH_ASSIGN_PIN(POR, 3, 0);
+TOSH_ASSIGN_PIN(SCK, 3, 3);
+TOSH_ASSIGN_PIN(SW0, 3, 4);
+TOSH_ASSIGN_PIN(SW1, 3, 5);
+
+// LED
+TOSH_ASSIGN_PIN(RED_LED, 1, 5);		// on tinynode
+TOSH_ASSIGN_PIN(RED_LED2, 1, 6);	// external, for compatibility with Mica
+TOSH_ASSIGN_PIN(GREEN_LED, 2, 3);
+TOSH_ASSIGN_PIN(YELLOW_LED, 2, 4);
+// TOSH_ASSIGN_PIN(RED_LED2, 1, 5);	// external, for compatibility with Mica
+// TOSH_ASSIGN_PIN(GREEN_LED, 1, 3);
+// TOSH_ASSIGN_PIN(YELLOW_LED, 1, 2);
+
+// Other IO
+TOSH_ASSIGN_PIN(TEMPE, 5, 4);		// optional temperature sensor
+TOSH_ASSIGN_PIN(NVSUPE, 5, 5);		// voltage supply monitor
+TOSH_ASSIGN_PIN(NREGE, 5, 6);		// voltage regulator enable
+
+// UART0 pins (shared with XE1205 radio)
+TOSH_ASSIGN_PIN(STE0, 3, 0);
+TOSH_ASSIGN_PIN(SIMO0, 3, 1);
+TOSH_ASSIGN_PIN(SOMI0, 3, 2);
+TOSH_ASSIGN_PIN(UCLK0, 3, 3);
+TOSH_ASSIGN_PIN(UTXD0, 3, 4);
+TOSH_ASSIGN_PIN(URXD0, 3, 5);
+
+// UART1 pins
+TOSH_ASSIGN_PIN(STE1, 5, 0);
+TOSH_ASSIGN_PIN(SIMO1, 5, 1);
+TOSH_ASSIGN_PIN(SOMI1, 5, 2);
+TOSH_ASSIGN_PIN(UCLK1, 5, 3);
+TOSH_ASSIGN_PIN(UTXD1, 3, 6);
+TOSH_ASSIGN_PIN(URXD1, 3, 7);
+
+// ADC
+TOSH_ASSIGN_PIN(TEMP, 6, 0);		// channel 0: optional temperature sensor
+TOSH_ASSIGN_PIN(VSUP, 6, 1);		// channel 1: supply monitor
+TOSH_ASSIGN_PIN(ADC2, 6, 2);
+TOSH_ASSIGN_PIN(ADC3, 6, 3);
+TOSH_ASSIGN_PIN(ADC4, 6, 4);
+TOSH_ASSIGN_PIN(ADC5, 6, 5);
+TOSH_ASSIGN_PIN(ADC6, 6, 6);
+TOSH_ASSIGN_PIN(ADC7, 6, 7);
+
+// External FLASH
+TOSH_ASSIGN_PIN(NFL_RST, 4, 6);
+TOSH_ASSIGN_PIN(NFL_CS, 4, 7);
+TOSH_ASSIGN_PIN(FLASH_RST, 4, 6);
+TOSH_ASSIGN_PIN(FLASH_CS, 4, 7);
+
+// PROGRAMMING PINS (tri-state)
+TOSH_ASSIGN_PIN(PROG_RX, 1, 1);
+TOSH_ASSIGN_PIN(PROG_TX, 2, 2);
+
+// Oscillator resistance
+TOSH_ASSIGN_PIN(ROSC, 2, 5);
+
+// unused
+TOSH_ASSIGN_PIN(P12, 1, 2);
+TOSH_ASSIGN_PIN(P13, 1, 3);
+TOSH_ASSIGN_PIN(P16, 1, 6);
+TOSH_ASSIGN_PIN(P23, 2, 3);
+TOSH_ASSIGN_PIN(P24, 2, 4);
+TOSH_ASSIGN_PIN(P40, 4, 0);
+TOSH_ASSIGN_PIN(P41, 4, 1);
+
+// unconnected
+TOSH_ASSIGN_PIN(NOT_CONNECTED1, 1, 7);
+TOSH_ASSIGN_PIN(NOT_CONNECTED2, 4, 2);
+TOSH_ASSIGN_PIN(NOT_CONNECTED3, 4, 3);
+TOSH_ASSIGN_PIN(NOT_CONNECTED4, 4, 4);
+TOSH_ASSIGN_PIN(NOT_CONNECTED5, 4, 5);
+	
+
+void TOSH_SET_PIN_DIRECTIONS(void)
+{
+	//LEDS
+	TOSH_CLR_RED_LED_PIN();
+	TOSH_MAKE_RED_LED_OUTPUT();		
+
+	// XE1205 radio
+	//	TOSH_SET_NSS_DATA_PIN();
+	//	TOSH_MAKE_NSS_DATA_OUTPUT();
+	//	TOSH_CLR_DATA_PIN();
+	//	TOSH_MAKE_DATA_OUTPUT();
+	//	TOSH_SET_NSS_CONFIG_PIN();
+	//	TOSH_MAKE_NSS_CONFIG_OUTPUT();
+	//	TOSH_CLR_IRQ0_PIN();
+	//	TOSH_MAKE_IRQ0_OUTPUT();
+	//	TOSH_CLR_IRQ1_PIN();
+	//	TOSH_MAKE_IRQ1_OUTPUT();
+	//	TOSH_CLR_SW_RX_PIN();
+	//	TOSH_MAKE_SW_RX_OUTPUT();
+	//	TOSH_CLR_SW_TX_PIN();
+	//	TOSH_MAKE_SW_TX_OUTPUT();
+	TOSH_MAKE_POR_INPUT();
+
+	// SPI0
+	TOSH_CLR_SCK_PIN();
+	TOSH_MAKE_SCK_OUTPUT();
+	
+	// antenna switch
+	//	TOSH_CLR_SW0_PIN();
+	//	TOSH_MAKE_SW0_OUTPUT();
+	//	TOSH_CLR_SW1_PIN();
+	//	TOSH_MAKE_SW1_OUTPUT();
+
+	// optional temperature sensor
+	TOSH_CLR_TEMPE_PIN();
+	TOSH_MAKE_TEMPE_OUTPUT();
+	TOSH_MAKE_TEMP_INPUT();
+	TOSH_SEL_TEMP_MODFUNC();
+
+	// voltage supply monitor
+	TOSH_SET_NVSUPE_PIN();
+	TOSH_MAKE_NVSUPE_INPUT();
+	TOSH_MAKE_VSUP_INPUT();
+	TOSH_SEL_VSUP_MODFUNC();
+
+	// voltage regulator
+	TOSH_SET_NREGE_PIN();			// disable regulator for low power mode
+	TOSH_MAKE_NREGE_OUTPUT();
+
+	//UART PINS
+	TOSH_MAKE_UTXD1_INPUT();
+	TOSH_MAKE_URXD1_INPUT();
+	TOSH_SEL_UTXD1_IOFUNC();
+
+	// External FLASH
+	TOSH_SET_FLASH_RST_PIN();
+	TOSH_MAKE_FLASH_RST_OUTPUT();
+	TOSH_SET_FLASH_CS_PIN();
+	TOSH_MAKE_FLASH_CS_OUTPUT();
+		
+	//PROG PINS
+	TOSH_MAKE_PROG_RX_INPUT();
+	TOSH_MAKE_PROG_TX_INPUT();
+
+	// ROSC PIN
+	TOSH_SET_ROSC_PIN();
+	TOSH_MAKE_ROSC_OUTPUT();
+
+	// set unconnected pins to avoid instability
+	TOSH_SET_NOT_CONNECTED1_PIN();
+	TOSH_SET_NOT_CONNECTED2_PIN();
+	TOSH_SET_NOT_CONNECTED3_PIN();
+	TOSH_SET_NOT_CONNECTED4_PIN();
+	TOSH_SET_NOT_CONNECTED5_PIN();
+	TOSH_MAKE_NOT_CONNECTED1_OUTPUT();
+	TOSH_MAKE_NOT_CONNECTED2_OUTPUT();
+	TOSH_MAKE_NOT_CONNECTED3_OUTPUT();
+	TOSH_MAKE_NOT_CONNECTED4_OUTPUT();
+	TOSH_MAKE_NOT_CONNECTED5_OUTPUT();
+}
+
+#endif // _H_hardware_h
+
diff --git a/tos/platforms/tinynode/platform.h b/tos/platforms/tinynode/platform.h
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/platforms/tinynode/platform_message.h b/tos/platforms/tinynode/platform_message.h
new file mode 100644
index 00000000..17b5508d
--- /dev/null
+++ b/tos/platforms/tinynode/platform_message.h
@@ -0,0 +1,54 @@
+/* 
+ * Copyright (c) 2005, Ecole Polytechnique Federale de Lausanne (EPFL)
+ * and Shockfish SA, Switzerland.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Ecole Polytechnique Federale de Lausanne (EPFL) 
+ *   and Shockfish SA, nor the names of its contributors may be used to 
+ *   endorse or promote products derived from this software without 
+ *   specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ========================================================================
+ */
+
+#ifndef PLATFORM_MESSAGE_H
+#define PLATFORM_MESSAGE_H
+
+#include "XE1205.h"
+#include "Serial.h"
+
+typedef union message_header {
+  xe1205_header_t xe1205;
+  serial_header_t serial;
+} message_header_t;
+
+typedef union message_footer {
+  xe1205_footer_t xe1205;
+} message_footer_t;
+
+typedef union message_metadata {
+  xe1205_metadata_t xe1205;
+  serial_metadata_t serial;
+} message_metadata_t;
+
+#endif
diff --git a/tos/sensorboards/basicsb/.sensor b/tos/sensorboards/basicsb/.sensor
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/sensorboards/basicsb/DemoSensorC.nc b/tos/sensorboards/basicsb/DemoSensorC.nc
new file mode 100644
index 00000000..4f3fdbe9
--- /dev/null
+++ b/tos/sensorboards/basicsb/DemoSensorC.nc
@@ -0,0 +1,23 @@
+/* $Id: DemoSensorC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for basicsb sensorboard.
+ * 
+ * @author David Gay
+ */
+
+generic configuration DemoSensorC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new PhotoC() as Sensor;
+
+  Read = Sensor;
+}
diff --git a/tos/sensorboards/basicsb/DemoSensorStreamC.nc b/tos/sensorboards/basicsb/DemoSensorStreamC.nc
new file mode 100644
index 00000000..0abae72c
--- /dev/null
+++ b/tos/sensorboards/basicsb/DemoSensorStreamC.nc
@@ -0,0 +1,23 @@
+/* $Id: DemoSensorStreamC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for basicsb sensorboard.
+ * 
+ * @author David Gay
+ */
+
+generic configuration DemoSensorStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new PhotoStreamC() as SensorStream;
+
+  ReadStream = SensorStream;
+}
diff --git a/tos/sensorboards/basicsb/PhotoC.nc b/tos/sensorboards/basicsb/PhotoC.nc
new file mode 100644
index 00000000..ed019de2
--- /dev/null
+++ b/tos/sensorboards/basicsb/PhotoC.nc
@@ -0,0 +1,27 @@
+/* $Id: PhotoC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Photodiode of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "basicsb.h"
+
+generic configuration PhotoC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new AdcReadClientC(), PhotoDeviceP;
+
+  Read = AdcReadClientC;
+  AdcReadClientC.Atm128AdcConfig -> PhotoDeviceP;
+  AdcReadClientC.ResourceConfigure -> PhotoDeviceP;
+}
diff --git a/tos/sensorboards/basicsb/PhotoDeviceP.nc b/tos/sensorboards/basicsb/PhotoDeviceP.nc
new file mode 100644
index 00000000..17196a18
--- /dev/null
+++ b/tos/sensorboards/basicsb/PhotoDeviceP.nc
@@ -0,0 +1,33 @@
+/* $Id: PhotoDeviceP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal component for basicsb photodiode. Arbitrates access to the photo
+ * diode and automatically turns it on or off based on user requests.
+ * 
+ * @author David Gay
+ */
+
+#include "basicsb.h"
+
+configuration PhotoDeviceP {
+  provides {
+    interface ResourceConfigure;
+    interface Atm128AdcConfig;
+  }
+}
+implementation {
+  components PhotoP, MicaBusC;
+
+  ResourceConfigure = PhotoP;
+  Atm128AdcConfig = PhotoP;
+
+  PhotoP.PhotoPin -> MicaBusC.PW1;
+  PhotoP.PhotoAdc -> MicaBusC.Adc6;
+}
diff --git a/tos/sensorboards/basicsb/PhotoP.nc b/tos/sensorboards/basicsb/PhotoP.nc
new file mode 100644
index 00000000..3fcef143
--- /dev/null
+++ b/tos/sensorboards/basicsb/PhotoP.nc
@@ -0,0 +1,47 @@
+/* $Id: PhotoP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * basicsb photodiode power control and ADC configuration.
+ * @author David Gay <david.e.gay@intel.com>
+ */
+module PhotoP
+{
+  provides {
+    interface ResourceConfigure;
+    interface Atm128AdcConfig;
+  }
+  uses {
+    interface GeneralIO as PhotoPin;
+    interface MicaBusAdc as PhotoAdc;
+  }
+}
+implementation
+{
+  async command uint8_t Atm128AdcConfig.getChannel() {
+    return call PhotoAdc.getChannel();
+  }
+
+  async command uint8_t Atm128AdcConfig.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t Atm128AdcConfig.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+
+  async command void ResourceConfigure.configure() {
+    call PhotoPin.makeOutput();
+    call PhotoPin.set();
+  }
+
+  async command void ResourceConfigure.unconfigure() {
+    call PhotoPin.clr();
+  }
+}
diff --git a/tos/sensorboards/basicsb/PhotoStreamC.nc b/tos/sensorboards/basicsb/PhotoStreamC.nc
new file mode 100644
index 00000000..9be84b55
--- /dev/null
+++ b/tos/sensorboards/basicsb/PhotoStreamC.nc
@@ -0,0 +1,27 @@
+/* $Id: PhotoStreamC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Photodiode of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "basicsb.h"
+
+generic configuration PhotoStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components PhotoDeviceP, new AdcReadStreamClientC();
+
+  ReadStream = AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> PhotoDeviceP;
+  AdcReadStreamClientC.ResourceConfigure -> PhotoDeviceP;
+}
diff --git a/tos/sensorboards/basicsb/TempC.nc b/tos/sensorboards/basicsb/TempC.nc
new file mode 100644
index 00000000..d26546c6
--- /dev/null
+++ b/tos/sensorboards/basicsb/TempC.nc
@@ -0,0 +1,27 @@
+/* $Id: TempC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Thermistor of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "basicsb.h"
+
+generic configuration TempC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new AdcReadClientC(), TempDeviceP;
+
+  Read = AdcReadClientC;
+  AdcReadClientC.Atm128AdcConfig -> TempDeviceP;
+  AdcReadClientC.ResourceConfigure -> TempDeviceP;
+}
diff --git a/tos/sensorboards/basicsb/TempDeviceP.nc b/tos/sensorboards/basicsb/TempDeviceP.nc
new file mode 100644
index 00000000..20798893
--- /dev/null
+++ b/tos/sensorboards/basicsb/TempDeviceP.nc
@@ -0,0 +1,33 @@
+/* $Id: TempDeviceP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal component for basicsb tempdiode. Arbitrates access to the temp
+ * diode and automatically turns it on or off based on user requests.
+ * 
+ * @author David Gay
+ */
+
+#include "basicsb.h"
+
+configuration TempDeviceP {
+  provides {
+    interface ResourceConfigure;
+    interface Atm128AdcConfig;
+  }
+}
+implementation {
+  components TempP, MicaBusC;
+
+  ResourceConfigure = TempP;
+  Atm128AdcConfig = TempP;
+
+  TempP.TempPin -> MicaBusC.PW2;
+  TempP.TempAdc -> MicaBusC.Adc5;
+}
diff --git a/tos/sensorboards/basicsb/TempP.nc b/tos/sensorboards/basicsb/TempP.nc
new file mode 100644
index 00000000..10cc2f55
--- /dev/null
+++ b/tos/sensorboards/basicsb/TempP.nc
@@ -0,0 +1,47 @@
+/* $Id: TempP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * basicsb thermistor power control and ADC configuration.
+ * @author David Gay <david.e.gay@intel.com>
+ */
+module TempP
+{
+  provides {
+    interface ResourceConfigure;
+    interface Atm128AdcConfig;
+  }
+  uses {
+    interface GeneralIO as TempPin;
+    interface MicaBusAdc as TempAdc;
+  }
+}
+implementation
+{
+  async command uint8_t Atm128AdcConfig.getChannel() {
+    return call TempAdc.getChannel();
+  }
+
+  async command uint8_t Atm128AdcConfig.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t Atm128AdcConfig.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+
+  async command void ResourceConfigure.configure() {
+    call TempPin.makeOutput();
+    call TempPin.set();
+  }
+
+  async command void ResourceConfigure.unconfigure() {
+    call TempPin.clr();
+  }
+}
diff --git a/tos/sensorboards/basicsb/TempStreamC.nc b/tos/sensorboards/basicsb/TempStreamC.nc
new file mode 100644
index 00000000..05b646d7
--- /dev/null
+++ b/tos/sensorboards/basicsb/TempStreamC.nc
@@ -0,0 +1,27 @@
+/* $Id: TempStreamC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Thermistor of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "basicsb.h"
+
+generic configuration TempStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components TempDeviceP, new AdcReadStreamClientC();
+
+  ReadStream = AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> TempDeviceP;
+  AdcReadStreamClientC.ResourceConfigure -> TempDeviceP;
+}
diff --git a/tos/sensorboards/basicsb/basicsb.h b/tos/sensorboards/basicsb/basicsb.h
new file mode 100644
index 00000000..7da6a68c
--- /dev/null
+++ b/tos/sensorboards/basicsb/basicsb.h
@@ -0,0 +1,11 @@
+#ifndef BASICSB_H
+#define BASICSB_H
+
+#define UQ_TEMPDEVICE "TempDeviceP.Resource"
+#define UQ_TEMPDEVICE_STREAM "TempDeviceStreamP.Resource"
+
+#define UQ_PHOTODEVICE "PhotoDeviceP.Resource"
+#define UQ_PHOTODEVICE_STREAM "PhotoDeviceStreamP.Resource"
+
+
+#endif
diff --git a/tos/sensorboards/im2sb/.sensor b/tos/sensorboards/im2sb/.sensor
new file mode 100644
index 00000000..d6169c21
--- /dev/null
+++ b/tos/sensorboards/im2sb/.sensor
@@ -0,0 +1,49 @@
+#
+# Copyright (c) 2005-2006 Arch Rock Corporation
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the
+#   distribution.
+# - Neither the name of the Arch Rock Corporation nor the names of
+#   its contributors may be used to endorse or promote products derived
+#   from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+# ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE
+#
+# FILE: im2sb/.sensor
+# 
+# Includes that should take precedence come first.  Sensorboard "superclasses"
+# come before because they may override files.  These must be specified as
+# @includes instead of -I's to @opts, otherwise the %T won't be processed
+# by ncc.  And because of that, the current sensorboard's include directory
+# must be specified, otherwise its search order is last instead of first.
+#
+# $Id: .sensor,v 1.4 2006-12-12 18:23:45 vlahan Exp $
+#
+push( @includes, qw(
+  %T/sensorboards/im2sb
+  %T/chips/lis3l02dq
+  %T/chips/max136x
+  %T/chips/sht11
+  %T/chips/tmp175
+  %T/chips/tsl2561
+
+) );
diff --git a/tos/sensorboards/im2sb/HalSensirionSht11C.nc b/tos/sensorboards/im2sb/HalSensirionSht11C.nc
new file mode 100644
index 00000000..43e6b84e
--- /dev/null
+++ b/tos/sensorboards/im2sb/HalSensirionSht11C.nc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HalSensirionSht11C is an advanced access component for the
+ * Sensirion SHT11 model humidity and temperature sensor, available on
+ * the telosb platform. This component provides the SensirionSht11
+ * interface, which offers full control over the device. Please
+ * acquire the Resource before using it.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ */
+
+configuration HalSensirionSht11C {
+  provides interface SplitControl;
+  provides interface Resource[ uint8_t client ];
+  provides interface SensirionSht11[ uint8_t client ];
+}
+implementation {
+  components new SensirionSht11LogicP();
+  SensirionSht11 = SensirionSht11LogicP;
+
+  components HplSensirionSht11C;
+  SplitControl = HplSensirionSht11C;
+  Resource = HplSensirionSht11C.Resource;
+  SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA;
+  SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
+  SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;
+
+  
+  components new TimerMilliC();
+  SensirionSht11LogicP.Timer -> TimerMilliC;
+
+  components NoLedsC;
+  SensirionSht11LogicP.Leds -> NoLedsC;
+}
diff --git a/tos/sensorboards/im2sb/HplSensirionSht11C.nc b/tos/sensorboards/im2sb/HplSensirionSht11C.nc
new file mode 100644
index 00000000..baba4365
--- /dev/null
+++ b/tos/sensorboards/im2sb/HplSensirionSht11C.nc
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplSensirionSht11C is a low-level component, intended to provide
+ * the physical resources used by the Sensirion SHT11 sensor on the
+ * telosb platform so that the chip driver can make use of them. You
+ * really shouldn't be wiring to this, unless you're writing a new
+ * Sensirion SHT11 driver.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ */
+#include <im2sb.h>
+
+configuration HplSensirionSht11C {
+  provides interface SplitControl;
+  provides interface Resource[ uint8_t id ];
+  provides interface GeneralIO as DATA;
+  provides interface GeneralIO as SCK;
+  provides interface GpioInterrupt as InterruptDATA;
+}
+implementation {
+  components GeneralIOC;
+
+  DATA = GeneralIOC.GeneralIO[GPIO_SHT11_DATA];
+  SCK = GeneralIOC.GeneralIO[GPIO_SHT11_CLK];
+  InterruptDATA = GeneralIOC.GpioInterrupt[GPIO_SHT11_DATA];
+
+  components HplSensirionSht11P;
+  SplitControl = HplSensirionSht11P;
+  
+  components new TimerMilliC();
+  components HplPXA27xGPIOC;
+  HplSensirionSht11P.Timer -> TimerMilliC;
+  HplSensirionSht11P.DATA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[GPIO_SHT11_DATA];
+  HplSensirionSht11P.SCK -> HplPXA27xGPIOC.HplPXA27xGPIOPin[GPIO_SHT11_CLK];
+  
+  components new SimpleFcfsArbiterC( "Sht11.Resource" ) as Arbiter;
+  Resource = Arbiter;
+}
diff --git a/tos/sensorboards/im2sb/HplSensirionSht11P.nc b/tos/sensorboards/im2sb/HplSensirionSht11P.nc
new file mode 100644
index 00000000..3f8a602d
--- /dev/null
+++ b/tos/sensorboards/im2sb/HplSensirionSht11P.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Timer.h"
+
+/**
+ * HplSensirionSht11P is a low-level component that controls power for
+ * the Sensirion SHT11 sensor on the telosb platform.
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ */
+
+module HplSensirionSht11P {
+  provides interface SplitControl;
+  uses interface Timer<TMilli>;
+  uses interface HplPXA27xGPIOPin as DATA;
+  uses interface HplPXA27xGPIOPin as SCK;
+}
+implementation {
+  task void stopTask();
+
+  command error_t SplitControl.start() {
+    call DATA.setGAFRpin(0);
+    call SCK.setGAFRpin(0);
+    call Timer.startOneShot( 11 );
+    return SUCCESS;
+  }
+  
+  event void Timer.fired() {
+    signal SplitControl.startDone( SUCCESS );
+  }
+
+  command error_t SplitControl.stop() {
+    call SCK.setGPDRbit(FALSE);
+    call SCK.setGPCRbit();
+    call DATA.setGPDRbit(FALSE);
+    call DATA.setGPCRbit();
+    post stopTask();
+    return SUCCESS;
+  }
+
+  task void stopTask() {
+    signal SplitControl.stopDone( SUCCESS );
+  }
+
+  async event void DATA.interruptGPIOPin() { return; }
+  async event void SCK.interruptGPIOPin() { return; }
+}
+
diff --git a/tos/sensorboards/im2sb/LIS3L02DQC.nc b/tos/sensorboards/im2sb/LIS3L02DQC.nc
new file mode 100644
index 00000000..d038122b
--- /dev/null
+++ b/tos/sensorboards/im2sb/LIS3L02DQC.nc
@@ -0,0 +1,71 @@
+/* $Id: LIS3L02DQC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "im2sb.h"
+
+generic configuration LIS3L02DQC() {
+  //provides interface Init;
+  provides interface SplitControl;
+  provides interface Read<uint16_t> as AccelX;
+  provides interface Read<uint16_t> as AccelY;
+  provides interface Read<uint16_t> as AccelZ;
+  provides interface HalLIS3L02DQAdvanced;
+}
+
+implementation {
+  components new HalLIS3L02DQReaderP();
+  components HalLIS3L02DQControlP;
+  AccelX = HalLIS3L02DQReaderP.AccelX;
+  AccelY = HalLIS3L02DQReaderP.AccelY;
+  AccelZ = HalLIS3L02DQReaderP.AccelZ;
+  HalLIS3L02DQAdvanced = HalLIS3L02DQControlP.Advanced;
+  
+  enum { ACCELX_KEY = unique("LIS3L02DQ.Resource"),
+	 ACCELY_KEY = unique("LIS3L02DQ.Resource"),
+	 ACCELZ_KEY = unique("LIS3L02DQ.Resource"),
+	 ADV_KEY = unique("LIS3L02DQ.Resource"),
+	 READER_ID = unique("LIS3L02DQ.HplAccess"),
+  };
+
+  components LIS3L02DQInternalC;
+  HalLIS3L02DQReaderP.AccelXResource -> LIS3L02DQInternalC.Resource[ACCELX_KEY];
+  HalLIS3L02DQReaderP.AccelYResource -> LIS3L02DQInternalC.Resource[ACCELY_KEY];
+  HalLIS3L02DQReaderP.AccelZResource -> LIS3L02DQInternalC.Resource[ACCELZ_KEY];
+  HalLIS3L02DQControlP.Resource -> LIS3L02DQInternalC.Resource[ADV_KEY];
+  HalLIS3L02DQReaderP.Hpl -> LIS3L02DQInternalC.HplLIS3L02DQ[READER_ID];
+
+  SplitControl = LIS3L02DQInternalC;
+}
diff --git a/tos/sensorboards/im2sb/LIS3L02DQInternalC.nc b/tos/sensorboards/im2sb/LIS3L02DQInternalC.nc
new file mode 100644
index 00000000..bb3e7817
--- /dev/null
+++ b/tos/sensorboards/im2sb/LIS3L02DQInternalC.nc
@@ -0,0 +1,80 @@
+/* $Id: LIS3L02DQInternalC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "im2sb.h"
+
+configuration LIS3L02DQInternalC {
+  provides interface Resource[uint8_t id];
+  provides interface HplLIS3L02DQ[uint8_t id];
+  provides interface SplitControl;
+}
+
+implementation {
+  components LIS3L02DQInternalP as InternalP;
+  components new SimpleFcfsArbiterC( "LIS3L02DQ.Resource" ) as Arbiter;
+  components MainC;
+
+  Resource = Arbiter;
+  HplLIS3L02DQ = InternalP;
+  SplitControl = InternalP;
+  MainC.SoftwareInit -> InternalP;
+
+  components HplLIS3L02DQLogicSPIP as LogicSPIP;
+  components HalLIS3L02DQControlP as ControlP;
+  components new HalPXA27xSpiPioC(128, 7, FALSE) as HalSpi;
+  components HplPXA27xSSP1C;
+  components GeneralIOC;
+  components HplPXA27xGPIOC;
+
+  InternalP.ToHPLC -> LogicSPIP.HplLIS3L02DQ;
+  InternalP.SubControl -> LogicSPIP.SplitControl;
+  InternalP.SPICLK -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP1_SCLK];
+  InternalP.SPIRxD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP1_RXD];
+  InternalP.SPITxD -> HplPXA27xGPIOC.HplPXA27xGPIOPin[SSP1_TXD];
+  InternalP.HPWRCntl -> HplPXA27xGPIOC.HplPXA27xGPIOPin[GPIO_PWR_ADC_NSHDWN];
+
+  LogicSPIP.SpiPacket -> HalSpi.SpiPacket[unique("SPIInstance")];
+  LogicSPIP.SPIFRM -> GeneralIOC.GeneralIO[SSP1_SFRM];
+  LogicSPIP.InterruptAlert -> GeneralIOC.GpioInterrupt[GPIO_LIS3L02DQ_RDY_INT];
+
+  ControlP.Hpl -> LogicSPIP;
+
+  MainC.SoftwareInit -> HalSpi;
+  MainC.SoftwareInit -> LogicSPIP;
+
+  HalSpi.SSP -> HplPXA27xSSP1C;
+  
+}
diff --git a/tos/sensorboards/im2sb/LIS3L02DQInternalP.nc b/tos/sensorboards/im2sb/LIS3L02DQInternalP.nc
new file mode 100644
index 00000000..1c60636d
--- /dev/null
+++ b/tos/sensorboards/im2sb/LIS3L02DQInternalP.nc
@@ -0,0 +1,121 @@
+/* $Id: LIS3L02DQInternalP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * This Hal module implements the TinyOS 2.0 I2CPacket interface over
+ * the PXA27x I2C Hpl
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+module LIS3L02DQInternalP {
+  provides interface Init;
+  provides interface SplitControl;
+  provides interface HplLIS3L02DQ[uint8_t id];
+  
+  uses interface SplitControl as SubControl;
+  uses interface HplLIS3L02DQ as ToHPLC;
+  uses interface HplPXA27xGPIOPin as SPIRxD;
+  uses interface HplPXA27xGPIOPin as SPITxD;
+  uses interface HplPXA27xGPIOPin as SPICLK;
+  uses interface HplPXA27xGPIOPin as HPWRCntl;
+}
+
+implementation {
+  uint8_t currentId;
+
+
+  command error_t Init.init() {
+    // Initialize Pin Directions
+    call SPICLK.setGAFRpin(SSP1_SCLK_ALTFN);
+    call SPICLK.setGPDRbit(TRUE);
+    call SPIRxD.setGAFRpin(SSP1_RXD_ALTFN);
+    call SPIRxD.setGPDRbit(FALSE);
+    call SPITxD.setGAFRpin(SSP1_TXD_ALTFN);
+    call SPITxD.setGPDRbit(TRUE);
+
+    call HPWRCntl.setGPDRbit(TRUE);
+    call HPWRCntl.setGPSRbit();
+    return SUCCESS;
+  }
+
+  command error_t SplitControl.start() {
+    error_t error = SUCCESS;
+    error = call SubControl.start();
+    return error;
+  }
+
+  command error_t SplitControl.stop() {
+    error_t error = SUCCESS;
+    error = call SubControl.stop();
+    return error;
+  }
+
+  command error_t HplLIS3L02DQ.getReg[uint8_t id](uint8_t regAddr) {
+    currentId = id;
+    return call ToHPLC.getReg(regAddr);
+  }
+  command error_t HplLIS3L02DQ.setReg[uint8_t id](uint8_t regAddr, uint8_t val) {
+    currentId = id;
+    return call ToHPLC.setReg(regAddr, val);
+  }
+
+  event void SubControl.startDone(error_t error) {
+    signal SplitControl.startDone(error);
+    return;
+  }
+  event void SubControl.stopDone(error_t error) {
+    signal SplitControl.stopDone(error);
+    return;
+  }
+
+  async event void ToHPLC.getRegDone(error_t error, uint8_t regAddr, uint8_t val) {
+    signal HplLIS3L02DQ.getRegDone[currentId](error, regAddr, val);
+  }
+  async event void ToHPLC.setRegDone(error_t error, uint8_t regAddr, uint8_t val) {
+    signal HplLIS3L02DQ.setRegDone[currentId](error, regAddr, val);
+  }
+  async event void ToHPLC.alertThreshold() {
+    signal HplLIS3L02DQ.alertThreshold[currentId]();
+  }
+  
+  async event void SPITxD.interruptGPIOPin() {}
+  async event void SPIRxD.interruptGPIOPin() {}
+  async event void SPICLK.interruptGPIOPin() {}
+  async event void HPWRCntl.interruptGPIOPin() {}
+
+  default event void SplitControl.startDone(error_t error) { return; }
+  default event void SplitControl.stopDone(error_t error) { return; }
+
+  default async event void HplLIS3L02DQ.getRegDone[uint8_t id](error_t error, uint8_t regAddr, uint8_t val) { }
+  default async event void HplLIS3L02DQ.setRegDone[uint8_t id](error_t error, uint8_t regAddr, uint8_t val) { }
+  default async event void HplLIS3L02DQ.alertThreshold[uint8_t id]() { }
+}
diff --git a/tos/sensorboards/im2sb/MAX136xC.nc b/tos/sensorboards/im2sb/MAX136xC.nc
new file mode 100644
index 00000000..a628cbc3
--- /dev/null
+++ b/tos/sensorboards/im2sb/MAX136xC.nc
@@ -0,0 +1,64 @@
+/* $Id: MAX136xC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+
+#include "im2sb.h"
+#include "MAX136x.h"
+
+generic configuration MAX136xC() {
+  provides interface Read<max136x_data_t> as ADC;
+  provides interface HalMAX136xAdvanced;
+  provides interface SplitControl;
+}
+
+implementation {
+  components new HalMAX136xReaderP();
+  components HalMAX136xControlP;
+
+  ADC = HalMAX136xReaderP.ADC;
+
+  enum { ADC_KEY = unique("MAX136x.Resource"),
+	 ADV_KEY = unique("MAX136x.Resource"),
+	 READER_ID = unique("MAX136x.HplAccess"),
+  };
+
+  components MAX136xInternalC;
+  HalMAX136xReaderP.MAX136xResource -> MAX136xInternalC.Resource[ADC_KEY];
+  HalMAX136xReaderP.HplMAX136x -> MAX136xInternalC.HplMAX136x[READER_ID];
+  HalMAX136xControlP.Resource -> MAX136xInternalC.Resource[ADV_KEY];
+  HalMAX136xAdvanced = HalMAX136xControlP;
+
+  SplitControl = MAX136xInternalC;
+}
diff --git a/tos/sensorboards/im2sb/MAX136xInternalC.nc b/tos/sensorboards/im2sb/MAX136xInternalC.nc
new file mode 100644
index 00000000..64eb7275
--- /dev/null
+++ b/tos/sensorboards/im2sb/MAX136xInternalC.nc
@@ -0,0 +1,74 @@
+/* $Id: MAX136xInternalC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "im2sb.h"
+
+configuration MAX136xInternalC {
+  provides interface Resource[uint8_t id];
+  provides interface HplMAX136x[uint8_t id];
+  provides interface SplitControl;
+}
+
+implementation {
+  components new SimpleFcfsArbiterC( "MAX136x.Resource" )as Arbiter;
+  components MainC;
+  Resource = Arbiter;
+
+  components new HplMAX136xLogicP(MAX136_SLAVE_ADDR) as Logic;
+  //MainC.SoftwareInit -> Logic;
+
+ components GeneralIOC;
+  Logic.InterruptAlert -> GeneralIOC.GpioInterrupt[GPIO_MAX1363_ANALOG_INT];
+  Logic.InterruptPin -> GeneralIOC.GeneralIO[GPIO_MAX1363_ANALOG_INT];
+
+  components new HalPXA27xI2CMasterC(TRUE) as I2CC;
+  Logic.I2CPacket -> I2CC;
+
+  components MAX136xInternalP as Internal;
+  HplMAX136x = Internal.HplMAX136x;
+  Internal.ToHPLC -> Logic.HplMAX136x;
+  Internal.SubInit -> Logic.Init;
+  Internal.InterruptAlert -> GeneralIOC.GpioInterrupt[GPIO_MAX1363_ANALOG_INT];
+  MainC.SoftwareInit -> Internal.Init;
+  SplitControl = Logic;
+
+ 
+  components HplPXA27xGPIOC;
+  I2CC.I2CSCL -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SCL];
+  I2CC.I2CSDA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SDA];
+  
+  components HalMAX136xControlP;
+  HalMAX136xControlP.HplMAX136x -> Logic;
+}
diff --git a/tos/sensorboards/im2sb/MAX136xInternalP.nc b/tos/sensorboards/im2sb/MAX136xInternalP.nc
new file mode 100644
index 00000000..d0720839
--- /dev/null
+++ b/tos/sensorboards/im2sb/MAX136xInternalP.nc
@@ -0,0 +1,86 @@
+/* $Id: MAX136xInternalP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+module MAX136xInternalP {
+  provides interface Init;
+  provides interface HplMAX136x[uint8_t id];
+  uses interface Init as SubInit;
+  uses interface HplMAX136x as ToHPLC;
+  uses interface GpioInterrupt as InterruptAlert;
+}
+
+implementation {
+  uint8_t currentId;
+
+  command error_t Init.init() {
+    call SubInit.init();
+    // The Intel Mote 2 Sensorboard multiplexes the MAX136 interrupt through a NAND
+    // gate.  Need to override the edge trigger from the driver default
+    call InterruptAlert.enableRisingEdge();
+    return SUCCESS;
+  }
+
+  command error_t HplMAX136x.measureChannels[uint8_t id](uint8_t *buf, uint8_t len) {
+    currentId = id;
+    return call ToHPLC.measureChannels(buf, len);
+  }
+  command error_t HplMAX136x.setConfig[uint8_t id](uint8_t *cfgbuf, uint8_t len) {
+    currentId = id;
+    return call ToHPLC.setConfig(cfgbuf, len);
+  }
+  command error_t HplMAX136x.readStatus[uint8_t id](uint8_t *buf, uint8_t len) {
+    currentId = id;
+    return call ToHPLC.readStatus(buf, len);
+  }
+  async event void ToHPLC.measureChannelsDone(error_t error, uint8_t *buf, uint8_t len) {
+    signal HplMAX136x.measureChannelsDone[currentId](error, buf, len);
+  }
+  async event void ToHPLC.setConfigDone(error_t error, uint8_t *cfgbuf, uint8_t len) {
+    signal HplMAX136x.setConfigDone[currentId](error, cfgbuf, len);
+  }
+  async event void ToHPLC.alertThreshold() {
+    signal HplMAX136x.alertThreshold[currentId]();
+  }
+  async event void ToHPLC.readStatusDone(error_t error, uint8_t * buf) {
+    signal HplMAX136x.readStatusDone[currentId](error, buf);
+  }
+
+  async event void InterruptAlert.fired() {}
+
+  default async event void HplMAX136x.measureChannelsDone[uint8_t id]( error_t error, uint8_t *buf, uint8_t len ) {}
+  default async event void HplMAX136x.setConfigDone[uint8_t id]( error_t error , uint8_t *cfgbuf, uint8_t len) {}
+  default async event void HplMAX136x.alertThreshold[uint8_t id]() {}
+  default async event void HplMAX136x.readStatusDone[uint8_t id](error_t error, uint8_t *buf) { }
+}
diff --git a/tos/sensorboards/im2sb/README.txt b/tos/sensorboards/im2sb/README.txt
new file mode 100644
index 00000000..1d9ed60f
--- /dev/null
+++ b/tos/sensorboards/im2sb/README.txt
@@ -0,0 +1,15 @@
+Intel Mote 2 Demo Sensorboard Release Notes
+
+* The configuration provided assumes the following I2C addresses:
+
+  TSL2561 - 0x49
+  TMP175  - 0X4A
+  MAX136  - 0x34
+
+These address assignments are compatible with the DS2745 on the optional battery board.  Modify the address assignments as needed.
+
+* The TMP175 anbd TSL2561 interrupts will work ONLY IF the board has been modified to include a pullup resistor on their associated interrupt lines. Some boards do not include these resistors.
+
+
+
+
diff --git a/tos/sensorboards/im2sb/SensirionSht11C.nc b/tos/sensorboards/im2sb/SensirionSht11C.nc
new file mode 100644
index 00000000..a3ccdb6c
--- /dev/null
+++ b/tos/sensorboards/im2sb/SensirionSht11C.nc
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * SensirionSht11C is a top-level access component for the Sensirion
+ * SHT11 model humidity and temperature sensor, available on the
+ * telosb platform. Because this component represents one physical
+ * device, simultaneous calls to read temperature and humidity will be
+ * arbitrated and executed in sequential order. Feel free to read both
+ * at the same time, just be aware that they'll come back
+ * sequentially.
+ *
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * @author Gilman Tolles <gtolle@archrock.com>
+ * @version $Revision: 1.4 $ $Date: 2006-12-12 18:23:45 $
+ */
+
+generic configuration SensirionSht11C() {
+  provides interface SplitControl;
+  provides interface Read<uint16_t> as Temperature;
+  provides interface Read<uint16_t> as Humidity;
+  provides interface HalSht11Advanced;
+}
+implementation {
+  components new SensirionSht11ReaderP();
+
+  Temperature = SensirionSht11ReaderP.Temperature;
+  Humidity = SensirionSht11ReaderP.Humidity;
+
+  components HalSensirionSht11C;
+
+  enum { TEMP_KEY = unique("Sht11.Resource") };
+  enum { HUM_KEY = unique("Sht11.Resource") };
+
+  SplitControl = HalSensirionSht11C;
+  SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ];
+  SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
+  SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ];
+  SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ];
+
+  enum { ADV_KEY = unique("Sht11.Resource") };
+  components HalSht11ControlP;
+  HalSht11Advanced = HalSht11ControlP;
+  HalSht11ControlP.Resource -> HalSensirionSht11C.Resource[ ADV_KEY ];
+  HalSht11ControlP.SensirionSht11 -> HalSensirionSht11C.SensirionSht11[ ADV_KEY ];
+}
diff --git a/tos/sensorboards/im2sb/TMP175C.nc b/tos/sensorboards/im2sb/TMP175C.nc
new file mode 100644
index 00000000..095b073c
--- /dev/null
+++ b/tos/sensorboards/im2sb/TMP175C.nc
@@ -0,0 +1,62 @@
+/* $Id: TMP175C.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "im2sb.h"
+
+generic configuration TMP175C() {
+  provides interface Read<uint16_t> as Temperature;
+  provides interface HalTMP175Advanced;
+  provides interface SplitControl;
+  //provides interface Init;
+}
+
+implementation {
+  components new HalTMP175ReaderP();
+  components HalTMP175ControlP;
+  Temperature = HalTMP175ReaderP.Temperature;
+
+  enum { TMP_KEY = unique("TMP175.Resource"),
+	 ADV_KEY = unique("TMP175.Resource"),
+	 READER_ID = unique("TMP175.HplAccess"),
+  };
+
+  components TMP175InternalC;
+  HalTMP175ReaderP.TMP175Resource -> TMP175InternalC.Resource[TMP_KEY];
+  HalTMP175ControlP.TMP175Resource -> TMP175InternalC.Resource[ADV_KEY];
+  HalTMP175ReaderP.HplTMP175 -> TMP175InternalC.HplTMP175[READER_ID];
+  HalTMP175Advanced = HalTMP175ControlP.HalTMP175Advanced;
+
+  SplitControl = TMP175InternalC;
+}
diff --git a/tos/sensorboards/im2sb/TMP175InternalC.nc b/tos/sensorboards/im2sb/TMP175InternalC.nc
new file mode 100644
index 00000000..c9db3e70
--- /dev/null
+++ b/tos/sensorboards/im2sb/TMP175InternalC.nc
@@ -0,0 +1,76 @@
+/* $Id: TMP175InternalC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "im2sb.h"
+
+configuration TMP175InternalC {
+  provides interface Resource[uint8_t id];
+  provides interface HplTMP175[uint8_t id];
+  provides interface SplitControl;
+}
+
+implementation {
+  enum {
+    ADV_ID = unique("TMP175.HplAccess"),
+  };
+  
+  components new SimpleFcfsArbiterC( "TMP175.Resource" ) as Arbiter;
+  components MainC;
+  Resource = Arbiter;
+
+  components new HplTMP175LogicP(TMP175_SLAVE_ADDR) as Logic;
+  MainC.SoftwareInit -> Logic;
+
+  components GeneralIOC;
+  Logic.AlertInterrupt -> GeneralIOC.GpioInterrupt[GPIO_TMP175_TEMP_ALERT];
+  Logic.InterruptPin -> GeneralIOC.GeneralIO[GPIO_TMP175_TEMP_ALERT];
+
+  components new HalPXA27xI2CMasterC(TRUE) as I2CC;
+  Logic.I2CPacket -> I2CC;
+
+  components TMP175InternalP as Internal;
+  HplTMP175 = Internal.HplTMP175;
+  Internal.ToHPLC -> Logic.HplTMP175;
+
+  SplitControl = Logic;
+
+  components HplPXA27xGPIOC;
+  I2CC.I2CSCL -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SCL];
+  I2CC.I2CSDA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SDA];
+
+  components HalTMP175ControlP;
+  HalTMP175ControlP.HplTMP175 -> Logic;
+  
+}
diff --git a/tos/sensorboards/im2sb/TMP175InternalP.nc b/tos/sensorboards/im2sb/TMP175InternalP.nc
new file mode 100644
index 00000000..399aec1d
--- /dev/null
+++ b/tos/sensorboards/im2sb/TMP175InternalP.nc
@@ -0,0 +1,82 @@
+/* $Id: TMP175InternalP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+module TMP175InternalP {
+  provides interface HplTMP175[uint8_t id];
+  uses interface HplTMP175 as ToHPLC;
+}
+
+implementation {
+  uint8_t currentId;
+
+  command error_t HplTMP175.measureTemperature[uint8_t id]() {
+    currentId = id;
+    return call ToHPLC.measureTemperature();
+  }
+  command error_t HplTMP175.setConfigReg[uint8_t id](uint8_t val) {
+    currentId = id;
+    return call ToHPLC.setConfigReg(val);
+  }
+  command error_t HplTMP175.setTLowReg[uint8_t id](uint16_t val) {
+    currentId = id;
+    return call ToHPLC.setTLowReg(val);
+  }
+  command error_t HplTMP175.setTHighReg[uint8_t id](uint16_t val) {
+    currentId = id;
+    return call ToHPLC.setTHighReg(val);
+  }
+
+  async event void ToHPLC.measureTemperatureDone(error_t error, uint16_t val) {
+    signal HplTMP175.measureTemperatureDone[currentId](error, val);
+  }
+  async event void ToHPLC.setConfigRegDone(error_t error) {
+    signal HplTMP175.setConfigRegDone[currentId](error);
+  }
+  async event void ToHPLC.setTLowRegDone(error_t error) {
+    signal HplTMP175.setTLowRegDone[currentId](error);
+  }
+  async event void ToHPLC.setTHighRegDone(error_t error) {
+    signal HplTMP175.setTHighRegDone[currentId](error);
+  }
+  async event void ToHPLC.alertThreshold() {
+    signal HplTMP175.alertThreshold[currentId]();
+  }
+
+  default async event void HplTMP175.measureTemperatureDone[uint8_t id](error_t error, uint16_t val) { return; }
+  default async event void HplTMP175.setConfigRegDone[uint8_t id](error_t error) { return; }
+  default async event void HplTMP175.setTLowRegDone[uint8_t id](error_t error) { return; }
+  default async event void HplTMP175.setTHighRegDone[uint8_t id](error_t error) { return; }
+  default async event void HplTMP175.alertThreshold[uint8_t id]() { return; }
+}
diff --git a/tos/sensorboards/im2sb/Tsl2561C.nc b/tos/sensorboards/im2sb/Tsl2561C.nc
new file mode 100644
index 00000000..72237751
--- /dev/null
+++ b/tos/sensorboards/im2sb/Tsl2561C.nc
@@ -0,0 +1,70 @@
+/* $Id: Tsl2561C.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "im2sb.h"
+
+generic configuration Tsl2561C() {
+  provides interface Read<uint16_t> as BroadbandPhoto;
+  provides interface Read<uint16_t> as IRPhoto;
+  provides interface HalTsl2561Advanced;
+  provides interface SplitControl; // this is for power control?
+  //provides interface Init;
+}
+implementation {
+  components new HalTsl2561ReaderP();
+  components HalTsl2561ControlP;
+
+  BroadbandPhoto = HalTsl2561ReaderP.BroadbandPhoto;
+  IRPhoto = HalTsl2561ReaderP.IRPhoto;
+
+  enum { BB_KEY = unique("Tsl2561.Resource"),
+	 IR_KEY = unique("Tsl2561.Resource"),
+	 ADV_KEY = unique("Tsl2561.Resource"),
+	 READER_ID = unique("Tsl2561.HplAccess"),
+  };
+
+  components Tsl2561InternalC;
+  HalTsl2561ReaderP.BroadbandResource -> Tsl2561InternalC.Resource[BB_KEY];
+  HalTsl2561ReaderP.IRResource -> Tsl2561InternalC.Resource[IR_KEY];
+  HalTsl2561ControlP.Resource -> Tsl2561InternalC.Resource[ADV_KEY];
+
+  HalTsl2561ReaderP.HplTSL256x -> Tsl2561InternalC.HplTSL256x[READER_ID];
+
+  HalTsl2561Advanced = HalTsl2561ControlP.HalTsl2561Advanced;
+
+  // for debugging
+  SplitControl = Tsl2561InternalC;
+}
+
diff --git a/tos/sensorboards/im2sb/Tsl2561InternalC.nc b/tos/sensorboards/im2sb/Tsl2561InternalC.nc
new file mode 100644
index 00000000..d4bed22c
--- /dev/null
+++ b/tos/sensorboards/im2sb/Tsl2561InternalC.nc
@@ -0,0 +1,79 @@
+/* $Id: Tsl2561InternalC.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+#include "im2sb.h"
+
+configuration Tsl2561InternalC {
+  provides interface Resource[uint8_t id];
+  provides interface HplTSL256x[uint8_t id];
+  provides interface SplitControl;
+}
+
+implementation {
+  enum { ADV_ID = unique("Tsl2561.HplAccess"),
+
+  };
+
+  components new SimpleFcfsArbiterC( "Tsl2561.Resource" ) as Arbiter;
+  components MainC;
+  Resource = Arbiter;
+  
+  components new HplTSL2561LogicP(TSL2561_SLAVE_ADDR) as Logic;
+  //MainC.SoftwareInit -> Logic;
+
+  components LedsC;
+  Logic.Leds -> LedsC;
+  components GeneralIOC;
+  Logic.InterruptAlert -> GeneralIOC.GpioInterrupt[GPIO_TSL2561_LIGHT_INT];
+  Logic.InterruptPin -> GeneralIOC.GeneralIO[GPIO_TSL2561_LIGHT_INT];
+
+  components new HalPXA27xI2CMasterC(TRUE) as I2CC;
+  Logic.I2CPacket -> I2CC;
+
+  components Tsl2561InternalP as Internal;
+  HplTSL256x = Internal.HplTSL256x;
+  Internal.ToHPLC -> Logic.HplTSL256x;
+  Internal.SubInit -> Logic.Init;
+  Internal.InterruptAlert -> GeneralIOC.GpioInterrupt[GPIO_TSL2561_LIGHT_INT];
+  SplitControl = Logic;
+  MainC.SoftwareInit -> Internal;
+
+  components HplPXA27xGPIOC;
+  I2CC.I2CSCL -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SCL];
+  I2CC.I2CSDA -> HplPXA27xGPIOC.HplPXA27xGPIOPin[I2C_SDA];
+
+  components HalTsl2561ControlP;
+  HalTsl2561ControlP.HplTSL256x -> Logic;
+}
diff --git a/tos/sensorboards/im2sb/Tsl2561InternalP.nc b/tos/sensorboards/im2sb/Tsl2561InternalP.nc
new file mode 100644
index 00000000..f013664c
--- /dev/null
+++ b/tos/sensorboards/im2sb/Tsl2561InternalP.nc
@@ -0,0 +1,127 @@
+/* $Id: Tsl2561InternalP.nc,v 1.4 2006-12-12 18:23:45 vlahan Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ *
+ * @author Kaisen Lin
+ * @author Phil Buonadonna
+ */
+module Tsl2561InternalP {
+  provides interface Init;
+  provides interface HplTSL256x[uint8_t id];
+  uses interface Init as SubInit;
+  uses interface HplTSL256x as ToHPLC;
+  uses interface GpioInterrupt as InterruptAlert;
+}
+
+implementation {
+  uint8_t currentId;
+  
+  command error_t Init.init() {
+    call SubInit.init();
+    // The Intel Mote 2 Sensorboard multiplexes the TSL interrupt through a NAND
+    // gate.  Need to overrid the edge trigger from the driver default
+    call InterruptAlert.enableRisingEdge();
+    return SUCCESS;
+  }
+
+  command error_t HplTSL256x.measureCh0[uint8_t id]() {
+    currentId = id;
+    return call ToHPLC.measureCh0();
+  }
+  command error_t HplTSL256x.measureCh1[uint8_t id]() {
+    currentId = id;
+    return call ToHPLC.measureCh1();
+  }
+  command error_t HplTSL256x.setCONTROL[uint8_t id](uint8_t val) {
+    currentId = id;
+    return call ToHPLC.setCONTROL(val);
+  }
+  command error_t HplTSL256x.setTIMING[uint8_t id](uint8_t val) {
+    currentId = id;
+    return call ToHPLC.setTIMING(val);
+  }
+  command error_t HplTSL256x.setTHRESHLOW[uint8_t id](uint16_t val) {
+    currentId = id;
+    return call ToHPLC.setTHRESHLOW(val);
+  }
+  command error_t HplTSL256x.setTHRESHHIGH[uint8_t id](uint16_t val) {
+    currentId = id;
+    return call ToHPLC.setTHRESHHIGH(val);
+  }
+  command error_t HplTSL256x.setINTERRUPT[uint8_t id](uint8_t val) {
+    currentId = id;
+    return call ToHPLC.setINTERRUPT(val);
+  }
+  command error_t HplTSL256x.getID[uint8_t id]() {
+    currentId = id;
+    return call ToHPLC.getID();
+  }
+  
+  async event void ToHPLC.measureCh0Done(error_t result, uint16_t val) {
+    signal HplTSL256x.measureCh0Done[currentId](result, val);
+  }
+  async event void ToHPLC.measureCh1Done(error_t result, uint16_t val) {
+    signal HplTSL256x.measureCh1Done[currentId](result, val);
+  }
+  async event void ToHPLC.setCONTROLDone(error_t error) {
+    signal HplTSL256x.setCONTROLDone[currentId](error);
+  }
+  async event void ToHPLC.setTIMINGDone(error_t error) {
+    signal HplTSL256x.setTIMINGDone[currentId](error);
+  }
+  async event void ToHPLC.setTHRESHLOWDone(error_t error) {
+    signal HplTSL256x.setTHRESHLOWDone[currentId](error);
+  }
+  async event void ToHPLC.setTHRESHHIGHDone(error_t error) {
+    signal HplTSL256x.setTHRESHHIGHDone[currentId](error);
+  }
+  async event void ToHPLC.setINTERRUPTDone(error_t error) {
+    signal HplTSL256x.setINTERRUPTDone[currentId](error);
+  }
+  async event void ToHPLC.getIDDone(error_t error, uint8_t idval) {
+    signal HplTSL256x.getIDDone[currentId](error, idval);
+  }
+  async event void ToHPLC.alertThreshold() {
+    signal HplTSL256x.alertThreshold[currentId]();
+  }
+
+  async event void InterruptAlert.fired() {}
+
+  default async event void HplTSL256x.measureCh0Done[uint8_t id]( error_t error, uint16_t val ){ return; }
+  default async event void HplTSL256x.measureCh1Done[uint8_t id]( error_t error, uint16_t val ){ return; }
+  default async event void HplTSL256x.setCONTROLDone[uint8_t id]( error_t error ){ return; }
+  default async event void HplTSL256x.setTIMINGDone[uint8_t id](error_t error){ return; }
+  default async event void HplTSL256x.setTHRESHLOWDone[uint8_t id](error_t error){ return;} 
+  default async event void HplTSL256x.setTHRESHHIGHDone[uint8_t id](error_t error){ return; }
+  default async event void HplTSL256x.setINTERRUPTDone[uint8_t id](error_t error){ return;} 
+  default async event void HplTSL256x.getIDDone[uint8_t id](error_t error, uint8_t idval){ return; }
+  default async event void HplTSL256x.alertThreshold[uint8_t id](){ return; }
+}
diff --git a/tos/sensorboards/im2sb/examples/Makefile b/tos/sensorboards/im2sb/examples/Makefile
new file mode 100644
index 00000000..a7f22080
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/Makefile
@@ -0,0 +1,7 @@
+
+TestSensor.class: $(wildcard *.java) TestSensorMsg.java
+	javac *.java
+
+TestSensorMsg.java:
+	mig java -target=null $(CFLAGS) -java-classname=TestSensorMsg TestSensor.h TestSensorMsg -o $@
+
diff --git a/tos/sensorboards/im2sb/examples/TestLis3l02dq/Makefile b/tos/sensorboards/im2sb/examples/TestLis3l02dq/Makefile
new file mode 100644
index 00000000..19fc8785
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestLis3l02dq/Makefile
@@ -0,0 +1,5 @@
+COMPONENT=TestSensorC
+
+SENSORBOARD ?= im2sb
+
+include $(MAKERULES)
\ No newline at end of file
diff --git a/tos/sensorboards/im2sb/examples/TestLis3l02dq/TestSensorC.nc b/tos/sensorboards/im2sb/examples/TestLis3l02dq/TestSensorC.nc
new file mode 100644
index 00000000..cb60fb91
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestLis3l02dq/TestSensorC.nc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Demo application of the STMicroelectronics LIS3L02DQ . Originally 
+ * developed for the Intel Mote 2 sensorboard.
+ *
+ * @author Kaisen Lin
+ * @author Philip Buonadonna
+ */
+
+configuration TestSensorC{}
+implementation {
+  components MainC, TestSensorM, LedsC;
+  components new LIS3L02DQC() as Sensor;
+
+  MainC.Boot <- TestSensorM;
+  TestSensorM.Leds -> LedsC;
+
+  TestSensorM.ReadAccelX -> Sensor.AccelX;
+  TestSensorM.ReadAccelY -> Sensor.AccelY;
+  TestSensorM.ReadAccelZ -> Sensor.AccelZ;
+  TestSensorM.SubControl -> Sensor.SplitControl;
+  TestSensorM.Advanced -> Sensor.HalLIS3L02DQAdvanced;
+
+  components new TimerMilliC() as Timer0;
+  TestSensorM.Timer0 -> Timer0;
+
+  components SerialActiveMessageC as AM;
+  TestSensorM.AMSend -> AM.AMSend[AM_TESTSENSORMSG];
+  TestSensorM.Packet -> AM;
+  TestSensorM.SubControl -> AM;
+}
diff --git a/tos/sensorboards/im2sb/examples/TestLis3l02dq/TestSensorM.nc b/tos/sensorboards/im2sb/examples/TestLis3l02dq/TestSensorM.nc
new file mode 100644
index 00000000..7b54e383
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestLis3l02dq/TestSensorM.nc
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Demo application of the STMicroelectronics LIS3L02DQ . Originally 
+ * developed for the Intel Mote 2 sensorboard.
+ *
+ * @author Kaisen Lin
+ * @author Philip Buonadonna
+ */
+#include "../TestSensor.h"
+
+/* Uncomment the flag below to test the interrupt functions of the chip */
+//#define USE_INTERRUPTS
+
+module TestSensorM
+{
+  uses interface Boot;
+  
+  uses interface Timer<TMilli> as Timer0;
+
+  uses interface Read<uint16_t> as ReadAccelX;
+  uses interface Read<uint16_t> as ReadAccelY;
+  uses interface Read<uint16_t> as ReadAccelZ;
+  uses interface SplitControl as SubControl;
+
+  uses interface HalLIS3L02DQAdvanced as Advanced;
+
+  uses interface Leds;
+  uses interface AMSend;
+  uses interface Packet;
+}
+implementation
+{
+  message_t packet;
+
+  event void Boot.booted() {
+    call SubControl.start();
+  }
+
+  event void Timer0.fired() {
+    call ReadAccelX.read();
+    call ReadAccelY.read();
+    call ReadAccelZ.read();
+  }
+
+  event void SubControl.startDone(error_t result) {
+#ifndef USE_INTERRUPTS
+   call Timer0.startPeriodic( 100 );
+#else
+    call Advanced.setTLow(0xA0);
+#endif
+  }
+
+  event void SubControl.stopDone(error_t result) { }
+  
+  event void ReadAccelX.readDone(error_t result, uint16_t val) {
+    TestSensorMsg *rcm = (TestSensorMsg *)call Packet.getPayload(&packet, NULL);
+    call Leds.led0Toggle();    
+
+    if (call Packet.maxPayloadLength() < sizeof(TestSensorMsg)) {
+      return;
+    }
+    rcm->value = val;
+
+    call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSensorMsg));
+  }
+
+  event void ReadAccelY.readDone(error_t result, uint16_t val) {
+    if(val > 0x800)
+      call Leds.led1Toggle();    
+  }
+  event void ReadAccelZ.readDone(error_t result, uint16_t val) {
+    if(val > 0x800)
+      call Leds.led2Toggle();    
+  }
+
+  event void Advanced.setDecimationDone(error_t error) {}
+  event void Advanced.enableAxisDone(error_t error) {}
+  event void Advanced.enableAlertDone(error_t error) {
+    call Leds.led2Toggle();
+  }
+  event void Advanced.getAlertSourceDone(error_t error, uint8_t vector) {}
+  event void Advanced.setTLowDone(error_t error) {
+    call Advanced.setTHigh(0xF);
+  }
+  event void Advanced.setTHighDone(error_t error) {
+    call Advanced.enableAlert(LIS_AFLAGS_HIGH,
+			      LIS_AFLAGS_NONE,
+			      LIS_AFLAGS_NONE,
+			      FALSE);
+  }
+
+  event void Advanced.alertThreshold() {
+    call Leds.led0Toggle();
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    return;
+  }
+}
diff --git a/tos/sensorboards/im2sb/examples/TestMax136/Makefile b/tos/sensorboards/im2sb/examples/TestMax136/Makefile
new file mode 100644
index 00000000..19fc8785
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestMax136/Makefile
@@ -0,0 +1,5 @@
+COMPONENT=TestSensorC
+
+SENSORBOARD ?= im2sb
+
+include $(MAKERULES)
\ No newline at end of file
diff --git a/tos/sensorboards/im2sb/examples/TestMax136/TestSensorC.nc b/tos/sensorboards/im2sb/examples/TestMax136/TestSensorC.nc
new file mode 100644
index 00000000..0ec2b793
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestMax136/TestSensorC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Demo application of the Maxim MAX136X. Originally developed for the
+ * Intel Mote 2 sensorboard.
+ *
+ * @author Kaisen Lin
+ * @author Philip Buonadonna
+ */
+
+configuration TestSensorC{}
+implementation {
+  components MainC, TestSensorM, LedsC;
+  components new MAX136xC() as Sensor;
+
+  MainC.Boot <- TestSensorM;
+  TestSensorM.Leds -> LedsC;
+
+  TestSensorM.ADC -> Sensor;
+  TestSensorM.SensorControl -> Sensor.SplitControl;
+  TestSensorM.HalMAX136xAdvanced -> Sensor;
+
+  components new TimerMilliC() as Timer0;
+  TestSensorM.Timer0 -> Timer0;
+
+  components SerialActiveMessageC as AM;
+  TestSensorM.AMSend -> AM.AMSend[AM_TESTSENSORMSG];
+  TestSensorM.Packet -> AM;
+  TestSensorM.MsgControl -> AM;
+}
diff --git a/tos/sensorboards/im2sb/examples/TestMax136/TestSensorM.nc b/tos/sensorboards/im2sb/examples/TestMax136/TestSensorM.nc
new file mode 100644
index 00000000..f069be83
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestMax136/TestSensorM.nc
@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Demo application of the Maxim MAX136X. Originally developed for the
+ * Intel Mote 2 sensorboard.
+ *
+ * @author Kaisen Lin
+ * @author Philip Buonadonna
+ */
+#include "MAX136x.h"
+#include "../TestSensor.h"
+
+/* Uncomment the flag below to test the interrupt functions of the chip */
+//#define USE_INTERRUPTS
+
+module TestSensorM
+{
+  uses interface Boot;
+  
+  uses interface Timer<TMilli> as Timer0;
+
+  uses interface Read<max136x_data_t> as ADC;
+  uses interface HalMAX136xAdvanced;
+  uses interface SplitControl as SensorControl;
+  uses interface SplitControl as MsgControl;
+
+  uses interface Leds;
+  uses interface AMSend;
+  uses interface Packet;
+}
+
+implementation
+{
+  message_t packet;
+
+  event void Boot.booted() {
+    call SensorControl.start();
+  }
+
+  event void Timer0.fired() {
+    call ADC.read();
+  }
+
+  event void SensorControl.startDone(error_t result) {
+    call MsgControl.start();
+  }
+
+  event void SensorControl.stopDone(error_t result) { return; }
+
+
+  event void MsgControl.startDone(error_t result) {
+#ifndef USE_INTERRUPTS
+    call Timer0.startPeriodic( 100 );
+#else
+    uint16_t chan0Low = 200;
+    uint16_t chan0High = 700;
+    uint8_t ucThresholds[12];
+    uint8_t i;
+
+    ucThresholds[0] = (chan0Low >> 4);
+    ucThresholds[1] = ( ((chan0Low & 0xF) << 4) | (chan0High >> 8));
+    ucThresholds[2] = chan0High & 0xFF;
+    for (i=3;i<12;i+=3) {
+      ucThresholds[i] = 0x00;
+      ucThresholds[i+1] = 0x0F;
+      ucThresholds[i+2] = 0xFF;
+    }
+    call HalMAX136xAdvanced.setMonitorMode(0,0,MAX136X_DELAY_1_0,ucThresholds);
+#endif
+  }
+
+  event void MsgControl.stopDone(error_t result) { return; }
+  
+  event void ADC.readDone(error_t result, max136x_data_t val) {
+    TestSensorMsg *rcm = (TestSensorMsg *)call Packet.getPayload(&packet, NULL);
+    call Leds.led0Toggle();
+    if (call Packet.maxPayloadLength() < sizeof(TestSensorMsg)) {
+      return;
+    }
+    rcm->value = val & 0x3FF;
+
+    call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSensorMsg));
+  }
+
+  event void HalMAX136xAdvanced.setScanModeDone(error_t error) {}
+  event void HalMAX136xAdvanced.setMonitorModeDone(error_t error) {
+    call Leds.set(LEDS_LED1);
+    call HalMAX136xAdvanced.enableAlert(TRUE);
+  }
+  event void HalMAX136xAdvanced.setConversionModeDone(error_t error) {}  
+  event void HalMAX136xAdvanced.setClockDone(error_t error) {} 
+  event void HalMAX136xAdvanced.setRefDone(error_t error) {}
+  event void HalMAX136xAdvanced.getStatusDone(error_t error, uint8_t status, 
+					      max136x_data_t data) {}
+  event void HalMAX136xAdvanced.enableAlertDone(error_t error) {
+    call Leds.set(LEDS_LED1 | LEDS_LED2);
+    return;
+  }
+  event void HalMAX136xAdvanced.alertThreshold() {
+    call Leds.led0Toggle();
+    call HalMAX136xAdvanced.enableAlert(TRUE); // Clears interrupt
+    return;
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) { return; }
+}
diff --git a/tos/sensorboards/im2sb/examples/TestSensor.h b/tos/sensorboards/im2sb/examples/TestSensor.h
new file mode 100644
index 00000000..022dfd57
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestSensor.h
@@ -0,0 +1,12 @@
+#ifndef TEST_SENSOR_H
+#define TEST_SENSOR_H
+
+typedef nx_struct TestSensorMsg {
+  nx_uint16_t value;
+} TestSensorMsg;
+
+enum {
+  AM_TESTSENSORMSG = 10,
+};
+
+#endif
diff --git a/tos/sensorboards/im2sb/examples/TestSensor.java b/tos/sensorboards/im2sb/examples/TestSensor.java
new file mode 100644
index 00000000..670e661e
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestSensor.java
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Java-side application for testing serial port communication.
+ * 
+ *
+ * @author Phil Levis <pal@cs.berkeley.edu>
+ * @date August 12 2005
+ */
+
+import java.io.IOException;
+
+import net.tinyos.message.*;
+import net.tinyos.packet.*;
+import net.tinyos.util.*;
+
+public class TestSensor implements MessageListener {
+
+    private MoteIF moteIF;
+  
+    public TestSensor(MoteIF moteIF) {
+				this.moteIF = moteIF;
+				this.moteIF.registerListener(new TestSensorMsg(), this);
+    }
+
+    public void sendPackets() {
+				int counter = 0;
+				TestSensorMsg payload = new TestSensorMsg();
+    
+				try {
+						while (true) {
+								/*
+									System.out.println("Sending packet " + counter);
+									payload.set_counter(counter);
+									moteIF.send(0, payload);
+									counter++;
+								*/
+								try {Thread.sleep(1000);}
+								catch (InterruptedException exception) {}
+						}
+				}
+				catch (Exception exception) {
+						System.err.println("Exception thrown when sending packets. Exiting.");
+						System.err.println(exception);
+				}
+    }
+
+    public void messageReceived(int to, Message message) {
+				TestSensorMsg msg = (TestSensorMsg)message;
+				System.out.println("Received packet. Value= " + msg.get_value());
+    }
+  
+    private static void usage() {
+				System.err.println("usage: TestSensor [-comm <source>]");
+    }
+  
+    public static void main(String[] args) throws Exception {
+				String source = null;
+				if (args.length == 2) {
+						if (!args[0].equals("-comm")) {
+								usage();
+								System.exit(1);
+						}
+						source = args[1];
+				}
+				else if (args.length != 0) {
+						usage();
+						System.exit(1);
+				}
+    
+				PhoenixSource phoenix;
+    
+				if (source == null) {
+						phoenix = BuildSource.makePhoenix(PrintStreamMessenger.err);
+				}
+				else {
+						phoenix = BuildSource.makePhoenix(source, PrintStreamMessenger.err);
+				}
+
+				MoteIF mif = new MoteIF(phoenix);
+				TestSensor serial = new TestSensor(mif);
+				serial.sendPackets();
+    }
+
+
+}
diff --git a/tos/sensorboards/im2sb/examples/TestSensorMsg.java b/tos/sensorboards/im2sb/examples/TestSensorMsg.java
new file mode 100644
index 00000000..461de735
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestSensorMsg.java
@@ -0,0 +1,158 @@
+/**
+ * This class is automatically generated by mig. DO NOT EDIT THIS FILE.
+ * This class implements a Java interface to the 'TestSensorMsg'
+ * message type.
+ */
+
+public class TestSensorMsg extends net.tinyos.message.Message {
+
+    /** The default size of this message type in bytes. */
+    public static final int DEFAULT_MESSAGE_SIZE = 2;
+
+    /** The Active Message type associated with this message. */
+    public static final int AM_TYPE = 10;
+
+    /** Create a new TestSensorMsg of size 2. */
+    public TestSensorMsg() {
+        super(DEFAULT_MESSAGE_SIZE);
+        amTypeSet(AM_TYPE);
+    }
+
+    /** Create a new TestSensorMsg of the given data_length. */
+    public TestSensorMsg(int data_length) {
+        super(data_length);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+     * Create a new TestSensorMsg with the given data_length
+     * and base offset.
+     */
+    public TestSensorMsg(int data_length, int base_offset) {
+        super(data_length, base_offset);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+     * Create a new TestSensorMsg using the given byte array
+     * as backing store.
+     */
+    public TestSensorMsg(byte[] data) {
+        super(data);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+     * Create a new TestSensorMsg using the given byte array
+     * as backing store, with the given base offset.
+     */
+    public TestSensorMsg(byte[] data, int base_offset) {
+        super(data, base_offset);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+     * Create a new TestSensorMsg using the given byte array
+     * as backing store, with the given base offset and data length.
+     */
+    public TestSensorMsg(byte[] data, int base_offset, int data_length) {
+        super(data, base_offset, data_length);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+     * Create a new TestSensorMsg embedded in the given message
+     * at the given base offset.
+     */
+    public TestSensorMsg(net.tinyos.message.Message msg, int base_offset) {
+        super(msg, base_offset, DEFAULT_MESSAGE_SIZE);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+     * Create a new TestSensorMsg embedded in the given message
+     * at the given base offset and length.
+     */
+    public TestSensorMsg(net.tinyos.message.Message msg, int base_offset, int data_length) {
+        super(msg, base_offset, data_length);
+        amTypeSet(AM_TYPE);
+    }
+
+    /**
+    /* Return a String representation of this message. Includes the
+     * message type name and the non-indexed field values.
+     */
+    public String toString() {
+      String s = "Message <TestSensorMsg> \n";
+      try {
+        s += "  [value=0x"+Long.toHexString(get_value())+"]\n";
+      } catch (ArrayIndexOutOfBoundsException aioobe) { /* Skip field */ }
+      return s;
+    }
+
+    // Message-type-specific access methods appear below.
+
+    /////////////////////////////////////////////////////////
+    // Accessor methods for field: value
+    //   Field type: int, unsigned
+    //   Offset (bits): 0
+    //   Size (bits): 16
+    /////////////////////////////////////////////////////////
+
+    /**
+     * Return whether the field 'value' is signed (false).
+     */
+    public static boolean isSigned_value() {
+        return false;
+    }
+
+    /**
+     * Return whether the field 'value' is an array (false).
+     */
+    public static boolean isArray_value() {
+        return false;
+    }
+
+    /**
+     * Return the offset (in bytes) of the field 'value'
+     */
+    public static int offset_value() {
+        return (0 / 8);
+    }
+
+    /**
+     * Return the offset (in bits) of the field 'value'
+     */
+    public static int offsetBits_value() {
+        return 0;
+    }
+
+    /**
+     * Return the value (as a int) of the field 'value'
+     */
+    public int get_value() {
+        return (int)getUIntBEElement(offsetBits_value(), 16);
+    }
+
+    /**
+     * Set the value of the field 'value'
+     */
+    public void set_value(int value) {
+        setUIntBEElement(offsetBits_value(), 16, value);
+    }
+
+    /**
+     * Return the size, in bytes, of the field 'value'
+     */
+    public static int size_value() {
+        return (16 / 8);
+    }
+
+    /**
+     * Return the size, in bits, of the field 'value'
+     */
+    public static int sizeBits_value() {
+        return 16;
+    }
+
+}
diff --git a/tos/sensorboards/im2sb/examples/TestSht11/README.txt b/tos/sensorboards/im2sb/examples/TestSht11/README.txt
new file mode 100644
index 00000000..98694b97
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestSht11/README.txt
@@ -0,0 +1,7 @@
+Sht11 Test Sensor
+
+A simple application to demonstrate/test the SHT11 on the Intel Mote 2 sensorboard.
+
+NOTE: If using the debug/programming board you must set SW5 to either the 
+SPI or I2C settings for the SHT11 to work correctly.
+
diff --git a/tos/sensorboards/im2sb/examples/TestSht11/TestSensorC.nc b/tos/sensorboards/im2sb/examples/TestSht11/TestSensorC.nc
new file mode 100644
index 00000000..aa53b132
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestSht11/TestSensorC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Demo application of the Sensirion SHT11. Originally developed for the
+ * Intel Mote 2 sensorboard.
+ *
+ * @author Kaisen Lin
+ * @author Philip Buonadonna
+ */
+
+configuration TestSensorC{}
+implementation {
+  components MainC, TestSensorM, LedsC;
+  components new SensirionSht11C() as Sensor;
+
+  MainC.Boot <- TestSensorM;
+  TestSensorM.Leds -> LedsC;
+
+  TestSensorM.Temperature -> Sensor.Temperature;
+  TestSensorM.Humidity -> Sensor.Humidity;
+  TestSensorM.HalSht11Advanced -> Sensor;
+  TestSensorM.SensorControl -> Sensor.SplitControl;
+
+  components new TimerMilliC() as Timer0;
+  TestSensorM.Timer0 -> Timer0;
+
+  components SerialActiveMessageC as AM;
+  TestSensorM.AMSend -> AM.AMSend[AM_TESTSENSORMSG];
+  TestSensorM.Packet -> AM;
+  TestSensorM.MsgControl -> AM;
+}
diff --git a/tos/sensorboards/im2sb/examples/TestSht11/TestSensorM.nc b/tos/sensorboards/im2sb/examples/TestSht11/TestSensorM.nc
new file mode 100644
index 00000000..4ec1f90e
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestSht11/TestSensorM.nc
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Demo application of the TAOS Tsl2561. Originally developed for the
+ * Intel Mote 2 sensorboard.
+ *
+ * @author Kaisen Lin
+ * @author Philip Buonadonna
+ */
+#include "../TestSensor.h"
+
+module TestSensorM
+{
+  uses interface Boot;
+  
+  uses interface Timer<TMilli> as Timer0;
+
+  uses interface Read<uint16_t> as Temperature;
+  uses interface Read<uint16_t> as Humidity;  
+  uses interface HalSht11Advanced;
+  uses interface SplitControl as SensorControl;
+  uses interface SplitControl as MsgControl;
+
+  uses interface Leds;
+  uses interface AMSend;
+  uses interface Packet;
+}
+
+implementation
+{
+  message_t packet;
+
+  event void Boot.booted() {
+    call SensorControl.start();
+  }
+
+  event void SensorControl.startDone(error_t error) {
+    call MsgControl.start();
+  }
+
+  event void SensorControl.stopDone(error_t error) {  }
+
+  event void MsgControl.startDone(error_t error) {
+    call HalSht11Advanced.getVoltageStatus();
+    call Timer0.startPeriodic( 100 );
+  }
+
+  event void MsgControl.stopDone(error_t error) { }
+
+  event void Timer0.fired() {
+    //call Temperature.read();
+    call Humidity.read();
+  }
+
+  event void Temperature.readDone(error_t result, uint16_t val) {
+    call Leds.led0Toggle();
+  }
+
+  event void Humidity.readDone(error_t result, uint16_t val) {
+    TestSensorMsg *rcm = (TestSensorMsg *)call Packet.getPayload(&packet, NULL);
+    call Leds.led1Toggle();
+    if (call Packet.maxPayloadLength() < sizeof(TestSensorMsg)) {
+      return;
+    }
+    rcm->value = val;
+
+    call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSensorMsg));
+  }
+
+  event void HalSht11Advanced.getVoltageStatusDone(error_t error, bool isLow) {}
+
+  event void HalSht11Advanced.setHeaterDone(error_t error) {}
+
+  event void HalSht11Advanced.setResolutionDone(error_t error) {}
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    return;
+  }
+
+}
diff --git a/tos/sensorboards/im2sb/examples/TestTmp175/Makefile b/tos/sensorboards/im2sb/examples/TestTmp175/Makefile
new file mode 100644
index 00000000..c21cfd0c
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestTmp175/Makefile
@@ -0,0 +1,5 @@
+COMPONENT=TestSensorC
+CFLAGS += -I%T/lib/oski
+SENSORBOARD ?= im2sb
+
+include $(MAKERULES)
\ No newline at end of file
diff --git a/tos/sensorboards/im2sb/examples/TestTmp175/TestSensorC.nc b/tos/sensorboards/im2sb/examples/TestTmp175/TestSensorC.nc
new file mode 100644
index 00000000..68a2ffac
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestTmp175/TestSensorC.nc
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Demo application of the TI TMP175. Originally developed for the
+ * Intel Mote 2 sensorboard.
+ *
+ * @author Kaisen Lin
+ * @author Philip Buonadonna
+ */
+
+configuration TestSensorC{}
+implementation {
+  components MainC, TestSensorM, LedsC;
+  components new TMP175C() as Sensor;
+
+  MainC.Boot <- TestSensorM;
+  TestSensorM.Leds -> LedsC;
+
+  TestSensorM.Temperature -> Sensor;
+  TestSensorM.SubControl -> Sensor.SplitControl;
+  TestSensorM.HalTMP175Advanced -> Sensor;
+
+  components new TimerMilliC() as Timer0;
+  TestSensorM.Timer0 -> Timer0;
+
+  components SerialActiveMessageC as AM;
+  TestSensorM.AMSend -> AM.AMSend[AM_TESTSENSORMSG];
+  TestSensorM.Packet -> AM;
+  TestSensorM.SubControl -> AM;
+}
diff --git a/tos/sensorboards/im2sb/examples/TestTmp175/TestSensorM.nc b/tos/sensorboards/im2sb/examples/TestTmp175/TestSensorM.nc
new file mode 100644
index 00000000..c06ad2c9
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestTmp175/TestSensorM.nc
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Demo application of the TI TMP175. Originally developed for the
+ * Intel Mote 2 sensorboard.
+ *
+ * @author Kaisen Lin
+ * @author Philip Buonadonna
+ */
+#include "../TestSensor.h"
+
+/* Uncomment the flag below to test the interrupt functions of the chip */
+//#define USE_INTERRUPTS
+
+module TestSensorM
+{
+  uses interface Boot;
+  
+  uses interface Timer<TMilli> as Timer0;
+
+  uses interface Read<uint16_t> as Temperature;
+  uses interface SplitControl as SubControl;
+
+  uses interface HalTMP175Advanced;
+
+  uses interface Leds;
+  uses interface AMSend;
+  uses interface Packet;
+}
+implementation
+{
+  uint8_t ledcount = 0;
+  message_t packet;
+
+  event void Boot.booted() {
+    call SubControl.start();
+  }
+
+  event void Timer0.fired() {
+    call Temperature.read();
+  }
+
+  event void SubControl.startDone(error_t result) {
+#ifdef USE_INTERRUPTS
+    call HalTMP175Advanced.setPolarity(TRUE);
+#else
+    call Timer0.startPeriodic( 100 );
+#endif
+  }
+
+  event void SubControl.stopDone(error_t result) { }
+  
+  event void Temperature.readDone(error_t result, uint16_t val) {
+    TestSensorMsg *rcm = (TestSensorMsg *)call Packet.getPayload(&packet, NULL);
+    call Leds.led0Toggle();
+
+    if (call Packet.maxPayloadLength() < sizeof(TestSensorMsg)) {
+      return;
+    }
+    rcm->value = val;
+
+    call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSensorMsg));
+
+  }
+
+  event void HalTMP175Advanced.setTHighDone(error_t error) {
+    call HalTMP175Advanced.setTLow(352);
+  }
+  event void HalTMP175Advanced.setThermostatModeDone(error_t error){
+    call HalTMP175Advanced.setTHigh(448);
+  } 
+
+  event void HalTMP175Advanced.setPolarityDone(error_t error){
+    call HalTMP175Advanced.setThermostatMode(TRUE);
+  }
+  event void HalTMP175Advanced.setFaultQueueDone(error_t error){ return; }
+  event void HalTMP175Advanced.setResolutionDone(error_t error){ return; }
+  event void HalTMP175Advanced.setTLowDone(error_t error){
+    //call Timer0.startPeriodic( 1000 );
+    call Leds.led2Toggle();
+  }
+  event void HalTMP175Advanced.alertThreshold() {
+#ifdef USE_INTERRUPTS
+    call Temperature.read();
+    call Leds.led0Toggle();
+#endif
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    return;
+  }
+
+}
diff --git a/tos/sensorboards/im2sb/examples/TestTsl2561/Makefile b/tos/sensorboards/im2sb/examples/TestTsl2561/Makefile
new file mode 100644
index 00000000..19fc8785
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestTsl2561/Makefile
@@ -0,0 +1,5 @@
+COMPONENT=TestSensorC
+
+SENSORBOARD ?= im2sb
+
+include $(MAKERULES)
\ No newline at end of file
diff --git a/tos/sensorboards/im2sb/examples/TestTsl2561/TestSensorC.nc b/tos/sensorboards/im2sb/examples/TestTsl2561/TestSensorC.nc
new file mode 100644
index 00000000..e5ac78fa
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestTsl2561/TestSensorC.nc
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Demo application of the TAOS Tsl2561. Originally developed for the
+ * Intel Mote 2 sensorboard.
+ *
+ * @author Kaisen Lin
+ * @author Philip Buonadonna
+ */
+
+configuration TestSensorC{}
+implementation {
+  components MainC, TestSensorM, LedsC;
+  components new Tsl2561C() as Sensor;
+
+  MainC.Boot <- TestSensorM;
+  TestSensorM.Leds -> LedsC;
+
+  TestSensorM.ReadBroadband -> Sensor.BroadbandPhoto;
+  TestSensorM.SubControl -> Sensor.SplitControl;
+  TestSensorM.ReadIR -> Sensor.IRPhoto;
+  TestSensorM.HalTsl2561Advanced -> Sensor;
+
+  components new TimerMilliC() as Timer0;
+  TestSensorM.Timer0 -> Timer0;
+
+  components SerialActiveMessageC as AM;
+  TestSensorM.AMSend -> AM.AMSend[AM_TESTSENSORMSG];
+  TestSensorM.Packet -> AM;
+  TestSensorM.SubControl -> AM;
+}
diff --git a/tos/sensorboards/im2sb/examples/TestTsl2561/TestSensorM.nc b/tos/sensorboards/im2sb/examples/TestTsl2561/TestSensorM.nc
new file mode 100644
index 00000000..f172d15b
--- /dev/null
+++ b/tos/sensorboards/im2sb/examples/TestTsl2561/TestSensorM.nc
@@ -0,0 +1,135 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * Demo application of the TAOS Tsl2561. Originally developed for the
+ * Intel Mote 2 sensorboard.
+ *
+ * @author Kaisen Lin
+ * @author Philip Buonadonna
+ */
+#include "../TestSensor.h"
+
+/* Uncomment the flag below to test the interrupt functions of the chip */
+//#define USE_INTERRUPTS
+
+module TestSensorM
+{
+  uses interface Boot;
+  
+  uses interface Timer<TMilli> as Timer0;
+
+  uses interface Read<uint16_t> as ReadIR;
+  uses interface Read<uint16_t> as ReadBroadband;
+  uses interface SplitControl as SubControl;
+
+  uses interface HalTsl2561Advanced;
+
+  uses interface Leds;
+  uses interface AMSend;
+  uses interface Packet;
+}
+implementation
+{
+  message_t packet;
+  uint8_t initCounter = 0;
+
+  event void Boot.booted() {
+    call SubControl.start();
+  }
+
+  event void Timer0.fired() {
+    call ReadBroadband.read();
+  }
+
+  event void SubControl.startDone(error_t result) {
+#ifndef USE_INTERRUPTS
+    call Timer0.startPeriodic( 100 );
+#else
+    call HalTsl2561Advanced.enableAlert(FALSE);
+#endif
+    return;
+  }
+
+  event void SubControl.stopDone(error_t result) { }
+  
+  event void ReadBroadband.readDone(error_t result, uint16_t val) {
+    TestSensorMsg *rcm = (TestSensorMsg *)call Packet.getPayload(&packet, NULL);
+
+    call Leds.led0Toggle();
+
+    if (call Packet.maxPayloadLength() < sizeof(TestSensorMsg)) {
+      return;
+    }
+    rcm->value = val;
+
+    call AMSend.send(AM_BROADCAST_ADDR, &packet, sizeof(TestSensorMsg));
+  }
+  
+  event void ReadIR.readDone(error_t result, uint16_t val) { }
+  
+  event void HalTsl2561Advanced.setGainDone(error_t error) { }
+  event void HalTsl2561Advanced.setIntegrationDone(error_t error) { }
+
+  event void HalTsl2561Advanced.setPersistenceDone(error_t error) {
+    call HalTsl2561Advanced.enableAlert(TRUE);
+  }
+  event void HalTsl2561Advanced.setTLowDone(error_t error) {
+    call HalTsl2561Advanced.setTHigh(7000);
+  }
+  event void HalTsl2561Advanced.setTHighDone(error_t error) { 
+    call HalTsl2561Advanced.setPersistence(1);
+  }
+  event void HalTsl2561Advanced.enableAlertDone(error_t error) {
+    switch (initCounter) {
+    case 0:
+      call HalTsl2561Advanced.setTLow(200);
+      initCounter++;
+      break;
+    case 1:
+      call Leds.set(LEDS_LED2 | LEDS_LED0);	
+      initCounter++;
+      break;
+    default:
+      break;
+    }
+  }
+
+  event void HalTsl2561Advanced.alertThreshold() {
+    call Leds.led1Toggle();
+    call HalTsl2561Advanced.enableAlert(TRUE); // Clears interrupt
+  }
+
+  event void AMSend.sendDone(message_t* bufPtr, error_t error) {
+    return;
+  }
+
+}
diff --git a/tos/sensorboards/im2sb/im2sb.h b/tos/sensorboards/im2sb/im2sb.h
new file mode 100644
index 00000000..4793cbd2
--- /dev/null
+++ b/tos/sensorboards/im2sb/im2sb.h
@@ -0,0 +1,56 @@
+/* $Id: im2sb.h,v 1.5 2008-06-11 00:42:14 razvanm Exp $ */
+/*
+ * Copyright (c) 2005 Arch Rock Corporation 
+ * All rights reserved. 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *	Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *	Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *  
+ *   Neither the name of the Arch Rock Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE ARCHED
+ * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ * DAMAGE.
+ */
+/**
+ * 
+ * @author Phil Buonadonna <pbuonadonna@archrock.com>
+ * Revision: $Revision: 1.5 $
+ *
+ */
+
+#ifndef _IM2SB_H
+#define _IM2SB_H
+
+#define GPIO_SHT11_DATA			(100)
+#define GPIO_SHT11_CLK			(98)
+
+#define GPIO_TSL2561_LIGHT_INT		(99)
+#define GPIO_MAX1363_ANALOG_INT		(99)
+
+#define GPIO_LIS3L02DQ_RDY_INT		(96)
+#define GPIO_TMP175_TEMP_ALERT		(96)
+
+#define GPIO_PWR_ADC_NSHDWN		(93)
+
+#define TSL2561_SLAVE_ADDR (0x49)
+#define TMP175_SLAVE_ADDR (0x48)
+#define MAX136_SLAVE_ADDR (0x34)
+
+#endif /* _IM2SB_H */
diff --git a/tos/sensorboards/mda100/.sensor b/tos/sensorboards/mda100/.sensor
new file mode 100644
index 00000000..e69de29b
diff --git a/tos/sensorboards/mda100/ArbitratedPhotoDeviceP.nc b/tos/sensorboards/mda100/ArbitratedPhotoDeviceP.nc
new file mode 100644
index 00000000..7668a039
--- /dev/null
+++ b/tos/sensorboards/mda100/ArbitratedPhotoDeviceP.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date August 20th, 2007
+ */
+
+configuration ArbitratedPhotoDeviceP
+{
+  provides interface Read<uint16_t>[uint8_t client];
+}
+implementation
+{
+  components PhotoImplP,
+    new ArbitratedReadC(uint16_t) as ArbitrateRead;
+
+  Read = ArbitrateRead;
+  ArbitrateRead.Service -> PhotoImplP.Read;
+  ArbitrateRead.Resource -> PhotoImplP.Resource;
+}
diff --git a/tos/sensorboards/mda100/ArbitratedTempDeviceP.nc b/tos/sensorboards/mda100/ArbitratedTempDeviceP.nc
new file mode 100644
index 00000000..2364e470
--- /dev/null
+++ b/tos/sensorboards/mda100/ArbitratedTempDeviceP.nc
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date August 20th, 2007
+ */
+
+configuration ArbitratedTempDeviceP
+{
+  provides interface Read<uint16_t>[uint8_t client];
+}
+implementation
+{
+  components TempImplP,
+    new ArbitratedReadC(uint16_t) as ArbitrateRead;
+
+  Read = ArbitrateRead;
+  ArbitrateRead.Service -> TempImplP.Read;
+  ArbitrateRead.Resource -> TempImplP.Resource;
+}
diff --git a/tos/sensorboards/mda100/DemoSensorC.nc b/tos/sensorboards/mda100/DemoSensorC.nc
new file mode 100644
index 00000000..141f1c66
--- /dev/null
+++ b/tos/sensorboards/mda100/DemoSensorC.nc
@@ -0,0 +1,23 @@
+/* $Id: DemoSensorC.nc,v 1.1 2007-08-21 04:44:09 klueska Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for basicsb sensorboard.
+ * 
+ * @author David Gay
+ */
+
+generic configuration DemoSensorC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new PhotoC() as Sensor;
+
+  Read = Sensor;
+}
diff --git a/tos/sensorboards/mda100/PhotoC.nc b/tos/sensorboards/mda100/PhotoC.nc
new file mode 100644
index 00000000..f38ea325
--- /dev/null
+++ b/tos/sensorboards/mda100/PhotoC.nc
@@ -0,0 +1,25 @@
+/* $Id: PhotoC.nc,v 1.1 2007-08-21 04:44:09 klueska Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Photodiode of the mda100 sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "mda100.h"
+
+generic configuration PhotoC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components ArbitratedPhotoDeviceP;
+
+  Read = ArbitratedPhotoDeviceP.Read[unique(UQ_MDA100_PHOTO_RESOURCE)];
+}
diff --git a/tos/sensorboards/mda100/PhotoImplP.nc b/tos/sensorboards/mda100/PhotoImplP.nc
new file mode 100644
index 00000000..d85ff7b9
--- /dev/null
+++ b/tos/sensorboards/mda100/PhotoImplP.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date August 20th, 2007
+ */
+
+#include "mda100.h"
+
+configuration PhotoImplP {
+  provides {
+    interface Resource[uint8_t];
+    interface Read<uint16_t>[uint8_t];
+  }
+}
+implementation {
+  components new SharedAnalogDeviceC(UQ_MDA100_PHOTO_RESOURCE, 10);
+  components MicaBusC;
+  components PhotoTempConfigC as PhotoConfigC;
+
+  Resource = SharedAnalogDeviceC;
+  Read = SharedAnalogDeviceC;
+  SharedAnalogDeviceC.AdcConfig -> PhotoConfigC;
+  SharedAnalogDeviceC.EnablePin -> MicaBusC.Int1;
+}
diff --git a/tos/sensorboards/mda100/PhotoTempConfigC.nc b/tos/sensorboards/mda100/PhotoTempConfigC.nc
new file mode 100644
index 00000000..82374a46
--- /dev/null
+++ b/tos/sensorboards/mda100/PhotoTempConfigC.nc
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date August 20th, 2007
+ */
+
+configuration PhotoTempConfigC {
+  provides interface Atm128AdcConfig;
+}
+implementation {
+  components PhotoTempConfigP;
+  components MicaBusC;
+  Atm128AdcConfig = PhotoTempConfigP;
+
+  PhotoTempConfigP.PhotoTempAdc -> MicaBusC.Adc1;
+}
diff --git a/tos/sensorboards/mda100/PhotoTempConfigP.nc b/tos/sensorboards/mda100/PhotoTempConfigP.nc
new file mode 100644
index 00000000..bf7eb614
--- /dev/null
+++ b/tos/sensorboards/mda100/PhotoTempConfigP.nc
@@ -0,0 +1,32 @@
+/* $Id: PhotoTempConfigP.nc,v 1.1 2007-08-21 04:44:09 klueska Exp $
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * MDA100 photo and temp sensor ADC configuration.
+ * @author David Gay <david.e.gay@intel.com>
+ */
+module PhotoTempConfigP
+{
+  provides interface Atm128AdcConfig;
+  uses interface MicaBusAdc as PhotoTempAdc;
+}
+implementation
+{
+  async command uint8_t Atm128AdcConfig.getChannel() {
+    return call PhotoTempAdc.getChannel();
+  }
+
+  async command uint8_t Atm128AdcConfig.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t Atm128AdcConfig.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+}
diff --git a/tos/sensorboards/mda100/SharedAnalogDeviceC.nc b/tos/sensorboards/mda100/SharedAnalogDeviceC.nc
new file mode 100644
index 00000000..92e224b6
--- /dev/null
+++ b/tos/sensorboards/mda100/SharedAnalogDeviceC.nc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date August 20th, 2007
+ */
+
+generic configuration SharedAnalogDeviceC(char resourceName[], uint32_t startup_delay) {
+  provides {
+    interface Resource[uint8_t];
+    interface Read<uint16_t>[uint8_t];
+  }
+  uses {
+    interface Atm128AdcConfig as AdcConfig;
+    interface GeneralIO as EnablePin;
+  } 
+}
+implementation {
+  components new RoundRobinArbiterC(resourceName) as Arbiter;
+  components new SplitControlPowerManagerC() as PowerManager;
+  components new SharedAnalogDeviceP(startup_delay) as AnalogDevice;
+  components new AdcReadNowClientC() as Adc;
+  components new TimerMilliC();
+  Resource = Arbiter;
+  Read = AnalogDevice;
+
+  PowerManager.ArbiterInfo -> Arbiter;
+  PowerManager.SplitControl -> AnalogDevice;
+  PowerManager.ResourceDefaultOwner -> Arbiter;
+  AnalogDevice.ActualRead -> Adc;
+  AnalogDevice.Timer -> TimerMilliC;
+  AnalogDevice.AnalogDeviceResource -> Adc;
+
+  Adc.Atm128AdcConfig = AdcConfig;
+  AnalogDevice.EnablePin = EnablePin;
+}
diff --git a/tos/sensorboards/mda100/SharedAnalogDeviceP.nc b/tos/sensorboards/mda100/SharedAnalogDeviceP.nc
new file mode 100644
index 00000000..d6d017d0
--- /dev/null
+++ b/tos/sensorboards/mda100/SharedAnalogDeviceP.nc
@@ -0,0 +1,118 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date August 20th, 2007
+ */
+
+generic module SharedAnalogDeviceP(uint32_t startup_delay) {
+  provides {
+    interface SplitControl;
+    interface Read<uint16_t>[uint8_t];
+  }
+  uses {
+    interface Resource as AnalogDeviceResource;
+    interface Timer<TMilli>;
+    interface GeneralIO as EnablePin;
+    interface ReadNow<uint16_t> as ActualRead;
+  }
+}
+implementation {
+  bool started = FALSE;
+  bool busy = FALSE;
+  uint8_t client_id;
+  norace error_t read_result;
+  norace uint16_t read_val;
+	
+  command error_t SplitControl.start() {
+    error_t error;
+    if(started == FALSE) {
+      error = call AnalogDeviceResource.request();
+      if(error == SUCCESS)
+        started = TRUE;
+      return error;
+    }
+    return FAIL;
+  }
+
+  event void AnalogDeviceResource.granted() {
+    call EnablePin.makeOutput();
+    call EnablePin.set();
+    call Timer.startOneShot(startup_delay);
+  }
+
+  event void Timer.fired() {
+    signal SplitControl.startDone(SUCCESS);
+  }
+
+  task void stopDone() {
+    call AnalogDeviceResource.release();
+    started = FALSE;
+    signal SplitControl.stopDone(SUCCESS);
+  }
+
+  command error_t SplitControl.stop() {
+    if(started == TRUE) {
+      call EnablePin.clr();
+      call EnablePin.makeInput();
+      post stopDone();
+      return SUCCESS;
+    }
+    else if(busy == TRUE)
+      return EBUSY;
+    return FAIL;
+  }
+
+  command error_t Read.read[uint8_t id]() {
+    error_t error;
+    if(call AnalogDeviceResource.isOwner() && busy == FALSE) {
+      error = call ActualRead.read();
+      if(error == SUCCESS) {
+        busy = TRUE;
+        client_id = id; 
+      }
+      return error;
+    }
+    return FAIL;
+  }
+
+  task void readDoneTask() {
+    busy = FALSE;
+    signal Read.readDone[client_id](read_result, read_val);
+  }
+
+  async event void ActualRead.readDone(error_t result, uint16_t val) {
+    read_result = result;
+    read_val = val;
+    post readDoneTask();
+  }
+}
diff --git a/tos/sensorboards/mda100/TempC.nc b/tos/sensorboards/mda100/TempC.nc
new file mode 100644
index 00000000..d807a904
--- /dev/null
+++ b/tos/sensorboards/mda100/TempC.nc
@@ -0,0 +1,25 @@
+/* $Id: TempC.nc,v 1.2 2008-06-11 00:42:15 razvanm Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Photodiode of the mda100 sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "mda100.h"
+
+generic configuration TempC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components ArbitratedTempDeviceP;
+
+  Read = ArbitratedTempDeviceP.Read[unique(UQ_MDA100_TEMP_RESOURCE)];
+}
diff --git a/tos/sensorboards/mda100/ca/TempImplP.nc b/tos/sensorboards/mda100/ca/TempImplP.nc
new file mode 100644
index 00000000..94a1494a
--- /dev/null
+++ b/tos/sensorboards/mda100/ca/TempImplP.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date August 20th, 2007
+ */
+
+#include "mda100.h"
+
+configuration TempImplP {
+  provides {
+    interface Resource[uint8_t];
+    interface Read<uint16_t>[uint8_t];
+  }
+}
+implementation {
+  components new SharedAnalogDeviceC(UQ_MDA100_TEMP_RESOURCE, 10);
+  components MicaBusC;
+  components PhotoTempConfigC as TempConfigC;
+
+  Resource = SharedAnalogDeviceC;
+  Read = SharedAnalogDeviceC;
+  SharedAnalogDeviceC.AdcConfig -> TempConfigC;
+  SharedAnalogDeviceC.EnablePin -> MicaBusC.Int2;
+}
diff --git a/tos/sensorboards/mda100/cb/TempImplP.nc b/tos/sensorboards/mda100/cb/TempImplP.nc
new file mode 100644
index 00000000..588a3292
--- /dev/null
+++ b/tos/sensorboards/mda100/cb/TempImplP.nc
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date August 20th, 2007
+ */
+
+#include "mda100.h"
+
+configuration TempImplP {
+  provides {
+    interface Resource[uint8_t];
+    interface Read<uint16_t>[uint8_t];
+  }
+}
+implementation {
+  components new SharedAnalogDeviceC(UQ_MDA100_TEMP_RESOURCE, 10);
+  components MicaBusC;
+  components PhotoTempConfigC as TempConfigC;
+
+  Resource = SharedAnalogDeviceC;
+  Read = SharedAnalogDeviceC;
+  SharedAnalogDeviceC.AdcConfig -> TempConfigC;
+  SharedAnalogDeviceC.EnablePin -> MicaBusC.PW0;
+}
diff --git a/tos/sensorboards/mda100/mda100.h b/tos/sensorboards/mda100/mda100.h
new file mode 100644
index 00000000..50e690d3
--- /dev/null
+++ b/tos/sensorboards/mda100/mda100.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2007 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Kevin Klues <klueska@cs.stanford.edu>
+ * @date August 20th, 2007
+ */
+
+#ifndef _MDA100_H
+#define _MDA100_H
+
+#define UQ_MDA100_PHOTO_RESOURCE "mda100.photo"
+#define UQ_MDA100_TEMP_RESOURCE "mda100.temp"
+
+#endif /* _MDA100_H */
+
diff --git a/tos/sensorboards/mts300/.sensor b/tos/sensorboards/mts300/.sensor
new file mode 100644
index 00000000..6f5f0c82
--- /dev/null
+++ b/tos/sensorboards/mts300/.sensor
@@ -0,0 +1,6 @@
+#
+# The MTS300 board does not have an external pullup resistor on the I2C
+# lines, so we need to enable the internal pullup resistor on the MCU.
+#
+
+push @new_args, "-DATM128_I2C_EXTERNAL_PULLDOWN=1";
diff --git a/tos/sensorboards/mts300/AccelConfigP.nc b/tos/sensorboards/mts300/AccelConfigP.nc
new file mode 100644
index 00000000..7db5e31c
--- /dev/null
+++ b/tos/sensorboards/mts300/AccelConfigP.nc
@@ -0,0 +1,41 @@
+/* $Id: AccelConfigP.nc,v 1.3 2007-03-14 03:25:05 pipeng Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal component for basicsb photodiode. Arbitrates access to the photo
+ * diode and automatically turns it on or off based on user requests.
+ * 
+ * @author David Gay
+ */
+
+configuration AccelConfigP { 
+  provides {
+    interface Resource[uint8_t client];
+    interface Atm128AdcConfig as ConfigX;
+    interface Atm128AdcConfig as ConfigY;
+  }
+}
+implementation {
+  components AccelP, MicaBusC, new TimerMilliC() as WarmupTimer,
+    new RoundRobinArbiterC(UQ_ACCEL_RESOURCE) as Arbiter,
+    new SplitControlPowerManagerC() as PowerManager;
+
+  Resource = Arbiter;
+  ConfigX = AccelP.ConfigX;
+  ConfigY = AccelP.ConfigY;
+
+  PowerManager.ResourceDefaultOwner -> Arbiter;
+  PowerManager.ArbiterInfo -> Arbiter;
+  PowerManager.SplitControl -> AccelP;
+
+  AccelP.Timer -> WarmupTimer;
+  AccelP.AccelPin -> MicaBusC.PW4;
+  AccelP.AccelAdcX -> MicaBusC.Adc3;
+  AccelP.AccelAdcY -> MicaBusC.Adc4;
+}
diff --git a/tos/sensorboards/mts300/AccelP.nc b/tos/sensorboards/mts300/AccelP.nc
new file mode 100644
index 00000000..449a3797
--- /dev/null
+++ b/tos/sensorboards/mts300/AccelP.nc
@@ -0,0 +1,76 @@
+/* $Id: AccelP.nc,v 1.3 2007-03-14 03:25:05 pipeng Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * ADXL202JE accelerometer ADC configuration and power management.
+ * @author David Gay <david.e.gay@intel.com>
+ */
+module AccelP
+{
+  provides {
+    interface SplitControl;
+    interface Atm128AdcConfig as ConfigX;
+    interface Atm128AdcConfig as ConfigY;
+  }
+  uses {
+    interface Timer<TMilli>;
+    interface GeneralIO as AccelPin;
+    interface MicaBusAdc as AccelAdcX;
+    interface MicaBusAdc as AccelAdcY;
+  }
+}
+implementation
+{
+  async command uint8_t ConfigX.getChannel() {
+    return call AccelAdcX.getChannel();
+  }
+
+  async command uint8_t ConfigX.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t ConfigX.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+
+  async command uint8_t ConfigY.getChannel() {
+    return call AccelAdcY.getChannel();
+  }
+
+  async command uint8_t ConfigY.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t ConfigY.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+
+  command error_t SplitControl.start() {
+    call AccelPin.makeOutput();
+    call AccelPin.set();
+    /* Startup time is 16.3ms for 0.1uF capacitors,
+       according to the ADXL202E data sheet */
+    call Timer.startOneShot(17); 
+    return SUCCESS;
+  }
+
+  event void Timer.fired() {
+    signal SplitControl.startDone(SUCCESS);
+  }
+
+  task void stopDone() {
+    call AccelPin.clr();
+    signal SplitControl.stopDone(SUCCESS);
+  }
+
+  command error_t SplitControl.stop() {
+    post stopDone();
+    return SUCCESS;
+  }
+}
diff --git a/tos/sensorboards/mts300/AccelReadP.nc b/tos/sensorboards/mts300/AccelReadP.nc
new file mode 100644
index 00000000..7d735854
--- /dev/null
+++ b/tos/sensorboards/mts300/AccelReadP.nc
@@ -0,0 +1,34 @@
+configuration AccelReadP
+{
+  provides 
+  {
+    interface Read<uint16_t> as ReadX[uint8_t client];
+    interface Read<uint16_t> as ReadY[uint8_t client];
+  }
+  uses
+  {
+    interface Read<uint16_t> as ActualX[uint8_t client];
+    interface Read<uint16_t> as ActualY[uint8_t client];
+  }
+}
+implementation
+{
+  components AccelConfigP,
+//    new MultiplexedReadC(uint16_t) as MultiplexX,
+//    new MultiplexedReadC(uint16_t) as MultiplexY,
+    new ArbitratedReadC(uint16_t) as MultiplexX,
+    new ArbitratedReadC(uint16_t) as MultiplexY;
+//    new AdcReadClientC() as AdcX,
+//    new AdcReadClientC() as AdcY;
+
+  ReadX = MultiplexX;
+  MultiplexX.Resource -> AccelConfigP;
+  MultiplexX.Service = ActualX;
+  //AdcX.Atm128AdcConfig -> AccelConfigP.ConfigX;
+
+  ReadY = MultiplexY;
+  MultiplexY.Resource -> AccelConfigP;
+  MultiplexY.Service = ActualY;
+  //AdcY.Atm128AdcConfig -> AccelConfigP.ConfigY;
+}
+
diff --git a/tos/sensorboards/mts300/AccelReadStreamP.nc b/tos/sensorboards/mts300/AccelReadStreamP.nc
new file mode 100644
index 00000000..3db96e83
--- /dev/null
+++ b/tos/sensorboards/mts300/AccelReadStreamP.nc
@@ -0,0 +1,29 @@
+configuration AccelReadStreamP
+{
+  provides {
+    interface ReadStream<uint16_t> as ReadStreamX[uint8_t client];
+    interface ReadStream<uint16_t> as ReadStreamY[uint8_t client];
+  }
+  uses {
+    interface ReadStream<uint16_t> as ActualX[uint8_t client];
+    interface ReadStream<uint16_t> as ActualY[uint8_t client];
+  }
+}
+implementation
+{
+  enum {
+    NACCEL_CLIENTS = uniqueCount(UQ_ACCEL_RESOURCE)
+  };
+  components AccelConfigP,
+    new ArbitratedReadStreamC(NACCEL_CLIENTS, uint16_t) as MultiplexX,
+    new ArbitratedReadStreamC(NACCEL_CLIENTS, uint16_t) as MultiplexY;
+
+  ReadStreamX = MultiplexX;
+  MultiplexX.Resource -> AccelConfigP;
+  MultiplexX.Service = ActualX;
+
+  ReadStreamY = MultiplexY;
+  MultiplexY.Resource -> AccelConfigP;
+  MultiplexY.Service = ActualY;
+}
+
diff --git a/tos/sensorboards/mts300/AccelXC.nc b/tos/sensorboards/mts300/AccelXC.nc
new file mode 100644
index 00000000..3df648c4
--- /dev/null
+++ b/tos/sensorboards/mts300/AccelXC.nc
@@ -0,0 +1,33 @@
+/* $Id: AccelXC.nc,v 1.3 2007-03-14 04:57:35 pipeng Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Acceldiode of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "mts300.h"
+
+generic configuration AccelXC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation {
+  enum {
+    ID = unique(UQ_ACCEL_RESOURCE)
+  };
+  
+  components AccelReadP,AccelConfigP, new AdcReadClientC() as AdcX;
+
+  Read = AccelReadP.ReadX[ID];
+  AccelReadP.ActualX[ID] -> AdcX;
+  AdcX.Atm128AdcConfig -> AccelConfigP.ConfigX;
+}
+
diff --git a/tos/sensorboards/mts300/AccelXStreamC.nc b/tos/sensorboards/mts300/AccelXStreamC.nc
new file mode 100644
index 00000000..2c2d82dd
--- /dev/null
+++ b/tos/sensorboards/mts300/AccelXStreamC.nc
@@ -0,0 +1,30 @@
+/* $Id: AccelXStreamC.nc,v 1.3 2007-03-14 04:57:35 pipeng Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * AccelXdiode of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "mts300.h"
+
+generic configuration AccelXStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  enum {
+    ID = unique(UQ_ACCEL_RESOURCE)
+  };
+  components AccelReadStreamP, AccelConfigP, new AdcReadStreamClientC();
+
+  ReadStream = AccelReadStreamP.ReadStreamX[ID];
+  AccelReadStreamP.ActualX[ID] -> AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> AccelConfigP.ConfigX;
+}
diff --git a/tos/sensorboards/mts300/AccelYC.nc b/tos/sensorboards/mts300/AccelYC.nc
new file mode 100644
index 00000000..a015f39b
--- /dev/null
+++ b/tos/sensorboards/mts300/AccelYC.nc
@@ -0,0 +1,32 @@
+/* $Id: AccelYC.nc,v 1.3 2007-03-14 04:57:35 pipeng Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Acceldiode of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "mts300.h"
+
+generic configuration AccelYC()
+{
+  provides interface Read<uint16_t>;
+}
+implementation {
+  enum {
+    ID = unique(UQ_ACCEL_RESOURCE)
+  };
+  
+  components AccelReadP,AccelConfigP, new AdcReadClientC() as AdcY;
+
+  Read = AccelReadP.ReadY[ID];
+  AccelReadP.ActualY[ID] -> AdcY;
+  AdcY.Atm128AdcConfig -> AccelConfigP.ConfigY;
+}
\ No newline at end of file
diff --git a/tos/sensorboards/mts300/AccelYStreamC.nc b/tos/sensorboards/mts300/AccelYStreamC.nc
new file mode 100644
index 00000000..cca51fc2
--- /dev/null
+++ b/tos/sensorboards/mts300/AccelYStreamC.nc
@@ -0,0 +1,30 @@
+/* $Id: AccelYStreamC.nc,v 1.3 2007-03-14 04:57:35 pipeng Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * AccelXdiode of the basicsb sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "mts300.h"
+
+generic configuration AccelYStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  enum {
+    ID = unique(UQ_ACCEL_RESOURCE)
+  };
+  components AccelReadStreamP, AccelConfigP, new AdcReadStreamClientC();
+
+  ReadStream = AccelReadStreamP.ReadStreamY[ID];
+  AccelReadStreamP.ActualY[ID] -> AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> AccelConfigP.ConfigY;
+}
diff --git a/tos/sensorboards/mts300/ArbitratedPhotoDeviceP.nc b/tos/sensorboards/mts300/ArbitratedPhotoDeviceP.nc
new file mode 100644
index 00000000..d0c7f8ac
--- /dev/null
+++ b/tos/sensorboards/mts300/ArbitratedPhotoDeviceP.nc
@@ -0,0 +1,13 @@
+configuration ArbitratedPhotoDeviceP
+{
+  provides interface Read<uint16_t>[uint8_t client];
+}
+implementation
+{
+  components PhotoTempDeviceC,
+    new ArbitratedReadC(uint16_t) as ArbitrateRead;
+
+  Read = ArbitrateRead;
+  ArbitrateRead.Service -> PhotoTempDeviceC.ReadPhoto;
+  ArbitrateRead.Resource -> PhotoTempDeviceC.PhotoResource;
+}
diff --git a/tos/sensorboards/mts300/ArbitratedTempDeviceP.nc b/tos/sensorboards/mts300/ArbitratedTempDeviceP.nc
new file mode 100644
index 00000000..4c62f813
--- /dev/null
+++ b/tos/sensorboards/mts300/ArbitratedTempDeviceP.nc
@@ -0,0 +1,13 @@
+configuration ArbitratedTempDeviceP
+{
+  provides interface Read<uint16_t>[uint8_t client];
+}
+implementation
+{
+  components PhotoTempDeviceC,
+    new ArbitratedReadC(uint16_t) as ArbitrateRead;
+
+  Read = ArbitrateRead;
+  ArbitrateRead.Service -> PhotoTempDeviceC.ReadTemp;
+  ArbitrateRead.Resource -> PhotoTempDeviceC.TempResource;
+}
diff --git a/tos/sensorboards/mts300/DemoSensorC.nc b/tos/sensorboards/mts300/DemoSensorC.nc
new file mode 100644
index 00000000..900e46b2
--- /dev/null
+++ b/tos/sensorboards/mts300/DemoSensorC.nc
@@ -0,0 +1,23 @@
+/* $Id: DemoSensorC.nc,v 1.3 2007-04-18 20:56:53 idgay Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for basicsb sensorboard.
+ * 
+ * @author David Gay
+ */
+
+generic configuration DemoSensorC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components new PhotoC() as Sensor;
+
+  Read = Sensor;
+}
diff --git a/tos/sensorboards/mts300/DemoSensorStreamC.nc b/tos/sensorboards/mts300/DemoSensorStreamC.nc
new file mode 100644
index 00000000..7799c040
--- /dev/null
+++ b/tos/sensorboards/mts300/DemoSensorStreamC.nc
@@ -0,0 +1,23 @@
+/* $Id: DemoSensorStreamC.nc,v 1.3 2007-04-18 20:56:54 idgay Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Demo sensor for basicsb sensorboard.
+ * 
+ * @author David Gay
+ */
+
+generic configuration DemoSensorStreamC() {
+  provides interface ReadStream<uint16_t>;
+}
+implementation {
+  components new PhotoStreamC() as SensorStream;
+
+  ReadStream = SensorStream;
+}
diff --git a/tos/sensorboards/mts300/Mag.nc b/tos/sensorboards/mts300/Mag.nc
new file mode 100644
index 00000000..d49dc57f
--- /dev/null
+++ b/tos/sensorboards/mts300/Mag.nc
@@ -0,0 +1,80 @@
+// $Id: Mag.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * Authors:             Alec Woo
+ * Date lase modified:  8/20/02
+ *
+ * The MagSetting inteface provides an asynchronous mechanism for
+ * setting the gain offset for the Magnetometer on the mica sensorboard.
+ * This is particularly useful in calibrating the offset of the Magnetometer
+ * such that X and Y axis can stay in the center for idle signals.  
+ * If not calibrated, the data you get may rail.  (railing means
+ * the data either stays at the maximum (~785) or minimum (~240)). 
+ *
+ * The gain adjust has 256 steps ranging from 0 to 255.
+ *
+ */
+
+/**
+ * @author Alec Woo
+ */
+
+interface Mag {
+  /* Effects:  adjust pot setting on the X axis of the magnetometer.
+   * Returns:  return SUCCESS of FAILED.
+   */
+  command error_t gainAdjustX(uint8_t val);
+
+  /* Effects:  adjust pot setting on the Y axis of the magnetometer.
+   * Returns:  return SUCCESS of FAILED.
+   */
+  command error_t gainAdjustY(uint8_t val);
+
+  /* Pot adjustment on the X axis of the magnetometer is finished.
+   */
+  event void gainAdjustXDone(error_t result);
+
+  /* Pot adjustment on the Y axis of the magnetometer is finished.
+   */
+  event void gainAdjustYDone(error_t result);
+}
diff --git a/tos/sensorboards/mts300/MagConfigP.nc b/tos/sensorboards/mts300/MagConfigP.nc
new file mode 100644
index 00000000..630f67df
--- /dev/null
+++ b/tos/sensorboards/mts300/MagConfigP.nc
@@ -0,0 +1,51 @@
+/* $Id: MagConfigP.nc,v 1.4 2008-06-11 00:42:14 razvanm Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Internal component for basicsb photodiode. Arbitrates access to the photo
+ * diode and automatically turns it on or off based on user requests.
+ *
+ * @author Alif Chen
+ */
+
+#include "mts300.h"
+#include "I2C.h"
+
+configuration MagConfigP {
+  provides {
+    interface Mag;
+    interface Resource[uint8_t client];
+    interface Atm128AdcConfig as ConfigX;
+    interface Atm128AdcConfig as ConfigY;
+  }
+}
+implementation {
+  components MagP, MicaBusC, new Atm128I2CMasterC() as I2CPot,
+		new TimerMilliC() as WarmupTimer,
+    new RoundRobinArbiterC(UQ_MAG_RESOURCE) as Arbiter,
+    new SplitControlPowerManagerC() as PowerManager;
+
+	Mag = MagP;
+
+  Resource = Arbiter;
+  ConfigX = MagP.ConfigX;
+  ConfigY = MagP.ConfigY;
+
+  PowerManager.ResourceDefaultOwner -> Arbiter;
+  PowerManager.ArbiterInfo -> Arbiter;
+  PowerManager.SplitControl -> MagP;
+
+  MagP.I2CPacket -> I2CPot;
+  MagP.I2CResource -> I2CPot;
+
+  MagP.Timer -> WarmupTimer;
+  MagP.MagPower -> MicaBusC.PW5;
+  MagP.MagAdcX -> MicaBusC.Adc6;
+  MagP.MagAdcY -> MicaBusC.Adc5;
+}
diff --git a/tos/sensorboards/mts300/MagP.nc b/tos/sensorboards/mts300/MagP.nc
new file mode 100644
index 00000000..a3879d2d
--- /dev/null
+++ b/tos/sensorboards/mts300/MagP.nc
@@ -0,0 +1,122 @@
+#include "mts300.h"
+#include "Timer.h"
+#include "I2C.h"
+
+module MagP
+{
+  provides interface SplitControl;
+  provides interface Mag;
+  provides interface Atm128AdcConfig as ConfigX;
+  provides interface Atm128AdcConfig as ConfigY;
+
+  uses interface Timer<TMilli>;
+	uses interface GeneralIO as MagPower;
+	uses interface MicaBusAdc as MagAdcX;
+	uses interface MicaBusAdc as MagAdcY;
+  uses interface I2CPacket<TI2CBasicAddr>;
+  uses interface Resource as I2CResource;
+}
+
+implementation
+{
+  norace uint8_t gainData[2];
+
+  command error_t SplitControl.start()
+  {
+    call MagPower.makeOutput();
+    call MagPower.set();
+
+    call Timer.startOneShot(100); 
+    return SUCCESS;
+  }
+
+  event void Timer.fired() {
+    signal SplitControl.startDone(SUCCESS);
+  }
+
+  command error_t SplitControl.stop()
+  {
+    call MagPower.clr();
+    call MagPower.makeInput();
+
+    signal SplitControl.stopDone(SUCCESS);
+    return SUCCESS;
+  }
+
+  command error_t Mag.gainAdjustX(uint8_t val)
+  {
+    gainData[0] = 1;    // pot subaddr
+    gainData[1] = val;  // value to write
+    return call I2CResource.request();
+  }
+  command error_t Mag.gainAdjustY(uint8_t val)
+  {
+    gainData[0] = 0;    // pot subaddr
+    gainData[1] = val;  // value to write
+    return call I2CResource.request();
+  }
+  /**
+  * Resource request
+  *
+  */
+  event void I2CResource.granted()
+  {
+    if ( call I2CPacket.write(0x3,TOS_MAG_POT_ADDR, 2, gainData) == SUCCESS)
+    {
+      return ;
+    }
+  }
+  /**
+  * I2CPot2
+  *
+  */
+  async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
+  {
+    return ;
+  }
+
+  task void signalAdjustDone()
+  {
+    if (gainData[0] == 1)
+      signal Mag.gainAdjustXDone(gainData[1]);
+    else
+      signal Mag.gainAdjustYDone(gainData[1]);
+  }
+
+  async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
+  {
+    call I2CResource.release();
+
+    gainData[1] = error;
+    post signalAdjustDone();
+
+    return;
+  }
+
+  async command uint8_t ConfigX.getChannel() {
+    return call MagAdcX.getChannel();
+  }
+
+  async command uint8_t ConfigX.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t ConfigX.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+
+  async command uint8_t ConfigY.getChannel() {
+    return call MagAdcY.getChannel();
+  }
+
+  async command uint8_t ConfigY.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t ConfigY.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+
+   default event void Mag.gainAdjustXDone(error_t result) { }
+   default event void Mag.gainAdjustYDone(error_t result) { }
+}
\ No newline at end of file
diff --git a/tos/sensorboards/mts300/MagReadP.nc b/tos/sensorboards/mts300/MagReadP.nc
new file mode 100644
index 00000000..deece166
--- /dev/null
+++ b/tos/sensorboards/mts300/MagReadP.nc
@@ -0,0 +1,73 @@
+// $Id: MagReadP.nc,v 1.4 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#include "mts300.h"
+
+configuration MagReadP 
+{
+  provides 
+  {
+    interface Mag;
+    interface Read<uint16_t> as MagX[uint8_t client];
+    interface Read<uint16_t> as MagY[uint8_t client];
+  }
+  uses
+  {
+    interface Read<uint16_t> as ActualX[uint8_t client];
+    interface Read<uint16_t> as ActualY[uint8_t client];
+  }
+}
+implementation
+{
+  components MagConfigP,
+    new ArbitratedReadC(uint16_t) as AdcX,
+    new ArbitratedReadC(uint16_t) as AdcY;
+
+  Mag = MagConfigP;
+
+  MagX = AdcX;
+  AdcX.Resource -> MagConfigP;
+  AdcX.Service = ActualX;
+
+  MagY = AdcY;
+  AdcY.Resource -> MagConfigP;
+  AdcY.Service = ActualY;
+}
diff --git a/tos/sensorboards/mts300/MagReadStreamP.nc b/tos/sensorboards/mts300/MagReadStreamP.nc
new file mode 100644
index 00000000..a501a3c3
--- /dev/null
+++ b/tos/sensorboards/mts300/MagReadStreamP.nc
@@ -0,0 +1,74 @@
+// $Id: MagReadStreamP.nc,v 1.4 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+#include "mts300.h"
+
+configuration MagReadStreamP
+{
+  provides {
+    interface Mag;
+    interface ReadStream<uint16_t> as ReadStreamX[uint8_t client];
+    interface ReadStream<uint16_t> as ReadStreamY[uint8_t client];
+  }
+  uses {
+    interface ReadStream<uint16_t> as ActualX[uint8_t client];
+    interface ReadStream<uint16_t> as ActualY[uint8_t client];
+  }
+}
+implementation
+{
+  enum {
+    NMAG_CLIENTS = uniqueCount(UQ_MAG_RESOURCE)
+  };
+  components MagConfigP,
+    new ArbitratedReadStreamC(NMAG_CLIENTS, uint16_t) as MultiplexX,
+    new ArbitratedReadStreamC(NMAG_CLIENTS, uint16_t) as MultiplexY;
+
+  Mag = MagConfigP;
+
+  ReadStreamX = MultiplexX;
+  MultiplexX.Resource -> MagConfigP;
+  MultiplexX.Service = ActualX;
+
+  ReadStreamY = MultiplexY;
+  MultiplexY.Resource -> MagConfigP;
+  MultiplexY.Service = ActualY;
+}
\ No newline at end of file
diff --git a/tos/sensorboards/mts300/MagXC.nc b/tos/sensorboards/mts300/MagXC.nc
new file mode 100644
index 00000000..6d9ad0c5
--- /dev/null
+++ b/tos/sensorboards/mts300/MagXC.nc
@@ -0,0 +1,34 @@
+/* $Id: MagXC.nc,v 1.2 2008-06-11 00:42:14 razvanm Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * @author Alif Chen
+ */
+
+#include "mts300.h"
+
+generic configuration MagXC()
+{
+  provides interface Mag;
+  provides interface Read<uint16_t>;
+}
+implementation {
+  enum {
+    ID = unique(UQ_MAG_RESOURCE)
+  };
+  
+  components MagReadP,MagConfigP, new AdcReadClientC() as AdcX;
+
+  Mag = MagReadP;
+
+  Read = MagReadP.MagX[ID];
+  MagReadP.ActualX[ID] -> AdcX;
+  AdcX.Atm128AdcConfig -> MagConfigP.ConfigX;
+}
+
diff --git a/tos/sensorboards/mts300/MagXStreamC.nc b/tos/sensorboards/mts300/MagXStreamC.nc
new file mode 100644
index 00000000..1af223af
--- /dev/null
+++ b/tos/sensorboards/mts300/MagXStreamC.nc
@@ -0,0 +1,32 @@
+/* $Id: MagXStreamC.nc,v 1.2 2008-06-11 00:42:14 razvanm Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * 
+ * @author Alif Chen
+ */
+
+#include "mts300.h"
+
+generic configuration MagXStreamC() {
+  provides interface ReadStream<uint16_t>;
+  provides interface Mag;
+}
+implementation {
+  enum {
+    ID = unique(UQ_ACCEL_RESOURCE)
+  };
+  components MagReadStreamP, MagConfigP, new AdcReadStreamClientC();
+
+  Mag = MagReadStreamP;
+
+  ReadStream = MagReadStreamP.ReadStreamX[ID];
+  MagReadStreamP.ActualX[ID] -> AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> MagConfigP.ConfigX;
+}
diff --git a/tos/sensorboards/mts300/MagYC.nc b/tos/sensorboards/mts300/MagYC.nc
new file mode 100644
index 00000000..8f411511
--- /dev/null
+++ b/tos/sensorboards/mts300/MagYC.nc
@@ -0,0 +1,34 @@
+/* $Id: MagYC.nc,v 1.2 2008-06-11 00:42:15 razvanm Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * @author Alif Chen
+ */
+
+#include "mts300.h"
+
+generic configuration MagYC()
+{
+  provides interface Mag;
+  provides interface Read<uint16_t>;
+}
+implementation {
+  enum {
+    ID = unique(UQ_MAG_RESOURCE)
+  };
+  
+  components MagReadP,MagConfigP, new AdcReadClientC() as AdcY;
+
+  Mag = MagReadP;
+
+  Read = MagReadP.MagY[ID];
+  MagReadP.ActualY[ID] -> AdcY;
+  AdcY.Atm128AdcConfig -> MagConfigP.ConfigY;
+}
+
diff --git a/tos/sensorboards/mts300/MagYStreamC.nc b/tos/sensorboards/mts300/MagYStreamC.nc
new file mode 100644
index 00000000..e752172e
--- /dev/null
+++ b/tos/sensorboards/mts300/MagYStreamC.nc
@@ -0,0 +1,31 @@
+/* $Id: MagYStreamC.nc,v 1.2 2008-06-11 00:42:14 razvanm Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * @author Alif Chen
+ */
+
+#include "mts300.h"
+
+generic configuration MagYStreamC() {
+  provides interface ReadStream<uint16_t>;
+  provides interface Mag;
+}
+implementation {
+  enum {
+    ID = unique(UQ_ACCEL_RESOURCE)
+  };
+  components MagReadStreamP, MagConfigP, new AdcReadStreamClientC();
+
+  Mag = MagReadStreamP;
+
+  ReadStream = MagReadStreamP.ReadStreamY[ID];
+  MagReadStreamP.ActualY[ID] -> AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> MagConfigP.ConfigY;
+}
diff --git a/tos/sensorboards/mts300/MicC.nc b/tos/sensorboards/mts300/MicC.nc
new file mode 100644
index 00000000..33349c2d
--- /dev/null
+++ b/tos/sensorboards/mts300/MicC.nc
@@ -0,0 +1,54 @@
+/**
+ *  Copyright (c) 2005-2006 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /*
+ *  @author Hu Siquan <husq@xbow.com>
+ *
+ *  $Id: MicC.nc,v 1.4 2010-06-29 22:07:56 scipio Exp $
+ */
+
+#include "mts300.h"
+
+generic configuration MicC() {
+  provides interface Read<uint16_t>;
+  provides interface MicSetting;
+}
+implementation {
+  enum {
+    ID = unique(UQ_MIC_RESOURCE)
+  };
+  components MicReadP, MicDeviceP, new AdcReadClientC();
+
+  Read = MicReadP.Read[ID];
+  MicReadP.ActualRead[ID] -> AdcReadClientC;
+  AdcReadClientC.Atm128AdcConfig -> MicDeviceP.Atm128AdcConfig;
+  MicSetting = MicDeviceP;
+}
diff --git a/tos/sensorboards/mts300/MicDeviceP.nc b/tos/sensorboards/mts300/MicDeviceP.nc
new file mode 100644
index 00000000..9c53892f
--- /dev/null
+++ b/tos/sensorboards/mts300/MicDeviceP.nc
@@ -0,0 +1,69 @@
+/**
+ *  Copyright (c) 2005-2006 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Hu Siquan <husq@xbow.com>
+ *
+ *  $Id: MicDeviceP.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
+ */
+
+#include "mts300.h"
+#include "I2C.h"
+configuration MicDeviceP {
+  provides {
+    interface Resource[uint8_t client];
+    interface Atm128AdcConfig;
+    interface MicSetting;
+  }
+}
+implementation {
+  components MicP, MicaBusC, HplAtm128GeneralIOC as Pins,
+    HplAtm128InterruptC as IntPins,
+    new Atm128I2CMasterC() as I2CPot,
+    new TimerMilliC() as WarmupTimer,
+    new RoundRobinArbiterC(UQ_MIC_RESOURCE) as Arbiter,
+    new SplitControlPowerManagerC() as PowerManager;
+
+  Resource = Arbiter;
+  Atm128AdcConfig = MicP;
+  MicSetting = MicP;
+	
+  PowerManager.ResourceDefaultOwner -> Arbiter;
+  PowerManager.ArbiterInfo -> Arbiter;
+  PowerManager.SplitControl -> MicP;
+
+  MicP.Timer -> WarmupTimer;
+  MicP.MicPower  -> MicaBusC.PW3;
+  MicP.MicMuxSel -> MicaBusC.PW6;
+  MicP.MicAdc -> MicaBusC.Adc2;
+  MicP.I2CPacket -> I2CPot;
+  MicP.I2CResource -> I2CPot;
+  MicP.AlertInterrupt -> IntPins.Int7;
+}
diff --git a/tos/sensorboards/mts300/MicP.nc b/tos/sensorboards/mts300/MicP.nc
new file mode 100644
index 00000000..4b95201e
--- /dev/null
+++ b/tos/sensorboards/mts300/MicP.nc
@@ -0,0 +1,191 @@
+/**
+ *  Copyright (c) 2005-2006 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Hu Siquan <husq@xbow.com> 
+ *
+ *  $Id: MicP.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
+ */
+
+#include "Timer.h"
+#include "I2C.h"
+
+// The MTS300 does not have an external pullup resistor for I2C
+#if !defined(ATM128_I2C_EXTERNAL_PULLDOWN) || !(ATM128_I2C_EXTERNAL_PULLDOWN)
+#error You must set ATM128_I2C_EXTERNAL_PULLDOWN=1
+#endif
+
+module MicP
+{
+  provides interface SplitControl;
+  provides interface MicSetting;
+  provides interface Atm128AdcConfig as MicAtm128AdcConfig;
+
+  uses interface Timer<TMilli>;
+  uses interface GeneralIO as MicPower;
+  uses interface GeneralIO as MicMuxSel;
+  uses interface MicaBusAdc as MicAdc;
+  uses interface I2CPacket<TI2CBasicAddr>;
+  uses interface Resource as I2CResource;
+  uses interface HplAtm128Interrupt as AlertInterrupt;
+}
+implementation 
+{
+  uint8_t gainData[2];
+  
+  command error_t SplitControl.start()
+  {
+    call AlertInterrupt.disable();
+    call MicPower.makeOutput();
+    call MicPower.set();
+    call MicMuxSel.makeOutput();    
+    call MicMuxSel.clr();
+		
+    call MicSetting.muxSel(1);  // Set the mux so that raw microhpone output is selected
+    call MicSetting.gainAdjust(64);  // Set the gain of the microphone.
+
+    call Timer.startOneShot(1200); 
+    return SUCCESS;
+  }
+
+  event void Timer.fired() {
+    signal SplitControl.startDone(SUCCESS);
+  }
+  
+  command error_t SplitControl.stop()
+  {
+    call AlertInterrupt.disable();
+    call MicPower.clr();
+    call MicPower.makeInput();
+
+    signal SplitControl.stopDone(SUCCESS);
+    return SUCCESS;
+  }
+  
+  /**
+   * Resource request
+   * 
+   */  
+  event void I2CResource.granted()
+  {
+    call I2CPacket.write(0x3,TOS_MIC_POT_ADDR, 2, gainData);
+  }
+
+  /**
+   * mic control
+   * 
+   */  
+  command error_t MicSetting.muxSel(uint8_t sel)
+  {
+    if (sel == 0)
+      {
+	call MicMuxSel.clr();
+	return SUCCESS;
+      }
+    else if (sel == 1)
+      {
+	call MicMuxSel.set();
+	return SUCCESS;
+      }
+    return FAIL;
+  }
+  
+  command error_t MicSetting.gainAdjust(uint8_t val)
+  {
+    gainData[0] = 0;    // pot subaddr
+    gainData[1] = val;  // value to write
+    return call I2CResource.request();
+  }
+  
+  command uint8_t MicSetting.readToneDetector()
+  {
+    bool bVal = call AlertInterrupt.getValue();
+    return bVal ? 1 : 0;
+  }
+  
+  /**
+   * mic interrupt control
+   * 
+   */
+  async command error_t MicSetting.enable()
+  {
+    call AlertInterrupt.enable();
+    return SUCCESS;
+  }
+  
+  async command error_t MicSetting.disable()
+  {
+    call AlertInterrupt.disable();
+    return SUCCESS;
+  }
+
+  default async event error_t MicSetting.toneDetected()
+  {
+    return SUCCESS;
+  }
+  
+  async event void AlertInterrupt.fired()
+  {
+    signal MicSetting.toneDetected();
+  }
+  
+  /**
+   *
+   *
+   */
+  
+  async command uint8_t MicAtm128AdcConfig.getChannel() 
+  {
+    return call MicAdc.getChannel();
+  }
+  
+  async command uint8_t MicAtm128AdcConfig.getRefVoltage() 
+  {
+    return ATM128_ADC_VREF_OFF;
+  }
+  
+  async command uint8_t MicAtm128AdcConfig.getPrescaler() 
+  {
+    return ATM128_ADC_PRESCALE;
+  }
+  
+  /**
+   * I2CPot2
+   * 
+   */
+  async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
+  {
+  }
+  
+  async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data)
+  {
+    call I2CResource.release();
+  }
+}
diff --git a/tos/sensorboards/mts300/MicReadP.nc b/tos/sensorboards/mts300/MicReadP.nc
new file mode 100644
index 00000000..2a9619e3
--- /dev/null
+++ b/tos/sensorboards/mts300/MicReadP.nc
@@ -0,0 +1,21 @@
+configuration MicReadP
+{
+  provides 
+  {
+    interface Read<uint16_t>[uint8_t client];
+  }
+  uses
+  {
+    interface Read<uint16_t> as ActualRead[uint8_t client];
+  }
+}
+implementation
+{
+  components MicDeviceP,
+  new ArbitratedReadC(uint16_t);
+
+  Read = ArbitratedReadC;
+  ArbitratedReadC.Resource -> MicDeviceP;
+  ArbitratedReadC.Service = ActualRead;
+}
+
diff --git a/tos/sensorboards/mts300/MicReadStreamP.nc b/tos/sensorboards/mts300/MicReadStreamP.nc
new file mode 100644
index 00000000..85276452
--- /dev/null
+++ b/tos/sensorboards/mts300/MicReadStreamP.nc
@@ -0,0 +1,27 @@
+configuration MicReadStreamP
+{
+  provides 
+  {
+    interface MicSetting;
+    interface ReadStream<uint16_t>[uint8_t client];
+  }
+  uses
+  {
+    interface ReadStream<uint16_t> as ActualRead[uint8_t client];
+  }
+}
+implementation
+{
+  enum {
+    NMIC_CLIENTS = uniqueCount(UQ_MIC_RESOURCE)
+  };
+  components MicDeviceP,
+  new ArbitratedReadStreamC(NMIC_CLIENTS, uint16_t);
+
+  MicSetting = MicDeviceP;
+
+  ReadStream = ArbitratedReadStreamC;
+  ArbitratedReadStreamC.Resource -> MicDeviceP;
+  ArbitratedReadStreamC.Service = ActualRead;
+}
+
diff --git a/tos/sensorboards/mts300/MicSetting.nc b/tos/sensorboards/mts300/MicSetting.nc
new file mode 100644
index 00000000..b85d4754
--- /dev/null
+++ b/tos/sensorboards/mts300/MicSetting.nc
@@ -0,0 +1,100 @@
+// $Id: MicSetting.nc,v 1.3 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * Authors:		Alec Woo
+ * Date last modified:  8/20/02
+ * 
+ * The microphone on the mica sensor board has two methods for control and
+ * one method to read the binary output of the tone detector.  (Note:  The tone
+ * detector's binary output can be configured as an interrupt.  Please see MicInterrupt.ti)
+ *
+ * muxSel allows users to switch the ADC to sample from phase lock loop output of
+ * the tone detector (by setting the value to 0 (default))  or the raw voice-band output 
+ * of the micrphone (by setting the value to 1).
+ *
+ * gainAdjust allows users to adjust the amplification gain on the microphone. The range
+ * is 0 to 255 with 0 being the minmum and 255 being the maximum amplification.  Note that
+ * setting amplification too high can result in clipping (signal distortion).
+ *
+ * If an audio signal at 4.3kHz is picked up by the microphone, the tone
+ * detect will decode it and generate a binary ouput (0 meaning tone is detected, 1 meaning
+ * tone is not detected).  Users can read this output simply by calling readToneDetector().
+ *
+ */
+
+/**
+ * @author Alec Woo
+ */
+
+interface MicSetting {
+  /* Effect:  Set the multiplexer's setting on the microphone
+   * Return:  returns SUCCESS or FAIL
+   */
+  command error_t muxSel(uint8_t sel);
+  /* Effect:  Set the amplificatoin gain  on the microphone
+   * Return:  returns SUCCESS or FAIL
+   */
+  command error_t gainAdjust(uint8_t val);
+
+  /* Effect:  returns the binary tone detector's output
+   * Return:  0 meaning tone is detected, 1 meanning tone is not detected
+   */
+  command uint8_t readToneDetector();
+  /* Effects: disable interrupts
+     Returns: SUCCESS
+  */
+  async command error_t disable();
+
+  /* Effects: enable interrupts
+     Returns: SUCCESS
+  */
+  async command error_t enable();
+
+  /* Interrupt signal for tone detected.  Note that MicInterrupt is automatically disabled
+   * before this event is signaled.  (Upper layer needs to reenable this interrupt for future
+   * tone detect.
+   *
+   *  Returns: SUCCESS
+   */
+  async event error_t toneDetected();
+}
diff --git a/tos/sensorboards/mts300/MicStreamC.nc b/tos/sensorboards/mts300/MicStreamC.nc
new file mode 100644
index 00000000..1fe6592b
--- /dev/null
+++ b/tos/sensorboards/mts300/MicStreamC.nc
@@ -0,0 +1,54 @@
+/**
+ *  Copyright (c) 2005-2006 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ /*
+ *  @author Hu Siquan <husq@xbow.com>
+ *
+ *  $Id: MicStreamC.nc,v 1.3 2010-06-29 22:07:56 scipio Exp $
+ */
+
+#include "mts300.h"
+
+generic configuration MicStreamC() {
+  provides interface ReadStream<uint16_t>;
+  provides interface MicSetting;
+}
+implementation {
+  enum {
+    ID = unique(UQ_MIC_RESOURCE)
+  };
+  components MicReadStreamP, MicDeviceP, new AdcReadStreamClientC();
+
+  ReadStream = MicReadStreamP.ReadStream[ID];
+  MicReadStreamP.ActualRead[ID] -> AdcReadStreamClientC;
+  AdcReadStreamClientC.Atm128AdcConfig -> MicDeviceP.Atm128AdcConfig;
+  MicSetting = MicReadStreamP;
+}
diff --git a/tos/sensorboards/mts300/Mts300Sounder.nc b/tos/sensorboards/mts300/Mts300Sounder.nc
new file mode 100644
index 00000000..6f39bff0
--- /dev/null
+++ b/tos/sensorboards/mts300/Mts300Sounder.nc
@@ -0,0 +1,4 @@
+interface Mts300Sounder
+{
+  command void beep(uint16_t length);
+}
diff --git a/tos/sensorboards/mts300/PhotoC.nc b/tos/sensorboards/mts300/PhotoC.nc
new file mode 100644
index 00000000..d6e0bcd1
--- /dev/null
+++ b/tos/sensorboards/mts300/PhotoC.nc
@@ -0,0 +1,25 @@
+/* $Id: PhotoC.nc,v 1.4 2007-03-14 04:14:13 pipeng Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Photodiode of the mts300 sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "mts300.h"
+
+generic configuration PhotoC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components ArbitratedPhotoDeviceP;
+
+  Read = ArbitratedPhotoDeviceP.Read[unique(UQ_PHOTO_RESOURCE)];
+}
diff --git a/tos/sensorboards/mts300/PhotoTempControlP.nc b/tos/sensorboards/mts300/PhotoTempControlP.nc
new file mode 100644
index 00000000..779ab45b
--- /dev/null
+++ b/tos/sensorboards/mts300/PhotoTempControlP.nc
@@ -0,0 +1,57 @@
+generic module PhotoTempControlP()
+{
+  provides {
+    interface SplitControl;
+    interface Read<uint16_t>[uint8_t client];
+  }
+  uses {
+    interface Resource as PhotoTempResource;
+    interface Timer<TMilli>;
+    interface GeneralIO as Power;
+    interface Read<uint16_t> as ActualRead;
+  }
+}
+implementation
+{
+  command error_t SplitControl.start() {
+    call PhotoTempResource.request();
+    return SUCCESS;
+  }
+
+  event void PhotoTempResource.granted() {
+    call Power.makeOutput();
+    call Power.set();
+    call Timer.startOneShot(10);
+  }
+
+  event void Timer.fired() {
+    if (call PhotoTempResource.isOwner())
+      signal SplitControl.startDone(SUCCESS);
+  }
+
+  task void stopDone() {
+    call PhotoTempResource.release();
+    signal SplitControl.stopDone(SUCCESS);
+  }
+
+  command error_t SplitControl.stop() {
+    call Power.clr();
+    call Power.makeInput();
+    post stopDone();
+    return SUCCESS;
+  }
+
+  uint8_t id;
+
+  command error_t Read.read[uint8_t client]() {
+    id = client;
+    return call ActualRead.read();
+  }
+
+  event void ActualRead.readDone(error_t result, uint16_t val) {
+    if (call PhotoTempResource.isOwner())
+      signal Read.readDone[id](result, val);
+  }
+
+  default event void Read.readDone[uint8_t x](error_t result, uint16_t val) { }
+}
diff --git a/tos/sensorboards/mts300/PhotoTempDeviceC.nc b/tos/sensorboards/mts300/PhotoTempDeviceC.nc
new file mode 100644
index 00000000..9fc2b05d
--- /dev/null
+++ b/tos/sensorboards/mts300/PhotoTempDeviceC.nc
@@ -0,0 +1,49 @@
+#include "mts300.h"
+
+configuration PhotoTempDeviceC
+{
+  provides interface Resource as PhotoResource[uint8_t client];
+  provides interface Resource as TempResource[uint8_t client];
+  provides interface Read<uint16_t> as ReadPhoto[uint8_t client];
+  provides interface Read<uint16_t> as ReadTemp[uint8_t client];
+}
+implementation
+{
+  components MicaBusC, PhotoTempP,
+    new RoundRobinArbiterC(UQ_PHOTOTEMP_RESOURCE) as SharingArbiter,
+    new RoundRobinArbiterC(UQ_PHOTO_RESOURCE) as PhotoArbiter,
+    new RoundRobinArbiterC(UQ_TEMP_RESOURCE) as TempArbiter,
+    new SplitControlPowerManagerC() as PhotoPower,
+    new SplitControlPowerManagerC() as TempPower,
+    new PhotoTempControlP() as PhotoControl,
+    new PhotoTempControlP() as TempControl,
+    new TimerMilliC() as WarmupTimer,
+    new AdcReadClientC() as Adc;
+
+  PhotoResource = PhotoArbiter;
+  PhotoPower.ResourceDefaultOwner -> PhotoArbiter;
+  PhotoPower.ArbiterInfo -> PhotoArbiter;
+  PhotoPower.SplitControl -> PhotoControl;
+  PhotoControl.PhotoTempResource -> SharingArbiter.Resource[unique(UQ_PHOTOTEMP_RESOURCE)];
+  PhotoControl.Timer -> WarmupTimer;
+  PhotoControl.Power -> MicaBusC.Int1;
+  ReadPhoto = PhotoControl;
+  PhotoControl.ActualRead -> Adc;
+
+  TempResource = TempArbiter;
+  TempPower.ResourceDefaultOwner -> TempArbiter;
+  TempPower.ArbiterInfo -> TempArbiter;
+  TempPower.SplitControl -> TempControl;
+  TempControl.PhotoTempResource -> SharingArbiter.Resource[unique(UQ_PHOTOTEMP_RESOURCE)];
+  TempControl.Timer -> WarmupTimer;
+#if defined(MTS300CA) || defined(MTS310CA)
+  TempControl.Power -> MicaBusC.Int2;
+#elif defined(MTS300CB) | defined(MTS310CB)
+  TempControl.Power -> MicaBusC.PW0;
+#endif
+  ReadTemp = TempControl;
+  TempControl.ActualRead -> Adc;
+
+  Adc.Atm128AdcConfig -> PhotoTempP;
+  PhotoTempP.PhotoTempAdc -> MicaBusC.Adc1;
+}
diff --git a/tos/sensorboards/mts300/PhotoTempP.nc b/tos/sensorboards/mts300/PhotoTempP.nc
new file mode 100644
index 00000000..68a4400c
--- /dev/null
+++ b/tos/sensorboards/mts300/PhotoTempP.nc
@@ -0,0 +1,32 @@
+/* $Id: PhotoTempP.nc,v 1.4 2007-03-14 04:14:13 pipeng Exp $
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * MTS300 photo and temp sensor ADC configuration.
+ * @author David Gay <david.e.gay@intel.com>
+ */
+module PhotoTempP
+{
+  provides interface Atm128AdcConfig;
+  uses interface MicaBusAdc as PhotoTempAdc;
+}
+implementation
+{
+  async command uint8_t Atm128AdcConfig.getChannel() {
+    return call PhotoTempAdc.getChannel();
+  }
+
+  async command uint8_t Atm128AdcConfig.getRefVoltage() {
+    return ATM128_ADC_VREF_OFF;
+  }
+
+  async command uint8_t Atm128AdcConfig.getPrescaler() {
+    return ATM128_ADC_PRESCALE;
+  }
+}
diff --git a/tos/sensorboards/mts300/SensorMts300C.nc b/tos/sensorboards/mts300/SensorMts300C.nc
new file mode 100644
index 00000000..99a5f9a2
--- /dev/null
+++ b/tos/sensorboards/mts300/SensorMts300C.nc
@@ -0,0 +1,75 @@
+/**
+ *  Copyright (c) 2005-2006 Crossbow Technology, Inc.
+ *  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  @author Martin Turon <mturon@xbow.com>
+ *  @author Hu Siquan <husq@xbow.com>
+ *
+ *  $Id: SensorMts300C.nc,v 1.9 2010-06-29 22:07:56 scipio Exp $
+ */
+
+//configuration SensorMts300C
+generic configuration SensorMts300C()
+{
+  provides
+  {
+   	interface Mts300Sounder as Sounder; //!< sounder
+   	interface Read<uint16_t> as Vref; //!< voltage
+   	interface Read<uint16_t> as Temp; //!< Thermister
+  	interface Read<uint16_t> as Light; //!< Photo sensor
+   	interface Read<uint16_t> as Microphone; //!< Mic sensor
+  	interface Read<uint16_t> as AccelX; //!< Accelerometer sensor
+   	interface Read<uint16_t> as AccelY; //!< Accelerometer sensor
+   	interface Read<uint16_t> as MagX; //!< magnetometer sensor
+   	interface Read<uint16_t> as MagY; //!< magnetometer sensor
+  }
+}
+implementation
+{
+    components SounderC,
+    new VoltageC(),
+    new AccelXC(),
+    new AccelYC(),
+    new PhotoC(),
+    new TempC(),
+    new MicC(),
+    new MagXC(),
+    new MagYC();
+
+    Sounder    = SounderC;
+    Vref       = VoltageC;
+    Temp       = TempC;
+    Light      = PhotoC;
+    Microphone = MicC;
+    AccelX     = AccelXC;
+    AccelY     = AccelYC;
+    MagX       = MagXC;
+    MagY       = MagYC;
+}
diff --git a/tos/sensorboards/mts300/SounderC.nc b/tos/sensorboards/mts300/SounderC.nc
new file mode 100644
index 00000000..a121e89e
--- /dev/null
+++ b/tos/sensorboards/mts300/SounderC.nc
@@ -0,0 +1,12 @@
+configuration SounderC
+{
+  provides interface Mts300Sounder;
+}
+implementation
+{
+  components SounderP, new TimerMilliC(), MicaBusC;
+
+  Mts300Sounder = SounderP;
+  SounderP.Timer -> TimerMilliC;
+  SounderP.SounderPin -> MicaBusC.PW2;
+}
diff --git a/tos/sensorboards/mts300/SounderP.nc b/tos/sensorboards/mts300/SounderP.nc
new file mode 100644
index 00000000..e5f2c064
--- /dev/null
+++ b/tos/sensorboards/mts300/SounderP.nc
@@ -0,0 +1,31 @@
+module SounderP
+{
+  provides interface Mts300Sounder;
+  uses {
+    interface Timer<TMilli>;
+    interface GeneralIO as SounderPin;
+  }
+}
+implementation
+{
+  command void Mts300Sounder.beep(uint16_t length) {
+    if (call Timer.isRunning())
+      {
+	uint32_t remaining = call Timer.getdt(),
+	  elapsed = call Timer.getNow() - call Timer.gett0();
+
+	/* If more time left than we are requesting, just exit */
+	if (remaining > elapsed && (remaining - elapsed) > length)
+	  return;
+
+	/* Override timer with new duration */
+      }
+    call Timer.startOneShot(length);
+    call SounderPin.makeOutput();
+    call SounderPin.set();
+  }
+
+  event void Timer.fired() {
+    call SounderPin.clr();
+  }
+}
diff --git a/tos/sensorboards/mts300/TempC.nc b/tos/sensorboards/mts300/TempC.nc
new file mode 100644
index 00000000..53946561
--- /dev/null
+++ b/tos/sensorboards/mts300/TempC.nc
@@ -0,0 +1,25 @@
+/* $Id: TempC.nc,v 1.4 2008-06-11 00:42:15 razvanm Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Photodiode of the mts300 sensor board.
+ * 
+ * @author David Gay
+ */
+
+#include "mts300.h"
+
+generic configuration TempC() {
+  provides interface Read<uint16_t>;
+}
+implementation {
+  components ArbitratedTempDeviceP;
+
+  Read = ArbitratedTempDeviceP.Read[unique(UQ_TEMP_RESOURCE)];
+}
diff --git a/tos/sensorboards/mts300/mts300.h b/tos/sensorboards/mts300/mts300.h
new file mode 100644
index 00000000..f9b6aa94
--- /dev/null
+++ b/tos/sensorboards/mts300/mts300.h
@@ -0,0 +1,68 @@
+/* $Id: mts300.h,v 1.6 2010-06-29 22:07:56 scipio Exp $ */
+/*
+ * Copyright (c) 2005-2006 Crossbow Technology, Inc.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of Crossbow Technology nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ * 
+ * @author Hu Siquan <husq@xbow.com>
+ * Revision: $Revision: 1.6 $
+ *
+ */
+
+#ifndef _MTS300_H
+#define _MTS300_H
+
+// sounder enable (1) /disable (0)
+#ifndef SOUNDER
+#define SOUNDER 1
+#endif
+
+#define UQ_ACCEL_RESOURCE "mts300.accel"
+#define UQ_PHOTO_RESOURCE "mts300.photo"
+#define UQ_TEMP_RESOURCE "mts300.temp"
+#define UQ_PHOTOTEMP_RESOURCE "mts300.phototemp"
+#define UQ_MIC_RESOURCE "mts300.microphone"
+#define UQ_MAG_RESOURCE "mts300.mag"
+
+enum
+{
+  TOS_MIC_POT_ADDR = 0x2D,
+  TOS_MAG_POT_ADDR = 0x2C,
+};
+
+// debug leds
+//#define _DEBUG_LEDS
+#ifdef _DEBUG_LEDS
+#define DEBUG_LEDS(X)         X.DebugLeds -> LedsC
+#else
+#define DEBUG_LEDS(X)         X.DebugLeds -> NoLedsC
+#endif
+#endif /* _MTS300_H */
+
diff --git a/tos/sensorboards/mts400/.sensor b/tos/sensorboards/mts400/.sensor
new file mode 100644
index 00000000..adc8359b
--- /dev/null
+++ b/tos/sensorboards/mts400/.sensor
@@ -0,0 +1,4 @@
+
+push( @includes, qw(
+  %T/chips/sht11
+) );
diff --git a/tos/sensorboards/mts400/Accel202.h b/tos/sensorboards/mts400/Accel202.h
new file mode 100644
index 00000000..c7c2973b
--- /dev/null
+++ b/tos/sensorboards/mts400/Accel202.h
@@ -0,0 +1,39 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#ifndef ACCEL202_H
+#define ACCEL202_H
+
+#define UQ_ACCEL202 "Accel202.Resource"
+
+#endif
diff --git a/tos/sensorboards/mts400/Accel202C.nc b/tos/sensorboards/mts400/Accel202C.nc
new file mode 100644
index 00000000..e18abb37
--- /dev/null
+++ b/tos/sensorboards/mts400/Accel202C.nc
@@ -0,0 +1,55 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#include "Accel202.h"
+
+generic configuration Accel202C() {
+	provides interface Read<uint16_t> as X_Axis;
+	provides interface Read<uint16_t> as Y_Axis;
+}
+implementation {
+	components new Accel202ReaderP();
+	
+	X_Axis = Accel202ReaderP.X_Axis;
+	Y_Axis = Accel202ReaderP.Y_Axis;
+	
+	components HalAccel202C;
+	
+	enum {	X_KEY = unique(UQ_ACCEL202)};
+	enum {	Y_KEY = unique(UQ_ACCEL202)};
+	
+	Accel202ReaderP.X_Resoure -> HalAccel202C.Resource[ X_KEY ];
+	Accel202ReaderP.XRead -> HalAccel202C.XAxis;
+	Accel202ReaderP.Y_Resoure -> HalAccel202C.Resource[ Y_KEY];
+	Accel202ReaderP.YRead -> HalAccel202C.YAxis;
+}
diff --git a/tos/sensorboards/mts400/Accel202LogicP.nc b/tos/sensorboards/mts400/Accel202LogicP.nc
new file mode 100644
index 00000000..c499d397
--- /dev/null
+++ b/tos/sensorboards/mts400/Accel202LogicP.nc
@@ -0,0 +1,105 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+generic module Accel202LogicP()
+{
+	provides interface Read<uint16_t> as XAxis;
+	provides interface Read<uint16_t> as YAxis;
+	uses interface Resource;
+	uses interface Atm128AdcSingle;
+	uses interface MicaBusAdc as XADC;
+	uses interface MicaBusAdc as YADC;
+}
+implementation
+{
+	enum{
+		ADCX=1,
+		ADCY,
+	};
+
+	task void read();
+	task void failTask();
+	
+	error_t performCommand(uint8_t);
+	
+	uint8_t cmd,readData;
+
+	command error_t XAxis.read() {
+		return performCommand(ADCX);
+	}
+	  
+	command error_t YAxis.read() {
+		return performCommand(ADCY);
+	}
+
+	error_t performCommand(uint8_t Command) {
+		cmd=Command;
+		return call Resource.request(); 
+    }
+    
+    event void Resource.granted(){
+		if(cmd==ADCX){
+			call Atm128AdcSingle.getData(call XADC.getChannel(),ATM128_ADC_VREF_OFF,FALSE,ATM128_ADC_PRESCALE);
+		}else {
+			call Atm128AdcSingle.getData(call YADC.getChannel(),ATM128_ADC_VREF_OFF,FALSE,ATM128_ADC_PRESCALE);
+		}	
+	}
+	
+	async event void Atm128AdcSingle.dataReady(uint16_t data, bool precise){
+		call Resource.release();
+		if (precise){
+			atomic readData=data;
+			post read();
+		}else {
+			post failTask();
+		}
+	}
+	
+	task void read(){
+		atomic{
+			if(cmd==ADCX){
+				signal XAxis.readDone(SUCCESS,readData);
+			}else {
+				signal YAxis.readDone(SUCCESS,readData);
+			}
+		}
+	}
+	
+	task void failTask(){
+		if(cmd==ADCX){
+			signal XAxis.readDone(FAIL,0);
+		}else{
+			signal YAxis.readDone(FAIL,0);
+		}
+	}
+}
diff --git a/tos/sensorboards/mts400/Accel202ReaderP.nc b/tos/sensorboards/mts400/Accel202ReaderP.nc
new file mode 100644
index 00000000..988a3339
--- /dev/null
+++ b/tos/sensorboards/mts400/Accel202ReaderP.nc
@@ -0,0 +1,82 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+generic module Accel202ReaderP()
+{
+	provides interface Read<uint16_t> as X_Axis;
+	provides interface Read<uint16_t> as Y_Axis;
+
+	uses interface Resource as X_Resoure;
+	uses interface Resource as Y_Resoure;
+	uses interface Read<uint16_t> as XRead;
+	uses interface Read<uint16_t> as YRead;
+}
+implementation
+{
+	command error_t X_Axis.read() {
+		return call X_Resoure.request();
+	}
+
+	event void X_Resoure.granted() {
+		error_t result;
+		if ((result = call XRead.read()) != SUCCESS) {
+			call X_Resoure.release();
+			signal X_Axis.readDone( result, 0 );
+		}
+	}
+
+	event void XRead.readDone( error_t result, uint16_t val ) {
+		call X_Resoure.release();
+		signal X_Axis.readDone( result, val );
+	}
+
+	command error_t Y_Axis.read() {
+		return call Y_Resoure.request();
+	}
+
+	event void Y_Resoure.granted() {
+		error_t result;
+		if ((result = call YRead.read()) != SUCCESS) {
+			call Y_Resoure.release();
+			signal Y_Axis.readDone( result, 0 );
+		}
+	}
+
+	event void YRead.readDone( error_t result, uint16_t val ) {
+		call Y_Resoure.release();
+		signal Y_Axis.readDone( result, val );
+	}
+	
+	default event void X_Axis.readDone( error_t result, uint16_t val ) { }
+  	default event void Y_Axis.readDone( error_t result, uint16_t val ) { }	
+}
diff --git a/tos/sensorboards/mts400/Adg715.h b/tos/sensorboards/mts400/Adg715.h
new file mode 100644
index 00000000..3cbbea93
--- /dev/null
+++ b/tos/sensorboards/mts400/Adg715.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2008 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ * 
+ * @author Danny Park
+ */
+
+#ifndef ADG715_H
+#define ADG715_H
+
+/**
+ * enum is used instead of #ifndef/#define/#endif becuase these relate
+ * to the hardware being written for and will not change unless the
+ * hardware design is change which would require a new version of the
+ * driver anyway.
+ */
+enum {
+  ADG715_BASE_ADDR = 0x48, //binary 1001000
+  ADG715_PIN_A0_HIGH = 0x01,//binary 00000001
+  ADG715_PIN_A1_HIGH = 0x02,//binary 00000010
+  ADG715_CMD_LEN = 1,
+  ADG715_CH_MIN = 1,
+  ADG715_CH_MAX = 8,
+  ADG715_CH_OPEN = 1,
+  ADG715_CH_CLOSE = 0,
+};
+
+#define UQ_ADG715 "Adg715.Resource"
+
+
+#endif //ADG715_H
diff --git a/tos/sensorboards/mts400/Adg715C.nc b/tos/sensorboards/mts400/Adg715C.nc
new file mode 100644
index 00000000..056c8fff
--- /dev/null
+++ b/tos/sensorboards/mts400/Adg715C.nc
@@ -0,0 +1,137 @@
+/*
+ * Copyright (c) 2008 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * The adg715 chip has 8 channels that are controlled through the I2C
+ * bus.  This configuration provides 8 Channel interfaces corresponding
+ * to the 8 physical channels on the chip.  This implementation is
+ * specific to the mts420CA sensorboard and the adg715 that connects
+ * the communication wires.
+ * 
+ * @author Danny Park
+ */
+ 
+#include"Adg715.h" 
+ 
+configuration Adg715C {
+	provides {
+		/** Connects UART_TXD to GPS_RX */
+		//interface Channel as ChannelGpsRx;
+
+		/** Connects Accel_X to ADC1 */
+		interface Channel as ChannelAccel_X;
+
+		/** Connects UART_RXD to GPS_TX */
+		//interface Channel as ChannelGpsTx;
+
+		/** Connects Accel_Y to ADC2  */
+		interface Channel as ChannelAccel_Y;
+
+		/** Connects UART_CLK to Pressure_SCLK */
+		/** Connects Pressure_SCLK to FLASH_CLK*/
+		interface Channel as ChannelPressureClock;
+
+		/** Connects UART_TX to Pressure_DOUT */
+		/** Connects Pressure_DIN to FLASH_SI  */
+		interface Channel as ChannelPressureDin;
+
+		/** Connects UART_RX to Pressure_DIN */
+		/** Connects Pressure_DOUT to FLASH_SO */
+		interface Channel as ChannelPressureDout;
+
+		/** Pins not connected for channel 6 on this chip */
+		//interface Channel as Channel6CommNull;
+
+		/** Connects Thermopile_Select_Cnt to GND */    
+		interface Channel as ChannelThermopile_Select_Cnt;
+
+		/** Connects PW3 to Humidity_SCK */
+		interface Channel as ChannelHumidityClock;
+
+		/** Connects INT3 to Humidity_DATA */
+		interface Channel as ChannelHumidityData;
+		
+		/** Connects VCC to Light_Power */
+		interface Channel as ChannelLightPower;
+    
+		/** Pins not connected for channel 2 on this chip  */
+		interface Channel as Channel2PowerNull;
+    
+		/** Connects VCC to Pressure_Power */
+		interface Channel as ChannelPressurePower;
+    
+		/** Connects VCC to Humidity_Power */
+		interface Channel as ChannelHumidityPower;
+	
+		/** Connects VCC to EEPROM_Power */
+		interface Channel as ChannelEepromPower;
+    
+		/** Connects VCC to Accel_Power */
+		interface Channel as ChannelAccelPower;
+    
+		/** Connect 33VDCDCBOOST to GND (switch on)*/
+		interface Channel as DcDcBoost33Channel;
+		/** Connects VCC to GPS_PWR */
+		//interface Channel as ChannelGpsPower;
+	
+		/** Connect 5VDCDCBOOST_SHUTDOWN to GND (switch on)*/
+		interface Channel as DcDcBoost5Channel;
+		/** Connects VCC to GPS_ENA */
+		//interface Channel as ChannelGpsEnable;
+	
+		interface Resource[ uint8_t id ];
+	}
+}
+implementation {
+	components new FcfsArbiterC( UQ_ADG715 );
+	Resource = FcfsArbiterC;
+	components new HplAdg715C(FALSE, TRUE) as Comm;
+	ChannelAccel_X       = Comm.Channel1;
+	ChannelAccel_Y       = Comm.Channel2;
+	ChannelPressureClock = Comm.Channel3;
+	ChannelPressureDin   = Comm.Channel4;
+	ChannelPressureDout  = Comm.Channel5;
+//	Channel6CommNull     = Comm.Channel6;
+	ChannelThermopile_Select_Cnt = Comm.Channel6;
+	ChannelHumidityClock = Comm.Channel7;
+	ChannelHumidityData  = Comm.Channel8;
+	components new HplAdg715C(FALSE, FALSE) as Power;
+	ChannelLightPower    = Power.Channel1;
+	Channel2PowerNull    = Power.Channel2;
+	ChannelPressurePower = Power.Channel3;
+	ChannelHumidityPower = Power.Channel4;
+	ChannelEepromPower   = Power.Channel5;
+	ChannelAccelPower    = Power.Channel6;
+	DcDcBoost33Channel  = Power.Channel7;
+//	ChannelGpsEnable     = Power.Channel8;
+	DcDcBoost5Channel   = Power.Channel8;
+//	ChannelGpsPower      = Power.Channel7;
+}
diff --git a/tos/sensorboards/mts400/Adg715ControlC.nc b/tos/sensorboards/mts400/Adg715ControlC.nc
new file mode 100644
index 00000000..1fe07e97
--- /dev/null
+++ b/tos/sensorboards/mts400/Adg715ControlC.nc
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2008 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * The adg715 chip has 8 channels that are controlled through the I2C
+ * bus.  This configuration provides 8 Channel interfaces corresponding
+ * to the 8 physical channels on the chip.  The I2C bus needs to be
+ * wired to this configuration through the I2CPacket and Resource
+ * interfaces.
+ * 
+ * @author Danny Park
+ */
+
+generic configuration Adg715ControlC(bool pinA1High, bool pinA2High) {
+	provides {
+		interface Channel as Channel1;
+		interface Channel as Channel2;
+		interface Channel as Channel3;
+		interface Channel as Channel4;
+		interface Channel as Channel5;
+		interface Channel as Channel6;
+		interface Channel as Channel7;
+		interface Channel as Channel8;
+	}
+  
+	uses {
+		interface I2CPacket<TI2CBasicAddr>;
+		interface Resource;
+	}
+}
+implementation {
+	components new Adg715ControlP(pinA1High, pinA2High), MainC;
+	components LedsC;
+  
+	Channel1 = Adg715ControlP.Channel[1];
+	Channel2 = Adg715ControlP.Channel[2];
+	Channel3 = Adg715ControlP.Channel[3];
+	Channel4 = Adg715ControlP.Channel[4];
+	Channel5 = Adg715ControlP.Channel[5];
+	Channel6 = Adg715ControlP.Channel[6];
+	Channel7 = Adg715ControlP.Channel[7];
+	Channel8 = Adg715ControlP.Channel[8];
+	I2CPacket = Adg715ControlP;
+	Resource = Adg715ControlP;
+	Adg715ControlP.Leds->LedsC;
+	MainC.SoftwareInit -> Adg715ControlP.Init;
+}
diff --git a/tos/sensorboards/mts400/Adg715ControlP.nc b/tos/sensorboards/mts400/Adg715ControlP.nc
new file mode 100644
index 00000000..0d3c6f7b
--- /dev/null
+++ b/tos/sensorboards/mts400/Adg715ControlP.nc
@@ -0,0 +1,225 @@
+/*
+ * Copyright (c) 2008 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * The adg715 hardware provides 8 channels which are controlled using
+ * an I2C interface.  The channels here are provided using a
+ * parameterized interface but are checked for being out of bounds
+ * (ADG715_CH_MIN and ADG715_CH_MAX from the header file).
+ * The channels can only be controlled one at a time and they will
+ * be controlled through the I2CPacket interface which is used by
+ * this module.
+ * 
+ * @author Danny Park
+ */
+
+#include <I2C.h>
+#include "Adg715.h"
+
+generic module Adg715ControlP(bool pinA1High, bool pinA0High) {
+	uses {
+		interface I2CPacket<TI2CBasicAddr>;
+		interface Resource;
+		interface Leds;
+	}
+		provides {
+		interface Channel[uint8_t channel];
+		interface Init;
+	}
+}
+implementation {
+	/**************** Global Variables ****************/
+	/** TRUE if this module is busy and cannot accept another command */
+	bool busy;
+	/** In process of opening a channel if TRUE and busy is TRUE */
+	bool opening;
+	/** In process of closing a channel if TRUE and busy is TRUE */
+	bool closing;
+	/** Setting of previous command or command currently in process */
+	uint8_t mySetting;
+	/** Current channel being set if busy is TRUE */
+	uint8_t currentChannel;
+	/** I2C address that is set based on compile time parameters */
+	uint16_t myAddress;
+	/**************** Prototypes ****************/
+	task void successTask();
+	task void failTask();
+	/**************** Init Interface Commands ****************/
+	/**
+	* Initialization command that fires once during boot up.
+	*/
+	command error_t Init.init() {
+		if(pinA1High && pinA0High) {
+			myAddress = ADG715_BASE_ADDR | ADG715_PIN_A1_HIGH | ADG715_PIN_A0_HIGH;
+		} else if(pinA1High) {
+			myAddress = ADG715_BASE_ADDR | ADG715_PIN_A1_HIGH;
+		} else if(pinA0High) {
+			myAddress = ADG715_BASE_ADDR | ADG715_PIN_A0_HIGH;
+		} else {
+			myAddress = ADG715_BASE_ADDR;
+		}    
+		mySetting = 0x00;
+		busy = FALSE;
+		opening = FALSE;
+		closing = FALSE;
+		return SUCCESS;
+	}
+  
+	/**************** Channel Interface Commands ****************/
+	/**
+	* Starts the opening of the given channel or returns an error.
+	* If SUCCESS is returned then an openDone event will be signalled.
+	* 
+	* @param channel The channel to be opened (limited between
+	*   ADG715_CH_MIN and ADG715_CH_MAX).
+	*/
+	command error_t Channel.open[uint8_t channel]() {
+		if(channel > ADG715_CH_MAX || channel < ADG715_CH_MIN) {
+			return ESIZE;
+		} else if(busy) {
+			return EBUSY;
+		} else {
+			busy = TRUE;
+			opening = TRUE;
+			currentChannel = channel;
+			mySetting |= ADG715_CH_OPEN << (channel - 1);
+			call Resource.request();
+			return SUCCESS;
+		}
+	}
+  
+	/**
+	* Starts the closing of the given channel or returns an error.
+	* If SUCCESS is returned then a closeDone event will be signalled.
+	* 
+	* @param channel The channel to be closed (limited between
+	*   ADG715_CH_MIN and ADG715_CH_MAX).
+	*/
+	command error_t Channel.close[uint8_t channel]() {
+		if(channel > ADG715_CH_MAX || channel < ADG715_CH_MIN) {
+			return ESIZE;
+		} else if(busy) {
+			return EBUSY;
+		} else {
+			busy = TRUE;
+			closing = TRUE;
+			currentChannel = channel;
+//			mySetting &= ADG715_CH_CLOSE << (channel - 1);
+			mySetting ^= ADG715_CH_OPEN << (channel - 1);
+			call Resource.request();
+			return SUCCESS;
+		}
+	}
+  
+	/**
+	* Open status of the given channel.
+	* 
+	* @param channel The channel to be closed (limited between
+	*   ADG715_CH_MIN and ADG715_CH_MAX).
+	* @return TRUE if the given channel is open, FALSE otherwise.
+	*/
+	command bool Channel.isOpen[uint8_t channel]() {
+		return ((mySetting >> (channel - 1)) & ADG715_CH_OPEN)== ADG715_CH_OPEN;
+	}
+  
+	/**************** Resource Interface Events ****************/
+	/**
+	* Signalled when the I2CBus is available for use.
+	*/
+	event void Resource.granted() {
+		call I2CPacket.write(I2C_START|I2C_STOP, myAddress, ADG715_CMD_LEN, &mySetting);
+	}
+  
+	/**************** I2CPacket Interface Events ****************/
+	async event void I2CPacket.readDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) {}
+
+	async event void I2CPacket.writeDone(error_t error, uint16_t addr, uint8_t length, uint8_t* data) {
+		if(addr == myAddress) {
+			if(length == ADG715_CMD_LEN && data == &mySetting) {
+				call  Resource.release();	
+				if(error == SUCCESS){
+					post successTask();
+				} else {
+					post failTask();
+				}
+			}
+		}
+	}
+	/**************** Local Tasks ****************/
+	task void successTask() {
+		if(busy) {
+			/**
+			* If busy is not released before signalling a *Done() event
+			* then a serial call of open/close channels on the same
+			* chip will fail with EBUSY.
+			*/
+			busy = FALSE;
+			if(opening) {
+				opening = FALSE;
+				if(((mySetting >> (currentChannel - 1)) & ADG715_CH_OPEN)== ADG715_CH_OPEN) {
+					signal Channel.openDone[currentChannel](SUCCESS);
+				} else {
+					signal Channel.openDone[currentChannel](FAIL);
+				}
+			} else if(closing) {
+				closing = FALSE;
+				if(((mySetting >> (currentChannel - 1)) & ADG715_CH_OPEN)== ADG715_CH_CLOSE) {
+					signal Channel.closeDone[currentChannel](SUCCESS);
+				} else {
+					signal Channel.closeDone[currentChannel](FAIL);
+				}
+			} 
+		}
+	}
+  
+	task void failTask() {
+		if(busy) {
+			/**
+			* If busy is not released before signalling a *Done() event
+			* then a serial call of open/close channels on the same
+			* chip will fail with EBUSY.
+			*/
+			busy = FALSE;
+			if(opening) {
+				opening = FALSE;
+				signal Channel.openDone[currentChannel](FAIL);
+			}
+			if(closing) {
+				closing = FALSE;
+				signal Channel.closeDone[currentChannel](FAIL);
+			}
+		}
+	}
+  
+	/**************** Channel Interface Defaults ****************/
+	default event void Channel.openDone[uint8_t channel](error_t error) {}
+	default event void Channel.closeDone[uint8_t channel](error_t error) {}
+}
diff --git a/tos/sensorboards/mts400/Calibration.nc b/tos/sensorboards/mts400/Calibration.nc
new file mode 100644
index 00000000..c9f404aa
--- /dev/null
+++ b/tos/sensorboards/mts400/Calibration.nc
@@ -0,0 +1,50 @@
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Joe Polastre
+ *
+ * $Id: Calibration.nc,v 1.3 2010-06-29 22:07:56 scipio Exp $
+ */
+
+interface Calibration {
+  command error_t getData();
+  event void dataReady(error_t error, uint16_t* calibration);
+}
diff --git a/tos/sensorboards/mts400/Channel.nc b/tos/sensorboards/mts400/Channel.nc
new file mode 100644
index 00000000..ff89075f
--- /dev/null
+++ b/tos/sensorboards/mts400/Channel.nc
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2008 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+ 
+/**
+ * Open or close a channel and retrieve the open status of the channel.
+ * 
+ * @author Danny Park
+ */
+
+interface Channel {
+  /**
+   * Open the channel.
+   * 
+   * @return SUCCESS if the openDone event will fire in the future.
+   */
+  command error_t open();
+  
+  /**
+   * Close the channel.
+   * 
+   * @return SUCCESS if the closeDone event will fire in the future.
+   */
+  command error_t close();
+  
+  /**
+   * Determine if the channel is open.
+   * 
+   * @return TRUE if the channel is open, FALSE otherwise.
+   */
+  command bool isOpen();
+  
+  /**
+   * Notify the caller that the channel has been opened.
+   * 
+   * @param error SUCCESS if the channel was opened without any problems.
+   */
+  event void openDone(error_t error);
+  
+  /**
+   * Notify the caller that the channel has been closed.
+   * 
+   * @param error SUCCESS if the channel was closed without any problems.
+   */
+  event void closeDone(error_t error);
+}
diff --git a/tos/sensorboards/mts400/HalAccel202C.nc b/tos/sensorboards/mts400/HalAccel202C.nc
new file mode 100644
index 00000000..35c96454
--- /dev/null
+++ b/tos/sensorboards/mts400/HalAccel202C.nc
@@ -0,0 +1,53 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+configuration HalAccel202C {
+	provides interface Resource[ uint8_t client ];
+  	provides interface Read<uint16_t> as XAxis;
+  	provides interface Read<uint16_t> as YAxis;
+}
+implementation {
+	components new Accel202LogicP();
+	XAxis = Accel202LogicP.XAxis;
+	YAxis = Accel202LogicP.YAxis;
+ 
+	components HplAccel202C;
+	Resource = HplAccel202C.Resource;
+
+	components MicaBusC;
+	components Atm128AdcC;
+	Accel202LogicP.Resource -> Atm128AdcC.Resource[unique(UQ_ATM128ADC_RESOURCE)];
+	Accel202LogicP.Atm128AdcSingle -> Atm128AdcC;
+	Accel202LogicP.XADC -> MicaBusC.Adc1;
+	Accel202LogicP.YADC -> MicaBusC.Adc2;
+}
diff --git a/tos/sensorboards/mts400/HalIntersema5534C.nc b/tos/sensorboards/mts400/HalIntersema5534C.nc
new file mode 100644
index 00000000..d23416e2
--- /dev/null
+++ b/tos/sensorboards/mts400/HalIntersema5534C.nc
@@ -0,0 +1,58 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+configuration HalIntersema5534C {
+	provides interface Resource[ uint8_t client ];
+  	provides interface Read<uint16_t> as Temp;
+  	provides interface Read<uint16_t> as Press;
+  	provides interface Calibration as Cal; 
+}
+implementation {
+	components new Intersema5534LogicP();
+	Temp = Intersema5534LogicP.Temp;
+	Press = Intersema5534LogicP.Press;
+	Cal = Intersema5534LogicP.Cal;
+ 
+	components HplIntersema5534C;
+	Resource = HplIntersema5534C.Resource;
+
+	components MicaBusC;
+	
+	Intersema5534LogicP.SPI_CLK -> MicaBusC.USART1_CLK;
+	Intersema5534LogicP.SPI_SI -> MicaBusC.USART1_RXD;
+	Intersema5534LogicP.SPI_SO -> MicaBusC.USART1_TXD;
+	
+	components new TimerMilliC() as Timer;
+	Intersema5534LogicP.Timer->Timer;
+}
+
diff --git a/tos/sensorboards/mts400/HalSensirionSht11C.nc b/tos/sensorboards/mts400/HalSensirionSht11C.nc
new file mode 100644
index 00000000..b927d825
--- /dev/null
+++ b/tos/sensorboards/mts400/HalSensirionSht11C.nc
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HalSensirionSht11C is an advanced access component for the
+ * Sensirion SHT11 model humidity and temperature sensor, available on
+ * the telosb platform. This component provides the SensirionSht11
+ * interface, which offers full control over the device. Please
+ * acquire the Resource before using it.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2010-06-15 21:19:52 $
+ */
+
+configuration HalSensirionSht11C {
+  provides interface Resource[ uint8_t client ];
+  provides interface SensirionSht11[ uint8_t client ];
+}
+implementation {
+  components new SensirionSht11LogicP();
+  SensirionSht11 = SensirionSht11LogicP;
+
+  components HplSensirionSht11C;
+  Resource = HplSensirionSht11C.Resource;
+  SensirionSht11LogicP.DATA -> HplSensirionSht11C.DATA;
+  SensirionSht11LogicP.CLOCK -> HplSensirionSht11C.SCK;
+  SensirionSht11LogicP.InterruptDATA -> HplSensirionSht11C.InterruptDATA;
+  
+  components new TimerMilliC();
+  SensirionSht11LogicP.Timer -> TimerMilliC;
+
+  components LedsC;
+  SensirionSht11LogicP.Leds -> LedsC;
+}
diff --git a/tos/sensorboards/mts400/HalTaos2550C.nc b/tos/sensorboards/mts400/HalTaos2550C.nc
new file mode 100644
index 00000000..c7289b52
--- /dev/null
+++ b/tos/sensorboards/mts400/HalTaos2550C.nc
@@ -0,0 +1,51 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+configuration HalTaos2550C {
+	provides interface Resource[ uint8_t client ];
+  	provides interface Read<uint16_t> as VLight;
+  	provides interface Read<uint16_t> as IRLight;
+}
+implementation {
+	components new Taos2550LogicP();
+	VLight = Taos2550LogicP.VLight;
+	IRLight = Taos2550LogicP.IRLight;
+ 
+	components HplTaos2550C;
+	Resource = HplTaos2550C.Resource;
+
+	components new Atm128I2CMasterC();
+	Taos2550LogicP.I2CPacket -> Atm128I2CMasterC;
+	Taos2550LogicP.I2CResource -> Atm128I2CMasterC;
+}
+
diff --git a/tos/sensorboards/mts400/HplAccel202C.nc b/tos/sensorboards/mts400/HplAccel202C.nc
new file mode 100644
index 00000000..f3134307
--- /dev/null
+++ b/tos/sensorboards/mts400/HplAccel202C.nc
@@ -0,0 +1,58 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#include"Accel202.h"
+#include"Adg715.h"
+
+configuration HplAccel202C {
+  provides interface Resource[ uint8_t id ];
+}
+implementation {
+	components HplAccel202P;
+	components new FcfsArbiterC( UQ_ACCEL202 ) as Arbiter;
+	Resource = Arbiter;
+  
+	components new SplitControlPowerManagerC();
+	SplitControlPowerManagerC.SplitControl -> HplAccel202P;
+	SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
+	SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
+	
+	components Adg715C;
+	HplAccel202P.DcDcBoost33Channel -> Adg715C.DcDcBoost33Channel;
+	HplAccel202P.ChannelAccelPower -> Adg715C.ChannelAccelPower;
+	HplAccel202P.ChannelAccel_X -> Adg715C.ChannelAccel_X;
+	HplAccel202P.ChannelAccel_Y -> Adg715C.ChannelAccel_Y;
+	HplAccel202P.Resource -> Adg715C.Resource[ unique(UQ_ADG715)];
+}
+
+
diff --git a/tos/sensorboards/mts400/HplAccel202P.nc b/tos/sensorboards/mts400/HplAccel202P.nc
new file mode 100644
index 00000000..e8cb67b0
--- /dev/null
+++ b/tos/sensorboards/mts400/HplAccel202P.nc
@@ -0,0 +1,154 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+module HplAccel202P {
+	provides interface SplitControl;
+	uses interface Channel as DcDcBoost33Channel;
+	uses interface Channel as ChannelAccelPower;
+	uses interface Channel as ChannelAccel_X;
+	uses interface Channel as ChannelAccel_Y;
+	uses interface Resource;
+}
+implementation {
+
+	enum{
+		IDLE=0,
+		START,
+		STOP,
+	};
+	uint8_t state=IDLE;
+	
+	command error_t SplitControl.start() {
+		state=START;
+		return call Resource.request();
+	}
+	
+	event void Resource.granted(){
+		error_t err;
+		if(state==START){
+			if((err=call DcDcBoost33Channel.open())==SUCCESS){
+				return;
+			}
+		}else{
+			if((err=call DcDcBoost33Channel.close())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone(err);
+	}
+	  
+	event void DcDcBoost33Channel.openDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call ChannelAccelPower.open())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone(err);
+	}
+	
+	event void ChannelAccelPower.openDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call ChannelAccel_X.open())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone(err);
+	}
+	
+	event void ChannelAccel_X.openDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call ChannelAccel_Y.open())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone(err);
+	}
+	
+	event void ChannelAccel_Y.openDone(error_t err){
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone(err);
+	}
+	
+	command error_t SplitControl.stop() {
+		state=STOP;
+		return  call Resource.request();
+	}
+	
+	event void DcDcBoost33Channel.closeDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call ChannelAccelPower.close())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.stopDone(err);
+	}
+	
+	event void ChannelAccelPower.closeDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call ChannelAccel_X.close())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.stopDone(err);
+	}
+	
+	event void ChannelAccel_X.closeDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call ChannelAccel_Y.close())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.stopDone(err);
+	}
+	
+	event void ChannelAccel_Y.closeDone(error_t err){
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.stopDone(err);
+	}
+}
diff --git a/tos/sensorboards/mts400/HplAdg715C.nc b/tos/sensorboards/mts400/HplAdg715C.nc
new file mode 100644
index 00000000..41cd52cd
--- /dev/null
+++ b/tos/sensorboards/mts400/HplAdg715C.nc
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2008 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * The adg715 chip has 8 channels that are controlled through the I2C
+ * bus.  This configuration provides 8 Channel interfaces corresponding
+ * to the 8 physical channels on the chip.  This implementation is
+ * specific to how the I2C bus is implemented on the micaz platform.
+ * 
+ * @author Danny Park
+ */
+ 
+generic configuration HplAdg715C(bool pinA1High, bool pinA2High) {
+	 provides {
+		interface Channel as Channel1;
+		interface Channel as Channel2;
+		interface Channel as Channel3;
+		interface Channel as Channel4;
+		interface Channel as Channel5;
+		interface Channel as Channel6;
+		interface Channel as Channel7;
+		interface Channel as Channel8;
+	}
+}
+implementation {
+	components new Adg715ControlC(pinA1High, pinA2High),
+		new Atm128I2CMasterC();
+  
+	Channel1 = Adg715ControlC.Channel1;
+	Channel2 = Adg715ControlC.Channel2;
+	Channel3 = Adg715ControlC.Channel3;
+	Channel4 = Adg715ControlC.Channel4;
+	Channel5 = Adg715ControlC.Channel5;
+	Channel6 = Adg715ControlC.Channel6;
+	Channel7 = Adg715ControlC.Channel7;
+	Channel8 = Adg715ControlC.Channel8;
+	Adg715ControlC.I2CPacket -> Atm128I2CMasterC;
+	Adg715ControlC.Resource -> Atm128I2CMasterC;
+}
diff --git a/tos/sensorboards/mts400/HplIntersema5534C.nc b/tos/sensorboards/mts400/HplIntersema5534C.nc
new file mode 100644
index 00000000..56785859
--- /dev/null
+++ b/tos/sensorboards/mts400/HplIntersema5534C.nc
@@ -0,0 +1,68 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#include"Intersema5534.h"
+#include"Adg715.h"
+
+configuration HplIntersema5534C {
+  provides interface Resource[ uint8_t id ];
+}
+implementation {
+	components HplIntersema5534P;
+	components new FcfsArbiterC( UQ_INTERSEMA5534 ) as Arbiter;
+	Resource = Arbiter;
+  
+	components new SplitControlPowerManagerC();
+	SplitControlPowerManagerC.SplitControl -> HplIntersema5534P;
+	SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
+	SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
+	
+	components Adg715C;
+	HplIntersema5534P.ChannelPressurePower -> Adg715C.ChannelPressurePower;
+	HplIntersema5534P.ChannelPressureClock -> Adg715C.ChannelPressureClock;
+	HplIntersema5534P.ChannelPressureDin -> Adg715C.ChannelPressureDin;
+	HplIntersema5534P.ChannelPressureDout -> Adg715C.ChannelPressureDout;
+	
+	HplIntersema5534P.Resource -> Adg715C.Resource[ unique(UQ_ADG715)];
+		
+	components MicaBusC;
+    
+	HplIntersema5534P.SPI_CLK -> MicaBusC.USART1_CLK;
+	HplIntersema5534P.SPI_SI -> MicaBusC.USART1_RXD;
+	HplIntersema5534P.SPI_SO -> MicaBusC.USART1_TXD;
+	
+	components new TimerMilliC() as Timer;
+	
+	HplIntersema5534P.Timer -> Timer;
+	 
+}
diff --git a/tos/sensorboards/mts400/HplIntersema5534P.nc b/tos/sensorboards/mts400/HplIntersema5534P.nc
new file mode 100644
index 00000000..130230a0
--- /dev/null
+++ b/tos/sensorboards/mts400/HplIntersema5534P.nc
@@ -0,0 +1,170 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+module HplIntersema5534P {
+	provides interface SplitControl;
+	uses interface Channel as ChannelPressurePower;
+	uses interface Channel as ChannelPressureClock;
+	uses interface Channel as ChannelPressureDin;
+	uses interface Channel as ChannelPressureDout;
+	uses interface Timer<TMilli>;
+	uses interface GeneralIO as SPI_CLK;
+	uses interface GeneralIO as SPI_SI;
+	uses interface GeneralIO as SPI_SO;
+	uses interface Resource;
+}
+implementation {
+
+	enum{
+		IDLE=0,
+		START,
+		STOP,
+	};
+	uint8_t state=IDLE;
+	
+	command error_t SplitControl.start() {
+		state=START;
+		return call Resource.request();
+	}
+	
+	event void Resource.granted(){
+		error_t err;
+		if(state==START){
+			if((err=call ChannelPressurePower.open())==SUCCESS){
+				return;
+			}
+		}else{
+			if((err=call ChannelPressurePower.close())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone(err);
+	}
+  
+	event void ChannelPressurePower.openDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call ChannelPressureClock.open())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone(err);
+	}
+	
+	event void ChannelPressureClock.openDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call ChannelPressureDin.open())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone(err);
+	}
+	
+	event void ChannelPressureDin.openDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call ChannelPressureDout.open())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone(err);
+	}
+	
+	event void ChannelPressureDout.openDone(error_t err){
+		state=IDLE;
+		call Resource.release();
+		if(err==SUCCESS){
+			call SPI_CLK.makeOutput();
+			call SPI_SI.makeInput();
+			call SPI_SI.set();
+			call SPI_SO.makeOutput();
+			call Timer.startOneShot(300);
+			return;
+		}
+		signal SplitControl.startDone(err);
+	}
+	
+	event void Timer.fired(){
+		signal SplitControl.startDone(SUCCESS);
+	}
+	
+	command error_t SplitControl.stop() {
+		state=STOP;
+		return call Resource.request();
+	}
+	
+	event void ChannelPressurePower.closeDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call ChannelPressureClock.close())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.stopDone(err);
+	}
+	
+	event void ChannelPressureClock.closeDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call ChannelPressureDin.close())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.stopDone(err);
+	}
+	
+	event void ChannelPressureDin.closeDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call ChannelPressureDout.close())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.stopDone(err);
+	}
+	
+	event void ChannelPressureDout.closeDone(error_t err){
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.stopDone(err);
+	}
+}
diff --git a/tos/sensorboards/mts400/HplSensirionSht11C.nc b/tos/sensorboards/mts400/HplSensirionSht11C.nc
new file mode 100644
index 00000000..db5cd3a7
--- /dev/null
+++ b/tos/sensorboards/mts400/HplSensirionSht11C.nc
@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * HplSensirionSht11C is a low-level component, intended to provide
+ * the physical resources used by the Sensirion SHT11 sensor on the
+ * telosb platform so that the chip driver can make use of them. You
+ * really shouldn't be wiring to this, unless you're writing a new
+ * Sensirion SHT11 driver.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2010-06-15 21:19:52 $
+ */
+
+#include"Adg715.h" 
+ 
+configuration HplSensirionSht11C {
+  provides interface Resource[ uint8_t id ];
+  provides interface GeneralIO as DATA;
+  provides interface GeneralIO as SCK;
+  provides interface GpioInterrupt as InterruptDATA;
+
+}
+implementation {
+	components MicaBusC;
+  
+	DATA = MicaBusC.Int3;	
+	SCK  =MicaBusC.PW3;
+	
+	components HplSensirionSht11P;
+
+	HplSensirionSht11P.DATA -> MicaBusC.Int3;	
+	HplSensirionSht11P.SCK -> MicaBusC.PW3;
+
+	components new TimerMilliC();
+	HplSensirionSht11P.Timer -> TimerMilliC;
+
+	InterruptDATA = MicaBusC.Int3_Interrupt;
+
+	components new FcfsArbiterC( "Sht11.Resource" ) as Arbiter;
+	Resource = Arbiter;
+  
+	components new SplitControlPowerManagerC();
+	SplitControlPowerManagerC.SplitControl -> HplSensirionSht11P;
+	SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
+	SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
+	
+	components Adg715C;
+	HplSensirionSht11P.ChannelHumidityClock->Adg715C.ChannelHumidityClock;
+	HplSensirionSht11P.ChannelHumidityData->Adg715C.ChannelHumidityData;
+	HplSensirionSht11P.ChannelHumidityPower->Adg715C.ChannelHumidityPower;
+	HplSensirionSht11P.Resource->Adg715C.Resource[ unique(UQ_ADG715)];
+}
diff --git a/tos/sensorboards/mts400/HplSensirionSht11P.nc b/tos/sensorboards/mts400/HplSensirionSht11P.nc
new file mode 100644
index 00000000..25503ce4
--- /dev/null
+++ b/tos/sensorboards/mts400/HplSensirionSht11P.nc
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+#include "Timer.h"
+
+/**
+ * HplSensirionSht11P is a low-level component that controls power for
+ * the Sensirion SHT11 sensor on the telosb platform.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2010-06-15 21:19:52 $
+ */
+
+module HplSensirionSht11P {
+	provides interface SplitControl;
+	uses interface Timer<TMilli>;
+	uses interface Channel as ChannelHumidityClock;
+	uses interface Channel as ChannelHumidityData;
+	uses interface Channel as ChannelHumidityPower;
+	uses interface GeneralIO as DATA;
+	uses interface GeneralIO as SCK;
+	uses interface Resource;
+}
+implementation {
+
+	enum{
+		IDLE=0,
+		START,
+		STOP,
+	};
+	uint8_t state=IDLE;
+	
+	command error_t SplitControl.start() {
+		state=START;
+		return call Resource.request();
+	}
+	
+	event void Resource.granted(){
+		error_t err;
+		if(state==START){
+			if((err=call ChannelHumidityClock.open())==SUCCESS){
+				return;
+			}
+		}else{
+			call SCK.makeInput();
+			call SCK.clr();
+			call DATA.makeInput();
+			call DATA.clr();
+			if((err=call ChannelHumidityClock.close())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone(err);
+	}
+
+	event void ChannelHumidityClock.openDone(error_t err){
+		if (err==SUCCESS){
+			call ChannelHumidityData.open();
+			return;
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone( err );
+	}
+  
+	event void ChannelHumidityData.openDone(error_t err){
+		if (err==SUCCESS){
+			call ChannelHumidityPower.open();
+			return;
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone( err );
+	}
+	
+	event void ChannelHumidityPower.openDone(error_t err){
+		state=IDLE;
+		call Resource.release();
+		if (err==SUCCESS){
+			call Timer.startOneShot(11);
+			return;
+		}
+		signal SplitControl.startDone( err );
+	}
+
+	event void Timer.fired(){
+		signal SplitControl.startDone( SUCCESS );
+	}
+
+	command error_t SplitControl.stop(){
+		state=STOP;
+		return call Resource.request();
+	}
+	
+	event void ChannelHumidityClock.closeDone(error_t err){
+		if (err==SUCCESS){
+			call ChannelHumidityData.close();
+			return;
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.stopDone( err );
+	}
+  
+	event void ChannelHumidityData.closeDone(error_t err){
+		if (err==SUCCESS){
+			call ChannelHumidityPower.close();
+			return;
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.stopDone( err );
+	}
+	
+	event void ChannelHumidityPower.closeDone(error_t err){
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.stopDone( err );
+	}
+}
diff --git a/tos/sensorboards/mts400/HplTaos2550C.nc b/tos/sensorboards/mts400/HplTaos2550C.nc
new file mode 100644
index 00000000..18c3579c
--- /dev/null
+++ b/tos/sensorboards/mts400/HplTaos2550C.nc
@@ -0,0 +1,60 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#include"Taos2550.h"
+#include"Adg715.h"
+
+configuration HplTaos2550C {
+  provides interface Resource[ uint8_t id ];
+}
+implementation {
+	components HplTaos2550P;
+	components new FcfsArbiterC( UQ_TAOS2550 ) as Arbiter;
+	Resource = Arbiter;
+  
+	components new SplitControlPowerManagerC();
+	SplitControlPowerManagerC.SplitControl -> HplTaos2550P;
+	SplitControlPowerManagerC.ArbiterInfo -> Arbiter.ArbiterInfo;
+	SplitControlPowerManagerC.ResourceDefaultOwner -> Arbiter.ResourceDefaultOwner;
+	
+	components Adg715C;
+	HplTaos2550P.ChannelLightPower -> Adg715C.ChannelLightPower;
+	HplTaos2550P.Resource -> Adg715C.Resource[ unique(UQ_ADG715)];
+	
+	components new TimerMilliC()as Timer;
+	HplTaos2550P.Timer -> Timer;
+
+	components new Atm128I2CMasterC();
+	HplTaos2550P.I2CPacket -> Atm128I2CMasterC;
+	HplTaos2550P.I2CResource -> Atm128I2CMasterC;
+}
diff --git a/tos/sensorboards/mts400/HplTaos2550P.nc b/tos/sensorboards/mts400/HplTaos2550P.nc
new file mode 100644
index 00000000..998797ef
--- /dev/null
+++ b/tos/sensorboards/mts400/HplTaos2550P.nc
@@ -0,0 +1,135 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#include"Taos2550.h"
+
+module HplTaos2550P {
+	provides interface SplitControl;
+	uses interface Channel as ChannelLightPower;
+	uses interface Timer<TMilli> as Timer;
+	uses interface I2CPacket<TI2CBasicAddr>;
+	uses interface Resource as I2CResource;
+	uses interface Resource;
+}
+implementation {
+
+	enum{
+		IDLE=0,
+		START,
+		STOP,
+	};
+	norace uint8_t state=IDLE;
+	uint8_t cmd=TAOS_START;
+	
+	task void failTask();
+	task void startTimer();
+	
+	
+	command error_t SplitControl.start() {
+		state=START;
+		return call Resource.request();
+	}
+	
+	event void Resource.granted(){
+		error_t err;
+		if(state==START){
+			if((err=call ChannelLightPower.open())==SUCCESS){
+				return;
+			}
+		}else{
+			if((err=call ChannelLightPower.close())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone(err);
+	}
+	
+	event void ChannelLightPower.openDone(error_t err){
+		if(err==SUCCESS){
+			if((err=call I2CResource.request())==SUCCESS){
+				return;
+			}
+		}
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.startDone(err);
+	}
+	
+	event void I2CResource.granted(){
+		error_t err;
+		if((err=call I2CPacket.write(0x03,TAOS_I2C_ADDR,1,&cmd))!=SUCCESS){
+			state=IDLE;
+			call Resource.release();
+			call I2CResource.release();
+			signal SplitControl.startDone(err);
+		}
+	}
+	
+	async event void I2CPacket.writeDone(error_t error, uint16_t addr,uint8_t length, uint8_t* data){
+		state=IDLE;
+		call Resource.release();
+		call I2CResource.release();
+		if(error!=SUCCESS){
+			post failTask();
+		}else{
+			post startTimer();
+		}
+	}
+	
+	event void Timer.fired(){
+		signal SplitControl.startDone(SUCCESS);
+	}
+	
+	command error_t SplitControl.stop() {
+		state=STOP;
+		return  call Resource.request();
+	}
+	
+	event void ChannelLightPower.closeDone(error_t err)	{
+		state=IDLE;
+		call Resource.release();
+		signal SplitControl.stopDone(err);
+	}
+	
+	task void failTask(){
+		signal SplitControl.startDone(FAIL);
+	}
+	
+	task void startTimer(){
+		call Timer.startOneShot(WARM_UP_TIME);
+	}
+	
+	async event void I2CPacket.readDone(error_t error, uint16_t addr,uint8_t length, uint8_t* data){}
+}
diff --git a/tos/sensorboards/mts400/Intersema.nc b/tos/sensorboards/mts400/Intersema.nc
new file mode 100644
index 00000000..ee746275
--- /dev/null
+++ b/tos/sensorboards/mts400/Intersema.nc
@@ -0,0 +1,37 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+interface Intersema {
+  command error_t read();
+  event void readDone(error_t error, int16_t* mesResult);
+}
diff --git a/tos/sensorboards/mts400/Intersema5534.h b/tos/sensorboards/mts400/Intersema5534.h
new file mode 100644
index 00000000..f2d6c2ab
--- /dev/null
+++ b/tos/sensorboards/mts400/Intersema5534.h
@@ -0,0 +1,45 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#ifndef INTERSEMA5534_H
+#define INTERSEMA5534_H
+	
+#define UQ_INTERSEMA5534 "Intersema5534.Resource"
+#define PRESSURE_TIMEOUT_TRIES	5
+
+
+void inline TOSH_wait() {
+	asm volatile  ("nop" ::);
+}  
+
+#endif
diff --git a/tos/sensorboards/mts400/Intersema5534C.nc b/tos/sensorboards/mts400/Intersema5534C.nc
new file mode 100644
index 00000000..a602c15d
--- /dev/null
+++ b/tos/sensorboards/mts400/Intersema5534C.nc
@@ -0,0 +1,50 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#include "Intersema5534.h"
+
+generic configuration Intersema5534C() {
+	provides interface Intersema;
+
+}
+implementation {
+	components new Intersema5534ReaderP();
+	Intersema = Intersema5534ReaderP.Intersema;
+	
+	components HalIntersema5534C;
+	
+	Intersema5534ReaderP.Resource -> HalIntersema5534C.Resource[ unique(UQ_INTERSEMA5534)];
+	Intersema5534ReaderP.TempRead -> HalIntersema5534C.Temp;
+	Intersema5534ReaderP.PressRead -> HalIntersema5534C.Press;
+	Intersema5534ReaderP.Cal -> HalIntersema5534C.Cal;
+}
diff --git a/tos/sensorboards/mts400/Intersema5534LogicP.nc b/tos/sensorboards/mts400/Intersema5534LogicP.nc
new file mode 100644
index 00000000..552409b3
--- /dev/null
+++ b/tos/sensorboards/mts400/Intersema5534LogicP.nc
@@ -0,0 +1,293 @@
+/*									tab:4
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Joe Polastre
+ *
+ * $Id: Intersema5534LogicP.nc,v 1.2 2010-06-29 22:07:56 scipio Exp $
+ */
+
+
+#include "Intersema5534.h"
+
+generic module Intersema5534LogicP()
+{
+	provides interface Read<uint16_t> as Temp;
+	provides interface Read<uint16_t> as Press;
+	provides interface Calibration as Cal;
+	uses interface Timer<TMilli> as Timer;
+	uses interface GeneralIO as SPI_CLK;
+	uses interface GeneralIO as SPI_SI;
+	uses interface GeneralIO as SPI_SO;
+}
+implementation
+{
+	enum{
+		IDLE=0,
+		CALIB,
+		TEMP,
+		PRESS,
+	};
+	uint8_t state=IDLE;
+	uint8_t timeout=0;
+	uint16_t calibration[4];
+	uint16_t reading;
+	
+	void write_bit(bool);
+	uint8_t read_bit();
+	uint16_t spi_word(uint8_t);
+	uint16_t data_read();
+	void pulse_clock();
+	void spi_reset();
+	void sense();
+	
+	task void SPITask();
+	task void gotInterrupt();
+	
+	command error_t Cal.getData(){
+		if(state==IDLE){
+			state=CALIB;
+			post SPITask();
+			return SUCCESS;
+		}
+		return FAIL;
+	}
+	
+	command error_t Press.read() {
+		if (state == IDLE) {
+			state = PRESS;
+			post SPITask();
+			return SUCCESS;
+	    	}
+    		return FAIL;
+	}
+
+	command error_t Temp.read() {
+		if (state == IDLE) {
+			state = TEMP;
+			post SPITask();
+			return SUCCESS;
+		}
+		return FAIL;
+	}	
+	
+	task void SPITask() {
+		uint8_t i;
+		if(state==CALIB){
+			atomic {
+				for (i = 0; i < 4; i++) {
+					// reset the device
+					spi_reset();
+					calibration[i] = spi_word(i+1);
+				}
+			}
+			// send the calibration data up to the application
+			state = IDLE; 
+			signal Cal.dataReady(SUCCESS, calibration);
+		}else{
+			atomic {
+				// reset the device
+				spi_reset();
+				// grab the sensor reading and store it locally
+				sense();
+			}
+		}
+	}
+	
+	void task gotInterrupt() {
+		uint16_t l_reading;
+		atomic {
+			reading = data_read();
+		}
+		l_reading = reading;
+
+		// give the application the sensor data
+		if (state == TEMP) {
+			state = IDLE;
+			signal Temp.readDone(SUCCESS,l_reading);
+		}
+		else if (state == PRESS) {
+			state = IDLE;
+			signal Press.readDone(SUCCESS,l_reading);
+		}
+	}
+		
+	uint16_t data_read() {
+		uint16_t result = 0,tresult = 0;
+		uint8_t i;
+		TOSH_wait();
+		for (i = 0; i < 16; i++) {
+			tresult = (uint16_t)read_bit();
+			tresult = tresult << (15-i);
+			result += tresult;
+		}
+		return result;      
+	}
+	
+	void pulse_clock() {
+		TOSH_wait();
+		TOSH_wait();
+		call SPI_CLK.set();
+		TOSH_wait();
+		TOSH_wait();
+		call SPI_CLK.clr();
+	}
+	
+	void write_bit(bool bit) {
+		if (bit)
+			call SPI_SO.set();
+		else
+			call SPI_SO.clr();
+			pulse_clock();
+	}
+	
+	uint8_t read_bit() {
+		uint8_t i;
+		call SPI_SO.clr();
+		call SPI_CLK.set();
+		TOSH_wait();
+		TOSH_wait();
+		i = call SPI_SI.get();
+		call SPI_CLK.clr();
+		return i;
+	}
+		
+	uint16_t spi_word(uint8_t num) {
+		uint8_t i;
+		TOSH_wait();
+		TOSH_wait();
+		// write first byte
+		for (i = 0; i < 3; i++) {
+			write_bit(TRUE);
+		}
+		write_bit(FALSE);
+		write_bit(TRUE);
+		if (num == 1) {
+			write_bit(FALSE);
+			write_bit(TRUE);
+			write_bit(FALSE);
+			write_bit(TRUE);
+		}
+		else if (num == 2) {
+			write_bit(FALSE);
+			write_bit(TRUE);
+			write_bit(TRUE);
+			write_bit(FALSE);
+		}
+		else if (num == 3) {
+			write_bit(TRUE);
+			write_bit(FALSE);
+			write_bit(FALSE);
+			write_bit(TRUE);
+		}
+		else if (num == 4) {
+			write_bit(TRUE);
+			write_bit(FALSE);
+			write_bit(TRUE);
+			write_bit(FALSE);
+		}
+		for (i = 0; i < 4; i++){ 
+			write_bit(FALSE);
+		}
+		TOSH_wait();
+		return data_read();
+	}
+	
+	void spi_reset() {
+		uint8_t i = 0;
+		for (i = 0; i < 21; i++) {
+			if (i < 16) {
+				if ((i % 2) == 0)
+					write_bit(TRUE);
+				else
+					write_bit(FALSE);
+			}
+			else
+				write_bit(FALSE);
+		} 
+	}
+	
+	void sense() {
+		uint8_t i;
+		TOSH_wait();
+		TOSH_wait();
+		// write first byte
+		for (i = 0; i < 3; i++) {
+			write_bit(TRUE);
+		}
+		if (state == PRESS) {
+			write_bit(TRUE);
+			write_bit(FALSE);
+			write_bit(TRUE);
+			write_bit(FALSE);
+		}
+		else if (state == TEMP) {
+			write_bit(TRUE);
+			write_bit(FALSE);
+			write_bit(FALSE);
+			write_bit(TRUE);
+		}
+		for (i = 0; i < 5; i++) {
+			write_bit(FALSE);
+		}
+		timeout = 0;
+		call Timer.startOneShot(36);
+	}
+
+	event void Timer.fired() {
+		if (call SPI_SI.get() == 1) {
+		      	timeout++;
+			if (timeout > PRESSURE_TIMEOUT_TRIES) {
+				if (state == PRESS) {
+					state = IDLE;
+					signal Press.readDone( FAIL, 0 );
+					return;
+				}else if (state == TEMP) {
+					state = IDLE;
+					signal Temp.readDone( FAIL, 0 );
+					return;
+				}
+			}
+      			call Timer.startOneShot(20);
+	    	} 
+		else 
+			post gotInterrupt();
+	}
+}
diff --git a/tos/sensorboards/mts400/Intersema5534ReaderP.nc b/tos/sensorboards/mts400/Intersema5534ReaderP.nc
new file mode 100644
index 00000000..ca0317e8
--- /dev/null
+++ b/tos/sensorboards/mts400/Intersema5534ReaderP.nc
@@ -0,0 +1,119 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+generic module Intersema5534ReaderP()
+{
+	provides interface Intersema;
+	
+	uses interface Resource;
+	uses interface Read<uint16_t> as TempRead;
+	uses interface Read<uint16_t> as PressRead;
+	uses interface Calibration as Cal;
+}
+implementation
+{
+	int16_t mesResults[2];
+	int32_t C1,C2,C3,C4,C5,C6,UT1,dT,T2;
+	bool startUP=TRUE;
+	
+	command error_t Intersema.read() {
+		return call Resource.request();
+	}
+
+	event void Resource.granted() {
+		error_t result;
+		if ((result = startUP ? call Cal.getData() : call TempRead.read()) != SUCCESS) {
+			call Resource.release();
+			signal Intersema.readDone( result, 0 );
+		}
+		startUP=FALSE;
+	}
+	
+	event void Cal.dataReady(error_t error, uint16_t* calibration){
+		if(error==SUCCESS){
+			C1=(int32_t)((calibration[0] & 0xFFFE)>>1);
+			C2=(int32_t)(((calibration[2] & 0x003F)<<6)|(calibration[3] & 0x003F));
+			C3=(int32_t)((calibration[3] & 0xFFC0)>>6);
+			C4=(int32_t)((calibration[2] & 0xFFC0)>>6);
+			C5=(int32_t)(((calibration[0] & 0x0001)<<10)| ((calibration[1] & 0xFFC0)>>6));
+			C6=(int32_t)(calibration[1] & 0x003F);
+			UT1=(C5<<3)+20224;
+			if ((error = call TempRead.read()) == SUCCESS) {
+				return;
+			}
+		}
+		call Resource.release();
+		signal Intersema.readDone( error, 0 );
+	}
+		
+	event void TempRead.readDone( error_t error, uint16_t val ) {
+		
+		if(error==SUCCESS){
+			dT=(int32_t)val-UT1;
+			mesResults[0]=200+((dT*(C6+50))>>10);
+			if(mesResults[0]<200){
+				T2=(11*(C6+24)*(200-(int32_t)mesResults[0])*(200-(int32_t)mesResults[0]))>>20;
+			}else if (mesResults[0]>450){
+				T2=(3*(C6+24)*(450-(int32_t)mesResults[0])*(450-(int32_t)mesResults[0]))>>20;
+			}
+			else{
+				T2=0;
+			}
+			mesResults[0]-=T2;
+			if ((error = call PressRead.read()) == SUCCESS) {
+				return;
+			}
+		}
+		call Resource.release();
+		signal Intersema.readDone( error, 0);
+	}
+
+	event void PressRead.readDone( error_t error, uint16_t val ) {
+		
+		int32_t SENS,OFF,X;
+		
+		call Resource.release();
+		if(error==SUCCESS){
+			OFF=(C2<<2)+(((C4-512)*dT)>>12);
+			SENS=C1+((C3*dT)>>10)+24576;
+			X=((SENS*((int32_t)val-7168))>>14)-OFF;
+			mesResults[1]=(((X*10)>>5)+2500);
+			if(mesResults[0]<200){
+				mesResults[1]-=3*T2*(((int32_t)mesResults[1]-3500)>>14);
+			}else if(mesResults[0]>450){
+				mesResults[1]-=T2*(((int32_t)mesResults[1]-10000)>>13);
+			}
+		}
+		signal Intersema.readDone( error, mesResults);
+	}
+}
diff --git a/tos/sensorboards/mts400/SensirionSht11C.nc b/tos/sensorboards/mts400/SensirionSht11C.nc
new file mode 100644
index 00000000..bc9e45b0
--- /dev/null
+++ b/tos/sensorboards/mts400/SensirionSht11C.nc
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * SensirionSht11C is a top-level access component for the Sensirion
+ * SHT11 model humidity and temperature sensor, available on the
+ * telosb platform. Because this component represents one physical
+ * device, simultaneous calls to read temperature and humidity will be
+ * arbitrated and executed in sequential order. Feel free to read both
+ * at the same time, just be aware that they'll come back
+ * sequentially.
+ *
+ * @author Gilman Tolle <gtolle@archrock.com>
+ * @version $Revision: 1.2 $ $Date: 2010-06-15 21:19:53 $
+ */
+
+generic configuration SensirionSht11C() {
+  provides interface Read<uint16_t> as Temperature;
+  provides interface DeviceMetadata as TemperatureMetadata;
+  provides interface Read<uint16_t> as Humidity;
+  provides interface DeviceMetadata as HumidityMetadata;
+}
+implementation {
+  components new SensirionSht11ReaderP();
+
+  Temperature = SensirionSht11ReaderP.Temperature;
+  TemperatureMetadata = SensirionSht11ReaderP.TemperatureMetadata;
+  Humidity = SensirionSht11ReaderP.Humidity;
+  HumidityMetadata = SensirionSht11ReaderP.HumidityMetadata;
+
+  components HalSensirionSht11C;
+
+  enum { TEMP_KEY = unique("Sht11.Resource") };
+  enum { HUM_KEY = unique("Sht11.Resource") };
+
+  SensirionSht11ReaderP.TempResource -> HalSensirionSht11C.Resource[ TEMP_KEY ];
+  SensirionSht11ReaderP.Sht11Temp -> HalSensirionSht11C.SensirionSht11[ TEMP_KEY ];
+  SensirionSht11ReaderP.HumResource -> HalSensirionSht11C.Resource[ HUM_KEY ];
+  SensirionSht11ReaderP.Sht11Hum -> HalSensirionSht11C.SensirionSht11[ HUM_KEY ];
+}
diff --git a/tos/sensorboards/mts400/Taos2550.h b/tos/sensorboards/mts400/Taos2550.h
new file mode 100644
index 00000000..26b0d08e
--- /dev/null
+++ b/tos/sensorboards/mts400/Taos2550.h
@@ -0,0 +1,47 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#ifndef TAOS2550_H
+#define TAOS2550_H
+	
+#define UQ_TAOS2550 "Taos2550.Resource"
+
+enum{
+	TAOS_I2C_ADDR = 0x39,
+	TAOS_I2C_ADC0 =0x43,
+	TAOS_I2C_ADC1 =0x83,
+	TAOS_START = 0x03,
+	WARM_UP_TIME = 900,
+};
+
+#endif
diff --git a/tos/sensorboards/mts400/Taos2550C.nc b/tos/sensorboards/mts400/Taos2550C.nc
new file mode 100644
index 00000000..2f61f95f
--- /dev/null
+++ b/tos/sensorboards/mts400/Taos2550C.nc
@@ -0,0 +1,55 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#include "Taos2550.h"
+
+generic configuration Taos2550C() {
+	provides interface Read<uint16_t> as VisibleLight;
+	provides interface Read<uint16_t> as InfraredLight;
+}
+implementation {
+	components new Taos2550ReaderP();
+	
+	VisibleLight = Taos2550ReaderP.VisibleLight;
+	InfraredLight = Taos2550ReaderP.InfraredLight;
+	
+	components HalTaos2550C;
+	
+	enum {	VL_KEY = unique(UQ_TAOS2550)};
+	enum {	IRL_KEY = unique(UQ_TAOS2550)};
+	
+	Taos2550ReaderP.VLResource -> HalTaos2550C.Resource[ VL_KEY ];
+	Taos2550ReaderP.VLRead -> HalTaos2550C.VLight;
+	Taos2550ReaderP.IRResource -> HalTaos2550C.Resource[ IRL_KEY];
+	Taos2550ReaderP.IRRead -> HalTaos2550C.IRLight;
+}
diff --git a/tos/sensorboards/mts400/Taos2550LogicP.nc b/tos/sensorboards/mts400/Taos2550LogicP.nc
new file mode 100644
index 00000000..fcb0d709
--- /dev/null
+++ b/tos/sensorboards/mts400/Taos2550LogicP.nc
@@ -0,0 +1,113 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+#include"Taos2550.h"
+
+generic module Taos2550LogicP()
+{
+	provides interface Read<uint16_t> as VLight;
+	provides interface Read<uint16_t> as IRLight;
+	uses interface I2CPacket<TI2CBasicAddr>;
+	uses interface Resource as I2CResource;
+}
+implementation
+{
+	task void read();
+	task void readDone();
+	task void failTask();
+	error_t performCommand(uint8_t);
+	
+	uint8_t cmd,readData;
+
+	command error_t VLight.read() {
+		return performCommand(TAOS_I2C_ADC0);
+	}
+  
+	command error_t IRLight.read() {
+		return performCommand(TAOS_I2C_ADC1);
+	}
+
+	error_t performCommand(uint8_t Command) {
+		cmd=Command;
+		return call I2CResource.request(); 
+	}
+    
+	event void I2CResource.granted(){
+		if(call I2CPacket.write(0x03,TAOS_I2C_ADDR,1,&cmd)!=SUCCESS){
+			call I2CResource.release();
+			post failTask();
+		}
+	}
+	
+	async event void I2CPacket.writeDone(error_t error, uint16_t addr,uint8_t length, uint8_t* data){
+		if(error!=SUCCESS){	
+			call I2CResource.release();
+			post failTask();
+		}else{
+			post read();
+		}
+	}
+		
+	task void read(){
+		if(call I2CPacket.read(0x03,TAOS_I2C_ADDR,1,&readData)!=SUCCESS){
+			call I2CResource.release();
+			post failTask();
+		}
+	}	
+	
+	async event void I2CPacket.readDone(error_t error, uint16_t addr,uint8_t length, uint8_t* data){
+		call I2CResource.release();
+		if(error!=SUCCESS){
+			post failTask();
+		}else{
+			post readDone();
+		}
+	}
+	
+	task void readDone(){
+		error_t res=(readData>>7==1)?SUCCESS:FAIL;
+		if(cmd==TAOS_I2C_ADC0){
+			signal VLight.readDone( res, readData );
+		} else {
+			signal IRLight.readDone( res, readData );
+		}
+	}
+	
+	task void failTask(){
+		if(cmd==TAOS_I2C_ADC0){
+			signal VLight.readDone( FAIL, 0 );
+		} else {
+			signal IRLight.readDone( FAIL, 0 );
+		}
+	}
+}
diff --git a/tos/sensorboards/mts400/Taos2550ReaderP.nc b/tos/sensorboards/mts400/Taos2550ReaderP.nc
new file mode 100644
index 00000000..a57aec62
--- /dev/null
+++ b/tos/sensorboards/mts400/Taos2550ReaderP.nc
@@ -0,0 +1,84 @@
+/** Copyright (c) 2009, University of Szeged
+* All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* - Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* - Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* - Neither the name of University of Szeged nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+* OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+* Author: Zoltan Kincses
+*/
+
+generic module Taos2550ReaderP()
+{
+	provides interface Read<uint16_t> as VisibleLight;
+	provides interface Read<uint16_t> as InfraredLight;
+
+	uses interface Resource as VLResource;
+	uses interface Resource as IRResource;
+	uses interface Read<uint16_t> as VLRead;
+	uses interface Read<uint16_t> as IRRead;
+	
+	uses interface DiagMsg;
+}
+implementation
+{
+	command error_t VisibleLight.read() {
+		return call VLResource.request();;
+	}
+
+	event void VLResource.granted() {
+		error_t result;
+		if ((result = call VLRead.read()) != SUCCESS) {
+			call VLResource.release();
+			signal VisibleLight.readDone( result, 0 );
+		}
+	}
+
+	event void VLRead.readDone( error_t result, uint16_t val ) {
+		call VLResource.release();
+		signal VisibleLight.readDone( result, val );
+	}
+
+	command error_t InfraredLight.read() {
+		return call IRResource.request();
+	}
+
+	event void IRResource.granted() {
+		error_t result;
+		if ((result = call IRRead.read()) != SUCCESS) {
+			call IRResource.release();
+			signal InfraredLight.readDone( result, 0 );
+		}
+	}
+
+	event void IRRead.readDone( error_t result, uint16_t val ) {
+		call IRResource.release();
+		signal InfraredLight.readDone( result, val );
+	}
+	
+	default event void VisibleLight.readDone( error_t result, uint16_t val ) { }
+  	default event void InfraredLight.readDone( error_t result, uint16_t val ) { }
+}
diff --git a/tos/system/AMQueueEntryP.nc b/tos/system/AMQueueEntryP.nc
new file mode 100644
index 00000000..2e9f207a
--- /dev/null
+++ b/tos/system/AMQueueEntryP.nc
@@ -0,0 +1,77 @@
+// $Id: AMQueueEntryP.nc,v 1.7 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Internal AM component that fills in needed packet fields for the 
+ * AMSend -> Send transformation.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ */ 
+
+#include "AM.h"
+
+generic module AMQueueEntryP(am_id_t amId) @safe() {
+  provides interface AMSend;
+  uses{
+    interface Send;
+    interface AMPacket;
+  }
+}
+
+implementation {
+
+  command error_t AMSend.send(am_addr_t dest,
+			      message_t* msg,
+			      uint8_t len) {
+    call AMPacket.setDestination(msg, dest);
+    call AMPacket.setType(msg, amId);
+    return call Send.send(msg, len);
+  }
+
+  command error_t AMSend.cancel(message_t* msg) {
+    return call Send.cancel(msg);
+  }
+
+  event void Send.sendDone(message_t* m, error_t err) {
+    signal AMSend.sendDone(m, err);
+  }
+  
+  command uint8_t AMSend.maxPayloadLength() {
+    return call Send.maxPayloadLength();
+  }
+
+  command void* AMSend.getPayload(message_t* m, uint8_t len) {
+    return call Send.getPayload(m, len);
+  }
+  
+}
diff --git a/tos/system/AMQueueImplP.nc b/tos/system/AMQueueImplP.nc
new file mode 100644
index 00000000..055f1de6
--- /dev/null
+++ b/tos/system/AMQueueImplP.nc
@@ -0,0 +1,221 @@
+// $Id: AMQueueImplP.nc,v 1.11 2010-06-29 22:07:56 scipio Exp $
+/*
+* Copyright (c) 2005 Stanford University. All rights reserved.
+*
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/**
+ * An AM send queue that provides a Service Instance pattern for
+ * formatted packets and calls an underlying AMSend in a round-robin
+ * fashion. Used to share L2 bandwidth between different communication
+ * clients.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ */ 
+
+#include "AM.h"
+
+generic module AMQueueImplP(int numClients) @safe() {
+    provides interface Send[uint8_t client];
+    uses{
+        interface AMSend[am_id_t id];
+        interface AMPacket;
+        interface Packet;
+    }
+}
+
+implementation {
+    typedef struct {
+        message_t* ONE_NOK msg;
+    } queue_entry_t;
+  
+    uint8_t current = numClients; // mark as empty
+    queue_entry_t queue[numClients];
+    uint8_t cancelMask[numClients/8 + 1];
+
+    void tryToSend();
+  
+    void nextPacket() {
+        uint8_t i;
+        current = (current + 1) % numClients;
+        for(i = 0; i < numClients; i++) {
+            if((queue[current].msg == NULL) ||
+               (cancelMask[current/8] & (1 << current%8)))
+            {
+                current = (current + 1) % numClients;
+            }
+            else {
+                break;
+            }
+        }
+        if(i >= numClients) current = numClients;
+    }
+
+    /**
+     * Accepts a properly formatted AM packet for later sending.
+     * Assumes that someone has filled in the AM packet fields
+     * (destination, AM type).
+     *
+     * @param msg - the message to send
+     * @param len - the length of the payload
+     *
+     */
+    command error_t Send.send[uint8_t clientId](message_t* msg,
+                                                uint8_t len) {
+        if (clientId >= numClients) {
+            return FAIL;
+        }
+        if (queue[clientId].msg != NULL) {
+            return EBUSY;
+        }
+        dbg("AMQueue", "AMQueue: request to send from %hhu (%p): passed checks\n", clientId, msg);
+        
+        queue[clientId].msg = msg;
+        call Packet.setPayloadLength(msg, len);
+    
+        if (current >= numClients) { // queue empty
+            error_t err;
+            am_id_t amId = call AMPacket.type(msg);
+            am_addr_t dest = call AMPacket.destination(msg);
+      
+            dbg("AMQueue", "%s: request to send from %hhu (%p): queue empty\n", __FUNCTION__, clientId, msg);
+            current = clientId;
+            
+            err = call AMSend.send[amId](dest, msg, len);
+            if (err != SUCCESS) {
+                dbg("AMQueue", "%s: underlying send failed.\n", __FUNCTION__);
+                current = numClients;
+                queue[clientId].msg = NULL;
+                
+            }
+            return err;
+        }
+        else {
+            dbg("AMQueue", "AMQueue: request to send from %hhu (%p): queue not empty\n", clientId, msg);
+        }
+        return SUCCESS;
+    }
+
+    task void CancelTask() {
+        uint8_t i,j,mask,last;
+        message_t *msg;
+        for(i = 0; i < numClients/8 + 1; i++) {
+            if(cancelMask[i]) {
+                for(mask = 1, j = 0; j < 8; j++) {
+                    if(cancelMask[i] & mask) {
+                        last = i*8 + j;
+                        msg = queue[last].msg;
+                        queue[last].msg = NULL;
+                        cancelMask[i] &= ~mask;
+                        signal Send.sendDone[last](msg, ECANCEL);
+                    }
+                    mask <<= 1;
+                }
+            }
+        }
+    }
+    
+    command error_t Send.cancel[uint8_t clientId](message_t* msg) {
+        if (clientId >= numClients ||         // Not a valid client    
+            queue[clientId].msg == NULL ||    // No packet pending
+            queue[clientId].msg != msg) {     // Not the right packet
+            return FAIL;
+        }
+        if(current == clientId) {
+            am_id_t amId = call AMPacket.type(msg);
+            error_t err = call AMSend.cancel[amId](msg);
+            return err;
+        }
+        else {
+            cancelMask[clientId/8] |= 1 << clientId % 8;
+            post CancelTask();
+            return SUCCESS;
+        }
+    }
+
+    void sendDone(uint8_t last, message_t * ONE msg, error_t err) {
+        queue[last].msg = NULL;
+        tryToSend();
+        signal Send.sendDone[last](msg, err);
+    }
+
+    task void errorTask() {
+        sendDone(current, queue[current].msg, FAIL);
+    }
+
+    // NOTE: Increments current!
+    void tryToSend() {
+        nextPacket();
+        if (current < numClients) { // queue not empty
+            error_t nextErr;
+            message_t* nextMsg = queue[current].msg;
+            am_id_t nextId = call AMPacket.type(nextMsg);
+            am_addr_t nextDest = call AMPacket.destination(nextMsg);
+            uint8_t len = call Packet.payloadLength(nextMsg);
+            nextErr = call AMSend.send[nextId](nextDest, nextMsg, len);
+            if(nextErr != SUCCESS) {
+                post errorTask();
+            }
+        }
+    }
+  
+    event void AMSend.sendDone[am_id_t id](message_t* msg, error_t err) {
+      // Bug fix from John Regehr: if the underlying radio mixes things
+      // up, we don't want to read memory incorrectly. This can occur
+      // on the mica2.
+      // Note that since all AM packets go through this queue, this
+      // means that the radio has a problem. -pal
+      if (current >= numClients) {
+	return;
+      }
+      if(queue[current].msg == msg) {
+	sendDone(current, msg, err);
+      }
+      else {
+	dbg("PointerBug", "%s received send done for %p, signaling for %p.\n",
+	    __FUNCTION__, msg, queue[current].msg);
+      }
+    }
+    
+    command uint8_t Send.maxPayloadLength[uint8_t id]() {
+        return call AMSend.maxPayloadLength[0]();
+    }
+
+    command void* Send.getPayload[uint8_t id](message_t* m, uint8_t len) {
+      return call AMSend.getPayload[0](m, len);
+    }
+
+    default event void Send.sendDone[uint8_t id](message_t* msg, error_t err) {
+        // Do nothing
+    }
+    default command error_t AMSend.send[uint8_t id](am_addr_t am_id, message_t* msg, uint8_t len) {
+        return FAIL;
+    }
+}
diff --git a/tos/system/AMQueueP.nc b/tos/system/AMQueueP.nc
new file mode 100644
index 00000000..81669f42
--- /dev/null
+++ b/tos/system/AMQueueP.nc
@@ -0,0 +1,59 @@
+// $Id: AMQueueP.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The fair-share send queue for AM radio communication.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ */ 
+
+#include "AM.h"
+
+configuration AMQueueP {
+  provides interface Send[uint8_t client];
+}
+
+implementation {
+  enum {
+    NUM_CLIENTS = uniqueCount(UQ_AMQUEUE_SEND)
+  };
+  
+  components new AMQueueImplP(NUM_CLIENTS), ActiveMessageC;
+
+  Send = AMQueueImplP;
+  AMQueueImplP.AMSend -> ActiveMessageC;
+  AMQueueImplP.AMPacket -> ActiveMessageC;
+  AMQueueImplP.Packet -> ActiveMessageC;
+  
+}
+
diff --git a/tos/system/AMReceiverC.nc b/tos/system/AMReceiverC.nc
new file mode 100644
index 00000000..6f241b30
--- /dev/null
+++ b/tos/system/AMReceiverC.nc
@@ -0,0 +1,57 @@
+// $Id: AMReceiverC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The virtualized AM reception abstraction.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "AM.h"
+
+generic configuration AMReceiverC(am_id_t amId) {
+  provides {
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+
+implementation {
+  components ActiveMessageC;
+
+  Receive = ActiveMessageC.Receive[amId];
+  Packet = ActiveMessageC;
+  AMPacket = ActiveMessageC;
+}
diff --git a/tos/system/AMSenderC.nc b/tos/system/AMSenderC.nc
new file mode 100644
index 00000000..31fabbb4
--- /dev/null
+++ b/tos/system/AMSenderC.nc
@@ -0,0 +1,68 @@
+// $Id: AMSenderC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The virtualized active message send abstraction. Each instantiation
+ * of AMSenderC has its own queue of depth one. Therefore, it does not
+ * have to contend with other AMSenderC instantiations for queue space.
+ * The underlying implementation schedules the packets in these queues
+ * using some form of fair-share queueing.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "AM.h"
+
+generic configuration AMSenderC(am_id_t AMId) {
+  provides {
+    interface AMSend;
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+
+implementation {
+
+#if defined(LOW_POWER_LISTENING)
+  components new LplAMSenderC(AMId) as SenderC;
+#else
+  components new DirectAMSenderC(AMId) as SenderC;
+#endif
+
+  AMSend = SenderC;
+  Packet = SenderC;
+  AMPacket = SenderC;
+  Acks = SenderC;
+}
diff --git a/tos/system/AMSnooperC.nc b/tos/system/AMSnooperC.nc
new file mode 100644
index 00000000..13325020
--- /dev/null
+++ b/tos/system/AMSnooperC.nc
@@ -0,0 +1,58 @@
+// $Id: AMSnooperC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The virtualization of snooping on overheard packets that are not
+ * destined to this node. 
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "AM.h"
+
+generic configuration AMSnooperC(am_id_t AMId) {
+  provides {
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+
+implementation {
+  components ActiveMessageC;
+
+  Receive = ActiveMessageC.Snoop[AMId];
+  Packet = ActiveMessageC;
+  AMPacket = ActiveMessageC;
+}
diff --git a/tos/system/AMSnoopingReceiverC.nc b/tos/system/AMSnoopingReceiverC.nc
new file mode 100644
index 00000000..46bed274
--- /dev/null
+++ b/tos/system/AMSnoopingReceiverC.nc
@@ -0,0 +1,59 @@
+// $Id: AMSnoopingReceiverC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The virtualized abstraction to hearing all packets of a given AM type,
+ * whether destined for this node or not.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "AM.h"
+
+generic configuration AMSnoopingReceiverC(am_id_t AMId) {
+  provides {
+    interface Receive;
+    interface Packet;
+    interface AMPacket;
+  }
+}
+
+implementation {
+  components ActiveMessageC;
+
+  Receive = ActiveMessageC.Snoop[AMId];
+  Receive = ActiveMessageC.Receive[AMId];
+  Packet = ActiveMessageC;
+  AMPacket = ActiveMessageC;
+}
diff --git a/tos/system/ActiveMessageAddressC.nc b/tos/system/ActiveMessageAddressC.nc
new file mode 100644
index 00000000..4d55c355
--- /dev/null
+++ b/tos/system/ActiveMessageAddressC.nc
@@ -0,0 +1,131 @@
+// $Id: ActiveMessageAddressC.nc,v 1.10 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2004-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Date last modified:  $Id: ActiveMessageAddressC.nc,v 1.10 2010-06-29 22:07:56 scipio Exp $
+ *
+ */
+
+/**
+ * Component that stores the node's active message address and group ID.
+ *
+ * @author Philip Levis
+ * @author David Moss
+ */
+
+module ActiveMessageAddressC @safe() {
+  provides {
+    interface ActiveMessageAddress;
+    async command am_addr_t amAddress();
+    async command void setAmAddress(am_addr_t a);
+  }
+}
+implementation {
+
+  /** Node address */
+  am_addr_t addr = TOS_AM_ADDRESS;
+
+  /** Group address */
+  am_group_t group = TOS_AM_GROUP;
+ 
+  
+  /***************** ActiveMessageAddress Commands ****************/
+  /**
+   * @return the active message address of this node
+   */
+  async command am_addr_t ActiveMessageAddress.amAddress() {
+    return call amAddress();
+  }
+  
+  /**
+   * Set the active message address of this node
+   * @param group The node's group ID
+   * @param addr The node's active message address
+   */
+  async command void ActiveMessageAddress.setAddress(am_group_t myGroup, am_addr_t myAddr) {
+    atomic {
+      addr = myAddr;
+      group = myGroup;
+    }
+    signal ActiveMessageAddress.changed();
+  }
+  
+    
+  /**
+   * @return the group address of this node
+   */
+  async command am_group_t ActiveMessageAddress.amGroup() {
+    am_group_t myGroup;
+    atomic myGroup = group;
+    return myGroup;
+  }
+  
+
+  /***************** Deprecated Commands ****************/
+  /**
+   * Get the node's default AM address.
+   * @return address
+   * @deprecated Use ActiveMessageAddress.amAddress() instead
+   */
+  async command am_addr_t amAddress() {
+    am_addr_t myAddr;
+    atomic myAddr = addr;
+    return myAddr;
+  }
+  
+  /**
+   * Set the node's default AM address.
+   *
+   * @param a - the address.
+   * @deprecated Use ActiveMessageAddress.setAddress() instead
+   */
+  async command void setAmAddress(am_addr_t a) {
+    atomic addr = a;
+    signal ActiveMessageAddress.changed();
+  }
+  
+  
+  /***************** Defaults ****************/
+  /**
+   * Notification that the address of this node changed.
+   */
+  default async event void ActiveMessageAddress.changed() {
+  }
+  
+}
diff --git a/tos/system/ActiveMessageImplP.nc b/tos/system/ActiveMessageImplP.nc
new file mode 100644
index 00000000..65159c2b
--- /dev/null
+++ b/tos/system/ActiveMessageImplP.nc
@@ -0,0 +1,75 @@
+// $Id: ActiveMessageImplP.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2004 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+
+/**
+ * The underlying configuration of the AM layer.  and exports
+ * the AM interfaces. <b>Deprecated</b> and so should not be wired to.
+ *
+ * @author Philip Levis
+ * @date   January 5 2005
+ */ 
+
+#include "AM.h"
+
+configuration ActiveMessageImplP {
+  provides {
+    interface SplitControl;      
+    interface AMSend[am_id_t id];
+    interface Receive[am_id_t id];
+    interface Receive as Snoop[am_id_t id];
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements;
+  }
+}
+
+implementation {
+  components ActiveMessageC;
+
+  SplitControl = ActiveMessageC;
+  AMSend = ActiveMessageC;
+  Receive = ActiveMessageC.Receive;
+  Snoop = ActiveMessageC.Snoop;
+  Packet = ActiveMessageC;
+  AMPacket = ActiveMessageC;
+  PacketAcknowledgements = ActiveMessageC;
+}
diff --git a/tos/system/ArbiterP.nc b/tos/system/ArbiterP.nc
new file mode 100644
index 00000000..bf66c2c5
--- /dev/null
+++ b/tos/system/ArbiterP.nc
@@ -0,0 +1,220 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+ 
+/**
+ * Please refer to TEP 108 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component provides the Resource, ResourceRequested, ArbiterInfo, 
+ * and ResourceDefaultOwner interfaces and uses the ResourceConfigure interface as
+ * described in TEP 108.  It provides arbitration to a shared resource.
+ * A Queue is used to keep track of which users have put
+ * in requests for the resource.  Upon the release of the resource by one
+ * of these users, the queue is checked and the next user
+ * that has a pending request will ge granted control of the resource.  If
+ * there are no pending requests, then the user of the ResourceDefaultOwner
+ * interface gains access to the resource, and holds onto it until
+ * another user makes a request.
+ *
+ * @param <b>default_owner_id</b> -- The id of the default owner of this 
+ *        resource
+ * 
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Philip Levis
+ */
+ 
+generic module ArbiterP(uint8_t default_owner_id) @safe() {
+  provides {
+    interface Resource[uint8_t id];
+    interface ResourceRequested[uint8_t id];
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+  uses {
+    interface ResourceConfigure[uint8_t id];
+    interface ResourceQueue as Queue;
+    interface Leds;
+  }
+}
+implementation {
+
+  enum {RES_CONTROLLED, RES_GRANTING, RES_IMM_GRANTING, RES_BUSY};
+  enum {default_owner_id = default_owner_id};
+  enum {NO_RES = 0xFF};
+
+  uint8_t state = RES_CONTROLLED;
+  norace uint8_t resId = default_owner_id;
+  norace uint8_t reqResId;
+  
+  task void grantedTask();
+  
+  async command error_t Resource.request[uint8_t id]() {
+    signal ResourceRequested.requested[resId]();
+    atomic {
+      if(state == RES_CONTROLLED) {
+        state = RES_GRANTING;
+        reqResId = id;
+      }
+      else if (reqResId == id) {
+      	return SUCCESS;
+      }
+      else return call Queue.enqueue(id);
+    }
+    signal ResourceDefaultOwner.requested();
+    return SUCCESS;
+  }
+
+  async command error_t Resource.immediateRequest[uint8_t id]() {
+    signal ResourceRequested.immediateRequested[resId]();
+    atomic {
+      if(state == RES_CONTROLLED) {
+        state = RES_IMM_GRANTING;
+        reqResId = id;
+      }
+      else return FAIL;
+    }
+    signal ResourceDefaultOwner.immediateRequested();
+    if(resId == id) {
+      call ResourceConfigure.configure[resId]();
+      return SUCCESS;
+    }
+    atomic state = RES_CONTROLLED;
+    return FAIL;
+  }
+  
+  async command error_t Resource.release[uint8_t id]() {
+    atomic {
+      if(state == RES_BUSY && resId == id) {
+        if(call Queue.isEmpty() == FALSE) {
+          reqResId = call Queue.dequeue();
+          resId = NO_RES;
+          state = RES_GRANTING;
+          post grantedTask();
+          call ResourceConfigure.unconfigure[id]();
+        }
+        else {
+          resId = default_owner_id;
+          state = RES_CONTROLLED;
+          call ResourceConfigure.unconfigure[id]();
+          signal ResourceDefaultOwner.granted();
+        }
+        return SUCCESS;
+      }
+    }
+    return FAIL;
+  }
+
+  async command error_t ResourceDefaultOwner.release() {
+    atomic {
+      if(resId == default_owner_id) {
+        if(state == RES_GRANTING) {
+          post grantedTask();
+          return SUCCESS;
+        }
+        else if(state == RES_IMM_GRANTING) {
+          resId = reqResId;
+          state = RES_BUSY;
+          return SUCCESS;
+        }
+      }
+    }
+    return FAIL;
+  }
+    
+  /**
+    Check if the Resource is currently in use
+  */    
+  async command bool ArbiterInfo.inUse() {
+    atomic {
+      if (state == RES_CONTROLLED)
+        return FALSE;
+    }
+    return TRUE;
+  }
+
+  /**
+    Returns the current user of the Resource.
+    If there is no current user, the return value
+    will be 0xFF
+  */      
+  async command uint8_t ArbiterInfo.userId() {
+    atomic {
+      if(state != RES_BUSY)
+        return NO_RES;
+      return resId;
+    }
+  }
+
+  /**
+   * Returns my user id.
+   */      
+  async command uint8_t Resource.isOwner[uint8_t id]() {
+    atomic {
+      if(resId == id && state == RES_BUSY) return TRUE;
+      else return FALSE;
+    }
+  }
+
+  async command uint8_t ResourceDefaultOwner.isOwner() {
+    atomic return (state == RES_CONTROLLED
+            || (resId == default_owner_id
+                && (state == RES_GRANTING || state == RES_IMM_GRANTING)));
+  }
+  
+  task void grantedTask() {
+    atomic {
+      resId = reqResId;
+      state = RES_BUSY;
+    }
+    call ResourceConfigure.configure[resId]();
+    signal Resource.granted[resId]();
+  }
+  
+  //Default event/command handlers for all of the other
+    //potential users/providers of the parameterized interfaces 
+    //that have not been connected to.  
+  default event void Resource.granted[uint8_t id]() {
+  }
+  default async event void ResourceRequested.requested[uint8_t id]() {
+  }
+  default async event void ResourceRequested.immediateRequested[uint8_t id]() {
+  }
+  default async event void ResourceDefaultOwner.granted() {
+  }
+  default async event void ResourceDefaultOwner.requested() {
+    call ResourceDefaultOwner.release();
+  }
+  default async event void ResourceDefaultOwner.immediateRequested() {
+  	call ResourceDefaultOwner.release();
+  }
+  default async command void ResourceConfigure.configure[uint8_t id]() {
+  }
+  default async command void ResourceConfigure.unconfigure[uint8_t id]() {
+  }
+}
diff --git a/tos/system/ArbitratedReadC.nc b/tos/system/ArbitratedReadC.nc
new file mode 100644
index 00000000..1fd30d36
--- /dev/null
+++ b/tos/system/ArbitratedReadC.nc
@@ -0,0 +1,52 @@
+/* $Id: ArbitratedReadC.nc,v 1.6 2008-06-26 04:39:14 regehr Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Implement arbitrated access to a Read interface, based on an
+ * underlying arbitrated Resource interface.
+ *
+ * Note that this code does not deal with unexpected events: it assumes
+ * that all events it receives are in response to commands that it
+ * made. See tos/chips/atm128/adc for an example of using ArbitratedReadC 
+ * in a safe way.
+ *
+ * @param width_t Width of the underlying Read interface.
+ *
+ * @author David Gay
+ */
+generic module ArbitratedReadC(typedef width_t) @safe() {
+  provides interface Read<width_t>[uint8_t client];
+  uses {
+    interface Read<width_t> as Service[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  command error_t Read.read[uint8_t client]() {
+    return call Resource.request[client]();
+  }
+
+  event void Resource.granted[uint8_t client]() {
+    call Service.read[client]();
+  }
+
+  event void Service.readDone[uint8_t client](error_t result, width_t data) {
+    call Resource.release[client]();
+    signal Read.readDone[client](result, data);
+  }
+
+  default async command error_t Resource.request[uint8_t client]() { 
+    return FAIL; 
+  }
+  default async command error_t Resource.release[uint8_t client]() { return FAIL; }
+  default event void Read.readDone[uint8_t client](error_t result, width_t data) { }
+  default command error_t Service.read[uint8_t client]() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/system/ArbitratedReadNowC.nc b/tos/system/ArbitratedReadNowC.nc
new file mode 100644
index 00000000..5a1dc591
--- /dev/null
+++ b/tos/system/ArbitratedReadNowC.nc
@@ -0,0 +1,54 @@
+/* $Id: ArbitratedReadNowC.nc,v 1.4 2006-12-12 18:23:47 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Implement arbitrated access to a ReadNow interface, based on an
+ * underlying arbitrated Resource interface.
+ *
+ * Note that this code does not deal with unexpected events: it assumes
+ * that all events it receives are in response to commands that it
+ * made. 
+ *
+ * @param width_t Width of the underlying ReadNow interface.
+ *
+ * @author David Gay
+ */
+generic module ArbitratedReadNowC(typedef width_t) {
+  provides interface ReadNow<width_t>[uint8_t client];
+  uses {
+    interface ReadNow<width_t> as Service[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  async command error_t ReadNow.read[uint8_t client]() {
+    error_t req = call Resource.immediateRequest[client]();
+
+    if (req != SUCCESS)
+      return req;
+
+    call Service.read[client]();
+    return SUCCESS;
+  }
+
+  async event void Service.readDone[uint8_t client](error_t result, width_t data) {
+    call Resource.release[client]();
+    signal ReadNow.readDone[client](result, data);
+  }
+
+  default async command error_t Resource.immediateRequest[uint8_t client]() { 
+    return FAIL; 
+  }
+  default async command error_t Resource.release[uint8_t client]() { return FAIL; }
+  default async event void ReadNow.readDone[uint8_t client](error_t result, width_t data) { }
+  default async command error_t Service.read[uint8_t client]() {
+    return SUCCESS;
+  }
+  event void Resource.granted[uint8_t client]() { }
+}
diff --git a/tos/system/ArbitratedReadStreamC.nc b/tos/system/ArbitratedReadStreamC.nc
new file mode 100644
index 00000000..2ced671f
--- /dev/null
+++ b/tos/system/ArbitratedReadStreamC.nc
@@ -0,0 +1,86 @@
+/* $Id: ArbitratedReadStreamC.nc,v 1.4 2006-12-12 18:23:47 vlahan Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Implement arbitrated access to a Read interface, based on an
+ * underlying arbitrated Resource interface.
+ *
+ * Note that this code does not deal with unexpected events: it assumes
+ * that all events it receives are in response to commands that it
+ * made. See tos/chips/atm128/adc for an example of using
+ * ArbitratedReadStreamC in a safe way.
+ *
+ * @param width_t Width of the underlying ReadStream interface.
+ *
+ * @author David Gay
+ */
+generic module ArbitratedReadStreamC(uint8_t nClients, typedef val_t) {
+  provides interface ReadStream<val_t>[uint8_t client];
+  uses {
+    interface ReadStream<val_t> as Service[uint8_t client];
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  uint32_t period[nClients];
+
+  command error_t ReadStream.postBuffer[uint8_t client](val_t* buf, uint16_t count)
+  {
+    return call Service.postBuffer[client](buf, count);
+  }
+
+  command error_t ReadStream.read[uint8_t client](uint32_t usPeriod)
+  {
+    error_t ok = call Resource.request[client]();
+
+    if (ok == SUCCESS)
+      period[client] = usPeriod;
+
+    return ok;
+  }
+
+  event void Service.bufferDone[uint8_t client](error_t result, val_t *buf, uint16_t count)
+  {
+    signal ReadStream.bufferDone[client](result, buf, count);
+  }
+
+  event void Service.readDone[uint8_t client](error_t result, uint32_t actualPeriod)
+  {
+    call Resource.release[client]();
+    signal ReadStream.readDone[client](result, actualPeriod);
+  }
+
+  event void Resource.granted[uint8_t client]() {
+    call Service.read[client](period[client]);
+  }
+
+  /* Defaults to keep compiler happy */
+  default async command error_t Resource.request[uint8_t client]() { 
+    return SUCCESS; 
+  }
+  default async command error_t Resource.release[uint8_t client]() { return FAIL; }
+
+  default command error_t Service.postBuffer[uint8_t client](val_t* buf, uint16_t count)
+  {
+    return FAIL;
+  }
+
+  default command error_t Service.read[uint8_t client](uint32_t usPeriod)
+  {
+    return FAIL;
+  }
+
+  default event void ReadStream.bufferDone[uint8_t client](error_t result, val_t *buf, uint16_t count)
+  {
+  }
+
+  default event void ReadStream.readDone[uint8_t client](error_t result, uint32_t actualPeriod)
+  {
+  }
+}
diff --git a/tos/system/BigQueueC.nc b/tos/system/BigQueueC.nc
new file mode 100644
index 00000000..efd6841d
--- /dev/null
+++ b/tos/system/BigQueueC.nc
@@ -0,0 +1,118 @@
+/* $Id: BigQueueC.nc,v 1.1 2007-09-19 17:20:47 klueska Exp $ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  A general FIFO queue component, whose queue has a bounded size.
+ *
+ *  @author Philip Levis
+ *  @author Geoffrey Mainland
+ *  @date   $Date: 2007-09-19 17:20:47 $
+ */
+
+   
+generic module BigQueueC(typedef queue_t, uint16_t QUEUE_SIZE) {
+  provides interface BigQueue<queue_t> as Queue;
+}
+
+implementation {
+
+  queue_t queue[QUEUE_SIZE];
+  uint16_t head = 0;
+  uint16_t tail = 0;
+  uint16_t size = 0;
+  
+  command bool Queue.empty() {
+    return size == 0;
+  }
+
+  command uint16_t Queue.size() {
+    return size;
+  }
+
+  command uint16_t Queue.maxSize() {
+    return QUEUE_SIZE;
+  }
+
+  command queue_t Queue.head() {
+    return queue[head];
+  }
+
+  void printQueue() {
+#ifdef TOSSIM
+    int i, j;
+    dbg("QueueC", "head <-");
+    for (i = head; i < head + size; i++) {
+      dbg_clear("QueueC", "[");
+      for (j = 0; j < sizeof(queue_t); j++) {
+	uint8_t v = ((uint8_t*)&queue[i % QUEUE_SIZE])[j];
+	dbg_clear("QueueC", "%0.2hhx", v);
+      }
+      dbg_clear("QueueC", "] ");
+    }
+    dbg_clear("QueueC", "<- tail\n");
+#endif
+  }
+  
+  command queue_t Queue.dequeue() {
+    queue_t t = call Queue.head();
+    dbg("QueueC", "%s: size is %hhu\n", __FUNCTION__, size);
+    if (!call Queue.empty()) {
+      head++;
+      head %= QUEUE_SIZE;
+      size--;
+      printQueue();
+    }
+    return t;
+  }
+
+  command error_t Queue.enqueue(queue_t newVal) {
+    if (call Queue.size() < call Queue.maxSize()) {
+      dbg("QueueC", "%s: size is %hhu\n", __FUNCTION__, size);
+      queue[tail] = newVal;
+      tail++;
+      tail %= QUEUE_SIZE;
+      size++;
+      printQueue();
+      return SUCCESS;
+    }
+    else {
+      return FAIL;
+    }
+  }
+  
+  command queue_t Queue.element(uint16_t idx) {
+    idx += head;
+    idx %= QUEUE_SIZE;
+    return queue[idx];
+  }  
+
+}
diff --git a/tos/system/BitVectorC.nc b/tos/system/BitVectorC.nc
new file mode 100644
index 00000000..88f351cc
--- /dev/null
+++ b/tos/system/BitVectorC.nc
@@ -0,0 +1,120 @@
+//$Id: BitVectorC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
+
+/* Copyright (c) 2000-2003 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Generic bit vector implementation. Note that if you use this bit vector
+ * from interrupt code, you must use appropriate <code>atomic</code>
+ * statements to ensure atomicity.
+ *
+ * @param max_bits Bit vector length.
+ *
+ * @author Cory Sharp <cssharp@eecs.berkeley.edu>
+ */
+
+generic module BitVectorC(uint16_t max_bits)
+{
+  provides interface Init;
+  provides interface BitVector;
+}
+implementation
+{
+  typedef uint8_t int_type;
+
+  enum
+  {
+    ELEMENT_SIZE = 8*sizeof(int_type),
+    ARRAY_SIZE = (max_bits + ELEMENT_SIZE-1) / ELEMENT_SIZE,
+  };
+
+  int_type m_bits[ ARRAY_SIZE ];
+
+  uint16_t getIndex(uint16_t bitnum)
+  {
+    return bitnum / ELEMENT_SIZE;
+  }
+
+  uint16_t getMask(uint16_t bitnum)
+  {
+    return 1 << (bitnum % ELEMENT_SIZE);
+  }
+
+  command error_t Init.init()
+  {
+    call BitVector.clearAll();
+    return SUCCESS;
+  }
+
+  async command void BitVector.clearAll()
+  {
+    memset(m_bits, 0, sizeof(m_bits));
+  }
+
+  async command void BitVector.setAll()
+  {
+    memset(m_bits, 255, sizeof(m_bits));
+  }
+
+  async command bool BitVector.get(uint16_t bitnum)
+  {
+    atomic {return (m_bits[getIndex(bitnum)] & getMask(bitnum)) ? TRUE : FALSE;}
+  }
+
+  async command void BitVector.set(uint16_t bitnum)
+  {
+    atomic {m_bits[getIndex(bitnum)] |= getMask(bitnum);}
+  }
+
+  async command void BitVector.clear(uint16_t bitnum)
+  {
+    atomic {m_bits[getIndex(bitnum)] &= ~getMask(bitnum);}
+  }
+
+  async command void BitVector.toggle(uint16_t bitnum)
+  {
+    atomic {m_bits[getIndex(bitnum)] ^= getMask(bitnum);}
+  }
+
+  async command void BitVector.assign(uint16_t bitnum, bool value)
+  {
+    if(value)
+      call BitVector.set(bitnum);
+    else
+      call BitVector.clear(bitnum);
+  }
+
+  async command uint16_t BitVector.size()
+  {
+    return max_bits;
+  }
+}
+
diff --git a/tos/system/ConstantSensorC.nc b/tos/system/ConstantSensorC.nc
new file mode 100644
index 00000000..d1bb90a5
--- /dev/null
+++ b/tos/system/ConstantSensorC.nc
@@ -0,0 +1,55 @@
+/// $Id: ConstantSensorC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
+
+/*                                                                      
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Simple sensor emulator that just outputs a constant value. 
+ *
+ * @author Philip Levis
+ * @date   Oct 31 2005
+ */
+  
+generic module ConstantSensorC(typedef width_t @integer(), uint32_t val) { 
+  provides interface Read<width_t>;
+}
+implementation
+{
+  task void senseResult() {
+    signal Read.readDone(SUCCESS, val);
+  }
+
+  command error_t Read.read() {
+    return post senseResult();
+  }
+  
+}
diff --git a/tos/system/CrcC.nc b/tos/system/CrcC.nc
new file mode 100644
index 00000000..5c7c2a35
--- /dev/null
+++ b/tos/system/CrcC.nc
@@ -0,0 +1,79 @@
+/*                                                                      
+ *
+ * Copyright (c) 2000-2007 The Regents of the University of
+ * California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * Wrapper around the CRC-16 primitive to allow computing the CRC
+ * value of a byte array.
+ *
+ * @author Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author David Moss
+ */
+ 
+#include <crc.h>
+
+module CrcC {
+  provides interface Crc;
+}
+
+implementation {
+
+  /**
+   * Compute the CRC-16 value of a byte array.
+   *
+   * @param   buf A pointer to the buffer over which to compute CRC.
+   * @param   len The length of the buffer over which to compute CRC.
+   * @return  The CRC-16 value.
+   */
+  async command uint16_t Crc.crc16(void *buf, uint8_t len) {
+    return call Crc.seededCrc16(0, buf, len);
+  }
+  
+  /**
+   * Compute a generic CRC-16 using a given seed.  Used to compute CRC's
+   * of discontinuous data.
+   * 
+   * @param startCrc An initial CRC value to begin with
+   * @param buf A pointer to a buffer of data
+   * @param len The length of the buffer
+   * @return The CRC-16 value.
+   */
+  async command uint16_t Crc.seededCrc16(uint16_t startCrc, void *buf, uint8_t len) {
+    uint8_t *tmp = (uint8_t *) buf;
+    uint16_t crc;
+    for (crc = startCrc; len > 0; len--) {
+      crc = crcByte(crc, *tmp++);
+    }
+    return crc;
+  }
+}
diff --git a/tos/system/DirectAMSenderC.nc b/tos/system/DirectAMSenderC.nc
new file mode 100644
index 00000000..2e6cd2f9
--- /dev/null
+++ b/tos/system/DirectAMSenderC.nc
@@ -0,0 +1,67 @@
+// $Id: DirectAMSenderC.nc,v 1.2 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2006 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The virtualized active message send abstraction. Each instantiation
+ * of AMSenderC has its own queue of depth one. Therefore, it does not
+ * have to contend with other AMSenderC instantiations for queue space.
+ * The underlying implementation schedules the packets in these queues
+ * using some form of fair-share queueing.
+ *
+ * @author Philip Levis
+ * @date   Jan 16 2006
+ * @see    TEP 116: Packet Protocols
+ */ 
+
+#include "AM.h"
+
+generic configuration DirectAMSenderC(am_id_t AMId) {
+  provides {
+    interface AMSend;
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+
+implementation {
+  components new AMQueueEntryP(AMId) as AMQueueEntryP;
+  components AMQueueP, ActiveMessageC;
+
+  AMQueueEntryP.Send -> AMQueueP.Send[unique(UQ_AMQUEUE_SEND)];
+  AMQueueEntryP.AMPacket -> ActiveMessageC;
+  
+  AMSend = AMQueueEntryP;
+  Packet = ActiveMessageC;
+  AMPacket = ActiveMessageC;
+  Acks = ActiveMessageC;
+}
diff --git a/tos/system/FcfsArbiterC.nc b/tos/system/FcfsArbiterC.nc
new file mode 100644
index 00000000..36741089
--- /dev/null
+++ b/tos/system/FcfsArbiterC.nc
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.7 $
+ * $Date: 2010-06-29 22:07:56 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component provides the Resource, ArbiterInfo, and ResourceDefaultOwner
+ * interfaces and uses the ResourceConfigure interface as
+ * described in TEP 108.  It provides arbitration to a shared resource in
+ * an FCFS fashion.  An array is used to keep track of which users have put
+ * in requests for the resource.  Upon the release of the resource by one
+ * of these users, the array is checked and the next user (in FCFS order)
+ * that has a pending request will ge granted control of the resource.  If
+ * there are no pending requests, then the resource is granted to the default 
+ * user.  If a new request is made, the default user will release the resource, 
+ * and it will be granted to the requesting cleint.
+ *
+ * @param <b>resourceName</b> -- The name of the Resource being shared
+ * 
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+ 
+generic configuration FcfsArbiterC(char resourceName[]) {
+  provides {
+    interface Resource[uint8_t id];
+    interface ResourceRequested[uint8_t id];
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+  uses interface ResourceConfigure[uint8_t id];
+}
+implementation {
+  components MainC;
+  components new FcfsResourceQueueC(uniqueCount(resourceName)) as Queue;
+  components new ArbiterP(uniqueCount(resourceName)) as Arbiter;
+
+  MainC.SoftwareInit -> Queue;
+
+  Resource = Arbiter;
+  ResourceRequested = Arbiter;
+  ResourceDefaultOwner = Arbiter;
+  ArbiterInfo = Arbiter;
+  ResourceConfigure = Arbiter;
+
+  Arbiter.Queue -> Queue;
+}
diff --git a/tos/system/FcfsPriorityArbiterC.nc b/tos/system/FcfsPriorityArbiterC.nc
new file mode 100644
index 00000000..65ff4bde
--- /dev/null
+++ b/tos/system/FcfsPriorityArbiterC.nc
@@ -0,0 +1,413 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.6 $
+ * $Date: 2010-06-29 22:07:56 $
+ * ========================================================================
+ */
+
+/**
+ * Please refer to TEP 108 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component provides the Resource, ArbiterInfo, and Resource
+ * Controller interfaces and uses the ResourceConfigure interface as
+ * described in TEP 108.  An additional ResourceDefaultOwner interface is
+ * provided to allow clients of differing Priorities to control the
+ * Resource according to some policy implemented in an external
+ * component. This component provides arbitration to a shared resource in
+ * an FCFS fashion.  An array is used to keep track of which users have put
+ * in requests for the resource.  Upon the release of the resource by one
+ * of these users, the array is checked and the next user (in first-come
+ * first-served order) that has a pending request will ge granted control
+ * of the resource.  If there are no pending requests, then the resource
+ * becomes idle and any user can put in a request and immediately receive
+ * access to the Resource.
+ *
+ * @param <b>resourceName</b> -- The name of the Resource being shared
+ *
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Philip Levis
+ * @author Philipp Huppertz
+ */
+
+generic module FcfsPriorityArbiterC(char resourceName[]) {
+  provides {
+    interface Init;
+    interface Resource[uint8_t id];
+    interface ResourceDefaultOwner as HighPriorityClient;
+    interface ResourceDefaultOwner as LowPriorityClient;
+    interface ArbiterInfo;
+  }
+  uses {
+    interface ResourceConfigure[uint8_t id];
+  }
+}
+implementation {
+
+  enum {RES_IDLE, RES_GRANTING, RES_BUSY};
+  enum {NO_RES = 0xFF};
+  enum {LOW_PRIORITY_CLIENT_ID = uniqueCount(resourceName) + 1};
+  enum {HIGH_PRIORITY_CLIENT_ID = uniqueCount(resourceName) + 2};
+
+  uint8_t state = RES_IDLE;
+  uint8_t resId = NO_RES;
+  uint8_t reqResId = NO_RES;
+  uint8_t resQ[uniqueCount(resourceName)];
+  uint8_t qHead = NO_RES;
+  uint8_t qTail = NO_RES;
+  bool hpreq = FALSE;   // request from the high priority client
+  bool irp = FALSE;     // immediate request pending
+
+  task void grantedTask();
+  error_t queueRequest(uint8_t id);
+  void grantNextRequest();
+
+  bool requested(uint8_t id) {
+    return ( ( resQ[id] != NO_RES ) || ( qTail == id ) );
+  }
+
+  /**
+    Initialize the Arbiter to the idle state
+  */
+  command error_t Init.init() {
+    memset( resQ, NO_RES, sizeof( resQ ) );
+    return SUCCESS;
+  }
+
+  /**
+    Request the use of the shared resource
+
+    If the user has not already requested access to the
+    resource, the request will be either served immediately
+    or queued for later service in an FCFS fashion.
+    A SUCCESS value will be returned and the user will receive
+    the granted() event in synchronous context once it has
+    been given access to the resource.
+
+    Whenever requests are queued, the highest priority client
+    will receive a requested() event after he receives granted(),
+    notifying him that another user would like to have access to the resource.
+
+    If the user has already requested access to the resource and
+    is waiting on a pending granted() event, an EBUSY value will
+    be returned to the caller.
+  */
+  async command error_t Resource.request[uint8_t id]() {
+    atomic {
+      if( state == RES_IDLE ) {
+        state = RES_GRANTING;
+        reqResId = id;
+        post grantedTask();
+        return SUCCESS;
+      }
+      if (resId == LOW_PRIORITY_CLIENT_ID)  {
+        signal LowPriorityClient.requested();
+      } else if (resId == HIGH_PRIORITY_CLIENT_ID) {
+        signal HighPriorityClient.requested();
+      }
+      return queueRequest( id );
+    }
+  }
+
+  async command error_t LowPriorityClient.request() {
+    atomic {
+      if((state == RES_IDLE) && (!hpreq)) {
+        state = RES_GRANTING;
+        reqResId = LOW_PRIORITY_CLIENT_ID;
+        post grantedTask();
+        return SUCCESS;
+      }
+    }
+    return EBUSY;
+  }
+
+  async command error_t HighPriorityClient.request() {
+    atomic {
+      if (resId == LOW_PRIORITY_CLIENT_ID)  {
+        signal LowPriorityClient.requested();
+      }
+      hpreq = TRUE;
+      if( state == RES_IDLE ) {
+        state = RES_GRANTING;
+        reqResId = HIGH_PRIORITY_CLIENT_ID;
+        post grantedTask();
+      }
+      return SUCCESS;
+    }
+  }
+
+  /**
+  * Request immediate access to the shared resource.  Requests are
+  * not queued, and no granted event is returned.  A return value
+  * of SUCCESS signifies that the resource has been granted to you,
+  * while a return value of EBUSY signifies that the resource is
+  * currently being used.
+  */
+  uint8_t tryImmediateRequest(uint8_t id) {
+    atomic {
+      if( state == RES_IDLE ) {
+        state = RES_BUSY;
+        resId = id;
+        return id;
+      }
+      return resId;
+    }
+  }
+
+  async command error_t Resource.immediateRequest[uint8_t id]() {
+    uint8_t ownerId = tryImmediateRequest(id);
+
+    if(ownerId == id) {
+      call ResourceConfigure.configure[id]();
+      return SUCCESS;
+    } else if( ownerId == LOW_PRIORITY_CLIENT_ID ){
+      atomic {
+        irp = TRUE;     //indicate that immediateRequest is pending
+        reqResId = id;  //Id to grant resource to if can
+      }
+      signal LowPriorityClient.requested();
+      atomic {
+        ownerId = resId;   //See if I have been granted the resource
+        irp = FALSE;       //Indicate that immediate request no longer pending
+      }
+      if(ownerId == id) {
+        call ResourceConfigure.configure[id]();
+        return SUCCESS;
+      }
+      return EBUSY;
+    } else {
+      return EBUSY;
+    }
+  }
+
+  async command error_t LowPriorityClient.immediateRequest() {
+    return call Resource.immediateRequest[LOW_PRIORITY_CLIENT_ID]();
+  }
+  async command error_t HighPriorityClient.immediateRequest() {
+    return call Resource.immediateRequest[HIGH_PRIORITY_CLIENT_ID]();
+  }
+
+  /**
+    Release the use of the shared resource
+
+    The resource will only actually be released if
+    there are no pending requests for the resource.
+    If requests are pending, then the next pending request
+    will be serviced, according to a Fist come first serve
+    arbitration scheme.  If no requests are currently
+    pending, then the resource is released, and any
+    users can put in a request for immediate access to
+    the resource.
+  */
+  async command void Resource.release[uint8_t id]() {
+    uint8_t currentState;
+    atomic {
+      if (state == RES_BUSY && resId == id) {
+        if (irp)
+          resId = reqResId;
+        else grantNextRequest();
+	call ResourceConfigure.unconfigure[id]();
+      }
+      currentState = state;
+    }
+    if (currentState == RES_IDLE)  {
+      signal HighPriorityClient.idle();
+      signal LowPriorityClient.idle();
+    }
+  }
+  async command void LowPriorityClient.release() {
+    call Resource.release[LOW_PRIORITY_CLIENT_ID]();
+  }
+  async command void HighPriorityClient.release() {
+    call Resource.release[HIGH_PRIORITY_CLIENT_ID]();
+  }
+  /**
+    Check if the Resource is currently in use
+  */
+  async command bool ArbiterInfo.inUse() {
+    atomic {
+      if ( state == RES_IDLE )
+        return FALSE;
+    }
+    return TRUE;
+  }
+
+  /**
+    Returns the current user of the Resource.
+    If there is no current user, the return value
+    will be 0xFF
+  */
+  async command uint8_t ArbiterInfo.userId() {
+    atomic return resId;
+  }
+
+  /**
+   * Returns my user id.
+   */
+  async command uint8_t Resource.isOwner[uint8_t id]() {
+    atomic {
+      if(resId == id) return TRUE;
+      else return FALSE;
+    }
+  }
+  async command uint8_t LowPriorityClient.isOwner() {
+    return call Resource.isOwner[LOW_PRIORITY_CLIENT_ID]();
+  }
+  async command uint8_t HighPriorityClient.isOwner() {
+    return call Resource.isOwner[HIGH_PRIORITY_CLIENT_ID]();
+  }
+
+  //Grant a request to the next Pending user
+    //in FCFS order
+  void grantNextRequest() {
+    resId = NO_RES;
+    // do not grant, if highest priority client had the resource before
+    if ( (hpreq) && (resId != HIGH_PRIORITY_CLIENT_ID) ) {
+      atomic {
+        hpreq = FALSE;
+      }
+      reqResId = HIGH_PRIORITY_CLIENT_ID;
+      state = RES_GRANTING;
+      post grantedTask();
+    } else {
+      if(qHead != NO_RES) {
+        uint8_t id = qHead;
+        qHead = resQ[qHead];
+        if(qHead == NO_RES) {
+          qTail = NO_RES;
+        }
+        resQ[id] = NO_RES;
+        reqResId = id;
+        state = RES_GRANTING;
+        post grantedTask();
+      } else {
+        state = RES_IDLE;
+      }
+    }
+  }
+
+  //Queue the requests so that they can be granted
+    //in FCFS order after release of the resource
+  error_t queueRequest(uint8_t id) {
+    atomic {
+      if( !requested( id ) ) {
+        if(qHead == NO_RES ) {
+          qHead = id;
+        } else {
+          resQ[qTail] = id;
+        }
+        qTail = id;
+        return SUCCESS;
+      }
+      return EBUSY;
+    }
+  }
+
+  //Task for pulling the Resource.granted() signal
+    //into synchronous context
+  task void grantedTask() {
+    uint8_t tmpId;
+    atomic {
+      tmpId = resId = reqResId;
+      state = RES_BUSY;
+    }
+    if (tmpId == HIGH_PRIORITY_CLIENT_ID) {
+      signal HighPriorityClient.granted();
+      // lets throw pending request at him...
+      atomic {
+        if (qHead != NO_RES) {
+        signal HighPriorityClient.requested();
+        }
+      }
+    } else if (tmpId == LOW_PRIORITY_CLIENT_ID) {
+      signal LowPriorityClient.granted();
+    } else {
+      call ResourceConfigure.configure[tmpId]();
+      signal Resource.granted[tmpId]();
+    }
+  }
+
+  //Default event/command handlers for all of the other
+    //potential users/providers of the parameterized interfaces
+    //that have not been connected to.
+  default event void Resource.granted[uint8_t id]() {
+      signal LowPriorityClient.granted();
+  }
+  default event void LowPriorityClient.granted() {
+  }
+  default async event void LowPriorityClient.requested() {
+  }
+  default async event void LowPriorityClient.idle() {
+  }
+  default event void HighPriorityClient.granted() {
+  }
+  default async event void HighPriorityClient.requested() {
+  }
+  default async event void HighPriorityClient.idle() {
+  }
+  default async command void ResourceConfigure.configure[uint8_t id]() {
+  }
+  default async command void ResourceConfigure.unconfigure[uint8_t id]() {
+  }
+}
diff --git a/tos/system/FcfsResourceQueueC.nc b/tos/system/FcfsResourceQueueC.nc
new file mode 100644
index 00000000..65427338
--- /dev/null
+++ b/tos/system/FcfsResourceQueueC.nc
@@ -0,0 +1,95 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.7 $
+ * @date $Date: 2010-06-29 22:07:56 $
+ */
+ 
+#include "Resource.h"
+ 
+generic module FcfsResourceQueueC(uint8_t size) @safe() {
+  provides {
+    interface Init;
+    interface ResourceQueue as FcfsQueue;
+  }
+}
+implementation {
+  enum {NO_ENTRY = 0xFF};
+
+  uint8_t resQ[size];
+  uint8_t qHead = NO_ENTRY;
+  uint8_t qTail = NO_ENTRY;
+
+  command error_t Init.init() {
+    memset(resQ, NO_ENTRY, sizeof(resQ));
+    return SUCCESS;
+  }  
+  
+  async command bool FcfsQueue.isEmpty() {
+    atomic return (qHead == NO_ENTRY);
+  }
+  	
+  async command bool FcfsQueue.isEnqueued(resource_client_id_t id) {
+  	atomic return resQ[id] != NO_ENTRY || qTail == id; 
+  }
+
+  async command resource_client_id_t FcfsQueue.dequeue() {
+    atomic {
+      if(qHead != NO_ENTRY) {
+        uint8_t id = qHead;
+        qHead = resQ[qHead];
+        if(qHead == NO_ENTRY)
+          qTail = NO_ENTRY;
+        resQ[id] = NO_ENTRY;
+        return id;
+      }
+      return NO_ENTRY;
+    }
+  }
+  
+  async command error_t FcfsQueue.enqueue(resource_client_id_t id) {
+    atomic {
+      if(!(call FcfsQueue.isEnqueued(id))) {
+        if(qHead == NO_ENTRY)
+	        qHead = id;
+	      else
+  	      resQ[qTail] = id;
+	      qTail = id;
+        return SUCCESS;
+      }
+      return EBUSY;
+    }
+  }
+}
diff --git a/tos/system/LedsC.nc b/tos/system/LedsC.nc
new file mode 100644
index 00000000..8e786285
--- /dev/null
+++ b/tos/system/LedsC.nc
@@ -0,0 +1,58 @@
+// $Id: LedsC.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/**
+ *
+ * The basic TinyOS LEDs abstraction.
+ *
+ * @author Phil Buonadonna
+ * @author David Gay
+ * @author Philip Levis
+ * @author Joe Polastre
+ */
+
+
+configuration LedsC {
+  provides interface Leds;
+}
+implementation {
+  components LedsP, PlatformLedsC;
+
+  Leds = LedsP;
+
+  LedsP.Init <- PlatformLedsC.Init;
+  LedsP.Led0 -> PlatformLedsC.Led0;
+  LedsP.Led1 -> PlatformLedsC.Led1;
+  LedsP.Led2 -> PlatformLedsC.Led2;
+}
+
diff --git a/tos/system/LedsP.nc b/tos/system/LedsP.nc
new file mode 100644
index 00000000..6a357509
--- /dev/null
+++ b/tos/system/LedsP.nc
@@ -0,0 +1,158 @@
+// $Id: LedsP.nc,v 1.7 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The implementation of the standard 3 LED mote abstraction.
+ *
+ * @author Joe Polastre
+ * @author Philip Levis
+ *
+ * @date   March 21, 2005
+ */
+
+module LedsP @safe() {
+  provides {
+    interface Init;
+    interface Leds;
+  }
+  uses {
+    interface GeneralIO as Led0;
+    interface GeneralIO as Led1;
+    interface GeneralIO as Led2;
+  }
+}
+implementation {
+  command error_t Init.init() {
+    atomic {
+      dbg("Init", "LEDS: initialized.\n");
+      call Led0.makeOutput();
+      call Led1.makeOutput();
+      call Led2.makeOutput();
+      call Led0.set();
+      call Led1.set();
+      call Led2.set();
+    }
+    return SUCCESS;
+  }
+
+  /* Note: the call is inside the dbg, as it's typically a read of a volatile
+     location, so can't be deadcode eliminated */
+#define DBGLED(n) \
+  dbg("LedsC", "LEDS: Led" #n " %s.\n", call Led ## n .get() ? "off" : "on");
+
+  async command void Leds.led0On() {
+    call Led0.clr();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Off() {
+    call Led0.set();
+    DBGLED(0);
+  }
+
+  async command void Leds.led0Toggle() {
+    call Led0.toggle();
+    DBGLED(0);
+  }
+
+  async command void Leds.led1On() {
+    call Led1.clr();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Off() {
+    call Led1.set();
+    DBGLED(1);
+  }
+
+  async command void Leds.led1Toggle() {
+    call Led1.toggle();
+    DBGLED(1);
+  }
+
+  async command void Leds.led2On() {
+    call Led2.clr();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Off() {
+    call Led2.set();
+    DBGLED(2);
+  }
+
+  async command void Leds.led2Toggle() {
+    call Led2.toggle();
+    DBGLED(2);
+  }
+
+  async command uint8_t Leds.get() {
+    uint8_t rval;
+    atomic {
+      rval = 0;
+      if (!call Led0.get()) {
+	rval |= LEDS_LED0;
+      }
+      if (!call Led1.get()) {
+	rval |= LEDS_LED1;
+      }
+      if (!call Led2.get()) {
+	rval |= LEDS_LED2;
+      }
+    }
+    return rval;
+  }
+
+  async command void Leds.set(uint8_t val) {
+    atomic {
+      if (val & LEDS_LED0) {
+	call Leds.led0On();
+      }
+      else {
+	call Leds.led0Off();
+      }
+      if (val & LEDS_LED1) {
+	call Leds.led1On();
+      }
+      else {
+	call Leds.led1Off();
+      }
+      if (val & LEDS_LED2) {
+	call Leds.led2On();
+      }
+      else {
+	call Leds.led2Off();
+      }
+    }
+  }
+}
diff --git a/tos/system/LocalTimeMilliC.nc b/tos/system/LocalTimeMilliC.nc
new file mode 100644
index 00000000..cac64368
--- /dev/null
+++ b/tos/system/LocalTimeMilliC.nc
@@ -0,0 +1,27 @@
+/* $Id: LocalTimeMilliC.nc,v 1.1 2007-05-23 21:58:08 idgay Exp $
+ * Copyright (c) 2007 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ */
+/**
+ * Provide current time via the LocalTime<TMilli> interface.
+ *
+ * @author David Gay
+ */
+
+#include "Timer.h"
+
+configuration LocalTimeMilliC {
+  provides interface LocalTime<TMilli>;
+}
+implementation
+{
+  components HilTimerMilliC;
+
+  LocalTime = HilTimerMilliC;
+}
diff --git a/tos/system/LplAMSenderC.nc b/tos/system/LplAMSenderC.nc
new file mode 100644
index 00000000..ec5d5618
--- /dev/null
+++ b/tos/system/LplAMSenderC.nc
@@ -0,0 +1,28 @@
+#include "AM.h"
+
+generic configuration LplAMSenderC(am_id_t AMId)
+{
+  provides {
+    interface AMSend;
+    interface Packet;
+    interface AMPacket;
+    interface PacketAcknowledgements as Acks;
+  }
+}
+
+implementation
+{
+  components new DirectAMSenderC(AMId);
+  components new LplAMSenderP();
+  components ActiveMessageC;
+  components SystemLowPowerListeningC;
+
+  AMSend = LplAMSenderP;
+  Packet = DirectAMSenderC;
+  AMPacket = DirectAMSenderC;
+  Acks = DirectAMSenderC;
+
+  LplAMSenderP.SubAMSend -> DirectAMSenderC;
+  LplAMSenderP.Lpl -> ActiveMessageC;
+  LplAMSenderP.SystemLowPowerListening -> SystemLowPowerListeningC;
+}
diff --git a/tos/system/LplAMSenderP.nc b/tos/system/LplAMSenderP.nc
new file mode 100644
index 00000000..62ccb5de
--- /dev/null
+++ b/tos/system/LplAMSenderP.nc
@@ -0,0 +1,23 @@
+generic module LplAMSenderP()
+{
+  provides interface AMSend;
+  uses {
+    interface AMSend as SubAMSend;
+    interface LowPowerListening as Lpl;
+    interface SystemLowPowerListening;
+  }
+}
+
+implementation
+{
+  command error_t AMSend.send(am_addr_t addr, message_t* msg, uint8_t len)
+  {
+    call Lpl.setRemoteWakeupInterval(msg, call SystemLowPowerListening.getDefaultRemoteWakeupInterval());
+    return call SubAMSend.send(addr, msg, len);
+  }
+
+  event void SubAMSend.sendDone(message_t* msg, error_t error) { signal AMSend.sendDone(msg, error); }
+  command error_t AMSend.cancel(message_t* msg) { return call SubAMSend.cancel(msg); }
+  command uint8_t AMSend.maxPayloadLength() { return call SubAMSend.maxPayloadLength(); }
+  command void* AMSend.getPayload(message_t* msg, uint8_t len) { return call SubAMSend.getPayload(msg, len); }
+}
diff --git a/tos/system/LruIntCacheC.nc b/tos/system/LruIntCacheC.nc
new file mode 100644
index 00000000..9c72bc96
--- /dev/null
+++ b/tos/system/LruIntCacheC.nc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+  * An LRU cache of integers, where insertion represents use.
+  *
+  * @author Rodrigo Fonseca
+  */
+
+generic configuration LruIntCacheC(typedef  cache_key_t@integer(), uint8_t CACHE_SIZE) {
+    provides interface Cache<cache_key_t>;
+}
+implementation {
+    components MainC, new LruIntCacheP(cache_key_t, CACHE_SIZE) as CacheP;
+    
+    Cache = CacheP;
+    MainC.SoftwareInit -> CacheP;
+}
diff --git a/tos/system/LruIntCacheP.nc b/tos/system/LruIntCacheP.nc
new file mode 100644
index 00000000..cb325c97
--- /dev/null
+++ b/tos/system/LruIntCacheP.nc
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2006 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/**
+ * An LRU cache that stores integer values, where an insert operation
+ * indicates "use".  Inserting an element not in the cache will replace 
+ * the oldest, and inserting an element already in the cache will refresh 
+ * its age.
+ *
+ * @author Rodrigo Fonseca
+ * @author Philip Levis 
+ */
+
+generic module LruIntCacheP(typedef cache_key_t @integer(), uint8_t size) {
+    provides {
+        interface Init;
+        interface Cache<cache_key_t>;
+    }
+}
+implementation {
+    cache_key_t cache[size];
+    uint8_t first;
+    uint8_t count;
+
+    command error_t Init.init() {
+        first = 0;
+        count = 0;
+        return SUCCESS;
+    } 
+
+    void printCache() {
+#ifdef TOSSIM
+        int i;
+        dbg("Cache","Cache:");
+        for (i = 0; i < count; i++) {
+            dbg_clear("Cache", " %08x", cache[i]);
+            if (i == first)
+                dbg_clear("Cache","*");
+        } 
+        dbg_clear("Cache","\n");
+#endif
+    }
+
+    /* if key is in cache returns the index (offset by first), otherwise returns count */
+    uint8_t lookup(cache_key_t key) {
+        uint8_t i;
+	cache_key_t k;
+        for (i = 0; i < count; i++) {
+	   k = cache[(i + first) % size];
+           if (k == key)
+            break; 
+        }
+        return i;
+    }
+
+    /* remove the entry with index i (relative to first) */
+    void remove(uint8_t i) {
+        uint8_t j;
+        if (i >= count) 
+            return;
+        if (i == 0) {
+            //shift all by moving first
+            first = (first + 1) % size;
+        } else {
+            //shift everyone down
+            for (j = i; j < count; j++) {
+                cache[(j + first) % size] = cache[(j + first + 1) % size];
+            }
+        }
+        count--;
+    }
+
+    command void Cache.insert(cache_key_t key) {
+        uint8_t i;
+        if (count == size ) {
+            //remove someone. If item not in 
+            //cache, remove the first item.
+            //otherwise remove the item temporarily for
+            //reinsertion. This moves the item up in the
+            //LRU stack.
+            i = lookup(key);
+            remove(i % count);
+        }
+        //now count < size
+        cache[(first + count) % size] = key;
+        count++;
+    }
+
+    command bool Cache.lookup(cache_key_t key) {
+        return (lookup(key) < count);
+    }
+
+    command void Cache.flush() {
+      call Init.init(); 
+    }
+
+}
diff --git a/tos/system/MainC.nc b/tos/system/MainC.nc
new file mode 100644
index 00000000..7aa0e45d
--- /dev/null
+++ b/tos/system/MainC.nc
@@ -0,0 +1,74 @@
+// $Id: MainC.nc,v 1.7 2010-06-29 22:07:56 scipio Exp $
+
+/*                                                                      
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ *
+ * Date last modified:  $Id: MainC.nc,v 1.7 2010-06-29 22:07:56 scipio Exp $
+ */
+
+/**
+ * MainC is the system interface the TinyOS boot sequence. It wires the
+ * boot sequence implementation to the scheduler and hardware resources.
+ *
+ * @author Philip Levis
+ * @date   August 6 2005
+ * @see    TEP 107: Boot Sequence
+ */
+
+#include "hardware.h"
+
+configuration MainC {
+  provides interface Boot;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  components PlatformC, RealMainP, TinySchedulerC;
+
+#ifdef SAFE_TINYOS
+  components SafeFailureHandlerC;
+#endif
+
+  RealMainP.Scheduler -> TinySchedulerC;
+  RealMainP.PlatformInit -> PlatformC;
+
+  // Export the SoftwareInit and Booted for applications
+  SoftwareInit = RealMainP.SoftwareInit;
+  Boot = RealMainP;
+}
+
diff --git a/tos/system/MultiplexedReadC.nc b/tos/system/MultiplexedReadC.nc
new file mode 100644
index 00000000..34685b26
--- /dev/null
+++ b/tos/system/MultiplexedReadC.nc
@@ -0,0 +1,46 @@
+/* $Id: MultiplexedReadC.nc,v 1.1 2007-02-08 17:49:05 idgay Exp $
+ * Copyright (c) 2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Multiplex access to a single Read interface for a parameterised
+ * Read interface whose access is controlled by an arbiter.
+ *
+ * @param width_t Width of the underlying Read interface.
+ *
+ * @author David Gay
+ */
+generic module MultiplexedReadC(typedef width_t) {
+  provides interface Read<width_t>[uint8_t client];
+  uses {
+    interface Read<width_t> as Service;
+    interface Resource[uint8_t client];
+  }
+}
+implementation {
+  command error_t Read.read[uint8_t client]() {
+    return call Resource.request[client]();
+  }
+
+  event void Resource.granted[uint8_t client]() {
+    call Service.read();
+  }
+
+  event void Service.readDone(error_t result, width_t data) {
+    uint8_t client = call ArbiterInfo.userId();
+
+    call Resource.release[client]();
+    signal Read.readDone[client](result, data);
+  }
+
+  default async command error_t Resource.request[uint8_t client]() { 
+    return FAIL; 
+  }
+  default async command error_t Resource.release[uint8_t client]() { return FAIL; }
+  default event void Read.readDone[uint8_t client](error_t result, width_t data) { }
+}
diff --git a/tos/system/NoArbiterC.nc b/tos/system/NoArbiterC.nc
new file mode 100644
index 00000000..40fe783d
--- /dev/null
+++ b/tos/system/NoArbiterC.nc
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * A do-nothing arbiter for non-shared resources which need to pretend to
+ * have arbitration. Just grants all requests, without any error
+ * checking. Does still call ResourceConfigure at the right time.
+ *
+ * @author David Gay
+ * @author Kevin Klues
+ */
+
+generic module NoArbiterC() {
+  provides interface Resource;
+  uses interface ResourceConfigure;
+}
+implementation {
+  task void granted() {
+    call ResourceConfigure.configure();
+    signal Resource.granted();
+  }
+
+  async command error_t Resource.request() {
+    post granted();
+    return SUCCESS;
+  }
+
+  async command error_t Resource.immediateRequest() {
+    call ResourceConfigure.configure();
+    return SUCCESS;
+  }  
+
+  async command error_t Resource.release() {
+    call ResourceConfigure.unconfigure();
+    return SUCCESS;
+  } 
+
+  async command uint8_t Resource.isOwner() {
+    return TRUE;
+  }
+
+  default async command void ResourceConfigure.configure() { }
+  default async command void ResourceConfigure.unconfigure() { }
+}
diff --git a/tos/system/NoInitC.nc b/tos/system/NoInitC.nc
new file mode 100644
index 00000000..7fcb6fbc
--- /dev/null
+++ b/tos/system/NoInitC.nc
@@ -0,0 +1,25 @@
+/* $Id: NoInitC.nc,v 1.5 2008-06-26 04:39:15 regehr Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * A do-nothing Init implementation. Useful for implementing components whose
+ * specification has an Init, but whose implementation doesn't need one.
+ *
+ * @author David Gay <david.e.gay@intel.com>
+ */
+module NoInitC @safe()
+{
+  provides interface Init;
+}
+implementation
+{
+  command error_t Init.init() {
+    return SUCCESS;
+  }
+}
diff --git a/tos/system/NoLedsC.nc b/tos/system/NoLedsC.nc
new file mode 100644
index 00000000..3207cdcc
--- /dev/null
+++ b/tos/system/NoLedsC.nc
@@ -0,0 +1,67 @@
+// $Id: NoLedsC.nc,v 1.7 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * A null operation replacement for the LedsC component. As many
+ * components might concurrently signal information through LEDs,
+ * using LedsC and NoLedsC allows an application builder to select
+ * which components control the LEDs.
+ *
+ * @author Philip Levis
+ * @date   March 19, 2005
+ */
+
+module NoLedsC {
+  provides interface Init;
+  provides interface Leds;
+}
+implementation {
+
+  command error_t Init.init() {return SUCCESS;}
+
+  async command void Leds.led0On() {}
+  async command void Leds.led0Off() {}
+  async command void Leds.led0Toggle() {}
+
+  async command void Leds.led1On() {}
+  async command void Leds.led1Off() {}
+  async command void Leds.led1Toggle() {}
+
+  async command void Leds.led2On() {}
+  async command void Leds.led2Off() {}
+  async command void Leds.led2Toggle() {}
+
+  async command uint8_t Leds.get() {return 0;}
+  async command void Leds.set(uint8_t val) {}
+}
diff --git a/tos/system/NoPinC.nc b/tos/system/NoPinC.nc
new file mode 100644
index 00000000..91952503
--- /dev/null
+++ b/tos/system/NoPinC.nc
@@ -0,0 +1,31 @@
+/* $Id: NoPinC.nc,v 1.4 2006-12-12 18:23:47 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * Dummy pin component.
+ *
+ * @author David Gay
+ */
+
+generic module NoPinC()
+{
+  provides interface GeneralIO;
+}
+implementation
+{
+  async command bool GeneralIO.get() { return 0; }
+  async command void GeneralIO.set() { }
+  async command void GeneralIO.clr() { }
+  async command void GeneralIO.toggle() { }
+  async command void GeneralIO.makeInput() { }
+  async command void GeneralIO.makeOutput() { }
+  async command bool GeneralIO.isInput() { }
+  async command bool GeneralIO.isOutput() { }
+}
+
diff --git a/tos/system/PoolC.nc b/tos/system/PoolC.nc
new file mode 100644
index 00000000..1c3a7359
--- /dev/null
+++ b/tos/system/PoolC.nc
@@ -0,0 +1,50 @@
+/* $Id: PoolC.nc,v 1.4 2006-12-12 18:23:47 vlahan Exp $ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  A general dynamic memory pool component.
+ *
+ *  @author Philip Levis
+ *  @author Geoffrey Mainland
+ *  @date   $Date: 2006-12-12 18:23:47 $
+ */
+
+generic configuration PoolC(typedef pool_t, uint8_t POOL_SIZE) {
+  provides interface Pool<pool_t>;
+} 
+
+implementation {
+  components MainC, new PoolP(pool_t, POOL_SIZE);
+
+  MainC.SoftwareInit -> PoolP;
+  Pool = PoolP;
+}
diff --git a/tos/system/PoolP.nc b/tos/system/PoolP.nc
new file mode 100644
index 00000000..428f76b4
--- /dev/null
+++ b/tos/system/PoolP.nc
@@ -0,0 +1,118 @@
+/* $Id: PoolP.nc,v 1.7 2010-01-20 19:59:07 scipio Exp $ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+/**
+ *  Implementation of a general dynamic memory pool component.
+ *  Note that the allocation/deallocation policies are 
+ *  different than traditional dynamic allocators such as
+ *  malloc or slab allocators. When initialized, the Pool
+ *  contains <code>size</code> items of type <code>pool_t</code>.
+ *  These elements can be removed from the pool for use with 
+ *  <code>Pool.get</code>, and new elements can be placed in
+ *  the pool with <code>Pool.put</code>. The pool allows 
+ *  components to <code>put</code> elements besides those which
+ *  were obtained with <code>get</code>. The pool can never have
+ *  more than <code>size</code> elements in it.
+ *
+ *  @author Philip Levis
+ *  @author Kyle Jamieson
+ *  @author Geoffrey Mainland
+ *  @date   $Date: 2010-01-20 19:59:07 $
+ */
+
+generic module PoolP(typedef pool_t, uint8_t size) {
+  provides {
+    interface Init;
+    interface Pool<pool_t>;
+  }
+}
+implementation {
+  uint8_t free;
+  uint8_t index;
+  pool_t* ONE_NOK queue[size];
+  pool_t pool[size];
+
+  command error_t Init.init() {
+    int i;
+    for (i = 0; i < size; i++) {
+      queue[i] = &pool[i];
+    }
+    free = size;
+    index = 0;
+    return SUCCESS;
+  }
+  
+  command bool Pool.empty() {
+    dbg("PoolP", "%s size is %i\n", __FUNCTION__, (int)free);
+    return free == 0;
+  }
+  command uint8_t Pool.size() {
+    dbg("PoolP", "%s size is %i\n", __FUNCTION__, (int)free);
+    return free;
+  }
+    
+  command uint8_t Pool.maxSize() {
+    return size;
+  }
+
+  command pool_t* Pool.get() {
+    if (free) {
+      pool_t* rval = queue[index];
+      queue[index] = NULL;
+      free--;
+      index++;
+      if (index == size) {
+        index = 0;
+      }
+      dbg("PoolP", "%s size is %i\n", __FUNCTION__, (int)free);
+      return rval;
+    }
+    return NULL;
+  }
+
+  command error_t Pool.put(pool_t* newVal) {
+    if (free >= size) {
+      return FAIL;
+    }
+    else {
+      uint16_t emptyIndex = (index + free);
+      if (emptyIndex >= size) {
+        emptyIndex -= size;
+      }
+      queue[emptyIndex] = newVal;
+      free++;
+      dbg("PoolP", "%s size is %i\n", __FUNCTION__, (int)free);
+      return SUCCESS;
+    }
+  }
+}
diff --git a/tos/system/QueueC.nc b/tos/system/QueueC.nc
new file mode 100644
index 00000000..144291f5
--- /dev/null
+++ b/tos/system/QueueC.nc
@@ -0,0 +1,120 @@
+/* $Id: QueueC.nc,v 1.7 2009-06-25 18:37:24 scipio Exp $ */
+/*
+ * Copyright (c) 2006 Stanford University.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Stanford University nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL STANFORD
+ * UNIVERSITY OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *  A general FIFO queue component, whose queue has a bounded size.
+ *
+ *  @author Philip Levis
+ *  @author Geoffrey Mainland
+ *  @date   $Date: 2009-06-25 18:37:24 $
+ */
+
+   
+generic module QueueC(typedef queue_t, uint8_t QUEUE_SIZE) {
+  provides interface Queue<queue_t>;
+}
+
+implementation {
+
+  queue_t ONE_NOK queue[QUEUE_SIZE];
+  uint8_t head = 0;
+  uint8_t tail = 0;
+  uint8_t size = 0;
+  
+  command bool Queue.empty() {
+    return size == 0;
+  }
+
+  command uint8_t Queue.size() {
+    return size;
+  }
+
+  command uint8_t Queue.maxSize() {
+    return QUEUE_SIZE;
+  }
+
+  command queue_t Queue.head() {
+    return queue[head];
+  }
+
+  void printQueue() {
+#ifdef TOSSIM
+    int i, j;
+    dbg("QueueC", "head <-");
+    for (i = head; i < head + size; i++) {
+      dbg_clear("QueueC", "[");
+      for (j = 0; j < sizeof(queue_t); j++) {
+	uint8_t v = ((uint8_t*)&queue[i % QUEUE_SIZE])[j];
+	dbg_clear("QueueC", "%0.2hhx", v);
+      }
+      dbg_clear("QueueC", "] ");
+    }
+    dbg_clear("QueueC", "<- tail\n");
+#endif
+  }
+  
+  command queue_t Queue.dequeue() {
+    queue_t t = call Queue.head();
+    dbg("QueueC", "%s: size is %hhu\n", __FUNCTION__, size);
+    if (!call Queue.empty()) {
+      head++;
+      if (head == QUEUE_SIZE) head = 0;
+      size--;
+      printQueue();
+    }
+    return t;
+  }
+
+  command error_t Queue.enqueue(queue_t newVal) {
+    if (call Queue.size() < call Queue.maxSize()) {
+      dbg("QueueC", "%s: size is %hhu\n", __FUNCTION__, size);
+      queue[tail] = newVal;
+      tail++;
+      if (tail == QUEUE_SIZE) tail = 0;
+      size++;
+      printQueue();
+      return SUCCESS;
+    }
+    else {
+      return FAIL;
+    }
+  }
+  
+  command queue_t Queue.element(uint8_t idx) {
+    idx += head;
+    if (idx >= QUEUE_SIZE) {
+      idx -= QUEUE_SIZE;
+    }
+    return queue[idx];
+  }  
+
+}
diff --git a/tos/system/RandomC.nc b/tos/system/RandomC.nc
new file mode 100644
index 00000000..efb92ec0
--- /dev/null
+++ b/tos/system/RandomC.nc
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2002-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The standard TinyOS random number generator. If your system requires a 
+ * specific random number generator, it should wire to that component
+ * directly. 
+ *
+ * @author  Barbara Hohlt 
+ * @author  Phil Levis 
+ * @date    March 1 2005
+ */
+
+configuration RandomC {
+  provides interface Init;
+  provides interface ParameterInit<uint16_t> as SeedInit;
+  provides interface Random;
+}
+
+implementation {
+  components RandomMlcgC, MainC;
+  
+  MainC.SoftwareInit -> RandomMlcgC;
+
+  Init = RandomMlcgC;
+  SeedInit = RandomMlcgC;
+  Random = RandomMlcgC;
+
+} 
diff --git a/tos/system/RandomLfsrC.nc b/tos/system/RandomLfsrC.nc
new file mode 100644
index 00000000..02b72b43
--- /dev/null
+++ b/tos/system/RandomLfsrC.nc
@@ -0,0 +1,102 @@
+// $Id: RandomLfsrC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ *
+ * Authors:		Alec Woo, David Gay, Philip Levis
+ * Date last modified:  8/8/05
+ *
+ */
+
+/**
+ * This is a 16 bit Linear Feedback Shift Register pseudo random number
+   generator. It is faster than the MLCG generator, but the numbers generated
+ * have less randomness.
+ *
+ * @author Alec Woo
+ * @author David Gay
+ * @author Philip Levis
+ * @date   August 8 2005
+ */
+
+module RandomLfsrC
+{
+  provides interface Init;
+  provides interface Random;
+}
+implementation
+{
+  uint16_t shiftReg;
+  uint16_t initSeed;
+  uint16_t mask;
+
+  /* Initialize the seed from the ID of the node */
+  command error_t Init.init() {
+    atomic {
+      shiftReg = 119 * 119 * (TOS_NODE_ID + 1);
+      initSeed = shiftReg;
+      mask = 137 * 29 * (TOS_NODE_ID + 1);
+    }
+    return SUCCESS;
+  }
+
+  /* Return the next 16 bit random number */
+  async command uint16_t Random.rand16() {
+    bool endbit;
+    uint16_t tmpShiftReg;
+    atomic {
+      tmpShiftReg = shiftReg;
+      endbit = ((tmpShiftReg & 0x8000) != 0);
+      tmpShiftReg <<= 1;
+      if (endbit) 
+	tmpShiftReg ^= 0x100b;
+      tmpShiftReg++;
+      shiftReg = tmpShiftReg;
+      tmpShiftReg = tmpShiftReg ^ mask;
+    }
+    return tmpShiftReg;
+  }
+
+  async command uint32_t Random.rand32() {
+    return (uint32_t)call Random.rand16() << 16 | call Random.rand16();
+  }
+}
diff --git a/tos/system/RandomMlcgC.nc b/tos/system/RandomMlcgC.nc
new file mode 100644
index 00000000..e38d572f
--- /dev/null
+++ b/tos/system/RandomMlcgC.nc
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2002-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/** This code is a fast implementation of the Park-Miller Minimal Standard 
+ *  Generator for pseudo-random numbers.  It uses the 32 bit multiplicative 
+ *  linear congruential generator, 
+ *
+ *		S' = (A x S) mod (2^31 - 1) 
+ *
+ *  for A = 16807.
+ *
+ *
+ * @author Barbara Hohlt 
+ * @date   March 1 2005
+ */
+
+module RandomMlcgC @safe() {
+  provides interface Init;
+  provides interface ParameterInit<uint16_t> as SeedInit;
+  provides interface Random;
+}
+implementation
+{
+    uint32_t seed ;
+
+  /* Initialize the seed from the ID of the node */
+  command error_t Init.init() {
+    atomic  seed = (uint32_t)(TOS_NODE_ID + 1);
+    
+    return SUCCESS;
+  }
+
+  /* Initialize with 16-bit seed */ 
+  command error_t SeedInit.init(uint16_t s) {
+    atomic  seed = (uint32_t)(s + 1);
+    
+    return SUCCESS;
+  }
+
+  /* Return the next 32 bit random number */
+  async command uint32_t Random.rand32() {
+    uint32_t mlcg,p,q;
+    uint64_t tmpseed;
+    atomic
+      {
+	tmpseed =  (uint64_t)33614U * (uint64_t)seed;
+	q = tmpseed; 	/* low */
+	q = q >> 1;
+	p = tmpseed >> 32 ;		/* hi */
+	mlcg = p + q;
+        if (mlcg & 0x80000000) { 
+	  mlcg = mlcg & 0x7FFFFFFF;
+	  mlcg++;
+	}
+	seed = mlcg;
+      }
+    return mlcg; 
+  }
+
+  /* Return low 16 bits of next 32 bit random number */
+  async command uint16_t Random.rand16() {
+    return (uint16_t)call Random.rand32();
+  }
+
+#if 0
+ /* Return high 16 bits of 32 bit number */
+ inline uint16_t getHigh16(uint32_t num) {
+    return num >> 16;
+ }
+#endif
+}
diff --git a/tos/system/RealMainP.nc b/tos/system/RealMainP.nc
new file mode 100644
index 00000000..f293e65b
--- /dev/null
+++ b/tos/system/RealMainP.nc
@@ -0,0 +1,108 @@
+// $Id: RealMainP.nc,v 1.9 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/*
+ *
+ * Authors:		Philip Levis
+ * Date last modified:  $Id: RealMainP.nc,v 1.9 2010-06-29 22:07:56 scipio Exp $
+ *
+ */
+
+/**
+ * RealMain implements the TinyOS boot sequence, as documented in TEP 107.
+ *
+ * @author Philip Levis
+ * @date   January 17 2005
+ */
+
+module RealMainP @safe() {
+  provides interface Boot;
+  uses interface Scheduler;
+  uses interface Init as PlatformInit;
+  uses interface Init as SoftwareInit;
+}
+implementation {
+  int main() @C() @spontaneous() {
+    atomic
+      {
+	/* First, initialize the Scheduler so components can post
+	   tasks. Initialize all of the very hardware specific stuff, such
+	   as CPU settings, counters, etc. After the hardware is ready,
+	   initialize the requisite software components and start
+	   execution.*/
+	platform_bootstrap();
+	
+	call Scheduler.init(); 
+    
+	/* Initialize the platform. Then spin on the Scheduler, passing
+	 * FALSE so it will not put the system to sleep if there are no
+	 * more tasks; if no tasks remain, continue on to software
+	 * initialization */
+	call PlatformInit.init();    
+	while (call Scheduler.runNextTask());
+
+	/* Initialize software components.Then spin on the Scheduler,
+	 * passing FALSE so it will not put the system to sleep if there
+	 * are no more tasks; if no tasks remain, the system has booted
+	 * successfully.*/
+	call SoftwareInit.init(); 
+	while (call Scheduler.runNextTask());
+      }
+
+    /* Enable interrupts now that system is ready. */
+    __nesc_enable_interrupt();
+
+    signal Boot.booted();
+
+    /* Spin in the Scheduler */       
+    call Scheduler.taskLoop();
+
+    /* We should never reach this point, but some versions of
+     * gcc don't realize that and issue a warning if we return
+     * void from a non-void function. So include this. */
+    return -1;
+  }
+
+  default command error_t PlatformInit.init() { return SUCCESS; }
+  default command error_t SoftwareInit.init() { return SUCCESS; }
+  default event void Boot.booted() { }
+}
+
diff --git a/tos/system/RoundRobinArbiterC.nc b/tos/system/RoundRobinArbiterC.nc
new file mode 100644
index 00000000..bfd82a49
--- /dev/null
+++ b/tos/system/RoundRobinArbiterC.nc
@@ -0,0 +1,112 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*
+ * - Revision -------------------------------------------------------------
+ * $Revision: 1.7 $
+ * $Date: 2010-06-29 22:07:56 $ 
+ * ======================================================================== 
+ */
+ 
+/**
+ * Please refer to TEP 108 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component provides the Resource, ArbiterInfo, and ResourceDefaultOwner
+ * interfaces and uses the ResourceConfigure interface as
+ * described in TEP 108.  It provides arbitration to a shared resource in
+ * a Round Robin fashion.  An array is used to keep track of which users have 
+ * put in requests for the resource.  Upon the release of the resource by one
+ * of these users, the array is checked and the next user (in Round Robin order)
+ * that has a pending request will ge granted control of the resource.  If
+ * there are no pending requests, then the resource is granted to the default 
+ * user.  If a new request is made, the default user will release the resource, 
+ * and it will be granted to the requesting cleint.
+ *
+ * @param <b>resourceName</b> -- The name of the Resource being shared
+ * 
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ */
+ 
+generic configuration RoundRobinArbiterC(char resourceName[]) {
+  provides {
+    interface Resource[uint8_t id];
+    interface ResourceRequested[uint8_t id];
+    interface ResourceDefaultOwner;
+    interface ArbiterInfo;
+  }
+  uses interface ResourceConfigure[uint8_t id];
+}
+implementation {
+  components MainC;
+  components new RoundRobinResourceQueueC(uniqueCount(resourceName)) as Queue;
+  components new ArbiterP(uniqueCount(resourceName)) as Arbiter;
+
+  MainC.SoftwareInit -> Queue;
+
+  Resource = Arbiter;
+  ResourceRequested = Arbiter;
+  ResourceDefaultOwner = Arbiter;
+  ArbiterInfo = Arbiter;
+  ResourceConfigure = Arbiter;
+
+  Arbiter.Queue -> Queue;
+}
diff --git a/tos/system/RoundRobinResourceQueueC.nc b/tos/system/RoundRobinResourceQueueC.nc
new file mode 100644
index 00000000..757ecc55
--- /dev/null
+++ b/tos/system/RoundRobinResourceQueueC.nc
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ *
+ * @author Kevin Klues (klueska@cs.wustl.edu)
+ * @version $Revision: 1.7 $
+ * @date $Date: 2010-06-29 22:07:56 $
+ */
+ 
+#include "Resource.h"
+ 
+generic module RoundRobinResourceQueueC(uint8_t size) @safe() {
+  provides {
+    interface Init;
+    interface ResourceQueue as RoundRobinQueue;
+  }
+}
+implementation {
+  enum {
+    NO_ENTRY = 0xFF,
+    SIZE = size ? (size - 1) / 8 + 1 : 0
+  };
+
+  uint8_t resQ[SIZE];
+  uint8_t last = 0;
+
+  void clearEntry(uint8_t id) {
+    resQ[id / 8] &= ~(1 << (id % 8));
+  }
+
+  command error_t Init.init() {
+    memset(resQ, 0, sizeof(resQ));
+    return SUCCESS;
+  }  
+  
+  async command bool RoundRobinQueue.isEmpty() {
+    int i;
+    atomic {
+      for (i = 0; i<sizeof(resQ); i++)
+        if(resQ[i] > 0) return FALSE;
+      return TRUE;
+    }
+  }
+  	
+  async command bool RoundRobinQueue.isEnqueued(resource_client_id_t id) {
+  	return resQ[id / 8] & (1 << (id % 8));
+  }
+
+  async command resource_client_id_t RoundRobinQueue.dequeue() {
+    int i;
+    atomic {
+      for (i = last+1; ; i++) {
+        if(i == size)
+          i = 0;
+        if (call RoundRobinQueue.isEnqueued(i)) {
+          clearEntry(i);
+          last = i;
+          return i;
+        }
+        if (i == last)
+          break;
+      }
+      return NO_ENTRY;
+    }
+  }
+  
+  async command error_t RoundRobinQueue.enqueue(resource_client_id_t id) {
+    atomic {
+      if (!(call RoundRobinQueue.isEnqueued(id))) {
+        resQ[id / 8] |=  1 << (id % 8);
+        return SUCCESS;
+      }
+      return EBUSY;
+    }
+  }
+}
diff --git a/tos/system/SchedulerBasicP.nc b/tos/system/SchedulerBasicP.nc
new file mode 100644
index 00000000..25899e9e
--- /dev/null
+++ b/tos/system/SchedulerBasicP.nc
@@ -0,0 +1,179 @@
+// $Id: SchedulerBasicP.nc,v 1.11 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * SchedulerBasicP implements the default TinyOS scheduler sequence, as
+ * documented in TEP 106.
+ *
+ * @author Philip Levis
+ * @author Cory Sharp
+ * @date   January 19 2005
+ */
+
+#include "hardware.h"
+
+module SchedulerBasicP @safe() {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t id];
+  uses interface McuSleep;
+}
+implementation
+{
+  enum
+  {
+    NUM_TASKS = uniqueCount("TinySchedulerC.TaskBasic"),
+    NO_TASK = 255,
+  };
+
+  uint8_t m_head;
+  uint8_t m_tail;
+  uint8_t m_next[NUM_TASKS];
+
+  // Helper functions (internal functions) intentionally do not have atomic
+  // sections.  It is left as the duty of the exported interface functions to
+  // manage atomicity to minimize chances for binary code bloat.
+
+  // move the head forward
+  // if the head is at the end, mark the tail at the end, too
+  // mark the task as not in the queue
+  inline uint8_t popTask()
+  {
+    if( m_head != NO_TASK )
+    {
+      uint8_t id = m_head;
+      m_head = m_next[m_head];
+      if( m_head == NO_TASK )
+      {
+	m_tail = NO_TASK;
+      }
+      m_next[id] = NO_TASK;
+      return id;
+    }
+    else
+    {
+      return NO_TASK;
+    }
+  }
+  
+  bool isWaiting( uint8_t id )
+  {
+    return (m_next[id] != NO_TASK) || (m_tail == id);
+  }
+
+  bool pushTask( uint8_t id )
+  {
+    if( !isWaiting(id) )
+    {
+      if( m_head == NO_TASK )
+      {
+	m_head = id;
+	m_tail = id;
+      }
+      else
+      {
+	m_next[m_tail] = id;
+	m_tail = id;
+      }
+      return TRUE;
+    }
+    else
+    {
+      return FALSE;
+    }
+  }
+  
+  command void Scheduler.init()
+  {
+    atomic
+    {
+      memset( (void *)m_next, NO_TASK, sizeof(m_next) );
+      m_head = NO_TASK;
+      m_tail = NO_TASK;
+    }
+  }
+  
+  command bool Scheduler.runNextTask()
+  {
+    uint8_t nextTask;
+    atomic
+    {
+      nextTask = popTask();
+      if( nextTask == NO_TASK )
+      {
+	return FALSE;
+      }
+    }
+    signal TaskBasic.runTask[nextTask]();
+    return TRUE;
+  }
+
+  command void Scheduler.taskLoop()
+  {
+    for (;;)
+    {
+      uint8_t nextTask;
+
+      atomic
+      {
+	while ((nextTask = popTask()) == NO_TASK)
+	{
+	  call McuSleep.sleep();
+	}
+      }
+      signal TaskBasic.runTask[nextTask]();
+    }
+  }
+
+  /**
+   * Return SUCCESS if the post succeeded, EBUSY if it was already posted.
+   */
+  
+  async command error_t TaskBasic.postTask[uint8_t id]()
+  {
+    atomic { return pushTask(id) ? SUCCESS : EBUSY; }
+  }
+
+  default event void TaskBasic.runTask[uint8_t id]()
+  {
+  }
+}
+
diff --git a/tos/system/SimpleArbiterP.nc b/tos/system/SimpleArbiterP.nc
new file mode 100644
index 00000000..30f185f2
--- /dev/null
+++ b/tos/system/SimpleArbiterP.nc
@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+ 
+/**
+ * Please refer to TEP 108 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component provides the Resource, ArbiterInfo, and ResourceRequested
+ * interfaces and uses the ResourceConfigure interface as
+ * described in TEP 108.  It provides arbitration to a shared resource.
+ * An queue is used to keep track of which users have put
+ * in requests for the resource.  Upon the release of the resource by one
+ * of these users, the queue is checked and the next user
+ * that has a pending request will ge granted control of the resource.  If
+ * there are no pending requests, then the resource becomes idle and any
+ * user can put in a request and immediately receive access to the
+ * Resource.
+ * 
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Philip Levis
+ */
+ 
+generic module SimpleArbiterP() @safe() {
+  provides {
+    interface Resource[uint8_t id];
+    interface ResourceRequested[uint8_t id];
+    interface ArbiterInfo;
+  }
+  uses {
+    interface ResourceConfigure[uint8_t id];
+    interface ResourceQueue as Queue;
+  }
+}
+implementation {
+
+  enum {RES_IDLE = 0, RES_GRANTING = 1, RES_BUSY = 2};
+  enum {NO_RES = 0xFF};
+
+  uint8_t state = RES_IDLE;
+  norace uint8_t resId = NO_RES;
+  norace uint8_t reqResId;
+  
+  task void grantedTask();
+  
+  async command error_t Resource.request[uint8_t id]() {
+    signal ResourceRequested.requested[resId]();
+    atomic {
+      if(state == RES_IDLE) {
+        state = RES_GRANTING;
+        reqResId = id;
+        post grantedTask();
+        return SUCCESS;
+      }
+      return call Queue.enqueue(id);
+    }
+  }
+
+  async command error_t Resource.immediateRequest[uint8_t id]() {
+    signal ResourceRequested.immediateRequested[resId]();
+    atomic {
+      if(state == RES_IDLE) {
+        state = RES_BUSY;
+        resId = id;
+        call ResourceConfigure.configure[resId]();
+        return SUCCESS;
+      }
+      return FAIL;
+    }
+  }
+   
+  async command error_t Resource.release[uint8_t id]() {
+    bool released = FALSE;
+    atomic {
+      if(state == RES_BUSY && resId == id) {
+        if(call Queue.isEmpty() == FALSE) {
+          resId = NO_RES;
+          reqResId = call Queue.dequeue();
+          state = RES_GRANTING;
+          post grantedTask();
+        }
+        else {
+          resId = NO_RES;
+          state = RES_IDLE;
+        }
+        released = TRUE;
+      }
+    }
+    if(released == TRUE) {
+	    call ResourceConfigure.unconfigure[id]();
+      return SUCCESS;
+    }
+    return FAIL;
+  }
+    
+  /**
+    Check if the Resource is currently in use
+  */    
+  async command bool ArbiterInfo.inUse() {
+    atomic {
+      if (state == RES_IDLE)
+        return FALSE;
+    }
+    return TRUE;
+  }
+
+  /**
+    Returns the current user of the Resource.
+    If there is no current user, the return value
+    will be 0xFF
+  */      
+  async command uint8_t ArbiterInfo.userId() {
+    atomic {
+      if(state != RES_BUSY)
+        return NO_RES;
+      return resId;
+    }
+  }
+
+  /**
+   * Returns whether you are the current owner of the resource or not
+   */      
+  async command uint8_t Resource.isOwner[uint8_t id]() {
+    atomic {
+      if(resId == id && state == RES_BUSY) return TRUE;
+      else return FALSE;
+    }
+  }
+  
+  task void grantedTask() {
+    atomic {
+      resId = reqResId;
+      state = RES_BUSY;
+    }
+    call ResourceConfigure.configure[resId]();
+    signal Resource.granted[resId]();
+  }
+  
+  //Default event/command handlers
+  default event void Resource.granted[uint8_t id]() {
+  }
+  default async event void ResourceRequested.requested[uint8_t id]() {
+  }
+  default async event void ResourceRequested.immediateRequested[uint8_t id]() {
+  }
+  default async command void ResourceConfigure.configure[uint8_t id]() {
+  }
+  default async command void ResourceConfigure.unconfigure[uint8_t id]() {
+  }
+}
diff --git a/tos/system/SimpleFcfsArbiterC.nc b/tos/system/SimpleFcfsArbiterC.nc
new file mode 100644
index 00000000..67a9fe6d
--- /dev/null
+++ b/tos/system/SimpleFcfsArbiterC.nc
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+ 
+/**
+ * Please refer to TEP 108 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component provides the Resource, ArbiterInfo, and Resource
+ * Controller interfaces and uses the ResourceConfigure interface as
+ * described in TEP 108.  It provides arbitration to a shared resource in
+ * an FCFS fashion.  An array is used to keep track of which users have put
+ * in requests for the resource.  Upon the release of the resource by one
+ * of these users, the array is checked and the next user (in FCFS order)
+ * that has a pending request will ge granted control of the resource.  If
+ * there are no pending requests, then the resource becomes idle and any
+ * user can put in a request and immediately receive access to the
+ * Resource.
+ *
+ * @param <b>resourceName</b> -- The name of the Resource being shared
+ * 
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Philip Levis
+ */
+ 
+generic configuration SimpleFcfsArbiterC(char resourceName[]) {
+  provides {
+    interface Resource[uint8_t id];
+    interface ResourceRequested[uint8_t id];
+    interface ArbiterInfo;
+  }
+  uses interface ResourceConfigure[uint8_t id];
+}
+implementation {
+  components MainC;
+  components new FcfsResourceQueueC(uniqueCount(resourceName)) as Queue;
+  components new SimpleArbiterP() as Arbiter;
+
+  MainC.SoftwareInit -> Queue;
+
+  Resource = Arbiter;
+  ResourceRequested = Arbiter;
+  ArbiterInfo = Arbiter;
+  ResourceConfigure = Arbiter;
+
+  Arbiter.Queue -> Queue;
+}
diff --git a/tos/system/SimpleRoundRobinArbiterC.nc b/tos/system/SimpleRoundRobinArbiterC.nc
new file mode 100644
index 00000000..7fbdd266
--- /dev/null
+++ b/tos/system/SimpleRoundRobinArbiterC.nc
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2005 Washington University in St. Louis.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+ 
+/*
+ * Copyright (c) 2004, Technische Universitat Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+ 
+/**
+ * Please refer to TEP 108 for more information about this component and its
+ * intended use.<br><br>
+ *
+ * This component provides the Resource, ArbiterInfo, and Resource
+ * Controller interfaces and uses the ResourceConfigure interface as
+ * described in TEP 108.  It provides arbitration to a shared resource in
+ * an FCFS fashion.  An array is used to keep track of which users have put
+ * in requests for the resource.  Upon the release of the resource by one
+ * of these users, the array is checked and the next user (in FCFS order)
+ * that has a pending request will ge granted control of the resource.  If
+ * there are no pending requests, then the resource becomes idle and any
+ * user can put in a request and immediately receive access to the
+ * Resource.
+ *
+ * @param <b>resourceName</b> -- The name of the Resource being shared
+ * 
+ * @author Kevin Klues (klues@tkn.tu-berlin.de)
+ * @author Philip Levis
+ */
+ 
+generic configuration SimpleRoundRobinArbiterC(char resourceName[]) {
+  provides {
+    interface Resource[uint8_t id];
+    interface ResourceRequested[uint8_t id];
+    interface ArbiterInfo;
+  }
+  uses interface ResourceConfigure[uint8_t id];
+}
+implementation {
+  components MainC;
+  components new RoundRobinResourceQueueC(uniqueCount(resourceName)) as Queue;
+  components new SimpleArbiterP() as Arbiter;
+
+  MainC.SoftwareInit -> Queue;
+
+  Resource = Arbiter;
+  ResourceRequested = Arbiter;
+  ArbiterInfo = Arbiter;
+  ResourceConfigure = Arbiter;
+
+  Arbiter.Queue -> Queue;
+}
diff --git a/tos/system/SineSensorC.nc b/tos/system/SineSensorC.nc
new file mode 100644
index 00000000..62c36240
--- /dev/null
+++ b/tos/system/SineSensorC.nc
@@ -0,0 +1,45 @@
+/* $Id: SineSensorC.nc,v 1.4 2006-12-12 18:23:47 vlahan Exp $
+ * Copyright (c) 2006 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+/**
+ * The micaZ doesn't have any built-in sensors - the DemoSensor returns
+ * a constant value of 0xbeef, or just reads the ground value for the
+ * stream sensor.
+ *
+ * @author Philip Levis
+ * @authod David Gay
+ */
+
+generic module SineSensorC()
+{
+  provides interface Init;
+  provides interface Read<uint16_t>;
+}
+implementation {
+
+  uint32_t counter;
+
+  command error_t Init.init() {
+    counter = TOS_NODE_ID * 40;
+    return SUCCESS;
+  }
+  
+  task void readTask() {
+    float val = (float)counter;
+    val = val / 20.0;
+    val = sin(val) * 32768.0;
+    val += 32768.0;
+    counter++;
+    signal Read.readDone(SUCCESS, (uint16_t)val);
+  }
+  command error_t Read.read() {
+    post readTask();
+    return SUCCESS;
+  }
+}
diff --git a/tos/system/StateC.nc b/tos/system/StateC.nc
new file mode 100644
index 00000000..a4568919
--- /dev/null
+++ b/tos/system/StateC.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+
+/**
+ * This is a state controller for any and every component's
+ * state machine(s).
+ *
+ * There are several compelling reasons to use the State module/interface
+ * in all your components that have any kind of state associated with them:
+ *
+ *   1) It provides a unified interface to control any state, which makes
+ *      it easy for everyone to understand your code
+ *   2) You can easily keep track of multiple state machines in one component
+ *   3) You could have one state machine control several components
+ *
+ * There are three ways to change a component's state:
+ *  > Request a state change
+ *     The state is only changed if the state is currently in S_IDLE.  If
+ *     the state changes and access is grated, requestState returns SUCCESS.
+ *
+ *  > Force a state change
+ *     The state changes no matter what
+ * 
+ *  > toIdle()
+ *     The state changes to S_IDLE, no matter what state the component is in.
+ *
+ * S_IDLE is the default state, and is always equal to 0.  Therefore,
+ * setup the enums in your internal component so the IDLE/default state is
+ * always 0.
+ *
+ * @author David Moss - dmm@rincon.com
+ */
+ 
+#include "State.h"
+
+generic configuration StateC() {
+  provides {
+    interface State;
+  }
+}
+
+implementation {
+  components StateImplC;
+
+  State = StateImplC.State[unique(UQ_STATE)];
+}
+
+
+
diff --git a/tos/system/StateImplC.nc b/tos/system/StateImplC.nc
new file mode 100644
index 00000000..d74ae414
--- /dev/null
+++ b/tos/system/StateImplC.nc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * This is a state controller for any and every component's
+ * state machine(s).
+ *
+ * There are several compelling reasons to use the State module/interface
+ * in all your components that have any kind of state associated with them:
+ *
+ *   1) It provides a unified interface to control any state, which makes
+ *      it easy for everyone to understand your code
+ *   2) You can easily keep track of multiple state machines in one component
+ *   3) You could have one state machine control several components
+ *
+ * There are three ways to change a component's state:
+ *  > Request a state change
+ *     The state is only changed if the state is currently in S_IDLE.  If
+ *     the state changes and access is grated, requestState returns SUCCESS.
+ *
+ *  > Force a state change
+ *     The state changes no matter what
+ * 
+ *  > toIdle()
+ *     The state changes to S_IDLE, no matter what state the component is in.
+ *
+ * S_IDLE is the default state, and is always equal to 0.  Therefore,
+ * setup the enums in your internal component so the IDLE/default state is
+ * always 0.
+ *
+ * @author David Moss - dmm@rincon.com
+ */
+
+#include "State.h"
+
+configuration StateImplC {
+  provides {
+    interface State[uint8_t id];
+  }
+}
+
+implementation {
+  components MainC, 
+      StateImplP;
+
+  MainC.SoftwareInit -> StateImplP;
+  State = StateImplP;
+  
+}
+
diff --git a/tos/system/StateImplP.nc b/tos/system/StateImplP.nc
new file mode 100644
index 00000000..3883ac15
--- /dev/null
+++ b/tos/system/StateImplP.nc
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Rincon Research Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * RINCON RESEARCH OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * This is a state controller for any and every component's
+ * state machine(s).
+ *
+ * There are several compelling reasons to use the State module/interface
+ * in all your components that have any kind of state associated with them:
+ *
+ *   1) It provides a unified interface to control any state, which makes
+ *      it easy for everyone to understand your code
+ *   2) You can easily keep track of multiple state machines in one component
+ *   3) You could have one state machine control several components
+ *
+ * There are three ways to change a component's state:
+ *  > Request a state change
+ *     The state is only changed if the state is currently in S_IDLE.  If
+ *     the state changes and access is grated, requestState returns SUCCESS.
+ *
+ *  > Force a state change
+ *     The state changes no matter what
+ * 
+ *  > toIdle()
+ *     The state changes to S_IDLE, no matter what state the component is in.
+ *
+ * S_IDLE is the default state, and is always equal to 0.  Therefore,
+ * setup the enums in your internal component so the IDLE/default state is
+ * always 0.
+ *
+ * @author David Moss - dmm@rincon.com
+ */
+ 
+#include "State.h"
+ 
+module StateImplP @safe() {
+  provides {
+  	interface Init;
+    interface State[uint8_t id];
+  }
+}
+
+implementation {
+
+  /** Each component's state - uniqueCount("State") of them */
+  uint8_t state[uniqueCount(UQ_STATE)];
+  
+  enum {
+    S_IDLE = 0,
+  };
+
+  /***************** Init Commands ****************/
+  command error_t Init.init() {
+    int i;
+    for(i = 0; i < uniqueCount(UQ_STATE); i++) {
+      state[i] = S_IDLE;
+    }
+    return SUCCESS;
+  }
+  
+  
+  /***************** State Commands ****************/  
+  /**
+   * This will allow a state change so long as the current
+   * state is S_IDLE.
+   * @return SUCCESS if the state is change, FAIL if it isn't
+   */
+  async command error_t State.requestState[uint8_t id](uint8_t reqState) {
+    error_t returnVal = FAIL;
+    atomic {
+      if(reqState == S_IDLE || state[id] == S_IDLE) {
+        state[id] = reqState;
+        returnVal = SUCCESS;
+      }
+    }
+    return returnVal;
+  }
+  
+  /**
+   * Force the state machine to go into a certain state,
+   * regardless of the current state it's in.
+   */
+  async command void State.forceState[uint8_t id](uint8_t reqState) {
+    atomic state[id] = reqState;
+  }
+    
+  /**
+   * Set the current state back to S_IDLE
+   */
+  async command void State.toIdle[uint8_t id]() {
+    atomic state[id] = S_IDLE;
+  }
+  
+    
+  /**
+   * @return TRUE if the state machine is in S_IDLE
+   */
+  async command bool State.isIdle[uint8_t id]() {
+    return call State.isState[id](S_IDLE);
+  }
+  
+  /**
+   * @return TRUE if the state machine is in the given state
+   */
+  async command bool State.isState[uint8_t id](uint8_t myState) {
+    bool isState;
+    atomic isState = (state[id] == myState);
+    return isState;
+  }
+  
+  
+  /**
+   * Get the current state
+   */
+  async command uint8_t State.getState[uint8_t id]() {
+    uint8_t theState;
+    atomic theState = state[id];
+    return theState;
+  }
+  
+}
+
diff --git a/tos/system/SystemLowPowerListeningC.nc b/tos/system/SystemLowPowerListeningC.nc
new file mode 100644
index 00000000..2aa909cb
--- /dev/null
+++ b/tos/system/SystemLowPowerListeningC.nc
@@ -0,0 +1,10 @@
+configuration SystemLowPowerListeningC
+{
+  provides interface SystemLowPowerListening;
+}
+
+implementation
+{
+  components SystemLowPowerListeningP;
+  SystemLowPowerListening = SystemLowPowerListeningP;
+}
diff --git a/tos/system/SystemLowPowerListeningP.nc b/tos/system/SystemLowPowerListeningP.nc
new file mode 100644
index 00000000..564db676
--- /dev/null
+++ b/tos/system/SystemLowPowerListeningP.nc
@@ -0,0 +1,18 @@
+#include "Lpl.h"
+
+module SystemLowPowerListeningP
+{
+  provides interface SystemLowPowerListening;
+}
+
+implementation
+{
+  uint16_t remoteWakeup = LPL_DEF_REMOTE_WAKEUP;
+  uint16_t delayAfterReceive = DELAY_AFTER_RECEIVE;
+
+  command void SystemLowPowerListening.setDefaultRemoteWakeupInterval(uint16_t intervalMs) { remoteWakeup = intervalMs; }
+  command void SystemLowPowerListening.setDelayAfterReceive(uint16_t intervalMs) { delayAfterReceive = intervalMs; }
+
+  command uint16_t SystemLowPowerListening.getDefaultRemoteWakeupInterval() { return remoteWakeup; }
+  command uint16_t SystemLowPowerListening.getDelayAfterReceive() { return delayAfterReceive; }
+}
diff --git a/tos/system/TimerMilliC.nc b/tos/system/TimerMilliC.nc
new file mode 100644
index 00000000..3f15c6d6
--- /dev/null
+++ b/tos/system/TimerMilliC.nc
@@ -0,0 +1,54 @@
+// $Id: TimerMilliC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2005 Stanford University. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The virtualized millisecond timer abstraction. Instantiating this 
+ * component gives an independent millisecond granularity timer.
+ *
+ * @author Philip Levis
+ * @date   January 16 2006
+ * @see    TEP 102: Timers
+ */ 
+
+#include "Timer.h"
+
+generic configuration TimerMilliC() {
+  provides interface Timer<TMilli>;
+}
+implementation {
+  components TimerMilliP;
+
+  // The key to unique is based off of TimerMilliC because TimerMilliImplP
+  // is just a pass-through to the underlying HIL component (TimerMilli).
+  Timer = TimerMilliP.TimerMilli[unique(UQ_TIMER_MILLI)];
+}
+
diff --git a/tos/system/TimerMilliP.nc b/tos/system/TimerMilliP.nc
new file mode 100644
index 00000000..61c35231
--- /dev/null
+++ b/tos/system/TimerMilliP.nc
@@ -0,0 +1,56 @@
+// $Id: TimerMilliP.nc,v 1.6 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/**
+ * Components should never wire to this component. This is the
+ * underlying configuration of virtualized millisecond timers. 
+ * It auto-wires wires the timer
+ * implementation (TimerC) to the boot sequence and exports the
+ * various Timer interfaces.
+ *
+ * @author Philip Levis
+ * @author Cory Sharp
+ * @date   May 16 2005
+ */ 
+
+#include "Timer.h"
+
+configuration TimerMilliP {
+  provides interface Timer<TMilli> as TimerMilli[uint8_t id];
+}
+implementation {
+  components HilTimerMilliC, MainC;
+  MainC.SoftwareInit -> HilTimerMilliC;
+  TimerMilli = HilTimerMilliC;
+}
+
diff --git a/tos/system/TinySchedulerC.nc b/tos/system/TinySchedulerC.nc
new file mode 100644
index 00000000..99627c5e
--- /dev/null
+++ b/tos/system/TinySchedulerC.nc
@@ -0,0 +1,57 @@
+// $Id: TinySchedulerC.nc,v 1.5 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2005 The Regents of the University  of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * The TinyOS scheduler. It provides two interfaces: Scheduler,
+ * for TinyOS to initialize and run tasks, and TaskBasic, the simplext
+ * class of TinyOS tasks (reserved always at-most-once posting,
+ * FIFO, parameter-free). For details and information on how to
+ * replace the scheduler, refer to TEP 106.
+ *
+ * @author  Phil Levis
+ * @date    August 7 2005
+ * @see     TEP 106: Tasks and Schedulers
+ */
+
+configuration TinySchedulerC {
+  provides interface Scheduler;
+  provides interface TaskBasic[uint8_t id];
+}
+implementation {
+  components SchedulerBasicP as Sched;
+  components McuSleepC as Sleep;
+  Scheduler = Sched;
+  TaskBasic = Sched;
+  Sched.McuSleep -> Sleep;
+}
+
diff --git a/tos/system/crc.h b/tos/system/crc.h
new file mode 100644
index 00000000..1b6b84d7
--- /dev/null
+++ b/tos/system/crc.h
@@ -0,0 +1,101 @@
+// $Id: crc.h,v 1.7 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+#ifndef CRC_H
+#define CRC_H
+
+/* We don't want to duplicate this function inside binary components. */
+#ifdef NESC_BUILD_BINARY
+uint16_t crcByte(uint16_t oldCrc, uint8_t byte);
+#else
+/*
+ * Default CRC function. Some microcontrollers may provide more efficient
+ * implementations.
+ *
+ * This CRC-16 function produces a 16-bit running CRC that adheres to the
+ * ITU-T CRC standard.
+ *
+ * The ITU-T polynomial is: G_16(x) = x^16 + x^12 + x^5 + 1
+ * @param crc Running CRC value
+ * @param b Byte to "add" to the CRC
+ * @return New CRC value
+ *
+ * To understand how the CRC works and how it relates to the polynomial, read through this
+ * loop based implementation.
+ */
+/*
+uint16_t crcByte(uint16_t crc, uint8_t b)
+{
+  uint8_t i;
+  
+  crc = crc ^ b << 8;
+  i = 8;
+  do
+    if (crc & 0x8000)
+      crc = crc << 1 ^ 0x1021;
+    else
+      crc = crc << 1;
+  while (--i);
+
+  return crc;
+}
+*/
+/**
+ * The following implementation computes the same polynomial.  It should be
+ * (much) faster on any processor architecture, as it does not involve
+ * loops. Unfortunately, I can not yet give a reference to a derivation.
+ * 
+ * @author Andreas Koepke <koepke@tkn.tu-berlin.de> (porting to tinyos)
+ * @author Paul Curtis (pointed out this implementation on the MSP430 yahoo mailing list)
+ */
+
+uint16_t crcByte(uint16_t crc, uint8_t b) {
+  crc = (uint8_t)(crc >> 8) | (crc << 8);
+  crc ^= b;
+  crc ^= (uint8_t)(crc & 0xff) >> 4;
+  crc ^= crc << 12;
+  crc ^= (crc & 0xff) << 5;
+  return crc;
+}
+#endif
+
+#endif
diff --git a/tos/system/dbg.h b/tos/system/dbg.h
new file mode 100644
index 00000000..ffe7adb7
--- /dev/null
+++ b/tos/system/dbg.h
@@ -0,0 +1,53 @@
+// $Id: dbg.h,v 1.6 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2003 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2003 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/**
+ * This file is part of the TOSSIM DBG (debug) system.
+ *
+ * @author Philip Levis
+ * @date   2/08/05
+ */
+
+#ifndef DBG_H
+#define DBG_H
+
+#endif /* DBG_H */
diff --git a/tos/system/scale.h b/tos/system/scale.h
new file mode 100644
index 00000000..8e251116
--- /dev/null
+++ b/tos/system/scale.h
@@ -0,0 +1,22 @@
+#ifndef SCALE_H
+#define SCALE_H
+
+/*
+ * Multiply x by a/b while avoiding overflow when possible. Requires that
+ * a*b <= max value of from_t, and assumes unsigned arithmetic. 
+ *
+ * @param x Number to scale
+ * @param a Numerator of scaling value
+ * @param b Denominator of scaling value
+ * @return round(x * a/b)
+ */
+inline uint32_t scale32(uint32_t x, uint32_t a, uint32_t b) 
+{
+  uint32_t x_over_b = x / b;
+  uint32_t x_mod_b = x % b;
+
+  x_mod_b *= a; // on a separate line just in case some compiler goes weird
+  return x_over_b * a + (x_mod_b + (b>>1)) / b;
+}
+
+#endif
diff --git a/tos/system/tos.h b/tos/system/tos.h
new file mode 100644
index 00000000..ec49a208
--- /dev/null
+++ b/tos/system/tos.h
@@ -0,0 +1,52 @@
+#if !defined(__CYGWIN__)
+#if defined(__MSP430__)
+#include <sys/inttypes.h>
+#else
+#include <inttypes.h>
+#endif
+#else //cygwin
+#include <unistd.h>
+#include <stdio.h>
+#include <sys/types.h>
+#endif
+
+#include <string.h>
+#include <stdlib.h>
+#include <math.h>
+#include <stddef.h>
+#include <ctype.h>
+
+/* TEMPORARY: include the Safe TinyOS macros so that annotations get
+ * defined away for non-safe users */
+#include "../lib/safe/include/annots_stage1.h"
+
+typedef uint8_t bool;
+enum { FALSE = 0, TRUE = 1 };
+
+typedef nx_int8_t nx_bool;
+uint16_t TOS_NODE_ID = 1;
+
+/* This macro is used to mark pointers that represent ownership
+   transfer in interfaces. See TEP 3 for more discussion. */
+#define PASS
+
+#ifdef NESC
+struct @atmostonce { };
+struct @atleastonce { };
+struct @exactlyonce { };
+#endif
+
+/* This platform_bootstrap macro exists in accordance with TEP
+   107. A platform may override this through a platform.h file. */
+#include <platform.h>
+#ifndef platform_bootstrap
+#define platform_bootstrap() {}
+#endif
+
+#ifndef TOSSIM
+#define dbg(s, ...) 
+#define dbgerror(s, ...) 
+#define dbg_clear(s, ...) 
+#define dbgerror_clear(s, ...) 
+#endif
+
diff --git a/tos/types/AM.h b/tos/types/AM.h
new file mode 100644
index 00000000..a9d4cf0f
--- /dev/null
+++ b/tos/types/AM.h
@@ -0,0 +1,34 @@
+#ifndef AM_H
+#define AM_H
+
+// These are the right types, but ncc currently does not 
+// like parameters being network types
+typedef nx_uint8_t nx_am_id_t;
+typedef nx_uint8_t nx_am_group_t;
+typedef nx_uint16_t nx_am_addr_t;
+
+typedef uint8_t am_id_t;
+typedef uint8_t am_group_t;
+typedef uint16_t am_addr_t;
+
+enum {
+  AM_BROADCAST_ADDR = 0xffff,
+};
+
+#ifndef DEFINED_TOS_AM_GROUP
+#define DEFINED_TOS_AM_GROUP 0x22
+#endif
+
+#ifndef DEFINED_TOS_AM_ADDRESS
+#define DEFINED_TOS_AM_ADDRESS 1
+#endif
+
+enum {
+  TOS_AM_GROUP = DEFINED_TOS_AM_GROUP,
+  TOS_AM_ADDRESS = DEFINED_TOS_AM_ADDRESS
+};
+
+#define UQ_AMQUEUE_SEND "amqueue.send"
+
+#endif
+
diff --git a/tos/types/I2C.h b/tos/types/I2C.h
new file mode 100644
index 00000000..534648fb
--- /dev/null
+++ b/tos/types/I2C.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2005-2006 Arch Rock Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arched Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author Phil Buonadonna
+ * @author Philip Levis
+ */
+
+#ifndef _I2C_H
+#define _I2C_H
+
+typedef struct { } TI2CExtdAddr;
+typedef struct { } TI2CBasicAddr;
+
+typedef uint8_t i2c_flags_t;
+
+enum {
+  I2C_START   = 0x01,
+  I2C_STOP    = 0x02,
+  I2C_ACK_END = 0x04,
+};
+
+
+#endif /* _I2C_H */
diff --git a/tos/types/Ieee154.h b/tos/types/Ieee154.h
new file mode 100644
index 00000000..bc5fde81
--- /dev/null
+++ b/tos/types/Ieee154.h
@@ -0,0 +1,97 @@
+/*
+ * "Copyright (c) 2008, 2009 The Regents of the University  of California.
+ * All rights reserved."
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation for any purpose, without fee, and without written agreement is
+ * hereby granted, provided that the above copyright notice, the following
+ * two paragraphs and the author appear in all copies of this software.
+ *
+ * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
+ * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
+ * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
+ * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
+ * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
+ * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
+ *
+ */
+ /*
+ *
+ * @author Stephen Dawson-Haggerty <stevedh@eecs.berkeley.edu>
+ * @version $Revision: 1.1 $ $Date: 2009/08/19 17:54:35 $
+ */
+
+#ifndef __IEEE154_H__
+#define __IEEE154_H__
+
+#include "IeeeEui64.h"
+
+#define IEEE154_SEND_CLIENT "IEEE154_SEND_CLIENT"
+
+typedef uint16_t       ieee154_panid_t;
+typedef uint16_t       ieee154_saddr_t;
+typedef ieee_eui64_t   ieee154_laddr_t;
+
+typedef struct {
+  uint8_t ieee_mode:2;
+  union {
+    ieee154_saddr_t saddr;
+    ieee154_laddr_t laddr;
+  } ieee_addr;
+} ieee154_addr_t;
+#define i_saddr ieee_addr.saddr
+#define i_laddr ieee_addr.laddr
+
+enum {
+  IEEE154_BROADCAST_ADDR = 0xffff,
+  IEEE154_LINK_MTU   = 127,
+};
+
+struct ieee154_frame_addr {
+  ieee154_addr_t ieee_src;
+  ieee154_addr_t ieee_dst;
+  ieee154_panid_t ieee_dstpan;
+};
+
+enum {
+  IEEE154_MIN_HDR_SZ = 6,
+};
+
+#if 0
+struct ieee154_header_base {
+  uint8_t length;
+  uint16_t fcf;
+  uint8_t dsn;
+  uint16_t destpan;
+} __attribute__((packed));
+#else
+#endif
+
+enum ieee154_fcf_enums {
+  IEEE154_FCF_FRAME_TYPE = 0,
+  IEEE154_FCF_SECURITY_ENABLED = 3,
+  IEEE154_FCF_FRAME_PENDING = 4,
+  IEEE154_FCF_ACK_REQ = 5,
+  IEEE154_FCF_INTRAPAN = 6,
+  IEEE154_FCF_DEST_ADDR_MODE = 10,
+  IEEE154_FCF_SRC_ADDR_MODE = 14,
+};
+
+enum ieee154_fcf_type_enums {
+  IEEE154_TYPE_BEACON = 0,
+  IEEE154_TYPE_DATA = 1,
+  IEEE154_TYPE_ACK = 2,
+  IEEE154_TYPE_MAC_CMD = 3,
+};
+
+enum iee154_fcf_addr_mode_enums {
+  IEEE154_ADDR_NONE = 0,
+  IEEE154_ADDR_SHORT = 2,
+  IEEE154_ADDR_EXT = 3,
+};
+
+#endif
diff --git a/tos/types/IeeeEui64.h b/tos/types/IeeeEui64.h
new file mode 100644
index 00000000..c30b4276
--- /dev/null
+++ b/tos/types/IeeeEui64.h
@@ -0,0 +1,46 @@
+// $Id: IeeeEui64.h,v 1.2 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2007, Vanderbilt University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holders nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Janos Sallai
+ * Author: Gilman Tolle, Jonathan Hui (TEP 122)
+ */
+
+#ifndef IEEEEUI64_H
+#define IEEEEUI64_H
+
+enum { IEEE_EUI64_LENGTH = 8 };
+
+typedef struct ieee_eui64 {
+  uint8_t data[IEEE_EUI64_LENGTH];
+} ieee_eui64_t;
+
+#endif // IEEEEUI64_H
diff --git a/tos/types/Leds.h b/tos/types/Leds.h
new file mode 100644
index 00000000..9438ca70
--- /dev/null
+++ b/tos/types/Leds.h
@@ -0,0 +1,54 @@
+//$Id: Leds.h,v 1.6 2010-06-29 22:07:56 scipio Exp $
+/* Copyright (c) 2005 The Regents of the University of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * Constants for manipulating LEDs.
+ *
+ * @author Philip Levis
+ * @date   March 21, 2005
+ */
+
+#ifndef LEDS_H
+#define LEDS_H 
+
+enum {
+  LEDS_LED0 = 1 << 0,
+  LEDS_LED1 = 1 << 1,
+  LEDS_LED2 = 1 << 2,
+  LEDS_LED3 = 1 << 3,
+  LEDS_LED4 = 1 << 4,
+  LEDS_LED5 = 1 << 5,
+  LEDS_LED6 = 1 << 6,
+  LEDS_LED7 = 1 << 7
+};
+
+#endif
diff --git a/tos/types/Lpl.h b/tos/types/Lpl.h
new file mode 100644
index 00000000..05219baa
--- /dev/null
+++ b/tos/types/Lpl.h
@@ -0,0 +1,23 @@
+#ifndef LPL_H
+#define LPL_H
+
+/**
+ * Amount of time, in milliseconds, to keep the radio on after
+ * a successful receive addressed to this node
+ */
+#ifndef DELAY_AFTER_RECEIVE
+#define DELAY_AFTER_RECEIVE 100
+#endif
+
+/**
+ * The LPL defaults to stay-on.
+ */
+#ifndef LPL_DEF_LOCAL_WAKEUP
+#define LPL_DEF_LOCAL_WAKEUP 0
+#endif
+
+#ifndef LPL_DEF_REMOTE_WAKEUP
+#define LPL_DEF_REMOTE_WAKEUP 0
+#endif
+
+#endif
diff --git a/tos/types/README b/tos/types/README
new file mode 100644
index 00000000..aac31ad1
--- /dev/null
+++ b/tos/types/README
@@ -0,0 +1,2 @@
+Update this.
+
diff --git a/tos/types/Resource.h b/tos/types/Resource.h
new file mode 100644
index 00000000..19a025c7
--- /dev/null
+++ b/tos/types/Resource.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2006, Technische Universitaet Berlin
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - Neither the name of the Technische Universitat Berlin nor the names
+ *   of its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef RESOURCE_H
+#define RESOURCE_H
+
+typedef uint8_t resource_client_id_t;
+
+#endif
+
diff --git a/tos/types/State.h b/tos/types/State.h
new file mode 100644
index 00000000..542f892e
--- /dev/null
+++ b/tos/types/State.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2005-2006 Rincon Research Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the Arch Rock Corporation nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+ * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE
+ */
+
+/**
+ * @author David Moss
+ */
+ 
+#ifndef STATE_H
+#define STATE_H
+
+#ifndef UQ_STATE
+#define UQ_STATE "State"
+#endif
+
+#endif
+
diff --git a/tos/types/Storage.h b/tos/types/Storage.h
new file mode 100644
index 00000000..4c873e7a
--- /dev/null
+++ b/tos/types/Storage.h
@@ -0,0 +1,63 @@
+// $Id: Storage.h,v 1.6 2010-06-29 22:07:56 scipio Exp $
+
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Copyright (c) 2002-2005 Intel Corporation
+ * All rights reserved.
+ *
+ * This file is distributed under the terms in the attached INTEL-LICENSE     
+ * file. If you do not find these files, copies can be found by writing to
+ * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+ * 94704.  Attention:  Intel License Inquiry.
+ */
+
+/*
+ * @author: Jonathan Hui <jwhui@cs.berkeley.edu>
+ * @author: David Gay <david.e.gay@intel.com>
+ * @version $Revision: 1.6 $ $Date: 2010-06-29 22:07:56 $
+ */
+
+#ifndef STORAGE_H
+#define STORAGE_H
+
+typedef uint8_t volume_id_t;
+typedef uint32_t storage_addr_t;
+typedef uint32_t storage_len_t;
+typedef uint32_t storage_cookie_t;
+
+enum {
+  SEEK_BEGINNING = 0
+};
+
+#include "Storage_chip.h"
+
+#endif
diff --git a/tos/types/TinyError.h b/tos/types/TinyError.h
new file mode 100644
index 00000000..6d3acc67
--- /dev/null
+++ b/tos/types/TinyError.h
@@ -0,0 +1,78 @@
+// $Id: TinyError.h,v 1.12 2010-06-29 22:07:56 scipio Exp $
+/*
+ * Copyright (c) 2000-2005 The Regents of the University  of California.  
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the University of California nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @author Phil Levis
+ * @author David Gay
+ * Revision:  $Revision: 1.12 $
+ *
+ * Defines global error codes for error_t in TinyOS.
+ */
+
+#ifndef TINY_ERROR_H_INCLUDED
+#define TINY_ERROR_H_INCLUDED
+
+#ifdef NESC
+#define NESC_COMBINE(x) @combine(x)
+#else
+#define NESC_COMBINE(x)
+#endif
+
+enum {
+  SUCCESS        =  0,          
+  FAIL           =  1,           // Generic condition: backwards compatible
+  ESIZE          =  2,           // Parameter passed in was too big.
+  ECANCEL        =  3,           // Operation cancelled by a call.
+  EOFF           =  4,           // Subsystem is not active
+  EBUSY          =  5,           // The underlying system is busy; retry later
+  EINVAL         =  6,           // An invalid parameter was passed
+  ERETRY         =  7,           // A rare and transient failure: can retry
+  ERESERVE       =  8,           // Reservation required before usage
+  EALREADY       =  9,           // The device state you are requesting is already set
+  ENOMEM         = 10,           // Memory required not available
+  ENOACK         = 11,           // A packet was not acknowledged
+  ELAST          = 11            // Last enum value
+};
+
+typedef uint8_t error_t NESC_COMBINE("ecombine");
+
+error_t ecombine(error_t r1, error_t r2) @safe()
+/* Returns: r1 if r1 == r2, FAIL otherwise. This is the standard error
+     combination function: two successes, or two identical errors are
+     preserved, while conflicting errors are represented by FAIL.
+*/
+{
+  return r1 == r2 ? r1 : FAIL;
+}
+
+#endif
diff --git a/tos/types/message.h b/tos/types/message.h
new file mode 100644
index 00000000..69a0a437
--- /dev/null
+++ b/tos/types/message.h
@@ -0,0 +1,28 @@
+#ifndef __MESSAGE_H__
+#define __MESSAGE_H__
+
+#include "platform_message.h"
+
+#ifndef TOSH_DATA_LENGTH
+#define TOSH_DATA_LENGTH 28
+#endif
+
+#ifndef TOS_BCAST_ADDR
+#define TOS_BCAST_ADDR 0xFFFF
+#endif
+
+typedef nx_struct message_t {
+  nx_uint8_t header[sizeof(message_header_t)];
+  nx_uint8_t data[TOSH_DATA_LENGTH];
+  nx_uint8_t footer[sizeof(message_footer_t)];
+  nx_uint8_t metadata[sizeof(message_metadata_t)];
+} message_t;
+
+/*
+ * This resource is used to arbitrate access between ActiveMessageC,
+ * Ieee154MessageC and possibly future MessageC components to the 
+ * underlying radio driver.
+ */
+#define RADIO_SEND_RESOURCE "RADIO_SEND_RESOURCE"
+
+#endif